diff options
| -rw-r--r-- | arch/blackfin/include/asm/bfin5xx_spi.h | 1 | ||||
| -rw-r--r-- | drivers/spi/spi_bfin5xx.c | 148 |
2 files changed, 12 insertions, 137 deletions
diff --git a/arch/blackfin/include/asm/bfin5xx_spi.h b/arch/blackfin/include/asm/bfin5xx_spi.h index ed4f8c6db0cd..ee3ecb96aa12 100644 --- a/arch/blackfin/include/asm/bfin5xx_spi.h +++ b/arch/blackfin/include/asm/bfin5xx_spi.h | |||
| @@ -120,7 +120,6 @@ struct bfin5xx_spi_chip { | |||
| 120 | u16 ctl_reg; | 120 | u16 ctl_reg; |
| 121 | u8 enable_dma; | 121 | u8 enable_dma; |
| 122 | u8 bits_per_word; | 122 | u8 bits_per_word; |
| 123 | u8 cs_change_per_word; | ||
| 124 | u16 cs_chg_udelay; /* Some devices require 16-bit delays */ | 123 | u16 cs_chg_udelay; /* Some devices require 16-bit delays */ |
| 125 | u32 cs_gpio; | 124 | u32 cs_gpio; |
| 126 | /* Value to send if no TX value is supplied, usually 0x0 or 0xFFFF */ | 125 | /* Value to send if no TX value is supplied, usually 0x0 or 0xFFFF */ |
diff --git a/drivers/spi/spi_bfin5xx.c b/drivers/spi/spi_bfin5xx.c index 6150a8cfb82a..f4023a78c87e 100644 --- a/drivers/spi/spi_bfin5xx.c +++ b/drivers/spi/spi_bfin5xx.c | |||
| @@ -114,7 +114,6 @@ struct chip_data { | |||
| 114 | u8 width; /* 0 or 1 */ | 114 | u8 width; /* 0 or 1 */ |
| 115 | u8 enable_dma; | 115 | u8 enable_dma; |
| 116 | u8 bits_per_word; /* 8 or 16 */ | 116 | u8 bits_per_word; /* 8 or 16 */ |
| 117 | u8 cs_change_per_word; | ||
| 118 | u16 cs_chg_udelay; /* Some devices require > 255usec delay */ | 117 | u16 cs_chg_udelay; /* Some devices require > 255usec delay */ |
| 119 | u32 cs_gpio; | 118 | u32 cs_gpio; |
| 120 | u16 idle_tx_val; | 119 | u16 idle_tx_val; |
| @@ -309,24 +308,6 @@ static void bfin_spi_u8_writer(struct driver_data *drv_data) | |||
| 309 | } | 308 | } |
| 310 | } | 309 | } |
| 311 | 310 | ||
| 312 | static void bfin_spi_u8_cs_chg_writer(struct driver_data *drv_data) | ||
| 313 | { | ||
| 314 | struct chip_data *chip = drv_data->cur_chip; | ||
| 315 | |||
| 316 | /* clear RXS (we check for RXS inside the loop) */ | ||
| 317 | bfin_spi_dummy_read(drv_data); | ||
| 318 | |||
| 319 | while (drv_data->tx < drv_data->tx_end) { | ||
| 320 | bfin_spi_cs_active(drv_data, chip); | ||
| 321 | write_TDBR(drv_data, (*(u8 *) (drv_data->tx++))); | ||
| 322 | /* make sure transfer finished before deactiving CS */ | ||
| 323 | while (!(read_STAT(drv_data) & BIT_STAT_RXS)) | ||
| 324 | cpu_relax(); | ||
| 325 | bfin_spi_dummy_read(drv_data); | ||
| 326 | bfin_spi_cs_deactive(drv_data, chip); | ||
| 327 | } | ||
| 328 | } | ||
| 329 | |||
| 330 | static void bfin_spi_u8_reader(struct driver_data *drv_data) | 311 | static void bfin_spi_u8_reader(struct driver_data *drv_data) |
| 331 | { | 312 | { |
| 332 | u16 tx_val = drv_data->cur_chip->idle_tx_val; | 313 | u16 tx_val = drv_data->cur_chip->idle_tx_val; |
| @@ -342,24 +323,6 @@ static void bfin_spi_u8_reader(struct driver_data *drv_data) | |||
| 342 | } | 323 | } |
| 343 | } | 324 | } |
| 344 | 325 | ||
| 345 | static void bfin_spi_u8_cs_chg_reader(struct driver_data *drv_data) | ||
| 346 | { | ||
| 347 | struct chip_data *chip = drv_data->cur_chip; | ||
| 348 | u16 tx_val = chip->idle_tx_val; | ||
| 349 | |||
| 350 | /* discard old RX data and clear RXS */ | ||
| 351 | bfin_spi_dummy_read(drv_data); | ||
| 352 | |||
| 353 | while (drv_data->rx < drv_data->rx_end) { | ||
| 354 | bfin_spi_cs_active(drv_data, chip); | ||
| 355 | write_TDBR(drv_data, tx_val); | ||
| 356 | while (!(read_STAT(drv_data) & BIT_STAT_RXS)) | ||
| 357 | cpu_relax(); | ||
| 358 | *(u8 *) (drv_data->rx++) = read_RDBR(drv_data); | ||
| 359 | bfin_spi_cs_deactive(drv_data, chip); | ||
| 360 | } | ||
| 361 | } | ||
| 362 | |||
| 363 | static void bfin_spi_u8_duplex(struct driver_data *drv_data) | 326 | static void bfin_spi_u8_duplex(struct driver_data *drv_data) |
| 364 | { | 327 | { |
| 365 | /* discard old RX data and clear RXS */ | 328 | /* discard old RX data and clear RXS */ |
| @@ -373,23 +336,6 @@ static void bfin_spi_u8_duplex(struct driver_data *drv_data) | |||
| 373 | } | 336 | } |
| 374 | } | 337 | } |
| 375 | 338 | ||
| 376 | static void bfin_spi_u8_cs_chg_duplex(struct driver_data *drv_data) | ||
| 377 | { | ||
| 378 | struct chip_data *chip = drv_data->cur_chip; | ||
| 379 | |||
| 380 | /* discard old RX data and clear RXS */ | ||
| 381 | bfin_spi_dummy_read(drv_data); | ||
| 382 | |||
| 383 | while (drv_data->rx < drv_data->rx_end) { | ||
| 384 | bfin_spi_cs_active(drv_data, chip); | ||
| 385 | write_TDBR(drv_data, (*(u8 *) (drv_data->tx++))); | ||
| 386 | while (!(read_STAT(drv_data) & BIT_STAT_RXS)) | ||
| 387 | cpu_relax(); | ||
| 388 | *(u8 *) (drv_data->rx++) = read_RDBR(drv_data); | ||
| 389 | bfin_spi_cs_deactive(drv_data, chip); | ||
| 390 | } | ||
| 391 | } | ||
| 392 | |||
| 393 | static void bfin_spi_u16_writer(struct driver_data *drv_data) | 339 | static void bfin_spi_u16_writer(struct driver_data *drv_data) |
| 394 | { | 340 | { |
| 395 | /* clear RXS (we check for RXS inside the loop) */ | 341 | /* clear RXS (we check for RXS inside the loop) */ |
| @@ -407,25 +353,6 @@ static void bfin_spi_u16_writer(struct driver_data *drv_data) | |||
| 407 | } | 353 | } |
| 408 | } | 354 | } |
| 409 | 355 | ||
| 410 | static void bfin_spi_u16_cs_chg_writer(struct driver_data *drv_data) | ||
| 411 | { | ||
| 412 | struct chip_data *chip = drv_data->cur_chip; | ||
| 413 | |||
| 414 | /* clear RXS (we check for RXS inside the loop) */ | ||
| 415 | bfin_spi_dummy_read(drv_data); | ||
| 416 | |||
| 417 | while (drv_data->tx < drv_data->tx_end) { | ||
| 418 | bfin_spi_cs_active(drv_data, chip); | ||
| 419 | write_TDBR(drv_data, (*(u16 *) (drv_data->tx))); | ||
| 420 | drv_data->tx += 2; | ||
| 421 | /* make sure transfer finished before deactiving CS */ | ||
| 422 | while (!(read_STAT(drv_data) & BIT_STAT_RXS)) | ||
| 423 | cpu_relax(); | ||
| 424 | bfin_spi_dummy_read(drv_data); | ||
| 425 | bfin_spi_cs_deactive(drv_data, chip); | ||
| 426 | } | ||
| 427 | } | ||
| 428 | |||
| 429 | static void bfin_spi_u16_reader(struct driver_data *drv_data) | 356 | static void bfin_spi_u16_reader(struct driver_data *drv_data) |
| 430 | { | 357 | { |
| 431 | u16 tx_val = drv_data->cur_chip->idle_tx_val; | 358 | u16 tx_val = drv_data->cur_chip->idle_tx_val; |
| @@ -442,25 +369,6 @@ static void bfin_spi_u16_reader(struct driver_data *drv_data) | |||
| 442 | } | 369 | } |
| 443 | } | 370 | } |
| 444 | 371 | ||
| 445 | static void bfin_spi_u16_cs_chg_reader(struct driver_data *drv_data) | ||
| 446 | { | ||
| 447 | struct chip_data *chip = drv_data->cur_chip; | ||
| 448 | u16 tx_val = chip->idle_tx_val; | ||
| 449 | |||
| 450 | /* discard old RX data and clear RXS */ | ||
| 451 | bfin_spi_dummy_read(drv_data); | ||
| 452 | |||
| 453 | while (drv_data->rx < drv_data->rx_end) { | ||
| 454 | bfin_spi_cs_active(drv_data, chip); | ||
| 455 | write_TDBR(drv_data, tx_val); | ||
| 456 | while (!(read_STAT(drv_data) & BIT_STAT_RXS)) | ||
| 457 | cpu_relax(); | ||
| 458 | *(u16 *) (drv_data->rx) = read_RDBR(drv_data); | ||
| 459 | drv_data->rx += 2; | ||
| 460 | bfin_spi_cs_deactive(drv_data, chip); | ||
| 461 | } | ||
| 462 | } | ||
| 463 | |||
| 464 | static void bfin_spi_u16_duplex(struct driver_data *drv_data) | 372 | static void bfin_spi_u16_duplex(struct driver_data *drv_data) |
| 465 | { | 373 | { |
| 466 | /* discard old RX data and clear RXS */ | 374 | /* discard old RX data and clear RXS */ |
| @@ -476,25 +384,6 @@ static void bfin_spi_u16_duplex(struct driver_data *drv_data) | |||
| 476 | } | 384 | } |
| 477 | } | 385 | } |
| 478 | 386 | ||
| 479 | static void bfin_spi_u16_cs_chg_duplex(struct driver_data *drv_data) | ||
| 480 | { | ||
| 481 | struct chip_data *chip = drv_data->cur_chip; | ||
| 482 | |||
| 483 | /* discard old RX data and clear RXS */ | ||
| 484 | bfin_spi_dummy_read(drv_data); | ||
| 485 | |||
| 486 | while (drv_data->rx < drv_data->rx_end) { | ||
| 487 | bfin_spi_cs_active(drv_data, chip); | ||
| 488 | write_TDBR(drv_data, (*(u16 *) (drv_data->tx))); | ||
| 489 | drv_data->tx += 2; | ||
| 490 | while (!(read_STAT(drv_data) & BIT_STAT_RXS)) | ||
| 491 | cpu_relax(); | ||
| 492 | *(u16 *) (drv_data->rx) = read_RDBR(drv_data); | ||
| 493 | drv_data->rx += 2; | ||
| 494 | bfin_spi_cs_deactive(drv_data, chip); | ||
| 495 | } | ||
| 496 | } | ||
| 497 | |||
| 498 | /* test if ther is more transfer to be done */ | 387 | /* test if ther is more transfer to be done */ |
| 499 | static void *bfin_spi_next_transfer(struct driver_data *drv_data) | 388 | static void *bfin_spi_next_transfer(struct driver_data *drv_data) |
| 500 | { | 389 | { |
| @@ -773,23 +662,17 @@ static void bfin_spi_pump_transfers(unsigned long data) | |||
| 773 | case 8: | 662 | case 8: |
| 774 | drv_data->n_bytes = 1; | 663 | drv_data->n_bytes = 1; |
| 775 | width = CFG_SPI_WORDSIZE8; | 664 | width = CFG_SPI_WORDSIZE8; |
| 776 | drv_data->read = chip->cs_change_per_word ? | 665 | drv_data->read = bfin_spi_u8_reader; |
| 777 | bfin_spi_u8_cs_chg_reader : bfin_spi_u8_reader; | 666 | drv_data->write = bfin_spi_u8_writer; |
| 778 | drv_data->write = chip->cs_change_per_word ? | 667 | drv_data->duplex = bfin_spi_u8_duplex; |
| 779 | bfin_spi_u8_cs_chg_writer : bfin_spi_u8_writer; | ||
| 780 | drv_data->duplex = chip->cs_change_per_word ? | ||
| 781 | bfin_spi_u8_cs_chg_duplex : bfin_spi_u8_duplex; | ||
| 782 | break; | 668 | break; |
| 783 | 669 | ||
| 784 | case 16: | 670 | case 16: |
| 785 | drv_data->n_bytes = 2; | 671 | drv_data->n_bytes = 2; |
| 786 | width = CFG_SPI_WORDSIZE16; | 672 | width = CFG_SPI_WORDSIZE16; |
| 787 | drv_data->read = chip->cs_change_per_word ? | 673 | drv_data->read = bfin_spi_u16_reader; |
| 788 | bfin_spi_u16_cs_chg_reader : bfin_spi_u16_reader; | 674 | drv_data->write = bfin_spi_u16_writer; |
| 789 | drv_data->write = chip->cs_change_per_word ? | 675 | drv_data->duplex = bfin_spi_u16_duplex; |
| 790 | bfin_spi_u16_cs_chg_writer : bfin_spi_u16_writer; | ||
| 791 | drv_data->duplex = chip->cs_change_per_word ? | ||
| 792 | bfin_spi_u16_cs_chg_duplex : bfin_spi_u16_duplex; | ||
| 793 | break; | 676 | break; |
| 794 | 677 | ||
| 795 | default: | 678 | default: |
| @@ -1164,7 +1047,6 @@ static int bfin_spi_setup(struct spi_device *spi) | |||
| 1164 | && drv_data->master_info->enable_dma; | 1047 | && drv_data->master_info->enable_dma; |
| 1165 | chip->ctl_reg = chip_info->ctl_reg; | 1048 | chip->ctl_reg = chip_info->ctl_reg; |
| 1166 | chip->bits_per_word = chip_info->bits_per_word; | 1049 | chip->bits_per_word = chip_info->bits_per_word; |
| 1167 | chip->cs_change_per_word = chip_info->cs_change_per_word; | ||
| 1168 | chip->cs_chg_udelay = chip_info->cs_chg_udelay; | 1050 | chip->cs_chg_udelay = chip_info->cs_chg_udelay; |
| 1169 | chip->cs_gpio = chip_info->cs_gpio; | 1051 | chip->cs_gpio = chip_info->cs_gpio; |
| 1170 | chip->idle_tx_val = chip_info->idle_tx_val; | 1052 | chip->idle_tx_val = chip_info->idle_tx_val; |
| @@ -1193,23 +1075,17 @@ static int bfin_spi_setup(struct spi_device *spi) | |||
| 1193 | case 8: | 1075 | case 8: |
| 1194 | chip->n_bytes = 1; | 1076 | chip->n_bytes = 1; |
| 1195 | chip->width = CFG_SPI_WORDSIZE8; | 1077 | chip->width = CFG_SPI_WORDSIZE8; |
| 1196 | chip->read = chip->cs_change_per_word ? | 1078 | chip->read = bfin_spi_u8_reader; |
| 1197 | bfin_spi_u8_cs_chg_reader : bfin_spi_u8_reader; | 1079 | chip->write = bfin_spi_u8_writer; |
| 1198 | chip->write = chip->cs_change_per_word ? | 1080 | chip->duplex = bfin_spi_u8_duplex; |
| 1199 | bfin_spi_u8_cs_chg_writer : bfin_spi_u8_writer; | ||
| 1200 | chip->duplex = chip->cs_change_per_word ? | ||
| 1201 | bfin_spi_u8_cs_chg_duplex : bfin_spi_u8_duplex; | ||
| 1202 | break; | 1081 | break; |
| 1203 | 1082 | ||
| 1204 | case 16: | 1083 | case 16: |
| 1205 | chip->n_bytes = 2; | 1084 | chip->n_bytes = 2; |
| 1206 | chip->width = CFG_SPI_WORDSIZE16; | 1085 | chip->width = CFG_SPI_WORDSIZE16; |
| 1207 | chip->read = chip->cs_change_per_word ? | 1086 | chip->read = bfin_spi_u16_reader; |
| 1208 | bfin_spi_u16_cs_chg_reader : bfin_spi_u16_reader; | 1087 | chip->write = bfin_spi_u16_writer; |
| 1209 | chip->write = chip->cs_change_per_word ? | 1088 | chip->duplex = bfin_spi_u16_duplex; |
| 1210 | bfin_spi_u16_cs_chg_writer : bfin_spi_u16_writer; | ||
| 1211 | chip->duplex = chip->cs_change_per_word ? | ||
| 1212 | bfin_spi_u16_cs_chg_duplex : bfin_spi_u16_duplex; | ||
| 1213 | break; | 1089 | break; |
| 1214 | 1090 | ||
| 1215 | default: | 1091 | default: |
