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| -rw-r--r-- | arch/mips/arc/console.c | 31 |
1 files changed, 0 insertions, 31 deletions
diff --git a/arch/mips/arc/console.c b/arch/mips/arc/console.c deleted file mode 100644 index 0fe6032999cb..000000000000 --- a/arch/mips/arc/console.c +++ /dev/null | |||
| @@ -1,31 +0,0 @@ | |||
| 1 | /* | ||
| 2 | * This file is subject to the terms and conditions of the GNU General Public | ||
| 3 | * License. See the file "COPYING" in the main directory of this archive | ||
| 4 | * for more details. | ||
| 5 | * | ||
| 6 | * Copyright (C) 1996 David S. Miller (dm@sgi.com) | ||
| 7 | * Compability with board caches, Ulf Carlsson | ||
| 8 | */ | ||
| 9 | #include <linux/kernel.h> | ||
| 10 | #include <asm/sgialib.h> | ||
| 11 | #include <asm/bcache.h> | ||
| 12 | |||
| 13 | /* | ||
| 14 | * IP22 boardcache is not compatible with board caches. Thus we disable it | ||
| 15 | * during romvec action. Since r4xx0.c is always compiled and linked with your | ||
| 16 | * kernel, this shouldn't cause any harm regardless what MIPS processor you | ||
| 17 | * have. | ||
| 18 | * | ||
| 19 | * The ARC write and read functions seem to interfere with the serial lines | ||
| 20 | * in some way. You should be careful with them. | ||
| 21 | */ | ||
| 22 | |||
| 23 | void prom_putchar(char c) | ||
| 24 | { | ||
| 25 | ULONG cnt; | ||
| 26 | CHAR it = c; | ||
| 27 | |||
| 28 | bc_disable(); | ||
| 29 | ArcWrite(1, &it, 1, &cnt); | ||
| 30 | bc_enable(); | ||
| 31 | } | ||
