3 files changed, 16 insertions, 1 deletions

diff --git a/drivers/pci/pcie/aspm.c b/drivers/pci/pcie/aspm.c
index 759c51a4e399..704605298c5e 100644
--- a/drivers/pci/pcie/aspm.c
+++ b/drivers/pci/pcie/aspm.c
@@ -510,6 +510,7 @@ static int pcie_aspm_sanity_check(struct pci_dev *pdev)
 {
         struct pci_dev *child_dev;
         int child_pos;
+        u32 reg32;
 
         /*
          * Some functions in a slot might not all be PCIE functions, very
@@ -519,6 +520,18 @@ static int pcie_aspm_sanity_check(struct pci_dev *pdev)
                 child_pos = pci_find_capability(child_dev, PCI_CAP_ID_EXP);
                 if (!child_pos)
                         return -EINVAL;
+
+                /*
+                 * Disable ASPM for pre-1.1 PCIe device, we follow MS to use
+                 * RBER bit to determine if a function is 1.1 version device
+                 */
+                pci_read_config_dword(child_dev, child_pos + PCI_EXP_DEVCAP,
+                        &reg32);
+                if (!(reg32 & PCI_EXP_DEVCAP_RBER)) {
+                        printk("Pre-1.1 PCIe device detected, "
+                                "disable ASPM for %s\n", pci_name(pdev));
+                        return -EINVAL;
+                }
         }
         return 0;
 }
diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
index 203630065839..7098dfb07449 100644
--- a/drivers/pci/probe.c
+++ b/drivers/pci/probe.c
@@ -1057,7 +1057,8 @@ int pci_scan_slot(struct pci_bus *bus, int devfn)
                 }
         }
 
-        if (bus->self)
+        /* only one slot has pcie device */
+        if (bus->self && nr)
                 pcie_aspm_init_link_state(bus->self);
 
         return nr;
diff --git a/include/linux/pci_regs.h b/include/linux/pci_regs.h
index 19958b929905..450684f7eaac 100644
--- a/include/linux/pci_regs.h
+++ b/include/linux/pci_regs.h
@@ -374,6 +374,7 @@
 #define  PCI_EXP_DEVCAP_ATN_BUT 0x1000  /* Attention Button Present */
 #define  PCI_EXP_DEVCAP_ATN_IND 0x2000  /* Attention Indicator Present */
 #define  PCI_EXP_DEVCAP_PWR_IND 0x4000  /* Power Indicator Present */
+#define  PCI_EXP_DEVCAP_RBER    0x8000  /* Role-Based Error Reporting */
 #define  PCI_EXP_DEVCAP_PWR_VAL 0x3fc0000 /* Slot Power Limit Value */
 #define  PCI_EXP_DEVCAP_PWR_SCL 0xc000000 /* Slot Power Limit Scale */
 #define PCI_EXP_DEVCTL          8       /* Device Control */