diff options
| -rw-r--r-- | drivers/scsi/ahci.c | 5 | ||||
| -rw-r--r-- | drivers/scsi/ata_piix.c | 14 | ||||
| -rw-r--r-- | drivers/scsi/libata-core.c | 217 | ||||
| -rw-r--r-- | drivers/scsi/libata-scsi.c | 56 | ||||
| -rw-r--r-- | drivers/scsi/libata.h | 2 | ||||
| -rw-r--r-- | drivers/scsi/sata_nv.c | 24 | ||||
| -rw-r--r-- | drivers/scsi/sata_promise.c | 7 | ||||
| -rw-r--r-- | drivers/scsi/sata_qstor.c | 8 | ||||
| -rw-r--r-- | drivers/scsi/sata_sil.c | 31 | ||||
| -rw-r--r-- | drivers/scsi/sata_sis.c | 2 | ||||
| -rw-r--r-- | drivers/scsi/sata_svw.c | 10 | ||||
| -rw-r--r-- | drivers/scsi/sata_sx4.c | 141 | ||||
| -rw-r--r-- | drivers/scsi/sata_uli.c | 2 | ||||
| -rw-r--r-- | drivers/scsi/sata_via.c | 2 | ||||
| -rw-r--r-- | drivers/scsi/sata_vsc.c | 5 | ||||
| -rw-r--r-- | include/linux/ata.h | 2 | ||||
| -rw-r--r-- | include/linux/libata.h | 4 | ||||
| -rw-r--r-- | include/linux/pci_ids.h | 1 |
18 files changed, 395 insertions, 138 deletions
diff --git a/drivers/scsi/ahci.c b/drivers/scsi/ahci.c index c5623694d10f..0b228ff67143 100644 --- a/drivers/scsi/ahci.c +++ b/drivers/scsi/ahci.c | |||
| @@ -269,6 +269,8 @@ static struct pci_device_id ahci_pci_tbl[] = { | |||
| 269 | board_ahci }, /* ESB2 */ | 269 | board_ahci }, /* ESB2 */ |
| 270 | { PCI_VENDOR_ID_INTEL, 0x2683, PCI_ANY_ID, PCI_ANY_ID, 0, 0, | 270 | { PCI_VENDOR_ID_INTEL, 0x2683, PCI_ANY_ID, PCI_ANY_ID, 0, 0, |
| 271 | board_ahci }, /* ESB2 */ | 271 | board_ahci }, /* ESB2 */ |
| 272 | { PCI_VENDOR_ID_INTEL, 0x27c6, PCI_ANY_ID, PCI_ANY_ID, 0, 0, | ||
| 273 | board_ahci }, /* ICH7-M DH */ | ||
| 272 | { } /* terminate list */ | 274 | { } /* terminate list */ |
| 273 | }; | 275 | }; |
| 274 | 276 | ||
| @@ -696,9 +698,6 @@ static int ahci_qc_issue(struct ata_queued_cmd *qc) | |||
| 696 | struct ata_port *ap = qc->ap; | 698 | struct ata_port *ap = qc->ap; |
| 697 | void *port_mmio = (void *) ap->ioaddr.cmd_addr; | 699 | void *port_mmio = (void *) ap->ioaddr.cmd_addr; |
| 698 | 700 | ||
| 699 | writel(1, port_mmio + PORT_SCR_ACT); | ||
| 700 | readl(port_mmio + PORT_SCR_ACT); /* flush */ | ||
| 701 | |||
| 702 | writel(1, port_mmio + PORT_CMD_ISSUE); | 701 | writel(1, port_mmio + PORT_CMD_ISSUE); |
| 703 | readl(port_mmio + PORT_CMD_ISSUE); /* flush */ | 702 | readl(port_mmio + PORT_CMD_ISSUE); /* flush */ |
| 704 | 703 | ||
diff --git a/drivers/scsi/ata_piix.c b/drivers/scsi/ata_piix.c index a2cfade2c1c6..9f1bdfbd8d0a 100644 --- a/drivers/scsi/ata_piix.c +++ b/drivers/scsi/ata_piix.c | |||
| @@ -629,13 +629,13 @@ static int piix_init_one (struct pci_dev *pdev, const struct pci_device_id *ent) | |||
| 629 | port_info[1] = NULL; | 629 | port_info[1] = NULL; |
| 630 | 630 | ||
| 631 | if (port_info[0]->host_flags & PIIX_FLAG_AHCI) { | 631 | if (port_info[0]->host_flags & PIIX_FLAG_AHCI) { |
| 632 | u8 tmp; | 632 | u8 tmp; |
| 633 | pci_read_config_byte(pdev, PIIX_SCC, &tmp); | 633 | pci_read_config_byte(pdev, PIIX_SCC, &tmp); |
| 634 | if (tmp == PIIX_AHCI_DEVICE) { | 634 | if (tmp == PIIX_AHCI_DEVICE) { |
| 635 | int rc = piix_disable_ahci(pdev); | 635 | int rc = piix_disable_ahci(pdev); |
| 636 | if (rc) | 636 | if (rc) |
| 637 | return rc; | 637 | return rc; |
| 638 | } | 638 | } |
| 639 | } | 639 | } |
| 640 | 640 | ||
| 641 | if (port_info[0]->host_flags & PIIX_FLAG_COMBINED) { | 641 | if (port_info[0]->host_flags & PIIX_FLAG_COMBINED) { |
diff --git a/drivers/scsi/libata-core.c b/drivers/scsi/libata-core.c index 73b1f72b7e43..2f68563ac3a3 100644 --- a/drivers/scsi/libata-core.c +++ b/drivers/scsi/libata-core.c | |||
| @@ -1304,12 +1304,12 @@ static inline u8 ata_dev_knobble(struct ata_port *ap) | |||
| 1304 | /** | 1304 | /** |
| 1305 | * ata_dev_config - Run device specific handlers and check for | 1305 | * ata_dev_config - Run device specific handlers and check for |
| 1306 | * SATA->PATA bridges | 1306 | * SATA->PATA bridges |
| 1307 | * @ap: Bus | 1307 | * @ap: Bus |
| 1308 | * @i: Device | 1308 | * @i: Device |
| 1309 | * | 1309 | * |
| 1310 | * LOCKING: | 1310 | * LOCKING: |
| 1311 | */ | 1311 | */ |
| 1312 | 1312 | ||
| 1313 | void ata_dev_config(struct ata_port *ap, unsigned int i) | 1313 | void ata_dev_config(struct ata_port *ap, unsigned int i) |
| 1314 | { | 1314 | { |
| 1315 | /* limit bridge transfers to udma5, 200 sectors */ | 1315 | /* limit bridge transfers to udma5, 200 sectors */ |
| @@ -2402,6 +2402,26 @@ static int ata_sg_setup(struct ata_queued_cmd *qc) | |||
| 2402 | } | 2402 | } |
| 2403 | 2403 | ||
| 2404 | /** | 2404 | /** |
| 2405 | * ata_poll_qc_complete - turn irq back on and finish qc | ||
| 2406 | * @qc: Command to complete | ||
| 2407 | * @drv_stat: ATA status register content | ||
| 2408 | * | ||
| 2409 | * LOCKING: | ||
| 2410 | * None. (grabs host lock) | ||
| 2411 | */ | ||
| 2412 | |||
| 2413 | void ata_poll_qc_complete(struct ata_queued_cmd *qc, u8 drv_stat) | ||
| 2414 | { | ||
| 2415 | struct ata_port *ap = qc->ap; | ||
| 2416 | |||
| 2417 | spin_lock_irq(&ap->host_set->lock); | ||
| 2418 | ap->flags &= ~ATA_FLAG_NOINTR; | ||
| 2419 | ata_irq_on(ap); | ||
| 2420 | ata_qc_complete(qc, drv_stat); | ||
| 2421 | spin_unlock_irq(&ap->host_set->lock); | ||
| 2422 | } | ||
| 2423 | |||
| 2424 | /** | ||
| 2405 | * ata_pio_poll - | 2425 | * ata_pio_poll - |
| 2406 | * @ap: | 2426 | * @ap: |
| 2407 | * | 2427 | * |
| @@ -2492,9 +2512,7 @@ static void ata_pio_complete (struct ata_port *ap) | |||
| 2492 | 2512 | ||
| 2493 | ap->pio_task_state = PIO_ST_IDLE; | 2513 | ap->pio_task_state = PIO_ST_IDLE; |
| 2494 | 2514 | ||
| 2495 | ata_irq_on(ap); | 2515 | ata_poll_qc_complete(qc, drv_stat); |
| 2496 | |||
| 2497 | ata_qc_complete(qc, drv_stat); | ||
| 2498 | } | 2516 | } |
| 2499 | 2517 | ||
| 2500 | 2518 | ||
| @@ -2519,6 +2537,20 @@ void swap_buf_le16(u16 *buf, unsigned int buf_words) | |||
| 2519 | #endif /* __BIG_ENDIAN */ | 2537 | #endif /* __BIG_ENDIAN */ |
| 2520 | } | 2538 | } |
| 2521 | 2539 | ||
| 2540 | /** | ||
| 2541 | * ata_mmio_data_xfer - Transfer data by MMIO | ||
| 2542 | * @ap: port to read/write | ||
| 2543 | * @buf: data buffer | ||
| 2544 | * @buflen: buffer length | ||
| 2545 | * @do_write: read/write | ||
| 2546 | * | ||
| 2547 | * Transfer data from/to the device data register by MMIO. | ||
| 2548 | * | ||
| 2549 | * LOCKING: | ||
| 2550 | * Inherited from caller. | ||
| 2551 | * | ||
| 2552 | */ | ||
| 2553 | |||
| 2522 | static void ata_mmio_data_xfer(struct ata_port *ap, unsigned char *buf, | 2554 | static void ata_mmio_data_xfer(struct ata_port *ap, unsigned char *buf, |
| 2523 | unsigned int buflen, int write_data) | 2555 | unsigned int buflen, int write_data) |
| 2524 | { | 2556 | { |
| @@ -2527,6 +2559,7 @@ static void ata_mmio_data_xfer(struct ata_port *ap, unsigned char *buf, | |||
| 2527 | u16 *buf16 = (u16 *) buf; | 2559 | u16 *buf16 = (u16 *) buf; |
| 2528 | void __iomem *mmio = (void __iomem *)ap->ioaddr.data_addr; | 2560 | void __iomem *mmio = (void __iomem *)ap->ioaddr.data_addr; |
| 2529 | 2561 | ||
| 2562 | /* Transfer multiple of 2 bytes */ | ||
| 2530 | if (write_data) { | 2563 | if (write_data) { |
| 2531 | for (i = 0; i < words; i++) | 2564 | for (i = 0; i < words; i++) |
| 2532 | writew(le16_to_cpu(buf16[i]), mmio); | 2565 | writew(le16_to_cpu(buf16[i]), mmio); |
| @@ -2534,19 +2567,76 @@ static void ata_mmio_data_xfer(struct ata_port *ap, unsigned char *buf, | |||
| 2534 | for (i = 0; i < words; i++) | 2567 | for (i = 0; i < words; i++) |
| 2535 | buf16[i] = cpu_to_le16(readw(mmio)); | 2568 | buf16[i] = cpu_to_le16(readw(mmio)); |
| 2536 | } | 2569 | } |
| 2570 | |||
| 2571 | /* Transfer trailing 1 byte, if any. */ | ||
| 2572 | if (unlikely(buflen & 0x01)) { | ||
| 2573 | u16 align_buf[1] = { 0 }; | ||
| 2574 | unsigned char *trailing_buf = buf + buflen - 1; | ||
| 2575 | |||
| 2576 | if (write_data) { | ||
| 2577 | memcpy(align_buf, trailing_buf, 1); | ||
| 2578 | writew(le16_to_cpu(align_buf[0]), mmio); | ||
| 2579 | } else { | ||
| 2580 | align_buf[0] = cpu_to_le16(readw(mmio)); | ||
| 2581 | memcpy(trailing_buf, align_buf, 1); | ||
| 2582 | } | ||
| 2583 | } | ||
| 2537 | } | 2584 | } |
| 2538 | 2585 | ||
| 2586 | /** | ||
| 2587 | * ata_pio_data_xfer - Transfer data by PIO | ||
| 2588 | * @ap: port to read/write | ||
| 2589 | * @buf: data buffer | ||
| 2590 | * @buflen: buffer length | ||
| 2591 | * @do_write: read/write | ||
| 2592 | * | ||
| 2593 | * Transfer data from/to the device data register by PIO. | ||
| 2594 | * | ||
| 2595 | * LOCKING: | ||
| 2596 | * Inherited from caller. | ||
| 2597 | * | ||
| 2598 | */ | ||
| 2599 | |||
| 2539 | static void ata_pio_data_xfer(struct ata_port *ap, unsigned char *buf, | 2600 | static void ata_pio_data_xfer(struct ata_port *ap, unsigned char *buf, |
| 2540 | unsigned int buflen, int write_data) | 2601 | unsigned int buflen, int write_data) |
| 2541 | { | 2602 | { |
| 2542 | unsigned int dwords = buflen >> 1; | 2603 | unsigned int words = buflen >> 1; |
| 2543 | 2604 | ||
| 2605 | /* Transfer multiple of 2 bytes */ | ||
| 2544 | if (write_data) | 2606 | if (write_data) |
| 2545 | outsw(ap->ioaddr.data_addr, buf, dwords); | 2607 | outsw(ap->ioaddr.data_addr, buf, words); |
| 2546 | else | 2608 | else |
| 2547 | insw(ap->ioaddr.data_addr, buf, dwords); | 2609 | insw(ap->ioaddr.data_addr, buf, words); |
| 2610 | |||
| 2611 | /* Transfer trailing 1 byte, if any. */ | ||
| 2612 | if (unlikely(buflen & 0x01)) { | ||
| 2613 | u16 align_buf[1] = { 0 }; | ||
| 2614 | unsigned char *trailing_buf = buf + buflen - 1; | ||
| 2615 | |||
| 2616 | if (write_data) { | ||
| 2617 | memcpy(align_buf, trailing_buf, 1); | ||
| 2618 | outw(le16_to_cpu(align_buf[0]), ap->ioaddr.data_addr); | ||
| 2619 | } else { | ||
| 2620 | align_buf[0] = cpu_to_le16(inw(ap->ioaddr.data_addr)); | ||
| 2621 | memcpy(trailing_buf, align_buf, 1); | ||
| 2622 | } | ||
| 2623 | } | ||
| 2548 | } | 2624 | } |
| 2549 | 2625 | ||
| 2626 | /** | ||
| 2627 | * ata_data_xfer - Transfer data from/to the data register. | ||
| 2628 | * @ap: port to read/write | ||
| 2629 | * @buf: data buffer | ||
| 2630 | * @buflen: buffer length | ||
| 2631 | * @do_write: read/write | ||
| 2632 | * | ||
| 2633 | * Transfer data from/to the device data register. | ||
| 2634 | * | ||
| 2635 | * LOCKING: | ||
| 2636 | * Inherited from caller. | ||
| 2637 | * | ||
| 2638 | */ | ||
| 2639 | |||
| 2550 | static void ata_data_xfer(struct ata_port *ap, unsigned char *buf, | 2640 | static void ata_data_xfer(struct ata_port *ap, unsigned char *buf, |
| 2551 | unsigned int buflen, int do_write) | 2641 | unsigned int buflen, int do_write) |
| 2552 | { | 2642 | { |
| @@ -2556,6 +2646,16 @@ static void ata_data_xfer(struct ata_port *ap, unsigned char *buf, | |||
| 2556 | ata_pio_data_xfer(ap, buf, buflen, do_write); | 2646 | ata_pio_data_xfer(ap, buf, buflen, do_write); |
| 2557 | } | 2647 | } |
| 2558 | 2648 | ||
| 2649 | /** | ||
| 2650 | * ata_pio_sector - Transfer ATA_SECT_SIZE (512 bytes) of data. | ||
| 2651 | * @qc: Command on going | ||
| 2652 | * | ||
| 2653 | * Transfer ATA_SECT_SIZE of data from/to the ATA device. | ||
| 2654 | * | ||
| 2655 | * LOCKING: | ||
| 2656 | * Inherited from caller. | ||
| 2657 | */ | ||
| 2658 | |||
| 2559 | static void ata_pio_sector(struct ata_queued_cmd *qc) | 2659 | static void ata_pio_sector(struct ata_queued_cmd *qc) |
| 2560 | { | 2660 | { |
| 2561 | int do_write = (qc->tf.flags & ATA_TFLAG_WRITE); | 2661 | int do_write = (qc->tf.flags & ATA_TFLAG_WRITE); |
| @@ -2594,6 +2694,18 @@ static void ata_pio_sector(struct ata_queued_cmd *qc) | |||
| 2594 | kunmap(page); | 2694 | kunmap(page); |
| 2595 | } | 2695 | } |
| 2596 | 2696 | ||
| 2697 | /** | ||
| 2698 | * __atapi_pio_bytes - Transfer data from/to the ATAPI device. | ||
| 2699 | * @qc: Command on going | ||
| 2700 | * @bytes: number of bytes | ||
| 2701 | * | ||
| 2702 | * Transfer Transfer data from/to the ATAPI device. | ||
| 2703 | * | ||
| 2704 | * LOCKING: | ||
| 2705 | * Inherited from caller. | ||
| 2706 | * | ||
| 2707 | */ | ||
| 2708 | |||
| 2597 | static void __atapi_pio_bytes(struct ata_queued_cmd *qc, unsigned int bytes) | 2709 | static void __atapi_pio_bytes(struct ata_queued_cmd *qc, unsigned int bytes) |
| 2598 | { | 2710 | { |
| 2599 | int do_write = (qc->tf.flags & ATA_TFLAG_WRITE); | 2711 | int do_write = (qc->tf.flags & ATA_TFLAG_WRITE); |
| @@ -2603,10 +2715,33 @@ static void __atapi_pio_bytes(struct ata_queued_cmd *qc, unsigned int bytes) | |||
| 2603 | unsigned char *buf; | 2715 | unsigned char *buf; |
| 2604 | unsigned int offset, count; | 2716 | unsigned int offset, count; |
| 2605 | 2717 | ||
| 2606 | if (qc->curbytes == qc->nbytes - bytes) | 2718 | if (qc->curbytes + bytes >= qc->nbytes) |
| 2607 | ap->pio_task_state = PIO_ST_LAST; | 2719 | ap->pio_task_state = PIO_ST_LAST; |
| 2608 | 2720 | ||
| 2609 | next_sg: | 2721 | next_sg: |
| 2722 | if (unlikely(qc->cursg >= qc->n_elem)) { | ||
| 2723 | /* | ||
| 2724 | * The end of qc->sg is reached and the device expects | ||
| 2725 | * more data to transfer. In order not to overrun qc->sg | ||
| 2726 | * and fulfill length specified in the byte count register, | ||
| 2727 | * - for read case, discard trailing data from the device | ||
| 2728 | * - for write case, padding zero data to the device | ||
| 2729 | */ | ||
| 2730 | u16 pad_buf[1] = { 0 }; | ||
| 2731 | unsigned int words = bytes >> 1; | ||
| 2732 | unsigned int i; | ||
| 2733 | |||
| 2734 | if (words) /* warning if bytes > 1 */ | ||
| 2735 | printk(KERN_WARNING "ata%u: %u bytes trailing data\n", | ||
| 2736 | ap->id, bytes); | ||
| 2737 | |||
| 2738 | for (i = 0; i < words; i++) | ||
| 2739 | ata_data_xfer(ap, (unsigned char*)pad_buf, 2, do_write); | ||
| 2740 | |||
| 2741 | ap->pio_task_state = PIO_ST_LAST; | ||
| 2742 | return; | ||
| 2743 | } | ||
| 2744 | |||
| 2610 | sg = &qc->sg[qc->cursg]; | 2745 | sg = &qc->sg[qc->cursg]; |
| 2611 | 2746 | ||
| 2612 | page = sg->page; | 2747 | page = sg->page; |
| @@ -2640,11 +2775,21 @@ next_sg: | |||
| 2640 | 2775 | ||
| 2641 | kunmap(page); | 2776 | kunmap(page); |
| 2642 | 2777 | ||
| 2643 | if (bytes) { | 2778 | if (bytes) |
| 2644 | goto next_sg; | 2779 | goto next_sg; |
| 2645 | } | ||
| 2646 | } | 2780 | } |
| 2647 | 2781 | ||
| 2782 | /** | ||
| 2783 | * atapi_pio_bytes - Transfer data from/to the ATAPI device. | ||
| 2784 | * @qc: Command on going | ||
| 2785 | * | ||
| 2786 | * Transfer Transfer data from/to the ATAPI device. | ||
| 2787 | * | ||
| 2788 | * LOCKING: | ||
| 2789 | * Inherited from caller. | ||
| 2790 | * | ||
| 2791 | */ | ||
| 2792 | |||
| 2648 | static void atapi_pio_bytes(struct ata_queued_cmd *qc) | 2793 | static void atapi_pio_bytes(struct ata_queued_cmd *qc) |
| 2649 | { | 2794 | { |
| 2650 | struct ata_port *ap = qc->ap; | 2795 | struct ata_port *ap = qc->ap; |
| @@ -2717,9 +2862,7 @@ static void ata_pio_block(struct ata_port *ap) | |||
| 2717 | if ((status & ATA_DRQ) == 0) { | 2862 | if ((status & ATA_DRQ) == 0) { |
| 2718 | ap->pio_task_state = PIO_ST_IDLE; | 2863 | ap->pio_task_state = PIO_ST_IDLE; |
| 2719 | 2864 | ||
| 2720 | ata_irq_on(ap); | 2865 | ata_poll_qc_complete(qc, status); |
| 2721 | |||
| 2722 | ata_qc_complete(qc, status); | ||
| 2723 | return; | 2866 | return; |
| 2724 | } | 2867 | } |
| 2725 | 2868 | ||
| @@ -2749,9 +2892,7 @@ static void ata_pio_error(struct ata_port *ap) | |||
| 2749 | 2892 | ||
| 2750 | ap->pio_task_state = PIO_ST_IDLE; | 2893 | ap->pio_task_state = PIO_ST_IDLE; |
| 2751 | 2894 | ||
| 2752 | ata_irq_on(ap); | 2895 | ata_poll_qc_complete(qc, drv_stat | ATA_ERR); |
| 2753 | |||
| 2754 | ata_qc_complete(qc, drv_stat | ATA_ERR); | ||
| 2755 | } | 2896 | } |
| 2756 | 2897 | ||
| 2757 | static void ata_pio_task(void *_data) | 2898 | static void ata_pio_task(void *_data) |
| @@ -3086,9 +3227,14 @@ void ata_qc_complete(struct ata_queued_cmd *qc, u8 drv_stat) | |||
| 3086 | if (likely(qc->flags & ATA_QCFLAG_DMAMAP)) | 3227 | if (likely(qc->flags & ATA_QCFLAG_DMAMAP)) |
| 3087 | ata_sg_clean(qc); | 3228 | ata_sg_clean(qc); |
| 3088 | 3229 | ||
| 3230 | /* atapi: mark qc as inactive to prevent the interrupt handler | ||
| 3231 | * from completing the command twice later, before the error handler | ||
| 3232 | * is called. (when rc != 0 and atapi request sense is needed) | ||
| 3233 | */ | ||
| 3234 | qc->flags &= ~ATA_QCFLAG_ACTIVE; | ||
| 3235 | |||
| 3089 | /* call completion callback */ | 3236 | /* call completion callback */ |
| 3090 | rc = qc->complete_fn(qc, drv_stat); | 3237 | rc = qc->complete_fn(qc, drv_stat); |
| 3091 | qc->flags &= ~ATA_QCFLAG_ACTIVE; | ||
| 3092 | 3238 | ||
| 3093 | /* if callback indicates not to complete command (non-zero), | 3239 | /* if callback indicates not to complete command (non-zero), |
| 3094 | * return immediately | 3240 | * return immediately |
| @@ -3218,11 +3364,13 @@ int ata_qc_issue_prot(struct ata_queued_cmd *qc) | |||
| 3218 | break; | 3364 | break; |
| 3219 | 3365 | ||
| 3220 | case ATA_PROT_ATAPI_NODATA: | 3366 | case ATA_PROT_ATAPI_NODATA: |
| 3367 | ap->flags |= ATA_FLAG_NOINTR; | ||
| 3221 | ata_tf_to_host_nolock(ap, &qc->tf); | 3368 | ata_tf_to_host_nolock(ap, &qc->tf); |
| 3222 | queue_work(ata_wq, &ap->packet_task); | 3369 | queue_work(ata_wq, &ap->packet_task); |
| 3223 | break; | 3370 | break; |
| 3224 | 3371 | ||
| 3225 | case ATA_PROT_ATAPI_DMA: | 3372 | case ATA_PROT_ATAPI_DMA: |
| 3373 | ap->flags |= ATA_FLAG_NOINTR; | ||
| 3226 | ap->ops->tf_load(ap, &qc->tf); /* load tf registers */ | 3374 | ap->ops->tf_load(ap, &qc->tf); /* load tf registers */ |
| 3227 | ap->ops->bmdma_setup(qc); /* set up bmdma */ | 3375 | ap->ops->bmdma_setup(qc); /* set up bmdma */ |
| 3228 | queue_work(ata_wq, &ap->packet_task); | 3376 | queue_work(ata_wq, &ap->packet_task); |
| @@ -3576,7 +3724,8 @@ irqreturn_t ata_interrupt (int irq, void *dev_instance, struct pt_regs *regs) | |||
| 3576 | struct ata_port *ap; | 3724 | struct ata_port *ap; |
| 3577 | 3725 | ||
| 3578 | ap = host_set->ports[i]; | 3726 | ap = host_set->ports[i]; |
| 3579 | if (ap && (!(ap->flags & ATA_FLAG_PORT_DISABLED))) { | 3727 | if (ap && |
| 3728 | !(ap->flags & (ATA_FLAG_PORT_DISABLED | ATA_FLAG_NOINTR))) { | ||
| 3580 | struct ata_queued_cmd *qc; | 3729 | struct ata_queued_cmd *qc; |
| 3581 | 3730 | ||
| 3582 | qc = ata_qc_from_tag(ap, ap->active_tag); | 3731 | qc = ata_qc_from_tag(ap, ap->active_tag); |
| @@ -3628,19 +3777,27 @@ static void atapi_packet_task(void *_data) | |||
| 3628 | /* send SCSI cdb */ | 3777 | /* send SCSI cdb */ |
| 3629 | DPRINTK("send cdb\n"); | 3778 | DPRINTK("send cdb\n"); |
| 3630 | assert(ap->cdb_len >= 12); | 3779 | assert(ap->cdb_len >= 12); |
| 3631 | ata_data_xfer(ap, qc->cdb, ap->cdb_len, 1); | ||
| 3632 | 3780 | ||
| 3633 | /* if we are DMA'ing, irq handler takes over from here */ | 3781 | if (qc->tf.protocol == ATA_PROT_ATAPI_DMA || |
| 3634 | if (qc->tf.protocol == ATA_PROT_ATAPI_DMA) | 3782 | qc->tf.protocol == ATA_PROT_ATAPI_NODATA) { |
| 3635 | ap->ops->bmdma_start(qc); /* initiate bmdma */ | 3783 | unsigned long flags; |
| 3636 | 3784 | ||
| 3637 | /* non-data commands are also handled via irq */ | 3785 | /* Once we're done issuing command and kicking bmdma, |
| 3638 | else if (qc->tf.protocol == ATA_PROT_ATAPI_NODATA) { | 3786 | * irq handler takes over. To not lose irq, we need |
| 3639 | /* do nothing */ | 3787 | * to clear NOINTR flag before sending cdb, but |
| 3640 | } | 3788 | * interrupt handler shouldn't be invoked before we're |
| 3789 | * finished. Hence, the following locking. | ||
| 3790 | */ | ||
| 3791 | spin_lock_irqsave(&ap->host_set->lock, flags); | ||
| 3792 | ap->flags &= ~ATA_FLAG_NOINTR; | ||
| 3793 | ata_data_xfer(ap, qc->cdb, ap->cdb_len, 1); | ||
| 3794 | if (qc->tf.protocol == ATA_PROT_ATAPI_DMA) | ||
| 3795 | ap->ops->bmdma_start(qc); /* initiate bmdma */ | ||
| 3796 | spin_unlock_irqrestore(&ap->host_set->lock, flags); | ||
| 3797 | } else { | ||
| 3798 | ata_data_xfer(ap, qc->cdb, ap->cdb_len, 1); | ||
| 3641 | 3799 | ||
| 3642 | /* PIO commands are handled by polling */ | 3800 | /* PIO commands are handled by polling */ |
| 3643 | else { | ||
| 3644 | ap->pio_task_state = PIO_ST; | 3801 | ap->pio_task_state = PIO_ST; |
| 3645 | queue_work(ata_wq, &ap->pio_task); | 3802 | queue_work(ata_wq, &ap->pio_task); |
| 3646 | } | 3803 | } |
| @@ -3648,7 +3805,7 @@ static void atapi_packet_task(void *_data) | |||
| 3648 | return; | 3805 | return; |
| 3649 | 3806 | ||
| 3650 | err_out: | 3807 | err_out: |
| 3651 | ata_qc_complete(qc, ATA_ERR); | 3808 | ata_poll_qc_complete(qc, ATA_ERR); |
| 3652 | } | 3809 | } |
| 3653 | 3810 | ||
| 3654 | 3811 | ||
diff --git a/drivers/scsi/libata-scsi.c b/drivers/scsi/libata-scsi.c index 6a75ec2187fd..f58311b8c050 100644 --- a/drivers/scsi/libata-scsi.c +++ b/drivers/scsi/libata-scsi.c | |||
| @@ -392,6 +392,60 @@ int ata_scsi_error(struct Scsi_Host *host) | |||
| 392 | } | 392 | } |
| 393 | 393 | ||
| 394 | /** | 394 | /** |
| 395 | * ata_scsi_start_stop_xlat - Translate SCSI START STOP UNIT command | ||
| 396 | * @qc: Storage for translated ATA taskfile | ||
| 397 | * @scsicmd: SCSI command to translate | ||
| 398 | * | ||
| 399 | * Sets up an ATA taskfile to issue STANDBY (to stop) or READ VERIFY | ||
| 400 | * (to start). Perhaps these commands should be preceded by | ||
| 401 | * CHECK POWER MODE to see what power mode the device is already in. | ||
| 402 | * [See SAT revision 5 at www.t10.org] | ||
| 403 | * | ||
| 404 | * LOCKING: | ||
| 405 | * spin_lock_irqsave(host_set lock) | ||
| 406 | * | ||
| 407 | * RETURNS: | ||
| 408 | * Zero on success, non-zero on error. | ||
| 409 | */ | ||
| 410 | |||
| 411 | static unsigned int ata_scsi_start_stop_xlat(struct ata_queued_cmd *qc, | ||
| 412 | u8 *scsicmd) | ||
| 413 | { | ||
| 414 | struct ata_taskfile *tf = &qc->tf; | ||
| 415 | |||
| 416 | tf->flags |= ATA_TFLAG_DEVICE | ATA_TFLAG_ISADDR; | ||
| 417 | tf->protocol = ATA_PROT_NODATA; | ||
| 418 | if (scsicmd[1] & 0x1) { | ||
| 419 | ; /* ignore IMMED bit, violates sat-r05 */ | ||
| 420 | } | ||
| 421 | if (scsicmd[4] & 0x2) | ||
| 422 | return 1; /* LOEJ bit set not supported */ | ||
| 423 | if (((scsicmd[4] >> 4) & 0xf) != 0) | ||
| 424 | return 1; /* power conditions not supported */ | ||
| 425 | if (scsicmd[4] & 0x1) { | ||
| 426 | tf->nsect = 1; /* 1 sector, lba=0 */ | ||
| 427 | tf->lbah = 0x0; | ||
| 428 | tf->lbam = 0x0; | ||
| 429 | tf->lbal = 0x0; | ||
| 430 | tf->device |= ATA_LBA; | ||
| 431 | tf->command = ATA_CMD_VERIFY; /* READ VERIFY */ | ||
| 432 | } else { | ||
| 433 | tf->nsect = 0; /* time period value (0 implies now) */ | ||
| 434 | tf->command = ATA_CMD_STANDBY; | ||
| 435 | /* Consider: ATA STANDBY IMMEDIATE command */ | ||
| 436 | } | ||
| 437 | /* | ||
| 438 | * Standby and Idle condition timers could be implemented but that | ||
| 439 | * would require libata to implement the Power condition mode page | ||
| 440 | * and allow the user to change it. Changing mode pages requires | ||
| 441 | * MODE SELECT to be implemented. | ||
| 442 | */ | ||
| 443 | |||
| 444 | return 0; | ||
| 445 | } | ||
| 446 | |||
| 447 | |||
| 448 | /** | ||
| 395 | * ata_scsi_flush_xlat - Translate SCSI SYNCHRONIZE CACHE command | 449 | * ata_scsi_flush_xlat - Translate SCSI SYNCHRONIZE CACHE command |
| 396 | * @qc: Storage for translated ATA taskfile | 450 | * @qc: Storage for translated ATA taskfile |
| 397 | * @scsicmd: SCSI command to translate (ignored) | 451 | * @scsicmd: SCSI command to translate (ignored) |
| @@ -1435,6 +1489,8 @@ static inline ata_xlat_func_t ata_get_xlat_func(struct ata_device *dev, u8 cmd) | |||
| 1435 | case VERIFY: | 1489 | case VERIFY: |
| 1436 | case VERIFY_16: | 1490 | case VERIFY_16: |
| 1437 | return ata_scsi_verify_xlat; | 1491 | return ata_scsi_verify_xlat; |
| 1492 | case START_STOP: | ||
| 1493 | return ata_scsi_start_stop_xlat; | ||
| 1438 | } | 1494 | } |
| 1439 | 1495 | ||
| 1440 | return NULL; | 1496 | return NULL; |
diff --git a/drivers/scsi/libata.h b/drivers/scsi/libata.h index d90430bbb0de..91b68eedb3c9 100644 --- a/drivers/scsi/libata.h +++ b/drivers/scsi/libata.h | |||
| @@ -72,7 +72,7 @@ extern unsigned int ata_scsiop_report_luns(struct ata_scsi_args *args, u8 *rbuf, | |||
| 72 | extern void ata_scsi_badcmd(struct scsi_cmnd *cmd, | 72 | extern void ata_scsi_badcmd(struct scsi_cmnd *cmd, |
| 73 | void (*done)(struct scsi_cmnd *), | 73 | void (*done)(struct scsi_cmnd *), |
| 74 | u8 asc, u8 ascq); | 74 | u8 asc, u8 ascq); |
| 75 | extern void ata_scsi_rbuf_fill(struct ata_scsi_args *args, | 75 | extern void ata_scsi_rbuf_fill(struct ata_scsi_args *args, |
| 76 | unsigned int (*actor) (struct ata_scsi_args *args, | 76 | unsigned int (*actor) (struct ata_scsi_args *args, |
| 77 | u8 *rbuf, unsigned int buflen)); | 77 | u8 *rbuf, unsigned int buflen)); |
| 78 | 78 | ||
diff --git a/drivers/scsi/sata_nv.c b/drivers/scsi/sata_nv.c index b0403ccd8a25..41a3421b02b4 100644 --- a/drivers/scsi/sata_nv.c +++ b/drivers/scsi/sata_nv.c | |||
| @@ -20,6 +20,12 @@ | |||
| 20 | * If you do not delete the provisions above, a recipient may use your | 20 | * If you do not delete the provisions above, a recipient may use your |
| 21 | * version of this file under either the OSL or the GPL. | 21 | * version of this file under either the OSL or the GPL. |
| 22 | * | 22 | * |
| 23 | * 0.08 | ||
| 24 | * - Added support for MCP51 and MCP55. | ||
| 25 | * | ||
| 26 | * 0.07 | ||
| 27 | * - Added support for RAID class code. | ||
| 28 | * | ||
| 23 | * 0.06 | 29 | * 0.06 |
| 24 | * - Added generic SATA support by using a pci_device_id that filters on | 30 | * - Added generic SATA support by using a pci_device_id that filters on |
| 25 | * the IDE storage class code. | 31 | * the IDE storage class code. |
| @@ -48,7 +54,7 @@ | |||
| 48 | #include <linux/libata.h> | 54 | #include <linux/libata.h> |
| 49 | 55 | ||
| 50 | #define DRV_NAME "sata_nv" | 56 | #define DRV_NAME "sata_nv" |
| 51 | #define DRV_VERSION "0.6" | 57 | #define DRV_VERSION "0.8" |
| 52 | 58 | ||
| 53 | #define NV_PORTS 2 | 59 | #define NV_PORTS 2 |
| 54 | #define NV_PIO_MASK 0x1f | 60 | #define NV_PIO_MASK 0x1f |
| @@ -116,7 +122,9 @@ enum nv_host_type | |||
| 116 | GENERIC, | 122 | GENERIC, |
| 117 | NFORCE2, | 123 | NFORCE2, |
| 118 | NFORCE3, | 124 | NFORCE3, |
| 119 | CK804 | 125 | CK804, |
| 126 | MCP51, | ||
| 127 | MCP55 | ||
| 120 | }; | 128 | }; |
| 121 | 129 | ||
| 122 | static struct pci_device_id nv_pci_tbl[] = { | 130 | static struct pci_device_id nv_pci_tbl[] = { |
| @@ -134,9 +142,18 @@ static struct pci_device_id nv_pci_tbl[] = { | |||
| 134 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, CK804 }, | 142 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, CK804 }, |
| 135 | { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP04_SATA2, | 143 | { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP04_SATA2, |
| 136 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, CK804 }, | 144 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, CK804 }, |
| 145 | { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_SATA, | ||
| 146 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, MCP51 }, | ||
| 147 | { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_SATA2, | ||
| 148 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, MCP51 }, | ||
| 149 | { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP55_SATA, | ||
| 150 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, MCP55 }, | ||
| 137 | { PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID, | 151 | { PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID, |
| 138 | PCI_ANY_ID, PCI_ANY_ID, | 152 | PCI_ANY_ID, PCI_ANY_ID, |
| 139 | PCI_CLASS_STORAGE_IDE<<8, 0xffff00, GENERIC }, | 153 | PCI_CLASS_STORAGE_IDE<<8, 0xffff00, GENERIC }, |
| 154 | { PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID, | ||
| 155 | PCI_ANY_ID, PCI_ANY_ID, | ||
| 156 | PCI_CLASS_STORAGE_RAID<<8, 0xffff00, GENERIC }, | ||
| 140 | { 0, } /* terminate list */ | 157 | { 0, } /* terminate list */ |
| 141 | }; | 158 | }; |
| 142 | 159 | ||
| @@ -274,7 +291,8 @@ static irqreturn_t nv_interrupt (int irq, void *dev_instance, | |||
| 274 | struct ata_port *ap; | 291 | struct ata_port *ap; |
| 275 | 292 | ||
| 276 | ap = host_set->ports[i]; | 293 | ap = host_set->ports[i]; |
| 277 | if (ap && (!(ap->flags & ATA_FLAG_PORT_DISABLED))) { | 294 | if (ap && |
| 295 | !(ap->flags & (ATA_FLAG_PORT_DISABLED | ATA_FLAG_NOINTR))) { | ||
| 278 | struct ata_queued_cmd *qc; | 296 | struct ata_queued_cmd *qc; |
| 279 | 297 | ||
| 280 | qc = ata_qc_from_tag(ap, ap->active_tag); | 298 | qc = ata_qc_from_tag(ap, ap->active_tag); |
diff --git a/drivers/scsi/sata_promise.c b/drivers/scsi/sata_promise.c index 5c1d4411457a..6defd7962359 100644 --- a/drivers/scsi/sata_promise.c +++ b/drivers/scsi/sata_promise.c | |||
| @@ -181,6 +181,10 @@ static struct pci_device_id pdc_ata_pci_tbl[] = { | |||
| 181 | board_20319 }, | 181 | board_20319 }, |
| 182 | { PCI_VENDOR_ID_PROMISE, 0x3319, PCI_ANY_ID, PCI_ANY_ID, 0, 0, | 182 | { PCI_VENDOR_ID_PROMISE, 0x3319, PCI_ANY_ID, PCI_ANY_ID, 0, 0, |
| 183 | board_20319 }, | 183 | board_20319 }, |
| 184 | { PCI_VENDOR_ID_PROMISE, 0x3519, PCI_ANY_ID, PCI_ANY_ID, 0, 0, | ||
| 185 | board_20319 }, | ||
| 186 | { PCI_VENDOR_ID_PROMISE, 0x3d17, PCI_ANY_ID, PCI_ANY_ID, 0, 0, | ||
| 187 | board_20319 }, | ||
| 184 | { PCI_VENDOR_ID_PROMISE, 0x3d18, PCI_ANY_ID, PCI_ANY_ID, 0, 0, | 188 | { PCI_VENDOR_ID_PROMISE, 0x3d18, PCI_ANY_ID, PCI_ANY_ID, 0, 0, |
| 185 | board_20319 }, | 189 | board_20319 }, |
| 186 | 190 | ||
| @@ -441,7 +445,8 @@ static irqreturn_t pdc_interrupt (int irq, void *dev_instance, struct pt_regs *r | |||
| 441 | VPRINTK("port %u\n", i); | 445 | VPRINTK("port %u\n", i); |
| 442 | ap = host_set->ports[i]; | 446 | ap = host_set->ports[i]; |
| 443 | tmp = mask & (1 << (i + 1)); | 447 | tmp = mask & (1 << (i + 1)); |
| 444 | if (tmp && ap && (!(ap->flags & ATA_FLAG_PORT_DISABLED))) { | 448 | if (tmp && ap && |
| 449 | !(ap->flags & (ATA_FLAG_PORT_DISABLED | ATA_FLAG_NOINTR))) { | ||
| 445 | struct ata_queued_cmd *qc; | 450 | struct ata_queued_cmd *qc; |
| 446 | 451 | ||
| 447 | qc = ata_qc_from_tag(ap, ap->active_tag); | 452 | qc = ata_qc_from_tag(ap, ap->active_tag); |
diff --git a/drivers/scsi/sata_qstor.c b/drivers/scsi/sata_qstor.c index 1383e8a28d72..08a84042ce09 100644 --- a/drivers/scsi/sata_qstor.c +++ b/drivers/scsi/sata_qstor.c | |||
| @@ -386,7 +386,8 @@ static inline unsigned int qs_intr_pkt(struct ata_host_set *host_set) | |||
| 386 | DPRINTK("SFF=%08x%08x: sCHAN=%u sHST=%d sDST=%02x\n", | 386 | DPRINTK("SFF=%08x%08x: sCHAN=%u sHST=%d sDST=%02x\n", |
| 387 | sff1, sff0, port_no, sHST, sDST); | 387 | sff1, sff0, port_no, sHST, sDST); |
| 388 | handled = 1; | 388 | handled = 1; |
| 389 | if (ap && (!(ap->flags & ATA_FLAG_PORT_DISABLED))) { | 389 | if (ap && !(ap->flags & |
| 390 | (ATA_FLAG_PORT_DISABLED|ATA_FLAG_NOINTR))) { | ||
| 390 | struct ata_queued_cmd *qc; | 391 | struct ata_queued_cmd *qc; |
| 391 | struct qs_port_priv *pp = ap->private_data; | 392 | struct qs_port_priv *pp = ap->private_data; |
| 392 | if (!pp || pp->state != qs_state_pkt) | 393 | if (!pp || pp->state != qs_state_pkt) |
| @@ -417,7 +418,8 @@ static inline unsigned int qs_intr_mmio(struct ata_host_set *host_set) | |||
| 417 | for (port_no = 0; port_no < host_set->n_ports; ++port_no) { | 418 | for (port_no = 0; port_no < host_set->n_ports; ++port_no) { |
| 418 | struct ata_port *ap; | 419 | struct ata_port *ap; |
| 419 | ap = host_set->ports[port_no]; | 420 | ap = host_set->ports[port_no]; |
| 420 | if (ap && (!(ap->flags & ATA_FLAG_PORT_DISABLED))) { | 421 | if (ap && |
| 422 | !(ap->flags & (ATA_FLAG_PORT_DISABLED | ATA_FLAG_NOINTR))) { | ||
| 421 | struct ata_queued_cmd *qc; | 423 | struct ata_queued_cmd *qc; |
| 422 | struct qs_port_priv *pp = ap->private_data; | 424 | struct qs_port_priv *pp = ap->private_data; |
| 423 | if (!pp || pp->state != qs_state_mmio) | 425 | if (!pp || pp->state != qs_state_mmio) |
| @@ -431,7 +433,7 @@ static inline unsigned int qs_intr_mmio(struct ata_host_set *host_set) | |||
| 431 | continue; | 433 | continue; |
| 432 | DPRINTK("ata%u: protocol %d (dev_stat 0x%X)\n", | 434 | DPRINTK("ata%u: protocol %d (dev_stat 0x%X)\n", |
| 433 | ap->id, qc->tf.protocol, status); | 435 | ap->id, qc->tf.protocol, status); |
| 434 | 436 | ||
| 435 | /* complete taskfile transaction */ | 437 | /* complete taskfile transaction */ |
| 436 | pp->state = qs_state_idle; | 438 | pp->state = qs_state_idle; |
| 437 | ata_qc_complete(qc, status); | 439 | ata_qc_complete(qc, status); |
diff --git a/drivers/scsi/sata_sil.c b/drivers/scsi/sata_sil.c index 49ed557a4b66..e6902645f397 100644 --- a/drivers/scsi/sata_sil.c +++ b/drivers/scsi/sata_sil.c | |||
| @@ -41,8 +41,11 @@ | |||
| 41 | #define DRV_VERSION "0.9" | 41 | #define DRV_VERSION "0.9" |
| 42 | 42 | ||
| 43 | enum { | 43 | enum { |
| 44 | SIL_FLAG_MOD15WRITE = (1 << 30), | ||
| 45 | |||
| 44 | sil_3112 = 0, | 46 | sil_3112 = 0, |
| 45 | sil_3114 = 1, | 47 | sil_3112_m15w = 1, |
| 48 | sil_3114 = 2, | ||
| 46 | 49 | ||
| 47 | SIL_FIFO_R0 = 0x40, | 50 | SIL_FIFO_R0 = 0x40, |
| 48 | SIL_FIFO_W0 = 0x41, | 51 | SIL_FIFO_W0 = 0x41, |
| @@ -76,13 +79,13 @@ static void sil_scr_write (struct ata_port *ap, unsigned int sc_reg, u32 val); | |||
| 76 | static void sil_post_set_mode (struct ata_port *ap); | 79 | static void sil_post_set_mode (struct ata_port *ap); |
| 77 | 80 | ||
| 78 | static struct pci_device_id sil_pci_tbl[] = { | 81 | static struct pci_device_id sil_pci_tbl[] = { |
| 79 | { 0x1095, 0x3112, PCI_ANY_ID, PCI_ANY_ID, 0, 0, sil_3112 }, | 82 | { 0x1095, 0x3112, PCI_ANY_ID, PCI_ANY_ID, 0, 0, sil_3112_m15w }, |
| 80 | { 0x1095, 0x0240, PCI_ANY_ID, PCI_ANY_ID, 0, 0, sil_3112 }, | 83 | { 0x1095, 0x0240, PCI_ANY_ID, PCI_ANY_ID, 0, 0, sil_3112_m15w }, |
| 81 | { 0x1095, 0x3512, PCI_ANY_ID, PCI_ANY_ID, 0, 0, sil_3112 }, | 84 | { 0x1095, 0x3512, PCI_ANY_ID, PCI_ANY_ID, 0, 0, sil_3112 }, |
| 82 | { 0x1095, 0x3114, PCI_ANY_ID, PCI_ANY_ID, 0, 0, sil_3114 }, | 85 | { 0x1095, 0x3114, PCI_ANY_ID, PCI_ANY_ID, 0, 0, sil_3114 }, |
| 83 | { 0x1002, 0x436e, PCI_ANY_ID, PCI_ANY_ID, 0, 0, sil_3112 }, | 86 | { 0x1002, 0x436e, PCI_ANY_ID, PCI_ANY_ID, 0, 0, sil_3112_m15w }, |
| 84 | { 0x1002, 0x4379, PCI_ANY_ID, PCI_ANY_ID, 0, 0, sil_3112 }, | 87 | { 0x1002, 0x4379, PCI_ANY_ID, PCI_ANY_ID, 0, 0, sil_3112_m15w }, |
| 85 | { 0x1002, 0x437a, PCI_ANY_ID, PCI_ANY_ID, 0, 0, sil_3112 }, | 88 | { 0x1002, 0x437a, PCI_ANY_ID, PCI_ANY_ID, 0, 0, sil_3112_m15w }, |
| 86 | { } /* terminate list */ | 89 | { } /* terminate list */ |
| 87 | }; | 90 | }; |
| 88 | 91 | ||
| @@ -174,6 +177,16 @@ static struct ata_port_info sil_port_info[] = { | |||
| 174 | .mwdma_mask = 0x07, /* mwdma0-2 */ | 177 | .mwdma_mask = 0x07, /* mwdma0-2 */ |
| 175 | .udma_mask = 0x3f, /* udma0-5 */ | 178 | .udma_mask = 0x3f, /* udma0-5 */ |
| 176 | .port_ops = &sil_ops, | 179 | .port_ops = &sil_ops, |
| 180 | }, /* sil_3112_15w - keep it sync'd w/ sil_3112 */ | ||
| 181 | { | ||
| 182 | .sht = &sil_sht, | ||
| 183 | .host_flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY | | ||
| 184 | ATA_FLAG_SRST | ATA_FLAG_MMIO | | ||
| 185 | SIL_FLAG_MOD15WRITE, | ||
| 186 | .pio_mask = 0x1f, /* pio0-4 */ | ||
| 187 | .mwdma_mask = 0x07, /* mwdma0-2 */ | ||
| 188 | .udma_mask = 0x3f, /* udma0-5 */ | ||
| 189 | .port_ops = &sil_ops, | ||
| 177 | }, /* sil_3114 */ | 190 | }, /* sil_3114 */ |
| 178 | { | 191 | { |
| 179 | .sht = &sil_sht, | 192 | .sht = &sil_sht, |
| @@ -323,15 +336,15 @@ static void sil_dev_config(struct ata_port *ap, struct ata_device *dev) | |||
| 323 | while ((len > 0) && (s[len - 1] == ' ')) | 336 | while ((len > 0) && (s[len - 1] == ' ')) |
| 324 | len--; | 337 | len--; |
| 325 | 338 | ||
| 326 | for (n = 0; sil_blacklist[n].product; n++) | 339 | for (n = 0; sil_blacklist[n].product; n++) |
| 327 | if (!memcmp(sil_blacklist[n].product, s, | 340 | if (!memcmp(sil_blacklist[n].product, s, |
| 328 | strlen(sil_blacklist[n].product))) { | 341 | strlen(sil_blacklist[n].product))) { |
| 329 | quirks = sil_blacklist[n].quirk; | 342 | quirks = sil_blacklist[n].quirk; |
| 330 | break; | 343 | break; |
| 331 | } | 344 | } |
| 332 | 345 | ||
| 333 | /* limit requests to 15 sectors */ | 346 | /* limit requests to 15 sectors */ |
| 334 | if (quirks & SIL_QUIRK_MOD15WRITE) { | 347 | if ((ap->flags & SIL_FLAG_MOD15WRITE) && (quirks & SIL_QUIRK_MOD15WRITE)) { |
| 335 | printk(KERN_INFO "ata%u(%u): applying Seagate errata fix\n", | 348 | printk(KERN_INFO "ata%u(%u): applying Seagate errata fix\n", |
| 336 | ap->id, dev->devno); | 349 | ap->id, dev->devno); |
| 337 | ap->host->max_sectors = 15; | 350 | ap->host->max_sectors = 15; |
diff --git a/drivers/scsi/sata_sis.c b/drivers/scsi/sata_sis.c index e418b89c6b9d..b250ae0c7773 100644 --- a/drivers/scsi/sata_sis.c +++ b/drivers/scsi/sata_sis.c | |||
| @@ -234,7 +234,7 @@ static int sis_init_one (struct pci_dev *pdev, const struct pci_device_id *ent) | |||
| 234 | pci_read_config_dword(pdev, SIS_GENCTL, &genctl); | 234 | pci_read_config_dword(pdev, SIS_GENCTL, &genctl); |
| 235 | if ((genctl & GENCTL_IOMAPPED_SCR) == 0) | 235 | if ((genctl & GENCTL_IOMAPPED_SCR) == 0) |
| 236 | probe_ent->host_flags |= SIS_FLAG_CFGSCR; | 236 | probe_ent->host_flags |= SIS_FLAG_CFGSCR; |
| 237 | 237 | ||
| 238 | /* if hardware thinks SCRs are in IO space, but there are | 238 | /* if hardware thinks SCRs are in IO space, but there are |
| 239 | * no IO resources assigned, change to PCI cfg space. | 239 | * no IO resources assigned, change to PCI cfg space. |
| 240 | */ | 240 | */ |
diff --git a/drivers/scsi/sata_svw.c b/drivers/scsi/sata_svw.c index 858e07185dbd..6fd2ce1ffcd8 100644 --- a/drivers/scsi/sata_svw.c +++ b/drivers/scsi/sata_svw.c | |||
| @@ -195,18 +195,18 @@ static void k2_bmdma_start_mmio (struct ata_queued_cmd *qc) | |||
| 195 | /* start host DMA transaction */ | 195 | /* start host DMA transaction */ |
| 196 | dmactl = readb(mmio + ATA_DMA_CMD); | 196 | dmactl = readb(mmio + ATA_DMA_CMD); |
| 197 | writeb(dmactl | ATA_DMA_START, mmio + ATA_DMA_CMD); | 197 | writeb(dmactl | ATA_DMA_START, mmio + ATA_DMA_CMD); |
| 198 | /* There is a race condition in certain SATA controllers that can | 198 | /* There is a race condition in certain SATA controllers that can |
| 199 | be seen when the r/w command is given to the controller before the | 199 | be seen when the r/w command is given to the controller before the |
| 200 | host DMA is started. On a Read command, the controller would initiate | 200 | host DMA is started. On a Read command, the controller would initiate |
| 201 | the command to the drive even before it sees the DMA start. When there | 201 | the command to the drive even before it sees the DMA start. When there |
| 202 | are very fast drives connected to the controller, or when the data request | 202 | are very fast drives connected to the controller, or when the data request |
| 203 | hits in the drive cache, there is the possibility that the drive returns a part | 203 | hits in the drive cache, there is the possibility that the drive returns a part |
| 204 | or all of the requested data to the controller before the DMA start is issued. | 204 | or all of the requested data to the controller before the DMA start is issued. |
| 205 | In this case, the controller would become confused as to what to do with the data. | 205 | In this case, the controller would become confused as to what to do with the data. |
| 206 | In the worst case when all the data is returned back to the controller, the | 206 | In the worst case when all the data is returned back to the controller, the |
| 207 | controller could hang. In other cases it could return partial data returning | 207 | controller could hang. In other cases it could return partial data returning |
| 208 | in data corruption. This problem has been seen in PPC systems and can also appear | 208 | in data corruption. This problem has been seen in PPC systems and can also appear |
| 209 | on an system with very fast disks, where the SATA controller is sitting behind a | 209 | on an system with very fast disks, where the SATA controller is sitting behind a |
| 210 | number of bridges, and hence there is significant latency between the r/w command | 210 | number of bridges, and hence there is significant latency between the r/w command |
| 211 | and the start command. */ | 211 | and the start command. */ |
| 212 | /* issue r/w command if the access is to ATA*/ | 212 | /* issue r/w command if the access is to ATA*/ |
| @@ -214,7 +214,7 @@ static void k2_bmdma_start_mmio (struct ata_queued_cmd *qc) | |||
| 214 | ap->ops->exec_command(ap, &qc->tf); | 214 | ap->ops->exec_command(ap, &qc->tf); |
| 215 | } | 215 | } |
| 216 | 216 | ||
| 217 | 217 | ||
| 218 | static u8 k2_stat_check_status(struct ata_port *ap) | 218 | static u8 k2_stat_check_status(struct ata_port *ap) |
| 219 | { | 219 | { |
| 220 | return readl((void *) ap->ioaddr.status_addr); | 220 | return readl((void *) ap->ioaddr.status_addr); |
diff --git a/drivers/scsi/sata_sx4.c b/drivers/scsi/sata_sx4.c index efd7d7a61135..e2db499f22dd 100644 --- a/drivers/scsi/sata_sx4.c +++ b/drivers/scsi/sata_sx4.c | |||
| @@ -94,7 +94,7 @@ enum { | |||
| 94 | PDC_DIMM1_CONTROL_OFFSET = 0x84, | 94 | PDC_DIMM1_CONTROL_OFFSET = 0x84, |
| 95 | PDC_SDRAM_CONTROL_OFFSET = 0x88, | 95 | PDC_SDRAM_CONTROL_OFFSET = 0x88, |
| 96 | PDC_I2C_WRITE = 0x00000000, | 96 | PDC_I2C_WRITE = 0x00000000, |
| 97 | PDC_I2C_READ = 0x00000040, | 97 | PDC_I2C_READ = 0x00000040, |
| 98 | PDC_I2C_START = 0x00000080, | 98 | PDC_I2C_START = 0x00000080, |
| 99 | PDC_I2C_MASK_INT = 0x00000020, | 99 | PDC_I2C_MASK_INT = 0x00000020, |
| 100 | PDC_I2C_COMPLETE = 0x00010000, | 100 | PDC_I2C_COMPLETE = 0x00010000, |
| @@ -105,16 +105,16 @@ enum { | |||
| 105 | PDC_DIMM_SPD_COLUMN_NUM = 4, | 105 | PDC_DIMM_SPD_COLUMN_NUM = 4, |
| 106 | PDC_DIMM_SPD_MODULE_ROW = 5, | 106 | PDC_DIMM_SPD_MODULE_ROW = 5, |
| 107 | PDC_DIMM_SPD_TYPE = 11, | 107 | PDC_DIMM_SPD_TYPE = 11, |
| 108 | PDC_DIMM_SPD_FRESH_RATE = 12, | 108 | PDC_DIMM_SPD_FRESH_RATE = 12, |
| 109 | PDC_DIMM_SPD_BANK_NUM = 17, | 109 | PDC_DIMM_SPD_BANK_NUM = 17, |
| 110 | PDC_DIMM_SPD_CAS_LATENCY = 18, | 110 | PDC_DIMM_SPD_CAS_LATENCY = 18, |
| 111 | PDC_DIMM_SPD_ATTRIBUTE = 21, | 111 | PDC_DIMM_SPD_ATTRIBUTE = 21, |
| 112 | PDC_DIMM_SPD_ROW_PRE_CHARGE = 27, | 112 | PDC_DIMM_SPD_ROW_PRE_CHARGE = 27, |
| 113 | PDC_DIMM_SPD_ROW_ACTIVE_DELAY = 28, | 113 | PDC_DIMM_SPD_ROW_ACTIVE_DELAY = 28, |
| 114 | PDC_DIMM_SPD_RAS_CAS_DELAY = 29, | 114 | PDC_DIMM_SPD_RAS_CAS_DELAY = 29, |
| 115 | PDC_DIMM_SPD_ACTIVE_PRECHARGE = 30, | 115 | PDC_DIMM_SPD_ACTIVE_PRECHARGE = 30, |
| 116 | PDC_DIMM_SPD_SYSTEM_FREQ = 126, | 116 | PDC_DIMM_SPD_SYSTEM_FREQ = 126, |
| 117 | PDC_CTL_STATUS = 0x08, | 117 | PDC_CTL_STATUS = 0x08, |
| 118 | PDC_DIMM_WINDOW_CTLR = 0x0C, | 118 | PDC_DIMM_WINDOW_CTLR = 0x0C, |
| 119 | PDC_TIME_CONTROL = 0x3C, | 119 | PDC_TIME_CONTROL = 0x3C, |
| 120 | PDC_TIME_PERIOD = 0x40, | 120 | PDC_TIME_PERIOD = 0x40, |
| @@ -157,15 +157,15 @@ static void pdc_exec_command_mmio(struct ata_port *ap, struct ata_taskfile *tf); | |||
| 157 | static void pdc20621_host_stop(struct ata_host_set *host_set); | 157 | static void pdc20621_host_stop(struct ata_host_set *host_set); |
| 158 | static unsigned int pdc20621_dimm_init(struct ata_probe_ent *pe); | 158 | static unsigned int pdc20621_dimm_init(struct ata_probe_ent *pe); |
| 159 | static int pdc20621_detect_dimm(struct ata_probe_ent *pe); | 159 | static int pdc20621_detect_dimm(struct ata_probe_ent *pe); |
| 160 | static unsigned int pdc20621_i2c_read(struct ata_probe_ent *pe, | 160 | static unsigned int pdc20621_i2c_read(struct ata_probe_ent *pe, |
| 161 | u32 device, u32 subaddr, u32 *pdata); | 161 | u32 device, u32 subaddr, u32 *pdata); |
| 162 | static int pdc20621_prog_dimm0(struct ata_probe_ent *pe); | 162 | static int pdc20621_prog_dimm0(struct ata_probe_ent *pe); |
| 163 | static unsigned int pdc20621_prog_dimm_global(struct ata_probe_ent *pe); | 163 | static unsigned int pdc20621_prog_dimm_global(struct ata_probe_ent *pe); |
| 164 | #ifdef ATA_VERBOSE_DEBUG | 164 | #ifdef ATA_VERBOSE_DEBUG |
| 165 | static void pdc20621_get_from_dimm(struct ata_probe_ent *pe, | 165 | static void pdc20621_get_from_dimm(struct ata_probe_ent *pe, |
| 166 | void *psource, u32 offset, u32 size); | 166 | void *psource, u32 offset, u32 size); |
| 167 | #endif | 167 | #endif |
| 168 | static void pdc20621_put_to_dimm(struct ata_probe_ent *pe, | 168 | static void pdc20621_put_to_dimm(struct ata_probe_ent *pe, |
| 169 | void *psource, u32 offset, u32 size); | 169 | void *psource, u32 offset, u32 size); |
| 170 | static void pdc20621_irq_clear(struct ata_port *ap); | 170 | static void pdc20621_irq_clear(struct ata_port *ap); |
| 171 | static int pdc20621_qc_issue_prot(struct ata_queued_cmd *qc); | 171 | static int pdc20621_qc_issue_prot(struct ata_queued_cmd *qc); |
| @@ -825,7 +825,8 @@ static irqreturn_t pdc20621_interrupt (int irq, void *dev_instance, struct pt_re | |||
| 825 | ap = host_set->ports[port_no]; | 825 | ap = host_set->ports[port_no]; |
| 826 | tmp = mask & (1 << i); | 826 | tmp = mask & (1 << i); |
| 827 | VPRINTK("seq %u, port_no %u, ap %p, tmp %x\n", i, port_no, ap, tmp); | 827 | VPRINTK("seq %u, port_no %u, ap %p, tmp %x\n", i, port_no, ap, tmp); |
| 828 | if (tmp && ap && (!(ap->flags & ATA_FLAG_PORT_DISABLED))) { | 828 | if (tmp && ap && |
| 829 | !(ap->flags & (ATA_FLAG_PORT_DISABLED | ATA_FLAG_NOINTR))) { | ||
| 829 | struct ata_queued_cmd *qc; | 830 | struct ata_queued_cmd *qc; |
| 830 | 831 | ||
| 831 | qc = ata_qc_from_tag(ap, ap->active_tag); | 832 | qc = ata_qc_from_tag(ap, ap->active_tag); |
| @@ -922,7 +923,7 @@ static void pdc_sata_setup_port(struct ata_ioports *port, unsigned long base) | |||
| 922 | 923 | ||
| 923 | 924 | ||
| 924 | #ifdef ATA_VERBOSE_DEBUG | 925 | #ifdef ATA_VERBOSE_DEBUG |
| 925 | static void pdc20621_get_from_dimm(struct ata_probe_ent *pe, void *psource, | 926 | static void pdc20621_get_from_dimm(struct ata_probe_ent *pe, void *psource, |
| 926 | u32 offset, u32 size) | 927 | u32 offset, u32 size) |
| 927 | { | 928 | { |
| 928 | u32 window_size; | 929 | u32 window_size; |
| @@ -936,9 +937,9 @@ static void pdc20621_get_from_dimm(struct ata_probe_ent *pe, void *psource, | |||
| 936 | /* hard-code chip #0 */ | 937 | /* hard-code chip #0 */ |
| 937 | mmio += PDC_CHIP0_OFS; | 938 | mmio += PDC_CHIP0_OFS; |
| 938 | 939 | ||
| 939 | page_mask = 0x00; | 940 | page_mask = 0x00; |
| 940 | window_size = 0x2000 * 4; /* 32K byte uchar size */ | 941 | window_size = 0x2000 * 4; /* 32K byte uchar size */ |
| 941 | idx = (u16) (offset / window_size); | 942 | idx = (u16) (offset / window_size); |
| 942 | 943 | ||
| 943 | writel(0x01, mmio + PDC_GENERAL_CTLR); | 944 | writel(0x01, mmio + PDC_GENERAL_CTLR); |
| 944 | readl(mmio + PDC_GENERAL_CTLR); | 945 | readl(mmio + PDC_GENERAL_CTLR); |
| @@ -947,19 +948,19 @@ static void pdc20621_get_from_dimm(struct ata_probe_ent *pe, void *psource, | |||
| 947 | 948 | ||
| 948 | offset -= (idx * window_size); | 949 | offset -= (idx * window_size); |
| 949 | idx++; | 950 | idx++; |
| 950 | dist = ((long) (window_size - (offset + size))) >= 0 ? size : | 951 | dist = ((long) (window_size - (offset + size))) >= 0 ? size : |
| 951 | (long) (window_size - offset); | 952 | (long) (window_size - offset); |
| 952 | memcpy_fromio((char *) psource, (char *) (dimm_mmio + offset / 4), | 953 | memcpy_fromio((char *) psource, (char *) (dimm_mmio + offset / 4), |
| 953 | dist); | 954 | dist); |
| 954 | 955 | ||
| 955 | psource += dist; | 956 | psource += dist; |
| 956 | size -= dist; | 957 | size -= dist; |
| 957 | for (; (long) size >= (long) window_size ;) { | 958 | for (; (long) size >= (long) window_size ;) { |
| 958 | writel(0x01, mmio + PDC_GENERAL_CTLR); | 959 | writel(0x01, mmio + PDC_GENERAL_CTLR); |
| 959 | readl(mmio + PDC_GENERAL_CTLR); | 960 | readl(mmio + PDC_GENERAL_CTLR); |
| 960 | writel(((idx) << page_mask), mmio + PDC_DIMM_WINDOW_CTLR); | 961 | writel(((idx) << page_mask), mmio + PDC_DIMM_WINDOW_CTLR); |
| 961 | readl(mmio + PDC_DIMM_WINDOW_CTLR); | 962 | readl(mmio + PDC_DIMM_WINDOW_CTLR); |
| 962 | memcpy_fromio((char *) psource, (char *) (dimm_mmio), | 963 | memcpy_fromio((char *) psource, (char *) (dimm_mmio), |
| 963 | window_size / 4); | 964 | window_size / 4); |
| 964 | psource += window_size; | 965 | psource += window_size; |
| 965 | size -= window_size; | 966 | size -= window_size; |
| @@ -971,14 +972,14 @@ static void pdc20621_get_from_dimm(struct ata_probe_ent *pe, void *psource, | |||
| 971 | readl(mmio + PDC_GENERAL_CTLR); | 972 | readl(mmio + PDC_GENERAL_CTLR); |
| 972 | writel(((idx) << page_mask), mmio + PDC_DIMM_WINDOW_CTLR); | 973 | writel(((idx) << page_mask), mmio + PDC_DIMM_WINDOW_CTLR); |
| 973 | readl(mmio + PDC_DIMM_WINDOW_CTLR); | 974 | readl(mmio + PDC_DIMM_WINDOW_CTLR); |
| 974 | memcpy_fromio((char *) psource, (char *) (dimm_mmio), | 975 | memcpy_fromio((char *) psource, (char *) (dimm_mmio), |
| 975 | size / 4); | 976 | size / 4); |
| 976 | } | 977 | } |
| 977 | } | 978 | } |
| 978 | #endif | 979 | #endif |
| 979 | 980 | ||
| 980 | 981 | ||
| 981 | static void pdc20621_put_to_dimm(struct ata_probe_ent *pe, void *psource, | 982 | static void pdc20621_put_to_dimm(struct ata_probe_ent *pe, void *psource, |
| 982 | u32 offset, u32 size) | 983 | u32 offset, u32 size) |
| 983 | { | 984 | { |
| 984 | u32 window_size; | 985 | u32 window_size; |
| @@ -989,16 +990,16 @@ static void pdc20621_put_to_dimm(struct ata_probe_ent *pe, void *psource, | |||
| 989 | struct pdc_host_priv *hpriv = pe->private_data; | 990 | struct pdc_host_priv *hpriv = pe->private_data; |
| 990 | void *dimm_mmio = hpriv->dimm_mmio; | 991 | void *dimm_mmio = hpriv->dimm_mmio; |
| 991 | 992 | ||
| 992 | /* hard-code chip #0 */ | 993 | /* hard-code chip #0 */ |
| 993 | mmio += PDC_CHIP0_OFS; | 994 | mmio += PDC_CHIP0_OFS; |
| 994 | 995 | ||
| 995 | page_mask = 0x00; | 996 | page_mask = 0x00; |
| 996 | window_size = 0x2000 * 4; /* 32K byte uchar size */ | 997 | window_size = 0x2000 * 4; /* 32K byte uchar size */ |
| 997 | idx = (u16) (offset / window_size); | 998 | idx = (u16) (offset / window_size); |
| 998 | 999 | ||
| 999 | writel(((idx) << page_mask), mmio + PDC_DIMM_WINDOW_CTLR); | 1000 | writel(((idx) << page_mask), mmio + PDC_DIMM_WINDOW_CTLR); |
| 1000 | readl(mmio + PDC_DIMM_WINDOW_CTLR); | 1001 | readl(mmio + PDC_DIMM_WINDOW_CTLR); |
| 1001 | offset -= (idx * window_size); | 1002 | offset -= (idx * window_size); |
| 1002 | idx++; | 1003 | idx++; |
| 1003 | dist = ((long)(s32)(window_size - (offset + size))) >= 0 ? size : | 1004 | dist = ((long)(s32)(window_size - (offset + size))) >= 0 ? size : |
| 1004 | (long) (window_size - offset); | 1005 | (long) (window_size - offset); |
| @@ -1006,12 +1007,12 @@ static void pdc20621_put_to_dimm(struct ata_probe_ent *pe, void *psource, | |||
| 1006 | writel(0x01, mmio + PDC_GENERAL_CTLR); | 1007 | writel(0x01, mmio + PDC_GENERAL_CTLR); |
| 1007 | readl(mmio + PDC_GENERAL_CTLR); | 1008 | readl(mmio + PDC_GENERAL_CTLR); |
| 1008 | 1009 | ||
| 1009 | psource += dist; | 1010 | psource += dist; |
| 1010 | size -= dist; | 1011 | size -= dist; |
| 1011 | for (; (long) size >= (long) window_size ;) { | 1012 | for (; (long) size >= (long) window_size ;) { |
| 1012 | writel(((idx) << page_mask), mmio + PDC_DIMM_WINDOW_CTLR); | 1013 | writel(((idx) << page_mask), mmio + PDC_DIMM_WINDOW_CTLR); |
| 1013 | readl(mmio + PDC_DIMM_WINDOW_CTLR); | 1014 | readl(mmio + PDC_DIMM_WINDOW_CTLR); |
| 1014 | memcpy_toio((char *) (dimm_mmio), (char *) psource, | 1015 | memcpy_toio((char *) (dimm_mmio), (char *) psource, |
| 1015 | window_size / 4); | 1016 | window_size / 4); |
| 1016 | writel(0x01, mmio + PDC_GENERAL_CTLR); | 1017 | writel(0x01, mmio + PDC_GENERAL_CTLR); |
| 1017 | readl(mmio + PDC_GENERAL_CTLR); | 1018 | readl(mmio + PDC_GENERAL_CTLR); |
| @@ -1019,7 +1020,7 @@ static void pdc20621_put_to_dimm(struct ata_probe_ent *pe, void *psource, | |||
| 1019 | size -= window_size; | 1020 | size -= window_size; |
| 1020 | idx ++; | 1021 | idx ++; |
| 1021 | } | 1022 | } |
| 1022 | 1023 | ||
| 1023 | if (size) { | 1024 | if (size) { |
| 1024 | writel(((idx) << page_mask), mmio + PDC_DIMM_WINDOW_CTLR); | 1025 | writel(((idx) << page_mask), mmio + PDC_DIMM_WINDOW_CTLR); |
| 1025 | readl(mmio + PDC_DIMM_WINDOW_CTLR); | 1026 | readl(mmio + PDC_DIMM_WINDOW_CTLR); |
| @@ -1030,12 +1031,12 @@ static void pdc20621_put_to_dimm(struct ata_probe_ent *pe, void *psource, | |||
| 1030 | } | 1031 | } |
| 1031 | 1032 | ||
| 1032 | 1033 | ||
| 1033 | static unsigned int pdc20621_i2c_read(struct ata_probe_ent *pe, u32 device, | 1034 | static unsigned int pdc20621_i2c_read(struct ata_probe_ent *pe, u32 device, |
| 1034 | u32 subaddr, u32 *pdata) | 1035 | u32 subaddr, u32 *pdata) |
| 1035 | { | 1036 | { |
| 1036 | void *mmio = pe->mmio_base; | 1037 | void *mmio = pe->mmio_base; |
| 1037 | u32 i2creg = 0; | 1038 | u32 i2creg = 0; |
| 1038 | u32 status; | 1039 | u32 status; |
| 1039 | u32 count =0; | 1040 | u32 count =0; |
| 1040 | 1041 | ||
| 1041 | /* hard-code chip #0 */ | 1042 | /* hard-code chip #0 */ |
| @@ -1049,7 +1050,7 @@ static unsigned int pdc20621_i2c_read(struct ata_probe_ent *pe, u32 device, | |||
| 1049 | readl(mmio + PDC_I2C_ADDR_DATA_OFFSET); | 1050 | readl(mmio + PDC_I2C_ADDR_DATA_OFFSET); |
| 1050 | 1051 | ||
| 1051 | /* Write Control to perform read operation, mask int */ | 1052 | /* Write Control to perform read operation, mask int */ |
| 1052 | writel(PDC_I2C_READ | PDC_I2C_START | PDC_I2C_MASK_INT, | 1053 | writel(PDC_I2C_READ | PDC_I2C_START | PDC_I2C_MASK_INT, |
| 1053 | mmio + PDC_I2C_CONTROL_OFFSET); | 1054 | mmio + PDC_I2C_CONTROL_OFFSET); |
| 1054 | 1055 | ||
| 1055 | for (count = 0; count <= 1000; count ++) { | 1056 | for (count = 0; count <= 1000; count ++) { |
| @@ -1062,26 +1063,26 @@ static unsigned int pdc20621_i2c_read(struct ata_probe_ent *pe, u32 device, | |||
| 1062 | } | 1063 | } |
| 1063 | 1064 | ||
| 1064 | *pdata = (status >> 8) & 0x000000ff; | 1065 | *pdata = (status >> 8) & 0x000000ff; |
| 1065 | return 1; | 1066 | return 1; |
| 1066 | } | 1067 | } |
| 1067 | 1068 | ||
| 1068 | 1069 | ||
| 1069 | static int pdc20621_detect_dimm(struct ata_probe_ent *pe) | 1070 | static int pdc20621_detect_dimm(struct ata_probe_ent *pe) |
| 1070 | { | 1071 | { |
| 1071 | u32 data=0 ; | 1072 | u32 data=0 ; |
| 1072 | if (pdc20621_i2c_read(pe, PDC_DIMM0_SPD_DEV_ADDRESS, | 1073 | if (pdc20621_i2c_read(pe, PDC_DIMM0_SPD_DEV_ADDRESS, |
| 1073 | PDC_DIMM_SPD_SYSTEM_FREQ, &data)) { | 1074 | PDC_DIMM_SPD_SYSTEM_FREQ, &data)) { |
| 1074 | if (data == 100) | 1075 | if (data == 100) |
| 1075 | return 100; | 1076 | return 100; |
| 1076 | } else | 1077 | } else |
| 1077 | return 0; | 1078 | return 0; |
| 1078 | 1079 | ||
| 1079 | if (pdc20621_i2c_read(pe, PDC_DIMM0_SPD_DEV_ADDRESS, 9, &data)) { | 1080 | if (pdc20621_i2c_read(pe, PDC_DIMM0_SPD_DEV_ADDRESS, 9, &data)) { |
| 1080 | if(data <= 0x75) | 1081 | if(data <= 0x75) |
| 1081 | return 133; | 1082 | return 133; |
| 1082 | } else | 1083 | } else |
| 1083 | return 0; | 1084 | return 0; |
| 1084 | 1085 | ||
| 1085 | return 0; | 1086 | return 0; |
| 1086 | } | 1087 | } |
| 1087 | 1088 | ||
| @@ -1091,15 +1092,15 @@ static int pdc20621_prog_dimm0(struct ata_probe_ent *pe) | |||
| 1091 | u32 spd0[50]; | 1092 | u32 spd0[50]; |
| 1092 | u32 data = 0; | 1093 | u32 data = 0; |
| 1093 | int size, i; | 1094 | int size, i; |
| 1094 | u8 bdimmsize; | 1095 | u8 bdimmsize; |
| 1095 | void *mmio = pe->mmio_base; | 1096 | void *mmio = pe->mmio_base; |
| 1096 | static const struct { | 1097 | static const struct { |
| 1097 | unsigned int reg; | 1098 | unsigned int reg; |
| 1098 | unsigned int ofs; | 1099 | unsigned int ofs; |
| 1099 | } pdc_i2c_read_data [] = { | 1100 | } pdc_i2c_read_data [] = { |
| 1100 | { PDC_DIMM_SPD_TYPE, 11 }, | 1101 | { PDC_DIMM_SPD_TYPE, 11 }, |
| 1101 | { PDC_DIMM_SPD_FRESH_RATE, 12 }, | 1102 | { PDC_DIMM_SPD_FRESH_RATE, 12 }, |
| 1102 | { PDC_DIMM_SPD_COLUMN_NUM, 4 }, | 1103 | { PDC_DIMM_SPD_COLUMN_NUM, 4 }, |
| 1103 | { PDC_DIMM_SPD_ATTRIBUTE, 21 }, | 1104 | { PDC_DIMM_SPD_ATTRIBUTE, 21 }, |
| 1104 | { PDC_DIMM_SPD_ROW_NUM, 3 }, | 1105 | { PDC_DIMM_SPD_ROW_NUM, 3 }, |
| 1105 | { PDC_DIMM_SPD_BANK_NUM, 17 }, | 1106 | { PDC_DIMM_SPD_BANK_NUM, 17 }, |
| @@ -1108,7 +1109,7 @@ static int pdc20621_prog_dimm0(struct ata_probe_ent *pe) | |||
| 1108 | { PDC_DIMM_SPD_ROW_ACTIVE_DELAY, 28 }, | 1109 | { PDC_DIMM_SPD_ROW_ACTIVE_DELAY, 28 }, |
| 1109 | { PDC_DIMM_SPD_RAS_CAS_DELAY, 29 }, | 1110 | { PDC_DIMM_SPD_RAS_CAS_DELAY, 29 }, |
| 1110 | { PDC_DIMM_SPD_ACTIVE_PRECHARGE, 30 }, | 1111 | { PDC_DIMM_SPD_ACTIVE_PRECHARGE, 30 }, |
| 1111 | { PDC_DIMM_SPD_CAS_LATENCY, 18 }, | 1112 | { PDC_DIMM_SPD_CAS_LATENCY, 18 }, |
| 1112 | }; | 1113 | }; |
| 1113 | 1114 | ||
| 1114 | /* hard-code chip #0 */ | 1115 | /* hard-code chip #0 */ |
| @@ -1116,17 +1117,17 @@ static int pdc20621_prog_dimm0(struct ata_probe_ent *pe) | |||
| 1116 | 1117 | ||
| 1117 | for(i=0; i<ARRAY_SIZE(pdc_i2c_read_data); i++) | 1118 | for(i=0; i<ARRAY_SIZE(pdc_i2c_read_data); i++) |
| 1118 | pdc20621_i2c_read(pe, PDC_DIMM0_SPD_DEV_ADDRESS, | 1119 | pdc20621_i2c_read(pe, PDC_DIMM0_SPD_DEV_ADDRESS, |
| 1119 | pdc_i2c_read_data[i].reg, | 1120 | pdc_i2c_read_data[i].reg, |
| 1120 | &spd0[pdc_i2c_read_data[i].ofs]); | 1121 | &spd0[pdc_i2c_read_data[i].ofs]); |
| 1121 | 1122 | ||
| 1122 | data |= (spd0[4] - 8) | ((spd0[21] != 0) << 3) | ((spd0[3]-11) << 4); | 1123 | data |= (spd0[4] - 8) | ((spd0[21] != 0) << 3) | ((spd0[3]-11) << 4); |
| 1123 | data |= ((spd0[17] / 4) << 6) | ((spd0[5] / 2) << 7) | | 1124 | data |= ((spd0[17] / 4) << 6) | ((spd0[5] / 2) << 7) | |
| 1124 | ((((spd0[27] + 9) / 10) - 1) << 8) ; | 1125 | ((((spd0[27] + 9) / 10) - 1) << 8) ; |
| 1125 | data |= (((((spd0[29] > spd0[28]) | 1126 | data |= (((((spd0[29] > spd0[28]) |
| 1126 | ? spd0[29] : spd0[28]) + 9) / 10) - 1) << 10; | 1127 | ? spd0[29] : spd0[28]) + 9) / 10) - 1) << 10; |
| 1127 | data |= ((spd0[30] - spd0[29] + 9) / 10 - 2) << 12; | 1128 | data |= ((spd0[30] - spd0[29] + 9) / 10 - 2) << 12; |
| 1128 | 1129 | ||
| 1129 | if (spd0[18] & 0x08) | 1130 | if (spd0[18] & 0x08) |
| 1130 | data |= ((0x03) << 14); | 1131 | data |= ((0x03) << 14); |
| 1131 | else if (spd0[18] & 0x04) | 1132 | else if (spd0[18] & 0x04) |
| 1132 | data |= ((0x02) << 14); | 1133 | data |= ((0x02) << 14); |
| @@ -1135,7 +1136,7 @@ static int pdc20621_prog_dimm0(struct ata_probe_ent *pe) | |||
| 1135 | else | 1136 | else |
| 1136 | data |= (0 << 14); | 1137 | data |= (0 << 14); |
| 1137 | 1138 | ||
| 1138 | /* | 1139 | /* |
| 1139 | Calculate the size of bDIMMSize (power of 2) and | 1140 | Calculate the size of bDIMMSize (power of 2) and |
| 1140 | merge the DIMM size by program start/end address. | 1141 | merge the DIMM size by program start/end address. |
| 1141 | */ | 1142 | */ |
| @@ -1145,9 +1146,9 @@ static int pdc20621_prog_dimm0(struct ata_probe_ent *pe) | |||
| 1145 | data |= (((size / 16) - 1) << 16); | 1146 | data |= (((size / 16) - 1) << 16); |
| 1146 | data |= (0 << 23); | 1147 | data |= (0 << 23); |
| 1147 | data |= 8; | 1148 | data |= 8; |
| 1148 | writel(data, mmio + PDC_DIMM0_CONTROL_OFFSET); | 1149 | writel(data, mmio + PDC_DIMM0_CONTROL_OFFSET); |
| 1149 | readl(mmio + PDC_DIMM0_CONTROL_OFFSET); | 1150 | readl(mmio + PDC_DIMM0_CONTROL_OFFSET); |
| 1150 | return size; | 1151 | return size; |
| 1151 | } | 1152 | } |
| 1152 | 1153 | ||
| 1153 | 1154 | ||
| @@ -1167,12 +1168,12 @@ static unsigned int pdc20621_prog_dimm_global(struct ata_probe_ent *pe) | |||
| 1167 | Refresh Enable (bit 17) | 1168 | Refresh Enable (bit 17) |
| 1168 | */ | 1169 | */ |
| 1169 | 1170 | ||
| 1170 | data = 0x022259F1; | 1171 | data = 0x022259F1; |
| 1171 | writel(data, mmio + PDC_SDRAM_CONTROL_OFFSET); | 1172 | writel(data, mmio + PDC_SDRAM_CONTROL_OFFSET); |
| 1172 | readl(mmio + PDC_SDRAM_CONTROL_OFFSET); | 1173 | readl(mmio + PDC_SDRAM_CONTROL_OFFSET); |
| 1173 | 1174 | ||
| 1174 | /* Turn on for ECC */ | 1175 | /* Turn on for ECC */ |
| 1175 | pdc20621_i2c_read(pe, PDC_DIMM0_SPD_DEV_ADDRESS, | 1176 | pdc20621_i2c_read(pe, PDC_DIMM0_SPD_DEV_ADDRESS, |
| 1176 | PDC_DIMM_SPD_TYPE, &spd0); | 1177 | PDC_DIMM_SPD_TYPE, &spd0); |
| 1177 | if (spd0 == 0x02) { | 1178 | if (spd0 == 0x02) { |
| 1178 | data |= (0x01 << 16); | 1179 | data |= (0x01 << 16); |
| @@ -1186,22 +1187,22 @@ static unsigned int pdc20621_prog_dimm_global(struct ata_probe_ent *pe) | |||
| 1186 | data |= (1<<19); | 1187 | data |= (1<<19); |
| 1187 | writel(data, mmio + PDC_SDRAM_CONTROL_OFFSET); | 1188 | writel(data, mmio + PDC_SDRAM_CONTROL_OFFSET); |
| 1188 | 1189 | ||
| 1189 | error = 1; | 1190 | error = 1; |
| 1190 | for (i = 1; i <= 10; i++) { /* polling ~5 secs */ | 1191 | for (i = 1; i <= 10; i++) { /* polling ~5 secs */ |
| 1191 | data = readl(mmio + PDC_SDRAM_CONTROL_OFFSET); | 1192 | data = readl(mmio + PDC_SDRAM_CONTROL_OFFSET); |
| 1192 | if (!(data & (1<<19))) { | 1193 | if (!(data & (1<<19))) { |
| 1193 | error = 0; | 1194 | error = 0; |
| 1194 | break; | 1195 | break; |
| 1195 | } | 1196 | } |
| 1196 | msleep(i*100); | 1197 | msleep(i*100); |
| 1197 | } | 1198 | } |
| 1198 | return error; | 1199 | return error; |
| 1199 | } | 1200 | } |
| 1200 | 1201 | ||
| 1201 | 1202 | ||
| 1202 | static unsigned int pdc20621_dimm_init(struct ata_probe_ent *pe) | 1203 | static unsigned int pdc20621_dimm_init(struct ata_probe_ent *pe) |
| 1203 | { | 1204 | { |
| 1204 | int speed, size, length; | 1205 | int speed, size, length; |
| 1205 | u32 addr,spd0,pci_status; | 1206 | u32 addr,spd0,pci_status; |
| 1206 | u32 tmp=0; | 1207 | u32 tmp=0; |
| 1207 | u32 time_period=0; | 1208 | u32 time_period=0; |
| @@ -1228,7 +1229,7 @@ static unsigned int pdc20621_dimm_init(struct ata_probe_ent *pe) | |||
| 1228 | /* Wait 3 seconds */ | 1229 | /* Wait 3 seconds */ |
| 1229 | msleep(3000); | 1230 | msleep(3000); |
| 1230 | 1231 | ||
| 1231 | /* | 1232 | /* |
| 1232 | When timer is enabled, counter is decreased every internal | 1233 | When timer is enabled, counter is decreased every internal |
| 1233 | clock cycle. | 1234 | clock cycle. |
| 1234 | */ | 1235 | */ |
| @@ -1236,24 +1237,24 @@ static unsigned int pdc20621_dimm_init(struct ata_probe_ent *pe) | |||
| 1236 | tcount = readl(mmio + PDC_TIME_COUNTER); | 1237 | tcount = readl(mmio + PDC_TIME_COUNTER); |
| 1237 | VPRINTK("Time Counter Register (0x44): 0x%x\n", tcount); | 1238 | VPRINTK("Time Counter Register (0x44): 0x%x\n", tcount); |
| 1238 | 1239 | ||
| 1239 | /* | 1240 | /* |
| 1240 | If SX4 is on PCI-X bus, after 3 seconds, the timer counter | 1241 | If SX4 is on PCI-X bus, after 3 seconds, the timer counter |
| 1241 | register should be >= (0xffffffff - 3x10^8). | 1242 | register should be >= (0xffffffff - 3x10^8). |
| 1242 | */ | 1243 | */ |
| 1243 | if(tcount >= PCI_X_TCOUNT) { | 1244 | if(tcount >= PCI_X_TCOUNT) { |
| 1244 | ticks = (time_period - tcount); | 1245 | ticks = (time_period - tcount); |
| 1245 | VPRINTK("Num counters 0x%x (%d)\n", ticks, ticks); | 1246 | VPRINTK("Num counters 0x%x (%d)\n", ticks, ticks); |
| 1246 | 1247 | ||
| 1247 | clock = (ticks / 300000); | 1248 | clock = (ticks / 300000); |
| 1248 | VPRINTK("10 * Internal clk = 0x%x (%d)\n", clock, clock); | 1249 | VPRINTK("10 * Internal clk = 0x%x (%d)\n", clock, clock); |
| 1249 | 1250 | ||
| 1250 | clock = (clock * 33); | 1251 | clock = (clock * 33); |
| 1251 | VPRINTK("10 * Internal clk * 33 = 0x%x (%d)\n", clock, clock); | 1252 | VPRINTK("10 * Internal clk * 33 = 0x%x (%d)\n", clock, clock); |
| 1252 | 1253 | ||
| 1253 | /* PLL F Param (bit 22:16) */ | 1254 | /* PLL F Param (bit 22:16) */ |
| 1254 | fparam = (1400000 / clock) - 2; | 1255 | fparam = (1400000 / clock) - 2; |
| 1255 | VPRINTK("PLL F Param: 0x%x (%d)\n", fparam, fparam); | 1256 | VPRINTK("PLL F Param: 0x%x (%d)\n", fparam, fparam); |
| 1256 | 1257 | ||
| 1257 | /* OD param = 0x2 (bit 31:30), R param = 0x5 (bit 29:25) */ | 1258 | /* OD param = 0x2 (bit 31:30), R param = 0x5 (bit 29:25) */ |
| 1258 | pci_status = (0x8a001824 | (fparam << 16)); | 1259 | pci_status = (0x8a001824 | (fparam << 16)); |
| 1259 | } else | 1260 | } else |
| @@ -1264,21 +1265,21 @@ static unsigned int pdc20621_dimm_init(struct ata_probe_ent *pe) | |||
| 1264 | writel(pci_status, mmio + PDC_CTL_STATUS); | 1265 | writel(pci_status, mmio + PDC_CTL_STATUS); |
| 1265 | readl(mmio + PDC_CTL_STATUS); | 1266 | readl(mmio + PDC_CTL_STATUS); |
| 1266 | 1267 | ||
| 1267 | /* | 1268 | /* |
| 1268 | Read SPD of DIMM by I2C interface, | 1269 | Read SPD of DIMM by I2C interface, |
| 1269 | and program the DIMM Module Controller. | 1270 | and program the DIMM Module Controller. |
| 1270 | */ | 1271 | */ |
| 1271 | if (!(speed = pdc20621_detect_dimm(pe))) { | 1272 | if (!(speed = pdc20621_detect_dimm(pe))) { |
| 1272 | printk(KERN_ERR "Detect Local DIMM Fail\n"); | 1273 | printk(KERN_ERR "Detect Local DIMM Fail\n"); |
| 1273 | return 1; /* DIMM error */ | 1274 | return 1; /* DIMM error */ |
| 1274 | } | 1275 | } |
| 1275 | VPRINTK("Local DIMM Speed = %d\n", speed); | 1276 | VPRINTK("Local DIMM Speed = %d\n", speed); |
| 1276 | 1277 | ||
| 1277 | /* Programming DIMM0 Module Control Register (index_CID0:80h) */ | 1278 | /* Programming DIMM0 Module Control Register (index_CID0:80h) */ |
| 1278 | size = pdc20621_prog_dimm0(pe); | 1279 | size = pdc20621_prog_dimm0(pe); |
| 1279 | VPRINTK("Local DIMM Size = %dMB\n",size); | 1280 | VPRINTK("Local DIMM Size = %dMB\n",size); |
| 1280 | 1281 | ||
| 1281 | /* Programming DIMM Module Global Control Register (index_CID0:88h) */ | 1282 | /* Programming DIMM Module Global Control Register (index_CID0:88h) */ |
| 1282 | if (pdc20621_prog_dimm_global(pe)) { | 1283 | if (pdc20621_prog_dimm_global(pe)) { |
| 1283 | printk(KERN_ERR "Programming DIMM Module Global Control Register Fail\n"); | 1284 | printk(KERN_ERR "Programming DIMM Module Global Control Register Fail\n"); |
| 1284 | return 1; | 1285 | return 1; |
| @@ -1297,30 +1298,30 @@ static unsigned int pdc20621_dimm_init(struct ata_probe_ent *pe) | |||
| 1297 | 1298 | ||
| 1298 | pdc20621_put_to_dimm(pe, (void *) test_parttern1, 0x10040, 40); | 1299 | pdc20621_put_to_dimm(pe, (void *) test_parttern1, 0x10040, 40); |
| 1299 | pdc20621_get_from_dimm(pe, (void *) test_parttern2, 0x40, 40); | 1300 | pdc20621_get_from_dimm(pe, (void *) test_parttern2, 0x40, 40); |
| 1300 | printk(KERN_ERR "%x, %x, %s\n", test_parttern2[0], | 1301 | printk(KERN_ERR "%x, %x, %s\n", test_parttern2[0], |
| 1301 | test_parttern2[1], &(test_parttern2[2])); | 1302 | test_parttern2[1], &(test_parttern2[2])); |
| 1302 | pdc20621_get_from_dimm(pe, (void *) test_parttern2, 0x10040, | 1303 | pdc20621_get_from_dimm(pe, (void *) test_parttern2, 0x10040, |
| 1303 | 40); | 1304 | 40); |
| 1304 | printk(KERN_ERR "%x, %x, %s\n", test_parttern2[0], | 1305 | printk(KERN_ERR "%x, %x, %s\n", test_parttern2[0], |
| 1305 | test_parttern2[1], &(test_parttern2[2])); | 1306 | test_parttern2[1], &(test_parttern2[2])); |
| 1306 | 1307 | ||
| 1307 | pdc20621_put_to_dimm(pe, (void *) test_parttern1, 0x40, 40); | 1308 | pdc20621_put_to_dimm(pe, (void *) test_parttern1, 0x40, 40); |
| 1308 | pdc20621_get_from_dimm(pe, (void *) test_parttern2, 0x40, 40); | 1309 | pdc20621_get_from_dimm(pe, (void *) test_parttern2, 0x40, 40); |
| 1309 | printk(KERN_ERR "%x, %x, %s\n", test_parttern2[0], | 1310 | printk(KERN_ERR "%x, %x, %s\n", test_parttern2[0], |
| 1310 | test_parttern2[1], &(test_parttern2[2])); | 1311 | test_parttern2[1], &(test_parttern2[2])); |
| 1311 | } | 1312 | } |
| 1312 | #endif | 1313 | #endif |
| 1313 | 1314 | ||
| 1314 | /* ECC initiliazation. */ | 1315 | /* ECC initiliazation. */ |
| 1315 | 1316 | ||
| 1316 | pdc20621_i2c_read(pe, PDC_DIMM0_SPD_DEV_ADDRESS, | 1317 | pdc20621_i2c_read(pe, PDC_DIMM0_SPD_DEV_ADDRESS, |
| 1317 | PDC_DIMM_SPD_TYPE, &spd0); | 1318 | PDC_DIMM_SPD_TYPE, &spd0); |
| 1318 | if (spd0 == 0x02) { | 1319 | if (spd0 == 0x02) { |
| 1319 | VPRINTK("Start ECC initialization\n"); | 1320 | VPRINTK("Start ECC initialization\n"); |
| 1320 | addr = 0; | 1321 | addr = 0; |
| 1321 | length = size * 1024 * 1024; | 1322 | length = size * 1024 * 1024; |
| 1322 | while (addr < length) { | 1323 | while (addr < length) { |
| 1323 | pdc20621_put_to_dimm(pe, (void *) &tmp, addr, | 1324 | pdc20621_put_to_dimm(pe, (void *) &tmp, addr, |
| 1324 | sizeof(u32)); | 1325 | sizeof(u32)); |
| 1325 | addr += sizeof(u32); | 1326 | addr += sizeof(u32); |
| 1326 | } | 1327 | } |
diff --git a/drivers/scsi/sata_uli.c b/drivers/scsi/sata_uli.c index a71fb54eebd3..eb202a73bc0e 100644 --- a/drivers/scsi/sata_uli.c +++ b/drivers/scsi/sata_uli.c | |||
| @@ -214,7 +214,7 @@ static int uli_init_one (struct pci_dev *pdev, const struct pci_device_id *ent) | |||
| 214 | rc = -ENOMEM; | 214 | rc = -ENOMEM; |
| 215 | goto err_out_regions; | 215 | goto err_out_regions; |
| 216 | } | 216 | } |
| 217 | 217 | ||
| 218 | switch (board_idx) { | 218 | switch (board_idx) { |
| 219 | case uli_5287: | 219 | case uli_5287: |
| 220 | probe_ent->port[0].scr_addr = ULI5287_BASE; | 220 | probe_ent->port[0].scr_addr = ULI5287_BASE; |
diff --git a/drivers/scsi/sata_via.c b/drivers/scsi/sata_via.c index f43183c19a12..feff10980487 100644 --- a/drivers/scsi/sata_via.c +++ b/drivers/scsi/sata_via.c | |||
| @@ -347,7 +347,7 @@ static int svia_init_one (struct pci_dev *pdev, const struct pci_device_id *ent) | |||
| 347 | probe_ent = vt6420_init_probe_ent(pdev); | 347 | probe_ent = vt6420_init_probe_ent(pdev); |
| 348 | else | 348 | else |
| 349 | probe_ent = vt6421_init_probe_ent(pdev); | 349 | probe_ent = vt6421_init_probe_ent(pdev); |
| 350 | 350 | ||
| 351 | if (!probe_ent) { | 351 | if (!probe_ent) { |
| 352 | printk(KERN_ERR DRV_NAME "(%s): out of memory\n", | 352 | printk(KERN_ERR DRV_NAME "(%s): out of memory\n", |
| 353 | pci_name(pdev)); | 353 | pci_name(pdev)); |
diff --git a/drivers/scsi/sata_vsc.c b/drivers/scsi/sata_vsc.c index c5e09dc6f3de..6f2562171be0 100644 --- a/drivers/scsi/sata_vsc.c +++ b/drivers/scsi/sata_vsc.c | |||
| @@ -173,7 +173,8 @@ static irqreturn_t vsc_sata_interrupt (int irq, void *dev_instance, | |||
| 173 | struct ata_port *ap; | 173 | struct ata_port *ap; |
| 174 | 174 | ||
| 175 | ap = host_set->ports[i]; | 175 | ap = host_set->ports[i]; |
| 176 | if (ap && (!(ap->flags & ATA_FLAG_PORT_DISABLED))) { | 176 | if (ap && !(ap->flags & |
| 177 | (ATA_FLAG_PORT_DISABLED|ATA_FLAG_NOINTR))) { | ||
| 177 | struct ata_queued_cmd *qc; | 178 | struct ata_queued_cmd *qc; |
| 178 | 179 | ||
| 179 | qc = ata_qc_from_tag(ap, ap->active_tag); | 180 | qc = ata_qc_from_tag(ap, ap->active_tag); |
| @@ -342,7 +343,7 @@ static int __devinit vsc_sata_init_one (struct pci_dev *pdev, const struct pci_d | |||
| 342 | 343 | ||
| 343 | pci_set_master(pdev); | 344 | pci_set_master(pdev); |
| 344 | 345 | ||
| 345 | /* | 346 | /* |
| 346 | * Config offset 0x98 is "Extended Control and Status Register 0" | 347 | * Config offset 0x98 is "Extended Control and Status Register 0" |
| 347 | * Default value is (1 << 28). All bits except bit 28 are reserved in | 348 | * Default value is (1 << 28). All bits except bit 28 are reserved in |
| 348 | * DPA mode. If bit 28 is set, LED 0 reflects all ports' activity. | 349 | * DPA mode. If bit 28 is set, LED 0 reflects all ports' activity. |
diff --git a/include/linux/ata.h b/include/linux/ata.h index ca5fcadf9981..9d25e9886d60 100644 --- a/include/linux/ata.h +++ b/include/linux/ata.h | |||
| @@ -108,6 +108,8 @@ enum { | |||
| 108 | 108 | ||
| 109 | /* ATA device commands */ | 109 | /* ATA device commands */ |
| 110 | ATA_CMD_CHK_POWER = 0xE5, /* check power mode */ | 110 | ATA_CMD_CHK_POWER = 0xE5, /* check power mode */ |
| 111 | ATA_CMD_STANDBY = 0xE2, /* place in standby power mode */ | ||
| 112 | ATA_CMD_IDLE = 0xE3, /* place in idle power mode */ | ||
| 111 | ATA_CMD_EDD = 0x90, /* execute device diagnostic */ | 113 | ATA_CMD_EDD = 0x90, /* execute device diagnostic */ |
| 112 | ATA_CMD_FLUSH = 0xE7, | 114 | ATA_CMD_FLUSH = 0xE7, |
| 113 | ATA_CMD_FLUSH_EXT = 0xEA, | 115 | ATA_CMD_FLUSH_EXT = 0xEA, |
diff --git a/include/linux/libata.h b/include/linux/libata.h index 6cd9ba63563b..724b7d1c18ea 100644 --- a/include/linux/libata.h +++ b/include/linux/libata.h | |||
| @@ -113,6 +113,8 @@ enum { | |||
| 113 | ATA_FLAG_MMIO = (1 << 6), /* use MMIO, not PIO */ | 113 | ATA_FLAG_MMIO = (1 << 6), /* use MMIO, not PIO */ |
| 114 | ATA_FLAG_SATA_RESET = (1 << 7), /* use COMRESET */ | 114 | ATA_FLAG_SATA_RESET = (1 << 7), /* use COMRESET */ |
| 115 | ATA_FLAG_PIO_DMA = (1 << 8), /* PIO cmds via DMA */ | 115 | ATA_FLAG_PIO_DMA = (1 << 8), /* PIO cmds via DMA */ |
| 116 | ATA_FLAG_NOINTR = (1 << 9), /* FIXME: Remove this once | ||
| 117 | * proper HSM is in place. */ | ||
| 116 | 118 | ||
| 117 | ATA_QCFLAG_ACTIVE = (1 << 1), /* cmd not yet ack'd to scsi lyer */ | 119 | ATA_QCFLAG_ACTIVE = (1 << 1), /* cmd not yet ack'd to scsi lyer */ |
| 118 | ATA_QCFLAG_SG = (1 << 3), /* have s/g table? */ | 120 | ATA_QCFLAG_SG = (1 << 3), /* have s/g table? */ |
| @@ -644,7 +646,7 @@ static inline void scr_write(struct ata_port *ap, unsigned int reg, u32 val) | |||
| 644 | ap->ops->scr_write(ap, reg, val); | 646 | ap->ops->scr_write(ap, reg, val); |
| 645 | } | 647 | } |
| 646 | 648 | ||
| 647 | static inline void scr_write_flush(struct ata_port *ap, unsigned int reg, | 649 | static inline void scr_write_flush(struct ata_port *ap, unsigned int reg, |
| 648 | u32 val) | 650 | u32 val) |
| 649 | { | 651 | { |
| 650 | ap->ops->scr_write(ap, reg, val); | 652 | ap->ops->scr_write(ap, reg, val); |
diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h index 927ed487630d..499a5325f67f 100644 --- a/include/linux/pci_ids.h +++ b/include/linux/pci_ids.h | |||
| @@ -1249,6 +1249,7 @@ | |||
| 1249 | #define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_SATA 0x0266 | 1249 | #define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_SATA 0x0266 |
| 1250 | #define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_SATA2 0x0267 | 1250 | #define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_SATA2 0x0267 |
| 1251 | #define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP55_IDE 0x036E | 1251 | #define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP55_IDE 0x036E |
| 1252 | #define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP55_SATA 0x036F | ||
| 1252 | #define PCI_DEVICE_ID_NVIDIA_NVENET_12 0x0268 | 1253 | #define PCI_DEVICE_ID_NVIDIA_NVENET_12 0x0268 |
| 1253 | #define PCI_DEVICE_ID_NVIDIA_NVENET_13 0x0269 | 1254 | #define PCI_DEVICE_ID_NVIDIA_NVENET_13 0x0269 |
| 1254 | #define PCI_DEVICE_ID_NVIDIA_MCP51_AUDIO 0x026B | 1255 | #define PCI_DEVICE_ID_NVIDIA_MCP51_AUDIO 0x026B |
