4 files changed, 18 insertions, 3 deletions

diff --git a/arch/mips/include/asm/irq.h b/arch/mips/include/asm/irq.h
index 06960364c96b..dea4aed6478f 100644
--- a/arch/mips/include/asm/irq.h
+++ b/arch/mips/include/asm/irq.h
@@ -135,6 +135,7 @@ extern void free_irqno(unsigned int irq);
 #define CP0_LEGACY_COMPARE_IRQ 7
 
 extern int cp0_compare_irq;
+extern int cp0_compare_irq_shift;
 extern int cp0_perfcount_irq;
 
 #endif /* _ASM_IRQ_H */
diff --git a/arch/mips/include/asm/mipsregs.h b/arch/mips/include/asm/mipsregs.h
index a581d60cbcc2..f4ab3139d737 100644
--- a/arch/mips/include/asm/mipsregs.h
+++ b/arch/mips/include/asm/mipsregs.h
@@ -406,6 +406,16 @@
 #define ST0_XX                  0x80000000      /* MIPS IV naming */
 
 /*
+ * Bitfields and bit numbers in the coprocessor 0 IntCtl register. (MIPSR2)
+ *
+ * Refer to your MIPS R4xx0 manual, chapter 5 for explanation.
+ */
+#define INTCTLB_IPPCI           26
+#define INTCTLF_IPPCI           (_ULCAST_(7) << INTCTLB_IPPCI)
+#define INTCTLB_IPTI            29
+#define INTCTLF_IPTI            (_ULCAST_(7) << INTCTLB_IPTI)
+
+/*
  * Bitfields and bit numbers in the coprocessor 0 cause register.
  *
  * Refer to your MIPS R4xx0 manual, chapter 5 for explanation.
@@ -434,6 +444,8 @@
 #define  CAUSEF_IV              (_ULCAST_(1)   << 23)
 #define  CAUSEB_CE              28
 #define  CAUSEF_CE              (_ULCAST_(3)   << 28)
+#define  CAUSEB_TI              30
+#define  CAUSEF_TI              (_ULCAST_(1)   << 30)
 #define  CAUSEB_BD              31
 #define  CAUSEF_BD              (_ULCAST_(1)   << 31)
 
diff --git a/arch/mips/kernel/cevt-r4k.c b/arch/mips/kernel/cevt-r4k.c
index b469ad05d520..0b2450ceb13f 100644
--- a/arch/mips/kernel/cevt-r4k.c
+++ b/arch/mips/kernel/cevt-r4k.c
@@ -97,7 +97,7 @@ void mips_event_handler(struct clock_event_device *dev)
  */
 static int c0_compare_int_pending(void)
 {
-        return (read_c0_cause() >> cp0_compare_irq) & 0x100;
+        return (read_c0_cause() >> cp0_compare_irq_shift) & (1ul << CAUSEB_IP);
 }
 
 /*
diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c
index 308e43460864..338dfe8ed002 100644
--- a/arch/mips/kernel/traps.c
+++ b/arch/mips/kernel/traps.c
@@ -1403,6 +1403,7 @@ extern void flush_tlb_handlers(void);
  * Timer interrupt
  */
 int cp0_compare_irq;
+int cp0_compare_irq_shift;
 
 /*
  * Performance counter IRQ or -1 if shared with timer
@@ -1493,8 +1494,9 @@ void __cpuinit per_cpu_trap_init(void)
          *  o read IntCtl.IPPCI to determine the performance counter interrupt
          */
         if (cpu_has_mips_r2) {
-                cp0_compare_irq = (read_c0_intctl() >> 29) & 7;
-                cp0_perfcount_irq = (read_c0_intctl() >> 26) & 7;
+                cp0_compare_irq_shift = CAUSEB_TI - CAUSEB_IP;
+                cp0_compare_irq = (read_c0_intctl() >> INTCTLB_IPTI) & 7;
+                cp0_perfcount_irq = (read_c0_intctl() >> INTCTLB_IPPCI) & 7;
                 if (cp0_perfcount_irq == cp0_compare_irq)
                         cp0_perfcount_irq = -1;
         } else {