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-rw-r--r--drivers/infiniband/hw/ipath/ipath_common.h10
-rw-r--r--drivers/infiniband/hw/ipath/ipath_iba6110.c172
-rw-r--r--drivers/infiniband/hw/ipath/ipath_iba6120.c163
-rw-r--r--drivers/infiniband/hw/ipath/ipath_kernel.h88
4 files changed, 407 insertions, 26 deletions
diff --git a/drivers/infiniband/hw/ipath/ipath_common.h b/drivers/infiniband/hw/ipath/ipath_common.h
index aa780e7f2418..0fa43ba25b7e 100644
--- a/drivers/infiniband/hw/ipath/ipath_common.h
+++ b/drivers/infiniband/hw/ipath/ipath_common.h
@@ -82,6 +82,16 @@
82#define IPATH_IB_LINK_EXTERNAL 7 /* normal, disable local loopback */ 82#define IPATH_IB_LINK_EXTERNAL 7 /* normal, disable local loopback */
83 83
84/* 84/*
85 * These 3 values (SDR and DDR may be ORed for auto-speed
86 * negotiation) are used for the 3rd argument to path_f_set_ib_cfg
87 * with cmd IPATH_IB_CFG_SPD_ENB, by direct calls or via sysfs. They
88 * are also the the possible values for ipath_link_speed_enabled and active
89 * The values were chosen to match values used within the IB spec.
90 */
91#define IPATH_IB_SDR 1
92#define IPATH_IB_DDR 2
93
94/*
85 * stats maintained by the driver. For now, at least, this is global 95 * stats maintained by the driver. For now, at least, this is global
86 * to all minor devices. 96 * to all minor devices.
87 */ 97 */
diff --git a/drivers/infiniband/hw/ipath/ipath_iba6110.c b/drivers/infiniband/hw/ipath/ipath_iba6110.c
index ac436c630bcc..9e2ced3cdc5e 100644
--- a/drivers/infiniband/hw/ipath/ipath_iba6110.c
+++ b/drivers/infiniband/hw/ipath/ipath_iba6110.c
@@ -329,6 +329,9 @@ static const struct ipath_cregs ipath_ht_cregs = {
329#define INFINIPATH_HWE_HTAPLL_RFSLIP 0x1000000000000000ULL 329#define INFINIPATH_HWE_HTAPLL_RFSLIP 0x1000000000000000ULL
330#define INFINIPATH_HWE_SERDESPLLFAILED 0x2000000000000000ULL 330#define INFINIPATH_HWE_SERDESPLLFAILED 0x2000000000000000ULL
331 331
332#define IBA6110_IBCS_LINKTRAININGSTATE_MASK 0xf
333#define IBA6110_IBCS_LINKSTATE_SHIFT 4
334
332/* kr_extstatus bits */ 335/* kr_extstatus bits */
333#define INFINIPATH_EXTS_FREQSEL 0x2 336#define INFINIPATH_EXTS_FREQSEL 0x2
334#define INFINIPATH_EXTS_SERDESSEL 0x4 337#define INFINIPATH_EXTS_SERDESSEL 0x4
@@ -705,7 +708,6 @@ static int ipath_ht_boardname(struct ipath_devdata *dd, char *name,
705 "with ID %u\n", boardrev); 708 "with ID %u\n", boardrev);
706 snprintf(name, namelen, "Unknown_InfiniPath_QHT7xxx_%u", 709 snprintf(name, namelen, "Unknown_InfiniPath_QHT7xxx_%u",
707 boardrev); 710 boardrev);
708 ret = 1;
709 break; 711 break;
710 } 712 }
711 if (n) 713 if (n)
@@ -1137,11 +1139,49 @@ static void ipath_setup_ht_setextled(struct ipath_devdata *dd,
1137 1139
1138static void ipath_init_ht_variables(struct ipath_devdata *dd) 1140static void ipath_init_ht_variables(struct ipath_devdata *dd)
1139{ 1141{
1142 /*
1143 * setup the register offsets, since they are different for each
1144 * chip
1145 */
1146 dd->ipath_kregs = &ipath_ht_kregs;
1147 dd->ipath_cregs = &ipath_ht_cregs;
1148
1140 dd->ipath_gpio_sda_num = _IPATH_GPIO_SDA_NUM; 1149 dd->ipath_gpio_sda_num = _IPATH_GPIO_SDA_NUM;
1141 dd->ipath_gpio_scl_num = _IPATH_GPIO_SCL_NUM; 1150 dd->ipath_gpio_scl_num = _IPATH_GPIO_SCL_NUM;
1142 dd->ipath_gpio_sda = IPATH_GPIO_SDA; 1151 dd->ipath_gpio_sda = IPATH_GPIO_SDA;
1143 dd->ipath_gpio_scl = IPATH_GPIO_SCL; 1152 dd->ipath_gpio_scl = IPATH_GPIO_SCL;
1144 1153
1154 /*
1155 * Fill in data for field-values that change in newer chips.
1156 * We dynamically specify only the mask for LINKTRAININGSTATE
1157 * and only the shift for LINKSTATE, as they are the only ones
1158 * that change. Also precalculate the 3 link states of interest
1159 * and the combined mask.
1160 */
1161 dd->ibcs_ls_shift = IBA6110_IBCS_LINKSTATE_SHIFT;
1162 dd->ibcs_lts_mask = IBA6110_IBCS_LINKTRAININGSTATE_MASK;
1163 dd->ibcs_mask = (INFINIPATH_IBCS_LINKSTATE_MASK <<
1164 dd->ibcs_ls_shift) | dd->ibcs_lts_mask;
1165 dd->ib_init = (INFINIPATH_IBCS_LT_STATE_LINKUP <<
1166 INFINIPATH_IBCS_LINKTRAININGSTATE_SHIFT) |
1167 (INFINIPATH_IBCS_L_STATE_INIT << dd->ibcs_ls_shift);
1168 dd->ib_arm = (INFINIPATH_IBCS_LT_STATE_LINKUP <<
1169 INFINIPATH_IBCS_LINKTRAININGSTATE_SHIFT) |
1170 (INFINIPATH_IBCS_L_STATE_ARM << dd->ibcs_ls_shift);
1171 dd->ib_active = (INFINIPATH_IBCS_LT_STATE_LINKUP <<
1172 INFINIPATH_IBCS_LINKTRAININGSTATE_SHIFT) |
1173 (INFINIPATH_IBCS_L_STATE_ACTIVE << dd->ibcs_ls_shift);
1174
1175 /*
1176 * Fill in data for ibcc field-values that change in newer chips.
1177 * We dynamically specify only the mask for LINKINITCMD
1178 * and only the shift for LINKCMD and MAXPKTLEN, as they are
1179 * the only ones that change.
1180 */
1181 dd->ibcc_lic_mask = INFINIPATH_IBCC_LINKINITCMD_MASK;
1182 dd->ibcc_lc_shift = INFINIPATH_IBCC_LINKCMD_SHIFT;
1183 dd->ibcc_mpl_shift = INFINIPATH_IBCC_MAXPKTLEN_SHIFT;
1184
1145 /* Fill in shifts for RcvCtrl. */ 1185 /* Fill in shifts for RcvCtrl. */
1146 dd->ipath_r_portenable_shift = INFINIPATH_R_PORTENABLE_SHIFT; 1186 dd->ipath_r_portenable_shift = INFINIPATH_R_PORTENABLE_SHIFT;
1147 dd->ipath_r_intravail_shift = INFINIPATH_R_INTRAVAIL_SHIFT; 1187 dd->ipath_r_intravail_shift = INFINIPATH_R_INTRAVAIL_SHIFT;
@@ -1204,6 +1244,8 @@ static void ipath_init_ht_variables(struct ipath_devdata *dd)
1204 1244
1205 dd->ipath_i_rcvavail_mask = INFINIPATH_I_RCVAVAIL_MASK; 1245 dd->ipath_i_rcvavail_mask = INFINIPATH_I_RCVAVAIL_MASK;
1206 dd->ipath_i_rcvurg_mask = INFINIPATH_I_RCVURG_MASK; 1246 dd->ipath_i_rcvurg_mask = INFINIPATH_I_RCVURG_MASK;
1247 dd->ipath_i_rcvavail_shift = INFINIPATH_I_RCVAVAIL_SHIFT;
1248 dd->ipath_i_rcvurg_shift = INFINIPATH_I_RCVURG_SHIFT;
1207 1249
1208 /* 1250 /*
1209 * EEPROM error log 0 is TXE Parity errors. 1 is RXE Parity. 1251 * EEPROM error log 0 is TXE Parity errors. 1 is RXE Parity.
@@ -1217,9 +1259,17 @@ static void ipath_init_ht_variables(struct ipath_devdata *dd)
1217 INFINIPATH_HWE_RXEMEMPARITYERR_MASK << 1259 INFINIPATH_HWE_RXEMEMPARITYERR_MASK <<
1218 INFINIPATH_HWE_RXEMEMPARITYERR_SHIFT; 1260 INFINIPATH_HWE_RXEMEMPARITYERR_SHIFT;
1219 1261
1220 dd->ipath_eep_st_masks[2].errs_to_log = 1262 dd->ipath_eep_st_masks[2].errs_to_log = INFINIPATH_E_RESET;
1221 INFINIPATH_E_INVALIDADDR | INFINIPATH_E_RESET;
1222 1263
1264 dd->delay_mult = 2; /* SDR, 4X, can't change */
1265
1266 dd->ipath_link_width_supported = IB_WIDTH_1X | IB_WIDTH_4X;
1267 dd->ipath_link_speed_supported = IPATH_IB_SDR;
1268 dd->ipath_link_width_enabled = IB_WIDTH_4X;
1269 dd->ipath_link_speed_enabled = dd->ipath_link_speed_supported;
1270 /* these can't change for this chip, so set once */
1271 dd->ipath_link_width_active = dd->ipath_link_width_enabled;
1272 dd->ipath_link_speed_active = dd->ipath_link_speed_enabled;
1223} 1273}
1224 1274
1225/** 1275/**
@@ -1281,6 +1331,9 @@ static void ipath_ht_init_hwerrors(struct ipath_devdata *dd)
1281 dd->ipath_hwerrmask = val; 1331 dd->ipath_hwerrmask = val;
1282} 1332}
1283 1333
1334
1335
1336
1284/** 1337/**
1285 * ipath_ht_bringup_serdes - bring up the serdes 1338 * ipath_ht_bringup_serdes - bring up the serdes
1286 * @dd: the infinipath device 1339 * @dd: the infinipath device
@@ -1439,6 +1492,7 @@ static void ipath_ht_put_tid(struct ipath_devdata *dd,
1439 pa |= lenvalid | INFINIPATH_RT_VALID; 1492 pa |= lenvalid | INFINIPATH_RT_VALID;
1440 } 1493 }
1441 } 1494 }
1495
1442 writeq(pa, tidptr); 1496 writeq(pa, tidptr);
1443} 1497}
1444 1498
@@ -1644,6 +1698,13 @@ static void ipath_ht_free_irq(struct ipath_devdata *dd)
1644 dd->ipath_intconfig = 0; 1698 dd->ipath_intconfig = 0;
1645} 1699}
1646 1700
1701static struct ipath_message_header *
1702ipath_ht_get_msgheader(struct ipath_devdata *dd, __le32 *rhf_addr)
1703{
1704 return (struct ipath_message_header *)
1705 &rhf_addr[sizeof(u64) / sizeof(u32)];
1706}
1707
1647static void ipath_ht_config_ports(struct ipath_devdata *dd, ushort cfgports) 1708static void ipath_ht_config_ports(struct ipath_devdata *dd, ushort cfgports)
1648{ 1709{
1649 dd->ipath_portcnt = 1710 dd->ipath_portcnt =
@@ -1757,6 +1818,90 @@ static void ipath_ht_read_counters(struct ipath_devdata *dd,
1757 cntrs->RxDlidFltrCnt = 0; 1818 cntrs->RxDlidFltrCnt = 0;
1758} 1819}
1759 1820
1821
1822/* no interrupt fallback for these chips */
1823static int ipath_ht_nointr_fallback(struct ipath_devdata *dd)
1824{
1825 return 0;
1826}
1827
1828
1829/*
1830 * reset the XGXS (between serdes and IBC). Slightly less intrusive
1831 * than resetting the IBC or external link state, and useful in some
1832 * cases to cause some retraining. To do this right, we reset IBC
1833 * as well.
1834 */
1835static void ipath_ht_xgxs_reset(struct ipath_devdata *dd)
1836{
1837 u64 val, prev_val;
1838
1839 prev_val = ipath_read_kreg64(dd, dd->ipath_kregs->kr_xgxsconfig);
1840 val = prev_val | INFINIPATH_XGXS_RESET;
1841 prev_val &= ~INFINIPATH_XGXS_RESET; /* be sure */
1842 ipath_write_kreg(dd, dd->ipath_kregs->kr_control,
1843 dd->ipath_control & ~INFINIPATH_C_LINKENABLE);
1844 ipath_write_kreg(dd, dd->ipath_kregs->kr_xgxsconfig, val);
1845 ipath_read_kreg32(dd, dd->ipath_kregs->kr_scratch);
1846 ipath_write_kreg(dd, dd->ipath_kregs->kr_xgxsconfig, prev_val);
1847 ipath_write_kreg(dd, dd->ipath_kregs->kr_control,
1848 dd->ipath_control);
1849}
1850
1851
1852static int ipath_ht_get_ib_cfg(struct ipath_devdata *dd, int which)
1853{
1854 int ret;
1855
1856 switch (which) {
1857 case IPATH_IB_CFG_LWID:
1858 ret = dd->ipath_link_width_active;
1859 break;
1860 case IPATH_IB_CFG_SPD:
1861 ret = dd->ipath_link_speed_active;
1862 break;
1863 case IPATH_IB_CFG_LWID_ENB:
1864 ret = dd->ipath_link_width_enabled;
1865 break;
1866 case IPATH_IB_CFG_SPD_ENB:
1867 ret = dd->ipath_link_speed_enabled;
1868 break;
1869 default:
1870 ret = -ENOTSUPP;
1871 break;
1872 }
1873 return ret;
1874}
1875
1876
1877/* we assume range checking is already done, if needed */
1878static int ipath_ht_set_ib_cfg(struct ipath_devdata *dd, int which, u32 val)
1879{
1880 int ret = 0;
1881
1882 if (which == IPATH_IB_CFG_LWID_ENB)
1883 dd->ipath_link_width_enabled = val;
1884 else if (which == IPATH_IB_CFG_SPD_ENB)
1885 dd->ipath_link_speed_enabled = val;
1886 else
1887 ret = -ENOTSUPP;
1888 return ret;
1889}
1890
1891
1892static void ipath_ht_config_jint(struct ipath_devdata *dd, u16 a, u16 b)
1893{
1894}
1895
1896
1897static int ipath_ht_ib_updown(struct ipath_devdata *dd, int ibup, u64 ibcs)
1898{
1899 ipath_setup_ht_setextled(dd, ipath_ib_linkstate(dd, ibcs),
1900 ipath_ib_linktrstate(dd, ibcs));
1901 return 0;
1902}
1903
1904
1760/** 1905/**
1761 * ipath_init_iba6110_funcs - set up the chip-specific function pointers 1906 * ipath_init_iba6110_funcs - set up the chip-specific function pointers
1762 * @dd: the infinipath device 1907 * @dd: the infinipath device
@@ -1781,24 +1926,19 @@ void ipath_init_iba6110_funcs(struct ipath_devdata *dd)
1781 dd->ipath_f_setextled = ipath_setup_ht_setextled; 1926 dd->ipath_f_setextled = ipath_setup_ht_setextled;
1782 dd->ipath_f_get_base_info = ipath_ht_get_base_info; 1927 dd->ipath_f_get_base_info = ipath_ht_get_base_info;
1783 dd->ipath_f_free_irq = ipath_ht_free_irq; 1928 dd->ipath_f_free_irq = ipath_ht_free_irq;
1929 dd->ipath_f_tidtemplate = ipath_ht_tidtemplate;
1930 dd->ipath_f_intr_fallback = ipath_ht_nointr_fallback;
1931 dd->ipath_f_get_msgheader = ipath_ht_get_msgheader;
1784 dd->ipath_f_config_ports = ipath_ht_config_ports; 1932 dd->ipath_f_config_ports = ipath_ht_config_ports;
1785 dd->ipath_f_read_counters = ipath_ht_read_counters; 1933 dd->ipath_f_read_counters = ipath_ht_read_counters;
1934 dd->ipath_f_xgxs_reset = ipath_ht_xgxs_reset;
1935 dd->ipath_f_get_ib_cfg = ipath_ht_get_ib_cfg;
1936 dd->ipath_f_set_ib_cfg = ipath_ht_set_ib_cfg;
1937 dd->ipath_f_config_jint = ipath_ht_config_jint;
1938 dd->ipath_f_ib_updown = ipath_ht_ib_updown;
1786 1939
1787 /* 1940 /*
1788 * initialize chip-specific variables 1941 * initialize chip-specific variables
1789 */ 1942 */
1790 dd->ipath_f_tidtemplate = ipath_ht_tidtemplate;
1791
1792 /*
1793 * setup the register offsets, since they are different for each
1794 * chip
1795 */
1796 dd->ipath_kregs = &ipath_ht_kregs;
1797 dd->ipath_cregs = &ipath_ht_cregs;
1798
1799 /*
1800 * do very early init that is needed before ipath_f_bus is
1801 * called
1802 */
1803 ipath_init_ht_variables(dd); 1943 ipath_init_ht_variables(dd);
1804} 1944}
diff --git a/drivers/infiniband/hw/ipath/ipath_iba6120.c b/drivers/infiniband/hw/ipath/ipath_iba6120.c
index 57915fd718e2..597192e912de 100644
--- a/drivers/infiniband/hw/ipath/ipath_iba6120.c
+++ b/drivers/infiniband/hw/ipath/ipath_iba6120.c
@@ -329,6 +329,9 @@ static const struct ipath_cregs ipath_pe_cregs = {
329#define INFINIPATH_HWE_PCIE0PLLFAILED 0x0800000000000000ULL 329#define INFINIPATH_HWE_PCIE0PLLFAILED 0x0800000000000000ULL
330#define INFINIPATH_HWE_SERDESPLLFAILED 0x1000000000000000ULL 330#define INFINIPATH_HWE_SERDESPLLFAILED 0x1000000000000000ULL
331 331
332#define IBA6120_IBCS_LINKTRAININGSTATE_MASK 0xf
333#define IBA6120_IBCS_LINKSTATE_SHIFT 4
334
332/* kr_extstatus bits */ 335/* kr_extstatus bits */
333#define INFINIPATH_EXTS_FREQSEL 0x2 336#define INFINIPATH_EXTS_FREQSEL 0x2
334#define INFINIPATH_EXTS_SERDESSEL 0x4 337#define INFINIPATH_EXTS_SERDESSEL 0x4
@@ -936,12 +939,27 @@ static int ipath_setup_pe_config(struct ipath_devdata *dd,
936 else 939 else
937 ipath_dev_err(dd, "Can't find PCI Express " 940 ipath_dev_err(dd, "Can't find PCI Express "
938 "capability!\n"); 941 "capability!\n");
942
943 dd->ipath_link_width_supported = IB_WIDTH_1X | IB_WIDTH_4X;
944 dd->ipath_link_speed_supported = IPATH_IB_SDR;
945 dd->ipath_link_width_enabled = IB_WIDTH_4X;
946 dd->ipath_link_speed_enabled = dd->ipath_link_speed_supported;
947 /* these can't change for this chip, so set once */
948 dd->ipath_link_width_active = dd->ipath_link_width_enabled;
949 dd->ipath_link_speed_active = dd->ipath_link_speed_enabled;
939 return 0; 950 return 0;
940} 951}
941 952
942static void ipath_init_pe_variables(struct ipath_devdata *dd) 953static void ipath_init_pe_variables(struct ipath_devdata *dd)
943{ 954{
944 /* 955 /*
956 * setup the register offsets, since they are different for each
957 * chip
958 */
959 dd->ipath_kregs = &ipath_pe_kregs;
960 dd->ipath_cregs = &ipath_pe_cregs;
961
962 /*
945 * bits for selecting i2c direction and values, 963 * bits for selecting i2c direction and values,
946 * used for I2C serial flash 964 * used for I2C serial flash
947 */ 965 */
@@ -950,6 +968,37 @@ static void ipath_init_pe_variables(struct ipath_devdata *dd)
950 dd->ipath_gpio_sda = IPATH_GPIO_SDA; 968 dd->ipath_gpio_sda = IPATH_GPIO_SDA;
951 dd->ipath_gpio_scl = IPATH_GPIO_SCL; 969 dd->ipath_gpio_scl = IPATH_GPIO_SCL;
952 970
971 /*
972 * Fill in data for field-values that change in newer chips.
973 * We dynamically specify only the mask for LINKTRAININGSTATE
974 * and only the shift for LINKSTATE, as they are the only ones
975 * that change. Also precalculate the 3 link states of interest
976 * and the combined mask.
977 */
978 dd->ibcs_ls_shift = IBA6120_IBCS_LINKSTATE_SHIFT;
979 dd->ibcs_lts_mask = IBA6120_IBCS_LINKTRAININGSTATE_MASK;
980 dd->ibcs_mask = (INFINIPATH_IBCS_LINKSTATE_MASK <<
981 dd->ibcs_ls_shift) | dd->ibcs_lts_mask;
982 dd->ib_init = (INFINIPATH_IBCS_LT_STATE_LINKUP <<
983 INFINIPATH_IBCS_LINKTRAININGSTATE_SHIFT) |
984 (INFINIPATH_IBCS_L_STATE_INIT << dd->ibcs_ls_shift);
985 dd->ib_arm = (INFINIPATH_IBCS_LT_STATE_LINKUP <<
986 INFINIPATH_IBCS_LINKTRAININGSTATE_SHIFT) |
987 (INFINIPATH_IBCS_L_STATE_ARM << dd->ibcs_ls_shift);
988 dd->ib_active = (INFINIPATH_IBCS_LT_STATE_LINKUP <<
989 INFINIPATH_IBCS_LINKTRAININGSTATE_SHIFT) |
990 (INFINIPATH_IBCS_L_STATE_ACTIVE << dd->ibcs_ls_shift);
991
992 /*
993 * Fill in data for ibcc field-values that change in newer chips.
994 * We dynamically specify only the mask for LINKINITCMD
995 * and only the shift for LINKCMD and MAXPKTLEN, as they are
996 * the only ones that change.
997 */
998 dd->ibcc_lic_mask = INFINIPATH_IBCC_LINKINITCMD_MASK;
999 dd->ibcc_lc_shift = INFINIPATH_IBCC_LINKCMD_SHIFT;
1000 dd->ibcc_mpl_shift = INFINIPATH_IBCC_MAXPKTLEN_SHIFT;
1001
953 /* Fill in shifts for RcvCtrl. */ 1002 /* Fill in shifts for RcvCtrl. */
954 dd->ipath_r_portenable_shift = INFINIPATH_R_PORTENABLE_SHIFT; 1003 dd->ipath_r_portenable_shift = INFINIPATH_R_PORTENABLE_SHIFT;
955 dd->ipath_r_intravail_shift = INFINIPATH_R_INTRAVAIL_SHIFT; 1004 dd->ipath_r_intravail_shift = INFINIPATH_R_INTRAVAIL_SHIFT;
@@ -1003,6 +1052,8 @@ static void ipath_init_pe_variables(struct ipath_devdata *dd)
1003 1052
1004 dd->ipath_i_rcvavail_mask = INFINIPATH_I_RCVAVAIL_MASK; 1053 dd->ipath_i_rcvavail_mask = INFINIPATH_I_RCVAVAIL_MASK;
1005 dd->ipath_i_rcvurg_mask = INFINIPATH_I_RCVURG_MASK; 1054 dd->ipath_i_rcvurg_mask = INFINIPATH_I_RCVURG_MASK;
1055 dd->ipath_i_rcvavail_shift = INFINIPATH_I_RCVAVAIL_SHIFT;
1056 dd->ipath_i_rcvurg_shift = INFINIPATH_I_RCVURG_SHIFT;
1006 1057
1007 /* 1058 /*
1008 * EEPROM error log 0 is TXE Parity errors. 1 is RXE Parity. 1059 * EEPROM error log 0 is TXE Parity errors. 1 is RXE Parity.
@@ -1024,6 +1075,7 @@ static void ipath_init_pe_variables(struct ipath_devdata *dd)
1024 INFINIPATH_E_INVALIDADDR | INFINIPATH_E_RESET; 1075 INFINIPATH_E_INVALIDADDR | INFINIPATH_E_RESET;
1025 1076
1026 1077
1078 dd->delay_mult = 2; /* SDR, 4X, can't change */
1027} 1079}
1028 1080
1029/* setup the MSI stuff again after a reset. I'd like to just call 1081/* setup the MSI stuff again after a reset. I'd like to just call
@@ -1329,6 +1381,9 @@ static int ipath_pe_early_init(struct ipath_devdata *dd)
1329 */ 1381 */
1330 dd->ipath_rcvhdrentsize = 24; 1382 dd->ipath_rcvhdrentsize = 24;
1331 dd->ipath_rcvhdrsize = IPATH_DFLT_RCVHDRSIZE; 1383 dd->ipath_rcvhdrsize = IPATH_DFLT_RCVHDRSIZE;
1384 dd->ipath_rhf_offset = 0;
1385 dd->ipath_egrtidbase = (u64 __iomem *)
1386 ((char __iomem *) dd->ipath_kregbase + dd->ipath_rcvegrbase);
1332 1387
1333 /* 1388 /*
1334 * To truly support a 4KB MTU (for usermode), we need to 1389 * To truly support a 4KB MTU (for usermode), we need to
@@ -1399,6 +1454,14 @@ static void ipath_pe_free_irq(struct ipath_devdata *dd)
1399 dd->ipath_irq = 0; 1454 dd->ipath_irq = 0;
1400} 1455}
1401 1456
1457
1458static struct ipath_message_header *
1459ipath_pe_get_msgheader(struct ipath_devdata *dd, __le32 *rhf_addr)
1460{
1461 return (struct ipath_message_header *)
1462 &rhf_addr[sizeof(u64) / sizeof(u32)];
1463}
1464
1402static void ipath_pe_config_ports(struct ipath_devdata *dd, ushort cfgports) 1465static void ipath_pe_config_ports(struct ipath_devdata *dd, ushort cfgports)
1403{ 1466{
1404 dd->ipath_portcnt = 1467 dd->ipath_portcnt =
@@ -1534,6 +1597,88 @@ static int ipath_pe_txe_recover(struct ipath_devdata *dd)
1534 return 1; 1597 return 1;
1535} 1598}
1536 1599
1600/* no interrupt fallback for these chips */
1601static int ipath_pe_nointr_fallback(struct ipath_devdata *dd)
1602{
1603 return 0;
1604}
1605
1606
1607/*
1608 * reset the XGXS (between serdes and IBC). Slightly less intrusive
1609 * than resetting the IBC or external link state, and useful in some
1610 * cases to cause some retraining. To do this right, we reset IBC
1611 * as well.
1612 */
1613static void ipath_pe_xgxs_reset(struct ipath_devdata *dd)
1614{
1615 u64 val, prev_val;
1616
1617 prev_val = ipath_read_kreg64(dd, dd->ipath_kregs->kr_xgxsconfig);
1618 val = prev_val | INFINIPATH_XGXS_RESET;
1619 prev_val &= ~INFINIPATH_XGXS_RESET; /* be sure */
1620 ipath_write_kreg(dd, dd->ipath_kregs->kr_control,
1621 dd->ipath_control & ~INFINIPATH_C_LINKENABLE);
1622 ipath_write_kreg(dd, dd->ipath_kregs->kr_xgxsconfig, val);
1623 ipath_read_kreg32(dd, dd->ipath_kregs->kr_scratch);
1624 ipath_write_kreg(dd, dd->ipath_kregs->kr_xgxsconfig, prev_val);
1625 ipath_write_kreg(dd, dd->ipath_kregs->kr_control,
1626 dd->ipath_control);
1627}
1628
1629
1630static int ipath_pe_get_ib_cfg(struct ipath_devdata *dd, int which)
1631{
1632 int ret;
1633
1634 switch (which) {
1635 case IPATH_IB_CFG_LWID:
1636 ret = dd->ipath_link_width_active;
1637 break;
1638 case IPATH_IB_CFG_SPD:
1639 ret = dd->ipath_link_speed_active;
1640 break;
1641 case IPATH_IB_CFG_LWID_ENB:
1642 ret = dd->ipath_link_width_enabled;
1643 break;
1644 case IPATH_IB_CFG_SPD_ENB:
1645 ret = dd->ipath_link_speed_enabled;
1646 break;
1647 default:
1648 ret = -ENOTSUPP;
1649 break;
1650 }
1651 return ret;
1652}
1653
1654
1655/* we assume range checking is already done, if needed */
1656static int ipath_pe_set_ib_cfg(struct ipath_devdata *dd, int which, u32 val)
1657{
1658 int ret = 0;
1659
1660 if (which == IPATH_IB_CFG_LWID_ENB)
1661 dd->ipath_link_width_enabled = val;
1662 else if (which == IPATH_IB_CFG_SPD_ENB)
1663 dd->ipath_link_speed_enabled = val;
1664 else
1665 ret = -ENOTSUPP;
1666 return ret;
1667}
1668
1669static void ipath_pe_config_jint(struct ipath_devdata *dd, u16 a, u16 b)
1670{
1671}
1672
1673
1674static int ipath_pe_ib_updown(struct ipath_devdata *dd, int ibup, u64 ibcs)
1675{
1676 ipath_setup_pe_setextled(dd, ipath_ib_linkstate(dd, ibcs),
1677 ipath_ib_linktrstate(dd, ibcs));
1678 return 0;
1679}
1680
1681
1537/** 1682/**
1538 * ipath_init_iba6120_funcs - set up the chip-specific function pointers 1683 * ipath_init_iba6120_funcs - set up the chip-specific function pointers
1539 * @dd: the infinipath device 1684 * @dd: the infinipath device
@@ -1554,7 +1699,7 @@ void ipath_init_iba6120_funcs(struct ipath_devdata *dd)
1554 dd->ipath_f_bringup_serdes = ipath_pe_bringup_serdes; 1699 dd->ipath_f_bringup_serdes = ipath_pe_bringup_serdes;
1555 dd->ipath_f_clear_tids = ipath_pe_clear_tids; 1700 dd->ipath_f_clear_tids = ipath_pe_clear_tids;
1556 /* 1701 /*
1557 * this may get changed after we read the chip revision, 1702 * _f_put_tid may get changed after we read the chip revision,
1558 * but we start with the safe version for all revs 1703 * but we start with the safe version for all revs
1559 */ 1704 */
1560 dd->ipath_f_put_tid = ipath_pe_put_tid; 1705 dd->ipath_f_put_tid = ipath_pe_put_tid;
@@ -1562,19 +1707,19 @@ void ipath_init_iba6120_funcs(struct ipath_devdata *dd)
1562 dd->ipath_f_setextled = ipath_setup_pe_setextled; 1707 dd->ipath_f_setextled = ipath_setup_pe_setextled;
1563 dd->ipath_f_get_base_info = ipath_pe_get_base_info; 1708 dd->ipath_f_get_base_info = ipath_pe_get_base_info;
1564 dd->ipath_f_free_irq = ipath_pe_free_irq; 1709 dd->ipath_f_free_irq = ipath_pe_free_irq;
1565
1566 /* initialize chip-specific variables */
1567 dd->ipath_f_tidtemplate = ipath_pe_tidtemplate; 1710 dd->ipath_f_tidtemplate = ipath_pe_tidtemplate;
1711 dd->ipath_f_intr_fallback = ipath_pe_nointr_fallback;
1712 dd->ipath_f_xgxs_reset = ipath_pe_xgxs_reset;
1713 dd->ipath_f_get_msgheader = ipath_pe_get_msgheader;
1568 dd->ipath_f_config_ports = ipath_pe_config_ports; 1714 dd->ipath_f_config_ports = ipath_pe_config_ports;
1569 dd->ipath_f_read_counters = ipath_pe_read_counters; 1715 dd->ipath_f_read_counters = ipath_pe_read_counters;
1716 dd->ipath_f_get_ib_cfg = ipath_pe_get_ib_cfg;
1717 dd->ipath_f_set_ib_cfg = ipath_pe_set_ib_cfg;
1718 dd->ipath_f_config_jint = ipath_pe_config_jint;
1719 dd->ipath_f_ib_updown = ipath_pe_ib_updown;
1570 1720
1571 /*
1572 * setup the register offsets, since they are different for each
1573 * chip
1574 */
1575 dd->ipath_kregs = &ipath_pe_kregs;
1576 dd->ipath_cregs = &ipath_pe_cregs;
1577 1721
1722 /* initialize chip-specific variables */
1578 ipath_init_pe_variables(dd); 1723 ipath_init_pe_variables(dd);
1579} 1724}
1580 1725
diff --git a/drivers/infiniband/hw/ipath/ipath_kernel.h b/drivers/infiniband/hw/ipath/ipath_kernel.h
index c0ecda35f2d9..6a5fe0157330 100644
--- a/drivers/infiniband/hw/ipath/ipath_kernel.h
+++ b/drivers/infiniband/hw/ipath/ipath_kernel.h
@@ -191,6 +191,22 @@ struct ipath_skbinfo {
191 dma_addr_t phys; 191 dma_addr_t phys;
192}; 192};
193 193
194/*
195 * Possible IB config parameters for ipath_f_get/set_ib_cfg()
196 */
197#define IPATH_IB_CFG_LIDLMC 0 /* Get/set LID (LS16b) and Mask (MS16b) */
198#define IPATH_IB_CFG_HRTBT 1 /* Get/set Heartbeat off/enable/auto */
199#define IPATH_IB_HRTBT_ON 3 /* Heartbeat enabled, sent every 100msec */
200#define IPATH_IB_HRTBT_OFF 0 /* Heartbeat off */
201#define IPATH_IB_CFG_LWID_ENB 2 /* Get/set allowed Link-width */
202#define IPATH_IB_CFG_LWID 3 /* Get currently active Link-width */
203#define IPATH_IB_CFG_SPD_ENB 4 /* Get/set allowed Link speeds */
204#define IPATH_IB_CFG_SPD 5 /* Get current Link spd */
205#define IPATH_IB_CFG_RXPOL_ENB 6 /* Get/set Auto-RX-polarity enable */
206#define IPATH_IB_CFG_LREV_ENB 7 /* Get/set Auto-Lane-reversal enable */
207#define IPATH_IB_CFG_LINKLATENCY 8 /* Get Auto-Lane-reversal enable */
208
209
194struct ipath_devdata { 210struct ipath_devdata {
195 struct list_head ipath_list; 211 struct list_head ipath_list;
196 212
@@ -231,6 +247,8 @@ struct ipath_devdata {
231 struct _ipath_layer ipath_layer; 247 struct _ipath_layer ipath_layer;
232 /* setup intr */ 248 /* setup intr */
233 int (*ipath_f_intrsetup)(struct ipath_devdata *); 249 int (*ipath_f_intrsetup)(struct ipath_devdata *);
250 /* fallback to alternate interrupt type if possible */
251 int (*ipath_f_intr_fallback)(struct ipath_devdata *);
234 /* setup on-chip bus config */ 252 /* setup on-chip bus config */
235 int (*ipath_f_bus)(struct ipath_devdata *, struct pci_dev *); 253 int (*ipath_f_bus)(struct ipath_devdata *, struct pci_dev *);
236 /* hard reset chip */ 254 /* hard reset chip */
@@ -253,9 +271,18 @@ struct ipath_devdata {
253 int (*ipath_f_get_base_info)(struct ipath_portdata *, void *); 271 int (*ipath_f_get_base_info)(struct ipath_portdata *, void *);
254 /* free irq */ 272 /* free irq */
255 void (*ipath_f_free_irq)(struct ipath_devdata *); 273 void (*ipath_f_free_irq)(struct ipath_devdata *);
274 struct ipath_message_header *(*ipath_f_get_msgheader)
275 (struct ipath_devdata *, __le32 *);
256 void (*ipath_f_config_ports)(struct ipath_devdata *, ushort); 276 void (*ipath_f_config_ports)(struct ipath_devdata *, ushort);
277 int (*ipath_f_get_ib_cfg)(struct ipath_devdata *, int);
278 int (*ipath_f_set_ib_cfg)(struct ipath_devdata *, int, u32);
279 void (*ipath_f_config_jint)(struct ipath_devdata *, u16 , u16);
257 void (*ipath_f_read_counters)(struct ipath_devdata *, 280 void (*ipath_f_read_counters)(struct ipath_devdata *,
258 struct infinipath_counters *); 281 struct infinipath_counters *);
282 void (*ipath_f_xgxs_reset)(struct ipath_devdata *);
283 /* per chip actions needed for IB Link up/down changes */
284 int (*ipath_f_ib_updown)(struct ipath_devdata *, int, u64);
285
259 struct ipath_ibdev *verbs_dev; 286 struct ipath_ibdev *verbs_dev;
260 struct timer_list verbs_timer; 287 struct timer_list verbs_timer;
261 /* total dwords sent (summed from counter) */ 288 /* total dwords sent (summed from counter) */
@@ -375,6 +402,7 @@ struct ipath_devdata {
375 struct page **ipath_pageshadow; 402 struct page **ipath_pageshadow;
376 /* shadow copy of dma handles for exp tid pages */ 403 /* shadow copy of dma handles for exp tid pages */
377 dma_addr_t *ipath_physshadow; 404 dma_addr_t *ipath_physshadow;
405 u64 __iomem *ipath_egrtidbase;
378 /* lock to workaround chip bug 9437 */ 406 /* lock to workaround chip bug 9437 */
379 spinlock_t ipath_tid_lock; 407 spinlock_t ipath_tid_lock;
380 spinlock_t ipath_sendctrl_lock; 408 spinlock_t ipath_sendctrl_lock;
@@ -565,6 +593,14 @@ struct ipath_devdata {
565 u8 ipath_pci_cacheline; 593 u8 ipath_pci_cacheline;
566 /* LID mask control */ 594 /* LID mask control */
567 u8 ipath_lmc; 595 u8 ipath_lmc;
596 /* link width supported */
597 u8 ipath_link_width_supported;
598 /* link speed supported */
599 u8 ipath_link_speed_supported;
600 u8 ipath_link_width_enabled;
601 u8 ipath_link_speed_enabled;
602 u8 ipath_link_width_active;
603 u8 ipath_link_speed_active;
568 /* Rx Polarity inversion (compensate for ~tx on partner) */ 604 /* Rx Polarity inversion (compensate for ~tx on partner) */
569 u8 ipath_rx_pol_inv; 605 u8 ipath_rx_pol_inv;
570 606
@@ -599,6 +635,8 @@ struct ipath_devdata {
599 */ 635 */
600 u32 ipath_i_rcvavail_mask; 636 u32 ipath_i_rcvavail_mask;
601 u32 ipath_i_rcvurg_mask; 637 u32 ipath_i_rcvurg_mask;
638 u16 ipath_i_rcvurg_shift;
639 u16 ipath_i_rcvavail_shift;
602 640
603 /* 641 /*
604 * Register bits for selecting i2c direction and values, used for 642 * Register bits for selecting i2c direction and values, used for
@@ -612,6 +650,29 @@ struct ipath_devdata {
612 /* lock for doing RMW of shadows/regs for ExtCtrl and GPIO */ 650 /* lock for doing RMW of shadows/regs for ExtCtrl and GPIO */
613 spinlock_t ipath_gpio_lock; 651 spinlock_t ipath_gpio_lock;
614 652
653 /*
654 * IB link and linktraining states and masks that vary per chip in
655 * some way. Set at init, to avoid each IB status change interrupt
656 */
657 u8 ibcs_ls_shift;
658 u8 ibcs_lts_mask;
659 u32 ibcs_mask;
660 u32 ib_init;
661 u32 ib_arm;
662 u32 ib_active;
663
664 u16 ipath_rhf_offset; /* offset of RHF within receive header entry */
665
666 /*
667 * shift/mask for linkcmd, linkinitcmd, maxpktlen in ibccontol
668 * reg. Changes for IBA7220
669 */
670 u8 ibcc_lic_mask; /* LinkInitCmd */
671 u8 ibcc_lc_shift; /* LinkCmd */
672 u8 ibcc_mpl_shift; /* Maxpktlen */
673
674 u8 delay_mult;
675
615 /* used to override LED behavior */ 676 /* used to override LED behavior */
616 u8 ipath_led_override; /* Substituted for normal value, if non-zero */ 677 u8 ipath_led_override; /* Substituted for normal value, if non-zero */
617 u16 ipath_led_override_timeoff; /* delta to next timer event */ 678 u16 ipath_led_override_timeoff; /* delta to next timer event */
@@ -639,6 +700,10 @@ struct ipath_devdata {
639 * each of the counters to increment. 700 * each of the counters to increment.
640 */ 701 */
641 struct ipath_eep_log_mask ipath_eep_st_masks[IPATH_EEP_LOG_CNT]; 702 struct ipath_eep_log_mask ipath_eep_st_masks[IPATH_EEP_LOG_CNT];
703
704 /* interrupt mitigation reload register info */
705 u16 ipath_jint_idle_ticks; /* idle clock ticks */
706 u16 ipath_jint_max_packets; /* max packets across all ports */
642}; 707};
643 708
644/* Private data for file operations */ 709/* Private data for file operations */
@@ -938,6 +1003,27 @@ static inline u64 ipath_read_ireg(const struct ipath_devdata *dd, ipath_kreg r)
938} 1003}
939 1004
940/* 1005/*
1006 * from contents of IBCStatus (or a saved copy), return linkstate
1007 * Report ACTIVE_DEFER as ACTIVE, because we treat them the same
1008 * everywhere, anyway (and should be, for almost all purposes).
1009 */
1010static inline u32 ipath_ib_linkstate(struct ipath_devdata *dd, u64 ibcs)
1011{
1012 u32 state = (u32)(ibcs >> dd->ibcs_ls_shift) &
1013 INFINIPATH_IBCS_LINKSTATE_MASK;
1014 if (state == INFINIPATH_IBCS_L_STATE_ACT_DEFER)
1015 state = INFINIPATH_IBCS_L_STATE_ACTIVE;
1016 return state;
1017}
1018
1019/* from contents of IBCStatus (or a saved copy), return linktrainingstate */
1020static inline u32 ipath_ib_linktrstate(struct ipath_devdata *dd, u64 ibcs)
1021{
1022 return (u32)(ibcs >> INFINIPATH_IBCS_LINKTRAININGSTATE_SHIFT) &
1023 dd->ibcs_lts_mask;
1024}
1025
1026/*
941 * sysfs interface. 1027 * sysfs interface.
942 */ 1028 */
943 1029