diff options
-rw-r--r-- | drivers/net/igb/e1000_hw.h | 138 | ||||
-rw-r--r-- | drivers/net/igb/igb.h | 3 | ||||
-rw-r--r-- | drivers/net/igb/igb_ethtool.c | 51 | ||||
-rw-r--r-- | drivers/net/igb/igb_main.c | 6 |
4 files changed, 32 insertions, 166 deletions
diff --git a/drivers/net/igb/e1000_hw.h b/drivers/net/igb/e1000_hw.h index bd86cebed37c..10b872d3c9f4 100644 --- a/drivers/net/igb/e1000_hw.h +++ b/drivers/net/igb/e1000_hw.h | |||
@@ -144,144 +144,6 @@ enum e1000_fc_type { | |||
144 | e1000_fc_default = 0xFF | 144 | e1000_fc_default = 0xFF |
145 | }; | 145 | }; |
146 | 146 | ||
147 | |||
148 | /* Receive Descriptor */ | ||
149 | struct e1000_rx_desc { | ||
150 | __le64 buffer_addr; /* Address of the descriptor's data buffer */ | ||
151 | __le16 length; /* Length of data DMAed into data buffer */ | ||
152 | __le16 csum; /* Packet checksum */ | ||
153 | u8 status; /* Descriptor status */ | ||
154 | u8 errors; /* Descriptor Errors */ | ||
155 | __le16 special; | ||
156 | }; | ||
157 | |||
158 | /* Receive Descriptor - Extended */ | ||
159 | union e1000_rx_desc_extended { | ||
160 | struct { | ||
161 | __le64 buffer_addr; | ||
162 | __le64 reserved; | ||
163 | } read; | ||
164 | struct { | ||
165 | struct { | ||
166 | __le32 mrq; /* Multiple Rx Queues */ | ||
167 | union { | ||
168 | __le32 rss; /* RSS Hash */ | ||
169 | struct { | ||
170 | __le16 ip_id; /* IP id */ | ||
171 | __le16 csum; /* Packet Checksum */ | ||
172 | } csum_ip; | ||
173 | } hi_dword; | ||
174 | } lower; | ||
175 | struct { | ||
176 | __le32 status_error; /* ext status/error */ | ||
177 | __le16 length; | ||
178 | __le16 vlan; /* VLAN tag */ | ||
179 | } upper; | ||
180 | } wb; /* writeback */ | ||
181 | }; | ||
182 | |||
183 | #define MAX_PS_BUFFERS 4 | ||
184 | /* Receive Descriptor - Packet Split */ | ||
185 | union e1000_rx_desc_packet_split { | ||
186 | struct { | ||
187 | /* one buffer for protocol header(s), three data buffers */ | ||
188 | __le64 buffer_addr[MAX_PS_BUFFERS]; | ||
189 | } read; | ||
190 | struct { | ||
191 | struct { | ||
192 | __le32 mrq; /* Multiple Rx Queues */ | ||
193 | union { | ||
194 | __le32 rss; /* RSS Hash */ | ||
195 | struct { | ||
196 | __le16 ip_id; /* IP id */ | ||
197 | __le16 csum; /* Packet Checksum */ | ||
198 | } csum_ip; | ||
199 | } hi_dword; | ||
200 | } lower; | ||
201 | struct { | ||
202 | __le32 status_error; /* ext status/error */ | ||
203 | __le16 length0; /* length of buffer 0 */ | ||
204 | __le16 vlan; /* VLAN tag */ | ||
205 | } middle; | ||
206 | struct { | ||
207 | __le16 header_status; | ||
208 | __le16 length[3]; /* length of buffers 1-3 */ | ||
209 | } upper; | ||
210 | __le64 reserved; | ||
211 | } wb; /* writeback */ | ||
212 | }; | ||
213 | |||
214 | /* Transmit Descriptor */ | ||
215 | struct e1000_tx_desc { | ||
216 | __le64 buffer_addr; /* Address of the descriptor's data buffer */ | ||
217 | union { | ||
218 | __le32 data; | ||
219 | struct { | ||
220 | __le16 length; /* Data buffer length */ | ||
221 | u8 cso; /* Checksum offset */ | ||
222 | u8 cmd; /* Descriptor control */ | ||
223 | } flags; | ||
224 | } lower; | ||
225 | union { | ||
226 | __le32 data; | ||
227 | struct { | ||
228 | u8 status; /* Descriptor status */ | ||
229 | u8 css; /* Checksum start */ | ||
230 | __le16 special; | ||
231 | } fields; | ||
232 | } upper; | ||
233 | }; | ||
234 | |||
235 | /* Offload Context Descriptor */ | ||
236 | struct e1000_context_desc { | ||
237 | union { | ||
238 | __le32 ip_config; | ||
239 | struct { | ||
240 | u8 ipcss; /* IP checksum start */ | ||
241 | u8 ipcso; /* IP checksum offset */ | ||
242 | __le16 ipcse; /* IP checksum end */ | ||
243 | } ip_fields; | ||
244 | } lower_setup; | ||
245 | union { | ||
246 | __le32 tcp_config; | ||
247 | struct { | ||
248 | u8 tucss; /* TCP checksum start */ | ||
249 | u8 tucso; /* TCP checksum offset */ | ||
250 | __le16 tucse; /* TCP checksum end */ | ||
251 | } tcp_fields; | ||
252 | } upper_setup; | ||
253 | __le32 cmd_and_length; | ||
254 | union { | ||
255 | __le32 data; | ||
256 | struct { | ||
257 | u8 status; /* Descriptor status */ | ||
258 | u8 hdr_len; /* Header length */ | ||
259 | __le16 mss; /* Maximum segment size */ | ||
260 | } fields; | ||
261 | } tcp_seg_setup; | ||
262 | }; | ||
263 | |||
264 | /* Offload data descriptor */ | ||
265 | struct e1000_data_desc { | ||
266 | __le64 buffer_addr; /* Address of the descriptor's buffer address */ | ||
267 | union { | ||
268 | __le32 data; | ||
269 | struct { | ||
270 | __le16 length; /* Data buffer length */ | ||
271 | u8 typ_len_ext; | ||
272 | u8 cmd; | ||
273 | } flags; | ||
274 | } lower; | ||
275 | union { | ||
276 | __le32 data; | ||
277 | struct { | ||
278 | u8 status; /* Descriptor status */ | ||
279 | u8 popts; /* Packet Options */ | ||
280 | __le16 special; | ||
281 | } fields; | ||
282 | } upper; | ||
283 | }; | ||
284 | |||
285 | /* Statistics counters collected by the MAC */ | 147 | /* Statistics counters collected by the MAC */ |
286 | struct e1000_hw_stats { | 148 | struct e1000_hw_stats { |
287 | u64 crcerrs; | 149 | u64 crcerrs; |
diff --git a/drivers/net/igb/igb.h b/drivers/net/igb/igb.h index 1f09e042a5f2..49fc0daf45af 100644 --- a/drivers/net/igb/igb.h +++ b/drivers/net/igb/igb.h | |||
@@ -180,9 +180,6 @@ struct igb_ring { | |||
180 | (&(((union e1000_adv_tx_desc *)((R).desc))[i])) | 180 | (&(((union e1000_adv_tx_desc *)((R).desc))[i])) |
181 | #define E1000_TX_CTXTDESC_ADV(R, i) \ | 181 | #define E1000_TX_CTXTDESC_ADV(R, i) \ |
182 | (&(((struct e1000_adv_tx_context_desc *)((R).desc))[i])) | 182 | (&(((struct e1000_adv_tx_context_desc *)((R).desc))[i])) |
183 | #define E1000_GET_DESC(R, i, type) (&(((struct type *)((R).desc))[i])) | ||
184 | #define E1000_TX_DESC(R, i) E1000_GET_DESC(R, i, e1000_tx_desc) | ||
185 | #define E1000_RX_DESC(R, i) E1000_GET_DESC(R, i, e1000_rx_desc) | ||
186 | 183 | ||
187 | /* board specific private data structure */ | 184 | /* board specific private data structure */ |
188 | 185 | ||
diff --git a/drivers/net/igb/igb_ethtool.c b/drivers/net/igb/igb_ethtool.c index 30b7bc008d9d..31f9a64773ff 100644 --- a/drivers/net/igb/igb_ethtool.c +++ b/drivers/net/igb/igb_ethtool.c | |||
@@ -1272,6 +1272,7 @@ static int igb_setup_desc_rings(struct igb_adapter *adapter) | |||
1272 | struct igb_ring *tx_ring = &adapter->test_tx_ring; | 1272 | struct igb_ring *tx_ring = &adapter->test_tx_ring; |
1273 | struct igb_ring *rx_ring = &adapter->test_rx_ring; | 1273 | struct igb_ring *rx_ring = &adapter->test_rx_ring; |
1274 | struct pci_dev *pdev = adapter->pdev; | 1274 | struct pci_dev *pdev = adapter->pdev; |
1275 | struct igb_buffer *buffer_info; | ||
1275 | u32 rctl; | 1276 | u32 rctl; |
1276 | int i, ret_val; | 1277 | int i, ret_val; |
1277 | 1278 | ||
@@ -1288,7 +1289,7 @@ static int igb_setup_desc_rings(struct igb_adapter *adapter) | |||
1288 | goto err_nomem; | 1289 | goto err_nomem; |
1289 | } | 1290 | } |
1290 | 1291 | ||
1291 | tx_ring->size = tx_ring->count * sizeof(struct e1000_tx_desc); | 1292 | tx_ring->size = tx_ring->count * sizeof(union e1000_adv_tx_desc); |
1292 | tx_ring->size = ALIGN(tx_ring->size, 4096); | 1293 | tx_ring->size = ALIGN(tx_ring->size, 4096); |
1293 | tx_ring->desc = pci_alloc_consistent(pdev, tx_ring->size, | 1294 | tx_ring->desc = pci_alloc_consistent(pdev, tx_ring->size, |
1294 | &tx_ring->dma); | 1295 | &tx_ring->dma); |
@@ -1302,7 +1303,7 @@ static int igb_setup_desc_rings(struct igb_adapter *adapter) | |||
1302 | ((u64) tx_ring->dma & 0x00000000FFFFFFFF)); | 1303 | ((u64) tx_ring->dma & 0x00000000FFFFFFFF)); |
1303 | wr32(E1000_TDBAH(0), ((u64) tx_ring->dma >> 32)); | 1304 | wr32(E1000_TDBAH(0), ((u64) tx_ring->dma >> 32)); |
1304 | wr32(E1000_TDLEN(0), | 1305 | wr32(E1000_TDLEN(0), |
1305 | tx_ring->count * sizeof(struct e1000_tx_desc)); | 1306 | tx_ring->count * sizeof(union e1000_adv_tx_desc)); |
1306 | wr32(E1000_TDH(0), 0); | 1307 | wr32(E1000_TDH(0), 0); |
1307 | wr32(E1000_TDT(0), 0); | 1308 | wr32(E1000_TDT(0), 0); |
1308 | wr32(E1000_TCTL, | 1309 | wr32(E1000_TCTL, |
@@ -1311,27 +1312,31 @@ static int igb_setup_desc_rings(struct igb_adapter *adapter) | |||
1311 | E1000_COLLISION_DISTANCE << E1000_COLD_SHIFT); | 1312 | E1000_COLLISION_DISTANCE << E1000_COLD_SHIFT); |
1312 | 1313 | ||
1313 | for (i = 0; i < tx_ring->count; i++) { | 1314 | for (i = 0; i < tx_ring->count; i++) { |
1314 | struct e1000_tx_desc *tx_desc = E1000_TX_DESC(*tx_ring, i); | 1315 | union e1000_adv_tx_desc *tx_desc; |
1315 | struct sk_buff *skb; | 1316 | struct sk_buff *skb; |
1316 | unsigned int size = 1024; | 1317 | unsigned int size = 1024; |
1317 | 1318 | ||
1319 | tx_desc = E1000_TX_DESC_ADV(*tx_ring, i); | ||
1318 | skb = alloc_skb(size, GFP_KERNEL); | 1320 | skb = alloc_skb(size, GFP_KERNEL); |
1319 | if (!skb) { | 1321 | if (!skb) { |
1320 | ret_val = 3; | 1322 | ret_val = 3; |
1321 | goto err_nomem; | 1323 | goto err_nomem; |
1322 | } | 1324 | } |
1323 | skb_put(skb, size); | 1325 | skb_put(skb, size); |
1324 | tx_ring->buffer_info[i].skb = skb; | 1326 | buffer_info = &tx_ring->buffer_info[i]; |
1325 | tx_ring->buffer_info[i].length = skb->len; | 1327 | buffer_info->skb = skb; |
1326 | tx_ring->buffer_info[i].dma = | 1328 | buffer_info->length = skb->len; |
1327 | pci_map_single(pdev, skb->data, skb->len, | 1329 | buffer_info->dma = pci_map_single(pdev, skb->data, skb->len, |
1328 | PCI_DMA_TODEVICE); | 1330 | PCI_DMA_TODEVICE); |
1329 | tx_desc->buffer_addr = cpu_to_le64(tx_ring->buffer_info[i].dma); | 1331 | tx_desc->read.buffer_addr = cpu_to_le64(buffer_info->dma); |
1330 | tx_desc->lower.data = cpu_to_le32(skb->len); | 1332 | tx_desc->read.olinfo_status = cpu_to_le32(skb->len) << |
1331 | tx_desc->lower.data |= cpu_to_le32(E1000_TXD_CMD_EOP | | 1333 | E1000_ADVTXD_PAYLEN_SHIFT; |
1332 | E1000_TXD_CMD_IFCS | | 1334 | tx_desc->read.cmd_type_len = cpu_to_le32(skb->len); |
1333 | E1000_TXD_CMD_RS); | 1335 | tx_desc->read.cmd_type_len |= cpu_to_le32(E1000_TXD_CMD_EOP | |
1334 | tx_desc->upper.data = 0; | 1336 | E1000_TXD_CMD_IFCS | |
1337 | E1000_TXD_CMD_RS | | ||
1338 | E1000_ADVTXD_DTYP_DATA | | ||
1339 | E1000_ADVTXD_DCMD_DEXT); | ||
1335 | } | 1340 | } |
1336 | 1341 | ||
1337 | /* Setup Rx descriptor ring and Rx buffers */ | 1342 | /* Setup Rx descriptor ring and Rx buffers */ |
@@ -1347,7 +1352,7 @@ static int igb_setup_desc_rings(struct igb_adapter *adapter) | |||
1347 | goto err_nomem; | 1352 | goto err_nomem; |
1348 | } | 1353 | } |
1349 | 1354 | ||
1350 | rx_ring->size = rx_ring->count * sizeof(struct e1000_rx_desc); | 1355 | rx_ring->size = rx_ring->count * sizeof(union e1000_adv_rx_desc); |
1351 | rx_ring->desc = pci_alloc_consistent(pdev, rx_ring->size, | 1356 | rx_ring->desc = pci_alloc_consistent(pdev, rx_ring->size, |
1352 | &rx_ring->dma); | 1357 | &rx_ring->dma); |
1353 | if (!rx_ring->desc) { | 1358 | if (!rx_ring->desc) { |
@@ -1369,12 +1374,14 @@ static int igb_setup_desc_rings(struct igb_adapter *adapter) | |||
1369 | rctl = E1000_RCTL_EN | E1000_RCTL_BAM | E1000_RCTL_RDMTS_HALF | | 1374 | rctl = E1000_RCTL_EN | E1000_RCTL_BAM | E1000_RCTL_RDMTS_HALF | |
1370 | (adapter->hw.mac.mc_filter_type << E1000_RCTL_MO_SHIFT); | 1375 | (adapter->hw.mac.mc_filter_type << E1000_RCTL_MO_SHIFT); |
1371 | wr32(E1000_RCTL, rctl); | 1376 | wr32(E1000_RCTL, rctl); |
1372 | wr32(E1000_SRRCTL(0), 0); | 1377 | wr32(E1000_SRRCTL(0), E1000_SRRCTL_DESCTYPE_ADV_ONEBUF); |
1373 | 1378 | ||
1374 | for (i = 0; i < rx_ring->count; i++) { | 1379 | for (i = 0; i < rx_ring->count; i++) { |
1375 | struct e1000_rx_desc *rx_desc = E1000_RX_DESC(*rx_ring, i); | 1380 | union e1000_adv_rx_desc *rx_desc; |
1376 | struct sk_buff *skb; | 1381 | struct sk_buff *skb; |
1377 | 1382 | ||
1383 | buffer_info = &rx_ring->buffer_info[i]; | ||
1384 | rx_desc = E1000_RX_DESC_ADV(*rx_ring, i); | ||
1378 | skb = alloc_skb(IGB_RXBUFFER_2048 + NET_IP_ALIGN, | 1385 | skb = alloc_skb(IGB_RXBUFFER_2048 + NET_IP_ALIGN, |
1379 | GFP_KERNEL); | 1386 | GFP_KERNEL); |
1380 | if (!skb) { | 1387 | if (!skb) { |
@@ -1382,11 +1389,11 @@ static int igb_setup_desc_rings(struct igb_adapter *adapter) | |||
1382 | goto err_nomem; | 1389 | goto err_nomem; |
1383 | } | 1390 | } |
1384 | skb_reserve(skb, NET_IP_ALIGN); | 1391 | skb_reserve(skb, NET_IP_ALIGN); |
1385 | rx_ring->buffer_info[i].skb = skb; | 1392 | buffer_info->skb = skb; |
1386 | rx_ring->buffer_info[i].dma = | 1393 | buffer_info->dma = pci_map_single(pdev, skb->data, |
1387 | pci_map_single(pdev, skb->data, IGB_RXBUFFER_2048, | 1394 | IGB_RXBUFFER_2048, |
1388 | PCI_DMA_FROMDEVICE); | 1395 | PCI_DMA_FROMDEVICE); |
1389 | rx_desc->buffer_addr = cpu_to_le64(rx_ring->buffer_info[i].dma); | 1396 | rx_desc->read.pkt_addr = cpu_to_le64(buffer_info->dma); |
1390 | memset(skb->data, 0x00, skb->len); | 1397 | memset(skb->data, 0x00, skb->len); |
1391 | } | 1398 | } |
1392 | 1399 | ||
diff --git a/drivers/net/igb/igb_main.c b/drivers/net/igb/igb_main.c index 23209bd4f401..43f489aba191 100644 --- a/drivers/net/igb/igb_main.c +++ b/drivers/net/igb/igb_main.c | |||
@@ -994,7 +994,7 @@ void igb_reset(struct igb_adapter *adapter) | |||
994 | /* the tx fifo also stores 16 bytes of information about the tx | 994 | /* the tx fifo also stores 16 bytes of information about the tx |
995 | * but don't include ethernet FCS because hardware appends it */ | 995 | * but don't include ethernet FCS because hardware appends it */ |
996 | min_tx_space = (adapter->max_frame_size + | 996 | min_tx_space = (adapter->max_frame_size + |
997 | sizeof(struct e1000_tx_desc) - | 997 | sizeof(union e1000_adv_tx_desc) - |
998 | ETH_FCS_LEN) * 2; | 998 | ETH_FCS_LEN) * 2; |
999 | min_tx_space = ALIGN(min_tx_space, 1024); | 999 | min_tx_space = ALIGN(min_tx_space, 1024); |
1000 | min_tx_space >>= 10; | 1000 | min_tx_space >>= 10; |
@@ -1704,7 +1704,7 @@ int igb_setup_tx_resources(struct igb_adapter *adapter, | |||
1704 | memset(tx_ring->buffer_info, 0, size); | 1704 | memset(tx_ring->buffer_info, 0, size); |
1705 | 1705 | ||
1706 | /* round up to nearest 4K */ | 1706 | /* round up to nearest 4K */ |
1707 | tx_ring->size = tx_ring->count * sizeof(struct e1000_tx_desc); | 1707 | tx_ring->size = tx_ring->count * sizeof(union e1000_adv_tx_desc); |
1708 | tx_ring->size = ALIGN(tx_ring->size, 4096); | 1708 | tx_ring->size = ALIGN(tx_ring->size, 4096); |
1709 | 1709 | ||
1710 | tx_ring->desc = pci_alloc_consistent(pdev, tx_ring->size, | 1710 | tx_ring->desc = pci_alloc_consistent(pdev, tx_ring->size, |
@@ -1773,7 +1773,7 @@ static void igb_configure_tx(struct igb_adapter *adapter) | |||
1773 | struct igb_ring *ring = &adapter->tx_ring[i]; | 1773 | struct igb_ring *ring = &adapter->tx_ring[i]; |
1774 | j = ring->reg_idx; | 1774 | j = ring->reg_idx; |
1775 | wr32(E1000_TDLEN(j), | 1775 | wr32(E1000_TDLEN(j), |
1776 | ring->count * sizeof(struct e1000_tx_desc)); | 1776 | ring->count * sizeof(union e1000_adv_tx_desc)); |
1777 | tdba = ring->dma; | 1777 | tdba = ring->dma; |
1778 | wr32(E1000_TDBAL(j), | 1778 | wr32(E1000_TDBAL(j), |
1779 | tdba & 0x00000000ffffffffULL); | 1779 | tdba & 0x00000000ffffffffULL); |