diff options
-rw-r--r-- | arch/avr32/boards/atstk1000/atstk1002.c | 23 | ||||
-rw-r--r-- | arch/avr32/mach-at32ap/at32ap7000.c | 10 | ||||
-rw-r--r-- | include/asm-avr32/arch-at32ap/at32ap7000.h | 2 | ||||
-rw-r--r-- | include/asm-avr32/arch-at32ap/irq.h | 2 |
4 files changed, 36 insertions, 1 deletions
diff --git a/arch/avr32/boards/atstk1000/atstk1002.c b/arch/avr32/boards/atstk1000/atstk1002.c index 3787d6bfe0d7..bca815ff11f2 100644 --- a/arch/avr32/boards/atstk1000/atstk1002.c +++ b/arch/avr32/boards/atstk1000/atstk1002.c | |||
@@ -19,6 +19,7 @@ | |||
19 | #include <asm/setup.h> | 19 | #include <asm/setup.h> |
20 | #include <asm/arch/board.h> | 20 | #include <asm/arch/board.h> |
21 | #include <asm/arch/init.h> | 21 | #include <asm/arch/init.h> |
22 | #include <asm/arch/portmux.h> | ||
22 | 23 | ||
23 | 24 | ||
24 | #define SW2_DEFAULT /* MMCI and UART_A available */ | 25 | #define SW2_DEFAULT /* MMCI and UART_A available */ |
@@ -102,6 +103,28 @@ void __init setup_board(void) | |||
102 | 103 | ||
103 | static int __init atstk1002_init(void) | 104 | static int __init atstk1002_init(void) |
104 | { | 105 | { |
106 | /* | ||
107 | * ATSTK1000 uses 32-bit SDRAM interface. Reserve the | ||
108 | * SDRAM-specific pins so that nobody messes with them. | ||
109 | */ | ||
110 | at32_reserve_pin(GPIO_PIN_PE(0)); /* DATA[16] */ | ||
111 | at32_reserve_pin(GPIO_PIN_PE(1)); /* DATA[17] */ | ||
112 | at32_reserve_pin(GPIO_PIN_PE(2)); /* DATA[18] */ | ||
113 | at32_reserve_pin(GPIO_PIN_PE(3)); /* DATA[19] */ | ||
114 | at32_reserve_pin(GPIO_PIN_PE(4)); /* DATA[20] */ | ||
115 | at32_reserve_pin(GPIO_PIN_PE(5)); /* DATA[21] */ | ||
116 | at32_reserve_pin(GPIO_PIN_PE(6)); /* DATA[22] */ | ||
117 | at32_reserve_pin(GPIO_PIN_PE(7)); /* DATA[23] */ | ||
118 | at32_reserve_pin(GPIO_PIN_PE(8)); /* DATA[24] */ | ||
119 | at32_reserve_pin(GPIO_PIN_PE(9)); /* DATA[25] */ | ||
120 | at32_reserve_pin(GPIO_PIN_PE(10)); /* DATA[26] */ | ||
121 | at32_reserve_pin(GPIO_PIN_PE(11)); /* DATA[27] */ | ||
122 | at32_reserve_pin(GPIO_PIN_PE(12)); /* DATA[28] */ | ||
123 | at32_reserve_pin(GPIO_PIN_PE(13)); /* DATA[29] */ | ||
124 | at32_reserve_pin(GPIO_PIN_PE(14)); /* DATA[30] */ | ||
125 | at32_reserve_pin(GPIO_PIN_PE(15)); /* DATA[31] */ | ||
126 | at32_reserve_pin(GPIO_PIN_PE(26)); /* SDCS */ | ||
127 | |||
105 | at32_add_system_devices(); | 128 | at32_add_system_devices(); |
106 | 129 | ||
107 | #ifdef SW2_DEFAULT | 130 | #ifdef SW2_DEFAULT |
diff --git a/arch/avr32/mach-at32ap/at32ap7000.c b/arch/avr32/mach-at32ap/at32ap7000.c index 21561ab60471..981d553e471b 100644 --- a/arch/avr32/mach-at32ap/at32ap7000.c +++ b/arch/avr32/mach-at32ap/at32ap7000.c | |||
@@ -496,6 +496,13 @@ static struct resource pio3_resource[] = { | |||
496 | DEFINE_DEV(pio, 3); | 496 | DEFINE_DEV(pio, 3); |
497 | DEV_CLK(mck, pio3, pba, 13); | 497 | DEV_CLK(mck, pio3, pba, 13); |
498 | 498 | ||
499 | static struct resource pio4_resource[] = { | ||
500 | PBMEM(0xffe03800), | ||
501 | IRQ(17), | ||
502 | }; | ||
503 | DEFINE_DEV(pio, 4); | ||
504 | DEV_CLK(mck, pio4, pba, 14); | ||
505 | |||
499 | void __init at32_add_system_devices(void) | 506 | void __init at32_add_system_devices(void) |
500 | { | 507 | { |
501 | system_manager.eim_first_irq = EIM_IRQ_BASE; | 508 | system_manager.eim_first_irq = EIM_IRQ_BASE; |
@@ -509,6 +516,7 @@ void __init at32_add_system_devices(void) | |||
509 | platform_device_register(&pio1_device); | 516 | platform_device_register(&pio1_device); |
510 | platform_device_register(&pio2_device); | 517 | platform_device_register(&pio2_device); |
511 | platform_device_register(&pio3_device); | 518 | platform_device_register(&pio3_device); |
519 | platform_device_register(&pio4_device); | ||
512 | } | 520 | } |
513 | 521 | ||
514 | /* -------------------------------------------------------------------- | 522 | /* -------------------------------------------------------------------- |
@@ -860,6 +868,7 @@ struct clk *at32_clock_list[] = { | |||
860 | &pio1_mck, | 868 | &pio1_mck, |
861 | &pio2_mck, | 869 | &pio2_mck, |
862 | &pio3_mck, | 870 | &pio3_mck, |
871 | &pio4_mck, | ||
863 | &atmel_usart0_usart, | 872 | &atmel_usart0_usart, |
864 | &atmel_usart1_usart, | 873 | &atmel_usart1_usart, |
865 | &atmel_usart2_usart, | 874 | &atmel_usart2_usart, |
@@ -880,6 +889,7 @@ void __init at32_portmux_init(void) | |||
880 | at32_init_pio(&pio1_device); | 889 | at32_init_pio(&pio1_device); |
881 | at32_init_pio(&pio2_device); | 890 | at32_init_pio(&pio2_device); |
882 | at32_init_pio(&pio3_device); | 891 | at32_init_pio(&pio3_device); |
892 | at32_init_pio(&pio4_device); | ||
883 | } | 893 | } |
884 | 894 | ||
885 | void __init at32_clock_init(void) | 895 | void __init at32_clock_init(void) |
diff --git a/include/asm-avr32/arch-at32ap/at32ap7000.h b/include/asm-avr32/arch-at32ap/at32ap7000.h index ba85e04553d4..3914d7b94ff4 100644 --- a/include/asm-avr32/arch-at32ap/at32ap7000.h +++ b/include/asm-avr32/arch-at32ap/at32ap7000.h | |||
@@ -24,10 +24,12 @@ | |||
24 | #define GPIO_PIOB_BASE (GPIO_PIOA_BASE + 32) | 24 | #define GPIO_PIOB_BASE (GPIO_PIOA_BASE + 32) |
25 | #define GPIO_PIOC_BASE (GPIO_PIOB_BASE + 32) | 25 | #define GPIO_PIOC_BASE (GPIO_PIOB_BASE + 32) |
26 | #define GPIO_PIOD_BASE (GPIO_PIOC_BASE + 32) | 26 | #define GPIO_PIOD_BASE (GPIO_PIOC_BASE + 32) |
27 | #define GPIO_PIOE_BASE (GPIO_PIOD_BASE + 32) | ||
27 | 28 | ||
28 | #define GPIO_PIN_PA(N) (GPIO_PIOA_BASE + (N)) | 29 | #define GPIO_PIN_PA(N) (GPIO_PIOA_BASE + (N)) |
29 | #define GPIO_PIN_PB(N) (GPIO_PIOB_BASE + (N)) | 30 | #define GPIO_PIN_PB(N) (GPIO_PIOB_BASE + (N)) |
30 | #define GPIO_PIN_PC(N) (GPIO_PIOC_BASE + (N)) | 31 | #define GPIO_PIN_PC(N) (GPIO_PIOC_BASE + (N)) |
31 | #define GPIO_PIN_PD(N) (GPIO_PIOD_BASE + (N)) | 32 | #define GPIO_PIN_PD(N) (GPIO_PIOD_BASE + (N)) |
33 | #define GPIO_PIN_PE(N) (GPIO_PIOE_BASE + (N)) | ||
32 | 34 | ||
33 | #endif /* __ASM_ARCH_AT32AP7000_H__ */ | 35 | #endif /* __ASM_ARCH_AT32AP7000_H__ */ |
diff --git a/include/asm-avr32/arch-at32ap/irq.h b/include/asm-avr32/arch-at32ap/irq.h index f8f7f4571e44..5adffab9a577 100644 --- a/include/asm-avr32/arch-at32ap/irq.h +++ b/include/asm-avr32/arch-at32ap/irq.h | |||
@@ -7,7 +7,7 @@ | |||
7 | #define AT32_EXTINT(n) (EIM_IRQ_BASE + (n)) | 7 | #define AT32_EXTINT(n) (EIM_IRQ_BASE + (n)) |
8 | 8 | ||
9 | #define GPIO_IRQ_BASE (EIM_IRQ_BASE + NR_EIM_IRQS) | 9 | #define GPIO_IRQ_BASE (EIM_IRQ_BASE + NR_EIM_IRQS) |
10 | #define NR_GPIO_IRQS (4 * 32) | 10 | #define NR_GPIO_IRQS (5 * 32) |
11 | 11 | ||
12 | #define NR_IRQS (GPIO_IRQ_BASE + NR_GPIO_IRQS) | 12 | #define NR_IRQS (GPIO_IRQ_BASE + NR_GPIO_IRQS) |
13 | 13 | ||