diff options
-rw-r--r-- | arch/parisc/kernel/entry.S | 6 | ||||
-rw-r--r-- | arch/parisc/kernel/syscall.S | 2 | ||||
-rw-r--r-- | include/asm-parisc/assembly.h | 2 | ||||
-rw-r--r-- | include/asm-parisc/system.h | 26 |
4 files changed, 20 insertions, 16 deletions
diff --git a/arch/parisc/kernel/entry.S b/arch/parisc/kernel/entry.S index d9e53cf0372b..630730c32a5a 100644 --- a/arch/parisc/kernel/entry.S +++ b/arch/parisc/kernel/entry.S | |||
@@ -1638,7 +1638,7 @@ dbit_trap_20w: | |||
1638 | load32 PA(pa_dbit_lock),t0 | 1638 | load32 PA(pa_dbit_lock),t0 |
1639 | 1639 | ||
1640 | dbit_spin_20w: | 1640 | dbit_spin_20w: |
1641 | ldcw 0(t0),t1 | 1641 | LDCW 0(t0),t1 |
1642 | cmpib,= 0,t1,dbit_spin_20w | 1642 | cmpib,= 0,t1,dbit_spin_20w |
1643 | nop | 1643 | nop |
1644 | 1644 | ||
@@ -1674,7 +1674,7 @@ dbit_trap_11: | |||
1674 | load32 PA(pa_dbit_lock),t0 | 1674 | load32 PA(pa_dbit_lock),t0 |
1675 | 1675 | ||
1676 | dbit_spin_11: | 1676 | dbit_spin_11: |
1677 | ldcw 0(t0),t1 | 1677 | LDCW 0(t0),t1 |
1678 | cmpib,= 0,t1,dbit_spin_11 | 1678 | cmpib,= 0,t1,dbit_spin_11 |
1679 | nop | 1679 | nop |
1680 | 1680 | ||
@@ -1714,7 +1714,7 @@ dbit_trap_20: | |||
1714 | load32 PA(pa_dbit_lock),t0 | 1714 | load32 PA(pa_dbit_lock),t0 |
1715 | 1715 | ||
1716 | dbit_spin_20: | 1716 | dbit_spin_20: |
1717 | ldcw 0(t0),t1 | 1717 | LDCW 0(t0),t1 |
1718 | cmpib,= 0,t1,dbit_spin_20 | 1718 | cmpib,= 0,t1,dbit_spin_20 |
1719 | nop | 1719 | nop |
1720 | 1720 | ||
diff --git a/arch/parisc/kernel/syscall.S b/arch/parisc/kernel/syscall.S index 479d9a017cd1..a028c990cbff 100644 --- a/arch/parisc/kernel/syscall.S +++ b/arch/parisc/kernel/syscall.S | |||
@@ -541,7 +541,7 @@ cas_nocontend: | |||
541 | # endif | 541 | # endif |
542 | /* ENABLE_LWS_DEBUG */ | 542 | /* ENABLE_LWS_DEBUG */ |
543 | 543 | ||
544 | ldcw 0(%sr2,%r20), %r28 /* Try to acquire the lock */ | 544 | LDCW 0(%sr2,%r20), %r28 /* Try to acquire the lock */ |
545 | cmpb,<>,n %r0, %r28, cas_action /* Did we get it? */ | 545 | cmpb,<>,n %r0, %r28, cas_action /* Did we get it? */ |
546 | cas_wouldblock: | 546 | cas_wouldblock: |
547 | ldo 2(%r0), %r28 /* 2nd case */ | 547 | ldo 2(%r0), %r28 /* 2nd case */ |
diff --git a/include/asm-parisc/assembly.h b/include/asm-parisc/assembly.h index 3ce3440d1b0c..1a7bfe699e0c 100644 --- a/include/asm-parisc/assembly.h +++ b/include/asm-parisc/assembly.h | |||
@@ -48,6 +48,7 @@ | |||
48 | #define CALLEE_SAVE_FRAME_SIZE (CALLEE_REG_FRAME_SIZE + CALLEE_FLOAT_FRAME_SIZE) | 48 | #define CALLEE_SAVE_FRAME_SIZE (CALLEE_REG_FRAME_SIZE + CALLEE_FLOAT_FRAME_SIZE) |
49 | 49 | ||
50 | #ifdef CONFIG_PA20 | 50 | #ifdef CONFIG_PA20 |
51 | #define LDCW ldcw,co | ||
51 | #define BL b,l | 52 | #define BL b,l |
52 | # ifdef CONFIG_64BIT | 53 | # ifdef CONFIG_64BIT |
53 | # define LEVEL 2.0w | 54 | # define LEVEL 2.0w |
@@ -55,6 +56,7 @@ | |||
55 | # define LEVEL 2.0 | 56 | # define LEVEL 2.0 |
56 | # endif | 57 | # endif |
57 | #else | 58 | #else |
59 | #define LDCW ldcw | ||
58 | #define BL bl | 60 | #define BL bl |
59 | #define LEVEL 1.1 | 61 | #define LEVEL 1.1 |
60 | #endif | 62 | #endif |
diff --git a/include/asm-parisc/system.h b/include/asm-parisc/system.h index 863876134b2c..5fe2d2329ab5 100644 --- a/include/asm-parisc/system.h +++ b/include/asm-parisc/system.h | |||
@@ -155,13 +155,14 @@ static inline void set_eiem(unsigned long val) | |||
155 | type and dynamically select the 16-byte aligned int from the array | 155 | type and dynamically select the 16-byte aligned int from the array |
156 | for the semaphore. */ | 156 | for the semaphore. */ |
157 | 157 | ||
158 | #define __PA_LDCW_ALIGNMENT 16 | 158 | #define __PA_LDCW_ALIGNMENT 16 |
159 | #define __ldcw_align(a) ({ \ | 159 | #define __ldcw_align(a) ({ \ |
160 | unsigned long __ret = (unsigned long) &(a)->lock[0]; \ | 160 | unsigned long __ret = (unsigned long) &(a)->lock[0]; \ |
161 | __ret = (__ret + __PA_LDCW_ALIGNMENT - 1) & ~(__PA_LDCW_ALIGNMENT - 1); \ | 161 | __ret = (__ret + __PA_LDCW_ALIGNMENT - 1) \ |
162 | (volatile unsigned int *) __ret; \ | 162 | & ~(__PA_LDCW_ALIGNMENT - 1); \ |
163 | (volatile unsigned int *) __ret; \ | ||
163 | }) | 164 | }) |
164 | #define LDCW "ldcw" | 165 | #define __LDCW "ldcw" |
165 | 166 | ||
166 | #else /*CONFIG_PA20*/ | 167 | #else /*CONFIG_PA20*/ |
167 | /* From: "Jim Hull" <jim.hull of hp.com> | 168 | /* From: "Jim Hull" <jim.hull of hp.com> |
@@ -171,17 +172,18 @@ static inline void set_eiem(unsigned long val) | |||
171 | they only require "natural" alignment (4-byte for ldcw, 8-byte for | 172 | they only require "natural" alignment (4-byte for ldcw, 8-byte for |
172 | ldcd). */ | 173 | ldcd). */ |
173 | 174 | ||
174 | #define __PA_LDCW_ALIGNMENT 4 | 175 | #define __PA_LDCW_ALIGNMENT 4 |
175 | #define __ldcw_align(a) ((volatile unsigned int *)a) | 176 | #define __ldcw_align(a) ((volatile unsigned int *)a) |
176 | #define LDCW "ldcw,co" | 177 | #define __LDCW "ldcw,co" |
177 | 178 | ||
178 | #endif /*!CONFIG_PA20*/ | 179 | #endif /*!CONFIG_PA20*/ |
179 | 180 | ||
180 | /* LDCW, the only atomic read-write operation PA-RISC has. *sigh*. */ | 181 | /* LDCW, the only atomic read-write operation PA-RISC has. *sigh*. */ |
181 | #define __ldcw(a) ({ \ | 182 | #define __ldcw(a) ({ \ |
182 | unsigned __ret; \ | 183 | unsigned __ret; \ |
183 | __asm__ __volatile__(LDCW " 0(%1),%0" : "=r" (__ret) : "r" (a)); \ | 184 | __asm__ __volatile__(__LDCW " 0(%1),%0" \ |
184 | __ret; \ | 185 | : "=r" (__ret) : "r" (a)); \ |
186 | __ret; \ | ||
185 | }) | 187 | }) |
186 | 188 | ||
187 | #ifdef CONFIG_SMP | 189 | #ifdef CONFIG_SMP |