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-rw-r--r--drivers/gpu/drm/drm_sysfs.c51
-rw-r--r--drivers/gpu/drm/radeon/r100.c10
-rw-r--r--drivers/gpu/drm/radeon/r300.c4
-rw-r--r--drivers/gpu/drm/radeon/r420.c13
-rw-r--r--drivers/gpu/drm/radeon/r520.c1
-rw-r--r--drivers/gpu/drm/radeon/radeon.h1
-rw-r--r--drivers/gpu/drm/radeon/radeon_cp.c9
-rw-r--r--drivers/gpu/drm/radeon/radeon_drv.h5
-rw-r--r--drivers/gpu/drm/radeon/radeon_gem.c2
-rw-r--r--drivers/gpu/drm/radeon/radeon_kms.c4
-rw-r--r--drivers/gpu/drm/radeon/radeon_reg.h5
-rw-r--r--drivers/gpu/drm/radeon/radeon_state.c3
-rw-r--r--include/drm/radeon_drm.h4
13 files changed, 85 insertions, 27 deletions
diff --git a/drivers/gpu/drm/drm_sysfs.c b/drivers/gpu/drm/drm_sysfs.c
index 85ec31b3ff00..f7a615b80c70 100644
--- a/drivers/gpu/drm/drm_sysfs.c
+++ b/drivers/gpu/drm/drm_sysfs.c
@@ -22,44 +22,50 @@
22#define to_drm_minor(d) container_of(d, struct drm_minor, kdev) 22#define to_drm_minor(d) container_of(d, struct drm_minor, kdev)
23#define to_drm_connector(d) container_of(d, struct drm_connector, kdev) 23#define to_drm_connector(d) container_of(d, struct drm_connector, kdev)
24 24
25static struct device_type drm_sysfs_device_minor = {
26 .name = "drm_minor"
27};
28
25/** 29/**
26 * drm_sysfs_suspend - DRM class suspend hook 30 * drm_class_suspend - DRM class suspend hook
27 * @dev: Linux device to suspend 31 * @dev: Linux device to suspend
28 * @state: power state to enter 32 * @state: power state to enter
29 * 33 *
30 * Just figures out what the actual struct drm_device associated with 34 * Just figures out what the actual struct drm_device associated with
31 * @dev is and calls its suspend hook, if present. 35 * @dev is and calls its suspend hook, if present.
32 */ 36 */
33static int drm_sysfs_suspend(struct device *dev, pm_message_t state) 37static int drm_class_suspend(struct device *dev, pm_message_t state)
34{ 38{
35 struct drm_minor *drm_minor = to_drm_minor(dev); 39 if (dev->type == &drm_sysfs_device_minor) {
36 struct drm_device *drm_dev = drm_minor->dev; 40 struct drm_minor *drm_minor = to_drm_minor(dev);
37 41 struct drm_device *drm_dev = drm_minor->dev;
38 if (drm_minor->type == DRM_MINOR_LEGACY && 42
39 !drm_core_check_feature(drm_dev, DRIVER_MODESET) && 43 if (drm_minor->type == DRM_MINOR_LEGACY &&
40 drm_dev->driver->suspend) 44 !drm_core_check_feature(drm_dev, DRIVER_MODESET) &&
41 return drm_dev->driver->suspend(drm_dev, state); 45 drm_dev->driver->suspend)
42 46 return drm_dev->driver->suspend(drm_dev, state);
47 }
43 return 0; 48 return 0;
44} 49}
45 50
46/** 51/**
47 * drm_sysfs_resume - DRM class resume hook 52 * drm_class_resume - DRM class resume hook
48 * @dev: Linux device to resume 53 * @dev: Linux device to resume
49 * 54 *
50 * Just figures out what the actual struct drm_device associated with 55 * Just figures out what the actual struct drm_device associated with
51 * @dev is and calls its resume hook, if present. 56 * @dev is and calls its resume hook, if present.
52 */ 57 */
53static int drm_sysfs_resume(struct device *dev) 58static int drm_class_resume(struct device *dev)
54{ 59{
55 struct drm_minor *drm_minor = to_drm_minor(dev); 60 if (dev->type == &drm_sysfs_device_minor) {
56 struct drm_device *drm_dev = drm_minor->dev; 61 struct drm_minor *drm_minor = to_drm_minor(dev);
57 62 struct drm_device *drm_dev = drm_minor->dev;
58 if (drm_minor->type == DRM_MINOR_LEGACY && 63
59 !drm_core_check_feature(drm_dev, DRIVER_MODESET) && 64 if (drm_minor->type == DRM_MINOR_LEGACY &&
60 drm_dev->driver->resume) 65 !drm_core_check_feature(drm_dev, DRIVER_MODESET) &&
61 return drm_dev->driver->resume(drm_dev); 66 drm_dev->driver->resume)
62 67 return drm_dev->driver->resume(drm_dev);
68 }
63 return 0; 69 return 0;
64} 70}
65 71
@@ -99,8 +105,8 @@ struct class *drm_sysfs_create(struct module *owner, char *name)
99 goto err_out; 105 goto err_out;
100 } 106 }
101 107
102 class->suspend = drm_sysfs_suspend; 108 class->suspend = drm_class_suspend;
103 class->resume = drm_sysfs_resume; 109 class->resume = drm_class_resume;
104 110
105 err = class_create_file(class, &class_attr_version); 111 err = class_create_file(class, &class_attr_version);
106 if (err) 112 if (err)
@@ -480,6 +486,7 @@ int drm_sysfs_device_add(struct drm_minor *minor)
480 minor->kdev.class = drm_class; 486 minor->kdev.class = drm_class;
481 minor->kdev.release = drm_sysfs_device_release; 487 minor->kdev.release = drm_sysfs_device_release;
482 minor->kdev.devt = minor->device; 488 minor->kdev.devt = minor->device;
489 minor->kdev.type = &drm_sysfs_device_minor;
483 if (minor->type == DRM_MINOR_CONTROL) 490 if (minor->type == DRM_MINOR_CONTROL)
484 minor_str = "controlD%d"; 491 minor_str = "controlD%d";
485 else if (minor->type == DRM_MINOR_RENDER) 492 else if (minor->type == DRM_MINOR_RENDER)
diff --git a/drivers/gpu/drm/radeon/r100.c b/drivers/gpu/drm/radeon/r100.c
index 90ff8e0ac04e..68e728e8be4d 100644
--- a/drivers/gpu/drm/radeon/r100.c
+++ b/drivers/gpu/drm/radeon/r100.c
@@ -1091,6 +1091,16 @@ static int r100_packet0_check(struct radeon_cs_parser *p,
1091 tmp |= tile_flags; 1091 tmp |= tile_flags;
1092 ib[idx] = tmp; 1092 ib[idx] = tmp;
1093 break; 1093 break;
1094 case RADEON_RB3D_ZPASS_ADDR:
1095 r = r100_cs_packet_next_reloc(p, &reloc);
1096 if (r) {
1097 DRM_ERROR("No reloc for ib[%d]=0x%04X\n",
1098 idx, reg);
1099 r100_cs_dump_packet(p, pkt);
1100 return r;
1101 }
1102 ib[idx] = ib_chunk->kdata[idx] + ((u32)reloc->lobj.gpu_offset);
1103 break;
1094 default: 1104 default:
1095 /* FIXME: we don't want to allow anyothers packet */ 1105 /* FIXME: we don't want to allow anyothers packet */
1096 break; 1106 break;
diff --git a/drivers/gpu/drm/radeon/r300.c b/drivers/gpu/drm/radeon/r300.c
index c47579dcafa1..053f4ec397f7 100644
--- a/drivers/gpu/drm/radeon/r300.c
+++ b/drivers/gpu/drm/radeon/r300.c
@@ -448,6 +448,7 @@ void r300_gpu_init(struct radeon_device *rdev)
448 /* rv350,rv370,rv380 */ 448 /* rv350,rv370,rv380 */
449 rdev->num_gb_pipes = 1; 449 rdev->num_gb_pipes = 1;
450 } 450 }
451 rdev->num_z_pipes = 1;
451 gb_tile_config = (R300_ENABLE_TILING | R300_TILE_SIZE_16); 452 gb_tile_config = (R300_ENABLE_TILING | R300_TILE_SIZE_16);
452 switch (rdev->num_gb_pipes) { 453 switch (rdev->num_gb_pipes) {
453 case 2: 454 case 2:
@@ -486,7 +487,8 @@ void r300_gpu_init(struct radeon_device *rdev)
486 printk(KERN_WARNING "Failed to wait MC idle while " 487 printk(KERN_WARNING "Failed to wait MC idle while "
487 "programming pipes. Bad things might happen.\n"); 488 "programming pipes. Bad things might happen.\n");
488 } 489 }
489 DRM_INFO("radeon: %d pipes initialized.\n", rdev->num_gb_pipes); 490 DRM_INFO("radeon: %d quad pipes, %d Z pipes initialized.\n",
491 rdev->num_gb_pipes, rdev->num_z_pipes);
490} 492}
491 493
492int r300_ga_reset(struct radeon_device *rdev) 494int r300_ga_reset(struct radeon_device *rdev)
diff --git a/drivers/gpu/drm/radeon/r420.c b/drivers/gpu/drm/radeon/r420.c
index dea497a979f2..97426a6f370f 100644
--- a/drivers/gpu/drm/radeon/r420.c
+++ b/drivers/gpu/drm/radeon/r420.c
@@ -165,7 +165,18 @@ void r420_pipes_init(struct radeon_device *rdev)
165 printk(KERN_WARNING "Failed to wait GUI idle while " 165 printk(KERN_WARNING "Failed to wait GUI idle while "
166 "programming pipes. Bad things might happen.\n"); 166 "programming pipes. Bad things might happen.\n");
167 } 167 }
168 DRM_INFO("radeon: %d pipes initialized.\n", rdev->num_gb_pipes); 168
169 if (rdev->family == CHIP_RV530) {
170 tmp = RREG32(RV530_GB_PIPE_SELECT2);
171 if ((tmp & 3) == 3)
172 rdev->num_z_pipes = 2;
173 else
174 rdev->num_z_pipes = 1;
175 } else
176 rdev->num_z_pipes = 1;
177
178 DRM_INFO("radeon: %d quad pipes, %d z pipes initialized.\n",
179 rdev->num_gb_pipes, rdev->num_z_pipes);
169} 180}
170 181
171void r420_gpu_init(struct radeon_device *rdev) 182void r420_gpu_init(struct radeon_device *rdev)
diff --git a/drivers/gpu/drm/radeon/r520.c b/drivers/gpu/drm/radeon/r520.c
index 09fb0b6ec7dd..ebd6b0f7bdff 100644
--- a/drivers/gpu/drm/radeon/r520.c
+++ b/drivers/gpu/drm/radeon/r520.c
@@ -177,7 +177,6 @@ void r520_gpu_init(struct radeon_device *rdev)
177 */ 177 */
178 /* workaround for RV530 */ 178 /* workaround for RV530 */
179 if (rdev->family == CHIP_RV530) { 179 if (rdev->family == CHIP_RV530) {
180 WREG32(0x4124, 1);
181 WREG32(0x4128, 0xFF); 180 WREG32(0x4128, 0xFF);
182 } 181 }
183 r420_pipes_init(rdev); 182 r420_pipes_init(rdev);
diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h
index 79ad98264e33..b519fb2fecbb 100644
--- a/drivers/gpu/drm/radeon/radeon.h
+++ b/drivers/gpu/drm/radeon/radeon.h
@@ -655,6 +655,7 @@ struct radeon_device {
655 int usec_timeout; 655 int usec_timeout;
656 enum radeon_pll_errata pll_errata; 656 enum radeon_pll_errata pll_errata;
657 int num_gb_pipes; 657 int num_gb_pipes;
658 int num_z_pipes;
658 int disp_priority; 659 int disp_priority;
659 /* BIOS */ 660 /* BIOS */
660 uint8_t *bios; 661 uint8_t *bios;
diff --git a/drivers/gpu/drm/radeon/radeon_cp.c b/drivers/gpu/drm/radeon/radeon_cp.c
index d8356827ef17..7a52c461145c 100644
--- a/drivers/gpu/drm/radeon/radeon_cp.c
+++ b/drivers/gpu/drm/radeon/radeon_cp.c
@@ -406,6 +406,15 @@ static void radeon_init_pipes(drm_radeon_private_t *dev_priv)
406{ 406{
407 uint32_t gb_tile_config, gb_pipe_sel = 0; 407 uint32_t gb_tile_config, gb_pipe_sel = 0;
408 408
409 if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV530) {
410 uint32_t z_pipe_sel = RADEON_READ(RV530_GB_PIPE_SELECT2);
411 if ((z_pipe_sel & 3) == 3)
412 dev_priv->num_z_pipes = 2;
413 else
414 dev_priv->num_z_pipes = 1;
415 } else
416 dev_priv->num_z_pipes = 1;
417
409 /* RS4xx/RS6xx/R4xx/R5xx */ 418 /* RS4xx/RS6xx/R4xx/R5xx */
410 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R420) { 419 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R420) {
411 gb_pipe_sel = RADEON_READ(R400_GB_PIPE_SELECT); 420 gb_pipe_sel = RADEON_READ(R400_GB_PIPE_SELECT);
diff --git a/drivers/gpu/drm/radeon/radeon_drv.h b/drivers/gpu/drm/radeon/radeon_drv.h
index 3933f8216a34..6fa32dac4e97 100644
--- a/drivers/gpu/drm/radeon/radeon_drv.h
+++ b/drivers/gpu/drm/radeon/radeon_drv.h
@@ -100,9 +100,10 @@
100 * 1.28- Add support for VBL on CRTC2 100 * 1.28- Add support for VBL on CRTC2
101 * 1.29- R500 3D cmd buffer support 101 * 1.29- R500 3D cmd buffer support
102 * 1.30- Add support for occlusion queries 102 * 1.30- Add support for occlusion queries
103 * 1.31- Add support for num Z pipes from GET_PARAM
103 */ 104 */
104#define DRIVER_MAJOR 1 105#define DRIVER_MAJOR 1
105#define DRIVER_MINOR 30 106#define DRIVER_MINOR 31
106#define DRIVER_PATCHLEVEL 0 107#define DRIVER_PATCHLEVEL 0
107 108
108/* 109/*
@@ -329,6 +330,7 @@ typedef struct drm_radeon_private {
329 resource_size_t fb_aper_offset; 330 resource_size_t fb_aper_offset;
330 331
331 int num_gb_pipes; 332 int num_gb_pipes;
333 int num_z_pipes;
332 int track_flush; 334 int track_flush;
333 drm_local_map_t *mmio; 335 drm_local_map_t *mmio;
334 336
@@ -689,6 +691,7 @@ extern void r600_page_table_cleanup(struct drm_device *dev, struct drm_ati_pciga
689 691
690/* pipe config regs */ 692/* pipe config regs */
691#define R400_GB_PIPE_SELECT 0x402c 693#define R400_GB_PIPE_SELECT 0x402c
694#define RV530_GB_PIPE_SELECT2 0x4124
692#define R500_DYN_SCLK_PWMEM_PIPE 0x000d /* PLL */ 695#define R500_DYN_SCLK_PWMEM_PIPE 0x000d /* PLL */
693#define R300_GB_TILE_CONFIG 0x4018 696#define R300_GB_TILE_CONFIG 0x4018
694# define R300_ENABLE_TILING (1 << 0) 697# define R300_ENABLE_TILING (1 << 0)
diff --git a/drivers/gpu/drm/radeon/radeon_gem.c b/drivers/gpu/drm/radeon/radeon_gem.c
index d4ceff13bbb1..14c199802920 100644
--- a/drivers/gpu/drm/radeon/radeon_gem.c
+++ b/drivers/gpu/drm/radeon/radeon_gem.c
@@ -283,7 +283,7 @@ int radeon_gem_busy_ioctl(struct drm_device *dev, void *data,
283 mutex_lock(&dev->struct_mutex); 283 mutex_lock(&dev->struct_mutex);
284 drm_gem_object_unreference(gobj); 284 drm_gem_object_unreference(gobj);
285 mutex_unlock(&dev->struct_mutex); 285 mutex_unlock(&dev->struct_mutex);
286 return 0; 286 return r;
287} 287}
288 288
289int radeon_gem_wait_idle_ioctl(struct drm_device *dev, void *data, 289int radeon_gem_wait_idle_ioctl(struct drm_device *dev, void *data,
diff --git a/drivers/gpu/drm/radeon/radeon_kms.c b/drivers/gpu/drm/radeon/radeon_kms.c
index d2764bf6b2a2..dce09ada32bc 100644
--- a/drivers/gpu/drm/radeon/radeon_kms.c
+++ b/drivers/gpu/drm/radeon/radeon_kms.c
@@ -95,6 +95,9 @@ int radeon_info_ioctl(struct drm_device *dev, void *data, struct drm_file *filp)
95 case RADEON_INFO_NUM_GB_PIPES: 95 case RADEON_INFO_NUM_GB_PIPES:
96 value = rdev->num_gb_pipes; 96 value = rdev->num_gb_pipes;
97 break; 97 break;
98 case RADEON_INFO_NUM_Z_PIPES:
99 value = rdev->num_z_pipes;
100 break;
98 default: 101 default:
99 DRM_DEBUG("Invalid request %d\n", info->request); 102 DRM_DEBUG("Invalid request %d\n", info->request);
100 return -EINVAL; 103 return -EINVAL;
@@ -318,5 +321,6 @@ struct drm_ioctl_desc radeon_ioctls_kms[] = {
318 DRM_IOCTL_DEF(DRM_RADEON_INFO, radeon_info_ioctl, DRM_AUTH), 321 DRM_IOCTL_DEF(DRM_RADEON_INFO, radeon_info_ioctl, DRM_AUTH),
319 DRM_IOCTL_DEF(DRM_RADEON_GEM_SET_TILING, radeon_gem_set_tiling_ioctl, DRM_AUTH), 322 DRM_IOCTL_DEF(DRM_RADEON_GEM_SET_TILING, radeon_gem_set_tiling_ioctl, DRM_AUTH),
320 DRM_IOCTL_DEF(DRM_RADEON_GEM_GET_TILING, radeon_gem_get_tiling_ioctl, DRM_AUTH), 323 DRM_IOCTL_DEF(DRM_RADEON_GEM_GET_TILING, radeon_gem_get_tiling_ioctl, DRM_AUTH),
324 DRM_IOCTL_DEF(DRM_RADEON_GEM_BUSY, radeon_gem_busy_ioctl, DRM_AUTH),
321}; 325};
322int radeon_max_kms_ioctl = DRM_ARRAY_SIZE(radeon_ioctls_kms); 326int radeon_max_kms_ioctl = DRM_ARRAY_SIZE(radeon_ioctls_kms);
diff --git a/drivers/gpu/drm/radeon/radeon_reg.h b/drivers/gpu/drm/radeon/radeon_reg.h
index 5a098f304edb..4df43f62c678 100644
--- a/drivers/gpu/drm/radeon/radeon_reg.h
+++ b/drivers/gpu/drm/radeon/radeon_reg.h
@@ -2337,6 +2337,9 @@
2337# define RADEON_RE_WIDTH_SHIFT 0 2337# define RADEON_RE_WIDTH_SHIFT 0
2338# define RADEON_RE_HEIGHT_SHIFT 16 2338# define RADEON_RE_HEIGHT_SHIFT 16
2339 2339
2340#define RADEON_RB3D_ZPASS_DATA 0x3290
2341#define RADEON_RB3D_ZPASS_ADDR 0x3294
2342
2340#define RADEON_SE_CNTL 0x1c4c 2343#define RADEON_SE_CNTL 0x1c4c
2341# define RADEON_FFACE_CULL_CW (0 << 0) 2344# define RADEON_FFACE_CULL_CW (0 << 0)
2342# define RADEON_FFACE_CULL_CCW (1 << 0) 2345# define RADEON_FFACE_CULL_CCW (1 << 0)
@@ -3571,4 +3574,6 @@
3571#define RADEON_SCRATCH_REG4 0x15f0 3574#define RADEON_SCRATCH_REG4 0x15f0
3572#define RADEON_SCRATCH_REG5 0x15f4 3575#define RADEON_SCRATCH_REG5 0x15f4
3573 3576
3577#define RV530_GB_PIPE_SELECT2 0x4124
3578
3574#endif 3579#endif
diff --git a/drivers/gpu/drm/radeon/radeon_state.c b/drivers/gpu/drm/radeon/radeon_state.c
index 46645f3e0328..2882f40d5ec5 100644
--- a/drivers/gpu/drm/radeon/radeon_state.c
+++ b/drivers/gpu/drm/radeon/radeon_state.c
@@ -3081,6 +3081,9 @@ static int radeon_cp_getparam(struct drm_device *dev, void *data, struct drm_fil
3081 case RADEON_PARAM_NUM_GB_PIPES: 3081 case RADEON_PARAM_NUM_GB_PIPES:
3082 value = dev_priv->num_gb_pipes; 3082 value = dev_priv->num_gb_pipes;
3083 break; 3083 break;
3084 case RADEON_PARAM_NUM_Z_PIPES:
3085 value = dev_priv->num_z_pipes;
3086 break;
3084 default: 3087 default:
3085 DRM_DEBUG("Invalid parameter %d\n", param->param); 3088 DRM_DEBUG("Invalid parameter %d\n", param->param);
3086 return -EINVAL; 3089 return -EINVAL;
diff --git a/include/drm/radeon_drm.h b/include/drm/radeon_drm.h
index f81c3232accd..2ba61e18fc8b 100644
--- a/include/drm/radeon_drm.h
+++ b/include/drm/radeon_drm.h
@@ -508,6 +508,7 @@ typedef struct {
508#define DRM_RADEON_INFO 0x27 508#define DRM_RADEON_INFO 0x27
509#define DRM_RADEON_GEM_SET_TILING 0x28 509#define DRM_RADEON_GEM_SET_TILING 0x28
510#define DRM_RADEON_GEM_GET_TILING 0x29 510#define DRM_RADEON_GEM_GET_TILING 0x29
511#define DRM_RADEON_GEM_BUSY 0x2a
511 512
512#define DRM_IOCTL_RADEON_CP_INIT DRM_IOW( DRM_COMMAND_BASE + DRM_RADEON_CP_INIT, drm_radeon_init_t) 513#define DRM_IOCTL_RADEON_CP_INIT DRM_IOW( DRM_COMMAND_BASE + DRM_RADEON_CP_INIT, drm_radeon_init_t)
513#define DRM_IOCTL_RADEON_CP_START DRM_IO( DRM_COMMAND_BASE + DRM_RADEON_CP_START) 514#define DRM_IOCTL_RADEON_CP_START DRM_IO( DRM_COMMAND_BASE + DRM_RADEON_CP_START)
@@ -548,6 +549,7 @@ typedef struct {
548#define DRM_IOCTL_RADEON_INFO DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_INFO, struct drm_radeon_info) 549#define DRM_IOCTL_RADEON_INFO DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_INFO, struct drm_radeon_info)
549#define DRM_IOCTL_RADEON_SET_TILING DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_GEM_SET_TILING, struct drm_radeon_gem_set_tiling) 550#define DRM_IOCTL_RADEON_SET_TILING DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_GEM_SET_TILING, struct drm_radeon_gem_set_tiling)
550#define DRM_IOCTL_RADEON_GET_TILING DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_GEM_GET_TILING, struct drm_radeon_gem_get_tiling) 551#define DRM_IOCTL_RADEON_GET_TILING DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_GEM_GET_TILING, struct drm_radeon_gem_get_tiling)
552#define DRM_IOCTL_RADEON_GEM_BUSY DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_GEM_BUSY, struct drm_radeon_gem_busy)
551 553
552typedef struct drm_radeon_init { 554typedef struct drm_radeon_init {
553 enum { 555 enum {
@@ -707,6 +709,7 @@ typedef struct drm_radeon_indirect {
707#define RADEON_PARAM_FB_LOCATION 14 /* FB location */ 709#define RADEON_PARAM_FB_LOCATION 14 /* FB location */
708#define RADEON_PARAM_NUM_GB_PIPES 15 /* num GB pipes */ 710#define RADEON_PARAM_NUM_GB_PIPES 15 /* num GB pipes */
709#define RADEON_PARAM_DEVICE_ID 16 711#define RADEON_PARAM_DEVICE_ID 16
712#define RADEON_PARAM_NUM_Z_PIPES 17 /* num Z pipes */
710 713
711typedef struct drm_radeon_getparam { 714typedef struct drm_radeon_getparam {
712 int param; 715 int param;
@@ -895,6 +898,7 @@ struct drm_radeon_cs {
895 898
896#define RADEON_INFO_DEVICE_ID 0x00 899#define RADEON_INFO_DEVICE_ID 0x00
897#define RADEON_INFO_NUM_GB_PIPES 0x01 900#define RADEON_INFO_NUM_GB_PIPES 0x01
901#define RADEON_INFO_NUM_Z_PIPES 0x02
898 902
899struct drm_radeon_info { 903struct drm_radeon_info {
900 uint32_t request; 904 uint32_t request;