diff options
-rw-r--r-- | drivers/gpu/drm/i915/i915_gem.c | 43 |
1 files changed, 18 insertions, 25 deletions
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c index 92b097dbe4ff..5e54821af996 100644 --- a/drivers/gpu/drm/i915/i915_gem.c +++ b/drivers/gpu/drm/i915/i915_gem.c | |||
@@ -38,8 +38,7 @@ | |||
38 | 38 | ||
39 | static uint32_t i915_gem_get_gtt_alignment(struct drm_gem_object *obj); | 39 | static uint32_t i915_gem_get_gtt_alignment(struct drm_gem_object *obj); |
40 | 40 | ||
41 | static int i915_gem_object_flush_gpu_write_domain(struct drm_gem_object *obj, | 41 | static int i915_gem_object_flush_gpu_write_domain(struct drm_gem_object *obj); |
42 | bool pipelined); | ||
43 | static void i915_gem_object_flush_gtt_write_domain(struct drm_gem_object *obj); | 42 | static void i915_gem_object_flush_gtt_write_domain(struct drm_gem_object *obj); |
44 | static void i915_gem_object_flush_cpu_write_domain(struct drm_gem_object *obj); | 43 | static void i915_gem_object_flush_cpu_write_domain(struct drm_gem_object *obj); |
45 | static int i915_gem_object_set_to_cpu_domain(struct drm_gem_object *obj, | 44 | static int i915_gem_object_set_to_cpu_domain(struct drm_gem_object *obj, |
@@ -2594,7 +2593,7 @@ i915_gem_object_put_fence_reg(struct drm_gem_object *obj, | |||
2594 | if (reg->gpu) { | 2593 | if (reg->gpu) { |
2595 | int ret; | 2594 | int ret; |
2596 | 2595 | ||
2597 | ret = i915_gem_object_flush_gpu_write_domain(obj, true); | 2596 | ret = i915_gem_object_flush_gpu_write_domain(obj); |
2598 | if (ret) | 2597 | if (ret) |
2599 | return ret; | 2598 | return ret; |
2600 | 2599 | ||
@@ -2742,8 +2741,7 @@ i915_gem_clflush_object(struct drm_gem_object *obj) | |||
2742 | 2741 | ||
2743 | /** Flushes any GPU write domain for the object if it's dirty. */ | 2742 | /** Flushes any GPU write domain for the object if it's dirty. */ |
2744 | static int | 2743 | static int |
2745 | i915_gem_object_flush_gpu_write_domain(struct drm_gem_object *obj, | 2744 | i915_gem_object_flush_gpu_write_domain(struct drm_gem_object *obj) |
2746 | bool pipelined) | ||
2747 | { | 2745 | { |
2748 | struct drm_device *dev = obj->dev; | 2746 | struct drm_device *dev = obj->dev; |
2749 | uint32_t old_write_domain; | 2747 | uint32_t old_write_domain; |
@@ -2762,10 +2760,7 @@ i915_gem_object_flush_gpu_write_domain(struct drm_gem_object *obj, | |||
2762 | obj->read_domains, | 2760 | obj->read_domains, |
2763 | old_write_domain); | 2761 | old_write_domain); |
2764 | 2762 | ||
2765 | if (pipelined) | 2763 | return 0; |
2766 | return 0; | ||
2767 | |||
2768 | return i915_gem_object_wait_rendering(obj, true); | ||
2769 | } | 2764 | } |
2770 | 2765 | ||
2771 | /** Flushes the GTT write domain for the object if it's dirty. */ | 2766 | /** Flushes the GTT write domain for the object if it's dirty. */ |
@@ -2826,18 +2821,15 @@ i915_gem_object_set_to_gtt_domain(struct drm_gem_object *obj, int write) | |||
2826 | if (obj_priv->gtt_space == NULL) | 2821 | if (obj_priv->gtt_space == NULL) |
2827 | return -EINVAL; | 2822 | return -EINVAL; |
2828 | 2823 | ||
2829 | ret = i915_gem_object_flush_gpu_write_domain(obj, false); | 2824 | ret = i915_gem_object_flush_gpu_write_domain(obj); |
2830 | if (ret != 0) | 2825 | if (ret != 0) |
2831 | return ret; | 2826 | return ret; |
2827 | ret = i915_gem_object_wait_rendering(obj, true); | ||
2828 | if (ret) | ||
2829 | return ret; | ||
2832 | 2830 | ||
2833 | i915_gem_object_flush_cpu_write_domain(obj); | 2831 | i915_gem_object_flush_cpu_write_domain(obj); |
2834 | 2832 | ||
2835 | if (write) { | ||
2836 | ret = i915_gem_object_wait_rendering(obj, true); | ||
2837 | if (ret) | ||
2838 | return ret; | ||
2839 | } | ||
2840 | |||
2841 | old_write_domain = obj->write_domain; | 2833 | old_write_domain = obj->write_domain; |
2842 | old_read_domains = obj->read_domains; | 2834 | old_read_domains = obj->read_domains; |
2843 | 2835 | ||
@@ -2875,7 +2867,7 @@ i915_gem_object_set_to_display_plane(struct drm_gem_object *obj, | |||
2875 | if (obj_priv->gtt_space == NULL) | 2867 | if (obj_priv->gtt_space == NULL) |
2876 | return -EINVAL; | 2868 | return -EINVAL; |
2877 | 2869 | ||
2878 | ret = i915_gem_object_flush_gpu_write_domain(obj, true); | 2870 | ret = i915_gem_object_flush_gpu_write_domain(obj); |
2879 | if (ret) | 2871 | if (ret) |
2880 | return ret; | 2872 | return ret; |
2881 | 2873 | ||
@@ -2924,9 +2916,12 @@ i915_gem_object_set_to_cpu_domain(struct drm_gem_object *obj, int write) | |||
2924 | uint32_t old_write_domain, old_read_domains; | 2916 | uint32_t old_write_domain, old_read_domains; |
2925 | int ret; | 2917 | int ret; |
2926 | 2918 | ||
2927 | ret = i915_gem_object_flush_gpu_write_domain(obj, false); | 2919 | ret = i915_gem_object_flush_gpu_write_domain(obj); |
2928 | if (ret != 0) | 2920 | if (ret != 0) |
2929 | return ret; | 2921 | return ret; |
2922 | ret = i915_gem_object_wait_rendering(obj, true); | ||
2923 | if (ret) | ||
2924 | return ret; | ||
2930 | 2925 | ||
2931 | i915_gem_object_flush_gtt_write_domain(obj); | 2926 | i915_gem_object_flush_gtt_write_domain(obj); |
2932 | 2927 | ||
@@ -2935,12 +2930,6 @@ i915_gem_object_set_to_cpu_domain(struct drm_gem_object *obj, int write) | |||
2935 | */ | 2930 | */ |
2936 | i915_gem_object_set_to_full_cpu_read_domain(obj); | 2931 | i915_gem_object_set_to_full_cpu_read_domain(obj); |
2937 | 2932 | ||
2938 | if (write) { | ||
2939 | ret = i915_gem_object_wait_rendering(obj, true); | ||
2940 | if (ret) | ||
2941 | return ret; | ||
2942 | } | ||
2943 | |||
2944 | old_write_domain = obj->write_domain; | 2933 | old_write_domain = obj->write_domain; |
2945 | old_read_domains = obj->read_domains; | 2934 | old_read_domains = obj->read_domains; |
2946 | 2935 | ||
@@ -3205,9 +3194,13 @@ i915_gem_object_set_cpu_read_domain_range(struct drm_gem_object *obj, | |||
3205 | if (offset == 0 && size == obj->size) | 3194 | if (offset == 0 && size == obj->size) |
3206 | return i915_gem_object_set_to_cpu_domain(obj, 0); | 3195 | return i915_gem_object_set_to_cpu_domain(obj, 0); |
3207 | 3196 | ||
3208 | ret = i915_gem_object_flush_gpu_write_domain(obj, false); | 3197 | ret = i915_gem_object_flush_gpu_write_domain(obj); |
3209 | if (ret != 0) | 3198 | if (ret != 0) |
3210 | return ret; | 3199 | return ret; |
3200 | ret = i915_gem_object_wait_rendering(obj, true); | ||
3201 | if (ret) | ||
3202 | return ret; | ||
3203 | |||
3211 | i915_gem_object_flush_gtt_write_domain(obj); | 3204 | i915_gem_object_flush_gtt_write_domain(obj); |
3212 | 3205 | ||
3213 | /* If we're already fully in the CPU read domain, we're done. */ | 3206 | /* If we're already fully in the CPU read domain, we're done. */ |