3 files changed, 16 insertions, 5 deletions

diff --git a/drivers/gpu/drm/nouveau/nouveau_bo.c b/drivers/gpu/drm/nouveau/nouveau_bo.c
index 931dade12edd..cfdecd31f802 100644
--- a/drivers/gpu/drm/nouveau/nouveau_bo.c
+++ b/drivers/gpu/drm/nouveau/nouveau_bo.c
@@ -54,8 +54,8 @@ nouveau_bo_del_ttm(struct ttm_buffer_object *bo)
 }
 
 static void
-nouveau_bo_fixup_align(struct nouveau_bo *nvbo, int *align, int *size,
-                       int *page_shift)
+nouveau_bo_fixup_align(struct nouveau_bo *nvbo, u32 flags,
+                       int *align, int *size, int *page_shift)
 {
         struct drm_nouveau_private *dev_priv = nouveau_bdev(nvbo->bo.bdev);
 
@@ -80,7 +80,7 @@ nouveau_bo_fixup_align(struct nouveau_bo *nvbo, int *align, int *size,
                 }
         } else {
                 if (likely(dev_priv->chan_vm)) {
-                        if (*size > 256 * 1024)
+                        if (!(flags & TTM_PL_FLAG_TT) &&  *size > 256 * 1024)
                                 *page_shift = dev_priv->chan_vm->lpg_shift;
                         else
                                 *page_shift = dev_priv->chan_vm->spg_shift;
@@ -113,7 +113,7 @@ nouveau_bo_new(struct drm_device *dev, struct nouveau_channel *chan,
         nvbo->tile_flags = tile_flags;
         nvbo->bo.bdev = &dev_priv->ttm.bdev;
 
-        nouveau_bo_fixup_align(nvbo, &align, &size, &page_shift);
+        nouveau_bo_fixup_align(nvbo, flags, &align, &size, &page_shift);
         align >>= PAGE_SHIFT;
 
         if (dev_priv->chan_vm) {
diff --git a/drivers/gpu/drm/nouveau/nouveau_drv.h b/drivers/gpu/drm/nouveau/nouveau_drv.h
index fce748f0f925..d409c0dc425b 100644
--- a/drivers/gpu/drm/nouveau/nouveau_drv.h
+++ b/drivers/gpu/drm/nouveau/nouveau_drv.h
@@ -90,6 +90,7 @@ struct nouveau_tile_reg {
 struct nouveau_bo {
         struct ttm_buffer_object bo;
         struct ttm_placement placement;
+        u32 valid_domains;
         u32 placements[3];
         u32 busy_placements[3];
         struct ttm_bo_kmap_obj kmap;
diff --git a/drivers/gpu/drm/nouveau/nouveau_gem.c b/drivers/gpu/drm/nouveau/nouveau_gem.c
index cd4ed9e86704..3ce58d2222cb 100644
--- a/drivers/gpu/drm/nouveau/nouveau_gem.c
+++ b/drivers/gpu/drm/nouveau/nouveau_gem.c
@@ -64,6 +64,7 @@ nouveau_gem_new(struct drm_device *dev, struct nouveau_channel *chan,
                 int size, int align, uint32_t domain, uint32_t tile_mode,
                 uint32_t tile_flags, struct nouveau_bo **pnvbo)
 {
+        struct drm_nouveau_private *dev_priv = dev->dev_private;
         struct nouveau_bo *nvbo;
         u32 flags = 0;
         int ret;
@@ -81,6 +82,15 @@ nouveau_gem_new(struct drm_device *dev, struct nouveau_channel *chan,
                 return ret;
         nvbo = *pnvbo;
 
+        /* we restrict allowed domains on nv50+ to only the types
+         * that were requested at creation time.  not possibly on
+         * earlier chips without busting the ABI.
+         */
+        nvbo->valid_domains = NOUVEAU_GEM_DOMAIN_VRAM |
+                              NOUVEAU_GEM_DOMAIN_GART;
+        if (dev_priv->card_type >= NV_50)
+                nvbo->valid_domains &= domain;
+
         nvbo->gem = drm_gem_object_alloc(dev, nvbo->bo.mem.size);
         if (!nvbo->gem) {
                 nouveau_bo_ref(NULL, pnvbo);
@@ -159,7 +169,7 @@ nouveau_gem_set_domain(struct drm_gem_object *gem, uint32_t read_domains,
 {
         struct nouveau_bo *nvbo = gem->driver_private;
         struct ttm_buffer_object *bo = &nvbo->bo;
-        uint32_t domains = valid_domains &
+        uint32_t domains = valid_domains & nvbo->valid_domains &
                 (write_domains ? write_domains : read_domains);
         uint32_t pref_flags = 0, valid_flags = 0;