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-rw-r--r--arch/sparc/boot/Makefile6
-rw-r--r--arch/sparc/boot/piggyback_32.c4
-rw-r--r--arch/sparc/boot/piggyback_64.c1
-rw-r--r--arch/sparc/kernel/irq_64.c45
-rw-r--r--arch/um/drivers/slip_kern.c1
-rw-r--r--arch/um/drivers/slirp_kern.c1
-rw-r--r--arch/um/include/asm/dma-mapping.h4
-rw-r--r--drivers/gpu/drm/Kconfig1
-rw-r--r--drivers/gpu/drm/Makefile2
-rw-r--r--drivers/gpu/drm/drm_edid.c12
-rw-r--r--drivers/gpu/drm/i915/Makefile2
-rw-r--r--drivers/gpu/drm/i915/dvo.h4
-rw-r--r--drivers/gpu/drm/i915/dvo_ch7017.c20
-rw-r--r--drivers/gpu/drm/i915/dvo_ch7xxx.c25
-rw-r--r--drivers/gpu/drm/i915/dvo_ivch.c21
-rw-r--r--drivers/gpu/drm/i915/dvo_sil164.c25
-rw-r--r--drivers/gpu/drm/i915/dvo_tfp410.c25
-rw-r--r--drivers/gpu/drm/i915/i915_drv.c4
-rw-r--r--drivers/gpu/drm/i915/i915_drv.h12
-rw-r--r--drivers/gpu/drm/i915/i915_gem.c19
-rw-r--r--drivers/gpu/drm/i915/i915_gem_debug.c6
-rw-r--r--drivers/gpu/drm/i915/i915_gem_tiling.c2
-rw-r--r--drivers/gpu/drm/i915/i915_irq.c12
-rw-r--r--drivers/gpu/drm/i915/i915_reg.h29
-rw-r--r--drivers/gpu/drm/i915/i915_suspend.c34
-rw-r--r--drivers/gpu/drm/i915/intel_bios.c12
-rw-r--r--drivers/gpu/drm/i915/intel_display.c199
-rw-r--r--drivers/gpu/drm/i915/intel_dp.c1153
-rw-r--r--drivers/gpu/drm/i915/intel_dp.h144
-rw-r--r--drivers/gpu/drm/i915/intel_dp_i2c.c272
-rw-r--r--drivers/gpu/drm/i915/intel_drv.h17
-rw-r--r--drivers/gpu/drm/i915/intel_dvo.c16
-rw-r--r--drivers/gpu/drm/i915/intel_hdmi.c35
-rw-r--r--drivers/gpu/drm/i915/intel_i2c.c16
-rw-r--r--drivers/gpu/drm/i915/intel_lvds.c344
-rw-r--r--drivers/gpu/drm/i915/intel_modes.c14
-rw-r--r--drivers/gpu/drm/i915/intel_sdvo.c72
-rw-r--r--drivers/gpu/drm/i915/intel_tv.c53
-rw-r--r--drivers/gpu/drm/radeon/radeon_device.c22
-rw-r--r--drivers/gpu/drm/radeon/radeon_drv.c2
-rw-r--r--drivers/gpu/drm/radeon/radeon_fb.c33
-rw-r--r--drivers/gpu/drm/radeon/radeon_object.c30
-rw-r--r--drivers/gpu/drm/ttm/ttm_bo_util.c1
-rw-r--r--drivers/gpu/drm/ttm/ttm_bo_vm.c1
-rw-r--r--drivers/gpu/drm/ttm/ttm_tt.c1
-rw-r--r--drivers/i2c/busses/Kconfig1
-rw-r--r--drivers/ide/cs5520.c1
-rw-r--r--drivers/ide/ide-cd.c10
-rw-r--r--drivers/ide/ide-dma.c21
-rw-r--r--drivers/ide/ide-io.c54
-rw-r--r--drivers/ide/ide-iops.c4
-rw-r--r--drivers/ide/ide-probe.c23
-rw-r--r--drivers/usb/class/cdc-acm.c4
-rw-r--r--drivers/usb/serial/usb-serial.c3
-rw-r--r--fs/cifs/CHANGES2
-rw-r--r--fs/cifs/asn1.c55
-rw-r--r--fs/cifs/cifsfs.c157
-rw-r--r--fs/cifs/cifsglob.h2
-rw-r--r--fs/cifs/cifsproto.h2
-rw-r--r--fs/cifs/cifssmb.c4
-rw-r--r--fs/cifs/connect.c39
-rw-r--r--fs/cifs/dir.c6
-rw-r--r--fs/cifs/dns_resolve.c25
-rw-r--r--fs/cifs/file.c24
-rw-r--r--fs/cifs/inode.c15
-rw-r--r--fs/cifs/link.c3
-rw-r--r--fs/cifs/netmisc.c56
-rw-r--r--fs/cifs/sess.c2
-rw-r--r--fs/cifs/xattr.c12
-rw-r--r--include/drm/drm_edid.h38
-rw-r--r--include/linux/ide.h2
-rw-r--r--include/linux/mm.h2
-rw-r--r--kernel/futex.c2
-rw-r--r--mm/memory.c26
-rw-r--r--mm/nommu.c12
75 files changed, 2743 insertions, 618 deletions
diff --git a/arch/sparc/boot/Makefile b/arch/sparc/boot/Makefile
index 96041a8d39e8..1ff0fd924756 100644
--- a/arch/sparc/boot/Makefile
+++ b/arch/sparc/boot/Makefile
@@ -15,7 +15,7 @@ quiet_cmd_elftoaout = ELFTOAOUT $@
15 15
16ifeq ($(CONFIG_SPARC32),y) 16ifeq ($(CONFIG_SPARC32),y)
17quiet_cmd_piggy = PIGGY $@ 17quiet_cmd_piggy = PIGGY $@
18 cmd_piggy = $(obj)/piggyback_32 $@ $(obj)/System.map $(ROOT_IMG) 18 cmd_piggy = $(obj)/piggyback_32 $@ System.map $(ROOT_IMG)
19quiet_cmd_btfix = BTFIX $@ 19quiet_cmd_btfix = BTFIX $@
20 cmd_btfix = $(OBJDUMP) -x vmlinux | $(obj)/btfixupprep > $@ 20 cmd_btfix = $(OBJDUMP) -x vmlinux | $(obj)/btfixupprep > $@
21quiet_cmd_sysmap = SYSMAP $(obj)/System.map 21quiet_cmd_sysmap = SYSMAP $(obj)/System.map
@@ -58,7 +58,7 @@ $(obj)/image: $(obj)/btfix.o FORCE
58$(obj)/zImage: $(obj)/image 58$(obj)/zImage: $(obj)/image
59 $(call if_changed,strip) 59 $(call if_changed,strip)
60 60
61$(obj)/tftpboot.img: $(obj)/piggyback $(obj)/System.map $(obj)/image FORCE 61$(obj)/tftpboot.img: $(obj)/image $(obj)/piggyback_32 System.map $(ROOT_IMG) FORCE
62 $(call if_changed,elftoaout) 62 $(call if_changed,elftoaout)
63 $(call if_changed,piggy) 63 $(call if_changed,piggy)
64 64
@@ -79,7 +79,7 @@ $(obj)/image: vmlinux FORCE
79 $(call if_changed,strip) 79 $(call if_changed,strip)
80 @echo ' kernel: $@ is ready' 80 @echo ' kernel: $@ is ready'
81 81
82$(obj)/tftpboot.img: vmlinux $(obj)/piggyback_64 System.map $(ROOT_IMG) FORCE 82$(obj)/tftpboot.img: $(obj)/image $(obj)/piggyback_64 System.map $(ROOT_IMG) FORCE
83 $(call if_changed,elftoaout) 83 $(call if_changed,elftoaout)
84 $(call if_changed,piggy) 84 $(call if_changed,piggy)
85 @echo ' kernel: $@ is ready' 85 @echo ' kernel: $@ is ready'
diff --git a/arch/sparc/boot/piggyback_32.c b/arch/sparc/boot/piggyback_32.c
index c9f500c1a8b2..e8dc9adfcd61 100644
--- a/arch/sparc/boot/piggyback_32.c
+++ b/arch/sparc/boot/piggyback_32.c
@@ -70,7 +70,7 @@ void die(char *str)
70int main(int argc,char **argv) 70int main(int argc,char **argv)
71{ 71{
72 static char aout_magic[] = { 0x01, 0x03, 0x01, 0x07 }; 72 static char aout_magic[] = { 0x01, 0x03, 0x01, 0x07 };
73 unsigned char buffer[1024], *q, *r; 73 char buffer[1024], *q, *r;
74 unsigned int i, j, k, start, end, offset; 74 unsigned int i, j, k, start, end, offset;
75 FILE *map; 75 FILE *map;
76 struct stat s; 76 struct stat s;
@@ -84,7 +84,7 @@ int main(int argc,char **argv)
84 while (fgets (buffer, 1024, map)) { 84 while (fgets (buffer, 1024, map)) {
85 if (!strcmp (buffer + 8, " T start\n") || !strcmp (buffer + 16, " T start\n")) 85 if (!strcmp (buffer + 8, " T start\n") || !strcmp (buffer + 16, " T start\n"))
86 start = strtoul (buffer, NULL, 16); 86 start = strtoul (buffer, NULL, 16);
87 else if (!strcmp (buffer + 8, " A end\n") || !strcmp (buffer + 16, " A end\n")) 87 else if (!strcmp (buffer + 8, " A _end\n") || !strcmp (buffer + 16, " A _end\n"))
88 end = strtoul (buffer, NULL, 16); 88 end = strtoul (buffer, NULL, 16);
89 } 89 }
90 fclose (map); 90 fclose (map);
diff --git a/arch/sparc/boot/piggyback_64.c b/arch/sparc/boot/piggyback_64.c
index de364bfed0bb..c63fd1b6bdd4 100644
--- a/arch/sparc/boot/piggyback_64.c
+++ b/arch/sparc/boot/piggyback_64.c
@@ -46,6 +46,7 @@ int main(int argc,char **argv)
46 struct stat s; 46 struct stat s;
47 int image, tail; 47 int image, tail;
48 48
49 start = end = 0;
49 if (stat (argv[3], &s) < 0) die (argv[3]); 50 if (stat (argv[3], &s) < 0) die (argv[3]);
50 map = fopen (argv[2], "r"); 51 map = fopen (argv[2], "r");
51 if (!map) die(argv[2]); 52 if (!map) die(argv[2]);
diff --git a/arch/sparc/kernel/irq_64.c b/arch/sparc/kernel/irq_64.c
index bd075054942b..f0ee79055409 100644
--- a/arch/sparc/kernel/irq_64.c
+++ b/arch/sparc/kernel/irq_64.c
@@ -20,7 +20,6 @@
20#include <linux/delay.h> 20#include <linux/delay.h>
21#include <linux/proc_fs.h> 21#include <linux/proc_fs.h>
22#include <linux/seq_file.h> 22#include <linux/seq_file.h>
23#include <linux/bootmem.h>
24#include <linux/irq.h> 23#include <linux/irq.h>
25 24
26#include <asm/ptrace.h> 25#include <asm/ptrace.h>
@@ -914,25 +913,19 @@ void __cpuinit notrace sun4v_register_mondo_queues(int this_cpu)
914 tb->nonresum_qmask); 913 tb->nonresum_qmask);
915} 914}
916 915
917static void __init alloc_one_mondo(unsigned long *pa_ptr, unsigned long qmask) 916/* Each queue region must be a power of 2 multiple of 64 bytes in
918{ 917 * size. The base real address must be aligned to the size of the
919 unsigned long size = PAGE_ALIGN(qmask + 1); 918 * region. Thus, an 8KB queue must be 8KB aligned, for example.
920 void *p = __alloc_bootmem(size, size, 0); 919 */
921 if (!p) { 920static void __init alloc_one_queue(unsigned long *pa_ptr, unsigned long qmask)
922 prom_printf("SUN4V: Error, cannot allocate mondo queue.\n");
923 prom_halt();
924 }
925
926 *pa_ptr = __pa(p);
927}
928
929static void __init alloc_one_kbuf(unsigned long *pa_ptr, unsigned long qmask)
930{ 921{
931 unsigned long size = PAGE_ALIGN(qmask + 1); 922 unsigned long size = PAGE_ALIGN(qmask + 1);
932 void *p = __alloc_bootmem(size, size, 0); 923 unsigned long order = get_order(size);
924 unsigned long p;
933 925
926 p = __get_free_pages(GFP_KERNEL, order);
934 if (!p) { 927 if (!p) {
935 prom_printf("SUN4V: Error, cannot allocate kbuf page.\n"); 928 prom_printf("SUN4V: Error, cannot allocate queue.\n");
936 prom_halt(); 929 prom_halt();
937 } 930 }
938 931
@@ -942,11 +935,11 @@ static void __init alloc_one_kbuf(unsigned long *pa_ptr, unsigned long qmask)
942static void __init init_cpu_send_mondo_info(struct trap_per_cpu *tb) 935static void __init init_cpu_send_mondo_info(struct trap_per_cpu *tb)
943{ 936{
944#ifdef CONFIG_SMP 937#ifdef CONFIG_SMP
945 void *page; 938 unsigned long page;
946 939
947 BUILD_BUG_ON((NR_CPUS * sizeof(u16)) > (PAGE_SIZE - 64)); 940 BUILD_BUG_ON((NR_CPUS * sizeof(u16)) > (PAGE_SIZE - 64));
948 941
949 page = alloc_bootmem_pages(PAGE_SIZE); 942 page = get_zeroed_page(GFP_KERNEL);
950 if (!page) { 943 if (!page) {
951 prom_printf("SUN4V: Error, cannot allocate cpu mondo page.\n"); 944 prom_printf("SUN4V: Error, cannot allocate cpu mondo page.\n");
952 prom_halt(); 945 prom_halt();
@@ -965,13 +958,13 @@ static void __init sun4v_init_mondo_queues(void)
965 for_each_possible_cpu(cpu) { 958 for_each_possible_cpu(cpu) {
966 struct trap_per_cpu *tb = &trap_block[cpu]; 959 struct trap_per_cpu *tb = &trap_block[cpu];
967 960
968 alloc_one_mondo(&tb->cpu_mondo_pa, tb->cpu_mondo_qmask); 961 alloc_one_queue(&tb->cpu_mondo_pa, tb->cpu_mondo_qmask);
969 alloc_one_mondo(&tb->dev_mondo_pa, tb->dev_mondo_qmask); 962 alloc_one_queue(&tb->dev_mondo_pa, tb->dev_mondo_qmask);
970 alloc_one_mondo(&tb->resum_mondo_pa, tb->resum_qmask); 963 alloc_one_queue(&tb->resum_mondo_pa, tb->resum_qmask);
971 alloc_one_kbuf(&tb->resum_kernel_buf_pa, tb->resum_qmask); 964 alloc_one_queue(&tb->resum_kernel_buf_pa, tb->resum_qmask);
972 alloc_one_mondo(&tb->nonresum_mondo_pa, tb->nonresum_qmask); 965 alloc_one_queue(&tb->nonresum_mondo_pa, tb->nonresum_qmask);
973 alloc_one_kbuf(&tb->nonresum_kernel_buf_pa, 966 alloc_one_queue(&tb->nonresum_kernel_buf_pa,
974 tb->nonresum_qmask); 967 tb->nonresum_qmask);
975 } 968 }
976} 969}
977 970
@@ -999,7 +992,7 @@ void __init init_IRQ(void)
999 kill_prom_timer(); 992 kill_prom_timer();
1000 993
1001 size = sizeof(struct ino_bucket) * NUM_IVECS; 994 size = sizeof(struct ino_bucket) * NUM_IVECS;
1002 ivector_table = alloc_bootmem(size); 995 ivector_table = kzalloc(size, GFP_KERNEL);
1003 if (!ivector_table) { 996 if (!ivector_table) {
1004 prom_printf("Fatal error, cannot allocate ivector_table\n"); 997 prom_printf("Fatal error, cannot allocate ivector_table\n");
1005 prom_halt(); 998 prom_halt();
diff --git a/arch/um/drivers/slip_kern.c b/arch/um/drivers/slip_kern.c
index 5ec17563142e..dd2aadc14af0 100644
--- a/arch/um/drivers/slip_kern.c
+++ b/arch/um/drivers/slip_kern.c
@@ -30,7 +30,6 @@ static void slip_init(struct net_device *dev, void *data)
30 30
31 slip_proto_init(&spri->slip); 31 slip_proto_init(&spri->slip);
32 32
33 dev->init = NULL;
34 dev->hard_header_len = 0; 33 dev->hard_header_len = 0;
35 dev->header_ops = NULL; 34 dev->header_ops = NULL;
36 dev->addr_len = 0; 35 dev->addr_len = 0;
diff --git a/arch/um/drivers/slirp_kern.c b/arch/um/drivers/slirp_kern.c
index f15a6e7654f3..e376284f0fb7 100644
--- a/arch/um/drivers/slirp_kern.c
+++ b/arch/um/drivers/slirp_kern.c
@@ -32,7 +32,6 @@ void slirp_init(struct net_device *dev, void *data)
32 32
33 slip_proto_init(&spri->slip); 33 slip_proto_init(&spri->slip);
34 34
35 dev->init = NULL;
36 dev->hard_header_len = 0; 35 dev->hard_header_len = 0;
37 dev->header_ops = NULL; 36 dev->header_ops = NULL;
38 dev->addr_len = 0; 37 dev->addr_len = 0;
diff --git a/arch/um/include/asm/dma-mapping.h b/arch/um/include/asm/dma-mapping.h
index 90fc708b320e..378de4bbf49f 100644
--- a/arch/um/include/asm/dma-mapping.h
+++ b/arch/um/include/asm/dma-mapping.h
@@ -79,14 +79,14 @@ dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nhwentries,
79} 79}
80 80
81static inline void 81static inline void
82dma_sync_single(struct device *dev, dma_addr_t dma_handle, size_t size, 82dma_sync_single_for_cpu(struct device *dev, dma_addr_t dma_handle, size_t size,
83 enum dma_data_direction direction) 83 enum dma_data_direction direction)
84{ 84{
85 BUG(); 85 BUG();
86} 86}
87 87
88static inline void 88static inline void
89dma_sync_sg(struct device *dev, struct scatterlist *sg, int nelems, 89dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, int nelems,
90 enum dma_data_direction direction) 90 enum dma_data_direction direction)
91{ 91{
92 BUG(); 92 BUG();
diff --git a/drivers/gpu/drm/Kconfig b/drivers/gpu/drm/Kconfig
index c961fe415aef..39b393d38bb3 100644
--- a/drivers/gpu/drm/Kconfig
+++ b/drivers/gpu/drm/Kconfig
@@ -81,6 +81,7 @@ config DRM_I830
81 81
82config DRM_I915 82config DRM_I915
83 tristate "i915 driver" 83 tristate "i915 driver"
84 depends on AGP_INTEL
84 select FB_CFB_FILLRECT 85 select FB_CFB_FILLRECT
85 select FB_CFB_COPYAREA 86 select FB_CFB_COPYAREA
86 select FB_CFB_IMAGEBLIT 87 select FB_CFB_IMAGEBLIT
diff --git a/drivers/gpu/drm/Makefile b/drivers/gpu/drm/Makefile
index 4e89ab08b7b8..fe23f29f7cba 100644
--- a/drivers/gpu/drm/Makefile
+++ b/drivers/gpu/drm/Makefile
@@ -16,6 +16,7 @@ drm-y := drm_auth.o drm_bufs.o drm_cache.o \
16drm-$(CONFIG_COMPAT) += drm_ioc32.o 16drm-$(CONFIG_COMPAT) += drm_ioc32.o
17 17
18obj-$(CONFIG_DRM) += drm.o 18obj-$(CONFIG_DRM) += drm.o
19obj-$(CONFIG_DRM_TTM) += ttm/
19obj-$(CONFIG_DRM_TDFX) += tdfx/ 20obj-$(CONFIG_DRM_TDFX) += tdfx/
20obj-$(CONFIG_DRM_R128) += r128/ 21obj-$(CONFIG_DRM_R128) += r128/
21obj-$(CONFIG_DRM_RADEON)+= radeon/ 22obj-$(CONFIG_DRM_RADEON)+= radeon/
@@ -26,4 +27,3 @@ obj-$(CONFIG_DRM_I915) += i915/
26obj-$(CONFIG_DRM_SIS) += sis/ 27obj-$(CONFIG_DRM_SIS) += sis/
27obj-$(CONFIG_DRM_SAVAGE)+= savage/ 28obj-$(CONFIG_DRM_SAVAGE)+= savage/
28obj-$(CONFIG_DRM_VIA) +=via/ 29obj-$(CONFIG_DRM_VIA) +=via/
29obj-$(CONFIG_DRM_TTM) += ttm/
diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index 7d0835226f6e..80cc6d06d61b 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -294,10 +294,10 @@ static struct drm_display_mode *drm_mode_detailed(struct drm_device *dev,
294 unsigned vactive = (pt->vactive_vblank_hi & 0xf0) << 4 | pt->vactive_lo; 294 unsigned vactive = (pt->vactive_vblank_hi & 0xf0) << 4 | pt->vactive_lo;
295 unsigned hblank = (pt->hactive_hblank_hi & 0xf) << 8 | pt->hblank_lo; 295 unsigned hblank = (pt->hactive_hblank_hi & 0xf) << 8 | pt->hblank_lo;
296 unsigned vblank = (pt->vactive_vblank_hi & 0xf) << 8 | pt->vblank_lo; 296 unsigned vblank = (pt->vactive_vblank_hi & 0xf) << 8 | pt->vblank_lo;
297 unsigned hsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0x3) << 8 | pt->hsync_offset_lo; 297 unsigned hsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc0) << 2 | pt->hsync_offset_lo;
298 unsigned hsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0xc) << 6 | pt->hsync_pulse_width_lo; 298 unsigned hsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x30) << 4 | pt->hsync_pulse_width_lo;
299 unsigned vsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0x30) | (pt->vsync_offset_pulse_width_lo & 0xf); 299 unsigned vsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc) >> 2 | pt->vsync_offset_pulse_width_lo >> 4;
300 unsigned vsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0xc0) >> 2 | pt->vsync_offset_pulse_width_lo >> 4; 300 unsigned vsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x3) << 4 | (pt->vsync_offset_pulse_width_lo & 0xf);
301 301
302 /* ignore tiny modes */ 302 /* ignore tiny modes */
303 if (hactive < 64 || vactive < 64) 303 if (hactive < 64 || vactive < 64)
@@ -347,8 +347,8 @@ static struct drm_display_mode *drm_mode_detailed(struct drm_device *dev,
347 mode->flags |= (pt->misc & DRM_EDID_PT_VSYNC_POSITIVE) ? 347 mode->flags |= (pt->misc & DRM_EDID_PT_VSYNC_POSITIVE) ?
348 DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC; 348 DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC;
349 349
350 mode->width_mm = pt->width_mm_lo | (pt->width_height_mm_hi & 0xf) << 8; 350 mode->width_mm = pt->width_mm_lo | (pt->width_height_mm_hi & 0xf0) << 4;
351 mode->height_mm = pt->height_mm_lo | (pt->width_height_mm_hi & 0xf0) << 4; 351 mode->height_mm = pt->height_mm_lo | (pt->width_height_mm_hi & 0xf) << 8;
352 352
353 if (quirks & EDID_QUIRK_DETAILED_IN_CM) { 353 if (quirks & EDID_QUIRK_DETAILED_IN_CM) {
354 mode->width_mm *= 10; 354 mode->width_mm *= 10;
diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
index 51c5a050aa73..30d6b99fb302 100644
--- a/drivers/gpu/drm/i915/Makefile
+++ b/drivers/gpu/drm/i915/Makefile
@@ -13,6 +13,8 @@ i915-y := i915_drv.o i915_dma.o i915_irq.o i915_mem.o \
13 intel_crt.o \ 13 intel_crt.o \
14 intel_lvds.o \ 14 intel_lvds.o \
15 intel_bios.o \ 15 intel_bios.o \
16 intel_dp.o \
17 intel_dp_i2c.o \
16 intel_hdmi.o \ 18 intel_hdmi.o \
17 intel_sdvo.o \ 19 intel_sdvo.o \
18 intel_modes.o \ 20 intel_modes.o \
diff --git a/drivers/gpu/drm/i915/dvo.h b/drivers/gpu/drm/i915/dvo.h
index e747ac42fe3a..288fc50627e2 100644
--- a/drivers/gpu/drm/i915/dvo.h
+++ b/drivers/gpu/drm/i915/dvo.h
@@ -37,7 +37,7 @@ struct intel_dvo_device {
37 /* GPIO register used for i2c bus to control this device */ 37 /* GPIO register used for i2c bus to control this device */
38 u32 gpio; 38 u32 gpio;
39 int slave_addr; 39 int slave_addr;
40 struct intel_i2c_chan *i2c_bus; 40 struct i2c_adapter *i2c_bus;
41 41
42 const struct intel_dvo_dev_ops *dev_ops; 42 const struct intel_dvo_dev_ops *dev_ops;
43 void *dev_priv; 43 void *dev_priv;
@@ -52,7 +52,7 @@ struct intel_dvo_dev_ops {
52 * Returns NULL if the device does not exist. 52 * Returns NULL if the device does not exist.
53 */ 53 */
54 bool (*init)(struct intel_dvo_device *dvo, 54 bool (*init)(struct intel_dvo_device *dvo,
55 struct intel_i2c_chan *i2cbus); 55 struct i2c_adapter *i2cbus);
56 56
57 /* 57 /*
58 * Called to allow the output a chance to create properties after the 58 * Called to allow the output a chance to create properties after the
diff --git a/drivers/gpu/drm/i915/dvo_ch7017.c b/drivers/gpu/drm/i915/dvo_ch7017.c
index 03d4b4973b02..621815b531db 100644
--- a/drivers/gpu/drm/i915/dvo_ch7017.c
+++ b/drivers/gpu/drm/i915/dvo_ch7017.c
@@ -176,19 +176,20 @@ static void ch7017_dpms(struct intel_dvo_device *dvo, int mode);
176 176
177static bool ch7017_read(struct intel_dvo_device *dvo, int addr, uint8_t *val) 177static bool ch7017_read(struct intel_dvo_device *dvo, int addr, uint8_t *val)
178{ 178{
179 struct intel_i2c_chan *i2cbus = dvo->i2c_bus; 179 struct i2c_adapter *adapter = dvo->i2c_bus;
180 struct intel_i2c_chan *i2cbus = container_of(adapter, struct intel_i2c_chan, adapter);
180 u8 out_buf[2]; 181 u8 out_buf[2];
181 u8 in_buf[2]; 182 u8 in_buf[2];
182 183
183 struct i2c_msg msgs[] = { 184 struct i2c_msg msgs[] = {
184 { 185 {
185 .addr = i2cbus->slave_addr, 186 .addr = dvo->slave_addr,
186 .flags = 0, 187 .flags = 0,
187 .len = 1, 188 .len = 1,
188 .buf = out_buf, 189 .buf = out_buf,
189 }, 190 },
190 { 191 {
191 .addr = i2cbus->slave_addr, 192 .addr = dvo->slave_addr,
192 .flags = I2C_M_RD, 193 .flags = I2C_M_RD,
193 .len = 1, 194 .len = 1,
194 .buf = in_buf, 195 .buf = in_buf,
@@ -208,10 +209,11 @@ static bool ch7017_read(struct intel_dvo_device *dvo, int addr, uint8_t *val)
208 209
209static bool ch7017_write(struct intel_dvo_device *dvo, int addr, uint8_t val) 210static bool ch7017_write(struct intel_dvo_device *dvo, int addr, uint8_t val)
210{ 211{
211 struct intel_i2c_chan *i2cbus = dvo->i2c_bus; 212 struct i2c_adapter *adapter = dvo->i2c_bus;
213 struct intel_i2c_chan *i2cbus = container_of(adapter, struct intel_i2c_chan, adapter);
212 uint8_t out_buf[2]; 214 uint8_t out_buf[2];
213 struct i2c_msg msg = { 215 struct i2c_msg msg = {
214 .addr = i2cbus->slave_addr, 216 .addr = dvo->slave_addr,
215 .flags = 0, 217 .flags = 0,
216 .len = 2, 218 .len = 2,
217 .buf = out_buf, 219 .buf = out_buf,
@@ -228,8 +230,9 @@ static bool ch7017_write(struct intel_dvo_device *dvo, int addr, uint8_t val)
228 230
229/** Probes for a CH7017 on the given bus and slave address. */ 231/** Probes for a CH7017 on the given bus and slave address. */
230static bool ch7017_init(struct intel_dvo_device *dvo, 232static bool ch7017_init(struct intel_dvo_device *dvo,
231 struct intel_i2c_chan *i2cbus) 233 struct i2c_adapter *adapter)
232{ 234{
235 struct intel_i2c_chan *i2cbus = container_of(adapter, struct intel_i2c_chan, adapter);
233 struct ch7017_priv *priv; 236 struct ch7017_priv *priv;
234 uint8_t val; 237 uint8_t val;
235 238
@@ -237,8 +240,7 @@ static bool ch7017_init(struct intel_dvo_device *dvo,
237 if (priv == NULL) 240 if (priv == NULL)
238 return false; 241 return false;
239 242
240 dvo->i2c_bus = i2cbus; 243 dvo->i2c_bus = adapter;
241 dvo->i2c_bus->slave_addr = dvo->slave_addr;
242 dvo->dev_priv = priv; 244 dvo->dev_priv = priv;
243 245
244 if (!ch7017_read(dvo, CH7017_DEVICE_ID, &val)) 246 if (!ch7017_read(dvo, CH7017_DEVICE_ID, &val))
@@ -248,7 +250,7 @@ static bool ch7017_init(struct intel_dvo_device *dvo,
248 val != CH7018_DEVICE_ID_VALUE && 250 val != CH7018_DEVICE_ID_VALUE &&
249 val != CH7019_DEVICE_ID_VALUE) { 251 val != CH7019_DEVICE_ID_VALUE) {
250 DRM_DEBUG("ch701x not detected, got %d: from %s Slave %d.\n", 252 DRM_DEBUG("ch701x not detected, got %d: from %s Slave %d.\n",
251 val, i2cbus->adapter.name,i2cbus->slave_addr); 253 val, i2cbus->adapter.name,dvo->slave_addr);
252 goto fail; 254 goto fail;
253 } 255 }
254 256
diff --git a/drivers/gpu/drm/i915/dvo_ch7xxx.c b/drivers/gpu/drm/i915/dvo_ch7xxx.c
index d2fd95dbd034..a9b896289680 100644
--- a/drivers/gpu/drm/i915/dvo_ch7xxx.c
+++ b/drivers/gpu/drm/i915/dvo_ch7xxx.c
@@ -123,19 +123,20 @@ static char *ch7xxx_get_id(uint8_t vid)
123static bool ch7xxx_readb(struct intel_dvo_device *dvo, int addr, uint8_t *ch) 123static bool ch7xxx_readb(struct intel_dvo_device *dvo, int addr, uint8_t *ch)
124{ 124{
125 struct ch7xxx_priv *ch7xxx= dvo->dev_priv; 125 struct ch7xxx_priv *ch7xxx= dvo->dev_priv;
126 struct intel_i2c_chan *i2cbus = dvo->i2c_bus; 126 struct i2c_adapter *adapter = dvo->i2c_bus;
127 struct intel_i2c_chan *i2cbus = container_of(adapter, struct intel_i2c_chan, adapter);
127 u8 out_buf[2]; 128 u8 out_buf[2];
128 u8 in_buf[2]; 129 u8 in_buf[2];
129 130
130 struct i2c_msg msgs[] = { 131 struct i2c_msg msgs[] = {
131 { 132 {
132 .addr = i2cbus->slave_addr, 133 .addr = dvo->slave_addr,
133 .flags = 0, 134 .flags = 0,
134 .len = 1, 135 .len = 1,
135 .buf = out_buf, 136 .buf = out_buf,
136 }, 137 },
137 { 138 {
138 .addr = i2cbus->slave_addr, 139 .addr = dvo->slave_addr,
139 .flags = I2C_M_RD, 140 .flags = I2C_M_RD,
140 .len = 1, 141 .len = 1,
141 .buf = in_buf, 142 .buf = in_buf,
@@ -152,7 +153,7 @@ static bool ch7xxx_readb(struct intel_dvo_device *dvo, int addr, uint8_t *ch)
152 153
153 if (!ch7xxx->quiet) { 154 if (!ch7xxx->quiet) {
154 DRM_DEBUG("Unable to read register 0x%02x from %s:%02x.\n", 155 DRM_DEBUG("Unable to read register 0x%02x from %s:%02x.\n",
155 addr, i2cbus->adapter.name, i2cbus->slave_addr); 156 addr, i2cbus->adapter.name, dvo->slave_addr);
156 } 157 }
157 return false; 158 return false;
158} 159}
@@ -161,10 +162,11 @@ static bool ch7xxx_readb(struct intel_dvo_device *dvo, int addr, uint8_t *ch)
161static bool ch7xxx_writeb(struct intel_dvo_device *dvo, int addr, uint8_t ch) 162static bool ch7xxx_writeb(struct intel_dvo_device *dvo, int addr, uint8_t ch)
162{ 163{
163 struct ch7xxx_priv *ch7xxx = dvo->dev_priv; 164 struct ch7xxx_priv *ch7xxx = dvo->dev_priv;
164 struct intel_i2c_chan *i2cbus = dvo->i2c_bus; 165 struct i2c_adapter *adapter = dvo->i2c_bus;
166 struct intel_i2c_chan *i2cbus = container_of(adapter, struct intel_i2c_chan, adapter);
165 uint8_t out_buf[2]; 167 uint8_t out_buf[2];
166 struct i2c_msg msg = { 168 struct i2c_msg msg = {
167 .addr = i2cbus->slave_addr, 169 .addr = dvo->slave_addr,
168 .flags = 0, 170 .flags = 0,
169 .len = 2, 171 .len = 2,
170 .buf = out_buf, 172 .buf = out_buf,
@@ -178,14 +180,14 @@ static bool ch7xxx_writeb(struct intel_dvo_device *dvo, int addr, uint8_t ch)
178 180
179 if (!ch7xxx->quiet) { 181 if (!ch7xxx->quiet) {
180 DRM_DEBUG("Unable to write register 0x%02x to %s:%d.\n", 182 DRM_DEBUG("Unable to write register 0x%02x to %s:%d.\n",
181 addr, i2cbus->adapter.name, i2cbus->slave_addr); 183 addr, i2cbus->adapter.name, dvo->slave_addr);
182 } 184 }
183 185
184 return false; 186 return false;
185} 187}
186 188
187static bool ch7xxx_init(struct intel_dvo_device *dvo, 189static bool ch7xxx_init(struct intel_dvo_device *dvo,
188 struct intel_i2c_chan *i2cbus) 190 struct i2c_adapter *adapter)
189{ 191{
190 /* this will detect the CH7xxx chip on the specified i2c bus */ 192 /* this will detect the CH7xxx chip on the specified i2c bus */
191 struct ch7xxx_priv *ch7xxx; 193 struct ch7xxx_priv *ch7xxx;
@@ -196,8 +198,7 @@ static bool ch7xxx_init(struct intel_dvo_device *dvo,
196 if (ch7xxx == NULL) 198 if (ch7xxx == NULL)
197 return false; 199 return false;
198 200
199 dvo->i2c_bus = i2cbus; 201 dvo->i2c_bus = adapter;
200 dvo->i2c_bus->slave_addr = dvo->slave_addr;
201 dvo->dev_priv = ch7xxx; 202 dvo->dev_priv = ch7xxx;
202 ch7xxx->quiet = true; 203 ch7xxx->quiet = true;
203 204
@@ -207,7 +208,7 @@ static bool ch7xxx_init(struct intel_dvo_device *dvo,
207 name = ch7xxx_get_id(vendor); 208 name = ch7xxx_get_id(vendor);
208 if (!name) { 209 if (!name) {
209 DRM_DEBUG("ch7xxx not detected; got 0x%02x from %s slave %d.\n", 210 DRM_DEBUG("ch7xxx not detected; got 0x%02x from %s slave %d.\n",
210 vendor, i2cbus->adapter.name, i2cbus->slave_addr); 211 vendor, adapter->name, dvo->slave_addr);
211 goto out; 212 goto out;
212 } 213 }
213 214
@@ -217,7 +218,7 @@ static bool ch7xxx_init(struct intel_dvo_device *dvo,
217 218
218 if (device != CH7xxx_DID) { 219 if (device != CH7xxx_DID) {
219 DRM_DEBUG("ch7xxx not detected; got 0x%02x from %s slave %d.\n", 220 DRM_DEBUG("ch7xxx not detected; got 0x%02x from %s slave %d.\n",
220 vendor, i2cbus->adapter.name, i2cbus->slave_addr); 221 vendor, adapter->name, dvo->slave_addr);
221 goto out; 222 goto out;
222 } 223 }
223 224
diff --git a/drivers/gpu/drm/i915/dvo_ivch.c b/drivers/gpu/drm/i915/dvo_ivch.c
index 0c8d375e8e37..aa176f9921fe 100644
--- a/drivers/gpu/drm/i915/dvo_ivch.c
+++ b/drivers/gpu/drm/i915/dvo_ivch.c
@@ -169,13 +169,14 @@ static void ivch_dump_regs(struct intel_dvo_device *dvo);
169static bool ivch_read(struct intel_dvo_device *dvo, int addr, uint16_t *data) 169static bool ivch_read(struct intel_dvo_device *dvo, int addr, uint16_t *data)
170{ 170{
171 struct ivch_priv *priv = dvo->dev_priv; 171 struct ivch_priv *priv = dvo->dev_priv;
172 struct intel_i2c_chan *i2cbus = dvo->i2c_bus; 172 struct i2c_adapter *adapter = dvo->i2c_bus;
173 struct intel_i2c_chan *i2cbus = container_of(adapter, struct intel_i2c_chan, adapter);
173 u8 out_buf[1]; 174 u8 out_buf[1];
174 u8 in_buf[2]; 175 u8 in_buf[2];
175 176
176 struct i2c_msg msgs[] = { 177 struct i2c_msg msgs[] = {
177 { 178 {
178 .addr = i2cbus->slave_addr, 179 .addr = dvo->slave_addr,
179 .flags = I2C_M_RD, 180 .flags = I2C_M_RD,
180 .len = 0, 181 .len = 0,
181 }, 182 },
@@ -186,7 +187,7 @@ static bool ivch_read(struct intel_dvo_device *dvo, int addr, uint16_t *data)
186 .buf = out_buf, 187 .buf = out_buf,
187 }, 188 },
188 { 189 {
189 .addr = i2cbus->slave_addr, 190 .addr = dvo->slave_addr,
190 .flags = I2C_M_RD | I2C_M_NOSTART, 191 .flags = I2C_M_RD | I2C_M_NOSTART,
191 .len = 2, 192 .len = 2,
192 .buf = in_buf, 193 .buf = in_buf,
@@ -202,7 +203,7 @@ static bool ivch_read(struct intel_dvo_device *dvo, int addr, uint16_t *data)
202 203
203 if (!priv->quiet) { 204 if (!priv->quiet) {
204 DRM_DEBUG("Unable to read register 0x%02x from %s:%02x.\n", 205 DRM_DEBUG("Unable to read register 0x%02x from %s:%02x.\n",
205 addr, i2cbus->adapter.name, i2cbus->slave_addr); 206 addr, i2cbus->adapter.name, dvo->slave_addr);
206 } 207 }
207 return false; 208 return false;
208} 209}
@@ -211,10 +212,11 @@ static bool ivch_read(struct intel_dvo_device *dvo, int addr, uint16_t *data)
211static bool ivch_write(struct intel_dvo_device *dvo, int addr, uint16_t data) 212static bool ivch_write(struct intel_dvo_device *dvo, int addr, uint16_t data)
212{ 213{
213 struct ivch_priv *priv = dvo->dev_priv; 214 struct ivch_priv *priv = dvo->dev_priv;
214 struct intel_i2c_chan *i2cbus = dvo->i2c_bus; 215 struct i2c_adapter *adapter = dvo->i2c_bus;
216 struct intel_i2c_chan *i2cbus = container_of(adapter, struct intel_i2c_chan, adapter);
215 u8 out_buf[3]; 217 u8 out_buf[3];
216 struct i2c_msg msg = { 218 struct i2c_msg msg = {
217 .addr = i2cbus->slave_addr, 219 .addr = dvo->slave_addr,
218 .flags = 0, 220 .flags = 0,
219 .len = 3, 221 .len = 3,
220 .buf = out_buf, 222 .buf = out_buf,
@@ -229,7 +231,7 @@ static bool ivch_write(struct intel_dvo_device *dvo, int addr, uint16_t data)
229 231
230 if (!priv->quiet) { 232 if (!priv->quiet) {
231 DRM_DEBUG("Unable to write register 0x%02x to %s:%d.\n", 233 DRM_DEBUG("Unable to write register 0x%02x to %s:%d.\n",
232 addr, i2cbus->adapter.name, i2cbus->slave_addr); 234 addr, i2cbus->adapter.name, dvo->slave_addr);
233 } 235 }
234 236
235 return false; 237 return false;
@@ -237,7 +239,7 @@ static bool ivch_write(struct intel_dvo_device *dvo, int addr, uint16_t data)
237 239
238/** Probes the given bus and slave address for an ivch */ 240/** Probes the given bus and slave address for an ivch */
239static bool ivch_init(struct intel_dvo_device *dvo, 241static bool ivch_init(struct intel_dvo_device *dvo,
240 struct intel_i2c_chan *i2cbus) 242 struct i2c_adapter *adapter)
241{ 243{
242 struct ivch_priv *priv; 244 struct ivch_priv *priv;
243 uint16_t temp; 245 uint16_t temp;
@@ -246,8 +248,7 @@ static bool ivch_init(struct intel_dvo_device *dvo,
246 if (priv == NULL) 248 if (priv == NULL)
247 return false; 249 return false;
248 250
249 dvo->i2c_bus = i2cbus; 251 dvo->i2c_bus = adapter;
250 dvo->i2c_bus->slave_addr = dvo->slave_addr;
251 dvo->dev_priv = priv; 252 dvo->dev_priv = priv;
252 priv->quiet = true; 253 priv->quiet = true;
253 254
diff --git a/drivers/gpu/drm/i915/dvo_sil164.c b/drivers/gpu/drm/i915/dvo_sil164.c
index 033a4bb070b2..e1c1f7341e5c 100644
--- a/drivers/gpu/drm/i915/dvo_sil164.c
+++ b/drivers/gpu/drm/i915/dvo_sil164.c
@@ -76,19 +76,20 @@ struct sil164_priv {
76static bool sil164_readb(struct intel_dvo_device *dvo, int addr, uint8_t *ch) 76static bool sil164_readb(struct intel_dvo_device *dvo, int addr, uint8_t *ch)
77{ 77{
78 struct sil164_priv *sil = dvo->dev_priv; 78 struct sil164_priv *sil = dvo->dev_priv;
79 struct intel_i2c_chan *i2cbus = dvo->i2c_bus; 79 struct i2c_adapter *adapter = dvo->i2c_bus;
80 struct intel_i2c_chan *i2cbus = container_of(adapter, struct intel_i2c_chan, adapter);
80 u8 out_buf[2]; 81 u8 out_buf[2];
81 u8 in_buf[2]; 82 u8 in_buf[2];
82 83
83 struct i2c_msg msgs[] = { 84 struct i2c_msg msgs[] = {
84 { 85 {
85 .addr = i2cbus->slave_addr, 86 .addr = dvo->slave_addr,
86 .flags = 0, 87 .flags = 0,
87 .len = 1, 88 .len = 1,
88 .buf = out_buf, 89 .buf = out_buf,
89 }, 90 },
90 { 91 {
91 .addr = i2cbus->slave_addr, 92 .addr = dvo->slave_addr,
92 .flags = I2C_M_RD, 93 .flags = I2C_M_RD,
93 .len = 1, 94 .len = 1,
94 .buf = in_buf, 95 .buf = in_buf,
@@ -105,7 +106,7 @@ static bool sil164_readb(struct intel_dvo_device *dvo, int addr, uint8_t *ch)
105 106
106 if (!sil->quiet) { 107 if (!sil->quiet) {
107 DRM_DEBUG("Unable to read register 0x%02x from %s:%02x.\n", 108 DRM_DEBUG("Unable to read register 0x%02x from %s:%02x.\n",
108 addr, i2cbus->adapter.name, i2cbus->slave_addr); 109 addr, i2cbus->adapter.name, dvo->slave_addr);
109 } 110 }
110 return false; 111 return false;
111} 112}
@@ -113,10 +114,11 @@ static bool sil164_readb(struct intel_dvo_device *dvo, int addr, uint8_t *ch)
113static bool sil164_writeb(struct intel_dvo_device *dvo, int addr, uint8_t ch) 114static bool sil164_writeb(struct intel_dvo_device *dvo, int addr, uint8_t ch)
114{ 115{
115 struct sil164_priv *sil= dvo->dev_priv; 116 struct sil164_priv *sil= dvo->dev_priv;
116 struct intel_i2c_chan *i2cbus = dvo->i2c_bus; 117 struct i2c_adapter *adapter = dvo->i2c_bus;
118 struct intel_i2c_chan *i2cbus = container_of(adapter, struct intel_i2c_chan, adapter);
117 uint8_t out_buf[2]; 119 uint8_t out_buf[2];
118 struct i2c_msg msg = { 120 struct i2c_msg msg = {
119 .addr = i2cbus->slave_addr, 121 .addr = dvo->slave_addr,
120 .flags = 0, 122 .flags = 0,
121 .len = 2, 123 .len = 2,
122 .buf = out_buf, 124 .buf = out_buf,
@@ -130,7 +132,7 @@ static bool sil164_writeb(struct intel_dvo_device *dvo, int addr, uint8_t ch)
130 132
131 if (!sil->quiet) { 133 if (!sil->quiet) {
132 DRM_DEBUG("Unable to write register 0x%02x to %s:%d.\n", 134 DRM_DEBUG("Unable to write register 0x%02x to %s:%d.\n",
133 addr, i2cbus->adapter.name, i2cbus->slave_addr); 135 addr, i2cbus->adapter.name, dvo->slave_addr);
134 } 136 }
135 137
136 return false; 138 return false;
@@ -138,7 +140,7 @@ static bool sil164_writeb(struct intel_dvo_device *dvo, int addr, uint8_t ch)
138 140
139/* Silicon Image 164 driver for chip on i2c bus */ 141/* Silicon Image 164 driver for chip on i2c bus */
140static bool sil164_init(struct intel_dvo_device *dvo, 142static bool sil164_init(struct intel_dvo_device *dvo,
141 struct intel_i2c_chan *i2cbus) 143 struct i2c_adapter *adapter)
142{ 144{
143 /* this will detect the SIL164 chip on the specified i2c bus */ 145 /* this will detect the SIL164 chip on the specified i2c bus */
144 struct sil164_priv *sil; 146 struct sil164_priv *sil;
@@ -148,8 +150,7 @@ static bool sil164_init(struct intel_dvo_device *dvo,
148 if (sil == NULL) 150 if (sil == NULL)
149 return false; 151 return false;
150 152
151 dvo->i2c_bus = i2cbus; 153 dvo->i2c_bus = adapter;
152 dvo->i2c_bus->slave_addr = dvo->slave_addr;
153 dvo->dev_priv = sil; 154 dvo->dev_priv = sil;
154 sil->quiet = true; 155 sil->quiet = true;
155 156
@@ -158,7 +159,7 @@ static bool sil164_init(struct intel_dvo_device *dvo,
158 159
159 if (ch != (SIL164_VID & 0xff)) { 160 if (ch != (SIL164_VID & 0xff)) {
160 DRM_DEBUG("sil164 not detected got %d: from %s Slave %d.\n", 161 DRM_DEBUG("sil164 not detected got %d: from %s Slave %d.\n",
161 ch, i2cbus->adapter.name, i2cbus->slave_addr); 162 ch, adapter->name, dvo->slave_addr);
162 goto out; 163 goto out;
163 } 164 }
164 165
@@ -167,7 +168,7 @@ static bool sil164_init(struct intel_dvo_device *dvo,
167 168
168 if (ch != (SIL164_DID & 0xff)) { 169 if (ch != (SIL164_DID & 0xff)) {
169 DRM_DEBUG("sil164 not detected got %d: from %s Slave %d.\n", 170 DRM_DEBUG("sil164 not detected got %d: from %s Slave %d.\n",
170 ch, i2cbus->adapter.name, i2cbus->slave_addr); 171 ch, adapter->name, dvo->slave_addr);
171 goto out; 172 goto out;
172 } 173 }
173 sil->quiet = false; 174 sil->quiet = false;
diff --git a/drivers/gpu/drm/i915/dvo_tfp410.c b/drivers/gpu/drm/i915/dvo_tfp410.c
index 207fda806ebf..9ecc907384ec 100644
--- a/drivers/gpu/drm/i915/dvo_tfp410.c
+++ b/drivers/gpu/drm/i915/dvo_tfp410.c
@@ -101,19 +101,20 @@ struct tfp410_priv {
101static bool tfp410_readb(struct intel_dvo_device *dvo, int addr, uint8_t *ch) 101static bool tfp410_readb(struct intel_dvo_device *dvo, int addr, uint8_t *ch)
102{ 102{
103 struct tfp410_priv *tfp = dvo->dev_priv; 103 struct tfp410_priv *tfp = dvo->dev_priv;
104 struct intel_i2c_chan *i2cbus = dvo->i2c_bus; 104 struct i2c_adapter *adapter = dvo->i2c_bus;
105 struct intel_i2c_chan *i2cbus = container_of(adapter, struct intel_i2c_chan, adapter);
105 u8 out_buf[2]; 106 u8 out_buf[2];
106 u8 in_buf[2]; 107 u8 in_buf[2];
107 108
108 struct i2c_msg msgs[] = { 109 struct i2c_msg msgs[] = {
109 { 110 {
110 .addr = i2cbus->slave_addr, 111 .addr = dvo->slave_addr,
111 .flags = 0, 112 .flags = 0,
112 .len = 1, 113 .len = 1,
113 .buf = out_buf, 114 .buf = out_buf,
114 }, 115 },
115 { 116 {
116 .addr = i2cbus->slave_addr, 117 .addr = dvo->slave_addr,
117 .flags = I2C_M_RD, 118 .flags = I2C_M_RD,
118 .len = 1, 119 .len = 1,
119 .buf = in_buf, 120 .buf = in_buf,
@@ -130,7 +131,7 @@ static bool tfp410_readb(struct intel_dvo_device *dvo, int addr, uint8_t *ch)
130 131
131 if (!tfp->quiet) { 132 if (!tfp->quiet) {
132 DRM_DEBUG("Unable to read register 0x%02x from %s:%02x.\n", 133 DRM_DEBUG("Unable to read register 0x%02x from %s:%02x.\n",
133 addr, i2cbus->adapter.name, i2cbus->slave_addr); 134 addr, i2cbus->adapter.name, dvo->slave_addr);
134 } 135 }
135 return false; 136 return false;
136} 137}
@@ -138,10 +139,11 @@ static bool tfp410_readb(struct intel_dvo_device *dvo, int addr, uint8_t *ch)
138static bool tfp410_writeb(struct intel_dvo_device *dvo, int addr, uint8_t ch) 139static bool tfp410_writeb(struct intel_dvo_device *dvo, int addr, uint8_t ch)
139{ 140{
140 struct tfp410_priv *tfp = dvo->dev_priv; 141 struct tfp410_priv *tfp = dvo->dev_priv;
141 struct intel_i2c_chan *i2cbus = dvo->i2c_bus; 142 struct i2c_adapter *adapter = dvo->i2c_bus;
143 struct intel_i2c_chan *i2cbus = container_of(adapter, struct intel_i2c_chan, adapter);
142 uint8_t out_buf[2]; 144 uint8_t out_buf[2];
143 struct i2c_msg msg = { 145 struct i2c_msg msg = {
144 .addr = i2cbus->slave_addr, 146 .addr = dvo->slave_addr,
145 .flags = 0, 147 .flags = 0,
146 .len = 2, 148 .len = 2,
147 .buf = out_buf, 149 .buf = out_buf,
@@ -155,7 +157,7 @@ static bool tfp410_writeb(struct intel_dvo_device *dvo, int addr, uint8_t ch)
155 157
156 if (!tfp->quiet) { 158 if (!tfp->quiet) {
157 DRM_DEBUG("Unable to write register 0x%02x to %s:%d.\n", 159 DRM_DEBUG("Unable to write register 0x%02x to %s:%d.\n",
158 addr, i2cbus->adapter.name, i2cbus->slave_addr); 160 addr, i2cbus->adapter.name, dvo->slave_addr);
159 } 161 }
160 162
161 return false; 163 return false;
@@ -174,7 +176,7 @@ static int tfp410_getid(struct intel_dvo_device *dvo, int addr)
174 176
175/* Ti TFP410 driver for chip on i2c bus */ 177/* Ti TFP410 driver for chip on i2c bus */
176static bool tfp410_init(struct intel_dvo_device *dvo, 178static bool tfp410_init(struct intel_dvo_device *dvo,
177 struct intel_i2c_chan *i2cbus) 179 struct i2c_adapter *adapter)
178{ 180{
179 /* this will detect the tfp410 chip on the specified i2c bus */ 181 /* this will detect the tfp410 chip on the specified i2c bus */
180 struct tfp410_priv *tfp; 182 struct tfp410_priv *tfp;
@@ -184,20 +186,19 @@ static bool tfp410_init(struct intel_dvo_device *dvo,
184 if (tfp == NULL) 186 if (tfp == NULL)
185 return false; 187 return false;
186 188
187 dvo->i2c_bus = i2cbus; 189 dvo->i2c_bus = adapter;
188 dvo->i2c_bus->slave_addr = dvo->slave_addr;
189 dvo->dev_priv = tfp; 190 dvo->dev_priv = tfp;
190 tfp->quiet = true; 191 tfp->quiet = true;
191 192
192 if ((id = tfp410_getid(dvo, TFP410_VID_LO)) != TFP410_VID) { 193 if ((id = tfp410_getid(dvo, TFP410_VID_LO)) != TFP410_VID) {
193 DRM_DEBUG("tfp410 not detected got VID %X: from %s Slave %d.\n", 194 DRM_DEBUG("tfp410 not detected got VID %X: from %s Slave %d.\n",
194 id, i2cbus->adapter.name, i2cbus->slave_addr); 195 id, adapter->name, dvo->slave_addr);
195 goto out; 196 goto out;
196 } 197 }
197 198
198 if ((id = tfp410_getid(dvo, TFP410_DID_LO)) != TFP410_DID) { 199 if ((id = tfp410_getid(dvo, TFP410_DID_LO)) != TFP410_DID) {
199 DRM_DEBUG("tfp410 not detected got DID %X: from %s Slave %d.\n", 200 DRM_DEBUG("tfp410 not detected got DID %X: from %s Slave %d.\n",
200 id, i2cbus->adapter.name, i2cbus->slave_addr); 201 id, adapter->name, dvo->slave_addr);
201 goto out; 202 goto out;
202 } 203 }
203 tfp->quiet = false; 204 tfp->quiet = false;
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 98560e1e899a..e3cb4025e323 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -67,8 +67,6 @@ static int i915_suspend(struct drm_device *dev, pm_message_t state)
67 67
68 pci_save_state(dev->pdev); 68 pci_save_state(dev->pdev);
69 69
70 i915_save_state(dev);
71
72 /* If KMS is active, we do the leavevt stuff here */ 70 /* If KMS is active, we do the leavevt stuff here */
73 if (drm_core_check_feature(dev, DRIVER_MODESET)) { 71 if (drm_core_check_feature(dev, DRIVER_MODESET)) {
74 if (i915_gem_idle(dev)) 72 if (i915_gem_idle(dev))
@@ -77,6 +75,8 @@ static int i915_suspend(struct drm_device *dev, pm_message_t state)
77 drm_irq_uninstall(dev); 75 drm_irq_uninstall(dev);
78 } 76 }
79 77
78 i915_save_state(dev);
79
80 intel_opregion_free(dev, 1); 80 intel_opregion_free(dev, 1);
81 81
82 if (state.event == PM_EVENT_SUSPEND) { 82 if (state.event == PM_EVENT_SUSPEND) {
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 7a84f04e8439..bb4c2d387b6c 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -306,6 +306,17 @@ typedef struct drm_i915_private {
306 u32 saveCURBPOS; 306 u32 saveCURBPOS;
307 u32 saveCURBBASE; 307 u32 saveCURBBASE;
308 u32 saveCURSIZE; 308 u32 saveCURSIZE;
309 u32 saveDP_B;
310 u32 saveDP_C;
311 u32 saveDP_D;
312 u32 savePIPEA_GMCH_DATA_M;
313 u32 savePIPEB_GMCH_DATA_M;
314 u32 savePIPEA_GMCH_DATA_N;
315 u32 savePIPEB_GMCH_DATA_N;
316 u32 savePIPEA_DP_LINK_M;
317 u32 savePIPEB_DP_LINK_M;
318 u32 savePIPEA_DP_LINK_N;
319 u32 savePIPEB_DP_LINK_N;
309 320
310 struct { 321 struct {
311 struct drm_mm gtt_space; 322 struct drm_mm gtt_space;
@@ -857,6 +868,7 @@ extern int i915_wait_ring(struct drm_device * dev, int n, const char *caller);
857#define HAS_128_BYTE_Y_TILING(dev) (IS_I9XX(dev) && !(IS_I915G(dev) || \ 868#define HAS_128_BYTE_Y_TILING(dev) (IS_I9XX(dev) && !(IS_I915G(dev) || \
858 IS_I915GM(dev))) 869 IS_I915GM(dev)))
859#define SUPPORTS_INTEGRATED_HDMI(dev) (IS_G4X(dev) || IS_IGDNG(dev)) 870#define SUPPORTS_INTEGRATED_HDMI(dev) (IS_G4X(dev) || IS_IGDNG(dev))
871#define SUPPORTS_INTEGRATED_DP(dev) (IS_G4X(dev) || IS_IGDNG(dev))
860#define I915_HAS_HOTPLUG(dev) (IS_I945G(dev) || IS_I945GM(dev) || IS_I965G(dev)) 872#define I915_HAS_HOTPLUG(dev) (IS_I945G(dev) || IS_I945GM(dev) || IS_I965G(dev))
861 873
862#define PRIMARY_RINGBUFFER_SIZE (128*1024) 874#define PRIMARY_RINGBUFFER_SIZE (128*1024)
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index fd2b8bdffe3f..876b65cb7629 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -1006,7 +1006,7 @@ i915_gem_set_domain_ioctl(struct drm_device *dev, void *data,
1006 1006
1007 mutex_lock(&dev->struct_mutex); 1007 mutex_lock(&dev->struct_mutex);
1008#if WATCH_BUF 1008#if WATCH_BUF
1009 DRM_INFO("set_domain_ioctl %p(%d), %08x %08x\n", 1009 DRM_INFO("set_domain_ioctl %p(%zd), %08x %08x\n",
1010 obj, obj->size, read_domains, write_domain); 1010 obj, obj->size, read_domains, write_domain);
1011#endif 1011#endif
1012 if (read_domains & I915_GEM_DOMAIN_GTT) { 1012 if (read_domains & I915_GEM_DOMAIN_GTT) {
@@ -1050,7 +1050,7 @@ i915_gem_sw_finish_ioctl(struct drm_device *dev, void *data,
1050 } 1050 }
1051 1051
1052#if WATCH_BUF 1052#if WATCH_BUF
1053 DRM_INFO("%s: sw_finish %d (%p %d)\n", 1053 DRM_INFO("%s: sw_finish %d (%p %zd)\n",
1054 __func__, args->handle, obj, obj->size); 1054 __func__, args->handle, obj, obj->size);
1055#endif 1055#endif
1056 obj_priv = obj->driver_private; 1056 obj_priv = obj->driver_private;
@@ -2423,7 +2423,7 @@ i915_gem_object_bind_to_gtt(struct drm_gem_object *obj, unsigned alignment)
2423 } 2423 }
2424 2424
2425#if WATCH_BUF 2425#if WATCH_BUF
2426 DRM_INFO("Binding object of size %d at 0x%08x\n", 2426 DRM_INFO("Binding object of size %zd at 0x%08x\n",
2427 obj->size, obj_priv->gtt_offset); 2427 obj->size, obj_priv->gtt_offset);
2428#endif 2428#endif
2429 ret = i915_gem_object_get_pages(obj); 2429 ret = i915_gem_object_get_pages(obj);
@@ -4227,6 +4227,7 @@ i915_gem_lastclose(struct drm_device *dev)
4227void 4227void
4228i915_gem_load(struct drm_device *dev) 4228i915_gem_load(struct drm_device *dev)
4229{ 4229{
4230 int i;
4230 drm_i915_private_t *dev_priv = dev->dev_private; 4231 drm_i915_private_t *dev_priv = dev->dev_private;
4231 4232
4232 spin_lock_init(&dev_priv->mm.active_list_lock); 4233 spin_lock_init(&dev_priv->mm.active_list_lock);
@@ -4246,6 +4247,18 @@ i915_gem_load(struct drm_device *dev)
4246 else 4247 else
4247 dev_priv->num_fence_regs = 8; 4248 dev_priv->num_fence_regs = 8;
4248 4249
4250 /* Initialize fence registers to zero */
4251 if (IS_I965G(dev)) {
4252 for (i = 0; i < 16; i++)
4253 I915_WRITE64(FENCE_REG_965_0 + (i * 8), 0);
4254 } else {
4255 for (i = 0; i < 8; i++)
4256 I915_WRITE(FENCE_REG_830_0 + (i * 4), 0);
4257 if (IS_I945G(dev) || IS_I945GM(dev) || IS_G33(dev))
4258 for (i = 0; i < 8; i++)
4259 I915_WRITE(FENCE_REG_945_8 + (i * 4), 0);
4260 }
4261
4249 i915_gem_detect_bit_6_swizzle(dev); 4262 i915_gem_detect_bit_6_swizzle(dev);
4250} 4263}
4251 4264
diff --git a/drivers/gpu/drm/i915/i915_gem_debug.c b/drivers/gpu/drm/i915/i915_gem_debug.c
index 8d0b943e2c5a..e602614bd3f8 100644
--- a/drivers/gpu/drm/i915/i915_gem_debug.c
+++ b/drivers/gpu/drm/i915/i915_gem_debug.c
@@ -87,7 +87,7 @@ i915_gem_dump_object(struct drm_gem_object *obj, int len,
87 chunk_len = page_len - chunk; 87 chunk_len = page_len - chunk;
88 if (chunk_len > 128) 88 if (chunk_len > 128)
89 chunk_len = 128; 89 chunk_len = 128;
90 i915_gem_dump_page(obj_priv->page_list[page], 90 i915_gem_dump_page(obj_priv->pages[page],
91 chunk, chunk + chunk_len, 91 chunk, chunk + chunk_len,
92 obj_priv->gtt_offset + 92 obj_priv->gtt_offset +
93 page * PAGE_SIZE, 93 page * PAGE_SIZE,
@@ -143,7 +143,7 @@ i915_gem_object_check_coherency(struct drm_gem_object *obj, int handle)
143 uint32_t *backing_map = NULL; 143 uint32_t *backing_map = NULL;
144 int bad_count = 0; 144 int bad_count = 0;
145 145
146 DRM_INFO("%s: checking coherency of object %p@0x%08x (%d, %dkb):\n", 146 DRM_INFO("%s: checking coherency of object %p@0x%08x (%d, %zdkb):\n",
147 __func__, obj, obj_priv->gtt_offset, handle, 147 __func__, obj, obj_priv->gtt_offset, handle,
148 obj->size / 1024); 148 obj->size / 1024);
149 149
@@ -157,7 +157,7 @@ i915_gem_object_check_coherency(struct drm_gem_object *obj, int handle)
157 for (page = 0; page < obj->size / PAGE_SIZE; page++) { 157 for (page = 0; page < obj->size / PAGE_SIZE; page++) {
158 int i; 158 int i;
159 159
160 backing_map = kmap_atomic(obj_priv->page_list[page], KM_USER0); 160 backing_map = kmap_atomic(obj_priv->pages[page], KM_USER0);
161 161
162 if (backing_map == NULL) { 162 if (backing_map == NULL) {
163 DRM_ERROR("failed to map backing page\n"); 163 DRM_ERROR("failed to map backing page\n");
diff --git a/drivers/gpu/drm/i915/i915_gem_tiling.c b/drivers/gpu/drm/i915/i915_gem_tiling.c
index 5c1ceec49f5b..daeae62e1c28 100644
--- a/drivers/gpu/drm/i915/i915_gem_tiling.c
+++ b/drivers/gpu/drm/i915/i915_gem_tiling.c
@@ -114,11 +114,13 @@ intel_alloc_mchbar_resource(struct drm_device *dev)
114 mchbar_addr = ((u64)temp_hi << 32) | temp_lo; 114 mchbar_addr = ((u64)temp_hi << 32) | temp_lo;
115 115
116 /* If ACPI doesn't have it, assume we need to allocate it ourselves */ 116 /* If ACPI doesn't have it, assume we need to allocate it ourselves */
117#ifdef CONFIG_PNP
117 if (mchbar_addr && 118 if (mchbar_addr &&
118 pnp_range_reserved(mchbar_addr, mchbar_addr + MCHBAR_SIZE)) { 119 pnp_range_reserved(mchbar_addr, mchbar_addr + MCHBAR_SIZE)) {
119 ret = 0; 120 ret = 0;
120 goto out_put; 121 goto out_put;
121 } 122 }
123#endif
122 124
123 /* Get some space for it */ 125 /* Get some space for it */
124 ret = pci_bus_alloc_resource(bridge_dev->bus, &dev_priv->mch_res, 126 ret = pci_bus_alloc_resource(bridge_dev->bus, &dev_priv->mch_res,
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index b86b7b7130c6..228546f6eaa4 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -232,7 +232,17 @@ static void i915_hotplug_work_func(struct work_struct *work)
232 drm_i915_private_t *dev_priv = container_of(work, drm_i915_private_t, 232 drm_i915_private_t *dev_priv = container_of(work, drm_i915_private_t,
233 hotplug_work); 233 hotplug_work);
234 struct drm_device *dev = dev_priv->dev; 234 struct drm_device *dev = dev_priv->dev;
235 235 struct drm_mode_config *mode_config = &dev->mode_config;
236 struct drm_connector *connector;
237
238 if (mode_config->num_connector) {
239 list_for_each_entry(connector, &mode_config->connector_list, head) {
240 struct intel_output *intel_output = to_intel_output(connector);
241
242 if (intel_output->hot_plug)
243 (*intel_output->hot_plug) (intel_output);
244 }
245 }
236 /* Just fire off a uevent and let userspace tell us what to do */ 246 /* Just fire off a uevent and let userspace tell us what to do */
237 drm_sysfs_hotplug_event(dev); 247 drm_sysfs_hotplug_event(dev);
238} 248}
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index f6237a0b1133..88bf7521405f 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -569,6 +569,19 @@
569#define C0DRB3 0x10206 569#define C0DRB3 0x10206
570#define C1DRB3 0x10606 570#define C1DRB3 0x10606
571 571
572/* Clocking configuration register */
573#define CLKCFG 0x10c00
574#define CLKCFG_FSB_400 (0 << 0) /* hrawclk 100 */
575#define CLKCFG_FSB_533 (1 << 0) /* hrawclk 133 */
576#define CLKCFG_FSB_667 (3 << 0) /* hrawclk 166 */
577#define CLKCFG_FSB_800 (2 << 0) /* hrawclk 200 */
578#define CLKCFG_FSB_1067 (6 << 0) /* hrawclk 266 */
579#define CLKCFG_FSB_1333 (7 << 0) /* hrawclk 333 */
580/* this is a guess, could be 5 as well */
581#define CLKCFG_FSB_1600 (4 << 0) /* hrawclk 400 */
582#define CLKCFG_FSB_1600_ALT (5 << 0) /* hrawclk 400 */
583#define CLKCFG_FSB_MASK (7 << 0)
584
572/** GM965 GM45 render standby register */ 585/** GM965 GM45 render standby register */
573#define MCHBAR_RENDER_STANDBY 0x111B8 586#define MCHBAR_RENDER_STANDBY 0x111B8
574 587
@@ -834,9 +847,25 @@
834#define HORIZ_INTERP_MASK (3 << 6) 847#define HORIZ_INTERP_MASK (3 << 6)
835#define HORIZ_AUTO_SCALE (1 << 5) 848#define HORIZ_AUTO_SCALE (1 << 5)
836#define PANEL_8TO6_DITHER_ENABLE (1 << 3) 849#define PANEL_8TO6_DITHER_ENABLE (1 << 3)
850#define PFIT_FILTER_FUZZY (0 << 24)
851#define PFIT_SCALING_AUTO (0 << 26)
852#define PFIT_SCALING_PROGRAMMED (1 << 26)
853#define PFIT_SCALING_PILLAR (2 << 26)
854#define PFIT_SCALING_LETTER (3 << 26)
837#define PFIT_PGM_RATIOS 0x61234 855#define PFIT_PGM_RATIOS 0x61234
838#define PFIT_VERT_SCALE_MASK 0xfff00000 856#define PFIT_VERT_SCALE_MASK 0xfff00000
839#define PFIT_HORIZ_SCALE_MASK 0x0000fff0 857#define PFIT_HORIZ_SCALE_MASK 0x0000fff0
858/* Pre-965 */
859#define PFIT_VERT_SCALE_SHIFT 20
860#define PFIT_VERT_SCALE_MASK 0xfff00000
861#define PFIT_HORIZ_SCALE_SHIFT 4
862#define PFIT_HORIZ_SCALE_MASK 0x0000fff0
863/* 965+ */
864#define PFIT_VERT_SCALE_SHIFT_965 16
865#define PFIT_VERT_SCALE_MASK_965 0x1fff0000
866#define PFIT_HORIZ_SCALE_SHIFT_965 0
867#define PFIT_HORIZ_SCALE_MASK_965 0x00001fff
868
840#define PFIT_AUTO_RATIOS 0x61238 869#define PFIT_AUTO_RATIOS 0x61238
841 870
842/* Backlight control */ 871/* Backlight control */
diff --git a/drivers/gpu/drm/i915/i915_suspend.c b/drivers/gpu/drm/i915/i915_suspend.c
index a98e2831ed31..8d8e083d14ab 100644
--- a/drivers/gpu/drm/i915/i915_suspend.c
+++ b/drivers/gpu/drm/i915/i915_suspend.c
@@ -322,6 +322,20 @@ int i915_save_state(struct drm_device *dev)
322 dev_priv->savePP_OFF_DELAYS = I915_READ(PP_OFF_DELAYS); 322 dev_priv->savePP_OFF_DELAYS = I915_READ(PP_OFF_DELAYS);
323 dev_priv->savePP_DIVISOR = I915_READ(PP_DIVISOR); 323 dev_priv->savePP_DIVISOR = I915_READ(PP_DIVISOR);
324 324
325 /* Display Port state */
326 if (SUPPORTS_INTEGRATED_DP(dev)) {
327 dev_priv->saveDP_B = I915_READ(DP_B);
328 dev_priv->saveDP_C = I915_READ(DP_C);
329 dev_priv->saveDP_D = I915_READ(DP_D);
330 dev_priv->savePIPEA_GMCH_DATA_M = I915_READ(PIPEA_GMCH_DATA_M);
331 dev_priv->savePIPEB_GMCH_DATA_M = I915_READ(PIPEB_GMCH_DATA_M);
332 dev_priv->savePIPEA_GMCH_DATA_N = I915_READ(PIPEA_GMCH_DATA_N);
333 dev_priv->savePIPEB_GMCH_DATA_N = I915_READ(PIPEB_GMCH_DATA_N);
334 dev_priv->savePIPEA_DP_LINK_M = I915_READ(PIPEA_DP_LINK_M);
335 dev_priv->savePIPEB_DP_LINK_M = I915_READ(PIPEB_DP_LINK_M);
336 dev_priv->savePIPEA_DP_LINK_N = I915_READ(PIPEA_DP_LINK_N);
337 dev_priv->savePIPEB_DP_LINK_N = I915_READ(PIPEB_DP_LINK_N);
338 }
325 /* FIXME: save TV & SDVO state */ 339 /* FIXME: save TV & SDVO state */
326 340
327 /* FBC state */ 341 /* FBC state */
@@ -404,7 +418,19 @@ int i915_restore_state(struct drm_device *dev)
404 for (i = 0; i < 8; i++) 418 for (i = 0; i < 8; i++)
405 I915_WRITE(FENCE_REG_945_8 + (i * 4), dev_priv->saveFENCE[i+8]); 419 I915_WRITE(FENCE_REG_945_8 + (i * 4), dev_priv->saveFENCE[i+8]);
406 } 420 }
407 421
422 /* Display port ratios (must be done before clock is set) */
423 if (SUPPORTS_INTEGRATED_DP(dev)) {
424 I915_WRITE(PIPEA_GMCH_DATA_M, dev_priv->savePIPEA_GMCH_DATA_M);
425 I915_WRITE(PIPEB_GMCH_DATA_M, dev_priv->savePIPEB_GMCH_DATA_M);
426 I915_WRITE(PIPEA_GMCH_DATA_N, dev_priv->savePIPEA_GMCH_DATA_N);
427 I915_WRITE(PIPEB_GMCH_DATA_N, dev_priv->savePIPEB_GMCH_DATA_N);
428 I915_WRITE(PIPEA_DP_LINK_M, dev_priv->savePIPEA_DP_LINK_M);
429 I915_WRITE(PIPEB_DP_LINK_M, dev_priv->savePIPEB_DP_LINK_M);
430 I915_WRITE(PIPEA_DP_LINK_N, dev_priv->savePIPEA_DP_LINK_N);
431 I915_WRITE(PIPEB_DP_LINK_N, dev_priv->savePIPEB_DP_LINK_N);
432 }
433
408 /* Pipe & plane A info */ 434 /* Pipe & plane A info */
409 /* Prime the clock */ 435 /* Prime the clock */
410 if (dev_priv->saveDPLL_A & DPLL_VCO_ENABLE) { 436 if (dev_priv->saveDPLL_A & DPLL_VCO_ENABLE) {
@@ -518,6 +544,12 @@ int i915_restore_state(struct drm_device *dev)
518 I915_WRITE(PP_DIVISOR, dev_priv->savePP_DIVISOR); 544 I915_WRITE(PP_DIVISOR, dev_priv->savePP_DIVISOR);
519 I915_WRITE(PP_CONTROL, dev_priv->savePP_CONTROL); 545 I915_WRITE(PP_CONTROL, dev_priv->savePP_CONTROL);
520 546
547 /* Display Port state */
548 if (SUPPORTS_INTEGRATED_DP(dev)) {
549 I915_WRITE(DP_B, dev_priv->saveDP_B);
550 I915_WRITE(DP_C, dev_priv->saveDP_C);
551 I915_WRITE(DP_D, dev_priv->saveDP_D);
552 }
521 /* FIXME: restore TV & SDVO state */ 553 /* FIXME: restore TV & SDVO state */
522 554
523 /* FBC info */ 555 /* FBC info */
diff --git a/drivers/gpu/drm/i915/intel_bios.c b/drivers/gpu/drm/i915/intel_bios.c
index cdd126d068a7..716409a57244 100644
--- a/drivers/gpu/drm/i915/intel_bios.c
+++ b/drivers/gpu/drm/i915/intel_bios.c
@@ -99,9 +99,11 @@ parse_lfp_panel_data(struct drm_i915_private *dev_priv,
99{ 99{
100 struct bdb_lvds_options *lvds_options; 100 struct bdb_lvds_options *lvds_options;
101 struct bdb_lvds_lfp_data *lvds_lfp_data; 101 struct bdb_lvds_lfp_data *lvds_lfp_data;
102 struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs;
102 struct bdb_lvds_lfp_data_entry *entry; 103 struct bdb_lvds_lfp_data_entry *entry;
103 struct lvds_dvo_timing *dvo_timing; 104 struct lvds_dvo_timing *dvo_timing;
104 struct drm_display_mode *panel_fixed_mode; 105 struct drm_display_mode *panel_fixed_mode;
106 int lfp_data_size;
105 107
106 /* Defaults if we can't find VBT info */ 108 /* Defaults if we can't find VBT info */
107 dev_priv->lvds_dither = 0; 109 dev_priv->lvds_dither = 0;
@@ -119,9 +121,17 @@ parse_lfp_panel_data(struct drm_i915_private *dev_priv,
119 if (!lvds_lfp_data) 121 if (!lvds_lfp_data)
120 return; 122 return;
121 123
124 lvds_lfp_data_ptrs = find_section(bdb, BDB_LVDS_LFP_DATA_PTRS);
125 if (!lvds_lfp_data_ptrs)
126 return;
127
122 dev_priv->lvds_vbt = 1; 128 dev_priv->lvds_vbt = 1;
123 129
124 entry = &lvds_lfp_data->data[lvds_options->panel_type]; 130 lfp_data_size = lvds_lfp_data_ptrs->ptr[1].dvo_timing_offset -
131 lvds_lfp_data_ptrs->ptr[0].dvo_timing_offset;
132 entry = (struct bdb_lvds_lfp_data_entry *)
133 ((uint8_t *)lvds_lfp_data->data + (lfp_data_size *
134 lvds_options->panel_type));
125 dvo_timing = &entry->dvo_timing; 135 dvo_timing = &entry->dvo_timing;
126 136
127 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL); 137 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL);
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 3e1c78162119..73e7b9cecac8 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -29,6 +29,7 @@
29#include "intel_drv.h" 29#include "intel_drv.h"
30#include "i915_drm.h" 30#include "i915_drm.h"
31#include "i915_drv.h" 31#include "i915_drv.h"
32#include "intel_dp.h"
32 33
33#include "drm_crtc_helper.h" 34#include "drm_crtc_helper.h"
34 35
@@ -127,19 +128,6 @@ struct intel_limit {
127#define I9XX_P2_LVDS_FAST 7 128#define I9XX_P2_LVDS_FAST 7
128#define I9XX_P2_LVDS_SLOW_LIMIT 112000 129#define I9XX_P2_LVDS_SLOW_LIMIT 112000
129 130
130#define INTEL_LIMIT_I8XX_DVO_DAC 0
131#define INTEL_LIMIT_I8XX_LVDS 1
132#define INTEL_LIMIT_I9XX_SDVO_DAC 2
133#define INTEL_LIMIT_I9XX_LVDS 3
134#define INTEL_LIMIT_G4X_SDVO 4
135#define INTEL_LIMIT_G4X_HDMI_DAC 5
136#define INTEL_LIMIT_G4X_SINGLE_CHANNEL_LVDS 6
137#define INTEL_LIMIT_G4X_DUAL_CHANNEL_LVDS 7
138#define INTEL_LIMIT_IGD_SDVO_DAC 8
139#define INTEL_LIMIT_IGD_LVDS 9
140#define INTEL_LIMIT_IGDNG_SDVO_DAC 10
141#define INTEL_LIMIT_IGDNG_LVDS 11
142
143/*The parameter is for SDVO on G4x platform*/ 131/*The parameter is for SDVO on G4x platform*/
144#define G4X_DOT_SDVO_MIN 25000 132#define G4X_DOT_SDVO_MIN 25000
145#define G4X_DOT_SDVO_MAX 270000 133#define G4X_DOT_SDVO_MAX 270000
@@ -218,6 +206,25 @@ struct intel_limit {
218#define G4X_P2_DUAL_CHANNEL_LVDS_FAST 7 206#define G4X_P2_DUAL_CHANNEL_LVDS_FAST 7
219#define G4X_P2_DUAL_CHANNEL_LVDS_LIMIT 0 207#define G4X_P2_DUAL_CHANNEL_LVDS_LIMIT 0
220 208
209/*The parameter is for DISPLAY PORT on G4x platform*/
210#define G4X_DOT_DISPLAY_PORT_MIN 161670
211#define G4X_DOT_DISPLAY_PORT_MAX 227000
212#define G4X_N_DISPLAY_PORT_MIN 1
213#define G4X_N_DISPLAY_PORT_MAX 2
214#define G4X_M_DISPLAY_PORT_MIN 97
215#define G4X_M_DISPLAY_PORT_MAX 108
216#define G4X_M1_DISPLAY_PORT_MIN 0x10
217#define G4X_M1_DISPLAY_PORT_MAX 0x12
218#define G4X_M2_DISPLAY_PORT_MIN 0x05
219#define G4X_M2_DISPLAY_PORT_MAX 0x06
220#define G4X_P_DISPLAY_PORT_MIN 10
221#define G4X_P_DISPLAY_PORT_MAX 20
222#define G4X_P1_DISPLAY_PORT_MIN 1
223#define G4X_P1_DISPLAY_PORT_MAX 2
224#define G4X_P2_DISPLAY_PORT_SLOW 10
225#define G4X_P2_DISPLAY_PORT_FAST 10
226#define G4X_P2_DISPLAY_PORT_LIMIT 0
227
221/* IGDNG */ 228/* IGDNG */
222/* as we calculate clock using (register_value + 2) for 229/* as we calculate clock using (register_value + 2) for
223 N/M1/M2, so here the range value for them is (actual_value-2). 230 N/M1/M2, so here the range value for them is (actual_value-2).
@@ -256,8 +263,11 @@ static bool
256intel_igdng_find_best_PLL(const intel_limit_t *limit, struct drm_crtc *crtc, 263intel_igdng_find_best_PLL(const intel_limit_t *limit, struct drm_crtc *crtc,
257 int target, int refclk, intel_clock_t *best_clock); 264 int target, int refclk, intel_clock_t *best_clock);
258 265
259static const intel_limit_t intel_limits[] = { 266static bool
260 { /* INTEL_LIMIT_I8XX_DVO_DAC */ 267intel_find_pll_g4x_dp(const intel_limit_t *, struct drm_crtc *crtc,
268 int target, int refclk, intel_clock_t *best_clock);
269
270static const intel_limit_t intel_limits_i8xx_dvo = {
261 .dot = { .min = I8XX_DOT_MIN, .max = I8XX_DOT_MAX }, 271 .dot = { .min = I8XX_DOT_MIN, .max = I8XX_DOT_MAX },
262 .vco = { .min = I8XX_VCO_MIN, .max = I8XX_VCO_MAX }, 272 .vco = { .min = I8XX_VCO_MIN, .max = I8XX_VCO_MAX },
263 .n = { .min = I8XX_N_MIN, .max = I8XX_N_MAX }, 273 .n = { .min = I8XX_N_MIN, .max = I8XX_N_MAX },
@@ -269,8 +279,9 @@ static const intel_limit_t intel_limits[] = {
269 .p2 = { .dot_limit = I8XX_P2_SLOW_LIMIT, 279 .p2 = { .dot_limit = I8XX_P2_SLOW_LIMIT,
270 .p2_slow = I8XX_P2_SLOW, .p2_fast = I8XX_P2_FAST }, 280 .p2_slow = I8XX_P2_SLOW, .p2_fast = I8XX_P2_FAST },
271 .find_pll = intel_find_best_PLL, 281 .find_pll = intel_find_best_PLL,
272 }, 282};
273 { /* INTEL_LIMIT_I8XX_LVDS */ 283
284static const intel_limit_t intel_limits_i8xx_lvds = {
274 .dot = { .min = I8XX_DOT_MIN, .max = I8XX_DOT_MAX }, 285 .dot = { .min = I8XX_DOT_MIN, .max = I8XX_DOT_MAX },
275 .vco = { .min = I8XX_VCO_MIN, .max = I8XX_VCO_MAX }, 286 .vco = { .min = I8XX_VCO_MIN, .max = I8XX_VCO_MAX },
276 .n = { .min = I8XX_N_MIN, .max = I8XX_N_MAX }, 287 .n = { .min = I8XX_N_MIN, .max = I8XX_N_MAX },
@@ -282,8 +293,9 @@ static const intel_limit_t intel_limits[] = {
282 .p2 = { .dot_limit = I8XX_P2_SLOW_LIMIT, 293 .p2 = { .dot_limit = I8XX_P2_SLOW_LIMIT,
283 .p2_slow = I8XX_P2_LVDS_SLOW, .p2_fast = I8XX_P2_LVDS_FAST }, 294 .p2_slow = I8XX_P2_LVDS_SLOW, .p2_fast = I8XX_P2_LVDS_FAST },
284 .find_pll = intel_find_best_PLL, 295 .find_pll = intel_find_best_PLL,
285 }, 296};
286 { /* INTEL_LIMIT_I9XX_SDVO_DAC */ 297
298static const intel_limit_t intel_limits_i9xx_sdvo = {
287 .dot = { .min = I9XX_DOT_MIN, .max = I9XX_DOT_MAX }, 299 .dot = { .min = I9XX_DOT_MIN, .max = I9XX_DOT_MAX },
288 .vco = { .min = I9XX_VCO_MIN, .max = I9XX_VCO_MAX }, 300 .vco = { .min = I9XX_VCO_MIN, .max = I9XX_VCO_MAX },
289 .n = { .min = I9XX_N_MIN, .max = I9XX_N_MAX }, 301 .n = { .min = I9XX_N_MIN, .max = I9XX_N_MAX },
@@ -295,8 +307,9 @@ static const intel_limit_t intel_limits[] = {
295 .p2 = { .dot_limit = I9XX_P2_SDVO_DAC_SLOW_LIMIT, 307 .p2 = { .dot_limit = I9XX_P2_SDVO_DAC_SLOW_LIMIT,
296 .p2_slow = I9XX_P2_SDVO_DAC_SLOW, .p2_fast = I9XX_P2_SDVO_DAC_FAST }, 308 .p2_slow = I9XX_P2_SDVO_DAC_SLOW, .p2_fast = I9XX_P2_SDVO_DAC_FAST },
297 .find_pll = intel_find_best_PLL, 309 .find_pll = intel_find_best_PLL,
298 }, 310};
299 { /* INTEL_LIMIT_I9XX_LVDS */ 311
312static const intel_limit_t intel_limits_i9xx_lvds = {
300 .dot = { .min = I9XX_DOT_MIN, .max = I9XX_DOT_MAX }, 313 .dot = { .min = I9XX_DOT_MIN, .max = I9XX_DOT_MAX },
301 .vco = { .min = I9XX_VCO_MIN, .max = I9XX_VCO_MAX }, 314 .vco = { .min = I9XX_VCO_MIN, .max = I9XX_VCO_MAX },
302 .n = { .min = I9XX_N_MIN, .max = I9XX_N_MAX }, 315 .n = { .min = I9XX_N_MIN, .max = I9XX_N_MAX },
@@ -311,9 +324,10 @@ static const intel_limit_t intel_limits[] = {
311 .p2 = { .dot_limit = I9XX_P2_LVDS_SLOW_LIMIT, 324 .p2 = { .dot_limit = I9XX_P2_LVDS_SLOW_LIMIT,
312 .p2_slow = I9XX_P2_LVDS_SLOW, .p2_fast = I9XX_P2_LVDS_FAST }, 325 .p2_slow = I9XX_P2_LVDS_SLOW, .p2_fast = I9XX_P2_LVDS_FAST },
313 .find_pll = intel_find_best_PLL, 326 .find_pll = intel_find_best_PLL,
314 }, 327};
328
315 /* below parameter and function is for G4X Chipset Family*/ 329 /* below parameter and function is for G4X Chipset Family*/
316 { /* INTEL_LIMIT_G4X_SDVO */ 330static const intel_limit_t intel_limits_g4x_sdvo = {
317 .dot = { .min = G4X_DOT_SDVO_MIN, .max = G4X_DOT_SDVO_MAX }, 331 .dot = { .min = G4X_DOT_SDVO_MIN, .max = G4X_DOT_SDVO_MAX },
318 .vco = { .min = G4X_VCO_MIN, .max = G4X_VCO_MAX}, 332 .vco = { .min = G4X_VCO_MIN, .max = G4X_VCO_MAX},
319 .n = { .min = G4X_N_SDVO_MIN, .max = G4X_N_SDVO_MAX }, 333 .n = { .min = G4X_N_SDVO_MIN, .max = G4X_N_SDVO_MAX },
@@ -327,8 +341,9 @@ static const intel_limit_t intel_limits[] = {
327 .p2_fast = G4X_P2_SDVO_FAST 341 .p2_fast = G4X_P2_SDVO_FAST
328 }, 342 },
329 .find_pll = intel_g4x_find_best_PLL, 343 .find_pll = intel_g4x_find_best_PLL,
330 }, 344};
331 { /* INTEL_LIMIT_G4X_HDMI_DAC */ 345
346static const intel_limit_t intel_limits_g4x_hdmi = {
332 .dot = { .min = G4X_DOT_HDMI_DAC_MIN, .max = G4X_DOT_HDMI_DAC_MAX }, 347 .dot = { .min = G4X_DOT_HDMI_DAC_MIN, .max = G4X_DOT_HDMI_DAC_MAX },
333 .vco = { .min = G4X_VCO_MIN, .max = G4X_VCO_MAX}, 348 .vco = { .min = G4X_VCO_MIN, .max = G4X_VCO_MAX},
334 .n = { .min = G4X_N_HDMI_DAC_MIN, .max = G4X_N_HDMI_DAC_MAX }, 349 .n = { .min = G4X_N_HDMI_DAC_MIN, .max = G4X_N_HDMI_DAC_MAX },
@@ -342,8 +357,9 @@ static const intel_limit_t intel_limits[] = {
342 .p2_fast = G4X_P2_HDMI_DAC_FAST 357 .p2_fast = G4X_P2_HDMI_DAC_FAST
343 }, 358 },
344 .find_pll = intel_g4x_find_best_PLL, 359 .find_pll = intel_g4x_find_best_PLL,
345 }, 360};
346 { /* INTEL_LIMIT_G4X_SINGLE_CHANNEL_LVDS */ 361
362static const intel_limit_t intel_limits_g4x_single_channel_lvds = {
347 .dot = { .min = G4X_DOT_SINGLE_CHANNEL_LVDS_MIN, 363 .dot = { .min = G4X_DOT_SINGLE_CHANNEL_LVDS_MIN,
348 .max = G4X_DOT_SINGLE_CHANNEL_LVDS_MAX }, 364 .max = G4X_DOT_SINGLE_CHANNEL_LVDS_MAX },
349 .vco = { .min = G4X_VCO_MIN, 365 .vco = { .min = G4X_VCO_MIN,
@@ -365,8 +381,9 @@ static const intel_limit_t intel_limits[] = {
365 .p2_fast = G4X_P2_SINGLE_CHANNEL_LVDS_FAST 381 .p2_fast = G4X_P2_SINGLE_CHANNEL_LVDS_FAST
366 }, 382 },
367 .find_pll = intel_g4x_find_best_PLL, 383 .find_pll = intel_g4x_find_best_PLL,
368 }, 384};
369 { /* INTEL_LIMIT_G4X_DUAL_CHANNEL_LVDS */ 385
386static const intel_limit_t intel_limits_g4x_dual_channel_lvds = {
370 .dot = { .min = G4X_DOT_DUAL_CHANNEL_LVDS_MIN, 387 .dot = { .min = G4X_DOT_DUAL_CHANNEL_LVDS_MIN,
371 .max = G4X_DOT_DUAL_CHANNEL_LVDS_MAX }, 388 .max = G4X_DOT_DUAL_CHANNEL_LVDS_MAX },
372 .vco = { .min = G4X_VCO_MIN, 389 .vco = { .min = G4X_VCO_MIN,
@@ -388,8 +405,32 @@ static const intel_limit_t intel_limits[] = {
388 .p2_fast = G4X_P2_DUAL_CHANNEL_LVDS_FAST 405 .p2_fast = G4X_P2_DUAL_CHANNEL_LVDS_FAST
389 }, 406 },
390 .find_pll = intel_g4x_find_best_PLL, 407 .find_pll = intel_g4x_find_best_PLL,
391 }, 408};
392 { /* INTEL_LIMIT_IGD_SDVO */ 409
410static const intel_limit_t intel_limits_g4x_display_port = {
411 .dot = { .min = G4X_DOT_DISPLAY_PORT_MIN,
412 .max = G4X_DOT_DISPLAY_PORT_MAX },
413 .vco = { .min = G4X_VCO_MIN,
414 .max = G4X_VCO_MAX},
415 .n = { .min = G4X_N_DISPLAY_PORT_MIN,
416 .max = G4X_N_DISPLAY_PORT_MAX },
417 .m = { .min = G4X_M_DISPLAY_PORT_MIN,
418 .max = G4X_M_DISPLAY_PORT_MAX },
419 .m1 = { .min = G4X_M1_DISPLAY_PORT_MIN,
420 .max = G4X_M1_DISPLAY_PORT_MAX },
421 .m2 = { .min = G4X_M2_DISPLAY_PORT_MIN,
422 .max = G4X_M2_DISPLAY_PORT_MAX },
423 .p = { .min = G4X_P_DISPLAY_PORT_MIN,
424 .max = G4X_P_DISPLAY_PORT_MAX },
425 .p1 = { .min = G4X_P1_DISPLAY_PORT_MIN,
426 .max = G4X_P1_DISPLAY_PORT_MAX},
427 .p2 = { .dot_limit = G4X_P2_DISPLAY_PORT_LIMIT,
428 .p2_slow = G4X_P2_DISPLAY_PORT_SLOW,
429 .p2_fast = G4X_P2_DISPLAY_PORT_FAST },
430 .find_pll = intel_find_pll_g4x_dp,
431};
432
433static const intel_limit_t intel_limits_igd_sdvo = {
393 .dot = { .min = I9XX_DOT_MIN, .max = I9XX_DOT_MAX}, 434 .dot = { .min = I9XX_DOT_MIN, .max = I9XX_DOT_MAX},
394 .vco = { .min = IGD_VCO_MIN, .max = IGD_VCO_MAX }, 435 .vco = { .min = IGD_VCO_MIN, .max = IGD_VCO_MAX },
395 .n = { .min = IGD_N_MIN, .max = IGD_N_MAX }, 436 .n = { .min = IGD_N_MIN, .max = IGD_N_MAX },
@@ -401,8 +442,9 @@ static const intel_limit_t intel_limits[] = {
401 .p2 = { .dot_limit = I9XX_P2_SDVO_DAC_SLOW_LIMIT, 442 .p2 = { .dot_limit = I9XX_P2_SDVO_DAC_SLOW_LIMIT,
402 .p2_slow = I9XX_P2_SDVO_DAC_SLOW, .p2_fast = I9XX_P2_SDVO_DAC_FAST }, 443 .p2_slow = I9XX_P2_SDVO_DAC_SLOW, .p2_fast = I9XX_P2_SDVO_DAC_FAST },
403 .find_pll = intel_find_best_PLL, 444 .find_pll = intel_find_best_PLL,
404 }, 445};
405 { /* INTEL_LIMIT_IGD_LVDS */ 446
447static const intel_limit_t intel_limits_igd_lvds = {
406 .dot = { .min = I9XX_DOT_MIN, .max = I9XX_DOT_MAX }, 448 .dot = { .min = I9XX_DOT_MIN, .max = I9XX_DOT_MAX },
407 .vco = { .min = IGD_VCO_MIN, .max = IGD_VCO_MAX }, 449 .vco = { .min = IGD_VCO_MIN, .max = IGD_VCO_MAX },
408 .n = { .min = IGD_N_MIN, .max = IGD_N_MAX }, 450 .n = { .min = IGD_N_MIN, .max = IGD_N_MAX },
@@ -415,8 +457,9 @@ static const intel_limit_t intel_limits[] = {
415 .p2 = { .dot_limit = I9XX_P2_LVDS_SLOW_LIMIT, 457 .p2 = { .dot_limit = I9XX_P2_LVDS_SLOW_LIMIT,
416 .p2_slow = I9XX_P2_LVDS_SLOW, .p2_fast = I9XX_P2_LVDS_SLOW }, 458 .p2_slow = I9XX_P2_LVDS_SLOW, .p2_fast = I9XX_P2_LVDS_SLOW },
417 .find_pll = intel_find_best_PLL, 459 .find_pll = intel_find_best_PLL,
418 }, 460};
419 { /* INTEL_LIMIT_IGDNG_SDVO_DAC */ 461
462static const intel_limit_t intel_limits_igdng_sdvo = {
420 .dot = { .min = IGDNG_DOT_MIN, .max = IGDNG_DOT_MAX }, 463 .dot = { .min = IGDNG_DOT_MIN, .max = IGDNG_DOT_MAX },
421 .vco = { .min = IGDNG_VCO_MIN, .max = IGDNG_VCO_MAX }, 464 .vco = { .min = IGDNG_VCO_MIN, .max = IGDNG_VCO_MAX },
422 .n = { .min = IGDNG_N_MIN, .max = IGDNG_N_MAX }, 465 .n = { .min = IGDNG_N_MIN, .max = IGDNG_N_MAX },
@@ -429,8 +472,9 @@ static const intel_limit_t intel_limits[] = {
429 .p2_slow = IGDNG_P2_SDVO_DAC_SLOW, 472 .p2_slow = IGDNG_P2_SDVO_DAC_SLOW,
430 .p2_fast = IGDNG_P2_SDVO_DAC_FAST }, 473 .p2_fast = IGDNG_P2_SDVO_DAC_FAST },
431 .find_pll = intel_igdng_find_best_PLL, 474 .find_pll = intel_igdng_find_best_PLL,
432 }, 475};
433 { /* INTEL_LIMIT_IGDNG_LVDS */ 476
477static const intel_limit_t intel_limits_igdng_lvds = {
434 .dot = { .min = IGDNG_DOT_MIN, .max = IGDNG_DOT_MAX }, 478 .dot = { .min = IGDNG_DOT_MIN, .max = IGDNG_DOT_MAX },
435 .vco = { .min = IGDNG_VCO_MIN, .max = IGDNG_VCO_MAX }, 479 .vco = { .min = IGDNG_VCO_MIN, .max = IGDNG_VCO_MAX },
436 .n = { .min = IGDNG_N_MIN, .max = IGDNG_N_MAX }, 480 .n = { .min = IGDNG_N_MIN, .max = IGDNG_N_MAX },
@@ -443,16 +487,15 @@ static const intel_limit_t intel_limits[] = {
443 .p2_slow = IGDNG_P2_LVDS_SLOW, 487 .p2_slow = IGDNG_P2_LVDS_SLOW,
444 .p2_fast = IGDNG_P2_LVDS_FAST }, 488 .p2_fast = IGDNG_P2_LVDS_FAST },
445 .find_pll = intel_igdng_find_best_PLL, 489 .find_pll = intel_igdng_find_best_PLL,
446 },
447}; 490};
448 491
449static const intel_limit_t *intel_igdng_limit(struct drm_crtc *crtc) 492static const intel_limit_t *intel_igdng_limit(struct drm_crtc *crtc)
450{ 493{
451 const intel_limit_t *limit; 494 const intel_limit_t *limit;
452 if (intel_pipe_has_type(crtc, INTEL_OUTPUT_LVDS)) 495 if (intel_pipe_has_type(crtc, INTEL_OUTPUT_LVDS))
453 limit = &intel_limits[INTEL_LIMIT_IGDNG_LVDS]; 496 limit = &intel_limits_igdng_lvds;
454 else 497 else
455 limit = &intel_limits[INTEL_LIMIT_IGDNG_SDVO_DAC]; 498 limit = &intel_limits_igdng_sdvo;
456 499
457 return limit; 500 return limit;
458} 501}
@@ -467,19 +510,19 @@ static const intel_limit_t *intel_g4x_limit(struct drm_crtc *crtc)
467 if ((I915_READ(LVDS) & LVDS_CLKB_POWER_MASK) == 510 if ((I915_READ(LVDS) & LVDS_CLKB_POWER_MASK) ==
468 LVDS_CLKB_POWER_UP) 511 LVDS_CLKB_POWER_UP)
469 /* LVDS with dual channel */ 512 /* LVDS with dual channel */
470 limit = &intel_limits 513 limit = &intel_limits_g4x_dual_channel_lvds;
471 [INTEL_LIMIT_G4X_DUAL_CHANNEL_LVDS];
472 else 514 else
473 /* LVDS with dual channel */ 515 /* LVDS with dual channel */
474 limit = &intel_limits 516 limit = &intel_limits_g4x_single_channel_lvds;
475 [INTEL_LIMIT_G4X_SINGLE_CHANNEL_LVDS];
476 } else if (intel_pipe_has_type(crtc, INTEL_OUTPUT_HDMI) || 517 } else if (intel_pipe_has_type(crtc, INTEL_OUTPUT_HDMI) ||
477 intel_pipe_has_type(crtc, INTEL_OUTPUT_ANALOG)) { 518 intel_pipe_has_type(crtc, INTEL_OUTPUT_ANALOG)) {
478 limit = &intel_limits[INTEL_LIMIT_G4X_HDMI_DAC]; 519 limit = &intel_limits_g4x_hdmi;
479 } else if (intel_pipe_has_type(crtc, INTEL_OUTPUT_SDVO)) { 520 } else if (intel_pipe_has_type(crtc, INTEL_OUTPUT_SDVO)) {
480 limit = &intel_limits[INTEL_LIMIT_G4X_SDVO]; 521 limit = &intel_limits_g4x_sdvo;
522 } else if (intel_pipe_has_type (crtc, INTEL_OUTPUT_DISPLAYPORT)) {
523 limit = &intel_limits_g4x_display_port;
481 } else /* The option is for other outputs */ 524 } else /* The option is for other outputs */
482 limit = &intel_limits[INTEL_LIMIT_I9XX_SDVO_DAC]; 525 limit = &intel_limits_i9xx_sdvo;
483 526
484 return limit; 527 return limit;
485} 528}
@@ -495,19 +538,19 @@ static const intel_limit_t *intel_limit(struct drm_crtc *crtc)
495 limit = intel_g4x_limit(crtc); 538 limit = intel_g4x_limit(crtc);
496 } else if (IS_I9XX(dev) && !IS_IGD(dev)) { 539 } else if (IS_I9XX(dev) && !IS_IGD(dev)) {
497 if (intel_pipe_has_type(crtc, INTEL_OUTPUT_LVDS)) 540 if (intel_pipe_has_type(crtc, INTEL_OUTPUT_LVDS))
498 limit = &intel_limits[INTEL_LIMIT_I9XX_LVDS]; 541 limit = &intel_limits_i9xx_lvds;
499 else 542 else
500 limit = &intel_limits[INTEL_LIMIT_I9XX_SDVO_DAC]; 543 limit = &intel_limits_i9xx_sdvo;
501 } else if (IS_IGD(dev)) { 544 } else if (IS_IGD(dev)) {
502 if (intel_pipe_has_type(crtc, INTEL_OUTPUT_LVDS)) 545 if (intel_pipe_has_type(crtc, INTEL_OUTPUT_LVDS))
503 limit = &intel_limits[INTEL_LIMIT_IGD_LVDS]; 546 limit = &intel_limits_igd_lvds;
504 else 547 else
505 limit = &intel_limits[INTEL_LIMIT_IGD_SDVO_DAC]; 548 limit = &intel_limits_igd_sdvo;
506 } else { 549 } else {
507 if (intel_pipe_has_type(crtc, INTEL_OUTPUT_LVDS)) 550 if (intel_pipe_has_type(crtc, INTEL_OUTPUT_LVDS))
508 limit = &intel_limits[INTEL_LIMIT_I8XX_LVDS]; 551 limit = &intel_limits_i8xx_lvds;
509 else 552 else
510 limit = &intel_limits[INTEL_LIMIT_I8XX_DVO_DAC]; 553 limit = &intel_limits_i8xx_dvo;
511 } 554 }
512 return limit; 555 return limit;
513} 556}
@@ -764,6 +807,35 @@ out:
764 return found; 807 return found;
765} 808}
766 809
810/* DisplayPort has only two frequencies, 162MHz and 270MHz */
811static bool
812intel_find_pll_g4x_dp(const intel_limit_t *limit, struct drm_crtc *crtc,
813 int target, int refclk, intel_clock_t *best_clock)
814{
815 intel_clock_t clock;
816 if (target < 200000) {
817 clock.dot = 161670;
818 clock.p = 20;
819 clock.p1 = 2;
820 clock.p2 = 10;
821 clock.n = 0x01;
822 clock.m = 97;
823 clock.m1 = 0x10;
824 clock.m2 = 0x05;
825 } else {
826 clock.dot = 270000;
827 clock.p = 10;
828 clock.p1 = 1;
829 clock.p2 = 10;
830 clock.n = 0x02;
831 clock.m = 108;
832 clock.m1 = 0x12;
833 clock.m2 = 0x06;
834 }
835 memcpy(best_clock, &clock, sizeof(intel_clock_t));
836 return true;
837}
838
767void 839void
768intel_wait_for_vblank(struct drm_device *dev) 840intel_wait_for_vblank(struct drm_device *dev)
769{ 841{
@@ -1541,7 +1613,7 @@ static int intel_crtc_mode_set(struct drm_crtc *crtc,
1541 intel_clock_t clock; 1613 intel_clock_t clock;
1542 u32 dpll = 0, fp = 0, dspcntr, pipeconf; 1614 u32 dpll = 0, fp = 0, dspcntr, pipeconf;
1543 bool ok, is_sdvo = false, is_dvo = false; 1615 bool ok, is_sdvo = false, is_dvo = false;
1544 bool is_crt = false, is_lvds = false, is_tv = false; 1616 bool is_crt = false, is_lvds = false, is_tv = false, is_dp = false;
1545 struct drm_mode_config *mode_config = &dev->mode_config; 1617 struct drm_mode_config *mode_config = &dev->mode_config;
1546 struct drm_connector *connector; 1618 struct drm_connector *connector;
1547 const intel_limit_t *limit; 1619 const intel_limit_t *limit;
@@ -1585,6 +1657,9 @@ static int intel_crtc_mode_set(struct drm_crtc *crtc,
1585 case INTEL_OUTPUT_ANALOG: 1657 case INTEL_OUTPUT_ANALOG:
1586 is_crt = true; 1658 is_crt = true;
1587 break; 1659 break;
1660 case INTEL_OUTPUT_DISPLAYPORT:
1661 is_dp = true;
1662 break;
1588 } 1663 }
1589 1664
1590 num_outputs++; 1665 num_outputs++;
@@ -1600,6 +1675,7 @@ static int intel_crtc_mode_set(struct drm_crtc *crtc,
1600 } else { 1675 } else {
1601 refclk = 48000; 1676 refclk = 48000;
1602 } 1677 }
1678
1603 1679
1604 /* 1680 /*
1605 * Returns a set of divisors for the desired target clock with the given 1681 * Returns a set of divisors for the desired target clock with the given
@@ -1662,6 +1738,8 @@ static int intel_crtc_mode_set(struct drm_crtc *crtc,
1662 else if (IS_IGDNG(dev)) 1738 else if (IS_IGDNG(dev))
1663 dpll |= (sdvo_pixel_multiply - 1) << PLL_REF_SDVO_HDMI_MULTIPLIER_SHIFT; 1739 dpll |= (sdvo_pixel_multiply - 1) << PLL_REF_SDVO_HDMI_MULTIPLIER_SHIFT;
1664 } 1740 }
1741 if (is_dp)
1742 dpll |= DPLL_DVO_HIGH_SPEED;
1665 1743
1666 /* compute bitmask from p1 value */ 1744 /* compute bitmask from p1 value */
1667 if (IS_IGD(dev)) 1745 if (IS_IGD(dev))
@@ -1809,6 +1887,8 @@ static int intel_crtc_mode_set(struct drm_crtc *crtc,
1809 I915_WRITE(lvds_reg, lvds); 1887 I915_WRITE(lvds_reg, lvds);
1810 I915_READ(lvds_reg); 1888 I915_READ(lvds_reg);
1811 } 1889 }
1890 if (is_dp)
1891 intel_dp_set_m_n(crtc, mode, adjusted_mode);
1812 1892
1813 I915_WRITE(fp_reg, fp); 1893 I915_WRITE(fp_reg, fp);
1814 I915_WRITE(dpll_reg, dpll); 1894 I915_WRITE(dpll_reg, dpll);
@@ -2475,6 +2555,8 @@ static void intel_setup_outputs(struct drm_device *dev)
2475 found = intel_sdvo_init(dev, SDVOB); 2555 found = intel_sdvo_init(dev, SDVOB);
2476 if (!found && SUPPORTS_INTEGRATED_HDMI(dev)) 2556 if (!found && SUPPORTS_INTEGRATED_HDMI(dev))
2477 intel_hdmi_init(dev, SDVOB); 2557 intel_hdmi_init(dev, SDVOB);
2558 if (!found && SUPPORTS_INTEGRATED_DP(dev))
2559 intel_dp_init(dev, DP_B);
2478 } 2560 }
2479 2561
2480 /* Before G4X SDVOC doesn't have its own detect register */ 2562 /* Before G4X SDVOC doesn't have its own detect register */
@@ -2487,7 +2569,11 @@ static void intel_setup_outputs(struct drm_device *dev)
2487 found = intel_sdvo_init(dev, SDVOC); 2569 found = intel_sdvo_init(dev, SDVOC);
2488 if (!found && SUPPORTS_INTEGRATED_HDMI(dev)) 2570 if (!found && SUPPORTS_INTEGRATED_HDMI(dev))
2489 intel_hdmi_init(dev, SDVOC); 2571 intel_hdmi_init(dev, SDVOC);
2572 if (!found && SUPPORTS_INTEGRATED_DP(dev))
2573 intel_dp_init(dev, DP_C);
2490 } 2574 }
2575 if (SUPPORTS_INTEGRATED_DP(dev) && (I915_READ(DP_D) & DP_DETECTED))
2576 intel_dp_init(dev, DP_D);
2491 } else 2577 } else
2492 intel_dvo_init(dev); 2578 intel_dvo_init(dev);
2493 2579
@@ -2530,6 +2616,11 @@ static void intel_setup_outputs(struct drm_device *dev)
2530 (1 << 1)); 2616 (1 << 1));
2531 clone_mask = (1 << INTEL_OUTPUT_TVOUT); 2617 clone_mask = (1 << INTEL_OUTPUT_TVOUT);
2532 break; 2618 break;
2619 case INTEL_OUTPUT_DISPLAYPORT:
2620 crtc_mask = ((1 << 0) |
2621 (1 << 1));
2622 clone_mask = (1 << INTEL_OUTPUT_DISPLAYPORT);
2623 break;
2533 } 2624 }
2534 encoder->possible_crtcs = crtc_mask; 2625 encoder->possible_crtcs = crtc_mask;
2535 encoder->possible_clones = intel_connector_clones(dev, clone_mask); 2626 encoder->possible_clones = intel_connector_clones(dev, clone_mask);
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
new file mode 100644
index 000000000000..8f8d37d5663a
--- /dev/null
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -0,0 +1,1153 @@
1/*
2 * Copyright © 2008 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 * Authors:
24 * Keith Packard <keithp@keithp.com>
25 *
26 */
27
28#include <linux/i2c.h>
29#include "drmP.h"
30#include "drm.h"
31#include "drm_crtc.h"
32#include "drm_crtc_helper.h"
33#include "intel_drv.h"
34#include "i915_drm.h"
35#include "i915_drv.h"
36#include "intel_dp.h"
37
38#define DP_LINK_STATUS_SIZE 6
39#define DP_LINK_CHECK_TIMEOUT (10 * 1000)
40
41#define DP_LINK_CONFIGURATION_SIZE 9
42
43struct intel_dp_priv {
44 uint32_t output_reg;
45 uint32_t DP;
46 uint8_t link_configuration[DP_LINK_CONFIGURATION_SIZE];
47 uint32_t save_DP;
48 uint8_t save_link_configuration[DP_LINK_CONFIGURATION_SIZE];
49 bool has_audio;
50 int dpms_mode;
51 uint8_t link_bw;
52 uint8_t lane_count;
53 uint8_t dpcd[4];
54 struct intel_output *intel_output;
55 struct i2c_adapter adapter;
56 struct i2c_algo_dp_aux_data algo;
57};
58
59static void
60intel_dp_link_train(struct intel_output *intel_output, uint32_t DP,
61 uint8_t link_configuration[DP_LINK_CONFIGURATION_SIZE]);
62
63static void
64intel_dp_link_down(struct intel_output *intel_output, uint32_t DP);
65
66static int
67intel_dp_max_lane_count(struct intel_output *intel_output)
68{
69 struct intel_dp_priv *dp_priv = intel_output->dev_priv;
70 int max_lane_count = 4;
71
72 if (dp_priv->dpcd[0] >= 0x11) {
73 max_lane_count = dp_priv->dpcd[2] & 0x1f;
74 switch (max_lane_count) {
75 case 1: case 2: case 4:
76 break;
77 default:
78 max_lane_count = 4;
79 }
80 }
81 return max_lane_count;
82}
83
84static int
85intel_dp_max_link_bw(struct intel_output *intel_output)
86{
87 struct intel_dp_priv *dp_priv = intel_output->dev_priv;
88 int max_link_bw = dp_priv->dpcd[1];
89
90 switch (max_link_bw) {
91 case DP_LINK_BW_1_62:
92 case DP_LINK_BW_2_7:
93 break;
94 default:
95 max_link_bw = DP_LINK_BW_1_62;
96 break;
97 }
98 return max_link_bw;
99}
100
101static int
102intel_dp_link_clock(uint8_t link_bw)
103{
104 if (link_bw == DP_LINK_BW_2_7)
105 return 270000;
106 else
107 return 162000;
108}
109
110/* I think this is a fiction */
111static int
112intel_dp_link_required(int pixel_clock)
113{
114 return pixel_clock * 3;
115}
116
117static int
118intel_dp_mode_valid(struct drm_connector *connector,
119 struct drm_display_mode *mode)
120{
121 struct intel_output *intel_output = to_intel_output(connector);
122 int max_link_clock = intel_dp_link_clock(intel_dp_max_link_bw(intel_output));
123 int max_lanes = intel_dp_max_lane_count(intel_output);
124
125 if (intel_dp_link_required(mode->clock) > max_link_clock * max_lanes)
126 return MODE_CLOCK_HIGH;
127
128 if (mode->clock < 10000)
129 return MODE_CLOCK_LOW;
130
131 return MODE_OK;
132}
133
134static uint32_t
135pack_aux(uint8_t *src, int src_bytes)
136{
137 int i;
138 uint32_t v = 0;
139
140 if (src_bytes > 4)
141 src_bytes = 4;
142 for (i = 0; i < src_bytes; i++)
143 v |= ((uint32_t) src[i]) << ((3-i) * 8);
144 return v;
145}
146
147static void
148unpack_aux(uint32_t src, uint8_t *dst, int dst_bytes)
149{
150 int i;
151 if (dst_bytes > 4)
152 dst_bytes = 4;
153 for (i = 0; i < dst_bytes; i++)
154 dst[i] = src >> ((3-i) * 8);
155}
156
157/* hrawclock is 1/4 the FSB frequency */
158static int
159intel_hrawclk(struct drm_device *dev)
160{
161 struct drm_i915_private *dev_priv = dev->dev_private;
162 uint32_t clkcfg;
163
164 clkcfg = I915_READ(CLKCFG);
165 switch (clkcfg & CLKCFG_FSB_MASK) {
166 case CLKCFG_FSB_400:
167 return 100;
168 case CLKCFG_FSB_533:
169 return 133;
170 case CLKCFG_FSB_667:
171 return 166;
172 case CLKCFG_FSB_800:
173 return 200;
174 case CLKCFG_FSB_1067:
175 return 266;
176 case CLKCFG_FSB_1333:
177 return 333;
178 /* these two are just a guess; one of them might be right */
179 case CLKCFG_FSB_1600:
180 case CLKCFG_FSB_1600_ALT:
181 return 400;
182 default:
183 return 133;
184 }
185}
186
187static int
188intel_dp_aux_ch(struct intel_output *intel_output,
189 uint8_t *send, int send_bytes,
190 uint8_t *recv, int recv_size)
191{
192 struct intel_dp_priv *dp_priv = intel_output->dev_priv;
193 uint32_t output_reg = dp_priv->output_reg;
194 struct drm_device *dev = intel_output->base.dev;
195 struct drm_i915_private *dev_priv = dev->dev_private;
196 uint32_t ch_ctl = output_reg + 0x10;
197 uint32_t ch_data = ch_ctl + 4;
198 int i;
199 int recv_bytes;
200 uint32_t ctl;
201 uint32_t status;
202 uint32_t aux_clock_divider;
203 int try;
204
205 /* The clock divider is based off the hrawclk,
206 * and would like to run at 2MHz. So, take the
207 * hrawclk value and divide by 2 and use that
208 */
209 aux_clock_divider = intel_hrawclk(dev) / 2;
210 /* Must try at least 3 times according to DP spec */
211 for (try = 0; try < 5; try++) {
212 /* Load the send data into the aux channel data registers */
213 for (i = 0; i < send_bytes; i += 4) {
214 uint32_t d = pack_aux(send + i, send_bytes - i);;
215
216 I915_WRITE(ch_data + i, d);
217 }
218
219 ctl = (DP_AUX_CH_CTL_SEND_BUSY |
220 DP_AUX_CH_CTL_TIME_OUT_400us |
221 (send_bytes << DP_AUX_CH_CTL_MESSAGE_SIZE_SHIFT) |
222 (5 << DP_AUX_CH_CTL_PRECHARGE_2US_SHIFT) |
223 (aux_clock_divider << DP_AUX_CH_CTL_BIT_CLOCK_2X_SHIFT) |
224 DP_AUX_CH_CTL_DONE |
225 DP_AUX_CH_CTL_TIME_OUT_ERROR |
226 DP_AUX_CH_CTL_RECEIVE_ERROR);
227
228 /* Send the command and wait for it to complete */
229 I915_WRITE(ch_ctl, ctl);
230 (void) I915_READ(ch_ctl);
231 for (;;) {
232 udelay(100);
233 status = I915_READ(ch_ctl);
234 if ((status & DP_AUX_CH_CTL_SEND_BUSY) == 0)
235 break;
236 }
237
238 /* Clear done status and any errors */
239 I915_WRITE(ch_ctl, (ctl |
240 DP_AUX_CH_CTL_DONE |
241 DP_AUX_CH_CTL_TIME_OUT_ERROR |
242 DP_AUX_CH_CTL_RECEIVE_ERROR));
243 (void) I915_READ(ch_ctl);
244 if ((status & DP_AUX_CH_CTL_TIME_OUT_ERROR) == 0)
245 break;
246 }
247
248 if ((status & DP_AUX_CH_CTL_DONE) == 0) {
249 printk(KERN_ERR "dp_aux_ch not done status 0x%08x\n", status);
250 return -EBUSY;
251 }
252
253 /* Check for timeout or receive error.
254 * Timeouts occur when the sink is not connected
255 */
256 if (status & DP_AUX_CH_CTL_RECEIVE_ERROR) {
257 printk(KERN_ERR "dp_aux_ch receive error status 0x%08x\n", status);
258 return -EIO;
259 }
260 if (status & DP_AUX_CH_CTL_TIME_OUT_ERROR) {
261 printk(KERN_ERR "dp_aux_ch timeout status 0x%08x\n", status);
262 return -ETIMEDOUT;
263 }
264
265 /* Unload any bytes sent back from the other side */
266 recv_bytes = ((status & DP_AUX_CH_CTL_MESSAGE_SIZE_MASK) >>
267 DP_AUX_CH_CTL_MESSAGE_SIZE_SHIFT);
268
269 if (recv_bytes > recv_size)
270 recv_bytes = recv_size;
271
272 for (i = 0; i < recv_bytes; i += 4) {
273 uint32_t d = I915_READ(ch_data + i);
274
275 unpack_aux(d, recv + i, recv_bytes - i);
276 }
277
278 return recv_bytes;
279}
280
281/* Write data to the aux channel in native mode */
282static int
283intel_dp_aux_native_write(struct intel_output *intel_output,
284 uint16_t address, uint8_t *send, int send_bytes)
285{
286 int ret;
287 uint8_t msg[20];
288 int msg_bytes;
289 uint8_t ack;
290
291 if (send_bytes > 16)
292 return -1;
293 msg[0] = AUX_NATIVE_WRITE << 4;
294 msg[1] = address >> 8;
295 msg[2] = address;
296 msg[3] = send_bytes - 1;
297 memcpy(&msg[4], send, send_bytes);
298 msg_bytes = send_bytes + 4;
299 for (;;) {
300 ret = intel_dp_aux_ch(intel_output, msg, msg_bytes, &ack, 1);
301 if (ret < 0)
302 return ret;
303 if ((ack & AUX_NATIVE_REPLY_MASK) == AUX_NATIVE_REPLY_ACK)
304 break;
305 else if ((ack & AUX_NATIVE_REPLY_MASK) == AUX_NATIVE_REPLY_DEFER)
306 udelay(100);
307 else
308 return -EIO;
309 }
310 return send_bytes;
311}
312
313/* Write a single byte to the aux channel in native mode */
314static int
315intel_dp_aux_native_write_1(struct intel_output *intel_output,
316 uint16_t address, uint8_t byte)
317{
318 return intel_dp_aux_native_write(intel_output, address, &byte, 1);
319}
320
321/* read bytes from a native aux channel */
322static int
323intel_dp_aux_native_read(struct intel_output *intel_output,
324 uint16_t address, uint8_t *recv, int recv_bytes)
325{
326 uint8_t msg[4];
327 int msg_bytes;
328 uint8_t reply[20];
329 int reply_bytes;
330 uint8_t ack;
331 int ret;
332
333 msg[0] = AUX_NATIVE_READ << 4;
334 msg[1] = address >> 8;
335 msg[2] = address & 0xff;
336 msg[3] = recv_bytes - 1;
337
338 msg_bytes = 4;
339 reply_bytes = recv_bytes + 1;
340
341 for (;;) {
342 ret = intel_dp_aux_ch(intel_output, msg, msg_bytes,
343 reply, reply_bytes);
344 if (ret == 0)
345 return -EPROTO;
346 if (ret < 0)
347 return ret;
348 ack = reply[0];
349 if ((ack & AUX_NATIVE_REPLY_MASK) == AUX_NATIVE_REPLY_ACK) {
350 memcpy(recv, reply + 1, ret - 1);
351 return ret - 1;
352 }
353 else if ((ack & AUX_NATIVE_REPLY_MASK) == AUX_NATIVE_REPLY_DEFER)
354 udelay(100);
355 else
356 return -EIO;
357 }
358}
359
360static int
361intel_dp_i2c_aux_ch(struct i2c_adapter *adapter,
362 uint8_t *send, int send_bytes,
363 uint8_t *recv, int recv_bytes)
364{
365 struct intel_dp_priv *dp_priv = container_of(adapter,
366 struct intel_dp_priv,
367 adapter);
368 struct intel_output *intel_output = dp_priv->intel_output;
369
370 return intel_dp_aux_ch(intel_output,
371 send, send_bytes, recv, recv_bytes);
372}
373
374static int
375intel_dp_i2c_init(struct intel_output *intel_output, const char *name)
376{
377 struct intel_dp_priv *dp_priv = intel_output->dev_priv;
378
379 DRM_ERROR("i2c_init %s\n", name);
380 dp_priv->algo.running = false;
381 dp_priv->algo.address = 0;
382 dp_priv->algo.aux_ch = intel_dp_i2c_aux_ch;
383
384 memset(&dp_priv->adapter, '\0', sizeof (dp_priv->adapter));
385 dp_priv->adapter.owner = THIS_MODULE;
386 dp_priv->adapter.class = I2C_CLASS_DDC;
387 strncpy (dp_priv->adapter.name, name, sizeof dp_priv->adapter.name - 1);
388 dp_priv->adapter.name[sizeof dp_priv->adapter.name - 1] = '\0';
389 dp_priv->adapter.algo_data = &dp_priv->algo;
390 dp_priv->adapter.dev.parent = &intel_output->base.kdev;
391
392 return i2c_dp_aux_add_bus(&dp_priv->adapter);
393}
394
395static bool
396intel_dp_mode_fixup(struct drm_encoder *encoder, struct drm_display_mode *mode,
397 struct drm_display_mode *adjusted_mode)
398{
399 struct intel_output *intel_output = enc_to_intel_output(encoder);
400 struct intel_dp_priv *dp_priv = intel_output->dev_priv;
401 int lane_count, clock;
402 int max_lane_count = intel_dp_max_lane_count(intel_output);
403 int max_clock = intel_dp_max_link_bw(intel_output) == DP_LINK_BW_2_7 ? 1 : 0;
404 static int bws[2] = { DP_LINK_BW_1_62, DP_LINK_BW_2_7 };
405
406 for (lane_count = 1; lane_count <= max_lane_count; lane_count <<= 1) {
407 for (clock = 0; clock <= max_clock; clock++) {
408 int link_avail = intel_dp_link_clock(bws[clock]) * lane_count;
409
410 if (intel_dp_link_required(mode->clock) <= link_avail) {
411 dp_priv->link_bw = bws[clock];
412 dp_priv->lane_count = lane_count;
413 adjusted_mode->clock = intel_dp_link_clock(dp_priv->link_bw);
414 printk(KERN_ERR "link bw %02x lane count %d clock %d\n",
415 dp_priv->link_bw, dp_priv->lane_count,
416 adjusted_mode->clock);
417 return true;
418 }
419 }
420 }
421 return false;
422}
423
424struct intel_dp_m_n {
425 uint32_t tu;
426 uint32_t gmch_m;
427 uint32_t gmch_n;
428 uint32_t link_m;
429 uint32_t link_n;
430};
431
432static void
433intel_reduce_ratio(uint32_t *num, uint32_t *den)
434{
435 while (*num > 0xffffff || *den > 0xffffff) {
436 *num >>= 1;
437 *den >>= 1;
438 }
439}
440
441static void
442intel_dp_compute_m_n(int bytes_per_pixel,
443 int nlanes,
444 int pixel_clock,
445 int link_clock,
446 struct intel_dp_m_n *m_n)
447{
448 m_n->tu = 64;
449 m_n->gmch_m = pixel_clock * bytes_per_pixel;
450 m_n->gmch_n = link_clock * nlanes;
451 intel_reduce_ratio(&m_n->gmch_m, &m_n->gmch_n);
452 m_n->link_m = pixel_clock;
453 m_n->link_n = link_clock;
454 intel_reduce_ratio(&m_n->link_m, &m_n->link_n);
455}
456
457void
458intel_dp_set_m_n(struct drm_crtc *crtc, struct drm_display_mode *mode,
459 struct drm_display_mode *adjusted_mode)
460{
461 struct drm_device *dev = crtc->dev;
462 struct drm_mode_config *mode_config = &dev->mode_config;
463 struct drm_connector *connector;
464 struct drm_i915_private *dev_priv = dev->dev_private;
465 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
466 int lane_count = 4;
467 struct intel_dp_m_n m_n;
468
469 /*
470 * Find the lane count in the intel_output private
471 */
472 list_for_each_entry(connector, &mode_config->connector_list, head) {
473 struct intel_output *intel_output = to_intel_output(connector);
474 struct intel_dp_priv *dp_priv = intel_output->dev_priv;
475
476 if (!connector->encoder || connector->encoder->crtc != crtc)
477 continue;
478
479 if (intel_output->type == INTEL_OUTPUT_DISPLAYPORT) {
480 lane_count = dp_priv->lane_count;
481 break;
482 }
483 }
484
485 /*
486 * Compute the GMCH and Link ratios. The '3' here is
487 * the number of bytes_per_pixel post-LUT, which we always
488 * set up for 8-bits of R/G/B, or 3 bytes total.
489 */
490 intel_dp_compute_m_n(3, lane_count,
491 mode->clock, adjusted_mode->clock, &m_n);
492
493 if (intel_crtc->pipe == 0) {
494 I915_WRITE(PIPEA_GMCH_DATA_M,
495 ((m_n.tu - 1) << PIPE_GMCH_DATA_M_TU_SIZE_SHIFT) |
496 m_n.gmch_m);
497 I915_WRITE(PIPEA_GMCH_DATA_N,
498 m_n.gmch_n);
499 I915_WRITE(PIPEA_DP_LINK_M, m_n.link_m);
500 I915_WRITE(PIPEA_DP_LINK_N, m_n.link_n);
501 } else {
502 I915_WRITE(PIPEB_GMCH_DATA_M,
503 ((m_n.tu - 1) << PIPE_GMCH_DATA_M_TU_SIZE_SHIFT) |
504 m_n.gmch_m);
505 I915_WRITE(PIPEB_GMCH_DATA_N,
506 m_n.gmch_n);
507 I915_WRITE(PIPEB_DP_LINK_M, m_n.link_m);
508 I915_WRITE(PIPEB_DP_LINK_N, m_n.link_n);
509 }
510}
511
512static void
513intel_dp_mode_set(struct drm_encoder *encoder, struct drm_display_mode *mode,
514 struct drm_display_mode *adjusted_mode)
515{
516 struct intel_output *intel_output = enc_to_intel_output(encoder);
517 struct intel_dp_priv *dp_priv = intel_output->dev_priv;
518 struct drm_crtc *crtc = intel_output->enc.crtc;
519 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
520
521 dp_priv->DP = (DP_LINK_TRAIN_OFF |
522 DP_VOLTAGE_0_4 |
523 DP_PRE_EMPHASIS_0 |
524 DP_SYNC_VS_HIGH |
525 DP_SYNC_HS_HIGH);
526
527 switch (dp_priv->lane_count) {
528 case 1:
529 dp_priv->DP |= DP_PORT_WIDTH_1;
530 break;
531 case 2:
532 dp_priv->DP |= DP_PORT_WIDTH_2;
533 break;
534 case 4:
535 dp_priv->DP |= DP_PORT_WIDTH_4;
536 break;
537 }
538 if (dp_priv->has_audio)
539 dp_priv->DP |= DP_AUDIO_OUTPUT_ENABLE;
540
541 memset(dp_priv->link_configuration, 0, DP_LINK_CONFIGURATION_SIZE);
542 dp_priv->link_configuration[0] = dp_priv->link_bw;
543 dp_priv->link_configuration[1] = dp_priv->lane_count;
544
545 /*
546 * Check for DPCD version > 1.1,
547 * enable enahanced frame stuff in that case
548 */
549 if (dp_priv->dpcd[0] >= 0x11) {
550 dp_priv->link_configuration[1] |= DP_LANE_COUNT_ENHANCED_FRAME_EN;
551 dp_priv->DP |= DP_ENHANCED_FRAMING;
552 }
553
554 if (intel_crtc->pipe == 1)
555 dp_priv->DP |= DP_PIPEB_SELECT;
556}
557
558
559static void
560intel_dp_dpms(struct drm_encoder *encoder, int mode)
561{
562 struct intel_output *intel_output = enc_to_intel_output(encoder);
563 struct intel_dp_priv *dp_priv = intel_output->dev_priv;
564 struct drm_device *dev = intel_output->base.dev;
565 struct drm_i915_private *dev_priv = dev->dev_private;
566 uint32_t dp_reg = I915_READ(dp_priv->output_reg);
567
568 if (mode != DRM_MODE_DPMS_ON) {
569 if (dp_reg & DP_PORT_EN)
570 intel_dp_link_down(intel_output, dp_priv->DP);
571 } else {
572 if (!(dp_reg & DP_PORT_EN))
573 intel_dp_link_train(intel_output, dp_priv->DP, dp_priv->link_configuration);
574 }
575 dp_priv->dpms_mode = mode;
576}
577
578/*
579 * Fetch AUX CH registers 0x202 - 0x207 which contain
580 * link status information
581 */
582static bool
583intel_dp_get_link_status(struct intel_output *intel_output,
584 uint8_t link_status[DP_LINK_STATUS_SIZE])
585{
586 int ret;
587
588 ret = intel_dp_aux_native_read(intel_output,
589 DP_LANE0_1_STATUS,
590 link_status, DP_LINK_STATUS_SIZE);
591 if (ret != DP_LINK_STATUS_SIZE)
592 return false;
593 return true;
594}
595
596static uint8_t
597intel_dp_link_status(uint8_t link_status[DP_LINK_STATUS_SIZE],
598 int r)
599{
600 return link_status[r - DP_LANE0_1_STATUS];
601}
602
603static void
604intel_dp_save(struct drm_connector *connector)
605{
606 struct intel_output *intel_output = to_intel_output(connector);
607 struct drm_device *dev = intel_output->base.dev;
608 struct drm_i915_private *dev_priv = dev->dev_private;
609 struct intel_dp_priv *dp_priv = intel_output->dev_priv;
610
611 dp_priv->save_DP = I915_READ(dp_priv->output_reg);
612 intel_dp_aux_native_read(intel_output, DP_LINK_BW_SET,
613 dp_priv->save_link_configuration,
614 sizeof (dp_priv->save_link_configuration));
615}
616
617static uint8_t
618intel_get_adjust_request_voltage(uint8_t link_status[DP_LINK_STATUS_SIZE],
619 int lane)
620{
621 int i = DP_ADJUST_REQUEST_LANE0_1 + (lane >> 1);
622 int s = ((lane & 1) ?
623 DP_ADJUST_VOLTAGE_SWING_LANE1_SHIFT :
624 DP_ADJUST_VOLTAGE_SWING_LANE0_SHIFT);
625 uint8_t l = intel_dp_link_status(link_status, i);
626
627 return ((l >> s) & 3) << DP_TRAIN_VOLTAGE_SWING_SHIFT;
628}
629
630static uint8_t
631intel_get_adjust_request_pre_emphasis(uint8_t link_status[DP_LINK_STATUS_SIZE],
632 int lane)
633{
634 int i = DP_ADJUST_REQUEST_LANE0_1 + (lane >> 1);
635 int s = ((lane & 1) ?
636 DP_ADJUST_PRE_EMPHASIS_LANE1_SHIFT :
637 DP_ADJUST_PRE_EMPHASIS_LANE0_SHIFT);
638 uint8_t l = intel_dp_link_status(link_status, i);
639
640 return ((l >> s) & 3) << DP_TRAIN_PRE_EMPHASIS_SHIFT;
641}
642
643
644#if 0
645static char *voltage_names[] = {
646 "0.4V", "0.6V", "0.8V", "1.2V"
647};
648static char *pre_emph_names[] = {
649 "0dB", "3.5dB", "6dB", "9.5dB"
650};
651static char *link_train_names[] = {
652 "pattern 1", "pattern 2", "idle", "off"
653};
654#endif
655
656/*
657 * These are source-specific values; current Intel hardware supports
658 * a maximum voltage of 800mV and a maximum pre-emphasis of 6dB
659 */
660#define I830_DP_VOLTAGE_MAX DP_TRAIN_VOLTAGE_SWING_800
661
662static uint8_t
663intel_dp_pre_emphasis_max(uint8_t voltage_swing)
664{
665 switch (voltage_swing & DP_TRAIN_VOLTAGE_SWING_MASK) {
666 case DP_TRAIN_VOLTAGE_SWING_400:
667 return DP_TRAIN_PRE_EMPHASIS_6;
668 case DP_TRAIN_VOLTAGE_SWING_600:
669 return DP_TRAIN_PRE_EMPHASIS_6;
670 case DP_TRAIN_VOLTAGE_SWING_800:
671 return DP_TRAIN_PRE_EMPHASIS_3_5;
672 case DP_TRAIN_VOLTAGE_SWING_1200:
673 default:
674 return DP_TRAIN_PRE_EMPHASIS_0;
675 }
676}
677
678static void
679intel_get_adjust_train(struct intel_output *intel_output,
680 uint8_t link_status[DP_LINK_STATUS_SIZE],
681 int lane_count,
682 uint8_t train_set[4])
683{
684 uint8_t v = 0;
685 uint8_t p = 0;
686 int lane;
687
688 for (lane = 0; lane < lane_count; lane++) {
689 uint8_t this_v = intel_get_adjust_request_voltage(link_status, lane);
690 uint8_t this_p = intel_get_adjust_request_pre_emphasis(link_status, lane);
691
692 if (this_v > v)
693 v = this_v;
694 if (this_p > p)
695 p = this_p;
696 }
697
698 if (v >= I830_DP_VOLTAGE_MAX)
699 v = I830_DP_VOLTAGE_MAX | DP_TRAIN_MAX_SWING_REACHED;
700
701 if (p >= intel_dp_pre_emphasis_max(v))
702 p = intel_dp_pre_emphasis_max(v) | DP_TRAIN_MAX_PRE_EMPHASIS_REACHED;
703
704 for (lane = 0; lane < 4; lane++)
705 train_set[lane] = v | p;
706}
707
708static uint32_t
709intel_dp_signal_levels(uint8_t train_set, int lane_count)
710{
711 uint32_t signal_levels = 0;
712
713 switch (train_set & DP_TRAIN_VOLTAGE_SWING_MASK) {
714 case DP_TRAIN_VOLTAGE_SWING_400:
715 default:
716 signal_levels |= DP_VOLTAGE_0_4;
717 break;
718 case DP_TRAIN_VOLTAGE_SWING_600:
719 signal_levels |= DP_VOLTAGE_0_6;
720 break;
721 case DP_TRAIN_VOLTAGE_SWING_800:
722 signal_levels |= DP_VOLTAGE_0_8;
723 break;
724 case DP_TRAIN_VOLTAGE_SWING_1200:
725 signal_levels |= DP_VOLTAGE_1_2;
726 break;
727 }
728 switch (train_set & DP_TRAIN_PRE_EMPHASIS_MASK) {
729 case DP_TRAIN_PRE_EMPHASIS_0:
730 default:
731 signal_levels |= DP_PRE_EMPHASIS_0;
732 break;
733 case DP_TRAIN_PRE_EMPHASIS_3_5:
734 signal_levels |= DP_PRE_EMPHASIS_3_5;
735 break;
736 case DP_TRAIN_PRE_EMPHASIS_6:
737 signal_levels |= DP_PRE_EMPHASIS_6;
738 break;
739 case DP_TRAIN_PRE_EMPHASIS_9_5:
740 signal_levels |= DP_PRE_EMPHASIS_9_5;
741 break;
742 }
743 return signal_levels;
744}
745
746static uint8_t
747intel_get_lane_status(uint8_t link_status[DP_LINK_STATUS_SIZE],
748 int lane)
749{
750 int i = DP_LANE0_1_STATUS + (lane >> 1);
751 int s = (lane & 1) * 4;
752 uint8_t l = intel_dp_link_status(link_status, i);
753
754 return (l >> s) & 0xf;
755}
756
757/* Check for clock recovery is done on all channels */
758static bool
759intel_clock_recovery_ok(uint8_t link_status[DP_LINK_STATUS_SIZE], int lane_count)
760{
761 int lane;
762 uint8_t lane_status;
763
764 for (lane = 0; lane < lane_count; lane++) {
765 lane_status = intel_get_lane_status(link_status, lane);
766 if ((lane_status & DP_LANE_CR_DONE) == 0)
767 return false;
768 }
769 return true;
770}
771
772/* Check to see if channel eq is done on all channels */
773#define CHANNEL_EQ_BITS (DP_LANE_CR_DONE|\
774 DP_LANE_CHANNEL_EQ_DONE|\
775 DP_LANE_SYMBOL_LOCKED)
776static bool
777intel_channel_eq_ok(uint8_t link_status[DP_LINK_STATUS_SIZE], int lane_count)
778{
779 uint8_t lane_align;
780 uint8_t lane_status;
781 int lane;
782
783 lane_align = intel_dp_link_status(link_status,
784 DP_LANE_ALIGN_STATUS_UPDATED);
785 if ((lane_align & DP_INTERLANE_ALIGN_DONE) == 0)
786 return false;
787 for (lane = 0; lane < lane_count; lane++) {
788 lane_status = intel_get_lane_status(link_status, lane);
789 if ((lane_status & CHANNEL_EQ_BITS) != CHANNEL_EQ_BITS)
790 return false;
791 }
792 return true;
793}
794
795static bool
796intel_dp_set_link_train(struct intel_output *intel_output,
797 uint32_t dp_reg_value,
798 uint8_t dp_train_pat,
799 uint8_t train_set[4],
800 bool first)
801{
802 struct drm_device *dev = intel_output->base.dev;
803 struct drm_i915_private *dev_priv = dev->dev_private;
804 struct intel_dp_priv *dp_priv = intel_output->dev_priv;
805 int ret;
806
807 I915_WRITE(dp_priv->output_reg, dp_reg_value);
808 POSTING_READ(dp_priv->output_reg);
809 if (first)
810 intel_wait_for_vblank(dev);
811
812 intel_dp_aux_native_write_1(intel_output,
813 DP_TRAINING_PATTERN_SET,
814 dp_train_pat);
815
816 ret = intel_dp_aux_native_write(intel_output,
817 DP_TRAINING_LANE0_SET, train_set, 4);
818 if (ret != 4)
819 return false;
820
821 return true;
822}
823
824static void
825intel_dp_link_train(struct intel_output *intel_output, uint32_t DP,
826 uint8_t link_configuration[DP_LINK_CONFIGURATION_SIZE])
827{
828 struct drm_device *dev = intel_output->base.dev;
829 struct drm_i915_private *dev_priv = dev->dev_private;
830 struct intel_dp_priv *dp_priv = intel_output->dev_priv;
831 uint8_t train_set[4];
832 uint8_t link_status[DP_LINK_STATUS_SIZE];
833 int i;
834 uint8_t voltage;
835 bool clock_recovery = false;
836 bool channel_eq = false;
837 bool first = true;
838 int tries;
839
840 /* Write the link configuration data */
841 intel_dp_aux_native_write(intel_output, 0x100,
842 link_configuration, DP_LINK_CONFIGURATION_SIZE);
843
844 DP |= DP_PORT_EN;
845 DP &= ~DP_LINK_TRAIN_MASK;
846 memset(train_set, 0, 4);
847 voltage = 0xff;
848 tries = 0;
849 clock_recovery = false;
850 for (;;) {
851 /* Use train_set[0] to set the voltage and pre emphasis values */
852 uint32_t signal_levels = intel_dp_signal_levels(train_set[0], dp_priv->lane_count);
853 DP = (DP & ~(DP_VOLTAGE_MASK|DP_PRE_EMPHASIS_MASK)) | signal_levels;
854
855 if (!intel_dp_set_link_train(intel_output, DP | DP_LINK_TRAIN_PAT_1,
856 DP_TRAINING_PATTERN_1, train_set, first))
857 break;
858 first = false;
859 /* Set training pattern 1 */
860
861 udelay(100);
862 if (!intel_dp_get_link_status(intel_output, link_status))
863 break;
864
865 if (intel_clock_recovery_ok(link_status, dp_priv->lane_count)) {
866 clock_recovery = true;
867 break;
868 }
869
870 /* Check to see if we've tried the max voltage */
871 for (i = 0; i < dp_priv->lane_count; i++)
872 if ((train_set[i] & DP_TRAIN_MAX_SWING_REACHED) == 0)
873 break;
874 if (i == dp_priv->lane_count)
875 break;
876
877 /* Check to see if we've tried the same voltage 5 times */
878 if ((train_set[0] & DP_TRAIN_VOLTAGE_SWING_MASK) == voltage) {
879 ++tries;
880 if (tries == 5)
881 break;
882 } else
883 tries = 0;
884 voltage = train_set[0] & DP_TRAIN_VOLTAGE_SWING_MASK;
885
886 /* Compute new train_set as requested by target */
887 intel_get_adjust_train(intel_output, link_status, dp_priv->lane_count, train_set);
888 }
889
890 /* channel equalization */
891 tries = 0;
892 channel_eq = false;
893 for (;;) {
894 /* Use train_set[0] to set the voltage and pre emphasis values */
895 uint32_t signal_levels = intel_dp_signal_levels(train_set[0], dp_priv->lane_count);
896 DP = (DP & ~(DP_VOLTAGE_MASK|DP_PRE_EMPHASIS_MASK)) | signal_levels;
897
898 /* channel eq pattern */
899 if (!intel_dp_set_link_train(intel_output, DP | DP_LINK_TRAIN_PAT_2,
900 DP_TRAINING_PATTERN_2, train_set,
901 false))
902 break;
903
904 udelay(400);
905 if (!intel_dp_get_link_status(intel_output, link_status))
906 break;
907
908 if (intel_channel_eq_ok(link_status, dp_priv->lane_count)) {
909 channel_eq = true;
910 break;
911 }
912
913 /* Try 5 times */
914 if (tries > 5)
915 break;
916
917 /* Compute new train_set as requested by target */
918 intel_get_adjust_train(intel_output, link_status, dp_priv->lane_count, train_set);
919 ++tries;
920 }
921
922 I915_WRITE(dp_priv->output_reg, DP | DP_LINK_TRAIN_OFF);
923 POSTING_READ(dp_priv->output_reg);
924 intel_dp_aux_native_write_1(intel_output,
925 DP_TRAINING_PATTERN_SET, DP_TRAINING_PATTERN_DISABLE);
926}
927
928static void
929intel_dp_link_down(struct intel_output *intel_output, uint32_t DP)
930{
931 struct drm_device *dev = intel_output->base.dev;
932 struct drm_i915_private *dev_priv = dev->dev_private;
933 struct intel_dp_priv *dp_priv = intel_output->dev_priv;
934
935 I915_WRITE(dp_priv->output_reg, DP & ~DP_PORT_EN);
936 POSTING_READ(dp_priv->output_reg);
937}
938
939static void
940intel_dp_restore(struct drm_connector *connector)
941{
942 struct intel_output *intel_output = to_intel_output(connector);
943 struct intel_dp_priv *dp_priv = intel_output->dev_priv;
944
945 if (dp_priv->save_DP & DP_PORT_EN)
946 intel_dp_link_train(intel_output, dp_priv->save_DP, dp_priv->save_link_configuration);
947 else
948 intel_dp_link_down(intel_output, dp_priv->save_DP);
949}
950
951/*
952 * According to DP spec
953 * 5.1.2:
954 * 1. Read DPCD
955 * 2. Configure link according to Receiver Capabilities
956 * 3. Use Link Training from 2.5.3.3 and 3.5.1.3
957 * 4. Check link status on receipt of hot-plug interrupt
958 */
959
960static void
961intel_dp_check_link_status(struct intel_output *intel_output)
962{
963 struct intel_dp_priv *dp_priv = intel_output->dev_priv;
964 uint8_t link_status[DP_LINK_STATUS_SIZE];
965
966 if (!intel_output->enc.crtc)
967 return;
968
969 if (!intel_dp_get_link_status(intel_output, link_status)) {
970 intel_dp_link_down(intel_output, dp_priv->DP);
971 return;
972 }
973
974 if (!intel_channel_eq_ok(link_status, dp_priv->lane_count))
975 intel_dp_link_train(intel_output, dp_priv->DP, dp_priv->link_configuration);
976}
977
978/**
979 * Uses CRT_HOTPLUG_EN and CRT_HOTPLUG_STAT to detect DP connection.
980 *
981 * \return true if DP port is connected.
982 * \return false if DP port is disconnected.
983 */
984static enum drm_connector_status
985intel_dp_detect(struct drm_connector *connector)
986{
987 struct intel_output *intel_output = to_intel_output(connector);
988 struct drm_device *dev = intel_output->base.dev;
989 struct drm_i915_private *dev_priv = dev->dev_private;
990 struct intel_dp_priv *dp_priv = intel_output->dev_priv;
991 uint32_t temp, bit;
992 enum drm_connector_status status;
993
994 dp_priv->has_audio = false;
995
996 temp = I915_READ(PORT_HOTPLUG_EN);
997
998 I915_WRITE(PORT_HOTPLUG_EN,
999 temp |
1000 DPB_HOTPLUG_INT_EN |
1001 DPC_HOTPLUG_INT_EN |
1002 DPD_HOTPLUG_INT_EN);
1003
1004 POSTING_READ(PORT_HOTPLUG_EN);
1005
1006 switch (dp_priv->output_reg) {
1007 case DP_B:
1008 bit = DPB_HOTPLUG_INT_STATUS;
1009 break;
1010 case DP_C:
1011 bit = DPC_HOTPLUG_INT_STATUS;
1012 break;
1013 case DP_D:
1014 bit = DPD_HOTPLUG_INT_STATUS;
1015 break;
1016 default:
1017 return connector_status_unknown;
1018 }
1019
1020 temp = I915_READ(PORT_HOTPLUG_STAT);
1021
1022 if ((temp & bit) == 0)
1023 return connector_status_disconnected;
1024
1025 status = connector_status_disconnected;
1026 if (intel_dp_aux_native_read(intel_output,
1027 0x000, dp_priv->dpcd,
1028 sizeof (dp_priv->dpcd)) == sizeof (dp_priv->dpcd))
1029 {
1030 if (dp_priv->dpcd[0] != 0)
1031 status = connector_status_connected;
1032 }
1033 return status;
1034}
1035
1036static int intel_dp_get_modes(struct drm_connector *connector)
1037{
1038 struct intel_output *intel_output = to_intel_output(connector);
1039
1040 /* We should parse the EDID data and find out if it has an audio sink
1041 */
1042
1043 return intel_ddc_get_modes(intel_output);
1044}
1045
1046static void
1047intel_dp_destroy (struct drm_connector *connector)
1048{
1049 struct intel_output *intel_output = to_intel_output(connector);
1050
1051 if (intel_output->i2c_bus)
1052 intel_i2c_destroy(intel_output->i2c_bus);
1053 drm_sysfs_connector_remove(connector);
1054 drm_connector_cleanup(connector);
1055 kfree(intel_output);
1056}
1057
1058static const struct drm_encoder_helper_funcs intel_dp_helper_funcs = {
1059 .dpms = intel_dp_dpms,
1060 .mode_fixup = intel_dp_mode_fixup,
1061 .prepare = intel_encoder_prepare,
1062 .mode_set = intel_dp_mode_set,
1063 .commit = intel_encoder_commit,
1064};
1065
1066static const struct drm_connector_funcs intel_dp_connector_funcs = {
1067 .dpms = drm_helper_connector_dpms,
1068 .save = intel_dp_save,
1069 .restore = intel_dp_restore,
1070 .detect = intel_dp_detect,
1071 .fill_modes = drm_helper_probe_single_connector_modes,
1072 .destroy = intel_dp_destroy,
1073};
1074
1075static const struct drm_connector_helper_funcs intel_dp_connector_helper_funcs = {
1076 .get_modes = intel_dp_get_modes,
1077 .mode_valid = intel_dp_mode_valid,
1078 .best_encoder = intel_best_encoder,
1079};
1080
1081static void intel_dp_enc_destroy(struct drm_encoder *encoder)
1082{
1083 drm_encoder_cleanup(encoder);
1084}
1085
1086static const struct drm_encoder_funcs intel_dp_enc_funcs = {
1087 .destroy = intel_dp_enc_destroy,
1088};
1089
1090void
1091intel_dp_hot_plug(struct intel_output *intel_output)
1092{
1093 struct intel_dp_priv *dp_priv = intel_output->dev_priv;
1094
1095 if (dp_priv->dpms_mode == DRM_MODE_DPMS_ON)
1096 intel_dp_check_link_status(intel_output);
1097}
1098
1099void
1100intel_dp_init(struct drm_device *dev, int output_reg)
1101{
1102 struct drm_i915_private *dev_priv = dev->dev_private;
1103 struct drm_connector *connector;
1104 struct intel_output *intel_output;
1105 struct intel_dp_priv *dp_priv;
1106
1107 intel_output = kcalloc(sizeof(struct intel_output) +
1108 sizeof(struct intel_dp_priv), 1, GFP_KERNEL);
1109 if (!intel_output)
1110 return;
1111
1112 dp_priv = (struct intel_dp_priv *)(intel_output + 1);
1113
1114 connector = &intel_output->base;
1115 drm_connector_init(dev, connector, &intel_dp_connector_funcs,
1116 DRM_MODE_CONNECTOR_DisplayPort);
1117 drm_connector_helper_add(connector, &intel_dp_connector_helper_funcs);
1118
1119 intel_output->type = INTEL_OUTPUT_DISPLAYPORT;
1120
1121 connector->interlace_allowed = true;
1122 connector->doublescan_allowed = 0;
1123
1124 dp_priv->intel_output = intel_output;
1125 dp_priv->output_reg = output_reg;
1126 dp_priv->has_audio = false;
1127 dp_priv->dpms_mode = DRM_MODE_DPMS_ON;
1128 intel_output->dev_priv = dp_priv;
1129
1130 drm_encoder_init(dev, &intel_output->enc, &intel_dp_enc_funcs,
1131 DRM_MODE_ENCODER_TMDS);
1132 drm_encoder_helper_add(&intel_output->enc, &intel_dp_helper_funcs);
1133
1134 drm_mode_connector_attach_encoder(&intel_output->base,
1135 &intel_output->enc);
1136 drm_sysfs_connector_add(connector);
1137
1138 /* Set up the DDC bus. */
1139 intel_dp_i2c_init(intel_output,
1140 (output_reg == DP_B) ? "DPDDC-B" :
1141 (output_reg == DP_C) ? "DPDDC-C" : "DPDDC-D");
1142 intel_output->ddc_bus = &dp_priv->adapter;
1143 intel_output->hot_plug = intel_dp_hot_plug;
1144
1145 /* For G4X desktop chip, PEG_BAND_GAP_DATA 3:0 must first be written
1146 * 0xd. Failure to do so will result in spurious interrupts being
1147 * generated on the port when a cable is not attached.
1148 */
1149 if (IS_G4X(dev) && !IS_GM45(dev)) {
1150 u32 temp = I915_READ(PEG_BAND_GAP_DATA);
1151 I915_WRITE(PEG_BAND_GAP_DATA, (temp & ~0xf) | 0xd);
1152 }
1153}
diff --git a/drivers/gpu/drm/i915/intel_dp.h b/drivers/gpu/drm/i915/intel_dp.h
new file mode 100644
index 000000000000..2b38054d3b6d
--- /dev/null
+++ b/drivers/gpu/drm/i915/intel_dp.h
@@ -0,0 +1,144 @@
1/*
2 * Copyright © 2008 Keith Packard
3 *
4 * Permission to use, copy, modify, distribute, and sell this software and its
5 * documentation for any purpose is hereby granted without fee, provided that
6 * the above copyright notice appear in all copies and that both that copyright
7 * notice and this permission notice appear in supporting documentation, and
8 * that the name of the copyright holders not be used in advertising or
9 * publicity pertaining to distribution of the software without specific,
10 * written prior permission. The copyright holders make no representations
11 * about the suitability of this software for any purpose. It is provided "as
12 * is" without express or implied warranty.
13 *
14 * THE COPYRIGHT HOLDERS DISCLAIM ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
15 * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
16 * EVENT SHALL THE COPYRIGHT HOLDERS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
17 * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
18 * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
19 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE
20 * OF THIS SOFTWARE.
21 */
22
23#ifndef _INTEL_DP_H_
24#define _INTEL_DP_H_
25
26/* From the VESA DisplayPort spec */
27
28#define AUX_NATIVE_WRITE 0x8
29#define AUX_NATIVE_READ 0x9
30#define AUX_I2C_WRITE 0x0
31#define AUX_I2C_READ 0x1
32#define AUX_I2C_STATUS 0x2
33#define AUX_I2C_MOT 0x4
34
35#define AUX_NATIVE_REPLY_ACK (0x0 << 4)
36#define AUX_NATIVE_REPLY_NACK (0x1 << 4)
37#define AUX_NATIVE_REPLY_DEFER (0x2 << 4)
38#define AUX_NATIVE_REPLY_MASK (0x3 << 4)
39
40#define AUX_I2C_REPLY_ACK (0x0 << 6)
41#define AUX_I2C_REPLY_NACK (0x1 << 6)
42#define AUX_I2C_REPLY_DEFER (0x2 << 6)
43#define AUX_I2C_REPLY_MASK (0x3 << 6)
44
45/* AUX CH addresses */
46#define DP_LINK_BW_SET 0x100
47# define DP_LINK_BW_1_62 0x06
48# define DP_LINK_BW_2_7 0x0a
49
50#define DP_LANE_COUNT_SET 0x101
51# define DP_LANE_COUNT_MASK 0x0f
52# define DP_LANE_COUNT_ENHANCED_FRAME_EN (1 << 7)
53
54#define DP_TRAINING_PATTERN_SET 0x102
55
56# define DP_TRAINING_PATTERN_DISABLE 0
57# define DP_TRAINING_PATTERN_1 1
58# define DP_TRAINING_PATTERN_2 2
59# define DP_TRAINING_PATTERN_MASK 0x3
60
61# define DP_LINK_QUAL_PATTERN_DISABLE (0 << 2)
62# define DP_LINK_QUAL_PATTERN_D10_2 (1 << 2)
63# define DP_LINK_QUAL_PATTERN_ERROR_RATE (2 << 2)
64# define DP_LINK_QUAL_PATTERN_PRBS7 (3 << 2)
65# define DP_LINK_QUAL_PATTERN_MASK (3 << 2)
66
67# define DP_RECOVERED_CLOCK_OUT_EN (1 << 4)
68# define DP_LINK_SCRAMBLING_DISABLE (1 << 5)
69
70# define DP_SYMBOL_ERROR_COUNT_BOTH (0 << 6)
71# define DP_SYMBOL_ERROR_COUNT_DISPARITY (1 << 6)
72# define DP_SYMBOL_ERROR_COUNT_SYMBOL (2 << 6)
73# define DP_SYMBOL_ERROR_COUNT_MASK (3 << 6)
74
75#define DP_TRAINING_LANE0_SET 0x103
76#define DP_TRAINING_LANE1_SET 0x104
77#define DP_TRAINING_LANE2_SET 0x105
78#define DP_TRAINING_LANE3_SET 0x106
79
80# define DP_TRAIN_VOLTAGE_SWING_MASK 0x3
81# define DP_TRAIN_VOLTAGE_SWING_SHIFT 0
82# define DP_TRAIN_MAX_SWING_REACHED (1 << 2)
83# define DP_TRAIN_VOLTAGE_SWING_400 (0 << 0)
84# define DP_TRAIN_VOLTAGE_SWING_600 (1 << 0)
85# define DP_TRAIN_VOLTAGE_SWING_800 (2 << 0)
86# define DP_TRAIN_VOLTAGE_SWING_1200 (3 << 0)
87
88# define DP_TRAIN_PRE_EMPHASIS_MASK (3 << 3)
89# define DP_TRAIN_PRE_EMPHASIS_0 (0 << 3)
90# define DP_TRAIN_PRE_EMPHASIS_3_5 (1 << 3)
91# define DP_TRAIN_PRE_EMPHASIS_6 (2 << 3)
92# define DP_TRAIN_PRE_EMPHASIS_9_5 (3 << 3)
93
94# define DP_TRAIN_PRE_EMPHASIS_SHIFT 3
95# define DP_TRAIN_MAX_PRE_EMPHASIS_REACHED (1 << 5)
96
97#define DP_DOWNSPREAD_CTRL 0x107
98# define DP_SPREAD_AMP_0_5 (1 << 4)
99
100#define DP_MAIN_LINK_CHANNEL_CODING_SET 0x108
101# define DP_SET_ANSI_8B10B (1 << 0)
102
103#define DP_LANE0_1_STATUS 0x202
104#define DP_LANE2_3_STATUS 0x203
105
106# define DP_LANE_CR_DONE (1 << 0)
107# define DP_LANE_CHANNEL_EQ_DONE (1 << 1)
108# define DP_LANE_SYMBOL_LOCKED (1 << 2)
109
110#define DP_LANE_ALIGN_STATUS_UPDATED 0x204
111
112#define DP_INTERLANE_ALIGN_DONE (1 << 0)
113#define DP_DOWNSTREAM_PORT_STATUS_CHANGED (1 << 6)
114#define DP_LINK_STATUS_UPDATED (1 << 7)
115
116#define DP_SINK_STATUS 0x205
117
118#define DP_RECEIVE_PORT_0_STATUS (1 << 0)
119#define DP_RECEIVE_PORT_1_STATUS (1 << 1)
120
121#define DP_ADJUST_REQUEST_LANE0_1 0x206
122#define DP_ADJUST_REQUEST_LANE2_3 0x207
123
124#define DP_ADJUST_VOLTAGE_SWING_LANE0_MASK 0x03
125#define DP_ADJUST_VOLTAGE_SWING_LANE0_SHIFT 0
126#define DP_ADJUST_PRE_EMPHASIS_LANE0_MASK 0x0c
127#define DP_ADJUST_PRE_EMPHASIS_LANE0_SHIFT 2
128#define DP_ADJUST_VOLTAGE_SWING_LANE1_MASK 0x30
129#define DP_ADJUST_VOLTAGE_SWING_LANE1_SHIFT 4
130#define DP_ADJUST_PRE_EMPHASIS_LANE1_MASK 0xc0
131#define DP_ADJUST_PRE_EMPHASIS_LANE1_SHIFT 6
132
133struct i2c_algo_dp_aux_data {
134 bool running;
135 u16 address;
136 int (*aux_ch) (struct i2c_adapter *adapter,
137 uint8_t *send, int send_bytes,
138 uint8_t *recv, int recv_bytes);
139};
140
141int
142i2c_dp_aux_add_bus(struct i2c_adapter *adapter);
143
144#endif /* _INTEL_DP_H_ */
diff --git a/drivers/gpu/drm/i915/intel_dp_i2c.c b/drivers/gpu/drm/i915/intel_dp_i2c.c
new file mode 100644
index 000000000000..4e60f14b1a6d
--- /dev/null
+++ b/drivers/gpu/drm/i915/intel_dp_i2c.c
@@ -0,0 +1,272 @@
1/*
2 * Copyright © 2009 Keith Packard
3 *
4 * Permission to use, copy, modify, distribute, and sell this software and its
5 * documentation for any purpose is hereby granted without fee, provided that
6 * the above copyright notice appear in all copies and that both that copyright
7 * notice and this permission notice appear in supporting documentation, and
8 * that the name of the copyright holders not be used in advertising or
9 * publicity pertaining to distribution of the software without specific,
10 * written prior permission. The copyright holders make no representations
11 * about the suitability of this software for any purpose. It is provided "as
12 * is" without express or implied warranty.
13 *
14 * THE COPYRIGHT HOLDERS DISCLAIM ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
15 * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
16 * EVENT SHALL THE COPYRIGHT HOLDERS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
17 * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
18 * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
19 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE
20 * OF THIS SOFTWARE.
21 */
22
23#include <linux/kernel.h>
24#include <linux/module.h>
25#include <linux/delay.h>
26#include <linux/slab.h>
27#include <linux/init.h>
28#include <linux/errno.h>
29#include <linux/sched.h>
30#include <linux/i2c.h>
31#include "intel_dp.h"
32
33/* Run a single AUX_CH I2C transaction, writing/reading data as necessary */
34
35#define MODE_I2C_START 1
36#define MODE_I2C_WRITE 2
37#define MODE_I2C_READ 4
38#define MODE_I2C_STOP 8
39
40static int
41i2c_algo_dp_aux_transaction(struct i2c_adapter *adapter, int mode,
42 uint8_t write_byte, uint8_t *read_byte)
43{
44 struct i2c_algo_dp_aux_data *algo_data = adapter->algo_data;
45 uint16_t address = algo_data->address;
46 uint8_t msg[5];
47 uint8_t reply[2];
48 int msg_bytes;
49 int reply_bytes;
50 int ret;
51
52 /* Set up the command byte */
53 if (mode & MODE_I2C_READ)
54 msg[0] = AUX_I2C_READ << 4;
55 else
56 msg[0] = AUX_I2C_WRITE << 4;
57
58 if (!(mode & MODE_I2C_STOP))
59 msg[0] |= AUX_I2C_MOT << 4;
60
61 msg[1] = address >> 8;
62 msg[2] = address;
63
64 switch (mode) {
65 case MODE_I2C_WRITE:
66 msg[3] = 0;
67 msg[4] = write_byte;
68 msg_bytes = 5;
69 reply_bytes = 1;
70 break;
71 case MODE_I2C_READ:
72 msg[3] = 0;
73 msg_bytes = 4;
74 reply_bytes = 2;
75 break;
76 default:
77 msg_bytes = 3;
78 reply_bytes = 1;
79 break;
80 }
81
82 for (;;) {
83 ret = (*algo_data->aux_ch)(adapter,
84 msg, msg_bytes,
85 reply, reply_bytes);
86 if (ret < 0) {
87 printk(KERN_ERR "aux_ch failed %d\n", ret);
88 return ret;
89 }
90 switch (reply[0] & AUX_I2C_REPLY_MASK) {
91 case AUX_I2C_REPLY_ACK:
92 if (mode == MODE_I2C_READ) {
93 *read_byte = reply[1];
94 }
95 return reply_bytes - 1;
96 case AUX_I2C_REPLY_NACK:
97 printk(KERN_ERR "aux_ch nack\n");
98 return -EREMOTEIO;
99 case AUX_I2C_REPLY_DEFER:
100 printk(KERN_ERR "aux_ch defer\n");
101 udelay(100);
102 break;
103 default:
104 printk(KERN_ERR "aux_ch invalid reply 0x%02x\n", reply[0]);
105 return -EREMOTEIO;
106 }
107 }
108}
109
110/*
111 * I2C over AUX CH
112 */
113
114/*
115 * Send the address. If the I2C link is running, this 'restarts'
116 * the connection with the new address, this is used for doing
117 * a write followed by a read (as needed for DDC)
118 */
119static int
120i2c_algo_dp_aux_address(struct i2c_adapter *adapter, u16 address, bool reading)
121{
122 struct i2c_algo_dp_aux_data *algo_data = adapter->algo_data;
123 int mode = MODE_I2C_START;
124 int ret;
125
126 if (reading)
127 mode |= MODE_I2C_READ;
128 else
129 mode |= MODE_I2C_WRITE;
130 algo_data->address = address;
131 algo_data->running = true;
132 ret = i2c_algo_dp_aux_transaction(adapter, mode, 0, NULL);
133 return ret;
134}
135
136/*
137 * Stop the I2C transaction. This closes out the link, sending
138 * a bare address packet with the MOT bit turned off
139 */
140static void
141i2c_algo_dp_aux_stop(struct i2c_adapter *adapter, bool reading)
142{
143 struct i2c_algo_dp_aux_data *algo_data = adapter->algo_data;
144 int mode = MODE_I2C_STOP;
145
146 if (reading)
147 mode |= MODE_I2C_READ;
148 else
149 mode |= MODE_I2C_WRITE;
150 if (algo_data->running) {
151 (void) i2c_algo_dp_aux_transaction(adapter, mode, 0, NULL);
152 algo_data->running = false;
153 }
154}
155
156/*
157 * Write a single byte to the current I2C address, the
158 * the I2C link must be running or this returns -EIO
159 */
160static int
161i2c_algo_dp_aux_put_byte(struct i2c_adapter *adapter, u8 byte)
162{
163 struct i2c_algo_dp_aux_data *algo_data = adapter->algo_data;
164 int ret;
165
166 if (!algo_data->running)
167 return -EIO;
168
169 ret = i2c_algo_dp_aux_transaction(adapter, MODE_I2C_WRITE, byte, NULL);
170 return ret;
171}
172
173/*
174 * Read a single byte from the current I2C address, the
175 * I2C link must be running or this returns -EIO
176 */
177static int
178i2c_algo_dp_aux_get_byte(struct i2c_adapter *adapter, u8 *byte_ret)
179{
180 struct i2c_algo_dp_aux_data *algo_data = adapter->algo_data;
181 int ret;
182
183 if (!algo_data->running)
184 return -EIO;
185
186 ret = i2c_algo_dp_aux_transaction(adapter, MODE_I2C_READ, 0, byte_ret);
187 return ret;
188}
189
190static int
191i2c_algo_dp_aux_xfer(struct i2c_adapter *adapter,
192 struct i2c_msg *msgs,
193 int num)
194{
195 int ret = 0;
196 bool reading = false;
197 int m;
198 int b;
199
200 for (m = 0; m < num; m++) {
201 u16 len = msgs[m].len;
202 u8 *buf = msgs[m].buf;
203 reading = (msgs[m].flags & I2C_M_RD) != 0;
204 ret = i2c_algo_dp_aux_address(adapter, msgs[m].addr, reading);
205 if (ret < 0)
206 break;
207 if (reading) {
208 for (b = 0; b < len; b++) {
209 ret = i2c_algo_dp_aux_get_byte(adapter, &buf[b]);
210 if (ret < 0)
211 break;
212 }
213 } else {
214 for (b = 0; b < len; b++) {
215 ret = i2c_algo_dp_aux_put_byte(adapter, buf[b]);
216 if (ret < 0)
217 break;
218 }
219 }
220 if (ret < 0)
221 break;
222 }
223 if (ret >= 0)
224 ret = num;
225 i2c_algo_dp_aux_stop(adapter, reading);
226 printk(KERN_ERR "dp_aux_xfer return %d\n", ret);
227 return ret;
228}
229
230static u32
231i2c_algo_dp_aux_functionality(struct i2c_adapter *adapter)
232{
233 return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL |
234 I2C_FUNC_SMBUS_READ_BLOCK_DATA |
235 I2C_FUNC_SMBUS_BLOCK_PROC_CALL |
236 I2C_FUNC_10BIT_ADDR;
237}
238
239static const struct i2c_algorithm i2c_dp_aux_algo = {
240 .master_xfer = i2c_algo_dp_aux_xfer,
241 .functionality = i2c_algo_dp_aux_functionality,
242};
243
244static void
245i2c_dp_aux_reset_bus(struct i2c_adapter *adapter)
246{
247 (void) i2c_algo_dp_aux_address(adapter, 0, false);
248 (void) i2c_algo_dp_aux_stop(adapter, false);
249
250}
251
252static int
253i2c_dp_aux_prepare_bus(struct i2c_adapter *adapter)
254{
255 adapter->algo = &i2c_dp_aux_algo;
256 adapter->retries = 3;
257 i2c_dp_aux_reset_bus(adapter);
258 return 0;
259}
260
261int
262i2c_dp_aux_add_bus(struct i2c_adapter *adapter)
263{
264 int error;
265
266 error = i2c_dp_aux_prepare_bus(adapter);
267 if (error)
268 return error;
269 error = i2c_add_adapter(adapter);
270 return error;
271}
272EXPORT_SYMBOL(i2c_dp_aux_add_bus);
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index cd4b9c5f715e..004541c935a8 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -54,6 +54,7 @@
54#define INTEL_OUTPUT_LVDS 4 54#define INTEL_OUTPUT_LVDS 4
55#define INTEL_OUTPUT_TVOUT 5 55#define INTEL_OUTPUT_TVOUT 5
56#define INTEL_OUTPUT_HDMI 6 56#define INTEL_OUTPUT_HDMI 6
57#define INTEL_OUTPUT_DISPLAYPORT 7
57 58
58#define INTEL_DVO_CHIP_NONE 0 59#define INTEL_DVO_CHIP_NONE 0
59#define INTEL_DVO_CHIP_LVDS 1 60#define INTEL_DVO_CHIP_LVDS 1
@@ -65,7 +66,6 @@ struct intel_i2c_chan {
65 u32 reg; /* GPIO reg */ 66 u32 reg; /* GPIO reg */
66 struct i2c_adapter adapter; 67 struct i2c_adapter adapter;
67 struct i2c_algo_bit_data algo; 68 struct i2c_algo_bit_data algo;
68 u8 slave_addr;
69}; 69};
70 70
71struct intel_framebuffer { 71struct intel_framebuffer {
@@ -79,11 +79,12 @@ struct intel_output {
79 79
80 struct drm_encoder enc; 80 struct drm_encoder enc;
81 int type; 81 int type;
82 struct intel_i2c_chan *i2c_bus; /* for control functions */ 82 struct i2c_adapter *i2c_bus;
83 struct intel_i2c_chan *ddc_bus; /* for DDC only stuff */ 83 struct i2c_adapter *ddc_bus;
84 bool load_detect_temp; 84 bool load_detect_temp;
85 bool needs_tv_clock; 85 bool needs_tv_clock;
86 void *dev_priv; 86 void *dev_priv;
87 void (*hot_plug)(struct intel_output *);
87}; 88};
88 89
89struct intel_crtc { 90struct intel_crtc {
@@ -104,9 +105,9 @@ struct intel_crtc {
104#define enc_to_intel_output(x) container_of(x, struct intel_output, enc) 105#define enc_to_intel_output(x) container_of(x, struct intel_output, enc)
105#define to_intel_framebuffer(x) container_of(x, struct intel_framebuffer, base) 106#define to_intel_framebuffer(x) container_of(x, struct intel_framebuffer, base)
106 107
107struct intel_i2c_chan *intel_i2c_create(struct drm_device *dev, const u32 reg, 108struct i2c_adapter *intel_i2c_create(struct drm_device *dev, const u32 reg,
108 const char *name); 109 const char *name);
109void intel_i2c_destroy(struct intel_i2c_chan *chan); 110void intel_i2c_destroy(struct i2c_adapter *adapter);
110int intel_ddc_get_modes(struct intel_output *intel_output); 111int intel_ddc_get_modes(struct intel_output *intel_output);
111extern bool intel_ddc_probe(struct intel_output *intel_output); 112extern bool intel_ddc_probe(struct intel_output *intel_output);
112void intel_i2c_quirk_set(struct drm_device *dev, bool enable); 113void intel_i2c_quirk_set(struct drm_device *dev, bool enable);
@@ -116,6 +117,10 @@ extern bool intel_sdvo_init(struct drm_device *dev, int output_device);
116extern void intel_dvo_init(struct drm_device *dev); 117extern void intel_dvo_init(struct drm_device *dev);
117extern void intel_tv_init(struct drm_device *dev); 118extern void intel_tv_init(struct drm_device *dev);
118extern void intel_lvds_init(struct drm_device *dev); 119extern void intel_lvds_init(struct drm_device *dev);
120extern void intel_dp_init(struct drm_device *dev, int dp_reg);
121void
122intel_dp_set_m_n(struct drm_crtc *crtc, struct drm_display_mode *mode,
123 struct drm_display_mode *adjusted_mode);
119 124
120extern void intel_crtc_load_lut(struct drm_crtc *crtc); 125extern void intel_crtc_load_lut(struct drm_crtc *crtc);
121extern void intel_encoder_prepare (struct drm_encoder *encoder); 126extern void intel_encoder_prepare (struct drm_encoder *encoder);
diff --git a/drivers/gpu/drm/i915/intel_dvo.c b/drivers/gpu/drm/i915/intel_dvo.c
index 1ee3007d6ec0..13bff20930e8 100644
--- a/drivers/gpu/drm/i915/intel_dvo.c
+++ b/drivers/gpu/drm/i915/intel_dvo.c
@@ -384,10 +384,9 @@ void intel_dvo_init(struct drm_device *dev)
384{ 384{
385 struct intel_output *intel_output; 385 struct intel_output *intel_output;
386 struct intel_dvo_device *dvo; 386 struct intel_dvo_device *dvo;
387 struct intel_i2c_chan *i2cbus = NULL; 387 struct i2c_adapter *i2cbus = NULL;
388 int ret = 0; 388 int ret = 0;
389 int i; 389 int i;
390 int gpio_inited = 0;
391 int encoder_type = DRM_MODE_ENCODER_NONE; 390 int encoder_type = DRM_MODE_ENCODER_NONE;
392 intel_output = kzalloc (sizeof(struct intel_output), GFP_KERNEL); 391 intel_output = kzalloc (sizeof(struct intel_output), GFP_KERNEL);
393 if (!intel_output) 392 if (!intel_output)
@@ -420,14 +419,11 @@ void intel_dvo_init(struct drm_device *dev)
420 * It appears that everything is on GPIOE except for panels 419 * It appears that everything is on GPIOE except for panels
421 * on i830 laptops, which are on GPIOB (DVOA). 420 * on i830 laptops, which are on GPIOB (DVOA).
422 */ 421 */
423 if (gpio_inited != gpio) { 422 if (i2cbus != NULL)
424 if (i2cbus != NULL) 423 intel_i2c_destroy(i2cbus);
425 intel_i2c_destroy(i2cbus); 424 if (!(i2cbus = intel_i2c_create(dev, gpio,
426 if (!(i2cbus = intel_i2c_create(dev, gpio, 425 gpio == GPIOB ? "DVOI2C_B" : "DVOI2C_E"))) {
427 gpio == GPIOB ? "DVOI2C_B" : "DVOI2C_E"))) { 426 continue;
428 continue;
429 }
430 gpio_inited = gpio;
431 } 427 }
432 428
433 if (dvo->dev_ops!= NULL) 429 if (dvo->dev_ops!= NULL)
diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c
index 4ea2a651b92c..9e30daae37dc 100644
--- a/drivers/gpu/drm/i915/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/intel_hdmi.c
@@ -31,6 +31,7 @@
31#include "drmP.h" 31#include "drmP.h"
32#include "drm.h" 32#include "drm.h"
33#include "drm_crtc.h" 33#include "drm_crtc.h"
34#include "drm_edid.h"
34#include "intel_drv.h" 35#include "intel_drv.h"
35#include "i915_drm.h" 36#include "i915_drm.h"
36#include "i915_drv.h" 37#include "i915_drv.h"
@@ -56,8 +57,7 @@ static void intel_hdmi_mode_set(struct drm_encoder *encoder,
56 sdvox = SDVO_ENCODING_HDMI | 57 sdvox = SDVO_ENCODING_HDMI |
57 SDVO_BORDER_ENABLE | 58 SDVO_BORDER_ENABLE |
58 SDVO_VSYNC_ACTIVE_HIGH | 59 SDVO_VSYNC_ACTIVE_HIGH |
59 SDVO_HSYNC_ACTIVE_HIGH | 60 SDVO_HSYNC_ACTIVE_HIGH;
60 SDVO_NULL_PACKETS_DURING_VSYNC;
61 61
62 if (hdmi_priv->has_hdmi_sink) 62 if (hdmi_priv->has_hdmi_sink)
63 sdvox |= SDVO_AUDIO_ENABLE; 63 sdvox |= SDVO_AUDIO_ENABLE;
@@ -129,20 +129,26 @@ static bool intel_hdmi_mode_fixup(struct drm_encoder *encoder,
129 return true; 129 return true;
130} 130}
131 131
132static void 132static enum drm_connector_status
133intel_hdmi_sink_detect(struct drm_connector *connector) 133intel_hdmi_edid_detect(struct drm_connector *connector)
134{ 134{
135 struct intel_output *intel_output = to_intel_output(connector); 135 struct intel_output *intel_output = to_intel_output(connector);
136 struct intel_hdmi_priv *hdmi_priv = intel_output->dev_priv; 136 struct intel_hdmi_priv *hdmi_priv = intel_output->dev_priv;
137 struct edid *edid = NULL; 137 struct edid *edid = NULL;
138 enum drm_connector_status status = connector_status_disconnected;
138 139
139 edid = drm_get_edid(&intel_output->base, 140 edid = drm_get_edid(&intel_output->base,
140 &intel_output->ddc_bus->adapter); 141 intel_output->ddc_bus);
141 if (edid != NULL) { 142 hdmi_priv->has_hdmi_sink = false;
142 hdmi_priv->has_hdmi_sink = drm_detect_hdmi_monitor(edid); 143 if (edid) {
143 kfree(edid); 144 if (edid->input & DRM_EDID_INPUT_DIGITAL) {
145 status = connector_status_connected;
146 hdmi_priv->has_hdmi_sink = drm_detect_hdmi_monitor(edid);
147 }
144 intel_output->base.display_info.raw_edid = NULL; 148 intel_output->base.display_info.raw_edid = NULL;
149 kfree(edid);
145 } 150 }
151 return status;
146} 152}
147 153
148static enum drm_connector_status 154static enum drm_connector_status
@@ -154,11 +160,7 @@ igdng_hdmi_detect(struct drm_connector *connector)
154 /* FIXME hotplug detect */ 160 /* FIXME hotplug detect */
155 161
156 hdmi_priv->has_hdmi_sink = false; 162 hdmi_priv->has_hdmi_sink = false;
157 intel_hdmi_sink_detect(connector); 163 return intel_hdmi_edid_detect(connector);
158 if (hdmi_priv->has_hdmi_sink)
159 return connector_status_connected;
160 else
161 return connector_status_disconnected;
162} 164}
163 165
164static enum drm_connector_status 166static enum drm_connector_status
@@ -201,10 +203,9 @@ intel_hdmi_detect(struct drm_connector *connector)
201 return connector_status_unknown; 203 return connector_status_unknown;
202 } 204 }
203 205
204 if ((I915_READ(PORT_HOTPLUG_STAT) & bit) != 0) { 206 if ((I915_READ(PORT_HOTPLUG_STAT) & bit) != 0)
205 intel_hdmi_sink_detect(connector); 207 return intel_hdmi_edid_detect(connector);
206 return connector_status_connected; 208 else
207 } else
208 return connector_status_disconnected; 209 return connector_status_disconnected;
209} 210}
210 211
diff --git a/drivers/gpu/drm/i915/intel_i2c.c b/drivers/gpu/drm/i915/intel_i2c.c
index f7061f68d050..62b8bead7652 100644
--- a/drivers/gpu/drm/i915/intel_i2c.c
+++ b/drivers/gpu/drm/i915/intel_i2c.c
@@ -124,6 +124,7 @@ static void set_data(void *data, int state_high)
124 * @output: driver specific output device 124 * @output: driver specific output device
125 * @reg: GPIO reg to use 125 * @reg: GPIO reg to use
126 * @name: name for this bus 126 * @name: name for this bus
127 * @slave_addr: slave address (if fixed)
127 * 128 *
128 * Creates and registers a new i2c bus with the Linux i2c layer, for use 129 * Creates and registers a new i2c bus with the Linux i2c layer, for use
129 * in output probing and control (e.g. DDC or SDVO control functions). 130 * in output probing and control (e.g. DDC or SDVO control functions).
@@ -139,8 +140,8 @@ static void set_data(void *data, int state_high)
139 * %GPIOH 140 * %GPIOH
140 * see PRM for details on how these different busses are used. 141 * see PRM for details on how these different busses are used.
141 */ 142 */
142struct intel_i2c_chan *intel_i2c_create(struct drm_device *dev, const u32 reg, 143struct i2c_adapter *intel_i2c_create(struct drm_device *dev, const u32 reg,
143 const char *name) 144 const char *name)
144{ 145{
145 struct intel_i2c_chan *chan; 146 struct intel_i2c_chan *chan;
146 147
@@ -174,7 +175,7 @@ struct intel_i2c_chan *intel_i2c_create(struct drm_device *dev, const u32 reg,
174 intel_i2c_quirk_set(dev, false); 175 intel_i2c_quirk_set(dev, false);
175 udelay(20); 176 udelay(20);
176 177
177 return chan; 178 return &chan->adapter;
178 179
179out_free: 180out_free:
180 kfree(chan); 181 kfree(chan);
@@ -187,11 +188,16 @@ out_free:
187 * 188 *
188 * Unregister the adapter from the i2c layer, then free the structure. 189 * Unregister the adapter from the i2c layer, then free the structure.
189 */ 190 */
190void intel_i2c_destroy(struct intel_i2c_chan *chan) 191void intel_i2c_destroy(struct i2c_adapter *adapter)
191{ 192{
192 if (!chan) 193 struct intel_i2c_chan *chan;
194
195 if (!adapter)
193 return; 196 return;
194 197
198 chan = container_of(adapter,
199 struct intel_i2c_chan,
200 adapter);
195 i2c_del_adapter(&chan->adapter); 201 i2c_del_adapter(&chan->adapter);
196 kfree(chan); 202 kfree(chan);
197} 203}
diff --git a/drivers/gpu/drm/i915/intel_lvds.c b/drivers/gpu/drm/i915/intel_lvds.c
index f073ed8432e8..9564ca44a977 100644
--- a/drivers/gpu/drm/i915/intel_lvds.c
+++ b/drivers/gpu/drm/i915/intel_lvds.c
@@ -39,6 +39,21 @@
39 39
40#define I915_LVDS "i915_lvds" 40#define I915_LVDS "i915_lvds"
41 41
42/*
43 * the following four scaling options are defined.
44 * #define DRM_MODE_SCALE_NON_GPU 0
45 * #define DRM_MODE_SCALE_FULLSCREEN 1
46 * #define DRM_MODE_SCALE_NO_SCALE 2
47 * #define DRM_MODE_SCALE_ASPECT 3
48 */
49
50/* Private structure for the integrated LVDS support */
51struct intel_lvds_priv {
52 int fitting_mode;
53 u32 pfit_control;
54 u32 pfit_pgm_ratios;
55};
56
42/** 57/**
43 * Sets the backlight level. 58 * Sets the backlight level.
44 * 59 *
@@ -213,10 +228,27 @@ static bool intel_lvds_mode_fixup(struct drm_encoder *encoder,
213 struct drm_display_mode *mode, 228 struct drm_display_mode *mode,
214 struct drm_display_mode *adjusted_mode) 229 struct drm_display_mode *adjusted_mode)
215{ 230{
231 /*
232 * float point operation is not supported . So the PANEL_RATIO_FACTOR
233 * is defined, which can avoid the float point computation when
234 * calculating the panel ratio.
235 */
236#define PANEL_RATIO_FACTOR 8192
216 struct drm_device *dev = encoder->dev; 237 struct drm_device *dev = encoder->dev;
217 struct drm_i915_private *dev_priv = dev->dev_private; 238 struct drm_i915_private *dev_priv = dev->dev_private;
218 struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc); 239 struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
219 struct drm_encoder *tmp_encoder; 240 struct drm_encoder *tmp_encoder;
241 struct intel_output *intel_output = enc_to_intel_output(encoder);
242 struct intel_lvds_priv *lvds_priv = intel_output->dev_priv;
243 u32 pfit_control = 0, pfit_pgm_ratios = 0;
244 int left_border = 0, right_border = 0, top_border = 0;
245 int bottom_border = 0;
246 bool border = 0;
247 int panel_ratio, desired_ratio, vert_scale, horiz_scale;
248 int horiz_ratio, vert_ratio;
249 u32 hsync_width, vsync_width;
250 u32 hblank_width, vblank_width;
251 u32 hsync_pos, vsync_pos;
220 252
221 /* Should never happen!! */ 253 /* Should never happen!! */
222 if (!IS_I965G(dev) && intel_crtc->pipe == 0) { 254 if (!IS_I965G(dev) && intel_crtc->pipe == 0) {
@@ -232,7 +264,9 @@ static bool intel_lvds_mode_fixup(struct drm_encoder *encoder,
232 return false; 264 return false;
233 } 265 }
234 } 266 }
235 267 /* If we don't have a panel mode, there is nothing we can do */
268 if (dev_priv->panel_fixed_mode == NULL)
269 return true;
236 /* 270 /*
237 * If we have timings from the BIOS for the panel, put them in 271 * If we have timings from the BIOS for the panel, put them in
238 * to the adjusted mode. The CRTC will be set up for this mode, 272 * to the adjusted mode. The CRTC will be set up for this mode,
@@ -256,6 +290,243 @@ static bool intel_lvds_mode_fixup(struct drm_encoder *encoder,
256 drm_mode_set_crtcinfo(adjusted_mode, CRTC_INTERLACE_HALVE_V); 290 drm_mode_set_crtcinfo(adjusted_mode, CRTC_INTERLACE_HALVE_V);
257 } 291 }
258 292
293 /* Make sure pre-965s set dither correctly */
294 if (!IS_I965G(dev)) {
295 if (dev_priv->panel_wants_dither || dev_priv->lvds_dither)
296 pfit_control |= PANEL_8TO6_DITHER_ENABLE;
297 }
298
299 /* Native modes don't need fitting */
300 if (adjusted_mode->hdisplay == mode->hdisplay &&
301 adjusted_mode->vdisplay == mode->vdisplay) {
302 pfit_pgm_ratios = 0;
303 border = 0;
304 goto out;
305 }
306
307 /* 965+ wants fuzzy fitting */
308 if (IS_I965G(dev))
309 pfit_control |= (intel_crtc->pipe << PFIT_PIPE_SHIFT) |
310 PFIT_FILTER_FUZZY;
311
312 hsync_width = adjusted_mode->crtc_hsync_end -
313 adjusted_mode->crtc_hsync_start;
314 vsync_width = adjusted_mode->crtc_vsync_end -
315 adjusted_mode->crtc_vsync_start;
316 hblank_width = adjusted_mode->crtc_hblank_end -
317 adjusted_mode->crtc_hblank_start;
318 vblank_width = adjusted_mode->crtc_vblank_end -
319 adjusted_mode->crtc_vblank_start;
320 /*
321 * Deal with panel fitting options. Figure out how to stretch the
322 * image based on its aspect ratio & the current panel fitting mode.
323 */
324 panel_ratio = adjusted_mode->hdisplay * PANEL_RATIO_FACTOR /
325 adjusted_mode->vdisplay;
326 desired_ratio = mode->hdisplay * PANEL_RATIO_FACTOR /
327 mode->vdisplay;
328 /*
329 * Enable automatic panel scaling for non-native modes so that they fill
330 * the screen. Should be enabled before the pipe is enabled, according
331 * to register description and PRM.
332 * Change the value here to see the borders for debugging
333 */
334 I915_WRITE(BCLRPAT_A, 0);
335 I915_WRITE(BCLRPAT_B, 0);
336
337 switch (lvds_priv->fitting_mode) {
338 case DRM_MODE_SCALE_NO_SCALE:
339 /*
340 * For centered modes, we have to calculate border widths &
341 * heights and modify the values programmed into the CRTC.
342 */
343 left_border = (adjusted_mode->hdisplay - mode->hdisplay) / 2;
344 right_border = left_border;
345 if (mode->hdisplay & 1)
346 right_border++;
347 top_border = (adjusted_mode->vdisplay - mode->vdisplay) / 2;
348 bottom_border = top_border;
349 if (mode->vdisplay & 1)
350 bottom_border++;
351 /* Set active & border values */
352 adjusted_mode->crtc_hdisplay = mode->hdisplay;
353 /* Keep the boder be even */
354 if (right_border & 1)
355 right_border++;
356 /* use the border directly instead of border minuse one */
357 adjusted_mode->crtc_hblank_start = mode->hdisplay +
358 right_border;
359 /* keep the blank width constant */
360 adjusted_mode->crtc_hblank_end =
361 adjusted_mode->crtc_hblank_start + hblank_width;
362 /* get the hsync pos relative to hblank start */
363 hsync_pos = (hblank_width - hsync_width) / 2;
364 /* keep the hsync pos be even */
365 if (hsync_pos & 1)
366 hsync_pos++;
367 adjusted_mode->crtc_hsync_start =
368 adjusted_mode->crtc_hblank_start + hsync_pos;
369 /* keep the hsync width constant */
370 adjusted_mode->crtc_hsync_end =
371 adjusted_mode->crtc_hsync_start + hsync_width;
372 adjusted_mode->crtc_vdisplay = mode->vdisplay;
373 /* use the border instead of border minus one */
374 adjusted_mode->crtc_vblank_start = mode->vdisplay +
375 bottom_border;
376 /* keep the vblank width constant */
377 adjusted_mode->crtc_vblank_end =
378 adjusted_mode->crtc_vblank_start + vblank_width;
379 /* get the vsync start postion relative to vblank start */
380 vsync_pos = (vblank_width - vsync_width) / 2;
381 adjusted_mode->crtc_vsync_start =
382 adjusted_mode->crtc_vblank_start + vsync_pos;
383 /* keep the vsync width constant */
384 adjusted_mode->crtc_vsync_end =
385 adjusted_mode->crtc_vblank_start + vsync_width;
386 border = 1;
387 break;
388 case DRM_MODE_SCALE_ASPECT:
389 /* Scale but preserve the spect ratio */
390 pfit_control |= PFIT_ENABLE;
391 if (IS_I965G(dev)) {
392 /* 965+ is easy, it does everything in hw */
393 if (panel_ratio > desired_ratio)
394 pfit_control |= PFIT_SCALING_PILLAR;
395 else if (panel_ratio < desired_ratio)
396 pfit_control |= PFIT_SCALING_LETTER;
397 else
398 pfit_control |= PFIT_SCALING_AUTO;
399 } else {
400 /*
401 * For earlier chips we have to calculate the scaling
402 * ratio by hand and program it into the
403 * PFIT_PGM_RATIO register
404 */
405 u32 horiz_bits, vert_bits, bits = 12;
406 horiz_ratio = mode->hdisplay * PANEL_RATIO_FACTOR/
407 adjusted_mode->hdisplay;
408 vert_ratio = mode->vdisplay * PANEL_RATIO_FACTOR/
409 adjusted_mode->vdisplay;
410 horiz_scale = adjusted_mode->hdisplay *
411 PANEL_RATIO_FACTOR / mode->hdisplay;
412 vert_scale = adjusted_mode->vdisplay *
413 PANEL_RATIO_FACTOR / mode->vdisplay;
414
415 /* retain aspect ratio */
416 if (panel_ratio > desired_ratio) { /* Pillar */
417 u32 scaled_width;
418 scaled_width = mode->hdisplay * vert_scale /
419 PANEL_RATIO_FACTOR;
420 horiz_ratio = vert_ratio;
421 pfit_control |= (VERT_AUTO_SCALE |
422 VERT_INTERP_BILINEAR |
423 HORIZ_INTERP_BILINEAR);
424 /* Pillar will have left/right borders */
425 left_border = (adjusted_mode->hdisplay -
426 scaled_width) / 2;
427 right_border = left_border;
428 if (mode->hdisplay & 1) /* odd resolutions */
429 right_border++;
430 /* keep the border be even */
431 if (right_border & 1)
432 right_border++;
433 adjusted_mode->crtc_hdisplay = scaled_width;
434 /* use border instead of border minus one */
435 adjusted_mode->crtc_hblank_start =
436 scaled_width + right_border;
437 /* keep the hblank width constant */
438 adjusted_mode->crtc_hblank_end =
439 adjusted_mode->crtc_hblank_start +
440 hblank_width;
441 /*
442 * get the hsync start pos relative to
443 * hblank start
444 */
445 hsync_pos = (hblank_width - hsync_width) / 2;
446 /* keep the hsync_pos be even */
447 if (hsync_pos & 1)
448 hsync_pos++;
449 adjusted_mode->crtc_hsync_start =
450 adjusted_mode->crtc_hblank_start +
451 hsync_pos;
452 /* keept hsync width constant */
453 adjusted_mode->crtc_hsync_end =
454 adjusted_mode->crtc_hsync_start +
455 hsync_width;
456 border = 1;
457 } else if (panel_ratio < desired_ratio) { /* letter */
458 u32 scaled_height = mode->vdisplay *
459 horiz_scale / PANEL_RATIO_FACTOR;
460 vert_ratio = horiz_ratio;
461 pfit_control |= (HORIZ_AUTO_SCALE |
462 VERT_INTERP_BILINEAR |
463 HORIZ_INTERP_BILINEAR);
464 /* Letterbox will have top/bottom border */
465 top_border = (adjusted_mode->vdisplay -
466 scaled_height) / 2;
467 bottom_border = top_border;
468 if (mode->vdisplay & 1)
469 bottom_border++;
470 adjusted_mode->crtc_vdisplay = scaled_height;
471 /* use border instead of border minus one */
472 adjusted_mode->crtc_vblank_start =
473 scaled_height + bottom_border;
474 /* keep the vblank width constant */
475 adjusted_mode->crtc_vblank_end =
476 adjusted_mode->crtc_vblank_start +
477 vblank_width;
478 /*
479 * get the vsync start pos relative to
480 * vblank start
481 */
482 vsync_pos = (vblank_width - vsync_width) / 2;
483 adjusted_mode->crtc_vsync_start =
484 adjusted_mode->crtc_vblank_start +
485 vsync_pos;
486 /* keep the vsync width constant */
487 adjusted_mode->crtc_vsync_end =
488 adjusted_mode->crtc_vsync_start +
489 vsync_width;
490 border = 1;
491 } else {
492 /* Aspects match, Let hw scale both directions */
493 pfit_control |= (VERT_AUTO_SCALE |
494 HORIZ_AUTO_SCALE |
495 VERT_INTERP_BILINEAR |
496 HORIZ_INTERP_BILINEAR);
497 }
498 horiz_bits = (1 << bits) * horiz_ratio /
499 PANEL_RATIO_FACTOR;
500 vert_bits = (1 << bits) * vert_ratio /
501 PANEL_RATIO_FACTOR;
502 pfit_pgm_ratios =
503 ((vert_bits << PFIT_VERT_SCALE_SHIFT) &
504 PFIT_VERT_SCALE_MASK) |
505 ((horiz_bits << PFIT_HORIZ_SCALE_SHIFT) &
506 PFIT_HORIZ_SCALE_MASK);
507 }
508 break;
509
510 case DRM_MODE_SCALE_FULLSCREEN:
511 /*
512 * Full scaling, even if it changes the aspect ratio.
513 * Fortunately this is all done for us in hw.
514 */
515 pfit_control |= PFIT_ENABLE;
516 if (IS_I965G(dev))
517 pfit_control |= PFIT_SCALING_AUTO;
518 else
519 pfit_control |= (VERT_AUTO_SCALE | HORIZ_AUTO_SCALE |
520 VERT_INTERP_BILINEAR |
521 HORIZ_INTERP_BILINEAR);
522 break;
523 default:
524 break;
525 }
526
527out:
528 lvds_priv->pfit_control = pfit_control;
529 lvds_priv->pfit_pgm_ratios = pfit_pgm_ratios;
259 /* 530 /*
260 * XXX: It would be nice to support lower refresh rates on the 531 * XXX: It would be nice to support lower refresh rates on the
261 * panels to reduce power consumption, and perhaps match the 532 * panels to reduce power consumption, and perhaps match the
@@ -301,8 +572,8 @@ static void intel_lvds_mode_set(struct drm_encoder *encoder,
301{ 572{
302 struct drm_device *dev = encoder->dev; 573 struct drm_device *dev = encoder->dev;
303 struct drm_i915_private *dev_priv = dev->dev_private; 574 struct drm_i915_private *dev_priv = dev->dev_private;
304 struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc); 575 struct intel_output *intel_output = enc_to_intel_output(encoder);
305 u32 pfit_control; 576 struct intel_lvds_priv *lvds_priv = intel_output->dev_priv;
306 577
307 /* 578 /*
308 * The LVDS pin pair will already have been turned on in the 579 * The LVDS pin pair will already have been turned on in the
@@ -319,22 +590,8 @@ static void intel_lvds_mode_set(struct drm_encoder *encoder,
319 * screen. Should be enabled before the pipe is enabled, according to 590 * screen. Should be enabled before the pipe is enabled, according to
320 * register description and PRM. 591 * register description and PRM.
321 */ 592 */
322 if (mode->hdisplay != adjusted_mode->hdisplay || 593 I915_WRITE(PFIT_PGM_RATIOS, lvds_priv->pfit_pgm_ratios);
323 mode->vdisplay != adjusted_mode->vdisplay) 594 I915_WRITE(PFIT_CONTROL, lvds_priv->pfit_control);
324 pfit_control = (PFIT_ENABLE | VERT_AUTO_SCALE |
325 HORIZ_AUTO_SCALE | VERT_INTERP_BILINEAR |
326 HORIZ_INTERP_BILINEAR);
327 else
328 pfit_control = 0;
329
330 if (!IS_I965G(dev)) {
331 if (dev_priv->panel_wants_dither || dev_priv->lvds_dither)
332 pfit_control |= PANEL_8TO6_DITHER_ENABLE;
333 }
334 else
335 pfit_control |= intel_crtc->pipe << PFIT_PIPE_SHIFT;
336
337 I915_WRITE(PFIT_CONTROL, pfit_control);
338} 595}
339 596
340/** 597/**
@@ -406,6 +663,34 @@ static int intel_lvds_set_property(struct drm_connector *connector,
406 struct drm_property *property, 663 struct drm_property *property,
407 uint64_t value) 664 uint64_t value)
408{ 665{
666 struct drm_device *dev = connector->dev;
667 struct intel_output *intel_output =
668 to_intel_output(connector);
669
670 if (property == dev->mode_config.scaling_mode_property &&
671 connector->encoder) {
672 struct drm_crtc *crtc = connector->encoder->crtc;
673 struct intel_lvds_priv *lvds_priv = intel_output->dev_priv;
674 if (value == DRM_MODE_SCALE_NON_GPU) {
675 DRM_DEBUG_KMS(I915_LVDS,
676 "non_GPU property is unsupported\n");
677 return 0;
678 }
679 if (lvds_priv->fitting_mode == value) {
680 /* the LVDS scaling property is not changed */
681 return 0;
682 }
683 lvds_priv->fitting_mode = value;
684 if (crtc && crtc->enabled) {
685 /*
686 * If the CRTC is enabled, the display will be changed
687 * according to the new panel fitting mode.
688 */
689 drm_crtc_helper_set_mode(crtc, &crtc->mode,
690 crtc->x, crtc->y, crtc->fb);
691 }
692 }
693
409 return 0; 694 return 0;
410} 695}
411 696
@@ -456,7 +741,7 @@ static const struct dmi_system_id intel_no_lvds[] = {
456 .callback = intel_no_lvds_dmi_callback, 741 .callback = intel_no_lvds_dmi_callback,
457 .ident = "Apple Mac Mini (Core series)", 742 .ident = "Apple Mac Mini (Core series)",
458 .matches = { 743 .matches = {
459 DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."), 744 DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
460 DMI_MATCH(DMI_PRODUCT_NAME, "Macmini1,1"), 745 DMI_MATCH(DMI_PRODUCT_NAME, "Macmini1,1"),
461 }, 746 },
462 }, 747 },
@@ -464,7 +749,7 @@ static const struct dmi_system_id intel_no_lvds[] = {
464 .callback = intel_no_lvds_dmi_callback, 749 .callback = intel_no_lvds_dmi_callback,
465 .ident = "Apple Mac Mini (Core 2 series)", 750 .ident = "Apple Mac Mini (Core 2 series)",
466 .matches = { 751 .matches = {
467 DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."), 752 DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
468 DMI_MATCH(DMI_PRODUCT_NAME, "Macmini2,1"), 753 DMI_MATCH(DMI_PRODUCT_NAME, "Macmini2,1"),
469 }, 754 },
470 }, 755 },
@@ -518,6 +803,7 @@ void intel_lvds_init(struct drm_device *dev)
518 struct drm_encoder *encoder; 803 struct drm_encoder *encoder;
519 struct drm_display_mode *scan; /* *modes, *bios_mode; */ 804 struct drm_display_mode *scan; /* *modes, *bios_mode; */
520 struct drm_crtc *crtc; 805 struct drm_crtc *crtc;
806 struct intel_lvds_priv *lvds_priv;
521 u32 lvds; 807 u32 lvds;
522 int pipe, gpio = GPIOC; 808 int pipe, gpio = GPIOC;
523 809
@@ -531,7 +817,8 @@ void intel_lvds_init(struct drm_device *dev)
531 gpio = PCH_GPIOC; 817 gpio = PCH_GPIOC;
532 } 818 }
533 819
534 intel_output = kzalloc(sizeof(struct intel_output), GFP_KERNEL); 820 intel_output = kzalloc(sizeof(struct intel_output) +
821 sizeof(struct intel_lvds_priv), GFP_KERNEL);
535 if (!intel_output) { 822 if (!intel_output) {
536 return; 823 return;
537 } 824 }
@@ -553,7 +840,18 @@ void intel_lvds_init(struct drm_device *dev)
553 connector->interlace_allowed = false; 840 connector->interlace_allowed = false;
554 connector->doublescan_allowed = false; 841 connector->doublescan_allowed = false;
555 842
843 lvds_priv = (struct intel_lvds_priv *)(intel_output + 1);
844 intel_output->dev_priv = lvds_priv;
845 /* create the scaling mode property */
846 drm_mode_create_scaling_mode_property(dev);
847 /*
848 * the initial panel fitting mode will be FULL_SCREEN.
849 */
556 850
851 drm_connector_attach_property(&intel_output->base,
852 dev->mode_config.scaling_mode_property,
853 DRM_MODE_SCALE_FULLSCREEN);
854 lvds_priv->fitting_mode = DRM_MODE_SCALE_FULLSCREEN;
557 /* 855 /*
558 * LVDS discovery: 856 * LVDS discovery:
559 * 1) check for EDID on DDC 857 * 1) check for EDID on DDC
@@ -649,5 +947,5 @@ failed:
649 if (intel_output->ddc_bus) 947 if (intel_output->ddc_bus)
650 intel_i2c_destroy(intel_output->ddc_bus); 948 intel_i2c_destroy(intel_output->ddc_bus);
651 drm_connector_cleanup(connector); 949 drm_connector_cleanup(connector);
652 kfree(connector); 950 kfree(intel_output);
653} 951}
diff --git a/drivers/gpu/drm/i915/intel_modes.c b/drivers/gpu/drm/i915/intel_modes.c
index e0910fefce87..67e2f4632a24 100644
--- a/drivers/gpu/drm/i915/intel_modes.c
+++ b/drivers/gpu/drm/i915/intel_modes.c
@@ -53,10 +53,9 @@ bool intel_ddc_probe(struct intel_output *intel_output)
53 } 53 }
54 }; 54 };
55 55
56 intel_i2c_quirk_set(intel_output->ddc_bus->drm_dev, true); 56 intel_i2c_quirk_set(intel_output->base.dev, true);
57 ret = i2c_transfer(&intel_output->ddc_bus->adapter, msgs, 2); 57 ret = i2c_transfer(intel_output->ddc_bus, msgs, 2);
58 intel_i2c_quirk_set(intel_output->ddc_bus->drm_dev, false); 58 intel_i2c_quirk_set(intel_output->base.dev, false);
59
60 if (ret == 2) 59 if (ret == 2)
61 return true; 60 return true;
62 61
@@ -74,10 +73,9 @@ int intel_ddc_get_modes(struct intel_output *intel_output)
74 struct edid *edid; 73 struct edid *edid;
75 int ret = 0; 74 int ret = 0;
76 75
77 intel_i2c_quirk_set(intel_output->ddc_bus->drm_dev, true); 76 intel_i2c_quirk_set(intel_output->base.dev, true);
78 edid = drm_get_edid(&intel_output->base, 77 edid = drm_get_edid(&intel_output->base, intel_output->ddc_bus);
79 &intel_output->ddc_bus->adapter); 78 intel_i2c_quirk_set(intel_output->base.dev, false);
80 intel_i2c_quirk_set(intel_output->ddc_bus->drm_dev, false);
81 if (edid) { 79 if (edid) {
82 drm_mode_connector_update_edid_property(&intel_output->base, 80 drm_mode_connector_update_edid_property(&intel_output->base,
83 edid); 81 edid);
diff --git a/drivers/gpu/drm/i915/intel_sdvo.c b/drivers/gpu/drm/i915/intel_sdvo.c
index 9a00adb3a508..f03473779feb 100644
--- a/drivers/gpu/drm/i915/intel_sdvo.c
+++ b/drivers/gpu/drm/i915/intel_sdvo.c
@@ -38,8 +38,7 @@
38#undef SDVO_DEBUG 38#undef SDVO_DEBUG
39#define I915_SDVO "i915_sdvo" 39#define I915_SDVO "i915_sdvo"
40struct intel_sdvo_priv { 40struct intel_sdvo_priv {
41 struct intel_i2c_chan *i2c_bus; 41 u8 slave_addr;
42 int slaveaddr;
43 42
44 /* Register for the SDVO device: SDVOB or SDVOC */ 43 /* Register for the SDVO device: SDVOB or SDVOC */
45 int output_device; 44 int output_device;
@@ -146,13 +145,13 @@ static bool intel_sdvo_read_byte(struct intel_output *intel_output, u8 addr,
146 145
147 struct i2c_msg msgs[] = { 146 struct i2c_msg msgs[] = {
148 { 147 {
149 .addr = sdvo_priv->i2c_bus->slave_addr, 148 .addr = sdvo_priv->slave_addr >> 1,
150 .flags = 0, 149 .flags = 0,
151 .len = 1, 150 .len = 1,
152 .buf = out_buf, 151 .buf = out_buf,
153 }, 152 },
154 { 153 {
155 .addr = sdvo_priv->i2c_bus->slave_addr, 154 .addr = sdvo_priv->slave_addr >> 1,
156 .flags = I2C_M_RD, 155 .flags = I2C_M_RD,
157 .len = 1, 156 .len = 1,
158 .buf = buf, 157 .buf = buf,
@@ -162,7 +161,7 @@ static bool intel_sdvo_read_byte(struct intel_output *intel_output, u8 addr,
162 out_buf[0] = addr; 161 out_buf[0] = addr;
163 out_buf[1] = 0; 162 out_buf[1] = 0;
164 163
165 if ((ret = i2c_transfer(&sdvo_priv->i2c_bus->adapter, msgs, 2)) == 2) 164 if ((ret = i2c_transfer(intel_output->i2c_bus, msgs, 2)) == 2)
166 { 165 {
167 *ch = buf[0]; 166 *ch = buf[0];
168 return true; 167 return true;
@@ -175,10 +174,11 @@ static bool intel_sdvo_read_byte(struct intel_output *intel_output, u8 addr,
175static bool intel_sdvo_write_byte(struct intel_output *intel_output, int addr, 174static bool intel_sdvo_write_byte(struct intel_output *intel_output, int addr,
176 u8 ch) 175 u8 ch)
177{ 176{
177 struct intel_sdvo_priv *sdvo_priv = intel_output->dev_priv;
178 u8 out_buf[2]; 178 u8 out_buf[2];
179 struct i2c_msg msgs[] = { 179 struct i2c_msg msgs[] = {
180 { 180 {
181 .addr = intel_output->i2c_bus->slave_addr, 181 .addr = sdvo_priv->slave_addr >> 1,
182 .flags = 0, 182 .flags = 0,
183 .len = 2, 183 .len = 2,
184 .buf = out_buf, 184 .buf = out_buf,
@@ -188,7 +188,7 @@ static bool intel_sdvo_write_byte(struct intel_output *intel_output, int addr,
188 out_buf[0] = addr; 188 out_buf[0] = addr;
189 out_buf[1] = ch; 189 out_buf[1] = ch;
190 190
191 if (i2c_transfer(&intel_output->i2c_bus->adapter, msgs, 1) == 1) 191 if (i2c_transfer(intel_output->i2c_bus, msgs, 1) == 1)
192 { 192 {
193 return true; 193 return true;
194 } 194 }
@@ -1369,9 +1369,8 @@ intel_sdvo_hdmi_sink_detect(struct drm_connector *connector)
1369 struct intel_sdvo_priv *sdvo_priv = intel_output->dev_priv; 1369 struct intel_sdvo_priv *sdvo_priv = intel_output->dev_priv;
1370 struct edid *edid = NULL; 1370 struct edid *edid = NULL;
1371 1371
1372 intel_sdvo_set_control_bus_switch(intel_output, sdvo_priv->ddc_bus);
1373 edid = drm_get_edid(&intel_output->base, 1372 edid = drm_get_edid(&intel_output->base,
1374 &intel_output->ddc_bus->adapter); 1373 intel_output->ddc_bus);
1375 if (edid != NULL) { 1374 if (edid != NULL) {
1376 sdvo_priv->is_hdmi = drm_detect_hdmi_monitor(edid); 1375 sdvo_priv->is_hdmi = drm_detect_hdmi_monitor(edid);
1377 kfree(edid); 1376 kfree(edid);
@@ -1549,7 +1548,6 @@ static void intel_sdvo_get_tv_modes(struct drm_connector *connector)
1549static void intel_sdvo_get_lvds_modes(struct drm_connector *connector) 1548static void intel_sdvo_get_lvds_modes(struct drm_connector *connector)
1550{ 1549{
1551 struct intel_output *intel_output = to_intel_output(connector); 1550 struct intel_output *intel_output = to_intel_output(connector);
1552 struct intel_sdvo_priv *sdvo_priv = intel_output->dev_priv;
1553 struct drm_i915_private *dev_priv = connector->dev->dev_private; 1551 struct drm_i915_private *dev_priv = connector->dev->dev_private;
1554 1552
1555 /* 1553 /*
@@ -1557,8 +1555,6 @@ static void intel_sdvo_get_lvds_modes(struct drm_connector *connector)
1557 * Assume that the preferred modes are 1555 * Assume that the preferred modes are
1558 * arranged in priority order. 1556 * arranged in priority order.
1559 */ 1557 */
1560 /* set the bus switch and get the modes */
1561 intel_sdvo_set_control_bus_switch(intel_output, sdvo_priv->ddc_bus);
1562 intel_ddc_get_modes(intel_output); 1558 intel_ddc_get_modes(intel_output);
1563 if (list_empty(&connector->probed_modes) == false) 1559 if (list_empty(&connector->probed_modes) == false)
1564 return; 1560 return;
@@ -1709,7 +1705,7 @@ intel_sdvo_chan_to_intel_output(struct intel_i2c_chan *chan)
1709 1705
1710 list_for_each_entry(connector, 1706 list_for_each_entry(connector,
1711 &dev->mode_config.connector_list, head) { 1707 &dev->mode_config.connector_list, head) {
1712 if (to_intel_output(connector)->ddc_bus == chan) { 1708 if (to_intel_output(connector)->ddc_bus == &chan->adapter) {
1713 intel_output = to_intel_output(connector); 1709 intel_output = to_intel_output(connector);
1714 break; 1710 break;
1715 } 1711 }
@@ -1723,7 +1719,7 @@ static int intel_sdvo_master_xfer(struct i2c_adapter *i2c_adap,
1723 struct intel_output *intel_output; 1719 struct intel_output *intel_output;
1724 struct intel_sdvo_priv *sdvo_priv; 1720 struct intel_sdvo_priv *sdvo_priv;
1725 struct i2c_algo_bit_data *algo_data; 1721 struct i2c_algo_bit_data *algo_data;
1726 struct i2c_algorithm *algo; 1722 const struct i2c_algorithm *algo;
1727 1723
1728 algo_data = (struct i2c_algo_bit_data *)i2c_adap->algo_data; 1724 algo_data = (struct i2c_algo_bit_data *)i2c_adap->algo_data;
1729 intel_output = 1725 intel_output =
@@ -1733,7 +1729,7 @@ static int intel_sdvo_master_xfer(struct i2c_adapter *i2c_adap,
1733 return -EINVAL; 1729 return -EINVAL;
1734 1730
1735 sdvo_priv = intel_output->dev_priv; 1731 sdvo_priv = intel_output->dev_priv;
1736 algo = (struct i2c_algorithm *)intel_output->i2c_bus->adapter.algo; 1732 algo = intel_output->i2c_bus->algo;
1737 1733
1738 intel_sdvo_set_control_bus_switch(intel_output, sdvo_priv->ddc_bus); 1734 intel_sdvo_set_control_bus_switch(intel_output, sdvo_priv->ddc_bus);
1739 return algo->master_xfer(i2c_adap, msgs, num); 1735 return algo->master_xfer(i2c_adap, msgs, num);
@@ -1785,13 +1781,11 @@ bool intel_sdvo_init(struct drm_device *dev, int output_device)
1785 struct drm_connector *connector; 1781 struct drm_connector *connector;
1786 struct intel_output *intel_output; 1782 struct intel_output *intel_output;
1787 struct intel_sdvo_priv *sdvo_priv; 1783 struct intel_sdvo_priv *sdvo_priv;
1788 struct intel_i2c_chan *i2cbus = NULL; 1784
1789 struct intel_i2c_chan *ddcbus = NULL;
1790 int connector_type; 1785 int connector_type;
1791 u8 ch[0x40]; 1786 u8 ch[0x40];
1792 int i; 1787 int i;
1793 int encoder_type, output_id; 1788 int encoder_type;
1794 u8 slave_addr;
1795 1789
1796 intel_output = kcalloc(sizeof(struct intel_output)+sizeof(struct intel_sdvo_priv), 1, GFP_KERNEL); 1790 intel_output = kcalloc(sizeof(struct intel_output)+sizeof(struct intel_sdvo_priv), 1, GFP_KERNEL);
1797 if (!intel_output) { 1791 if (!intel_output) {
@@ -1799,29 +1793,24 @@ bool intel_sdvo_init(struct drm_device *dev, int output_device)
1799 } 1793 }
1800 1794
1801 sdvo_priv = (struct intel_sdvo_priv *)(intel_output + 1); 1795 sdvo_priv = (struct intel_sdvo_priv *)(intel_output + 1);
1796 sdvo_priv->output_device = output_device;
1797
1798 intel_output->dev_priv = sdvo_priv;
1802 intel_output->type = INTEL_OUTPUT_SDVO; 1799 intel_output->type = INTEL_OUTPUT_SDVO;
1803 1800
1804 /* setup the DDC bus. */ 1801 /* setup the DDC bus. */
1805 if (output_device == SDVOB) 1802 if (output_device == SDVOB)
1806 i2cbus = intel_i2c_create(dev, GPIOE, "SDVOCTRL_E for SDVOB"); 1803 intel_output->i2c_bus = intel_i2c_create(dev, GPIOE, "SDVOCTRL_E for SDVOB");
1807 else 1804 else
1808 i2cbus = intel_i2c_create(dev, GPIOE, "SDVOCTRL_E for SDVOC"); 1805 intel_output->i2c_bus = intel_i2c_create(dev, GPIOE, "SDVOCTRL_E for SDVOC");
1809 1806
1810 if (!i2cbus) 1807 if (!intel_output->i2c_bus)
1811 goto err_inteloutput; 1808 goto err_inteloutput;
1812 1809
1813 slave_addr = intel_sdvo_get_slave_addr(dev, output_device); 1810 sdvo_priv->slave_addr = intel_sdvo_get_slave_addr(dev, output_device);
1814 sdvo_priv->i2c_bus = i2cbus;
1815 1811
1816 if (output_device == SDVOB) { 1812 /* Save the bit-banging i2c functionality for use by the DDC wrapper */
1817 output_id = 1; 1813 intel_sdvo_i2c_bit_algo.functionality = intel_output->i2c_bus->algo->functionality;
1818 } else {
1819 output_id = 2;
1820 }
1821 sdvo_priv->i2c_bus->slave_addr = slave_addr >> 1;
1822 sdvo_priv->output_device = output_device;
1823 intel_output->i2c_bus = i2cbus;
1824 intel_output->dev_priv = sdvo_priv;
1825 1814
1826 /* Read the regs to test if we can talk to the device */ 1815 /* Read the regs to test if we can talk to the device */
1827 for (i = 0; i < 0x40; i++) { 1816 for (i = 0; i < 0x40; i++) {
@@ -1835,17 +1824,15 @@ bool intel_sdvo_init(struct drm_device *dev, int output_device)
1835 1824
1836 /* setup the DDC bus. */ 1825 /* setup the DDC bus. */
1837 if (output_device == SDVOB) 1826 if (output_device == SDVOB)
1838 ddcbus = intel_i2c_create(dev, GPIOE, "SDVOB DDC BUS"); 1827 intel_output->ddc_bus = intel_i2c_create(dev, GPIOE, "SDVOB DDC BUS");
1839 else 1828 else
1840 ddcbus = intel_i2c_create(dev, GPIOE, "SDVOC DDC BUS"); 1829 intel_output->ddc_bus = intel_i2c_create(dev, GPIOE, "SDVOC DDC BUS");
1841 1830
1842 if (ddcbus == NULL) 1831 if (intel_output->ddc_bus == NULL)
1843 goto err_i2c; 1832 goto err_i2c;
1844 1833
1845 intel_sdvo_i2c_bit_algo.functionality = 1834 /* Wrap with our custom algo which switches to DDC mode */
1846 intel_output->i2c_bus->adapter.algo->functionality; 1835 intel_output->ddc_bus->algo = &intel_sdvo_i2c_bit_algo;
1847 ddcbus->adapter.algo = &intel_sdvo_i2c_bit_algo;
1848 intel_output->ddc_bus = ddcbus;
1849 1836
1850 /* In defaut case sdvo lvds is false */ 1837 /* In defaut case sdvo lvds is false */
1851 sdvo_priv->is_lvds = false; 1838 sdvo_priv->is_lvds = false;
@@ -1965,9 +1952,10 @@ bool intel_sdvo_init(struct drm_device *dev, int output_device)
1965 return true; 1952 return true;
1966 1953
1967err_i2c: 1954err_i2c:
1968 if (ddcbus != NULL) 1955 if (intel_output->ddc_bus != NULL)
1969 intel_i2c_destroy(intel_output->ddc_bus); 1956 intel_i2c_destroy(intel_output->ddc_bus);
1970 intel_i2c_destroy(intel_output->i2c_bus); 1957 if (intel_output->i2c_bus != NULL)
1958 intel_i2c_destroy(intel_output->i2c_bus);
1971err_inteloutput: 1959err_inteloutput:
1972 kfree(intel_output); 1960 kfree(intel_output);
1973 1961
diff --git a/drivers/gpu/drm/i915/intel_tv.c b/drivers/gpu/drm/i915/intel_tv.c
index ea68992e4416..a43c98e3f077 100644
--- a/drivers/gpu/drm/i915/intel_tv.c
+++ b/drivers/gpu/drm/i915/intel_tv.c
@@ -1383,34 +1383,31 @@ intel_tv_detect_type (struct drm_crtc *crtc, struct intel_output *intel_output)
1383 /* 1383 /*
1384 * Detect TV by polling) 1384 * Detect TV by polling)
1385 */ 1385 */
1386 if (intel_output->load_detect_temp) { 1386 save_tv_dac = tv_dac;
1387 /* TV not currently running, prod it with destructive detect */ 1387 tv_ctl = I915_READ(TV_CTL);
1388 save_tv_dac = tv_dac; 1388 save_tv_ctl = tv_ctl;
1389 tv_ctl = I915_READ(TV_CTL); 1389 tv_ctl &= ~TV_ENC_ENABLE;
1390 save_tv_ctl = tv_ctl; 1390 tv_ctl &= ~TV_TEST_MODE_MASK;
1391 tv_ctl &= ~TV_ENC_ENABLE; 1391 tv_ctl |= TV_TEST_MODE_MONITOR_DETECT;
1392 tv_ctl &= ~TV_TEST_MODE_MASK; 1392 tv_dac &= ~TVDAC_SENSE_MASK;
1393 tv_ctl |= TV_TEST_MODE_MONITOR_DETECT; 1393 tv_dac &= ~DAC_A_MASK;
1394 tv_dac &= ~TVDAC_SENSE_MASK; 1394 tv_dac &= ~DAC_B_MASK;
1395 tv_dac &= ~DAC_A_MASK; 1395 tv_dac &= ~DAC_C_MASK;
1396 tv_dac &= ~DAC_B_MASK; 1396 tv_dac |= (TVDAC_STATE_CHG_EN |
1397 tv_dac &= ~DAC_C_MASK; 1397 TVDAC_A_SENSE_CTL |
1398 tv_dac |= (TVDAC_STATE_CHG_EN | 1398 TVDAC_B_SENSE_CTL |
1399 TVDAC_A_SENSE_CTL | 1399 TVDAC_C_SENSE_CTL |
1400 TVDAC_B_SENSE_CTL | 1400 DAC_CTL_OVERRIDE |
1401 TVDAC_C_SENSE_CTL | 1401 DAC_A_0_7_V |
1402 DAC_CTL_OVERRIDE | 1402 DAC_B_0_7_V |
1403 DAC_A_0_7_V | 1403 DAC_C_0_7_V);
1404 DAC_B_0_7_V | 1404 I915_WRITE(TV_CTL, tv_ctl);
1405 DAC_C_0_7_V); 1405 I915_WRITE(TV_DAC, tv_dac);
1406 I915_WRITE(TV_CTL, tv_ctl); 1406 intel_wait_for_vblank(dev);
1407 I915_WRITE(TV_DAC, tv_dac); 1407 tv_dac = I915_READ(TV_DAC);
1408 intel_wait_for_vblank(dev); 1408 I915_WRITE(TV_DAC, save_tv_dac);
1409 tv_dac = I915_READ(TV_DAC); 1409 I915_WRITE(TV_CTL, save_tv_ctl);
1410 I915_WRITE(TV_DAC, save_tv_dac); 1410 intel_wait_for_vblank(dev);
1411 I915_WRITE(TV_CTL, save_tv_ctl);
1412 intel_wait_for_vblank(dev);
1413 }
1414 /* 1411 /*
1415 * A B C 1412 * A B C
1416 * 0 1 1 Composite 1413 * 0 1 1 Composite
diff --git a/drivers/gpu/drm/radeon/radeon_device.c b/drivers/gpu/drm/radeon/radeon_device.c
index f30aa7274a54..f97563db4e59 100644
--- a/drivers/gpu/drm/radeon/radeon_device.c
+++ b/drivers/gpu/drm/radeon/radeon_device.c
@@ -35,6 +35,23 @@
35#include "atom.h" 35#include "atom.h"
36 36
37/* 37/*
38 * Clear GPU surface registers.
39 */
40static void radeon_surface_init(struct radeon_device *rdev)
41{
42 /* FIXME: check this out */
43 if (rdev->family < CHIP_R600) {
44 int i;
45
46 for (i = 0; i < 8; i++) {
47 WREG32(RADEON_SURFACE0_INFO +
48 i * (RADEON_SURFACE1_INFO - RADEON_SURFACE0_INFO),
49 0);
50 }
51 }
52}
53
54/*
38 * GPU scratch registers helpers function. 55 * GPU scratch registers helpers function.
39 */ 56 */
40static void radeon_scratch_init(struct radeon_device *rdev) 57static void radeon_scratch_init(struct radeon_device *rdev)
@@ -496,6 +513,8 @@ int radeon_device_init(struct radeon_device *rdev,
496 radeon_errata(rdev); 513 radeon_errata(rdev);
497 /* Initialize scratch registers */ 514 /* Initialize scratch registers */
498 radeon_scratch_init(rdev); 515 radeon_scratch_init(rdev);
516 /* Initialize surface registers */
517 radeon_surface_init(rdev);
499 518
500 /* TODO: disable VGA need to use VGA request */ 519 /* TODO: disable VGA need to use VGA request */
501 /* BIOS*/ 520 /* BIOS*/
@@ -604,9 +623,6 @@ int radeon_device_init(struct radeon_device *rdev,
604 if (r) { 623 if (r) {
605 return r; 624 return r;
606 } 625 }
607 if (rdev->fbdev_rfb && rdev->fbdev_rfb->obj) {
608 rdev->fbdev_robj = rdev->fbdev_rfb->obj->driver_private;
609 }
610 if (!ret) { 626 if (!ret) {
611 DRM_INFO("radeon: kernel modesetting successfully initialized.\n"); 627 DRM_INFO("radeon: kernel modesetting successfully initialized.\n");
612 } 628 }
diff --git a/drivers/gpu/drm/radeon/radeon_drv.c b/drivers/gpu/drm/radeon/radeon_drv.c
index 09c9fb9f6210..84ba69f48784 100644
--- a/drivers/gpu/drm/radeon/radeon_drv.c
+++ b/drivers/gpu/drm/radeon/radeon_drv.c
@@ -345,7 +345,7 @@ static void __exit radeon_exit(void)
345 drm_exit(driver); 345 drm_exit(driver);
346} 346}
347 347
348late_initcall(radeon_init); 348module_init(radeon_init);
349module_exit(radeon_exit); 349module_exit(radeon_exit);
350 350
351MODULE_AUTHOR(DRIVER_AUTHOR); 351MODULE_AUTHOR(DRIVER_AUTHOR);
diff --git a/drivers/gpu/drm/radeon/radeon_fb.c b/drivers/gpu/drm/radeon/radeon_fb.c
index fa86d398945e..9e8f191eb64a 100644
--- a/drivers/gpu/drm/radeon/radeon_fb.c
+++ b/drivers/gpu/drm/radeon/radeon_fb.c
@@ -478,14 +478,16 @@ int radeonfb_create(struct radeon_device *rdev,
478{ 478{
479 struct fb_info *info; 479 struct fb_info *info;
480 struct radeon_fb_device *rfbdev; 480 struct radeon_fb_device *rfbdev;
481 struct drm_framebuffer *fb; 481 struct drm_framebuffer *fb = NULL;
482 struct radeon_framebuffer *rfb; 482 struct radeon_framebuffer *rfb;
483 struct drm_mode_fb_cmd mode_cmd; 483 struct drm_mode_fb_cmd mode_cmd;
484 struct drm_gem_object *gobj = NULL; 484 struct drm_gem_object *gobj = NULL;
485 struct radeon_object *robj = NULL; 485 struct radeon_object *robj = NULL;
486 struct device *device = &rdev->pdev->dev; 486 struct device *device = &rdev->pdev->dev;
487 int size, aligned_size, ret; 487 int size, aligned_size, ret;
488 u64 fb_gpuaddr;
488 void *fbptr = NULL; 489 void *fbptr = NULL;
490 unsigned long tmp;
489 491
490 mode_cmd.width = surface_width; 492 mode_cmd.width = surface_width;
491 mode_cmd.height = surface_height; 493 mode_cmd.height = surface_height;
@@ -498,11 +500,12 @@ int radeonfb_create(struct radeon_device *rdev,
498 aligned_size = ALIGN(size, PAGE_SIZE); 500 aligned_size = ALIGN(size, PAGE_SIZE);
499 501
500 ret = radeon_gem_object_create(rdev, aligned_size, 0, 502 ret = radeon_gem_object_create(rdev, aligned_size, 0,
501 RADEON_GEM_DOMAIN_VRAM, 503 RADEON_GEM_DOMAIN_VRAM,
502 false, ttm_bo_type_kernel, 504 false, ttm_bo_type_kernel,
503 false, &gobj); 505 false, &gobj);
504 if (ret) { 506 if (ret) {
505 printk(KERN_ERR "failed to allocate framebuffer\n"); 507 printk(KERN_ERR "failed to allocate framebuffer (%d %d)\n",
508 surface_width, surface_height);
506 ret = -ENOMEM; 509 ret = -ENOMEM;
507 goto out; 510 goto out;
508 } 511 }
@@ -515,12 +518,19 @@ int radeonfb_create(struct radeon_device *rdev,
515 ret = -ENOMEM; 518 ret = -ENOMEM;
516 goto out_unref; 519 goto out_unref;
517 } 520 }
521 ret = radeon_object_pin(robj, RADEON_GEM_DOMAIN_VRAM, &fb_gpuaddr);
522 if (ret) {
523 printk(KERN_ERR "failed to pin framebuffer\n");
524 ret = -ENOMEM;
525 goto out_unref;
526 }
518 527
519 list_add(&fb->filp_head, &rdev->ddev->mode_config.fb_kernel_list); 528 list_add(&fb->filp_head, &rdev->ddev->mode_config.fb_kernel_list);
520 529
521 rfb = to_radeon_framebuffer(fb); 530 rfb = to_radeon_framebuffer(fb);
522 *rfb_p = rfb; 531 *rfb_p = rfb;
523 rdev->fbdev_rfb = rfb; 532 rdev->fbdev_rfb = rfb;
533 rdev->fbdev_robj = robj;
524 534
525 info = framebuffer_alloc(sizeof(struct radeon_fb_device), device); 535 info = framebuffer_alloc(sizeof(struct radeon_fb_device), device);
526 if (info == NULL) { 536 if (info == NULL) {
@@ -541,13 +551,13 @@ int radeonfb_create(struct radeon_device *rdev,
541 info->fix.xpanstep = 1; /* doing it in hw */ 551 info->fix.xpanstep = 1; /* doing it in hw */
542 info->fix.ypanstep = 1; /* doing it in hw */ 552 info->fix.ypanstep = 1; /* doing it in hw */
543 info->fix.ywrapstep = 0; 553 info->fix.ywrapstep = 0;
544 info->fix.accel = FB_ACCEL_I830; 554 info->fix.accel = FB_ACCEL_NONE;
545 info->fix.type_aux = 0; 555 info->fix.type_aux = 0;
546 info->flags = FBINFO_DEFAULT; 556 info->flags = FBINFO_DEFAULT;
547 info->fbops = &radeonfb_ops; 557 info->fbops = &radeonfb_ops;
548 info->fix.line_length = fb->pitch; 558 info->fix.line_length = fb->pitch;
549 info->screen_base = fbptr; 559 tmp = fb_gpuaddr - rdev->mc.vram_location;
550 info->fix.smem_start = (unsigned long)fbptr; 560 info->fix.smem_start = rdev->mc.aper_base + tmp;
551 info->fix.smem_len = size; 561 info->fix.smem_len = size;
552 info->screen_base = fbptr; 562 info->screen_base = fbptr;
553 info->screen_size = size; 563 info->screen_size = size;
@@ -562,8 +572,8 @@ int radeonfb_create(struct radeon_device *rdev,
562 info->var.width = -1; 572 info->var.width = -1;
563 info->var.xres = fb_width; 573 info->var.xres = fb_width;
564 info->var.yres = fb_height; 574 info->var.yres = fb_height;
565 info->fix.mmio_start = pci_resource_start(rdev->pdev, 2); 575 info->fix.mmio_start = 0;
566 info->fix.mmio_len = pci_resource_len(rdev->pdev, 2); 576 info->fix.mmio_len = 0;
567 info->pixmap.size = 64*1024; 577 info->pixmap.size = 64*1024;
568 info->pixmap.buf_align = 8; 578 info->pixmap.buf_align = 8;
569 info->pixmap.access_align = 32; 579 info->pixmap.access_align = 32;
@@ -644,7 +654,7 @@ out_unref:
644 if (robj) { 654 if (robj) {
645 radeon_object_kunmap(robj); 655 radeon_object_kunmap(robj);
646 } 656 }
647 if (ret) { 657 if (fb && ret) {
648 list_del(&fb->filp_head); 658 list_del(&fb->filp_head);
649 drm_gem_object_unreference(gobj); 659 drm_gem_object_unreference(gobj);
650 drm_framebuffer_cleanup(fb); 660 drm_framebuffer_cleanup(fb);
@@ -813,6 +823,7 @@ int radeonfb_remove(struct drm_device *dev, struct drm_framebuffer *fb)
813 robj = rfb->obj->driver_private; 823 robj = rfb->obj->driver_private;
814 unregister_framebuffer(info); 824 unregister_framebuffer(info);
815 radeon_object_kunmap(robj); 825 radeon_object_kunmap(robj);
826 radeon_object_unpin(robj);
816 framebuffer_release(info); 827 framebuffer_release(info);
817 } 828 }
818 829
diff --git a/drivers/gpu/drm/radeon/radeon_object.c b/drivers/gpu/drm/radeon/radeon_object.c
index 983e8df5e000..bac0d06c52ac 100644
--- a/drivers/gpu/drm/radeon/radeon_object.c
+++ b/drivers/gpu/drm/radeon/radeon_object.c
@@ -223,7 +223,6 @@ int radeon_object_pin(struct radeon_object *robj, uint32_t domain,
223{ 223{
224 uint32_t flags; 224 uint32_t flags;
225 uint32_t tmp; 225 uint32_t tmp;
226 void *fbptr;
227 int r; 226 int r;
228 227
229 flags = radeon_object_flags_from_domain(domain); 228 flags = radeon_object_flags_from_domain(domain);
@@ -242,10 +241,6 @@ int radeon_object_pin(struct radeon_object *robj, uint32_t domain,
242 DRM_ERROR("radeon: failed to reserve object for pinning it.\n"); 241 DRM_ERROR("radeon: failed to reserve object for pinning it.\n");
243 return r; 242 return r;
244 } 243 }
245 if (robj->rdev->fbdev_robj == robj) {
246 mutex_lock(&robj->rdev->fbdev_info->lock);
247 radeon_object_kunmap(robj);
248 }
249 tmp = robj->tobj.mem.placement; 244 tmp = robj->tobj.mem.placement;
250 ttm_flag_masked(&tmp, flags, TTM_PL_MASK_MEM); 245 ttm_flag_masked(&tmp, flags, TTM_PL_MASK_MEM);
251 robj->tobj.proposed_placement = tmp | TTM_PL_FLAG_NO_EVICT | TTM_PL_MASK_CACHING; 246 robj->tobj.proposed_placement = tmp | TTM_PL_FLAG_NO_EVICT | TTM_PL_MASK_CACHING;
@@ -261,23 +256,12 @@ int radeon_object_pin(struct radeon_object *robj, uint32_t domain,
261 DRM_ERROR("radeon: failed to pin object.\n"); 256 DRM_ERROR("radeon: failed to pin object.\n");
262 } 257 }
263 radeon_object_unreserve(robj); 258 radeon_object_unreserve(robj);
264 if (robj->rdev->fbdev_robj == robj) {
265 if (!r) {
266 r = radeon_object_kmap(robj, &fbptr);
267 }
268 if (!r) {
269 robj->rdev->fbdev_info->screen_base = fbptr;
270 robj->rdev->fbdev_info->fix.smem_start = (unsigned long)fbptr;
271 }
272 mutex_unlock(&robj->rdev->fbdev_info->lock);
273 }
274 return r; 259 return r;
275} 260}
276 261
277void radeon_object_unpin(struct radeon_object *robj) 262void radeon_object_unpin(struct radeon_object *robj)
278{ 263{
279 uint32_t flags; 264 uint32_t flags;
280 void *fbptr;
281 int r; 265 int r;
282 266
283 spin_lock(&robj->tobj.lock); 267 spin_lock(&robj->tobj.lock);
@@ -297,10 +281,6 @@ void radeon_object_unpin(struct radeon_object *robj)
297 DRM_ERROR("radeon: failed to reserve object for unpinning it.\n"); 281 DRM_ERROR("radeon: failed to reserve object for unpinning it.\n");
298 return; 282 return;
299 } 283 }
300 if (robj->rdev->fbdev_robj == robj) {
301 mutex_lock(&robj->rdev->fbdev_info->lock);
302 radeon_object_kunmap(robj);
303 }
304 flags = robj->tobj.mem.placement; 284 flags = robj->tobj.mem.placement;
305 robj->tobj.proposed_placement = flags & ~TTM_PL_FLAG_NO_EVICT; 285 robj->tobj.proposed_placement = flags & ~TTM_PL_FLAG_NO_EVICT;
306 r = ttm_buffer_object_validate(&robj->tobj, 286 r = ttm_buffer_object_validate(&robj->tobj,
@@ -310,16 +290,6 @@ void radeon_object_unpin(struct radeon_object *robj)
310 DRM_ERROR("radeon: failed to unpin buffer.\n"); 290 DRM_ERROR("radeon: failed to unpin buffer.\n");
311 } 291 }
312 radeon_object_unreserve(robj); 292 radeon_object_unreserve(robj);
313 if (robj->rdev->fbdev_robj == robj) {
314 if (!r) {
315 r = radeon_object_kmap(robj, &fbptr);
316 }
317 if (!r) {
318 robj->rdev->fbdev_info->screen_base = fbptr;
319 robj->rdev->fbdev_info->fix.smem_start = (unsigned long)fbptr;
320 }
321 mutex_unlock(&robj->rdev->fbdev_info->lock);
322 }
323} 293}
324 294
325int radeon_object_wait(struct radeon_object *robj) 295int radeon_object_wait(struct radeon_object *robj)
diff --git a/drivers/gpu/drm/ttm/ttm_bo_util.c b/drivers/gpu/drm/ttm/ttm_bo_util.c
index 517c84559633..bdec583901eb 100644
--- a/drivers/gpu/drm/ttm/ttm_bo_util.c
+++ b/drivers/gpu/drm/ttm/ttm_bo_util.c
@@ -34,7 +34,6 @@
34#include <linux/highmem.h> 34#include <linux/highmem.h>
35#include <linux/wait.h> 35#include <linux/wait.h>
36#include <linux/vmalloc.h> 36#include <linux/vmalloc.h>
37#include <linux/version.h>
38#include <linux/module.h> 37#include <linux/module.h>
39 38
40void ttm_bo_free_old_node(struct ttm_buffer_object *bo) 39void ttm_bo_free_old_node(struct ttm_buffer_object *bo)
diff --git a/drivers/gpu/drm/ttm/ttm_bo_vm.c b/drivers/gpu/drm/ttm/ttm_bo_vm.c
index 27b146c54fbc..40b75032ea47 100644
--- a/drivers/gpu/drm/ttm/ttm_bo_vm.c
+++ b/drivers/gpu/drm/ttm/ttm_bo_vm.c
@@ -32,7 +32,6 @@
32#include <ttm/ttm_bo_driver.h> 32#include <ttm/ttm_bo_driver.h>
33#include <ttm/ttm_placement.h> 33#include <ttm/ttm_placement.h>
34#include <linux/mm.h> 34#include <linux/mm.h>
35#include <linux/version.h>
36#include <linux/rbtree.h> 35#include <linux/rbtree.h>
37#include <linux/module.h> 36#include <linux/module.h>
38#include <linux/uaccess.h> 37#include <linux/uaccess.h>
diff --git a/drivers/gpu/drm/ttm/ttm_tt.c b/drivers/gpu/drm/ttm/ttm_tt.c
index 0331fa74cd3f..75dc8bd24592 100644
--- a/drivers/gpu/drm/ttm/ttm_tt.c
+++ b/drivers/gpu/drm/ttm/ttm_tt.c
@@ -28,7 +28,6 @@
28 * Authors: Thomas Hellstrom <thellstrom-at-vmware-dot-com> 28 * Authors: Thomas Hellstrom <thellstrom-at-vmware-dot-com>
29 */ 29 */
30 30
31#include <linux/version.h>
32#include <linux/vmalloc.h> 31#include <linux/vmalloc.h>
33#include <linux/sched.h> 32#include <linux/sched.h>
34#include <linux/highmem.h> 33#include <linux/highmem.h>
diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig
index aa87b6a3bbef..8206442fbabd 100644
--- a/drivers/i2c/busses/Kconfig
+++ b/drivers/i2c/busses/Kconfig
@@ -328,6 +328,7 @@ config I2C_DAVINCI
328 328
329config I2C_DESIGNWARE 329config I2C_DESIGNWARE
330 tristate "Synopsys DesignWare" 330 tristate "Synopsys DesignWare"
331 depends on HAVE_CLK
331 help 332 help
332 If you say yes to this option, support will be included for the 333 If you say yes to this option, support will be included for the
333 Synopsys DesignWare I2C adapter. Only master mode is supported. 334 Synopsys DesignWare I2C adapter. Only master mode is supported.
diff --git a/drivers/ide/cs5520.c b/drivers/ide/cs5520.c
index bd066bb9d611..09f98ed0731f 100644
--- a/drivers/ide/cs5520.c
+++ b/drivers/ide/cs5520.c
@@ -135,6 +135,7 @@ static int __devinit cs5520_init_one(struct pci_dev *dev, const struct pci_devic
135 135
136 ide_pci_setup_ports(dev, d, &hw[0], &hws[0]); 136 ide_pci_setup_ports(dev, d, &hw[0], &hws[0]);
137 hw[0].irq = 14; 137 hw[0].irq = 14;
138 hw[1].irq = 15;
138 139
139 return ide_host_add(d, hws, 2, NULL); 140 return ide_host_add(d, hws, 2, NULL);
140} 141}
diff --git a/drivers/ide/ide-cd.c b/drivers/ide/ide-cd.c
index 4a19686fcfe9..f0ede5953af8 100644
--- a/drivers/ide/ide-cd.c
+++ b/drivers/ide/ide-cd.c
@@ -876,9 +876,12 @@ static int cdrom_read_capacity(ide_drive_t *drive, unsigned long *capacity,
876 return stat; 876 return stat;
877 877
878 /* 878 /*
879 * Sanity check the given block size 879 * Sanity check the given block size, in so far as making
880 * sure the sectors_per_frame we give to the caller won't
881 * end up being bogus.
880 */ 882 */
881 blocklen = be32_to_cpu(capbuf.blocklen); 883 blocklen = be32_to_cpu(capbuf.blocklen);
884 blocklen = (blocklen >> SECTOR_BITS) << SECTOR_BITS;
882 switch (blocklen) { 885 switch (blocklen) {
883 case 512: 886 case 512:
884 case 1024: 887 case 1024:
@@ -886,10 +889,9 @@ static int cdrom_read_capacity(ide_drive_t *drive, unsigned long *capacity,
886 case 4096: 889 case 4096:
887 break; 890 break;
888 default: 891 default:
889 printk(KERN_ERR PFX "%s: weird block size %u\n", 892 printk_once(KERN_ERR PFX "%s: weird block size %u; "
893 "setting default block size to 2048\n",
890 drive->name, blocklen); 894 drive->name, blocklen);
891 printk(KERN_ERR PFX "%s: default to 2kb block size\n",
892 drive->name);
893 blocklen = 2048; 895 blocklen = 2048;
894 break; 896 break;
895 } 897 }
diff --git a/drivers/ide/ide-dma.c b/drivers/ide/ide-dma.c
index 219e6fb78dc6..ee58c88dee5a 100644
--- a/drivers/ide/ide-dma.c
+++ b/drivers/ide/ide-dma.c
@@ -361,9 +361,6 @@ static int ide_tune_dma(ide_drive_t *drive)
361 if (__ide_dma_bad_drive(drive)) 361 if (__ide_dma_bad_drive(drive))
362 return 0; 362 return 0;
363 363
364 if (ide_id_dma_bug(drive))
365 return 0;
366
367 if (hwif->host_flags & IDE_HFLAG_TRUST_BIOS_FOR_DMA) 364 if (hwif->host_flags & IDE_HFLAG_TRUST_BIOS_FOR_DMA)
368 return config_drive_for_dma(drive); 365 return config_drive_for_dma(drive);
369 366
@@ -394,24 +391,6 @@ static int ide_dma_check(ide_drive_t *drive)
394 return -1; 391 return -1;
395} 392}
396 393
397int ide_id_dma_bug(ide_drive_t *drive)
398{
399 u16 *id = drive->id;
400
401 if (id[ATA_ID_FIELD_VALID] & 4) {
402 if ((id[ATA_ID_UDMA_MODES] >> 8) &&
403 (id[ATA_ID_MWDMA_MODES] >> 8))
404 goto err_out;
405 } else if ((id[ATA_ID_MWDMA_MODES] >> 8) &&
406 (id[ATA_ID_SWDMA_MODES] >> 8))
407 goto err_out;
408
409 return 0;
410err_out:
411 printk(KERN_ERR "%s: bad DMA info in identify block\n", drive->name);
412 return 1;
413}
414
415int ide_set_dma(ide_drive_t *drive) 394int ide_set_dma(ide_drive_t *drive)
416{ 395{
417 int rc; 396 int rc;
diff --git a/drivers/ide/ide-io.c b/drivers/ide/ide-io.c
index 1059f809b809..93b7886a2d6e 100644
--- a/drivers/ide/ide-io.c
+++ b/drivers/ide/ide-io.c
@@ -476,10 +476,14 @@ void do_ide_request(struct request_queue *q)
476 476
477 if (!ide_lock_port(hwif)) { 477 if (!ide_lock_port(hwif)) {
478 ide_hwif_t *prev_port; 478 ide_hwif_t *prev_port;
479
480 WARN_ON_ONCE(hwif->rq);
481repeat: 479repeat:
482 prev_port = hwif->host->cur_port; 480 prev_port = hwif->host->cur_port;
481
482 if (drive->dev_flags & IDE_DFLAG_BLOCKED)
483 rq = hwif->rq;
484 else
485 WARN_ON_ONCE(hwif->rq);
486
483 if (drive->dev_flags & IDE_DFLAG_SLEEPING && 487 if (drive->dev_flags & IDE_DFLAG_SLEEPING &&
484 time_after(drive->sleep, jiffies)) { 488 time_after(drive->sleep, jiffies)) {
485 ide_unlock_port(hwif); 489 ide_unlock_port(hwif);
@@ -506,43 +510,29 @@ repeat:
506 hwif->cur_dev = drive; 510 hwif->cur_dev = drive;
507 drive->dev_flags &= ~(IDE_DFLAG_SLEEPING | IDE_DFLAG_PARKED); 511 drive->dev_flags &= ~(IDE_DFLAG_SLEEPING | IDE_DFLAG_PARKED);
508 512
509 spin_unlock_irq(&hwif->lock); 513 if (rq == NULL) {
510 spin_lock_irq(q->queue_lock); 514 spin_unlock_irq(&hwif->lock);
511 /* 515 spin_lock_irq(q->queue_lock);
512 * we know that the queue isn't empty, but this can happen 516 /*
513 * if the q->prep_rq_fn() decides to kill a request 517 * we know that the queue isn't empty, but this can
514 */ 518 * happen if ->prep_rq_fn() decides to kill a request
515 if (!rq) 519 */
516 rq = blk_fetch_request(drive->queue); 520 rq = blk_fetch_request(drive->queue);
521 spin_unlock_irq(q->queue_lock);
522 spin_lock_irq(&hwif->lock);
517 523
518 spin_unlock_irq(q->queue_lock); 524 if (rq == NULL) {
519 spin_lock_irq(&hwif->lock); 525 ide_unlock_port(hwif);
520 526 goto out;
521 if (!rq) { 527 }
522 ide_unlock_port(hwif);
523 goto out;
524 } 528 }
525 529
526 /* 530 /*
527 * Sanity: don't accept a request that isn't a PM request 531 * Sanity: don't accept a request that isn't a PM request
528 * if we are currently power managed. This is very important as 532 * if we are currently power managed.
529 * blk_stop_queue() doesn't prevent the blk_fetch_request()
530 * above to return us whatever is in the queue. Since we call
531 * ide_do_request() ourselves, we end up taking requests while
532 * the queue is blocked...
533 *
534 * We let requests forced at head of queue with ide-preempt
535 * though. I hope that doesn't happen too much, hopefully not
536 * unless the subdriver triggers such a thing in its own PM
537 * state machine.
538 */ 533 */
539 if ((drive->dev_flags & IDE_DFLAG_BLOCKED) && 534 BUG_ON((drive->dev_flags & IDE_DFLAG_BLOCKED) &&
540 blk_pm_request(rq) == 0 && 535 blk_pm_request(rq) == 0);
541 (rq->cmd_flags & REQ_PREEMPT) == 0) {
542 /* there should be no pending command at this point */
543 ide_unlock_port(hwif);
544 goto plug_device;
545 }
546 536
547 hwif->rq = rq; 537 hwif->rq = rq;
548 538
diff --git a/drivers/ide/ide-iops.c b/drivers/ide/ide-iops.c
index fa047150a1c6..2892b242bbe1 100644
--- a/drivers/ide/ide-iops.c
+++ b/drivers/ide/ide-iops.c
@@ -210,6 +210,7 @@ EXPORT_SYMBOL_GPL(ide_in_drive_list);
210 */ 210 */
211static const struct drive_list_entry ivb_list[] = { 211static const struct drive_list_entry ivb_list[] = {
212 { "QUANTUM FIREBALLlct10 05" , "A03.0900" }, 212 { "QUANTUM FIREBALLlct10 05" , "A03.0900" },
213 { "QUANTUM FIREBALLlct20 30" , "APL.0900" },
213 { "TSSTcorp CDDVDW SH-S202J" , "SB00" }, 214 { "TSSTcorp CDDVDW SH-S202J" , "SB00" },
214 { "TSSTcorp CDDVDW SH-S202J" , "SB01" }, 215 { "TSSTcorp CDDVDW SH-S202J" , "SB01" },
215 { "TSSTcorp CDDVDW SH-S202N" , "SB00" }, 216 { "TSSTcorp CDDVDW SH-S202N" , "SB00" },
@@ -329,9 +330,6 @@ int ide_driveid_update(ide_drive_t *drive)
329 330
330 kfree(id); 331 kfree(id);
331 332
332 if ((drive->dev_flags & IDE_DFLAG_USING_DMA) && ide_id_dma_bug(drive))
333 ide_dma_off(drive);
334
335 return 1; 333 return 1;
336out_err: 334out_err:
337 if (rc == 2) 335 if (rc == 2)
diff --git a/drivers/ide/ide-probe.c b/drivers/ide/ide-probe.c
index 51af4eea0d36..1bb106f6221a 100644
--- a/drivers/ide/ide-probe.c
+++ b/drivers/ide/ide-probe.c
@@ -818,6 +818,24 @@ static int ide_port_setup_devices(ide_hwif_t *hwif)
818 return j; 818 return j;
819} 819}
820 820
821static void ide_host_enable_irqs(struct ide_host *host)
822{
823 ide_hwif_t *hwif;
824 int i;
825
826 ide_host_for_each_port(i, hwif, host) {
827 if (hwif == NULL)
828 continue;
829
830 /* clear any pending IRQs */
831 hwif->tp_ops->read_status(hwif);
832
833 /* unmask IRQs */
834 if (hwif->io_ports.ctl_addr)
835 hwif->tp_ops->write_devctl(hwif, ATA_DEVCTL_OBS);
836 }
837}
838
821/* 839/*
822 * This routine sets up the IRQ for an IDE interface. 840 * This routine sets up the IRQ for an IDE interface.
823 */ 841 */
@@ -831,9 +849,6 @@ static int init_irq (ide_hwif_t *hwif)
831 if (irq_handler == NULL) 849 if (irq_handler == NULL)
832 irq_handler = ide_intr; 850 irq_handler = ide_intr;
833 851
834 if (io_ports->ctl_addr)
835 hwif->tp_ops->write_devctl(hwif, ATA_DEVCTL_OBS);
836
837 if (request_irq(hwif->irq, irq_handler, sa, hwif->name, hwif)) 852 if (request_irq(hwif->irq, irq_handler, sa, hwif->name, hwif))
838 goto out_up; 853 goto out_up;
839 854
@@ -1404,6 +1419,8 @@ int ide_host_register(struct ide_host *host, const struct ide_port_info *d,
1404 ide_port_tune_devices(hwif); 1419 ide_port_tune_devices(hwif);
1405 } 1420 }
1406 1421
1422 ide_host_enable_irqs(host);
1423
1407 ide_host_for_each_port(i, hwif, host) { 1424 ide_host_for_each_port(i, hwif, host) {
1408 if (hwif == NULL) 1425 if (hwif == NULL)
1409 continue; 1426 continue;
diff --git a/drivers/usb/class/cdc-acm.c b/drivers/usb/class/cdc-acm.c
index 38bfdb0f6660..3f1045993474 100644
--- a/drivers/usb/class/cdc-acm.c
+++ b/drivers/usb/class/cdc-acm.c
@@ -550,7 +550,7 @@ static void acm_waker(struct work_struct *waker)
550static int acm_tty_open(struct tty_struct *tty, struct file *filp) 550static int acm_tty_open(struct tty_struct *tty, struct file *filp)
551{ 551{
552 struct acm *acm; 552 struct acm *acm;
553 int rv = -EINVAL; 553 int rv = -ENODEV;
554 int i; 554 int i;
555 dbg("Entering acm_tty_open."); 555 dbg("Entering acm_tty_open.");
556 556
@@ -677,7 +677,7 @@ static void acm_tty_close(struct tty_struct *tty, struct file *filp)
677 677
678 /* Perform the closing process and see if we need to do the hardware 678 /* Perform the closing process and see if we need to do the hardware
679 shutdown */ 679 shutdown */
680 if (tty_port_close_start(&acm->port, tty, filp) == 0) 680 if (!acm || tty_port_close_start(&acm->port, tty, filp) == 0)
681 return; 681 return;
682 acm_port_down(acm, 0); 682 acm_port_down(acm, 0);
683 tty_port_close_end(&acm->port, tty); 683 tty_port_close_end(&acm->port, tty);
diff --git a/drivers/usb/serial/usb-serial.c b/drivers/usb/serial/usb-serial.c
index d595aa5586a7..a84216464ca0 100644
--- a/drivers/usb/serial/usb-serial.c
+++ b/drivers/usb/serial/usb-serial.c
@@ -333,6 +333,9 @@ static void serial_close(struct tty_struct *tty, struct file *filp)
333{ 333{
334 struct usb_serial_port *port = tty->driver_data; 334 struct usb_serial_port *port = tty->driver_data;
335 335
336 if (!port)
337 return;
338
336 dbg("%s - port %d", __func__, port->number); 339 dbg("%s - port %d", __func__, port->number);
337 340
338 341
diff --git a/fs/cifs/CHANGES b/fs/cifs/CHANGES
index b48689839428..3a9b7a58a51d 100644
--- a/fs/cifs/CHANGES
+++ b/fs/cifs/CHANGES
@@ -5,7 +5,7 @@ client generated ones by default (mount option "serverino" turned
5on by default if server supports it). Add forceuid and forcegid 5on by default if server supports it). Add forceuid and forcegid
6mount options (so that when negotiating unix extensions specifying 6mount options (so that when negotiating unix extensions specifying
7which uid mounted does not immediately force the server's reported 7which uid mounted does not immediately force the server's reported
8uids to be overridden). 8uids to be overridden). Add support for scope moutn parm.
9 9
10Version 1.58 10Version 1.58
11------------ 11------------
diff --git a/fs/cifs/asn1.c b/fs/cifs/asn1.c
index 1b09f1670061..20692fbfdb24 100644
--- a/fs/cifs/asn1.c
+++ b/fs/cifs/asn1.c
@@ -49,6 +49,7 @@
49#define ASN1_OJI 6 /* Object Identifier */ 49#define ASN1_OJI 6 /* Object Identifier */
50#define ASN1_OJD 7 /* Object Description */ 50#define ASN1_OJD 7 /* Object Description */
51#define ASN1_EXT 8 /* External */ 51#define ASN1_EXT 8 /* External */
52#define ASN1_ENUM 10 /* Enumerated */
52#define ASN1_SEQ 16 /* Sequence */ 53#define ASN1_SEQ 16 /* Sequence */
53#define ASN1_SET 17 /* Set */ 54#define ASN1_SET 17 /* Set */
54#define ASN1_NUMSTR 18 /* Numerical String */ 55#define ASN1_NUMSTR 18 /* Numerical String */
@@ -78,10 +79,12 @@
78#define SPNEGO_OID_LEN 7 79#define SPNEGO_OID_LEN 7
79#define NTLMSSP_OID_LEN 10 80#define NTLMSSP_OID_LEN 10
80#define KRB5_OID_LEN 7 81#define KRB5_OID_LEN 7
82#define KRB5U2U_OID_LEN 8
81#define MSKRB5_OID_LEN 7 83#define MSKRB5_OID_LEN 7
82static unsigned long SPNEGO_OID[7] = { 1, 3, 6, 1, 5, 5, 2 }; 84static unsigned long SPNEGO_OID[7] = { 1, 3, 6, 1, 5, 5, 2 };
83static unsigned long NTLMSSP_OID[10] = { 1, 3, 6, 1, 4, 1, 311, 2, 2, 10 }; 85static unsigned long NTLMSSP_OID[10] = { 1, 3, 6, 1, 4, 1, 311, 2, 2, 10 };
84static unsigned long KRB5_OID[7] = { 1, 2, 840, 113554, 1, 2, 2 }; 86static unsigned long KRB5_OID[7] = { 1, 2, 840, 113554, 1, 2, 2 };
87static unsigned long KRB5U2U_OID[8] = { 1, 2, 840, 113554, 1, 2, 2, 3 };
85static unsigned long MSKRB5_OID[7] = { 1, 2, 840, 48018, 1, 2, 2 }; 88static unsigned long MSKRB5_OID[7] = { 1, 2, 840, 48018, 1, 2, 2 };
86 89
87/* 90/*
@@ -122,6 +125,28 @@ asn1_octet_decode(struct asn1_ctx *ctx, unsigned char *ch)
122 return 1; 125 return 1;
123} 126}
124 127
128#if 0 /* will be needed later by spnego decoding/encoding of ntlmssp */
129static unsigned char
130asn1_enum_decode(struct asn1_ctx *ctx, __le32 *val)
131{
132 unsigned char ch;
133
134 if (ctx->pointer >= ctx->end) {
135 ctx->error = ASN1_ERR_DEC_EMPTY;
136 return 0;
137 }
138
139 ch = *(ctx->pointer)++; /* ch has 0xa, ptr points to lenght octet */
140 if ((ch) == ASN1_ENUM) /* if ch value is ENUM, 0xa */
141 *val = *(++(ctx->pointer)); /* value has enum value */
142 else
143 return 0;
144
145 ctx->pointer++;
146 return 1;
147}
148#endif
149
125static unsigned char 150static unsigned char
126asn1_tag_decode(struct asn1_ctx *ctx, unsigned int *tag) 151asn1_tag_decode(struct asn1_ctx *ctx, unsigned int *tag)
127{ 152{
@@ -476,10 +501,9 @@ decode_negTokenInit(unsigned char *security_blob, int length,
476 unsigned int cls, con, tag, oidlen, rc; 501 unsigned int cls, con, tag, oidlen, rc;
477 bool use_ntlmssp = false; 502 bool use_ntlmssp = false;
478 bool use_kerberos = false; 503 bool use_kerberos = false;
504 bool use_kerberosu2u = false;
479 bool use_mskerberos = false; 505 bool use_mskerberos = false;
480 506
481 *secType = NTLM; /* BB eventually make Kerberos or NLTMSSP the default*/
482
483 /* cifs_dump_mem(" Received SecBlob ", security_blob, length); */ 507 /* cifs_dump_mem(" Received SecBlob ", security_blob, length); */
484 508
485 asn1_open(&ctx, security_blob, length); 509 asn1_open(&ctx, security_blob, length);
@@ -515,6 +539,7 @@ decode_negTokenInit(unsigned char *security_blob, int length,
515 return 0; 539 return 0;
516 } 540 }
517 541
542 /* SPNEGO */
518 if (asn1_header_decode(&ctx, &end, &cls, &con, &tag) == 0) { 543 if (asn1_header_decode(&ctx, &end, &cls, &con, &tag) == 0) {
519 cFYI(1, ("Error decoding negTokenInit")); 544 cFYI(1, ("Error decoding negTokenInit"));
520 return 0; 545 return 0;
@@ -526,6 +551,7 @@ decode_negTokenInit(unsigned char *security_blob, int length,
526 return 0; 551 return 0;
527 } 552 }
528 553
554 /* negTokenInit */
529 if (asn1_header_decode(&ctx, &end, &cls, &con, &tag) == 0) { 555 if (asn1_header_decode(&ctx, &end, &cls, &con, &tag) == 0) {
530 cFYI(1, ("Error decoding negTokenInit")); 556 cFYI(1, ("Error decoding negTokenInit"));
531 return 0; 557 return 0;
@@ -537,6 +563,7 @@ decode_negTokenInit(unsigned char *security_blob, int length,
537 return 0; 563 return 0;
538 } 564 }
539 565
566 /* sequence */
540 if (asn1_header_decode(&ctx, &end, &cls, &con, &tag) == 0) { 567 if (asn1_header_decode(&ctx, &end, &cls, &con, &tag) == 0) {
541 cFYI(1, ("Error decoding 2nd part of negTokenInit")); 568 cFYI(1, ("Error decoding 2nd part of negTokenInit"));
542 return 0; 569 return 0;
@@ -548,6 +575,7 @@ decode_negTokenInit(unsigned char *security_blob, int length,
548 return 0; 575 return 0;
549 } 576 }
550 577
578 /* sequence of */
551 if (asn1_header_decode 579 if (asn1_header_decode
552 (&ctx, &sequence_end, &cls, &con, &tag) == 0) { 580 (&ctx, &sequence_end, &cls, &con, &tag) == 0) {
553 cFYI(1, ("Error decoding 2nd part of negTokenInit")); 581 cFYI(1, ("Error decoding 2nd part of negTokenInit"));
@@ -560,6 +588,7 @@ decode_negTokenInit(unsigned char *security_blob, int length,
560 return 0; 588 return 0;
561 } 589 }
562 590
591 /* list of security mechanisms */
563 while (!asn1_eoc_decode(&ctx, sequence_end)) { 592 while (!asn1_eoc_decode(&ctx, sequence_end)) {
564 rc = asn1_header_decode(&ctx, &end, &cls, &con, &tag); 593 rc = asn1_header_decode(&ctx, &end, &cls, &con, &tag);
565 if (!rc) { 594 if (!rc) {
@@ -576,11 +605,15 @@ decode_negTokenInit(unsigned char *security_blob, int length,
576 605
577 if (compare_oid(oid, oidlen, MSKRB5_OID, 606 if (compare_oid(oid, oidlen, MSKRB5_OID,
578 MSKRB5_OID_LEN) && 607 MSKRB5_OID_LEN) &&
579 !use_kerberos) 608 !use_mskerberos)
580 use_mskerberos = true; 609 use_mskerberos = true;
610 else if (compare_oid(oid, oidlen, KRB5U2U_OID,
611 KRB5U2U_OID_LEN) &&
612 !use_kerberosu2u)
613 use_kerberosu2u = true;
581 else if (compare_oid(oid, oidlen, KRB5_OID, 614 else if (compare_oid(oid, oidlen, KRB5_OID,
582 KRB5_OID_LEN) && 615 KRB5_OID_LEN) &&
583 !use_mskerberos) 616 !use_kerberos)
584 use_kerberos = true; 617 use_kerberos = true;
585 else if (compare_oid(oid, oidlen, NTLMSSP_OID, 618 else if (compare_oid(oid, oidlen, NTLMSSP_OID,
586 NTLMSSP_OID_LEN)) 619 NTLMSSP_OID_LEN))
@@ -593,7 +626,12 @@ decode_negTokenInit(unsigned char *security_blob, int length,
593 } 626 }
594 } 627 }
595 628
629 /* mechlistMIC */
596 if (asn1_header_decode(&ctx, &end, &cls, &con, &tag) == 0) { 630 if (asn1_header_decode(&ctx, &end, &cls, &con, &tag) == 0) {
631 /* Check if we have reached the end of the blob, but with
632 no mechListMic (e.g. NTLMSSP instead of KRB5) */
633 if (ctx.error == ASN1_ERR_DEC_EMPTY)
634 goto decode_negtoken_exit;
597 cFYI(1, ("Error decoding last part negTokenInit exit3")); 635 cFYI(1, ("Error decoding last part negTokenInit exit3"));
598 return 0; 636 return 0;
599 } else if ((cls != ASN1_CTX) || (con != ASN1_CON)) { 637 } else if ((cls != ASN1_CTX) || (con != ASN1_CON)) {
@@ -602,6 +640,8 @@ decode_negTokenInit(unsigned char *security_blob, int length,
602 cls, con, tag, end, *end)); 640 cls, con, tag, end, *end));
603 return 0; 641 return 0;
604 } 642 }
643
644 /* sequence */
605 if (asn1_header_decode(&ctx, &end, &cls, &con, &tag) == 0) { 645 if (asn1_header_decode(&ctx, &end, &cls, &con, &tag) == 0) {
606 cFYI(1, ("Error decoding last part negTokenInit exit5")); 646 cFYI(1, ("Error decoding last part negTokenInit exit5"));
607 return 0; 647 return 0;
@@ -611,6 +651,7 @@ decode_negTokenInit(unsigned char *security_blob, int length,
611 cls, con, tag, end, *end)); 651 cls, con, tag, end, *end));
612 } 652 }
613 653
654 /* sequence of */
614 if (asn1_header_decode(&ctx, &end, &cls, &con, &tag) == 0) { 655 if (asn1_header_decode(&ctx, &end, &cls, &con, &tag) == 0) {
615 cFYI(1, ("Error decoding last part negTokenInit exit 7")); 656 cFYI(1, ("Error decoding last part negTokenInit exit 7"));
616 return 0; 657 return 0;
@@ -619,6 +660,8 @@ decode_negTokenInit(unsigned char *security_blob, int length,
619 cls, con, tag, end, *end)); 660 cls, con, tag, end, *end));
620 return 0; 661 return 0;
621 } 662 }
663
664 /* general string */
622 if (asn1_header_decode(&ctx, &end, &cls, &con, &tag) == 0) { 665 if (asn1_header_decode(&ctx, &end, &cls, &con, &tag) == 0) {
623 cFYI(1, ("Error decoding last part negTokenInit exit9")); 666 cFYI(1, ("Error decoding last part negTokenInit exit9"));
624 return 0; 667 return 0;
@@ -630,13 +673,13 @@ decode_negTokenInit(unsigned char *security_blob, int length,
630 } 673 }
631 cFYI(1, ("Need to call asn1_octets_decode() function for %s", 674 cFYI(1, ("Need to call asn1_octets_decode() function for %s",
632 ctx.pointer)); /* is this UTF-8 or ASCII? */ 675 ctx.pointer)); /* is this UTF-8 or ASCII? */
633 676decode_negtoken_exit:
634 if (use_kerberos) 677 if (use_kerberos)
635 *secType = Kerberos; 678 *secType = Kerberos;
636 else if (use_mskerberos) 679 else if (use_mskerberos)
637 *secType = MSKerberos; 680 *secType = MSKerberos;
638 else if (use_ntlmssp) 681 else if (use_ntlmssp)
639 *secType = NTLMSSP; 682 *secType = RawNTLMSSP;
640 683
641 return 1; 684 return 1;
642} 685}
diff --git a/fs/cifs/cifsfs.c b/fs/cifs/cifsfs.c
index 0d92114195ab..9f669f982c4d 100644
--- a/fs/cifs/cifsfs.c
+++ b/fs/cifs/cifsfs.c
@@ -333,6 +333,27 @@ cifs_destroy_inode(struct inode *inode)
333 kmem_cache_free(cifs_inode_cachep, CIFS_I(inode)); 333 kmem_cache_free(cifs_inode_cachep, CIFS_I(inode));
334} 334}
335 335
336static void
337cifs_show_address(struct seq_file *s, struct TCP_Server_Info *server)
338{
339 seq_printf(s, ",addr=");
340
341 switch (server->addr.sockAddr.sin_family) {
342 case AF_INET:
343 seq_printf(s, "%pI4", &server->addr.sockAddr.sin_addr.s_addr);
344 break;
345 case AF_INET6:
346 seq_printf(s, "%pI6",
347 &server->addr.sockAddr6.sin6_addr.s6_addr);
348 if (server->addr.sockAddr6.sin6_scope_id)
349 seq_printf(s, "%%%u",
350 server->addr.sockAddr6.sin6_scope_id);
351 break;
352 default:
353 seq_printf(s, "(unknown)");
354 }
355}
356
336/* 357/*
337 * cifs_show_options() is for displaying mount options in /proc/mounts. 358 * cifs_show_options() is for displaying mount options in /proc/mounts.
338 * Not all settable options are displayed but most of the important 359 * Not all settable options are displayed but most of the important
@@ -343,83 +364,64 @@ cifs_show_options(struct seq_file *s, struct vfsmount *m)
343{ 364{
344 struct cifs_sb_info *cifs_sb; 365 struct cifs_sb_info *cifs_sb;
345 struct cifsTconInfo *tcon; 366 struct cifsTconInfo *tcon;
346 struct TCP_Server_Info *server;
347 367
348 cifs_sb = CIFS_SB(m->mnt_sb); 368 cifs_sb = CIFS_SB(m->mnt_sb);
369 tcon = cifs_sb->tcon;
349 370
350 if (cifs_sb) { 371 seq_printf(s, ",unc=%s", cifs_sb->tcon->treeName);
351 tcon = cifs_sb->tcon; 372 if (tcon->ses->userName)
352 if (tcon) { 373 seq_printf(s, ",username=%s", tcon->ses->userName);
353 seq_printf(s, ",unc=%s", cifs_sb->tcon->treeName); 374 if (tcon->ses->domainName)
354 if (tcon->ses) { 375 seq_printf(s, ",domain=%s", tcon->ses->domainName);
355 if (tcon->ses->userName) 376
356 seq_printf(s, ",username=%s", 377 seq_printf(s, ",uid=%d", cifs_sb->mnt_uid);
357 tcon->ses->userName); 378 if (cifs_sb->mnt_cifs_flags & CIFS_MOUNT_OVERR_UID)
358 if (tcon->ses->domainName) 379 seq_printf(s, ",forceuid");
359 seq_printf(s, ",domain=%s", 380
360 tcon->ses->domainName); 381 seq_printf(s, ",gid=%d", cifs_sb->mnt_gid);
361 server = tcon->ses->server; 382 if (cifs_sb->mnt_cifs_flags & CIFS_MOUNT_OVERR_GID)
362 if (server) { 383 seq_printf(s, ",forcegid");
363 seq_printf(s, ",addr="); 384
364 switch (server->addr.sockAddr6. 385 cifs_show_address(s, tcon->ses->server);
365 sin6_family) { 386
366 case AF_INET6: 387 if (!tcon->unix_ext)
367 seq_printf(s, "%pI6", 388 seq_printf(s, ",file_mode=0%o,dir_mode=0%o",
368 &server->addr.sockAddr6.sin6_addr);
369 break;
370 case AF_INET:
371 seq_printf(s, "%pI4",
372 &server->addr.sockAddr.sin_addr.s_addr);
373 break;
374 }
375 }
376 }
377 if ((cifs_sb->mnt_cifs_flags & CIFS_MOUNT_OVERR_UID) ||
378 !(tcon->unix_ext))
379 seq_printf(s, ",uid=%d", cifs_sb->mnt_uid);
380 if ((cifs_sb->mnt_cifs_flags & CIFS_MOUNT_OVERR_GID) ||
381 !(tcon->unix_ext))
382 seq_printf(s, ",gid=%d", cifs_sb->mnt_gid);
383 if (!tcon->unix_ext) {
384 seq_printf(s, ",file_mode=0%o,dir_mode=0%o",
385 cifs_sb->mnt_file_mode, 389 cifs_sb->mnt_file_mode,
386 cifs_sb->mnt_dir_mode); 390 cifs_sb->mnt_dir_mode);
387 } 391 if (tcon->seal)
388 if (tcon->seal) 392 seq_printf(s, ",seal");
389 seq_printf(s, ",seal"); 393 if (tcon->nocase)
390 if (tcon->nocase) 394 seq_printf(s, ",nocase");
391 seq_printf(s, ",nocase"); 395 if (tcon->retry)
392 if (tcon->retry) 396 seq_printf(s, ",hard");
393 seq_printf(s, ",hard"); 397 if (cifs_sb->prepath)
394 } 398 seq_printf(s, ",prepath=%s", cifs_sb->prepath);
395 if (cifs_sb->prepath) 399 if (cifs_sb->mnt_cifs_flags & CIFS_MOUNT_POSIX_PATHS)
396 seq_printf(s, ",prepath=%s", cifs_sb->prepath); 400 seq_printf(s, ",posixpaths");
397 if (cifs_sb->mnt_cifs_flags & CIFS_MOUNT_POSIX_PATHS) 401 if (cifs_sb->mnt_cifs_flags & CIFS_MOUNT_SET_UID)
398 seq_printf(s, ",posixpaths"); 402 seq_printf(s, ",setuids");
399 if (cifs_sb->mnt_cifs_flags & CIFS_MOUNT_SET_UID) 403 if (cifs_sb->mnt_cifs_flags & CIFS_MOUNT_SERVER_INUM)
400 seq_printf(s, ",setuids"); 404 seq_printf(s, ",serverino");
401 if (cifs_sb->mnt_cifs_flags & CIFS_MOUNT_SERVER_INUM) 405 if (cifs_sb->mnt_cifs_flags & CIFS_MOUNT_DIRECT_IO)
402 seq_printf(s, ",serverino"); 406 seq_printf(s, ",directio");
403 if (cifs_sb->mnt_cifs_flags & CIFS_MOUNT_DIRECT_IO) 407 if (cifs_sb->mnt_cifs_flags & CIFS_MOUNT_NO_XATTR)
404 seq_printf(s, ",directio"); 408 seq_printf(s, ",nouser_xattr");
405 if (cifs_sb->mnt_cifs_flags & CIFS_MOUNT_NO_XATTR) 409 if (cifs_sb->mnt_cifs_flags & CIFS_MOUNT_MAP_SPECIAL_CHR)
406 seq_printf(s, ",nouser_xattr"); 410 seq_printf(s, ",mapchars");
407 if (cifs_sb->mnt_cifs_flags & CIFS_MOUNT_MAP_SPECIAL_CHR) 411 if (cifs_sb->mnt_cifs_flags & CIFS_MOUNT_UNX_EMUL)
408 seq_printf(s, ",mapchars"); 412 seq_printf(s, ",sfu");
409 if (cifs_sb->mnt_cifs_flags & CIFS_MOUNT_UNX_EMUL) 413 if (cifs_sb->mnt_cifs_flags & CIFS_MOUNT_NO_BRL)
410 seq_printf(s, ",sfu"); 414 seq_printf(s, ",nobrl");
411 if (cifs_sb->mnt_cifs_flags & CIFS_MOUNT_NO_BRL) 415 if (cifs_sb->mnt_cifs_flags & CIFS_MOUNT_CIFS_ACL)
412 seq_printf(s, ",nobrl"); 416 seq_printf(s, ",cifsacl");
413 if (cifs_sb->mnt_cifs_flags & CIFS_MOUNT_CIFS_ACL) 417 if (cifs_sb->mnt_cifs_flags & CIFS_MOUNT_DYNPERM)
414 seq_printf(s, ",cifsacl"); 418 seq_printf(s, ",dynperm");
415 if (cifs_sb->mnt_cifs_flags & CIFS_MOUNT_DYNPERM) 419 if (m->mnt_sb->s_flags & MS_POSIXACL)
416 seq_printf(s, ",dynperm"); 420 seq_printf(s, ",acl");
417 if (m->mnt_sb->s_flags & MS_POSIXACL) 421
418 seq_printf(s, ",acl"); 422 seq_printf(s, ",rsize=%d", cifs_sb->rsize);
419 423 seq_printf(s, ",wsize=%d", cifs_sb->wsize);
420 seq_printf(s, ",rsize=%d", cifs_sb->rsize); 424
421 seq_printf(s, ",wsize=%d", cifs_sb->wsize);
422 }
423 return 0; 425 return 0;
424} 426}
425 427
@@ -535,9 +537,14 @@ static void cifs_umount_begin(struct super_block *sb)
535 if (tcon == NULL) 537 if (tcon == NULL)
536 return; 538 return;
537 539
538 lock_kernel();
539 read_lock(&cifs_tcp_ses_lock); 540 read_lock(&cifs_tcp_ses_lock);
540 if (tcon->tc_count == 1) 541 if ((tcon->tc_count > 1) || (tcon->tidStatus == CifsExiting)) {
542 /* we have other mounts to same share or we have
543 already tried to force umount this and woken up
544 all waiting network requests, nothing to do */
545 read_unlock(&cifs_tcp_ses_lock);
546 return;
547 } else if (tcon->tc_count == 1)
541 tcon->tidStatus = CifsExiting; 548 tcon->tidStatus = CifsExiting;
542 read_unlock(&cifs_tcp_ses_lock); 549 read_unlock(&cifs_tcp_ses_lock);
543 550
@@ -552,9 +559,7 @@ static void cifs_umount_begin(struct super_block *sb)
552 wake_up_all(&tcon->ses->server->response_q); 559 wake_up_all(&tcon->ses->server->response_q);
553 msleep(1); 560 msleep(1);
554 } 561 }
555/* BB FIXME - finish add checks for tidStatus BB */
556 562
557 unlock_kernel();
558 return; 563 return;
559} 564}
560 565
diff --git a/fs/cifs/cifsglob.h b/fs/cifs/cifsglob.h
index a61ab772c6f6..e1225e6ded2f 100644
--- a/fs/cifs/cifsglob.h
+++ b/fs/cifs/cifsglob.h
@@ -83,7 +83,7 @@ enum securityEnum {
83 NTLM, /* Legacy NTLM012 auth with NTLM hash */ 83 NTLM, /* Legacy NTLM012 auth with NTLM hash */
84 NTLMv2, /* Legacy NTLM auth with NTLMv2 hash */ 84 NTLMv2, /* Legacy NTLM auth with NTLMv2 hash */
85 RawNTLMSSP, /* NTLMSSP without SPNEGO, NTLMv2 hash */ 85 RawNTLMSSP, /* NTLMSSP without SPNEGO, NTLMv2 hash */
86 NTLMSSP, /* NTLMSSP via SPNEGO, NTLMv2 hash */ 86/* NTLMSSP, */ /* can use rawNTLMSSP instead of NTLMSSP via SPNEGO */
87 Kerberos, /* Kerberos via SPNEGO */ 87 Kerberos, /* Kerberos via SPNEGO */
88 MSKerberos, /* MS Kerberos via SPNEGO */ 88 MSKerberos, /* MS Kerberos via SPNEGO */
89}; 89};
diff --git a/fs/cifs/cifsproto.h b/fs/cifs/cifsproto.h
index f9452329bcce..c419416a42ee 100644
--- a/fs/cifs/cifsproto.h
+++ b/fs/cifs/cifsproto.h
@@ -74,7 +74,7 @@ extern unsigned int smbCalcSize(struct smb_hdr *ptr);
74extern unsigned int smbCalcSize_LE(struct smb_hdr *ptr); 74extern unsigned int smbCalcSize_LE(struct smb_hdr *ptr);
75extern int decode_negTokenInit(unsigned char *security_blob, int length, 75extern int decode_negTokenInit(unsigned char *security_blob, int length,
76 enum securityEnum *secType); 76 enum securityEnum *secType);
77extern int cifs_inet_pton(const int, const char *source, void *dst); 77extern int cifs_convert_address(char *src, void *dst);
78extern int map_smb_to_linux_error(struct smb_hdr *smb, int logErr); 78extern int map_smb_to_linux_error(struct smb_hdr *smb, int logErr);
79extern void header_assemble(struct smb_hdr *, char /* command */ , 79extern void header_assemble(struct smb_hdr *, char /* command */ ,
80 const struct cifsTconInfo *, int /* length of 80 const struct cifsTconInfo *, int /* length of
diff --git a/fs/cifs/cifssmb.c b/fs/cifs/cifssmb.c
index b84c61d5bca4..61007c627497 100644
--- a/fs/cifs/cifssmb.c
+++ b/fs/cifs/cifssmb.c
@@ -594,7 +594,7 @@ CIFSSMBNegotiate(unsigned int xid, struct cifsSesInfo *ses)
594 else if (secFlags & CIFSSEC_MAY_KRB5) 594 else if (secFlags & CIFSSEC_MAY_KRB5)
595 server->secType = Kerberos; 595 server->secType = Kerberos;
596 else if (secFlags & CIFSSEC_MAY_NTLMSSP) 596 else if (secFlags & CIFSSEC_MAY_NTLMSSP)
597 server->secType = NTLMSSP; 597 server->secType = RawNTLMSSP;
598 else if (secFlags & CIFSSEC_MAY_LANMAN) 598 else if (secFlags & CIFSSEC_MAY_LANMAN)
599 server->secType = LANMAN; 599 server->secType = LANMAN;
600/* #ifdef CONFIG_CIFS_EXPERIMENTAL 600/* #ifdef CONFIG_CIFS_EXPERIMENTAL
@@ -729,7 +729,7 @@ CIFSSMBTDis(const int xid, struct cifsTconInfo *tcon)
729 * the tcon is no longer on the list, so no need to take lock before 729 * the tcon is no longer on the list, so no need to take lock before
730 * checking this. 730 * checking this.
731 */ 731 */
732 if (tcon->need_reconnect) 732 if ((tcon->need_reconnect) || (tcon->ses->need_reconnect))
733 return 0; 733 return 0;
734 734
735 rc = small_smb_init(SMB_COM_TREE_DISCONNECT, 0, tcon, 735 rc = small_smb_init(SMB_COM_TREE_DISCONNECT, 0, tcon,
diff --git a/fs/cifs/connect.c b/fs/cifs/connect.c
index 97f4311b9a8e..e16d7592116a 100644
--- a/fs/cifs/connect.c
+++ b/fs/cifs/connect.c
@@ -70,7 +70,6 @@ struct smb_vol {
70 mode_t file_mode; 70 mode_t file_mode;
71 mode_t dir_mode; 71 mode_t dir_mode;
72 unsigned secFlg; 72 unsigned secFlg;
73 bool rw:1;
74 bool retry:1; 73 bool retry:1;
75 bool intr:1; 74 bool intr:1;
76 bool setuids:1; 75 bool setuids:1;
@@ -832,7 +831,6 @@ cifs_parse_mount_options(char *options, const char *devname,
832 vol->dir_mode = vol->file_mode = S_IRUGO | S_IXUGO | S_IWUSR; 831 vol->dir_mode = vol->file_mode = S_IRUGO | S_IXUGO | S_IWUSR;
833 832
834 /* vol->retry default is 0 (i.e. "soft" limited retry not hard retry) */ 833 /* vol->retry default is 0 (i.e. "soft" limited retry not hard retry) */
835 vol->rw = true;
836 /* default is always to request posix paths. */ 834 /* default is always to request posix paths. */
837 vol->posix_paths = 1; 835 vol->posix_paths = 1;
838 /* default to using server inode numbers where available */ 836 /* default to using server inode numbers where available */
@@ -1199,7 +1197,9 @@ cifs_parse_mount_options(char *options, const char *devname,
1199 } else if (strnicmp(data, "guest", 5) == 0) { 1197 } else if (strnicmp(data, "guest", 5) == 0) {
1200 /* ignore */ 1198 /* ignore */
1201 } else if (strnicmp(data, "rw", 2) == 0) { 1199 } else if (strnicmp(data, "rw", 2) == 0) {
1202 vol->rw = true; 1200 /* ignore */
1201 } else if (strnicmp(data, "ro", 2) == 0) {
1202 /* ignore */
1203 } else if (strnicmp(data, "noblocksend", 11) == 0) { 1203 } else if (strnicmp(data, "noblocksend", 11) == 0) {
1204 vol->noblocksnd = 1; 1204 vol->noblocksnd = 1;
1205 } else if (strnicmp(data, "noautotune", 10) == 0) { 1205 } else if (strnicmp(data, "noautotune", 10) == 0) {
@@ -1218,8 +1218,6 @@ cifs_parse_mount_options(char *options, const char *devname,
1218 parse these options again and set anything and it 1218 parse these options again and set anything and it
1219 is ok to just ignore them */ 1219 is ok to just ignore them */
1220 continue; 1220 continue;
1221 } else if (strnicmp(data, "ro", 2) == 0) {
1222 vol->rw = false;
1223 } else if (strnicmp(data, "hard", 4) == 0) { 1221 } else if (strnicmp(data, "hard", 4) == 0) {
1224 vol->retry = 1; 1222 vol->retry = 1;
1225 } else if (strnicmp(data, "soft", 4) == 0) { 1223 } else if (strnicmp(data, "soft", 4) == 0) {
@@ -1386,8 +1384,10 @@ cifs_find_tcp_session(struct sockaddr_storage *addr)
1386 server->addr.sockAddr.sin_addr.s_addr)) 1384 server->addr.sockAddr.sin_addr.s_addr))
1387 continue; 1385 continue;
1388 else if (addr->ss_family == AF_INET6 && 1386 else if (addr->ss_family == AF_INET6 &&
1389 !ipv6_addr_equal(&server->addr.sockAddr6.sin6_addr, 1387 (!ipv6_addr_equal(&server->addr.sockAddr6.sin6_addr,
1390 &addr6->sin6_addr)) 1388 &addr6->sin6_addr) ||
1389 server->addr.sockAddr6.sin6_scope_id !=
1390 addr6->sin6_scope_id))
1391 continue; 1391 continue;
1392 1392
1393 ++server->srv_count; 1393 ++server->srv_count;
@@ -1433,28 +1433,15 @@ cifs_get_tcp_session(struct smb_vol *volume_info)
1433 1433
1434 memset(&addr, 0, sizeof(struct sockaddr_storage)); 1434 memset(&addr, 0, sizeof(struct sockaddr_storage));
1435 1435
1436 if (volume_info->UNCip && volume_info->UNC) { 1436 cFYI(1, ("UNC: %s ip: %s", volume_info->UNC, volume_info->UNCip));
1437 rc = cifs_inet_pton(AF_INET, volume_info->UNCip,
1438 &sin_server->sin_addr.s_addr);
1439
1440 if (rc <= 0) {
1441 /* not ipv4 address, try ipv6 */
1442 rc = cifs_inet_pton(AF_INET6, volume_info->UNCip,
1443 &sin_server6->sin6_addr.in6_u);
1444 if (rc > 0)
1445 addr.ss_family = AF_INET6;
1446 } else {
1447 addr.ss_family = AF_INET;
1448 }
1449 1437
1450 if (rc <= 0) { 1438 if (volume_info->UNCip && volume_info->UNC) {
1439 rc = cifs_convert_address(volume_info->UNCip, &addr);
1440 if (!rc) {
1451 /* we failed translating address */ 1441 /* we failed translating address */
1452 rc = -EINVAL; 1442 rc = -EINVAL;
1453 goto out_err; 1443 goto out_err;
1454 } 1444 }
1455
1456 cFYI(1, ("UNC: %s ip: %s", volume_info->UNC,
1457 volume_info->UNCip));
1458 } else if (volume_info->UNCip) { 1445 } else if (volume_info->UNCip) {
1459 /* BB using ip addr as tcp_ses name to connect to the 1446 /* BB using ip addr as tcp_ses name to connect to the
1460 DFS root below */ 1447 DFS root below */
@@ -1513,14 +1500,14 @@ cifs_get_tcp_session(struct smb_vol *volume_info)
1513 cFYI(1, ("attempting ipv6 connect")); 1500 cFYI(1, ("attempting ipv6 connect"));
1514 /* BB should we allow ipv6 on port 139? */ 1501 /* BB should we allow ipv6 on port 139? */
1515 /* other OS never observed in Wild doing 139 with v6 */ 1502 /* other OS never observed in Wild doing 139 with v6 */
1503 sin_server6->sin6_port = htons(volume_info->port);
1516 memcpy(&tcp_ses->addr.sockAddr6, sin_server6, 1504 memcpy(&tcp_ses->addr.sockAddr6, sin_server6,
1517 sizeof(struct sockaddr_in6)); 1505 sizeof(struct sockaddr_in6));
1518 sin_server6->sin6_port = htons(volume_info->port);
1519 rc = ipv6_connect(tcp_ses); 1506 rc = ipv6_connect(tcp_ses);
1520 } else { 1507 } else {
1508 sin_server->sin_port = htons(volume_info->port);
1521 memcpy(&tcp_ses->addr.sockAddr, sin_server, 1509 memcpy(&tcp_ses->addr.sockAddr, sin_server,
1522 sizeof(struct sockaddr_in)); 1510 sizeof(struct sockaddr_in));
1523 sin_server->sin_port = htons(volume_info->port);
1524 rc = ipv4_connect(tcp_ses); 1511 rc = ipv4_connect(tcp_ses);
1525 } 1512 }
1526 if (rc < 0) { 1513 if (rc < 0) {
diff --git a/fs/cifs/dir.c b/fs/cifs/dir.c
index 3758965d73d5..7dc6b74f9def 100644
--- a/fs/cifs/dir.c
+++ b/fs/cifs/dir.c
@@ -307,8 +307,9 @@ cifs_create(struct inode *inode, struct dentry *direntry, int mode,
307 307
308 full_path = build_path_from_dentry(direntry); 308 full_path = build_path_from_dentry(direntry);
309 if (full_path == NULL) { 309 if (full_path == NULL) {
310 rc = -ENOMEM;
310 FreeXid(xid); 311 FreeXid(xid);
311 return -ENOMEM; 312 return rc;
312 } 313 }
313 314
314 if (oplockEnabled) 315 if (oplockEnabled)
@@ -540,8 +541,9 @@ int cifs_mknod(struct inode *inode, struct dentry *direntry, int mode,
540 buf = kmalloc(sizeof(FILE_ALL_INFO), GFP_KERNEL); 541 buf = kmalloc(sizeof(FILE_ALL_INFO), GFP_KERNEL);
541 if (buf == NULL) { 542 if (buf == NULL) {
542 kfree(full_path); 543 kfree(full_path);
544 rc = -ENOMEM;
543 FreeXid(xid); 545 FreeXid(xid);
544 return -ENOMEM; 546 return rc;
545 } 547 }
546 548
547 rc = CIFSSMBOpen(xid, pTcon, full_path, 549 rc = CIFSSMBOpen(xid, pTcon, full_path,
diff --git a/fs/cifs/dns_resolve.c b/fs/cifs/dns_resolve.c
index df4a306f697e..87948147d7ec 100644
--- a/fs/cifs/dns_resolve.c
+++ b/fs/cifs/dns_resolve.c
@@ -35,26 +35,11 @@
35 * 0 - name is not IP 35 * 0 - name is not IP
36 */ 36 */
37static int 37static int
38is_ip(const char *name) 38is_ip(char *name)
39{ 39{
40 int rc; 40 struct sockaddr_storage ss;
41 struct sockaddr_in sin_server; 41
42 struct sockaddr_in6 sin_server6; 42 return cifs_convert_address(name, &ss);
43
44 rc = cifs_inet_pton(AF_INET, name,
45 &sin_server.sin_addr.s_addr);
46
47 if (rc <= 0) {
48 /* not ipv4 address, try ipv6 */
49 rc = cifs_inet_pton(AF_INET6, name,
50 &sin_server6.sin6_addr.in6_u);
51 if (rc > 0)
52 return 1;
53 } else {
54 return 1;
55 }
56 /* we failed translating address */
57 return 0;
58} 43}
59 44
60static int 45static int
@@ -72,7 +57,7 @@ dns_resolver_instantiate(struct key *key, const void *data,
72 ip[datalen] = '\0'; 57 ip[datalen] = '\0';
73 58
74 /* make sure this looks like an address */ 59 /* make sure this looks like an address */
75 if (!is_ip((const char *) ip)) { 60 if (!is_ip(ip)) {
76 kfree(ip); 61 kfree(ip);
77 return -EINVAL; 62 return -EINVAL;
78 } 63 }
diff --git a/fs/cifs/file.c b/fs/cifs/file.c
index 06866841b97f..ebdbe62a829c 100644
--- a/fs/cifs/file.c
+++ b/fs/cifs/file.c
@@ -300,14 +300,16 @@ int cifs_open(struct inode *inode, struct file *file)
300 pCifsInode = CIFS_I(file->f_path.dentry->d_inode); 300 pCifsInode = CIFS_I(file->f_path.dentry->d_inode);
301 pCifsFile = cifs_fill_filedata(file); 301 pCifsFile = cifs_fill_filedata(file);
302 if (pCifsFile) { 302 if (pCifsFile) {
303 rc = 0;
303 FreeXid(xid); 304 FreeXid(xid);
304 return 0; 305 return rc;
305 } 306 }
306 307
307 full_path = build_path_from_dentry(file->f_path.dentry); 308 full_path = build_path_from_dentry(file->f_path.dentry);
308 if (full_path == NULL) { 309 if (full_path == NULL) {
310 rc = -ENOMEM;
309 FreeXid(xid); 311 FreeXid(xid);
310 return -ENOMEM; 312 return rc;
311 } 313 }
312 314
313 cFYI(1, ("inode = 0x%p file flags are 0x%x for %s", 315 cFYI(1, ("inode = 0x%p file flags are 0x%x for %s",
@@ -494,8 +496,9 @@ static int cifs_reopen_file(struct file *file, bool can_flush)
494 mutex_unlock(&pCifsFile->fh_mutex); 496 mutex_unlock(&pCifsFile->fh_mutex);
495 if (!pCifsFile->invalidHandle) { 497 if (!pCifsFile->invalidHandle) {
496 mutex_lock(&pCifsFile->fh_mutex); 498 mutex_lock(&pCifsFile->fh_mutex);
499 rc = 0;
497 FreeXid(xid); 500 FreeXid(xid);
498 return 0; 501 return rc;
499 } 502 }
500 503
501 if (file->f_path.dentry == NULL) { 504 if (file->f_path.dentry == NULL) {
@@ -845,8 +848,9 @@ int cifs_lock(struct file *file, int cmd, struct file_lock *pfLock)
845 tcon = cifs_sb->tcon; 848 tcon = cifs_sb->tcon;
846 849
847 if (file->private_data == NULL) { 850 if (file->private_data == NULL) {
851 rc = -EBADF;
848 FreeXid(xid); 852 FreeXid(xid);
849 return -EBADF; 853 return rc;
850 } 854 }
851 netfid = ((struct cifsFileInfo *)file->private_data)->netfid; 855 netfid = ((struct cifsFileInfo *)file->private_data)->netfid;
852 856
@@ -1805,8 +1809,9 @@ ssize_t cifs_user_read(struct file *file, char __user *read_data,
1805 pTcon = cifs_sb->tcon; 1809 pTcon = cifs_sb->tcon;
1806 1810
1807 if (file->private_data == NULL) { 1811 if (file->private_data == NULL) {
1812 rc = -EBADF;
1808 FreeXid(xid); 1813 FreeXid(xid);
1809 return -EBADF; 1814 return rc;
1810 } 1815 }
1811 open_file = (struct cifsFileInfo *)file->private_data; 1816 open_file = (struct cifsFileInfo *)file->private_data;
1812 1817
@@ -1885,8 +1890,9 @@ static ssize_t cifs_read(struct file *file, char *read_data, size_t read_size,
1885 pTcon = cifs_sb->tcon; 1890 pTcon = cifs_sb->tcon;
1886 1891
1887 if (file->private_data == NULL) { 1892 if (file->private_data == NULL) {
1893 rc = -EBADF;
1888 FreeXid(xid); 1894 FreeXid(xid);
1889 return -EBADF; 1895 return rc;
1890 } 1896 }
1891 open_file = (struct cifsFileInfo *)file->private_data; 1897 open_file = (struct cifsFileInfo *)file->private_data;
1892 1898
@@ -2019,8 +2025,9 @@ static int cifs_readpages(struct file *file, struct address_space *mapping,
2019 2025
2020 xid = GetXid(); 2026 xid = GetXid();
2021 if (file->private_data == NULL) { 2027 if (file->private_data == NULL) {
2028 rc = -EBADF;
2022 FreeXid(xid); 2029 FreeXid(xid);
2023 return -EBADF; 2030 return rc;
2024 } 2031 }
2025 open_file = (struct cifsFileInfo *)file->private_data; 2032 open_file = (struct cifsFileInfo *)file->private_data;
2026 cifs_sb = CIFS_SB(file->f_path.dentry->d_sb); 2033 cifs_sb = CIFS_SB(file->f_path.dentry->d_sb);
@@ -2185,8 +2192,9 @@ static int cifs_readpage(struct file *file, struct page *page)
2185 xid = GetXid(); 2192 xid = GetXid();
2186 2193
2187 if (file->private_data == NULL) { 2194 if (file->private_data == NULL) {
2195 rc = -EBADF;
2188 FreeXid(xid); 2196 FreeXid(xid);
2189 return -EBADF; 2197 return rc;
2190 } 2198 }
2191 2199
2192 cFYI(1, ("readpage %p at offset %d 0x%x\n", 2200 cFYI(1, ("readpage %p at offset %d 0x%x\n",
diff --git a/fs/cifs/inode.c b/fs/cifs/inode.c
index fad882b075ba..155c9e785d0c 100644
--- a/fs/cifs/inode.c
+++ b/fs/cifs/inode.c
@@ -988,8 +988,9 @@ int cifs_unlink(struct inode *dir, struct dentry *dentry)
988 * sb->s_vfs_rename_mutex here */ 988 * sb->s_vfs_rename_mutex here */
989 full_path = build_path_from_dentry(dentry); 989 full_path = build_path_from_dentry(dentry);
990 if (full_path == NULL) { 990 if (full_path == NULL) {
991 rc = -ENOMEM;
991 FreeXid(xid); 992 FreeXid(xid);
992 return -ENOMEM; 993 return rc;
993 } 994 }
994 995
995 if ((tcon->ses->capabilities & CAP_UNIX) && 996 if ((tcon->ses->capabilities & CAP_UNIX) &&
@@ -1118,8 +1119,9 @@ int cifs_mkdir(struct inode *inode, struct dentry *direntry, int mode)
1118 1119
1119 full_path = build_path_from_dentry(direntry); 1120 full_path = build_path_from_dentry(direntry);
1120 if (full_path == NULL) { 1121 if (full_path == NULL) {
1122 rc = -ENOMEM;
1121 FreeXid(xid); 1123 FreeXid(xid);
1122 return -ENOMEM; 1124 return rc;
1123 } 1125 }
1124 1126
1125 if ((pTcon->ses->capabilities & CAP_UNIX) && 1127 if ((pTcon->ses->capabilities & CAP_UNIX) &&
@@ -1303,8 +1305,9 @@ int cifs_rmdir(struct inode *inode, struct dentry *direntry)
1303 1305
1304 full_path = build_path_from_dentry(direntry); 1306 full_path = build_path_from_dentry(direntry);
1305 if (full_path == NULL) { 1307 if (full_path == NULL) {
1308 rc = -ENOMEM;
1306 FreeXid(xid); 1309 FreeXid(xid);
1307 return -ENOMEM; 1310 return rc;
1308 } 1311 }
1309 1312
1310 rc = CIFSSMBRmDir(xid, pTcon, full_path, cifs_sb->local_nls, 1313 rc = CIFSSMBRmDir(xid, pTcon, full_path, cifs_sb->local_nls,
@@ -1508,8 +1511,9 @@ int cifs_revalidate(struct dentry *direntry)
1508 since that would deadlock */ 1511 since that would deadlock */
1509 full_path = build_path_from_dentry(direntry); 1512 full_path = build_path_from_dentry(direntry);
1510 if (full_path == NULL) { 1513 if (full_path == NULL) {
1514 rc = -ENOMEM;
1511 FreeXid(xid); 1515 FreeXid(xid);
1512 return -ENOMEM; 1516 return rc;
1513 } 1517 }
1514 cFYI(1, ("Revalidate: %s inode 0x%p count %d dentry: 0x%p d_time %ld " 1518 cFYI(1, ("Revalidate: %s inode 0x%p count %d dentry: 0x%p d_time %ld "
1515 "jiffies %ld", full_path, direntry->d_inode, 1519 "jiffies %ld", full_path, direntry->d_inode,
@@ -1911,8 +1915,9 @@ cifs_setattr_nounix(struct dentry *direntry, struct iattr *attrs)
1911 1915
1912 full_path = build_path_from_dentry(direntry); 1916 full_path = build_path_from_dentry(direntry);
1913 if (full_path == NULL) { 1917 if (full_path == NULL) {
1918 rc = -ENOMEM;
1914 FreeXid(xid); 1919 FreeXid(xid);
1915 return -ENOMEM; 1920 return rc;
1916 } 1921 }
1917 1922
1918 /* 1923 /*
diff --git a/fs/cifs/link.c b/fs/cifs/link.c
index cd83c53fcbb5..fc1e0487eaee 100644
--- a/fs/cifs/link.c
+++ b/fs/cifs/link.c
@@ -172,8 +172,9 @@ cifs_symlink(struct inode *inode, struct dentry *direntry, const char *symname)
172 full_path = build_path_from_dentry(direntry); 172 full_path = build_path_from_dentry(direntry);
173 173
174 if (full_path == NULL) { 174 if (full_path == NULL) {
175 rc = -ENOMEM;
175 FreeXid(xid); 176 FreeXid(xid);
176 return -ENOMEM; 177 return rc;
177 } 178 }
178 179
179 cFYI(1, ("Full path: %s", full_path)); 180 cFYI(1, ("Full path: %s", full_path));
diff --git a/fs/cifs/netmisc.c b/fs/cifs/netmisc.c
index 32d6baa0a54f..bd6d6895730d 100644
--- a/fs/cifs/netmisc.c
+++ b/fs/cifs/netmisc.c
@@ -133,10 +133,12 @@ static const struct smb_to_posix_error mapping_table_ERRHRD[] = {
133 {0, 0} 133 {0, 0}
134}; 134};
135 135
136/* Convert string containing dotted ip address to binary form */ 136/*
137/* returns 0 if invalid address */ 137 * Convert a string containing text IPv4 or IPv6 address to binary form.
138 138 *
139int 139 * Returns 0 on failure.
140 */
141static int
140cifs_inet_pton(const int address_family, const char *cp, void *dst) 142cifs_inet_pton(const int address_family, const char *cp, void *dst)
141{ 143{
142 int ret = 0; 144 int ret = 0;
@@ -153,6 +155,52 @@ cifs_inet_pton(const int address_family, const char *cp, void *dst)
153 return ret; 155 return ret;
154} 156}
155 157
158/*
159 * Try to convert a string to an IPv4 address and then attempt to convert
160 * it to an IPv6 address if that fails. Set the family field if either
161 * succeeds. If it's an IPv6 address and it has a '%' sign in it, try to
162 * treat the part following it as a numeric sin6_scope_id.
163 *
164 * Returns 0 on failure.
165 */
166int
167cifs_convert_address(char *src, void *dst)
168{
169 int rc;
170 char *pct, *endp;
171 struct sockaddr_in *s4 = (struct sockaddr_in *) dst;
172 struct sockaddr_in6 *s6 = (struct sockaddr_in6 *) dst;
173
174 /* IPv4 address */
175 if (cifs_inet_pton(AF_INET, src, &s4->sin_addr.s_addr)) {
176 s4->sin_family = AF_INET;
177 return 1;
178 }
179
180 /* temporarily terminate string */
181 pct = strchr(src, '%');
182 if (pct)
183 *pct = '\0';
184
185 rc = cifs_inet_pton(AF_INET6, src, &s6->sin6_addr.s6_addr);
186
187 /* repair temp termination (if any) and make pct point to scopeid */
188 if (pct)
189 *pct++ = '%';
190
191 if (!rc)
192 return rc;
193
194 s6->sin6_family = AF_INET6;
195 if (pct) {
196 s6->sin6_scope_id = (u32) simple_strtoul(pct, &endp, 0);
197 if (!*pct || *endp)
198 return 0;
199 }
200
201 return rc;
202}
203
156/***************************************************************************** 204/*****************************************************************************
157convert a NT status code to a dos class/code 205convert a NT status code to a dos class/code
158 *****************************************************************************/ 206 *****************************************************************************/
diff --git a/fs/cifs/sess.c b/fs/cifs/sess.c
index 897a052270f9..7085a6275c4c 100644
--- a/fs/cifs/sess.c
+++ b/fs/cifs/sess.c
@@ -802,7 +802,7 @@ ssetup_ntlmssp_authenticate:
802#endif /* CONFIG_CIFS_UPCALL */ 802#endif /* CONFIG_CIFS_UPCALL */
803 } else { 803 } else {
804#ifdef CONFIG_CIFS_EXPERIMENTAL 804#ifdef CONFIG_CIFS_EXPERIMENTAL
805 if ((experimEnabled > 1) && (type == RawNTLMSSP)) { 805 if (type == RawNTLMSSP) {
806 if ((pSMB->req.hdr.Flags2 & SMBFLG2_UNICODE) == 0) { 806 if ((pSMB->req.hdr.Flags2 & SMBFLG2_UNICODE) == 0) {
807 cERROR(1, ("NTLMSSP requires Unicode support")); 807 cERROR(1, ("NTLMSSP requires Unicode support"));
808 rc = -ENOSYS; 808 rc = -ENOSYS;
diff --git a/fs/cifs/xattr.c b/fs/cifs/xattr.c
index e9527eedc639..a75afa3dd9e1 100644
--- a/fs/cifs/xattr.c
+++ b/fs/cifs/xattr.c
@@ -64,8 +64,9 @@ int cifs_removexattr(struct dentry *direntry, const char *ea_name)
64 64
65 full_path = build_path_from_dentry(direntry); 65 full_path = build_path_from_dentry(direntry);
66 if (full_path == NULL) { 66 if (full_path == NULL) {
67 rc = -ENOMEM;
67 FreeXid(xid); 68 FreeXid(xid);
68 return -ENOMEM; 69 return rc;
69 } 70 }
70 if (ea_name == NULL) { 71 if (ea_name == NULL) {
71 cFYI(1, ("Null xattr names not supported")); 72 cFYI(1, ("Null xattr names not supported"));
@@ -118,8 +119,9 @@ int cifs_setxattr(struct dentry *direntry, const char *ea_name,
118 119
119 full_path = build_path_from_dentry(direntry); 120 full_path = build_path_from_dentry(direntry);
120 if (full_path == NULL) { 121 if (full_path == NULL) {
122 rc = -ENOMEM;
121 FreeXid(xid); 123 FreeXid(xid);
122 return -ENOMEM; 124 return rc;
123 } 125 }
124 /* return dos attributes as pseudo xattr */ 126 /* return dos attributes as pseudo xattr */
125 /* return alt name if available as pseudo attr */ 127 /* return alt name if available as pseudo attr */
@@ -225,8 +227,9 @@ ssize_t cifs_getxattr(struct dentry *direntry, const char *ea_name,
225 227
226 full_path = build_path_from_dentry(direntry); 228 full_path = build_path_from_dentry(direntry);
227 if (full_path == NULL) { 229 if (full_path == NULL) {
230 rc = -ENOMEM;
228 FreeXid(xid); 231 FreeXid(xid);
229 return -ENOMEM; 232 return rc;
230 } 233 }
231 /* return dos attributes as pseudo xattr */ 234 /* return dos attributes as pseudo xattr */
232 /* return alt name if available as pseudo attr */ 235 /* return alt name if available as pseudo attr */
@@ -351,8 +354,9 @@ ssize_t cifs_listxattr(struct dentry *direntry, char *data, size_t buf_size)
351 354
352 full_path = build_path_from_dentry(direntry); 355 full_path = build_path_from_dentry(direntry);
353 if (full_path == NULL) { 356 if (full_path == NULL) {
357 rc = -ENOMEM;
354 FreeXid(xid); 358 FreeXid(xid);
355 return -ENOMEM; 359 return rc;
356 } 360 }
357 /* return dos attributes as pseudo xattr */ 361 /* return dos attributes as pseudo xattr */
358 /* return alt name if available as pseudo attr */ 362 /* return alt name if available as pseudo attr */
diff --git a/include/drm/drm_edid.h b/include/drm/drm_edid.h
index c263e4d71754..7d6c9a2dfcbb 100644
--- a/include/drm/drm_edid.h
+++ b/include/drm/drm_edid.h
@@ -35,11 +35,11 @@ struct est_timings {
35} __attribute__((packed)); 35} __attribute__((packed));
36 36
37/* 00=16:10, 01=4:3, 10=5:4, 11=16:9 */ 37/* 00=16:10, 01=4:3, 10=5:4, 11=16:9 */
38#define EDID_TIMING_ASPECT_SHIFT 0 38#define EDID_TIMING_ASPECT_SHIFT 6
39#define EDID_TIMING_ASPECT_MASK (0x3 << EDID_TIMING_ASPECT_SHIFT) 39#define EDID_TIMING_ASPECT_MASK (0x3 << EDID_TIMING_ASPECT_SHIFT)
40 40
41/* need to add 60 */ 41/* need to add 60 */
42#define EDID_TIMING_VFREQ_SHIFT 2 42#define EDID_TIMING_VFREQ_SHIFT 0
43#define EDID_TIMING_VFREQ_MASK (0x3f << EDID_TIMING_VFREQ_SHIFT) 43#define EDID_TIMING_VFREQ_MASK (0x3f << EDID_TIMING_VFREQ_SHIFT)
44 44
45struct std_timing { 45struct std_timing {
@@ -47,11 +47,11 @@ struct std_timing {
47 u8 vfreq_aspect; 47 u8 vfreq_aspect;
48} __attribute__((packed)); 48} __attribute__((packed));
49 49
50#define DRM_EDID_PT_HSYNC_POSITIVE (1 << 6) 50#define DRM_EDID_PT_HSYNC_POSITIVE (1 << 1)
51#define DRM_EDID_PT_VSYNC_POSITIVE (1 << 5) 51#define DRM_EDID_PT_VSYNC_POSITIVE (1 << 2)
52#define DRM_EDID_PT_SEPARATE_SYNC (3 << 3) 52#define DRM_EDID_PT_SEPARATE_SYNC (3 << 3)
53#define DRM_EDID_PT_STEREO (1 << 2) 53#define DRM_EDID_PT_STEREO (1 << 5)
54#define DRM_EDID_PT_INTERLACED (1 << 1) 54#define DRM_EDID_PT_INTERLACED (1 << 7)
55 55
56/* If detailed data is pixel timing */ 56/* If detailed data is pixel timing */
57struct detailed_pixel_timing { 57struct detailed_pixel_timing {
@@ -93,7 +93,7 @@ struct detailed_data_monitor_range {
93} __attribute__((packed)); 93} __attribute__((packed));
94 94
95struct detailed_data_wpindex { 95struct detailed_data_wpindex {
96 u8 white_xy_lo; /* Upper 2 bits each */ 96 u8 white_yx_lo; /* Lower 2 bits each */
97 u8 white_x_hi; 97 u8 white_x_hi;
98 u8 white_y_hi; 98 u8 white_y_hi;
99 u8 gamma; /* need to divide by 100 then add 1 */ 99 u8 gamma; /* need to divide by 100 then add 1 */
@@ -135,21 +135,21 @@ struct detailed_timing {
135 } data; 135 } data;
136} __attribute__((packed)); 136} __attribute__((packed));
137 137
138#define DRM_EDID_INPUT_SERRATION_VSYNC (1 << 7) 138#define DRM_EDID_INPUT_SERRATION_VSYNC (1 << 0)
139#define DRM_EDID_INPUT_SYNC_ON_GREEN (1 << 5) 139#define DRM_EDID_INPUT_SYNC_ON_GREEN (1 << 1)
140#define DRM_EDID_INPUT_COMPOSITE_SYNC (1 << 4) 140#define DRM_EDID_INPUT_COMPOSITE_SYNC (1 << 2)
141#define DRM_EDID_INPUT_SEPARATE_SYNCS (1 << 3) 141#define DRM_EDID_INPUT_SEPARATE_SYNCS (1 << 3)
142#define DRM_EDID_INPUT_BLANK_TO_BLACK (1 << 2) 142#define DRM_EDID_INPUT_BLANK_TO_BLACK (1 << 4)
143#define DRM_EDID_INPUT_VIDEO_LEVEL (3 << 1) 143#define DRM_EDID_INPUT_VIDEO_LEVEL (3 << 5)
144#define DRM_EDID_INPUT_DIGITAL (1 << 0) /* bits above must be zero if set */ 144#define DRM_EDID_INPUT_DIGITAL (1 << 7) /* bits below must be zero if set */
145 145
146#define DRM_EDID_FEATURE_DEFAULT_GTF (1 << 7) 146#define DRM_EDID_FEATURE_DEFAULT_GTF (1 << 0)
147#define DRM_EDID_FEATURE_PREFERRED_TIMING (1 << 6) 147#define DRM_EDID_FEATURE_PREFERRED_TIMING (1 << 1)
148#define DRM_EDID_FEATURE_STANDARD_COLOR (1 << 5) 148#define DRM_EDID_FEATURE_STANDARD_COLOR (1 << 2)
149#define DRM_EDID_FEATURE_DISPLAY_TYPE (3 << 3) /* 00=mono, 01=rgb, 10=non-rgb, 11=unknown */ 149#define DRM_EDID_FEATURE_DISPLAY_TYPE (3 << 3) /* 00=mono, 01=rgb, 10=non-rgb, 11=unknown */
150#define DRM_EDID_FEATURE_PM_ACTIVE_OFF (1 << 2) 150#define DRM_EDID_FEATURE_PM_ACTIVE_OFF (1 << 5)
151#define DRM_EDID_FEATURE_PM_SUSPEND (1 << 1) 151#define DRM_EDID_FEATURE_PM_SUSPEND (1 << 6)
152#define DRM_EDID_FEATURE_PM_STANDBY (1 << 0) 152#define DRM_EDID_FEATURE_PM_STANDBY (1 << 7)
153 153
154struct edid { 154struct edid {
155 u8 header[8]; 155 u8 header[8];
diff --git a/include/linux/ide.h b/include/linux/ide.h
index 95c6e00a72e8..cf1f3888067c 100644
--- a/include/linux/ide.h
+++ b/include/linux/ide.h
@@ -1361,7 +1361,6 @@ int ide_in_drive_list(u16 *, const struct drive_list_entry *);
1361#ifdef CONFIG_BLK_DEV_IDEDMA 1361#ifdef CONFIG_BLK_DEV_IDEDMA
1362int ide_dma_good_drive(ide_drive_t *); 1362int ide_dma_good_drive(ide_drive_t *);
1363int __ide_dma_bad_drive(ide_drive_t *); 1363int __ide_dma_bad_drive(ide_drive_t *);
1364int ide_id_dma_bug(ide_drive_t *);
1365 1364
1366u8 ide_find_dma_mode(ide_drive_t *, u8); 1365u8 ide_find_dma_mode(ide_drive_t *, u8);
1367 1366
@@ -1402,7 +1401,6 @@ void ide_dma_lost_irq(ide_drive_t *);
1402ide_startstop_t ide_dma_timeout_retry(ide_drive_t *, int); 1401ide_startstop_t ide_dma_timeout_retry(ide_drive_t *, int);
1403 1402
1404#else 1403#else
1405static inline int ide_id_dma_bug(ide_drive_t *drive) { return 0; }
1406static inline u8 ide_find_dma_mode(ide_drive_t *drive, u8 speed) { return 0; } 1404static inline u8 ide_find_dma_mode(ide_drive_t *drive, u8 speed) { return 0; }
1407static inline u8 ide_max_dma_mode(ide_drive_t *drive) { return 0; } 1405static inline u8 ide_max_dma_mode(ide_drive_t *drive) { return 0; }
1408static inline void ide_dma_off_quietly(ide_drive_t *drive) { ; } 1406static inline void ide_dma_off_quietly(ide_drive_t *drive) { ; }
diff --git a/include/linux/mm.h b/include/linux/mm.h
index d006e93d5c93..ba3a7cb1eaa0 100644
--- a/include/linux/mm.h
+++ b/include/linux/mm.h
@@ -826,7 +826,7 @@ extern int make_pages_present(unsigned long addr, unsigned long end);
826extern int access_process_vm(struct task_struct *tsk, unsigned long addr, void *buf, int len, int write); 826extern int access_process_vm(struct task_struct *tsk, unsigned long addr, void *buf, int len, int write);
827 827
828int get_user_pages(struct task_struct *tsk, struct mm_struct *mm, 828int get_user_pages(struct task_struct *tsk, struct mm_struct *mm,
829 unsigned long start, int len, int write, int force, 829 unsigned long start, int nr_pages, int write, int force,
830 struct page **pages, struct vm_area_struct **vmas); 830 struct page **pages, struct vm_area_struct **vmas);
831int get_user_pages_fast(unsigned long start, int nr_pages, int write, 831int get_user_pages_fast(unsigned long start, int nr_pages, int write,
832 struct page **pages); 832 struct page **pages);
diff --git a/kernel/futex.c b/kernel/futex.c
index 1c337112335c..794c862125fe 100644
--- a/kernel/futex.c
+++ b/kernel/futex.c
@@ -299,7 +299,7 @@ void put_futex_key(int fshared, union futex_key *key)
299static int fault_in_user_writeable(u32 __user *uaddr) 299static int fault_in_user_writeable(u32 __user *uaddr)
300{ 300{
301 int ret = get_user_pages(current, current->mm, (unsigned long)uaddr, 301 int ret = get_user_pages(current, current->mm, (unsigned long)uaddr,
302 sizeof(*uaddr), 1, 0, NULL, NULL); 302 1, 1, 0, NULL, NULL);
303 return ret < 0 ? ret : 0; 303 return ret < 0 ? ret : 0;
304} 304}
305 305
diff --git a/mm/memory.c b/mm/memory.c
index f46ac18ba231..65216194eb8d 100644
--- a/mm/memory.c
+++ b/mm/memory.c
@@ -1207,8 +1207,8 @@ static inline int use_zero_page(struct vm_area_struct *vma)
1207 1207
1208 1208
1209int __get_user_pages(struct task_struct *tsk, struct mm_struct *mm, 1209int __get_user_pages(struct task_struct *tsk, struct mm_struct *mm,
1210 unsigned long start, int len, int flags, 1210 unsigned long start, int nr_pages, int flags,
1211 struct page **pages, struct vm_area_struct **vmas) 1211 struct page **pages, struct vm_area_struct **vmas)
1212{ 1212{
1213 int i; 1213 int i;
1214 unsigned int vm_flags = 0; 1214 unsigned int vm_flags = 0;
@@ -1217,7 +1217,7 @@ int __get_user_pages(struct task_struct *tsk, struct mm_struct *mm,
1217 int ignore = !!(flags & GUP_FLAGS_IGNORE_VMA_PERMISSIONS); 1217 int ignore = !!(flags & GUP_FLAGS_IGNORE_VMA_PERMISSIONS);
1218 int ignore_sigkill = !!(flags & GUP_FLAGS_IGNORE_SIGKILL); 1218 int ignore_sigkill = !!(flags & GUP_FLAGS_IGNORE_SIGKILL);
1219 1219
1220 if (len <= 0) 1220 if (nr_pages <= 0)
1221 return 0; 1221 return 0;
1222 /* 1222 /*
1223 * Require read or write permissions. 1223 * Require read or write permissions.
@@ -1269,7 +1269,7 @@ int __get_user_pages(struct task_struct *tsk, struct mm_struct *mm,
1269 vmas[i] = gate_vma; 1269 vmas[i] = gate_vma;
1270 i++; 1270 i++;
1271 start += PAGE_SIZE; 1271 start += PAGE_SIZE;
1272 len--; 1272 nr_pages--;
1273 continue; 1273 continue;
1274 } 1274 }
1275 1275
@@ -1280,7 +1280,7 @@ int __get_user_pages(struct task_struct *tsk, struct mm_struct *mm,
1280 1280
1281 if (is_vm_hugetlb_page(vma)) { 1281 if (is_vm_hugetlb_page(vma)) {
1282 i = follow_hugetlb_page(mm, vma, pages, vmas, 1282 i = follow_hugetlb_page(mm, vma, pages, vmas,
1283 &start, &len, i, write); 1283 &start, &nr_pages, i, write);
1284 continue; 1284 continue;
1285 } 1285 }
1286 1286
@@ -1357,9 +1357,9 @@ int __get_user_pages(struct task_struct *tsk, struct mm_struct *mm,
1357 vmas[i] = vma; 1357 vmas[i] = vma;
1358 i++; 1358 i++;
1359 start += PAGE_SIZE; 1359 start += PAGE_SIZE;
1360 len--; 1360 nr_pages--;
1361 } while (len && start < vma->vm_end); 1361 } while (nr_pages && start < vma->vm_end);
1362 } while (len); 1362 } while (nr_pages);
1363 return i; 1363 return i;
1364} 1364}
1365 1365
@@ -1368,7 +1368,7 @@ int __get_user_pages(struct task_struct *tsk, struct mm_struct *mm,
1368 * @tsk: task_struct of target task 1368 * @tsk: task_struct of target task
1369 * @mm: mm_struct of target mm 1369 * @mm: mm_struct of target mm
1370 * @start: starting user address 1370 * @start: starting user address
1371 * @len: number of pages from start to pin 1371 * @nr_pages: number of pages from start to pin
1372 * @write: whether pages will be written to by the caller 1372 * @write: whether pages will be written to by the caller
1373 * @force: whether to force write access even if user mapping is 1373 * @force: whether to force write access even if user mapping is
1374 * readonly. This will result in the page being COWed even 1374 * readonly. This will result in the page being COWed even
@@ -1380,7 +1380,7 @@ int __get_user_pages(struct task_struct *tsk, struct mm_struct *mm,
1380 * Or NULL if the caller does not require them. 1380 * Or NULL if the caller does not require them.
1381 * 1381 *
1382 * Returns number of pages pinned. This may be fewer than the number 1382 * Returns number of pages pinned. This may be fewer than the number
1383 * requested. If len is 0 or negative, returns 0. If no pages 1383 * requested. If nr_pages is 0 or negative, returns 0. If no pages
1384 * were pinned, returns -errno. Each page returned must be released 1384 * were pinned, returns -errno. Each page returned must be released
1385 * with a put_page() call when it is finished with. vmas will only 1385 * with a put_page() call when it is finished with. vmas will only
1386 * remain valid while mmap_sem is held. 1386 * remain valid while mmap_sem is held.
@@ -1414,7 +1414,7 @@ int __get_user_pages(struct task_struct *tsk, struct mm_struct *mm,
1414 * See also get_user_pages_fast, for performance critical applications. 1414 * See also get_user_pages_fast, for performance critical applications.
1415 */ 1415 */
1416int get_user_pages(struct task_struct *tsk, struct mm_struct *mm, 1416int get_user_pages(struct task_struct *tsk, struct mm_struct *mm,
1417 unsigned long start, int len, int write, int force, 1417 unsigned long start, int nr_pages, int write, int force,
1418 struct page **pages, struct vm_area_struct **vmas) 1418 struct page **pages, struct vm_area_struct **vmas)
1419{ 1419{
1420 int flags = 0; 1420 int flags = 0;
@@ -1424,9 +1424,7 @@ int get_user_pages(struct task_struct *tsk, struct mm_struct *mm,
1424 if (force) 1424 if (force)
1425 flags |= GUP_FLAGS_FORCE; 1425 flags |= GUP_FLAGS_FORCE;
1426 1426
1427 return __get_user_pages(tsk, mm, 1427 return __get_user_pages(tsk, mm, start, nr_pages, flags, pages, vmas);
1428 start, len, flags,
1429 pages, vmas);
1430} 1428}
1431 1429
1432EXPORT_SYMBOL(get_user_pages); 1430EXPORT_SYMBOL(get_user_pages);
diff --git a/mm/nommu.c b/mm/nommu.c
index 2fd2ad5da98e..bf0cc762a7d2 100644
--- a/mm/nommu.c
+++ b/mm/nommu.c
@@ -173,8 +173,8 @@ unsigned int kobjsize(const void *objp)
173} 173}
174 174
175int __get_user_pages(struct task_struct *tsk, struct mm_struct *mm, 175int __get_user_pages(struct task_struct *tsk, struct mm_struct *mm,
176 unsigned long start, int len, int flags, 176 unsigned long start, int nr_pages, int flags,
177 struct page **pages, struct vm_area_struct **vmas) 177 struct page **pages, struct vm_area_struct **vmas)
178{ 178{
179 struct vm_area_struct *vma; 179 struct vm_area_struct *vma;
180 unsigned long vm_flags; 180 unsigned long vm_flags;
@@ -189,7 +189,7 @@ int __get_user_pages(struct task_struct *tsk, struct mm_struct *mm,
189 vm_flags = write ? (VM_WRITE | VM_MAYWRITE) : (VM_READ | VM_MAYREAD); 189 vm_flags = write ? (VM_WRITE | VM_MAYWRITE) : (VM_READ | VM_MAYREAD);
190 vm_flags &= force ? (VM_MAYREAD | VM_MAYWRITE) : (VM_READ | VM_WRITE); 190 vm_flags &= force ? (VM_MAYREAD | VM_MAYWRITE) : (VM_READ | VM_WRITE);
191 191
192 for (i = 0; i < len; i++) { 192 for (i = 0; i < nr_pages; i++) {
193 vma = find_vma(mm, start); 193 vma = find_vma(mm, start);
194 if (!vma) 194 if (!vma)
195 goto finish_or_fault; 195 goto finish_or_fault;
@@ -224,7 +224,7 @@ finish_or_fault:
224 * - don't permit access to VMAs that don't support it, such as I/O mappings 224 * - don't permit access to VMAs that don't support it, such as I/O mappings
225 */ 225 */
226int get_user_pages(struct task_struct *tsk, struct mm_struct *mm, 226int get_user_pages(struct task_struct *tsk, struct mm_struct *mm,
227 unsigned long start, int len, int write, int force, 227 unsigned long start, int nr_pages, int write, int force,
228 struct page **pages, struct vm_area_struct **vmas) 228 struct page **pages, struct vm_area_struct **vmas)
229{ 229{
230 int flags = 0; 230 int flags = 0;
@@ -234,9 +234,7 @@ int get_user_pages(struct task_struct *tsk, struct mm_struct *mm,
234 if (force) 234 if (force)
235 flags |= GUP_FLAGS_FORCE; 235 flags |= GUP_FLAGS_FORCE;
236 236
237 return __get_user_pages(tsk, mm, 237 return __get_user_pages(tsk, mm, start, nr_pages, flags, pages, vmas);
238 start, len, flags,
239 pages, vmas);
240} 238}
241EXPORT_SYMBOL(get_user_pages); 239EXPORT_SYMBOL(get_user_pages);
242 240
generated by cgit v1.2.2 (git 2.25.0) at 2025-05-03 01:58:00 -0400