diff options
-rw-r--r-- | arch/x86/include/asm/gart.h | 4 | ||||
-rw-r--r-- | arch/x86/kernel/aperture_64.c | 2 |
2 files changed, 3 insertions, 3 deletions
diff --git a/arch/x86/include/asm/gart.h b/arch/x86/include/asm/gart.h index 88c1ebee0db2..156cd5d18d2a 100644 --- a/arch/x86/include/asm/gart.h +++ b/arch/x86/include/asm/gart.h | |||
@@ -66,7 +66,7 @@ static inline void gart_set_size_and_enable(struct pci_dev *dev, u32 order) | |||
66 | * Don't enable translation but enable GART IO and CPU accesses. | 66 | * Don't enable translation but enable GART IO and CPU accesses. |
67 | * Also, set DISTLBWALKPRB since GART tables memory is UC. | 67 | * Also, set DISTLBWALKPRB since GART tables memory is UC. |
68 | */ | 68 | */ |
69 | ctl = DISTLBWALKPRB | order << 1; | 69 | ctl = order << 1; |
70 | 70 | ||
71 | pci_write_config_dword(dev, AMD64_GARTAPERTURECTL, ctl); | 71 | pci_write_config_dword(dev, AMD64_GARTAPERTURECTL, ctl); |
72 | } | 72 | } |
@@ -83,7 +83,7 @@ static inline void enable_gart_translation(struct pci_dev *dev, u64 addr) | |||
83 | 83 | ||
84 | /* Enable GART translation for this hammer. */ | 84 | /* Enable GART translation for this hammer. */ |
85 | pci_read_config_dword(dev, AMD64_GARTAPERTURECTL, &ctl); | 85 | pci_read_config_dword(dev, AMD64_GARTAPERTURECTL, &ctl); |
86 | ctl |= GARTEN; | 86 | ctl |= GARTEN | DISTLBWALKPRB; |
87 | ctl &= ~(DISGARTCPU | DISGARTIO); | 87 | ctl &= ~(DISGARTCPU | DISGARTIO); |
88 | pci_write_config_dword(dev, AMD64_GARTAPERTURECTL, ctl); | 88 | pci_write_config_dword(dev, AMD64_GARTAPERTURECTL, ctl); |
89 | } | 89 | } |
diff --git a/arch/x86/kernel/aperture_64.c b/arch/x86/kernel/aperture_64.c index 86d1ad4962a7..73fb469908c6 100644 --- a/arch/x86/kernel/aperture_64.c +++ b/arch/x86/kernel/aperture_64.c | |||
@@ -499,7 +499,7 @@ out: | |||
499 | * Don't enable translation yet but enable GART IO and CPU | 499 | * Don't enable translation yet but enable GART IO and CPU |
500 | * accesses and set DISTLBWALKPRB since GART table memory is UC. | 500 | * accesses and set DISTLBWALKPRB since GART table memory is UC. |
501 | */ | 501 | */ |
502 | u32 ctl = DISTLBWALKPRB | aper_order << 1; | 502 | u32 ctl = aper_order << 1; |
503 | 503 | ||
504 | bus = amd_nb_bus_dev_ranges[i].bus; | 504 | bus = amd_nb_bus_dev_ranges[i].bus; |
505 | dev_base = amd_nb_bus_dev_ranges[i].dev_base; | 505 | dev_base = amd_nb_bus_dev_ranges[i].dev_base; |