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-rw-r--r--drivers/pci/quirks.c52
1 files changed, 0 insertions, 52 deletions
diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
index 53a786fd0d40..ff01bfb3cc29 100644
--- a/drivers/pci/quirks.c
+++ b/drivers/pci/quirks.c
@@ -2618,58 +2618,6 @@ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATI, 0x4375,
2618 2618
2619#endif /* CONFIG_PCI_MSI */ 2619#endif /* CONFIG_PCI_MSI */
2620 2620
2621#ifdef CONFIG_PCI_IOV
2622
2623/*
2624 * For Intel 82576 SR-IOV NIC, if BIOS doesn't allocate resources for the
2625 * SR-IOV BARs, zero the Flash BAR and program the SR-IOV BARs to use the
2626 * old Flash Memory Space.
2627 */
2628static void __devinit quirk_i82576_sriov(struct pci_dev *dev)
2629{
2630 int pos, flags;
2631 u32 bar, start, size;
2632
2633 if (PAGE_SIZE > 0x10000)
2634 return;
2635
2636 flags = pci_resource_flags(dev, 0);
2637 if ((flags & PCI_BASE_ADDRESS_SPACE) !=
2638 PCI_BASE_ADDRESS_SPACE_MEMORY ||
2639 (flags & PCI_BASE_ADDRESS_MEM_TYPE_MASK) !=
2640 PCI_BASE_ADDRESS_MEM_TYPE_32)
2641 return;
2642
2643 pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_SRIOV);
2644 if (!pos)
2645 return;
2646
2647 pci_read_config_dword(dev, pos + PCI_SRIOV_BAR, &bar);
2648 if (bar & PCI_BASE_ADDRESS_MEM_MASK)
2649 return;
2650
2651 start = pci_resource_start(dev, 1);
2652 size = pci_resource_len(dev, 1);
2653 if (!start || size != 0x400000 || start & (size - 1))
2654 return;
2655
2656 pci_resource_flags(dev, 1) = 0;
2657 pci_write_config_dword(dev, PCI_BASE_ADDRESS_1, 0);
2658 pci_write_config_dword(dev, pos + PCI_SRIOV_BAR, start);
2659 pci_write_config_dword(dev, pos + PCI_SRIOV_BAR + 12, start + size / 2);
2660
2661 dev_info(&dev->dev, "use Flash Memory Space for SR-IOV BARs\n");
2662}
2663DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x10c9, quirk_i82576_sriov);
2664DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x10e6, quirk_i82576_sriov);
2665DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x10e7, quirk_i82576_sriov);
2666DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x10e8, quirk_i82576_sriov);
2667DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x150a, quirk_i82576_sriov);
2668DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x150d, quirk_i82576_sriov);
2669DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x1518, quirk_i82576_sriov);
2670
2671#endif /* CONFIG_PCI_IOV */
2672
2673/* Allow manual resource allocation for PCI hotplug bridges 2621/* Allow manual resource allocation for PCI hotplug bridges
2674 * via pci=hpmemsize=nnM and pci=hpiosize=nnM parameters. For 2622 * via pci=hpmemsize=nnM and pci=hpiosize=nnM parameters. For
2675 * some PCI-PCI hotplug bridges, like PLX 6254 (former HINT HB6), 2623 * some PCI-PCI hotplug bridges, like PLX 6254 (former HINT HB6),