349 files changed, 5659 insertions, 1843 deletions

diff --git a/Documentation/hwmon/lm93 b/Documentation/hwmon/lm93
index 7a10616d0b44..f3b2ad2ceb01 100644
--- a/Documentation/hwmon/lm93
+++ b/Documentation/hwmon/lm93
@@ -6,6 +6,10 @@ Supported chips:
     Prefix 'lm93'
     Addresses scanned: I2C 0x2c-0x2e
     Datasheet: http://www.national.com/ds.cgi/LM/LM93.pdf
+  * National Semiconductor LM94
+    Prefix 'lm94'
+    Addresses scanned: I2C 0x2c-0x2e
+    Datasheet: http://www.national.com/ds.cgi/LM/LM94.pdf
 
 Authors:
         Mark M. Hoffman <mhoffman@lightlink.com>
@@ -56,6 +60,9 @@ previous motherboard management ASICs and uses some of the LM85's features
 for dynamic Vccp monitoring and PROCHOT. It is designed to monitor a dual
 processor Xeon class motherboard with a minimum of external components.
 
+LM94 is also supported in LM93 compatible mode. Extra sensors and features of
+LM94 are not supported.
+
 
 User Interface
 --------------
diff --git a/Makefile b/Makefile
index 6a457690d10b..abb49bf8596e 100644
--- a/Makefile
+++ b/Makefile
@@ -1,7 +1,7 @@
 VERSION = 2
 PATCHLEVEL = 6
-SUBLEVEL = 37
-EXTRAVERSION =
+SUBLEVEL = 38
+EXTRAVERSION = -rc1
 NAME = Flesh-Eating Bats with Fangs
 
 # *DOCUMENTATION*
diff --git a/arch/arm/mach-s5p6442/mach-smdk6442.c b/arch/arm/mach-s5p6442/mach-smdk6442.c
index e69f137b0a39..eaf6b9c489ff 100644
--- a/arch/arm/mach-s5p6442/mach-smdk6442.c
+++ b/arch/arm/mach-s5p6442/mach-smdk6442.c
@@ -68,6 +68,7 @@ static struct s3c2410_uartcfg smdk6442_uartcfgs[] __initdata = {
 
 static struct platform_device *smdk6442_devices[] __initdata = {
         &s3c_device_i2c0,
+        &samsung_asoc_dma,
         &s5p6442_device_iis0,
         &s3c_device_wdt,
 };
diff --git a/arch/arm/mach-s5p64x0/mach-smdk6440.c b/arch/arm/mach-s5p64x0/mach-smdk6440.c
index e9802755daeb..e5beb84e2393 100644
--- a/arch/arm/mach-s5p64x0/mach-smdk6440.c
+++ b/arch/arm/mach-s5p64x0/mach-smdk6440.c
@@ -95,6 +95,7 @@ static struct platform_device *smdk6440_devices[] __initdata = {
         &s3c_device_i2c1,
         &s3c_device_ts,
         &s3c_device_wdt,
+        &samsung_asoc_dma,
         &s5p6440_device_iis,
 };
 
diff --git a/arch/arm/mach-s5p64x0/mach-smdk6450.c b/arch/arm/mach-s5p64x0/mach-smdk6450.c
index b78f56292780..3a20de0a9264 100644
--- a/arch/arm/mach-s5p64x0/mach-smdk6450.c
+++ b/arch/arm/mach-s5p64x0/mach-smdk6450.c
@@ -113,6 +113,7 @@ static struct platform_device *smdk6450_devices[] __initdata = {
         &s3c_device_i2c1,
         &s3c_device_ts,
         &s3c_device_wdt,
+        &samsung_asoc_dma,
         &s5p6450_device_iis0,
         /* s5p6450_device_spi0 will be added */
 };
diff --git a/arch/arm/mach-s5pv210/mach-smdkc110.c b/arch/arm/mach-s5pv210/mach-smdkc110.c
index bb20a14da100..ce11a02eabf3 100644
--- a/arch/arm/mach-s5pv210/mach-smdkc110.c
+++ b/arch/arm/mach-s5pv210/mach-smdkc110.c
@@ -81,6 +81,7 @@ static struct s3c_ide_platdata smdkc110_ide_pdata __initdata = {
 };
 
 static struct platform_device *smdkc110_devices[] __initdata = {
+        &samsung_asoc_dma,
         &s5pv210_device_iis0,
         &s5pv210_device_ac97,
         &s5pv210_device_spdif,
diff --git a/arch/arm/mach-s5pv210/mach-smdkv210.c b/arch/arm/mach-s5pv210/mach-smdkv210.c
index 88e45223c8af..bc9fdb52a020 100644
--- a/arch/arm/mach-s5pv210/mach-smdkv210.c
+++ b/arch/arm/mach-s5pv210/mach-smdkv210.c
@@ -225,6 +225,7 @@ static struct platform_device *smdkv210_devices[] __initdata = {
         &s5pv210_device_ac97,
         &s5pv210_device_iis0,
         &s5pv210_device_spdif,
+        &samsung_asoc_dma,
         &samsung_device_keypad,
         &smdkv210_dm9000,
         &smdkv210_lcd_lte480wv,
diff --git a/arch/arm/mach-s5pv310/mach-smdkc210.c b/arch/arm/mach-s5pv310/mach-smdkc210.c
index 2d49273c0a26..d9cab02e23ca 100644
--- a/arch/arm/mach-s5pv310/mach-smdkc210.c
+++ b/arch/arm/mach-s5pv310/mach-smdkc210.c
@@ -163,8 +163,9 @@ static struct platform_device *smdkc210_devices[] __initdata = {
         &s5pv310_device_pd[PD_CAM],
         &s5pv310_device_pd[PD_TV],
         &s5pv310_device_pd[PD_GPS],
-        &smdkc210_smsc911x,
         &s5pv310_device_sysmmu,
+        &samsung_asoc_dma,
+        &smdkc210_smsc911x,
 };
 
 static void __init smdkc210_smsc911x_init(void)
diff --git a/arch/arm/mach-s5pv310/mach-smdkv310.c b/arch/arm/mach-s5pv310/mach-smdkv310.c
index 28680cf9a72c..b1cddbf3c616 100644
--- a/arch/arm/mach-s5pv310/mach-smdkv310.c
+++ b/arch/arm/mach-s5pv310/mach-smdkv310.c
@@ -163,8 +163,9 @@ static struct platform_device *smdkv310_devices[] __initdata = {
         &s5pv310_device_pd[PD_CAM],
         &s5pv310_device_pd[PD_TV],
         &s5pv310_device_pd[PD_GPS],
-        &smdkv310_smsc911x,
         &s5pv310_device_sysmmu,
+        &samsung_asoc_dma,
+        &smdkv310_smsc911x,
 };
 
 static void __init smdkv310_smsc911x_init(void)
diff --git a/arch/m68k/include/asm/cacheflush_no.h b/arch/m68k/include/asm/cacheflush_no.h
index 7085bd51668b..cb88aa96c4f1 100644
--- a/arch/m68k/include/asm/cacheflush_no.h
+++ b/arch/m68k/include/asm/cacheflush_no.h
@@ -2,21 +2,22 @@
 #define _M68KNOMMU_CACHEFLUSH_H
 
 /*
- * (C) Copyright 2000-2004, Greg Ungerer <gerg@snapgear.com>
+ * (C) Copyright 2000-2010, Greg Ungerer <gerg@snapgear.com>
  */
 #include <linux/mm.h>
+#include <asm/mcfsim.h>
 
 #define flush_cache_all()                       __flush_cache_all()
 #define flush_cache_mm(mm)                      do { } while (0)
 #define flush_cache_dup_mm(mm)                  do { } while (0)
-#define flush_cache_range(vma, start, end)      __flush_cache_all()
+#define flush_cache_range(vma, start, end)      do { } while (0)
 #define flush_cache_page(vma, vmaddr)           do { } while (0)
-#define flush_dcache_range(start,len)           __flush_cache_all()
+#define flush_dcache_range(start, len)          __flush_dcache_all()
 #define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 0
 #define flush_dcache_page(page)                 do { } while (0)
 #define flush_dcache_mmap_lock(mapping)         do { } while (0)
 #define flush_dcache_mmap_unlock(mapping)       do { } while (0)
-#define flush_icache_range(start,len)           __flush_cache_all()
+#define flush_icache_range(start, len)          __flush_icache_all()
 #define flush_icache_page(vma,pg)               do { } while (0)
 #define flush_icache_user_range(vma,pg,adr,len) do { } while (0)
 #define flush_cache_vmap(start, end)            do { } while (0)
@@ -27,66 +28,52 @@
 #define copy_from_user_page(vma, page, vaddr, dst, src, len) \
         memcpy(dst, src, len)
 
+void mcf_cache_push(void);
+
 static inline void __flush_cache_all(void)
 {
-#if defined(CONFIG_M5407) || defined(CONFIG_M548x)
-        /*
-         *      Use cpushl to push and invalidate all cache lines.
-         *      Gas doesn't seem to know how to generate the ColdFire
-         *      cpushl instruction... Oh well, bit stuff it for now.
-         */
-        __asm__ __volatile__ (
-                "nop\n\t"
-                "clrl   %%d0\n\t"
-                "1:\n\t"
-                "movel  %%d0,%%a0\n\t"
-                "2:\n\t"
-                ".word  0xf468\n\t"
-                "addl   #0x10,%%a0\n\t"
-                "cmpl   #0x00000800,%%a0\n\t"
-                "blt    2b\n\t"
-                "addql  #1,%%d0\n\t"
-                "cmpil  #4,%%d0\n\t"
-                "bne    1b\n\t"
-                "movel  #0xb6088500,%%d0\n\t"
-                "movec  %%d0,%%CACR\n\t"
-                : : : "d0", "a0" );
-#endif /* CONFIG_M5407 */
-#if defined(CONFIG_M523x) || defined(CONFIG_M527x)
-        __asm__ __volatile__ (
-                "movel  #0x81400100, %%d0\n\t"
-                "movec  %%d0, %%CACR\n\t"
-                "nop\n\t"
-                : : : "d0" );
-#endif /* CONFIG_M523x || CONFIG_M527x */
-#if defined(CONFIG_M528x)
-        __asm__ __volatile__ (
-                "movel  #0x81000200, %%d0\n\t"
-                "movec  %%d0, %%CACR\n\t"
-                "nop\n\t"
-                : : : "d0" );
-#endif /* CONFIG_M528x */
-#if defined(CONFIG_M5206) || defined(CONFIG_M5206e) || defined(CONFIG_M5272)
+#ifdef CACHE_PUSH
+        mcf_cache_push();
+#endif
+#ifdef CACHE_INVALIDATE
         __asm__ __volatile__ (
-                "movel  #0x81000100, %%d0\n\t"
+                "movel  %0, %%d0\n\t"
                 "movec  %%d0, %%CACR\n\t"
                 "nop\n\t"
-                : : : "d0" );
-#endif /* CONFIG_M5206 || CONFIG_M5206e || CONFIG_M5272 */
-#ifdef CONFIG_M5249
+                : : "i" (CACHE_INVALIDATE) : "d0" );
+#endif
+}
+
+/*
+ * Some ColdFire parts implement separate instruction and data caches,
+ * on those we should just flush the appropriate cache. If we don't need
+ * to do any specific flushing then this will be optimized away.
+ */
+static inline void __flush_icache_all(void)
+{
+#ifdef CACHE_INVALIDATEI
         __asm__ __volatile__ (
-                "movel  #0xa1000200, %%d0\n\t"
+                "movel  %0, %%d0\n\t"
                 "movec  %%d0, %%CACR\n\t"
                 "nop\n\t"
-                : : : "d0" );
-#endif /* CONFIG_M5249 */
-#ifdef CONFIG_M532x
+                : : "i" (CACHE_INVALIDATEI) : "d0" );
+#endif
+}
+
+static inline void __flush_dcache_all(void)
+{
+#ifdef CACHE_PUSH
+        mcf_cache_push();
+#endif
+#ifdef CACHE_INVALIDATED
         __asm__ __volatile__ (
-                "movel  #0x81000200, %%d0\n\t"
+                "movel  %0, %%d0\n\t"
                 "movec  %%d0, %%CACR\n\t"
                 "nop\n\t"
-                : : : "d0" );
-#endif /* CONFIG_M532x */
+                : : "i" (CACHE_INVALIDATED) : "d0" );
+#else
+        /* Flush the wrtite buffer */
+        __asm__ __volatile__ ( "nop" );
+#endif
 }
-
 #endif /* _M68KNOMMU_CACHEFLUSH_H */
diff --git a/arch/m68k/include/asm/coldfire.h b/arch/m68k/include/asm/coldfire.h
index 3b0a34d0fe33..213028cbe110 100644
--- a/arch/m68k/include/asm/coldfire.h
+++ b/arch/m68k/include/asm/coldfire.h
@@ -32,7 +32,7 @@
  */
 #define MCF_MBAR        0x10000000
 #define MCF_MBAR2       0x80000000
-#if defined(CONFIG_M548x)
+#if defined(CONFIG_M54xx)
 #define MCF_IPSBAR      MCF_MBAR
 #elif defined(CONFIG_M520x)
 #define MCF_IPSBAR      0xFC000000
diff --git a/arch/m68k/include/asm/entry_no.h b/arch/m68k/include/asm/entry_no.h
index 26be277394f9..627d69bacc58 100644
--- a/arch/m68k/include/asm/entry_no.h
+++ b/arch/m68k/include/asm/entry_no.h
@@ -42,12 +42,16 @@
  */
 
 #ifdef CONFIG_COLDFIRE
+#ifdef CONFIG_COLDFIRE_SW_A7
 /*
- * This is made a little more tricky on the ColdFire. There is no
- * separate kernel and user stack pointers. Need to artificially
+ * This is made a little more tricky on older ColdFires. There is no
+ * separate supervisor and user stack pointers. Need to artificially
  * construct a usp in software... When doing this we need to disable
- * interrupts, otherwise bad things could happen.
+ * interrupts, otherwise bad things will happen.
  */
+.globl sw_usp
+.globl sw_ksp
+
 .macro SAVE_ALL
         move    #0x2700,%sr             /* disable intrs */
         btst    #5,%sp@(2)              /* from user? */
@@ -74,9 +78,7 @@
         7:
 .endm
 
-.macro RESTORE_ALL
-        btst    #5,%sp@(PT_SR)          /* going user? */
-        bnes    8f                      /* no, skip */
+.macro RESTORE_USER
         move    #0x2700,%sr             /* disable intrs */
         movel   sw_usp,%a0              /* get usp */
         movel   %sp@(PT_OFF_PC),%a0@-   /* copy exception program counter */
@@ -91,19 +93,22 @@
         subql   #8,sw_usp               /* set exception */
         movel   sw_usp,%sp              /* restore usp */
         rte
-        8:
-        moveml  %sp@,%d1-%d5/%a0-%a2
-        lea     %sp@(32),%sp            /* space for 8 regs */
-        movel   %sp@+,%d0
-        addql   #4,%sp                  /* orig d0 */
-        addl    %sp@+,%sp               /* stkadj */
-        rte
 .endm
 
+.macro RDUSP
+        movel   sw_usp,%a2
+.endm
+
+.macro WRUSP
+        movel   %a0,sw_usp
+.endm
+
+#else /* !CONFIG_COLDFIRE_SW_A7 */
 /*
- * Quick exception save, use current stack only.
+ * Modern ColdFire parts have separate supervisor and user stack
+ * pointers. Simple load and restore macros for this case.
  */
-.macro SAVE_LOCAL
+.macro SAVE_ALL
         move    #0x2700,%sr             /* disable intrs */
         clrl    %sp@-                   /* stkadj */
         movel   %d0,%sp@-               /* orig d0 */
@@ -112,7 +117,7 @@
         moveml  %d1-%d5/%a0-%a2,%sp@
 .endm
 
-.macro RESTORE_LOCAL
+.macro RESTORE_USER
         moveml  %sp@,%d1-%d5/%a0-%a2
         lea     %sp@(32),%sp            /* space for 8 regs */
         movel   %sp@+,%d0
@@ -121,6 +126,18 @@
         rte
 .endm
 
+.macro RDUSP
+        /*move  %usp,%a2*/
+        .word   0x4e6a
+.endm
+
+.macro WRUSP
+        /*move  %a0,%usp*/
+        .word   0x4e60
+.endm
+
+#endif /* !CONFIG_COLDFIRE_SW_A7 */
+
 .macro SAVE_SWITCH_STACK
         lea     %sp@(-24),%sp           /* 6 regs */
         moveml  %a3-%a6/%d6-%d7,%sp@
@@ -131,14 +148,6 @@
         lea     %sp@(24),%sp            /* 6 regs */
 .endm
 
-/*
- * Software copy of the user and kernel stack pointers... Ugh...
- * Need these to get around ColdFire not having separate kernel
- * and user stack pointers.
- */
-.globl sw_usp
-.globl sw_ksp
-
 #else /* !CONFIG_COLDFIRE */
 
 /*
@@ -167,6 +176,6 @@
         moveml  %sp@+,%a3-%a6/%d6-%d7
 .endm
 
-#endif /* !CONFIG_COLDFIRE */
+#endif /* !COLDFIRE_SW_A7 */
 #endif /* __ASSEMBLY__ */
 #endif /* __M68KNOMMU_ENTRY_H */
diff --git a/arch/m68k/include/asm/gpio.h b/arch/m68k/include/asm/gpio.h
index 1b57adbafad5..c64c7b74cf86 100644
--- a/arch/m68k/include/asm/gpio.h
+++ b/arch/m68k/include/asm/gpio.h
@@ -37,7 +37,7 @@
 #if defined(CONFIG_M5206) || defined(CONFIG_M5206e) || \
     defined(CONFIG_M520x) || defined(CONFIG_M523x) || \
     defined(CONFIG_M527x) || defined(CONFIG_M528x) || \
-    defined(CONFIG_M532x) || defined(CONFIG_M548x)
+    defined(CONFIG_M532x) || defined(CONFIG_M54xx)
 
 /* These parts have GPIO organized by 8 bit ports */
 
diff --git a/arch/m68k/include/asm/io_no.h b/arch/m68k/include/asm/io_no.h
index 6e2413e518cb..cf20f3097af6 100644
--- a/arch/m68k/include/asm/io_no.h
+++ b/arch/m68k/include/asm/io_no.h
@@ -145,7 +145,6 @@ static inline void io_insl(unsigned int addr, void *buf, int len)
 #define IOMAP_WRITETHROUGH              3
 
 extern void *__ioremap(unsigned long physaddr, unsigned long size, int cacheflag);
-extern void __iounmap(void *addr, unsigned long size);
 
 static inline void *ioremap(unsigned long physaddr, unsigned long size)
 {
diff --git a/arch/m68k/include/asm/m5206sim.h b/arch/m68k/include/asm/m5206sim.h
index 9c384e294af9..561b03b5ddf8 100644
--- a/arch/m68k/include/asm/m5206sim.h
+++ b/arch/m68k/include/asm/m5206sim.h
@@ -12,6 +12,10 @@
 #define m5206sim_h
 /****************************************************************************/
 
+#define CPU_NAME                "COLDFIRE(m5206)"
+#define CPU_INSTR_PER_JIFFY     3
+
+#include <asm/m52xxacr.h>
 
 /*
  *      Define the 5206 SIM register set addresses.
@@ -88,6 +92,14 @@
 #define MCFSIM_PADDR            (MCF_MBAR + 0x1c5)      /* Parallel Direction (r/w) */
 #define MCFSIM_PADAT            (MCF_MBAR + 0x1c9)      /* Parallel Port Value (r/w) */
 
+#if defined(CONFIG_NETtel)
+#define MCFUART_BASE1           0x180           /* Base address of UART1 */
+#define MCFUART_BASE2           0x140           /* Base address of UART2 */
+#else
+#define MCFUART_BASE1           0x140           /* Base address of UART1 */
+#define MCFUART_BASE2           0x180           /* Base address of UART2 */
+#endif
+
 /*
  *      Define system peripheral IRQ usage.
  */
@@ -95,7 +107,7 @@
 #define MCF_IRQ_PROFILER        31              /* Timer1, Level 7 */
 
 /*
- * Generic GPIO
+ *      Generic GPIO
  */
 #define MCFGPIO_PIN_MAX         8
 #define MCFGPIO_IRQ_VECBASE     -1
diff --git a/arch/m68k/include/asm/m520xsim.h b/arch/m68k/include/asm/m520xsim.h
index db824a4b136e..88ed8239fe4e 100644
--- a/arch/m68k/include/asm/m520xsim.h
+++ b/arch/m68k/include/asm/m520xsim.h
@@ -11,6 +11,11 @@
 #define m520xsim_h
 /****************************************************************************/
 
+#define CPU_NAME                "COLDFIRE(m520x)"
+#define CPU_INSTR_PER_JIFFY     3
+
+#include <asm/m52xxacr.h>
+
 /*
  *  Define the 520x SIM register set addresses.
  */
@@ -54,6 +59,9 @@
 #define MCFSIM_SDCS0        0x000a8110  /* SDRAM Chip Select 0 Configuration */
 #define MCFSIM_SDCS1        0x000a8114  /* SDRAM Chip Select 1 Configuration */
 
+/*
+ * EPORT and GPIO registers.
+ */
 #define MCFEPORT_EPDDR                  0xFC088002
 #define MCFEPORT_EPDR                   0xFC088004
 #define MCFEPORT_EPPDR                  0xFC088005
@@ -97,6 +105,7 @@
 #define MCFGPIO_PCLRR_UART              0xFC0A402A
 #define MCFGPIO_PCLRR_FECH              0xFC0A402B
 #define MCFGPIO_PCLRR_FECL              0xFC0A402C
+
 /*
  * Generic GPIO support
  */
@@ -109,7 +118,6 @@
 #define MCFGPIO_PIN_MAX                 80
 #define MCFGPIO_IRQ_MAX                 8
 #define MCFGPIO_IRQ_VECBASE             MCFINT_VECBASE
-/****************************************************************************/
 
 #define MCF_GPIO_PAR_UART                   (0xA4036)
 #define MCF_GPIO_PAR_FECI2C                 (0xA4033)
@@ -126,6 +134,13 @@
 #define MCF_GPIO_PAR_FECI2C_PAR_SCL_UTXD2   (0x04)
 
 /*
+ *  UART module.
+ */
+#define MCFUART_BASE1           0x60000         /* Base address of UART1 */
+#define MCFUART_BASE2           0x64000         /* Base address of UART2 */
+#define MCFUART_BASE3           0x68000         /* Base address of UART2 */
+
+/*
  *  Reset Controll Unit.
  */
 #define MCF_RCR                 0xFC0A0000
diff --git a/arch/m68k/include/asm/m523xsim.h b/arch/m68k/include/asm/m523xsim.h
index e8d06b24a48e..4ad7a00257a8 100644
--- a/arch/m68k/include/asm/m523xsim.h
+++ b/arch/m68k/include/asm/m523xsim.h
@@ -11,6 +11,10 @@
 #define m523xsim_h
 /****************************************************************************/
 
+#define CPU_NAME                "COLDFIRE(m523x)"
+#define CPU_INSTR_PER_JIFFY     3
+
+#include <asm/m52xxacr.h>
 
 /*
  *      Define the 523x SIM register set addresses.
@@ -50,6 +54,13 @@
 #define MCF_RCR_SWRESET         0x80            /* Software reset bit */
 #define MCF_RCR_FRCSTOUT        0x40            /* Force external reset */
 
+/*
+ *  UART module.
+ */
+#define MCFUART_BASE1           0x200           /* Base address of UART1 */
+#define MCFUART_BASE2           0x240           /* Base address of UART2 */
+#define MCFUART_BASE3           0x280           /* Base address of UART3 */
+
 #define MCFGPIO_PODR_ADDR       (MCF_IPSBAR + 0x100000)
 #define MCFGPIO_PODR_DATAH      (MCF_IPSBAR + 0x100001)
 #define MCFGPIO_PODR_DATAL      (MCF_IPSBAR + 0x100002)
diff --git a/arch/m68k/include/asm/m5249sim.h b/arch/m68k/include/asm/m5249sim.h
index 79b7b402f3c9..4908b118f2fd 100644
--- a/arch/m68k/include/asm/m5249sim.h
+++ b/arch/m68k/include/asm/m5249sim.h
@@ -11,6 +11,11 @@
 #define m5249sim_h
 /****************************************************************************/
 
+#define CPU_NAME                "COLDFIRE(m5249)"
+#define CPU_INSTR_PER_JIFFY     3
+
+#include <asm/m52xxacr.h>
+
 /*
  *      Define the 5249 SIM register set addresses.
  */
@@ -56,6 +61,11 @@
 #define MCFSIM_DACR1            0x110           /* DRAM 1 Addr and Ctrl (r/w) */
 #define MCFSIM_DMR1             0x114           /* DRAM 1 Mask reg (r/w) */
 
+/*
+ *      UART module.
+ */
+#define MCFUART_BASE1           0x1c0           /* Base address of UART1 */
+#define MCFUART_BASE2           0x200           /* Base address of UART2 */
 
 /*
  *      Some symbol defines for the above...
diff --git a/arch/m68k/include/asm/m5272sim.h b/arch/m68k/include/asm/m5272sim.h
index df3332c2317d..b7cc50abc831 100644
--- a/arch/m68k/include/asm/m5272sim.h
+++ b/arch/m68k/include/asm/m5272sim.h
@@ -12,6 +12,11 @@
 #define m5272sim_h
 /****************************************************************************/
 
+#define CPU_NAME                "COLDFIRE(m5272)"
+#define CPU_INSTR_PER_JIFFY     3
+
+#include <asm/m52xxacr.h>
+
 /*
  *      Define the 5272 SIM register set addresses.
  */
@@ -62,6 +67,9 @@
 #define MCFSIM_DCMR1            0x5c            /* DRAM 1 Mask reg (r/w) */
 #define MCFSIM_DCCR1            0x63            /* DRAM 1 Control reg (r/w) */
 
+#define MCFUART_BASE1           0x100           /* Base address of UART1 */
+#define MCFUART_BASE2           0x140           /* Base address of UART2 */
+
 #define MCFSIM_PACNT            (MCF_MBAR + 0x80) /* Port A Control (r/w) */
 #define MCFSIM_PADDR            (MCF_MBAR + 0x84) /* Port A Direction (r/w) */
 #define MCFSIM_PADAT            (MCF_MBAR + 0x86) /* Port A Data (r/w) */
diff --git a/arch/m68k/include/asm/m527xsim.h b/arch/m68k/include/asm/m527xsim.h
index 1feb46f108ce..e8042e8bc003 100644
--- a/arch/m68k/include/asm/m527xsim.h
+++ b/arch/m68k/include/asm/m527xsim.h
@@ -11,6 +11,10 @@
 #define m527xsim_h
 /****************************************************************************/
 
+#define CPU_NAME                "COLDFIRE(m527x)"
+#define CPU_INSTR_PER_JIFFY     3
+
+#include <asm/m52xxacr.h>
 
 /*
  *      Define the 5270/5271 SIM register set addresses.
@@ -55,6 +59,12 @@
 #define MCFSIM_DMR1             0x5c            /* SDRAM address mask 1 */
 #endif
 
+/*
+ *      UART module.
+ */
+#define MCFUART_BASE1           0x200           /* Base address of UART1 */
+#define MCFUART_BASE2           0x240           /* Base address of UART2 */
+#define MCFUART_BASE3           0x280           /* Base address of UART3 */
 
 #ifdef CONFIG_M5271
 #define MCFGPIO_PODR_ADDR       (MCF_IPSBAR + 0x100000)
diff --git a/arch/m68k/include/asm/m528xsim.h b/arch/m68k/include/asm/m528xsim.h
index 891cbedad972..a6d2f4d9aaa0 100644
--- a/arch/m68k/include/asm/m528xsim.h
+++ b/arch/m68k/include/asm/m528xsim.h
@@ -11,6 +11,10 @@
 #define m528xsim_h
 /****************************************************************************/
 
+#define CPU_NAME                "COLDFIRE(m528x)"
+#define CPU_INSTR_PER_JIFFY     3
+
+#include <asm/m52xxacr.h>
 
 /*
  *      Define the 5280/5282 SIM register set addresses.
@@ -42,6 +46,13 @@
 #define MCFSIM_DMR1             0x54            /* SDRAM address mask 1 */
 
 /*
+ *      UART module.
+ */
+#define MCFUART_BASE1           0x200           /* Base address of UART1 */
+#define MCFUART_BASE2           0x240           /* Base address of UART2 */
+#define MCFUART_BASE3           0x280           /* Base address of UART3 */
+
+/*
  *      GPIO registers
  */
 #define MCFGPIO_PORTA           (MCF_IPSBAR + 0x00100000)
diff --git a/arch/m68k/include/asm/m52xxacr.h b/arch/m68k/include/asm/m52xxacr.h
new file mode 100644
index 000000000000..abc391a9ae8d
--- /dev/null
+++ b/arch/m68k/include/asm/m52xxacr.h
@@ -0,0 +1,94 @@
+/****************************************************************************/
+
+/*
+ * m52xxacr.h -- ColdFire version 2 core cache support
+ *
+ * (C) Copyright 2010, Greg Ungerer <gerg@snapgear.com>
+ */
+
+/****************************************************************************/
+#ifndef m52xxacr_h
+#define m52xxacr_h
+/****************************************************************************/
+
+/*
+ * All varients of the ColdFire using version 2 cores have a similar
+ * cache setup. Although not absolutely identical the cache register
+ * definitions are compatible for all of them. Mostly they support a
+ * configurable cache memory that can be instruction only, data only,
+ * or split instruction and data. The exception is the very old version 2
+ * core based parts, like the 5206(e), 5249 and 5272, which are instruction
+ * cache only. Cache size varies from 2k up to 16k.
+ */
+
+/*
+ * Define the Cache Control register flags.
+ */
+#define CACR_CENB       0x80000000      /* Enable cache */
+#define CACR_CDPI       0x10000000      /* Disable invalidation by CPUSHL */
+#define CACR_CFRZ       0x08000000      /* Cache freeze mode */
+#define CACR_CINV       0x01000000      /* Invalidate cache */
+#define CACR_DISI       0x00800000      /* Disable instruction cache */
+#define CACR_DISD       0x00400000      /* Disable data cache */
+#define CACR_INVI       0x00200000      /* Invalidate instruction cache */
+#define CACR_INVD       0x00100000      /* Invalidate data cache */
+#define CACR_CEIB       0x00000400      /* Non-cachable instruction burst */
+#define CACR_DCM        0x00000200      /* Default cache mode */
+#define CACR_DBWE       0x00000100      /* Buffered write enable */
+#define CACR_DWP        0x00000020      /* Write protection */
+#define CACR_EUSP       0x00000010      /* Enable separate user a7 */
+
+/*
+ * Define the Access Control register flags.
+ */
+#define ACR_BASE_POS    24              /* Address Base (upper 8 bits) */
+#define ACR_MASK_POS    16              /* Address Mask (next 8 bits) */
+#define ACR_ENABLE      0x00008000      /* Enable this ACR */
+#define ACR_USER        0x00000000      /* Allow only user accesses */
+#define ACR_SUPER       0x00002000      /* Allow supervisor access only */
+#define ACR_ANY         0x00004000      /* Allow any access type */
+#define ACR_CENB        0x00000000      /* Caching of region enabled */
+#define ACR_CDIS        0x00000040      /* Caching of region disabled */
+#define ACR_BWE         0x00000020      /* Write buffer enabled */
+#define ACR_WPROTECT    0x00000004      /* Write protect region */
+
+/*
+ * Set the cache controller settings we will use. On the cores that support
+ * a split cache configuration we allow all the combinations at Kconfig
+ * time. For those cores that only have an instruction cache we just set
+ * that as on.
+ */
+#if defined(CONFIG_CACHE_I)
+#define CACHE_TYPE      (CACR_DISD + CACR_EUSP)
+#define CACHE_INVTYPEI  0
+#elif defined(CONFIG_CACHE_D)
+#define CACHE_TYPE      (CACR_DISI + CACR_EUSP)
+#define CACHE_INVTYPED  0
+#elif defined(CONFIG_CACHE_BOTH)
+#define CACHE_TYPE      CACR_EUSP
+#define CACHE_INVTYPEI  CACR_INVI
+#define CACHE_INVTYPED  CACR_INVD
+#else
+/* This is the instruction cache only devices (no split cache, no eusp) */
+#define CACHE_TYPE      0
+#define CACHE_INVTYPEI  0
+#endif
+
+#define CACHE_INIT      (CACR_CINV + CACHE_TYPE)
+#define CACHE_MODE      (CACR_CENB + CACHE_TYPE + CACR_DCM)
+
+#define CACHE_INVALIDATE  (CACHE_MODE + CACR_CINV)
+#if defined(CACHE_INVTYPEI)
+#define CACHE_INVALIDATEI (CACHE_MODE + CACR_CINV + CACHE_INVTYPEI)
+#endif
+#if defined(CACHE_INVTYPED)
+#define CACHE_INVALIDATED (CACHE_MODE + CACR_CINV + CACHE_INVTYPED)
+#endif
+
+#define ACR0_MODE       ((CONFIG_RAMBASE & 0xff000000) + \
+                         (0x000f0000) + \
+                         (ACR_ENABLE + ACR_ANY + ACR_CENB + ACR_BWE))
+#define ACR1_MODE       0
+
+/****************************************************************************/
+#endif  /* m52xxsim_h */
diff --git a/arch/m68k/include/asm/m5307sim.h b/arch/m68k/include/asm/m5307sim.h
index c6830e5b54ce..0bf57397e7a9 100644
--- a/arch/m68k/include/asm/m5307sim.h
+++ b/arch/m68k/include/asm/m5307sim.h
@@ -14,6 +14,11 @@
 #define m5307sim_h
 /****************************************************************************/
 
+#define CPU_NAME                "COLDFIRE(m5307)"
+#define CPU_INSTR_PER_JIFFY     3
+
+#include <asm/m53xxacr.h>
+
 /*
  *      Define the 5307 SIM register set addresses.
  */
@@ -94,6 +99,17 @@
 #define MCFSIM_PADAT            (MCF_MBAR + 0x248)
 
 /*
+ *  UART module.
+ */
+#if defined(CONFIG_NETtel) || defined(CONFIG_SECUREEDGEMP3)
+#define MCFUART_BASE1           0x200           /* Base address of UART1 */
+#define MCFUART_BASE2           0x1c0           /* Base address of UART2 */
+#else
+#define MCFUART_BASE1           0x1c0           /* Base address of UART1 */
+#define MCFUART_BASE2           0x200           /* Base address of UART2 */
+#endif
+
+/*
  * Generic GPIO support
  */
 #define MCFGPIO_PIN_MAX                 16
@@ -146,32 +162,5 @@
 #define MCF_IRQ_TIMER           30              /* Timer0, Level 6 */
 #define MCF_IRQ_PROFILER        31              /* Timer1, Level 7 */
 
-/*
- *      Define the Cache register flags.
- */
-#define CACR_EC                 (1<<31)
-#define CACR_ESB                (1<<29)
-#define CACR_DPI                (1<<28)
-#define CACR_HLCK               (1<<27)
-#define CACR_CINVA              (1<<24)
-#define CACR_DNFB               (1<<10)
-#define CACR_DCM_WTHRU          (0<<8)
-#define CACR_DCM_WBACK          (1<<8)
-#define CACR_DCM_OFF_PRE        (2<<8)
-#define CACR_DCM_OFF_IMP        (3<<8)
-#define CACR_DW                 (1<<5)
-
-#define ACR_BASE_POS            24
-#define ACR_MASK_POS            16
-#define ACR_ENABLE              (1<<15)
-#define ACR_USER                (0<<13)
-#define ACR_SUPER               (1<<13)
-#define ACR_ANY                 (2<<13)
-#define ACR_CM_WTHRU            (0<<5)
-#define ACR_CM_WBACK            (1<<5)
-#define ACR_CM_OFF_PRE          (2<<5)
-#define ACR_CM_OFF_IMP          (3<<5)
-#define ACR_WPROTECT            (1<<2)
-
 /****************************************************************************/
 #endif  /* m5307sim_h */
diff --git a/arch/m68k/include/asm/m532xsim.h b/arch/m68k/include/asm/m532xsim.h
index c4bf1c81e3cf..e6470f8ca324 100644
--- a/arch/m68k/include/asm/m532xsim.h
+++ b/arch/m68k/include/asm/m532xsim.h
@@ -9,6 +9,11 @@
 #define m532xsim_h
 /****************************************************************************/
 
+#define CPU_NAME                "COLDFIRE(m532x)"
+#define CPU_INSTR_PER_JIFFY     3
+
+#include <asm/m53xxacr.h>
+
 #define MCF_REG32(x) (*(volatile unsigned long  *)(x))
 #define MCF_REG16(x) (*(volatile unsigned short *)(x))
 #define MCF_REG08(x) (*(volatile unsigned char  *)(x))
@@ -74,31 +79,11 @@
 #define MCF_IRQ_PROFILER        (64 + 33)       /* Timer1 */
 
 /*
- *      Define the Cache register flags.
+ *  UART module.
  */
-#define CACR_EC                 (1<<31)
-#define CACR_ESB                (1<<29)
-#define CACR_DPI                (1<<28)
-#define CACR_HLCK               (1<<27)
-#define CACR_CINVA              (1<<24)
-#define CACR_DNFB               (1<<10)
-#define CACR_DCM_WTHRU          (0<<8)
-#define CACR_DCM_WBACK          (1<<8)
-#define CACR_DCM_OFF_PRE        (2<<8)
-#define CACR_DCM_OFF_IMP        (3<<8)
-#define CACR_DW                 (1<<5)
-
-#define ACR_BASE_POS            24
-#define ACR_MASK_POS            16
-#define ACR_ENABLE              (1<<15)
-#define ACR_USER                (0<<13)
-#define ACR_SUPER               (1<<13)
-#define ACR_ANY                 (2<<13)
-#define ACR_CM_WTHRU            (0<<5)
-#define ACR_CM_WBACK            (1<<5)
-#define ACR_CM_OFF_PRE          (2<<5)
-#define ACR_CM_OFF_IMP          (3<<5)
-#define ACR_WPROTECT            (1<<2)
+#define MCFUART_BASE1           0xFC060000      /* Base address of UART1 */
+#define MCFUART_BASE2           0xFC064000      /* Base address of UART2 */
+#define MCFUART_BASE3           0xFC068000      /* Base address of UART3 */
 
 /*********************************************************************
  *
diff --git a/arch/m68k/include/asm/m53xxacr.h b/arch/m68k/include/asm/m53xxacr.h
new file mode 100644
index 000000000000..cd952b0a8bd3
--- /dev/null
+++ b/arch/m68k/include/asm/m53xxacr.h
@@ -0,0 +1,101 @@
+/****************************************************************************/
+
+/*
+ * m53xxacr.h -- ColdFire version 3 core cache support
+ *
+ * (C) Copyright 2010, Greg Ungerer <gerg@snapgear.com>
+ */
+
+/****************************************************************************/
+#ifndef m53xxacr_h
+#define m53xxacr_h
+/****************************************************************************/
+
+/*
+ * All varients of the ColdFire using version 3 cores have a similar
+ * cache setup. They have a unified instruction and data cache, with
+ * configurable write-through or copy-back operation.
+ */
+
+/*
+ * Define the Cache Control register flags.
+ */
+#define CACR_EC         0x80000000      /* Enable cache */
+#define CACR_ESB        0x20000000      /* Enable store buffer */
+#define CACR_DPI        0x10000000      /* Disable invalidation by CPUSHL */
+#define CACR_HLCK       0x08000000      /* Half cache lock mode */
+#define CACR_CINVA      0x01000000      /* Invalidate cache */
+#define CACR_DNFB       0x00000400      /* Inhibited fill buffer */
+#define CACR_DCM_WT     0x00000000      /* Cacheable write-through */
+#define CACR_DCM_CB     0x00000100      /* Cacheable copy-back */
+#define CACR_DCM_PRE    0x00000200      /* Cache inhibited, precise */
+#define CACR_DCM_IMPRE  0x00000300      /* Cache inhibited, imprecise */
+#define CACR_WPROTECT   0x00000020      /* Write protect*/
+#define CACR_EUSP       0x00000010      /* Eanble separate user a7 */
+
+/*
+ * Define the Access Control register flags.
+ */
+#define ACR_BASE_POS    24              /* Address Base (upper 8 bits) */
+#define ACR_MASK_POS    16              /* Address Mask (next 8 bits) */
+#define ACR_ENABLE      0x00008000      /* Enable this ACR */
+#define ACR_USER        0x00000000      /* Allow only user accesses */
+#define ACR_SUPER       0x00002000      /* Allow supervisor access only */
+#define ACR_ANY         0x00004000      /* Allow any access type */
+#define ACR_CM_WT       0x00000000      /* Cacheable, write-through */
+#define ACR_CM_CB       0x00000020      /* Cacheable, copy-back */
+#define ACR_CM_PRE      0x00000040      /* Cache inhibited, precise */
+#define ACR_CM_IMPRE    0x00000060      /* Cache inhibited, imprecise */
+#define ACR_WPROTECT    0x00000004      /* Write protect region */
+
+/*
+ * Define the cache type and arrangement (needed for pushes).
+ */
+#if defined(CONFIG_M5307)
+#define CACHE_SIZE      0x2000          /* 8k of unified cache */
+#define ICACHE_SIZE     CACHE_SIZE
+#define DCACHE_SIZE     CACHE_SIZE
+#elif defined(CONFIG_M532x)
+#define CACHE_SIZE      0x4000          /* 32k of unified cache */
+#define ICACHE_SIZE     CACHE_SIZE
+#define DCACHE_SIZE     CACHE_SIZE
+#endif
+
+#define CACHE_LINE_SIZE 16              /* 16 byte line size */
+#define CACHE_WAYS      4               /* 4 ways - set associative */
+
+/*
+ * Set the cache controller settings we will use. This default in the
+ * CACR is cache inhibited, we use the ACR register to set cacheing
+ * enabled on the regions we want (eg RAM).
+ */
+#if defined(CONFIG_CACHE_COPYBACK)
+#define CACHE_TYPE      ACR_CM_CB
+#define CACHE_PUSH
+#else
+#define CACHE_TYPE      ACR_CM_WT
+#endif
+
+#ifdef CONFIG_COLDFIRE_SW_A7
+#define CACHE_MODE      (CACR_EC + CACR_ESB + CACR_DCM_PRE)
+#else
+#define CACHE_MODE      (CACR_EC + CACR_ESB + CACR_DCM_PRE + CACR_EUSP)
+#endif
+
+/*
+ * Unified cache means we will never need to flush for coherency of
+ * instruction fetch. We will need to flush to maintain memory/DMA
+ * coherency though in all cases. And for copyback caches we will need
+ * to push cached data as well.
+ */
+#define CACHE_INIT        CACR_CINVA
+#define CACHE_INVALIDATE  CACR_CINVA
+#define CACHE_INVALIDATED CACR_CINVA
+
+#define ACR0_MODE       ((CONFIG_RAMBASE & 0xff000000) + \
+                         (0x000f0000) + \
+                         (ACR_ENABLE + ACR_ANY + CACHE_TYPE))
+#define ACR1_MODE       0
+
+/****************************************************************************/
+#endif  /* m53xxsim_h */
diff --git a/arch/m68k/include/asm/m5407sim.h b/arch/m68k/include/asm/m5407sim.h
index c399abbf953c..75f5c28a551d 100644
--- a/arch/m68k/include/asm/m5407sim.h
+++ b/arch/m68k/include/asm/m5407sim.h
@@ -14,6 +14,11 @@
 #define m5407sim_h
 /****************************************************************************/
 
+#define CPU_NAME                "COLDFIRE(m5407)"
+#define CPU_INSTR_PER_JIFFY     3
+
+#include <asm/m54xxacr.h>
+
 /*
  *      Define the 5407 SIM register set addresses.
  */
@@ -73,6 +78,9 @@
 #define MCFSIM_DACR1            0x110           /* DRAM 1 Addr and Ctrl (r/w) */
 #define MCFSIM_DMR1             0x114           /* DRAM 1 Mask reg (r/w) */
 
+#define MCFUART_BASE1           0x1c0           /* Base address of UART1 */
+#define MCFUART_BASE2           0x200           /* Base address of UART2 */
+
 #define MCFSIM_PADDR            (MCF_MBAR + 0x244)
 #define MCFSIM_PADAT            (MCF_MBAR + 0x248)
 
@@ -117,39 +125,5 @@
 #define MCF_IRQ_TIMER           30              /* Timer0, Level 6 */
 #define MCF_IRQ_PROFILER        31              /* Timer1, Level 7 */
 
-/*
- *      Define the Cache register flags.
- */
-#define CACR_DEC                0x80000000      /* Enable data cache */
-#define CACR_DWP                0x40000000      /* Data write protection */
-#define CACR_DESB               0x20000000      /* Enable data store buffer */
-#define CACR_DDPI               0x10000000      /* Disable CPUSHL */
-#define CACR_DHCLK              0x08000000      /* Half data cache lock mode */
-#define CACR_DDCM_WT            0x00000000      /* Write through cache*/
-#define CACR_DDCM_CP            0x02000000      /* Copyback cache */
-#define CACR_DDCM_P             0x04000000      /* No cache, precise */
-#define CACR_DDCM_IMP           0x06000000      /* No cache, imprecise */
-#define CACR_DCINVA             0x01000000      /* Invalidate data cache */
-#define CACR_BEC                0x00080000      /* Enable branch cache */
-#define CACR_BCINVA             0x00040000      /* Invalidate branch cache */
-#define CACR_IEC                0x00008000      /* Enable instruction cache */
-#define CACR_DNFB               0x00002000      /* Inhibited fill buffer */
-#define CACR_IDPI               0x00001000      /* Disable CPUSHL */
-#define CACR_IHLCK              0x00000800      /* Intruction cache half lock */
-#define CACR_IDCM               0x00000400      /* Intruction cache inhibit */
-#define CACR_ICINVA             0x00000100      /* Invalidate instr cache */
-
-#define ACR_BASE_POS            24              /* Address Base */
-#define ACR_MASK_POS            16              /* Address Mask */
-#define ACR_ENABLE              0x00008000      /* Enable address */
-#define ACR_USER                0x00000000      /* User mode access only */
-#define ACR_SUPER               0x00002000      /* Supervisor mode only */
-#define ACR_ANY                 0x00004000      /* Match any access mode */
-#define ACR_CM_WT               0x00000000      /* Write through mode */
-#define ACR_CM_CP               0x00000020      /* Copyback mode */
-#define ACR_CM_OFF_PRE          0x00000040      /* No cache, precise */
-#define ACR_CM_OFF_IMP          0x00000060      /* No cache, imprecise */
-#define ACR_WPROTECT            0x00000004      /* Write protect */
-
 /****************************************************************************/
 #endif  /* m5407sim_h */
diff --git a/arch/m68k/include/asm/m54xxacr.h b/arch/m68k/include/asm/m54xxacr.h
new file mode 100644
index 000000000000..16a1835f9b2a
--- /dev/null
+++ b/arch/m68k/include/asm/m54xxacr.h
@@ -0,0 +1,97 @@
+/*
+ * Bit definitions for the MCF54xx ACR and CACR registers.
+ */
+
+#ifndef m54xxacr_h
+#define m54xxacr_h
+
+/*
+ *      Define the Cache register flags.
+ */
+#define CACR_DEC        0x80000000      /* Enable data cache */
+#define CACR_DWP        0x40000000      /* Data write protection */
+#define CACR_DESB       0x20000000      /* Enable data store buffer */
+#define CACR_DDPI       0x10000000      /* Disable invalidation by CPUSHL */
+#define CACR_DHCLK      0x08000000      /* Half data cache lock mode */
+#define CACR_DDCM_WT    0x00000000      /* Write through cache*/
+#define CACR_DDCM_CP    0x02000000      /* Copyback cache */
+#define CACR_DDCM_P     0x04000000      /* No cache, precise */
+#define CACR_DDCM_IMP   0x06000000      /* No cache, imprecise */
+#define CACR_DCINVA     0x01000000      /* Invalidate data cache */
+#define CACR_BEC        0x00080000      /* Enable branch cache */
+#define CACR_BCINVA     0x00040000      /* Invalidate branch cache */
+#define CACR_IEC        0x00008000      /* Enable instruction cache */
+#define CACR_DNFB       0x00002000      /* Inhibited fill buffer */
+#define CACR_IDPI       0x00001000      /* Disable CPUSHL */
+#define CACR_IHLCK      0x00000800      /* Intruction cache half lock */
+#define CACR_IDCM       0x00000400      /* Intruction cache inhibit */
+#define CACR_ICINVA     0x00000100      /* Invalidate instr cache */
+#define CACR_EUSP       0x00000020      /* Enable separate user a7 */
+
+#define ACR_BASE_POS    24              /* Address Base */
+#define ACR_MASK_POS    16              /* Address Mask */
+#define ACR_ENABLE      0x00008000      /* Enable address */
+#define ACR_USER        0x00000000      /* User mode access only */
+#define ACR_SUPER       0x00002000      /* Supervisor mode only */
+#define ACR_ANY         0x00004000      /* Match any access mode */
+#define ACR_CM_WT       0x00000000      /* Write through mode */
+#define ACR_CM_CP       0x00000020      /* Copyback mode */
+#define ACR_CM_OFF_PRE  0x00000040      /* No cache, precise */
+#define ACR_CM_OFF_IMP  0x00000060      /* No cache, imprecise */
+#define ACR_CM          0x00000060      /* Cache mode mask */
+#define ACR_WPROTECT    0x00000004      /* Write protect */
+
+#if defined(CONFIG_M5407)
+
+#define ICACHE_SIZE 0x4000      /* instruction - 16k */
+#define DCACHE_SIZE 0x2000      /* data - 8k */
+
+#elif defined(CONFIG_M54xx)
+
+#define ICACHE_SIZE 0x8000      /* instruction - 32k */
+#define DCACHE_SIZE 0x8000      /* data - 32k */
+
+#endif
+
+#define CACHE_LINE_SIZE 0x0010  /* 16 bytes */
+#define CACHE_WAYS 4            /* 4 ways */
+
+/*
+ *      Version 4 cores have a true harvard style separate instruction
+ *      and data cache. Enable data and instruction caches, also enable write
+ *      buffers and branch accelerator.
+ */
+/* attention : enabling CACR_DESB requires a "nop" to flush the store buffer */
+/* use '+' instead of '|' for assembler's sake */
+
+        /* Enable data cache */
+        /* Enable data store buffer */
+        /* outside ACRs : No cache, precise */
+        /* Enable instruction+branch caches */
+#if defined(CONFIG_M5407)
+#define CACHE_MODE (CACR_DEC+CACR_DESB+CACR_DDCM_P+CACR_BEC+CACR_IEC)
+#else
+#define CACHE_MODE (CACR_DEC+CACR_DESB+CACR_DDCM_P+CACR_BEC+CACR_IEC+CACR_EUSP)
+#endif
+#if defined(CONFIG_CACHE_COPYBACK)
+#define DATA_CACHE_MODE (ACR_ENABLE+ACR_ANY+ACR_CM_CP)
+#else
+#define DATA_CACHE_MODE (ACR_ENABLE+ACR_ANY+ACR_CM_WT)
+#endif
+#define INSN_CACHE_MODE (ACR_ENABLE+ACR_ANY)
+
+#define CACHE_INIT      (CACR_DCINVA+CACR_BCINVA+CACR_ICINVA)
+#define CACHE_INVALIDATE  (CACHE_MODE+CACR_DCINVA+CACR_BCINVA+CACR_ICINVA)
+#define CACHE_INVALIDATEI (CACHE_MODE+CACR_BCINVA+CACR_ICINVA)
+#define CACHE_INVALIDATED (CACHE_MODE+CACR_DCINVA)
+#define ACR0_MODE       (0x000f0000+DATA_CACHE_MODE)
+#define ACR1_MODE       0
+#define ACR2_MODE       (0x000f0000+INSN_CACHE_MODE)
+#define ACR3_MODE       0
+
+#if ((DATA_CACHE_MODE & ACR_CM) == ACR_CM_CP)
+/* Copyback cache mode must push dirty cache lines first */
+#define CACHE_PUSH
+#endif
+
+#endif  /* m54xxacr_h */
diff --git a/arch/m68k/include/asm/m548xgpt.h b/arch/m68k/include/asm/m54xxgpt.h
index 33b2eef90f0a..df75dd87ae7a 100644
--- a/arch/m68k/include/asm/m548xgpt.h
+++ b/arch/m68k/include/asm/m54xxgpt.h
@@ -1,13 +1,13 @@
 /*
- * File:        m548xgpt.h
- * Purpose:     Register and bit definitions for the MCF548X
+ * File:        m54xxgpt.h
+ * Purpose:     Register and bit definitions for the MCF54XX
  *
  * Notes:
  *
  */
 
-#ifndef m548xgpt_h
-#define m548xgpt_h
+#ifndef m54xxgpt_h
+#define m54xxgpt_h
 
 /*********************************************************************
 *
@@ -87,4 +87,4 @@
 
 /********************************************************************/
 
-#endif /* m548xgpt_h */
+#endif /* m54xxgpt_h */
diff --git a/arch/m68k/include/asm/m548xsim.h b/arch/m68k/include/asm/m54xxsim.h
index 149135ef30d2..462ae5328441 100644
--- a/arch/m68k/include/asm/m548xsim.h
+++ b/arch/m68k/include/asm/m54xxsim.h
@@ -1,11 +1,16 @@
 /*
- *      m548xsim.h -- ColdFire 547x/548x System Integration Unit support.
+ *      m54xxsim.h -- ColdFire 547x/548x System Integration Unit support.
  */
 
-#ifndef m548xsim_h
-#define m548xsim_h
+#ifndef m54xxsim_h
+#define m54xxsim_h
 
-#define MCFINT_VECBASE      64
+#define CPU_NAME                "COLDFIRE(m54xx)"
+#define CPU_INSTR_PER_JIFFY     2
+
+#include <asm/m54xxacr.h>
+
+#define MCFINT_VECBASE          64
 
 /*
  *      Interrupt Controller Registers
@@ -22,6 +27,14 @@
 #define MCFINTC_ICR0            0x40            /* Base ICR register */
 
 /*
+ *      UART module.
+ */
+#define MCFUART_BASE1           0x8600          /* Base address of UART1 */
+#define MCFUART_BASE2           0x8700          /* Base address of UART2 */
+#define MCFUART_BASE3           0x8800          /* Base address of UART3 */
+#define MCFUART_BASE4           0x8900          /* Base address of UART4 */
+
+/*
  *      Define system peripheral IRQ usage.
  */
 #define MCF_IRQ_TIMER           (64 + 54)       /* Slice Timer 0 */
@@ -52,4 +65,4 @@
 #define MCF_PAR_PSC_RTS_RTS     (0x30)
 #define MCF_PAR_PSC_CANRX       (0x40)
 
-#endif  /* m548xsim_h */
+#endif  /* m54xxsim_h */
diff --git a/arch/m68k/include/asm/mcfcache.h b/arch/m68k/include/asm/mcfcache.h
deleted file mode 100644
index f49dfc09f70a..000000000000
--- a/arch/m68k/include/asm/mcfcache.h
+++ /dev/null
@@ -1,150 +0,0 @@
-/****************************************************************************/
-
-/*
- *      mcfcache.h -- ColdFire CPU cache support code
- *
- *      (C) Copyright 2004, Greg Ungerer <gerg@snapgear.com>
- */
-
-/****************************************************************************/
-#ifndef __M68KNOMMU_MCFCACHE_H
-#define __M68KNOMMU_MCFCACHE_H
-/****************************************************************************/
-
-
-/*
- *      The different ColdFire families have different cache arrangments.
- *      Everything from a small instruction only cache, to configurable
- *      data and/or instruction cache, to unified instruction/data, to 
- *      harvard style separate instruction and data caches.
- */
-
-#if defined(CONFIG_M5206) || defined(CONFIG_M5206e) || defined(CONFIG_M5272)
-/*
- *      Simple version 2 core cache. These have instruction cache only,
- *      we just need to invalidate it and enable it.
- */
-.macro CACHE_ENABLE
-        movel   #0x01000000,%d0         /* invalidate cache cmd */
-        movec   %d0,%CACR               /* do invalidate cache */
-        movel   #0x80000100,%d0         /* setup cache mask */
-        movec   %d0,%CACR               /* enable cache */
-.endm
-#endif /* CONFIG_M5206 || CONFIG_M5206e || CONFIG_M5272 */
-
-#if defined(CONFIG_M523x) || defined(CONFIG_M527x)
-/*
- *      New version 2 cores have a configurable split cache arrangement.
- *      For now I am just enabling instruction cache - but ultimately I
- *      think a split instruction/data cache would be better.
- */
-.macro CACHE_ENABLE
-        movel   #0x01400000,%d0
-        movec   %d0,%CACR               /* invalidate cache */
-        nop
-        movel   #0x0000c000,%d0         /* set SDRAM cached only */
-        movec   %d0,%ACR0
-        movel   #0x00000000,%d0         /* no other regions cached */
-        movec   %d0,%ACR1
-        movel   #0x80400100,%d0         /* configure cache */
-        movec   %d0,%CACR               /* enable cache */
-        nop
-.endm
-#endif /* CONFIG_M523x || CONFIG_M527x */
-
-#if defined(CONFIG_M528x)
-.macro CACHE_ENABLE
-        nop
-        movel   #0x01000000, %d0
-        movec   %d0, %CACR              /* Invalidate cache */
-        nop
-        movel   #0x0000c020, %d0        /* Set SDRAM cached only */
-        movec   %d0, %ACR0
-        movel   #0x00000000, %d0        /* No other regions cached */
-        movec   %d0, %ACR1
-        movel   #0x80000200, %d0        /* Setup cache mask */
-        movec   %d0, %CACR              /* Enable cache */
-        nop
-.endm
-#endif /* CONFIG_M528x */
-
-#if defined(CONFIG_M5249) || defined(CONFIG_M5307)
-/*
- *      The version 3 core cache. Oddly enough the version 2 core 5249
- *      has the same SDRAM and cache setup as the version 3 cores.
- *      This is a single unified instruction/data cache.
- */
-.macro CACHE_ENABLE
-        movel   #0x01000000,%d0         /* invalidate whole cache */
-        movec   %d0,%CACR
-        nop
-#if defined(DEBUGGER_COMPATIBLE_CACHE) || defined(CONFIG_SECUREEDGEMP3)
-        movel   #0x0000c000,%d0         /* set SDRAM cached (write-thru) */
-#else
-        movel   #0x0000c020,%d0         /* set SDRAM cached (copyback) */
-#endif
-        movec   %d0,%ACR0
-        movel   #0x00000000,%d0         /* no other regions cached */
-        movec   %d0,%ACR1
-        movel   #0xa0000200,%d0         /* enable cache */
-        movec   %d0,%CACR
-        nop
-.endm
-#endif /* CONFIG_M5249 || CONFIG_M5307 */
-
-#if defined(CONFIG_M532x)
-.macro CACHE_ENABLE
-        movel   #0x01000000,%d0         /* invalidate cache cmd */
-        movec   %d0,%CACR               /* do invalidate cache */
-        nop
-        movel   #0x4001C000,%d0         /* set SDRAM cached (write-thru) */
-        movec   %d0,%ACR0
-        movel   #0x00000000,%d0         /* no other regions cached */
-        movec   %d0,%ACR1
-        movel   #0x80000200,%d0         /* setup cache mask */
-        movec   %d0,%CACR               /* enable cache */
-        nop
-.endm
-#endif /* CONFIG_M532x */
-
-#if defined(CONFIG_M5407) || defined(CONFIG_M548x)
-/*
- *      Version 4 cores have a true harvard style separate instruction
- *      and data cache. Invalidate and enable cache, also enable write
- *      buffers and branch accelerator.
- */
-.macro CACHE_ENABLE
-        movel   #0x01040100,%d0         /* invalidate whole cache */
-        movec   %d0,%CACR
-        nop
-        movel   #0x000fc000,%d0         /* set SDRAM cached only */
-        movec   %d0, %ACR0
-        movel   #0x00000000,%d0         /* no other regions cached */
-        movec   %d0, %ACR1
-        movel   #0x000fc000,%d0         /* set SDRAM cached only */
-        movec   %d0, %ACR2
-        movel   #0x00000000,%d0         /* no other regions cached */
-        movec   %d0, %ACR3
-        movel   #0xb6088400,%d0         /* enable caches */
-        movec   %d0,%CACR
-        nop
-.endm
-#endif /* CONFIG_M5407 */
-
-#if defined(CONFIG_M520x)
-.macro CACHE_ENABLE
-        move.l  #0x01000000,%d0         /* invalidate whole cache */
-        movec   %d0,%CACR
-        nop
-        move.l  #0x0000c000,%d0         /* set SDRAM cached (write-thru) */
-        movec   %d0,%ACR0
-        move.l  #0x00000000,%d0         /* no other regions cached */
-        movec   %d0,%ACR1
-        move.l  #0x80400000,%d0         /* enable 8K instruction cache */
-        movec   %d0,%CACR
-        nop
-.endm
-#endif /* CONFIG_M520x */
-
-/****************************************************************************/
-#endif  /* __M68KNOMMU_MCFCACHE_H */
diff --git a/arch/m68k/include/asm/mcfsim.h b/arch/m68k/include/asm/mcfsim.h
index 6901fd68165b..ebd0304054ad 100644
--- a/arch/m68k/include/asm/mcfsim.h
+++ b/arch/m68k/include/asm/mcfsim.h
@@ -41,8 +41,8 @@
 #elif defined(CONFIG_M5407)
 #include <asm/m5407sim.h>
 #include <asm/mcfintc.h>
-#elif defined(CONFIG_M548x)
-#include <asm/m548xsim.h>
+#elif defined(CONFIG_M54xx)
+#include <asm/m54xxsim.h>
 #endif
 
 /****************************************************************************/
diff --git a/arch/m68k/include/asm/mcfuart.h b/arch/m68k/include/asm/mcfuart.h
index db72e2b889ca..2abedff0a694 100644
--- a/arch/m68k/include/asm/mcfuart.h
+++ b/arch/m68k/include/asm/mcfuart.h
@@ -12,49 +12,6 @@
 #define mcfuart_h
 /****************************************************************************/
 
-/*
- *      Define the base address of the UARTS within the MBAR address
- *      space.
- */
-#if defined(CONFIG_M5272)
-#define MCFUART_BASE1           0x100           /* Base address of UART1 */
-#define MCFUART_BASE2           0x140           /* Base address of UART2 */
-#elif defined(CONFIG_M5206) || defined(CONFIG_M5206e)
-#if defined(CONFIG_NETtel)
-#define MCFUART_BASE1           0x180           /* Base address of UART1 */
-#define MCFUART_BASE2           0x140           /* Base address of UART2 */
-#else
-#define MCFUART_BASE1           0x140           /* Base address of UART1 */
-#define MCFUART_BASE2           0x180           /* Base address of UART2 */
-#endif
-#elif defined(CONFIG_M523x) || defined(CONFIG_M527x) || defined(CONFIG_M528x)
-#define MCFUART_BASE1           0x200           /* Base address of UART1 */
-#define MCFUART_BASE2           0x240           /* Base address of UART2 */
-#define MCFUART_BASE3           0x280           /* Base address of UART3 */
-#elif defined(CONFIG_M5249) || defined(CONFIG_M5307) || defined(CONFIG_M5407)
-#if defined(CONFIG_NETtel) || defined(CONFIG_SECUREEDGEMP3)
-#define MCFUART_BASE1           0x200           /* Base address of UART1 */
-#define MCFUART_BASE2           0x1c0           /* Base address of UART2 */
-#else
-#define MCFUART_BASE1           0x1c0           /* Base address of UART1 */
-#define MCFUART_BASE2           0x200           /* Base address of UART2 */
-#endif
-#elif defined(CONFIG_M520x)
-#define MCFUART_BASE1           0x60000         /* Base address of UART1 */
-#define MCFUART_BASE2           0x64000         /* Base address of UART2 */
-#define MCFUART_BASE3           0x68000         /* Base address of UART2 */
-#elif defined(CONFIG_M532x)
-#define MCFUART_BASE1           0xfc060000      /* Base address of UART1 */
-#define MCFUART_BASE2           0xfc064000      /* Base address of UART2 */
-#define MCFUART_BASE3           0xfc068000      /* Base address of UART3 */
-#elif defined(CONFIG_M548x)
-#define MCFUART_BASE1           0x8600          /* on M548x */
-#define MCFUART_BASE2           0x8700          /* on M548x */
-#define MCFUART_BASE3           0x8800          /* on M548x */
-#define MCFUART_BASE4           0x8900          /* on M548x */
-#endif
-
-
 #include <linux/serial_core.h>
 #include <linux/platform_device.h>
 
@@ -217,7 +174,7 @@ struct mcf_platform_uart {
 #define MCFUART_URF_RXS         0xc0            /* Receiver status */
 #endif
 
-#if defined(CONFIG_M548x)
+#if defined(CONFIG_M54xx)
 #define MCFUART_TXFIFOSIZE      512
 #elif defined(CONFIG_M5272)
 #define MCFUART_TXFIFOSIZE      25
diff --git a/arch/m68k/include/asm/processor.h b/arch/m68k/include/asm/processor.h
index 7a6a7590cc02..278c69bad57a 100644
--- a/arch/m68k/include/asm/processor.h
+++ b/arch/m68k/include/asm/processor.h
@@ -20,23 +20,26 @@
 
 static inline unsigned long rdusp(void)
 {
-#ifdef CONFIG_COLDFIRE
+#ifdef CONFIG_COLDFIRE_SW_A7
         extern unsigned int sw_usp;
         return sw_usp;
 #else
-        unsigned long usp;
-        __asm__ __volatile__("move %/usp,%0" : "=a" (usp));
+        register unsigned long usp __asm__("a0");
+        /* move %usp,%a0 */
+        __asm__ __volatile__(".word 0x4e68" : "=a" (usp));
         return usp;
 #endif
 }
 
 static inline void wrusp(unsigned long usp)
 {
-#ifdef CONFIG_COLDFIRE
+#ifdef CONFIG_COLDFIRE_SW_A7
         extern unsigned int sw_usp;
         sw_usp = usp;
 #else
-        __asm__ __volatile__("move %0,%/usp" : : "a" (usp));
+        register unsigned long a0 __asm__("a0") = usp;
+        /* move %a0,%usp */
+        __asm__ __volatile__(".word 0x4e60" : : "a" (a0) );
 #endif
 }
 
diff --git a/arch/m68knommu/Kconfig b/arch/m68knommu/Kconfig
index fa9f746cf4ae..704e7b92334c 100644
--- a/arch/m68knommu/Kconfig
+++ b/arch/m68knommu/Kconfig
@@ -75,6 +75,16 @@ config GENERIC_CLOCKEVENTS
 config NO_IOPORT
         def_bool y
 
+config COLDFIRE_SW_A7
+        bool
+        default n
+
+config HAVE_CACHE_SPLIT
+        bool
+
+config HAVE_CACHE_CB
+        bool
+
 source "init/Kconfig"
 
 source "kernel/Kconfig.freezer"
@@ -107,69 +117,90 @@ config M68360
 
 config M5206
         bool "MCF5206"
+        select COLDFIRE_SW_A7
         help
           Motorola ColdFire 5206 processor support.
 
 config M5206e
         bool "MCF5206e"
+        select COLDFIRE_SW_A7
         help
           Motorola ColdFire 5206e processor support.
 
 config M520x
         bool "MCF520x"
         select GENERIC_CLOCKEVENTS
+        select HAVE_CACHE_SPLIT
         help
            Freescale Coldfire 5207/5208 processor support.
 
 config M523x
         bool "MCF523x"
         select GENERIC_CLOCKEVENTS
+        select HAVE_CACHE_SPLIT
         help
           Freescale Coldfire 5230/1/2/4/5 processor support
 
 config M5249
         bool "MCF5249"
+        select COLDFIRE_SW_A7
         help
           Motorola ColdFire 5249 processor support.
 
 config M5271
         bool "MCF5271"
+        select HAVE_CACHE_SPLIT
         help
           Freescale (Motorola) ColdFire 5270/5271 processor support.
 
 config M5272
         bool "MCF5272"
+        select COLDFIRE_SW_A7
         help
           Motorola ColdFire 5272 processor support.
 
 config M5275
         bool "MCF5275"
+        select HAVE_CACHE_SPLIT
         help
           Freescale (Motorola) ColdFire 5274/5275 processor support.
 
 config M528x
         bool "MCF528x"
         select GENERIC_CLOCKEVENTS
+        select HAVE_CACHE_SPLIT
         help
           Motorola ColdFire 5280/5282 processor support.
 
 config M5307
         bool "MCF5307"
+        select COLDFIRE_SW_A7
+        select HAVE_CACHE_CB
         help
           Motorola ColdFire 5307 processor support.
 
 config M532x
         bool "MCF532x"
+        select HAVE_CACHE_CB
         help
           Freescale (Motorola) ColdFire 532x processor support.
 
 config M5407
         bool "MCF5407"
+        select COLDFIRE_SW_A7
+        select HAVE_CACHE_CB
         help
           Motorola ColdFire 5407 processor support.
 
+config M547x
+        bool "MCF547x"
+        select HAVE_CACHE_CB
+        help
+          Freescale ColdFire 5470/5471/5472/5473/5474/5475 processor support.
+
 config M548x
         bool "MCF548x"
+        select HAVE_CACHE_CB
         help
           Freescale ColdFire 5480/5481/5482/5483/5484/5485 processor support.
 
@@ -181,9 +212,14 @@ config M527x
         select GENERIC_CLOCKEVENTS
         default y
 
+config M54xx
+        bool
+        depends on (M548x || M547x)
+        default y
+
 config COLDFIRE
         bool
-        depends on (M5206 || M5206e || M520x || M523x || M5249 || M527x || M5272 || M528x || M5307 || M532x || M5407 || M548x)
+        depends on (M5206 || M5206e || M520x || M523x || M5249 || M527x || M5272 || M528x || M5307 || M532x || M5407 || M54xx)
         select GENERIC_GPIO
         select ARCH_REQUIRE_GPIOLIB
         default y
@@ -230,6 +266,46 @@ config OLDMASK
           Build support for the older revision ColdFire 5307 silicon.
           Specifically this is the 1H55J mask revision.
 
+if HAVE_CACHE_SPLIT
+choice
+        prompt "Split Cache Configuration"
+        default CACHE_I
+
+config CACHE_I
+        bool "Instruction"
+        help
+          Use all of the ColdFire CPU cache memory as an instruction cache.
+
+config CACHE_D
+        bool "Data"
+        help
+          Use all of the ColdFire CPU cache memory as a data cache.
+
+config CACHE_BOTH
+        bool "Both"
+        help
+          Split the ColdFire CPU cache, and use half as an instruction cache
+          and half as a data cache.
+endchoice
+endif
+
+if HAVE_CACHE_CB
+choice
+        prompt "Data cache mode"
+        default CACHE_WRITETHRU
+
+config CACHE_WRITETHRU
+        bool "Write-through"
+        help
+          The ColdFire CPU cache is set into Write-through mode.
+
+config CACHE_COPYBACK
+        bool "Copy-back"
+        help
+          The ColdFire CPU cache is set into Copy-back mode.
+endchoice
+endif
+
 comment "Platform"
 
 config PILOT3
@@ -245,16 +321,16 @@ config XCOPILOT_BUGS
           Support the bugs of Xcopilot.
 
 config UC5272
-        bool 'Arcturus Networks uC5272 dimm board support'
-        depends on M5272
-        help
-          Support for the Arcturus Networks uC5272 dimm board.
+        bool 'Arcturus Networks uC5272 dimm board support'
+        depends on M5272
+        help
+          Support for the Arcturus Networks uC5272 dimm board.
 
 config UC5282
-       bool "Arcturus Networks uC5282 board support"
-          depends on M528x
-       help
-          Support for the Arcturus Networks uC5282 dimm board.
+        bool "Arcturus Networks uC5282 board support"
+        depends on M528x
+        help
+          Support for the Arcturus Networks uC5282 dimm board.
 
 config UCSIMM
         bool "uCsimm module support"
@@ -279,7 +355,7 @@ config DIRECT_IO_ACCESS
         depends on (UCSIMM || UCDIMM || DRAGEN2)
         help
           Disable the CPU internal registers protection in user mode,
-          to allow a user application to read/write them.
+          to allow a user application to read/write them.
 
 config INIT_LCD
         bool "Initialize LCD"
@@ -517,7 +593,7 @@ config EMAC_INC
         depends on (SOM5282EM)
 
 config SNEHA
-        bool
+        bool
         default y
         depends on CPU16B
 
diff --git a/arch/m68knommu/Makefile b/arch/m68knommu/Makefile
index 026ef16fa68e..589613fed31d 100644
--- a/arch/m68knommu/Makefile
+++ b/arch/m68knommu/Makefile
@@ -25,7 +25,7 @@ platform-$(CONFIG_M528x)	:= 528x
 platform-$(CONFIG_M5307)        := 5307
 platform-$(CONFIG_M532x)        := 532x
 platform-$(CONFIG_M5407)        := 5407
-platform-$(CONFIG_M548x)        := 548x
+platform-$(CONFIG_M54xx)        := 54xx
 PLATFORM := $(platform-y)
 
 board-$(CONFIG_PILOT)           := pilot
@@ -74,7 +74,7 @@ cpuclass-$(CONFIG_M528x)	:= coldfire
 cpuclass-$(CONFIG_M5307)        := coldfire
 cpuclass-$(CONFIG_M532x)        := coldfire
 cpuclass-$(CONFIG_M5407)        := coldfire
-cpuclass-$(CONFIG_M548x)        := coldfire
+cpuclass-$(CONFIG_M54xx)        := coldfire
 cpuclass-$(CONFIG_M68328)       := 68328
 cpuclass-$(CONFIG_M68EZ328)     := 68328
 cpuclass-$(CONFIG_M68VZ328)     := 68328
@@ -91,18 +91,18 @@ export PLATFORM BOARD MODEL CPUCLASS
 # Some CFLAG additions based on specific CPU type.
 #
 cflags-$(CONFIG_M5206)          := $(call cc-option,-mcpu=5206,-m5200)
-cflags-$(CONFIG_M5206e)         := $(call cc-option,-m5206e,-m5200)
+cflags-$(CONFIG_M5206e)         := $(call cc-option,-mcpu=5206e,-m5200)
 cflags-$(CONFIG_M520x)          := $(call cc-option,-mcpu=5208,-m5200)
 cflags-$(CONFIG_M523x)          := $(call cc-option,-mcpu=523x,-m5307)
 cflags-$(CONFIG_M5249)          := $(call cc-option,-mcpu=5249,-m5200)
 cflags-$(CONFIG_M5271)          := $(call cc-option,-mcpu=5271,-m5307)
 cflags-$(CONFIG_M5272)          := $(call cc-option,-mcpu=5272,-m5307)
 cflags-$(CONFIG_M5275)          := $(call cc-option,-mcpu=5275,-m5307)
-cflags-$(CONFIG_M528x)          := $(call cc-option,-m528x,-m5307)
-cflags-$(CONFIG_M5307)          := $(call cc-option,-m5307,-m5200)
+cflags-$(CONFIG_M528x)          := $(call cc-option,-mcpu=528x,-m5307)
+cflags-$(CONFIG_M5307)          := $(call cc-option,-mcpu=5307,-m5200)
 cflags-$(CONFIG_M532x)          := $(call cc-option,-mcpu=532x,-m5307)
-cflags-$(CONFIG_M5407)          := $(call cc-option,-m5407,-m5200)
-cflags-$(CONFIG_M548x)          := $(call cc-option,-m5407,-m5200)
+cflags-$(CONFIG_M5407)          := $(call cc-option,-mcpu=5407,-m5200)
+cflags-$(CONFIG_M54xx)          := $(call cc-option,-mcpu=5475,-m5200)
 cflags-$(CONFIG_M68328)         := -m68000
 cflags-$(CONFIG_M68EZ328)       := -m68000
 cflags-$(CONFIG_M68VZ328)       := -m68000
diff --git a/arch/m68knommu/kernel/setup.c b/arch/m68knommu/kernel/setup.c
index c684adf5dc40..16b2de7f5101 100644
--- a/arch/m68knommu/kernel/setup.c
+++ b/arch/m68knommu/kernel/setup.c
@@ -55,55 +55,29 @@ void (*mach_halt)(void);
 void (*mach_power_off)(void);
 
 #ifdef CONFIG_M68328
-        #define CPU "MC68328"
+#define CPU_NAME        "MC68328"
 #endif
 #ifdef CONFIG_M68EZ328
-        #define CPU "MC68EZ328"
+#define CPU_NAME        "MC68EZ328"
 #endif
 #ifdef CONFIG_M68VZ328
-        #define CPU "MC68VZ328"
+#define CPU_NAME        "MC68VZ328"
 #endif
 #ifdef CONFIG_M68360
-        #define CPU "MC68360"
+#define CPU_NAME        "MC68360"
 #endif
-#if defined(CONFIG_M5206)
-        #define CPU "COLDFIRE(m5206)"
+#ifndef CPU_NAME
+#define CPU_NAME        "UNKNOWN"
 #endif
-#if defined(CONFIG_M5206e)
-        #define CPU "COLDFIRE(m5206e)"
-#endif
-#if defined(CONFIG_M520x)
-        #define CPU "COLDFIRE(m520x)"
-#endif
-#if defined(CONFIG_M523x)
-        #define CPU "COLDFIRE(m523x)"
-#endif
-#if defined(CONFIG_M5249)
-        #define CPU "COLDFIRE(m5249)"
-#endif
-#if defined(CONFIG_M5271)
-        #define CPU "COLDFIRE(m5270/5271)"
-#endif
-#if defined(CONFIG_M5272)
-        #define CPU "COLDFIRE(m5272)"
-#endif
-#if defined(CONFIG_M5275)
-        #define CPU "COLDFIRE(m5274/5275)"
-#endif
-#if defined(CONFIG_M528x)
-        #define CPU "COLDFIRE(m5280/5282)"
-#endif
-#if defined(CONFIG_M5307)
-        #define CPU "COLDFIRE(m5307)"
-#endif
-#if defined(CONFIG_M532x)
-        #define CPU "COLDFIRE(m532x)"
-#endif
-#if defined(CONFIG_M5407)
-        #define CPU "COLDFIRE(m5407)"
-#endif
-#ifndef CPU
-        #define CPU "UNKNOWN"
+
+/*
+ * Different cores have different instruction execution timings.
+ * The old/traditional 68000 cores are basically all the same, at 16.
+ * The ColdFire cores vary a little, their values are defined in their
+ * headers. We default to the standard 68000 value here.
+ */
+#ifndef CPU_INSTR_PER_JIFFY
+#define CPU_INSTR_PER_JIFFY     16
 #endif
 
 extern int _stext, _etext, _sdata, _edata, _sbss, _ebss, _end;
@@ -208,7 +182,7 @@ void __init setup_arch(char **cmdline_p)
         command_line[sizeof(command_line) - 1] = 0;
 #endif /* CONFIG_UBOOT */
 
-        printk(KERN_INFO "\x0F\r\n\nuClinux/" CPU "\n");
+        printk(KERN_INFO "\x0F\r\n\nuClinux/" CPU_NAME "\n");
 
 #ifdef CONFIG_UCDIMM
         printk(KERN_INFO "uCdimm by Lineo, Inc. <www.lineo.com>\n");
@@ -257,11 +231,6 @@ void __init setup_arch(char **cmdline_p)
         memcpy(boot_command_line, command_line, COMMAND_LINE_SIZE);
         boot_command_line[COMMAND_LINE_SIZE-1] = 0;
 
-#ifdef DEBUG
-        if (strlen(*cmdline_p))
-                printk(KERN_DEBUG "Command line: '%s'\n", *cmdline_p);
-#endif
-
 #if defined(CONFIG_FRAMEBUFFER_CONSOLE) && defined(CONFIG_DUMMY_CONSOLE)
         conswitchp = &dummy_con;
 #endif
@@ -303,15 +272,10 @@ static int show_cpuinfo(struct seq_file *m, void *v)
         char *cpu, *mmu, *fpu;
         u_long clockfreq;
 
-        cpu = CPU;
+        cpu = CPU_NAME;
         mmu = "none";
         fpu = "none";
-
-#ifdef CONFIG_COLDFIRE
-        clockfreq = (loops_per_jiffy * HZ) * 3;
-#else
-        clockfreq = (loops_per_jiffy * HZ) * 16;
-#endif
+        clockfreq = (loops_per_jiffy * HZ) * CPU_INSTR_PER_JIFFY;
 
         seq_printf(m, "CPU:\t\t%s\n"
                       "MMU:\t\t%s\n"
diff --git a/arch/m68knommu/mm/Makefile b/arch/m68knommu/mm/Makefile
index fc91f254f51b..b54ab6b4b523 100644
--- a/arch/m68knommu/mm/Makefile
+++ b/arch/m68knommu/mm/Makefile
@@ -2,4 +2,4 @@
 # Makefile for the linux m68knommu specific parts of the memory manager.
 #
 
-obj-y += init.o fault.o memory.o kmap.o
+obj-y += init.o kmap.o
diff --git a/arch/m68knommu/mm/fault.c b/arch/m68knommu/mm/fault.c
deleted file mode 100644
index bc05cf74d9c0..000000000000
--- a/arch/m68knommu/mm/fault.c
+++ /dev/null
@@ -1,57 +0,0 @@
-/*
- *  linux/arch/m68knommu/mm/fault.c
- *
- *  Copyright (C) 1998  D. Jeff Dionne <jeff@lineo.ca>,
- *  Copyright (C) 2000  Lineo, Inc.  (www.lineo.com)
- *
- *  Based on:
- *
- *  linux/arch/m68k/mm/fault.c
- *
- *  Copyright (C) 1995  Hamish Macdonald
- */
-
-#include <linux/mman.h>
-#include <linux/mm.h>
-#include <linux/kernel.h>
-#include <linux/ptrace.h>
-
-#include <asm/system.h>
-#include <asm/pgtable.h>
-
-extern void die_if_kernel(char *, struct pt_regs *, long);
-
-/*
- * This routine handles page faults.  It determines the problem, and
- * then passes it off to one of the appropriate routines.
- *
- * error_code:
- *      bit 0 == 0 means no page found, 1 means protection fault
- *      bit 1 == 0 means read, 1 means write
- *
- * If this routine detects a bad access, it returns 1, otherwise it
- * returns 0.
- */
-asmlinkage int do_page_fault(struct pt_regs *regs, unsigned long address,
-                              unsigned long error_code)
-{
-#ifdef DEBUG
-        printk(KERN_DEBUG "regs->sr=%#x, regs->pc=%#lx, address=%#lx, %ld\n",
-                regs->sr, regs->pc, address, error_code);
-#endif
-
-        /*
-         * Oops. The kernel tried to access some bad page. We'll have to
-         * terminate things with extreme prejudice.
-         */
-        if ((unsigned long) address < PAGE_SIZE)
-                printk(KERN_ALERT "Unable to handle kernel NULL pointer dereference");
-        else
-                printk(KERN_ALERT "Unable to handle kernel access");
-        printk(KERN_ALERT " at virtual address %08lx\n", address);
-        die_if_kernel("Oops", regs, error_code);
-        do_exit(SIGKILL);
-
-        return 1;
-}
-
diff --git a/arch/m68knommu/mm/kmap.c b/arch/m68knommu/mm/kmap.c
index 902c1dfda9e5..ece8d5ad4e6c 100644
--- a/arch/m68knommu/mm/kmap.c
+++ b/arch/m68knommu/mm/kmap.c
@@ -36,15 +36,6 @@ void iounmap(void *addr)
 }
 
 /*
- * __iounmap unmaps nearly everything, so be careful
- * it doesn't free currently pointer/page tables anymore but it
- * wans't used anyway and might be added later.
- */
-void __iounmap(void *addr, unsigned long size)
-{
-}
-
-/*
  * Set new cache mode for some kernel address space.
  * The caller must push data for that range itself, if such data may already
  * be in the cache.
diff --git a/arch/m68knommu/mm/memory.c b/arch/m68knommu/mm/memory.c
deleted file mode 100644
index 8f7949e786d4..000000000000
--- a/arch/m68knommu/mm/memory.c
+++ /dev/null
@@ -1,33 +0,0 @@
-/*
- *  linux/arch/m68knommu/mm/memory.c
- *
- *  Copyright (C) 1998  Kenneth Albanowski <kjahds@kjahds.com>,
- *  Copyright (C) 1999-2002, Greg Ungerer (gerg@snapgear.com)
- *
- *  Based on:
- *
- *  linux/arch/m68k/mm/memory.c
- *
- *  Copyright (C) 1995  Hamish Macdonald
- */
-
-#include <linux/mm.h>
-#include <linux/kernel.h>
-#include <linux/string.h>
-#include <linux/types.h>
-
-#include <asm/segment.h>
-#include <asm/page.h>
-#include <asm/pgtable.h>
-#include <asm/system.h>
-
-/*
- * Map some physical address range into the kernel address space.
- */
-
-unsigned long kernel_map(unsigned long paddr, unsigned long size,
-                         int nocacheflag, unsigned long *memavailp )
-{
-        return paddr;
-}
-
diff --git a/arch/m68knommu/platform/548x/Makefile b/arch/m68knommu/platform/54xx/Makefile
index e6035e7a2d3f..e6035e7a2d3f 100644
--- a/arch/m68knommu/platform/548x/Makefile
+++ b/arch/m68knommu/platform/54xx/Makefile
diff --git a/arch/m68knommu/platform/548x/config.c b/arch/m68knommu/platform/54xx/config.c
index 9888846bd1cf..78130984db95 100644
--- a/arch/m68knommu/platform/548x/config.c
+++ b/arch/m68knommu/platform/54xx/config.c
@@ -1,7 +1,7 @@
 /***************************************************************************/
 
 /*
- *      linux/arch/m68knommu/platform/548x/config.c
+ *      linux/arch/m68knommu/platform/54xx/config.c
  *
  *      Copyright (C) 2010, Philippe De Muyter <phdm@macqel.be>
  */
@@ -15,13 +15,13 @@
 #include <linux/io.h>
 #include <asm/machdep.h>
 #include <asm/coldfire.h>
-#include <asm/m548xsim.h>
+#include <asm/m54xxsim.h>
 #include <asm/mcfuart.h>
-#include <asm/m548xgpt.h>
+#include <asm/m54xxgpt.h>
 
 /***************************************************************************/
 
-static struct mcf_platform_uart m548x_uart_platform[] = {
+static struct mcf_platform_uart m54xx_uart_platform[] = {
         {
                 .mapbase        = MCF_MBAR + MCFUART_BASE1,
                 .irq            = 64 + 35,
@@ -40,20 +40,20 @@ static struct mcf_platform_uart m548x_uart_platform[] = {
         },
 };
 
-static struct platform_device m548x_uart = {
+static struct platform_device m54xx_uart = {
         .name                   = "mcfuart",
         .id                     = 0,
-        .dev.platform_data      = m548x_uart_platform,
+        .dev.platform_data      = m54xx_uart_platform,
 };
 
-static struct platform_device *m548x_devices[] __initdata = {
-        &m548x_uart,
+static struct platform_device *m54xx_devices[] __initdata = {
+        &m54xx_uart,
 };
 
 
 /***************************************************************************/
 
-static void __init m548x_uart_init_line(int line, int irq)
+static void __init m54xx_uart_init_line(int line, int irq)
 {
         int rts_cts;
 
@@ -72,18 +72,18 @@ static void __init m548x_uart_init_line(int line, int irq)
                                                 MCF_MBAR + MCF_PAR_PSC(line));
 }
 
-static void __init m548x_uarts_init(void)
+static void __init m54xx_uarts_init(void)
 {
-        const int nrlines = ARRAY_SIZE(m548x_uart_platform);
+        const int nrlines = ARRAY_SIZE(m54xx_uart_platform);
         int line;
 
         for (line = 0; (line < nrlines); line++)
-                m548x_uart_init_line(line, m548x_uart_platform[line].irq);
+                m54xx_uart_init_line(line, m54xx_uart_platform[line].irq);
 }
 
 /***************************************************************************/
 
-static void mcf548x_reset(void)
+static void mcf54xx_reset(void)
 {
         /* disable interrupts and enable the watchdog */
         asm("movew #0x2700, %sr\n");
@@ -97,8 +97,8 @@ static void mcf548x_reset(void)
 
 void __init config_BSP(char *commandp, int size)
 {
-        mach_reset = mcf548x_reset;
-        m548x_uarts_init();
+        mach_reset = mcf54xx_reset;
+        m54xx_uarts_init();
 }
 
 /***************************************************************************/
@@ -106,7 +106,7 @@ void __init config_BSP(char *commandp, int size)
 static int __init init_BSP(void)
 {
 
-        platform_add_devices(m548x_devices, ARRAY_SIZE(m548x_devices));
+        platform_add_devices(m54xx_devices, ARRAY_SIZE(m54xx_devices));
         return 0;
 }
 
diff --git a/arch/m68knommu/platform/68328/ints.c b/arch/m68knommu/platform/68328/ints.c
index 865852806a17..2a3af193ccd3 100644
--- a/arch/m68knommu/platform/68328/ints.c
+++ b/arch/m68knommu/platform/68328/ints.c
@@ -179,8 +179,8 @@ void __init init_IRQ(void)
         IMR = ~0;
 
         for (i = 0; (i < NR_IRQS); i++) {
-                set_irq_chip(irq, &intc_irq_chip);
-                set_irq_handler(irq, handle_level_irq);
+                set_irq_chip(i, &intc_irq_chip);
+                set_irq_handler(i, handle_level_irq);
         }
 }
 
diff --git a/arch/m68knommu/platform/coldfire/Makefile b/arch/m68knommu/platform/coldfire/Makefile
index 45f501fa4525..a8967baabd72 100644
--- a/arch/m68knommu/platform/coldfire/Makefile
+++ b/arch/m68knommu/platform/coldfire/Makefile
@@ -14,7 +14,7 @@
 
 asflags-$(CONFIG_FULLDEBUG) := -DDEBUGGER_COMPATIBLE_CACHE=1
 
-obj-$(CONFIG_COLDFIRE)  += clk.o dma.o entry.o vectors.o
+obj-$(CONFIG_COLDFIRE)  += cache.o clk.o dma.o entry.o vectors.o
 obj-$(CONFIG_M5206)     += timers.o intc.o
 obj-$(CONFIG_M5206e)    += timers.o intc.o
 obj-$(CONFIG_M520x)     += pit.o intc-simr.o
@@ -26,7 +26,7 @@ obj-$(CONFIG_M528x)	+= pit.o intc-2.o
 obj-$(CONFIG_M5307)     += timers.o intc.o
 obj-$(CONFIG_M532x)     += timers.o intc-simr.o
 obj-$(CONFIG_M5407)     += timers.o intc.o
-obj-$(CONFIG_M548x)     += sltimers.o intc-2.o
+obj-$(CONFIG_M54xx)     += sltimers.o intc-2.o
 
 obj-y                   += pinmux.o gpio.o
 extra-y := head.o
diff --git a/arch/m68knommu/platform/coldfire/cache.c b/arch/m68knommu/platform/coldfire/cache.c
new file mode 100644
index 000000000000..235d3c4f4f0f
--- /dev/null
+++ b/arch/m68knommu/platform/coldfire/cache.c
@@ -0,0 +1,48 @@
+/***************************************************************************/
+
+/*
+ *      cache.c -- general ColdFire Cache maintainence code
+ *
+ *      Copyright (C) 2010, Greg Ungerer (gerg@snapgear.com)
+ */
+
+/***************************************************************************/
+
+#include <linux/kernel.h>
+#include <asm/coldfire.h>
+#include <asm/mcfsim.h>
+
+/***************************************************************************/
+#ifdef CACHE_PUSH
+/***************************************************************************/
+
+/*
+ *      Use cpushl to push all dirty cache lines back to memory.
+ *      Older versions of GAS don't seem to know how to generate the
+ *      ColdFire cpushl instruction... Oh well, bit stuff it for now.
+ */
+
+void mcf_cache_push(void)
+{
+        __asm__ __volatile__ (
+                "clrl   %%d0\n\t"
+                "1:\n\t"
+                "movel  %%d0,%%a0\n\t"
+                "2:\n\t"
+                ".word  0xf468\n\t"
+                "addl   %0,%%a0\n\t"
+                "cmpl   %1,%%a0\n\t"
+                "blt    2b\n\t"
+                "addql  #1,%%d0\n\t"
+                "cmpil  %2,%%d0\n\t"
+                "bne    1b\n\t"
+                : /* No output */
+                : "i" (CACHE_LINE_SIZE),
+                  "i" (DCACHE_SIZE / CACHE_WAYS),
+                  "i" (CACHE_WAYS)
+                : "d0", "a0" );
+}
+
+/***************************************************************************/
+#endif /* CACHE_PUSH */
+/***************************************************************************/
diff --git a/arch/m68knommu/platform/coldfire/entry.S b/arch/m68knommu/platform/coldfire/entry.S
index e1debc8285ef..4ddfc3da70d8 100644
--- a/arch/m68knommu/platform/coldfire/entry.S
+++ b/arch/m68knommu/platform/coldfire/entry.S
@@ -36,13 +36,16 @@
 #include <asm/asm-offsets.h>
 #include <asm/entry.h>
 
+#ifdef CONFIG_COLDFIRE_SW_A7
+/*
+ *      Define software copies of the supervisor and user stack pointers.
+ */
 .bss
-
 sw_ksp:
 .long   0
-
 sw_usp:
 .long   0
+#endif /* CONFIG_COLDFIRE_SW_A7 */
 
 .text
 
@@ -51,7 +54,6 @@ sw_usp:
 .globl ret_from_exception
 .globl ret_from_signal
 .globl sys_call_table
-.globl ret_from_interrupt
 .globl inthandler
 .globl fasthandler
 
@@ -140,20 +142,7 @@ Luser_return:
         jne     Lwork_to_do             /* still work to do */
 
 Lreturn:
-        move    #0x2700,%sr             /* disable intrs */
-        movel   sw_usp,%a0              /* get usp */
-        movel   %sp@(PT_OFF_PC),%a0@-   /* copy exception program counter */
-        movel   %sp@(PT_OFF_FORMATVEC),%a0@- /* copy exception format/vector/sr */
-        moveml  %sp@,%d1-%d5/%a0-%a2
-        lea     %sp@(32),%sp            /* space for 8 regs */
-        movel   %sp@+,%d0
-        addql   #4,%sp                  /* orig d0 */
-        addl    %sp@+,%sp               /* stk adj */
-        addql   #8,%sp                  /* remove exception */
-        movel   %sp,sw_ksp              /* save ksp */
-        subql   #8,sw_usp               /* set exception */
-        movel   sw_usp,%sp              /* restore usp */
-        rte
+        RESTORE_USER
 
 Lwork_to_do:
         movel   %a0@(TI_FLAGS),%d1      /* get thread_info->flags */
@@ -191,31 +180,7 @@ ENTRY(inthandler)
         jbsr    do_IRQ                  /* call high level irq handler */
         lea     %sp@(8),%sp             /* pop args off stack */
 
-        bra     ret_from_interrupt      /* this was fallthrough */
-
-/*
- * This is the fast interrupt handler (for certain hardware interrupt
- * sources). Unlike the normal interrupt handler it just uses the
- * current stack (doesn't care if it is user or kernel). It also
- * doesn't bother doing the bottom half handlers.
- */
-ENTRY(fasthandler)
-        SAVE_LOCAL
-
-        movew   %sp@(PT_OFF_FORMATVEC),%d0
-        andl    #0x03fc,%d0             /* mask out vector only */
-
-        movel   %sp,%sp@-               /* push regs arg */
-        lsrl    #2,%d0                  /* calculate real vector # */
-        movel   %d0,%sp@-               /* push vector number */
-        jbsr    do_IRQ                  /* call high level irq handler */
-        lea     %sp@(8),%sp             /* pop args off stack */
-
-        RESTORE_LOCAL
-
-ENTRY(ret_from_interrupt)
-        /* the fasthandler is confusing me, haven't seen any user */
-        jmp     ret_from_exception
+        bra     ret_from_exception
 
 /*
  * Beware - when entering resume, prev (the current task) is
@@ -226,9 +191,8 @@ ENTRY(ret_from_interrupt)
  */
 ENTRY(resume)
         movel   %a0, %d1                        /* get prev thread in d1 */
-
-        movel   sw_usp,%d0                      /* save usp */
-        movel   %d0,%a0@(TASK_THREAD+THREAD_USP)
+        RDUSP
+        movel   %a2,%a0@(TASK_THREAD+THREAD_USP)
 
         SAVE_SWITCH_STACK
         movel   %sp,%a0@(TASK_THREAD+THREAD_KSP) /* save kernel stack pointer */
@@ -236,5 +200,5 @@ ENTRY(resume)
         RESTORE_SWITCH_STACK
 
         movel   %a1@(TASK_THREAD+THREAD_USP),%a0 /* restore thread user stack */
-        movel   %a0, sw_usp
+        WRUSP
         rts
diff --git a/arch/m68knommu/platform/coldfire/head.S b/arch/m68knommu/platform/coldfire/head.S
index 0b2d7c7adf79..d5977909ae5f 100644
--- a/arch/m68knommu/platform/coldfire/head.S
+++ b/arch/m68knommu/platform/coldfire/head.S
@@ -3,7 +3,7 @@
 /*
  *      head.S -- common startup code for ColdFire CPUs.
  *
- *      (C) Copyright 1999-2006, Greg Ungerer <gerg@snapgear.com>.
+ *      (C) Copyright 1999-2010, Greg Ungerer <gerg@snapgear.com>.
  */
 
 /*****************************************************************************/
@@ -13,7 +13,6 @@
 #include <linux/init.h>
 #include <asm/asm-offsets.h>
 #include <asm/coldfire.h>
-#include <asm/mcfcache.h>
 #include <asm/mcfsim.h>
 #include <asm/thread_info.h>
 
@@ -173,10 +172,27 @@ _start:
 
         /*
          *      Now that we know what the memory is, lets enable cache
-         *      and get things moving. This is Coldfire CPU specific.
+         *      and get things moving. This is Coldfire CPU specific. Not
+         *      all version cores have identical cache register setup. But
+         *      it is very similar. Define the exact settings in the headers
+         *      then the code here is the same for all.
          */
-        CACHE_ENABLE                            /* enable CPU cache */
-
+        movel   #CACHE_INIT,%d0                 /* invalidate whole cache */
+        movec   %d0,%CACR
+        nop
+        movel   #ACR0_MODE,%d0                  /* set RAM region for caching */
+        movec   %d0,%ACR0
+        movel   #ACR1_MODE,%d0                  /* anything else to cache? */
+        movec   %d0,%ACR1
+#ifdef ACR2_MODE
+        movel   #ACR2_MODE,%d0
+        movec   %d0,%ACR2
+        movel   #ACR3_MODE,%d0
+        movec   %d0,%ACR3
+#endif
+        movel   #CACHE_MODE,%d0                 /* enable cache */
+        movec   %d0,%CACR
+        nop
 
 #ifdef CONFIG_ROMFS_FS
         /*
diff --git a/arch/microblaze/include/asm/pgtable.h b/arch/microblaze/include/asm/pgtable.h
index cae268c22ba2..b23f68075879 100644
--- a/arch/microblaze/include/asm/pgtable.h
+++ b/arch/microblaze/include/asm/pgtable.h
@@ -444,8 +444,9 @@ static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,
         *ptep = pte;
 }
 
-static inline int ptep_test_and_clear_young(struct mm_struct *mm,
-                unsigned long addr, pte_t *ptep)
+#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
+static inline int ptep_test_and_clear_young(struct vm_area_struct *vma,
+                unsigned long address, pte_t *ptep)
 {
         return (pte_update(ptep, _PAGE_ACCESSED, 0) & _PAGE_ACCESSED) != 0;
 }
@@ -457,6 +458,7 @@ static inline int ptep_test_and_clear_dirty(struct mm_struct *mm,
                 (_PAGE_DIRTY | _PAGE_HWWRITE), 0) & _PAGE_DIRTY) != 0;
 }
 
+#define __HAVE_ARCH_PTEP_GET_AND_CLEAR
 static inline pte_t ptep_get_and_clear(struct mm_struct *mm,
                 unsigned long addr, pte_t *ptep)
 {
diff --git a/arch/microblaze/include/asm/tlb.h b/arch/microblaze/include/asm/tlb.h
index e8abd4a0349c..8aa97817cc8c 100644
--- a/arch/microblaze/include/asm/tlb.h
+++ b/arch/microblaze/include/asm/tlb.h
@@ -13,6 +13,7 @@
 
 #define tlb_flush(tlb)  flush_tlb_mm((tlb)->mm)
 
+#include <linux/pagemap.h>
 #include <asm-generic/tlb.h>
 
 #ifdef CONFIG_MMU
diff --git a/arch/mips/Kbuild.platforms b/arch/mips/Kbuild.platforms
index 78439b8a83c4..7ff9b5492041 100644
--- a/arch/mips/Kbuild.platforms
+++ b/arch/mips/Kbuild.platforms
@@ -2,6 +2,7 @@
 
 platforms += alchemy
 platforms += ar7
+platforms += ath79
 platforms += bcm47xx
 platforms += bcm63xx
 platforms += cavium-octeon
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index f489ec30e071..548e6cc3bc28 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -21,6 +21,7 @@ config MIPS
         select HAVE_DMA_API_DEBUG
         select HAVE_GENERIC_HARDIRQS
         select GENERIC_IRQ_PROBE
+        select HAVE_ARCH_JUMP_LABEL
 
 menu "Machine selection"
 
@@ -65,6 +66,22 @@ config AR7
           Support for the Texas Instruments AR7 System-on-a-Chip
           family: TNETD7100, 7200 and 7300.
 
+config ATH79
+        bool "Atheros AR71XX/AR724X/AR913X based boards"
+        select ARCH_REQUIRE_GPIOLIB
+        select BOOT_RAW
+        select CEVT_R4K
+        select CSRC_R4K
+        select DMA_NONCOHERENT
+        select IRQ_CPU
+        select MIPS_MACHINE
+        select SYS_HAS_CPU_MIPS32_R2
+        select SYS_HAS_EARLY_PRINTK
+        select SYS_SUPPORTS_32BIT_KERNEL
+        select SYS_SUPPORTS_BIG_ENDIAN
+        help
+          Support for the Atheros AR71XX/AR724X/AR913X SoCs.
+
 config BCM47XX
         bool "Broadcom BCM47XX based boards"
         select CEVT_R4K
@@ -717,6 +734,7 @@ config CAVIUM_OCTEON_REFERENCE_BOARD
 endchoice
 
 source "arch/mips/alchemy/Kconfig"
+source "arch/mips/ath79/Kconfig"
 source "arch/mips/bcm63xx/Kconfig"
 source "arch/mips/jazz/Kconfig"
 source "arch/mips/jz4740/Kconfig"
@@ -883,6 +901,9 @@ config MIPS_DISABLE_OBSOLETE_IDE
 config SYNC_R4K
         bool
 
+config MIPS_MACHINE
+        def_bool n
+
 config NO_IOPORT
         def_bool n
 
@@ -2400,4 +2421,20 @@ source "security/Kconfig"
 
 source "crypto/Kconfig"
 
+menuconfig VIRTUALIZATION
+        bool "Virtualization"
+        default n
+        ---help---
+          Say Y here to get to see options for using your Linux host to run other
+          operating systems inside virtual machines (guests).
+          This option alone does not add any kernel code.
+
+          If you say N, all options in this submenu will be skipped and disabled.
+
+if VIRTUALIZATION
+
+source drivers/virtio/Kconfig
+
+endif # VIRTUALIZATION
+
 source "lib/Kconfig"
diff --git a/arch/mips/ath79/Kconfig b/arch/mips/ath79/Kconfig
new file mode 100644
index 000000000000..b05828260f7f
--- /dev/null
+++ b/arch/mips/ath79/Kconfig
@@ -0,0 +1,50 @@
+if ATH79
+
+menu "Atheros AR71XX/AR724X/AR913X machine selection"
+
+config ATH79_MACH_AP81
+        bool "Atheros AP81 reference board"
+        select SOC_AR913X
+        select ATH79_DEV_AR913X_WMAC
+        select ATH79_DEV_GPIO_BUTTONS
+        select ATH79_DEV_LEDS_GPIO
+        select ATH79_DEV_SPI
+        help
+          Say 'Y' here if you want your kernel to support the
+          Atheros AP81 reference board.
+
+config ATH79_MACH_PB44
+        bool "Atheros PB44 reference board"
+        select SOC_AR71XX
+        select ATH79_DEV_GPIO_BUTTONS
+        select ATH79_DEV_LEDS_GPIO
+        select ATH79_DEV_SPI
+        help
+          Say 'Y' here if you want your kernel to support the
+          Atheros PB44 reference board.
+
+endmenu
+
+config SOC_AR71XX
+        def_bool n
+
+config SOC_AR724X
+        def_bool n
+
+config SOC_AR913X
+        def_bool n
+
+config ATH79_DEV_AR913X_WMAC
+        depends on SOC_AR913X
+        def_bool n
+
+config ATH79_DEV_GPIO_BUTTONS
+        def_bool n
+
+config ATH79_DEV_LEDS_GPIO
+        def_bool n
+
+config ATH79_DEV_SPI
+        def_bool n
+
+endif
diff --git a/arch/mips/ath79/Makefile b/arch/mips/ath79/Makefile
new file mode 100644
index 000000000000..c33d4653007c
--- /dev/null
+++ b/arch/mips/ath79/Makefile
@@ -0,0 +1,28 @@
+#
+# Makefile for the Atheros AR71XX/AR724X/AR913X specific parts of the kernel
+#
+# Copyright (C) 2008-2011 Gabor Juhos <juhosg@openwrt.org>
+# Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
+#
+# This program is free software; you can redistribute it and/or modify it
+# under the terms of the GNU General Public License version 2 as published
+# by the Free Software Foundation.
+
+obj-y   := prom.o setup.o irq.o common.o clock.o gpio.o
+
+obj-$(CONFIG_EARLY_PRINTK)              += early_printk.o
+
+#
+# Devices
+#
+obj-y                                   += dev-common.o
+obj-$(CONFIG_ATH79_DEV_AR913X_WMAC)     += dev-ar913x-wmac.o
+obj-$(CONFIG_ATH79_DEV_GPIO_BUTTONS)    += dev-gpio-buttons.o
+obj-$(CONFIG_ATH79_DEV_LEDS_GPIO)       += dev-leds-gpio.o
+obj-$(CONFIG_ATH79_DEV_SPI)             += dev-spi.o
+
+#
+# Machines
+#
+obj-$(CONFIG_ATH79_MACH_AP81)           += mach-ap81.o
+obj-$(CONFIG_ATH79_MACH_PB44)           += mach-pb44.o
diff --git a/arch/mips/ath79/Platform b/arch/mips/ath79/Platform
new file mode 100644
index 000000000000..2bd663647d27
--- /dev/null
+++ b/arch/mips/ath79/Platform
@@ -0,0 +1,7 @@
+#
+# Atheros AR71xx/AR724x/AR913x
+#
+
+platform-$(CONFIG_ATH79)        += ath79/
+cflags-$(CONFIG_ATH79)          += -I$(srctree)/arch/mips/include/asm/mach-ath79
+load-$(CONFIG_ATH79)            = 0xffffffff80060000
diff --git a/arch/mips/ath79/clock.c b/arch/mips/ath79/clock.c
new file mode 100644
index 000000000000..680bde99a26c
--- /dev/null
+++ b/arch/mips/ath79/clock.c
@@ -0,0 +1,183 @@
+/*
+ *  Atheros AR71XX/AR724X/AR913X common routines
+ *
+ *  Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org>
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/err.h>
+#include <linux/clk.h>
+
+#include <asm/mach-ath79/ath79.h>
+#include <asm/mach-ath79/ar71xx_regs.h>
+#include "common.h"
+
+#define AR71XX_BASE_FREQ        40000000
+#define AR724X_BASE_FREQ        5000000
+#define AR913X_BASE_FREQ        5000000
+
+struct clk {
+        unsigned long rate;
+};
+
+static struct clk ath79_ref_clk;
+static struct clk ath79_cpu_clk;
+static struct clk ath79_ddr_clk;
+static struct clk ath79_ahb_clk;
+static struct clk ath79_wdt_clk;
+static struct clk ath79_uart_clk;
+
+static void __init ar71xx_clocks_init(void)
+{
+        u32 pll;
+        u32 freq;
+        u32 div;
+
+        ath79_ref_clk.rate = AR71XX_BASE_FREQ;
+
+        pll = ath79_pll_rr(AR71XX_PLL_REG_CPU_CONFIG);
+
+        div = ((pll >> AR71XX_PLL_DIV_SHIFT) & AR71XX_PLL_DIV_MASK) + 1;
+        freq = div * ath79_ref_clk.rate;
+
+        div = ((pll >> AR71XX_CPU_DIV_SHIFT) & AR71XX_CPU_DIV_MASK) + 1;
+        ath79_cpu_clk.rate = freq / div;
+
+        div = ((pll >> AR71XX_DDR_DIV_SHIFT) & AR71XX_DDR_DIV_MASK) + 1;
+        ath79_ddr_clk.rate = freq / div;
+
+        div = (((pll >> AR71XX_AHB_DIV_SHIFT) & AR71XX_AHB_DIV_MASK) + 1) * 2;
+        ath79_ahb_clk.rate = ath79_cpu_clk.rate / div;
+
+        ath79_wdt_clk.rate = ath79_ahb_clk.rate;
+        ath79_uart_clk.rate = ath79_ahb_clk.rate;
+}
+
+static void __init ar724x_clocks_init(void)
+{
+        u32 pll;
+        u32 freq;
+        u32 div;
+
+        ath79_ref_clk.rate = AR724X_BASE_FREQ;
+        pll = ath79_pll_rr(AR724X_PLL_REG_CPU_CONFIG);
+
+        div = ((pll >> AR724X_PLL_DIV_SHIFT) & AR724X_PLL_DIV_MASK);
+        freq = div * ath79_ref_clk.rate;
+
+        div = ((pll >> AR724X_PLL_REF_DIV_SHIFT) & AR724X_PLL_REF_DIV_MASK);
+        freq *= div;
+
+        ath79_cpu_clk.rate = freq;
+
+        div = ((pll >> AR724X_DDR_DIV_SHIFT) & AR724X_DDR_DIV_MASK) + 1;
+        ath79_ddr_clk.rate = freq / div;
+
+        div = (((pll >> AR724X_AHB_DIV_SHIFT) & AR724X_AHB_DIV_MASK) + 1) * 2;
+        ath79_ahb_clk.rate = ath79_cpu_clk.rate / div;
+
+        ath79_wdt_clk.rate = ath79_ahb_clk.rate;
+        ath79_uart_clk.rate = ath79_ahb_clk.rate;
+}
+
+static void __init ar913x_clocks_init(void)
+{
+        u32 pll;
+        u32 freq;
+        u32 div;
+
+        ath79_ref_clk.rate = AR913X_BASE_FREQ;
+        pll = ath79_pll_rr(AR913X_PLL_REG_CPU_CONFIG);
+
+        div = ((pll >> AR913X_PLL_DIV_SHIFT) & AR913X_PLL_DIV_MASK);
+        freq = div * ath79_ref_clk.rate;
+
+        ath79_cpu_clk.rate = freq;
+
+        div = ((pll >> AR913X_DDR_DIV_SHIFT) & AR913X_DDR_DIV_MASK) + 1;
+        ath79_ddr_clk.rate = freq / div;
+
+        div = (((pll >> AR913X_AHB_DIV_SHIFT) & AR913X_AHB_DIV_MASK) + 1) * 2;
+        ath79_ahb_clk.rate = ath79_cpu_clk.rate / div;
+
+        ath79_wdt_clk.rate = ath79_ahb_clk.rate;
+        ath79_uart_clk.rate = ath79_ahb_clk.rate;
+}
+
+void __init ath79_clocks_init(void)
+{
+        if (soc_is_ar71xx())
+                ar71xx_clocks_init();
+        else if (soc_is_ar724x())
+                ar724x_clocks_init();
+        else if (soc_is_ar913x())
+                ar913x_clocks_init();
+        else
+                BUG();
+
+        pr_info("Clocks: CPU:%lu.%03luMHz, DDR:%lu.%03luMHz, AHB:%lu.%03luMHz, "
+                "Ref:%lu.%03luMHz",
+                ath79_cpu_clk.rate / 1000000,
+                (ath79_cpu_clk.rate / 1000) % 1000,
+                ath79_ddr_clk.rate / 1000000,
+                (ath79_ddr_clk.rate / 1000) % 1000,
+                ath79_ahb_clk.rate / 1000000,
+                (ath79_ahb_clk.rate / 1000) % 1000,
+                ath79_ref_clk.rate / 1000000,
+                (ath79_ref_clk.rate / 1000) % 1000);
+}
+
+/*
+ * Linux clock API
+ */
+struct clk *clk_get(struct device *dev, const char *id)
+{
+        if (!strcmp(id, "ref"))
+                return &ath79_ref_clk;
+
+        if (!strcmp(id, "cpu"))
+                return &ath79_cpu_clk;
+
+        if (!strcmp(id, "ddr"))
+                return &ath79_ddr_clk;
+
+        if (!strcmp(id, "ahb"))
+                return &ath79_ahb_clk;
+
+        if (!strcmp(id, "wdt"))
+                return &ath79_wdt_clk;
+
+        if (!strcmp(id, "uart"))
+                return &ath79_uart_clk;
+
+        return ERR_PTR(-ENOENT);
+}
+EXPORT_SYMBOL(clk_get);
+
+int clk_enable(struct clk *clk)
+{
+        return 0;
+}
+EXPORT_SYMBOL(clk_enable);
+
+void clk_disable(struct clk *clk)
+{
+}
+EXPORT_SYMBOL(clk_disable);
+
+unsigned long clk_get_rate(struct clk *clk)
+{
+        return clk->rate;
+}
+EXPORT_SYMBOL(clk_get_rate);
+
+void clk_put(struct clk *clk)
+{
+}
+EXPORT_SYMBOL(clk_put);
diff --git a/arch/mips/ath79/common.c b/arch/mips/ath79/common.c
new file mode 100644
index 000000000000..58f60e722a03
--- /dev/null
+++ b/arch/mips/ath79/common.c
@@ -0,0 +1,97 @@
+/*
+ *  Atheros AR71XX/AR724X/AR913X common routines
+ *
+ *  Copyright (C) 2008-2010 Gabor Juhos <juhosg@openwrt.org>
+ *  Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/types.h>
+#include <linux/spinlock.h>
+
+#include <asm/mach-ath79/ath79.h>
+#include <asm/mach-ath79/ar71xx_regs.h>
+#include "common.h"
+
+static DEFINE_SPINLOCK(ath79_device_reset_lock);
+
+u32 ath79_cpu_freq;
+EXPORT_SYMBOL_GPL(ath79_cpu_freq);
+
+u32 ath79_ahb_freq;
+EXPORT_SYMBOL_GPL(ath79_ahb_freq);
+
+u32 ath79_ddr_freq;
+EXPORT_SYMBOL_GPL(ath79_ddr_freq);
+
+enum ath79_soc_type ath79_soc;
+
+void __iomem *ath79_pll_base;
+void __iomem *ath79_reset_base;
+EXPORT_SYMBOL_GPL(ath79_reset_base);
+void __iomem *ath79_ddr_base;
+
+void ath79_ddr_wb_flush(u32 reg)
+{
+        void __iomem *flush_reg = ath79_ddr_base + reg;
+
+        /* Flush the DDR write buffer. */
+        __raw_writel(0x1, flush_reg);
+        while (__raw_readl(flush_reg) & 0x1)
+                ;
+
+        /* It must be run twice. */
+        __raw_writel(0x1, flush_reg);
+        while (__raw_readl(flush_reg) & 0x1)
+                ;
+}
+EXPORT_SYMBOL_GPL(ath79_ddr_wb_flush);
+
+void ath79_device_reset_set(u32 mask)
+{
+        unsigned long flags;
+        u32 reg;
+        u32 t;
+
+        if (soc_is_ar71xx())
+                reg = AR71XX_RESET_REG_RESET_MODULE;
+        else if (soc_is_ar724x())
+                reg = AR724X_RESET_REG_RESET_MODULE;
+        else if (soc_is_ar913x())
+                reg = AR913X_RESET_REG_RESET_MODULE;
+        else
+                BUG();
+
+        spin_lock_irqsave(&ath79_device_reset_lock, flags);
+        t = ath79_reset_rr(reg);
+        ath79_reset_wr(reg, t | mask);
+        spin_unlock_irqrestore(&ath79_device_reset_lock, flags);
+}
+EXPORT_SYMBOL_GPL(ath79_device_reset_set);
+
+void ath79_device_reset_clear(u32 mask)
+{
+        unsigned long flags;
+        u32 reg;
+        u32 t;
+
+        if (soc_is_ar71xx())
+                reg = AR71XX_RESET_REG_RESET_MODULE;
+        else if (soc_is_ar724x())
+                reg = AR724X_RESET_REG_RESET_MODULE;
+        else if (soc_is_ar913x())
+                reg = AR913X_RESET_REG_RESET_MODULE;
+        else
+                BUG();
+
+        spin_lock_irqsave(&ath79_device_reset_lock, flags);
+        t = ath79_reset_rr(reg);
+        ath79_reset_wr(reg, t & ~mask);
+        spin_unlock_irqrestore(&ath79_device_reset_lock, flags);
+}
+EXPORT_SYMBOL_GPL(ath79_device_reset_clear);
diff --git a/arch/mips/ath79/common.h b/arch/mips/ath79/common.h
new file mode 100644
index 000000000000..561906c2345e
--- /dev/null
+++ b/arch/mips/ath79/common.h
@@ -0,0 +1,31 @@
+/*
+ *  Atheros AR71XX/AR724X/AR913X common definitions
+ *
+ *  Copyright (C) 2008-2011 Gabor Juhos <juhosg@openwrt.org>
+ *  Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
+ *
+ *  Parts of this file are based on Atheros' 2.6.15 BSP
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ */
+
+#ifndef __ATH79_COMMON_H
+#define __ATH79_COMMON_H
+
+#include <linux/types.h>
+#include <linux/init.h>
+
+#define ATH79_MEM_SIZE_MIN      (2 * 1024 * 1024)
+#define ATH79_MEM_SIZE_MAX      (128 * 1024 * 1024)
+
+void ath79_clocks_init(void);
+void ath79_ddr_wb_flush(unsigned int reg);
+
+void ath79_gpio_function_enable(u32 mask);
+void ath79_gpio_function_disable(u32 mask);
+void ath79_gpio_function_setup(u32 set, u32 clear);
+void ath79_gpio_init(void);
+
+#endif /* __ATH79_COMMON_H */
diff --git a/arch/mips/ath79/dev-ar913x-wmac.c b/arch/mips/ath79/dev-ar913x-wmac.c
new file mode 100644
index 000000000000..48f425a5ba28
--- /dev/null
+++ b/arch/mips/ath79/dev-ar913x-wmac.c
@@ -0,0 +1,60 @@
+/*
+ *  Atheros AR913X SoC built-in WMAC device support
+ *
+ *  Copyright (C) 2008-2010 Gabor Juhos <juhosg@openwrt.org>
+ *  Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ */
+
+#include <linux/init.h>
+#include <linux/delay.h>
+#include <linux/irq.h>
+#include <linux/platform_device.h>
+#include <linux/ath9k_platform.h>
+
+#include <asm/mach-ath79/ath79.h>
+#include <asm/mach-ath79/ar71xx_regs.h>
+#include "dev-ar913x-wmac.h"
+
+static struct ath9k_platform_data ar913x_wmac_data;
+
+static struct resource ar913x_wmac_resources[] = {
+        {
+                .start  = AR913X_WMAC_BASE,
+                .end    = AR913X_WMAC_BASE + AR913X_WMAC_SIZE - 1,
+                .flags  = IORESOURCE_MEM,
+        }, {
+                .start  = ATH79_CPU_IRQ_IP2,
+                .end    = ATH79_CPU_IRQ_IP2,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device ar913x_wmac_device = {
+        .name           = "ath9k",
+        .id             = -1,
+        .resource       = ar913x_wmac_resources,
+        .num_resources  = ARRAY_SIZE(ar913x_wmac_resources),
+        .dev = {
+                .platform_data = &ar913x_wmac_data,
+        },
+};
+
+void __init ath79_register_ar913x_wmac(u8 *cal_data)
+{
+        if (cal_data)
+                memcpy(ar913x_wmac_data.eeprom_data, cal_data,
+                       sizeof(ar913x_wmac_data.eeprom_data));
+
+        /* reset the WMAC */
+        ath79_device_reset_set(AR913X_RESET_AMBA2WMAC);
+        mdelay(10);
+
+        ath79_device_reset_clear(AR913X_RESET_AMBA2WMAC);
+        mdelay(10);
+
+        platform_device_register(&ar913x_wmac_device);
+}
diff --git a/arch/mips/ath79/dev-ar913x-wmac.h b/arch/mips/ath79/dev-ar913x-wmac.h
new file mode 100644
index 000000000000..579d562bbda8
--- /dev/null
+++ b/arch/mips/ath79/dev-ar913x-wmac.h
@@ -0,0 +1,17 @@
+/*
+ *  Atheros AR913X SoC built-in WMAC device support
+ *
+ *  Copyright (C) 2008-2010 Gabor Juhos <juhosg@openwrt.org>
+ *  Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ */
+
+#ifndef _ATH79_DEV_AR913X_WMAC_H
+#define _ATH79_DEV_AR913X_WMAC_H
+
+void ath79_register_ar913x_wmac(u8 *cal_data);
+
+#endif /* _ATH79_DEV_AR913X_WMAC_H */
diff --git a/arch/mips/ath79/dev-common.c b/arch/mips/ath79/dev-common.c
new file mode 100644
index 000000000000..3b82e325bebf
--- /dev/null
+++ b/arch/mips/ath79/dev-common.c
@@ -0,0 +1,77 @@
+/*
+ *  Atheros AR71XX/AR724X/AR913X common devices
+ *
+ *  Copyright (C) 2008-2011 Gabor Juhos <juhosg@openwrt.org>
+ *  Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
+ *
+ *  Parts of this file are based on Atheros' 2.6.15 BSP
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/serial_8250.h>
+#include <linux/clk.h>
+#include <linux/err.h>
+
+#include <asm/mach-ath79/ath79.h>
+#include <asm/mach-ath79/ar71xx_regs.h>
+#include "common.h"
+#include "dev-common.h"
+
+static struct resource ath79_uart_resources[] = {
+        {
+                .start  = AR71XX_UART_BASE,
+                .end    = AR71XX_UART_BASE + AR71XX_UART_SIZE - 1,
+                .flags  = IORESOURCE_MEM,
+        },
+};
+
+#define AR71XX_UART_FLAGS (UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP)
+static struct plat_serial8250_port ath79_uart_data[] = {
+        {
+                .mapbase        = AR71XX_UART_BASE,
+                .irq            = ATH79_MISC_IRQ_UART,
+                .flags          = AR71XX_UART_FLAGS,
+                .iotype         = UPIO_MEM32,
+                .regshift       = 2,
+        }, {
+                /* terminating entry */
+        }
+};
+
+static struct platform_device ath79_uart_device = {
+        .name           = "serial8250",
+        .id             = PLAT8250_DEV_PLATFORM,
+        .resource       = ath79_uart_resources,
+        .num_resources  = ARRAY_SIZE(ath79_uart_resources),
+        .dev = {
+                .platform_data  = ath79_uart_data
+        },
+};
+
+void __init ath79_register_uart(void)
+{
+        struct clk *clk;
+
+        clk = clk_get(NULL, "uart");
+        if (IS_ERR(clk))
+                panic("unable to get UART clock, err=%ld", PTR_ERR(clk));
+
+        ath79_uart_data[0].uartclk = clk_get_rate(clk);
+        platform_device_register(&ath79_uart_device);
+}
+
+static struct platform_device ath79_wdt_device = {
+        .name           = "ath79-wdt",
+        .id             = -1,
+};
+
+void __init ath79_register_wdt(void)
+{
+        platform_device_register(&ath79_wdt_device);
+}
diff --git a/arch/mips/ath79/dev-common.h b/arch/mips/ath79/dev-common.h
new file mode 100644
index 000000000000..0f514e1affce
--- /dev/null
+++ b/arch/mips/ath79/dev-common.h
@@ -0,0 +1,18 @@
+/*
+ *  Atheros AR71XX/AR724X/AR913X common devices
+ *
+ *  Copyright (C) 2008-2010 Gabor Juhos <juhosg@openwrt.org>
+ *  Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ */
+
+#ifndef _ATH79_DEV_COMMON_H
+#define _ATH79_DEV_COMMON_H
+
+void ath79_register_uart(void);
+void ath79_register_wdt(void);
+
+#endif /* _ATH79_DEV_COMMON_H */
diff --git a/arch/mips/ath79/dev-gpio-buttons.c b/arch/mips/ath79/dev-gpio-buttons.c
new file mode 100644
index 000000000000..4b0168a11c01
--- /dev/null
+++ b/arch/mips/ath79/dev-gpio-buttons.c
@@ -0,0 +1,58 @@
+/*
+ *  Atheros AR71XX/AR724X/AR913X GPIO button support
+ *
+ *  Copyright (C) 2008-2010 Gabor Juhos <juhosg@openwrt.org>
+ *  Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ */
+
+#include "linux/init.h"
+#include "linux/slab.h"
+#include <linux/platform_device.h>
+
+#include "dev-gpio-buttons.h"
+
+void __init ath79_register_gpio_keys_polled(int id,
+                                            unsigned poll_interval,
+                                            unsigned nbuttons,
+                                            struct gpio_keys_button *buttons)
+{
+        struct platform_device *pdev;
+        struct gpio_keys_platform_data pdata;
+        struct gpio_keys_button *p;
+        int err;
+
+        p = kmalloc(nbuttons * sizeof(*p), GFP_KERNEL);
+        if (!p)
+                return;
+
+        memcpy(p, buttons, nbuttons * sizeof(*p));
+
+        pdev = platform_device_alloc("gpio-keys-polled", id);
+        if (!pdev)
+                goto err_free_buttons;
+
+        memset(&pdata, 0, sizeof(pdata));
+        pdata.poll_interval = poll_interval;
+        pdata.nbuttons = nbuttons;
+        pdata.buttons = p;
+
+        err = platform_device_add_data(pdev, &pdata, sizeof(pdata));
+        if (err)
+                goto err_put_pdev;
+
+        err = platform_device_add(pdev);
+        if (err)
+                goto err_put_pdev;
+
+        return;
+
+err_put_pdev:
+        platform_device_put(pdev);
+
+err_free_buttons:
+        kfree(p);
+}
diff --git a/arch/mips/ath79/dev-gpio-buttons.h b/arch/mips/ath79/dev-gpio-buttons.h
new file mode 100644
index 000000000000..481847ac1cba
--- /dev/null
+++ b/arch/mips/ath79/dev-gpio-buttons.h
@@ -0,0 +1,23 @@
+/*
+ *  Atheros AR71XX/AR724X/AR913X GPIO button support
+ *
+ *  Copyright (C) 2008-2010 Gabor Juhos <juhosg@openwrt.org>
+ *  Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ */
+
+#ifndef _ATH79_DEV_GPIO_BUTTONS_H
+#define _ATH79_DEV_GPIO_BUTTONS_H
+
+#include <linux/input.h>
+#include <linux/gpio_keys.h>
+
+void ath79_register_gpio_keys_polled(int id,
+                                     unsigned poll_interval,
+                                     unsigned nbuttons,
+                                     struct gpio_keys_button *buttons);
+
+#endif /* _ATH79_DEV_GPIO_BUTTONS_H */
diff --git a/arch/mips/ath79/dev-leds-gpio.c b/arch/mips/ath79/dev-leds-gpio.c
new file mode 100644
index 000000000000..cdade68dcd17
--- /dev/null
+++ b/arch/mips/ath79/dev-leds-gpio.c
@@ -0,0 +1,56 @@
+/*
+ *  Atheros AR71XX/AR724X/AR913X common GPIO LEDs support
+ *
+ *  Copyright (C) 2008-2010 Gabor Juhos <juhosg@openwrt.org>
+ *  Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ */
+
+#include <linux/init.h>
+#include <linux/slab.h>
+#include <linux/platform_device.h>
+
+#include "dev-leds-gpio.h"
+
+void __init ath79_register_leds_gpio(int id,
+                                     unsigned num_leds,
+                                     struct gpio_led *leds)
+{
+        struct platform_device *pdev;
+        struct gpio_led_platform_data pdata;
+        struct gpio_led *p;
+        int err;
+
+        p = kmalloc(num_leds * sizeof(*p), GFP_KERNEL);
+        if (!p)
+                return;
+
+        memcpy(p, leds, num_leds * sizeof(*p));
+
+        pdev = platform_device_alloc("leds-gpio", id);
+        if (!pdev)
+                goto err_free_leds;
+
+        memset(&pdata, 0, sizeof(pdata));
+        pdata.num_leds = num_leds;
+        pdata.leds = p;
+
+        err = platform_device_add_data(pdev, &pdata, sizeof(pdata));
+        if (err)
+                goto err_put_pdev;
+
+        err = platform_device_add(pdev);
+        if (err)
+                goto err_put_pdev;
+
+        return;
+
+err_put_pdev:
+        platform_device_put(pdev);
+
+err_free_leds:
+        kfree(p);
+}
diff --git a/arch/mips/ath79/dev-leds-gpio.h b/arch/mips/ath79/dev-leds-gpio.h
new file mode 100644
index 000000000000..6e5d8851ebcf
--- /dev/null
+++ b/arch/mips/ath79/dev-leds-gpio.h
@@ -0,0 +1,21 @@
+/*
+ *  Atheros AR71XX/AR724X/AR913X common GPIO LEDs support
+ *
+ *  Copyright (C) 2008-2010 Gabor Juhos <juhosg@openwrt.org>
+ *  Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ */
+
+#ifndef _ATH79_DEV_LEDS_GPIO_H
+#define _ATH79_DEV_LEDS_GPIO_H
+
+#include <linux/leds.h>
+
+void ath79_register_leds_gpio(int id,
+                              unsigned num_leds,
+                              struct gpio_led *leds);
+
+#endif /* _ATH79_DEV_LEDS_GPIO_H */
diff --git a/arch/mips/ath79/dev-spi.c b/arch/mips/ath79/dev-spi.c
new file mode 100644
index 000000000000..aa30163efbfd
--- /dev/null
+++ b/arch/mips/ath79/dev-spi.c
@@ -0,0 +1,38 @@
+/*
+ *  Atheros AR71XX/AR724X/AR913X SPI controller device
+ *
+ *  Copyright (C) 2008-2010 Gabor Juhos <juhosg@openwrt.org>
+ *  Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ */
+
+#include <linux/platform_device.h>
+#include <asm/mach-ath79/ar71xx_regs.h>
+#include "dev-spi.h"
+
+static struct resource ath79_spi_resources[] = {
+        {
+                .start  = AR71XX_SPI_BASE,
+                .end    = AR71XX_SPI_BASE + AR71XX_SPI_SIZE - 1,
+                .flags  = IORESOURCE_MEM,
+        },
+};
+
+static struct platform_device ath79_spi_device = {
+        .name           = "ath79-spi",
+        .id             = -1,
+        .resource       = ath79_spi_resources,
+        .num_resources  = ARRAY_SIZE(ath79_spi_resources),
+};
+
+void __init ath79_register_spi(struct ath79_spi_platform_data *pdata,
+                               struct spi_board_info const *info,
+                               unsigned n)
+{
+        spi_register_board_info(info, n);
+        ath79_spi_device.dev.platform_data = pdata;
+        platform_device_register(&ath79_spi_device);
+}
diff --git a/arch/mips/ath79/dev-spi.h b/arch/mips/ath79/dev-spi.h
new file mode 100644
index 000000000000..d732565ca736
--- /dev/null
+++ b/arch/mips/ath79/dev-spi.h
@@ -0,0 +1,22 @@
+/*
+ *  Atheros AR71XX/AR724X/AR913X SPI controller device
+ *
+ *  Copyright (C) 2008-2010 Gabor Juhos <juhosg@openwrt.org>
+ *  Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ */
+
+#ifndef _ATH79_DEV_SPI_H
+#define _ATH79_DEV_SPI_H
+
+#include <linux/spi/spi.h>
+#include <asm/mach-ath79/ath79_spi_platform.h>
+
+void ath79_register_spi(struct ath79_spi_platform_data *pdata,
+                         struct spi_board_info const *info,
+                         unsigned n);
+
+#endif /* _ATH79_DEV_SPI_H */
diff --git a/arch/mips/ath79/early_printk.c b/arch/mips/ath79/early_printk.c
new file mode 100644
index 000000000000..7499b0e9df26
--- /dev/null
+++ b/arch/mips/ath79/early_printk.c
@@ -0,0 +1,36 @@
+/*
+ *  Atheros AR71XX/AR724X/AR913X SoC early printk support
+ *
+ *  Copyright (C) 2008-2010 Gabor Juhos <juhosg@openwrt.org>
+ *  Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ */
+
+#include <linux/io.h>
+#include <linux/serial_reg.h>
+#include <asm/addrspace.h>
+
+#include <asm/mach-ath79/ar71xx_regs.h>
+
+static inline void prom_wait_thre(void __iomem *base)
+{
+        u32 lsr;
+
+        do {
+                lsr = __raw_readl(base + UART_LSR * 4);
+                if (lsr & UART_LSR_THRE)
+                        break;
+        } while (1);
+}
+
+void prom_putchar(unsigned char ch)
+{
+        void __iomem *base = (void __iomem *)(KSEG1ADDR(AR71XX_UART_BASE));
+
+        prom_wait_thre(base);
+        __raw_writel(ch, base + UART_TX * 4);
+        prom_wait_thre(base);
+}
diff --git a/arch/mips/ath79/gpio.c b/arch/mips/ath79/gpio.c
new file mode 100644
index 000000000000..a0c426b82123
--- /dev/null
+++ b/arch/mips/ath79/gpio.c
@@ -0,0 +1,197 @@
+/*
+ *  Atheros AR71XX/AR724X/AR913X GPIO API support
+ *
+ *  Copyright (C) 2008-2010 Gabor Juhos <juhosg@openwrt.org>
+ *  Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/types.h>
+#include <linux/spinlock.h>
+#include <linux/io.h>
+#include <linux/ioport.h>
+#include <linux/gpio.h>
+
+#include <asm/mach-ath79/ar71xx_regs.h>
+#include <asm/mach-ath79/ath79.h>
+#include "common.h"
+
+static void __iomem *ath79_gpio_base;
+static unsigned long ath79_gpio_count;
+static DEFINE_SPINLOCK(ath79_gpio_lock);
+
+static void __ath79_gpio_set_value(unsigned gpio, int value)
+{
+        void __iomem *base = ath79_gpio_base;
+
+        if (value)
+                __raw_writel(1 << gpio, base + AR71XX_GPIO_REG_SET);
+        else
+                __raw_writel(1 << gpio, base + AR71XX_GPIO_REG_CLEAR);
+}
+
+static int __ath79_gpio_get_value(unsigned gpio)
+{
+        return (__raw_readl(ath79_gpio_base + AR71XX_GPIO_REG_IN) >> gpio) & 1;
+}
+
+static int ath79_gpio_get_value(struct gpio_chip *chip, unsigned offset)
+{
+        return __ath79_gpio_get_value(offset);
+}
+
+static void ath79_gpio_set_value(struct gpio_chip *chip,
+                                  unsigned offset, int value)
+{
+        __ath79_gpio_set_value(offset, value);
+}
+
+static int ath79_gpio_direction_input(struct gpio_chip *chip,
+                                       unsigned offset)
+{
+        void __iomem *base = ath79_gpio_base;
+        unsigned long flags;
+
+        spin_lock_irqsave(&ath79_gpio_lock, flags);
+
+        __raw_writel(__raw_readl(base + AR71XX_GPIO_REG_OE) & ~(1 << offset),
+                     base + AR71XX_GPIO_REG_OE);
+
+        spin_unlock_irqrestore(&ath79_gpio_lock, flags);
+
+        return 0;
+}
+
+static int ath79_gpio_direction_output(struct gpio_chip *chip,
+                                        unsigned offset, int value)
+{
+        void __iomem *base = ath79_gpio_base;
+        unsigned long flags;
+
+        spin_lock_irqsave(&ath79_gpio_lock, flags);
+
+        if (value)
+                __raw_writel(1 << offset, base + AR71XX_GPIO_REG_SET);
+        else
+                __raw_writel(1 << offset, base + AR71XX_GPIO_REG_CLEAR);
+
+        __raw_writel(__raw_readl(base + AR71XX_GPIO_REG_OE) | (1 << offset),
+                     base + AR71XX_GPIO_REG_OE);
+
+        spin_unlock_irqrestore(&ath79_gpio_lock, flags);
+
+        return 0;
+}
+
+static struct gpio_chip ath79_gpio_chip = {
+        .label                  = "ath79",
+        .get                    = ath79_gpio_get_value,
+        .set                    = ath79_gpio_set_value,
+        .direction_input        = ath79_gpio_direction_input,
+        .direction_output       = ath79_gpio_direction_output,
+        .base                   = 0,
+};
+
+void ath79_gpio_function_enable(u32 mask)
+{
+        void __iomem *base = ath79_gpio_base;
+        unsigned long flags;
+
+        spin_lock_irqsave(&ath79_gpio_lock, flags);
+
+        __raw_writel(__raw_readl(base + AR71XX_GPIO_REG_FUNC) | mask,
+                     base + AR71XX_GPIO_REG_FUNC);
+        /* flush write */
+        __raw_readl(base + AR71XX_GPIO_REG_FUNC);
+
+        spin_unlock_irqrestore(&ath79_gpio_lock, flags);
+}
+
+void ath79_gpio_function_disable(u32 mask)
+{
+        void __iomem *base = ath79_gpio_base;
+        unsigned long flags;
+
+        spin_lock_irqsave(&ath79_gpio_lock, flags);
+
+        __raw_writel(__raw_readl(base + AR71XX_GPIO_REG_FUNC) & ~mask,
+                     base + AR71XX_GPIO_REG_FUNC);
+        /* flush write */
+        __raw_readl(base + AR71XX_GPIO_REG_FUNC);
+
+        spin_unlock_irqrestore(&ath79_gpio_lock, flags);
+}
+
+void ath79_gpio_function_setup(u32 set, u32 clear)
+{
+        void __iomem *base = ath79_gpio_base;
+        unsigned long flags;
+
+        spin_lock_irqsave(&ath79_gpio_lock, flags);
+
+        __raw_writel((__raw_readl(base + AR71XX_GPIO_REG_FUNC) & ~clear) | set,
+                     base + AR71XX_GPIO_REG_FUNC);
+        /* flush write */
+        __raw_readl(base + AR71XX_GPIO_REG_FUNC);
+
+        spin_unlock_irqrestore(&ath79_gpio_lock, flags);
+}
+
+void __init ath79_gpio_init(void)
+{
+        int err;
+
+        if (soc_is_ar71xx())
+                ath79_gpio_count = AR71XX_GPIO_COUNT;
+        else if (soc_is_ar724x())
+                ath79_gpio_count = AR724X_GPIO_COUNT;
+        else if (soc_is_ar913x())
+                ath79_gpio_count = AR913X_GPIO_COUNT;
+        else
+                BUG();
+
+        ath79_gpio_base = ioremap_nocache(AR71XX_GPIO_BASE, AR71XX_GPIO_SIZE);
+        ath79_gpio_chip.ngpio = ath79_gpio_count;
+
+        err = gpiochip_add(&ath79_gpio_chip);
+        if (err)
+                panic("cannot add AR71xx GPIO chip, error=%d", err);
+}
+
+int gpio_get_value(unsigned gpio)
+{
+        if (gpio < ath79_gpio_count)
+                return __ath79_gpio_get_value(gpio);
+
+        return __gpio_get_value(gpio);
+}
+EXPORT_SYMBOL(gpio_get_value);
+
+void gpio_set_value(unsigned gpio, int value)
+{
+        if (gpio < ath79_gpio_count)
+                __ath79_gpio_set_value(gpio, value);
+        else
+                __gpio_set_value(gpio, value);
+}
+EXPORT_SYMBOL(gpio_set_value);
+
+int gpio_to_irq(unsigned gpio)
+{
+        /* FIXME */
+        return -EINVAL;
+}
+EXPORT_SYMBOL(gpio_to_irq);
+
+int irq_to_gpio(unsigned irq)
+{
+        /* FIXME */
+        return -EINVAL;
+}
+EXPORT_SYMBOL(irq_to_gpio);
diff --git a/arch/mips/ath79/irq.c b/arch/mips/ath79/irq.c
new file mode 100644
index 000000000000..1bf7f719ba53
--- /dev/null
+++ b/arch/mips/ath79/irq.c
@@ -0,0 +1,187 @@
+/*
+ *  Atheros AR71xx/AR724x/AR913x specific interrupt handling
+ *
+ *  Copyright (C) 2008-2010 Gabor Juhos <juhosg@openwrt.org>
+ *  Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
+ *
+ *  Parts of this file are based on Atheros' 2.6.15 BSP
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/interrupt.h>
+#include <linux/irq.h>
+
+#include <asm/irq_cpu.h>
+#include <asm/mipsregs.h>
+
+#include <asm/mach-ath79/ath79.h>
+#include <asm/mach-ath79/ar71xx_regs.h>
+#include "common.h"
+
+static unsigned int ath79_ip2_flush_reg;
+static unsigned int ath79_ip3_flush_reg;
+
+static void ath79_misc_irq_handler(unsigned int irq, struct irq_desc *desc)
+{
+        void __iomem *base = ath79_reset_base;
+        u32 pending;
+
+        pending = __raw_readl(base + AR71XX_RESET_REG_MISC_INT_STATUS) &
+                  __raw_readl(base + AR71XX_RESET_REG_MISC_INT_ENABLE);
+
+        if (pending & MISC_INT_UART)
+                generic_handle_irq(ATH79_MISC_IRQ_UART);
+
+        else if (pending & MISC_INT_DMA)
+                generic_handle_irq(ATH79_MISC_IRQ_DMA);
+
+        else if (pending & MISC_INT_PERFC)
+                generic_handle_irq(ATH79_MISC_IRQ_PERFC);
+
+        else if (pending & MISC_INT_TIMER)
+                generic_handle_irq(ATH79_MISC_IRQ_TIMER);
+
+        else if (pending & MISC_INT_OHCI)
+                generic_handle_irq(ATH79_MISC_IRQ_OHCI);
+
+        else if (pending & MISC_INT_ERROR)
+                generic_handle_irq(ATH79_MISC_IRQ_ERROR);
+
+        else if (pending & MISC_INT_GPIO)
+                generic_handle_irq(ATH79_MISC_IRQ_GPIO);
+
+        else if (pending & MISC_INT_WDOG)
+                generic_handle_irq(ATH79_MISC_IRQ_WDOG);
+
+        else
+                spurious_interrupt();
+}
+
+static void ar71xx_misc_irq_unmask(unsigned int irq)
+{
+        void __iomem *base = ath79_reset_base;
+        u32 t;
+
+        irq -= ATH79_MISC_IRQ_BASE;
+
+        t = __raw_readl(base + AR71XX_RESET_REG_MISC_INT_ENABLE);
+        __raw_writel(t | (1 << irq), base + AR71XX_RESET_REG_MISC_INT_ENABLE);
+
+        /* flush write */
+        __raw_readl(base + AR71XX_RESET_REG_MISC_INT_ENABLE);
+}
+
+static void ar71xx_misc_irq_mask(unsigned int irq)
+{
+        void __iomem *base = ath79_reset_base;
+        u32 t;
+
+        irq -= ATH79_MISC_IRQ_BASE;
+
+        t = __raw_readl(base + AR71XX_RESET_REG_MISC_INT_ENABLE);
+        __raw_writel(t & ~(1 << irq), base + AR71XX_RESET_REG_MISC_INT_ENABLE);
+
+        /* flush write */
+        __raw_readl(base + AR71XX_RESET_REG_MISC_INT_ENABLE);
+}
+
+static void ar724x_misc_irq_ack(unsigned int irq)
+{
+        void __iomem *base = ath79_reset_base;
+        u32 t;
+
+        irq -= ATH79_MISC_IRQ_BASE;
+
+        t = __raw_readl(base + AR71XX_RESET_REG_MISC_INT_STATUS);
+        __raw_writel(t & ~(1 << irq), base + AR71XX_RESET_REG_MISC_INT_STATUS);
+
+        /* flush write */
+        __raw_readl(base + AR71XX_RESET_REG_MISC_INT_STATUS);
+}
+
+static struct irq_chip ath79_misc_irq_chip = {
+        .name           = "MISC",
+        .unmask         = ar71xx_misc_irq_unmask,
+        .mask           = ar71xx_misc_irq_mask,
+};
+
+static void __init ath79_misc_irq_init(void)
+{
+        void __iomem *base = ath79_reset_base;
+        int i;
+
+        __raw_writel(0, base + AR71XX_RESET_REG_MISC_INT_ENABLE);
+        __raw_writel(0, base + AR71XX_RESET_REG_MISC_INT_STATUS);
+
+        if (soc_is_ar71xx() || soc_is_ar913x())
+                ath79_misc_irq_chip.mask_ack = ar71xx_misc_irq_mask;
+        else if (soc_is_ar724x())
+                ath79_misc_irq_chip.ack = ar724x_misc_irq_ack;
+        else
+                BUG();
+
+        for (i = ATH79_MISC_IRQ_BASE;
+             i < ATH79_MISC_IRQ_BASE + ATH79_MISC_IRQ_COUNT; i++) {
+                irq_desc[i].status = IRQ_DISABLED;
+                set_irq_chip_and_handler(i, &ath79_misc_irq_chip,
+                                         handle_level_irq);
+        }
+
+        set_irq_chained_handler(ATH79_CPU_IRQ_MISC, ath79_misc_irq_handler);
+}
+
+asmlinkage void plat_irq_dispatch(void)
+{
+        unsigned long pending;
+
+        pending = read_c0_status() & read_c0_cause() & ST0_IM;
+
+        if (pending & STATUSF_IP7)
+                do_IRQ(ATH79_CPU_IRQ_TIMER);
+
+        else if (pending & STATUSF_IP2) {
+                ath79_ddr_wb_flush(ath79_ip2_flush_reg);
+                do_IRQ(ATH79_CPU_IRQ_IP2);
+        }
+
+        else if (pending & STATUSF_IP4)
+                do_IRQ(ATH79_CPU_IRQ_GE0);
+
+        else if (pending & STATUSF_IP5)
+                do_IRQ(ATH79_CPU_IRQ_GE1);
+
+        else if (pending & STATUSF_IP3) {
+                ath79_ddr_wb_flush(ath79_ip3_flush_reg);
+                do_IRQ(ATH79_CPU_IRQ_USB);
+        }
+
+        else if (pending & STATUSF_IP6)
+                do_IRQ(ATH79_CPU_IRQ_MISC);
+
+        else
+                spurious_interrupt();
+}
+
+void __init arch_init_irq(void)
+{
+        if (soc_is_ar71xx()) {
+                ath79_ip2_flush_reg = AR71XX_DDR_REG_FLUSH_PCI;
+                ath79_ip3_flush_reg = AR71XX_DDR_REG_FLUSH_USB;
+        } else if (soc_is_ar724x()) {
+                ath79_ip2_flush_reg = AR724X_DDR_REG_FLUSH_PCIE;
+                ath79_ip3_flush_reg = AR724X_DDR_REG_FLUSH_USB;
+        } else if (soc_is_ar913x()) {
+                ath79_ip2_flush_reg = AR913X_DDR_REG_FLUSH_WMAC;
+                ath79_ip3_flush_reg = AR913X_DDR_REG_FLUSH_USB;
+        } else
+                BUG();
+
+        cp0_perfcount_irq = ATH79_MISC_IRQ_PERFC;
+        mips_cpu_irq_init();
+        ath79_misc_irq_init();
+}
diff --git a/arch/mips/ath79/mach-ap81.c b/arch/mips/ath79/mach-ap81.c
new file mode 100644
index 000000000000..eee4c121deb4
--- /dev/null
+++ b/arch/mips/ath79/mach-ap81.c
@@ -0,0 +1,98 @@
+/*
+ *  Atheros AP81 board support
+ *
+ *  Copyright (C) 2009-2010 Gabor Juhos <juhosg@openwrt.org>
+ *  Copyright (C) 2009 Imre Kaloz <kaloz@openwrt.org>
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ */
+
+#include "machtypes.h"
+#include "dev-ar913x-wmac.h"
+#include "dev-gpio-buttons.h"
+#include "dev-leds-gpio.h"
+#include "dev-spi.h"
+
+#define AP81_GPIO_LED_STATUS    1
+#define AP81_GPIO_LED_AOSS      3
+#define AP81_GPIO_LED_WLAN      6
+#define AP81_GPIO_LED_POWER     14
+
+#define AP81_GPIO_BTN_SW4       12
+#define AP81_GPIO_BTN_SW1       21
+
+#define AP81_KEYS_POLL_INTERVAL         20      /* msecs */
+#define AP81_KEYS_DEBOUNCE_INTERVAL     (3 * AP81_KEYS_POLL_INTERVAL)
+
+#define AP81_CAL_DATA_ADDR      0x1fff1000
+
+static struct gpio_led ap81_leds_gpio[] __initdata = {
+        {
+                .name           = "ap81:green:status",
+                .gpio           = AP81_GPIO_LED_STATUS,
+                .active_low     = 1,
+        }, {
+                .name           = "ap81:amber:aoss",
+                .gpio           = AP81_GPIO_LED_AOSS,
+                .active_low     = 1,
+        }, {
+                .name           = "ap81:green:wlan",
+                .gpio           = AP81_GPIO_LED_WLAN,
+                .active_low     = 1,
+        }, {
+                .name           = "ap81:green:power",
+                .gpio           = AP81_GPIO_LED_POWER,
+                .active_low     = 1,
+        }
+};
+
+static struct gpio_keys_button ap81_gpio_keys[] __initdata = {
+        {
+                .desc           = "sw1",
+                .type           = EV_KEY,
+                .code           = BTN_0,
+                .debounce_interval = AP81_KEYS_DEBOUNCE_INTERVAL,
+                .gpio           = AP81_GPIO_BTN_SW1,
+                .active_low     = 1,
+        } , {
+                .desc           = "sw4",
+                .type           = EV_KEY,
+                .code           = BTN_1,
+                .debounce_interval = AP81_KEYS_DEBOUNCE_INTERVAL,
+                .gpio           = AP81_GPIO_BTN_SW4,
+                .active_low     = 1,
+        }
+};
+
+static struct spi_board_info ap81_spi_info[] = {
+        {
+                .bus_num        = 0,
+                .chip_select    = 0,
+                .max_speed_hz   = 25000000,
+                .modalias       = "m25p64",
+        }
+};
+
+static struct ath79_spi_platform_data ap81_spi_data = {
+        .bus_num        = 0,
+        .num_chipselect = 1,
+};
+
+static void __init ap81_setup(void)
+{
+        u8 *cal_data = (u8 *) KSEG1ADDR(AP81_CAL_DATA_ADDR);
+
+        ath79_register_leds_gpio(-1, ARRAY_SIZE(ap81_leds_gpio),
+                                 ap81_leds_gpio);
+        ath79_register_gpio_keys_polled(-1, AP81_KEYS_POLL_INTERVAL,
+                                        ARRAY_SIZE(ap81_gpio_keys),
+                                        ap81_gpio_keys);
+        ath79_register_spi(&ap81_spi_data, ap81_spi_info,
+                           ARRAY_SIZE(ap81_spi_info));
+        ath79_register_ar913x_wmac(cal_data);
+}
+
+MIPS_MACHINE(ATH79_MACH_AP81, "AP81", "Atheros AP81 reference board",
+             ap81_setup);
diff --git a/arch/mips/ath79/mach-pb44.c b/arch/mips/ath79/mach-pb44.c
new file mode 100644
index 000000000000..ec7b7a135d53
--- /dev/null
+++ b/arch/mips/ath79/mach-pb44.c
@@ -0,0 +1,118 @@
+/*
+ *  Atheros PB44 reference board support
+ *
+ *  Copyright (C) 2009-2010 Gabor Juhos <juhosg@openwrt.org>
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ */
+
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/i2c.h>
+#include <linux/i2c-gpio.h>
+#include <linux/i2c/pcf857x.h>
+
+#include "machtypes.h"
+#include "dev-gpio-buttons.h"
+#include "dev-leds-gpio.h"
+#include "dev-spi.h"
+
+#define PB44_GPIO_I2C_SCL       0
+#define PB44_GPIO_I2C_SDA       1
+
+#define PB44_GPIO_EXP_BASE      16
+#define PB44_GPIO_SW_RESET      (PB44_GPIO_EXP_BASE + 6)
+#define PB44_GPIO_SW_JUMP       (PB44_GPIO_EXP_BASE + 8)
+#define PB44_GPIO_LED_JUMP1     (PB44_GPIO_EXP_BASE + 9)
+#define PB44_GPIO_LED_JUMP2     (PB44_GPIO_EXP_BASE + 10)
+
+#define PB44_KEYS_POLL_INTERVAL         20      /* msecs */
+#define PB44_KEYS_DEBOUNCE_INTERVAL     (3 * PB44_KEYS_POLL_INTERVAL)
+
+static struct i2c_gpio_platform_data pb44_i2c_gpio_data = {
+        .sda_pin        = PB44_GPIO_I2C_SDA,
+        .scl_pin        = PB44_GPIO_I2C_SCL,
+};
+
+static struct platform_device pb44_i2c_gpio_device = {
+        .name           = "i2c-gpio",
+        .id             = 0,
+        .dev = {
+                .platform_data  = &pb44_i2c_gpio_data,
+        }
+};
+
+static struct pcf857x_platform_data pb44_pcf857x_data = {
+        .gpio_base      = PB44_GPIO_EXP_BASE,
+};
+
+static struct i2c_board_info pb44_i2c_board_info[] __initdata = {
+        {
+                I2C_BOARD_INFO("pcf8575", 0x20),
+                .platform_data  = &pb44_pcf857x_data,
+        },
+};
+
+static struct gpio_led pb44_leds_gpio[] __initdata = {
+        {
+                .name           = "pb44:amber:jump1",
+                .gpio           = PB44_GPIO_LED_JUMP1,
+                .active_low     = 1,
+        }, {
+                .name           = "pb44:green:jump2",
+                .gpio           = PB44_GPIO_LED_JUMP2,
+                .active_low     = 1,
+        },
+};
+
+static struct gpio_keys_button pb44_gpio_keys[] __initdata = {
+        {
+                .desc           = "soft_reset",
+                .type           = EV_KEY,
+                .code           = KEY_RESTART,
+                .debounce_interval = PB44_KEYS_DEBOUNCE_INTERVAL,
+                .gpio           = PB44_GPIO_SW_RESET,
+                .active_low     = 1,
+        } , {
+                .desc           = "jumpstart",
+                .type           = EV_KEY,
+                .code           = KEY_WPS_BUTTON,
+                .debounce_interval = PB44_KEYS_DEBOUNCE_INTERVAL,
+                .gpio           = PB44_GPIO_SW_JUMP,
+                .active_low     = 1,
+        }
+};
+
+static struct spi_board_info pb44_spi_info[] = {
+        {
+                .bus_num        = 0,
+                .chip_select    = 0,
+                .max_speed_hz   = 25000000,
+                .modalias       = "m25p64",
+        },
+};
+
+static struct ath79_spi_platform_data pb44_spi_data = {
+        .bus_num                = 0,
+        .num_chipselect         = 1,
+};
+
+static void __init pb44_init(void)
+{
+        i2c_register_board_info(0, pb44_i2c_board_info,
+                                ARRAY_SIZE(pb44_i2c_board_info));
+        platform_device_register(&pb44_i2c_gpio_device);
+
+        ath79_register_leds_gpio(-1, ARRAY_SIZE(pb44_leds_gpio),
+                                 pb44_leds_gpio);
+        ath79_register_gpio_keys_polled(-1, PB44_KEYS_POLL_INTERVAL,
+                                        ARRAY_SIZE(pb44_gpio_keys),
+                                        pb44_gpio_keys);
+        ath79_register_spi(&pb44_spi_data, pb44_spi_info,
+                           ARRAY_SIZE(pb44_spi_info));
+}
+
+MIPS_MACHINE(ATH79_MACH_PB44, "PB44", "Atheros PB44 reference board",
+             pb44_init);
diff --git a/arch/mips/ath79/machtypes.h b/arch/mips/ath79/machtypes.h
new file mode 100644
index 000000000000..3940fe470b2d
--- /dev/null
+++ b/arch/mips/ath79/machtypes.h
@@ -0,0 +1,23 @@
+/*
+ *  Atheros AR71XX/AR724X/AR913X machine type definitions
+ *
+ *  Copyright (C) 2008-2010 Gabor Juhos <juhosg@openwrt.org>
+ *  Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ */
+
+#ifndef _ATH79_MACHTYPE_H
+#define _ATH79_MACHTYPE_H
+
+#include <asm/mips_machine.h>
+
+enum ath79_mach_type {
+        ATH79_MACH_GENERIC = 0,
+        ATH79_MACH_AP81,                /* Atheros AP81 reference board */
+        ATH79_MACH_PB44,                /* Atheros PB44 reference board */
+};
+
+#endif /* _ATH79_MACHTYPE_H */
diff --git a/arch/mips/ath79/prom.c b/arch/mips/ath79/prom.c
new file mode 100644
index 000000000000..e9cbd7c2918f
--- /dev/null
+++ b/arch/mips/ath79/prom.c
@@ -0,0 +1,57 @@
+/*
+ *  Atheros AR71XX/AR724X/AR913X specific prom routines
+ *
+ *  Copyright (C) 2008-2010 Gabor Juhos <juhosg@openwrt.org>
+ *  Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/io.h>
+#include <linux/string.h>
+
+#include <asm/bootinfo.h>
+#include <asm/addrspace.h>
+
+#include "common.h"
+
+static inline int is_valid_ram_addr(void *addr)
+{
+        if (((u32) addr > KSEG0) &&
+            ((u32) addr < (KSEG0 + ATH79_MEM_SIZE_MAX)))
+                return 1;
+
+        if (((u32) addr > KSEG1) &&
+            ((u32) addr < (KSEG1 + ATH79_MEM_SIZE_MAX)))
+                return 1;
+
+        return 0;
+}
+
+static __init void ath79_prom_init_cmdline(int argc, char **argv)
+{
+        int i;
+
+        if (!is_valid_ram_addr(argv))
+                return;
+
+        for (i = 0; i < argc; i++)
+                if (is_valid_ram_addr(argv[i])) {
+                        strlcat(arcs_cmdline, " ", sizeof(arcs_cmdline));
+                        strlcat(arcs_cmdline, argv[i], sizeof(arcs_cmdline));
+                }
+}
+
+void __init prom_init(void)
+{
+        ath79_prom_init_cmdline(fw_arg0, (char **)fw_arg1);
+}
+
+void __init prom_free_prom_memory(void)
+{
+        /* We do not have to prom memory to free */
+}
diff --git a/arch/mips/ath79/setup.c b/arch/mips/ath79/setup.c
new file mode 100644
index 000000000000..159b42f106b0
--- /dev/null
+++ b/arch/mips/ath79/setup.c
@@ -0,0 +1,206 @@
+/*
+ *  Atheros AR71XX/AR724X/AR913X specific setup
+ *
+ *  Copyright (C) 2008-2011 Gabor Juhos <juhosg@openwrt.org>
+ *  Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
+ *
+ *  Parts of this file are based on Atheros' 2.6.15 BSP
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/bootmem.h>
+#include <linux/err.h>
+#include <linux/clk.h>
+
+#include <asm/bootinfo.h>
+#include <asm/time.h>           /* for mips_hpt_frequency */
+#include <asm/reboot.h>         /* for _machine_{restart,halt} */
+#include <asm/mips_machine.h>
+
+#include <asm/mach-ath79/ath79.h>
+#include <asm/mach-ath79/ar71xx_regs.h>
+#include "common.h"
+#include "dev-common.h"
+#include "machtypes.h"
+
+#define ATH79_SYS_TYPE_LEN      64
+
+#define AR71XX_BASE_FREQ        40000000
+#define AR724X_BASE_FREQ        5000000
+#define AR913X_BASE_FREQ        5000000
+
+static char ath79_sys_type[ATH79_SYS_TYPE_LEN];
+
+static void ath79_restart(char *command)
+{
+        ath79_device_reset_set(AR71XX_RESET_FULL_CHIP);
+        for (;;)
+                if (cpu_wait)
+                        cpu_wait();
+}
+
+static void ath79_halt(void)
+{
+        while (1)
+                cpu_wait();
+}
+
+static void __init ath79_detect_mem_size(void)
+{
+        unsigned long size;
+
+        for (size = ATH79_MEM_SIZE_MIN; size < ATH79_MEM_SIZE_MAX;
+             size <<= 1) {
+                if (!memcmp(ath79_detect_mem_size,
+                            ath79_detect_mem_size + size, 1024))
+                        break;
+        }
+
+        add_memory_region(0, size, BOOT_MEM_RAM);
+}
+
+static void __init ath79_detect_sys_type(void)
+{
+        char *chip = "????";
+        u32 id;
+        u32 major;
+        u32 minor;
+        u32 rev = 0;
+
+        id = ath79_reset_rr(AR71XX_RESET_REG_REV_ID);
+        major = id & REV_ID_MAJOR_MASK;
+
+        switch (major) {
+        case REV_ID_MAJOR_AR71XX:
+                minor = id & AR71XX_REV_ID_MINOR_MASK;
+                rev = id >> AR71XX_REV_ID_REVISION_SHIFT;
+                rev &= AR71XX_REV_ID_REVISION_MASK;
+                switch (minor) {
+                case AR71XX_REV_ID_MINOR_AR7130:
+                        ath79_soc = ATH79_SOC_AR7130;
+                        chip = "7130";
+                        break;
+
+                case AR71XX_REV_ID_MINOR_AR7141:
+                        ath79_soc = ATH79_SOC_AR7141;
+                        chip = "7141";
+                        break;
+
+                case AR71XX_REV_ID_MINOR_AR7161:
+                        ath79_soc = ATH79_SOC_AR7161;
+                        chip = "7161";
+                        break;
+                }
+                break;
+
+        case REV_ID_MAJOR_AR7240:
+                ath79_soc = ATH79_SOC_AR7240;
+                chip = "7240";
+                rev = (id & AR724X_REV_ID_REVISION_MASK);
+                break;
+
+        case REV_ID_MAJOR_AR7241:
+                ath79_soc = ATH79_SOC_AR7241;
+                chip = "7241";
+                rev = (id & AR724X_REV_ID_REVISION_MASK);
+                break;
+
+        case REV_ID_MAJOR_AR7242:
+                ath79_soc = ATH79_SOC_AR7242;
+                chip = "7242";
+                rev = (id & AR724X_REV_ID_REVISION_MASK);
+                break;
+
+        case REV_ID_MAJOR_AR913X:
+                minor = id & AR913X_REV_ID_MINOR_MASK;
+                rev = id >> AR913X_REV_ID_REVISION_SHIFT;
+                rev &= AR913X_REV_ID_REVISION_MASK;
+                switch (minor) {
+                case AR913X_REV_ID_MINOR_AR9130:
+                        ath79_soc = ATH79_SOC_AR9130;
+                        chip = "9130";
+                        break;
+
+                case AR913X_REV_ID_MINOR_AR9132:
+                        ath79_soc = ATH79_SOC_AR9132;
+                        chip = "9132";
+                        break;
+                }
+                break;
+
+        default:
+                panic("ath79: unknown SoC, id:0x%08x\n", id);
+        }
+
+        sprintf(ath79_sys_type, "Atheros AR%s rev %u", chip, rev);
+        pr_info("SoC: %s\n", ath79_sys_type);
+}
+
+const char *get_system_type(void)
+{
+        return ath79_sys_type;
+}
+
+unsigned int __cpuinit get_c0_compare_int(void)
+{
+        return CP0_LEGACY_COMPARE_IRQ;
+}
+
+void __init plat_mem_setup(void)
+{
+        set_io_port_base(KSEG1);
+
+        ath79_reset_base = ioremap_nocache(AR71XX_RESET_BASE,
+                                           AR71XX_RESET_SIZE);
+        ath79_pll_base = ioremap_nocache(AR71XX_PLL_BASE,
+                                         AR71XX_PLL_SIZE);
+        ath79_ddr_base = ioremap_nocache(AR71XX_DDR_CTRL_BASE,
+                                         AR71XX_DDR_CTRL_SIZE);
+
+        ath79_detect_sys_type();
+        ath79_detect_mem_size();
+        ath79_clocks_init();
+
+        _machine_restart = ath79_restart;
+        _machine_halt = ath79_halt;
+        pm_power_off = ath79_halt;
+}
+
+void __init plat_time_init(void)
+{
+        struct clk *clk;
+
+        clk = clk_get(NULL, "cpu");
+        if (IS_ERR(clk))
+                panic("unable to get CPU clock, err=%ld", PTR_ERR(clk));
+
+        mips_hpt_frequency = clk_get_rate(clk) / 2;
+}
+
+static int __init ath79_setup(void)
+{
+        ath79_gpio_init();
+        ath79_register_uart();
+        ath79_register_wdt();
+
+        mips_machine_setup();
+
+        return 0;
+}
+
+arch_initcall(ath79_setup);
+
+static void __init ath79_generic_init(void)
+{
+        /* Nothing to do */
+}
+
+MIPS_MACHINE(ATH79_MACH_GENERIC,
+             "Generic",
+             "Generic AR71XX/AR724X/AR913X based board",
+             ath79_generic_init);
diff --git a/arch/mips/configs/malta_defconfig b/arch/mips/configs/malta_defconfig
index b455d0f36486..9d03b68aece8 100644
--- a/arch/mips/configs/malta_defconfig
+++ b/arch/mips/configs/malta_defconfig
@@ -369,7 +369,10 @@ CONFIG_VT_HW_CONSOLE_BINDING=y
 CONFIG_SERIAL_8250=y
 CONFIG_SERIAL_8250_CONSOLE=y
 # CONFIG_HWMON is not set
+CONFIG_FB=y
+CONFIG_FB_CIRRUS=y
 # CONFIG_VGA_CONSOLE is not set
+CONFIG_FRAMEBUFFER_CONSOLE=y
 CONFIG_HID=m
 CONFIG_LEDS_CLASS=m
 CONFIG_LEDS_TRIGGER_TIMER=m
diff --git a/arch/mips/include/asm/cache.h b/arch/mips/include/asm/cache.h
index 37f175c42bb5..650ac9ba734c 100644
--- a/arch/mips/include/asm/cache.h
+++ b/arch/mips/include/asm/cache.h
@@ -17,4 +17,6 @@
 #define SMP_CACHE_SHIFT         L1_CACHE_SHIFT
 #define SMP_CACHE_BYTES         L1_CACHE_BYTES
 
+#define __read_mostly __attribute__((__section__(".data.read_mostly")))
+
 #endif /* _ASM_CACHE_H */
diff --git a/arch/mips/include/asm/cpu-info.h b/arch/mips/include/asm/cpu-info.h
index b39def3f6e03..c454550eb0c0 100644
--- a/arch/mips/include/asm/cpu-info.h
+++ b/arch/mips/include/asm/cpu-info.h
@@ -78,6 +78,7 @@ struct cpuinfo_mips {
         unsigned int            watch_reg_use_cnt; /* Usable by ptrace */
 #define NUM_WATCH_REGS 4
         u16                     watch_reg_masks[NUM_WATCH_REGS];
+        unsigned int            kscratch_mask; /* Usable KScratch mask. */
 } __attribute__((aligned(SMP_CACHE_BYTES)));
 
 extern struct cpuinfo_mips cpu_data[];
diff --git a/arch/mips/include/asm/inst.h b/arch/mips/include/asm/inst.h
index 444ff71aa0e8..7ebfc392e58d 100644
--- a/arch/mips/include/asm/inst.h
+++ b/arch/mips/include/asm/inst.h
@@ -72,6 +72,7 @@ enum spec2_op {
 enum spec3_op {
         ext_op, dextm_op, dextu_op, dext_op,
         ins_op, dinsm_op, dinsu_op, dins_op,
+        lx_op = 0x0a,
         bshfl_op = 0x20,
         dbshfl_op = 0x24,
         rdhwr_op = 0x3b
@@ -179,6 +180,19 @@ enum mad_func {
 };
 
 /*
+ * func field for special3 lx opcodes (Cavium Octeon).
+ */
+enum lx_func {
+        lwx_op  = 0x00,
+        lhx_op  = 0x04,
+        lbux_op = 0x06,
+        ldx_op  = 0x08,
+        lwux_op = 0x10,
+        lhux_op = 0x14,
+        lbx_op  = 0x16,
+};
+
+/*
  * Damn ...  bitfields depend from byteorder :-(
  */
 #ifdef __MIPSEB__
diff --git a/arch/mips/include/asm/jump_label.h b/arch/mips/include/asm/jump_label.h
new file mode 100644
index 000000000000..7622ccf75076
--- /dev/null
+++ b/arch/mips/include/asm/jump_label.h
@@ -0,0 +1,48 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (c) 2010 Cavium Networks, Inc.
+ */
+#ifndef _ASM_MIPS_JUMP_LABEL_H
+#define _ASM_MIPS_JUMP_LABEL_H
+
+#include <linux/types.h>
+
+#ifdef __KERNEL__
+
+#define JUMP_LABEL_NOP_SIZE 4
+
+#ifdef CONFIG_64BIT
+#define WORD_INSN ".dword"
+#else
+#define WORD_INSN ".word"
+#endif
+
+#define JUMP_LABEL(key, label)                                          \
+        do {                                                            \
+                asm goto("1:\tnop\n\t"                                  \
+                        "nop\n\t"                                       \
+                        ".pushsection __jump_table,  \"a\"\n\t"         \
+                        WORD_INSN " 1b, %l[" #label "], %0\n\t"         \
+                        ".popsection\n\t"                               \
+                        : :  "i" (key) :  : label);                     \
+        } while (0)
+
+
+#endif /* __KERNEL__ */
+
+#ifdef CONFIG_64BIT
+typedef u64 jump_label_t;
+#else
+typedef u32 jump_label_t;
+#endif
+
+struct jump_entry {
+        jump_label_t code;
+        jump_label_t target;
+        jump_label_t key;
+};
+
+#endif /* _ASM_MIPS_JUMP_LABEL_H */
diff --git a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
new file mode 100644
index 000000000000..cda1c8070b27
--- /dev/null
+++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
@@ -0,0 +1,233 @@
+/*
+ *  Atheros AR71XX/AR724X/AR913X SoC register definitions
+ *
+ *  Copyright (C) 2008-2010 Gabor Juhos <juhosg@openwrt.org>
+ *  Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
+ *
+ *  Parts of this file are based on Atheros' 2.6.15 BSP
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ */
+
+#ifndef __ASM_MACH_AR71XX_REGS_H
+#define __ASM_MACH_AR71XX_REGS_H
+
+#include <linux/types.h>
+#include <linux/init.h>
+#include <linux/io.h>
+#include <linux/bitops.h>
+
+#define AR71XX_APB_BASE         0x18000000
+#define AR71XX_SPI_BASE         0x1f000000
+#define AR71XX_SPI_SIZE         0x01000000
+
+#define AR71XX_DDR_CTRL_BASE    (AR71XX_APB_BASE + 0x00000000)
+#define AR71XX_DDR_CTRL_SIZE    0x100
+#define AR71XX_UART_BASE        (AR71XX_APB_BASE + 0x00020000)
+#define AR71XX_UART_SIZE        0x100
+#define AR71XX_GPIO_BASE        (AR71XX_APB_BASE + 0x00040000)
+#define AR71XX_GPIO_SIZE        0x100
+#define AR71XX_PLL_BASE         (AR71XX_APB_BASE + 0x00050000)
+#define AR71XX_PLL_SIZE         0x100
+#define AR71XX_RESET_BASE       (AR71XX_APB_BASE + 0x00060000)
+#define AR71XX_RESET_SIZE       0x100
+
+#define AR913X_WMAC_BASE        (AR71XX_APB_BASE + 0x000C0000)
+#define AR913X_WMAC_SIZE        0x30000
+
+/*
+ * DDR_CTRL block
+ */
+#define AR71XX_DDR_REG_PCI_WIN0         0x7c
+#define AR71XX_DDR_REG_PCI_WIN1         0x80
+#define AR71XX_DDR_REG_PCI_WIN2         0x84
+#define AR71XX_DDR_REG_PCI_WIN3         0x88
+#define AR71XX_DDR_REG_PCI_WIN4         0x8c
+#define AR71XX_DDR_REG_PCI_WIN5         0x90
+#define AR71XX_DDR_REG_PCI_WIN6         0x94
+#define AR71XX_DDR_REG_PCI_WIN7         0x98
+#define AR71XX_DDR_REG_FLUSH_GE0        0x9c
+#define AR71XX_DDR_REG_FLUSH_GE1        0xa0
+#define AR71XX_DDR_REG_FLUSH_USB        0xa4
+#define AR71XX_DDR_REG_FLUSH_PCI        0xa8
+
+#define AR724X_DDR_REG_FLUSH_GE0        0x7c
+#define AR724X_DDR_REG_FLUSH_GE1        0x80
+#define AR724X_DDR_REG_FLUSH_USB        0x84
+#define AR724X_DDR_REG_FLUSH_PCIE       0x88
+
+#define AR913X_DDR_REG_FLUSH_GE0        0x7c
+#define AR913X_DDR_REG_FLUSH_GE1        0x80
+#define AR913X_DDR_REG_FLUSH_USB        0x84
+#define AR913X_DDR_REG_FLUSH_WMAC       0x88
+
+/*
+ * PLL block
+ */
+#define AR71XX_PLL_REG_CPU_CONFIG       0x00
+#define AR71XX_PLL_REG_SEC_CONFIG       0x04
+#define AR71XX_PLL_REG_ETH0_INT_CLOCK   0x10
+#define AR71XX_PLL_REG_ETH1_INT_CLOCK   0x14
+
+#define AR71XX_PLL_DIV_SHIFT            3
+#define AR71XX_PLL_DIV_MASK             0x1f
+#define AR71XX_CPU_DIV_SHIFT            16
+#define AR71XX_CPU_DIV_MASK             0x3
+#define AR71XX_DDR_DIV_SHIFT            18
+#define AR71XX_DDR_DIV_MASK             0x3
+#define AR71XX_AHB_DIV_SHIFT            20
+#define AR71XX_AHB_DIV_MASK             0x7
+
+#define AR724X_PLL_REG_CPU_CONFIG       0x00
+#define AR724X_PLL_REG_PCIE_CONFIG      0x18
+
+#define AR724X_PLL_DIV_SHIFT            0
+#define AR724X_PLL_DIV_MASK             0x3ff
+#define AR724X_PLL_REF_DIV_SHIFT        10
+#define AR724X_PLL_REF_DIV_MASK         0xf
+#define AR724X_AHB_DIV_SHIFT            19
+#define AR724X_AHB_DIV_MASK             0x1
+#define AR724X_DDR_DIV_SHIFT            22
+#define AR724X_DDR_DIV_MASK             0x3
+
+#define AR913X_PLL_REG_CPU_CONFIG       0x00
+#define AR913X_PLL_REG_ETH_CONFIG       0x04
+#define AR913X_PLL_REG_ETH0_INT_CLOCK   0x14
+#define AR913X_PLL_REG_ETH1_INT_CLOCK   0x18
+
+#define AR913X_PLL_DIV_SHIFT            0
+#define AR913X_PLL_DIV_MASK             0x3ff
+#define AR913X_DDR_DIV_SHIFT            22
+#define AR913X_DDR_DIV_MASK             0x3
+#define AR913X_AHB_DIV_SHIFT            19
+#define AR913X_AHB_DIV_MASK             0x1
+
+/*
+ * RESET block
+ */
+#define AR71XX_RESET_REG_TIMER                  0x00
+#define AR71XX_RESET_REG_TIMER_RELOAD           0x04
+#define AR71XX_RESET_REG_WDOG_CTRL              0x08
+#define AR71XX_RESET_REG_WDOG                   0x0c
+#define AR71XX_RESET_REG_MISC_INT_STATUS        0x10
+#define AR71XX_RESET_REG_MISC_INT_ENABLE        0x14
+#define AR71XX_RESET_REG_PCI_INT_STATUS         0x18
+#define AR71XX_RESET_REG_PCI_INT_ENABLE         0x1c
+#define AR71XX_RESET_REG_GLOBAL_INT_STATUS      0x20
+#define AR71XX_RESET_REG_RESET_MODULE           0x24
+#define AR71XX_RESET_REG_PERFC_CTRL             0x2c
+#define AR71XX_RESET_REG_PERFC0                 0x30
+#define AR71XX_RESET_REG_PERFC1                 0x34
+#define AR71XX_RESET_REG_REV_ID                 0x90
+
+#define AR913X_RESET_REG_GLOBAL_INT_STATUS      0x18
+#define AR913X_RESET_REG_RESET_MODULE           0x1c
+#define AR913X_RESET_REG_PERF_CTRL              0x20
+#define AR913X_RESET_REG_PERFC0                 0x24
+#define AR913X_RESET_REG_PERFC1                 0x28
+
+#define AR724X_RESET_REG_RESET_MODULE           0x1c
+
+#define MISC_INT_DMA                    BIT(7)
+#define MISC_INT_OHCI                   BIT(6)
+#define MISC_INT_PERFC                  BIT(5)
+#define MISC_INT_WDOG                   BIT(4)
+#define MISC_INT_UART                   BIT(3)
+#define MISC_INT_GPIO                   BIT(2)
+#define MISC_INT_ERROR                  BIT(1)
+#define MISC_INT_TIMER                  BIT(0)
+
+#define AR71XX_RESET_EXTERNAL           BIT(28)
+#define AR71XX_RESET_FULL_CHIP          BIT(24)
+#define AR71XX_RESET_CPU_NMI            BIT(21)
+#define AR71XX_RESET_CPU_COLD           BIT(20)
+#define AR71XX_RESET_DMA                BIT(19)
+#define AR71XX_RESET_SLIC               BIT(18)
+#define AR71XX_RESET_STEREO             BIT(17)
+#define AR71XX_RESET_DDR                BIT(16)
+#define AR71XX_RESET_GE1_MAC            BIT(13)
+#define AR71XX_RESET_GE1_PHY            BIT(12)
+#define AR71XX_RESET_USBSUS_OVERRIDE    BIT(10)
+#define AR71XX_RESET_GE0_MAC            BIT(9)
+#define AR71XX_RESET_GE0_PHY            BIT(8)
+#define AR71XX_RESET_USB_OHCI_DLL       BIT(6)
+#define AR71XX_RESET_USB_HOST           BIT(5)
+#define AR71XX_RESET_USB_PHY            BIT(4)
+#define AR71XX_RESET_PCI_BUS            BIT(1)
+#define AR71XX_RESET_PCI_CORE           BIT(0)
+
+#define AR724X_RESET_GE1_MDIO           BIT(23)
+#define AR724X_RESET_GE0_MDIO           BIT(22)
+#define AR724X_RESET_PCIE_PHY_SERIAL    BIT(10)
+#define AR724X_RESET_PCIE_PHY           BIT(7)
+#define AR724X_RESET_PCIE               BIT(6)
+#define AR724X_RESET_OHCI_DLL           BIT(3)
+
+#define AR913X_RESET_AMBA2WMAC          BIT(22)
+
+#define REV_ID_MAJOR_MASK               0xfff0
+#define REV_ID_MAJOR_AR71XX             0x00a0
+#define REV_ID_MAJOR_AR913X             0x00b0
+#define REV_ID_MAJOR_AR7240             0x00c0
+#define REV_ID_MAJOR_AR7241             0x0100
+#define REV_ID_MAJOR_AR7242             0x1100
+
+#define AR71XX_REV_ID_MINOR_MASK        0x3
+#define AR71XX_REV_ID_MINOR_AR7130      0x0
+#define AR71XX_REV_ID_MINOR_AR7141      0x1
+#define AR71XX_REV_ID_MINOR_AR7161      0x2
+#define AR71XX_REV_ID_REVISION_MASK     0x3
+#define AR71XX_REV_ID_REVISION_SHIFT    2
+
+#define AR913X_REV_ID_MINOR_MASK        0x3
+#define AR913X_REV_ID_MINOR_AR9130      0x0
+#define AR913X_REV_ID_MINOR_AR9132      0x1
+#define AR913X_REV_ID_REVISION_MASK     0x3
+#define AR913X_REV_ID_REVISION_SHIFT    2
+
+#define AR724X_REV_ID_REVISION_MASK     0x3
+
+/*
+ * SPI block
+ */
+#define AR71XX_SPI_REG_FS       0x00    /* Function Select */
+#define AR71XX_SPI_REG_CTRL     0x04    /* SPI Control */
+#define AR71XX_SPI_REG_IOC      0x08    /* SPI I/O Control */
+#define AR71XX_SPI_REG_RDS      0x0c    /* Read Data Shift */
+
+#define AR71XX_SPI_FS_GPIO      BIT(0)  /* Enable GPIO mode */
+
+#define AR71XX_SPI_CTRL_RD      BIT(6)  /* Remap Disable */
+#define AR71XX_SPI_CTRL_DIV_MASK 0x3f
+
+#define AR71XX_SPI_IOC_DO       BIT(0)  /* Data Out pin */
+#define AR71XX_SPI_IOC_CLK      BIT(8)  /* CLK pin */
+#define AR71XX_SPI_IOC_CS(n)    BIT(16 + (n))
+#define AR71XX_SPI_IOC_CS0      AR71XX_SPI_IOC_CS(0)
+#define AR71XX_SPI_IOC_CS1      AR71XX_SPI_IOC_CS(1)
+#define AR71XX_SPI_IOC_CS2      AR71XX_SPI_IOC_CS(2)
+#define AR71XX_SPI_IOC_CS_ALL   (AR71XX_SPI_IOC_CS0 | AR71XX_SPI_IOC_CS1 | \
+                                 AR71XX_SPI_IOC_CS2)
+
+/*
+ * GPIO block
+ */
+#define AR71XX_GPIO_REG_OE              0x00
+#define AR71XX_GPIO_REG_IN              0x04
+#define AR71XX_GPIO_REG_OUT             0x08
+#define AR71XX_GPIO_REG_SET             0x0c
+#define AR71XX_GPIO_REG_CLEAR           0x10
+#define AR71XX_GPIO_REG_INT_MODE        0x14
+#define AR71XX_GPIO_REG_INT_TYPE        0x18
+#define AR71XX_GPIO_REG_INT_POLARITY    0x1c
+#define AR71XX_GPIO_REG_INT_PENDING     0x20
+#define AR71XX_GPIO_REG_INT_ENABLE      0x24
+#define AR71XX_GPIO_REG_FUNC            0x28
+
+#define AR71XX_GPIO_COUNT               16
+#define AR724X_GPIO_COUNT               18
+#define AR913X_GPIO_COUNT               22
+
+#endif /* __ASM_MACH_AR71XX_REGS_H */
diff --git a/arch/mips/include/asm/mach-ath79/ath79.h b/arch/mips/include/asm/mach-ath79/ath79.h
new file mode 100644
index 000000000000..6a9f168506fe
--- /dev/null
+++ b/arch/mips/include/asm/mach-ath79/ath79.h
@@ -0,0 +1,96 @@
+/*
+ *  Atheros AR71XX/AR724X/AR913X common definitions
+ *
+ *  Copyright (C) 2008-2011 Gabor Juhos <juhosg@openwrt.org>
+ *  Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
+ *
+ *  Parts of this file are based on Atheros' 2.6.15 BSP
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ */
+
+#ifndef __ASM_MACH_ATH79_H
+#define __ASM_MACH_ATH79_H
+
+#include <linux/types.h>
+#include <linux/io.h>
+
+enum ath79_soc_type {
+        ATH79_SOC_UNKNOWN,
+        ATH79_SOC_AR7130,
+        ATH79_SOC_AR7141,
+        ATH79_SOC_AR7161,
+        ATH79_SOC_AR7240,
+        ATH79_SOC_AR7241,
+        ATH79_SOC_AR7242,
+        ATH79_SOC_AR9130,
+        ATH79_SOC_AR9132
+};
+
+extern enum ath79_soc_type ath79_soc;
+
+static inline int soc_is_ar71xx(void)
+{
+        return (ath79_soc == ATH79_SOC_AR7130 ||
+                ath79_soc == ATH79_SOC_AR7141 ||
+                ath79_soc == ATH79_SOC_AR7161);
+}
+
+static inline int soc_is_ar724x(void)
+{
+        return (ath79_soc == ATH79_SOC_AR7240 ||
+                ath79_soc == ATH79_SOC_AR7241 ||
+                ath79_soc == ATH79_SOC_AR7242);
+}
+
+static inline int soc_is_ar7240(void)
+{
+        return (ath79_soc == ATH79_SOC_AR7240);
+}
+
+static inline int soc_is_ar7241(void)
+{
+        return (ath79_soc == ATH79_SOC_AR7241);
+}
+
+static inline int soc_is_ar7242(void)
+{
+        return (ath79_soc == ATH79_SOC_AR7242);
+}
+
+static inline int soc_is_ar913x(void)
+{
+        return (ath79_soc == ATH79_SOC_AR9130 ||
+                ath79_soc == ATH79_SOC_AR9132);
+}
+
+extern void __iomem *ath79_ddr_base;
+extern void __iomem *ath79_pll_base;
+extern void __iomem *ath79_reset_base;
+
+static inline void ath79_pll_wr(unsigned reg, u32 val)
+{
+        __raw_writel(val, ath79_pll_base + reg);
+}
+
+static inline u32 ath79_pll_rr(unsigned reg)
+{
+        return __raw_readl(ath79_pll_base + reg);
+}
+
+static inline void ath79_reset_wr(unsigned reg, u32 val)
+{
+        __raw_writel(val, ath79_reset_base + reg);
+}
+
+static inline u32 ath79_reset_rr(unsigned reg)
+{
+        return __raw_readl(ath79_reset_base + reg);
+}
+
+void ath79_device_reset_set(u32 mask);
+void ath79_device_reset_clear(u32 mask);
+
+#endif /* __ASM_MACH_ATH79_H */
diff --git a/arch/mips/include/asm/mach-ath79/ath79_spi_platform.h b/arch/mips/include/asm/mach-ath79/ath79_spi_platform.h
new file mode 100644
index 000000000000..aa2283e602fc
--- /dev/null
+++ b/arch/mips/include/asm/mach-ath79/ath79_spi_platform.h
@@ -0,0 +1,23 @@
+/*
+ *  Platform data definition for Atheros AR71XX/AR724X/AR913X SPI controller
+ *
+ *  Copyright (C) 2008-2010 Gabor Juhos <juhosg@openwrt.org>
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ */
+
+#ifndef _ATH79_SPI_PLATFORM_H
+#define _ATH79_SPI_PLATFORM_H
+
+struct ath79_spi_platform_data {
+        unsigned        bus_num;
+        unsigned        num_chipselect;
+};
+
+struct ath79_spi_controller_data {
+        unsigned        gpio;
+};
+
+#endif /* _ATH79_SPI_PLATFORM_H */
diff --git a/arch/mips/include/asm/mach-ath79/cpu-feature-overrides.h b/arch/mips/include/asm/mach-ath79/cpu-feature-overrides.h
new file mode 100644
index 000000000000..4476fa03bf36
--- /dev/null
+++ b/arch/mips/include/asm/mach-ath79/cpu-feature-overrides.h
@@ -0,0 +1,56 @@
+/*
+ *  Atheros AR71XX/AR724X/AR913X specific CPU feature overrides
+ *
+ *  Copyright (C) 2008-2010 Gabor Juhos <juhosg@openwrt.org>
+ *  Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
+ *
+ *  This file was derived from: include/asm-mips/cpu-features.h
+ *      Copyright (C) 2003, 2004 Ralf Baechle
+ *      Copyright (C) 2004 Maciej W. Rozycki
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ *
+ */
+#ifndef __ASM_MACH_ATH79_CPU_FEATURE_OVERRIDES_H
+#define __ASM_MACH_ATH79_CPU_FEATURE_OVERRIDES_H
+
+#define cpu_has_tlb             1
+#define cpu_has_4kex            1
+#define cpu_has_3k_cache        0
+#define cpu_has_4k_cache        1
+#define cpu_has_tx39_cache      0
+#define cpu_has_sb1_cache       0
+#define cpu_has_fpu             0
+#define cpu_has_32fpr           0
+#define cpu_has_counter         1
+#define cpu_has_watch           1
+#define cpu_has_divec           1
+
+#define cpu_has_prefetch        1
+#define cpu_has_ejtag           1
+#define cpu_has_llsc            1
+
+#define cpu_has_mips16          1
+#define cpu_has_mdmx            0
+#define cpu_has_mips3d          0
+#define cpu_has_smartmips       0
+
+#define cpu_has_mips32r1        1
+#define cpu_has_mips32r2        1
+#define cpu_has_mips64r1        0
+#define cpu_has_mips64r2        0
+
+#define cpu_has_dsp             0
+#define cpu_has_mipsmt          0
+
+#define cpu_has_64bits          0
+#define cpu_has_64bit_zero_reg  0
+#define cpu_has_64bit_gp_regs   0
+#define cpu_has_64bit_addresses 0
+
+#define cpu_dcache_line_size()  32
+#define cpu_icache_line_size()  32
+
+#endif /* __ASM_MACH_ATH79_CPU_FEATURE_OVERRIDES_H */
diff --git a/arch/mips/include/asm/mach-ath79/gpio.h b/arch/mips/include/asm/mach-ath79/gpio.h
new file mode 100644
index 000000000000..60dcb62785b4
--- /dev/null
+++ b/arch/mips/include/asm/mach-ath79/gpio.h
@@ -0,0 +1,26 @@
+/*
+ *  Atheros AR71XX/AR724X/AR913X GPIO API definitions
+ *
+ *  Copyright (C) 2008-2010 Gabor Juhos <juhosg@openwrt.org>
+ *  Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ *
+ */
+
+#ifndef __ASM_MACH_ATH79_GPIO_H
+#define __ASM_MACH_ATH79_GPIO_H
+
+#define ARCH_NR_GPIOS   64
+#include <asm-generic/gpio.h>
+
+int gpio_to_irq(unsigned gpio);
+int irq_to_gpio(unsigned irq);
+int gpio_get_value(unsigned gpio);
+void gpio_set_value(unsigned gpio, int value);
+
+#define gpio_cansleep   __gpio_cansleep
+
+#endif /* __ASM_MACH_ATH79_GPIO_H */
diff --git a/arch/mips/include/asm/mach-ath79/irq.h b/arch/mips/include/asm/mach-ath79/irq.h
new file mode 100644
index 000000000000..189bc6eb9c10
--- /dev/null
+++ b/arch/mips/include/asm/mach-ath79/irq.h
@@ -0,0 +1,36 @@
+/*
+ *  Copyright (C) 2008-2010 Gabor Juhos <juhosg@openwrt.org>
+ *  Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ */
+#ifndef __ASM_MACH_ATH79_IRQ_H
+#define __ASM_MACH_ATH79_IRQ_H
+
+#define MIPS_CPU_IRQ_BASE       0
+#define NR_IRQS                 16
+
+#define ATH79_MISC_IRQ_BASE     8
+#define ATH79_MISC_IRQ_COUNT    8
+
+#define ATH79_CPU_IRQ_IP2       (MIPS_CPU_IRQ_BASE + 2)
+#define ATH79_CPU_IRQ_USB       (MIPS_CPU_IRQ_BASE + 3)
+#define ATH79_CPU_IRQ_GE0       (MIPS_CPU_IRQ_BASE + 4)
+#define ATH79_CPU_IRQ_GE1       (MIPS_CPU_IRQ_BASE + 5)
+#define ATH79_CPU_IRQ_MISC      (MIPS_CPU_IRQ_BASE + 6)
+#define ATH79_CPU_IRQ_TIMER     (MIPS_CPU_IRQ_BASE + 7)
+
+#define ATH79_MISC_IRQ_TIMER    (ATH79_MISC_IRQ_BASE + 0)
+#define ATH79_MISC_IRQ_ERROR    (ATH79_MISC_IRQ_BASE + 1)
+#define ATH79_MISC_IRQ_GPIO     (ATH79_MISC_IRQ_BASE + 2)
+#define ATH79_MISC_IRQ_UART     (ATH79_MISC_IRQ_BASE + 3)
+#define ATH79_MISC_IRQ_WDOG     (ATH79_MISC_IRQ_BASE + 4)
+#define ATH79_MISC_IRQ_PERFC    (ATH79_MISC_IRQ_BASE + 5)
+#define ATH79_MISC_IRQ_OHCI     (ATH79_MISC_IRQ_BASE + 6)
+#define ATH79_MISC_IRQ_DMA      (ATH79_MISC_IRQ_BASE + 7)
+
+#include_next <irq.h>
+
+#endif /* __ASM_MACH_ATH79_IRQ_H */
diff --git a/arch/mips/include/asm/mach-ath79/kernel-entry-init.h b/arch/mips/include/asm/mach-ath79/kernel-entry-init.h
new file mode 100644
index 000000000000..d8d046bccc8e
--- /dev/null
+++ b/arch/mips/include/asm/mach-ath79/kernel-entry-init.h
@@ -0,0 +1,32 @@
+/*
+ *  Atheros AR71XX/AR724X/AR913X specific kernel entry setup
+ *
+ *  Copyright (C) 2009 Gabor Juhos <juhosg@openwrt.org>
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ *
+ */
+#ifndef __ASM_MACH_ATH79_KERNEL_ENTRY_H
+#define __ASM_MACH_ATH79_KERNEL_ENTRY_H
+
+        /*
+         * Some bootloaders set the 'Kseg0 coherency algorithm' to
+         * 'Cacheable, noncoherent, write-through, no write allocate'
+         * and this cause performance issues. Let's go and change it to
+         * 'Cacheable, noncoherent, write-back, write allocate'
+         */
+        .macro  kernel_entry_setup
+        mfc0    t0, CP0_CONFIG
+        li      t1, ~CONF_CM_CMASK
+        and     t0, t1
+        ori     t0, CONF_CM_CACHABLE_NONCOHERENT
+        mtc0    t0, CP0_CONFIG
+        nop
+        .endm
+
+        .macro  smp_slave_setup
+        .endm
+
+#endif /* __ASM_MACH_ATH79_KERNEL_ENTRY_H */
diff --git a/arch/mips/include/asm/mach-ath79/war.h b/arch/mips/include/asm/mach-ath79/war.h
new file mode 100644
index 000000000000..323d9f1d8c45
--- /dev/null
+++ b/arch/mips/include/asm/mach-ath79/war.h
@@ -0,0 +1,25 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2002, 2004, 2007 by Ralf Baechle <ralf@linux-mips.org>
+ */
+#ifndef __ASM_MACH_ATH79_WAR_H
+#define __ASM_MACH_ATH79_WAR_H
+
+#define R4600_V1_INDEX_ICACHEOP_WAR     0
+#define R4600_V1_HIT_CACHEOP_WAR        0
+#define R4600_V2_HIT_CACHEOP_WAR        0
+#define R5432_CP0_INTERRUPT_WAR         0
+#define BCM1250_M3_WAR                  0
+#define SIBYTE_1956_WAR                 0
+#define MIPS4K_ICACHE_REFILL_WAR        0
+#define MIPS_CACHE_SYNC_WAR             0
+#define TX49XX_ICACHE_INDEX_INV_WAR     0
+#define RM9000_CDEX_SMP_WAR             0
+#define ICACHE_REFILLS_WORKAROUND_WAR   0
+#define R10000_LLSC_WAR                 0
+#define MIPS34K_MISSED_ITLB_WAR         0
+
+#endif /* __ASM_MACH_ATH79_WAR_H */
diff --git a/arch/mips/include/asm/mips_machine.h b/arch/mips/include/asm/mips_machine.h
new file mode 100644
index 000000000000..363bb352c7f7
--- /dev/null
+++ b/arch/mips/include/asm/mips_machine.h
@@ -0,0 +1,54 @@
+/*
+ *  Copyright (C) 2008-2010 Gabor Juhos <juhosg@openwrt.org>
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ *
+ */
+
+#ifndef __ASM_MIPS_MACHINE_H
+#define __ASM_MIPS_MACHINE_H
+
+#include <linux/init.h>
+#include <linux/stddef.h>
+
+#include <asm/bootinfo.h>
+
+struct mips_machine {
+        unsigned long           mach_type;
+        const char              *mach_id;
+        const char              *mach_name;
+        void                    (*mach_setup)(void);
+};
+
+#define MIPS_MACHINE(_type, _id, _name, _setup)                 \
+static const char machine_name_##_type[] __initconst            \
+                        __aligned(1) = _name;                   \
+static const char machine_id_##_type[] __initconst              \
+                        __aligned(1) = _id;                     \
+static struct mips_machine machine_##_type                      \
+                __used __section(.mips.machines.init) =         \
+{                                                               \
+        .mach_type      = _type,                                \
+        .mach_id        = machine_id_##_type,                   \
+        .mach_name      = machine_name_##_type,                 \
+        .mach_setup     = _setup,                               \
+};
+
+extern long __mips_machines_start;
+extern long __mips_machines_end;
+
+#ifdef CONFIG_MIPS_MACHINE
+int  mips_machtype_setup(char *id) __init;
+void mips_machine_setup(void) __init;
+void mips_set_machine_name(const char *name) __init;
+char *mips_get_machine_name(void);
+#else
+static inline int mips_machtype_setup(char *id) { return 1; }
+static inline void mips_machine_setup(void) { }
+static inline void mips_set_machine_name(const char *name) { }
+static inline char *mips_get_machine_name(void) { return NULL; }
+#endif /* CONFIG_MIPS_MACHINE */
+
+#endif /* __ASM_MIPS_MACHINE_H */
diff --git a/arch/mips/include/asm/mmu_context.h b/arch/mips/include/asm/mmu_context.h
index d9592733a7ba..73c0d45798de 100644
--- a/arch/mips/include/asm/mmu_context.h
+++ b/arch/mips/include/asm/mmu_context.h
@@ -29,13 +29,7 @@
 #define TLBMISS_HANDLER_SETUP_PGD(pgd)                          \
         tlbmiss_handler_setup_pgd((unsigned long)(pgd))
 
-static inline void tlbmiss_handler_setup_pgd(unsigned long pgd)
-{
-        /* Check for swapper_pg_dir and convert to physical address. */
-        if ((pgd & CKSEG3) == CKSEG0)
-                pgd = CPHYSADDR(pgd);
-        write_c0_context(pgd << 11);
-}
+extern void tlbmiss_handler_setup_pgd(unsigned long pgd);
 
 #define TLBMISS_HANDLER_SETUP()                                         \
         do {                                                            \
diff --git a/arch/mips/include/asm/uasm.h b/arch/mips/include/asm/uasm.h
index 892062d6d748..dcbd4bb417ec 100644
--- a/arch/mips/include/asm/uasm.h
+++ b/arch/mips/include/asm/uasm.h
@@ -115,7 +115,12 @@ Ip_0(_tlbwr);
 Ip_u3u1u2(_xor);
 Ip_u2u1u3(_xori);
 Ip_u2u1msbu3(_dins);
+Ip_u2u1msbu3(_dinsm);
 Ip_u1(_syscall);
+Ip_u1u2s3(_bbit0);
+Ip_u1u2s3(_bbit1);
+Ip_u3u1u2(_lwx);
+Ip_u3u1u2(_ldx);
 
 /* Handle labels. */
 struct uasm_label {
@@ -153,6 +158,7 @@ static inline void __uasminit uasm_l##lb(struct uasm_label **lab, u32 *addr) \
 # define UASM_i_SUBU(buf, rs, rt, rd) uasm_i_dsubu(buf, rs, rt, rd)
 # define UASM_i_LL(buf, rs, rt, off) uasm_i_lld(buf, rs, rt, off)
 # define UASM_i_SC(buf, rs, rt, off) uasm_i_scd(buf, rs, rt, off)
+# define UASM_i_LWX(buf, rs, rt, rd) uasm_i_ldx(buf, rs, rt, rd)
 #else
 # define UASM_i_LW(buf, rs, rt, off) uasm_i_lw(buf, rs, rt, off)
 # define UASM_i_SW(buf, rs, rt, off) uasm_i_sw(buf, rs, rt, off)
@@ -167,6 +173,7 @@ static inline void __uasminit uasm_l##lb(struct uasm_label **lab, u32 *addr) \
 # define UASM_i_SUBU(buf, rs, rt, rd) uasm_i_subu(buf, rs, rt, rd)
 # define UASM_i_LL(buf, rs, rt, off) uasm_i_ll(buf, rs, rt, off)
 # define UASM_i_SC(buf, rs, rt, off) uasm_i_sc(buf, rs, rt, off)
+# define UASM_i_LWX(buf, rs, rt, rd) uasm_i_lwx(buf, rs, rt, rd)
 #endif
 
 #define uasm_i_b(buf, off) uasm_i_beq(buf, 0, 0, off)
diff --git a/arch/mips/kernel/Makefile b/arch/mips/kernel/Makefile
index 22b2e0e38617..cedee2bcbd18 100644
--- a/arch/mips/kernel/Makefile
+++ b/arch/mips/kernel/Makefile
@@ -95,6 +95,7 @@ obj-$(CONFIG_GPIO_TXX9)		+= gpio_txx9.o
 obj-$(CONFIG_KEXEC)             += machine_kexec.o relocate_kernel.o
 obj-$(CONFIG_EARLY_PRINTK)      += early_printk.o
 obj-$(CONFIG_SPINLOCK_TEST)     += spinlock_test.o
+obj-$(CONFIG_MIPS_MACHINE)      += mips_machine.o
 
 obj-$(CONFIG_OF)                += prom.o
 
@@ -106,4 +107,6 @@ obj-$(CONFIG_MIPS_CPUFREQ)	+= cpufreq/
 
 obj-$(CONFIG_HW_PERF_EVENTS)    += perf_event.o
 
+obj-$(CONFIG_JUMP_LABEL)        += jump_label.o
+
 CPPFLAGS_vmlinux.lds            := $(KBUILD_CFLAGS)
diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c
index 68dae7b6b5db..f65d4c8c65a6 100644
--- a/arch/mips/kernel/cpu-probe.c
+++ b/arch/mips/kernel/cpu-probe.c
@@ -739,6 +739,8 @@ static inline unsigned int decode_config4(struct cpuinfo_mips *c)
             && cpu_has_tlb)
                 c->tlbsize += (config4 & MIPS_CONF4_MMUSIZEEXT) * 0x40;
 
+        c->kscratch_mask = (config4 >> 16) & 0xff;
+
         return config4 & MIPS_CONF_M;
 }
 
diff --git a/arch/mips/kernel/jump_label.c b/arch/mips/kernel/jump_label.c
new file mode 100644
index 000000000000..6001610cfe55
--- /dev/null
+++ b/arch/mips/kernel/jump_label.c
@@ -0,0 +1,54 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (c) 2010 Cavium Networks, Inc.
+ */
+
+#include <linux/jump_label.h>
+#include <linux/kernel.h>
+#include <linux/memory.h>
+#include <linux/mutex.h>
+#include <linux/types.h>
+#include <linux/cpu.h>
+
+#include <asm/cacheflush.h>
+#include <asm/inst.h>
+
+#ifdef HAVE_JUMP_LABEL
+
+#define J_RANGE_MASK ((1ul << 28) - 1)
+
+void arch_jump_label_transform(struct jump_entry *e,
+                               enum jump_label_type type)
+{
+        union mips_instruction insn;
+        union mips_instruction *insn_p =
+                (union mips_instruction *)(unsigned long)e->code;
+
+        /* Jump only works within a 256MB aligned region. */
+        BUG_ON((e->target & ~J_RANGE_MASK) != (e->code & ~J_RANGE_MASK));
+
+        /* Target must have 4 byte alignment. */
+        BUG_ON((e->target & 3) != 0);
+
+        if (type == JUMP_LABEL_ENABLE) {
+                insn.j_format.opcode = j_op;
+                insn.j_format.target = (e->target & J_RANGE_MASK) >> 2;
+        } else {
+                insn.word = 0; /* nop */
+        }
+
+        get_online_cpus();
+        mutex_lock(&text_mutex);
+        *insn_p = insn;
+
+        flush_icache_range((unsigned long)insn_p,
+                           (unsigned long)insn_p + sizeof(*insn_p));
+
+        mutex_unlock(&text_mutex);
+        put_online_cpus();
+}
+
+#endif /* HAVE_JUMP_LABEL */
diff --git a/arch/mips/kernel/mips_machine.c b/arch/mips/kernel/mips_machine.c
new file mode 100644
index 000000000000..411a058d2c53
--- /dev/null
+++ b/arch/mips/kernel/mips_machine.c
@@ -0,0 +1,86 @@
+/*
+ *  Copyright (C) 2008-2010 Gabor Juhos <juhosg@openwrt.org>
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ *
+ */
+#include <linux/mm.h>
+#include <linux/string.h>
+#include <linux/slab.h>
+
+#include <asm/mips_machine.h>
+
+static struct mips_machine *mips_machine __initdata;
+static char *mips_machine_name = "Unknown";
+
+#define for_each_machine(mach) \
+        for ((mach) = (struct mips_machine *)&__mips_machines_start; \
+             (mach) && \
+             (unsigned long)(mach) < (unsigned long)&__mips_machines_end; \
+             (mach)++)
+
+__init void mips_set_machine_name(const char *name)
+{
+        char *p;
+
+        if (name == NULL)
+                return;
+
+        p = kstrdup(name, GFP_KERNEL);
+        if (!p)
+                pr_err("MIPS: no memory for machine_name\n");
+
+        mips_machine_name = p;
+}
+
+char *mips_get_machine_name(void)
+{
+        return mips_machine_name;
+}
+
+__init int mips_machtype_setup(char *id)
+{
+        struct mips_machine *mach;
+
+        for_each_machine(mach) {
+                if (mach->mach_id == NULL)
+                        continue;
+
+                if (strcmp(mach->mach_id, id) == 0) {
+                        mips_machtype = mach->mach_type;
+                        return 0;
+                }
+        }
+
+        pr_err("MIPS: no machine found for id '%s', supported machines:\n", id);
+        pr_err("%-24s %s\n", "id", "name");
+        for_each_machine(mach)
+                pr_err("%-24s %s\n", mach->mach_id, mach->mach_name);
+
+        return 1;
+}
+
+__setup("machtype=", mips_machtype_setup);
+
+__init void mips_machine_setup(void)
+{
+        struct mips_machine *mach;
+
+        for_each_machine(mach) {
+                if (mips_machtype == mach->mach_type) {
+                        mips_machine = mach;
+                        break;
+                }
+        }
+
+        if (!mips_machine)
+                return;
+
+        mips_set_machine_name(mips_machine->mach_name);
+        pr_info("MIPS: machine is %s\n", mips_machine_name);
+
+        if (mips_machine->mach_setup)
+                mips_machine->mach_setup();
+}
diff --git a/arch/mips/kernel/module.c b/arch/mips/kernel/module.c
index d87a72e9fac7..dd940b701963 100644
--- a/arch/mips/kernel/module.c
+++ b/arch/mips/kernel/module.c
@@ -30,6 +30,8 @@
 #include <linux/kernel.h>
 #include <linux/module.h>
 #include <linux/spinlock.h>
+#include <linux/jump_label.h>
+
 #include <asm/pgtable.h>        /* MODULE_START */
 
 struct mips_hi16 {
@@ -382,6 +384,9 @@ int module_finalize(const Elf_Ehdr *hdr,
         const Elf_Shdr *s;
         char *secstrings = (void *)hdr + sechdrs[hdr->e_shstrndx].sh_offset;
 
+        /* Make jump label nops. */
+        jump_label_apply_nops(me);
+
         INIT_LIST_HEAD(&me->arch.dbe_list);
         for (s = sechdrs; s < sechdrs + hdr->e_shnum; s++) {
                 if (strcmp("__dbe_table", secstrings + s->sh_name) != 0)
diff --git a/arch/mips/kernel/proc.c b/arch/mips/kernel/proc.c
index 26109c4d5170..e309665b6c81 100644
--- a/arch/mips/kernel/proc.c
+++ b/arch/mips/kernel/proc.c
@@ -12,6 +12,7 @@
 #include <asm/cpu-features.h>
 #include <asm/mipsregs.h>
 #include <asm/processor.h>
+#include <asm/mips_machine.h>
 
 unsigned int vced_count, vcei_count;
 
@@ -31,8 +32,12 @@ static int show_cpuinfo(struct seq_file *m, void *v)
         /*
          * For the first processor also print the system type
          */
-        if (n == 0)
+        if (n == 0) {
                 seq_printf(m, "system type\t\t: %s\n", get_system_type());
+                if (mips_get_machine_name())
+                        seq_printf(m, "machine\t\t\t: %s\n",
+                                   mips_get_machine_name());
+        }
 
         seq_printf(m, "processor\t\t: %ld\n", n);
         sprintf(fmt, "cpu model\t\t: %%s V%%d.%%d%s\n",
@@ -69,6 +74,8 @@ static int show_cpuinfo(struct seq_file *m, void *v)
                 );
         seq_printf(m, "shadow register sets\t: %d\n",
                        cpu_data[n].srsets);
+        seq_printf(m, "kscratch registers\t: %d\n",
+                   hweight8(cpu_data[n].kscratch_mask));
         seq_printf(m, "core\t\t\t: %d\n", cpu_data[n].core);
 
         sprintf(fmt, "VCE%%c exceptions\t\t: %s\n",
diff --git a/arch/mips/kernel/setup.c b/arch/mips/kernel/setup.c
index acd3f2c49c06..8ad1d5679f14 100644
--- a/arch/mips/kernel/setup.c
+++ b/arch/mips/kernel/setup.c
@@ -70,7 +70,7 @@ static char __initdata builtin_cmdline[COMMAND_LINE_SIZE] = CONFIG_CMDLINE;
  * mips_io_port_base is the begin of the address space to which x86 style
  * I/O ports are mapped.
  */
-const unsigned long mips_io_port_base __read_mostly = -1;
+const unsigned long mips_io_port_base = -1;
 EXPORT_SYMBOL(mips_io_port_base);
 
 static struct resource code_resource = { .name = "Kernel code", };
diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c
index e97104302541..71350f7f2d88 100644
--- a/arch/mips/kernel/traps.c
+++ b/arch/mips/kernel/traps.c
@@ -1592,7 +1592,6 @@ void __cpuinit per_cpu_trap_init(void)
 #endif /* CONFIG_MIPS_MT_SMTC */
 
         cpu_data[cpu].asid_cache = ASID_FIRST_VERSION;
-        TLBMISS_HANDLER_SETUP();
 
         atomic_inc(&init_mm.mm_count);
         current->active_mm = &init_mm;
@@ -1614,6 +1613,7 @@ void __cpuinit per_cpu_trap_init(void)
                 write_c0_wired(0);
         }
 #endif /* CONFIG_MIPS_MT_SMTC */
+        TLBMISS_HANDLER_SETUP();
 }
 
 /* Install CPU exception handler */
diff --git a/arch/mips/kernel/vmlinux.lds.S b/arch/mips/kernel/vmlinux.lds.S
index f25df73db923..570607b376b5 100644
--- a/arch/mips/kernel/vmlinux.lds.S
+++ b/arch/mips/kernel/vmlinux.lds.S
@@ -98,6 +98,13 @@ SECTIONS
         INIT_TEXT_SECTION(PAGE_SIZE)
         INIT_DATA_SECTION(16)
 
+        . = ALIGN(4);
+        .mips.machines.init : AT(ADDR(.mips.machines.init) - LOAD_OFFSET) {
+                __mips_machines_start = .;
+                *(.mips.machines.init)
+                __mips_machines_end = .;
+        }
+
         /* .exit.text is discarded at runtime, not link time, to deal with
          * references from .rodata
          */
diff --git a/arch/mips/mm/tlbex.c b/arch/mips/mm/tlbex.c
index 93816f3bca67..083d3412d0bc 100644
--- a/arch/mips/mm/tlbex.c
+++ b/arch/mips/mm/tlbex.c
@@ -26,8 +26,10 @@
 #include <linux/smp.h>
 #include <linux/string.h>
 #include <linux/init.h>
+#include <linux/cache.h>
 
-#include <asm/mmu_context.h>
+#include <asm/cacheflush.h>
+#include <asm/pgtable.h>
 #include <asm/war.h>
 #include <asm/uasm.h>
 
@@ -63,6 +65,52 @@ static inline int __maybe_unused r10000_llsc_war(void)
         return R10000_LLSC_WAR;
 }
 
+static int use_bbit_insns(void)
+{
+        switch (current_cpu_type()) {
+        case CPU_CAVIUM_OCTEON:
+        case CPU_CAVIUM_OCTEON_PLUS:
+        case CPU_CAVIUM_OCTEON2:
+                return 1;
+        default:
+                return 0;
+        }
+}
+
+static int use_lwx_insns(void)
+{
+        switch (current_cpu_type()) {
+        case CPU_CAVIUM_OCTEON2:
+                return 1;
+        default:
+                return 0;
+        }
+}
+#if defined(CONFIG_CAVIUM_OCTEON_CVMSEG_SIZE) && \
+    CONFIG_CAVIUM_OCTEON_CVMSEG_SIZE > 0
+static bool scratchpad_available(void)
+{
+        return true;
+}
+static int scratchpad_offset(int i)
+{
+        /*
+         * CVMSEG starts at address -32768 and extends for
+         * CAVIUM_OCTEON_CVMSEG_SIZE 128 byte cache lines.
+         */
+        i += 1; /* Kernel use starts at the top and works down. */
+        return CONFIG_CAVIUM_OCTEON_CVMSEG_SIZE * 128 - (8 * i) - 32768;
+}
+#else
+static bool scratchpad_available(void)
+{
+        return false;
+}
+static int scratchpad_offset(int i)
+{
+        BUG();
+}
+#endif
 /*
  * Found by experiment: At least some revisions of the 4kc throw under
  * some circumstances a machine check exception, triggered by invalid
@@ -173,11 +221,41 @@ static struct uasm_reloc relocs[128] __cpuinitdata;
 static int check_for_high_segbits __cpuinitdata;
 #endif
 
+static int check_for_high_segbits __cpuinitdata;
+
+static unsigned int kscratch_used_mask __cpuinitdata;
+
+static int __cpuinit allocate_kscratch(void)
+{
+        int r;
+        unsigned int a = cpu_data[0].kscratch_mask & ~kscratch_used_mask;
+
+        r = ffs(a);
+
+        if (r == 0)
+                return -1;
+
+        r--; /* make it zero based */
+
+        kscratch_used_mask |= (1 << r);
+
+        return r;
+}
+
+static int scratch_reg __cpuinitdata;
+static int pgd_reg __cpuinitdata;
+enum vmalloc64_mode {not_refill, refill_scratch, refill_noscratch};
+
 #ifndef CONFIG_MIPS_PGD_C0_CONTEXT
+
 /*
  * CONFIG_MIPS_PGD_C0_CONTEXT implies 64 bit and lack of pgd_current,
  * we cannot do r3000 under these circumstances.
+ *
+ * Declare pgd_current here instead of including mmu_context.h to avoid type
+ * conflicts for tlbmiss_handler_setup_pgd
  */
+extern unsigned long pgd_current[];
 
 /*
  * The R3000 TLB handler is simple.
@@ -440,21 +518,43 @@ static __cpuinit __maybe_unused void build_convert_pte_to_entrylo(u32 **p,
 static __cpuinit void build_restore_pagemask(u32 **p,
                                              struct uasm_reloc **r,
                                              unsigned int tmp,
-                                             enum label_id lid)
+                                             enum label_id lid,
+                                             int restore_scratch)
 {
-        /* Reset default page size */
-        if (PM_DEFAULT_MASK >> 16) {
-                uasm_i_lui(p, tmp, PM_DEFAULT_MASK >> 16);
-                uasm_i_ori(p, tmp, tmp, PM_DEFAULT_MASK & 0xffff);
-                uasm_il_b(p, r, lid);
-                uasm_i_mtc0(p, tmp, C0_PAGEMASK);
-        } else if (PM_DEFAULT_MASK) {
-                uasm_i_ori(p, tmp, 0, PM_DEFAULT_MASK);
-                uasm_il_b(p, r, lid);
-                uasm_i_mtc0(p, tmp, C0_PAGEMASK);
+        if (restore_scratch) {
+                /* Reset default page size */
+                if (PM_DEFAULT_MASK >> 16) {
+                        uasm_i_lui(p, tmp, PM_DEFAULT_MASK >> 16);
+                        uasm_i_ori(p, tmp, tmp, PM_DEFAULT_MASK & 0xffff);
+                        uasm_i_mtc0(p, tmp, C0_PAGEMASK);
+                        uasm_il_b(p, r, lid);
+                } else if (PM_DEFAULT_MASK) {
+                        uasm_i_ori(p, tmp, 0, PM_DEFAULT_MASK);
+                        uasm_i_mtc0(p, tmp, C0_PAGEMASK);
+                        uasm_il_b(p, r, lid);
+                } else {
+                        uasm_i_mtc0(p, 0, C0_PAGEMASK);
+                        uasm_il_b(p, r, lid);
+                }
+                if (scratch_reg > 0)
+                        UASM_i_MFC0(p, 1, 31, scratch_reg);
+                else
+                        UASM_i_LW(p, 1, scratchpad_offset(0), 0);
         } else {
-                uasm_il_b(p, r, lid);
-                uasm_i_mtc0(p, 0, C0_PAGEMASK);
+                /* Reset default page size */
+                if (PM_DEFAULT_MASK >> 16) {
+                        uasm_i_lui(p, tmp, PM_DEFAULT_MASK >> 16);
+                        uasm_i_ori(p, tmp, tmp, PM_DEFAULT_MASK & 0xffff);
+                        uasm_il_b(p, r, lid);
+                        uasm_i_mtc0(p, tmp, C0_PAGEMASK);
+                } else if (PM_DEFAULT_MASK) {
+                        uasm_i_ori(p, tmp, 0, PM_DEFAULT_MASK);
+                        uasm_il_b(p, r, lid);
+                        uasm_i_mtc0(p, tmp, C0_PAGEMASK);
+                } else {
+                        uasm_il_b(p, r, lid);
+                        uasm_i_mtc0(p, 0, C0_PAGEMASK);
+                }
         }
 }
 
@@ -462,7 +562,8 @@ static __cpuinit void build_huge_tlb_write_entry(u32 **p,
                                                  struct uasm_label **l,
                                                  struct uasm_reloc **r,
                                                  unsigned int tmp,
-                                                 enum tlb_write_entry wmode)
+                                                 enum tlb_write_entry wmode,
+                                                 int restore_scratch)
 {
         /* Set huge page tlb entry size */
         uasm_i_lui(p, tmp, PM_HUGE_MASK >> 16);
@@ -471,7 +572,7 @@ static __cpuinit void build_huge_tlb_write_entry(u32 **p,
 
         build_tlb_write_entry(p, l, r, wmode);
 
-        build_restore_pagemask(p, r, tmp, label_leave);
+        build_restore_pagemask(p, r, tmp, label_leave, restore_scratch);
 }
 
 /*
@@ -482,8 +583,12 @@ build_is_huge_pte(u32 **p, struct uasm_reloc **r, unsigned int tmp,
                 unsigned int pmd, int lid)
 {
         UASM_i_LW(p, tmp, 0, pmd);
-        uasm_i_andi(p, tmp, tmp, _PAGE_HUGE);
-        uasm_il_bnez(p, r, tmp, lid);
+        if (use_bbit_insns()) {
+                uasm_il_bbit1(p, r, tmp, ilog2(_PAGE_HUGE), lid);
+        } else {
+                uasm_i_andi(p, tmp, tmp, _PAGE_HUGE);
+                uasm_il_bnez(p, r, tmp, lid);
+        }
 }
 
 static __cpuinit void build_huge_update_entries(u32 **p,
@@ -532,7 +637,7 @@ static __cpuinit void build_huge_handler_tail(u32 **p,
         UASM_i_SW(p, pte, 0, ptr);
 #endif
         build_huge_update_entries(p, pte, ptr);
-        build_huge_tlb_write_entry(p, l, r, pte, tlb_indexed);
+        build_huge_tlb_write_entry(p, l, r, pte, tlb_indexed, 0);
 }
 #endif /* CONFIG_HUGETLB_PAGE */
 
@@ -573,13 +678,22 @@ build_get_pmde64(u32 **p, struct uasm_label **l, struct uasm_reloc **r,
         /* No uasm_i_nop needed here, since the next insn doesn't touch TMP. */
 
 #ifdef CONFIG_MIPS_PGD_C0_CONTEXT
-        /*
-         * &pgd << 11 stored in CONTEXT [23..63].
-         */
-        UASM_i_MFC0(p, ptr, C0_CONTEXT);
-        uasm_i_dins(p, ptr, 0, 0, 23); /* Clear lower 23 bits of context. */
-        uasm_i_ori(p, ptr, ptr, 0x540); /* 1 0  1 0 1  << 6  xkphys cached */
-        uasm_i_drotr(p, ptr, ptr, 11);
+        if (pgd_reg != -1) {
+                /* pgd is in pgd_reg */
+                UASM_i_MFC0(p, ptr, 31, pgd_reg);
+        } else {
+                /*
+                 * &pgd << 11 stored in CONTEXT [23..63].
+                 */
+                UASM_i_MFC0(p, ptr, C0_CONTEXT);
+
+                /* Clear lower 23 bits of context. */
+                uasm_i_dins(p, ptr, 0, 0, 23);
+
+                /* 1 0  1 0 1  << 6  xkphys cached */
+                uasm_i_ori(p, ptr, ptr, 0x540);
+                uasm_i_drotr(p, ptr, ptr, 11);
+        }
 #elif defined(CONFIG_SMP)
 # ifdef  CONFIG_MIPS_MT_SMTC
         /*
@@ -620,7 +734,6 @@ build_get_pmde64(u32 **p, struct uasm_label **l, struct uasm_reloc **r,
 #endif
 }
 
-enum vmalloc64_mode {not_refill, refill};
 /*
  * BVADDR is the faulting address, PTR is scratch.
  * PTR will hold the pgd for vmalloc.
@@ -638,7 +751,7 @@ build_get_pgd_vmalloc64(u32 **p, struct uasm_label **l, struct uasm_reloc **r,
 
         uasm_l_vmalloc(l, *p);
 
-        if (mode == refill && check_for_high_segbits) {
+        if (mode != not_refill && check_for_high_segbits) {
                 if (single_insn_swpd) {
                         uasm_il_bltz(p, r, bvaddr, label_vmalloc_done);
                         uasm_i_lui(p, ptr, uasm_rel_hi(swpd));
@@ -661,7 +774,7 @@ build_get_pgd_vmalloc64(u32 **p, struct uasm_label **l, struct uasm_reloc **r,
                                 uasm_i_daddiu(p, ptr, ptr, uasm_rel_lo(swpd));
                 }
         }
-        if (mode == refill && check_for_high_segbits) {
+        if (mode != not_refill && check_for_high_segbits) {
                 uasm_l_large_segbits_fault(l, *p);
                 /*
                  * We get here if we are an xsseg address, or if we are
@@ -677,7 +790,15 @@ build_get_pgd_vmalloc64(u32 **p, struct uasm_label **l, struct uasm_reloc **r,
                  */
                 UASM_i_LA(p, ptr, (unsigned long)tlb_do_page_fault_0);
                 uasm_i_jr(p, ptr);
-                uasm_i_nop(p);
+
+                if (mode == refill_scratch) {
+                        if (scratch_reg > 0)
+                                UASM_i_MFC0(p, 1, 31, scratch_reg);
+                        else
+                                UASM_i_LW(p, 1, scratchpad_offset(0), 0);
+                } else {
+                        uasm_i_nop(p);
+                }
         }
 }
 
@@ -834,6 +955,185 @@ static void __cpuinit build_update_entries(u32 **p, unsigned int tmp,
 #endif
 }
 
+struct mips_huge_tlb_info {
+        int huge_pte;
+        int restore_scratch;
+};
+
+static struct mips_huge_tlb_info __cpuinit
+build_fast_tlb_refill_handler (u32 **p, struct uasm_label **l,
+                               struct uasm_reloc **r, unsigned int tmp,
+                               unsigned int ptr, int c0_scratch)
+{
+        struct mips_huge_tlb_info rv;
+        unsigned int even, odd;
+        int vmalloc_branch_delay_filled = 0;
+        const int scratch = 1; /* Our extra working register */
+
+        rv.huge_pte = scratch;
+        rv.restore_scratch = 0;
+
+        if (check_for_high_segbits) {
+                UASM_i_MFC0(p, tmp, C0_BADVADDR);
+
+                if (pgd_reg != -1)
+                        UASM_i_MFC0(p, ptr, 31, pgd_reg);
+                else
+                        UASM_i_MFC0(p, ptr, C0_CONTEXT);
+
+                if (c0_scratch >= 0)
+                        UASM_i_MTC0(p, scratch, 31, c0_scratch);
+                else
+                        UASM_i_SW(p, scratch, scratchpad_offset(0), 0);
+
+                uasm_i_dsrl_safe(p, scratch, tmp,
+                                 PGDIR_SHIFT + PGD_ORDER + PAGE_SHIFT - 3);
+                uasm_il_bnez(p, r, scratch, label_vmalloc);
+
+                if (pgd_reg == -1) {
+                        vmalloc_branch_delay_filled = 1;
+                        /* Clear lower 23 bits of context. */
+                        uasm_i_dins(p, ptr, 0, 0, 23);
+                }
+        } else {
+                if (pgd_reg != -1)
+                        UASM_i_MFC0(p, ptr, 31, pgd_reg);
+                else
+                        UASM_i_MFC0(p, ptr, C0_CONTEXT);
+
+                UASM_i_MFC0(p, tmp, C0_BADVADDR);
+
+                if (c0_scratch >= 0)
+                        UASM_i_MTC0(p, scratch, 31, c0_scratch);
+                else
+                        UASM_i_SW(p, scratch, scratchpad_offset(0), 0);
+
+                if (pgd_reg == -1)
+                        /* Clear lower 23 bits of context. */
+                        uasm_i_dins(p, ptr, 0, 0, 23);
+
+                uasm_il_bltz(p, r, tmp, label_vmalloc);
+        }
+
+        if (pgd_reg == -1) {
+                vmalloc_branch_delay_filled = 1;
+                /* 1 0  1 0 1  << 6  xkphys cached */
+                uasm_i_ori(p, ptr, ptr, 0x540);
+                uasm_i_drotr(p, ptr, ptr, 11);
+        }
+
+#ifdef __PAGETABLE_PMD_FOLDED
+#define LOC_PTEP scratch
+#else
+#define LOC_PTEP ptr
+#endif
+
+        if (!vmalloc_branch_delay_filled)
+                /* get pgd offset in bytes */
+                uasm_i_dsrl_safe(p, scratch, tmp, PGDIR_SHIFT - 3);
+
+        uasm_l_vmalloc_done(l, *p);
+
+        /*
+         *                         tmp          ptr
+         * fall-through case =   badvaddr  *pgd_current
+         * vmalloc case      =   badvaddr  swapper_pg_dir
+         */
+
+        if (vmalloc_branch_delay_filled)
+                /* get pgd offset in bytes */
+                uasm_i_dsrl_safe(p, scratch, tmp, PGDIR_SHIFT - 3);
+
+#ifdef __PAGETABLE_PMD_FOLDED
+        GET_CONTEXT(p, tmp); /* get context reg */
+#endif
+        uasm_i_andi(p, scratch, scratch, (PTRS_PER_PGD - 1) << 3);
+
+        if (use_lwx_insns()) {
+                UASM_i_LWX(p, LOC_PTEP, scratch, ptr);
+        } else {
+                uasm_i_daddu(p, ptr, ptr, scratch); /* add in pgd offset */
+                uasm_i_ld(p, LOC_PTEP, 0, ptr); /* get pmd pointer */
+        }
+
+#ifndef __PAGETABLE_PMD_FOLDED
+        /* get pmd offset in bytes */
+        uasm_i_dsrl_safe(p, scratch, tmp, PMD_SHIFT - 3);
+        uasm_i_andi(p, scratch, scratch, (PTRS_PER_PMD - 1) << 3);
+        GET_CONTEXT(p, tmp); /* get context reg */
+
+        if (use_lwx_insns()) {
+                UASM_i_LWX(p, scratch, scratch, ptr);
+        } else {
+                uasm_i_daddu(p, ptr, ptr, scratch); /* add in pmd offset */
+                UASM_i_LW(p, scratch, 0, ptr);
+        }
+#endif
+        /* Adjust the context during the load latency. */
+        build_adjust_context(p, tmp);
+
+#ifdef CONFIG_HUGETLB_PAGE
+        uasm_il_bbit1(p, r, scratch, ilog2(_PAGE_HUGE), label_tlb_huge_update);
+        /*
+         * The in the LWX case we don't want to do the load in the
+         * delay slot.  It cannot issue in the same cycle and may be
+         * speculative and unneeded.
+         */
+        if (use_lwx_insns())
+                uasm_i_nop(p);
+#endif /* CONFIG_HUGETLB_PAGE */
+
+
+        /* build_update_entries */
+        if (use_lwx_insns()) {
+                even = ptr;
+                odd = tmp;
+                UASM_i_LWX(p, even, scratch, tmp);
+                UASM_i_ADDIU(p, tmp, tmp, sizeof(pte_t));
+                UASM_i_LWX(p, odd, scratch, tmp);
+        } else {
+                UASM_i_ADDU(p, ptr, scratch, tmp); /* add in offset */
+                even = tmp;
+                odd = ptr;
+                UASM_i_LW(p, even, 0, ptr); /* get even pte */
+                UASM_i_LW(p, odd, sizeof(pte_t), ptr); /* get odd pte */
+        }
+        if (kernel_uses_smartmips_rixi) {
+                uasm_i_dsrl_safe(p, even, even, ilog2(_PAGE_NO_EXEC));
+                uasm_i_dsrl_safe(p, odd, odd, ilog2(_PAGE_NO_EXEC));
+                uasm_i_drotr(p, even, even,
+                             ilog2(_PAGE_GLOBAL) - ilog2(_PAGE_NO_EXEC));
+                UASM_i_MTC0(p, even, C0_ENTRYLO0); /* load it */
+                uasm_i_drotr(p, odd, odd,
+                             ilog2(_PAGE_GLOBAL) - ilog2(_PAGE_NO_EXEC));
+        } else {
+                uasm_i_dsrl_safe(p, even, even, ilog2(_PAGE_GLOBAL));
+                UASM_i_MTC0(p, even, C0_ENTRYLO0); /* load it */
+                uasm_i_dsrl_safe(p, odd, odd, ilog2(_PAGE_GLOBAL));
+        }
+        UASM_i_MTC0(p, odd, C0_ENTRYLO1); /* load it */
+
+        if (c0_scratch >= 0) {
+                UASM_i_MFC0(p, scratch, 31, c0_scratch);
+                build_tlb_write_entry(p, l, r, tlb_random);
+                uasm_l_leave(l, *p);
+                rv.restore_scratch = 1;
+        } else if (PAGE_SHIFT == 14 || PAGE_SHIFT == 13)  {
+                build_tlb_write_entry(p, l, r, tlb_random);
+                uasm_l_leave(l, *p);
+                UASM_i_LW(p, scratch, scratchpad_offset(0), 0);
+        } else {
+                UASM_i_LW(p, scratch, scratchpad_offset(0), 0);
+                build_tlb_write_entry(p, l, r, tlb_random);
+                uasm_l_leave(l, *p);
+                rv.restore_scratch = 1;
+        }
+
+        uasm_i_eret(p); /* return from trap */
+
+        return rv;
+}
+
 /*
  * For a 64-bit kernel, we are using the 64-bit XTLB refill exception
  * because EXL == 0.  If we wrap, we can also use the 32 instruction
@@ -849,54 +1149,67 @@ static void __cpuinit build_r4000_tlb_refill_handler(void)
         struct uasm_reloc *r = relocs;
         u32 *f;
         unsigned int final_len;
+        struct mips_huge_tlb_info htlb_info;
+        enum vmalloc64_mode vmalloc_mode;
 
         memset(tlb_handler, 0, sizeof(tlb_handler));
         memset(labels, 0, sizeof(labels));
         memset(relocs, 0, sizeof(relocs));
         memset(final_handler, 0, sizeof(final_handler));
 
-        /*
-         * create the plain linear handler
-         */
-        if (bcm1250_m3_war()) {
-                unsigned int segbits = 44;
+        if (scratch_reg == 0)
+                scratch_reg = allocate_kscratch();
 
-                uasm_i_dmfc0(&p, K0, C0_BADVADDR);
-                uasm_i_dmfc0(&p, K1, C0_ENTRYHI);
-                uasm_i_xor(&p, K0, K0, K1);
-                uasm_i_dsrl_safe(&p, K1, K0, 62);
-                uasm_i_dsrl_safe(&p, K0, K0, 12 + 1);
-                uasm_i_dsll_safe(&p, K0, K0, 64 + 12 + 1 - segbits);
-                uasm_i_or(&p, K0, K0, K1);
-                uasm_il_bnez(&p, &r, K0, label_leave);
-                /* No need for uasm_i_nop */
-        }
+        if ((scratch_reg > 0 || scratchpad_available()) && use_bbit_insns()) {
+                htlb_info = build_fast_tlb_refill_handler(&p, &l, &r, K0, K1,
+                                                          scratch_reg);
+                vmalloc_mode = refill_scratch;
+        } else {
+                htlb_info.huge_pte = K0;
+                htlb_info.restore_scratch = 0;
+                vmalloc_mode = refill_noscratch;
+                /*
+                 * create the plain linear handler
+                 */
+                if (bcm1250_m3_war()) {
+                        unsigned int segbits = 44;
+
+                        uasm_i_dmfc0(&p, K0, C0_BADVADDR);
+                        uasm_i_dmfc0(&p, K1, C0_ENTRYHI);
+                        uasm_i_xor(&p, K0, K0, K1);
+                        uasm_i_dsrl_safe(&p, K1, K0, 62);
+                        uasm_i_dsrl_safe(&p, K0, K0, 12 + 1);
+                        uasm_i_dsll_safe(&p, K0, K0, 64 + 12 + 1 - segbits);
+                        uasm_i_or(&p, K0, K0, K1);
+                        uasm_il_bnez(&p, &r, K0, label_leave);
+                        /* No need for uasm_i_nop */
+                }
 
 #ifdef CONFIG_64BIT
-        build_get_pmde64(&p, &l, &r, K0, K1); /* get pmd in K1 */
+                build_get_pmde64(&p, &l, &r, K0, K1); /* get pmd in K1 */
 #else
-        build_get_pgde32(&p, K0, K1); /* get pgd in K1 */
+                build_get_pgde32(&p, K0, K1); /* get pgd in K1 */
 #endif
 
 #ifdef CONFIG_HUGETLB_PAGE
-        build_is_huge_pte(&p, &r, K0, K1, label_tlb_huge_update);
+                build_is_huge_pte(&p, &r, K0, K1, label_tlb_huge_update);
 #endif
 
-        build_get_ptep(&p, K0, K1);
-        build_update_entries(&p, K0, K1);
-        build_tlb_write_entry(&p, &l, &r, tlb_random);
-        uasm_l_leave(&l, p);
-        uasm_i_eret(&p); /* return from trap */
-
+                build_get_ptep(&p, K0, K1);
+                build_update_entries(&p, K0, K1);
+                build_tlb_write_entry(&p, &l, &r, tlb_random);
+                uasm_l_leave(&l, p);
+                uasm_i_eret(&p); /* return from trap */
+        }
 #ifdef CONFIG_HUGETLB_PAGE
         uasm_l_tlb_huge_update(&l, p);
-        UASM_i_LW(&p, K0, 0, K1);
-        build_huge_update_entries(&p, K0, K1);
-        build_huge_tlb_write_entry(&p, &l, &r, K0, tlb_random);
+        build_huge_update_entries(&p, htlb_info.huge_pte, K1);
+        build_huge_tlb_write_entry(&p, &l, &r, K0, tlb_random,
+                                   htlb_info.restore_scratch);
 #endif
 
 #ifdef CONFIG_64BIT
-        build_get_pgd_vmalloc64(&p, &l, &r, K0, K1, refill);
+        build_get_pgd_vmalloc64(&p, &l, &r, K0, K1, vmalloc_mode);
 #endif
 
         /*
@@ -1014,6 +1327,55 @@ static void __cpuinit build_r4000_tlb_refill_handler(void)
 u32 handle_tlbl[FASTPATH_SIZE] __cacheline_aligned;
 u32 handle_tlbs[FASTPATH_SIZE] __cacheline_aligned;
 u32 handle_tlbm[FASTPATH_SIZE] __cacheline_aligned;
+#ifdef CONFIG_MIPS_PGD_C0_CONTEXT
+u32 tlbmiss_handler_setup_pgd[16] __cacheline_aligned;
+
+static void __cpuinit build_r4000_setup_pgd(void)
+{
+        const int a0 = 4;
+        const int a1 = 5;
+        u32 *p = tlbmiss_handler_setup_pgd;
+        struct uasm_label *l = labels;
+        struct uasm_reloc *r = relocs;
+
+        memset(tlbmiss_handler_setup_pgd, 0, sizeof(tlbmiss_handler_setup_pgd));
+        memset(labels, 0, sizeof(labels));
+        memset(relocs, 0, sizeof(relocs));
+
+        pgd_reg = allocate_kscratch();
+
+        if (pgd_reg == -1) {
+                /* PGD << 11 in c0_Context */
+                /*
+                 * If it is a ckseg0 address, convert to a physical
+                 * address.  Shifting right by 29 and adding 4 will
+                 * result in zero for these addresses.
+                 *
+                 */
+                UASM_i_SRA(&p, a1, a0, 29);
+                UASM_i_ADDIU(&p, a1, a1, 4);
+                uasm_il_bnez(&p, &r, a1, label_tlbl_goaround1);
+                uasm_i_nop(&p);
+                uasm_i_dinsm(&p, a0, 0, 29, 64 - 29);
+                uasm_l_tlbl_goaround1(&l, p);
+                UASM_i_SLL(&p, a0, a0, 11);
+                uasm_i_jr(&p, 31);
+                UASM_i_MTC0(&p, a0, C0_CONTEXT);
+        } else {
+                /* PGD in c0_KScratch */
+                uasm_i_jr(&p, 31);
+                UASM_i_MTC0(&p, a0, 31, pgd_reg);
+        }
+        if (p - tlbmiss_handler_setup_pgd > ARRAY_SIZE(tlbmiss_handler_setup_pgd))
+                panic("tlbmiss_handler_setup_pgd space exceeded");
+        uasm_resolve_relocs(relocs, labels);
+        pr_debug("Wrote tlbmiss_handler_setup_pgd (%u instructions).\n",
+                 (unsigned int)(p - tlbmiss_handler_setup_pgd));
+
+        dump_handler(tlbmiss_handler_setup_pgd,
+                     ARRAY_SIZE(tlbmiss_handler_setup_pgd));
+}
+#endif
 
 static void __cpuinit
 iPTE_LW(u32 **p, unsigned int pte, unsigned int ptr)
@@ -1100,14 +1462,20 @@ build_pte_present(u32 **p, struct uasm_reloc **r,
                   unsigned int pte, unsigned int ptr, enum label_id lid)
 {
         if (kernel_uses_smartmips_rixi) {
-                uasm_i_andi(p, pte, pte, _PAGE_PRESENT);
-                uasm_il_beqz(p, r, pte, lid);
+                if (use_bbit_insns()) {
+                        uasm_il_bbit0(p, r, pte, ilog2(_PAGE_PRESENT), lid);
+                        uasm_i_nop(p);
+                } else {
+                        uasm_i_andi(p, pte, pte, _PAGE_PRESENT);
+                        uasm_il_beqz(p, r, pte, lid);
+                        iPTE_LW(p, pte, ptr);
+                }
         } else {
                 uasm_i_andi(p, pte, pte, _PAGE_PRESENT | _PAGE_READ);
                 uasm_i_xori(p, pte, pte, _PAGE_PRESENT | _PAGE_READ);
                 uasm_il_bnez(p, r, pte, lid);
+                iPTE_LW(p, pte, ptr);
         }
-        iPTE_LW(p, pte, ptr);
 }
 
 /* Make PTE valid, store result in PTR. */
@@ -1128,10 +1496,17 @@ static void __cpuinit
 build_pte_writable(u32 **p, struct uasm_reloc **r,
                    unsigned int pte, unsigned int ptr, enum label_id lid)
 {
-        uasm_i_andi(p, pte, pte, _PAGE_PRESENT | _PAGE_WRITE);
-        uasm_i_xori(p, pte, pte, _PAGE_PRESENT | _PAGE_WRITE);
-        uasm_il_bnez(p, r, pte, lid);
-        iPTE_LW(p, pte, ptr);
+        if (use_bbit_insns()) {
+                uasm_il_bbit0(p, r, pte, ilog2(_PAGE_PRESENT), lid);
+                uasm_i_nop(p);
+                uasm_il_bbit0(p, r, pte, ilog2(_PAGE_WRITE), lid);
+                uasm_i_nop(p);
+        } else {
+                uasm_i_andi(p, pte, pte, _PAGE_PRESENT | _PAGE_WRITE);
+                uasm_i_xori(p, pte, pte, _PAGE_PRESENT | _PAGE_WRITE);
+                uasm_il_bnez(p, r, pte, lid);
+                iPTE_LW(p, pte, ptr);
+        }
 }
 
 /* Make PTE writable, update software status bits as well, then store
@@ -1155,12 +1530,19 @@ static void __cpuinit
 build_pte_modifiable(u32 **p, struct uasm_reloc **r,
                      unsigned int pte, unsigned int ptr, enum label_id lid)
 {
-        uasm_i_andi(p, pte, pte, _PAGE_WRITE);
-        uasm_il_beqz(p, r, pte, lid);
-        iPTE_LW(p, pte, ptr);
+        if (use_bbit_insns()) {
+                uasm_il_bbit0(p, r, pte, ilog2(_PAGE_WRITE), lid);
+                uasm_i_nop(p);
+        } else {
+                uasm_i_andi(p, pte, pte, _PAGE_WRITE);
+                uasm_il_beqz(p, r, pte, lid);
+                iPTE_LW(p, pte, ptr);
+        }
 }
 
 #ifndef CONFIG_MIPS_PGD_C0_CONTEXT
+
+
 /*
  * R3000 style TLB load/store/modify handlers.
  */
@@ -1402,14 +1784,23 @@ static void __cpuinit build_r4000_tlb_load_handler(void)
                  * If the page is not _PAGE_VALID, RI or XI could not
                  * have triggered it.  Skip the expensive test..
                  */
-                uasm_i_andi(&p, K0, K0, _PAGE_VALID);
-                uasm_il_beqz(&p, &r, K0, label_tlbl_goaround1);
+                if (use_bbit_insns()) {
+                        uasm_il_bbit0(&p, &r, K0, ilog2(_PAGE_VALID),
+                                      label_tlbl_goaround1);
+                } else {
+                        uasm_i_andi(&p, K0, K0, _PAGE_VALID);
+                        uasm_il_beqz(&p, &r, K0, label_tlbl_goaround1);
+                }
                 uasm_i_nop(&p);
 
                 uasm_i_tlbr(&p);
                 /* Examine  entrylo 0 or 1 based on ptr. */
-                uasm_i_andi(&p, K0, K1, sizeof(pte_t));
-                uasm_i_beqz(&p, K0, 8);
+                if (use_bbit_insns()) {
+                        uasm_i_bbit0(&p, K1, ilog2(sizeof(pte_t)), 8);
+                } else {
+                        uasm_i_andi(&p, K0, K1, sizeof(pte_t));
+                        uasm_i_beqz(&p, K0, 8);
+                }
 
                 UASM_i_MFC0(&p, K0, C0_ENTRYLO0); /* load it in the delay slot*/
                 UASM_i_MFC0(&p, K0, C0_ENTRYLO1); /* load it if ptr is odd */
@@ -1417,12 +1808,18 @@ static void __cpuinit build_r4000_tlb_load_handler(void)
                  * If the entryLo (now in K0) is valid (bit 1), RI or
                  * XI must have triggered it.
                  */
-                uasm_i_andi(&p, K0, K0, 2);
-                uasm_il_bnez(&p, &r, K0, label_nopage_tlbl);
-
-                uasm_l_tlbl_goaround1(&l, p);
-                /* Reload the PTE value */
-                iPTE_LW(&p, K0, K1);
+                if (use_bbit_insns()) {
+                        uasm_il_bbit1(&p, &r, K0, 1, label_nopage_tlbl);
+                        /* Reload the PTE value */
+                        iPTE_LW(&p, K0, K1);
+                        uasm_l_tlbl_goaround1(&l, p);
+                } else {
+                        uasm_i_andi(&p, K0, K0, 2);
+                        uasm_il_bnez(&p, &r, K0, label_nopage_tlbl);
+                        uasm_l_tlbl_goaround1(&l, p);
+                        /* Reload the PTE value */
+                        iPTE_LW(&p, K0, K1);
+                }
         }
         build_make_valid(&p, &r, K0, K1);
         build_r4000_tlbchange_handler_tail(&p, &l, &r, K0, K1);
@@ -1442,23 +1839,35 @@ static void __cpuinit build_r4000_tlb_load_handler(void)
                  * If the page is not _PAGE_VALID, RI or XI could not
                  * have triggered it.  Skip the expensive test..
                  */
-                uasm_i_andi(&p, K0, K0, _PAGE_VALID);
-                uasm_il_beqz(&p, &r, K0, label_tlbl_goaround2);
+                if (use_bbit_insns()) {
+                        uasm_il_bbit0(&p, &r, K0, ilog2(_PAGE_VALID),
+                                      label_tlbl_goaround2);
+                } else {
+                        uasm_i_andi(&p, K0, K0, _PAGE_VALID);
+                        uasm_il_beqz(&p, &r, K0, label_tlbl_goaround2);
+                }
                 uasm_i_nop(&p);
 
                 uasm_i_tlbr(&p);
                 /* Examine  entrylo 0 or 1 based on ptr. */
-                uasm_i_andi(&p, K0, K1, sizeof(pte_t));
-                uasm_i_beqz(&p, K0, 8);
-
+                if (use_bbit_insns()) {
+                        uasm_i_bbit0(&p, K1, ilog2(sizeof(pte_t)), 8);
+                } else {
+                        uasm_i_andi(&p, K0, K1, sizeof(pte_t));
+                        uasm_i_beqz(&p, K0, 8);
+                }
                 UASM_i_MFC0(&p, K0, C0_ENTRYLO0); /* load it in the delay slot*/
                 UASM_i_MFC0(&p, K0, C0_ENTRYLO1); /* load it if ptr is odd */
                 /*
                  * If the entryLo (now in K0) is valid (bit 1), RI or
                  * XI must have triggered it.
                  */
-                uasm_i_andi(&p, K0, K0, 2);
-                uasm_il_beqz(&p, &r, K0, label_tlbl_goaround2);
+                if (use_bbit_insns()) {
+                        uasm_il_bbit0(&p, &r, K0, 1, label_tlbl_goaround2);
+                } else {
+                        uasm_i_andi(&p, K0, K0, 2);
+                        uasm_il_beqz(&p, &r, K0, label_tlbl_goaround2);
+                }
                 /* Reload the PTE value */
                 iPTE_LW(&p, K0, K1);
 
@@ -1466,7 +1875,7 @@ static void __cpuinit build_r4000_tlb_load_handler(void)
                  * We clobbered C0_PAGEMASK, restore it.  On the other branch
                  * it is restored in build_huge_tlb_write_entry.
                  */
-                build_restore_pagemask(&p, &r, K0, label_nopage_tlbl);
+                build_restore_pagemask(&p, &r, K0, label_nopage_tlbl, 0);
 
                 uasm_l_tlbl_goaround2(&l, p);
         }
@@ -1623,13 +2032,16 @@ void __cpuinit build_tlb_refill_handler(void)
                 break;
 
         default:
-                build_r4000_tlb_refill_handler();
                 if (!run_once) {
+#ifdef CONFIG_MIPS_PGD_C0_CONTEXT
+                        build_r4000_setup_pgd();
+#endif
                         build_r4000_tlb_load_handler();
                         build_r4000_tlb_store_handler();
                         build_r4000_tlb_modify_handler();
                         run_once++;
                 }
+                build_r4000_tlb_refill_handler();
         }
 }
 
@@ -1641,4 +2053,8 @@ void __cpuinit flush_tlb_handlers(void)
                            (unsigned long)handle_tlbs + sizeof(handle_tlbs));
         local_flush_icache_range((unsigned long)handle_tlbm,
                            (unsigned long)handle_tlbm + sizeof(handle_tlbm));
+#ifdef CONFIG_MIPS_PGD_C0_CONTEXT
+        local_flush_icache_range((unsigned long)tlbmiss_handler_setup_pgd,
+                           (unsigned long)tlbmiss_handler_setup_pgd + sizeof(handle_tlbm));
+#endif
 }
diff --git a/arch/mips/mm/uasm.c b/arch/mips/mm/uasm.c
index 23afdebc8e5c..5fa185151fc8 100644
--- a/arch/mips/mm/uasm.c
+++ b/arch/mips/mm/uasm.c
@@ -68,7 +68,8 @@ enum opcode {
         insn_pref, insn_rfe, insn_sc, insn_scd, insn_sd, insn_sll,
         insn_sra, insn_srl, insn_rotr, insn_subu, insn_sw, insn_tlbp,
         insn_tlbr, insn_tlbwi, insn_tlbwr, insn_xor, insn_xori,
-        insn_dins, insn_syscall, insn_bbit0, insn_bbit1
+        insn_dins, insn_dinsm, insn_syscall, insn_bbit0, insn_bbit1,
+        insn_lwx, insn_ldx
 };
 
 struct insn {
@@ -142,9 +143,12 @@ static struct insn insn_table[] __uasminitdata = {
         { insn_xor,  M(spec_op, 0, 0, 0, 0, xor_op),  RS | RT | RD },
         { insn_xori,  M(xori_op, 0, 0, 0, 0, 0),  RS | RT | UIMM },
         { insn_dins, M(spec3_op, 0, 0, 0, 0, dins_op), RS | RT | RD | RE },
+        { insn_dinsm, M(spec3_op, 0, 0, 0, 0, dinsm_op), RS | RT | RD | RE },
         { insn_syscall, M(spec_op, 0, 0, 0, 0, syscall_op), SCIMM},
         { insn_bbit0, M(lwc2_op, 0, 0, 0, 0, 0), RS | RT | BIMM },
         { insn_bbit1, M(swc2_op, 0, 0, 0, 0, 0), RS | RT | BIMM },
+        { insn_lwx, M(spec3_op, 0, 0, 0, lwx_op, lx_op), RS | RT | RD },
+        { insn_ldx, M(spec3_op, 0, 0, 0, ldx_op, lx_op), RS | RT | RD },
         { insn_invalid, 0, 0 }
 };
 
@@ -152,91 +156,83 @@ static struct insn insn_table[] __uasminitdata = {
 
 static inline __uasminit u32 build_rs(u32 arg)
 {
-        if (arg & ~RS_MASK)
-                printk(KERN_WARNING "Micro-assembler field overflow\n");
+        WARN(arg & ~RS_MASK, KERN_WARNING "Micro-assembler field overflow\n");
 
         return (arg & RS_MASK) << RS_SH;
 }
 
 static inline __uasminit u32 build_rt(u32 arg)
 {
-        if (arg & ~RT_MASK)
-                printk(KERN_WARNING "Micro-assembler field overflow\n");
+        WARN(arg & ~RT_MASK, KERN_WARNING "Micro-assembler field overflow\n");
 
         return (arg & RT_MASK) << RT_SH;
 }
 
 static inline __uasminit u32 build_rd(u32 arg)
 {
-        if (arg & ~RD_MASK)
-                printk(KERN_WARNING "Micro-assembler field overflow\n");
+        WARN(arg & ~RD_MASK, KERN_WARNING "Micro-assembler field overflow\n");
 
         return (arg & RD_MASK) << RD_SH;
 }
 
 static inline __uasminit u32 build_re(u32 arg)
 {
-        if (arg & ~RE_MASK)
-                printk(KERN_WARNING "Micro-assembler field overflow\n");
+        WARN(arg & ~RE_MASK, KERN_WARNING "Micro-assembler field overflow\n");
 
         return (arg & RE_MASK) << RE_SH;
 }
 
 static inline __uasminit u32 build_simm(s32 arg)
 {
-        if (arg > 0x7fff || arg < -0x8000)
-                printk(KERN_WARNING "Micro-assembler field overflow\n");
+        WARN(arg > 0x7fff || arg < -0x8000,
+             KERN_WARNING "Micro-assembler field overflow\n");
 
         return arg & 0xffff;
 }
 
 static inline __uasminit u32 build_uimm(u32 arg)
 {
-        if (arg & ~IMM_MASK)
-                printk(KERN_WARNING "Micro-assembler field overflow\n");
+        WARN(arg & ~IMM_MASK, KERN_WARNING "Micro-assembler field overflow\n");
 
         return arg & IMM_MASK;
 }
 
 static inline __uasminit u32 build_bimm(s32 arg)
 {
-        if (arg > 0x1ffff || arg < -0x20000)
-                printk(KERN_WARNING "Micro-assembler field overflow\n");
+        WARN(arg > 0x1ffff || arg < -0x20000,
+             KERN_WARNING "Micro-assembler field overflow\n");
 
-        if (arg & 0x3)
-                printk(KERN_WARNING "Invalid micro-assembler branch target\n");
+        WARN(arg & 0x3, KERN_WARNING "Invalid micro-assembler branch target\n");
 
         return ((arg < 0) ? (1 << 15) : 0) | ((arg >> 2) & 0x7fff);
 }
 
 static inline __uasminit u32 build_jimm(u32 arg)
 {
-        if (arg & ~((JIMM_MASK) << 2))
-                printk(KERN_WARNING "Micro-assembler field overflow\n");
+        WARN(arg & ~(JIMM_MASK << 2),
+             KERN_WARNING "Micro-assembler field overflow\n");
 
         return (arg >> 2) & JIMM_MASK;
 }
 
 static inline __uasminit u32 build_scimm(u32 arg)
 {
-        if (arg & ~SCIMM_MASK)
-                printk(KERN_WARNING "Micro-assembler field overflow\n");
+        WARN(arg & ~SCIMM_MASK,
+             KERN_WARNING "Micro-assembler field overflow\n");
 
         return (arg & SCIMM_MASK) << SCIMM_SH;
 }
 
 static inline __uasminit u32 build_func(u32 arg)
 {
-        if (arg & ~FUNC_MASK)
-                printk(KERN_WARNING "Micro-assembler field overflow\n");
+        WARN(arg & ~FUNC_MASK, KERN_WARNING "Micro-assembler field overflow\n");
 
         return arg & FUNC_MASK;
 }
 
 static inline __uasminit u32 build_set(u32 arg)
 {
-        if (arg & ~SET_MASK)
-                printk(KERN_WARNING "Micro-assembler field overflow\n");
+        WARN(arg & ~SET_MASK, KERN_WARNING "Micro-assembler field overflow\n");
 
         return arg & SET_MASK;
 }
@@ -340,6 +336,13 @@ Ip_u2u1msbu3(op)					\
 }                                                       \
 UASM_EXPORT_SYMBOL(uasm_i##op);
 
+#define I_u2u1msb32u3(op)                               \
+Ip_u2u1msbu3(op)                                        \
+{                                                       \
+        build_insn(buf, insn##op, b, a, c+d-33, c);     \
+}                                                       \
+UASM_EXPORT_SYMBOL(uasm_i##op);
+
 #define I_u1u2(op)                                      \
 Ip_u1u2(op)                                             \
 {                                                       \
@@ -422,9 +425,12 @@ I_0(_tlbwr)
 I_u3u1u2(_xor)
 I_u2u1u3(_xori)
 I_u2u1msbu3(_dins);
+I_u2u1msb32u3(_dinsm);
 I_u1(_syscall);
 I_u1u2s3(_bbit0);
 I_u1u2s3(_bbit1);
+I_u3u1u2(_lwx)
+I_u3u1u2(_ldx)
 
 #ifdef CONFIG_CPU_CAVIUM_OCTEON
 #include <asm/octeon/octeon.h>
diff --git a/arch/mips/sibyte/common/sb_tbprof.c b/arch/mips/sibyte/common/sb_tbprof.c
index 87ccdb4b5ac9..48853ab5bcf0 100644
--- a/arch/mips/sibyte/common/sb_tbprof.c
+++ b/arch/mips/sibyte/common/sb_tbprof.c
@@ -410,14 +410,13 @@ static int sbprof_tb_open(struct inode *inode, struct file *filp)
                 return -EBUSY;
 
         memset(&sbp, 0, sizeof(struct sbprof_tb));
-        sbp.sbprof_tbbuf = vmalloc(MAX_TBSAMPLE_BYTES);
+        sbp.sbprof_tbbuf = vzalloc(MAX_TBSAMPLE_BYTES);
         if (!sbp.sbprof_tbbuf) {
                 sbp.open = SB_CLOSED;
                 wmb();
                 return -ENOMEM;
         }
 
-        memset(sbp.sbprof_tbbuf, 0, MAX_TBSAMPLE_BYTES);
         init_waitqueue_head(&sbp.tb_sync);
         init_waitqueue_head(&sbp.tb_read);
         mutex_init(&sbp.lock);
diff --git a/arch/mips/txx9/generic/pci.c b/arch/mips/txx9/generic/pci.c
index 96e69a00ffc8..85a87de17eb4 100644
--- a/arch/mips/txx9/generic/pci.c
+++ b/arch/mips/txx9/generic/pci.c
@@ -213,11 +213,8 @@ txx9_alloc_pci_controller(struct pci_controller *pcic,
 
         pcic->mem_offset = 0;   /* busaddr == physaddr */
 
-        printk(KERN_INFO "PCI: IO 0x%08llx-0x%08llx MEM 0x%08llx-0x%08llx\n",
-               (unsigned long long)pcic->mem_resource[1].start,
-               (unsigned long long)pcic->mem_resource[1].end,
-               (unsigned long long)pcic->mem_resource[0].start,
-               (unsigned long long)pcic->mem_resource[0].end);
+        printk(KERN_INFO "PCI: IO %pR MEM %pR\n",
+               &pcic->mem_resource[1], &pcic->mem_resource[0]);
 
         /* register_pci_controller() will request MEM resource */
         release_resource(&pcic->mem_resource[0]);
diff --git a/arch/parisc/kernel/firmware.c b/arch/parisc/kernel/firmware.c
index df971fa0c32f..4896ed090585 100644
--- a/arch/parisc/kernel/firmware.c
+++ b/arch/parisc/kernel/firmware.c
@@ -1126,15 +1126,13 @@ int pdc_iodc_print(const unsigned char *str, unsigned count)
         unsigned int i;
         unsigned long flags;
 
-        for (i = 0; i < count && i < 79;) {
+        for (i = 0; i < count;) {
                 switch(str[i]) {
                 case '\n':
                         iodc_dbuf[i+0] = '\r';
                         iodc_dbuf[i+1] = '\n';
                         i += 2;
                         goto print;
-                case '\b':      /* BS */
-                        i--; /* overwrite last */
                 default:
                         iodc_dbuf[i] = str[i];
                         i++;
@@ -1142,15 +1140,6 @@ int pdc_iodc_print(const unsigned char *str, unsigned count)
                 }
         }
 
-        /* if we're at the end of line, and not already inserting a newline,
-         * insert one anyway. iodc console doesn't claim to support >79 char
-         * lines. don't account for this in the return value.
-         */
-        if (i == 79 && iodc_dbuf[i-1] != '\n') {
-                iodc_dbuf[i+0] = '\r';
-                iodc_dbuf[i+1] = '\n';
-        }
-
 print:
         spin_lock_irqsave(&pdc_lock, flags);
         real32_call(PAGE0->mem_cons.iodc_io,
diff --git a/arch/powerpc/kernel/perf_event.c b/arch/powerpc/kernel/perf_event.c
index 567480705789..ab6f6beadb57 100644
--- a/arch/powerpc/kernel/perf_event.c
+++ b/arch/powerpc/kernel/perf_event.c
@@ -1212,6 +1212,7 @@ static void record_and_restart(struct perf_event *event, unsigned long val,
                         if (left <= 0)
                                 left = period;
                         record = 1;
+                        event->hw.last_period = event->hw.sample_period;
                 }
                 if (left < 0x80000000LL)
                         val = 0x80000000LL - left;
diff --git a/arch/x86/include/asm/numa_32.h b/arch/x86/include/asm/numa_32.h
index a37229011b56..b0ef2b449a9d 100644
--- a/arch/x86/include/asm/numa_32.h
+++ b/arch/x86/include/asm/numa_32.h
@@ -1,6 +1,8 @@
 #ifndef _ASM_X86_NUMA_32_H
 #define _ASM_X86_NUMA_32_H
 
+extern int numa_off;
+
 extern int pxm_to_nid(int pxm);
 extern void numa_remove_cpu(int cpu);
 
diff --git a/arch/x86/include/asm/numa_64.h b/arch/x86/include/asm/numa_64.h
index 5ae87285a502..0493be39607c 100644
--- a/arch/x86/include/asm/numa_64.h
+++ b/arch/x86/include/asm/numa_64.h
@@ -40,6 +40,7 @@ extern void __cpuinit numa_remove_cpu(int cpu);
 #ifdef CONFIG_NUMA_EMU
 #define FAKE_NODE_MIN_SIZE      ((u64)32 << 20)
 #define FAKE_NODE_MIN_HASH_MASK (~(FAKE_NODE_MIN_SIZE - 1UL))
+void numa_emu_cmdline(char *);
 #endif /* CONFIG_NUMA_EMU */
 #else
 static inline void init_cpu_to_node(void)               { }
diff --git a/arch/x86/kernel/irq_32.c b/arch/x86/kernel/irq_32.c
index 48ff6dcffa02..9974d21048fd 100644
--- a/arch/x86/kernel/irq_32.c
+++ b/arch/x86/kernel/irq_32.c
@@ -129,8 +129,7 @@ void __cpuinit irq_ctx_init(int cpu)
         irqctx = page_address(alloc_pages_node(cpu_to_node(cpu),
                                                THREAD_FLAGS,
                                                THREAD_ORDER));
-        irqctx->tinfo.task              = NULL;
-        irqctx->tinfo.exec_domain       = NULL;
+        memset(&irqctx->tinfo, 0, sizeof(struct thread_info));
         irqctx->tinfo.cpu               = cpu;
         irqctx->tinfo.preempt_count     = HARDIRQ_OFFSET;
         irqctx->tinfo.addr_limit        = MAKE_MM_SEG(0);
@@ -140,10 +139,8 @@ void __cpuinit irq_ctx_init(int cpu)
         irqctx = page_address(alloc_pages_node(cpu_to_node(cpu),
                                                THREAD_FLAGS,
                                                THREAD_ORDER));
-        irqctx->tinfo.task              = NULL;
-        irqctx->tinfo.exec_domain       = NULL;
+        memset(&irqctx->tinfo, 0, sizeof(struct thread_info));
         irqctx->tinfo.cpu               = cpu;
-        irqctx->tinfo.preempt_count     = 0;
         irqctx->tinfo.addr_limit        = MAKE_MM_SEG(0);
 
         per_cpu(softirq_ctx, cpu) = irqctx;
diff --git a/arch/x86/mm/numa.c b/arch/x86/mm/numa.c
index 787c52ca49c3..ebf6d7887a38 100644
--- a/arch/x86/mm/numa.c
+++ b/arch/x86/mm/numa.c
@@ -2,6 +2,28 @@
 #include <linux/topology.h>
 #include <linux/module.h>
 #include <linux/bootmem.h>
+#include <asm/numa.h>
+#include <asm/acpi.h>
+
+int __initdata numa_off;
+
+static __init int numa_setup(char *opt)
+{
+        if (!opt)
+                return -EINVAL;
+        if (!strncmp(opt, "off", 3))
+                numa_off = 1;
+#ifdef CONFIG_NUMA_EMU
+        if (!strncmp(opt, "fake=", 5))
+                numa_emu_cmdline(opt + 5);
+#endif
+#ifdef CONFIG_ACPI_NUMA
+        if (!strncmp(opt, "noacpi", 6))
+                acpi_numa = -1;
+#endif
+        return 0;
+}
+early_param("numa", numa_setup);
 
 /*
  * Which logical CPUs are on which nodes
diff --git a/arch/x86/mm/numa_64.c b/arch/x86/mm/numa_64.c
index 1e72102e80c9..95ea1551eebc 100644
--- a/arch/x86/mm/numa_64.c
+++ b/arch/x86/mm/numa_64.c
@@ -30,7 +30,6 @@ s16 apicid_to_node[MAX_LOCAL_APIC] __cpuinitdata = {
         [0 ... MAX_LOCAL_APIC-1] = NUMA_NO_NODE
 };
 
-int numa_off __initdata;
 static unsigned long __initdata nodemap_addr;
 static unsigned long __initdata nodemap_size;
 
@@ -263,6 +262,11 @@ static struct bootnode nodes[MAX_NUMNODES] __initdata;
 static struct bootnode physnodes[MAX_NUMNODES] __cpuinitdata;
 static char *cmdline __initdata;
 
+void __init numa_emu_cmdline(char *str)
+{
+        cmdline = str;
+}
+
 static int __init setup_physnodes(unsigned long start, unsigned long end,
                                         int acpi, int amd)
 {
@@ -670,24 +674,6 @@ unsigned long __init numa_free_all_bootmem(void)
         return pages;
 }
 
-static __init int numa_setup(char *opt)
-{
-        if (!opt)
-                return -EINVAL;
-        if (!strncmp(opt, "off", 3))
-                numa_off = 1;
-#ifdef CONFIG_NUMA_EMU
-        if (!strncmp(opt, "fake=", 5))
-                cmdline = opt + 5;
-#endif
-#ifdef CONFIG_ACPI_NUMA
-        if (!strncmp(opt, "noacpi", 6))
-                acpi_numa = -1;
-#endif
-        return 0;
-}
-early_param("numa", numa_setup);
-
 #ifdef CONFIG_NUMA
 
 static __init int find_near_online_node(int node)
diff --git a/arch/x86/mm/srat_32.c b/arch/x86/mm/srat_32.c
index f16434568a51..ae96e7b8051d 100644
--- a/arch/x86/mm/srat_32.c
+++ b/arch/x86/mm/srat_32.c
@@ -59,7 +59,6 @@ static struct node_memory_chunk_s __initdata node_memory_chunk[MAXCHUNKS];
 static int __initdata num_memory_chunks; /* total number of memory chunks */
 static u8 __initdata apicid_to_pxm[MAX_APICID];
 
-int numa_off __initdata;
 int acpi_numa __initdata;
 
 static __init void bad_srat(void)
diff --git a/drivers/acpi/acpica/accommon.h b/drivers/acpi/acpica/accommon.h
index 3e50c74ed4a1..e0ba17f0a7c8 100644
--- a/drivers/acpi/acpica/accommon.h
+++ b/drivers/acpi/acpica/accommon.h
@@ -5,7 +5,7 @@
  *****************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/acconfig.h b/drivers/acpi/acpica/acconfig.h
index b17d8de9f6ff..ab87396c2c07 100644
--- a/drivers/acpi/acpica/acconfig.h
+++ b/drivers/acpi/acpica/acconfig.h
@@ -5,7 +5,7 @@
  *****************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/acdebug.h b/drivers/acpi/acpica/acdebug.h
index 72e9d5eb083c..eb0b1f8dee6d 100644
--- a/drivers/acpi/acpica/acdebug.h
+++ b/drivers/acpi/acpica/acdebug.h
@@ -5,7 +5,7 @@
  *****************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/acdispat.h b/drivers/acpi/acpica/acdispat.h
index 894a0ff2a946..666271b65418 100644
--- a/drivers/acpi/acpica/acdispat.h
+++ b/drivers/acpi/acpica/acdispat.h
@@ -5,7 +5,7 @@
  *****************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/acevents.h b/drivers/acpi/acpica/acevents.h
index 70e0b28801aa..41d247daf461 100644
--- a/drivers/acpi/acpica/acevents.h
+++ b/drivers/acpi/acpica/acevents.h
@@ -5,7 +5,7 @@
  *****************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/acglobal.h b/drivers/acpi/acpica/acglobal.h
index 0e4dba0d0325..82a1bd283db8 100644
--- a/drivers/acpi/acpica/acglobal.h
+++ b/drivers/acpi/acpica/acglobal.h
@@ -5,7 +5,7 @@
  *****************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/achware.h b/drivers/acpi/acpica/achware.h
index 258d628793ea..e7213beaafc7 100644
--- a/drivers/acpi/acpica/achware.h
+++ b/drivers/acpi/acpica/achware.h
@@ -5,7 +5,7 @@
  *****************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/acinterp.h b/drivers/acpi/acpica/acinterp.h
index 049e203bd621..3731e1c34b83 100644
--- a/drivers/acpi/acpica/acinterp.h
+++ b/drivers/acpi/acpica/acinterp.h
@@ -5,7 +5,7 @@
  *****************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/aclocal.h b/drivers/acpi/acpica/aclocal.h
index 74000f5b7dab..54784bb42cec 100644
--- a/drivers/acpi/acpica/aclocal.h
+++ b/drivers/acpi/acpica/aclocal.h
@@ -5,7 +5,7 @@
  *****************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/acmacros.h b/drivers/acpi/acpica/acmacros.h
index 8d5c9e0a495f..b7491ee1fba6 100644
--- a/drivers/acpi/acpica/acmacros.h
+++ b/drivers/acpi/acpica/acmacros.h
@@ -5,7 +5,7 @@
  *****************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/acnamesp.h b/drivers/acpi/acpica/acnamesp.h
index d44d3bc5b847..79a598c67fe3 100644
--- a/drivers/acpi/acpica/acnamesp.h
+++ b/drivers/acpi/acpica/acnamesp.h
@@ -5,7 +5,7 @@
  *****************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/acobject.h b/drivers/acpi/acpica/acobject.h
index 962a3ccff6fd..1055769f2f01 100644
--- a/drivers/acpi/acpica/acobject.h
+++ b/drivers/acpi/acpica/acobject.h
@@ -6,7 +6,7 @@
  *****************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
@@ -97,8 +97,6 @@
 #define AOPOBJ_OBJECT_INITIALIZED   0x08        /* Region is initialized, _REG was run */
 #define AOPOBJ_SETUP_COMPLETE       0x10        /* Region setup is complete */
 #define AOPOBJ_INVALID              0x20        /* Host OS won't allow a Region address */
-#define AOPOBJ_MODULE_LEVEL         0x40        /* Method is actually module-level code */
-#define AOPOBJ_MODIFIED_NAMESPACE   0x80        /* Method modified the namespace */
 
 /******************************************************************************
  *
@@ -175,7 +173,7 @@ struct acpi_object_region {
 };
 
 struct acpi_object_method {
-        ACPI_OBJECT_COMMON_HEADER u8 method_flags;
+        ACPI_OBJECT_COMMON_HEADER u8 info_flags;
         u8 param_count;
         u8 sync_level;
         union acpi_operand_object *mutex;
@@ -183,13 +181,21 @@ struct acpi_object_method {
         union {
                 ACPI_INTERNAL_METHOD implementation;
                 union acpi_operand_object *handler;
-        } extra;
+        } dispatch;
 
         u32 aml_length;
         u8 thread_count;
         acpi_owner_id owner_id;
 };
 
+/* Flags for info_flags field above */
+
+#define ACPI_METHOD_MODULE_LEVEL        0x01    /* Method is actually module-level code */
+#define ACPI_METHOD_INTERNAL_ONLY       0x02    /* Method is implemented internally (_OSI) */
+#define ACPI_METHOD_SERIALIZED          0x04    /* Method is serialized */
+#define ACPI_METHOD_SERIALIZED_PENDING  0x08    /* Method is to be marked serialized */
+#define ACPI_METHOD_MODIFIED_NAMESPACE  0x10    /* Method modified the namespace */
+
 /******************************************************************************
  *
  * Objects that can be notified.  All share a common notify_info area.
diff --git a/drivers/acpi/acpica/acopcode.h b/drivers/acpi/acpica/acopcode.h
index 8c15ff43f42b..bb2ccfad7376 100644
--- a/drivers/acpi/acpica/acopcode.h
+++ b/drivers/acpi/acpica/acopcode.h
@@ -5,7 +5,7 @@
  *****************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/acparser.h b/drivers/acpi/acpica/acparser.h
index d0bb0fd3e57a..5ea1e06afa20 100644
--- a/drivers/acpi/acpica/acparser.h
+++ b/drivers/acpi/acpica/acparser.h
@@ -5,7 +5,7 @@
  *****************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/acpredef.h b/drivers/acpi/acpica/acpredef.h
index 10998d369ad0..94e73c97cf85 100644
--- a/drivers/acpi/acpica/acpredef.h
+++ b/drivers/acpi/acpica/acpredef.h
@@ -6,7 +6,7 @@
  *****************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/acresrc.h b/drivers/acpi/acpica/acresrc.h
index 528bcbaf4ce7..f08b55b7f3a0 100644
--- a/drivers/acpi/acpica/acresrc.h
+++ b/drivers/acpi/acpica/acresrc.h
@@ -5,7 +5,7 @@
  *****************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/acstruct.h b/drivers/acpi/acpica/acstruct.h
index 6e5dd97949fe..1623b245dde2 100644
--- a/drivers/acpi/acpica/acstruct.h
+++ b/drivers/acpi/acpica/acstruct.h
@@ -5,7 +5,7 @@
  *****************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/actables.h b/drivers/acpi/acpica/actables.h
index 62a576e34361..967f08124eba 100644
--- a/drivers/acpi/acpica/actables.h
+++ b/drivers/acpi/acpica/actables.h
@@ -5,7 +5,7 @@
  *****************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/acutils.h b/drivers/acpi/acpica/acutils.h
index 72e4183c1937..99c140d8e348 100644
--- a/drivers/acpi/acpica/acutils.h
+++ b/drivers/acpi/acpica/acutils.h
@@ -5,7 +5,7 @@
  *****************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/amlcode.h b/drivers/acpi/acpica/amlcode.h
index 1f484ba228fc..f4f0998d3967 100644
--- a/drivers/acpi/acpica/amlcode.h
+++ b/drivers/acpi/acpica/amlcode.h
@@ -7,7 +7,7 @@
  *****************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
@@ -480,16 +480,10 @@ typedef enum {
         AML_FIELD_ATTRIB_SMB_BLOCK_CALL = 0x0D
 } AML_ACCESS_ATTRIBUTE;
 
-/* Bit fields in method_flags byte */
+/* Bit fields in the AML method_flags byte */
 
 #define AML_METHOD_ARG_COUNT        0x07
 #define AML_METHOD_SERIALIZED       0x08
 #define AML_METHOD_SYNC_LEVEL       0xF0
 
-/* METHOD_FLAGS_ARG_COUNT is not used internally, define additional flags */
-
-#define AML_METHOD_INTERNAL_ONLY    0x01
-#define AML_METHOD_RESERVED1        0x02
-#define AML_METHOD_RESERVED2        0x04
-
 #endif                          /* __AMLCODE_H__ */
diff --git a/drivers/acpi/acpica/amlresrc.h b/drivers/acpi/acpica/amlresrc.h
index 0e5798fcbb19..59122cde247c 100644
--- a/drivers/acpi/acpica/amlresrc.h
+++ b/drivers/acpi/acpica/amlresrc.h
@@ -6,7 +6,7 @@
  *****************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/dsfield.c b/drivers/acpi/acpica/dsfield.c
index 347bee1726f1..34be60c0e448 100644
--- a/drivers/acpi/acpica/dsfield.c
+++ b/drivers/acpi/acpica/dsfield.c
@@ -5,7 +5,7 @@
  *****************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/dsinit.c b/drivers/acpi/acpica/dsinit.c
index cc4a38c57558..a7718bf2b9a1 100644
--- a/drivers/acpi/acpica/dsinit.c
+++ b/drivers/acpi/acpica/dsinit.c
@@ -5,7 +5,7 @@
  *****************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/dsmethod.c b/drivers/acpi/acpica/dsmethod.c
index d94dd8974b55..5d797751e205 100644
--- a/drivers/acpi/acpica/dsmethod.c
+++ b/drivers/acpi/acpica/dsmethod.c
@@ -5,7 +5,7 @@
  *****************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
@@ -43,7 +43,6 @@
 
 #include <acpi/acpi.h>
 #include "accommon.h"
-#include "amlcode.h"
 #include "acdispat.h"
 #include "acinterp.h"
 #include "acnamesp.h"
@@ -201,7 +200,7 @@ acpi_ds_begin_method_execution(struct acpi_namespace_node *method_node,
         /*
          * If this method is serialized, we need to acquire the method mutex.
          */
-        if (obj_desc->method.method_flags & AML_METHOD_SERIALIZED) {
+        if (obj_desc->method.info_flags & ACPI_METHOD_SERIALIZED) {
                 /*
                  * Create a mutex for the method if it is defined to be Serialized
                  * and a mutex has not already been created. We defer the mutex creation
@@ -413,8 +412,9 @@ acpi_ds_call_control_method(struct acpi_thread_state *thread,
 
         /* Invoke an internal method if necessary */
 
-        if (obj_desc->method.method_flags & AML_METHOD_INTERNAL_ONLY) {
-                status = obj_desc->method.extra.implementation(next_walk_state);
+        if (obj_desc->method.info_flags & ACPI_METHOD_INTERNAL_ONLY) {
+                status =
+                    obj_desc->method.dispatch.implementation(next_walk_state);
                 if (status == AE_OK) {
                         status = AE_CTRL_TERMINATE;
                 }
@@ -579,11 +579,14 @@ acpi_ds_terminate_control_method(union acpi_operand_object *method_desc,
 
                 /*
                  * Delete any namespace objects created anywhere within the
-                 * namespace by the execution of this method. Unless this method
-                 * is a module-level executable code method, in which case we
-                 * want make the objects permanent.
+                 * namespace by the execution of this method. Unless:
+                 * 1) This method is a module-level executable code method, in which
+                 *    case we want make the objects permanent.
+                 * 2) There are other threads executing the method, in which case we
+                 *    will wait until the last thread has completed.
                  */
-                if (!(method_desc->method.flags & AOPOBJ_MODULE_LEVEL)) {
+                if (!(method_desc->method.info_flags & ACPI_METHOD_MODULE_LEVEL)
+                    && (method_desc->method.thread_count == 1)) {
 
                         /* Delete any direct children of (created by) this method */
 
@@ -593,12 +596,17 @@ acpi_ds_terminate_control_method(union acpi_operand_object *method_desc,
                         /*
                          * Delete any objects that were created by this method
                          * elsewhere in the namespace (if any were created).
+                         * Use of the ACPI_METHOD_MODIFIED_NAMESPACE optimizes the
+                         * deletion such that we don't have to perform an entire
+                         * namespace walk for every control method execution.
                          */
                         if (method_desc->method.
-                            flags & AOPOBJ_MODIFIED_NAMESPACE) {
+                            info_flags & ACPI_METHOD_MODIFIED_NAMESPACE) {
                                 acpi_ns_delete_namespace_by_owner(method_desc->
                                                                   method.
                                                                   owner_id);
+                                method_desc->method.info_flags &=
+                                    ~ACPI_METHOD_MODIFIED_NAMESPACE;
                         }
                 }
         }
@@ -629,19 +637,43 @@ acpi_ds_terminate_control_method(union acpi_operand_object *method_desc,
                  * Serialized if it appears that the method is incorrectly written and
                  * does not support multiple thread execution. The best example of this
                  * is if such a method creates namespace objects and blocks. A second
-                 * thread will fail with an AE_ALREADY_EXISTS exception
+                 * thread will fail with an AE_ALREADY_EXISTS exception.
                  *
                  * This code is here because we must wait until the last thread exits
-                 * before creating the synchronization semaphore.
+                 * before marking the method as serialized.
                  */
-                if ((method_desc->method.method_flags & AML_METHOD_SERIALIZED)
-                    && (!method_desc->method.mutex)) {
-                        (void)acpi_ds_create_method_mutex(method_desc);
+                if (method_desc->method.
+                    info_flags & ACPI_METHOD_SERIALIZED_PENDING) {
+                        if (walk_state) {
+                                ACPI_INFO((AE_INFO,
+                                           "Marking method %4.4s as Serialized because of AE_ALREADY_EXISTS error",
+                                           walk_state->method_node->name.
+                                           ascii));
+                        }
+
+                        /*
+                         * Method tried to create an object twice and was marked as
+                         * "pending serialized". The probable cause is that the method
+                         * cannot handle reentrancy.
+                         *
+                         * The method was created as not_serialized, but it tried to create
+                         * a named object and then blocked, causing the second thread
+                         * entrance to begin and then fail. Workaround this problem by
+                         * marking the method permanently as Serialized when the last
+                         * thread exits here.
+                         */
+                        method_desc->method.info_flags &=
+                            ~ACPI_METHOD_SERIALIZED_PENDING;
+                        method_desc->method.info_flags |=
+                            ACPI_METHOD_SERIALIZED;
+                        method_desc->method.sync_level = 0;
                 }
 
                 /* No more threads, we can free the owner_id */
 
-                if (!(method_desc->method.flags & AOPOBJ_MODULE_LEVEL)) {
+                if (!
+                    (method_desc->method.
+                     info_flags & ACPI_METHOD_MODULE_LEVEL)) {
                         acpi_ut_release_owner_id(&method_desc->method.owner_id);
                 }
         }
diff --git a/drivers/acpi/acpica/dsmthdat.c b/drivers/acpi/acpica/dsmthdat.c
index 8095306fcd8c..905ce29a92e1 100644
--- a/drivers/acpi/acpica/dsmthdat.c
+++ b/drivers/acpi/acpica/dsmthdat.c
@@ -5,7 +5,7 @@
  ******************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/dsobject.c b/drivers/acpi/acpica/dsobject.c
index 8e85f54a8e0e..f42e17e5c252 100644
--- a/drivers/acpi/acpica/dsobject.c
+++ b/drivers/acpi/acpica/dsobject.c
@@ -5,7 +5,7 @@
  *****************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/dsopcode.c b/drivers/acpi/acpica/dsopcode.c
index 7c0e74227171..bbecf293aeeb 100644
--- a/drivers/acpi/acpica/dsopcode.c
+++ b/drivers/acpi/acpica/dsopcode.c
@@ -6,7 +6,7 @@
  *****************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/dsutils.c b/drivers/acpi/acpica/dsutils.c
index 15135c25aa9b..2c477ce172fa 100644
--- a/drivers/acpi/acpica/dsutils.c
+++ b/drivers/acpi/acpica/dsutils.c
@@ -5,7 +5,7 @@
  ******************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/dswexec.c b/drivers/acpi/acpica/dswexec.c
index 6b0b5d08d97a..fe40e4c6554f 100644
--- a/drivers/acpi/acpica/dswexec.c
+++ b/drivers/acpi/acpica/dswexec.c
@@ -6,7 +6,7 @@
  *****************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/dswload.c b/drivers/acpi/acpica/dswload.c
index 140a9d002959..52566ff5e903 100644
--- a/drivers/acpi/acpica/dswload.c
+++ b/drivers/acpi/acpica/dswload.c
@@ -5,7 +5,7 @@
  *****************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/dswscope.c b/drivers/acpi/acpica/dswscope.c
index d1e701709dac..76a661fc1e09 100644
--- a/drivers/acpi/acpica/dswscope.c
+++ b/drivers/acpi/acpica/dswscope.c
@@ -5,7 +5,7 @@
  *****************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/dswstate.c b/drivers/acpi/acpica/dswstate.c
index 83155dd8671e..a6c374ef9914 100644
--- a/drivers/acpi/acpica/dswstate.c
+++ b/drivers/acpi/acpica/dswstate.c
@@ -5,7 +5,7 @@
  *****************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/evevent.c b/drivers/acpi/acpica/evevent.c
index e5e313c663a5..d458b041e651 100644
--- a/drivers/acpi/acpica/evevent.c
+++ b/drivers/acpi/acpica/evevent.c
@@ -5,7 +5,7 @@
  *****************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/evgpe.c b/drivers/acpi/acpica/evgpe.c
index 7c339d34ab42..14988a86066f 100644
--- a/drivers/acpi/acpica/evgpe.c
+++ b/drivers/acpi/acpica/evgpe.c
@@ -5,7 +5,7 @@
  *****************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
@@ -471,6 +471,7 @@ static void ACPI_SYSTEM_XFACE acpi_ev_asynch_execute_gpe_method(void *context)
 
         status = acpi_ut_acquire_mutex(ACPI_MTX_EVENTS);
         if (ACPI_FAILURE(status)) {
+                ACPI_FREE(local_gpe_event_info);
                 return_VOID;
         }
 
@@ -478,6 +479,7 @@ static void ACPI_SYSTEM_XFACE acpi_ev_asynch_execute_gpe_method(void *context)
 
         if (!acpi_ev_valid_gpe_event(gpe_event_info)) {
                 status = acpi_ut_release_mutex(ACPI_MTX_EVENTS);
+                ACPI_FREE(local_gpe_event_info);
                 return_VOID;
         }
 
diff --git a/drivers/acpi/acpica/evgpeblk.c b/drivers/acpi/acpica/evgpeblk.c
index 9acb86958c09..ca2c41a53311 100644
--- a/drivers/acpi/acpica/evgpeblk.c
+++ b/drivers/acpi/acpica/evgpeblk.c
@@ -5,7 +5,7 @@
  *****************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/evgpeinit.c b/drivers/acpi/acpica/evgpeinit.c
index c59dc2340593..ce9aa9f9a972 100644
--- a/drivers/acpi/acpica/evgpeinit.c
+++ b/drivers/acpi/acpica/evgpeinit.c
@@ -5,7 +5,7 @@
  *****************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/evgpeutil.c b/drivers/acpi/acpica/evgpeutil.c
index 10e477494dcf..80a81d0c4a80 100644
--- a/drivers/acpi/acpica/evgpeutil.c
+++ b/drivers/acpi/acpica/evgpeutil.c
@@ -5,7 +5,7 @@
  *****************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/evmisc.c b/drivers/acpi/acpica/evmisc.c
index 38bba66fcce5..7dc80946f7bd 100644
--- a/drivers/acpi/acpica/evmisc.c
+++ b/drivers/acpi/acpica/evmisc.c
@@ -5,7 +5,7 @@
  *****************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/evregion.c b/drivers/acpi/acpica/evregion.c
index 98fd210e87b2..785a5ee64585 100644
--- a/drivers/acpi/acpica/evregion.c
+++ b/drivers/acpi/acpica/evregion.c
@@ -5,7 +5,7 @@
  *****************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/evrgnini.c b/drivers/acpi/acpica/evrgnini.c
index 0b47a6dc9290..9659cee6093e 100644
--- a/drivers/acpi/acpica/evrgnini.c
+++ b/drivers/acpi/acpica/evrgnini.c
@@ -5,7 +5,7 @@
  *****************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
@@ -590,9 +590,9 @@ acpi_ev_initialize_region(union acpi_operand_object *region_obj,
                                  * See acpi_ns_exec_module_code
                                  */
                                 if (obj_desc->method.
-                                    flags & AOPOBJ_MODULE_LEVEL) {
+                                    info_flags & ACPI_METHOD_MODULE_LEVEL) {
                                         handler_obj =
-                                            obj_desc->method.extra.handler;
+                                            obj_desc->method.dispatch.handler;
                                 }
                                 break;
 
diff --git a/drivers/acpi/acpica/evsci.c b/drivers/acpi/acpica/evsci.c
index 8dfbaa96e422..2ebd40e1a3ef 100644
--- a/drivers/acpi/acpica/evsci.c
+++ b/drivers/acpi/acpica/evsci.c
@@ -6,7 +6,7 @@
  ******************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/evxface.c b/drivers/acpi/acpica/evxface.c
index 1226689bdb1b..e1141402dbed 100644
--- a/drivers/acpi/acpica/evxface.c
+++ b/drivers/acpi/acpica/evxface.c
@@ -5,7 +5,7 @@
  *****************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/evxfevnt.c b/drivers/acpi/acpica/evxfevnt.c
index 90488c1e0f3d..c57b5c707a77 100644
--- a/drivers/acpi/acpica/evxfevnt.c
+++ b/drivers/acpi/acpica/evxfevnt.c
@@ -5,7 +5,7 @@
  *****************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/evxfgpe.c b/drivers/acpi/acpica/evxfgpe.c
index 416845bc9c1f..e9562a7cb2f9 100644
--- a/drivers/acpi/acpica/evxfgpe.c
+++ b/drivers/acpi/acpica/evxfgpe.c
@@ -5,7 +5,7 @@
  *****************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/evxfregn.c b/drivers/acpi/acpica/evxfregn.c
index ce9314f79451..eb7386763712 100644
--- a/drivers/acpi/acpica/evxfregn.c
+++ b/drivers/acpi/acpica/evxfregn.c
@@ -6,7 +6,7 @@
  *****************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/exconfig.c b/drivers/acpi/acpica/exconfig.c
index 18832205b631..745a42b401f5 100644
--- a/drivers/acpi/acpica/exconfig.c
+++ b/drivers/acpi/acpica/exconfig.c
@@ -5,7 +5,7 @@
  *****************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/exconvrt.c b/drivers/acpi/acpica/exconvrt.c
index b73bc50c5b76..74162a11817d 100644
--- a/drivers/acpi/acpica/exconvrt.c
+++ b/drivers/acpi/acpica/exconvrt.c
@@ -5,7 +5,7 @@
  *****************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/excreate.c b/drivers/acpi/acpica/excreate.c
index 3c61b48c73f5..e7b372d17667 100644
--- a/drivers/acpi/acpica/excreate.c
+++ b/drivers/acpi/acpica/excreate.c
@@ -5,7 +5,7 @@
  *****************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
@@ -482,13 +482,11 @@ acpi_ex_create_method(u8 * aml_start,
         obj_desc->method.aml_length = aml_length;
 
         /*
-         * Disassemble the method flags. Split off the Arg Count
-         * for efficiency
+         * Disassemble the method flags. Split off the arg_count, Serialized
+         * flag, and sync_level for efficiency.
          */
         method_flags = (u8) operand[1]->integer.value;
 
-        obj_desc->method.method_flags =
-            (u8) (method_flags & ~AML_METHOD_ARG_COUNT);
         obj_desc->method.param_count =
             (u8) (method_flags & AML_METHOD_ARG_COUNT);
 
@@ -497,6 +495,8 @@ acpi_ex_create_method(u8 * aml_start,
          * created for this method when it is parsed.
          */
         if (method_flags & AML_METHOD_SERIALIZED) {
+                obj_desc->method.info_flags = ACPI_METHOD_SERIALIZED;
+
                 /*
                  * ACPI 1.0: sync_level = 0
                  * ACPI 2.0: sync_level = sync_level in method declaration
diff --git a/drivers/acpi/acpica/exdebug.c b/drivers/acpi/acpica/exdebug.c
index be8c98b480d7..c7a2f1edd282 100644
--- a/drivers/acpi/acpica/exdebug.c
+++ b/drivers/acpi/acpica/exdebug.c
@@ -5,7 +5,7 @@
  *****************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/exdump.c b/drivers/acpi/acpica/exdump.c
index f067bbb0d961..61b8c0e8b74d 100644
--- a/drivers/acpi/acpica/exdump.c
+++ b/drivers/acpi/acpica/exdump.c
@@ -5,7 +5,7 @@
  *****************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
@@ -122,7 +122,7 @@ static struct acpi_exdump_info acpi_ex_dump_event[2] = {
 
 static struct acpi_exdump_info acpi_ex_dump_method[9] = {
         {ACPI_EXD_INIT, ACPI_EXD_TABLE_SIZE(acpi_ex_dump_method), NULL},
-        {ACPI_EXD_UINT8, ACPI_EXD_OFFSET(method.method_flags), "Method Flags"},
+        {ACPI_EXD_UINT8, ACPI_EXD_OFFSET(method.info_flags), "Info Flags"},
         {ACPI_EXD_UINT8, ACPI_EXD_OFFSET(method.param_count),
          "Parameter Count"},
         {ACPI_EXD_UINT8, ACPI_EXD_OFFSET(method.sync_level), "Sync Level"},
diff --git a/drivers/acpi/acpica/exfield.c b/drivers/acpi/acpica/exfield.c
index f17d2ff0031b..0bde2230c028 100644
--- a/drivers/acpi/acpica/exfield.c
+++ b/drivers/acpi/acpica/exfield.c
@@ -5,7 +5,7 @@
  *****************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/exfldio.c b/drivers/acpi/acpica/exfldio.c
index 38293fd3e088..6c79c29f082d 100644
--- a/drivers/acpi/acpica/exfldio.c
+++ b/drivers/acpi/acpica/exfldio.c
@@ -5,7 +5,7 @@
  *****************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/exmisc.c b/drivers/acpi/acpica/exmisc.c
index 95db4be0877b..703d88ed0b3d 100644
--- a/drivers/acpi/acpica/exmisc.c
+++ b/drivers/acpi/acpica/exmisc.c
@@ -6,7 +6,7 @@
  *****************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/exmutex.c b/drivers/acpi/acpica/exmutex.c
index 6af14e43f839..be1c56ead653 100644
--- a/drivers/acpi/acpica/exmutex.c
+++ b/drivers/acpi/acpica/exmutex.c
@@ -6,7 +6,7 @@
  *****************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/exnames.c b/drivers/acpi/acpica/exnames.c
index d11e539ef763..49ec049c157e 100644
--- a/drivers/acpi/acpica/exnames.c
+++ b/drivers/acpi/acpica/exnames.c
@@ -6,7 +6,7 @@
  *****************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/exoparg1.c b/drivers/acpi/acpica/exoparg1.c
index 84e4d185aa25..236ead14b7f7 100644
--- a/drivers/acpi/acpica/exoparg1.c
+++ b/drivers/acpi/acpica/exoparg1.c
@@ -6,7 +6,7 @@
  *****************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/exoparg2.c b/drivers/acpi/acpica/exoparg2.c
index 10e104cf0fb9..2571b4a310f4 100644
--- a/drivers/acpi/acpica/exoparg2.c
+++ b/drivers/acpi/acpica/exoparg2.c
@@ -5,7 +5,7 @@
  *****************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/exoparg3.c b/drivers/acpi/acpica/exoparg3.c
index 7a08d23befcd..1b48d9d28c9a 100644
--- a/drivers/acpi/acpica/exoparg3.c
+++ b/drivers/acpi/acpica/exoparg3.c
@@ -6,7 +6,7 @@
  *****************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/exoparg6.c b/drivers/acpi/acpica/exoparg6.c
index 4b50730cf9a0..f4a2787e8e92 100644
--- a/drivers/acpi/acpica/exoparg6.c
+++ b/drivers/acpi/acpica/exoparg6.c
@@ -6,7 +6,7 @@
  *****************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/exprep.c b/drivers/acpi/acpica/exprep.c
index 7aae29f73d3f..cc95e2000406 100644
--- a/drivers/acpi/acpica/exprep.c
+++ b/drivers/acpi/acpica/exprep.c
@@ -6,7 +6,7 @@
  *****************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/exregion.c b/drivers/acpi/acpica/exregion.c
index de17e10da0ed..f0d5e14f1f2c 100644
--- a/drivers/acpi/acpica/exregion.c
+++ b/drivers/acpi/acpica/exregion.c
@@ -6,7 +6,7 @@
  *****************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/exresnte.c b/drivers/acpi/acpica/exresnte.c
index 1fa4289a687e..55997e46948b 100644
--- a/drivers/acpi/acpica/exresnte.c
+++ b/drivers/acpi/acpica/exresnte.c
@@ -6,7 +6,7 @@
  *****************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/exresolv.c b/drivers/acpi/acpica/exresolv.c
index 7ca35ea8acea..db502cd7d934 100644
--- a/drivers/acpi/acpica/exresolv.c
+++ b/drivers/acpi/acpica/exresolv.c
@@ -6,7 +6,7 @@
  *****************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/exresop.c b/drivers/acpi/acpica/exresop.c
index 8c97cfd6a0fd..e3bb00ccdff5 100644
--- a/drivers/acpi/acpica/exresop.c
+++ b/drivers/acpi/acpica/exresop.c
@@ -6,7 +6,7 @@
  *****************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/exstore.c b/drivers/acpi/acpica/exstore.c
index 1624436ba4c5..c0c8842dd344 100644
--- a/drivers/acpi/acpica/exstore.c
+++ b/drivers/acpi/acpica/exstore.c
@@ -5,7 +5,7 @@
  *****************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/exstoren.c b/drivers/acpi/acpica/exstoren.c
index d4af684620ca..a979017d56b8 100644
--- a/drivers/acpi/acpica/exstoren.c
+++ b/drivers/acpi/acpica/exstoren.c
@@ -7,7 +7,7 @@
  *****************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/exstorob.c b/drivers/acpi/acpica/exstorob.c
index e972b667b09b..dc665cc554de 100644
--- a/drivers/acpi/acpica/exstorob.c
+++ b/drivers/acpi/acpica/exstorob.c
@@ -6,7 +6,7 @@
  *****************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/exsystem.c b/drivers/acpi/acpica/exsystem.c
index 675aaa91a770..df66e7b686be 100644
--- a/drivers/acpi/acpica/exsystem.c
+++ b/drivers/acpi/acpica/exsystem.c
@@ -6,7 +6,7 @@
  *****************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/exutils.c b/drivers/acpi/acpica/exutils.c
index 4093522eed45..8ad93146dd32 100644
--- a/drivers/acpi/acpica/exutils.c
+++ b/drivers/acpi/acpica/exutils.c
@@ -6,7 +6,7 @@
  *****************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/hwacpi.c b/drivers/acpi/acpica/hwacpi.c
index b44274a0b62c..fc380d3d45ab 100644
--- a/drivers/acpi/acpica/hwacpi.c
+++ b/drivers/acpi/acpica/hwacpi.c
@@ -6,7 +6,7 @@
  *****************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/hwgpe.c b/drivers/acpi/acpica/hwgpe.c
index 85c3cbd4304d..f610d88a66be 100644
--- a/drivers/acpi/acpica/hwgpe.c
+++ b/drivers/acpi/acpica/hwgpe.c
@@ -6,7 +6,7 @@
  *****************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/hwpci.c b/drivers/acpi/acpica/hwpci.c
index ad21c7d8bf4f..050fd227951b 100644
--- a/drivers/acpi/acpica/hwpci.c
+++ b/drivers/acpi/acpica/hwpci.c
@@ -5,7 +5,7 @@
  ******************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/hwregs.c b/drivers/acpi/acpica/hwregs.c
index 5d1273b660ae..55accb7018bb 100644
--- a/drivers/acpi/acpica/hwregs.c
+++ b/drivers/acpi/acpica/hwregs.c
@@ -7,7 +7,7 @@
  ******************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/hwsleep.c b/drivers/acpi/acpica/hwsleep.c
index 3796811276ac..2ac28bbe8827 100644
--- a/drivers/acpi/acpica/hwsleep.c
+++ b/drivers/acpi/acpica/hwsleep.c
@@ -6,7 +6,7 @@
  *****************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/hwtimer.c b/drivers/acpi/acpica/hwtimer.c
index 1ef8e0bb250b..9c8eb71a12fb 100644
--- a/drivers/acpi/acpica/hwtimer.c
+++ b/drivers/acpi/acpica/hwtimer.c
@@ -6,7 +6,7 @@
  *****************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/hwvalid.c b/drivers/acpi/acpica/hwvalid.c
index e1d9c777b213..5f1605874655 100644
--- a/drivers/acpi/acpica/hwvalid.c
+++ b/drivers/acpi/acpica/hwvalid.c
@@ -6,7 +6,7 @@
  *****************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/hwxface.c b/drivers/acpi/acpica/hwxface.c
index 50cc3be77724..6f98d210e71c 100644
--- a/drivers/acpi/acpica/hwxface.c
+++ b/drivers/acpi/acpica/hwxface.c
@@ -6,7 +6,7 @@
  *****************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/nsaccess.c b/drivers/acpi/acpica/nsaccess.c
index 0cd925be5fc1..d93172fd15a8 100644
--- a/drivers/acpi/acpica/nsaccess.c
+++ b/drivers/acpi/acpica/nsaccess.c
@@ -5,7 +5,7 @@
  ******************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
@@ -163,9 +163,9 @@ acpi_status acpi_ns_root_initialize(void)
 #else
                                 /* Mark this as a very SPECIAL method */
 
-                                obj_desc->method.method_flags =
-                                    AML_METHOD_INTERNAL_ONLY;
-                                obj_desc->method.extra.implementation =
+                                obj_desc->method.info_flags =
+                                    ACPI_METHOD_INTERNAL_ONLY;
+                                obj_desc->method.dispatch.implementation =
                                     acpi_ut_osi_implementation;
 #endif
                                 break;
diff --git a/drivers/acpi/acpica/nsalloc.c b/drivers/acpi/acpica/nsalloc.c
index 1e5ff803d9ad..1d0ef15d158f 100644
--- a/drivers/acpi/acpica/nsalloc.c
+++ b/drivers/acpi/acpica/nsalloc.c
@@ -5,7 +5,7 @@
  ******************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
@@ -234,8 +234,8 @@ void acpi_ns_install_node(struct acpi_walk_state *walk_state, struct acpi_namesp
                          * modified the namespace. This is used for cleanup when the
                          * method exits.
                          */
-                        walk_state->method_desc->method.flags |=
-                            AOPOBJ_MODIFIED_NAMESPACE;
+                        walk_state->method_desc->method.info_flags |=
+                            ACPI_METHOD_MODIFIED_NAMESPACE;
                 }
         }
 
@@ -341,6 +341,7 @@ void acpi_ns_delete_namespace_subtree(struct acpi_namespace_node *parent_node)
 {
         struct acpi_namespace_node *child_node = NULL;
         u32 level = 1;
+        acpi_status status;
 
         ACPI_FUNCTION_TRACE(ns_delete_namespace_subtree);
 
@@ -348,6 +349,13 @@ void acpi_ns_delete_namespace_subtree(struct acpi_namespace_node *parent_node)
                 return_VOID;
         }
 
+        /* Lock namespace for possible update */
+
+        status = acpi_ut_acquire_mutex(ACPI_MTX_NAMESPACE);
+        if (ACPI_FAILURE(status)) {
+                return_VOID;
+        }
+
         /*
          * Traverse the tree of objects until we bubble back up
          * to where we started.
@@ -397,6 +405,7 @@ void acpi_ns_delete_namespace_subtree(struct acpi_namespace_node *parent_node)
                 }
         }
 
+        (void)acpi_ut_release_mutex(ACPI_MTX_NAMESPACE);
         return_VOID;
 }
 
diff --git a/drivers/acpi/acpica/nsdump.c b/drivers/acpi/acpica/nsdump.c
index a54dc39e304b..b683cc2ff9d3 100644
--- a/drivers/acpi/acpica/nsdump.c
+++ b/drivers/acpi/acpica/nsdump.c
@@ -5,7 +5,7 @@
  *****************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
@@ -624,9 +624,22 @@ acpi_ns_dump_objects(acpi_object_type type,
                      acpi_owner_id owner_id, acpi_handle start_handle)
 {
         struct acpi_walk_info info;
+        acpi_status status;
 
         ACPI_FUNCTION_ENTRY();
 
+        /*
+         * Just lock the entire namespace for the duration of the dump.
+         * We don't want any changes to the namespace during this time,
+         * especially the temporary nodes since we are going to display
+         * them also.
+         */
+        status = acpi_ut_acquire_mutex(ACPI_MTX_NAMESPACE);
+        if (ACPI_FAILURE(status)) {
+                acpi_os_printf("Could not acquire namespace mutex\n");
+                return;
+        }
+
         info.debug_level = ACPI_LV_TABLES;
         info.owner_id = owner_id;
         info.display_type = display_type;
@@ -636,6 +649,8 @@ acpi_ns_dump_objects(acpi_object_type type,
                                      ACPI_NS_WALK_TEMP_NODES,
                                      acpi_ns_dump_one_object, NULL,
                                      (void *)&info, NULL);
+
+        (void)acpi_ut_release_mutex(ACPI_MTX_NAMESPACE);
 }
 #endif                          /* ACPI_FUTURE_USAGE */
 
diff --git a/drivers/acpi/acpica/nsdumpdv.c b/drivers/acpi/acpica/nsdumpdv.c
index d2a97921e249..2ed294b7a4db 100644
--- a/drivers/acpi/acpica/nsdumpdv.c
+++ b/drivers/acpi/acpica/nsdumpdv.c
@@ -5,7 +5,7 @@
  *****************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/nseval.c b/drivers/acpi/acpica/nseval.c
index f52829cc294b..c1bd02b1a058 100644
--- a/drivers/acpi/acpica/nseval.c
+++ b/drivers/acpi/acpica/nseval.c
@@ -5,7 +5,7 @@
  ******************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
@@ -389,7 +389,7 @@ acpi_ns_exec_module_code(union acpi_operand_object *method_obj,
          * acpi_gbl_root_node->Object is NULL at PASS1.
          */
         if ((type == ACPI_TYPE_DEVICE) && parent_node->object) {
-                method_obj->method.extra.handler =
+                method_obj->method.dispatch.handler =
                     parent_node->object->device.handler;
         }
 
diff --git a/drivers/acpi/acpica/nsinit.c b/drivers/acpi/acpica/nsinit.c
index 0cac7ec0d2ec..fd7c6380e294 100644
--- a/drivers/acpi/acpica/nsinit.c
+++ b/drivers/acpi/acpica/nsinit.c
@@ -5,7 +5,7 @@
  *****************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/nsload.c b/drivers/acpi/acpica/nsload.c
index df18be94fefe..5f7dc691c183 100644
--- a/drivers/acpi/acpica/nsload.c
+++ b/drivers/acpi/acpica/nsload.c
@@ -5,7 +5,7 @@
  *****************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/nsnames.c b/drivers/acpi/acpica/nsnames.c
index d3104af57e13..d5fa520c3de5 100644
--- a/drivers/acpi/acpica/nsnames.c
+++ b/drivers/acpi/acpica/nsnames.c
@@ -5,7 +5,7 @@
  ******************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/nsobject.c b/drivers/acpi/acpica/nsobject.c
index 41a9213dd5af..3bb8bf105ea2 100644
--- a/drivers/acpi/acpica/nsobject.c
+++ b/drivers/acpi/acpica/nsobject.c
@@ -6,7 +6,7 @@
  ******************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/nsparse.c b/drivers/acpi/acpica/nsparse.c
index 5808c89e9fac..b3234fa795b8 100644
--- a/drivers/acpi/acpica/nsparse.c
+++ b/drivers/acpi/acpica/nsparse.c
@@ -5,7 +5,7 @@
  *****************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/nspredef.c b/drivers/acpi/acpica/nspredef.c
index 7096bcda0c72..9fb03fa8ffde 100644
--- a/drivers/acpi/acpica/nspredef.c
+++ b/drivers/acpi/acpica/nspredef.c
@@ -6,7 +6,7 @@
  *****************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/nsrepair.c b/drivers/acpi/acpica/nsrepair.c
index d1c136692667..1d76ac85b5e7 100644
--- a/drivers/acpi/acpica/nsrepair.c
+++ b/drivers/acpi/acpica/nsrepair.c
@@ -5,7 +5,7 @@
  *****************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/nsrepair2.c b/drivers/acpi/acpica/nsrepair2.c
index 4ef9f43ea926..973883babee1 100644
--- a/drivers/acpi/acpica/nsrepair2.c
+++ b/drivers/acpi/acpica/nsrepair2.c
@@ -6,7 +6,7 @@
  *****************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/nssearch.c b/drivers/acpi/acpica/nssearch.c
index 41102a84272f..28b0d7a62b99 100644
--- a/drivers/acpi/acpica/nssearch.c
+++ b/drivers/acpi/acpica/nssearch.c
@@ -5,7 +5,7 @@
  ******************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/nsutils.c b/drivers/acpi/acpica/nsutils.c
index a7d6ad9c111b..cb1b104a69a2 100644
--- a/drivers/acpi/acpica/nsutils.c
+++ b/drivers/acpi/acpica/nsutils.c
@@ -6,7 +6,7 @@
  *****************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/nswalk.c b/drivers/acpi/acpica/nswalk.c
index 2cd5be8fe10f..345f0c3c6ad2 100644
--- a/drivers/acpi/acpica/nswalk.c
+++ b/drivers/acpi/acpica/nswalk.c
@@ -5,7 +5,7 @@
  *****************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/nsxfeval.c b/drivers/acpi/acpica/nsxfeval.c
index ebef8a7fd707..c53f0040e490 100644
--- a/drivers/acpi/acpica/nsxfeval.c
+++ b/drivers/acpi/acpica/nsxfeval.c
@@ -6,7 +6,7 @@
  ******************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/nsxfname.c b/drivers/acpi/acpica/nsxfname.c
index b01e45a415e3..3fd4526f3dba 100644
--- a/drivers/acpi/acpica/nsxfname.c
+++ b/drivers/acpi/acpica/nsxfname.c
@@ -6,7 +6,7 @@
  *****************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
@@ -603,10 +603,9 @@ acpi_status acpi_install_method(u8 *buffer)
         method_obj->method.param_count = (u8)
             (method_flags & AML_METHOD_ARG_COUNT);
 
-        method_obj->method.method_flags = (u8)
-            (method_flags & ~AML_METHOD_ARG_COUNT);
-
         if (method_flags & AML_METHOD_SERIALIZED) {
+                method_obj->method.info_flags = ACPI_METHOD_SERIALIZED;
+
                 method_obj->method.sync_level = (u8)
                     ((method_flags & AML_METHOD_SYNC_LEVEL) >> 4);
         }
diff --git a/drivers/acpi/acpica/nsxfobj.c b/drivers/acpi/acpica/nsxfobj.c
index a1f04e9b8030..db7660f8b869 100644
--- a/drivers/acpi/acpica/nsxfobj.c
+++ b/drivers/acpi/acpica/nsxfobj.c
@@ -6,7 +6,7 @@
  ******************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/psargs.c b/drivers/acpi/acpica/psargs.c
index 7df1a4c95274..e1fad0ee0136 100644
--- a/drivers/acpi/acpica/psargs.c
+++ b/drivers/acpi/acpica/psargs.c
@@ -5,7 +5,7 @@
  *****************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/psloop.c b/drivers/acpi/acpica/psloop.c
index 2f2e7760938c..01dd70d1de51 100644
--- a/drivers/acpi/acpica/psloop.c
+++ b/drivers/acpi/acpica/psloop.c
@@ -5,7 +5,7 @@
  *****************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
@@ -655,7 +655,7 @@ acpi_ps_link_module_code(union acpi_parse_object *parent_op,
                 method_obj->method.aml_start = aml_start;
                 method_obj->method.aml_length = aml_length;
                 method_obj->method.owner_id = owner_id;
-                method_obj->method.flags |= AOPOBJ_MODULE_LEVEL;
+                method_obj->method.info_flags |= ACPI_METHOD_MODULE_LEVEL;
 
                 /*
                  * Save the parent node in next_object. This is cheating, but we
diff --git a/drivers/acpi/acpica/psopcode.c b/drivers/acpi/acpica/psopcode.c
index 2b0c3be2b1b8..bed08de7528c 100644
--- a/drivers/acpi/acpica/psopcode.c
+++ b/drivers/acpi/acpica/psopcode.c
@@ -5,7 +5,7 @@
  *****************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/psparse.c b/drivers/acpi/acpica/psparse.c
index 8d81542194d4..9bb0cbd37b5e 100644
--- a/drivers/acpi/acpica/psparse.c
+++ b/drivers/acpi/acpica/psparse.c
@@ -5,7 +5,7 @@
  *****************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
@@ -55,7 +55,6 @@
 #include "acparser.h"
 #include "acdispat.h"
 #include "amlcode.h"
-#include "acnamesp.h"
 #include "acinterp.h"
 
 #define _COMPONENT          ACPI_PARSER
@@ -539,24 +538,16 @@ acpi_status acpi_ps_parse_aml(struct acpi_walk_state *walk_state)
                         /* Check for possible multi-thread reentrancy problem */
 
                         if ((status == AE_ALREADY_EXISTS) &&
-                            (!walk_state->method_desc->method.mutex)) {
-                                ACPI_INFO((AE_INFO,
-                                           "Marking method %4.4s as Serialized because of AE_ALREADY_EXISTS error",
-                                           walk_state->method_node->name.
-                                           ascii));
-
+                            (!(walk_state->method_desc->method.
+                               info_flags & ACPI_METHOD_SERIALIZED))) {
                                 /*
-                                 * Method tried to create an object twice. The probable cause is
-                                 * that the method cannot handle reentrancy.
-                                 *
-                                 * The method is marked not_serialized, but it tried to create
-                                 * a named object, causing the second thread entrance to fail.
-                                 * Workaround this problem by marking the method permanently
-                                 * as Serialized.
+                                 * Method is not serialized and tried to create an object
+                                 * twice. The probable cause is that the method cannot
+                                 * handle reentrancy. Mark as "pending serialized" now, and
+                                 * then mark "serialized" when the last thread exits.
                                  */
-                                walk_state->method_desc->method.method_flags |=
-                                    AML_METHOD_SERIALIZED;
-                                walk_state->method_desc->method.sync_level = 0;
+                                walk_state->method_desc->method.info_flags |=
+                                    ACPI_METHOD_SERIALIZED_PENDING;
                         }
                 }
 
diff --git a/drivers/acpi/acpica/psscope.c b/drivers/acpi/acpica/psscope.c
index 40e2b279ea12..a5faa1323a02 100644
--- a/drivers/acpi/acpica/psscope.c
+++ b/drivers/acpi/acpica/psscope.c
@@ -5,7 +5,7 @@
  *****************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/pstree.c b/drivers/acpi/acpica/pstree.c
index d4b970c3630b..f1464c03aa42 100644
--- a/drivers/acpi/acpica/pstree.c
+++ b/drivers/acpi/acpica/pstree.c
@@ -5,7 +5,7 @@
  *****************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/psutils.c b/drivers/acpi/acpica/psutils.c
index fe29eee5adb1..7eda78503422 100644
--- a/drivers/acpi/acpica/psutils.c
+++ b/drivers/acpi/acpica/psutils.c
@@ -5,7 +5,7 @@
  *****************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/pswalk.c b/drivers/acpi/acpica/pswalk.c
index 8abb9629443d..3312d6368bf1 100644
--- a/drivers/acpi/acpica/pswalk.c
+++ b/drivers/acpi/acpica/pswalk.c
@@ -5,7 +5,7 @@
  *****************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/psxface.c b/drivers/acpi/acpica/psxface.c
index c42f067cff9d..8086805d4494 100644
--- a/drivers/acpi/acpica/psxface.c
+++ b/drivers/acpi/acpica/psxface.c
@@ -5,7 +5,7 @@
  *****************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
@@ -47,7 +47,6 @@
 #include "acdispat.h"
 #include "acinterp.h"
 #include "actables.h"
-#include "amlcode.h"
 
 #define _COMPONENT          ACPI_PARSER
 ACPI_MODULE_NAME("psxface")
@@ -285,15 +284,15 @@ acpi_status acpi_ps_execute_method(struct acpi_evaluate_info *info)
                 goto cleanup;
         }
 
-        if (info->obj_desc->method.flags & AOPOBJ_MODULE_LEVEL) {
+        if (info->obj_desc->method.info_flags & ACPI_METHOD_MODULE_LEVEL) {
                 walk_state->parse_flags |= ACPI_PARSE_MODULE_LEVEL;
         }
 
         /* Invoke an internal method if necessary */
 
-        if (info->obj_desc->method.method_flags & AML_METHOD_INTERNAL_ONLY) {
+        if (info->obj_desc->method.info_flags & ACPI_METHOD_INTERNAL_ONLY) {
                 status =
-                    info->obj_desc->method.extra.implementation(walk_state);
+                    info->obj_desc->method.dispatch.implementation(walk_state);
                 info->return_object = walk_state->return_desc;
 
                 /* Cleanup states */
diff --git a/drivers/acpi/acpica/rsaddr.c b/drivers/acpi/acpica/rsaddr.c
index 226c806ae986..9e66f9078426 100644
--- a/drivers/acpi/acpica/rsaddr.c
+++ b/drivers/acpi/acpica/rsaddr.c
@@ -5,7 +5,7 @@
  ******************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/rscalc.c b/drivers/acpi/acpica/rscalc.c
index d6ebf7ec622d..3a8a89ec2ca4 100644
--- a/drivers/acpi/acpica/rscalc.c
+++ b/drivers/acpi/acpica/rscalc.c
@@ -5,7 +5,7 @@
  ******************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/rscreate.c b/drivers/acpi/acpica/rscreate.c
index c80a2eea3a01..4ce6e1147e80 100644
--- a/drivers/acpi/acpica/rscreate.c
+++ b/drivers/acpi/acpica/rscreate.c
@@ -5,7 +5,7 @@
  ******************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/rsdump.c b/drivers/acpi/acpica/rsdump.c
index f859b0386fe4..33db7520c74b 100644
--- a/drivers/acpi/acpica/rsdump.c
+++ b/drivers/acpi/acpica/rsdump.c
@@ -5,7 +5,7 @@
  ******************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/rsinfo.c b/drivers/acpi/acpica/rsinfo.c
index 1fd868b964fd..f9ea60872aa4 100644
--- a/drivers/acpi/acpica/rsinfo.c
+++ b/drivers/acpi/acpica/rsinfo.c
@@ -5,7 +5,7 @@
  ******************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/rsio.c b/drivers/acpi/acpica/rsio.c
index 33bff17c0bbc..0c7efef008be 100644
--- a/drivers/acpi/acpica/rsio.c
+++ b/drivers/acpi/acpica/rsio.c
@@ -5,7 +5,7 @@
  ******************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/rsirq.c b/drivers/acpi/acpica/rsirq.c
index 545da40d7fa7..50b8ad211167 100644
--- a/drivers/acpi/acpica/rsirq.c
+++ b/drivers/acpi/acpica/rsirq.c
@@ -5,7 +5,7 @@
  ******************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/rslist.c b/drivers/acpi/acpica/rslist.c
index 7335f22aac20..1bfcef736c50 100644
--- a/drivers/acpi/acpica/rslist.c
+++ b/drivers/acpi/acpica/rslist.c
@@ -5,7 +5,7 @@
  ******************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/rsmemory.c b/drivers/acpi/acpica/rsmemory.c
index 887b8ba8c432..7cc6d8625f1e 100644
--- a/drivers/acpi/acpica/rsmemory.c
+++ b/drivers/acpi/acpica/rsmemory.c
@@ -5,7 +5,7 @@
  ******************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/rsmisc.c b/drivers/acpi/acpica/rsmisc.c
index f8cd9e87d987..410264b22a29 100644
--- a/drivers/acpi/acpica/rsmisc.c
+++ b/drivers/acpi/acpica/rsmisc.c
@@ -5,7 +5,7 @@
  ******************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/rsutils.c b/drivers/acpi/acpica/rsutils.c
index 491191e6cf69..231811e56939 100644
--- a/drivers/acpi/acpica/rsutils.c
+++ b/drivers/acpi/acpica/rsutils.c
@@ -5,7 +5,7 @@
  ******************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/rsxface.c b/drivers/acpi/acpica/rsxface.c
index 9f6a6e7e1c8e..2ff657a28f26 100644
--- a/drivers/acpi/acpica/rsxface.c
+++ b/drivers/acpi/acpica/rsxface.c
@@ -5,7 +5,7 @@
  ******************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/tbfadt.c b/drivers/acpi/acpica/tbfadt.c
index d2ff4325c427..428d44e2d162 100644
--- a/drivers/acpi/acpica/tbfadt.c
+++ b/drivers/acpi/acpica/tbfadt.c
@@ -5,7 +5,7 @@
  *****************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/tbfind.c b/drivers/acpi/acpica/tbfind.c
index 989d5c867864..a55cb2bb5abb 100644
--- a/drivers/acpi/acpica/tbfind.c
+++ b/drivers/acpi/acpica/tbfind.c
@@ -5,7 +5,7 @@
  *****************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/tbinstal.c b/drivers/acpi/acpica/tbinstal.c
index 83d7af8d0905..48db0944ce4a 100644
--- a/drivers/acpi/acpica/tbinstal.c
+++ b/drivers/acpi/acpica/tbinstal.c
@@ -5,7 +5,7 @@
  *****************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/tbutils.c b/drivers/acpi/acpica/tbutils.c
index 34f9c2bc5e1f..0f2d395feaba 100644
--- a/drivers/acpi/acpica/tbutils.c
+++ b/drivers/acpi/acpica/tbutils.c
@@ -5,7 +5,7 @@
  *****************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/tbxface.c b/drivers/acpi/acpica/tbxface.c
index 4a8b9e6ea57a..4b7085dfc683 100644
--- a/drivers/acpi/acpica/tbxface.c
+++ b/drivers/acpi/acpica/tbxface.c
@@ -6,7 +6,7 @@
  *****************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/tbxfroot.c b/drivers/acpi/acpica/tbxfroot.c
index fd2c07d1d3ac..7eb6c6cc1edf 100644
--- a/drivers/acpi/acpica/tbxfroot.c
+++ b/drivers/acpi/acpica/tbxfroot.c
@@ -5,7 +5,7 @@
  *****************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/utalloc.c b/drivers/acpi/acpica/utalloc.c
index 8f0896281567..0a697351cf69 100644
--- a/drivers/acpi/acpica/utalloc.c
+++ b/drivers/acpi/acpica/utalloc.c
@@ -5,7 +5,7 @@
  *****************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/utcopy.c b/drivers/acpi/acpica/utcopy.c
index 6fef83f04bcd..aded299a2fa8 100644
--- a/drivers/acpi/acpica/utcopy.c
+++ b/drivers/acpi/acpica/utcopy.c
@@ -5,7 +5,7 @@
  *****************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/utdebug.c b/drivers/acpi/acpica/utdebug.c
index f21c486929a5..a9bcd816dc29 100644
--- a/drivers/acpi/acpica/utdebug.c
+++ b/drivers/acpi/acpica/utdebug.c
@@ -5,7 +5,7 @@
  *****************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/utdelete.c b/drivers/acpi/acpica/utdelete.c
index ed794cd033ea..31f5a7832ef1 100644
--- a/drivers/acpi/acpica/utdelete.c
+++ b/drivers/acpi/acpica/utdelete.c
@@ -5,7 +5,7 @@
  ******************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/uteval.c b/drivers/acpi/acpica/uteval.c
index 22f59ef604e0..18f73c9d10bc 100644
--- a/drivers/acpi/acpica/uteval.c
+++ b/drivers/acpi/acpica/uteval.c
@@ -5,7 +5,7 @@
  *****************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/utglobal.c b/drivers/acpi/acpica/utglobal.c
index 508537f884ac..97dd9bbf055a 100644
--- a/drivers/acpi/acpica/utglobal.c
+++ b/drivers/acpi/acpica/utglobal.c
@@ -5,7 +5,7 @@
  *****************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/utids.c b/drivers/acpi/acpica/utids.c
index d2906328535d..b679ea693545 100644
--- a/drivers/acpi/acpica/utids.c
+++ b/drivers/acpi/acpica/utids.c
@@ -5,7 +5,7 @@
  *****************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/utinit.c b/drivers/acpi/acpica/utinit.c
index c1b1c803ea9b..191b6828cce9 100644
--- a/drivers/acpi/acpica/utinit.c
+++ b/drivers/acpi/acpica/utinit.c
@@ -5,7 +5,7 @@
  *****************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/utlock.c b/drivers/acpi/acpica/utlock.c
index b081cd46a15f..f6bb75c6faf5 100644
--- a/drivers/acpi/acpica/utlock.c
+++ b/drivers/acpi/acpica/utlock.c
@@ -5,7 +5,7 @@
  *****************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/utmath.c b/drivers/acpi/acpica/utmath.c
index 49cf7b7fd816..ce481da9bb45 100644
--- a/drivers/acpi/acpica/utmath.c
+++ b/drivers/acpi/acpica/utmath.c
@@ -5,7 +5,7 @@
  ******************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/utmisc.c b/drivers/acpi/acpica/utmisc.c
index c7d0e05ef5a4..c33a852d4f42 100644
--- a/drivers/acpi/acpica/utmisc.c
+++ b/drivers/acpi/acpica/utmisc.c
@@ -5,7 +5,7 @@
  ******************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/utmutex.c b/drivers/acpi/acpica/utmutex.c
index 199528ff7f1d..a946c689f03b 100644
--- a/drivers/acpi/acpica/utmutex.c
+++ b/drivers/acpi/acpica/utmutex.c
@@ -5,7 +5,7 @@
  ******************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/utobject.c b/drivers/acpi/acpica/utobject.c
index fd1fa2749ea5..188340a017b4 100644
--- a/drivers/acpi/acpica/utobject.c
+++ b/drivers/acpi/acpica/utobject.c
@@ -5,7 +5,7 @@
  *****************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/utosi.c b/drivers/acpi/acpica/utosi.c
index 18c59a85fdca..1fb10cb8f11d 100644
--- a/drivers/acpi/acpica/utosi.c
+++ b/drivers/acpi/acpica/utosi.c
@@ -5,7 +5,7 @@
  *****************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/utresrc.c b/drivers/acpi/acpica/utresrc.c
index 7965919000b1..84e051844247 100644
--- a/drivers/acpi/acpica/utresrc.c
+++ b/drivers/acpi/acpica/utresrc.c
@@ -5,7 +5,7 @@
  ******************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/utstate.c b/drivers/acpi/acpica/utstate.c
index d35d109b8da2..30c21e1a9360 100644
--- a/drivers/acpi/acpica/utstate.c
+++ b/drivers/acpi/acpica/utstate.c
@@ -5,7 +5,7 @@
  ******************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/utxface.c b/drivers/acpi/acpica/utxface.c
index 1f484c9a6888..98ad125e14ff 100644
--- a/drivers/acpi/acpica/utxface.c
+++ b/drivers/acpi/acpica/utxface.c
@@ -5,7 +5,7 @@
  *****************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/utxferror.c b/drivers/acpi/acpica/utxferror.c
index 6f12e314fbae..916ae097c43c 100644
--- a/drivers/acpi/acpica/utxferror.c
+++ b/drivers/acpi/acpica/utxferror.c
@@ -5,7 +5,7 @@
  ******************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/battery.c b/drivers/acpi/battery.c
index 68bc227e7c4c..ac1a599f5147 100644
--- a/drivers/acpi/battery.c
+++ b/drivers/acpi/battery.c
@@ -998,7 +998,6 @@ static int acpi_battery_resume(struct acpi_device *device)
         if (!device)
                 return -EINVAL;
         battery = acpi_driver_data(device);
-        acpi_battery_refresh(battery);
         battery->update_time = 0;
         acpi_battery_update(battery);
         return 0;
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index 03e337072517..f6b9baa6a63d 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -928,6 +928,7 @@ static int intel_wrap_ring_buffer(struct intel_ring_buffer *ring)
 
 int intel_wait_ring_buffer(struct intel_ring_buffer *ring, int n)
 {
+        int reread = 0;
         struct drm_device *dev = ring->dev;
         struct drm_i915_private *dev_priv = dev->dev_private;
         unsigned long end;
@@ -940,9 +941,8 @@ int intel_wait_ring_buffer(struct intel_ring_buffer *ring, int n)
                  * fallback to the slow and accurate path.
                  */
                 head = intel_read_status_page(ring, 4);
-                if (head < ring->actual_head)
+                if (reread)
                         head = I915_READ_HEAD(ring);
-                ring->actual_head = head;
                 ring->head = head & HEAD_ADDR;
                 ring->space = ring->head - (ring->tail + 8);
                 if (ring->space < 0)
@@ -961,6 +961,7 @@ int intel_wait_ring_buffer(struct intel_ring_buffer *ring, int n)
                 msleep(1);
                 if (atomic_read(&dev_priv->mm.wedged))
                         return -EAGAIN;
+                reread = 1;
         } while (!time_after(jiffies, end));
         trace_i915_ring_wait_end (dev);
         return -EBUSY;
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
index be9087e4c9be..5b0abfa881fc 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.h
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
@@ -47,7 +47,6 @@ struct  intel_ring_buffer {
         struct          drm_device *dev;
         struct          drm_i915_gem_object *obj;
 
-        u32             actual_head;
         u32             head;
         u32             tail;
         int             space;
diff --git a/drivers/hwmon/Kconfig b/drivers/hwmon/Kconfig
index 35f00dae3676..773e484f1646 100644
--- a/drivers/hwmon/Kconfig
+++ b/drivers/hwmon/Kconfig
@@ -618,8 +618,8 @@ config SENSORS_LM93
         depends on I2C
         select HWMON_VID
         help
-          If you say yes here you get support for National Semiconductor LM93
-          sensor chips.
+          If you say yes here you get support for National Semiconductor LM93,
+          LM94, and compatible sensor chips.
 
           This driver can also be built as a module.  If so, the module
           will be called lm93.
diff --git a/drivers/hwmon/lm93.c b/drivers/hwmon/lm93.c
index c9ed14eba5a6..3b43df418613 100644
--- a/drivers/hwmon/lm93.c
+++ b/drivers/hwmon/lm93.c
@@ -135,6 +135,11 @@
 #define LM93_MFR_ID             0x73
 #define LM93_MFR_ID_PROTOTYPE   0x72
 
+/* LM94 REGISTER VALUES */
+#define LM94_MFR_ID_2           0x7a
+#define LM94_MFR_ID             0x79
+#define LM94_MFR_ID_PROTOTYPE   0x78
+
 /* SMBus capabilities */
 #define LM93_SMBUS_FUNC_FULL (I2C_FUNC_SMBUS_BYTE_DATA | \
                 I2C_FUNC_SMBUS_WORD_DATA | I2C_FUNC_SMBUS_BLOCK_DATA)
@@ -2504,6 +2509,7 @@ static int lm93_detect(struct i2c_client *client, struct i2c_board_info *info)
 {
         struct i2c_adapter *adapter = client->adapter;
         int mfr, ver;
+        const char *name;
 
         if (!i2c_check_functionality(adapter, LM93_SMBUS_FUNC_MIN))
                 return -ENODEV;
@@ -2517,13 +2523,23 @@ static int lm93_detect(struct i2c_client *client, struct i2c_board_info *info)
         }
 
         ver = lm93_read_byte(client, LM93_REG_VER);
-        if (ver != LM93_MFR_ID && ver != LM93_MFR_ID_PROTOTYPE) {
+        switch (ver) {
+        case LM93_MFR_ID:
+        case LM93_MFR_ID_PROTOTYPE:
+                name = "lm93";
+                break;
+        case LM94_MFR_ID_2:
+        case LM94_MFR_ID:
+        case LM94_MFR_ID_PROTOTYPE:
+                name = "lm94";
+                break;
+        default:
                 dev_dbg(&adapter->dev,
                         "detect failed, bad version id 0x%02x!\n", ver);
                 return -ENODEV;
         }
 
-        strlcpy(info->type, "lm93", I2C_NAME_SIZE);
+        strlcpy(info->type, name, I2C_NAME_SIZE);
         dev_dbg(&adapter->dev,"loading %s at %d,0x%02x\n",
                 client->name, i2c_adapter_id(client->adapter),
                 client->addr);
@@ -2602,6 +2618,7 @@ static int lm93_remove(struct i2c_client *client)
 
 static const struct i2c_device_id lm93_id[] = {
         { "lm93", 0 },
+        { "lm94", 0 },
         { }
 };
 MODULE_DEVICE_TABLE(i2c, lm93_id);
diff --git a/drivers/net/bnx2x/bnx2x.h b/drivers/net/bnx2x/bnx2x.h
index a6cd335c9436..8e4183717d91 100644
--- a/drivers/net/bnx2x/bnx2x.h
+++ b/drivers/net/bnx2x/bnx2x.h
@@ -22,8 +22,8 @@
  * (you will need to reboot afterwards) */
 /* #define BNX2X_STOP_ON_ERROR */
 
-#define DRV_MODULE_VERSION      "1.62.00-3"
-#define DRV_MODULE_RELDATE      "2010/12/21"
+#define DRV_MODULE_VERSION      "1.62.00-4"
+#define DRV_MODULE_RELDATE      "2011/01/18"
 #define BNX2X_BC_VER            0x040200
 
 #define BNX2X_MULTI_QUEUE
diff --git a/drivers/net/bnx2x/bnx2x_hsi.h b/drivers/net/bnx2x/bnx2x_hsi.h
index 6238d4f63989..548f5631c0dc 100644
--- a/drivers/net/bnx2x/bnx2x_hsi.h
+++ b/drivers/net/bnx2x/bnx2x_hsi.h
@@ -352,6 +352,10 @@ struct port_hw_cfg {			    /* port 0: 0x12c  port 1: 0x2bc */
 #define PORT_HW_CFG_LANE_SWAP_CFG_31203120          0x0000d8d8
         /* forced only */
 #define PORT_HW_CFG_LANE_SWAP_CFG_32103210          0x0000e4e4
+    /*  Indicate whether to swap the external phy polarity */
+#define PORT_HW_CFG_SWAP_PHY_POLARITY_MASK             0x00010000
+#define PORT_HW_CFG_SWAP_PHY_POLARITY_DISABLED      0x00000000
+#define PORT_HW_CFG_SWAP_PHY_POLARITY_ENABLED       0x00010000
 
         u32 external_phy_config;
 #define PORT_HW_CFG_SERDES_EXT_PHY_TYPE_MASK        0xff000000
diff --git a/drivers/net/bnx2x/bnx2x_link.c b/drivers/net/bnx2x/bnx2x_link.c
index 43b0de24f391..7160ec51093e 100644
--- a/drivers/net/bnx2x/bnx2x_link.c
+++ b/drivers/net/bnx2x/bnx2x_link.c
@@ -1573,7 +1573,7 @@ static void bnx2x_set_aer_mmd_xgxs(struct link_params *params,
 
         offset = phy->addr + ser_lane;
         if (CHIP_IS_E2(bp))
-                aer_val = 0x2800 + offset - 1;
+                aer_val = 0x3800 + offset - 1;
         else
                 aer_val = 0x3800 + offset;
         CL45_WR_OVER_CL22(bp, phy,
@@ -3166,7 +3166,23 @@ u8 bnx2x_set_led(struct link_params *params,
                 if (!vars->link_up)
                         break;
         case LED_MODE_ON:
-                if (SINGLE_MEDIA_DIRECT(params)) {
+                if (params->phy[EXT_PHY1].type ==
+                    PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8727 &&
+                    CHIP_IS_E2(bp) && params->num_phys == 2) {
+                        /**
+                        * This is a work-around for E2+8727 Configurations
+                        */
+                        if (mode == LED_MODE_ON ||
+                                speed == SPEED_10000){
+                                REG_WR(bp, NIG_REG_LED_MODE_P0 + port*4, 0);
+                                REG_WR(bp, NIG_REG_LED_10G_P0 + port*4, 1);
+
+                                tmp = EMAC_RD(bp, EMAC_REG_EMAC_LED);
+                                EMAC_WR(bp, EMAC_REG_EMAC_LED,
+                                        (tmp | EMAC_LED_OVERRIDE));
+                                return rc;
+                        }
+                } else if (SINGLE_MEDIA_DIRECT(params)) {
                         /**
                         * This is a work-around for HW issue found when link
                         * is up in CL73
@@ -3854,11 +3870,14 @@ static void bnx2x_8073_resolve_fc(struct bnx2x_phy *phy,
                            pause_result);
         }
 }
-
-static void bnx2x_8073_8727_external_rom_boot(struct bnx2x *bp,
+static u8 bnx2x_8073_8727_external_rom_boot(struct bnx2x *bp,
                                               struct bnx2x_phy *phy,
                                               u8 port)
 {
+        u32 count = 0;
+        u16 fw_ver1, fw_msgout;
+        u8 rc = 0;
+
         /* Boot port from external ROM  */
         /* EDC grst */
         bnx2x_cl45_write(bp, phy,
@@ -3888,14 +3907,45 @@ static void bnx2x_8073_8727_external_rom_boot(struct bnx2x *bp,
                        MDIO_PMA_REG_GEN_CTRL,
                        MDIO_PMA_REG_GEN_CTRL_ROM_RESET_INTERNAL_MP);
 
-        /* wait for 120ms for code download via SPI port */
-        msleep(120);
+        /* Delay 100ms per the PHY specifications */
+        msleep(100);
+
+        /* 8073 sometimes taking longer to download */
+        do {
+                count++;
+                if (count > 300) {
+                        DP(NETIF_MSG_LINK,
+                                 "bnx2x_8073_8727_external_rom_boot port %x:"
+                                 "Download failed. fw version = 0x%x\n",
+                                 port, fw_ver1);
+                        rc = -EINVAL;
+                        break;
+                }
+
+                bnx2x_cl45_read(bp, phy,
+                                MDIO_PMA_DEVAD,
+                                MDIO_PMA_REG_ROM_VER1, &fw_ver1);
+                bnx2x_cl45_read(bp, phy,
+                                MDIO_PMA_DEVAD,
+                                MDIO_PMA_REG_M8051_MSGOUT_REG, &fw_msgout);
+
+                msleep(1);
+        } while (fw_ver1 == 0 || fw_ver1 == 0x4321 ||
+                        ((fw_msgout & 0xff) != 0x03 && (phy->type ==
+                        PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8073)));
 
         /* Clear ser_boot_ctl bit */
         bnx2x_cl45_write(bp, phy,
                        MDIO_PMA_DEVAD,
                        MDIO_PMA_REG_MISC_CTRL1, 0x0000);
         bnx2x_save_bcm_spirom_ver(bp, phy, port);
+
+        DP(NETIF_MSG_LINK,
+                 "bnx2x_8073_8727_external_rom_boot port %x:"
+                 "Download complete. fw version = 0x%x\n",
+                 port, fw_ver1);
+
+        return rc;
 }
 
 static void bnx2x_8073_set_xaui_low_power_mode(struct bnx2x *bp,
@@ -4108,6 +4158,25 @@ static u8 bnx2x_8073_config_init(struct bnx2x_phy *phy,
 
         DP(NETIF_MSG_LINK, "Before rom RX_ALARM(port1): 0x%x\n", tmp1);
 
+        /**
+         * If this is forced speed, set to KR or KX (all other are not
+         * supported)
+         */
+        /* Swap polarity if required - Must be done only in non-1G mode */
+        if (params->lane_config & PORT_HW_CFG_SWAP_PHY_POLARITY_ENABLED) {
+                /* Configure the 8073 to swap _P and _N of the KR lines */
+                DP(NETIF_MSG_LINK, "Swapping polarity for the 8073\n");
+                /* 10G Rx/Tx and 1G Tx signal polarity swap */
+                bnx2x_cl45_read(bp, phy,
+                                MDIO_PMA_DEVAD,
+                                MDIO_PMA_REG_8073_OPT_DIGITAL_CTRL, &val);
+                bnx2x_cl45_write(bp, phy,
+                                 MDIO_PMA_DEVAD,
+                                 MDIO_PMA_REG_8073_OPT_DIGITAL_CTRL,
+                                 (val | (3<<9)));
+        }
+
+
         /* Enable CL37 BAM */
         if (REG_RD(bp, params->shmem_base +
                          offsetof(struct shmem_region, dev_info.
@@ -4314,8 +4383,32 @@ static u8 bnx2x_8073_read_status(struct bnx2x_phy *phy,
         }
 
         if (link_up) {
+                /* Swap polarity if required */
+                if (params->lane_config &
+                    PORT_HW_CFG_SWAP_PHY_POLARITY_ENABLED) {
+                        /* Configure the 8073 to swap P and N of the KR lines */
+                        bnx2x_cl45_read(bp, phy,
+                                        MDIO_XS_DEVAD,
+                                        MDIO_XS_REG_8073_RX_CTRL_PCIE, &val1);
+                        /**
+                        * Set bit 3 to invert Rx in 1G mode and clear this bit
+                        * when it`s in 10G mode.
+                        */
+                        if (vars->line_speed == SPEED_1000) {
+                                DP(NETIF_MSG_LINK, "Swapping 1G polarity for"
+                                              "the 8073\n");
+                                val1 |= (1<<3);
+                        } else
+                                val1 &= ~(1<<3);
+
+                        bnx2x_cl45_write(bp, phy,
+                                         MDIO_XS_DEVAD,
+                                         MDIO_XS_REG_8073_RX_CTRL_PCIE,
+                                         val1);
+                }
                 bnx2x_ext_phy_10G_an_resolve(bp, phy, vars);
                 bnx2x_8073_resolve_fc(phy, params, vars);
+                vars->duplex = DUPLEX_FULL;
         }
         return link_up;
 }
@@ -5062,6 +5155,7 @@ static u8 bnx2x_8706_8726_read_status(struct bnx2x_phy *phy,
                 else
                         vars->line_speed = SPEED_10000;
                 bnx2x_ext_phy_resolve_fc(phy, params, vars);
+                vars->duplex = DUPLEX_FULL;
         }
         return link_up;
 }
@@ -5758,8 +5852,11 @@ static u8 bnx2x_8727_read_status(struct bnx2x_phy *phy,
                 DP(NETIF_MSG_LINK, "port %x: External link is down\n",
                            params->port);
         }
-        if (link_up)
+        if (link_up) {
                 bnx2x_ext_phy_resolve_fc(phy, params, vars);
+                vars->duplex = DUPLEX_FULL;
+                DP(NETIF_MSG_LINK, "duplex = 0x%x\n", vars->duplex);
+        }
 
         if ((DUAL_MEDIA(params)) &&
             (phy->req_line_speed == SPEED_1000)) {
@@ -5875,10 +5972,26 @@ static void bnx2x_848xx_set_led(struct bnx2x *bp,
                          MDIO_PMA_REG_8481_LED2_MASK,
                          0x18);
 
+        /* Select activity source by Tx and Rx, as suggested by PHY AE */
         bnx2x_cl45_write(bp, phy,
                          MDIO_PMA_DEVAD,
                          MDIO_PMA_REG_8481_LED3_MASK,
-                         0x0040);
+                         0x0006);
+
+        /* Select the closest activity blink rate to that in 10/100/1000 */
+        bnx2x_cl45_write(bp, phy,
+                        MDIO_PMA_DEVAD,
+                        MDIO_PMA_REG_8481_LED3_BLINK,
+                        0);
+
+        bnx2x_cl45_read(bp, phy,
+                        MDIO_PMA_DEVAD,
+                        MDIO_PMA_REG_84823_CTL_LED_CTL_1, &val);
+        val |= MDIO_PMA_REG_84823_LED3_STRETCH_EN; /* stretch_en for LED3*/
+
+        bnx2x_cl45_write(bp, phy,
+                         MDIO_PMA_DEVAD,
+                         MDIO_PMA_REG_84823_CTL_LED_CTL_1, val);
 
         /* 'Interrupt Mask' */
         bnx2x_cl45_write(bp, phy,
@@ -6126,6 +6239,7 @@ static u8 bnx2x_848xx_read_status(struct bnx2x_phy *phy,
         /* Check link 10G */
         if (val2 & (1<<11)) {
                 vars->line_speed = SPEED_10000;
+                vars->duplex = DUPLEX_FULL;
                 link_up = 1;
                 bnx2x_ext_phy_10G_an_resolve(bp, phy, vars);
         } else { /* Check Legacy speed link */
@@ -6489,6 +6603,7 @@ static u8 bnx2x_7101_read_status(struct bnx2x_phy *phy,
                                 MDIO_AN_DEVAD, MDIO_AN_REG_MASTER_STATUS,
                                 &val2);
                 vars->line_speed = SPEED_10000;
+                vars->duplex = DUPLEX_FULL;
                 DP(NETIF_MSG_LINK, "SFX7101 AN status 0x%x->Master=%x\n",
                            val2, (val2 & (1<<14)));
                 bnx2x_ext_phy_10G_an_resolve(bp, phy, vars);
@@ -7663,7 +7778,6 @@ static u8 bnx2x_8073_common_init_phy(struct bnx2x *bp,
 
         /* PART2 - Download firmware to both phys */
         for (port = PORT_MAX - 1; port >= PORT_0; port--) {
-                u16 fw_ver1;
                 if (CHIP_IS_E2(bp))
                         port_of_path = 0;
                 else
@@ -7671,19 +7785,9 @@ static u8 bnx2x_8073_common_init_phy(struct bnx2x *bp,
 
                 DP(NETIF_MSG_LINK, "Loading spirom for phy address 0x%x\n",
                            phy_blk[port]->addr);
-                bnx2x_8073_8727_external_rom_boot(bp, phy_blk[port],
-                                                  port_of_path);
-
-                bnx2x_cl45_read(bp, phy_blk[port],
-                              MDIO_PMA_DEVAD,
-                              MDIO_PMA_REG_ROM_VER1, &fw_ver1);
-                if (fw_ver1 == 0 || fw_ver1 == 0x4321) {
-                        DP(NETIF_MSG_LINK,
-                                 "bnx2x_8073_common_init_phy port %x:"
-                                 "Download failed. fw version = 0x%x\n",
-                                 port, fw_ver1);
+                if (bnx2x_8073_8727_external_rom_boot(bp, phy_blk[port],
+                                                      port_of_path))
                         return -EINVAL;
-                }
 
                 /* Only set bit 10 = 1 (Tx power down) */
                 bnx2x_cl45_read(bp, phy_blk[port],
@@ -7848,27 +7952,17 @@ static u8 bnx2x_8727_common_init_phy(struct bnx2x *bp,
         }
         /* PART2 - Download firmware to both phys */
         for (port = PORT_MAX - 1; port >= PORT_0; port--) {
-                u16 fw_ver1;
                  if (CHIP_IS_E2(bp))
                         port_of_path = 0;
                 else
                         port_of_path = port;
                 DP(NETIF_MSG_LINK, "Loading spirom for phy address 0x%x\n",
                            phy_blk[port]->addr);
-                bnx2x_8073_8727_external_rom_boot(bp, phy_blk[port],
-                                                  port_of_path);
-                bnx2x_cl45_read(bp, phy_blk[port],
-                              MDIO_PMA_DEVAD,
-                              MDIO_PMA_REG_ROM_VER1, &fw_ver1);
-                if (fw_ver1 == 0 || fw_ver1 == 0x4321) {
-                        DP(NETIF_MSG_LINK,
-                                 "bnx2x_8727_common_init_phy port %x:"
-                                 "Download failed. fw version = 0x%x\n",
-                                 port, fw_ver1);
+                if (bnx2x_8073_8727_external_rom_boot(bp, phy_blk[port],
+                                                      port_of_path))
                         return -EINVAL;
-                }
-        }
 
+        }
         return 0;
 }
 
@@ -7916,6 +8010,7 @@ u8 bnx2x_common_init_phy(struct bnx2x *bp, u32 shmem_base_path[],
                          u32 shmem2_base_path[], u32 chip_id)
 {
         u8 rc = 0;
+        u32 phy_ver;
         u8 phy_index;
         u32 ext_phy_type, ext_phy_config;
         DP(NETIF_MSG_LINK, "Begin common phy init\n");
@@ -7923,6 +8018,16 @@ u8 bnx2x_common_init_phy(struct bnx2x *bp, u32 shmem_base_path[],
         if (CHIP_REV_IS_EMUL(bp))
                 return 0;
 
+        /* Check if common init was already done */
+        phy_ver = REG_RD(bp, shmem_base_path[0] +
+                         offsetof(struct shmem_region,
+                                  port_mb[PORT_0].ext_phy_fw_version));
+        if (phy_ver) {
+                DP(NETIF_MSG_LINK, "Not doing common init; phy ver is 0x%x\n",
+                               phy_ver);
+                return 0;
+        }
+
         /* Read the ext_phy_type for arbitrary port(0) */
         for (phy_index = EXT_PHY1; phy_index < MAX_PHYS;
               phy_index++) {
diff --git a/drivers/net/bnx2x/bnx2x_reg.h b/drivers/net/bnx2x/bnx2x_reg.h
index c939683e3d61..e01330bb36c7 100644
--- a/drivers/net/bnx2x/bnx2x_reg.h
+++ b/drivers/net/bnx2x/bnx2x_reg.h
@@ -6194,7 +6194,11 @@ Theotherbitsarereservedandshouldbezero*/
 #define MDIO_CTL_REG_84823_MEDIA_PRIORITY_COPPER        0x0000
 #define MDIO_CTL_REG_84823_MEDIA_PRIORITY_FIBER         0x0100
 #define MDIO_CTL_REG_84823_MEDIA_FIBER_1G                       0x1000
+#define MDIO_CTL_REG_84823_USER_CTRL_REG                0x4005
+#define MDIO_CTL_REG_84823_USER_CTRL_CMS                0x0080
 
+#define MDIO_PMA_REG_84823_CTL_LED_CTL_1                0xa8e3
+#define MDIO_PMA_REG_84823_LED3_STRETCH_EN              0x0080
 
 #define IGU_FUNC_BASE                   0x0400
 
diff --git a/drivers/net/gianfar.c b/drivers/net/gianfar.c
index 119aa2000c24..5ed8f9f9419f 100644
--- a/drivers/net/gianfar.c
+++ b/drivers/net/gianfar.c
@@ -1920,7 +1920,7 @@ int startup_gfar(struct net_device *ndev)
                 if (err) {
                         for (j = 0; j < i; j++)
                                 free_grp_irqs(&priv->gfargrp[j]);
-                                goto irq_fail;
+                        goto irq_fail;
                 }
         }
 
diff --git a/drivers/net/irda/sh_irda.c b/drivers/net/irda/sh_irda.c
index 9e3f4f54281d..4488bd581eca 100644
--- a/drivers/net/irda/sh_irda.c
+++ b/drivers/net/irda/sh_irda.c
@@ -635,7 +635,7 @@ static int sh_irda_hard_xmit(struct sk_buff *skb, struct net_device *ndev)
 
         ret = sh_irda_set_baudrate(self, speed);
         if (ret < 0)
-                return ret;
+                goto sh_irda_hard_xmit_end;
 
         self->tx_buff.len = 0;
         if (skb->len) {
@@ -652,11 +652,21 @@ static int sh_irda_hard_xmit(struct sk_buff *skb, struct net_device *ndev)
 
                 sh_irda_write(self, IRTFLR, self->tx_buff.len);
                 sh_irda_write(self, IRTCTR, ARMOD | TE);
-        }
+        } else
+                goto sh_irda_hard_xmit_end;
 
         dev_kfree_skb(skb);
 
         return 0;
+
+sh_irda_hard_xmit_end:
+        sh_irda_set_baudrate(self, 9600);
+        netif_wake_queue(self->ndev);
+        sh_irda_rcv_ctrl(self, 1);
+        dev_kfree_skb(skb);
+
+        return ret;
+
 }
 
 static int sh_irda_ioctl(struct net_device *ndev, struct ifreq *ifreq, int cmd)
diff --git a/drivers/net/ns83820.c b/drivers/net/ns83820.c
index 84134c766f3a..a41b2cf4d917 100644
--- a/drivers/net/ns83820.c
+++ b/drivers/net/ns83820.c
@@ -1988,12 +1988,11 @@ static int __devinit ns83820_init_one(struct pci_dev *pci_dev,
         }
 
         ndev = alloc_etherdev(sizeof(struct ns83820));
-        dev = PRIV(ndev);
-
         err = -ENOMEM;
-        if (!dev)
+        if (!ndev)
                 goto out;
 
+        dev = PRIV(ndev);
         dev->ndev = ndev;
 
         spin_lock_init(&dev->rx_info.lock);
diff --git a/drivers/net/usb/cdc_ncm.c b/drivers/net/usb/cdc_ncm.c
index d776c4a8d3c1..04e8ce14a1d0 100644
--- a/drivers/net/usb/cdc_ncm.c
+++ b/drivers/net/usb/cdc_ncm.c
@@ -54,7 +54,7 @@
 #include <linux/usb/usbnet.h>
 #include <linux/usb/cdc.h>
 
-#define DRIVER_VERSION                          "30-Nov-2010"
+#define DRIVER_VERSION                          "17-Jan-2011"
 
 /* CDC NCM subclass 3.2.1 */
 #define USB_CDC_NCM_NDP16_LENGTH_MIN            0x10
@@ -868,15 +868,19 @@ static void cdc_ncm_tx_timeout(unsigned long arg)
         if (ctx->tx_timer_pending != 0) {
                 ctx->tx_timer_pending--;
                 restart = 1;
-        } else
+        } else {
                 restart = 0;
+        }
 
         spin_unlock(&ctx->mtx);
 
-        if (restart)
+        if (restart) {
+                spin_lock(&ctx->mtx);
                 cdc_ncm_tx_timeout_start(ctx);
-        else if (ctx->netdev != NULL)
+                spin_unlock(&ctx->mtx);
+        } else if (ctx->netdev != NULL) {
                 usbnet_start_xmit(NULL, ctx->netdev);
+        }
 }
 
 static struct sk_buff *
@@ -900,7 +904,6 @@ cdc_ncm_tx_fixup(struct usbnet *dev, struct sk_buff *skb, gfp_t flags)
         skb_out = cdc_ncm_fill_tx_frame(ctx, skb);
         if (ctx->tx_curr_skb != NULL)
                 need_timer = 1;
-        spin_unlock(&ctx->mtx);
 
         /* Start timer, if there is a remaining skb */
         if (need_timer)
@@ -908,6 +911,8 @@ cdc_ncm_tx_fixup(struct usbnet *dev, struct sk_buff *skb, gfp_t flags)
 
         if (skb_out)
                 dev->net->stats.tx_packets += ctx->tx_curr_frame_num;
+
+        spin_unlock(&ctx->mtx);
         return skb_out;
 
 error:
@@ -1020,8 +1025,8 @@ static int cdc_ncm_rx_fixup(struct usbnet *dev, struct sk_buff *skb_in)
                 if (((offset + temp) > actlen) ||
                     (temp > CDC_NCM_MAX_DATAGRAM_SIZE) || (temp < ETH_HLEN)) {
                         pr_debug("invalid frame detected (ignored)"
-                                "offset[%u]=%u, length=%u, skb=%p\n",
-                                                        x, offset, temp, skb_in);
+                                        "offset[%u]=%u, length=%u, skb=%p\n",
+                                        x, offset, temp, skb_in);
                         if (!x)
                                 goto error;
                         break;
diff --git a/drivers/net/vmxnet3/vmxnet3_drv.c b/drivers/net/vmxnet3/vmxnet3_drv.c
index d143e8b72b5b..cc14b4a75048 100644
--- a/drivers/net/vmxnet3/vmxnet3_drv.c
+++ b/drivers/net/vmxnet3/vmxnet3_drv.c
@@ -48,6 +48,9 @@ static atomic_t devices_found;
 static int enable_mq = 1;
 static int irq_share_mode;
 
+static void
+vmxnet3_write_mac_addr(struct vmxnet3_adapter *adapter, u8 *mac);
+
 /*
  *    Enable/Disable the given intr
  */
@@ -139,9 +142,13 @@ vmxnet3_check_link(struct vmxnet3_adapter *adapter, bool affectTxQueue)
 {
         u32 ret;
         int i;
+        unsigned long flags;
 
+        spin_lock_irqsave(&adapter->cmd_lock, flags);
         VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, VMXNET3_CMD_GET_LINK);
         ret = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_CMD);
+        spin_unlock_irqrestore(&adapter->cmd_lock, flags);
+
         adapter->link_speed = ret >> 16;
         if (ret & 1) { /* Link is up. */
                 printk(KERN_INFO "%s: NIC Link is Up %d Mbps\n",
@@ -183,8 +190,10 @@ vmxnet3_process_events(struct vmxnet3_adapter *adapter)
 
         /* Check if there is an error on xmit/recv queues */
         if (events & (VMXNET3_ECR_TQERR | VMXNET3_ECR_RQERR)) {
+                spin_lock(&adapter->cmd_lock);
                 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
                                        VMXNET3_CMD_GET_QUEUE_STATUS);
+                spin_unlock(&adapter->cmd_lock);
 
                 for (i = 0; i < adapter->num_tx_queues; i++)
                         if (adapter->tqd_start[i].status.stopped)
@@ -804,30 +813,25 @@ vmxnet3_parse_and_copy_hdr(struct sk_buff *skb, struct vmxnet3_tx_queue *tq,
                                    skb_transport_header(skb))->doff * 4;
                 ctx->copy_size = ctx->eth_ip_hdr_size + ctx->l4_hdr_size;
         } else {
-                unsigned int pull_size;
-
                 if (skb->ip_summed == CHECKSUM_PARTIAL) {
                         ctx->eth_ip_hdr_size = skb_checksum_start_offset(skb);
 
                         if (ctx->ipv4) {
                                 struct iphdr *iph = (struct iphdr *)
                                                     skb_network_header(skb);
-                                if (iph->protocol == IPPROTO_TCP) {
-                                        pull_size = ctx->eth_ip_hdr_size +
-                                                    sizeof(struct tcphdr);
-
-                                        if (unlikely(!pskb_may_pull(skb,
-                                                                pull_size))) {
-                                                goto err;
-                                        }
+                                if (iph->protocol == IPPROTO_TCP)
                                         ctx->l4_hdr_size = ((struct tcphdr *)
                                            skb_transport_header(skb))->doff * 4;
-                                } else if (iph->protocol == IPPROTO_UDP) {
+                                else if (iph->protocol == IPPROTO_UDP)
+                                        /*
+                                         * Use tcp header size so that bytes to
+                                         * be copied are more than required by
+                                         * the device.
+                                         */
                                         ctx->l4_hdr_size =
-                                                        sizeof(struct udphdr);
-                                } else {
+                                                        sizeof(struct tcphdr);
+                                else
                                         ctx->l4_hdr_size = 0;
-                                }
                         } else {
                                 /* for simplicity, don't copy L4 headers */
                                 ctx->l4_hdr_size = 0;
@@ -1859,18 +1863,14 @@ vmxnet3_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
         struct vmxnet3_adapter *adapter = netdev_priv(netdev);
         struct Vmxnet3_DriverShared *shared = adapter->shared;
         u32 *vfTable = adapter->shared->devRead.rxFilterConf.vfTable;
+        unsigned long flags;
 
         if (grp) {
                 /* add vlan rx stripping. */
                 if (adapter->netdev->features & NETIF_F_HW_VLAN_RX) {
                         int i;
-                        struct Vmxnet3_DSDevRead *devRead = &shared->devRead;
                         adapter->vlan_grp = grp;
 
-                        /* update FEATURES to device */
-                        devRead->misc.uptFeatures |= UPT1_F_RXVLAN;
-                        VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
-                                               VMXNET3_CMD_UPDATE_FEATURE);
                         /*
                          *  Clear entire vfTable; then enable untagged pkts.
                          *  Note: setting one entry in vfTable to non-zero turns
@@ -1880,8 +1880,10 @@ vmxnet3_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
                                 vfTable[i] = 0;
 
                         VMXNET3_SET_VFTABLE_ENTRY(vfTable, 0);
+                        spin_lock_irqsave(&adapter->cmd_lock, flags);
                         VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
                                                VMXNET3_CMD_UPDATE_VLAN_FILTERS);
+                        spin_unlock_irqrestore(&adapter->cmd_lock, flags);
                 } else {
                         printk(KERN_ERR "%s: vlan_rx_register when device has "
                                "no NETIF_F_HW_VLAN_RX\n", netdev->name);
@@ -1900,13 +1902,10 @@ vmxnet3_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
                                  */
                                 vfTable[i] = 0;
                         }
+                        spin_lock_irqsave(&adapter->cmd_lock, flags);
                         VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
                                                VMXNET3_CMD_UPDATE_VLAN_FILTERS);
-
-                        /* update FEATURES to device */
-                        devRead->misc.uptFeatures &= ~UPT1_F_RXVLAN;
-                        VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
-                                               VMXNET3_CMD_UPDATE_FEATURE);
+                        spin_unlock_irqrestore(&adapter->cmd_lock, flags);
                 }
         }
 }
@@ -1939,10 +1938,13 @@ vmxnet3_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
 {
         struct vmxnet3_adapter *adapter = netdev_priv(netdev);
         u32 *vfTable = adapter->shared->devRead.rxFilterConf.vfTable;
+        unsigned long flags;
 
         VMXNET3_SET_VFTABLE_ENTRY(vfTable, vid);
+        spin_lock_irqsave(&adapter->cmd_lock, flags);
         VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
                                VMXNET3_CMD_UPDATE_VLAN_FILTERS);
+        spin_unlock_irqrestore(&adapter->cmd_lock, flags);
 }
 
 
@@ -1951,10 +1953,13 @@ vmxnet3_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
 {
         struct vmxnet3_adapter *adapter = netdev_priv(netdev);
         u32 *vfTable = adapter->shared->devRead.rxFilterConf.vfTable;
+        unsigned long flags;
 
         VMXNET3_CLEAR_VFTABLE_ENTRY(vfTable, vid);
+        spin_lock_irqsave(&adapter->cmd_lock, flags);
         VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
                                VMXNET3_CMD_UPDATE_VLAN_FILTERS);
+        spin_unlock_irqrestore(&adapter->cmd_lock, flags);
 }
 
 
@@ -1985,6 +1990,7 @@ static void
 vmxnet3_set_mc(struct net_device *netdev)
 {
         struct vmxnet3_adapter *adapter = netdev_priv(netdev);
+        unsigned long flags;
         struct Vmxnet3_RxFilterConf *rxConf =
                                         &adapter->shared->devRead.rxFilterConf;
         u8 *new_table = NULL;
@@ -2020,6 +2026,7 @@ vmxnet3_set_mc(struct net_device *netdev)
                 rxConf->mfTablePA = 0;
         }
 
+        spin_lock_irqsave(&adapter->cmd_lock, flags);
         if (new_mode != rxConf->rxMode) {
                 rxConf->rxMode = cpu_to_le32(new_mode);
                 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
@@ -2028,6 +2035,7 @@ vmxnet3_set_mc(struct net_device *netdev)
 
         VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
                                VMXNET3_CMD_UPDATE_MAC_FILTERS);
+        spin_unlock_irqrestore(&adapter->cmd_lock, flags);
 
         kfree(new_table);
 }
@@ -2080,10 +2088,8 @@ vmxnet3_setup_driver_shared(struct vmxnet3_adapter *adapter)
                 devRead->misc.uptFeatures |= UPT1_F_LRO;
                 devRead->misc.maxNumRxSG = cpu_to_le16(1 + MAX_SKB_FRAGS);
         }
-        if ((adapter->netdev->features & NETIF_F_HW_VLAN_RX) &&
-            adapter->vlan_grp) {
+        if (adapter->netdev->features & NETIF_F_HW_VLAN_RX)
                 devRead->misc.uptFeatures |= UPT1_F_RXVLAN;
-        }
 
         devRead->misc.mtu = cpu_to_le32(adapter->netdev->mtu);
         devRead->misc.queueDescPA = cpu_to_le64(adapter->queue_desc_pa);
@@ -2168,6 +2174,8 @@ vmxnet3_setup_driver_shared(struct vmxnet3_adapter *adapter)
         /* rx filter settings */
         devRead->rxFilterConf.rxMode = 0;
         vmxnet3_restore_vlan(adapter);
+        vmxnet3_write_mac_addr(adapter, adapter->netdev->dev_addr);
+
         /* the rest are already zeroed */
 }
 
@@ -2177,6 +2185,7 @@ vmxnet3_activate_dev(struct vmxnet3_adapter *adapter)
 {
         int err, i;
         u32 ret;
+        unsigned long flags;
 
         dev_dbg(&adapter->netdev->dev, "%s: skb_buf_size %d, rx_buf_per_pkt %d,"
                 " ring sizes %u %u %u\n", adapter->netdev->name,
@@ -2206,9 +2215,11 @@ vmxnet3_activate_dev(struct vmxnet3_adapter *adapter)
                                adapter->shared_pa));
         VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_DSAH, VMXNET3_GET_ADDR_HI(
                                adapter->shared_pa));
+        spin_lock_irqsave(&adapter->cmd_lock, flags);
         VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
                                VMXNET3_CMD_ACTIVATE_DEV);
         ret = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_CMD);
+        spin_unlock_irqrestore(&adapter->cmd_lock, flags);
 
         if (ret != 0) {
                 printk(KERN_ERR "Failed to activate dev %s: error %u\n",
@@ -2255,7 +2266,10 @@ rq_err:
 void
 vmxnet3_reset_dev(struct vmxnet3_adapter *adapter)
 {
+        unsigned long flags;
+        spin_lock_irqsave(&adapter->cmd_lock, flags);
         VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, VMXNET3_CMD_RESET_DEV);
+        spin_unlock_irqrestore(&adapter->cmd_lock, flags);
 }
 
 
@@ -2263,12 +2277,15 @@ int
 vmxnet3_quiesce_dev(struct vmxnet3_adapter *adapter)
 {
         int i;
+        unsigned long flags;
         if (test_and_set_bit(VMXNET3_STATE_BIT_QUIESCED, &adapter->state))
                 return 0;
 
 
+        spin_lock_irqsave(&adapter->cmd_lock, flags);
         VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
                                VMXNET3_CMD_QUIESCE_DEV);
+        spin_unlock_irqrestore(&adapter->cmd_lock, flags);
         vmxnet3_disable_all_intrs(adapter);
 
         for (i = 0; i < adapter->num_rx_queues; i++)
@@ -2426,7 +2443,7 @@ vmxnet3_adjust_rx_ring_size(struct vmxnet3_adapter *adapter)
         sz = adapter->rx_buf_per_pkt * VMXNET3_RING_SIZE_ALIGN;
         ring0_size = adapter->rx_queue[0].rx_ring[0].size;
         ring0_size = (ring0_size + sz - 1) / sz * sz;
-        ring0_size = min_t(u32, rq->rx_ring[0].size, VMXNET3_RX_RING_MAX_SIZE /
+        ring0_size = min_t(u32, ring0_size, VMXNET3_RX_RING_MAX_SIZE /
                            sz * sz);
         ring1_size = adapter->rx_queue[0].rx_ring[1].size;
         comp_size = ring0_size + ring1_size;
@@ -2695,7 +2712,7 @@ vmxnet3_acquire_msix_vectors(struct vmxnet3_adapter *adapter,
                         break;
                 } else {
                         /* If fails to enable required number of MSI-x vectors
-                         * try enabling 3 of them. One each for rx, tx and event
+                         * try enabling minimum number of vectors required.
                          */
                         vectors = vector_threshold;
                         printk(KERN_ERR "Failed to enable %d MSI-X for %s, try"
@@ -2718,9 +2735,11 @@ vmxnet3_alloc_intr_resources(struct vmxnet3_adapter *adapter)
         u32 cfg;
 
         /* intr settings */
+        spin_lock(&adapter->cmd_lock);
         VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
                                VMXNET3_CMD_GET_CONF_INTR);
         cfg = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_CMD);
+        spin_unlock(&adapter->cmd_lock);
         adapter->intr.type = cfg & 0x3;
         adapter->intr.mask_mode = (cfg >> 2) & 0x3;
 
@@ -2755,7 +2774,7 @@ vmxnet3_alloc_intr_resources(struct vmxnet3_adapter *adapter)
                  */
                 if (err == VMXNET3_LINUX_MIN_MSIX_VECT) {
                         if (adapter->share_intr != VMXNET3_INTR_BUDDYSHARE
-                            || adapter->num_rx_queues != 2) {
+                            || adapter->num_rx_queues != 1) {
                                 adapter->share_intr = VMXNET3_INTR_TXSHARE;
                                 printk(KERN_ERR "Number of rx queues : 1\n");
                                 adapter->num_rx_queues = 1;
@@ -2905,6 +2924,7 @@ vmxnet3_probe_device(struct pci_dev *pdev,
         adapter->netdev = netdev;
         adapter->pdev = pdev;
 
+        spin_lock_init(&adapter->cmd_lock);
         adapter->shared = pci_alloc_consistent(adapter->pdev,
                           sizeof(struct Vmxnet3_DriverShared),
                           &adapter->shared_pa);
@@ -3108,11 +3128,15 @@ vmxnet3_suspend(struct device *device)
         u8 *arpreq;
         struct in_device *in_dev;
         struct in_ifaddr *ifa;
+        unsigned long flags;
         int i = 0;
 
         if (!netif_running(netdev))
                 return 0;
 
+        for (i = 0; i < adapter->num_rx_queues; i++)
+                napi_disable(&adapter->rx_queue[i].napi);
+
         vmxnet3_disable_all_intrs(adapter);
         vmxnet3_free_irqs(adapter);
         vmxnet3_free_intr_resources(adapter);
@@ -3188,8 +3212,10 @@ skip_arp:
         adapter->shared->devRead.pmConfDesc.confPA = cpu_to_le64(virt_to_phys(
                                                                  pmConf));
 
+        spin_lock_irqsave(&adapter->cmd_lock, flags);
         VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
                                VMXNET3_CMD_UPDATE_PMCFG);
+        spin_unlock_irqrestore(&adapter->cmd_lock, flags);
 
         pci_save_state(pdev);
         pci_enable_wake(pdev, pci_choose_state(pdev, PMSG_SUSPEND),
@@ -3204,7 +3230,8 @@ skip_arp:
 static int
 vmxnet3_resume(struct device *device)
 {
-        int err;
+        int err, i = 0;
+        unsigned long flags;
         struct pci_dev *pdev = to_pci_dev(device);
         struct net_device *netdev = pci_get_drvdata(pdev);
         struct vmxnet3_adapter *adapter = netdev_priv(netdev);
@@ -3232,10 +3259,14 @@ vmxnet3_resume(struct device *device)
 
         pci_enable_wake(pdev, PCI_D0, 0);
 
+        spin_lock_irqsave(&adapter->cmd_lock, flags);
         VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
                                VMXNET3_CMD_UPDATE_PMCFG);
+        spin_unlock_irqrestore(&adapter->cmd_lock, flags);
         vmxnet3_alloc_intr_resources(adapter);
         vmxnet3_request_irqs(adapter);
+        for (i = 0; i < adapter->num_rx_queues; i++)
+                napi_enable(&adapter->rx_queue[i].napi);
         vmxnet3_enable_all_intrs(adapter);
 
         return 0;
diff --git a/drivers/net/vmxnet3/vmxnet3_ethtool.c b/drivers/net/vmxnet3/vmxnet3_ethtool.c
index 8e17fc8a7fe7..81254be85b92 100644
--- a/drivers/net/vmxnet3/vmxnet3_ethtool.c
+++ b/drivers/net/vmxnet3/vmxnet3_ethtool.c
@@ -45,6 +45,7 @@ static int
 vmxnet3_set_rx_csum(struct net_device *netdev, u32 val)
 {
         struct vmxnet3_adapter *adapter = netdev_priv(netdev);
+        unsigned long flags;
 
         if (adapter->rxcsum != val) {
                 adapter->rxcsum = val;
@@ -56,8 +57,10 @@ vmxnet3_set_rx_csum(struct net_device *netdev, u32 val)
                                 adapter->shared->devRead.misc.uptFeatures &=
                                 ~UPT1_F_RXCSUM;
 
+                        spin_lock_irqsave(&adapter->cmd_lock, flags);
                         VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
                                                VMXNET3_CMD_UPDATE_FEATURE);
+                        spin_unlock_irqrestore(&adapter->cmd_lock, flags);
                 }
         }
         return 0;
@@ -68,76 +71,78 @@ vmxnet3_set_rx_csum(struct net_device *netdev, u32 val)
 static const struct vmxnet3_stat_desc
 vmxnet3_tq_dev_stats[] = {
         /* description,         offset */
-        { "TSO pkts tx",        offsetof(struct UPT1_TxStats, TSOPktsTxOK) },
-        { "TSO bytes tx",       offsetof(struct UPT1_TxStats, TSOBytesTxOK) },
-        { "ucast pkts tx",      offsetof(struct UPT1_TxStats, ucastPktsTxOK) },
-        { "ucast bytes tx",     offsetof(struct UPT1_TxStats, ucastBytesTxOK) },
-        { "mcast pkts tx",      offsetof(struct UPT1_TxStats, mcastPktsTxOK) },
-        { "mcast bytes tx",     offsetof(struct UPT1_TxStats, mcastBytesTxOK) },
-        { "bcast pkts tx",      offsetof(struct UPT1_TxStats, bcastPktsTxOK) },
-        { "bcast bytes tx",     offsetof(struct UPT1_TxStats, bcastBytesTxOK) },
-        { "pkts tx err",        offsetof(struct UPT1_TxStats, pktsTxError) },
-        { "pkts tx discard",    offsetof(struct UPT1_TxStats, pktsTxDiscard) },
+        { "Tx Queue#",        0 },
+        { "  TSO pkts tx",      offsetof(struct UPT1_TxStats, TSOPktsTxOK) },
+        { "  TSO bytes tx",     offsetof(struct UPT1_TxStats, TSOBytesTxOK) },
+        { "  ucast pkts tx",    offsetof(struct UPT1_TxStats, ucastPktsTxOK) },
+        { "  ucast bytes tx",   offsetof(struct UPT1_TxStats, ucastBytesTxOK) },
+        { "  mcast pkts tx",    offsetof(struct UPT1_TxStats, mcastPktsTxOK) },
+        { "  mcast bytes tx",   offsetof(struct UPT1_TxStats, mcastBytesTxOK) },
+        { "  bcast pkts tx",    offsetof(struct UPT1_TxStats, bcastPktsTxOK) },
+        { "  bcast bytes tx",   offsetof(struct UPT1_TxStats, bcastBytesTxOK) },
+        { "  pkts tx err",      offsetof(struct UPT1_TxStats, pktsTxError) },
+        { "  pkts tx discard",  offsetof(struct UPT1_TxStats, pktsTxDiscard) },
 };
 
 /* per tq stats maintained by the driver */
 static const struct vmxnet3_stat_desc
 vmxnet3_tq_driver_stats[] = {
         /* description,         offset */
-        {"drv dropped tx total", offsetof(struct vmxnet3_tq_driver_stats,
-                                        drop_total) },
-        { "   too many frags",  offsetof(struct vmxnet3_tq_driver_stats,
-                                        drop_too_many_frags) },
-        { "   giant hdr",       offsetof(struct vmxnet3_tq_driver_stats,
-                                        drop_oversized_hdr) },
-        { "   hdr err",         offsetof(struct vmxnet3_tq_driver_stats,
-                                        drop_hdr_inspect_err) },
-        { "   tso",             offsetof(struct vmxnet3_tq_driver_stats,
-                                        drop_tso) },
-        { "ring full",          offsetof(struct vmxnet3_tq_driver_stats,
-                                        tx_ring_full) },
-        { "pkts linearized",    offsetof(struct vmxnet3_tq_driver_stats,
-                                        linearized) },
-        { "hdr cloned",         offsetof(struct vmxnet3_tq_driver_stats,
-                                        copy_skb_header) },
-        { "giant hdr",          offsetof(struct vmxnet3_tq_driver_stats,
-                                        oversized_hdr) },
+        {"  drv dropped tx total",      offsetof(struct vmxnet3_tq_driver_stats,
+                                                 drop_total) },
+        { "     too many frags", offsetof(struct vmxnet3_tq_driver_stats,
+                                          drop_too_many_frags) },
+        { "     giant hdr",     offsetof(struct vmxnet3_tq_driver_stats,
+                                         drop_oversized_hdr) },
+        { "     hdr err",       offsetof(struct vmxnet3_tq_driver_stats,
+                                         drop_hdr_inspect_err) },
+        { "     tso",           offsetof(struct vmxnet3_tq_driver_stats,
+                                         drop_tso) },
+        { "  ring full",        offsetof(struct vmxnet3_tq_driver_stats,
+                                         tx_ring_full) },
+        { "  pkts linearized",  offsetof(struct vmxnet3_tq_driver_stats,
+                                         linearized) },
+        { "  hdr cloned",       offsetof(struct vmxnet3_tq_driver_stats,
+                                         copy_skb_header) },
+        { "  giant hdr",        offsetof(struct vmxnet3_tq_driver_stats,
+                                         oversized_hdr) },
 };
 
 /* per rq stats maintained by the device */
 static const struct vmxnet3_stat_desc
 vmxnet3_rq_dev_stats[] = {
-        { "LRO pkts rx",        offsetof(struct UPT1_RxStats, LROPktsRxOK) },
-        { "LRO byte rx",        offsetof(struct UPT1_RxStats, LROBytesRxOK) },
-        { "ucast pkts rx",      offsetof(struct UPT1_RxStats, ucastPktsRxOK) },
-        { "ucast bytes rx",     offsetof(struct UPT1_RxStats, ucastBytesRxOK) },
-        { "mcast pkts rx",      offsetof(struct UPT1_RxStats, mcastPktsRxOK) },
-        { "mcast bytes rx",     offsetof(struct UPT1_RxStats, mcastBytesRxOK) },
-        { "bcast pkts rx",      offsetof(struct UPT1_RxStats, bcastPktsRxOK) },
-        { "bcast bytes rx",     offsetof(struct UPT1_RxStats, bcastBytesRxOK) },
-        { "pkts rx out of buf", offsetof(struct UPT1_RxStats, pktsRxOutOfBuf) },
-        { "pkts rx err",        offsetof(struct UPT1_RxStats, pktsRxError) },
+        { "Rx Queue#",        0 },
+        { "  LRO pkts rx",      offsetof(struct UPT1_RxStats, LROPktsRxOK) },
+        { "  LRO byte rx",      offsetof(struct UPT1_RxStats, LROBytesRxOK) },
+        { "  ucast pkts rx",    offsetof(struct UPT1_RxStats, ucastPktsRxOK) },
+        { "  ucast bytes rx",   offsetof(struct UPT1_RxStats, ucastBytesRxOK) },
+        { "  mcast pkts rx",    offsetof(struct UPT1_RxStats, mcastPktsRxOK) },
+        { "  mcast bytes rx",   offsetof(struct UPT1_RxStats, mcastBytesRxOK) },
+        { "  bcast pkts rx",    offsetof(struct UPT1_RxStats, bcastPktsRxOK) },
+        { "  bcast bytes rx",   offsetof(struct UPT1_RxStats, bcastBytesRxOK) },
+        { "  pkts rx OOB",      offsetof(struct UPT1_RxStats, pktsRxOutOfBuf) },
+        { "  pkts rx err",      offsetof(struct UPT1_RxStats, pktsRxError) },
 };
 
 /* per rq stats maintained by the driver */
 static const struct vmxnet3_stat_desc
 vmxnet3_rq_driver_stats[] = {
         /* description,         offset */
-        { "drv dropped rx total", offsetof(struct vmxnet3_rq_driver_stats,
-                                           drop_total) },
-        { "   err",            offsetof(struct vmxnet3_rq_driver_stats,
-                                        drop_err) },
-        { "   fcs",            offsetof(struct vmxnet3_rq_driver_stats,
-                                        drop_fcs) },
-        { "rx buf alloc fail", offsetof(struct vmxnet3_rq_driver_stats,
-                                        rx_buf_alloc_failure) },
+        { "  drv dropped rx total", offsetof(struct vmxnet3_rq_driver_stats,
+                                             drop_total) },
+        { "     err",           offsetof(struct vmxnet3_rq_driver_stats,
+                                         drop_err) },
+        { "     fcs",           offsetof(struct vmxnet3_rq_driver_stats,
+                                         drop_fcs) },
+        { "  rx buf alloc fail", offsetof(struct vmxnet3_rq_driver_stats,
+                                          rx_buf_alloc_failure) },
 };
 
 /* gloabl stats maintained by the driver */
 static const struct vmxnet3_stat_desc
 vmxnet3_global_stats[] = {
         /* description,         offset */
-        { "tx timeout count",   offsetof(struct vmxnet3_adapter,
+        { "tx timeout count",   offsetof(struct vmxnet3_adapter,
                                          tx_timeout_count) }
 };
 
@@ -151,12 +156,15 @@ vmxnet3_get_stats(struct net_device *netdev)
         struct UPT1_TxStats *devTxStats;
         struct UPT1_RxStats *devRxStats;
         struct net_device_stats *net_stats = &netdev->stats;
+        unsigned long flags;
         int i;
 
         adapter = netdev_priv(netdev);
 
         /* Collect the dev stats into the shared area */
+        spin_lock_irqsave(&adapter->cmd_lock, flags);
         VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, VMXNET3_CMD_GET_STATS);
+        spin_unlock_irqrestore(&adapter->cmd_lock, flags);
 
         memset(net_stats, 0, sizeof(*net_stats));
         for (i = 0; i < adapter->num_tx_queues; i++) {
@@ -193,12 +201,15 @@ vmxnet3_get_stats(struct net_device *netdev)
 static int
 vmxnet3_get_sset_count(struct net_device *netdev, int sset)
 {
+        struct vmxnet3_adapter *adapter = netdev_priv(netdev);
         switch (sset) {
         case ETH_SS_STATS:
-                return ARRAY_SIZE(vmxnet3_tq_dev_stats) +
-                        ARRAY_SIZE(vmxnet3_tq_driver_stats) +
-                        ARRAY_SIZE(vmxnet3_rq_dev_stats) +
-                        ARRAY_SIZE(vmxnet3_rq_driver_stats) +
+                return (ARRAY_SIZE(vmxnet3_tq_dev_stats) +
+                        ARRAY_SIZE(vmxnet3_tq_driver_stats)) *
+                       adapter->num_tx_queues +
+                       (ARRAY_SIZE(vmxnet3_rq_dev_stats) +
+                        ARRAY_SIZE(vmxnet3_rq_driver_stats)) *
+                       adapter->num_rx_queues +
                         ARRAY_SIZE(vmxnet3_global_stats);
         default:
                 return -EOPNOTSUPP;
@@ -206,10 +217,16 @@ vmxnet3_get_sset_count(struct net_device *netdev, int sset)
 }
 
 
+/* Should be multiple of 4 */
+#define NUM_TX_REGS     8
+#define NUM_RX_REGS     12
+
 static int
 vmxnet3_get_regs_len(struct net_device *netdev)
 {
-        return 20 * sizeof(u32);
+        struct vmxnet3_adapter *adapter = netdev_priv(netdev);
+        return (adapter->num_tx_queues * NUM_TX_REGS * sizeof(u32) +
+                adapter->num_rx_queues * NUM_RX_REGS * sizeof(u32));
 }
 
 
@@ -240,29 +257,37 @@ vmxnet3_get_drvinfo(struct net_device *netdev, struct ethtool_drvinfo *drvinfo)
 static void
 vmxnet3_get_strings(struct net_device *netdev, u32 stringset, u8 *buf)
 {
+         struct vmxnet3_adapter *adapter = netdev_priv(netdev);
         if (stringset == ETH_SS_STATS) {
-                int i;
-
-                for (i = 0; i < ARRAY_SIZE(vmxnet3_tq_dev_stats); i++) {
-                        memcpy(buf, vmxnet3_tq_dev_stats[i].desc,
-                               ETH_GSTRING_LEN);
-                        buf += ETH_GSTRING_LEN;
-                }
-                for (i = 0; i < ARRAY_SIZE(vmxnet3_tq_driver_stats); i++) {
-                        memcpy(buf, vmxnet3_tq_driver_stats[i].desc,
-                               ETH_GSTRING_LEN);
-                        buf += ETH_GSTRING_LEN;
-                }
-                for (i = 0; i < ARRAY_SIZE(vmxnet3_rq_dev_stats); i++) {
-                        memcpy(buf, vmxnet3_rq_dev_stats[i].desc,
-                               ETH_GSTRING_LEN);
-                        buf += ETH_GSTRING_LEN;
+                int i, j;
+                for (j = 0; j < adapter->num_tx_queues; j++) {
+                        for (i = 0; i < ARRAY_SIZE(vmxnet3_tq_dev_stats); i++) {
+                                memcpy(buf, vmxnet3_tq_dev_stats[i].desc,
+                                       ETH_GSTRING_LEN);
+                                buf += ETH_GSTRING_LEN;
+                        }
+                        for (i = 0; i < ARRAY_SIZE(vmxnet3_tq_driver_stats);
+                             i++) {
+                                memcpy(buf, vmxnet3_tq_driver_stats[i].desc,
+                                       ETH_GSTRING_LEN);
+                                buf += ETH_GSTRING_LEN;
+                        }
                 }
-                for (i = 0; i < ARRAY_SIZE(vmxnet3_rq_driver_stats); i++) {
-                        memcpy(buf, vmxnet3_rq_driver_stats[i].desc,
-                               ETH_GSTRING_LEN);
-                        buf += ETH_GSTRING_LEN;
+
+                for (j = 0; j < adapter->num_rx_queues; j++) {
+                        for (i = 0; i < ARRAY_SIZE(vmxnet3_rq_dev_stats); i++) {
+                                memcpy(buf, vmxnet3_rq_dev_stats[i].desc,
+                                       ETH_GSTRING_LEN);
+                                buf += ETH_GSTRING_LEN;
+                        }
+                        for (i = 0; i < ARRAY_SIZE(vmxnet3_rq_driver_stats);
+                             i++) {
+                                memcpy(buf, vmxnet3_rq_driver_stats[i].desc,
+                                       ETH_GSTRING_LEN);
+                                buf += ETH_GSTRING_LEN;
+                        }
                 }
+
                 for (i = 0; i < ARRAY_SIZE(vmxnet3_global_stats); i++) {
                         memcpy(buf, vmxnet3_global_stats[i].desc,
                                 ETH_GSTRING_LEN);
@@ -277,6 +302,7 @@ vmxnet3_set_flags(struct net_device *netdev, u32 data)
         struct vmxnet3_adapter *adapter = netdev_priv(netdev);
         u8 lro_requested = (data & ETH_FLAG_LRO) == 0 ? 0 : 1;
         u8 lro_present = (netdev->features & NETIF_F_LRO) == 0 ? 0 : 1;
+        unsigned long flags;
 
         if (data & ~ETH_FLAG_LRO)
                 return -EOPNOTSUPP;
@@ -292,8 +318,10 @@ vmxnet3_set_flags(struct net_device *netdev, u32 data)
                 else
                         adapter->shared->devRead.misc.uptFeatures &=
                                                         ~UPT1_F_LRO;
+                spin_lock_irqsave(&adapter->cmd_lock, flags);
                 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
                                        VMXNET3_CMD_UPDATE_FEATURE);
+                spin_unlock_irqrestore(&adapter->cmd_lock, flags);
         }
         return 0;
 }
@@ -303,30 +331,41 @@ vmxnet3_get_ethtool_stats(struct net_device *netdev,
                           struct ethtool_stats *stats, u64  *buf)
 {
         struct vmxnet3_adapter *adapter = netdev_priv(netdev);
+        unsigned long flags;
         u8 *base;
         int i;
         int j = 0;
 
+        spin_lock_irqsave(&adapter->cmd_lock, flags);
         VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, VMXNET3_CMD_GET_STATS);
+        spin_unlock_irqrestore(&adapter->cmd_lock, flags);
 
         /* this does assume each counter is 64-bit wide */
-/* TODO change this for multiple queues */
-
-        base = (u8 *)&adapter->tqd_start[j].stats;
-        for (i = 0; i < ARRAY_SIZE(vmxnet3_tq_dev_stats); i++)
-                *buf++ = *(u64 *)(base + vmxnet3_tq_dev_stats[i].offset);
-
-        base = (u8 *)&adapter->tx_queue[j].stats;
-        for (i = 0; i < ARRAY_SIZE(vmxnet3_tq_driver_stats); i++)
-                *buf++ = *(u64 *)(base + vmxnet3_tq_driver_stats[i].offset);
-
-        base = (u8 *)&adapter->rqd_start[j].stats;
-        for (i = 0; i < ARRAY_SIZE(vmxnet3_rq_dev_stats); i++)
-                *buf++ = *(u64 *)(base + vmxnet3_rq_dev_stats[i].offset);
+        for (j = 0; j < adapter->num_tx_queues; j++) {
+                base = (u8 *)&adapter->tqd_start[j].stats;
+                *buf++ = (u64)j;
+                for (i = 1; i < ARRAY_SIZE(vmxnet3_tq_dev_stats); i++)
+                        *buf++ = *(u64 *)(base +
+                                          vmxnet3_tq_dev_stats[i].offset);
+
+                base = (u8 *)&adapter->tx_queue[j].stats;
+                for (i = 0; i < ARRAY_SIZE(vmxnet3_tq_driver_stats); i++)
+                        *buf++ = *(u64 *)(base +
+                                          vmxnet3_tq_driver_stats[i].offset);
+        }
 
-        base = (u8 *)&adapter->rx_queue[j].stats;
-        for (i = 0; i < ARRAY_SIZE(vmxnet3_rq_driver_stats); i++)
-                *buf++ = *(u64 *)(base + vmxnet3_rq_driver_stats[i].offset);
+        for (j = 0; j < adapter->num_tx_queues; j++) {
+                base = (u8 *)&adapter->rqd_start[j].stats;
+                *buf++ = (u64) j;
+                for (i = 1; i < ARRAY_SIZE(vmxnet3_rq_dev_stats); i++)
+                        *buf++ = *(u64 *)(base +
+                                          vmxnet3_rq_dev_stats[i].offset);
+
+                base = (u8 *)&adapter->rx_queue[j].stats;
+                for (i = 0; i < ARRAY_SIZE(vmxnet3_rq_driver_stats); i++)
+                        *buf++ = *(u64 *)(base +
+                                          vmxnet3_rq_driver_stats[i].offset);
+        }
 
         base = (u8 *)adapter;
         for (i = 0; i < ARRAY_SIZE(vmxnet3_global_stats); i++)
@@ -339,7 +378,7 @@ vmxnet3_get_regs(struct net_device *netdev, struct ethtool_regs *regs, void *p)
 {
         struct vmxnet3_adapter *adapter = netdev_priv(netdev);
         u32 *buf = p;
-        int i = 0;
+        int i = 0, j = 0;
 
         memset(p, 0, vmxnet3_get_regs_len(netdev));
 
@@ -348,31 +387,35 @@ vmxnet3_get_regs(struct net_device *netdev, struct ethtool_regs *regs, void *p)
         /* Update vmxnet3_get_regs_len if we want to dump more registers */
 
         /* make each ring use multiple of 16 bytes */
-/* TODO change this for multiple queues */
-        buf[0] = adapter->tx_queue[i].tx_ring.next2fill;
-        buf[1] = adapter->tx_queue[i].tx_ring.next2comp;
-        buf[2] = adapter->tx_queue[i].tx_ring.gen;
-        buf[3] = 0;
-
-        buf[4] = adapter->tx_queue[i].comp_ring.next2proc;
-        buf[5] = adapter->tx_queue[i].comp_ring.gen;
-        buf[6] = adapter->tx_queue[i].stopped;
-        buf[7] = 0;
-
-        buf[8] = adapter->rx_queue[i].rx_ring[0].next2fill;
-        buf[9] = adapter->rx_queue[i].rx_ring[0].next2comp;
-        buf[10] = adapter->rx_queue[i].rx_ring[0].gen;
-        buf[11] = 0;
-
-        buf[12] = adapter->rx_queue[i].rx_ring[1].next2fill;
-        buf[13] = adapter->rx_queue[i].rx_ring[1].next2comp;
-        buf[14] = adapter->rx_queue[i].rx_ring[1].gen;
-        buf[15] = 0;
-
-        buf[16] = adapter->rx_queue[i].comp_ring.next2proc;
-        buf[17] = adapter->rx_queue[i].comp_ring.gen;
-        buf[18] = 0;
-        buf[19] = 0;
+        for (i = 0; i < adapter->num_tx_queues; i++) {
+                buf[j++] = adapter->tx_queue[i].tx_ring.next2fill;
+                buf[j++] = adapter->tx_queue[i].tx_ring.next2comp;
+                buf[j++] = adapter->tx_queue[i].tx_ring.gen;
+                buf[j++] = 0;
+
+                buf[j++] = adapter->tx_queue[i].comp_ring.next2proc;
+                buf[j++] = adapter->tx_queue[i].comp_ring.gen;
+                buf[j++] = adapter->tx_queue[i].stopped;
+                buf[j++] = 0;
+        }
+
+        for (i = 0; i < adapter->num_rx_queues; i++) {
+                buf[j++] = adapter->rx_queue[i].rx_ring[0].next2fill;
+                buf[j++] = adapter->rx_queue[i].rx_ring[0].next2comp;
+                buf[j++] = adapter->rx_queue[i].rx_ring[0].gen;
+                buf[j++] = 0;
+
+                buf[j++] = adapter->rx_queue[i].rx_ring[1].next2fill;
+                buf[j++] = adapter->rx_queue[i].rx_ring[1].next2comp;
+                buf[j++] = adapter->rx_queue[i].rx_ring[1].gen;
+                buf[j++] = 0;
+
+                buf[j++] = adapter->rx_queue[i].comp_ring.next2proc;
+                buf[j++] = adapter->rx_queue[i].comp_ring.gen;
+                buf[j++] = 0;
+                buf[j++] = 0;
+        }
+
 }
 
 
@@ -574,6 +617,7 @@ vmxnet3_set_rss_indir(struct net_device *netdev,
                       const struct ethtool_rxfh_indir *p)
 {
         unsigned int i;
+        unsigned long flags;
         struct vmxnet3_adapter *adapter = netdev_priv(netdev);
         struct UPT1_RSSConf *rssConf = adapter->rss_conf;
 
@@ -592,8 +636,10 @@ vmxnet3_set_rss_indir(struct net_device *netdev,
         for (i = 0; i < rssConf->indTableSize; i++)
                 rssConf->indTable[i] = p->ring_index[i];
 
+        spin_lock_irqsave(&adapter->cmd_lock, flags);
         VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
                                VMXNET3_CMD_UPDATE_RSSIDT);
+        spin_unlock_irqrestore(&adapter->cmd_lock, flags);
 
         return 0;
 
diff --git a/drivers/net/vmxnet3/vmxnet3_int.h b/drivers/net/vmxnet3/vmxnet3_int.h
index 7fadeed37f03..fb5d245ac878 100644
--- a/drivers/net/vmxnet3/vmxnet3_int.h
+++ b/drivers/net/vmxnet3/vmxnet3_int.h
@@ -68,10 +68,10 @@
 /*
  * Version numbers
  */
-#define VMXNET3_DRIVER_VERSION_STRING   "1.0.16.0-k"
+#define VMXNET3_DRIVER_VERSION_STRING   "1.0.25.0-k"
 
 /* a 32-bit int, each byte encode a verion number in VMXNET3_DRIVER_VERSION */
-#define VMXNET3_DRIVER_VERSION_NUM      0x01001000
+#define VMXNET3_DRIVER_VERSION_NUM      0x01001900
 
 #if defined(CONFIG_PCI_MSI)
         /* RSS only makes sense if MSI-X is supported. */
@@ -289,7 +289,7 @@ struct vmxnet3_rx_queue {
 
 #define VMXNET3_LINUX_MAX_MSIX_VECT     (VMXNET3_DEVICE_MAX_TX_QUEUES + \
                                          VMXNET3_DEVICE_MAX_RX_QUEUES + 1)
-#define VMXNET3_LINUX_MIN_MSIX_VECT     3    /* 1 for each : tx, rx and event */
+#define VMXNET3_LINUX_MIN_MSIX_VECT     2 /* 1 for tx-rx pair and 1 for event */
 
 
 struct vmxnet3_intr {
@@ -317,6 +317,7 @@ struct vmxnet3_adapter {
         struct vmxnet3_rx_queue         rx_queue[VMXNET3_DEVICE_MAX_RX_QUEUES];
         struct vlan_group               *vlan_grp;
         struct vmxnet3_intr             intr;
+        spinlock_t                      cmd_lock;
         struct Vmxnet3_DriverShared     *shared;
         struct Vmxnet3_PMConf           *pm_conf;
         struct Vmxnet3_TxQueueDesc      *tqd_start;     /* all tx queue desc */
diff --git a/drivers/net/wireless/ath/ath5k/base.c b/drivers/net/wireless/ath/ath5k/base.c
index 019a74d533a6..09ae4ef0fd51 100644
--- a/drivers/net/wireless/ath/ath5k/base.c
+++ b/drivers/net/wireless/ath/ath5k/base.c
@@ -2294,6 +2294,8 @@ ath5k_tx_complete_poll_work(struct work_struct *work)
         int i;
         bool needreset = false;
 
+        mutex_lock(&sc->lock);
+
         for (i = 0; i < ARRAY_SIZE(sc->txqs); i++) {
                 if (sc->txqs[i].setup) {
                         txq = &sc->txqs[i];
@@ -2321,6 +2323,8 @@ ath5k_tx_complete_poll_work(struct work_struct *work)
                 ath5k_reset(sc, NULL, true);
         }
 
+        mutex_unlock(&sc->lock);
+
         ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work,
                 msecs_to_jiffies(ATH5K_TX_COMPLETE_POLL_INT));
 }
diff --git a/drivers/net/wireless/ath/ath9k/ar9002_calib.c b/drivers/net/wireless/ath/ath9k/ar9002_calib.c
index ea2e7d714bda..5e300bd3d264 100644
--- a/drivers/net/wireless/ath/ath9k/ar9002_calib.c
+++ b/drivers/net/wireless/ath/ath9k/ar9002_calib.c
@@ -679,10 +679,6 @@ static bool ar9002_hw_calibrate(struct ath_hw *ah,
 
         /* Do NF cal only at longer intervals */
         if (longcal || nfcal_pending) {
-                /* Do periodic PAOffset Cal */
-                ar9002_hw_pa_cal(ah, false);
-                ar9002_hw_olc_temp_compensation(ah);
-
                 /*
                  * Get the value from the previous NF cal and update
                  * history buffer.
@@ -697,8 +693,12 @@ static bool ar9002_hw_calibrate(struct ath_hw *ah,
                         ath9k_hw_loadnf(ah, ah->curchan);
                 }
 
-                if (longcal)
+                if (longcal) {
                         ath9k_hw_start_nfcal(ah, false);
+                        /* Do periodic PAOffset Cal */
+                        ar9002_hw_pa_cal(ah, false);
+                        ar9002_hw_olc_temp_compensation(ah);
+                }
         }
 
         return iscaldone;
diff --git a/drivers/net/wireless/ath/ath9k/ar9003_2p2_initvals.h b/drivers/net/wireless/ath/ath9k/ar9003_2p2_initvals.h
index 81f9cf294dec..9ecca93392e8 100644
--- a/drivers/net/wireless/ath/ath9k/ar9003_2p2_initvals.h
+++ b/drivers/net/wireless/ath/ath9k/ar9003_2p2_initvals.h
@@ -1842,7 +1842,7 @@ static const u32 ar9300_2p2_soc_preamble[][2] = {
 
 static const u32 ar9300PciePhy_pll_on_clkreq_disable_L1_2p2[][2] = {
         /* Addr      allmodes  */
-        {0x00004040, 0x08212e5e},
+        {0x00004040, 0x0821265e},
         {0x00004040, 0x0008003b},
         {0x00004044, 0x00000000},
 };
diff --git a/drivers/net/wireless/ath/ath9k/ar9003_hw.c b/drivers/net/wireless/ath/ath9k/ar9003_hw.c
index 6137634e46ca..06fb2c850535 100644
--- a/drivers/net/wireless/ath/ath9k/ar9003_hw.c
+++ b/drivers/net/wireless/ath/ath9k/ar9003_hw.c
@@ -146,8 +146,8 @@ static void ar9003_hw_init_mode_regs(struct ath_hw *ah)
                 /* Sleep Setting */
 
                 INIT_INI_ARRAY(&ah->iniPcieSerdesLowPower,
-                                ar9300PciePhy_clkreq_enable_L1_2p2,
-                                ARRAY_SIZE(ar9300PciePhy_clkreq_enable_L1_2p2),
+                                ar9300PciePhy_pll_on_clkreq_disable_L1_2p2,
+                                ARRAY_SIZE(ar9300PciePhy_pll_on_clkreq_disable_L1_2p2),
                                 2);
 
                 /* Fast clock modal settings */
diff --git a/drivers/net/wireless/ath/ath9k/htc.h b/drivers/net/wireless/ath/ath9k/htc.h
index 1ce506f23110..780ac5eac501 100644
--- a/drivers/net/wireless/ath/ath9k/htc.h
+++ b/drivers/net/wireless/ath/ath9k/htc.h
@@ -78,7 +78,7 @@ struct tx_frame_hdr {
         u8 node_idx;
         u8 vif_idx;
         u8 tidno;
-        u32 flags; /* ATH9K_HTC_TX_* */
+        __be32 flags; /* ATH9K_HTC_TX_* */
         u8 key_type;
         u8 keyix;
         u8 reserved[26];
diff --git a/drivers/net/wireless/ath/ath9k/htc_drv_txrx.c b/drivers/net/wireless/ath/ath9k/htc_drv_txrx.c
index 33f36029fa4f..7a5ffca21958 100644
--- a/drivers/net/wireless/ath/ath9k/htc_drv_txrx.c
+++ b/drivers/net/wireless/ath/ath9k/htc_drv_txrx.c
@@ -113,6 +113,7 @@ int ath9k_htc_tx_start(struct ath9k_htc_priv *priv, struct sk_buff *skb)
 
         if (ieee80211_is_data(fc)) {
                 struct tx_frame_hdr tx_hdr;
+                u32 flags = 0;
                 u8 *qc;
 
                 memset(&tx_hdr, 0, sizeof(struct tx_frame_hdr));
@@ -136,13 +137,14 @@ int ath9k_htc_tx_start(struct ath9k_htc_priv *priv, struct sk_buff *skb)
                 /* Check for RTS protection */
                 if (priv->hw->wiphy->rts_threshold != (u32) -1)
                         if (skb->len > priv->hw->wiphy->rts_threshold)
-                                tx_hdr.flags |= ATH9K_HTC_TX_RTSCTS;
+                                flags |= ATH9K_HTC_TX_RTSCTS;
 
                 /* CTS-to-self */
-                if (!(tx_hdr.flags & ATH9K_HTC_TX_RTSCTS) &&
+                if (!(flags & ATH9K_HTC_TX_RTSCTS) &&
                     (priv->op_flags & OP_PROTECT_ENABLE))
-                        tx_hdr.flags |= ATH9K_HTC_TX_CTSONLY;
+                        flags |= ATH9K_HTC_TX_CTSONLY;
 
+                tx_hdr.flags = cpu_to_be32(flags);
                 tx_hdr.key_type = ath9k_cmn_get_hw_crypto_keytype(skb);
                 if (tx_hdr.key_type == ATH9K_KEY_TYPE_CLEAR)
                         tx_hdr.keyix = (u8) ATH9K_TXKEYIX_INVALID;
diff --git a/drivers/net/wireless/iwlwifi/iwl-agn-eeprom.c b/drivers/net/wireless/iwlwifi/iwl-agn-eeprom.c
index 97906dd442e6..14ceb4df72f6 100644
--- a/drivers/net/wireless/iwlwifi/iwl-agn-eeprom.c
+++ b/drivers/net/wireless/iwlwifi/iwl-agn-eeprom.c
@@ -168,7 +168,7 @@ int iwl_eeprom_check_sku(struct iwl_priv *priv)
                 /* not using .cfg overwrite */
                 radio_cfg = iwl_eeprom_query16(priv, EEPROM_RADIO_CONFIG);
                 priv->cfg->valid_tx_ant = EEPROM_RF_CFG_TX_ANT_MSK(radio_cfg);
-                priv->cfg->valid_rx_ant = EEPROM_RF_CFG_TX_ANT_MSK(radio_cfg);
+                priv->cfg->valid_rx_ant = EEPROM_RF_CFG_RX_ANT_MSK(radio_cfg);
                 if (!priv->cfg->valid_tx_ant || !priv->cfg->valid_rx_ant) {
                         IWL_ERR(priv, "Invalid chain (0X%x, 0X%x)\n",
                                 priv->cfg->valid_tx_ant,
diff --git a/drivers/net/wireless/iwmc3200wifi/netdev.c b/drivers/net/wireless/iwmc3200wifi/netdev.c
index 13a69ebf2a94..5091d77e02ce 100644
--- a/drivers/net/wireless/iwmc3200wifi/netdev.c
+++ b/drivers/net/wireless/iwmc3200wifi/netdev.c
@@ -126,6 +126,7 @@ void *iwm_if_alloc(int sizeof_bus, struct device *dev,
         ndev = alloc_netdev_mq(0, "wlan%d", ether_setup, IWM_TX_QUEUES);
         if (!ndev) {
                 dev_err(dev, "no memory for network device instance\n");
+                ret = -ENOMEM;
                 goto out_priv;
         }
 
@@ -138,6 +139,7 @@ void *iwm_if_alloc(int sizeof_bus, struct device *dev,
                                     GFP_KERNEL);
         if (!iwm->umac_profile) {
                 dev_err(dev, "Couldn't alloc memory for profile\n");
+                ret = -ENOMEM;
                 goto out_profile;
         }
 
diff --git a/drivers/net/wireless/rt2x00/rt2x00firmware.c b/drivers/net/wireless/rt2x00/rt2x00firmware.c
index f0e1eb72befc..be0ff78c1b16 100644
--- a/drivers/net/wireless/rt2x00/rt2x00firmware.c
+++ b/drivers/net/wireless/rt2x00/rt2x00firmware.c
@@ -58,6 +58,7 @@ static int rt2x00lib_request_firmware(struct rt2x00_dev *rt2x00dev)
 
         if (!fw || !fw->size || !fw->data) {
                 ERROR(rt2x00dev, "Failed to read Firmware.\n");
+                release_firmware(fw);
                 return -ENOENT;
         }
 
diff --git a/drivers/s390/net/qeth_l2_main.c b/drivers/s390/net/qeth_l2_main.c
index 7a7a1b664781..2ac8f6aff5a4 100644
--- a/drivers/s390/net/qeth_l2_main.c
+++ b/drivers/s390/net/qeth_l2_main.c
@@ -831,12 +831,14 @@ tx_drop:
         return NETDEV_TX_OK;
 }
 
-static int qeth_l2_open(struct net_device *dev)
+static int __qeth_l2_open(struct net_device *dev)
 {
         struct qeth_card *card = dev->ml_priv;
         int rc = 0;
 
         QETH_CARD_TEXT(card, 4, "qethopen");
+        if (card->state == CARD_STATE_UP)
+                return rc;
         if (card->state != CARD_STATE_SOFTSETUP)
                 return -ENODEV;
 
@@ -857,6 +859,18 @@ static int qeth_l2_open(struct net_device *dev)
         return rc;
 }
 
+static int qeth_l2_open(struct net_device *dev)
+{
+        struct qeth_card *card = dev->ml_priv;
+
+        QETH_CARD_TEXT(card, 5, "qethope_");
+        if (qeth_wait_for_threads(card, QETH_RECOVER_THREAD)) {
+                QETH_CARD_TEXT(card, 3, "openREC");
+                return -ERESTARTSYS;
+        }
+        return __qeth_l2_open(dev);
+}
+
 static int qeth_l2_stop(struct net_device *dev)
 {
         struct qeth_card *card = dev->ml_priv;
@@ -1046,7 +1060,7 @@ contin:
         if (recover_flag == CARD_STATE_RECOVER) {
                 if (recovery_mode &&
                     card->info.type != QETH_CARD_TYPE_OSN) {
-                        qeth_l2_open(card->dev);
+                        __qeth_l2_open(card->dev);
                 } else {
                         rtnl_lock();
                         dev_open(card->dev);
diff --git a/drivers/s390/net/qeth_l3_main.c b/drivers/s390/net/qeth_l3_main.c
index e227e465bfc4..d09b0c44fc3d 100644
--- a/drivers/s390/net/qeth_l3_main.c
+++ b/drivers/s390/net/qeth_l3_main.c
@@ -2998,7 +2998,9 @@ static inline void qeth_l3_hdr_csum(struct qeth_card *card,
          */
         if (iph->protocol == IPPROTO_UDP)
                 hdr->hdr.l3.ext_flags |= QETH_HDR_EXT_UDP;
-        hdr->hdr.l3.ext_flags |= QETH_HDR_EXT_CSUM_TRANSP_REQ;
+        hdr->hdr.l3.ext_flags |= QETH_HDR_EXT_CSUM_TRANSP_REQ |
+                QETH_HDR_EXT_CSUM_HDR_REQ;
+        iph->check = 0;
         if (card->options.performance_stats)
                 card->perf_stats.tx_csum++;
 }
@@ -3240,12 +3242,14 @@ tx_drop:
         return NETDEV_TX_OK;
 }
 
-static int qeth_l3_open(struct net_device *dev)
+static int __qeth_l3_open(struct net_device *dev)
 {
         struct qeth_card *card = dev->ml_priv;
         int rc = 0;
 
         QETH_CARD_TEXT(card, 4, "qethopen");
+        if (card->state == CARD_STATE_UP)
+                return rc;
         if (card->state != CARD_STATE_SOFTSETUP)
                 return -ENODEV;
         card->data.state = CH_STATE_UP;
@@ -3260,6 +3264,18 @@ static int qeth_l3_open(struct net_device *dev)
         return rc;
 }
 
+static int qeth_l3_open(struct net_device *dev)
+{
+        struct qeth_card *card = dev->ml_priv;
+
+        QETH_CARD_TEXT(card, 5, "qethope_");
+        if (qeth_wait_for_threads(card, QETH_RECOVER_THREAD)) {
+                QETH_CARD_TEXT(card, 3, "openREC");
+                return -ERESTARTSYS;
+        }
+        return __qeth_l3_open(dev);
+}
+
 static int qeth_l3_stop(struct net_device *dev)
 {
         struct qeth_card *card = dev->ml_priv;
@@ -3564,7 +3580,7 @@ contin:
                 netif_carrier_off(card->dev);
         if (recover_flag == CARD_STATE_RECOVER) {
                 if (recovery_mode)
-                        qeth_l3_open(card->dev);
+                        __qeth_l3_open(card->dev);
                 else {
                         rtnl_lock();
                         dev_open(card->dev);
diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
index 13bfa9d48082..bb233a9cbad2 100644
--- a/drivers/spi/Kconfig
+++ b/drivers/spi/Kconfig
@@ -53,6 +53,14 @@ if SPI_MASTER
 
 comment "SPI Master Controller Drivers"
 
+config SPI_ATH79
+        tristate "Atheros AR71XX/AR724X/AR913X SPI controller driver"
+        depends on ATH79 && GENERIC_GPIO
+        select SPI_BITBANG
+        help
+          This enables support for the SPI controller present on the
+          Atheros AR71XX/AR724X/AR913X SoCs.
+
 config SPI_ATMEL
         tristate "Atmel SPI Controller"
         depends on (ARCH_AT91 || AVR32)
diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile
index 3a42463c92a4..86d1b5f9bbd9 100644
--- a/drivers/spi/Makefile
+++ b/drivers/spi/Makefile
@@ -10,6 +10,7 @@ obj-$(CONFIG_SPI_MASTER)		+= spi.o
 
 # SPI master controller drivers (bus)
 obj-$(CONFIG_SPI_ATMEL)                 += atmel_spi.o
+obj-$(CONFIG_SPI_ATH79)                 += ath79_spi.o
 obj-$(CONFIG_SPI_BFIN)                  += spi_bfin5xx.o
 obj-$(CONFIG_SPI_BITBANG)               += spi_bitbang.o
 obj-$(CONFIG_SPI_AU1550)                += au1550_spi.o
diff --git a/drivers/spi/ath79_spi.c b/drivers/spi/ath79_spi.c
new file mode 100644
index 000000000000..fcff810ea3b0
--- /dev/null
+++ b/drivers/spi/ath79_spi.c
@@ -0,0 +1,292 @@
+/*
+ * SPI controller driver for the Atheros AR71XX/AR724X/AR913X SoCs
+ *
+ * Copyright (C) 2009-2011 Gabor Juhos <juhosg@openwrt.org>
+ *
+ * This driver has been based on the spi-gpio.c:
+ *      Copyright (C) 2006,2008 David Brownell
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/delay.h>
+#include <linux/spinlock.h>
+#include <linux/workqueue.h>
+#include <linux/platform_device.h>
+#include <linux/io.h>
+#include <linux/spi/spi.h>
+#include <linux/spi/spi_bitbang.h>
+#include <linux/bitops.h>
+#include <linux/gpio.h>
+
+#include <asm/mach-ath79/ar71xx_regs.h>
+#include <asm/mach-ath79/ath79_spi_platform.h>
+
+#define DRV_NAME        "ath79-spi"
+
+struct ath79_spi {
+        struct spi_bitbang      bitbang;
+        u32                     ioc_base;
+        u32                     reg_ctrl;
+        void __iomem            *base;
+};
+
+static inline u32 ath79_spi_rr(struct ath79_spi *sp, unsigned reg)
+{
+        return ioread32(sp->base + reg);
+}
+
+static inline void ath79_spi_wr(struct ath79_spi *sp, unsigned reg, u32 val)
+{
+        iowrite32(val, sp->base + reg);
+}
+
+static inline struct ath79_spi *ath79_spidev_to_sp(struct spi_device *spi)
+{
+        return spi_master_get_devdata(spi->master);
+}
+
+static void ath79_spi_chipselect(struct spi_device *spi, int is_active)
+{
+        struct ath79_spi *sp = ath79_spidev_to_sp(spi);
+        int cs_high = (spi->mode & SPI_CS_HIGH) ? is_active : !is_active;
+
+        if (is_active) {
+                /* set initial clock polarity */
+                if (spi->mode & SPI_CPOL)
+                        sp->ioc_base |= AR71XX_SPI_IOC_CLK;
+                else
+                        sp->ioc_base &= ~AR71XX_SPI_IOC_CLK;
+
+                ath79_spi_wr(sp, AR71XX_SPI_REG_IOC, sp->ioc_base);
+        }
+
+        if (spi->chip_select) {
+                struct ath79_spi_controller_data *cdata = spi->controller_data;
+
+                /* SPI is normally active-low */
+                gpio_set_value(cdata->gpio, cs_high);
+        } else {
+                if (cs_high)
+                        sp->ioc_base |= AR71XX_SPI_IOC_CS0;
+                else
+                        sp->ioc_base &= ~AR71XX_SPI_IOC_CS0;
+
+                ath79_spi_wr(sp, AR71XX_SPI_REG_IOC, sp->ioc_base);
+        }
+
+}
+
+static int ath79_spi_setup_cs(struct spi_device *spi)
+{
+        struct ath79_spi *sp = ath79_spidev_to_sp(spi);
+        struct ath79_spi_controller_data *cdata;
+
+        cdata = spi->controller_data;
+        if (spi->chip_select && !cdata)
+                return -EINVAL;
+
+        /* enable GPIO mode */
+        ath79_spi_wr(sp, AR71XX_SPI_REG_FS, AR71XX_SPI_FS_GPIO);
+
+        /* save CTRL register */
+        sp->reg_ctrl = ath79_spi_rr(sp, AR71XX_SPI_REG_CTRL);
+        sp->ioc_base = ath79_spi_rr(sp, AR71XX_SPI_REG_IOC);
+
+        /* TODO: setup speed? */
+        ath79_spi_wr(sp, AR71XX_SPI_REG_CTRL, 0x43);
+
+        if (spi->chip_select) {
+                int status = 0;
+
+                status = gpio_request(cdata->gpio, dev_name(&spi->dev));
+                if (status)
+                        return status;
+
+                status = gpio_direction_output(cdata->gpio,
+                                               spi->mode & SPI_CS_HIGH);
+                if (status) {
+                        gpio_free(cdata->gpio);
+                        return status;
+                }
+        } else {
+                if (spi->mode & SPI_CS_HIGH)
+                        sp->ioc_base |= AR71XX_SPI_IOC_CS0;
+                else
+                        sp->ioc_base &= ~AR71XX_SPI_IOC_CS0;
+                ath79_spi_wr(sp, AR71XX_SPI_REG_IOC, sp->ioc_base);
+        }
+
+        return 0;
+}
+
+static void ath79_spi_cleanup_cs(struct spi_device *spi)
+{
+        struct ath79_spi *sp = ath79_spidev_to_sp(spi);
+
+        if (spi->chip_select) {
+                struct ath79_spi_controller_data *cdata = spi->controller_data;
+                gpio_free(cdata->gpio);
+        }
+
+        /* restore CTRL register */
+        ath79_spi_wr(sp, AR71XX_SPI_REG_CTRL, sp->reg_ctrl);
+        /* disable GPIO mode */
+        ath79_spi_wr(sp, AR71XX_SPI_REG_FS, 0);
+}
+
+static int ath79_spi_setup(struct spi_device *spi)
+{
+        int status = 0;
+
+        if (spi->bits_per_word > 32)
+                return -EINVAL;
+
+        if (!spi->controller_state) {
+                status = ath79_spi_setup_cs(spi);
+                if (status)
+                        return status;
+        }
+
+        status = spi_bitbang_setup(spi);
+        if (status && !spi->controller_state)
+                ath79_spi_cleanup_cs(spi);
+
+        return status;
+}
+
+static void ath79_spi_cleanup(struct spi_device *spi)
+{
+        ath79_spi_cleanup_cs(spi);
+        spi_bitbang_cleanup(spi);
+}
+
+static u32 ath79_spi_txrx_mode0(struct spi_device *spi, unsigned nsecs,
+                               u32 word, u8 bits)
+{
+        struct ath79_spi *sp = ath79_spidev_to_sp(spi);
+        u32 ioc = sp->ioc_base;
+
+        /* clock starts at inactive polarity */
+        for (word <<= (32 - bits); likely(bits); bits--) {
+                u32 out;
+
+                if (word & (1 << 31))
+                        out = ioc | AR71XX_SPI_IOC_DO;
+                else
+                        out = ioc & ~AR71XX_SPI_IOC_DO;
+
+                /* setup MSB (to slave) on trailing edge */
+                ath79_spi_wr(sp, AR71XX_SPI_REG_IOC, out);
+                ath79_spi_wr(sp, AR71XX_SPI_REG_IOC, out | AR71XX_SPI_IOC_CLK);
+
+                word <<= 1;
+        }
+
+        return ath79_spi_rr(sp, AR71XX_SPI_REG_RDS);
+}
+
+static __devinit int ath79_spi_probe(struct platform_device *pdev)
+{
+        struct spi_master *master;
+        struct ath79_spi *sp;
+        struct ath79_spi_platform_data *pdata;
+        struct resource *r;
+        int ret;
+
+        master = spi_alloc_master(&pdev->dev, sizeof(*sp));
+        if (master == NULL) {
+                dev_err(&pdev->dev, "failed to allocate spi master\n");
+                return -ENOMEM;
+        }
+
+        sp = spi_master_get_devdata(master);
+        platform_set_drvdata(pdev, sp);
+
+        pdata = pdev->dev.platform_data;
+
+        master->setup = ath79_spi_setup;
+        master->cleanup = ath79_spi_cleanup;
+        if (pdata) {
+                master->bus_num = pdata->bus_num;
+                master->num_chipselect = pdata->num_chipselect;
+        } else {
+                master->bus_num = -1;
+                master->num_chipselect = 1;
+        }
+
+        sp->bitbang.master = spi_master_get(master);
+        sp->bitbang.chipselect = ath79_spi_chipselect;
+        sp->bitbang.txrx_word[SPI_MODE_0] = ath79_spi_txrx_mode0;
+        sp->bitbang.setup_transfer = spi_bitbang_setup_transfer;
+        sp->bitbang.flags = SPI_CS_HIGH;
+
+        r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+        if (r == NULL) {
+                ret = -ENOENT;
+                goto err_put_master;
+        }
+
+        sp->base = ioremap(r->start, r->end - r->start + 1);
+        if (!sp->base) {
+                ret = -ENXIO;
+                goto err_put_master;
+        }
+
+        ret = spi_bitbang_start(&sp->bitbang);
+        if (ret)
+                goto err_unmap;
+
+        return 0;
+
+err_unmap:
+        iounmap(sp->base);
+err_put_master:
+        platform_set_drvdata(pdev, NULL);
+        spi_master_put(sp->bitbang.master);
+
+        return ret;
+}
+
+static __devexit int ath79_spi_remove(struct platform_device *pdev)
+{
+        struct ath79_spi *sp = platform_get_drvdata(pdev);
+
+        spi_bitbang_stop(&sp->bitbang);
+        iounmap(sp->base);
+        platform_set_drvdata(pdev, NULL);
+        spi_master_put(sp->bitbang.master);
+
+        return 0;
+}
+
+static struct platform_driver ath79_spi_driver = {
+        .probe          = ath79_spi_probe,
+        .remove         = __devexit_p(ath79_spi_remove),
+        .driver         = {
+                .name   = DRV_NAME,
+                .owner  = THIS_MODULE,
+        },
+};
+
+static __init int ath79_spi_init(void)
+{
+        return platform_driver_register(&ath79_spi_driver);
+}
+module_init(ath79_spi_init);
+
+static __exit void ath79_spi_exit(void)
+{
+        platform_driver_unregister(&ath79_spi_driver);
+}
+module_exit(ath79_spi_exit);
+
+MODULE_DESCRIPTION("SPI controller driver for Atheros AR71XX/AR724X/AR913X");
+MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org>");
+MODULE_LICENSE("GPL v2");
+MODULE_ALIAS("platform:" DRV_NAME);
diff --git a/fs/autofs4/autofs_i.h b/fs/autofs4/autofs_i.h
index 1f016bfb42d5..54f923792728 100644
--- a/fs/autofs4/autofs_i.h
+++ b/fs/autofs4/autofs_i.h
@@ -88,14 +88,6 @@ struct autofs_info {
 
         uid_t uid;
         gid_t gid;
-
-        mode_t  mode;
-        size_t  size;
-
-        void (*free)(struct autofs_info *);
-        union {
-                const char *symlink;
-        } u;
 };
 
 #define AUTOFS_INF_EXPIRING     (1<<0) /* dentry is in the process of expiring */
@@ -175,7 +167,7 @@ static inline int autofs4_ispending(struct dentry *dentry)
         return 0;
 }
 
-struct inode *autofs4_get_inode(struct super_block *, struct autofs_info *);
+struct inode *autofs4_get_inode(struct super_block *, mode_t);
 void autofs4_free_ino(struct autofs_info *);
 
 /* Expiration */
@@ -285,7 +277,8 @@ static inline void managed_dentry_clear_managed(struct dentry *dentry)
 /* Initializing function */
 
 int autofs4_fill_super(struct super_block *, void *, int);
-struct autofs_info *autofs4_init_ino(struct autofs_info *, struct autofs_sb_info *sbi, mode_t mode);
+struct autofs_info *autofs4_new_ino(struct autofs_sb_info *);
+void autofs4_clean_ino(struct autofs_info *);
 
 /* Queue management functions */
 
@@ -345,5 +338,4 @@ static inline void autofs4_del_expiring(struct dentry *dentry)
         return;
 }
 
-void autofs4_dentry_release(struct dentry *);
 extern void autofs4_kill_sb(struct super_block *);
diff --git a/fs/autofs4/expire.c b/fs/autofs4/expire.c
index 3ed79d76c233..f43100b9662b 100644
--- a/fs/autofs4/expire.c
+++ b/fs/autofs4/expire.c
@@ -96,7 +96,7 @@ static struct dentry *get_next_positive_dentry(struct dentry *prev,
         struct dentry *p, *ret;
 
         if (prev == NULL)
-                return dget(prev);
+                return dget(root);
 
         spin_lock(&autofs4_lock);
 relock:
@@ -133,7 +133,7 @@ again:
         spin_lock_nested(&ret->d_lock, DENTRY_D_LOCK_NESTED);
         /* Negative dentry - try next */
         if (!simple_positive(ret)) {
-                spin_unlock(&ret->d_lock);
+                spin_unlock(&p->d_lock);
                 p = ret;
                 goto again;
         }
diff --git a/fs/autofs4/inode.c b/fs/autofs4/inode.c
index 9e1a9dad23e1..180fa2425e49 100644
--- a/fs/autofs4/inode.c
+++ b/fs/autofs4/inode.c
@@ -22,65 +22,27 @@
 #include "autofs_i.h"
 #include <linux/module.h>
 
-static void ino_lnkfree(struct autofs_info *ino)
+struct autofs_info *autofs4_new_ino(struct autofs_sb_info *sbi)
 {
-        if (ino->u.symlink) {
-                kfree(ino->u.symlink);
-                ino->u.symlink = NULL;
-        }
-}
-
-struct autofs_info *autofs4_init_ino(struct autofs_info *ino,
-                                     struct autofs_sb_info *sbi, mode_t mode)
-{
-        int reinit = 1;
-
-        if (ino == NULL) {
-                reinit = 0;
-                ino = kmalloc(sizeof(*ino), GFP_KERNEL);
-        }
-
-        if (ino == NULL)
-                return NULL;
-
-        if (!reinit) {
-                ino->flags = 0;
-                ino->dentry = NULL;
-                ino->size = 0;
+        struct autofs_info *ino = kzalloc(sizeof(*ino), GFP_KERNEL);
+        if (ino) {
                 INIT_LIST_HEAD(&ino->active);
-                ino->active_count = 0;
                 INIT_LIST_HEAD(&ino->expiring);
-                atomic_set(&ino->count, 0);
+                ino->last_used = jiffies;
+                ino->sbi = sbi;
         }
+        return ino;
+}
 
+void autofs4_clean_ino(struct autofs_info *ino)
+{
         ino->uid = 0;
         ino->gid = 0;
-        ino->mode = mode;
         ino->last_used = jiffies;
-
-        ino->sbi = sbi;
-
-        if (reinit && ino->free)
-                (ino->free)(ino);
-
-        memset(&ino->u, 0, sizeof(ino->u));
-
-        ino->free = NULL;
-
-        if (S_ISLNK(mode))
-                ino->free = ino_lnkfree;
-
-        return ino;
 }
 
 void autofs4_free_ino(struct autofs_info *ino)
 {
-        if (ino->dentry) {
-                ino->dentry->d_fsdata = NULL;
-                ino->dentry = NULL;
-        }
-        if (ino->free)
-                (ino->free)(ino);
         kfree(ino);
 }
 
@@ -136,9 +98,16 @@ static int autofs4_show_options(struct seq_file *m, struct vfsmount *mnt)
         return 0;
 }
 
+static void autofs4_evict_inode(struct inode *inode)
+{
+        end_writeback(inode);
+        kfree(inode->i_private);
+}
+
 static const struct super_operations autofs4_sops = {
         .statfs         = simple_statfs,
         .show_options   = autofs4_show_options,
+        .evict_inode    = autofs4_evict_inode,
 };
 
 enum {Opt_err, Opt_fd, Opt_uid, Opt_gid, Opt_pgrp, Opt_minproto, Opt_maxproto,
@@ -228,17 +197,6 @@ static int parse_options(char *options, int *pipefd, uid_t *uid, gid_t *gid,
         return (*pipefd < 0);
 }
 
-static struct autofs_info *autofs4_mkroot(struct autofs_sb_info *sbi)
-{
-        struct autofs_info *ino;
-
-        ino = autofs4_init_ino(NULL, sbi, S_IFDIR | 0755);
-        if (!ino)
-                return NULL;
-
-        return ino;
-}
-
 int autofs4_fill_super(struct super_block *s, void *data, int silent)
 {
         struct inode * root_inode;
@@ -282,10 +240,10 @@ int autofs4_fill_super(struct super_block *s, void *data, int silent)
         /*
          * Get the root inode and dentry, but defer checking for errors.
          */
-        ino = autofs4_mkroot(sbi);
+        ino = autofs4_new_ino(sbi);
         if (!ino)
                 goto fail_free;
-        root_inode = autofs4_get_inode(s, ino);
+        root_inode = autofs4_get_inode(s, S_IFDIR | 0755);
         if (!root_inode)
                 goto fail_ino;
 
@@ -368,15 +326,14 @@ fail_unlock:
         return -EINVAL;
 }
 
-struct inode *autofs4_get_inode(struct super_block *sb,
-                                struct autofs_info *inf)
+struct inode *autofs4_get_inode(struct super_block *sb, mode_t mode)
 {
         struct inode *inode = new_inode(sb);
 
         if (inode == NULL)
                 return NULL;
 
-        inode->i_mode = inf->mode;
+        inode->i_mode = mode;
         if (sb->s_root) {
                 inode->i_uid = sb->s_root->d_inode->i_uid;
                 inode->i_gid = sb->s_root->d_inode->i_gid;
@@ -384,12 +341,11 @@ struct inode *autofs4_get_inode(struct super_block *sb,
         inode->i_atime = inode->i_mtime = inode->i_ctime = CURRENT_TIME;
         inode->i_ino = get_next_ino();
 
-        if (S_ISDIR(inf->mode)) {
+        if (S_ISDIR(mode)) {
                 inode->i_nlink = 2;
                 inode->i_op = &autofs4_dir_inode_operations;
                 inode->i_fop = &autofs4_dir_operations;
-        } else if (S_ISLNK(inf->mode)) {
-                inode->i_size = inf->size;
+        } else if (S_ISLNK(mode)) {
                 inode->i_op = &autofs4_symlink_inode_operations;
         }
 
diff --git a/fs/autofs4/root.c b/fs/autofs4/root.c
index 1dba035fc376..014e7aba3b08 100644
--- a/fs/autofs4/root.c
+++ b/fs/autofs4/root.c
@@ -37,6 +37,7 @@ static int autofs4_dir_open(struct inode *inode, struct file *file);
 static struct dentry *autofs4_lookup(struct inode *,struct dentry *, struct nameidata *);
 static struct vfsmount *autofs4_d_automount(struct path *);
 static int autofs4_d_manage(struct dentry *, bool, bool);
+static void autofs4_dentry_release(struct dentry *);
 
 const struct file_operations autofs4_root_operations = {
         .open           = dcache_dir_open,
@@ -138,25 +139,26 @@ out:
         return dcache_dir_open(inode, file);
 }
 
-void autofs4_dentry_release(struct dentry *de)
+static void autofs4_dentry_release(struct dentry *de)
 {
-        struct autofs_info *inf;
+        struct autofs_info *ino = autofs4_dentry_ino(de);
+        struct autofs_sb_info *sbi = autofs4_sbi(de->d_sb);
 
         DPRINTK("releasing %p", de);
 
-        inf = autofs4_dentry_ino(de);
-        if (inf) {
-                struct autofs_sb_info *sbi = autofs4_sbi(de->d_sb);
-                if (sbi) {
-                        spin_lock(&sbi->lookup_lock);
-                        if (!list_empty(&inf->active))
-                                list_del(&inf->active);
-                        if (!list_empty(&inf->expiring))
-                                list_del(&inf->expiring);
-                        spin_unlock(&sbi->lookup_lock);
-                }
-                autofs4_free_ino(inf);
+        if (!ino)
+                return;
+
+        if (sbi) {
+                spin_lock(&sbi->lookup_lock);
+                if (!list_empty(&ino->active))
+                        list_del(&ino->active);
+                if (!list_empty(&ino->expiring))
+                        list_del(&ino->expiring);
+                spin_unlock(&sbi->lookup_lock);
         }
+
+        autofs4_free_ino(ino);
 }
 
 static struct dentry *autofs4_lookup_active(struct dentry *dentry)
@@ -488,7 +490,8 @@ static struct dentry *autofs4_lookup(struct inode *dir, struct dentry *dentry, s
         sbi = autofs4_sbi(dir->i_sb);
 
         DPRINTK("pid = %u, pgrp = %u, catatonic = %d, oz_mode = %d",
-                current->pid, task_pgrp_nr(current), sbi->catatonic, oz_mode);
+                current->pid, task_pgrp_nr(current), sbi->catatonic,
+                autofs4_oz_mode(sbi));
 
         active = autofs4_lookup_active(dentry);
         if (active) {
@@ -507,7 +510,7 @@ static struct dentry *autofs4_lookup(struct inode *dir, struct dentry *dentry, s
                 if (autofs_type_indirect(sbi->type) && IS_ROOT(dentry->d_parent))
                         __managed_dentry_set_managed(dentry);
 
-                ino = autofs4_init_ino(NULL, sbi, 0555);
+                ino = autofs4_new_ino(sbi);
                 if (!ino)
                         return ERR_PTR(-ENOMEM);
 
@@ -529,6 +532,7 @@ static int autofs4_dir_symlink(struct inode *dir,
         struct autofs_info *ino = autofs4_dentry_ino(dentry);
         struct autofs_info *p_ino;
         struct inode *inode;
+        size_t size = strlen(symname);
         char *cp;
 
         DPRINTK("%s <- %.*s", symname,
@@ -537,39 +541,35 @@ static int autofs4_dir_symlink(struct inode *dir,
         if (!autofs4_oz_mode(sbi))
                 return -EACCES;
 
-        ino = autofs4_init_ino(ino, sbi, S_IFLNK | 0555);
-        if (!ino)
-                return -ENOMEM;
+        BUG_ON(!ino);
+
+        autofs4_clean_ino(ino);
 
         autofs4_del_active(dentry);
 
-        ino->size = strlen(symname);
-        cp = kmalloc(ino->size + 1, GFP_KERNEL);
-        if (!cp) {
-                if (!dentry->d_fsdata)
-                        kfree(ino);
+        cp = kmalloc(size + 1, GFP_KERNEL);
+        if (!cp)
                 return -ENOMEM;
-        }
 
         strcpy(cp, symname);
 
-        inode = autofs4_get_inode(dir->i_sb, ino);
+        inode = autofs4_get_inode(dir->i_sb, S_IFLNK | 0555);
         if (!inode) {
                 kfree(cp);
                 if (!dentry->d_fsdata)
                         kfree(ino);
                 return -ENOMEM;
         }
+        inode->i_private = cp;
+        inode->i_size = size;
         d_add(dentry, inode);
 
-        dentry->d_fsdata = ino;
-        ino->dentry = dget(dentry);
+        dget(dentry);
         atomic_inc(&ino->count);
         p_ino = autofs4_dentry_ino(dentry->d_parent);
         if (p_ino && dentry->d_parent != dentry)
                 atomic_inc(&p_ino->count);
 
-        ino->u.symlink = cp;
         dir->i_mtime = CURRENT_TIME;
 
         return 0;
@@ -732,25 +732,21 @@ static int autofs4_dir_mkdir(struct inode *dir, struct dentry *dentry, int mode)
         DPRINTK("dentry %p, creating %.*s",
                 dentry, dentry->d_name.len, dentry->d_name.name);
 
-        ino = autofs4_init_ino(ino, sbi, S_IFDIR | 0555);
-        if (!ino)
-                return -ENOMEM;
+        BUG_ON(!ino);
+
+        autofs4_clean_ino(ino);
 
         autofs4_del_active(dentry);
 
-        inode = autofs4_get_inode(dir->i_sb, ino);
-        if (!inode) {
-                if (!dentry->d_fsdata)
-                        kfree(ino);
+        inode = autofs4_get_inode(dir->i_sb, S_IFDIR | 0555);
+        if (!inode)
                 return -ENOMEM;
-        }
         d_add(dentry, inode);
 
         if (sbi->version < 5)
                 autofs_set_leaf_automount_flags(dentry);
 
-        dentry->d_fsdata = ino;
-        ino->dentry = dget(dentry);
+        dget(dentry);
         atomic_inc(&ino->count);
         p_ino = autofs4_dentry_ino(dentry->d_parent);
         if (p_ino && dentry->d_parent != dentry)
diff --git a/fs/autofs4/symlink.c b/fs/autofs4/symlink.c
index b4ea82934d2e..f27c094a1919 100644
--- a/fs/autofs4/symlink.c
+++ b/fs/autofs4/symlink.c
@@ -14,8 +14,7 @@
 
 static void *autofs4_follow_link(struct dentry *dentry, struct nameidata *nd)
 {
-        struct autofs_info *ino = autofs4_dentry_ino(dentry);
-        nd_set_link(nd, (char *)ino->u.symlink);
+        nd_set_link(nd, dentry->d_inode->i_private);
         return NULL;
 }
 
diff --git a/fs/namei.c b/fs/namei.c
index b753192d8c3f..7d77f24d32a9 100644
--- a/fs/namei.c
+++ b/fs/namei.c
@@ -1272,8 +1272,10 @@ done:
         path->mnt = mnt;
         path->dentry = dentry;
         err = follow_managed(path, nd->flags);
-        if (unlikely(err < 0))
+        if (unlikely(err < 0)) {
+                path_put_conditional(path, nd);
                 return err;
+        }
         *inode = path->dentry->d_inode;
         return 0;
 
diff --git a/fs/pipe.c b/fs/pipe.c
index 89e9e19b1b2e..da42f7db50de 100644
--- a/fs/pipe.c
+++ b/fs/pipe.c
@@ -441,7 +441,7 @@ redo:
                         break;
                 }
                 if (do_wakeup) {
-                        wake_up_interruptible_sync_poll(&pipe->wait, POLLOUT);
+                        wake_up_interruptible_sync_poll(&pipe->wait, POLLOUT | POLLWRNORM);
                         kill_fasync(&pipe->fasync_writers, SIGIO, POLL_OUT);
                 }
                 pipe_wait(pipe);
@@ -450,7 +450,7 @@ redo:
 
         /* Signal writers asynchronously that there is more room. */
         if (do_wakeup) {
-                wake_up_interruptible_sync_poll(&pipe->wait, POLLOUT);
+                wake_up_interruptible_sync_poll(&pipe->wait, POLLOUT | POLLWRNORM);
                 kill_fasync(&pipe->fasync_writers, SIGIO, POLL_OUT);
         }
         if (ret > 0)
@@ -612,7 +612,7 @@ redo2:
                         break;
                 }
                 if (do_wakeup) {
-                        wake_up_interruptible_sync_poll(&pipe->wait, POLLIN);
+                        wake_up_interruptible_sync_poll(&pipe->wait, POLLIN | POLLRDNORM);
                         kill_fasync(&pipe->fasync_readers, SIGIO, POLL_IN);
                         do_wakeup = 0;
                 }
@@ -623,7 +623,7 @@ redo2:
 out:
         mutex_unlock(&inode->i_mutex);
         if (do_wakeup) {
-                wake_up_interruptible_sync_poll(&pipe->wait, POLLIN);
+                wake_up_interruptible_sync_poll(&pipe->wait, POLLIN | POLLRDNORM);
                 kill_fasync(&pipe->fasync_readers, SIGIO, POLL_IN);
         }
         if (ret > 0)
@@ -715,7 +715,7 @@ pipe_release(struct inode *inode, int decr, int decw)
         if (!pipe->readers && !pipe->writers) {
                 free_pipe_info(inode);
         } else {
-                wake_up_interruptible_sync_poll(&pipe->wait, POLLIN | POLLOUT);
+                wake_up_interruptible_sync_poll(&pipe->wait, POLLIN | POLLOUT | POLLRDNORM | POLLWRNORM | POLLERR | POLLHUP);
                 kill_fasync(&pipe->fasync_readers, SIGIO, POLL_IN);
                 kill_fasync(&pipe->fasync_writers, SIGIO, POLL_OUT);
         }
diff --git a/include/acpi/acexcep.h b/include/acpi/acexcep.h
index 17714beb868e..5b6c391efc8e 100644
--- a/include/acpi/acexcep.h
+++ b/include/acpi/acexcep.h
@@ -5,7 +5,7 @@
  *****************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
diff --git a/include/acpi/acnames.h b/include/acpi/acnames.h
index 9cf736ea4691..fc1575fd4596 100644
--- a/include/acpi/acnames.h
+++ b/include/acpi/acnames.h
@@ -5,7 +5,7 @@
  *****************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
diff --git a/include/acpi/acoutput.h b/include/acpi/acoutput.h
index bc4a6deb73b0..ef1cef77d32b 100644
--- a/include/acpi/acoutput.h
+++ b/include/acpi/acoutput.h
@@ -5,7 +5,7 @@
  *****************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
diff --git a/include/acpi/acpi.h b/include/acpi/acpi.h
index a091cabca4b1..de39915f6b7f 100644
--- a/include/acpi/acpi.h
+++ b/include/acpi/acpi.h
@@ -5,7 +5,7 @@
  *****************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
diff --git a/include/acpi/acpiosxf.h b/include/acpi/acpiosxf.h
index 65b3f5888f42..a3252a5ead66 100644
--- a/include/acpi/acpiosxf.h
+++ b/include/acpi/acpiosxf.h
@@ -8,7 +8,7 @@
  *****************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
diff --git a/include/acpi/acpixf.h b/include/acpi/acpixf.h
index 241b8a04c83c..e46ec95a8ada 100644
--- a/include/acpi/acpixf.h
+++ b/include/acpi/acpixf.h
@@ -6,7 +6,7 @@
  *****************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
@@ -47,7 +47,7 @@
 
 /* Current ACPICA subsystem version in YYYYMMDD format */
 
-#define ACPI_CA_VERSION                 0x20101209
+#define ACPI_CA_VERSION                 0x20110112
 
 #include "actypes.h"
 #include "actbl.h"
diff --git a/include/acpi/acrestyp.h b/include/acpi/acrestyp.h
index e5526354ba5e..0a66cc45dd6b 100644
--- a/include/acpi/acrestyp.h
+++ b/include/acpi/acrestyp.h
@@ -5,7 +5,7 @@
  *****************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
diff --git a/include/acpi/actbl.h b/include/acpi/actbl.h
index ad2001683ba7..7e42bfee0e29 100644
--- a/include/acpi/actbl.h
+++ b/include/acpi/actbl.h
@@ -5,7 +5,7 @@
  *****************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
diff --git a/include/acpi/actbl1.h b/include/acpi/actbl1.h
index cd77aa75c962..7504bc99b29b 100644
--- a/include/acpi/actbl1.h
+++ b/include/acpi/actbl1.h
@@ -5,7 +5,7 @@
  *****************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
diff --git a/include/acpi/actbl2.h b/include/acpi/actbl2.h
index d4136b28011f..0fc15dfb2e22 100644
--- a/include/acpi/actbl2.h
+++ b/include/acpi/actbl2.h
@@ -5,7 +5,7 @@
  *****************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
diff --git a/include/acpi/actypes.h b/include/acpi/actypes.h
index 939a431a6ab6..64f838beaabf 100644
--- a/include/acpi/actypes.h
+++ b/include/acpi/actypes.h
@@ -5,7 +5,7 @@
  *****************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
diff --git a/include/acpi/platform/acenv.h b/include/acpi/platform/acenv.h
index a3e334ab1119..5af3ed52ef98 100644
--- a/include/acpi/platform/acenv.h
+++ b/include/acpi/platform/acenv.h
@@ -5,7 +5,7 @@
  *****************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
diff --git a/include/acpi/platform/acgcc.h b/include/acpi/platform/acgcc.h
index 5dcb9537343c..e228893591a9 100644
--- a/include/acpi/platform/acgcc.h
+++ b/include/acpi/platform/acgcc.h
@@ -5,7 +5,7 @@
  *****************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
diff --git a/include/acpi/platform/aclinux.h b/include/acpi/platform/aclinux.h
index 572189e37133..5d2a5e9544d9 100644
--- a/include/acpi/platform/aclinux.h
+++ b/include/acpi/platform/aclinux.h
@@ -5,7 +5,7 @@
  *****************************************************************************/
 
 /*
- * Copyright (C) 2000 - 2010, Intel Corp.
+ * Copyright (C) 2000 - 2011, Intel Corp.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
diff --git a/include/linux/ieee80211.h b/include/linux/ieee80211.h
index 6042228954a7..294169e31364 100644
--- a/include/linux/ieee80211.h
+++ b/include/linux/ieee80211.h
@@ -959,7 +959,7 @@ struct ieee80211_ht_info {
 /* block-ack parameters */
 #define IEEE80211_ADDBA_PARAM_POLICY_MASK 0x0002
 #define IEEE80211_ADDBA_PARAM_TID_MASK 0x003C
-#define IEEE80211_ADDBA_PARAM_BUF_SIZE_MASK 0xFFA0
+#define IEEE80211_ADDBA_PARAM_BUF_SIZE_MASK 0xFFC0
 #define IEEE80211_DELBA_PARAM_TID_MASK 0xF000
 #define IEEE80211_DELBA_PARAM_INITIATOR_MASK 0x0800
 
diff --git a/include/net/sctp/user.h b/include/net/sctp/user.h
index 2a128c8c2718..e73ebdae323d 100644
--- a/include/net/sctp/user.h
+++ b/include/net/sctp/user.h
@@ -78,6 +78,7 @@ typedef __s32 sctp_assoc_t;
 #define SCTP_GET_PEER_ADDR_INFO 15
 #define SCTP_DELAYED_ACK_TIME   16
 #define SCTP_DELAYED_ACK SCTP_DELAYED_ACK_TIME
+#define SCTP_DELAYED_SACK SCTP_DELAYED_ACK_TIME
 #define SCTP_CONTEXT    17
 #define SCTP_FRAGMENT_INTERLEAVE        18
 #define SCTP_PARTIAL_DELIVERY_POINT     19 /* Set/Get partial delivery point */
diff --git a/include/sound/ac97_codec.h b/include/sound/ac97_codec.h
index 49400459b477..b602f475cdbb 100644
--- a/include/sound/ac97_codec.h
+++ b/include/sound/ac97_codec.h
@@ -477,7 +477,7 @@ struct snd_ac97_template {
 
 struct snd_ac97 {
         /* -- lowlevel (hardware) driver specific -- */
-        struct snd_ac97_build_ops * build_ops;
+        const struct snd_ac97_build_ops *build_ops;
         void *private_data;
         void (*private_free) (struct snd_ac97 *ac97);
         /* --- */
diff --git a/kernel/perf_event.c b/kernel/perf_event.c
index 05ebe841270b..84522c796987 100644
--- a/kernel/perf_event.c
+++ b/kernel/perf_event.c
@@ -2228,14 +2228,11 @@ find_get_context(struct pmu *pmu, struct task_struct *task, int cpu)
         unsigned long flags;
         int ctxn, err;
 
-        if (!task && cpu != -1) {
+        if (!task) {
                 /* Must be root to operate on a CPU event: */
                 if (perf_paranoid_cpu() && !capable(CAP_SYS_ADMIN))
                         return ERR_PTR(-EACCES);
 
-                if (cpu < 0 || cpu >= nr_cpumask_bits)
-                        return ERR_PTR(-EINVAL);
-
                 /*
                  * We could be clever and allow to attach a event to an
                  * offline CPU and activate it when the CPU comes up, but
@@ -5541,6 +5538,11 @@ perf_event_alloc(struct perf_event_attr *attr, int cpu,
         struct hw_perf_event *hwc;
         long err;
 
+        if ((unsigned)cpu >= nr_cpu_ids) {
+                if (!task || cpu != -1)
+                        return ERR_PTR(-EINVAL);
+        }
+
         event = kzalloc(sizeof(*event), GFP_KERNEL);
         if (!event)
                 return ERR_PTR(-ENOMEM);
@@ -5589,7 +5591,7 @@ perf_event_alloc(struct perf_event_attr *attr, int cpu,
 
         if (!overflow_handler && parent_event)
                 overflow_handler = parent_event->overflow_handler;
-        
+
         event->overflow_handler = overflow_handler;
 
         if (attr->disabled)
@@ -6494,7 +6496,6 @@ int perf_event_init_context(struct task_struct *child, int ctxn)
 
         raw_spin_lock_irqsave(&parent_ctx->lock, flags);
         parent_ctx->rotate_disable = 0;
-        raw_spin_unlock_irqrestore(&parent_ctx->lock, flags);
 
         child_ctx = child->perf_event_ctxp[ctxn];
 
@@ -6502,12 +6503,11 @@ int perf_event_init_context(struct task_struct *child, int ctxn)
                 /*
                  * Mark the child context as a clone of the parent
                  * context, or of whatever the parent is a clone of.
-                 * Note that if the parent is a clone, it could get
-                 * uncloned at any point, but that doesn't matter
-                 * because the list of events and the generation
-                 * count can't have changed since we took the mutex.
+                 *
+                 * Note that if the parent is a clone, the holding of
+                 * parent_ctx->lock avoids it from being uncloned.
                  */
-                cloned_ctx = rcu_dereference(parent_ctx->parent_ctx);
+                cloned_ctx = parent_ctx->parent_ctx;
                 if (cloned_ctx) {
                         child_ctx->parent_ctx = cloned_ctx;
                         child_ctx->parent_gen = parent_ctx->parent_gen;
@@ -6518,6 +6518,7 @@ int perf_event_init_context(struct task_struct *child, int ctxn)
                 get_ctx(child_ctx->parent_ctx);
         }
 
+        raw_spin_unlock_irqrestore(&parent_ctx->lock, flags);
         mutex_unlock(&parent_ctx->mutex);
 
         perf_unpin_context(parent_ctx);
diff --git a/net/batman-adv/main.h b/net/batman-adv/main.h
index d4d9926c2201..65106fb61b8f 100644
--- a/net/batman-adv/main.h
+++ b/net/batman-adv/main.h
@@ -151,9 +151,9 @@ int debug_log(struct bat_priv *bat_priv, char *fmt, ...);
         }                                                       \
         while (0)
 #else /* !CONFIG_BATMAN_ADV_DEBUG */
-static inline void bat_dbg(char type __attribute__((unused)),
-                           struct bat_priv *bat_priv __attribute__((unused)),
-                           char *fmt __attribute__((unused)), ...)
+static inline void bat_dbg(char type __always_unused,
+                           struct bat_priv *bat_priv __always_unused,
+                           char *fmt __always_unused, ...)
 {
 }
 #endif
diff --git a/net/batman-adv/packet.h b/net/batman-adv/packet.h
index b49fdf70a6d5..2284e8129cb2 100644
--- a/net/batman-adv/packet.h
+++ b/net/batman-adv/packet.h
@@ -63,7 +63,7 @@ struct batman_packet {
         uint8_t  num_hna;
         uint8_t  gw_flags;  /* flags related to gateway class */
         uint8_t  align;
-} __attribute__((packed));
+} __packed;
 
 #define BAT_PACKET_LEN sizeof(struct batman_packet)
 
@@ -76,7 +76,7 @@ struct icmp_packet {
         uint8_t  orig[6];
         uint16_t seqno;
         uint8_t  uid;
-} __attribute__((packed));
+} __packed;
 
 #define BAT_RR_LEN 16
 
@@ -93,14 +93,14 @@ struct icmp_packet_rr {
         uint8_t  uid;
         uint8_t  rr_cur;
         uint8_t  rr[BAT_RR_LEN][ETH_ALEN];
-} __attribute__((packed));
+} __packed;
 
 struct unicast_packet {
         uint8_t  packet_type;
         uint8_t  version;  /* batman version field */
         uint8_t  dest[6];
         uint8_t  ttl;
-} __attribute__((packed));
+} __packed;
 
 struct unicast_frag_packet {
         uint8_t  packet_type;
@@ -110,7 +110,7 @@ struct unicast_frag_packet {
         uint8_t  flags;
         uint8_t  orig[6];
         uint16_t seqno;
-} __attribute__((packed));
+} __packed;
 
 struct bcast_packet {
         uint8_t  packet_type;
@@ -118,7 +118,7 @@ struct bcast_packet {
         uint8_t  orig[6];
         uint8_t  ttl;
         uint32_t seqno;
-} __attribute__((packed));
+} __packed;
 
 struct vis_packet {
         uint8_t  packet_type;
@@ -131,6 +131,6 @@ struct vis_packet {
                                   * neighbors */
         uint8_t  target_orig[6]; /* who should receive this packet */
         uint8_t  sender_orig[6]; /* who sent or rebroadcasted this packet */
-} __attribute__((packed));
+} __packed;
 
 #endif /* _NET_BATMAN_ADV_PACKET_H_ */
diff --git a/net/batman-adv/types.h b/net/batman-adv/types.h
index 97cb23dd3e69..bf3f6f5a12c4 100644
--- a/net/batman-adv/types.h
+++ b/net/batman-adv/types.h
@@ -246,13 +246,13 @@ struct vis_info {
         /* this packet might be part of the vis send queue. */
         struct sk_buff *skb_packet;
         /* vis_info may follow here*/
-} __attribute__((packed));
+} __packed;
 
 struct vis_info_entry {
         uint8_t  src[ETH_ALEN];
         uint8_t  dest[ETH_ALEN];
         uint8_t  quality;       /* quality = 0 means HNA */
-} __attribute__((packed));
+} __packed;
 
 struct recvlist_node {
         struct list_head list;
diff --git a/net/batman-adv/unicast.c b/net/batman-adv/unicast.c
index dc2e28bed844..ee41fef04b21 100644
--- a/net/batman-adv/unicast.c
+++ b/net/batman-adv/unicast.c
@@ -229,10 +229,12 @@ int frag_send_skb(struct sk_buff *skb, struct bat_priv *bat_priv,
         if (!bat_priv->primary_if)
                 goto dropped;
 
-        unicast_packet = (struct unicast_packet *) skb->data;
+        frag_skb = dev_alloc_skb(data_len - (data_len / 2) + ucf_hdr_len);
+        if (!frag_skb)
+                goto dropped;
 
+        unicast_packet = (struct unicast_packet *) skb->data;
         memcpy(&tmp_uc, unicast_packet, uc_hdr_len);
-        frag_skb = dev_alloc_skb(data_len - (data_len / 2) + ucf_hdr_len);
         skb_split(skb, frag_skb, data_len / 2);
 
         if (my_skb_head_push(skb, ucf_hdr_len - uc_hdr_len) < 0 ||
diff --git a/net/caif/cfcnfg.c b/net/caif/cfcnfg.c
index 21ede141018a..c665de778b60 100644
--- a/net/caif/cfcnfg.c
+++ b/net/caif/cfcnfg.c
@@ -191,6 +191,7 @@ int cfcnfg_disconn_adapt_layer(struct cfcnfg *cnfg, struct cflayer *adap_layer)
         struct cflayer *servl = NULL;
         struct cfcnfg_phyinfo *phyinfo = NULL;
         u8 phyid = 0;
+
         caif_assert(adap_layer != NULL);
         channel_id = adap_layer->id;
         if (adap_layer->dn == NULL || channel_id == 0) {
@@ -199,16 +200,16 @@ int cfcnfg_disconn_adapt_layer(struct cfcnfg *cnfg, struct cflayer *adap_layer)
                 goto end;
         }
         servl = cfmuxl_remove_uplayer(cnfg->mux, channel_id);
-        if (servl == NULL)
-                goto end;
-        layer_set_up(servl, NULL);
-        ret = cfctrl_linkdown_req(cnfg->ctrl, channel_id, adap_layer);
         if (servl == NULL) {
                 pr_err("PROTOCOL ERROR - Error removing service_layer Channel_Id(%d)",
                        channel_id);
                 ret = -EINVAL;
                 goto end;
         }
+        layer_set_up(servl, NULL);
+        ret = cfctrl_linkdown_req(cnfg->ctrl, channel_id, adap_layer);
+        if (ret)
+                goto end;
         caif_assert(channel_id == servl->id);
         if (adap_layer->dn != NULL) {
                 phyid = cfsrvl_getphyid(adap_layer->dn);
diff --git a/net/can/bcm.c b/net/can/bcm.c
index 9d5e8accfab1..092dc88a7c64 100644
--- a/net/can/bcm.c
+++ b/net/can/bcm.c
@@ -1256,6 +1256,9 @@ static int bcm_sendmsg(struct kiocb *iocb, struct socket *sock,
                 struct sockaddr_can *addr =
                         (struct sockaddr_can *)msg->msg_name;
 
+                if (msg->msg_namelen < sizeof(*addr))
+                        return -EINVAL;
+
                 if (addr->can_family != AF_CAN)
                         return -EINVAL;
 
diff --git a/net/can/raw.c b/net/can/raw.c
index e88f610fdb7b..883e9d74fddf 100644
--- a/net/can/raw.c
+++ b/net/can/raw.c
@@ -649,6 +649,9 @@ static int raw_sendmsg(struct kiocb *iocb, struct socket *sock,
                 struct sockaddr_can *addr =
                         (struct sockaddr_can *)msg->msg_name;
 
+                if (msg->msg_namelen < sizeof(*addr))
+                        return -EINVAL;
+
                 if (addr->can_family != AF_CAN)
                         return -EINVAL;
 
diff --git a/net/core/dev.c b/net/core/dev.c
index 54277df0f735..7c6a46f80372 100644
--- a/net/core/dev.c
+++ b/net/core/dev.c
@@ -2001,7 +2001,7 @@ static bool can_checksum_protocol(unsigned long features, __be16 protocol)
 
 static int harmonize_features(struct sk_buff *skb, __be16 protocol, int features)
 {
-        if (!can_checksum_protocol(protocol, features)) {
+        if (!can_checksum_protocol(features, protocol)) {
                 features &= ~NETIF_F_ALL_CSUM;
                 features &= ~NETIF_F_SG;
         } else if (illegal_highdma(skb->dev, skb)) {
@@ -2023,13 +2023,13 @@ int netif_skb_features(struct sk_buff *skb)
                 return harmonize_features(skb, protocol, features);
         }
 
-        features &= skb->dev->vlan_features;
+        features &= (skb->dev->vlan_features | NETIF_F_HW_VLAN_TX);
 
         if (protocol != htons(ETH_P_8021Q)) {
                 return harmonize_features(skb, protocol, features);
         } else {
                 features &= NETIF_F_SG | NETIF_F_HIGHDMA | NETIF_F_FRAGLIST |
-                                NETIF_F_GEN_CSUM;
+                                NETIF_F_GEN_CSUM | NETIF_F_HW_VLAN_TX;
                 return harmonize_features(skb, protocol, features);
         }
 }
diff --git a/net/core/rtnetlink.c b/net/core/rtnetlink.c
index a5f7535aab5b..750db57f3bb3 100644
--- a/net/core/rtnetlink.c
+++ b/net/core/rtnetlink.c
@@ -1820,7 +1820,7 @@ static int rtnetlink_rcv_msg(struct sk_buff *skb, struct nlmsghdr *nlh)
         if (kind != 2 && security_netlink_recv(skb, CAP_NET_ADMIN))
                 return -EPERM;
 
-        if (kind == 2 && (nlh->nlmsg_flags & NLM_F_DUMP) == NLM_F_DUMP) {
+        if (kind == 2 && nlh->nlmsg_flags&NLM_F_DUMP) {
                 struct sock *rtnl;
                 rtnl_dumpit_func dumpit;
 
diff --git a/net/ipv4/inet_diag.c b/net/ipv4/inet_diag.c
index 2746c1fa6417..2ada17129fce 100644
--- a/net/ipv4/inet_diag.c
+++ b/net/ipv4/inet_diag.c
@@ -858,7 +858,7 @@ static int inet_diag_rcv_msg(struct sk_buff *skb, struct nlmsghdr *nlh)
             nlmsg_len(nlh) < hdrlen)
                 return -EINVAL;
 
-        if ((nlh->nlmsg_flags & NLM_F_DUMP) == NLM_F_DUMP) {
+        if (nlh->nlmsg_flags & NLM_F_DUMP) {
                 if (nlmsg_attrlen(nlh, hdrlen)) {
                         struct nlattr *attr;
 
diff --git a/net/ipv6/addrconf.c b/net/ipv6/addrconf.c
index 5b189c97c2fc..24a1cf110d80 100644
--- a/net/ipv6/addrconf.c
+++ b/net/ipv6/addrconf.c
@@ -420,9 +420,6 @@ static struct inet6_dev * ipv6_add_dev(struct net_device *dev)
             dev->type == ARPHRD_TUNNEL6 ||
             dev->type == ARPHRD_SIT ||
             dev->type == ARPHRD_NONE) {
-                printk(KERN_INFO
-                       "%s: Disabled Privacy Extensions\n",
-                       dev->name);
                 ndev->cnf.use_tempaddr = -1;
         } else {
                 in6_dev_hold(ndev);
diff --git a/net/mac80211/agg-rx.c b/net/mac80211/agg-rx.c
index f138b195d657..227ca82eef72 100644
--- a/net/mac80211/agg-rx.c
+++ b/net/mac80211/agg-rx.c
@@ -185,8 +185,6 @@ void ieee80211_process_addba_request(struct ieee80211_local *local,
                                      struct ieee80211_mgmt *mgmt,
                                      size_t len)
 {
-        struct ieee80211_hw *hw = &local->hw;
-        struct ieee80211_conf *conf = &hw->conf;
         struct tid_ampdu_rx *tid_agg_rx;
         u16 capab, tid, timeout, ba_policy, buf_size, start_seq_num, status;
         u8 dialog_token;
@@ -231,13 +229,8 @@ void ieee80211_process_addba_request(struct ieee80211_local *local,
                 goto end_no_lock;
         }
         /* determine default buffer size */
-        if (buf_size == 0) {
-                struct ieee80211_supported_band *sband;
-
-                sband = local->hw.wiphy->bands[conf->channel->band];
-                buf_size = IEEE80211_MIN_AMPDU_BUF;
-                buf_size = buf_size << sband->ht_cap.ampdu_factor;
-        }
+        if (buf_size == 0)
+                buf_size = IEEE80211_MAX_AMPDU_BUF;
 
 
         /* examine state machine */
diff --git a/net/mac80211/main.c b/net/mac80211/main.c
index 485d36bc9a46..a46ff06d7cb8 100644
--- a/net/mac80211/main.c
+++ b/net/mac80211/main.c
@@ -39,6 +39,8 @@ module_param(ieee80211_disable_40mhz_24ghz, bool, 0644);
 MODULE_PARM_DESC(ieee80211_disable_40mhz_24ghz,
                  "Disable 40MHz support in the 2.4GHz band");
 
+static struct lock_class_key ieee80211_rx_skb_queue_class;
+
 void ieee80211_configure_filter(struct ieee80211_local *local)
 {
         u64 mc;
@@ -569,7 +571,15 @@ struct ieee80211_hw *ieee80211_alloc_hw(size_t priv_data_len,
         spin_lock_init(&local->filter_lock);
         spin_lock_init(&local->queue_stop_reason_lock);
 
-        skb_queue_head_init(&local->rx_skb_queue);
+        /*
+         * The rx_skb_queue is only accessed from tasklets,
+         * but other SKB queues are used from within IRQ
+         * context. Therefore, this one needs a different
+         * locking class so our direct, non-irq-safe use of
+         * the queue's lock doesn't throw lockdep warnings.
+         */
+        skb_queue_head_init_class(&local->rx_skb_queue,
+                                  &ieee80211_rx_skb_queue_class);
 
         INIT_DELAYED_WORK(&local->scan_work, ieee80211_scan_work);
 
diff --git a/net/netfilter/nf_conntrack_netlink.c b/net/netfilter/nf_conntrack_netlink.c
index 2b7eef37875c..93297aaceb2b 100644
--- a/net/netfilter/nf_conntrack_netlink.c
+++ b/net/netfilter/nf_conntrack_netlink.c
@@ -924,7 +924,7 @@ ctnetlink_get_conntrack(struct sock *ctnl, struct sk_buff *skb,
         u16 zone;
         int err;
 
-        if ((nlh->nlmsg_flags & NLM_F_DUMP) == NLM_F_DUMP)
+        if (nlh->nlmsg_flags & NLM_F_DUMP)
                 return netlink_dump_start(ctnl, skb, nlh, ctnetlink_dump_table,
                                           ctnetlink_done);
 
@@ -1787,7 +1787,7 @@ ctnetlink_get_expect(struct sock *ctnl, struct sk_buff *skb,
         u16 zone;
         int err;
 
-        if ((nlh->nlmsg_flags & NLM_F_DUMP) == NLM_F_DUMP) {
+        if (nlh->nlmsg_flags & NLM_F_DUMP) {
                 return netlink_dump_start(ctnl, skb, nlh,
                                           ctnetlink_exp_dump_table,
                                           ctnetlink_exp_done);
diff --git a/net/netlink/genetlink.c b/net/netlink/genetlink.c
index f83cb370292b..1781d99145e2 100644
--- a/net/netlink/genetlink.c
+++ b/net/netlink/genetlink.c
@@ -519,7 +519,7 @@ static int genl_rcv_msg(struct sk_buff *skb, struct nlmsghdr *nlh)
             security_netlink_recv(skb, CAP_NET_ADMIN))
                 return -EPERM;
 
-        if ((nlh->nlmsg_flags & NLM_F_DUMP) == NLM_F_DUMP) {
+        if (nlh->nlmsg_flags & NLM_F_DUMP) {
                 if (ops->dumpit == NULL)
                         return -EOPNOTSUPP;
 
diff --git a/net/sctp/socket.c b/net/sctp/socket.c
index a09b0dd25f50..8e02550ff3e8 100644
--- a/net/sctp/socket.c
+++ b/net/sctp/socket.c
@@ -3428,7 +3428,7 @@ SCTP_STATIC int sctp_setsockopt(struct sock *sk, int level, int optname,
                 retval = sctp_setsockopt_peer_addr_params(sk, optval, optlen);
                 break;
 
-        case SCTP_DELAYED_ACK:
+        case SCTP_DELAYED_SACK:
                 retval = sctp_setsockopt_delayed_ack(sk, optval, optlen);
                 break;
         case SCTP_PARTIAL_DELIVERY_POINT:
@@ -5333,7 +5333,7 @@ SCTP_STATIC int sctp_getsockopt(struct sock *sk, int level, int optname,
                 retval = sctp_getsockopt_peer_addr_params(sk, len, optval,
                                                           optlen);
                 break;
-        case SCTP_DELAYED_ACK:
+        case SCTP_DELAYED_SACK:
                 retval = sctp_getsockopt_delayed_ack(sk, len, optval,
                                                           optlen);
                 break;
diff --git a/net/xfrm/xfrm_user.c b/net/xfrm/xfrm_user.c
index d5e1e0b08890..61291965c5f6 100644
--- a/net/xfrm/xfrm_user.c
+++ b/net/xfrm/xfrm_user.c
@@ -2189,7 +2189,7 @@ static int xfrm_user_rcv_msg(struct sk_buff *skb, struct nlmsghdr *nlh)
 
         if ((type == (XFRM_MSG_GETSA - XFRM_MSG_BASE) ||
              type == (XFRM_MSG_GETPOLICY - XFRM_MSG_BASE)) &&
-            (nlh->nlmsg_flags & NLM_F_DUMP) == NLM_F_DUMP) {
+            (nlh->nlmsg_flags & NLM_F_DUMP)) {
                 if (link->dump == NULL)
                         return -EINVAL;
 
diff --git a/sound/pci/ac97/ac97_codec.c b/sound/pci/ac97/ac97_codec.c
index 0fc614ce16c1..cb62d178b3e0 100644
--- a/sound/pci/ac97/ac97_codec.c
+++ b/sound/pci/ac97/ac97_codec.c
@@ -1961,7 +1961,7 @@ static int snd_ac97_dev_disconnect(struct snd_device *device)
 }
 
 /* build_ops to do nothing */
-static struct snd_ac97_build_ops null_build_ops;
+static const struct snd_ac97_build_ops null_build_ops;
 
 #ifdef CONFIG_SND_AC97_POWER_SAVE
 static void do_update_power(struct work_struct *work)
diff --git a/sound/pci/ac97/ac97_patch.c b/sound/pci/ac97/ac97_patch.c
index e68c98ef4041..bf47574ca1f0 100644
--- a/sound/pci/ac97/ac97_patch.c
+++ b/sound/pci/ac97/ac97_patch.c
@@ -371,7 +371,7 @@ static int patch_yamaha_ymf743_build_spdif(struct snd_ac97 *ac97)
         return 0;
 }
 
-static struct snd_ac97_build_ops patch_yamaha_ymf743_ops = {
+static const struct snd_ac97_build_ops patch_yamaha_ymf743_ops = {
         .build_spdif    = patch_yamaha_ymf743_build_spdif,
         .build_3d       = patch_yamaha_ymf7x3_3d,
 };
@@ -455,7 +455,7 @@ static int patch_yamaha_ymf753_post_spdif(struct snd_ac97 * ac97)
         return 0;
 }
 
-static struct snd_ac97_build_ops patch_yamaha_ymf753_ops = {
+static const struct snd_ac97_build_ops patch_yamaha_ymf753_ops = {
         .build_3d       = patch_yamaha_ymf7x3_3d,
         .build_post_spdif = patch_yamaha_ymf753_post_spdif
 };
@@ -502,7 +502,7 @@ static int patch_wolfson_wm9703_specific(struct snd_ac97 * ac97)
         return 0;
 }
 
-static struct snd_ac97_build_ops patch_wolfson_wm9703_ops = {
+static const struct snd_ac97_build_ops patch_wolfson_wm9703_ops = {
         .build_specific = patch_wolfson_wm9703_specific,
 };
 
@@ -533,7 +533,7 @@ static int patch_wolfson_wm9704_specific(struct snd_ac97 * ac97)
         return 0;
 }
 
-static struct snd_ac97_build_ops patch_wolfson_wm9704_ops = {
+static const struct snd_ac97_build_ops patch_wolfson_wm9704_ops = {
         .build_specific = patch_wolfson_wm9704_specific,
 };
 
@@ -677,7 +677,7 @@ static int patch_wolfson_wm9711_specific(struct snd_ac97 * ac97)
         return 0;
 }
 
-static struct snd_ac97_build_ops patch_wolfson_wm9711_ops = {
+static const struct snd_ac97_build_ops patch_wolfson_wm9711_ops = {
         .build_specific = patch_wolfson_wm9711_specific,
 };
 
@@ -871,7 +871,7 @@ static void patch_wolfson_wm9713_resume (struct snd_ac97 * ac97)
 }
 #endif
 
-static struct snd_ac97_build_ops patch_wolfson_wm9713_ops = {
+static const struct snd_ac97_build_ops patch_wolfson_wm9713_ops = {
         .build_specific = patch_wolfson_wm9713_specific,
         .build_3d = patch_wolfson_wm9713_3d,
 #ifdef CONFIG_PM        
@@ -976,7 +976,7 @@ static int patch_sigmatel_stac97xx_specific(struct snd_ac97 * ac97)
         return 0;
 }
 
-static struct snd_ac97_build_ops patch_sigmatel_stac9700_ops = {
+static const struct snd_ac97_build_ops patch_sigmatel_stac9700_ops = {
         .build_3d       = patch_sigmatel_stac9700_3d,
         .build_specific = patch_sigmatel_stac97xx_specific
 };
@@ -1023,7 +1023,7 @@ static int patch_sigmatel_stac9708_specific(struct snd_ac97 *ac97)
         return patch_sigmatel_stac97xx_specific(ac97);
 }
 
-static struct snd_ac97_build_ops patch_sigmatel_stac9708_ops = {
+static const struct snd_ac97_build_ops patch_sigmatel_stac9708_ops = {
         .build_3d       = patch_sigmatel_stac9708_3d,
         .build_specific = patch_sigmatel_stac9708_specific
 };
@@ -1252,7 +1252,7 @@ static int patch_sigmatel_stac9758_specific(struct snd_ac97 *ac97)
         return 0;
 }
 
-static struct snd_ac97_build_ops patch_sigmatel_stac9758_ops = {
+static const struct snd_ac97_build_ops patch_sigmatel_stac9758_ops = {
         .build_3d       = patch_sigmatel_stac9700_3d,
         .build_specific = patch_sigmatel_stac9758_specific
 };
@@ -1327,7 +1327,7 @@ static int patch_cirrus_build_spdif(struct snd_ac97 * ac97)
         return 0;
 }
 
-static struct snd_ac97_build_ops patch_cirrus_ops = {
+static const struct snd_ac97_build_ops patch_cirrus_ops = {
         .build_spdif = patch_cirrus_build_spdif
 };
 
@@ -1384,7 +1384,7 @@ static int patch_conexant_build_spdif(struct snd_ac97 * ac97)
         return 0;
 }
 
-static struct snd_ac97_build_ops patch_conexant_ops = {
+static const struct snd_ac97_build_ops patch_conexant_ops = {
         .build_spdif = patch_conexant_build_spdif
 };
 
@@ -1560,7 +1560,7 @@ static void patch_ad1881_chained(struct snd_ac97 * ac97, int unchained_idx, int
         }
 }
 
-static struct snd_ac97_build_ops patch_ad1881_build_ops = {
+static const struct snd_ac97_build_ops patch_ad1881_build_ops = {
 #ifdef CONFIG_PM
         .resume = ad18xx_resume
 #endif
@@ -1647,7 +1647,7 @@ static int patch_ad1885_specific(struct snd_ac97 * ac97)
         return 0;
 }
 
-static struct snd_ac97_build_ops patch_ad1885_build_ops = {
+static const struct snd_ac97_build_ops patch_ad1885_build_ops = {
         .build_specific = &patch_ad1885_specific,
 #ifdef CONFIG_PM
         .resume = ad18xx_resume
@@ -1674,7 +1674,7 @@ static int patch_ad1886_specific(struct snd_ac97 * ac97)
         return 0;
 }
 
-static struct snd_ac97_build_ops patch_ad1886_build_ops = {
+static const struct snd_ac97_build_ops patch_ad1886_build_ops = {
         .build_specific = &patch_ad1886_specific,
 #ifdef CONFIG_PM
         .resume = ad18xx_resume
@@ -1881,7 +1881,7 @@ static int patch_ad1981a_specific(struct snd_ac97 * ac97)
                                     ARRAY_SIZE(snd_ac97_ad1981x_jack_sense));
 }
 
-static struct snd_ac97_build_ops patch_ad1981a_build_ops = {
+static const struct snd_ac97_build_ops patch_ad1981a_build_ops = {
         .build_post_spdif = patch_ad198x_post_spdif,
         .build_specific = patch_ad1981a_specific,
 #ifdef CONFIG_PM
@@ -1936,7 +1936,7 @@ static int patch_ad1981b_specific(struct snd_ac97 *ac97)
                                     ARRAY_SIZE(snd_ac97_ad1981x_jack_sense));
 }
 
-static struct snd_ac97_build_ops patch_ad1981b_build_ops = {
+static const struct snd_ac97_build_ops patch_ad1981b_build_ops = {
         .build_post_spdif = patch_ad198x_post_spdif,
         .build_specific = patch_ad1981b_specific,
 #ifdef CONFIG_PM
@@ -2075,7 +2075,7 @@ static int patch_ad1888_specific(struct snd_ac97 *ac97)
         return patch_build_controls(ac97, snd_ac97_ad1888_controls, ARRAY_SIZE(snd_ac97_ad1888_controls));
 }
 
-static struct snd_ac97_build_ops patch_ad1888_build_ops = {
+static const struct snd_ac97_build_ops patch_ad1888_build_ops = {
         .build_post_spdif = patch_ad198x_post_spdif,
         .build_specific = patch_ad1888_specific,
 #ifdef CONFIG_PM
@@ -2124,7 +2124,7 @@ static int patch_ad1980_specific(struct snd_ac97 *ac97)
         return patch_build_controls(ac97, &snd_ac97_ad198x_2cmic, 1);
 }
 
-static struct snd_ac97_build_ops patch_ad1980_build_ops = {
+static const struct snd_ac97_build_ops patch_ad1980_build_ops = {
         .build_post_spdif = patch_ad198x_post_spdif,
         .build_specific = patch_ad1980_specific,
 #ifdef CONFIG_PM
@@ -2239,7 +2239,7 @@ static int patch_ad1985_specific(struct snd_ac97 *ac97)
                                     ARRAY_SIZE(snd_ac97_ad1985_controls));
 }
 
-static struct snd_ac97_build_ops patch_ad1985_build_ops = {
+static const struct snd_ac97_build_ops patch_ad1985_build_ops = {
         .build_post_spdif = patch_ad198x_post_spdif,
         .build_specific = patch_ad1985_specific,
 #ifdef CONFIG_PM
@@ -2531,7 +2531,7 @@ static int patch_ad1986_specific(struct snd_ac97 *ac97)
                                     ARRAY_SIZE(snd_ac97_ad1985_controls));
 }
 
-static struct snd_ac97_build_ops patch_ad1986_build_ops = {
+static const struct snd_ac97_build_ops patch_ad1986_build_ops = {
         .build_post_spdif = patch_ad198x_post_spdif,
         .build_specific = patch_ad1986_specific,
 #ifdef CONFIG_PM
@@ -2636,7 +2636,7 @@ static int patch_alc650_specific(struct snd_ac97 * ac97)
         return 0;
 }
 
-static struct snd_ac97_build_ops patch_alc650_ops = {
+static const struct snd_ac97_build_ops patch_alc650_ops = {
         .build_specific = patch_alc650_specific,
         .update_jacks = alc650_update_jacks
 };
@@ -2788,7 +2788,7 @@ static int patch_alc655_specific(struct snd_ac97 * ac97)
         return 0;
 }
 
-static struct snd_ac97_build_ops patch_alc655_ops = {
+static const struct snd_ac97_build_ops patch_alc655_ops = {
         .build_specific = patch_alc655_specific,
         .update_jacks = alc655_update_jacks
 };
@@ -2900,7 +2900,7 @@ static int patch_alc850_specific(struct snd_ac97 *ac97)
         return 0;
 }
 
-static struct snd_ac97_build_ops patch_alc850_ops = {
+static const struct snd_ac97_build_ops patch_alc850_ops = {
         .build_specific = patch_alc850_specific,
         .update_jacks = alc850_update_jacks
 };
@@ -2962,7 +2962,7 @@ static int patch_cm9738_specific(struct snd_ac97 * ac97)
         return patch_build_controls(ac97, snd_ac97_cm9738_controls, ARRAY_SIZE(snd_ac97_cm9738_controls));
 }
 
-static struct snd_ac97_build_ops patch_cm9738_ops = {
+static const struct snd_ac97_build_ops patch_cm9738_ops = {
         .build_specific = patch_cm9738_specific,
         .update_jacks = cm9738_update_jacks
 };
@@ -3053,7 +3053,7 @@ static int patch_cm9739_post_spdif(struct snd_ac97 * ac97)
         return patch_build_controls(ac97, snd_ac97_cm9739_controls_spdif, ARRAY_SIZE(snd_ac97_cm9739_controls_spdif));
 }
 
-static struct snd_ac97_build_ops patch_cm9739_ops = {
+static const struct snd_ac97_build_ops patch_cm9739_ops = {
         .build_specific = patch_cm9739_specific,
         .build_post_spdif = patch_cm9739_post_spdif,
         .update_jacks = cm9739_update_jacks
@@ -3227,7 +3227,7 @@ static int patch_cm9761_specific(struct snd_ac97 * ac97)
         return patch_build_controls(ac97, snd_ac97_cm9761_controls, ARRAY_SIZE(snd_ac97_cm9761_controls));
 }
 
-static struct snd_ac97_build_ops patch_cm9761_ops = {
+static const struct snd_ac97_build_ops patch_cm9761_ops = {
         .build_specific = patch_cm9761_specific,
         .build_post_spdif = patch_cm9761_post_spdif,
         .update_jacks = cm9761_update_jacks
@@ -3323,7 +3323,7 @@ static int patch_cm9780_specific(struct snd_ac97 *ac97)
         return patch_build_controls(ac97, cm9780_controls, ARRAY_SIZE(cm9780_controls));
 }
 
-static struct snd_ac97_build_ops patch_cm9780_ops = {
+static const struct snd_ac97_build_ops patch_cm9780_ops = {
         .build_specific = patch_cm9780_specific,
         .build_post_spdif = patch_cm9761_post_spdif     /* identical with CM9761 */
 };
@@ -3443,7 +3443,7 @@ static int patch_vt1616_specific(struct snd_ac97 * ac97)
         return 0;
 }
 
-static struct snd_ac97_build_ops patch_vt1616_ops = {
+static const struct snd_ac97_build_ops patch_vt1616_ops = {
         .build_specific = patch_vt1616_specific
 };
 
@@ -3797,7 +3797,7 @@ static int patch_it2646_specific(struct snd_ac97 * ac97)
         return 0;
 }
 
-static struct snd_ac97_build_ops patch_it2646_ops = {
+static const struct snd_ac97_build_ops patch_it2646_ops = {
         .build_specific = patch_it2646_specific,
         .update_jacks = it2646_update_jacks
 };
@@ -3831,7 +3831,7 @@ static int patch_si3036_specific(struct snd_ac97 * ac97)
         return 0;
 }
 
-static struct snd_ac97_build_ops patch_si3036_ops = {
+static const struct snd_ac97_build_ops patch_si3036_ops = {
         .build_specific = patch_si3036_specific,
 };
 
@@ -3898,7 +3898,7 @@ static int patch_ucb1400_specific(struct snd_ac97 * ac97)
         return 0;
 }
 
-static struct snd_ac97_build_ops patch_ucb1400_ops = {
+static const struct snd_ac97_build_ops patch_ucb1400_ops = {
         .build_specific = patch_ucb1400_specific,
 };
 
diff --git a/sound/pci/au88x0/au88x0_pcm.c b/sound/pci/au88x0/au88x0_pcm.c
index b9d2f202cf9b..5439d662d104 100644
--- a/sound/pci/au88x0/au88x0_pcm.c
+++ b/sound/pci/au88x0/au88x0_pcm.c
@@ -42,11 +42,7 @@ static struct snd_pcm_hardware snd_vortex_playback_hw_adb = {
         .rate_min = 5000,
         .rate_max = 48000,
         .channels_min = 1,
-#ifdef CHIP_AU8830
-        .channels_max = 4,
-#else
         .channels_max = 2,
-#endif
         .buffer_bytes_max = 0x10000,
         .period_bytes_min = 0x1,
         .period_bytes_max = 0x1000,
@@ -115,6 +111,17 @@ static struct snd_pcm_hardware snd_vortex_playback_hw_wt = {
         .periods_max = 64,
 };
 #endif
+#ifdef CHIP_AU8830
+static unsigned int au8830_channels[3] = {
+        1, 2, 4,
+};
+
+static struct snd_pcm_hw_constraint_list hw_constraints_au8830_channels = {
+        .count = ARRAY_SIZE(au8830_channels),
+        .list = au8830_channels,
+        .mask = 0,
+};
+#endif
 /* open callback */
 static int snd_vortex_pcm_open(struct snd_pcm_substream *substream)
 {
@@ -156,6 +163,15 @@ static int snd_vortex_pcm_open(struct snd_pcm_substream *substream)
                 if (VORTEX_PCM_TYPE(substream->pcm) == VORTEX_PCM_ADB
                     || VORTEX_PCM_TYPE(substream->pcm) == VORTEX_PCM_I2S)
                         runtime->hw = snd_vortex_playback_hw_adb;
+#ifdef CHIP_AU8830
+                if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK &&
+                        VORTEX_PCM_TYPE(substream->pcm) == VORTEX_PCM_ADB) {
+                        runtime->hw.channels_max = 4;
+                        snd_pcm_hw_constraint_list(runtime, 0,
+                                SNDRV_PCM_HW_PARAM_CHANNELS,
+                                &hw_constraints_au8830_channels);
+                }
+#endif
                 substream->runtime->private_data = NULL;
         }
 #ifndef CHIP_AU8810
diff --git a/sound/pci/hda/hda_codec.c b/sound/pci/hda/hda_codec.c
index 05e5ec88c2d9..ae5c5d5e4b7c 100644
--- a/sound/pci/hda/hda_codec.c
+++ b/sound/pci/hda/hda_codec.c
@@ -2134,10 +2134,10 @@ int snd_hda_codec_reset(struct hda_codec *codec)
  * This function returns zero if successful or a negative error code.
  */
 int snd_hda_add_vmaster(struct hda_codec *codec, char *name,
-                        unsigned int *tlv, const char **slaves)
+                        unsigned int *tlv, const char * const *slaves)
 {
         struct snd_kcontrol *kctl;
-        const char **s;
+        const char * const *s;
         int err;
 
         for (s = slaves; *s && !snd_hda_find_mixer_ctl(codec, *s); s++)
@@ -3689,7 +3689,7 @@ EXPORT_SYMBOL_HDA(snd_hda_build_pcms);
  * If no entries are matching, the function returns a negative value.
  */
 int snd_hda_check_board_config(struct hda_codec *codec,
-                               int num_configs, const char **models,
+                               int num_configs, const char * const *models,
                                const struct snd_pci_quirk *tbl)
 {
         if (codec->modelname && models) {
@@ -3753,7 +3753,7 @@ EXPORT_SYMBOL_HDA(snd_hda_check_board_config);
  * If no entries are matching, the function returns a negative value.
  */
 int snd_hda_check_board_codec_sid_config(struct hda_codec *codec,
-                               int num_configs, const char **models,
+                               int num_configs, const char * const *models,
                                const struct snd_pci_quirk *tbl)
 {
         const struct snd_pci_quirk *q;
@@ -4690,7 +4690,7 @@ const char *hda_get_input_pin_label(struct hda_codec *codec, hda_nid_t pin,
                                         int check_location)
 {
         unsigned int def_conf;
-        static const char *mic_names[] = {
+        static const char * const mic_names[] = {
                 "Internal Mic", "Dock Mic", "Mic", "Front Mic", "Rear Mic",
         };
         int attr;
diff --git a/sound/pci/hda/hda_generic.c b/sound/pci/hda/hda_generic.c
index fb0582f8d725..a63c54d9d767 100644
--- a/sound/pci/hda/hda_generic.c
+++ b/sound/pci/hda/hda_generic.c
@@ -762,7 +762,8 @@ static int check_existing_control(struct hda_codec *codec, const char *type, con
 /*
  * build output mixer controls
  */
-static int create_output_mixers(struct hda_codec *codec, const char **names)
+static int create_output_mixers(struct hda_codec *codec,
+                                const char * const *names)
 {
         struct hda_gspec *spec = codec->spec;
         int i, err;
@@ -780,8 +781,8 @@ static int create_output_mixers(struct hda_codec *codec, const char **names)
 static int build_output_controls(struct hda_codec *codec)
 {
         struct hda_gspec *spec = codec->spec;
-        static const char *types_speaker[] = { "Speaker", "Headphone" };
-        static const char *types_line[] = { "Front", "Headphone" };
+        static const char * const types_speaker[] = { "Speaker", "Headphone" };
+        static const char * const types_line[] = { "Front", "Headphone" };
 
         switch (spec->pcm_vol_nodes) {
         case 1:
diff --git a/sound/pci/hda/hda_intel.c b/sound/pci/hda/hda_intel.c
index d3d18be483e1..2e91a991eb15 100644
--- a/sound/pci/hda/hda_intel.c
+++ b/sound/pci/hda/hda_intel.c
@@ -2809,6 +2809,8 @@ static DEFINE_PCI_DEVICE_TABLE(azx_ids) = {
 #endif
         /* Vortex86MX */
         { PCI_DEVICE(0x17f3, 0x3010), .driver_data = AZX_DRIVER_GENERIC },
+        /* VMware HDAudio */
+        { PCI_DEVICE(0x15ad, 0x1977), .driver_data = AZX_DRIVER_GENERIC },
         /* AMD/ATI Generic, PCI class code and Vendor ID for HD Audio */
         { PCI_DEVICE(PCI_VENDOR_ID_ATI, PCI_ANY_ID),
           .class = PCI_CLASS_MULTIMEDIA_HD_AUDIO << 8,
diff --git a/sound/pci/hda/hda_local.h b/sound/pci/hda/hda_local.h
index 46bbefe2e4a9..3ab5e7a303db 100644
--- a/sound/pci/hda/hda_local.h
+++ b/sound/pci/hda/hda_local.h
@@ -140,7 +140,7 @@ void snd_hda_set_vmaster_tlv(struct hda_codec *codec, hda_nid_t nid, int dir,
 struct snd_kcontrol *snd_hda_find_mixer_ctl(struct hda_codec *codec,
                                             const char *name);
 int snd_hda_add_vmaster(struct hda_codec *codec, char *name,
-                        unsigned int *tlv, const char **slaves);
+                        unsigned int *tlv, const char * const *slaves);
 int snd_hda_codec_reset(struct hda_codec *codec);
 
 /* amp value bits */
@@ -341,10 +341,10 @@ void snd_print_pcm_bits(int pcm, char *buf, int buflen);
  * Misc
  */
 int snd_hda_check_board_config(struct hda_codec *codec, int num_configs,
-                               const char **modelnames,
+                               const char * const *modelnames,
                                const struct snd_pci_quirk *pci_list);
 int snd_hda_check_board_codec_sid_config(struct hda_codec *codec,
-                               int num_configs, const char **models,
+                               int num_configs, const char * const *models,
                                const struct snd_pci_quirk *tbl);
 int snd_hda_add_new_ctls(struct hda_codec *codec,
                          struct snd_kcontrol_new *knew);
diff --git a/sound/pci/hda/hda_proc.c b/sound/pci/hda/hda_proc.c
index f025200f2a62..bfe74c2fb079 100644
--- a/sound/pci/hda/hda_proc.c
+++ b/sound/pci/hda/hda_proc.c
@@ -418,7 +418,7 @@ static void print_digital_conv(struct snd_info_buffer *buffer,
 
 static const char *get_pwr_state(u32 state)
 {
-        static const char *buf[4] = {
+        static const char * const buf[4] = {
                 "D0", "D1", "D2", "D3"
         };
         if (state < 4)
diff --git a/sound/pci/hda/patch_analog.c b/sound/pci/hda/patch_analog.c
index 46780670162b..8dabab798689 100644
--- a/sound/pci/hda/patch_analog.c
+++ b/sound/pci/hda/patch_analog.c
@@ -46,6 +46,9 @@ struct ad198x_spec {
         unsigned int cur_eapd;
         unsigned int need_dac_fix;
 
+        hda_nid_t *alt_dac_nid;
+        struct hda_pcm_stream *stream_analog_alt_playback;
+
         /* capture */
         unsigned int num_adc_nids;
         hda_nid_t *adc_nids;
@@ -81,8 +84,8 @@ struct ad198x_spec {
 #endif
         /* for virtual master */
         hda_nid_t vmaster_nid;
-        const char **slave_vols;
-        const char **slave_sws;
+        const char * const *slave_vols;
+        const char * const *slave_sws;
 };
 
 /*
@@ -130,7 +133,7 @@ static int ad198x_init(struct hda_codec *codec)
         return 0;
 }
 
-static const char *ad_slave_vols[] = {
+static const char * const ad_slave_vols[] = {
         "Front Playback Volume",
         "Surround Playback Volume",
         "Center Playback Volume",
@@ -143,7 +146,7 @@ static const char *ad_slave_vols[] = {
         NULL
 };
 
-static const char *ad_slave_sws[] = {
+static const char * const ad_slave_sws[] = {
         "Front Playback Switch",
         "Surround Playback Switch",
         "Center Playback Switch",
@@ -156,6 +159,25 @@ static const char *ad_slave_sws[] = {
         NULL
 };
 
+static const char * const ad1988_6stack_fp_slave_vols[] = {
+        "Front Playback Volume",
+        "Surround Playback Volume",
+        "Center Playback Volume",
+        "LFE Playback Volume",
+        "Side Playback Volume",
+        "IEC958 Playback Volume",
+        NULL
+};
+
+static const char * const ad1988_6stack_fp_slave_sws[] = {
+        "Front Playback Switch",
+        "Surround Playback Switch",
+        "Center Playback Switch",
+        "LFE Playback Switch",
+        "Side Playback Switch",
+        "IEC958 Playback Switch",
+        NULL
+};
 static void ad198x_free_kctls(struct hda_codec *codec);
 
 #ifdef CONFIG_SND_HDA_INPUT_BEEP
@@ -309,6 +331,38 @@ static int ad198x_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
         return snd_hda_multi_out_analog_cleanup(codec, &spec->multiout);
 }
 
+static int ad198x_alt_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
+                                struct hda_codec *codec,
+                                unsigned int stream_tag,
+                                unsigned int format,
+                                struct snd_pcm_substream *substream)
+{
+        struct ad198x_spec *spec = codec->spec;
+        snd_hda_codec_setup_stream(codec, spec->alt_dac_nid[0], stream_tag,
+                                        0, format);
+        return 0;
+}
+
+static int ad198x_alt_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
+                                struct hda_codec *codec,
+                                struct snd_pcm_substream *substream)
+{
+        struct ad198x_spec *spec = codec->spec;
+        snd_hda_codec_cleanup_stream(codec, spec->alt_dac_nid[0]);
+        return 0;
+}
+
+static struct hda_pcm_stream ad198x_pcm_analog_alt_playback = {
+        .substreams = 1,
+        .channels_min = 2,
+        .channels_max = 2,
+        /* NID is set in ad198x_build_pcms */
+        .ops = {
+                .prepare = ad198x_alt_playback_pcm_prepare,
+                .cleanup = ad198x_alt_playback_pcm_cleanup
+        },
+};
+
 /*
  * Digital out
  */
@@ -446,6 +500,17 @@ static int ad198x_build_pcms(struct hda_codec *codec)
                 }
         }
 
+        if (spec->alt_dac_nid && spec->stream_analog_alt_playback) {
+                codec->num_pcms++;
+                info = spec->pcm_rec + 2;
+                info->name = "AD198x Headphone";
+                info->pcm_type = HDA_PCM_TYPE_AUDIO;
+                info->stream[SNDRV_PCM_STREAM_PLAYBACK] =
+                        *spec->stream_analog_alt_playback;
+                info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid =
+                        spec->alt_dac_nid[0];
+        }
+
         return 0;
 }
 
@@ -1069,7 +1134,7 @@ enum {
         AD1986A_MODELS
 };
 
-static const char *ad1986a_models[AD1986A_MODELS] = {
+static const char * const ad1986a_models[AD1986A_MODELS] = {
         [AD1986A_6STACK]        = "6stack",
         [AD1986A_3STACK]        = "3stack",
         [AD1986A_LAPTOP]        = "laptop",
@@ -1813,7 +1878,7 @@ enum {
         AD1981_MODELS
 };
 
-static const char *ad1981_models[AD1981_MODELS] = {
+static const char * const ad1981_models[AD1981_MODELS] = {
         [AD1981_HP]             = "hp",
         [AD1981_THINKPAD]       = "thinkpad",
         [AD1981_BASIC]          = "basic",
@@ -2015,6 +2080,7 @@ static int patch_ad1981(struct hda_codec *codec)
 enum {
         AD1988_6STACK,
         AD1988_6STACK_DIG,
+        AD1988_6STACK_DIG_FP,
         AD1988_3STACK,
         AD1988_3STACK_DIG,
         AD1988_LAPTOP,
@@ -2047,6 +2113,10 @@ static hda_nid_t ad1988_6stack_dac_nids_rev2[4] = {
         0x04, 0x05, 0x0a, 0x06
 };
 
+static hda_nid_t ad1988_alt_dac_nid[1] = {
+        0x03
+};
+
 static hda_nid_t ad1988_3stack_dac_nids_rev2[3] = {
         0x04, 0x0a, 0x06
 };
@@ -2166,6 +2236,35 @@ static struct snd_kcontrol_new ad1988_6stack_mixers2[] = {
         { } /* end */
 };
 
+static struct snd_kcontrol_new ad1988_6stack_fp_mixers[] = {
+        HDA_CODEC_VOLUME("Headphone Playback Volume", 0x03, 0x0, HDA_OUTPUT),
+
+        HDA_BIND_MUTE("Front Playback Switch", 0x29, 2, HDA_INPUT),
+        HDA_BIND_MUTE("Surround Playback Switch", 0x2a, 2, HDA_INPUT),
+        HDA_BIND_MUTE_MONO("Center Playback Switch", 0x27, 1, 2, HDA_INPUT),
+        HDA_BIND_MUTE_MONO("LFE Playback Switch", 0x27, 2, 2, HDA_INPUT),
+        HDA_BIND_MUTE("Side Playback Switch", 0x28, 2, HDA_INPUT),
+        HDA_BIND_MUTE("Headphone Playback Switch", 0x22, 2, HDA_INPUT),
+        HDA_BIND_MUTE("Mono Playback Switch", 0x1e, 2, HDA_INPUT),
+
+        HDA_CODEC_VOLUME("CD Playback Volume", 0x20, 0x6, HDA_INPUT),
+        HDA_CODEC_MUTE("CD Playback Switch", 0x20, 0x6, HDA_INPUT),
+        HDA_CODEC_VOLUME("Front Mic Playback Volume", 0x20, 0x0, HDA_INPUT),
+        HDA_CODEC_MUTE("Front Mic Playback Switch", 0x20, 0x0, HDA_INPUT),
+        HDA_CODEC_VOLUME("Line Playback Volume", 0x20, 0x1, HDA_INPUT),
+        HDA_CODEC_MUTE("Line Playback Switch", 0x20, 0x1, HDA_INPUT),
+        HDA_CODEC_VOLUME("Mic Playback Volume", 0x20, 0x4, HDA_INPUT),
+        HDA_CODEC_MUTE("Mic Playback Switch", 0x20, 0x4, HDA_INPUT),
+
+        HDA_CODEC_VOLUME("Analog Mix Playback Volume", 0x21, 0x0, HDA_OUTPUT),
+        HDA_CODEC_MUTE("Analog Mix Playback Switch", 0x21, 0x0, HDA_OUTPUT),
+
+        HDA_CODEC_VOLUME("Front Mic Boost Volume", 0x39, 0x0, HDA_OUTPUT),
+        HDA_CODEC_VOLUME("Mic Boost Volume", 0x3c, 0x0, HDA_OUTPUT),
+
+        { } /* end */
+};
+
 /* 3-stack mode */
 static struct snd_kcontrol_new ad1988_3stack_mixers1[] = {
         HDA_CODEC_VOLUME("Front Playback Volume", 0x04, 0x0, HDA_OUTPUT),
@@ -2445,6 +2544,68 @@ static struct hda_verb ad1988_6stack_init_verbs[] = {
         { }
 };
 
+static struct hda_verb ad1988_6stack_fp_init_verbs[] = {
+        /* Front, Surround, CLFE, side DAC; unmute as default */
+        {0x04, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE},
+        {0x06, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE},
+        {0x05, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE},
+        {0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE},
+        /* Headphone; unmute as default */
+        {0x03, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE},
+        /* Port-A front headphon path */
+        {0x37, AC_VERB_SET_CONNECT_SEL, 0x00}, /* DAC0:03h */
+        {0x22, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)},
+        {0x22, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(1)},
+        {0x11, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE},
+        {0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_HP},
+        /* Port-D line-out path */
+        {0x29, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)},
+        {0x29, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(1)},
+        {0x12, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE},
+        {0x12, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
+        /* Port-F surround path */
+        {0x2a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)},
+        {0x2a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(1)},
+        {0x16, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE},
+        {0x16, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
+        /* Port-G CLFE path */
+        {0x27, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)},
+        {0x27, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(1)},
+        {0x24, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE},
+        {0x24, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
+        /* Port-H side path */
+        {0x28, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)},
+        {0x28, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(1)},
+        {0x25, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE},
+        {0x25, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
+        /* Mono out path */
+        {0x36, AC_VERB_SET_CONNECT_SEL, 0x1}, /* DAC1:04h */
+        {0x1e, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)},
+        {0x1e, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(1)},
+        {0x13, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
+        {0x13, AC_VERB_SET_AMP_GAIN_MUTE, 0xb01f}, /* unmute, 0dB */
+        /* Port-B front mic-in path */
+        {0x14, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE},
+        {0x14, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80},
+        {0x39, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_ZERO},
+        /* Port-C line-in path */
+        {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE},
+        {0x15, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_IN},
+        {0x3a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_ZERO},
+        {0x33, AC_VERB_SET_CONNECT_SEL, 0x0},
+        /* Port-E mic-in path */
+        {0x17, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE},
+        {0x17, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80},
+        {0x3c, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_ZERO},
+        {0x34, AC_VERB_SET_CONNECT_SEL, 0x0},
+        /* Analog CD Input */
+        {0x18, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_IN},
+        /* Analog Mix output amp */
+        {0x21, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE | 0x1f}, /* 0dB */
+
+        { }
+};
+
 static struct hda_verb ad1988_capture_init_verbs[] = {
         /* mute analog mix */
         {0x20, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)},
@@ -2792,7 +2953,9 @@ static int ad1988_auto_create_multi_out_ctls(struct ad198x_spec *spec,
                                              const struct auto_pin_cfg *cfg)
 {
         char name[32];
-        static const char *chname[4] = { "Front", "Surround", NULL /*CLFE*/, "Side" };
+        static const char * const chname[4] = {
+                "Front", "Surround", NULL /*CLFE*/, "Side"
+        };
         hda_nid_t nid;
         int i, err;
 
@@ -3074,13 +3237,13 @@ static int ad1988_auto_init(struct hda_codec *codec)
         return 0;
 }
 
-
 /*
  */
 
-static const char *ad1988_models[AD1988_MODEL_LAST] = {
+static const char * const ad1988_models[AD1988_MODEL_LAST] = {
         [AD1988_6STACK]         = "6stack",
         [AD1988_6STACK_DIG]     = "6stack-dig",
+        [AD1988_6STACK_DIG_FP]  = "6stack-dig-fp",
         [AD1988_3STACK]         = "3stack",
         [AD1988_3STACK_DIG]     = "3stack-dig",
         [AD1988_LAPTOP]         = "laptop",
@@ -3140,6 +3303,7 @@ static int patch_ad1988(struct hda_codec *codec)
         switch (board_config) {
         case AD1988_6STACK:
         case AD1988_6STACK_DIG:
+        case AD1988_6STACK_DIG_FP:
                 spec->multiout.max_channels = 8;
                 spec->multiout.num_dacs = 4;
                 if (is_rev2(codec))
@@ -3152,10 +3316,22 @@ static int patch_ad1988(struct hda_codec *codec)
                         spec->mixers[0] = ad1988_6stack_mixers1_rev2;
                 else
                         spec->mixers[0] = ad1988_6stack_mixers1;
-                spec->mixers[1] = ad1988_6stack_mixers2;
+                if (board_config == AD1988_6STACK_DIG_FP) {
+                        spec->mixers[1] = ad1988_6stack_fp_mixers;
+                        spec->slave_vols = ad1988_6stack_fp_slave_vols;
+                        spec->slave_sws = ad1988_6stack_fp_slave_sws;
+                        spec->alt_dac_nid = ad1988_alt_dac_nid;
+                        spec->stream_analog_alt_playback =
+                                &ad198x_pcm_analog_alt_playback;
+                } else
+                        spec->mixers[1] = ad1988_6stack_mixers2;
                 spec->num_init_verbs = 1;
-                spec->init_verbs[0] = ad1988_6stack_init_verbs;
-                if (board_config == AD1988_6STACK_DIG) {
+                if (board_config == AD1988_6STACK_DIG_FP)
+                        spec->init_verbs[0] = ad1988_6stack_fp_init_verbs;
+                else
+                        spec->init_verbs[0] = ad1988_6stack_init_verbs;
+                if ((board_config == AD1988_6STACK_DIG) ||
+                        (board_config == AD1988_6STACK_DIG_FP)) {
                         spec->multiout.dig_out_nid = AD1988_SPDIF_OUT;
                         spec->dig_in_nid = AD1988_SPDIF_IN;
                 }
@@ -3399,7 +3575,7 @@ static struct hda_amp_list ad1884_loopbacks[] = {
 };
 #endif
 
-static const char *ad1884_slave_vols[] = {
+static const char * const ad1884_slave_vols[] = {
         "PCM Playback Volume",
         "Mic Playback Volume",
         "Mono Playback Volume",
@@ -3637,7 +3813,7 @@ enum {
         AD1984_MODELS
 };
 
-static const char *ad1984_models[AD1984_MODELS] = {
+static const char * const ad1984_models[AD1984_MODELS] = {
         [AD1984_BASIC]          = "basic",
         [AD1984_THINKPAD]       = "thinkpad",
         [AD1984_DELL_DESKTOP]   = "dell_desktop",
@@ -4308,7 +4484,7 @@ enum {
         AD1884A_MODELS
 };
 
-static const char *ad1884a_models[AD1884A_MODELS] = {
+static const char * const ad1884a_models[AD1884A_MODELS] = {
         [AD1884A_DESKTOP]       = "desktop",
         [AD1884A_LAPTOP]        = "laptop",
         [AD1884A_MOBILE]        = "mobile",
@@ -4696,7 +4872,7 @@ enum {
         AD1882_MODELS
 };
 
-static const char *ad1882_models[AD1986A_MODELS] = {
+static const char * const ad1882_models[AD1986A_MODELS] = {
         [AD1882_3STACK]         = "3stack",
         [AD1882_6STACK]         = "6stack",
 };
diff --git a/sound/pci/hda/patch_cirrus.c b/sound/pci/hda/patch_cirrus.c
index 18af38ebf757..a07b031090d8 100644
--- a/sound/pci/hda/patch_cirrus.c
+++ b/sound/pci/hda/patch_cirrus.c
@@ -490,7 +490,7 @@ static int parse_digital_input(struct hda_codec *codec)
  * create mixer controls
  */
 
-static const char *dir_sfx[2] = { "Playback", "Capture" };
+static const char * const dir_sfx[2] = { "Playback", "Capture" };
 
 static int add_mute(struct hda_codec *codec, const char *name, int index,
                     unsigned int pval, int dir, struct snd_kcontrol **kctlp)
@@ -1156,7 +1156,7 @@ static int cs_parse_auto_config(struct hda_codec *codec)
         return 0;
 }
 
-static const char *cs420x_models[CS420X_MODELS] = {
+static const char * const cs420x_models[CS420X_MODELS] = {
         [CS420X_MBP53] = "mbp53",
         [CS420X_MBP55] = "mbp55",
         [CS420X_IMAC27] = "imac27",
diff --git a/sound/pci/hda/patch_cmedia.c b/sound/pci/hda/patch_cmedia.c
index ff60908f4554..1f8bbcd0f802 100644
--- a/sound/pci/hda/patch_cmedia.c
+++ b/sound/pci/hda/patch_cmedia.c
@@ -608,7 +608,7 @@ static void cmi9880_free(struct hda_codec *codec)
 /*
  */
 
-static const char *cmi9880_models[CMI_MODELS] = {
+static const char * const cmi9880_models[CMI_MODELS] = {
         [CMI_MINIMAL]   = "minimal",
         [CMI_MIN_FP]    = "min_fp",
         [CMI_FULL]      = "full",
diff --git a/sound/pci/hda/patch_conexant.c b/sound/pci/hda/patch_conexant.c
index e96581fcdbdb..9bb030a469cd 100644
--- a/sound/pci/hda/patch_conexant.c
+++ b/sound/pci/hda/patch_conexant.c
@@ -537,13 +537,13 @@ static struct snd_kcontrol_new cxt_beep_mixer[] = {
 };
 #endif
 
-static const char *slave_vols[] = {
+static const char * const slave_vols[] = {
         "Headphone Playback Volume",
         "Speaker Playback Volume",
         NULL
 };
 
-static const char *slave_sws[] = {
+static const char * const slave_sws[] = {
         "Headphone Playback Switch",
         "Speaker Playback Switch",
         NULL
@@ -1134,7 +1134,7 @@ enum {
         CXT5045_MODELS
 };
 
-static const char *cxt5045_models[CXT5045_MODELS] = {
+static const char * const cxt5045_models[CXT5045_MODELS] = {
         [CXT5045_LAPTOP_HPSENSE]        = "laptop-hpsense",
         [CXT5045_LAPTOP_MICSENSE]       = "laptop-micsense",
         [CXT5045_LAPTOP_HPMICSENSE]     = "laptop-hpmicsense",
@@ -1579,7 +1579,7 @@ enum {
         CXT5047_MODELS
 };
 
-static const char *cxt5047_models[CXT5047_MODELS] = {
+static const char * const cxt5047_models[CXT5047_MODELS] = {
         [CXT5047_LAPTOP]        = "laptop",
         [CXT5047_LAPTOP_HP]     = "laptop-hp",
         [CXT5047_LAPTOP_EAPD]   = "laptop-eapd",
@@ -1995,7 +1995,7 @@ enum {
         CXT5051_MODELS
 };
 
-static const char *cxt5051_models[CXT5051_MODELS] = {
+static const char *const cxt5051_models[CXT5051_MODELS] = {
         [CXT5051_LAPTOP]        = "laptop",
         [CXT5051_HP]            = "hp",
         [CXT5051_HP_DV6736]     = "hp-dv6736",
@@ -3084,7 +3084,7 @@ enum {
         CXT5066_MODELS
 };
 
-static const char *cxt5066_models[CXT5066_MODELS] = {
+static const char * const cxt5066_models[CXT5066_MODELS] = {
         [CXT5066_LAPTOP]        = "laptop",
         [CXT5066_DELL_LAPTOP]   = "dell-laptop",
         [CXT5066_OLPC_XO_1_5]   = "olpc-xo-1_5",
@@ -3746,7 +3746,7 @@ static int cx_auto_build_output_controls(struct hda_codec *codec)
         struct conexant_spec *spec = codec->spec;
         int i, err;
         int num_line = 0, num_hp = 0, num_spk = 0;
-        static const char *texts[3] = { "Front", "Surround", "CLFE" };
+        static const char * const texts[3] = { "Front", "Surround", "CLFE" };
 
         if (spec->dac_info_filled == 1)
                 return cx_auto_add_pb_volume(codec, spec->dac_info[0].dac,
diff --git a/sound/pci/hda/patch_hdmi.c b/sound/pci/hda/patch_hdmi.c
index f29b97b5de8f..2d5b83fa8d24 100644
--- a/sound/pci/hda/patch_hdmi.c
+++ b/sound/pci/hda/patch_hdmi.c
@@ -817,6 +817,7 @@ static int hdmi_pcm_open(struct hda_pcm_stream *hinfo,
         struct hdmi_spec *spec = codec->spec;
         struct hdmi_eld *eld;
         struct hda_pcm_stream *codec_pars;
+        struct snd_pcm_runtime *runtime = substream->runtime;
         unsigned int idx;
 
         for (idx = 0; idx < spec->num_cvts; idx++)
@@ -844,6 +845,14 @@ static int hdmi_pcm_open(struct hda_pcm_stream *hinfo,
                 hinfo->formats = codec_pars->formats;
                 hinfo->maxbps = codec_pars->maxbps;
         }
+        /* store the updated parameters */
+        runtime->hw.channels_min = hinfo->channels_min;
+        runtime->hw.channels_max = hinfo->channels_max;
+        runtime->hw.formats = hinfo->formats;
+        runtime->hw.rates = hinfo->rates;
+
+        snd_pcm_hw_constraint_step(substream->runtime, 0,
+                                   SNDRV_PCM_HW_PARAM_CHANNELS, 2);
         return 0;
 }
 
@@ -1238,6 +1247,9 @@ static int simple_playback_pcm_open(struct hda_pcm_stream *hinfo,
                 snd_pcm_hw_constraint_list(substream->runtime, 0,
                                 SNDRV_PCM_HW_PARAM_CHANNELS,
                                 hw_constraints_channels);
+        } else {
+                snd_pcm_hw_constraint_step(substream->runtime, 0,
+                                           SNDRV_PCM_HW_PARAM_CHANNELS, 2);
         }
 
         return snd_hda_multi_out_dig_open(codec, &spec->multiout);
diff --git a/sound/pci/hda/patch_realtek.c b/sound/pci/hda/patch_realtek.c
index 51c08edd7563..269dbff70b92 100644
--- a/sound/pci/hda/patch_realtek.c
+++ b/sound/pci/hda/patch_realtek.c
@@ -303,6 +303,8 @@ struct alc_customize_define {
         unsigned int  fixup:1; /* Means that this sku is set by driver, not read from hw */
 };
 
+struct alc_fixup;
+
 struct alc_spec {
         /* codec parameterization */
         struct snd_kcontrol_new *mixers[5];     /* mixer arrays */
@@ -404,6 +406,11 @@ struct alc_spec {
         /* for PLL fix */
         hda_nid_t pll_nid;
         unsigned int pll_coef_idx, pll_coef_bit;
+
+        /* fix-up list */
+        int fixup_id;
+        const struct alc_fixup *fixup_list;
+        const char *fixup_name;
 };
 
 /*
@@ -1683,88 +1690,131 @@ struct alc_model_fixup {
 };
 
 struct alc_fixup {
-        unsigned int sku;
-        const struct alc_pincfg *pins;
-        const struct hda_verb *verbs;
-        void (*func)(struct hda_codec *codec, const struct alc_fixup *fix,
-                     int pre_init);
+        int type;
+        bool chained;
+        int chain_id;
+        union {
+                unsigned int sku;
+                const struct alc_pincfg *pins;
+                const struct hda_verb *verbs;
+                void (*func)(struct hda_codec *codec,
+                             const struct alc_fixup *fix,
+                             int action);
+        } v;
 };
 
-static void __alc_pick_fixup(struct hda_codec *codec,
-                             const struct alc_fixup *fix,
-                             const char *modelname,
-                             int pre_init)
+enum {
+        ALC_FIXUP_INVALID,
+        ALC_FIXUP_SKU,
+        ALC_FIXUP_PINS,
+        ALC_FIXUP_VERBS,
+        ALC_FIXUP_FUNC,
+};
+
+enum {
+        ALC_FIXUP_ACT_PRE_PROBE,
+        ALC_FIXUP_ACT_PROBE,
+        ALC_FIXUP_ACT_INIT,
+};
+
+static void alc_apply_fixup(struct hda_codec *codec, int action)
 {
-        const struct alc_pincfg *cfg;
-        struct alc_spec *spec;
+        struct alc_spec *spec = codec->spec;
+        int id = spec->fixup_id;
+        const char *modelname = spec->fixup_name;
+        int depth = 0;
 
-        cfg = fix->pins;
-        if (pre_init && fix->sku) {
-#ifdef CONFIG_SND_DEBUG_VERBOSE
-                snd_printdd(KERN_INFO "hda_codec: %s: Apply sku override for %s\n",
-                            codec->chip_name, modelname);
-#endif
-                spec = codec->spec;
-                spec->cdefine.sku_cfg = fix->sku;
-                spec->cdefine.fixup = 1;
-        }
-        if (pre_init && cfg) {
-#ifdef CONFIG_SND_DEBUG_VERBOSE
-                snd_printdd(KERN_INFO "hda_codec: %s: Apply pincfg for %s\n",
-                            codec->chip_name, modelname);
-#endif
-                for (; cfg->nid; cfg++)
-                        snd_hda_codec_set_pincfg(codec, cfg->nid, cfg->val);
-        }
-        if (!pre_init && fix->verbs) {
-#ifdef CONFIG_SND_DEBUG_VERBOSE
-                snd_printdd(KERN_INFO "hda_codec: %s: Apply fix-verbs for %s\n",
-                            codec->chip_name, modelname);
-#endif
-                add_verb(codec->spec, fix->verbs);
-        }
-        if (fix->func) {
-#ifdef CONFIG_SND_DEBUG_VERBOSE
-                snd_printdd(KERN_INFO "hda_codec: %s: Apply fix-func for %s\n",
-                            codec->chip_name, modelname);
-#endif
-                fix->func(codec, fix, pre_init);
+        if (!spec->fixup_list)
+                return;
+
+        while (id >= 0) {
+                const struct alc_fixup *fix = spec->fixup_list + id;
+                const struct alc_pincfg *cfg;
+
+                switch (fix->type) {
+                case ALC_FIXUP_SKU:
+                        if (action != ALC_FIXUP_ACT_PRE_PROBE || !fix->v.sku)
+                                break;;
+                        snd_printdd(KERN_INFO "hda_codec: %s: "
+                                    "Apply sku override for %s\n",
+                                    codec->chip_name, modelname);
+                        spec->cdefine.sku_cfg = fix->v.sku;
+                        spec->cdefine.fixup = 1;
+                        break;
+                case ALC_FIXUP_PINS:
+                        cfg = fix->v.pins;
+                        if (action != ALC_FIXUP_ACT_PRE_PROBE || !cfg)
+                                break;
+                        snd_printdd(KERN_INFO "hda_codec: %s: "
+                                    "Apply pincfg for %s\n",
+                                    codec->chip_name, modelname);
+                        for (; cfg->nid; cfg++)
+                                snd_hda_codec_set_pincfg(codec, cfg->nid,
+                                                         cfg->val);
+                        break;
+                case ALC_FIXUP_VERBS:
+                        if (action != ALC_FIXUP_ACT_PROBE || !fix->v.verbs)
+                                break;
+                        snd_printdd(KERN_INFO "hda_codec: %s: "
+                                    "Apply fix-verbs for %s\n",
+                                    codec->chip_name, modelname);
+                        add_verb(codec->spec, fix->v.verbs);
+                        break;
+                case ALC_FIXUP_FUNC:
+                        if (!fix->v.func)
+                                break;
+                        snd_printdd(KERN_INFO "hda_codec: %s: "
+                                    "Apply fix-func for %s\n",
+                                    codec->chip_name, modelname);
+                        fix->v.func(codec, fix, action);
+                        break;
+                default:
+                        snd_printk(KERN_ERR "hda_codec: %s: "
+                                   "Invalid fixup type %d\n",
+                                   codec->chip_name, fix->type);
+                        break;
+                }
+                if (!fix[id].chained)
+                        break;
+                if (++depth > 10)
+                        break;
+                id = fix[id].chain_id;
         }
 }
 
 static void alc_pick_fixup(struct hda_codec *codec,
-                                 const struct snd_pci_quirk *quirk,
-                                 const struct alc_fixup *fix,
-                                 int pre_init)
+                           const struct alc_model_fixup *models,
+                           const struct snd_pci_quirk *quirk,
+                           const struct alc_fixup *fixlist)
 {
-        quirk = snd_pci_quirk_lookup(codec->bus->pci, quirk);
-        if (quirk) {
-                fix += quirk->value;
-#ifdef CONFIG_SND_DEBUG_VERBOSE
-                __alc_pick_fixup(codec, fix, quirk->name, pre_init);
-#else
-                __alc_pick_fixup(codec, fix, NULL, pre_init);
-#endif
-        }
-}
+        struct alc_spec *spec = codec->spec;
+        int id = -1;
+        const char *name = NULL;
 
-static void alc_pick_fixup_model(struct hda_codec *codec,
-                                 const struct alc_model_fixup *models,
-                                 const struct snd_pci_quirk *quirk,
-                                 const struct alc_fixup *fix,
-                                 int pre_init)
-{
         if (codec->modelname && models) {
                 while (models->name) {
                         if (!strcmp(codec->modelname, models->name)) {
-                                fix += models->id;
+                                id = models->id;
+                                name = models->name;
                                 break;
                         }
                         models++;
                 }
-                __alc_pick_fixup(codec, fix, codec->modelname, pre_init);
-        } else {
-                alc_pick_fixup(codec, quirk, fix, pre_init);
+        }
+        if (id < 0) {
+                quirk = snd_pci_quirk_lookup(codec->bus->pci, quirk);
+                if (quirk) {
+                        id = quirk->value;
+#ifdef CONFIG_SND_DEBUG_VERBOSE
+                        name = quirk->name;
+#endif
+                }
+        }
+
+        spec->fixup_id = id;
+        if (id >= 0) {
+                spec->fixup_list = fixlist;
+                spec->fixup_name = name;
         }
 }
 
@@ -2866,7 +2916,7 @@ static struct snd_kcontrol_new alc880_uniwill_p53_mixer[] = {
 /*
  * slave controls for virtual master
  */
-static const char *alc_slave_vols[] = {
+static const char * const alc_slave_vols[] = {
         "Front Playback Volume",
         "Surround Playback Volume",
         "Center Playback Volume",
@@ -2880,7 +2930,7 @@ static const char *alc_slave_vols[] = {
         NULL,
 };
 
-static const char *alc_slave_sws[] = {
+static const char * const alc_slave_sws[] = {
         "Front Playback Switch",
         "Surround Playback Switch",
         "Center Playback Switch",
@@ -3861,6 +3911,8 @@ static int alc_init(struct hda_codec *codec)
         if (spec->init_hook)
                 spec->init_hook(codec);
 
+        alc_apply_fixup(codec, ALC_FIXUP_ACT_INIT);
+
         hda_call_check_power_status(codec, 0x01);
         return 0;
 }
@@ -4559,7 +4611,7 @@ static struct hda_verb alc880_test_init_verbs[] = {
 /*
  */
 
-static const char *alc880_models[ALC880_MODEL_LAST] = {
+static const char * const alc880_models[ALC880_MODEL_LAST] = {
         [ALC880_3ST]            = "3stack",
         [ALC880_TCL_S700]       = "tcl",
         [ALC880_3ST_DIG]        = "3stack-digout",
@@ -5092,7 +5144,7 @@ static const char *alc_get_line_out_pfx(const struct auto_pin_cfg *cfg,
 static int alc880_auto_create_multi_out_ctls(struct alc_spec *spec,
                                              const struct auto_pin_cfg *cfg)
 {
-        static const char *chname[4] = {
+        static const char * const chname[4] = {
                 "Front", "Surround", NULL /*CLFE*/, "Side"
         };
         const char *pfx = alc_get_line_out_pfx(cfg, false);
@@ -7090,7 +7142,8 @@ enum {
 
 static const struct alc_fixup alc260_fixups[] = {
         [PINFIX_HP_DC5750] = {
-                .pins = (const struct alc_pincfg[]) {
+                .type = ALC_FIXUP_PINS,
+                .v.pins = (const struct alc_pincfg[]) {
                         { 0x11, 0x90130110 }, /* speaker */
                         { }
                 }
@@ -7105,7 +7158,7 @@ static struct snd_pci_quirk alc260_fixup_tbl[] = {
 /*
  * ALC260 configurations
  */
-static const char *alc260_models[ALC260_MODEL_LAST] = {
+static const char * const alc260_models[ALC260_MODEL_LAST] = {
         [ALC260_BASIC]          = "basic",
         [ALC260_HP]             = "hp",
         [ALC260_HP_3013]        = "hp-3013",
@@ -7301,8 +7354,10 @@ static int patch_alc260(struct hda_codec *codec)
                 board_config = ALC260_AUTO;
         }
 
-        if (board_config == ALC260_AUTO)
-                alc_pick_fixup(codec, alc260_fixup_tbl, alc260_fixups, 1);
+        if (board_config == ALC260_AUTO) {
+                alc_pick_fixup(codec, NULL, alc260_fixup_tbl, alc260_fixups);
+                alc_apply_fixup(codec, ALC_FIXUP_ACT_PRE_PROBE);
+        }
 
         if (board_config == ALC260_AUTO) {
                 /* automatic parse from the BIOS config */
@@ -7350,8 +7405,7 @@ static int patch_alc260(struct hda_codec *codec)
         set_capture_mixer(codec);
         set_beep_amp(spec, 0x07, 0x05, HDA_INPUT);
 
-        if (board_config == ALC260_AUTO)
-                alc_pick_fixup(codec, alc260_fixup_tbl, alc260_fixups, 0);
+        alc_apply_fixup(codec, ALC_FIXUP_ACT_PROBE);
 
         spec->vmaster_nid = 0x08;
 
@@ -9727,7 +9781,7 @@ static hda_nid_t alc1200_slave_dig_outs[] = {
 /*
  * configuration and preset
  */
-static const char *alc882_models[ALC882_MODEL_LAST] = {
+static const char * const alc882_models[ALC882_MODEL_LAST] = {
         [ALC882_3ST_DIG]        = "3stack-dig",
         [ALC882_6ST_DIG]        = "6stack-dig",
         [ALC882_ARIMA]          = "arima",
@@ -10678,7 +10732,8 @@ enum {
 
 static const struct alc_fixup alc882_fixups[] = {
         [PINFIX_ABIT_AW9D_MAX] = {
-                .pins = (const struct alc_pincfg[]) {
+                .type = ALC_FIXUP_PINS,
+                .v.pins = (const struct alc_pincfg[]) {
                         { 0x15, 0x01080104 }, /* side */
                         { 0x16, 0x01011012 }, /* rear */
                         { 0x17, 0x01016011 }, /* clfe */
@@ -10686,13 +10741,15 @@ static const struct alc_fixup alc882_fixups[] = {
                 }
         },
         [PINFIX_PB_M5210] = {
-                .verbs = (const struct hda_verb[]) {
+                .type = ALC_FIXUP_VERBS,
+                .v.verbs = (const struct hda_verb[]) {
                         { 0x19, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF50 },
                         {}
                 }
         },
         [PINFIX_ACER_ASPIRE_7736] = {
-                .sku = ALC_FIXUP_SKU_IGNORE,
+                .type = ALC_FIXUP_SKU,
+                .v.sku = ALC_FIXUP_SKU_IGNORE,
         },
 };
 
@@ -10984,8 +11041,10 @@ static int patch_alc882(struct hda_codec *codec)
                 board_config = ALC882_AUTO;
         }
 
-        if (board_config == ALC882_AUTO)
-                alc_pick_fixup(codec, alc882_fixup_tbl, alc882_fixups, 1);
+        if (board_config == ALC882_AUTO) {
+                alc_pick_fixup(codec, NULL, alc882_fixup_tbl, alc882_fixups);
+                alc_apply_fixup(codec, ALC_FIXUP_ACT_PRE_PROBE);
+        }
 
         alc_auto_parse_customize_define(codec);
 
@@ -11061,8 +11120,7 @@ static int patch_alc882(struct hda_codec *codec)
         if (has_cdefine_beep(codec))
                 set_beep_amp(spec, 0x0b, 0x05, HDA_INPUT);
 
-        if (board_config == ALC882_AUTO)
-                alc_pick_fixup(codec, alc882_fixup_tbl, alc882_fixups, 0);
+        alc_apply_fixup(codec, ALC_FIXUP_ACT_PROBE);
 
         spec->vmaster_nid = 0x0c;
 
@@ -12452,19 +12510,14 @@ enum {
 
 static const struct alc_fixup alc262_fixups[] = {
         [PINFIX_FSC_H270] = {
-                .pins = (const struct alc_pincfg[]) {
+                .type = ALC_FIXUP_PINS,
+                .v.pins = (const struct alc_pincfg[]) {
                         { 0x14, 0x99130110 }, /* speaker */
                         { 0x15, 0x0221142f }, /* front HP */
                         { 0x1b, 0x0121141f }, /* rear HP */
                         { }
                 }
         },
-        [PINFIX_PB_M5210] = {
-                .verbs = (const struct hda_verb[]) {
-                        { 0x19, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF50 },
-                        {}
-                }
-        },
 };
 
 static struct snd_pci_quirk alc262_fixup_tbl[] = {
@@ -12554,7 +12607,7 @@ static void alc262_auto_init(struct hda_codec *codec)
 /*
  * configuration and preset
  */
-static const char *alc262_models[ALC262_MODEL_LAST] = {
+static const char * const alc262_models[ALC262_MODEL_LAST] = {
         [ALC262_BASIC]          = "basic",
         [ALC262_HIPPO]          = "hippo",
         [ALC262_HIPPO_1]        = "hippo_1",
@@ -12895,8 +12948,10 @@ static int patch_alc262(struct hda_codec *codec)
                 board_config = ALC262_AUTO;
         }
 
-        if (board_config == ALC262_AUTO)
-                alc_pick_fixup(codec, alc262_fixup_tbl, alc262_fixups, 1);
+        if (board_config == ALC262_AUTO) {
+                alc_pick_fixup(codec, NULL, alc262_fixup_tbl, alc262_fixups);
+                alc_apply_fixup(codec, ALC_FIXUP_ACT_PRE_PROBE);
+        }
 
         if (board_config == ALC262_AUTO) {
                 /* automatic parse from the BIOS config */
@@ -12966,8 +13021,7 @@ static int patch_alc262(struct hda_codec *codec)
         if (!spec->no_analog && has_cdefine_beep(codec))
                 set_beep_amp(spec, 0x0b, 0x05, HDA_INPUT);
 
-        if (board_config == ALC262_AUTO)
-                alc_pick_fixup(codec, alc262_fixup_tbl, alc262_fixups, 0);
+        alc_apply_fixup(codec, ALC_FIXUP_ACT_PROBE);
 
         spec->vmaster_nid = 0x0c;
 
@@ -13741,7 +13795,7 @@ static void alc268_auto_init(struct hda_codec *codec)
 /*
  * configuration and preset
  */
-static const char *alc268_models[ALC268_MODEL_LAST] = {
+static const char * const alc268_models[ALC268_MODEL_LAST] = {
         [ALC267_QUANTA_IL1]     = "quanta-il1",
         [ALC268_3ST]            = "3stack",
         [ALC268_TOSHIBA]        = "toshiba",
@@ -14822,17 +14876,19 @@ static int alc269_resume(struct hda_codec *codec)
 #endif /* SND_HDA_NEEDS_RESUME */
 
 static void alc269_fixup_hweq(struct hda_codec *codec,
-                               const struct alc_fixup *fix, int pre_init)
+                               const struct alc_fixup *fix, int action)
 {
         int coef;
 
+        if (action != ALC_FIXUP_ACT_INIT)
+                return;
         coef = alc_read_coef_idx(codec, 0x1e);
         alc_write_coef_idx(codec, 0x1e, coef | 0x80);
 }
 
 enum {
         ALC269_FIXUP_SONY_VAIO,
-        ALC275_FIX_SONY_VAIO_GPIO2,
+        ALC275_FIXUP_SONY_VAIO_GPIO2,
         ALC269_FIXUP_DELL_M101Z,
         ALC269_FIXUP_SKU_IGNORE,
         ALC269_FIXUP_ASUS_G73JW,
@@ -14842,22 +14898,26 @@ enum {
 
 static const struct alc_fixup alc269_fixups[] = {
         [ALC269_FIXUP_SONY_VAIO] = {
-                .verbs = (const struct hda_verb[]) {
+                .type = ALC_FIXUP_VERBS,
+                .v.verbs = (const struct hda_verb[]) {
                         {0x19, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREFGRD},
                         {}
                 }
         },
-        [ALC275_FIX_SONY_VAIO_GPIO2] = {
-                .verbs = (const struct hda_verb[]) {
+        [ALC275_FIXUP_SONY_VAIO_GPIO2] = {
+                .type = ALC_FIXUP_VERBS,
+                .v.verbs = (const struct hda_verb[]) {
                         {0x01, AC_VERB_SET_GPIO_MASK, 0x04},
                         {0x01, AC_VERB_SET_GPIO_DIRECTION, 0x04},
                         {0x01, AC_VERB_SET_GPIO_DATA, 0x00},
-                        {0x19, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREFGRD},
                         { }
-                }
+                },
+                .chained = true,
+                .chain_id = ALC269_FIXUP_SONY_VAIO
         },
         [ALC269_FIXUP_DELL_M101Z] = {
-                .verbs = (const struct hda_verb[]) {
+                .type = ALC_FIXUP_VERBS,
+                .v.verbs = (const struct hda_verb[]) {
                         /* Enables internal speaker */
                         {0x20, AC_VERB_SET_COEF_INDEX, 13},
                         {0x20, AC_VERB_SET_PROC_COEF, 0x4040},
@@ -14865,34 +14925,33 @@ static const struct alc_fixup alc269_fixups[] = {
                 }
         },
         [ALC269_FIXUP_SKU_IGNORE] = {
-                .sku = ALC_FIXUP_SKU_IGNORE,
+                .type = ALC_FIXUP_SKU,
+                .v.sku = ALC_FIXUP_SKU_IGNORE,
         },
         [ALC269_FIXUP_ASUS_G73JW] = {
-                .pins = (const struct alc_pincfg[]) {
+                .type = ALC_FIXUP_PINS,
+                .v.pins = (const struct alc_pincfg[]) {
                         { 0x17, 0x99130111 }, /* subwoofer */
                         { }
                 }
         },
         [ALC269_FIXUP_LENOVO_EAPD] = {
-                .verbs = (const struct hda_verb[]) {
+                .type = ALC_FIXUP_VERBS,
+                .v.verbs = (const struct hda_verb[]) {
                         {0x14, AC_VERB_SET_EAPD_BTLENABLE, 0},
                         {}
                 }
         },
         [ALC275_FIXUP_SONY_HWEQ] = {
-                .func = alc269_fixup_hweq,
-                .verbs = (const struct hda_verb[]) {
-                        {0x01, AC_VERB_SET_GPIO_MASK, 0x04},
-                        {0x01, AC_VERB_SET_GPIO_DIRECTION, 0x04},
-                        {0x01, AC_VERB_SET_GPIO_DATA, 0x00},
-                        {0x19, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREFGRD},
-                        { }
-                }
+                .type = ALC_FIXUP_FUNC,
+                .v.func = alc269_fixup_hweq,
+                .chained = true,
+                .chain_id = ALC275_FIXUP_SONY_VAIO_GPIO2
         }
 };
 
 static struct snd_pci_quirk alc269_fixup_tbl[] = {
-        SND_PCI_QUIRK(0x104d, 0x9073, "Sony VAIO", ALC275_FIX_SONY_VAIO_GPIO2),
+        SND_PCI_QUIRK(0x104d, 0x9073, "Sony VAIO", ALC275_FIXUP_SONY_VAIO_GPIO2),
         SND_PCI_QUIRK(0x104d, 0x907b, "Sony VAIO", ALC275_FIXUP_SONY_HWEQ),
         SND_PCI_QUIRK(0x104d, 0x9084, "Sony VAIO", ALC275_FIXUP_SONY_HWEQ),
         SND_PCI_QUIRK_VENDOR(0x104d, "Sony VAIO", ALC269_FIXUP_SONY_VAIO),
@@ -14908,7 +14967,7 @@ static struct snd_pci_quirk alc269_fixup_tbl[] = {
 /*
  * configuration and preset
  */
-static const char *alc269_models[ALC269_MODEL_LAST] = {
+static const char * const alc269_models[ALC269_MODEL_LAST] = {
         [ALC269_BASIC]                  = "basic",
         [ALC269_QUANTA_FL1]             = "quanta",
         [ALC269_AMIC]                   = "laptop-amic",
@@ -15184,8 +15243,10 @@ static int patch_alc269(struct hda_codec *codec)
                 board_config = ALC269_AUTO;
         }
 
-        if (board_config == ALC269_AUTO)
-                alc_pick_fixup(codec, alc269_fixup_tbl, alc269_fixups, 1);
+        if (board_config == ALC269_AUTO) {
+                alc_pick_fixup(codec, NULL, alc269_fixup_tbl, alc269_fixups);
+                alc_apply_fixup(codec, ALC_FIXUP_ACT_PRE_PROBE);
+        }
 
         if (board_config == ALC269_AUTO) {
                 /* automatic parse from the BIOS config */
@@ -15246,8 +15307,7 @@ static int patch_alc269(struct hda_codec *codec)
         if (has_cdefine_beep(codec))
                 set_beep_amp(spec, 0x0b, 0x04, HDA_INPUT);
 
-        if (board_config == ALC269_AUTO)
-                alc_pick_fixup(codec, alc269_fixup_tbl, alc269_fixups, 0);
+        alc_apply_fixup(codec, ALC_FIXUP_ACT_PROBE);
 
         spec->vmaster_nid = 0x02;
 
@@ -15950,7 +16010,7 @@ static int alc861_auto_create_multi_out_ctls(struct hda_codec *codec,
                                              const struct auto_pin_cfg *cfg)
 {
         struct alc_spec *spec = codec->spec;
-        static const char *chname[4] = {
+        static const char * const chname[4] = {
                 "Front", "Surround", NULL /*CLFE*/, "Side"
         };
         const char *pfx = alc_get_line_out_pfx(cfg, true);
@@ -16156,7 +16216,7 @@ static struct hda_amp_list alc861_loopbacks[] = {
 /*
  * configuration and preset
  */
-static const char *alc861_models[ALC861_MODEL_LAST] = {
+static const char * const alc861_models[ALC861_MODEL_LAST] = {
         [ALC861_3ST]            = "3stack",
         [ALC660_3ST]            = "3stack-660",
         [ALC861_3ST_DIG]        = "3stack-dig",
@@ -16306,7 +16366,8 @@ enum {
 
 static const struct alc_fixup alc861_fixups[] = {
         [PINFIX_FSC_AMILO_PI1505] = {
-                .pins = (const struct alc_pincfg[]) {
+                .type = ALC_FIXUP_PINS,
+                .v.pins = (const struct alc_pincfg[]) {
                         { 0x0b, 0x0221101f }, /* HP */
                         { 0x0f, 0x90170310 }, /* speaker */
                         { }
@@ -16341,8 +16402,10 @@ static int patch_alc861(struct hda_codec *codec)
                 board_config = ALC861_AUTO;
         }
 
-        if (board_config == ALC861_AUTO)
-                alc_pick_fixup(codec, alc861_fixup_tbl, alc861_fixups, 1);
+        if (board_config == ALC861_AUTO) {
+                alc_pick_fixup(codec, NULL, alc861_fixup_tbl, alc861_fixups);
+                alc_apply_fixup(codec, ALC_FIXUP_ACT_PRE_PROBE);
+        }
 
         if (board_config == ALC861_AUTO) {
                 /* automatic parse from the BIOS config */
@@ -16379,8 +16442,7 @@ static int patch_alc861(struct hda_codec *codec)
 
         spec->vmaster_nid = 0x03;
 
-        if (board_config == ALC861_AUTO)
-                alc_pick_fixup(codec, alc861_fixup_tbl, alc861_fixups, 0);
+        alc_apply_fixup(codec, ALC_FIXUP_ACT_PROBE);
 
         codec->patch_ops = alc_patch_ops;
         if (board_config == ALC861_AUTO) {
@@ -16857,7 +16919,7 @@ static void alc861vd_dallas_setup(struct hda_codec *codec)
 /*
  * configuration and preset
  */
-static const char *alc861vd_models[ALC861VD_MODEL_LAST] = {
+static const char * const alc861vd_models[ALC861VD_MODEL_LAST] = {
         [ALC660VD_3ST]          = "3stack-660",
         [ALC660VD_3ST_DIG]      = "3stack-660-digout",
         [ALC660VD_ASUS_V1S]     = "asus-v1s",
@@ -17077,7 +17139,9 @@ static void alc861vd_auto_init_analog_input(struct hda_codec *codec)
 static int alc861vd_auto_create_multi_out_ctls(struct alc_spec *spec,
                                              const struct auto_pin_cfg *cfg)
 {
-        static const char *chname[4] = {"Front", "Surround", "CLFE", "Side"};
+        static const char * const chname[4] = {
+                "Front", "Surround", "CLFE", "Side"
+        };
         const char *pfx = alc_get_line_out_pfx(cfg, true);
         hda_nid_t nid_v, nid_s;
         int i, err;
@@ -17262,7 +17326,8 @@ enum {
 /* reset GPIO1 */
 static const struct alc_fixup alc861vd_fixups[] = {
         [ALC660VD_FIX_ASUS_GPIO1] = {
-                .verbs = (const struct hda_verb[]) {
+                .type = ALC_FIXUP_VERBS,
+                .v.verbs = (const struct hda_verb[]) {
                         {0x01, AC_VERB_SET_GPIO_MASK, 0x03},
                         {0x01, AC_VERB_SET_GPIO_DIRECTION, 0x01},
                         {0x01, AC_VERB_SET_GPIO_DATA, 0x01},
@@ -17297,8 +17362,10 @@ static int patch_alc861vd(struct hda_codec *codec)
                 board_config = ALC861VD_AUTO;
         }
 
-        if (board_config == ALC861VD_AUTO)
-                alc_pick_fixup(codec, alc861vd_fixup_tbl, alc861vd_fixups, 1);
+        if (board_config == ALC861VD_AUTO) {
+                alc_pick_fixup(codec, NULL, alc861vd_fixup_tbl, alc861vd_fixups);
+                alc_apply_fixup(codec, ALC_FIXUP_ACT_PRE_PROBE);
+        }
 
         if (board_config == ALC861VD_AUTO) {
                 /* automatic parse from the BIOS config */
@@ -17346,8 +17413,7 @@ static int patch_alc861vd(struct hda_codec *codec)
 
         spec->vmaster_nid = 0x02;
 
-        if (board_config == ALC861VD_AUTO)
-                alc_pick_fixup(codec, alc861vd_fixup_tbl, alc861vd_fixups, 0);
+        alc_apply_fixup(codec, ALC_FIXUP_ACT_PROBE);
 
         codec->patch_ops = alc_patch_ops;
 
@@ -18630,7 +18696,7 @@ static struct snd_kcontrol_new alc272_nc10_mixer[] = {
 /*
  * configuration and preset
  */
-static const char *alc662_models[ALC662_MODEL_LAST] = {
+static const char * const alc662_models[ALC662_MODEL_LAST] = {
         [ALC662_3ST_2ch_DIG]    = "3stack-dig",
         [ALC662_3ST_6ch_DIG]    = "3stack-6ch-dig",
         [ALC662_3ST_6ch]        = "3stack-6ch",
@@ -19145,7 +19211,7 @@ static int alc662_auto_create_multi_out_ctls(struct hda_codec *codec,
                                              const struct auto_pin_cfg *cfg)
 {
         struct alc_spec *spec = codec->spec;
-        static const char *chname[4] = {
+        static const char * const chname[4] = {
                 "Front", "Surround", NULL /*CLFE*/, "Side"
         };
         const char *pfx = alc_get_line_out_pfx(cfg, true);
@@ -19378,7 +19444,10 @@ static void alc662_auto_init(struct hda_codec *codec)
 }
 
 static void alc272_fixup_mario(struct hda_codec *codec,
-                               const struct alc_fixup *fix, int pre_init) {
+                               const struct alc_fixup *fix, int action)
+{
+        if (action != ALC_FIXUP_ACT_PROBE)
+                return;
         if (snd_hda_override_amp_caps(codec, 0x2, HDA_OUTPUT,
                                       (0x3b << AC_AMPCAP_OFFSET_SHIFT) |
                                       (0x3b << AC_AMPCAP_NUM_STEPS_SHIFT) |
@@ -19396,19 +19465,22 @@ enum {
 
 static const struct alc_fixup alc662_fixups[] = {
         [ALC662_FIXUP_ASPIRE] = {
-                .pins = (const struct alc_pincfg[]) {
+                .type = ALC_FIXUP_PINS,
+                .v.pins = (const struct alc_pincfg[]) {
                         { 0x15, 0x99130112 }, /* subwoofer */
                         { }
                 }
         },
         [ALC662_FIXUP_IDEAPAD] = {
-                .pins = (const struct alc_pincfg[]) {
+                .type = ALC_FIXUP_PINS,
+                .v.pins = (const struct alc_pincfg[]) {
                         { 0x17, 0x99130112 }, /* subwoofer */
                         { }
                 }
         },
         [ALC272_FIXUP_MARIO] = {
-                .func = alc272_fixup_mario,
+                .type = ALC_FIXUP_FUNC,
+                .v.func = alc272_fixup_mario,
         }
 };
 
@@ -19462,7 +19534,9 @@ static int patch_alc662(struct hda_codec *codec)
         }
 
         if (board_config == ALC662_AUTO) {
-                alc_pick_fixup(codec, alc662_fixup_tbl, alc662_fixups, 1);
+                alc_pick_fixup(codec, alc662_fixup_models,
+                               alc662_fixup_tbl, alc662_fixups);
+                alc_apply_fixup(codec, ALC_FIXUP_ACT_PRE_PROBE);
                 /* automatic parse from the BIOS config */
                 err = alc662_parse_auto_config(codec);
                 if (err < 0) {
@@ -19520,12 +19594,11 @@ static int patch_alc662(struct hda_codec *codec)
         }
         spec->vmaster_nid = 0x02;
 
+        alc_apply_fixup(codec, ALC_FIXUP_ACT_PROBE);
+
         codec->patch_ops = alc_patch_ops;
-        if (board_config == ALC662_AUTO) {
+        if (board_config == ALC662_AUTO)
                 spec->init_hook = alc662_auto_init;
-                alc_pick_fixup_model(codec, alc662_fixup_models,
-                                     alc662_fixup_tbl, alc662_fixups, 0);
-        }
 
         alc_init_jacks(codec);
 
@@ -19913,7 +19986,7 @@ static void alc680_auto_init(struct hda_codec *codec)
 /*
  * configuration and preset
  */
-static const char *alc680_models[ALC680_MODEL_LAST] = {
+static const char * const alc680_models[ALC680_MODEL_LAST] = {
         [ALC680_BASE]           = "base",
         [ALC680_AUTO]           = "auto",
 };
diff --git a/sound/pci/hda/patch_sigmatel.c b/sound/pci/hda/patch_sigmatel.c
index 4ab019d0924e..9ea48b425d0b 100644
--- a/sound/pci/hda/patch_sigmatel.c
+++ b/sound/pci/hda/patch_sigmatel.c
@@ -266,7 +266,7 @@ struct sigmatel_spec {
         struct sigmatel_mic_route int_mic;
         struct sigmatel_mic_route dock_mic;
 
-        const char **spdif_labels;
+        const char * const *spdif_labels;
 
         hda_nid_t dig_in_nid;
         hda_nid_t mono_nid;
@@ -524,7 +524,7 @@ static unsigned long stac927x_capsws[] = {
         HDA_COMPOSE_AMP_VAL(0x1d, 3, 0, HDA_OUTPUT),
 };
 
-static const char *stac927x_spdif_labels[5] = {
+static const char * const stac927x_spdif_labels[5] = {
         "Digital Playback", "ADAT", "Analog Mux 1",
         "Analog Mux 2", "Analog Mux 3"
 };
@@ -1062,7 +1062,7 @@ static struct snd_kcontrol_new stac_smux_mixer = {
         .put = stac92xx_smux_enum_put,
 };
 
-static const char *slave_vols[] = {
+static const char * const slave_vols[] = {
         "Front Playback Volume",
         "Surround Playback Volume",
         "Center Playback Volume",
@@ -1073,7 +1073,7 @@ static const char *slave_vols[] = {
         NULL
 };
 
-static const char *slave_sws[] = {
+static const char * const slave_sws[] = {
         "Front Playback Switch",
         "Surround Playback Switch",
         "Center Playback Switch",
@@ -1354,7 +1354,7 @@ static unsigned int *stac9200_brd_tbl[STAC_9200_MODELS] = {
         [STAC_9200_PANASONIC] = ref9200_pin_configs,
 };
 
-static const char *stac9200_models[STAC_9200_MODELS] = {
+static const char * const stac9200_models[STAC_9200_MODELS] = {
         [STAC_AUTO] = "auto",
         [STAC_REF] = "ref",
         [STAC_9200_OQO] = "oqo",
@@ -1500,7 +1500,7 @@ static unsigned int *stac925x_brd_tbl[STAC_925x_MODELS] = {
         [STAC_M6] = stac925xM6_pin_configs,
 };
 
-static const char *stac925x_models[STAC_925x_MODELS] = {
+static const char * const stac925x_models[STAC_925x_MODELS] = {
         [STAC_925x_AUTO] = "auto",
         [STAC_REF] = "ref",
         [STAC_M1] = "m1",
@@ -1574,7 +1574,7 @@ static unsigned int *stac92hd73xx_brd_tbl[STAC_92HD73XX_MODELS] = {
         [STAC_92HD73XX_INTEL]   = intel_dg45id_pin_configs,
 };
 
-static const char *stac92hd73xx_models[STAC_92HD73XX_MODELS] = {
+static const char * const stac92hd73xx_models[STAC_92HD73XX_MODELS] = {
         [STAC_92HD73XX_AUTO] = "auto",
         [STAC_92HD73XX_NO_JD] = "no-jd",
         [STAC_92HD73XX_REF] = "ref",
@@ -1660,7 +1660,7 @@ static unsigned int *stac92hd83xxx_brd_tbl[STAC_92HD83XXX_MODELS] = {
         [STAC_HP_DV7_4000] = hp_dv7_4000_pin_configs,
 };
 
-static const char *stac92hd83xxx_models[STAC_92HD83XXX_MODELS] = {
+static const char * const stac92hd83xxx_models[STAC_92HD83XXX_MODELS] = {
         [STAC_92HD83XXX_AUTO] = "auto",
         [STAC_92HD83XXX_REF] = "ref",
         [STAC_92HD83XXX_PWR_REF] = "mic-ref",
@@ -1722,7 +1722,7 @@ static unsigned int *stac92hd71bxx_brd_tbl[STAC_92HD71BXX_MODELS] = {
         [STAC_HP_DV4_1222NR]    = NULL,
 };
 
-static const char *stac92hd71bxx_models[STAC_92HD71BXX_MODELS] = {
+static const char * const stac92hd71bxx_models[STAC_92HD71BXX_MODELS] = {
         [STAC_92HD71BXX_AUTO] = "auto",
         [STAC_92HD71BXX_REF] = "ref",
         [STAC_DELL_M4_1] = "dell-m4-1",
@@ -1915,7 +1915,7 @@ static unsigned int *stac922x_brd_tbl[STAC_922X_MODELS] = {
         [STAC_922X_DELL_M82] = dell_922x_m82_pin_configs,       
 };
 
-static const char *stac922x_models[STAC_922X_MODELS] = {
+static const char * const stac922x_models[STAC_922X_MODELS] = {
         [STAC_922X_AUTO] = "auto",
         [STAC_D945_REF] = "ref",
         [STAC_D945GTP5] = "5stack",
@@ -2077,7 +2077,7 @@ static unsigned int *stac927x_brd_tbl[STAC_927X_MODELS] = {
         [STAC_927X_VOLKNOB] = NULL,
 };
 
-static const char *stac927x_models[STAC_927X_MODELS] = {
+static const char * const stac927x_models[STAC_927X_MODELS] = {
         [STAC_927X_AUTO]        = "auto",
         [STAC_D965_REF_NO_JD]   = "ref-no-jd",
         [STAC_D965_REF]         = "ref",
@@ -2180,7 +2180,7 @@ static unsigned int *stac9205_brd_tbl[STAC_9205_MODELS] = {
         [STAC_9205_EAPD] = NULL,
 };
 
-static const char *stac9205_models[STAC_9205_MODELS] = {
+static const char * const stac9205_models[STAC_9205_MODELS] = {
         [STAC_9205_AUTO] = "auto",
         [STAC_9205_REF] = "ref",
         [STAC_9205_DELL_M42] = "dell-m42",
@@ -3123,7 +3123,7 @@ static int create_multi_out_ctls(struct hda_codec *codec, int num_outs,
                                  int type)
 {
         struct sigmatel_spec *spec = codec->spec;
-        static const char *chname[4] = {
+        static const char * const chname[4] = {
                 "Front", "Surround", NULL /*CLFE*/, "Side"
         };
         hda_nid_t nid;
@@ -3256,7 +3256,7 @@ static int stac92xx_auto_create_hp_ctls(struct hda_codec *codec,
 }
 
 /* labels for mono mux outputs */
-static const char *stac92xx_mono_labels[4] = {
+static const char * const stac92xx_mono_labels[4] = {
         "DAC0", "DAC1", "Mixer", "DAC2"
 };
 
@@ -3380,7 +3380,7 @@ static int stac92xx_auto_create_mux_input_ctls(struct hda_codec *codec)
         return 0;
 };
 
-static const char *stac92xx_spdif_labels[3] = {
+static const char * const stac92xx_spdif_labels[3] = {
         "Digital Playback", "Analog Mux 1", "Analog Mux 2",
 };
 
@@ -3388,7 +3388,7 @@ static int stac92xx_auto_create_spdif_mux_ctls(struct hda_codec *codec)
 {
         struct sigmatel_spec *spec = codec->spec;
         struct hda_input_mux *spdif_mux = &spec->private_smux;
-        const char **labels = spec->spdif_labels;
+        const char * const *labels = spec->spdif_labels;
         int i, num_cons;
         hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
 
@@ -3409,7 +3409,7 @@ static int stac92xx_auto_create_spdif_mux_ctls(struct hda_codec *codec)
 }
 
 /* labels for dmic mux inputs */
-static const char *stac92xx_dmic_labels[5] = {
+static const char * const stac92xx_dmic_labels[5] = {
         "Analog Inputs", "Digital Mic 1", "Digital Mic 2",
         "Digital Mic 3", "Digital Mic 4"
 };
@@ -5333,7 +5333,7 @@ again:
         return 0;
 }
 
-static int stac92hd83xxx_set_system_btl_amp(struct hda_codec *codec)
+static int hp_bnb2011_with_dock(struct hda_codec *codec)
 {
         if (codec->vendor_id != 0x111d7605 &&
             codec->vendor_id != 0x111d76d1)
@@ -5348,10 +5348,6 @@ static int stac92hd83xxx_set_system_btl_amp(struct hda_codec *codec)
         case 0x103c161d:
         case 0x103c161e:
         case 0x103c161f:
-        case 0x103c1620:
-        case 0x103c1621:
-        case 0x103c1622:
-        case 0x103c1623:
 
         case 0x103c162a:
         case 0x103c162b:
@@ -5360,41 +5356,9 @@ static int stac92hd83xxx_set_system_btl_amp(struct hda_codec *codec)
         case 0x103c1631:
 
         case 0x103c1633:
-
+        case 0x103c1634:
         case 0x103c1635:
 
-        case 0x103c164f:
-
-        case 0x103c1676:
-        case 0x103c1677:
-        case 0x103c1678:
-        case 0x103c1679:
-        case 0x103c167a:
-        case 0x103c167b:
-        case 0x103c167c:
-        case 0x103c167d:
-        case 0x103c167e:
-        case 0x103c167f:
-        case 0x103c1680:
-        case 0x103c1681:
-        case 0x103c1682:
-        case 0x103c1683:
-        case 0x103c1684:
-        case 0x103c1685:
-        case 0x103c1686:
-        case 0x103c1687:
-        case 0x103c1688:
-        case 0x103c1689:
-        case 0x103c168a:
-        case 0x103c168b:
-        case 0x103c168c:
-        case 0x103c168d:
-        case 0x103c168e:
-        case 0x103c168f:
-        case 0x103c1690:
-        case 0x103c1691:
-        case 0x103c1692:
-
         case 0x103c3587:
         case 0x103c3588:
         case 0x103c3589:
@@ -5402,9 +5366,9 @@ static int stac92hd83xxx_set_system_btl_amp(struct hda_codec *codec)
 
         case 0x103c3667:
         case 0x103c3668:
-                /* set BTL amp level to 13.43dB for louder speaker output */
-                return snd_hda_codec_write_cache(codec, codec->afg, 0,
-                                                 0x7F4, 0x14);
+        case 0x103c3669:
+
+                return 1;
         }
         return 0;
 }
@@ -5420,6 +5384,11 @@ static int patch_stac92hd83xxx(struct hda_codec *codec)
         if (spec == NULL)
                 return -ENOMEM;
 
+        if (hp_bnb2011_with_dock(codec)) {
+                snd_hda_codec_set_pincfg(codec, 0xa, 0x2101201f);
+                snd_hda_codec_set_pincfg(codec, 0xf, 0x2181205e);
+        }
+
         /* reset pin power-down; Windows may leave these bits after reboot */
         snd_hda_codec_write_cache(codec, codec->afg, 0, 0x7EC, 0);
         snd_hda_codec_write_cache(codec, codec->afg, 0, 0x7ED, 0);
@@ -5546,8 +5515,6 @@ again:
                         AC_VERB_SET_CONNECT_SEL, num_dacs);
         }
 
-        stac92hd83xxx_set_system_btl_amp(codec);
-
         codec->proc_widget_hook = stac92hd_proc_hook;
 
         return 0;
@@ -6270,7 +6237,7 @@ static unsigned int stac9872_vaio_pin_configs[9] = {
         0x90a7013e
 };
 
-static const char *stac9872_models[STAC_9872_MODELS] = {
+static const char * const stac9872_models[STAC_9872_MODELS] = {
         [STAC_9872_AUTO] = "auto",
         [STAC_9872_VAIO] = "vaio",
 };
diff --git a/sound/pci/hda/patch_via.c b/sound/pci/hda/patch_via.c
index 7f4852a478a1..a76c3260d941 100644
--- a/sound/pci/hda/patch_via.c
+++ b/sound/pci/hda/patch_via.c
@@ -2281,7 +2281,9 @@ static int vt1708_auto_create_multi_out_ctls(struct via_spec *spec,
                                              const struct auto_pin_cfg *cfg)
 {
         char name[32];
-        static const char *chname[4] = { "Front", "Surround", "C/LFE", "Side" };
+        static const char * const chname[4] = {
+                "Front", "Surround", "C/LFE", "Side"
+        };
         hda_nid_t nid, nid_vol, nid_vols[] = {0x17, 0x19, 0x1a, 0x1b};
         int i, err;
 
@@ -2370,7 +2372,7 @@ static void create_hp_imux(struct via_spec *spec)
 {
         int i;
         struct hda_input_mux *imux = &spec->private_imux[1];
-        static const char *texts[] = { "OFF", "ON", NULL};
+        static const char * const texts[] = { "OFF", "ON", NULL};
 
         /* for hp mode select */
         for (i = 0; texts[i]; i++)
@@ -2890,7 +2892,9 @@ static int vt1709_auto_create_multi_out_ctls(struct via_spec *spec,
                                              const struct auto_pin_cfg *cfg)
 {
         char name[32];
-        static const char *chname[4] = { "Front", "Surround", "C/LFE", "Side" };
+        static const char * const chname[4] = {
+                "Front", "Surround", "C/LFE", "Side"
+        };
         hda_nid_t nid, nid_vol, nid_vols[] = {0x18, 0x1a, 0x1b, 0x29};
         int i, err;
 
@@ -3433,7 +3437,9 @@ static int vt1708B_auto_create_multi_out_ctls(struct via_spec *spec,
                                              const struct auto_pin_cfg *cfg)
 {
         char name[32];
-        static const char *chname[4] = { "Front", "Surround", "C/LFE", "Side" };
+        static const char * const chname[4] = {
+                "Front", "Surround", "C/LFE", "Side"
+        };
         hda_nid_t nid_vols[] = {0x16, 0x18, 0x26, 0x27};
         hda_nid_t nid, nid_vol = 0;
         int i, err;
@@ -3861,7 +3867,9 @@ static int vt1708S_auto_create_multi_out_ctls(struct via_spec *spec,
                                              const struct auto_pin_cfg *cfg)
 {
         char name[32];
-        static const char *chname[4] = { "Front", "Surround", "C/LFE", "Side" };
+        static const char * const chname[4] = {
+                "Front", "Surround", "C/LFE", "Side"
+        };
         hda_nid_t nid_vols[] = {0x10, 0x11, 0x24, 0x25};
         hda_nid_t nid_mutes[] = {0x1C, 0x18, 0x26, 0x27};
         hda_nid_t nid, nid_vol, nid_mute;
@@ -4304,7 +4312,7 @@ static int vt1702_auto_create_hp_ctls(struct via_spec *spec, hda_nid_t pin)
 {
         int err, i;
         struct hda_input_mux *imux;
-        static const char *texts[] = { "ON", "OFF", NULL};
+        static const char * const texts[] = { "ON", "OFF", NULL};
         if (!pin)
                 return 0;
         spec->multiout.hp_nid = 0x1D;
@@ -4615,7 +4623,9 @@ static int vt1718S_auto_create_multi_out_ctls(struct via_spec *spec,
                                              const struct auto_pin_cfg *cfg)
 {
         char name[32];
-        static const char *chname[4] = { "Front", "Surround", "C/LFE", "Side" };
+        static const char * const chname[4] = {
+                "Front", "Surround", "C/LFE", "Side"
+        };
         hda_nid_t nid_vols[] = {0x8, 0x9, 0xa, 0xb};
         hda_nid_t nid_mutes[] = {0x24, 0x25, 0x26, 0x27};
         hda_nid_t nid, nid_vol, nid_mute = 0;
@@ -5064,7 +5074,9 @@ static int vt1716S_auto_create_multi_out_ctls(struct via_spec *spec,
                                               const struct auto_pin_cfg *cfg)
 {
         char name[32];
-        static const char *chname[3] = { "Front", "Surround", "C/LFE" };
+        static const char * const chname[3] = {
+                "Front", "Surround", "C/LFE"
+        };
         hda_nid_t nid_vols[] = {0x10, 0x11, 0x25};
         hda_nid_t nid_mutes[] = {0x1C, 0x18, 0x27};
         hda_nid_t nid, nid_vol, nid_mute;
diff --git a/sound/pci/oxygen/xonar_dg.c b/sound/pci/oxygen/xonar_dg.c
index e4de0b8d087a..e1fa602eba79 100644
--- a/sound/pci/oxygen/xonar_dg.c
+++ b/sound/pci/oxygen/xonar_dg.c
@@ -75,7 +75,7 @@ static void cs4245_write(struct oxygen *chip, unsigned int reg, u8 value)
                          OXYGEN_SPI_CEN_LATCH_CLOCK_HI,
                          CS4245_SPI_ADDRESS |
                          CS4245_SPI_WRITE |
-                         (value << 8) | reg);
+                         (reg << 8) | value);
         data->cs4245_regs[reg] = value;
 }
 
diff --git a/sound/soc/codecs/Kconfig b/sound/soc/codecs/Kconfig
index 883a312bb293..c48b23c1d4fc 100644
--- a/sound/soc/codecs/Kconfig
+++ b/sound/soc/codecs/Kconfig
@@ -44,7 +44,7 @@ config SND_SOC_ALL_CODECS
         select SND_SOC_TWL6040 if TWL4030_CORE
         select SND_SOC_UDA134X
         select SND_SOC_UDA1380 if I2C
-        select SND_SOC_WL1273 if WL1273_CORE
+        select SND_SOC_WL1273 if RADIO_WL1273
         select SND_SOC_WM2000 if I2C
         select SND_SOC_WM8350 if MFD_WM8350
         select SND_SOC_WM8400 if MFD_WM8400
diff --git a/sound/soc/codecs/wl1273.c b/sound/soc/codecs/wl1273.c
index d3ffa2f0122a..861b28f543d2 100644
--- a/sound/soc/codecs/wl1273.c
+++ b/sound/soc/codecs/wl1273.c
@@ -42,7 +42,7 @@ struct wl1273_priv {
 static int snd_wl1273_fm_set_i2s_mode(struct wl1273_core *core,
                                       int rate, int width)
 {
-        struct device *dev = &core->i2c_dev->dev;
+        struct device *dev = &core->client->dev;
         int r = 0;
         u16 mode;
 
@@ -123,13 +123,13 @@ static int snd_wl1273_fm_set_i2s_mode(struct wl1273_core *core,
         dev_dbg(dev, "mode: 0x%04x\n", mode);
 
         if (core->i2s_mode != mode) {
-                r = wl1273_fm_write_cmd(core, WL1273_I2S_MODE_CONFIG_SET, mode);
+                r = core->write(core, WL1273_I2S_MODE_CONFIG_SET, mode);
                 if (r)
                         goto out;
 
                 core->i2s_mode = mode;
-                r = wl1273_fm_write_cmd(core, WL1273_AUDIO_ENABLE,
-                                        WL1273_AUDIO_ENABLE_I2S);
+                r = core->write(core, WL1273_AUDIO_ENABLE,
+                                WL1273_AUDIO_ENABLE_I2S);
                 if (r)
                         goto out;
         }
@@ -142,8 +142,7 @@ out:
 static int snd_wl1273_fm_set_channel_number(struct wl1273_core *core,
                                             int channel_number)
 {
-        struct i2c_client *client = core->i2c_dev;
-        struct device *dev = &client->dev;
+        struct device *dev = &core->client->dev;
         int r = 0;
 
         dev_dbg(dev, "%s\n", __func__);
@@ -154,17 +153,13 @@ static int snd_wl1273_fm_set_channel_number(struct wl1273_core *core,
                 goto out;
 
         if (channel_number == 1 && core->mode == WL1273_MODE_RX)
-                r = wl1273_fm_write_cmd(core, WL1273_MOST_MODE_SET,
-                                        WL1273_RX_MONO);
+                r = core->write(core, WL1273_MOST_MODE_SET, WL1273_RX_MONO);
         else if (channel_number == 1 && core->mode == WL1273_MODE_TX)
-                r = wl1273_fm_write_cmd(core, WL1273_MONO_SET,
-                                        WL1273_TX_MONO);
+                r = core->write(core, WL1273_MONO_SET, WL1273_TX_MONO);
         else if (channel_number == 2 && core->mode == WL1273_MODE_RX)
-                r = wl1273_fm_write_cmd(core, WL1273_MOST_MODE_SET,
-                                        WL1273_RX_STEREO);
+                r = core->write(core, WL1273_MOST_MODE_SET, WL1273_RX_STEREO);
         else if (channel_number == 2 && core->mode == WL1273_MODE_TX)
-                r = wl1273_fm_write_cmd(core, WL1273_MONO_SET,
-                                        WL1273_TX_STEREO);
+                r = core->write(core, WL1273_MONO_SET, WL1273_TX_STEREO);
         else
                 r = -EINVAL;
 out:
@@ -237,7 +232,7 @@ static int snd_wl1273_fm_audio_put(struct snd_kcontrol *kcontrol,
         if (wl1273->core->audio_mode == val)
                 return 0;
 
-        r = wl1273_fm_set_audio(wl1273->core, val);
+        r = wl1273->core->set_audio(wl1273->core, val);
         if (r < 0)
                 return r;
 
@@ -272,8 +267,8 @@ static int snd_wl1273_fm_volume_put(struct snd_kcontrol *kcontrol,
 
         dev_dbg(codec->dev, "%s: enter.\n", __func__);
 
-        r = wl1273_fm_set_volume(wl1273->core,
-                                 ucontrol->value.integer.value[0]);
+        r = wl1273->core->set_volume(wl1273->core,
+                                     ucontrol->value.integer.value[0]);
         if (r)
                 return r;
 
diff --git a/sound/soc/codecs/wl1273.h b/sound/soc/codecs/wl1273.h
index 14ed027fdcfc..43ec7e668c51 100644
--- a/sound/soc/codecs/wl1273.h
+++ b/sound/soc/codecs/wl1273.h
@@ -25,77 +25,6 @@
 #ifndef __WL1273_CODEC_H__
 #define __WL1273_CODEC_H__
 
-/* I2S protocol, left channel first, data width 16 bits */
-#define WL1273_PCM_DEF_MODE             0x00
-
-/* Rx */
-#define WL1273_AUDIO_ENABLE_I2S         (1 << 0)
-#define WL1273_AUDIO_ENABLE_ANALOG      (1 << 1)
-
-/* Tx */
-#define WL1273_AUDIO_IO_SET_ANALOG      0
-#define WL1273_AUDIO_IO_SET_I2S         1
-
-#define WL1273_POWER_SET_OFF            0
-#define WL1273_POWER_SET_FM             (1 << 0)
-#define WL1273_POWER_SET_RDS            (1 << 1)
-#define WL1273_POWER_SET_RETENTION      (1 << 4)
-
-#define WL1273_PUPD_SET_OFF             0x00
-#define WL1273_PUPD_SET_ON              0x01
-#define WL1273_PUPD_SET_RETENTION       0x10
-
-/* I2S mode */
-#define WL1273_IS2_WIDTH_32     0x0
-#define WL1273_IS2_WIDTH_40     0x1
-#define WL1273_IS2_WIDTH_22_23  0x2
-#define WL1273_IS2_WIDTH_23_22  0x3
-#define WL1273_IS2_WIDTH_48     0x4
-#define WL1273_IS2_WIDTH_50     0x5
-#define WL1273_IS2_WIDTH_60     0x6
-#define WL1273_IS2_WIDTH_64     0x7
-#define WL1273_IS2_WIDTH_80     0x8
-#define WL1273_IS2_WIDTH_96     0x9
-#define WL1273_IS2_WIDTH_128    0xa
-#define WL1273_IS2_WIDTH        0xf
-
-#define WL1273_IS2_FORMAT_STD   (0x0 << 4)
-#define WL1273_IS2_FORMAT_LEFT  (0x1 << 4)
-#define WL1273_IS2_FORMAT_RIGHT (0x2 << 4)
-#define WL1273_IS2_FORMAT_USER  (0x3 << 4)
-
-#define WL1273_IS2_MASTER       (0x0 << 6)
-#define WL1273_IS2_SLAVEW       (0x1 << 6)
-
-#define WL1273_IS2_TRI_AFTER_SENDING    (0x0 << 7)
-#define WL1273_IS2_TRI_ALWAYS_ACTIVE    (0x1 << 7)
-
-#define WL1273_IS2_SDOWS_RR     (0x0 << 8)
-#define WL1273_IS2_SDOWS_RF     (0x1 << 8)
-#define WL1273_IS2_SDOWS_FR     (0x2 << 8)
-#define WL1273_IS2_SDOWS_FF     (0x3 << 8)
-
-#define WL1273_IS2_TRI_OPT      (0x0 << 10)
-#define WL1273_IS2_TRI_ALWAYS   (0x1 << 10)
-
-#define WL1273_IS2_RATE_48K     (0x0 << 12)
-#define WL1273_IS2_RATE_44_1K   (0x1 << 12)
-#define WL1273_IS2_RATE_32K     (0x2 << 12)
-#define WL1273_IS2_RATE_22_05K  (0x4 << 12)
-#define WL1273_IS2_RATE_16K     (0x5 << 12)
-#define WL1273_IS2_RATE_12K     (0x8 << 12)
-#define WL1273_IS2_RATE_11_025  (0x9 << 12)
-#define WL1273_IS2_RATE_8K      (0xa << 12)
-#define WL1273_IS2_RATE         (0xf << 12)
-
-#define WL1273_I2S_DEF_MODE     (WL1273_IS2_WIDTH_32 | \
-                                 WL1273_IS2_FORMAT_STD | \
-                                 WL1273_IS2_MASTER | \
-                                 WL1273_IS2_TRI_AFTER_SENDING | \
-                                 WL1273_IS2_SDOWS_RR | \
-                                 WL1273_IS2_TRI_OPT | \
-                                 WL1273_IS2_RATE_48K)
-
 int wl1273_get_format(struct snd_soc_codec *codec, unsigned int *fmt);
 
 #endif  /* End of __WL1273_CODEC_H__ */
diff --git a/sound/soc/codecs/wm8990.c b/sound/soc/codecs/wm8990.c
index 5c87a634fc04..100aeee5ba96 100644
--- a/sound/soc/codecs/wm8990.c
+++ b/sound/soc/codecs/wm8990.c
@@ -1183,7 +1183,7 @@ static int wm8990_set_bias_level(struct snd_soc_codec *codec,
                                      WM8990_VMIDTOG);
 
                         /* Delay to allow output caps to discharge */
-                        msleep(msecs_to_jiffies(300));
+                        msleep(300);
 
                         /* Disable VMIDTOG */
                         snd_soc_write(codec, WM8990_ANTIPOP2, WM8990_SOFTST |
@@ -1195,17 +1195,17 @@ static int wm8990_set_bias_level(struct snd_soc_codec *codec,
                         /* Enable outputs */
                         snd_soc_write(codec, WM8990_POWER_MANAGEMENT_1, 0x1b00);
 
-                        msleep(msecs_to_jiffies(50));
+                        msleep(50);
 
                         /* Enable VMID at 2x50k */
                         snd_soc_write(codec, WM8990_POWER_MANAGEMENT_1, 0x1f02);
 
-                        msleep(msecs_to_jiffies(100));
+                        msleep(100);
 
                         /* Enable VREF */
                         snd_soc_write(codec, WM8990_POWER_MANAGEMENT_1, 0x1f03);
 
-                        msleep(msecs_to_jiffies(600));
+                        msleep(600);
 
                         /* Enable BUFIOEN */
                         snd_soc_write(codec, WM8990_ANTIPOP2, WM8990_SOFTST |
@@ -1250,7 +1250,7 @@ static int wm8990_set_bias_level(struct snd_soc_codec *codec,
                 /* Disable VMID */
                 snd_soc_write(codec, WM8990_POWER_MANAGEMENT_1, 0x1f01);
 
-                msleep(msecs_to_jiffies(300));
+                msleep(300);
 
                 /* Enable all output discharge bits */
                 snd_soc_write(codec, WM8990_ANTIPOP1, WM8990_DIS_LLINE |
diff --git a/sound/soc/ep93xx/ep93xx-i2s.c b/sound/soc/ep93xx/ep93xx-i2s.c
index 9ac93f6b4f85..fff579a1c134 100644
--- a/sound/soc/ep93xx/ep93xx-i2s.c
+++ b/sound/soc/ep93xx/ep93xx-i2s.c
@@ -267,14 +267,16 @@ static int ep93xx_i2s_hw_params(struct snd_pcm_substream *substream,
                 ep93xx_i2s_write_reg(info, EP93XX_I2S_RXWRDLEN, word_len);
 
         /*
-         * Calculate the sdiv (bit clock) and lrdiv (left/right clock) values.
-         * If the lrclk is pulse length is larger than the word size, then the
-         * bit clock will be gated for the unused bits.
+         * EP93xx I2S module can be setup so SCLK / LRCLK value can be
+         * 32, 64, 128. MCLK / SCLK value can be 2 and 4.
+         * We set LRCLK equal to `rate' and minimum SCLK / LRCLK 
+         * value is 64, because our sample size is 32 bit * 2 channels.
+         * I2S standard permits us to transmit more bits than
+         * the codec uses.
          */
-        div = (clk_get_rate(info->mclk) / params_rate(params)) *
-                params_channels(params);
+        div = clk_get_rate(info->mclk) / params_rate(params);
         for (sdiv = 2; sdiv <= 4; sdiv += 2)
-                for (lrdiv = 32; lrdiv <= 128; lrdiv <<= 1)
+                for (lrdiv = 64; lrdiv <= 128; lrdiv <<= 1)
                         if (sdiv * lrdiv == div) {
                                 found = 1;
                                 goto out;
@@ -341,9 +343,7 @@ static struct snd_soc_dai_ops ep93xx_i2s_dai_ops = {
         .set_fmt        = ep93xx_i2s_set_dai_fmt,
 };
 
-#define EP93XX_I2S_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | \
-                            SNDRV_PCM_FMTBIT_S24_LE | \
-                            SNDRV_PCM_FMTBIT_S32_LE)
+#define EP93XX_I2S_FORMATS (SNDRV_PCM_FMTBIT_S32_LE)
 
 static struct snd_soc_dai_driver ep93xx_i2s_dai = {
         .symmetric_rates= 1,
diff --git a/tools/perf/builtin-record.c b/tools/perf/builtin-record.c
index df6064ad9bf2..fcd29e8af29f 100644
--- a/tools/perf/builtin-record.c
+++ b/tools/perf/builtin-record.c
@@ -936,6 +936,8 @@ int cmd_record(int argc, const char **argv, const char *prefix __used)
         list_for_each_entry(pos, &evsel_list, node) {
                 if (perf_evsel__alloc_fd(pos, cpus->nr, threads->nr) < 0)
                         goto out_free_fd;
+                if (perf_header__push_event(pos->attr.config, event_name(pos)))
+                        goto out_free_fd;
         }
         event_array = malloc((sizeof(struct pollfd) * MAX_NR_CPUS *
                               MAX_COUNTERS * threads->nr));
diff --git a/tools/perf/util/parse-events.c b/tools/perf/util/parse-events.c
index 5cb6f4bde905..bc2732ee23eb 100644
--- a/tools/perf/util/parse-events.c
+++ b/tools/perf/util/parse-events.c
@@ -490,32 +490,6 @@ parse_multiple_tracepoint_event(char *sys_name, const char *evt_exp,
         return EVT_HANDLED_ALL;
 }
 
-static int store_event_type(const char *orgname)
-{
-        char filename[PATH_MAX], *c;
-        FILE *file;
-        int id, n;
-
-        sprintf(filename, "%s/", debugfs_path);
-        strncat(filename, orgname, strlen(orgname));
-        strcat(filename, "/id");
-
-        c = strchr(filename, ':');
-        if (c)
-                *c = '/';
-
-        file = fopen(filename, "r");
-        if (!file)
-                return 0;
-        n = fscanf(file, "%i", &id);
-        fclose(file);
-        if (n < 1) {
-                pr_err("cannot store event ID\n");
-                return -EINVAL;
-        }
-        return perf_header__push_event(id, orgname);
-}
-
 static enum event_result parse_tracepoint_event(const char **strp,
                                     struct perf_event_attr *attr)
 {
@@ -555,13 +529,10 @@ static enum event_result parse_tracepoint_event(const char **strp,
         if (evt_length >= MAX_EVENT_LENGTH)
                 return EVT_FAILED;
         if (strpbrk(evt_name, "*?")) {
-                *strp += strlen(sys_name) + evt_length;
+                *strp += strlen(sys_name) + evt_length + 1; /* 1 == the ':' */
                 return parse_multiple_tracepoint_event(sys_name, evt_name,
                                                        flags);
         } else {
-                if (store_event_type(evt_name) < 0)
-                        return EVT_FAILED;
-
                 return parse_single_tracepoint_event(sys_name, evt_name,
                                                      evt_length, attr, strp);
         }