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-rw-r--r--arch/i386/kernel/io_apic.c66
-rw-r--r--arch/mips/kernel/asm-offsets.c2
-rw-r--r--arch/mips/kernel/entry.S3
-rw-r--r--arch/mips/kernel/head.S3
-rw-r--r--arch/mips/kernel/r4k_switch.S5
-rw-r--r--arch/mips/kernel/smtc-asm.S7
-rw-r--r--arch/mips/kernel/smtc.c1
-rw-r--r--arch/mips/kernel/vmlinux.lds.S10
-rw-r--r--arch/mips/lib-64/dump_tlb.c6
-rw-r--r--arch/mips/mips-boards/generic/memory.c2
-rw-r--r--arch/mips/mips-boards/generic/pci.c2
-rw-r--r--arch/mips/mm/pg-r4k.c30
-rw-r--r--arch/mips/mm/tlbex.c13
-rw-r--r--arch/powerpc/kernel/Makefile1
-rw-r--r--arch/powerpc/kernel/btext.c2
-rw-r--r--arch/powerpc/kernel/head_64.S27
-rw-r--r--arch/powerpc/kernel/iommu.c77
-rw-r--r--arch/powerpc/kernel/perfmon_fsl_booke.c221
-rw-r--r--arch/powerpc/kernel/pmc.c2
-rw-r--r--arch/powerpc/kernel/traps.c18
-rw-r--r--arch/powerpc/kernel/vio.c4
-rw-r--r--arch/powerpc/lib/sstep.c5
-rw-r--r--arch/powerpc/mm/hugetlbpage.c3
-rw-r--r--arch/powerpc/oprofile/Makefile2
-rw-r--r--arch/powerpc/oprofile/common.c10
-rw-r--r--arch/powerpc/oprofile/op_model_7450.c2
-rw-r--r--arch/powerpc/oprofile/op_model_fsl_booke.c170
-rw-r--r--arch/powerpc/oprofile/op_model_power4.c2
-rw-r--r--arch/powerpc/oprofile/op_model_rs64.c2
-rw-r--r--arch/powerpc/platforms/iseries/iommu.c11
-rw-r--r--arch/powerpc/platforms/pseries/iommu.c35
-rw-r--r--arch/powerpc/sysdev/dart.h1
-rw-r--r--arch/powerpc/sysdev/dart_iommu.c8
-rw-r--r--arch/powerpc/sysdev/qe_lib/qe.c3
-rw-r--r--arch/ppc/kernel/traps.c18
-rw-r--r--drivers/video/offb.c36
-rw-r--r--include/asm-i386/io_apic.h29
-rw-r--r--include/asm-mips/asm.h2
-rw-r--r--include/asm-mips/pgalloc.h2
-rw-r--r--include/asm-mips/pgtable-64.h2
-rw-r--r--include/asm-powerpc/current.h12
-rw-r--r--include/asm-powerpc/io.h7
-rw-r--r--include/asm-powerpc/iommu.h22
-rw-r--r--include/asm-powerpc/oprofile_impl.h87
-rw-r--r--include/asm-powerpc/pmc.h13
-rw-r--r--include/asm-powerpc/system.h6
-rw-r--r--include/asm-powerpc/tce.h3
47 files changed, 535 insertions, 460 deletions
diff --git a/arch/i386/kernel/io_apic.c b/arch/i386/kernel/io_apic.c
index 350192d6ab98..507983c513c3 100644
--- a/arch/i386/kernel/io_apic.c
+++ b/arch/i386/kernel/io_apic.c
@@ -91,6 +91,46 @@ static struct irq_pin_list {
91 int apic, pin, next; 91 int apic, pin, next;
92} irq_2_pin[PIN_MAP_SIZE]; 92} irq_2_pin[PIN_MAP_SIZE];
93 93
94struct io_apic {
95 unsigned int index;
96 unsigned int unused[3];
97 unsigned int data;
98};
99
100static __attribute_const__ struct io_apic __iomem *io_apic_base(int idx)
101{
102 return (void __iomem *) __fix_to_virt(FIX_IO_APIC_BASE_0 + idx)
103 + (mp_ioapics[idx].mpc_apicaddr & ~PAGE_MASK);
104}
105
106static inline unsigned int io_apic_read(unsigned int apic, unsigned int reg)
107{
108 struct io_apic __iomem *io_apic = io_apic_base(apic);
109 writel(reg, &io_apic->index);
110 return readl(&io_apic->data);
111}
112
113static inline void io_apic_write(unsigned int apic, unsigned int reg, unsigned int value)
114{
115 struct io_apic __iomem *io_apic = io_apic_base(apic);
116 writel(reg, &io_apic->index);
117 writel(value, &io_apic->data);
118}
119
120/*
121 * Re-write a value: to be used for read-modify-write
122 * cycles where the read already set up the index register.
123 *
124 * Older SiS APIC requires we rewrite the index register
125 */
126static inline void io_apic_modify(unsigned int apic, unsigned int reg, unsigned int value)
127{
128 volatile struct io_apic *io_apic = io_apic_base(apic);
129 if (sis_apic_bug)
130 writel(reg, &io_apic->index);
131 writel(value, &io_apic->data);
132}
133
94union entry_union { 134union entry_union {
95 struct { u32 w1, w2; }; 135 struct { u32 w1, w2; };
96 struct IO_APIC_route_entry entry; 136 struct IO_APIC_route_entry entry;
@@ -107,12 +147,34 @@ static struct IO_APIC_route_entry ioapic_read_entry(int apic, int pin)
107 return eu.entry; 147 return eu.entry;
108} 148}
109 149
150/*
151 * When we write a new IO APIC routing entry, we need to write the high
152 * word first! If the mask bit in the low word is clear, we will enable
153 * the interrupt, and we need to make sure the entry is fully populated
154 * before that happens.
155 */
110static void ioapic_write_entry(int apic, int pin, struct IO_APIC_route_entry e) 156static void ioapic_write_entry(int apic, int pin, struct IO_APIC_route_entry e)
111{ 157{
112 unsigned long flags; 158 unsigned long flags;
113 union entry_union eu; 159 union entry_union eu;
114 eu.entry = e; 160 eu.entry = e;
115 spin_lock_irqsave(&ioapic_lock, flags); 161 spin_lock_irqsave(&ioapic_lock, flags);
162 io_apic_write(apic, 0x11 + 2*pin, eu.w2);
163 io_apic_write(apic, 0x10 + 2*pin, eu.w1);
164 spin_unlock_irqrestore(&ioapic_lock, flags);
165}
166
167/*
168 * When we mask an IO APIC routing entry, we need to write the low
169 * word first, in order to set the mask bit before we change the
170 * high bits!
171 */
172static void ioapic_mask_entry(int apic, int pin)
173{
174 unsigned long flags;
175 union entry_union eu = { .entry.mask = 1 };
176
177 spin_lock_irqsave(&ioapic_lock, flags);
116 io_apic_write(apic, 0x10 + 2*pin, eu.w1); 178 io_apic_write(apic, 0x10 + 2*pin, eu.w1);
117 io_apic_write(apic, 0x11 + 2*pin, eu.w2); 179 io_apic_write(apic, 0x11 + 2*pin, eu.w2);
118 spin_unlock_irqrestore(&ioapic_lock, flags); 180 spin_unlock_irqrestore(&ioapic_lock, flags);
@@ -234,9 +296,7 @@ static void clear_IO_APIC_pin(unsigned int apic, unsigned int pin)
234 /* 296 /*
235 * Disable it in the IO-APIC irq-routing table: 297 * Disable it in the IO-APIC irq-routing table:
236 */ 298 */
237 memset(&entry, 0, sizeof(entry)); 299 ioapic_mask_entry(apic, pin);
238 entry.mask = 1;
239 ioapic_write_entry(apic, pin, entry);
240} 300}
241 301
242static void clear_IO_APIC (void) 302static void clear_IO_APIC (void)
diff --git a/arch/mips/kernel/asm-offsets.c b/arch/mips/kernel/asm-offsets.c
index e9ce5b3721af..ff88b06f89df 100644
--- a/arch/mips/kernel/asm-offsets.c
+++ b/arch/mips/kernel/asm-offsets.c
@@ -22,7 +22,7 @@
22#define offset(string, ptr, member) \ 22#define offset(string, ptr, member) \
23 __asm__("\n@@@" string "%0" : : "i" (_offset(ptr, member))) 23 __asm__("\n@@@" string "%0" : : "i" (_offset(ptr, member)))
24#define constant(string, member) \ 24#define constant(string, member) \
25 __asm__("\n@@@" string "%x0" : : "ri" (member)) 25 __asm__("\n@@@" string "%X0" : : "ri" (member))
26#define size(string, size) \ 26#define size(string, size) \
27 __asm__("\n@@@" string "%0" : : "i" (sizeof(size))) 27 __asm__("\n@@@" string "%0" : : "i" (sizeof(size)))
28#define linefeed text("") 28#define linefeed text("")
diff --git a/arch/mips/kernel/entry.S b/arch/mips/kernel/entry.S
index 417c08ac76eb..f10b6a19f8bf 100644
--- a/arch/mips/kernel/entry.S
+++ b/arch/mips/kernel/entry.S
@@ -83,7 +83,10 @@ FEXPORT(syscall_exit)
83FEXPORT(restore_all) # restore full frame 83FEXPORT(restore_all) # restore full frame
84#ifdef CONFIG_MIPS_MT_SMTC 84#ifdef CONFIG_MIPS_MT_SMTC
85/* Detect and execute deferred IPI "interrupts" */ 85/* Detect and execute deferred IPI "interrupts" */
86 LONG_L s0, TI_REGS($28)
87 LONG_S sp, TI_REGS($28)
86 jal deferred_smtc_ipi 88 jal deferred_smtc_ipi
89 LONG_S s0, TI_REGS($28)
87/* Re-arm any temporarily masked interrupts not explicitly "acked" */ 90/* Re-arm any temporarily masked interrupts not explicitly "acked" */
88 mfc0 v0, CP0_TCSTATUS 91 mfc0 v0, CP0_TCSTATUS
89 ori v1, v0, TCSTATUS_IXMT 92 ori v1, v0, TCSTATUS_IXMT
diff --git a/arch/mips/kernel/head.S b/arch/mips/kernel/head.S
index 8c6db0fc72f0..ddc1b71c9378 100644
--- a/arch/mips/kernel/head.S
+++ b/arch/mips/kernel/head.S
@@ -189,7 +189,8 @@ NESTED(kernel_entry, 16, sp) # kernel entry point
189 189
190 MTC0 zero, CP0_CONTEXT # clear context register 190 MTC0 zero, CP0_CONTEXT # clear context register
191 PTR_LA $28, init_thread_union 191 PTR_LA $28, init_thread_union
192 PTR_ADDIU sp, $28, _THREAD_SIZE - 32 192 PTR_LI sp, _THREAD_SIZE - 32
193 PTR_ADDU sp, $28
193 set_saved_sp sp, t0, t1 194 set_saved_sp sp, t0, t1
194 PTR_SUBU sp, 4 * SZREG # init stack pointer 195 PTR_SUBU sp, 4 * SZREG # init stack pointer
195 196
diff --git a/arch/mips/kernel/r4k_switch.S b/arch/mips/kernel/r4k_switch.S
index d5c8b82fed72..cc566cf12246 100644
--- a/arch/mips/kernel/r4k_switch.S
+++ b/arch/mips/kernel/r4k_switch.S
@@ -85,7 +85,12 @@
85 move $28, a2 85 move $28, a2
86 cpu_restore_nonscratch a1 86 cpu_restore_nonscratch a1
87 87
88#if (_THREAD_SIZE - 32) < 0x10000
88 PTR_ADDIU t0, $28, _THREAD_SIZE - 32 89 PTR_ADDIU t0, $28, _THREAD_SIZE - 32
90#else
91 PTR_LI t0, _THREAD_SIZE - 32
92 PTR_ADDU t0, $28
93#endif
89 set_saved_sp t0, t1, t2 94 set_saved_sp t0, t1, t2
90#ifdef CONFIG_MIPS_MT_SMTC 95#ifdef CONFIG_MIPS_MT_SMTC
91 /* Read-modify-writes of Status must be atomic on a VPE */ 96 /* Read-modify-writes of Status must be atomic on a VPE */
diff --git a/arch/mips/kernel/smtc-asm.S b/arch/mips/kernel/smtc-asm.S
index 1cb9441f1474..921207c4a83c 100644
--- a/arch/mips/kernel/smtc-asm.S
+++ b/arch/mips/kernel/smtc-asm.S
@@ -101,7 +101,9 @@ FEXPORT(__smtc_ipi_vector)
101 lw t0,PT_PADSLOT5(sp) 101 lw t0,PT_PADSLOT5(sp)
102 /* Argument from sender passed in stack pad slot 4 */ 102 /* Argument from sender passed in stack pad slot 4 */
103 lw a0,PT_PADSLOT4(sp) 103 lw a0,PT_PADSLOT4(sp)
104 PTR_LA ra, _ret_from_irq 104 LONG_L s0, TI_REGS($28)
105 LONG_S sp, TI_REGS($28)
106 PTR_LA ra, ret_from_irq
105 jr t0 107 jr t0
106 108
107/* 109/*
@@ -119,7 +121,10 @@ LEAF(self_ipi)
119 subu t1,sp,PT_SIZE 121 subu t1,sp,PT_SIZE
120 sw ra,PT_EPC(t1) 122 sw ra,PT_EPC(t1)
121 sw a0,PT_PADSLOT4(t1) 123 sw a0,PT_PADSLOT4(t1)
124 LONG_L s0, TI_REGS($28)
125 LONG_S sp, TI_REGS($28)
122 la t2,ipi_decode 126 la t2,ipi_decode
127 LONG_S s0, TI_REGS($28)
123 sw t2,PT_PADSLOT5(t1) 128 sw t2,PT_PADSLOT5(t1)
124 /* Save pre-disable value of TCStatus */ 129 /* Save pre-disable value of TCStatus */
125 sw t0,PT_TCSTATUS(t1) 130 sw t0,PT_TCSTATUS(t1)
diff --git a/arch/mips/kernel/smtc.c b/arch/mips/kernel/smtc.c
index cc1f7474f7d7..3b78caf112f5 100644
--- a/arch/mips/kernel/smtc.c
+++ b/arch/mips/kernel/smtc.c
@@ -476,6 +476,7 @@ void mipsmt_prepare_cpus(void)
476 write_vpe_c0_compare(0); 476 write_vpe_c0_compare(0);
477 /* Propagate Config7 */ 477 /* Propagate Config7 */
478 write_vpe_c0_config7(read_c0_config7()); 478 write_vpe_c0_config7(read_c0_config7());
479 write_vpe_c0_count(read_c0_count());
479 } 480 }
480 /* enable multi-threading within VPE */ 481 /* enable multi-threading within VPE */
481 write_vpe_c0_vpecontrol(read_vpe_c0_vpecontrol() | VPECONTROL_TE); 482 write_vpe_c0_vpecontrol(read_vpe_c0_vpecontrol() | VPECONTROL_TE);
diff --git a/arch/mips/kernel/vmlinux.lds.S b/arch/mips/kernel/vmlinux.lds.S
index 25ed3337ce35..79f0317d84ac 100644
--- a/arch/mips/kernel/vmlinux.lds.S
+++ b/arch/mips/kernel/vmlinux.lds.S
@@ -50,6 +50,16 @@ SECTIONS
50 /* writeable */ 50 /* writeable */
51 .data : { /* Data */ 51 .data : { /* Data */
52 . = . + DATAOFFSET; /* for CONFIG_MAPPED_KERNEL */ 52 . = . + DATAOFFSET; /* for CONFIG_MAPPED_KERNEL */
53 /*
54 * This ALIGN is needed as a workaround for a bug a gcc bug upto 4.1 which
55 * limits the maximum alignment to at most 32kB and results in the following
56 * warning:
57 *
58 * CC arch/mips/kernel/init_task.o
59 * arch/mips/kernel/init_task.c:30: warning: alignment of ‘init_thread_union’
60 * is greater than maximum object file alignment. Using 32768
61 */
62 . = ALIGN(_PAGE_SIZE);
53 *(.data.init_task) 63 *(.data.init_task)
54 64
55 *(.data) 65 *(.data)
diff --git a/arch/mips/lib-64/dump_tlb.c b/arch/mips/lib-64/dump_tlb.c
index be8261be679b..594df1a05ecc 100644
--- a/arch/mips/lib-64/dump_tlb.c
+++ b/arch/mips/lib-64/dump_tlb.c
@@ -149,7 +149,7 @@ void dump_list_process(struct task_struct *t, void *address)
149 printk("Addr == %08lx\n", addr); 149 printk("Addr == %08lx\n", addr);
150 printk("tasks->mm.pgd == %08lx\n", (unsigned long) t->mm->pgd); 150 printk("tasks->mm.pgd == %08lx\n", (unsigned long) t->mm->pgd);
151 151
152 page_dir = pgd_offset(t->mm, 0); 152 page_dir = pgd_offset(t->mm, 0UL);
153 printk("page_dir == %016lx\n", (unsigned long) page_dir); 153 printk("page_dir == %016lx\n", (unsigned long) page_dir);
154 154
155 pgd = pgd_offset(t->mm, addr); 155 pgd = pgd_offset(t->mm, addr);
@@ -184,13 +184,13 @@ void dump_list_current(void *address)
184 dump_list_process(current, address); 184 dump_list_process(current, address);
185} 185}
186 186
187unsigned int vtop(void *address) 187unsigned long vtop(void *address)
188{ 188{
189 pgd_t *pgd; 189 pgd_t *pgd;
190 pud_t *pud; 190 pud_t *pud;
191 pmd_t *pmd; 191 pmd_t *pmd;
192 pte_t *pte; 192 pte_t *pte;
193 unsigned int addr, paddr; 193 unsigned long addr, paddr;
194 194
195 addr = (unsigned long) address; 195 addr = (unsigned long) address;
196 pgd = pgd_offset(current->mm, addr); 196 pgd = pgd_offset(current->mm, addr);
diff --git a/arch/mips/mips-boards/generic/memory.c b/arch/mips/mips-boards/generic/memory.c
index be80c5dd4a0c..eeed944e0f83 100644
--- a/arch/mips/mips-boards/generic/memory.c
+++ b/arch/mips/mips-boards/generic/memory.c
@@ -176,7 +176,7 @@ unsigned long __init prom_free_prom_memory(void)
176 if (boot_mem_map.map[i].type != BOOT_MEM_ROM_DATA) 176 if (boot_mem_map.map[i].type != BOOT_MEM_ROM_DATA)
177 continue; 177 continue;
178 178
179 addr = boot_mem_map.map[i].addr; 179 addr = PAGE_ALIGN(boot_mem_map.map[i].addr);
180 while (addr < boot_mem_map.map[i].addr 180 while (addr < boot_mem_map.map[i].addr
181 + boot_mem_map.map[i].size) { 181 + boot_mem_map.map[i].size) {
182 ClearPageReserved(virt_to_page(__va(addr))); 182 ClearPageReserved(virt_to_page(__va(addr)));
diff --git a/arch/mips/mips-boards/generic/pci.c b/arch/mips/mips-boards/generic/pci.c
index 9337f6c8873a..3192a14698c8 100644
--- a/arch/mips/mips-boards/generic/pci.c
+++ b/arch/mips/mips-boards/generic/pci.c
@@ -90,7 +90,7 @@ static struct pci_controller msc_controller = {
90void __init mips_pcibios_init(void) 90void __init mips_pcibios_init(void)
91{ 91{
92 struct pci_controller *controller; 92 struct pci_controller *controller;
93 unsigned long start, end, map, start1, end1, map1, map2, map3, mask; 93 resource_size_t start, end, map, start1, end1, map1, map2, map3, mask;
94 94
95 switch (mips_revision_corid) { 95 switch (mips_revision_corid) {
96 case MIPS_REVISION_CORID_QED_RM5261: 96 case MIPS_REVISION_CORID_QED_RM5261:
diff --git a/arch/mips/mm/pg-r4k.c b/arch/mips/mm/pg-r4k.c
index b7c749232ffe..d41fc5885e87 100644
--- a/arch/mips/mm/pg-r4k.c
+++ b/arch/mips/mm/pg-r4k.c
@@ -270,6 +270,20 @@ static inline void build_addiu_a2_a0(unsigned long offset)
270 emit_instruction(mi); 270 emit_instruction(mi);
271} 271}
272 272
273static inline void build_addiu_a2(unsigned long offset)
274{
275 union mips_instruction mi;
276
277 BUG_ON(offset > 0x7fff);
278
279 mi.i_format.opcode = cpu_has_64bit_gp_regs ? daddiu_op : addiu_op;
280 mi.i_format.rs = 6; /* $a2 */
281 mi.i_format.rt = 6; /* $a2 */
282 mi.i_format.simmediate = offset;
283
284 emit_instruction(mi);
285}
286
273static inline void build_addiu_a1(unsigned long offset) 287static inline void build_addiu_a1(unsigned long offset)
274{ 288{
275 union mips_instruction mi; 289 union mips_instruction mi;
@@ -333,6 +347,7 @@ static inline void build_jr_ra(void)
333void __init build_clear_page(void) 347void __init build_clear_page(void)
334{ 348{
335 unsigned int loop_start; 349 unsigned int loop_start;
350 unsigned long off;
336 351
337 epc = (unsigned int *) &clear_page_array; 352 epc = (unsigned int *) &clear_page_array;
338 instruction_pending = 0; 353 instruction_pending = 0;
@@ -369,7 +384,12 @@ void __init build_clear_page(void)
369 } 384 }
370 } 385 }
371 386
372 build_addiu_a2_a0(PAGE_SIZE - (cpu_has_prefetch ? pref_offset_clear : 0)); 387 off = PAGE_SIZE - (cpu_has_prefetch ? pref_offset_clear : 0);
388 if (off > 0x7fff) {
389 build_addiu_a2_a0(off >> 1);
390 build_addiu_a2(off >> 1);
391 } else
392 build_addiu_a2_a0(off);
373 393
374 if (R4600_V2_HIT_CACHEOP_WAR && cpu_is_r4600_v2_x()) 394 if (R4600_V2_HIT_CACHEOP_WAR && cpu_is_r4600_v2_x())
375 build_insn_word(0x3c01a000); /* lui $at, 0xa000 */ 395 build_insn_word(0x3c01a000); /* lui $at, 0xa000 */
@@ -420,12 +440,18 @@ dest = label();
420void __init build_copy_page(void) 440void __init build_copy_page(void)
421{ 441{
422 unsigned int loop_start; 442 unsigned int loop_start;
443 unsigned long off;
423 444
424 epc = (unsigned int *) &copy_page_array; 445 epc = (unsigned int *) &copy_page_array;
425 store_offset = load_offset = 0; 446 store_offset = load_offset = 0;
426 instruction_pending = 0; 447 instruction_pending = 0;
427 448
428 build_addiu_a2_a0(PAGE_SIZE - (cpu_has_prefetch ? pref_offset_copy : 0)); 449 off = PAGE_SIZE - (cpu_has_prefetch ? pref_offset_copy : 0);
450 if (off > 0x7fff) {
451 build_addiu_a2_a0(off >> 1);
452 build_addiu_a2(off >> 1);
453 } else
454 build_addiu_a2_a0(off);
429 455
430 if (R4600_V2_HIT_CACHEOP_WAR && cpu_is_r4600_v2_x()) 456 if (R4600_V2_HIT_CACHEOP_WAR && cpu_is_r4600_v2_x())
431 build_insn_word(0x3c01a000); /* lui $at, 0xa000 */ 457 build_insn_word(0x3c01a000); /* lui $at, 0xa000 */
diff --git a/arch/mips/mm/tlbex.c b/arch/mips/mm/tlbex.c
index 6f8b25cfa6f0..fec318a1c8c5 100644
--- a/arch/mips/mm/tlbex.c
+++ b/arch/mips/mm/tlbex.c
@@ -102,7 +102,7 @@ enum opcode {
102 insn_addu, insn_addiu, insn_and, insn_andi, insn_beq, 102 insn_addu, insn_addiu, insn_and, insn_andi, insn_beq,
103 insn_beql, insn_bgez, insn_bgezl, insn_bltz, insn_bltzl, 103 insn_beql, insn_bgez, insn_bgezl, insn_bltz, insn_bltzl,
104 insn_bne, insn_daddu, insn_daddiu, insn_dmfc0, insn_dmtc0, 104 insn_bne, insn_daddu, insn_daddiu, insn_dmfc0, insn_dmtc0,
105 insn_dsll, insn_dsll32, insn_dsra, insn_dsrl, 105 insn_dsll, insn_dsll32, insn_dsra, insn_dsrl, insn_dsrl32,
106 insn_dsubu, insn_eret, insn_j, insn_jal, insn_jr, insn_ld, 106 insn_dsubu, insn_eret, insn_j, insn_jal, insn_jr, insn_ld,
107 insn_ll, insn_lld, insn_lui, insn_lw, insn_mfc0, insn_mtc0, 107 insn_ll, insn_lld, insn_lui, insn_lw, insn_mfc0, insn_mtc0,
108 insn_ori, insn_rfe, insn_sc, insn_scd, insn_sd, insn_sll, 108 insn_ori, insn_rfe, insn_sc, insn_scd, insn_sd, insn_sll,
@@ -145,6 +145,7 @@ static __initdata struct insn insn_table[] = {
145 { insn_dsll32, M(spec_op,0,0,0,0,dsll32_op), RT | RD | RE }, 145 { insn_dsll32, M(spec_op,0,0,0,0,dsll32_op), RT | RD | RE },
146 { insn_dsra, M(spec_op,0,0,0,0,dsra_op), RT | RD | RE }, 146 { insn_dsra, M(spec_op,0,0,0,0,dsra_op), RT | RD | RE },
147 { insn_dsrl, M(spec_op,0,0,0,0,dsrl_op), RT | RD | RE }, 147 { insn_dsrl, M(spec_op,0,0,0,0,dsrl_op), RT | RD | RE },
148 { insn_dsrl32, M(spec_op,0,0,0,0,dsrl32_op), RT | RD | RE },
148 { insn_dsubu, M(spec_op,0,0,0,0,dsubu_op), RS | RT | RD }, 149 { insn_dsubu, M(spec_op,0,0,0,0,dsubu_op), RS | RT | RD },
149 { insn_eret, M(cop0_op,cop_op,0,0,0,eret_op), 0 }, 150 { insn_eret, M(cop0_op,cop_op,0,0,0,eret_op), 0 },
150 { insn_j, M(j_op,0,0,0,0,0), JIMM }, 151 { insn_j, M(j_op,0,0,0,0,0), JIMM },
@@ -385,6 +386,7 @@ I_u2u1u3(_dsll);
385I_u2u1u3(_dsll32); 386I_u2u1u3(_dsll32);
386I_u2u1u3(_dsra); 387I_u2u1u3(_dsra);
387I_u2u1u3(_dsrl); 388I_u2u1u3(_dsrl);
389I_u2u1u3(_dsrl32);
388I_u3u1u2(_dsubu); 390I_u3u1u2(_dsubu);
389I_0(_eret); 391I_0(_eret);
390I_u1(_j); 392I_u1(_j);
@@ -996,7 +998,12 @@ build_get_pmde64(u32 **p, struct label **l, struct reloc **r,
996#endif 998#endif
997 999
998 l_vmalloc_done(l, *p); 1000 l_vmalloc_done(l, *p);
999 i_dsrl(p, tmp, tmp, PGDIR_SHIFT-3); /* get pgd offset in bytes */ 1001
1002 if (PGDIR_SHIFT - 3 < 32) /* get pgd offset in bytes */
1003 i_dsrl(p, tmp, tmp, PGDIR_SHIFT-3);
1004 else
1005 i_dsrl32(p, tmp, tmp, PGDIR_SHIFT - 3 - 32);
1006
1000 i_andi(p, tmp, tmp, (PTRS_PER_PGD - 1)<<3); 1007 i_andi(p, tmp, tmp, (PTRS_PER_PGD - 1)<<3);
1001 i_daddu(p, ptr, ptr, tmp); /* add in pgd offset */ 1008 i_daddu(p, ptr, ptr, tmp); /* add in pgd offset */
1002 i_dmfc0(p, tmp, C0_BADVADDR); /* get faulting address */ 1009 i_dmfc0(p, tmp, C0_BADVADDR); /* get faulting address */
@@ -1073,7 +1080,7 @@ build_get_pgde32(u32 **p, unsigned int tmp, unsigned int ptr)
1073 1080
1074static __init void build_adjust_context(u32 **p, unsigned int ctx) 1081static __init void build_adjust_context(u32 **p, unsigned int ctx)
1075{ 1082{
1076 unsigned int shift = 4 - (PTE_T_LOG2 + 1); 1083 unsigned int shift = 4 - (PTE_T_LOG2 + 1) + PAGE_SHIFT - 12;
1077 unsigned int mask = (PTRS_PER_PTE / 2 - 1) << (PTE_T_LOG2 + 1); 1084 unsigned int mask = (PTRS_PER_PTE / 2 - 1) << (PTE_T_LOG2 + 1);
1078 1085
1079 switch (current_cpu_data.cputype) { 1086 switch (current_cpu_data.cputype) {
diff --git a/arch/powerpc/kernel/Makefile b/arch/powerpc/kernel/Makefile
index 8b133afbdc20..7af23c43fd4b 100644
--- a/arch/powerpc/kernel/Makefile
+++ b/arch/powerpc/kernel/Makefile
@@ -38,7 +38,6 @@ obj-$(CONFIG_6xx) += idle_6xx.o l2cr_6xx.o cpu_setup_6xx.o
38obj-$(CONFIG_TAU) += tau_6xx.o 38obj-$(CONFIG_TAU) += tau_6xx.o
39obj32-$(CONFIG_SOFTWARE_SUSPEND) += swsusp_32.o 39obj32-$(CONFIG_SOFTWARE_SUSPEND) += swsusp_32.o
40obj32-$(CONFIG_MODULES) += module_32.o 40obj32-$(CONFIG_MODULES) += module_32.o
41obj-$(CONFIG_E500) += perfmon_fsl_booke.o
42 41
43ifeq ($(CONFIG_PPC_MERGE),y) 42ifeq ($(CONFIG_PPC_MERGE),y)
44 43
diff --git a/arch/powerpc/kernel/btext.c b/arch/powerpc/kernel/btext.c
index 995fcef156fd..93f21aaf7c8e 100644
--- a/arch/powerpc/kernel/btext.c
+++ b/arch/powerpc/kernel/btext.c
@@ -182,7 +182,7 @@ int btext_initialize(struct device_node *np)
182 prop = get_property(np, "linux,bootx-linebytes", NULL); 182 prop = get_property(np, "linux,bootx-linebytes", NULL);
183 if (prop == NULL) 183 if (prop == NULL)
184 prop = get_property(np, "linebytes", NULL); 184 prop = get_property(np, "linebytes", NULL);
185 if (prop) 185 if (prop && *prop != 0xffffffffu)
186 pitch = *prop; 186 pitch = *prop;
187 if (pitch == 1) 187 if (pitch == 1)
188 pitch = 0x1000; 188 pitch = 0x1000;
diff --git a/arch/powerpc/kernel/head_64.S b/arch/powerpc/kernel/head_64.S
index 291e3629b504..e720729f3e55 100644
--- a/arch/powerpc/kernel/head_64.S
+++ b/arch/powerpc/kernel/head_64.S
@@ -487,7 +487,7 @@ BEGIN_FTR_SECTION
487 rlwimi r13,r12,16,0x20 487 rlwimi r13,r12,16,0x20
488 mfcr r12 488 mfcr r12
489 cmpwi r13,0x2c 489 cmpwi r13,0x2c
490 beq .do_stab_bolted_pSeries 490 beq do_stab_bolted_pSeries
491 mtcrf 0x80,r12 491 mtcrf 0x80,r12
492 mfspr r12,SPRN_SPRG2 492 mfspr r12,SPRN_SPRG2
493END_FTR_SECTION_IFCLR(CPU_FTR_SLB) 493END_FTR_SECTION_IFCLR(CPU_FTR_SLB)
@@ -600,7 +600,7 @@ system_call_pSeries:
600 STD_EXCEPTION_PSERIES(., performance_monitor) 600 STD_EXCEPTION_PSERIES(., performance_monitor)
601 601
602 .align 7 602 .align 7
603_GLOBAL(do_stab_bolted_pSeries) 603do_stab_bolted_pSeries:
604 mtcrf 0x80,r12 604 mtcrf 0x80,r12
605 mfspr r12,SPRN_SPRG2 605 mfspr r12,SPRN_SPRG2
606 EXCEPTION_PROLOG_PSERIES(PACA_EXSLB, .do_stab_bolted) 606 EXCEPTION_PROLOG_PSERIES(PACA_EXSLB, .do_stab_bolted)
@@ -1046,7 +1046,7 @@ slb_miss_fault:
1046 li r5,0 1046 li r5,0
1047 std r4,_DAR(r1) 1047 std r4,_DAR(r1)
1048 std r5,_DSISR(r1) 1048 std r5,_DSISR(r1)
1049 b .handle_page_fault 1049 b handle_page_fault
1050 1050
1051unrecov_user_slb: 1051unrecov_user_slb:
1052 EXCEPTION_PROLOG_COMMON(0x4200, PACA_EXGEN) 1052 EXCEPTION_PROLOG_COMMON(0x4200, PACA_EXGEN)
@@ -1174,12 +1174,13 @@ program_check_common:
1174 .globl fp_unavailable_common 1174 .globl fp_unavailable_common
1175fp_unavailable_common: 1175fp_unavailable_common:
1176 EXCEPTION_PROLOG_COMMON(0x800, PACA_EXGEN) 1176 EXCEPTION_PROLOG_COMMON(0x800, PACA_EXGEN)
1177 bne .load_up_fpu /* if from user, just load it up */ 1177 bne 1f /* if from user, just load it up */
1178 bl .save_nvgprs 1178 bl .save_nvgprs
1179 addi r3,r1,STACK_FRAME_OVERHEAD 1179 addi r3,r1,STACK_FRAME_OVERHEAD
1180 ENABLE_INTS 1180 ENABLE_INTS
1181 bl .kernel_fp_unavailable_exception 1181 bl .kernel_fp_unavailable_exception
1182 BUG_OPCODE 1182 BUG_OPCODE
11831: b .load_up_fpu
1183 1184
1184 .align 7 1185 .align 7
1185 .globl altivec_unavailable_common 1186 .globl altivec_unavailable_common
@@ -1279,10 +1280,10 @@ _GLOBAL(do_hash_page)
1279 std r4,_DSISR(r1) 1280 std r4,_DSISR(r1)
1280 1281
1281 andis. r0,r4,0xa450 /* weird error? */ 1282 andis. r0,r4,0xa450 /* weird error? */
1282 bne- .handle_page_fault /* if not, try to insert a HPTE */ 1283 bne- handle_page_fault /* if not, try to insert a HPTE */
1283BEGIN_FTR_SECTION 1284BEGIN_FTR_SECTION
1284 andis. r0,r4,0x0020 /* Is it a segment table fault? */ 1285 andis. r0,r4,0x0020 /* Is it a segment table fault? */
1285 bne- .do_ste_alloc /* If so handle it */ 1286 bne- do_ste_alloc /* If so handle it */
1286END_FTR_SECTION_IFCLR(CPU_FTR_SLB) 1287END_FTR_SECTION_IFCLR(CPU_FTR_SLB)
1287 1288
1288 /* 1289 /*
@@ -1324,7 +1325,7 @@ BEGIN_FW_FTR_SECTION
1324 * because ret_from_except_lite will check for and handle pending 1325 * because ret_from_except_lite will check for and handle pending
1325 * interrupts if necessary. 1326 * interrupts if necessary.
1326 */ 1327 */
1327 beq .ret_from_except_lite 1328 beq 13f
1328 /* For a hash failure, we don't bother re-enabling interrupts */ 1329 /* For a hash failure, we don't bother re-enabling interrupts */
1329 ble- 12f 1330 ble- 12f
1330 1331
@@ -1346,14 +1347,14 @@ BEGIN_FW_FTR_SECTION
1346END_FW_FTR_SECTION_IFCLR(FW_FEATURE_ISERIES) 1347END_FW_FTR_SECTION_IFCLR(FW_FEATURE_ISERIES)
1347 1348
1348/* Here we have a page fault that hash_page can't handle. */ 1349/* Here we have a page fault that hash_page can't handle. */
1349_GLOBAL(handle_page_fault) 1350handle_page_fault:
1350 ENABLE_INTS 1351 ENABLE_INTS
135111: ld r4,_DAR(r1) 135211: ld r4,_DAR(r1)
1352 ld r5,_DSISR(r1) 1353 ld r5,_DSISR(r1)
1353 addi r3,r1,STACK_FRAME_OVERHEAD 1354 addi r3,r1,STACK_FRAME_OVERHEAD
1354 bl .do_page_fault 1355 bl .do_page_fault
1355 cmpdi r3,0 1356 cmpdi r3,0
1356 beq+ .ret_from_except_lite 1357 beq+ 13f
1357 bl .save_nvgprs 1358 bl .save_nvgprs
1358 mr r5,r3 1359 mr r5,r3
1359 addi r3,r1,STACK_FRAME_OVERHEAD 1360 addi r3,r1,STACK_FRAME_OVERHEAD
@@ -1370,12 +1371,14 @@ _GLOBAL(handle_page_fault)
1370 bl .low_hash_fault 1371 bl .low_hash_fault
1371 b .ret_from_except 1372 b .ret_from_except
1372 1373
137413: b .ret_from_except_lite
1375
1373 /* here we have a segment miss */ 1376 /* here we have a segment miss */
1374_GLOBAL(do_ste_alloc) 1377do_ste_alloc:
1375 bl .ste_allocate /* try to insert stab entry */ 1378 bl .ste_allocate /* try to insert stab entry */
1376 cmpdi r3,0 1379 cmpdi r3,0
1377 beq+ fast_exception_return 1380 bne- handle_page_fault
1378 b .handle_page_fault 1381 b fast_exception_return
1379 1382
1380/* 1383/*
1381 * r13 points to the PACA, r9 contains the saved CR, 1384 * r13 points to the PACA, r9 contains the saved CR,
diff --git a/arch/powerpc/kernel/iommu.c b/arch/powerpc/kernel/iommu.c
index f88a2a675d90..ba6b7256084b 100644
--- a/arch/powerpc/kernel/iommu.c
+++ b/arch/powerpc/kernel/iommu.c
@@ -47,6 +47,17 @@ static int novmerge = 0;
47static int novmerge = 1; 47static int novmerge = 1;
48#endif 48#endif
49 49
50static inline unsigned long iommu_num_pages(unsigned long vaddr,
51 unsigned long slen)
52{
53 unsigned long npages;
54
55 npages = IOMMU_PAGE_ALIGN(vaddr + slen) - (vaddr & IOMMU_PAGE_MASK);
56 npages >>= IOMMU_PAGE_SHIFT;
57
58 return npages;
59}
60
50static int __init setup_iommu(char *str) 61static int __init setup_iommu(char *str)
51{ 62{
52 if (!strcmp(str, "novmerge")) 63 if (!strcmp(str, "novmerge"))
@@ -178,10 +189,10 @@ static dma_addr_t iommu_alloc(struct iommu_table *tbl, void *page,
178 } 189 }
179 190
180 entry += tbl->it_offset; /* Offset into real TCE table */ 191 entry += tbl->it_offset; /* Offset into real TCE table */
181 ret = entry << PAGE_SHIFT; /* Set the return dma address */ 192 ret = entry << IOMMU_PAGE_SHIFT; /* Set the return dma address */
182 193
183 /* Put the TCEs in the HW table */ 194 /* Put the TCEs in the HW table */
184 ppc_md.tce_build(tbl, entry, npages, (unsigned long)page & PAGE_MASK, 195 ppc_md.tce_build(tbl, entry, npages, (unsigned long)page & IOMMU_PAGE_MASK,
185 direction); 196 direction);
186 197
187 198
@@ -203,7 +214,7 @@ static void __iommu_free(struct iommu_table *tbl, dma_addr_t dma_addr,
203 unsigned long entry, free_entry; 214 unsigned long entry, free_entry;
204 unsigned long i; 215 unsigned long i;
205 216
206 entry = dma_addr >> PAGE_SHIFT; 217 entry = dma_addr >> IOMMU_PAGE_SHIFT;
207 free_entry = entry - tbl->it_offset; 218 free_entry = entry - tbl->it_offset;
208 219
209 if (((free_entry + npages) > tbl->it_size) || 220 if (((free_entry + npages) > tbl->it_size) ||
@@ -270,7 +281,7 @@ int iommu_map_sg(struct device *dev, struct iommu_table *tbl,
270 /* Init first segment length for backout at failure */ 281 /* Init first segment length for backout at failure */
271 outs->dma_length = 0; 282 outs->dma_length = 0;
272 283
273 DBG("mapping %d elements:\n", nelems); 284 DBG("sg mapping %d elements:\n", nelems);
274 285
275 spin_lock_irqsave(&(tbl->it_lock), flags); 286 spin_lock_irqsave(&(tbl->it_lock), flags);
276 287
@@ -285,9 +296,8 @@ int iommu_map_sg(struct device *dev, struct iommu_table *tbl,
285 } 296 }
286 /* Allocate iommu entries for that segment */ 297 /* Allocate iommu entries for that segment */
287 vaddr = (unsigned long)page_address(s->page) + s->offset; 298 vaddr = (unsigned long)page_address(s->page) + s->offset;
288 npages = PAGE_ALIGN(vaddr + slen) - (vaddr & PAGE_MASK); 299 npages = iommu_num_pages(vaddr, slen);
289 npages >>= PAGE_SHIFT; 300 entry = iommu_range_alloc(tbl, npages, &handle, mask >> IOMMU_PAGE_SHIFT, 0);
290 entry = iommu_range_alloc(tbl, npages, &handle, mask >> PAGE_SHIFT, 0);
291 301
292 DBG(" - vaddr: %lx, size: %lx\n", vaddr, slen); 302 DBG(" - vaddr: %lx, size: %lx\n", vaddr, slen);
293 303
@@ -301,14 +311,14 @@ int iommu_map_sg(struct device *dev, struct iommu_table *tbl,
301 311
302 /* Convert entry to a dma_addr_t */ 312 /* Convert entry to a dma_addr_t */
303 entry += tbl->it_offset; 313 entry += tbl->it_offset;
304 dma_addr = entry << PAGE_SHIFT; 314 dma_addr = entry << IOMMU_PAGE_SHIFT;
305 dma_addr |= s->offset; 315 dma_addr |= (s->offset & ~IOMMU_PAGE_MASK);
306 316
307 DBG(" - %lx pages, entry: %lx, dma_addr: %lx\n", 317 DBG(" - %lu pages, entry: %lx, dma_addr: %lx\n",
308 npages, entry, dma_addr); 318 npages, entry, dma_addr);
309 319
310 /* Insert into HW table */ 320 /* Insert into HW table */
311 ppc_md.tce_build(tbl, entry, npages, vaddr & PAGE_MASK, direction); 321 ppc_md.tce_build(tbl, entry, npages, vaddr & IOMMU_PAGE_MASK, direction);
312 322
313 /* If we are in an open segment, try merging */ 323 /* If we are in an open segment, try merging */
314 if (segstart != s) { 324 if (segstart != s) {
@@ -323,7 +333,7 @@ int iommu_map_sg(struct device *dev, struct iommu_table *tbl,
323 DBG(" can't merge, new segment.\n"); 333 DBG(" can't merge, new segment.\n");
324 } else { 334 } else {
325 outs->dma_length += s->length; 335 outs->dma_length += s->length;
326 DBG(" merged, new len: %lx\n", outs->dma_length); 336 DBG(" merged, new len: %ux\n", outs->dma_length);
327 } 337 }
328 } 338 }
329 339
@@ -367,9 +377,8 @@ int iommu_map_sg(struct device *dev, struct iommu_table *tbl,
367 if (s->dma_length != 0) { 377 if (s->dma_length != 0) {
368 unsigned long vaddr, npages; 378 unsigned long vaddr, npages;
369 379
370 vaddr = s->dma_address & PAGE_MASK; 380 vaddr = s->dma_address & IOMMU_PAGE_MASK;
371 npages = (PAGE_ALIGN(s->dma_address + s->dma_length) - vaddr) 381 npages = iommu_num_pages(s->dma_address, s->dma_length);
372 >> PAGE_SHIFT;
373 __iommu_free(tbl, vaddr, npages); 382 __iommu_free(tbl, vaddr, npages);
374 s->dma_address = DMA_ERROR_CODE; 383 s->dma_address = DMA_ERROR_CODE;
375 s->dma_length = 0; 384 s->dma_length = 0;
@@ -398,8 +407,7 @@ void iommu_unmap_sg(struct iommu_table *tbl, struct scatterlist *sglist,
398 407
399 if (sglist->dma_length == 0) 408 if (sglist->dma_length == 0)
400 break; 409 break;
401 npages = (PAGE_ALIGN(dma_handle + sglist->dma_length) 410 npages = iommu_num_pages(dma_handle,sglist->dma_length);
402 - (dma_handle & PAGE_MASK)) >> PAGE_SHIFT;
403 __iommu_free(tbl, dma_handle, npages); 411 __iommu_free(tbl, dma_handle, npages);
404 sglist++; 412 sglist++;
405 } 413 }
@@ -532,12 +540,11 @@ dma_addr_t iommu_map_single(struct iommu_table *tbl, void *vaddr,
532 BUG_ON(direction == DMA_NONE); 540 BUG_ON(direction == DMA_NONE);
533 541
534 uaddr = (unsigned long)vaddr; 542 uaddr = (unsigned long)vaddr;
535 npages = PAGE_ALIGN(uaddr + size) - (uaddr & PAGE_MASK); 543 npages = iommu_num_pages(uaddr, size);
536 npages >>= PAGE_SHIFT;
537 544
538 if (tbl) { 545 if (tbl) {
539 dma_handle = iommu_alloc(tbl, vaddr, npages, direction, 546 dma_handle = iommu_alloc(tbl, vaddr, npages, direction,
540 mask >> PAGE_SHIFT, 0); 547 mask >> IOMMU_PAGE_SHIFT, 0);
541 if (dma_handle == DMA_ERROR_CODE) { 548 if (dma_handle == DMA_ERROR_CODE) {
542 if (printk_ratelimit()) { 549 if (printk_ratelimit()) {
543 printk(KERN_INFO "iommu_alloc failed, " 550 printk(KERN_INFO "iommu_alloc failed, "
@@ -545,7 +552,7 @@ dma_addr_t iommu_map_single(struct iommu_table *tbl, void *vaddr,
545 tbl, vaddr, npages); 552 tbl, vaddr, npages);
546 } 553 }
547 } else 554 } else
548 dma_handle |= (uaddr & ~PAGE_MASK); 555 dma_handle |= (uaddr & ~IOMMU_PAGE_MASK);
549 } 556 }
550 557
551 return dma_handle; 558 return dma_handle;
@@ -554,11 +561,14 @@ dma_addr_t iommu_map_single(struct iommu_table *tbl, void *vaddr,
554void iommu_unmap_single(struct iommu_table *tbl, dma_addr_t dma_handle, 561void iommu_unmap_single(struct iommu_table *tbl, dma_addr_t dma_handle,
555 size_t size, enum dma_data_direction direction) 562 size_t size, enum dma_data_direction direction)
556{ 563{
564 unsigned int npages;
565
557 BUG_ON(direction == DMA_NONE); 566 BUG_ON(direction == DMA_NONE);
558 567
559 if (tbl) 568 if (tbl) {
560 iommu_free(tbl, dma_handle, (PAGE_ALIGN(dma_handle + size) - 569 npages = iommu_num_pages(dma_handle, size);
561 (dma_handle & PAGE_MASK)) >> PAGE_SHIFT); 570 iommu_free(tbl, dma_handle, npages);
571 }
562} 572}
563 573
564/* Allocates a contiguous real buffer and creates mappings over it. 574/* Allocates a contiguous real buffer and creates mappings over it.
@@ -570,11 +580,11 @@ void *iommu_alloc_coherent(struct iommu_table *tbl, size_t size,
570{ 580{
571 void *ret = NULL; 581 void *ret = NULL;
572 dma_addr_t mapping; 582 dma_addr_t mapping;
573 unsigned int npages, order; 583 unsigned int order;
584 unsigned int nio_pages, io_order;
574 struct page *page; 585 struct page *page;
575 586
576 size = PAGE_ALIGN(size); 587 size = PAGE_ALIGN(size);
577 npages = size >> PAGE_SHIFT;
578 order = get_order(size); 588 order = get_order(size);
579 589
580 /* 590 /*
@@ -598,8 +608,10 @@ void *iommu_alloc_coherent(struct iommu_table *tbl, size_t size,
598 memset(ret, 0, size); 608 memset(ret, 0, size);
599 609
600 /* Set up tces to cover the allocated range */ 610 /* Set up tces to cover the allocated range */
601 mapping = iommu_alloc(tbl, ret, npages, DMA_BIDIRECTIONAL, 611 nio_pages = size >> IOMMU_PAGE_SHIFT;
602 mask >> PAGE_SHIFT, order); 612 io_order = get_iommu_order(size);
613 mapping = iommu_alloc(tbl, ret, nio_pages, DMA_BIDIRECTIONAL,
614 mask >> IOMMU_PAGE_SHIFT, io_order);
603 if (mapping == DMA_ERROR_CODE) { 615 if (mapping == DMA_ERROR_CODE) {
604 free_pages((unsigned long)ret, order); 616 free_pages((unsigned long)ret, order);
605 return NULL; 617 return NULL;
@@ -611,12 +623,13 @@ void *iommu_alloc_coherent(struct iommu_table *tbl, size_t size,
611void iommu_free_coherent(struct iommu_table *tbl, size_t size, 623void iommu_free_coherent(struct iommu_table *tbl, size_t size,
612 void *vaddr, dma_addr_t dma_handle) 624 void *vaddr, dma_addr_t dma_handle)
613{ 625{
614 unsigned int npages;
615
616 if (tbl) { 626 if (tbl) {
627 unsigned int nio_pages;
628
629 size = PAGE_ALIGN(size);
630 nio_pages = size >> IOMMU_PAGE_SHIFT;
631 iommu_free(tbl, dma_handle, nio_pages);
617 size = PAGE_ALIGN(size); 632 size = PAGE_ALIGN(size);
618 npages = size >> PAGE_SHIFT;
619 iommu_free(tbl, dma_handle, npages);
620 free_pages((unsigned long)vaddr, get_order(size)); 633 free_pages((unsigned long)vaddr, get_order(size));
621 } 634 }
622} 635}
diff --git a/arch/powerpc/kernel/perfmon_fsl_booke.c b/arch/powerpc/kernel/perfmon_fsl_booke.c
deleted file mode 100644
index e0dcf2b41fbe..000000000000
--- a/arch/powerpc/kernel/perfmon_fsl_booke.c
+++ /dev/null
@@ -1,221 +0,0 @@
1/* arch/powerpc/kernel/perfmon_fsl_booke.c
2 * Freescale Book-E Performance Monitor code
3 *
4 * Author: Andy Fleming
5 * Copyright (c) 2004 Freescale Semiconductor, Inc
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
11 */
12
13#include <linux/errno.h>
14#include <linux/sched.h>
15#include <linux/kernel.h>
16#include <linux/mm.h>
17#include <linux/stddef.h>
18#include <linux/unistd.h>
19#include <linux/ptrace.h>
20#include <linux/slab.h>
21#include <linux/user.h>
22#include <linux/a.out.h>
23#include <linux/interrupt.h>
24#include <linux/init.h>
25#include <linux/module.h>
26#include <linux/prctl.h>
27
28#include <asm/pgtable.h>
29#include <asm/uaccess.h>
30#include <asm/system.h>
31#include <asm/io.h>
32#include <asm/reg.h>
33#include <asm/xmon.h>
34#include <asm/pmc.h>
35
36static inline u32 get_pmlca(int ctr);
37static inline void set_pmlca(int ctr, u32 pmlca);
38
39static inline u32 get_pmlca(int ctr)
40{
41 u32 pmlca;
42
43 switch (ctr) {
44 case 0:
45 pmlca = mfpmr(PMRN_PMLCA0);
46 break;
47 case 1:
48 pmlca = mfpmr(PMRN_PMLCA1);
49 break;
50 case 2:
51 pmlca = mfpmr(PMRN_PMLCA2);
52 break;
53 case 3:
54 pmlca = mfpmr(PMRN_PMLCA3);
55 break;
56 default:
57 panic("Bad ctr number\n");
58 }
59
60 return pmlca;
61}
62
63static inline void set_pmlca(int ctr, u32 pmlca)
64{
65 switch (ctr) {
66 case 0:
67 mtpmr(PMRN_PMLCA0, pmlca);
68 break;
69 case 1:
70 mtpmr(PMRN_PMLCA1, pmlca);
71 break;
72 case 2:
73 mtpmr(PMRN_PMLCA2, pmlca);
74 break;
75 case 3:
76 mtpmr(PMRN_PMLCA3, pmlca);
77 break;
78 default:
79 panic("Bad ctr number\n");
80 }
81}
82
83void init_pmc_stop(int ctr)
84{
85 u32 pmlca = (PMLCA_FC | PMLCA_FCS | PMLCA_FCU |
86 PMLCA_FCM1 | PMLCA_FCM0);
87 u32 pmlcb = 0;
88
89 switch (ctr) {
90 case 0:
91 mtpmr(PMRN_PMLCA0, pmlca);
92 mtpmr(PMRN_PMLCB0, pmlcb);
93 break;
94 case 1:
95 mtpmr(PMRN_PMLCA1, pmlca);
96 mtpmr(PMRN_PMLCB1, pmlcb);
97 break;
98 case 2:
99 mtpmr(PMRN_PMLCA2, pmlca);
100 mtpmr(PMRN_PMLCB2, pmlcb);
101 break;
102 case 3:
103 mtpmr(PMRN_PMLCA3, pmlca);
104 mtpmr(PMRN_PMLCB3, pmlcb);
105 break;
106 default:
107 panic("Bad ctr number!\n");
108 }
109}
110
111void set_pmc_event(int ctr, int event)
112{
113 u32 pmlca;
114
115 pmlca = get_pmlca(ctr);
116
117 pmlca = (pmlca & ~PMLCA_EVENT_MASK) |
118 ((event << PMLCA_EVENT_SHIFT) &
119 PMLCA_EVENT_MASK);
120
121 set_pmlca(ctr, pmlca);
122}
123
124void set_pmc_user_kernel(int ctr, int user, int kernel)
125{
126 u32 pmlca;
127
128 pmlca = get_pmlca(ctr);
129
130 if(user)
131 pmlca &= ~PMLCA_FCU;
132 else
133 pmlca |= PMLCA_FCU;
134
135 if(kernel)
136 pmlca &= ~PMLCA_FCS;
137 else
138 pmlca |= PMLCA_FCS;
139
140 set_pmlca(ctr, pmlca);
141}
142
143void set_pmc_marked(int ctr, int mark0, int mark1)
144{
145 u32 pmlca = get_pmlca(ctr);
146
147 if(mark0)
148 pmlca &= ~PMLCA_FCM0;
149 else
150 pmlca |= PMLCA_FCM0;
151
152 if(mark1)
153 pmlca &= ~PMLCA_FCM1;
154 else
155 pmlca |= PMLCA_FCM1;
156
157 set_pmlca(ctr, pmlca);
158}
159
160void pmc_start_ctr(int ctr, int enable)
161{
162 u32 pmlca = get_pmlca(ctr);
163
164 pmlca &= ~PMLCA_FC;
165
166 if (enable)
167 pmlca |= PMLCA_CE;
168 else
169 pmlca &= ~PMLCA_CE;
170
171 set_pmlca(ctr, pmlca);
172}
173
174void pmc_start_ctrs(int enable)
175{
176 u32 pmgc0 = mfpmr(PMRN_PMGC0);
177
178 pmgc0 &= ~PMGC0_FAC;
179 pmgc0 |= PMGC0_FCECE;
180
181 if (enable)
182 pmgc0 |= PMGC0_PMIE;
183 else
184 pmgc0 &= ~PMGC0_PMIE;
185
186 mtpmr(PMRN_PMGC0, pmgc0);
187}
188
189void pmc_stop_ctrs(void)
190{
191 u32 pmgc0 = mfpmr(PMRN_PMGC0);
192
193 pmgc0 |= PMGC0_FAC;
194
195 pmgc0 &= ~(PMGC0_PMIE | PMGC0_FCECE);
196
197 mtpmr(PMRN_PMGC0, pmgc0);
198}
199
200void dump_pmcs(void)
201{
202 printk("pmgc0: %x\n", mfpmr(PMRN_PMGC0));
203 printk("pmc\t\tpmlca\t\tpmlcb\n");
204 printk("%8x\t%8x\t%8x\n", mfpmr(PMRN_PMC0),
205 mfpmr(PMRN_PMLCA0), mfpmr(PMRN_PMLCB0));
206 printk("%8x\t%8x\t%8x\n", mfpmr(PMRN_PMC1),
207 mfpmr(PMRN_PMLCA1), mfpmr(PMRN_PMLCB1));
208 printk("%8x\t%8x\t%8x\n", mfpmr(PMRN_PMC2),
209 mfpmr(PMRN_PMLCA2), mfpmr(PMRN_PMLCB2));
210 printk("%8x\t%8x\t%8x\n", mfpmr(PMRN_PMC3),
211 mfpmr(PMRN_PMLCA3), mfpmr(PMRN_PMLCB3));
212}
213
214EXPORT_SYMBOL(init_pmc_stop);
215EXPORT_SYMBOL(set_pmc_event);
216EXPORT_SYMBOL(set_pmc_user_kernel);
217EXPORT_SYMBOL(set_pmc_marked);
218EXPORT_SYMBOL(pmc_start_ctr);
219EXPORT_SYMBOL(pmc_start_ctrs);
220EXPORT_SYMBOL(pmc_stop_ctrs);
221EXPORT_SYMBOL(dump_pmcs);
diff --git a/arch/powerpc/kernel/pmc.c b/arch/powerpc/kernel/pmc.c
index a0a2efadeabf..3d8f6f44641e 100644
--- a/arch/powerpc/kernel/pmc.c
+++ b/arch/powerpc/kernel/pmc.c
@@ -71,7 +71,7 @@ int reserve_pmc_hardware(perf_irq_t new_perf_irq)
71 } 71 }
72 72
73 pmc_owner_caller = __builtin_return_address(0); 73 pmc_owner_caller = __builtin_return_address(0);
74 perf_irq = new_perf_irq ? : dummy_perf; 74 perf_irq = new_perf_irq ? new_perf_irq : dummy_perf;
75 75
76 out: 76 out:
77 spin_unlock(&pmc_owner_lock); 77 spin_unlock(&pmc_owner_lock);
diff --git a/arch/powerpc/kernel/traps.c b/arch/powerpc/kernel/traps.c
index 5ed4c2ceb5ca..c66b4771ef44 100644
--- a/arch/powerpc/kernel/traps.c
+++ b/arch/powerpc/kernel/traps.c
@@ -843,7 +843,7 @@ void __kprobes program_check_exception(struct pt_regs *regs)
843 843
844void alignment_exception(struct pt_regs *regs) 844void alignment_exception(struct pt_regs *regs)
845{ 845{
846 int fixed = 0; 846 int sig, code, fixed = 0;
847 847
848 /* we don't implement logging of alignment exceptions */ 848 /* we don't implement logging of alignment exceptions */
849 if (!(current->thread.align_ctl & PR_UNALIGN_SIGBUS)) 849 if (!(current->thread.align_ctl & PR_UNALIGN_SIGBUS))
@@ -857,14 +857,16 @@ void alignment_exception(struct pt_regs *regs)
857 857
858 /* Operand address was bad */ 858 /* Operand address was bad */
859 if (fixed == -EFAULT) { 859 if (fixed == -EFAULT) {
860 if (user_mode(regs)) 860 sig = SIGSEGV;
861 _exception(SIGSEGV, regs, SEGV_ACCERR, regs->dar); 861 code = SEGV_ACCERR;
862 else 862 } else {
863 /* Search exception table */ 863 sig = SIGBUS;
864 bad_page_fault(regs, regs->dar, SIGSEGV); 864 code = BUS_ADRALN;
865 return;
866 } 865 }
867 _exception(SIGBUS, regs, BUS_ADRALN, regs->dar); 866 if (user_mode(regs))
867 _exception(sig, regs, code, regs->dar);
868 else
869 bad_page_fault(regs, regs->dar, sig);
868} 870}
869 871
870void StackOverflow(struct pt_regs *regs) 872void StackOverflow(struct pt_regs *regs)
diff --git a/arch/powerpc/kernel/vio.c b/arch/powerpc/kernel/vio.c
index cb87e71eec66..ed007878d1bf 100644
--- a/arch/powerpc/kernel/vio.c
+++ b/arch/powerpc/kernel/vio.c
@@ -92,9 +92,9 @@ static struct iommu_table *vio_build_iommu_table(struct vio_dev *dev)
92 &tbl->it_index, &offset, &size); 92 &tbl->it_index, &offset, &size);
93 93
94 /* TCE table size - measured in tce entries */ 94 /* TCE table size - measured in tce entries */
95 tbl->it_size = size >> PAGE_SHIFT; 95 tbl->it_size = size >> IOMMU_PAGE_SHIFT;
96 /* offset for VIO should always be 0 */ 96 /* offset for VIO should always be 0 */
97 tbl->it_offset = offset >> PAGE_SHIFT; 97 tbl->it_offset = offset >> IOMMU_PAGE_SHIFT;
98 tbl->it_busno = 0; 98 tbl->it_busno = 0;
99 tbl->it_type = TCE_VB; 99 tbl->it_type = TCE_VB;
100 100
diff --git a/arch/powerpc/lib/sstep.c b/arch/powerpc/lib/sstep.c
index 9590ba780b98..7e8ded051b5b 100644
--- a/arch/powerpc/lib/sstep.c
+++ b/arch/powerpc/lib/sstep.c
@@ -9,6 +9,7 @@
9 * 2 of the License, or (at your option) any later version. 9 * 2 of the License, or (at your option) any later version.
10 */ 10 */
11#include <linux/kernel.h> 11#include <linux/kernel.h>
12#include <linux/kprobes.h>
12#include <linux/ptrace.h> 13#include <linux/ptrace.h>
13#include <asm/sstep.h> 14#include <asm/sstep.h>
14#include <asm/processor.h> 15#include <asm/processor.h>
@@ -25,7 +26,7 @@ extern char system_call_common[];
25/* 26/*
26 * Determine whether a conditional branch instruction would branch. 27 * Determine whether a conditional branch instruction would branch.
27 */ 28 */
28static int branch_taken(unsigned int instr, struct pt_regs *regs) 29static int __kprobes branch_taken(unsigned int instr, struct pt_regs *regs)
29{ 30{
30 unsigned int bo = (instr >> 21) & 0x1f; 31 unsigned int bo = (instr >> 21) & 0x1f;
31 unsigned int bi; 32 unsigned int bi;
@@ -51,7 +52,7 @@ static int branch_taken(unsigned int instr, struct pt_regs *regs)
51 * or -1 if the instruction is one that should not be stepped, 52 * or -1 if the instruction is one that should not be stepped,
52 * such as an rfid, or a mtmsrd that would clear MSR_RI. 53 * such as an rfid, or a mtmsrd that would clear MSR_RI.
53 */ 54 */
54int emulate_step(struct pt_regs *regs, unsigned int instr) 55int __kprobes emulate_step(struct pt_regs *regs, unsigned int instr)
55{ 56{
56 unsigned int opcode, rd; 57 unsigned int opcode, rd;
57 unsigned long int imm; 58 unsigned long int imm;
diff --git a/arch/powerpc/mm/hugetlbpage.c b/arch/powerpc/mm/hugetlbpage.c
index 5615acc29527..fd68b74c07c3 100644
--- a/arch/powerpc/mm/hugetlbpage.c
+++ b/arch/powerpc/mm/hugetlbpage.c
@@ -480,9 +480,6 @@ static int open_high_hpage_areas(struct mm_struct *mm, u16 newareas)
480 480
481 mm->context.high_htlb_areas |= newareas; 481 mm->context.high_htlb_areas |= newareas;
482 482
483 /* update the paca copy of the context struct */
484 get_paca()->context = mm->context;
485
486 /* the context change must make it to memory before the flush, 483 /* the context change must make it to memory before the flush,
487 * so that further SLB misses do the right thing. */ 484 * so that further SLB misses do the right thing. */
488 mb(); 485 mb();
diff --git a/arch/powerpc/oprofile/Makefile b/arch/powerpc/oprofile/Makefile
index 3145d610b5b0..0b5df9c96ae0 100644
--- a/arch/powerpc/oprofile/Makefile
+++ b/arch/powerpc/oprofile/Makefile
@@ -13,4 +13,4 @@ DRIVER_OBJS := $(addprefix ../../../drivers/oprofile/, \
13oprofile-y := $(DRIVER_OBJS) common.o backtrace.o 13oprofile-y := $(DRIVER_OBJS) common.o backtrace.o
14oprofile-$(CONFIG_PPC64) += op_model_rs64.o op_model_power4.o 14oprofile-$(CONFIG_PPC64) += op_model_rs64.o op_model_power4.o
15oprofile-$(CONFIG_FSL_BOOKE) += op_model_fsl_booke.o 15oprofile-$(CONFIG_FSL_BOOKE) += op_model_fsl_booke.o
16oprofile-$(CONFIG_PPC32) += op_model_7450.o 16oprofile-$(CONFIG_6xx) += op_model_7450.o
diff --git a/arch/powerpc/oprofile/common.c b/arch/powerpc/oprofile/common.c
index fd0bbbe7a4de..63bbef3b63f1 100644
--- a/arch/powerpc/oprofile/common.c
+++ b/arch/powerpc/oprofile/common.c
@@ -34,6 +34,11 @@ static void op_handle_interrupt(struct pt_regs *regs)
34 model->handle_interrupt(regs, ctr); 34 model->handle_interrupt(regs, ctr);
35} 35}
36 36
37static void op_powerpc_cpu_setup(void *dummy)
38{
39 model->cpu_setup(ctr);
40}
41
37static int op_powerpc_setup(void) 42static int op_powerpc_setup(void)
38{ 43{
39 int err; 44 int err;
@@ -47,7 +52,7 @@ static int op_powerpc_setup(void)
47 model->reg_setup(ctr, &sys, model->num_counters); 52 model->reg_setup(ctr, &sys, model->num_counters);
48 53
49 /* Configure the registers on all cpus. */ 54 /* Configure the registers on all cpus. */
50 on_each_cpu(model->cpu_setup, NULL, 0, 1); 55 on_each_cpu(op_powerpc_cpu_setup, NULL, 0, 1);
51 56
52 return 0; 57 return 0;
53} 58}
@@ -142,7 +147,8 @@ int __init oprofile_arch_init(struct oprofile_operations *ops)
142 case PPC_OPROFILE_POWER4: 147 case PPC_OPROFILE_POWER4:
143 model = &op_model_power4; 148 model = &op_model_power4;
144 break; 149 break;
145#else 150#endif
151#ifdef CONFIG_6xx
146 case PPC_OPROFILE_G4: 152 case PPC_OPROFILE_G4:
147 model = &op_model_7450; 153 model = &op_model_7450;
148 break; 154 break;
diff --git a/arch/powerpc/oprofile/op_model_7450.c b/arch/powerpc/oprofile/op_model_7450.c
index d8ee3aea83f8..f481c0ed5e67 100644
--- a/arch/powerpc/oprofile/op_model_7450.c
+++ b/arch/powerpc/oprofile/op_model_7450.c
@@ -81,7 +81,7 @@ static void pmc_stop_ctrs(void)
81 81
82/* Configures the counters on this CPU based on the global 82/* Configures the counters on this CPU based on the global
83 * settings */ 83 * settings */
84static void fsl7450_cpu_setup(void *unused) 84static void fsl7450_cpu_setup(struct op_counter_config *ctr)
85{ 85{
86 /* freeze all counters */ 86 /* freeze all counters */
87 pmc_stop_ctrs(); 87 pmc_stop_ctrs();
diff --git a/arch/powerpc/oprofile/op_model_fsl_booke.c b/arch/powerpc/oprofile/op_model_fsl_booke.c
index e29dede31423..0b3c31f5209e 100644
--- a/arch/powerpc/oprofile/op_model_fsl_booke.c
+++ b/arch/powerpc/oprofile/op_model_fsl_booke.c
@@ -32,42 +32,152 @@ static unsigned long reset_value[OP_MAX_COUNTER];
32static int num_counters; 32static int num_counters;
33static int oprofile_running; 33static int oprofile_running;
34 34
35static inline unsigned int ctr_read(unsigned int i) 35static void init_pmc_stop(int ctr)
36{ 36{
37 switch(i) { 37 u32 pmlca = (PMLCA_FC | PMLCA_FCS | PMLCA_FCU |
38 case 0: 38 PMLCA_FCM1 | PMLCA_FCM0);
39 return mfpmr(PMRN_PMC0); 39 u32 pmlcb = 0;
40 case 1:
41 return mfpmr(PMRN_PMC1);
42 case 2:
43 return mfpmr(PMRN_PMC2);
44 case 3:
45 return mfpmr(PMRN_PMC3);
46 default:
47 return 0;
48 }
49}
50 40
51static inline void ctr_write(unsigned int i, unsigned int val) 41 switch (ctr) {
52{
53 switch(i) {
54 case 0: 42 case 0:
55 mtpmr(PMRN_PMC0, val); 43 mtpmr(PMRN_PMLCA0, pmlca);
44 mtpmr(PMRN_PMLCB0, pmlcb);
56 break; 45 break;
57 case 1: 46 case 1:
58 mtpmr(PMRN_PMC1, val); 47 mtpmr(PMRN_PMLCA1, pmlca);
48 mtpmr(PMRN_PMLCB1, pmlcb);
59 break; 49 break;
60 case 2: 50 case 2:
61 mtpmr(PMRN_PMC2, val); 51 mtpmr(PMRN_PMLCA2, pmlca);
52 mtpmr(PMRN_PMLCB2, pmlcb);
62 break; 53 break;
63 case 3: 54 case 3:
64 mtpmr(PMRN_PMC3, val); 55 mtpmr(PMRN_PMLCA3, pmlca);
56 mtpmr(PMRN_PMLCB3, pmlcb);
65 break; 57 break;
66 default: 58 default:
67 break; 59 panic("Bad ctr number!\n");
68 } 60 }
69} 61}
70 62
63static void set_pmc_event(int ctr, int event)
64{
65 u32 pmlca;
66
67 pmlca = get_pmlca(ctr);
68
69 pmlca = (pmlca & ~PMLCA_EVENT_MASK) |
70 ((event << PMLCA_EVENT_SHIFT) &
71 PMLCA_EVENT_MASK);
72
73 set_pmlca(ctr, pmlca);
74}
75
76static void set_pmc_user_kernel(int ctr, int user, int kernel)
77{
78 u32 pmlca;
79
80 pmlca = get_pmlca(ctr);
81
82 if(user)
83 pmlca &= ~PMLCA_FCU;
84 else
85 pmlca |= PMLCA_FCU;
86
87 if(kernel)
88 pmlca &= ~PMLCA_FCS;
89 else
90 pmlca |= PMLCA_FCS;
91
92 set_pmlca(ctr, pmlca);
93}
94
95static void set_pmc_marked(int ctr, int mark0, int mark1)
96{
97 u32 pmlca = get_pmlca(ctr);
98
99 if(mark0)
100 pmlca &= ~PMLCA_FCM0;
101 else
102 pmlca |= PMLCA_FCM0;
103
104 if(mark1)
105 pmlca &= ~PMLCA_FCM1;
106 else
107 pmlca |= PMLCA_FCM1;
108
109 set_pmlca(ctr, pmlca);
110}
111
112static void pmc_start_ctr(int ctr, int enable)
113{
114 u32 pmlca = get_pmlca(ctr);
115
116 pmlca &= ~PMLCA_FC;
117
118 if (enable)
119 pmlca |= PMLCA_CE;
120 else
121 pmlca &= ~PMLCA_CE;
122
123 set_pmlca(ctr, pmlca);
124}
125
126static void pmc_start_ctrs(int enable)
127{
128 u32 pmgc0 = mfpmr(PMRN_PMGC0);
129
130 pmgc0 &= ~PMGC0_FAC;
131 pmgc0 |= PMGC0_FCECE;
132
133 if (enable)
134 pmgc0 |= PMGC0_PMIE;
135 else
136 pmgc0 &= ~PMGC0_PMIE;
137
138 mtpmr(PMRN_PMGC0, pmgc0);
139}
140
141static void pmc_stop_ctrs(void)
142{
143 u32 pmgc0 = mfpmr(PMRN_PMGC0);
144
145 pmgc0 |= PMGC0_FAC;
146
147 pmgc0 &= ~(PMGC0_PMIE | PMGC0_FCECE);
148
149 mtpmr(PMRN_PMGC0, pmgc0);
150}
151
152static void dump_pmcs(void)
153{
154 printk("pmgc0: %x\n", mfpmr(PMRN_PMGC0));
155 printk("pmc\t\tpmlca\t\tpmlcb\n");
156 printk("%8x\t%8x\t%8x\n", mfpmr(PMRN_PMC0),
157 mfpmr(PMRN_PMLCA0), mfpmr(PMRN_PMLCB0));
158 printk("%8x\t%8x\t%8x\n", mfpmr(PMRN_PMC1),
159 mfpmr(PMRN_PMLCA1), mfpmr(PMRN_PMLCB1));
160 printk("%8x\t%8x\t%8x\n", mfpmr(PMRN_PMC2),
161 mfpmr(PMRN_PMLCA2), mfpmr(PMRN_PMLCB2));
162 printk("%8x\t%8x\t%8x\n", mfpmr(PMRN_PMC3),
163 mfpmr(PMRN_PMLCA3), mfpmr(PMRN_PMLCB3));
164}
165
166static void fsl_booke_cpu_setup(struct op_counter_config *ctr)
167{
168 int i;
169
170 /* freeze all counters */
171 pmc_stop_ctrs();
172
173 for (i = 0;i < num_counters;i++) {
174 init_pmc_stop(i);
175
176 set_pmc_event(i, ctr[i].event);
177
178 set_pmc_user_kernel(i, ctr[i].user, ctr[i].kernel);
179 }
180}
71 181
72static void fsl_booke_reg_setup(struct op_counter_config *ctr, 182static void fsl_booke_reg_setup(struct op_counter_config *ctr,
73 struct op_system_config *sys, 183 struct op_system_config *sys,
@@ -77,23 +187,14 @@ static void fsl_booke_reg_setup(struct op_counter_config *ctr,
77 187
78 num_counters = num_ctrs; 188 num_counters = num_ctrs;
79 189
80 /* freeze all counters */
81 pmc_stop_ctrs();
82
83 /* Our counters count up, and "count" refers to 190 /* Our counters count up, and "count" refers to
84 * how much before the next interrupt, and we interrupt 191 * how much before the next interrupt, and we interrupt
85 * on overflow. So we calculate the starting value 192 * on overflow. So we calculate the starting value
86 * which will give us "count" until overflow. 193 * which will give us "count" until overflow.
87 * Then we set the events on the enabled counters */ 194 * Then we set the events on the enabled counters */
88 for (i = 0; i < num_counters; ++i) { 195 for (i = 0; i < num_counters; ++i)
89 reset_value[i] = 0x80000000UL - ctr[i].count; 196 reset_value[i] = 0x80000000UL - ctr[i].count;
90 197
91 init_pmc_stop(i);
92
93 set_pmc_event(i, ctr[i].event);
94
95 set_pmc_user_kernel(i, ctr[i].user, ctr[i].kernel);
96 }
97} 198}
98 199
99static void fsl_booke_start(struct op_counter_config *ctr) 200static void fsl_booke_start(struct op_counter_config *ctr)
@@ -105,8 +206,8 @@ static void fsl_booke_start(struct op_counter_config *ctr)
105 for (i = 0; i < num_counters; ++i) { 206 for (i = 0; i < num_counters; ++i) {
106 if (ctr[i].enabled) { 207 if (ctr[i].enabled) {
107 ctr_write(i, reset_value[i]); 208 ctr_write(i, reset_value[i]);
108 /* Set Each enabled counterd to only 209 /* Set each enabled counter to only
109 * count when the Mark bit is not set */ 210 * count when the Mark bit is *not* set */
110 set_pmc_marked(i, 1, 0); 211 set_pmc_marked(i, 1, 0);
111 pmc_start_ctr(i, 1); 212 pmc_start_ctr(i, 1);
112 } else { 213 } else {
@@ -177,6 +278,7 @@ static void fsl_booke_handle_interrupt(struct pt_regs *regs,
177 278
178struct op_powerpc_model op_model_fsl_booke = { 279struct op_powerpc_model op_model_fsl_booke = {
179 .reg_setup = fsl_booke_reg_setup, 280 .reg_setup = fsl_booke_reg_setup,
281 .cpu_setup = fsl_booke_cpu_setup,
180 .start = fsl_booke_start, 282 .start = fsl_booke_start,
181 .stop = fsl_booke_stop, 283 .stop = fsl_booke_stop,
182 .handle_interrupt = fsl_booke_handle_interrupt, 284 .handle_interrupt = fsl_booke_handle_interrupt,
diff --git a/arch/powerpc/oprofile/op_model_power4.c b/arch/powerpc/oprofile/op_model_power4.c
index 6a927effcc77..356709d515b9 100644
--- a/arch/powerpc/oprofile/op_model_power4.c
+++ b/arch/powerpc/oprofile/op_model_power4.c
@@ -82,7 +82,7 @@ static inline int mmcra_must_set_sample(void)
82 return 0; 82 return 0;
83} 83}
84 84
85static void power4_cpu_setup(void *unused) 85static void power4_cpu_setup(struct op_counter_config *ctr)
86{ 86{
87 unsigned int mmcr0 = mmcr0_val; 87 unsigned int mmcr0 = mmcr0_val;
88 unsigned long mmcra = mmcra_val; 88 unsigned long mmcra = mmcra_val;
diff --git a/arch/powerpc/oprofile/op_model_rs64.c b/arch/powerpc/oprofile/op_model_rs64.c
index 042f8f4867ad..19c5ee089bc9 100644
--- a/arch/powerpc/oprofile/op_model_rs64.c
+++ b/arch/powerpc/oprofile/op_model_rs64.c
@@ -102,7 +102,7 @@ static void rs64_reg_setup(struct op_counter_config *ctr,
102 /* XXX setup user and kernel profiling */ 102 /* XXX setup user and kernel profiling */
103} 103}
104 104
105static void rs64_cpu_setup(void *unused) 105static void rs64_cpu_setup(struct op_counter_config *ctr)
106{ 106{
107 unsigned int mmcr0; 107 unsigned int mmcr0;
108 108
diff --git a/arch/powerpc/platforms/iseries/iommu.c b/arch/powerpc/platforms/iseries/iommu.c
index f4cbbcf8773a..218817d13c5c 100644
--- a/arch/powerpc/platforms/iseries/iommu.c
+++ b/arch/powerpc/platforms/iseries/iommu.c
@@ -43,9 +43,6 @@ static void tce_build_iSeries(struct iommu_table *tbl, long index, long npages,
43 u64 rc; 43 u64 rc;
44 u64 tce, rpn; 44 u64 tce, rpn;
45 45
46 index <<= TCE_PAGE_FACTOR;
47 npages <<= TCE_PAGE_FACTOR;
48
49 while (npages--) { 46 while (npages--) {
50 rpn = virt_to_abs(uaddr) >> TCE_SHIFT; 47 rpn = virt_to_abs(uaddr) >> TCE_SHIFT;
51 tce = (rpn & TCE_RPN_MASK) << TCE_RPN_SHIFT; 48 tce = (rpn & TCE_RPN_MASK) << TCE_RPN_SHIFT;
@@ -75,9 +72,6 @@ static void tce_free_iSeries(struct iommu_table *tbl, long index, long npages)
75{ 72{
76 u64 rc; 73 u64 rc;
77 74
78 npages <<= TCE_PAGE_FACTOR;
79 index <<= TCE_PAGE_FACTOR;
80
81 while (npages--) { 75 while (npages--) {
82 rc = HvCallXm_setTce((u64)tbl->it_index, (u64)index, 0); 76 rc = HvCallXm_setTce((u64)tbl->it_index, (u64)index, 0);
83 if (rc) 77 if (rc)
@@ -136,10 +130,9 @@ void iommu_table_getparms_iSeries(unsigned long busno,
136 panic("PCI_DMA: parms->size is zero, parms is 0x%p", parms); 130 panic("PCI_DMA: parms->size is zero, parms is 0x%p", parms);
137 131
138 /* itc_size is in pages worth of table, it_size is in # of entries */ 132 /* itc_size is in pages worth of table, it_size is in # of entries */
139 tbl->it_size = ((parms->itc_size * TCE_PAGE_SIZE) / 133 tbl->it_size = (parms->itc_size * TCE_PAGE_SIZE) / TCE_ENTRY_SIZE;
140 TCE_ENTRY_SIZE) >> TCE_PAGE_FACTOR;
141 tbl->it_busno = parms->itc_busno; 134 tbl->it_busno = parms->itc_busno;
142 tbl->it_offset = parms->itc_offset >> TCE_PAGE_FACTOR; 135 tbl->it_offset = parms->itc_offset;
143 tbl->it_index = parms->itc_index; 136 tbl->it_index = parms->itc_index;
144 tbl->it_blocksize = 1; 137 tbl->it_blocksize = 1;
145 tbl->it_type = virtbus ? TCE_VB : TCE_PCI; 138 tbl->it_type = virtbus ? TCE_VB : TCE_PCI;
diff --git a/arch/powerpc/platforms/pseries/iommu.c b/arch/powerpc/platforms/pseries/iommu.c
index d24ba547e53f..556c279a789d 100644
--- a/arch/powerpc/platforms/pseries/iommu.c
+++ b/arch/powerpc/platforms/pseries/iommu.c
@@ -57,9 +57,6 @@ static void tce_build_pSeries(struct iommu_table *tbl, long index,
57 u64 *tcep; 57 u64 *tcep;
58 u64 rpn; 58 u64 rpn;
59 59
60 index <<= TCE_PAGE_FACTOR;
61 npages <<= TCE_PAGE_FACTOR;
62
63 proto_tce = TCE_PCI_READ; // Read allowed 60 proto_tce = TCE_PCI_READ; // Read allowed
64 61
65 if (direction != DMA_TO_DEVICE) 62 if (direction != DMA_TO_DEVICE)
@@ -82,9 +79,6 @@ static void tce_free_pSeries(struct iommu_table *tbl, long index, long npages)
82{ 79{
83 u64 *tcep; 80 u64 *tcep;
84 81
85 npages <<= TCE_PAGE_FACTOR;
86 index <<= TCE_PAGE_FACTOR;
87
88 tcep = ((u64 *)tbl->it_base) + index; 82 tcep = ((u64 *)tbl->it_base) + index;
89 83
90 while (npages--) 84 while (npages--)
@@ -95,7 +89,6 @@ static unsigned long tce_get_pseries(struct iommu_table *tbl, long index)
95{ 89{
96 u64 *tcep; 90 u64 *tcep;
97 91
98 index <<= TCE_PAGE_FACTOR;
99 tcep = ((u64 *)tbl->it_base) + index; 92 tcep = ((u64 *)tbl->it_base) + index;
100 93
101 return *tcep; 94 return *tcep;
@@ -109,9 +102,6 @@ static void tce_build_pSeriesLP(struct iommu_table *tbl, long tcenum,
109 u64 proto_tce, tce; 102 u64 proto_tce, tce;
110 u64 rpn; 103 u64 rpn;
111 104
112 tcenum <<= TCE_PAGE_FACTOR;
113 npages <<= TCE_PAGE_FACTOR;
114
115 rpn = (virt_to_abs(uaddr)) >> TCE_SHIFT; 105 rpn = (virt_to_abs(uaddr)) >> TCE_SHIFT;
116 proto_tce = TCE_PCI_READ; 106 proto_tce = TCE_PCI_READ;
117 if (direction != DMA_TO_DEVICE) 107 if (direction != DMA_TO_DEVICE)
@@ -146,7 +136,7 @@ static void tce_buildmulti_pSeriesLP(struct iommu_table *tbl, long tcenum,
146 u64 rpn; 136 u64 rpn;
147 long l, limit; 137 long l, limit;
148 138
149 if (TCE_PAGE_FACTOR == 0 && npages == 1) 139 if (npages == 1)
150 return tce_build_pSeriesLP(tbl, tcenum, npages, uaddr, 140 return tce_build_pSeriesLP(tbl, tcenum, npages, uaddr,
151 direction); 141 direction);
152 142
@@ -164,9 +154,6 @@ static void tce_buildmulti_pSeriesLP(struct iommu_table *tbl, long tcenum,
164 __get_cpu_var(tce_page) = tcep; 154 __get_cpu_var(tce_page) = tcep;
165 } 155 }
166 156
167 tcenum <<= TCE_PAGE_FACTOR;
168 npages <<= TCE_PAGE_FACTOR;
169
170 rpn = (virt_to_abs(uaddr)) >> TCE_SHIFT; 157 rpn = (virt_to_abs(uaddr)) >> TCE_SHIFT;
171 proto_tce = TCE_PCI_READ; 158 proto_tce = TCE_PCI_READ;
172 if (direction != DMA_TO_DEVICE) 159 if (direction != DMA_TO_DEVICE)
@@ -207,9 +194,6 @@ static void tce_free_pSeriesLP(struct iommu_table *tbl, long tcenum, long npages
207{ 194{
208 u64 rc; 195 u64 rc;
209 196
210 tcenum <<= TCE_PAGE_FACTOR;
211 npages <<= TCE_PAGE_FACTOR;
212
213 while (npages--) { 197 while (npages--) {
214 rc = plpar_tce_put((u64)tbl->it_index, (u64)tcenum << 12, 0); 198 rc = plpar_tce_put((u64)tbl->it_index, (u64)tcenum << 12, 0);
215 199
@@ -229,9 +213,6 @@ static void tce_freemulti_pSeriesLP(struct iommu_table *tbl, long tcenum, long n
229{ 213{
230 u64 rc; 214 u64 rc;
231 215
232 tcenum <<= TCE_PAGE_FACTOR;
233 npages <<= TCE_PAGE_FACTOR;
234
235 rc = plpar_tce_stuff((u64)tbl->it_index, (u64)tcenum << 12, 0, npages); 216 rc = plpar_tce_stuff((u64)tbl->it_index, (u64)tcenum << 12, 0, npages);
236 217
237 if (rc && printk_ratelimit()) { 218 if (rc && printk_ratelimit()) {
@@ -248,7 +229,6 @@ static unsigned long tce_get_pSeriesLP(struct iommu_table *tbl, long tcenum)
248 u64 rc; 229 u64 rc;
249 unsigned long tce_ret; 230 unsigned long tce_ret;
250 231
251 tcenum <<= TCE_PAGE_FACTOR;
252 rc = plpar_tce_get((u64)tbl->it_index, (u64)tcenum << 12, &tce_ret); 232 rc = plpar_tce_get((u64)tbl->it_index, (u64)tcenum << 12, &tce_ret);
253 233
254 if (rc && printk_ratelimit()) { 234 if (rc && printk_ratelimit()) {
@@ -289,7 +269,7 @@ static void iommu_table_setparms(struct pci_controller *phb,
289 tbl->it_busno = phb->bus->number; 269 tbl->it_busno = phb->bus->number;
290 270
291 /* Units of tce entries */ 271 /* Units of tce entries */
292 tbl->it_offset = phb->dma_window_base_cur >> PAGE_SHIFT; 272 tbl->it_offset = phb->dma_window_base_cur >> IOMMU_PAGE_SHIFT;
293 273
294 /* Test if we are going over 2GB of DMA space */ 274 /* Test if we are going over 2GB of DMA space */
295 if (phb->dma_window_base_cur + phb->dma_window_size > 0x80000000ul) { 275 if (phb->dma_window_base_cur + phb->dma_window_size > 0x80000000ul) {
@@ -300,7 +280,7 @@ static void iommu_table_setparms(struct pci_controller *phb,
300 phb->dma_window_base_cur += phb->dma_window_size; 280 phb->dma_window_base_cur += phb->dma_window_size;
301 281
302 /* Set the tce table size - measured in entries */ 282 /* Set the tce table size - measured in entries */
303 tbl->it_size = phb->dma_window_size >> PAGE_SHIFT; 283 tbl->it_size = phb->dma_window_size >> IOMMU_PAGE_SHIFT;
304 284
305 tbl->it_index = 0; 285 tbl->it_index = 0;
306 tbl->it_blocksize = 16; 286 tbl->it_blocksize = 16;
@@ -325,8 +305,8 @@ static void iommu_table_setparms_lpar(struct pci_controller *phb,
325 tbl->it_base = 0; 305 tbl->it_base = 0;
326 tbl->it_blocksize = 16; 306 tbl->it_blocksize = 16;
327 tbl->it_type = TCE_PCI; 307 tbl->it_type = TCE_PCI;
328 tbl->it_offset = offset >> PAGE_SHIFT; 308 tbl->it_offset = offset >> IOMMU_PAGE_SHIFT;
329 tbl->it_size = size >> PAGE_SHIFT; 309 tbl->it_size = size >> IOMMU_PAGE_SHIFT;
330} 310}
331 311
332static void iommu_bus_setup_pSeries(struct pci_bus *bus) 312static void iommu_bus_setup_pSeries(struct pci_bus *bus)
@@ -522,8 +502,6 @@ static void iommu_dev_setup_pSeriesLP(struct pci_dev *dev)
522 const void *dma_window = NULL; 502 const void *dma_window = NULL;
523 struct pci_dn *pci; 503 struct pci_dn *pci;
524 504
525 DBG("iommu_dev_setup_pSeriesLP, dev %p (%s)\n", dev, pci_name(dev));
526
527 /* dev setup for LPAR is a little tricky, since the device tree might 505 /* dev setup for LPAR is a little tricky, since the device tree might
528 * contain the dma-window properties per-device and not neccesarily 506 * contain the dma-window properties per-device and not neccesarily
529 * for the bus. So we need to search upwards in the tree until we 507 * for the bus. So we need to search upwards in the tree until we
@@ -532,6 +510,9 @@ static void iommu_dev_setup_pSeriesLP(struct pci_dev *dev)
532 */ 510 */
533 dn = pci_device_to_OF_node(dev); 511 dn = pci_device_to_OF_node(dev);
534 512
513 DBG("iommu_dev_setup_pSeriesLP, dev %p (%s) %s\n",
514 dev, pci_name(dev), dn->full_name);
515
535 for (pdn = dn; pdn && PCI_DN(pdn) && !PCI_DN(pdn)->iommu_table; 516 for (pdn = dn; pdn && PCI_DN(pdn) && !PCI_DN(pdn)->iommu_table;
536 pdn = pdn->parent) { 517 pdn = pdn->parent) {
537 dma_window = get_property(pdn, "ibm,dma-window", NULL); 518 dma_window = get_property(pdn, "ibm,dma-window", NULL);
diff --git a/arch/powerpc/sysdev/dart.h b/arch/powerpc/sysdev/dart.h
index 1c8817c4835e..ff202edb0591 100644
--- a/arch/powerpc/sysdev/dart.h
+++ b/arch/powerpc/sysdev/dart.h
@@ -72,7 +72,6 @@
72 72
73#define DART_PAGE_SHIFT 12 73#define DART_PAGE_SHIFT 12
74#define DART_PAGE_SIZE (1 << DART_PAGE_SHIFT) 74#define DART_PAGE_SIZE (1 << DART_PAGE_SHIFT)
75#define DART_PAGE_FACTOR (PAGE_SHIFT - DART_PAGE_SHIFT)
76 75
77 76
78#endif /* _POWERPC_SYSDEV_DART_H */ 77#endif /* _POWERPC_SYSDEV_DART_H */
diff --git a/arch/powerpc/sysdev/dart_iommu.c b/arch/powerpc/sysdev/dart_iommu.c
index 03b4477dd7f0..572b7846cc77 100644
--- a/arch/powerpc/sysdev/dart_iommu.c
+++ b/arch/powerpc/sysdev/dart_iommu.c
@@ -156,9 +156,6 @@ static void dart_build(struct iommu_table *tbl, long index,
156 156
157 DBG("dart: build at: %lx, %lx, addr: %x\n", index, npages, uaddr); 157 DBG("dart: build at: %lx, %lx, addr: %x\n", index, npages, uaddr);
158 158
159 index <<= DART_PAGE_FACTOR;
160 npages <<= DART_PAGE_FACTOR;
161
162 dp = ((unsigned int*)tbl->it_base) + index; 159 dp = ((unsigned int*)tbl->it_base) + index;
163 160
164 /* On U3, all memory is contigous, so we can move this 161 /* On U3, all memory is contigous, so we can move this
@@ -199,9 +196,6 @@ static void dart_free(struct iommu_table *tbl, long index, long npages)
199 196
200 DBG("dart: free at: %lx, %lx\n", index, npages); 197 DBG("dart: free at: %lx, %lx\n", index, npages);
201 198
202 index <<= DART_PAGE_FACTOR;
203 npages <<= DART_PAGE_FACTOR;
204
205 dp = ((unsigned int *)tbl->it_base) + index; 199 dp = ((unsigned int *)tbl->it_base) + index;
206 200
207 while (npages--) 201 while (npages--)
@@ -281,7 +275,7 @@ static void iommu_table_dart_setup(void)
281 iommu_table_dart.it_busno = 0; 275 iommu_table_dart.it_busno = 0;
282 iommu_table_dart.it_offset = 0; 276 iommu_table_dart.it_offset = 0;
283 /* it_size is in number of entries */ 277 /* it_size is in number of entries */
284 iommu_table_dart.it_size = (dart_tablesize / sizeof(u32)) >> DART_PAGE_FACTOR; 278 iommu_table_dart.it_size = dart_tablesize / sizeof(u32);
285 279
286 /* Initialize the common IOMMU code */ 280 /* Initialize the common IOMMU code */
287 iommu_table_dart.it_base = (unsigned long)dart_vbase; 281 iommu_table_dart.it_base = (unsigned long)dart_vbase;
diff --git a/arch/powerpc/sysdev/qe_lib/qe.c b/arch/powerpc/sysdev/qe_lib/qe.c
index 2bae632d3ad7..e4223226a7a8 100644
--- a/arch/powerpc/sysdev/qe_lib/qe.c
+++ b/arch/powerpc/sysdev/qe_lib/qe.c
@@ -122,8 +122,7 @@ int qe_issue_cmd(u32 cmd, u32 device, u8 mcn_protocol, u32 cmd_input)
122 mcn_shift = QE_CR_MCN_NORMAL_SHIFT; 122 mcn_shift = QE_CR_MCN_NORMAL_SHIFT;
123 } 123 }
124 124
125 out_be32(&qe_immr->cp.cecdr, 125 out_be32(&qe_immr->cp.cecdr, cmd_input);
126 immrbar_virt_to_phys((void *)cmd_input));
127 out_be32(&qe_immr->cp.cecr, 126 out_be32(&qe_immr->cp.cecr,
128 (cmd | QE_CR_FLG | ((u32) device << dev_shift) | (u32) 127 (cmd | QE_CR_FLG | ((u32) device << dev_shift) | (u32)
129 mcn_protocol << mcn_shift)); 128 mcn_protocol << mcn_shift));
diff --git a/arch/ppc/kernel/traps.c b/arch/ppc/kernel/traps.c
index aafc8e8893d1..9661a91183b3 100644
--- a/arch/ppc/kernel/traps.c
+++ b/arch/ppc/kernel/traps.c
@@ -708,7 +708,7 @@ void single_step_exception(struct pt_regs *regs)
708 708
709void alignment_exception(struct pt_regs *regs) 709void alignment_exception(struct pt_regs *regs)
710{ 710{
711 int fixed; 711 int sig, code, fixed = 0;
712 712
713 fixed = fix_alignment(regs); 713 fixed = fix_alignment(regs);
714 if (fixed == 1) { 714 if (fixed == 1) {
@@ -717,14 +717,16 @@ void alignment_exception(struct pt_regs *regs)
717 return; 717 return;
718 } 718 }
719 if (fixed == -EFAULT) { 719 if (fixed == -EFAULT) {
720 /* fixed == -EFAULT means the operand address was bad */ 720 sig = SIGSEGV;
721 if (user_mode(regs)) 721 code = SEGV_ACCERR;
722 _exception(SIGSEGV, regs, SEGV_ACCERR, regs->dar); 722 } else {
723 else 723 sig = SIGBUS;
724 bad_page_fault(regs, regs->dar, SIGSEGV); 724 code = BUS_ADRALN;
725 return;
726 } 725 }
727 _exception(SIGBUS, regs, BUS_ADRALN, regs->dar); 726 if (user_mode(regs))
727 _exception(sig, regs, code, regs->dar);
728 else
729 bad_page_fault(regs, regs->dar, sig);
728} 730}
729 731
730void StackOverflow(struct pt_regs *regs) 732void StackOverflow(struct pt_regs *regs)
diff --git a/drivers/video/offb.c b/drivers/video/offb.c
index bad0e98fb3b6..9a40bbecf76b 100644
--- a/drivers/video/offb.c
+++ b/drivers/video/offb.c
@@ -157,7 +157,7 @@ static int offb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
157 out_le32(par->cmap_adr + 0xb4, (red << 16 | green << 8 | blue)); 157 out_le32(par->cmap_adr + 0xb4, (red << 16 | green << 8 | blue));
158 break; 158 break;
159 case cmap_gxt2000: 159 case cmap_gxt2000:
160 out_le32((unsigned __iomem *) par->cmap_adr + regno, 160 out_le32(((unsigned __iomem *) par->cmap_adr) + regno,
161 (red << 16 | green << 8 | blue)); 161 (red << 16 | green << 8 | blue));
162 break; 162 break;
163 } 163 }
@@ -213,7 +213,7 @@ static int offb_blank(int blank, struct fb_info *info)
213 out_le32(par->cmap_adr + 0xb4, 0); 213 out_le32(par->cmap_adr + 0xb4, 0);
214 break; 214 break;
215 case cmap_gxt2000: 215 case cmap_gxt2000:
216 out_le32((unsigned __iomem *) par->cmap_adr + i, 216 out_le32(((unsigned __iomem *) par->cmap_adr) + i,
217 0); 217 0);
218 break; 218 break;
219 } 219 }
@@ -226,13 +226,23 @@ static int offb_blank(int blank, struct fb_info *info)
226static void __iomem *offb_map_reg(struct device_node *np, int index, 226static void __iomem *offb_map_reg(struct device_node *np, int index,
227 unsigned long offset, unsigned long size) 227 unsigned long offset, unsigned long size)
228{ 228{
229 struct resource r; 229 const u32 *addrp;
230 230 u64 asize, taddr;
231 if (of_address_to_resource(np, index, &r)) 231 unsigned int flags;
232 return 0; 232
233 if ((r.start + offset + size) > r.end) 233 addrp = of_get_pci_address(np, index, &asize, &flags);
234 return 0; 234 if (addrp == NULL)
235 return ioremap(r.start + offset, size); 235 addrp = of_get_address(np, index, &asize, &flags);
236 if (addrp == NULL)
237 return NULL;
238 if ((flags & (IORESOURCE_IO | IORESOURCE_MEM)) == 0)
239 return NULL;
240 if ((offset + size) > asize)
241 return NULL;
242 taddr = of_translate_address(np, addrp);
243 if (taddr == OF_BAD_ADDR)
244 return NULL;
245 return ioremap(taddr + offset, size);
236} 246}
237 247
238static void __init offb_init_fb(const char *name, const char *full_name, 248static void __init offb_init_fb(const char *name, const char *full_name,
@@ -289,7 +299,6 @@ static void __init offb_init_fb(const char *name, const char *full_name,
289 299
290 par->cmap_type = cmap_unknown; 300 par->cmap_type = cmap_unknown;
291 if (depth == 8) { 301 if (depth == 8) {
292 /* Palette hacks disabled for now */
293 if (dp && !strncmp(name, "ATY,Rage128", 11)) { 302 if (dp && !strncmp(name, "ATY,Rage128", 11)) {
294 par->cmap_adr = offb_map_reg(dp, 2, 0, 0x1fff); 303 par->cmap_adr = offb_map_reg(dp, 2, 0, 0x1fff);
295 if (par->cmap_adr) 304 if (par->cmap_adr)
@@ -313,7 +322,8 @@ static void __init offb_init_fb(const char *name, const char *full_name,
313 ioremap(base + 0x7ff000, 0x1000) + 0xcc0; 322 ioremap(base + 0x7ff000, 0x1000) + 0xcc0;
314 par->cmap_data = par->cmap_adr + 1; 323 par->cmap_data = par->cmap_adr + 1;
315 par->cmap_type = cmap_m64; 324 par->cmap_type = cmap_m64;
316 } else if (dp && device_is_compatible(dp, "pci1014,b7")) { 325 } else if (dp && (device_is_compatible(dp, "pci1014,b7") ||
326 device_is_compatible(dp, "pci1014,21c"))) {
317 par->cmap_adr = offb_map_reg(dp, 0, 0x6000, 0x1000); 327 par->cmap_adr = offb_map_reg(dp, 0, 0x6000, 0x1000);
318 if (par->cmap_adr) 328 if (par->cmap_adr)
319 par->cmap_type = cmap_gxt2000; 329 par->cmap_type = cmap_gxt2000;
@@ -433,7 +443,7 @@ static void __init offb_init_nodriver(struct device_node *dp, int no_real_node)
433 pp = get_property(dp, "linux,bootx-linebytes", &len); 443 pp = get_property(dp, "linux,bootx-linebytes", &len);
434 if (pp == NULL) 444 if (pp == NULL)
435 pp = get_property(dp, "linebytes", &len); 445 pp = get_property(dp, "linebytes", &len);
436 if (pp && len == sizeof(u32)) 446 if (pp && len == sizeof(u32) && (*pp != 0xffffffffu))
437 pitch = *pp; 447 pitch = *pp;
438 else 448 else
439 pitch = width * ((depth + 7) / 8); 449 pitch = width * ((depth + 7) / 8);
@@ -496,7 +506,7 @@ static void __init offb_init_nodriver(struct device_node *dp, int no_real_node)
496 offb_init_fb(no_real_node ? "bootx" : dp->name, 506 offb_init_fb(no_real_node ? "bootx" : dp->name,
497 no_real_node ? "display" : dp->full_name, 507 no_real_node ? "display" : dp->full_name,
498 width, height, depth, pitch, address, 508 width, height, depth, pitch, address,
499 no_real_node ? dp : NULL); 509 no_real_node ? NULL : dp);
500 } 510 }
501} 511}
502 512
diff --git a/include/asm-i386/io_apic.h b/include/asm-i386/io_apic.h
index 276ea7e8144a..059a9ff28b4d 100644
--- a/include/asm-i386/io_apic.h
+++ b/include/asm-i386/io_apic.h
@@ -12,10 +12,6 @@
12 12
13#ifdef CONFIG_X86_IO_APIC 13#ifdef CONFIG_X86_IO_APIC
14 14
15#define IO_APIC_BASE(idx) \
16 ((volatile int *)(__fix_to_virt(FIX_IO_APIC_BASE_0 + idx) \
17 + (mp_ioapics[idx].mpc_apicaddr & ~PAGE_MASK)))
18
19/* 15/*
20 * The structure of the IO-APIC: 16 * The structure of the IO-APIC:
21 */ 17 */
@@ -119,31 +115,8 @@ extern struct mpc_config_intsrc mp_irqs[MAX_IRQ_SOURCES];
119/* non-0 if default (table-less) MP configuration */ 115/* non-0 if default (table-less) MP configuration */
120extern int mpc_default_type; 116extern int mpc_default_type;
121 117
122static inline unsigned int io_apic_read(unsigned int apic, unsigned int reg) 118/* Older SiS APIC requires we rewrite the index register */
123{
124 *IO_APIC_BASE(apic) = reg;
125 return *(IO_APIC_BASE(apic)+4);
126}
127
128static inline void io_apic_write(unsigned int apic, unsigned int reg, unsigned int value)
129{
130 *IO_APIC_BASE(apic) = reg;
131 *(IO_APIC_BASE(apic)+4) = value;
132}
133
134/*
135 * Re-write a value: to be used for read-modify-write
136 * cycles where the read already set up the index register.
137 *
138 * Older SiS APIC requires we rewrite the index regiser
139 */
140extern int sis_apic_bug; 119extern int sis_apic_bug;
141static inline void io_apic_modify(unsigned int apic, unsigned int reg, unsigned int value)
142{
143 if (sis_apic_bug)
144 *IO_APIC_BASE(apic) = reg;
145 *(IO_APIC_BASE(apic)+4) = value;
146}
147 120
148/* 1 if "noapic" boot option passed */ 121/* 1 if "noapic" boot option passed */
149extern int skip_ioapic_setup; 122extern int skip_ioapic_setup;
diff --git a/include/asm-mips/asm.h b/include/asm-mips/asm.h
index e3038a4599ee..838eb3144d81 100644
--- a/include/asm-mips/asm.h
+++ b/include/asm-mips/asm.h
@@ -344,6 +344,7 @@ symbol = value
344#define PTR_L lw 344#define PTR_L lw
345#define PTR_S sw 345#define PTR_S sw
346#define PTR_LA la 346#define PTR_LA la
347#define PTR_LI li
347#define PTR_SLL sll 348#define PTR_SLL sll
348#define PTR_SLLV sllv 349#define PTR_SLLV sllv
349#define PTR_SRL srl 350#define PTR_SRL srl
@@ -368,6 +369,7 @@ symbol = value
368#define PTR_L ld 369#define PTR_L ld
369#define PTR_S sd 370#define PTR_S sd
370#define PTR_LA dla 371#define PTR_LA dla
372#define PTR_LI dli
371#define PTR_SLL dsll 373#define PTR_SLL dsll
372#define PTR_SLLV dsllv 374#define PTR_SLLV dsllv
373#define PTR_SRL dsrl 375#define PTR_SRL dsrl
diff --git a/include/asm-mips/pgalloc.h b/include/asm-mips/pgalloc.h
index 582c1fe6cc4a..af121c67dc71 100644
--- a/include/asm-mips/pgalloc.h
+++ b/include/asm-mips/pgalloc.h
@@ -48,7 +48,7 @@ static inline pgd_t *pgd_alloc(struct mm_struct *mm)
48 48
49 ret = (pgd_t *) __get_free_pages(GFP_KERNEL, PGD_ORDER); 49 ret = (pgd_t *) __get_free_pages(GFP_KERNEL, PGD_ORDER);
50 if (ret) { 50 if (ret) {
51 init = pgd_offset(&init_mm, 0); 51 init = pgd_offset(&init_mm, 0UL);
52 pgd_init((unsigned long)ret); 52 pgd_init((unsigned long)ret);
53 memcpy(ret + USER_PTRS_PER_PGD, init + USER_PTRS_PER_PGD, 53 memcpy(ret + USER_PTRS_PER_PGD, init + USER_PTRS_PER_PGD,
54 (PTRS_PER_PGD - USER_PTRS_PER_PGD) * sizeof(pgd_t)); 54 (PTRS_PER_PGD - USER_PTRS_PER_PGD) * sizeof(pgd_t));
diff --git a/include/asm-mips/pgtable-64.h b/include/asm-mips/pgtable-64.h
index d05fb6f38aa7..7e7320300aa3 100644
--- a/include/asm-mips/pgtable-64.h
+++ b/include/asm-mips/pgtable-64.h
@@ -174,7 +174,7 @@ static inline void pud_clear(pud_t *pudp)
174#define __pmd_offset(address) pmd_index(address) 174#define __pmd_offset(address) pmd_index(address)
175 175
176/* to find an entry in a kernel page-table-directory */ 176/* to find an entry in a kernel page-table-directory */
177#define pgd_offset_k(address) pgd_offset(&init_mm, 0) 177#define pgd_offset_k(address) pgd_offset(&init_mm, 0UL)
178 178
179#define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD-1)) 179#define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD-1))
180#define pmd_index(address) (((address) >> PMD_SHIFT) & (PTRS_PER_PMD-1)) 180#define pmd_index(address) (((address) >> PMD_SHIFT) & (PTRS_PER_PMD-1))
diff --git a/include/asm-powerpc/current.h b/include/asm-powerpc/current.h
index 1938d6abd255..b8708aedf925 100644
--- a/include/asm-powerpc/current.h
+++ b/include/asm-powerpc/current.h
@@ -14,7 +14,17 @@ struct task_struct;
14#ifdef __powerpc64__ 14#ifdef __powerpc64__
15#include <asm/paca.h> 15#include <asm/paca.h>
16 16
17#define current (get_paca()->__current) 17static inline struct task_struct *get_current(void)
18{
19 struct task_struct *task;
20
21 __asm__ __volatile__("ld %0,%1(13)"
22 : "=r" (task)
23 : "i" (offsetof(struct paca_struct, __current)));
24
25 return task;
26}
27#define current get_current()
18 28
19#else 29#else
20 30
diff --git a/include/asm-powerpc/io.h b/include/asm-powerpc/io.h
index 3baff8b0fd5a..c2c5f14b5f5f 100644
--- a/include/asm-powerpc/io.h
+++ b/include/asm-powerpc/io.h
@@ -163,8 +163,11 @@ extern void _outsl_ns(volatile u32 __iomem *port, const void *buf, long count);
163 163
164static inline void mmiowb(void) 164static inline void mmiowb(void)
165{ 165{
166 __asm__ __volatile__ ("sync" : : : "memory"); 166 unsigned long tmp;
167 get_paca()->io_sync = 0; 167
168 __asm__ __volatile__("sync; li %0,0; stb %0,%1(13)"
169 : "=&r" (tmp) : "i" (offsetof(struct paca_struct, io_sync))
170 : "memory");
168} 171}
169 172
170/* 173/*
diff --git a/include/asm-powerpc/iommu.h b/include/asm-powerpc/iommu.h
index a5e98641a2ae..39fad685ffab 100644
--- a/include/asm-powerpc/iommu.h
+++ b/include/asm-powerpc/iommu.h
@@ -22,17 +22,35 @@
22#define _ASM_IOMMU_H 22#define _ASM_IOMMU_H
23#ifdef __KERNEL__ 23#ifdef __KERNEL__
24 24
25#include <asm/types.h> 25#include <linux/compiler.h>
26#include <linux/spinlock.h> 26#include <linux/spinlock.h>
27#include <linux/device.h> 27#include <linux/device.h>
28#include <linux/dma-mapping.h> 28#include <linux/dma-mapping.h>
29#include <asm/types.h>
30#include <asm/bitops.h>
31
32#define IOMMU_PAGE_SHIFT 12
33#define IOMMU_PAGE_SIZE (ASM_CONST(1) << IOMMU_PAGE_SHIFT)
34#define IOMMU_PAGE_MASK (~((1 << IOMMU_PAGE_SHIFT) - 1))
35#define IOMMU_PAGE_ALIGN(addr) _ALIGN_UP(addr, IOMMU_PAGE_SIZE)
36
37#ifndef __ASSEMBLY__
38
39/* Pure 2^n version of get_order */
40static __inline__ __attribute_const__ int get_iommu_order(unsigned long size)
41{
42 return __ilog2((size - 1) >> IOMMU_PAGE_SHIFT) + 1;
43}
44
45#endif /* __ASSEMBLY__ */
46
29 47
30/* 48/*
31 * IOMAP_MAX_ORDER defines the largest contiguous block 49 * IOMAP_MAX_ORDER defines the largest contiguous block
32 * of dma space we can get. IOMAP_MAX_ORDER = 13 50 * of dma space we can get. IOMAP_MAX_ORDER = 13
33 * allows up to 2**12 pages (4096 * 4096) = 16 MB 51 * allows up to 2**12 pages (4096 * 4096) = 16 MB
34 */ 52 */
35#define IOMAP_MAX_ORDER 13 53#define IOMAP_MAX_ORDER 13
36 54
37struct iommu_table { 55struct iommu_table {
38 unsigned long it_busno; /* Bus number this table belongs to */ 56 unsigned long it_busno; /* Bus number this table belongs to */
diff --git a/include/asm-powerpc/oprofile_impl.h b/include/asm-powerpc/oprofile_impl.h
index 5b33994cd488..07a10e590c1d 100644
--- a/include/asm-powerpc/oprofile_impl.h
+++ b/include/asm-powerpc/oprofile_impl.h
@@ -42,7 +42,7 @@ struct op_powerpc_model {
42 void (*reg_setup) (struct op_counter_config *, 42 void (*reg_setup) (struct op_counter_config *,
43 struct op_system_config *, 43 struct op_system_config *,
44 int num_counters); 44 int num_counters);
45 void (*cpu_setup) (void *); 45 void (*cpu_setup) (struct op_counter_config *);
46 void (*start) (struct op_counter_config *); 46 void (*start) (struct op_counter_config *);
47 void (*stop) (void); 47 void (*stop) (void);
48 void (*handle_interrupt) (struct pt_regs *, 48 void (*handle_interrupt) (struct pt_regs *,
@@ -121,7 +121,90 @@ static inline void ctr_write(unsigned int i, unsigned int val)
121 break; 121 break;
122 } 122 }
123} 123}
124#endif /* !CONFIG_FSL_BOOKE */ 124#else /* CONFIG_FSL_BOOKE */
125static inline u32 get_pmlca(int ctr)
126{
127 u32 pmlca;
128
129 switch (ctr) {
130 case 0:
131 pmlca = mfpmr(PMRN_PMLCA0);
132 break;
133 case 1:
134 pmlca = mfpmr(PMRN_PMLCA1);
135 break;
136 case 2:
137 pmlca = mfpmr(PMRN_PMLCA2);
138 break;
139 case 3:
140 pmlca = mfpmr(PMRN_PMLCA3);
141 break;
142 default:
143 panic("Bad ctr number\n");
144 }
145
146 return pmlca;
147}
148
149static inline void set_pmlca(int ctr, u32 pmlca)
150{
151 switch (ctr) {
152 case 0:
153 mtpmr(PMRN_PMLCA0, pmlca);
154 break;
155 case 1:
156 mtpmr(PMRN_PMLCA1, pmlca);
157 break;
158 case 2:
159 mtpmr(PMRN_PMLCA2, pmlca);
160 break;
161 case 3:
162 mtpmr(PMRN_PMLCA3, pmlca);
163 break;
164 default:
165 panic("Bad ctr number\n");
166 }
167}
168
169static inline unsigned int ctr_read(unsigned int i)
170{
171 switch(i) {
172 case 0:
173 return mfpmr(PMRN_PMC0);
174 case 1:
175 return mfpmr(PMRN_PMC1);
176 case 2:
177 return mfpmr(PMRN_PMC2);
178 case 3:
179 return mfpmr(PMRN_PMC3);
180 default:
181 return 0;
182 }
183}
184
185static inline void ctr_write(unsigned int i, unsigned int val)
186{
187 switch(i) {
188 case 0:
189 mtpmr(PMRN_PMC0, val);
190 break;
191 case 1:
192 mtpmr(PMRN_PMC1, val);
193 break;
194 case 2:
195 mtpmr(PMRN_PMC2, val);
196 break;
197 case 3:
198 mtpmr(PMRN_PMC3, val);
199 break;
200 default:
201 break;
202 }
203}
204
205
206#endif /* CONFIG_FSL_BOOKE */
207
125 208
126extern void op_powerpc_backtrace(struct pt_regs * const regs, unsigned int depth); 209extern void op_powerpc_backtrace(struct pt_regs * const regs, unsigned int depth);
127 210
diff --git a/include/asm-powerpc/pmc.h b/include/asm-powerpc/pmc.h
index 07d6a4279319..8588be68e0ad 100644
--- a/include/asm-powerpc/pmc.h
+++ b/include/asm-powerpc/pmc.h
@@ -32,18 +32,5 @@ void release_pmc_hardware(void);
32void power4_enable_pmcs(void); 32void power4_enable_pmcs(void);
33#endif 33#endif
34 34
35#ifdef CONFIG_FSL_BOOKE
36void init_pmc_stop(int ctr);
37void set_pmc_event(int ctr, int event);
38void set_pmc_user_kernel(int ctr, int user, int kernel);
39void set_pmc_marked(int ctr, int mark0, int mark1);
40void pmc_start_ctr(int ctr, int enable);
41void pmc_start_ctrs(int enable);
42void pmc_stop_ctrs(void);
43void dump_pmcs(void);
44
45extern struct op_powerpc_model op_model_fsl_booke;
46#endif
47
48#endif /* __KERNEL__ */ 35#endif /* __KERNEL__ */
49#endif /* _POWERPC_PMC_H */ 36#endif /* _POWERPC_PMC_H */
diff --git a/include/asm-powerpc/system.h b/include/asm-powerpc/system.h
index 43627596003b..f7b1227d6454 100644
--- a/include/asm-powerpc/system.h
+++ b/include/asm-powerpc/system.h
@@ -25,8 +25,8 @@
25 * 25 *
26 * We have to use the sync instructions for mb(), since lwsync doesn't 26 * We have to use the sync instructions for mb(), since lwsync doesn't
27 * order loads with respect to previous stores. Lwsync is fine for 27 * order loads with respect to previous stores. Lwsync is fine for
28 * rmb(), though. Note that lwsync is interpreted as sync by 28 * rmb(), though. Note that rmb() actually uses a sync on 32-bit
29 * 32-bit and older 64-bit CPUs. 29 * architectures.
30 * 30 *
31 * For wmb(), we use sync since wmb is used in drivers to order 31 * For wmb(), we use sync since wmb is used in drivers to order
32 * stores to system memory with respect to writes to the device. 32 * stores to system memory with respect to writes to the device.
@@ -34,7 +34,7 @@
34 * SMP since it is only used to order updates to system memory. 34 * SMP since it is only used to order updates to system memory.
35 */ 35 */
36#define mb() __asm__ __volatile__ ("sync" : : : "memory") 36#define mb() __asm__ __volatile__ ("sync" : : : "memory")
37#define rmb() __asm__ __volatile__ ("lwsync" : : : "memory") 37#define rmb() __asm__ __volatile__ (__stringify(LWSYNC) : : : "memory")
38#define wmb() __asm__ __volatile__ ("sync" : : : "memory") 38#define wmb() __asm__ __volatile__ ("sync" : : : "memory")
39#define read_barrier_depends() do { } while(0) 39#define read_barrier_depends() do { } while(0)
40 40
diff --git a/include/asm-powerpc/tce.h b/include/asm-powerpc/tce.h
index c9483adbf599..f663634cccc9 100644
--- a/include/asm-powerpc/tce.h
+++ b/include/asm-powerpc/tce.h
@@ -22,6 +22,8 @@
22#define _ASM_POWERPC_TCE_H 22#define _ASM_POWERPC_TCE_H
23#ifdef __KERNEL__ 23#ifdef __KERNEL__
24 24
25#include <asm/iommu.h>
26
25/* 27/*
26 * Tces come in two formats, one for the virtual bus and a different 28 * Tces come in two formats, one for the virtual bus and a different
27 * format for PCI 29 * format for PCI
@@ -33,7 +35,6 @@
33 35
34#define TCE_SHIFT 12 36#define TCE_SHIFT 12
35#define TCE_PAGE_SIZE (1 << TCE_SHIFT) 37#define TCE_PAGE_SIZE (1 << TCE_SHIFT)
36#define TCE_PAGE_FACTOR (PAGE_SHIFT - TCE_SHIFT)
37 38
38#define TCE_ENTRY_SIZE 8 /* each TCE is 64 bits */ 39#define TCE_ENTRY_SIZE 8 /* each TCE is 64 bits */
39 40
generated by cgit v1.2.2 (git 2.25.0) at 2025-05-31 13:38:15 -0400