diff options
-rw-r--r-- | drivers/dma/at_hdmac.c | 26 | ||||
-rw-r--r-- | drivers/dma/at_hdmac_regs.h | 4 |
2 files changed, 19 insertions, 11 deletions
diff --git a/drivers/dma/at_hdmac.c b/drivers/dma/at_hdmac.c index 65bd52a84bc3..f52c9e38d889 100644 --- a/drivers/dma/at_hdmac.c +++ b/drivers/dma/at_hdmac.c | |||
@@ -37,8 +37,8 @@ | |||
37 | 37 | ||
38 | #define ATC_DEFAULT_CFG (ATC_FIFOCFG_HALFFIFO) | 38 | #define ATC_DEFAULT_CFG (ATC_FIFOCFG_HALFFIFO) |
39 | #define ATC_DEFAULT_CTRLA (0) | 39 | #define ATC_DEFAULT_CTRLA (0) |
40 | #define ATC_DEFAULT_CTRLB (ATC_SIF(0) \ | 40 | #define ATC_DEFAULT_CTRLB (ATC_SIF(AT_DMA_MEM_IF) \ |
41 | |ATC_DIF(1)) | 41 | |ATC_DIF(AT_DMA_MEM_IF)) |
42 | 42 | ||
43 | /* | 43 | /* |
44 | * Initial number of descriptors to allocate for each channel. This could | 44 | * Initial number of descriptors to allocate for each channel. This could |
@@ -693,14 +693,15 @@ atc_prep_slave_sg(struct dma_chan *chan, struct scatterlist *sgl, | |||
693 | reg_width = atslave->reg_width; | 693 | reg_width = atslave->reg_width; |
694 | 694 | ||
695 | ctrla = ATC_DEFAULT_CTRLA | atslave->ctrla; | 695 | ctrla = ATC_DEFAULT_CTRLA | atslave->ctrla; |
696 | ctrlb = ATC_DEFAULT_CTRLB | ATC_IEN; | 696 | ctrlb = ATC_IEN; |
697 | 697 | ||
698 | switch (direction) { | 698 | switch (direction) { |
699 | case DMA_TO_DEVICE: | 699 | case DMA_TO_DEVICE: |
700 | ctrla |= ATC_DST_WIDTH(reg_width); | 700 | ctrla |= ATC_DST_WIDTH(reg_width); |
701 | ctrlb |= ATC_DST_ADDR_MODE_FIXED | 701 | ctrlb |= ATC_DST_ADDR_MODE_FIXED |
702 | | ATC_SRC_ADDR_MODE_INCR | 702 | | ATC_SRC_ADDR_MODE_INCR |
703 | | ATC_FC_MEM2PER; | 703 | | ATC_FC_MEM2PER |
704 | | ATC_SIF(AT_DMA_MEM_IF) | ATC_DIF(AT_DMA_PER_IF); | ||
704 | reg = atslave->tx_reg; | 705 | reg = atslave->tx_reg; |
705 | for_each_sg(sgl, sg, sg_len, i) { | 706 | for_each_sg(sgl, sg, sg_len, i) { |
706 | struct at_desc *desc; | 707 | struct at_desc *desc; |
@@ -741,7 +742,8 @@ atc_prep_slave_sg(struct dma_chan *chan, struct scatterlist *sgl, | |||
741 | ctrla |= ATC_SRC_WIDTH(reg_width); | 742 | ctrla |= ATC_SRC_WIDTH(reg_width); |
742 | ctrlb |= ATC_DST_ADDR_MODE_INCR | 743 | ctrlb |= ATC_DST_ADDR_MODE_INCR |
743 | | ATC_SRC_ADDR_MODE_FIXED | 744 | | ATC_SRC_ADDR_MODE_FIXED |
744 | | ATC_FC_PER2MEM; | 745 | | ATC_FC_PER2MEM |
746 | | ATC_SIF(AT_DMA_PER_IF) | ATC_DIF(AT_DMA_MEM_IF); | ||
745 | 747 | ||
746 | reg = atslave->rx_reg; | 748 | reg = atslave->rx_reg; |
747 | for_each_sg(sgl, sg, sg_len, i) { | 749 | for_each_sg(sgl, sg, sg_len, i) { |
@@ -846,20 +848,22 @@ atc_dma_cyclic_fill_desc(struct at_dma_slave *atslave, struct at_desc *desc, | |||
846 | desc->lli.saddr = buf_addr + (period_len * period_index); | 848 | desc->lli.saddr = buf_addr + (period_len * period_index); |
847 | desc->lli.daddr = atslave->tx_reg; | 849 | desc->lli.daddr = atslave->tx_reg; |
848 | desc->lli.ctrla = ctrla; | 850 | desc->lli.ctrla = ctrla; |
849 | desc->lli.ctrlb = ATC_DEFAULT_CTRLB | 851 | desc->lli.ctrlb = ATC_DST_ADDR_MODE_FIXED |
850 | | ATC_DST_ADDR_MODE_FIXED | ||
851 | | ATC_SRC_ADDR_MODE_INCR | 852 | | ATC_SRC_ADDR_MODE_INCR |
852 | | ATC_FC_MEM2PER; | 853 | | ATC_FC_MEM2PER |
854 | | ATC_SIF(AT_DMA_MEM_IF) | ||
855 | | ATC_DIF(AT_DMA_PER_IF); | ||
853 | break; | 856 | break; |
854 | 857 | ||
855 | case DMA_FROM_DEVICE: | 858 | case DMA_FROM_DEVICE: |
856 | desc->lli.saddr = atslave->rx_reg; | 859 | desc->lli.saddr = atslave->rx_reg; |
857 | desc->lli.daddr = buf_addr + (period_len * period_index); | 860 | desc->lli.daddr = buf_addr + (period_len * period_index); |
858 | desc->lli.ctrla = ctrla; | 861 | desc->lli.ctrla = ctrla; |
859 | desc->lli.ctrlb = ATC_DEFAULT_CTRLB | 862 | desc->lli.ctrlb = ATC_DST_ADDR_MODE_INCR |
860 | | ATC_DST_ADDR_MODE_INCR | ||
861 | | ATC_SRC_ADDR_MODE_FIXED | 863 | | ATC_SRC_ADDR_MODE_FIXED |
862 | | ATC_FC_PER2MEM; | 864 | | ATC_FC_PER2MEM |
865 | | ATC_SIF(AT_DMA_PER_IF) | ||
866 | | ATC_DIF(AT_DMA_MEM_IF); | ||
863 | break; | 867 | break; |
864 | 868 | ||
865 | default: | 869 | default: |
diff --git a/drivers/dma/at_hdmac_regs.h b/drivers/dma/at_hdmac_regs.h index c79a9e07f7be..ae3056df4f4b 100644 --- a/drivers/dma/at_hdmac_regs.h +++ b/drivers/dma/at_hdmac_regs.h | |||
@@ -103,6 +103,10 @@ | |||
103 | /* Bitfields in CTRLB */ | 103 | /* Bitfields in CTRLB */ |
104 | #define ATC_SIF(i) (0x3 & (i)) /* Src tx done via AHB-Lite Interface i */ | 104 | #define ATC_SIF(i) (0x3 & (i)) /* Src tx done via AHB-Lite Interface i */ |
105 | #define ATC_DIF(i) ((0x3 & (i)) << 4) /* Dst tx done via AHB-Lite Interface i */ | 105 | #define ATC_DIF(i) ((0x3 & (i)) << 4) /* Dst tx done via AHB-Lite Interface i */ |
106 | /* Specify AHB interfaces */ | ||
107 | #define AT_DMA_MEM_IF 0 /* interface 0 as memory interface */ | ||
108 | #define AT_DMA_PER_IF 1 /* interface 1 as peripheral interface */ | ||
109 | |||
106 | #define ATC_SRC_PIP (0x1 << 8) /* Source Picture-in-Picture enabled */ | 110 | #define ATC_SRC_PIP (0x1 << 8) /* Source Picture-in-Picture enabled */ |
107 | #define ATC_DST_PIP (0x1 << 12) /* Destination Picture-in-Picture enabled */ | 111 | #define ATC_DST_PIP (0x1 << 12) /* Destination Picture-in-Picture enabled */ |
108 | #define ATC_SRC_DSCR_DIS (0x1 << 16) /* Src Descriptor fetch disable */ | 112 | #define ATC_SRC_DSCR_DIS (0x1 << 16) /* Src Descriptor fetch disable */ |