diff options
| -rw-r--r-- | arch/arm/mach-ixp4xx/gtwx5715-pci.c | 18 | ||||
| -rw-r--r-- | arch/arm/mach-ixp4xx/gtwx5715-setup.c | 30 | ||||
| -rw-r--r-- | arch/arm/mach-ixp4xx/include/mach/gtwx5715.h | 116 |
3 files changed, 43 insertions, 121 deletions
diff --git a/arch/arm/mach-ixp4xx/gtwx5715-pci.c b/arch/arm/mach-ixp4xx/gtwx5715-pci.c index 7b8a2c323840..68011852559b 100644 --- a/arch/arm/mach-ixp4xx/gtwx5715-pci.c +++ b/arch/arm/mach-ixp4xx/gtwx5715-pci.c | |||
| @@ -26,14 +26,26 @@ | |||
| 26 | #include <linux/init.h> | 26 | #include <linux/init.h> |
| 27 | #include <linux/delay.h> | 27 | #include <linux/delay.h> |
| 28 | #include <linux/irq.h> | 28 | #include <linux/irq.h> |
| 29 | |||
| 30 | #include <asm/mach-types.h> | 29 | #include <asm/mach-types.h> |
| 31 | #include <mach/hardware.h> | 30 | #include <mach/hardware.h> |
| 32 | #include <mach/gtwx5715.h> | ||
| 33 | #include <asm/mach/pci.h> | 31 | #include <asm/mach/pci.h> |
| 34 | 32 | ||
| 33 | #define GTWX5715_PCI_SLOT0_DEVID 0 | ||
| 34 | #define GTWX5715_PCI_SLOT0_INTA_GPIO 10 | ||
| 35 | #define GTWX5715_PCI_SLOT0_INTB_GPIO 11 | ||
| 36 | #define GTWX5715_PCI_SLOT0_INTA_IRQ IRQ_IXP4XX_GPIO10 | ||
| 37 | #define GTWX5715_PCI_SLOT0_INTB_IRQ IRQ_IXP4XX_GPIO11 | ||
| 38 | |||
| 39 | #define GTWX5715_PCI_SLOT1_DEVID 1 | ||
| 40 | #define GTWX5715_PCI_SLOT1_INTA_GPIO 11 | ||
| 41 | #define GTWX5715_PCI_SLOT1_INTB_GPIO 10 | ||
| 42 | #define GTWX5715_PCI_SLOT1_INTA_IRQ IRQ_IXP4XX_GPIO11 | ||
| 43 | #define GTWX5715_PCI_SLOT1_INTB_IRQ IRQ_IXP4XX_GPIO10 | ||
| 44 | |||
| 45 | #define GTWX5715_PCI_SLOT_COUNT 2 | ||
| 46 | #define GTWX5715_PCI_INT_PIN_COUNT 2 | ||
| 47 | |||
| 35 | /* | 48 | /* |
| 36 | * The exact GPIO pins and IRQs are defined in arch-ixp4xx/gtwx5715.h | ||
| 37 | * Slot 0 isn't actually populated with a card connector but | 49 | * Slot 0 isn't actually populated with a card connector but |
| 38 | * we initialize it anyway in case a future version has the | 50 | * we initialize it anyway in case a future version has the |
| 39 | * slot populated or someone with good soldering skills has | 51 | * slot populated or someone with good soldering skills has |
diff --git a/arch/arm/mach-ixp4xx/gtwx5715-setup.c b/arch/arm/mach-ixp4xx/gtwx5715-setup.c index 25c21d6665ec..0bc7185cb6f7 100644 --- a/arch/arm/mach-ixp4xx/gtwx5715-setup.c +++ b/arch/arm/mach-ixp4xx/gtwx5715-setup.c | |||
| @@ -28,7 +28,6 @@ | |||
| 28 | #include <linux/tty.h> | 28 | #include <linux/tty.h> |
| 29 | #include <linux/serial_8250.h> | 29 | #include <linux/serial_8250.h> |
| 30 | #include <linux/slab.h> | 30 | #include <linux/slab.h> |
| 31 | |||
| 32 | #include <asm/types.h> | 31 | #include <asm/types.h> |
| 33 | #include <asm/setup.h> | 32 | #include <asm/setup.h> |
| 34 | #include <asm/memory.h> | 33 | #include <asm/memory.h> |
| @@ -37,7 +36,34 @@ | |||
| 37 | #include <asm/mach-types.h> | 36 | #include <asm/mach-types.h> |
| 38 | #include <asm/mach/arch.h> | 37 | #include <asm/mach/arch.h> |
| 39 | #include <asm/mach/flash.h> | 38 | #include <asm/mach/flash.h> |
| 40 | #include <mach/gtwx5715.h> | 39 | |
| 40 | /* GPIO 5,6,7 and 12 are hard wired to the Kendin KS8995M Switch | ||
| 41 | and operate as an SPI type interface. The details of the interface | ||
| 42 | are available on Kendin/Micrel's web site. */ | ||
| 43 | |||
| 44 | #define GTWX5715_KSSPI_SELECT 5 | ||
| 45 | #define GTWX5715_KSSPI_TXD 6 | ||
| 46 | #define GTWX5715_KSSPI_CLOCK 7 | ||
| 47 | #define GTWX5715_KSSPI_RXD 12 | ||
| 48 | |||
| 49 | /* The "reset" button is wired to GPIO 3. | ||
| 50 | The GPIO is brought "low" when the button is pushed. */ | ||
| 51 | |||
| 52 | #define GTWX5715_BUTTON_GPIO 3 | ||
| 53 | |||
| 54 | /* Board Label Front Label | ||
| 55 | LED1 Power | ||
| 56 | LED2 Wireless-G | ||
| 57 | LED3 not populated but could be | ||
| 58 | LED4 Internet | ||
| 59 | LED5 - LED8 Controlled by KS8995M Switch | ||
| 60 | LED9 DMZ */ | ||
| 61 | |||
| 62 | #define GTWX5715_LED1_GPIO 2 | ||
| 63 | #define GTWX5715_LED2_GPIO 9 | ||
| 64 | #define GTWX5715_LED3_GPIO 8 | ||
| 65 | #define GTWX5715_LED4_GPIO 1 | ||
| 66 | #define GTWX5715_LED9_GPIO 4 | ||
| 41 | 67 | ||
| 42 | /* | 68 | /* |
| 43 | * Xscale UART registers are 32 bits wide with only the least | 69 | * Xscale UART registers are 32 bits wide with only the least |
diff --git a/arch/arm/mach-ixp4xx/include/mach/gtwx5715.h b/arch/arm/mach-ixp4xx/include/mach/gtwx5715.h deleted file mode 100644 index 5d5e201cac7e..000000000000 --- a/arch/arm/mach-ixp4xx/include/mach/gtwx5715.h +++ /dev/null | |||
| @@ -1,116 +0,0 @@ | |||
| 1 | /* | ||
| 2 | * arch/arm/mach-ixp4xx/include/mach/gtwx5715.h | ||
| 3 | * | ||
| 4 | * Gemtek GTWX5715 Gateway (Linksys WRV54G) | ||
| 5 | * | ||
| 6 | * Copyright 2004 (c) George T. Joseph | ||
| 7 | * | ||
| 8 | * This program is free software; you can redistribute it and/or | ||
| 9 | * modify it under the terms of the GNU General Public License | ||
| 10 | * as published by the Free Software Foundation; either version 2 | ||
| 11 | * of the License, or (at your option) any later version. | ||
| 12 | * | ||
| 13 | * This program is distributed in the hope that it will be useful, | ||
| 14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 16 | * GNU General Public License for more details. | ||
| 17 | * | ||
| 18 | * You should have received a copy of the GNU General Public License | ||
| 19 | * along with this program; if not, write to the Free Software | ||
| 20 | * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. | ||
| 21 | */ | ||
| 22 | |||
| 23 | #ifndef __ASM_ARCH_HARDWARE_H__ | ||
| 24 | #error "Do not include this directly, instead #include <mach/hardware.h>" | ||
| 25 | #endif | ||
| 26 | #include "irqs.h" | ||
| 27 | |||
| 28 | #define GTWX5715_GPIO0 0 | ||
| 29 | #define GTWX5715_GPIO1 1 | ||
| 30 | #define GTWX5715_GPIO2 2 | ||
| 31 | #define GTWX5715_GPIO3 3 | ||
| 32 | #define GTWX5715_GPIO4 4 | ||
| 33 | #define GTWX5715_GPIO5 5 | ||
| 34 | #define GTWX5715_GPIO6 6 | ||
| 35 | #define GTWX5715_GPIO7 7 | ||
| 36 | #define GTWX5715_GPIO8 8 | ||
| 37 | #define GTWX5715_GPIO9 9 | ||
| 38 | #define GTWX5715_GPIO10 10 | ||
| 39 | #define GTWX5715_GPIO11 11 | ||
| 40 | #define GTWX5715_GPIO12 12 | ||
| 41 | #define GTWX5715_GPIO13 13 | ||
| 42 | #define GTWX5715_GPIO14 14 | ||
| 43 | |||
| 44 | #define GTWX5715_GPIO0_IRQ IRQ_IXP4XX_GPIO0 | ||
| 45 | #define GTWX5715_GPIO1_IRQ IRQ_IXP4XX_GPIO1 | ||
| 46 | #define GTWX5715_GPIO2_IRQ IRQ_IXP4XX_GPIO2 | ||
| 47 | #define GTWX5715_GPIO3_IRQ IRQ_IXP4XX_GPIO3 | ||
| 48 | #define GTWX5715_GPIO4_IRQ IRQ_IXP4XX_GPIO4 | ||
| 49 | #define GTWX5715_GPIO5_IRQ IRQ_IXP4XX_GPIO5 | ||
| 50 | #define GTWX5715_GPIO6_IRQ IRQ_IXP4XX_GPIO6 | ||
| 51 | #define GTWX5715_GPIO7_IRQ IRQ_IXP4XX_GPIO7 | ||
| 52 | #define GTWX5715_GPIO8_IRQ IRQ_IXP4XX_GPIO8 | ||
| 53 | #define GTWX5715_GPIO9_IRQ IRQ_IXP4XX_GPIO9 | ||
| 54 | #define GTWX5715_GPIO10_IRQ IRQ_IXP4XX_GPIO10 | ||
| 55 | #define GTWX5715_GPIO11_IRQ IRQ_IXP4XX_GPIO11 | ||
| 56 | #define GTWX5715_GPIO12_IRQ IRQ_IXP4XX_GPIO12 | ||
| 57 | #define GTWX5715_GPIO13_IRQ IRQ_IXP4XX_SW_INT1 | ||
| 58 | #define GTWX5715_GPIO14_IRQ IRQ_IXP4XX_SW_INT2 | ||
| 59 | |||
| 60 | /* PCI controller GPIO to IRQ pin mappings | ||
| 61 | |||
| 62 | INTA INTB | ||
| 63 | SLOT 0 10 11 | ||
| 64 | SLOT 1 11 10 | ||
| 65 | |||
| 66 | */ | ||
| 67 | |||
| 68 | #define GTWX5715_PCI_SLOT0_DEVID 0 | ||
| 69 | #define GTWX5715_PCI_SLOT0_INTA_GPIO GTWX5715_GPIO10 | ||
| 70 | #define GTWX5715_PCI_SLOT0_INTB_GPIO GTWX5715_GPIO11 | ||
| 71 | #define GTWX5715_PCI_SLOT0_INTA_IRQ GTWX5715_GPIO10_IRQ | ||
| 72 | #define GTWX5715_PCI_SLOT0_INTB_IRQ GTWX5715_GPIO11_IRQ | ||
| 73 | |||
| 74 | #define GTWX5715_PCI_SLOT1_DEVID 1 | ||
| 75 | #define GTWX5715_PCI_SLOT1_INTA_GPIO GTWX5715_GPIO11 | ||
| 76 | #define GTWX5715_PCI_SLOT1_INTB_GPIO GTWX5715_GPIO10 | ||
| 77 | #define GTWX5715_PCI_SLOT1_INTA_IRQ GTWX5715_GPIO11_IRQ | ||
| 78 | #define GTWX5715_PCI_SLOT1_INTB_IRQ GTWX5715_GPIO10_IRQ | ||
| 79 | |||
| 80 | #define GTWX5715_PCI_SLOT_COUNT 2 | ||
| 81 | #define GTWX5715_PCI_INT_PIN_COUNT 2 | ||
| 82 | |||
| 83 | /* | ||
| 84 | * GPIO 5,6,7 and12 are hard wired to the Kendin KS8995M Switch | ||
| 85 | * and operate as an SPI type interface. The details of the interface | ||
| 86 | * are available on Kendin/Micrel's web site. | ||
| 87 | */ | ||
| 88 | |||
| 89 | #define GTWX5715_KSSPI_SELECT GTWX5715_GPIO5 | ||
| 90 | #define GTWX5715_KSSPI_TXD GTWX5715_GPIO6 | ||
| 91 | #define GTWX5715_KSSPI_CLOCK GTWX5715_GPIO7 | ||
| 92 | #define GTWX5715_KSSPI_RXD GTWX5715_GPIO12 | ||
| 93 | |||
| 94 | /* | ||
| 95 | * The "reset" button is wired to GPIO 3. | ||
| 96 | * The GPIO is brought "low" when the button is pushed. | ||
| 97 | */ | ||
| 98 | |||
| 99 | #define GTWX5715_BUTTON_GPIO GTWX5715_GPIO3 | ||
| 100 | #define GTWX5715_BUTTON_IRQ GTWX5715_GPIO3_IRQ | ||
| 101 | |||
| 102 | /* | ||
| 103 | * Board Label Front Label | ||
| 104 | * LED1 Power | ||
| 105 | * LED2 Wireless-G | ||
| 106 | * LED3 not populated but could be | ||
| 107 | * LED4 Internet | ||
| 108 | * LED5 - LED8 Controlled by KS8995M Switch | ||
| 109 | * LED9 DMZ | ||
| 110 | */ | ||
| 111 | |||
| 112 | #define GTWX5715_LED1_GPIO GTWX5715_GPIO2 | ||
| 113 | #define GTWX5715_LED2_GPIO GTWX5715_GPIO9 | ||
| 114 | #define GTWX5715_LED3_GPIO GTWX5715_GPIO8 | ||
| 115 | #define GTWX5715_LED4_GPIO GTWX5715_GPIO1 | ||
| 116 | #define GTWX5715_LED9_GPIO GTWX5715_GPIO4 | ||
