diff options
-rw-r--r-- | arch/powerpc/include/asm/pgtable-ppc32.h | 36 | ||||
-rw-r--r-- | arch/powerpc/include/asm/pte-fsl-booke.h | 2 |
2 files changed, 26 insertions, 12 deletions
diff --git a/arch/powerpc/include/asm/pgtable-ppc32.h b/arch/powerpc/include/asm/pgtable-ppc32.h index a9c6ecef3656..67ceffc01b43 100644 --- a/arch/powerpc/include/asm/pgtable-ppc32.h +++ b/arch/powerpc/include/asm/pgtable-ppc32.h | |||
@@ -146,9 +146,29 @@ extern int icache_44x_need_flush; | |||
146 | 146 | ||
147 | #define _PAGE_HPTEFLAGS _PAGE_HASHPTE | 147 | #define _PAGE_HPTEFLAGS _PAGE_HASHPTE |
148 | 148 | ||
149 | #define _PAGE_CHG_MASK (PAGE_MASK | _PAGE_ACCESSED | _PAGE_DIRTY | \ | 149 | /* Location of the PFN in the PTE. Most platforms use the same as _PAGE_SHIFT |
150 | _PAGE_SPECIAL) | 150 | * here (ie, naturally aligned). Platform who don't just pre-define the |
151 | * value so we don't override it here | ||
152 | */ | ||
153 | #ifndef PTE_RPN_SHIFT | ||
154 | #define PTE_RPN_SHIFT (PAGE_SHIFT) | ||
155 | #endif | ||
156 | |||
157 | #ifdef CONFIG_PTE_64BIT | ||
158 | #define PTE_RPN_MAX (1ULL << (64 - PTE_RPN_SHIFT)) | ||
159 | #define PTE_RPN_MASK (~((1ULL<<PTE_RPN_SHIFT)-1)) | ||
160 | #else | ||
161 | #define PTE_RPN_MAX (1UL << (32 - PTE_RPN_SHIFT)) | ||
162 | #define PTE_RPN_MASK (~((1UL<<PTE_RPN_SHIFT)-1)) | ||
163 | #endif | ||
151 | 164 | ||
165 | /* _PAGE_CHG_MASK masks of bits that are to be preserved accross | ||
166 | * pgprot changes | ||
167 | */ | ||
168 | #define _PAGE_CHG_MASK (PTE_RPN_MASK | _PAGE_HPTEFLAGS | _PAGE_DIRTY | \ | ||
169 | _PAGE_ACCESSED | _PAGE_SPECIAL) | ||
170 | |||
171 | /* Mask of bits returned by pte_pgprot() */ | ||
152 | #define PAGE_PROT_BITS (_PAGE_GUARDED | _PAGE_COHERENT | _PAGE_NO_CACHE | \ | 172 | #define PAGE_PROT_BITS (_PAGE_GUARDED | _PAGE_COHERENT | _PAGE_NO_CACHE | \ |
153 | _PAGE_WRITETHRU | _PAGE_ENDIAN | \ | 173 | _PAGE_WRITETHRU | _PAGE_ENDIAN | \ |
154 | _PAGE_USER | _PAGE_ACCESSED | \ | 174 | _PAGE_USER | _PAGE_ACCESSED | \ |
@@ -236,18 +256,10 @@ extern unsigned long bad_call_to_PMD_PAGE_SIZE(void); | |||
236 | * Conversions between PTE values and page frame numbers. | 256 | * Conversions between PTE values and page frame numbers. |
237 | */ | 257 | */ |
238 | 258 | ||
239 | /* in some case we want to additionaly adjust where the pfn is in the pte to | 259 | #define pte_pfn(x) (pte_val(x) >> PTE_RPN_SHIFT) |
240 | * allow room for more flags */ | ||
241 | #if defined(CONFIG_FSL_BOOKE) && defined(CONFIG_PTE_64BIT) | ||
242 | #define PFN_SHIFT_OFFSET (PAGE_SHIFT + 8) | ||
243 | #else | ||
244 | #define PFN_SHIFT_OFFSET (PAGE_SHIFT) | ||
245 | #endif | ||
246 | |||
247 | #define pte_pfn(x) (pte_val(x) >> PFN_SHIFT_OFFSET) | ||
248 | #define pte_page(x) pfn_to_page(pte_pfn(x)) | 260 | #define pte_page(x) pfn_to_page(pte_pfn(x)) |
249 | 261 | ||
250 | #define pfn_pte(pfn, prot) __pte(((pte_basic_t)(pfn) << PFN_SHIFT_OFFSET) |\ | 262 | #define pfn_pte(pfn, prot) __pte(((pte_basic_t)(pfn) << PTE_RPN_SHIFT) |\ |
251 | pgprot_val(prot)) | 263 | pgprot_val(prot)) |
252 | #define mk_pte(page, prot) pfn_pte(page_to_pfn(page), prot) | 264 | #define mk_pte(page, prot) pfn_pte(page_to_pfn(page), prot) |
253 | #endif /* __ASSEMBLY__ */ | 265 | #endif /* __ASSEMBLY__ */ |
diff --git a/arch/powerpc/include/asm/pte-fsl-booke.h b/arch/powerpc/include/asm/pte-fsl-booke.h index 0fe5de7bea3d..10820f58acf5 100644 --- a/arch/powerpc/include/asm/pte-fsl-booke.h +++ b/arch/powerpc/include/asm/pte-fsl-booke.h | |||
@@ -36,6 +36,8 @@ | |||
36 | #ifdef CONFIG_PTE_64BIT | 36 | #ifdef CONFIG_PTE_64BIT |
37 | /* ERPN in a PTE never gets cleared, ignore it */ | 37 | /* ERPN in a PTE never gets cleared, ignore it */ |
38 | #define _PTE_NONE_MASK 0xffffffffffff0000ULL | 38 | #define _PTE_NONE_MASK 0xffffffffffff0000ULL |
39 | /* We extend the size of the PTE flags area when using 64-bit PTEs */ | ||
40 | #define PTE_RPN_SHIFT (PAGE_SHIFT + 8) | ||
39 | #endif | 41 | #endif |
40 | 42 | ||
41 | #define _PMD_PRESENT 0 | 43 | #define _PMD_PRESENT 0 |