diff options
27 files changed, 30 insertions, 161 deletions
diff --git a/arch/alpha/kernel/time.c b/arch/alpha/kernel/time.c index 918e8e0b72ff..818e74ed45dc 100644 --- a/arch/alpha/kernel/time.c +++ b/arch/alpha/kernel/time.c | |||
@@ -375,8 +375,7 @@ static struct clocksource clocksource_rpcc = { | |||
375 | 375 | ||
376 | static inline void register_rpcc_clocksource(long cycle_freq) | 376 | static inline void register_rpcc_clocksource(long cycle_freq) |
377 | { | 377 | { |
378 | clocksource_calc_mult_shift(&clocksource_rpcc, cycle_freq, 4); | 378 | clocksource_register_hz(&clocksource_rpcc, cycle_freq); |
379 | clocksource_register(&clocksource_rpcc); | ||
380 | } | 379 | } |
381 | #else /* !CONFIG_SMP */ | 380 | #else /* !CONFIG_SMP */ |
382 | static inline void register_rpcc_clocksource(long cycle_freq) | 381 | static inline void register_rpcc_clocksource(long cycle_freq) |
diff --git a/arch/blackfin/kernel/time-ts.c b/arch/blackfin/kernel/time-ts.c index cdb4beb6bc8f..9e9b60d969dc 100644 --- a/arch/blackfin/kernel/time-ts.c +++ b/arch/blackfin/kernel/time-ts.c | |||
@@ -23,29 +23,6 @@ | |||
23 | #include <asm/gptimers.h> | 23 | #include <asm/gptimers.h> |
24 | #include <asm/nmi.h> | 24 | #include <asm/nmi.h> |
25 | 25 | ||
26 | /* Accelerators for sched_clock() | ||
27 | * convert from cycles(64bits) => nanoseconds (64bits) | ||
28 | * basic equation: | ||
29 | * ns = cycles / (freq / ns_per_sec) | ||
30 | * ns = cycles * (ns_per_sec / freq) | ||
31 | * ns = cycles * (10^9 / (cpu_khz * 10^3)) | ||
32 | * ns = cycles * (10^6 / cpu_khz) | ||
33 | * | ||
34 | * Then we use scaling math (suggested by george@mvista.com) to get: | ||
35 | * ns = cycles * (10^6 * SC / cpu_khz) / SC | ||
36 | * ns = cycles * cyc2ns_scale / SC | ||
37 | * | ||
38 | * And since SC is a constant power of two, we can convert the div | ||
39 | * into a shift. | ||
40 | * | ||
41 | * We can use khz divisor instead of mhz to keep a better precision, since | ||
42 | * cyc2ns_scale is limited to 10^6 * 2^10, which fits in 32 bits. | ||
43 | * (mathieu.desnoyers@polymtl.ca) | ||
44 | * | ||
45 | * -johnstul@us.ibm.com "math is hard, lets go shopping!" | ||
46 | */ | ||
47 | |||
48 | #define CYC2NS_SCALE_FACTOR 10 /* 2^10, carefully chosen */ | ||
49 | 26 | ||
50 | #if defined(CONFIG_CYCLES_CLOCKSOURCE) | 27 | #if defined(CONFIG_CYCLES_CLOCKSOURCE) |
51 | 28 | ||
@@ -63,7 +40,6 @@ static struct clocksource bfin_cs_cycles = { | |||
63 | .rating = 400, | 40 | .rating = 400, |
64 | .read = bfin_read_cycles, | 41 | .read = bfin_read_cycles, |
65 | .mask = CLOCKSOURCE_MASK(64), | 42 | .mask = CLOCKSOURCE_MASK(64), |
66 | .shift = CYC2NS_SCALE_FACTOR, | ||
67 | .flags = CLOCK_SOURCE_IS_CONTINUOUS, | 43 | .flags = CLOCK_SOURCE_IS_CONTINUOUS, |
68 | }; | 44 | }; |
69 | 45 | ||
@@ -75,10 +51,7 @@ static inline unsigned long long bfin_cs_cycles_sched_clock(void) | |||
75 | 51 | ||
76 | static int __init bfin_cs_cycles_init(void) | 52 | static int __init bfin_cs_cycles_init(void) |
77 | { | 53 | { |
78 | bfin_cs_cycles.mult = \ | 54 | if (clocksource_register_hz(&bfin_cs_cycles, get_cclk())) |
79 | clocksource_hz2mult(get_cclk(), bfin_cs_cycles.shift); | ||
80 | |||
81 | if (clocksource_register(&bfin_cs_cycles)) | ||
82 | panic("failed to register clocksource"); | 55 | panic("failed to register clocksource"); |
83 | 56 | ||
84 | return 0; | 57 | return 0; |
@@ -111,7 +84,6 @@ static struct clocksource bfin_cs_gptimer0 = { | |||
111 | .rating = 350, | 84 | .rating = 350, |
112 | .read = bfin_read_gptimer0, | 85 | .read = bfin_read_gptimer0, |
113 | .mask = CLOCKSOURCE_MASK(32), | 86 | .mask = CLOCKSOURCE_MASK(32), |
114 | .shift = CYC2NS_SCALE_FACTOR, | ||
115 | .flags = CLOCK_SOURCE_IS_CONTINUOUS, | 87 | .flags = CLOCK_SOURCE_IS_CONTINUOUS, |
116 | }; | 88 | }; |
117 | 89 | ||
@@ -125,10 +97,7 @@ static int __init bfin_cs_gptimer0_init(void) | |||
125 | { | 97 | { |
126 | setup_gptimer0(); | 98 | setup_gptimer0(); |
127 | 99 | ||
128 | bfin_cs_gptimer0.mult = \ | 100 | if (clocksource_register_hz(&bfin_cs_gptimer0, get_sclk())) |
129 | clocksource_hz2mult(get_sclk(), bfin_cs_gptimer0.shift); | ||
130 | |||
131 | if (clocksource_register(&bfin_cs_gptimer0)) | ||
132 | panic("failed to register clocksource"); | 101 | panic("failed to register clocksource"); |
133 | 102 | ||
134 | return 0; | 103 | return 0; |
diff --git a/arch/ia64/kernel/cyclone.c b/arch/ia64/kernel/cyclone.c index 1b811c61bdc6..f64097b5118a 100644 --- a/arch/ia64/kernel/cyclone.c +++ b/arch/ia64/kernel/cyclone.c | |||
@@ -31,8 +31,6 @@ static struct clocksource clocksource_cyclone = { | |||
31 | .rating = 300, | 31 | .rating = 300, |
32 | .read = read_cyclone, | 32 | .read = read_cyclone, |
33 | .mask = (1LL << 40) - 1, | 33 | .mask = (1LL << 40) - 1, |
34 | .mult = 0, /*to be calculated*/ | ||
35 | .shift = 16, | ||
36 | .flags = CLOCK_SOURCE_IS_CONTINUOUS, | 34 | .flags = CLOCK_SOURCE_IS_CONTINUOUS, |
37 | }; | 35 | }; |
38 | 36 | ||
@@ -118,9 +116,7 @@ int __init init_cyclone_clock(void) | |||
118 | /* initialize last tick */ | 116 | /* initialize last tick */ |
119 | cyclone_mc = cyclone_timer; | 117 | cyclone_mc = cyclone_timer; |
120 | clocksource_cyclone.fsys_mmio = cyclone_timer; | 118 | clocksource_cyclone.fsys_mmio = cyclone_timer; |
121 | clocksource_cyclone.mult = clocksource_hz2mult(CYCLONE_TIMER_FREQ, | 119 | clocksource_register_hz(&clocksource_cyclone, CYCLONE_TIMER_FREQ); |
122 | clocksource_cyclone.shift); | ||
123 | clocksource_register(&clocksource_cyclone); | ||
124 | 120 | ||
125 | return 0; | 121 | return 0; |
126 | } | 122 | } |
diff --git a/arch/ia64/kernel/time.c b/arch/ia64/kernel/time.c index 156ad803d5b7..04440cc09b40 100644 --- a/arch/ia64/kernel/time.c +++ b/arch/ia64/kernel/time.c | |||
@@ -73,8 +73,6 @@ static struct clocksource clocksource_itc = { | |||
73 | .rating = 350, | 73 | .rating = 350, |
74 | .read = itc_get_cycles, | 74 | .read = itc_get_cycles, |
75 | .mask = CLOCKSOURCE_MASK(64), | 75 | .mask = CLOCKSOURCE_MASK(64), |
76 | .mult = 0, /*to be calculated*/ | ||
77 | .shift = 16, | ||
78 | .flags = CLOCK_SOURCE_IS_CONTINUOUS, | 76 | .flags = CLOCK_SOURCE_IS_CONTINUOUS, |
79 | #ifdef CONFIG_PARAVIRT | 77 | #ifdef CONFIG_PARAVIRT |
80 | .resume = paravirt_clocksource_resume, | 78 | .resume = paravirt_clocksource_resume, |
@@ -365,11 +363,8 @@ ia64_init_itm (void) | |||
365 | ia64_cpu_local_tick(); | 363 | ia64_cpu_local_tick(); |
366 | 364 | ||
367 | if (!itc_clocksource) { | 365 | if (!itc_clocksource) { |
368 | /* Sort out mult/shift values: */ | 366 | clocksource_register_hz(&clocksource_itc, |
369 | clocksource_itc.mult = | 367 | local_cpu_data->itc_freq); |
370 | clocksource_hz2mult(local_cpu_data->itc_freq, | ||
371 | clocksource_itc.shift); | ||
372 | clocksource_register(&clocksource_itc); | ||
373 | itc_clocksource = &clocksource_itc; | 368 | itc_clocksource = &clocksource_itc; |
374 | } | 369 | } |
375 | } | 370 | } |
diff --git a/arch/ia64/sn/kernel/sn2/timer.c b/arch/ia64/sn/kernel/sn2/timer.c index 21d6f09e3447..c34efda122e1 100644 --- a/arch/ia64/sn/kernel/sn2/timer.c +++ b/arch/ia64/sn/kernel/sn2/timer.c | |||
@@ -33,8 +33,6 @@ static struct clocksource clocksource_sn2 = { | |||
33 | .rating = 450, | 33 | .rating = 450, |
34 | .read = read_sn2, | 34 | .read = read_sn2, |
35 | .mask = (1LL << 55) - 1, | 35 | .mask = (1LL << 55) - 1, |
36 | .mult = 0, | ||
37 | .shift = 10, | ||
38 | .flags = CLOCK_SOURCE_IS_CONTINUOUS, | 36 | .flags = CLOCK_SOURCE_IS_CONTINUOUS, |
39 | }; | 37 | }; |
40 | 38 | ||
@@ -57,9 +55,7 @@ ia64_sn_udelay (unsigned long usecs) | |||
57 | void __init sn_timer_init(void) | 55 | void __init sn_timer_init(void) |
58 | { | 56 | { |
59 | clocksource_sn2.fsys_mmio = RTC_COUNTER_ADDR; | 57 | clocksource_sn2.fsys_mmio = RTC_COUNTER_ADDR; |
60 | clocksource_sn2.mult = clocksource_hz2mult(sn_rtc_cycles_per_second, | 58 | clocksource_register_hz(&clocksource_sn2, sn_rtc_cycles_per_second); |
61 | clocksource_sn2.shift); | ||
62 | clocksource_register(&clocksource_sn2); | ||
63 | 59 | ||
64 | ia64_udelay = &ia64_sn_udelay; | 60 | ia64_udelay = &ia64_sn_udelay; |
65 | } | 61 | } |
diff --git a/arch/microblaze/kernel/timer.c b/arch/microblaze/kernel/timer.c index d8a214f11ac2..e5550ce4e0eb 100644 --- a/arch/microblaze/kernel/timer.c +++ b/arch/microblaze/kernel/timer.c | |||
@@ -217,16 +217,12 @@ static struct clocksource clocksource_microblaze = { | |||
217 | .rating = 300, | 217 | .rating = 300, |
218 | .read = microblaze_read, | 218 | .read = microblaze_read, |
219 | .mask = CLOCKSOURCE_MASK(32), | 219 | .mask = CLOCKSOURCE_MASK(32), |
220 | .shift = 8, /* I can shift it */ | ||
221 | .flags = CLOCK_SOURCE_IS_CONTINUOUS, | 220 | .flags = CLOCK_SOURCE_IS_CONTINUOUS, |
222 | }; | 221 | }; |
223 | 222 | ||
224 | static int __init microblaze_clocksource_init(void) | 223 | static int __init microblaze_clocksource_init(void) |
225 | { | 224 | { |
226 | clocksource_microblaze.mult = | 225 | if (clocksource_register_hz(&clocksource_microblaze, timer_clock_freq)) |
227 | clocksource_hz2mult(timer_clock_freq, | ||
228 | clocksource_microblaze.shift); | ||
229 | if (clocksource_register(&clocksource_microblaze)) | ||
230 | panic("failed to register clocksource"); | 226 | panic("failed to register clocksource"); |
231 | 227 | ||
232 | /* stop timer1 */ | 228 | /* stop timer1 */ |
diff --git a/arch/mips/alchemy/common/time.c b/arch/mips/alchemy/common/time.c index 2aecb2fdf982..d5da6adbf634 100644 --- a/arch/mips/alchemy/common/time.c +++ b/arch/mips/alchemy/common/time.c | |||
@@ -141,8 +141,7 @@ static int __init alchemy_time_init(unsigned int m2int) | |||
141 | goto cntr_err; | 141 | goto cntr_err; |
142 | 142 | ||
143 | /* register counter1 clocksource and event device */ | 143 | /* register counter1 clocksource and event device */ |
144 | clocksource_set_clock(&au1x_counter1_clocksource, 32768); | 144 | clocksource_register_hz(&au1x_counter1_clocksource, 32768); |
145 | clocksource_register(&au1x_counter1_clocksource); | ||
146 | 145 | ||
147 | cd->shift = 32; | 146 | cd->shift = 32; |
148 | cd->mult = div_sc(32768, NSEC_PER_SEC, cd->shift); | 147 | cd->mult = div_sc(32768, NSEC_PER_SEC, cd->shift); |
diff --git a/arch/mips/cavium-octeon/csrc-octeon.c b/arch/mips/cavium-octeon/csrc-octeon.c index 26bf71130bf8..29d56afbb02d 100644 --- a/arch/mips/cavium-octeon/csrc-octeon.c +++ b/arch/mips/cavium-octeon/csrc-octeon.c | |||
@@ -105,8 +105,7 @@ unsigned long long notrace sched_clock(void) | |||
105 | void __init plat_time_init(void) | 105 | void __init plat_time_init(void) |
106 | { | 106 | { |
107 | clocksource_mips.rating = 300; | 107 | clocksource_mips.rating = 300; |
108 | clocksource_set_clock(&clocksource_mips, octeon_get_clock_rate()); | 108 | clocksource_register_hz(&clocksource_mips, octeon_get_clock_rate()); |
109 | clocksource_register(&clocksource_mips); | ||
110 | } | 109 | } |
111 | 110 | ||
112 | static u64 octeon_udelay_factor; | 111 | static u64 octeon_udelay_factor; |
diff --git a/arch/mips/include/asm/time.h b/arch/mips/include/asm/time.h index c7f1bfef1574..bc14447e69b5 100644 --- a/arch/mips/include/asm/time.h +++ b/arch/mips/include/asm/time.h | |||
@@ -84,12 +84,6 @@ static inline int init_mips_clocksource(void) | |||
84 | #endif | 84 | #endif |
85 | } | 85 | } |
86 | 86 | ||
87 | static inline void clocksource_set_clock(struct clocksource *cs, | ||
88 | unsigned int clock) | ||
89 | { | ||
90 | clocksource_calc_mult_shift(cs, clock, 4); | ||
91 | } | ||
92 | |||
93 | static inline void clockevent_set_clock(struct clock_event_device *cd, | 87 | static inline void clockevent_set_clock(struct clock_event_device *cd, |
94 | unsigned int clock) | 88 | unsigned int clock) |
95 | { | 89 | { |
diff --git a/arch/mips/jz4740/time.c b/arch/mips/jz4740/time.c index fe01678d94fd..03dfd4e0da4e 100644 --- a/arch/mips/jz4740/time.c +++ b/arch/mips/jz4740/time.c | |||
@@ -121,8 +121,7 @@ void __init plat_time_init(void) | |||
121 | 121 | ||
122 | clockevents_register_device(&jz4740_clockevent); | 122 | clockevents_register_device(&jz4740_clockevent); |
123 | 123 | ||
124 | clocksource_set_clock(&jz4740_clocksource, clk_rate); | 124 | ret = clocksource_register_hz(&jz4740_clocksource, clk_rate); |
125 | ret = clocksource_register(&jz4740_clocksource); | ||
126 | 125 | ||
127 | if (ret) | 126 | if (ret) |
128 | printk(KERN_ERR "Failed to register clocksource: %d\n", ret); | 127 | printk(KERN_ERR "Failed to register clocksource: %d\n", ret); |
diff --git a/arch/mips/kernel/cevt-txx9.c b/arch/mips/kernel/cevt-txx9.c index 0b7377361e22..f0ab92a1b057 100644 --- a/arch/mips/kernel/cevt-txx9.c +++ b/arch/mips/kernel/cevt-txx9.c | |||
@@ -51,8 +51,7 @@ void __init txx9_clocksource_init(unsigned long baseaddr, | |||
51 | { | 51 | { |
52 | struct txx9_tmr_reg __iomem *tmrptr; | 52 | struct txx9_tmr_reg __iomem *tmrptr; |
53 | 53 | ||
54 | clocksource_set_clock(&txx9_clocksource.cs, TIMER_CLK(imbusclk)); | 54 | clocksource_register_hz(&txx9_clocksource.cs, TIMER_CLK(imbusclk)); |
55 | clocksource_register(&txx9_clocksource.cs); | ||
56 | 55 | ||
57 | tmrptr = ioremap(baseaddr, sizeof(struct txx9_tmr_reg)); | 56 | tmrptr = ioremap(baseaddr, sizeof(struct txx9_tmr_reg)); |
58 | __raw_writel(TCR_BASE, &tmrptr->tcr); | 57 | __raw_writel(TCR_BASE, &tmrptr->tcr); |
diff --git a/arch/mips/kernel/csrc-bcm1480.c b/arch/mips/kernel/csrc-bcm1480.c index 51489f8a825e..f96f99c794a3 100644 --- a/arch/mips/kernel/csrc-bcm1480.c +++ b/arch/mips/kernel/csrc-bcm1480.c | |||
@@ -49,6 +49,5 @@ void __init sb1480_clocksource_init(void) | |||
49 | 49 | ||
50 | plldiv = G_BCM1480_SYS_PLL_DIV(__raw_readq(IOADDR(A_SCD_SYSTEM_CFG))); | 50 | plldiv = G_BCM1480_SYS_PLL_DIV(__raw_readq(IOADDR(A_SCD_SYSTEM_CFG))); |
51 | zbbus = ((plldiv >> 1) * 50000000) + ((plldiv & 1) * 25000000); | 51 | zbbus = ((plldiv >> 1) * 50000000) + ((plldiv & 1) * 25000000); |
52 | clocksource_set_clock(cs, zbbus); | 52 | clocksource_register_hz(cs, zbbus); |
53 | clocksource_register(cs); | ||
54 | } | 53 | } |
diff --git a/arch/mips/kernel/csrc-ioasic.c b/arch/mips/kernel/csrc-ioasic.c index 23da108506b0..46bd7fa98d6c 100644 --- a/arch/mips/kernel/csrc-ioasic.c +++ b/arch/mips/kernel/csrc-ioasic.c | |||
@@ -59,7 +59,5 @@ void __init dec_ioasic_clocksource_init(void) | |||
59 | printk(KERN_INFO "I/O ASIC clock frequency %dHz\n", freq); | 59 | printk(KERN_INFO "I/O ASIC clock frequency %dHz\n", freq); |
60 | 60 | ||
61 | clocksource_dec.rating = 200 + freq / 10000000; | 61 | clocksource_dec.rating = 200 + freq / 10000000; |
62 | clocksource_set_clock(&clocksource_dec, freq); | 62 | clocksource_register_hz(&clocksource_dec, freq); |
63 | |||
64 | clocksource_register(&clocksource_dec); | ||
65 | } | 63 | } |
diff --git a/arch/mips/kernel/csrc-powertv.c b/arch/mips/kernel/csrc-powertv.c index a27c16c8690e..2e7c5232da8d 100644 --- a/arch/mips/kernel/csrc-powertv.c +++ b/arch/mips/kernel/csrc-powertv.c | |||
@@ -78,9 +78,7 @@ static void __init powertv_c0_hpt_clocksource_init(void) | |||
78 | 78 | ||
79 | clocksource_mips.rating = 200 + mips_hpt_frequency / 10000000; | 79 | clocksource_mips.rating = 200 + mips_hpt_frequency / 10000000; |
80 | 80 | ||
81 | clocksource_set_clock(&clocksource_mips, mips_hpt_frequency); | 81 | clocksource_register_hz(&clocksource_mips, mips_hpt_frequency); |
82 | |||
83 | clocksource_register(&clocksource_mips); | ||
84 | } | 82 | } |
85 | 83 | ||
86 | /** | 84 | /** |
@@ -130,43 +128,16 @@ static struct clocksource clocksource_tim_c = { | |||
130 | /** | 128 | /** |
131 | * powertv_tim_c_clocksource_init - set up a clock source for the TIM_C clock | 129 | * powertv_tim_c_clocksource_init - set up a clock source for the TIM_C clock |
132 | * | 130 | * |
133 | * The hard part here is coming up with a constant k and shift s such that | ||
134 | * the 48-bit TIM_C value multiplied by k doesn't overflow and that value, | ||
135 | * when shifted right by s, yields the corresponding number of nanoseconds. | ||
136 | * We know that TIM_C counts at 27 MHz/8, so each cycle corresponds to | 131 | * We know that TIM_C counts at 27 MHz/8, so each cycle corresponds to |
137 | * 1 / (27,000,000/8) seconds. Multiply that by a billion and you get the | 132 | * 1 / (27,000,000/8) seconds. |
138 | * number of nanoseconds. Since the TIM_C value has 48 bits and the math is | ||
139 | * done in 64 bits, avoiding an overflow means that k must be less than | ||
140 | * 64 - 48 = 16 bits. | ||
141 | */ | 133 | */ |
142 | static void __init powertv_tim_c_clocksource_init(void) | 134 | static void __init powertv_tim_c_clocksource_init(void) |
143 | { | 135 | { |
144 | int prescale; | ||
145 | unsigned long dividend; | ||
146 | unsigned long k; | ||
147 | int s; | ||
148 | const int max_k_bits = (64 - 48) - 1; | ||
149 | const unsigned long billion = 1000000000; | ||
150 | const unsigned long counts_per_second = 27000000 / 8; | 136 | const unsigned long counts_per_second = 27000000 / 8; |
151 | 137 | ||
152 | prescale = BITS_PER_LONG - ilog2(billion) - 1; | ||
153 | dividend = billion << prescale; | ||
154 | k = dividend / counts_per_second; | ||
155 | s = ilog2(k) - max_k_bits; | ||
156 | |||
157 | if (s < 0) | ||
158 | s = prescale; | ||
159 | |||
160 | else { | ||
161 | k >>= s; | ||
162 | s += prescale; | ||
163 | } | ||
164 | |||
165 | clocksource_tim_c.mult = k; | ||
166 | clocksource_tim_c.shift = s; | ||
167 | clocksource_tim_c.rating = 200; | 138 | clocksource_tim_c.rating = 200; |
168 | 139 | ||
169 | clocksource_register(&clocksource_tim_c); | 140 | clocksource_register_hz(&clocksource_tim_c, counts_per_second); |
170 | tim_c = (struct tim_c *) asic_reg_addr(tim_ch); | 141 | tim_c = (struct tim_c *) asic_reg_addr(tim_ch); |
171 | } | 142 | } |
172 | 143 | ||
diff --git a/arch/mips/kernel/csrc-r4k.c b/arch/mips/kernel/csrc-r4k.c index e95a3cd48eea..decd1fa38d55 100644 --- a/arch/mips/kernel/csrc-r4k.c +++ b/arch/mips/kernel/csrc-r4k.c | |||
@@ -30,9 +30,7 @@ int __init init_r4k_clocksource(void) | |||
30 | /* Calculate a somewhat reasonable rating value */ | 30 | /* Calculate a somewhat reasonable rating value */ |
31 | clocksource_mips.rating = 200 + mips_hpt_frequency / 10000000; | 31 | clocksource_mips.rating = 200 + mips_hpt_frequency / 10000000; |
32 | 32 | ||
33 | clocksource_set_clock(&clocksource_mips, mips_hpt_frequency); | 33 | clocksource_register_hz(&clocksource_mips, mips_hpt_frequency); |
34 | |||
35 | clocksource_register(&clocksource_mips); | ||
36 | 34 | ||
37 | return 0; | 35 | return 0; |
38 | } | 36 | } |
diff --git a/arch/mips/kernel/csrc-sb1250.c b/arch/mips/kernel/csrc-sb1250.c index d14d3d1907fa..e9606d907685 100644 --- a/arch/mips/kernel/csrc-sb1250.c +++ b/arch/mips/kernel/csrc-sb1250.c | |||
@@ -65,6 +65,5 @@ void __init sb1250_clocksource_init(void) | |||
65 | IOADDR(A_SCD_TIMER_REGISTER(SB1250_HPT_NUM, | 65 | IOADDR(A_SCD_TIMER_REGISTER(SB1250_HPT_NUM, |
66 | R_SCD_TIMER_CFG))); | 66 | R_SCD_TIMER_CFG))); |
67 | 67 | ||
68 | clocksource_set_clock(cs, V_SCD_TIMER_FREQ); | 68 | clocksource_register_hz(cs, V_SCD_TIMER_FREQ); |
69 | clocksource_register(cs); | ||
70 | } | 69 | } |
diff --git a/arch/mips/loongson/common/cs5536/cs5536_mfgpt.c b/arch/mips/loongson/common/cs5536/cs5536_mfgpt.c index 8c807c965199..0cb1b9760e34 100644 --- a/arch/mips/loongson/common/cs5536/cs5536_mfgpt.c +++ b/arch/mips/loongson/common/cs5536/cs5536_mfgpt.c | |||
@@ -201,8 +201,6 @@ static struct clocksource clocksource_mfgpt = { | |||
201 | .rating = 120, /* Functional for real use, but not desired */ | 201 | .rating = 120, /* Functional for real use, but not desired */ |
202 | .read = mfgpt_read, | 202 | .read = mfgpt_read, |
203 | .mask = CLOCKSOURCE_MASK(32), | 203 | .mask = CLOCKSOURCE_MASK(32), |
204 | .mult = 0, | ||
205 | .shift = 22, | ||
206 | }; | 204 | }; |
207 | 205 | ||
208 | int __init init_mfgpt_clocksource(void) | 206 | int __init init_mfgpt_clocksource(void) |
@@ -210,8 +208,7 @@ int __init init_mfgpt_clocksource(void) | |||
210 | if (num_possible_cpus() > 1) /* MFGPT does not scale! */ | 208 | if (num_possible_cpus() > 1) /* MFGPT does not scale! */ |
211 | return 0; | 209 | return 0; |
212 | 210 | ||
213 | clocksource_mfgpt.mult = clocksource_hz2mult(MFGPT_TICK_RATE, 22); | 211 | return clocksource_register_hz(&clocksource_mfgpt, MFGPT_TICK_RATE); |
214 | return clocksource_register(&clocksource_mfgpt); | ||
215 | } | 212 | } |
216 | 213 | ||
217 | arch_initcall(init_mfgpt_clocksource); | 214 | arch_initcall(init_mfgpt_clocksource); |
diff --git a/arch/mips/sgi-ip27/ip27-timer.c b/arch/mips/sgi-ip27/ip27-timer.c index a152538d3c97..8d0d2690e962 100644 --- a/arch/mips/sgi-ip27/ip27-timer.c +++ b/arch/mips/sgi-ip27/ip27-timer.c | |||
@@ -174,8 +174,7 @@ static void __init hub_rt_clocksource_init(void) | |||
174 | { | 174 | { |
175 | struct clocksource *cs = &hub_rt_clocksource; | 175 | struct clocksource *cs = &hub_rt_clocksource; |
176 | 176 | ||
177 | clocksource_set_clock(cs, CYCLES_PER_SEC); | 177 | clocksource_register_hz(cs, CYCLES_PER_SEC); |
178 | clocksource_register(cs); | ||
179 | } | 178 | } |
180 | 179 | ||
181 | void __init plat_time_init(void) | 180 | void __init plat_time_init(void) |
diff --git a/arch/x86/kernel/apb_timer.c b/arch/x86/kernel/apb_timer.c index cd1ffed4ee22..289e92862fd9 100644 --- a/arch/x86/kernel/apb_timer.c +++ b/arch/x86/kernel/apb_timer.c | |||
@@ -177,7 +177,6 @@ static struct clocksource clocksource_apbt = { | |||
177 | .rating = APBT_CLOCKSOURCE_RATING, | 177 | .rating = APBT_CLOCKSOURCE_RATING, |
178 | .read = apbt_read_clocksource, | 178 | .read = apbt_read_clocksource, |
179 | .mask = APBT_MASK, | 179 | .mask = APBT_MASK, |
180 | .shift = APBT_SHIFT, | ||
181 | .flags = CLOCK_SOURCE_IS_CONTINUOUS, | 180 | .flags = CLOCK_SOURCE_IS_CONTINUOUS, |
182 | .resume = apbt_restart_clocksource, | 181 | .resume = apbt_restart_clocksource, |
183 | }; | 182 | }; |
@@ -543,14 +542,7 @@ static int apbt_clocksource_register(void) | |||
543 | if (t1 == apbt_read_clocksource(&clocksource_apbt)) | 542 | if (t1 == apbt_read_clocksource(&clocksource_apbt)) |
544 | panic("APBT counter not counting. APBT disabled\n"); | 543 | panic("APBT counter not counting. APBT disabled\n"); |
545 | 544 | ||
546 | /* | 545 | clocksource_register_khz(&clocksource_apbt, (u32)apbt_freq*1000); |
547 | * initialize and register APBT clocksource | ||
548 | * convert that to ns/clock cycle | ||
549 | * mult = (ns/c) * 2^APBT_SHIFT | ||
550 | */ | ||
551 | clocksource_apbt.mult = div_sc(MSEC_PER_SEC, | ||
552 | (unsigned long) apbt_freq, APBT_SHIFT); | ||
553 | clocksource_register(&clocksource_apbt); | ||
554 | 546 | ||
555 | return 0; | 547 | return 0; |
556 | } | 548 | } |
diff --git a/arch/x86/kernel/i8253.c b/arch/x86/kernel/i8253.c index b904dfbf6dbc..577e90cadaeb 100644 --- a/arch/x86/kernel/i8253.c +++ b/arch/x86/kernel/i8253.c | |||
@@ -133,5 +133,4 @@ static int __init init_pit_clocksource(void) | |||
133 | return clocksource_i8253_init(); | 133 | return clocksource_i8253_init(); |
134 | } | 134 | } |
135 | arch_initcall(init_pit_clocksource); | 135 | arch_initcall(init_pit_clocksource); |
136 | |||
137 | #endif /* !CONFIG_X86_64 */ | 136 | #endif /* !CONFIG_X86_64 */ |
diff --git a/arch/x86/kernel/kvmclock.c b/arch/x86/kernel/kvmclock.c index f98d3eafe07a..6389a6bca11b 100644 --- a/arch/x86/kernel/kvmclock.c +++ b/arch/x86/kernel/kvmclock.c | |||
@@ -26,8 +26,6 @@ | |||
26 | #include <asm/x86_init.h> | 26 | #include <asm/x86_init.h> |
27 | #include <asm/reboot.h> | 27 | #include <asm/reboot.h> |
28 | 28 | ||
29 | #define KVM_SCALE 22 | ||
30 | |||
31 | static int kvmclock = 1; | 29 | static int kvmclock = 1; |
32 | static int msr_kvm_system_time = MSR_KVM_SYSTEM_TIME; | 30 | static int msr_kvm_system_time = MSR_KVM_SYSTEM_TIME; |
33 | static int msr_kvm_wall_clock = MSR_KVM_WALL_CLOCK; | 31 | static int msr_kvm_wall_clock = MSR_KVM_WALL_CLOCK; |
@@ -120,8 +118,6 @@ static struct clocksource kvm_clock = { | |||
120 | .read = kvm_clock_get_cycles, | 118 | .read = kvm_clock_get_cycles, |
121 | .rating = 400, | 119 | .rating = 400, |
122 | .mask = CLOCKSOURCE_MASK(64), | 120 | .mask = CLOCKSOURCE_MASK(64), |
123 | .mult = 1 << KVM_SCALE, | ||
124 | .shift = KVM_SCALE, | ||
125 | .flags = CLOCK_SOURCE_IS_CONTINUOUS, | 121 | .flags = CLOCK_SOURCE_IS_CONTINUOUS, |
126 | }; | 122 | }; |
127 | 123 | ||
@@ -203,7 +199,7 @@ void __init kvmclock_init(void) | |||
203 | machine_ops.crash_shutdown = kvm_crash_shutdown; | 199 | machine_ops.crash_shutdown = kvm_crash_shutdown; |
204 | #endif | 200 | #endif |
205 | kvm_get_preset_lpj(); | 201 | kvm_get_preset_lpj(); |
206 | clocksource_register(&kvm_clock); | 202 | clocksource_register_hz(&kvm_clock, NSEC_PER_SEC); |
207 | pv_info.paravirt_enabled = 1; | 203 | pv_info.paravirt_enabled = 1; |
208 | pv_info.name = "KVM"; | 204 | pv_info.name = "KVM"; |
209 | 205 | ||
diff --git a/arch/x86/lguest/boot.c b/arch/x86/lguest/boot.c index 1cd608973ce5..4e0068ead6b4 100644 --- a/arch/x86/lguest/boot.c +++ b/arch/x86/lguest/boot.c | |||
@@ -913,8 +913,6 @@ static struct clocksource lguest_clock = { | |||
913 | .rating = 200, | 913 | .rating = 200, |
914 | .read = lguest_clock_read, | 914 | .read = lguest_clock_read, |
915 | .mask = CLOCKSOURCE_MASK(64), | 915 | .mask = CLOCKSOURCE_MASK(64), |
916 | .mult = 1 << 22, | ||
917 | .shift = 22, | ||
918 | .flags = CLOCK_SOURCE_IS_CONTINUOUS, | 916 | .flags = CLOCK_SOURCE_IS_CONTINUOUS, |
919 | }; | 917 | }; |
920 | 918 | ||
@@ -997,7 +995,7 @@ static void lguest_time_init(void) | |||
997 | /* Set up the timer interrupt (0) to go to our simple timer routine */ | 995 | /* Set up the timer interrupt (0) to go to our simple timer routine */ |
998 | irq_set_handler(0, lguest_time_irq); | 996 | irq_set_handler(0, lguest_time_irq); |
999 | 997 | ||
1000 | clocksource_register(&lguest_clock); | 998 | clocksource_register_hz(&lguest_clock, NSEC_PER_SEC); |
1001 | 999 | ||
1002 | /* We can't set cpumask in the initializer: damn C limitations! Set it | 1000 | /* We can't set cpumask in the initializer: damn C limitations! Set it |
1003 | * here and register our timer device. */ | 1001 | * here and register our timer device. */ |
diff --git a/arch/x86/platform/uv/uv_time.c b/arch/x86/platform/uv/uv_time.c index 9daf5d1af9f1..0eb90184515f 100644 --- a/arch/x86/platform/uv/uv_time.c +++ b/arch/x86/platform/uv/uv_time.c | |||
@@ -40,7 +40,6 @@ static struct clocksource clocksource_uv = { | |||
40 | .rating = 400, | 40 | .rating = 400, |
41 | .read = uv_read_rtc, | 41 | .read = uv_read_rtc, |
42 | .mask = (cycle_t)UVH_RTC_REAL_TIME_CLOCK_MASK, | 42 | .mask = (cycle_t)UVH_RTC_REAL_TIME_CLOCK_MASK, |
43 | .shift = 10, | ||
44 | .flags = CLOCK_SOURCE_IS_CONTINUOUS, | 43 | .flags = CLOCK_SOURCE_IS_CONTINUOUS, |
45 | }; | 44 | }; |
46 | 45 | ||
@@ -372,14 +371,11 @@ static __init int uv_rtc_setup_clock(void) | |||
372 | if (!is_uv_system()) | 371 | if (!is_uv_system()) |
373 | return -ENODEV; | 372 | return -ENODEV; |
374 | 373 | ||
375 | clocksource_uv.mult = clocksource_hz2mult(sn_rtc_cycles_per_second, | ||
376 | clocksource_uv.shift); | ||
377 | |||
378 | /* If single blade, prefer tsc */ | 374 | /* If single blade, prefer tsc */ |
379 | if (uv_num_possible_blades() == 1) | 375 | if (uv_num_possible_blades() == 1) |
380 | clocksource_uv.rating = 250; | 376 | clocksource_uv.rating = 250; |
381 | 377 | ||
382 | rc = clocksource_register(&clocksource_uv); | 378 | rc = clocksource_register_hz(&clocksource_uv, sn_rtc_cycles_per_second); |
383 | if (rc) | 379 | if (rc) |
384 | printk(KERN_INFO "UV RTC clocksource failed rc %d\n", rc); | 380 | printk(KERN_INFO "UV RTC clocksource failed rc %d\n", rc); |
385 | else | 381 | else |
diff --git a/arch/x86/xen/time.c b/arch/x86/xen/time.c index 2e2d370a47b1..c532d280ce36 100644 --- a/arch/x86/xen/time.c +++ b/arch/x86/xen/time.c | |||
@@ -26,8 +26,6 @@ | |||
26 | 26 | ||
27 | #include "xen-ops.h" | 27 | #include "xen-ops.h" |
28 | 28 | ||
29 | #define XEN_SHIFT 22 | ||
30 | |||
31 | /* Xen may fire a timer up to this many ns early */ | 29 | /* Xen may fire a timer up to this many ns early */ |
32 | #define TIMER_SLOP 100000 | 30 | #define TIMER_SLOP 100000 |
33 | #define NS_PER_TICK (1000000000LL / HZ) | 31 | #define NS_PER_TICK (1000000000LL / HZ) |
@@ -211,8 +209,6 @@ static struct clocksource xen_clocksource __read_mostly = { | |||
211 | .rating = 400, | 209 | .rating = 400, |
212 | .read = xen_clocksource_get_cycles, | 210 | .read = xen_clocksource_get_cycles, |
213 | .mask = ~0, | 211 | .mask = ~0, |
214 | .mult = 1<<XEN_SHIFT, /* time directly in nanoseconds */ | ||
215 | .shift = XEN_SHIFT, | ||
216 | .flags = CLOCK_SOURCE_IS_CONTINUOUS, | 212 | .flags = CLOCK_SOURCE_IS_CONTINUOUS, |
217 | }; | 213 | }; |
218 | 214 | ||
@@ -448,7 +444,7 @@ static __init void xen_time_init(void) | |||
448 | int cpu = smp_processor_id(); | 444 | int cpu = smp_processor_id(); |
449 | struct timespec tp; | 445 | struct timespec tp; |
450 | 446 | ||
451 | clocksource_register(&xen_clocksource); | 447 | clocksource_register_hz(&xen_clocksource, NSEC_PER_SEC); |
452 | 448 | ||
453 | if (HYPERVISOR_vcpu_op(VCPUOP_stop_periodic_timer, cpu, NULL) == 0) { | 449 | if (HYPERVISOR_vcpu_op(VCPUOP_stop_periodic_timer, cpu, NULL) == 0) { |
454 | /* Successfully turned off 100Hz tick, so we have the | 450 | /* Successfully turned off 100Hz tick, so we have the |
diff --git a/drivers/char/hpet.c b/drivers/char/hpet.c index 7066e801b9d3..051474c65b78 100644 --- a/drivers/char/hpet.c +++ b/drivers/char/hpet.c | |||
@@ -84,8 +84,6 @@ static struct clocksource clocksource_hpet = { | |||
84 | .rating = 250, | 84 | .rating = 250, |
85 | .read = read_hpet, | 85 | .read = read_hpet, |
86 | .mask = CLOCKSOURCE_MASK(64), | 86 | .mask = CLOCKSOURCE_MASK(64), |
87 | .mult = 0, /* to be calculated */ | ||
88 | .shift = 10, | ||
89 | .flags = CLOCK_SOURCE_IS_CONTINUOUS, | 87 | .flags = CLOCK_SOURCE_IS_CONTINUOUS, |
90 | }; | 88 | }; |
91 | static struct clocksource *hpet_clocksource; | 89 | static struct clocksource *hpet_clocksource; |
@@ -934,9 +932,7 @@ int hpet_alloc(struct hpet_data *hdp) | |||
934 | if (!hpet_clocksource) { | 932 | if (!hpet_clocksource) { |
935 | hpet_mctr = (void __iomem *)&hpetp->hp_hpet->hpet_mc; | 933 | hpet_mctr = (void __iomem *)&hpetp->hp_hpet->hpet_mc; |
936 | CLKSRC_FSYS_MMIO_SET(clocksource_hpet.fsys_mmio, hpet_mctr); | 934 | CLKSRC_FSYS_MMIO_SET(clocksource_hpet.fsys_mmio, hpet_mctr); |
937 | clocksource_hpet.mult = clocksource_hz2mult(hpetp->hp_tick_freq, | 935 | clocksource_register_hz(&clocksource_hpet, hpetp->hp_tick_freq); |
938 | clocksource_hpet.shift); | ||
939 | clocksource_register(&clocksource_hpet); | ||
940 | hpetp->hp_clocksource = &clocksource_hpet; | 936 | hpetp->hp_clocksource = &clocksource_hpet; |
941 | hpet_clocksource = &clocksource_hpet; | 937 | hpet_clocksource = &clocksource_hpet; |
942 | } | 938 | } |
diff --git a/drivers/clocksource/cyclone.c b/drivers/clocksource/cyclone.c index 64e528e8bfa6..72f811f73e9c 100644 --- a/drivers/clocksource/cyclone.c +++ b/drivers/clocksource/cyclone.c | |||
@@ -29,8 +29,6 @@ static struct clocksource clocksource_cyclone = { | |||
29 | .rating = 250, | 29 | .rating = 250, |
30 | .read = read_cyclone, | 30 | .read = read_cyclone, |
31 | .mask = CYCLONE_TIMER_MASK, | 31 | .mask = CYCLONE_TIMER_MASK, |
32 | .mult = 10, | ||
33 | .shift = 0, | ||
34 | .flags = CLOCK_SOURCE_IS_CONTINUOUS, | 32 | .flags = CLOCK_SOURCE_IS_CONTINUOUS, |
35 | }; | 33 | }; |
36 | 34 | ||
@@ -108,12 +106,8 @@ static int __init init_cyclone_clocksource(void) | |||
108 | } | 106 | } |
109 | cyclone_ptr = cyclone_timer; | 107 | cyclone_ptr = cyclone_timer; |
110 | 108 | ||
111 | /* sort out mult/shift values: */ | 109 | return clocksource_register_hz(&clocksource_cyclone, |
112 | clocksource_cyclone.shift = 22; | 110 | CYCLONE_TIMER_FREQ); |
113 | clocksource_cyclone.mult = clocksource_hz2mult(CYCLONE_TIMER_FREQ, | ||
114 | clocksource_cyclone.shift); | ||
115 | |||
116 | return clocksource_register(&clocksource_cyclone); | ||
117 | } | 111 | } |
118 | 112 | ||
119 | arch_initcall(init_cyclone_clocksource); | 113 | arch_initcall(init_cyclone_clocksource); |
diff --git a/include/linux/clocksource.h b/include/linux/clocksource.h index f13469b3df86..0fb0b7e79394 100644 --- a/include/linux/clocksource.h +++ b/include/linux/clocksource.h | |||
@@ -161,7 +161,7 @@ struct clocksource { | |||
161 | /* | 161 | /* |
162 | * First part of structure is read mostly | 162 | * First part of structure is read mostly |
163 | */ | 163 | */ |
164 | char *name; | 164 | const char *name; |
165 | struct list_head list; | 165 | struct list_head list; |
166 | int rating; | 166 | int rating; |
167 | cycle_t (*read)(struct clocksource *cs); | 167 | cycle_t (*read)(struct clocksource *cs); |