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-rw-r--r--drivers/gpu/drm/i915/i915_debugfs.c3
-rw-r--r--drivers/gpu/drm/i915/i915_drv.h1
-rw-r--r--drivers/gpu/drm/i915/intel_display.c15
3 files changed, 19 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
index aee83fa178f6..9214119c0154 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -605,6 +605,9 @@ static int i915_fbc_status(struct seq_file *m, void *unused)
605 case FBC_NOT_TILED: 605 case FBC_NOT_TILED:
606 seq_printf(m, "scanout buffer not tiled"); 606 seq_printf(m, "scanout buffer not tiled");
607 break; 607 break;
608 case FBC_MULTIPLE_PIPES:
609 seq_printf(m, "multiple pipes are enabled");
610 break;
608 default: 611 default:
609 seq_printf(m, "unknown reason"); 612 seq_printf(m, "unknown reason");
610 } 613 }
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index d147ab2f5bfc..1d82de1618ab 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -215,6 +215,7 @@ enum no_fbc_reason {
215 FBC_MODE_TOO_LARGE, /* mode too large for compression */ 215 FBC_MODE_TOO_LARGE, /* mode too large for compression */
216 FBC_BAD_PLANE, /* fbc not supported on plane */ 216 FBC_BAD_PLANE, /* fbc not supported on plane */
217 FBC_NOT_TILED, /* buffer not tiled */ 217 FBC_NOT_TILED, /* buffer not tiled */
218 FBC_MULTIPLE_PIPES, /* more than one pipe active */
218}; 219};
219 220
220enum intel_pch { 221enum intel_pch {
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index a37d4cea98a6..30d8dafb388d 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -1180,8 +1180,12 @@ static void intel_update_fbc(struct drm_crtc *crtc,
1180 struct drm_framebuffer *fb = crtc->fb; 1180 struct drm_framebuffer *fb = crtc->fb;
1181 struct intel_framebuffer *intel_fb; 1181 struct intel_framebuffer *intel_fb;
1182 struct drm_i915_gem_object *obj_priv; 1182 struct drm_i915_gem_object *obj_priv;
1183 struct drm_crtc *tmp_crtc;
1183 struct intel_crtc *intel_crtc = to_intel_crtc(crtc); 1184 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
1184 int plane = intel_crtc->plane; 1185 int plane = intel_crtc->plane;
1186 int crtcs_enabled = 0;
1187
1188 DRM_DEBUG_KMS("\n");
1185 1189
1186 if (!i915_powersave) 1190 if (!i915_powersave)
1187 return; 1191 return;
@@ -1199,10 +1203,21 @@ static void intel_update_fbc(struct drm_crtc *crtc,
1199 * If FBC is already on, we just have to verify that we can 1203 * If FBC is already on, we just have to verify that we can
1200 * keep it that way... 1204 * keep it that way...
1201 * Need to disable if: 1205 * Need to disable if:
1206 * - more than one pipe is active
1202 * - changing FBC params (stride, fence, mode) 1207 * - changing FBC params (stride, fence, mode)
1203 * - new fb is too large to fit in compressed buffer 1208 * - new fb is too large to fit in compressed buffer
1204 * - going to an unsupported config (interlace, pixel multiply, etc.) 1209 * - going to an unsupported config (interlace, pixel multiply, etc.)
1205 */ 1210 */
1211 list_for_each_entry(tmp_crtc, &dev->mode_config.crtc_list, head) {
1212 if (tmp_crtc->enabled)
1213 crtcs_enabled++;
1214 }
1215 DRM_DEBUG_KMS("%d pipes active\n", crtcs_enabled);
1216 if (crtcs_enabled > 1) {
1217 DRM_DEBUG_KMS("more than one pipe active, disabling compression\n");
1218 dev_priv->no_fbc_reason = FBC_MULTIPLE_PIPES;
1219 goto out_disable;
1220 }
1206 if (intel_fb->obj->size > dev_priv->cfb_size) { 1221 if (intel_fb->obj->size > dev_priv->cfb_size) {
1207 DRM_DEBUG_KMS("framebuffer too large, disabling " 1222 DRM_DEBUG_KMS("framebuffer too large, disabling "
1208 "compression\n"); 1223 "compression\n");