diff options
-rw-r--r-- | drivers/gpu/drm/i915/i915_dma.c | 4 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/i915_drv.c | 1 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/i915_reg.h | 10 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/intel_display.c | 8 |
4 files changed, 20 insertions, 3 deletions
diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c index e9fb8953c606..3f7b20392e26 100644 --- a/drivers/gpu/drm/i915/i915_dma.c +++ b/drivers/gpu/drm/i915/i915_dma.c | |||
@@ -1078,7 +1078,7 @@ static void i915_setup_compression(struct drm_device *dev, int size) | |||
1078 | if (!cfb_base) | 1078 | if (!cfb_base) |
1079 | goto err_fb; | 1079 | goto err_fb; |
1080 | 1080 | ||
1081 | if (!(IS_GM45(dev) || IS_IRONLAKE_M(dev))) { | 1081 | if (!(IS_GM45(dev) || HAS_PCH_SPLIT(dev))) { |
1082 | compressed_llb = drm_mm_search_free(&dev_priv->mm.stolen, | 1082 | compressed_llb = drm_mm_search_free(&dev_priv->mm.stolen, |
1083 | 4096, 4096, 0); | 1083 | 4096, 4096, 0); |
1084 | if (compressed_llb) | 1084 | if (compressed_llb) |
@@ -1096,7 +1096,7 @@ static void i915_setup_compression(struct drm_device *dev, int size) | |||
1096 | 1096 | ||
1097 | intel_disable_fbc(dev); | 1097 | intel_disable_fbc(dev); |
1098 | dev_priv->compressed_fb = compressed_fb; | 1098 | dev_priv->compressed_fb = compressed_fb; |
1099 | if (IS_IRONLAKE_M(dev)) | 1099 | if (HAS_PCH_SPLIT(dev)) |
1100 | I915_WRITE(ILK_DPFC_CB_BASE, compressed_fb->start); | 1100 | I915_WRITE(ILK_DPFC_CB_BASE, compressed_fb->start); |
1101 | else if (IS_GM45(dev)) { | 1101 | else if (IS_GM45(dev)) { |
1102 | I915_WRITE(DPFC_CB_BASE, compressed_fb->start); | 1102 | I915_WRITE(DPFC_CB_BASE, compressed_fb->start); |
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c index 5f20cd988612..bdb29b2a01ed 100644 --- a/drivers/gpu/drm/i915/i915_drv.c +++ b/drivers/gpu/drm/i915/i915_drv.c | |||
@@ -165,6 +165,7 @@ static const struct intel_device_info intel_sandybridge_d_info = { | |||
165 | static const struct intel_device_info intel_sandybridge_m_info = { | 165 | static const struct intel_device_info intel_sandybridge_m_info = { |
166 | .gen = 6, .is_mobile = 1, | 166 | .gen = 6, .is_mobile = 1, |
167 | .need_gfx_hws = 1, .has_hotplug = 1, | 167 | .need_gfx_hws = 1, .has_hotplug = 1, |
168 | .has_fbc = 1, | ||
168 | .has_bsd_ring = 1, | 169 | .has_bsd_ring = 1, |
169 | .has_blt_ring = 1, | 170 | .has_blt_ring = 1, |
170 | }; | 171 | }; |
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 61ef98db9ff0..820e9dfaadc7 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h | |||
@@ -600,6 +600,16 @@ | |||
600 | 600 | ||
601 | 601 | ||
602 | /* | 602 | /* |
603 | * Framebuffer compression for Sandybridge | ||
604 | * | ||
605 | * The following two registers are of type GTTMMADR | ||
606 | */ | ||
607 | #define SNB_DPFC_CTL_SA 0x100100 | ||
608 | #define SNB_CPU_FENCE_ENABLE (1<<29) | ||
609 | #define DPFC_CPU_FENCE_OFFSET 0x100104 | ||
610 | |||
611 | |||
612 | /* | ||
603 | * GPIO regs | 613 | * GPIO regs |
604 | */ | 614 | */ |
605 | #define GPIOA 0x5010 | 615 | #define GPIOA 0x5010 |
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index eaf2bc6b537d..8645a974a499 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c | |||
@@ -1262,6 +1262,12 @@ static void ironlake_enable_fbc(struct drm_crtc *crtc, unsigned long interval) | |||
1262 | /* enable it... */ | 1262 | /* enable it... */ |
1263 | I915_WRITE(ILK_DPFC_CONTROL, dpfc_ctl | DPFC_CTL_EN); | 1263 | I915_WRITE(ILK_DPFC_CONTROL, dpfc_ctl | DPFC_CTL_EN); |
1264 | 1264 | ||
1265 | if (IS_GEN6(dev)) { | ||
1266 | I915_WRITE(SNB_DPFC_CTL_SA, | ||
1267 | SNB_CPU_FENCE_ENABLE | dev_priv->cfb_fence); | ||
1268 | I915_WRITE(DPFC_CPU_FENCE_OFFSET, crtc->y); | ||
1269 | } | ||
1270 | |||
1265 | DRM_DEBUG_KMS("enabled fbc on plane %d\n", intel_crtc->plane); | 1271 | DRM_DEBUG_KMS("enabled fbc on plane %d\n", intel_crtc->plane); |
1266 | } | 1272 | } |
1267 | 1273 | ||
@@ -6395,7 +6401,7 @@ static void intel_init_display(struct drm_device *dev) | |||
6395 | dev_priv->display.dpms = i9xx_crtc_dpms; | 6401 | dev_priv->display.dpms = i9xx_crtc_dpms; |
6396 | 6402 | ||
6397 | if (I915_HAS_FBC(dev)) { | 6403 | if (I915_HAS_FBC(dev)) { |
6398 | if (IS_IRONLAKE_M(dev)) { | 6404 | if (HAS_PCH_SPLIT(dev)) { |
6399 | dev_priv->display.fbc_enabled = ironlake_fbc_enabled; | 6405 | dev_priv->display.fbc_enabled = ironlake_fbc_enabled; |
6400 | dev_priv->display.enable_fbc = ironlake_enable_fbc; | 6406 | dev_priv->display.enable_fbc = ironlake_enable_fbc; |
6401 | dev_priv->display.disable_fbc = ironlake_disable_fbc; | 6407 | dev_priv->display.disable_fbc = ironlake_disable_fbc; |