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-rw-r--r--arch/x86/kernel/cpu/intel.c19
1 files changed, 11 insertions, 8 deletions
diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c
index 43c1dcf0bec7..549f2ada55f5 100644
--- a/arch/x86/kernel/cpu/intel.c
+++ b/arch/x86/kernel/cpu/intel.c
@@ -29,14 +29,17 @@
29 29
30static void __cpuinit early_init_intel(struct cpuinfo_x86 *c) 30static void __cpuinit early_init_intel(struct cpuinfo_x86 *c)
31{ 31{
32 u64 misc_enable; 32 /* Unmask CPUID levels if masked: */
33 33 if (c->x86 == 6 && c->x86_model >= 15) {
34 /* Unmask CPUID levels if masked */ 34 u64 misc_enable;
35 if (!rdmsrl_safe(MSR_IA32_MISC_ENABLE, &misc_enable) && 35
36 (misc_enable & MSR_IA32_MISC_ENABLE_LIMIT_CPUID)) { 36 rdmsrl(MSR_IA32_MISC_ENABLE, misc_enable);
37 misc_enable &= ~MSR_IA32_MISC_ENABLE_LIMIT_CPUID; 37
38 wrmsrl(MSR_IA32_MISC_ENABLE, misc_enable); 38 if (misc_enable & MSR_IA32_MISC_ENABLE_LIMIT_CPUID) {
39 c->cpuid_level = cpuid_eax(0); 39 misc_enable &= ~MSR_IA32_MISC_ENABLE_LIMIT_CPUID;
40 wrmsrl(MSR_IA32_MISC_ENABLE, misc_enable);
41 c->cpuid_level = cpuid_eax(0);
42 }
40 } 43 }
41 44
42 if ((c->x86 == 0xf && c->x86_model >= 0x03) || 45 if ((c->x86 == 0xf && c->x86_model >= 0x03) ||