diff options
| -rw-r--r-- | arch/parisc/include/asm/pgtable.h | 14 | ||||
| -rw-r--r-- | arch/parisc/kernel/entry.S | 61 |
2 files changed, 7 insertions, 68 deletions
diff --git a/arch/parisc/include/asm/pgtable.h b/arch/parisc/include/asm/pgtable.h index 865f37a8a881..f3c09737e89c 100644 --- a/arch/parisc/include/asm/pgtable.h +++ b/arch/parisc/include/asm/pgtable.h | |||
| @@ -136,8 +136,7 @@ | |||
| 136 | #define _PAGE_NO_CACHE_BIT 24 /* (0x080) Uncached Page (U bit) */ | 136 | #define _PAGE_NO_CACHE_BIT 24 /* (0x080) Uncached Page (U bit) */ |
| 137 | #define _PAGE_ACCESSED_BIT 23 /* (0x100) Software: Page Accessed */ | 137 | #define _PAGE_ACCESSED_BIT 23 /* (0x100) Software: Page Accessed */ |
| 138 | #define _PAGE_PRESENT_BIT 22 /* (0x200) Software: translation valid */ | 138 | #define _PAGE_PRESENT_BIT 22 /* (0x200) Software: translation valid */ |
| 139 | #define _PAGE_FLUSH_BIT 21 /* (0x400) Software: translation valid */ | 139 | /* bit 21 was formerly the FLUSH bit but is now unused */ |
| 140 | /* for cache flushing only */ | ||
| 141 | #define _PAGE_USER_BIT 20 /* (0x800) Software: User accessible page */ | 140 | #define _PAGE_USER_BIT 20 /* (0x800) Software: User accessible page */ |
| 142 | 141 | ||
| 143 | /* N.B. The bits are defined in terms of a 32 bit word above, so the */ | 142 | /* N.B. The bits are defined in terms of a 32 bit word above, so the */ |
| @@ -171,7 +170,6 @@ | |||
| 171 | #define _PAGE_NO_CACHE (1 << xlate_pabit(_PAGE_NO_CACHE_BIT)) | 170 | #define _PAGE_NO_CACHE (1 << xlate_pabit(_PAGE_NO_CACHE_BIT)) |
| 172 | #define _PAGE_ACCESSED (1 << xlate_pabit(_PAGE_ACCESSED_BIT)) | 171 | #define _PAGE_ACCESSED (1 << xlate_pabit(_PAGE_ACCESSED_BIT)) |
| 173 | #define _PAGE_PRESENT (1 << xlate_pabit(_PAGE_PRESENT_BIT)) | 172 | #define _PAGE_PRESENT (1 << xlate_pabit(_PAGE_PRESENT_BIT)) |
| 174 | #define _PAGE_FLUSH (1 << xlate_pabit(_PAGE_FLUSH_BIT)) | ||
| 175 | #define _PAGE_USER (1 << xlate_pabit(_PAGE_USER_BIT)) | 173 | #define _PAGE_USER (1 << xlate_pabit(_PAGE_USER_BIT)) |
| 176 | #define _PAGE_FILE (1 << xlate_pabit(_PAGE_FILE_BIT)) | 174 | #define _PAGE_FILE (1 << xlate_pabit(_PAGE_FILE_BIT)) |
| 177 | 175 | ||
| @@ -211,7 +209,6 @@ | |||
| 211 | #define PAGE_KERNEL_RO __pgprot(_PAGE_KERNEL & ~_PAGE_WRITE) | 209 | #define PAGE_KERNEL_RO __pgprot(_PAGE_KERNEL & ~_PAGE_WRITE) |
| 212 | #define PAGE_KERNEL_UNC __pgprot(_PAGE_KERNEL | _PAGE_NO_CACHE) | 210 | #define PAGE_KERNEL_UNC __pgprot(_PAGE_KERNEL | _PAGE_NO_CACHE) |
| 213 | #define PAGE_GATEWAY __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_ACCESSED | _PAGE_GATEWAY| _PAGE_READ) | 211 | #define PAGE_GATEWAY __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_ACCESSED | _PAGE_GATEWAY| _PAGE_READ) |
| 214 | #define PAGE_FLUSH __pgprot(_PAGE_FLUSH) | ||
| 215 | 212 | ||
| 216 | 213 | ||
| 217 | /* | 214 | /* |
| @@ -259,7 +256,7 @@ extern unsigned long *empty_zero_page; | |||
| 259 | 256 | ||
| 260 | #define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page)) | 257 | #define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page)) |
| 261 | 258 | ||
| 262 | #define pte_none(x) ((pte_val(x) == 0) || (pte_val(x) & _PAGE_FLUSH)) | 259 | #define pte_none(x) (pte_val(x) == 0) |
| 263 | #define pte_present(x) (pte_val(x) & _PAGE_PRESENT) | 260 | #define pte_present(x) (pte_val(x) & _PAGE_PRESENT) |
| 264 | #define pte_clear(mm,addr,xp) do { pte_val(*(xp)) = 0; } while (0) | 261 | #define pte_clear(mm,addr,xp) do { pte_val(*(xp)) = 0; } while (0) |
| 265 | 262 | ||
| @@ -442,13 +439,10 @@ struct mm_struct; | |||
| 442 | static inline pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep) | 439 | static inline pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep) |
| 443 | { | 440 | { |
| 444 | pte_t old_pte; | 441 | pte_t old_pte; |
| 445 | pte_t pte; | ||
| 446 | 442 | ||
| 447 | spin_lock(&pa_dbit_lock); | 443 | spin_lock(&pa_dbit_lock); |
| 448 | pte = old_pte = *ptep; | 444 | old_pte = *ptep; |
| 449 | pte_val(pte) &= ~_PAGE_PRESENT; | 445 | pte_clear(mm,addr,ptep); |
| 450 | pte_val(pte) |= _PAGE_FLUSH; | ||
| 451 | set_pte_at(mm,addr,ptep,pte); | ||
| 452 | spin_unlock(&pa_dbit_lock); | 446 | spin_unlock(&pa_dbit_lock); |
| 453 | 447 | ||
| 454 | return old_pte; | 448 | return old_pte; |
diff --git a/arch/parisc/kernel/entry.S b/arch/parisc/kernel/entry.S index e8c119b61fc7..e5477092a5d4 100644 --- a/arch/parisc/kernel/entry.S +++ b/arch/parisc/kernel/entry.S | |||
| @@ -1206,23 +1206,7 @@ nadtlb_miss_20w: | |||
| 1206 | nop | 1206 | nop |
| 1207 | 1207 | ||
| 1208 | nadtlb_check_alias_20w: | 1208 | nadtlb_check_alias_20w: |
| 1209 | do_alias spc,t0,t1,va,pte,prot,nadtlb_check_flush_20w | 1209 | do_alias spc,t0,t1,va,pte,prot,nadtlb_emulate |
| 1210 | |||
| 1211 | idtlbt pte,prot | ||
| 1212 | |||
| 1213 | rfir | ||
| 1214 | nop | ||
| 1215 | |||
| 1216 | nadtlb_check_flush_20w: | ||
| 1217 | bb,>=,n pte,_PAGE_FLUSH_BIT,nadtlb_emulate | ||
| 1218 | |||
| 1219 | /* Insert a "flush only" translation */ | ||
| 1220 | |||
| 1221 | depdi,z 7,7,3,prot | ||
| 1222 | depdi 1,10,1,prot | ||
| 1223 | |||
| 1224 | /* Drop prot bits from pte and convert to page addr for idtlbt */ | ||
| 1225 | convert_for_tlb_insert20 pte | ||
| 1226 | 1210 | ||
| 1227 | idtlbt pte,prot | 1211 | idtlbt pte,prot |
| 1228 | 1212 | ||
| @@ -1286,7 +1270,7 @@ nadtlb_miss_11: | |||
| 1286 | nop | 1270 | nop |
| 1287 | 1271 | ||
| 1288 | nadtlb_check_alias_11: | 1272 | nadtlb_check_alias_11: |
| 1289 | do_alias spc,t0,t1,va,pte,prot,nadtlb_check_flush_11 | 1273 | do_alias spc,t0,t1,va,pte,prot,nadtlb_emulate |
| 1290 | 1274 | ||
| 1291 | idtlba pte,(va) | 1275 | idtlba pte,(va) |
| 1292 | idtlbp prot,(va) | 1276 | idtlbp prot,(va) |
| @@ -1294,30 +1278,6 @@ nadtlb_check_alias_11: | |||
| 1294 | rfir | 1278 | rfir |
| 1295 | nop | 1279 | nop |
| 1296 | 1280 | ||
| 1297 | nadtlb_check_flush_11: | ||
| 1298 | bb,>=,n pte,_PAGE_FLUSH_BIT,nadtlb_emulate | ||
| 1299 | |||
| 1300 | /* Insert a "flush only" translation */ | ||
| 1301 | |||
| 1302 | zdepi 7,7,3,prot | ||
| 1303 | depi 1,10,1,prot | ||
| 1304 | |||
| 1305 | /* Get rid of prot bits and convert to page addr for idtlba */ | ||
| 1306 | |||
| 1307 | depi 0,31,ASM_PFN_PTE_SHIFT,pte | ||
| 1308 | SHRREG pte,(ASM_PFN_PTE_SHIFT-(31-26)),pte | ||
| 1309 | |||
| 1310 | mfsp %sr1,t0 /* Save sr1 so we can use it in tlb inserts */ | ||
| 1311 | mtsp spc,%sr1 | ||
| 1312 | |||
| 1313 | idtlba pte,(%sr1,va) | ||
| 1314 | idtlbp prot,(%sr1,va) | ||
| 1315 | |||
| 1316 | mtsp t0, %sr1 /* Restore sr1 */ | ||
| 1317 | |||
| 1318 | rfir | ||
| 1319 | nop | ||
| 1320 | |||
| 1321 | dtlb_miss_20: | 1281 | dtlb_miss_20: |
| 1322 | space_adjust spc,va,t0 | 1282 | space_adjust spc,va,t0 |
| 1323 | get_pgd spc,ptp | 1283 | get_pgd spc,ptp |
| @@ -1363,28 +1323,13 @@ nadtlb_miss_20: | |||
| 1363 | nop | 1323 | nop |
| 1364 | 1324 | ||
| 1365 | nadtlb_check_alias_20: | 1325 | nadtlb_check_alias_20: |
| 1366 | do_alias spc,t0,t1,va,pte,prot,nadtlb_check_flush_20 | 1326 | do_alias spc,t0,t1,va,pte,prot,nadtlb_emulate |
| 1367 | 1327 | ||
| 1368 | idtlbt pte,prot | 1328 | idtlbt pte,prot |
| 1369 | 1329 | ||
| 1370 | rfir | 1330 | rfir |
| 1371 | nop | 1331 | nop |
| 1372 | 1332 | ||
| 1373 | nadtlb_check_flush_20: | ||
| 1374 | bb,>=,n pte,_PAGE_FLUSH_BIT,nadtlb_emulate | ||
| 1375 | |||
| 1376 | /* Insert a "flush only" translation */ | ||
| 1377 | |||
| 1378 | depdi,z 7,7,3,prot | ||
| 1379 | depdi 1,10,1,prot | ||
| 1380 | |||
| 1381 | /* Drop prot bits from pte and convert to page addr for idtlbt */ | ||
| 1382 | convert_for_tlb_insert20 pte | ||
| 1383 | |||
| 1384 | idtlbt pte,prot | ||
| 1385 | |||
| 1386 | rfir | ||
| 1387 | nop | ||
| 1388 | #endif | 1333 | #endif |
| 1389 | 1334 | ||
| 1390 | nadtlb_emulate: | 1335 | nadtlb_emulate: |
