diff options
-rw-r--r-- | drivers/net/tg3.c | 23 | ||||
-rw-r--r-- | drivers/net/tg3.h | 3 |
2 files changed, 22 insertions, 4 deletions
diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c index 2de1ab6278d5..9ff97cc7e916 100644 --- a/drivers/net/tg3.c +++ b/drivers/net/tg3.c | |||
@@ -782,7 +782,7 @@ static int tg3_readphy(struct tg3 *tp, int reg, u32 *val) | |||
782 | 782 | ||
783 | *val = 0x0; | 783 | *val = 0x0; |
784 | 784 | ||
785 | frame_val = ((PHY_ADDR << MI_COM_PHY_ADDR_SHIFT) & | 785 | frame_val = ((tp->phy_addr << MI_COM_PHY_ADDR_SHIFT) & |
786 | MI_COM_PHY_ADDR_MASK); | 786 | MI_COM_PHY_ADDR_MASK); |
787 | frame_val |= ((reg << MI_COM_REG_ADDR_SHIFT) & | 787 | frame_val |= ((reg << MI_COM_REG_ADDR_SHIFT) & |
788 | MI_COM_REG_ADDR_MASK); | 788 | MI_COM_REG_ADDR_MASK); |
@@ -833,7 +833,7 @@ static int tg3_writephy(struct tg3 *tp, int reg, u32 val) | |||
833 | udelay(80); | 833 | udelay(80); |
834 | } | 834 | } |
835 | 835 | ||
836 | frame_val = ((PHY_ADDR << MI_COM_PHY_ADDR_SHIFT) & | 836 | frame_val = ((tp->phy_addr << MI_COM_PHY_ADDR_SHIFT) & |
837 | MI_COM_PHY_ADDR_MASK); | 837 | MI_COM_PHY_ADDR_MASK); |
838 | frame_val |= ((reg << MI_COM_REG_ADDR_SHIFT) & | 838 | frame_val |= ((reg << MI_COM_REG_ADDR_SHIFT) & |
839 | MI_COM_REG_ADDR_MASK); | 839 | MI_COM_REG_ADDR_MASK); |
@@ -1021,6 +1021,21 @@ static void tg3_mdio_start(struct tg3 *tp) | |||
1021 | tw32_f(MAC_MI_MODE, tp->mi_mode); | 1021 | tw32_f(MAC_MI_MODE, tp->mi_mode); |
1022 | udelay(80); | 1022 | udelay(80); |
1023 | 1023 | ||
1024 | if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717) { | ||
1025 | u32 funcnum, is_serdes; | ||
1026 | |||
1027 | funcnum = tr32(TG3_CPMU_STATUS) & TG3_CPMU_STATUS_PCIE_FUNC; | ||
1028 | if (funcnum) | ||
1029 | tp->phy_addr = 2; | ||
1030 | else | ||
1031 | tp->phy_addr = 1; | ||
1032 | |||
1033 | is_serdes = tr32(SG_DIG_STATUS) & SG_DIG_IS_SERDES; | ||
1034 | if (is_serdes) | ||
1035 | tp->phy_addr += 7; | ||
1036 | } else | ||
1037 | tp->phy_addr = PHY_ADDR; | ||
1038 | |||
1024 | if ((tp->tg3_flags3 & TG3_FLG3_MDIOBUS_INITED) && | 1039 | if ((tp->tg3_flags3 & TG3_FLG3_MDIOBUS_INITED) && |
1025 | GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5785) | 1040 | GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5785) |
1026 | tg3_mdio_config_5785(tp); | 1041 | tg3_mdio_config_5785(tp); |
@@ -9266,7 +9281,7 @@ static int tg3_get_settings(struct net_device *dev, struct ethtool_cmd *cmd) | |||
9266 | cmd->speed = tp->link_config.active_speed; | 9281 | cmd->speed = tp->link_config.active_speed; |
9267 | cmd->duplex = tp->link_config.active_duplex; | 9282 | cmd->duplex = tp->link_config.active_duplex; |
9268 | } | 9283 | } |
9269 | cmd->phy_address = PHY_ADDR; | 9284 | cmd->phy_address = tp->phy_addr; |
9270 | cmd->transceiver = XCVR_INTERNAL; | 9285 | cmd->transceiver = XCVR_INTERNAL; |
9271 | cmd->autoneg = tp->link_config.autoneg; | 9286 | cmd->autoneg = tp->link_config.autoneg; |
9272 | cmd->maxtxpkt = 0; | 9287 | cmd->maxtxpkt = 0; |
@@ -10570,7 +10585,7 @@ static int tg3_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd) | |||
10570 | 10585 | ||
10571 | switch(cmd) { | 10586 | switch(cmd) { |
10572 | case SIOCGMIIPHY: | 10587 | case SIOCGMIIPHY: |
10573 | data->phy_id = PHY_ADDR; | 10588 | data->phy_id = tp->phy_addr; |
10574 | 10589 | ||
10575 | /* fallthru */ | 10590 | /* fallthru */ |
10576 | case SIOCGMIIREG: { | 10591 | case SIOCGMIIREG: { |
diff --git a/drivers/net/tg3.h b/drivers/net/tg3.h index ea57a3a4372c..82b45d8797b4 100644 --- a/drivers/net/tg3.h +++ b/drivers/net/tg3.h | |||
@@ -694,6 +694,7 @@ | |||
694 | #define SG_DIG_PARTNER_FULL_DUPLEX 0x00020000 /* If !MRADV_CRC16_SELECT */ | 694 | #define SG_DIG_PARTNER_FULL_DUPLEX 0x00020000 /* If !MRADV_CRC16_SELECT */ |
695 | #define SG_DIG_PARTNER_NEXT_PAGE 0x00010000 /* If !MRADV_CRC16_SELECT */ | 695 | #define SG_DIG_PARTNER_NEXT_PAGE 0x00010000 /* If !MRADV_CRC16_SELECT */ |
696 | #define SG_DIG_AUTONEG_STATE_MASK 0x00000ff0 | 696 | #define SG_DIG_AUTONEG_STATE_MASK 0x00000ff0 |
697 | #define SG_DIG_IS_SERDES 0x00000100 | ||
697 | #define SG_DIG_COMMA_DETECTOR 0x00000008 | 698 | #define SG_DIG_COMMA_DETECTOR 0x00000008 |
698 | #define SG_DIG_MAC_ACK_STATUS 0x00000004 | 699 | #define SG_DIG_MAC_ACK_STATUS 0x00000004 |
699 | #define SG_DIG_AUTONEG_COMPLETE 0x00000002 | 700 | #define SG_DIG_AUTONEG_COMPLETE 0x00000002 |
@@ -2805,6 +2806,8 @@ struct tg3 { | |||
2805 | struct mii_bus *mdio_bus; | 2806 | struct mii_bus *mdio_bus; |
2806 | int mdio_irq[PHY_MAX_ADDR]; | 2807 | int mdio_irq[PHY_MAX_ADDR]; |
2807 | 2808 | ||
2809 | u8 phy_addr; | ||
2810 | |||
2808 | /* PHY info */ | 2811 | /* PHY info */ |
2809 | u32 phy_id; | 2812 | u32 phy_id; |
2810 | #define PHY_ID_MASK 0xfffffff0 | 2813 | #define PHY_ID_MASK 0xfffffff0 |