diff options
| -rw-r--r-- | arch/x86/kernel/cpu/perf_event_amd.c | 20 |
1 files changed, 17 insertions, 3 deletions
diff --git a/arch/x86/kernel/cpu/perf_event_amd.c b/arch/x86/kernel/cpu/perf_event_amd.c index 4e1613845b9f..cf4e369cea67 100644 --- a/arch/x86/kernel/cpu/perf_event_amd.c +++ b/arch/x86/kernel/cpu/perf_event_amd.c | |||
| @@ -427,7 +427,9 @@ static __initconst const struct x86_pmu amd_pmu = { | |||
| 427 | * | 427 | * |
| 428 | * Exceptions: | 428 | * Exceptions: |
| 429 | * | 429 | * |
| 430 | * 0x000 FP PERF_CTL[3], PERF_CTL[5:3] (*) | ||
| 430 | * 0x003 FP PERF_CTL[3] | 431 | * 0x003 FP PERF_CTL[3] |
| 432 | * 0x004 FP PERF_CTL[3], PERF_CTL[5:3] (*) | ||
| 431 | * 0x00B FP PERF_CTL[3] | 433 | * 0x00B FP PERF_CTL[3] |
| 432 | * 0x00D FP PERF_CTL[3] | 434 | * 0x00D FP PERF_CTL[3] |
| 433 | * 0x023 DE PERF_CTL[2:0] | 435 | * 0x023 DE PERF_CTL[2:0] |
| @@ -448,6 +450,8 @@ static __initconst const struct x86_pmu amd_pmu = { | |||
| 448 | * 0x0DF LS PERF_CTL[5:0] | 450 | * 0x0DF LS PERF_CTL[5:0] |
| 449 | * 0x1D6 EX PERF_CTL[5:0] | 451 | * 0x1D6 EX PERF_CTL[5:0] |
| 450 | * 0x1D8 EX PERF_CTL[5:0] | 452 | * 0x1D8 EX PERF_CTL[5:0] |
| 453 | * | ||
| 454 | * (*) depending on the umask all FPU counters may be used | ||
| 451 | */ | 455 | */ |
| 452 | 456 | ||
| 453 | static struct event_constraint amd_f15_PMC0 = EVENT_CONSTRAINT(0, 0x01, 0); | 457 | static struct event_constraint amd_f15_PMC0 = EVENT_CONSTRAINT(0, 0x01, 0); |
| @@ -460,18 +464,28 @@ static struct event_constraint amd_f15_PMC53 = EVENT_CONSTRAINT(0, 0x38, 0); | |||
| 460 | static struct event_constraint * | 464 | static struct event_constraint * |
| 461 | amd_get_event_constraints_f15h(struct cpu_hw_events *cpuc, struct perf_event *event) | 465 | amd_get_event_constraints_f15h(struct cpu_hw_events *cpuc, struct perf_event *event) |
| 462 | { | 466 | { |
| 463 | unsigned int event_code = amd_get_event_code(&event->hw); | 467 | struct hw_perf_event *hwc = &event->hw; |
| 468 | unsigned int event_code = amd_get_event_code(hwc); | ||
| 464 | 469 | ||
| 465 | switch (event_code & AMD_EVENT_TYPE_MASK) { | 470 | switch (event_code & AMD_EVENT_TYPE_MASK) { |
| 466 | case AMD_EVENT_FP: | 471 | case AMD_EVENT_FP: |
| 467 | switch (event_code) { | 472 | switch (event_code) { |
| 473 | case 0x000: | ||
| 474 | if (!(hwc->config & 0x0000F000ULL)) | ||
| 475 | break; | ||
| 476 | if (!(hwc->config & 0x00000F00ULL)) | ||
| 477 | break; | ||
| 478 | return &amd_f15_PMC3; | ||
| 479 | case 0x004: | ||
| 480 | if (hweight_long(hwc->config & ARCH_PERFMON_EVENTSEL_UMASK) <= 1) | ||
| 481 | break; | ||
| 482 | return &amd_f15_PMC3; | ||
| 468 | case 0x003: | 483 | case 0x003: |
| 469 | case 0x00B: | 484 | case 0x00B: |
| 470 | case 0x00D: | 485 | case 0x00D: |
| 471 | return &amd_f15_PMC3; | 486 | return &amd_f15_PMC3; |
| 472 | default: | ||
| 473 | return &amd_f15_PMC53; | ||
| 474 | } | 487 | } |
| 488 | return &amd_f15_PMC53; | ||
| 475 | case AMD_EVENT_LS: | 489 | case AMD_EVENT_LS: |
| 476 | case AMD_EVENT_DC: | 490 | case AMD_EVENT_DC: |
| 477 | case AMD_EVENT_EX_LS: | 491 | case AMD_EVENT_EX_LS: |
