1223 files changed, 55114 insertions, 21097 deletions

diff --git a/Documentation/DMA-API.txt b/Documentation/DMA-API.txt
index 5aceb88b3f8b..05e2ae236865 100644
--- a/Documentation/DMA-API.txt
+++ b/Documentation/DMA-API.txt
@@ -4,20 +4,18 @@
         James E.J. Bottomley <James.Bottomley@HansenPartnership.com>
 
 This document describes the DMA API.  For a more gentle introduction
-phrased in terms of the pci_ equivalents (and actual examples) see
-Documentation/PCI/PCI-DMA-mapping.txt.
+of the API (and actual examples) see
+Documentation/DMA-API-HOWTO.txt.
 
-This API is split into two pieces.  Part I describes the API and the
-corresponding pci_ API.  Part II describes the extensions to the API
-for supporting non-consistent memory machines.  Unless you know that
-your driver absolutely has to support non-consistent platforms (this
-is usually only legacy platforms) you should only use the API
-described in part I.
+This API is split into two pieces.  Part I describes the API.  Part II
+describes the extensions to the API for supporting non-consistent
+memory machines.  Unless you know that your driver absolutely has to
+support non-consistent platforms (this is usually only legacy
+platforms) you should only use the API described in part I.
 
-Part I - pci_ and dma_ Equivalent API 
+Part I - dma_ API
 -------------------------------------
 
-To get the pci_ API, you must #include <linux/pci.h>
 To get the dma_ API, you must #include <linux/dma-mapping.h>
 
 
@@ -27,9 +25,6 @@ Part Ia - Using large dma-coherent buffers
 void *
 dma_alloc_coherent(struct device *dev, size_t size,
                              dma_addr_t *dma_handle, gfp_t flag)
-void *
-pci_alloc_consistent(struct pci_dev *dev, size_t size,
-                             dma_addr_t *dma_handle)
 
 Consistent memory is memory for which a write by either the device or
 the processor can immediately be read by the processor or device
@@ -53,15 +48,11 @@ The simplest way to do that is to use the dma_pool calls (see below).
 The flag parameter (dma_alloc_coherent only) allows the caller to
 specify the GFP_ flags (see kmalloc) for the allocation (the
 implementation may choose to ignore flags that affect the location of
-the returned memory, like GFP_DMA).  For pci_alloc_consistent, you
-must assume GFP_ATOMIC behaviour.
+the returned memory, like GFP_DMA).
 
 void
 dma_free_coherent(struct device *dev, size_t size, void *cpu_addr,
                            dma_addr_t dma_handle)
-void
-pci_free_consistent(struct pci_dev *dev, size_t size, void *cpu_addr,
-                           dma_addr_t dma_handle)
 
 Free the region of consistent memory you previously allocated.  dev,
 size and dma_handle must all be the same as those passed into the
@@ -89,10 +80,6 @@ for alignment, like queue heads needing to be aligned on N-byte boundaries.
         dma_pool_create(const char *name, struct device *dev,
                         size_t size, size_t align, size_t alloc);
 
-        struct pci_pool *
-        pci_pool_create(const char *name, struct pci_device *dev,
-                        size_t size, size_t align, size_t alloc);
-
 The pool create() routines initialize a pool of dma-coherent buffers
 for use with a given device.  It must be called in a context which
 can sleep.
@@ -108,9 +95,6 @@ from this pool must not cross 4KByte boundaries.
         void *dma_pool_alloc(struct dma_pool *pool, gfp_t gfp_flags,
                         dma_addr_t *dma_handle);
 
-        void *pci_pool_alloc(struct pci_pool *pool, gfp_t gfp_flags,
-                        dma_addr_t *dma_handle);
-
 This allocates memory from the pool; the returned memory will meet the size
 and alignment requirements specified at creation time.  Pass GFP_ATOMIC to
 prevent blocking, or if it's permitted (not in_interrupt, not holding SMP locks),
@@ -122,9 +106,6 @@ pool's device.
         void dma_pool_free(struct dma_pool *pool, void *vaddr,
                         dma_addr_t addr);
 
-        void pci_pool_free(struct pci_pool *pool, void *vaddr,
-                        dma_addr_t addr);
-
 This puts memory back into the pool.  The pool is what was passed to
 the pool allocation routine; the cpu (vaddr) and dma addresses are what
 were returned when that routine allocated the memory being freed.
@@ -132,8 +113,6 @@ were returned when that routine allocated the memory being freed.
 
         void dma_pool_destroy(struct dma_pool *pool);
 
-        void pci_pool_destroy(struct pci_pool *pool);
-
 The pool destroy() routines free the resources of the pool.  They must be
 called in a context which can sleep.  Make sure you've freed all allocated
 memory back to the pool before you destroy it.
@@ -144,8 +123,6 @@ Part Ic - DMA addressing limitations
 
 int
 dma_supported(struct device *dev, u64 mask)
-int
-pci_dma_supported(struct pci_dev *hwdev, u64 mask)
 
 Checks to see if the device can support DMA to the memory described by
 mask.
@@ -159,8 +136,14 @@ driver writers.
 
 int
 dma_set_mask(struct device *dev, u64 mask)
+
+Checks to see if the mask is possible and updates the device
+parameters if it is.
+
+Returns: 0 if successful and a negative error if not.
+
 int
-pci_set_dma_mask(struct pci_device *dev, u64 mask)
+dma_set_coherent_mask(struct device *dev, u64 mask)
 
 Checks to see if the mask is possible and updates the device
 parameters if it is.
@@ -187,9 +170,6 @@ Part Id - Streaming DMA mappings
 dma_addr_t
 dma_map_single(struct device *dev, void *cpu_addr, size_t size,
                       enum dma_data_direction direction)
-dma_addr_t
-pci_map_single(struct pci_dev *hwdev, void *cpu_addr, size_t size,
-                      int direction)
 
 Maps a piece of processor virtual memory so it can be accessed by the
 device and returns the physical handle of the memory.
@@ -198,14 +178,10 @@ The direction for both api's may be converted freely by casting.
 However the dma_ API uses a strongly typed enumerator for its
 direction:
 
-DMA_NONE                = PCI_DMA_NONE          no direction (used for
-                                                debugging)
-DMA_TO_DEVICE           = PCI_DMA_TODEVICE      data is going from the
-                                                memory to the device
-DMA_FROM_DEVICE         = PCI_DMA_FROMDEVICE    data is coming from
-                                                the device to the
-                                                memory
-DMA_BIDIRECTIONAL       = PCI_DMA_BIDIRECTIONAL direction isn't known
+DMA_NONE                no direction (used for debugging)
+DMA_TO_DEVICE           data is going from the memory to the device
+DMA_FROM_DEVICE         data is coming from the device to the memory
+DMA_BIDIRECTIONAL       direction isn't known
 
 Notes:  Not all memory regions in a machine can be mapped by this
 API.  Further, regions that appear to be physically contiguous in
@@ -268,9 +244,6 @@ cache lines are updated with data that the device may have changed).
 void
 dma_unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size,
                  enum dma_data_direction direction)
-void
-pci_unmap_single(struct pci_dev *hwdev, dma_addr_t dma_addr,
-                 size_t size, int direction)
 
 Unmaps the region previously mapped.  All the parameters passed in
 must be identical to those passed in (and returned) by the mapping
@@ -280,15 +253,9 @@ dma_addr_t
 dma_map_page(struct device *dev, struct page *page,
                     unsigned long offset, size_t size,
                     enum dma_data_direction direction)
-dma_addr_t
-pci_map_page(struct pci_dev *hwdev, struct page *page,
-                    unsigned long offset, size_t size, int direction)
 void
 dma_unmap_page(struct device *dev, dma_addr_t dma_address, size_t size,
                enum dma_data_direction direction)
-void
-pci_unmap_page(struct pci_dev *hwdev, dma_addr_t dma_address,
-               size_t size, int direction)
 
 API for mapping and unmapping for pages.  All the notes and warnings
 for the other mapping APIs apply here.  Also, although the <offset>
@@ -299,9 +266,6 @@ cache width is.
 int
 dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
 
-int
-pci_dma_mapping_error(struct pci_dev *hwdev, dma_addr_t dma_addr)
-
 In some circumstances dma_map_single and dma_map_page will fail to create
 a mapping. A driver can check for these errors by testing the returned
 dma address with dma_mapping_error(). A non-zero return value means the mapping
@@ -311,9 +275,6 @@ reduce current DMA mapping usage or delay and try again later).
         int
         dma_map_sg(struct device *dev, struct scatterlist *sg,
                 int nents, enum dma_data_direction direction)
-        int
-        pci_map_sg(struct pci_dev *hwdev, struct scatterlist *sg,
-                int nents, int direction)
 
 Returns: the number of physical segments mapped (this may be shorter
 than <nents> passed in if some elements of the scatter/gather list are
@@ -353,9 +314,6 @@ accessed sg->address and sg->length as shown above.
         void
         dma_unmap_sg(struct device *dev, struct scatterlist *sg,
                 int nhwentries, enum dma_data_direction direction)
-        void
-        pci_unmap_sg(struct pci_dev *hwdev, struct scatterlist *sg,
-                int nents, int direction)
 
 Unmap the previously mapped scatter/gather list.  All the parameters
 must be the same as those and passed in to the scatter/gather mapping
@@ -365,21 +323,23 @@ Note: <nents> must be the number you passed in, *not* the number of
 physical entries returned.
 
 void
-dma_sync_single(struct device *dev, dma_addr_t dma_handle, size_t size,
-                enum dma_data_direction direction)
+dma_sync_single_for_cpu(struct device *dev, dma_addr_t dma_handle, size_t size,
+                        enum dma_data_direction direction)
 void
-pci_dma_sync_single(struct pci_dev *hwdev, dma_addr_t dma_handle,
-                           size_t size, int direction)
+dma_sync_single_for_device(struct device *dev, dma_addr_t dma_handle, size_t size,
+                           enum dma_data_direction direction)
 void
-dma_sync_sg(struct device *dev, struct scatterlist *sg, int nelems,
-                          enum dma_data_direction direction)
+dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, int nelems,
+                    enum dma_data_direction direction)
 void
-pci_dma_sync_sg(struct pci_dev *hwdev, struct scatterlist *sg,
-                       int nelems, int direction)
+dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, int nelems,
+                       enum dma_data_direction direction)
 
-Synchronise a single contiguous or scatter/gather mapping.  All the
-parameters must be the same as those passed into the single mapping
-API.
+Synchronise a single contiguous or scatter/gather mapping for the cpu
+and device. With the sync_sg API, all the parameters must be the same
+as those passed into the single mapping API. With the sync_single API,
+you can use dma_handle and size parameters that aren't identical to
+those passed into the single mapping API to do a partial sync.
 
 Notes:  You must do this:
 
@@ -461,9 +421,9 @@ void whizco_dma_map_sg_attrs(struct device *dev, dma_addr_t dma_addr,
 Part II - Advanced dma_ usage
 -----------------------------
 
-Warning: These pieces of the DMA API have no PCI equivalent.  They
-should also not be used in the majority of cases, since they cater for
-unlikely corner cases that don't belong in usual drivers.
+Warning: These pieces of the DMA API should not be used in the
+majority of cases, since they cater for unlikely corner cases that
+don't belong in usual drivers.
 
 If you don't understand how cache line coherency works between a
 processor and an I/O device, you should not be using this part of the
@@ -514,16 +474,6 @@ into the width returned by this call.  It will also always be a power
 of two for easy alignment.
 
 void
-dma_sync_single_range(struct device *dev, dma_addr_t dma_handle,
-                      unsigned long offset, size_t size,
-                      enum dma_data_direction direction)
-
-Does a partial sync, starting at offset and continuing for size.  You
-must be careful to observe the cache alignment and width when doing
-anything like this.  You must also be extra careful about accessing
-memory you intend to sync partially.
-
-void
 dma_cache_sync(struct device *dev, void *vaddr, size_t size,
                enum dma_data_direction direction)
 
diff --git a/Documentation/DocBook/mtdnand.tmpl b/Documentation/DocBook/mtdnand.tmpl
index 5e7d84b48505..133cd6c3f3c1 100644
--- a/Documentation/DocBook/mtdnand.tmpl
+++ b/Documentation/DocBook/mtdnand.tmpl
@@ -488,7 +488,7 @@ static void board_select_chip (struct mtd_info *mtd, int chip)
                                 The ECC bytes must be placed immidiately after the data
                                 bytes in order to make the syndrome generator work. This
                                 is contrary to the usual layout used by software ECC. The
-                                seperation of data and out of band area is not longer
+                                separation of data and out of band area is not longer
                                 possible. The nand driver code handles this layout and
                                 the remaining free bytes in the oob area are managed by 
                                 the autoplacement code. Provide a matching oob-layout
@@ -560,7 +560,7 @@ static void board_select_chip (struct mtd_info *mtd, int chip)
                                 bad blocks. They have factory marked good blocks. The marker pattern
                                 is erased when the block is erased to be reused. So in case of
                                 powerloss before writing the pattern back to the chip this block 
-                                would be lost and added to the bad blocks. Therefor we scan the 
+                                would be lost and added to the bad blocks. Therefore we scan the 
                                 chip(s) when we detect them the first time for good blocks and 
                                 store this information in a bad block table before erasing any 
                                 of the blocks.
@@ -1094,7 +1094,7 @@ in this page</entry>
                 manufacturers specifications. This applies similar to the spare area. 
         </para>
         <para>
-                Therefor NAND aware filesystems must either write in page size chunks
+                Therefore NAND aware filesystems must either write in page size chunks
                 or hold a writebuffer to collect smaller writes until they sum up to 
                 pagesize. Available NAND aware filesystems: JFFS2, YAFFS.               
         </para>
diff --git a/Documentation/DocBook/v4l/common.xml b/Documentation/DocBook/v4l/common.xml
index c65f0ac9b6ee..cea23e1c4fc6 100644
--- a/Documentation/DocBook/v4l/common.xml
+++ b/Documentation/DocBook/v4l/common.xml
@@ -1170,7 +1170,7 @@ frames per second. If less than this number of frames is to be
 captured or output, applications can request frame skipping or
 duplicating on the driver side. This is especially useful when using
 the &func-read; or &func-write;, which are not augmented by timestamps
-or sequence counters, and to avoid unneccessary data copying.</para>
+or sequence counters, and to avoid unnecessary data copying.</para>
 
     <para>Finally these ioctls can be used to determine the number of
 buffers used internally by a driver in read/write mode. For
diff --git a/Documentation/DocBook/v4l/vidioc-g-parm.xml b/Documentation/DocBook/v4l/vidioc-g-parm.xml
index 78332d365ce9..392aa9e5571e 100644
--- a/Documentation/DocBook/v4l/vidioc-g-parm.xml
+++ b/Documentation/DocBook/v4l/vidioc-g-parm.xml
@@ -55,7 +55,7 @@ captured or output, applications can request frame skipping or
 duplicating on the driver side. This is especially useful when using
 the <function>read()</function> or <function>write()</function>, which
 are not augmented by timestamps or sequence counters, and to avoid
-unneccessary data copying.</para>
+unnecessary data copying.</para>
 
     <para>Further these ioctls can be used to determine the number of
 buffers used internally by a driver in read/write mode. For
diff --git a/Documentation/IPMI.txt b/Documentation/IPMI.txt
index bc38283379f0..69dd29ed824e 100644
--- a/Documentation/IPMI.txt
+++ b/Documentation/IPMI.txt
@@ -365,6 +365,7 @@ You can change this at module load time (for a module) with:
        regshifts=<shift1>,<shift2>,...
        slave_addrs=<addr1>,<addr2>,...
        force_kipmid=<enable1>,<enable2>,...
+       kipmid_max_busy_us=<ustime1>,<ustime2>,...
        unload_when_empty=[0|1]
 
 Each of these except si_trydefaults is a list, the first item for the
@@ -433,6 +434,7 @@ kernel command line as:
        ipmi_si.regshifts=<shift1>,<shift2>,...
        ipmi_si.slave_addrs=<addr1>,<addr2>,...
        ipmi_si.force_kipmid=<enable1>,<enable2>,...
+       ipmi_si.kipmid_max_busy_us=<ustime1>,<ustime2>,...
 
 It works the same as the module parameters of the same names.
 
@@ -450,6 +452,16 @@ force this thread on or off.  If you force it off and don't have
 interrupts, the driver will run VERY slowly.  Don't blame me,
 these interfaces suck.
 
+Unfortunately, this thread can use a lot of CPU depending on the
+interface's performance.  This can waste a lot of CPU and cause
+various issues with detecting idle CPU and using extra power.  To
+avoid this, the kipmid_max_busy_us sets the maximum amount of time, in
+microseconds, that kipmid will spin before sleeping for a tick.  This
+value sets a balance between performance and CPU waste and needs to be
+tuned to your needs.  Maybe, someday, auto-tuning will be added, but
+that's not a simple thing and even the auto-tuning would need to be
+tuned to the user's desired performance.
+
 The driver supports a hot add and remove of interfaces.  This way,
 interfaces can be added or removed after the kernel is up and running.
 This is done using /sys/modules/ipmi_si/parameters/hotmod, which is a
diff --git a/Documentation/Makefile b/Documentation/Makefile
index 94b945733534..6fc7ea1d1f9d 100644
--- a/Documentation/Makefile
+++ b/Documentation/Makefile
@@ -1,3 +1,3 @@
 obj-m := DocBook/ accounting/ auxdisplay/ connector/ \
-        filesystems/configfs/ ia64/ networking/ \
-        pcmcia/ spi/ video4linux/ vm/ watchdog/src/
+        filesystems/ filesystems/configfs/ ia64/ laptops/ networking/ \
+        pcmcia/ spi/ timers/ video4linux/ vm/ watchdog/src/
diff --git a/Documentation/PCI/PCI-DMA-mapping.txt b/Documentation/PCI/PCI-DMA-mapping.txt
index ecad88d9fe59..52618ab069ad 100644
--- a/Documentation/PCI/PCI-DMA-mapping.txt
+++ b/Documentation/PCI/PCI-DMA-mapping.txt
@@ -1,12 +1,12 @@
-                        Dynamic DMA mapping
-                        ===================
+                     Dynamic DMA mapping Guide
+                     =========================
 
                  David S. Miller <davem@redhat.com>
                  Richard Henderson <rth@cygnus.com>
                   Jakub Jelinek <jakub@redhat.com>
 
-This document describes the DMA mapping system in terms of the pci_
-API.  For a similar API that works for generic devices, see
+This is a guide to device driver writers on how to use the DMA API
+with example pseudo-code.  For a concise description of the API, see
 DMA-API.txt.
 
 Most of the 64bit platforms have special hardware that translates bus
@@ -26,12 +26,15 @@ mapped only for the time they are actually used and unmapped after the DMA
 transfer.
 
 The following API will work of course even on platforms where no such
-hardware exists, see e.g. arch/x86/include/asm/pci.h for how it is implemented on
-top of the virt_to_bus interface.
+hardware exists.
+
+Note that the DMA API works with any bus independent of the underlying
+microprocessor architecture. You should use the DMA API rather than
+the bus specific DMA API (e.g. pci_dma_*).
 
 First of all, you should make sure
 
-#include <linux/pci.h>
+#include <linux/dma-mapping.h>
 
 is in your driver. This file will obtain for you the definition of the
 dma_addr_t (which can hold any valid DMA address for the platform)
@@ -78,44 +81,43 @@ for you to DMA from/to.
                         DMA addressing limitations
 
 Does your device have any DMA addressing limitations?  For example, is
-your device only capable of driving the low order 24-bits of address
-on the PCI bus for SAC DMA transfers?  If so, you need to inform the
-PCI layer of this fact.
+your device only capable of driving the low order 24-bits of address?
+If so, you need to inform the kernel of this fact.
 
 By default, the kernel assumes that your device can address the full
-32-bits in a SAC cycle.  For a 64-bit DAC capable device, this needs
-to be increased.  And for a device with limitations, as discussed in
-the previous paragraph, it needs to be decreased.
-
-pci_alloc_consistent() by default will return 32-bit DMA addresses.
-PCI-X specification requires PCI-X devices to support 64-bit
-addressing (DAC) for all transactions. And at least one platform (SGI
-SN2) requires 64-bit consistent allocations to operate correctly when
-the IO bus is in PCI-X mode. Therefore, like with pci_set_dma_mask(),
-it's good practice to call pci_set_consistent_dma_mask() to set the
-appropriate mask even if your device only supports 32-bit DMA
-(default) and especially if it's a PCI-X device.
-
-For correct operation, you must interrogate the PCI layer in your
-device probe routine to see if the PCI controller on the machine can
-properly support the DMA addressing limitation your device has.  It is
-good style to do this even if your device holds the default setting,
+32-bits.  For a 64-bit capable device, this needs to be increased.
+And for a device with limitations, as discussed in the previous
+paragraph, it needs to be decreased.
+
+Special note about PCI: PCI-X specification requires PCI-X devices to
+support 64-bit addressing (DAC) for all transactions.  And at least
+one platform (SGI SN2) requires 64-bit consistent allocations to
+operate correctly when the IO bus is in PCI-X mode.
+
+For correct operation, you must interrogate the kernel in your device
+probe routine to see if the DMA controller on the machine can properly
+support the DMA addressing limitation your device has.  It is good
+style to do this even if your device holds the default setting,
 because this shows that you did think about these issues wrt. your
 device.
 
-The query is performed via a call to pci_set_dma_mask():
+The query is performed via a call to dma_set_mask():
 
-        int pci_set_dma_mask(struct pci_dev *pdev, u64 device_mask);
+        int dma_set_mask(struct device *dev, u64 mask);
 
 The query for consistent allocations is performed via a call to
-pci_set_consistent_dma_mask():
+dma_set_coherent_mask():
 
-        int pci_set_consistent_dma_mask(struct pci_dev *pdev, u64 device_mask);
+        int dma_set_coherent_mask(struct device *dev, u64 mask);
 
-Here, pdev is a pointer to the PCI device struct of your device, and
-device_mask is a bit mask describing which bits of a PCI address your
-device supports.  It returns zero if your card can perform DMA
-properly on the machine given the address mask you provided.
+Here, dev is a pointer to the device struct of your device, and mask
+is a bit mask describing which bits of an address your device
+supports.  It returns zero if your card can perform DMA properly on
+the machine given the address mask you provided.  In general, the
+device struct of your device is embedded in the bus specific device
+struct of your device.  For example, a pointer to the device struct of
+your PCI device is pdev->dev (pdev is a pointer to the PCI device
+struct of your device).
 
 If it returns non-zero, your device cannot perform DMA properly on
 this platform, and attempting to do so will result in undefined
@@ -133,31 +135,30 @@ of your driver reports that performance is bad or that the device is not
 even detected, you can ask them for the kernel messages to find out
 exactly why.
 
-The standard 32-bit addressing PCI device would do something like
-this:
+The standard 32-bit addressing device would do something like this:
 
-        if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32))) {
+        if (dma_set_mask(dev, DMA_BIT_MASK(32))) {
                 printk(KERN_WARNING
                        "mydev: No suitable DMA available.\n");
                 goto ignore_this_device;
         }
 
-Another common scenario is a 64-bit capable device.  The approach
-here is to try for 64-bit DAC addressing, but back down to a
-32-bit mask should that fail.  The PCI platform code may fail the
-64-bit mask not because the platform is not capable of 64-bit
-addressing.  Rather, it may fail in this case simply because
-32-bit SAC addressing is done more efficiently than DAC addressing.
-Sparc64 is one platform which behaves in this way.
+Another common scenario is a 64-bit capable device.  The approach here
+is to try for 64-bit addressing, but back down to a 32-bit mask that
+should not fail.  The kernel may fail the 64-bit mask not because the
+platform is not capable of 64-bit addressing.  Rather, it may fail in
+this case simply because 32-bit addressing is done more efficiently
+than 64-bit addressing.  For example, Sparc64 PCI SAC addressing is
+more efficient than DAC addressing.
 
 Here is how you would handle a 64-bit capable device which can drive
 all 64-bits when accessing streaming DMA:
 
         int using_dac;
 
-        if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(64))) {
+        if (!dma_set_mask(dev, DMA_BIT_MASK(64))) {
                 using_dac = 1;
-        } else if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))) {
+        } else if (!dma_set_mask(dev, DMA_BIT_MASK(32))) {
                 using_dac = 0;
         } else {
                 printk(KERN_WARNING
@@ -170,36 +171,36 @@ the case would look like this:
 
         int using_dac, consistent_using_dac;
 
-        if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(64))) {
+        if (!dma_set_mask(dev, DMA_BIT_MASK(64))) {
                 using_dac = 1;
                 consistent_using_dac = 1;
-                pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64));
-        } else if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))) {
+                dma_set_coherent_mask(dev, DMA_BIT_MASK(64));
+        } else if (!dma_set_mask(dev, DMA_BIT_MASK(32))) {
                 using_dac = 0;
                 consistent_using_dac = 0;
-                pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
+                dma_set_coherent_mask(dev, DMA_BIT_MASK(32));
         } else {
                 printk(KERN_WARNING
                        "mydev: No suitable DMA available.\n");
                 goto ignore_this_device;
         }
 
-pci_set_consistent_dma_mask() will always be able to set the same or a
-smaller mask as pci_set_dma_mask(). However for the rare case that a
+dma_set_coherent_mask() will always be able to set the same or a
+smaller mask as dma_set_mask(). However for the rare case that a
 device driver only uses consistent allocations, one would have to
-check the return value from pci_set_consistent_dma_mask().
+check the return value from dma_set_coherent_mask().
 
 Finally, if your device can only drive the low 24-bits of
-address during PCI bus mastering you might do something like:
+address you might do something like:
 
-        if (pci_set_dma_mask(pdev, DMA_BIT_MASK(24))) {
+        if (dma_set_mask(dev, DMA_BIT_MASK(24))) {
                 printk(KERN_WARNING
                        "mydev: 24-bit DMA addressing not available.\n");
                 goto ignore_this_device;
         }
 
-When pci_set_dma_mask() is successful, and returns zero, the PCI layer
-saves away this mask you have provided.  The PCI layer will use this
+When dma_set_mask() is successful, and returns zero, the kernel saves
+away this mask you have provided.  The kernel will use this
 information later when you make DMA mappings.
 
 There is a case which we are aware of at this time, which is worth
@@ -208,7 +209,7 @@ functions (for example a sound card provides playback and record
 functions) and the various different functions have _different_
 DMA addressing limitations, you may wish to probe each mask and
 only provide the functionality which the machine can handle.  It
-is important that the last call to pci_set_dma_mask() be for the
+is important that the last call to dma_set_mask() be for the
 most specific mask.
 
 Here is pseudo-code showing how this might be done:
@@ -217,17 +218,17 @@ Here is pseudo-code showing how this might be done:
         #define RECORD_ADDRESS_BITS     DMA_BIT_MASK(24)
 
         struct my_sound_card *card;
-        struct pci_dev *pdev;
+        struct device *dev;
 
         ...
-        if (!pci_set_dma_mask(pdev, PLAYBACK_ADDRESS_BITS)) {
+        if (!dma_set_mask(dev, PLAYBACK_ADDRESS_BITS)) {
                 card->playback_enabled = 1;
         } else {
                 card->playback_enabled = 0;
                 printk(KERN_WARNING "%s: Playback disabled due to DMA limitations.\n",
                        card->name);
         }
-        if (!pci_set_dma_mask(pdev, RECORD_ADDRESS_BITS)) {
+        if (!dma_set_mask(dev, RECORD_ADDRESS_BITS)) {
                 card->record_enabled = 1;
         } else {
                 card->record_enabled = 0;
@@ -252,8 +253,8 @@ There are two types of DMA mappings:
   Think of "consistent" as "synchronous" or "coherent".
 
   The current default is to return consistent memory in the low 32
-  bits of the PCI bus space.  However, for future compatibility you
-  should set the consistent mask even if this default is fine for your
+  bits of the bus space.  However, for future compatibility you should
+  set the consistent mask even if this default is fine for your
   driver.
 
   Good examples of what to use consistent mappings for are:
@@ -285,9 +286,9 @@ There are two types of DMA mappings:
              found in PCI bridges (such as by reading a register's value
              after writing it).
 
-- Streaming DMA mappings which are usually mapped for one DMA transfer,
-  unmapped right after it (unless you use pci_dma_sync_* below) and for which
-  hardware can optimize for sequential accesses.
+- Streaming DMA mappings which are usually mapped for one DMA
+  transfer, unmapped right after it (unless you use dma_sync_* below)
+  and for which hardware can optimize for sequential accesses.
 
   This of "streaming" as "asynchronous" or "outside the coherency
   domain".
@@ -302,8 +303,8 @@ There are two types of DMA mappings:
   optimizations the hardware allows.  To this end, when using
   such mappings you must be explicit about what you want to happen.
 
-Neither type of DMA mapping has alignment restrictions that come
-from PCI, although some devices may have such restrictions.
+Neither type of DMA mapping has alignment restrictions that come from
+the underlying bus, although some devices may have such restrictions.
 Also, systems with caches that aren't DMA-coherent will work better
 when the underlying buffers don't share cache lines with other data.
 
@@ -315,33 +316,27 @@ you should do:
 
         dma_addr_t dma_handle;
 
-        cpu_addr = pci_alloc_consistent(pdev, size, &dma_handle);
-
-where pdev is a struct pci_dev *. This may be called in interrupt context.
-You should use dma_alloc_coherent (see DMA-API.txt) for buses
-where devices don't have struct pci_dev (like ISA, EISA).
+        cpu_addr = dma_alloc_coherent(dev, size, &dma_handle, gfp);
 
-This argument is needed because the DMA translations may be bus
-specific (and often is private to the bus which the device is attached
-to).
+where device is a struct device *. This may be called in interrupt
+context with the GFP_ATOMIC flag.
 
 Size is the length of the region you want to allocate, in bytes.
 
 This routine will allocate RAM for that region, so it acts similarly to
 __get_free_pages (but takes size instead of a page order).  If your
 driver needs regions sized smaller than a page, you may prefer using
-the pci_pool interface, described below.
-
-The consistent DMA mapping interfaces, for non-NULL pdev, will by
-default return a DMA address which is SAC (Single Address Cycle)
-addressable.  Even if the device indicates (via PCI dma mask) that it
-may address the upper 32-bits and thus perform DAC cycles, consistent
-allocation will only return > 32-bit PCI addresses for DMA if the
-consistent dma mask has been explicitly changed via
-pci_set_consistent_dma_mask().  This is true of the pci_pool interface
-as well.
-
-pci_alloc_consistent returns two values: the virtual address which you
+the dma_pool interface, described below.
+
+The consistent DMA mapping interfaces, for non-NULL dev, will by
+default return a DMA address which is 32-bit addressable.  Even if the
+device indicates (via DMA mask) that it may address the upper 32-bits,
+consistent allocation will only return > 32-bit addresses for DMA if
+the consistent DMA mask has been explicitly changed via
+dma_set_coherent_mask().  This is true of the dma_pool interface as
+well.
+
+dma_alloc_coherent returns two values: the virtual address which you
 can use to access it from the CPU and dma_handle which you pass to the
 card.
 
@@ -354,54 +349,54 @@ buffer you receive will not cross a 64K boundary.
 
 To unmap and free such a DMA region, you call:
 
-        pci_free_consistent(pdev, size, cpu_addr, dma_handle);
+        dma_free_coherent(dev, size, cpu_addr, dma_handle);
 
-where pdev, size are the same as in the above call and cpu_addr and
-dma_handle are the values pci_alloc_consistent returned to you.
+where dev, size are the same as in the above call and cpu_addr and
+dma_handle are the values dma_alloc_coherent returned to you.
 This function may not be called in interrupt context.
 
 If your driver needs lots of smaller memory regions, you can write
-custom code to subdivide pages returned by pci_alloc_consistent,
-or you can use the pci_pool API to do that.  A pci_pool is like
-a kmem_cache, but it uses pci_alloc_consistent not __get_free_pages.
+custom code to subdivide pages returned by dma_alloc_coherent,
+or you can use the dma_pool API to do that.  A dma_pool is like
+a kmem_cache, but it uses dma_alloc_coherent not __get_free_pages.
 Also, it understands common hardware constraints for alignment,
 like queue heads needing to be aligned on N byte boundaries.
 
-Create a pci_pool like this:
+Create a dma_pool like this:
 
-        struct pci_pool *pool;
+        struct dma_pool *pool;
 
-        pool = pci_pool_create(name, pdev, size, align, alloc);
+        pool = dma_pool_create(name, dev, size, align, alloc);
 
-The "name" is for diagnostics (like a kmem_cache name); pdev and size
+The "name" is for diagnostics (like a kmem_cache name); dev and size
 are as above.  The device's hardware alignment requirement for this
 type of data is "align" (which is expressed in bytes, and must be a
 power of two).  If your device has no boundary crossing restrictions,
 pass 0 for alloc; passing 4096 says memory allocated from this pool
 must not cross 4KByte boundaries (but at that time it may be better to
-go for pci_alloc_consistent directly instead).
+go for dma_alloc_coherent directly instead).
 
-Allocate memory from a pci pool like this:
+Allocate memory from a dma pool like this:
 
-        cpu_addr = pci_pool_alloc(pool, flags, &dma_handle);
+        cpu_addr = dma_pool_alloc(pool, flags, &dma_handle);
 
 flags are SLAB_KERNEL if blocking is permitted (not in_interrupt nor
-holding SMP locks), SLAB_ATOMIC otherwise.  Like pci_alloc_consistent,
+holding SMP locks), SLAB_ATOMIC otherwise.  Like dma_alloc_coherent,
 this returns two values, cpu_addr and dma_handle.
 
-Free memory that was allocated from a pci_pool like this:
+Free memory that was allocated from a dma_pool like this:
 
-        pci_pool_free(pool, cpu_addr, dma_handle);
+        dma_pool_free(pool, cpu_addr, dma_handle);
 
-where pool is what you passed to pci_pool_alloc, and cpu_addr and
-dma_handle are the values pci_pool_alloc returned. This function
+where pool is what you passed to dma_pool_alloc, and cpu_addr and
+dma_handle are the values dma_pool_alloc returned. This function
 may be called in interrupt context.
 
-Destroy a pci_pool by calling:
+Destroy a dma_pool by calling:
 
-        pci_pool_destroy(pool);
+        dma_pool_destroy(pool);
 
-Make sure you've called pci_pool_free for all memory allocated
+Make sure you've called dma_pool_free for all memory allocated
 from a pool before you destroy the pool. This function may not
 be called in interrupt context.
 
@@ -411,15 +406,15 @@ The interfaces described in subsequent portions of this document
 take a DMA direction argument, which is an integer and takes on
 one of the following values:
 
- PCI_DMA_BIDIRECTIONAL
- PCI_DMA_TODEVICE
- PCI_DMA_FROMDEVICE
- PCI_DMA_NONE
+ DMA_BIDIRECTIONAL
+ DMA_TO_DEVICE
+ DMA_FROM_DEVICE
+ DMA_NONE
 
 One should provide the exact DMA direction if you know it.
 
-PCI_DMA_TODEVICE means "from main memory to the PCI device"
-PCI_DMA_FROMDEVICE means "from the PCI device to main memory"
+DMA_TO_DEVICE means "from main memory to the device"
+DMA_FROM_DEVICE means "from the device to main memory"
 It is the direction in which the data moves during the DMA
 transfer.
 
@@ -427,12 +422,12 @@ You are _strongly_ encouraged to specify this as precisely
 as you possibly can.
 
 If you absolutely cannot know the direction of the DMA transfer,
-specify PCI_DMA_BIDIRECTIONAL.  It means that the DMA can go in
+specify DMA_BIDIRECTIONAL.  It means that the DMA can go in
 either direction.  The platform guarantees that you may legally
 specify this, and that it will work, but this may be at the
 cost of performance for example.
 
-The value PCI_DMA_NONE is to be used for debugging.  One can
+The value DMA_NONE is to be used for debugging.  One can
 hold this in a data structure before you come to know the
 precise direction, and this will help catch cases where your
 direction tracking logic has failed to set things up properly.
@@ -442,21 +437,21 @@ potential platform-specific optimizations of such) is for debugging.
 Some platforms actually have a write permission boolean which DMA
 mappings can be marked with, much like page protections in the user
 program address space.  Such platforms can and do report errors in the
-kernel logs when the PCI controller hardware detects violation of the
+kernel logs when the DMA controller hardware detects violation of the
 permission setting.
 
 Only streaming mappings specify a direction, consistent mappings
 implicitly have a direction attribute setting of
-PCI_DMA_BIDIRECTIONAL.
+DMA_BIDIRECTIONAL.
 
 The SCSI subsystem tells you the direction to use in the
 'sc_data_direction' member of the SCSI command your driver is
 working on.
 
 For Networking drivers, it's a rather simple affair.  For transmit
-packets, map/unmap them with the PCI_DMA_TODEVICE direction
+packets, map/unmap them with the DMA_TO_DEVICE direction
 specifier.  For receive packets, just the opposite, map/unmap them
-with the PCI_DMA_FROMDEVICE direction specifier.
+with the DMA_FROM_DEVICE direction specifier.
 
                   Using Streaming DMA mappings
 
@@ -467,43 +462,43 @@ scatterlist.
 
 To map a single region, you do:
 
-        struct pci_dev *pdev = mydev->pdev;
+        struct device *dev = &my_dev->dev;
         dma_addr_t dma_handle;
         void *addr = buffer->ptr;
         size_t size = buffer->len;
 
-        dma_handle = pci_map_single(pdev, addr, size, direction);
+        dma_handle = dma_map_single(dev, addr, size, direction);
 
 and to unmap it:
 
-        pci_unmap_single(pdev, dma_handle, size, direction);
+        dma_unmap_single(dev, dma_handle, size, direction);
 
-You should call pci_unmap_single when the DMA activity is finished, e.g.
+You should call dma_unmap_single when the DMA activity is finished, e.g.
 from the interrupt which told you that the DMA transfer is done.
 
 Using cpu pointers like this for single mappings has a disadvantage,
 you cannot reference HIGHMEM memory in this way.  Thus, there is a
-map/unmap interface pair akin to pci_{map,unmap}_single.  These
+map/unmap interface pair akin to dma_{map,unmap}_single.  These
 interfaces deal with page/offset pairs instead of cpu pointers.
 Specifically:
 
-        struct pci_dev *pdev = mydev->pdev;
+        struct device *dev = &my_dev->dev;
         dma_addr_t dma_handle;
         struct page *page = buffer->page;
         unsigned long offset = buffer->offset;
         size_t size = buffer->len;
 
-        dma_handle = pci_map_page(pdev, page, offset, size, direction);
+        dma_handle = dma_map_page(dev, page, offset, size, direction);
 
         ...
 
-        pci_unmap_page(pdev, dma_handle, size, direction);
+        dma_unmap_page(dev, dma_handle, size, direction);
 
 Here, "offset" means byte offset within the given page.
 
 With scatterlists, you map a region gathered from several regions by:
 
-        int i, count = pci_map_sg(pdev, sglist, nents, direction);
+        int i, count = dma_map_sg(dev, sglist, nents, direction);
         struct scatterlist *sg;
 
         for_each_sg(sglist, sg, count, i) {
@@ -527,16 +522,16 @@ accessed sg->address and sg->length as shown above.
 
 To unmap a scatterlist, just call:
 
-        pci_unmap_sg(pdev, sglist, nents, direction);
+        dma_unmap_sg(dev, sglist, nents, direction);
 
 Again, make sure DMA activity has already finished.
 
-PLEASE NOTE:  The 'nents' argument to the pci_unmap_sg call must be
-              the _same_ one you passed into the pci_map_sg call,
+PLEASE NOTE:  The 'nents' argument to the dma_unmap_sg call must be
+              the _same_ one you passed into the dma_map_sg call,
               it should _NOT_ be the 'count' value _returned_ from the
-              pci_map_sg call.
+              dma_map_sg call.
 
-Every pci_map_{single,sg} call should have its pci_unmap_{single,sg}
+Every dma_map_{single,sg} call should have its dma_unmap_{single,sg}
 counterpart, because the bus address space is a shared resource (although
 in some ports the mapping is per each BUS so less devices contend for the
 same bus address space) and you could render the machine unusable by eating
@@ -547,14 +542,14 @@ the data in between the DMA transfers, the buffer needs to be synced
 properly in order for the cpu and device to see the most uptodate and
 correct copy of the DMA buffer.
 
-So, firstly, just map it with pci_map_{single,sg}, and after each DMA
+So, firstly, just map it with dma_map_{single,sg}, and after each DMA
 transfer call either:
 
-        pci_dma_sync_single_for_cpu(pdev, dma_handle, size, direction);
+        dma_sync_single_for_cpu(dev, dma_handle, size, direction);
 
 or:
 
-        pci_dma_sync_sg_for_cpu(pdev, sglist, nents, direction);
+        dma_sync_sg_for_cpu(dev, sglist, nents, direction);
 
 as appropriate.
 
@@ -562,27 +557,27 @@ Then, if you wish to let the device get at the DMA area again,
 finish accessing the data with the cpu, and then before actually
 giving the buffer to the hardware call either:
 
-        pci_dma_sync_single_for_device(pdev, dma_handle, size, direction);
+        dma_sync_single_for_device(dev, dma_handle, size, direction);
 
 or:
 
-        pci_dma_sync_sg_for_device(dev, sglist, nents, direction);
+        dma_sync_sg_for_device(dev, sglist, nents, direction);
 
 as appropriate.
 
 After the last DMA transfer call one of the DMA unmap routines
-pci_unmap_{single,sg}. If you don't touch the data from the first pci_map_*
-call till pci_unmap_*, then you don't have to call the pci_dma_sync_*
+dma_unmap_{single,sg}. If you don't touch the data from the first dma_map_*
+call till dma_unmap_*, then you don't have to call the dma_sync_*
 routines at all.
 
 Here is pseudo code which shows a situation in which you would need
-to use the pci_dma_sync_*() interfaces.
+to use the dma_sync_*() interfaces.
 
         my_card_setup_receive_buffer(struct my_card *cp, char *buffer, int len)
         {
                 dma_addr_t mapping;
 
-                mapping = pci_map_single(cp->pdev, buffer, len, PCI_DMA_FROMDEVICE);
+                mapping = dma_map_single(cp->dev, buffer, len, DMA_FROM_DEVICE);
 
                 cp->rx_buf = buffer;
                 cp->rx_len = len;
@@ -606,25 +601,25 @@ to use the pci_dma_sync_*() interfaces.
                          * the DMA transfer with the CPU first
                          * so that we see updated contents.
                          */
-                        pci_dma_sync_single_for_cpu(cp->pdev, cp->rx_dma,
-                                                    cp->rx_len,
-                                                    PCI_DMA_FROMDEVICE);
+                        dma_sync_single_for_cpu(&cp->dev, cp->rx_dma,
+                                                cp->rx_len,
+                                                DMA_FROM_DEVICE);
 
                         /* Now it is safe to examine the buffer. */
                         hp = (struct my_card_header *) cp->rx_buf;
                         if (header_is_ok(hp)) {
-                                pci_unmap_single(cp->pdev, cp->rx_dma, cp->rx_len,
-                                                 PCI_DMA_FROMDEVICE);
+                                dma_unmap_single(&cp->dev, cp->rx_dma, cp->rx_len,
+                                                 DMA_FROM_DEVICE);
                                 pass_to_upper_layers(cp->rx_buf);
                                 make_and_setup_new_rx_buf(cp);
                         } else {
                                 /* Just sync the buffer and give it back
                                  * to the card.
                                  */
-                                pci_dma_sync_single_for_device(cp->pdev,
-                                                               cp->rx_dma,
-                                                               cp->rx_len,
-                                                               PCI_DMA_FROMDEVICE);
+                                dma_sync_single_for_device(&cp->dev,
+                                                           cp->rx_dma,
+                                                           cp->rx_len,
+                                                           DMA_FROM_DEVICE);
                                 give_rx_buf_to_card(cp);
                         }
                 }
@@ -634,19 +629,19 @@ Drivers converted fully to this interface should not use virt_to_bus any
 longer, nor should they use bus_to_virt. Some drivers have to be changed a
 little bit, because there is no longer an equivalent to bus_to_virt in the
 dynamic DMA mapping scheme - you have to always store the DMA addresses
-returned by the pci_alloc_consistent, pci_pool_alloc, and pci_map_single
-calls (pci_map_sg stores them in the scatterlist itself if the platform
+returned by the dma_alloc_coherent, dma_pool_alloc, and dma_map_single
+calls (dma_map_sg stores them in the scatterlist itself if the platform
 supports dynamic DMA mapping in hardware) in your driver structures and/or
 in the card registers.
 
-All PCI drivers should be using these interfaces with no exceptions.
-It is planned to completely remove virt_to_bus() and bus_to_virt() as
+All drivers should be using these interfaces with no exceptions.  It
+is planned to completely remove virt_to_bus() and bus_to_virt() as
 they are entirely deprecated.  Some ports already do not provide these
 as it is impossible to correctly support them.
 
                 Optimizing Unmap State Space Consumption
 
-On many platforms, pci_unmap_{single,page}() is simply a nop.
+On many platforms, dma_unmap_{single,page}() is simply a nop.
 Therefore, keeping track of the mapping address and length is a waste
 of space.  Instead of filling your drivers up with ifdefs and the like
 to "work around" this (which would defeat the whole purpose of a
@@ -655,7 +650,7 @@ portable API) the following facilities are provided.
 Actually, instead of describing the macros one by one, we'll
 transform some example code.
 
-1) Use DECLARE_PCI_UNMAP_{ADDR,LEN} in state saving structures.
+1) Use DEFINE_DMA_UNMAP_{ADDR,LEN} in state saving structures.
    Example, before:
 
         struct ring_state {
@@ -668,14 +663,11 @@ transform some example code.
 
         struct ring_state {
                 struct sk_buff *skb;
-                DECLARE_PCI_UNMAP_ADDR(mapping)
-                DECLARE_PCI_UNMAP_LEN(len)
+                DEFINE_DMA_UNMAP_ADDR(mapping);
+                DEFINE_DMA_UNMAP_LEN(len);
         };
 
-   NOTE: DO NOT put a semicolon at the end of the DECLARE_*()
-         macro.
-
-2) Use pci_unmap_{addr,len}_set to set these values.
+2) Use dma_unmap_{addr,len}_set to set these values.
    Example, before:
 
         ringp->mapping = FOO;
@@ -683,21 +675,21 @@ transform some example code.
 
    after:
 
-        pci_unmap_addr_set(ringp, mapping, FOO);
-        pci_unmap_len_set(ringp, len, BAR);
+        dma_unmap_addr_set(ringp, mapping, FOO);
+        dma_unmap_len_set(ringp, len, BAR);
 
-3) Use pci_unmap_{addr,len} to access these values.
+3) Use dma_unmap_{addr,len} to access these values.
    Example, before:
 
-        pci_unmap_single(pdev, ringp->mapping, ringp->len,
-                         PCI_DMA_FROMDEVICE);
+        dma_unmap_single(dev, ringp->mapping, ringp->len,
+                         DMA_FROM_DEVICE);
 
    after:
 
-        pci_unmap_single(pdev,
-                         pci_unmap_addr(ringp, mapping),
-                         pci_unmap_len(ringp, len),
-                         PCI_DMA_FROMDEVICE);
+        dma_unmap_single(dev,
+                         dma_unmap_addr(ringp, mapping),
+                         dma_unmap_len(ringp, len),
+                         DMA_FROM_DEVICE);
 
 It really should be self-explanatory.  We treat the ADDR and LEN
 separately, because it is possible for an implementation to only
@@ -732,15 +724,15 @@ to "Closing".
 DMA address space is limited on some architectures and an allocation
 failure can be determined by:
 
-- checking if pci_alloc_consistent returns NULL or pci_map_sg returns 0
+- checking if dma_alloc_coherent returns NULL or dma_map_sg returns 0
 
-- checking the returned dma_addr_t of pci_map_single and pci_map_page
-  by using pci_dma_mapping_error():
+- checking the returned dma_addr_t of dma_map_single and dma_map_page
+  by using dma_mapping_error():
 
         dma_addr_t dma_handle;
 
-        dma_handle = pci_map_single(pdev, addr, size, direction);
-        if (pci_dma_mapping_error(pdev, dma_handle)) {
+        dma_handle = dma_map_single(dev, addr, size, direction);
+        if (dma_mapping_error(dev, dma_handle)) {
                 /*
                  * reduce current DMA mapping usage,
                  * delay and try again later or
diff --git a/Documentation/SubmitChecklist b/Documentation/SubmitChecklist
index 1053a56be3b1..8916ca48bc95 100644
--- a/Documentation/SubmitChecklist
+++ b/Documentation/SubmitChecklist
@@ -9,10 +9,14 @@ Documentation/SubmittingPatches and elsewhere regarding submitting Linux
 kernel patches.
 
 
-1: Builds cleanly with applicable or modified CONFIG options =y, =m, and
+1: If you use a facility then #include the file that defines/declares
+   that facility.  Don't depend on other header files pulling in ones
+   that you use.
+
+2: Builds cleanly with applicable or modified CONFIG options =y, =m, and
    =n.  No gcc warnings/errors, no linker warnings/errors.
 
-2: Passes allnoconfig, allmodconfig
+2b: Passes allnoconfig, allmodconfig
 
 3: Builds on multiple CPU architectures by using local cross-compile tools
    or some other build farm.
diff --git a/Documentation/arm/Samsung-S3C24XX/CPUfreq.txt b/Documentation/arm/Samsung-S3C24XX/CPUfreq.txt
index 76b3a11e90be..fa968aa99d67 100644
--- a/Documentation/arm/Samsung-S3C24XX/CPUfreq.txt
+++ b/Documentation/arm/Samsung-S3C24XX/CPUfreq.txt
@@ -14,8 +14,8 @@ Introduction
  how the clocks are arranged. The first implementation used as single
  PLL to feed the ARM, memory and peripherals via a series of dividers
  and muxes and this is the implementation that is documented here. A
- newer version where there is a seperate PLL and clock divider for the
- ARM core is available as a seperate driver.
+ newer version where there is a separate PLL and clock divider for the
+ ARM core is available as a separate driver.
 
 
 Layout
diff --git a/Documentation/arm/Samsung/Overview.txt b/Documentation/arm/Samsung/Overview.txt
new file mode 100644
index 000000000000..7cced1fea9c3
--- /dev/null
+++ b/Documentation/arm/Samsung/Overview.txt
@@ -0,0 +1,86 @@
+                Samsung ARM Linux Overview
+                ==========================
+
+Introduction
+------------
+
+  The Samsung range of ARM SoCs spans many similar devices, from the initial
+  ARM9 through to the newest ARM cores. This document shows an overview of
+  the current kernel support, how to use it and where to find the code
+  that supports this.
+
+  The currently supported SoCs are:
+
+  - S3C24XX: See Documentation/arm/Samsung-S3C24XX/Overview.txt for full list
+  - S3C64XX: S3C6400 and S3C6410
+  - S5PC6440
+
+  S5PC100 and S5PC110 support is currently being merged
+
+
+S3C24XX Systems
+---------------
+
+  There is still documentation in Documnetation/arm/Samsung-S3C24XX/ which
+  deals with the architecture and drivers specific to these devices.
+
+  See Documentation/arm/Samsung-S3C24XX/Overview.txt for more information
+  on the implementation details and specific support.
+
+
+Configuration
+-------------
+
+  A number of configurations are supplied, as there is no current way of
+  unifying all the SoCs into one kernel.
+
+  s5p6440_defconfig - S5P6440 specific default configuration
+  s5pc100_defconfig - S5PC100 specific default configuration
+
+
+Layout
+------
+
+  The directory layout is currently being restructured, and consists of
+  several platform directories and then the machine specific directories
+  of the CPUs being built for.
+
+  plat-samsung provides the base for all the implementations, and is the
+  last in the line of include directories that are processed for the build
+  specific information. It contains the base clock, GPIO and device definitions
+  to get the system running.
+
+  plat-s3c is the s3c24xx/s3c64xx platform directory, although it is currently
+  involved in other builds this will be phased out once the relevant code is
+  moved elsewhere.
+
+  plat-s3c24xx is for s3c24xx specific builds, see the S3C24XX docs.
+
+  plat-s3c64xx is for the s3c64xx specific bits, see the S3C24XX docs.
+
+  plat-s5p is for s5p specific builds, more to be added.
+
+
+  [ to finish ]
+
+
+Port Contributors
+-----------------
+
+  Ben Dooks (BJD)
+  Vincent Sanders
+  Herbert Potzl
+  Arnaud Patard (RTP)
+  Roc Wu
+  Klaus Fetscher
+  Dimitry Andric
+  Shannon Holland
+  Guillaume Gourat (NexVision)
+  Christer Weinigel (wingel) (Acer N30)
+  Lucas Correia Villa Real (S3C2400 port)
+
+
+Document Author
+---------------
+
+Copyright 2009-2010 Ben Dooks <ben-linux@fluff.org>
diff --git a/Documentation/arm/Samsung/clksrc-change-registers.awk b/Documentation/arm/Samsung/clksrc-change-registers.awk
new file mode 100755
index 000000000000..0c50220851fb
--- /dev/null
+++ b/Documentation/arm/Samsung/clksrc-change-registers.awk
@@ -0,0 +1,167 @@
+#!/usr/bin/awk -f
+#
+# Copyright 2010 Ben Dooks <ben-linux@fluff.org>
+#
+# Released under GPLv2
+
+# example usage
+# ./clksrc-change-registers.awk arch/arm/plat-s5pc1xx/include/plat/regs-clock.h < src > dst
+
+function extract_value(s)
+{
+    eqat = index(s, "=")
+    comat = index(s, ",")
+    return substr(s, eqat+2, (comat-eqat)-2)
+}
+
+function remove_brackets(b)
+{
+    return substr(b, 2, length(b)-2)
+}
+
+function splitdefine(l, p)
+{
+    r = split(l, tp)
+
+    p[0] = tp[2]
+    p[1] = remove_brackets(tp[3])
+}
+
+function find_length(f)
+{
+    if (0)
+        printf "find_length " f "\n" > "/dev/stderr"
+
+    if (f ~ /0x1/)
+        return 1
+    else if (f ~ /0x3/)
+        return 2
+    else if (f ~ /0x7/)
+        return 3
+    else if (f ~ /0xf/)
+        return 4
+
+    printf "unknown legnth " f "\n" > "/dev/stderr"
+    exit
+}
+
+function find_shift(s)
+{
+    id = index(s, "<")
+    if (id <= 0) {
+        printf "cannot find shift " s "\n" > "/dev/stderr"
+        exit
+    }
+
+    return substr(s, id+2)
+}
+
+
+BEGIN {
+    if (ARGC < 2) {
+        print "too few arguments" > "/dev/stderr"
+        exit
+    }
+
+# read the header file and find the mask values that we will need
+# to replace and create an associative array of values
+
+    while (getline line < ARGV[1] > 0) {
+        if (line ~ /\#define.*_MASK/ &&
+            !(line ~ /S5PC100_EPLL_MASK/) &&
+            !(line ~ /USB_SIG_MASK/)) {
+            splitdefine(line, fields)
+            name = fields[0]
+            if (0)
+                printf "MASK " line "\n" > "/dev/stderr"
+            dmask[name,0] = find_length(fields[1])
+            dmask[name,1] = find_shift(fields[1])
+            if (0)
+                printf "=> '" name "' LENGTH=" dmask[name,0] " SHIFT=" dmask[name,1] "\n" > "/dev/stderr"
+        } else {
+        }
+    }
+
+    delete ARGV[1]
+}
+
+/clksrc_clk.*=.*{/ {
+    shift=""
+    mask=""
+    divshift=""
+    reg_div=""
+    reg_src=""
+    indent=1
+
+    print $0
+
+    for(; indent >= 1;) {
+        if ((getline line) <= 0) {
+            printf "unexpected end of file" > "/dev/stderr"
+            exit 1;
+        }
+
+        if (line ~ /\.shift/) {
+            shift = extract_value(line)
+        } else if (line ~ /\.mask/) {
+            mask = extract_value(line)
+        } else if (line ~ /\.reg_divider/) {
+            reg_div = extract_value(line)
+        } else if (line ~ /\.reg_source/) {
+            reg_src = extract_value(line)
+        } else if (line ~ /\.divider_shift/) {
+            divshift = extract_value(line)
+        } else if (line ~ /{/) {
+                indent++
+                print line
+            } else if (line ~ /}/) {
+            indent--
+
+            if (indent == 0) {
+                if (0) {
+                    printf "shift '" shift   "' ='" dmask[shift,0] "'\n" > "/dev/stderr"
+                    printf "mask  '" mask    "'\n" > "/dev/stderr"
+                    printf "dshft '" divshift "'\n" > "/dev/stderr"
+                    printf "rdiv  '" reg_div "'\n" > "/dev/stderr"
+                    printf "rsrc  '" reg_src "'\n" > "/dev/stderr"
+                }
+
+                generated = mask
+                sub(reg_src, reg_div, generated)
+
+                if (0) {
+                    printf "/* rsrc " reg_src " */\n"
+                    printf "/* rdiv " reg_div " */\n"
+                    printf "/* shift " shift " */\n"
+                    printf "/* mask " mask " */\n"
+                    printf "/* generated " generated " */\n"
+                }
+
+                if (reg_div != "") {
+                    printf "\t.reg_div = { "
+                    printf ".reg = " reg_div ", "
+                    printf ".shift = " dmask[generated,1] ", "
+                    printf ".size = " dmask[generated,0] ", "
+                    printf "},\n"
+                }
+
+                printf "\t.reg_src = { "
+                printf ".reg = " reg_src ", "
+                printf ".shift = " dmask[mask,1] ", "
+                printf ".size = " dmask[mask,0] ", "
+
+                printf "},\n"
+
+            }
+
+            print line
+        } else {
+            print line
+        }
+
+        if (0)
+            printf indent ":" line "\n" > "/dev/stderr"
+    }
+}
+
+// && ! /clksrc_clk.*=.*{/ { print $0 }
diff --git a/Documentation/cgroups/cgroup_event_listener.c b/Documentation/cgroups/cgroup_event_listener.c
new file mode 100644
index 000000000000..8c2bfc4a6358
--- /dev/null
+++ b/Documentation/cgroups/cgroup_event_listener.c
@@ -0,0 +1,110 @@
+/*
+ * cgroup_event_listener.c - Simple listener of cgroup events
+ *
+ * Copyright (C) Kirill A. Shutemov <kirill@shutemov.name>
+ */
+
+#include <assert.h>
+#include <errno.h>
+#include <fcntl.h>
+#include <libgen.h>
+#include <limits.h>
+#include <stdio.h>
+#include <string.h>
+#include <unistd.h>
+
+#include <sys/eventfd.h>
+
+#define USAGE_STR "Usage: cgroup_event_listener <path-to-control-file> <args>\n"
+
+int main(int argc, char **argv)
+{
+        int efd = -1;
+        int cfd = -1;
+        int event_control = -1;
+        char event_control_path[PATH_MAX];
+        char line[LINE_MAX];
+        int ret;
+
+        if (argc != 3) {
+                fputs(USAGE_STR, stderr);
+                return 1;
+        }
+
+        cfd = open(argv[1], O_RDONLY);
+        if (cfd == -1) {
+                fprintf(stderr, "Cannot open %s: %s\n", argv[1],
+                                strerror(errno));
+                goto out;
+        }
+
+        ret = snprintf(event_control_path, PATH_MAX, "%s/cgroup.event_control",
+                        dirname(argv[1]));
+        if (ret >= PATH_MAX) {
+                fputs("Path to cgroup.event_control is too long\n", stderr);
+                goto out;
+        }
+
+        event_control = open(event_control_path, O_WRONLY);
+        if (event_control == -1) {
+                fprintf(stderr, "Cannot open %s: %s\n", event_control_path,
+                                strerror(errno));
+                goto out;
+        }
+
+        efd = eventfd(0, 0);
+        if (efd == -1) {
+                perror("eventfd() failed");
+                goto out;
+        }
+
+        ret = snprintf(line, LINE_MAX, "%d %d %s", efd, cfd, argv[2]);
+        if (ret >= LINE_MAX) {
+                fputs("Arguments string is too long\n", stderr);
+                goto out;
+        }
+
+        ret = write(event_control, line, strlen(line) + 1);
+        if (ret == -1) {
+                perror("Cannot write to cgroup.event_control");
+                goto out;
+        }
+
+        while (1) {
+                uint64_t result;
+
+                ret = read(efd, &result, sizeof(result));
+                if (ret == -1) {
+                        if (errno == EINTR)
+                                continue;
+                        perror("Cannot read from eventfd");
+                        break;
+                }
+                assert(ret == sizeof(result));
+
+                ret = access(event_control_path, W_OK);
+                if ((ret == -1) && (errno == ENOENT)) {
+                                puts("The cgroup seems to have removed.");
+                                ret = 0;
+                                break;
+                }
+
+                if (ret == -1) {
+                        perror("cgroup.event_control "
+                                        "is not accessable any more");
+                        break;
+                }
+
+                printf("%s %s: crossed\n", argv[1], argv[2]);
+        }
+
+out:
+        if (efd >= 0)
+                close(efd);
+        if (event_control >= 0)
+                close(event_control);
+        if (cfd >= 0)
+                close(cfd);
+
+        return (ret != 0);
+}
diff --git a/Documentation/cgroups/cgroups.txt b/Documentation/cgroups/cgroups.txt
index 0b33bfe7dde9..fd588ff0e296 100644
--- a/Documentation/cgroups/cgroups.txt
+++ b/Documentation/cgroups/cgroups.txt
@@ -22,6 +22,8 @@ CONTENTS:
 2. Usage Examples and Syntax
   2.1 Basic Usage
   2.2 Attaching processes
+  2.3 Mounting hierarchies by name
+  2.4 Notification API
 3. Kernel API
   3.1 Overview
   3.2 Synchronization
@@ -434,6 +436,25 @@ you give a subsystem a name.
 The name of the subsystem appears as part of the hierarchy description
 in /proc/mounts and /proc/<pid>/cgroups.
 
+2.4 Notification API
+--------------------
+
+There is mechanism which allows to get notifications about changing
+status of a cgroup.
+
+To register new notification handler you need:
+ - create a file descriptor for event notification using eventfd(2);
+ - open a control file to be monitored (e.g. memory.usage_in_bytes);
+ - write "<event_fd> <control_fd> <args>" to cgroup.event_control.
+   Interpretation of args is defined by control file implementation;
+
+eventfd will be woken up by control file implementation or when the
+cgroup is removed.
+
+To unregister notification handler just close eventfd.
+
+NOTE: Support of notifications should be implemented for the control
+file. See documentation for the subsystem.
 
 3. Kernel API
 =============
@@ -488,6 +509,11 @@ Each subsystem should:
 - add an entry in linux/cgroup_subsys.h
 - define a cgroup_subsys object called <name>_subsys
 
+If a subsystem can be compiled as a module, it should also have in its
+module initcall a call to cgroup_load_subsys(), and in its exitcall a
+call to cgroup_unload_subsys(). It should also set its_subsys.module =
+THIS_MODULE in its .c file.
+
 Each subsystem may export the following methods. The only mandatory
 methods are create/destroy. Any others that are null are presumed to
 be successful no-ops.
@@ -536,10 +562,21 @@ returns an error, this will abort the attach operation.  If a NULL
 task is passed, then a successful result indicates that *any*
 unspecified task can be moved into the cgroup. Note that this isn't
 called on a fork. If this method returns 0 (success) then this should
-remain valid while the caller holds cgroup_mutex. If threadgroup is
+remain valid while the caller holds cgroup_mutex and it is ensured that either
+attach() or cancel_attach() will be called in future. If threadgroup is
 true, then a successful result indicates that all threads in the given
 thread's threadgroup can be moved together.
 
+void cancel_attach(struct cgroup_subsys *ss, struct cgroup *cgrp,
+               struct task_struct *task, bool threadgroup)
+(cgroup_mutex held by caller)
+
+Called when a task attach operation has failed after can_attach() has succeeded.
+A subsystem whose can_attach() has some side-effects should provide this
+function, so that the subsytem can implement a rollback. If not, not necessary.
+This will be called only about subsystems whose can_attach() operation have
+succeeded.
+
 void attach(struct cgroup_subsys *ss, struct cgroup *cgrp,
             struct cgroup *old_cgrp, struct task_struct *task,
             bool threadgroup)
diff --git a/Documentation/cgroups/cpusets.txt b/Documentation/cgroups/cpusets.txt
index 1d7e9784439a..4160df82b3f5 100644
--- a/Documentation/cgroups/cpusets.txt
+++ b/Documentation/cgroups/cpusets.txt
@@ -168,20 +168,20 @@ Each cpuset is represented by a directory in the cgroup file system
 containing (on top of the standard cgroup files) the following
 files describing that cpuset:
 
- - cpus: list of CPUs in that cpuset
- - mems: list of Memory Nodes in that cpuset
- - memory_migrate flag: if set, move pages to cpusets nodes
- - cpu_exclusive flag: is cpu placement exclusive?
- - mem_exclusive flag: is memory placement exclusive?
- - mem_hardwall flag:  is memory allocation hardwalled
- - memory_pressure: measure of how much paging pressure in cpuset
- - memory_spread_page flag: if set, spread page cache evenly on allowed nodes
- - memory_spread_slab flag: if set, spread slab cache evenly on allowed nodes
- - sched_load_balance flag: if set, load balance within CPUs on that cpuset
- - sched_relax_domain_level: the searching range when migrating tasks
+ - cpuset.cpus: list of CPUs in that cpuset
+ - cpuset.mems: list of Memory Nodes in that cpuset
+ - cpuset.memory_migrate flag: if set, move pages to cpusets nodes
+ - cpuset.cpu_exclusive flag: is cpu placement exclusive?
+ - cpuset.mem_exclusive flag: is memory placement exclusive?
+ - cpuset.mem_hardwall flag:  is memory allocation hardwalled
+ - cpuset.memory_pressure: measure of how much paging pressure in cpuset
+ - cpuset.memory_spread_page flag: if set, spread page cache evenly on allowed nodes
+ - cpuset.memory_spread_slab flag: if set, spread slab cache evenly on allowed nodes
+ - cpuset.sched_load_balance flag: if set, load balance within CPUs on that cpuset
+ - cpuset.sched_relax_domain_level: the searching range when migrating tasks
 
 In addition, the root cpuset only has the following file:
- - memory_pressure_enabled flag: compute memory_pressure?
+ - cpuset.memory_pressure_enabled flag: compute memory_pressure?
 
 New cpusets are created using the mkdir system call or shell
 command.  The properties of a cpuset, such as its flags, allowed
@@ -229,7 +229,7 @@ If a cpuset is cpu or mem exclusive, no other cpuset, other than
 a direct ancestor or descendant, may share any of the same CPUs or
 Memory Nodes.
 
-A cpuset that is mem_exclusive *or* mem_hardwall is "hardwalled",
+A cpuset that is cpuset.mem_exclusive *or* cpuset.mem_hardwall is "hardwalled",
 i.e. it restricts kernel allocations for page, buffer and other data
 commonly shared by the kernel across multiple users.  All cpusets,
 whether hardwalled or not, restrict allocations of memory for user
@@ -304,15 +304,15 @@ times 1000.
 ---------------------------
 There are two boolean flag files per cpuset that control where the
 kernel allocates pages for the file system buffers and related in
-kernel data structures.  They are called 'memory_spread_page' and
-'memory_spread_slab'.
+kernel data structures.  They are called 'cpuset.memory_spread_page' and
+'cpuset.memory_spread_slab'.
 
-If the per-cpuset boolean flag file 'memory_spread_page' is set, then
+If the per-cpuset boolean flag file 'cpuset.memory_spread_page' is set, then
 the kernel will spread the file system buffers (page cache) evenly
 over all the nodes that the faulting task is allowed to use, instead
 of preferring to put those pages on the node where the task is running.
 
-If the per-cpuset boolean flag file 'memory_spread_slab' is set,
+If the per-cpuset boolean flag file 'cpuset.memory_spread_slab' is set,
 then the kernel will spread some file system related slab caches,
 such as for inodes and dentries evenly over all the nodes that the
 faulting task is allowed to use, instead of preferring to put those
@@ -337,21 +337,21 @@ their containing tasks memory spread settings.  If memory spreading
 is turned off, then the currently specified NUMA mempolicy once again
 applies to memory page allocations.
 
-Both 'memory_spread_page' and 'memory_spread_slab' are boolean flag
+Both 'cpuset.memory_spread_page' and 'cpuset.memory_spread_slab' are boolean flag
 files.  By default they contain "0", meaning that the feature is off
 for that cpuset.  If a "1" is written to that file, then that turns
 the named feature on.
 
 The implementation is simple.
 
-Setting the flag 'memory_spread_page' turns on a per-process flag
+Setting the flag 'cpuset.memory_spread_page' turns on a per-process flag
 PF_SPREAD_PAGE for each task that is in that cpuset or subsequently
 joins that cpuset.  The page allocation calls for the page cache
 is modified to perform an inline check for this PF_SPREAD_PAGE task
 flag, and if set, a call to a new routine cpuset_mem_spread_node()
 returns the node to prefer for the allocation.
 
-Similarly, setting 'memory_spread_slab' turns on the flag
+Similarly, setting 'cpuset.memory_spread_slab' turns on the flag
 PF_SPREAD_SLAB, and appropriately marked slab caches will allocate
 pages from the node returned by cpuset_mem_spread_node().
 
@@ -404,24 +404,24 @@ the following two situations:
     system overhead on those CPUs, including avoiding task load
     balancing if that is not needed.
 
-When the per-cpuset flag "sched_load_balance" is enabled (the default
-setting), it requests that all the CPUs in that cpusets allowed 'cpus'
+When the per-cpuset flag "cpuset.sched_load_balance" is enabled (the default
+setting), it requests that all the CPUs in that cpusets allowed 'cpuset.cpus'
 be contained in a single sched domain, ensuring that load balancing
 can move a task (not otherwised pinned, as by sched_setaffinity)
 from any CPU in that cpuset to any other.
 
-When the per-cpuset flag "sched_load_balance" is disabled, then the
+When the per-cpuset flag "cpuset.sched_load_balance" is disabled, then the
 scheduler will avoid load balancing across the CPUs in that cpuset,
 --except-- in so far as is necessary because some overlapping cpuset
 has "sched_load_balance" enabled.
 
-So, for example, if the top cpuset has the flag "sched_load_balance"
+So, for example, if the top cpuset has the flag "cpuset.sched_load_balance"
 enabled, then the scheduler will have one sched domain covering all
-CPUs, and the setting of the "sched_load_balance" flag in any other
+CPUs, and the setting of the "cpuset.sched_load_balance" flag in any other
 cpusets won't matter, as we're already fully load balancing.
 
 Therefore in the above two situations, the top cpuset flag
-"sched_load_balance" should be disabled, and only some of the smaller,
+"cpuset.sched_load_balance" should be disabled, and only some of the smaller,
 child cpusets have this flag enabled.
 
 When doing this, you don't usually want to leave any unpinned tasks in
@@ -433,7 +433,7 @@ scheduler might not consider the possibility of load balancing that
 task to that underused CPU.
 
 Of course, tasks pinned to a particular CPU can be left in a cpuset
-that disables "sched_load_balance" as those tasks aren't going anywhere
+that disables "cpuset.sched_load_balance" as those tasks aren't going anywhere
 else anyway.
 
 There is an impedance mismatch here, between cpusets and sched domains.
@@ -443,19 +443,19 @@ overlap and each CPU is in at most one sched domain.
 It is necessary for sched domains to be flat because load balancing
 across partially overlapping sets of CPUs would risk unstable dynamics
 that would be beyond our understanding.  So if each of two partially
-overlapping cpusets enables the flag 'sched_load_balance', then we
+overlapping cpusets enables the flag 'cpuset.sched_load_balance', then we
 form a single sched domain that is a superset of both.  We won't move
 a task to a CPU outside it cpuset, but the scheduler load balancing
 code might waste some compute cycles considering that possibility.
 
 This mismatch is why there is not a simple one-to-one relation
-between which cpusets have the flag "sched_load_balance" enabled,
+between which cpusets have the flag "cpuset.sched_load_balance" enabled,
 and the sched domain configuration.  If a cpuset enables the flag, it
 will get balancing across all its CPUs, but if it disables the flag,
 it will only be assured of no load balancing if no other overlapping
 cpuset enables the flag.
 
-If two cpusets have partially overlapping 'cpus' allowed, and only
+If two cpusets have partially overlapping 'cpuset.cpus' allowed, and only
 one of them has this flag enabled, then the other may find its
 tasks only partially load balanced, just on the overlapping CPUs.
 This is just the general case of the top_cpuset example given a few
@@ -468,23 +468,23 @@ load balancing to the other CPUs.
 1.7.1 sched_load_balance implementation details.
 ------------------------------------------------
 
-The per-cpuset flag 'sched_load_balance' defaults to enabled (contrary
+The per-cpuset flag 'cpuset.sched_load_balance' defaults to enabled (contrary
 to most cpuset flags.)  When enabled for a cpuset, the kernel will
 ensure that it can load balance across all the CPUs in that cpuset
 (makes sure that all the CPUs in the cpus_allowed of that cpuset are
 in the same sched domain.)
 
-If two overlapping cpusets both have 'sched_load_balance' enabled,
+If two overlapping cpusets both have 'cpuset.sched_load_balance' enabled,
 then they will be (must be) both in the same sched domain.
 
-If, as is the default, the top cpuset has 'sched_load_balance' enabled,
+If, as is the default, the top cpuset has 'cpuset.sched_load_balance' enabled,
 then by the above that means there is a single sched domain covering
 the whole system, regardless of any other cpuset settings.
 
 The kernel commits to user space that it will avoid load balancing
 where it can.  It will pick as fine a granularity partition of sched
 domains as it can while still providing load balancing for any set
-of CPUs allowed to a cpuset having 'sched_load_balance' enabled.
+of CPUs allowed to a cpuset having 'cpuset.sched_load_balance' enabled.
 
 The internal kernel cpuset to scheduler interface passes from the
 cpuset code to the scheduler code a partition of the load balanced
@@ -495,9 +495,9 @@ all the CPUs that must be load balanced.
 The cpuset code builds a new such partition and passes it to the
 scheduler sched domain setup code, to have the sched domains rebuilt
 as necessary, whenever:
- - the 'sched_load_balance' flag of a cpuset with non-empty CPUs changes,
+ - the 'cpuset.sched_load_balance' flag of a cpuset with non-empty CPUs changes,
  - or CPUs come or go from a cpuset with this flag enabled,
- - or 'sched_relax_domain_level' value of a cpuset with non-empty CPUs
+ - or 'cpuset.sched_relax_domain_level' value of a cpuset with non-empty CPUs
    and with this flag enabled changes,
  - or a cpuset with non-empty CPUs and with this flag enabled is removed,
  - or a cpu is offlined/onlined.
@@ -542,7 +542,7 @@ As the result, task B on CPU X need to wait task A or wait load balance
 on the next tick.  For some applications in special situation, waiting
 1 tick may be too long.
 
-The 'sched_relax_domain_level' file allows you to request changing
+The 'cpuset.sched_relax_domain_level' file allows you to request changing
 this searching range as you like.  This file takes int value which
 indicates size of searching range in levels ideally as follows,
 otherwise initial value -1 that indicates the cpuset has no request.
@@ -559,8 +559,8 @@ The system default is architecture dependent.  The system default
 can be changed using the relax_domain_level= boot parameter.
 
 This file is per-cpuset and affect the sched domain where the cpuset
-belongs to.  Therefore if the flag 'sched_load_balance' of a cpuset
-is disabled, then 'sched_relax_domain_level' have no effect since
+belongs to.  Therefore if the flag 'cpuset.sched_load_balance' of a cpuset
+is disabled, then 'cpuset.sched_relax_domain_level' have no effect since
 there is no sched domain belonging the cpuset.
 
 If multiple cpusets are overlapping and hence they form a single sched
@@ -607,9 +607,9 @@ from one cpuset to another, then the kernel will adjust the tasks
 memory placement, as above, the next time that the kernel attempts
 to allocate a page of memory for that task.
 
-If a cpuset has its 'cpus' modified, then each task in that cpuset
+If a cpuset has its 'cpuset.cpus' modified, then each task in that cpuset
 will have its allowed CPU placement changed immediately.  Similarly,
-if a tasks pid is written to another cpusets 'tasks' file, then its
+if a tasks pid is written to another cpusets 'cpuset.tasks' file, then its
 allowed CPU placement is changed immediately.  If such a task had been
 bound to some subset of its cpuset using the sched_setaffinity() call,
 the task will be allowed to run on any CPU allowed in its new cpuset,
@@ -622,8 +622,8 @@ and the processor placement is updated immediately.
 Normally, once a page is allocated (given a physical page
 of main memory) then that page stays on whatever node it
 was allocated, so long as it remains allocated, even if the
-cpusets memory placement policy 'mems' subsequently changes.
-If the cpuset flag file 'memory_migrate' is set true, then when
+cpusets memory placement policy 'cpuset.mems' subsequently changes.
+If the cpuset flag file 'cpuset.memory_migrate' is set true, then when
 tasks are attached to that cpuset, any pages that task had
 allocated to it on nodes in its previous cpuset are migrated
 to the tasks new cpuset. The relative placement of the page within
@@ -631,12 +631,12 @@ the cpuset is preserved during these migration operations if possible.
 For example if the page was on the second valid node of the prior cpuset
 then the page will be placed on the second valid node of the new cpuset.
 
-Also if 'memory_migrate' is set true, then if that cpusets
-'mems' file is modified, pages allocated to tasks in that
-cpuset, that were on nodes in the previous setting of 'mems',
+Also if 'cpuset.memory_migrate' is set true, then if that cpusets
+'cpuset.mems' file is modified, pages allocated to tasks in that
+cpuset, that were on nodes in the previous setting of 'cpuset.mems',
 will be moved to nodes in the new setting of 'mems.'
 Pages that were not in the tasks prior cpuset, or in the cpusets
-prior 'mems' setting, will not be moved.
+prior 'cpuset.mems' setting, will not be moved.
 
 There is an exception to the above.  If hotplug functionality is used
 to remove all the CPUs that are currently assigned to a cpuset,
@@ -678,8 +678,8 @@ and then start a subshell 'sh' in that cpuset:
   cd /dev/cpuset
   mkdir Charlie
   cd Charlie
-  /bin/echo 2-3 > cpus
-  /bin/echo 1 > mems
+  /bin/echo 2-3 > cpuset.cpus
+  /bin/echo 1 > cpuset.mems
   /bin/echo $$ > tasks
   sh
   # The subshell 'sh' is now running in cpuset Charlie
@@ -725,10 +725,13 @@ Now you want to do something with this cpuset.
 
 In this directory you can find several files:
 # ls
-cpu_exclusive  memory_migrate      mems                      tasks
-cpus           memory_pressure     notify_on_release
-mem_exclusive  memory_spread_page  sched_load_balance
-mem_hardwall   memory_spread_slab  sched_relax_domain_level
+cpuset.cpu_exclusive       cpuset.memory_spread_slab
+cpuset.cpus                cpuset.mems
+cpuset.mem_exclusive       cpuset.sched_load_balance
+cpuset.mem_hardwall        cpuset.sched_relax_domain_level
+cpuset.memory_migrate      notify_on_release
+cpuset.memory_pressure     tasks
+cpuset.memory_spread_page
 
 Reading them will give you information about the state of this cpuset:
 the CPUs and Memory Nodes it can use, the processes that are using
@@ -736,13 +739,13 @@ it, its properties.  By writing to these files you can manipulate
 the cpuset.
 
 Set some flags:
-# /bin/echo 1 > cpu_exclusive
+# /bin/echo 1 > cpuset.cpu_exclusive
 
 Add some cpus:
-# /bin/echo 0-7 > cpus
+# /bin/echo 0-7 > cpuset.cpus
 
 Add some mems:
-# /bin/echo 0-7 > mems
+# /bin/echo 0-7 > cpuset.mems
 
 Now attach your shell to this cpuset:
 # /bin/echo $$ > tasks
@@ -774,28 +777,28 @@ echo "/sbin/cpuset_release_agent" > /dev/cpuset/release_agent
 This is the syntax to use when writing in the cpus or mems files
 in cpuset directories:
 
-# /bin/echo 1-4 > cpus          -> set cpus list to cpus 1,2,3,4
-# /bin/echo 1,2,3,4 > cpus      -> set cpus list to cpus 1,2,3,4
+# /bin/echo 1-4 > cpuset.cpus           -> set cpus list to cpus 1,2,3,4
+# /bin/echo 1,2,3,4 > cpuset.cpus       -> set cpus list to cpus 1,2,3,4
 
 To add a CPU to a cpuset, write the new list of CPUs including the
 CPU to be added. To add 6 to the above cpuset:
 
-# /bin/echo 1-4,6 > cpus        -> set cpus list to cpus 1,2,3,4,6
+# /bin/echo 1-4,6 > cpuset.cpus -> set cpus list to cpus 1,2,3,4,6
 
 Similarly to remove a CPU from a cpuset, write the new list of CPUs
 without the CPU to be removed.
 
 To remove all the CPUs:
 
-# /bin/echo "" > cpus           -> clear cpus list
+# /bin/echo "" > cpuset.cpus            -> clear cpus list
 
 2.3 Setting flags
 -----------------
 
 The syntax is very simple:
 
-# /bin/echo 1 > cpu_exclusive   -> set flag 'cpu_exclusive'
-# /bin/echo 0 > cpu_exclusive   -> unset flag 'cpu_exclusive'
+# /bin/echo 1 > cpuset.cpu_exclusive    -> set flag 'cpuset.cpu_exclusive'
+# /bin/echo 0 > cpuset.cpu_exclusive    -> unset flag 'cpuset.cpu_exclusive'
 
 2.4 Attaching processes
 -----------------------
diff --git a/Documentation/cgroups/memcg_test.txt b/Documentation/cgroups/memcg_test.txt
index 72db89ed0609..f7f68b2ac199 100644
--- a/Documentation/cgroups/memcg_test.txt
+++ b/Documentation/cgroups/memcg_test.txt
@@ -1,6 +1,6 @@
 Memory Resource Controller(Memcg)  Implementation Memo.
-Last Updated: 2009/1/20
-Base Kernel Version: based on 2.6.29-rc2.
+Last Updated: 2010/2
+Base Kernel Version: based on 2.6.33-rc7-mm(candidate for 34).
 
 Because VM is getting complex (one of reasons is memcg...), memcg's behavior
 is complex. This is a document for memcg's internal behavior.
@@ -337,7 +337,7 @@ Under below explanation, we assume CONFIG_MEM_RES_CTRL_SWAP=y.
         race and lock dependency with other cgroup subsystems.
 
         example)
-        # mount -t cgroup none /cgroup -t cpuset,memory,cpu,devices
+        # mount -t cgroup none /cgroup -o cpuset,memory,cpu,devices
 
         and do task move, mkdir, rmdir etc...under this.
 
@@ -348,7 +348,7 @@ Under below explanation, we assume CONFIG_MEM_RES_CTRL_SWAP=y.
 
         For example, test like following is good.
         (Shell-A)
-        # mount -t cgroup none /cgroup -t memory
+        # mount -t cgroup none /cgroup -o memory
         # mkdir /cgroup/test
         # echo 40M > /cgroup/test/memory.limit_in_bytes
         # echo 0 > /cgroup/test/tasks
@@ -378,3 +378,42 @@ Under below explanation, we assume CONFIG_MEM_RES_CTRL_SWAP=y.
         #echo 50M > memory.limit_in_bytes
         #echo 50M > memory.memsw.limit_in_bytes
         run 51M of malloc
+
+ 9.9 Move charges at task migration
+        Charges associated with a task can be moved along with task migration.
+
+        (Shell-A)
+        #mkdir /cgroup/A
+        #echo $$ >/cgroup/A/tasks
+        run some programs which uses some amount of memory in /cgroup/A.
+
+        (Shell-B)
+        #mkdir /cgroup/B
+        #echo 1 >/cgroup/B/memory.move_charge_at_immigrate
+        #echo "pid of the program running in group A" >/cgroup/B/tasks
+
+        You can see charges have been moved by reading *.usage_in_bytes or
+        memory.stat of both A and B.
+        See 8.2 of Documentation/cgroups/memory.txt to see what value should be
+        written to move_charge_at_immigrate.
+
+ 9.10 Memory thresholds
+        Memory controler implements memory thresholds using cgroups notification
+        API. You can use Documentation/cgroups/cgroup_event_listener.c to test
+        it.
+
+        (Shell-A) Create cgroup and run event listener
+        # mkdir /cgroup/A
+        # ./cgroup_event_listener /cgroup/A/memory.usage_in_bytes 5M
+
+        (Shell-B) Add task to cgroup and try to allocate and free memory
+        # echo $$ >/cgroup/A/tasks
+        # a="$(dd if=/dev/zero bs=1M count=10)"
+        # a=
+
+        You will see message from cgroup_event_listener every time you cross
+        the thresholds.
+
+        Use /cgroup/A/memory.memsw.usage_in_bytes to test memsw thresholds.
+
+        It's good idea to test root cgroup as well.
diff --git a/Documentation/cgroups/memory.txt b/Documentation/cgroups/memory.txt
index b871f2552b45..f8bc802d70b9 100644
--- a/Documentation/cgroups/memory.txt
+++ b/Documentation/cgroups/memory.txt
@@ -182,6 +182,8 @@ list.
 NOTE: Reclaim does not work for the root cgroup, since we cannot set any
 limits on the root cgroup.
 
+Note2: When panic_on_oom is set to "2", the whole system will panic.
+
 2. Locking
 
 The memory controller uses the following hierarchy
@@ -262,10 +264,12 @@ some of the pages cached in the cgroup (page cache pages).
 4.2 Task migration
 
 When a task migrates from one cgroup to another, it's charge is not
-carried forward. The pages allocated from the original cgroup still
+carried forward by default. The pages allocated from the original cgroup still
 remain charged to it, the charge is dropped when the page is freed or
 reclaimed.
 
+Note: You can move charges of a task along with task migration. See 8.
+
 4.3 Removing a cgroup
 
 A cgroup can be removed by rmdir, but as discussed in sections 4.1 and 4.2, a
@@ -377,7 +381,8 @@ The feature can be disabled by
 NOTE1: Enabling/disabling will fail if the cgroup already has other
 cgroups created below it.
 
-NOTE2: This feature can be enabled/disabled per subtree.
+NOTE2: When panic_on_oom is set to "2", the whole system will panic in
+case of an oom event in any cgroup.
 
 7. Soft limits
 
@@ -414,7 +419,76 @@ NOTE1: Soft limits take effect over a long period of time, since they involve
 NOTE2: It is recommended to set the soft limit always below the hard limit,
        otherwise the hard limit will take precedence.
 
-8. TODO
+8. Move charges at task migration
+
+Users can move charges associated with a task along with task migration, that
+is, uncharge task's pages from the old cgroup and charge them to the new cgroup.
+This feature is not supported in !CONFIG_MMU environments because of lack of
+page tables.
+
+8.1 Interface
+
+This feature is disabled by default. It can be enabled(and disabled again) by
+writing to memory.move_charge_at_immigrate of the destination cgroup.
+
+If you want to enable it:
+
+# echo (some positive value) > memory.move_charge_at_immigrate
+
+Note: Each bits of move_charge_at_immigrate has its own meaning about what type
+      of charges should be moved. See 8.2 for details.
+Note: Charges are moved only when you move mm->owner, IOW, a leader of a thread
+      group.
+Note: If we cannot find enough space for the task in the destination cgroup, we
+      try to make space by reclaiming memory. Task migration may fail if we
+      cannot make enough space.
+Note: It can take several seconds if you move charges in giga bytes order.
+
+And if you want disable it again:
+
+# echo 0 > memory.move_charge_at_immigrate
+
+8.2 Type of charges which can be move
+
+Each bits of move_charge_at_immigrate has its own meaning about what type of
+charges should be moved.
+
+  bit | what type of charges would be moved ?
+ -----+------------------------------------------------------------------------
+   0  | A charge of an anonymous page(or swap of it) used by the target task.
+      | Those pages and swaps must be used only by the target task. You must
+      | enable Swap Extension(see 2.4) to enable move of swap charges.
+
+Note: Those pages and swaps must be charged to the old cgroup.
+Note: More type of pages(e.g. file cache, shmem,) will be supported by other
+      bits in future.
+
+8.3 TODO
+
+- Add support for other types of pages(e.g. file cache, shmem, etc.).
+- Implement madvise(2) to let users decide the vma to be moved or not to be
+  moved.
+- All of moving charge operations are done under cgroup_mutex. It's not good
+  behavior to hold the mutex too long, so we may need some trick.
+
+9. Memory thresholds
+
+Memory controler implements memory thresholds using cgroups notification
+API (see cgroups.txt). It allows to register multiple memory and memsw
+thresholds and gets notifications when it crosses.
+
+To register a threshold application need:
+ - create an eventfd using eventfd(2);
+ - open memory.usage_in_bytes or memory.memsw.usage_in_bytes;
+ - write string like "<event_fd> <memory.usage_in_bytes> <threshold>" to
+   cgroup.event_control.
+
+Application will be notified through eventfd when memory usage crosses
+threshold in any direction.
+
+It's applicable for root and non-root cgroup.
+
+10. TODO
 
 1. Add support for accounting huge pages (as a separate controller)
 2. Make per-cgroup scanner reclaim not-shared pages first
diff --git a/Documentation/console/console.txt b/Documentation/console/console.txt
index 877a1b26cc3d..926cf1b5e63e 100644
--- a/Documentation/console/console.txt
+++ b/Documentation/console/console.txt
@@ -74,7 +74,7 @@ driver takes over the consoles vacated by the driver. Binding, on the other
 hand, will bind the driver to the consoles that are currently occupied by a
 system driver.
 
-NOTE1: Binding and binding must be selected in Kconfig. It's under:
+NOTE1: Binding and unbinding must be selected in Kconfig. It's under:
 
 Device Drivers -> Character devices -> Support for binding and unbinding
 console drivers
diff --git a/Documentation/driver-model/platform.txt b/Documentation/driver-model/platform.txt
index 2e2c2ea90ceb..41f41632ee55 100644
--- a/Documentation/driver-model/platform.txt
+++ b/Documentation/driver-model/platform.txt
@@ -192,7 +192,7 @@ command line. This will execute all matching early_param() callbacks.
 User specified early platform devices will be registered at this point.
 For the early serial console case the user can specify port on the
 kernel command line as "earlyprintk=serial.0" where "earlyprintk" is
-the class string, "serial" is the name of the platfrom driver and
+the class string, "serial" is the name of the platform driver and
 0 is the platform device id. If the id is -1 then the dot and the
 id can be omitted.
 
diff --git a/Documentation/eisa.txt b/Documentation/eisa.txt
index 60e361ba08c0..f297fc1202ae 100644
--- a/Documentation/eisa.txt
+++ b/Documentation/eisa.txt
@@ -171,7 +171,7 @@ device.
 virtual_root.force_probe :
 
 Force the probing code to probe EISA slots even when it cannot find an
-EISA compliant mainboard (nothing appears on slot 0). Defaultd to 0
+EISA compliant mainboard (nothing appears on slot 0). Defaults to 0
 (don't force), and set to 1 (force probing) when either
 CONFIG_ALPHA_JENSEN or CONFIG_EISA_VLB_PRIMING are set.
 
diff --git a/Documentation/email-clients.txt b/Documentation/email-clients.txt
index a618efab7b15..945ff3fda433 100644
--- a/Documentation/email-clients.txt
+++ b/Documentation/email-clients.txt
@@ -216,26 +216,14 @@ Works.  Use "Insert file..." or external editor.
 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
 Gmail (Web GUI)
 
-If you just have to use Gmail to send patches, it CAN be made to work.  It
-requires a bit of external help, though.
-
-The first problem is that Gmail converts tabs to spaces.  This will
-totally break your patches.  To prevent this, you have to use a different
-editor.  There is a firefox extension called "ViewSourceWith"
-(https://addons.mozilla.org/en-US/firefox/addon/394) which allows you to
-edit any text box in the editor of your choice.  Configure it to launch
-your favorite editor.  When you want to send a patch, use this technique.
-Once you have crafted your messsage + patch, save and exit the editor,
-which should reload the Gmail edit box.  GMAIL WILL PRESERVE THE TABS.
-Hoorah.  Apparently you can cut-n-paste literal tabs, but Gmail will
-convert those to spaces upon sending!
-
-The second problem is that Gmail converts tabs to spaces on replies.  If
-you reply to a patch, don't expect to be able to apply it as a patch.
-
-The last problem is that Gmail will base64-encode any message that has a
-non-ASCII character.  That includes things like European names.  Be aware.
-
-Gmail is not convenient for lkml patches, but CAN be made to work.
+Does not work for sending patches.
+
+Gmail web client converts tabs to spaces automatically.
+
+At the same time it wraps lines every 78 chars with CRLF style line breaks
+although tab2space problem can be solved with external editor.
+
+Another problem is that Gmail will base64-encode any message that has a
+non-ASCII character. That includes things like European names.
 
                                 ###
diff --git a/Documentation/filesystems/00-INDEX b/Documentation/filesystems/00-INDEX
index 5139b8c9d5af..3bae418c6ad3 100644
--- a/Documentation/filesystems/00-INDEX
+++ b/Documentation/filesystems/00-INDEX
@@ -32,6 +32,8 @@ dlmfs.txt
         - info on the userspace interface to the OCFS2 DLM.
 dnotify.txt
         - info about directory notification in Linux.
+dnotify_test.c
+        - example program for dnotify
 ecryptfs.txt
         - docs on eCryptfs: stacked cryptographic filesystem for Linux.
 exofs.txt
diff --git a/Documentation/filesystems/Makefile b/Documentation/filesystems/Makefile
new file mode 100644
index 000000000000..a5dd114da14f
--- /dev/null
+++ b/Documentation/filesystems/Makefile
@@ -0,0 +1,8 @@
+# kbuild trick to avoid linker error. Can be omitted if a module is built.
+obj- := dummy.o
+
+# List of programs to build
+hostprogs-y := dnotify_test
+
+# Tell kbuild to always build the programs
+always := $(hostprogs-y)
diff --git a/Documentation/filesystems/dnotify.txt b/Documentation/filesystems/dnotify.txt
index 9f5d338ddbb8..6baf88f46859 100644
--- a/Documentation/filesystems/dnotify.txt
+++ b/Documentation/filesystems/dnotify.txt
@@ -62,38 +62,9 @@ disabled, fcntl(fd, F_NOTIFY, ...) will return -EINVAL.
 
 Example
 -------
+See Documentation/filesystems/dnotify_test.c for an example.
 
-        #define _GNU_SOURCE     /* needed to get the defines */
-        #include <fcntl.h>      /* in glibc 2.2 this has the needed
-                                           values defined */
-        #include <signal.h>
-        #include <stdio.h>
-        #include <unistd.h>
-
-        static volatile int event_fd;
-
-        static void handler(int sig, siginfo_t *si, void *data)
-        {
-                event_fd = si->si_fd;
-        }
-
-        int main(void)
-        {
-                struct sigaction act;
-                int fd;
-
-                act.sa_sigaction = handler;
-                sigemptyset(&act.sa_mask);
-                act.sa_flags = SA_SIGINFO;
-                sigaction(SIGRTMIN + 1, &act, NULL);
-
-                fd = open(".", O_RDONLY);
-                fcntl(fd, F_SETSIG, SIGRTMIN + 1);
-                fcntl(fd, F_NOTIFY, DN_MODIFY|DN_CREATE|DN_MULTISHOT);
-                /* we will now be notified if any of the files
-                   in "." is modified or new files are created */
-                while (1) {
-                        pause();
-                        printf("Got event on fd=%d\n", event_fd);
-                }
-        }
+NOTE
+----
+Beginning with Linux 2.6.13, dnotify has been replaced by inotify.
+See Documentation/filesystems/inotify.txt for more information on it.
diff --git a/Documentation/filesystems/dnotify_test.c b/Documentation/filesystems/dnotify_test.c
new file mode 100644
index 000000000000..8b37b4a1e18d
--- /dev/null
+++ b/Documentation/filesystems/dnotify_test.c
@@ -0,0 +1,34 @@
+#define _GNU_SOURCE     /* needed to get the defines */
+#include <fcntl.h>      /* in glibc 2.2 this has the needed
+                                   values defined */
+#include <signal.h>
+#include <stdio.h>
+#include <unistd.h>
+
+static volatile int event_fd;
+
+static void handler(int sig, siginfo_t *si, void *data)
+{
+        event_fd = si->si_fd;
+}
+
+int main(void)
+{
+        struct sigaction act;
+        int fd;
+
+        act.sa_sigaction = handler;
+        sigemptyset(&act.sa_mask);
+        act.sa_flags = SA_SIGINFO;
+        sigaction(SIGRTMIN + 1, &act, NULL);
+
+        fd = open(".", O_RDONLY);
+        fcntl(fd, F_SETSIG, SIGRTMIN + 1);
+        fcntl(fd, F_NOTIFY, DN_MODIFY|DN_CREATE|DN_MULTISHOT);
+        /* we will now be notified if any of the files
+           in "." is modified or new files are created */
+        while (1) {
+                pause();
+                printf("Got event on fd=%d\n", event_fd);
+        }
+}
diff --git a/Documentation/filesystems/proc.txt b/Documentation/filesystems/proc.txt
index 96a44dd95e03..a4f30faa4f1f 100644
--- a/Documentation/filesystems/proc.txt
+++ b/Documentation/filesystems/proc.txt
@@ -195,7 +195,7 @@ asynchronous manner and the vaule may not be very precise. To see a precise
 snapshot of a moment, you can see /proc/<pid>/smaps file and scan page table.
 It's slow but very precise.
 
-Table 1-2: Contents of the statm files (as of 2.6.30-rc7)
+Table 1-2: Contents of the status files (as of 2.6.30-rc7)
 ..............................................................................
  Field                       Content
  Name                        filename of the executable
diff --git a/Documentation/hwmon/abituguru b/Documentation/hwmon/abituguru
index 87ffa0f5ec70..5eb3b9d5f0d5 100644
--- a/Documentation/hwmon/abituguru
+++ b/Documentation/hwmon/abituguru
@@ -30,7 +30,7 @@ Supported chips:
            bank1_types=1,1,0,0,0,0,0,2,0,0,0,0,2,0,0,1
            You may also need to specify the fan_sensors option for these boards
            fan_sensors=5
-        2) There is a seperate abituguru3 driver for these motherboards,
+        2) There is a separate abituguru3 driver for these motherboards,
            the abituguru (without the 3 !) driver will not work on these
            motherboards (and visa versa)!
 
diff --git a/Documentation/input/rotary-encoder.txt b/Documentation/input/rotary-encoder.txt
index 3a6aec40c0b0..8b4129de1d2d 100644
--- a/Documentation/input/rotary-encoder.txt
+++ b/Documentation/input/rotary-encoder.txt
@@ -75,7 +75,7 @@ and the number of steps or will clamp at the maximum and zero depending on
 the configuration.
 
 Because GPIO to IRQ mapping is platform specific, this information must
-be given in seperately to the driver. See the example below.
+be given in separately to the driver. See the example below.
 
 ---------<snip>---------
 
diff --git a/Documentation/laptops/00-INDEX b/Documentation/laptops/00-INDEX
index ee5692b26dd4..fa688538e757 100644
--- a/Documentation/laptops/00-INDEX
+++ b/Documentation/laptops/00-INDEX
@@ -2,6 +2,12 @@
         - This file
 acer-wmi.txt
         - information on the Acer Laptop WMI Extras driver.
+asus-laptop.txt
+        - information on the Asus Laptop Extras driver.
+disk-shock-protection.txt
+        - information on hard disk shock protection.
+dslm.c
+        - Simple Disk Sleep Monitor program
 laptop-mode.txt
         - how to conserve battery power using laptop-mode.
 sony-laptop.txt
diff --git a/Documentation/laptops/Makefile b/Documentation/laptops/Makefile
new file mode 100644
index 000000000000..5cb144af3c09
--- /dev/null
+++ b/Documentation/laptops/Makefile
@@ -0,0 +1,8 @@
+# kbuild trick to avoid linker error. Can be omitted if a module is built.
+obj- := dummy.o
+
+# List of programs to build
+hostprogs-y := dslm
+
+# Tell kbuild to always build the programs
+always := $(hostprogs-y)
diff --git a/Documentation/laptops/dslm.c b/Documentation/laptops/dslm.c
new file mode 100644
index 000000000000..72ff290c5fc6
--- /dev/null
+++ b/Documentation/laptops/dslm.c
@@ -0,0 +1,166 @@
+/*
+ * dslm.c
+ * Simple Disk Sleep Monitor
+ *  by Bartek Kania
+ * Licenced under the GPL
+ */
+#include <unistd.h>
+#include <stdlib.h>
+#include <stdio.h>
+#include <fcntl.h>
+#include <errno.h>
+#include <time.h>
+#include <string.h>
+#include <signal.h>
+#include <sys/ioctl.h>
+#include <linux/hdreg.h>
+
+#ifdef DEBUG
+#define D(x) x
+#else
+#define D(x)
+#endif
+
+int endit = 0;
+
+/* Check if the disk is in powersave-mode
+ * Most of the code is stolen from hdparm.
+ * 1 = active, 0 = standby/sleep, -1 = unknown */
+static int check_powermode(int fd)
+{
+    unsigned char args[4] = {WIN_CHECKPOWERMODE1,0,0,0};
+    int state;
+
+    if (ioctl(fd, HDIO_DRIVE_CMD, &args)
+        && (args[0] = WIN_CHECKPOWERMODE2) /* try again with 0x98 */
+        && ioctl(fd, HDIO_DRIVE_CMD, &args)) {
+        if (errno != EIO || args[0] != 0 || args[1] != 0) {
+            state = -1; /* "unknown"; */
+        } else
+            state = 0; /* "sleeping"; */
+    } else {
+        state = (args[2] == 255) ? 1 : 0;
+    }
+    D(printf(" drive state is:  %d\n", state));
+
+    return state;
+}
+
+static char *state_name(int i)
+{
+    if (i == -1) return "unknown";
+    if (i == 0) return "sleeping";
+    if (i == 1) return "active";
+
+    return "internal error";
+}
+
+static char *myctime(time_t time)
+{
+    char *ts = ctime(&time);
+    ts[strlen(ts) - 1] = 0;
+
+    return ts;
+}
+
+static void measure(int fd)
+{
+    time_t start_time;
+    int last_state;
+    time_t last_time;
+    int curr_state;
+    time_t curr_time = 0;
+    time_t time_diff;
+    time_t active_time = 0;
+    time_t sleep_time = 0;
+    time_t unknown_time = 0;
+    time_t total_time = 0;
+    int changes = 0;
+    float tmp;
+
+    printf("Starting measurements\n");
+
+    last_state = check_powermode(fd);
+    start_time = last_time = time(0);
+    printf("  System is in state %s\n\n", state_name(last_state));
+
+    while(!endit) {
+        sleep(1);
+        curr_state = check_powermode(fd);
+
+        if (curr_state != last_state || endit) {
+            changes++;
+            curr_time = time(0);
+            time_diff = curr_time - last_time;
+
+            if (last_state == 1) active_time += time_diff;
+            else if (last_state == 0) sleep_time += time_diff;
+            else unknown_time += time_diff;
+
+            last_state = curr_state;
+            last_time = curr_time;
+
+            printf("%s: State-change to %s\n", myctime(curr_time),
+                   state_name(curr_state));
+        }
+    }
+    changes--; /* Compensate for SIGINT */
+
+    total_time = time(0) - start_time;
+    printf("\nTotal running time:  %lus\n", curr_time - start_time);
+    printf(" State changed %d times\n", changes);
+
+    tmp = (float)sleep_time / (float)total_time * 100;
+    printf(" Time in sleep state:   %lus (%.2f%%)\n", sleep_time, tmp);
+    tmp = (float)active_time / (float)total_time * 100;
+    printf(" Time in active state:  %lus (%.2f%%)\n", active_time, tmp);
+    tmp = (float)unknown_time / (float)total_time * 100;
+    printf(" Time in unknown state: %lus (%.2f%%)\n", unknown_time, tmp);
+}
+
+static void ender(int s)
+{
+    endit = 1;
+}
+
+static void usage(void)
+{
+    puts("usage: dslm [-w <time>] <disk>");
+    exit(0);
+}
+
+int main(int argc, char **argv)
+{
+    int fd;
+    char *disk = 0;
+    int settle_time = 60;
+
+    /* Parse the simple command-line */
+    if (argc == 2)
+        disk = argv[1];
+    else if (argc == 4) {
+        settle_time = atoi(argv[2]);
+        disk = argv[3];
+    } else
+        usage();
+
+    if (!(fd = open(disk, O_RDONLY|O_NONBLOCK))) {
+        printf("Can't open %s, because: %s\n", disk, strerror(errno));
+        exit(-1);
+    }
+
+    if (settle_time) {
+        printf("Waiting %d seconds for the system to settle down to "
+               "'normal'\n", settle_time);
+        sleep(settle_time);
+    } else
+        puts("Not waiting for system to settle down");
+
+    signal(SIGINT, ender);
+
+    measure(fd);
+
+    close(fd);
+
+    return 0;
+}
diff --git a/Documentation/laptops/laptop-mode.txt b/Documentation/laptops/laptop-mode.txt
index eeedee11c8c2..2c3c35093023 100644
--- a/Documentation/laptops/laptop-mode.txt
+++ b/Documentation/laptops/laptop-mode.txt
@@ -779,172 +779,4 @@ Monitoring tool
 ---------------
 
 Bartek Kania submitted this, it can be used to measure how much time your disk
-spends spun up/down.
-
----------------------------dslm.c BEGIN-----------------------------------------
-/*
- * Simple Disk Sleep Monitor
- *  by Bartek Kania
- * Licenced under the GPL
- */
-#include <unistd.h>
-#include <stdlib.h>
-#include <stdio.h>
-#include <fcntl.h>
-#include <errno.h>
-#include <time.h>
-#include <string.h>
-#include <signal.h>
-#include <sys/ioctl.h>
-#include <linux/hdreg.h>
-
-#ifdef DEBUG
-#define D(x) x
-#else
-#define D(x)
-#endif
-
-int endit = 0;
-
-/* Check if the disk is in powersave-mode
- * Most of the code is stolen from hdparm.
- * 1 = active, 0 = standby/sleep, -1 = unknown */
-int check_powermode(int fd)
-{
-    unsigned char args[4] = {WIN_CHECKPOWERMODE1,0,0,0};
-    int state;
-
-    if (ioctl(fd, HDIO_DRIVE_CMD, &args)
-        && (args[0] = WIN_CHECKPOWERMODE2) /* try again with 0x98 */
-        && ioctl(fd, HDIO_DRIVE_CMD, &args)) {
-        if (errno != EIO || args[0] != 0 || args[1] != 0) {
-            state = -1; /* "unknown"; */
-        } else
-            state = 0; /* "sleeping"; */
-    } else {
-        state = (args[2] == 255) ? 1 : 0;
-    }
-    D(printf(" drive state is:  %d\n", state));
-
-    return state;
-}
-
-char *state_name(int i)
-{
-    if (i == -1) return "unknown";
-    if (i == 0) return "sleeping";
-    if (i == 1) return "active";
-
-    return "internal error";
-}
-
-char *myctime(time_t time)
-{
-    char *ts = ctime(&time);
-    ts[strlen(ts) - 1] = 0;
-
-    return ts;
-}
-
-void measure(int fd)
-{
-    time_t start_time;
-    int last_state;
-    time_t last_time;
-    int curr_state;
-    time_t curr_time = 0;
-    time_t time_diff;
-    time_t active_time = 0;
-    time_t sleep_time = 0;
-    time_t unknown_time = 0;
-    time_t total_time = 0;
-    int changes = 0;
-    float tmp;
-
-    printf("Starting measurements\n");
-
-    last_state = check_powermode(fd);
-    start_time = last_time = time(0);
-    printf("  System is in state %s\n\n", state_name(last_state));
-
-    while(!endit) {
-        sleep(1);
-        curr_state = check_powermode(fd);
-
-        if (curr_state != last_state || endit) {
-            changes++;
-            curr_time = time(0);
-            time_diff = curr_time - last_time;
-
-            if (last_state == 1) active_time += time_diff;
-            else if (last_state == 0) sleep_time += time_diff;
-            else unknown_time += time_diff;
-
-            last_state = curr_state;
-            last_time = curr_time;
-
-            printf("%s: State-change to %s\n", myctime(curr_time),
-                   state_name(curr_state));
-        }
-    }
-    changes--; /* Compensate for SIGINT */
-
-    total_time = time(0) - start_time;
-    printf("\nTotal running time:  %lus\n", curr_time - start_time);
-    printf(" State changed %d times\n", changes);
-
-    tmp = (float)sleep_time / (float)total_time * 100;
-    printf(" Time in sleep state:   %lus (%.2f%%)\n", sleep_time, tmp);
-    tmp = (float)active_time / (float)total_time * 100;
-    printf(" Time in active state:  %lus (%.2f%%)\n", active_time, tmp);
-    tmp = (float)unknown_time / (float)total_time * 100;
-    printf(" Time in unknown state: %lus (%.2f%%)\n", unknown_time, tmp);
-}
-
-void ender(int s)
-{
-    endit = 1;
-}
-
-void usage()
-{
-    puts("usage: dslm [-w <time>] <disk>");
-    exit(0);
-}
-
-int main(int argc, char **argv)
-{
-    int fd;
-    char *disk = 0;
-    int settle_time = 60;
-
-    /* Parse the simple command-line */
-    if (argc == 2)
-        disk = argv[1];
-    else if (argc == 4) {
-        settle_time = atoi(argv[2]);
-        disk = argv[3];
-    } else
-        usage();
-
-    if (!(fd = open(disk, O_RDONLY|O_NONBLOCK))) {
-        printf("Can't open %s, because: %s\n", disk, strerror(errno));
-        exit(-1);
-    }
-
-    if (settle_time) {
-        printf("Waiting %d seconds for the system to settle down to "
-               "'normal'\n", settle_time);
-        sleep(settle_time);
-    } else
-        puts("Not waiting for system to settle down");
-
-    signal(SIGINT, ender);
-
-    measure(fd);
-
-    close(fd);
-
-    return 0;
-}
----------------------------dslm.c END-------------------------------------------
+spends spun up/down.  See Documentation/laptops/dslm.c
diff --git a/Documentation/networking/skfp.txt b/Documentation/networking/skfp.txt
index abfddf81e34a..203ec66c9fb4 100644
--- a/Documentation/networking/skfp.txt
+++ b/Documentation/networking/skfp.txt
@@ -68,7 +68,7 @@ Compaq adapters (not tested):
 =======================
 
 From v2.01 on, the driver is integrated in the linux kernel sources.
-Therefor, the installation is the same as for any other adapter
+Therefore, the installation is the same as for any other adapter
 supported by the kernel.
 Refer to the manual of your distribution about the installation
 of network adapters.
diff --git a/Documentation/networking/timestamping/timestamping.c b/Documentation/networking/timestamping/timestamping.c
index a7936fe8444a..bab619a48214 100644
--- a/Documentation/networking/timestamping/timestamping.c
+++ b/Documentation/networking/timestamping/timestamping.c
@@ -370,7 +370,7 @@ int main(int argc, char **argv)
         }
 
         sock = socket(PF_INET, SOCK_DGRAM, IPPROTO_UDP);
-        if (socket < 0)
+        if (sock < 0)
                 bail("socket");
 
         memset(&device, 0, sizeof(device));
diff --git a/Documentation/pnp.txt b/Documentation/pnp.txt
index a327db67782a..763e4659bf18 100644
--- a/Documentation/pnp.txt
+++ b/Documentation/pnp.txt
@@ -57,7 +57,7 @@ PC standard floppy disk controller
 # cat resources
 DISABLED
 
-- Notice the string "DISABLED".  THis means the device is not active.
+- Notice the string "DISABLED".  This means the device is not active.
 
 3.) check the device's possible configurations (optional)
 # cat options
@@ -139,7 +139,7 @@ Plug and Play but it is planned to be in the near future.
 
 Requirements for a Linux PnP protocol:
 1.) the protocol must use EISA IDs
-2.) the protocol must inform the PnP Layer of a devices current configuration
+2.) the protocol must inform the PnP Layer of a device's current configuration
 - the ability to set resources is optional but preferred.
 
 The following are PnP protocol related functions:
@@ -158,7 +158,7 @@ pnp_remove_device
 - automatically will free mem used by the device and related structures
 
 pnp_add_id
-- adds a EISA ID to the list of supported IDs for the specified device
+- adds an EISA ID to the list of supported IDs for the specified device
 
 For more information consult the source of a protocol such as
 /drivers/pnp/pnpbios/core.c.
@@ -167,7 +167,7 @@ For more information consult the source of a protocol such as
 
 Linux Plug and Play Drivers
 ---------------------------
-        This section contains information for linux PnP driver developers.
+        This section contains information for Linux PnP driver developers.
 
 The New Way
 ...........
@@ -235,11 +235,10 @@ static int __init serial8250_pnp_init(void)
 The Old Way
 ...........
 
-a series of compatibility functions have been created to make it easy to convert 
-
+A series of compatibility functions have been created to make it easy to convert
 ISAPNP drivers.  They should serve as a temporary solution only.
 
-they are as follows:
+They are as follows:
 
 struct pnp_card *pnp_find_card(unsigned short vendor,
                                  unsigned short device,
diff --git a/Documentation/power/runtime_pm.txt b/Documentation/power/runtime_pm.txt
index ab00eeddecaf..55b859b3bc72 100644
--- a/Documentation/power/runtime_pm.txt
+++ b/Documentation/power/runtime_pm.txt
@@ -256,7 +256,7 @@ drivers/base/power/runtime.c and include/linux/pm_runtime.h:
       to suspend the device again in future
 
   int pm_runtime_resume(struct device *dev);
-    - execute the subsystem-leve resume callback for the device; returns 0 on
+    - execute the subsystem-level resume callback for the device; returns 0 on
       success, 1 if the device's run-time PM status was already 'active' or
       error code on failure, where -EAGAIN means it may be safe to attempt to
       resume the device again in future, but 'power.runtime_error' should be
diff --git a/Documentation/s390/kvm.txt b/Documentation/s390/kvm.txt
index 6f5ceb0f09fc..85f3280d7ef6 100644
--- a/Documentation/s390/kvm.txt
+++ b/Documentation/s390/kvm.txt
@@ -102,7 +102,7 @@ args:		unsigned long
 see also:       include/linux/kvm.h
 This ioctl stores the state of the cpu at the guest real address given as
 argument, unless one of the following values defined in include/linux/kvm.h
-is given as arguement:
+is given as argument:
 KVM_S390_STORE_STATUS_NOADDR - the CPU stores its status to the save area in
 absolute lowcore as defined by the principles of operation
 KVM_S390_STORE_STATUS_PREFIXED - the CPU stores its status to the save area in
diff --git a/Documentation/scsi/ChangeLog.lpfc b/Documentation/scsi/ChangeLog.lpfc
index ff19a52fe004..2ffc1148eb95 100644
--- a/Documentation/scsi/ChangeLog.lpfc
+++ b/Documentation/scsi/ChangeLog.lpfc
@@ -989,8 +989,8 @@ Changes from 20040709 to 20040716
         * Remove redundant port_cmp != 2 check in if
           (!port_cmp) { .... if (port_cmp != 2).... }
         * Clock changes: removed struct clk_data and timerList.
-        * Clock changes: seperate nodev_tmo and els_retry_delay into 2
-          seperate timers and convert to 1 argument changed
+        * Clock changes: separate nodev_tmo and els_retry_delay into 2
+          separate timers and convert to 1 argument changed
           LPFC_NODE_FARP_PEND_t to struct lpfc_node_farp_pend convert
           ipfarp_tmo to 1 argument convert target struct tmofunc and
           rtplunfunc to 1 argument * cr_count, cr_delay and
@@ -1514,7 +1514,7 @@ Changes from 20040402 to 20040409
         * Remove unused elxclock declaration in elx_sli.h.
         * Since everywhere IOCB_ENTRY is used, the return value is cast,
           move the cast into the macro.
-        * Split ioctls out into seperate files
+        * Split ioctls out into separate files
 
 Changes from 20040326 to 20040402
 
@@ -1534,7 +1534,7 @@ Changes from 20040326 to 20040402
         * Unused variable cleanup
         * Use Linux list macros for DMABUF_t
         * Break up ioctls into 3 sections, dfc, util, hbaapi
-          rearranged code so this could be easily seperated into a
+          rearranged code so this could be easily separated into a
           differnet module later All 3 are currently turned on by
           defines in lpfc_ioctl.c LPFC_DFC_IOCTL, LPFC_UTIL_IOCTL,
           LPFC_HBAAPI_IOCTL
@@ -1551,7 +1551,7 @@ Changes from 20040326 to 20040402
           started by lpfc_online().  lpfc_offline() only stopped
           els_timeout routine.  It now stops all timeout routines
           associated with that hba.
-        * Replace seperate next and prev pointers in struct
+        * Replace separate next and prev pointers in struct
           lpfc_bindlist with list_head type.  In elxHBA_t, replace
           fc_nlpbind_start and _end with fc_nlpbind_list and use
           list_head macros to access it.
diff --git a/Documentation/serial/tty.txt b/Documentation/serial/tty.txt
index 5e5349a4fcd2..7c900507279f 100644
--- a/Documentation/serial/tty.txt
+++ b/Documentation/serial/tty.txt
@@ -105,6 +105,10 @@ write_wakeup()	-	May be called at any point between open and close.
                         is permitted to call the driver write method from
                         this function. In such a situation defer it.
 
+dcd_change()    -       Report to the tty line the current DCD pin status
+                        changes and the relative timestamp. The timestamp
+                        can be NULL.
+
 
 Driver Access
 
diff --git a/Documentation/sysctl/vm.txt b/Documentation/sysctl/vm.txt
index fc5790d36cd9..6c7d18c53f84 100644
--- a/Documentation/sysctl/vm.txt
+++ b/Documentation/sysctl/vm.txt
@@ -573,11 +573,14 @@ Because other nodes' memory may be free. This means system total status
 may be not fatal yet.
 
 If this is set to 2, the kernel panics compulsorily even on the
-above-mentioned.
+above-mentioned. Even oom happens under memory cgroup, the whole
+system panics.
 
 The default value is 0.
 1 and 2 are for failover of clustering. Please select either
 according to your policy of failover.
+panic_on_oom=2+kdump gives you very strong tool to investigate
+why oom happens. You can get snapshot.
 
 =============================================================
 
diff --git a/Documentation/timers/00-INDEX b/Documentation/timers/00-INDEX
index 397dc35e1323..a9248da5cdbc 100644
--- a/Documentation/timers/00-INDEX
+++ b/Documentation/timers/00-INDEX
@@ -4,6 +4,8 @@ highres.txt
         - High resolution timers and dynamic ticks design notes
 hpet.txt
         - High Precision Event Timer Driver for Linux
+hpet_example.c
+        - sample hpet timer test program
 hrtimers.txt
         - subsystem for high-resolution kernel timers
 timer_stats.txt
diff --git a/Documentation/timers/Makefile b/Documentation/timers/Makefile
new file mode 100644
index 000000000000..c85625f4ab25
--- /dev/null
+++ b/Documentation/timers/Makefile
@@ -0,0 +1,8 @@
+# kbuild trick to avoid linker error. Can be omitted if a module is built.
+obj- := dummy.o
+
+# List of programs to build
+hostprogs-y := hpet_example
+
+# Tell kbuild to always build the programs
+always := $(hostprogs-y)
diff --git a/Documentation/timers/hpet.txt b/Documentation/timers/hpet.txt
index 16d25e6b5a00..767392ffd31e 100644
--- a/Documentation/timers/hpet.txt
+++ b/Documentation/timers/hpet.txt
@@ -26,274 +26,5 @@ initialization.  An example of this initialization can be found in
 arch/x86/kernel/hpet.c.
 
 The driver provides a userspace API which resembles the API found in the
-RTC driver framework.  An example user space program is provided below.
-
-#include <stdio.h>
-#include <stdlib.h>
-#include <unistd.h>
-#include <fcntl.h>
-#include <string.h>
-#include <memory.h>
-#include <malloc.h>
-#include <time.h>
-#include <ctype.h>
-#include <sys/types.h>
-#include <sys/wait.h>
-#include <signal.h>
-#include <fcntl.h>
-#include <errno.h>
-#include <sys/time.h>
-#include <linux/hpet.h>
-
-
-extern void hpet_open_close(int, const char **);
-extern void hpet_info(int, const char **);
-extern void hpet_poll(int, const char **);
-extern void hpet_fasync(int, const char **);
-extern void hpet_read(int, const char **);
-
-#include <sys/poll.h>
-#include <sys/ioctl.h>
-#include <signal.h>
-
-struct hpet_command {
-        char            *command;
-        void            (*func)(int argc, const char ** argv);
-} hpet_command[] = {
-        {
-                "open-close",
-                hpet_open_close
-        },
-        {
-                "info",
-                hpet_info
-        },
-        {
-                "poll",
-                hpet_poll
-        },
-        {
-                "fasync",
-                hpet_fasync
-        },
-};
-
-int
-main(int argc, const char ** argv)
-{
-        int     i;
-
-        argc--;
-        argv++;
-
-        if (!argc) {
-                fprintf(stderr, "-hpet: requires command\n");
-                return -1;
-        }
-
-
-        for (i = 0; i < (sizeof (hpet_command) / sizeof (hpet_command[0])); i++)
-                if (!strcmp(argv[0], hpet_command[i].command)) {
-                        argc--;
-                        argv++;
-                        fprintf(stderr, "-hpet: executing %s\n",
-                                hpet_command[i].command);
-                        hpet_command[i].func(argc, argv);
-                        return 0;
-                }
-
-        fprintf(stderr, "do_hpet: command %s not implemented\n", argv[0]);
-
-        return -1;
-}
-
-void
-hpet_open_close(int argc, const char **argv)
-{
-        int     fd;
-
-        if (argc != 1) {
-                fprintf(stderr, "hpet_open_close: device-name\n");
-                return;
-        }
-
-        fd = open(argv[0], O_RDONLY);
-        if (fd < 0)
-                fprintf(stderr, "hpet_open_close: open failed\n");
-        else
-                close(fd);
-
-        return;
-}
-
-void
-hpet_info(int argc, const char **argv)
-{
-}
-
-void
-hpet_poll(int argc, const char **argv)
-{
-        unsigned long           freq;
-        int                     iterations, i, fd;
-        struct pollfd           pfd;
-        struct hpet_info        info;
-        struct timeval          stv, etv;
-        struct timezone         tz;
-        long                    usec;
-
-        if (argc != 3) {
-                fprintf(stderr, "hpet_poll: device-name freq iterations\n");
-                return;
-        }
-
-        freq = atoi(argv[1]);
-        iterations = atoi(argv[2]);
-
-        fd = open(argv[0], O_RDONLY);
-
-        if (fd < 0) {
-                fprintf(stderr, "hpet_poll: open of %s failed\n", argv[0]);
-                return;
-        }
-
-        if (ioctl(fd, HPET_IRQFREQ, freq) < 0) {
-                fprintf(stderr, "hpet_poll: HPET_IRQFREQ failed\n");
-                goto out;
-        }
-
-        if (ioctl(fd, HPET_INFO, &info) < 0) {
-                fprintf(stderr, "hpet_poll: failed to get info\n");
-                goto out;
-        }
-
-        fprintf(stderr, "hpet_poll: info.hi_flags 0x%lx\n", info.hi_flags);
-
-        if (info.hi_flags && (ioctl(fd, HPET_EPI, 0) < 0)) {
-                fprintf(stderr, "hpet_poll: HPET_EPI failed\n");
-                goto out;
-        }
-
-        if (ioctl(fd, HPET_IE_ON, 0) < 0) {
-                fprintf(stderr, "hpet_poll, HPET_IE_ON failed\n");
-                goto out;
-        }
-
-        pfd.fd = fd;
-        pfd.events = POLLIN;
-
-        for (i = 0; i < iterations; i++) {
-                pfd.revents = 0;
-                gettimeofday(&stv, &tz);
-                if (poll(&pfd, 1, -1) < 0)
-                        fprintf(stderr, "hpet_poll: poll failed\n");
-                else {
-                        long    data;
-
-                        gettimeofday(&etv, &tz);
-                        usec = stv.tv_sec * 1000000 + stv.tv_usec;
-                        usec = (etv.tv_sec * 1000000 + etv.tv_usec) - usec;
-
-                        fprintf(stderr,
-                                "hpet_poll: expired time = 0x%lx\n", usec);
-
-                        fprintf(stderr, "hpet_poll: revents = 0x%x\n",
-                                pfd.revents);
-
-                        if (read(fd, &data, sizeof(data)) != sizeof(data)) {
-                                fprintf(stderr, "hpet_poll: read failed\n");
-                        }
-                        else
-                                fprintf(stderr, "hpet_poll: data 0x%lx\n",
-                                        data);
-                }
-        }
-
-out:
-        close(fd);
-        return;
-}
-
-static int hpet_sigio_count;
-
-static void
-hpet_sigio(int val)
-{
-        fprintf(stderr, "hpet_sigio: called\n");
-        hpet_sigio_count++;
-}
-
-void
-hpet_fasync(int argc, const char **argv)
-{
-        unsigned long           freq;
-        int                     iterations, i, fd, value;
-        sig_t                   oldsig;
-        struct hpet_info        info;
-
-        hpet_sigio_count = 0;
-        fd = -1;
-
-        if ((oldsig = signal(SIGIO, hpet_sigio)) == SIG_ERR) {
-                fprintf(stderr, "hpet_fasync: failed to set signal handler\n");
-                return;
-        }
-
-        if (argc != 3) {
-                fprintf(stderr, "hpet_fasync: device-name freq iterations\n");
-                goto out;
-        }
-
-        fd = open(argv[0], O_RDONLY);
-
-        if (fd < 0) {
-                fprintf(stderr, "hpet_fasync: failed to open %s\n", argv[0]);
-                return;
-        }
-
-
-        if ((fcntl(fd, F_SETOWN, getpid()) == 1) ||
-                ((value = fcntl(fd, F_GETFL)) == 1) ||
-                (fcntl(fd, F_SETFL, value | O_ASYNC) == 1)) {
-                fprintf(stderr, "hpet_fasync: fcntl failed\n");
-                goto out;
-        }
-
-        freq = atoi(argv[1]);
-        iterations = atoi(argv[2]);
-
-        if (ioctl(fd, HPET_IRQFREQ, freq) < 0) {
-                fprintf(stderr, "hpet_fasync: HPET_IRQFREQ failed\n");
-                goto out;
-        }
-
-        if (ioctl(fd, HPET_INFO, &info) < 0) {
-                fprintf(stderr, "hpet_fasync: failed to get info\n");
-                goto out;
-        }
-
-        fprintf(stderr, "hpet_fasync: info.hi_flags 0x%lx\n", info.hi_flags);
-
-        if (info.hi_flags && (ioctl(fd, HPET_EPI, 0) < 0)) {
-                fprintf(stderr, "hpet_fasync: HPET_EPI failed\n");
-                goto out;
-        }
-
-        if (ioctl(fd, HPET_IE_ON, 0) < 0) {
-                fprintf(stderr, "hpet_fasync, HPET_IE_ON failed\n");
-                goto out;
-        }
-
-        for (i = 0; i < iterations; i++) {
-                (void) pause();
-                fprintf(stderr, "hpet_fasync: count = %d\n", hpet_sigio_count);
-        }
-
-out:
-        signal(SIGIO, oldsig);
-
-        if (fd >= 0)
-                close(fd);
-
-        return;
-}
+RTC driver framework.  An example user space program is provided in
+file:Documentation/timers/hpet_example.c
diff --git a/Documentation/timers/hpet_example.c b/Documentation/timers/hpet_example.c
new file mode 100644
index 000000000000..f9ce2d9fdfd5
--- /dev/null
+++ b/Documentation/timers/hpet_example.c
@@ -0,0 +1,269 @@
+#include <stdio.h>
+#include <stdlib.h>
+#include <unistd.h>
+#include <fcntl.h>
+#include <string.h>
+#include <memory.h>
+#include <malloc.h>
+#include <time.h>
+#include <ctype.h>
+#include <sys/types.h>
+#include <sys/wait.h>
+#include <signal.h>
+#include <fcntl.h>
+#include <errno.h>
+#include <sys/time.h>
+#include <linux/hpet.h>
+
+
+extern void hpet_open_close(int, const char **);
+extern void hpet_info(int, const char **);
+extern void hpet_poll(int, const char **);
+extern void hpet_fasync(int, const char **);
+extern void hpet_read(int, const char **);
+
+#include <sys/poll.h>
+#include <sys/ioctl.h>
+#include <signal.h>
+
+struct hpet_command {
+        char            *command;
+        void            (*func)(int argc, const char ** argv);
+} hpet_command[] = {
+        {
+                "open-close",
+                hpet_open_close
+        },
+        {
+                "info",
+                hpet_info
+        },
+        {
+                "poll",
+                hpet_poll
+        },
+        {
+                "fasync",
+                hpet_fasync
+        },
+};
+
+int
+main(int argc, const char ** argv)
+{
+        int     i;
+
+        argc--;
+        argv++;
+
+        if (!argc) {
+                fprintf(stderr, "-hpet: requires command\n");
+                return -1;
+        }
+
+
+        for (i = 0; i < (sizeof (hpet_command) / sizeof (hpet_command[0])); i++)
+                if (!strcmp(argv[0], hpet_command[i].command)) {
+                        argc--;
+                        argv++;
+                        fprintf(stderr, "-hpet: executing %s\n",
+                                hpet_command[i].command);
+                        hpet_command[i].func(argc, argv);
+                        return 0;
+                }
+
+        fprintf(stderr, "do_hpet: command %s not implemented\n", argv[0]);
+
+        return -1;
+}
+
+void
+hpet_open_close(int argc, const char **argv)
+{
+        int     fd;
+
+        if (argc != 1) {
+                fprintf(stderr, "hpet_open_close: device-name\n");
+                return;
+        }
+
+        fd = open(argv[0], O_RDONLY);
+        if (fd < 0)
+                fprintf(stderr, "hpet_open_close: open failed\n");
+        else
+                close(fd);
+
+        return;
+}
+
+void
+hpet_info(int argc, const char **argv)
+{
+}
+
+void
+hpet_poll(int argc, const char **argv)
+{
+        unsigned long           freq;
+        int                     iterations, i, fd;
+        struct pollfd           pfd;
+        struct hpet_info        info;
+        struct timeval          stv, etv;
+        struct timezone         tz;
+        long                    usec;
+
+        if (argc != 3) {
+                fprintf(stderr, "hpet_poll: device-name freq iterations\n");
+                return;
+        }
+
+        freq = atoi(argv[1]);
+        iterations = atoi(argv[2]);
+
+        fd = open(argv[0], O_RDONLY);
+
+        if (fd < 0) {
+                fprintf(stderr, "hpet_poll: open of %s failed\n", argv[0]);
+                return;
+        }
+
+        if (ioctl(fd, HPET_IRQFREQ, freq) < 0) {
+                fprintf(stderr, "hpet_poll: HPET_IRQFREQ failed\n");
+                goto out;
+        }
+
+        if (ioctl(fd, HPET_INFO, &info) < 0) {
+                fprintf(stderr, "hpet_poll: failed to get info\n");
+                goto out;
+        }
+
+        fprintf(stderr, "hpet_poll: info.hi_flags 0x%lx\n", info.hi_flags);
+
+        if (info.hi_flags && (ioctl(fd, HPET_EPI, 0) < 0)) {
+                fprintf(stderr, "hpet_poll: HPET_EPI failed\n");
+                goto out;
+        }
+
+        if (ioctl(fd, HPET_IE_ON, 0) < 0) {
+                fprintf(stderr, "hpet_poll, HPET_IE_ON failed\n");
+                goto out;
+        }
+
+        pfd.fd = fd;
+        pfd.events = POLLIN;
+
+        for (i = 0; i < iterations; i++) {
+                pfd.revents = 0;
+                gettimeofday(&stv, &tz);
+                if (poll(&pfd, 1, -1) < 0)
+                        fprintf(stderr, "hpet_poll: poll failed\n");
+                else {
+                        long    data;
+
+                        gettimeofday(&etv, &tz);
+                        usec = stv.tv_sec * 1000000 + stv.tv_usec;
+                        usec = (etv.tv_sec * 1000000 + etv.tv_usec) - usec;
+
+                        fprintf(stderr,
+                                "hpet_poll: expired time = 0x%lx\n", usec);
+
+                        fprintf(stderr, "hpet_poll: revents = 0x%x\n",
+                                pfd.revents);
+
+                        if (read(fd, &data, sizeof(data)) != sizeof(data)) {
+                                fprintf(stderr, "hpet_poll: read failed\n");
+                        }
+                        else
+                                fprintf(stderr, "hpet_poll: data 0x%lx\n",
+                                        data);
+                }
+        }
+
+out:
+        close(fd);
+        return;
+}
+
+static int hpet_sigio_count;
+
+static void
+hpet_sigio(int val)
+{
+        fprintf(stderr, "hpet_sigio: called\n");
+        hpet_sigio_count++;
+}
+
+void
+hpet_fasync(int argc, const char **argv)
+{
+        unsigned long           freq;
+        int                     iterations, i, fd, value;
+        sig_t                   oldsig;
+        struct hpet_info        info;
+
+        hpet_sigio_count = 0;
+        fd = -1;
+
+        if ((oldsig = signal(SIGIO, hpet_sigio)) == SIG_ERR) {
+                fprintf(stderr, "hpet_fasync: failed to set signal handler\n");
+                return;
+        }
+
+        if (argc != 3) {
+                fprintf(stderr, "hpet_fasync: device-name freq iterations\n");
+                goto out;
+        }
+
+        fd = open(argv[0], O_RDONLY);
+
+        if (fd < 0) {
+                fprintf(stderr, "hpet_fasync: failed to open %s\n", argv[0]);
+                return;
+        }
+
+
+        if ((fcntl(fd, F_SETOWN, getpid()) == 1) ||
+                ((value = fcntl(fd, F_GETFL)) == 1) ||
+                (fcntl(fd, F_SETFL, value | O_ASYNC) == 1)) {
+                fprintf(stderr, "hpet_fasync: fcntl failed\n");
+                goto out;
+        }
+
+        freq = atoi(argv[1]);
+        iterations = atoi(argv[2]);
+
+        if (ioctl(fd, HPET_IRQFREQ, freq) < 0) {
+                fprintf(stderr, "hpet_fasync: HPET_IRQFREQ failed\n");
+                goto out;
+        }
+
+        if (ioctl(fd, HPET_INFO, &info) < 0) {
+                fprintf(stderr, "hpet_fasync: failed to get info\n");
+                goto out;
+        }
+
+        fprintf(stderr, "hpet_fasync: info.hi_flags 0x%lx\n", info.hi_flags);
+
+        if (info.hi_flags && (ioctl(fd, HPET_EPI, 0) < 0)) {
+                fprintf(stderr, "hpet_fasync: HPET_EPI failed\n");
+                goto out;
+        }
+
+        if (ioctl(fd, HPET_IE_ON, 0) < 0) {
+                fprintf(stderr, "hpet_fasync, HPET_IE_ON failed\n");
+                goto out;
+        }
+
+        for (i = 0; i < iterations; i++) {
+                (void) pause();
+                fprintf(stderr, "hpet_fasync: count = %d\n", hpet_sigio_count);
+        }
+
+out:
+        signal(SIGIO, oldsig);
+
+        if (fd >= 0)
+                close(fd);
+
+        return;
+}
diff --git a/Documentation/trace/ftrace.txt b/Documentation/trace/ftrace.txt
index bab3040da548..03485bfbd797 100644
--- a/Documentation/trace/ftrace.txt
+++ b/Documentation/trace/ftrace.txt
@@ -1588,7 +1588,7 @@ module author does not need to worry about it.
 
 When tracing is enabled, kstop_machine is called to prevent
 races with the CPUS executing code being modified (which can
-cause the CPU to do undesireable things), and the nops are
+cause the CPU to do undesirable things), and the nops are
 patched back to calls. But this time, they do not call mcount
 (which is just a function stub). They now call into the ftrace
 infrastructure.
diff --git a/Documentation/vm/00-INDEX b/Documentation/vm/00-INDEX
index e57d6a9dd32b..dca82d7c83d8 100644
--- a/Documentation/vm/00-INDEX
+++ b/Documentation/vm/00-INDEX
@@ -4,23 +4,35 @@ active_mm.txt
         - An explanation from Linus about tsk->active_mm vs tsk->mm.
 balance
         - various information on memory balancing.
+hugepage-mmap.c
+        - Example app using huge page memory with the mmap system call.
+hugepage-shm.c
+        - Example app using huge page memory with Sys V shared memory system calls.
 hugetlbpage.txt
         - a brief summary of hugetlbpage support in the Linux kernel.
+hwpoison.txt
+        - explains what hwpoison is
 ksm.txt
         - how to use the Kernel Samepage Merging feature.
 locking
         - info on how locking and synchronization is done in the Linux vm code.
+map_hugetlb.c
+        - an example program that uses the MAP_HUGETLB mmap flag.
 numa
         - information about NUMA specific code in the Linux vm.
 numa_memory_policy.txt
         - documentation of concepts and APIs of the 2.6 memory policy support.
 overcommit-accounting
         - description of the Linux kernels overcommit handling modes.
+page-types.c
+        - Tool for querying page flags
 page_migration
         - description of page migration in NUMA systems.
+pagemap.txt
+        - pagemap, from the userspace perspective
 slabinfo.c
         - source code for a tool to get reports about slabs.
 slub.txt
         - a short users guide for SLUB.
-map_hugetlb.c
-        - an example program that uses the MAP_HUGETLB mmap flag.
+unevictable-lru.txt
+        - Unevictable LRU infrastructure
diff --git a/Documentation/vm/Makefile b/Documentation/vm/Makefile
index 5bd269b3731a..9dcff328b964 100644
--- a/Documentation/vm/Makefile
+++ b/Documentation/vm/Makefile
@@ -2,7 +2,7 @@
 obj- := dummy.o
 
 # List of programs to build
-hostprogs-y := slabinfo page-types
+hostprogs-y := slabinfo page-types hugepage-mmap hugepage-shm map_hugetlb
 
 # Tell kbuild to always build the programs
 always := $(hostprogs-y)
diff --git a/Documentation/vm/hugepage-mmap.c b/Documentation/vm/hugepage-mmap.c
new file mode 100644
index 000000000000..db0dd9a33d54
--- /dev/null
+++ b/Documentation/vm/hugepage-mmap.c
@@ -0,0 +1,91 @@
+/*
+ * hugepage-mmap:
+ *
+ * Example of using huge page memory in a user application using the mmap
+ * system call.  Before running this application, make sure that the
+ * administrator has mounted the hugetlbfs filesystem (on some directory
+ * like /mnt) using the command mount -t hugetlbfs nodev /mnt. In this
+ * example, the app is requesting memory of size 256MB that is backed by
+ * huge pages.
+ *
+ * For the ia64 architecture, the Linux kernel reserves Region number 4 for
+ * huge pages.  That means that if one requires a fixed address, a huge page
+ * aligned address starting with 0x800000... will be required.  If a fixed
+ * address is not required, the kernel will select an address in the proper
+ * range.
+ * Other architectures, such as ppc64, i386 or x86_64 are not so constrained.
+ */
+
+#include <stdlib.h>
+#include <stdio.h>
+#include <unistd.h>
+#include <sys/mman.h>
+#include <fcntl.h>
+
+#define FILE_NAME "/mnt/hugepagefile"
+#define LENGTH (256UL*1024*1024)
+#define PROTECTION (PROT_READ | PROT_WRITE)
+
+/* Only ia64 requires this */
+#ifdef __ia64__
+#define ADDR (void *)(0x8000000000000000UL)
+#define FLAGS (MAP_SHARED | MAP_FIXED)
+#else
+#define ADDR (void *)(0x0UL)
+#define FLAGS (MAP_SHARED)
+#endif
+
+static void check_bytes(char *addr)
+{
+        printf("First hex is %x\n", *((unsigned int *)addr));
+}
+
+static void write_bytes(char *addr)
+{
+        unsigned long i;
+
+        for (i = 0; i < LENGTH; i++)
+                *(addr + i) = (char)i;
+}
+
+static void read_bytes(char *addr)
+{
+        unsigned long i;
+
+        check_bytes(addr);
+        for (i = 0; i < LENGTH; i++)
+                if (*(addr + i) != (char)i) {
+                        printf("Mismatch at %lu\n", i);
+                        break;
+                }
+}
+
+int main(void)
+{
+        void *addr;
+        int fd;
+
+        fd = open(FILE_NAME, O_CREAT | O_RDWR, 0755);
+        if (fd < 0) {
+                perror("Open failed");
+                exit(1);
+        }
+
+        addr = mmap(ADDR, LENGTH, PROTECTION, FLAGS, fd, 0);
+        if (addr == MAP_FAILED) {
+                perror("mmap");
+                unlink(FILE_NAME);
+                exit(1);
+        }
+
+        printf("Returned address is %p\n", addr);
+        check_bytes(addr);
+        write_bytes(addr);
+        read_bytes(addr);
+
+        munmap(addr, LENGTH);
+        close(fd);
+        unlink(FILE_NAME);
+
+        return 0;
+}
diff --git a/Documentation/vm/hugepage-shm.c b/Documentation/vm/hugepage-shm.c
new file mode 100644
index 000000000000..07956d8592c9
--- /dev/null
+++ b/Documentation/vm/hugepage-shm.c
@@ -0,0 +1,98 @@
+/*
+ * hugepage-shm:
+ *
+ * Example of using huge page memory in a user application using Sys V shared
+ * memory system calls.  In this example the app is requesting 256MB of
+ * memory that is backed by huge pages.  The application uses the flag
+ * SHM_HUGETLB in the shmget system call to inform the kernel that it is
+ * requesting huge pages.
+ *
+ * For the ia64 architecture, the Linux kernel reserves Region number 4 for
+ * huge pages.  That means that if one requires a fixed address, a huge page
+ * aligned address starting with 0x800000... will be required.  If a fixed
+ * address is not required, the kernel will select an address in the proper
+ * range.
+ * Other architectures, such as ppc64, i386 or x86_64 are not so constrained.
+ *
+ * Note: The default shared memory limit is quite low on many kernels,
+ * you may need to increase it via:
+ *
+ * echo 268435456 > /proc/sys/kernel/shmmax
+ *
+ * This will increase the maximum size per shared memory segment to 256MB.
+ * The other limit that you will hit eventually is shmall which is the
+ * total amount of shared memory in pages. To set it to 16GB on a system
+ * with a 4kB pagesize do:
+ *
+ * echo 4194304 > /proc/sys/kernel/shmall
+ */
+
+#include <stdlib.h>
+#include <stdio.h>
+#include <sys/types.h>
+#include <sys/ipc.h>
+#include <sys/shm.h>
+#include <sys/mman.h>
+
+#ifndef SHM_HUGETLB
+#define SHM_HUGETLB 04000
+#endif
+
+#define LENGTH (256UL*1024*1024)
+
+#define dprintf(x)  printf(x)
+
+/* Only ia64 requires this */
+#ifdef __ia64__
+#define ADDR (void *)(0x8000000000000000UL)
+#define SHMAT_FLAGS (SHM_RND)
+#else
+#define ADDR (void *)(0x0UL)
+#define SHMAT_FLAGS (0)
+#endif
+
+int main(void)
+{
+        int shmid;
+        unsigned long i;
+        char *shmaddr;
+
+        if ((shmid = shmget(2, LENGTH,
+                            SHM_HUGETLB | IPC_CREAT | SHM_R | SHM_W)) < 0) {
+                perror("shmget");
+                exit(1);
+        }
+        printf("shmid: 0x%x\n", shmid);
+
+        shmaddr = shmat(shmid, ADDR, SHMAT_FLAGS);
+        if (shmaddr == (char *)-1) {
+                perror("Shared memory attach failure");
+                shmctl(shmid, IPC_RMID, NULL);
+                exit(2);
+        }
+        printf("shmaddr: %p\n", shmaddr);
+
+        dprintf("Starting the writes:\n");
+        for (i = 0; i < LENGTH; i++) {
+                shmaddr[i] = (char)(i);
+                if (!(i % (1024 * 1024)))
+                        dprintf(".");
+        }
+        dprintf("\n");
+
+        dprintf("Starting the Check...");
+        for (i = 0; i < LENGTH; i++)
+                if (shmaddr[i] != (char)i)
+                        printf("\nIndex %lu mismatched\n", i);
+        dprintf("Done.\n");
+
+        if (shmdt((const void *)shmaddr) != 0) {
+                perror("Detach failure");
+                shmctl(shmid, IPC_RMID, NULL);
+                exit(3);
+        }
+
+        shmctl(shmid, IPC_RMID, NULL);
+
+        return 0;
+}
diff --git a/Documentation/vm/hugetlbpage.txt b/Documentation/vm/hugetlbpage.txt
index bc31636973e3..457634c1e03e 100644
--- a/Documentation/vm/hugetlbpage.txt
+++ b/Documentation/vm/hugetlbpage.txt
@@ -299,176 +299,11 @@ map_hugetlb.c.
 *******************************************************************
 
 /*
- * Example of using huge page memory in a user application using Sys V shared
- * memory system calls.  In this example the app is requesting 256MB of
- * memory that is backed by huge pages.  The application uses the flag
- * SHM_HUGETLB in the shmget system call to inform the kernel that it is
- * requesting huge pages.
- *
- * For the ia64 architecture, the Linux kernel reserves Region number 4 for
- * huge pages.  That means that if one requires a fixed address, a huge page
- * aligned address starting with 0x800000... will be required.  If a fixed
- * address is not required, the kernel will select an address in the proper
- * range.
- * Other architectures, such as ppc64, i386 or x86_64 are not so constrained.
- *
- * Note: The default shared memory limit is quite low on many kernels,
- * you may need to increase it via:
- *
- * echo 268435456 > /proc/sys/kernel/shmmax
- *
- * This will increase the maximum size per shared memory segment to 256MB.
- * The other limit that you will hit eventually is shmall which is the
- * total amount of shared memory in pages. To set it to 16GB on a system
- * with a 4kB pagesize do:
- *
- * echo 4194304 > /proc/sys/kernel/shmall
+ * hugepage-shm:  see Documentation/vm/hugepage-shm.c
  */
-#include <stdlib.h>
-#include <stdio.h>
-#include <sys/types.h>
-#include <sys/ipc.h>
-#include <sys/shm.h>
-#include <sys/mman.h>
-
-#ifndef SHM_HUGETLB
-#define SHM_HUGETLB 04000
-#endif
-
-#define LENGTH (256UL*1024*1024)
-
-#define dprintf(x)  printf(x)
-
-#define ADDR (void *)(0x0UL)    /* let kernel choose address */
-#define SHMAT_FLAGS (0)
-
-int main(void)
-{
-        int shmid;
-        unsigned long i;
-        char *shmaddr;
-
-        if ((shmid = shmget(2, LENGTH,
-                            SHM_HUGETLB | IPC_CREAT | SHM_R | SHM_W)) < 0) {
-                perror("shmget");
-                exit(1);
-        }
-        printf("shmid: 0x%x\n", shmid);
-
-        shmaddr = shmat(shmid, ADDR, SHMAT_FLAGS);
-        if (shmaddr == (char *)-1) {
-                perror("Shared memory attach failure");
-                shmctl(shmid, IPC_RMID, NULL);
-                exit(2);
-        }
-        printf("shmaddr: %p\n", shmaddr);
-
-        dprintf("Starting the writes:\n");
-        for (i = 0; i < LENGTH; i++) {
-                shmaddr[i] = (char)(i);
-                if (!(i % (1024 * 1024)))
-                        dprintf(".");
-        }
-        dprintf("\n");
-
-        dprintf("Starting the Check...");
-        for (i = 0; i < LENGTH; i++)
-                if (shmaddr[i] != (char)i)
-                        printf("\nIndex %lu mismatched\n", i);
-        dprintf("Done.\n");
-
-        if (shmdt((const void *)shmaddr) != 0) {
-                perror("Detach failure");
-                shmctl(shmid, IPC_RMID, NULL);
-                exit(3);
-        }
-
-        shmctl(shmid, IPC_RMID, NULL);
-
-        return 0;
-}
 
 *******************************************************************
 
 /*
- * Example of using huge page memory in a user application using the mmap
- * system call.  Before running this application, make sure that the
- * administrator has mounted the hugetlbfs filesystem (on some directory
- * like /mnt) using the command mount -t hugetlbfs nodev /mnt. In this
- * example, the app is requesting memory of size 256MB that is backed by
- * huge pages.
- *
- * For the ia64 architecture, the Linux kernel reserves Region number 4 for
- * huge pages.  That means that if one requires a fixed address, a huge page
- * aligned address starting with 0x800000... will be required.  If a fixed
- * address is not required, the kernel will select an address in the proper
- * range.
- * Other architectures, such as ppc64, i386 or x86_64 are not so constrained.
+ * hugepage-mmap:  see Documentation/vm/hugepage-mmap.c
  */
-#include <stdlib.h>
-#include <stdio.h>
-#include <unistd.h>
-#include <sys/mman.h>
-#include <fcntl.h>
-
-#define FILE_NAME "/mnt/hugepagefile"
-#define LENGTH (256UL*1024*1024)
-#define PROTECTION (PROT_READ | PROT_WRITE)
-
-#define ADDR (void *)(0x0UL)    /* let kernel choose address */
-#define FLAGS (MAP_SHARED)
-
-void check_bytes(char *addr)
-{
-        printf("First hex is %x\n", *((unsigned int *)addr));
-}
-
-void write_bytes(char *addr)
-{
-        unsigned long i;
-
-        for (i = 0; i < LENGTH; i++)
-                *(addr + i) = (char)i;
-}
-
-void read_bytes(char *addr)
-{
-        unsigned long i;
-
-        check_bytes(addr);
-        for (i = 0; i < LENGTH; i++)
-                if (*(addr + i) != (char)i) {
-                        printf("Mismatch at %lu\n", i);
-                        break;
-                }
-}
-
-int main(void)
-{
-        void *addr;
-        int fd;
-
-        fd = open(FILE_NAME, O_CREAT | O_RDWR, 0755);
-        if (fd < 0) {
-                perror("Open failed");
-                exit(1);
-        }
-
-        addr = mmap(ADDR, LENGTH, PROTECTION, FLAGS, fd, 0);
-        if (addr == MAP_FAILED) {
-                perror("mmap");
-                unlink(FILE_NAME);
-                exit(1);
-        }
-
-        printf("Returned address is %p\n", addr);
-        check_bytes(addr);
-        write_bytes(addr);
-        read_bytes(addr);
-
-        munmap(addr, LENGTH);
-        close(fd);
-        unlink(FILE_NAME);
-
-        return 0;
-}
diff --git a/Documentation/vm/map_hugetlb.c b/Documentation/vm/map_hugetlb.c
index e2bdae37f499..9969c7d9f985 100644
--- a/Documentation/vm/map_hugetlb.c
+++ b/Documentation/vm/map_hugetlb.c
@@ -31,12 +31,12 @@
 #define FLAGS (MAP_PRIVATE | MAP_ANONYMOUS | MAP_HUGETLB)
 #endif
 
-void check_bytes(char *addr)
+static void check_bytes(char *addr)
 {
         printf("First hex is %x\n", *((unsigned int *)addr));
 }
 
-void write_bytes(char *addr)
+static void write_bytes(char *addr)
 {
         unsigned long i;
 
@@ -44,7 +44,7 @@ void write_bytes(char *addr)
                 *(addr + i) = (char)i;
 }
 
-void read_bytes(char *addr)
+static void read_bytes(char *addr)
 {
         unsigned long i;
 
diff --git a/Documentation/voyager.txt b/Documentation/voyager.txt
deleted file mode 100644
index 2749af552cdf..000000000000
--- a/Documentation/voyager.txt
+++ /dev/null
@@ -1,95 +0,0 @@
-Running Linux on the Voyager Architecture
-=========================================
-
-For full details and current project status, see
-
-http://www.hansenpartnership.com/voyager
-
-The voyager architecture was designed by NCR in the mid 80s to be a
-fully SMP capable RAS computing architecture built around intel's 486
-chip set.  The voyager came in three levels of architectural
-sophistication: 3,4 and 5 --- 1 and 2 never made it out of prototype.
-The linux patches support only the Level 5 voyager architecture (any
-machine class 3435 and above).
-
-The Voyager Architecture
-------------------------
-
-Voyager machines consist of a Baseboard with a 386 diagnostic
-processor, a Power Supply Interface (PSI) a Primary and possibly
-Secondary Microchannel bus and between 2 and 20 voyager slots.  The
-voyager slots can be populated with memory and cpu cards (up to 4GB
-memory and from 1 486 to 32 Pentium Pro processors).  Internally, the
-voyager has a dual arbitrated system bus and a configuration and test
-bus (CAT).  The voyager bus speed is 40MHz.  Therefore (since all
-voyager cards are dual ported for each system bus) the maximum
-transfer rate is 320Mb/s but only if you have your slot configuration
-tuned (only memory cards can communicate with both busses at once, CPU
-cards utilise them one at a time).
-
-Voyager SMP
------------
-
-Since voyager was the first intel based SMP system, it is slightly
-more primitive than the Intel IO-APIC approach to SMP.  Voyager allows
-arbitrary interrupt routing (including processor affinity routing) of
-all 16 PC type interrupts.  However it does this by using a modified
-5259 master/slave chip set instead of an APIC bus.  Additionally,
-voyager supports Cross Processor Interrupts (CPI) equivalent to the
-APIC IPIs.  There are two routed voyager interrupt lines provided to
-each slot.
-
-Processor Cards
----------------
-
-These come in single, dyadic and quad configurations (the quads are
-problematic--see later).  The maximum configuration is 8 quad cards
-for 32 way SMP.
-
-Quad Processors
----------------
-
-Because voyager only supplies two interrupt lines to each Processor
-card, the Quad processors have to be configured (and Bootstrapped) in
-as a pair of Master/Slave processors.
-
-In fact, most Quad cards only accept one VIC interrupt line, so they
-have one interrupt handling processor (called the VIC extended
-processor) and three non-interrupt handling processors.
-
-Current Status
---------------
-
-The System will boot on Mono, Dyad and Quad cards.  There was
-originally a Quad boot problem which has been fixed by proper gdt
-alignment in the initial boot loader.  If you still cannot get your
-voyager system to boot, email me at:
-
-<J.E.J.Bottomley@HansenPartnership.com>
-
-
-The Quad cards now support using the separate Quad CPI vectors instead
-of going through the VIC mailbox system.
-
-The Level 4 architecture (3430 and 3360 Machines) should also work
-fine.
-
-Dump Switch
------------
-
-The voyager dump switch sends out a broadcast NMI which the voyager
-code intercepts and does a task dump.
-
-Power Switch
-------------
-
-The front panel power switch is intercepted by the kernel and should
-cause a system shutdown and power off.
-
-A Note About Mixed CPU Systems
-------------------------------
-
-Linux isn't designed to handle mixed CPU systems very well.  In order
-to get everything going you *must* make sure that your lowest
-capability CPU is used for booting.  Also, mixing CPU classes
-(e.g. 486 and 586) is really not going to work very well at all.
diff --git a/MAINTAINERS b/MAINTAINERS
index c8a8b1fd58b3..fe88b5f732cd 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -666,6 +666,12 @@ T:	git://git.pengutronix.de/git/imx/linux-2.6.git
 F:      arch/arm/mach-mx*/
 F:      arch/arm/plat-mxc/
 
+ARM/FREESCALE IMX51
+M:      Amit Kucheria <amit.kucheria@canonical.com>
+L:      linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
+S:      Maintained
+F:      arch/arm/mach-mx5/
+
 ARM/GLOMATION GESBC9312SX MACHINE SUPPORT
 M:      Lennert Buytenhek <kernel@wantstofly.org>
 L:      linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
@@ -939,6 +945,16 @@ W:	http://www.fluff.org/ben/linux/
 S:      Maintained
 F:      arch/arm/mach-s3c6410/
 
+ARM/SHMOBILE ARM ARCHITECTURE
+M:      Paul Mundt <lethal@linux-sh.org>
+M:      Magnus Damm <magnus.damm@gmail.com>
+L:      linux-sh@vger.kernel.org
+T:      git git://git.kernel.org/pub/scm/linux/kernel/git/lethal/genesis-2.6.git
+W:      http://oss.renesas.com
+S:      Supported
+F:      arch/arm/mach-shmobile/
+F:      drivers/sh/
+
 ARM/TECHNOLOGIC SYSTEMS TS7250 MACHINE SUPPORT
 M:      Lennert Buytenhek <kernel@wantstofly.org>
 L:      linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
@@ -1235,6 +1251,13 @@ W:	http://blackfin.uclinux.org
 S:      Supported
 F:      drivers/rtc/rtc-bfin.c
 
+BLACKFIN SDH DRIVER
+M:      Cliff Cai <cliff.cai@analog.com>
+L:      uclinux-dist-devel@blackfin.uclinux.org
+W:      http://blackfin.uclinux.org
+S:      Supported
+F:      drivers/mmc/host/bfin_sdh.c
+
 BLACKFIN SERIAL DRIVER
 M:      Sonic Zhang <sonic.zhang@analog.com>
 L:      uclinux-dist-devel@blackfin.uclinux.org
@@ -2804,7 +2827,7 @@ S:	Maintained
 F:      drivers/input/
 
 INTEL FRAMEBUFFER DRIVER (excluding 810 and 815)
-M:      Sylvain Meyer <sylvain.meyer@worldonline.fr>
+M:      Maik Broemme <mbroemme@plusserver.de>
 L:      linux-fbdev@vger.kernel.org
 S:      Maintained
 F:      Documentation/fb/intelfb.txt
@@ -3621,7 +3644,7 @@ F:	mm/
 
 MEMORY RESOURCE CONTROLLER
 M:      Balbir Singh <balbir@linux.vnet.ibm.com>
-M:      Pavel Emelyanov <xemul@openvz.org>
+M:      Daisuke Nishimura <nishimura@mxp.nes.nec.co.jp>
 M:      KAMEZAWA Hiroyuki <kamezawa.hiroyu@jp.fujitsu.com>
 L:      linux-mm@kvack.org
 S:      Maintained
@@ -4495,6 +4518,13 @@ L:	linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
 T:      git git://git.kernel.org/pub/scm/linux/kernel/git/ycmiao/pxa-linux-2.6.git
 S:      Maintained
 
+MMP2 SUPPORT (aka ARMADA610)
+M:      Haojian Zhuang <haojian.zhuang@marvell.com>
+M:      Eric Miao <eric.y.miao@gmail.com>
+L:      linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
+T:      git git://git.kernel.org/pub/scm/linux/kernel/git/ycmiao/pxa-linux-2.6.git
+S:      Maintained
+
 PXA MMCI DRIVER
 S:      Orphan
 
diff --git a/arch/alpha/Kconfig b/arch/alpha/Kconfig
index bd7261ea8f94..75291fdd379f 100644
--- a/arch/alpha/Kconfig
+++ b/arch/alpha/Kconfig
@@ -10,6 +10,7 @@ config ALPHA
         select HAVE_OPROFILE
         select HAVE_SYSCALL_WRAPPERS
         select HAVE_PERF_EVENTS
+        select HAVE_DMA_ATTRS
         help
           The Alpha is a 64-bit general-purpose processor designed and
           marketed by the Digital Equipment Corporation of blessed memory,
@@ -58,6 +59,9 @@ config ZONE_DMA
         bool
         default y
 
+config NEED_DMA_MAP_STATE
+       def_bool y
+
 config GENERIC_ISA_DMA
         bool
         default y
diff --git a/arch/alpha/include/asm/dma-mapping.h b/arch/alpha/include/asm/dma-mapping.h
index 04eb5681448c..1bce8169733c 100644
--- a/arch/alpha/include/asm/dma-mapping.h
+++ b/arch/alpha/include/asm/dma-mapping.h
@@ -1,71 +1,49 @@
 #ifndef _ALPHA_DMA_MAPPING_H
 #define _ALPHA_DMA_MAPPING_H
 
+#include <linux/dma-attrs.h>
 
-#ifdef CONFIG_PCI
+extern struct dma_map_ops *dma_ops;
 
-#include <linux/pci.h>
+static inline struct dma_map_ops *get_dma_ops(struct device *dev)
+{
+        return dma_ops;
+}
 
-#define dma_map_single(dev, va, size, dir)              \
-                pci_map_single(alpha_gendev_to_pci(dev), va, size, dir)
-#define dma_unmap_single(dev, addr, size, dir)          \
-                pci_unmap_single(alpha_gendev_to_pci(dev), addr, size, dir)
-#define dma_alloc_coherent(dev, size, addr, gfp)        \
-              __pci_alloc_consistent(alpha_gendev_to_pci(dev), size, addr, gfp)
-#define dma_free_coherent(dev, size, va, addr)          \
-                pci_free_consistent(alpha_gendev_to_pci(dev), size, va, addr)
-#define dma_map_page(dev, page, off, size, dir)         \
-                pci_map_page(alpha_gendev_to_pci(dev), page, off, size, dir)
-#define dma_unmap_page(dev, addr, size, dir)            \
-                pci_unmap_page(alpha_gendev_to_pci(dev), addr, size, dir)
-#define dma_map_sg(dev, sg, nents, dir)                 \
-                pci_map_sg(alpha_gendev_to_pci(dev), sg, nents, dir)
-#define dma_unmap_sg(dev, sg, nents, dir)               \
-                pci_unmap_sg(alpha_gendev_to_pci(dev), sg, nents, dir)
-#define dma_supported(dev, mask)                        \
-                pci_dma_supported(alpha_gendev_to_pci(dev), mask)
-#define dma_mapping_error(dev, addr)                            \
-                pci_dma_mapping_error(alpha_gendev_to_pci(dev), addr)
+#include <asm-generic/dma-mapping-common.h>
 
-#else   /* no PCI - no IOMMU. */
+static inline void *dma_alloc_coherent(struct device *dev, size_t size,
+                                       dma_addr_t *dma_handle, gfp_t gfp)
+{
+        return get_dma_ops(dev)->alloc_coherent(dev, size, dma_handle, gfp);
+}
 
-#include <asm/io.h>     /* for virt_to_phys() */
+static inline void dma_free_coherent(struct device *dev, size_t size,
+                                     void *vaddr, dma_addr_t dma_handle)
+{
+        get_dma_ops(dev)->free_coherent(dev, size, vaddr, dma_handle);
+}
 
-struct scatterlist;
-void *dma_alloc_coherent(struct device *dev, size_t size,
-                         dma_addr_t *dma_handle, gfp_t gfp);
-int dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
-               enum dma_data_direction direction);
+static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
+{
+        return get_dma_ops(dev)->mapping_error(dev, dma_addr);
+}
 
-#define dma_free_coherent(dev, size, va, addr)          \
-                free_pages((unsigned long)va, get_order(size))
-#define dma_supported(dev, mask)                (mask < 0x00ffffffUL ? 0 : 1)
-#define dma_map_single(dev, va, size, dir)      virt_to_phys(va)
-#define dma_map_page(dev, page, off, size, dir) (page_to_pa(page) + off)
+static inline int dma_supported(struct device *dev, u64 mask)
+{
+        return get_dma_ops(dev)->dma_supported(dev, mask);
+}
 
-#define dma_unmap_single(dev, addr, size, dir)  ((void)0)
-#define dma_unmap_page(dev, addr, size, dir)    ((void)0)
-#define dma_unmap_sg(dev, sg, nents, dir)       ((void)0)
-
-#define dma_mapping_error(dev, addr)  (0)
-
-#endif  /* !CONFIG_PCI */
+static inline int dma_set_mask(struct device *dev, u64 mask)
+{
+        return get_dma_ops(dev)->set_dma_mask(dev, mask);
+}
 
 #define dma_alloc_noncoherent(d, s, h, f)       dma_alloc_coherent(d, s, h, f)
 #define dma_free_noncoherent(d, s, v, h)        dma_free_coherent(d, s, v, h)
 #define dma_is_consistent(d, h)                 (1)
 
-int dma_set_mask(struct device *dev, u64 mask);
-
-#define dma_sync_single_for_cpu(dev, addr, size, dir)     ((void)0)
-#define dma_sync_single_for_device(dev, addr, size, dir)  ((void)0)
-#define dma_sync_single_range(dev, addr, off, size, dir)  ((void)0)
-#define dma_sync_sg_for_cpu(dev, sg, nents, dir)          ((void)0)
-#define dma_sync_sg_for_device(dev, sg, nents, dir)       ((void)0)
 #define dma_cache_sync(dev, va, size, dir)                ((void)0)
-#define dma_sync_single_range_for_cpu(dev, addr, offset, size, dir)     ((void)0)
-#define dma_sync_single_range_for_device(dev, addr, offset, size, dir)  ((void)0)
-
 #define dma_get_cache_alignment()                         L1_CACHE_BYTES
 
 #endif  /* _ALPHA_DMA_MAPPING_H */
diff --git a/arch/alpha/include/asm/pci.h b/arch/alpha/include/asm/pci.h
index dd8dcabf160f..28d0497fd3c7 100644
--- a/arch/alpha/include/asm/pci.h
+++ b/arch/alpha/include/asm/pci.h
@@ -70,142 +70,11 @@ extern inline void pcibios_penalize_isa_irq(int irq, int active)
    decisions.  */
 #define PCI_DMA_BUS_IS_PHYS  0
 
-/* Allocate and map kernel buffer using consistent mode DMA for PCI
-   device.  Returns non-NULL cpu-view pointer to the buffer if
-   successful and sets *DMA_ADDRP to the pci side dma address as well,
-   else DMA_ADDRP is undefined.  */
-
-extern void *__pci_alloc_consistent(struct pci_dev *, size_t,
-                                    dma_addr_t *, gfp_t);
-static inline void *
-pci_alloc_consistent(struct pci_dev *dev, size_t size, dma_addr_t *dma)
-{
-        return __pci_alloc_consistent(dev, size, dma, GFP_ATOMIC);
-}
-
-/* Free and unmap a consistent DMA buffer.  CPU_ADDR and DMA_ADDR must
-   be values that were returned from pci_alloc_consistent.  SIZE must
-   be the same as what as passed into pci_alloc_consistent.
-   References to the memory and mappings associated with CPU_ADDR or
-   DMA_ADDR past this call are illegal.  */
-
-extern void pci_free_consistent(struct pci_dev *, size_t, void *, dma_addr_t);
-
-/* Map a single buffer of the indicate size for PCI DMA in streaming mode.
-   The 32-bit PCI bus mastering address to use is returned.  Once the device
-   is given the dma address, the device owns this memory until either
-   pci_unmap_single or pci_dma_sync_single_for_cpu is performed.  */
-
-extern dma_addr_t pci_map_single(struct pci_dev *, void *, size_t, int);
-
-/* Likewise, but for a page instead of an address.  */
-extern dma_addr_t pci_map_page(struct pci_dev *, struct page *,
-                               unsigned long, size_t, int);
-
-/* Test for pci_map_single or pci_map_page having generated an error.  */
-
-static inline int
-pci_dma_mapping_error(struct pci_dev *pdev, dma_addr_t dma_addr)
-{
-        return dma_addr == 0;
-}
-
-/* Unmap a single streaming mode DMA translation.  The DMA_ADDR and
-   SIZE must match what was provided for in a previous pci_map_single
-   call.  All other usages are undefined.  After this call, reads by
-   the cpu to the buffer are guaranteed to see whatever the device
-   wrote there.  */
-
-extern void pci_unmap_single(struct pci_dev *, dma_addr_t, size_t, int);
-extern void pci_unmap_page(struct pci_dev *, dma_addr_t, size_t, int);
-
-/* pci_unmap_{single,page} is not a nop, thus... */
-#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME)       \
-        dma_addr_t ADDR_NAME;
-#define DECLARE_PCI_UNMAP_LEN(LEN_NAME)         \
-        __u32 LEN_NAME;
-#define pci_unmap_addr(PTR, ADDR_NAME)                  \
-        ((PTR)->ADDR_NAME)
-#define pci_unmap_addr_set(PTR, ADDR_NAME, VAL)         \
-        (((PTR)->ADDR_NAME) = (VAL))
-#define pci_unmap_len(PTR, LEN_NAME)                    \
-        ((PTR)->LEN_NAME)
-#define pci_unmap_len_set(PTR, LEN_NAME, VAL)           \
-        (((PTR)->LEN_NAME) = (VAL))
-
-/* Map a set of buffers described by scatterlist in streaming mode for
-   PCI DMA.  This is the scatter-gather version of the above
-   pci_map_single interface.  Here the scatter gather list elements
-   are each tagged with the appropriate PCI dma address and length.
-   They are obtained via sg_dma_{address,length}(SG).
-
-   NOTE: An implementation may be able to use a smaller number of DMA
-   address/length pairs than there are SG table elements.  (for
-   example via virtual mapping capabilities) The routine returns the
-   number of addr/length pairs actually used, at most nents.
-
-   Device ownership issues as mentioned above for pci_map_single are
-   the same here.  */
-
-extern int pci_map_sg(struct pci_dev *, struct scatterlist *, int, int);
-
-/* Unmap a set of streaming mode DMA translations.  Again, cpu read
-   rules concerning calls here are the same as for pci_unmap_single()
-   above.  */
-
-extern void pci_unmap_sg(struct pci_dev *, struct scatterlist *, int, int);
-
-/* Make physical memory consistent for a single streaming mode DMA
-   translation after a transfer and device currently has ownership
-   of the buffer.
-
-   If you perform a pci_map_single() but wish to interrogate the
-   buffer using the cpu, yet do not wish to teardown the PCI dma
-   mapping, you must call this function before doing so.  At the next
-   point you give the PCI dma address back to the card, you must first
-   perform a pci_dma_sync_for_device, and then the device again owns
-   the buffer.  */
-
-static inline void
-pci_dma_sync_single_for_cpu(struct pci_dev *dev, dma_addr_t dma_addr,
-                            long size, int direction)
-{
-        /* Nothing to do.  */
-}
-
-static inline void
-pci_dma_sync_single_for_device(struct pci_dev *dev, dma_addr_t dma_addr,
-                               size_t size, int direction)
-{
-        /* Nothing to do.  */
-}
-
-/* Make physical memory consistent for a set of streaming mode DMA
-   translations after a transfer.  The same as pci_dma_sync_single_*
-   but for a scatter-gather list, same rules and usage.  */
-
-static inline void
-pci_dma_sync_sg_for_cpu(struct pci_dev *dev, struct scatterlist *sg,
-                        int nents, int direction)
-{
-        /* Nothing to do.  */
-}
-
-static inline void
-pci_dma_sync_sg_for_device(struct pci_dev *dev, struct scatterlist *sg,
-                           int nents, int direction)
-{
-        /* Nothing to do.  */
-}
-
-/* Return whether the given PCI device DMA address mask can
-   be supported properly.  For example, if your device can
-   only drive the low 24-bits during PCI bus mastering, then
-   you would pass 0x00ffffff as the mask to this function.  */
+#ifdef CONFIG_PCI
 
-extern int pci_dma_supported(struct pci_dev *hwdev, u64 mask);
+/* implement the pci_ DMA API in terms of the generic device dma_ one */
+#include <asm-generic/pci-dma-compat.h>
 
-#ifdef CONFIG_PCI
 static inline void pci_dma_burst_advice(struct pci_dev *pdev,
                                         enum pci_dma_burst_strategy *strat,
                                         unsigned long *strategy_parameter)
@@ -244,8 +113,6 @@ static inline int pci_proc_domain(struct pci_bus *bus)
         return hose->need_domain_info;
 }
 
-struct pci_dev *alpha_gendev_to_pci(struct device *dev);
-
 #endif /* __KERNEL__ */
 
 /* Values for the `which' argument to sys_pciconfig_iobase.  */
diff --git a/arch/alpha/include/asm/ptrace.h b/arch/alpha/include/asm/ptrace.h
index 32c7a5cddd59..65cf3e28e2f4 100644
--- a/arch/alpha/include/asm/ptrace.h
+++ b/arch/alpha/include/asm/ptrace.h
@@ -68,6 +68,7 @@ struct switch_stack {
 
 #ifdef __KERNEL__
 
+#define arch_has_single_step()          (1)
 #define user_mode(regs) (((regs)->ps & 8) != 0)
 #define instruction_pointer(regs) ((regs)->pc)
 #define profile_pc(regs) instruction_pointer(regs)
diff --git a/arch/alpha/kernel/pci-noop.c b/arch/alpha/kernel/pci-noop.c
index c19a376520f4..823a540f9f5b 100644
--- a/arch/alpha/kernel/pci-noop.c
+++ b/arch/alpha/kernel/pci-noop.c
@@ -106,58 +106,8 @@ sys_pciconfig_write(unsigned long bus, unsigned long dfn,
                 return -ENODEV;
 }
 
-/* Stubs for the routines in pci_iommu.c: */
-
-void *
-__pci_alloc_consistent(struct pci_dev *pdev, size_t size,
-                       dma_addr_t *dma_addrp, gfp_t gfp)
-{
-        return NULL;
-}
-
-void
-pci_free_consistent(struct pci_dev *pdev, size_t size, void *cpu_addr,
-                    dma_addr_t dma_addr)
-{
-}
-
-dma_addr_t
-pci_map_single(struct pci_dev *pdev, void *cpu_addr, size_t size,
-               int direction)
-{
-        return (dma_addr_t) 0;
-}
-
-void
-pci_unmap_single(struct pci_dev *pdev, dma_addr_t dma_addr, size_t size,
-                 int direction)
-{
-}
-
-int
-pci_map_sg(struct pci_dev *pdev, struct scatterlist *sg, int nents,
-           int direction)
-{
-        return 0;
-}
-
-void
-pci_unmap_sg(struct pci_dev *pdev, struct scatterlist *sg, int nents,
-             int direction)
-{
-}
-
-int
-pci_dma_supported(struct pci_dev *hwdev, dma_addr_t mask)
-{
-        return 0;
-}
-
-/* Generic DMA mapping functions: */
-
-void *
-dma_alloc_coherent(struct device *dev, size_t size,
-                   dma_addr_t *dma_handle, gfp_t gfp)
+static void *alpha_noop_alloc_coherent(struct device *dev, size_t size,
+                                       dma_addr_t *dma_handle, gfp_t gfp)
 {
         void *ret;
 
@@ -171,11 +121,22 @@ dma_alloc_coherent(struct device *dev, size_t size,
         return ret;
 }
 
-EXPORT_SYMBOL(dma_alloc_coherent);
+static void alpha_noop_free_coherent(struct device *dev, size_t size,
+                                     void *cpu_addr, dma_addr_t dma_addr)
+{
+        free_pages((unsigned long)cpu_addr, get_order(size));
+}
+
+static dma_addr_t alpha_noop_map_page(struct device *dev, struct page *page,
+                                      unsigned long offset, size_t size,
+                                      enum dma_data_direction dir,
+                                      struct dma_attrs *attrs)
+{
+        return page_to_pa(page) + offset;
+}
 
-int
-dma_map_sg(struct device *dev, struct scatterlist *sgl, int nents,
-           enum dma_data_direction direction)
+static int alpha_noop_map_sg(struct device *dev, struct scatterlist *sgl, int nents,
+                             enum dma_data_direction dir, struct dma_attrs *attrs)
 {
         int i;
         struct scatterlist *sg;
@@ -192,19 +153,37 @@ dma_map_sg(struct device *dev, struct scatterlist *sgl, int nents,
         return nents;
 }
 
-EXPORT_SYMBOL(dma_map_sg);
+static int alpha_noop_mapping_error(struct device *dev, dma_addr_t dma_addr)
+{
+        return 0;
+}
+
+static int alpha_noop_supported(struct device *dev, u64 mask)
+{
+        return mask < 0x00ffffffUL ? 0 : 1;
+}
 
-int
-dma_set_mask(struct device *dev, u64 mask)
+static int alpha_noop_set_mask(struct device *dev, u64 mask)
 {
         if (!dev->dma_mask || !dma_supported(dev, mask))
                 return -EIO;
 
         *dev->dma_mask = mask;
-
         return 0;
 }
-EXPORT_SYMBOL(dma_set_mask);
+
+struct dma_map_ops alpha_noop_ops = {
+        .alloc_coherent         = alpha_noop_alloc_coherent,
+        .free_coherent          = alpha_noop_free_coherent,
+        .map_page               = alpha_noop_map_page,
+        .map_sg                 = alpha_noop_map_sg,
+        .mapping_error          = alpha_noop_mapping_error,
+        .dma_supported          = alpha_noop_supported,
+        .set_dma_mask           = alpha_noop_set_mask,
+};
+
+struct dma_map_ops *dma_ops = &alpha_noop_ops;
+EXPORT_SYMBOL(dma_ops);
 
 void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long maxlen)
 {
diff --git a/arch/alpha/kernel/pci_iommu.c b/arch/alpha/kernel/pci_iommu.c
index 8449504f5e0b..ce9e54c887fa 100644
--- a/arch/alpha/kernel/pci_iommu.c
+++ b/arch/alpha/kernel/pci_iommu.c
@@ -216,10 +216,30 @@ iommu_arena_free(struct pci_iommu_arena *arena, long ofs, long n)
         for (i = 0; i < n; ++i)
                 p[i] = 0;
 }
-
-/* True if the machine supports DAC addressing, and DEV can
-   make use of it given MASK.  */
-static int pci_dac_dma_supported(struct pci_dev *hwdev, u64 mask);
+
+/*
+ * True if the machine supports DAC addressing, and DEV can
+ * make use of it given MASK.
+ */
+static int pci_dac_dma_supported(struct pci_dev *dev, u64 mask)
+{
+        dma64_addr_t dac_offset = alpha_mv.pci_dac_offset;
+        int ok = 1;
+
+        /* If this is not set, the machine doesn't support DAC at all.  */
+        if (dac_offset == 0)
+                ok = 0;
+
+        /* The device has to be able to address our DAC bit.  */
+        if ((dac_offset & dev->dma_mask) != dac_offset)
+                ok = 0;
+
+        /* If both conditions above are met, we are fine. */
+        DBGA("pci_dac_dma_supported %s from %p\n",
+             ok ? "yes" : "no", __builtin_return_address(0));
+
+        return ok;
+}
 
 /* Map a single buffer of the indicated size for PCI DMA in streaming
    mode.  The 32-bit PCI bus mastering address to use is returned.
@@ -301,23 +321,36 @@ pci_map_single_1(struct pci_dev *pdev, void *cpu_addr, size_t size,
         return ret;
 }
 
-dma_addr_t
-pci_map_single(struct pci_dev *pdev, void *cpu_addr, size_t size, int dir)
+/* Helper for generic DMA-mapping functions. */
+static struct pci_dev *alpha_gendev_to_pci(struct device *dev)
 {
-        int dac_allowed; 
+        if (dev && dev->bus == &pci_bus_type)
+                return to_pci_dev(dev);
 
-        if (dir == PCI_DMA_NONE)
-                BUG();
+        /* Assume that non-PCI devices asking for DMA are either ISA or EISA,
+           BUG() otherwise. */
+        BUG_ON(!isa_bridge);
 
-        dac_allowed = pdev ? pci_dac_dma_supported(pdev, pdev->dma_mask) : 0; 
-        return pci_map_single_1(pdev, cpu_addr, size, dac_allowed);
+        /* Assume non-busmaster ISA DMA when dma_mask is not set (the ISA
+           bridge is bus master then). */
+        if (!dev || !dev->dma_mask || !*dev->dma_mask)
+                return isa_bridge;
+
+        /* For EISA bus masters, return isa_bridge (it might have smaller
+           dma_mask due to wiring limitations). */
+        if (*dev->dma_mask >= isa_bridge->dma_mask)
+                return isa_bridge;
+
+        /* This assumes ISA bus master with dma_mask 0xffffff. */
+        return NULL;
 }
-EXPORT_SYMBOL(pci_map_single);
 
-dma_addr_t
-pci_map_page(struct pci_dev *pdev, struct page *page, unsigned long offset,
-             size_t size, int dir)
+static dma_addr_t alpha_pci_map_page(struct device *dev, struct page *page,
+                                     unsigned long offset, size_t size,
+                                     enum dma_data_direction dir,
+                                     struct dma_attrs *attrs)
 {
+        struct pci_dev *pdev = alpha_gendev_to_pci(dev);
         int dac_allowed;
 
         if (dir == PCI_DMA_NONE)
@@ -327,7 +360,6 @@ pci_map_page(struct pci_dev *pdev, struct page *page, unsigned long offset,
         return pci_map_single_1(pdev, (char *)page_address(page) + offset, 
                                 size, dac_allowed);
 }
-EXPORT_SYMBOL(pci_map_page);
 
 /* Unmap a single streaming mode DMA translation.  The DMA_ADDR and
    SIZE must match what was provided for in a previous pci_map_single
@@ -335,16 +367,17 @@ EXPORT_SYMBOL(pci_map_page);
    the cpu to the buffer are guaranteed to see whatever the device
    wrote there.  */
 
-void
-pci_unmap_single(struct pci_dev *pdev, dma_addr_t dma_addr, size_t size,
-                 int direction)
+static void alpha_pci_unmap_page(struct device *dev, dma_addr_t dma_addr,
+                                 size_t size, enum dma_data_direction dir,
+                                 struct dma_attrs *attrs)
 {
         unsigned long flags;
+        struct pci_dev *pdev = alpha_gendev_to_pci(dev);
         struct pci_controller *hose = pdev ? pdev->sysdata : pci_isa_hose;
         struct pci_iommu_arena *arena;
         long dma_ofs, npages;
 
-        if (direction == PCI_DMA_NONE)
+        if (dir == PCI_DMA_NONE)
                 BUG();
 
         if (dma_addr >= __direct_map_base
@@ -393,25 +426,16 @@ pci_unmap_single(struct pci_dev *pdev, dma_addr_t dma_addr, size_t size,
         DBGA2("pci_unmap_single: sg [%llx,%zx] np %ld from %p\n",
               dma_addr, size, npages, __builtin_return_address(0));
 }
-EXPORT_SYMBOL(pci_unmap_single);
-
-void
-pci_unmap_page(struct pci_dev *pdev, dma_addr_t dma_addr,
-               size_t size, int direction)
-{
-        pci_unmap_single(pdev, dma_addr, size, direction);
-}
-EXPORT_SYMBOL(pci_unmap_page);
 
 /* Allocate and map kernel buffer using consistent mode DMA for PCI
    device.  Returns non-NULL cpu-view pointer to the buffer if
    successful and sets *DMA_ADDRP to the pci side dma address as well,
    else DMA_ADDRP is undefined.  */
 
-void *
-__pci_alloc_consistent(struct pci_dev *pdev, size_t size,
-                       dma_addr_t *dma_addrp, gfp_t gfp)
+static void *alpha_pci_alloc_coherent(struct device *dev, size_t size,
+                                      dma_addr_t *dma_addrp, gfp_t gfp)
 {
+        struct pci_dev *pdev = alpha_gendev_to_pci(dev);
         void *cpu_addr;
         long order = get_order(size);
 
@@ -439,13 +463,12 @@ try_again:
                 gfp |= GFP_DMA;
                 goto try_again;
         }
-                
+
         DBGA2("pci_alloc_consistent: %zx -> [%p,%llx] from %p\n",
               size, cpu_addr, *dma_addrp, __builtin_return_address(0));
 
         return cpu_addr;
 }
-EXPORT_SYMBOL(__pci_alloc_consistent);
 
 /* Free and unmap a consistent DMA buffer.  CPU_ADDR and DMA_ADDR must
    be values that were returned from pci_alloc_consistent.  SIZE must
@@ -453,17 +476,16 @@ EXPORT_SYMBOL(__pci_alloc_consistent);
    References to the memory and mappings associated with CPU_ADDR or
    DMA_ADDR past this call are illegal.  */
 
-void
-pci_free_consistent(struct pci_dev *pdev, size_t size, void *cpu_addr,
-                    dma_addr_t dma_addr)
+static void alpha_pci_free_coherent(struct device *dev, size_t size,
+                                    void *cpu_addr, dma_addr_t dma_addr)
 {
+        struct pci_dev *pdev = alpha_gendev_to_pci(dev);
         pci_unmap_single(pdev, dma_addr, size, PCI_DMA_BIDIRECTIONAL);
         free_pages((unsigned long)cpu_addr, get_order(size));
 
         DBGA2("pci_free_consistent: [%llx,%zx] from %p\n",
               dma_addr, size, __builtin_return_address(0));
 }
-EXPORT_SYMBOL(pci_free_consistent);
 
 /* Classify the elements of the scatterlist.  Write dma_address
    of each element with:
@@ -626,23 +648,21 @@ sg_fill(struct device *dev, struct scatterlist *leader, struct scatterlist *end,
         return 1;
 }
 
-int
-pci_map_sg(struct pci_dev *pdev, struct scatterlist *sg, int nents,
-           int direction)
+static int alpha_pci_map_sg(struct device *dev, struct scatterlist *sg,
+                            int nents, enum dma_data_direction dir,
+                            struct dma_attrs *attrs)
 {
+        struct pci_dev *pdev = alpha_gendev_to_pci(dev);
         struct scatterlist *start, *end, *out;
         struct pci_controller *hose;
         struct pci_iommu_arena *arena;
         dma_addr_t max_dma;
         int dac_allowed;
-        struct device *dev;
 
-        if (direction == PCI_DMA_NONE)
+        if (dir == PCI_DMA_NONE)
                 BUG();
 
-        dac_allowed = pdev ? pci_dac_dma_supported(pdev, pdev->dma_mask) : 0;
-
-        dev = pdev ? &pdev->dev : NULL;
+        dac_allowed = dev ? pci_dac_dma_supported(pdev, pdev->dma_mask) : 0;
 
         /* Fast path single entry scatterlists.  */
         if (nents == 1) {
@@ -699,19 +719,19 @@ pci_map_sg(struct pci_dev *pdev, struct scatterlist *sg, int nents,
         /* Some allocation failed while mapping the scatterlist
            entries.  Unmap them now.  */
         if (out > start)
-                pci_unmap_sg(pdev, start, out - start, direction);
+                pci_unmap_sg(pdev, start, out - start, dir);
         return 0;
 }
-EXPORT_SYMBOL(pci_map_sg);
 
 /* Unmap a set of streaming mode DMA translations.  Again, cpu read
    rules concerning calls here are the same as for pci_unmap_single()
    above.  */
 
-void
-pci_unmap_sg(struct pci_dev *pdev, struct scatterlist *sg, int nents,
-             int direction)
+static void alpha_pci_unmap_sg(struct device *dev, struct scatterlist *sg,
+                               int nents, enum dma_data_direction dir,
+                               struct dma_attrs *attrs)
 {
+        struct pci_dev *pdev = alpha_gendev_to_pci(dev);
         unsigned long flags;
         struct pci_controller *hose;
         struct pci_iommu_arena *arena;
@@ -719,7 +739,7 @@ pci_unmap_sg(struct pci_dev *pdev, struct scatterlist *sg, int nents,
         dma_addr_t max_dma;
         dma_addr_t fbeg, fend;
 
-        if (direction == PCI_DMA_NONE)
+        if (dir == PCI_DMA_NONE)
                 BUG();
 
         if (! alpha_mv.mv_pci_tbi)
@@ -783,15 +803,13 @@ pci_unmap_sg(struct pci_dev *pdev, struct scatterlist *sg, int nents,
 
         DBGA("pci_unmap_sg: %ld entries\n", nents - (end - sg));
 }
-EXPORT_SYMBOL(pci_unmap_sg);
-
 
 /* Return whether the given PCI device DMA address mask can be
    supported properly.  */
 
-int
-pci_dma_supported(struct pci_dev *pdev, u64 mask)
+static int alpha_pci_supported(struct device *dev, u64 mask)
 {
+        struct pci_dev *pdev = alpha_gendev_to_pci(dev);
         struct pci_controller *hose;
         struct pci_iommu_arena *arena;
 
@@ -818,7 +836,6 @@ pci_dma_supported(struct pci_dev *pdev, u64 mask)
 
         return 0;
 }
-EXPORT_SYMBOL(pci_dma_supported);
 
 
 /*
@@ -918,66 +935,32 @@ iommu_unbind(struct pci_iommu_arena *arena, long pg_start, long pg_count)
         return 0;
 }
 
-/* True if the machine supports DAC addressing, and DEV can
-   make use of it given MASK.  */
-
-static int
-pci_dac_dma_supported(struct pci_dev *dev, u64 mask)
-{
-        dma64_addr_t dac_offset = alpha_mv.pci_dac_offset;
-        int ok = 1;
-
-        /* If this is not set, the machine doesn't support DAC at all.  */
-        if (dac_offset == 0)
-                ok = 0;
-
-        /* The device has to be able to address our DAC bit.  */
-        if ((dac_offset & dev->dma_mask) != dac_offset)
-                ok = 0;
-
-        /* If both conditions above are met, we are fine. */
-        DBGA("pci_dac_dma_supported %s from %p\n",
-             ok ? "yes" : "no", __builtin_return_address(0));
-
-        return ok;
-}
-
-/* Helper for generic DMA-mapping functions. */
-
-struct pci_dev *
-alpha_gendev_to_pci(struct device *dev)
+static int alpha_pci_mapping_error(struct device *dev, dma_addr_t dma_addr)
 {
-        if (dev && dev->bus == &pci_bus_type)
-                return to_pci_dev(dev);
-
-        /* Assume that non-PCI devices asking for DMA are either ISA or EISA,
-           BUG() otherwise. */
-        BUG_ON(!isa_bridge);
-
-        /* Assume non-busmaster ISA DMA when dma_mask is not set (the ISA
-           bridge is bus master then). */
-        if (!dev || !dev->dma_mask || !*dev->dma_mask)
-                return isa_bridge;
-
-        /* For EISA bus masters, return isa_bridge (it might have smaller
-           dma_mask due to wiring limitations). */
-        if (*dev->dma_mask >= isa_bridge->dma_mask)
-                return isa_bridge;
-
-        /* This assumes ISA bus master with dma_mask 0xffffff. */
-        return NULL;
+        return dma_addr == 0;
 }
-EXPORT_SYMBOL(alpha_gendev_to_pci);
 
-int
-dma_set_mask(struct device *dev, u64 mask)
+static int alpha_pci_set_mask(struct device *dev, u64 mask)
 {
         if (!dev->dma_mask ||
             !pci_dma_supported(alpha_gendev_to_pci(dev), mask))
                 return -EIO;
 
         *dev->dma_mask = mask;
-
         return 0;
 }
-EXPORT_SYMBOL(dma_set_mask);
+
+struct dma_map_ops alpha_pci_ops = {
+        .alloc_coherent         = alpha_pci_alloc_coherent,
+        .free_coherent          = alpha_pci_free_coherent,
+        .map_page               = alpha_pci_map_page,
+        .unmap_page             = alpha_pci_unmap_page,
+        .map_sg                 = alpha_pci_map_sg,
+        .unmap_sg               = alpha_pci_unmap_sg,
+        .mapping_error          = alpha_pci_mapping_error,
+        .dma_supported          = alpha_pci_supported,
+        .set_dma_mask           = alpha_pci_set_mask,
+};
+
+struct dma_map_ops *dma_ops = &alpha_pci_ops;
+EXPORT_SYMBOL(dma_ops);
diff --git a/arch/alpha/kernel/ptrace.c b/arch/alpha/kernel/ptrace.c
index e072041d19f8..9acadc6b16a0 100644
--- a/arch/alpha/kernel/ptrace.c
+++ b/arch/alpha/kernel/ptrace.c
@@ -249,6 +249,17 @@ ptrace_cancel_bpt(struct task_struct * child)
         return (nsaved != 0);
 }
 
+void user_enable_single_step(struct task_struct *child)
+{
+        /* Mark single stepping.  */
+        task_thread_info(child)->bpt_nsaved = -1;
+}
+
+void user_disable_single_step(struct task_struct *child)
+{
+        ptrace_cancel_bpt(child);
+}
+
 /*
  * Called by kernel/ptrace.c when detaching..
  *
@@ -256,7 +267,7 @@ ptrace_cancel_bpt(struct task_struct * child)
  */
 void ptrace_disable(struct task_struct *child)
 { 
-        ptrace_cancel_bpt(child);
+        user_disable_single_step(child);
 }
 
 long arch_ptrace(struct task_struct *child, long request, long addr, long data)
@@ -295,52 +306,6 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
                 DBG(DBG_MEM, ("poke $%ld<-%#lx\n", addr, data));
                 ret = put_reg(child, addr, data);
                 break;
-
-        case PTRACE_SYSCALL:
-                /* continue and stop at next (return from) syscall */
-        case PTRACE_CONT:    /* restart after signal. */
-                ret = -EIO;
-                if (!valid_signal(data))
-                        break;
-                if (request == PTRACE_SYSCALL)
-                        set_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
-                else
-                        clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
-                child->exit_code = data;
-                /* make sure single-step breakpoint is gone. */
-                ptrace_cancel_bpt(child);
-                wake_up_process(child);
-                ret = 0;
-                break;
-
-        /*
-         * Make the child exit.  Best I can do is send it a sigkill.
-         * perhaps it should be put in the status that it wants to
-         * exit.
-         */
-        case PTRACE_KILL:
-                ret = 0;
-                if (child->exit_state == EXIT_ZOMBIE)
-                        break;
-                child->exit_code = SIGKILL;
-                /* make sure single-step breakpoint is gone. */
-                ptrace_cancel_bpt(child);
-                wake_up_process(child);
-                break;
-
-        case PTRACE_SINGLESTEP:  /* execute single instruction. */
-                ret = -EIO;
-                if (!valid_signal(data))
-                        break;
-                /* Mark single stepping.  */
-                task_thread_info(child)->bpt_nsaved = -1;
-                clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
-                child->exit_code = data;
-                wake_up_process(child);
-                /* give it a chance to run. */
-                ret = 0;
-                break;
-
         default:
                 ret = ptrace_request(child, request, addr, data);
                 break;
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 3b181284970f..cadfe2ee66a5 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -155,6 +155,9 @@ config ARCH_MAY_HAVE_PC_FDC
 config ZONE_DMA
         bool
 
+config NEED_DMA_MAP_STATE
+       def_bool y
+
 config GENERIC_ISA_DMA
         bool
 
@@ -321,10 +324,9 @@ config ARCH_MXC
         bool "Freescale MXC/iMX-based"
         select GENERIC_TIME
         select GENERIC_CLOCKEVENTS
-        select ARCH_MTD_XIP
-        select GENERIC_GPIO
         select ARCH_REQUIRE_GPIOLIB
         select HAVE_CLK
+        select COMMON_CLKDEV
         help
           Support for Freescale MXC/iMX-based family of processors
 
@@ -508,7 +510,7 @@ config ARCH_ORION5X
           Orion-2 (5281), Orion-1-90 (6183).
 
 config ARCH_MMP
-        bool "Marvell PXA168/910"
+        bool "Marvell PXA168/910/MMP2"
         depends on MMU
         select GENERIC_GPIO
         select ARCH_REQUIRE_GPIOLIB
@@ -519,7 +521,7 @@ config ARCH_MMP
         select TICK_ONESHOT
         select PLAT_PXA
         help
-          Support for Marvell's PXA168/910 processor line.
+          Support for Marvell's PXA168/PXA910(MMP) and MMP2 processor line.
 
 config ARCH_KS8695
         bool "Micrel/Kendin KS8695"
@@ -605,6 +607,11 @@ config ARCH_MSM
           interface to the ARM9 modem processor which runs the baseband stack
           and controls some vital subsystems (clock and power control, etc).
 
+config ARCH_SHMOBILE
+        bool "Renesas SH-Mobile"
+        help
+          Support for Renesas's SH-Mobile ARM platforms
+
 config ARCH_RPC
         bool "RiscPC"
         select ARCH_ACORN
@@ -648,12 +655,43 @@ config ARCH_S3C2410
 
 config ARCH_S3C64XX
         bool "Samsung S3C64XX"
+        select PLAT_SAMSUNG
+        select CPU_V6
         select GENERIC_GPIO
+        select ARM_VIC
         select HAVE_CLK
+        select NO_IOPORT
         select ARCH_HAS_CPUFREQ
+        select ARCH_REQUIRE_GPIOLIB
+        select SAMSUNG_CLKSRC
+        select SAMSUNG_IRQ_VIC_TIMER
+        select SAMSUNG_IRQ_UART
+        select S3C_GPIO_TRACK
+        select S3C_GPIO_PULL_UPDOWN
+        select S3C_GPIO_CFG_S3C24XX
+        select S3C_GPIO_CFG_S3C64XX
+        select S3C_DEV_NAND
+        select USB_ARCH_HAS_OHCI
+        select SAMSUNG_GPIOLIB_4BIT
         help
           Samsung S3C64XX series based systems
 
+config ARCH_S5P6440
+        bool "Samsung S5P6440"
+        select CPU_V6
+        select GENERIC_GPIO
+        select HAVE_CLK
+        help
+          Samsung S5P6440 CPU based systems
+
+config ARCH_S5P6442
+        bool "Samsung S5P6442"
+        select CPU_V6
+        select GENERIC_GPIO
+        select HAVE_CLK
+        help
+          Samsung S5P6442 CPU based systems
+
 config ARCH_S5PC1XX
         bool "Samsung S5PC1XX"
         select GENERIC_GPIO
@@ -663,6 +701,15 @@ config ARCH_S5PC1XX
         help
           Samsung S5PC1XX series based systems
 
+config ARCH_S5PV210
+        bool "Samsung S5PV210/S5PC110"
+        select CPU_V7
+        select GENERIC_GPIO
+        select HAVE_CLK
+        select ARM_L1_CACHE_SHIFT_6
+        help
+          Samsung S5PV210/S5PC110 series based systems
+
 config ARCH_SHARK
         bool "Shark"
         select CPU_SA110
@@ -828,8 +875,7 @@ source "arch/arm/mach-sa1100/Kconfig"
 
 source "arch/arm/plat-samsung/Kconfig"
 source "arch/arm/plat-s3c24xx/Kconfig"
-source "arch/arm/plat-s3c64xx/Kconfig"
-source "arch/arm/plat-s3c/Kconfig"
+source "arch/arm/plat-s5p/Kconfig"
 source "arch/arm/plat-s5pc1xx/Kconfig"
 
 if ARCH_S3C2410
@@ -837,21 +883,27 @@ source "arch/arm/mach-s3c2400/Kconfig"
 source "arch/arm/mach-s3c2410/Kconfig"
 source "arch/arm/mach-s3c2412/Kconfig"
 source "arch/arm/mach-s3c2440/Kconfig"
-source "arch/arm/mach-s3c2442/Kconfig"
 source "arch/arm/mach-s3c2443/Kconfig"
 endif
 
 if ARCH_S3C64XX
-source "arch/arm/mach-s3c6400/Kconfig"
-source "arch/arm/mach-s3c6410/Kconfig"
+source "arch/arm/mach-s3c64xx/Kconfig"
 endif
 
-source "arch/arm/plat-stmp3xxx/Kconfig"
+source "arch/arm/mach-s5p6440/Kconfig"
+
+source "arch/arm/mach-s5p6442/Kconfig"
 
 if ARCH_S5PC1XX
 source "arch/arm/mach-s5pc100/Kconfig"
 endif
 
+source "arch/arm/mach-s5pv210/Kconfig"
+
+source "arch/arm/mach-shmobile/Kconfig"
+
+source "arch/arm/plat-stmp3xxx/Kconfig"
+
 source "arch/arm/mach-u300/Kconfig"
 
 source "arch/arm/mach-ux500/Kconfig"
@@ -1117,7 +1169,7 @@ source kernel/Kconfig.preempt
 config HZ
         int
         default 128 if ARCH_L7200
-        default 200 if ARCH_EBSA110 || ARCH_S3C2410
+        default 200 if ARCH_EBSA110 || ARCH_S3C2410 || ARCH_S5P6440 || ARCH_S5P6442 || ARCH_S5PV210
         default OMAP_32K_TIMER_HZ if ARCH_OMAP && OMAP_32K_TIMER
         default AT91_TIMER_HZ if ARCH_AT91
         default 100
diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug
index 5cb9326df7a7..91344af75f39 100644
--- a/arch/arm/Kconfig.debug
+++ b/arch/arm/Kconfig.debug
@@ -117,7 +117,7 @@ config DEBUG_CLPS711X_UART2
           cause the debug messages to appear on the first serial port.
 
 config DEBUG_S3C_UART
-        depends on PLAT_S3C
+        depends on PLAT_SAMSUNG
         int "S3C UART to use for low-level debug"
         default "0"
         help
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index 81f54ca30788..ed820e737a8a 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -146,6 +146,7 @@ machine-$(CONFIG_ARCH_MX1)		:= mx1
 machine-$(CONFIG_ARCH_MX2)              := mx2
 machine-$(CONFIG_ARCH_MX25)             := mx25
 machine-$(CONFIG_ARCH_MX3)              := mx3
+machine-$(CONFIG_ARCH_MX5)              := mx5
 machine-$(CONFIG_ARCH_MXC91231)         := mxc91231
 machine-$(CONFIG_ARCH_NETX)             := netx
 machine-$(CONFIG_ARCH_NOMADIK)          := nomadik
@@ -159,12 +160,16 @@ machine-$(CONFIG_ARCH_PNX4008)		:= pnx4008
 machine-$(CONFIG_ARCH_PXA)              := pxa
 machine-$(CONFIG_ARCH_REALVIEW)         := realview
 machine-$(CONFIG_ARCH_RPC)              := rpc
-machine-$(CONFIG_ARCH_S3C2410)          := s3c2410 s3c2400 s3c2412 s3c2440 s3c2442 s3c2443
+machine-$(CONFIG_ARCH_S3C2410)          := s3c2410 s3c2400 s3c2412 s3c2440 s3c2443
 machine-$(CONFIG_ARCH_S3C24A0)          := s3c24a0
-machine-$(CONFIG_ARCH_S3C64XX)          := s3c6400 s3c6410
+machine-$(CONFIG_ARCH_S3C64XX)          := s3c64xx
+machine-$(CONFIG_ARCH_S5P6440)          := s5p6440
+machine-$(CONFIG_ARCH_S5P6442)          := s5p6442
 machine-$(CONFIG_ARCH_S5PC1XX)          := s5pc100
+machine-$(CONFIG_ARCH_S5PV210)          := s5pv210
 machine-$(CONFIG_ARCH_SA1100)           := sa1100
 machine-$(CONFIG_ARCH_SHARK)            := shark
+machine-$(CONFIG_ARCH_SHMOBILE)         := shmobile
 machine-$(CONFIG_ARCH_STMP378X)         := stmp378x
 machine-$(CONFIG_ARCH_STMP37XX)         := stmp37xx
 machine-$(CONFIG_ARCH_U300)             := u300
@@ -178,14 +183,15 @@ machine-$(CONFIG_FOOTBRIDGE)		:= footbridge
 # by CONFIG_* macro name.
 plat-$(CONFIG_ARCH_MXC)         := mxc
 plat-$(CONFIG_ARCH_OMAP)        := omap
+plat-$(CONFIG_ARCH_S3C64XX)     := samsung
 plat-$(CONFIG_ARCH_STMP3XXX)    := stmp3xxx
 plat-$(CONFIG_PLAT_IOP)         := iop
 plat-$(CONFIG_PLAT_NOMADIK)     := nomadik
 plat-$(CONFIG_PLAT_ORION)       := orion
 plat-$(CONFIG_PLAT_PXA)         := pxa
-plat-$(CONFIG_PLAT_S3C24XX)     := s3c24xx s3c samsung
-plat-$(CONFIG_PLAT_S3C64XX)     := s3c64xx s3c samsung
-plat-$(CONFIG_PLAT_S5PC1XX)     := s5pc1xx s3c samsung
+plat-$(CONFIG_PLAT_S3C24XX)     := s3c24xx samsung
+plat-$(CONFIG_PLAT_S5PC1XX)     := s5pc1xx samsung
+plat-$(CONFIG_PLAT_S5P)         := s5p samsung
 
 ifeq ($(CONFIG_ARCH_EBSA110),y)
 # This is what happens if you forget the IOCS16 line.
diff --git a/arch/arm/boot/bootp/init.S b/arch/arm/boot/bootp/init.S
index df7bc7068d0f..8b0de41c3dcb 100644
--- a/arch/arm/boot/bootp/init.S
+++ b/arch/arm/boot/bootp/init.S
@@ -49,7 +49,7 @@ _start:		add	lr, pc, #-0x8		@ lr = current load addr
 /*
  * find the end of the tag list, and then add an INITRD tag on the end.
  * If there is already an INITRD tag, then we ignore it; the last INITRD
- * tag takes precidence.
+ * tag takes precedence.
  */
 taglist:        ldr     r10, [r9, #0]           @ tag length
                 teq     r10, #0                 @ last tag (zero length)?
diff --git a/arch/arm/boot/compressed/head.S b/arch/arm/boot/compressed/head.S
index 99b75aa1c2ec..535a91daaa53 100644
--- a/arch/arm/boot/compressed/head.S
+++ b/arch/arm/boot/compressed/head.S
@@ -170,8 +170,8 @@ not_angel:
 
                 .text
                 adr     r0, LC0
- ARM(           ldmia   r0, {r1, r2, r3, r4, r5, r6, ip, sp}    )
- THUMB(         ldmia   r0, {r1, r2, r3, r4, r5, r6, ip}        )
+ ARM(           ldmia   r0, {r1, r2, r3, r4, r5, r6, r11, ip, sp})
+ THUMB(         ldmia   r0, {r1, r2, r3, r4, r5, r6, r11, ip}   )
  THUMB(         ldr     sp, [r0, #28]                           )
                 subs    r0, r0, r1              @ calculate the delta offset
 
@@ -182,12 +182,13 @@ not_angel:
                 /*
                  * We're running at a different address.  We need to fix
                  * up various pointers:
-                 *   r5 - zImage base address
-                 *   r6 - GOT start
+                 *   r5 - zImage base address (_start)
+                 *   r6 - size of decompressed image
+                 *   r11 - GOT start
                  *   ip - GOT end
                  */
                 add     r5, r5, r0
-                add     r6, r6, r0
+                add     r11, r11, r0
                 add     ip, ip, r0
 
 #ifndef CONFIG_ZBOOT_ROM
@@ -205,10 +206,10 @@ not_angel:
                 /*
                  * Relocate all entries in the GOT table.
                  */
-1:              ldr     r1, [r6, #0]            @ relocate entries in the GOT
+1:              ldr     r1, [r11, #0]           @ relocate entries in the GOT
                 add     r1, r1, r0              @ table.  This fixes up the
-                str     r1, [r6], #4            @ C references.
-                cmp     r6, ip
+                str     r1, [r11], #4           @ C references.
+                cmp     r11, ip
                 blo     1b
 #else
 
@@ -216,12 +217,12 @@ not_angel:
                  * Relocate entries in the GOT table.  We only relocate
                  * the entries that are outside the (relocated) BSS region.
                  */
-1:              ldr     r1, [r6, #0]            @ relocate entries in the GOT
+1:              ldr     r1, [r11, #0]           @ relocate entries in the GOT
                 cmp     r1, r2                  @ entry < bss_start ||
                 cmphs   r3, r1                  @ _end < entry
                 addlo   r1, r1, r0              @ table.  This fixes up the
-                str     r1, [r6], #4            @ C references.
-                cmp     r6, ip
+                str     r1, [r11], #4           @ C references.
+                cmp     r11, ip
                 blo     1b
 #endif
 
@@ -247,6 +248,7 @@ not_relocated:	mov	r0, #0
  * Check to see if we will overwrite ourselves.
  *   r4 = final kernel address
  *   r5 = start of this image
+ *   r6 = size of decompressed image
  *   r2 = end of malloc space (and therefore this image)
  * We basically want:
  *   r4 >= r2 -> OK
@@ -254,8 +256,7 @@ not_relocated:	mov	r0, #0
  */
                 cmp     r4, r2
                 bhs     wont_overwrite
-                sub     r3, sp, r5              @ > compressed kernel size
-                add     r0, r4, r3, lsl #2      @ allow for 4x expansion
+                add     r0, r4, r6
                 cmp     r0, r5
                 bls     wont_overwrite
 
@@ -271,7 +272,6 @@ not_relocated:	mov	r0, #0
  * r1-r3  = unused
  * r4     = kernel execution address
  * r5     = decompressed kernel start
- * r6     = processor ID
  * r7     = architecture ID
  * r8     = atags pointer
  * r9-r12,r14 = corrupted
@@ -312,7 +312,8 @@ LC0:		.word	LC0			@ r1
                 .word   _end                    @ r3
                 .word   zreladdr                @ r4
                 .word   _start                  @ r5
-                .word   _got_start              @ r6
+                .word   _image_size             @ r6
+                .word   _got_start              @ r11
                 .word   _got_end                @ ip
                 .word   user_stack+4096         @ sp
 LC1:            .word   reloc_end - reloc_start
@@ -336,7 +337,6 @@ params:		ldr	r0, =params_phys
  *
  * On entry,
  *  r4 = kernel execution address
- *  r6 = processor ID
  *  r7 = architecture number
  *  r8 = atags pointer
  *  r9 = run-time address of "start"  (???)
@@ -542,7 +542,6 @@ __common_mmu_cache_on:
  * r1-r3  = unused
  * r4     = kernel execution address
  * r5     = decompressed kernel start
- * r6     = processor ID
  * r7     = architecture ID
  * r8     = atags pointer
  * r9-r12,r14 = corrupted
@@ -581,19 +580,19 @@ call_kernel:	bl	cache_clean_flush
  *  r1  = corrupted
  *  r2  = corrupted
  *  r3  = block offset
- *  r6  = corrupted
+ *  r9  = corrupted
  *  r12 = corrupted
  */
 
 call_cache_fn:  adr     r12, proc_types
 #ifdef CONFIG_CPU_CP15
-                mrc     p15, 0, r6, c0, c0      @ get processor ID
+                mrc     p15, 0, r9, c0, c0      @ get processor ID
 #else
-                ldr     r6, =CONFIG_PROCESSOR_ID
+                ldr     r9, =CONFIG_PROCESSOR_ID
 #endif
 1:              ldr     r1, [r12, #0]           @ get value
                 ldr     r2, [r12, #4]           @ get mask
-                eor     r1, r1, r6              @ (real ^ match)
+                eor     r1, r1, r9              @ (real ^ match)
                 tst     r1, r2                  @       & mask
  ARM(           addeq   pc, r12, r3             ) @ call cache function
  THUMB(         addeq   r12, r3                 )
@@ -778,8 +777,7 @@ proc_types:
  * Turn off the Cache and MMU.  ARMv3 does not support
  * reading the control register, but ARMv4 does.
  *
- * On entry,  r6 = processor ID
- * On exit,   r0, r1, r2, r3, r12 corrupted
+ * On exit, r0, r1, r2, r3, r9, r12 corrupted
  * This routine must preserve: r4, r6, r7
  */
                 .align  5
@@ -852,10 +850,8 @@ __armv3_mmu_cache_off:
 /*
  * Clean and flush the cache to maintain consistency.
  *
- * On entry,
- *  r6 = processor ID
  * On exit,
- *  r1, r2, r3, r11, r12 corrupted
+ *  r1, r2, r3, r9, r11, r12 corrupted
  * This routine must preserve:
  *  r0, r4, r5, r6, r7
  */
@@ -967,7 +963,7 @@ __armv4_mmu_cache_flush:
                 mov     r2, #64*1024            @ default: 32K dcache size (*2)
                 mov     r11, #32                @ default: 32 byte line size
                 mrc     p15, 0, r3, c0, c0, 1   @ read cache type
-                teq     r3, r6                  @ cache ID register present?
+                teq     r3, r9                  @ cache ID register present?
                 beq     no_cache_id
                 mov     r1, r3, lsr #18
                 and     r1, r1, #7
diff --git a/arch/arm/boot/compressed/vmlinux.lds.in b/arch/arm/boot/compressed/vmlinux.lds.in
index 7ca9ecff652f..d08168941bd6 100644
--- a/arch/arm/boot/compressed/vmlinux.lds.in
+++ b/arch/arm/boot/compressed/vmlinux.lds.in
@@ -43,6 +43,9 @@ SECTIONS
 
   _etext = .;
 
+  /* Assume size of decompressed image is 4x the compressed image */
+  _image_size = (_etext - _text) * 4;
+
   _got_start = .;
   .got                  : { *(.got) }
   _got_end = .;
diff --git a/arch/arm/common/clkdev.c b/arch/arm/common/clkdev.c
index 446b696196e3..6416d5b5020d 100644
--- a/arch/arm/common/clkdev.c
+++ b/arch/arm/common/clkdev.c
@@ -32,7 +32,7 @@ static DEFINE_MUTEX(clocks_mutex);
  *  If an entry has a device ID, it must match
  *  If an entry has a connection ID, it must match
  * Then we take the most specific entry - with the following
- * order of precidence: dev+con > dev only > con only.
+ * order of precedence: dev+con > dev only > con only.
  */
 static struct clk *clk_find(const char *dev_id, const char *con_id)
 {
diff --git a/arch/arm/common/it8152.c b/arch/arm/common/it8152.c
index 2793447621c3..ee1d3b85eb65 100644
--- a/arch/arm/common/it8152.c
+++ b/arch/arm/common/it8152.c
@@ -272,33 +272,6 @@ int dma_needs_bounce(struct device *dev, dma_addr_t dma_addr, size_t size)
                 ((dma_addr + size - PHYS_OFFSET) >= SZ_64M);
 }
 
-/*
- * We override these so we properly do dmabounce otherwise drivers
- * are able to set the dma_mask to 0xffffffff and we can no longer
- * trap bounces. :(
- *
- * We just return true on everyhing except for < 64MB in which case
- * we will fail miseralby and die since we can't handle that case.
- */
-int pci_set_dma_mask(struct pci_dev *dev, u64 mask)
-{
-        dev_dbg(&dev->dev, "%s: %llx\n", __func__, mask);
-        if (mask >= PHYS_OFFSET + SZ_64M - 1)
-                return 0;
-
-        return -EIO;
-}
-
-int
-pci_set_consistent_dma_mask(struct pci_dev *dev, u64 mask)
-{
-        dev_dbg(&dev->dev, "%s: %llx\n", __func__, mask);
-        if (mask >= PHYS_OFFSET + SZ_64M - 1)
-                return 0;
-
-        return -EIO;
-}
-
 int __init it8152_pci_setup(int nr, struct pci_sys_data *sys)
 {
         it8152_io.start = IT8152_IO_BASE + 0x12000;
diff --git a/arch/arm/common/locomo.c b/arch/arm/common/locomo.c
index bd36c778c819..90ae00b631c2 100644
--- a/arch/arm/common/locomo.c
+++ b/arch/arm/common/locomo.c
@@ -32,6 +32,12 @@
 
 #include <asm/hardware/locomo.h>
 
+/* LoCoMo Interrupts */
+#define IRQ_LOCOMO_KEY          (0)
+#define IRQ_LOCOMO_GPIO         (1)
+#define IRQ_LOCOMO_LT           (2)
+#define IRQ_LOCOMO_SPI          (3)
+
 /* M62332 output channel selection */
 #define M62332_EVR_CH   1       /* M62332 volume channel number  */
                                 /*   0 : CH.1 , 1 : CH. 2        */
@@ -58,6 +64,7 @@ struct locomo {
         struct device *dev;
         unsigned long phys;
         unsigned int irq;
+        int irq_base;
         spinlock_t lock;
         void __iomem *base;
 #ifdef CONFIG_PM
@@ -81,9 +88,7 @@ struct locomo_dev_info {
 static struct locomo_dev_info locomo_devices[] = {
         {
                 .devid          = LOCOMO_DEVID_KEYBOARD,
-                .irq = {
-                        IRQ_LOCOMO_KEY,
-                },
+                .irq            = { IRQ_LOCOMO_KEY },
                 .name           = "locomo-keyboard",
                 .offset         = LOCOMO_KEYBOARD,
                 .length         = 16,
@@ -133,53 +138,20 @@ static struct locomo_dev_info locomo_devices[] = {
         },
 };
 
-
-/** LoCoMo interrupt handling stuff.
- * NOTE: LoCoMo has a 1 to many mapping on all of its IRQs.
- * that is, there is only one real hardware interrupt
- * we determine which interrupt it is by reading some IO memory.
- * We have two levels of expansion, first in the handler for the
- * hardware interrupt we generate an interrupt
- * IRQ_LOCOMO_*_BASE and those handlers generate more interrupts
- *
- * hardware irq reads LOCOMO_ICR & 0x0f00
- *   IRQ_LOCOMO_KEY_BASE
- *   IRQ_LOCOMO_GPIO_BASE
- *   IRQ_LOCOMO_LT_BASE
- *   IRQ_LOCOMO_SPI_BASE
- * IRQ_LOCOMO_KEY_BASE reads LOCOMO_KIC & 0x0001
- *   IRQ_LOCOMO_KEY
- * IRQ_LOCOMO_GPIO_BASE reads LOCOMO_GIR & LOCOMO_GPD & 0xffff
- *   IRQ_LOCOMO_GPIO[0-15]
- * IRQ_LOCOMO_LT_BASE reads LOCOMO_LTINT & 0x0001
- *   IRQ_LOCOMO_LT
- * IRQ_LOCOMO_SPI_BASE reads LOCOMO_SPIIR & 0x000F
- *   IRQ_LOCOMO_SPI_RFR
- *   IRQ_LOCOMO_SPI_RFW
- *   IRQ_LOCOMO_SPI_OVRN
- *   IRQ_LOCOMO_SPI_TEND
- */
-
-#define LOCOMO_IRQ_START        (IRQ_LOCOMO_KEY_BASE)
-#define LOCOMO_IRQ_KEY_START    (IRQ_LOCOMO_KEY)
-#define LOCOMO_IRQ_GPIO_START   (IRQ_LOCOMO_GPIO0)
-#define LOCOMO_IRQ_LT_START     (IRQ_LOCOMO_LT)
-#define LOCOMO_IRQ_SPI_START    (IRQ_LOCOMO_SPI_RFR)
-
 static void locomo_handler(unsigned int irq, struct irq_desc *desc)
 {
+        struct locomo *lchip = get_irq_chip_data(irq);
         int req, i;
-        void __iomem *mapbase = get_irq_chip_data(irq);
 
         /* Acknowledge the parent IRQ */
         desc->chip->ack(irq);
 
         /* check why this interrupt was generated */
-        req = locomo_readl(mapbase + LOCOMO_ICR) & 0x0f00;
+        req = locomo_readl(lchip->base + LOCOMO_ICR) & 0x0f00;
 
         if (req) {
                 /* generate the next interrupt(s) */
-                irq = LOCOMO_IRQ_START;
+                irq = lchip->irq_base;
                 for (i = 0; i <= 3; i++, irq++) {
                         if (req & (0x0100 << i)) {
                                 generic_handle_irq(irq);
@@ -195,20 +167,20 @@ static void locomo_ack_irq(unsigned int irq)
 
 static void locomo_mask_irq(unsigned int irq)
 {
-        void __iomem *mapbase = get_irq_chip_data(irq);
+        struct locomo *lchip = get_irq_chip_data(irq);
         unsigned int r;
-        r = locomo_readl(mapbase + LOCOMO_ICR);
-        r &= ~(0x0010 << (irq - LOCOMO_IRQ_START));
-        locomo_writel(r, mapbase + LOCOMO_ICR);
+        r = locomo_readl(lchip->base + LOCOMO_ICR);
+        r &= ~(0x0010 << (irq - lchip->irq_base));
+        locomo_writel(r, lchip->base + LOCOMO_ICR);
 }
 
 static void locomo_unmask_irq(unsigned int irq)
 {
-        void __iomem *mapbase = get_irq_chip_data(irq);
+        struct locomo *lchip = get_irq_chip_data(irq);
         unsigned int r;
-        r = locomo_readl(mapbase + LOCOMO_ICR);
-        r |= (0x0010 << (irq - LOCOMO_IRQ_START));
-        locomo_writel(r, mapbase + LOCOMO_ICR);
+        r = locomo_readl(lchip->base + LOCOMO_ICR);
+        r |= (0x0010 << (irq - lchip->irq_base));
+        locomo_writel(r, lchip->base + LOCOMO_ICR);
 }
 
 static struct irq_chip locomo_chip = {
@@ -218,297 +190,22 @@ static struct irq_chip locomo_chip = {
         .unmask = locomo_unmask_irq,
 };
 
-static void locomo_key_handler(unsigned int irq, struct irq_desc *desc)
-{
-        void __iomem *mapbase = get_irq_chip_data(irq);
-
-        if (locomo_readl(mapbase + LOCOMO_KEYBOARD + LOCOMO_KIC) & 0x0001) {
-                generic_handle_irq(LOCOMO_IRQ_KEY_START);
-        }
-}
-
-static void locomo_key_ack_irq(unsigned int irq)
-{
-        void __iomem *mapbase = get_irq_chip_data(irq);
-        unsigned int r;
-        r = locomo_readl(mapbase + LOCOMO_KEYBOARD + LOCOMO_KIC);
-        r &= ~(0x0100 << (irq - LOCOMO_IRQ_KEY_START));
-        locomo_writel(r, mapbase + LOCOMO_KEYBOARD + LOCOMO_KIC);
-}
-
-static void locomo_key_mask_irq(unsigned int irq)
-{
-        void __iomem *mapbase = get_irq_chip_data(irq);
-        unsigned int r;
-        r = locomo_readl(mapbase + LOCOMO_KEYBOARD + LOCOMO_KIC);
-        r &= ~(0x0010 << (irq - LOCOMO_IRQ_KEY_START));
-        locomo_writel(r, mapbase + LOCOMO_KEYBOARD + LOCOMO_KIC);
-}
-
-static void locomo_key_unmask_irq(unsigned int irq)
-{
-        void __iomem *mapbase = get_irq_chip_data(irq);
-        unsigned int r;
-        r = locomo_readl(mapbase + LOCOMO_KEYBOARD + LOCOMO_KIC);
-        r |= (0x0010 << (irq - LOCOMO_IRQ_KEY_START));
-        locomo_writel(r, mapbase + LOCOMO_KEYBOARD + LOCOMO_KIC);
-}
-
-static struct irq_chip locomo_key_chip = {
-        .name   = "LOCOMO-key",
-        .ack    = locomo_key_ack_irq,
-        .mask   = locomo_key_mask_irq,
-        .unmask = locomo_key_unmask_irq,
-};
-
-static void locomo_gpio_handler(unsigned int irq, struct irq_desc *desc)
-{
-        int req, i;
-        void __iomem *mapbase = get_irq_chip_data(irq);
-
-        req =   locomo_readl(mapbase + LOCOMO_GIR) &
-                locomo_readl(mapbase + LOCOMO_GPD) &
-                0xffff;
-
-        if (req) {
-                irq = LOCOMO_IRQ_GPIO_START;
-                for (i = 0; i <= 15; i++, irq++) {
-                        if (req & (0x0001 << i)) {
-                                generic_handle_irq(irq);
-                        }
-                }
-        }
-}
-
-static void locomo_gpio_ack_irq(unsigned int irq)
-{
-        void __iomem *mapbase = get_irq_chip_data(irq);
-        unsigned int r;
-        r = locomo_readl(mapbase + LOCOMO_GWE);
-        r |= (0x0001 << (irq - LOCOMO_IRQ_GPIO_START));
-        locomo_writel(r, mapbase + LOCOMO_GWE);
-
-        r = locomo_readl(mapbase + LOCOMO_GIS);
-        r &= ~(0x0001 << (irq - LOCOMO_IRQ_GPIO_START));
-        locomo_writel(r, mapbase + LOCOMO_GIS);
-
-        r = locomo_readl(mapbase + LOCOMO_GWE);
-        r &= ~(0x0001 << (irq - LOCOMO_IRQ_GPIO_START));
-        locomo_writel(r, mapbase + LOCOMO_GWE);
-}
-
-static void locomo_gpio_mask_irq(unsigned int irq)
-{
-        void __iomem *mapbase = get_irq_chip_data(irq);
-        unsigned int r;
-        r = locomo_readl(mapbase + LOCOMO_GIE);
-        r &= ~(0x0001 << (irq - LOCOMO_IRQ_GPIO_START));
-        locomo_writel(r, mapbase + LOCOMO_GIE);
-}
-
-static void locomo_gpio_unmask_irq(unsigned int irq)
-{
-        void __iomem *mapbase = get_irq_chip_data(irq);
-        unsigned int r;
-        r = locomo_readl(mapbase + LOCOMO_GIE);
-        r |= (0x0001 << (irq - LOCOMO_IRQ_GPIO_START));
-        locomo_writel(r, mapbase + LOCOMO_GIE);
-}
-
-static int GPIO_IRQ_rising_edge;
-static int GPIO_IRQ_falling_edge;
-
-static int locomo_gpio_type(unsigned int irq, unsigned int type)
-{
-        unsigned int mask;
-        void __iomem *mapbase = get_irq_chip_data(irq);
-
-        mask = 1 << (irq - LOCOMO_IRQ_GPIO_START);
-
-        if (type == IRQ_TYPE_PROBE) {
-                if ((GPIO_IRQ_rising_edge | GPIO_IRQ_falling_edge) & mask)
-                        return 0;
-                type = IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING;
-        }
-
-        if (type & IRQ_TYPE_EDGE_RISING)
-                GPIO_IRQ_rising_edge |= mask;
-        else
-                GPIO_IRQ_rising_edge &= ~mask;
-        if (type & IRQ_TYPE_EDGE_FALLING)
-                GPIO_IRQ_falling_edge |= mask;
-        else
-                GPIO_IRQ_falling_edge &= ~mask;
-        locomo_writel(GPIO_IRQ_rising_edge, mapbase + LOCOMO_GRIE);
-        locomo_writel(GPIO_IRQ_falling_edge, mapbase + LOCOMO_GFIE);
-
-        return 0;
-}
-
-static struct irq_chip locomo_gpio_chip = {
-        .name     = "LOCOMO-gpio",
-        .ack      = locomo_gpio_ack_irq,
-        .mask     = locomo_gpio_mask_irq,
-        .unmask   = locomo_gpio_unmask_irq,
-        .set_type = locomo_gpio_type,
-};
-
-static void locomo_lt_handler(unsigned int irq, struct irq_desc *desc)
-{
-        void __iomem *mapbase = get_irq_chip_data(irq);
-
-        if (locomo_readl(mapbase + LOCOMO_LTINT) & 0x0001) {
-                generic_handle_irq(LOCOMO_IRQ_LT_START);
-        }
-}
-
-static void locomo_lt_ack_irq(unsigned int irq)
-{
-        void __iomem *mapbase = get_irq_chip_data(irq);
-        unsigned int r;
-        r = locomo_readl(mapbase + LOCOMO_LTINT);
-        r &= ~(0x0100 << (irq - LOCOMO_IRQ_LT_START));
-        locomo_writel(r, mapbase + LOCOMO_LTINT);
-}
-
-static void locomo_lt_mask_irq(unsigned int irq)
-{
-        void __iomem *mapbase = get_irq_chip_data(irq);
-        unsigned int r;
-        r = locomo_readl(mapbase + LOCOMO_LTINT);
-        r &= ~(0x0010 << (irq - LOCOMO_IRQ_LT_START));
-        locomo_writel(r, mapbase + LOCOMO_LTINT);
-}
-
-static void locomo_lt_unmask_irq(unsigned int irq)
-{
-        void __iomem *mapbase = get_irq_chip_data(irq);
-        unsigned int r;
-        r = locomo_readl(mapbase + LOCOMO_LTINT);
-        r |= (0x0010 << (irq - LOCOMO_IRQ_LT_START));
-        locomo_writel(r, mapbase + LOCOMO_LTINT);
-}
-
-static struct irq_chip locomo_lt_chip = {
-        .name   = "LOCOMO-lt",
-        .ack    = locomo_lt_ack_irq,
-        .mask   = locomo_lt_mask_irq,
-        .unmask = locomo_lt_unmask_irq,
-};
-
-static void locomo_spi_handler(unsigned int irq, struct irq_desc *desc)
-{
-        int req, i;
-        void __iomem *mapbase = get_irq_chip_data(irq);
-
-        req = locomo_readl(mapbase + LOCOMO_SPI + LOCOMO_SPIIR) & 0x000F;
-        if (req) {
-                irq = LOCOMO_IRQ_SPI_START;
-
-                for (i = 0; i <= 3; i++, irq++) {
-                        if (req & (0x0001 << i)) {
-                                generic_handle_irq(irq);
-                        }
-                }
-        }
-}
-
-static void locomo_spi_ack_irq(unsigned int irq)
-{
-        void __iomem *mapbase = get_irq_chip_data(irq);
-        unsigned int r;
-        r = locomo_readl(mapbase + LOCOMO_SPI + LOCOMO_SPIWE);
-        r |= (0x0001 << (irq - LOCOMO_IRQ_SPI_START));
-        locomo_writel(r, mapbase + LOCOMO_SPI + LOCOMO_SPIWE);
-
-        r = locomo_readl(mapbase + LOCOMO_SPI + LOCOMO_SPIIS);
-        r &= ~(0x0001 << (irq - LOCOMO_IRQ_SPI_START));
-        locomo_writel(r, mapbase + LOCOMO_SPI + LOCOMO_SPIIS);
-
-        r = locomo_readl(mapbase + LOCOMO_SPI + LOCOMO_SPIWE);
-        r &= ~(0x0001 << (irq - LOCOMO_IRQ_SPI_START));
-        locomo_writel(r, mapbase + LOCOMO_SPI + LOCOMO_SPIWE);
-}
-
-static void locomo_spi_mask_irq(unsigned int irq)
-{
-        void __iomem *mapbase = get_irq_chip_data(irq);
-        unsigned int r;
-        r = locomo_readl(mapbase + LOCOMO_SPI + LOCOMO_SPIIE);
-        r &= ~(0x0001 << (irq - LOCOMO_IRQ_SPI_START));
-        locomo_writel(r, mapbase + LOCOMO_SPI + LOCOMO_SPIIE);
-}
-
-static void locomo_spi_unmask_irq(unsigned int irq)
-{
-        void __iomem *mapbase = get_irq_chip_data(irq);
-        unsigned int r;
-        r = locomo_readl(mapbase + LOCOMO_SPI + LOCOMO_SPIIE);
-        r |= (0x0001 << (irq - LOCOMO_IRQ_SPI_START));
-        locomo_writel(r, mapbase + LOCOMO_SPI + LOCOMO_SPIIE);
-}
-
-static struct irq_chip locomo_spi_chip = {
-        .name   = "LOCOMO-spi",
-        .ack    = locomo_spi_ack_irq,
-        .mask   = locomo_spi_mask_irq,
-        .unmask = locomo_spi_unmask_irq,
-};
-
 static void locomo_setup_irq(struct locomo *lchip)
 {
-        int irq;
-        void __iomem *irqbase = lchip->base;
+        int irq = lchip->irq_base;
 
         /*
          * Install handler for IRQ_LOCOMO_HW.
          */
         set_irq_type(lchip->irq, IRQ_TYPE_EDGE_FALLING);
-        set_irq_chip_data(lchip->irq, irqbase);
+        set_irq_chip_data(lchip->irq, lchip);
         set_irq_chained_handler(lchip->irq, locomo_handler);
 
-        /* Install handlers for IRQ_LOCOMO_*_BASE */
-        set_irq_chip(IRQ_LOCOMO_KEY_BASE, &locomo_chip);
-        set_irq_chip_data(IRQ_LOCOMO_KEY_BASE, irqbase);
-        set_irq_chained_handler(IRQ_LOCOMO_KEY_BASE, locomo_key_handler);
-
-        set_irq_chip(IRQ_LOCOMO_GPIO_BASE, &locomo_chip);
-        set_irq_chip_data(IRQ_LOCOMO_GPIO_BASE, irqbase);
-        set_irq_chained_handler(IRQ_LOCOMO_GPIO_BASE, locomo_gpio_handler);
-
-        set_irq_chip(IRQ_LOCOMO_LT_BASE, &locomo_chip);
-        set_irq_chip_data(IRQ_LOCOMO_LT_BASE, irqbase);
-        set_irq_chained_handler(IRQ_LOCOMO_LT_BASE, locomo_lt_handler);
-
-        set_irq_chip(IRQ_LOCOMO_SPI_BASE, &locomo_chip);
-        set_irq_chip_data(IRQ_LOCOMO_SPI_BASE, irqbase);
-        set_irq_chained_handler(IRQ_LOCOMO_SPI_BASE, locomo_spi_handler);
-
-        /* install handlers for IRQ_LOCOMO_KEY_BASE generated interrupts */
-        set_irq_chip(LOCOMO_IRQ_KEY_START, &locomo_key_chip);
-        set_irq_chip_data(LOCOMO_IRQ_KEY_START, irqbase);
-        set_irq_handler(LOCOMO_IRQ_KEY_START, handle_edge_irq);
-        set_irq_flags(LOCOMO_IRQ_KEY_START, IRQF_VALID | IRQF_PROBE);
-
-        /* install handlers for IRQ_LOCOMO_GPIO_BASE generated interrupts */
-        for (irq = LOCOMO_IRQ_GPIO_START; irq < LOCOMO_IRQ_GPIO_START + 16; irq++) {
-                set_irq_chip(irq, &locomo_gpio_chip);
-                set_irq_chip_data(irq, irqbase);
-                set_irq_handler(irq, handle_edge_irq);
-                set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
-        }
-
-        /* install handlers for IRQ_LOCOMO_LT_BASE generated interrupts */
-        set_irq_chip(LOCOMO_IRQ_LT_START, &locomo_lt_chip);
-        set_irq_chip_data(LOCOMO_IRQ_LT_START, irqbase);
-        set_irq_handler(LOCOMO_IRQ_LT_START, handle_edge_irq);
-        set_irq_flags(LOCOMO_IRQ_LT_START, IRQF_VALID | IRQF_PROBE);
-
-        /* install handlers for IRQ_LOCOMO_SPI_BASE generated interrupts */
-        for (irq = LOCOMO_IRQ_SPI_START; irq < LOCOMO_IRQ_SPI_START + 4; irq++) {
-                set_irq_chip(irq, &locomo_spi_chip);
-                set_irq_chip_data(irq, irqbase);
-                set_irq_handler(irq, handle_edge_irq);
+        /* Install handlers for IRQ_LOCOMO_* */
+        for ( ; irq <= lchip->irq_base + 3; irq++) {
+                set_irq_chip(irq, &locomo_chip);
+                set_irq_chip_data(irq, lchip);
+                set_irq_handler(irq, handle_level_irq);
                 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
         }
 }
@@ -555,7 +252,8 @@ locomo_init_one_child(struct locomo *lchip, struct locomo_dev_info *info)
                 dev->mapbase = 0;
         dev->length = info->length;
 
-        memmove(dev->irq, info->irq, sizeof(dev->irq));
+        dev->irq[0] = (lchip->irq_base == NO_IRQ) ?
+                        NO_IRQ : lchip->irq_base + info->irq[0];
 
         ret = device_register(&dev->dev);
         if (ret) {
@@ -672,6 +370,7 @@ static int locomo_resume(struct platform_device *dev)
 static int
 __locomo_probe(struct device *me, struct resource *mem, int irq)
 {
+        struct locomo_platform_data *pdata = me->platform_data;
         struct locomo *lchip;
         unsigned long r;
         int i, ret = -ENODEV;
@@ -687,6 +386,7 @@ __locomo_probe(struct device *me, struct resource *mem, int irq)
 
         lchip->phys = mem->start;
         lchip->irq = irq;
+        lchip->irq_base = (pdata) ? pdata->irq_base : NO_IRQ;
 
         /*
          * Map the whole region.  This also maps the
@@ -753,7 +453,7 @@ __locomo_probe(struct device *me, struct resource *mem, int irq)
          * The interrupt controller must be initialised before any
          * other device to ensure that the interrupts are available.
          */
-        if (lchip->irq != NO_IRQ)
+        if (lchip->irq != NO_IRQ && lchip->irq_base != NO_IRQ)
                 locomo_setup_irq(lchip);
 
         for (i = 0; i < ARRAY_SIZE(locomo_devices); i++)
diff --git a/arch/arm/common/sa1111.c b/arch/arm/common/sa1111.c
index 8ba7044c554d..a52a27c1d9be 100644
--- a/arch/arm/common/sa1111.c
+++ b/arch/arm/common/sa1111.c
@@ -35,6 +35,58 @@
 
 #include <asm/hardware/sa1111.h>
 
+/* SA1111 IRQs */
+#define IRQ_GPAIN0              (0)
+#define IRQ_GPAIN1              (1)
+#define IRQ_GPAIN2              (2)
+#define IRQ_GPAIN3              (3)
+#define IRQ_GPBIN0              (4)
+#define IRQ_GPBIN1              (5)
+#define IRQ_GPBIN2              (6)
+#define IRQ_GPBIN3              (7)
+#define IRQ_GPBIN4              (8)
+#define IRQ_GPBIN5              (9)
+#define IRQ_GPCIN0              (10)
+#define IRQ_GPCIN1              (11)
+#define IRQ_GPCIN2              (12)
+#define IRQ_GPCIN3              (13)
+#define IRQ_GPCIN4              (14)
+#define IRQ_GPCIN5              (15)
+#define IRQ_GPCIN6              (16)
+#define IRQ_GPCIN7              (17)
+#define IRQ_MSTXINT             (18)
+#define IRQ_MSRXINT             (19)
+#define IRQ_MSSTOPERRINT        (20)
+#define IRQ_TPTXINT             (21)
+#define IRQ_TPRXINT             (22)
+#define IRQ_TPSTOPERRINT        (23)
+#define SSPXMTINT               (24)
+#define SSPRCVINT               (25)
+#define SSPROR                  (26)
+#define AUDXMTDMADONEA          (32)
+#define AUDRCVDMADONEA          (33)
+#define AUDXMTDMADONEB          (34)
+#define AUDRCVDMADONEB          (35)
+#define AUDTFSR                 (36)
+#define AUDRFSR                 (37)
+#define AUDTUR                  (38)
+#define AUDROR                  (39)
+#define AUDDTS                  (40)
+#define AUDRDD                  (41)
+#define AUDSTO                  (42)
+#define IRQ_USBPWR              (43)
+#define IRQ_HCIM                (44)
+#define IRQ_HCIBUFFACC          (45)
+#define IRQ_HCIRMTWKP           (46)
+#define IRQ_NHCIMFCIR           (47)
+#define IRQ_USB_PORT_RESUME     (48)
+#define IRQ_S0_READY_NINT       (49)
+#define IRQ_S1_READY_NINT       (50)
+#define IRQ_S0_CD_VALID         (51)
+#define IRQ_S1_CD_VALID         (52)
+#define IRQ_S0_BVD1_STSCHG      (53)
+#define IRQ_S1_BVD1_STSCHG      (54)
+
 extern void __init sa1110_mb_enable(void);
 
 /*
@@ -49,6 +101,7 @@ struct sa1111 {
         struct clk      *clk;
         unsigned long   phys;
         int             irq;
+        int             irq_base;       /* base for cascaded on-chip IRQs */
         spinlock_t      lock;
         void __iomem    *base;
 #ifdef CONFIG_PM
@@ -152,36 +205,37 @@ static void
 sa1111_irq_handler(unsigned int irq, struct irq_desc *desc)
 {
         unsigned int stat0, stat1, i;
-        void __iomem *base = get_irq_data(irq);
+        struct sa1111 *sachip = get_irq_data(irq);
+        void __iomem *mapbase = sachip->base + SA1111_INTC;
 
-        stat0 = sa1111_readl(base + SA1111_INTSTATCLR0);
-        stat1 = sa1111_readl(base + SA1111_INTSTATCLR1);
+        stat0 = sa1111_readl(mapbase + SA1111_INTSTATCLR0);
+        stat1 = sa1111_readl(mapbase + SA1111_INTSTATCLR1);
 
-        sa1111_writel(stat0, base + SA1111_INTSTATCLR0);
+        sa1111_writel(stat0, mapbase + SA1111_INTSTATCLR0);
 
         desc->chip->ack(irq);
 
-        sa1111_writel(stat1, base + SA1111_INTSTATCLR1);
+        sa1111_writel(stat1, mapbase + SA1111_INTSTATCLR1);
 
         if (stat0 == 0 && stat1 == 0) {
                 do_bad_IRQ(irq, desc);
                 return;
         }
 
-        for (i = IRQ_SA1111_START; stat0; i++, stat0 >>= 1)
+        for (i = 0; stat0; i++, stat0 >>= 1)
                 if (stat0 & 1)
-                        handle_edge_irq(i, irq_desc + i);
+                        generic_handle_irq(i + sachip->irq_base);
 
-        for (i = IRQ_SA1111_START + 32; stat1; i++, stat1 >>= 1)
+        for (i = 32; stat1; i++, stat1 >>= 1)
                 if (stat1 & 1)
-                        handle_edge_irq(i, irq_desc + i);
+                        generic_handle_irq(i + sachip->irq_base);
 
         /* For level-based interrupts */
         desc->chip->unmask(irq);
 }
 
-#define SA1111_IRQMASK_LO(x)    (1 << (x - IRQ_SA1111_START))
-#define SA1111_IRQMASK_HI(x)    (1 << (x - IRQ_SA1111_START - 32))
+#define SA1111_IRQMASK_LO(x)    (1 << (x - sachip->irq_base))
+#define SA1111_IRQMASK_HI(x)    (1 << (x - sachip->irq_base - 32))
 
 static void sa1111_ack_irq(unsigned int irq)
 {
@@ -189,7 +243,8 @@ static void sa1111_ack_irq(unsigned int irq)
 
 static void sa1111_mask_lowirq(unsigned int irq)
 {
-        void __iomem *mapbase = get_irq_chip_data(irq);
+        struct sa1111 *sachip = get_irq_chip_data(irq);
+        void __iomem *mapbase = sachip->base + SA1111_INTC;
         unsigned long ie0;
 
         ie0 = sa1111_readl(mapbase + SA1111_INTEN0);
@@ -199,7 +254,8 @@ static void sa1111_mask_lowirq(unsigned int irq)
 
 static void sa1111_unmask_lowirq(unsigned int irq)
 {
-        void __iomem *mapbase = get_irq_chip_data(irq);
+        struct sa1111 *sachip = get_irq_chip_data(irq);
+        void __iomem *mapbase = sachip->base + SA1111_INTC;
         unsigned long ie0;
 
         ie0 = sa1111_readl(mapbase + SA1111_INTEN0);
@@ -216,8 +272,9 @@ static void sa1111_unmask_lowirq(unsigned int irq)
  */
 static int sa1111_retrigger_lowirq(unsigned int irq)
 {
+        struct sa1111 *sachip = get_irq_chip_data(irq);
+        void __iomem *mapbase = sachip->base + SA1111_INTC;
         unsigned int mask = SA1111_IRQMASK_LO(irq);
-        void __iomem *mapbase = get_irq_chip_data(irq);
         unsigned long ip0;
         int i;
 
@@ -237,8 +294,9 @@ static int sa1111_retrigger_lowirq(unsigned int irq)
 
 static int sa1111_type_lowirq(unsigned int irq, unsigned int flags)
 {
+        struct sa1111 *sachip = get_irq_chip_data(irq);
+        void __iomem *mapbase = sachip->base + SA1111_INTC;
         unsigned int mask = SA1111_IRQMASK_LO(irq);
-        void __iomem *mapbase = get_irq_chip_data(irq);
         unsigned long ip0;
 
         if (flags == IRQ_TYPE_PROBE)
@@ -260,8 +318,9 @@ static int sa1111_type_lowirq(unsigned int irq, unsigned int flags)
 
 static int sa1111_wake_lowirq(unsigned int irq, unsigned int on)
 {
+        struct sa1111 *sachip = get_irq_chip_data(irq);
+        void __iomem *mapbase = sachip->base + SA1111_INTC;
         unsigned int mask = SA1111_IRQMASK_LO(irq);
-        void __iomem *mapbase = get_irq_chip_data(irq);
         unsigned long we0;
 
         we0 = sa1111_readl(mapbase + SA1111_WAKEEN0);
@@ -286,7 +345,8 @@ static struct irq_chip sa1111_low_chip = {
 
 static void sa1111_mask_highirq(unsigned int irq)
 {
-        void __iomem *mapbase = get_irq_chip_data(irq);
+        struct sa1111 *sachip = get_irq_chip_data(irq);
+        void __iomem *mapbase = sachip->base + SA1111_INTC;
         unsigned long ie1;
 
         ie1 = sa1111_readl(mapbase + SA1111_INTEN1);
@@ -296,7 +356,8 @@ static void sa1111_mask_highirq(unsigned int irq)
 
 static void sa1111_unmask_highirq(unsigned int irq)
 {
-        void __iomem *mapbase = get_irq_chip_data(irq);
+        struct sa1111 *sachip = get_irq_chip_data(irq);
+        void __iomem *mapbase = sachip->base + SA1111_INTC;
         unsigned long ie1;
 
         ie1 = sa1111_readl(mapbase + SA1111_INTEN1);
@@ -313,8 +374,9 @@ static void sa1111_unmask_highirq(unsigned int irq)
  */
 static int sa1111_retrigger_highirq(unsigned int irq)
 {
+        struct sa1111 *sachip = get_irq_chip_data(irq);
+        void __iomem *mapbase = sachip->base + SA1111_INTC;
         unsigned int mask = SA1111_IRQMASK_HI(irq);
-        void __iomem *mapbase = get_irq_chip_data(irq);
         unsigned long ip1;
         int i;
 
@@ -334,8 +396,9 @@ static int sa1111_retrigger_highirq(unsigned int irq)
 
 static int sa1111_type_highirq(unsigned int irq, unsigned int flags)
 {
+        struct sa1111 *sachip = get_irq_chip_data(irq);
+        void __iomem *mapbase = sachip->base + SA1111_INTC;
         unsigned int mask = SA1111_IRQMASK_HI(irq);
-        void __iomem *mapbase = get_irq_chip_data(irq);
         unsigned long ip1;
 
         if (flags == IRQ_TYPE_PROBE)
@@ -357,8 +420,9 @@ static int sa1111_type_highirq(unsigned int irq, unsigned int flags)
 
 static int sa1111_wake_highirq(unsigned int irq, unsigned int on)
 {
+        struct sa1111 *sachip = get_irq_chip_data(irq);
+        void __iomem *mapbase = sachip->base + SA1111_INTC;
         unsigned int mask = SA1111_IRQMASK_HI(irq);
-        void __iomem *mapbase = get_irq_chip_data(irq);
         unsigned long we1;
 
         we1 = sa1111_readl(mapbase + SA1111_WAKEEN1);
@@ -412,14 +476,14 @@ static void sa1111_setup_irq(struct sa1111 *sachip)
 
         for (irq = IRQ_GPAIN0; irq <= SSPROR; irq++) {
                 set_irq_chip(irq, &sa1111_low_chip);
-                set_irq_chip_data(irq, irqbase);
+                set_irq_chip_data(irq, sachip);
                 set_irq_handler(irq, handle_edge_irq);
                 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
         }
 
         for (irq = AUDXMTDMADONEA; irq <= IRQ_S1_BVD1_STSCHG; irq++) {
                 set_irq_chip(irq, &sa1111_high_chip);
-                set_irq_chip_data(irq, irqbase);
+                set_irq_chip_data(irq, sachip);
                 set_irq_handler(irq, handle_edge_irq);
                 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
         }
@@ -428,7 +492,7 @@ static void sa1111_setup_irq(struct sa1111 *sachip)
          * Register SA1111 interrupt
          */
         set_irq_type(sachip->irq, IRQ_TYPE_EDGE_RISING);
-        set_irq_data(sachip->irq, irqbase);
+        set_irq_data(sachip->irq, sachip);
         set_irq_chained_handler(sachip->irq, sa1111_irq_handler);
 }
 
diff --git a/arch/arm/common/scoop.c b/arch/arm/common/scoop.c
index 37bda5f3dde3..9012004321dd 100644
--- a/arch/arm/common/scoop.c
+++ b/arch/arm/common/scoop.c
@@ -140,6 +140,7 @@ EXPORT_SYMBOL(reset_scoop);
 EXPORT_SYMBOL(read_scoop_reg);
 EXPORT_SYMBOL(write_scoop_reg);
 
+#ifdef CONFIG_PM
 static void check_scoop_reg(struct scoop_dev *sdev)
 {
         unsigned short mcr;
@@ -149,7 +150,6 @@ static void check_scoop_reg(struct scoop_dev *sdev)
                 iowrite16(0x0101, sdev->base + SCOOP_MCR);
 }
 
-#ifdef CONFIG_PM
 static int scoop_suspend(struct platform_device *dev, pm_message_t state)
 {
         struct scoop_dev *sdev = platform_get_drvdata(dev);
diff --git a/arch/arm/configs/ap4evb_defconfig b/arch/arm/configs/ap4evb_defconfig
new file mode 100644
index 000000000000..e14229be7676
--- /dev/null
+++ b/arch/arm/configs/ap4evb_defconfig
@@ -0,0 +1,779 @@
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.33-rc7
+# Mon Feb  8 12:25:36 2010
+#
+CONFIG_ARM=y
+CONFIG_SYS_SUPPORTS_APM_EMULATION=y
+CONFIG_GENERIC_TIME=y
+CONFIG_GENERIC_CLOCKEVENTS=y
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_HAVE_LATENCYTOP_SUPPORT=y
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+CONFIG_HARDIRQS_SW_RESEND=y
+CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
+CONFIG_VECTORS_BASE=0xffff0000
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+CONFIG_CONSTRUCTORS=y
+
+#
+# General setup
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+CONFIG_LOCALVERSION=""
+CONFIG_LOCALVERSION_AUTO=y
+CONFIG_HAVE_KERNEL_GZIP=y
+CONFIG_HAVE_KERNEL_LZO=y
+CONFIG_KERNEL_GZIP=y
+# CONFIG_KERNEL_BZIP2 is not set
+# CONFIG_KERNEL_LZMA is not set
+# CONFIG_KERNEL_LZO is not set
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+CONFIG_SYSVIPC_SYSCTL=y
+# CONFIG_BSD_PROCESS_ACCT is not set
+
+#
+# RCU Subsystem
+#
+CONFIG_TREE_RCU=y
+# CONFIG_TREE_PREEMPT_RCU is not set
+# CONFIG_TINY_RCU is not set
+# CONFIG_RCU_TRACE is not set
+CONFIG_RCU_FANOUT=32
+# CONFIG_RCU_FANOUT_EXACT is not set
+# CONFIG_TREE_RCU_TRACE is not set
+CONFIG_IKCONFIG=y
+CONFIG_IKCONFIG_PROC=y
+CONFIG_LOG_BUF_SHIFT=16
+CONFIG_GROUP_SCHED=y
+CONFIG_FAIR_GROUP_SCHED=y
+# CONFIG_RT_GROUP_SCHED is not set
+CONFIG_USER_SCHED=y
+# CONFIG_CGROUP_SCHED is not set
+# CONFIG_CGROUPS is not set
+# CONFIG_SYSFS_DEPRECATED_V2 is not set
+# CONFIG_RELAY is not set
+CONFIG_NAMESPACES=y
+# CONFIG_UTS_NS is not set
+# CONFIG_IPC_NS is not set
+# CONFIG_USER_NS is not set
+# CONFIG_PID_NS is not set
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_INITRAMFS_SOURCE=""
+CONFIG_RD_GZIP=y
+CONFIG_RD_BZIP2=y
+CONFIG_RD_LZMA=y
+CONFIG_RD_LZO=y
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_SYSCTL=y
+CONFIG_ANON_INODES=y
+# CONFIG_EMBEDDED is not set
+CONFIG_UID16=y
+CONFIG_SYSCTL_SYSCALL=y
+CONFIG_KALLSYMS=y
+# CONFIG_KALLSYMS_ALL is not set
+# CONFIG_KALLSYMS_EXTRA_PASS is not set
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_ELF_CORE=y
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+CONFIG_EPOLL=y
+CONFIG_SIGNALFD=y
+CONFIG_TIMERFD=y
+CONFIG_EVENTFD=y
+CONFIG_SHMEM=y
+CONFIG_AIO=y
+
+#
+# Kernel Performance Events And Counters
+#
+CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_COMPAT_BRK=y
+CONFIG_SLAB=y
+# CONFIG_SLUB is not set
+# CONFIG_SLOB is not set
+# CONFIG_PROFILING is not set
+CONFIG_HAVE_OPROFILE=y
+CONFIG_HAVE_KPROBES=y
+CONFIG_HAVE_KRETPROBES=y
+CONFIG_HAVE_CLK=y
+
+#
+# GCOV-based kernel profiling
+#
+# CONFIG_SLOW_WORK is not set
+CONFIG_HAVE_GENERIC_DMA_COHERENT=y
+CONFIG_SLABINFO=y
+CONFIG_RT_MUTEXES=y
+CONFIG_BASE_SMALL=0
+# CONFIG_MODULES is not set
+CONFIG_BLOCK=y
+CONFIG_LBDAF=y
+# CONFIG_BLK_DEV_BSG is not set
+# CONFIG_BLK_DEV_INTEGRITY is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+# CONFIG_IOSCHED_DEADLINE is not set
+# CONFIG_IOSCHED_CFQ is not set
+# CONFIG_DEFAULT_DEADLINE is not set
+# CONFIG_DEFAULT_CFQ is not set
+CONFIG_DEFAULT_NOOP=y
+CONFIG_DEFAULT_IOSCHED="noop"
+# CONFIG_INLINE_SPIN_TRYLOCK is not set
+# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set
+# CONFIG_INLINE_SPIN_LOCK is not set
+# CONFIG_INLINE_SPIN_LOCK_BH is not set
+# CONFIG_INLINE_SPIN_LOCK_IRQ is not set
+# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set
+CONFIG_INLINE_SPIN_UNLOCK=y
+# CONFIG_INLINE_SPIN_UNLOCK_BH is not set
+CONFIG_INLINE_SPIN_UNLOCK_IRQ=y
+# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set
+# CONFIG_INLINE_READ_TRYLOCK is not set
+# CONFIG_INLINE_READ_LOCK is not set
+# CONFIG_INLINE_READ_LOCK_BH is not set
+# CONFIG_INLINE_READ_LOCK_IRQ is not set
+# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set
+CONFIG_INLINE_READ_UNLOCK=y
+# CONFIG_INLINE_READ_UNLOCK_BH is not set
+CONFIG_INLINE_READ_UNLOCK_IRQ=y
+# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set
+# CONFIG_INLINE_WRITE_TRYLOCK is not set
+# CONFIG_INLINE_WRITE_LOCK is not set
+# CONFIG_INLINE_WRITE_LOCK_BH is not set
+# CONFIG_INLINE_WRITE_LOCK_IRQ is not set
+# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set
+CONFIG_INLINE_WRITE_UNLOCK=y
+# CONFIG_INLINE_WRITE_UNLOCK_BH is not set
+CONFIG_INLINE_WRITE_UNLOCK_IRQ=y
+# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set
+# CONFIG_MUTEX_SPIN_ON_OWNER is not set
+# CONFIG_FREEZER is not set
+
+#
+# System Type
+#
+CONFIG_MMU=y
+# CONFIG_ARCH_AAEC2000 is not set
+# CONFIG_ARCH_INTEGRATOR is not set
+# CONFIG_ARCH_REALVIEW is not set
+# CONFIG_ARCH_VERSATILE is not set
+# CONFIG_ARCH_AT91 is not set
+# CONFIG_ARCH_CLPS711X is not set
+# CONFIG_ARCH_GEMINI is not set
+# CONFIG_ARCH_EBSA110 is not set
+# CONFIG_ARCH_EP93XX is not set
+# CONFIG_ARCH_FOOTBRIDGE is not set
+# CONFIG_ARCH_MXC is not set
+# CONFIG_ARCH_STMP3XXX is not set
+# CONFIG_ARCH_NETX is not set
+# CONFIG_ARCH_H720X is not set
+# CONFIG_ARCH_NOMADIK is not set
+# CONFIG_ARCH_IOP13XX is not set
+# CONFIG_ARCH_IOP32X is not set
+# CONFIG_ARCH_IOP33X is not set
+# CONFIG_ARCH_IXP23XX is not set
+# CONFIG_ARCH_IXP2000 is not set
+# CONFIG_ARCH_IXP4XX is not set
+# CONFIG_ARCH_L7200 is not set
+# CONFIG_ARCH_DOVE is not set
+# CONFIG_ARCH_KIRKWOOD is not set
+# CONFIG_ARCH_LOKI is not set
+# CONFIG_ARCH_MV78XX0 is not set
+# CONFIG_ARCH_ORION5X is not set
+# CONFIG_ARCH_MMP is not set
+# CONFIG_ARCH_KS8695 is not set
+# CONFIG_ARCH_NS9XXX is not set
+# CONFIG_ARCH_W90X900 is not set
+# CONFIG_ARCH_PNX4008 is not set
+# CONFIG_ARCH_PXA is not set
+# CONFIG_ARCH_MSM is not set
+CONFIG_ARCH_SHMOBILE=y
+# CONFIG_ARCH_RPC is not set
+# CONFIG_ARCH_SA1100 is not set
+# CONFIG_ARCH_S3C2410 is not set
+# CONFIG_ARCH_S3C64XX is not set
+# CONFIG_ARCH_S5PC1XX is not set
+# CONFIG_ARCH_SHARK is not set
+# CONFIG_ARCH_LH7A40X is not set
+# CONFIG_ARCH_U300 is not set
+# CONFIG_ARCH_DAVINCI is not set
+# CONFIG_ARCH_OMAP is not set
+# CONFIG_ARCH_BCMRING is not set
+# CONFIG_ARCH_U8500 is not set
+
+#
+# SH-Mobile System Type
+#
+# CONFIG_ARCH_SH7367 is not set
+# CONFIG_ARCH_SH7377 is not set
+CONFIG_ARCH_SH7372=y
+
+#
+# SH-Mobile Board Type
+#
+CONFIG_MACH_AP4EVB=y
+
+#
+# SH-Mobile System Configuration
+#
+
+#
+# Memory configuration
+#
+CONFIG_MEMORY_START=0x40000000
+CONFIG_MEMORY_SIZE=0x10000000
+
+#
+# Timer and clock configuration
+#
+CONFIG_SH_TIMER_CMT=y
+
+#
+# Processor Type
+#
+CONFIG_CPU_32v6K=y
+CONFIG_CPU_V7=y
+CONFIG_CPU_32v7=y
+CONFIG_CPU_ABRT_EV7=y
+CONFIG_CPU_PABRT_V7=y
+CONFIG_CPU_CACHE_V7=y
+CONFIG_CPU_CACHE_VIPT=y
+CONFIG_CPU_COPY_V6=y
+CONFIG_CPU_TLB_V7=y
+CONFIG_CPU_HAS_ASID=y
+CONFIG_CPU_CP15=y
+CONFIG_CPU_CP15_MMU=y
+
+#
+# Processor Features
+#
+CONFIG_ARM_THUMB=y
+# CONFIG_ARM_THUMBEE is not set
+# CONFIG_CPU_ICACHE_DISABLE is not set
+# CONFIG_CPU_DCACHE_DISABLE is not set
+# CONFIG_CPU_BPREDICT_DISABLE is not set
+CONFIG_HAS_TLS_REG=y
+CONFIG_ARM_L1_CACHE_SHIFT=5
+# CONFIG_ARM_ERRATA_430973 is not set
+# CONFIG_ARM_ERRATA_458693 is not set
+# CONFIG_ARM_ERRATA_460075 is not set
+CONFIG_COMMON_CLKDEV=y
+
+#
+# Bus support
+#
+# CONFIG_PCI_SYSCALL is not set
+# CONFIG_ARCH_SUPPORTS_MSI is not set
+# CONFIG_PCCARD is not set
+
+#
+# Kernel Features
+#
+# CONFIG_NO_HZ is not set
+# CONFIG_HIGH_RES_TIMERS is not set
+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
+CONFIG_VMSPLIT_3G=y
+# CONFIG_VMSPLIT_2G is not set
+# CONFIG_VMSPLIT_1G is not set
+CONFIG_PAGE_OFFSET=0xC0000000
+CONFIG_PREEMPT_NONE=y
+# CONFIG_PREEMPT_VOLUNTARY is not set
+# CONFIG_PREEMPT is not set
+CONFIG_HZ=100
+# CONFIG_THUMB2_KERNEL is not set
+CONFIG_AEABI=y
+# CONFIG_OABI_COMPAT is not set
+# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
+# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
+# CONFIG_HIGHMEM is not set
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_FLATMEM_MANUAL=y
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+# CONFIG_SPARSEMEM_MANUAL is not set
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+CONFIG_PAGEFLAGS_EXTENDED=y
+CONFIG_SPLIT_PTLOCK_CPUS=4
+# CONFIG_PHYS_ADDR_T_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=0
+CONFIG_VIRT_TO_BUS=y
+# CONFIG_KSM is not set
+CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
+CONFIG_ALIGNMENT_TRAP=y
+# CONFIG_UACCESS_WITH_MEMCPY is not set
+
+#
+# Boot options
+#
+CONFIG_ZBOOT_ROM_TEXT=0x0
+CONFIG_ZBOOT_ROM_BSS=0x0
+CONFIG_CMDLINE="console=ttySC0,115200 earlyprintk=sh-sci.0,115200"
+# CONFIG_XIP_KERNEL is not set
+CONFIG_KEXEC=y
+CONFIG_ATAGS_PROC=y
+
+#
+# CPU Power Management
+#
+# CONFIG_CPU_IDLE is not set
+
+#
+# Floating point emulation
+#
+
+#
+# At least one emulation must be selected
+#
+# CONFIG_VFP is not set
+
+#
+# Userspace binary formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+CONFIG_HAVE_AOUT=y
+# CONFIG_BINFMT_AOUT is not set
+# CONFIG_BINFMT_MISC is not set
+
+#
+# Power management options
+#
+CONFIG_PM=y
+# CONFIG_PM_DEBUG is not set
+# CONFIG_SUSPEND is not set
+# CONFIG_APM_EMULATION is not set
+# CONFIG_PM_RUNTIME is not set
+CONFIG_ARCH_SUSPEND_POSSIBLE=y
+# CONFIG_NET is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+# CONFIG_DEVTMPFS is not set
+CONFIG_STANDALONE=y
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+CONFIG_FW_LOADER=y
+# CONFIG_FIRMWARE_IN_KERNEL is not set
+CONFIG_EXTRA_FIRMWARE=""
+# CONFIG_DEBUG_DRIVER is not set
+# CONFIG_DEBUG_DEVRES is not set
+# CONFIG_SYS_HYPERVISOR is not set
+CONFIG_MTD=y
+# CONFIG_MTD_DEBUG is not set
+CONFIG_MTD_CONCAT=y
+CONFIG_MTD_PARTITIONS=y
+# CONFIG_MTD_REDBOOT_PARTS is not set
+# CONFIG_MTD_CMDLINE_PARTS is not set
+# CONFIG_MTD_AFS_PARTS is not set
+# CONFIG_MTD_AR7_PARTS is not set
+
+#
+# User Modules And Translation Layers
+#
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLKDEVS=y
+CONFIG_MTD_BLOCK=y
+# CONFIG_FTL is not set
+# CONFIG_NFTL is not set
+# CONFIG_INFTL is not set
+# CONFIG_RFD_FTL is not set
+# CONFIG_SSFDC is not set
+# CONFIG_MTD_OOPS is not set
+
+#
+# RAM/ROM/Flash chip drivers
+#
+CONFIG_MTD_CFI=y
+# CONFIG_MTD_JEDECPROBE is not set
+CONFIG_MTD_GEN_PROBE=y
+# CONFIG_MTD_CFI_ADV_OPTIONS is not set
+CONFIG_MTD_MAP_BANK_WIDTH_1=y
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
+CONFIG_MTD_MAP_BANK_WIDTH_4=y
+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
+CONFIG_MTD_CFI_I1=y
+CONFIG_MTD_CFI_I2=y
+# CONFIG_MTD_CFI_I4 is not set
+# CONFIG_MTD_CFI_I8 is not set
+CONFIG_MTD_CFI_INTELEXT=y
+# CONFIG_MTD_CFI_AMDSTD is not set
+# CONFIG_MTD_CFI_STAA is not set
+CONFIG_MTD_CFI_UTIL=y
+# CONFIG_MTD_RAM is not set
+# CONFIG_MTD_ROM is not set
+# CONFIG_MTD_ABSENT is not set
+
+#
+# Mapping drivers for chip access
+#
+# CONFIG_MTD_COMPLEX_MAPPINGS is not set
+CONFIG_MTD_PHYSMAP=y
+# CONFIG_MTD_PHYSMAP_COMPAT is not set
+# CONFIG_MTD_ARM_INTEGRATOR is not set
+# CONFIG_MTD_PLATRAM is not set
+
+#
+# Self-contained MTD device drivers
+#
+# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_PHRAM is not set
+# CONFIG_MTD_MTDRAM is not set
+# CONFIG_MTD_BLOCK2MTD is not set
+
+#
+# Disk-On-Chip Device Drivers
+#
+# CONFIG_MTD_DOC2000 is not set
+# CONFIG_MTD_DOC2001 is not set
+# CONFIG_MTD_DOC2001PLUS is not set
+CONFIG_MTD_NAND=y
+# CONFIG_MTD_NAND_VERIFY_WRITE is not set
+# CONFIG_MTD_NAND_ECC_SMC is not set
+# CONFIG_MTD_NAND_MUSEUM_IDS is not set
+CONFIG_MTD_NAND_IDS=y
+# CONFIG_MTD_NAND_DISKONCHIP is not set
+# CONFIG_MTD_NAND_NANDSIM is not set
+# CONFIG_MTD_NAND_PLATFORM is not set
+# CONFIG_MTD_ONENAND is not set
+
+#
+# LPDDR flash memory drivers
+#
+# CONFIG_MTD_LPDDR is not set
+
+#
+# UBI - Unsorted block images
+#
+# CONFIG_MTD_UBI is not set
+# CONFIG_PARPORT is not set
+# CONFIG_BLK_DEV is not set
+# CONFIG_MISC_DEVICES is not set
+CONFIG_HAVE_IDE=y
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+# CONFIG_RAID_ATTRS is not set
+# CONFIG_SCSI is not set
+# CONFIG_SCSI_DMA is not set
+# CONFIG_SCSI_NETLINK is not set
+# CONFIG_ATA is not set
+# CONFIG_MD is not set
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+# CONFIG_INPUT_FF_MEMLESS is not set
+# CONFIG_INPUT_POLLDEV is not set
+# CONFIG_INPUT_SPARSEKMAP is not set
+
+#
+# Userland interfaces
+#
+CONFIG_INPUT_MOUSEDEV=y
+# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_EVDEV is not set
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input Device Drivers
+#
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TABLET is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Hardware I/O ports
+#
+# CONFIG_SERIO is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_CONSOLE_TRANSLATIONS=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+# CONFIG_VT_HW_CONSOLE_BINDING is not set
+CONFIG_DEVKMEM=y
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+# CONFIG_SERIAL_8250 is not set
+
+#
+# Non-8250 serial port support
+#
+CONFIG_SERIAL_SH_SCI=y
+CONFIG_SERIAL_SH_SCI_NR_UARTS=8
+CONFIG_SERIAL_SH_SCI_CONSOLE=y
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+CONFIG_UNIX98_PTYS=y
+# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
+# CONFIG_LEGACY_PTYS is not set
+# CONFIG_IPMI_HANDLER is not set
+# CONFIG_HW_RANDOM is not set
+# CONFIG_R3964 is not set
+# CONFIG_RAW_DRIVER is not set
+# CONFIG_TCG_TPM is not set
+# CONFIG_I2C is not set
+# CONFIG_SPI is not set
+
+#
+# PPS support
+#
+# CONFIG_PPS is not set
+# CONFIG_W1 is not set
+# CONFIG_POWER_SUPPLY is not set
+# CONFIG_HWMON is not set
+# CONFIG_THERMAL is not set
+# CONFIG_WATCHDOG is not set
+CONFIG_SSB_POSSIBLE=y
+
+#
+# Sonics Silicon Backplane
+#
+# CONFIG_SSB is not set
+
+#
+# Multifunction device drivers
+#
+# CONFIG_MFD_CORE is not set
+# CONFIG_MFD_SM501 is not set
+# CONFIG_HTC_PASIC3 is not set
+# CONFIG_MFD_TMIO is not set
+# CONFIG_MFD_T7L66XB is not set
+# CONFIG_MFD_TC6387XB is not set
+# CONFIG_REGULATOR is not set
+# CONFIG_MEDIA_SUPPORT is not set
+
+#
+# Graphics support
+#
+# CONFIG_VGASTATE is not set
+# CONFIG_VIDEO_OUTPUT_CONTROL is not set
+# CONFIG_FB is not set
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+
+#
+# Display device support
+#
+# CONFIG_DISPLAY_SUPPORT is not set
+
+#
+# Console display driver support
+#
+# CONFIG_VGA_CONSOLE is not set
+CONFIG_DUMMY_CONSOLE=y
+# CONFIG_SOUND is not set
+# CONFIG_HID_SUPPORT is not set
+# CONFIG_USB_SUPPORT is not set
+# CONFIG_MMC is not set
+# CONFIG_MEMSTICK is not set
+# CONFIG_NEW_LEDS is not set
+# CONFIG_ACCESSIBILITY is not set
+CONFIG_RTC_LIB=y
+# CONFIG_RTC_CLASS is not set
+# CONFIG_DMADEVICES is not set
+# CONFIG_AUXDISPLAY is not set
+# CONFIG_UIO is not set
+
+#
+# TI VLYNQ
+#
+# CONFIG_STAGING is not set
+
+#
+# File systems
+#
+# CONFIG_EXT2_FS is not set
+# CONFIG_EXT3_FS is not set
+# CONFIG_EXT4_FS is not set
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_FS_POSIX_ACL is not set
+# CONFIG_XFS_FS is not set
+# CONFIG_GFS2_FS is not set
+# CONFIG_BTRFS_FS is not set
+# CONFIG_NILFS2_FS is not set
+CONFIG_FILE_LOCKING=y
+# CONFIG_FSNOTIFY is not set
+# CONFIG_DNOTIFY is not set
+# CONFIG_INOTIFY is not set
+# CONFIG_INOTIFY_USER is not set
+# CONFIG_QUOTA is not set
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+# CONFIG_FUSE_FS is not set
+
+#
+# Caches
+#
+# CONFIG_FSCACHE is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+# CONFIG_MSDOS_FS is not set
+# CONFIG_VFAT_FS is not set
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_SYSCTL=y
+CONFIG_PROC_PAGE_MONITOR=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+# CONFIG_TMPFS_POSIX_ACL is not set
+# CONFIG_HUGETLB_PAGE is not set
+# CONFIG_CONFIGFS_FS is not set
+# CONFIG_MISC_FILESYSTEMS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+# CONFIG_NLS is not set
+
+#
+# Kernel hacking
+#
+# CONFIG_PRINTK_TIME is not set
+CONFIG_ENABLE_WARN_DEPRECATED=y
+CONFIG_ENABLE_MUST_CHECK=y
+CONFIG_FRAME_WARN=1024
+CONFIG_MAGIC_SYSRQ=y
+# CONFIG_STRIP_ASM_SYMS is not set
+# CONFIG_UNUSED_SYMBOLS is not set
+# CONFIG_DEBUG_FS is not set
+# CONFIG_HEADERS_CHECK is not set
+CONFIG_DEBUG_KERNEL=y
+# CONFIG_DEBUG_SHIRQ is not set
+# CONFIG_DETECT_SOFTLOCKUP is not set
+# CONFIG_DETECT_HUNG_TASK is not set
+CONFIG_SCHED_DEBUG=y
+# CONFIG_SCHEDSTATS is not set
+# CONFIG_TIMER_STATS is not set
+# CONFIG_DEBUG_OBJECTS is not set
+# CONFIG_DEBUG_SLAB is not set
+# CONFIG_DEBUG_KMEMLEAK is not set
+# CONFIG_DEBUG_RT_MUTEXES is not set
+# CONFIG_RT_MUTEX_TESTER is not set
+# CONFIG_DEBUG_SPINLOCK is not set
+# CONFIG_DEBUG_MUTEXES is not set
+# CONFIG_DEBUG_LOCK_ALLOC is not set
+# CONFIG_PROVE_LOCKING is not set
+# CONFIG_LOCK_STAT is not set
+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
+# CONFIG_DEBUG_KOBJECT is not set
+CONFIG_DEBUG_BUGVERBOSE=y
+# CONFIG_DEBUG_INFO is not set
+# CONFIG_DEBUG_VM is not set
+# CONFIG_DEBUG_WRITECOUNT is not set
+CONFIG_DEBUG_MEMORY_INIT=y
+# CONFIG_DEBUG_LIST is not set
+# CONFIG_DEBUG_SG is not set
+# CONFIG_DEBUG_NOTIFIERS is not set
+# CONFIG_DEBUG_CREDENTIALS is not set
+# CONFIG_BOOT_PRINTK_DELAY is not set
+# CONFIG_RCU_TORTURE_TEST is not set
+# CONFIG_RCU_CPU_STALL_DETECTOR is not set
+# CONFIG_BACKTRACE_SELF_TEST is not set
+# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
+# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
+# CONFIG_FAULT_INJECTION is not set
+# CONFIG_LATENCYTOP is not set
+# CONFIG_SYSCTL_SYSCALL_CHECK is not set
+# CONFIG_PAGE_POISONING is not set
+CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_TRACING_SUPPORT=y
+# CONFIG_FTRACE is not set
+# CONFIG_SAMPLES is not set
+CONFIG_HAVE_ARCH_KGDB=y
+# CONFIG_KGDB is not set
+CONFIG_ARM_UNWIND=y
+# CONFIG_DEBUG_USER is not set
+# CONFIG_DEBUG_ERRORS is not set
+# CONFIG_DEBUG_STACK_USAGE is not set
+# CONFIG_DEBUG_LL is not set
+# CONFIG_OC_ETM is not set
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY is not set
+# CONFIG_SECURITYFS is not set
+# CONFIG_DEFAULT_SECURITY_SELINUX is not set
+# CONFIG_DEFAULT_SECURITY_SMACK is not set
+# CONFIG_DEFAULT_SECURITY_TOMOYO is not set
+CONFIG_DEFAULT_SECURITY_DAC=y
+CONFIG_DEFAULT_SECURITY=""
+# CONFIG_CRYPTO is not set
+# CONFIG_BINARY_PRINTF is not set
+
+#
+# Library routines
+#
+CONFIG_GENERIC_FIND_LAST_BIT=y
+# CONFIG_CRC_CCITT is not set
+# CONFIG_CRC16 is not set
+# CONFIG_CRC_T10DIF is not set
+# CONFIG_CRC_ITU_T is not set
+# CONFIG_CRC32 is not set
+# CONFIG_CRC7 is not set
+# CONFIG_LIBCRC32C is not set
+CONFIG_ZLIB_INFLATE=y
+CONFIG_LZO_DECOMPRESS=y
+CONFIG_DECOMPRESS_GZIP=y
+CONFIG_DECOMPRESS_BZIP2=y
+CONFIG_DECOMPRESS_LZMA=y
+CONFIG_DECOMPRESS_LZO=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAS_DMA=y
diff --git a/arch/arm/configs/g3evm_defconfig b/arch/arm/configs/g3evm_defconfig
new file mode 100644
index 000000000000..3c19031961db
--- /dev/null
+++ b/arch/arm/configs/g3evm_defconfig
@@ -0,0 +1,774 @@
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.33-rc7
+# Mon Feb  8 12:20:01 2010
+#
+CONFIG_ARM=y
+CONFIG_SYS_SUPPORTS_APM_EMULATION=y
+CONFIG_GENERIC_TIME=y
+CONFIG_GENERIC_CLOCKEVENTS=y
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_HAVE_LATENCYTOP_SUPPORT=y
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+CONFIG_HARDIRQS_SW_RESEND=y
+CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
+CONFIG_VECTORS_BASE=0xffff0000
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+CONFIG_CONSTRUCTORS=y
+
+#
+# General setup
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+CONFIG_LOCALVERSION=""
+CONFIG_LOCALVERSION_AUTO=y
+CONFIG_HAVE_KERNEL_GZIP=y
+CONFIG_HAVE_KERNEL_LZO=y
+CONFIG_KERNEL_GZIP=y
+# CONFIG_KERNEL_BZIP2 is not set
+# CONFIG_KERNEL_LZMA is not set
+# CONFIG_KERNEL_LZO is not set
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+CONFIG_SYSVIPC_SYSCTL=y
+# CONFIG_BSD_PROCESS_ACCT is not set
+
+#
+# RCU Subsystem
+#
+CONFIG_TREE_RCU=y
+# CONFIG_TREE_PREEMPT_RCU is not set
+# CONFIG_TINY_RCU is not set
+# CONFIG_RCU_TRACE is not set
+CONFIG_RCU_FANOUT=32
+# CONFIG_RCU_FANOUT_EXACT is not set
+# CONFIG_TREE_RCU_TRACE is not set
+CONFIG_IKCONFIG=y
+CONFIG_IKCONFIG_PROC=y
+CONFIG_LOG_BUF_SHIFT=16
+CONFIG_GROUP_SCHED=y
+CONFIG_FAIR_GROUP_SCHED=y
+# CONFIG_RT_GROUP_SCHED is not set
+CONFIG_USER_SCHED=y
+# CONFIG_CGROUP_SCHED is not set
+# CONFIG_CGROUPS is not set
+# CONFIG_SYSFS_DEPRECATED_V2 is not set
+# CONFIG_RELAY is not set
+CONFIG_NAMESPACES=y
+# CONFIG_UTS_NS is not set
+# CONFIG_IPC_NS is not set
+# CONFIG_USER_NS is not set
+# CONFIG_PID_NS is not set
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_INITRAMFS_SOURCE=""
+CONFIG_RD_GZIP=y
+CONFIG_RD_BZIP2=y
+CONFIG_RD_LZMA=y
+CONFIG_RD_LZO=y
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_SYSCTL=y
+CONFIG_ANON_INODES=y
+# CONFIG_EMBEDDED is not set
+CONFIG_UID16=y
+CONFIG_SYSCTL_SYSCALL=y
+CONFIG_KALLSYMS=y
+# CONFIG_KALLSYMS_ALL is not set
+# CONFIG_KALLSYMS_EXTRA_PASS is not set
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_ELF_CORE=y
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+CONFIG_EPOLL=y
+CONFIG_SIGNALFD=y
+CONFIG_TIMERFD=y
+CONFIG_EVENTFD=y
+CONFIG_SHMEM=y
+CONFIG_AIO=y
+
+#
+# Kernel Performance Events And Counters
+#
+CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_COMPAT_BRK=y
+CONFIG_SLAB=y
+# CONFIG_SLUB is not set
+# CONFIG_SLOB is not set
+# CONFIG_PROFILING is not set
+CONFIG_HAVE_OPROFILE=y
+CONFIG_HAVE_KPROBES=y
+CONFIG_HAVE_KRETPROBES=y
+CONFIG_HAVE_CLK=y
+
+#
+# GCOV-based kernel profiling
+#
+# CONFIG_SLOW_WORK is not set
+CONFIG_HAVE_GENERIC_DMA_COHERENT=y
+CONFIG_SLABINFO=y
+CONFIG_RT_MUTEXES=y
+CONFIG_BASE_SMALL=0
+# CONFIG_MODULES is not set
+CONFIG_BLOCK=y
+CONFIG_LBDAF=y
+# CONFIG_BLK_DEV_BSG is not set
+# CONFIG_BLK_DEV_INTEGRITY is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+# CONFIG_IOSCHED_DEADLINE is not set
+# CONFIG_IOSCHED_CFQ is not set
+# CONFIG_DEFAULT_DEADLINE is not set
+# CONFIG_DEFAULT_CFQ is not set
+CONFIG_DEFAULT_NOOP=y
+CONFIG_DEFAULT_IOSCHED="noop"
+# CONFIG_INLINE_SPIN_TRYLOCK is not set
+# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set
+# CONFIG_INLINE_SPIN_LOCK is not set
+# CONFIG_INLINE_SPIN_LOCK_BH is not set
+# CONFIG_INLINE_SPIN_LOCK_IRQ is not set
+# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set
+CONFIG_INLINE_SPIN_UNLOCK=y
+# CONFIG_INLINE_SPIN_UNLOCK_BH is not set
+CONFIG_INLINE_SPIN_UNLOCK_IRQ=y
+# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set
+# CONFIG_INLINE_READ_TRYLOCK is not set
+# CONFIG_INLINE_READ_LOCK is not set
+# CONFIG_INLINE_READ_LOCK_BH is not set
+# CONFIG_INLINE_READ_LOCK_IRQ is not set
+# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set
+CONFIG_INLINE_READ_UNLOCK=y
+# CONFIG_INLINE_READ_UNLOCK_BH is not set
+CONFIG_INLINE_READ_UNLOCK_IRQ=y
+# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set
+# CONFIG_INLINE_WRITE_TRYLOCK is not set
+# CONFIG_INLINE_WRITE_LOCK is not set
+# CONFIG_INLINE_WRITE_LOCK_BH is not set
+# CONFIG_INLINE_WRITE_LOCK_IRQ is not set
+# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set
+CONFIG_INLINE_WRITE_UNLOCK=y
+# CONFIG_INLINE_WRITE_UNLOCK_BH is not set
+CONFIG_INLINE_WRITE_UNLOCK_IRQ=y
+# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set
+# CONFIG_MUTEX_SPIN_ON_OWNER is not set
+# CONFIG_FREEZER is not set
+
+#
+# System Type
+#
+CONFIG_MMU=y
+# CONFIG_ARCH_AAEC2000 is not set
+# CONFIG_ARCH_INTEGRATOR is not set
+# CONFIG_ARCH_REALVIEW is not set
+# CONFIG_ARCH_VERSATILE is not set
+# CONFIG_ARCH_AT91 is not set
+# CONFIG_ARCH_CLPS711X is not set
+# CONFIG_ARCH_GEMINI is not set
+# CONFIG_ARCH_EBSA110 is not set
+# CONFIG_ARCH_EP93XX is not set
+# CONFIG_ARCH_FOOTBRIDGE is not set
+# CONFIG_ARCH_MXC is not set
+# CONFIG_ARCH_STMP3XXX is not set
+# CONFIG_ARCH_NETX is not set
+# CONFIG_ARCH_H720X is not set
+# CONFIG_ARCH_NOMADIK is not set
+# CONFIG_ARCH_IOP13XX is not set
+# CONFIG_ARCH_IOP32X is not set
+# CONFIG_ARCH_IOP33X is not set
+# CONFIG_ARCH_IXP23XX is not set
+# CONFIG_ARCH_IXP2000 is not set
+# CONFIG_ARCH_IXP4XX is not set
+# CONFIG_ARCH_L7200 is not set
+# CONFIG_ARCH_DOVE is not set
+# CONFIG_ARCH_KIRKWOOD is not set
+# CONFIG_ARCH_LOKI is not set
+# CONFIG_ARCH_MV78XX0 is not set
+# CONFIG_ARCH_ORION5X is not set
+# CONFIG_ARCH_MMP is not set
+# CONFIG_ARCH_KS8695 is not set
+# CONFIG_ARCH_NS9XXX is not set
+# CONFIG_ARCH_W90X900 is not set
+# CONFIG_ARCH_PNX4008 is not set
+# CONFIG_ARCH_PXA is not set
+# CONFIG_ARCH_MSM is not set
+CONFIG_ARCH_SHMOBILE=y
+# CONFIG_ARCH_RPC is not set
+# CONFIG_ARCH_SA1100 is not set
+# CONFIG_ARCH_S3C2410 is not set
+# CONFIG_ARCH_S3C64XX is not set
+# CONFIG_ARCH_S5PC1XX is not set
+# CONFIG_ARCH_SHARK is not set
+# CONFIG_ARCH_LH7A40X is not set
+# CONFIG_ARCH_U300 is not set
+# CONFIG_ARCH_DAVINCI is not set
+# CONFIG_ARCH_OMAP is not set
+# CONFIG_ARCH_BCMRING is not set
+# CONFIG_ARCH_U8500 is not set
+
+#
+# SH-Mobile System Type
+#
+CONFIG_ARCH_SH7367=y
+# CONFIG_ARCH_SH7377 is not set
+# CONFIG_ARCH_SH7372 is not set
+
+#
+# SH-Mobile Board Type
+#
+CONFIG_MACH_G3EVM=y
+
+#
+# SH-Mobile System Configuration
+#
+
+#
+# Memory configuration
+#
+CONFIG_MEMORY_START=0x50000000
+CONFIG_MEMORY_SIZE=0x08000000
+
+#
+# Timer and clock configuration
+#
+CONFIG_SH_TIMER_CMT=y
+
+#
+# Processor Type
+#
+CONFIG_CPU_V6=y
+# CONFIG_CPU_32v6K is not set
+CONFIG_CPU_32v6=y
+CONFIG_CPU_ABRT_EV6=y
+CONFIG_CPU_PABRT_V6=y
+CONFIG_CPU_CACHE_V6=y
+CONFIG_CPU_CACHE_VIPT=y
+CONFIG_CPU_COPY_V6=y
+CONFIG_CPU_TLB_V6=y
+CONFIG_CPU_HAS_ASID=y
+CONFIG_CPU_CP15=y
+CONFIG_CPU_CP15_MMU=y
+
+#
+# Processor Features
+#
+CONFIG_ARM_THUMB=y
+# CONFIG_CPU_ICACHE_DISABLE is not set
+# CONFIG_CPU_DCACHE_DISABLE is not set
+# CONFIG_CPU_BPREDICT_DISABLE is not set
+CONFIG_ARM_L1_CACHE_SHIFT=5
+# CONFIG_ARM_ERRATA_411920 is not set
+CONFIG_COMMON_CLKDEV=y
+
+#
+# Bus support
+#
+# CONFIG_PCI_SYSCALL is not set
+# CONFIG_ARCH_SUPPORTS_MSI is not set
+# CONFIG_PCCARD is not set
+
+#
+# Kernel Features
+#
+# CONFIG_NO_HZ is not set
+# CONFIG_HIGH_RES_TIMERS is not set
+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
+CONFIG_VMSPLIT_3G=y
+# CONFIG_VMSPLIT_2G is not set
+# CONFIG_VMSPLIT_1G is not set
+CONFIG_PAGE_OFFSET=0xC0000000
+CONFIG_PREEMPT_NONE=y
+# CONFIG_PREEMPT_VOLUNTARY is not set
+# CONFIG_PREEMPT is not set
+CONFIG_HZ=100
+CONFIG_AEABI=y
+# CONFIG_OABI_COMPAT is not set
+# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
+# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
+# CONFIG_HIGHMEM is not set
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_FLATMEM_MANUAL=y
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+# CONFIG_SPARSEMEM_MANUAL is not set
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+CONFIG_PAGEFLAGS_EXTENDED=y
+CONFIG_SPLIT_PTLOCK_CPUS=4
+# CONFIG_PHYS_ADDR_T_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=0
+CONFIG_VIRT_TO_BUS=y
+# CONFIG_KSM is not set
+CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
+CONFIG_ALIGNMENT_TRAP=y
+# CONFIG_UACCESS_WITH_MEMCPY is not set
+
+#
+# Boot options
+#
+CONFIG_ZBOOT_ROM_TEXT=0x0
+CONFIG_ZBOOT_ROM_BSS=0x0
+CONFIG_CMDLINE="console=ttySC1,115200 earlyprintk=sh-sci.1,115200"
+# CONFIG_XIP_KERNEL is not set
+CONFIG_KEXEC=y
+CONFIG_ATAGS_PROC=y
+
+#
+# CPU Power Management
+#
+# CONFIG_CPU_IDLE is not set
+
+#
+# Floating point emulation
+#
+
+#
+# At least one emulation must be selected
+#
+# CONFIG_VFP is not set
+
+#
+# Userspace binary formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+CONFIG_HAVE_AOUT=y
+# CONFIG_BINFMT_AOUT is not set
+# CONFIG_BINFMT_MISC is not set
+
+#
+# Power management options
+#
+CONFIG_PM=y
+# CONFIG_PM_DEBUG is not set
+# CONFIG_SUSPEND is not set
+# CONFIG_APM_EMULATION is not set
+# CONFIG_PM_RUNTIME is not set
+CONFIG_ARCH_SUSPEND_POSSIBLE=y
+# CONFIG_NET is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+# CONFIG_DEVTMPFS is not set
+CONFIG_STANDALONE=y
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+CONFIG_FW_LOADER=y
+# CONFIG_FIRMWARE_IN_KERNEL is not set
+CONFIG_EXTRA_FIRMWARE=""
+# CONFIG_DEBUG_DRIVER is not set
+# CONFIG_DEBUG_DEVRES is not set
+# CONFIG_SYS_HYPERVISOR is not set
+CONFIG_MTD=y
+# CONFIG_MTD_DEBUG is not set
+CONFIG_MTD_CONCAT=y
+CONFIG_MTD_PARTITIONS=y
+# CONFIG_MTD_REDBOOT_PARTS is not set
+# CONFIG_MTD_CMDLINE_PARTS is not set
+# CONFIG_MTD_AFS_PARTS is not set
+# CONFIG_MTD_AR7_PARTS is not set
+
+#
+# User Modules And Translation Layers
+#
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLKDEVS=y
+CONFIG_MTD_BLOCK=y
+# CONFIG_FTL is not set
+# CONFIG_NFTL is not set
+# CONFIG_INFTL is not set
+# CONFIG_RFD_FTL is not set
+# CONFIG_SSFDC is not set
+# CONFIG_MTD_OOPS is not set
+
+#
+# RAM/ROM/Flash chip drivers
+#
+CONFIG_MTD_CFI=y
+# CONFIG_MTD_JEDECPROBE is not set
+CONFIG_MTD_GEN_PROBE=y
+# CONFIG_MTD_CFI_ADV_OPTIONS is not set
+CONFIG_MTD_MAP_BANK_WIDTH_1=y
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
+CONFIG_MTD_MAP_BANK_WIDTH_4=y
+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
+CONFIG_MTD_CFI_I1=y
+CONFIG_MTD_CFI_I2=y
+# CONFIG_MTD_CFI_I4 is not set
+# CONFIG_MTD_CFI_I8 is not set
+CONFIG_MTD_CFI_INTELEXT=y
+# CONFIG_MTD_CFI_AMDSTD is not set
+# CONFIG_MTD_CFI_STAA is not set
+CONFIG_MTD_CFI_UTIL=y
+# CONFIG_MTD_RAM is not set
+# CONFIG_MTD_ROM is not set
+# CONFIG_MTD_ABSENT is not set
+
+#
+# Mapping drivers for chip access
+#
+# CONFIG_MTD_COMPLEX_MAPPINGS is not set
+CONFIG_MTD_PHYSMAP=y
+# CONFIG_MTD_PHYSMAP_COMPAT is not set
+# CONFIG_MTD_ARM_INTEGRATOR is not set
+# CONFIG_MTD_PLATRAM is not set
+
+#
+# Self-contained MTD device drivers
+#
+# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_PHRAM is not set
+# CONFIG_MTD_MTDRAM is not set
+# CONFIG_MTD_BLOCK2MTD is not set
+
+#
+# Disk-On-Chip Device Drivers
+#
+# CONFIG_MTD_DOC2000 is not set
+# CONFIG_MTD_DOC2001 is not set
+# CONFIG_MTD_DOC2001PLUS is not set
+CONFIG_MTD_NAND=y
+# CONFIG_MTD_NAND_VERIFY_WRITE is not set
+# CONFIG_MTD_NAND_ECC_SMC is not set
+# CONFIG_MTD_NAND_MUSEUM_IDS is not set
+CONFIG_MTD_NAND_IDS=y
+# CONFIG_MTD_NAND_DISKONCHIP is not set
+# CONFIG_MTD_NAND_NANDSIM is not set
+# CONFIG_MTD_NAND_PLATFORM is not set
+# CONFIG_MTD_ONENAND is not set
+
+#
+# LPDDR flash memory drivers
+#
+# CONFIG_MTD_LPDDR is not set
+
+#
+# UBI - Unsorted block images
+#
+# CONFIG_MTD_UBI is not set
+# CONFIG_PARPORT is not set
+# CONFIG_BLK_DEV is not set
+# CONFIG_MISC_DEVICES is not set
+CONFIG_HAVE_IDE=y
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+# CONFIG_RAID_ATTRS is not set
+# CONFIG_SCSI is not set
+# CONFIG_SCSI_DMA is not set
+# CONFIG_SCSI_NETLINK is not set
+# CONFIG_ATA is not set
+# CONFIG_MD is not set
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+# CONFIG_INPUT_FF_MEMLESS is not set
+# CONFIG_INPUT_POLLDEV is not set
+# CONFIG_INPUT_SPARSEKMAP is not set
+
+#
+# Userland interfaces
+#
+CONFIG_INPUT_MOUSEDEV=y
+# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_EVDEV is not set
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input Device Drivers
+#
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TABLET is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Hardware I/O ports
+#
+# CONFIG_SERIO is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_CONSOLE_TRANSLATIONS=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+# CONFIG_VT_HW_CONSOLE_BINDING is not set
+CONFIG_DEVKMEM=y
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+# CONFIG_SERIAL_8250 is not set
+
+#
+# Non-8250 serial port support
+#
+CONFIG_SERIAL_SH_SCI=y
+CONFIG_SERIAL_SH_SCI_NR_UARTS=8
+CONFIG_SERIAL_SH_SCI_CONSOLE=y
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+CONFIG_UNIX98_PTYS=y
+# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
+# CONFIG_LEGACY_PTYS is not set
+# CONFIG_IPMI_HANDLER is not set
+# CONFIG_HW_RANDOM is not set
+# CONFIG_R3964 is not set
+# CONFIG_RAW_DRIVER is not set
+# CONFIG_TCG_TPM is not set
+# CONFIG_I2C is not set
+# CONFIG_SPI is not set
+
+#
+# PPS support
+#
+# CONFIG_PPS is not set
+# CONFIG_W1 is not set
+# CONFIG_POWER_SUPPLY is not set
+# CONFIG_HWMON is not set
+# CONFIG_THERMAL is not set
+# CONFIG_WATCHDOG is not set
+CONFIG_SSB_POSSIBLE=y
+
+#
+# Sonics Silicon Backplane
+#
+# CONFIG_SSB is not set
+
+#
+# Multifunction device drivers
+#
+# CONFIG_MFD_CORE is not set
+# CONFIG_MFD_SM501 is not set
+# CONFIG_HTC_PASIC3 is not set
+# CONFIG_MFD_TMIO is not set
+# CONFIG_MFD_T7L66XB is not set
+# CONFIG_MFD_TC6387XB is not set
+# CONFIG_REGULATOR is not set
+# CONFIG_MEDIA_SUPPORT is not set
+
+#
+# Graphics support
+#
+# CONFIG_VGASTATE is not set
+# CONFIG_VIDEO_OUTPUT_CONTROL is not set
+# CONFIG_FB is not set
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+
+#
+# Display device support
+#
+# CONFIG_DISPLAY_SUPPORT is not set
+
+#
+# Console display driver support
+#
+# CONFIG_VGA_CONSOLE is not set
+CONFIG_DUMMY_CONSOLE=y
+# CONFIG_SOUND is not set
+# CONFIG_HID_SUPPORT is not set
+# CONFIG_USB_SUPPORT is not set
+# CONFIG_MMC is not set
+# CONFIG_MEMSTICK is not set
+# CONFIG_NEW_LEDS is not set
+# CONFIG_ACCESSIBILITY is not set
+CONFIG_RTC_LIB=y
+# CONFIG_RTC_CLASS is not set
+# CONFIG_DMADEVICES is not set
+# CONFIG_AUXDISPLAY is not set
+# CONFIG_UIO is not set
+
+#
+# TI VLYNQ
+#
+# CONFIG_STAGING is not set
+
+#
+# File systems
+#
+# CONFIG_EXT2_FS is not set
+# CONFIG_EXT3_FS is not set
+# CONFIG_EXT4_FS is not set
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_FS_POSIX_ACL is not set
+# CONFIG_XFS_FS is not set
+# CONFIG_GFS2_FS is not set
+# CONFIG_BTRFS_FS is not set
+# CONFIG_NILFS2_FS is not set
+CONFIG_FILE_LOCKING=y
+# CONFIG_FSNOTIFY is not set
+# CONFIG_DNOTIFY is not set
+# CONFIG_INOTIFY is not set
+# CONFIG_INOTIFY_USER is not set
+# CONFIG_QUOTA is not set
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+# CONFIG_FUSE_FS is not set
+
+#
+# Caches
+#
+# CONFIG_FSCACHE is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+# CONFIG_MSDOS_FS is not set
+# CONFIG_VFAT_FS is not set
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_SYSCTL=y
+CONFIG_PROC_PAGE_MONITOR=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+# CONFIG_TMPFS_POSIX_ACL is not set
+# CONFIG_HUGETLB_PAGE is not set
+# CONFIG_CONFIGFS_FS is not set
+# CONFIG_MISC_FILESYSTEMS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+# CONFIG_NLS is not set
+
+#
+# Kernel hacking
+#
+# CONFIG_PRINTK_TIME is not set
+CONFIG_ENABLE_WARN_DEPRECATED=y
+CONFIG_ENABLE_MUST_CHECK=y
+CONFIG_FRAME_WARN=1024
+CONFIG_MAGIC_SYSRQ=y
+# CONFIG_STRIP_ASM_SYMS is not set
+# CONFIG_UNUSED_SYMBOLS is not set
+# CONFIG_DEBUG_FS is not set
+# CONFIG_HEADERS_CHECK is not set
+CONFIG_DEBUG_KERNEL=y
+# CONFIG_DEBUG_SHIRQ is not set
+# CONFIG_DETECT_SOFTLOCKUP is not set
+# CONFIG_DETECT_HUNG_TASK is not set
+CONFIG_SCHED_DEBUG=y
+# CONFIG_SCHEDSTATS is not set
+# CONFIG_TIMER_STATS is not set
+# CONFIG_DEBUG_OBJECTS is not set
+# CONFIG_DEBUG_SLAB is not set
+# CONFIG_DEBUG_KMEMLEAK is not set
+# CONFIG_DEBUG_RT_MUTEXES is not set
+# CONFIG_RT_MUTEX_TESTER is not set
+# CONFIG_DEBUG_SPINLOCK is not set
+# CONFIG_DEBUG_MUTEXES is not set
+# CONFIG_DEBUG_LOCK_ALLOC is not set
+# CONFIG_PROVE_LOCKING is not set
+# CONFIG_LOCK_STAT is not set
+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
+# CONFIG_DEBUG_KOBJECT is not set
+CONFIG_DEBUG_BUGVERBOSE=y
+# CONFIG_DEBUG_INFO is not set
+# CONFIG_DEBUG_VM is not set
+# CONFIG_DEBUG_WRITECOUNT is not set
+CONFIG_DEBUG_MEMORY_INIT=y
+# CONFIG_DEBUG_LIST is not set
+# CONFIG_DEBUG_SG is not set
+# CONFIG_DEBUG_NOTIFIERS is not set
+# CONFIG_DEBUG_CREDENTIALS is not set
+# CONFIG_BOOT_PRINTK_DELAY is not set
+# CONFIG_RCU_TORTURE_TEST is not set
+# CONFIG_RCU_CPU_STALL_DETECTOR is not set
+# CONFIG_BACKTRACE_SELF_TEST is not set
+# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
+# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
+# CONFIG_FAULT_INJECTION is not set
+# CONFIG_LATENCYTOP is not set
+# CONFIG_SYSCTL_SYSCALL_CHECK is not set
+# CONFIG_PAGE_POISONING is not set
+CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_TRACING_SUPPORT=y
+# CONFIG_FTRACE is not set
+# CONFIG_SAMPLES is not set
+CONFIG_HAVE_ARCH_KGDB=y
+# CONFIG_KGDB is not set
+CONFIG_ARM_UNWIND=y
+# CONFIG_DEBUG_USER is not set
+# CONFIG_DEBUG_ERRORS is not set
+# CONFIG_DEBUG_STACK_USAGE is not set
+# CONFIG_DEBUG_LL is not set
+# CONFIG_OC_ETM is not set
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY is not set
+# CONFIG_SECURITYFS is not set
+# CONFIG_DEFAULT_SECURITY_SELINUX is not set
+# CONFIG_DEFAULT_SECURITY_SMACK is not set
+# CONFIG_DEFAULT_SECURITY_TOMOYO is not set
+CONFIG_DEFAULT_SECURITY_DAC=y
+CONFIG_DEFAULT_SECURITY=""
+# CONFIG_CRYPTO is not set
+# CONFIG_BINARY_PRINTF is not set
+
+#
+# Library routines
+#
+CONFIG_GENERIC_FIND_LAST_BIT=y
+# CONFIG_CRC_CCITT is not set
+# CONFIG_CRC16 is not set
+# CONFIG_CRC_T10DIF is not set
+# CONFIG_CRC_ITU_T is not set
+# CONFIG_CRC32 is not set
+# CONFIG_CRC7 is not set
+# CONFIG_LIBCRC32C is not set
+CONFIG_ZLIB_INFLATE=y
+CONFIG_LZO_DECOMPRESS=y
+CONFIG_DECOMPRESS_GZIP=y
+CONFIG_DECOMPRESS_BZIP2=y
+CONFIG_DECOMPRESS_LZMA=y
+CONFIG_DECOMPRESS_LZO=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAS_DMA=y
diff --git a/arch/arm/configs/g4evm_defconfig b/arch/arm/configs/g4evm_defconfig
new file mode 100644
index 000000000000..8ee79a537134
--- /dev/null
+++ b/arch/arm/configs/g4evm_defconfig
@@ -0,0 +1,779 @@
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.33-rc7
+# Mon Feb  8 12:21:35 2010
+#
+CONFIG_ARM=y
+CONFIG_SYS_SUPPORTS_APM_EMULATION=y
+CONFIG_GENERIC_TIME=y
+CONFIG_GENERIC_CLOCKEVENTS=y
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_HAVE_LATENCYTOP_SUPPORT=y
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+CONFIG_HARDIRQS_SW_RESEND=y
+CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
+CONFIG_VECTORS_BASE=0xffff0000
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+CONFIG_CONSTRUCTORS=y
+
+#
+# General setup
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+CONFIG_LOCALVERSION=""
+CONFIG_LOCALVERSION_AUTO=y
+CONFIG_HAVE_KERNEL_GZIP=y
+CONFIG_HAVE_KERNEL_LZO=y
+CONFIG_KERNEL_GZIP=y
+# CONFIG_KERNEL_BZIP2 is not set
+# CONFIG_KERNEL_LZMA is not set
+# CONFIG_KERNEL_LZO is not set
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+CONFIG_SYSVIPC_SYSCTL=y
+# CONFIG_BSD_PROCESS_ACCT is not set
+
+#
+# RCU Subsystem
+#
+CONFIG_TREE_RCU=y
+# CONFIG_TREE_PREEMPT_RCU is not set
+# CONFIG_TINY_RCU is not set
+# CONFIG_RCU_TRACE is not set
+CONFIG_RCU_FANOUT=32
+# CONFIG_RCU_FANOUT_EXACT is not set
+# CONFIG_TREE_RCU_TRACE is not set
+CONFIG_IKCONFIG=y
+CONFIG_IKCONFIG_PROC=y
+CONFIG_LOG_BUF_SHIFT=16
+CONFIG_GROUP_SCHED=y
+CONFIG_FAIR_GROUP_SCHED=y
+# CONFIG_RT_GROUP_SCHED is not set
+CONFIG_USER_SCHED=y
+# CONFIG_CGROUP_SCHED is not set
+# CONFIG_CGROUPS is not set
+# CONFIG_SYSFS_DEPRECATED_V2 is not set
+# CONFIG_RELAY is not set
+CONFIG_NAMESPACES=y
+# CONFIG_UTS_NS is not set
+# CONFIG_IPC_NS is not set
+# CONFIG_USER_NS is not set
+# CONFIG_PID_NS is not set
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_INITRAMFS_SOURCE=""
+CONFIG_RD_GZIP=y
+CONFIG_RD_BZIP2=y
+CONFIG_RD_LZMA=y
+CONFIG_RD_LZO=y
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_SYSCTL=y
+CONFIG_ANON_INODES=y
+# CONFIG_EMBEDDED is not set
+CONFIG_UID16=y
+CONFIG_SYSCTL_SYSCALL=y
+CONFIG_KALLSYMS=y
+# CONFIG_KALLSYMS_ALL is not set
+# CONFIG_KALLSYMS_EXTRA_PASS is not set
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_ELF_CORE=y
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+CONFIG_EPOLL=y
+CONFIG_SIGNALFD=y
+CONFIG_TIMERFD=y
+CONFIG_EVENTFD=y
+CONFIG_SHMEM=y
+CONFIG_AIO=y
+
+#
+# Kernel Performance Events And Counters
+#
+CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_COMPAT_BRK=y
+CONFIG_SLAB=y
+# CONFIG_SLUB is not set
+# CONFIG_SLOB is not set
+# CONFIG_PROFILING is not set
+CONFIG_HAVE_OPROFILE=y
+CONFIG_HAVE_KPROBES=y
+CONFIG_HAVE_KRETPROBES=y
+CONFIG_HAVE_CLK=y
+
+#
+# GCOV-based kernel profiling
+#
+# CONFIG_SLOW_WORK is not set
+CONFIG_HAVE_GENERIC_DMA_COHERENT=y
+CONFIG_SLABINFO=y
+CONFIG_RT_MUTEXES=y
+CONFIG_BASE_SMALL=0
+# CONFIG_MODULES is not set
+CONFIG_BLOCK=y
+CONFIG_LBDAF=y
+# CONFIG_BLK_DEV_BSG is not set
+# CONFIG_BLK_DEV_INTEGRITY is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+# CONFIG_IOSCHED_DEADLINE is not set
+# CONFIG_IOSCHED_CFQ is not set
+# CONFIG_DEFAULT_DEADLINE is not set
+# CONFIG_DEFAULT_CFQ is not set
+CONFIG_DEFAULT_NOOP=y
+CONFIG_DEFAULT_IOSCHED="noop"
+# CONFIG_INLINE_SPIN_TRYLOCK is not set
+# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set
+# CONFIG_INLINE_SPIN_LOCK is not set
+# CONFIG_INLINE_SPIN_LOCK_BH is not set
+# CONFIG_INLINE_SPIN_LOCK_IRQ is not set
+# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set
+CONFIG_INLINE_SPIN_UNLOCK=y
+# CONFIG_INLINE_SPIN_UNLOCK_BH is not set
+CONFIG_INLINE_SPIN_UNLOCK_IRQ=y
+# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set
+# CONFIG_INLINE_READ_TRYLOCK is not set
+# CONFIG_INLINE_READ_LOCK is not set
+# CONFIG_INLINE_READ_LOCK_BH is not set
+# CONFIG_INLINE_READ_LOCK_IRQ is not set
+# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set
+CONFIG_INLINE_READ_UNLOCK=y
+# CONFIG_INLINE_READ_UNLOCK_BH is not set
+CONFIG_INLINE_READ_UNLOCK_IRQ=y
+# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set
+# CONFIG_INLINE_WRITE_TRYLOCK is not set
+# CONFIG_INLINE_WRITE_LOCK is not set
+# CONFIG_INLINE_WRITE_LOCK_BH is not set
+# CONFIG_INLINE_WRITE_LOCK_IRQ is not set
+# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set
+CONFIG_INLINE_WRITE_UNLOCK=y
+# CONFIG_INLINE_WRITE_UNLOCK_BH is not set
+CONFIG_INLINE_WRITE_UNLOCK_IRQ=y
+# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set
+# CONFIG_MUTEX_SPIN_ON_OWNER is not set
+# CONFIG_FREEZER is not set
+
+#
+# System Type
+#
+CONFIG_MMU=y
+# CONFIG_ARCH_AAEC2000 is not set
+# CONFIG_ARCH_INTEGRATOR is not set
+# CONFIG_ARCH_REALVIEW is not set
+# CONFIG_ARCH_VERSATILE is not set
+# CONFIG_ARCH_AT91 is not set
+# CONFIG_ARCH_CLPS711X is not set
+# CONFIG_ARCH_GEMINI is not set
+# CONFIG_ARCH_EBSA110 is not set
+# CONFIG_ARCH_EP93XX is not set
+# CONFIG_ARCH_FOOTBRIDGE is not set
+# CONFIG_ARCH_MXC is not set
+# CONFIG_ARCH_STMP3XXX is not set
+# CONFIG_ARCH_NETX is not set
+# CONFIG_ARCH_H720X is not set
+# CONFIG_ARCH_NOMADIK is not set
+# CONFIG_ARCH_IOP13XX is not set
+# CONFIG_ARCH_IOP32X is not set
+# CONFIG_ARCH_IOP33X is not set
+# CONFIG_ARCH_IXP23XX is not set
+# CONFIG_ARCH_IXP2000 is not set
+# CONFIG_ARCH_IXP4XX is not set
+# CONFIG_ARCH_L7200 is not set
+# CONFIG_ARCH_DOVE is not set
+# CONFIG_ARCH_KIRKWOOD is not set
+# CONFIG_ARCH_LOKI is not set
+# CONFIG_ARCH_MV78XX0 is not set
+# CONFIG_ARCH_ORION5X is not set
+# CONFIG_ARCH_MMP is not set
+# CONFIG_ARCH_KS8695 is not set
+# CONFIG_ARCH_NS9XXX is not set
+# CONFIG_ARCH_W90X900 is not set
+# CONFIG_ARCH_PNX4008 is not set
+# CONFIG_ARCH_PXA is not set
+# CONFIG_ARCH_MSM is not set
+CONFIG_ARCH_SHMOBILE=y
+# CONFIG_ARCH_RPC is not set
+# CONFIG_ARCH_SA1100 is not set
+# CONFIG_ARCH_S3C2410 is not set
+# CONFIG_ARCH_S3C64XX is not set
+# CONFIG_ARCH_S5PC1XX is not set
+# CONFIG_ARCH_SHARK is not set
+# CONFIG_ARCH_LH7A40X is not set
+# CONFIG_ARCH_U300 is not set
+# CONFIG_ARCH_DAVINCI is not set
+# CONFIG_ARCH_OMAP is not set
+# CONFIG_ARCH_BCMRING is not set
+# CONFIG_ARCH_U8500 is not set
+
+#
+# SH-Mobile System Type
+#
+# CONFIG_ARCH_SH7367 is not set
+CONFIG_ARCH_SH7377=y
+# CONFIG_ARCH_SH7372 is not set
+
+#
+# SH-Mobile Board Type
+#
+CONFIG_MACH_G4EVM=y
+
+#
+# SH-Mobile System Configuration
+#
+
+#
+# Memory configuration
+#
+CONFIG_MEMORY_START=0x40000000
+CONFIG_MEMORY_SIZE=0x08000000
+
+#
+# Timer and clock configuration
+#
+CONFIG_SH_TIMER_CMT=y
+
+#
+# Processor Type
+#
+CONFIG_CPU_32v6K=y
+CONFIG_CPU_V7=y
+CONFIG_CPU_32v7=y
+CONFIG_CPU_ABRT_EV7=y
+CONFIG_CPU_PABRT_V7=y
+CONFIG_CPU_CACHE_V7=y
+CONFIG_CPU_CACHE_VIPT=y
+CONFIG_CPU_COPY_V6=y
+CONFIG_CPU_TLB_V7=y
+CONFIG_CPU_HAS_ASID=y
+CONFIG_CPU_CP15=y
+CONFIG_CPU_CP15_MMU=y
+
+#
+# Processor Features
+#
+CONFIG_ARM_THUMB=y
+# CONFIG_ARM_THUMBEE is not set
+# CONFIG_CPU_ICACHE_DISABLE is not set
+# CONFIG_CPU_DCACHE_DISABLE is not set
+# CONFIG_CPU_BPREDICT_DISABLE is not set
+CONFIG_HAS_TLS_REG=y
+CONFIG_ARM_L1_CACHE_SHIFT=5
+# CONFIG_ARM_ERRATA_430973 is not set
+# CONFIG_ARM_ERRATA_458693 is not set
+# CONFIG_ARM_ERRATA_460075 is not set
+CONFIG_COMMON_CLKDEV=y
+
+#
+# Bus support
+#
+# CONFIG_PCI_SYSCALL is not set
+# CONFIG_ARCH_SUPPORTS_MSI is not set
+# CONFIG_PCCARD is not set
+
+#
+# Kernel Features
+#
+# CONFIG_NO_HZ is not set
+# CONFIG_HIGH_RES_TIMERS is not set
+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
+CONFIG_VMSPLIT_3G=y
+# CONFIG_VMSPLIT_2G is not set
+# CONFIG_VMSPLIT_1G is not set
+CONFIG_PAGE_OFFSET=0xC0000000
+CONFIG_PREEMPT_NONE=y
+# CONFIG_PREEMPT_VOLUNTARY is not set
+# CONFIG_PREEMPT is not set
+CONFIG_HZ=100
+# CONFIG_THUMB2_KERNEL is not set
+CONFIG_AEABI=y
+# CONFIG_OABI_COMPAT is not set
+# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
+# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
+# CONFIG_HIGHMEM is not set
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_FLATMEM_MANUAL=y
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+# CONFIG_SPARSEMEM_MANUAL is not set
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+CONFIG_PAGEFLAGS_EXTENDED=y
+CONFIG_SPLIT_PTLOCK_CPUS=4
+# CONFIG_PHYS_ADDR_T_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=0
+CONFIG_VIRT_TO_BUS=y
+# CONFIG_KSM is not set
+CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
+CONFIG_ALIGNMENT_TRAP=y
+# CONFIG_UACCESS_WITH_MEMCPY is not set
+
+#
+# Boot options
+#
+CONFIG_ZBOOT_ROM_TEXT=0x0
+CONFIG_ZBOOT_ROM_BSS=0x0
+CONFIG_CMDLINE="console=ttySC4,115200 earlyprintk=sh-sci.4,115200"
+# CONFIG_XIP_KERNEL is not set
+CONFIG_KEXEC=y
+CONFIG_ATAGS_PROC=y
+
+#
+# CPU Power Management
+#
+# CONFIG_CPU_IDLE is not set
+
+#
+# Floating point emulation
+#
+
+#
+# At least one emulation must be selected
+#
+# CONFIG_VFP is not set
+
+#
+# Userspace binary formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+CONFIG_HAVE_AOUT=y
+# CONFIG_BINFMT_AOUT is not set
+# CONFIG_BINFMT_MISC is not set
+
+#
+# Power management options
+#
+CONFIG_PM=y
+# CONFIG_PM_DEBUG is not set
+# CONFIG_SUSPEND is not set
+# CONFIG_APM_EMULATION is not set
+# CONFIG_PM_RUNTIME is not set
+CONFIG_ARCH_SUSPEND_POSSIBLE=y
+# CONFIG_NET is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+# CONFIG_DEVTMPFS is not set
+CONFIG_STANDALONE=y
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+CONFIG_FW_LOADER=y
+# CONFIG_FIRMWARE_IN_KERNEL is not set
+CONFIG_EXTRA_FIRMWARE=""
+# CONFIG_DEBUG_DRIVER is not set
+# CONFIG_DEBUG_DEVRES is not set
+# CONFIG_SYS_HYPERVISOR is not set
+CONFIG_MTD=y
+# CONFIG_MTD_DEBUG is not set
+CONFIG_MTD_CONCAT=y
+CONFIG_MTD_PARTITIONS=y
+# CONFIG_MTD_REDBOOT_PARTS is not set
+# CONFIG_MTD_CMDLINE_PARTS is not set
+# CONFIG_MTD_AFS_PARTS is not set
+# CONFIG_MTD_AR7_PARTS is not set
+
+#
+# User Modules And Translation Layers
+#
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLKDEVS=y
+CONFIG_MTD_BLOCK=y
+# CONFIG_FTL is not set
+# CONFIG_NFTL is not set
+# CONFIG_INFTL is not set
+# CONFIG_RFD_FTL is not set
+# CONFIG_SSFDC is not set
+# CONFIG_MTD_OOPS is not set
+
+#
+# RAM/ROM/Flash chip drivers
+#
+CONFIG_MTD_CFI=y
+# CONFIG_MTD_JEDECPROBE is not set
+CONFIG_MTD_GEN_PROBE=y
+# CONFIG_MTD_CFI_ADV_OPTIONS is not set
+CONFIG_MTD_MAP_BANK_WIDTH_1=y
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
+CONFIG_MTD_MAP_BANK_WIDTH_4=y
+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
+CONFIG_MTD_CFI_I1=y
+CONFIG_MTD_CFI_I2=y
+# CONFIG_MTD_CFI_I4 is not set
+# CONFIG_MTD_CFI_I8 is not set
+CONFIG_MTD_CFI_INTELEXT=y
+# CONFIG_MTD_CFI_AMDSTD is not set
+# CONFIG_MTD_CFI_STAA is not set
+CONFIG_MTD_CFI_UTIL=y
+# CONFIG_MTD_RAM is not set
+# CONFIG_MTD_ROM is not set
+# CONFIG_MTD_ABSENT is not set
+
+#
+# Mapping drivers for chip access
+#
+# CONFIG_MTD_COMPLEX_MAPPINGS is not set
+CONFIG_MTD_PHYSMAP=y
+# CONFIG_MTD_PHYSMAP_COMPAT is not set
+# CONFIG_MTD_ARM_INTEGRATOR is not set
+# CONFIG_MTD_PLATRAM is not set
+
+#
+# Self-contained MTD device drivers
+#
+# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_PHRAM is not set
+# CONFIG_MTD_MTDRAM is not set
+# CONFIG_MTD_BLOCK2MTD is not set
+
+#
+# Disk-On-Chip Device Drivers
+#
+# CONFIG_MTD_DOC2000 is not set
+# CONFIG_MTD_DOC2001 is not set
+# CONFIG_MTD_DOC2001PLUS is not set
+CONFIG_MTD_NAND=y
+# CONFIG_MTD_NAND_VERIFY_WRITE is not set
+# CONFIG_MTD_NAND_ECC_SMC is not set
+# CONFIG_MTD_NAND_MUSEUM_IDS is not set
+CONFIG_MTD_NAND_IDS=y
+# CONFIG_MTD_NAND_DISKONCHIP is not set
+# CONFIG_MTD_NAND_NANDSIM is not set
+# CONFIG_MTD_NAND_PLATFORM is not set
+# CONFIG_MTD_ONENAND is not set
+
+#
+# LPDDR flash memory drivers
+#
+# CONFIG_MTD_LPDDR is not set
+
+#
+# UBI - Unsorted block images
+#
+# CONFIG_MTD_UBI is not set
+# CONFIG_PARPORT is not set
+# CONFIG_BLK_DEV is not set
+# CONFIG_MISC_DEVICES is not set
+CONFIG_HAVE_IDE=y
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+# CONFIG_RAID_ATTRS is not set
+# CONFIG_SCSI is not set
+# CONFIG_SCSI_DMA is not set
+# CONFIG_SCSI_NETLINK is not set
+# CONFIG_ATA is not set
+# CONFIG_MD is not set
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+# CONFIG_INPUT_FF_MEMLESS is not set
+# CONFIG_INPUT_POLLDEV is not set
+# CONFIG_INPUT_SPARSEKMAP is not set
+
+#
+# Userland interfaces
+#
+CONFIG_INPUT_MOUSEDEV=y
+# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_EVDEV is not set
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input Device Drivers
+#
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TABLET is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Hardware I/O ports
+#
+# CONFIG_SERIO is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_CONSOLE_TRANSLATIONS=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+# CONFIG_VT_HW_CONSOLE_BINDING is not set
+CONFIG_DEVKMEM=y
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+# CONFIG_SERIAL_8250 is not set
+
+#
+# Non-8250 serial port support
+#
+CONFIG_SERIAL_SH_SCI=y
+CONFIG_SERIAL_SH_SCI_NR_UARTS=8
+CONFIG_SERIAL_SH_SCI_CONSOLE=y
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+CONFIG_UNIX98_PTYS=y
+# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
+# CONFIG_LEGACY_PTYS is not set
+# CONFIG_IPMI_HANDLER is not set
+# CONFIG_HW_RANDOM is not set
+# CONFIG_R3964 is not set
+# CONFIG_RAW_DRIVER is not set
+# CONFIG_TCG_TPM is not set
+# CONFIG_I2C is not set
+# CONFIG_SPI is not set
+
+#
+# PPS support
+#
+# CONFIG_PPS is not set
+# CONFIG_W1 is not set
+# CONFIG_POWER_SUPPLY is not set
+# CONFIG_HWMON is not set
+# CONFIG_THERMAL is not set
+# CONFIG_WATCHDOG is not set
+CONFIG_SSB_POSSIBLE=y
+
+#
+# Sonics Silicon Backplane
+#
+# CONFIG_SSB is not set
+
+#
+# Multifunction device drivers
+#
+# CONFIG_MFD_CORE is not set
+# CONFIG_MFD_SM501 is not set
+# CONFIG_HTC_PASIC3 is not set
+# CONFIG_MFD_TMIO is not set
+# CONFIG_MFD_T7L66XB is not set
+# CONFIG_MFD_TC6387XB is not set
+# CONFIG_REGULATOR is not set
+# CONFIG_MEDIA_SUPPORT is not set
+
+#
+# Graphics support
+#
+# CONFIG_VGASTATE is not set
+# CONFIG_VIDEO_OUTPUT_CONTROL is not set
+# CONFIG_FB is not set
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+
+#
+# Display device support
+#
+# CONFIG_DISPLAY_SUPPORT is not set
+
+#
+# Console display driver support
+#
+# CONFIG_VGA_CONSOLE is not set
+CONFIG_DUMMY_CONSOLE=y
+# CONFIG_SOUND is not set
+# CONFIG_HID_SUPPORT is not set
+# CONFIG_USB_SUPPORT is not set
+# CONFIG_MMC is not set
+# CONFIG_MEMSTICK is not set
+# CONFIG_NEW_LEDS is not set
+# CONFIG_ACCESSIBILITY is not set
+CONFIG_RTC_LIB=y
+# CONFIG_RTC_CLASS is not set
+# CONFIG_DMADEVICES is not set
+# CONFIG_AUXDISPLAY is not set
+# CONFIG_UIO is not set
+
+#
+# TI VLYNQ
+#
+# CONFIG_STAGING is not set
+
+#
+# File systems
+#
+# CONFIG_EXT2_FS is not set
+# CONFIG_EXT3_FS is not set
+# CONFIG_EXT4_FS is not set
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_FS_POSIX_ACL is not set
+# CONFIG_XFS_FS is not set
+# CONFIG_GFS2_FS is not set
+# CONFIG_BTRFS_FS is not set
+# CONFIG_NILFS2_FS is not set
+CONFIG_FILE_LOCKING=y
+# CONFIG_FSNOTIFY is not set
+# CONFIG_DNOTIFY is not set
+# CONFIG_INOTIFY is not set
+# CONFIG_INOTIFY_USER is not set
+# CONFIG_QUOTA is not set
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+# CONFIG_FUSE_FS is not set
+
+#
+# Caches
+#
+# CONFIG_FSCACHE is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+# CONFIG_MSDOS_FS is not set
+# CONFIG_VFAT_FS is not set
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_SYSCTL=y
+CONFIG_PROC_PAGE_MONITOR=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+# CONFIG_TMPFS_POSIX_ACL is not set
+# CONFIG_HUGETLB_PAGE is not set
+# CONFIG_CONFIGFS_FS is not set
+# CONFIG_MISC_FILESYSTEMS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+# CONFIG_NLS is not set
+
+#
+# Kernel hacking
+#
+# CONFIG_PRINTK_TIME is not set
+CONFIG_ENABLE_WARN_DEPRECATED=y
+CONFIG_ENABLE_MUST_CHECK=y
+CONFIG_FRAME_WARN=1024
+CONFIG_MAGIC_SYSRQ=y
+# CONFIG_STRIP_ASM_SYMS is not set
+# CONFIG_UNUSED_SYMBOLS is not set
+# CONFIG_DEBUG_FS is not set
+# CONFIG_HEADERS_CHECK is not set
+CONFIG_DEBUG_KERNEL=y
+# CONFIG_DEBUG_SHIRQ is not set
+# CONFIG_DETECT_SOFTLOCKUP is not set
+# CONFIG_DETECT_HUNG_TASK is not set
+CONFIG_SCHED_DEBUG=y
+# CONFIG_SCHEDSTATS is not set
+# CONFIG_TIMER_STATS is not set
+# CONFIG_DEBUG_OBJECTS is not set
+# CONFIG_DEBUG_SLAB is not set
+# CONFIG_DEBUG_KMEMLEAK is not set
+# CONFIG_DEBUG_RT_MUTEXES is not set
+# CONFIG_RT_MUTEX_TESTER is not set
+# CONFIG_DEBUG_SPINLOCK is not set
+# CONFIG_DEBUG_MUTEXES is not set
+# CONFIG_DEBUG_LOCK_ALLOC is not set
+# CONFIG_PROVE_LOCKING is not set
+# CONFIG_LOCK_STAT is not set
+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
+# CONFIG_DEBUG_KOBJECT is not set
+CONFIG_DEBUG_BUGVERBOSE=y
+# CONFIG_DEBUG_INFO is not set
+# CONFIG_DEBUG_VM is not set
+# CONFIG_DEBUG_WRITECOUNT is not set
+CONFIG_DEBUG_MEMORY_INIT=y
+# CONFIG_DEBUG_LIST is not set
+# CONFIG_DEBUG_SG is not set
+# CONFIG_DEBUG_NOTIFIERS is not set
+# CONFIG_DEBUG_CREDENTIALS is not set
+# CONFIG_BOOT_PRINTK_DELAY is not set
+# CONFIG_RCU_TORTURE_TEST is not set
+# CONFIG_RCU_CPU_STALL_DETECTOR is not set
+# CONFIG_BACKTRACE_SELF_TEST is not set
+# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
+# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
+# CONFIG_FAULT_INJECTION is not set
+# CONFIG_LATENCYTOP is not set
+# CONFIG_SYSCTL_SYSCALL_CHECK is not set
+# CONFIG_PAGE_POISONING is not set
+CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_TRACING_SUPPORT=y
+# CONFIG_FTRACE is not set
+# CONFIG_SAMPLES is not set
+CONFIG_HAVE_ARCH_KGDB=y
+# CONFIG_KGDB is not set
+CONFIG_ARM_UNWIND=y
+# CONFIG_DEBUG_USER is not set
+# CONFIG_DEBUG_ERRORS is not set
+# CONFIG_DEBUG_STACK_USAGE is not set
+# CONFIG_DEBUG_LL is not set
+# CONFIG_OC_ETM is not set
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY is not set
+# CONFIG_SECURITYFS is not set
+# CONFIG_DEFAULT_SECURITY_SELINUX is not set
+# CONFIG_DEFAULT_SECURITY_SMACK is not set
+# CONFIG_DEFAULT_SECURITY_TOMOYO is not set
+CONFIG_DEFAULT_SECURITY_DAC=y
+CONFIG_DEFAULT_SECURITY=""
+# CONFIG_CRYPTO is not set
+# CONFIG_BINARY_PRINTF is not set
+
+#
+# Library routines
+#
+CONFIG_GENERIC_FIND_LAST_BIT=y
+# CONFIG_CRC_CCITT is not set
+# CONFIG_CRC16 is not set
+# CONFIG_CRC_T10DIF is not set
+# CONFIG_CRC_ITU_T is not set
+# CONFIG_CRC32 is not set
+# CONFIG_CRC7 is not set
+# CONFIG_LIBCRC32C is not set
+CONFIG_ZLIB_INFLATE=y
+CONFIG_LZO_DECOMPRESS=y
+CONFIG_DECOMPRESS_GZIP=y
+CONFIG_DECOMPRESS_BZIP2=y
+CONFIG_DECOMPRESS_LZMA=y
+CONFIG_DECOMPRESS_LZO=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAS_DMA=y
diff --git a/arch/arm/configs/imote2_defconfig b/arch/arm/configs/imote2_defconfig
new file mode 100644
index 000000000000..95d2becfc664
--- /dev/null
+++ b/arch/arm/configs/imote2_defconfig
@@ -0,0 +1,2077 @@
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.33-rc8
+# Sat Feb 13 21:48:53 2010
+#
+CONFIG_ARM=y
+CONFIG_SYS_SUPPORTS_APM_EMULATION=y
+CONFIG_GENERIC_GPIO=y
+CONFIG_GENERIC_TIME=y
+CONFIG_GENERIC_CLOCKEVENTS=y
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_HAVE_LATENCYTOP_SUPPORT=y
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+CONFIG_HARDIRQS_SW_RESEND=y
+CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+CONFIG_ARCH_HAS_CPUFREQ=y
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_ARCH_MTD_XIP=y
+CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
+CONFIG_VECTORS_BASE=0xffff0000
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+CONFIG_CONSTRUCTORS=y
+
+#
+# General setup
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_LOCK_KERNEL=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+CONFIG_LOCALVERSION=""
+# CONFIG_LOCALVERSION_AUTO is not set
+CONFIG_HAVE_KERNEL_GZIP=y
+CONFIG_HAVE_KERNEL_LZO=y
+CONFIG_KERNEL_GZIP=y
+# CONFIG_KERNEL_BZIP2 is not set
+# CONFIG_KERNEL_LZMA is not set
+# CONFIG_KERNEL_LZO is not set
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+CONFIG_SYSVIPC_SYSCTL=y
+# CONFIG_POSIX_MQUEUE is not set
+# CONFIG_BSD_PROCESS_ACCT is not set
+# CONFIG_TASKSTATS is not set
+# CONFIG_AUDIT is not set
+
+#
+# RCU Subsystem
+#
+CONFIG_TREE_RCU=y
+# CONFIG_TREE_PREEMPT_RCU is not set
+# CONFIG_TINY_RCU is not set
+# CONFIG_RCU_TRACE is not set
+CONFIG_RCU_FANOUT=32
+# CONFIG_RCU_FANOUT_EXACT is not set
+# CONFIG_TREE_RCU_TRACE is not set
+# CONFIG_IKCONFIG is not set
+CONFIG_LOG_BUF_SHIFT=14
+CONFIG_GROUP_SCHED=y
+CONFIG_FAIR_GROUP_SCHED=y
+# CONFIG_RT_GROUP_SCHED is not set
+CONFIG_USER_SCHED=y
+# CONFIG_CGROUP_SCHED is not set
+# CONFIG_CGROUPS is not set
+CONFIG_SYSFS_DEPRECATED=y
+CONFIG_SYSFS_DEPRECATED_V2=y
+# CONFIG_RELAY is not set
+# CONFIG_NAMESPACES is not set
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_INITRAMFS_SOURCE=""
+CONFIG_RD_GZIP=y
+CONFIG_RD_BZIP2=y
+CONFIG_RD_LZMA=y
+# CONFIG_RD_LZO is not set
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_SYSCTL=y
+CONFIG_ANON_INODES=y
+CONFIG_EMBEDDED=y
+CONFIG_UID16=y
+CONFIG_SYSCTL_SYSCALL=y
+CONFIG_KALLSYMS=y
+CONFIG_KALLSYMS_ALL=y
+# CONFIG_KALLSYMS_EXTRA_PASS is not set
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_ELF_CORE=y
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+CONFIG_EPOLL=y
+CONFIG_SIGNALFD=y
+CONFIG_TIMERFD=y
+CONFIG_EVENTFD=y
+CONFIG_SHMEM=y
+CONFIG_AIO=y
+
+#
+# Kernel Performance Events And Counters
+#
+CONFIG_VM_EVENT_COUNTERS=y
+# CONFIG_COMPAT_BRK is not set
+CONFIG_SLAB=y
+# CONFIG_SLUB is not set
+# CONFIG_SLOB is not set
+# CONFIG_PROFILING is not set
+CONFIG_HAVE_OPROFILE=y
+# CONFIG_KPROBES is not set
+CONFIG_HAVE_KPROBES=y
+CONFIG_HAVE_KRETPROBES=y
+CONFIG_HAVE_CLK=y
+
+#
+# GCOV-based kernel profiling
+#
+# CONFIG_GCOV_KERNEL is not set
+CONFIG_SLOW_WORK=y
+# CONFIG_SLOW_WORK_DEBUG is not set
+CONFIG_HAVE_GENERIC_DMA_COHERENT=y
+CONFIG_SLABINFO=y
+CONFIG_RT_MUTEXES=y
+CONFIG_BASE_SMALL=0
+CONFIG_MODULES=y
+# CONFIG_MODULE_FORCE_LOAD is not set
+CONFIG_MODULE_UNLOAD=y
+CONFIG_MODULE_FORCE_UNLOAD=y
+CONFIG_MODVERSIONS=y
+# CONFIG_MODULE_SRCVERSION_ALL is not set
+CONFIG_BLOCK=y
+# CONFIG_LBDAF is not set
+# CONFIG_BLK_DEV_BSG is not set
+# CONFIG_BLK_DEV_INTEGRITY is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_DEADLINE=y
+# CONFIG_IOSCHED_CFQ is not set
+CONFIG_DEFAULT_DEADLINE=y
+# CONFIG_DEFAULT_CFQ is not set
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="deadline"
+# CONFIG_INLINE_SPIN_TRYLOCK is not set
+# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set
+# CONFIG_INLINE_SPIN_LOCK is not set
+# CONFIG_INLINE_SPIN_LOCK_BH is not set
+# CONFIG_INLINE_SPIN_LOCK_IRQ is not set
+# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set
+# CONFIG_INLINE_SPIN_UNLOCK is not set
+# CONFIG_INLINE_SPIN_UNLOCK_BH is not set
+# CONFIG_INLINE_SPIN_UNLOCK_IRQ is not set
+# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set
+# CONFIG_INLINE_READ_TRYLOCK is not set
+# CONFIG_INLINE_READ_LOCK is not set
+# CONFIG_INLINE_READ_LOCK_BH is not set
+# CONFIG_INLINE_READ_LOCK_IRQ is not set
+# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set
+# CONFIG_INLINE_READ_UNLOCK is not set
+# CONFIG_INLINE_READ_UNLOCK_BH is not set
+# CONFIG_INLINE_READ_UNLOCK_IRQ is not set
+# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set
+# CONFIG_INLINE_WRITE_TRYLOCK is not set
+# CONFIG_INLINE_WRITE_LOCK is not set
+# CONFIG_INLINE_WRITE_LOCK_BH is not set
+# CONFIG_INLINE_WRITE_LOCK_IRQ is not set
+# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set
+# CONFIG_INLINE_WRITE_UNLOCK is not set
+# CONFIG_INLINE_WRITE_UNLOCK_BH is not set
+# CONFIG_INLINE_WRITE_UNLOCK_IRQ is not set
+# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set
+# CONFIG_MUTEX_SPIN_ON_OWNER is not set
+CONFIG_FREEZER=y
+
+#
+# System Type
+#
+CONFIG_MMU=y
+# CONFIG_ARCH_AAEC2000 is not set
+# CONFIG_ARCH_INTEGRATOR is not set
+# CONFIG_ARCH_REALVIEW is not set
+# CONFIG_ARCH_VERSATILE is not set
+# CONFIG_ARCH_AT91 is not set
+# CONFIG_ARCH_CLPS711X is not set
+# CONFIG_ARCH_GEMINI is not set
+# CONFIG_ARCH_EBSA110 is not set
+# CONFIG_ARCH_EP93XX is not set
+# CONFIG_ARCH_FOOTBRIDGE is not set
+# CONFIG_ARCH_MXC is not set
+# CONFIG_ARCH_STMP3XXX is not set
+# CONFIG_ARCH_NETX is not set
+# CONFIG_ARCH_H720X is not set
+# CONFIG_ARCH_NOMADIK is not set
+# CONFIG_ARCH_IOP13XX is not set
+# CONFIG_ARCH_IOP32X is not set
+# CONFIG_ARCH_IOP33X is not set
+# CONFIG_ARCH_IXP23XX is not set
+# CONFIG_ARCH_IXP2000 is not set
+# CONFIG_ARCH_IXP4XX is not set
+# CONFIG_ARCH_L7200 is not set
+# CONFIG_ARCH_DOVE is not set
+# CONFIG_ARCH_KIRKWOOD is not set
+# CONFIG_ARCH_LOKI is not set
+# CONFIG_ARCH_MV78XX0 is not set
+# CONFIG_ARCH_ORION5X is not set
+# CONFIG_ARCH_MMP is not set
+# CONFIG_ARCH_KS8695 is not set
+# CONFIG_ARCH_NS9XXX is not set
+# CONFIG_ARCH_W90X900 is not set
+# CONFIG_ARCH_PNX4008 is not set
+CONFIG_ARCH_PXA=y
+# CONFIG_ARCH_MSM is not set
+# CONFIG_ARCH_RPC is not set
+# CONFIG_ARCH_SA1100 is not set
+# CONFIG_ARCH_S3C2410 is not set
+# CONFIG_ARCH_S3C64XX is not set
+# CONFIG_ARCH_S5PC1XX is not set
+# CONFIG_ARCH_SHARK is not set
+# CONFIG_ARCH_LH7A40X is not set
+# CONFIG_ARCH_U300 is not set
+# CONFIG_ARCH_DAVINCI is not set
+# CONFIG_ARCH_OMAP is not set
+# CONFIG_ARCH_BCMRING is not set
+# CONFIG_ARCH_U8500 is not set
+
+#
+# Intel PXA2xx/PXA3xx Implementations
+#
+
+#
+# Intel/Marvell Dev Platforms (sorted by hardware release time)
+#
+# CONFIG_ARCH_LUBBOCK is not set
+# CONFIG_MACH_MAINSTONE is not set
+# CONFIG_MACH_ZYLONITE300 is not set
+# CONFIG_MACH_ZYLONITE320 is not set
+# CONFIG_MACH_LITTLETON is not set
+# CONFIG_MACH_TAVOREVB is not set
+# CONFIG_MACH_SAAR is not set
+
+#
+# Third Party Dev Platforms (sorted by vendor name)
+#
+# CONFIG_ARCH_PXA_IDP is not set
+# CONFIG_ARCH_VIPER is not set
+# CONFIG_MACH_ARCOM_ZEUS is not set
+# CONFIG_MACH_BALLOON3 is not set
+# CONFIG_MACH_CSB726 is not set
+# CONFIG_MACH_ARMCORE is not set
+# CONFIG_MACH_EM_X270 is not set
+# CONFIG_MACH_EXEDA is not set
+# CONFIG_MACH_CM_X300 is not set
+# CONFIG_ARCH_GUMSTIX is not set
+CONFIG_MACH_INTELMOTE2=y
+# CONFIG_MACH_STARGATE2 is not set
+# CONFIG_MACH_XCEP is not set
+# CONFIG_TRIZEPS_PXA is not set
+# CONFIG_MACH_LOGICPD_PXA270 is not set
+# CONFIG_MACH_PCM027 is not set
+# CONFIG_MACH_COLIBRI is not set
+# CONFIG_MACH_COLIBRI300 is not set
+# CONFIG_MACH_COLIBRI320 is not set
+
+#
+# End-user Products (sorted by vendor name)
+#
+# CONFIG_MACH_H4700 is not set
+# CONFIG_MACH_H5000 is not set
+# CONFIG_MACH_HIMALAYA is not set
+# CONFIG_MACH_MAGICIAN is not set
+# CONFIG_MACH_MIOA701 is not set
+# CONFIG_PXA_EZX is not set
+# CONFIG_MACH_MP900C is not set
+# CONFIG_ARCH_PXA_PALM is not set
+# CONFIG_PXA_SHARPSL is not set
+# CONFIG_ARCH_PXA_ESERIES is not set
+CONFIG_PXA27x=y
+CONFIG_PXA_SSP=y
+CONFIG_PXA_HAVE_BOARD_IRQS=y
+CONFIG_PLAT_PXA=y
+
+#
+# Processor Type
+#
+CONFIG_CPU_XSCALE=y
+CONFIG_CPU_32v5=y
+CONFIG_CPU_ABRT_EV5T=y
+CONFIG_CPU_PABRT_LEGACY=y
+CONFIG_CPU_CACHE_VIVT=y
+CONFIG_CPU_TLB_V4WBI=y
+CONFIG_CPU_CP15=y
+CONFIG_CPU_CP15_MMU=y
+
+#
+# Processor Features
+#
+CONFIG_ARM_THUMB=y
+# CONFIG_CPU_DCACHE_DISABLE is not set
+CONFIG_ARM_L1_CACHE_SHIFT=5
+CONFIG_IWMMXT=y
+CONFIG_XSCALE_PMU=y
+CONFIG_COMMON_CLKDEV=y
+
+#
+# Bus support
+#
+# CONFIG_PCI_SYSCALL is not set
+# CONFIG_ARCH_SUPPORTS_MSI is not set
+# CONFIG_PCCARD is not set
+
+#
+# Kernel Features
+#
+CONFIG_TICK_ONESHOT=y
+CONFIG_NO_HZ=y
+CONFIG_HIGH_RES_TIMERS=y
+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
+CONFIG_VMSPLIT_3G=y
+# CONFIG_VMSPLIT_2G is not set
+# CONFIG_VMSPLIT_1G is not set
+CONFIG_PAGE_OFFSET=0xC0000000
+# CONFIG_PREEMPT_NONE is not set
+# CONFIG_PREEMPT_VOLUNTARY is not set
+CONFIG_PREEMPT=y
+CONFIG_HZ=100
+CONFIG_AEABI=y
+CONFIG_OABI_COMPAT=y
+# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
+# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
+# CONFIG_HIGHMEM is not set
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_FLATMEM_MANUAL=y
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+# CONFIG_SPARSEMEM_MANUAL is not set
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+CONFIG_PAGEFLAGS_EXTENDED=y
+CONFIG_SPLIT_PTLOCK_CPUS=999999
+# CONFIG_PHYS_ADDR_T_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=0
+CONFIG_VIRT_TO_BUS=y
+# CONFIG_KSM is not set
+CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
+CONFIG_ALIGNMENT_TRAP=y
+# CONFIG_UACCESS_WITH_MEMCPY is not set
+
+#
+# Boot options
+#
+CONFIG_ZBOOT_ROM_TEXT=0x0
+CONFIG_ZBOOT_ROM_BSS=0x0
+CONFIG_CMDLINE="console=tty1 root=/dev/mmcblk0p2 rootfstype=ext2 rootdelay=3 ip=192.168.0.202:192.168.0.200:192.168.0.200:255.255.255.0 debug"
+# CONFIG_XIP_KERNEL is not set
+CONFIG_KEXEC=y
+CONFIG_ATAGS_PROC=y
+
+#
+# CPU Power Management
+#
+CONFIG_CPU_FREQ=y
+CONFIG_CPU_FREQ_TABLE=y
+CONFIG_CPU_FREQ_DEBUG=y
+CONFIG_CPU_FREQ_STAT=y
+# CONFIG_CPU_FREQ_STAT_DETAILS is not set
+CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y
+# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set
+# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set
+# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set
+# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set
+CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
+CONFIG_CPU_FREQ_GOV_POWERSAVE=m
+CONFIG_CPU_FREQ_GOV_USERSPACE=m
+CONFIG_CPU_FREQ_GOV_ONDEMAND=m
+CONFIG_CPU_FREQ_GOV_CONSERVATIVE=m
+CONFIG_CPU_IDLE=y
+CONFIG_CPU_IDLE_GOV_LADDER=y
+CONFIG_CPU_IDLE_GOV_MENU=y
+
+#
+# Floating point emulation
+#
+
+#
+# At least one emulation must be selected
+#
+CONFIG_FPE_NWFPE=y
+# CONFIG_FPE_NWFPE_XP is not set
+# CONFIG_FPE_FASTFPE is not set
+
+#
+# Userspace binary formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+CONFIG_HAVE_AOUT=y
+CONFIG_BINFMT_AOUT=m
+CONFIG_BINFMT_MISC=m
+
+#
+# Power management options
+#
+CONFIG_PM=y
+# CONFIG_PM_DEBUG is not set
+CONFIG_PM_SLEEP=y
+CONFIG_SUSPEND=y
+CONFIG_SUSPEND_FREEZER=y
+CONFIG_APM_EMULATION=y
+CONFIG_PM_RUNTIME=y
+CONFIG_ARCH_SUSPEND_POSSIBLE=y
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+CONFIG_PACKET_MMAP=y
+CONFIG_UNIX=y
+CONFIG_XFRM=y
+# CONFIG_XFRM_USER is not set
+# CONFIG_XFRM_SUB_POLICY is not set
+# CONFIG_XFRM_MIGRATE is not set
+# CONFIG_XFRM_STATISTICS is not set
+CONFIG_XFRM_IPCOMP=m
+# CONFIG_NET_KEY is not set
+CONFIG_INET=y
+# CONFIG_IP_MULTICAST is not set
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_FIB_HASH=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+CONFIG_IP_PNP_BOOTP=y
+CONFIG_IP_PNP_RARP=y
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_ARPD is not set
+CONFIG_SYN_COOKIES=y
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_XFRM_TUNNEL is not set
+CONFIG_INET_TUNNEL=m
+# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
+# CONFIG_INET_XFRM_MODE_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_BEET is not set
+# CONFIG_INET_LRO is not set
+# CONFIG_INET_DIAG is not set
+# CONFIG_TCP_CONG_ADVANCED is not set
+CONFIG_TCP_CONG_CUBIC=y
+CONFIG_DEFAULT_TCP_CONG="cubic"
+# CONFIG_TCP_MD5SIG is not set
+CONFIG_IPV6=m
+# CONFIG_IPV6_PRIVACY is not set
+# CONFIG_IPV6_ROUTER_PREF is not set
+# CONFIG_IPV6_OPTIMISTIC_DAD is not set
+CONFIG_INET6_AH=m
+CONFIG_INET6_ESP=m
+CONFIG_INET6_IPCOMP=m
+CONFIG_IPV6_MIP6=m
+CONFIG_INET6_XFRM_TUNNEL=m
+CONFIG_INET6_TUNNEL=m
+CONFIG_INET6_XFRM_MODE_TRANSPORT=m
+CONFIG_INET6_XFRM_MODE_TUNNEL=m
+CONFIG_INET6_XFRM_MODE_BEET=m
+# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set
+CONFIG_IPV6_SIT=m
+# CONFIG_IPV6_SIT_6RD is not set
+CONFIG_IPV6_NDISC_NODETYPE=y
+CONFIG_IPV6_TUNNEL=m
+CONFIG_IPV6_MULTIPLE_TABLES=y
+CONFIG_IPV6_SUBTREES=y
+# CONFIG_IPV6_MROUTE is not set
+# CONFIG_NETWORK_SECMARK is not set
+CONFIG_NETFILTER=y
+# CONFIG_NETFILTER_DEBUG is not set
+CONFIG_NETFILTER_ADVANCED=y
+CONFIG_BRIDGE_NETFILTER=y
+
+#
+# Core Netfilter Configuration
+#
+CONFIG_NETFILTER_NETLINK=m
+CONFIG_NETFILTER_NETLINK_QUEUE=m
+CONFIG_NETFILTER_NETLINK_LOG=m
+CONFIG_NF_CONNTRACK=m
+CONFIG_NF_CT_ACCT=y
+CONFIG_NF_CONNTRACK_MARK=y
+CONFIG_NF_CONNTRACK_EVENTS=y
+# CONFIG_NF_CT_PROTO_DCCP is not set
+CONFIG_NF_CT_PROTO_GRE=m
+CONFIG_NF_CT_PROTO_SCTP=m
+CONFIG_NF_CT_PROTO_UDPLITE=m
+CONFIG_NF_CONNTRACK_AMANDA=m
+CONFIG_NF_CONNTRACK_FTP=m
+CONFIG_NF_CONNTRACK_H323=m
+CONFIG_NF_CONNTRACK_IRC=m
+CONFIG_NF_CONNTRACK_NETBIOS_NS=m
+CONFIG_NF_CONNTRACK_PPTP=m
+CONFIG_NF_CONNTRACK_SANE=m
+CONFIG_NF_CONNTRACK_SIP=m
+CONFIG_NF_CONNTRACK_TFTP=m
+CONFIG_NF_CT_NETLINK=m
+# CONFIG_NETFILTER_TPROXY is not set
+CONFIG_NETFILTER_XTABLES=m
+CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m
+# CONFIG_NETFILTER_XT_TARGET_CONNMARK is not set
+# CONFIG_NETFILTER_XT_TARGET_DSCP is not set
+CONFIG_NETFILTER_XT_TARGET_HL=m
+CONFIG_NETFILTER_XT_TARGET_LED=m
+CONFIG_NETFILTER_XT_TARGET_MARK=m
+CONFIG_NETFILTER_XT_TARGET_NFLOG=m
+CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m
+# CONFIG_NETFILTER_XT_TARGET_NOTRACK is not set
+# CONFIG_NETFILTER_XT_TARGET_RATEEST is not set
+# CONFIG_NETFILTER_XT_TARGET_TRACE is not set
+CONFIG_NETFILTER_XT_TARGET_TCPMSS=m
+# CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP is not set
+# CONFIG_NETFILTER_XT_MATCH_CLUSTER is not set
+CONFIG_NETFILTER_XT_MATCH_COMMENT=m
+CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m
+CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=m
+CONFIG_NETFILTER_XT_MATCH_CONNMARK=m
+CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m
+CONFIG_NETFILTER_XT_MATCH_DCCP=m
+CONFIG_NETFILTER_XT_MATCH_DSCP=m
+CONFIG_NETFILTER_XT_MATCH_ESP=m
+CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m
+CONFIG_NETFILTER_XT_MATCH_HELPER=m
+CONFIG_NETFILTER_XT_MATCH_HL=m
+# CONFIG_NETFILTER_XT_MATCH_IPRANGE is not set
+CONFIG_NETFILTER_XT_MATCH_LENGTH=m
+CONFIG_NETFILTER_XT_MATCH_LIMIT=m
+CONFIG_NETFILTER_XT_MATCH_MAC=m
+CONFIG_NETFILTER_XT_MATCH_MARK=m
+CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m
+# CONFIG_NETFILTER_XT_MATCH_OWNER is not set
+CONFIG_NETFILTER_XT_MATCH_POLICY=m
+# CONFIG_NETFILTER_XT_MATCH_PHYSDEV is not set
+CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m
+CONFIG_NETFILTER_XT_MATCH_QUOTA=m
+# CONFIG_NETFILTER_XT_MATCH_RATEEST is not set
+CONFIG_NETFILTER_XT_MATCH_REALM=m
+# CONFIG_NETFILTER_XT_MATCH_RECENT is not set
+CONFIG_NETFILTER_XT_MATCH_SCTP=m
+CONFIG_NETFILTER_XT_MATCH_STATE=m
+CONFIG_NETFILTER_XT_MATCH_STATISTIC=m
+CONFIG_NETFILTER_XT_MATCH_STRING=m
+CONFIG_NETFILTER_XT_MATCH_TCPMSS=m
+CONFIG_NETFILTER_XT_MATCH_TIME=m
+CONFIG_NETFILTER_XT_MATCH_U32=m
+# CONFIG_NETFILTER_XT_MATCH_OSF is not set
+# CONFIG_IP_VS is not set
+
+#
+# IP: Netfilter Configuration
+#
+CONFIG_NF_DEFRAG_IPV4=m
+CONFIG_NF_CONNTRACK_IPV4=m
+CONFIG_NF_CONNTRACK_PROC_COMPAT=y
+CONFIG_IP_NF_QUEUE=m
+CONFIG_IP_NF_IPTABLES=m
+CONFIG_IP_NF_MATCH_ADDRTYPE=m
+CONFIG_IP_NF_MATCH_AH=m
+CONFIG_IP_NF_MATCH_ECN=m
+CONFIG_IP_NF_MATCH_TTL=m
+CONFIG_IP_NF_FILTER=m
+CONFIG_IP_NF_TARGET_REJECT=m
+CONFIG_IP_NF_TARGET_LOG=m
+CONFIG_IP_NF_TARGET_ULOG=m
+CONFIG_NF_NAT=m
+CONFIG_NF_NAT_NEEDED=y
+CONFIG_IP_NF_TARGET_MASQUERADE=m
+CONFIG_IP_NF_TARGET_NETMAP=m
+CONFIG_IP_NF_TARGET_REDIRECT=m
+CONFIG_NF_NAT_SNMP_BASIC=m
+CONFIG_NF_NAT_PROTO_GRE=m
+CONFIG_NF_NAT_PROTO_UDPLITE=m
+CONFIG_NF_NAT_PROTO_SCTP=m
+CONFIG_NF_NAT_FTP=m
+CONFIG_NF_NAT_IRC=m
+CONFIG_NF_NAT_TFTP=m
+CONFIG_NF_NAT_AMANDA=m
+CONFIG_NF_NAT_PPTP=m
+CONFIG_NF_NAT_H323=m
+CONFIG_NF_NAT_SIP=m
+CONFIG_IP_NF_MANGLE=m
+CONFIG_IP_NF_TARGET_CLUSTERIP=m
+CONFIG_IP_NF_TARGET_ECN=m
+CONFIG_IP_NF_TARGET_TTL=m
+CONFIG_IP_NF_RAW=m
+CONFIG_IP_NF_ARPTABLES=m
+CONFIG_IP_NF_ARPFILTER=m
+CONFIG_IP_NF_ARP_MANGLE=m
+
+#
+# IPv6: Netfilter Configuration
+#
+CONFIG_NF_CONNTRACK_IPV6=m
+CONFIG_IP6_NF_QUEUE=m
+CONFIG_IP6_NF_IPTABLES=m
+CONFIG_IP6_NF_MATCH_AH=m
+CONFIG_IP6_NF_MATCH_EUI64=m
+CONFIG_IP6_NF_MATCH_FRAG=m
+CONFIG_IP6_NF_MATCH_OPTS=m
+CONFIG_IP6_NF_MATCH_HL=m
+CONFIG_IP6_NF_MATCH_IPV6HEADER=m
+CONFIG_IP6_NF_MATCH_MH=m
+CONFIG_IP6_NF_MATCH_RT=m
+CONFIG_IP6_NF_TARGET_HL=m
+CONFIG_IP6_NF_TARGET_LOG=m
+CONFIG_IP6_NF_FILTER=m
+CONFIG_IP6_NF_TARGET_REJECT=m
+CONFIG_IP6_NF_MANGLE=m
+CONFIG_IP6_NF_RAW=m
+# CONFIG_BRIDGE_NF_EBTABLES is not set
+# CONFIG_IP_DCCP is not set
+# CONFIG_IP_SCTP is not set
+# CONFIG_RDS is not set
+# CONFIG_TIPC is not set
+# CONFIG_ATM is not set
+CONFIG_STP=m
+CONFIG_BRIDGE=m
+# CONFIG_NET_DSA is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_DECNET is not set
+CONFIG_LLC=m
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_PHONET is not set
+CONFIG_IEEE802154=y
+# CONFIG_NET_SCHED is not set
+CONFIG_NET_CLS_ROUTE=y
+# CONFIG_DCB is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# CONFIG_HAMRADIO is not set
+# CONFIG_CAN is not set
+# CONFIG_IRDA is not set
+CONFIG_BT=y
+CONFIG_BT_L2CAP=y
+CONFIG_BT_SCO=y
+CONFIG_BT_RFCOMM=y
+CONFIG_BT_RFCOMM_TTY=y
+CONFIG_BT_BNEP=y
+CONFIG_BT_BNEP_MC_FILTER=y
+CONFIG_BT_BNEP_PROTO_FILTER=y
+CONFIG_BT_HIDP=y
+
+#
+# Bluetooth device drivers
+#
+CONFIG_BT_HCIBTUSB=m
+CONFIG_BT_HCIBTSDIO=m
+CONFIG_BT_HCIUART=y
+CONFIG_BT_HCIUART_H4=y
+# CONFIG_BT_HCIUART_BCSP is not set
+# CONFIG_BT_HCIUART_LL is not set
+CONFIG_BT_HCIBCM203X=m
+CONFIG_BT_HCIBPA10X=m
+CONFIG_BT_HCIBFUSB=m
+CONFIG_BT_HCIVHCI=m
+CONFIG_BT_MRVL=m
+CONFIG_BT_MRVL_SDIO=m
+# CONFIG_BT_ATH3K is not set
+# CONFIG_AF_RXRPC is not set
+CONFIG_FIB_RULES=y
+# CONFIG_WIRELESS is not set
+# CONFIG_WIMAX is not set
+# CONFIG_RFKILL is not set
+# CONFIG_NET_9P is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+# CONFIG_DEVTMPFS is not set
+CONFIG_STANDALONE=y
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+CONFIG_FW_LOADER=m
+CONFIG_FIRMWARE_IN_KERNEL=y
+CONFIG_EXTRA_FIRMWARE=""
+# CONFIG_DEBUG_DRIVER is not set
+# CONFIG_DEBUG_DEVRES is not set
+# CONFIG_SYS_HYPERVISOR is not set
+CONFIG_CONNECTOR=m
+CONFIG_MTD=y
+# CONFIG_MTD_DEBUG is not set
+# CONFIG_MTD_TESTS is not set
+# CONFIG_MTD_CONCAT is not set
+CONFIG_MTD_PARTITIONS=y
+# CONFIG_MTD_REDBOOT_PARTS is not set
+# CONFIG_MTD_CMDLINE_PARTS is not set
+# CONFIG_MTD_AFS_PARTS is not set
+# CONFIG_MTD_AR7_PARTS is not set
+
+#
+# User Modules And Translation Layers
+#
+CONFIG_MTD_CHAR=y
+CONFIG_HAVE_MTD_OTP=y
+CONFIG_MTD_BLKDEVS=y
+CONFIG_MTD_BLOCK=y
+# CONFIG_FTL is not set
+# CONFIG_NFTL is not set
+# CONFIG_INFTL is not set
+# CONFIG_RFD_FTL is not set
+# CONFIG_SSFDC is not set
+# CONFIG_MTD_OOPS is not set
+
+#
+# RAM/ROM/Flash chip drivers
+#
+CONFIG_MTD_CFI=y
+# CONFIG_MTD_JEDECPROBE is not set
+CONFIG_MTD_GEN_PROBE=y
+CONFIG_MTD_CFI_ADV_OPTIONS=y
+CONFIG_MTD_CFI_NOSWAP=y
+# CONFIG_MTD_CFI_BE_BYTE_SWAP is not set
+# CONFIG_MTD_CFI_LE_BYTE_SWAP is not set
+CONFIG_MTD_CFI_GEOMETRY=y
+# CONFIG_MTD_MAP_BANK_WIDTH_1 is not set
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
+# CONFIG_MTD_MAP_BANK_WIDTH_4 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
+CONFIG_MTD_CFI_I1=y
+# CONFIG_MTD_CFI_I2 is not set
+# CONFIG_MTD_CFI_I4 is not set
+# CONFIG_MTD_CFI_I8 is not set
+CONFIG_MTD_OTP=y
+CONFIG_MTD_CFI_INTELEXT=y
+# CONFIG_MTD_CFI_AMDSTD is not set
+# CONFIG_MTD_CFI_STAA is not set
+CONFIG_MTD_CFI_UTIL=y
+# CONFIG_MTD_RAM is not set
+# CONFIG_MTD_ROM is not set
+# CONFIG_MTD_ABSENT is not set
+# CONFIG_MTD_XIP is not set
+
+#
+# Mapping drivers for chip access
+#
+# CONFIG_MTD_COMPLEX_MAPPINGS is not set
+# CONFIG_MTD_PHYSMAP is not set
+CONFIG_MTD_PXA2XX=y
+# CONFIG_MTD_ARM_INTEGRATOR is not set
+# CONFIG_MTD_PLATRAM is not set
+
+#
+# Self-contained MTD device drivers
+#
+# CONFIG_MTD_DATAFLASH is not set
+# CONFIG_MTD_M25P80 is not set
+# CONFIG_MTD_SST25L is not set
+# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_PHRAM is not set
+# CONFIG_MTD_MTDRAM is not set
+# CONFIG_MTD_BLOCK2MTD is not set
+
+#
+# Disk-On-Chip Device Drivers
+#
+# CONFIG_MTD_DOC2000 is not set
+# CONFIG_MTD_DOC2001 is not set
+# CONFIG_MTD_DOC2001PLUS is not set
+# CONFIG_MTD_NAND is not set
+# CONFIG_MTD_ONENAND is not set
+
+#
+# LPDDR flash memory drivers
+#
+# CONFIG_MTD_LPDDR is not set
+
+#
+# UBI - Unsorted block images
+#
+# CONFIG_MTD_UBI is not set
+# CONFIG_PARPORT is not set
+CONFIG_BLK_DEV=y
+# CONFIG_BLK_DEV_COW_COMMON is not set
+CONFIG_BLK_DEV_LOOP=m
+CONFIG_BLK_DEV_CRYPTOLOOP=m
+# CONFIG_BLK_DEV_DRBD is not set
+CONFIG_BLK_DEV_NBD=m
+# CONFIG_BLK_DEV_UB is not set
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_COUNT=16
+CONFIG_BLK_DEV_RAM_SIZE=4096
+# CONFIG_BLK_DEV_XIP is not set
+# CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_ATA_OVER_ETH is not set
+# CONFIG_MG_DISK is not set
+# CONFIG_MISC_DEVICES is not set
+CONFIG_HAVE_IDE=y
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+# CONFIG_RAID_ATTRS is not set
+# CONFIG_SCSI is not set
+# CONFIG_SCSI_DMA is not set
+# CONFIG_SCSI_NETLINK is not set
+# CONFIG_ATA is not set
+# CONFIG_MD is not set
+CONFIG_NETDEVICES=y
+CONFIG_DUMMY=y
+# CONFIG_BONDING is not set
+# CONFIG_MACVLAN is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+# CONFIG_VETH is not set
+# CONFIG_NET_ETHERNET is not set
+# CONFIG_NETDEV_1000 is not set
+# CONFIG_NETDEV_10000 is not set
+# CONFIG_WLAN is not set
+
+#
+# Enable WiMAX (Networking options) to see the WiMAX drivers
+#
+
+#
+# USB Network Adapters
+#
+# CONFIG_USB_CATC is not set
+# CONFIG_USB_KAWETH is not set
+# CONFIG_USB_PEGASUS is not set
+# CONFIG_USB_RTL8150 is not set
+# CONFIG_USB_USBNET is not set
+# CONFIG_WAN is not set
+CONFIG_IEEE802154_DRIVERS=y
+# CONFIG_IEEE802154_FAKEHARD is not set
+CONFIG_PPP=m
+CONFIG_PPP_MULTILINK=y
+CONFIG_PPP_FILTER=y
+CONFIG_PPP_ASYNC=m
+CONFIG_PPP_SYNC_TTY=m
+CONFIG_PPP_DEFLATE=m
+CONFIG_PPP_BSDCOMP=m
+# CONFIG_PPP_MPPE is not set
+# CONFIG_PPPOE is not set
+# CONFIG_PPPOL2TP is not set
+# CONFIG_SLIP is not set
+CONFIG_SLHC=m
+# CONFIG_NETCONSOLE is not set
+# CONFIG_NETPOLL is not set
+# CONFIG_NET_POLL_CONTROLLER is not set
+# CONFIG_ISDN is not set
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+# CONFIG_INPUT_FF_MEMLESS is not set
+# CONFIG_INPUT_POLLDEV is not set
+# CONFIG_INPUT_SPARSEKMAP is not set
+
+#
+# Userland interfaces
+#
+# CONFIG_INPUT_MOUSEDEV is not set
+# CONFIG_INPUT_JOYDEV is not set
+CONFIG_INPUT_EVDEV=y
+# CONFIG_INPUT_EVBUG is not set
+# CONFIG_INPUT_APMPOWER is not set
+
+#
+# Input Device Drivers
+#
+CONFIG_INPUT_KEYBOARD=y
+# CONFIG_KEYBOARD_ADP5588 is not set
+# CONFIG_KEYBOARD_ATKBD is not set
+# CONFIG_QT2160 is not set
+# CONFIG_KEYBOARD_LKKBD is not set
+CONFIG_KEYBOARD_GPIO=y
+# CONFIG_KEYBOARD_MATRIX is not set
+# CONFIG_KEYBOARD_LM8323 is not set
+# CONFIG_KEYBOARD_MAX7359 is not set
+# CONFIG_KEYBOARD_NEWTON is not set
+# CONFIG_KEYBOARD_OPENCORES is not set
+CONFIG_KEYBOARD_PXA27x=y
+# CONFIG_KEYBOARD_STOWAWAY is not set
+# CONFIG_KEYBOARD_SUNKBD is not set
+# CONFIG_KEYBOARD_XTKBD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TABLET is not set
+CONFIG_INPUT_TOUCHSCREEN=y
+# CONFIG_TOUCHSCREEN_ADS7846 is not set
+# CONFIG_TOUCHSCREEN_AD7877 is not set
+# CONFIG_TOUCHSCREEN_AD7879_I2C is not set
+# CONFIG_TOUCHSCREEN_AD7879_SPI is not set
+# CONFIG_TOUCHSCREEN_AD7879 is not set
+CONFIG_TOUCHSCREEN_DA9034=y
+# CONFIG_TOUCHSCREEN_DYNAPRO is not set
+# CONFIG_TOUCHSCREEN_EETI is not set
+# CONFIG_TOUCHSCREEN_FUJITSU is not set
+# CONFIG_TOUCHSCREEN_GUNZE is not set
+# CONFIG_TOUCHSCREEN_ELO is not set
+# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set
+# CONFIG_TOUCHSCREEN_MCS5000 is not set
+# CONFIG_TOUCHSCREEN_MTOUCH is not set
+# CONFIG_TOUCHSCREEN_INEXIO is not set
+# CONFIG_TOUCHSCREEN_MK712 is not set
+# CONFIG_TOUCHSCREEN_PENMOUNT is not set
+# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set
+# CONFIG_TOUCHSCREEN_TOUCHWIN is not set
+# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set
+# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set
+# CONFIG_TOUCHSCREEN_TSC2007 is not set
+# CONFIG_TOUCHSCREEN_W90X900 is not set
+CONFIG_INPUT_MISC=y
+# CONFIG_INPUT_ATI_REMOTE is not set
+# CONFIG_INPUT_ATI_REMOTE2 is not set
+# CONFIG_INPUT_KEYSPAN_REMOTE is not set
+# CONFIG_INPUT_POWERMATE is not set
+# CONFIG_INPUT_YEALINK is not set
+# CONFIG_INPUT_CM109 is not set
+CONFIG_INPUT_UINPUT=y
+# CONFIG_INPUT_GPIO_ROTARY_ENCODER is not set
+
+#
+# Hardware I/O ports
+#
+# CONFIG_SERIO is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_CONSOLE_TRANSLATIONS=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+# CONFIG_VT_HW_CONSOLE_BINDING is not set
+CONFIG_DEVKMEM=y
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+# CONFIG_SERIAL_8250 is not set
+
+#
+# Non-8250 serial port support
+#
+# CONFIG_SERIAL_MAX3100 is not set
+CONFIG_SERIAL_PXA=y
+CONFIG_SERIAL_PXA_CONSOLE=y
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+CONFIG_UNIX98_PTYS=y
+# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
+CONFIG_LEGACY_PTYS=y
+CONFIG_LEGACY_PTY_COUNT=8
+# CONFIG_IPMI_HANDLER is not set
+# CONFIG_HW_RANDOM is not set
+# CONFIG_R3964 is not set
+# CONFIG_RAW_DRIVER is not set
+# CONFIG_TCG_TPM is not set
+CONFIG_I2C=y
+CONFIG_I2C_BOARDINFO=y
+CONFIG_I2C_COMPAT=y
+CONFIG_I2C_CHARDEV=y
+CONFIG_I2C_HELPER_AUTO=y
+
+#
+# I2C Hardware Bus support
+#
+
+#
+# I2C system bus drivers (mostly embedded / system-on-chip)
+#
+# CONFIG_I2C_DESIGNWARE is not set
+# CONFIG_I2C_GPIO is not set
+# CONFIG_I2C_OCORES is not set
+CONFIG_I2C_PXA=y
+# CONFIG_I2C_PXA_SLAVE is not set
+# CONFIG_I2C_SIMTEC is not set
+
+#
+# External I2C/SMBus adapter drivers
+#
+# CONFIG_I2C_PARPORT_LIGHT is not set
+# CONFIG_I2C_TAOS_EVM is not set
+# CONFIG_I2C_TINY_USB is not set
+
+#
+# Other I2C/SMBus bus drivers
+#
+# CONFIG_I2C_PCA_PLATFORM is not set
+# CONFIG_I2C_STUB is not set
+
+#
+# Miscellaneous I2C Chip support
+#
+# CONFIG_SENSORS_TSL2550 is not set
+# CONFIG_I2C_DEBUG_CORE is not set
+# CONFIG_I2C_DEBUG_ALGO is not set
+# CONFIG_I2C_DEBUG_BUS is not set
+# CONFIG_I2C_DEBUG_CHIP is not set
+CONFIG_SPI=y
+# CONFIG_SPI_DEBUG is not set
+CONFIG_SPI_MASTER=y
+
+#
+# SPI Master Controller Drivers
+#
+# CONFIG_SPI_BITBANG is not set
+# CONFIG_SPI_GPIO is not set
+CONFIG_SPI_PXA2XX=y
+# CONFIG_SPI_XILINX is not set
+# CONFIG_SPI_DESIGNWARE is not set
+
+#
+# SPI Protocol Masters
+#
+# CONFIG_SPI_SPIDEV is not set
+# CONFIG_SPI_TLE62X0 is not set
+
+#
+# PPS support
+#
+# CONFIG_PPS is not set
+CONFIG_ARCH_REQUIRE_GPIOLIB=y
+CONFIG_GPIOLIB=y
+# CONFIG_DEBUG_GPIO is not set
+CONFIG_GPIO_SYSFS=y
+
+#
+# Memory mapped GPIO expanders:
+#
+
+#
+# I2C GPIO expanders:
+#
+# CONFIG_GPIO_MAX732X is not set
+# CONFIG_GPIO_PCA953X is not set
+# CONFIG_GPIO_PCF857X is not set
+# CONFIG_GPIO_ADP5588 is not set
+
+#
+# PCI GPIO expanders:
+#
+
+#
+# SPI GPIO expanders:
+#
+# CONFIG_GPIO_MAX7301 is not set
+# CONFIG_GPIO_MCP23S08 is not set
+# CONFIG_GPIO_MC33880 is not set
+
+#
+# AC97 GPIO expanders:
+#
+# CONFIG_W1 is not set
+CONFIG_POWER_SUPPLY=y
+# CONFIG_POWER_SUPPLY_DEBUG is not set
+# CONFIG_PDA_POWER is not set
+# CONFIG_APM_POWER is not set
+# CONFIG_BATTERY_DS2760 is not set
+# CONFIG_BATTERY_DS2782 is not set
+# CONFIG_BATTERY_BQ27x00 is not set
+# CONFIG_BATTERY_DA9030 is not set
+# CONFIG_BATTERY_MAX17040 is not set
+# CONFIG_HWMON is not set
+# CONFIG_THERMAL is not set
+# CONFIG_WATCHDOG is not set
+CONFIG_SSB_POSSIBLE=y
+
+#
+# Sonics Silicon Backplane
+#
+# CONFIG_SSB is not set
+
+#
+# Multifunction device drivers
+#
+# CONFIG_MFD_CORE is not set
+# CONFIG_MFD_SM501 is not set
+# CONFIG_MFD_ASIC3 is not set
+# CONFIG_HTC_EGPIO is not set
+# CONFIG_HTC_PASIC3 is not set
+# CONFIG_TPS65010 is not set
+# CONFIG_TWL4030_CORE is not set
+# CONFIG_MFD_TMIO is not set
+# CONFIG_MFD_T7L66XB is not set
+# CONFIG_MFD_TC6387XB is not set
+# CONFIG_MFD_TC6393XB is not set
+CONFIG_PMIC_DA903X=y
+# CONFIG_PMIC_ADP5520 is not set
+# CONFIG_MFD_WM8400 is not set
+# CONFIG_MFD_WM831X is not set
+# CONFIG_MFD_WM8350_I2C is not set
+# CONFIG_MFD_PCF50633 is not set
+# CONFIG_MFD_MC13783 is not set
+# CONFIG_AB3100_CORE is not set
+# CONFIG_EZX_PCAP is not set
+# CONFIG_MFD_88PM8607 is not set
+# CONFIG_AB4500_CORE is not set
+CONFIG_REGULATOR=y
+CONFIG_REGULATOR_DEBUG=y
+# CONFIG_REGULATOR_FIXED_VOLTAGE is not set
+CONFIG_REGULATOR_VIRTUAL_CONSUMER=y
+CONFIG_REGULATOR_USERSPACE_CONSUMER=y
+# CONFIG_REGULATOR_BQ24022 is not set
+# CONFIG_REGULATOR_MAX1586 is not set
+# CONFIG_REGULATOR_MAX8660 is not set
+CONFIG_REGULATOR_DA903X=y
+# CONFIG_REGULATOR_LP3971 is not set
+# CONFIG_REGULATOR_TPS65023 is not set
+# CONFIG_REGULATOR_TPS6507X is not set
+CONFIG_MEDIA_SUPPORT=y
+
+#
+# Multimedia core support
+#
+CONFIG_VIDEO_DEV=y
+CONFIG_VIDEO_V4L2_COMMON=y
+CONFIG_VIDEO_ALLOW_V4L1=y
+CONFIG_VIDEO_V4L1_COMPAT=y
+# CONFIG_DVB_CORE is not set
+CONFIG_VIDEO_MEDIA=y
+
+#
+# Multimedia drivers
+#
+CONFIG_IR_CORE=y
+CONFIG_VIDEO_IR=y
+# CONFIG_MEDIA_ATTACH is not set
+CONFIG_MEDIA_TUNER=y
+CONFIG_MEDIA_TUNER_CUSTOMISE=y
+# CONFIG_MEDIA_TUNER_SIMPLE is not set
+# CONFIG_MEDIA_TUNER_TDA8290 is not set
+# CONFIG_MEDIA_TUNER_TDA827X is not set
+# CONFIG_MEDIA_TUNER_TDA18271 is not set
+# CONFIG_MEDIA_TUNER_TDA9887 is not set
+# CONFIG_MEDIA_TUNER_TEA5761 is not set
+# CONFIG_MEDIA_TUNER_TEA5767 is not set
+# CONFIG_MEDIA_TUNER_MT20XX is not set
+# CONFIG_MEDIA_TUNER_MT2060 is not set
+# CONFIG_MEDIA_TUNER_MT2266 is not set
+# CONFIG_MEDIA_TUNER_MT2131 is not set
+# CONFIG_MEDIA_TUNER_QT1010 is not set
+# CONFIG_MEDIA_TUNER_XC2028 is not set
+# CONFIG_MEDIA_TUNER_XC5000 is not set
+# CONFIG_MEDIA_TUNER_MXL5005S is not set
+# CONFIG_MEDIA_TUNER_MXL5007T is not set
+# CONFIG_MEDIA_TUNER_MC44S803 is not set
+CONFIG_MEDIA_TUNER_MAX2165=m
+CONFIG_VIDEO_V4L2=y
+CONFIG_VIDEO_V4L1=y
+CONFIG_VIDEOBUF_GEN=y
+CONFIG_VIDEOBUF_DMA_SG=y
+CONFIG_VIDEO_CAPTURE_DRIVERS=y
+# CONFIG_VIDEO_ADV_DEBUG is not set
+# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set
+# CONFIG_VIDEO_HELPER_CHIPS_AUTO is not set
+CONFIG_VIDEO_IR_I2C=y
+
+#
+# Encoders/decoders and other helper chips
+#
+
+#
+# Audio decoders
+#
+# CONFIG_VIDEO_TVAUDIO is not set
+# CONFIG_VIDEO_TDA7432 is not set
+# CONFIG_VIDEO_TDA9840 is not set
+# CONFIG_VIDEO_TDA9875 is not set
+# CONFIG_VIDEO_TEA6415C is not set
+# CONFIG_VIDEO_TEA6420 is not set
+# CONFIG_VIDEO_MSP3400 is not set
+# CONFIG_VIDEO_CS5345 is not set
+# CONFIG_VIDEO_CS53L32A is not set
+# CONFIG_VIDEO_M52790 is not set
+# CONFIG_VIDEO_TLV320AIC23B is not set
+# CONFIG_VIDEO_WM8775 is not set
+# CONFIG_VIDEO_WM8739 is not set
+# CONFIG_VIDEO_VP27SMPX is not set
+
+#
+# RDS decoders
+#
+# CONFIG_VIDEO_SAA6588 is not set
+
+#
+# Video decoders
+#
+# CONFIG_VIDEO_ADV7180 is not set
+# CONFIG_VIDEO_BT819 is not set
+# CONFIG_VIDEO_BT856 is not set
+# CONFIG_VIDEO_BT866 is not set
+# CONFIG_VIDEO_KS0127 is not set
+# CONFIG_VIDEO_OV7670 is not set
+# CONFIG_VIDEO_MT9V011 is not set
+# CONFIG_VIDEO_TCM825X is not set
+# CONFIG_VIDEO_SAA7110 is not set
+# CONFIG_VIDEO_SAA711X is not set
+# CONFIG_VIDEO_SAA717X is not set
+# CONFIG_VIDEO_SAA7191 is not set
+# CONFIG_VIDEO_TVP514X is not set
+# CONFIG_VIDEO_TVP5150 is not set
+# CONFIG_VIDEO_VPX3220 is not set
+
+#
+# Video and audio decoders
+#
+# CONFIG_VIDEO_CX25840 is not set
+
+#
+# MPEG video encoders
+#
+# CONFIG_VIDEO_CX2341X is not set
+
+#
+# Video encoders
+#
+# CONFIG_VIDEO_SAA7127 is not set
+# CONFIG_VIDEO_SAA7185 is not set
+# CONFIG_VIDEO_ADV7170 is not set
+# CONFIG_VIDEO_ADV7175 is not set
+# CONFIG_VIDEO_THS7303 is not set
+# CONFIG_VIDEO_ADV7343 is not set
+
+#
+# Video improvement chips
+#
+# CONFIG_VIDEO_UPD64031A is not set
+# CONFIG_VIDEO_UPD64083 is not set
+# CONFIG_VIDEO_VIVI is not set
+# CONFIG_VIDEO_CPIA is not set
+# CONFIG_VIDEO_CPIA2 is not set
+# CONFIG_VIDEO_SAA5246A is not set
+# CONFIG_VIDEO_SAA5249 is not set
+CONFIG_SOC_CAMERA=y
+# CONFIG_SOC_CAMERA_MT9M001 is not set
+CONFIG_SOC_CAMERA_MT9M111=y
+# CONFIG_SOC_CAMERA_MT9T031 is not set
+# CONFIG_SOC_CAMERA_MT9T112 is not set
+# CONFIG_SOC_CAMERA_MT9V022 is not set
+# CONFIG_SOC_CAMERA_RJ54N1 is not set
+# CONFIG_SOC_CAMERA_TW9910 is not set
+# CONFIG_SOC_CAMERA_PLATFORM is not set
+# CONFIG_SOC_CAMERA_OV772X is not set
+# CONFIG_SOC_CAMERA_OV9640 is not set
+CONFIG_VIDEO_PXA27x=y
+# CONFIG_VIDEO_SH_MOBILE_CEU is not set
+# CONFIG_V4L_USB_DRIVERS is not set
+CONFIG_RADIO_ADAPTERS=y
+# CONFIG_I2C_SI4713 is not set
+# CONFIG_RADIO_SI4713 is not set
+# CONFIG_USB_DSBR is not set
+# CONFIG_RADIO_SI470X is not set
+# CONFIG_USB_MR800 is not set
+CONFIG_RADIO_TEA5764=y
+CONFIG_RADIO_TEA5764_XTAL=y
+# CONFIG_RADIO_TEF6862 is not set
+# CONFIG_DAB is not set
+
+#
+# Graphics support
+#
+# CONFIG_VGASTATE is not set
+# CONFIG_VIDEO_OUTPUT_CONTROL is not set
+CONFIG_FB=y
+# CONFIG_FIRMWARE_EDID is not set
+# CONFIG_FB_DDC is not set
+# CONFIG_FB_BOOT_VESA_SUPPORT is not set
+CONFIG_FB_CFB_FILLRECT=y
+CONFIG_FB_CFB_COPYAREA=y
+CONFIG_FB_CFB_IMAGEBLIT=y
+# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
+# CONFIG_FB_SYS_FILLRECT is not set
+# CONFIG_FB_SYS_COPYAREA is not set
+# CONFIG_FB_SYS_IMAGEBLIT is not set
+# CONFIG_FB_FOREIGN_ENDIAN is not set
+# CONFIG_FB_SYS_FOPS is not set
+# CONFIG_FB_SVGALIB is not set
+# CONFIG_FB_MACMODES is not set
+# CONFIG_FB_BACKLIGHT is not set
+# CONFIG_FB_MODE_HELPERS is not set
+# CONFIG_FB_TILEBLITTING is not set
+
+#
+# Frame buffer hardware drivers
+#
+# CONFIG_FB_UVESA is not set
+# CONFIG_FB_S1D13XXX is not set
+CONFIG_FB_PXA=y
+CONFIG_FB_PXA_OVERLAY=y
+# CONFIG_FB_PXA_SMARTPANEL is not set
+CONFIG_FB_PXA_PARAMETERS=y
+# CONFIG_FB_MBX is not set
+# CONFIG_FB_W100 is not set
+# CONFIG_FB_VIRTUAL is not set
+# CONFIG_FB_METRONOME is not set
+# CONFIG_FB_MB862XX is not set
+# CONFIG_FB_BROADSHEET is not set
+CONFIG_BACKLIGHT_LCD_SUPPORT=y
+# CONFIG_LCD_CLASS_DEVICE is not set
+CONFIG_BACKLIGHT_CLASS_DEVICE=y
+CONFIG_BACKLIGHT_GENERIC=y
+# CONFIG_BACKLIGHT_DA903X is not set
+
+#
+# Display device support
+#
+# CONFIG_DISPLAY_SUPPORT is not set
+
+#
+# Console display driver support
+#
+# CONFIG_VGA_CONSOLE is not set
+CONFIG_DUMMY_CONSOLE=y
+CONFIG_FRAMEBUFFER_CONSOLE=y
+# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set
+# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
+CONFIG_FONTS=y
+# CONFIG_FONT_8x8 is not set
+# CONFIG_FONT_8x16 is not set
+# CONFIG_FONT_6x11 is not set
+# CONFIG_FONT_7x14 is not set
+# CONFIG_FONT_PEARL_8x8 is not set
+# CONFIG_FONT_ACORN_8x8 is not set
+CONFIG_FONT_MINI_4x6=y
+# CONFIG_FONT_SUN8x16 is not set
+# CONFIG_FONT_SUN12x22 is not set
+# CONFIG_FONT_10x18 is not set
+# CONFIG_LOGO is not set
+CONFIG_SOUND=y
+CONFIG_SOUND_OSS_CORE=y
+CONFIG_SOUND_OSS_CORE_PRECLAIM=y
+CONFIG_SND=y
+CONFIG_SND_TIMER=y
+CONFIG_SND_PCM=y
+CONFIG_SND_JACK=y
+# CONFIG_SND_SEQUENCER is not set
+CONFIG_SND_OSSEMUL=y
+CONFIG_SND_MIXER_OSS=y
+CONFIG_SND_PCM_OSS=y
+CONFIG_SND_PCM_OSS_PLUGINS=y
+# CONFIG_SND_HRTIMER is not set
+# CONFIG_SND_DYNAMIC_MINORS is not set
+CONFIG_SND_SUPPORT_OLD_API=y
+CONFIG_SND_VERBOSE_PROCFS=y
+# CONFIG_SND_VERBOSE_PRINTK is not set
+# CONFIG_SND_DEBUG is not set
+# CONFIG_SND_RAWMIDI_SEQ is not set
+# CONFIG_SND_OPL3_LIB_SEQ is not set
+# CONFIG_SND_OPL4_LIB_SEQ is not set
+# CONFIG_SND_SBAWE_SEQ is not set
+# CONFIG_SND_EMU10K1_SEQ is not set
+# CONFIG_SND_DRIVERS is not set
+# CONFIG_SND_ARM is not set
+CONFIG_SND_PXA2XX_LIB=y
+# CONFIG_SND_SPI is not set
+# CONFIG_SND_USB is not set
+CONFIG_SND_SOC=y
+CONFIG_SND_PXA2XX_SOC=y
+# CONFIG_SND_PXA2XX_SOC_IMOTE2 is not set
+CONFIG_SND_SOC_I2C_AND_SPI=y
+# CONFIG_SND_SOC_ALL_CODECS is not set
+# CONFIG_SOUND_PRIME is not set
+CONFIG_HID_SUPPORT=y
+CONFIG_HID=y
+# CONFIG_HIDRAW is not set
+
+#
+# USB Input Devices
+#
+# CONFIG_USB_HID is not set
+# CONFIG_HID_PID is not set
+
+#
+# USB HID Boot Protocol drivers
+#
+# CONFIG_USB_KBD is not set
+# CONFIG_USB_MOUSE is not set
+
+#
+# Special HID drivers
+#
+CONFIG_HID_APPLE=m
+# CONFIG_HID_WACOM is not set
+CONFIG_USB_SUPPORT=y
+CONFIG_USB_ARCH_HAS_HCD=y
+CONFIG_USB_ARCH_HAS_OHCI=y
+# CONFIG_USB_ARCH_HAS_EHCI is not set
+CONFIG_USB=y
+# CONFIG_USB_DEBUG is not set
+# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set
+
+#
+# Miscellaneous USB options
+#
+# CONFIG_USB_DEVICEFS is not set
+# CONFIG_USB_DEVICE_CLASS is not set
+# CONFIG_USB_DYNAMIC_MINORS is not set
+# CONFIG_USB_SUSPEND is not set
+# CONFIG_USB_OTG is not set
+# CONFIG_USB_OTG_WHITELIST is not set
+# CONFIG_USB_OTG_BLACKLIST_HUB is not set
+# CONFIG_USB_MON is not set
+# CONFIG_USB_WUSB is not set
+# CONFIG_USB_WUSB_CBAF is not set
+
+#
+# USB Host Controller Drivers
+#
+# CONFIG_USB_C67X00_HCD is not set
+# CONFIG_USB_OXU210HP_HCD is not set
+# CONFIG_USB_ISP116X_HCD is not set
+# CONFIG_USB_ISP1760_HCD is not set
+# CONFIG_USB_ISP1362_HCD is not set
+CONFIG_USB_OHCI_HCD=y
+# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set
+# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set
+CONFIG_USB_OHCI_LITTLE_ENDIAN=y
+# CONFIG_USB_SL811_HCD is not set
+# CONFIG_USB_R8A66597_HCD is not set
+# CONFIG_USB_HWA_HCD is not set
+# CONFIG_USB_MUSB_HDRC is not set
+# CONFIG_USB_GADGET_MUSB_HDRC is not set
+
+#
+# USB Device Class drivers
+#
+# CONFIG_USB_ACM is not set
+# CONFIG_USB_PRINTER is not set
+# CONFIG_USB_WDM is not set
+# CONFIG_USB_TMC is not set
+
+#
+# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may
+#
+
+#
+# also be needed; see USB_STORAGE Help for more info
+#
+# CONFIG_USB_LIBUSUAL is not set
+
+#
+# USB Imaging devices
+#
+# CONFIG_USB_MDC800 is not set
+
+#
+# USB port drivers
+#
+# CONFIG_USB_SERIAL is not set
+
+#
+# USB Miscellaneous drivers
+#
+# CONFIG_USB_EMI62 is not set
+# CONFIG_USB_EMI26 is not set
+# CONFIG_USB_ADUTUX is not set
+# CONFIG_USB_SEVSEG is not set
+# CONFIG_USB_RIO500 is not set
+# CONFIG_USB_LEGOTOWER is not set
+# CONFIG_USB_LCD is not set
+# CONFIG_USB_BERRY_CHARGE is not set
+# CONFIG_USB_LED is not set
+# CONFIG_USB_CYPRESS_CY7C63 is not set
+# CONFIG_USB_CYTHERM is not set
+# CONFIG_USB_IDMOUSE is not set
+# CONFIG_USB_FTDI_ELAN is not set
+# CONFIG_USB_APPLEDISPLAY is not set
+# CONFIG_USB_LD is not set
+# CONFIG_USB_TRANCEVIBRATOR is not set
+# CONFIG_USB_IOWARRIOR is not set
+# CONFIG_USB_TEST is not set
+# CONFIG_USB_ISIGHTFW is not set
+# CONFIG_USB_VST is not set
+CONFIG_USB_GADGET=y
+# CONFIG_USB_GADGET_DEBUG is not set
+# CONFIG_USB_GADGET_DEBUG_FILES is not set
+# CONFIG_USB_GADGET_DEBUG_FS is not set
+CONFIG_USB_GADGET_VBUS_DRAW=2
+CONFIG_USB_GADGET_SELECTED=y
+# CONFIG_USB_GADGET_AT91 is not set
+# CONFIG_USB_GADGET_ATMEL_USBA is not set
+# CONFIG_USB_GADGET_FSL_USB2 is not set
+# CONFIG_USB_GADGET_LH7A40X is not set
+# CONFIG_USB_GADGET_OMAP is not set
+# CONFIG_USB_GADGET_PXA25X is not set
+# CONFIG_USB_GADGET_R8A66597 is not set
+CONFIG_USB_GADGET_PXA27X=y
+CONFIG_USB_PXA27X=y
+# CONFIG_USB_GADGET_S3C_HSOTG is not set
+# CONFIG_USB_GADGET_IMX is not set
+# CONFIG_USB_GADGET_S3C2410 is not set
+# CONFIG_USB_GADGET_M66592 is not set
+# CONFIG_USB_GADGET_AMD5536UDC is not set
+# CONFIG_USB_GADGET_FSL_QE is not set
+# CONFIG_USB_GADGET_CI13XXX is not set
+# CONFIG_USB_GADGET_NET2280 is not set
+# CONFIG_USB_GADGET_GOKU is not set
+# CONFIG_USB_GADGET_LANGWELL is not set
+# CONFIG_USB_GADGET_DUMMY_HCD is not set
+# CONFIG_USB_GADGET_DUALSPEED is not set
+# CONFIG_USB_ZERO is not set
+# CONFIG_USB_AUDIO is not set
+CONFIG_USB_ETH=y
+# CONFIG_USB_ETH_RNDIS is not set
+# CONFIG_USB_ETH_EEM is not set
+# CONFIG_USB_GADGETFS is not set
+# CONFIG_USB_FILE_STORAGE is not set
+# CONFIG_USB_MASS_STORAGE is not set
+# CONFIG_USB_G_SERIAL is not set
+# CONFIG_USB_MIDI_GADGET is not set
+# CONFIG_USB_G_PRINTER is not set
+# CONFIG_USB_CDC_COMPOSITE is not set
+# CONFIG_USB_G_MULTI is not set
+
+#
+# OTG and related infrastructure
+#
+CONFIG_USB_OTG_UTILS=y
+# CONFIG_USB_GPIO_VBUS is not set
+# CONFIG_USB_ULPI is not set
+# CONFIG_NOP_USB_XCEIV is not set
+CONFIG_MMC=y
+# CONFIG_MMC_DEBUG is not set
+CONFIG_MMC_UNSAFE_RESUME=y
+
+#
+# MMC/SD/SDIO Card Drivers
+#
+CONFIG_MMC_BLOCK=y
+CONFIG_MMC_BLOCK_BOUNCE=y
+CONFIG_SDIO_UART=m
+# CONFIG_MMC_TEST is not set
+
+#
+# MMC/SD/SDIO Host Controller Drivers
+#
+CONFIG_MMC_PXA=y
+# CONFIG_MMC_SDHCI is not set
+# CONFIG_MMC_AT91 is not set
+# CONFIG_MMC_ATMELMCI is not set
+CONFIG_MMC_SPI=y
+# CONFIG_MEMSTICK is not set
+CONFIG_NEW_LEDS=y
+CONFIG_LEDS_CLASS=y
+
+#
+# LED drivers
+#
+# CONFIG_LEDS_PCA9532 is not set
+# CONFIG_LEDS_GPIO is not set
+CONFIG_LEDS_LP3944=y
+# CONFIG_LEDS_PCA955X is not set
+# CONFIG_LEDS_DA903X is not set
+# CONFIG_LEDS_DAC124S085 is not set
+# CONFIG_LEDS_REGULATOR is not set
+# CONFIG_LEDS_BD2802 is not set
+# CONFIG_LEDS_LT3593 is not set
+
+#
+# LED Triggers
+#
+CONFIG_LEDS_TRIGGERS=y
+CONFIG_LEDS_TRIGGER_TIMER=y
+CONFIG_LEDS_TRIGGER_HEARTBEAT=y
+CONFIG_LEDS_TRIGGER_BACKLIGHT=y
+CONFIG_LEDS_TRIGGER_GPIO=y
+CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
+
+#
+# iptables trigger is under Netfilter config (LED target)
+#
+# CONFIG_ACCESSIBILITY is not set
+CONFIG_RTC_LIB=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_HCTOSYS=y
+CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
+# CONFIG_RTC_DEBUG is not set
+
+#
+# RTC interfaces
+#
+CONFIG_RTC_INTF_SYSFS=y
+CONFIG_RTC_INTF_PROC=y
+CONFIG_RTC_INTF_DEV=y
+# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
+# CONFIG_RTC_DRV_TEST is not set
+
+#
+# I2C RTC drivers
+#
+# CONFIG_RTC_DRV_DS1307 is not set
+# CONFIG_RTC_DRV_DS1374 is not set
+# CONFIG_RTC_DRV_DS1672 is not set
+# CONFIG_RTC_DRV_MAX6900 is not set
+# CONFIG_RTC_DRV_RS5C372 is not set
+# CONFIG_RTC_DRV_ISL1208 is not set
+# CONFIG_RTC_DRV_X1205 is not set
+# CONFIG_RTC_DRV_PCF8563 is not set
+# CONFIG_RTC_DRV_PCF8583 is not set
+# CONFIG_RTC_DRV_M41T80 is not set
+# CONFIG_RTC_DRV_BQ32K is not set
+# CONFIG_RTC_DRV_S35390A is not set
+# CONFIG_RTC_DRV_FM3130 is not set
+# CONFIG_RTC_DRV_RX8581 is not set
+# CONFIG_RTC_DRV_RX8025 is not set
+
+#
+# SPI RTC drivers
+#
+# CONFIG_RTC_DRV_M41T94 is not set
+# CONFIG_RTC_DRV_DS1305 is not set
+# CONFIG_RTC_DRV_DS1390 is not set
+# CONFIG_RTC_DRV_MAX6902 is not set
+# CONFIG_RTC_DRV_R9701 is not set
+# CONFIG_RTC_DRV_RS5C348 is not set
+# CONFIG_RTC_DRV_DS3234 is not set
+# CONFIG_RTC_DRV_PCF2123 is not set
+
+#
+# Platform RTC drivers
+#
+# CONFIG_RTC_DRV_CMOS is not set
+# CONFIG_RTC_DRV_DS1286 is not set
+# CONFIG_RTC_DRV_DS1511 is not set
+# CONFIG_RTC_DRV_DS1553 is not set
+# CONFIG_RTC_DRV_DS1742 is not set
+# CONFIG_RTC_DRV_STK17TA8 is not set
+# CONFIG_RTC_DRV_M48T86 is not set
+# CONFIG_RTC_DRV_M48T35 is not set
+# CONFIG_RTC_DRV_M48T59 is not set
+# CONFIG_RTC_DRV_MSM6242 is not set
+# CONFIG_RTC_DRV_BQ4802 is not set
+# CONFIG_RTC_DRV_RP5C01 is not set
+# CONFIG_RTC_DRV_V3020 is not set
+
+#
+# on-CPU RTC drivers
+#
+# CONFIG_RTC_DRV_SA1100 is not set
+# CONFIG_RTC_DRV_PXA is not set
+# CONFIG_DMADEVICES is not set
+# CONFIG_AUXDISPLAY is not set
+# CONFIG_UIO is not set
+
+#
+# TI VLYNQ
+#
+# CONFIG_STAGING is not set
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+# CONFIG_EXT2_FS_XATTR is not set
+# CONFIG_EXT2_FS_XIP is not set
+CONFIG_EXT3_FS=m
+# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
+CONFIG_EXT3_FS_XATTR=y
+# CONFIG_EXT3_FS_POSIX_ACL is not set
+# CONFIG_EXT3_FS_SECURITY is not set
+# CONFIG_EXT4_FS is not set
+CONFIG_JBD=m
+# CONFIG_JBD_DEBUG is not set
+CONFIG_FS_MBCACHE=m
+CONFIG_REISERFS_FS=m
+# CONFIG_REISERFS_CHECK is not set
+# CONFIG_REISERFS_PROC_INFO is not set
+CONFIG_REISERFS_FS_XATTR=y
+CONFIG_REISERFS_FS_POSIX_ACL=y
+CONFIG_REISERFS_FS_SECURITY=y
+# CONFIG_JFS_FS is not set
+CONFIG_FS_POSIX_ACL=y
+CONFIG_XFS_FS=m
+# CONFIG_XFS_QUOTA is not set
+# CONFIG_XFS_POSIX_ACL is not set
+# CONFIG_XFS_RT is not set
+# CONFIG_XFS_DEBUG is not set
+# CONFIG_OCFS2_FS is not set
+# CONFIG_BTRFS_FS is not set
+# CONFIG_NILFS2_FS is not set
+CONFIG_FILE_LOCKING=y
+CONFIG_FSNOTIFY=y
+CONFIG_DNOTIFY=y
+CONFIG_INOTIFY=y
+CONFIG_INOTIFY_USER=y
+# CONFIG_QUOTA is not set
+CONFIG_AUTOFS_FS=y
+CONFIG_AUTOFS4_FS=y
+CONFIG_FUSE_FS=m
+CONFIG_CUSE=m
+
+#
+# Caches
+#
+# CONFIG_FSCACHE is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+CONFIG_ISO9660_FS=m
+CONFIG_JOLIET=y
+CONFIG_ZISOFS=y
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+CONFIG_FAT_FS=m
+CONFIG_MSDOS_FS=m
+CONFIG_VFAT_FS=m
+CONFIG_FAT_DEFAULT_CODEPAGE=437
+CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_SYSCTL=y
+CONFIG_PROC_PAGE_MONITOR=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+# CONFIG_TMPFS_POSIX_ACL is not set
+# CONFIG_HUGETLB_PAGE is not set
+# CONFIG_CONFIGFS_FS is not set
+CONFIG_MISC_FILESYSTEMS=y
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+CONFIG_JFFS2_FS=m
+CONFIG_JFFS2_FS_DEBUG=0
+CONFIG_JFFS2_FS_WRITEBUFFER=y
+# CONFIG_JFFS2_FS_WBUF_VERIFY is not set
+# CONFIG_JFFS2_SUMMARY is not set
+# CONFIG_JFFS2_FS_XATTR is not set
+CONFIG_JFFS2_COMPRESSION_OPTIONS=y
+CONFIG_JFFS2_ZLIB=y
+CONFIG_JFFS2_LZO=y
+CONFIG_JFFS2_RTIME=y
+CONFIG_JFFS2_RUBIN=y
+# CONFIG_JFFS2_CMODE_NONE is not set
+CONFIG_JFFS2_CMODE_PRIORITY=y
+# CONFIG_JFFS2_CMODE_SIZE is not set
+# CONFIG_JFFS2_CMODE_FAVOURLZO is not set
+CONFIG_CRAMFS=m
+CONFIG_SQUASHFS=m
+# CONFIG_SQUASHFS_EMBEDDED is not set
+CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3
+# CONFIG_VXFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_OMFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+CONFIG_ROMFS_FS=m
+CONFIG_ROMFS_BACKED_BY_BLOCK=y
+# CONFIG_ROMFS_BACKED_BY_MTD is not set
+# CONFIG_ROMFS_BACKED_BY_BOTH is not set
+CONFIG_ROMFS_ON_BLOCK=y
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+CONFIG_NETWORK_FILESYSTEMS=y
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3=y
+CONFIG_NFS_V3_ACL=y
+# CONFIG_NFS_V4 is not set
+# CONFIG_ROOT_NFS is not set
+CONFIG_NFSD=m
+CONFIG_NFSD_V2_ACL=y
+CONFIG_NFSD_V3=y
+CONFIG_NFSD_V3_ACL=y
+# CONFIG_NFSD_V4 is not set
+CONFIG_LOCKD=y
+CONFIG_LOCKD_V4=y
+CONFIG_EXPORTFS=m
+CONFIG_NFS_ACL_SUPPORT=y
+CONFIG_NFS_COMMON=y
+CONFIG_SUNRPC=y
+# CONFIG_RPCSEC_GSS_KRB5 is not set
+# CONFIG_RPCSEC_GSS_SPKM3 is not set
+CONFIG_SMB_FS=m
+# CONFIG_SMB_NLS_DEFAULT is not set
+CONFIG_CIFS=m
+CONFIG_CIFS_STATS=y
+# CONFIG_CIFS_STATS2 is not set
+CONFIG_CIFS_WEAK_PW_HASH=y
+CONFIG_CIFS_XATTR=y
+CONFIG_CIFS_POSIX=y
+# CONFIG_CIFS_DEBUG2 is not set
+# CONFIG_CIFS_EXPERIMENTAL is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_AFS_FS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+CONFIG_NLS=y
+CONFIG_NLS_DEFAULT="iso8859-1"
+CONFIG_NLS_CODEPAGE_437=m
+CONFIG_NLS_CODEPAGE_737=m
+CONFIG_NLS_CODEPAGE_775=m
+CONFIG_NLS_CODEPAGE_850=m
+CONFIG_NLS_CODEPAGE_852=m
+CONFIG_NLS_CODEPAGE_855=m
+CONFIG_NLS_CODEPAGE_857=m
+CONFIG_NLS_CODEPAGE_860=m
+CONFIG_NLS_CODEPAGE_861=m
+CONFIG_NLS_CODEPAGE_862=m
+CONFIG_NLS_CODEPAGE_863=m
+CONFIG_NLS_CODEPAGE_864=m
+CONFIG_NLS_CODEPAGE_865=m
+CONFIG_NLS_CODEPAGE_866=m
+CONFIG_NLS_CODEPAGE_869=m
+CONFIG_NLS_CODEPAGE_936=m
+CONFIG_NLS_CODEPAGE_950=m
+CONFIG_NLS_CODEPAGE_932=m
+CONFIG_NLS_CODEPAGE_949=m
+CONFIG_NLS_CODEPAGE_874=m
+CONFIG_NLS_ISO8859_8=m
+CONFIG_NLS_CODEPAGE_1250=m
+CONFIG_NLS_CODEPAGE_1251=m
+CONFIG_NLS_ASCII=m
+CONFIG_NLS_ISO8859_1=m
+CONFIG_NLS_ISO8859_2=m
+CONFIG_NLS_ISO8859_3=m
+CONFIG_NLS_ISO8859_4=m
+CONFIG_NLS_ISO8859_5=m
+CONFIG_NLS_ISO8859_6=m
+CONFIG_NLS_ISO8859_7=m
+CONFIG_NLS_ISO8859_9=m
+CONFIG_NLS_ISO8859_13=m
+CONFIG_NLS_ISO8859_14=m
+CONFIG_NLS_ISO8859_15=m
+CONFIG_NLS_KOI8_R=m
+CONFIG_NLS_KOI8_U=m
+CONFIG_NLS_UTF8=m
+# CONFIG_DLM is not set
+
+#
+# Kernel hacking
+#
+CONFIG_PRINTK_TIME=y
+CONFIG_ENABLE_WARN_DEPRECATED=y
+CONFIG_ENABLE_MUST_CHECK=y
+CONFIG_FRAME_WARN=1024
+# CONFIG_MAGIC_SYSRQ is not set
+# CONFIG_STRIP_ASM_SYMS is not set
+# CONFIG_UNUSED_SYMBOLS is not set
+CONFIG_DEBUG_FS=y
+# CONFIG_HEADERS_CHECK is not set
+CONFIG_DEBUG_KERNEL=y
+# CONFIG_DEBUG_SHIRQ is not set
+CONFIG_DETECT_SOFTLOCKUP=y
+# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
+CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
+CONFIG_DETECT_HUNG_TASK=y
+# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set
+CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0
+# CONFIG_SCHED_DEBUG is not set
+# CONFIG_SCHEDSTATS is not set
+# CONFIG_TIMER_STATS is not set
+# CONFIG_DEBUG_OBJECTS is not set
+# CONFIG_DEBUG_SLAB is not set
+# CONFIG_DEBUG_KMEMLEAK is not set
+CONFIG_DEBUG_PREEMPT=y
+CONFIG_DEBUG_RT_MUTEXES=y
+CONFIG_DEBUG_PI_LIST=y
+# CONFIG_RT_MUTEX_TESTER is not set
+CONFIG_DEBUG_SPINLOCK=y
+CONFIG_DEBUG_MUTEXES=y
+CONFIG_DEBUG_LOCK_ALLOC=y
+CONFIG_PROVE_LOCKING=y
+CONFIG_LOCKDEP=y
+# CONFIG_LOCK_STAT is not set
+# CONFIG_DEBUG_LOCKDEP is not set
+CONFIG_TRACE_IRQFLAGS=y
+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
+CONFIG_STACKTRACE=y
+# CONFIG_DEBUG_KOBJECT is not set
+CONFIG_DEBUG_BUGVERBOSE=y
+# CONFIG_DEBUG_INFO is not set
+# CONFIG_DEBUG_VM is not set
+# CONFIG_DEBUG_WRITECOUNT is not set
+# CONFIG_DEBUG_MEMORY_INIT is not set
+# CONFIG_DEBUG_LIST is not set
+# CONFIG_DEBUG_SG is not set
+# CONFIG_DEBUG_NOTIFIERS is not set
+# CONFIG_DEBUG_CREDENTIALS is not set
+# CONFIG_BOOT_PRINTK_DELAY is not set
+# CONFIG_RCU_TORTURE_TEST is not set
+# CONFIG_RCU_CPU_STALL_DETECTOR is not set
+# CONFIG_BACKTRACE_SELF_TEST is not set
+# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
+# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
+# CONFIG_FAULT_INJECTION is not set
+# CONFIG_LATENCYTOP is not set
+# CONFIG_SYSCTL_SYSCALL_CHECK is not set
+# CONFIG_PAGE_POISONING is not set
+CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_TRACING_SUPPORT=y
+# CONFIG_FTRACE is not set
+# CONFIG_DYNAMIC_DEBUG is not set
+# CONFIG_SAMPLES is not set
+CONFIG_HAVE_ARCH_KGDB=y
+# CONFIG_KGDB is not set
+CONFIG_ARM_UNWIND=y
+CONFIG_DEBUG_USER=y
+CONFIG_DEBUG_ERRORS=y
+# CONFIG_DEBUG_STACK_USAGE is not set
+# CONFIG_DEBUG_LL is not set
+# CONFIG_OC_ETM is not set
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY is not set
+# CONFIG_SECURITYFS is not set
+# CONFIG_DEFAULT_SECURITY_SELINUX is not set
+# CONFIG_DEFAULT_SECURITY_SMACK is not set
+# CONFIG_DEFAULT_SECURITY_TOMOYO is not set
+CONFIG_DEFAULT_SECURITY_DAC=y
+CONFIG_DEFAULT_SECURITY=""
+CONFIG_CRYPTO=y
+
+#
+# Crypto core or helper
+#
+CONFIG_CRYPTO_ALGAPI=m
+CONFIG_CRYPTO_ALGAPI2=m
+CONFIG_CRYPTO_AEAD=m
+CONFIG_CRYPTO_AEAD2=m
+CONFIG_CRYPTO_BLKCIPHER=m
+CONFIG_CRYPTO_BLKCIPHER2=m
+CONFIG_CRYPTO_HASH=m
+CONFIG_CRYPTO_HASH2=m
+CONFIG_CRYPTO_RNG2=m
+CONFIG_CRYPTO_PCOMP=m
+CONFIG_CRYPTO_MANAGER=m
+CONFIG_CRYPTO_MANAGER2=m
+CONFIG_CRYPTO_GF128MUL=m
+CONFIG_CRYPTO_NULL=m
+CONFIG_CRYPTO_WORKQUEUE=m
+CONFIG_CRYPTO_CRYPTD=m
+CONFIG_CRYPTO_AUTHENC=m
+CONFIG_CRYPTO_TEST=m
+
+#
+# Authenticated Encryption with Associated Data
+#
+# CONFIG_CRYPTO_CCM is not set
+# CONFIG_CRYPTO_GCM is not set
+# CONFIG_CRYPTO_SEQIV is not set
+
+#
+# Block modes
+#
+CONFIG_CRYPTO_CBC=m
+# CONFIG_CRYPTO_CTR is not set
+# CONFIG_CRYPTO_CTS is not set
+CONFIG_CRYPTO_ECB=m
+CONFIG_CRYPTO_LRW=m
+CONFIG_CRYPTO_PCBC=m
+CONFIG_CRYPTO_XTS=m
+
+#
+# Hash modes
+#
+CONFIG_CRYPTO_HMAC=m
+CONFIG_CRYPTO_XCBC=m
+CONFIG_CRYPTO_VMAC=m
+
+#
+# Digest
+#
+CONFIG_CRYPTO_CRC32C=m
+CONFIG_CRYPTO_GHASH=m
+CONFIG_CRYPTO_MD4=m
+CONFIG_CRYPTO_MD5=m
+CONFIG_CRYPTO_MICHAEL_MIC=m
+# CONFIG_CRYPTO_RMD128 is not set
+# CONFIG_CRYPTO_RMD160 is not set
+# CONFIG_CRYPTO_RMD256 is not set
+# CONFIG_CRYPTO_RMD320 is not set
+CONFIG_CRYPTO_SHA1=m
+CONFIG_CRYPTO_SHA256=m
+CONFIG_CRYPTO_SHA512=m
+CONFIG_CRYPTO_TGR192=m
+# CONFIG_CRYPTO_WP512 is not set
+
+#
+# Ciphers
+#
+CONFIG_CRYPTO_AES=m
+# CONFIG_CRYPTO_ANUBIS is not set
+CONFIG_CRYPTO_ARC4=m
+CONFIG_CRYPTO_BLOWFISH=m
+# CONFIG_CRYPTO_CAMELLIA is not set
+CONFIG_CRYPTO_CAST5=m
+CONFIG_CRYPTO_CAST6=m
+CONFIG_CRYPTO_DES=m
+CONFIG_CRYPTO_FCRYPT=m
+CONFIG_CRYPTO_KHAZAD=m
+# CONFIG_CRYPTO_SALSA20 is not set
+CONFIG_CRYPTO_SEED=m
+CONFIG_CRYPTO_SERPENT=m
+CONFIG_CRYPTO_TEA=m
+CONFIG_CRYPTO_TWOFISH=m
+CONFIG_CRYPTO_TWOFISH_COMMON=m
+
+#
+# Compression
+#
+CONFIG_CRYPTO_DEFLATE=m
+# CONFIG_CRYPTO_ZLIB is not set
+# CONFIG_CRYPTO_LZO is not set
+
+#
+# Random Number Generation
+#
+# CONFIG_CRYPTO_ANSI_CPRNG is not set
+CONFIG_CRYPTO_HW=y
+# CONFIG_BINARY_PRINTF is not set
+
+#
+# Library routines
+#
+CONFIG_BITREVERSE=y
+CONFIG_GENERIC_FIND_LAST_BIT=y
+CONFIG_CRC_CCITT=m
+CONFIG_CRC16=y
+# CONFIG_CRC_T10DIF is not set
+CONFIG_CRC_ITU_T=y
+CONFIG_CRC32=y
+CONFIG_CRC7=y
+CONFIG_LIBCRC32C=m
+CONFIG_ZLIB_INFLATE=y
+CONFIG_ZLIB_DEFLATE=m
+CONFIG_LZO_COMPRESS=m
+CONFIG_LZO_DECOMPRESS=m
+CONFIG_DECOMPRESS_GZIP=y
+CONFIG_DECOMPRESS_BZIP2=y
+CONFIG_DECOMPRESS_LZMA=y
+CONFIG_TEXTSEARCH=y
+CONFIG_TEXTSEARCH_KMP=m
+CONFIG_TEXTSEARCH_BM=m
+CONFIG_TEXTSEARCH_FSM=m
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAS_DMA=y
+CONFIG_NLATTR=y
diff --git a/arch/arm/configs/kirkwood_defconfig b/arch/arm/configs/kirkwood_defconfig
index 5fc44c94b0ad..4611d3ce451a 100644
--- a/arch/arm/configs/kirkwood_defconfig
+++ b/arch/arm/configs/kirkwood_defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.32-rc6
-# Sat Nov  7 20:31:18 2009
+# Linux kernel version: 2.6.33-rc6
+# Thu Feb  4 23:08:54 2010
 #
 CONFIG_ARM=y
 CONFIG_SYS_SUPPORTS_APM_EMULATION=y
@@ -32,6 +32,12 @@ CONFIG_LOCK_KERNEL=y
 CONFIG_INIT_ENV_ARG_LIMIT=32
 CONFIG_LOCALVERSION=""
 CONFIG_LOCALVERSION_AUTO=y
+CONFIG_HAVE_KERNEL_GZIP=y
+CONFIG_HAVE_KERNEL_LZO=y
+CONFIG_KERNEL_GZIP=y
+# CONFIG_KERNEL_BZIP2 is not set
+# CONFIG_KERNEL_LZMA is not set
+# CONFIG_KERNEL_LZO is not set
 CONFIG_SWAP=y
 CONFIG_SYSVIPC=y
 CONFIG_SYSVIPC_SYSCTL=y
@@ -45,6 +51,7 @@ CONFIG_SYSVIPC_SYSCTL=y
 #
 CONFIG_TREE_RCU=y
 # CONFIG_TREE_PREEMPT_RCU is not set
+# CONFIG_TINY_RCU is not set
 # CONFIG_RCU_TRACE is not set
 CONFIG_RCU_FANOUT=32
 # CONFIG_RCU_FANOUT_EXACT is not set
@@ -127,14 +134,41 @@ CONFIG_LBDAF=y
 # IO Schedulers
 #
 CONFIG_IOSCHED_NOOP=y
-CONFIG_IOSCHED_AS=y
 CONFIG_IOSCHED_DEADLINE=y
 CONFIG_IOSCHED_CFQ=y
-# CONFIG_DEFAULT_AS is not set
 # CONFIG_DEFAULT_DEADLINE is not set
 CONFIG_DEFAULT_CFQ=y
 # CONFIG_DEFAULT_NOOP is not set
 CONFIG_DEFAULT_IOSCHED="cfq"
+# CONFIG_INLINE_SPIN_TRYLOCK is not set
+# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set
+# CONFIG_INLINE_SPIN_LOCK is not set
+# CONFIG_INLINE_SPIN_LOCK_BH is not set
+# CONFIG_INLINE_SPIN_LOCK_IRQ is not set
+# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set
+# CONFIG_INLINE_SPIN_UNLOCK is not set
+# CONFIG_INLINE_SPIN_UNLOCK_BH is not set
+# CONFIG_INLINE_SPIN_UNLOCK_IRQ is not set
+# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set
+# CONFIG_INLINE_READ_TRYLOCK is not set
+# CONFIG_INLINE_READ_LOCK is not set
+# CONFIG_INLINE_READ_LOCK_BH is not set
+# CONFIG_INLINE_READ_LOCK_IRQ is not set
+# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set
+# CONFIG_INLINE_READ_UNLOCK is not set
+# CONFIG_INLINE_READ_UNLOCK_BH is not set
+# CONFIG_INLINE_READ_UNLOCK_IRQ is not set
+# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set
+# CONFIG_INLINE_WRITE_TRYLOCK is not set
+# CONFIG_INLINE_WRITE_LOCK is not set
+# CONFIG_INLINE_WRITE_LOCK_BH is not set
+# CONFIG_INLINE_WRITE_LOCK_IRQ is not set
+# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set
+# CONFIG_INLINE_WRITE_UNLOCK is not set
+# CONFIG_INLINE_WRITE_UNLOCK_BH is not set
+# CONFIG_INLINE_WRITE_UNLOCK_IRQ is not set
+# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set
+# CONFIG_MUTEX_SPIN_ON_OWNER is not set
 # CONFIG_FREEZER is not set
 
 #
@@ -163,6 +197,7 @@ CONFIG_MMU=y
 # CONFIG_ARCH_IXP2000 is not set
 # CONFIG_ARCH_IXP4XX is not set
 # CONFIG_ARCH_L7200 is not set
+# CONFIG_ARCH_DOVE is not set
 CONFIG_ARCH_KIRKWOOD=y
 # CONFIG_ARCH_LOKI is not set
 # CONFIG_ARCH_MV78XX0 is not set
@@ -185,6 +220,7 @@ CONFIG_ARCH_KIRKWOOD=y
 # CONFIG_ARCH_DAVINCI is not set
 # CONFIG_ARCH_OMAP is not set
 # CONFIG_ARCH_BCMRING is not set
+# CONFIG_ARCH_U8500 is not set
 
 #
 # Marvell Kirkwood Implementations
@@ -195,7 +231,11 @@ CONFIG_MACH_RD88F6281=y
 CONFIG_MACH_MV88F6281GTW_GE=y
 CONFIG_MACH_SHEEVAPLUG=y
 CONFIG_MACH_TS219=y
+CONFIG_MACH_TS41X=y
+CONFIG_MACH_OPENRD=y
 CONFIG_MACH_OPENRD_BASE=y
+CONFIG_MACH_OPENRD_CLIENT=y
+CONFIG_MACH_NETSPACE_V2=y
 CONFIG_PLAT_ORION=y
 
 #
@@ -262,12 +302,10 @@ CONFIG_FLATMEM_MANUAL=y
 CONFIG_FLATMEM=y
 CONFIG_FLAT_NODE_MEM_MAP=y
 CONFIG_PAGEFLAGS_EXTENDED=y
-CONFIG_SPLIT_PTLOCK_CPUS=4096
+CONFIG_SPLIT_PTLOCK_CPUS=999999
 # CONFIG_PHYS_ADDR_T_64BIT is not set
 CONFIG_ZONE_DMA_FLAG=0
 CONFIG_VIRT_TO_BUS=y
-CONFIG_HAVE_MLOCK=y
-CONFIG_HAVE_MLOCKED_PAGE_BIT=y
 # CONFIG_KSM is not set
 CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
 CONFIG_ALIGNMENT_TRAP=y
@@ -398,15 +436,18 @@ CONFIG_NET_PKTGEN=m
 # CONFIG_BT is not set
 # CONFIG_AF_RXRPC is not set
 CONFIG_WIRELESS=y
+CONFIG_WIRELESS_EXT=y
+CONFIG_WEXT_CORE=y
+CONFIG_WEXT_PROC=y
+CONFIG_WEXT_SPY=y
 CONFIG_CFG80211=y
 # CONFIG_NL80211_TESTMODE is not set
 # CONFIG_CFG80211_DEVELOPER_WARNINGS is not set
 # CONFIG_CFG80211_REG_DEBUG is not set
 CONFIG_CFG80211_DEFAULT_PS=y
-CONFIG_CFG80211_DEFAULT_PS_VALUE=1
 # CONFIG_CFG80211_DEBUGFS is not set
 CONFIG_WIRELESS_OLD_REGULATORY=y
-CONFIG_WIRELESS_EXT=y
+CONFIG_CFG80211_WEXT=y
 CONFIG_WIRELESS_EXT_SYSFS=y
 CONFIG_LIB80211=y
 # CONFIG_LIB80211_DEBUG is not set
@@ -556,6 +597,10 @@ CONFIG_BLK_DEV=y
 # CONFIG_BLK_DEV_COW_COMMON is not set
 CONFIG_BLK_DEV_LOOP=y
 # CONFIG_BLK_DEV_CRYPTOLOOP is not set
+
+#
+# DRBD disabled because PROC_FS, INET or CONNECTOR not selected
+#
 # CONFIG_BLK_DEV_NBD is not set
 # CONFIG_BLK_DEV_SX8 is not set
 # CONFIG_BLK_DEV_UB is not set
@@ -606,7 +651,9 @@ CONFIG_SCSI_LOWLEVEL=y
 # CONFIG_SCSI_BNX2_ISCSI is not set
 # CONFIG_BE2ISCSI is not set
 # CONFIG_BLK_DEV_3W_XXXX_RAID is not set
+# CONFIG_SCSI_HPSA is not set
 # CONFIG_SCSI_3W_9XXX is not set
+# CONFIG_SCSI_3W_SAS is not set
 # CONFIG_SCSI_ACARD is not set
 # CONFIG_SCSI_AACRAID is not set
 # CONFIG_SCSI_AIC7XXX is not set
@@ -642,6 +689,7 @@ CONFIG_SCSI_LOWLEVEL=y
 # CONFIG_SCSI_NSP32 is not set
 # CONFIG_SCSI_DEBUG is not set
 # CONFIG_SCSI_PMCRAID is not set
+# CONFIG_SCSI_PM8001 is not set
 # CONFIG_SCSI_SRP is not set
 # CONFIG_SCSI_BFA_FC is not set
 # CONFIG_SCSI_DH is not set
@@ -696,15 +744,16 @@ CONFIG_SATA_MV=y
 # CONFIG_PATA_NS87415 is not set
 # CONFIG_PATA_OPTI is not set
 # CONFIG_PATA_OPTIDMA is not set
+# CONFIG_PATA_PDC2027X is not set
 # CONFIG_PATA_PDC_OLD is not set
 # CONFIG_PATA_RADISYS is not set
 # CONFIG_PATA_RDC is not set
 # CONFIG_PATA_RZ1000 is not set
 # CONFIG_PATA_SC1200 is not set
 # CONFIG_PATA_SERVERWORKS is not set
-# CONFIG_PATA_PDC2027X is not set
 # CONFIG_PATA_SIL680 is not set
 # CONFIG_PATA_SIS is not set
+# CONFIG_PATA_TOSHIBA is not set
 # CONFIG_PATA_VIA is not set
 # CONFIG_PATA_WINBOND is not set
 # CONFIG_PATA_SCH is not set
@@ -720,7 +769,7 @@ CONFIG_SATA_MV=y
 #
 
 #
-# See the help texts for more information.
+# The newer stack is recommended.
 #
 # CONFIG_FIREWIRE is not set
 # CONFIG_IEEE1394 is not set
@@ -828,13 +877,6 @@ CONFIG_MV643XX_ETH=y
 # CONFIG_NETDEV_10000 is not set
 # CONFIG_TR is not set
 CONFIG_WLAN=y
-# CONFIG_WLAN_PRE80211 is not set
-CONFIG_WLAN_80211=y
-CONFIG_LIBERTAS=y
-# CONFIG_LIBERTAS_USB is not set
-CONFIG_LIBERTAS_SDIO=y
-# CONFIG_LIBERTAS_SPI is not set
-# CONFIG_LIBERTAS_DEBUG is not set
 # CONFIG_LIBERTAS_THINFIRM is not set
 # CONFIG_ATMEL is not set
 # CONFIG_AT76C50X_USB is not set
@@ -846,19 +888,24 @@ CONFIG_LIBERTAS_SDIO=y
 # CONFIG_ADM8211 is not set
 # CONFIG_MAC80211_HWSIM is not set
 # CONFIG_MWL8K is not set
-# CONFIG_P54_COMMON is not set
 # CONFIG_ATH_COMMON is not set
+# CONFIG_B43 is not set
+# CONFIG_B43LEGACY is not set
+# CONFIG_HOSTAP is not set
 # CONFIG_IPW2100 is not set
 # CONFIG_IPW2200 is not set
 # CONFIG_IWLWIFI is not set
-# CONFIG_HOSTAP is not set
-# CONFIG_B43 is not set
-# CONFIG_B43LEGACY is not set
-# CONFIG_ZD1211RW is not set
-# CONFIG_RT2X00 is not set
+# CONFIG_IWM is not set
+CONFIG_LIBERTAS=y
+# CONFIG_LIBERTAS_USB is not set
+CONFIG_LIBERTAS_SDIO=y
+# CONFIG_LIBERTAS_SPI is not set
+# CONFIG_LIBERTAS_DEBUG is not set
 # CONFIG_HERMES is not set
+# CONFIG_P54_COMMON is not set
+# CONFIG_RT2X00 is not set
 # CONFIG_WL12XX is not set
-# CONFIG_IWM is not set
+# CONFIG_ZD1211RW is not set
 
 #
 # Enable WiMAX (Networking options) to see the WiMAX drivers
@@ -881,6 +928,7 @@ CONFIG_LIBERTAS_SDIO=y
 # CONFIG_NETCONSOLE is not set
 # CONFIG_NETPOLL is not set
 # CONFIG_NET_POLL_CONTROLLER is not set
+# CONFIG_VMXNET3 is not set
 # CONFIG_ISDN is not set
 # CONFIG_PHONE is not set
 
@@ -890,6 +938,7 @@ CONFIG_LIBERTAS_SDIO=y
 CONFIG_INPUT=y
 # CONFIG_INPUT_FF_MEMLESS is not set
 # CONFIG_INPUT_POLLDEV is not set
+# CONFIG_INPUT_SPARSEKMAP is not set
 
 #
 # Userland interfaces
@@ -933,6 +982,7 @@ CONFIG_SERIO_SERPORT=y
 # CONFIG_SERIO_PCIPS2 is not set
 CONFIG_SERIO_LIBPS2=y
 # CONFIG_SERIO_RAW is not set
+# CONFIG_SERIO_ALTERA_PS2 is not set
 # CONFIG_GAMEPORT is not set
 
 #
@@ -1019,11 +1069,6 @@ CONFIG_I2C_MV64XXX=y
 # CONFIG_I2C_TINY_USB is not set
 
 #
-# Graphics adapter I2C/DDC channel drivers
-#
-# CONFIG_I2C_VOODOO3 is not set
-
-#
 # Other I2C/SMBus bus drivers
 #
 # CONFIG_I2C_PCA_PLATFORM is not set
@@ -1032,7 +1077,6 @@ CONFIG_I2C_MV64XXX=y
 #
 # Miscellaneous I2C Chip support
 #
-# CONFIG_DS1682 is not set
 # CONFIG_SENSORS_TSL2550 is not set
 # CONFIG_I2C_DEBUG_CORE is not set
 # CONFIG_I2C_DEBUG_ALGO is not set
@@ -1048,6 +1092,8 @@ CONFIG_SPI_MASTER=y
 # CONFIG_SPI_BITBANG is not set
 # CONFIG_SPI_GPIO is not set
 CONFIG_SPI_ORION=y
+# CONFIG_SPI_XILINX is not set
+# CONFIG_SPI_DESIGNWARE is not set
 
 #
 # SPI Protocol Masters
@@ -1074,10 +1120,12 @@ CONFIG_GPIO_SYSFS=y
 # CONFIG_GPIO_MAX732X is not set
 # CONFIG_GPIO_PCA953X is not set
 # CONFIG_GPIO_PCF857X is not set
+# CONFIG_GPIO_ADP5588 is not set
 
 #
 # PCI GPIO expanders:
 #
+# CONFIG_GPIO_CS5535 is not set
 # CONFIG_GPIO_BT8XX is not set
 # CONFIG_GPIO_LANGWELL is not set
 
@@ -1116,6 +1164,7 @@ CONFIG_SSB_POSSIBLE=y
 # CONFIG_MFD_TMIO is not set
 # CONFIG_MFD_TC6393XB is not set
 # CONFIG_PMIC_DA903X is not set
+# CONFIG_PMIC_ADP5520 is not set
 # CONFIG_MFD_WM8400 is not set
 # CONFIG_MFD_WM831X is not set
 # CONFIG_MFD_WM8350_I2C is not set
@@ -1123,6 +1172,8 @@ CONFIG_SSB_POSSIBLE=y
 # CONFIG_MFD_MC13783 is not set
 # CONFIG_AB3100_CORE is not set
 # CONFIG_EZX_PCAP is not set
+# CONFIG_MFD_88PM8607 is not set
+# CONFIG_AB4500_CORE is not set
 # CONFIG_REGULATOR is not set
 # CONFIG_MEDIA_SUPPORT is not set
 
@@ -1305,6 +1356,7 @@ CONFIG_USB_STORAGE_JUMPSHOT=y
 # OTG and related infrastructure
 #
 # CONFIG_USB_GPIO_VBUS is not set
+# CONFIG_USB_ULPI is not set
 # CONFIG_NOP_USB_XCEIV is not set
 # CONFIG_UWB is not set
 CONFIG_MMC=y
@@ -1344,6 +1396,7 @@ CONFIG_LEDS_GPIO_PLATFORM=y
 # CONFIG_LEDS_PCA955X is not set
 # CONFIG_LEDS_DAC124S085 is not set
 # CONFIG_LEDS_BD2802 is not set
+# CONFIG_LEDS_LT3593 is not set
 
 #
 # LED Triggers
@@ -1388,6 +1441,7 @@ CONFIG_RTC_INTF_DEV=y
 # CONFIG_RTC_DRV_PCF8563 is not set
 # CONFIG_RTC_DRV_PCF8583 is not set
 # CONFIG_RTC_DRV_M41T80 is not set
+# CONFIG_RTC_DRV_BQ32K is not set
 CONFIG_RTC_DRV_S35390A=y
 # CONFIG_RTC_DRV_FM3130 is not set
 # CONFIG_RTC_DRV_RX8581 is not set
@@ -1417,7 +1471,9 @@ CONFIG_RTC_DRV_S35390A=y
 # CONFIG_RTC_DRV_M48T86 is not set
 # CONFIG_RTC_DRV_M48T35 is not set
 # CONFIG_RTC_DRV_M48T59 is not set
+# CONFIG_RTC_DRV_MSM6242 is not set
 # CONFIG_RTC_DRV_BQ4802 is not set
+# CONFIG_RTC_DRV_RP5C01 is not set
 # CONFIG_RTC_DRV_V3020 is not set
 
 #
@@ -1684,7 +1740,9 @@ CONFIG_DEBUG_USER=y
 CONFIG_DEBUG_ERRORS=y
 # CONFIG_DEBUG_STACK_USAGE is not set
 CONFIG_DEBUG_LL=y
+# CONFIG_EARLY_PRINTK is not set
 # CONFIG_DEBUG_ICEDCC is not set
+# CONFIG_OC_ETM is not set
 
 #
 # Security options
@@ -1692,7 +1750,11 @@ CONFIG_DEBUG_LL=y
 # CONFIG_KEYS is not set
 # CONFIG_SECURITY is not set
 # CONFIG_SECURITYFS is not set
-# CONFIG_SECURITY_FILE_CAPABILITIES is not set
+# CONFIG_DEFAULT_SECURITY_SELINUX is not set
+# CONFIG_DEFAULT_SECURITY_SMACK is not set
+# CONFIG_DEFAULT_SECURITY_TOMOYO is not set
+CONFIG_DEFAULT_SECURITY_DAC=y
+CONFIG_DEFAULT_SECURITY=""
 CONFIG_CRYPTO=y
 
 #
diff --git a/arch/arm/configs/mini2440_defconfig b/arch/arm/configs/mini2440_defconfig
index d2a90eb844a9..ff44bd1615c0 100644
--- a/arch/arm/configs/mini2440_defconfig
+++ b/arch/arm/configs/mini2440_defconfig
@@ -184,7 +184,7 @@ CONFIG_S3C24XX_PWM=y
 CONFIG_S3C24XX_GPIO_EXTRA=0
 CONFIG_S3C2410_DMA=y
 # CONFIG_S3C2410_DMA_DEBUG is not set
-CONFIG_S3C24XX_ADC=y
+CONFIG_S3C_ADC=y
 CONFIG_PLAT_S3C=y
 CONFIG_CPU_LLSERIAL_S3C2440_ONLY=y
 CONFIG_CPU_LLSERIAL_S3C2440=y
@@ -199,8 +199,8 @@ CONFIG_S3C_BOOT_UART_FORCE_FIFO=y
 #
 # Power management
 #
-# CONFIG_S3C2410_PM_DEBUG is not set
-# CONFIG_S3C2410_PM_CHECK is not set
+# CONFIG_SAMSUNG_PM_DEBUG is not set
+# CONFIG_SAMSUNG_PM_CHECK is not set
 CONFIG_S3C_LOWLEVEL_UART_PORT=0
 CONFIG_S3C_GPIO_SPACE=0
 
diff --git a/arch/arm/configs/mmp2_defconfig b/arch/arm/configs/mmp2_defconfig
new file mode 100644
index 000000000000..03f76cfc941c
--- /dev/null
+++ b/arch/arm/configs/mmp2_defconfig
@@ -0,0 +1,1194 @@
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.33-rc2
+# Tue Jan  5 13:55:22 2010
+#
+CONFIG_ARM=y
+CONFIG_SYS_SUPPORTS_APM_EMULATION=y
+CONFIG_GENERIC_GPIO=y
+CONFIG_GENERIC_TIME=y
+CONFIG_GENERIC_CLOCKEVENTS=y
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_HAVE_LATENCYTOP_SUPPORT=y
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+CONFIG_HARDIRQS_SW_RESEND=y
+CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
+CONFIG_VECTORS_BASE=0xffff0000
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+CONFIG_CONSTRUCTORS=y
+
+#
+# General setup
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_LOCK_KERNEL=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+CONFIG_LOCALVERSION=""
+CONFIG_LOCALVERSION_AUTO=y
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+CONFIG_SYSVIPC_SYSCTL=y
+# CONFIG_POSIX_MQUEUE is not set
+# CONFIG_BSD_PROCESS_ACCT is not set
+# CONFIG_TASKSTATS is not set
+# CONFIG_AUDIT is not set
+
+#
+# RCU Subsystem
+#
+CONFIG_TREE_RCU=y
+# CONFIG_TREE_PREEMPT_RCU is not set
+# CONFIG_TINY_RCU is not set
+# CONFIG_RCU_TRACE is not set
+CONFIG_RCU_FANOUT=32
+# CONFIG_RCU_FANOUT_EXACT is not set
+# CONFIG_TREE_RCU_TRACE is not set
+# CONFIG_IKCONFIG is not set
+CONFIG_LOG_BUF_SHIFT=14
+# CONFIG_GROUP_SCHED is not set
+# CONFIG_CGROUPS is not set
+CONFIG_SYSFS_DEPRECATED=y
+CONFIG_SYSFS_DEPRECATED_V2=y
+# CONFIG_RELAY is not set
+CONFIG_NAMESPACES=y
+# CONFIG_UTS_NS is not set
+# CONFIG_IPC_NS is not set
+# CONFIG_USER_NS is not set
+# CONFIG_PID_NS is not set
+# CONFIG_NET_NS is not set
+# CONFIG_BLK_DEV_INITRD is not set
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_SYSCTL=y
+CONFIG_ANON_INODES=y
+# CONFIG_EMBEDDED is not set
+CONFIG_UID16=y
+CONFIG_SYSCTL_SYSCALL=y
+CONFIG_KALLSYMS=y
+# CONFIG_KALLSYMS_ALL is not set
+# CONFIG_KALLSYMS_EXTRA_PASS is not set
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_ELF_CORE=y
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+CONFIG_EPOLL=y
+CONFIG_SIGNALFD=y
+CONFIG_TIMERFD=y
+CONFIG_EVENTFD=y
+CONFIG_SHMEM=y
+CONFIG_AIO=y
+
+#
+# Kernel Performance Events And Counters
+#
+CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_COMPAT_BRK=y
+CONFIG_SLAB=y
+# CONFIG_SLUB is not set
+# CONFIG_SLOB is not set
+# CONFIG_PROFILING is not set
+CONFIG_HAVE_OPROFILE=y
+# CONFIG_KPROBES is not set
+CONFIG_HAVE_KPROBES=y
+CONFIG_HAVE_KRETPROBES=y
+CONFIG_HAVE_CLK=y
+
+#
+# GCOV-based kernel profiling
+#
+# CONFIG_SLOW_WORK is not set
+CONFIG_HAVE_GENERIC_DMA_COHERENT=y
+CONFIG_SLABINFO=y
+CONFIG_RT_MUTEXES=y
+CONFIG_BASE_SMALL=0
+CONFIG_MODULES=y
+# CONFIG_MODULE_FORCE_LOAD is not set
+CONFIG_MODULE_UNLOAD=y
+CONFIG_MODULE_FORCE_UNLOAD=y
+# CONFIG_MODVERSIONS is not set
+# CONFIG_MODULE_SRCVERSION_ALL is not set
+CONFIG_BLOCK=y
+CONFIG_LBDAF=y
+# CONFIG_BLK_DEV_BSG is not set
+# CONFIG_BLK_DEV_INTEGRITY is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_CFQ=y
+# CONFIG_DEFAULT_DEADLINE is not set
+CONFIG_DEFAULT_CFQ=y
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="cfq"
+# CONFIG_INLINE_SPIN_TRYLOCK is not set
+# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set
+# CONFIG_INLINE_SPIN_LOCK is not set
+# CONFIG_INLINE_SPIN_LOCK_BH is not set
+# CONFIG_INLINE_SPIN_LOCK_IRQ is not set
+# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set
+# CONFIG_INLINE_SPIN_UNLOCK is not set
+# CONFIG_INLINE_SPIN_UNLOCK_BH is not set
+# CONFIG_INLINE_SPIN_UNLOCK_IRQ is not set
+# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set
+# CONFIG_INLINE_READ_TRYLOCK is not set
+# CONFIG_INLINE_READ_LOCK is not set
+# CONFIG_INLINE_READ_LOCK_BH is not set
+# CONFIG_INLINE_READ_LOCK_IRQ is not set
+# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set
+# CONFIG_INLINE_READ_UNLOCK is not set
+# CONFIG_INLINE_READ_UNLOCK_BH is not set
+# CONFIG_INLINE_READ_UNLOCK_IRQ is not set
+# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set
+# CONFIG_INLINE_WRITE_TRYLOCK is not set
+# CONFIG_INLINE_WRITE_LOCK is not set
+# CONFIG_INLINE_WRITE_LOCK_BH is not set
+# CONFIG_INLINE_WRITE_LOCK_IRQ is not set
+# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set
+# CONFIG_INLINE_WRITE_UNLOCK is not set
+# CONFIG_INLINE_WRITE_UNLOCK_BH is not set
+# CONFIG_INLINE_WRITE_UNLOCK_IRQ is not set
+# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set
+# CONFIG_MUTEX_SPIN_ON_OWNER is not set
+# CONFIG_FREEZER is not set
+
+#
+# System Type
+#
+CONFIG_MMU=y
+# CONFIG_ARCH_AAEC2000 is not set
+# CONFIG_ARCH_INTEGRATOR is not set
+# CONFIG_ARCH_REALVIEW is not set
+# CONFIG_ARCH_VERSATILE is not set
+# CONFIG_ARCH_AT91 is not set
+# CONFIG_ARCH_CLPS711X is not set
+# CONFIG_ARCH_GEMINI is not set
+# CONFIG_ARCH_EBSA110 is not set
+# CONFIG_ARCH_EP93XX is not set
+# CONFIG_ARCH_FOOTBRIDGE is not set
+# CONFIG_ARCH_MXC is not set
+# CONFIG_ARCH_STMP3XXX is not set
+# CONFIG_ARCH_NETX is not set
+# CONFIG_ARCH_H720X is not set
+# CONFIG_ARCH_NOMADIK is not set
+# CONFIG_ARCH_IOP13XX is not set
+# CONFIG_ARCH_IOP32X is not set
+# CONFIG_ARCH_IOP33X is not set
+# CONFIG_ARCH_IXP23XX is not set
+# CONFIG_ARCH_IXP2000 is not set
+# CONFIG_ARCH_IXP4XX is not set
+# CONFIG_ARCH_L7200 is not set
+# CONFIG_ARCH_DOVE is not set
+# CONFIG_ARCH_KIRKWOOD is not set
+# CONFIG_ARCH_LOKI is not set
+# CONFIG_ARCH_MV78XX0 is not set
+# CONFIG_ARCH_ORION5X is not set
+CONFIG_ARCH_MMP=y
+# CONFIG_ARCH_KS8695 is not set
+# CONFIG_ARCH_NS9XXX is not set
+# CONFIG_ARCH_W90X900 is not set
+# CONFIG_ARCH_PNX4008 is not set
+# CONFIG_ARCH_PXA is not set
+# CONFIG_ARCH_MSM is not set
+# CONFIG_ARCH_RPC is not set
+# CONFIG_ARCH_SA1100 is not set
+# CONFIG_ARCH_S3C2410 is not set
+# CONFIG_ARCH_S3C64XX is not set
+# CONFIG_ARCH_S5PC1XX is not set
+# CONFIG_ARCH_SHARK is not set
+# CONFIG_ARCH_LH7A40X is not set
+# CONFIG_ARCH_U300 is not set
+# CONFIG_ARCH_DAVINCI is not set
+# CONFIG_ARCH_OMAP is not set
+# CONFIG_ARCH_BCMRING is not set
+# CONFIG_ARCH_U8500 is not set
+# CONFIG_MACH_TAVOREVB is not set
+
+#
+# Marvell PXA168/910/MMP2 Implmentations
+#
+# CONFIG_MACH_ASPENITE is not set
+# CONFIG_MACH_ZYLONITE2 is not set
+# CONFIG_MACH_TTC_DKB is not set
+CONFIG_MACH_FLINT=y
+CONFIG_CPU_MMP2=y
+CONFIG_PLAT_PXA=y
+
+#
+# Processor Type
+#
+CONFIG_CPU_V6=y
+CONFIG_CPU_32v6K=y
+CONFIG_CPU_32v6=y
+CONFIG_CPU_ABRT_EV6=y
+CONFIG_CPU_PABRT_V6=y
+CONFIG_CPU_CACHE_V6=y
+CONFIG_CPU_CACHE_VIPT=y
+CONFIG_CPU_COPY_V6=y
+CONFIG_CPU_TLB_V6=y
+CONFIG_CPU_HAS_ASID=y
+CONFIG_CPU_CP15=y
+CONFIG_CPU_CP15_MMU=y
+
+#
+# Processor Features
+#
+CONFIG_ARM_THUMB=y
+# CONFIG_CPU_ICACHE_DISABLE is not set
+# CONFIG_CPU_DCACHE_DISABLE is not set
+# CONFIG_CPU_BPREDICT_DISABLE is not set
+CONFIG_ARM_L1_CACHE_SHIFT=5
+# CONFIG_ARM_ERRATA_411920 is not set
+CONFIG_COMMON_CLKDEV=y
+
+#
+# Bus support
+#
+# CONFIG_PCI_SYSCALL is not set
+# CONFIG_ARCH_SUPPORTS_MSI is not set
+# CONFIG_PCCARD is not set
+
+#
+# Kernel Features
+#
+CONFIG_TICK_ONESHOT=y
+# CONFIG_NO_HZ is not set
+CONFIG_HIGH_RES_TIMERS=y
+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
+CONFIG_VMSPLIT_3G=y
+# CONFIG_VMSPLIT_2G is not set
+# CONFIG_VMSPLIT_1G is not set
+CONFIG_PAGE_OFFSET=0xC0000000
+# CONFIG_PREEMPT_NONE is not set
+# CONFIG_PREEMPT_VOLUNTARY is not set
+CONFIG_PREEMPT=y
+CONFIG_HZ=100
+CONFIG_AEABI=y
+CONFIG_OABI_COMPAT=y
+# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
+# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
+# CONFIG_HIGHMEM is not set
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_FLATMEM_MANUAL=y
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+# CONFIG_SPARSEMEM_MANUAL is not set
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+CONFIG_PAGEFLAGS_EXTENDED=y
+CONFIG_SPLIT_PTLOCK_CPUS=4
+# CONFIG_PHYS_ADDR_T_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=0
+CONFIG_VIRT_TO_BUS=y
+# CONFIG_KSM is not set
+CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
+CONFIG_ALIGNMENT_TRAP=y
+# CONFIG_UACCESS_WITH_MEMCPY is not set
+
+#
+# Boot options
+#
+CONFIG_ZBOOT_ROM_TEXT=0x0
+CONFIG_ZBOOT_ROM_BSS=0x0
+CONFIG_CMDLINE="root=/dev/nfs rootfstype=nfs nfsroot=192.168.1.100:/nfsroot/ ip=192.168.1.101:192.168.1.100::255.255.255.0::eth0:on console=ttyS0,115200 mem=128M user_debug=255"
+# CONFIG_XIP_KERNEL is not set
+# CONFIG_KEXEC is not set
+
+#
+# CPU Power Management
+#
+# CONFIG_CPU_IDLE is not set
+
+#
+# Floating point emulation
+#
+
+#
+# At least one emulation must be selected
+#
+# CONFIG_FPE_NWFPE is not set
+# CONFIG_FPE_FASTFPE is not set
+CONFIG_VFP=y
+
+#
+# Userspace binary formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+CONFIG_HAVE_AOUT=y
+# CONFIG_BINFMT_AOUT is not set
+# CONFIG_BINFMT_MISC is not set
+
+#
+# Power management options
+#
+# CONFIG_PM is not set
+CONFIG_ARCH_SUSPEND_POSSIBLE=y
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+# CONFIG_PACKET_MMAP is not set
+CONFIG_UNIX=y
+CONFIG_XFRM=y
+# CONFIG_XFRM_USER is not set
+# CONFIG_XFRM_SUB_POLICY is not set
+# CONFIG_XFRM_MIGRATE is not set
+# CONFIG_XFRM_STATISTICS is not set
+# CONFIG_NET_KEY is not set
+CONFIG_INET=y
+# CONFIG_IP_MULTICAST is not set
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_FIB_HASH=y
+CONFIG_IP_PNP=y
+# CONFIG_IP_PNP_DHCP is not set
+# CONFIG_IP_PNP_BOOTP is not set
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_ARPD is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_XFRM_TUNNEL is not set
+# CONFIG_INET_TUNNEL is not set
+CONFIG_INET_XFRM_MODE_TRANSPORT=y
+CONFIG_INET_XFRM_MODE_TUNNEL=y
+CONFIG_INET_XFRM_MODE_BEET=y
+# CONFIG_INET_LRO is not set
+CONFIG_INET_DIAG=y
+CONFIG_INET_TCP_DIAG=y
+# CONFIG_TCP_CONG_ADVANCED is not set
+CONFIG_TCP_CONG_CUBIC=y
+CONFIG_DEFAULT_TCP_CONG="cubic"
+# CONFIG_TCP_MD5SIG is not set
+# CONFIG_IPV6 is not set
+# CONFIG_NETWORK_SECMARK is not set
+# CONFIG_NETFILTER is not set
+# CONFIG_IP_DCCP is not set
+# CONFIG_IP_SCTP is not set
+# CONFIG_RDS is not set
+# CONFIG_TIPC is not set
+# CONFIG_ATM is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_NET_DSA is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_DECNET is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_PHONET is not set
+# CONFIG_IEEE802154 is not set
+# CONFIG_NET_SCHED is not set
+# CONFIG_DCB is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# CONFIG_HAMRADIO is not set
+# CONFIG_CAN is not set
+# CONFIG_IRDA is not set
+# CONFIG_BT is not set
+# CONFIG_AF_RXRPC is not set
+CONFIG_WIRELESS=y
+# CONFIG_CFG80211 is not set
+# CONFIG_LIB80211 is not set
+
+#
+# CFG80211 needs to be enabled for MAC80211
+#
+# CONFIG_WIMAX is not set
+# CONFIG_RFKILL is not set
+# CONFIG_NET_9P is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_UEVENT_HELPER_PATH=""
+# CONFIG_DEVTMPFS is not set
+# CONFIG_STANDALONE is not set
+# CONFIG_PREVENT_FIRMWARE_BUILD is not set
+CONFIG_FW_LOADER=y
+CONFIG_FIRMWARE_IN_KERNEL=y
+CONFIG_EXTRA_FIRMWARE=""
+# CONFIG_DEBUG_DRIVER is not set
+# CONFIG_DEBUG_DEVRES is not set
+# CONFIG_SYS_HYPERVISOR is not set
+# CONFIG_CONNECTOR is not set
+CONFIG_MTD=y
+# CONFIG_MTD_DEBUG is not set
+# CONFIG_MTD_TESTS is not set
+# CONFIG_MTD_CONCAT is not set
+CONFIG_MTD_PARTITIONS=y
+# CONFIG_MTD_REDBOOT_PARTS is not set
+CONFIG_MTD_CMDLINE_PARTS=y
+# CONFIG_MTD_AFS_PARTS is not set
+# CONFIG_MTD_AR7_PARTS is not set
+
+#
+# User Modules And Translation Layers
+#
+# CONFIG_MTD_CHAR is not set
+CONFIG_MTD_BLKDEVS=y
+CONFIG_MTD_BLOCK=y
+# CONFIG_FTL is not set
+# CONFIG_NFTL is not set
+# CONFIG_INFTL is not set
+# CONFIG_RFD_FTL is not set
+# CONFIG_SSFDC is not set
+# CONFIG_MTD_OOPS is not set
+
+#
+# RAM/ROM/Flash chip drivers
+#
+# CONFIG_MTD_CFI is not set
+# CONFIG_MTD_JEDECPROBE is not set
+CONFIG_MTD_MAP_BANK_WIDTH_1=y
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
+CONFIG_MTD_MAP_BANK_WIDTH_4=y
+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
+CONFIG_MTD_CFI_I1=y
+CONFIG_MTD_CFI_I2=y
+# CONFIG_MTD_CFI_I4 is not set
+# CONFIG_MTD_CFI_I8 is not set
+# CONFIG_MTD_RAM is not set
+# CONFIG_MTD_ROM is not set
+# CONFIG_MTD_ABSENT is not set
+
+#
+# Mapping drivers for chip access
+#
+# CONFIG_MTD_COMPLEX_MAPPINGS is not set
+# CONFIG_MTD_PLATRAM is not set
+
+#
+# Self-contained MTD device drivers
+#
+# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_PHRAM is not set
+# CONFIG_MTD_MTDRAM is not set
+# CONFIG_MTD_BLOCK2MTD is not set
+
+#
+# Disk-On-Chip Device Drivers
+#
+# CONFIG_MTD_DOC2000 is not set
+# CONFIG_MTD_DOC2001 is not set
+# CONFIG_MTD_DOC2001PLUS is not set
+CONFIG_MTD_NAND=y
+# CONFIG_MTD_NAND_VERIFY_WRITE is not set
+# CONFIG_MTD_NAND_ECC_SMC is not set
+# CONFIG_MTD_NAND_MUSEUM_IDS is not set
+# CONFIG_MTD_NAND_GPIO is not set
+CONFIG_MTD_NAND_IDS=y
+# CONFIG_MTD_NAND_DISKONCHIP is not set
+# CONFIG_MTD_NAND_PXA3xx is not set
+# CONFIG_MTD_NAND_NANDSIM is not set
+# CONFIG_MTD_NAND_PLATFORM is not set
+CONFIG_MTD_ONENAND=y
+# CONFIG_MTD_ONENAND_VERIFY_WRITE is not set
+CONFIG_MTD_ONENAND_GENERIC=y
+# CONFIG_MTD_ONENAND_OTP is not set
+# CONFIG_MTD_ONENAND_2X_PROGRAM is not set
+# CONFIG_MTD_ONENAND_SIM is not set
+
+#
+# LPDDR flash memory drivers
+#
+# CONFIG_MTD_LPDDR is not set
+
+#
+# UBI - Unsorted block images
+#
+# CONFIG_MTD_UBI is not set
+# CONFIG_PARPORT is not set
+# CONFIG_BLK_DEV is not set
+# CONFIG_MISC_DEVICES is not set
+CONFIG_HAVE_IDE=y
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+# CONFIG_RAID_ATTRS is not set
+# CONFIG_SCSI is not set
+# CONFIG_SCSI_DMA is not set
+# CONFIG_SCSI_NETLINK is not set
+# CONFIG_ATA is not set
+# CONFIG_MD is not set
+CONFIG_NETDEVICES=y
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_MACVLAN is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+# CONFIG_VETH is not set
+# CONFIG_PHYLIB is not set
+CONFIG_NET_ETHERNET=y
+CONFIG_MII=y
+# CONFIG_AX88796 is not set
+CONFIG_SMC91X=y
+# CONFIG_DM9000 is not set
+# CONFIG_ETHOC is not set
+# CONFIG_SMC911X is not set
+# CONFIG_SMSC911X is not set
+# CONFIG_DNET is not set
+# CONFIG_IBM_NEW_EMAC_ZMII is not set
+# CONFIG_IBM_NEW_EMAC_RGMII is not set
+# CONFIG_IBM_NEW_EMAC_TAH is not set
+# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
+# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
+# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
+# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
+# CONFIG_B44 is not set
+# CONFIG_KS8842 is not set
+# CONFIG_KS8851_MLL is not set
+# CONFIG_NETDEV_1000 is not set
+# CONFIG_NETDEV_10000 is not set
+CONFIG_WLAN=y
+# CONFIG_HOSTAP is not set
+
+#
+# Enable WiMAX (Networking options) to see the WiMAX drivers
+#
+# CONFIG_WAN is not set
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+# CONFIG_NETCONSOLE is not set
+# CONFIG_NETPOLL is not set
+# CONFIG_NET_POLL_CONTROLLER is not set
+# CONFIG_ISDN is not set
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+# CONFIG_INPUT_FF_MEMLESS is not set
+# CONFIG_INPUT_POLLDEV is not set
+# CONFIG_INPUT_SPARSEKMAP is not set
+
+#
+# Userland interfaces
+#
+CONFIG_INPUT_MOUSEDEV=y
+# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_EVDEV is not set
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input Device Drivers
+#
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TABLET is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Hardware I/O ports
+#
+# CONFIG_SERIO is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_CONSOLE_TRANSLATIONS=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+# CONFIG_VT_HW_CONSOLE_BINDING is not set
+CONFIG_DEVKMEM=y
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+# CONFIG_SERIAL_8250 is not set
+
+#
+# Non-8250 serial port support
+#
+CONFIG_SERIAL_PXA=y
+CONFIG_SERIAL_PXA_CONSOLE=y
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+CONFIG_UNIX98_PTYS=y
+# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
+# CONFIG_LEGACY_PTYS is not set
+# CONFIG_IPMI_HANDLER is not set
+# CONFIG_HW_RANDOM is not set
+# CONFIG_R3964 is not set
+# CONFIG_RAW_DRIVER is not set
+# CONFIG_TCG_TPM is not set
+CONFIG_I2C=y
+CONFIG_I2C_BOARDINFO=y
+CONFIG_I2C_COMPAT=y
+# CONFIG_I2C_CHARDEV is not set
+CONFIG_I2C_HELPER_AUTO=y
+
+#
+# I2C Hardware Bus support
+#
+
+#
+# I2C system bus drivers (mostly embedded / system-on-chip)
+#
+# CONFIG_I2C_DESIGNWARE is not set
+# CONFIG_I2C_GPIO is not set
+# CONFIG_I2C_OCORES is not set
+CONFIG_I2C_PXA=y
+# CONFIG_I2C_PXA_SLAVE is not set
+# CONFIG_I2C_SIMTEC is not set
+
+#
+# External I2C/SMBus adapter drivers
+#
+# CONFIG_I2C_PARPORT_LIGHT is not set
+# CONFIG_I2C_TAOS_EVM is not set
+
+#
+# Other I2C/SMBus bus drivers
+#
+# CONFIG_I2C_PCA_PLATFORM is not set
+# CONFIG_I2C_STUB is not set
+
+#
+# Miscellaneous I2C Chip support
+#
+# CONFIG_SENSORS_TSL2550 is not set
+# CONFIG_I2C_DEBUG_CORE is not set
+# CONFIG_I2C_DEBUG_ALGO is not set
+# CONFIG_I2C_DEBUG_BUS is not set
+# CONFIG_I2C_DEBUG_CHIP is not set
+# CONFIG_SPI is not set
+
+#
+# PPS support
+#
+# CONFIG_PPS is not set
+CONFIG_ARCH_REQUIRE_GPIOLIB=y
+CONFIG_GPIOLIB=y
+# CONFIG_DEBUG_GPIO is not set
+# CONFIG_GPIO_SYSFS is not set
+
+#
+# Memory mapped GPIO expanders:
+#
+
+#
+# I2C GPIO expanders:
+#
+# CONFIG_GPIO_MAX732X is not set
+# CONFIG_GPIO_PCA953X is not set
+# CONFIG_GPIO_PCF857X is not set
+
+#
+# PCI GPIO expanders:
+#
+
+#
+# SPI GPIO expanders:
+#
+
+#
+# AC97 GPIO expanders:
+#
+# CONFIG_W1 is not set
+# CONFIG_POWER_SUPPLY is not set
+# CONFIG_HWMON is not set
+# CONFIG_THERMAL is not set
+# CONFIG_WATCHDOG is not set
+CONFIG_SSB_POSSIBLE=y
+
+#
+# Sonics Silicon Backplane
+#
+# CONFIG_SSB is not set
+
+#
+# Multifunction device drivers
+#
+CONFIG_MFD_CORE=y
+# CONFIG_MFD_SM501 is not set
+# CONFIG_MFD_ASIC3 is not set
+# CONFIG_HTC_EGPIO is not set
+# CONFIG_HTC_PASIC3 is not set
+# CONFIG_TPS65010 is not set
+# CONFIG_TWL4030_CORE is not set
+# CONFIG_MFD_TMIO is not set
+# CONFIG_MFD_T7L66XB is not set
+# CONFIG_MFD_TC6387XB is not set
+# CONFIG_MFD_TC6393XB is not set
+# CONFIG_PMIC_DA903X is not set
+# CONFIG_PMIC_ADP5520 is not set
+# CONFIG_MFD_WM8400 is not set
+# CONFIG_MFD_WM831X is not set
+# CONFIG_MFD_WM8350_I2C is not set
+# CONFIG_MFD_PCF50633 is not set
+# CONFIG_AB3100_CORE is not set
+CONFIG_MFD_88PM8607=y
+CONFIG_REGULATOR=y
+# CONFIG_REGULATOR_DEBUG is not set
+# CONFIG_REGULATOR_FIXED_VOLTAGE is not set
+# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set
+# CONFIG_REGULATOR_USERSPACE_CONSUMER is not set
+# CONFIG_REGULATOR_BQ24022 is not set
+# CONFIG_REGULATOR_MAX1586 is not set
+CONFIG_REGULATOR_MAX8660=y
+# CONFIG_REGULATOR_LP3971 is not set
+# CONFIG_REGULATOR_TPS65023 is not set
+# CONFIG_REGULATOR_TPS6507X is not set
+CONFIG_REGULATOR_88PM8607=y
+# CONFIG_MEDIA_SUPPORT is not set
+
+#
+# Graphics support
+#
+# CONFIG_VGASTATE is not set
+# CONFIG_VIDEO_OUTPUT_CONTROL is not set
+# CONFIG_FB is not set
+CONFIG_BACKLIGHT_LCD_SUPPORT=y
+CONFIG_LCD_CLASS_DEVICE=y
+# CONFIG_LCD_ILI9320 is not set
+# CONFIG_LCD_PLATFORM is not set
+CONFIG_BACKLIGHT_CLASS_DEVICE=y
+CONFIG_BACKLIGHT_GENERIC=y
+
+#
+# Display device support
+#
+# CONFIG_DISPLAY_SUPPORT is not set
+
+#
+# Console display driver support
+#
+# CONFIG_VGA_CONSOLE is not set
+CONFIG_DUMMY_CONSOLE=y
+# CONFIG_SOUND is not set
+# CONFIG_HID_SUPPORT is not set
+# CONFIG_USB_SUPPORT is not set
+# CONFIG_MMC is not set
+# CONFIG_MEMSTICK is not set
+# CONFIG_NEW_LEDS is not set
+# CONFIG_ACCESSIBILITY is not set
+CONFIG_RTC_LIB=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_HCTOSYS=y
+CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
+# CONFIG_RTC_DEBUG is not set
+
+#
+# RTC interfaces
+#
+CONFIG_RTC_INTF_SYSFS=y
+CONFIG_RTC_INTF_PROC=y
+CONFIG_RTC_INTF_DEV=y
+# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
+# CONFIG_RTC_DRV_TEST is not set
+
+#
+# I2C RTC drivers
+#
+# CONFIG_RTC_DRV_DS1307 is not set
+# CONFIG_RTC_DRV_DS1374 is not set
+# CONFIG_RTC_DRV_DS1672 is not set
+# CONFIG_RTC_DRV_MAX6900 is not set
+# CONFIG_RTC_DRV_RS5C372 is not set
+# CONFIG_RTC_DRV_ISL1208 is not set
+# CONFIG_RTC_DRV_X1205 is not set
+# CONFIG_RTC_DRV_PCF8563 is not set
+# CONFIG_RTC_DRV_PCF8583 is not set
+# CONFIG_RTC_DRV_M41T80 is not set
+# CONFIG_RTC_DRV_BQ32K is not set
+# CONFIG_RTC_DRV_S35390A is not set
+# CONFIG_RTC_DRV_FM3130 is not set
+# CONFIG_RTC_DRV_RX8581 is not set
+# CONFIG_RTC_DRV_RX8025 is not set
+
+#
+# SPI RTC drivers
+#
+
+#
+# Platform RTC drivers
+#
+# CONFIG_RTC_DRV_CMOS is not set
+# CONFIG_RTC_DRV_DS1286 is not set
+# CONFIG_RTC_DRV_DS1511 is not set
+# CONFIG_RTC_DRV_DS1553 is not set
+# CONFIG_RTC_DRV_DS1742 is not set
+# CONFIG_RTC_DRV_STK17TA8 is not set
+# CONFIG_RTC_DRV_M48T86 is not set
+# CONFIG_RTC_DRV_M48T35 is not set
+# CONFIG_RTC_DRV_M48T59 is not set
+# CONFIG_RTC_DRV_MSM6242 is not set
+# CONFIG_RTC_DRV_BQ4802 is not set
+# CONFIG_RTC_DRV_RP5C01 is not set
+# CONFIG_RTC_DRV_V3020 is not set
+
+#
+# on-CPU RTC drivers
+#
+# CONFIG_DMADEVICES is not set
+# CONFIG_AUXDISPLAY is not set
+# CONFIG_UIO is not set
+
+#
+# TI VLYNQ
+#
+# CONFIG_STAGING is not set
+
+#
+# File systems
+#
+# CONFIG_EXT2_FS is not set
+# CONFIG_EXT3_FS is not set
+# CONFIG_EXT4_FS is not set
+CONFIG_EXT4_USE_FOR_EXT23=y
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+CONFIG_FS_POSIX_ACL=y
+# CONFIG_XFS_FS is not set
+# CONFIG_GFS2_FS is not set
+# CONFIG_OCFS2_FS is not set
+# CONFIG_BTRFS_FS is not set
+# CONFIG_NILFS2_FS is not set
+CONFIG_FILE_LOCKING=y
+CONFIG_FSNOTIFY=y
+CONFIG_DNOTIFY=y
+CONFIG_INOTIFY=y
+CONFIG_INOTIFY_USER=y
+# CONFIG_QUOTA is not set
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+# CONFIG_FUSE_FS is not set
+CONFIG_GENERIC_ACL=y
+
+#
+# Caches
+#
+# CONFIG_FSCACHE is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+# CONFIG_MSDOS_FS is not set
+# CONFIG_VFAT_FS is not set
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_SYSCTL=y
+CONFIG_PROC_PAGE_MONITOR=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+CONFIG_TMPFS_POSIX_ACL=y
+# CONFIG_HUGETLB_PAGE is not set
+# CONFIG_CONFIGFS_FS is not set
+CONFIG_MISC_FILESYSTEMS=y
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+CONFIG_JFFS2_FS=y
+CONFIG_JFFS2_FS_DEBUG=0
+CONFIG_JFFS2_FS_WRITEBUFFER=y
+# CONFIG_JFFS2_FS_WBUF_VERIFY is not set
+# CONFIG_JFFS2_SUMMARY is not set
+# CONFIG_JFFS2_FS_XATTR is not set
+# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
+CONFIG_JFFS2_ZLIB=y
+# CONFIG_JFFS2_LZO is not set
+CONFIG_JFFS2_RTIME=y
+# CONFIG_JFFS2_RUBIN is not set
+CONFIG_CRAMFS=y
+# CONFIG_SQUASHFS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_OMFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_ROMFS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+CONFIG_NETWORK_FILESYSTEMS=y
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3=y
+CONFIG_NFS_V3_ACL=y
+CONFIG_NFS_V4=y
+# CONFIG_NFS_V4_1 is not set
+CONFIG_ROOT_NFS=y
+# CONFIG_NFSD is not set
+CONFIG_LOCKD=y
+CONFIG_LOCKD_V4=y
+CONFIG_NFS_ACL_SUPPORT=y
+CONFIG_NFS_COMMON=y
+CONFIG_SUNRPC=y
+CONFIG_SUNRPC_GSS=y
+CONFIG_RPCSEC_GSS_KRB5=y
+# CONFIG_RPCSEC_GSS_SPKM3 is not set
+# CONFIG_SMB_FS is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_AFS_FS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+# CONFIG_NLS is not set
+# CONFIG_DLM is not set
+
+#
+# Kernel hacking
+#
+CONFIG_PRINTK_TIME=y
+CONFIG_ENABLE_WARN_DEPRECATED=y
+CONFIG_ENABLE_MUST_CHECK=y
+CONFIG_FRAME_WARN=1024
+CONFIG_MAGIC_SYSRQ=y
+# CONFIG_STRIP_ASM_SYMS is not set
+# CONFIG_UNUSED_SYMBOLS is not set
+# CONFIG_DEBUG_FS is not set
+# CONFIG_HEADERS_CHECK is not set
+CONFIG_DEBUG_KERNEL=y
+# CONFIG_DEBUG_SHIRQ is not set
+CONFIG_DETECT_SOFTLOCKUP=y
+# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
+CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
+CONFIG_DETECT_HUNG_TASK=y
+# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set
+CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0
+CONFIG_SCHED_DEBUG=y
+# CONFIG_SCHEDSTATS is not set
+# CONFIG_TIMER_STATS is not set
+# CONFIG_DEBUG_OBJECTS is not set
+# CONFIG_DEBUG_SLAB is not set
+# CONFIG_DEBUG_KMEMLEAK is not set
+# CONFIG_DEBUG_PREEMPT is not set
+# CONFIG_DEBUG_RT_MUTEXES is not set
+# CONFIG_RT_MUTEX_TESTER is not set
+# CONFIG_DEBUG_SPINLOCK is not set
+# CONFIG_DEBUG_MUTEXES is not set
+# CONFIG_DEBUG_LOCK_ALLOC is not set
+# CONFIG_PROVE_LOCKING is not set
+# CONFIG_LOCK_STAT is not set
+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
+# CONFIG_DEBUG_KOBJECT is not set
+CONFIG_DEBUG_BUGVERBOSE=y
+CONFIG_DEBUG_INFO=y
+# CONFIG_DEBUG_VM is not set
+# CONFIG_DEBUG_WRITECOUNT is not set
+CONFIG_DEBUG_MEMORY_INIT=y
+# CONFIG_DEBUG_LIST is not set
+# CONFIG_DEBUG_SG is not set
+# CONFIG_DEBUG_NOTIFIERS is not set
+# CONFIG_DEBUG_CREDENTIALS is not set
+# CONFIG_BOOT_PRINTK_DELAY is not set
+# CONFIG_RCU_TORTURE_TEST is not set
+# CONFIG_RCU_CPU_STALL_DETECTOR is not set
+# CONFIG_BACKTRACE_SELF_TEST is not set
+# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
+# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
+# CONFIG_FAULT_INJECTION is not set
+# CONFIG_LATENCYTOP is not set
+# CONFIG_SYSCTL_SYSCALL_CHECK is not set
+# CONFIG_PAGE_POISONING is not set
+CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_TRACING_SUPPORT=y
+CONFIG_FTRACE=y
+# CONFIG_FUNCTION_TRACER is not set
+# CONFIG_IRQSOFF_TRACER is not set
+# CONFIG_PREEMPT_TRACER is not set
+# CONFIG_SCHED_TRACER is not set
+# CONFIG_ENABLE_DEFAULT_TRACERS is not set
+# CONFIG_BOOT_TRACER is not set
+CONFIG_BRANCH_PROFILE_NONE=y
+# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set
+# CONFIG_PROFILE_ALL_BRANCHES is not set
+# CONFIG_STACK_TRACER is not set
+# CONFIG_KMEMTRACE is not set
+# CONFIG_WORKQUEUE_TRACER is not set
+# CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_SAMPLES is not set
+CONFIG_HAVE_ARCH_KGDB=y
+# CONFIG_KGDB is not set
+CONFIG_ARM_UNWIND=y
+CONFIG_DEBUG_USER=y
+CONFIG_DEBUG_ERRORS=y
+# CONFIG_DEBUG_STACK_USAGE is not set
+CONFIG_DEBUG_LL=y
+# CONFIG_EARLY_PRINTK is not set
+# CONFIG_DEBUG_ICEDCC is not set
+# CONFIG_OC_ETM is not set
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY is not set
+# CONFIG_SECURITYFS is not set
+# CONFIG_DEFAULT_SECURITY_SELINUX is not set
+# CONFIG_DEFAULT_SECURITY_SMACK is not set
+# CONFIG_DEFAULT_SECURITY_TOMOYO is not set
+CONFIG_DEFAULT_SECURITY_DAC=y
+CONFIG_DEFAULT_SECURITY=""
+CONFIG_CRYPTO=y
+
+#
+# Crypto core or helper
+#
+CONFIG_CRYPTO_ALGAPI=y
+CONFIG_CRYPTO_ALGAPI2=y
+CONFIG_CRYPTO_AEAD2=y
+CONFIG_CRYPTO_BLKCIPHER=y
+CONFIG_CRYPTO_BLKCIPHER2=y
+CONFIG_CRYPTO_HASH=y
+CONFIG_CRYPTO_HASH2=y
+CONFIG_CRYPTO_RNG2=y
+CONFIG_CRYPTO_PCOMP=y
+CONFIG_CRYPTO_MANAGER=y
+CONFIG_CRYPTO_MANAGER2=y
+# CONFIG_CRYPTO_GF128MUL is not set
+# CONFIG_CRYPTO_NULL is not set
+CONFIG_CRYPTO_WORKQUEUE=y
+# CONFIG_CRYPTO_CRYPTD is not set
+# CONFIG_CRYPTO_AUTHENC is not set
+# CONFIG_CRYPTO_TEST is not set
+
+#
+# Authenticated Encryption with Associated Data
+#
+# CONFIG_CRYPTO_CCM is not set
+# CONFIG_CRYPTO_GCM is not set
+# CONFIG_CRYPTO_SEQIV is not set
+
+#
+# Block modes
+#
+CONFIG_CRYPTO_CBC=y
+# CONFIG_CRYPTO_CTR is not set
+# CONFIG_CRYPTO_CTS is not set
+# CONFIG_CRYPTO_ECB is not set
+# CONFIG_CRYPTO_LRW is not set
+# CONFIG_CRYPTO_PCBC is not set
+# CONFIG_CRYPTO_XTS is not set
+
+#
+# Hash modes
+#
+# CONFIG_CRYPTO_HMAC is not set
+# CONFIG_CRYPTO_XCBC is not set
+# CONFIG_CRYPTO_VMAC is not set
+
+#
+# Digest
+#
+# CONFIG_CRYPTO_CRC32C is not set
+# CONFIG_CRYPTO_GHASH is not set
+# CONFIG_CRYPTO_MD4 is not set
+CONFIG_CRYPTO_MD5=y
+# CONFIG_CRYPTO_MICHAEL_MIC is not set
+# CONFIG_CRYPTO_RMD128 is not set
+# CONFIG_CRYPTO_RMD160 is not set
+# CONFIG_CRYPTO_RMD256 is not set
+# CONFIG_CRYPTO_RMD320 is not set
+# CONFIG_CRYPTO_SHA1 is not set
+# CONFIG_CRYPTO_SHA256 is not set
+# CONFIG_CRYPTO_SHA512 is not set
+# CONFIG_CRYPTO_TGR192 is not set
+# CONFIG_CRYPTO_WP512 is not set
+
+#
+# Ciphers
+#
+# CONFIG_CRYPTO_AES is not set
+# CONFIG_CRYPTO_ANUBIS is not set
+# CONFIG_CRYPTO_ARC4 is not set
+# CONFIG_CRYPTO_BLOWFISH is not set
+# CONFIG_CRYPTO_CAMELLIA is not set
+# CONFIG_CRYPTO_CAST5 is not set
+# CONFIG_CRYPTO_CAST6 is not set
+CONFIG_CRYPTO_DES=y
+# CONFIG_CRYPTO_FCRYPT is not set
+# CONFIG_CRYPTO_KHAZAD is not set
+# CONFIG_CRYPTO_SALSA20 is not set
+# CONFIG_CRYPTO_SEED is not set
+# CONFIG_CRYPTO_SERPENT is not set
+# CONFIG_CRYPTO_TEA is not set
+# CONFIG_CRYPTO_TWOFISH is not set
+
+#
+# Compression
+#
+# CONFIG_CRYPTO_DEFLATE is not set
+# CONFIG_CRYPTO_ZLIB is not set
+# CONFIG_CRYPTO_LZO is not set
+
+#
+# Random Number Generation
+#
+# CONFIG_CRYPTO_ANSI_CPRNG is not set
+CONFIG_CRYPTO_HW=y
+# CONFIG_BINARY_PRINTF is not set
+
+#
+# Library routines
+#
+CONFIG_BITREVERSE=y
+CONFIG_GENERIC_FIND_LAST_BIT=y
+CONFIG_CRC_CCITT=y
+# CONFIG_CRC16 is not set
+# CONFIG_CRC_T10DIF is not set
+# CONFIG_CRC_ITU_T is not set
+CONFIG_CRC32=y
+# CONFIG_CRC7 is not set
+# CONFIG_LIBCRC32C is not set
+CONFIG_ZLIB_INFLATE=y
+CONFIG_ZLIB_DEFLATE=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAS_DMA=y
+CONFIG_NLATTR=y
diff --git a/arch/arm/configs/mv78xx0_defconfig b/arch/arm/configs/mv78xx0_defconfig
index 6afa2c108eaa..da4710dd1da1 100644
--- a/arch/arm/configs/mv78xx0_defconfig
+++ b/arch/arm/configs/mv78xx0_defconfig
@@ -176,6 +176,7 @@ CONFIG_ARCH_MV78XX0=y
 #
 CONFIG_MACH_DB78X00_BP=y
 CONFIG_MACH_RD78X00_MASA=y
+CONFIG_MACH_TERASTATION_WXL=y
 CONFIG_PLAT_ORION=y
 
 #
diff --git a/arch/arm/configs/mx1ads_defconfig b/arch/arm/configs/mx1ads_defconfig
deleted file mode 100644
index 3cabbb6d9276..000000000000
--- a/arch/arm/configs/mx1ads_defconfig
+++ /dev/null
@@ -1,742 +0,0 @@
-#
-# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.12-rc1-bk2
-# Sun Mar 27 02:15:46 2005
-#
-CONFIG_ARM=y
-CONFIG_MMU=y
-CONFIG_UID16=y
-CONFIG_RWSEM_GENERIC_SPINLOCK=y
-CONFIG_GENERIC_CALIBRATE_DELAY=y
-CONFIG_GENERIC_IOMAP=y
-
-#
-# Code maturity level options
-#
-CONFIG_EXPERIMENTAL=y
-CONFIG_CLEAN_COMPILE=y
-CONFIG_BROKEN_ON_SMP=y
-CONFIG_LOCK_KERNEL=y
-
-#
-# General setup
-#
-CONFIG_LOCALVERSION=""
-CONFIG_SWAP=y
-CONFIG_SYSVIPC=y
-# CONFIG_POSIX_MQUEUE is not set
-# CONFIG_BSD_PROCESS_ACCT is not set
-# CONFIG_SYSCTL is not set
-# CONFIG_AUDIT is not set
-# CONFIG_HOTPLUG is not set
-CONFIG_KOBJECT_UEVENT=y
-# CONFIG_IKCONFIG is not set
-CONFIG_EMBEDDED=y
-# CONFIG_KALLSYMS is not set
-CONFIG_BASE_FULL=y
-CONFIG_FUTEX=y
-CONFIG_EPOLL=y
-CONFIG_CC_OPTIMIZE_FOR_SIZE=y
-CONFIG_SHMEM=y
-CONFIG_CC_ALIGN_FUNCTIONS=0
-CONFIG_CC_ALIGN_LABELS=0
-CONFIG_CC_ALIGN_LOOPS=0
-CONFIG_CC_ALIGN_JUMPS=0
-# CONFIG_TINY_SHMEM is not set
-CONFIG_BASE_SMALL=0
-
-#
-# Loadable module support
-#
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_MODULE_FORCE_UNLOAD is not set
-CONFIG_OBSOLETE_MODPARM=y
-# CONFIG_MODVERSIONS is not set
-# CONFIG_MODULE_SRCVERSION_ALL is not set
-CONFIG_KMOD=y
-
-#
-# System Type
-#
-# CONFIG_ARCH_CLPS7500 is not set
-# CONFIG_ARCH_CLPS711X is not set
-# CONFIG_ARCH_CO285 is not set
-# CONFIG_ARCH_EBSA110 is not set
-# CONFIG_ARCH_FOOTBRIDGE is not set
-# CONFIG_ARCH_INTEGRATOR is not set
-# CONFIG_ARCH_IOP3XX is not set
-# CONFIG_ARCH_IXP4XX is not set
-# CONFIG_ARCH_IXP2000 is not set
-# CONFIG_ARCH_L7200 is not set
-# CONFIG_ARCH_PXA is not set
-# CONFIG_ARCH_RPC is not set
-# CONFIG_ARCH_SA1100 is not set
-# CONFIG_ARCH_S3C2410 is not set
-# CONFIG_ARCH_SHARK is not set
-# CONFIG_ARCH_LH7A40X is not set
-# CONFIG_ARCH_OMAP is not set
-# CONFIG_ARCH_VERSATILE is not set
-CONFIG_ARCH_IMX=y
-# CONFIG_ARCH_H720X is not set
-
-#
-# IMX Implementations
-#
-CONFIG_ARCH_MX1ADS=y
-
-#
-# Processor Type
-#
-CONFIG_CPU_ARM920T=y
-CONFIG_CPU_32v4=y
-CONFIG_CPU_ABRT_EV4T=y
-CONFIG_CPU_CACHE_V4WT=y
-CONFIG_CPU_CACHE_VIVT=y
-CONFIG_CPU_COPY_V4WB=y
-CONFIG_CPU_TLB_V4WBI=y
-
-#
-# Processor Features
-#
-# CONFIG_ARM_THUMB is not set
-# CONFIG_CPU_ICACHE_DISABLE is not set
-# CONFIG_CPU_DCACHE_DISABLE is not set
-# CONFIG_CPU_DCACHE_WRITETHROUGH is not set
-
-#
-# Bus support
-#
-CONFIG_ISA=y
-
-#
-# PCCARD (PCMCIA/CardBus) support
-#
-# CONFIG_PCCARD is not set
-
-#
-# Kernel Features
-#
-CONFIG_PREEMPT=y
-# CONFIG_LEDS is not set
-CONFIG_ALIGNMENT_TRAP=y
-
-#
-# Boot options
-#
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_CMDLINE="console=ttySMX0,57600n8 ip=bootp root=/dev/nfs"
-# CONFIG_XIP_KERNEL is not set
-
-#
-# Floating point emulation
-#
-
-#
-# At least one emulation must be selected
-#
-CONFIG_FPE_NWFPE=y
-CONFIG_FPE_NWFPE_XP=y
-CONFIG_FPE_FASTFPE=y
-
-#
-# Userspace binary formats
-#
-CONFIG_BINFMT_ELF=y
-# CONFIG_BINFMT_AOUT is not set
-# CONFIG_BINFMT_MISC is not set
-# CONFIG_ARTHUR is not set
-
-#
-# Power management options
-#
-# CONFIG_PM is not set
-
-#
-# Device Drivers
-#
-
-#
-# Generic Driver Options
-#
-CONFIG_STANDALONE=y
-CONFIG_PREVENT_FIRMWARE_BUILD=y
-# CONFIG_FW_LOADER is not set
-# CONFIG_DEBUG_DRIVER is not set
-
-#
-# Memory Technology Devices (MTD)
-#
-CONFIG_MTD=y
-# CONFIG_MTD_DEBUG is not set
-# CONFIG_MTD_CONCAT is not set
-CONFIG_MTD_PARTITIONS=y
-# CONFIG_MTD_REDBOOT_PARTS is not set
-# CONFIG_MTD_CMDLINE_PARTS is not set
-# CONFIG_MTD_AFS_PARTS is not set
-
-#
-# User Modules And Translation Layers
-#
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_BLOCK=y
-# CONFIG_FTL is not set
-# CONFIG_NFTL is not set
-# CONFIG_INFTL is not set
-
-#
-# RAM/ROM/Flash chip drivers
-#
-# CONFIG_MTD_CFI is not set
-# CONFIG_MTD_JEDECPROBE is not set
-CONFIG_MTD_MAP_BANK_WIDTH_1=y
-CONFIG_MTD_MAP_BANK_WIDTH_2=y
-CONFIG_MTD_MAP_BANK_WIDTH_4=y
-# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
-# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
-# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
-CONFIG_MTD_CFI_I1=y
-CONFIG_MTD_CFI_I2=y
-# CONFIG_MTD_CFI_I4 is not set
-# CONFIG_MTD_CFI_I8 is not set
-# CONFIG_MTD_RAM is not set
-CONFIG_MTD_ROM=y
-# CONFIG_MTD_ABSENT is not set
-
-#
-# Mapping drivers for chip access
-#
-# CONFIG_MTD_COMPLEX_MAPPINGS is not set
-
-#
-# Self-contained MTD device drivers
-#
-# CONFIG_MTD_SLRAM is not set
-# CONFIG_MTD_PHRAM is not set
-# CONFIG_MTD_MTDRAM is not set
-# CONFIG_MTD_BLKMTD is not set
-# CONFIG_MTD_BLOCK2MTD is not set
-
-#
-# Disk-On-Chip Device Drivers
-#
-# CONFIG_MTD_DOC2000 is not set
-# CONFIG_MTD_DOC2001 is not set
-# CONFIG_MTD_DOC2001PLUS is not set
-
-#
-# NAND Flash Device Drivers
-#
-# CONFIG_MTD_NAND is not set
-
-#
-# Parallel port support
-#
-# CONFIG_PARPORT is not set
-
-#
-# Plug and Play support
-#
-# CONFIG_PNP is not set
-
-#
-# Block devices
-#
-# CONFIG_BLK_DEV_FD is not set
-# CONFIG_BLK_DEV_XD is not set
-# CONFIG_BLK_DEV_COW_COMMON is not set
-CONFIG_BLK_DEV_LOOP=y
-# CONFIG_BLK_DEV_CRYPTOLOOP is not set
-# CONFIG_BLK_DEV_NBD is not set
-# CONFIG_BLK_DEV_RAM is not set
-CONFIG_BLK_DEV_RAM_COUNT=16
-CONFIG_INITRAMFS_SOURCE=""
-# CONFIG_CDROM_PKTCDVD is not set
-
-#
-# IO Schedulers
-#
-CONFIG_IOSCHED_NOOP=y
-# CONFIG_IOSCHED_AS is not set
-CONFIG_IOSCHED_DEADLINE=y
-CONFIG_IOSCHED_CFQ=y
-# CONFIG_ATA_OVER_ETH is not set
-
-#
-# SCSI device support
-#
-# CONFIG_SCSI is not set
-
-#
-# Multi-device support (RAID and LVM)
-#
-# CONFIG_MD is not set
-
-#
-# Fusion MPT device support
-#
-
-#
-# IEEE 1394 (FireWire) support
-#
-
-#
-# I2O device support
-#
-
-#
-# Networking support
-#
-CONFIG_NET=y
-
-#
-# Networking options
-#
-CONFIG_PACKET=m
-CONFIG_PACKET_MMAP=y
-# CONFIG_NETLINK_DEV is not set
-CONFIG_UNIX=y
-# CONFIG_NET_KEY is not set
-CONFIG_INET=y
-# CONFIG_IP_MULTICAST is not set
-# CONFIG_IP_ADVANCED_ROUTER is not set
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_DHCP=y
-CONFIG_IP_PNP_BOOTP=y
-# CONFIG_IP_PNP_RARP is not set
-# CONFIG_NET_IPIP is not set
-# CONFIG_NET_IPGRE is not set
-# CONFIG_ARPD is not set
-# CONFIG_SYN_COOKIES is not set
-# CONFIG_INET_AH is not set
-# CONFIG_INET_ESP is not set
-# CONFIG_INET_IPCOMP is not set
-# CONFIG_INET_TUNNEL is not set
-CONFIG_IP_TCPDIAG=y
-# CONFIG_IP_TCPDIAG_IPV6 is not set
-# CONFIG_IPV6 is not set
-# CONFIG_NETFILTER is not set
-
-#
-# SCTP Configuration (EXPERIMENTAL)
-#
-# CONFIG_IP_SCTP is not set
-# CONFIG_ATM is not set
-# CONFIG_BRIDGE is not set
-# CONFIG_VLAN_8021Q is not set
-# CONFIG_DECNET is not set
-# CONFIG_LLC2 is not set
-# CONFIG_IPX is not set
-# CONFIG_ATALK is not set
-# CONFIG_X25 is not set
-# CONFIG_LAPB is not set
-# CONFIG_NET_DIVERT is not set
-# CONFIG_ECONET is not set
-# CONFIG_WAN_ROUTER is not set
-
-#
-# QoS and/or fair queueing
-#
-# CONFIG_NET_SCHED is not set
-# CONFIG_NET_CLS_ROUTE is not set
-
-#
-# Network testing
-#
-# CONFIG_NET_PKTGEN is not set
-# CONFIG_NETPOLL is not set
-# CONFIG_NET_POLL_CONTROLLER is not set
-# CONFIG_HAMRADIO is not set
-# CONFIG_IRDA is not set
-# CONFIG_BT is not set
-CONFIG_NETDEVICES=y
-# CONFIG_DUMMY is not set
-# CONFIG_BONDING is not set
-# CONFIG_EQUALIZER is not set
-# CONFIG_TUN is not set
-
-#
-# ARCnet devices
-#
-# CONFIG_ARCNET is not set
-
-#
-# Ethernet (10 or 100Mbit)
-#
-CONFIG_NET_ETHERNET=y
-CONFIG_MII=y
-# CONFIG_NET_VENDOR_3COM is not set
-# CONFIG_LANCE is not set
-# CONFIG_NET_VENDOR_SMC is not set
-# CONFIG_SMC91X is not set
-# CONFIG_NET_VENDOR_RACAL is not set
-# CONFIG_AT1700 is not set
-# CONFIG_DEPCA is not set
-# CONFIG_HP100 is not set
-# CONFIG_NET_ISA is not set
-# CONFIG_NET_PCI is not set
-# CONFIG_NET_POCKET is not set
-
-#
-# Ethernet (1000 Mbit)
-#
-
-#
-# Ethernet (10000 Mbit)
-#
-
-#
-# Token Ring devices
-#
-# CONFIG_TR is not set
-
-#
-# Wireless LAN (non-hamradio)
-#
-# CONFIG_NET_RADIO is not set
-
-#
-# Wan interfaces
-#
-# CONFIG_WAN is not set
-CONFIG_PPP=y
-# CONFIG_PPP_MULTILINK is not set
-CONFIG_PPP_FILTER=y
-CONFIG_PPP_ASYNC=y
-# CONFIG_PPP_SYNC_TTY is not set
-CONFIG_PPP_DEFLATE=y
-CONFIG_PPP_BSDCOMP=y
-# CONFIG_PPPOE is not set
-# CONFIG_SLIP is not set
-# CONFIG_SHAPER is not set
-# CONFIG_NETCONSOLE is not set
-
-#
-# ISDN subsystem
-#
-# CONFIG_ISDN is not set
-
-#
-# Input device support
-#
-# CONFIG_INPUT is not set
-
-#
-# Hardware I/O ports
-#
-# CONFIG_SERIO is not set
-# CONFIG_GAMEPORT is not set
-CONFIG_SOUND_GAMEPORT=y
-
-#
-# Character devices
-#
-# CONFIG_VT is not set
-# CONFIG_SERIAL_NONSTANDARD is not set
-
-#
-# Serial drivers
-#
-# CONFIG_SERIAL_8250 is not set
-
-#
-# Non-8250 serial port support
-#
-CONFIG_SERIAL_IMX=y
-CONFIG_SERIAL_IMX_CONSOLE=y
-CONFIG_SERIAL_CORE=y
-CONFIG_SERIAL_CORE_CONSOLE=y
-CONFIG_UNIX98_PTYS=y
-# CONFIG_LEGACY_PTYS is not set
-
-#
-# IPMI
-#
-# CONFIG_IPMI_HANDLER is not set
-
-#
-# Watchdog Cards
-#
-# CONFIG_WATCHDOG is not set
-# CONFIG_NVRAM is not set
-CONFIG_RTC=m
-# CONFIG_DTLK is not set
-# CONFIG_R3964 is not set
-
-#
-# Ftape, the floppy tape device driver
-#
-# CONFIG_DRM is not set
-# CONFIG_RAW_DRIVER is not set
-
-#
-# TPM devices
-#
-# CONFIG_TCG_TPM is not set
-
-#
-# I2C support
-#
-# CONFIG_I2C is not set
-
-#
-# Misc devices
-#
-
-#
-# Multimedia devices
-#
-# CONFIG_VIDEO_DEV is not set
-
-#
-# Digital Video Broadcasting Devices
-#
-# CONFIG_DVB is not set
-
-#
-# Graphics support
-#
-# CONFIG_FB is not set
-
-#
-# Sound
-#
-# CONFIG_SOUND is not set
-
-#
-# USB support
-#
-CONFIG_USB_ARCH_HAS_HCD=y
-# CONFIG_USB_ARCH_HAS_OHCI is not set
-# CONFIG_USB is not set
-
-#
-# USB Gadget Support
-#
-# CONFIG_USB_GADGET is not set
-
-#
-# MMC/SD Card support
-#
-# CONFIG_MMC is not set
-
-#
-# File systems
-#
-# CONFIG_EXT2_FS is not set
-# CONFIG_EXT3_FS is not set
-# CONFIG_JBD is not set
-# CONFIG_REISERFS_FS is not set
-# CONFIG_JFS_FS is not set
-
-#
-# XFS support
-#
-# CONFIG_XFS_FS is not set
-# CONFIG_MINIX_FS is not set
-# CONFIG_ROMFS_FS is not set
-# CONFIG_QUOTA is not set
-CONFIG_DNOTIFY=y
-# CONFIG_AUTOFS_FS is not set
-# CONFIG_AUTOFS4_FS is not set
-
-#
-# CD-ROM/DVD Filesystems
-#
-# CONFIG_ISO9660_FS is not set
-# CONFIG_UDF_FS is not set
-
-#
-# DOS/FAT/NT Filesystems
-#
-CONFIG_FAT_FS=y
-CONFIG_MSDOS_FS=y
-CONFIG_VFAT_FS=y
-CONFIG_FAT_DEFAULT_CODEPAGE=437
-CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
-# CONFIG_NTFS_FS is not set
-
-#
-# Pseudo filesystems
-#
-CONFIG_PROC_FS=y
-CONFIG_SYSFS=y
-CONFIG_DEVFS_FS=y
-CONFIG_DEVFS_MOUNT=y
-# CONFIG_DEVFS_DEBUG is not set
-# CONFIG_DEVPTS_FS_XATTR is not set
-CONFIG_TMPFS=y
-# CONFIG_TMPFS_XATTR is not set
-# CONFIG_HUGETLB_PAGE is not set
-CONFIG_RAMFS=y
-
-#
-# Miscellaneous filesystems
-#
-# CONFIG_ADFS_FS is not set
-# CONFIG_AFFS_FS is not set
-# CONFIG_HFS_FS is not set
-# CONFIG_HFSPLUS_FS is not set
-# CONFIG_BEFS_FS is not set
-# CONFIG_BFS_FS is not set
-# CONFIG_EFS_FS is not set
-# CONFIG_JFFS_FS is not set
-CONFIG_JFFS2_FS=y
-CONFIG_JFFS2_FS_DEBUG=0
-# CONFIG_JFFS2_FS_NAND is not set
-# CONFIG_JFFS2_FS_NOR_ECC is not set
-# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
-CONFIG_JFFS2_ZLIB=y
-CONFIG_JFFS2_RTIME=y
-# CONFIG_JFFS2_RUBIN is not set
-CONFIG_CRAMFS=y
-# CONFIG_VXFS_FS is not set
-# CONFIG_HPFS_FS is not set
-# CONFIG_QNX4FS_FS is not set
-# CONFIG_SYSV_FS is not set
-# CONFIG_UFS_FS is not set
-
-#
-# Network File Systems
-#
-CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
-# CONFIG_NFS_V4 is not set
-# CONFIG_NFS_DIRECTIO is not set
-# CONFIG_NFSD is not set
-CONFIG_ROOT_NFS=y
-CONFIG_LOCKD=y
-CONFIG_LOCKD_V4=y
-CONFIG_SUNRPC=y
-# CONFIG_RPCSEC_GSS_KRB5 is not set
-# CONFIG_RPCSEC_GSS_SPKM3 is not set
-# CONFIG_SMB_FS is not set
-# CONFIG_CIFS is not set
-# CONFIG_NCP_FS is not set
-# CONFIG_CODA_FS is not set
-# CONFIG_AFS_FS is not set
-
-#
-# Partition Types
-#
-# CONFIG_PARTITION_ADVANCED is not set
-CONFIG_MSDOS_PARTITION=y
-
-#
-# Native Language Support
-#
-CONFIG_NLS=y
-CONFIG_NLS_DEFAULT="iso8859-1"
-# CONFIG_NLS_CODEPAGE_437 is not set
-# CONFIG_NLS_CODEPAGE_737 is not set
-# CONFIG_NLS_CODEPAGE_775 is not set
-# CONFIG_NLS_CODEPAGE_850 is not set
-# CONFIG_NLS_CODEPAGE_852 is not set
-# CONFIG_NLS_CODEPAGE_855 is not set
-# CONFIG_NLS_CODEPAGE_857 is not set
-# CONFIG_NLS_CODEPAGE_860 is not set
-# CONFIG_NLS_CODEPAGE_861 is not set
-# CONFIG_NLS_CODEPAGE_862 is not set
-# CONFIG_NLS_CODEPAGE_863 is not set
-# CONFIG_NLS_CODEPAGE_864 is not set
-# CONFIG_NLS_CODEPAGE_865 is not set
-# CONFIG_NLS_CODEPAGE_866 is not set
-# CONFIG_NLS_CODEPAGE_869 is not set
-# CONFIG_NLS_CODEPAGE_936 is not set
-# CONFIG_NLS_CODEPAGE_950 is not set
-# CONFIG_NLS_CODEPAGE_932 is not set
-# CONFIG_NLS_CODEPAGE_949 is not set
-# CONFIG_NLS_CODEPAGE_874 is not set
-# CONFIG_NLS_ISO8859_8 is not set
-# CONFIG_NLS_CODEPAGE_1250 is not set
-# CONFIG_NLS_CODEPAGE_1251 is not set
-# CONFIG_NLS_ASCII is not set
-# CONFIG_NLS_ISO8859_1 is not set
-# CONFIG_NLS_ISO8859_2 is not set
-# CONFIG_NLS_ISO8859_3 is not set
-# CONFIG_NLS_ISO8859_4 is not set
-# CONFIG_NLS_ISO8859_5 is not set
-# CONFIG_NLS_ISO8859_6 is not set
-# CONFIG_NLS_ISO8859_7 is not set
-# CONFIG_NLS_ISO8859_9 is not set
-# CONFIG_NLS_ISO8859_13 is not set
-# CONFIG_NLS_ISO8859_14 is not set
-# CONFIG_NLS_ISO8859_15 is not set
-# CONFIG_NLS_KOI8_R is not set
-# CONFIG_NLS_KOI8_U is not set
-# CONFIG_NLS_UTF8 is not set
-
-#
-# Profiling support
-#
-# CONFIG_PROFILING is not set
-
-#
-# Kernel hacking
-#
-# CONFIG_PRINTK_TIME is not set
-CONFIG_DEBUG_KERNEL=y
-CONFIG_MAGIC_SYSRQ=y
-CONFIG_LOG_BUF_SHIFT=14
-# CONFIG_SCHEDSTATS is not set
-# CONFIG_DEBUG_SLAB is not set
-CONFIG_DEBUG_PREEMPT=y
-# CONFIG_DEBUG_SPINLOCK is not set
-# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
-# CONFIG_DEBUG_KOBJECT is not set
-CONFIG_DEBUG_BUGVERBOSE=y
-CONFIG_DEBUG_INFO=y
-# CONFIG_DEBUG_FS is not set
-CONFIG_FRAME_POINTER=y
-CONFIG_DEBUG_USER=y
-CONFIG_DEBUG_ERRORS=y
-# CONFIG_DEBUG_LL is not set
-
-#
-# Security options
-#
-# CONFIG_KEYS is not set
-# CONFIG_SECURITY is not set
-
-#
-# Cryptographic options
-#
-CONFIG_CRYPTO=y
-# CONFIG_CRYPTO_HMAC is not set
-# CONFIG_CRYPTO_NULL is not set
-# CONFIG_CRYPTO_MD4 is not set
-# CONFIG_CRYPTO_MD5 is not set
-# CONFIG_CRYPTO_SHA1 is not set
-# CONFIG_CRYPTO_SHA256 is not set
-# CONFIG_CRYPTO_SHA512 is not set
-# CONFIG_CRYPTO_WP512 is not set
-# CONFIG_CRYPTO_TGR192 is not set
-# CONFIG_CRYPTO_DES is not set
-# CONFIG_CRYPTO_BLOWFISH is not set
-# CONFIG_CRYPTO_TWOFISH is not set
-# CONFIG_CRYPTO_SERPENT is not set
-# CONFIG_CRYPTO_AES is not set
-# CONFIG_CRYPTO_CAST5 is not set
-# CONFIG_CRYPTO_CAST6 is not set
-# CONFIG_CRYPTO_TEA is not set
-# CONFIG_CRYPTO_ARC4 is not set
-# CONFIG_CRYPTO_KHAZAD is not set
-# CONFIG_CRYPTO_ANUBIS is not set
-# CONFIG_CRYPTO_DEFLATE is not set
-# CONFIG_CRYPTO_MICHAEL_MIC is not set
-# CONFIG_CRYPTO_CRC32C is not set
-# CONFIG_CRYPTO_TEST is not set
-
-#
-# Hardware crypto devices
-#
-
-#
-# Library routines
-#
-CONFIG_CRC_CCITT=y
-CONFIG_CRC32=y
-# CONFIG_LIBCRC32C is not set
-CONFIG_ZLIB_INFLATE=y
-CONFIG_ZLIB_DEFLATE=y
diff --git a/arch/arm/configs/mx27_defconfig b/arch/arm/configs/mx27_defconfig
index edfdd6faf800..b4c1366e9e0d 100644
--- a/arch/arm/configs/mx27_defconfig
+++ b/arch/arm/configs/mx27_defconfig
@@ -200,7 +200,7 @@ CONFIG_MACH_MX27ADS=y
 CONFIG_MACH_PCM038=y
 CONFIG_MACH_PCM970_BASEBOARD=y
 CONFIG_MACH_MX27_3DS=y
-CONFIG_MACH_MX27LITE=y
+CONFIG_MACH_IMX27LITE=y
 CONFIG_MXC_IRQ_PRIOR=y
 CONFIG_MXC_PWM=y
 
diff --git a/arch/arm/configs/mx51_defconfig b/arch/arm/configs/mx51_defconfig
new file mode 100644
index 000000000000..c88e9527a8ec
--- /dev/null
+++ b/arch/arm/configs/mx51_defconfig
@@ -0,0 +1,1286 @@
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.33-rc6
+# Tue Feb  2 15:20:48 2010
+#
+CONFIG_ARM=y
+CONFIG_SYS_SUPPORTS_APM_EMULATION=y
+CONFIG_GENERIC_GPIO=y
+CONFIG_GENERIC_TIME=y
+CONFIG_GENERIC_CLOCKEVENTS=y
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_HAVE_LATENCYTOP_SUPPORT=y
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+CONFIG_HARDIRQS_SW_RESEND=y
+CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_ARCH_MTD_XIP=y
+CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
+CONFIG_VECTORS_BASE=0xffff0000
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+CONFIG_CONSTRUCTORS=y
+
+#
+# General setup
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+CONFIG_LOCALVERSION=""
+# CONFIG_LOCALVERSION_AUTO is not set
+CONFIG_HAVE_KERNEL_GZIP=y
+CONFIG_HAVE_KERNEL_LZO=y
+CONFIG_KERNEL_GZIP=y
+# CONFIG_KERNEL_BZIP2 is not set
+# CONFIG_KERNEL_LZMA is not set
+# CONFIG_KERNEL_LZO is not set
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+CONFIG_SYSVIPC_SYSCTL=y
+# CONFIG_POSIX_MQUEUE is not set
+# CONFIG_BSD_PROCESS_ACCT is not set
+# CONFIG_TASKSTATS is not set
+# CONFIG_AUDIT is not set
+
+#
+# RCU Subsystem
+#
+CONFIG_TREE_RCU=y
+# CONFIG_TREE_PREEMPT_RCU is not set
+# CONFIG_TINY_RCU is not set
+# CONFIG_RCU_TRACE is not set
+CONFIG_RCU_FANOUT=32
+# CONFIG_RCU_FANOUT_EXACT is not set
+# CONFIG_TREE_RCU_TRACE is not set
+# CONFIG_IKCONFIG is not set
+CONFIG_LOG_BUF_SHIFT=18
+# CONFIG_GROUP_SCHED is not set
+# CONFIG_CGROUPS is not set
+# CONFIG_SYSFS_DEPRECATED_V2 is not set
+CONFIG_RELAY=y
+# CONFIG_NAMESPACES is not set
+# CONFIG_BLK_DEV_INITRD is not set
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_SYSCTL=y
+CONFIG_ANON_INODES=y
+CONFIG_EMBEDDED=y
+CONFIG_UID16=y
+CONFIG_SYSCTL_SYSCALL=y
+CONFIG_KALLSYMS=y
+# CONFIG_KALLSYMS_ALL is not set
+# CONFIG_KALLSYMS_EXTRA_PASS is not set
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_ELF_CORE=y
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+CONFIG_EPOLL=y
+CONFIG_SIGNALFD=y
+CONFIG_TIMERFD=y
+CONFIG_EVENTFD=y
+CONFIG_SHMEM=y
+CONFIG_AIO=y
+
+#
+# Kernel Performance Events And Counters
+#
+CONFIG_VM_EVENT_COUNTERS=y
+# CONFIG_SLUB_DEBUG is not set
+# CONFIG_COMPAT_BRK is not set
+# CONFIG_SLAB is not set
+CONFIG_SLUB=y
+# CONFIG_SLOB is not set
+# CONFIG_PROFILING is not set
+CONFIG_HAVE_OPROFILE=y
+# CONFIG_KPROBES is not set
+CONFIG_HAVE_KPROBES=y
+CONFIG_HAVE_KRETPROBES=y
+CONFIG_HAVE_CLK=y
+
+#
+# GCOV-based kernel profiling
+#
+# CONFIG_GCOV_KERNEL is not set
+# CONFIG_SLOW_WORK is not set
+CONFIG_HAVE_GENERIC_DMA_COHERENT=y
+CONFIG_RT_MUTEXES=y
+CONFIG_BASE_SMALL=0
+CONFIG_MODULES=y
+# CONFIG_MODULE_FORCE_LOAD is not set
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_MODULE_FORCE_UNLOAD is not set
+CONFIG_MODVERSIONS=y
+CONFIG_MODULE_SRCVERSION_ALL=y
+CONFIG_BLOCK=y
+# CONFIG_LBDAF is not set
+# CONFIG_BLK_DEV_BSG is not set
+# CONFIG_BLK_DEV_INTEGRITY is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_CFQ=y
+# CONFIG_DEFAULT_DEADLINE is not set
+CONFIG_DEFAULT_CFQ=y
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="cfq"
+# CONFIG_INLINE_SPIN_TRYLOCK is not set
+# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set
+# CONFIG_INLINE_SPIN_LOCK is not set
+# CONFIG_INLINE_SPIN_LOCK_BH is not set
+# CONFIG_INLINE_SPIN_LOCK_IRQ is not set
+# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set
+CONFIG_INLINE_SPIN_UNLOCK=y
+# CONFIG_INLINE_SPIN_UNLOCK_BH is not set
+CONFIG_INLINE_SPIN_UNLOCK_IRQ=y
+# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set
+# CONFIG_INLINE_READ_TRYLOCK is not set
+# CONFIG_INLINE_READ_LOCK is not set
+# CONFIG_INLINE_READ_LOCK_BH is not set
+# CONFIG_INLINE_READ_LOCK_IRQ is not set
+# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set
+CONFIG_INLINE_READ_UNLOCK=y
+# CONFIG_INLINE_READ_UNLOCK_BH is not set
+CONFIG_INLINE_READ_UNLOCK_IRQ=y
+# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set
+# CONFIG_INLINE_WRITE_TRYLOCK is not set
+# CONFIG_INLINE_WRITE_LOCK is not set
+# CONFIG_INLINE_WRITE_LOCK_BH is not set
+# CONFIG_INLINE_WRITE_LOCK_IRQ is not set
+# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set
+CONFIG_INLINE_WRITE_UNLOCK=y
+# CONFIG_INLINE_WRITE_UNLOCK_BH is not set
+CONFIG_INLINE_WRITE_UNLOCK_IRQ=y
+# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set
+# CONFIG_MUTEX_SPIN_ON_OWNER is not set
+CONFIG_FREEZER=y
+
+#
+# System Type
+#
+CONFIG_MMU=y
+# CONFIG_ARCH_AAEC2000 is not set
+# CONFIG_ARCH_INTEGRATOR is not set
+# CONFIG_ARCH_REALVIEW is not set
+# CONFIG_ARCH_VERSATILE is not set
+# CONFIG_ARCH_AT91 is not set
+# CONFIG_ARCH_CLPS711X is not set
+# CONFIG_ARCH_GEMINI is not set
+# CONFIG_ARCH_EBSA110 is not set
+# CONFIG_ARCH_EP93XX is not set
+# CONFIG_ARCH_FOOTBRIDGE is not set
+CONFIG_ARCH_MXC=y
+# CONFIG_ARCH_STMP3XXX is not set
+# CONFIG_ARCH_NETX is not set
+# CONFIG_ARCH_H720X is not set
+# CONFIG_ARCH_NOMADIK is not set
+# CONFIG_ARCH_IOP13XX is not set
+# CONFIG_ARCH_IOP32X is not set
+# CONFIG_ARCH_IOP33X is not set
+# CONFIG_ARCH_IXP23XX is not set
+# CONFIG_ARCH_IXP2000 is not set
+# CONFIG_ARCH_IXP4XX is not set
+# CONFIG_ARCH_L7200 is not set
+# CONFIG_ARCH_DOVE is not set
+# CONFIG_ARCH_KIRKWOOD is not set
+# CONFIG_ARCH_LOKI is not set
+# CONFIG_ARCH_MV78XX0 is not set
+# CONFIG_ARCH_ORION5X is not set
+# CONFIG_ARCH_MMP is not set
+# CONFIG_ARCH_KS8695 is not set
+# CONFIG_ARCH_NS9XXX is not set
+# CONFIG_ARCH_W90X900 is not set
+# CONFIG_ARCH_PNX4008 is not set
+# CONFIG_ARCH_PXA is not set
+# CONFIG_ARCH_MSM is not set
+# CONFIG_ARCH_RPC is not set
+# CONFIG_ARCH_SA1100 is not set
+# CONFIG_ARCH_S3C2410 is not set
+# CONFIG_ARCH_S3C64XX is not set
+# CONFIG_ARCH_S5PC1XX is not set
+# CONFIG_ARCH_SHARK is not set
+# CONFIG_ARCH_LH7A40X is not set
+# CONFIG_ARCH_U300 is not set
+# CONFIG_ARCH_DAVINCI is not set
+# CONFIG_ARCH_OMAP is not set
+# CONFIG_ARCH_BCMRING is not set
+# CONFIG_ARCH_U8500 is not set
+
+#
+# Freescale MXC Implementations
+#
+# CONFIG_ARCH_MX1 is not set
+# CONFIG_ARCH_MX2 is not set
+# CONFIG_ARCH_MX25 is not set
+# CONFIG_ARCH_MX3 is not set
+# CONFIG_ARCH_MXC91231 is not set
+CONFIG_ARCH_MX5=y
+CONFIG_ARCH_MX51=y
+
+#
+# MX5 platforms:
+#
+CONFIG_MACH_MX51_BABBAGE=y
+# CONFIG_MXC_IRQ_PRIOR is not set
+CONFIG_MXC_TZIC=y
+# CONFIG_MXC_PWM is not set
+CONFIG_ARCH_MXC_IOMUX_V3=y
+
+#
+# Processor Type
+#
+CONFIG_CPU_32v6K=y
+CONFIG_CPU_V7=y
+CONFIG_CPU_32v7=y
+CONFIG_CPU_ABRT_EV7=y
+CONFIG_CPU_PABRT_V7=y
+CONFIG_CPU_CACHE_V7=y
+CONFIG_CPU_CACHE_VIPT=y
+CONFIG_CPU_COPY_V6=y
+CONFIG_CPU_TLB_V7=y
+CONFIG_CPU_HAS_ASID=y
+CONFIG_CPU_CP15=y
+CONFIG_CPU_CP15_MMU=y
+
+#
+# Processor Features
+#
+CONFIG_ARM_THUMB=y
+# CONFIG_ARM_THUMBEE is not set
+# CONFIG_CPU_ICACHE_DISABLE is not set
+# CONFIG_CPU_DCACHE_DISABLE is not set
+# CONFIG_CPU_BPREDICT_DISABLE is not set
+CONFIG_HAS_TLS_REG=y
+CONFIG_ARM_L1_CACHE_SHIFT=5
+# CONFIG_ARM_ERRATA_430973 is not set
+# CONFIG_ARM_ERRATA_458693 is not set
+# CONFIG_ARM_ERRATA_460075 is not set
+CONFIG_COMMON_CLKDEV=y
+
+#
+# Bus support
+#
+# CONFIG_PCI_SYSCALL is not set
+# CONFIG_ARCH_SUPPORTS_MSI is not set
+# CONFIG_PCCARD is not set
+
+#
+# Kernel Features
+#
+CONFIG_TICK_ONESHOT=y
+CONFIG_NO_HZ=y
+CONFIG_HIGH_RES_TIMERS=y
+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
+CONFIG_VMSPLIT_3G=y
+# CONFIG_VMSPLIT_2G is not set
+# CONFIG_VMSPLIT_1G is not set
+CONFIG_PAGE_OFFSET=0xC0000000
+# CONFIG_PREEMPT_NONE is not set
+CONFIG_PREEMPT_VOLUNTARY=y
+# CONFIG_PREEMPT is not set
+CONFIG_HZ=100
+# CONFIG_THUMB2_KERNEL is not set
+CONFIG_AEABI=y
+# CONFIG_OABI_COMPAT is not set
+# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
+# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
+# CONFIG_HIGHMEM is not set
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_FLATMEM_MANUAL=y
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+# CONFIG_SPARSEMEM_MANUAL is not set
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+CONFIG_PAGEFLAGS_EXTENDED=y
+CONFIG_SPLIT_PTLOCK_CPUS=4
+# CONFIG_PHYS_ADDR_T_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=0
+CONFIG_VIRT_TO_BUS=y
+# CONFIG_KSM is not set
+CONFIG_DEFAULT_MMAP_MIN_ADDR=32768
+CONFIG_ALIGNMENT_TRAP=y
+# CONFIG_UACCESS_WITH_MEMCPY is not set
+
+#
+# Boot options
+#
+CONFIG_ZBOOT_ROM_TEXT=0
+CONFIG_ZBOOT_ROM_BSS=0
+CONFIG_CMDLINE="noinitrd console=ttymxc0,115200 root=/dev/nfs nfsroot=192.168.0.101:/shared/nfs ip=dhcp"
+# CONFIG_XIP_KERNEL is not set
+# CONFIG_KEXEC is not set
+
+#
+# CPU Power Management
+#
+# CONFIG_CPU_IDLE is not set
+
+#
+# Floating point emulation
+#
+
+#
+# At least one emulation must be selected
+#
+CONFIG_VFP=y
+CONFIG_VFPv3=y
+CONFIG_NEON=y
+
+#
+# Userspace binary formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+CONFIG_HAVE_AOUT=y
+# CONFIG_BINFMT_AOUT is not set
+CONFIG_BINFMT_MISC=m
+
+#
+# Power management options
+#
+CONFIG_PM=y
+CONFIG_PM_DEBUG=y
+# CONFIG_PM_VERBOSE is not set
+CONFIG_CAN_PM_TRACE=y
+CONFIG_PM_SLEEP=y
+CONFIG_SUSPEND=y
+CONFIG_PM_TEST_SUSPEND=y
+CONFIG_SUSPEND_FREEZER=y
+# CONFIG_APM_EMULATION is not set
+# CONFIG_PM_RUNTIME is not set
+CONFIG_ARCH_SUSPEND_POSSIBLE=y
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+CONFIG_PACKET_MMAP=y
+CONFIG_UNIX=y
+# CONFIG_NET_KEY is not set
+CONFIG_INET=y
+# CONFIG_IP_MULTICAST is not set
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_FIB_HASH=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+# CONFIG_IP_PNP_BOOTP is not set
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_ARPD is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_XFRM_TUNNEL is not set
+# CONFIG_INET_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
+# CONFIG_INET_XFRM_MODE_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_BEET is not set
+# CONFIG_INET_LRO is not set
+CONFIG_INET_DIAG=y
+CONFIG_INET_TCP_DIAG=y
+# CONFIG_TCP_CONG_ADVANCED is not set
+CONFIG_TCP_CONG_CUBIC=y
+CONFIG_DEFAULT_TCP_CONG="cubic"
+# CONFIG_TCP_MD5SIG is not set
+# CONFIG_IPV6 is not set
+# CONFIG_NETWORK_SECMARK is not set
+# CONFIG_NETFILTER is not set
+# CONFIG_IP_DCCP is not set
+# CONFIG_IP_SCTP is not set
+# CONFIG_RDS is not set
+# CONFIG_TIPC is not set
+# CONFIG_ATM is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_NET_DSA is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_DECNET is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_PHONET is not set
+# CONFIG_IEEE802154 is not set
+# CONFIG_NET_SCHED is not set
+# CONFIG_DCB is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# CONFIG_HAMRADIO is not set
+# CONFIG_CAN is not set
+# CONFIG_IRDA is not set
+# CONFIG_BT is not set
+# CONFIG_AF_RXRPC is not set
+# CONFIG_WIRELESS is not set
+# CONFIG_WIMAX is not set
+# CONFIG_RFKILL is not set
+# CONFIG_NET_9P is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_UEVENT_HELPER_PATH=""
+# CONFIG_STANDALONE is not set
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+CONFIG_FW_LOADER=y
+CONFIG_FIRMWARE_IN_KERNEL=y
+CONFIG_EXTRA_FIRMWARE=""
+# CONFIG_DEBUG_DRIVER is not set
+# CONFIG_DEBUG_DEVRES is not set
+# CONFIG_SYS_HYPERVISOR is not set
+CONFIG_CONNECTOR=y
+CONFIG_PROC_EVENTS=y
+# CONFIG_MTD is not set
+# CONFIG_PARPORT is not set
+CONFIG_BLK_DEV=y
+# CONFIG_BLK_DEV_COW_COMMON is not set
+CONFIG_BLK_DEV_LOOP=y
+# CONFIG_BLK_DEV_CRYPTOLOOP is not set
+# CONFIG_BLK_DEV_DRBD is not set
+# CONFIG_BLK_DEV_NBD is not set
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_COUNT=16
+CONFIG_BLK_DEV_RAM_SIZE=65536
+# CONFIG_BLK_DEV_XIP is not set
+# CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_ATA_OVER_ETH is not set
+# CONFIG_MG_DISK is not set
+# CONFIG_MISC_DEVICES is not set
+CONFIG_HAVE_IDE=y
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+# CONFIG_RAID_ATTRS is not set
+CONFIG_SCSI=y
+CONFIG_SCSI_DMA=y
+# CONFIG_SCSI_TGT is not set
+# CONFIG_SCSI_NETLINK is not set
+# CONFIG_SCSI_PROC_FS is not set
+
+#
+# SCSI support type (disk, tape, CD-ROM)
+#
+CONFIG_BLK_DEV_SD=y
+# CONFIG_CHR_DEV_ST is not set
+# CONFIG_CHR_DEV_OSST is not set
+# CONFIG_BLK_DEV_SR is not set
+# CONFIG_CHR_DEV_SG is not set
+# CONFIG_CHR_DEV_SCH is not set
+CONFIG_SCSI_MULTI_LUN=y
+CONFIG_SCSI_CONSTANTS=y
+CONFIG_SCSI_LOGGING=y
+CONFIG_SCSI_SCAN_ASYNC=y
+CONFIG_SCSI_WAIT_SCAN=m
+
+#
+# SCSI Transports
+#
+# CONFIG_SCSI_SPI_ATTRS is not set
+# CONFIG_SCSI_FC_ATTRS is not set
+# CONFIG_SCSI_ISCSI_ATTRS is not set
+# CONFIG_SCSI_SAS_LIBSAS is not set
+# CONFIG_SCSI_SRP_ATTRS is not set
+# CONFIG_SCSI_LOWLEVEL is not set
+# CONFIG_SCSI_DH is not set
+# CONFIG_SCSI_OSD_INITIATOR is not set
+CONFIG_ATA=m
+# CONFIG_ATA_NONSTANDARD is not set
+CONFIG_ATA_VERBOSE_ERROR=y
+CONFIG_SATA_PMP=y
+CONFIG_ATA_SFF=y
+# CONFIG_SATA_MV is not set
+# CONFIG_PATA_PLATFORM is not set
+# CONFIG_MD is not set
+CONFIG_NETDEVICES=y
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_MACVLAN is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+# CONFIG_VETH is not set
+CONFIG_PHYLIB=y
+
+#
+# MII PHY device drivers
+#
+CONFIG_MARVELL_PHY=y
+CONFIG_DAVICOM_PHY=y
+CONFIG_QSEMI_PHY=y
+CONFIG_LXT_PHY=y
+CONFIG_CICADA_PHY=y
+CONFIG_VITESSE_PHY=y
+CONFIG_SMSC_PHY=y
+CONFIG_BROADCOM_PHY=y
+CONFIG_ICPLUS_PHY=y
+CONFIG_REALTEK_PHY=y
+CONFIG_NATIONAL_PHY=y
+CONFIG_STE10XP=y
+CONFIG_LSI_ET1011C_PHY=y
+CONFIG_FIXED_PHY=y
+CONFIG_MDIO_BITBANG=y
+CONFIG_MDIO_GPIO=y
+CONFIG_NET_ETHERNET=y
+CONFIG_MII=m
+# CONFIG_AX88796 is not set
+# CONFIG_SMC91X is not set
+# CONFIG_DM9000 is not set
+# CONFIG_ETHOC is not set
+# CONFIG_SMC911X is not set
+# CONFIG_SMSC911X is not set
+# CONFIG_DNET is not set
+# CONFIG_IBM_NEW_EMAC_ZMII is not set
+# CONFIG_IBM_NEW_EMAC_RGMII is not set
+# CONFIG_IBM_NEW_EMAC_TAH is not set
+# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
+# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
+# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
+# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
+# CONFIG_B44 is not set
+# CONFIG_KS8842 is not set
+# CONFIG_KS8851_MLL is not set
+CONFIG_FEC=y
+# CONFIG_FEC2 is not set
+# CONFIG_NETDEV_1000 is not set
+# CONFIG_NETDEV_10000 is not set
+# CONFIG_WLAN is not set
+
+#
+# Enable WiMAX (Networking options) to see the WiMAX drivers
+#
+# CONFIG_WAN is not set
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+# CONFIG_NETCONSOLE is not set
+# CONFIG_NETPOLL is not set
+# CONFIG_NET_POLL_CONTROLLER is not set
+# CONFIG_ISDN is not set
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+CONFIG_INPUT_FF_MEMLESS=m
+# CONFIG_INPUT_POLLDEV is not set
+# CONFIG_INPUT_SPARSEKMAP is not set
+
+#
+# Userland interfaces
+#
+CONFIG_INPUT_MOUSEDEV=y
+# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+# CONFIG_INPUT_JOYDEV is not set
+CONFIG_INPUT_EVDEV=y
+CONFIG_INPUT_EVBUG=m
+
+#
+# Input Device Drivers
+#
+CONFIG_INPUT_KEYBOARD=y
+# CONFIG_KEYBOARD_ADP5588 is not set
+CONFIG_KEYBOARD_ATKBD=y
+# CONFIG_QT2160 is not set
+# CONFIG_KEYBOARD_LKKBD is not set
+# CONFIG_KEYBOARD_GPIO is not set
+# CONFIG_KEYBOARD_MATRIX is not set
+# CONFIG_KEYBOARD_LM8323 is not set
+# CONFIG_KEYBOARD_MAX7359 is not set
+# CONFIG_KEYBOARD_NEWTON is not set
+# CONFIG_KEYBOARD_OPENCORES is not set
+# CONFIG_KEYBOARD_STOWAWAY is not set
+# CONFIG_KEYBOARD_SUNKBD is not set
+# CONFIG_KEYBOARD_XTKBD is not set
+CONFIG_INPUT_MOUSE=y
+CONFIG_MOUSE_PS2=m
+CONFIG_MOUSE_PS2_ALPS=y
+CONFIG_MOUSE_PS2_LOGIPS2PP=y
+CONFIG_MOUSE_PS2_SYNAPTICS=y
+CONFIG_MOUSE_PS2_TRACKPOINT=y
+CONFIG_MOUSE_PS2_ELANTECH=y
+# CONFIG_MOUSE_PS2_SENTELIC is not set
+# CONFIG_MOUSE_PS2_TOUCHKIT is not set
+# CONFIG_MOUSE_SERIAL is not set
+# CONFIG_MOUSE_VSXXXAA is not set
+# CONFIG_MOUSE_GPIO is not set
+# CONFIG_MOUSE_SYNAPTICS_I2C is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TABLET is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Hardware I/O ports
+#
+CONFIG_SERIO=y
+CONFIG_SERIO_SERPORT=m
+CONFIG_SERIO_LIBPS2=y
+# CONFIG_SERIO_RAW is not set
+# CONFIG_SERIO_ALTERA_PS2 is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_CONSOLE_TRANSLATIONS=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+CONFIG_VT_HW_CONSOLE_BINDING=y
+# CONFIG_DEVKMEM is not set
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+# CONFIG_SERIAL_8250 is not set
+
+#
+# Non-8250 serial port support
+#
+CONFIG_SERIAL_IMX=y
+CONFIG_SERIAL_IMX_CONSOLE=y
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+CONFIG_UNIX98_PTYS=y
+# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
+# CONFIG_LEGACY_PTYS is not set
+# CONFIG_IPMI_HANDLER is not set
+CONFIG_HW_RANDOM=y
+# CONFIG_HW_RANDOM_TIMERIOMEM is not set
+# CONFIG_R3964 is not set
+# CONFIG_RAW_DRIVER is not set
+# CONFIG_TCG_TPM is not set
+CONFIG_I2C=y
+CONFIG_I2C_BOARDINFO=y
+# CONFIG_I2C_COMPAT is not set
+CONFIG_I2C_CHARDEV=m
+# CONFIG_I2C_HELPER_AUTO is not set
+
+#
+# I2C Algorithms
+#
+CONFIG_I2C_ALGOBIT=m
+CONFIG_I2C_ALGOPCF=m
+CONFIG_I2C_ALGOPCA=m
+
+#
+# I2C Hardware Bus support
+#
+
+#
+# I2C system bus drivers (mostly embedded / system-on-chip)
+#
+# CONFIG_I2C_DESIGNWARE is not set
+# CONFIG_I2C_GPIO is not set
+# CONFIG_I2C_IMX is not set
+# CONFIG_I2C_OCORES is not set
+# CONFIG_I2C_SIMTEC is not set
+
+#
+# External I2C/SMBus adapter drivers
+#
+# CONFIG_I2C_PARPORT_LIGHT is not set
+# CONFIG_I2C_TAOS_EVM is not set
+
+#
+# Other I2C/SMBus bus drivers
+#
+# CONFIG_I2C_PCA_PLATFORM is not set
+# CONFIG_I2C_STUB is not set
+
+#
+# Miscellaneous I2C Chip support
+#
+# CONFIG_SENSORS_TSL2550 is not set
+# CONFIG_I2C_DEBUG_CORE is not set
+# CONFIG_I2C_DEBUG_ALGO is not set
+# CONFIG_I2C_DEBUG_BUS is not set
+# CONFIG_I2C_DEBUG_CHIP is not set
+# CONFIG_SPI is not set
+
+#
+# PPS support
+#
+# CONFIG_PPS is not set
+CONFIG_ARCH_REQUIRE_GPIOLIB=y
+CONFIG_GPIOLIB=y
+# CONFIG_DEBUG_GPIO is not set
+CONFIG_GPIO_SYSFS=y
+
+#
+# Memory mapped GPIO expanders:
+#
+
+#
+# I2C GPIO expanders:
+#
+# CONFIG_GPIO_MAX732X is not set
+# CONFIG_GPIO_PCA953X is not set
+# CONFIG_GPIO_PCF857X is not set
+# CONFIG_GPIO_ADP5588 is not set
+
+#
+# PCI GPIO expanders:
+#
+
+#
+# SPI GPIO expanders:
+#
+
+#
+# AC97 GPIO expanders:
+#
+# CONFIG_W1 is not set
+# CONFIG_POWER_SUPPLY is not set
+# CONFIG_HWMON is not set
+# CONFIG_THERMAL is not set
+# CONFIG_WATCHDOG is not set
+CONFIG_SSB_POSSIBLE=y
+
+#
+# Sonics Silicon Backplane
+#
+# CONFIG_SSB is not set
+
+#
+# Multifunction device drivers
+#
+# CONFIG_MFD_CORE is not set
+# CONFIG_MFD_SM501 is not set
+# CONFIG_MFD_ASIC3 is not set
+# CONFIG_HTC_EGPIO is not set
+# CONFIG_HTC_PASIC3 is not set
+# CONFIG_TPS65010 is not set
+# CONFIG_TWL4030_CORE is not set
+# CONFIG_MFD_TMIO is not set
+# CONFIG_MFD_T7L66XB is not set
+# CONFIG_MFD_TC6387XB is not set
+# CONFIG_MFD_TC6393XB is not set
+# CONFIG_PMIC_DA903X is not set
+# CONFIG_PMIC_ADP5520 is not set
+# CONFIG_MFD_WM8400 is not set
+# CONFIG_MFD_WM831X is not set
+# CONFIG_MFD_WM8350_I2C is not set
+# CONFIG_MFD_PCF50633 is not set
+# CONFIG_AB3100_CORE is not set
+# CONFIG_MFD_88PM8607 is not set
+# CONFIG_REGULATOR is not set
+# CONFIG_MEDIA_SUPPORT is not set
+
+#
+# Graphics support
+#
+# CONFIG_VGASTATE is not set
+# CONFIG_VIDEO_OUTPUT_CONTROL is not set
+# CONFIG_FB is not set
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+
+#
+# Display device support
+#
+# CONFIG_DISPLAY_SUPPORT is not set
+
+#
+# Console display driver support
+#
+# CONFIG_VGA_CONSOLE is not set
+CONFIG_DUMMY_CONSOLE=y
+# CONFIG_SOUND is not set
+# CONFIG_HID_SUPPORT is not set
+# CONFIG_USB_SUPPORT is not set
+CONFIG_MMC=y
+# CONFIG_MMC_DEBUG is not set
+# CONFIG_MMC_UNSAFE_RESUME is not set
+
+#
+# MMC/SD/SDIO Card Drivers
+#
+CONFIG_MMC_BLOCK=m
+CONFIG_MMC_BLOCK_BOUNCE=y
+# CONFIG_SDIO_UART is not set
+# CONFIG_MMC_TEST is not set
+
+#
+# MMC/SD/SDIO Host Controller Drivers
+#
+CONFIG_MMC_SDHCI=m
+# CONFIG_MMC_SDHCI_PLTFM is not set
+# CONFIG_MMC_AT91 is not set
+# CONFIG_MMC_ATMELMCI is not set
+# CONFIG_MMC_MXC is not set
+# CONFIG_MEMSTICK is not set
+CONFIG_NEW_LEDS=y
+CONFIG_LEDS_CLASS=m
+
+#
+# LED drivers
+#
+# CONFIG_LEDS_PCA9532 is not set
+# CONFIG_LEDS_GPIO is not set
+# CONFIG_LEDS_LP3944 is not set
+# CONFIG_LEDS_PCA955X is not set
+# CONFIG_LEDS_BD2802 is not set
+# CONFIG_LEDS_LT3593 is not set
+
+#
+# LED Triggers
+#
+# CONFIG_LEDS_TRIGGERS is not set
+# CONFIG_ACCESSIBILITY is not set
+CONFIG_RTC_LIB=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_HCTOSYS=y
+CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
+# CONFIG_RTC_DEBUG is not set
+
+#
+# RTC interfaces
+#
+CONFIG_RTC_INTF_SYSFS=y
+CONFIG_RTC_INTF_PROC=y
+CONFIG_RTC_INTF_DEV=y
+CONFIG_RTC_INTF_DEV_UIE_EMUL=y
+# CONFIG_RTC_DRV_TEST is not set
+
+#
+# I2C RTC drivers
+#
+# CONFIG_RTC_DRV_DS1307 is not set
+# CONFIG_RTC_DRV_DS1374 is not set
+# CONFIG_RTC_DRV_DS1672 is not set
+# CONFIG_RTC_DRV_MAX6900 is not set
+# CONFIG_RTC_DRV_RS5C372 is not set
+# CONFIG_RTC_DRV_ISL1208 is not set
+# CONFIG_RTC_DRV_X1205 is not set
+# CONFIG_RTC_DRV_PCF8563 is not set
+# CONFIG_RTC_DRV_PCF8583 is not set
+# CONFIG_RTC_DRV_M41T80 is not set
+# CONFIG_RTC_DRV_BQ32K is not set
+# CONFIG_RTC_DRV_S35390A is not set
+# CONFIG_RTC_DRV_FM3130 is not set
+# CONFIG_RTC_DRV_RX8581 is not set
+# CONFIG_RTC_DRV_RX8025 is not set
+
+#
+# SPI RTC drivers
+#
+
+#
+# Platform RTC drivers
+#
+# CONFIG_RTC_DRV_CMOS is not set
+# CONFIG_RTC_DRV_DS1286 is not set
+# CONFIG_RTC_DRV_DS1511 is not set
+# CONFIG_RTC_DRV_DS1553 is not set
+# CONFIG_RTC_DRV_DS1742 is not set
+# CONFIG_RTC_DRV_STK17TA8 is not set
+# CONFIG_RTC_DRV_M48T86 is not set
+# CONFIG_RTC_DRV_M48T35 is not set
+# CONFIG_RTC_DRV_M48T59 is not set
+# CONFIG_RTC_DRV_MSM6242 is not set
+# CONFIG_RTC_MXC is not set
+# CONFIG_RTC_DRV_BQ4802 is not set
+# CONFIG_RTC_DRV_RP5C01 is not set
+# CONFIG_RTC_DRV_V3020 is not set
+
+#
+# on-CPU RTC drivers
+#
+# CONFIG_DMADEVICES is not set
+# CONFIG_AUXDISPLAY is not set
+# CONFIG_UIO is not set
+
+#
+# TI VLYNQ
+#
+# CONFIG_STAGING is not set
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+CONFIG_EXT2_FS_XATTR=y
+CONFIG_EXT2_FS_POSIX_ACL=y
+CONFIG_EXT2_FS_SECURITY=y
+# CONFIG_EXT2_FS_XIP is not set
+CONFIG_EXT3_FS=y
+CONFIG_EXT3_DEFAULTS_TO_ORDERED=y
+CONFIG_EXT3_FS_XATTR=y
+CONFIG_EXT3_FS_POSIX_ACL=y
+CONFIG_EXT3_FS_SECURITY=y
+CONFIG_EXT4_FS=y
+CONFIG_EXT4_FS_XATTR=y
+CONFIG_EXT4_FS_POSIX_ACL=y
+CONFIG_EXT4_FS_SECURITY=y
+# CONFIG_EXT4_DEBUG is not set
+CONFIG_JBD=y
+# CONFIG_JBD_DEBUG is not set
+CONFIG_JBD2=y
+# CONFIG_JBD2_DEBUG is not set
+CONFIG_FS_MBCACHE=y
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+CONFIG_FS_POSIX_ACL=y
+# CONFIG_XFS_FS is not set
+# CONFIG_OCFS2_FS is not set
+# CONFIG_BTRFS_FS is not set
+# CONFIG_NILFS2_FS is not set
+CONFIG_FILE_LOCKING=y
+CONFIG_FSNOTIFY=y
+CONFIG_DNOTIFY=y
+CONFIG_INOTIFY=y
+CONFIG_INOTIFY_USER=y
+CONFIG_QUOTA=y
+CONFIG_QUOTA_NETLINK_INTERFACE=y
+# CONFIG_PRINT_QUOTA_WARNING is not set
+# CONFIG_QFMT_V1 is not set
+# CONFIG_QFMT_V2 is not set
+CONFIG_QUOTACTL=y
+CONFIG_AUTOFS_FS=y
+CONFIG_AUTOFS4_FS=y
+CONFIG_FUSE_FS=y
+# CONFIG_CUSE is not set
+
+#
+# Caches
+#
+# CONFIG_FSCACHE is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+CONFIG_ISO9660_FS=m
+CONFIG_JOLIET=y
+CONFIG_ZISOFS=y
+CONFIG_UDF_FS=m
+CONFIG_UDF_NLS=y
+
+#
+# DOS/FAT/NT Filesystems
+#
+CONFIG_FAT_FS=y
+CONFIG_MSDOS_FS=m
+CONFIG_VFAT_FS=y
+CONFIG_FAT_DEFAULT_CODEPAGE=437
+CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_SYSCTL=y
+CONFIG_PROC_PAGE_MONITOR=y
+CONFIG_SYSFS=y
+# CONFIG_TMPFS is not set
+# CONFIG_HUGETLB_PAGE is not set
+CONFIG_CONFIGFS_FS=m
+CONFIG_MISC_FILESYSTEMS=y
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_ECRYPT_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+# CONFIG_CRAMFS is not set
+# CONFIG_SQUASHFS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_OMFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_ROMFS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+CONFIG_NETWORK_FILESYSTEMS=y
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3=y
+CONFIG_NFS_V3_ACL=y
+CONFIG_NFS_V4=y
+# CONFIG_NFS_V4_1 is not set
+CONFIG_ROOT_NFS=y
+# CONFIG_NFSD is not set
+CONFIG_LOCKD=y
+CONFIG_LOCKD_V4=y
+CONFIG_NFS_ACL_SUPPORT=y
+CONFIG_NFS_COMMON=y
+CONFIG_SUNRPC=y
+CONFIG_SUNRPC_GSS=y
+CONFIG_RPCSEC_GSS_KRB5=y
+# CONFIG_RPCSEC_GSS_SPKM3 is not set
+# CONFIG_SMB_FS is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_AFS_FS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+CONFIG_NLS=y
+CONFIG_NLS_DEFAULT="cp437"
+CONFIG_NLS_CODEPAGE_437=y
+# CONFIG_NLS_CODEPAGE_737 is not set
+# CONFIG_NLS_CODEPAGE_775 is not set
+# CONFIG_NLS_CODEPAGE_850 is not set
+# CONFIG_NLS_CODEPAGE_852 is not set
+# CONFIG_NLS_CODEPAGE_855 is not set
+# CONFIG_NLS_CODEPAGE_857 is not set
+# CONFIG_NLS_CODEPAGE_860 is not set
+# CONFIG_NLS_CODEPAGE_861 is not set
+# CONFIG_NLS_CODEPAGE_862 is not set
+# CONFIG_NLS_CODEPAGE_863 is not set
+# CONFIG_NLS_CODEPAGE_864 is not set
+# CONFIG_NLS_CODEPAGE_865 is not set
+# CONFIG_NLS_CODEPAGE_866 is not set
+# CONFIG_NLS_CODEPAGE_869 is not set
+# CONFIG_NLS_CODEPAGE_936 is not set
+# CONFIG_NLS_CODEPAGE_950 is not set
+# CONFIG_NLS_CODEPAGE_932 is not set
+# CONFIG_NLS_CODEPAGE_949 is not set
+# CONFIG_NLS_CODEPAGE_874 is not set
+# CONFIG_NLS_ISO8859_8 is not set
+# CONFIG_NLS_CODEPAGE_1250 is not set
+# CONFIG_NLS_CODEPAGE_1251 is not set
+CONFIG_NLS_ASCII=y
+CONFIG_NLS_ISO8859_1=m
+# CONFIG_NLS_ISO8859_2 is not set
+# CONFIG_NLS_ISO8859_3 is not set
+# CONFIG_NLS_ISO8859_4 is not set
+# CONFIG_NLS_ISO8859_5 is not set
+# CONFIG_NLS_ISO8859_6 is not set
+# CONFIG_NLS_ISO8859_7 is not set
+# CONFIG_NLS_ISO8859_9 is not set
+# CONFIG_NLS_ISO8859_13 is not set
+# CONFIG_NLS_ISO8859_14 is not set
+CONFIG_NLS_ISO8859_15=m
+# CONFIG_NLS_KOI8_R is not set
+# CONFIG_NLS_KOI8_U is not set
+CONFIG_NLS_UTF8=y
+# CONFIG_DLM is not set
+
+#
+# Kernel hacking
+#
+# CONFIG_PRINTK_TIME is not set
+CONFIG_ENABLE_WARN_DEPRECATED=y
+CONFIG_ENABLE_MUST_CHECK=y
+CONFIG_FRAME_WARN=1024
+CONFIG_MAGIC_SYSRQ=y
+# CONFIG_STRIP_ASM_SYMS is not set
+# CONFIG_UNUSED_SYMBOLS is not set
+CONFIG_DEBUG_FS=y
+# CONFIG_HEADERS_CHECK is not set
+CONFIG_DEBUG_KERNEL=y
+# CONFIG_DEBUG_SHIRQ is not set
+# CONFIG_DETECT_SOFTLOCKUP is not set
+# CONFIG_DETECT_HUNG_TASK is not set
+# CONFIG_SCHED_DEBUG is not set
+# CONFIG_SCHEDSTATS is not set
+# CONFIG_TIMER_STATS is not set
+# CONFIG_DEBUG_OBJECTS is not set
+# CONFIG_DEBUG_KMEMLEAK is not set
+# CONFIG_DEBUG_RT_MUTEXES is not set
+# CONFIG_RT_MUTEX_TESTER is not set
+# CONFIG_DEBUG_SPINLOCK is not set
+# CONFIG_DEBUG_MUTEXES is not set
+# CONFIG_DEBUG_LOCK_ALLOC is not set
+# CONFIG_PROVE_LOCKING is not set
+# CONFIG_LOCK_STAT is not set
+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
+# CONFIG_DEBUG_KOBJECT is not set
+# CONFIG_DEBUG_BUGVERBOSE is not set
+# CONFIG_DEBUG_INFO is not set
+# CONFIG_DEBUG_VM is not set
+# CONFIG_DEBUG_WRITECOUNT is not set
+# CONFIG_DEBUG_MEMORY_INIT is not set
+# CONFIG_DEBUG_LIST is not set
+# CONFIG_DEBUG_SG is not set
+# CONFIG_DEBUG_NOTIFIERS is not set
+# CONFIG_DEBUG_CREDENTIALS is not set
+CONFIG_FRAME_POINTER=y
+# CONFIG_BOOT_PRINTK_DELAY is not set
+# CONFIG_RCU_TORTURE_TEST is not set
+# CONFIG_RCU_CPU_STALL_DETECTOR is not set
+# CONFIG_BACKTRACE_SELF_TEST is not set
+# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
+# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
+# CONFIG_FAULT_INJECTION is not set
+# CONFIG_LATENCYTOP is not set
+# CONFIG_SYSCTL_SYSCALL_CHECK is not set
+# CONFIG_PAGE_POISONING is not set
+CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_TRACING_SUPPORT=y
+# CONFIG_FTRACE is not set
+# CONFIG_DYNAMIC_DEBUG is not set
+# CONFIG_SAMPLES is not set
+CONFIG_HAVE_ARCH_KGDB=y
+# CONFIG_KGDB is not set
+# CONFIG_ARM_UNWIND is not set
+# CONFIG_DEBUG_USER is not set
+# CONFIG_DEBUG_ERRORS is not set
+# CONFIG_DEBUG_STACK_USAGE is not set
+CONFIG_DEBUG_LL=y
+CONFIG_EARLY_PRINTK=y
+# CONFIG_DEBUG_ICEDCC is not set
+# CONFIG_OC_ETM is not set
+
+#
+# Security options
+#
+CONFIG_KEYS=y
+# CONFIG_KEYS_DEBUG_PROC_KEYS is not set
+# CONFIG_SECURITY is not set
+CONFIG_SECURITYFS=y
+# CONFIG_DEFAULT_SECURITY_SELINUX is not set
+# CONFIG_DEFAULT_SECURITY_SMACK is not set
+# CONFIG_DEFAULT_SECURITY_TOMOYO is not set
+CONFIG_DEFAULT_SECURITY_DAC=y
+CONFIG_DEFAULT_SECURITY=""
+CONFIG_CRYPTO=y
+
+#
+# Crypto core or helper
+#
+CONFIG_CRYPTO_ALGAPI=y
+CONFIG_CRYPTO_ALGAPI2=y
+CONFIG_CRYPTO_AEAD2=y
+CONFIG_CRYPTO_BLKCIPHER=y
+CONFIG_CRYPTO_BLKCIPHER2=y
+CONFIG_CRYPTO_HASH=y
+CONFIG_CRYPTO_HASH2=y
+CONFIG_CRYPTO_RNG2=y
+CONFIG_CRYPTO_PCOMP=y
+CONFIG_CRYPTO_MANAGER=y
+CONFIG_CRYPTO_MANAGER2=y
+# CONFIG_CRYPTO_GF128MUL is not set
+# CONFIG_CRYPTO_NULL is not set
+CONFIG_CRYPTO_WORKQUEUE=y
+# CONFIG_CRYPTO_CRYPTD is not set
+# CONFIG_CRYPTO_AUTHENC is not set
+# CONFIG_CRYPTO_TEST is not set
+
+#
+# Authenticated Encryption with Associated Data
+#
+# CONFIG_CRYPTO_CCM is not set
+# CONFIG_CRYPTO_GCM is not set
+# CONFIG_CRYPTO_SEQIV is not set
+
+#
+# Block modes
+#
+CONFIG_CRYPTO_CBC=y
+# CONFIG_CRYPTO_CTR is not set
+# CONFIG_CRYPTO_CTS is not set
+# CONFIG_CRYPTO_ECB is not set
+# CONFIG_CRYPTO_LRW is not set
+# CONFIG_CRYPTO_PCBC is not set
+# CONFIG_CRYPTO_XTS is not set
+
+#
+# Hash modes
+#
+# CONFIG_CRYPTO_HMAC is not set
+# CONFIG_CRYPTO_XCBC is not set
+# CONFIG_CRYPTO_VMAC is not set
+
+#
+# Digest
+#
+CONFIG_CRYPTO_CRC32C=m
+# CONFIG_CRYPTO_GHASH is not set
+# CONFIG_CRYPTO_MD4 is not set
+CONFIG_CRYPTO_MD5=y
+# CONFIG_CRYPTO_MICHAEL_MIC is not set
+# CONFIG_CRYPTO_RMD128 is not set
+# CONFIG_CRYPTO_RMD160 is not set
+# CONFIG_CRYPTO_RMD256 is not set
+# CONFIG_CRYPTO_RMD320 is not set
+# CONFIG_CRYPTO_SHA1 is not set
+# CONFIG_CRYPTO_SHA256 is not set
+# CONFIG_CRYPTO_SHA512 is not set
+# CONFIG_CRYPTO_TGR192 is not set
+# CONFIG_CRYPTO_WP512 is not set
+
+#
+# Ciphers
+#
+# CONFIG_CRYPTO_AES is not set
+# CONFIG_CRYPTO_ANUBIS is not set
+# CONFIG_CRYPTO_ARC4 is not set
+# CONFIG_CRYPTO_BLOWFISH is not set
+# CONFIG_CRYPTO_CAMELLIA is not set
+# CONFIG_CRYPTO_CAST5 is not set
+# CONFIG_CRYPTO_CAST6 is not set
+CONFIG_CRYPTO_DES=y
+# CONFIG_CRYPTO_FCRYPT is not set
+# CONFIG_CRYPTO_KHAZAD is not set
+# CONFIG_CRYPTO_SALSA20 is not set
+# CONFIG_CRYPTO_SEED is not set
+# CONFIG_CRYPTO_SERPENT is not set
+# CONFIG_CRYPTO_TEA is not set
+# CONFIG_CRYPTO_TWOFISH is not set
+
+#
+# Compression
+#
+CONFIG_CRYPTO_DEFLATE=y
+# CONFIG_CRYPTO_ZLIB is not set
+CONFIG_CRYPTO_LZO=y
+
+#
+# Random Number Generation
+#
+# CONFIG_CRYPTO_ANSI_CPRNG is not set
+# CONFIG_CRYPTO_HW is not set
+# CONFIG_BINARY_PRINTF is not set
+
+#
+# Library routines
+#
+CONFIG_BITREVERSE=y
+CONFIG_RATIONAL=y
+CONFIG_GENERIC_FIND_LAST_BIT=y
+CONFIG_CRC_CCITT=m
+CONFIG_CRC16=y
+CONFIG_CRC_T10DIF=y
+CONFIG_CRC_ITU_T=m
+CONFIG_CRC32=y
+CONFIG_CRC7=m
+CONFIG_LIBCRC32C=m
+CONFIG_ZLIB_INFLATE=y
+CONFIG_ZLIB_DEFLATE=y
+CONFIG_LZO_COMPRESS=y
+CONFIG_LZO_DECOMPRESS=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAS_DMA=y
+CONFIG_NLATTR=y
diff --git a/arch/arm/configs/nuc950_defconfig b/arch/arm/configs/nuc950_defconfig
index 97300ec478dd..51cc2a260cbb 100644
--- a/arch/arm/configs/nuc950_defconfig
+++ b/arch/arm/configs/nuc950_defconfig
@@ -590,8 +590,40 @@ CONFIG_SSB_POSSIBLE=y
 #
 # CONFIG_VGASTATE is not set
 # CONFIG_VIDEO_OUTPUT_CONTROL is not set
-# CONFIG_FB is not set
 # CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+CONFIG_FB=y
+# CONFIG_FIRMWARE_EDID is not set
+# CONFIG_FB_DDC is not set
+# CONFIG_FB_BOOT_VESA_SUPPORT is not set
+CONFIG_FB_CFB_FILLRECT=y
+CONFIG_FB_CFB_COPYAREA=y
+CONFIG_FB_CFB_IMAGEBLIT=y
+# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
+# CONFIG_FB_SYS_FILLRECT is not set
+# CONFIG_FB_SYS_COPYAREA is not set
+# CONFIG_FB_SYS_IMAGEBLIT is not set
+# CONFIG_FB_FOREIGN_ENDIAN is not set
+# CONFIG_FB_SYS_FOPS is not set
+# CONFIG_FB_SVGALIB is not set
+# CONFIG_FB_MACMODES is not set
+# CONFIG_FB_BACKLIGHT is not set
+# CONFIG_FB_MODE_HELPERS is not set
+# CONFIG_FB_TILEBLITTING is not set
+
+#
+# Frame buffer hardware drivers
+#
+# CONFIG_FB_S1D13XXX is not set
+CONFIG_FB_NUC900=y
+CONFIG_GPM1040A0_320X240=y
+CONFIG_FB_NUC900_DEBUG=y
+# CONFIG_FB_VIRTUAL is not set
+# CONFIG_FB_METRONOME is not set
+# CONFIG_FB_MB862XX is not set
+# CONFIG_FB_BROADSHEET is not set
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+
+
 
 #
 # Display device support
@@ -603,6 +635,25 @@ CONFIG_SSB_POSSIBLE=y
 #
 # CONFIG_VGA_CONSOLE is not set
 CONFIG_DUMMY_CONSOLE=y
+CONFIG_FRAMEBUFFER_CONSOLE=y
+CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y
+# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
+CONFIG_FONTS=y
+# CONFIG_FONT_8x8 is not set
+CONFIG_FONT_8x16=y
+# CONFIG_FONT_6x11 is not set
+# CONFIG_FONT_7x14 is not set
+# CONFIG_FONT_PEARL_8x8 is not set
+# CONFIG_FONT_ACORN_8x8 is not set
+# CONFIG_FONT_MINI_4x6 is not set
+# CONFIG_FONT_SUN8x16 is not set
+# CONFIG_FONT_SUN12x22 is not set
+# CONFIG_FONT_10x18 is not set
+CONFIG_LOGO=y
+# CONFIG_LOGO_LINUX_MONO is not set
+# CONFIG_LOGO_LINUX_VGA16 is not set
+CONFIG_LOGO_LINUX_CLUT224=y
+
 # CONFIG_SOUND is not set
 # CONFIG_HID_SUPPORT is not set
 CONFIG_USB_SUPPORT=y
diff --git a/arch/arm/configs/orion5x_defconfig b/arch/arm/configs/orion5x_defconfig
index 85b05d3e279b..ee1ebd8dfa80 100644
--- a/arch/arm/configs/orion5x_defconfig
+++ b/arch/arm/configs/orion5x_defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.32-rc6
-# Sat Nov  7 20:52:21 2009
+# Linux kernel version: 2.6.33-rc6
+# Thu Feb  4 23:30:00 2010
 #
 CONFIG_ARM=y
 CONFIG_SYS_SUPPORTS_APM_EMULATION=y
@@ -32,6 +32,12 @@ CONFIG_LOCK_KERNEL=y
 CONFIG_INIT_ENV_ARG_LIMIT=32
 CONFIG_LOCALVERSION=""
 CONFIG_LOCALVERSION_AUTO=y
+CONFIG_HAVE_KERNEL_GZIP=y
+CONFIG_HAVE_KERNEL_LZO=y
+CONFIG_KERNEL_GZIP=y
+# CONFIG_KERNEL_BZIP2 is not set
+# CONFIG_KERNEL_LZMA is not set
+# CONFIG_KERNEL_LZO is not set
 CONFIG_SWAP=y
 CONFIG_SYSVIPC=y
 CONFIG_SYSVIPC_SYSCTL=y
@@ -45,6 +51,7 @@ CONFIG_SYSVIPC_SYSCTL=y
 #
 CONFIG_TREE_RCU=y
 # CONFIG_TREE_PREEMPT_RCU is not set
+# CONFIG_TINY_RCU is not set
 # CONFIG_RCU_TRACE is not set
 CONFIG_RCU_FANOUT=32
 # CONFIG_RCU_FANOUT_EXACT is not set
@@ -122,14 +129,41 @@ CONFIG_LBDAF=y
 # IO Schedulers
 #
 CONFIG_IOSCHED_NOOP=y
-CONFIG_IOSCHED_AS=y
 CONFIG_IOSCHED_DEADLINE=y
 CONFIG_IOSCHED_CFQ=y
-# CONFIG_DEFAULT_AS is not set
 # CONFIG_DEFAULT_DEADLINE is not set
 CONFIG_DEFAULT_CFQ=y
 # CONFIG_DEFAULT_NOOP is not set
 CONFIG_DEFAULT_IOSCHED="cfq"
+# CONFIG_INLINE_SPIN_TRYLOCK is not set
+# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set
+# CONFIG_INLINE_SPIN_LOCK is not set
+# CONFIG_INLINE_SPIN_LOCK_BH is not set
+# CONFIG_INLINE_SPIN_LOCK_IRQ is not set
+# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set
+# CONFIG_INLINE_SPIN_UNLOCK is not set
+# CONFIG_INLINE_SPIN_UNLOCK_BH is not set
+# CONFIG_INLINE_SPIN_UNLOCK_IRQ is not set
+# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set
+# CONFIG_INLINE_READ_TRYLOCK is not set
+# CONFIG_INLINE_READ_LOCK is not set
+# CONFIG_INLINE_READ_LOCK_BH is not set
+# CONFIG_INLINE_READ_LOCK_IRQ is not set
+# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set
+# CONFIG_INLINE_READ_UNLOCK is not set
+# CONFIG_INLINE_READ_UNLOCK_BH is not set
+# CONFIG_INLINE_READ_UNLOCK_IRQ is not set
+# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set
+# CONFIG_INLINE_WRITE_TRYLOCK is not set
+# CONFIG_INLINE_WRITE_LOCK is not set
+# CONFIG_INLINE_WRITE_LOCK_BH is not set
+# CONFIG_INLINE_WRITE_LOCK_IRQ is not set
+# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set
+# CONFIG_INLINE_WRITE_UNLOCK is not set
+# CONFIG_INLINE_WRITE_UNLOCK_BH is not set
+# CONFIG_INLINE_WRITE_UNLOCK_IRQ is not set
+# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set
+# CONFIG_MUTEX_SPIN_ON_OWNER is not set
 # CONFIG_FREEZER is not set
 
 #
@@ -158,6 +192,7 @@ CONFIG_MMU=y
 # CONFIG_ARCH_IXP2000 is not set
 # CONFIG_ARCH_IXP4XX is not set
 # CONFIG_ARCH_L7200 is not set
+# CONFIG_ARCH_DOVE is not set
 # CONFIG_ARCH_KIRKWOOD is not set
 # CONFIG_ARCH_LOKI is not set
 # CONFIG_ARCH_MV78XX0 is not set
@@ -180,6 +215,7 @@ CONFIG_ARCH_ORION5X=y
 # CONFIG_ARCH_DAVINCI is not set
 # CONFIG_ARCH_OMAP is not set
 # CONFIG_ARCH_BCMRING is not set
+# CONFIG_ARCH_U8500 is not set
 
 #
 # Orion Implementations
@@ -192,6 +228,7 @@ CONFIG_MACH_TS209=y
 CONFIG_MACH_TERASTATION_PRO2=y
 CONFIG_MACH_LINKSTATION_PRO=y
 CONFIG_MACH_LINKSTATION_MINI=y
+CONFIG_MACH_LINKSTATION_LS_HGL=y
 CONFIG_MACH_TS409=y
 CONFIG_MACH_WRT350N_V2=y
 CONFIG_MACH_TS78XX=y
@@ -268,12 +305,10 @@ CONFIG_FLATMEM_MANUAL=y
 CONFIG_FLATMEM=y
 CONFIG_FLAT_NODE_MEM_MAP=y
 CONFIG_PAGEFLAGS_EXTENDED=y
-CONFIG_SPLIT_PTLOCK_CPUS=4096
+CONFIG_SPLIT_PTLOCK_CPUS=999999
 # CONFIG_PHYS_ADDR_T_64BIT is not set
 CONFIG_ZONE_DMA_FLAG=0
 CONFIG_VIRT_TO_BUS=y
-CONFIG_HAVE_MLOCK=y
-CONFIG_HAVE_MLOCKED_PAGE_BIT=y
 # CONFIG_KSM is not set
 CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
 CONFIG_LEDS=y
@@ -412,10 +447,6 @@ CONFIG_NET_PKTGEN=m
 # CONFIG_AF_RXRPC is not set
 CONFIG_WIRELESS=y
 # CONFIG_CFG80211 is not set
-CONFIG_CFG80211_DEFAULT_PS_VALUE=0
-# CONFIG_WIRELESS_OLD_REGULATORY is not set
-CONFIG_WIRELESS_EXT=y
-CONFIG_WIRELESS_EXT_SYSFS=y
 # CONFIG_LIB80211 is not set
 
 #
@@ -554,6 +585,10 @@ CONFIG_BLK_DEV=y
 # CONFIG_BLK_DEV_COW_COMMON is not set
 CONFIG_BLK_DEV_LOOP=y
 # CONFIG_BLK_DEV_CRYPTOLOOP is not set
+
+#
+# DRBD disabled because PROC_FS, INET or CONNECTOR not selected
+#
 # CONFIG_BLK_DEV_NBD is not set
 # CONFIG_BLK_DEV_SX8 is not set
 # CONFIG_BLK_DEV_UB is not set
@@ -562,6 +597,7 @@ CONFIG_BLK_DEV_LOOP=y
 # CONFIG_ATA_OVER_ETH is not set
 # CONFIG_MG_DISK is not set
 CONFIG_MISC_DEVICES=y
+# CONFIG_AD525X_DPOT is not set
 # CONFIG_PHANTOM is not set
 # CONFIG_SGI_IOC4 is not set
 # CONFIG_TIFM_CORE is not set
@@ -569,6 +605,7 @@ CONFIG_MISC_DEVICES=y
 # CONFIG_ENCLOSURE_SERVICES is not set
 # CONFIG_HP_ILO is not set
 # CONFIG_ISL29003 is not set
+# CONFIG_DS1682 is not set
 # CONFIG_C2PORT is not set
 
 #
@@ -621,7 +658,9 @@ CONFIG_SCSI_LOWLEVEL=y
 # CONFIG_SCSI_BNX2_ISCSI is not set
 # CONFIG_BE2ISCSI is not set
 # CONFIG_BLK_DEV_3W_XXXX_RAID is not set
+# CONFIG_SCSI_HPSA is not set
 # CONFIG_SCSI_3W_9XXX is not set
+# CONFIG_SCSI_3W_SAS is not set
 # CONFIG_SCSI_ACARD is not set
 # CONFIG_SCSI_AACRAID is not set
 # CONFIG_SCSI_AIC7XXX is not set
@@ -657,6 +696,7 @@ CONFIG_SCSI_LOWLEVEL=y
 # CONFIG_SCSI_NSP32 is not set
 # CONFIG_SCSI_DEBUG is not set
 # CONFIG_SCSI_PMCRAID is not set
+# CONFIG_SCSI_PM8001 is not set
 # CONFIG_SCSI_SRP is not set
 # CONFIG_SCSI_BFA_FC is not set
 # CONFIG_SCSI_DH is not set
@@ -711,15 +751,16 @@ CONFIG_SATA_MV=y
 # CONFIG_PATA_NS87415 is not set
 # CONFIG_PATA_OPTI is not set
 # CONFIG_PATA_OPTIDMA is not set
+# CONFIG_PATA_PDC2027X is not set
 # CONFIG_PATA_PDC_OLD is not set
 # CONFIG_PATA_RADISYS is not set
 # CONFIG_PATA_RDC is not set
 # CONFIG_PATA_RZ1000 is not set
 # CONFIG_PATA_SC1200 is not set
 # CONFIG_PATA_SERVERWORKS is not set
-# CONFIG_PATA_PDC2027X is not set
 # CONFIG_PATA_SIL680 is not set
 # CONFIG_PATA_SIS is not set
+# CONFIG_PATA_TOSHIBA is not set
 # CONFIG_PATA_VIA is not set
 # CONFIG_PATA_WINBOND is not set
 # CONFIG_PATA_PLATFORM is not set
@@ -736,7 +777,7 @@ CONFIG_SATA_MV=y
 #
 
 #
-# See the help texts for more information.
+# The newer stack is recommended.
 #
 # CONFIG_FIREWIRE is not set
 # CONFIG_IEEE1394 is not set
@@ -842,8 +883,10 @@ CONFIG_MV643XX_ETH=y
 # CONFIG_NETDEV_10000 is not set
 # CONFIG_TR is not set
 CONFIG_WLAN=y
-# CONFIG_WLAN_PRE80211 is not set
-# CONFIG_WLAN_80211 is not set
+# CONFIG_ATMEL is not set
+# CONFIG_PRISM54 is not set
+# CONFIG_USB_ZD1201 is not set
+# CONFIG_HOSTAP is not set
 
 #
 # Enable WiMAX (Networking options) to see the WiMAX drivers
@@ -866,6 +909,7 @@ CONFIG_WLAN=y
 # CONFIG_NETCONSOLE is not set
 # CONFIG_NETPOLL is not set
 # CONFIG_NET_POLL_CONTROLLER is not set
+# CONFIG_VMXNET3 is not set
 # CONFIG_ISDN is not set
 # CONFIG_PHONE is not set
 
@@ -875,6 +919,7 @@ CONFIG_WLAN=y
 CONFIG_INPUT=y
 # CONFIG_INPUT_FF_MEMLESS is not set
 # CONFIG_INPUT_POLLDEV is not set
+# CONFIG_INPUT_SPARSEKMAP is not set
 
 #
 # Userland interfaces
@@ -993,11 +1038,6 @@ CONFIG_I2C_MV64XXX=y
 # CONFIG_I2C_TINY_USB is not set
 
 #
-# Graphics adapter I2C/DDC channel drivers
-#
-# CONFIG_I2C_VOODOO3 is not set
-
-#
 # Other I2C/SMBus bus drivers
 #
 # CONFIG_I2C_PCA_PLATFORM is not set
@@ -1006,7 +1046,6 @@ CONFIG_I2C_MV64XXX=y
 #
 # Miscellaneous I2C Chip support
 #
-# CONFIG_DS1682 is not set
 # CONFIG_SENSORS_TSL2550 is not set
 # CONFIG_I2C_DEBUG_CORE is not set
 # CONFIG_I2C_DEBUG_ALGO is not set
@@ -1033,10 +1072,12 @@ CONFIG_GPIO_SYSFS=y
 # CONFIG_GPIO_MAX732X is not set
 # CONFIG_GPIO_PCA953X is not set
 # CONFIG_GPIO_PCF857X is not set
+# CONFIG_GPIO_ADP5588 is not set
 
 #
 # PCI GPIO expanders:
 #
+# CONFIG_GPIO_CS5535 is not set
 # CONFIG_GPIO_BT8XX is not set
 # CONFIG_GPIO_LANGWELL is not set
 
@@ -1079,6 +1120,7 @@ CONFIG_HWMON=y
 # CONFIG_SENSORS_GL520SM is not set
 # CONFIG_SENSORS_IT87 is not set
 # CONFIG_SENSORS_LM63 is not set
+# CONFIG_SENSORS_LM73 is not set
 CONFIG_SENSORS_LM75=y
 # CONFIG_SENSORS_LM77 is not set
 # CONFIG_SENSORS_LM78 is not set
@@ -1104,6 +1146,7 @@ CONFIG_SENSORS_LM75=y
 # CONFIG_SENSORS_SMSC47M192 is not set
 # CONFIG_SENSORS_SMSC47B397 is not set
 # CONFIG_SENSORS_ADS7828 is not set
+# CONFIG_SENSORS_AMC6821 is not set
 # CONFIG_SENSORS_THMC50 is not set
 # CONFIG_SENSORS_TMP401 is not set
 # CONFIG_SENSORS_TMP421 is not set
@@ -1118,6 +1161,7 @@ CONFIG_SENSORS_LM75=y
 # CONFIG_SENSORS_W83L786NG is not set
 # CONFIG_SENSORS_W83627HF is not set
 # CONFIG_SENSORS_W83627EHF is not set
+# CONFIG_SENSORS_LIS3_I2C is not set
 # CONFIG_THERMAL is not set
 # CONFIG_WATCHDOG is not set
 CONFIG_SSB_POSSIBLE=y
@@ -1140,11 +1184,13 @@ CONFIG_SSB_POSSIBLE=y
 # CONFIG_MFD_TMIO is not set
 # CONFIG_MFD_TC6393XB is not set
 # CONFIG_PMIC_DA903X is not set
+# CONFIG_PMIC_ADP5520 is not set
 # CONFIG_MFD_WM8400 is not set
 # CONFIG_MFD_WM831X is not set
 # CONFIG_MFD_WM8350_I2C is not set
 # CONFIG_MFD_PCF50633 is not set
 # CONFIG_AB3100_CORE is not set
+# CONFIG_MFD_88PM8607 is not set
 # CONFIG_REGULATOR is not set
 # CONFIG_MEDIA_SUPPORT is not set
 
@@ -1316,6 +1362,7 @@ CONFIG_USB_STORAGE_JUMPSHOT=y
 # OTG and related infrastructure
 #
 # CONFIG_USB_GPIO_VBUS is not set
+# CONFIG_USB_ULPI is not set
 # CONFIG_NOP_USB_XCEIV is not set
 # CONFIG_UWB is not set
 # CONFIG_MMC is not set
@@ -1332,6 +1379,7 @@ CONFIG_LEDS_GPIO_PLATFORM=y
 # CONFIG_LEDS_LP3944 is not set
 # CONFIG_LEDS_PCA955X is not set
 # CONFIG_LEDS_BD2802 is not set
+# CONFIG_LEDS_LT3593 is not set
 
 #
 # LED Triggers
@@ -1377,6 +1425,7 @@ CONFIG_RTC_DRV_PCF8563=y
 # CONFIG_RTC_DRV_PCF8583 is not set
 CONFIG_RTC_DRV_M41T80=y
 # CONFIG_RTC_DRV_M41T80_WDT is not set
+# CONFIG_RTC_DRV_BQ32K is not set
 CONFIG_RTC_DRV_S35390A=y
 # CONFIG_RTC_DRV_FM3130 is not set
 # CONFIG_RTC_DRV_RX8581 is not set
@@ -1398,7 +1447,9 @@ CONFIG_RTC_DRV_S35390A=y
 CONFIG_RTC_DRV_M48T86=y
 # CONFIG_RTC_DRV_M48T35 is not set
 # CONFIG_RTC_DRV_M48T59 is not set
+# CONFIG_RTC_DRV_MSM6242 is not set
 # CONFIG_RTC_DRV_BQ4802 is not set
+# CONFIG_RTC_DRV_RP5C01 is not set
 # CONFIG_RTC_DRV_V3020 is not set
 
 #
@@ -1686,7 +1737,9 @@ CONFIG_DEBUG_USER=y
 CONFIG_DEBUG_ERRORS=y
 # CONFIG_DEBUG_STACK_USAGE is not set
 CONFIG_DEBUG_LL=y
+# CONFIG_EARLY_PRINTK is not set
 # CONFIG_DEBUG_ICEDCC is not set
+# CONFIG_OC_ETM is not set
 
 #
 # Security options
@@ -1694,7 +1747,11 @@ CONFIG_DEBUG_LL=y
 # CONFIG_KEYS is not set
 # CONFIG_SECURITY is not set
 # CONFIG_SECURITYFS is not set
-# CONFIG_SECURITY_FILE_CAPABILITIES is not set
+# CONFIG_DEFAULT_SECURITY_SELINUX is not set
+# CONFIG_DEFAULT_SECURITY_SMACK is not set
+# CONFIG_DEFAULT_SECURITY_TOMOYO is not set
+CONFIG_DEFAULT_SECURITY_DAC=y
+CONFIG_DEFAULT_SECURITY=""
 CONFIG_CRYPTO=y
 
 #
diff --git a/arch/arm/configs/pxa168_defconfig b/arch/arm/configs/pxa168_defconfig
index 791b8c39aefc..113511f91eb7 100644
--- a/arch/arm/configs/pxa168_defconfig
+++ b/arch/arm/configs/pxa168_defconfig
@@ -1,15 +1,13 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.29-rc3
-# Fri Mar 20 13:43:13 2009
+# Linux kernel version: 2.6.33-rc3
+# Tue Jan 12 08:57:10 2010
 #
 CONFIG_ARM=y
 CONFIG_SYS_SUPPORTS_APM_EMULATION=y
 CONFIG_GENERIC_GPIO=y
 CONFIG_GENERIC_TIME=y
 CONFIG_GENERIC_CLOCKEVENTS=y
-CONFIG_MMU=y
-# CONFIG_NO_IOPORT is not set
 CONFIG_GENERIC_HARDIRQS=y
 CONFIG_STACKTRACE_SUPPORT=y
 CONFIG_HAVE_LATENCYTOP_SUPPORT=y
@@ -18,13 +16,12 @@ CONFIG_TRACE_IRQFLAGS_SUPPORT=y
 CONFIG_HARDIRQS_SW_RESEND=y
 CONFIG_GENERIC_IRQ_PROBE=y
 CONFIG_RWSEM_GENERIC_SPINLOCK=y
-# CONFIG_ARCH_HAS_ILOG2_U32 is not set
-# CONFIG_ARCH_HAS_ILOG2_U64 is not set
 CONFIG_GENERIC_HWEIGHT=y
 CONFIG_GENERIC_CALIBRATE_DELAY=y
 CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
 CONFIG_VECTORS_BASE=0xffff0000
 CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+CONFIG_CONSTRUCTORS=y
 
 #
 # General setup
@@ -35,6 +32,12 @@ CONFIG_LOCK_KERNEL=y
 CONFIG_INIT_ENV_ARG_LIMIT=32
 CONFIG_LOCALVERSION=""
 CONFIG_LOCALVERSION_AUTO=y
+CONFIG_HAVE_KERNEL_GZIP=y
+CONFIG_HAVE_KERNEL_LZO=y
+CONFIG_KERNEL_GZIP=y
+# CONFIG_KERNEL_BZIP2 is not set
+# CONFIG_KERNEL_LZMA is not set
+# CONFIG_KERNEL_LZO is not set
 CONFIG_SWAP=y
 CONFIG_SYSVIPC=y
 CONFIG_SYSVIPC_SYSCTL=y
@@ -46,11 +49,13 @@ CONFIG_SYSVIPC_SYSCTL=y
 #
 # RCU Subsystem
 #
-CONFIG_CLASSIC_RCU=y
-# CONFIG_TREE_RCU is not set
-# CONFIG_PREEMPT_RCU is not set
+CONFIG_TREE_RCU=y
+# CONFIG_TREE_PREEMPT_RCU is not set
+# CONFIG_TINY_RCU is not set
+# CONFIG_RCU_TRACE is not set
+CONFIG_RCU_FANOUT=32
+# CONFIG_RCU_FANOUT_EXACT is not set
 # CONFIG_TREE_RCU_TRACE is not set
-# CONFIG_PREEMPT_RCU_TRACE is not set
 # CONFIG_IKCONFIG is not set
 CONFIG_LOG_BUF_SHIFT=14
 # CONFIG_GROUP_SCHED is not set
@@ -64,10 +69,10 @@ CONFIG_NAMESPACES=y
 # CONFIG_USER_NS is not set
 # CONFIG_PID_NS is not set
 # CONFIG_NET_NS is not set
-CONFIG_BLK_DEV_INITRD=y
-CONFIG_INITRAMFS_SOURCE=""
+# CONFIG_BLK_DEV_INITRD is not set
 CONFIG_CC_OPTIMIZE_FOR_SIZE=y
 CONFIG_SYSCTL=y
+CONFIG_ANON_INODES=y
 # CONFIG_EMBEDDED is not set
 CONFIG_UID16=y
 CONFIG_SYSCTL_SYSCALL=y
@@ -78,17 +83,20 @@ CONFIG_HOTPLUG=y
 CONFIG_PRINTK=y
 CONFIG_BUG=y
 CONFIG_ELF_CORE=y
-CONFIG_COMPAT_BRK=y
 CONFIG_BASE_FULL=y
 CONFIG_FUTEX=y
-CONFIG_ANON_INODES=y
 CONFIG_EPOLL=y
 CONFIG_SIGNALFD=y
 CONFIG_TIMERFD=y
 CONFIG_EVENTFD=y
 CONFIG_SHMEM=y
 CONFIG_AIO=y
+
+#
+# Kernel Performance Events And Counters
+#
 CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_COMPAT_BRK=y
 CONFIG_SLAB=y
 # CONFIG_SLUB is not set
 # CONFIG_SLOB is not set
@@ -98,6 +106,11 @@ CONFIG_HAVE_OPROFILE=y
 CONFIG_HAVE_KPROBES=y
 CONFIG_HAVE_KRETPROBES=y
 CONFIG_HAVE_CLK=y
+
+#
+# GCOV-based kernel profiling
+#
+# CONFIG_SLOW_WORK is not set
 CONFIG_HAVE_GENERIC_DMA_COHERENT=y
 CONFIG_SLABINFO=y
 CONFIG_RT_MUTEXES=y
@@ -109,8 +122,7 @@ CONFIG_MODULE_FORCE_UNLOAD=y
 # CONFIG_MODVERSIONS is not set
 # CONFIG_MODULE_SRCVERSION_ALL is not set
 CONFIG_BLOCK=y
-# CONFIG_LBD is not set
-# CONFIG_BLK_DEV_IO_TRACE is not set
+CONFIG_LBDAF=y
 # CONFIG_BLK_DEV_BSG is not set
 # CONFIG_BLK_DEV_INTEGRITY is not set
 
@@ -118,31 +130,62 @@ CONFIG_BLOCK=y
 # IO Schedulers
 #
 CONFIG_IOSCHED_NOOP=y
-CONFIG_IOSCHED_AS=y
 CONFIG_IOSCHED_DEADLINE=y
 CONFIG_IOSCHED_CFQ=y
-# CONFIG_DEFAULT_AS is not set
 # CONFIG_DEFAULT_DEADLINE is not set
 CONFIG_DEFAULT_CFQ=y
 # CONFIG_DEFAULT_NOOP is not set
 CONFIG_DEFAULT_IOSCHED="cfq"
+# CONFIG_INLINE_SPIN_TRYLOCK is not set
+# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set
+# CONFIG_INLINE_SPIN_LOCK is not set
+# CONFIG_INLINE_SPIN_LOCK_BH is not set
+# CONFIG_INLINE_SPIN_LOCK_IRQ is not set
+# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set
+# CONFIG_INLINE_SPIN_UNLOCK is not set
+# CONFIG_INLINE_SPIN_UNLOCK_BH is not set
+# CONFIG_INLINE_SPIN_UNLOCK_IRQ is not set
+# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set
+# CONFIG_INLINE_READ_TRYLOCK is not set
+# CONFIG_INLINE_READ_LOCK is not set
+# CONFIG_INLINE_READ_LOCK_BH is not set
+# CONFIG_INLINE_READ_LOCK_IRQ is not set
+# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set
+# CONFIG_INLINE_READ_UNLOCK is not set
+# CONFIG_INLINE_READ_UNLOCK_BH is not set
+# CONFIG_INLINE_READ_UNLOCK_IRQ is not set
+# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set
+# CONFIG_INLINE_WRITE_TRYLOCK is not set
+# CONFIG_INLINE_WRITE_LOCK is not set
+# CONFIG_INLINE_WRITE_LOCK_BH is not set
+# CONFIG_INLINE_WRITE_LOCK_IRQ is not set
+# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set
+# CONFIG_INLINE_WRITE_UNLOCK is not set
+# CONFIG_INLINE_WRITE_UNLOCK_BH is not set
+# CONFIG_INLINE_WRITE_UNLOCK_IRQ is not set
+# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set
+# CONFIG_MUTEX_SPIN_ON_OWNER is not set
 # CONFIG_FREEZER is not set
 
 #
 # System Type
 #
+CONFIG_MMU=y
 # CONFIG_ARCH_AAEC2000 is not set
 # CONFIG_ARCH_INTEGRATOR is not set
 # CONFIG_ARCH_REALVIEW is not set
 # CONFIG_ARCH_VERSATILE is not set
 # CONFIG_ARCH_AT91 is not set
 # CONFIG_ARCH_CLPS711X is not set
+# CONFIG_ARCH_GEMINI is not set
 # CONFIG_ARCH_EBSA110 is not set
 # CONFIG_ARCH_EP93XX is not set
 # CONFIG_ARCH_FOOTBRIDGE is not set
+# CONFIG_ARCH_MXC is not set
+# CONFIG_ARCH_STMP3XXX is not set
 # CONFIG_ARCH_NETX is not set
 # CONFIG_ARCH_H720X is not set
-# CONFIG_ARCH_IMX is not set
+# CONFIG_ARCH_NOMADIK is not set
 # CONFIG_ARCH_IOP13XX is not set
 # CONFIG_ARCH_IOP32X is not set
 # CONFIG_ARCH_IOP33X is not set
@@ -150,26 +193,30 @@ CONFIG_DEFAULT_IOSCHED="cfq"
 # CONFIG_ARCH_IXP2000 is not set
 # CONFIG_ARCH_IXP4XX is not set
 # CONFIG_ARCH_L7200 is not set
+# CONFIG_ARCH_DOVE is not set
 # CONFIG_ARCH_KIRKWOOD is not set
-# CONFIG_ARCH_KS8695 is not set
-# CONFIG_ARCH_NS9XXX is not set
 # CONFIG_ARCH_LOKI is not set
 # CONFIG_ARCH_MV78XX0 is not set
-# CONFIG_ARCH_MXC is not set
 # CONFIG_ARCH_ORION5X is not set
+CONFIG_ARCH_MMP=y
+# CONFIG_ARCH_KS8695 is not set
+# CONFIG_ARCH_NS9XXX is not set
+# CONFIG_ARCH_W90X900 is not set
 # CONFIG_ARCH_PNX4008 is not set
 # CONFIG_ARCH_PXA is not set
-CONFIG_ARCH_MMP=y
+# CONFIG_ARCH_MSM is not set
 # CONFIG_ARCH_RPC is not set
 # CONFIG_ARCH_SA1100 is not set
 # CONFIG_ARCH_S3C2410 is not set
 # CONFIG_ARCH_S3C64XX is not set
+# CONFIG_ARCH_S5PC1XX is not set
 # CONFIG_ARCH_SHARK is not set
 # CONFIG_ARCH_LH7A40X is not set
+# CONFIG_ARCH_U300 is not set
 # CONFIG_ARCH_DAVINCI is not set
 # CONFIG_ARCH_OMAP is not set
-# CONFIG_ARCH_MSM is not set
-# CONFIG_ARCH_W90X900 is not set
+# CONFIG_ARCH_BCMRING is not set
+# CONFIG_ARCH_U8500 is not set
 # CONFIG_MACH_TAVOREVB is not set
 
 #
@@ -177,6 +224,7 @@ CONFIG_ARCH_MMP=y
 #
 CONFIG_MACH_ASPENITE=y
 CONFIG_MACH_ZYLONITE2=y
+CONFIG_MACH_AVENGERS_LITE=y
 # CONFIG_MACH_TTC_DKB is not set
 CONFIG_CPU_PXA168=y
 CONFIG_PLAT_PXA=y
@@ -187,7 +235,7 @@ CONFIG_PLAT_PXA=y
 CONFIG_CPU_MOHAWK=y
 CONFIG_CPU_32v5=y
 CONFIG_CPU_ABRT_EV5T=y
-CONFIG_CPU_PABRT_NOIFAR=y
+CONFIG_CPU_PABRT_LEGACY=y
 CONFIG_CPU_CACHE_VIVT=y
 CONFIG_CPU_COPY_V4WB=y
 CONFIG_CPU_TLB_V4WBI=y
@@ -201,7 +249,7 @@ CONFIG_ARM_THUMB=y
 # CONFIG_CPU_ICACHE_DISABLE is not set
 # CONFIG_CPU_DCACHE_DISABLE is not set
 # CONFIG_CPU_BPREDICT_DISABLE is not set
-# CONFIG_OUTER_CACHE is not set
+CONFIG_ARM_L1_CACHE_SHIFT=5
 CONFIG_IWMMXT=y
 CONFIG_COMMON_CLKDEV=y
 
@@ -223,13 +271,15 @@ CONFIG_VMSPLIT_3G=y
 # CONFIG_VMSPLIT_2G is not set
 # CONFIG_VMSPLIT_1G is not set
 CONFIG_PAGE_OFFSET=0xC0000000
+# CONFIG_PREEMPT_NONE is not set
+# CONFIG_PREEMPT_VOLUNTARY is not set
 CONFIG_PREEMPT=y
 CONFIG_HZ=100
 CONFIG_AEABI=y
 CONFIG_OABI_COMPAT=y
-CONFIG_ARCH_FLATMEM_HAS_HOLES=y
 # CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
 # CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
+# CONFIG_HIGHMEM is not set
 CONFIG_SELECT_MEMORY_MODEL=y
 CONFIG_FLATMEM_MANUAL=y
 # CONFIG_DISCONTIGMEM_MANUAL is not set
@@ -237,12 +287,14 @@ CONFIG_FLATMEM_MANUAL=y
 CONFIG_FLATMEM=y
 CONFIG_FLAT_NODE_MEM_MAP=y
 CONFIG_PAGEFLAGS_EXTENDED=y
-CONFIG_SPLIT_PTLOCK_CPUS=4096
+CONFIG_SPLIT_PTLOCK_CPUS=999999
 # CONFIG_PHYS_ADDR_T_64BIT is not set
 CONFIG_ZONE_DMA_FLAG=0
 CONFIG_VIRT_TO_BUS=y
-CONFIG_UNEVICTABLE_LRU=y
+# CONFIG_KSM is not set
+CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
 CONFIG_ALIGNMENT_TRAP=y
+# CONFIG_UACCESS_WITH_MEMCPY is not set
 
 #
 # Boot options
@@ -288,7 +340,6 @@ CONFIG_NET=y
 #
 # Networking options
 #
-CONFIG_COMPAT_NET_DEV_OPS=y
 CONFIG_PACKET=y
 # CONFIG_PACKET_MMAP is not set
 CONFIG_UNIX=y
@@ -330,6 +381,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
 # CONFIG_NETFILTER is not set
 # CONFIG_IP_DCCP is not set
 # CONFIG_IP_SCTP is not set
+# CONFIG_RDS is not set
 # CONFIG_TIPC is not set
 # CONFIG_ATM is not set
 # CONFIG_BRIDGE is not set
@@ -343,6 +395,8 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
 # CONFIG_LAPB is not set
 # CONFIG_ECONET is not set
 # CONFIG_WAN_ROUTER is not set
+# CONFIG_PHONET is not set
+# CONFIG_IEEE802154 is not set
 # CONFIG_NET_SCHED is not set
 # CONFIG_DCB is not set
 
@@ -355,13 +409,13 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
 # CONFIG_IRDA is not set
 # CONFIG_BT is not set
 # CONFIG_AF_RXRPC is not set
-# CONFIG_PHONET is not set
 CONFIG_WIRELESS=y
 # CONFIG_CFG80211 is not set
-CONFIG_WIRELESS_OLD_REGULATORY=y
-# CONFIG_WIRELESS_EXT is not set
 # CONFIG_LIB80211 is not set
-# CONFIG_MAC80211 is not set
+
+#
+# CFG80211 needs to be enabled for MAC80211
+#
 # CONFIG_WIMAX is not set
 # CONFIG_RFKILL is not set
 # CONFIG_NET_9P is not set
@@ -374,6 +428,7 @@ CONFIG_WIRELESS_OLD_REGULATORY=y
 # Generic Driver Options
 #
 CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+# CONFIG_DEVTMPFS is not set
 # CONFIG_STANDALONE is not set
 # CONFIG_PREVENT_FIRMWARE_BUILD is not set
 CONFIG_FW_LOADER=y
@@ -412,8 +467,10 @@ CONFIG_MII=y
 # CONFIG_AX88796 is not set
 CONFIG_SMC91X=y
 # CONFIG_DM9000 is not set
+# CONFIG_ETHOC is not set
 # CONFIG_SMC911X is not set
 # CONFIG_SMSC911X is not set
+# CONFIG_DNET is not set
 # CONFIG_IBM_NEW_EMAC_ZMII is not set
 # CONFIG_IBM_NEW_EMAC_RGMII is not set
 # CONFIG_IBM_NEW_EMAC_TAH is not set
@@ -422,15 +479,12 @@ CONFIG_SMC91X=y
 # CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
 # CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
 # CONFIG_B44 is not set
+# CONFIG_KS8842 is not set
+# CONFIG_KS8851_MLL is not set
 # CONFIG_NETDEV_1000 is not set
 # CONFIG_NETDEV_10000 is not set
-
-#
-# Wireless LAN
-#
-# CONFIG_WLAN_PRE80211 is not set
-# CONFIG_WLAN_80211 is not set
-# CONFIG_IWLWIFI_LEDS is not set
+CONFIG_WLAN=y
+# CONFIG_HOSTAP is not set
 
 #
 # Enable WiMAX (Networking options) to see the WiMAX drivers
@@ -442,6 +496,7 @@ CONFIG_SMC91X=y
 # CONFIG_NETPOLL is not set
 # CONFIG_NET_POLL_CONTROLLER is not set
 # CONFIG_ISDN is not set
+# CONFIG_PHONE is not set
 
 #
 # Input device support
@@ -449,6 +504,7 @@ CONFIG_SMC91X=y
 CONFIG_INPUT=y
 # CONFIG_INPUT_FF_MEMLESS is not set
 # CONFIG_INPUT_POLLDEV is not set
+# CONFIG_INPUT_SPARSEKMAP is not set
 
 #
 # Userland interfaces
@@ -510,6 +566,11 @@ CONFIG_UNIX98_PTYS=y
 # CONFIG_TCG_TPM is not set
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
+
+#
+# PPS support
+#
+# CONFIG_PPS is not set
 CONFIG_ARCH_REQUIRE_GPIOLIB=y
 CONFIG_GPIOLIB=y
 # CONFIG_DEBUG_GPIO is not set
@@ -530,11 +591,14 @@ CONFIG_GPIOLIB=y
 #
 # SPI GPIO expanders:
 #
+
+#
+# AC97 GPIO expanders:
+#
 # CONFIG_W1 is not set
 # CONFIG_POWER_SUPPLY is not set
 # CONFIG_HWMON is not set
 # CONFIG_THERMAL is not set
-# CONFIG_THERMAL_HWMON is not set
 # CONFIG_WATCHDOG is not set
 CONFIG_SSB_POSSIBLE=y
 
@@ -555,22 +619,8 @@ CONFIG_SSB_POSSIBLE=y
 # CONFIG_MFD_T7L66XB is not set
 # CONFIG_MFD_TC6387XB is not set
 # CONFIG_MFD_TC6393XB is not set
-
-#
-# Multimedia devices
-#
-
-#
-# Multimedia core support
-#
-# CONFIG_VIDEO_DEV is not set
-# CONFIG_DVB_CORE is not set
-# CONFIG_VIDEO_MEDIA is not set
-
-#
-# Multimedia drivers
-#
-# CONFIG_DAB is not set
+# CONFIG_REGULATOR is not set
+# CONFIG_MEDIA_SUPPORT is not set
 
 #
 # Graphics support
@@ -595,13 +645,17 @@ CONFIG_DUMMY_CONSOLE=y
 # CONFIG_USB_SUPPORT is not set
 # CONFIG_MMC is not set
 # CONFIG_MEMSTICK is not set
-# CONFIG_ACCESSIBILITY is not set
 # CONFIG_NEW_LEDS is not set
+# CONFIG_ACCESSIBILITY is not set
 CONFIG_RTC_LIB=y
 # CONFIG_RTC_CLASS is not set
 # CONFIG_DMADEVICES is not set
-# CONFIG_REGULATOR is not set
+# CONFIG_AUXDISPLAY is not set
 # CONFIG_UIO is not set
+
+#
+# TI VLYNQ
+#
 # CONFIG_STAGING is not set
 
 #
@@ -613,10 +667,13 @@ CONFIG_RTC_LIB=y
 # CONFIG_REISERFS_FS is not set
 # CONFIG_JFS_FS is not set
 CONFIG_FS_POSIX_ACL=y
-CONFIG_FILE_LOCKING=y
 # CONFIG_XFS_FS is not set
+# CONFIG_GFS2_FS is not set
 # CONFIG_OCFS2_FS is not set
 # CONFIG_BTRFS_FS is not set
+# CONFIG_NILFS2_FS is not set
+CONFIG_FILE_LOCKING=y
+CONFIG_FSNOTIFY=y
 CONFIG_DNOTIFY=y
 CONFIG_INOTIFY=y
 CONFIG_INOTIFY_USER=y
@@ -627,6 +684,11 @@ CONFIG_INOTIFY_USER=y
 CONFIG_GENERIC_ACL=y
 
 #
+# Caches
+#
+# CONFIG_FSCACHE is not set
+
+#
 # CD-ROM/DVD Filesystems
 #
 # CONFIG_ISO9660_FS is not set
@@ -673,6 +735,7 @@ CONFIG_NFS_FS=y
 CONFIG_NFS_V3=y
 CONFIG_NFS_V3_ACL=y
 CONFIG_NFS_V4=y
+# CONFIG_NFS_V4_1 is not set
 CONFIG_ROOT_NFS=y
 # CONFIG_NFSD is not set
 CONFIG_LOCKD=y
@@ -681,7 +744,6 @@ CONFIG_NFS_ACL_SUPPORT=y
 CONFIG_NFS_COMMON=y
 CONFIG_SUNRPC=y
 CONFIG_SUNRPC_GSS=y
-# CONFIG_SUNRPC_REGISTER_V4 is not set
 CONFIG_RPCSEC_GSS_KRB5=y
 # CONFIG_RPCSEC_GSS_SPKM3 is not set
 # CONFIG_SMB_FS is not set
@@ -706,6 +768,7 @@ CONFIG_ENABLE_WARN_DEPRECATED=y
 CONFIG_ENABLE_MUST_CHECK=y
 CONFIG_FRAME_WARN=1024
 CONFIG_MAGIC_SYSRQ=y
+# CONFIG_STRIP_ASM_SYMS is not set
 # CONFIG_UNUSED_SYMBOLS is not set
 # CONFIG_DEBUG_FS is not set
 # CONFIG_HEADERS_CHECK is not set
@@ -714,11 +777,15 @@ CONFIG_DEBUG_KERNEL=y
 CONFIG_DETECT_SOFTLOCKUP=y
 # CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
 CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
+CONFIG_DETECT_HUNG_TASK=y
+# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set
+CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0
 CONFIG_SCHED_DEBUG=y
 # CONFIG_SCHEDSTATS is not set
 # CONFIG_TIMER_STATS is not set
 # CONFIG_DEBUG_OBJECTS is not set
 # CONFIG_DEBUG_SLAB is not set
+# CONFIG_DEBUG_KMEMLEAK is not set
 # CONFIG_DEBUG_PREEMPT is not set
 # CONFIG_DEBUG_RT_MUTEXES is not set
 # CONFIG_RT_MUTEX_TESTER is not set
@@ -738,28 +805,33 @@ CONFIG_DEBUG_MEMORY_INIT=y
 # CONFIG_DEBUG_LIST is not set
 # CONFIG_DEBUG_SG is not set
 # CONFIG_DEBUG_NOTIFIERS is not set
+# CONFIG_DEBUG_CREDENTIALS is not set
 # CONFIG_BOOT_PRINTK_DELAY is not set
 # CONFIG_RCU_TORTURE_TEST is not set
 # CONFIG_RCU_CPU_STALL_DETECTOR is not set
 # CONFIG_BACKTRACE_SELF_TEST is not set
 # CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
+# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
 # CONFIG_FAULT_INJECTION is not set
 # CONFIG_LATENCYTOP is not set
 # CONFIG_SYSCTL_SYSCALL_CHECK is not set
+# CONFIG_PAGE_POISONING is not set
 CONFIG_HAVE_FUNCTION_TRACER=y
-
-#
-# Tracers
-#
+CONFIG_TRACING_SUPPORT=y
+CONFIG_FTRACE=y
 # CONFIG_FUNCTION_TRACER is not set
 # CONFIG_IRQSOFF_TRACER is not set
 # CONFIG_PREEMPT_TRACER is not set
 # CONFIG_SCHED_TRACER is not set
-# CONFIG_CONTEXT_SWITCH_TRACER is not set
+# CONFIG_ENABLE_DEFAULT_TRACERS is not set
 # CONFIG_BOOT_TRACER is not set
-# CONFIG_TRACE_BRANCH_PROFILING is not set
+CONFIG_BRANCH_PROFILE_NONE=y
+# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set
+# CONFIG_PROFILE_ALL_BRANCHES is not set
 # CONFIG_STACK_TRACER is not set
-# CONFIG_DYNAMIC_PRINTK_DEBUG is not set
+# CONFIG_KMEMTRACE is not set
+# CONFIG_WORKQUEUE_TRACER is not set
+# CONFIG_BLK_DEV_IO_TRACE is not set
 # CONFIG_SAMPLES is not set
 CONFIG_HAVE_ARCH_KGDB=y
 # CONFIG_KGDB is not set
@@ -768,7 +840,9 @@ CONFIG_DEBUG_USER=y
 CONFIG_DEBUG_ERRORS=y
 # CONFIG_DEBUG_STACK_USAGE is not set
 CONFIG_DEBUG_LL=y
+# CONFIG_EARLY_PRINTK is not set
 # CONFIG_DEBUG_ICEDCC is not set
+# CONFIG_OC_ETM is not set
 
 #
 # Security options
@@ -776,13 +850,16 @@ CONFIG_DEBUG_LL=y
 # CONFIG_KEYS is not set
 # CONFIG_SECURITY is not set
 # CONFIG_SECURITYFS is not set
-# CONFIG_SECURITY_FILE_CAPABILITIES is not set
+# CONFIG_DEFAULT_SECURITY_SELINUX is not set
+# CONFIG_DEFAULT_SECURITY_SMACK is not set
+# CONFIG_DEFAULT_SECURITY_TOMOYO is not set
+CONFIG_DEFAULT_SECURITY_DAC=y
+CONFIG_DEFAULT_SECURITY=""
 CONFIG_CRYPTO=y
 
 #
 # Crypto core or helper
 #
-# CONFIG_CRYPTO_FIPS is not set
 CONFIG_CRYPTO_ALGAPI=y
 CONFIG_CRYPTO_ALGAPI2=y
 CONFIG_CRYPTO_AEAD2=y
@@ -791,10 +868,12 @@ CONFIG_CRYPTO_BLKCIPHER2=y
 CONFIG_CRYPTO_HASH=y
 CONFIG_CRYPTO_HASH2=y
 CONFIG_CRYPTO_RNG2=y
+CONFIG_CRYPTO_PCOMP=y
 CONFIG_CRYPTO_MANAGER=y
 CONFIG_CRYPTO_MANAGER2=y
 # CONFIG_CRYPTO_GF128MUL is not set
 # CONFIG_CRYPTO_NULL is not set
+CONFIG_CRYPTO_WORKQUEUE=y
 # CONFIG_CRYPTO_CRYPTD is not set
 # CONFIG_CRYPTO_AUTHENC is not set
 # CONFIG_CRYPTO_TEST is not set
@@ -822,11 +901,13 @@ CONFIG_CRYPTO_CBC=y
 #
 # CONFIG_CRYPTO_HMAC is not set
 # CONFIG_CRYPTO_XCBC is not set
+# CONFIG_CRYPTO_VMAC is not set
 
 #
 # Digest
 #
 # CONFIG_CRYPTO_CRC32C is not set
+# CONFIG_CRYPTO_GHASH is not set
 # CONFIG_CRYPTO_MD4 is not set
 CONFIG_CRYPTO_MD5=y
 # CONFIG_CRYPTO_MICHAEL_MIC is not set
@@ -863,6 +944,7 @@ CONFIG_CRYPTO_DES=y
 # Compression
 #
 # CONFIG_CRYPTO_DEFLATE is not set
+# CONFIG_CRYPTO_ZLIB is not set
 # CONFIG_CRYPTO_LZO is not set
 
 #
@@ -870,6 +952,7 @@ CONFIG_CRYPTO_DES=y
 #
 # CONFIG_CRYPTO_ANSI_CPRNG is not set
 CONFIG_CRYPTO_HW=y
+# CONFIG_BINARY_PRINTF is not set
 
 #
 # Library routines
@@ -884,7 +967,7 @@ CONFIG_CRC32=y
 # CONFIG_CRC7 is not set
 # CONFIG_LIBCRC32C is not set
 CONFIG_ZLIB_INFLATE=y
-CONFIG_PLIST=y
 CONFIG_HAS_IOMEM=y
 CONFIG_HAS_IOPORT=y
 CONFIG_HAS_DMA=y
+CONFIG_NLATTR=y
diff --git a/arch/arm/configs/raumfeld_defconfig b/arch/arm/configs/raumfeld_defconfig
new file mode 100644
index 000000000000..acb1a8f30e31
--- /dev/null
+++ b/arch/arm/configs/raumfeld_defconfig
@@ -0,0 +1,1898 @@
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.32-rc5
+# Sun Nov  1 21:57:32 2009
+#
+CONFIG_ARM=y
+CONFIG_HAVE_PWM=y
+CONFIG_SYS_SUPPORTS_APM_EMULATION=y
+CONFIG_GENERIC_GPIO=y
+CONFIG_GENERIC_TIME=y
+CONFIG_GENERIC_CLOCKEVENTS=y
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_HAVE_LATENCYTOP_SUPPORT=y
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+CONFIG_HARDIRQS_SW_RESEND=y
+CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+CONFIG_ARCH_HAS_CPUFREQ=y
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_ARCH_MTD_XIP=y
+CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
+CONFIG_VECTORS_BASE=0xffff0000
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+CONFIG_CONSTRUCTORS=y
+
+#
+# General setup
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+CONFIG_LOCALVERSION=""
+# CONFIG_LOCALVERSION_AUTO is not set
+# CONFIG_SWAP is not set
+# CONFIG_SYSVIPC is not set
+# CONFIG_POSIX_MQUEUE is not set
+# CONFIG_BSD_PROCESS_ACCT is not set
+# CONFIG_TASKSTATS is not set
+# CONFIG_AUDIT is not set
+
+#
+# RCU Subsystem
+#
+CONFIG_TREE_RCU=y
+# CONFIG_TREE_PREEMPT_RCU is not set
+# CONFIG_RCU_TRACE is not set
+CONFIG_RCU_FANOUT=32
+# CONFIG_RCU_FANOUT_EXACT is not set
+# CONFIG_TREE_RCU_TRACE is not set
+# CONFIG_IKCONFIG is not set
+CONFIG_LOG_BUF_SHIFT=17
+# CONFIG_GROUP_SCHED is not set
+# CONFIG_CGROUPS is not set
+# CONFIG_SYSFS_DEPRECATED_V2 is not set
+# CONFIG_RELAY is not set
+CONFIG_NAMESPACES=y
+# CONFIG_UTS_NS is not set
+# CONFIG_USER_NS is not set
+# CONFIG_PID_NS is not set
+# CONFIG_NET_NS is not set
+# CONFIG_BLK_DEV_INITRD is not set
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_SYSCTL=y
+CONFIG_ANON_INODES=y
+# CONFIG_EMBEDDED is not set
+CONFIG_UID16=y
+CONFIG_SYSCTL_SYSCALL=y
+CONFIG_KALLSYMS=y
+# CONFIG_KALLSYMS_ALL is not set
+# CONFIG_KALLSYMS_EXTRA_PASS is not set
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_ELF_CORE=y
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+CONFIG_EPOLL=y
+CONFIG_SIGNALFD=y
+CONFIG_TIMERFD=y
+CONFIG_EVENTFD=y
+CONFIG_SHMEM=y
+CONFIG_AIO=y
+
+#
+# Kernel Performance Events And Counters
+#
+CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_SLUB_DEBUG=y
+CONFIG_COMPAT_BRK=y
+# CONFIG_SLAB is not set
+CONFIG_SLUB=y
+# CONFIG_SLOB is not set
+# CONFIG_PROFILING is not set
+CONFIG_HAVE_OPROFILE=y
+# CONFIG_KPROBES is not set
+CONFIG_HAVE_KPROBES=y
+CONFIG_HAVE_KRETPROBES=y
+CONFIG_HAVE_CLK=y
+
+#
+# GCOV-based kernel profiling
+#
+CONFIG_SLOW_WORK=y
+CONFIG_HAVE_GENERIC_DMA_COHERENT=y
+CONFIG_SLABINFO=y
+CONFIG_RT_MUTEXES=y
+CONFIG_BASE_SMALL=0
+CONFIG_MODULES=y
+# CONFIG_MODULE_FORCE_LOAD is not set
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_MODULE_FORCE_UNLOAD is not set
+# CONFIG_MODVERSIONS is not set
+# CONFIG_MODULE_SRCVERSION_ALL is not set
+CONFIG_BLOCK=y
+# CONFIG_LBDAF is not set
+# CONFIG_BLK_DEV_BSG is not set
+# CONFIG_BLK_DEV_INTEGRITY is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_CFQ=y
+# CONFIG_DEFAULT_AS is not set
+# CONFIG_DEFAULT_DEADLINE is not set
+CONFIG_DEFAULT_CFQ=y
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="cfq"
+CONFIG_FREEZER=y
+
+#
+# System Type
+#
+CONFIG_MMU=y
+# CONFIG_ARCH_AAEC2000 is not set
+# CONFIG_ARCH_INTEGRATOR is not set
+# CONFIG_ARCH_REALVIEW is not set
+# CONFIG_ARCH_VERSATILE is not set
+# CONFIG_ARCH_AT91 is not set
+# CONFIG_ARCH_CLPS711X is not set
+# CONFIG_ARCH_GEMINI is not set
+# CONFIG_ARCH_EBSA110 is not set
+# CONFIG_ARCH_EP93XX is not set
+# CONFIG_ARCH_FOOTBRIDGE is not set
+# CONFIG_ARCH_MXC is not set
+# CONFIG_ARCH_STMP3XXX is not set
+# CONFIG_ARCH_NETX is not set
+# CONFIG_ARCH_H720X is not set
+# CONFIG_ARCH_NOMADIK is not set
+# CONFIG_ARCH_IOP13XX is not set
+# CONFIG_ARCH_IOP32X is not set
+# CONFIG_ARCH_IOP33X is not set
+# CONFIG_ARCH_IXP23XX is not set
+# CONFIG_ARCH_IXP2000 is not set
+# CONFIG_ARCH_IXP4XX is not set
+# CONFIG_ARCH_L7200 is not set
+# CONFIG_ARCH_KIRKWOOD is not set
+# CONFIG_ARCH_LOKI is not set
+# CONFIG_ARCH_MV78XX0 is not set
+# CONFIG_ARCH_ORION5X is not set
+# CONFIG_ARCH_MMP is not set
+# CONFIG_ARCH_KS8695 is not set
+# CONFIG_ARCH_NS9XXX is not set
+# CONFIG_ARCH_W90X900 is not set
+# CONFIG_ARCH_PNX4008 is not set
+CONFIG_ARCH_PXA=y
+# CONFIG_ARCH_MSM is not set
+# CONFIG_ARCH_RPC is not set
+# CONFIG_ARCH_SA1100 is not set
+# CONFIG_ARCH_S3C2410 is not set
+# CONFIG_ARCH_S3C64XX is not set
+# CONFIG_ARCH_S5PC1XX is not set
+# CONFIG_ARCH_SHARK is not set
+# CONFIG_ARCH_LH7A40X is not set
+# CONFIG_ARCH_U300 is not set
+# CONFIG_ARCH_DAVINCI is not set
+# CONFIG_ARCH_OMAP is not set
+# CONFIG_ARCH_BCMRING is not set
+
+#
+# Intel PXA2xx/PXA3xx Implementations
+#
+
+#
+# Supported PXA3xx Processor Variants
+#
+CONFIG_CPU_PXA300=y
+# CONFIG_CPU_PXA310 is not set
+CONFIG_CPU_PXA320=y
+# CONFIG_CPU_PXA930 is not set
+# CONFIG_CPU_PXA935 is not set
+# CONFIG_CPU_PXA950 is not set
+
+#
+# Intel/Marvell Dev Platforms (sorted by hardware release time)
+#
+# CONFIG_ARCH_LUBBOCK is not set
+# CONFIG_MACH_MAINSTONE is not set
+# CONFIG_MACH_ZYLONITE is not set
+# CONFIG_MACH_LITTLETON is not set
+# CONFIG_MACH_TAVOREVB is not set
+# CONFIG_MACH_SAAR is not set
+
+#
+# Third Party Dev Platforms (sorted by vendor name)
+#
+# CONFIG_ARCH_PXA_IDP is not set
+# CONFIG_ARCH_VIPER is not set
+# CONFIG_MACH_BALLOON3 is not set
+# CONFIG_MACH_CSB726 is not set
+# CONFIG_MACH_ARMCORE is not set
+# CONFIG_MACH_EM_X270 is not set
+# CONFIG_MACH_EXEDA is not set
+# CONFIG_MACH_CM_X300 is not set
+# CONFIG_ARCH_GUMSTIX is not set
+# CONFIG_MACH_INTELMOTE2 is not set
+# CONFIG_MACH_STARGATE2 is not set
+# CONFIG_MACH_XCEP is not set
+# CONFIG_TRIZEPS_PXA is not set
+# CONFIG_MACH_LOGICPD_PXA270 is not set
+# CONFIG_MACH_PCM027 is not set
+# CONFIG_MACH_COLIBRI is not set
+# CONFIG_MACH_COLIBRI300 is not set
+# CONFIG_MACH_COLIBRI320 is not set
+
+#
+# End-user Products (sorted by vendor name)
+#
+# CONFIG_MACH_H4700 is not set
+# CONFIG_MACH_H5000 is not set
+# CONFIG_MACH_HIMALAYA is not set
+# CONFIG_MACH_MAGICIAN is not set
+# CONFIG_MACH_MIOA701 is not set
+# CONFIG_PXA_EZX is not set
+# CONFIG_MACH_MP900C is not set
+# CONFIG_ARCH_PXA_PALM is not set
+CONFIG_MACH_RAUMFELD_RC=y
+CONFIG_MACH_RAUMFELD_CONNECTOR=y
+CONFIG_MACH_RAUMFELD_PROTO=y
+CONFIG_MACH_RAUMFELD_SPEAKER=y
+# CONFIG_PXA_SHARPSL is not set
+# CONFIG_ARCH_PXA_ESERIES is not set
+CONFIG_PXA3xx=y
+CONFIG_PXA_SSP=y
+CONFIG_PLAT_PXA=y
+
+#
+# Processor Type
+#
+CONFIG_CPU_32=y
+CONFIG_CPU_XSC3=y
+CONFIG_CPU_32v5=y
+CONFIG_CPU_ABRT_EV5T=y
+CONFIG_CPU_PABRT_LEGACY=y
+CONFIG_CPU_CACHE_VIVT=y
+CONFIG_CPU_TLB_V4WBI=y
+CONFIG_CPU_CP15=y
+CONFIG_CPU_CP15_MMU=y
+CONFIG_IO_36=y
+
+#
+# Processor Features
+#
+CONFIG_ARM_THUMB=y
+# CONFIG_CPU_DCACHE_DISABLE is not set
+# CONFIG_CPU_BPREDICT_DISABLE is not set
+CONFIG_OUTER_CACHE=y
+CONFIG_CACHE_XSC3L2=y
+CONFIG_ARM_L1_CACHE_SHIFT=5
+CONFIG_IWMMXT=y
+CONFIG_COMMON_CLKDEV=y
+
+#
+# Bus support
+#
+# CONFIG_PCI_SYSCALL is not set
+# CONFIG_ARCH_SUPPORTS_MSI is not set
+# CONFIG_PCCARD is not set
+
+#
+# Kernel Features
+#
+CONFIG_TICK_ONESHOT=y
+CONFIG_NO_HZ=y
+# CONFIG_HIGH_RES_TIMERS is not set
+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
+CONFIG_VMSPLIT_3G=y
+# CONFIG_VMSPLIT_2G is not set
+# CONFIG_VMSPLIT_1G is not set
+CONFIG_PAGE_OFFSET=0xC0000000
+CONFIG_PREEMPT_NONE=y
+# CONFIG_PREEMPT_VOLUNTARY is not set
+# CONFIG_PREEMPT is not set
+CONFIG_HZ=100
+CONFIG_AEABI=y
+# CONFIG_OABI_COMPAT is not set
+# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
+# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
+# CONFIG_HIGHMEM is not set
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_FLATMEM_MANUAL=y
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+# CONFIG_SPARSEMEM_MANUAL is not set
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+CONFIG_PAGEFLAGS_EXTENDED=y
+CONFIG_SPLIT_PTLOCK_CPUS=4096
+# CONFIG_PHYS_ADDR_T_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=0
+CONFIG_VIRT_TO_BUS=y
+CONFIG_HAVE_MLOCK=y
+CONFIG_HAVE_MLOCKED_PAGE_BIT=y
+# CONFIG_KSM is not set
+CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
+CONFIG_ALIGNMENT_TRAP=y
+# CONFIG_UACCESS_WITH_MEMCPY is not set
+
+#
+# Boot options
+#
+CONFIG_ZBOOT_ROM_TEXT=0
+CONFIG_ZBOOT_ROM_BSS=0
+CONFIG_CMDLINE="console=ttyS0,115200 rw"
+# CONFIG_XIP_KERNEL is not set
+# CONFIG_KEXEC is not set
+
+#
+# CPU Power Management
+#
+CONFIG_CPU_FREQ=y
+CONFIG_CPU_FREQ_TABLE=y
+# CONFIG_CPU_FREQ_DEBUG is not set
+CONFIG_CPU_FREQ_STAT=y
+# CONFIG_CPU_FREQ_STAT_DETAILS is not set
+CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y
+# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set
+# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set
+# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set
+# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set
+CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
+# CONFIG_CPU_FREQ_GOV_POWERSAVE is not set
+# CONFIG_CPU_FREQ_GOV_USERSPACE is not set
+# CONFIG_CPU_FREQ_GOV_ONDEMAND is not set
+# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set
+CONFIG_CPU_IDLE=y
+CONFIG_CPU_IDLE_GOV_LADDER=y
+CONFIG_CPU_IDLE_GOV_MENU=y
+
+#
+# Floating point emulation
+#
+
+#
+# At least one emulation must be selected
+#
+
+#
+# Userspace binary formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+CONFIG_HAVE_AOUT=y
+# CONFIG_BINFMT_AOUT is not set
+# CONFIG_BINFMT_MISC is not set
+
+#
+# Power management options
+#
+CONFIG_PM=y
+# CONFIG_PM_DEBUG is not set
+CONFIG_PM_SLEEP=y
+CONFIG_SUSPEND=y
+CONFIG_SUSPEND_FREEZER=y
+CONFIG_APM_EMULATION=y
+# CONFIG_PM_RUNTIME is not set
+CONFIG_ARCH_SUSPEND_POSSIBLE=y
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+CONFIG_PACKET_MMAP=y
+CONFIG_UNIX=y
+CONFIG_XFRM=y
+# CONFIG_XFRM_USER is not set
+# CONFIG_XFRM_SUB_POLICY is not set
+# CONFIG_XFRM_MIGRATE is not set
+# CONFIG_XFRM_STATISTICS is not set
+# CONFIG_NET_KEY is not set
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_FIB_HASH=y
+CONFIG_IP_PNP=y
+# CONFIG_IP_PNP_DHCP is not set
+# CONFIG_IP_PNP_BOOTP is not set
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_IP_MROUTE is not set
+# CONFIG_ARPD is not set
+CONFIG_SYN_COOKIES=y
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_XFRM_TUNNEL is not set
+CONFIG_INET_TUNNEL=y
+CONFIG_INET_XFRM_MODE_TRANSPORT=y
+CONFIG_INET_XFRM_MODE_TUNNEL=y
+CONFIG_INET_XFRM_MODE_BEET=y
+# CONFIG_INET_LRO is not set
+CONFIG_INET_DIAG=y
+CONFIG_INET_TCP_DIAG=y
+# CONFIG_TCP_CONG_ADVANCED is not set
+CONFIG_TCP_CONG_CUBIC=y
+CONFIG_DEFAULT_TCP_CONG="cubic"
+# CONFIG_TCP_MD5SIG is not set
+CONFIG_IPV6=y
+# CONFIG_IPV6_PRIVACY is not set
+# CONFIG_IPV6_ROUTER_PREF is not set
+# CONFIG_IPV6_OPTIMISTIC_DAD is not set
+# CONFIG_INET6_AH is not set
+# CONFIG_INET6_ESP is not set
+# CONFIG_INET6_IPCOMP is not set
+# CONFIG_IPV6_MIP6 is not set
+# CONFIG_INET6_XFRM_TUNNEL is not set
+# CONFIG_INET6_TUNNEL is not set
+CONFIG_INET6_XFRM_MODE_TRANSPORT=y
+CONFIG_INET6_XFRM_MODE_TUNNEL=y
+CONFIG_INET6_XFRM_MODE_BEET=y
+# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set
+CONFIG_IPV6_SIT=y
+CONFIG_IPV6_NDISC_NODETYPE=y
+# CONFIG_IPV6_TUNNEL is not set
+# CONFIG_IPV6_MULTIPLE_TABLES is not set
+# CONFIG_IPV6_MROUTE is not set
+# CONFIG_NETWORK_SECMARK is not set
+# CONFIG_NETFILTER is not set
+# CONFIG_IP_DCCP is not set
+# CONFIG_IP_SCTP is not set
+# CONFIG_RDS is not set
+# CONFIG_TIPC is not set
+# CONFIG_ATM is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_NET_DSA is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_DECNET is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_PHONET is not set
+# CONFIG_IEEE802154 is not set
+# CONFIG_NET_SCHED is not set
+# CONFIG_DCB is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# CONFIG_HAMRADIO is not set
+# CONFIG_CAN is not set
+# CONFIG_IRDA is not set
+# CONFIG_BT is not set
+# CONFIG_AF_RXRPC is not set
+CONFIG_WIRELESS=y
+CONFIG_CFG80211=y
+# CONFIG_NL80211_TESTMODE is not set
+# CONFIG_CFG80211_DEVELOPER_WARNINGS is not set
+CONFIG_CFG80211_REG_DEBUG=y
+CONFIG_CFG80211_DEFAULT_PS=y
+CONFIG_CFG80211_DEFAULT_PS_VALUE=1
+CONFIG_WIRELESS_OLD_REGULATORY=y
+CONFIG_WIRELESS_EXT=y
+CONFIG_WIRELESS_EXT_SYSFS=y
+CONFIG_LIB80211=y
+# CONFIG_LIB80211_DEBUG is not set
+CONFIG_MAC80211=y
+CONFIG_MAC80211_RC_MINSTREL=y
+# CONFIG_MAC80211_RC_DEFAULT_PID is not set
+CONFIG_MAC80211_RC_DEFAULT_MINSTREL=y
+CONFIG_MAC80211_RC_DEFAULT="minstrel"
+# CONFIG_MAC80211_MESH is not set
+# CONFIG_MAC80211_LEDS is not set
+# CONFIG_MAC80211_DEBUG_MENU is not set
+# CONFIG_WIMAX is not set
+# CONFIG_RFKILL is not set
+# CONFIG_NET_9P is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+# CONFIG_DEVTMPFS is not set
+CONFIG_STANDALONE=y
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+CONFIG_FW_LOADER=y
+CONFIG_FIRMWARE_IN_KERNEL=y
+CONFIG_EXTRA_FIRMWARE=""
+# CONFIG_DEBUG_DRIVER is not set
+# CONFIG_DEBUG_DEVRES is not set
+# CONFIG_SYS_HYPERVISOR is not set
+# CONFIG_CONNECTOR is not set
+CONFIG_MTD=y
+# CONFIG_MTD_DEBUG is not set
+# CONFIG_MTD_TESTS is not set
+CONFIG_MTD_CONCAT=y
+CONFIG_MTD_PARTITIONS=y
+# CONFIG_MTD_REDBOOT_PARTS is not set
+# CONFIG_MTD_CMDLINE_PARTS is not set
+# CONFIG_MTD_AFS_PARTS is not set
+# CONFIG_MTD_AR7_PARTS is not set
+
+#
+# User Modules And Translation Layers
+#
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLKDEVS=y
+CONFIG_MTD_BLOCK=y
+# CONFIG_FTL is not set
+CONFIG_NFTL=y
+CONFIG_NFTL_RW=y
+# CONFIG_INFTL is not set
+# CONFIG_RFD_FTL is not set
+# CONFIG_SSFDC is not set
+# CONFIG_MTD_OOPS is not set
+
+#
+# RAM/ROM/Flash chip drivers
+#
+# CONFIG_MTD_CFI is not set
+# CONFIG_MTD_JEDECPROBE is not set
+CONFIG_MTD_MAP_BANK_WIDTH_1=y
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
+CONFIG_MTD_MAP_BANK_WIDTH_4=y
+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
+CONFIG_MTD_CFI_I1=y
+CONFIG_MTD_CFI_I2=y
+# CONFIG_MTD_CFI_I4 is not set
+# CONFIG_MTD_CFI_I8 is not set
+# CONFIG_MTD_RAM is not set
+# CONFIG_MTD_ROM is not set
+# CONFIG_MTD_ABSENT is not set
+
+#
+# Mapping drivers for chip access
+#
+# CONFIG_MTD_COMPLEX_MAPPINGS is not set
+# CONFIG_MTD_PLATRAM is not set
+
+#
+# Self-contained MTD device drivers
+#
+# CONFIG_MTD_DATAFLASH is not set
+# CONFIG_MTD_M25P80 is not set
+# CONFIG_MTD_SST25L is not set
+# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_PHRAM is not set
+# CONFIG_MTD_MTDRAM is not set
+CONFIG_MTD_BLOCK2MTD=y
+
+#
+# Disk-On-Chip Device Drivers
+#
+# CONFIG_MTD_DOC2000 is not set
+# CONFIG_MTD_DOC2001 is not set
+# CONFIG_MTD_DOC2001PLUS is not set
+CONFIG_MTD_NAND=y
+# CONFIG_MTD_NAND_VERIFY_WRITE is not set
+# CONFIG_MTD_NAND_ECC_SMC is not set
+# CONFIG_MTD_NAND_MUSEUM_IDS is not set
+# CONFIG_MTD_NAND_H1900 is not set
+# CONFIG_MTD_NAND_GPIO is not set
+CONFIG_MTD_NAND_IDS=y
+# CONFIG_MTD_NAND_DISKONCHIP is not set
+# CONFIG_MTD_NAND_SHARPSL is not set
+CONFIG_MTD_NAND_PXA3xx=y
+# CONFIG_MTD_NAND_PXA3xx_BUILTIN is not set
+# CONFIG_MTD_NAND_NANDSIM is not set
+# CONFIG_MTD_NAND_PLATFORM is not set
+# CONFIG_MTD_ALAUDA is not set
+# CONFIG_MTD_ONENAND is not set
+
+#
+# LPDDR flash memory drivers
+#
+# CONFIG_MTD_LPDDR is not set
+
+#
+# UBI - Unsorted block images
+#
+CONFIG_MTD_UBI=y
+CONFIG_MTD_UBI_WL_THRESHOLD=4096
+CONFIG_MTD_UBI_BEB_RESERVE=1
+# CONFIG_MTD_UBI_GLUEBI is not set
+
+#
+# UBI debugging options
+#
+# CONFIG_MTD_UBI_DEBUG is not set
+# CONFIG_PARPORT is not set
+CONFIG_BLK_DEV=y
+# CONFIG_BLK_DEV_COW_COMMON is not set
+CONFIG_BLK_DEV_LOOP=y
+# CONFIG_BLK_DEV_CRYPTOLOOP is not set
+# CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_UB is not set
+# CONFIG_BLK_DEV_RAM is not set
+# CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_ATA_OVER_ETH is not set
+# CONFIG_MG_DISK is not set
+CONFIG_MISC_DEVICES=y
+# CONFIG_ICS932S401 is not set
+# CONFIG_ENCLOSURE_SERVICES is not set
+CONFIG_ISL29003=y
+CONFIG_TI_DAC7512=y
+# CONFIG_C2PORT is not set
+
+#
+# EEPROM support
+#
+# CONFIG_EEPROM_AT24 is not set
+# CONFIG_EEPROM_AT25 is not set
+# CONFIG_EEPROM_LEGACY is not set
+# CONFIG_EEPROM_MAX6875 is not set
+# CONFIG_EEPROM_93CX6 is not set
+CONFIG_HAVE_IDE=y
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+# CONFIG_RAID_ATTRS is not set
+CONFIG_SCSI=y
+CONFIG_SCSI_DMA=y
+# CONFIG_SCSI_TGT is not set
+# CONFIG_SCSI_NETLINK is not set
+CONFIG_SCSI_PROC_FS=y
+
+#
+# SCSI support type (disk, tape, CD-ROM)
+#
+CONFIG_BLK_DEV_SD=y
+# CONFIG_CHR_DEV_ST is not set
+# CONFIG_CHR_DEV_OSST is not set
+# CONFIG_BLK_DEV_SR is not set
+CONFIG_CHR_DEV_SG=y
+# CONFIG_CHR_DEV_SCH is not set
+# CONFIG_SCSI_MULTI_LUN is not set
+# CONFIG_SCSI_CONSTANTS is not set
+# CONFIG_SCSI_LOGGING is not set
+# CONFIG_SCSI_SCAN_ASYNC is not set
+CONFIG_SCSI_WAIT_SCAN=m
+
+#
+# SCSI Transports
+#
+# CONFIG_SCSI_SPI_ATTRS is not set
+# CONFIG_SCSI_FC_ATTRS is not set
+# CONFIG_SCSI_ISCSI_ATTRS is not set
+# CONFIG_SCSI_SAS_LIBSAS is not set
+# CONFIG_SCSI_SRP_ATTRS is not set
+CONFIG_SCSI_LOWLEVEL=y
+# CONFIG_ISCSI_TCP is not set
+# CONFIG_LIBFC is not set
+# CONFIG_LIBFCOE is not set
+# CONFIG_SCSI_DEBUG is not set
+# CONFIG_SCSI_DH is not set
+# CONFIG_SCSI_OSD_INITIATOR is not set
+# CONFIG_ATA is not set
+# CONFIG_MD is not set
+CONFIG_NETDEVICES=y
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_MACVLAN is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+# CONFIG_VETH is not set
+CONFIG_PHYLIB=y
+
+#
+# MII PHY device drivers
+#
+# CONFIG_MARVELL_PHY is not set
+# CONFIG_DAVICOM_PHY is not set
+# CONFIG_QSEMI_PHY is not set
+# CONFIG_LXT_PHY is not set
+# CONFIG_CICADA_PHY is not set
+# CONFIG_VITESSE_PHY is not set
+# CONFIG_SMSC_PHY is not set
+# CONFIG_BROADCOM_PHY is not set
+# CONFIG_ICPLUS_PHY is not set
+# CONFIG_REALTEK_PHY is not set
+# CONFIG_NATIONAL_PHY is not set
+# CONFIG_STE10XP is not set
+# CONFIG_LSI_ET1011C_PHY is not set
+# CONFIG_FIXED_PHY is not set
+# CONFIG_MDIO_BITBANG is not set
+CONFIG_NET_ETHERNET=y
+CONFIG_MII=y
+# CONFIG_AX88796 is not set
+# CONFIG_SMC91X is not set
+# CONFIG_DM9000 is not set
+# CONFIG_ENC28J60 is not set
+# CONFIG_ETHOC is not set
+# CONFIG_SMC911X is not set
+CONFIG_SMSC911X=y
+# CONFIG_DNET is not set
+# CONFIG_IBM_NEW_EMAC_ZMII is not set
+# CONFIG_IBM_NEW_EMAC_RGMII is not set
+# CONFIG_IBM_NEW_EMAC_TAH is not set
+# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
+# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
+# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
+# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
+# CONFIG_B44 is not set
+# CONFIG_KS8842 is not set
+# CONFIG_KS8851 is not set
+# CONFIG_KS8851_MLL is not set
+# CONFIG_NETDEV_1000 is not set
+# CONFIG_NETDEV_10000 is not set
+CONFIG_WLAN=y
+# CONFIG_WLAN_PRE80211 is not set
+CONFIG_WLAN_80211=y
+CONFIG_LIBERTAS=y
+# CONFIG_LIBERTAS_USB is not set
+CONFIG_LIBERTAS_SDIO=m
+# CONFIG_LIBERTAS_SPI is not set
+# CONFIG_LIBERTAS_DEBUG is not set
+# CONFIG_LIBERTAS_THINFIRM is not set
+# CONFIG_AT76C50X_USB is not set
+# CONFIG_USB_ZD1201 is not set
+# CONFIG_USB_NET_RNDIS_WLAN is not set
+# CONFIG_RTL8187 is not set
+# CONFIG_MAC80211_HWSIM is not set
+# CONFIG_P54_COMMON is not set
+# CONFIG_ATH_COMMON is not set
+# CONFIG_HOSTAP is not set
+# CONFIG_B43 is not set
+# CONFIG_B43LEGACY is not set
+# CONFIG_ZD1211RW is not set
+# CONFIG_RT2X00 is not set
+# CONFIG_WL12XX is not set
+# CONFIG_IWM is not set
+
+#
+# Enable WiMAX (Networking options) to see the WiMAX drivers
+#
+
+#
+# USB Network Adapters
+#
+# CONFIG_USB_CATC is not set
+# CONFIG_USB_KAWETH is not set
+# CONFIG_USB_PEGASUS is not set
+# CONFIG_USB_RTL8150 is not set
+CONFIG_USB_USBNET=y
+# CONFIG_USB_NET_AX8817X is not set
+CONFIG_USB_NET_CDCETHER=y
+# CONFIG_USB_NET_CDC_EEM is not set
+# CONFIG_USB_NET_DM9601 is not set
+# CONFIG_USB_NET_SMSC95XX is not set
+# CONFIG_USB_NET_GL620A is not set
+# CONFIG_USB_NET_NET1080 is not set
+# CONFIG_USB_NET_PLUSB is not set
+CONFIG_USB_NET_MCS7830=y
+# CONFIG_USB_NET_RNDIS_HOST is not set
+# CONFIG_USB_NET_CDC_SUBSET is not set
+# CONFIG_USB_NET_ZAURUS is not set
+# CONFIG_USB_NET_INT51X1 is not set
+# CONFIG_WAN is not set
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+# CONFIG_NETCONSOLE is not set
+# CONFIG_NETPOLL is not set
+# CONFIG_NET_POLL_CONTROLLER is not set
+# CONFIG_ISDN is not set
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+# CONFIG_INPUT_FF_MEMLESS is not set
+CONFIG_INPUT_POLLDEV=y
+
+#
+# Userland interfaces
+#
+CONFIG_INPUT_MOUSEDEV=y
+CONFIG_INPUT_MOUSEDEV_PSAUX=y
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+# CONFIG_INPUT_JOYDEV is not set
+CONFIG_INPUT_EVDEV=y
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input Device Drivers
+#
+CONFIG_INPUT_KEYBOARD=y
+# CONFIG_KEYBOARD_ADP5588 is not set
+CONFIG_KEYBOARD_ATKBD=y
+# CONFIG_QT2160 is not set
+# CONFIG_KEYBOARD_LKKBD is not set
+CONFIG_KEYBOARD_GPIO=y
+# CONFIG_KEYBOARD_MATRIX is not set
+# CONFIG_KEYBOARD_LM8323 is not set
+# CONFIG_KEYBOARD_MAX7359 is not set
+# CONFIG_KEYBOARD_NEWTON is not set
+# CONFIG_KEYBOARD_OPENCORES is not set
+# CONFIG_KEYBOARD_PXA27x is not set
+# CONFIG_KEYBOARD_STOWAWAY is not set
+# CONFIG_KEYBOARD_SUNKBD is not set
+# CONFIG_KEYBOARD_XTKBD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TABLET is not set
+CONFIG_INPUT_TOUCHSCREEN=y
+# CONFIG_TOUCHSCREEN_ADS7846 is not set
+# CONFIG_TOUCHSCREEN_AD7877 is not set
+# CONFIG_TOUCHSCREEN_AD7879_I2C is not set
+# CONFIG_TOUCHSCREEN_AD7879_SPI is not set
+# CONFIG_TOUCHSCREEN_AD7879 is not set
+CONFIG_TOUCHSCREEN_EETI=m
+# CONFIG_TOUCHSCREEN_FUJITSU is not set
+# CONFIG_TOUCHSCREEN_GUNZE is not set
+# CONFIG_TOUCHSCREEN_ELO is not set
+# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set
+# CONFIG_TOUCHSCREEN_MCS5000 is not set
+# CONFIG_TOUCHSCREEN_MTOUCH is not set
+# CONFIG_TOUCHSCREEN_INEXIO is not set
+# CONFIG_TOUCHSCREEN_MK712 is not set
+# CONFIG_TOUCHSCREEN_PENMOUNT is not set
+# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set
+# CONFIG_TOUCHSCREEN_TOUCHWIN is not set
+# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set
+# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set
+# CONFIG_TOUCHSCREEN_TSC2007 is not set
+# CONFIG_TOUCHSCREEN_W90X900 is not set
+CONFIG_INPUT_MISC=y
+# CONFIG_INPUT_ATI_REMOTE is not set
+# CONFIG_INPUT_ATI_REMOTE2 is not set
+# CONFIG_INPUT_KEYSPAN_REMOTE is not set
+# CONFIG_INPUT_POWERMATE is not set
+# CONFIG_INPUT_YEALINK is not set
+# CONFIG_INPUT_CM109 is not set
+# CONFIG_INPUT_UINPUT is not set
+CONFIG_INPUT_GPIO_ROTARY_ENCODER=y
+
+#
+# Hardware I/O ports
+#
+CONFIG_SERIO=y
+CONFIG_SERIO_SERPORT=y
+CONFIG_SERIO_LIBPS2=y
+# CONFIG_SERIO_RAW is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_CONSOLE_TRANSLATIONS=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+# CONFIG_VT_HW_CONSOLE_BINDING is not set
+CONFIG_DEVKMEM=y
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+# CONFIG_SERIAL_8250 is not set
+
+#
+# Non-8250 serial port support
+#
+# CONFIG_SERIAL_MAX3100 is not set
+CONFIG_SERIAL_PXA=y
+CONFIG_SERIAL_PXA_CONSOLE=y
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+CONFIG_UNIX98_PTYS=y
+# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
+CONFIG_LEGACY_PTYS=y
+CONFIG_LEGACY_PTY_COUNT=256
+# CONFIG_IPMI_HANDLER is not set
+CONFIG_HW_RANDOM=y
+# CONFIG_HW_RANDOM_TIMERIOMEM is not set
+# CONFIG_R3964 is not set
+# CONFIG_RAW_DRIVER is not set
+# CONFIG_TCG_TPM is not set
+CONFIG_I2C=y
+CONFIG_I2C_BOARDINFO=y
+CONFIG_I2C_COMPAT=y
+CONFIG_I2C_CHARDEV=y
+CONFIG_I2C_HELPER_AUTO=y
+
+#
+# I2C Hardware Bus support
+#
+
+#
+# I2C system bus drivers (mostly embedded / system-on-chip)
+#
+# CONFIG_I2C_DESIGNWARE is not set
+# CONFIG_I2C_GPIO is not set
+# CONFIG_I2C_OCORES is not set
+CONFIG_I2C_PXA=y
+# CONFIG_I2C_PXA_SLAVE is not set
+# CONFIG_I2C_SIMTEC is not set
+
+#
+# External I2C/SMBus adapter drivers
+#
+# CONFIG_I2C_PARPORT_LIGHT is not set
+# CONFIG_I2C_TAOS_EVM is not set
+# CONFIG_I2C_TINY_USB is not set
+
+#
+# Other I2C/SMBus bus drivers
+#
+# CONFIG_I2C_PCA_PLATFORM is not set
+# CONFIG_I2C_STUB is not set
+
+#
+# Miscellaneous I2C Chip support
+#
+# CONFIG_DS1682 is not set
+# CONFIG_SENSORS_TSL2550 is not set
+# CONFIG_I2C_DEBUG_CORE is not set
+# CONFIG_I2C_DEBUG_ALGO is not set
+# CONFIG_I2C_DEBUG_BUS is not set
+# CONFIG_I2C_DEBUG_CHIP is not set
+CONFIG_SPI=y
+CONFIG_SPI_DEBUG=y
+CONFIG_SPI_MASTER=y
+
+#
+# SPI Master Controller Drivers
+#
+CONFIG_SPI_BITBANG=y
+CONFIG_SPI_GPIO=y
+# CONFIG_SPI_PXA2XX is not set
+
+#
+# SPI Protocol Masters
+#
+CONFIG_SPI_SPIDEV=y
+# CONFIG_SPI_TLE62X0 is not set
+
+#
+# PPS support
+#
+# CONFIG_PPS is not set
+CONFIG_ARCH_REQUIRE_GPIOLIB=y
+CONFIG_GPIOLIB=y
+CONFIG_DEBUG_GPIO=y
+# CONFIG_GPIO_SYSFS is not set
+
+#
+# Memory mapped GPIO expanders:
+#
+
+#
+# I2C GPIO expanders:
+#
+# CONFIG_GPIO_MAX732X is not set
+# CONFIG_GPIO_PCA953X is not set
+# CONFIG_GPIO_PCF857X is not set
+
+#
+# PCI GPIO expanders:
+#
+
+#
+# SPI GPIO expanders:
+#
+# CONFIG_GPIO_MAX7301 is not set
+# CONFIG_GPIO_MCP23S08 is not set
+# CONFIG_GPIO_MC33880 is not set
+
+#
+# AC97 GPIO expanders:
+#
+CONFIG_W1=m
+
+#
+# 1-wire Bus Masters
+#
+# CONFIG_W1_MASTER_DS2490 is not set
+# CONFIG_W1_MASTER_DS2482 is not set
+# CONFIG_W1_MASTER_DS1WM is not set
+CONFIG_W1_MASTER_GPIO=m
+
+#
+# 1-wire Slaves
+#
+# CONFIG_W1_SLAVE_THERM is not set
+# CONFIG_W1_SLAVE_SMEM is not set
+# CONFIG_W1_SLAVE_DS2431 is not set
+# CONFIG_W1_SLAVE_DS2433 is not set
+CONFIG_W1_SLAVE_DS2760=m
+# CONFIG_W1_SLAVE_BQ27000 is not set
+CONFIG_POWER_SUPPLY=y
+# CONFIG_POWER_SUPPLY_DEBUG is not set
+CONFIG_PDA_POWER=y
+# CONFIG_APM_POWER is not set
+CONFIG_BATTERY_DS2760=m
+# CONFIG_BATTERY_DS2782 is not set
+# CONFIG_BATTERY_BQ27x00 is not set
+# CONFIG_BATTERY_MAX17040 is not set
+CONFIG_HWMON=y
+# CONFIG_HWMON_VID is not set
+# CONFIG_HWMON_DEBUG_CHIP is not set
+
+#
+# Native drivers
+#
+# CONFIG_SENSORS_AD7414 is not set
+# CONFIG_SENSORS_AD7418 is not set
+# CONFIG_SENSORS_ADCXX is not set
+# CONFIG_SENSORS_ADM1021 is not set
+# CONFIG_SENSORS_ADM1025 is not set
+# CONFIG_SENSORS_ADM1026 is not set
+# CONFIG_SENSORS_ADM1029 is not set
+# CONFIG_SENSORS_ADM1031 is not set
+# CONFIG_SENSORS_ADM9240 is not set
+# CONFIG_SENSORS_ADT7462 is not set
+# CONFIG_SENSORS_ADT7470 is not set
+# CONFIG_SENSORS_ADT7473 is not set
+# CONFIG_SENSORS_ADT7475 is not set
+# CONFIG_SENSORS_ATXP1 is not set
+# CONFIG_SENSORS_DS1621 is not set
+# CONFIG_SENSORS_F71805F is not set
+# CONFIG_SENSORS_F71882FG is not set
+# CONFIG_SENSORS_F75375S is not set
+# CONFIG_SENSORS_G760A is not set
+# CONFIG_SENSORS_GL518SM is not set
+# CONFIG_SENSORS_GL520SM is not set
+# CONFIG_SENSORS_IT87 is not set
+# CONFIG_SENSORS_LM63 is not set
+# CONFIG_SENSORS_LM70 is not set
+# CONFIG_SENSORS_LM75 is not set
+# CONFIG_SENSORS_LM77 is not set
+# CONFIG_SENSORS_LM78 is not set
+# CONFIG_SENSORS_LM80 is not set
+# CONFIG_SENSORS_LM83 is not set
+# CONFIG_SENSORS_LM85 is not set
+# CONFIG_SENSORS_LM87 is not set
+# CONFIG_SENSORS_LM90 is not set
+# CONFIG_SENSORS_LM92 is not set
+# CONFIG_SENSORS_LM93 is not set
+# CONFIG_SENSORS_LTC4215 is not set
+# CONFIG_SENSORS_LTC4245 is not set
+# CONFIG_SENSORS_LM95241 is not set
+# CONFIG_SENSORS_MAX1111 is not set
+# CONFIG_SENSORS_MAX1619 is not set
+# CONFIG_SENSORS_MAX6650 is not set
+# CONFIG_SENSORS_PC87360 is not set
+# CONFIG_SENSORS_PC87427 is not set
+# CONFIG_SENSORS_PCF8591 is not set
+# CONFIG_SENSORS_SHT15 is not set
+# CONFIG_SENSORS_DME1737 is not set
+# CONFIG_SENSORS_SMSC47M1 is not set
+# CONFIG_SENSORS_SMSC47M192 is not set
+# CONFIG_SENSORS_SMSC47B397 is not set
+# CONFIG_SENSORS_ADS7828 is not set
+# CONFIG_SENSORS_THMC50 is not set
+# CONFIG_SENSORS_TMP401 is not set
+# CONFIG_SENSORS_TMP421 is not set
+# CONFIG_SENSORS_VT1211 is not set
+# CONFIG_SENSORS_W83781D is not set
+# CONFIG_SENSORS_W83791D is not set
+# CONFIG_SENSORS_W83792D is not set
+# CONFIG_SENSORS_W83793 is not set
+# CONFIG_SENSORS_W83L785TS is not set
+# CONFIG_SENSORS_W83L786NG is not set
+# CONFIG_SENSORS_W83627HF is not set
+# CONFIG_SENSORS_W83627EHF is not set
+CONFIG_SENSORS_LIS3_SPI=y
+# CONFIG_THERMAL is not set
+# CONFIG_WATCHDOG is not set
+CONFIG_SSB_POSSIBLE=y
+
+#
+# Sonics Silicon Backplane
+#
+# CONFIG_SSB is not set
+
+#
+# Multifunction device drivers
+#
+# CONFIG_MFD_CORE is not set
+# CONFIG_MFD_SM501 is not set
+# CONFIG_MFD_ASIC3 is not set
+# CONFIG_HTC_EGPIO is not set
+# CONFIG_HTC_PASIC3 is not set
+# CONFIG_TPS65010 is not set
+# CONFIG_TWL4030_CORE is not set
+# CONFIG_MFD_TMIO is not set
+# CONFIG_MFD_T7L66XB is not set
+# CONFIG_MFD_TC6387XB is not set
+# CONFIG_MFD_TC6393XB is not set
+# CONFIG_PMIC_DA903X is not set
+# CONFIG_MFD_WM8400 is not set
+# CONFIG_MFD_WM831X is not set
+# CONFIG_MFD_WM8350_I2C is not set
+# CONFIG_MFD_PCF50633 is not set
+# CONFIG_MFD_MC13783 is not set
+# CONFIG_AB3100_CORE is not set
+# CONFIG_EZX_PCAP is not set
+CONFIG_REGULATOR=y
+CONFIG_REGULATOR_DEBUG=y
+CONFIG_REGULATOR_FIXED_VOLTAGE=y
+# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set
+# CONFIG_REGULATOR_USERSPACE_CONSUMER is not set
+# CONFIG_REGULATOR_BQ24022 is not set
+# CONFIG_REGULATOR_MAX1586 is not set
+CONFIG_REGULATOR_MAX8660=y
+# CONFIG_REGULATOR_LP3971 is not set
+# CONFIG_REGULATOR_TPS65023 is not set
+# CONFIG_REGULATOR_TPS6507X is not set
+# CONFIG_MEDIA_SUPPORT is not set
+
+#
+# Graphics support
+#
+# CONFIG_VGASTATE is not set
+# CONFIG_VIDEO_OUTPUT_CONTROL is not set
+CONFIG_FB=y
+# CONFIG_FIRMWARE_EDID is not set
+# CONFIG_FB_DDC is not set
+# CONFIG_FB_BOOT_VESA_SUPPORT is not set
+CONFIG_FB_CFB_FILLRECT=y
+CONFIG_FB_CFB_COPYAREA=y
+CONFIG_FB_CFB_IMAGEBLIT=y
+# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
+# CONFIG_FB_SYS_FILLRECT is not set
+# CONFIG_FB_SYS_COPYAREA is not set
+# CONFIG_FB_SYS_IMAGEBLIT is not set
+# CONFIG_FB_FOREIGN_ENDIAN is not set
+# CONFIG_FB_SYS_FOPS is not set
+# CONFIG_FB_SVGALIB is not set
+# CONFIG_FB_MACMODES is not set
+# CONFIG_FB_BACKLIGHT is not set
+# CONFIG_FB_MODE_HELPERS is not set
+# CONFIG_FB_TILEBLITTING is not set
+
+#
+# Frame buffer hardware drivers
+#
+# CONFIG_FB_S1D13XXX is not set
+CONFIG_FB_PXA=y
+# CONFIG_FB_PXA_OVERLAY is not set
+# CONFIG_FB_PXA_SMARTPANEL is not set
+# CONFIG_FB_PXA_PARAMETERS is not set
+CONFIG_PXA3XX_GCU=y
+# CONFIG_FB_MBX is not set
+# CONFIG_FB_W100 is not set
+# CONFIG_FB_VIRTUAL is not set
+# CONFIG_FB_METRONOME is not set
+# CONFIG_FB_MB862XX is not set
+# CONFIG_FB_BROADSHEET is not set
+CONFIG_BACKLIGHT_LCD_SUPPORT=y
+# CONFIG_LCD_CLASS_DEVICE is not set
+CONFIG_BACKLIGHT_CLASS_DEVICE=y
+# CONFIG_BACKLIGHT_GENERIC is not set
+CONFIG_BACKLIGHT_PWM=y
+
+#
+# Display device support
+#
+# CONFIG_DISPLAY_SUPPORT is not set
+
+#
+# Console display driver support
+#
+# CONFIG_VGA_CONSOLE is not set
+CONFIG_DUMMY_CONSOLE=y
+CONFIG_FRAMEBUFFER_CONSOLE=y
+# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set
+# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
+# CONFIG_FONTS is not set
+CONFIG_FONT_8x8=y
+CONFIG_FONT_8x16=y
+CONFIG_LOGO=y
+# CONFIG_LOGO_LINUX_MONO is not set
+# CONFIG_LOGO_LINUX_VGA16 is not set
+# CONFIG_LOGO_LINUX_CLUT224 is not set
+CONFIG_LOGO_RAUMFELD_CLUT224=y
+CONFIG_SOUND=y
+# CONFIG_SOUND_OSS_CORE is not set
+CONFIG_SND=y
+CONFIG_SND_TIMER=y
+CONFIG_SND_PCM=y
+CONFIG_SND_JACK=y
+# CONFIG_SND_SEQUENCER is not set
+# CONFIG_SND_MIXER_OSS is not set
+# CONFIG_SND_PCM_OSS is not set
+# CONFIG_SND_DYNAMIC_MINORS is not set
+CONFIG_SND_SUPPORT_OLD_API=y
+CONFIG_SND_VERBOSE_PROCFS=y
+# CONFIG_SND_VERBOSE_PRINTK is not set
+# CONFIG_SND_DEBUG is not set
+# CONFIG_SND_RAWMIDI_SEQ is not set
+# CONFIG_SND_OPL3_LIB_SEQ is not set
+# CONFIG_SND_OPL4_LIB_SEQ is not set
+# CONFIG_SND_SBAWE_SEQ is not set
+# CONFIG_SND_EMU10K1_SEQ is not set
+# CONFIG_SND_DRIVERS is not set
+CONFIG_SND_ARM=y
+CONFIG_SND_PXA2XX_LIB=y
+# CONFIG_SND_PXA2XX_AC97 is not set
+CONFIG_SND_SPI=y
+# CONFIG_SND_USB is not set
+CONFIG_SND_SOC=y
+CONFIG_SND_PXA2XX_SOC=y
+CONFIG_SND_PXA_SOC_SSP=y
+CONFIG_SND_SOC_RAUMFELD=y
+CONFIG_SND_SOC_I2C_AND_SPI=y
+# CONFIG_SND_SOC_ALL_CODECS is not set
+CONFIG_SND_SOC_AK4104=y
+CONFIG_SND_SOC_CS4270=y
+# CONFIG_SOUND_PRIME is not set
+CONFIG_HID_SUPPORT=y
+CONFIG_HID=y
+# CONFIG_HIDRAW is not set
+
+#
+# USB Input Devices
+#
+CONFIG_USB_HID=y
+# CONFIG_HID_PID is not set
+# CONFIG_USB_HIDDEV is not set
+
+#
+# Special HID drivers
+#
+CONFIG_HID_A4TECH=y
+CONFIG_HID_APPLE=y
+CONFIG_HID_BELKIN=y
+CONFIG_HID_CHERRY=y
+CONFIG_HID_CHICONY=y
+CONFIG_HID_CYPRESS=y
+CONFIG_HID_DRAGONRISE=y
+# CONFIG_DRAGONRISE_FF is not set
+CONFIG_HID_EZKEY=y
+CONFIG_HID_KYE=y
+CONFIG_HID_GYRATION=y
+CONFIG_HID_TWINHAN=y
+CONFIG_HID_KENSINGTON=y
+CONFIG_HID_LOGITECH=y
+# CONFIG_LOGITECH_FF is not set
+# CONFIG_LOGIRUMBLEPAD2_FF is not set
+CONFIG_HID_MICROSOFT=y
+CONFIG_HID_MONTEREY=y
+CONFIG_HID_NTRIG=y
+CONFIG_HID_PANTHERLORD=y
+# CONFIG_PANTHERLORD_FF is not set
+CONFIG_HID_PETALYNX=y
+CONFIG_HID_SAMSUNG=y
+CONFIG_HID_SONY=y
+CONFIG_HID_SUNPLUS=y
+CONFIG_HID_GREENASIA=y
+# CONFIG_GREENASIA_FF is not set
+CONFIG_HID_SMARTJOYPLUS=y
+# CONFIG_SMARTJOYPLUS_FF is not set
+CONFIG_HID_TOPSEED=y
+CONFIG_HID_THRUSTMASTER=y
+# CONFIG_THRUSTMASTER_FF is not set
+CONFIG_HID_ZEROPLUS=y
+# CONFIG_ZEROPLUS_FF is not set
+CONFIG_USB_SUPPORT=y
+CONFIG_USB_ARCH_HAS_HCD=y
+CONFIG_USB_ARCH_HAS_OHCI=y
+# CONFIG_USB_ARCH_HAS_EHCI is not set
+CONFIG_USB=y
+CONFIG_USB_DEBUG=y
+CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
+
+#
+# Miscellaneous USB options
+#
+# CONFIG_USB_DEVICEFS is not set
+CONFIG_USB_DEVICE_CLASS=y
+# CONFIG_USB_DYNAMIC_MINORS is not set
+# CONFIG_USB_SUSPEND is not set
+# CONFIG_USB_OTG is not set
+CONFIG_USB_MON=y
+# CONFIG_USB_WUSB is not set
+# CONFIG_USB_WUSB_CBAF is not set
+
+#
+# USB Host Controller Drivers
+#
+# CONFIG_USB_C67X00_HCD is not set
+# CONFIG_USB_OXU210HP_HCD is not set
+# CONFIG_USB_ISP116X_HCD is not set
+# CONFIG_USB_ISP1760_HCD is not set
+# CONFIG_USB_ISP1362_HCD is not set
+CONFIG_USB_OHCI_HCD=y
+# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set
+# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set
+CONFIG_USB_OHCI_LITTLE_ENDIAN=y
+# CONFIG_USB_SL811_HCD is not set
+# CONFIG_USB_R8A66597_HCD is not set
+# CONFIG_USB_HWA_HCD is not set
+# CONFIG_USB_MUSB_HDRC is not set
+
+#
+# USB Device Class drivers
+#
+# CONFIG_USB_ACM is not set
+# CONFIG_USB_PRINTER is not set
+# CONFIG_USB_WDM is not set
+# CONFIG_USB_TMC is not set
+
+#
+# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may
+#
+
+#
+# also be needed; see USB_STORAGE Help for more info
+#
+CONFIG_USB_STORAGE=y
+# CONFIG_USB_STORAGE_DEBUG is not set
+# CONFIG_USB_STORAGE_DATAFAB is not set
+CONFIG_USB_STORAGE_FREECOM=y
+CONFIG_USB_STORAGE_ISD200=y
+CONFIG_USB_STORAGE_USBAT=y
+CONFIG_USB_STORAGE_SDDR09=y
+CONFIG_USB_STORAGE_SDDR55=y
+# CONFIG_USB_STORAGE_JUMPSHOT is not set
+# CONFIG_USB_STORAGE_ALAUDA is not set
+# CONFIG_USB_STORAGE_ONETOUCH is not set
+# CONFIG_USB_STORAGE_KARMA is not set
+# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set
+# CONFIG_USB_LIBUSUAL is not set
+
+#
+# USB Imaging devices
+#
+# CONFIG_USB_MDC800 is not set
+# CONFIG_USB_MICROTEK is not set
+
+#
+# USB port drivers
+#
+# CONFIG_USB_SERIAL is not set
+
+#
+# USB Miscellaneous drivers
+#
+# CONFIG_USB_EMI62 is not set
+# CONFIG_USB_EMI26 is not set
+# CONFIG_USB_ADUTUX is not set
+# CONFIG_USB_SEVSEG is not set
+# CONFIG_USB_RIO500 is not set
+# CONFIG_USB_LEGOTOWER is not set
+# CONFIG_USB_LCD is not set
+# CONFIG_USB_BERRY_CHARGE is not set
+# CONFIG_USB_LED is not set
+# CONFIG_USB_CYPRESS_CY7C63 is not set
+# CONFIG_USB_CYTHERM is not set
+# CONFIG_USB_IDMOUSE is not set
+# CONFIG_USB_FTDI_ELAN is not set
+# CONFIG_USB_APPLEDISPLAY is not set
+# CONFIG_USB_LD is not set
+# CONFIG_USB_TRANCEVIBRATOR is not set
+# CONFIG_USB_IOWARRIOR is not set
+# CONFIG_USB_TEST is not set
+# CONFIG_USB_ISIGHTFW is not set
+# CONFIG_USB_VST is not set
+# CONFIG_USB_GADGET is not set
+
+#
+# OTG and related infrastructure
+#
+# CONFIG_USB_GPIO_VBUS is not set
+# CONFIG_NOP_USB_XCEIV is not set
+CONFIG_MMC=y
+# CONFIG_MMC_DEBUG is not set
+# CONFIG_MMC_UNSAFE_RESUME is not set
+
+#
+# MMC/SD/SDIO Card Drivers
+#
+CONFIG_MMC_BLOCK=y
+CONFIG_MMC_BLOCK_BOUNCE=y
+# CONFIG_SDIO_UART is not set
+# CONFIG_MMC_TEST is not set
+
+#
+# MMC/SD/SDIO Host Controller Drivers
+#
+CONFIG_MMC_PXA=m
+# CONFIG_MMC_SDHCI is not set
+# CONFIG_MMC_AT91 is not set
+# CONFIG_MMC_ATMELMCI is not set
+# CONFIG_MMC_SPI is not set
+# CONFIG_MEMSTICK is not set
+CONFIG_NEW_LEDS=y
+CONFIG_LEDS_CLASS=y
+
+#
+# LED drivers
+#
+# CONFIG_LEDS_PCA9532 is not set
+CONFIG_LEDS_GPIO=y
+CONFIG_LEDS_GPIO_PLATFORM=y
+# CONFIG_LEDS_LP3944 is not set
+# CONFIG_LEDS_PCA955X is not set
+# CONFIG_LEDS_DAC124S085 is not set
+# CONFIG_LEDS_PWM is not set
+# CONFIG_LEDS_BD2802 is not set
+CONFIG_LEDS_LT3593=y
+
+#
+# LED Triggers
+#
+CONFIG_LEDS_TRIGGERS=y
+# CONFIG_LEDS_TRIGGER_TIMER is not set
+# CONFIG_LEDS_TRIGGER_HEARTBEAT is not set
+CONFIG_LEDS_TRIGGER_BACKLIGHT=y
+# CONFIG_LEDS_TRIGGER_GPIO is not set
+# CONFIG_LEDS_TRIGGER_DEFAULT_ON is not set
+
+#
+# iptables trigger is under Netfilter config (LED target)
+#
+# CONFIG_ACCESSIBILITY is not set
+CONFIG_RTC_LIB=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_HCTOSYS=y
+CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
+# CONFIG_RTC_DEBUG is not set
+
+#
+# RTC interfaces
+#
+CONFIG_RTC_INTF_SYSFS=y
+CONFIG_RTC_INTF_PROC=y
+CONFIG_RTC_INTF_DEV=y
+# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
+# CONFIG_RTC_DRV_TEST is not set
+
+#
+# I2C RTC drivers
+#
+# CONFIG_RTC_DRV_DS1307 is not set
+# CONFIG_RTC_DRV_DS1374 is not set
+# CONFIG_RTC_DRV_DS1672 is not set
+# CONFIG_RTC_DRV_MAX6900 is not set
+# CONFIG_RTC_DRV_RS5C372 is not set
+# CONFIG_RTC_DRV_ISL1208 is not set
+# CONFIG_RTC_DRV_X1205 is not set
+# CONFIG_RTC_DRV_PCF8563 is not set
+# CONFIG_RTC_DRV_PCF8583 is not set
+# CONFIG_RTC_DRV_M41T80 is not set
+# CONFIG_RTC_DRV_S35390A is not set
+# CONFIG_RTC_DRV_FM3130 is not set
+# CONFIG_RTC_DRV_RX8581 is not set
+# CONFIG_RTC_DRV_RX8025 is not set
+
+#
+# SPI RTC drivers
+#
+# CONFIG_RTC_DRV_M41T94 is not set
+# CONFIG_RTC_DRV_DS1305 is not set
+# CONFIG_RTC_DRV_DS1390 is not set
+# CONFIG_RTC_DRV_MAX6902 is not set
+# CONFIG_RTC_DRV_R9701 is not set
+# CONFIG_RTC_DRV_RS5C348 is not set
+# CONFIG_RTC_DRV_DS3234 is not set
+# CONFIG_RTC_DRV_PCF2123 is not set
+
+#
+# Platform RTC drivers
+#
+# CONFIG_RTC_DRV_CMOS is not set
+# CONFIG_RTC_DRV_DS1286 is not set
+# CONFIG_RTC_DRV_DS1511 is not set
+# CONFIG_RTC_DRV_DS1553 is not set
+# CONFIG_RTC_DRV_DS1742 is not set
+# CONFIG_RTC_DRV_STK17TA8 is not set
+# CONFIG_RTC_DRV_M48T86 is not set
+# CONFIG_RTC_DRV_M48T35 is not set
+# CONFIG_RTC_DRV_M48T59 is not set
+# CONFIG_RTC_DRV_BQ4802 is not set
+# CONFIG_RTC_DRV_V3020 is not set
+
+#
+# on-CPU RTC drivers
+#
+# CONFIG_RTC_DRV_SA1100 is not set
+CONFIG_RTC_DRV_PXA=y
+CONFIG_DMADEVICES=y
+
+#
+# DMA Devices
+#
+# CONFIG_AUXDISPLAY is not set
+CONFIG_UIO=y
+# CONFIG_UIO_PDRV is not set
+# CONFIG_UIO_PDRV_GENIRQ is not set
+# CONFIG_UIO_SMX is not set
+# CONFIG_UIO_SERCOS3 is not set
+
+#
+# TI VLYNQ
+#
+# CONFIG_STAGING is not set
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+# CONFIG_EXT2_FS_XATTR is not set
+CONFIG_EXT2_FS_XIP=y
+CONFIG_EXT3_FS=y
+# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
+CONFIG_EXT3_FS_XATTR=y
+# CONFIG_EXT3_FS_POSIX_ACL is not set
+# CONFIG_EXT3_FS_SECURITY is not set
+# CONFIG_EXT4_FS is not set
+CONFIG_FS_XIP=y
+CONFIG_JBD=y
+CONFIG_FS_MBCACHE=y
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_FS_POSIX_ACL is not set
+# CONFIG_XFS_FS is not set
+# CONFIG_OCFS2_FS is not set
+# CONFIG_BTRFS_FS is not set
+# CONFIG_NILFS2_FS is not set
+CONFIG_FILE_LOCKING=y
+CONFIG_FSNOTIFY=y
+CONFIG_DNOTIFY=y
+CONFIG_INOTIFY=y
+CONFIG_INOTIFY_USER=y
+# CONFIG_QUOTA is not set
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+# CONFIG_FUSE_FS is not set
+
+#
+# Caches
+#
+CONFIG_FSCACHE=y
+CONFIG_FSCACHE_STATS=y
+# CONFIG_FSCACHE_HISTOGRAM is not set
+# CONFIG_FSCACHE_DEBUG is not set
+CONFIG_CACHEFILES=y
+# CONFIG_CACHEFILES_DEBUG is not set
+# CONFIG_CACHEFILES_HISTOGRAM is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+CONFIG_FAT_FS=y
+CONFIG_MSDOS_FS=y
+CONFIG_VFAT_FS=y
+CONFIG_FAT_DEFAULT_CODEPAGE=437
+CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_SYSCTL=y
+CONFIG_PROC_PAGE_MONITOR=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+# CONFIG_TMPFS_POSIX_ACL is not set
+# CONFIG_HUGETLB_PAGE is not set
+# CONFIG_CONFIGFS_FS is not set
+CONFIG_MISC_FILESYSTEMS=y
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+# CONFIG_JFFS2_FS is not set
+CONFIG_UBIFS_FS=y
+# CONFIG_UBIFS_FS_XATTR is not set
+# CONFIG_UBIFS_FS_ADVANCED_COMPR is not set
+CONFIG_UBIFS_FS_LZO=y
+CONFIG_UBIFS_FS_ZLIB=y
+# CONFIG_UBIFS_FS_DEBUG is not set
+# CONFIG_CRAMFS is not set
+# CONFIG_SQUASHFS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_OMFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_ROMFS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+CONFIG_NETWORK_FILESYSTEMS=y
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3=y
+# CONFIG_NFS_V3_ACL is not set
+# CONFIG_NFS_V4 is not set
+CONFIG_ROOT_NFS=y
+CONFIG_NFS_FSCACHE=y
+# CONFIG_NFSD is not set
+CONFIG_LOCKD=y
+CONFIG_LOCKD_V4=y
+CONFIG_NFS_COMMON=y
+CONFIG_SUNRPC=y
+# CONFIG_RPCSEC_GSS_KRB5 is not set
+# CONFIG_RPCSEC_GSS_SPKM3 is not set
+# CONFIG_SMB_FS is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_AFS_FS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+CONFIG_NLS=y
+CONFIG_NLS_DEFAULT="iso8859-1"
+CONFIG_NLS_CODEPAGE_437=y
+CONFIG_NLS_CODEPAGE_737=y
+CONFIG_NLS_CODEPAGE_775=y
+CONFIG_NLS_CODEPAGE_850=y
+CONFIG_NLS_CODEPAGE_852=y
+CONFIG_NLS_CODEPAGE_855=y
+CONFIG_NLS_CODEPAGE_857=y
+CONFIG_NLS_CODEPAGE_860=y
+CONFIG_NLS_CODEPAGE_861=y
+CONFIG_NLS_CODEPAGE_862=y
+CONFIG_NLS_CODEPAGE_863=y
+CONFIG_NLS_CODEPAGE_864=y
+CONFIG_NLS_CODEPAGE_865=y
+CONFIG_NLS_CODEPAGE_866=y
+CONFIG_NLS_CODEPAGE_869=y
+CONFIG_NLS_CODEPAGE_936=y
+CONFIG_NLS_CODEPAGE_950=y
+CONFIG_NLS_CODEPAGE_932=y
+CONFIG_NLS_CODEPAGE_949=y
+CONFIG_NLS_CODEPAGE_874=y
+CONFIG_NLS_ISO8859_8=y
+CONFIG_NLS_CODEPAGE_1250=y
+CONFIG_NLS_CODEPAGE_1251=y
+CONFIG_NLS_ASCII=y
+CONFIG_NLS_ISO8859_1=y
+CONFIG_NLS_ISO8859_2=y
+CONFIG_NLS_ISO8859_3=y
+CONFIG_NLS_ISO8859_4=y
+CONFIG_NLS_ISO8859_5=y
+CONFIG_NLS_ISO8859_6=y
+CONFIG_NLS_ISO8859_7=y
+CONFIG_NLS_ISO8859_9=y
+CONFIG_NLS_ISO8859_13=y
+CONFIG_NLS_ISO8859_14=y
+CONFIG_NLS_ISO8859_15=y
+CONFIG_NLS_KOI8_R=y
+CONFIG_NLS_KOI8_U=y
+CONFIG_NLS_UTF8=y
+# CONFIG_DLM is not set
+
+#
+# Kernel hacking
+#
+CONFIG_PRINTK_TIME=y
+CONFIG_ENABLE_WARN_DEPRECATED=y
+CONFIG_ENABLE_MUST_CHECK=y
+CONFIG_FRAME_WARN=1024
+# CONFIG_MAGIC_SYSRQ is not set
+# CONFIG_STRIP_ASM_SYMS is not set
+# CONFIG_UNUSED_SYMBOLS is not set
+# CONFIG_DEBUG_FS is not set
+# CONFIG_HEADERS_CHECK is not set
+CONFIG_DEBUG_KERNEL=y
+# CONFIG_DEBUG_SHIRQ is not set
+CONFIG_DETECT_SOFTLOCKUP=y
+# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
+CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
+CONFIG_DETECT_HUNG_TASK=y
+# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set
+CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0
+CONFIG_SCHED_DEBUG=y
+# CONFIG_SCHEDSTATS is not set
+# CONFIG_TIMER_STATS is not set
+# CONFIG_DEBUG_OBJECTS is not set
+# CONFIG_SLUB_DEBUG_ON is not set
+# CONFIG_SLUB_STATS is not set
+# CONFIG_DEBUG_KMEMLEAK is not set
+# CONFIG_DEBUG_RT_MUTEXES is not set
+# CONFIG_RT_MUTEX_TESTER is not set
+# CONFIG_DEBUG_SPINLOCK is not set
+# CONFIG_DEBUG_MUTEXES is not set
+# CONFIG_DEBUG_LOCK_ALLOC is not set
+# CONFIG_PROVE_LOCKING is not set
+# CONFIG_LOCK_STAT is not set
+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
+# CONFIG_DEBUG_KOBJECT is not set
+CONFIG_DEBUG_BUGVERBOSE=y
+CONFIG_DEBUG_INFO=y
+# CONFIG_DEBUG_VM is not set
+# CONFIG_DEBUG_WRITECOUNT is not set
+CONFIG_DEBUG_MEMORY_INIT=y
+# CONFIG_DEBUG_LIST is not set
+# CONFIG_DEBUG_SG is not set
+# CONFIG_DEBUG_NOTIFIERS is not set
+# CONFIG_DEBUG_CREDENTIALS is not set
+# CONFIG_BOOT_PRINTK_DELAY is not set
+# CONFIG_RCU_TORTURE_TEST is not set
+# CONFIG_RCU_CPU_STALL_DETECTOR is not set
+# CONFIG_BACKTRACE_SELF_TEST is not set
+# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
+# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
+# CONFIG_FAULT_INJECTION is not set
+# CONFIG_LATENCYTOP is not set
+# CONFIG_SYSCTL_SYSCALL_CHECK is not set
+# CONFIG_PAGE_POISONING is not set
+CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_TRACING_SUPPORT=y
+CONFIG_FTRACE=y
+# CONFIG_FUNCTION_TRACER is not set
+# CONFIG_IRQSOFF_TRACER is not set
+# CONFIG_SCHED_TRACER is not set
+# CONFIG_ENABLE_DEFAULT_TRACERS is not set
+# CONFIG_BOOT_TRACER is not set
+CONFIG_BRANCH_PROFILE_NONE=y
+# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set
+# CONFIG_PROFILE_ALL_BRANCHES is not set
+# CONFIG_STACK_TRACER is not set
+# CONFIG_KMEMTRACE is not set
+# CONFIG_WORKQUEUE_TRACER is not set
+# CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_SAMPLES is not set
+CONFIG_HAVE_ARCH_KGDB=y
+# CONFIG_KGDB is not set
+CONFIG_ARM_UNWIND=y
+CONFIG_DEBUG_USER=y
+CONFIG_DEBUG_ERRORS=y
+# CONFIG_DEBUG_STACK_USAGE is not set
+CONFIG_DEBUG_LL=y
+# CONFIG_DEBUG_ICEDCC is not set
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY is not set
+# CONFIG_SECURITYFS is not set
+# CONFIG_SECURITY_FILE_CAPABILITIES is not set
+CONFIG_CRYPTO=y
+
+#
+# Crypto core or helper
+#
+CONFIG_CRYPTO_ALGAPI=y
+CONFIG_CRYPTO_ALGAPI2=y
+CONFIG_CRYPTO_AEAD2=y
+CONFIG_CRYPTO_BLKCIPHER=y
+CONFIG_CRYPTO_BLKCIPHER2=y
+CONFIG_CRYPTO_HASH2=y
+CONFIG_CRYPTO_RNG2=y
+CONFIG_CRYPTO_PCOMP=y
+CONFIG_CRYPTO_MANAGER=y
+CONFIG_CRYPTO_MANAGER2=y
+# CONFIG_CRYPTO_GF128MUL is not set
+# CONFIG_CRYPTO_NULL is not set
+CONFIG_CRYPTO_WORKQUEUE=y
+# CONFIG_CRYPTO_CRYPTD is not set
+# CONFIG_CRYPTO_AUTHENC is not set
+# CONFIG_CRYPTO_TEST is not set
+
+#
+# Authenticated Encryption with Associated Data
+#
+# CONFIG_CRYPTO_CCM is not set
+# CONFIG_CRYPTO_GCM is not set
+# CONFIG_CRYPTO_SEQIV is not set
+
+#
+# Block modes
+#
+# CONFIG_CRYPTO_CBC is not set
+# CONFIG_CRYPTO_CTR is not set
+# CONFIG_CRYPTO_CTS is not set
+CONFIG_CRYPTO_ECB=y
+# CONFIG_CRYPTO_LRW is not set
+# CONFIG_CRYPTO_PCBC is not set
+# CONFIG_CRYPTO_XTS is not set
+
+#
+# Hash modes
+#
+# CONFIG_CRYPTO_HMAC is not set
+# CONFIG_CRYPTO_XCBC is not set
+# CONFIG_CRYPTO_VMAC is not set
+
+#
+# Digest
+#
+# CONFIG_CRYPTO_CRC32C is not set
+# CONFIG_CRYPTO_GHASH is not set
+# CONFIG_CRYPTO_MD4 is not set
+# CONFIG_CRYPTO_MD5 is not set
+# CONFIG_CRYPTO_MICHAEL_MIC is not set
+# CONFIG_CRYPTO_RMD128 is not set
+# CONFIG_CRYPTO_RMD160 is not set
+# CONFIG_CRYPTO_RMD256 is not set
+# CONFIG_CRYPTO_RMD320 is not set
+# CONFIG_CRYPTO_SHA1 is not set
+# CONFIG_CRYPTO_SHA256 is not set
+# CONFIG_CRYPTO_SHA512 is not set
+# CONFIG_CRYPTO_TGR192 is not set
+# CONFIG_CRYPTO_WP512 is not set
+
+#
+# Ciphers
+#
+CONFIG_CRYPTO_AES=y
+# CONFIG_CRYPTO_ANUBIS is not set
+CONFIG_CRYPTO_ARC4=y
+# CONFIG_CRYPTO_BLOWFISH is not set
+# CONFIG_CRYPTO_CAMELLIA is not set
+# CONFIG_CRYPTO_CAST5 is not set
+# CONFIG_CRYPTO_CAST6 is not set
+# CONFIG_CRYPTO_DES is not set
+# CONFIG_CRYPTO_FCRYPT is not set
+# CONFIG_CRYPTO_KHAZAD is not set
+# CONFIG_CRYPTO_SALSA20 is not set
+# CONFIG_CRYPTO_SEED is not set
+# CONFIG_CRYPTO_SERPENT is not set
+# CONFIG_CRYPTO_TEA is not set
+# CONFIG_CRYPTO_TWOFISH is not set
+
+#
+# Compression
+#
+CONFIG_CRYPTO_DEFLATE=y
+# CONFIG_CRYPTO_ZLIB is not set
+CONFIG_CRYPTO_LZO=y
+
+#
+# Random Number Generation
+#
+# CONFIG_CRYPTO_ANSI_CPRNG is not set
+# CONFIG_CRYPTO_HW is not set
+# CONFIG_BINARY_PRINTF is not set
+
+#
+# Library routines
+#
+CONFIG_BITREVERSE=y
+CONFIG_GENERIC_FIND_LAST_BIT=y
+# CONFIG_CRC_CCITT is not set
+CONFIG_CRC16=y
+# CONFIG_CRC_T10DIF is not set
+# CONFIG_CRC_ITU_T is not set
+CONFIG_CRC32=y
+# CONFIG_CRC7 is not set
+# CONFIG_LIBCRC32C is not set
+CONFIG_ZLIB_INFLATE=y
+CONFIG_ZLIB_DEFLATE=y
+CONFIG_LZO_COMPRESS=y
+CONFIG_LZO_DECOMPRESS=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAS_DMA=y
+CONFIG_NLATTR=y
diff --git a/arch/arm/configs/s3c2410_defconfig b/arch/arm/configs/s3c2410_defconfig
index 2f10dae02796..8e94c3caeb8c 100644
--- a/arch/arm/configs/s3c2410_defconfig
+++ b/arch/arm/configs/s3c2410_defconfig
@@ -187,7 +187,7 @@ CONFIG_S3C24XX_GPIO_EXTRA128=y
 CONFIG_PM_SIMTEC=y
 CONFIG_S3C2410_DMA=y
 # CONFIG_S3C2410_DMA_DEBUG is not set
-CONFIG_S3C24XX_ADC=y
+CONFIG_S3C_ADC=y
 CONFIG_MACH_SMDK=y
 CONFIG_PLAT_S3C=y
 CONFIG_CPU_LLSERIAL_S3C2410=y
@@ -203,8 +203,8 @@ CONFIG_S3C_BOOT_UART_FORCE_FIFO=y
 #
 # Power management
 #
-# CONFIG_S3C2410_PM_DEBUG is not set
-# CONFIG_S3C2410_PM_CHECK is not set
+# CONFIG_SAMSUNG_PM_DEBUG is not set
+# CONFIG_SAMSUNG_PM_CHECK is not set
 CONFIG_S3C_LOWLEVEL_UART_PORT=0
 CONFIG_S3C_GPIO_SPACE=0
 CONFIG_S3C_DEV_HSMMC=y
diff --git a/arch/arm/configs/s3c6400_defconfig b/arch/arm/configs/s3c6400_defconfig
index f56e50fab79b..5e7d4c1b8fc1 100644
--- a/arch/arm/configs/s3c6400_defconfig
+++ b/arch/arm/configs/s3c6400_defconfig
@@ -1,14 +1,11 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.28-rc3
-# Mon Nov  3 10:10:30 2008
+# Linux kernel version: 2.6.33-rc4
+# Tue Jan 19 13:12:40 2010
 #
 CONFIG_ARM=y
 CONFIG_SYS_SUPPORTS_APM_EMULATION=y
 CONFIG_GENERIC_GPIO=y
-# CONFIG_GENERIC_TIME is not set
-# CONFIG_GENERIC_CLOCKEVENTS is not set
-CONFIG_MMU=y
 CONFIG_NO_IOPORT=y
 CONFIG_GENERIC_HARDIRQS=y
 CONFIG_STACKTRACE_SUPPORT=y
@@ -18,13 +15,13 @@ CONFIG_TRACE_IRQFLAGS_SUPPORT=y
 CONFIG_HARDIRQS_SW_RESEND=y
 CONFIG_GENERIC_IRQ_PROBE=y
 CONFIG_RWSEM_GENERIC_SPINLOCK=y
-# CONFIG_ARCH_HAS_ILOG2_U32 is not set
-# CONFIG_ARCH_HAS_ILOG2_U64 is not set
+CONFIG_ARCH_HAS_CPUFREQ=y
 CONFIG_GENERIC_HWEIGHT=y
 CONFIG_GENERIC_CALIBRATE_DELAY=y
 CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
 CONFIG_VECTORS_BASE=0xffff0000
 CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+CONFIG_CONSTRUCTORS=y
 
 #
 # General setup
@@ -34,13 +31,30 @@ CONFIG_BROKEN_ON_SMP=y
 CONFIG_INIT_ENV_ARG_LIMIT=32
 CONFIG_LOCALVERSION=""
 CONFIG_LOCALVERSION_AUTO=y
+CONFIG_HAVE_KERNEL_GZIP=y
+CONFIG_HAVE_KERNEL_LZO=y
+CONFIG_KERNEL_GZIP=y
+# CONFIG_KERNEL_BZIP2 is not set
+# CONFIG_KERNEL_LZMA is not set
+# CONFIG_KERNEL_LZO is not set
 CONFIG_SWAP=y
 # CONFIG_SYSVIPC is not set
 # CONFIG_BSD_PROCESS_ACCT is not set
+
+#
+# RCU Subsystem
+#
+CONFIG_TREE_RCU=y
+# CONFIG_TREE_PREEMPT_RCU is not set
+# CONFIG_TINY_RCU is not set
+# CONFIG_RCU_TRACE is not set
+CONFIG_RCU_FANOUT=32
+# CONFIG_RCU_FANOUT_EXACT is not set
+# CONFIG_TREE_RCU_TRACE is not set
 # CONFIG_IKCONFIG is not set
 CONFIG_LOG_BUF_SHIFT=17
-# CONFIG_CGROUPS is not set
 # CONFIG_GROUP_SCHED is not set
+# CONFIG_CGROUPS is not set
 CONFIG_SYSFS_DEPRECATED=y
 CONFIG_SYSFS_DEPRECATED_V2=y
 # CONFIG_RELAY is not set
@@ -50,8 +64,13 @@ CONFIG_NAMESPACES=y
 # CONFIG_PID_NS is not set
 CONFIG_BLK_DEV_INITRD=y
 CONFIG_INITRAMFS_SOURCE=""
+CONFIG_RD_GZIP=y
+CONFIG_RD_BZIP2=y
+CONFIG_RD_LZMA=y
+CONFIG_RD_LZO=y
 CONFIG_CC_OPTIMIZE_FOR_SIZE=y
 CONFIG_SYSCTL=y
+CONFIG_ANON_INODES=y
 # CONFIG_EMBEDDED is not set
 CONFIG_UID16=y
 CONFIG_SYSCTL_SYSCALL=y
@@ -62,32 +81,38 @@ CONFIG_HOTPLUG=y
 CONFIG_PRINTK=y
 CONFIG_BUG=y
 CONFIG_ELF_CORE=y
-CONFIG_COMPAT_BRK=y
 CONFIG_BASE_FULL=y
 CONFIG_FUTEX=y
-CONFIG_ANON_INODES=y
 CONFIG_EPOLL=y
 CONFIG_SIGNALFD=y
 CONFIG_TIMERFD=y
 CONFIG_EVENTFD=y
 CONFIG_SHMEM=y
 CONFIG_AIO=y
+
+#
+# Kernel Performance Events And Counters
+#
 CONFIG_VM_EVENT_COUNTERS=y
 CONFIG_SLUB_DEBUG=y
+CONFIG_COMPAT_BRK=y
 # CONFIG_SLAB is not set
 CONFIG_SLUB=y
 # CONFIG_SLOB is not set
 # CONFIG_PROFILING is not set
-# CONFIG_MARKERS is not set
 CONFIG_HAVE_OPROFILE=y
 # CONFIG_KPROBES is not set
 CONFIG_HAVE_KPROBES=y
 CONFIG_HAVE_KRETPROBES=y
 CONFIG_HAVE_CLK=y
+
+#
+# GCOV-based kernel profiling
+#
+# CONFIG_SLOW_WORK is not set
 CONFIG_HAVE_GENERIC_DMA_COHERENT=y
 CONFIG_SLABINFO=y
 CONFIG_RT_MUTEXES=y
-# CONFIG_TINY_SHMEM is not set
 CONFIG_BASE_SMALL=0
 CONFIG_MODULES=y
 # CONFIG_MODULE_FORCE_LOAD is not set
@@ -95,11 +120,8 @@ CONFIG_MODULE_UNLOAD=y
 # CONFIG_MODULE_FORCE_UNLOAD is not set
 # CONFIG_MODVERSIONS is not set
 # CONFIG_MODULE_SRCVERSION_ALL is not set
-CONFIG_KMOD=y
 CONFIG_BLOCK=y
-CONFIG_LBD=y
-# CONFIG_BLK_DEV_IO_TRACE is not set
-CONFIG_LSF=y
+CONFIG_LBDAF=y
 # CONFIG_BLK_DEV_BSG is not set
 # CONFIG_BLK_DEV_INTEGRITY is not set
 
@@ -107,33 +129,62 @@ CONFIG_LSF=y
 # IO Schedulers
 #
 CONFIG_IOSCHED_NOOP=y
-CONFIG_IOSCHED_AS=y
 CONFIG_IOSCHED_DEADLINE=y
 CONFIG_IOSCHED_CFQ=y
-# CONFIG_DEFAULT_AS is not set
 # CONFIG_DEFAULT_DEADLINE is not set
 CONFIG_DEFAULT_CFQ=y
 # CONFIG_DEFAULT_NOOP is not set
 CONFIG_DEFAULT_IOSCHED="cfq"
-CONFIG_CLASSIC_RCU=y
+# CONFIG_INLINE_SPIN_TRYLOCK is not set
+# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set
+# CONFIG_INLINE_SPIN_LOCK is not set
+# CONFIG_INLINE_SPIN_LOCK_BH is not set
+# CONFIG_INLINE_SPIN_LOCK_IRQ is not set
+# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set
+# CONFIG_INLINE_SPIN_UNLOCK is not set
+# CONFIG_INLINE_SPIN_UNLOCK_BH is not set
+# CONFIG_INLINE_SPIN_UNLOCK_IRQ is not set
+# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set
+# CONFIG_INLINE_READ_TRYLOCK is not set
+# CONFIG_INLINE_READ_LOCK is not set
+# CONFIG_INLINE_READ_LOCK_BH is not set
+# CONFIG_INLINE_READ_LOCK_IRQ is not set
+# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set
+# CONFIG_INLINE_READ_UNLOCK is not set
+# CONFIG_INLINE_READ_UNLOCK_BH is not set
+# CONFIG_INLINE_READ_UNLOCK_IRQ is not set
+# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set
+# CONFIG_INLINE_WRITE_TRYLOCK is not set
+# CONFIG_INLINE_WRITE_LOCK is not set
+# CONFIG_INLINE_WRITE_LOCK_BH is not set
+# CONFIG_INLINE_WRITE_LOCK_IRQ is not set
+# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set
+# CONFIG_INLINE_WRITE_UNLOCK is not set
+# CONFIG_INLINE_WRITE_UNLOCK_BH is not set
+# CONFIG_INLINE_WRITE_UNLOCK_IRQ is not set
+# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set
+# CONFIG_MUTEX_SPIN_ON_OWNER is not set
 # CONFIG_FREEZER is not set
 
 #
 # System Type
 #
+CONFIG_MMU=y
 # CONFIG_ARCH_AAEC2000 is not set
 # CONFIG_ARCH_INTEGRATOR is not set
 # CONFIG_ARCH_REALVIEW is not set
 # CONFIG_ARCH_VERSATILE is not set
 # CONFIG_ARCH_AT91 is not set
-# CONFIG_ARCH_CLPS7500 is not set
 # CONFIG_ARCH_CLPS711X is not set
+# CONFIG_ARCH_GEMINI is not set
 # CONFIG_ARCH_EBSA110 is not set
 # CONFIG_ARCH_EP93XX is not set
 # CONFIG_ARCH_FOOTBRIDGE is not set
+# CONFIG_ARCH_MXC is not set
+# CONFIG_ARCH_STMP3XXX is not set
 # CONFIG_ARCH_NETX is not set
 # CONFIG_ARCH_H720X is not set
-# CONFIG_ARCH_IMX is not set
+# CONFIG_ARCH_NOMADIK is not set
 # CONFIG_ARCH_IOP13XX is not set
 # CONFIG_ARCH_IOP32X is not set
 # CONFIG_ARCH_IOP33X is not set
@@ -141,35 +192,62 @@ CONFIG_CLASSIC_RCU=y
 # CONFIG_ARCH_IXP2000 is not set
 # CONFIG_ARCH_IXP4XX is not set
 # CONFIG_ARCH_L7200 is not set
+# CONFIG_ARCH_DOVE is not set
 # CONFIG_ARCH_KIRKWOOD is not set
-# CONFIG_ARCH_KS8695 is not set
-# CONFIG_ARCH_NS9XXX is not set
 # CONFIG_ARCH_LOKI is not set
 # CONFIG_ARCH_MV78XX0 is not set
-# CONFIG_ARCH_MXC is not set
 # CONFIG_ARCH_ORION5X is not set
+# CONFIG_ARCH_MMP is not set
+# CONFIG_ARCH_KS8695 is not set
+# CONFIG_ARCH_NS9XXX is not set
+# CONFIG_ARCH_W90X900 is not set
 # CONFIG_ARCH_PNX4008 is not set
 # CONFIG_ARCH_PXA is not set
+# CONFIG_ARCH_MSM is not set
 # CONFIG_ARCH_RPC is not set
 # CONFIG_ARCH_SA1100 is not set
 # CONFIG_ARCH_S3C2410 is not set
 CONFIG_ARCH_S3C64XX=y
+# CONFIG_ARCH_S5P6440 is not set
+# CONFIG_ARCH_S5PC1XX is not set
 # CONFIG_ARCH_SHARK is not set
 # CONFIG_ARCH_LH7A40X is not set
+# CONFIG_ARCH_U300 is not set
 # CONFIG_ARCH_DAVINCI is not set
 # CONFIG_ARCH_OMAP is not set
-# CONFIG_ARCH_MSM is not set
+# CONFIG_ARCH_BCMRING is not set
+# CONFIG_ARCH_U8500 is not set
+CONFIG_PLAT_SAMSUNG=y
+CONFIG_SAMSUNG_CLKSRC=y
+CONFIG_SAMSUNG_IRQ_VIC_TIMER=y
+CONFIG_SAMSUNG_IRQ_UART=y
+CONFIG_S3C_GPIO_CFG_S3C24XX=y
+CONFIG_S3C_GPIO_CFG_S3C64XX=y
+CONFIG_S3C_GPIO_PULL_UPDOWN=y
+CONFIG_SAMSUNG_GPIO_EXTRA=0
+# CONFIG_S3C_ADC is not set
+CONFIG_S3C_DEV_HSMMC=y
+CONFIG_S3C_DEV_HSMMC1=y
+CONFIG_S3C_DEV_I2C1=y
+CONFIG_S3C_DEV_FB=y
+CONFIG_S3C_DEV_USB_HOST=y
+CONFIG_S3C_DEV_USB_HSOTG=y
+CONFIG_S3C_DEV_NAND=y
 CONFIG_PLAT_S3C64XX=y
 CONFIG_CPU_S3C6400_INIT=y
 CONFIG_CPU_S3C6400_CLOCK=y
+# CONFIG_S3C64XX_DMA is not set
 CONFIG_S3C64XX_SETUP_I2C0=y
 CONFIG_S3C64XX_SETUP_I2C1=y
+CONFIG_S3C64XX_SETUP_FB_24BPP=y
+CONFIG_S3C64XX_SETUP_SDHCI_GPIO=y
 CONFIG_PLAT_S3C=y
 
 #
 # Boot options
 #
 CONFIG_S3C_BOOT_ERROR_RESET=y
+CONFIG_S3C_BOOT_UART_FORCE_FIFO=y
 
 #
 # Power management
@@ -177,17 +255,16 @@ CONFIG_S3C_BOOT_ERROR_RESET=y
 CONFIG_S3C_LOWLEVEL_UART_PORT=0
 CONFIG_S3C_GPIO_SPACE=0
 CONFIG_S3C_GPIO_TRACK=y
-CONFIG_S3C_GPIO_PULL_UPDOWN=y
-CONFIG_S3C_GPIO_CFG_S3C24XX=y
-CONFIG_S3C_GPIO_CFG_S3C64XX=y
-CONFIG_S3C_DEV_HSMMC=y
-CONFIG_S3C_DEV_HSMMC1=y
-CONFIG_S3C_DEV_I2C1=y
+# CONFIG_MACH_SMDK6400 is not set
 CONFIG_CPU_S3C6410=y
 CONFIG_S3C6410_SETUP_SDHCI=y
+# CONFIG_MACH_ANW6410 is not set
 CONFIG_MACH_SMDK6410=y
 CONFIG_SMDK6410_SD_CH0=y
 # CONFIG_SMDK6410_SD_CH1 is not set
+# CONFIG_SMDK6410_WM1190_EV1 is not set
+# CONFIG_MACH_NCP is not set
+# CONFIG_MACH_HMT is not set
 
 #
 # Processor Type
@@ -196,7 +273,7 @@ CONFIG_CPU_V6=y
 CONFIG_CPU_32v6K=y
 CONFIG_CPU_32v6=y
 CONFIG_CPU_ABRT_EV6=y
-CONFIG_CPU_PABRT_NOIFAR=y
+CONFIG_CPU_PABRT_V6=y
 CONFIG_CPU_CACHE_V6=y
 CONFIG_CPU_CACHE_VIPT=y
 CONFIG_CPU_COPY_V6=y
@@ -212,8 +289,10 @@ CONFIG_ARM_THUMB=y
 # CONFIG_CPU_ICACHE_DISABLE is not set
 # CONFIG_CPU_DCACHE_DISABLE is not set
 # CONFIG_CPU_BPREDICT_DISABLE is not set
-# CONFIG_OUTER_CACHE is not set
+CONFIG_ARM_L1_CACHE_SHIFT=5
+# CONFIG_ARM_ERRATA_411920 is not set
 CONFIG_ARM_VIC=y
+CONFIG_ARM_VIC_NR=2
 
 #
 # Bus support
@@ -229,13 +308,15 @@ CONFIG_VMSPLIT_3G=y
 # CONFIG_VMSPLIT_2G is not set
 # CONFIG_VMSPLIT_1G is not set
 CONFIG_PAGE_OFFSET=0xC0000000
+CONFIG_PREEMPT_NONE=y
+# CONFIG_PREEMPT_VOLUNTARY is not set
 # CONFIG_PREEMPT is not set
 CONFIG_HZ=100
 CONFIG_AEABI=y
 CONFIG_OABI_COMPAT=y
-CONFIG_ARCH_FLATMEM_HAS_HOLES=y
 # CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
 # CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
+# CONFIG_HIGHMEM is not set
 CONFIG_SELECT_MEMORY_MODEL=y
 CONFIG_FLATMEM_MANUAL=y
 # CONFIG_DISCONTIGMEM_MANUAL is not set
@@ -243,26 +324,28 @@ CONFIG_FLATMEM_MANUAL=y
 CONFIG_FLATMEM=y
 CONFIG_FLAT_NODE_MEM_MAP=y
 CONFIG_PAGEFLAGS_EXTENDED=y
-CONFIG_SPLIT_PTLOCK_CPUS=4
-# CONFIG_RESOURCES_64BIT is not set
+CONFIG_SPLIT_PTLOCK_CPUS=999999
 # CONFIG_PHYS_ADDR_T_64BIT is not set
 CONFIG_ZONE_DMA_FLAG=0
 CONFIG_VIRT_TO_BUS=y
-CONFIG_UNEVICTABLE_LRU=y
+# CONFIG_KSM is not set
+CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
 CONFIG_ALIGNMENT_TRAP=y
+# CONFIG_UACCESS_WITH_MEMCPY is not set
 
 #
 # Boot options
 #
 CONFIG_ZBOOT_ROM_TEXT=0
 CONFIG_ZBOOT_ROM_BSS=0
-CONFIG_CMDLINE="console=ttySAC0,115200 root=/dev/ram init=/bin/bash initrd=0x51000000,4M"
+CONFIG_CMDLINE="console=ttySAC0,115200 root=/dev/ram init=/linuxrc initrd=0x51000000,6M ramdisk_size=6144"
 # CONFIG_XIP_KERNEL is not set
 # CONFIG_KEXEC is not set
 
 #
 # CPU Power Management
 #
+# CONFIG_CPU_FREQ is not set
 # CONFIG_CPU_IDLE is not set
 
 #
@@ -300,6 +383,7 @@ CONFIG_ARCH_SUSPEND_POSSIBLE=y
 # Generic Driver Options
 #
 CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+# CONFIG_DEVTMPFS is not set
 CONFIG_STANDALONE=y
 CONFIG_PREVENT_FIRMWARE_BUILD=y
 CONFIG_FW_LOADER=y
@@ -314,14 +398,32 @@ CONFIG_BLK_DEV=y
 # CONFIG_BLK_DEV_COW_COMMON is not set
 CONFIG_BLK_DEV_LOOP=y
 # CONFIG_BLK_DEV_CRYPTOLOOP is not set
+
+#
+# DRBD disabled because PROC_FS, INET or CONNECTOR not selected
+#
 CONFIG_BLK_DEV_RAM=y
 CONFIG_BLK_DEV_RAM_COUNT=16
 CONFIG_BLK_DEV_RAM_SIZE=4096
 # CONFIG_BLK_DEV_XIP is not set
 # CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_MG_DISK is not set
 CONFIG_MISC_DEVICES=y
-# CONFIG_EEPROM_93CX6 is not set
+# CONFIG_AD525X_DPOT is not set
+# CONFIG_ICS932S401 is not set
 # CONFIG_ENCLOSURE_SERVICES is not set
+# CONFIG_ISL29003 is not set
+# CONFIG_DS1682 is not set
+# CONFIG_C2PORT is not set
+
+#
+# EEPROM support
+#
+CONFIG_EEPROM_AT24=y
+# CONFIG_EEPROM_LEGACY is not set
+# CONFIG_EEPROM_MAX6875 is not set
+# CONFIG_EEPROM_93CX6 is not set
+# CONFIG_IWMC3200TOP is not set
 CONFIG_HAVE_IDE=y
 # CONFIG_IDE is not set
 
@@ -334,6 +436,7 @@ CONFIG_HAVE_IDE=y
 # CONFIG_SCSI_NETLINK is not set
 # CONFIG_ATA is not set
 # CONFIG_MD is not set
+# CONFIG_PHONE is not set
 
 #
 # Input device support
@@ -341,6 +444,7 @@ CONFIG_HAVE_IDE=y
 CONFIG_INPUT=y
 # CONFIG_INPUT_FF_MEMLESS is not set
 # CONFIG_INPUT_POLLDEV is not set
+# CONFIG_INPUT_SPARSEKMAP is not set
 
 #
 # Userland interfaces
@@ -357,27 +461,33 @@ CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
 # Input Device Drivers
 #
 CONFIG_INPUT_KEYBOARD=y
+# CONFIG_KEYBOARD_ADP5588 is not set
 CONFIG_KEYBOARD_ATKBD=y
-# CONFIG_KEYBOARD_SUNKBD is not set
+# CONFIG_QT2160 is not set
 # CONFIG_KEYBOARD_LKKBD is not set
-# CONFIG_KEYBOARD_XTKBD is not set
+# CONFIG_KEYBOARD_GPIO is not set
+# CONFIG_KEYBOARD_MATRIX is not set
+# CONFIG_KEYBOARD_MAX7359 is not set
 # CONFIG_KEYBOARD_NEWTON is not set
+# CONFIG_KEYBOARD_OPENCORES is not set
 # CONFIG_KEYBOARD_STOWAWAY is not set
-# CONFIG_KEYBOARD_GPIO is not set
+# CONFIG_KEYBOARD_SUNKBD is not set
+# CONFIG_KEYBOARD_XTKBD is not set
 CONFIG_INPUT_MOUSE=y
 CONFIG_MOUSE_PS2=y
 CONFIG_MOUSE_PS2_ALPS=y
 CONFIG_MOUSE_PS2_LOGIPS2PP=y
 CONFIG_MOUSE_PS2_SYNAPTICS=y
-CONFIG_MOUSE_PS2_LIFEBOOK=y
 CONFIG_MOUSE_PS2_TRACKPOINT=y
 # CONFIG_MOUSE_PS2_ELANTECH is not set
+# CONFIG_MOUSE_PS2_SENTELIC is not set
 # CONFIG_MOUSE_PS2_TOUCHKIT is not set
 # CONFIG_MOUSE_SERIAL is not set
 # CONFIG_MOUSE_APPLETOUCH is not set
 # CONFIG_MOUSE_BCM5974 is not set
 # CONFIG_MOUSE_VSXXXAA is not set
 # CONFIG_MOUSE_GPIO is not set
+# CONFIG_MOUSE_SYNAPTICS_I2C is not set
 # CONFIG_INPUT_JOYSTICK is not set
 # CONFIG_INPUT_TABLET is not set
 # CONFIG_INPUT_TOUCHSCREEN is not set
@@ -390,6 +500,7 @@ CONFIG_SERIO=y
 CONFIG_SERIO_SERPORT=y
 CONFIG_SERIO_LIBPS2=y
 # CONFIG_SERIO_RAW is not set
+# CONFIG_SERIO_ALTERA_PS2 is not set
 # CONFIG_GAMEPORT is not set
 
 #
@@ -423,16 +534,18 @@ CONFIG_SERIAL_S3C6400=y
 CONFIG_SERIAL_CORE=y
 CONFIG_SERIAL_CORE_CONSOLE=y
 CONFIG_UNIX98_PTYS=y
+# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
 CONFIG_LEGACY_PTYS=y
 CONFIG_LEGACY_PTY_COUNT=256
 # CONFIG_IPMI_HANDLER is not set
 CONFIG_HW_RANDOM=y
-# CONFIG_NVRAM is not set
+# CONFIG_HW_RANDOM_TIMERIOMEM is not set
 # CONFIG_R3964 is not set
 # CONFIG_RAW_DRIVER is not set
 # CONFIG_TCG_TPM is not set
 CONFIG_I2C=y
 CONFIG_I2C_BOARDINFO=y
+CONFIG_I2C_COMPAT=y
 CONFIG_I2C_CHARDEV=y
 CONFIG_I2C_HELPER_AUTO=y
 
@@ -443,6 +556,7 @@ CONFIG_I2C_HELPER_AUTO=y
 #
 # I2C system bus drivers (mostly embedded / system-on-chip)
 #
+# CONFIG_I2C_DESIGNWARE is not set
 # CONFIG_I2C_GPIO is not set
 # CONFIG_I2C_OCORES is not set
 CONFIG_I2C_S3C2410=y
@@ -463,32 +577,33 @@ CONFIG_I2C_S3C2410=y
 #
 # Miscellaneous I2C Chip support
 #
-# CONFIG_DS1682 is not set
-CONFIG_EEPROM_AT24=y
-# CONFIG_EEPROM_LEGACY is not set
-# CONFIG_SENSORS_PCF8574 is not set
-# CONFIG_PCF8575 is not set
-# CONFIG_SENSORS_PCA9539 is not set
-# CONFIG_SENSORS_PCF8591 is not set
-# CONFIG_TPS65010 is not set
-# CONFIG_SENSORS_MAX6875 is not set
 # CONFIG_SENSORS_TSL2550 is not set
 # CONFIG_I2C_DEBUG_CORE is not set
 # CONFIG_I2C_DEBUG_ALGO is not set
 # CONFIG_I2C_DEBUG_BUS is not set
 # CONFIG_I2C_DEBUG_CHIP is not set
 # CONFIG_SPI is not set
+
+#
+# PPS support
+#
+# CONFIG_PPS is not set
 CONFIG_ARCH_REQUIRE_GPIOLIB=y
 CONFIG_GPIOLIB=y
 # CONFIG_DEBUG_GPIO is not set
 # CONFIG_GPIO_SYSFS is not set
 
 #
+# Memory mapped GPIO expanders:
+#
+
+#
 # I2C GPIO expanders:
 #
 # CONFIG_GPIO_MAX732X is not set
 # CONFIG_GPIO_PCA953X is not set
 # CONFIG_GPIO_PCF857X is not set
+# CONFIG_GPIO_ADP5588 is not set
 
 #
 # PCI GPIO expanders:
@@ -497,10 +612,19 @@ CONFIG_GPIOLIB=y
 #
 # SPI GPIO expanders:
 #
+
+#
+# AC97 GPIO expanders:
+#
 # CONFIG_W1 is not set
 # CONFIG_POWER_SUPPLY is not set
 CONFIG_HWMON=y
 # CONFIG_HWMON_VID is not set
+# CONFIG_HWMON_DEBUG_CHIP is not set
+
+#
+# Native drivers
+#
 # CONFIG_SENSORS_AD7414 is not set
 # CONFIG_SENSORS_AD7418 is not set
 # CONFIG_SENSORS_ADM1021 is not set
@@ -509,17 +633,21 @@ CONFIG_HWMON=y
 # CONFIG_SENSORS_ADM1029 is not set
 # CONFIG_SENSORS_ADM1031 is not set
 # CONFIG_SENSORS_ADM9240 is not set
+# CONFIG_SENSORS_ADT7462 is not set
 # CONFIG_SENSORS_ADT7470 is not set
 # CONFIG_SENSORS_ADT7473 is not set
+# CONFIG_SENSORS_ADT7475 is not set
 # CONFIG_SENSORS_ATXP1 is not set
 # CONFIG_SENSORS_DS1621 is not set
 # CONFIG_SENSORS_F71805F is not set
 # CONFIG_SENSORS_F71882FG is not set
 # CONFIG_SENSORS_F75375S is not set
+# CONFIG_SENSORS_G760A is not set
 # CONFIG_SENSORS_GL518SM is not set
 # CONFIG_SENSORS_GL520SM is not set
 # CONFIG_SENSORS_IT87 is not set
 # CONFIG_SENSORS_LM63 is not set
+# CONFIG_SENSORS_LM73 is not set
 # CONFIG_SENSORS_LM75 is not set
 # CONFIG_SENSORS_LM77 is not set
 # CONFIG_SENSORS_LM78 is not set
@@ -530,16 +658,24 @@ CONFIG_HWMON=y
 # CONFIG_SENSORS_LM90 is not set
 # CONFIG_SENSORS_LM92 is not set
 # CONFIG_SENSORS_LM93 is not set
+# CONFIG_SENSORS_LTC4215 is not set
+# CONFIG_SENSORS_LTC4245 is not set
+# CONFIG_SENSORS_LM95241 is not set
 # CONFIG_SENSORS_MAX1619 is not set
 # CONFIG_SENSORS_MAX6650 is not set
 # CONFIG_SENSORS_PC87360 is not set
 # CONFIG_SENSORS_PC87427 is not set
+# CONFIG_SENSORS_PCF8591 is not set
+# CONFIG_SENSORS_SHT15 is not set
 # CONFIG_SENSORS_DME1737 is not set
 # CONFIG_SENSORS_SMSC47M1 is not set
 # CONFIG_SENSORS_SMSC47M192 is not set
 # CONFIG_SENSORS_SMSC47B397 is not set
 # CONFIG_SENSORS_ADS7828 is not set
+# CONFIG_SENSORS_AMC6821 is not set
 # CONFIG_SENSORS_THMC50 is not set
+# CONFIG_SENSORS_TMP401 is not set
+# CONFIG_SENSORS_TMP421 is not set
 # CONFIG_SENSORS_VT1211 is not set
 # CONFIG_SENSORS_W83781D is not set
 # CONFIG_SENSORS_W83791D is not set
@@ -549,15 +685,14 @@ CONFIG_HWMON=y
 # CONFIG_SENSORS_W83L786NG is not set
 # CONFIG_SENSORS_W83627HF is not set
 # CONFIG_SENSORS_W83627EHF is not set
-# CONFIG_HWMON_DEBUG_CHIP is not set
+# CONFIG_SENSORS_LIS3_I2C is not set
 # CONFIG_THERMAL is not set
-# CONFIG_THERMAL_HWMON is not set
 # CONFIG_WATCHDOG is not set
+CONFIG_SSB_POSSIBLE=y
 
 #
 # Sonics Silicon Backplane
 #
-CONFIG_SSB_POSSIBLE=y
 # CONFIG_SSB is not set
 
 #
@@ -568,28 +703,22 @@ CONFIG_SSB_POSSIBLE=y
 # CONFIG_MFD_ASIC3 is not set
 # CONFIG_HTC_EGPIO is not set
 # CONFIG_HTC_PASIC3 is not set
+# CONFIG_TPS65010 is not set
+# CONFIG_TWL4030_CORE is not set
 # CONFIG_MFD_TMIO is not set
 # CONFIG_MFD_T7L66XB is not set
 # CONFIG_MFD_TC6387XB is not set
 # CONFIG_MFD_TC6393XB is not set
 # CONFIG_PMIC_DA903X is not set
+# CONFIG_PMIC_ADP5520 is not set
 # CONFIG_MFD_WM8400 is not set
+# CONFIG_MFD_WM831X is not set
 # CONFIG_MFD_WM8350_I2C is not set
-
-#
-# Multimedia devices
-#
-
-#
-# Multimedia core support
-#
-# CONFIG_VIDEO_DEV is not set
-# CONFIG_VIDEO_MEDIA is not set
-
-#
-# Multimedia drivers
-#
-# CONFIG_DAB is not set
+# CONFIG_MFD_PCF50633 is not set
+# CONFIG_AB3100_CORE is not set
+# CONFIG_MFD_88PM8607 is not set
+# CONFIG_REGULATOR is not set
+# CONFIG_MEDIA_SUPPORT is not set
 
 #
 # Graphics support
@@ -612,17 +741,15 @@ CONFIG_DUMMY_CONSOLE=y
 # CONFIG_SOUND is not set
 CONFIG_HID_SUPPORT=y
 CONFIG_HID=y
-CONFIG_HID_DEBUG=y
 # CONFIG_HIDRAW is not set
 # CONFIG_HID_PID is not set
 
 #
 # Special HID drivers
 #
-# CONFIG_HID_COMPAT is not set
 CONFIG_USB_SUPPORT=y
 CONFIG_USB_ARCH_HAS_HCD=y
-# CONFIG_USB_ARCH_HAS_OHCI is not set
+CONFIG_USB_ARCH_HAS_OHCI=y
 # CONFIG_USB_ARCH_HAS_EHCI is not set
 # CONFIG_USB is not set
 
@@ -631,9 +758,13 @@ CONFIG_USB_ARCH_HAS_HCD=y
 #
 
 #
-# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
+# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may
 #
 # CONFIG_USB_GADGET is not set
+
+#
+# OTG and related infrastructure
+#
 CONFIG_MMC=y
 CONFIG_MMC_DEBUG=y
 CONFIG_MMC_UNSAFE_RESUME=y
@@ -650,22 +781,24 @@ CONFIG_SDIO_UART=y
 # MMC/SD/SDIO Host Controller Drivers
 #
 CONFIG_MMC_SDHCI=y
+# CONFIG_MMC_SDHCI_PLTFM is not set
 CONFIG_MMC_SDHCI_S3C=y
+# CONFIG_MMC_SDHCI_S3C_DMA is not set
+# CONFIG_MMC_AT91 is not set
+# CONFIG_MMC_ATMELMCI is not set
 # CONFIG_MEMSTICK is not set
-# CONFIG_ACCESSIBILITY is not set
 # CONFIG_NEW_LEDS is not set
+# CONFIG_ACCESSIBILITY is not set
 CONFIG_RTC_LIB=y
 # CONFIG_RTC_CLASS is not set
 # CONFIG_DMADEVICES is not set
+# CONFIG_AUXDISPLAY is not set
+# CONFIG_UIO is not set
 
 #
-# Voltage and Current regulators
+# TI VLYNQ
 #
-# CONFIG_REGULATOR is not set
-# CONFIG_REGULATOR_FIXED_VOLTAGE is not set
-# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set
-# CONFIG_REGULATOR_BQ24022 is not set
-# CONFIG_UIO is not set
+# CONFIG_STAGING is not set
 
 #
 # File systems
@@ -674,6 +807,7 @@ CONFIG_EXT2_FS=y
 # CONFIG_EXT2_FS_XATTR is not set
 # CONFIG_EXT2_FS_XIP is not set
 CONFIG_EXT3_FS=y
+# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
 CONFIG_EXT3_FS_XATTR=y
 CONFIG_EXT3_FS_POSIX_ACL=y
 CONFIG_EXT3_FS_SECURITY=y
@@ -683,9 +817,12 @@ CONFIG_FS_MBCACHE=y
 # CONFIG_REISERFS_FS is not set
 # CONFIG_JFS_FS is not set
 CONFIG_FS_POSIX_ACL=y
-CONFIG_FILE_LOCKING=y
 # CONFIG_XFS_FS is not set
 # CONFIG_GFS2_FS is not set
+# CONFIG_BTRFS_FS is not set
+# CONFIG_NILFS2_FS is not set
+CONFIG_FILE_LOCKING=y
+CONFIG_FSNOTIFY=y
 CONFIG_DNOTIFY=y
 CONFIG_INOTIFY=y
 CONFIG_INOTIFY_USER=y
@@ -696,6 +833,11 @@ CONFIG_INOTIFY_USER=y
 CONFIG_GENERIC_ACL=y
 
 #
+# Caches
+#
+# CONFIG_FSCACHE is not set
+
+#
 # CD-ROM/DVD Filesystems
 #
 # CONFIG_ISO9660_FS is not set
@@ -719,10 +861,7 @@ CONFIG_TMPFS=y
 CONFIG_TMPFS_POSIX_ACL=y
 # CONFIG_HUGETLB_PAGE is not set
 # CONFIG_CONFIGFS_FS is not set
-
-#
-# Miscellaneous filesystems
-#
+CONFIG_MISC_FILESYSTEMS=y
 # CONFIG_ADFS_FS is not set
 # CONFIG_AFFS_FS is not set
 # CONFIG_HFS_FS is not set
@@ -731,12 +870,17 @@ CONFIG_TMPFS_POSIX_ACL=y
 # CONFIG_BFS_FS is not set
 # CONFIG_EFS_FS is not set
 CONFIG_CRAMFS=y
+# CONFIG_SQUASHFS is not set
 # CONFIG_VXFS_FS is not set
 # CONFIG_MINIX_FS is not set
 # CONFIG_OMFS_FS is not set
 # CONFIG_HPFS_FS is not set
 # CONFIG_QNX4FS_FS is not set
 CONFIG_ROMFS_FS=y
+CONFIG_ROMFS_BACKED_BY_BLOCK=y
+# CONFIG_ROMFS_BACKED_BY_MTD is not set
+# CONFIG_ROMFS_BACKED_BY_BOTH is not set
+CONFIG_ROMFS_ON_BLOCK=y
 # CONFIG_SYSV_FS is not set
 # CONFIG_UFS_FS is not set
 
@@ -755,6 +899,7 @@ CONFIG_ENABLE_WARN_DEPRECATED=y
 CONFIG_ENABLE_MUST_CHECK=y
 CONFIG_FRAME_WARN=1024
 CONFIG_MAGIC_SYSRQ=y
+# CONFIG_STRIP_ASM_SYMS is not set
 # CONFIG_UNUSED_SYMBOLS is not set
 # CONFIG_DEBUG_FS is not set
 # CONFIG_HEADERS_CHECK is not set
@@ -763,12 +908,16 @@ CONFIG_DEBUG_KERNEL=y
 CONFIG_DETECT_SOFTLOCKUP=y
 # CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
 CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
+CONFIG_DETECT_HUNG_TASK=y
+# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set
+CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0
 CONFIG_SCHED_DEBUG=y
 # CONFIG_SCHEDSTATS is not set
 # CONFIG_TIMER_STATS is not set
 # CONFIG_DEBUG_OBJECTS is not set
 # CONFIG_SLUB_DEBUG_ON is not set
 # CONFIG_SLUB_STATS is not set
+# CONFIG_DEBUG_KMEMLEAK is not set
 CONFIG_DEBUG_RT_MUTEXES=y
 CONFIG_DEBUG_PI_LIST=y
 # CONFIG_RT_MUTEX_TESTER is not set
@@ -787,34 +936,43 @@ CONFIG_DEBUG_INFO=y
 CONFIG_DEBUG_MEMORY_INIT=y
 # CONFIG_DEBUG_LIST is not set
 # CONFIG_DEBUG_SG is not set
-CONFIG_FRAME_POINTER=y
+# CONFIG_DEBUG_NOTIFIERS is not set
+# CONFIG_DEBUG_CREDENTIALS is not set
 # CONFIG_BOOT_PRINTK_DELAY is not set
 # CONFIG_RCU_TORTURE_TEST is not set
 # CONFIG_RCU_CPU_STALL_DETECTOR is not set
 # CONFIG_BACKTRACE_SELF_TEST is not set
 # CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
+# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
 # CONFIG_FAULT_INJECTION is not set
 # CONFIG_LATENCYTOP is not set
 CONFIG_SYSCTL_SYSCALL_CHECK=y
+# CONFIG_PAGE_POISONING is not set
 CONFIG_HAVE_FUNCTION_TRACER=y
-
-#
-# Tracers
-#
+CONFIG_TRACING_SUPPORT=y
+CONFIG_FTRACE=y
 # CONFIG_FUNCTION_TRACER is not set
 # CONFIG_SCHED_TRACER is not set
-# CONFIG_CONTEXT_SWITCH_TRACER is not set
+# CONFIG_ENABLE_DEFAULT_TRACERS is not set
 # CONFIG_BOOT_TRACER is not set
+CONFIG_BRANCH_PROFILE_NONE=y
+# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set
+# CONFIG_PROFILE_ALL_BRANCHES is not set
 # CONFIG_STACK_TRACER is not set
-# CONFIG_DYNAMIC_PRINTK_DEBUG is not set
+# CONFIG_KMEMTRACE is not set
+# CONFIG_WORKQUEUE_TRACER is not set
+# CONFIG_BLK_DEV_IO_TRACE is not set
 # CONFIG_SAMPLES is not set
 CONFIG_HAVE_ARCH_KGDB=y
 # CONFIG_KGDB is not set
+CONFIG_ARM_UNWIND=y
 CONFIG_DEBUG_USER=y
 CONFIG_DEBUG_ERRORS=y
 # CONFIG_DEBUG_STACK_USAGE is not set
 CONFIG_DEBUG_LL=y
+# CONFIG_EARLY_PRINTK is not set
 # CONFIG_DEBUG_ICEDCC is not set
+# CONFIG_OC_ETM is not set
 CONFIG_DEBUG_S3C_UART=0
 
 #
@@ -823,13 +981,19 @@ CONFIG_DEBUG_S3C_UART=0
 # CONFIG_KEYS is not set
 # CONFIG_SECURITY is not set
 # CONFIG_SECURITYFS is not set
-# CONFIG_SECURITY_FILE_CAPABILITIES is not set
+# CONFIG_DEFAULT_SECURITY_SELINUX is not set
+# CONFIG_DEFAULT_SECURITY_SMACK is not set
+# CONFIG_DEFAULT_SECURITY_TOMOYO is not set
+CONFIG_DEFAULT_SECURITY_DAC=y
+CONFIG_DEFAULT_SECURITY=""
 # CONFIG_CRYPTO is not set
+# CONFIG_BINARY_PRINTF is not set
 
 #
 # Library routines
 #
 CONFIG_BITREVERSE=y
+CONFIG_GENERIC_FIND_LAST_BIT=y
 # CONFIG_CRC_CCITT is not set
 # CONFIG_CRC16 is not set
 # CONFIG_CRC_T10DIF is not set
@@ -838,6 +1002,10 @@ CONFIG_CRC32=y
 # CONFIG_CRC7 is not set
 # CONFIG_LIBCRC32C is not set
 CONFIG_ZLIB_INFLATE=y
-CONFIG_PLIST=y
+CONFIG_LZO_DECOMPRESS=y
+CONFIG_DECOMPRESS_GZIP=y
+CONFIG_DECOMPRESS_BZIP2=y
+CONFIG_DECOMPRESS_LZMA=y
+CONFIG_DECOMPRESS_LZO=y
 CONFIG_HAS_IOMEM=y
 CONFIG_HAS_DMA=y
diff --git a/arch/arm/configs/s5p6440_defconfig b/arch/arm/configs/s5p6440_defconfig
new file mode 100644
index 000000000000..279a15e53114
--- /dev/null
+++ b/arch/arm/configs/s5p6440_defconfig
@@ -0,0 +1,969 @@
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.33-rc2
+# Sat Jan  9 16:33:55 2010
+#
+CONFIG_ARM=y
+CONFIG_SYS_SUPPORTS_APM_EMULATION=y
+CONFIG_GENERIC_GPIO=y
+CONFIG_NO_IOPORT=y
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_HAVE_LATENCYTOP_SUPPORT=y
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+CONFIG_HARDIRQS_SW_RESEND=y
+CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
+CONFIG_VECTORS_BASE=0xffff0000
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+CONFIG_CONSTRUCTORS=y
+
+#
+# General setup
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+CONFIG_LOCALVERSION=""
+CONFIG_LOCALVERSION_AUTO=y
+CONFIG_SWAP=y
+# CONFIG_SYSVIPC is not set
+# CONFIG_BSD_PROCESS_ACCT is not set
+
+#
+# RCU Subsystem
+#
+CONFIG_TREE_RCU=y
+# CONFIG_TREE_PREEMPT_RCU is not set
+# CONFIG_TINY_RCU is not set
+# CONFIG_RCU_TRACE is not set
+CONFIG_RCU_FANOUT=32
+# CONFIG_RCU_FANOUT_EXACT is not set
+# CONFIG_TREE_RCU_TRACE is not set
+# CONFIG_IKCONFIG is not set
+CONFIG_LOG_BUF_SHIFT=17
+# CONFIG_GROUP_SCHED is not set
+# CONFIG_CGROUPS is not set
+CONFIG_SYSFS_DEPRECATED=y
+CONFIG_SYSFS_DEPRECATED_V2=y
+# CONFIG_RELAY is not set
+CONFIG_NAMESPACES=y
+# CONFIG_UTS_NS is not set
+# CONFIG_USER_NS is not set
+# CONFIG_PID_NS is not set
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_INITRAMFS_SOURCE=""
+CONFIG_RD_GZIP=y
+CONFIG_RD_BZIP2=y
+CONFIG_RD_LZMA=y
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_SYSCTL=y
+CONFIG_ANON_INODES=y
+# CONFIG_EMBEDDED is not set
+CONFIG_UID16=y
+CONFIG_SYSCTL_SYSCALL=y
+CONFIG_KALLSYMS=y
+CONFIG_KALLSYMS_ALL=y
+# CONFIG_KALLSYMS_EXTRA_PASS is not set
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_ELF_CORE=y
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+CONFIG_EPOLL=y
+CONFIG_SIGNALFD=y
+CONFIG_TIMERFD=y
+CONFIG_EVENTFD=y
+CONFIG_SHMEM=y
+CONFIG_AIO=y
+
+#
+# Kernel Performance Events And Counters
+#
+CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_SLUB_DEBUG=y
+CONFIG_COMPAT_BRK=y
+# CONFIG_SLAB is not set
+CONFIG_SLUB=y
+# CONFIG_SLOB is not set
+# CONFIG_PROFILING is not set
+CONFIG_HAVE_OPROFILE=y
+# CONFIG_KPROBES is not set
+CONFIG_HAVE_KPROBES=y
+CONFIG_HAVE_KRETPROBES=y
+CONFIG_HAVE_CLK=y
+
+#
+# GCOV-based kernel profiling
+#
+# CONFIG_SLOW_WORK is not set
+CONFIG_HAVE_GENERIC_DMA_COHERENT=y
+CONFIG_SLABINFO=y
+CONFIG_RT_MUTEXES=y
+CONFIG_BASE_SMALL=0
+CONFIG_MODULES=y
+# CONFIG_MODULE_FORCE_LOAD is not set
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_MODULE_FORCE_UNLOAD is not set
+# CONFIG_MODVERSIONS is not set
+# CONFIG_MODULE_SRCVERSION_ALL is not set
+CONFIG_BLOCK=y
+CONFIG_LBDAF=y
+# CONFIG_BLK_DEV_BSG is not set
+# CONFIG_BLK_DEV_INTEGRITY is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_CFQ=y
+# CONFIG_DEFAULT_DEADLINE is not set
+CONFIG_DEFAULT_CFQ=y
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="cfq"
+# CONFIG_INLINE_SPIN_TRYLOCK is not set
+# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set
+# CONFIG_INLINE_SPIN_LOCK is not set
+# CONFIG_INLINE_SPIN_LOCK_BH is not set
+# CONFIG_INLINE_SPIN_LOCK_IRQ is not set
+# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set
+# CONFIG_INLINE_SPIN_UNLOCK is not set
+# CONFIG_INLINE_SPIN_UNLOCK_BH is not set
+# CONFIG_INLINE_SPIN_UNLOCK_IRQ is not set
+# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set
+# CONFIG_INLINE_READ_TRYLOCK is not set
+# CONFIG_INLINE_READ_LOCK is not set
+# CONFIG_INLINE_READ_LOCK_BH is not set
+# CONFIG_INLINE_READ_LOCK_IRQ is not set
+# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set
+# CONFIG_INLINE_READ_UNLOCK is not set
+# CONFIG_INLINE_READ_UNLOCK_BH is not set
+# CONFIG_INLINE_READ_UNLOCK_IRQ is not set
+# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set
+# CONFIG_INLINE_WRITE_TRYLOCK is not set
+# CONFIG_INLINE_WRITE_LOCK is not set
+# CONFIG_INLINE_WRITE_LOCK_BH is not set
+# CONFIG_INLINE_WRITE_LOCK_IRQ is not set
+# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set
+# CONFIG_INLINE_WRITE_UNLOCK is not set
+# CONFIG_INLINE_WRITE_UNLOCK_BH is not set
+# CONFIG_INLINE_WRITE_UNLOCK_IRQ is not set
+# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set
+# CONFIG_MUTEX_SPIN_ON_OWNER is not set
+# CONFIG_FREEZER is not set
+
+#
+# System Type
+#
+CONFIG_MMU=y
+# CONFIG_ARCH_AAEC2000 is not set
+# CONFIG_ARCH_INTEGRATOR is not set
+# CONFIG_ARCH_REALVIEW is not set
+# CONFIG_ARCH_VERSATILE is not set
+# CONFIG_ARCH_AT91 is not set
+# CONFIG_ARCH_CLPS711X is not set
+# CONFIG_ARCH_GEMINI is not set
+# CONFIG_ARCH_EBSA110 is not set
+# CONFIG_ARCH_EP93XX is not set
+# CONFIG_ARCH_FOOTBRIDGE is not set
+# CONFIG_ARCH_MXC is not set
+# CONFIG_ARCH_STMP3XXX is not set
+# CONFIG_ARCH_NETX is not set
+# CONFIG_ARCH_H720X is not set
+# CONFIG_ARCH_NOMADIK is not set
+# CONFIG_ARCH_IOP13XX is not set
+# CONFIG_ARCH_IOP32X is not set
+# CONFIG_ARCH_IOP33X is not set
+# CONFIG_ARCH_IXP23XX is not set
+# CONFIG_ARCH_IXP2000 is not set
+# CONFIG_ARCH_IXP4XX is not set
+# CONFIG_ARCH_L7200 is not set
+# CONFIG_ARCH_DOVE is not set
+# CONFIG_ARCH_KIRKWOOD is not set
+# CONFIG_ARCH_LOKI is not set
+# CONFIG_ARCH_MV78XX0 is not set
+# CONFIG_ARCH_ORION5X is not set
+# CONFIG_ARCH_MMP is not set
+# CONFIG_ARCH_KS8695 is not set
+# CONFIG_ARCH_NS9XXX is not set
+# CONFIG_ARCH_W90X900 is not set
+# CONFIG_ARCH_PNX4008 is not set
+# CONFIG_ARCH_PXA is not set
+# CONFIG_ARCH_MSM is not set
+# CONFIG_ARCH_RPC is not set
+# CONFIG_ARCH_SA1100 is not set
+# CONFIG_ARCH_S3C2410 is not set
+# CONFIG_ARCH_S3C64XX is not set
+CONFIG_ARCH_S5P6440=y
+# CONFIG_ARCH_S5PC1XX is not set
+# CONFIG_ARCH_SHARK is not set
+# CONFIG_ARCH_LH7A40X is not set
+# CONFIG_ARCH_U300 is not set
+# CONFIG_ARCH_DAVINCI is not set
+# CONFIG_ARCH_OMAP is not set
+# CONFIG_ARCH_BCMRING is not set
+# CONFIG_ARCH_U8500 is not set
+CONFIG_PLAT_SAMSUNG=y
+CONFIG_SAMSUNG_CLKSRC=y
+CONFIG_SAMSUNG_IRQ_VIC_TIMER=y
+CONFIG_SAMSUNG_IRQ_UART=y
+CONFIG_SAMSUNG_GPIO_EXTRA=0
+CONFIG_PLAT_S3C=y
+
+#
+# Boot options
+#
+CONFIG_S3C_BOOT_ERROR_RESET=y
+CONFIG_S3C_BOOT_UART_FORCE_FIFO=y
+
+#
+# Power management
+#
+CONFIG_S3C_LOWLEVEL_UART_PORT=1
+CONFIG_S3C_GPIO_SPACE=0
+CONFIG_S3C_GPIO_TRACK=y
+CONFIG_PLAT_S5P=y
+CONFIG_CPU_S5P6440_INIT=y
+CONFIG_CPU_S5P6440_CLOCK=y
+CONFIG_CPU_S5P6440=y
+CONFIG_MACH_SMDK6440=y
+
+#
+# Processor Type
+#
+CONFIG_CPU_V6=y
+CONFIG_CPU_32v6K=y
+CONFIG_CPU_32v6=y
+CONFIG_CPU_ABRT_EV6=y
+CONFIG_CPU_PABRT_V6=y
+CONFIG_CPU_CACHE_V6=y
+CONFIG_CPU_CACHE_VIPT=y
+CONFIG_CPU_COPY_V6=y
+CONFIG_CPU_TLB_V6=y
+CONFIG_CPU_HAS_ASID=y
+CONFIG_CPU_CP15=y
+CONFIG_CPU_CP15_MMU=y
+
+#
+# Processor Features
+#
+CONFIG_ARM_THUMB=y
+# CONFIG_CPU_ICACHE_DISABLE is not set
+# CONFIG_CPU_DCACHE_DISABLE is not set
+# CONFIG_CPU_BPREDICT_DISABLE is not set
+CONFIG_ARM_L1_CACHE_SHIFT=5
+# CONFIG_ARM_ERRATA_411920 is not set
+CONFIG_ARM_VIC=y
+CONFIG_ARM_VIC_NR=2
+
+#
+# Bus support
+#
+# CONFIG_PCI_SYSCALL is not set
+# CONFIG_ARCH_SUPPORTS_MSI is not set
+# CONFIG_PCCARD is not set
+
+#
+# Kernel Features
+#
+CONFIG_VMSPLIT_3G=y
+# CONFIG_VMSPLIT_2G is not set
+# CONFIG_VMSPLIT_1G is not set
+CONFIG_PAGE_OFFSET=0xC0000000
+CONFIG_PREEMPT_NONE=y
+# CONFIG_PREEMPT_VOLUNTARY is not set
+# CONFIG_PREEMPT is not set
+CONFIG_HZ=200
+CONFIG_AEABI=y
+CONFIG_OABI_COMPAT=y
+# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
+# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
+# CONFIG_HIGHMEM is not set
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_FLATMEM_MANUAL=y
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+# CONFIG_SPARSEMEM_MANUAL is not set
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+CONFIG_PAGEFLAGS_EXTENDED=y
+CONFIG_SPLIT_PTLOCK_CPUS=999999
+# CONFIG_PHYS_ADDR_T_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=0
+CONFIG_VIRT_TO_BUS=y
+# CONFIG_KSM is not set
+CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
+CONFIG_ALIGNMENT_TRAP=y
+# CONFIG_UACCESS_WITH_MEMCPY is not set
+
+#
+# Boot options
+#
+CONFIG_ZBOOT_ROM_TEXT=0
+CONFIG_ZBOOT_ROM_BSS=0
+CONFIG_CMDLINE="root=/dev/ram0 rw ramdisk=8192 initrd=0x20800000,8M console=ttySAC1,115200 init=/linuxrc"
+# CONFIG_XIP_KERNEL is not set
+# CONFIG_KEXEC is not set
+
+#
+# CPU Power Management
+#
+# CONFIG_CPU_IDLE is not set
+
+#
+# Floating point emulation
+#
+
+#
+# At least one emulation must be selected
+#
+CONFIG_FPE_NWFPE=y
+# CONFIG_FPE_NWFPE_XP is not set
+# CONFIG_FPE_FASTFPE is not set
+# CONFIG_VFP is not set
+
+#
+# Userspace binary formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+CONFIG_HAVE_AOUT=y
+# CONFIG_BINFMT_AOUT is not set
+# CONFIG_BINFMT_MISC is not set
+
+#
+# Power management options
+#
+# CONFIG_PM is not set
+CONFIG_ARCH_SUSPEND_POSSIBLE=y
+# CONFIG_NET is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+# CONFIG_DEVTMPFS is not set
+CONFIG_STANDALONE=y
+# CONFIG_PREVENT_FIRMWARE_BUILD is not set
+CONFIG_FW_LOADER=y
+CONFIG_FIRMWARE_IN_KERNEL=y
+CONFIG_EXTRA_FIRMWARE=""
+# CONFIG_DEBUG_DRIVER is not set
+# CONFIG_DEBUG_DEVRES is not set
+# CONFIG_SYS_HYPERVISOR is not set
+# CONFIG_MTD is not set
+# CONFIG_PARPORT is not set
+CONFIG_BLK_DEV=y
+# CONFIG_BLK_DEV_COW_COMMON is not set
+# CONFIG_BLK_DEV_LOOP is not set
+
+#
+# DRBD disabled because PROC_FS, INET or CONNECTOR not selected
+#
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_COUNT=16
+CONFIG_BLK_DEV_RAM_SIZE=8192
+# CONFIG_BLK_DEV_XIP is not set
+# CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_MG_DISK is not set
+# CONFIG_MISC_DEVICES is not set
+CONFIG_HAVE_IDE=y
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+# CONFIG_RAID_ATTRS is not set
+CONFIG_SCSI=y
+CONFIG_SCSI_DMA=y
+# CONFIG_SCSI_TGT is not set
+# CONFIG_SCSI_NETLINK is not set
+CONFIG_SCSI_PROC_FS=y
+
+#
+# SCSI support type (disk, tape, CD-ROM)
+#
+CONFIG_BLK_DEV_SD=y
+# CONFIG_CHR_DEV_ST is not set
+# CONFIG_CHR_DEV_OSST is not set
+# CONFIG_BLK_DEV_SR is not set
+CONFIG_CHR_DEV_SG=y
+# CONFIG_CHR_DEV_SCH is not set
+# CONFIG_SCSI_MULTI_LUN is not set
+# CONFIG_SCSI_CONSTANTS is not set
+# CONFIG_SCSI_LOGGING is not set
+# CONFIG_SCSI_SCAN_ASYNC is not set
+CONFIG_SCSI_WAIT_SCAN=m
+
+#
+# SCSI Transports
+#
+# CONFIG_SCSI_SPI_ATTRS is not set
+# CONFIG_SCSI_FC_ATTRS is not set
+# CONFIG_SCSI_SAS_LIBSAS is not set
+# CONFIG_SCSI_SRP_ATTRS is not set
+CONFIG_SCSI_LOWLEVEL=y
+# CONFIG_LIBFC is not set
+# CONFIG_LIBFCOE is not set
+# CONFIG_SCSI_DEBUG is not set
+# CONFIG_SCSI_DH is not set
+# CONFIG_SCSI_OSD_INITIATOR is not set
+# CONFIG_ATA is not set
+# CONFIG_MD is not set
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+# CONFIG_INPUT_FF_MEMLESS is not set
+# CONFIG_INPUT_POLLDEV is not set
+# CONFIG_INPUT_SPARSEKMAP is not set
+
+#
+# Userland interfaces
+#
+CONFIG_INPUT_MOUSEDEV=y
+CONFIG_INPUT_MOUSEDEV_PSAUX=y
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+# CONFIG_INPUT_JOYDEV is not set
+CONFIG_INPUT_EVDEV=y
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input Device Drivers
+#
+CONFIG_INPUT_KEYBOARD=y
+CONFIG_KEYBOARD_ATKBD=y
+# CONFIG_KEYBOARD_LKKBD is not set
+# CONFIG_KEYBOARD_GPIO is not set
+# CONFIG_KEYBOARD_MATRIX is not set
+# CONFIG_KEYBOARD_NEWTON is not set
+# CONFIG_KEYBOARD_OPENCORES is not set
+# CONFIG_KEYBOARD_STOWAWAY is not set
+# CONFIG_KEYBOARD_SUNKBD is not set
+# CONFIG_KEYBOARD_XTKBD is not set
+CONFIG_INPUT_MOUSE=y
+CONFIG_MOUSE_PS2=y
+CONFIG_MOUSE_PS2_ALPS=y
+CONFIG_MOUSE_PS2_LOGIPS2PP=y
+CONFIG_MOUSE_PS2_SYNAPTICS=y
+CONFIG_MOUSE_PS2_TRACKPOINT=y
+# CONFIG_MOUSE_PS2_ELANTECH is not set
+# CONFIG_MOUSE_PS2_SENTELIC is not set
+# CONFIG_MOUSE_PS2_TOUCHKIT is not set
+# CONFIG_MOUSE_SERIAL is not set
+# CONFIG_MOUSE_VSXXXAA is not set
+# CONFIG_MOUSE_GPIO is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TABLET is not set
+CONFIG_INPUT_TOUCHSCREEN=y
+# CONFIG_TOUCHSCREEN_AD7879 is not set
+# CONFIG_TOUCHSCREEN_DYNAPRO is not set
+# CONFIG_TOUCHSCREEN_FUJITSU is not set
+# CONFIG_TOUCHSCREEN_GUNZE is not set
+# CONFIG_TOUCHSCREEN_ELO is not set
+# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set
+# CONFIG_TOUCHSCREEN_MTOUCH is not set
+# CONFIG_TOUCHSCREEN_INEXIO is not set
+# CONFIG_TOUCHSCREEN_MK712 is not set
+# CONFIG_TOUCHSCREEN_PENMOUNT is not set
+# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set
+# CONFIG_TOUCHSCREEN_TOUCHWIN is not set
+# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set
+# CONFIG_TOUCHSCREEN_W90X900 is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Hardware I/O ports
+#
+CONFIG_SERIO=y
+CONFIG_SERIO_SERPORT=y
+CONFIG_SERIO_LIBPS2=y
+# CONFIG_SERIO_RAW is not set
+# CONFIG_SERIO_ALTERA_PS2 is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_CONSOLE_TRANSLATIONS=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+# CONFIG_VT_HW_CONSOLE_BINDING is not set
+CONFIG_DEVKMEM=y
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+CONFIG_SERIAL_8250=y
+# CONFIG_SERIAL_8250_CONSOLE is not set
+CONFIG_SERIAL_8250_NR_UARTS=3
+CONFIG_SERIAL_8250_RUNTIME_UARTS=3
+# CONFIG_SERIAL_8250_EXTENDED is not set
+
+#
+# Non-8250 serial port support
+#
+CONFIG_SERIAL_SAMSUNG=y
+CONFIG_SERIAL_SAMSUNG_UARTS=4
+# CONFIG_SERIAL_SAMSUNG_DEBUG is not set
+CONFIG_SERIAL_SAMSUNG_CONSOLE=y
+CONFIG_SERIAL_S5P6440=y
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+CONFIG_UNIX98_PTYS=y
+# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
+CONFIG_LEGACY_PTYS=y
+CONFIG_LEGACY_PTY_COUNT=256
+# CONFIG_IPMI_HANDLER is not set
+CONFIG_HW_RANDOM=y
+# CONFIG_HW_RANDOM_TIMERIOMEM is not set
+# CONFIG_R3964 is not set
+# CONFIG_RAW_DRIVER is not set
+# CONFIG_TCG_TPM is not set
+# CONFIG_I2C is not set
+# CONFIG_SPI is not set
+
+#
+# PPS support
+#
+# CONFIG_PPS is not set
+CONFIG_ARCH_REQUIRE_GPIOLIB=y
+CONFIG_GPIOLIB=y
+# CONFIG_DEBUG_GPIO is not set
+# CONFIG_GPIO_SYSFS is not set
+
+#
+# Memory mapped GPIO expanders:
+#
+
+#
+# I2C GPIO expanders:
+#
+
+#
+# PCI GPIO expanders:
+#
+
+#
+# SPI GPIO expanders:
+#
+
+#
+# AC97 GPIO expanders:
+#
+# CONFIG_W1 is not set
+# CONFIG_POWER_SUPPLY is not set
+# CONFIG_HWMON is not set
+# CONFIG_THERMAL is not set
+# CONFIG_WATCHDOG is not set
+CONFIG_SSB_POSSIBLE=y
+
+#
+# Sonics Silicon Backplane
+#
+# CONFIG_SSB is not set
+
+#
+# Multifunction device drivers
+#
+# CONFIG_MFD_CORE is not set
+# CONFIG_MFD_SM501 is not set
+# CONFIG_MFD_ASIC3 is not set
+# CONFIG_HTC_EGPIO is not set
+# CONFIG_HTC_PASIC3 is not set
+# CONFIG_MFD_TMIO is not set
+# CONFIG_MFD_T7L66XB is not set
+# CONFIG_MFD_TC6387XB is not set
+# CONFIG_MFD_TC6393XB is not set
+# CONFIG_REGULATOR is not set
+# CONFIG_MEDIA_SUPPORT is not set
+
+#
+# Graphics support
+#
+# CONFIG_VGASTATE is not set
+# CONFIG_VIDEO_OUTPUT_CONTROL is not set
+# CONFIG_FB is not set
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+
+#
+# Display device support
+#
+CONFIG_DISPLAY_SUPPORT=y
+
+#
+# Display hardware drivers
+#
+
+#
+# Console display driver support
+#
+# CONFIG_VGA_CONSOLE is not set
+CONFIG_DUMMY_CONSOLE=y
+# CONFIG_SOUND is not set
+# CONFIG_HID_SUPPORT is not set
+# CONFIG_USB_SUPPORT is not set
+# CONFIG_MMC is not set
+# CONFIG_MEMSTICK is not set
+# CONFIG_NEW_LEDS is not set
+# CONFIG_ACCESSIBILITY is not set
+CONFIG_RTC_LIB=y
+# CONFIG_RTC_CLASS is not set
+# CONFIG_DMADEVICES is not set
+# CONFIG_AUXDISPLAY is not set
+# CONFIG_UIO is not set
+
+#
+# TI VLYNQ
+#
+# CONFIG_STAGING is not set
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+# CONFIG_EXT2_FS_XATTR is not set
+# CONFIG_EXT2_FS_XIP is not set
+CONFIG_EXT3_FS=y
+# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
+CONFIG_EXT3_FS_XATTR=y
+CONFIG_EXT3_FS_POSIX_ACL=y
+CONFIG_EXT3_FS_SECURITY=y
+# CONFIG_EXT4_FS is not set
+CONFIG_JBD=y
+CONFIG_FS_MBCACHE=y
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+CONFIG_FS_POSIX_ACL=y
+# CONFIG_XFS_FS is not set
+# CONFIG_GFS2_FS is not set
+# CONFIG_BTRFS_FS is not set
+# CONFIG_NILFS2_FS is not set
+CONFIG_FILE_LOCKING=y
+CONFIG_FSNOTIFY=y
+CONFIG_DNOTIFY=y
+CONFIG_INOTIFY=y
+CONFIG_INOTIFY_USER=y
+# CONFIG_QUOTA is not set
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+# CONFIG_FUSE_FS is not set
+CONFIG_GENERIC_ACL=y
+
+#
+# Caches
+#
+# CONFIG_FSCACHE is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+CONFIG_FAT_FS=y
+CONFIG_MSDOS_FS=y
+CONFIG_VFAT_FS=y
+CONFIG_FAT_DEFAULT_CODEPAGE=437
+CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_SYSCTL=y
+CONFIG_PROC_PAGE_MONITOR=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+CONFIG_TMPFS_POSIX_ACL=y
+# CONFIG_HUGETLB_PAGE is not set
+# CONFIG_CONFIGFS_FS is not set
+CONFIG_MISC_FILESYSTEMS=y
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+CONFIG_CRAMFS=y
+# CONFIG_SQUASHFS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_OMFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+CONFIG_ROMFS_FS=y
+CONFIG_ROMFS_BACKED_BY_BLOCK=y
+# CONFIG_ROMFS_BACKED_BY_MTD is not set
+# CONFIG_ROMFS_BACKED_BY_BOTH is not set
+CONFIG_ROMFS_ON_BLOCK=y
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+CONFIG_NLS=y
+CONFIG_NLS_DEFAULT="iso8859-1"
+CONFIG_NLS_CODEPAGE_437=y
+# CONFIG_NLS_CODEPAGE_737 is not set
+# CONFIG_NLS_CODEPAGE_775 is not set
+# CONFIG_NLS_CODEPAGE_850 is not set
+# CONFIG_NLS_CODEPAGE_852 is not set
+# CONFIG_NLS_CODEPAGE_855 is not set
+# CONFIG_NLS_CODEPAGE_857 is not set
+# CONFIG_NLS_CODEPAGE_860 is not set
+# CONFIG_NLS_CODEPAGE_861 is not set
+# CONFIG_NLS_CODEPAGE_862 is not set
+# CONFIG_NLS_CODEPAGE_863 is not set
+# CONFIG_NLS_CODEPAGE_864 is not set
+# CONFIG_NLS_CODEPAGE_865 is not set
+# CONFIG_NLS_CODEPAGE_866 is not set
+# CONFIG_NLS_CODEPAGE_869 is not set
+# CONFIG_NLS_CODEPAGE_936 is not set
+# CONFIG_NLS_CODEPAGE_950 is not set
+# CONFIG_NLS_CODEPAGE_932 is not set
+# CONFIG_NLS_CODEPAGE_949 is not set
+# CONFIG_NLS_CODEPAGE_874 is not set
+# CONFIG_NLS_ISO8859_8 is not set
+# CONFIG_NLS_CODEPAGE_1250 is not set
+# CONFIG_NLS_CODEPAGE_1251 is not set
+CONFIG_NLS_ASCII=y
+CONFIG_NLS_ISO8859_1=y
+# CONFIG_NLS_ISO8859_2 is not set
+# CONFIG_NLS_ISO8859_3 is not set
+# CONFIG_NLS_ISO8859_4 is not set
+# CONFIG_NLS_ISO8859_5 is not set
+# CONFIG_NLS_ISO8859_6 is not set
+# CONFIG_NLS_ISO8859_7 is not set
+# CONFIG_NLS_ISO8859_9 is not set
+# CONFIG_NLS_ISO8859_13 is not set
+# CONFIG_NLS_ISO8859_14 is not set
+# CONFIG_NLS_ISO8859_15 is not set
+# CONFIG_NLS_KOI8_R is not set
+# CONFIG_NLS_KOI8_U is not set
+# CONFIG_NLS_UTF8 is not set
+
+#
+# Kernel hacking
+#
+# CONFIG_PRINTK_TIME is not set
+CONFIG_ENABLE_WARN_DEPRECATED=y
+CONFIG_ENABLE_MUST_CHECK=y
+CONFIG_FRAME_WARN=1024
+CONFIG_MAGIC_SYSRQ=y
+# CONFIG_STRIP_ASM_SYMS is not set
+# CONFIG_UNUSED_SYMBOLS is not set
+# CONFIG_DEBUG_FS is not set
+# CONFIG_HEADERS_CHECK is not set
+CONFIG_DEBUG_KERNEL=y
+# CONFIG_DEBUG_SHIRQ is not set
+CONFIG_DETECT_SOFTLOCKUP=y
+# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
+CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
+CONFIG_DETECT_HUNG_TASK=y
+# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set
+CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0
+CONFIG_SCHED_DEBUG=y
+# CONFIG_SCHEDSTATS is not set
+# CONFIG_TIMER_STATS is not set
+# CONFIG_DEBUG_OBJECTS is not set
+# CONFIG_SLUB_DEBUG_ON is not set
+# CONFIG_SLUB_STATS is not set
+# CONFIG_DEBUG_KMEMLEAK is not set
+CONFIG_DEBUG_RT_MUTEXES=y
+CONFIG_DEBUG_PI_LIST=y
+# CONFIG_RT_MUTEX_TESTER is not set
+CONFIG_DEBUG_SPINLOCK=y
+CONFIG_DEBUG_MUTEXES=y
+# CONFIG_DEBUG_LOCK_ALLOC is not set
+# CONFIG_PROVE_LOCKING is not set
+# CONFIG_LOCK_STAT is not set
+CONFIG_DEBUG_SPINLOCK_SLEEP=y
+# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
+# CONFIG_DEBUG_KOBJECT is not set
+CONFIG_DEBUG_BUGVERBOSE=y
+CONFIG_DEBUG_INFO=y
+# CONFIG_DEBUG_VM is not set
+# CONFIG_DEBUG_WRITECOUNT is not set
+CONFIG_DEBUG_MEMORY_INIT=y
+# CONFIG_DEBUG_LIST is not set
+# CONFIG_DEBUG_SG is not set
+# CONFIG_DEBUG_NOTIFIERS is not set
+# CONFIG_DEBUG_CREDENTIALS is not set
+# CONFIG_BOOT_PRINTK_DELAY is not set
+# CONFIG_RCU_TORTURE_TEST is not set
+# CONFIG_RCU_CPU_STALL_DETECTOR is not set
+# CONFIG_BACKTRACE_SELF_TEST is not set
+# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
+# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
+# CONFIG_FAULT_INJECTION is not set
+# CONFIG_LATENCYTOP is not set
+CONFIG_SYSCTL_SYSCALL_CHECK=y
+# CONFIG_PAGE_POISONING is not set
+CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_TRACING_SUPPORT=y
+CONFIG_FTRACE=y
+# CONFIG_FUNCTION_TRACER is not set
+# CONFIG_SCHED_TRACER is not set
+# CONFIG_ENABLE_DEFAULT_TRACERS is not set
+# CONFIG_BOOT_TRACER is not set
+CONFIG_BRANCH_PROFILE_NONE=y
+# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set
+# CONFIG_PROFILE_ALL_BRANCHES is not set
+# CONFIG_STACK_TRACER is not set
+# CONFIG_KMEMTRACE is not set
+# CONFIG_WORKQUEUE_TRACER is not set
+# CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_SAMPLES is not set
+CONFIG_HAVE_ARCH_KGDB=y
+# CONFIG_KGDB is not set
+CONFIG_ARM_UNWIND=y
+CONFIG_DEBUG_USER=y
+CONFIG_DEBUG_ERRORS=y
+# CONFIG_DEBUG_STACK_USAGE is not set
+CONFIG_DEBUG_LL=y
+# CONFIG_EARLY_PRINTK is not set
+# CONFIG_DEBUG_ICEDCC is not set
+# CONFIG_OC_ETM is not set
+CONFIG_DEBUG_S3C_UART=1
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY is not set
+# CONFIG_SECURITYFS is not set
+# CONFIG_DEFAULT_SECURITY_SELINUX is not set
+# CONFIG_DEFAULT_SECURITY_SMACK is not set
+# CONFIG_DEFAULT_SECURITY_TOMOYO is not set
+CONFIG_DEFAULT_SECURITY_DAC=y
+CONFIG_DEFAULT_SECURITY=""
+CONFIG_CRYPTO=y
+
+#
+# Crypto core or helper
+#
+# CONFIG_CRYPTO_MANAGER is not set
+# CONFIG_CRYPTO_MANAGER2 is not set
+# CONFIG_CRYPTO_GF128MUL is not set
+# CONFIG_CRYPTO_NULL is not set
+# CONFIG_CRYPTO_CRYPTD is not set
+# CONFIG_CRYPTO_AUTHENC is not set
+# CONFIG_CRYPTO_TEST is not set
+
+#
+# Authenticated Encryption with Associated Data
+#
+# CONFIG_CRYPTO_CCM is not set
+# CONFIG_CRYPTO_GCM is not set
+# CONFIG_CRYPTO_SEQIV is not set
+
+#
+# Block modes
+#
+# CONFIG_CRYPTO_CBC is not set
+# CONFIG_CRYPTO_CTR is not set
+# CONFIG_CRYPTO_CTS is not set
+# CONFIG_CRYPTO_ECB is not set
+# CONFIG_CRYPTO_LRW is not set
+# CONFIG_CRYPTO_PCBC is not set
+# CONFIG_CRYPTO_XTS is not set
+
+#
+# Hash modes
+#
+# CONFIG_CRYPTO_HMAC is not set
+# CONFIG_CRYPTO_XCBC is not set
+# CONFIG_CRYPTO_VMAC is not set
+
+#
+# Digest
+#
+# CONFIG_CRYPTO_CRC32C is not set
+# CONFIG_CRYPTO_GHASH is not set
+# CONFIG_CRYPTO_MD4 is not set
+# CONFIG_CRYPTO_MD5 is not set
+# CONFIG_CRYPTO_MICHAEL_MIC is not set
+# CONFIG_CRYPTO_RMD128 is not set
+# CONFIG_CRYPTO_RMD160 is not set
+# CONFIG_CRYPTO_RMD256 is not set
+# CONFIG_CRYPTO_RMD320 is not set
+# CONFIG_CRYPTO_SHA1 is not set
+# CONFIG_CRYPTO_SHA256 is not set
+# CONFIG_CRYPTO_SHA512 is not set
+# CONFIG_CRYPTO_TGR192 is not set
+# CONFIG_CRYPTO_WP512 is not set
+
+#
+# Ciphers
+#
+# CONFIG_CRYPTO_AES is not set
+# CONFIG_CRYPTO_ANUBIS is not set
+# CONFIG_CRYPTO_ARC4 is not set
+# CONFIG_CRYPTO_BLOWFISH is not set
+# CONFIG_CRYPTO_CAMELLIA is not set
+# CONFIG_CRYPTO_CAST5 is not set
+# CONFIG_CRYPTO_CAST6 is not set
+# CONFIG_CRYPTO_DES is not set
+# CONFIG_CRYPTO_FCRYPT is not set
+# CONFIG_CRYPTO_KHAZAD is not set
+# CONFIG_CRYPTO_SALSA20 is not set
+# CONFIG_CRYPTO_SEED is not set
+# CONFIG_CRYPTO_SERPENT is not set
+# CONFIG_CRYPTO_TEA is not set
+# CONFIG_CRYPTO_TWOFISH is not set
+
+#
+# Compression
+#
+# CONFIG_CRYPTO_DEFLATE is not set
+# CONFIG_CRYPTO_ZLIB is not set
+# CONFIG_CRYPTO_LZO is not set
+
+#
+# Random Number Generation
+#
+# CONFIG_CRYPTO_ANSI_CPRNG is not set
+CONFIG_CRYPTO_HW=y
+# CONFIG_BINARY_PRINTF is not set
+
+#
+# Library routines
+#
+CONFIG_BITREVERSE=y
+CONFIG_GENERIC_FIND_LAST_BIT=y
+CONFIG_CRC_CCITT=y
+# CONFIG_CRC16 is not set
+# CONFIG_CRC_T10DIF is not set
+# CONFIG_CRC_ITU_T is not set
+CONFIG_CRC32=y
+# CONFIG_CRC7 is not set
+# CONFIG_LIBCRC32C is not set
+CONFIG_ZLIB_INFLATE=y
+CONFIG_DECOMPRESS_GZIP=y
+CONFIG_DECOMPRESS_BZIP2=y
+CONFIG_DECOMPRESS_LZMA=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_DMA=y
diff --git a/arch/arm/configs/s5p6442_defconfig b/arch/arm/configs/s5p6442_defconfig
new file mode 100644
index 000000000000..74e20bfc0487
--- /dev/null
+++ b/arch/arm/configs/s5p6442_defconfig
@@ -0,0 +1,883 @@
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.33-rc4
+# Mon Jan 25 08:50:28 2010
+#
+CONFIG_ARM=y
+CONFIG_SYS_SUPPORTS_APM_EMULATION=y
+CONFIG_GENERIC_GPIO=y
+CONFIG_NO_IOPORT=y
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_HAVE_LATENCYTOP_SUPPORT=y
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+CONFIG_HARDIRQS_SW_RESEND=y
+CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
+CONFIG_VECTORS_BASE=0xffff0000
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+CONFIG_CONSTRUCTORS=y
+
+#
+# General setup
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+CONFIG_LOCALVERSION=""
+CONFIG_LOCALVERSION_AUTO=y
+CONFIG_HAVE_KERNEL_GZIP=y
+CONFIG_HAVE_KERNEL_LZO=y
+CONFIG_KERNEL_GZIP=y
+# CONFIG_KERNEL_BZIP2 is not set
+# CONFIG_KERNEL_LZMA is not set
+# CONFIG_KERNEL_LZO is not set
+CONFIG_SWAP=y
+# CONFIG_SYSVIPC is not set
+# CONFIG_BSD_PROCESS_ACCT is not set
+
+#
+# RCU Subsystem
+#
+CONFIG_TREE_RCU=y
+# CONFIG_TREE_PREEMPT_RCU is not set
+# CONFIG_TINY_RCU is not set
+# CONFIG_RCU_TRACE is not set
+CONFIG_RCU_FANOUT=32
+# CONFIG_RCU_FANOUT_EXACT is not set
+# CONFIG_TREE_RCU_TRACE is not set
+# CONFIG_IKCONFIG is not set
+CONFIG_LOG_BUF_SHIFT=17
+# CONFIG_GROUP_SCHED is not set
+# CONFIG_CGROUPS is not set
+CONFIG_SYSFS_DEPRECATED=y
+CONFIG_SYSFS_DEPRECATED_V2=y
+# CONFIG_RELAY is not set
+CONFIG_NAMESPACES=y
+# CONFIG_UTS_NS is not set
+# CONFIG_USER_NS is not set
+# CONFIG_PID_NS is not set
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_INITRAMFS_SOURCE=""
+CONFIG_RD_GZIP=y
+CONFIG_RD_BZIP2=y
+CONFIG_RD_LZMA=y
+CONFIG_RD_LZO=y
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_SYSCTL=y
+CONFIG_ANON_INODES=y
+# CONFIG_EMBEDDED is not set
+CONFIG_UID16=y
+CONFIG_SYSCTL_SYSCALL=y
+CONFIG_KALLSYMS=y
+CONFIG_KALLSYMS_ALL=y
+# CONFIG_KALLSYMS_EXTRA_PASS is not set
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_ELF_CORE=y
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+CONFIG_EPOLL=y
+CONFIG_SIGNALFD=y
+CONFIG_TIMERFD=y
+CONFIG_EVENTFD=y
+CONFIG_SHMEM=y
+CONFIG_AIO=y
+
+#
+# Kernel Performance Events And Counters
+#
+CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_SLUB_DEBUG=y
+CONFIG_COMPAT_BRK=y
+# CONFIG_SLAB is not set
+CONFIG_SLUB=y
+# CONFIG_SLOB is not set
+# CONFIG_PROFILING is not set
+CONFIG_HAVE_OPROFILE=y
+# CONFIG_KPROBES is not set
+CONFIG_HAVE_KPROBES=y
+CONFIG_HAVE_KRETPROBES=y
+CONFIG_HAVE_CLK=y
+
+#
+# GCOV-based kernel profiling
+#
+# CONFIG_SLOW_WORK is not set
+CONFIG_HAVE_GENERIC_DMA_COHERENT=y
+CONFIG_SLABINFO=y
+CONFIG_RT_MUTEXES=y
+CONFIG_BASE_SMALL=0
+CONFIG_MODULES=y
+# CONFIG_MODULE_FORCE_LOAD is not set
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_MODULE_FORCE_UNLOAD is not set
+# CONFIG_MODVERSIONS is not set
+# CONFIG_MODULE_SRCVERSION_ALL is not set
+CONFIG_BLOCK=y
+CONFIG_LBDAF=y
+# CONFIG_BLK_DEV_BSG is not set
+# CONFIG_BLK_DEV_INTEGRITY is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_CFQ=y
+# CONFIG_DEFAULT_DEADLINE is not set
+CONFIG_DEFAULT_CFQ=y
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="cfq"
+# CONFIG_INLINE_SPIN_TRYLOCK is not set
+# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set
+# CONFIG_INLINE_SPIN_LOCK is not set
+# CONFIG_INLINE_SPIN_LOCK_BH is not set
+# CONFIG_INLINE_SPIN_LOCK_IRQ is not set
+# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set
+# CONFIG_INLINE_SPIN_UNLOCK is not set
+# CONFIG_INLINE_SPIN_UNLOCK_BH is not set
+# CONFIG_INLINE_SPIN_UNLOCK_IRQ is not set
+# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set
+# CONFIG_INLINE_READ_TRYLOCK is not set
+# CONFIG_INLINE_READ_LOCK is not set
+# CONFIG_INLINE_READ_LOCK_BH is not set
+# CONFIG_INLINE_READ_LOCK_IRQ is not set
+# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set
+# CONFIG_INLINE_READ_UNLOCK is not set
+# CONFIG_INLINE_READ_UNLOCK_BH is not set
+# CONFIG_INLINE_READ_UNLOCK_IRQ is not set
+# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set
+# CONFIG_INLINE_WRITE_TRYLOCK is not set
+# CONFIG_INLINE_WRITE_LOCK is not set
+# CONFIG_INLINE_WRITE_LOCK_BH is not set
+# CONFIG_INLINE_WRITE_LOCK_IRQ is not set
+# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set
+# CONFIG_INLINE_WRITE_UNLOCK is not set
+# CONFIG_INLINE_WRITE_UNLOCK_BH is not set
+# CONFIG_INLINE_WRITE_UNLOCK_IRQ is not set
+# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set
+# CONFIG_MUTEX_SPIN_ON_OWNER is not set
+# CONFIG_FREEZER is not set
+
+#
+# System Type
+#
+CONFIG_MMU=y
+# CONFIG_ARCH_AAEC2000 is not set
+# CONFIG_ARCH_INTEGRATOR is not set
+# CONFIG_ARCH_REALVIEW is not set
+# CONFIG_ARCH_VERSATILE is not set
+# CONFIG_ARCH_AT91 is not set
+# CONFIG_ARCH_CLPS711X is not set
+# CONFIG_ARCH_GEMINI is not set
+# CONFIG_ARCH_EBSA110 is not set
+# CONFIG_ARCH_EP93XX is not set
+# CONFIG_ARCH_FOOTBRIDGE is not set
+# CONFIG_ARCH_MXC is not set
+# CONFIG_ARCH_STMP3XXX is not set
+# CONFIG_ARCH_NETX is not set
+# CONFIG_ARCH_H720X is not set
+# CONFIG_ARCH_NOMADIK is not set
+# CONFIG_ARCH_IOP13XX is not set
+# CONFIG_ARCH_IOP32X is not set
+# CONFIG_ARCH_IOP33X is not set
+# CONFIG_ARCH_IXP23XX is not set
+# CONFIG_ARCH_IXP2000 is not set
+# CONFIG_ARCH_IXP4XX is not set
+# CONFIG_ARCH_L7200 is not set
+# CONFIG_ARCH_DOVE is not set
+# CONFIG_ARCH_KIRKWOOD is not set
+# CONFIG_ARCH_LOKI is not set
+# CONFIG_ARCH_MV78XX0 is not set
+# CONFIG_ARCH_ORION5X is not set
+# CONFIG_ARCH_MMP is not set
+# CONFIG_ARCH_KS8695 is not set
+# CONFIG_ARCH_NS9XXX is not set
+# CONFIG_ARCH_W90X900 is not set
+# CONFIG_ARCH_PNX4008 is not set
+# CONFIG_ARCH_PXA is not set
+# CONFIG_ARCH_MSM is not set
+# CONFIG_ARCH_RPC is not set
+# CONFIG_ARCH_SA1100 is not set
+# CONFIG_ARCH_S3C2410 is not set
+# CONFIG_ARCH_S3C64XX is not set
+# CONFIG_ARCH_S5P6440 is not set
+CONFIG_ARCH_S5P6442=y
+# CONFIG_ARCH_S5PC1XX is not set
+# CONFIG_ARCH_SHARK is not set
+# CONFIG_ARCH_LH7A40X is not set
+# CONFIG_ARCH_U300 is not set
+# CONFIG_ARCH_DAVINCI is not set
+# CONFIG_ARCH_OMAP is not set
+# CONFIG_ARCH_BCMRING is not set
+# CONFIG_ARCH_U8500 is not set
+CONFIG_PLAT_SAMSUNG=y
+CONFIG_SAMSUNG_CLKSRC=y
+CONFIG_SAMSUNG_IRQ_VIC_TIMER=y
+CONFIG_SAMSUNG_IRQ_UART=y
+CONFIG_SAMSUNG_GPIOLIB_4BIT=y
+CONFIG_S3C_GPIO_CFG_S3C24XX=y
+CONFIG_S3C_GPIO_CFG_S3C64XX=y
+CONFIG_S3C_GPIO_PULL_UPDOWN=y
+CONFIG_SAMSUNG_GPIO_EXTRA=0
+# CONFIG_S3C_ADC is not set
+
+#
+# Power management
+#
+CONFIG_PLAT_S3C=y
+
+#
+# Boot options
+#
+# CONFIG_S3C_BOOT_ERROR_RESET is not set
+CONFIG_S3C_BOOT_UART_FORCE_FIFO=y
+CONFIG_S3C_LOWLEVEL_UART_PORT=1
+CONFIG_S3C_GPIO_SPACE=0
+CONFIG_S3C_GPIO_TRACK=y
+CONFIG_PLAT_S5P=y
+CONFIG_CPU_S5P6442=y
+CONFIG_MACH_SMDK6442=y
+
+#
+# Processor Type
+#
+CONFIG_CPU_V6=y
+CONFIG_CPU_32v6K=y
+CONFIG_CPU_32v6=y
+CONFIG_CPU_ABRT_EV6=y
+CONFIG_CPU_PABRT_V6=y
+CONFIG_CPU_CACHE_V6=y
+CONFIG_CPU_CACHE_VIPT=y
+CONFIG_CPU_COPY_V6=y
+CONFIG_CPU_TLB_V6=y
+CONFIG_CPU_HAS_ASID=y
+CONFIG_CPU_CP15=y
+CONFIG_CPU_CP15_MMU=y
+
+#
+# Processor Features
+#
+CONFIG_ARM_THUMB=y
+# CONFIG_CPU_ICACHE_DISABLE is not set
+# CONFIG_CPU_DCACHE_DISABLE is not set
+# CONFIG_CPU_BPREDICT_DISABLE is not set
+CONFIG_ARM_L1_CACHE_SHIFT=5
+# CONFIG_ARM_ERRATA_411920 is not set
+CONFIG_ARM_VIC=y
+CONFIG_ARM_VIC_NR=2
+
+#
+# Bus support
+#
+# CONFIG_PCI_SYSCALL is not set
+# CONFIG_ARCH_SUPPORTS_MSI is not set
+# CONFIG_PCCARD is not set
+
+#
+# Kernel Features
+#
+CONFIG_VMSPLIT_3G=y
+# CONFIG_VMSPLIT_2G is not set
+# CONFIG_VMSPLIT_1G is not set
+CONFIG_PAGE_OFFSET=0xC0000000
+CONFIG_PREEMPT_NONE=y
+# CONFIG_PREEMPT_VOLUNTARY is not set
+# CONFIG_PREEMPT is not set
+CONFIG_HZ=200
+CONFIG_AEABI=y
+CONFIG_OABI_COMPAT=y
+# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
+# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
+# CONFIG_HIGHMEM is not set
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_FLATMEM_MANUAL=y
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+# CONFIG_SPARSEMEM_MANUAL is not set
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+CONFIG_PAGEFLAGS_EXTENDED=y
+CONFIG_SPLIT_PTLOCK_CPUS=999999
+# CONFIG_PHYS_ADDR_T_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=0
+CONFIG_VIRT_TO_BUS=y
+# CONFIG_KSM is not set
+CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
+CONFIG_ALIGNMENT_TRAP=y
+# CONFIG_UACCESS_WITH_MEMCPY is not set
+
+#
+# Boot options
+#
+CONFIG_ZBOOT_ROM_TEXT=0
+CONFIG_ZBOOT_ROM_BSS=0
+CONFIG_CMDLINE="root=/dev/ram0 rw ramdisk=8192 initrd=0x20800000,8M console=ttySAC1,115200 init=/linuxrc"
+# CONFIG_XIP_KERNEL is not set
+# CONFIG_KEXEC is not set
+
+#
+# CPU Power Management
+#
+# CONFIG_CPU_IDLE is not set
+
+#
+# Floating point emulation
+#
+
+#
+# At least one emulation must be selected
+#
+CONFIG_FPE_NWFPE=y
+# CONFIG_FPE_NWFPE_XP is not set
+# CONFIG_FPE_FASTFPE is not set
+# CONFIG_VFP is not set
+
+#
+# Userspace binary formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+CONFIG_HAVE_AOUT=y
+# CONFIG_BINFMT_AOUT is not set
+# CONFIG_BINFMT_MISC is not set
+
+#
+# Power management options
+#
+# CONFIG_PM is not set
+CONFIG_ARCH_SUSPEND_POSSIBLE=y
+# CONFIG_NET is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+# CONFIG_DEVTMPFS is not set
+CONFIG_STANDALONE=y
+# CONFIG_PREVENT_FIRMWARE_BUILD is not set
+CONFIG_FW_LOADER=y
+CONFIG_FIRMWARE_IN_KERNEL=y
+CONFIG_EXTRA_FIRMWARE=""
+# CONFIG_DEBUG_DRIVER is not set
+# CONFIG_DEBUG_DEVRES is not set
+# CONFIG_SYS_HYPERVISOR is not set
+# CONFIG_MTD is not set
+# CONFIG_PARPORT is not set
+CONFIG_BLK_DEV=y
+# CONFIG_BLK_DEV_COW_COMMON is not set
+CONFIG_BLK_DEV_LOOP=y
+# CONFIG_BLK_DEV_CRYPTOLOOP is not set
+
+#
+# DRBD disabled because PROC_FS, INET or CONNECTOR not selected
+#
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_COUNT=16
+CONFIG_BLK_DEV_RAM_SIZE=8192
+# CONFIG_BLK_DEV_XIP is not set
+# CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_MG_DISK is not set
+# CONFIG_MISC_DEVICES is not set
+CONFIG_HAVE_IDE=y
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+# CONFIG_RAID_ATTRS is not set
+CONFIG_SCSI=y
+CONFIG_SCSI_DMA=y
+# CONFIG_SCSI_TGT is not set
+# CONFIG_SCSI_NETLINK is not set
+CONFIG_SCSI_PROC_FS=y
+
+#
+# SCSI support type (disk, tape, CD-ROM)
+#
+CONFIG_BLK_DEV_SD=y
+# CONFIG_CHR_DEV_ST is not set
+# CONFIG_CHR_DEV_OSST is not set
+# CONFIG_BLK_DEV_SR is not set
+CONFIG_CHR_DEV_SG=y
+# CONFIG_CHR_DEV_SCH is not set
+# CONFIG_SCSI_MULTI_LUN is not set
+# CONFIG_SCSI_CONSTANTS is not set
+# CONFIG_SCSI_LOGGING is not set
+# CONFIG_SCSI_SCAN_ASYNC is not set
+CONFIG_SCSI_WAIT_SCAN=m
+
+#
+# SCSI Transports
+#
+# CONFIG_SCSI_SPI_ATTRS is not set
+# CONFIG_SCSI_FC_ATTRS is not set
+# CONFIG_SCSI_SAS_LIBSAS is not set
+# CONFIG_SCSI_SRP_ATTRS is not set
+CONFIG_SCSI_LOWLEVEL=y
+# CONFIG_LIBFC is not set
+# CONFIG_LIBFCOE is not set
+# CONFIG_SCSI_DEBUG is not set
+# CONFIG_SCSI_DH is not set
+# CONFIG_SCSI_OSD_INITIATOR is not set
+# CONFIG_ATA is not set
+# CONFIG_MD is not set
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+# CONFIG_INPUT_FF_MEMLESS is not set
+# CONFIG_INPUT_POLLDEV is not set
+# CONFIG_INPUT_SPARSEKMAP is not set
+
+#
+# Userland interfaces
+#
+CONFIG_INPUT_MOUSEDEV=y
+CONFIG_INPUT_MOUSEDEV_PSAUX=y
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+# CONFIG_INPUT_JOYDEV is not set
+CONFIG_INPUT_EVDEV=y
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input Device Drivers
+#
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TABLET is not set
+CONFIG_INPUT_TOUCHSCREEN=y
+# CONFIG_TOUCHSCREEN_AD7879 is not set
+# CONFIG_TOUCHSCREEN_DYNAPRO is not set
+# CONFIG_TOUCHSCREEN_FUJITSU is not set
+# CONFIG_TOUCHSCREEN_GUNZE is not set
+# CONFIG_TOUCHSCREEN_ELO is not set
+# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set
+# CONFIG_TOUCHSCREEN_MTOUCH is not set
+# CONFIG_TOUCHSCREEN_INEXIO is not set
+# CONFIG_TOUCHSCREEN_MK712 is not set
+# CONFIG_TOUCHSCREEN_PENMOUNT is not set
+# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set
+# CONFIG_TOUCHSCREEN_TOUCHWIN is not set
+# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set
+# CONFIG_TOUCHSCREEN_W90X900 is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Hardware I/O ports
+#
+CONFIG_SERIO=y
+CONFIG_SERIO_SERPORT=y
+# CONFIG_SERIO_RAW is not set
+# CONFIG_SERIO_ALTERA_PS2 is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_CONSOLE_TRANSLATIONS=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+# CONFIG_VT_HW_CONSOLE_BINDING is not set
+CONFIG_DEVKMEM=y
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+CONFIG_SERIAL_8250=y
+# CONFIG_SERIAL_8250_CONSOLE is not set
+CONFIG_SERIAL_8250_NR_UARTS=3
+CONFIG_SERIAL_8250_RUNTIME_UARTS=3
+# CONFIG_SERIAL_8250_EXTENDED is not set
+
+#
+# Non-8250 serial port support
+#
+CONFIG_SERIAL_SAMSUNG=y
+CONFIG_SERIAL_SAMSUNG_UARTS=3
+# CONFIG_SERIAL_SAMSUNG_DEBUG is not set
+CONFIG_SERIAL_SAMSUNG_CONSOLE=y
+CONFIG_SERIAL_S5PV210=y
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+CONFIG_UNIX98_PTYS=y
+# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
+CONFIG_LEGACY_PTYS=y
+CONFIG_LEGACY_PTY_COUNT=256
+# CONFIG_IPMI_HANDLER is not set
+CONFIG_HW_RANDOM=y
+# CONFIG_HW_RANDOM_TIMERIOMEM is not set
+# CONFIG_R3964 is not set
+# CONFIG_RAW_DRIVER is not set
+# CONFIG_TCG_TPM is not set
+# CONFIG_I2C is not set
+# CONFIG_SPI is not set
+
+#
+# PPS support
+#
+# CONFIG_PPS is not set
+CONFIG_ARCH_REQUIRE_GPIOLIB=y
+CONFIG_GPIOLIB=y
+# CONFIG_DEBUG_GPIO is not set
+# CONFIG_GPIO_SYSFS is not set
+
+#
+# Memory mapped GPIO expanders:
+#
+
+#
+# I2C GPIO expanders:
+#
+
+#
+# PCI GPIO expanders:
+#
+
+#
+# SPI GPIO expanders:
+#
+
+#
+# AC97 GPIO expanders:
+#
+# CONFIG_W1 is not set
+# CONFIG_POWER_SUPPLY is not set
+# CONFIG_HWMON is not set
+# CONFIG_THERMAL is not set
+# CONFIG_WATCHDOG is not set
+CONFIG_SSB_POSSIBLE=y
+
+#
+# Sonics Silicon Backplane
+#
+# CONFIG_SSB is not set
+
+#
+# Multifunction device drivers
+#
+# CONFIG_MFD_CORE is not set
+# CONFIG_MFD_SM501 is not set
+# CONFIG_MFD_ASIC3 is not set
+# CONFIG_HTC_EGPIO is not set
+# CONFIG_HTC_PASIC3 is not set
+# CONFIG_MFD_TMIO is not set
+# CONFIG_MFD_T7L66XB is not set
+# CONFIG_MFD_TC6387XB is not set
+# CONFIG_MFD_TC6393XB is not set
+# CONFIG_REGULATOR is not set
+# CONFIG_MEDIA_SUPPORT is not set
+
+#
+# Graphics support
+#
+# CONFIG_VGASTATE is not set
+# CONFIG_VIDEO_OUTPUT_CONTROL is not set
+# CONFIG_FB is not set
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+
+#
+# Display device support
+#
+# CONFIG_DISPLAY_SUPPORT is not set
+
+#
+# Console display driver support
+#
+# CONFIG_VGA_CONSOLE is not set
+CONFIG_DUMMY_CONSOLE=y
+# CONFIG_SOUND is not set
+# CONFIG_HID_SUPPORT is not set
+# CONFIG_USB_SUPPORT is not set
+# CONFIG_MMC is not set
+# CONFIG_MEMSTICK is not set
+# CONFIG_NEW_LEDS is not set
+# CONFIG_ACCESSIBILITY is not set
+CONFIG_RTC_LIB=y
+# CONFIG_RTC_CLASS is not set
+# CONFIG_DMADEVICES is not set
+# CONFIG_AUXDISPLAY is not set
+# CONFIG_UIO is not set
+
+#
+# TI VLYNQ
+#
+# CONFIG_STAGING is not set
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+# CONFIG_EXT2_FS_XATTR is not set
+# CONFIG_EXT2_FS_XIP is not set
+# CONFIG_EXT3_FS is not set
+# CONFIG_EXT4_FS is not set
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+CONFIG_FS_POSIX_ACL=y
+# CONFIG_XFS_FS is not set
+# CONFIG_GFS2_FS is not set
+# CONFIG_BTRFS_FS is not set
+# CONFIG_NILFS2_FS is not set
+CONFIG_FILE_LOCKING=y
+CONFIG_FSNOTIFY=y
+CONFIG_DNOTIFY=y
+CONFIG_INOTIFY=y
+CONFIG_INOTIFY_USER=y
+# CONFIG_QUOTA is not set
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+# CONFIG_FUSE_FS is not set
+CONFIG_GENERIC_ACL=y
+
+#
+# Caches
+#
+# CONFIG_FSCACHE is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+CONFIG_FAT_FS=y
+CONFIG_MSDOS_FS=y
+CONFIG_VFAT_FS=y
+CONFIG_FAT_DEFAULT_CODEPAGE=437
+CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_SYSCTL=y
+CONFIG_PROC_PAGE_MONITOR=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+CONFIG_TMPFS_POSIX_ACL=y
+# CONFIG_HUGETLB_PAGE is not set
+# CONFIG_CONFIGFS_FS is not set
+CONFIG_MISC_FILESYSTEMS=y
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+CONFIG_CRAMFS=y
+# CONFIG_SQUASHFS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_OMFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+CONFIG_ROMFS_FS=y
+CONFIG_ROMFS_BACKED_BY_BLOCK=y
+# CONFIG_ROMFS_BACKED_BY_MTD is not set
+# CONFIG_ROMFS_BACKED_BY_BOTH is not set
+CONFIG_ROMFS_ON_BLOCK=y
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+
+#
+# Partition Types
+#
+CONFIG_PARTITION_ADVANCED=y
+# CONFIG_ACORN_PARTITION is not set
+# CONFIG_OSF_PARTITION is not set
+# CONFIG_AMIGA_PARTITION is not set
+# CONFIG_ATARI_PARTITION is not set
+# CONFIG_MAC_PARTITION is not set
+CONFIG_MSDOS_PARTITION=y
+CONFIG_BSD_DISKLABEL=y
+# CONFIG_MINIX_SUBPARTITION is not set
+CONFIG_SOLARIS_X86_PARTITION=y
+# CONFIG_UNIXWARE_DISKLABEL is not set
+# CONFIG_LDM_PARTITION is not set
+# CONFIG_SGI_PARTITION is not set
+# CONFIG_ULTRIX_PARTITION is not set
+# CONFIG_SUN_PARTITION is not set
+# CONFIG_KARMA_PARTITION is not set
+# CONFIG_EFI_PARTITION is not set
+# CONFIG_SYSV68_PARTITION is not set
+CONFIG_NLS=y
+CONFIG_NLS_DEFAULT="iso8859-1"
+CONFIG_NLS_CODEPAGE_437=y
+# CONFIG_NLS_CODEPAGE_737 is not set
+# CONFIG_NLS_CODEPAGE_775 is not set
+# CONFIG_NLS_CODEPAGE_850 is not set
+# CONFIG_NLS_CODEPAGE_852 is not set
+# CONFIG_NLS_CODEPAGE_855 is not set
+# CONFIG_NLS_CODEPAGE_857 is not set
+# CONFIG_NLS_CODEPAGE_860 is not set
+# CONFIG_NLS_CODEPAGE_861 is not set
+# CONFIG_NLS_CODEPAGE_862 is not set
+# CONFIG_NLS_CODEPAGE_863 is not set
+# CONFIG_NLS_CODEPAGE_864 is not set
+# CONFIG_NLS_CODEPAGE_865 is not set
+# CONFIG_NLS_CODEPAGE_866 is not set
+# CONFIG_NLS_CODEPAGE_869 is not set
+# CONFIG_NLS_CODEPAGE_936 is not set
+# CONFIG_NLS_CODEPAGE_950 is not set
+# CONFIG_NLS_CODEPAGE_932 is not set
+# CONFIG_NLS_CODEPAGE_949 is not set
+# CONFIG_NLS_CODEPAGE_874 is not set
+# CONFIG_NLS_ISO8859_8 is not set
+# CONFIG_NLS_CODEPAGE_1250 is not set
+# CONFIG_NLS_CODEPAGE_1251 is not set
+CONFIG_NLS_ASCII=y
+CONFIG_NLS_ISO8859_1=y
+# CONFIG_NLS_ISO8859_2 is not set
+# CONFIG_NLS_ISO8859_3 is not set
+# CONFIG_NLS_ISO8859_4 is not set
+# CONFIG_NLS_ISO8859_5 is not set
+# CONFIG_NLS_ISO8859_6 is not set
+# CONFIG_NLS_ISO8859_7 is not set
+# CONFIG_NLS_ISO8859_9 is not set
+# CONFIG_NLS_ISO8859_13 is not set
+# CONFIG_NLS_ISO8859_14 is not set
+# CONFIG_NLS_ISO8859_15 is not set
+# CONFIG_NLS_KOI8_R is not set
+# CONFIG_NLS_KOI8_U is not set
+# CONFIG_NLS_UTF8 is not set
+
+#
+# Kernel hacking
+#
+# CONFIG_PRINTK_TIME is not set
+CONFIG_ENABLE_WARN_DEPRECATED=y
+CONFIG_ENABLE_MUST_CHECK=y
+CONFIG_FRAME_WARN=1024
+CONFIG_MAGIC_SYSRQ=y
+# CONFIG_STRIP_ASM_SYMS is not set
+# CONFIG_UNUSED_SYMBOLS is not set
+# CONFIG_DEBUG_FS is not set
+# CONFIG_HEADERS_CHECK is not set
+CONFIG_DEBUG_KERNEL=y
+# CONFIG_DEBUG_SHIRQ is not set
+CONFIG_DETECT_SOFTLOCKUP=y
+# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
+CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
+CONFIG_DETECT_HUNG_TASK=y
+# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set
+CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0
+CONFIG_SCHED_DEBUG=y
+# CONFIG_SCHEDSTATS is not set
+# CONFIG_TIMER_STATS is not set
+# CONFIG_DEBUG_OBJECTS is not set
+# CONFIG_SLUB_DEBUG_ON is not set
+# CONFIG_SLUB_STATS is not set
+# CONFIG_DEBUG_KMEMLEAK is not set
+CONFIG_DEBUG_RT_MUTEXES=y
+CONFIG_DEBUG_PI_LIST=y
+# CONFIG_RT_MUTEX_TESTER is not set
+CONFIG_DEBUG_SPINLOCK=y
+CONFIG_DEBUG_MUTEXES=y
+# CONFIG_DEBUG_LOCK_ALLOC is not set
+# CONFIG_PROVE_LOCKING is not set
+# CONFIG_LOCK_STAT is not set
+CONFIG_DEBUG_SPINLOCK_SLEEP=y
+# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
+# CONFIG_DEBUG_KOBJECT is not set
+CONFIG_DEBUG_BUGVERBOSE=y
+CONFIG_DEBUG_INFO=y
+# CONFIG_DEBUG_VM is not set
+# CONFIG_DEBUG_WRITECOUNT is not set
+CONFIG_DEBUG_MEMORY_INIT=y
+# CONFIG_DEBUG_LIST is not set
+# CONFIG_DEBUG_SG is not set
+# CONFIG_DEBUG_NOTIFIERS is not set
+# CONFIG_DEBUG_CREDENTIALS is not set
+CONFIG_FRAME_POINTER=y
+# CONFIG_BOOT_PRINTK_DELAY is not set
+# CONFIG_RCU_TORTURE_TEST is not set
+# CONFIG_RCU_CPU_STALL_DETECTOR is not set
+# CONFIG_BACKTRACE_SELF_TEST is not set
+# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
+# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
+# CONFIG_FAULT_INJECTION is not set
+# CONFIG_LATENCYTOP is not set
+CONFIG_SYSCTL_SYSCALL_CHECK=y
+# CONFIG_PAGE_POISONING is not set
+CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_TRACING_SUPPORT=y
+CONFIG_FTRACE=y
+# CONFIG_FUNCTION_TRACER is not set
+# CONFIG_SCHED_TRACER is not set
+# CONFIG_ENABLE_DEFAULT_TRACERS is not set
+# CONFIG_BOOT_TRACER is not set
+CONFIG_BRANCH_PROFILE_NONE=y
+# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set
+# CONFIG_PROFILE_ALL_BRANCHES is not set
+# CONFIG_STACK_TRACER is not set
+# CONFIG_KMEMTRACE is not set
+# CONFIG_WORKQUEUE_TRACER is not set
+# CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_SAMPLES is not set
+CONFIG_HAVE_ARCH_KGDB=y
+# CONFIG_KGDB is not set
+# CONFIG_ARM_UNWIND is not set
+CONFIG_DEBUG_USER=y
+CONFIG_DEBUG_ERRORS=y
+# CONFIG_DEBUG_STACK_USAGE is not set
+CONFIG_DEBUG_LL=y
+# CONFIG_EARLY_PRINTK is not set
+# CONFIG_DEBUG_ICEDCC is not set
+# CONFIG_OC_ETM is not set
+CONFIG_DEBUG_S3C_UART=1
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY is not set
+# CONFIG_SECURITYFS is not set
+# CONFIG_DEFAULT_SECURITY_SELINUX is not set
+# CONFIG_DEFAULT_SECURITY_SMACK is not set
+# CONFIG_DEFAULT_SECURITY_TOMOYO is not set
+CONFIG_DEFAULT_SECURITY_DAC=y
+CONFIG_DEFAULT_SECURITY=""
+# CONFIG_CRYPTO is not set
+# CONFIG_BINARY_PRINTF is not set
+
+#
+# Library routines
+#
+CONFIG_BITREVERSE=y
+CONFIG_GENERIC_FIND_LAST_BIT=y
+CONFIG_CRC_CCITT=y
+# CONFIG_CRC16 is not set
+# CONFIG_CRC_T10DIF is not set
+# CONFIG_CRC_ITU_T is not set
+CONFIG_CRC32=y
+# CONFIG_CRC7 is not set
+# CONFIG_LIBCRC32C is not set
+CONFIG_ZLIB_INFLATE=y
+CONFIG_LZO_DECOMPRESS=y
+CONFIG_DECOMPRESS_GZIP=y
+CONFIG_DECOMPRESS_BZIP2=y
+CONFIG_DECOMPRESS_LZMA=y
+CONFIG_DECOMPRESS_LZO=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_DMA=y
diff --git a/arch/arm/configs/s5pc110_defconfig b/arch/arm/configs/s5pc110_defconfig
new file mode 100644
index 000000000000..6ea636131ac8
--- /dev/null
+++ b/arch/arm/configs/s5pc110_defconfig
@@ -0,0 +1,894 @@
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.33-rc4
+# Wed Feb 24 15:36:54 2010
+#
+CONFIG_ARM=y
+CONFIG_SYS_SUPPORTS_APM_EMULATION=y
+CONFIG_GENERIC_GPIO=y
+CONFIG_NO_IOPORT=y
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_HAVE_LATENCYTOP_SUPPORT=y
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+CONFIG_HARDIRQS_SW_RESEND=y
+CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
+CONFIG_ARM_L1_CACHE_SHIFT_6=y
+CONFIG_VECTORS_BASE=0xffff0000
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+CONFIG_CONSTRUCTORS=y
+
+#
+# General setup
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_LOCK_KERNEL=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+CONFIG_LOCALVERSION=""
+CONFIG_LOCALVERSION_AUTO=y
+CONFIG_HAVE_KERNEL_GZIP=y
+CONFIG_HAVE_KERNEL_LZO=y
+CONFIG_KERNEL_GZIP=y
+# CONFIG_KERNEL_BZIP2 is not set
+# CONFIG_KERNEL_LZMA is not set
+# CONFIG_KERNEL_LZO is not set
+CONFIG_SWAP=y
+# CONFIG_SYSVIPC is not set
+# CONFIG_BSD_PROCESS_ACCT is not set
+
+#
+# RCU Subsystem
+#
+CONFIG_TREE_RCU=y
+# CONFIG_TREE_PREEMPT_RCU is not set
+# CONFIG_TINY_RCU is not set
+# CONFIG_RCU_TRACE is not set
+CONFIG_RCU_FANOUT=32
+# CONFIG_RCU_FANOUT_EXACT is not set
+# CONFIG_TREE_RCU_TRACE is not set
+# CONFIG_IKCONFIG is not set
+CONFIG_LOG_BUF_SHIFT=17
+# CONFIG_GROUP_SCHED is not set
+# CONFIG_CGROUPS is not set
+CONFIG_SYSFS_DEPRECATED=y
+CONFIG_SYSFS_DEPRECATED_V2=y
+# CONFIG_RELAY is not set
+CONFIG_NAMESPACES=y
+# CONFIG_UTS_NS is not set
+# CONFIG_USER_NS is not set
+# CONFIG_PID_NS is not set
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_INITRAMFS_SOURCE=""
+CONFIG_RD_GZIP=y
+CONFIG_RD_BZIP2=y
+CONFIG_RD_LZMA=y
+CONFIG_RD_LZO=y
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_SYSCTL=y
+CONFIG_ANON_INODES=y
+# CONFIG_EMBEDDED is not set
+CONFIG_UID16=y
+CONFIG_SYSCTL_SYSCALL=y
+CONFIG_KALLSYMS=y
+CONFIG_KALLSYMS_ALL=y
+# CONFIG_KALLSYMS_EXTRA_PASS is not set
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_ELF_CORE=y
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+CONFIG_EPOLL=y
+CONFIG_SIGNALFD=y
+CONFIG_TIMERFD=y
+CONFIG_EVENTFD=y
+CONFIG_SHMEM=y
+CONFIG_AIO=y
+
+#
+# Kernel Performance Events And Counters
+#
+CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_SLUB_DEBUG=y
+CONFIG_COMPAT_BRK=y
+# CONFIG_SLAB is not set
+CONFIG_SLUB=y
+# CONFIG_SLOB is not set
+# CONFIG_PROFILING is not set
+CONFIG_HAVE_OPROFILE=y
+# CONFIG_KPROBES is not set
+CONFIG_HAVE_KPROBES=y
+CONFIG_HAVE_KRETPROBES=y
+CONFIG_HAVE_CLK=y
+
+#
+# GCOV-based kernel profiling
+#
+# CONFIG_SLOW_WORK is not set
+CONFIG_HAVE_GENERIC_DMA_COHERENT=y
+CONFIG_SLABINFO=y
+CONFIG_RT_MUTEXES=y
+CONFIG_BASE_SMALL=0
+CONFIG_MODULES=y
+# CONFIG_MODULE_FORCE_LOAD is not set
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_MODULE_FORCE_UNLOAD is not set
+# CONFIG_MODVERSIONS is not set
+# CONFIG_MODULE_SRCVERSION_ALL is not set
+CONFIG_BLOCK=y
+CONFIG_LBDAF=y
+# CONFIG_BLK_DEV_BSG is not set
+# CONFIG_BLK_DEV_INTEGRITY is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_CFQ=y
+# CONFIG_DEFAULT_DEADLINE is not set
+CONFIG_DEFAULT_CFQ=y
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="cfq"
+# CONFIG_INLINE_SPIN_TRYLOCK is not set
+# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set
+# CONFIG_INLINE_SPIN_LOCK is not set
+# CONFIG_INLINE_SPIN_LOCK_BH is not set
+# CONFIG_INLINE_SPIN_LOCK_IRQ is not set
+# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set
+# CONFIG_INLINE_SPIN_UNLOCK is not set
+# CONFIG_INLINE_SPIN_UNLOCK_BH is not set
+# CONFIG_INLINE_SPIN_UNLOCK_IRQ is not set
+# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set
+# CONFIG_INLINE_READ_TRYLOCK is not set
+# CONFIG_INLINE_READ_LOCK is not set
+# CONFIG_INLINE_READ_LOCK_BH is not set
+# CONFIG_INLINE_READ_LOCK_IRQ is not set
+# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set
+# CONFIG_INLINE_READ_UNLOCK is not set
+# CONFIG_INLINE_READ_UNLOCK_BH is not set
+# CONFIG_INLINE_READ_UNLOCK_IRQ is not set
+# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set
+# CONFIG_INLINE_WRITE_TRYLOCK is not set
+# CONFIG_INLINE_WRITE_LOCK is not set
+# CONFIG_INLINE_WRITE_LOCK_BH is not set
+# CONFIG_INLINE_WRITE_LOCK_IRQ is not set
+# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set
+# CONFIG_INLINE_WRITE_UNLOCK is not set
+# CONFIG_INLINE_WRITE_UNLOCK_BH is not set
+# CONFIG_INLINE_WRITE_UNLOCK_IRQ is not set
+# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set
+# CONFIG_MUTEX_SPIN_ON_OWNER is not set
+# CONFIG_FREEZER is not set
+
+#
+# System Type
+#
+CONFIG_MMU=y
+# CONFIG_ARCH_AAEC2000 is not set
+# CONFIG_ARCH_INTEGRATOR is not set
+# CONFIG_ARCH_REALVIEW is not set
+# CONFIG_ARCH_VERSATILE is not set
+# CONFIG_ARCH_AT91 is not set
+# CONFIG_ARCH_CLPS711X is not set
+# CONFIG_ARCH_GEMINI is not set
+# CONFIG_ARCH_EBSA110 is not set
+# CONFIG_ARCH_EP93XX is not set
+# CONFIG_ARCH_FOOTBRIDGE is not set
+# CONFIG_ARCH_MXC is not set
+# CONFIG_ARCH_STMP3XXX is not set
+# CONFIG_ARCH_NETX is not set
+# CONFIG_ARCH_H720X is not set
+# CONFIG_ARCH_NOMADIK is not set
+# CONFIG_ARCH_IOP13XX is not set
+# CONFIG_ARCH_IOP32X is not set
+# CONFIG_ARCH_IOP33X is not set
+# CONFIG_ARCH_IXP23XX is not set
+# CONFIG_ARCH_IXP2000 is not set
+# CONFIG_ARCH_IXP4XX is not set
+# CONFIG_ARCH_L7200 is not set
+# CONFIG_ARCH_DOVE is not set
+# CONFIG_ARCH_KIRKWOOD is not set
+# CONFIG_ARCH_LOKI is not set
+# CONFIG_ARCH_MV78XX0 is not set
+# CONFIG_ARCH_ORION5X is not set
+# CONFIG_ARCH_MMP is not set
+# CONFIG_ARCH_KS8695 is not set
+# CONFIG_ARCH_NS9XXX is not set
+# CONFIG_ARCH_W90X900 is not set
+# CONFIG_ARCH_PNX4008 is not set
+# CONFIG_ARCH_PXA is not set
+# CONFIG_ARCH_MSM is not set
+# CONFIG_ARCH_RPC is not set
+# CONFIG_ARCH_SA1100 is not set
+# CONFIG_ARCH_S3C2410 is not set
+# CONFIG_ARCH_S3C64XX is not set
+# CONFIG_ARCH_S5P6440 is not set
+# CONFIG_ARCH_S5P6442 is not set
+# CONFIG_ARCH_S5PC1XX is not set
+CONFIG_ARCH_S5PV210=y
+# CONFIG_ARCH_SHARK is not set
+# CONFIG_ARCH_LH7A40X is not set
+# CONFIG_ARCH_U300 is not set
+# CONFIG_ARCH_DAVINCI is not set
+# CONFIG_ARCH_OMAP is not set
+# CONFIG_ARCH_BCMRING is not set
+# CONFIG_ARCH_U8500 is not set
+CONFIG_PLAT_SAMSUNG=y
+
+#
+# Boot options
+#
+# CONFIG_S3C_BOOT_ERROR_RESET is not set
+CONFIG_S3C_BOOT_UART_FORCE_FIFO=y
+CONFIG_S3C_LOWLEVEL_UART_PORT=1
+CONFIG_SAMSUNG_CLKSRC=y
+CONFIG_SAMSUNG_IRQ_VIC_TIMER=y
+CONFIG_SAMSUNG_IRQ_UART=y
+CONFIG_SAMSUNG_GPIOLIB_4BIT=y
+CONFIG_S3C_GPIO_CFG_S3C24XX=y
+CONFIG_S3C_GPIO_CFG_S3C64XX=y
+CONFIG_S3C_GPIO_PULL_UPDOWN=y
+CONFIG_SAMSUNG_GPIO_EXTRA=0
+CONFIG_S3C_GPIO_SPACE=0
+CONFIG_S3C_GPIO_TRACK=y
+# CONFIG_S3C_ADC is not set
+
+#
+# Power management
+#
+CONFIG_PLAT_S5P=y
+CONFIG_CPU_S5PV210=y
+# CONFIG_MACH_SMDKV210 is not set
+CONFIG_MACH_SMDKC110=y
+
+#
+# Processor Type
+#
+CONFIG_CPU_32v6K=y
+CONFIG_CPU_V7=y
+CONFIG_CPU_32v7=y
+CONFIG_CPU_ABRT_EV7=y
+CONFIG_CPU_PABRT_V7=y
+CONFIG_CPU_CACHE_V7=y
+CONFIG_CPU_CACHE_VIPT=y
+CONFIG_CPU_COPY_V6=y
+CONFIG_CPU_TLB_V7=y
+CONFIG_CPU_HAS_ASID=y
+CONFIG_CPU_CP15=y
+CONFIG_CPU_CP15_MMU=y
+
+#
+# Processor Features
+#
+CONFIG_ARM_THUMB=y
+# CONFIG_ARM_THUMBEE is not set
+# CONFIG_CPU_ICACHE_DISABLE is not set
+# CONFIG_CPU_DCACHE_DISABLE is not set
+# CONFIG_CPU_BPREDICT_DISABLE is not set
+CONFIG_HAS_TLS_REG=y
+CONFIG_ARM_L1_CACHE_SHIFT=6
+# CONFIG_ARM_ERRATA_430973 is not set
+# CONFIG_ARM_ERRATA_458693 is not set
+# CONFIG_ARM_ERRATA_460075 is not set
+CONFIG_ARM_VIC=y
+CONFIG_ARM_VIC_NR=2
+
+#
+# Bus support
+#
+# CONFIG_PCI_SYSCALL is not set
+# CONFIG_ARCH_SUPPORTS_MSI is not set
+# CONFIG_PCCARD is not set
+
+#
+# Kernel Features
+#
+# CONFIG_VMSPLIT_3G is not set
+CONFIG_VMSPLIT_2G=y
+# CONFIG_VMSPLIT_1G is not set
+CONFIG_PAGE_OFFSET=0x80000000
+# CONFIG_PREEMPT_NONE is not set
+# CONFIG_PREEMPT_VOLUNTARY is not set
+CONFIG_PREEMPT=y
+CONFIG_HZ=200
+# CONFIG_THUMB2_KERNEL is not set
+CONFIG_AEABI=y
+CONFIG_OABI_COMPAT=y
+CONFIG_ARCH_SPARSEMEM_ENABLE=y
+CONFIG_ARCH_SPARSEMEM_DEFAULT=y
+# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
+# CONFIG_HIGHMEM is not set
+CONFIG_SELECT_MEMORY_MODEL=y
+# CONFIG_FLATMEM_MANUAL is not set
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+CONFIG_SPARSEMEM_MANUAL=y
+CONFIG_SPARSEMEM=y
+CONFIG_HAVE_MEMORY_PRESENT=y
+CONFIG_SPARSEMEM_EXTREME=y
+CONFIG_SPLIT_PTLOCK_CPUS=999999
+# CONFIG_PHYS_ADDR_T_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=0
+CONFIG_VIRT_TO_BUS=y
+# CONFIG_KSM is not set
+CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
+CONFIG_ALIGNMENT_TRAP=y
+# CONFIG_UACCESS_WITH_MEMCPY is not set
+
+#
+# Boot options
+#
+CONFIG_ZBOOT_ROM_TEXT=0
+CONFIG_ZBOOT_ROM_BSS=0
+CONFIG_CMDLINE="root=/dev/ram0 rw ramdisk=8192 initrd=0x20800000,8M console=ttySAC1,115200 init=/linuxrc"
+# CONFIG_XIP_KERNEL is not set
+# CONFIG_KEXEC is not set
+
+#
+# CPU Power Management
+#
+# CONFIG_CPU_IDLE is not set
+
+#
+# Floating point emulation
+#
+
+#
+# At least one emulation must be selected
+#
+# CONFIG_FPE_NWFPE is not set
+# CONFIG_FPE_FASTFPE is not set
+CONFIG_VFP=y
+CONFIG_VFPv3=y
+CONFIG_NEON=y
+
+#
+# Userspace binary formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+CONFIG_HAVE_AOUT=y
+# CONFIG_BINFMT_AOUT is not set
+# CONFIG_BINFMT_MISC is not set
+
+#
+# Power management options
+#
+# CONFIG_PM is not set
+CONFIG_ARCH_SUSPEND_POSSIBLE=y
+# CONFIG_NET is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+# CONFIG_DEVTMPFS is not set
+CONFIG_STANDALONE=y
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+CONFIG_FW_LOADER=y
+CONFIG_FIRMWARE_IN_KERNEL=y
+CONFIG_EXTRA_FIRMWARE=""
+# CONFIG_DEBUG_DRIVER is not set
+# CONFIG_DEBUG_DEVRES is not set
+# CONFIG_SYS_HYPERVISOR is not set
+# CONFIG_MTD is not set
+# CONFIG_PARPORT is not set
+CONFIG_BLK_DEV=y
+# CONFIG_BLK_DEV_COW_COMMON is not set
+CONFIG_BLK_DEV_LOOP=y
+# CONFIG_BLK_DEV_CRYPTOLOOP is not set
+
+#
+# DRBD disabled because PROC_FS, INET or CONNECTOR not selected
+#
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_COUNT=16
+CONFIG_BLK_DEV_RAM_SIZE=8192
+# CONFIG_BLK_DEV_XIP is not set
+# CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_MG_DISK is not set
+# CONFIG_MISC_DEVICES is not set
+CONFIG_HAVE_IDE=y
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+# CONFIG_RAID_ATTRS is not set
+CONFIG_SCSI=y
+CONFIG_SCSI_DMA=y
+# CONFIG_SCSI_TGT is not set
+# CONFIG_SCSI_NETLINK is not set
+CONFIG_SCSI_PROC_FS=y
+
+#
+# SCSI support type (disk, tape, CD-ROM)
+#
+CONFIG_BLK_DEV_SD=y
+# CONFIG_CHR_DEV_ST is not set
+# CONFIG_CHR_DEV_OSST is not set
+# CONFIG_BLK_DEV_SR is not set
+CONFIG_CHR_DEV_SG=y
+# CONFIG_CHR_DEV_SCH is not set
+# CONFIG_SCSI_MULTI_LUN is not set
+# CONFIG_SCSI_CONSTANTS is not set
+# CONFIG_SCSI_LOGGING is not set
+# CONFIG_SCSI_SCAN_ASYNC is not set
+CONFIG_SCSI_WAIT_SCAN=m
+
+#
+# SCSI Transports
+#
+# CONFIG_SCSI_SPI_ATTRS is not set
+# CONFIG_SCSI_FC_ATTRS is not set
+# CONFIG_SCSI_SAS_LIBSAS is not set
+# CONFIG_SCSI_SRP_ATTRS is not set
+CONFIG_SCSI_LOWLEVEL=y
+# CONFIG_LIBFC is not set
+# CONFIG_LIBFCOE is not set
+# CONFIG_SCSI_DEBUG is not set
+# CONFIG_SCSI_DH is not set
+# CONFIG_SCSI_OSD_INITIATOR is not set
+# CONFIG_ATA is not set
+# CONFIG_MD is not set
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+# CONFIG_INPUT_FF_MEMLESS is not set
+# CONFIG_INPUT_POLLDEV is not set
+# CONFIG_INPUT_SPARSEKMAP is not set
+
+#
+# Userland interfaces
+#
+CONFIG_INPUT_MOUSEDEV=y
+CONFIG_INPUT_MOUSEDEV_PSAUX=y
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+# CONFIG_INPUT_JOYDEV is not set
+CONFIG_INPUT_EVDEV=y
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input Device Drivers
+#
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TABLET is not set
+CONFIG_INPUT_TOUCHSCREEN=y
+# CONFIG_TOUCHSCREEN_AD7879 is not set
+# CONFIG_TOUCHSCREEN_DYNAPRO is not set
+# CONFIG_TOUCHSCREEN_FUJITSU is not set
+# CONFIG_TOUCHSCREEN_GUNZE is not set
+# CONFIG_TOUCHSCREEN_ELO is not set
+# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set
+# CONFIG_TOUCHSCREEN_MTOUCH is not set
+# CONFIG_TOUCHSCREEN_INEXIO is not set
+# CONFIG_TOUCHSCREEN_MK712 is not set
+# CONFIG_TOUCHSCREEN_PENMOUNT is not set
+# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set
+# CONFIG_TOUCHSCREEN_TOUCHWIN is not set
+# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set
+# CONFIG_TOUCHSCREEN_W90X900 is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Hardware I/O ports
+#
+CONFIG_SERIO=y
+CONFIG_SERIO_SERPORT=y
+# CONFIG_SERIO_RAW is not set
+# CONFIG_SERIO_ALTERA_PS2 is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_CONSOLE_TRANSLATIONS=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+# CONFIG_VT_HW_CONSOLE_BINDING is not set
+CONFIG_DEVKMEM=y
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+CONFIG_SERIAL_8250=y
+# CONFIG_SERIAL_8250_CONSOLE is not set
+CONFIG_SERIAL_8250_NR_UARTS=4
+CONFIG_SERIAL_8250_RUNTIME_UARTS=4
+# CONFIG_SERIAL_8250_EXTENDED is not set
+
+#
+# Non-8250 serial port support
+#
+CONFIG_SERIAL_SAMSUNG=y
+CONFIG_SERIAL_SAMSUNG_UARTS_4=y
+CONFIG_SERIAL_SAMSUNG_UARTS=4
+# CONFIG_SERIAL_SAMSUNG_DEBUG is not set
+CONFIG_SERIAL_SAMSUNG_CONSOLE=y
+CONFIG_SERIAL_S5PV210=y
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+CONFIG_UNIX98_PTYS=y
+# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
+CONFIG_LEGACY_PTYS=y
+CONFIG_LEGACY_PTY_COUNT=256
+# CONFIG_IPMI_HANDLER is not set
+CONFIG_HW_RANDOM=y
+# CONFIG_HW_RANDOM_TIMERIOMEM is not set
+# CONFIG_R3964 is not set
+# CONFIG_RAW_DRIVER is not set
+# CONFIG_TCG_TPM is not set
+# CONFIG_I2C is not set
+# CONFIG_SPI is not set
+
+#
+# PPS support
+#
+# CONFIG_PPS is not set
+CONFIG_ARCH_REQUIRE_GPIOLIB=y
+CONFIG_GPIOLIB=y
+# CONFIG_DEBUG_GPIO is not set
+# CONFIG_GPIO_SYSFS is not set
+
+#
+# Memory mapped GPIO expanders:
+#
+
+#
+# I2C GPIO expanders:
+#
+
+#
+# PCI GPIO expanders:
+#
+
+#
+# SPI GPIO expanders:
+#
+
+#
+# AC97 GPIO expanders:
+#
+# CONFIG_W1 is not set
+# CONFIG_POWER_SUPPLY is not set
+# CONFIG_HWMON is not set
+# CONFIG_THERMAL is not set
+# CONFIG_WATCHDOG is not set
+CONFIG_SSB_POSSIBLE=y
+
+#
+# Sonics Silicon Backplane
+#
+# CONFIG_SSB is not set
+
+#
+# Multifunction device drivers
+#
+# CONFIG_MFD_CORE is not set
+# CONFIG_MFD_SM501 is not set
+# CONFIG_MFD_ASIC3 is not set
+# CONFIG_HTC_EGPIO is not set
+# CONFIG_HTC_PASIC3 is not set
+# CONFIG_MFD_TMIO is not set
+# CONFIG_MFD_T7L66XB is not set
+# CONFIG_MFD_TC6387XB is not set
+# CONFIG_MFD_TC6393XB is not set
+# CONFIG_REGULATOR is not set
+# CONFIG_MEDIA_SUPPORT is not set
+
+#
+# Graphics support
+#
+# CONFIG_VGASTATE is not set
+# CONFIG_VIDEO_OUTPUT_CONTROL is not set
+# CONFIG_FB is not set
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+
+#
+# Display device support
+#
+# CONFIG_DISPLAY_SUPPORT is not set
+
+#
+# Console display driver support
+#
+# CONFIG_VGA_CONSOLE is not set
+CONFIG_DUMMY_CONSOLE=y
+# CONFIG_SOUND is not set
+# CONFIG_HID_SUPPORT is not set
+# CONFIG_USB_SUPPORT is not set
+# CONFIG_MMC is not set
+# CONFIG_MEMSTICK is not set
+# CONFIG_NEW_LEDS is not set
+# CONFIG_ACCESSIBILITY is not set
+CONFIG_RTC_LIB=y
+# CONFIG_RTC_CLASS is not set
+# CONFIG_DMADEVICES is not set
+# CONFIG_AUXDISPLAY is not set
+# CONFIG_UIO is not set
+
+#
+# TI VLYNQ
+#
+# CONFIG_STAGING is not set
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+# CONFIG_EXT2_FS_XATTR is not set
+# CONFIG_EXT2_FS_XIP is not set
+# CONFIG_EXT3_FS is not set
+# CONFIG_EXT4_FS is not set
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+CONFIG_FS_POSIX_ACL=y
+# CONFIG_XFS_FS is not set
+# CONFIG_GFS2_FS is not set
+# CONFIG_BTRFS_FS is not set
+# CONFIG_NILFS2_FS is not set
+CONFIG_FILE_LOCKING=y
+CONFIG_FSNOTIFY=y
+CONFIG_DNOTIFY=y
+CONFIG_INOTIFY=y
+CONFIG_INOTIFY_USER=y
+# CONFIG_QUOTA is not set
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+# CONFIG_FUSE_FS is not set
+CONFIG_GENERIC_ACL=y
+
+#
+# Caches
+#
+# CONFIG_FSCACHE is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+CONFIG_FAT_FS=y
+CONFIG_MSDOS_FS=y
+CONFIG_VFAT_FS=y
+CONFIG_FAT_DEFAULT_CODEPAGE=437
+CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_SYSCTL=y
+CONFIG_PROC_PAGE_MONITOR=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+CONFIG_TMPFS_POSIX_ACL=y
+# CONFIG_HUGETLB_PAGE is not set
+# CONFIG_CONFIGFS_FS is not set
+CONFIG_MISC_FILESYSTEMS=y
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+CONFIG_CRAMFS=y
+# CONFIG_SQUASHFS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_OMFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+CONFIG_ROMFS_FS=y
+CONFIG_ROMFS_BACKED_BY_BLOCK=y
+# CONFIG_ROMFS_BACKED_BY_MTD is not set
+# CONFIG_ROMFS_BACKED_BY_BOTH is not set
+CONFIG_ROMFS_ON_BLOCK=y
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+
+#
+# Partition Types
+#
+CONFIG_PARTITION_ADVANCED=y
+# CONFIG_ACORN_PARTITION is not set
+# CONFIG_OSF_PARTITION is not set
+# CONFIG_AMIGA_PARTITION is not set
+# CONFIG_ATARI_PARTITION is not set
+# CONFIG_MAC_PARTITION is not set
+CONFIG_MSDOS_PARTITION=y
+CONFIG_BSD_DISKLABEL=y
+# CONFIG_MINIX_SUBPARTITION is not set
+CONFIG_SOLARIS_X86_PARTITION=y
+# CONFIG_UNIXWARE_DISKLABEL is not set
+# CONFIG_LDM_PARTITION is not set
+# CONFIG_SGI_PARTITION is not set
+# CONFIG_ULTRIX_PARTITION is not set
+# CONFIG_SUN_PARTITION is not set
+# CONFIG_KARMA_PARTITION is not set
+# CONFIG_EFI_PARTITION is not set
+# CONFIG_SYSV68_PARTITION is not set
+CONFIG_NLS=y
+CONFIG_NLS_DEFAULT="iso8859-1"
+CONFIG_NLS_CODEPAGE_437=y
+# CONFIG_NLS_CODEPAGE_737 is not set
+# CONFIG_NLS_CODEPAGE_775 is not set
+# CONFIG_NLS_CODEPAGE_850 is not set
+# CONFIG_NLS_CODEPAGE_852 is not set
+# CONFIG_NLS_CODEPAGE_855 is not set
+# CONFIG_NLS_CODEPAGE_857 is not set
+# CONFIG_NLS_CODEPAGE_860 is not set
+# CONFIG_NLS_CODEPAGE_861 is not set
+# CONFIG_NLS_CODEPAGE_862 is not set
+# CONFIG_NLS_CODEPAGE_863 is not set
+# CONFIG_NLS_CODEPAGE_864 is not set
+# CONFIG_NLS_CODEPAGE_865 is not set
+# CONFIG_NLS_CODEPAGE_866 is not set
+# CONFIG_NLS_CODEPAGE_869 is not set
+# CONFIG_NLS_CODEPAGE_936 is not set
+# CONFIG_NLS_CODEPAGE_950 is not set
+# CONFIG_NLS_CODEPAGE_932 is not set
+# CONFIG_NLS_CODEPAGE_949 is not set
+# CONFIG_NLS_CODEPAGE_874 is not set
+# CONFIG_NLS_ISO8859_8 is not set
+# CONFIG_NLS_CODEPAGE_1250 is not set
+# CONFIG_NLS_CODEPAGE_1251 is not set
+CONFIG_NLS_ASCII=y
+CONFIG_NLS_ISO8859_1=y
+# CONFIG_NLS_ISO8859_2 is not set
+# CONFIG_NLS_ISO8859_3 is not set
+# CONFIG_NLS_ISO8859_4 is not set
+# CONFIG_NLS_ISO8859_5 is not set
+# CONFIG_NLS_ISO8859_6 is not set
+# CONFIG_NLS_ISO8859_7 is not set
+# CONFIG_NLS_ISO8859_9 is not set
+# CONFIG_NLS_ISO8859_13 is not set
+# CONFIG_NLS_ISO8859_14 is not set
+# CONFIG_NLS_ISO8859_15 is not set
+# CONFIG_NLS_KOI8_R is not set
+# CONFIG_NLS_KOI8_U is not set
+# CONFIG_NLS_UTF8 is not set
+
+#
+# Kernel hacking
+#
+# CONFIG_PRINTK_TIME is not set
+CONFIG_ENABLE_WARN_DEPRECATED=y
+CONFIG_ENABLE_MUST_CHECK=y
+CONFIG_FRAME_WARN=1024
+CONFIG_MAGIC_SYSRQ=y
+# CONFIG_STRIP_ASM_SYMS is not set
+# CONFIG_UNUSED_SYMBOLS is not set
+# CONFIG_DEBUG_FS is not set
+# CONFIG_HEADERS_CHECK is not set
+CONFIG_DEBUG_KERNEL=y
+# CONFIG_DEBUG_SHIRQ is not set
+CONFIG_DETECT_SOFTLOCKUP=y
+# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
+CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
+CONFIG_DETECT_HUNG_TASK=y
+# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set
+CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0
+CONFIG_SCHED_DEBUG=y
+# CONFIG_SCHEDSTATS is not set
+# CONFIG_TIMER_STATS is not set
+# CONFIG_DEBUG_OBJECTS is not set
+# CONFIG_SLUB_DEBUG_ON is not set
+# CONFIG_SLUB_STATS is not set
+# CONFIG_DEBUG_KMEMLEAK is not set
+# CONFIG_DEBUG_PREEMPT is not set
+CONFIG_DEBUG_RT_MUTEXES=y
+CONFIG_DEBUG_PI_LIST=y
+# CONFIG_RT_MUTEX_TESTER is not set
+CONFIG_DEBUG_SPINLOCK=y
+CONFIG_DEBUG_MUTEXES=y
+# CONFIG_DEBUG_LOCK_ALLOC is not set
+# CONFIG_PROVE_LOCKING is not set
+# CONFIG_LOCK_STAT is not set
+CONFIG_DEBUG_SPINLOCK_SLEEP=y
+# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
+# CONFIG_DEBUG_KOBJECT is not set
+CONFIG_DEBUG_BUGVERBOSE=y
+CONFIG_DEBUG_INFO=y
+# CONFIG_DEBUG_VM is not set
+# CONFIG_DEBUG_WRITECOUNT is not set
+CONFIG_DEBUG_MEMORY_INIT=y
+# CONFIG_DEBUG_LIST is not set
+# CONFIG_DEBUG_SG is not set
+# CONFIG_DEBUG_NOTIFIERS is not set
+# CONFIG_DEBUG_CREDENTIALS is not set
+# CONFIG_BOOT_PRINTK_DELAY is not set
+# CONFIG_RCU_TORTURE_TEST is not set
+# CONFIG_RCU_CPU_STALL_DETECTOR is not set
+# CONFIG_BACKTRACE_SELF_TEST is not set
+# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
+# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
+# CONFIG_FAULT_INJECTION is not set
+# CONFIG_LATENCYTOP is not set
+CONFIG_SYSCTL_SYSCALL_CHECK=y
+# CONFIG_PAGE_POISONING is not set
+CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_TRACING_SUPPORT=y
+CONFIG_FTRACE=y
+# CONFIG_FUNCTION_TRACER is not set
+# CONFIG_SCHED_TRACER is not set
+# CONFIG_ENABLE_DEFAULT_TRACERS is not set
+# CONFIG_BOOT_TRACER is not set
+CONFIG_BRANCH_PROFILE_NONE=y
+# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set
+# CONFIG_PROFILE_ALL_BRANCHES is not set
+# CONFIG_STACK_TRACER is not set
+# CONFIG_KMEMTRACE is not set
+# CONFIG_WORKQUEUE_TRACER is not set
+# CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_SAMPLES is not set
+CONFIG_HAVE_ARCH_KGDB=y
+# CONFIG_KGDB is not set
+CONFIG_ARM_UNWIND=y
+CONFIG_DEBUG_USER=y
+CONFIG_DEBUG_ERRORS=y
+# CONFIG_DEBUG_STACK_USAGE is not set
+CONFIG_DEBUG_LL=y
+CONFIG_EARLY_PRINTK=y
+# CONFIG_DEBUG_ICEDCC is not set
+# CONFIG_OC_ETM is not set
+CONFIG_DEBUG_S3C_UART=1
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY is not set
+# CONFIG_SECURITYFS is not set
+# CONFIG_DEFAULT_SECURITY_SELINUX is not set
+# CONFIG_DEFAULT_SECURITY_SMACK is not set
+# CONFIG_DEFAULT_SECURITY_TOMOYO is not set
+CONFIG_DEFAULT_SECURITY_DAC=y
+CONFIG_DEFAULT_SECURITY=""
+# CONFIG_CRYPTO is not set
+# CONFIG_BINARY_PRINTF is not set
+
+#
+# Library routines
+#
+CONFIG_BITREVERSE=y
+CONFIG_GENERIC_FIND_LAST_BIT=y
+CONFIG_CRC_CCITT=y
+# CONFIG_CRC16 is not set
+# CONFIG_CRC_T10DIF is not set
+# CONFIG_CRC_ITU_T is not set
+CONFIG_CRC32=y
+# CONFIG_CRC7 is not set
+# CONFIG_LIBCRC32C is not set
+CONFIG_ZLIB_INFLATE=y
+CONFIG_LZO_DECOMPRESS=y
+CONFIG_DECOMPRESS_GZIP=y
+CONFIG_DECOMPRESS_BZIP2=y
+CONFIG_DECOMPRESS_LZMA=y
+CONFIG_DECOMPRESS_LZO=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_DMA=y
diff --git a/arch/arm/configs/s5pv210_defconfig b/arch/arm/configs/s5pv210_defconfig
new file mode 100644
index 000000000000..3f7d47491b54
--- /dev/null
+++ b/arch/arm/configs/s5pv210_defconfig
@@ -0,0 +1,894 @@
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.33-rc4
+# Wed Feb 24 15:36:16 2010
+#
+CONFIG_ARM=y
+CONFIG_SYS_SUPPORTS_APM_EMULATION=y
+CONFIG_GENERIC_GPIO=y
+CONFIG_NO_IOPORT=y
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_HAVE_LATENCYTOP_SUPPORT=y
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+CONFIG_HARDIRQS_SW_RESEND=y
+CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
+CONFIG_ARM_L1_CACHE_SHIFT_6=y
+CONFIG_VECTORS_BASE=0xffff0000
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+CONFIG_CONSTRUCTORS=y
+
+#
+# General setup
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_LOCK_KERNEL=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+CONFIG_LOCALVERSION=""
+CONFIG_LOCALVERSION_AUTO=y
+CONFIG_HAVE_KERNEL_GZIP=y
+CONFIG_HAVE_KERNEL_LZO=y
+CONFIG_KERNEL_GZIP=y
+# CONFIG_KERNEL_BZIP2 is not set
+# CONFIG_KERNEL_LZMA is not set
+# CONFIG_KERNEL_LZO is not set
+CONFIG_SWAP=y
+# CONFIG_SYSVIPC is not set
+# CONFIG_BSD_PROCESS_ACCT is not set
+
+#
+# RCU Subsystem
+#
+CONFIG_TREE_RCU=y
+# CONFIG_TREE_PREEMPT_RCU is not set
+# CONFIG_TINY_RCU is not set
+# CONFIG_RCU_TRACE is not set
+CONFIG_RCU_FANOUT=32
+# CONFIG_RCU_FANOUT_EXACT is not set
+# CONFIG_TREE_RCU_TRACE is not set
+# CONFIG_IKCONFIG is not set
+CONFIG_LOG_BUF_SHIFT=17
+# CONFIG_GROUP_SCHED is not set
+# CONFIG_CGROUPS is not set
+CONFIG_SYSFS_DEPRECATED=y
+CONFIG_SYSFS_DEPRECATED_V2=y
+# CONFIG_RELAY is not set
+CONFIG_NAMESPACES=y
+# CONFIG_UTS_NS is not set
+# CONFIG_USER_NS is not set
+# CONFIG_PID_NS is not set
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_INITRAMFS_SOURCE=""
+CONFIG_RD_GZIP=y
+CONFIG_RD_BZIP2=y
+CONFIG_RD_LZMA=y
+CONFIG_RD_LZO=y
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_SYSCTL=y
+CONFIG_ANON_INODES=y
+# CONFIG_EMBEDDED is not set
+CONFIG_UID16=y
+CONFIG_SYSCTL_SYSCALL=y
+CONFIG_KALLSYMS=y
+CONFIG_KALLSYMS_ALL=y
+# CONFIG_KALLSYMS_EXTRA_PASS is not set
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_ELF_CORE=y
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+CONFIG_EPOLL=y
+CONFIG_SIGNALFD=y
+CONFIG_TIMERFD=y
+CONFIG_EVENTFD=y
+CONFIG_SHMEM=y
+CONFIG_AIO=y
+
+#
+# Kernel Performance Events And Counters
+#
+CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_SLUB_DEBUG=y
+CONFIG_COMPAT_BRK=y
+# CONFIG_SLAB is not set
+CONFIG_SLUB=y
+# CONFIG_SLOB is not set
+# CONFIG_PROFILING is not set
+CONFIG_HAVE_OPROFILE=y
+# CONFIG_KPROBES is not set
+CONFIG_HAVE_KPROBES=y
+CONFIG_HAVE_KRETPROBES=y
+CONFIG_HAVE_CLK=y
+
+#
+# GCOV-based kernel profiling
+#
+# CONFIG_SLOW_WORK is not set
+CONFIG_HAVE_GENERIC_DMA_COHERENT=y
+CONFIG_SLABINFO=y
+CONFIG_RT_MUTEXES=y
+CONFIG_BASE_SMALL=0
+CONFIG_MODULES=y
+# CONFIG_MODULE_FORCE_LOAD is not set
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_MODULE_FORCE_UNLOAD is not set
+# CONFIG_MODVERSIONS is not set
+# CONFIG_MODULE_SRCVERSION_ALL is not set
+CONFIG_BLOCK=y
+CONFIG_LBDAF=y
+# CONFIG_BLK_DEV_BSG is not set
+# CONFIG_BLK_DEV_INTEGRITY is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_CFQ=y
+# CONFIG_DEFAULT_DEADLINE is not set
+CONFIG_DEFAULT_CFQ=y
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="cfq"
+# CONFIG_INLINE_SPIN_TRYLOCK is not set
+# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set
+# CONFIG_INLINE_SPIN_LOCK is not set
+# CONFIG_INLINE_SPIN_LOCK_BH is not set
+# CONFIG_INLINE_SPIN_LOCK_IRQ is not set
+# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set
+# CONFIG_INLINE_SPIN_UNLOCK is not set
+# CONFIG_INLINE_SPIN_UNLOCK_BH is not set
+# CONFIG_INLINE_SPIN_UNLOCK_IRQ is not set
+# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set
+# CONFIG_INLINE_READ_TRYLOCK is not set
+# CONFIG_INLINE_READ_LOCK is not set
+# CONFIG_INLINE_READ_LOCK_BH is not set
+# CONFIG_INLINE_READ_LOCK_IRQ is not set
+# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set
+# CONFIG_INLINE_READ_UNLOCK is not set
+# CONFIG_INLINE_READ_UNLOCK_BH is not set
+# CONFIG_INLINE_READ_UNLOCK_IRQ is not set
+# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set
+# CONFIG_INLINE_WRITE_TRYLOCK is not set
+# CONFIG_INLINE_WRITE_LOCK is not set
+# CONFIG_INLINE_WRITE_LOCK_BH is not set
+# CONFIG_INLINE_WRITE_LOCK_IRQ is not set
+# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set
+# CONFIG_INLINE_WRITE_UNLOCK is not set
+# CONFIG_INLINE_WRITE_UNLOCK_BH is not set
+# CONFIG_INLINE_WRITE_UNLOCK_IRQ is not set
+# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set
+# CONFIG_MUTEX_SPIN_ON_OWNER is not set
+# CONFIG_FREEZER is not set
+
+#
+# System Type
+#
+CONFIG_MMU=y
+# CONFIG_ARCH_AAEC2000 is not set
+# CONFIG_ARCH_INTEGRATOR is not set
+# CONFIG_ARCH_REALVIEW is not set
+# CONFIG_ARCH_VERSATILE is not set
+# CONFIG_ARCH_AT91 is not set
+# CONFIG_ARCH_CLPS711X is not set
+# CONFIG_ARCH_GEMINI is not set
+# CONFIG_ARCH_EBSA110 is not set
+# CONFIG_ARCH_EP93XX is not set
+# CONFIG_ARCH_FOOTBRIDGE is not set
+# CONFIG_ARCH_MXC is not set
+# CONFIG_ARCH_STMP3XXX is not set
+# CONFIG_ARCH_NETX is not set
+# CONFIG_ARCH_H720X is not set
+# CONFIG_ARCH_NOMADIK is not set
+# CONFIG_ARCH_IOP13XX is not set
+# CONFIG_ARCH_IOP32X is not set
+# CONFIG_ARCH_IOP33X is not set
+# CONFIG_ARCH_IXP23XX is not set
+# CONFIG_ARCH_IXP2000 is not set
+# CONFIG_ARCH_IXP4XX is not set
+# CONFIG_ARCH_L7200 is not set
+# CONFIG_ARCH_DOVE is not set
+# CONFIG_ARCH_KIRKWOOD is not set
+# CONFIG_ARCH_LOKI is not set
+# CONFIG_ARCH_MV78XX0 is not set
+# CONFIG_ARCH_ORION5X is not set
+# CONFIG_ARCH_MMP is not set
+# CONFIG_ARCH_KS8695 is not set
+# CONFIG_ARCH_NS9XXX is not set
+# CONFIG_ARCH_W90X900 is not set
+# CONFIG_ARCH_PNX4008 is not set
+# CONFIG_ARCH_PXA is not set
+# CONFIG_ARCH_MSM is not set
+# CONFIG_ARCH_RPC is not set
+# CONFIG_ARCH_SA1100 is not set
+# CONFIG_ARCH_S3C2410 is not set
+# CONFIG_ARCH_S3C64XX is not set
+# CONFIG_ARCH_S5P6440 is not set
+# CONFIG_ARCH_S5P6442 is not set
+# CONFIG_ARCH_S5PC1XX is not set
+CONFIG_ARCH_S5PV210=y
+# CONFIG_ARCH_SHARK is not set
+# CONFIG_ARCH_LH7A40X is not set
+# CONFIG_ARCH_U300 is not set
+# CONFIG_ARCH_DAVINCI is not set
+# CONFIG_ARCH_OMAP is not set
+# CONFIG_ARCH_BCMRING is not set
+# CONFIG_ARCH_U8500 is not set
+CONFIG_PLAT_SAMSUNG=y
+
+#
+# Boot options
+#
+# CONFIG_S3C_BOOT_ERROR_RESET is not set
+CONFIG_S3C_BOOT_UART_FORCE_FIFO=y
+CONFIG_S3C_LOWLEVEL_UART_PORT=1
+CONFIG_SAMSUNG_CLKSRC=y
+CONFIG_SAMSUNG_IRQ_VIC_TIMER=y
+CONFIG_SAMSUNG_IRQ_UART=y
+CONFIG_SAMSUNG_GPIOLIB_4BIT=y
+CONFIG_S3C_GPIO_CFG_S3C24XX=y
+CONFIG_S3C_GPIO_CFG_S3C64XX=y
+CONFIG_S3C_GPIO_PULL_UPDOWN=y
+CONFIG_SAMSUNG_GPIO_EXTRA=0
+CONFIG_S3C_GPIO_SPACE=0
+CONFIG_S3C_GPIO_TRACK=y
+# CONFIG_S3C_ADC is not set
+
+#
+# Power management
+#
+CONFIG_PLAT_S5P=y
+CONFIG_CPU_S5PV210=y
+CONFIG_MACH_SMDKV210=y
+# CONFIG_MACH_SMDKC110 is not set
+
+#
+# Processor Type
+#
+CONFIG_CPU_32v6K=y
+CONFIG_CPU_V7=y
+CONFIG_CPU_32v7=y
+CONFIG_CPU_ABRT_EV7=y
+CONFIG_CPU_PABRT_V7=y
+CONFIG_CPU_CACHE_V7=y
+CONFIG_CPU_CACHE_VIPT=y
+CONFIG_CPU_COPY_V6=y
+CONFIG_CPU_TLB_V7=y
+CONFIG_CPU_HAS_ASID=y
+CONFIG_CPU_CP15=y
+CONFIG_CPU_CP15_MMU=y
+
+#
+# Processor Features
+#
+CONFIG_ARM_THUMB=y
+# CONFIG_ARM_THUMBEE is not set
+# CONFIG_CPU_ICACHE_DISABLE is not set
+# CONFIG_CPU_DCACHE_DISABLE is not set
+# CONFIG_CPU_BPREDICT_DISABLE is not set
+CONFIG_HAS_TLS_REG=y
+CONFIG_ARM_L1_CACHE_SHIFT=6
+# CONFIG_ARM_ERRATA_430973 is not set
+# CONFIG_ARM_ERRATA_458693 is not set
+# CONFIG_ARM_ERRATA_460075 is not set
+CONFIG_ARM_VIC=y
+CONFIG_ARM_VIC_NR=2
+
+#
+# Bus support
+#
+# CONFIG_PCI_SYSCALL is not set
+# CONFIG_ARCH_SUPPORTS_MSI is not set
+# CONFIG_PCCARD is not set
+
+#
+# Kernel Features
+#
+# CONFIG_VMSPLIT_3G is not set
+CONFIG_VMSPLIT_2G=y
+# CONFIG_VMSPLIT_1G is not set
+CONFIG_PAGE_OFFSET=0x80000000
+# CONFIG_PREEMPT_NONE is not set
+# CONFIG_PREEMPT_VOLUNTARY is not set
+CONFIG_PREEMPT=y
+CONFIG_HZ=200
+# CONFIG_THUMB2_KERNEL is not set
+CONFIG_AEABI=y
+CONFIG_OABI_COMPAT=y
+CONFIG_ARCH_SPARSEMEM_ENABLE=y
+CONFIG_ARCH_SPARSEMEM_DEFAULT=y
+# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
+# CONFIG_HIGHMEM is not set
+CONFIG_SELECT_MEMORY_MODEL=y
+# CONFIG_FLATMEM_MANUAL is not set
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+CONFIG_SPARSEMEM_MANUAL=y
+CONFIG_SPARSEMEM=y
+CONFIG_HAVE_MEMORY_PRESENT=y
+CONFIG_SPARSEMEM_EXTREME=y
+CONFIG_SPLIT_PTLOCK_CPUS=999999
+# CONFIG_PHYS_ADDR_T_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=0
+CONFIG_VIRT_TO_BUS=y
+# CONFIG_KSM is not set
+CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
+CONFIG_ALIGNMENT_TRAP=y
+# CONFIG_UACCESS_WITH_MEMCPY is not set
+
+#
+# Boot options
+#
+CONFIG_ZBOOT_ROM_TEXT=0
+CONFIG_ZBOOT_ROM_BSS=0
+CONFIG_CMDLINE="root=/dev/ram0 rw ramdisk=8192 initrd=0x20800000,8M console=ttySAC1,115200 init=/linuxrc"
+# CONFIG_XIP_KERNEL is not set
+# CONFIG_KEXEC is not set
+
+#
+# CPU Power Management
+#
+# CONFIG_CPU_IDLE is not set
+
+#
+# Floating point emulation
+#
+
+#
+# At least one emulation must be selected
+#
+# CONFIG_FPE_NWFPE is not set
+# CONFIG_FPE_FASTFPE is not set
+CONFIG_VFP=y
+CONFIG_VFPv3=y
+CONFIG_NEON=y
+
+#
+# Userspace binary formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+CONFIG_HAVE_AOUT=y
+# CONFIG_BINFMT_AOUT is not set
+# CONFIG_BINFMT_MISC is not set
+
+#
+# Power management options
+#
+# CONFIG_PM is not set
+CONFIG_ARCH_SUSPEND_POSSIBLE=y
+# CONFIG_NET is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+# CONFIG_DEVTMPFS is not set
+CONFIG_STANDALONE=y
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+CONFIG_FW_LOADER=y
+CONFIG_FIRMWARE_IN_KERNEL=y
+CONFIG_EXTRA_FIRMWARE=""
+# CONFIG_DEBUG_DRIVER is not set
+# CONFIG_DEBUG_DEVRES is not set
+# CONFIG_SYS_HYPERVISOR is not set
+# CONFIG_MTD is not set
+# CONFIG_PARPORT is not set
+CONFIG_BLK_DEV=y
+# CONFIG_BLK_DEV_COW_COMMON is not set
+CONFIG_BLK_DEV_LOOP=y
+# CONFIG_BLK_DEV_CRYPTOLOOP is not set
+
+#
+# DRBD disabled because PROC_FS, INET or CONNECTOR not selected
+#
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_COUNT=16
+CONFIG_BLK_DEV_RAM_SIZE=8192
+# CONFIG_BLK_DEV_XIP is not set
+# CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_MG_DISK is not set
+# CONFIG_MISC_DEVICES is not set
+CONFIG_HAVE_IDE=y
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+# CONFIG_RAID_ATTRS is not set
+CONFIG_SCSI=y
+CONFIG_SCSI_DMA=y
+# CONFIG_SCSI_TGT is not set
+# CONFIG_SCSI_NETLINK is not set
+CONFIG_SCSI_PROC_FS=y
+
+#
+# SCSI support type (disk, tape, CD-ROM)
+#
+CONFIG_BLK_DEV_SD=y
+# CONFIG_CHR_DEV_ST is not set
+# CONFIG_CHR_DEV_OSST is not set
+# CONFIG_BLK_DEV_SR is not set
+CONFIG_CHR_DEV_SG=y
+# CONFIG_CHR_DEV_SCH is not set
+# CONFIG_SCSI_MULTI_LUN is not set
+# CONFIG_SCSI_CONSTANTS is not set
+# CONFIG_SCSI_LOGGING is not set
+# CONFIG_SCSI_SCAN_ASYNC is not set
+CONFIG_SCSI_WAIT_SCAN=m
+
+#
+# SCSI Transports
+#
+# CONFIG_SCSI_SPI_ATTRS is not set
+# CONFIG_SCSI_FC_ATTRS is not set
+# CONFIG_SCSI_SAS_LIBSAS is not set
+# CONFIG_SCSI_SRP_ATTRS is not set
+CONFIG_SCSI_LOWLEVEL=y
+# CONFIG_LIBFC is not set
+# CONFIG_LIBFCOE is not set
+# CONFIG_SCSI_DEBUG is not set
+# CONFIG_SCSI_DH is not set
+# CONFIG_SCSI_OSD_INITIATOR is not set
+# CONFIG_ATA is not set
+# CONFIG_MD is not set
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+# CONFIG_INPUT_FF_MEMLESS is not set
+# CONFIG_INPUT_POLLDEV is not set
+# CONFIG_INPUT_SPARSEKMAP is not set
+
+#
+# Userland interfaces
+#
+CONFIG_INPUT_MOUSEDEV=y
+CONFIG_INPUT_MOUSEDEV_PSAUX=y
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+# CONFIG_INPUT_JOYDEV is not set
+CONFIG_INPUT_EVDEV=y
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input Device Drivers
+#
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TABLET is not set
+CONFIG_INPUT_TOUCHSCREEN=y
+# CONFIG_TOUCHSCREEN_AD7879 is not set
+# CONFIG_TOUCHSCREEN_DYNAPRO is not set
+# CONFIG_TOUCHSCREEN_FUJITSU is not set
+# CONFIG_TOUCHSCREEN_GUNZE is not set
+# CONFIG_TOUCHSCREEN_ELO is not set
+# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set
+# CONFIG_TOUCHSCREEN_MTOUCH is not set
+# CONFIG_TOUCHSCREEN_INEXIO is not set
+# CONFIG_TOUCHSCREEN_MK712 is not set
+# CONFIG_TOUCHSCREEN_PENMOUNT is not set
+# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set
+# CONFIG_TOUCHSCREEN_TOUCHWIN is not set
+# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set
+# CONFIG_TOUCHSCREEN_W90X900 is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Hardware I/O ports
+#
+CONFIG_SERIO=y
+CONFIG_SERIO_SERPORT=y
+# CONFIG_SERIO_RAW is not set
+# CONFIG_SERIO_ALTERA_PS2 is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_CONSOLE_TRANSLATIONS=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+# CONFIG_VT_HW_CONSOLE_BINDING is not set
+CONFIG_DEVKMEM=y
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+CONFIG_SERIAL_8250=y
+# CONFIG_SERIAL_8250_CONSOLE is not set
+CONFIG_SERIAL_8250_NR_UARTS=4
+CONFIG_SERIAL_8250_RUNTIME_UARTS=4
+# CONFIG_SERIAL_8250_EXTENDED is not set
+
+#
+# Non-8250 serial port support
+#
+CONFIG_SERIAL_SAMSUNG=y
+CONFIG_SERIAL_SAMSUNG_UARTS_4=y
+CONFIG_SERIAL_SAMSUNG_UARTS=4
+# CONFIG_SERIAL_SAMSUNG_DEBUG is not set
+CONFIG_SERIAL_SAMSUNG_CONSOLE=y
+CONFIG_SERIAL_S5PV210=y
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+CONFIG_UNIX98_PTYS=y
+# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
+CONFIG_LEGACY_PTYS=y
+CONFIG_LEGACY_PTY_COUNT=256
+# CONFIG_IPMI_HANDLER is not set
+CONFIG_HW_RANDOM=y
+# CONFIG_HW_RANDOM_TIMERIOMEM is not set
+# CONFIG_R3964 is not set
+# CONFIG_RAW_DRIVER is not set
+# CONFIG_TCG_TPM is not set
+# CONFIG_I2C is not set
+# CONFIG_SPI is not set
+
+#
+# PPS support
+#
+# CONFIG_PPS is not set
+CONFIG_ARCH_REQUIRE_GPIOLIB=y
+CONFIG_GPIOLIB=y
+# CONFIG_DEBUG_GPIO is not set
+# CONFIG_GPIO_SYSFS is not set
+
+#
+# Memory mapped GPIO expanders:
+#
+
+#
+# I2C GPIO expanders:
+#
+
+#
+# PCI GPIO expanders:
+#
+
+#
+# SPI GPIO expanders:
+#
+
+#
+# AC97 GPIO expanders:
+#
+# CONFIG_W1 is not set
+# CONFIG_POWER_SUPPLY is not set
+# CONFIG_HWMON is not set
+# CONFIG_THERMAL is not set
+# CONFIG_WATCHDOG is not set
+CONFIG_SSB_POSSIBLE=y
+
+#
+# Sonics Silicon Backplane
+#
+# CONFIG_SSB is not set
+
+#
+# Multifunction device drivers
+#
+# CONFIG_MFD_CORE is not set
+# CONFIG_MFD_SM501 is not set
+# CONFIG_MFD_ASIC3 is not set
+# CONFIG_HTC_EGPIO is not set
+# CONFIG_HTC_PASIC3 is not set
+# CONFIG_MFD_TMIO is not set
+# CONFIG_MFD_T7L66XB is not set
+# CONFIG_MFD_TC6387XB is not set
+# CONFIG_MFD_TC6393XB is not set
+# CONFIG_REGULATOR is not set
+# CONFIG_MEDIA_SUPPORT is not set
+
+#
+# Graphics support
+#
+# CONFIG_VGASTATE is not set
+# CONFIG_VIDEO_OUTPUT_CONTROL is not set
+# CONFIG_FB is not set
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+
+#
+# Display device support
+#
+# CONFIG_DISPLAY_SUPPORT is not set
+
+#
+# Console display driver support
+#
+# CONFIG_VGA_CONSOLE is not set
+CONFIG_DUMMY_CONSOLE=y
+# CONFIG_SOUND is not set
+# CONFIG_HID_SUPPORT is not set
+# CONFIG_USB_SUPPORT is not set
+# CONFIG_MMC is not set
+# CONFIG_MEMSTICK is not set
+# CONFIG_NEW_LEDS is not set
+# CONFIG_ACCESSIBILITY is not set
+CONFIG_RTC_LIB=y
+# CONFIG_RTC_CLASS is not set
+# CONFIG_DMADEVICES is not set
+# CONFIG_AUXDISPLAY is not set
+# CONFIG_UIO is not set
+
+#
+# TI VLYNQ
+#
+# CONFIG_STAGING is not set
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+# CONFIG_EXT2_FS_XATTR is not set
+# CONFIG_EXT2_FS_XIP is not set
+# CONFIG_EXT3_FS is not set
+# CONFIG_EXT4_FS is not set
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+CONFIG_FS_POSIX_ACL=y
+# CONFIG_XFS_FS is not set
+# CONFIG_GFS2_FS is not set
+# CONFIG_BTRFS_FS is not set
+# CONFIG_NILFS2_FS is not set
+CONFIG_FILE_LOCKING=y
+CONFIG_FSNOTIFY=y
+CONFIG_DNOTIFY=y
+CONFIG_INOTIFY=y
+CONFIG_INOTIFY_USER=y
+# CONFIG_QUOTA is not set
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+# CONFIG_FUSE_FS is not set
+CONFIG_GENERIC_ACL=y
+
+#
+# Caches
+#
+# CONFIG_FSCACHE is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+CONFIG_FAT_FS=y
+CONFIG_MSDOS_FS=y
+CONFIG_VFAT_FS=y
+CONFIG_FAT_DEFAULT_CODEPAGE=437
+CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_SYSCTL=y
+CONFIG_PROC_PAGE_MONITOR=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+CONFIG_TMPFS_POSIX_ACL=y
+# CONFIG_HUGETLB_PAGE is not set
+# CONFIG_CONFIGFS_FS is not set
+CONFIG_MISC_FILESYSTEMS=y
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+CONFIG_CRAMFS=y
+# CONFIG_SQUASHFS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_OMFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+CONFIG_ROMFS_FS=y
+CONFIG_ROMFS_BACKED_BY_BLOCK=y
+# CONFIG_ROMFS_BACKED_BY_MTD is not set
+# CONFIG_ROMFS_BACKED_BY_BOTH is not set
+CONFIG_ROMFS_ON_BLOCK=y
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+
+#
+# Partition Types
+#
+CONFIG_PARTITION_ADVANCED=y
+# CONFIG_ACORN_PARTITION is not set
+# CONFIG_OSF_PARTITION is not set
+# CONFIG_AMIGA_PARTITION is not set
+# CONFIG_ATARI_PARTITION is not set
+# CONFIG_MAC_PARTITION is not set
+CONFIG_MSDOS_PARTITION=y
+CONFIG_BSD_DISKLABEL=y
+# CONFIG_MINIX_SUBPARTITION is not set
+CONFIG_SOLARIS_X86_PARTITION=y
+# CONFIG_UNIXWARE_DISKLABEL is not set
+# CONFIG_LDM_PARTITION is not set
+# CONFIG_SGI_PARTITION is not set
+# CONFIG_ULTRIX_PARTITION is not set
+# CONFIG_SUN_PARTITION is not set
+# CONFIG_KARMA_PARTITION is not set
+# CONFIG_EFI_PARTITION is not set
+# CONFIG_SYSV68_PARTITION is not set
+CONFIG_NLS=y
+CONFIG_NLS_DEFAULT="iso8859-1"
+CONFIG_NLS_CODEPAGE_437=y
+# CONFIG_NLS_CODEPAGE_737 is not set
+# CONFIG_NLS_CODEPAGE_775 is not set
+# CONFIG_NLS_CODEPAGE_850 is not set
+# CONFIG_NLS_CODEPAGE_852 is not set
+# CONFIG_NLS_CODEPAGE_855 is not set
+# CONFIG_NLS_CODEPAGE_857 is not set
+# CONFIG_NLS_CODEPAGE_860 is not set
+# CONFIG_NLS_CODEPAGE_861 is not set
+# CONFIG_NLS_CODEPAGE_862 is not set
+# CONFIG_NLS_CODEPAGE_863 is not set
+# CONFIG_NLS_CODEPAGE_864 is not set
+# CONFIG_NLS_CODEPAGE_865 is not set
+# CONFIG_NLS_CODEPAGE_866 is not set
+# CONFIG_NLS_CODEPAGE_869 is not set
+# CONFIG_NLS_CODEPAGE_936 is not set
+# CONFIG_NLS_CODEPAGE_950 is not set
+# CONFIG_NLS_CODEPAGE_932 is not set
+# CONFIG_NLS_CODEPAGE_949 is not set
+# CONFIG_NLS_CODEPAGE_874 is not set
+# CONFIG_NLS_ISO8859_8 is not set
+# CONFIG_NLS_CODEPAGE_1250 is not set
+# CONFIG_NLS_CODEPAGE_1251 is not set
+CONFIG_NLS_ASCII=y
+CONFIG_NLS_ISO8859_1=y
+# CONFIG_NLS_ISO8859_2 is not set
+# CONFIG_NLS_ISO8859_3 is not set
+# CONFIG_NLS_ISO8859_4 is not set
+# CONFIG_NLS_ISO8859_5 is not set
+# CONFIG_NLS_ISO8859_6 is not set
+# CONFIG_NLS_ISO8859_7 is not set
+# CONFIG_NLS_ISO8859_9 is not set
+# CONFIG_NLS_ISO8859_13 is not set
+# CONFIG_NLS_ISO8859_14 is not set
+# CONFIG_NLS_ISO8859_15 is not set
+# CONFIG_NLS_KOI8_R is not set
+# CONFIG_NLS_KOI8_U is not set
+# CONFIG_NLS_UTF8 is not set
+
+#
+# Kernel hacking
+#
+# CONFIG_PRINTK_TIME is not set
+CONFIG_ENABLE_WARN_DEPRECATED=y
+CONFIG_ENABLE_MUST_CHECK=y
+CONFIG_FRAME_WARN=1024
+CONFIG_MAGIC_SYSRQ=y
+# CONFIG_STRIP_ASM_SYMS is not set
+# CONFIG_UNUSED_SYMBOLS is not set
+# CONFIG_DEBUG_FS is not set
+# CONFIG_HEADERS_CHECK is not set
+CONFIG_DEBUG_KERNEL=y
+# CONFIG_DEBUG_SHIRQ is not set
+CONFIG_DETECT_SOFTLOCKUP=y
+# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
+CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
+CONFIG_DETECT_HUNG_TASK=y
+# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set
+CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0
+CONFIG_SCHED_DEBUG=y
+# CONFIG_SCHEDSTATS is not set
+# CONFIG_TIMER_STATS is not set
+# CONFIG_DEBUG_OBJECTS is not set
+# CONFIG_SLUB_DEBUG_ON is not set
+# CONFIG_SLUB_STATS is not set
+# CONFIG_DEBUG_KMEMLEAK is not set
+# CONFIG_DEBUG_PREEMPT is not set
+CONFIG_DEBUG_RT_MUTEXES=y
+CONFIG_DEBUG_PI_LIST=y
+# CONFIG_RT_MUTEX_TESTER is not set
+CONFIG_DEBUG_SPINLOCK=y
+CONFIG_DEBUG_MUTEXES=y
+# CONFIG_DEBUG_LOCK_ALLOC is not set
+# CONFIG_PROVE_LOCKING is not set
+# CONFIG_LOCK_STAT is not set
+CONFIG_DEBUG_SPINLOCK_SLEEP=y
+# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
+# CONFIG_DEBUG_KOBJECT is not set
+CONFIG_DEBUG_BUGVERBOSE=y
+CONFIG_DEBUG_INFO=y
+# CONFIG_DEBUG_VM is not set
+# CONFIG_DEBUG_WRITECOUNT is not set
+CONFIG_DEBUG_MEMORY_INIT=y
+# CONFIG_DEBUG_LIST is not set
+# CONFIG_DEBUG_SG is not set
+# CONFIG_DEBUG_NOTIFIERS is not set
+# CONFIG_DEBUG_CREDENTIALS is not set
+# CONFIG_BOOT_PRINTK_DELAY is not set
+# CONFIG_RCU_TORTURE_TEST is not set
+# CONFIG_RCU_CPU_STALL_DETECTOR is not set
+# CONFIG_BACKTRACE_SELF_TEST is not set
+# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
+# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
+# CONFIG_FAULT_INJECTION is not set
+# CONFIG_LATENCYTOP is not set
+CONFIG_SYSCTL_SYSCALL_CHECK=y
+# CONFIG_PAGE_POISONING is not set
+CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_TRACING_SUPPORT=y
+CONFIG_FTRACE=y
+# CONFIG_FUNCTION_TRACER is not set
+# CONFIG_SCHED_TRACER is not set
+# CONFIG_ENABLE_DEFAULT_TRACERS is not set
+# CONFIG_BOOT_TRACER is not set
+CONFIG_BRANCH_PROFILE_NONE=y
+# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set
+# CONFIG_PROFILE_ALL_BRANCHES is not set
+# CONFIG_STACK_TRACER is not set
+# CONFIG_KMEMTRACE is not set
+# CONFIG_WORKQUEUE_TRACER is not set
+# CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_SAMPLES is not set
+CONFIG_HAVE_ARCH_KGDB=y
+# CONFIG_KGDB is not set
+CONFIG_ARM_UNWIND=y
+CONFIG_DEBUG_USER=y
+CONFIG_DEBUG_ERRORS=y
+# CONFIG_DEBUG_STACK_USAGE is not set
+CONFIG_DEBUG_LL=y
+CONFIG_EARLY_PRINTK=y
+# CONFIG_DEBUG_ICEDCC is not set
+# CONFIG_OC_ETM is not set
+CONFIG_DEBUG_S3C_UART=1
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY is not set
+# CONFIG_SECURITYFS is not set
+# CONFIG_DEFAULT_SECURITY_SELINUX is not set
+# CONFIG_DEFAULT_SECURITY_SMACK is not set
+# CONFIG_DEFAULT_SECURITY_TOMOYO is not set
+CONFIG_DEFAULT_SECURITY_DAC=y
+CONFIG_DEFAULT_SECURITY=""
+# CONFIG_CRYPTO is not set
+# CONFIG_BINARY_PRINTF is not set
+
+#
+# Library routines
+#
+CONFIG_BITREVERSE=y
+CONFIG_GENERIC_FIND_LAST_BIT=y
+CONFIG_CRC_CCITT=y
+# CONFIG_CRC16 is not set
+# CONFIG_CRC_T10DIF is not set
+# CONFIG_CRC_ITU_T is not set
+CONFIG_CRC32=y
+# CONFIG_CRC7 is not set
+# CONFIG_LIBCRC32C is not set
+CONFIG_ZLIB_INFLATE=y
+CONFIG_LZO_DECOMPRESS=y
+CONFIG_DECOMPRESS_GZIP=y
+CONFIG_DECOMPRESS_BZIP2=y
+CONFIG_DECOMPRESS_LZMA=y
+CONFIG_DECOMPRESS_LZO=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_DMA=y
diff --git a/arch/arm/include/asm/dma-mapping.h b/arch/arm/include/asm/dma-mapping.h
index 256ee1c9f51a..69ce0727edb5 100644
--- a/arch/arm/include/asm/dma-mapping.h
+++ b/arch/arm/include/asm/dma-mapping.h
@@ -128,6 +128,14 @@ static inline int dma_supported(struct device *dev, u64 mask)
 
 static inline int dma_set_mask(struct device *dev, u64 dma_mask)
 {
+#ifdef CONFIG_DMABOUNCE
+        if (dev->archdata.dmabounce) {
+                if (dma_mask >= ISA_DMA_THRESHOLD)
+                        return 0;
+                else
+                        return -EIO;
+        }
+#endif
         if (!dev->dma_mask || !dma_supported(dev, dma_mask))
                 return -EIO;
 
diff --git a/arch/arm/mach-s3c6400/include/mach/entry-macro.S b/arch/arm/include/asm/entry-macro-vic2.S
index fbd90d2cf355..3ceb85e43850 100644
--- a/arch/arm/mach-s3c6400/include/mach/entry-macro.S
+++ b/arch/arm/include/asm/entry-macro-vic2.S
@@ -1,26 +1,39 @@
-/* arch/arm/mach-s3c6400/include/mach/entry-macro.S
+/* arch/arm/include/asm/entry-macro-vic2.S
+ *
+ * Originally arch/arm/mach-s3c6400/include/mach/entry-macro.S
  *
  * Copyright 2008 Openmoko, Inc.
  * Copyright 2008 Simtec Electronics
  *      http://armlinux.simtec.co.uk/
  *      Ben Dooks <ben@simtec.co.uk>
  *
- * Low-level IRQ helper macros for the Samsung S3C64XX series
+ * Low-level IRQ helper macros for a device with two VICs
  *
  * This file is licensed under  the terms of the GNU General Public
  * License version 2. This program is licensed "as is" without any
  * warranty of any kind, whether express or implied.
 */
 
+/* This should be included from <mach/entry-macro.S> with the necessary
+ * defines for virtual addresses and IRQ bases for the two vics.
+ *
+ * The code needs the following defined:
+ *      IRQ_VIC0_BASE   IRQ number of VIC0's first IRQ
+ *      IRQ_VIC1_BASE   IRQ number of VIC1's first IRQ
+ *      VA_VIC0         Virtual address of VIC0
+ *      VA_VIC1         Virtual address of VIC1
+ *
+ * Note, code assumes VIC0's virtual address is an ARM immediate constant
+ * away from VIC1.
+*/
+
 #include <asm/hardware/vic.h>
-#include <mach/map.h>
-#include <plat/irqs.h>
 
         .macro  disable_fiq
         .endm
 
         .macro  get_irqnr_preamble, base, tmp
-        ldr     \base, =S3C_VA_VIC0
+        ldr     \base, =VA_VIC0
         .endm
 
         .macro  arch_ret_to_user, tmp1, tmp2
@@ -29,13 +42,13 @@
         .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
 
         @ check the vic0
-        mov     \irqnr, # S3C_IRQ_OFFSET + 31
+        mov     \irqnr, #IRQ_VIC0_BASE + 31
         ldr     \irqstat, [ \base, # VIC_IRQ_STATUS ]
         teq     \irqstat, #0
 
         @ otherwise try vic1
-        addeq   \tmp, \base, #(S3C_VA_VIC1 - S3C_VA_VIC0)
-        addeq   \irqnr, \irqnr, #32
+        addeq   \tmp, \base, #(VA_VIC1 - VA_VIC0)
+        addeq   \irqnr, \irqnr, #(IRQ_VIC1_BASE - IRQ_VIC0_BASE)
         ldreq   \irqstat, [ \tmp, # VIC_IRQ_STATUS ]
         teqeq   \irqstat, #0
 
diff --git a/arch/arm/include/asm/hardware/it8152.h b/arch/arm/include/asm/hardware/it8152.h
index 74b5fff7f575..6700c7fc7ebd 100644
--- a/arch/arm/include/asm/hardware/it8152.h
+++ b/arch/arm/include/asm/hardware/it8152.h
@@ -75,6 +75,18 @@ extern unsigned long it8152_base_address;
   IT8152_PD_IRQ(1)  USB (USBR)
   IT8152_PD_IRQ(0)  Audio controller (ACR)
  */
+#define IT8152_IRQ(x)   (IRQ_BOARD_END + (x))
+
+/* IRQ-sources in 3 groups - local devices, LPC (serial), and external PCI */
+#define IT8152_LD_IRQ_COUNT     9
+#define IT8152_LP_IRQ_COUNT     16
+#define IT8152_PD_IRQ_COUNT     15
+
+/* Priorities: */
+#define IT8152_PD_IRQ(i)        IT8152_IRQ(i)
+#define IT8152_LP_IRQ(i)        (IT8152_IRQ(i) + IT8152_PD_IRQ_COUNT)
+#define IT8152_LD_IRQ(i)        (IT8152_IRQ(i) + IT8152_PD_IRQ_COUNT + IT8152_LP_IRQ_COUNT)
+
 /* frequently used interrupts */
 #define IT8152_PCISERR          IT8152_PD_IRQ(14)
 #define IT8152_H2PTADR          IT8152_PD_IRQ(13)
diff --git a/arch/arm/include/asm/hardware/locomo.h b/arch/arm/include/asm/hardware/locomo.h
index 954b1be991b4..74e51d6bd93f 100644
--- a/arch/arm/include/asm/hardware/locomo.h
+++ b/arch/arm/include/asm/hardware/locomo.h
@@ -214,4 +214,8 @@ void locomo_m62332_senddata(struct locomo_dev *ldev, unsigned int dac_data, int
 /* Frontlight control */
 void locomo_frontlight_set(struct locomo_dev *dev, int duty, int vr, int bpwf);
 
+struct locomo_platform_data {
+        int     irq_base;       /* IRQ base for cascaded on-chip IRQs */
+};
+
 #endif
diff --git a/arch/arm/include/asm/hardware/sa1111.h b/arch/arm/include/asm/hardware/sa1111.h
index 5da2595759e5..92ed254c175b 100644
--- a/arch/arm/include/asm/hardware/sa1111.h
+++ b/arch/arm/include/asm/hardware/sa1111.h
@@ -578,4 +578,8 @@ void sa1111_set_io_dir(struct sa1111_dev *sadev, unsigned int bits, unsigned int
 void sa1111_set_io(struct sa1111_dev *sadev, unsigned int bits, unsigned int v);
 void sa1111_set_sleep_io(struct sa1111_dev *sadev, unsigned int bits, unsigned int v);
 
+struct sa1111_platform_data {
+        int     irq_base;       /* base for cascaded on-chip IRQs */
+};
+
 #endif  /* _ASM_ARCH_SA1111 */
diff --git a/arch/arm/include/asm/pci.h b/arch/arm/include/asm/pci.h
index 226cddd2fb65..47980118d0a5 100644
--- a/arch/arm/include/asm/pci.h
+++ b/arch/arm/include/asm/pci.h
@@ -30,17 +30,6 @@ static inline void pcibios_penalize_isa_irq(int irq, int active)
  */
 #define PCI_DMA_BUS_IS_PHYS     (1)
 
-/*
- * Whether pci_unmap_{single,page} is a nop depends upon the
- * configuration.
- */
-#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME)       dma_addr_t ADDR_NAME;
-#define DECLARE_PCI_UNMAP_LEN(LEN_NAME)         __u32 LEN_NAME;
-#define pci_unmap_addr(PTR, ADDR_NAME)          ((PTR)->ADDR_NAME)
-#define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) (((PTR)->ADDR_NAME) = (VAL))
-#define pci_unmap_len(PTR, LEN_NAME)            ((PTR)->LEN_NAME)
-#define pci_unmap_len_set(PTR, LEN_NAME, VAL)   (((PTR)->LEN_NAME) = (VAL))
-
 #ifdef CONFIG_PCI
 static inline void pci_dma_burst_advice(struct pci_dev *pdev,
                                         enum pci_dma_burst_strategy *strat,
diff --git a/arch/arm/include/asm/ptrace.h b/arch/arm/include/asm/ptrace.h
index eec6e897ceb2..9dcb11e59026 100644
--- a/arch/arm/include/asm/ptrace.h
+++ b/arch/arm/include/asm/ptrace.h
@@ -128,6 +128,8 @@ struct pt_regs {
 
 #ifdef __KERNEL__
 
+#define arch_has_single_step()  (1)
+
 #define user_mode(regs) \
         (((regs)->ARM_cpsr & 0xf) == 0)
 
diff --git a/arch/arm/include/asm/unistd.h b/arch/arm/include/asm/unistd.h
index cf9cdaa2d4d4..dd2bf53000fe 100644
--- a/arch/arm/include/asm/unistd.h
+++ b/arch/arm/include/asm/unistd.h
@@ -443,9 +443,12 @@
 #define __ARCH_WANT_SYS_SIGPROCMASK
 #define __ARCH_WANT_SYS_RT_SIGACTION
 #define __ARCH_WANT_SYS_RT_SIGSUSPEND
+#define __ARCH_WANT_SYS_OLD_MMAP
+#define __ARCH_WANT_SYS_OLD_SELECT
 
 #if !defined(CONFIG_AEABI) || defined(CONFIG_OABI_COMPAT)
 #define __ARCH_WANT_SYS_TIME
+#define __ARCH_WANT_SYS_IPC
 #define __ARCH_WANT_SYS_OLDUMOUNT
 #define __ARCH_WANT_SYS_ALARM
 #define __ARCH_WANT_SYS_UTIME
diff --git a/arch/arm/kernel/calls.S b/arch/arm/kernel/calls.S
index 9314a2d681f1..37ae301cc47c 100644
--- a/arch/arm/kernel/calls.S
+++ b/arch/arm/kernel/calls.S
@@ -91,7 +91,7 @@
                 CALL(sys_settimeofday)
 /* 80 */        CALL(sys_getgroups16)
                 CALL(sys_setgroups16)
-                CALL(OBSOLETE(old_select))      /* used by libc4 */
+                CALL(OBSOLETE(sys_old_select))  /* used by libc4 */
                 CALL(sys_symlink)
                 CALL(sys_ni_syscall)            /* was sys_lstat */
 /* 85 */        CALL(sys_readlink)
@@ -99,7 +99,7 @@
                 CALL(sys_swapon)
                 CALL(sys_reboot)
                 CALL(OBSOLETE(sys_old_readdir)) /* used by libc4 */
-/* 90 */        CALL(OBSOLETE(old_mmap))        /* used by libc4 */
+/* 90 */        CALL(OBSOLETE(sys_old_mmap))    /* used by libc4 */
                 CALL(sys_munmap)
                 CALL(sys_truncate)
                 CALL(sys_ftruncate)
diff --git a/arch/arm/kernel/ptrace.c b/arch/arm/kernel/ptrace.c
index 08f899fb76a6..3f562a7c0a99 100644
--- a/arch/arm/kernel/ptrace.c
+++ b/arch/arm/kernel/ptrace.c
@@ -452,12 +452,23 @@ void ptrace_cancel_bpt(struct task_struct *child)
                 clear_breakpoint(child, &child->thread.debug.bp[i]);
 }
 
+void user_disable_single_step(struct task_struct *task)
+{
+        task->ptrace &= ~PT_SINGLESTEP;
+        ptrace_cancel_bpt(task);
+}
+
+void user_enable_single_step(struct task_struct *task)
+{
+        task->ptrace |= PT_SINGLESTEP;
+}
+
 /*
  * Called by kernel/ptrace.c when detaching..
  */
 void ptrace_disable(struct task_struct *child)
 {
-        single_step_disable(child);
+        user_disable_single_step(child);
 }
 
 /*
@@ -753,53 +764,6 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
                         ret = ptrace_write_user(child, addr, data);
                         break;
 
-                /*
-                 * continue/restart and stop at next (return from) syscall
-                 */
-                case PTRACE_SYSCALL:
-                case PTRACE_CONT:
-                        ret = -EIO;
-                        if (!valid_signal(data))
-                                break;
-                        if (request == PTRACE_SYSCALL)
-                                set_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
-                        else
-                                clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
-                        child->exit_code = data;
-                        single_step_disable(child);
-                        wake_up_process(child);
-                        ret = 0;
-                        break;
-
-                /*
-                 * make the child exit.  Best I can do is send it a sigkill.
-                 * perhaps it should be put in the status that it wants to
-                 * exit.
-                 */
-                case PTRACE_KILL:
-                        single_step_disable(child);
-                        if (child->exit_state != EXIT_ZOMBIE) {
-                                child->exit_code = SIGKILL;
-                                wake_up_process(child);
-                        }
-                        ret = 0;
-                        break;
-
-                /*
-                 * execute single instruction.
-                 */
-                case PTRACE_SINGLESTEP:
-                        ret = -EIO;
-                        if (!valid_signal(data))
-                                break;
-                        single_step_enable(child);
-                        clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
-                        child->exit_code = data;
-                        /* give it a chance to run. */
-                        wake_up_process(child);
-                        ret = 0;
-                        break;
-
                 case PTRACE_GETREGS:
                         ret = ptrace_getregs(child, (void __user *)data);
                         break;
diff --git a/arch/arm/kernel/ptrace.h b/arch/arm/kernel/ptrace.h
index def3b6184a79..3926605b82ea 100644
--- a/arch/arm/kernel/ptrace.h
+++ b/arch/arm/kernel/ptrace.h
@@ -14,20 +14,6 @@ extern void ptrace_set_bpt(struct task_struct *);
 extern void ptrace_break(struct task_struct *, struct pt_regs *);
 
 /*
- * make sure single-step breakpoint is gone.
- */
-static inline void single_step_disable(struct task_struct *task)
-{
-        task->ptrace &= ~PT_SINGLESTEP;
-        ptrace_cancel_bpt(task);
-}
-
-static inline void single_step_enable(struct task_struct *task)
-{
-        task->ptrace |= PT_SINGLESTEP;
-}
-
-/*
  * Send SIGTRAP if we're single-stepping
  */
 static inline void single_step_trap(struct task_struct *task)
diff --git a/arch/arm/kernel/sys_arm.c b/arch/arm/kernel/sys_arm.c
index ae4027bd01bd..4350f75e578c 100644
--- a/arch/arm/kernel/sys_arm.c
+++ b/arch/arm/kernel/sys_arm.c
@@ -28,135 +28,6 @@
 #include <linux/ipc.h>
 #include <linux/uaccess.h>
 
-struct mmap_arg_struct {
-        unsigned long addr;
-        unsigned long len;
-        unsigned long prot;
-        unsigned long flags;
-        unsigned long fd;
-        unsigned long offset;
-};
-
-asmlinkage int old_mmap(struct mmap_arg_struct __user *arg)
-{
-        int error = -EFAULT;
-        struct mmap_arg_struct a;
-
-        if (copy_from_user(&a, arg, sizeof(a)))
-                goto out;
-
-        error = -EINVAL;
-        if (a.offset & ~PAGE_MASK)
-                goto out;
-
-        error = sys_mmap_pgoff(a.addr, a.len, a.prot, a.flags, a.fd, a.offset >> PAGE_SHIFT);
-out:
-        return error;
-}
-
-/*
- * Perform the select(nd, in, out, ex, tv) and mmap() system
- * calls.
- */
-
-struct sel_arg_struct {
-        unsigned long n;
-        fd_set __user *inp, *outp, *exp;
-        struct timeval __user *tvp;
-};
-
-asmlinkage int old_select(struct sel_arg_struct __user *arg)
-{
-        struct sel_arg_struct a;
-
-        if (copy_from_user(&a, arg, sizeof(a)))
-                return -EFAULT;
-        /* sys_select() does the appropriate kernel locking */
-        return sys_select(a.n, a.inp, a.outp, a.exp, a.tvp);
-}
-
-#if !defined(CONFIG_AEABI) || defined(CONFIG_OABI_COMPAT)
-/*
- * sys_ipc() is the de-multiplexer for the SysV IPC calls..
- *
- * This is really horribly ugly.
- */
-asmlinkage int sys_ipc(uint call, int first, int second, int third,
-                       void __user *ptr, long fifth)
-{
-        int version, ret;
-
-        version = call >> 16; /* hack for backward compatibility */
-        call &= 0xffff;
-
-        switch (call) {
-        case SEMOP:
-                return sys_semtimedop (first, (struct sembuf __user *)ptr, second, NULL);
-        case SEMTIMEDOP:
-                return sys_semtimedop(first, (struct sembuf __user *)ptr, second,
-                                        (const struct timespec __user *)fifth);
-
-        case SEMGET:
-                return sys_semget (first, second, third);
-        case SEMCTL: {
-                union semun fourth;
-                if (!ptr)
-                        return -EINVAL;
-                if (get_user(fourth.__pad, (void __user * __user *) ptr))
-                        return -EFAULT;
-                return sys_semctl (first, second, third, fourth);
-        }
-
-        case MSGSND:
-                return sys_msgsnd(first, (struct msgbuf __user *) ptr, 
-                                  second, third);
-        case MSGRCV:
-                switch (version) {
-                case 0: {
-                        struct ipc_kludge tmp;
-                        if (!ptr)
-                                return -EINVAL;
-                        if (copy_from_user(&tmp,(struct ipc_kludge __user *)ptr,
-                                           sizeof (tmp)))
-                                return -EFAULT;
-                        return sys_msgrcv (first, tmp.msgp, second,
-                                           tmp.msgtyp, third);
-                }
-                default:
-                        return sys_msgrcv (first,
-                                           (struct msgbuf __user *) ptr,
-                                           second, fifth, third);
-                }
-        case MSGGET:
-                return sys_msgget ((key_t) first, second);
-        case MSGCTL:
-                return sys_msgctl(first, second, (struct msqid_ds __user *)ptr);
-
-        case SHMAT:
-                switch (version) {
-                default: {
-                        ulong raddr;
-                        ret = do_shmat(first, (char __user *)ptr, second, &raddr);
-                        if (ret)
-                                return ret;
-                        return put_user(raddr, (ulong __user *)third);
-                }
-                case 1: /* Of course, we don't support iBCS2! */
-                        return -EINVAL;
-                }
-        case SHMDT: 
-                return sys_shmdt ((char __user *)ptr);
-        case SHMGET:
-                return sys_shmget (first, second, third);
-        case SHMCTL:
-                return sys_shmctl (first, second,
-                                   (struct shmid_ds __user *) ptr);
-        default:
-                return -ENOSYS;
-        }
-}
-#endif
-
 /* Fork a new task - this creates a new program thread.
  * This is called indirectly via a small wrapper
  */
diff --git a/arch/arm/kernel/sys_oabi-compat.c b/arch/arm/kernel/sys_oabi-compat.c
index d59a0cd537f0..33ff678e32f2 100644
--- a/arch/arm/kernel/sys_oabi-compat.c
+++ b/arch/arm/kernel/sys_oabi-compat.c
@@ -346,9 +346,6 @@ asmlinkage long sys_oabi_semop(int semid, struct oabi_sembuf __user *tsops,
         return sys_oabi_semtimedop(semid, tsops, nsops, NULL);
 }
 
-extern asmlinkage int sys_ipc(uint call, int first, int second, int third,
-                              void __user *ptr, long fifth);
-
 asmlinkage int sys_oabi_ipc(uint call, int first, int second, int third,
                             void __user *ptr, long fifth)
 {
diff --git a/arch/arm/kernel/unwind.c b/arch/arm/kernel/unwind.c
index 786ac2b6914a..50292cd9c120 100644
--- a/arch/arm/kernel/unwind.c
+++ b/arch/arm/kernel/unwind.c
@@ -359,7 +359,9 @@ void unwind_backtrace(struct pt_regs *regs, struct task_struct *tsk)
                 frame.fp = regs->ARM_fp;
                 frame.sp = regs->ARM_sp;
                 frame.lr = regs->ARM_lr;
-                frame.pc = regs->ARM_pc;
+                /* PC might be corrupted, use LR in that case. */
+                frame.pc = kernel_text_address(regs->ARM_pc)
+                         ? regs->ARM_pc : regs->ARM_lr;
         } else if (tsk == current) {
                 frame.fp = (unsigned long)__builtin_frame_address(0);
                 frame.sp = current_sp;
diff --git a/arch/arm/mach-at91/at91rm9200_time.c b/arch/arm/mach-at91/at91rm9200_time.c
index 309f3511aa20..2500f41d8d2d 100644
--- a/arch/arm/mach-at91/at91rm9200_time.c
+++ b/arch/arm/mach-at91/at91rm9200_time.c
@@ -58,6 +58,12 @@ static irqreturn_t at91rm9200_timer_interrupt(int irq, void *dev_id)
 {
         u32     sr = at91_sys_read(AT91_ST_SR) & irqmask;
 
+        /*
+         * irqs should be disabled here, but as the irq is shared they are only
+         * guaranteed to be off if the timer irq is registered first.
+         */
+        WARN_ON_ONCE(!irqs_disabled());
+
         /* simulate "oneshot" timer with alarm */
         if (sr & AT91_ST_ALMS) {
                 clkevt.event_handler(&clkevt);
@@ -132,24 +138,11 @@ clkevt32k_mode(enum clock_event_mode mode, struct clock_event_device *dev)
 static int
 clkevt32k_next_event(unsigned long delta, struct clock_event_device *dev)
 {
-        unsigned long   flags;
         u32             alm;
         int             status = 0;
 
         BUG_ON(delta < 2);
 
-        /* Use "raw" primitives so we behave correctly on RT kernels. */
-        raw_local_irq_save(flags);
-
-        /*
-         * According to Thomas Gleixner irqs are already disabled here.  Simply
-         * removing raw_local_irq_save above (and the matching
-         * raw_local_irq_restore) was not accepted.  See
-         * http://thread.gmane.org/gmane.linux.ports.arm.kernel/41174
-         * So for now (2008-11-20) just warn once if irqs were not disabled ...
-         */
-        WARN_ON_ONCE(!raw_irqs_disabled_flags(flags));
-
         /* The alarm IRQ uses absolute time (now+delta), not the relative
          * time (delta) in our calling convention.  Like all clockevents
          * using such "match" hardware, we have a race to defend against.
@@ -169,7 +162,6 @@ clkevt32k_next_event(unsigned long delta, struct clock_event_device *dev)
         alm += delta;
         at91_sys_write(AT91_ST_RTAR, alm);
 
-        raw_local_irq_restore(flags);
         return status;
 }
 
diff --git a/arch/arm/mach-at91/at91sam926x_time.c b/arch/arm/mach-at91/at91sam926x_time.c
index 4bd56aee4370..608a63240b64 100644
--- a/arch/arm/mach-at91/at91sam926x_time.c
+++ b/arch/arm/mach-at91/at91sam926x_time.c
@@ -62,16 +62,12 @@ static struct clocksource pit_clk = {
 static void
 pit_clkevt_mode(enum clock_event_mode mode, struct clock_event_device *dev)
 {
-        unsigned long   flags;
-
         switch (mode) {
         case CLOCK_EVT_MODE_PERIODIC:
-                /* update clocksource counter, then enable the IRQ */
-                raw_local_irq_save(flags);
+                /* update clocksource counter */
                 pit_cnt += pit_cycle * PIT_PICNT(at91_sys_read(AT91_PIT_PIVR));
                 at91_sys_write(AT91_PIT_MR, (pit_cycle - 1) | AT91_PIT_PITEN
                                 | AT91_PIT_PITIEN);
-                raw_local_irq_restore(flags);
                 break;
         case CLOCK_EVT_MODE_ONESHOT:
                 BUG();
@@ -100,6 +96,11 @@ static struct clock_event_device pit_clkevt = {
  */
 static irqreturn_t at91sam926x_pit_interrupt(int irq, void *dev_id)
 {
+        /*
+         * irqs should be disabled here, but as the irq is shared they are only
+         * guaranteed to be off if the timer irq is registered first.
+         */
+        WARN_ON_ONCE(!irqs_disabled());
 
         /* The PIT interrupt may be disabled, and is shared */
         if ((pit_clkevt.mode == CLOCK_EVT_MODE_PERIODIC)
diff --git a/arch/arm/mach-at91/include/mach/at91_mci.h b/arch/arm/mach-at91/include/mach/at91_mci.h
index 550d503a1bca..57f8ee154943 100644
--- a/arch/arm/mach-at91/include/mach/at91_mci.h
+++ b/arch/arm/mach-at91/include/mach/at91_mci.h
@@ -77,7 +77,7 @@
 
 #define AT91_MCI_BLKR           0x18            /* Block Register */
 #define         AT91_MCI_BLKR_BCNT(n)   ((0xffff & (n)) << 0)   /* Block count */
-#define         AT91_MCI_BLKR_BLKLEN(n) ((0xffff & (n)) << 16)  /* Block lenght */
+#define         AT91_MCI_BLKR_BLKLEN(n) ((0xffff & (n)) << 16)  /* Block length */
 
 #define AT91_MCI_RSPR(n)        (0x20 + ((n) * 4))      /* Response Registers 0-3 */
 #define AT91_MCR_RDR            0x30            /* Receive Data Register */
diff --git a/arch/arm/mach-davinci/include/mach/i2c.h b/arch/arm/mach-davinci/include/mach/i2c.h
index 39fdceac8414..2312d197dfb7 100644
--- a/arch/arm/mach-davinci/include/mach/i2c.h
+++ b/arch/arm/mach-davinci/include/mach/i2c.h
@@ -1,5 +1,5 @@
 /*
- * DaVinci I2C controller platfrom_device info
+ * DaVinci I2C controller platform_device info
  *
  * Author: Vladimir Barinov, MontaVista Software, Inc. <source@mvista.com>
  *
diff --git a/arch/arm/mach-dove/common.c b/arch/arm/mach-dove/common.c
index 806972a68c87..5da2cf402c81 100644
--- a/arch/arm/mach-dove/common.c
+++ b/arch/arm/mach-dove/common.c
@@ -605,7 +605,7 @@ static struct platform_device dove_xor00_channel = {
         .dev            = {
                 .dma_mask               = &dove_xor0_dmamask,
                 .coherent_dma_mask      = DMA_BIT_MASK(64),
-                .platform_data          = (void *)&dove_xor00_data,
+                .platform_data          = &dove_xor00_data,
         },
 };
 
@@ -631,7 +631,7 @@ static struct platform_device dove_xor01_channel = {
         .dev            = {
                 .dma_mask               = &dove_xor0_dmamask,
                 .coherent_dma_mask      = DMA_BIT_MASK(64),
-                .platform_data          = (void *)&dove_xor01_data,
+                .platform_data          = &dove_xor01_data,
         },
 };
 
@@ -704,7 +704,7 @@ static struct platform_device dove_xor10_channel = {
         .dev            = {
                 .dma_mask               = &dove_xor1_dmamask,
                 .coherent_dma_mask      = DMA_BIT_MASK(64),
-                .platform_data          = (void *)&dove_xor10_data,
+                .platform_data          = &dove_xor10_data,
         },
 };
 
@@ -730,7 +730,7 @@ static struct platform_device dove_xor11_channel = {
         .dev            = {
                 .dma_mask               = &dove_xor1_dmamask,
                 .coherent_dma_mask      = DMA_BIT_MASK(64),
-                .platform_data          = (void *)&dove_xor11_data,
+                .platform_data          = &dove_xor11_data,
         },
 };
 
diff --git a/arch/arm/mach-ep93xx/micro9.c b/arch/arm/mach-ep93xx/micro9.c
index f3757a1c5a10..c33360e82868 100644
--- a/arch/arm/mach-ep93xx/micro9.c
+++ b/arch/arm/mach-ep93xx/micro9.c
@@ -28,7 +28,7 @@
  *
  * Micro9-High has up to 64MB of 32-bit flash on CS1
  * Micro9-Mid has up to 64MB of either 32-bit or 16-bit flash on CS1
- * Micro9-Lite uses a seperate MTD map driver for flash support
+ * Micro9-Lite uses a separate MTD map driver for flash support
  * Micro9-Slim has up to 64MB of either 32-bit or 16-bit flash on CS1
  *************************************************************************/
 static struct physmap_flash_data micro9_flash_data;
diff --git a/arch/arm/mach-ixp4xx/common-pci.c b/arch/arm/mach-ixp4xx/common-pci.c
index c4a01594c761..e3181534c7f9 100644
--- a/arch/arm/mach-ixp4xx/common-pci.c
+++ b/arch/arm/mach-ixp4xx/common-pci.c
@@ -502,32 +502,6 @@ struct pci_bus * __devinit ixp4xx_scan_bus(int nr, struct pci_sys_data *sys)
         return pci_scan_bus(sys->busnr, &ixp4xx_ops, sys);
 }
 
-/*
- * We override these so we properly do dmabounce otherwise drivers
- * are able to set the dma_mask to 0xffffffff and we can no longer
- * trap bounces. :(
- *
- * We just return true on everyhing except for < 64MB in which case 
- * we will fail miseralby and die since we can't handle that case.
- */
-int
-pci_set_dma_mask(struct pci_dev *dev, u64 mask)
-{
-        if (mask >= SZ_64M - 1 )
-                return 0;
-
-        return -EIO;
-}
-    
-int
-pci_set_consistent_dma_mask(struct pci_dev *dev, u64 mask)
-{
-        if (mask >= SZ_64M - 1 )
-                return 0;
-
-        return -EIO;
-}
-
 EXPORT_SYMBOL(ixp4xx_pci_read);
 EXPORT_SYMBOL(ixp4xx_pci_write);
 
diff --git a/arch/arm/mach-ixp4xx/include/mach/hardware.h b/arch/arm/mach-ixp4xx/include/mach/hardware.h
index f9d1c43e4a54..f91ca6d4fbe8 100644
--- a/arch/arm/mach-ixp4xx/include/mach/hardware.h
+++ b/arch/arm/mach-ixp4xx/include/mach/hardware.h
@@ -26,11 +26,6 @@
 #define PCIBIOS_MAX_MEM         0x4BFFFFFF
 #endif
 
-/*
- * We override the standard dma-mask routines for bouncing.
- */
-#define HAVE_ARCH_PCI_SET_DMA_MASK
-
 #define pcibios_assign_all_busses()     1
 
 /* Register locations and bits */
diff --git a/arch/arm/mach-kirkwood/Kconfig b/arch/arm/mach-kirkwood/Kconfig
index f6c6196a51fa..17879a876be6 100644
--- a/arch/arm/mach-kirkwood/Kconfig
+++ b/arch/arm/mach-kirkwood/Kconfig
@@ -32,6 +32,12 @@ config MACH_SHEEVAPLUG
           Say 'Y' here if you want your kernel to support the
           Marvell SheevaPlug Reference Board.
 
+config MACH_ESATA_SHEEVAPLUG
+        bool "Marvell eSATA SheevaPlug Reference Board"
+        help
+          Say 'Y' here if you want your kernel to support the
+          Marvell eSATA SheevaPlug Reference Board.
+
 config MACH_TS219
         bool "QNAP TS-110, TS-119, TS-210, TS-219 and TS-219P Turbo NAS"
         help
@@ -46,18 +52,35 @@ config MACH_TS41X
           QNAP TS-410, TS-410U, TS-419P and TS-419U Turbo NAS
           devices.
 
+config MACH_OPENRD
+        bool
+
 config MACH_OPENRD_BASE
         bool "Marvell OpenRD Base Board"
+        select MACH_OPENRD
         help
           Say 'Y' here if you want your kernel to support the
           Marvell OpenRD Base Board.
 
+config MACH_OPENRD_CLIENT
+        bool "Marvell OpenRD Client Board"
+        select MACH_OPENRD
+        help
+          Say 'Y' here if you want your kernel to support the
+          Marvell OpenRD Client Board.
+
 config MACH_NETSPACE_V2
         bool "LaCie Network Space v2 NAS Board"
         help
           Say 'Y' here if you want your kernel to support the
           LaCie Network Space v2 NAS.
 
+config MACH_INETSPACE_V2
+        bool "LaCie Internet Space v2 NAS Board"
+        help
+          Say 'Y' here if you want your kernel to support the
+          LaCie Internet Space v2 NAS.
+
 endmenu
 
 endif
diff --git a/arch/arm/mach-kirkwood/Makefile b/arch/arm/mach-kirkwood/Makefile
index d4d7f53b0fb9..a5530e36ba3e 100644
--- a/arch/arm/mach-kirkwood/Makefile
+++ b/arch/arm/mach-kirkwood/Makefile
@@ -5,9 +5,11 @@ obj-$(CONFIG_MACH_RD88F6192_NAS)	+= rd88f6192-nas-setup.o
 obj-$(CONFIG_MACH_RD88F6281)            += rd88f6281-setup.o
 obj-$(CONFIG_MACH_MV88F6281GTW_GE)      += mv88f6281gtw_ge-setup.o
 obj-$(CONFIG_MACH_SHEEVAPLUG)           += sheevaplug-setup.o
+obj-$(CONFIG_MACH_ESATA_SHEEVAPLUG)     += sheevaplug-setup.o
 obj-$(CONFIG_MACH_TS219)                += ts219-setup.o tsx1x-common.o
 obj-$(CONFIG_MACH_TS41X)                += ts41x-setup.o tsx1x-common.o
-obj-$(CONFIG_MACH_OPENRD_BASE)          += openrd_base-setup.o
+obj-$(CONFIG_MACH_OPENRD)               += openrd-setup.o
 obj-$(CONFIG_MACH_NETSPACE_V2)          += netspace_v2-setup.o
+obj-$(CONFIG_MACH_INETSPACE_V2)         += netspace_v2-setup.o
 
 obj-$(CONFIG_CPU_IDLE)                  += cpuidle.o
diff --git a/arch/arm/mach-kirkwood/common.c b/arch/arm/mach-kirkwood/common.c
index 242dd0775343..f759ca243925 100644
--- a/arch/arm/mach-kirkwood/common.c
+++ b/arch/arm/mach-kirkwood/common.c
@@ -656,7 +656,7 @@ static struct platform_device kirkwood_xor00_channel = {
         .dev            = {
                 .dma_mask               = &kirkwood_xor_dmamask,
                 .coherent_dma_mask      = DMA_BIT_MASK(64),
-                .platform_data          = (void *)&kirkwood_xor00_data,
+                .platform_data          = &kirkwood_xor00_data,
         },
 };
 
@@ -682,7 +682,7 @@ static struct platform_device kirkwood_xor01_channel = {
         .dev            = {
                 .dma_mask               = &kirkwood_xor_dmamask,
                 .coherent_dma_mask      = DMA_BIT_MASK(64),
-                .platform_data          = (void *)&kirkwood_xor01_data,
+                .platform_data          = &kirkwood_xor01_data,
         },
 };
 
@@ -755,7 +755,7 @@ static struct platform_device kirkwood_xor10_channel = {
         .dev            = {
                 .dma_mask               = &kirkwood_xor_dmamask,
                 .coherent_dma_mask      = DMA_BIT_MASK(64),
-                .platform_data          = (void *)&kirkwood_xor10_data,
+                .platform_data          = &kirkwood_xor10_data,
         },
 };
 
@@ -781,7 +781,7 @@ static struct platform_device kirkwood_xor11_channel = {
         .dev            = {
                 .dma_mask               = &kirkwood_xor_dmamask,
                 .coherent_dma_mask      = DMA_BIT_MASK(64),
-                .platform_data          = (void *)&kirkwood_xor11_data,
+                .platform_data          = &kirkwood_xor11_data,
         },
 };
 
diff --git a/arch/arm/mach-kirkwood/netspace_v2-setup.c b/arch/arm/mach-kirkwood/netspace_v2-setup.c
index 9a064065bebe..3ae158d72681 100644
--- a/arch/arm/mach-kirkwood/netspace_v2-setup.c
+++ b/arch/arm/mach-kirkwood/netspace_v2-setup.c
@@ -182,8 +182,14 @@ static struct platform_device netspace_v2_gpio_buttons = {
 
 static struct gpio_led netspace_v2_gpio_led_pins[] = {
         {
-                .name   = "ns_v2:red:fail",
-                .gpio   = NETSPACE_V2_GPIO_RED_LED,
+                .name                   = "ns_v2:blue:sata",
+                .default_trigger        = "default-on",
+                .gpio                   = NETSPACE_V2_GPIO_BLUE_LED_CMD,
+                .active_low             = 1,
+        },
+        {
+                .name                   = "ns_v2:red:fail",
+                .gpio                   = NETSPACE_V2_GPIO_RED_LED,
         },
 };
 
@@ -202,30 +208,19 @@ static struct platform_device netspace_v2_gpio_leds = {
 
 static void __init netspace_v2_gpio_leds_init(void)
 {
-        platform_device_register(&netspace_v2_gpio_leds);
+        int err;
 
-        /*
-         * Configure the front blue LED to blink in relation with the SATA
-         * activity.
-         */
-        if (gpio_request(NETSPACE_V2_GPIO_BLUE_LED_SLOW,
-                         "SATA blue LED slow") != 0)
-                return;
-        if (gpio_direction_output(NETSPACE_V2_GPIO_BLUE_LED_SLOW, 0) != 0)
-                goto err_free_1;
-        if (gpio_request(NETSPACE_V2_GPIO_BLUE_LED_CMD,
-                         "SATA blue LED command") != 0)
-                goto err_free_1;
-        if (gpio_direction_output(NETSPACE_V2_GPIO_BLUE_LED_CMD, 0) != 0)
-                goto err_free_2;
-
-        return;
-
-err_free_2:
-        gpio_free(NETSPACE_V2_GPIO_BLUE_LED_CMD);
-err_free_1:
-        gpio_free(NETSPACE_V2_GPIO_BLUE_LED_SLOW);
-        pr_err("netspace_v2: failed to configure SATA blue LED\n");
+        /* Configure register slow_led to allow SATA activity LED blinking */
+        err = gpio_request(NETSPACE_V2_GPIO_BLUE_LED_SLOW, "blue LED slow");
+        if (err == 0) {
+                err = gpio_direction_output(NETSPACE_V2_GPIO_BLUE_LED_SLOW, 0);
+                if (err)
+                        gpio_free(NETSPACE_V2_GPIO_BLUE_LED_SLOW);
+        }
+        if (err)
+                pr_err("netspace_v2: failed to configure blue LED slow GPIO\n");
+
+        platform_device_register(&netspace_v2_gpio_leds);
 }
 
 /*****************************************************************************
@@ -314,6 +309,7 @@ static void __init netspace_v2_init(void)
                 pr_err("netspace_v2: failed to configure power-off GPIO\n");
 }
 
+#ifdef CONFIG_MACH_NETSPACE_V2
 MACHINE_START(NETSPACE_V2, "LaCie Network Space v2")
         .phys_io        = KIRKWOOD_REGS_PHYS_BASE,
         .io_pg_offst    = ((KIRKWOOD_REGS_VIRT_BASE) >> 18) & 0xfffc,
@@ -323,3 +319,16 @@ MACHINE_START(NETSPACE_V2, "LaCie Network Space v2")
         .init_irq       = kirkwood_init_irq,
         .timer          = &netspace_v2_timer,
 MACHINE_END
+#endif
+
+#ifdef CONFIG_MACH_INETSPACE_V2
+MACHINE_START(INETSPACE_V2, "LaCie Internet Space v2")
+        .phys_io        = KIRKWOOD_REGS_PHYS_BASE,
+        .io_pg_offst    = ((KIRKWOOD_REGS_VIRT_BASE) >> 18) & 0xfffc,
+        .boot_params    = 0x00000100,
+        .init_machine   = netspace_v2_init,
+        .map_io         = kirkwood_map_io,
+        .init_irq       = kirkwood_init_irq,
+        .timer          = &netspace_v2_timer,
+MACHINE_END
+#endif
diff --git a/arch/arm/mach-kirkwood/openrd-setup.c b/arch/arm/mach-kirkwood/openrd-setup.c
new file mode 100644
index 000000000000..ad3f1ec33796
--- /dev/null
+++ b/arch/arm/mach-kirkwood/openrd-setup.c
@@ -0,0 +1,118 @@
+/*
+ * arch/arm/mach-kirkwood/openrd-setup.c
+ *
+ * Marvell OpenRD (Base|Client) Board Setup
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2.  This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/mtd/nand.h>
+#include <linux/mtd/partitions.h>
+#include <linux/ata_platform.h>
+#include <linux/mv643xx_eth.h>
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+#include <mach/kirkwood.h>
+#include <plat/mvsdio.h>
+#include "common.h"
+#include "mpp.h"
+
+static struct mtd_partition openrd_nand_parts[] = {
+        {
+                .name           = "u-boot",
+                .offset         = 0,
+                .size           = SZ_1M,
+                .mask_flags     = MTD_WRITEABLE
+        }, {
+                .name           = "uImage",
+                .offset         = MTDPART_OFS_NXTBLK,
+                .size           = SZ_4M
+        }, {
+                .name           = "root",
+                .offset         = MTDPART_OFS_NXTBLK,
+                .size           = MTDPART_SIZ_FULL
+        },
+};
+
+static struct mv643xx_eth_platform_data openrd_ge00_data = {
+        .phy_addr       = MV643XX_ETH_PHY_ADDR(8),
+};
+
+static struct mv643xx_eth_platform_data openrd_ge01_data = {
+        .phy_addr       = MV643XX_ETH_PHY_ADDR(24),
+};
+
+static struct mv_sata_platform_data openrd_sata_data = {
+        .n_ports        = 2,
+};
+
+static struct mvsdio_platform_data openrd_mvsdio_data = {
+        .gpio_card_detect = 29, /* MPP29 used as SD card detect */
+};
+
+static unsigned int openrd_mpp_config[] __initdata = {
+        MPP29_GPIO,
+        0
+};
+
+static void __init openrd_init(void)
+{
+        /*
+         * Basic setup. Needs to be called early.
+         */
+        kirkwood_init();
+        kirkwood_mpp_conf(openrd_mpp_config);
+
+        kirkwood_uart0_init();
+        kirkwood_nand_init(ARRAY_AND_SIZE(openrd_nand_parts), 25);
+
+        kirkwood_ehci_init();
+
+        kirkwood_ge00_init(&openrd_ge00_data);
+        if (machine_is_openrd_client())
+                kirkwood_ge01_init(&openrd_ge01_data);
+        kirkwood_sata_init(&openrd_sata_data);
+        kirkwood_sdio_init(&openrd_mvsdio_data);
+
+        kirkwood_i2c_init();
+}
+
+static int __init openrd_pci_init(void)
+{
+        if (machine_is_openrd_base() || machine_is_openrd_client())
+                kirkwood_pcie_init();
+
+        return 0;
+}
+subsys_initcall(openrd_pci_init);
+
+#ifdef CONFIG_MACH_OPENRD_BASE
+MACHINE_START(OPENRD_BASE, "Marvell OpenRD Base Board")
+        /* Maintainer: Dhaval Vasa <dhaval.vasa@einfochips.com> */
+        .phys_io        = KIRKWOOD_REGS_PHYS_BASE,
+        .io_pg_offst    = ((KIRKWOOD_REGS_VIRT_BASE) >> 18) & 0xfffc,
+        .boot_params    = 0x00000100,
+        .init_machine   = openrd_init,
+        .map_io         = kirkwood_map_io,
+        .init_irq       = kirkwood_init_irq,
+        .timer          = &kirkwood_timer,
+MACHINE_END
+#endif
+
+#ifdef CONFIG_MACH_OPENRD_CLIENT
+MACHINE_START(OPENRD_CLIENT, "Marvell OpenRD Client Board")
+        /* Maintainer: Dhaval Vasa <dhaval.vasa@einfochips.com> */
+        .phys_io        = KIRKWOOD_REGS_PHYS_BASE,
+        .io_pg_offst    = ((KIRKWOOD_REGS_VIRT_BASE) >> 18) & 0xfffc,
+        .boot_params    = 0x00000100,
+        .init_machine   = openrd_init,
+        .map_io         = kirkwood_map_io,
+        .init_irq       = kirkwood_init_irq,
+        .timer          = &kirkwood_timer,
+MACHINE_END
+#endif
diff --git a/arch/arm/mach-kirkwood/openrd_base-setup.c b/arch/arm/mach-kirkwood/openrd_base-setup.c
deleted file mode 100644
index 77617c722299..000000000000
--- a/arch/arm/mach-kirkwood/openrd_base-setup.c
+++ /dev/null
@@ -1,96 +0,0 @@
-/*
- * arch/arm/mach-kirkwood/openrd_base-setup.c
- *
- * Marvell OpenRD Base Board Setup
- *
- * This file is licensed under the terms of the GNU General Public
- * License version 2.  This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- */
-
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/platform_device.h>
-#include <linux/mtd/partitions.h>
-#include <linux/ata_platform.h>
-#include <linux/mv643xx_eth.h>
-#include <asm/mach-types.h>
-#include <asm/mach/arch.h>
-#include <mach/kirkwood.h>
-#include <plat/mvsdio.h>
-#include "common.h"
-#include "mpp.h"
-
-static struct mtd_partition openrd_base_nand_parts[] = {
-        {
-                .name = "u-boot",
-                .offset = 0,
-                .size = SZ_1M
-        }, {
-                .name = "uImage",
-                .offset = MTDPART_OFS_NXTBLK,
-                .size = SZ_4M
-        }, {
-                .name = "root",
-                .offset = MTDPART_OFS_NXTBLK,
-                .size = MTDPART_SIZ_FULL
-        },
-};
-
-static struct mv643xx_eth_platform_data openrd_base_ge00_data = {
-        .phy_addr       = MV643XX_ETH_PHY_ADDR(8),
-};
-
-static struct mv_sata_platform_data openrd_base_sata_data = {
-        .n_ports        = 2,
-};
-
-static struct mvsdio_platform_data openrd_base_mvsdio_data = {
-        .gpio_card_detect = 29, /* MPP29 used as SD card detect */
-};
-
-static unsigned int openrd_base_mpp_config[] __initdata = {
-        MPP29_GPIO,
-        0
-};
-
-static void __init openrd_base_init(void)
-{
-        /*
-         * Basic setup. Needs to be called early.
-         */
-        kirkwood_init();
-        kirkwood_mpp_conf(openrd_base_mpp_config);
-
-        kirkwood_uart0_init();
-        kirkwood_nand_init(ARRAY_AND_SIZE(openrd_base_nand_parts), 25);
-
-        kirkwood_ehci_init();
-
-        kirkwood_ge00_init(&openrd_base_ge00_data);
-        kirkwood_sata_init(&openrd_base_sata_data);
-        kirkwood_sdio_init(&openrd_base_mvsdio_data);
-
-        kirkwood_i2c_init();
-}
-
-static int __init openrd_base_pci_init(void)
-{
-        if (machine_is_openrd_base())
-                kirkwood_pcie_init();
-
-        return 0;
- }
-subsys_initcall(openrd_base_pci_init);
-
-
-MACHINE_START(OPENRD_BASE, "Marvell OpenRD Base Board")
-        /* Maintainer: Dhaval Vasa <dhaval.vasa@einfochips.com> */
-        .phys_io        = KIRKWOOD_REGS_PHYS_BASE,
-        .io_pg_offst    = ((KIRKWOOD_REGS_VIRT_BASE) >> 18) & 0xfffc,
-        .boot_params    = 0x00000100,
-        .init_machine   = openrd_base_init,
-        .map_io         = kirkwood_map_io,
-        .init_irq       = kirkwood_init_irq,
-        .timer          = &kirkwood_timer,
-MACHINE_END
diff --git a/arch/arm/mach-kirkwood/sheevaplug-setup.c b/arch/arm/mach-kirkwood/sheevaplug-setup.c
index c7319eeac8bb..a00879d34d54 100644
--- a/arch/arm/mach-kirkwood/sheevaplug-setup.c
+++ b/arch/arm/mach-kirkwood/sheevaplug-setup.c
@@ -11,6 +11,7 @@
 #include <linux/kernel.h>
 #include <linux/init.h>
 #include <linux/platform_device.h>
+#include <linux/ata_platform.h>
 #include <linux/mtd/partitions.h>
 #include <linux/mv643xx_eth.h>
 #include <linux/gpio.h>
@@ -42,10 +43,19 @@ static struct mv643xx_eth_platform_data sheevaplug_ge00_data = {
         .phy_addr       = MV643XX_ETH_PHY_ADDR(0),
 };
 
+static struct mv_sata_platform_data sheeva_esata_sata_data = {
+        .n_ports        = 2,
+};
+
 static struct mvsdio_platform_data sheevaplug_mvsdio_data = {
         /* unfortunately the CD signal has not been connected */
 };
 
+static struct mvsdio_platform_data sheeva_esata_mvsdio_data = {
+        .gpio_write_protect = 44, /* MPP44 used as SD write protect */
+        .gpio_card_detect = 47,   /* MPP47 used as SD card detect */
+};
+
 static struct gpio_led sheevaplug_led_pins[] = {
         {
                 .name                   = "plug:green:health",
@@ -74,13 +84,26 @@ static unsigned int sheevaplug_mpp_config[] __initdata = {
         0
 };
 
+static unsigned int sheeva_esata_mpp_config[] __initdata = {
+        MPP29_GPIO,     /* USB Power Enable */
+        MPP44_GPIO,     /* SD Write Protect */
+        MPP47_GPIO,     /* SD Card Detect */
+        MPP49_GPIO,     /* LED Green */
+        0
+};
+
 static void __init sheevaplug_init(void)
 {
         /*
          * Basic setup. Needs to be called early.
          */
         kirkwood_init();
-        kirkwood_mpp_conf(sheevaplug_mpp_config);
+
+        /* setup gpio pin select */
+        if (machine_is_sheeva_esata())
+                kirkwood_mpp_conf(sheeva_esata_mpp_config);
+        else
+                kirkwood_mpp_conf(sheevaplug_mpp_config);
 
         kirkwood_uart0_init();
         kirkwood_nand_init(ARRAY_AND_SIZE(sheevaplug_nand_parts), 25);
@@ -91,11 +114,21 @@ static void __init sheevaplug_init(void)
         kirkwood_ehci_init();
 
         kirkwood_ge00_init(&sheevaplug_ge00_data);
-        kirkwood_sdio_init(&sheevaplug_mvsdio_data);
+
+        /* honor lower power consumption for plugs with out eSATA */
+        if (machine_is_sheeva_esata())
+                kirkwood_sata_init(&sheeva_esata_sata_data);
+
+        /* enable sd wp and sd cd on plugs with esata */
+        if (machine_is_sheeva_esata())
+                kirkwood_sdio_init(&sheeva_esata_mvsdio_data);
+        else
+                kirkwood_sdio_init(&sheevaplug_mvsdio_data);
 
         platform_device_register(&sheevaplug_leds);
 }
 
+#ifdef CONFIG_MACH_SHEEVAPLUG
 MACHINE_START(SHEEVAPLUG, "Marvell SheevaPlug Reference Board")
         /* Maintainer: shadi Ammouri <shadi@marvell.com> */
         .phys_io        = KIRKWOOD_REGS_PHYS_BASE,
@@ -106,3 +139,16 @@ MACHINE_START(SHEEVAPLUG, "Marvell SheevaPlug Reference Board")
         .init_irq       = kirkwood_init_irq,
         .timer          = &kirkwood_timer,
 MACHINE_END
+#endif
+
+#ifdef CONFIG_MACH_ESATA_SHEEVAPLUG
+MACHINE_START(ESATA_SHEEVAPLUG, "Marvell eSATA SheevaPlug Reference Board")
+        .phys_io        = KIRKWOOD_REGS_PHYS_BASE,
+        .io_pg_offst    = ((KIRKWOOD_REGS_VIRT_BASE) >> 18) & 0xfffc,
+        .boot_params    = 0x00000100,
+        .init_machine   = sheevaplug_init,
+        .map_io         = kirkwood_map_io,
+        .init_irq       = kirkwood_init_irq,
+        .timer          = &kirkwood_timer,
+MACHINE_END
+#endif
diff --git a/arch/arm/mach-mmp/Kconfig b/arch/arm/mach-mmp/Kconfig
index c6a564fc4a7c..6ab843eaa35b 100644
--- a/arch/arm/mach-mmp/Kconfig
+++ b/arch/arm/mach-mmp/Kconfig
@@ -1,6 +1,6 @@
 if ARCH_MMP
 
-menu "Marvell PXA168/910 Implmentations"
+menu "Marvell PXA168/910/MMP2 Implmentations"
 
 config MACH_ASPENITE
         bool "Marvell's PXA168 Aspenite Development Board"
@@ -16,6 +16,13 @@ config MACH_ZYLONITE2
           Say 'Y' here if you want to support the Marvell PXA168-based
           Zylonite2 Development Board.
 
+config MACH_AVENGERS_LITE
+        bool "Marvell's PXA168 Avengers Lite Development Board"
+        select CPU_PXA168
+        help
+          Say 'Y' here if you want to support the Marvell PXA168-based
+          Avengers Lite Development Board.
+
 config MACH_TAVOREVB
         bool "Marvell's PXA910 TavorEVB Development Board"
         select CPU_PXA910
@@ -30,6 +37,26 @@ config MACH_TTC_DKB
           Say 'Y' here if you want to support the Marvell PXA910-based
           TTC_DKB Development Board.
 
+config MACH_FLINT
+        bool "Marvell's Flint Development Platform"
+        select CPU_MMP2
+        help
+          Say 'Y' here if you want to support the Marvell MMP2-based
+          Flint Development Platform.
+          MMP2-based board can't be co-existed with PXA168-based &
+          PXA910-based development board. Since MMP2 is compatible to
+          ARMv6 architecture.
+
+config MACH_MARVELL_JASPER
+        bool "Marvell's Jasper Development Platform"
+        select CPU_MMP2
+        help
+          Say 'Y' here if you want to support the Marvell MMP2-base
+          Jasper Development Platform.
+          MMP2-based board can't be co-existed with PXA168-based &
+          PXA910-based development board. Since MMP2 is compatible to
+          ARMv6 architecture.
+
 endmenu
 
 config CPU_PXA168
@@ -44,4 +71,10 @@ config CPU_PXA910
         help
           Select code specific to PXA910
 
+config CPU_MMP2
+        bool
+        select CPU_V6
+        select CPU_32v6K
+        help
+          Select code specific to MMP2. MMP2 is ARMv6 compatible.
 endif
diff --git a/arch/arm/mach-mmp/Makefile b/arch/arm/mach-mmp/Makefile
index 6883e6584883..8b66d06739c4 100644
--- a/arch/arm/mach-mmp/Makefile
+++ b/arch/arm/mach-mmp/Makefile
@@ -2,14 +2,18 @@
 # Makefile for Marvell's PXA168 processors line
 #
 
-obj-y                           += common.o clock.o devices.o irq.o time.o
+obj-y                           += common.o clock.o devices.o time.o
 
 # SoC support
-obj-$(CONFIG_CPU_PXA168)        += pxa168.o
-obj-$(CONFIG_CPU_PXA910)        += pxa910.o
+obj-$(CONFIG_CPU_PXA168)        += pxa168.o irq-pxa168.o
+obj-$(CONFIG_CPU_PXA910)        += pxa910.o irq-pxa168.o
+obj-$(CONFIG_CPU_MMP2)          += mmp2.o irq-mmp2.o
 
 # board support
 obj-$(CONFIG_MACH_ASPENITE)     += aspenite.o
 obj-$(CONFIG_MACH_ZYLONITE2)    += aspenite.o
+obj-$(CONFIG_MACH_AVENGERS_LITE)+= avengers_lite.o
 obj-$(CONFIG_MACH_TAVOREVB)     += tavorevb.o
 obj-$(CONFIG_MACH_TTC_DKB)      += ttc_dkb.o
+obj-$(CONFIG_MACH_FLINT)        += flint.o
+obj-$(CONFIG_MACH_MARVELL_JASPER) += jasper.o
diff --git a/arch/arm/mach-mmp/avengers_lite.c b/arch/arm/mach-mmp/avengers_lite.c
new file mode 100644
index 000000000000..8c3fa5d14f4b
--- /dev/null
+++ b/arch/arm/mach-mmp/avengers_lite.c
@@ -0,0 +1,51 @@
+/*
+ *  linux/arch/arm/mach-mmp/avengers_lite.c
+ *
+ *  Support for the Marvell PXA168-based Avengers lite Development Platform.
+ *
+ *  Copyright (C) 2009-2010 Marvell International Ltd.
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License version 2 as
+ *  publishhed by the Free Software Foundation.
+ */
+
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/platform_device.h>
+
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+#include <mach/addr-map.h>
+#include <mach/mfp-pxa168.h>
+#include <mach/pxa168.h>
+#include <mach/irqs.h>
+
+
+#include "common.h"
+#include <linux/delay.h>
+
+/* Avengers lite MFP configurations */
+static unsigned long avengers_lite_pin_config_V16F[] __initdata = {
+        /* DEBUG_UART */
+        GPIO88_UART2_TXD,
+        GPIO89_UART2_RXD,
+};
+
+static void __init avengers_lite_init(void)
+{
+        mfp_config(ARRAY_AND_SIZE(avengers_lite_pin_config_V16F));
+
+        /* on-chip devices */
+        pxa168_add_uart(2);
+}
+
+MACHINE_START(AVENGERS_LITE, "PXA168 Avengers lite Development Platform")
+        .phys_io        = APB_PHYS_BASE,
+        .boot_params    = 0x00000100,
+        .io_pg_offst    = (APB_VIRT_BASE >> 18) & 0xfffc,
+        .map_io         = pxa_map_io,
+        .init_irq       = pxa168_init_irq,
+        .timer          = &pxa168_timer,
+        .init_machine   = avengers_lite_init,
+MACHINE_END
diff --git a/arch/arm/mach-mmp/common.h b/arch/arm/mach-mmp/common.h
index c33fbbc49417..b4a0ba05a0f4 100644
--- a/arch/arm/mach-mmp/common.h
+++ b/arch/arm/mach-mmp/common.h
@@ -3,11 +3,15 @@
 struct sys_timer;
 
 extern void timer_init(int irq);
+extern void mmp2_clear_pmic_int(void);
 
 extern struct sys_timer pxa168_timer;
 extern struct sys_timer pxa910_timer;
+extern struct sys_timer mmp2_timer;
 extern void __init pxa168_init_irq(void);
 extern void __init pxa910_init_irq(void);
+extern void __init mmp2_init_icu(void);
+extern void __init mmp2_init_irq(void);
 
 extern void __init icu_init_irq(void);
 extern void __init pxa_map_io(void);
diff --git a/arch/arm/mach-mmp/flint.c b/arch/arm/mach-mmp/flint.c
new file mode 100644
index 000000000000..4ec7709a3462
--- /dev/null
+++ b/arch/arm/mach-mmp/flint.c
@@ -0,0 +1,123 @@
+/*
+ *  linux/arch/arm/mach-mmp/flint.c
+ *
+ *  Support for the Marvell Flint Development Platform.
+ *
+ *  Copyright (C) 2009 Marvell International Ltd.
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License version 2 as
+ *  publishhed by the Free Software Foundation.
+ */
+
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/platform_device.h>
+#include <linux/smc91x.h>
+#include <linux/io.h>
+#include <linux/gpio.h>
+
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+#include <mach/addr-map.h>
+#include <mach/mfp-mmp2.h>
+#include <mach/mmp2.h>
+
+#include "common.h"
+
+static unsigned long flint_pin_config[] __initdata = {
+        /* UART1 */
+        GPIO45_UART1_RXD,
+        GPIO46_UART1_TXD,
+
+        /* UART2 */
+        GPIO47_UART2_RXD,
+        GPIO48_UART2_TXD,
+
+        /* SMC */
+        GPIO151_SMC_SCLK,
+        GPIO145_SMC_nCS0,
+        GPIO146_SMC_nCS1,
+        GPIO152_SMC_BE0,
+        GPIO153_SMC_BE1,
+        GPIO154_SMC_IRQ,
+        GPIO113_SMC_RDY,
+
+        /*Ethernet*/
+        GPIO155_GPIO155,
+
+        /* DFI */
+        GPIO168_DFI_D0,
+        GPIO167_DFI_D1,
+        GPIO166_DFI_D2,
+        GPIO165_DFI_D3,
+        GPIO107_DFI_D4,
+        GPIO106_DFI_D5,
+        GPIO105_DFI_D6,
+        GPIO104_DFI_D7,
+        GPIO111_DFI_D8,
+        GPIO164_DFI_D9,
+        GPIO163_DFI_D10,
+        GPIO162_DFI_D11,
+        GPIO161_DFI_D12,
+        GPIO110_DFI_D13,
+        GPIO109_DFI_D14,
+        GPIO108_DFI_D15,
+        GPIO143_ND_nCS0,
+        GPIO144_ND_nCS1,
+        GPIO147_ND_nWE,
+        GPIO148_ND_nRE,
+        GPIO150_ND_ALE,
+        GPIO149_ND_CLE,
+        GPIO112_ND_RDY0,
+        GPIO160_ND_RDY1,
+};
+
+static struct smc91x_platdata flint_smc91x_info = {
+        .flags  = SMC91X_USE_16BIT | SMC91X_NOWAIT,
+};
+
+static struct resource smc91x_resources[] = {
+        [0] = {
+                .start  = SMC_CS1_PHYS_BASE + 0x300,
+                .end    = SMC_CS1_PHYS_BASE + 0xfffff,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = gpio_to_irq(155),
+                .end    = gpio_to_irq(155),
+                .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
+        }
+};
+
+static struct platform_device smc91x_device = {
+        .name           = "smc91x",
+        .id             = 0,
+        .dev            = {
+                .platform_data = &flint_smc91x_info,
+        },
+        .num_resources  = ARRAY_SIZE(smc91x_resources),
+        .resource       = smc91x_resources,
+};
+
+static void __init flint_init(void)
+{
+        mfp_config(ARRAY_AND_SIZE(flint_pin_config));
+
+        /* on-chip devices */
+        mmp2_add_uart(1);
+        mmp2_add_uart(2);
+
+        /* off-chip devices */
+        platform_device_register(&smc91x_device);
+}
+
+MACHINE_START(FLINT, "Flint Development Platform")
+        .phys_io        = APB_PHYS_BASE,
+        .boot_params    = 0x00000100,
+        .io_pg_offst    = (APB_VIRT_BASE >> 18) & 0xfffc,
+        .map_io         = pxa_map_io,
+        .init_irq       = mmp2_init_irq,
+        .timer          = &mmp2_timer,
+        .init_machine   = flint_init,
+MACHINE_END
diff --git a/arch/arm/mach-mmp/include/mach/cputype.h b/arch/arm/mach-mmp/include/mach/cputype.h
index 25e797b09083..83b18721d933 100644
--- a/arch/arm/mach-mmp/include/mach/cputype.h
+++ b/arch/arm/mach-mmp/include/mach/cputype.h
@@ -8,6 +8,7 @@
  *
  * PXA168    A0    0x41159263   0x56158400   0x00A0A333
  * PXA910    Y0    0x41159262   0x56158000   0x00F0C910
+ * MMP2      Z0                 0x560f5811
  */
 
 #ifdef CONFIG_CPU_PXA168
@@ -24,7 +25,15 @@
 #  define __cpu_is_pxa910(id)   (0)
 #endif
 
+#ifdef CONFIG_CPU_MMP2
+#  define __cpu_is_mmp2(id)     \
+        ({ unsigned int _id = ((id) >> 8) & 0xff; _id == 0x58; })
+#else
+#  define __cpu_is_mmp2(id)     (0)
+#endif
+
 #define cpu_is_pxa168()         ({ __cpu_is_pxa168(read_cpuid_id()); })
 #define cpu_is_pxa910()         ({ __cpu_is_pxa910(read_cpuid_id()); })
+#define cpu_is_mmp2()           ({ __cpu_is_mmp2(read_cpuid_id()); })
 
 #endif /* __ASM_MACH_CPUTYPE_H */
diff --git a/arch/arm/mach-mmp/include/mach/devices.h b/arch/arm/mach-mmp/include/mach/devices.h
index 24585397217e..1fa0a492454a 100644
--- a/arch/arm/mach-mmp/include/mach/devices.h
+++ b/arch/arm/mach-mmp/include/mach/devices.h
@@ -34,4 +34,16 @@ struct pxa_device_desc pxa910_device_##_name __initdata = {		\
         .size           = _size,                                        \
         .dma            = { _dma },                                     \
 };
+
+#define MMP2_DEVICE(_name, _drv, _id, _irq, _start, _size, _dma...)     \
+struct pxa_device_desc mmp2_device_##_name __initdata = {               \
+        .dev_name       = "mmp2-" #_name,                               \
+        .drv_name       = _drv,                                         \
+        .id             = _id,                                          \
+        .irq            = IRQ_MMP2_##_irq,                              \
+        .start          = _start,                                       \
+        .size           = _size,                                        \
+        .dma            = { _dma },                                     \
+}
+
 extern int pxa_register_device(struct pxa_device_desc *, void *, size_t);
diff --git a/arch/arm/mach-mmp/include/mach/entry-macro.S b/arch/arm/mach-mmp/include/mach/entry-macro.S
index 6d3cd35478b5..c42d9d4e892d 100644
--- a/arch/arm/mach-mmp/include/mach/entry-macro.S
+++ b/arch/arm/mach-mmp/include/mach/entry-macro.S
@@ -15,7 +15,12 @@
         .endm
 
         .macro  get_irqnr_preamble, base, tmp
-        ldr     \base, =ICU_AP_IRQ_SEL_INT_NUM
+        mrc     p15, 0, \tmp, c0, c0, 0         @ CPUID
+        and     \tmp, \tmp, #0xff00
+        cmp     \tmp, #0x5800
+        ldr     \base, =ICU_VIRT_BASE
+        addne   \base, \base, #0x10c            @ PJ1 AP INT SEL register
+        addeq   \base, \base, #0x104            @ PJ4 IRQ SEL register
         .endm
 
         .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
diff --git a/arch/arm/mach-mmp/include/mach/irqs.h b/arch/arm/mach-mmp/include/mach/irqs.h
index d68871b0f28c..02701196ea03 100644
--- a/arch/arm/mach-mmp/include/mach/irqs.h
+++ b/arch/arm/mach-mmp/include/mach/irqs.h
@@ -113,10 +113,119 @@
 #define IRQ_PXA910_AP_PMU               60
 #define IRQ_PXA910_SM_INT               63      /* from PinMux */
 
-#define IRQ_GPIO_START                  64
-#define IRQ_GPIO_NUM                    128
+/*
+ * Interrupt numbers for MMP2
+ */
+#define IRQ_MMP2_NONE                   (-1)
+#define IRQ_MMP2_SSP1                   0
+#define IRQ_MMP2_SSP2                   1
+#define IRQ_MMP2_SSPA1                  2
+#define IRQ_MMP2_SSPA2                  3
+#define IRQ_MMP2_PMIC_MUX               4       /* PMIC & Charger */
+#define IRQ_MMP2_RTC_MUX                5
+#define IRQ_MMP2_TWSI1                  7
+#define IRQ_MMP2_GPU                    8
+#define IRQ_MMP2_KEYPAD                 9
+#define IRQ_MMP2_ROTARY                 10
+#define IRQ_MMP2_TRACKBALL              11
+#define IRQ_MMP2_ONEWIRE                12
+#define IRQ_MMP2_TIMER1                 13
+#define IRQ_MMP2_TIMER2                 14
+#define IRQ_MMP2_TIMER3                 15
+#define IRQ_MMP2_RIPC                   16
+#define IRQ_MMP2_TWSI_MUX               17      /* TWSI2 ~ TWSI6 */
+#define IRQ_MMP2_HDMI                   19
+#define IRQ_MMP2_SSP3                   20
+#define IRQ_MMP2_SSP4                   21
+#define IRQ_MMP2_USB_HS1                22
+#define IRQ_MMP2_USB_HS2                23
+#define IRQ_MMP2_UART3                  24
+#define IRQ_MMP2_UART1                  27
+#define IRQ_MMP2_UART2                  28
+#define IRQ_MMP2_MIPI_DSI               29
+#define IRQ_MMP2_CI2                    30
+#define IRQ_MMP2_PMU_TIMER1             31
+#define IRQ_MMP2_PMU_TIMER2             32
+#define IRQ_MMP2_PMU_TIMER3             33
+#define IRQ_MMP2_USB_FS                 34
+#define IRQ_MMP2_MISC_MUX               35
+#define IRQ_MMP2_WDT1                   36
+#define IRQ_MMP2_NAND_DMA               37
+#define IRQ_MMP2_USIM                   38
+#define IRQ_MMP2_MMC                    39
+#define IRQ_MMP2_WTM                    40
+#define IRQ_MMP2_LCD                    41
+#define IRQ_MMP2_CI                     42
+#define IRQ_MMP2_IRE                    43
+#define IRQ_MMP2_USB_OTG                44
+#define IRQ_MMP2_NAND                   45
+#define IRQ_MMP2_UART4                  46
+#define IRQ_MMP2_DMA_FIQ                47
+#define IRQ_MMP2_DMA_RIQ                48
+#define IRQ_MMP2_GPIO                   49
+#define IRQ_MMP2_SSP_MUX                51
+#define IRQ_MMP2_MMC2                   52
+#define IRQ_MMP2_MMC3                   53
+#define IRQ_MMP2_MMC4                   54
+#define IRQ_MMP2_MIPI_HSI               55
+#define IRQ_MMP2_MSP                    58
+#define IRQ_MMP2_MIPI_SLIM_DMA          59
+#define IRQ_MMP2_PJ4_FREQ_CHG           60
+#define IRQ_MMP2_MIPI_SLIM              62
+#define IRQ_MMP2_SM                     63
+
+#define IRQ_MMP2_MUX_BASE               64
+
+/* secondary interrupt of INT #4 */
+#define IRQ_MMP2_PMIC_BASE              (IRQ_MMP2_MUX_BASE)
+#define IRQ_MMP2_CHARGER                (IRQ_MMP2_PMIC_BASE + 0)
+#define IRQ_MMP2_PMIC                   (IRQ_MMP2_PMIC_BASE + 1)
+
+/* secondary interrupt of INT #5 */
+#define IRQ_MMP2_RTC_BASE               (IRQ_MMP2_PMIC_BASE + 2)
+#define IRQ_MMP2_RTC_ALARM              (IRQ_MMP2_RTC_BASE + 0)
+#define IRQ_MMP2_RTC                    (IRQ_MMP2_RTC_BASE + 1)
+
+/* secondary interrupt of INT #17 */
+#define IRQ_MMP2_TWSI_BASE              (IRQ_MMP2_RTC_BASE + 2)
+#define IRQ_MMP2_TWSI2                  (IRQ_MMP2_TWSI_BASE + 0)
+#define IRQ_MMP2_TWSI3                  (IRQ_MMP2_TWSI_BASE + 1)
+#define IRQ_MMP2_TWSI4                  (IRQ_MMP2_TWSI_BASE + 2)
+#define IRQ_MMP2_TWSI5                  (IRQ_MMP2_TWSI_BASE + 3)
+#define IRQ_MMP2_TWSI6                  (IRQ_MMP2_TWSI_BASE + 4)
+
+/* secondary interrupt of INT #35 */
+#define IRQ_MMP2_MISC_BASE              (IRQ_MMP2_TWSI_BASE + 5)
+#define IRQ_MMP2_PERF                   (IRQ_MMP2_MISC_BASE + 0)
+#define IRQ_MMP2_L2_PA_ECC              (IRQ_MMP2_MISC_BASE + 1)
+#define IRQ_MMP2_L2_ECC                 (IRQ_MMP2_MISC_BASE + 2)
+#define IRQ_MMP2_L2_UECC                (IRQ_MMP2_MISC_BASE + 3)
+#define IRQ_MMP2_DDR                    (IRQ_MMP2_MISC_BASE + 4)
+#define IRQ_MMP2_FAB0_TIMEOUT           (IRQ_MMP2_MISC_BASE + 5)
+#define IRQ_MMP2_FAB1_TIMEOUT           (IRQ_MMP2_MISC_BASE + 6)
+#define IRQ_MMP2_FAB2_TIMEOUT           (IRQ_MMP2_MISC_BASE + 7)
+#define IRQ_MMP2_THERMAL                (IRQ_MMP2_MISC_BASE + 9)
+#define IRQ_MMP2_MAIN_PMU               (IRQ_MMP2_MISC_BASE + 10)
+#define IRQ_MMP2_WDT2                   (IRQ_MMP2_MISC_BASE + 11)
+#define IRQ_MMP2_CORESIGHT              (IRQ_MMP2_MISC_BASE + 12)
+#define IRQ_MMP2_COMMTX                 (IRQ_MMP2_MISC_BASE + 13)
+#define IRQ_MMP2_COMMRX                 (IRQ_MMP2_MISC_BASE + 14)
+
+/* secondary interrupt of INT #51 */
+#define IRQ_MMP2_SSP_BASE               (IRQ_MMP2_MISC_BASE + 15)
+#define IRQ_MMP2_SSP1_SRDY              (IRQ_MMP2_SSP_BASE + 0)
+#define IRQ_MMP2_SSP3_SRDY              (IRQ_MMP2_SSP_BASE + 1)
+
+#define IRQ_MMP2_MUX_END                (IRQ_MMP2_SSP_BASE + 2)
+
+#define IRQ_GPIO_START                  128
+#define IRQ_GPIO_NUM                    192
 #define IRQ_GPIO(x)                     (IRQ_GPIO_START + (x))
 
-#define NR_IRQS         (IRQ_GPIO_START + IRQ_GPIO_NUM)
+/* Board IRQ - 64 by default, increase if not enough */
+#define IRQ_BOARD_START                 (IRQ_GPIO_START + IRQ_GPIO_NUM)
+#define IRQ_BOARD_END                   (IRQ_BOARD_START + 64)
+
+#define NR_IRQS                         (IRQ_BOARD_END)
 
 #endif /* __ASM_MACH_IRQS_H */
diff --git a/arch/arm/mach-mmp/include/mach/mfp-mmp2.h b/arch/arm/mach-mmp/include/mach/mfp-mmp2.h
new file mode 100644
index 000000000000..9f9f8143e272
--- /dev/null
+++ b/arch/arm/mach-mmp/include/mach/mfp-mmp2.h
@@ -0,0 +1,240 @@
+#ifndef __ASM_MACH_MFP_MMP2_H
+#define __ASM_MACH_MFP_MMP2_H
+
+#include <mach/mfp.h>
+
+#define MFP_DRIVE_VERY_SLOW     (0x0 << 13)
+#define MFP_DRIVE_SLOW          (0x2 << 13)
+#define MFP_DRIVE_MEDIUM        (0x4 << 13)
+#define MFP_DRIVE_FAST          (0x8 << 13)
+
+/* GPIO */
+
+/* DFI */
+#define GPIO108_DFI_D15         MFP_CFG(GPIO108, AF0)
+#define GPIO109_DFI_D14         MFP_CFG(GPIO109, AF0)
+#define GPIO110_DFI_D13         MFP_CFG(GPIO110, AF0)
+#define GPIO161_DFI_D12         MFP_CFG(GPIO161, AF0)
+#define GPIO162_DFI_D11         MFP_CFG(GPIO162, AF0)
+#define GPIO163_DFI_D10         MFP_CFG(GPIO163, AF0)
+#define GPIO164_DFI_D9          MFP_CFG(GPIO164, AF0)
+#define GPIO111_DFI_D8          MFP_CFG(GPIO111, AF0)
+#define GPIO104_DFI_D7          MFP_CFG(GPIO104, AF0)
+#define GPIO105_DFI_D6          MFP_CFG(GPIO105, AF0)
+#define GPIO106_DFI_D5          MFP_CFG(GPIO106, AF0)
+#define GPIO107_DFI_D4          MFP_CFG(GPIO107, AF0)
+#define GPIO165_DFI_D3          MFP_CFG(GPIO165, AF0)
+#define GPIO166_DFI_D2          MFP_CFG(GPIO166, AF0)
+#define GPIO167_DFI_D1          MFP_CFG(GPIO167, AF0)
+#define GPIO168_DFI_D0          MFP_CFG(GPIO168, AF0)
+#define GPIO143_ND_nCS0         MFP_CFG(GPIO143, AF0)
+#define GPIO144_ND_nCS1         MFP_CFG(GPIO144, AF0)
+#define GPIO147_ND_nWE          MFP_CFG(GPIO147, AF0)
+#define GPIO148_ND_nRE          MFP_CFG(GPIO148, AF0)
+#define GPIO150_ND_ALE          MFP_CFG(GPIO150, AF0)
+#define GPIO149_ND_CLE          MFP_CFG(GPIO149, AF0)
+#define GPIO112_ND_RDY0         MFP_CFG(GPIO112, AF0)
+#define GPIO160_ND_RDY1         MFP_CFG(GPIO160, AF0)
+
+/* Static Memory Controller */
+#define GPIO145_SMC_nCS0        MFP_CFG(GPIO145, AF0)
+#define GPIO146_SMC_nCS1        MFP_CFG(GPIO146, AF0)
+#define GPIO152_SMC_BE0         MFP_CFG(GPIO152, AF0)
+#define GPIO153_SMC_BE1         MFP_CFG(GPIO153, AF0)
+#define GPIO154_SMC_IRQ         MFP_CFG(GPIO154, AF0)
+#define GPIO113_SMC_RDY         MFP_CFG(GPIO113, AF0)
+#define GPIO151_SMC_SCLK        MFP_CFG(GPIO151, AF0)
+
+/* Ethernet */
+#define GPIO155_SM_ADVMUX       MFP_CFG(GPIO155, AF2)
+#define GPIO155_GPIO155         MFP_CFG(GPIO155, AF1)
+
+/* UART1 */
+#define GPIO45_UART1_RXD        MFP_CFG(GPIO45, AF1)
+#define GPIO46_UART1_TXD        MFP_CFG(GPIO46, AF1)
+#define GPIO29_UART1_RXD        MFP_CFG(GPIO29, AF1)
+#define GPIO30_UART1_TXD        MFP_CFG(GPIO30, AF1)
+#define GPIO31_UART1_CTS        MFP_CFG(GPIO31, AF1)
+#define GPIO32_UART1_RTS        MFP_CFG(GPIO32, AF1)
+
+/* UART2 */
+#define GPIO47_UART2_RXD        MFP_CFG(GPIO47, AF1)
+#define GPIO48_UART2_TXD        MFP_CFG(GPIO48, AF1)
+#define GPIO49_UART2_CTS        MFP_CFG(GPIO49, AF1)
+#define GPIO50_UART2_RTS        MFP_CFG(GPIO50, AF1)
+
+/* UART3 */
+#define GPIO51_UART3_RXD        MFP_CFG(GPIO51, AF1)
+#define GPIO52_UART3_TXD        MFP_CFG(GPIO52, AF1)
+#define GPIO53_UART3_CTS        MFP_CFG(GPIO53, AF1)
+#define GPIO54_UART3_RTS        MFP_CFG(GPIO54, AF1)
+
+/* MMC1 */
+#define GPIO124_MMC1_DAT7       MFP_CFG_DRV(GPIO124, AF1, FAST)
+#define GPIO125_MMC1_DAT6       MFP_CFG_DRV(GPIO125, AF1, FAST)
+#define GPIO129_MMC1_DAT5       MFP_CFG_DRV(GPIO129, AF1, FAST)
+#define GPIO130_MMC1_DAT4       MFP_CFG_DRV(GPIO130, AF1, FAST)
+#define GPIO131_MMC1_DAT3       MFP_CFG_DRV(GPIO131, AF1, FAST)
+#define GPIO132_MMC1_DAT2       MFP_CFG_DRV(GPIO132, AF1, FAST)
+#define GPIO133_MMC1_DAT1       MFP_CFG_DRV(GPIO133, AF1, FAST)
+#define GPIO134_MMC1_DAT0       MFP_CFG_DRV(GPIO134, AF1, FAST)
+#define GPIO136_MMC1_CMD        MFP_CFG_DRV(GPIO136, AF1, FAST)
+#define GPIO139_MMC1_CLK        MFP_CFG_DRV(GPIO139, AF1, FAST)
+#define GPIO140_MMC1_CD         MFP_CFG_DRV(GPIO140, AF1, FAST)
+#define GPIO141_MMC1_WP         MFP_CFG_DRV(GPIO141, AF1, FAST)
+
+/*MMC2*/
+#define GPIO37_MMC2_DAT3        MFP_CFG_DRV(GPIO37, AF1, FAST)
+#define GPIO38_MMC2_DAT2        MFP_CFG_DRV(GPIO38, AF1, FAST)
+#define GPIO39_MMC2_DAT1        MFP_CFG_DRV(GPIO39, AF1, FAST)
+#define GPIO40_MMC2_DAT0        MFP_CFG_DRV(GPIO40, AF1, FAST)
+#define GPIO41_MMC2_CMD         MFP_CFG_DRV(GPIO41, AF1, FAST)
+#define GPIO42_MMC2_CLK         MFP_CFG_DRV(GPIO42, AF1, FAST)
+
+/*MMC3*/
+#define GPIO165_MMC3_DAT7       MFP_CFG_DRV(GPIO165, AF2, FAST)
+#define GPIO162_MMC3_DAT6       MFP_CFG_DRV(GPIO162, AF2, FAST)
+#define GPIO166_MMC3_DAT5       MFP_CFG_DRV(GPIO166, AF2, FAST)
+#define GPIO163_MMC3_DAT4       MFP_CFG_DRV(GPIO163, AF2, FAST)
+#define GPIO167_MMC3_DAT3       MFP_CFG_DRV(GPIO167, AF2, FAST)
+#define GPIO164_MMC3_DAT2       MFP_CFG_DRV(GPIO164, AF2, FAST)
+#define GPIO168_MMC3_DAT1       MFP_CFG_DRV(GPIO168, AF2, FAST)
+#define GPIO111_MMC3_DAT0       MFP_CFG_DRV(GPIO111, AF2, FAST)
+#define GPIO112_MMC3_CMD        MFP_CFG_DRV(GPIO112, AF2, FAST)
+#define GPIO151_MMC3_CLK        MFP_CFG_DRV(GPIO151, AF2, FAST)
+
+/* LCD */
+#define GPIO74_LCD_FCLK         MFP_CFG_DRV(GPIO74, AF1, FAST)
+#define GPIO75_LCD_LCLK         MFP_CFG_DRV(GPIO75, AF1, FAST)
+#define GPIO76_LCD_PCLK         MFP_CFG_DRV(GPIO76, AF1, FAST)
+#define GPIO77_LCD_DENA         MFP_CFG_DRV(GPIO77, AF1, FAST)
+#define GPIO78_LCD_DD0          MFP_CFG_DRV(GPIO78, AF1, FAST)
+#define GPIO79_LCD_DD1          MFP_CFG_DRV(GPIO79, AF1, FAST)
+#define GPIO80_LCD_DD2          MFP_CFG_DRV(GPIO80, AF1, FAST)
+#define GPIO81_LCD_DD3          MFP_CFG_DRV(GPIO81, AF1, FAST)
+#define GPIO82_LCD_DD4          MFP_CFG_DRV(GPIO82, AF1, FAST)
+#define GPIO83_LCD_DD5          MFP_CFG_DRV(GPIO83, AF1, FAST)
+#define GPIO84_LCD_DD6          MFP_CFG_DRV(GPIO84, AF1, FAST)
+#define GPIO85_LCD_DD7          MFP_CFG_DRV(GPIO85, AF1, FAST)
+#define GPIO86_LCD_DD8          MFP_CFG_DRV(GPIO86, AF1, FAST)
+#define GPIO87_LCD_DD9          MFP_CFG_DRV(GPIO87, AF1, FAST)
+#define GPIO88_LCD_DD10         MFP_CFG_DRV(GPIO88, AF1, FAST)
+#define GPIO89_LCD_DD11         MFP_CFG_DRV(GPIO89, AF1, FAST)
+#define GPIO90_LCD_DD12         MFP_CFG_DRV(GPIO90, AF1, FAST)
+#define GPIO91_LCD_DD13         MFP_CFG_DRV(GPIO91, AF1, FAST)
+#define GPIO92_LCD_DD14         MFP_CFG_DRV(GPIO92, AF1, FAST)
+#define GPIO93_LCD_DD15         MFP_CFG_DRV(GPIO93, AF1, FAST)
+#define GPIO94_LCD_DD16         MFP_CFG_DRV(GPIO94, AF1, FAST)
+#define GPIO95_LCD_DD17         MFP_CFG_DRV(GPIO95, AF1, FAST)
+#define GPIO96_LCD_DD18         MFP_CFG_DRV(GPIO96, AF1, FAST)
+#define GPIO97_LCD_DD19         MFP_CFG_DRV(GPIO97, AF1, FAST)
+#define GPIO98_LCD_DD20         MFP_CFG_DRV(GPIO98, AF1, FAST)
+#define GPIO99_LCD_DD21         MFP_CFG_DRV(GPIO99, AF1, FAST)
+#define GPIO100_LCD_DD22        MFP_CFG_DRV(GPIO100, AF1, FAST)
+#define GPIO101_LCD_DD23        MFP_CFG_DRV(GPIO101, AF1, FAST)
+#define GPIO94_SPI_DCLK         MFP_CFG_DRV(GPIO94, AF3, FAST)
+#define GPIO95_SPI_CS0          MFP_CFG_DRV(GPIO95, AF3, FAST)
+#define GPIO96_SPI_DIN          MFP_CFG_DRV(GPIO96, AF3, FAST)
+#define GPIO97_SPI_DOUT         MFP_CFG_DRV(GPIO97, AF3, FAST)
+#define GPIO98_LCD_RST          MFP_CFG_DRV(GPIO98, AF0, FAST)
+
+#define GPIO114_MN_CLK_OUT      MFP_CFG_DRV(GPIO114, AF1, FAST)
+
+/*LCD TV path*/
+#define GPIO124_LCD_DD24        MFP_CFG_DRV(GPIO124, AF2, FAST)
+#define GPIO125_LCD_DD25        MFP_CFG_DRV(GPIO125, AF2, FAST)
+#define GPIO126_LCD_DD33        MFP_CFG_DRV(GPIO126, AF2, FAST)
+#define GPIO127_LCD_DD26        MFP_CFG_DRV(GPIO127, AF2, FAST)
+#define GPIO128_LCD_DD27        MFP_CFG_DRV(GPIO128, AF2, FAST)
+#define GPIO129_LCD_DD28        MFP_CFG_DRV(GPIO129, AF2, FAST)
+#define GPIO130_LCD_DD29        MFP_CFG_DRV(GPIO130, AF2, FAST)
+#define GPIO135_LCD_DD30        MFP_CFG_DRV(GPIO135, AF2, FAST)
+#define GPIO137_LCD_DD31        MFP_CFG_DRV(GPIO137, AF2, FAST)
+#define GPIO138_LCD_DD32        MFP_CFG_DRV(GPIO138, AF2, FAST)
+#define GPIO140_LCD_DD34        MFP_CFG_DRV(GPIO140, AF2, FAST)
+#define GPIO141_LCD_DD35        MFP_CFG_DRV(GPIO141, AF2, FAST)
+
+/* I2C */
+#define GPIO43_TWSI2_SCL        MFP_CFG_DRV(GPIO43, AF1, SLOW)
+#define GPIO44_TWSI2_SDA        MFP_CFG_DRV(GPIO44, AF1, SLOW)
+#define GPIO71_TWSI3_SCL        MFP_CFG_DRV(GPIO71, AF1, SLOW)
+#define GPIO72_TWSI3_SDA        MFP_CFG_DRV(GPIO72, AF1, SLOW)
+#define GPIO99_TWSI5_SCL        MFP_CFG_DRV(GPIO99, AF4, SLOW)
+#define GPIO100_TWSI5_SDA       MFP_CFG_DRV(GPIO100, AF4, SLOW)
+#define GPIO97_TWSI6_SCL        MFP_CFG_DRV(GPIO97, AF2, SLOW)
+#define GPIO98_TWSI6_SDA        MFP_CFG_DRV(GPIO98, AF2, SLOW)
+
+/* SSPA1 */
+#define GPIO24_I2S_SYSCLK       MFP_CFG(GPIO24, AF1)
+#define GPIO25_I2S_BITCLK       MFP_CFG(GPIO25, AF1)
+#define GPIO26_I2S_SYNC         MFP_CFG(GPIO26, AF1)
+#define GPIO27_I2S_DATA_OUT     MFP_CFG(GPIO27, AF1)
+#define GPIO28_I2S_SDATA_IN     MFP_CFG(GPIO28, AF1)
+#define GPIO114_I2S_MCLK        MFP_CFG(GPIO114, AF1)
+
+/* SSPA2 */
+#define GPIO33_SSPA2_CLK        MFP_CFG(GPIO33, AF1)
+#define GPIO34_SSPA2_FRM        MFP_CFG(GPIO34, AF1)
+#define GPIO35_SSPA2_TXD        MFP_CFG(GPIO35, AF1)
+#define GPIO36_SSPA2_RXD        MFP_CFG(GPIO36, AF1)
+
+/* Keypad */
+#define GPIO00_KP_MKIN0         MFP_CFG(GPIO0, AF1)
+#define GPIO01_KP_MKOUT0        MFP_CFG(GPIO1, AF1)
+#define GPIO02_KP_MKIN1         MFP_CFG(GPIO2, AF1)
+#define GPIO03_KP_MKOUT1        MFP_CFG(GPIO3, AF1)
+#define GPIO04_KP_MKIN2         MFP_CFG(GPIO4, AF1)
+#define GPIO05_KP_MKOUT2        MFP_CFG(GPIO5, AF1)
+#define GPIO06_KP_MKIN3         MFP_CFG(GPIO6, AF1)
+#define GPIO07_KP_MKOUT3        MFP_CFG(GPIO7, AF1)
+#define GPIO08_KP_MKIN4         MFP_CFG(GPIO8, AF1)
+#define GPIO09_KP_MKOUT4        MFP_CFG(GPIO9, AF1)
+#define GPIO10_KP_MKIN5         MFP_CFG(GPIO10, AF1)
+#define GPIO11_KP_MKOUT5        MFP_CFG(GPIO11, AF1)
+#define GPIO12_KP_MKIN6         MFP_CFG(GPIO12, AF1)
+#define GPIO13_KP_MKOUT6        MFP_CFG(GPIO13, AF1)
+#define GPIO14_KP_MKIN7         MFP_CFG(GPIO14, AF1)
+#define GPIO15_KP_MKOUT7        MFP_CFG(GPIO15, AF1)
+#define GPIO16_KP_DKIN0         MFP_CFG(GPIO16, AF1)
+#define GPIO17_KP_DKIN1         MFP_CFG(GPIO17, AF1)
+#define GPIO18_KP_DKIN2         MFP_CFG(GPIO18, AF1)
+#define GPIO19_KP_DKIN3         MFP_CFG(GPIO19, AF1)
+#define GPIO20_KP_DKIN4         MFP_CFG(GPIO20, AF1)
+#define GPIO21_KP_DKIN5         MFP_CFG(GPIO21, AF1)
+#define GPIO22_KP_DKIN6         MFP_CFG(GPIO22, AF1)
+#define GPIO23_KP_DKIN7         MFP_CFG(GPIO23, AF1)
+
+/* CAMERA */
+#define GPIO59_CCIC_IN7         MFP_CFG_DRV(GPIO59, AF1, FAST)
+#define GPIO60_CCIC_IN6         MFP_CFG_DRV(GPIO60, AF1, FAST)
+#define GPIO61_CCIC_IN5         MFP_CFG_DRV(GPIO61, AF1, FAST)
+#define GPIO62_CCIC_IN4         MFP_CFG_DRV(GPIO62, AF1, FAST)
+#define GPIO63_CCIC_IN3         MFP_CFG_DRV(GPIO63, AF1, FAST)
+#define GPIO64_CCIC_IN2         MFP_CFG_DRV(GPIO64, AF1, FAST)
+#define GPIO65_CCIC_IN1         MFP_CFG_DRV(GPIO65, AF1, FAST)
+#define GPIO66_CCIC_IN0         MFP_CFG_DRV(GPIO66, AF1, FAST)
+#define GPIO67_CAM_HSYNC        MFP_CFG_DRV(GPIO67, AF1, FAST)
+#define GPIO68_CAM_VSYNC        MFP_CFG_DRV(GPIO68, AF1, FAST)
+#define GPIO69_CAM_MCLK         MFP_CFG_DRV(GPIO69, AF1, FAST)
+#define GPIO70_CAM_PCLK         MFP_CFG_DRV(GPIO70, AF1, FAST)
+
+/* Wifi */
+#define GPIO45_GPIO45           MFP_CFG(GPIO45, AF0)
+#define GPIO46_GPIO46           MFP_CFG(GPIO46, AF0)
+#define GPIO21_GPIO21           MFP_CFG(GPIO21, AF0)
+#define GPIO22_GPIO22           MFP_CFG(GPIO22, AF0)
+#define GPIO55_GPIO55           MFP_CFG(GPIO55, AF0)
+#define GPIO56_GPIO56           MFP_CFG(GPIO56, AF0)
+#define GPIO57_GPIO57           MFP_CFG(GPIO57, AF0)
+#define GPIO58_GPIO58           MFP_CFG(GPIO58, AF0)
+
+/* Codec*/
+#define GPIO23_GPIO23           MFP_CFG(GPIO23, AF0)
+
+#define GPIO101_GPIO101         MFP_CFG(GPIO101, AF0)
+
+/* PMIC */
+#define PMIC_PMIC_INT           MFP_CFG(PMIC_INT, AF0)
+
+#endif /* __ASM_MACH_MFP_MMP2_H */
+
diff --git a/arch/arm/mach-mmp/include/mach/mfp-pxa168.h b/arch/arm/mach-mmp/include/mach/mfp-pxa168.h
index 3b216bf41e7f..ded43c455ec3 100644
--- a/arch/arm/mach-mmp/include/mach/mfp-pxa168.h
+++ b/arch/arm/mach-mmp/include/mach/mfp-pxa168.h
@@ -193,7 +193,9 @@
 #define GPIO32_CF_nCD1          MFP_CFG(GPIO32, AF3)
 #define GPIO33_CF_nCD2          MFP_CFG(GPIO33, AF3)
 
-/* UART1 */
+/* UART */
+#define GPIO88_UART2_TXD        MFP_CFG(GPIO88, AF2)
+#define GPIO89_UART2_RXD        MFP_CFG(GPIO89, AF2)
 #define GPIO107_UART1_TXD       MFP_CFG_DRV(GPIO107, AF1, FAST)
 #define GPIO107_UART1_RXD       MFP_CFG_DRV(GPIO107, AF2, FAST)
 #define GPIO108_UART1_RXD       MFP_CFG_DRV(GPIO108, AF1, FAST)
diff --git a/arch/arm/mach-mmp/include/mach/mmp2.h b/arch/arm/mach-mmp/include/mach/mmp2.h
new file mode 100644
index 000000000000..459f3be9cfb2
--- /dev/null
+++ b/arch/arm/mach-mmp/include/mach/mmp2.h
@@ -0,0 +1,60 @@
+#ifndef __ASM_MACH_MMP2_H
+#define __ASM_MACH_MMP2_H
+
+#include <linux/i2c.h>
+#include <mach/devices.h>
+#include <plat/i2c.h>
+
+extern struct pxa_device_desc mmp2_device_uart1;
+extern struct pxa_device_desc mmp2_device_uart2;
+extern struct pxa_device_desc mmp2_device_uart3;
+extern struct pxa_device_desc mmp2_device_uart4;
+extern struct pxa_device_desc mmp2_device_twsi1;
+extern struct pxa_device_desc mmp2_device_twsi2;
+extern struct pxa_device_desc mmp2_device_twsi3;
+extern struct pxa_device_desc mmp2_device_twsi4;
+extern struct pxa_device_desc mmp2_device_twsi5;
+extern struct pxa_device_desc mmp2_device_twsi6;
+
+static inline int mmp2_add_uart(int id)
+{
+        struct pxa_device_desc *d = NULL;
+
+        switch (id) {
+        case 1: d = &mmp2_device_uart1; break;
+        case 2: d = &mmp2_device_uart2; break;
+        case 3: d = &mmp2_device_uart3; break;
+        case 4: d = &mmp2_device_uart4; break;
+        default:
+                return -EINVAL;
+        }
+
+        return pxa_register_device(d, NULL, 0);
+}
+
+static inline int mmp2_add_twsi(int id, struct i2c_pxa_platform_data *data,
+                                  struct i2c_board_info *info, unsigned size)
+{
+        struct pxa_device_desc *d = NULL;
+        int ret;
+
+        switch (id) {
+        case 0: d = &mmp2_device_twsi1; break;
+        case 1: d = &mmp2_device_twsi2; break;
+        case 2: d = &mmp2_device_twsi3; break;
+        case 3: d = &mmp2_device_twsi4; break;
+        case 4: d = &mmp2_device_twsi5; break;
+        case 5: d = &mmp2_device_twsi6; break;
+        default:
+                return -EINVAL;
+        }
+
+        ret = i2c_register_board_info(id, info, size);
+        if (ret)
+                return ret;
+
+        return pxa_register_device(d, data, sizeof(*data));
+}
+
+#endif /* __ASM_MACH_MMP2_H */
+
diff --git a/arch/arm/mach-mmp/include/mach/regs-apbc.h b/arch/arm/mach-mmp/include/mach/regs-apbc.h
index 98ccbee4bd0c..712af03fd1af 100644
--- a/arch/arm/mach-mmp/include/mach/regs-apbc.h
+++ b/arch/arm/mach-mmp/include/mach/regs-apbc.h
@@ -69,6 +69,47 @@
 #define APBC_PXA910_ASFAR       APBC_REG(0x050)
 #define APBC_PXA910_ASSAR       APBC_REG(0x054)
 
+/*
+ * APB Clock register offsets for MMP2
+ */
+#define APBC_MMP2_RTC           APBC_REG(0x000)
+#define APBC_MMP2_TWSI1         APBC_REG(0x004)
+#define APBC_MMP2_TWSI2         APBC_REG(0x008)
+#define APBC_MMP2_TWSI3         APBC_REG(0x00c)
+#define APBC_MMP2_TWSI4         APBC_REG(0x010)
+#define APBC_MMP2_ONEWIRE       APBC_REG(0x014)
+#define APBC_MMP2_KPC           APBC_REG(0x018)
+#define APBC_MMP2_TB_ROTARY     APBC_REG(0x01c)
+#define APBC_MMP2_SW_JTAG       APBC_REG(0x020)
+#define APBC_MMP2_TIMERS        APBC_REG(0x024)
+#define APBC_MMP2_UART1         APBC_REG(0x02c)
+#define APBC_MMP2_UART2         APBC_REG(0x030)
+#define APBC_MMP2_UART3         APBC_REG(0x034)
+#define APBC_MMP2_GPIO          APBC_REG(0x038)
+#define APBC_MMP2_PWM0          APBC_REG(0x03c)
+#define APBC_MMP2_PWM1          APBC_REG(0x040)
+#define APBC_MMP2_PWM2          APBC_REG(0x044)
+#define APBC_MMP2_PWM3          APBC_REG(0x048)
+#define APBC_MMP2_SSP0          APBC_REG(0x04c)
+#define APBC_MMP2_SSP1          APBC_REG(0x050)
+#define APBC_MMP2_SSP2          APBC_REG(0x054)
+#define APBC_MMP2_SSP3          APBC_REG(0x058)
+#define APBC_MMP2_SSP4          APBC_REG(0x05c)
+#define APBC_MMP2_SSP5          APBC_REG(0x060)
+#define APBC_MMP2_AIB           APBC_REG(0x064)
+#define APBC_MMP2_ASFAR         APBC_REG(0x068)
+#define APBC_MMP2_ASSAR         APBC_REG(0x06c)
+#define APBC_MMP2_USIM          APBC_REG(0x070)
+#define APBC_MMP2_MPMU          APBC_REG(0x074)
+#define APBC_MMP2_IPC           APBC_REG(0x078)
+#define APBC_MMP2_TWSI5         APBC_REG(0x07c)
+#define APBC_MMP2_TWSI6         APBC_REG(0x080)
+#define APBC_MMP2_TWSI_INTSTS   APBC_REG(0x084)
+#define APBC_MMP2_UART4         APBC_REG(0x088)
+#define APBC_MMP2_RIPC          APBC_REG(0x08c)
+#define APBC_MMP2_THSENS1       APBC_REG(0x090) /* Thermal Sensor */
+#define APBC_MMP2_THSENS_INTSTS APBC_REG(0x0a4)
+
 /* Common APB clock register bit definitions */
 #define APBC_APBCLK     (1 << 0)  /* APB Bus Clock Enable */
 #define APBC_FNCLK      (1 << 1)  /* Functional Clock Enable */
diff --git a/arch/arm/mach-mmp/include/mach/regs-icu.h b/arch/arm/mach-mmp/include/mach/regs-icu.h
index e5f08723e0cc..f882d91894be 100644
--- a/arch/arm/mach-mmp/include/mach/regs-icu.h
+++ b/arch/arm/mach-mmp/include/mach/regs-icu.h
@@ -17,10 +17,12 @@
 #define ICU_REG(x)      (ICU_VIRT_BASE + (x))
 
 #define ICU_INT_CONF(n)         ICU_REG((n) << 2)
+#define ICU_INT_CONF_MASK       (0xf)
+
+/************ PXA168/PXA910 (MMP) *********************/
 #define ICU_INT_CONF_AP_INT     (1 << 6)
 #define ICU_INT_CONF_CP_INT     (1 << 5)
 #define ICU_INT_CONF_IRQ        (1 << 4)
-#define ICU_INT_CONF_MASK       (0xf)
 
 #define ICU_AP_FIQ_SEL_INT_NUM  ICU_REG(0x108)  /* AP FIQ Selected Interrupt */
 #define ICU_AP_IRQ_SEL_INT_NUM  ICU_REG(0x10C)  /* AP IRQ Selected Interrupt */
@@ -28,4 +30,42 @@
 #define ICU_INT_STATUS_0        ICU_REG(0x128)  /* Interrupt Stuats 0 */
 #define ICU_INT_STATUS_1        ICU_REG(0x12C)  /* Interrupt Status 1 */
 
+/************************** MMP2 ***********************/
+
+/*
+ * IRQ0/FIQ0 is routed to SP IRQ/FIQ.
+ * IRQ1 is routed to PJ4 IRQ, and IRQ2 is routes to PJ4 FIQ.
+ */
+#define ICU_INT_ROUTE_SP_IRQ            (1 << 4)
+#define ICU_INT_ROUTE_PJ4_IRQ           (1 << 5)
+#define ICU_INT_ROUTE_PJ4_FIQ           (1 << 6)
+
+#define MMP2_ICU_PJ4_IRQ_STATUS0        ICU_REG(0x138)
+#define MMP2_ICU_PJ4_IRQ_STATUS1        ICU_REG(0x13c)
+#define MMP2_ICU_PJ4_FIQ_STATUS0        ICU_REG(0x140)
+#define MMP2_ICU_PJ4_FIQ_STATUS1        ICU_REG(0x144)
+
+#define MMP2_ICU_INT4_STATUS            ICU_REG(0x150)
+#define MMP2_ICU_INT5_STATUS            ICU_REG(0x154)
+#define MMP2_ICU_INT17_STATUS           ICU_REG(0x158)
+#define MMP2_ICU_INT35_STATUS           ICU_REG(0x15c)
+#define MMP2_ICU_INT51_STATUS           ICU_REG(0x160)
+
+#define MMP2_ICU_INT4_MASK              ICU_REG(0x168)
+#define MMP2_ICU_INT5_MASK              ICU_REG(0x16C)
+#define MMP2_ICU_INT17_MASK             ICU_REG(0x170)
+#define MMP2_ICU_INT35_MASK             ICU_REG(0x174)
+#define MMP2_ICU_INT51_MASK             ICU_REG(0x178)
+
+#define MMP2_ICU_SP_IRQ_SEL             ICU_REG(0x100)
+#define MMP2_ICU_PJ4_IRQ_SEL            ICU_REG(0x104)
+#define MMP2_ICU_PJ4_FIQ_SEL            ICU_REG(0x108)
+
+#define MMP2_ICU_INVERT                 ICU_REG(0x164)
+
+#define MMP2_ICU_INV_PMIC               (1 << 0)
+#define MMP2_ICU_INV_PERF               (1 << 1)
+#define MMP2_ICU_INV_COMMTX             (1 << 2)
+#define MMP2_ICU_INV_COMMRX             (1 << 3)
+
 #endif /* __ASM_MACH_ICU_H */
diff --git a/arch/arm/mach-mmp/include/mach/uncompress.h b/arch/arm/mach-mmp/include/mach/uncompress.h
index c93d5fa5865c..a7dcc5307216 100644
--- a/arch/arm/mach-mmp/include/mach/uncompress.h
+++ b/arch/arm/mach-mmp/include/mach/uncompress.h
@@ -8,15 +8,16 @@
 
 #include <linux/serial_reg.h>
 #include <mach/addr-map.h>
+#include <asm/mach-types.h>
 
 #define UART1_BASE      (APB_PHYS_BASE + 0x36000)
 #define UART2_BASE      (APB_PHYS_BASE + 0x17000)
 #define UART3_BASE      (APB_PHYS_BASE + 0x18000)
 
+static volatile unsigned long *UART = (unsigned long *)UART2_BASE;
+
 static inline void putc(char c)
 {
-        volatile unsigned long *UART = (unsigned long *)UART2_BASE;
-
         /* UART enabled? */
         if (!(UART[UART_IER] & UART_IER_UUE))
                 return;
@@ -34,8 +35,14 @@ static inline void flush(void)
 {
 }
 
+static inline void arch_decomp_setup(void)
+{
+        if (machine_is_avengers_lite())
+                UART = (unsigned long *)UART3_BASE;
+}
+
 /*
  * nothing to do
  */
-#define arch_decomp_setup()
+
 #define arch_decomp_wdog()
diff --git a/arch/arm/mach-mmp/irq-mmp2.c b/arch/arm/mach-mmp/irq-mmp2.c
new file mode 100644
index 000000000000..cb18221c0af3
--- /dev/null
+++ b/arch/arm/mach-mmp/irq-mmp2.c
@@ -0,0 +1,154 @@
+/*
+ *  linux/arch/arm/mach-mmp/irq-mmp2.c
+ *
+ *  Generic IRQ handling, GPIO IRQ demultiplexing, etc.
+ *
+ *  Author:     Haojian Zhuang <haojian.zhuang@marvell.com>
+ *  Copyright:  Marvell International Ltd.
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License version 2 as
+ *  published by the Free Software Foundation.
+ */
+
+#include <linux/init.h>
+#include <linux/irq.h>
+#include <linux/io.h>
+
+#include <mach/regs-icu.h>
+
+#include "common.h"
+
+static void icu_mask_irq(unsigned int irq)
+{
+        uint32_t r = __raw_readl(ICU_INT_CONF(irq));
+
+        r &= ~ICU_INT_ROUTE_PJ4_IRQ;
+        __raw_writel(r, ICU_INT_CONF(irq));
+}
+
+static void icu_unmask_irq(unsigned int irq)
+{
+        uint32_t r = __raw_readl(ICU_INT_CONF(irq));
+
+        r |= ICU_INT_ROUTE_PJ4_IRQ;
+        __raw_writel(r, ICU_INT_CONF(irq));
+}
+
+static struct irq_chip icu_irq_chip = {
+        .name           = "icu_irq",
+        .mask           = icu_mask_irq,
+        .mask_ack       = icu_mask_irq,
+        .unmask         = icu_unmask_irq,
+};
+
+static void pmic_irq_ack(unsigned int irq)
+{
+        if (irq == IRQ_MMP2_PMIC)
+                mmp2_clear_pmic_int();
+}
+
+#define SECOND_IRQ_MASK(_name_, irq_base, prefix)                       \
+static void _name_##_mask_irq(unsigned int irq)                         \
+{                                                                       \
+        uint32_t r;                                                     \
+        r = __raw_readl(prefix##_MASK) | (1 << (irq - irq_base));       \
+        __raw_writel(r, prefix##_MASK);                                 \
+}
+
+#define SECOND_IRQ_UNMASK(_name_, irq_base, prefix)                     \
+static void _name_##_unmask_irq(unsigned int irq)                       \
+{                                                                       \
+        uint32_t r;                                                     \
+        r = __raw_readl(prefix##_MASK) & ~(1 << (irq - irq_base));      \
+        __raw_writel(r, prefix##_MASK);                                 \
+}
+
+#define SECOND_IRQ_DEMUX(_name_, irq_base, prefix)                      \
+static void _name_##_irq_demux(unsigned int irq, struct irq_desc *desc) \
+{                                                                       \
+        unsigned long status, mask, n;                                  \
+        mask = __raw_readl(prefix##_MASK);                              \
+        while (1) {                                                     \
+                status = __raw_readl(prefix##_STATUS) & ~mask;          \
+                if (status == 0)                                        \
+                        break;                                          \
+                n = find_first_bit(&status, BITS_PER_LONG);             \
+                while (n < BITS_PER_LONG) {                             \
+                        generic_handle_irq(irq_base + n);               \
+                        n = find_next_bit(&status, BITS_PER_LONG, n+1); \
+                }                                                       \
+        }                                                               \
+}
+
+#define SECOND_IRQ_CHIP(_name_, irq_base, prefix)                       \
+SECOND_IRQ_MASK(_name_, irq_base, prefix)                               \
+SECOND_IRQ_UNMASK(_name_, irq_base, prefix)                             \
+SECOND_IRQ_DEMUX(_name_, irq_base, prefix)                              \
+static struct irq_chip _name_##_irq_chip = {                            \
+        .name           = #_name_,                                      \
+        .mask           = _name_##_mask_irq,                            \
+        .unmask         = _name_##_unmask_irq,                          \
+}
+
+SECOND_IRQ_CHIP(pmic, IRQ_MMP2_PMIC_BASE, MMP2_ICU_INT4);
+SECOND_IRQ_CHIP(rtc,  IRQ_MMP2_RTC_BASE,  MMP2_ICU_INT5);
+SECOND_IRQ_CHIP(twsi, IRQ_MMP2_TWSI_BASE, MMP2_ICU_INT17);
+SECOND_IRQ_CHIP(misc, IRQ_MMP2_MISC_BASE, MMP2_ICU_INT35);
+SECOND_IRQ_CHIP(ssp,  IRQ_MMP2_SSP_BASE,  MMP2_ICU_INT51);
+
+static void init_mux_irq(struct irq_chip *chip, int start, int num)
+{
+        int irq;
+
+        for (irq = start; num > 0; irq++, num--) {
+                /* mask and clear the IRQ */
+                chip->mask(irq);
+                if (chip->ack)
+                        chip->ack(irq);
+
+                set_irq_chip(irq, chip);
+                set_irq_flags(irq, IRQF_VALID);
+                set_irq_handler(irq, handle_level_irq);
+        }
+}
+
+void __init mmp2_init_icu(void)
+{
+        int irq;
+
+        for (irq = 0; irq < IRQ_MMP2_MUX_BASE; irq++) {
+                icu_mask_irq(irq);
+                set_irq_chip(irq, &icu_irq_chip);
+                set_irq_flags(irq, IRQF_VALID);
+
+                switch (irq) {
+                case IRQ_MMP2_PMIC_MUX:
+                case IRQ_MMP2_RTC_MUX:
+                case IRQ_MMP2_TWSI_MUX:
+                case IRQ_MMP2_MISC_MUX:
+                case IRQ_MMP2_SSP_MUX:
+                        break;
+                default:
+                        set_irq_handler(irq, handle_level_irq);
+                        break;
+                }
+        }
+
+        /* NOTE: IRQ_MMP2_PMIC requires the PMIC MFPR register
+         * to be written to clear the interrupt
+         */
+        pmic_irq_chip.ack = pmic_irq_ack;
+
+        init_mux_irq(&pmic_irq_chip, IRQ_MMP2_PMIC_BASE, 2);
+        init_mux_irq(&rtc_irq_chip, IRQ_MMP2_RTC_BASE, 2);
+        init_mux_irq(&twsi_irq_chip, IRQ_MMP2_TWSI_BASE, 5);
+        init_mux_irq(&misc_irq_chip, IRQ_MMP2_MISC_BASE, 15);
+        init_mux_irq(&ssp_irq_chip, IRQ_MMP2_SSP_BASE, 2);
+
+        set_irq_chained_handler(IRQ_MMP2_PMIC_MUX, pmic_irq_demux);
+        set_irq_chained_handler(IRQ_MMP2_RTC_MUX, rtc_irq_demux);
+        set_irq_chained_handler(IRQ_MMP2_TWSI_MUX, twsi_irq_demux);
+        set_irq_chained_handler(IRQ_MMP2_MISC_MUX, misc_irq_demux);
+        set_irq_chained_handler(IRQ_MMP2_SSP_MUX, ssp_irq_demux);
+}
diff --git a/arch/arm/mach-mmp/irq.c b/arch/arm/mach-mmp/irq-pxa168.c
index 52ff2f065eba..52ff2f065eba 100644
--- a/arch/arm/mach-mmp/irq.c
+++ b/arch/arm/mach-mmp/irq-pxa168.c
diff --git a/arch/arm/mach-mmp/jasper.c b/arch/arm/mach-mmp/jasper.c
new file mode 100644
index 000000000000..cfd4d66ef800
--- /dev/null
+++ b/arch/arm/mach-mmp/jasper.c
@@ -0,0 +1,80 @@
+/*
+ *  linux/arch/arm/mach-mmp/jasper.c
+ *
+ *  Support for the Marvell Jasper Development Platform.
+ *
+ *  Copyright (C) 2009-2010 Marvell International Ltd.
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License version 2 as
+ *  publishhed by the Free Software Foundation.
+ */
+
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/platform_device.h>
+#include <linux/io.h>
+#include <linux/gpio.h>
+
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+#include <mach/addr-map.h>
+#include <mach/mfp-mmp2.h>
+#include <mach/mmp2.h>
+
+#include "common.h"
+
+static unsigned long jasper_pin_config[] __initdata = {
+        /* UART1 */
+        GPIO29_UART1_RXD,
+        GPIO30_UART1_TXD,
+
+        /* UART3 */
+        GPIO51_UART3_RXD,
+        GPIO52_UART3_TXD,
+
+        /* DFI */
+        GPIO168_DFI_D0,
+        GPIO167_DFI_D1,
+        GPIO166_DFI_D2,
+        GPIO165_DFI_D3,
+        GPIO107_DFI_D4,
+        GPIO106_DFI_D5,
+        GPIO105_DFI_D6,
+        GPIO104_DFI_D7,
+        GPIO111_DFI_D8,
+        GPIO164_DFI_D9,
+        GPIO163_DFI_D10,
+        GPIO162_DFI_D11,
+        GPIO161_DFI_D12,
+        GPIO110_DFI_D13,
+        GPIO109_DFI_D14,
+        GPIO108_DFI_D15,
+        GPIO143_ND_nCS0,
+        GPIO144_ND_nCS1,
+        GPIO147_ND_nWE,
+        GPIO148_ND_nRE,
+        GPIO150_ND_ALE,
+        GPIO149_ND_CLE,
+        GPIO112_ND_RDY0,
+        GPIO160_ND_RDY1,
+};
+
+static void __init jasper_init(void)
+{
+        mfp_config(ARRAY_AND_SIZE(jasper_pin_config));
+
+        /* on-chip devices */
+        mmp2_add_uart(1);
+        mmp2_add_uart(3);
+}
+
+MACHINE_START(MARVELL_JASPER, "Jasper Development Platform")
+        .phys_io        = APB_PHYS_BASE,
+        .boot_params    = 0x00000100,
+        .io_pg_offst    = (APB_VIRT_BASE >> 18) & 0xfffc,
+        .map_io         = pxa_map_io,
+        .init_irq       = mmp2_init_irq,
+        .timer          = &mmp2_timer,
+        .init_machine   = jasper_init,
+MACHINE_END
diff --git a/arch/arm/mach-mmp/mmp2.c b/arch/arm/mach-mmp/mmp2.c
new file mode 100644
index 000000000000..72eb9daeea99
--- /dev/null
+++ b/arch/arm/mach-mmp/mmp2.c
@@ -0,0 +1,123 @@
+/*
+ * linux/arch/arm/mach-mmp/mmp2.c
+ *
+ * code name MMP2
+ *
+ * Copyright (C) 2009 Marvell International Ltd.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/io.h>
+
+#include <mach/addr-map.h>
+#include <mach/regs-apbc.h>
+#include <mach/regs-apmu.h>
+#include <mach/cputype.h>
+#include <mach/irqs.h>
+#include <mach/mfp.h>
+#include <mach/gpio.h>
+#include <mach/devices.h>
+
+#include "common.h"
+#include "clock.h"
+
+#define MFPR_VIRT_BASE  (APB_VIRT_BASE + 0x1e000)
+
+#define APMASK(i)       (GPIO_REGS_VIRT + BANK_OFF(i) + 0x9c)
+
+static struct mfp_addr_map mmp2_addr_map[] __initdata = {
+        MFP_ADDR(PMIC_INT, 0x2c4),
+
+        MFP_ADDR_END,
+};
+
+void mmp2_clear_pmic_int(void)
+{
+        unsigned long mfpr_pmic, data;
+
+        mfpr_pmic = APB_VIRT_BASE + 0x1e000 + 0x2c4;
+        data = __raw_readl(mfpr_pmic);
+        __raw_writel(data | (1 << 6), mfpr_pmic);
+        __raw_writel(data, mfpr_pmic);
+}
+
+static void __init mmp2_init_gpio(void)
+{
+        int i;
+
+        /* enable GPIO clock */
+        __raw_writel(APBC_APBCLK | APBC_FNCLK, APBC_MMP2_GPIO);
+
+        /* unmask GPIO edge detection for all 6 banks -- APMASKx */
+        for (i = 0; i < 6; i++)
+                __raw_writel(0xffffffff, APMASK(i));
+
+        pxa_init_gpio(IRQ_MMP2_GPIO, 0, 167, NULL);
+}
+
+void __init mmp2_init_irq(void)
+{
+        mmp2_init_icu();
+        mmp2_init_gpio();
+}
+
+/* APB peripheral clocks */
+static APBC_CLK(uart1, MMP2_UART1, 1, 26000000);
+static APBC_CLK(uart2, MMP2_UART2, 1, 26000000);
+static APBC_CLK(uart3, MMP2_UART3, 1, 26000000);
+static APBC_CLK(uart4, MMP2_UART4, 1, 26000000);
+static APBC_CLK(twsi1, MMP2_TWSI1, 0, 26000000);
+static APBC_CLK(twsi2, MMP2_TWSI2, 0, 26000000);
+static APBC_CLK(twsi3, MMP2_TWSI3, 0, 26000000);
+static APBC_CLK(twsi4, MMP2_TWSI4, 0, 26000000);
+static APBC_CLK(twsi5, MMP2_TWSI5, 0, 26000000);
+static APBC_CLK(twsi6, MMP2_TWSI6, 0, 26000000);
+static APBC_CLK(rtc, MMP2_RTC, 0, 32768);
+
+static APMU_CLK(nand, NAND, 0xbf, 100000000);
+
+static struct clk_lookup mmp2_clkregs[] = {
+        INIT_CLKREG(&clk_uart1, "pxa2xx-uart.0", NULL),
+        INIT_CLKREG(&clk_uart2, "pxa2xx-uart.1", NULL),
+        INIT_CLKREG(&clk_uart3, "pxa2xx-uart.2", NULL),
+        INIT_CLKREG(&clk_uart4, "pxa2xx-uart.3", NULL),
+        INIT_CLKREG(&clk_twsi1, "pxa2xx-i2c.0", NULL),
+        INIT_CLKREG(&clk_twsi2, "pxa2xx-i2c.1", NULL),
+        INIT_CLKREG(&clk_twsi3, "pxa2xx-i2c.2", NULL),
+        INIT_CLKREG(&clk_twsi4, "pxa2xx-i2c.3", NULL),
+        INIT_CLKREG(&clk_twsi5, "pxa2xx-i2c.4", NULL),
+        INIT_CLKREG(&clk_twsi6, "pxa2xx-i2c.5", NULL),
+        INIT_CLKREG(&clk_nand, "pxa3xx-nand", NULL),
+};
+
+static int __init mmp2_init(void)
+{
+        if (cpu_is_mmp2()) {
+                mfp_init_base(MFPR_VIRT_BASE);
+                mfp_init_addr(mmp2_addr_map);
+                clks_register(ARRAY_AND_SIZE(mmp2_clkregs));
+        }
+
+        return 0;
+}
+postcore_initcall(mmp2_init);
+
+/* on-chip devices */
+MMP2_DEVICE(uart1, "pxa2xx-uart", 0, UART1, 0xd4030000, 0x30, 4, 5);
+MMP2_DEVICE(uart2, "pxa2xx-uart", 1, UART2, 0xd4017000, 0x30, 20, 21);
+MMP2_DEVICE(uart3, "pxa2xx-uart", 2, UART3, 0xd4018000, 0x30, 22, 23);
+MMP2_DEVICE(uart4, "pxa2xx-uart", 3, UART4, 0xd4016000, 0x30, 18, 19);
+MMP2_DEVICE(twsi1, "pxa2xx-i2c", 0, TWSI1, 0xd4011000, 0x70);
+MMP2_DEVICE(twsi2, "pxa2xx-i2c", 1, TWSI2, 0xd4031000, 0x70);
+MMP2_DEVICE(twsi3, "pxa2xx-i2c", 2, TWSI3, 0xd4032000, 0x70);
+MMP2_DEVICE(twsi4, "pxa2xx-i2c", 3, TWSI4, 0xd4033000, 0x70);
+MMP2_DEVICE(twsi5, "pxa2xx-i2c", 4, TWSI5, 0xd4033800, 0x70);
+MMP2_DEVICE(twsi6, "pxa2xx-i2c", 5, TWSI6, 0xd4034000, 0x70);
+MMP2_DEVICE(nand, "pxa3xx-nand", -1, NAND, 0xd4283000, 0x100, 28, 29);
+
diff --git a/arch/arm/mach-mmp/time.c b/arch/arm/mach-mmp/time.c
index a8400bb891e7..cf75694e9687 100644
--- a/arch/arm/mach-mmp/time.c
+++ b/arch/arm/mach-mmp/time.c
@@ -30,7 +30,10 @@
 
 #include <mach/addr-map.h>
 #include <mach/regs-timers.h>
+#include <mach/regs-apbc.h>
 #include <mach/irqs.h>
+#include <mach/cputype.h>
+#include <asm/mach/time.h>
 
 #include "clock.h"
 
@@ -158,7 +161,7 @@ static void __init timer_config(void)
 
         __raw_writel(cer & ~0x1, TIMERS_VIRT_BASE + TMR_CER); /* disable */
 
-        ccr &= TMR_CCR_CS_0(0x3);
+        ccr &= (cpu_is_mmp2()) ? TMR_CCR_CS_0(0) : TMR_CCR_CS_0(3);
         __raw_writel(ccr, TIMERS_VIRT_BASE + TMR_CCR);
 
         /* free-running mode */
@@ -197,3 +200,24 @@ void __init timer_init(int irq)
         clocksource_register(&cksrc);
         clockevents_register_device(&ckevt);
 }
+
+static void __init mmp2_timer_init(void)
+{
+        unsigned long clk_rst;
+
+        __raw_writel(APBC_APBCLK | APBC_RST, APBC_MMP2_TIMERS);
+
+        /*
+         * enable bus/functional clock, enable 6.5MHz (divider 4),
+         * release reset
+         */
+        clk_rst = APBC_APBCLK | APBC_FNCLK | APBC_FNCLKSEL(1);
+        __raw_writel(clk_rst, APBC_MMP2_TIMERS);
+
+        timer_init(IRQ_MMP2_TIMER1);
+}
+
+struct sys_timer mmp2_timer = {
+        .init   = mmp2_timer_init,
+};
+
diff --git a/arch/arm/mach-mv78xx0/Kconfig b/arch/arm/mach-mv78xx0/Kconfig
index 6fbe68fe4412..f2d309d0619e 100644
--- a/arch/arm/mach-mv78xx0/Kconfig
+++ b/arch/arm/mach-mv78xx0/Kconfig
@@ -14,6 +14,12 @@ config MACH_RD78X00_MASA
           Say 'Y' here if you want your kernel to support the
           Marvell RD-78x00-mASA Reference Design.
 
+config MACH_TERASTATION_WXL
+        bool "Buffalo WLX (Terastation Duo) NAS"
+        help
+          Say 'Y' here if you want your kernel to support the
+          Buffalo WXL Nas.
+
 endmenu
 
 endif
diff --git a/arch/arm/mach-mv78xx0/Makefile b/arch/arm/mach-mv78xx0/Makefile
index da628b7f3bb6..67a13f9bfe64 100644
--- a/arch/arm/mach-mv78xx0/Makefile
+++ b/arch/arm/mach-mv78xx0/Makefile
@@ -1,3 +1,4 @@
-obj-y                           += common.o addr-map.o irq.o pcie.o
+obj-y                           += common.o addr-map.o mpp.o irq.o pcie.o
 obj-$(CONFIG_MACH_DB78X00_BP)   += db78x00-bp-setup.o
 obj-$(CONFIG_MACH_RD78X00_MASA) += rd78x00-masa-setup.o
+obj-$(CONFIG_MACH_TERASTATION_WXL) += buffalo-wxl-setup.o
diff --git a/arch/arm/mach-mv78xx0/buffalo-wxl-setup.c b/arch/arm/mach-mv78xx0/buffalo-wxl-setup.c
new file mode 100644
index 000000000000..61e5e583603b
--- /dev/null
+++ b/arch/arm/mach-mv78xx0/buffalo-wxl-setup.c
@@ -0,0 +1,155 @@
+/*
+ * arch/arm/mach-mv78xx0/buffalo-wxl-setup.c
+ *
+ * Buffalo WXL (Terastation Duo) Setup routines
+ *
+ * sebastien requiem <sebastien@requiem.fr>
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2.  This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/ata_platform.h>
+#include <linux/mv643xx_eth.h>
+#include <linux/ethtool.h>
+#include <linux/i2c.h>
+#include <mach/mv78xx0.h>
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+#include "common.h"
+#include "mpp.h"
+
+
+/* This arch has 2 Giga Ethernet */
+
+static struct mv643xx_eth_platform_data db78x00_ge00_data = {
+        .phy_addr       = MV643XX_ETH_PHY_ADDR(0),
+};
+
+static struct mv643xx_eth_platform_data db78x00_ge01_data = {
+        .phy_addr       = MV643XX_ETH_PHY_ADDR(8),
+};
+
+
+/* 2 SATA controller supporting HotPlug */
+
+static struct mv_sata_platform_data db78x00_sata_data = {
+        .n_ports        = 2,
+};
+
+static struct i2c_board_info __initdata db78x00_i2c_rtc = {
+        I2C_BOARD_INFO("ds1338", 0x68),
+};
+
+
+static unsigned int wxl_mpp_config[] __initdata = {
+        MPP0_GE1_TXCLK,
+        MPP1_GE1_TXCTL,
+        MPP2_GE1_RXCTL,
+        MPP3_GE1_RXCLK,
+        MPP4_GE1_TXD0,
+        MPP5_GE1_TXD1,
+        MPP6_GE1_TXD2,
+        MPP7_GE1_TXD3,
+        MPP8_GE1_RXD0,
+        MPP9_GE1_RXD1,
+        MPP10_GE1_RXD2,
+        MPP11_GE1_RXD3,
+        MPP12_GPIO,
+        MPP13_SYSRST_OUTn,
+        MPP14_SATA1_ACTn,
+        MPP15_SATA0_ACTn,
+        MPP16_GPIO,
+        MPP17_GPIO,
+        MPP18_GPIO,
+        MPP19_GPIO,
+        MPP20_GPIO,
+        MPP21_GPIO,
+        MPP22_GPIO,
+        MPP23_GPIO,
+        MPP24_UA2_TXD,
+        MPP25_UA2_RXD,
+        MPP26_UA2_CTSn,
+        MPP27_UA2_RTSn,
+        MPP28_GPIO,
+        MPP29_SYSRST_OUTn,
+        MPP30_GPIO,
+        MPP31_GPIO,
+        MPP32_GPIO,
+        MPP33_GPIO,
+        MPP34_GPIO,
+        MPP35_GPIO,
+        MPP36_GPIO,
+        MPP37_GPIO,
+        MPP38_GPIO,
+        MPP39_GPIO,
+        MPP40_UNUSED,
+        MPP41_UNUSED,
+        MPP42_UNUSED,
+        MPP43_UNUSED,
+        MPP44_UNUSED,
+        MPP45_UNUSED,
+        MPP46_UNUSED,
+        MPP47_UNUSED,
+        MPP48_SATA1_ACTn,
+        MPP49_SATA0_ACTn,
+        0
+};
+
+
+static void __init wxl_init(void)
+{
+        /*
+         * Basic MV78xx0 setup. Needs to be called early.
+         */
+        mv78xx0_init();
+        mv78xx0_mpp_conf(wxl_mpp_config);
+
+        /*
+         * Partition on-chip peripherals between the two CPU cores.
+         */
+        mv78xx0_ehci0_init();
+        mv78xx0_ehci1_init();
+        mv78xx0_ehci2_init();
+        mv78xx0_ge00_init(&db78x00_ge00_data);
+        mv78xx0_ge01_init(&db78x00_ge01_data);
+        mv78xx0_sata_init(&db78x00_sata_data);
+        mv78xx0_uart0_init();
+        mv78xx0_uart1_init();
+        mv78xx0_uart2_init();
+        mv78xx0_uart3_init();
+        mv78xx0_i2c_init();
+        i2c_register_board_info(0, &db78x00_i2c_rtc, 1);
+}
+
+static int __init wxl_pci_init(void)
+{
+        if (machine_is_terastation_wxl()) {
+                /*
+                 * Assign the x16 PCIe slot on the board to CPU core
+                 * #0, and let CPU core #1 have the four x1 slots.
+                 */
+                if (mv78xx0_core_index() == 0)
+                        mv78xx0_pcie_init(0, 1);
+                else
+                        mv78xx0_pcie_init(1, 0);
+        }
+
+        return 0;
+}
+subsys_initcall(wxl_pci_init);
+
+MACHINE_START(TERASTATION_WXL, "Buffalo Nas WXL")
+        /* Maintainer: Sebastien Requiem <sebastien@requiem.fr> */
+        .phys_io        = MV78XX0_REGS_PHYS_BASE,
+        .io_pg_offst    = ((MV78XX0_REGS_VIRT_BASE) >> 18) & 0xfffc,
+        .boot_params    = 0x00000100,
+        .init_machine   = wxl_init,
+        .map_io         = mv78xx0_map_io,
+        .init_irq       = mv78xx0_init_irq,
+        .timer          = &mv78xx0_timer,
+MACHINE_END
diff --git a/arch/arm/mach-mv78xx0/mpp.c b/arch/arm/mach-mv78xx0/mpp.c
new file mode 100644
index 000000000000..354ac514eb89
--- /dev/null
+++ b/arch/arm/mach-mv78xx0/mpp.c
@@ -0,0 +1,96 @@
+/*
+ * arch/arm/mach-mv78x00/mpp.c
+ *
+ * MPP functions for Marvell MV78x00 SoCs
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2.  This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/mbus.h>
+#include <linux/io.h>
+#include <asm/gpio.h>
+#include <mach/hardware.h>
+#include "common.h"
+#include "mpp.h"
+
+static unsigned int __init mv78xx0_variant(void)
+{
+        u32 dev, rev;
+
+        mv78xx0_pcie_id(&dev, &rev);
+
+        if (dev == MV78100_DEV_ID && rev >= MV78100_REV_A0)
+                return MPP_78100_A0_MASK;
+
+        printk(KERN_ERR "MPP setup: unknown mv78x00 variant "
+                        "(dev %#x rev %#x)\n", dev, rev);
+        return 0;
+}
+
+#define MPP_CTRL(i)     (DEV_BUS_VIRT_BASE + (i) * 4)
+#define MPP_NR_REGS     (1 + MPP_MAX/8)
+
+void __init mv78xx0_mpp_conf(unsigned int *mpp_list)
+{
+        u32 mpp_ctrl[MPP_NR_REGS];
+        unsigned int variant_mask;
+        int i;
+
+        variant_mask = mv78xx0_variant();
+        if (!variant_mask)
+                return;
+
+        /* Initialize gpiolib. */
+        orion_gpio_init();
+
+        printk(KERN_DEBUG "initial MPP regs:");
+        for (i = 0; i < MPP_NR_REGS; i++) {
+                mpp_ctrl[i] = readl(MPP_CTRL(i));
+                printk(" %08x", mpp_ctrl[i]);
+        }
+        printk("\n");
+
+        while (*mpp_list) {
+                unsigned int num = MPP_NUM(*mpp_list);
+                unsigned int sel = MPP_SEL(*mpp_list);
+                int shift, gpio_mode;
+
+                if (num > MPP_MAX) {
+                        printk(KERN_ERR "mv78xx0_mpp_conf: invalid MPP "
+                                        "number (%u)\n", num);
+                        continue;
+                }
+                if (!(*mpp_list & variant_mask)) {
+                        printk(KERN_WARNING
+                                        "mv78xx0_mpp_conf: requested MPP%u config "
+                                        "unavailable on this hardware\n", num);
+                        continue;
+                }
+
+                shift = (num & 7) << 2;
+                mpp_ctrl[num / 8] &= ~(0xf << shift);
+                mpp_ctrl[num / 8] |= sel << shift;
+
+                gpio_mode = 0;
+                if (*mpp_list & MPP_INPUT_MASK)
+                        gpio_mode |= GPIO_INPUT_OK;
+                if (*mpp_list & MPP_OUTPUT_MASK)
+                        gpio_mode |= GPIO_OUTPUT_OK;
+                if (sel != 0)
+                        gpio_mode = 0;
+                orion_gpio_set_valid(num, gpio_mode);
+
+                mpp_list++;
+        }
+
+        printk(KERN_DEBUG "  final MPP regs:");
+        for (i = 0; i < MPP_NR_REGS; i++) {
+                writel(mpp_ctrl[i], MPP_CTRL(i));
+                printk(" %08x", mpp_ctrl[i]);
+        }
+        printk("\n");
+}
diff --git a/arch/arm/mach-mv78xx0/mpp.h b/arch/arm/mach-mv78xx0/mpp.h
new file mode 100644
index 000000000000..80840b781eaa
--- /dev/null
+++ b/arch/arm/mach-mv78xx0/mpp.h
@@ -0,0 +1,347 @@
+/*
+ * linux/arch/arm/mach-mv78xx0/mpp.h -- Multi Purpose Pins
+ *
+ *
+ * sebastien requiem <sebastien@requiem.fr>
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2.  This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#ifndef __MV78X00_MPP_H
+#define __MV78X00_MPP_H
+
+#define MPP(_num, _sel, _in, _out, _78100_A0) (\
+    /* MPP number */        ((_num) & 0xff) | \
+    /* MPP select value */        (((_sel) & 0xf) << 8) | \
+    /* may be input signal */    ((!!(_in)) << 12) | \
+    /* may be output signal */    ((!!(_out)) << 13) | \
+    /* available on A0 */    ((!!(_78100_A0)) << 14))
+
+#define MPP_NUM(x)    ((x) & 0xff)
+#define MPP_SEL(x)    (((x) >> 8) & 0xf)
+
+                /*   num sel  i  o  78100_A0  */
+
+#define MPP_INPUT_MASK        MPP(0, 0x0, 1, 0, 0)
+#define MPP_OUTPUT_MASK        MPP(0, 0x0, 0, 1, 0)
+
+#define MPP_78100_A0_MASK    MPP(0, 0x0, 0, 0, 1)
+
+#define MPP0_GPIO        MPP(0, 0x0, 1, 1, 1)
+#define MPP0_GE0_COL        MPP(0, 0x1, 1, 0, 1)
+#define MPP0_GE1_TXCLK        MPP(0, 0x2, 0, 1, 1)
+#define MPP0_UNUSED        MPP(0, 0x3, 0, 0, 1)
+
+#define MPP1_GPIO        MPP(1, 0x0, 1, 1, 1)
+#define MPP1_GE0_RXERR        MPP(1, 0x1, 1, 0, 1)
+#define MPP1_GE1_TXCTL        MPP(1, 0x2, 0, 1, 1)
+#define MPP1_UNUSED        MPP(1, 0x3, 0, 0, 1)
+
+#define MPP2_GPIO        MPP(2, 0x0, 1, 1, 1)
+#define MPP2_GE0_CRS        MPP(2, 0x1, 1, 0, 1)
+#define MPP2_GE1_RXCTL        MPP(2, 0x2, 1, 0, 1)
+#define MPP2_UNUSED        MPP(2, 0x3, 0, 0, 1)
+
+#define MPP3_GPIO        MPP(3, 0x0, 1, 1, 1)
+#define MPP3_GE0_TXERR        MPP(3, 0x1, 0, 1, 1)
+#define MPP3_GE1_RXCLK        MPP(3, 0x2, 1, 0, 1)
+#define MPP3_UNUSED        MPP(3, 0x3, 0, 0, 1)
+
+#define MPP4_GPIO        MPP(4, 0x0, 1, 1, 1)
+#define MPP4_GE0_TXD4        MPP(4, 0x1, 0, 1, 1)
+#define MPP4_GE1_TXD0        MPP(4, 0x2, 0, 1, 1)
+#define MPP4_UNUSED        MPP(4, 0x3, 0, 0, 1)
+
+#define MPP5_GPIO        MPP(5, 0x0, 1, 1, 1)
+#define MPP5_GE0_TXD5        MPP(5, 0x1, 0, 1, 1)
+#define MPP5_GE1_TXD1        MPP(5, 0x2, 0, 1, 1)
+#define MPP5_UNUSED        MPP(5, 0x3, 0, 0, 1)
+
+#define MPP6_GPIO        MPP(6, 0x0, 1, 1, 1)
+#define MPP6_GE0_TXD6        MPP(6, 0x1, 0, 1, 1)
+#define MPP6_GE1_TXD2        MPP(6, 0x2, 0, 1, 1)
+#define MPP6_UNUSED        MPP(6, 0x3, 0, 0, 1)
+
+#define MPP7_GPIO        MPP(7, 0x0, 1, 1, 1)
+#define MPP7_GE0_TXD7        MPP(7, 0x1, 0, 1, 1)
+#define MPP7_GE1_TXD3        MPP(7, 0x2, 0, 1, 1)
+#define MPP7_UNUSED        MPP(7, 0x3, 0, 0, 1)
+
+#define MPP8_GPIO        MPP(8, 0x0, 1, 1, 1)
+#define MPP8_GE0_RXD4        MPP(8, 0x1, 1, 0, 1)
+#define MPP8_GE1_RXD0        MPP(8, 0x2, 1, 0, 1)
+#define MPP8_UNUSED        MPP(8, 0x3, 0, 0, 1)
+
+#define MPP9_GPIO        MPP(9, 0x0, 1, 1, 1)
+#define MPP9_GE0_RXD5        MPP(9, 0x1, 1, 0, 1)
+#define MPP9_GE1_RXD1        MPP(9, 0x2, 1, 0, 1)
+#define MPP9_UNUSED        MPP(9, 0x3, 0, 0, 1)
+
+#define MPP10_GPIO        MPP(10, 0x0, 1, 1, 1)
+#define MPP10_GE0_RXD6        MPP(10, 0x1, 1, 0, 1)
+#define MPP10_GE1_RXD2        MPP(10, 0x2, 1, 0, 1)
+#define MPP10_UNUSED        MPP(10, 0x3, 0, 0, 1)
+
+#define MPP11_GPIO        MPP(11, 0x0, 1, 1, 1)
+#define MPP11_GE0_RXD7        MPP(11, 0x1, 1, 0, 1)
+#define MPP11_GE1_RXD3        MPP(11, 0x2, 1, 0, 1)
+#define MPP11_UNUSED        MPP(11, 0x3, 0, 0, 1)
+
+#define MPP12_GPIO        MPP(12, 0x0, 1, 1, 1)
+#define MPP12_M_BB        MPP(12, 0x3, 1, 0, 1)
+#define MPP12_UA0_CTSn        MPP(12, 0x4, 1, 0, 1)
+#define MPP12_NAND_FLASH_REn0    MPP(12, 0x5, 0, 1, 1)
+#define MPP12_TDM0_SCSn        MPP(12, 0X6, 0, 1, 1)
+#define MPP12_UNUSED        MPP(12, 0x1, 0, 0, 1)
+
+#define MPP13_GPIO        MPP(13, 0x0, 1, 1, 1)
+#define MPP13_SYSRST_OUTn    MPP(13, 0x3, 0, 1, 1)
+#define MPP13_UA0_RTSn        MPP(13, 0x4, 0, 1, 1)
+#define MPP13_NAN_FLASH_WEn0    MPP(13, 0x5, 0, 1, 1)
+#define MPP13_TDM_SCLK        MPP(13, 0x6, 0, 1, 1)
+#define MPP13_UNUSED        MPP(13, 0x1, 0, 0, 1)
+
+#define MPP14_GPIO        MPP(14, 0x0, 1, 1, 1)
+#define MPP14_SATA1_ACTn    MPP(14, 0x3, 0, 1, 1)
+#define MPP14_UA1_CTSn        MPP(14, 0x4, 1, 0, 1)
+#define MPP14_NAND_FLASH_REn1    MPP(14, 0x5, 0, 1, 1)
+#define MPP14_TDM_SMOSI        MPP(14, 0x6, 0, 1, 1)
+#define MPP14_UNUSED        MPP(14, 0x1, 0, 0, 1)
+
+#define MPP15_GPIO        MPP(15, 0x0, 1, 1, 1)
+#define MPP15_SATA0_ACTn    MPP(15, 0x3, 0, 1, 1)
+#define MPP15_UA1_RTSn        MPP(15, 0x4, 0, 1, 1)
+#define MPP15_NAND_FLASH_WEn1    MPP(15, 0x5, 0, 1, 1)
+#define MPP15_TDM_SMISO        MPP(15, 0x6, 1, 0, 1)
+#define MPP15_UNUSED        MPP(15, 0x1, 0, 0, 1)
+
+#define MPP16_GPIO        MPP(16, 0x0, 1, 1, 1)
+#define MPP16_SATA1_PRESENTn    MPP(16, 0x3, 0, 1, 1)
+#define MPP16_UA2_TXD        MPP(16, 0x4, 0, 1, 1)
+#define MPP16_NAND_FLASH_REn3    MPP(16, 0x5, 0, 1, 1)
+#define MPP16_TDM_INTn        MPP(16, 0x6, 1, 0, 1)
+#define MPP16_UNUSED        MPP(16, 0x1, 0, 0, 1)
+
+
+#define MPP17_GPIO        MPP(17, 0x0, 1, 1, 1)
+#define MPP17_SATA0_PRESENTn    MPP(17, 0x3, 0, 1, 1)
+#define MPP17_UA2_RXD        MPP(17, 0x4, 1, 0, 1)
+#define MPP17_NAND_FLASH_WEn3    MPP(17, 0x5, 0, 1, 1)
+#define MPP17_TDM_RSTn        MPP(17, 0x6, 0, 1, 1)
+#define MPP17_UNUSED        MPP(17, 0x1, 0, 0, 1)
+
+
+#define MPP18_GPIO        MPP(18, 0x0, 1, 1, 1)
+#define MPP18_UA0_CTSn        MPP(18, 0x4, 1, 0, 1)
+#define MPP18_BOOT_FLASH_REn    MPP(18, 0x5, 0, 1, 1)
+#define MPP18_UNUSED        MPP(18, 0x1, 0, 0, 1)
+
+
+
+#define MPP19_GPIO        MPP(19, 0x0, 1, 1, 1)
+#define MPP19_UA0_CTSn        MPP(19, 0x4, 0, 1, 1)
+#define MPP19_BOOT_FLASH_WEn    MPP(19, 0x5, 0, 1, 1)
+#define MPP19_UNUSED        MPP(19, 0x1, 0, 0, 1)
+
+
+#define MPP20_GPIO        MPP(20, 0x0, 1, 1, 1)
+#define MPP20_UA1_CTSs        MPP(20, 0x4, 1, 0, 1)
+#define MPP20_TDM_PCLK        MPP(20, 0x6, 1, 1, 0)
+#define MPP20_UNUSED        MPP(20, 0x1, 0, 0, 1)
+
+
+
+#define MPP21_GPIO        MPP(21, 0x0, 1, 1, 1)
+#define MPP21_UA1_CTSs        MPP(21, 0x4, 0, 1, 1)
+#define MPP21_TDM_FSYNC        MPP(21, 0x6, 1, 1, 0)
+#define MPP21_UNUSED        MPP(21, 0x1, 0, 0, 1)
+
+
+
+#define MPP22_GPIO        MPP(22, 0x0, 1, 1, 1)
+#define MPP22_UA3_TDX        MPP(22, 0x4, 0, 1, 1)
+#define MPP22_NAND_FLASH_REn2    MPP(22, 0x5, 0, 1, 1)
+#define MPP22_TDM_DRX        MPP(22, 0x6, 1, 0, 1)
+#define MPP22_UNUSED        MPP(22, 0x1, 0, 0, 1)
+
+
+
+#define MPP23_GPIO        MPP(23, 0x0, 1, 1, 1)
+#define MPP23_UA3_RDX        MPP(23, 0x4, 1, 0, 1)
+#define MPP23_NAND_FLASH_WEn2    MPP(23, 0x5, 0, 1, 1)
+#define MPP23_TDM_DTX        MPP(23, 0x6, 0, 1, 1)
+#define MPP23_UNUSED        MPP(23, 0x1, 0, 0, 1)
+
+
+#define MPP24_GPIO        MPP(24, 0x0, 1, 1, 1)
+#define MPP24_UA2_TXD        MPP(24, 0x4, 0, 1, 1)
+#define MPP24_TDM_INTn        MPP(24, 0x6, 1, 0, 1)
+#define MPP24_UNUSED        MPP(24, 0x1, 0, 0, 1)
+
+
+#define MPP25_GPIO        MPP(25, 0x0, 1, 1, 1)
+#define MPP25_UA2_RXD        MPP(25, 0x4, 1, 0, 1)
+#define MPP25_TDM_RSTn        MPP(25, 0x6, 0, 1, 1)
+#define MPP25_UNUSED        MPP(25, 0x1, 0, 0, 1)
+
+
+#define MPP26_GPIO        MPP(26, 0x0, 1, 1, 1)
+#define MPP26_UA2_CTSn        MPP(26, 0x4, 1, 0, 1)
+#define MPP26_TDM_PCLK        MPP(26, 0x6, 1, 1, 1)
+#define MPP26_UNUSED        MPP(26, 0x1, 0, 0, 1)
+
+
+#define MPP27_GPIO        MPP(27, 0x0, 1, 1, 1)
+#define MPP27_UA2_RTSn        MPP(27, 0x4, 0, 1, 1)
+#define MPP27_TDM_FSYNC        MPP(27, 0x6, 1, 1, 1)
+#define MPP27_UNUSED        MPP(27, 0x1, 0, 0, 1)
+
+
+#define MPP28_GPIO        MPP(28, 0x0, 1, 1, 1)
+#define MPP28_UA3_TXD        MPP(28, 0x4, 0, 1, 1)
+#define MPP28_TDM_DRX        MPP(28, 0x6, 1, 0, 1)
+#define MPP28_UNUSED        MPP(28, 0x1, 0, 0, 1)
+
+#define MPP29_GPIO        MPP(29, 0x0, 1, 1, 1)
+#define MPP29_UA3_RXD        MPP(29, 0x4, 1, 0, 1)
+#define MPP29_SYSRST_OUTn    MPP(29, 0x5, 0, 1, 1)
+#define MPP29_TDM_DTX        MPP(29, 0x6, 0, 1, 1)
+#define MPP29_UNUSED        MPP(29, 0x1, 0, 0, 1)
+
+#define MPP30_GPIO        MPP(30, 0x0, 1, 1, 1)
+#define MPP30_UA3_CTSn        MPP(30, 0x4, 1, 0, 1)
+#define MPP30_UNUSED        MPP(30, 0x1, 0, 0, 1)
+
+#define MPP31_GPIO        MPP(31, 0x0, 1, 1, 1)
+#define MPP31_UA3_RTSn        MPP(31, 0x4, 0, 1, 1)
+#define MPP31_TDM1_SCSn        MPP(31, 0x6, 0, 1, 1)
+#define MPP31_UNUSED        MPP(31, 0x1, 0, 0, 1)
+
+
+#define MPP32_GPIO        MPP(32, 0x1, 1, 1, 1)
+#define MPP32_UA3_TDX        MPP(32, 0x4, 0, 1, 1)
+#define MPP32_SYSRST_OUTn    MPP(32, 0x5, 0, 1, 1)
+#define MPP32_TDM0_RXQ        MPP(32, 0x6, 0, 1, 1)
+#define MPP32_UNUSED        MPP(32, 0x3, 0, 0, 1)
+
+
+#define MPP33_GPIO        MPP(33, 0x1, 1, 1, 1)
+#define MPP33_UA3_RDX        MPP(33, 0x4, 1, 0, 1)
+#define MPP33_TDM0_TXQ        MPP(33, 0x6, 0, 1, 1)
+#define MPP33_UNUSED        MPP(33, 0x3, 0, 0, 1)
+
+
+
+#define MPP34_GPIO        MPP(34, 0x1, 1, 1, 1)
+#define MPP34_UA2_TDX        MPP(34, 0x4, 0, 1, 1)
+#define MPP34_TDM1_RXQ        MPP(34, 0x6, 0, 1, 1)
+#define MPP34_UNUSED        MPP(34, 0x3, 0, 0, 1)
+
+
+
+#define MPP35_GPIO        MPP(35, 0x1, 1, 1, 1)
+#define MPP35_UA2_RDX        MPP(35, 0x4, 1, 0, 1)
+#define MPP35_TDM1_TXQ        MPP(35, 0x6, 0, 1, 1)
+#define MPP35_UNUSED        MPP(35, 0x3, 0, 0, 1)
+
+#define MPP36_GPIO        MPP(36, 0x1, 1, 1, 1)
+#define MPP36_UA0_CTSn        MPP(36, 0x2, 1, 0, 1)
+#define MPP36_UA2_TDX        MPP(36, 0x4, 0, 1, 1)
+#define MPP36_TDM0_SCSn        MPP(36, 0x6, 0, 1, 1)
+#define MPP36_UNUSED        MPP(36, 0x3, 0, 0, 1)
+
+
+#define MPP37_GPIO        MPP(37, 0x1, 1, 1, 1)
+#define MPP37_UA0_RTSn        MPP(37, 0x2, 0, 1, 1)
+#define MPP37_UA2_RXD        MPP(37, 0x4, 1, 0, 1)
+#define MPP37_SYSRST_OUTn    MPP(37, 0x5, 0, 1, 1)
+#define MPP37_TDM_SCLK        MPP(37, 0x6, 0, 1, 1)
+#define MPP37_UNUSED        MPP(37, 0x3, 0, 0, 1)
+
+
+
+
+#define MPP38_GPIO        MPP(38, 0x1, 1, 1, 1)
+#define MPP38_UA1_CTSn        MPP(38, 0x2, 1, 0, 1)
+#define MPP38_UA3_TXD        MPP(38, 0x4, 0, 1, 1)
+#define MPP38_SYSRST_OUTn    MPP(38, 0x5, 0, 1, 1)
+#define MPP38_TDM_SMOSI        MPP(38, 0x6, 0, 1, 1)
+#define MPP38_UNUSED        MPP(38, 0x3, 0, 0, 1)
+
+
+
+
+#define MPP39_GPIO        MPP(39, 0x1, 1, 1, 1)
+#define MPP39_UA1_RTSn        MPP(39, 0x2, 0, 1, 1)
+#define MPP39_UA3_RXD        MPP(39, 0x4, 1, 0, 1)
+#define MPP39_SYSRST_OUTn    MPP(39, 0x5, 0, 1, 1)
+#define MPP39_TDM_SMISO        MPP(39, 0x6, 1, 0, 1)
+#define MPP39_UNUSED        MPP(39, 0x3, 0, 0, 1)
+
+
+
+#define MPP40_GPIO        MPP(40, 0x1, 1, 1, 1)
+#define MPP40_TDM_INTn        MPP(40, 0x6, 1, 0, 1)
+#define MPP40_UNUSED        MPP(40, 0x0, 0, 0, 1)
+
+
+
+#define MPP41_GPIO        MPP(41, 0x1, 1, 1, 1)
+#define MPP41_TDM_RSTn        MPP(41, 0x6, 0, 1, 1)
+#define MPP41_UNUSED        MPP(41, 0x0, 0, 0, 1)
+
+
+
+#define MPP42_GPIO        MPP(42, 0x1, 1, 1, 1)
+#define MPP42_TDM_PCLK        MPP(42, 0x6, 1, 1, 1)
+#define MPP42_UNUSED        MPP(42, 0x0, 0, 0, 1)
+
+
+
+#define MPP43_GPIO        MPP(43, 0x1, 1, 1, 1)
+#define MPP43_TDM_FSYNC        MPP(43, 0x6, 1, 1, 1)
+#define MPP43_UNUSED        MPP(43, 0x0, 0, 0, 1)
+
+
+
+#define MPP44_GPIO        MPP(44, 0x1, 1, 1, 1)
+#define MPP44_TDM_DRX        MPP(44, 0x6, 1, 0, 1)
+#define MPP44_UNUSED        MPP(44, 0x0, 0, 0, 1)
+
+
+
+#define MPP45_GPIO        MPP(45, 0x1, 1, 1, 1)
+#define MPP45_SATA0_ACTn    MPP(45, 0x3, 0, 1, 1)
+#define MPP45_TDM_DRX        MPP(45, 0x6, 0, 1, 1)
+#define MPP45_UNUSED        MPP(45, 0x0, 0, 0, 1)
+
+
+#define MPP46_GPIO        MPP(46, 0x1, 1, 1, 1)
+#define MPP46_TDM_SCSn        MPP(46, 0x6, 0, 1, 1)
+#define MPP46_UNUSED        MPP(46, 0x0, 0, 0, 1)
+
+
+#define MPP47_GPIO        MPP(47, 0x1, 1, 1, 1)
+#define MPP47_UNUSED        MPP(47, 0x0, 0, 0, 1)
+
+
+
+#define MPP48_GPIO        MPP(48, 0x1, 1, 1, 1)
+#define MPP48_SATA1_ACTn    MPP(48, 0x3, 0, 1, 1)
+#define MPP48_UNUSED        MPP(48, 0x2, 0, 0, 1)
+
+
+
+#define MPP49_GPIO        MPP(49, 0x1, 1, 1, 1)
+#define MPP49_SATA0_ACTn    MPP(49, 0x3, 0, 1, 1)
+#define MPP49_M_BB        MPP(49, 0x4, 1, 0, 1)
+#define MPP49_UNUSED        MPP(49, 0x2, 0, 0, 1)
+
+
+#define MPP_MAX            49
+
+void mv78xx0_mpp_conf(unsigned int *mpp_list);
+
+#endif
diff --git a/arch/arm/mach-mx1/Makefile b/arch/arm/mach-mx1/Makefile
index 7f86fe073ec6..fc2ddf82441b 100644
--- a/arch/arm/mach-mx1/Makefile
+++ b/arch/arm/mach-mx1/Makefile
@@ -4,11 +4,12 @@
 
 # Object file lists.
 
+EXTRA_CFLAGS += -DIMX_NEEDS_DEPRECATED_SYMBOLS
 obj-y                   += generic.o clock.o devices.o
 
 # Support for CMOS sensor interface
 obj-$(CONFIG_MX1_VIDEO) += ksym_mx1.o mx1_camera_fiq.o
 
 # Specific board support
-obj-$(CONFIG_ARCH_MX1ADS) += mx1ads.o
-obj-$(CONFIG_MACH_SCB9328) += scb9328.o
\ No newline at end of file
+obj-$(CONFIG_ARCH_MX1ADS) += mach-mx1ads.o
+obj-$(CONFIG_MACH_SCB9328) += mach-scb9328.o
diff --git a/arch/arm/mach-mx1/mx1ads.c b/arch/arm/mach-mx1/mach-mx1ads.c
index 30f04e56fafe..51f3cfd83db2 100644
--- a/arch/arm/mach-mx1/mx1ads.c
+++ b/arch/arm/mach-mx1/mach-mx1ads.c
@@ -1,5 +1,5 @@
 /*
- * arch/arm/mach-imx/mx1ads.c
+ * arch/arm/mach-imx/mach-mx1ads.c
  *
  * Initially based on:
  *      linux-2.6.7-imx/arch/arm/mach-imx/scb9328.c
@@ -27,7 +27,7 @@
 #include <mach/hardware.h>
 #include <mach/i2c.h>
 #include <mach/imx-uart.h>
-#include <mach/iomux.h>
+#include <mach/iomux-mx1.h>
 #include <mach/irqs.h>
 
 #include "devices.h"
@@ -147,7 +147,7 @@ MACHINE_START(MX1ADS, "Freescale MX1ADS")
         /* Maintainer: Sascha Hauer, Pengutronix */
         .phys_io        = IMX_IO_PHYS,
         .io_pg_offst    = (IMX_IO_BASE >> 18) & 0xfffc,
-        .boot_params    = PHYS_OFFSET + 0x100,
+        .boot_params    = MX1_PHYS_OFFSET + 0x100,
         .map_io         = mx1_map_io,
         .init_irq       = mx1_init_irq,
         .timer          = &mx1ads_timer,
@@ -157,7 +157,7 @@ MACHINE_END
 MACHINE_START(MXLADS, "Freescale MXLADS")
         .phys_io        = IMX_IO_PHYS,
         .io_pg_offst    = (IMX_IO_BASE >> 18) & 0xfffc,
-        .boot_params    = PHYS_OFFSET + 0x100,
+        .boot_params    = MX1_PHYS_OFFSET + 0x100,
         .map_io         = mx1_map_io,
         .init_irq       = mx1_init_irq,
         .timer          = &mx1ads_timer,
diff --git a/arch/arm/mach-mx1/scb9328.c b/arch/arm/mach-mx1/mach-scb9328.c
index 325d98df6053..7587a7a12460 100644
--- a/arch/arm/mach-mx1/scb9328.c
+++ b/arch/arm/mach-mx1/mach-scb9328.c
@@ -1,5 +1,5 @@
 /*
- * linux/arch/arm/mach-mx1/scb9328.c
+ * linux/arch/arm/mach-mx1/mach-scb9328.c
  *
  * Copyright (c) 2004 Sascha Hauer <saschahauer@web.de>
  * Copyright (c) 2006-2008 Juergen Beisert <jbeisert@netscape.net>
@@ -23,7 +23,7 @@
 #include <mach/hardware.h>
 #include <mach/irqs.h>
 #include <mach/imx-uart.h>
-#include <mach/iomux.h>
+#include <mach/iomux-mx1.h>
 
 #include "devices.h"
 
diff --git a/arch/arm/mach-mx2/Kconfig b/arch/arm/mach-mx2/Kconfig
index b96c6a389363..742fd4e6dcb9 100644
--- a/arch/arm/mach-mx2/Kconfig
+++ b/arch/arm/mach-mx2/Kconfig
@@ -37,6 +37,7 @@ config MACH_MX27ADS
 config MACH_PCM038
         bool "Phytec phyCORE-i.MX27 CPU module (pcm038)"
         depends on MACH_MX27
+        select MXC_ULPI if USB_ULPI
         help
           Include support for phyCORE-i.MX27 (aka pcm038) platform. This
           includes specific configurations for the module and its peripherals.
@@ -55,7 +56,7 @@ config MACH_PCM970_BASEBOARD
 
 endchoice
 
-config MACH_EUKREA_CPUIMX27
+config MACH_CPUIMX27
         bool "Eukrea CPUIMX27 module"
         depends on MACH_MX27
         help
@@ -64,14 +65,14 @@ config MACH_EUKREA_CPUIMX27
 
 config MACH_EUKREA_CPUIMX27_USESDHC2
         bool "CPUIMX27 integrates SDHC2 module"
-        depends on MACH_EUKREA_CPUIMX27
+        depends on MACH_CPUIMX27
         help
           This adds support for the internal SDHC2 used on CPUIMX27 used
           for wifi or eMMC.
 
 choice
         prompt "Baseboard"
-        depends on MACH_EUKREA_CPUIMX27
+        depends on MACH_CPUIMX27
         default MACH_EUKREA_MBIMX27_BASEBOARD
 
 config MACH_EUKREA_MBIMX27_BASEBOARD
@@ -90,7 +91,7 @@ config MACH_MX27_3DS
           Include support for MX27PDK platform. This includes specific
           configurations for the board and its peripherals.
 
-config MACH_MX27LITE
+config MACH_IMX27LITE
         bool "LogicPD MX27 LITEKIT platform"
         depends on MACH_MX27
         help
@@ -100,6 +101,7 @@ config MACH_MX27LITE
 config MACH_PCA100
         bool "Phytec phyCARD-s (pca100)"
         depends on MACH_MX27
+        select MXC_ULPI if USB_ULPI
         help
           Include support for phyCARD-s (aka pca100) platform. This
           includes specific configurations for the module and its peripherals.
diff --git a/arch/arm/mach-mx2/Makefile b/arch/arm/mach-mx2/Makefile
index 52aca0aaf9b5..e3254faac828 100644
--- a/arch/arm/mach-mx2/Makefile
+++ b/arch/arm/mach-mx2/Makefile
@@ -4,21 +4,20 @@
 
 # Object file lists.
 
-obj-y   :=  generic.o devices.o serial.o
+obj-y   :=  devices.o serial.o
 
-obj-$(CONFIG_MACH_MX21) += clock_imx21.o
+obj-$(CONFIG_MACH_MX21) += clock_imx21.o mm-imx21.o
 
 obj-$(CONFIG_MACH_MX27) += cpu_imx27.o
-obj-$(CONFIG_MACH_MX27) += clock_imx27.o
+obj-$(CONFIG_MACH_MX27) += clock_imx27.o mm-imx27.o
 
-obj-$(CONFIG_MACH_MX21ADS) += mx21ads.o
-obj-$(CONFIG_MACH_MX27ADS) += mx27ads.o
-obj-$(CONFIG_MACH_PCM038) += pcm038.o
+obj-$(CONFIG_MACH_MX21ADS) += mach-mx21ads.o
+obj-$(CONFIG_MACH_MX27ADS) += mach-mx27ads.o
+obj-$(CONFIG_MACH_PCM038) += mach-pcm038.o
 obj-$(CONFIG_MACH_PCM970_BASEBOARD) += pcm970-baseboard.o
-obj-$(CONFIG_MACH_MX27_3DS) += mx27pdk.o
-obj-$(CONFIG_MACH_MX27LITE) += mx27lite.o
-obj-$(CONFIG_MACH_EUKREA_CPUIMX27) += eukrea_cpuimx27.o
+obj-$(CONFIG_MACH_MX27_3DS) += mach-mx27_3ds.o
+obj-$(CONFIG_MACH_IMX27LITE) += mach-imx27lite.o
+obj-$(CONFIG_MACH_CPUIMX27) += mach-cpuimx27.o
 obj-$(CONFIG_MACH_EUKREA_MBIMX27_BASEBOARD) += eukrea_mbimx27-baseboard.o
-obj-$(CONFIG_MACH_PCA100) += pca100.o
-obj-$(CONFIG_MACH_MXT_TD60) += mxt_td60.o
-
+obj-$(CONFIG_MACH_PCA100) += mach-pca100.o
+obj-$(CONFIG_MACH_MXT_TD60) += mach-mxt_td60.o
diff --git a/arch/arm/mach-mx2/clock_imx21.c b/arch/arm/mach-mx2/clock_imx21.c
index e82b489d1215..bb419ef4d133 100644
--- a/arch/arm/mach-mx2/clock_imx21.c
+++ b/arch/arm/mach-mx2/clock_imx21.c
@@ -23,11 +23,242 @@
 #include <linux/module.h>
 
 #include <mach/clock.h>
+#include <mach/hardware.h>
 #include <mach/common.h>
 #include <asm/clkdev.h>
 #include <asm/div64.h>
 
-#include "crm_regs.h"
+#define IO_ADDR_CCM(off)        (MX21_IO_ADDRESS(MX21_CCM_BASE_ADDR + (off)))
+
+/* Register offsets */
+#define CCM_CSCR                IO_ADDR_CCM(0x0)
+#define CCM_MPCTL0              IO_ADDR_CCM(0x4)
+#define CCM_MPCTL1              IO_ADDR_CCM(0x8)
+#define CCM_SPCTL0              IO_ADDR_CCM(0xc)
+#define CCM_SPCTL1              IO_ADDR_CCM(0x10)
+#define CCM_OSC26MCTL           IO_ADDR_CCM(0x14)
+#define CCM_PCDR0               IO_ADDR_CCM(0x18)
+#define CCM_PCDR1               IO_ADDR_CCM(0x1c)
+#define CCM_PCCR0               IO_ADDR_CCM(0x20)
+#define CCM_PCCR1               IO_ADDR_CCM(0x24)
+#define CCM_CCSR                IO_ADDR_CCM(0x28)
+#define CCM_PMCTL               IO_ADDR_CCM(0x2c)
+#define CCM_PMCOUNT             IO_ADDR_CCM(0x30)
+#define CCM_WKGDCTL             IO_ADDR_CCM(0x34)
+
+#define CCM_CSCR_PRESC_OFFSET   29
+#define CCM_CSCR_PRESC_MASK     (0x7 << CCM_CSCR_PRESC_OFFSET)
+
+#define CCM_CSCR_USB_OFFSET     26
+#define CCM_CSCR_USB_MASK       (0x7 << CCM_CSCR_USB_OFFSET)
+#define CCM_CSCR_SD_OFFSET      24
+#define CCM_CSCR_SD_MASK        (0x3 << CCM_CSCR_SD_OFFSET)
+#define CCM_CSCR_SPLLRES        (1 << 22)
+#define CCM_CSCR_MPLLRES        (1 << 21)
+#define CCM_CSCR_SSI2_OFFSET    20
+#define CCM_CSCR_SSI2           (1 << CCM_CSCR_SSI2_OFFSET)
+#define CCM_CSCR_SSI1_OFFSET    19
+#define CCM_CSCR_SSI1           (1 << CCM_CSCR_SSI1_OFFSET)
+#define CCM_CSCR_FIR_OFFSET     18
+#define CCM_CSCR_FIR            (1 << CCM_CSCR_FIR_OFFSET)
+#define CCM_CSCR_SP             (1 << 17)
+#define CCM_CSCR_MCU            (1 << 16)
+#define CCM_CSCR_BCLK_OFFSET    10
+#define CCM_CSCR_BCLK_MASK      (0xf << CCM_CSCR_BCLK_OFFSET)
+#define CCM_CSCR_IPDIV_OFFSET   9
+#define CCM_CSCR_IPDIV          (1 << CCM_CSCR_IPDIV_OFFSET)
+
+#define CCM_CSCR_OSC26MDIV      (1 << 4)
+#define CCM_CSCR_OSC26M         (1 << 3)
+#define CCM_CSCR_FPM            (1 << 2)
+#define CCM_CSCR_SPEN           (1 << 1)
+#define CCM_CSCR_MPEN           1
+
+#define CCM_MPCTL0_CPLM         (1 << 31)
+#define CCM_MPCTL0_PD_OFFSET    26
+#define CCM_MPCTL0_PD_MASK      (0xf << 26)
+#define CCM_MPCTL0_MFD_OFFSET   16
+#define CCM_MPCTL0_MFD_MASK     (0x3ff << 16)
+#define CCM_MPCTL0_MFI_OFFSET   10
+#define CCM_MPCTL0_MFI_MASK     (0xf << 10)
+#define CCM_MPCTL0_MFN_OFFSET   0
+#define CCM_MPCTL0_MFN_MASK     0x3ff
+
+#define CCM_MPCTL1_LF           (1 << 15)
+#define CCM_MPCTL1_BRMO         (1 << 6)
+
+#define CCM_SPCTL0_CPLM         (1 << 31)
+#define CCM_SPCTL0_PD_OFFSET    26
+#define CCM_SPCTL0_PD_MASK      (0xf << 26)
+#define CCM_SPCTL0_MFD_OFFSET   16
+#define CCM_SPCTL0_MFD_MASK     (0x3ff << 16)
+#define CCM_SPCTL0_MFI_OFFSET   10
+#define CCM_SPCTL0_MFI_MASK     (0xf << 10)
+#define CCM_SPCTL0_MFN_OFFSET   0
+#define CCM_SPCTL0_MFN_MASK     0x3ff
+
+#define CCM_SPCTL1_LF           (1 << 15)
+#define CCM_SPCTL1_BRMO         (1 << 6)
+
+#define CCM_OSC26MCTL_PEAK_OFFSET       16
+#define CCM_OSC26MCTL_PEAK_MASK         (0x3 << 16)
+#define CCM_OSC26MCTL_AGC_OFFSET        8
+#define CCM_OSC26MCTL_AGC_MASK          (0x3f << 8)
+#define CCM_OSC26MCTL_ANATEST_OFFSET    0
+#define CCM_OSC26MCTL_ANATEST_MASK      0x3f
+
+#define CCM_PCDR0_SSI2BAUDDIV_OFFSET    26
+#define CCM_PCDR0_SSI2BAUDDIV_MASK      (0x3f << 26)
+#define CCM_PCDR0_SSI1BAUDDIV_OFFSET    16
+#define CCM_PCDR0_SSI1BAUDDIV_MASK      (0x3f << 16)
+#define CCM_PCDR0_NFCDIV_OFFSET         12
+#define CCM_PCDR0_NFCDIV_MASK           (0xf << 12)
+#define CCM_PCDR0_48MDIV_OFFSET         5
+#define CCM_PCDR0_48MDIV_MASK           (0x7 << CCM_PCDR0_48MDIV_OFFSET)
+#define CCM_PCDR0_FIRIDIV_OFFSET        0
+#define CCM_PCDR0_FIRIDIV_MASK          0x1f
+#define CCM_PCDR1_PERDIV4_OFFSET        24
+#define CCM_PCDR1_PERDIV4_MASK          (0x3f << 24)
+#define CCM_PCDR1_PERDIV3_OFFSET        16
+#define CCM_PCDR1_PERDIV3_MASK          (0x3f << 16)
+#define CCM_PCDR1_PERDIV2_OFFSET        8
+#define CCM_PCDR1_PERDIV2_MASK          (0x3f << 8)
+#define CCM_PCDR1_PERDIV1_OFFSET        0
+#define CCM_PCDR1_PERDIV1_MASK          0x3f
+
+#define CCM_PCCR_HCLK_CSI_OFFSET        31
+#define CCM_PCCR_HCLK_CSI_REG           CCM_PCCR0
+#define CCM_PCCR_HCLK_DMA_OFFSET        30
+#define CCM_PCCR_HCLK_DMA_REG           CCM_PCCR0
+#define CCM_PCCR_HCLK_BROM_OFFSET       28
+#define CCM_PCCR_HCLK_BROM_REG          CCM_PCCR0
+#define CCM_PCCR_HCLK_EMMA_OFFSET       27
+#define CCM_PCCR_HCLK_EMMA_REG          CCM_PCCR0
+#define CCM_PCCR_HCLK_LCDC_OFFSET       26
+#define CCM_PCCR_HCLK_LCDC_REG          CCM_PCCR0
+#define CCM_PCCR_HCLK_SLCDC_OFFSET      25
+#define CCM_PCCR_HCLK_SLCDC_REG         CCM_PCCR0
+#define CCM_PCCR_HCLK_USBOTG_OFFSET     24
+#define CCM_PCCR_HCLK_USBOTG_REG        CCM_PCCR0
+#define CCM_PCCR_HCLK_BMI_OFFSET        23
+#define CCM_PCCR_BMI_MASK               (1 << CCM_PCCR_BMI_MASK)
+#define CCM_PCCR_HCLK_BMI_REG           CCM_PCCR0
+#define CCM_PCCR_PERCLK4_OFFSET         22
+#define CCM_PCCR_PERCLK4_REG            CCM_PCCR0
+#define CCM_PCCR_SLCDC_OFFSET           21
+#define CCM_PCCR_SLCDC_REG              CCM_PCCR0
+#define CCM_PCCR_FIRI_BAUD_OFFSET       20
+#define CCM_PCCR_FIRI_BAUD_MASK         (1 << CCM_PCCR_FIRI_BAUD_MASK)
+#define CCM_PCCR_FIRI_BAUD_REG          CCM_PCCR0
+#define CCM_PCCR_NFC_OFFSET             19
+#define CCM_PCCR_NFC_REG                CCM_PCCR0
+#define CCM_PCCR_LCDC_OFFSET            18
+#define CCM_PCCR_LCDC_REG               CCM_PCCR0
+#define CCM_PCCR_SSI1_BAUD_OFFSET       17
+#define CCM_PCCR_SSI1_BAUD_REG          CCM_PCCR0
+#define CCM_PCCR_SSI2_BAUD_OFFSET       16
+#define CCM_PCCR_SSI2_BAUD_REG          CCM_PCCR0
+#define CCM_PCCR_EMMA_OFFSET            15
+#define CCM_PCCR_EMMA_REG               CCM_PCCR0
+#define CCM_PCCR_USBOTG_OFFSET          14
+#define CCM_PCCR_USBOTG_REG             CCM_PCCR0
+#define CCM_PCCR_DMA_OFFSET             13
+#define CCM_PCCR_DMA_REG                CCM_PCCR0
+#define CCM_PCCR_I2C1_OFFSET            12
+#define CCM_PCCR_I2C1_REG               CCM_PCCR0
+#define CCM_PCCR_GPIO_OFFSET            11
+#define CCM_PCCR_GPIO_REG               CCM_PCCR0
+#define CCM_PCCR_SDHC2_OFFSET           10
+#define CCM_PCCR_SDHC2_REG              CCM_PCCR0
+#define CCM_PCCR_SDHC1_OFFSET           9
+#define CCM_PCCR_SDHC1_REG              CCM_PCCR0
+#define CCM_PCCR_FIRI_OFFSET            8
+#define CCM_PCCR_FIRI_MASK              (1 << CCM_PCCR_BAUD_MASK)
+#define CCM_PCCR_FIRI_REG               CCM_PCCR0
+#define CCM_PCCR_SSI2_IPG_OFFSET        7
+#define CCM_PCCR_SSI2_REG               CCM_PCCR0
+#define CCM_PCCR_SSI1_IPG_OFFSET        6
+#define CCM_PCCR_SSI1_REG               CCM_PCCR0
+#define CCM_PCCR_CSPI2_OFFSET           5
+#define CCM_PCCR_CSPI2_REG              CCM_PCCR0
+#define CCM_PCCR_CSPI1_OFFSET           4
+#define CCM_PCCR_CSPI1_REG              CCM_PCCR0
+#define CCM_PCCR_UART4_OFFSET           3
+#define CCM_PCCR_UART4_REG              CCM_PCCR0
+#define CCM_PCCR_UART3_OFFSET           2
+#define CCM_PCCR_UART3_REG              CCM_PCCR0
+#define CCM_PCCR_UART2_OFFSET           1
+#define CCM_PCCR_UART2_REG              CCM_PCCR0
+#define CCM_PCCR_UART1_OFFSET           0
+#define CCM_PCCR_UART1_REG              CCM_PCCR0
+
+#define CCM_PCCR_OWIRE_OFFSET           31
+#define CCM_PCCR_OWIRE_REG              CCM_PCCR1
+#define CCM_PCCR_KPP_OFFSET             30
+#define CCM_PCCR_KPP_REG                CCM_PCCR1
+#define CCM_PCCR_RTC_OFFSET             29
+#define CCM_PCCR_RTC_REG                CCM_PCCR1
+#define CCM_PCCR_PWM_OFFSET             28
+#define CCM_PCCR_PWM_REG                CCM_PCCR1
+#define CCM_PCCR_GPT3_OFFSET            27
+#define CCM_PCCR_GPT3_REG               CCM_PCCR1
+#define CCM_PCCR_GPT2_OFFSET            26
+#define CCM_PCCR_GPT2_REG               CCM_PCCR1
+#define CCM_PCCR_GPT1_OFFSET            25
+#define CCM_PCCR_GPT1_REG               CCM_PCCR1
+#define CCM_PCCR_WDT_OFFSET             24
+#define CCM_PCCR_WDT_REG                CCM_PCCR1
+#define CCM_PCCR_CSPI3_OFFSET           23
+#define CCM_PCCR_CSPI3_REG              CCM_PCCR1
+
+#define CCM_PCCR_CSPI1_MASK             (1 << CCM_PCCR_CSPI1_OFFSET)
+#define CCM_PCCR_CSPI2_MASK             (1 << CCM_PCCR_CSPI2_OFFSET)
+#define CCM_PCCR_CSPI3_MASK             (1 << CCM_PCCR_CSPI3_OFFSET)
+#define CCM_PCCR_DMA_MASK               (1 << CCM_PCCR_DMA_OFFSET)
+#define CCM_PCCR_EMMA_MASK              (1 << CCM_PCCR_EMMA_OFFSET)
+#define CCM_PCCR_GPIO_MASK              (1 << CCM_PCCR_GPIO_OFFSET)
+#define CCM_PCCR_GPT1_MASK              (1 << CCM_PCCR_GPT1_OFFSET)
+#define CCM_PCCR_GPT2_MASK              (1 << CCM_PCCR_GPT2_OFFSET)
+#define CCM_PCCR_GPT3_MASK              (1 << CCM_PCCR_GPT3_OFFSET)
+#define CCM_PCCR_HCLK_BROM_MASK         (1 << CCM_PCCR_HCLK_BROM_OFFSET)
+#define CCM_PCCR_HCLK_CSI_MASK          (1 << CCM_PCCR_HCLK_CSI_OFFSET)
+#define CCM_PCCR_HCLK_DMA_MASK          (1 << CCM_PCCR_HCLK_DMA_OFFSET)
+#define CCM_PCCR_HCLK_EMMA_MASK         (1 << CCM_PCCR_HCLK_EMMA_OFFSET)
+#define CCM_PCCR_HCLK_LCDC_MASK         (1 << CCM_PCCR_HCLK_LCDC_OFFSET)
+#define CCM_PCCR_HCLK_SLCDC_MASK        (1 << CCM_PCCR_HCLK_SLCDC_OFFSET)
+#define CCM_PCCR_HCLK_USBOTG_MASK       (1 << CCM_PCCR_HCLK_USBOTG_OFFSET)
+#define CCM_PCCR_I2C1_MASK              (1 << CCM_PCCR_I2C1_OFFSET)
+#define CCM_PCCR_KPP_MASK               (1 << CCM_PCCR_KPP_OFFSET)
+#define CCM_PCCR_LCDC_MASK              (1 << CCM_PCCR_LCDC_OFFSET)
+#define CCM_PCCR_NFC_MASK               (1 << CCM_PCCR_NFC_OFFSET)
+#define CCM_PCCR_OWIRE_MASK             (1 << CCM_PCCR_OWIRE_OFFSET)
+#define CCM_PCCR_PERCLK4_MASK           (1 << CCM_PCCR_PERCLK4_OFFSET)
+#define CCM_PCCR_PWM_MASK               (1 << CCM_PCCR_PWM_OFFSET)
+#define CCM_PCCR_RTC_MASK               (1 << CCM_PCCR_RTC_OFFSET)
+#define CCM_PCCR_SDHC1_MASK             (1 << CCM_PCCR_SDHC1_OFFSET)
+#define CCM_PCCR_SDHC2_MASK             (1 << CCM_PCCR_SDHC2_OFFSET)
+#define CCM_PCCR_SLCDC_MASK             (1 << CCM_PCCR_SLCDC_OFFSET)
+#define CCM_PCCR_SSI1_BAUD_MASK         (1 << CCM_PCCR_SSI1_BAUD_OFFSET)
+#define CCM_PCCR_SSI1_IPG_MASK          (1 << CCM_PCCR_SSI1_IPG_OFFSET)
+#define CCM_PCCR_SSI2_BAUD_MASK         (1 << CCM_PCCR_SSI2_BAUD_OFFSET)
+#define CCM_PCCR_SSI2_IPG_MASK          (1 << CCM_PCCR_SSI2_IPG_OFFSET)
+#define CCM_PCCR_UART1_MASK             (1 << CCM_PCCR_UART1_OFFSET)
+#define CCM_PCCR_UART2_MASK             (1 << CCM_PCCR_UART2_OFFSET)
+#define CCM_PCCR_UART3_MASK             (1 << CCM_PCCR_UART3_OFFSET)
+#define CCM_PCCR_UART4_MASK             (1 << CCM_PCCR_UART4_OFFSET)
+#define CCM_PCCR_USBOTG_MASK            (1 << CCM_PCCR_USBOTG_OFFSET)
+#define CCM_PCCR_WDT_MASK               (1 << CCM_PCCR_WDT_OFFSET)
+
+#define CCM_CCSR_32KSR          (1 << 15)
+
+#define CCM_CCSR_CLKMODE1       (1 << 9)
+#define CCM_CCSR_CLKMODE0       (1 << 8)
+
+#define CCM_CCSR_CLKOSEL_OFFSET 0
+#define CCM_CCSR_CLKOSEL_MASK   0x1f
+
+#define SYS_FMCR                0x14    /* Functional Muxing Control Reg */
+#define SYS_CHIP_ID             0x00    /* The offset of CHIP ID register */
 
 static int _clk_enable(struct clk *clk)
 {
@@ -1002,6 +1233,7 @@ int __init mx21_clocks_init(unsigned long lref, unsigned long href)
         clk_enable(&uart_clk[0]);
 #endif
 
-        mxc_timer_init(&gpt_clk[0], IO_ADDRESS(GPT1_BASE_ADDR), MXC_INT_GPT1);
+        mxc_timer_init(&gpt_clk[0], MX21_IO_ADDRESS(MX21_GPT1_BASE_ADDR),
+                        MX21_INT_GPT1);
         return 0;
 }
diff --git a/arch/arm/mach-mx2/clock_imx27.c b/arch/arm/mach-mx2/clock_imx27.c
index 18c53a6487fa..0f0823c8b170 100644
--- a/arch/arm/mach-mx2/clock_imx27.c
+++ b/arch/arm/mach-mx2/clock_imx27.c
@@ -29,21 +29,23 @@
 #include <mach/common.h>
 #include <mach/hardware.h>
 
+#define IO_ADDR_CCM(off)        (MX27_IO_ADDRESS(MX27_CCM_BASE_ADDR + (off)))
+
 /* Register offsets */
-#define CCM_CSCR                (IO_ADDRESS(CCM_BASE_ADDR) + 0x0)
-#define CCM_MPCTL0              (IO_ADDRESS(CCM_BASE_ADDR) + 0x4)
-#define CCM_MPCTL1              (IO_ADDRESS(CCM_BASE_ADDR) + 0x8)
-#define CCM_SPCTL0              (IO_ADDRESS(CCM_BASE_ADDR) + 0xC)
-#define CCM_SPCTL1              (IO_ADDRESS(CCM_BASE_ADDR) + 0x10)
-#define CCM_OSC26MCTL           (IO_ADDRESS(CCM_BASE_ADDR) + 0x14)
-#define CCM_PCDR0               (IO_ADDRESS(CCM_BASE_ADDR) + 0x18)
-#define CCM_PCDR1               (IO_ADDRESS(CCM_BASE_ADDR) + 0x1c)
-#define CCM_PCCR0               (IO_ADDRESS(CCM_BASE_ADDR) + 0x20)
-#define CCM_PCCR1               (IO_ADDRESS(CCM_BASE_ADDR) + 0x24)
-#define CCM_CCSR                (IO_ADDRESS(CCM_BASE_ADDR) + 0x28)
-#define CCM_PMCTL               (IO_ADDRESS(CCM_BASE_ADDR) + 0x2c)
-#define CCM_PMCOUNT             (IO_ADDRESS(CCM_BASE_ADDR) + 0x30)
-#define CCM_WKGDCTL             (IO_ADDRESS(CCM_BASE_ADDR) + 0x34)
+#define CCM_CSCR                IO_ADDR_CCM(0x0)
+#define CCM_MPCTL0              IO_ADDR_CCM(0x4)
+#define CCM_MPCTL1              IO_ADDR_CCM(0x8)
+#define CCM_SPCTL0              IO_ADDR_CCM(0xc)
+#define CCM_SPCTL1              IO_ADDR_CCM(0x10)
+#define CCM_OSC26MCTL           IO_ADDR_CCM(0x14)
+#define CCM_PCDR0               IO_ADDR_CCM(0x18)
+#define CCM_PCDR1               IO_ADDR_CCM(0x1c)
+#define CCM_PCCR0               IO_ADDR_CCM(0x20)
+#define CCM_PCCR1               IO_ADDR_CCM(0x24)
+#define CCM_CCSR                IO_ADDR_CCM(0x28)
+#define CCM_PMCTL               IO_ADDR_CCM(0x2c)
+#define CCM_PMCOUNT             IO_ADDR_CCM(0x30)
+#define CCM_WKGDCTL             IO_ADDR_CCM(0x34)
 
 #define CCM_CSCR_UPDATE_DIS     (1 << 31)
 #define CCM_CSCR_SSI2           (1 << 23)
@@ -753,7 +755,8 @@ int __init mx27_clocks_init(unsigned long fref)
         clk_enable(&uart1_clk);
 #endif
 
-        mxc_timer_init(&gpt1_clk, IO_ADDRESS(GPT1_BASE_ADDR), MXC_INT_GPT1);
+        mxc_timer_init(&gpt1_clk, MX27_IO_ADDRESS(MX27_GPT1_BASE_ADDR),
+                        MX27_INT_GPT1);
 
         return 0;
 }
diff --git a/arch/arm/mach-mx2/cpu_imx27.c b/arch/arm/mach-mx2/cpu_imx27.c
index d9e3bf9644c9..d8d3b2d84dc5 100644
--- a/arch/arm/mach-mx2/cpu_imx27.c
+++ b/arch/arm/mach-mx2/cpu_imx27.c
@@ -39,7 +39,8 @@ static void query_silicon_parameter(void)
          * the silicon revision very early we read it here to
          * avoid any further hooks
         */
-        val = __raw_readl(IO_ADDRESS(SYSCTRL_BASE_ADDR) + SYS_CHIP_ID);
+        val = __raw_readl(MX27_IO_ADDRESS(MX27_SYSCTRL_BASE_ADDR
+                                + SYS_CHIP_ID));
 
         cpu_silicon_rev = (int)(val >> 28);
         cpu_partnumber = (int)((val >> 12) & 0xFFFF);
diff --git a/arch/arm/mach-mx2/crm_regs.h b/arch/arm/mach-mx2/crm_regs.h
deleted file mode 100644
index 749de76b3f95..000000000000
--- a/arch/arm/mach-mx2/crm_regs.h
+++ /dev/null
@@ -1,258 +0,0 @@
-/*
- * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved.
- * Copyright 2008 Juergen Beisert, kernel@pengutronix.de
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version 2
- * of the License, or (at your option) any later version.
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
- * MA 02110-1301, USA.
- */
-
-#ifndef __ARCH_ARM_MACH_MX2_CRM_REGS_H__
-#define __ARCH_ARM_MACH_MX2_CRM_REGS_H__
-
-#include <mach/hardware.h>
-
-/* Register offsets */
-#define CCM_CSCR                (IO_ADDRESS(CCM_BASE_ADDR) + 0x0)
-#define CCM_MPCTL0              (IO_ADDRESS(CCM_BASE_ADDR) + 0x4)
-#define CCM_MPCTL1              (IO_ADDRESS(CCM_BASE_ADDR) + 0x8)
-#define CCM_SPCTL0              (IO_ADDRESS(CCM_BASE_ADDR) + 0xC)
-#define CCM_SPCTL1              (IO_ADDRESS(CCM_BASE_ADDR) + 0x10)
-#define CCM_OSC26MCTL           (IO_ADDRESS(CCM_BASE_ADDR) + 0x14)
-#define CCM_PCDR0               (IO_ADDRESS(CCM_BASE_ADDR) + 0x18)
-#define CCM_PCDR1               (IO_ADDRESS(CCM_BASE_ADDR) + 0x1c)
-#define CCM_PCCR0               (IO_ADDRESS(CCM_BASE_ADDR) + 0x20)
-#define CCM_PCCR1               (IO_ADDRESS(CCM_BASE_ADDR) + 0x24)
-#define CCM_CCSR                (IO_ADDRESS(CCM_BASE_ADDR) + 0x28)
-#define CCM_PMCTL               (IO_ADDRESS(CCM_BASE_ADDR) + 0x2c)
-#define CCM_PMCOUNT             (IO_ADDRESS(CCM_BASE_ADDR) + 0x30)
-#define CCM_WKGDCTL             (IO_ADDRESS(CCM_BASE_ADDR) + 0x34)
-
-#define CCM_CSCR_PRESC_OFFSET   29
-#define CCM_CSCR_PRESC_MASK     (0x7 << CCM_CSCR_PRESC_OFFSET)
-
-#define CCM_CSCR_USB_OFFSET     26
-#define CCM_CSCR_USB_MASK       (0x7 << CCM_CSCR_USB_OFFSET)
-#define CCM_CSCR_SD_OFFSET      24
-#define CCM_CSCR_SD_MASK        (0x3 << CCM_CSCR_SD_OFFSET)
-#define CCM_CSCR_SPLLRES        (1 << 22)
-#define CCM_CSCR_MPLLRES        (1 << 21)
-#define CCM_CSCR_SSI2_OFFSET    20
-#define CCM_CSCR_SSI2           (1 << CCM_CSCR_SSI2_OFFSET)
-#define CCM_CSCR_SSI1_OFFSET    19
-#define CCM_CSCR_SSI1           (1 << CCM_CSCR_SSI1_OFFSET)
-#define CCM_CSCR_FIR_OFFSET     18
-#define CCM_CSCR_FIR            (1 << CCM_CSCR_FIR_OFFSET)
-#define CCM_CSCR_SP             (1 << 17)
-#define CCM_CSCR_MCU            (1 << 16)
-#define CCM_CSCR_BCLK_OFFSET    10
-#define CCM_CSCR_BCLK_MASK      (0xf << CCM_CSCR_BCLK_OFFSET)
-#define CCM_CSCR_IPDIV_OFFSET   9
-#define CCM_CSCR_IPDIV          (1 << CCM_CSCR_IPDIV_OFFSET)
-
-#define CCM_CSCR_OSC26MDIV      (1 << 4)
-#define CCM_CSCR_OSC26M         (1 << 3)
-#define CCM_CSCR_FPM            (1 << 2)
-#define CCM_CSCR_SPEN           (1 << 1)
-#define CCM_CSCR_MPEN           1
-
-
-
-#define CCM_MPCTL0_CPLM         (1 << 31)
-#define CCM_MPCTL0_PD_OFFSET    26
-#define CCM_MPCTL0_PD_MASK      (0xf << 26)
-#define CCM_MPCTL0_MFD_OFFSET   16
-#define CCM_MPCTL0_MFD_MASK     (0x3ff << 16)
-#define CCM_MPCTL0_MFI_OFFSET   10
-#define CCM_MPCTL0_MFI_MASK     (0xf << 10)
-#define CCM_MPCTL0_MFN_OFFSET   0
-#define CCM_MPCTL0_MFN_MASK     0x3ff
-
-#define CCM_MPCTL1_LF           (1 << 15)
-#define CCM_MPCTL1_BRMO         (1 << 6)
-
-#define CCM_SPCTL0_CPLM         (1 << 31)
-#define CCM_SPCTL0_PD_OFFSET    26
-#define CCM_SPCTL0_PD_MASK      (0xf << 26)
-#define CCM_SPCTL0_MFD_OFFSET   16
-#define CCM_SPCTL0_MFD_MASK     (0x3ff << 16)
-#define CCM_SPCTL0_MFI_OFFSET   10
-#define CCM_SPCTL0_MFI_MASK     (0xf << 10)
-#define CCM_SPCTL0_MFN_OFFSET   0
-#define CCM_SPCTL0_MFN_MASK     0x3ff
-
-#define CCM_SPCTL1_LF           (1 << 15)
-#define CCM_SPCTL1_BRMO         (1 << 6)
-
-#define CCM_OSC26MCTL_PEAK_OFFSET       16
-#define CCM_OSC26MCTL_PEAK_MASK         (0x3 << 16)
-#define CCM_OSC26MCTL_AGC_OFFSET        8
-#define CCM_OSC26MCTL_AGC_MASK          (0x3f << 8)
-#define CCM_OSC26MCTL_ANATEST_OFFSET    0
-#define CCM_OSC26MCTL_ANATEST_MASK      0x3f
-
-#define CCM_PCDR0_SSI2BAUDDIV_OFFSET    26
-#define CCM_PCDR0_SSI2BAUDDIV_MASK      (0x3f << 26)
-#define CCM_PCDR0_SSI1BAUDDIV_OFFSET    16
-#define CCM_PCDR0_SSI1BAUDDIV_MASK      (0x3f << 16)
-#define CCM_PCDR0_NFCDIV_OFFSET         12
-#define CCM_PCDR0_NFCDIV_MASK           (0xf << 12)
-#define CCM_PCDR0_48MDIV_OFFSET         5
-#define CCM_PCDR0_48MDIV_MASK           (0x7 << CCM_PCDR0_48MDIV_OFFSET)
-#define CCM_PCDR0_FIRIDIV_OFFSET        0
-#define CCM_PCDR0_FIRIDIV_MASK          0x1f
-#define CCM_PCDR1_PERDIV4_OFFSET        24
-#define CCM_PCDR1_PERDIV4_MASK          (0x3f << 24)
-#define CCM_PCDR1_PERDIV3_OFFSET        16
-#define CCM_PCDR1_PERDIV3_MASK          (0x3f << 16)
-#define CCM_PCDR1_PERDIV2_OFFSET        8
-#define CCM_PCDR1_PERDIV2_MASK          (0x3f << 8)
-#define CCM_PCDR1_PERDIV1_OFFSET        0
-#define CCM_PCDR1_PERDIV1_MASK          0x3f
-
-#define CCM_PCCR_HCLK_CSI_OFFSET        31
-#define CCM_PCCR_HCLK_CSI_REG           CCM_PCCR0
-#define CCM_PCCR_HCLK_DMA_OFFSET        30
-#define CCM_PCCR_HCLK_DMA_REG           CCM_PCCR0
-#define CCM_PCCR_HCLK_BROM_OFFSET       28
-#define CCM_PCCR_HCLK_BROM_REG          CCM_PCCR0
-#define CCM_PCCR_HCLK_EMMA_OFFSET       27
-#define CCM_PCCR_HCLK_EMMA_REG          CCM_PCCR0
-#define CCM_PCCR_HCLK_LCDC_OFFSET       26
-#define CCM_PCCR_HCLK_LCDC_REG          CCM_PCCR0
-#define CCM_PCCR_HCLK_SLCDC_OFFSET      25
-#define CCM_PCCR_HCLK_SLCDC_REG         CCM_PCCR0
-#define CCM_PCCR_HCLK_USBOTG_OFFSET     24
-#define CCM_PCCR_HCLK_USBOTG_REG        CCM_PCCR0
-#define CCM_PCCR_HCLK_BMI_OFFSET        23
-#define CCM_PCCR_BMI_MASK               (1 << CCM_PCCR_BMI_MASK)
-#define CCM_PCCR_HCLK_BMI_REG           CCM_PCCR0
-#define CCM_PCCR_PERCLK4_OFFSET         22
-#define CCM_PCCR_PERCLK4_REG            CCM_PCCR0
-#define CCM_PCCR_SLCDC_OFFSET           21
-#define CCM_PCCR_SLCDC_REG              CCM_PCCR0
-#define CCM_PCCR_FIRI_BAUD_OFFSET       20
-#define CCM_PCCR_FIRI_BAUD_MASK         (1 << CCM_PCCR_FIRI_BAUD_MASK)
-#define CCM_PCCR_FIRI_BAUD_REG          CCM_PCCR0
-#define CCM_PCCR_NFC_OFFSET             19
-#define CCM_PCCR_NFC_REG                CCM_PCCR0
-#define CCM_PCCR_LCDC_OFFSET            18
-#define CCM_PCCR_LCDC_REG               CCM_PCCR0
-#define CCM_PCCR_SSI1_BAUD_OFFSET       17
-#define CCM_PCCR_SSI1_BAUD_REG          CCM_PCCR0
-#define CCM_PCCR_SSI2_BAUD_OFFSET       16
-#define CCM_PCCR_SSI2_BAUD_REG          CCM_PCCR0
-#define CCM_PCCR_EMMA_OFFSET            15
-#define CCM_PCCR_EMMA_REG               CCM_PCCR0
-#define CCM_PCCR_USBOTG_OFFSET          14
-#define CCM_PCCR_USBOTG_REG             CCM_PCCR0
-#define CCM_PCCR_DMA_OFFSET             13
-#define CCM_PCCR_DMA_REG                CCM_PCCR0
-#define CCM_PCCR_I2C1_OFFSET            12
-#define CCM_PCCR_I2C1_REG               CCM_PCCR0
-#define CCM_PCCR_GPIO_OFFSET            11
-#define CCM_PCCR_GPIO_REG               CCM_PCCR0
-#define CCM_PCCR_SDHC2_OFFSET           10
-#define CCM_PCCR_SDHC2_REG              CCM_PCCR0
-#define CCM_PCCR_SDHC1_OFFSET           9
-#define CCM_PCCR_SDHC1_REG              CCM_PCCR0
-#define CCM_PCCR_FIRI_OFFSET            8
-#define CCM_PCCR_FIRI_MASK              (1 << CCM_PCCR_BAUD_MASK)
-#define CCM_PCCR_FIRI_REG               CCM_PCCR0
-#define CCM_PCCR_SSI2_IPG_OFFSET        7
-#define CCM_PCCR_SSI2_REG               CCM_PCCR0
-#define CCM_PCCR_SSI1_IPG_OFFSET        6
-#define CCM_PCCR_SSI1_REG               CCM_PCCR0
-#define CCM_PCCR_CSPI2_OFFSET           5
-#define CCM_PCCR_CSPI2_REG              CCM_PCCR0
-#define CCM_PCCR_CSPI1_OFFSET           4
-#define CCM_PCCR_CSPI1_REG              CCM_PCCR0
-#define CCM_PCCR_UART4_OFFSET           3
-#define CCM_PCCR_UART4_REG              CCM_PCCR0
-#define CCM_PCCR_UART3_OFFSET           2
-#define CCM_PCCR_UART3_REG              CCM_PCCR0
-#define CCM_PCCR_UART2_OFFSET           1
-#define CCM_PCCR_UART2_REG              CCM_PCCR0
-#define CCM_PCCR_UART1_OFFSET           0
-#define CCM_PCCR_UART1_REG              CCM_PCCR0
-
-#define CCM_PCCR_OWIRE_OFFSET           31
-#define CCM_PCCR_OWIRE_REG              CCM_PCCR1
-#define CCM_PCCR_KPP_OFFSET             30
-#define CCM_PCCR_KPP_REG                CCM_PCCR1
-#define CCM_PCCR_RTC_OFFSET             29
-#define CCM_PCCR_RTC_REG                CCM_PCCR1
-#define CCM_PCCR_PWM_OFFSET             28
-#define CCM_PCCR_PWM_REG                CCM_PCCR1
-#define CCM_PCCR_GPT3_OFFSET            27
-#define CCM_PCCR_GPT3_REG               CCM_PCCR1
-#define CCM_PCCR_GPT2_OFFSET            26
-#define CCM_PCCR_GPT2_REG               CCM_PCCR1
-#define CCM_PCCR_GPT1_OFFSET            25
-#define CCM_PCCR_GPT1_REG               CCM_PCCR1
-#define CCM_PCCR_WDT_OFFSET             24
-#define CCM_PCCR_WDT_REG                CCM_PCCR1
-#define CCM_PCCR_CSPI3_OFFSET           23
-#define CCM_PCCR_CSPI3_REG              CCM_PCCR1
-
-#define CCM_PCCR_CSPI1_MASK             (1 << CCM_PCCR_CSPI1_OFFSET)
-#define CCM_PCCR_CSPI2_MASK             (1 << CCM_PCCR_CSPI2_OFFSET)
-#define CCM_PCCR_CSPI3_MASK             (1 << CCM_PCCR_CSPI3_OFFSET)
-#define CCM_PCCR_DMA_MASK               (1 << CCM_PCCR_DMA_OFFSET)
-#define CCM_PCCR_EMMA_MASK              (1 << CCM_PCCR_EMMA_OFFSET)
-#define CCM_PCCR_GPIO_MASK              (1 << CCM_PCCR_GPIO_OFFSET)
-#define CCM_PCCR_GPT1_MASK              (1 << CCM_PCCR_GPT1_OFFSET)
-#define CCM_PCCR_GPT2_MASK              (1 << CCM_PCCR_GPT2_OFFSET)
-#define CCM_PCCR_GPT3_MASK              (1 << CCM_PCCR_GPT3_OFFSET)
-#define CCM_PCCR_HCLK_BROM_MASK         (1 << CCM_PCCR_HCLK_BROM_OFFSET)
-#define CCM_PCCR_HCLK_CSI_MASK          (1 << CCM_PCCR_HCLK_CSI_OFFSET)
-#define CCM_PCCR_HCLK_DMA_MASK          (1 << CCM_PCCR_HCLK_DMA_OFFSET)
-#define CCM_PCCR_HCLK_EMMA_MASK         (1 << CCM_PCCR_HCLK_EMMA_OFFSET)
-#define CCM_PCCR_HCLK_LCDC_MASK         (1 << CCM_PCCR_HCLK_LCDC_OFFSET)
-#define CCM_PCCR_HCLK_SLCDC_MASK        (1 << CCM_PCCR_HCLK_SLCDC_OFFSET)
-#define CCM_PCCR_HCLK_USBOTG_MASK       (1 << CCM_PCCR_HCLK_USBOTG_OFFSET)
-#define CCM_PCCR_I2C1_MASK              (1 << CCM_PCCR_I2C1_OFFSET)
-#define CCM_PCCR_KPP_MASK               (1 << CCM_PCCR_KPP_OFFSET)
-#define CCM_PCCR_LCDC_MASK              (1 << CCM_PCCR_LCDC_OFFSET)
-#define CCM_PCCR_NFC_MASK               (1 << CCM_PCCR_NFC_OFFSET)
-#define CCM_PCCR_OWIRE_MASK             (1 << CCM_PCCR_OWIRE_OFFSET)
-#define CCM_PCCR_PERCLK4_MASK           (1 << CCM_PCCR_PERCLK4_OFFSET)
-#define CCM_PCCR_PWM_MASK               (1 << CCM_PCCR_PWM_OFFSET)
-#define CCM_PCCR_RTC_MASK               (1 << CCM_PCCR_RTC_OFFSET)
-#define CCM_PCCR_SDHC1_MASK             (1 << CCM_PCCR_SDHC1_OFFSET)
-#define CCM_PCCR_SDHC2_MASK             (1 << CCM_PCCR_SDHC2_OFFSET)
-#define CCM_PCCR_SLCDC_MASK             (1 << CCM_PCCR_SLCDC_OFFSET)
-#define CCM_PCCR_SSI1_BAUD_MASK         (1 << CCM_PCCR_SSI1_BAUD_OFFSET)
-#define CCM_PCCR_SSI1_IPG_MASK          (1 << CCM_PCCR_SSI1_IPG_OFFSET)
-#define CCM_PCCR_SSI2_BAUD_MASK         (1 << CCM_PCCR_SSI2_BAUD_OFFSET)
-#define CCM_PCCR_SSI2_IPG_MASK          (1 << CCM_PCCR_SSI2_IPG_OFFSET)
-#define CCM_PCCR_UART1_MASK             (1 << CCM_PCCR_UART1_OFFSET)
-#define CCM_PCCR_UART2_MASK             (1 << CCM_PCCR_UART2_OFFSET)
-#define CCM_PCCR_UART3_MASK             (1 << CCM_PCCR_UART3_OFFSET)
-#define CCM_PCCR_UART4_MASK             (1 << CCM_PCCR_UART4_OFFSET)
-#define CCM_PCCR_USBOTG_MASK            (1 << CCM_PCCR_USBOTG_OFFSET)
-#define CCM_PCCR_WDT_MASK               (1 << CCM_PCCR_WDT_OFFSET)
-
-
-#define CCM_CCSR_32KSR          (1 << 15)
-
-#define CCM_CCSR_CLKMODE1       (1 << 9)
-#define CCM_CCSR_CLKMODE0       (1 << 8)
-
-#define CCM_CCSR_CLKOSEL_OFFSET 0
-#define CCM_CCSR_CLKOSEL_MASK   0x1f
-
-#define SYS_FMCR                0x14    /*  Functional Muxing Control Reg */
-#define SYS_CHIP_ID             0x00    /* The offset of CHIP ID register */
-
-#endif /* __ARCH_ARM_MACH_MX2_CRM_REGS_H__ */
diff --git a/arch/arm/mach-mx2/devices.c b/arch/arm/mach-mx2/devices.c
index 3956d82b7c4e..b91e412f7b3e 100644
--- a/arch/arm/mach-mx2/devices.c
+++ b/arch/arm/mach-mx2/devices.c
@@ -47,65 +47,31 @@
  * - i.MX21: 2 channel
  * - i.MX27: 3 channel
  */
-static struct resource mxc_spi_resources0[] = {
-        {
-               .start = CSPI1_BASE_ADDR,
-               .end = CSPI1_BASE_ADDR + SZ_4K - 1,
-               .flags = IORESOURCE_MEM,
-        }, {
-               .start = MXC_INT_CSPI1,
-               .end = MXC_INT_CSPI1,
-               .flags = IORESOURCE_IRQ,
-        },
-};
-
-static struct resource mxc_spi_resources1[] = {
-        {
-                .start = CSPI2_BASE_ADDR,
-                .end = CSPI2_BASE_ADDR + SZ_4K - 1,
-                .flags = IORESOURCE_MEM,
-        }, {
-                .start = MXC_INT_CSPI2,
-                .end = MXC_INT_CSPI2,
-                .flags = IORESOURCE_IRQ,
-        },
-};
-
-#ifdef CONFIG_MACH_MX27
-static struct resource mxc_spi_resources2[] = {
-        {
-                .start = CSPI3_BASE_ADDR,
-                .end = CSPI3_BASE_ADDR + SZ_4K - 1,
-                .flags = IORESOURCE_MEM,
-        }, {
-                .start = MXC_INT_CSPI3,
-                .end = MXC_INT_CSPI3,
-                .flags = IORESOURCE_IRQ,
-        },
-};
-#endif
-
-struct platform_device mxc_spi_device0 = {
-        .name = "spi_imx",
-        .id = 0,
-        .num_resources = ARRAY_SIZE(mxc_spi_resources0),
-        .resource = mxc_spi_resources0,
-};
+#define DEFINE_IMX_SPI_DEVICE(n, baseaddr, irq)                                 \
+        static struct resource mxc_spi_resources ## n[] = {                     \
+                {                                                               \
+                        .start = baseaddr,                                      \
+                        .end = baseaddr + SZ_4K - 1,                            \
+                        .flags = IORESOURCE_MEM,                                \
+                }, {                                                            \
+                        .start = irq,                                           \
+                        .end = irq,                                             \
+                        .flags = IORESOURCE_IRQ,                                \
+                },                                                              \
+        };                                                                      \
+                                                                                \
+        struct platform_device mxc_spi_device ## n = {                          \
+                .name = "spi_imx",                                              \
+                .id = n,                                                        \
+                .num_resources = ARRAY_SIZE(mxc_spi_resources ## n),            \
+                .resource = mxc_spi_resources ## n,                             \
+        }
 
-struct platform_device mxc_spi_device1 = {
-        .name = "spi_imx",
-        .id = 1,
-        .num_resources = ARRAY_SIZE(mxc_spi_resources1),
-        .resource = mxc_spi_resources1,
-};
+DEFINE_IMX_SPI_DEVICE(0, MX2x_CSPI1_BASE_ADDR, MX2x_INT_CSPI1);
+DEFINE_IMX_SPI_DEVICE(1, MX2x_CSPI2_BASE_ADDR, MX2x_INT_CSPI2);
 
 #ifdef CONFIG_MACH_MX27
-struct platform_device mxc_spi_device2 = {
-        .name = "spi_imx",
-        .id = 2,
-        .num_resources = ARRAY_SIZE(mxc_spi_resources2),
-        .resource = mxc_spi_resources2,
-};
+DEFINE_IMX_SPI_DEVICE(2, MX27_CSPI3_BASE_ADDR, MX27_INT_CSPI3);
 #endif
 
 /*
@@ -113,104 +79,34 @@ struct platform_device mxc_spi_device2 = {
  * - i.MX21: 3 timers
  * - i.MX27: 6 timers
  */
-
-/* We use gpt0 as system timer, so do not add a device for this one */
-
-static struct resource timer1_resources[] = {
-        {
-                .start  = GPT2_BASE_ADDR,
-                .end    = GPT2_BASE_ADDR + 0x17,
-                .flags  = IORESOURCE_MEM,
-        }, {
-                .start   = MXC_INT_GPT2,
-                .end     = MXC_INT_GPT2,
-                .flags   = IORESOURCE_IRQ,
-        }
-};
-
-struct platform_device mxc_gpt1 = {
-        .name = "imx_gpt",
-        .id = 1,
-        .num_resources = ARRAY_SIZE(timer1_resources),
-        .resource = timer1_resources,
-};
-
-static struct resource timer2_resources[] = {
-        {
-                .start  = GPT3_BASE_ADDR,
-                .end    = GPT3_BASE_ADDR + 0x17,
-                .flags  = IORESOURCE_MEM,
-        }, {
-                .start   = MXC_INT_GPT3,
-                .end     = MXC_INT_GPT3,
-                .flags   = IORESOURCE_IRQ,
+#define DEFINE_IMX_GPT_DEVICE(n, baseaddr, irq)                         \
+        static struct resource timer ## n ##_resources[] = {            \
+                {                                                       \
+                        .start = baseaddr,                              \
+                        .end = baseaddr + SZ_4K - 1,                    \
+                        .flags = IORESOURCE_MEM,                        \
+                }, {                                                    \
+                        .start = irq,                                   \
+                        .end = irq,                                     \
+                        .flags = IORESOURCE_IRQ,                        \
+                }                                                       \
+        };                                                              \
+                                                                        \
+        struct platform_device mxc_gpt ## n = {                         \
+                .name = "imx_gpt",                                      \
+                .id = n,                                                \
+                .num_resources = ARRAY_SIZE(timer ## n ## _resources),  \
+                .resource = timer ## n ## _resources,                   \
         }
-};
 
-struct platform_device mxc_gpt2 = {
-        .name = "imx_gpt",
-        .id = 2,
-        .num_resources = ARRAY_SIZE(timer2_resources),
-        .resource = timer2_resources,
-};
+/* We use gpt1 as system timer, so do not add a device for this one */
+DEFINE_IMX_GPT_DEVICE(1, MX2x_GPT2_BASE_ADDR, MX2x_INT_GPT2);
+DEFINE_IMX_GPT_DEVICE(2, MX2x_GPT3_BASE_ADDR, MX2x_INT_GPT3);
 
 #ifdef CONFIG_MACH_MX27
-static struct resource timer3_resources[] = {
-        {
-                .start  = GPT4_BASE_ADDR,
-                .end    = GPT4_BASE_ADDR + 0x17,
-                .flags  = IORESOURCE_MEM,
-        }, {
-                .start   = MXC_INT_GPT4,
-                .end     = MXC_INT_GPT4,
-                .flags   = IORESOURCE_IRQ,
-        }
-};
-
-struct platform_device mxc_gpt3 = {
-        .name = "imx_gpt",
-        .id = 3,
-        .num_resources = ARRAY_SIZE(timer3_resources),
-        .resource = timer3_resources,
-};
-
-static struct resource timer4_resources[] = {
-        {
-                .start  = GPT5_BASE_ADDR,
-                .end    = GPT5_BASE_ADDR + 0x17,
-                .flags  = IORESOURCE_MEM,
-        }, {
-                .start   = MXC_INT_GPT5,
-                .end     = MXC_INT_GPT5,
-                .flags   = IORESOURCE_IRQ,
-        }
-};
-
-struct platform_device mxc_gpt4 = {
-        .name = "imx_gpt",
-        .id = 4,
-        .num_resources = ARRAY_SIZE(timer4_resources),
-        .resource = timer4_resources,
-};
-
-static struct resource timer5_resources[] = {
-        {
-                .start  = GPT6_BASE_ADDR,
-                .end    = GPT6_BASE_ADDR + 0x17,
-                .flags  = IORESOURCE_MEM,
-        }, {
-                .start   = MXC_INT_GPT6,
-                .end     = MXC_INT_GPT6,
-                .flags   = IORESOURCE_IRQ,
-        }
-};
-
-struct platform_device mxc_gpt5 = {
-        .name = "imx_gpt",
-        .id = 5,
-        .num_resources = ARRAY_SIZE(timer5_resources),
-        .resource = timer5_resources,
-};
+DEFINE_IMX_GPT_DEVICE(3, MX27_GPT4_BASE_ADDR, MX27_INT_GPT4);
+DEFINE_IMX_GPT_DEVICE(4, MX27_GPT5_BASE_ADDR, MX27_INT_GPT5);
+DEFINE_IMX_GPT_DEVICE(5, MX27_GPT6_BASE_ADDR, MX27_INT_GPT6);
 #endif
 
 /*
@@ -221,9 +117,9 @@ struct platform_device mxc_gpt5 = {
  */
 static struct resource mxc_wdt_resources[] = {
         {
-                .start  = WDOG_BASE_ADDR,
-                .end    = WDOG_BASE_ADDR + 0x30,
-                .flags  = IORESOURCE_MEM,
+                .start = MX2x_WDOG_BASE_ADDR,
+                .end = MX2x_WDOG_BASE_ADDR + SZ_4K - 1,
+                .flags = IORESOURCE_MEM,
         },
 };
 
@@ -236,8 +132,8 @@ struct platform_device mxc_wdt = {
 
 static struct resource mxc_w1_master_resources[] = {
         {
-                .start = OWIRE_BASE_ADDR,
-                .end   = OWIRE_BASE_ADDR + SZ_4K - 1,
+                .start = MX2x_OWIRE_BASE_ADDR,
+                .end = MX2x_OWIRE_BASE_ADDR + SZ_4K - 1,
                 .flags = IORESOURCE_MEM,
         },
 };
@@ -249,24 +145,33 @@ struct platform_device mxc_w1_master_device = {
         .resource = mxc_w1_master_resources,
 };
 
-static struct resource mxc_nand_resources[] = {
-        {
-                .start  = NFC_BASE_ADDR,
-                .end    = NFC_BASE_ADDR + 0xfff,
-                .flags  = IORESOURCE_MEM,
-        }, {
-                .start  = MXC_INT_NANDFC,
-                .end    = MXC_INT_NANDFC,
-                .flags  = IORESOURCE_IRQ,
-        },
-};
+#define DEFINE_MXC_NAND_DEVICE(pfx, baseaddr, irq)                      \
+        static struct resource pfx ## _nand_resources[] = {             \
+                {                                                       \
+                        .start = baseaddr,                              \
+                        .end = baseaddr + SZ_4K - 1,                    \
+                        .flags = IORESOURCE_MEM,                        \
+                }, {                                                    \
+                        .start = irq,                                   \
+                        .end = irq,                                     \
+                        .flags = IORESOURCE_IRQ,                        \
+                },                                                      \
+        };                                                              \
+                                                                        \
+        struct platform_device pfx ## _nand_device = {                  \
+                .name = "mxc_nand",                                     \
+                .id = 0,                                                \
+                .num_resources = ARRAY_SIZE(pfx ## _nand_resources),    \
+                .resource = pfx ## _nand_resources,                     \
+        }
 
-struct platform_device mxc_nand_device = {
-        .name = "mxc_nand",
-        .id = 0,
-        .num_resources = ARRAY_SIZE(mxc_nand_resources),
-        .resource = mxc_nand_resources,
-};
+#ifdef CONFIG_MACH_MX21
+DEFINE_MXC_NAND_DEVICE(imx21, MX21_NFC_BASE_ADDR, MX21_INT_NANDFC);
+#endif
+
+#ifdef CONFIG_MACH_MX27
+DEFINE_MXC_NAND_DEVICE(imx27, MX27_NFC_BASE_ADDR, MX27_INT_NANDFC);
+#endif
 
 /*
  * lcdc:
@@ -276,12 +181,12 @@ struct platform_device mxc_nand_device = {
  */
 static struct resource mxc_fb[] = {
         {
-                .start = LCDC_BASE_ADDR,
-                .end   = LCDC_BASE_ADDR + 0xFFF,
+                .start = MX2x_LCDC_BASE_ADDR,
+                .end = MX2x_LCDC_BASE_ADDR + SZ_4K - 1,
                 .flags = IORESOURCE_MEM,
         }, {
-                .start = MXC_INT_LCDC,
-                .end   = MXC_INT_LCDC,
+                .start = MX2x_INT_LCDC,
+                .end = MX2x_INT_LCDC,
                 .flags = IORESOURCE_IRQ,
         }
 };
@@ -300,13 +205,13 @@ struct platform_device mxc_fb_device = {
 #ifdef CONFIG_MACH_MX27
 static struct resource mxc_fec_resources[] = {
         {
-                .start  = FEC_BASE_ADDR,
-                .end    = FEC_BASE_ADDR + 0xfff,
-                .flags  = IORESOURCE_MEM,
+                .start = MX27_FEC_BASE_ADDR,
+                .end = MX27_FEC_BASE_ADDR + SZ_4K - 1,
+                .flags = IORESOURCE_MEM,
         }, {
-                .start  = MXC_INT_FEC,
-                .end    = MXC_INT_FEC,
-                .flags  = IORESOURCE_IRQ,
+                .start = MX27_INT_FEC,
+                .end = MX27_INT_FEC,
+                .flags = IORESOURCE_IRQ,
         },
 };
 
@@ -318,55 +223,41 @@ struct platform_device mxc_fec_device = {
 };
 #endif
 
-static struct resource mxc_i2c_1_resources[] = {
-        {
-                .start  = I2C_BASE_ADDR,
-                .end    = I2C_BASE_ADDR + 0x0fff,
-                .flags  = IORESOURCE_MEM,
-        }, {
-                .start  = MXC_INT_I2C,
-                .end    = MXC_INT_I2C,
-                .flags  = IORESOURCE_IRQ,
+#define DEFINE_IMX_I2C_DEVICE(n, baseaddr, irq)                         \
+        static struct resource mxc_i2c_resources ## n[] = {             \
+                {                                                       \
+                        .start = baseaddr,                              \
+                        .end = baseaddr + SZ_4K - 1,                    \
+                        .flags = IORESOURCE_MEM,                        \
+                }, {                                                    \
+                        .start = irq,                                   \
+                        .end = irq,                                     \
+                        .flags = IORESOURCE_IRQ,                        \
+                }                                                       \
+        };                                                              \
+                                                                        \
+        struct platform_device mxc_i2c_device ## n = {                  \
+                .name = "imx-i2c",                                      \
+                .id = n,                                                \
+                .num_resources = ARRAY_SIZE(mxc_i2c_resources ## n),    \
+                .resource = mxc_i2c_resources ## n,                     \
         }
-};
 
-struct platform_device mxc_i2c_device0 = {
-        .name = "imx-i2c",
-        .id = 0,
-        .num_resources = ARRAY_SIZE(mxc_i2c_1_resources),
-        .resource = mxc_i2c_1_resources,
-};
+DEFINE_IMX_I2C_DEVICE(0, MX2x_I2C_BASE_ADDR, MX2x_INT_I2C);
 
 #ifdef CONFIG_MACH_MX27
-static struct resource mxc_i2c_2_resources[] = {
-        {
-                .start  = I2C2_BASE_ADDR,
-                .end    = I2C2_BASE_ADDR + 0x0fff,
-                .flags  = IORESOURCE_MEM,
-        }, {
-                .start  = MXC_INT_I2C2,
-                .end    = MXC_INT_I2C2,
-                .flags  = IORESOURCE_IRQ,
-        }
-};
-
-struct platform_device mxc_i2c_device1 = {
-        .name = "imx-i2c",
-        .id = 1,
-        .num_resources = ARRAY_SIZE(mxc_i2c_2_resources),
-        .resource = mxc_i2c_2_resources,
-};
+DEFINE_IMX_I2C_DEVICE(1, MX27_I2C2_BASE_ADDR, MX27_INT_I2C2);
 #endif
 
 static struct resource mxc_pwm_resources[] = {
         {
-                .start  = PWM_BASE_ADDR,
-                .end    = PWM_BASE_ADDR + 0x0fff,
-                .flags  = IORESOURCE_MEM,
+                .start = MX2x_PWM_BASE_ADDR,
+                .end = MX2x_PWM_BASE_ADDR + SZ_4K - 1,
+                .flags = IORESOURCE_MEM,
         }, {
-                .start   = MXC_INT_PWM,
-                .end     = MXC_INT_PWM,
-                .flags   = IORESOURCE_IRQ,
+                .start = MX2x_INT_PWM,
+                .end = MX2x_INT_PWM,
+                .flags = IORESOURCE_IRQ,
         }
 };
 
@@ -377,77 +268,49 @@ struct platform_device mxc_pwm_device = {
         .resource = mxc_pwm_resources,
 };
 
-/*
- * Resource definition for the MXC SDHC
- */
-static struct resource mxc_sdhc1_resources[] = {
-        {
-                .start = SDHC1_BASE_ADDR,
-                .end   = SDHC1_BASE_ADDR + SZ_4K - 1,
-                .flags = IORESOURCE_MEM,
-        }, {
-                .start = MXC_INT_SDHC1,
-                .end   = MXC_INT_SDHC1,
-                .flags = IORESOURCE_IRQ,
-        }, {
-                .start  = DMA_REQ_SDHC1,
-                .end    = DMA_REQ_SDHC1,
-                .flags  = IORESOURCE_DMA,
-        },
-};
-
-static u64 mxc_sdhc1_dmamask = DMA_BIT_MASK(32);
-
-struct platform_device mxc_sdhc_device0 = {
-        .name           = "mxc-mmc",
-        .id             = 0,
-        .dev            = {
-                .dma_mask = &mxc_sdhc1_dmamask,
-                .coherent_dma_mask = DMA_BIT_MASK(32),
-        },
-        .num_resources  = ARRAY_SIZE(mxc_sdhc1_resources),
-        .resource       = mxc_sdhc1_resources,
-};
-
-static struct resource mxc_sdhc2_resources[] = {
-        {
-                .start = SDHC2_BASE_ADDR,
-                .end   = SDHC2_BASE_ADDR + SZ_4K - 1,
-                .flags = IORESOURCE_MEM,
-        }, {
-                .start = MXC_INT_SDHC2,
-                .end   = MXC_INT_SDHC2,
-                .flags = IORESOURCE_IRQ,
-        }, {
-                .start  = DMA_REQ_SDHC2,
-                .end    = DMA_REQ_SDHC2,
-                .flags  = IORESOURCE_DMA,
-        },
-};
-
-static u64 mxc_sdhc2_dmamask = DMA_BIT_MASK(32);
+#define DEFINE_MXC_MMC_DEVICE(n, baseaddr, irq, dmareq)                 \
+        static struct resource mxc_sdhc_resources ## n[] = {            \
+                {                                                       \
+                        .start = baseaddr,                              \
+                        .end = baseaddr + SZ_4K - 1,                    \
+                        .flags = IORESOURCE_MEM,                        \
+                }, {                                                    \
+                        .start = irq,                                   \
+                        .end = irq,                                     \
+                        .flags = IORESOURCE_IRQ,                        \
+                }, {                                                    \
+                        .start = dmareq,                                \
+                        .end = dmareq,                                  \
+                        .flags = IORESOURCE_DMA,                        \
+                },                                                      \
+        };                                                              \
+                                                                        \
+        static u64 mxc_sdhc ## n ## _dmamask = DMA_BIT_MASK(32);        \
+                                                                        \
+        struct platform_device mxc_sdhc_device ## n = {                 \
+                .name = "mxc-mmc",                                      \
+                .id = n,                                                \
+                .dev = {                                                \
+                        .dma_mask = &mxc_sdhc ## n ## _dmamask,         \
+                        .coherent_dma_mask = DMA_BIT_MASK(32),          \
+                },                                                      \
+                .num_resources = ARRAY_SIZE(mxc_sdhc_resources ## n),   \
+                .resource = mxc_sdhc_resources ## n,            \
+        }
 
-struct platform_device mxc_sdhc_device1 = {
-        .name           = "mxc-mmc",
-        .id             = 1,
-        .dev            = {
-                .dma_mask = &mxc_sdhc2_dmamask,
-                .coherent_dma_mask = DMA_BIT_MASK(32),
-        },
-        .num_resources  = ARRAY_SIZE(mxc_sdhc2_resources),
-        .resource       = mxc_sdhc2_resources,
-};
+DEFINE_MXC_MMC_DEVICE(0, MX2x_SDHC1_BASE_ADDR, MX2x_INT_SDHC1, MX2x_DMA_REQ_SDHC1);
+DEFINE_MXC_MMC_DEVICE(1, MX2x_SDHC2_BASE_ADDR, MX2x_INT_SDHC2, MX2x_DMA_REQ_SDHC2);
 
 #ifdef CONFIG_MACH_MX27
 static struct resource otg_resources[] = {
         {
-                .start  = OTG_BASE_ADDR,
-                .end    = OTG_BASE_ADDR + 0x1ff,
-                .flags  = IORESOURCE_MEM,
+                .start = MX27_USBOTG_BASE_ADDR,
+                .end = MX27_USBOTG_BASE_ADDR + 0x1ff,
+                .flags = IORESOURCE_MEM,
         }, {
-                .start  = MXC_INT_USB3,
-                .end    = MXC_INT_USB3,
-                .flags  = IORESOURCE_IRQ,
+                .start = MX27_INT_USB3,
+                .end = MX27_INT_USB3,
+                .flags = IORESOURCE_IRQ,
         },
 };
 
@@ -483,12 +346,12 @@ static u64 usbh1_dmamask = DMA_BIT_MASK(32);
 
 static struct resource mxc_usbh1_resources[] = {
         {
-                .start = OTG_BASE_ADDR + 0x200,
-                .end = OTG_BASE_ADDR + 0x3ff,
+                .start = MX27_USBOTG_BASE_ADDR + 0x200,
+                .end = MX27_USBOTG_BASE_ADDR + 0x3ff,
                 .flags = IORESOURCE_MEM,
         }, {
-                .start = MXC_INT_USB1,
-                .end = MXC_INT_USB1,
+                .start = MX27_INT_USB1,
+                .end = MX27_INT_USB1,
                 .flags = IORESOURCE_IRQ,
         },
 };
@@ -509,12 +372,12 @@ static u64 usbh2_dmamask = DMA_BIT_MASK(32);
 
 static struct resource mxc_usbh2_resources[] = {
         {
-                .start = OTG_BASE_ADDR + 0x400,
-                .end = OTG_BASE_ADDR + 0x5ff,
+                .start = MX27_USBOTG_BASE_ADDR + 0x400,
+                .end = MX27_USBOTG_BASE_ADDR + 0x5ff,
                 .flags = IORESOURCE_MEM,
         }, {
-                .start = MXC_INT_USB2,
-                .end = MXC_INT_USB2,
+                .start = MX27_INT_USB2,
+                .end = MX27_INT_USB2,
                 .flags = IORESOURCE_IRQ,
         },
 };
@@ -531,129 +394,102 @@ struct platform_device mxc_usbh2 = {
 };
 #endif
 
-static struct resource imx_ssi_resources0[] = {
-        {
-                .start  = SSI1_BASE_ADDR,
-                .end    = SSI1_BASE_ADDR + 0x6F,
-                .flags  = IORESOURCE_MEM,
-        }, {
-                .start  = MXC_INT_SSI1,
-                .end    = MXC_INT_SSI1,
-                .flags  = IORESOURCE_IRQ,
-        }, {
-                .name   = "tx0",
-                .start  = DMA_REQ_SSI1_TX0,
-                .end    = DMA_REQ_SSI1_TX0,
-                .flags  = IORESOURCE_DMA,
-        }, {
-                .name   = "rx0",
-                .start  = DMA_REQ_SSI1_RX0,
-                .end    = DMA_REQ_SSI1_RX0,
-                .flags  = IORESOURCE_DMA,
-        }, {
-                .name   = "tx1",
-                .start  = DMA_REQ_SSI1_TX1,
-                .end    = DMA_REQ_SSI1_TX1,
-                .flags  = IORESOURCE_DMA,
-        }, {
-                .name   = "rx1",
-                .start  = DMA_REQ_SSI1_RX1,
-                .end    = DMA_REQ_SSI1_RX1,
-                .flags  = IORESOURCE_DMA,
-        },
-};
-
-static struct resource imx_ssi_resources1[] = {
-        {
-                .start  = SSI2_BASE_ADDR,
-                .end    = SSI2_BASE_ADDR + 0x6F,
-                .flags  = IORESOURCE_MEM,
-        }, {
-                .start  = MXC_INT_SSI2,
-                .end    = MXC_INT_SSI2,
-                .flags  = IORESOURCE_IRQ,
-        }, {
-                .name   = "tx0",
-                .start  = DMA_REQ_SSI2_TX0,
-                .end    = DMA_REQ_SSI2_TX0,
-                .flags  = IORESOURCE_DMA,
-        }, {
-                .name   = "rx0",
-                .start  = DMA_REQ_SSI2_RX0,
-                .end    = DMA_REQ_SSI2_RX0,
-                .flags  = IORESOURCE_DMA,
-        }, {
-                .name   = "tx1",
-                .start  = DMA_REQ_SSI2_TX1,
-                .end    = DMA_REQ_SSI2_TX1,
-                .flags  = IORESOURCE_DMA,
-        }, {
-                .name   = "rx1",
-                .start  = DMA_REQ_SSI2_RX1,
-                .end    = DMA_REQ_SSI2_RX1,
-                .flags  = IORESOURCE_DMA,
-        },
-};
+#define DEFINE_IMX_SSI_DMARES(_name, ssin, suffix)                      \
+        {                                                               \
+                .name = _name,                                          \
+                .start = MX2x_DMA_REQ_SSI ## ssin ## _ ## suffix,       \
+                .end = MX2x_DMA_REQ_SSI ## ssin ## _ ## suffix,         \
+                .flags = IORESOURCE_DMA,                                \
+        }
 
-struct platform_device imx_ssi_device0 = {
-        .name = "imx-ssi",
-        .id = 0,
-        .num_resources = ARRAY_SIZE(imx_ssi_resources0),
-        .resource = imx_ssi_resources0,
-};
+#define DEFINE_IMX_SSI_DEVICE(n, ssin, baseaddr, irq)                   \
+        static struct resource imx_ssi_resources ## n[] = {             \
+                {                                                       \
+                        .start = MX2x_SSI ## ssin ## _BASE_ADDR,        \
+                        .end = MX2x_SSI ## ssin ## _BASE_ADDR + 0x6f,   \
+                        .flags = IORESOURCE_MEM,                        \
+                }, {                                                    \
+                        .start = MX2x_INT_SSI1,                         \
+                        .end = MX2x_INT_SSI1,                           \
+                        .flags = IORESOURCE_IRQ,                        \
+                },                                                      \
+                DEFINE_IMX_SSI_DMARES("tx0", ssin, TX0),                \
+                DEFINE_IMX_SSI_DMARES("rx0", ssin, RX0),                \
+                DEFINE_IMX_SSI_DMARES("tx1", ssin, TX1),                \
+                DEFINE_IMX_SSI_DMARES("rx1", ssin, RX1),                \
+        };                                                              \
+                                                                        \
+        struct platform_device imx_ssi_device ## n = {                  \
+                .name = "imx-ssi",                                      \
+                .id = n,                                                \
+                .num_resources = ARRAY_SIZE(imx_ssi_resources ## n),    \
+                .resource = imx_ssi_resources ## n,                     \
+        }
 
-struct platform_device imx_ssi_device1 = {
-        .name = "imx-ssi",
-        .id = 1,
-        .num_resources = ARRAY_SIZE(imx_ssi_resources1),
-        .resource = imx_ssi_resources1,
-};
+DEFINE_IMX_SSI_DEVICE(0, 1, MX2x_SSI1_BASE_ADDR, MX2x_INT_SSI1);
+DEFINE_IMX_SSI_DEVICE(1, 2, MX2x_SSI1_BASE_ADDR, MX2x_INT_SSI1);
 
 /* GPIO port description */
-static struct mxc_gpio_port imx_gpio_ports[] = {
-        {
-                .chip.label = "gpio-0",
-                .irq = MXC_INT_GPIO,
-                .base = IO_ADDRESS(GPIO_BASE_ADDR),
-                .virtual_irq_start = MXC_GPIO_IRQ_START,
-        }, {
-                .chip.label = "gpio-1",
-                .base = IO_ADDRESS(GPIO_BASE_ADDR + 0x100),
-                .virtual_irq_start = MXC_GPIO_IRQ_START + 32,
-        }, {
-                .chip.label = "gpio-2",
-                .base = IO_ADDRESS(GPIO_BASE_ADDR + 0x200),
-                .virtual_irq_start = MXC_GPIO_IRQ_START + 64,
-        }, {
-                .chip.label = "gpio-3",
-                .base = IO_ADDRESS(GPIO_BASE_ADDR + 0x300),
-                .virtual_irq_start = MXC_GPIO_IRQ_START + 96,
-        }, {
-                .chip.label = "gpio-4",
-                .base = IO_ADDRESS(GPIO_BASE_ADDR + 0x400),
-                .virtual_irq_start = MXC_GPIO_IRQ_START + 128,
-        }, {
-                .chip.label = "gpio-5",
-                .base = IO_ADDRESS(GPIO_BASE_ADDR + 0x500),
-                .virtual_irq_start = MXC_GPIO_IRQ_START + 160,
+#define DEFINE_MXC_GPIO_PORT_IRQ(SOC, n, _irq)                          \
+        {                                                               \
+                .chip.label = "gpio-" #n,                               \
+                .irq = _irq,                                            \
+                .base = SOC ## _IO_ADDRESS(MX2x_GPIO_BASE_ADDR +        \
+                                n * 0x100),                             \
+                .virtual_irq_start = MXC_GPIO_IRQ_START + n * 32,       \
         }
-};
+
+#define DEFINE_MXC_GPIO_PORT(SOC, n)                                    \
+        {                                                               \
+                .chip.label = "gpio-" #n,                               \
+                .base = SOC ## _IO_ADDRESS(MX2x_GPIO_BASE_ADDR +        \
+                                n * 0x100),                             \
+                .virtual_irq_start = MXC_GPIO_IRQ_START + n * 32,       \
+        }
+
+#define DEFINE_MXC_GPIO_PORTS(SOC, pfx)                                 \
+        static struct mxc_gpio_port pfx ## _gpio_ports[] = {            \
+                DEFINE_MXC_GPIO_PORT_IRQ(SOC, 0, SOC ## _INT_GPIO),     \
+                DEFINE_MXC_GPIO_PORT(SOC, 1),                           \
+                DEFINE_MXC_GPIO_PORT(SOC, 2),                           \
+                DEFINE_MXC_GPIO_PORT(SOC, 3),                           \
+                DEFINE_MXC_GPIO_PORT(SOC, 4),                           \
+                DEFINE_MXC_GPIO_PORT(SOC, 5),                           \
+        }
+
+#ifdef CONFIG_MACH_MX21
+DEFINE_MXC_GPIO_PORTS(MX21, imx21);
+#endif
+
+#ifdef CONFIG_MACH_MX27
+DEFINE_MXC_GPIO_PORTS(MX27, imx27);
+#endif
 
 int __init mxc_register_gpios(void)
 {
-        return mxc_gpio_init(imx_gpio_ports, ARRAY_SIZE(imx_gpio_ports));
+#ifdef CONFIG_MACH_MX21
+        if (cpu_is_mx21())
+                return mxc_gpio_init(imx21_gpio_ports, ARRAY_SIZE(imx21_gpio_ports));
+        else
+#endif
+#ifdef CONFIG_MACH_MX27
+        if (cpu_is_mx27())
+                return mxc_gpio_init(imx27_gpio_ports, ARRAY_SIZE(imx27_gpio_ports));
+        else
+#endif
+                return 0;
 }
 
 #ifdef CONFIG_MACH_MX21
 static struct resource mx21_usbhc_resources[] = {
         {
-                .start  = USBOTG_BASE_ADDR,
-                .end    = USBOTG_BASE_ADDR + 0x1FFF,
+                .start  = MX21_BASE_ADDR,
+                .end    = MX21_BASE_ADDR + 0x1FFF,
                 .flags  = IORESOURCE_MEM,
         },
         {
-                .start          = MXC_INT_USBHOST,
-                .end            = MXC_INT_USBHOST,
+                .start          = MX21_INT_USBHOST,
+                .end            = MX21_INT_USBHOST,
                 .flags          = IORESOURCE_IRQ,
         },
 };
diff --git a/arch/arm/mach-mx2/devices.h b/arch/arm/mach-mx2/devices.h
index f12694b07369..84ed51380174 100644
--- a/arch/arm/mach-mx2/devices.h
+++ b/arch/arm/mach-mx2/devices.h
@@ -1,8 +1,10 @@
 extern struct platform_device mxc_gpt1;
 extern struct platform_device mxc_gpt2;
+#ifdef CONFIG_MACH_MX27
 extern struct platform_device mxc_gpt3;
 extern struct platform_device mxc_gpt4;
 extern struct platform_device mxc_gpt5;
+#endif
 extern struct platform_device mxc_wdt;
 extern struct platform_device mxc_uart_device0;
 extern struct platform_device mxc_uart_device1;
@@ -11,12 +13,19 @@ extern struct platform_device mxc_uart_device3;
 extern struct platform_device mxc_uart_device4;
 extern struct platform_device mxc_uart_device5;
 extern struct platform_device mxc_w1_master_device;
-extern struct platform_device mxc_nand_device;
+#ifdef CONFIG_MACH_MX21
+extern struct platform_device imx21_nand_device;
+#endif
+#ifdef CONFIG_MACH_MX27
+extern struct platform_device imx27_nand_device;
+#endif
 extern struct platform_device mxc_fb_device;
 extern struct platform_device mxc_fec_device;
 extern struct platform_device mxc_pwm_device;
 extern struct platform_device mxc_i2c_device0;
+#ifdef CONFIG_MACH_MX27
 extern struct platform_device mxc_i2c_device1;
+#endif
 extern struct platform_device mxc_sdhc_device0;
 extern struct platform_device mxc_sdhc_device1;
 extern struct platform_device mxc_otg_udc_device;
@@ -25,7 +34,9 @@ extern struct platform_device mxc_usbh1;
 extern struct platform_device mxc_usbh2;
 extern struct platform_device mxc_spi_device0;
 extern struct platform_device mxc_spi_device1;
+#ifdef CONFIG_MACH_MX27
 extern struct platform_device mxc_spi_device2;
+#endif
 extern struct platform_device mx21_usbhc_device;
 extern struct platform_device imx_ssi_device0;
 extern struct platform_device imx_ssi_device1;
diff --git a/arch/arm/mach-mx2/eukrea_mbimx27-baseboard.c b/arch/arm/mach-mx2/eukrea_mbimx27-baseboard.c
index 7382b6d27ee1..f3b169d5245f 100644
--- a/arch/arm/mach-mx2/eukrea_mbimx27-baseboard.c
+++ b/arch/arm/mach-mx2/eukrea_mbimx27-baseboard.c
@@ -28,7 +28,7 @@
 #include <asm/mach/arch.h>
 
 #include <mach/common.h>
-#include <mach/iomux.h>
+#include <mach/iomux-mx27.h>
 #include <mach/imxfb.h>
 #include <mach/hardware.h>
 #include <mach/mmc.h>
diff --git a/arch/arm/mach-mx2/eukrea_cpuimx27.c b/arch/arm/mach-mx2/mach-cpuimx27.c
index 7b187606682c..1f616dcaabc9 100644
--- a/arch/arm/mach-mx2/eukrea_cpuimx27.c
+++ b/arch/arm/mach-mx2/mach-cpuimx27.c
@@ -36,7 +36,7 @@
 #include <mach/common.h>
 #include <mach/hardware.h>
 #include <mach/i2c.h>
-#include <mach/iomux.h>
+#include <mach/iomux-mx27.h>
 #include <mach/imx-uart.h>
 #include <mach/mxc_nand.h>
 
@@ -142,28 +142,28 @@ static struct i2c_board_info eukrea_cpuimx27_i2c_devices[] = {
 #if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE)
 static struct plat_serial8250_port serial_platform_data[] = {
         {
-                .mapbase = (unsigned long)(CS3_BASE_ADDR + 0x200000),
+                .mapbase = (unsigned long)(MX27_CS3_BASE_ADDR + 0x200000),
                 .irq = IRQ_GPIOB(23),
                 .uartclk = 14745600,
                 .regshift = 1,
                 .iotype = UPIO_MEM,
                 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP,
         }, {
-                .mapbase = (unsigned long)(CS3_BASE_ADDR + 0x400000),
+                .mapbase = (unsigned long)(MX27_CS3_BASE_ADDR + 0x400000),
                 .irq = IRQ_GPIOB(22),
                 .uartclk = 14745600,
                 .regshift = 1,
                 .iotype = UPIO_MEM,
                 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP,
         }, {
-                .mapbase = (unsigned long)(CS3_BASE_ADDR + 0x800000),
+                .mapbase = (unsigned long)(MX27_CS3_BASE_ADDR + 0x800000),
                 .irq = IRQ_GPIOB(27),
                 .uartclk = 14745600,
                 .regshift = 1,
                 .iotype = UPIO_MEM,
                 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP,
         }, {
-                .mapbase = (unsigned long)(CS3_BASE_ADDR + 0x1000000),
+                .mapbase = (unsigned long)(MX27_CS3_BASE_ADDR + 0x1000000),
                 .irq = IRQ_GPIOB(30),
                 .uartclk = 14745600,
                 .regshift = 1,
@@ -189,7 +189,8 @@ static void __init eukrea_cpuimx27_init(void)
 
         mxc_register_device(&mxc_uart_device0, &uart_pdata[0]);
 
-        mxc_register_device(&mxc_nand_device, &eukrea_cpuimx27_nand_board_info);
+        mxc_register_device(&imx27_nand_device,
+                        &eukrea_cpuimx27_nand_board_info);
 
         i2c_register_board_info(0, eukrea_cpuimx27_i2c_devices,
                                 ARRAY_SIZE(eukrea_cpuimx27_i2c_devices));
@@ -224,9 +225,9 @@ static struct sys_timer eukrea_cpuimx27_timer = {
 };
 
 MACHINE_START(CPUIMX27, "EUKREA CPUIMX27")
-        .phys_io        = AIPI_BASE_ADDR,
-        .io_pg_offst    = ((AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc,
-        .boot_params    = PHYS_OFFSET + 0x100,
+        .phys_io        = MX27_AIPI_BASE_ADDR,
+        .io_pg_offst    = ((MX27_AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc,
+        .boot_params    = MX27_PHYS_OFFSET + 0x100,
         .map_io         = mx27_map_io,
         .init_irq       = mx27_init_irq,
         .init_machine   = eukrea_cpuimx27_init,
diff --git a/arch/arm/mach-mx2/mx27lite.c b/arch/arm/mach-mx2/mach-imx27lite.c
index 82ea227ea0cf..b5710bf18b96 100644
--- a/arch/arm/mach-mx2/mx27lite.c
+++ b/arch/arm/mach-mx2/mach-imx27lite.c
@@ -27,7 +27,7 @@
 #include <mach/hardware.h>
 #include <mach/common.h>
 #include <mach/imx-uart.h>
-#include <mach/iomux.h>
+#include <mach/iomux-mx27.h>
 #include <mach/board-mx27lite.h>
 
 #include "devices.h"
@@ -85,9 +85,9 @@ static struct sys_timer mx27lite_timer = {
 };
 
 MACHINE_START(IMX27LITE, "LogicPD i.MX27LITE")
-        .phys_io        = AIPI_BASE_ADDR,
-        .io_pg_offst    = ((AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc,
-        .boot_params    = PHYS_OFFSET + 0x100,
+        .phys_io        = MX27_AIPI_BASE_ADDR,
+        .io_pg_offst    = ((MX27_AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc,
+        .boot_params    = MX27_PHYS_OFFSET + 0x100,
         .map_io         = mx27_map_io,
         .init_irq       = mx27_init_irq,
         .init_machine   = mx27lite_init,
diff --git a/arch/arm/mach-mx2/mx21ads.c b/arch/arm/mach-mx2/mach-mx21ads.c
index cf5f77cbc2f1..113e58d7cb40 100644
--- a/arch/arm/mach-mx2/mx21ads.c
+++ b/arch/arm/mach-mx2/mach-mx21ads.c
@@ -30,7 +30,7 @@
 #include <asm/mach/map.h>
 #include <mach/imx-uart.h>
 #include <mach/imxfb.h>
-#include <mach/iomux.h>
+#include <mach/iomux-mx21.h>
 #include <mach/mxc_nand.h>
 #include <mach/mmc.h>
 #include <mach/board-mx21ads.h>
@@ -118,8 +118,8 @@ static struct physmap_flash_data mx21ads_flash_data = {
 };
 
 static struct resource mx21ads_flash_resource = {
-        .start = CS0_BASE_ADDR,
-        .end = CS0_BASE_ADDR + 0x02000000 - 1,
+        .start = MX21_CS0_BASE_ADDR,
+        .end = MX21_CS0_BASE_ADDR + 0x02000000 - 1,
         .flags = IORESOURCE_MEM,
 };
 
@@ -242,7 +242,7 @@ static struct map_desc mx21ads_io_desc[] __initdata = {
          */
         {
                 .virtual = MX21ADS_MMIO_BASE_ADDR,
-                .pfn = __phys_to_pfn(CS1_BASE_ADDR),
+                .pfn = __phys_to_pfn(MX21_CS1_BASE_ADDR),
                 .length = MX21ADS_MMIO_SIZE,
                 .type = MT_DEVICE,
         },
@@ -268,7 +268,7 @@ static void __init mx21ads_board_init(void)
         mxc_register_device(&mxc_uart_device3, &uart_pdata);
         mxc_register_device(&mxc_fb_device, &mx21ads_fb_data);
         mxc_register_device(&mxc_sdhc_device0, &mx21ads_sdhc_pdata);
-        mxc_register_device(&mxc_nand_device, &mx21ads_nand_board_info);
+        mxc_register_device(&imx21_nand_device, &mx21ads_nand_board_info);
 
         platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
 }
@@ -284,9 +284,9 @@ static struct sys_timer mx21ads_timer = {
 
 MACHINE_START(MX21ADS, "Freescale i.MX21ADS")
         /* maintainer: Freescale Semiconductor, Inc. */
-        .phys_io        = AIPI_BASE_ADDR,
-        .io_pg_offst    = ((AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc,
-        .boot_params    = PHYS_OFFSET + 0x100,
+        .phys_io        = MX21_AIPI_BASE_ADDR,
+        .io_pg_offst    = ((MX21_AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc,
+        .boot_params    = MX21_PHYS_OFFSET + 0x100,
         .map_io         = mx21ads_map_io,
         .init_irq       = mx21_init_irq,
         .init_machine   = mx21ads_board_init,
diff --git a/arch/arm/mach-mx2/mx27pdk.c b/arch/arm/mach-mx2/mach-mx27_3ds.c
index 6761d1b79e43..b2f4e0db3fb3 100644
--- a/arch/arm/mach-mx2/mx27pdk.c
+++ b/arch/arm/mach-mx2/mach-mx27_3ds.c
@@ -26,7 +26,7 @@
 #include <mach/hardware.h>
 #include <mach/common.h>
 #include <mach/imx-uart.h>
-#include <mach/iomux.h>
+#include <mach/iomux-mx27.h>
 #include <mach/board-mx27pdk.h>
 
 #include "devices.h"
@@ -85,9 +85,9 @@ static struct sys_timer mx27pdk_timer = {
 
 MACHINE_START(MX27_3DS, "Freescale MX27PDK")
         /* maintainer: Freescale Semiconductor, Inc. */
-        .phys_io        = AIPI_BASE_ADDR,
-        .io_pg_offst    = ((AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc,
-        .boot_params    = PHYS_OFFSET + 0x100,
+        .phys_io        = MX27_AIPI_BASE_ADDR,
+        .io_pg_offst    = ((MX27_AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc,
+        .boot_params    = MX27_PHYS_OFFSET + 0x100,
         .map_io         = mx27_map_io,
         .init_irq       = mx27_init_irq,
         .init_machine   = mx27pdk_init,
diff --git a/arch/arm/mach-mx2/mx27ads.c b/arch/arm/mach-mx2/mach-mx27ads.c
index 83e412b713e6..6ce323669e58 100644
--- a/arch/arm/mach-mx2/mx27ads.c
+++ b/arch/arm/mach-mx2/mach-mx27ads.c
@@ -33,7 +33,7 @@
 #include <asm/mach/map.h>
 #include <mach/gpio.h>
 #include <mach/imx-uart.h>
-#include <mach/iomux.h>
+#include <mach/iomux-mx27.h>
 #include <mach/board-mx27ads.h>
 #include <mach/mxc_nand.h>
 #include <mach/i2c.h>
@@ -290,7 +290,7 @@ static void __init mx27ads_board_init(void)
         mxc_register_device(&mxc_uart_device3, &uart_pdata[3]);
         mxc_register_device(&mxc_uart_device4, &uart_pdata[4]);
         mxc_register_device(&mxc_uart_device5, &uart_pdata[5]);
-        mxc_register_device(&mxc_nand_device, &mx27ads_nand_board_info);
+        mxc_register_device(&imx27_nand_device, &mx27ads_nand_board_info);
 
         /* only the i2c master 1 is used on this CPU card */
         i2c_register_board_info(1, mx27ads_i2c_devices,
@@ -320,7 +320,7 @@ static struct sys_timer mx27ads_timer = {
 static struct map_desc mx27ads_io_desc[] __initdata = {
         {
                 .virtual = PBC_BASE_ADDRESS,
-                .pfn = __phys_to_pfn(CS4_BASE_ADDR),
+                .pfn = __phys_to_pfn(MX27_CS4_BASE_ADDR),
                 .length = SZ_1M,
                 .type = MT_DEVICE,
         },
@@ -334,9 +334,9 @@ static void __init mx27ads_map_io(void)
 
 MACHINE_START(MX27ADS, "Freescale i.MX27ADS")
         /* maintainer: Freescale Semiconductor, Inc. */
-        .phys_io        = AIPI_BASE_ADDR,
-        .io_pg_offst    = ((AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc,
-        .boot_params    = PHYS_OFFSET + 0x100,
+        .phys_io        = MX27_AIPI_BASE_ADDR,
+        .io_pg_offst    = ((MX27_AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc,
+        .boot_params    = MX27_PHYS_OFFSET + 0x100,
         .map_io         = mx27ads_map_io,
         .init_irq       = mx27_init_irq,
         .init_machine   = mx27ads_board_init,
diff --git a/arch/arm/mach-mx2/mxt_td60.c b/arch/arm/mach-mx2/mach-mxt_td60.c
index 8bcc1a5b8829..bc3855992677 100644
--- a/arch/arm/mach-mx2/mxt_td60.c
+++ b/arch/arm/mach-mx2/mach-mxt_td60.c
@@ -33,7 +33,7 @@
 #include <asm/mach/map.h>
 #include <linux/gpio.h>
 #include <mach/imx-uart.h>
-#include <mach/iomux.h>
+#include <mach/iomux-mx27.h>
 #include <mach/mxc_nand.h>
 #include <mach/i2c.h>
 #include <linux/i2c/pca953x.h>
@@ -257,7 +257,7 @@ static void __init mxt_td60_board_init(void)
         mxc_register_device(&mxc_uart_device0, &uart_pdata[0]);
         mxc_register_device(&mxc_uart_device1, &uart_pdata[1]);
         mxc_register_device(&mxc_uart_device2, &uart_pdata[2]);
-        mxc_register_device(&mxc_nand_device, &mxt_td60_nand_board_info);
+        mxc_register_device(&imx27_nand_device, &mxt_td60_nand_board_info);
 
         i2c_register_board_info(0, mxt_td60_i2c_devices,
                                 ARRAY_SIZE(mxt_td60_i2c_devices));
@@ -284,9 +284,9 @@ static struct sys_timer mxt_td60_timer = {
 
 MACHINE_START(MXT_TD60, "Maxtrack i-MXT TD60")
         /* maintainer: Maxtrack Industrial */
-        .phys_io        = AIPI_BASE_ADDR,
-        .io_pg_offst    = ((AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc,
-        .boot_params    = PHYS_OFFSET + 0x100,
+        .phys_io        = MX27_AIPI_BASE_ADDR,
+        .io_pg_offst    = ((MX27_AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc,
+        .boot_params    = MX27_PHYS_OFFSET + 0x100,
         .map_io         = mx27_map_io,
         .init_irq       = mx27_init_irq,
         .init_machine   = mxt_td60_board_init,
diff --git a/arch/arm/mach-mx2/pca100.c b/arch/arm/mach-mx2/mach-pca100.c
index aea3d340d2e1..778fff230918 100644
--- a/arch/arm/mach-mx2/pca100.c
+++ b/arch/arm/mach-mx2/mach-pca100.c
@@ -25,25 +25,36 @@
 #include <linux/spi/spi.h>
 #include <linux/spi/eeprom.h>
 #include <linux/irq.h>
+#include <linux/delay.h>
 #include <linux/gpio.h>
+#include <linux/usb/otg.h>
+#include <linux/usb/ulpi.h>
+#include <linux/fsl_devices.h>
 
 #include <asm/mach/arch.h>
 #include <asm/mach-types.h>
 #include <mach/common.h>
 #include <mach/hardware.h>
-#include <mach/iomux.h>
+#include <mach/iomux-mx27.h>
 #include <mach/i2c.h>
 #include <asm/mach/time.h>
 #if defined(CONFIG_SPI_IMX) || defined(CONFIG_SPI_IMX_MODULE)
 #include <mach/spi.h>
 #endif
 #include <mach/imx-uart.h>
+#include <mach/audmux.h>
+#include <mach/ssi.h>
 #include <mach/mxc_nand.h>
 #include <mach/irqs.h>
 #include <mach/mmc.h>
+#include <mach/mxc_ehci.h>
+#include <mach/ulpi.h>
 
 #include "devices.h"
 
+#define OTG_PHY_CS_GPIO (GPIO_PORTB + 23)
+#define USBH2_PHY_CS_GPIO (GPIO_PORTB + 24)
+
 static int pca100_pins[] = {
         /* UART1 */
         PE12_PF_UART1_TXD,
@@ -92,6 +103,34 @@ static int pca100_pins[] = {
         PD29_PF_CSPI1_SCLK,
         PD30_PF_CSPI1_MISO,
         PD31_PF_CSPI1_MOSI,
+        /* OTG */
+        OTG_PHY_CS_GPIO | GPIO_GPIO | GPIO_OUT,
+        PC7_PF_USBOTG_DATA5,
+        PC8_PF_USBOTG_DATA6,
+        PC9_PF_USBOTG_DATA0,
+        PC10_PF_USBOTG_DATA2,
+        PC11_PF_USBOTG_DATA1,
+        PC12_PF_USBOTG_DATA4,
+        PC13_PF_USBOTG_DATA3,
+        PE0_PF_USBOTG_NXT,
+        PE1_PF_USBOTG_STP,
+        PE2_PF_USBOTG_DIR,
+        PE24_PF_USBOTG_CLK,
+        PE25_PF_USBOTG_DATA7,
+        /* USBH2 */
+        USBH2_PHY_CS_GPIO | GPIO_GPIO | GPIO_OUT,
+        PA0_PF_USBH2_CLK,
+        PA1_PF_USBH2_DIR,
+        PA2_PF_USBH2_DATA7,
+        PA3_PF_USBH2_NXT,
+        PA4_PF_USBH2_STP,
+        PD19_AF_USBH2_DATA4,
+        PD20_AF_USBH2_DATA3,
+        PD21_AF_USBH2_DATA6,
+        PD22_AF_USBH2_DATA0,
+        PD23_AF_USBH2_DATA2,
+        PD24_AF_USBH2_DATA1,
+        PD26_AF_USBH2_DATA5,
 };
 
 static struct imxuart_platform_data uart_pdata = {
@@ -157,6 +196,37 @@ static struct spi_imx_master pca100_spi_0_data = {
 };
 #endif
 
+static void pca100_ac97_warm_reset(struct snd_ac97 *ac97)
+{
+        mxc_gpio_mode(GPIO_PORTC | 20 | GPIO_GPIO | GPIO_OUT);
+        gpio_set_value(GPIO_PORTC + 20, 1);
+        udelay(2);
+        gpio_set_value(GPIO_PORTC + 20, 0);
+        mxc_gpio_mode(PC20_PF_SSI1_FS);
+        msleep(2);
+}
+
+static void pca100_ac97_cold_reset(struct snd_ac97 *ac97)
+{
+        mxc_gpio_mode(GPIO_PORTC | 20 | GPIO_GPIO | GPIO_OUT);  /* FS */
+        gpio_set_value(GPIO_PORTC + 20, 0);
+        mxc_gpio_mode(GPIO_PORTC | 22 | GPIO_GPIO | GPIO_OUT);  /* TX */
+        gpio_set_value(GPIO_PORTC + 22, 0);
+        mxc_gpio_mode(GPIO_PORTC | 28 | GPIO_GPIO | GPIO_OUT);  /* reset */
+        gpio_set_value(GPIO_PORTC + 28, 0);
+        udelay(10);
+        gpio_set_value(GPIO_PORTC + 28, 1);
+        mxc_gpio_mode(PC20_PF_SSI1_FS);
+        mxc_gpio_mode(PC22_PF_SSI1_TXD);
+        msleep(2);
+}
+
+static struct imx_ssi_platform_data pca100_ssi_pdata = {
+        .ac97_reset             = pca100_ac97_cold_reset,
+        .ac97_warm_reset        = pca100_ac97_warm_reset,
+        .flags                  = IMX_SSI_USE_AC97,
+};
+
 static int pca100_sdhc2_init(struct device *dev, irq_handler_t detect_irq,
                 void *data)
 {
@@ -182,21 +252,79 @@ static struct imxmmc_platform_data sdhc_pdata = {
         .exit = pca100_sdhc2_exit,
 };
 
+static int otg_phy_init(struct platform_device *pdev)
+{
+        gpio_set_value(OTG_PHY_CS_GPIO, 0);
+        return 0;
+}
+
+static struct mxc_usbh_platform_data otg_pdata = {
+        .init   = otg_phy_init,
+        .portsc = MXC_EHCI_MODE_ULPI,
+        .flags  = MXC_EHCI_INTERFACE_DIFF_UNI,
+};
+
+static int usbh2_phy_init(struct platform_device *pdev)
+{
+        gpio_set_value(USBH2_PHY_CS_GPIO, 0);
+        return 0;
+}
+
+static struct mxc_usbh_platform_data usbh2_pdata = {
+        .init   = usbh2_phy_init,
+        .portsc = MXC_EHCI_MODE_ULPI,
+        .flags  = MXC_EHCI_INTERFACE_DIFF_UNI,
+};
+
+static struct fsl_usb2_platform_data otg_device_pdata = {
+        .operating_mode = FSL_USB2_DR_DEVICE,
+        .phy_mode       = FSL_USB2_PHY_ULPI,
+};
+
+static int otg_mode_host;
+
+static int __init pca100_otg_mode(char *options)
+{
+        if (!strcmp(options, "host"))
+                otg_mode_host = 1;
+        else if (!strcmp(options, "device"))
+                otg_mode_host = 0;
+        else
+                pr_info("otg_mode neither \"host\" nor \"device\". "
+                        "Defaulting to device\n");
+        return 0;
+}
+__setup("otg_mode=", pca100_otg_mode);
+
 static void __init pca100_init(void)
 {
         int ret;
 
+        /* SSI unit */
+        mxc_audmux_v1_configure_port(MX27_AUDMUX_HPCR1_SSI0,
+                                  MXC_AUDMUX_V1_PCR_SYN | /* 4wire mode */
+                                  MXC_AUDMUX_V1_PCR_TFCSEL(3) |
+                                  MXC_AUDMUX_V1_PCR_TCLKDIR | /* clock is output */
+                                  MXC_AUDMUX_V1_PCR_RXDSEL(3));
+        mxc_audmux_v1_configure_port(3,
+                                  MXC_AUDMUX_V1_PCR_SYN | /* 4wire mode */
+                                  MXC_AUDMUX_V1_PCR_TFCSEL(0) |
+                                  MXC_AUDMUX_V1_PCR_TFSDIR |
+                                  MXC_AUDMUX_V1_PCR_RXDSEL(0));
+
         ret = mxc_gpio_setup_multiple_pins(pca100_pins,
                         ARRAY_SIZE(pca100_pins), "PCA100");
         if (ret)
                 printk(KERN_ERR "pca100: Failed to setup pins (%d)\n", ret);
 
+        mxc_register_device(&imx_ssi_device0, &pca100_ssi_pdata);
+
         mxc_register_device(&mxc_uart_device0, &uart_pdata);
 
         mxc_gpio_mode(GPIO_PORTC | 29 | GPIO_GPIO | GPIO_IN);
         mxc_register_device(&mxc_sdhc_device1, &sdhc_pdata);
 
-        mxc_register_device(&mxc_nand_device, &pca100_nand_board_info);
+        mxc_register_device(&imx27_nand_device, &pca100_nand_board_info);
 
         /* only the i2c master 1 is used on this CPU card */
         i2c_register_board_info(1, pca100_i2c_devices,
@@ -220,6 +348,29 @@ static void __init pca100_init(void)
         mxc_register_device(&mxc_spi_device0, &pca100_spi_0_data);
 #endif
 
+        gpio_request(OTG_PHY_CS_GPIO, "usb-otg-cs");
+        gpio_direction_output(OTG_PHY_CS_GPIO, 1);
+        gpio_request(USBH2_PHY_CS_GPIO, "usb-host2-cs");
+        gpio_direction_output(USBH2_PHY_CS_GPIO, 1);
+
+#if defined(CONFIG_USB_ULPI)
+        if (otg_mode_host) {
+                otg_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops,
+                                USB_OTG_DRV_VBUS | USB_OTG_DRV_VBUS_EXT);
+
+                mxc_register_device(&mxc_otg_host, &otg_pdata);
+        }
+
+        usbh2_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops,
+                                USB_OTG_DRV_VBUS | USB_OTG_DRV_VBUS_EXT);
+
+        mxc_register_device(&mxc_usbh2, &usbh2_pdata);
+#endif
+        if (!otg_mode_host) {
+                gpio_set_value(OTG_PHY_CS_GPIO, 0);
+                mxc_register_device(&mxc_otg_udc_device, &otg_device_pdata);
+        }
+
         platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
 }
 
@@ -233,9 +384,9 @@ static struct sys_timer pca100_timer = {
 };
 
 MACHINE_START(PCA100, "phyCARD-i.MX27")
-        .phys_io        = AIPI_BASE_ADDR,
-        .io_pg_offst    = ((AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc,
-        .boot_params    = PHYS_OFFSET + 0x100,
+        .phys_io        = MX27_AIPI_BASE_ADDR,
+        .io_pg_offst    = ((MX27_AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc,
+        .boot_params    = MX27_PHYS_OFFSET + 0x100,
         .map_io         = mx27_map_io,
         .init_irq       = mx27_init_irq,
         .init_machine   = pca100_init,
diff --git a/arch/arm/mach-mx2/pcm038.c b/arch/arm/mach-mx2/mach-pcm038.c
index 906d59b0a7aa..035fbe046ec0 100644
--- a/arch/arm/mach-mx2/pcm038.c
+++ b/arch/arm/mach-mx2/mach-pcm038.c
@@ -36,10 +36,12 @@
 #include <mach/common.h>
 #include <mach/hardware.h>
 #include <mach/i2c.h>
-#include <mach/iomux.h>
+#include <mach/iomux-mx27.h>
 #include <mach/imx-uart.h>
 #include <mach/mxc_nand.h>
 #include <mach/spi.h>
+#include <mach/mxc_ehci.h>
+#include <mach/ulpi.h>
 
 #include "devices.h"
 
@@ -96,6 +98,19 @@ static int pcm038_pins[] = {
         PC17_PF_SSI4_RXD,
         PC18_PF_SSI4_TXD,
         PC19_PF_SSI4_CLK,
+        /* USB host */
+        PA0_PF_USBH2_CLK,
+        PA1_PF_USBH2_DIR,
+        PA2_PF_USBH2_DATA7,
+        PA3_PF_USBH2_NXT,
+        PA4_PF_USBH2_STP,
+        PD19_AF_USBH2_DATA4,
+        PD20_AF_USBH2_DATA3,
+        PD21_AF_USBH2_DATA6,
+        PD22_AF_USBH2_DATA0,
+        PD23_AF_USBH2_DATA2,
+        PD24_AF_USBH2_DATA1,
+        PD26_AF_USBH2_DATA5,
 };
 
 /*
@@ -108,8 +123,8 @@ static struct platdata_mtd_ram pcm038_sram_data = {
 };
 
 static struct resource pcm038_sram_resource = {
-        .start = CS1_BASE_ADDR,
-        .end   = CS1_BASE_ADDR + 512 * 1024 - 1,
+        .start = MX27_CS1_BASE_ADDR,
+        .end   = MX27_CS1_BASE_ADDR + 512 * 1024 - 1,
         .flags = IORESOURCE_MEM,
 };
 
@@ -173,9 +188,7 @@ static struct platform_device *platform_devices[] __initdata = {
  * setup other stuffs to access the sram. */
 static void __init pcm038_init_sram(void)
 {
-        __raw_writel(0x0000d843, CSCR_U(1));
-        __raw_writel(0x22252521, CSCR_L(1));
-        __raw_writel(0x22220a00, CSCR_A(1));
+        mx27_setup_weimcs(1, 0x0000d843, 0x22252521, 0x22220a00);
 }
 
 static struct imxi2c_platform_data pcm038_i2c_1_data = {
@@ -279,6 +292,11 @@ static struct spi_board_info pcm038_spi_board_info[] __initdata = {
         }
 };
 
+static struct mxc_usbh_platform_data usbh2_pdata = {
+        .portsc = MXC_EHCI_MODE_ULPI,
+        .flags  = MXC_EHCI_POWER_PINS_ENABLED | MXC_EHCI_INTERFACE_DIFF_UNI,
+};
+
 static void __init pcm038_init(void)
 {
         mxc_gpio_setup_multiple_pins(pcm038_pins, ARRAY_SIZE(pcm038_pins),
@@ -291,7 +309,7 @@ static void __init pcm038_init(void)
         mxc_register_device(&mxc_uart_device2, &uart_pdata[2]);
 
         mxc_gpio_mode(PE16_AF_OWIRE);
-        mxc_register_device(&mxc_nand_device, &pcm038_nand_board_info);
+        mxc_register_device(&imx27_nand_device, &pcm038_nand_board_info);
 
         /* only the i2c master 1 is used on this CPU card */
         i2c_register_board_info(1, pcm038_i2c_devices,
@@ -311,6 +329,8 @@ static void __init pcm038_init(void)
         spi_register_board_info(pcm038_spi_board_info,
                                 ARRAY_SIZE(pcm038_spi_board_info));
 
+        mxc_register_device(&mxc_usbh2, &usbh2_pdata);
+
         platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
 
 #ifdef CONFIG_MACH_PCM970_BASEBOARD
@@ -328,9 +348,9 @@ static struct sys_timer pcm038_timer = {
 };
 
 MACHINE_START(PCM038, "phyCORE-i.MX27")
-        .phys_io        = AIPI_BASE_ADDR,
-        .io_pg_offst    = ((AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc,
-        .boot_params    = PHYS_OFFSET + 0x100,
+        .phys_io        = MX27_AIPI_BASE_ADDR,
+        .io_pg_offst    = ((MX27_AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc,
+        .boot_params    = MX27_PHYS_OFFSET + 0x100,
         .map_io         = mx27_map_io,
         .init_irq       = mx27_init_irq,
         .init_machine   = pcm038_init,
diff --git a/arch/arm/mach-mx2/mm-imx21.c b/arch/arm/mach-mx2/mm-imx21.c
new file mode 100644
index 000000000000..64134314d012
--- /dev/null
+++ b/arch/arm/mach-mx2/mm-imx21.c
@@ -0,0 +1,83 @@
+/*
+ * arch/arm/mach-mx2/mm-imx21.c
+ *
+ * Copyright (C) 2008 Juergen Beisert (kernel@pengutronix.de)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+ * MA 02110-1301, USA.
+ */
+
+#include <linux/mm.h>
+#include <linux/init.h>
+#include <mach/hardware.h>
+#include <mach/common.h>
+#include <asm/pgtable.h>
+#include <asm/mach/map.h>
+
+/* MX21 memory map definition */
+static struct map_desc imx21_io_desc[] __initdata = {
+        /*
+         * this fixed mapping covers:
+         * - AIPI1
+         * - AIPI2
+         * - AITC
+         * - ROM Patch
+         * - and some reserved space
+         */
+        {
+                .virtual = MX21_AIPI_BASE_ADDR_VIRT,
+                .pfn = __phys_to_pfn(MX21_AIPI_BASE_ADDR),
+                .length = MX21_AIPI_SIZE,
+                .type = MT_DEVICE
+        },
+        /*
+         * this fixed mapping covers:
+         * - CSI
+         * - ATA
+         */
+        {
+                .virtual = MX21_SAHB1_BASE_ADDR_VIRT,
+                .pfn = __phys_to_pfn(MX21_SAHB1_BASE_ADDR),
+                .length = MX21_SAHB1_SIZE,
+                .type = MT_DEVICE
+        },
+        /*
+         * this fixed mapping covers:
+         * - EMI
+         */
+        {
+                .virtual = MX21_X_MEMC_BASE_ADDR_VIRT,
+                .pfn = __phys_to_pfn(MX21_X_MEMC_BASE_ADDR),
+                .length = MX21_X_MEMC_SIZE,
+                .type = MT_DEVICE
+        },
+};
+
+/*
+ * Initialize the memory map. It is called during the
+ * system startup to create static physical to virtual
+ * memory map for the IO modules.
+ */
+void __init mx21_map_io(void)
+{
+        mxc_set_cpu_type(MXC_CPU_MX21);
+        mxc_arch_reset_init(MX21_IO_ADDRESS(MX21_WDOG_BASE_ADDR));
+
+        iotable_init(imx21_io_desc, ARRAY_SIZE(imx21_io_desc));
+}
+
+void __init mx21_init_irq(void)
+{
+        mxc_init_irq(MX21_IO_ADDRESS(MX21_AVIC_BASE_ADDR));
+}
diff --git a/arch/arm/mach-mx2/generic.c b/arch/arm/mach-mx2/mm-imx27.c
index ae8f759134d1..3366ed44cfd5 100644
--- a/arch/arm/mach-mx2/generic.c
+++ b/arch/arm/mach-mx2/mm-imx27.c
@@ -1,5 +1,5 @@
 /*
- * generic.c
+ * arch/arm/mach-mx2/mm-imx27.c
  *
  * Copyright (C) 2008 Juergen Beisert (kernel@pengutronix.de)
  *
@@ -26,7 +26,7 @@
 #include <asm/mach/map.h>
 
 /* MX27 memory map definition */
-static struct map_desc mxc_io_desc[] __initdata = {
+static struct map_desc imx27_io_desc[] __initdata = {
         /*
          * this fixed mapping covers:
          * - AIPI1
@@ -36,9 +36,9 @@ static struct map_desc mxc_io_desc[] __initdata = {
          * - and some reserved space
          */
         {
-                .virtual = AIPI_BASE_ADDR_VIRT,
-                .pfn = __phys_to_pfn(AIPI_BASE_ADDR),
-                .length = AIPI_SIZE,
+                .virtual = MX27_AIPI_BASE_ADDR_VIRT,
+                .pfn = __phys_to_pfn(MX27_AIPI_BASE_ADDR),
+                .length = MX27_AIPI_SIZE,
                 .type = MT_DEVICE
         },
         /*
@@ -47,9 +47,9 @@ static struct map_desc mxc_io_desc[] __initdata = {
          * - ATA
          */
         {
-                .virtual = SAHB1_BASE_ADDR_VIRT,
-                .pfn = __phys_to_pfn(SAHB1_BASE_ADDR),
-                .length = SAHB1_SIZE,
+                .virtual = MX27_SAHB1_BASE_ADDR_VIRT,
+                .pfn = __phys_to_pfn(MX27_SAHB1_BASE_ADDR),
+                .length = MX27_SAHB1_SIZE,
                 .type = MT_DEVICE
         },
         /*
@@ -57,11 +57,11 @@ static struct map_desc mxc_io_desc[] __initdata = {
          * - EMI
          */
         {
-                .virtual = X_MEMC_BASE_ADDR_VIRT,
-                .pfn = __phys_to_pfn(X_MEMC_BASE_ADDR),
-                .length = X_MEMC_SIZE,
+                .virtual = MX27_X_MEMC_BASE_ADDR_VIRT,
+                .pfn = __phys_to_pfn(MX27_X_MEMC_BASE_ADDR),
+                .length = MX27_X_MEMC_SIZE,
                 .type = MT_DEVICE
-        }
+        },
 };
 
 /*
@@ -69,29 +69,15 @@ static struct map_desc mxc_io_desc[] __initdata = {
  * system startup to create static physical to virtual
  * memory map for the IO modules.
  */
-void __init mx21_map_io(void)
-{
-        mxc_set_cpu_type(MXC_CPU_MX21);
-        mxc_arch_reset_init(IO_ADDRESS(WDOG_BASE_ADDR));
-
-        iotable_init(mxc_io_desc, ARRAY_SIZE(mxc_io_desc));
-}
-
 void __init mx27_map_io(void)
 {
         mxc_set_cpu_type(MXC_CPU_MX27);
-        mxc_arch_reset_init(IO_ADDRESS(WDOG_BASE_ADDR));
+        mxc_arch_reset_init(MX27_IO_ADDRESS(MX27_WDOG_BASE_ADDR));
 
-        iotable_init(mxc_io_desc, ARRAY_SIZE(mxc_io_desc));
+        iotable_init(imx27_io_desc, ARRAY_SIZE(imx27_io_desc));
 }
 
 void __init mx27_init_irq(void)
 {
-        mxc_init_irq(IO_ADDRESS(AVIC_BASE_ADDR));
+        mxc_init_irq(MX27_IO_ADDRESS(MX27_AVIC_BASE_ADDR));
 }
-
-void __init mx21_init_irq(void)
-{
-        mx27_init_irq();
-}
-
diff --git a/arch/arm/mach-mx2/pcm970-baseboard.c b/arch/arm/mach-mx2/pcm970-baseboard.c
index 3cb7f457e5d0..4aafd5b8b85b 100644
--- a/arch/arm/mach-mx2/pcm970-baseboard.c
+++ b/arch/arm/mach-mx2/pcm970-baseboard.c
@@ -24,7 +24,7 @@
 #include <asm/mach/arch.h>
 
 #include <mach/common.h>
-#include <mach/iomux.h>
+#include <mach/iomux-mx27.h>
 #include <mach/imxfb.h>
 #include <mach/hardware.h>
 #include <mach/mmc.h>
@@ -190,8 +190,8 @@ static struct imx_fb_platform_data pcm038_fb_data = {
 
 static struct resource pcm970_sja1000_resources[] = {
         {
-                .start   = CS4_BASE_ADDR,
-                .end     = CS4_BASE_ADDR + 0x100 - 1,
+                .start   = MX27_CS4_BASE_ADDR,
+                .end     = MX27_CS4_BASE_ADDR + 0x100 - 1,
                 .flags   = IORESOURCE_MEM,
         }, {
                 .start   = IRQ_GPIOE(19),
diff --git a/arch/arm/mach-mx2/serial.c b/arch/arm/mach-mx2/serial.c
index 40a485cdc10e..1c0c835b2252 100644
--- a/arch/arm/mach-mx2/serial.c
+++ b/arch/arm/mach-mx2/serial.c
@@ -26,12 +26,12 @@
 
 static struct resource uart0[] = {
         {
-                .start = UART1_BASE_ADDR,
-                .end = UART1_BASE_ADDR + 0x0B5,
+                .start = MX2x_UART1_BASE_ADDR,
+                .end = MX2x_UART1_BASE_ADDR + 0x0B5,
                 .flags = IORESOURCE_MEM,
         }, {
-                .start = MXC_INT_UART1,
-                .end = MXC_INT_UART1,
+                .start = MX2x_INT_UART1,
+                .end = MX2x_INT_UART1,
                 .flags = IORESOURCE_IRQ,
         },
 };
@@ -45,12 +45,12 @@ struct platform_device mxc_uart_device0 = {
 
 static struct resource uart1[] = {
         {
-                .start = UART2_BASE_ADDR,
-                .end = UART2_BASE_ADDR + 0x0B5,
+                .start = MX2x_UART2_BASE_ADDR,
+                .end = MX2x_UART2_BASE_ADDR + 0x0B5,
                 .flags = IORESOURCE_MEM,
         }, {
-                .start = MXC_INT_UART2,
-                .end = MXC_INT_UART2,
+                .start = MX2x_INT_UART2,
+                .end = MX2x_INT_UART2,
                 .flags = IORESOURCE_IRQ,
         },
 };
@@ -64,12 +64,12 @@ struct platform_device mxc_uart_device1 = {
 
 static struct resource uart2[] = {
         {
-                .start = UART3_BASE_ADDR,
-                .end = UART3_BASE_ADDR + 0x0B5,
+                .start = MX2x_UART3_BASE_ADDR,
+                .end = MX2x_UART3_BASE_ADDR + 0x0B5,
                 .flags = IORESOURCE_MEM,
         }, {
-                .start = MXC_INT_UART3,
-                .end = MXC_INT_UART3,
+                .start = MX2x_INT_UART3,
+                .end = MX2x_INT_UART3,
                 .flags = IORESOURCE_IRQ,
         },
 };
@@ -83,12 +83,12 @@ struct platform_device mxc_uart_device2 = {
 
 static struct resource uart3[] = {
         {
-                .start = UART4_BASE_ADDR,
-                .end = UART4_BASE_ADDR + 0x0B5,
+                .start = MX2x_UART4_BASE_ADDR,
+                .end = MX2x_UART4_BASE_ADDR + 0x0B5,
                 .flags = IORESOURCE_MEM,
         }, {
-                .start = MXC_INT_UART4,
-                .end = MXC_INT_UART4,
+                .start = MX2x_INT_UART4,
+                .end = MX2x_INT_UART4,
                 .flags = IORESOURCE_IRQ,
         },
 };
@@ -103,12 +103,12 @@ struct platform_device mxc_uart_device3 = {
 #ifdef CONFIG_MACH_MX27
 static struct resource uart4[] = {
         {
-                .start = UART5_BASE_ADDR,
-                .end = UART5_BASE_ADDR + 0x0B5,
+                .start = MX27_UART5_BASE_ADDR,
+                .end = MX27_UART5_BASE_ADDR + 0x0B5,
                 .flags = IORESOURCE_MEM,
         }, {
-                .start = MXC_INT_UART5,
-                .end = MXC_INT_UART5,
+                .start = MX27_INT_UART5,
+                .end = MX27_INT_UART5,
                 .flags = IORESOURCE_IRQ,
         },
 };
@@ -122,12 +122,12 @@ struct platform_device mxc_uart_device4 = {
 
 static struct resource uart5[] = {
         {
-                .start = UART6_BASE_ADDR,
-                .end = UART6_BASE_ADDR + 0x0B5,
+                .start = MX27_UART6_BASE_ADDR,
+                .end = MX27_UART6_BASE_ADDR + 0x0B5,
                 .flags = IORESOURCE_MEM,
         }, {
-                .start = MXC_INT_UART6,
-                .end = MXC_INT_UART6,
+                .start = MX27_INT_UART6,
+                .end = MX27_INT_UART6,
                 .flags = IORESOURCE_IRQ,
         },
 };
diff --git a/arch/arm/mach-mx25/Kconfig b/arch/arm/mach-mx25/Kconfig
index cc28f56eae80..54d217314ee9 100644
--- a/arch/arm/mach-mx25/Kconfig
+++ b/arch/arm/mach-mx25/Kconfig
@@ -3,7 +3,6 @@ if ARCH_MX25
 comment "MX25 platforms:"
 
 config MACH_MX25_3DS
-        select ARCH_MXC_IOMUX_V3
         bool "Support MX25PDK (3DS) Platform"
 
 endif
diff --git a/arch/arm/mach-mx25/Makefile b/arch/arm/mach-mx25/Makefile
index fe23836a9f3d..10cebc5ced8c 100644
--- a/arch/arm/mach-mx25/Makefile
+++ b/arch/arm/mach-mx25/Makefile
@@ -1,3 +1,3 @@
 obj-y                           := mm.o devices.o
 obj-$(CONFIG_ARCH_MX25)         += clock.o
-obj-$(CONFIG_MACH_MX25_3DS)     += mx25pdk.o
+obj-$(CONFIG_MACH_MX25_3DS)     += mach-mx25pdk.o
diff --git a/arch/arm/mach-mx25/clock.c b/arch/arm/mach-mx25/clock.c
index 37e1359ad0c0..155014993b13 100644
--- a/arch/arm/mach-mx25/clock.c
+++ b/arch/arm/mach-mx25/clock.c
@@ -124,6 +124,11 @@ static unsigned long get_rate_gpt(struct clk *clk)
         return get_rate_per(5);
 }
 
+static unsigned long get_rate_lcdc(struct clk *clk)
+{
+        return get_rate_per(7);
+}
+
 static unsigned long get_rate_otg(struct clk *clk)
 {
         return 48000000; /* FIXME */
@@ -167,6 +172,8 @@ DEFINE_CLOCK(cspi1_clk,  0, CCM_CGCR1,  5, get_rate_ipg, NULL, NULL);
 DEFINE_CLOCK(cspi2_clk,  0, CCM_CGCR1,  6, get_rate_ipg, NULL, NULL);
 DEFINE_CLOCK(cspi3_clk,  0, CCM_CGCR1,  7, get_rate_ipg, NULL, NULL);
 DEFINE_CLOCK(fec_ahb_clk, 0, CCM_CGCR0, 23, NULL,        NULL, NULL);
+DEFINE_CLOCK(lcdc_ahb_clk, 0, CCM_CGCR0, 24, NULL,       NULL, NULL);
+DEFINE_CLOCK(lcdc_per_clk, 0, CCM_CGCR0,  7, NULL,       NULL, &lcdc_ahb_clk);
 DEFINE_CLOCK(uart1_clk,  0, CCM_CGCR2, 14, get_rate_uart, NULL, &uart_per_clk);
 DEFINE_CLOCK(uart2_clk,  0, CCM_CGCR2, 15, get_rate_uart, NULL, &uart_per_clk);
 DEFINE_CLOCK(uart3_clk,  0, CCM_CGCR2, 16, get_rate_uart, NULL, &uart_per_clk);
@@ -182,6 +189,8 @@ DEFINE_CLOCK(kpp_clk,	 0, CCM_CGCR1, 28, get_rate_ipg, NULL, NULL);
 DEFINE_CLOCK(tsc_clk,    0, CCM_CGCR2, 13, get_rate_ipg, NULL, NULL);
 DEFINE_CLOCK(i2c_clk,    0, CCM_CGCR0,  6, get_rate_i2c, NULL, NULL);
 DEFINE_CLOCK(fec_clk,    0, CCM_CGCR1, 15, get_rate_ipg, NULL, &fec_ahb_clk);
+DEFINE_CLOCK(dryice_clk, 0, CCM_CGCR1,  8, get_rate_ipg, NULL, NULL);
+DEFINE_CLOCK(lcdc_clk,   0, CCM_CGCR1, 29, get_rate_lcdc, NULL, &lcdc_per_clk);
 
 #define _REGISTER_CLOCK(d, n, c)        \
         {                               \
@@ -214,6 +223,8 @@ static struct clk_lookup lookups[] = {
         _REGISTER_CLOCK("imx-i2c.1", NULL, i2c_clk)
         _REGISTER_CLOCK("imx-i2c.2", NULL, i2c_clk)
         _REGISTER_CLOCK("fec.0", NULL, fec_clk)
+        _REGISTER_CLOCK("imxdi_rtc.0", NULL, dryice_clk)
+        _REGISTER_CLOCK("imx-fb.0", NULL, lcdc_clk)
 };
 
 int __init mx25_clocks_init(void)
@@ -228,6 +239,9 @@ int __init mx25_clocks_init(void)
         __raw_writel((0xf << 16) | (3 << 26), CRM_BASE + CCM_CGCR1);
         __raw_writel((1 << 5), CRM_BASE + CCM_CGCR2);
 
+        /* Clock source for lcdc is upll */
+        __raw_writel(__raw_readl(CRM_BASE+0x64) | (1 << 7), CRM_BASE + 0x64);
+
         mxc_timer_init(&gpt_clk, MX25_IO_ADDRESS(MX25_GPT1_BASE_ADDR), 54);
 
         return 0;
diff --git a/arch/arm/mach-mx25/devices.c b/arch/arm/mach-mx25/devices.c
index 9fdeea1c083b..3f4b8a0b5fac 100644
--- a/arch/arm/mach-mx25/devices.c
+++ b/arch/arm/mach-mx25/devices.c
@@ -438,3 +438,65 @@ struct platform_device mx25_fec_device = {
         .num_resources  = ARRAY_SIZE(mx25_fec_resources),
         .resource       = mx25_fec_resources,
 };
+
+static struct resource mxc_nand_resources[] = {
+        {
+                .start  = MX25_NFC_BASE_ADDR,
+                .end    = MX25_NFC_BASE_ADDR + 0x1fff,
+                .flags  = IORESOURCE_MEM,
+        },
+        {
+                .start  = MX25_INT_NANDFC,
+                .end    = MX25_INT_NANDFC,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+struct platform_device mxc_nand_device = {
+        .name           = "mxc_nand",
+        .id             = 0,
+        .num_resources  = ARRAY_SIZE(mxc_nand_resources),
+        .resource       = mxc_nand_resources,
+};
+
+static struct resource mx25_rtc_resources[] = {
+        {
+                .start  = MX25_DRYICE_BASE_ADDR,
+                .end    = MX25_DRYICE_BASE_ADDR + 0x40,
+                .flags  = IORESOURCE_MEM,
+        },
+        {
+                .start  = MX25_INT_DRYICE,
+                .flags  = IORESOURCE_IRQ
+        },
+};
+
+struct platform_device mx25_rtc_device = {
+        .name   = "imxdi_rtc",
+        .id     = 0,
+        .num_resources  = ARRAY_SIZE(mx25_rtc_resources),
+        .resource       = mx25_rtc_resources,
+};
+
+static struct resource mx25_fb_resources[] = {
+        {
+                .start  = MX25_LCDC_BASE_ADDR,
+                .end    = MX25_LCDC_BASE_ADDR + 0xfff,
+                .flags  = IORESOURCE_MEM,
+        },
+        {
+                .start  = MX25_INT_LCDC,
+                .end    = MX25_INT_LCDC,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+struct platform_device mx25_fb_device = {
+        .name           = "imx-fb",
+        .id             = 0,
+        .resource       = mx25_fb_resources,
+        .num_resources  = ARRAY_SIZE(mx25_fb_resources),
+        .dev            = {
+                .coherent_dma_mask = 0xFFFFFFFF,
+        },
+};
diff --git a/arch/arm/mach-mx25/devices.h b/arch/arm/mach-mx25/devices.h
index fe5420fcd11f..39560e13bc0d 100644
--- a/arch/arm/mach-mx25/devices.h
+++ b/arch/arm/mach-mx25/devices.h
@@ -18,3 +18,6 @@ extern struct platform_device mxc_i2c_device0;
 extern struct platform_device mxc_i2c_device1;
 extern struct platform_device mxc_i2c_device2;
 extern struct platform_device mx25_fec_device;
+extern struct platform_device mxc_nand_device;
+extern struct platform_device mx25_rtc_device;
+extern struct platform_device mx25_fb_device;
diff --git a/arch/arm/mach-mx25/mx25pdk.c b/arch/arm/mach-mx25/mach-mx25pdk.c
index 6f06089246eb..83d74109e7d8 100644
--- a/arch/arm/mach-mx25/mx25pdk.c
+++ b/arch/arm/mach-mx25/mach-mx25pdk.c
@@ -35,8 +35,9 @@
 #include <mach/imx-uart.h>
 #include <mach/mx25.h>
 #include <mach/mxc_nand.h>
+#include <mach/imxfb.h>
 #include "devices.h"
-#include <mach/iomux.h>
+#include <mach/iomux-mx25.h>
 
 static struct imxuart_platform_data uart_pdata = {
         .flags = IMXUART_HAVE_RTSCTS,
@@ -54,6 +55,31 @@ static struct pad_desc mx25pdk_pads[] = {
         MX25_PAD_FEC_TX_CLK__FEC_TX_CLK,
         MX25_PAD_A17__GPIO_2_3, /* FEC_EN, GPIO 35 */
         MX25_PAD_D12__GPIO_4_8, /* FEC_RESET_B, GPIO 104 */
+
+        /* LCD */
+        MX25_PAD_LD0__LD0,
+        MX25_PAD_LD1__LD1,
+        MX25_PAD_LD2__LD2,
+        MX25_PAD_LD3__LD3,
+        MX25_PAD_LD4__LD4,
+        MX25_PAD_LD5__LD5,
+        MX25_PAD_LD6__LD6,
+        MX25_PAD_LD7__LD7,
+        MX25_PAD_LD8__LD8,
+        MX25_PAD_LD9__LD9,
+        MX25_PAD_LD10__LD10,
+        MX25_PAD_LD11__LD11,
+        MX25_PAD_LD12__LD12,
+        MX25_PAD_LD13__LD13,
+        MX25_PAD_LD14__LD14,
+        MX25_PAD_LD15__LD15,
+        MX25_PAD_GPIO_E__LD16,
+        MX25_PAD_GPIO_F__LD17,
+        MX25_PAD_HSYNC__HSYNC,
+        MX25_PAD_VSYNC__VSYNC,
+        MX25_PAD_LSCLK__LSCLK,
+        MX25_PAD_OE_ACD__OE_ACD,
+        MX25_PAD_CONTRAST__CONTRAST,
 };
 
 static struct fec_platform_data mx25_fec_pdata = {
@@ -77,6 +103,40 @@ static void __init mx25pdk_fec_reset(void)
         gpio_set_value(FEC_RESET_B_GPIO, 1);
 }
 
+static struct mxc_nand_platform_data mx25pdk_nand_board_info = {
+        .width          = 1,
+        .hw_ecc         = 1,
+        .flash_bbt      = 1,
+};
+
+static struct imx_fb_videomode mx25pdk_modes[] = {
+        {
+                .mode   = {
+                        .name           = "CRT-VGA",
+                        .refresh        = 60,
+                        .xres           = 640,
+                        .yres           = 480,
+                        .pixclock       = 39683,
+                        .left_margin    = 45,
+                        .right_margin   = 114,
+                        .upper_margin   = 33,
+                        .lower_margin   = 11,
+                        .hsync_len      = 1,
+                        .vsync_len      = 1,
+                },
+                .bpp    = 16,
+                .pcr    = 0xFA208B80,
+        },
+};
+
+static struct imx_fb_platform_data mx25pdk_fb_pdata = {
+        .mode           = mx25pdk_modes,
+        .num_modes      = ARRAY_SIZE(mx25pdk_modes),
+        .pwmr           = 0x00A903FF,
+        .lscr1          = 0x00120300,
+        .dmacr          = 0x00020010,
+};
+
 static void __init mx25pdk_init(void)
 {
         mxc_iomux_v3_setup_multiple_pads(mx25pdk_pads,
@@ -84,6 +144,9 @@ static void __init mx25pdk_init(void)
 
         mxc_register_device(&mxc_uart_device0, &uart_pdata);
         mxc_register_device(&mxc_usbh2, NULL);
+        mxc_register_device(&mxc_nand_device, &mx25pdk_nand_board_info);
+        mxc_register_device(&mx25_rtc_device, NULL);
+        mxc_register_device(&mx25_fb_device, &mx25pdk_fb_pdata);
 
         mx25pdk_fec_reset();
         mxc_register_device(&mx25_fec_device, &mx25_fec_pdata);
@@ -102,7 +165,7 @@ MACHINE_START(MX25_3DS, "Freescale MX25PDK (3DS)")
         /* Maintainer: Freescale Semiconductor, Inc. */
         .phys_io        = MX25_AIPS1_BASE_ADDR,
         .io_pg_offst    = ((MX25_AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc,
-        .boot_params    = PHYS_OFFSET + 0x100,
+        .boot_params    = MX25_PHYS_OFFSET + 0x100,
         .map_io         = mx25_map_io,
         .init_irq       = mx25_init_irq,
         .init_machine   = mx25pdk_init,
diff --git a/arch/arm/mach-mx3/Kconfig b/arch/arm/mach-mx3/Kconfig
index 28294416b0af..3872af1cf2c3 100644
--- a/arch/arm/mach-mx3/Kconfig
+++ b/arch/arm/mach-mx3/Kconfig
@@ -34,6 +34,7 @@ config MACH_MX31ADS_WM1133_EV1
 config MACH_PCM037
         bool "Support Phytec pcm037 (i.MX31) platforms"
         select ARCH_MX31
+        select MXC_ULPI if USB_ULPI
         help
           Include support for Phytec pcm037 platform. This includes
           specific configurations for the board and its peripherals.
@@ -86,6 +87,7 @@ config MACH_QONG
 config MACH_PCM043
         bool "Support Phytec pcm043 (i.MX35) platforms"
         select ARCH_MX35
+        select MXC_ULPI if USB_ULPI
         help
           Include support for Phytec pcm043 platform. This includes
           specific configurations for the board and its peripherals.
diff --git a/arch/arm/mach-mx3/Makefile b/arch/arm/mach-mx3/Makefile
index 93c7b296be6a..5d650fda5d5d 100644
--- a/arch/arm/mach-mx3/Makefile
+++ b/arch/arm/mach-mx3/Makefile
@@ -5,18 +5,22 @@
 # Object file lists.
 
 obj-y                           := mm.o devices.o cpu.o
-obj-$(CONFIG_ARCH_MX31)         += clock.o iomux.o
+CFLAGS_mm.o = -DIMX_NEEDS_DEPRECATED_SYMBOLS
+CFLAGS_devices.o = -DIMX_NEEDS_DEPRECATED_SYMBOLS
+CFLAGS_cpu.o = -DIMX_NEEDS_DEPRECATED_SYMBOLS
+obj-$(CONFIG_ARCH_MX31)         += clock-imx31.o iomux-imx31.o
 obj-$(CONFIG_ARCH_MX35)         += clock-imx35.o
-obj-$(CONFIG_MACH_MX31ADS)      += mx31ads.o
-obj-$(CONFIG_MACH_MX31LILLY)    += mx31lilly.o mx31lilly-db.o
-obj-$(CONFIG_MACH_MX31LITE)     += mx31lite.o mx31lite-db.o
-obj-$(CONFIG_MACH_PCM037)       += pcm037.o
-obj-$(CONFIG_MACH_PCM037_EET)   += pcm037_eet.o
-obj-$(CONFIG_MACH_MX31_3DS)     += mx31pdk.o
-obj-$(CONFIG_MACH_MX31MOBOARD)  += mx31moboard.o mx31moboard-devboard.o \
-                                   mx31moboard-marxbot.o
-obj-$(CONFIG_MACH_QONG)         += qong.o
-obj-$(CONFIG_MACH_PCM043)       += pcm043.o
-obj-$(CONFIG_MACH_ARMADILLO5X0) += armadillo5x0.o
-obj-$(CONFIG_MACH_MX35_3DS)     += mx35pdk.o
-obj-$(CONFIG_MACH_KZM_ARM11_01) += kzmarm11.o
+obj-$(CONFIG_MACH_MX31ADS)      += mach-mx31ads.o
+obj-$(CONFIG_MACH_MX31LILLY)    += mach-mx31lilly.o mx31lilly-db.o
+obj-$(CONFIG_MACH_MX31LITE)     += mach-mx31lite.o mx31lite-db.o
+obj-$(CONFIG_MACH_PCM037)       += mach-pcm037.o
+obj-$(CONFIG_MACH_PCM037_EET)   += mach-pcm037_eet.o
+obj-$(CONFIG_MACH_MX31_3DS)     += mach-mx31_3ds.o
+CFLAGS_mach-mx31_3ds.o = -DIMX_NEEDS_DEPRECATED_SYMBOLS
+obj-$(CONFIG_MACH_MX31MOBOARD)  += mach-mx31moboard.o mx31moboard-devboard.o \
+                                   mx31moboard-marxbot.o mx31moboard-smartbot.o
+obj-$(CONFIG_MACH_QONG)         += mach-qong.o
+obj-$(CONFIG_MACH_PCM043)       += mach-pcm043.o
+obj-$(CONFIG_MACH_ARMADILLO5X0) += mach-armadillo5x0.o
+obj-$(CONFIG_MACH_MX35_3DS)     += mach-mx35pdk.o
+obj-$(CONFIG_MACH_KZM_ARM11_01) += mach-kzm_arm11_01.o
diff --git a/arch/arm/mach-mx3/clock.c b/arch/arm/mach-mx3/clock-imx31.c
index b5c39a016db7..80dba9966b5e 100644
--- a/arch/arm/mach-mx3/clock.c
+++ b/arch/arm/mach-mx3/clock-imx31.c
@@ -616,14 +616,15 @@ int __init mx31_clocks_init(unsigned long fref)
 
         mx31_read_cpu_rev();
 
-        if (mx31_revision() >= CHIP_REV_2_0) {
+        if (mx31_revision() >= MX31_CHIP_REV_2_0) {
                 reg = __raw_readl(MXC_CCM_PMCR1);
                 /* No PLL restart on DVFS switch; enable auto EMI handshake */
                 reg |= MXC_CCM_PMCR1_PLLRDIS | MXC_CCM_PMCR1_EMIRQ_EN;
                 __raw_writel(reg, MXC_CCM_PMCR1);
         }
 
-        mxc_timer_init(&ipg_clk, IO_ADDRESS(GPT1_BASE_ADDR), MXC_INT_GPT);
+        mxc_timer_init(&ipg_clk, MX31_IO_ADDRESS(MX31_GPT1_BASE_ADDR),
+                        MX31_INT_GPT);
 
         return 0;
 }
diff --git a/arch/arm/mach-mx3/clock-imx35.c b/arch/arm/mach-mx3/clock-imx35.c
index f3f41fa4f21b..9f3e943e2232 100644
--- a/arch/arm/mach-mx3/clock-imx35.c
+++ b/arch/arm/mach-mx3/clock-imx35.c
@@ -28,7 +28,7 @@
 #include <mach/hardware.h>
 #include <mach/common.h>
 
-#define CCM_BASE        IO_ADDRESS(CCM_BASE_ADDR)
+#define CCM_BASE        MX35_IO_ADDRESS(MX35_CCM_BASE_ADDR)
 
 #define CCM_CCMR        0x00
 #define CCM_PDR0        0x04
@@ -502,7 +502,8 @@ int __init mx35_clocks_init()
         __raw_writel((3 << 26) | ll, CCM_BASE + CCM_CGR2);
         __raw_writel(0, CCM_BASE + CCM_CGR3);
 
-        mxc_timer_init(&gpt_clk, IO_ADDRESS(GPT1_BASE_ADDR), MXC_INT_GPT);
+        mxc_timer_init(&gpt_clk,
+                        MX35_IO_ADDRESS(MX35_GPT1_BASE_ADDR), MX35_INT_GPT);
 
         return 0;
 }
diff --git a/arch/arm/mach-mx3/cpu.c b/arch/arm/mach-mx3/cpu.c
index db828809c675..861afe0fe3ad 100644
--- a/arch/arm/mach-mx3/cpu.c
+++ b/arch/arm/mach-mx3/cpu.c
@@ -41,7 +41,7 @@ void __init mx31_read_cpu_rev(void)
         u32 i, srev;
 
         /* read SREV register from IIM module */
-        srev = __raw_readl(IO_ADDRESS(IIM_BASE_ADDR) + MXC_IIMSREV);
+        srev = __raw_readl(IO_ADDRESS(IIM_BASE_ADDR + MXC_IIMSREV));
 
         for (i = 0; i < ARRAY_SIZE(mx31_cpu_type); i++)
                 if (srev == mx31_cpu_type[i].srev) {
diff --git a/arch/arm/mach-mx3/crm_regs.h b/arch/arm/mach-mx3/crm_regs.h
index adfa3627ad84..37a8a07beda3 100644
--- a/arch/arm/mach-mx3/crm_regs.h
+++ b/arch/arm/mach-mx3/crm_regs.h
@@ -24,7 +24,7 @@
 #define CKIH_CLK_FREQ_27MHZ     27000000
 #define CKIL_CLK_FREQ           32768
 
-#define MXC_CCM_BASE            IO_ADDRESS(CCM_BASE_ADDR)
+#define MXC_CCM_BASE            MX31_IO_ADDRESS(MX31_CCM_BASE_ADDR)
 
 /* Register addresses */
 #define MXC_CCM_CCMR            (MXC_CCM_BASE + 0x00)
diff --git a/arch/arm/mach-mx3/iomux.c b/arch/arm/mach-mx3/iomux-imx31.c
index c66ccbcdc11b..a1d7fa5123dc 100644
--- a/arch/arm/mach-mx3/iomux.c
+++ b/arch/arm/mach-mx3/iomux-imx31.c
@@ -29,7 +29,7 @@
 /*
  * IOMUX register (base) addresses
  */
-#define IOMUX_BASE      IO_ADDRESS(IOMUXC_BASE_ADDR)
+#define IOMUX_BASE      MX31_IO_ADDRESS(MX31_IOMUXC_BASE_ADDR)
 #define IOMUXINT_OBS1   (IOMUX_BASE + 0x000)
 #define IOMUXINT_OBS2   (IOMUX_BASE + 0x004)
 #define IOMUXGPR        (IOMUX_BASE + 0x008)
diff --git a/arch/arm/mach-mx3/armadillo5x0.c b/arch/arm/mach-mx3/mach-armadillo5x0.c
index 54aab401dbdf..3d72b0b89705 100644
--- a/arch/arm/mach-mx3/armadillo5x0.c
+++ b/arch/arm/mach-mx3/mach-armadillo5x0.c
@@ -182,8 +182,8 @@ static struct physmap_flash_data armadillo5x0_nor_flash_pdata = {
 
 static struct resource armadillo5x0_nor_flash_resource = {
         .flags          = IORESOURCE_MEM,
-        .start          = CS0_BASE_ADDR,
-        .end            = CS0_BASE_ADDR + SZ_64M - 1,
+        .start          = MX31_CS0_BASE_ADDR,
+        .end            = MX31_CS0_BASE_ADDR + SZ_64M - 1,
 };
 
 static struct platform_device armadillo5x0_nor_flash = {
@@ -311,8 +311,8 @@ static struct imxmmc_platform_data sdhc_pdata = {
  */
 static struct resource armadillo5x0_smc911x_resources[] = {
         {
-                .start  = CS3_BASE_ADDR,
-                .end    = CS3_BASE_ADDR + SZ_32M - 1,
+                .start  = MX31_CS3_BASE_ADDR,
+                .end    = MX31_CS3_BASE_ADDR + SZ_32M - 1,
                 .flags  = IORESOURCE_MEM,
         }, {
                 .start  = IOMUX_TO_IRQ(MX31_PIN_GPIO1_0),
@@ -406,9 +406,9 @@ static struct sys_timer armadillo5x0_timer = {
 
 MACHINE_START(ARMADILLO5X0, "Armadillo-500")
         /* Maintainer: Alberto Panizzo  */
-        .phys_io        = AIPS1_BASE_ADDR,
-        .io_pg_offst    = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc,
-        .boot_params    = PHYS_OFFSET + 0x00000100,
+        .phys_io        = MX31_AIPS1_BASE_ADDR,
+        .io_pg_offst    = (MX31_AIPS1_BASE_ADDR_VIRT >> 18) & 0xfffc,
+        .boot_params    = MX3x_PHYS_OFFSET + 0x100,
         .map_io         = mx31_map_io,
         .init_irq       = mx31_init_irq,
         .timer          = &armadillo5x0_timer,
diff --git a/arch/arm/mach-mx3/kzmarm11.c b/arch/arm/mach-mx3/mach-kzm_arm11_01.c
index 6fa99ce3008a..f085d5d1a6de 100644
--- a/arch/arm/mach-mx3/kzmarm11.c
+++ b/arch/arm/mach-mx3/mach-kzm_arm11_01.c
@@ -46,13 +46,18 @@
 
 #include "devices.h"
 
+#define KZM_ARM11_IO_ADDRESS(x) (                                       \
+        IMX_IO_ADDRESS(x, MX31_CS4) ?:                                  \
+        IMX_IO_ADDRESS(x, MX31_CS5) ?:                                  \
+        MX31_IO_ADDRESS(x))
+
 #if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE)
 /*
  * KZM-ARM11-01 has an external UART on FPGA
  */
 static struct plat_serial8250_port serial_platform_data[] = {
         {
-                .membase        = IO_ADDRESS(KZM_ARM11_16550),
+                .membase        = KZM_ARM11_IO_ADDRESS(KZM_ARM11_16550),
                 .mapbase        = KZM_ARM11_16550,
                 .irq            = IOMUX_TO_IRQ(MX31_PIN_GPIO1_1),
                 .irqflags       = IRQ_TYPE_EDGE_RISING,
@@ -102,9 +107,9 @@ static int __init kzm_init_ext_uart(void)
         /*
          * Unmask UART interrupt
          */
-        tmp = __raw_readb(IO_ADDRESS(KZM_ARM11_CTL1));
+        tmp = __raw_readb(KZM_ARM11_IO_ADDRESS(KZM_ARM11_CTL1));
         tmp |= 0x2;
-        __raw_writeb(tmp, IO_ADDRESS(KZM_ARM11_CTL1));
+        __raw_writeb(tmp, KZM_ARM11_IO_ADDRESS(KZM_ARM11_CTL1));
 
         return platform_device_register(&serial_device);
 }
@@ -128,8 +133,8 @@ static struct smsc911x_platform_config kzm_smsc9118_config = {
 
 static struct resource kzm_smsc9118_resources[] = {
         {
-                .start  = CS5_BASE_ADDR,
-                .end    = CS5_BASE_ADDR + SZ_128K - 1,
+                .start  = MX31_CS5_BASE_ADDR,
+                .end    = MX31_CS5_BASE_ADDR + SZ_128K - 1,
                 .flags  = IORESOURCE_MEM,
         },
         {
@@ -222,15 +227,15 @@ static void __init kzm_board_init(void)
  */
 static struct map_desc kzm_io_desc[] __initdata = {
         {
-                .virtual        = CS4_BASE_ADDR_VIRT,
-                .pfn            = __phys_to_pfn(CS4_BASE_ADDR),
-                .length         = CS4_SIZE,
+                .virtual        = MX31_CS4_BASE_ADDR_VIRT,
+                .pfn            = __phys_to_pfn(MX31_CS4_BASE_ADDR),
+                .length         = MX31_CS4_SIZE,
                 .type           = MT_DEVICE
         },
         {
-                .virtual        = CS5_BASE_ADDR_VIRT,
-                .pfn            = __phys_to_pfn(CS5_BASE_ADDR),
-                .length         = CS5_SIZE,
+                .virtual        = MX31_CS5_BASE_ADDR_VIRT,
+                .pfn            = __phys_to_pfn(MX31_CS5_BASE_ADDR),
+                .length         = MX31_CS5_SIZE,
                 .type           = MT_DEVICE
         },
 };
@@ -258,9 +263,9 @@ static struct sys_timer kzm_timer = {
  * initialize __mach_desc_KZM_ARM11_01 data structure.
  */
 MACHINE_START(KZM_ARM11_01, "Kyoto Microcomputer Co., Ltd. KZM-ARM11-01")
-        .phys_io        = AIPS1_BASE_ADDR,
-        .io_pg_offst    = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc,
-        .boot_params    = PHYS_OFFSET + 0x100,
+        .phys_io        = MX31_AIPS1_BASE_ADDR,
+        .io_pg_offst    = (MX31_AIPS1_BASE_ADDR_VIRT >> 18) & 0xfffc,
+        .boot_params    = MX3x_PHYS_OFFSET + 0x100,
         .map_io         = kzm_map_io,
         .init_irq       = mx31_init_irq,
         .init_machine   = kzm_board_init,
diff --git a/arch/arm/mach-mx3/mx31pdk.c b/arch/arm/mach-mx3/mach-mx31_3ds.c
index 18715f1aa7eb..b88c18ad7698 100644
--- a/arch/arm/mach-mx3/mx31pdk.c
+++ b/arch/arm/mach-mx3/mach-mx31_3ds.c
@@ -211,9 +211,9 @@ static int __init mx31pdk_init_expio(void)
  */
 static struct map_desc mx31pdk_io_desc[] __initdata = {
         {
-                .virtual = CS5_BASE_ADDR_VIRT,
-                .pfn = __phys_to_pfn(CS5_BASE_ADDR),
-                .length = CS5_SIZE,
+                .virtual = MX31_CS5_BASE_ADDR_VIRT,
+                .pfn = __phys_to_pfn(MX31_CS5_BASE_ADDR),
+                .length = MX31_CS5_SIZE,
                 .type = MT_DEVICE,
         },
 };
@@ -256,9 +256,9 @@ static struct sys_timer mx31pdk_timer = {
  */
 MACHINE_START(MX31_3DS, "Freescale MX31PDK (3DS)")
         /* Maintainer: Freescale Semiconductor, Inc. */
-        .phys_io        = AIPS1_BASE_ADDR,
-        .io_pg_offst    = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc,
-        .boot_params    = PHYS_OFFSET + 0x100,
+        .phys_io        = MX31_AIPS1_BASE_ADDR,
+        .io_pg_offst    = (MX31_AIPS1_BASE_ADDR_VIRT >> 18) & 0xfffc,
+        .boot_params    = MX3x_PHYS_OFFSET + 0x100,
         .map_io         = mx31pdk_map_io,
         .init_irq       = mx31_init_irq,
         .init_machine   = mxc_board_init,
diff --git a/arch/arm/mach-mx3/mx31ads.c b/arch/arm/mach-mx3/mach-mx31ads.c
index 938c549767dc..b3d1a1895c20 100644
--- a/arch/arm/mach-mx3/mx31ads.c
+++ b/arch/arm/mach-mx3/mach-mx31ads.c
@@ -60,7 +60,7 @@
 static struct plat_serial8250_port serial_platform_data[] = {
         {
                 .membase  = (void *)(PBC_BASE_ADDRESS + PBC_SC16C652_UARTA),
-                .mapbase  = (unsigned long)(CS4_BASE_ADDR + PBC_SC16C652_UARTA),
+                .mapbase  = (unsigned long)(MX31_CS4_BASE_ADDR + PBC_SC16C652_UARTA),
                 .irq      = EXPIO_INT_XUART_INTA,
                 .uartclk  = 14745600,
                 .regshift = 0,
@@ -68,7 +68,7 @@ static struct plat_serial8250_port serial_platform_data[] = {
                 .flags    = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_AUTO_IRQ,
         }, {
                 .membase  = (void *)(PBC_BASE_ADDRESS + PBC_SC16C652_UARTB),
-                .mapbase  = (unsigned long)(CS4_BASE_ADDR + PBC_SC16C652_UARTB),
+                .mapbase  = (unsigned long)(MX31_CS4_BASE_ADDR + PBC_SC16C652_UARTB),
                 .irq      = EXPIO_INT_XUART_INTB,
                 .uartclk  = 14745600,
                 .regshift = 0,
@@ -309,12 +309,8 @@ static struct regulator_init_data ldo1_data = {
 };
 
 static struct regulator_consumer_supply ldo2_consumers[] = {
-        {
-                .supply = "AVDD",
-        },
-        {
-                .supply = "HPVDD",
-        },
+        { .supply = "AVDD", .dev_name = "1-001a" },
+        { .supply = "HPVDD", .dev_name = "1-001a" },
 };
 
 /* CODEC and SIM */
@@ -385,8 +381,6 @@ static struct wm8350_audio_platform_data imx32ads_wm8350_setup = {
 
 static int mx31_wm8350_init(struct wm8350 *wm8350)
 {
-        int i;
-
         wm8350_gpio_config(wm8350, 0, WM8350_GPIO_DIR_IN,
                            WM8350_GPIO0_PWR_ON_IN, WM8350_GPIO_ACTIVE_LOW,
                            WM8350_GPIO_PULL_UP, WM8350_GPIO_INVERT_OFF,
@@ -422,10 +416,6 @@ static int mx31_wm8350_init(struct wm8350 *wm8350)
                            WM8350_GPIO_PULL_NONE, WM8350_GPIO_INVERT_OFF,
                            WM8350_GPIO_DEBOUNCE_OFF);
 
-        /* Fix up for our own supplies. */
-        for (i = 0; i < ARRAY_SIZE(ldo2_consumers); i++)
-                ldo2_consumers[i].dev = wm8350->dev;
-
         wm8350_register_regulator(wm8350, WM8350_DCDC_1, &sw1a_data);
         wm8350_register_regulator(wm8350, WM8350_DCDC_3, &viohi_data);
         wm8350_register_regulator(wm8350, WM8350_DCDC_4, &violo_data);
@@ -493,14 +483,27 @@ static void mxc_init_i2c(void)
 }
 #endif
 
+static unsigned int ssi_pins[] = {
+        MX31_PIN_SFS5__SFS5,
+        MX31_PIN_SCK5__SCK5,
+        MX31_PIN_SRXD5__SRXD5,
+        MX31_PIN_STXD5__STXD5,
+};
+
+static void mxc_init_audio(void)
+{
+        mxc_register_device(&imx_ssi_device0, NULL);
+        mxc_iomux_setup_multiple_pins(ssi_pins, ARRAY_SIZE(ssi_pins), "ssi");
+}
+
 /*!
  * This structure defines static mappings for the i.MX31ADS board.
  */
 static struct map_desc mx31ads_io_desc[] __initdata = {
         {
-                .virtual        = CS4_BASE_ADDR_VIRT,
-                .pfn            = __phys_to_pfn(CS4_BASE_ADDR),
-                .length         = CS4_SIZE / 2,
+                .virtual        = MX31_CS4_BASE_ADDR_VIRT,
+                .pfn            = __phys_to_pfn(MX31_CS4_BASE_ADDR),
+                .length         = MX31_CS4_SIZE / 2,
                 .type           = MT_DEVICE
         },
 };
@@ -528,6 +531,7 @@ static void __init mxc_board_init(void)
         mxc_init_extuart();
         mxc_init_imx_uart();
         mxc_init_i2c();
+        mxc_init_audio();
 }
 
 static void __init mx31ads_timer_init(void)
@@ -545,9 +549,9 @@ static struct sys_timer mx31ads_timer = {
  */
 MACHINE_START(MX31ADS, "Freescale MX31ADS")
         /* Maintainer: Freescale Semiconductor, Inc. */
-        .phys_io        = AIPS1_BASE_ADDR,
-        .io_pg_offst    = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc,
-        .boot_params    = PHYS_OFFSET + 0x100,
+        .phys_io        = MX31_AIPS1_BASE_ADDR,
+        .io_pg_offst    = (MX31_AIPS1_BASE_ADDR_VIRT >> 18) & 0xfffc,
+        .boot_params    = MX3x_PHYS_OFFSET + 0x100,
         .map_io         = mx31ads_map_io,
         .init_irq       = mx31ads_init_irq,
         .init_machine   = mxc_board_init,
diff --git a/arch/arm/mach-mx3/mx31lilly.c b/arch/arm/mach-mx3/mach-mx31lilly.c
index 9ce029f554b9..80847b04c063 100644
--- a/arch/arm/mach-mx3/mx31lilly.c
+++ b/arch/arm/mach-mx3/mach-mx31lilly.c
@@ -57,8 +57,8 @@
 
 static struct resource smsc91x_resources[] = {
         {
-                .start  = CS4_BASE_ADDR,
-                .end    = CS4_BASE_ADDR + 0xffff,
+                .start  = MX31_CS4_BASE_ADDR,
+                .end    = MX31_CS4_BASE_ADDR + 0xffff,
                 .flags  = IORESOURCE_MEM,
         },
         {
@@ -195,9 +195,9 @@ static struct sys_timer mx31lilly_timer = {
 };
 
 MACHINE_START(LILLY1131, "INCO startec LILLY-1131")
-        .phys_io        = AIPS1_BASE_ADDR,
-        .io_pg_offst    = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc,
-        .boot_params    = PHYS_OFFSET + 0x100,
+        .phys_io        = MX31_AIPS1_BASE_ADDR,
+        .io_pg_offst    = (MX31_AIPS1_BASE_ADDR_VIRT >> 18) & 0xfffc,
+        .boot_params    = MX3x_PHYS_OFFSET + 0x100,
         .map_io         = mx31_map_io,
         .init_irq       = mx31_init_irq,
         .init_machine   = mx31lilly_board_init,
diff --git a/arch/arm/mach-mx3/mx31lite.c b/arch/arm/mach-mx3/mach-mx31lite.c
index 789b20d1730f..2b6d11400877 100644
--- a/arch/arm/mach-mx3/mx31lite.c
+++ b/arch/arm/mach-mx3/mach-mx31lite.c
@@ -82,8 +82,8 @@ static struct smsc911x_platform_config smsc911x_config = {
 
 static struct resource smsc911x_resources[] = {
         {
-                .start          = CS4_BASE_ADDR,
-                .end            = CS4_BASE_ADDR + 0x100,
+                .start          = MX31_CS4_BASE_ADDR,
+                .end            = MX31_CS4_BASE_ADDR + 0x100,
                 .flags          = IORESOURCE_MEM,
         }, {
                 .start          = IOMUX_TO_IRQ(MX31_PIN_SFS6),
@@ -214,9 +214,9 @@ static struct platform_device physmap_flash_device = {
  */
 static struct map_desc mx31lite_io_desc[] __initdata = {
         {
-                .virtual = CS4_BASE_ADDR_VIRT,
-                .pfn = __phys_to_pfn(CS4_BASE_ADDR),
-                .length = CS4_SIZE,
+                .virtual = MX31_CS4_BASE_ADDR_VIRT,
+                .pfn = __phys_to_pfn(MX31_CS4_BASE_ADDR),
+                .length = MX31_CS4_SIZE,
                 .type = MT_DEVICE
         }
 };
@@ -287,9 +287,9 @@ struct sys_timer mx31lite_timer = {
 
 MACHINE_START(MX31LITE, "LogicPD i.MX31 SOM")
         /* Maintainer: Freescale Semiconductor, Inc. */
-        .phys_io        = AIPS1_BASE_ADDR,
-        .io_pg_offst    = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc,
-        .boot_params    = PHYS_OFFSET + 0x100,
+        .phys_io        = MX31_AIPS1_BASE_ADDR,
+        .io_pg_offst    = (MX31_AIPS1_BASE_ADDR_VIRT >> 18) & 0xfffc,
+        .boot_params    = MX3x_PHYS_OFFSET + 0x100,
         .map_io         = mx31lite_map_io,
         .init_irq       = mx31_init_irq,
         .init_machine   = mxc_board_init,
diff --git a/arch/arm/mach-mx3/mx31moboard.c b/arch/arm/mach-mx3/mach-mx31moboard.c
index cfd605d078ec..a7dc5191bf5e 100644
--- a/arch/arm/mach-mx3/mx31moboard.c
+++ b/arch/arm/mach-mx3/mach-mx31moboard.c
@@ -96,9 +96,6 @@ static unsigned int moboard_pins[] = {
         /* LEDs */
         MX31_PIN_SVEN0__GPIO2_0, MX31_PIN_STX0__GPIO2_1,
         MX31_PIN_SRX0__GPIO2_2, MX31_PIN_SIMPD0__GPIO2_3,
-        /* SEL */
-        MX31_PIN_DTR_DCE1__GPIO2_8, MX31_PIN_DSR_DCE1__GPIO2_9,
-        MX31_PIN_RI_DCE1__GPIO2_10, MX31_PIN_DCD_DCE1__GPIO2_11,
         /* SPI1 */
         MX31_PIN_CSPI2_MOSI__MOSI, MX31_PIN_CSPI2_MISO__MISO,
         MX31_PIN_CSPI2_SCLK__SCLK, MX31_PIN_CSPI2_SPI_RDY__SPI_RDY,
@@ -352,9 +349,7 @@ static struct fsl_usb2_platform_data usb_pdata = {
 
 static int moboard_usbh2_hw_init(struct platform_device *pdev)
 {
-        int ret = gpio_request(USBH2_EN_B, "usbh2-en");
-        if (ret)
-                return ret;
+        int ret;
 
         mxc_iomux_set_gpr(MUX_PGP_UH2, true);
 
@@ -371,6 +366,9 @@ static int moboard_usbh2_hw_init(struct platform_device *pdev)
         mxc_iomux_set_pad(MX31_PIN_SRXD3, USB_PAD_CFG);
         mxc_iomux_set_pad(MX31_PIN_STXD3, USB_PAD_CFG);
 
+        ret = gpio_request(USBH2_EN_B, "usbh2-en");
+        if (ret)
+                return ret;
         gpio_direction_output(USBH2_EN_B, 0);
 
         return 0;
@@ -431,34 +429,6 @@ static struct platform_device mx31moboard_leds_device = {
         },
 };
 
-#define SEL0 IOMUX_TO_GPIO(MX31_PIN_DTR_DCE1)
-#define SEL1 IOMUX_TO_GPIO(MX31_PIN_DSR_DCE1)
-#define SEL2 IOMUX_TO_GPIO(MX31_PIN_RI_DCE1)
-#define SEL3 IOMUX_TO_GPIO(MX31_PIN_DCD_DCE1)
-
-static void mx31moboard_init_sel_gpios(void)
-{
-        if (!gpio_request(SEL0, "sel0")) {
-                gpio_direction_input(SEL0);
-                gpio_export(SEL0, true);
-        }
-
-        if (!gpio_request(SEL1, "sel1")) {
-                gpio_direction_input(SEL1);
-                gpio_export(SEL1, true);
-        }
-
-        if (!gpio_request(SEL2, "sel2")) {
-                gpio_direction_input(SEL2);
-                gpio_export(SEL2, true);
-        }
-
-        if (!gpio_request(SEL3, "sel3")) {
-                gpio_direction_input(SEL3);
-                gpio_export(SEL3, true);
-        }
-}
-
 static struct ipu_platform_data mx3_ipu_data = {
         .irq_base = MXC_IPU_IRQ_START,
 };
@@ -518,8 +488,6 @@ static void __init mxc_board_init(void)
 
         mxc_register_device(&mxc_uart_device4, &uart4_pdata);
 
-        mx31moboard_init_sel_gpios();
-
         mxc_register_device(&mxc_i2c_device0, &moboard_i2c0_pdata);
         mxc_register_device(&mxc_i2c_device1, &moboard_i2c1_pdata);
 
@@ -552,6 +520,9 @@ static void __init mxc_board_init(void)
         case MX31MARXBOT:
                 mx31moboard_marxbot_init();
                 break;
+        case MX31SMARTBOT:
+                mx31moboard_smartbot_init();
+                break;
         default:
                 printk(KERN_ERR "Illegal mx31moboard_baseboard type %d\n",
                         mx31moboard_baseboard);
@@ -569,9 +540,9 @@ struct sys_timer mx31moboard_timer = {
 
 MACHINE_START(MX31MOBOARD, "EPFL Mobots mx31moboard")
         /* Maintainer: Valentin Longchamp, EPFL Mobots group */
-        .phys_io        = AIPS1_BASE_ADDR,
-        .io_pg_offst    = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc,
-        .boot_params    = PHYS_OFFSET + 0x100,
+        .phys_io        = MX31_AIPS1_BASE_ADDR,
+        .io_pg_offst    = (MX31_AIPS1_BASE_ADDR_VIRT >> 18) & 0xfffc,
+        .boot_params    = MX3x_PHYS_OFFSET + 0x100,
         .map_io         = mx31_map_io,
         .init_irq       = mx31_init_irq,
         .init_machine   = mxc_board_init,
diff --git a/arch/arm/mach-mx3/mx35pdk.c b/arch/arm/mach-mx3/mach-mx35pdk.c
index 0bbc65ea23c8..bcac84d4dca4 100644
--- a/arch/arm/mach-mx3/mx35pdk.c
+++ b/arch/arm/mach-mx3/mach-mx35pdk.c
@@ -106,9 +106,9 @@ struct sys_timer mx35pdk_timer = {
 
 MACHINE_START(MX35_3DS, "Freescale MX35PDK")
         /* Maintainer: Freescale Semiconductor, Inc */
-        .phys_io        = AIPS1_BASE_ADDR,
-        .io_pg_offst    = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc,
-        .boot_params    = PHYS_OFFSET + 0x100,
+        .phys_io        = MX35_AIPS1_BASE_ADDR,
+        .io_pg_offst    = ((MX35_AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc,
+        .boot_params    = MX3x_PHYS_OFFSET + 0x100,
         .map_io         = mx35_map_io,
         .init_irq       = mx35_init_irq,
         .init_machine   = mxc_board_init,
diff --git a/arch/arm/mach-mx3/pcm037.c b/arch/arm/mach-mx3/mach-pcm037.c
index 5be396917c99..11f531559169 100644
--- a/arch/arm/mach-mx3/pcm037.c
+++ b/arch/arm/mach-mx3/mach-pcm037.c
@@ -33,6 +33,9 @@
 #include <linux/irq.h>
 #include <linux/fsl_devices.h>
 #include <linux/can/platform/sja1000.h>
+#include <linux/usb/otg.h>
+#include <linux/usb/ulpi.h>
+#include <linux/fsl_devices.h>
 
 #include <media/soc_camera.h>
 
@@ -51,6 +54,8 @@
 #include <mach/mx3_camera.h>
 #include <mach/mx3fb.h>
 #include <mach/mxc_nand.h>
+#include <mach/mxc_ehci.h>
+#include <mach/ulpi.h>
 
 #include "devices.h"
 #include "pcm037.h"
@@ -172,19 +177,7 @@ static unsigned int pcm037_pins[] = {
         MX31_PIN_CSI_VSYNC__CSI_VSYNC,
         /* GPIO */
         IOMUX_MODE(MX31_PIN_ATA_DMACK, IOMUX_CONFIG_GPIO),
-};
-
-static struct physmap_flash_data pcm037_flash_data = {
-        .width  = 2,
-};
-
-static struct resource pcm037_flash_resource = {
-        .start  = 0xa0000000,
-        .end    = 0xa1ffffff,
-        .flags  = IORESOURCE_MEM,
-};
-
-static int usbotg_pins[] = {
+        /* OTG */
         MX31_PIN_USBOTG_DATA0__USBOTG_DATA0,
         MX31_PIN_USBOTG_DATA1__USBOTG_DATA1,
         MX31_PIN_USBOTG_DATA2__USBOTG_DATA2,
@@ -197,39 +190,29 @@ static int usbotg_pins[] = {
         MX31_PIN_USBOTG_DIR__USBOTG_DIR,
         MX31_PIN_USBOTG_NXT__USBOTG_NXT,
         MX31_PIN_USBOTG_STP__USBOTG_STP,
+        /* USB host 2 */
+        IOMUX_MODE(MX31_PIN_USBH2_CLK, IOMUX_CONFIG_FUNC),
+        IOMUX_MODE(MX31_PIN_USBH2_DIR, IOMUX_CONFIG_FUNC),
+        IOMUX_MODE(MX31_PIN_USBH2_NXT, IOMUX_CONFIG_FUNC),
+        IOMUX_MODE(MX31_PIN_USBH2_STP, IOMUX_CONFIG_FUNC),
+        IOMUX_MODE(MX31_PIN_USBH2_DATA0, IOMUX_CONFIG_FUNC),
+        IOMUX_MODE(MX31_PIN_USBH2_DATA1, IOMUX_CONFIG_FUNC),
+        IOMUX_MODE(MX31_PIN_STXD3, IOMUX_CONFIG_FUNC),
+        IOMUX_MODE(MX31_PIN_SRXD3, IOMUX_CONFIG_FUNC),
+        IOMUX_MODE(MX31_PIN_SCK3, IOMUX_CONFIG_FUNC),
+        IOMUX_MODE(MX31_PIN_SFS3, IOMUX_CONFIG_FUNC),
+        IOMUX_MODE(MX31_PIN_STXD6, IOMUX_CONFIG_FUNC),
+        IOMUX_MODE(MX31_PIN_SRXD6, IOMUX_CONFIG_FUNC),
 };
 
-/* USB OTG HS port */
-static int __init gpio_usbotg_hs_activate(void)
-{
-        int ret = mxc_iomux_setup_multiple_pins(usbotg_pins,
-                                        ARRAY_SIZE(usbotg_pins), "usbotg");
-
-        if (ret < 0) {
-                printk(KERN_ERR "Cannot set up OTG pins\n");
-                return ret;
-        }
-
-        mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA0, PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST);
-        mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA1, PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST);
-        mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA2, PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST);
-        mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA3, PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST);
-        mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA4, PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST);
-        mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA5, PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST);
-        mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA6, PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST);
-        mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA7, PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST);
-        mxc_iomux_set_pad(MX31_PIN_USBOTG_CLK,   PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST);
-        mxc_iomux_set_pad(MX31_PIN_USBOTG_DIR,   PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST);
-        mxc_iomux_set_pad(MX31_PIN_USBOTG_NXT,   PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST);
-        mxc_iomux_set_pad(MX31_PIN_USBOTG_STP,   PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST);
-
-        return 0;
-}
+static struct physmap_flash_data pcm037_flash_data = {
+        .width  = 2,
+};
 
-/* OTG config */
-static struct fsl_usb2_platform_data usb_pdata = {
-        .operating_mode = FSL_USB2_DR_DEVICE,
-        .phy_mode       = FSL_USB2_PHY_ULPI,
+static struct resource pcm037_flash_resource = {
+        .start  = 0xa0000000,
+        .end    = 0xa1ffffff,
+        .flags  = IORESOURCE_MEM,
 };
 
 static struct platform_device pcm037_flash = {
@@ -248,8 +231,8 @@ static struct imxuart_platform_data uart_pdata = {
 
 static struct resource smsc911x_resources[] = {
         {
-                .start          = CS1_BASE_ADDR + 0x300,
-                .end            = CS1_BASE_ADDR + 0x300 + SZ_64K - 1,
+                .start          = MX31_CS1_BASE_ADDR + 0x300,
+                .end            = MX31_CS1_BASE_ADDR + 0x300 + SZ_64K - 1,
                 .flags          = IORESOURCE_MEM,
         }, {
                 .start          = IOMUX_TO_IRQ(MX31_PIN_GPIO3_1),
@@ -281,8 +264,8 @@ static struct platdata_mtd_ram pcm038_sram_data = {
 };
 
 static struct resource pcm038_sram_resource = {
-        .start = CS4_BASE_ADDR,
-        .end   = CS4_BASE_ADDR + 512 * 1024 - 1,
+        .start = MX31_CS4_BASE_ADDR,
+        .end   = MX31_CS4_BASE_ADDR + 512 * 1024 - 1,
         .flags = IORESOURCE_MEM,
 };
 
@@ -536,8 +519,8 @@ static struct mx3fb_platform_data mx3fb_pdata = {
 
 static struct resource pcm970_sja1000_resources[] = {
         {
-                .start   = CS5_BASE_ADDR,
-                .end     = CS5_BASE_ADDR + 0x100 - 1,
+                .start   = MX31_CS5_BASE_ADDR,
+                .end     = MX31_CS5_BASE_ADDR + 0x100 - 1,
                 .flags   = IORESOURCE_MEM,
         }, {
                 .start   = IOMUX_TO_IRQ(IOMUX_PIN(48, 105)),
@@ -561,16 +544,65 @@ static struct platform_device pcm970_sja1000 = {
         .num_resources = ARRAY_SIZE(pcm970_sja1000_resources),
 };
 
+static struct mxc_usbh_platform_data otg_pdata = {
+        .portsc = MXC_EHCI_MODE_ULPI,
+        .flags  = MXC_EHCI_INTERFACE_DIFF_UNI,
+};
+
+static struct mxc_usbh_platform_data usbh2_pdata = {
+        .portsc = MXC_EHCI_MODE_ULPI,
+        .flags  = MXC_EHCI_INTERFACE_DIFF_UNI,
+};
+
+static struct fsl_usb2_platform_data otg_device_pdata = {
+        .operating_mode = FSL_USB2_DR_DEVICE,
+        .phy_mode       = FSL_USB2_PHY_ULPI,
+};
+
+static int otg_mode_host;
+
+static int __init pcm037_otg_mode(char *options)
+{
+        if (!strcmp(options, "host"))
+                otg_mode_host = 1;
+        else if (!strcmp(options, "device"))
+                otg_mode_host = 0;
+        else
+                pr_info("otg_mode neither \"host\" nor \"device\". "
+                        "Defaulting to device\n");
+        return 0;
+}
+__setup("otg_mode=", pcm037_otg_mode);
+
 /*
  * Board specific initialization.
  */
 static void __init mxc_board_init(void)
 {
         int ret;
+        u32 tmp;
+
+        mxc_iomux_set_gpr(MUX_PGP_UH2, 1);
 
         mxc_iomux_setup_multiple_pins(pcm037_pins, ARRAY_SIZE(pcm037_pins),
                         "pcm037");
 
+#define H2_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS \
+                | PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU)
+
+        mxc_iomux_set_pad(MX31_PIN_USBH2_CLK, H2_PAD_CFG);
+        mxc_iomux_set_pad(MX31_PIN_USBH2_DIR, H2_PAD_CFG);
+        mxc_iomux_set_pad(MX31_PIN_USBH2_NXT, H2_PAD_CFG);
+        mxc_iomux_set_pad(MX31_PIN_USBH2_STP, H2_PAD_CFG);
+        mxc_iomux_set_pad(MX31_PIN_USBH2_DATA0, H2_PAD_CFG); /* USBH2_DATA0 */
+        mxc_iomux_set_pad(MX31_PIN_USBH2_DATA1, H2_PAD_CFG); /* USBH2_DATA1 */
+        mxc_iomux_set_pad(MX31_PIN_SRXD6, H2_PAD_CFG);  /* USBH2_DATA2 */
+        mxc_iomux_set_pad(MX31_PIN_STXD6, H2_PAD_CFG);  /* USBH2_DATA3 */
+        mxc_iomux_set_pad(MX31_PIN_SFS3, H2_PAD_CFG);   /* USBH2_DATA4 */
+        mxc_iomux_set_pad(MX31_PIN_SCK3, H2_PAD_CFG);   /* USBH2_DATA5 */
+        mxc_iomux_set_pad(MX31_PIN_SRXD3, H2_PAD_CFG);  /* USBH2_DATA6 */
+        mxc_iomux_set_pad(MX31_PIN_STXD3, H2_PAD_CFG);  /* USBH2_DATA7 */
+
         if (pcm037_variant() == PCM037_EET)
                 mxc_iomux_setup_multiple_pins(pcm037_uart1_pins,
                         ARRAY_SIZE(pcm037_uart1_pins), "pcm037_uart1");
@@ -608,8 +640,6 @@ static void __init mxc_board_init(void)
         mxc_register_device(&mxcsdhc_device0, &sdhc_pdata);
         mxc_register_device(&mx3_ipu, &mx3_ipu_data);
         mxc_register_device(&mx3_fb, &mx3fb_pdata);
-        if (!gpio_usbotg_hs_activate())
-                mxc_register_device(&mxc_otg_udc_device, &usb_pdata);
 
         /* CSI */
         /* Camera power: default - off */
@@ -623,6 +653,23 @@ static void __init mxc_board_init(void)
                 mxc_register_device(&mx3_camera, &camera_pdata);
 
         platform_device_register(&pcm970_sja1000);
+
+#if defined(CONFIG_USB_ULPI)
+        if (otg_mode_host) {
+                otg_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops,
+                                USB_OTG_DRV_VBUS | USB_OTG_DRV_VBUS_EXT);
+
+                mxc_register_device(&mxc_otg_host, &otg_pdata);
+        }
+
+        usbh2_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops,
+                                USB_OTG_DRV_VBUS | USB_OTG_DRV_VBUS_EXT);
+
+        mxc_register_device(&mxc_usbh2, &usbh2_pdata);
+#endif
+        if (!otg_mode_host)
+                mxc_register_device(&mxc_otg_udc_device, &otg_device_pdata);
+
 }
 
 static void __init pcm037_timer_init(void)
@@ -636,9 +683,9 @@ struct sys_timer pcm037_timer = {
 
 MACHINE_START(PCM037, "Phytec Phycore pcm037")
         /* Maintainer: Pengutronix */
-        .phys_io        = AIPS1_BASE_ADDR,
-        .io_pg_offst    = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc,
-        .boot_params    = PHYS_OFFSET + 0x100,
+        .phys_io        = MX31_AIPS1_BASE_ADDR,
+        .io_pg_offst    = (MX31_AIPS1_BASE_ADDR_VIRT >> 18) & 0xfffc,
+        .boot_params    = MX3x_PHYS_OFFSET + 0x100,
         .map_io         = mx31_map_io,
         .init_irq       = mx31_init_irq,
         .init_machine   = mxc_board_init,
diff --git a/arch/arm/mach-mx3/pcm037_eet.c b/arch/arm/mach-mx3/mach-pcm037_eet.c
index 8d386000fc40..8d386000fc40 100644
--- a/arch/arm/mach-mx3/pcm037_eet.c
+++ b/arch/arm/mach-mx3/mach-pcm037_eet.c
diff --git a/arch/arm/mach-mx3/pcm043.c b/arch/arm/mach-mx3/mach-pcm043.c
index e3aa829be586..1bf1ec2eef5e 100644
--- a/arch/arm/mach-mx3/pcm043.c
+++ b/arch/arm/mach-mx3/mach-pcm043.c
@@ -26,8 +26,12 @@
 #include <linux/gpio.h>
 #include <linux/smc911x.h>
 #include <linux/interrupt.h>
+#include <linux/delay.h>
 #include <linux/i2c.h>
 #include <linux/i2c/at24.h>
+#include <linux/usb/otg.h>
+#include <linux/usb/ulpi.h>
+#include <linux/fsl_devices.h>
 
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
@@ -44,6 +48,10 @@
 #include <mach/ipu.h>
 #include <mach/mx3fb.h>
 #include <mach/mxc_nand.h>
+#include <mach/mxc_ehci.h>
+#include <mach/ulpi.h>
+#include <mach/audmux.h>
+#include <mach/ssi.h>
 
 #include "devices.h"
 
@@ -205,6 +213,94 @@ static struct pad_desc pcm043_pads[] = {
         MX35_PAD_D3_CLS__IPU_DISPB_D3_CLS,
         /* gpio */
         MX35_PAD_ATA_CS0__GPIO2_6,
+        /* USB host */
+        MX35_PAD_I2C2_CLK__USB_TOP_USBH2_PWR,
+        MX35_PAD_I2C2_DAT__USB_TOP_USBH2_OC,
+        /* SSI */
+        MX35_PAD_STXFS4__AUDMUX_AUD4_TXFS,
+        MX35_PAD_STXD4__AUDMUX_AUD4_TXD,
+        MX35_PAD_SRXD4__AUDMUX_AUD4_RXD,
+        MX35_PAD_SCK4__AUDMUX_AUD4_TXC,
+};
+
+#define AC97_GPIO_TXFS  (1 * 32 + 31)
+#define AC97_GPIO_TXD   (1 * 32 + 28)
+#define AC97_GPIO_RESET (1 * 32 + 0)
+
+static void pcm043_ac97_warm_reset(struct snd_ac97 *ac97)
+{
+        struct pad_desc txfs_gpio = MX35_PAD_STXFS4__GPIO2_31;
+        struct pad_desc txfs = MX35_PAD_STXFS4__AUDMUX_AUD4_TXFS;
+        int ret;
+
+        ret = gpio_request(AC97_GPIO_TXFS, "SSI");
+        if (ret) {
+                printk("failed to get GPIO_TXFS: %d\n", ret);
+                return;
+        }
+
+        mxc_iomux_v3_setup_pad(&txfs_gpio);
+
+        /* warm reset */
+        gpio_direction_output(AC97_GPIO_TXFS, 1);
+        udelay(2);
+        gpio_set_value(AC97_GPIO_TXFS, 0);
+
+        gpio_free(AC97_GPIO_TXFS);
+        mxc_iomux_v3_setup_pad(&txfs);
+}
+
+static void pcm043_ac97_cold_reset(struct snd_ac97 *ac97)
+{
+        struct pad_desc txfs_gpio = MX35_PAD_STXFS4__GPIO2_31;
+        struct pad_desc txfs = MX35_PAD_STXFS4__AUDMUX_AUD4_TXFS;
+        struct pad_desc txd_gpio = MX35_PAD_STXD4__GPIO2_28;
+        struct pad_desc txd = MX35_PAD_STXD4__AUDMUX_AUD4_TXD;
+        struct pad_desc reset_gpio = MX35_PAD_SD2_CMD__GPIO2_0;
+        int ret;
+
+        ret = gpio_request(AC97_GPIO_TXFS, "SSI");
+        if (ret)
+                goto err1;
+
+        ret = gpio_request(AC97_GPIO_TXD, "SSI");
+        if (ret)
+                goto err2;
+
+        ret = gpio_request(AC97_GPIO_RESET, "SSI");
+        if (ret)
+                goto err3;
+
+        mxc_iomux_v3_setup_pad(&txfs_gpio);
+        mxc_iomux_v3_setup_pad(&txd_gpio);
+        mxc_iomux_v3_setup_pad(&reset_gpio);
+
+        gpio_direction_output(AC97_GPIO_TXFS, 0);
+        gpio_direction_output(AC97_GPIO_TXD, 0);
+
+        /* cold reset */
+        gpio_direction_output(AC97_GPIO_RESET, 0);
+        udelay(10);
+        gpio_direction_output(AC97_GPIO_RESET, 1);
+
+        mxc_iomux_v3_setup_pad(&txd);
+        mxc_iomux_v3_setup_pad(&txfs);
+
+        gpio_free(AC97_GPIO_RESET);
+err3:
+        gpio_free(AC97_GPIO_TXD);
+err2:
+        gpio_free(AC97_GPIO_TXFS);
+err1:
+        if (ret)
+                printk("%s failed with %d\n", __func__, ret);
+        mdelay(1);
+}
+
+static struct imx_ssi_platform_data pcm043_ssi_pdata = {
+        .ac97_reset = pcm043_ac97_cold_reset,
+        .ac97_warm_reset = pcm043_ac97_warm_reset,
+        .flags = IMX_SSI_USE_AC97,
 };
 
 static struct mxc_nand_platform_data pcm037_nand_board_info = {
@@ -212,6 +308,37 @@ static struct mxc_nand_platform_data pcm037_nand_board_info = {
         .hw_ecc = 1,
 };
 
+static struct mxc_usbh_platform_data otg_pdata = {
+        .portsc = MXC_EHCI_MODE_UTMI,
+        .flags  = MXC_EHCI_INTERFACE_DIFF_UNI,
+};
+
+static struct mxc_usbh_platform_data usbh1_pdata = {
+        .portsc = MXC_EHCI_MODE_SERIAL,
+        .flags  = MXC_EHCI_INTERFACE_SINGLE_UNI | MXC_EHCI_INTERNAL_PHY |
+                  MXC_EHCI_IPPUE_DOWN,
+};
+
+static struct fsl_usb2_platform_data otg_device_pdata = {
+        .operating_mode = FSL_USB2_DR_DEVICE,
+        .phy_mode       = FSL_USB2_PHY_UTMI,
+};
+
+static int otg_mode_host;
+
+static int __init pcm043_otg_mode(char *options)
+{
+        if (!strcmp(options, "host"))
+                otg_mode_host = 1;
+        else if (!strcmp(options, "device"))
+                otg_mode_host = 0;
+        else
+                pr_info("otg_mode neither \"host\" nor \"device\". "
+                        "Defaulting to device\n");
+        return 0;
+}
+__setup("otg_mode=", pcm043_otg_mode);
+
 /*
  * Board specific initialization.
  */
@@ -219,10 +346,23 @@ static void __init mxc_board_init(void)
 {
         mxc_iomux_v3_setup_multiple_pads(pcm043_pads, ARRAY_SIZE(pcm043_pads));
 
+        mxc_audmux_v2_configure_port(3,
+                        MXC_AUDMUX_V2_PTCR_SYN | /* 4wire mode */
+                        MXC_AUDMUX_V2_PTCR_TFSEL(0) |
+                        MXC_AUDMUX_V2_PTCR_TFSDIR,
+                        MXC_AUDMUX_V2_PDCR_RXDSEL(0));
+
+        mxc_audmux_v2_configure_port(0,
+                        MXC_AUDMUX_V2_PTCR_SYN | /* 4wire mode */
+                        MXC_AUDMUX_V2_PTCR_TCSEL(3) |
+                        MXC_AUDMUX_V2_PTCR_TCLKDIR, /* clock is output */
+                        MXC_AUDMUX_V2_PDCR_RXDSEL(3));
+
         platform_add_devices(devices, ARRAY_SIZE(devices));
 
         mxc_register_device(&mxc_uart_device0, &uart_pdata);
         mxc_register_device(&mxc_nand_device, &pcm037_nand_board_info);
+        mxc_register_device(&imx_ssi_device0, &pcm043_ssi_pdata);
 
         mxc_register_device(&mxc_uart_device1, &uart_pdata);
 
@@ -235,6 +375,20 @@ static void __init mxc_board_init(void)
 
         mxc_register_device(&mx3_ipu, &mx3_ipu_data);
         mxc_register_device(&mx3_fb, &mx3fb_pdata);
+
+#if defined(CONFIG_USB_ULPI)
+        if (otg_mode_host) {
+                otg_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops,
+                                USB_OTG_DRV_VBUS | USB_OTG_DRV_VBUS_EXT);
+
+                mxc_register_device(&mxc_otg_host, &otg_pdata);
+        }
+
+        mxc_register_device(&mxc_usbh1, &usbh1_pdata);
+#endif
+        if (!otg_mode_host)
+                mxc_register_device(&mxc_otg_udc_device, &otg_device_pdata);
+
 }
 
 static void __init pcm043_timer_init(void)
@@ -248,9 +402,9 @@ struct sys_timer pcm043_timer = {
 
 MACHINE_START(PCM043, "Phytec Phycore pcm043")
         /* Maintainer: Pengutronix */
-        .phys_io        = AIPS1_BASE_ADDR,
-        .io_pg_offst    = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc,
-        .boot_params    = PHYS_OFFSET + 0x100,
+        .phys_io        = MX35_AIPS1_BASE_ADDR,
+        .io_pg_offst    = ((MX35_AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc,
+        .boot_params    = MX3x_PHYS_OFFSET + 0x100,
         .map_io         = mx35_map_io,
         .init_irq       = mx35_init_irq,
         .init_machine   = mxc_board_init,
diff --git a/arch/arm/mach-mx3/qong.c b/arch/arm/mach-mx3/mach-qong.c
index 044511f1b9a9..e5b5b8323a17 100644
--- a/arch/arm/mach-mx3/qong.c
+++ b/arch/arm/mach-mx3/mach-qong.c
@@ -43,7 +43,7 @@
 #define QONG_FPGA_VERSION(major, minor, rev)    \
         (((major & 0xF) << 12) | ((minor & 0xF) << 8) | (rev & 0xFF))
 
-#define QONG_FPGA_BASEADDR              CS1_BASE_ADDR
+#define QONG_FPGA_BASEADDR              MX31_CS1_BASE_ADDR
 #define QONG_FPGA_PERIPH_SIZE           (1 << 24)
 
 #define QONG_FPGA_CTRL_BASEADDR         QONG_FPGA_BASEADDR
@@ -115,8 +115,8 @@ static struct physmap_flash_data qong_flash_data = {
 };
 
 static struct resource qong_flash_resource = {
-        .start = CS0_BASE_ADDR,
-        .end = CS0_BASE_ADDR + QONG_NOR_SIZE - 1,
+        .start = MX31_CS0_BASE_ADDR,
+        .end = MX31_CS0_BASE_ADDR + QONG_NOR_SIZE - 1,
         .flags = IORESOURCE_MEM,
 };
 
@@ -180,8 +180,8 @@ static struct platform_nand_data qong_nand_data = {
 };
 
 static struct resource qong_nand_resource = {
-        .start          = CS3_BASE_ADDR,
-        .end            = CS3_BASE_ADDR + SZ_32M - 1,
+        .start          = MX31_CS3_BASE_ADDR,
+        .end            = MX31_CS3_BASE_ADDR + SZ_32M - 1,
         .flags          = IORESOURCE_MEM,
 };
 
@@ -198,9 +198,7 @@ static struct platform_device qong_nand_device = {
 static void __init qong_init_nand_mtd(void)
 {
         /* init CS */
-        __raw_writel(0x00004f00, CSCR_U(3));
-        __raw_writel(0x20013b31, CSCR_L(3));
-        __raw_writel(0x00020800, CSCR_A(3));
+        mx31_setup_weimcs(3, 0x00004f00, 0x20013b31, 0x00020800);
         mxc_iomux_set_gpr(MUX_SDCTL_CSD1_SEL, true);
 
         /* enable pin */
@@ -275,9 +273,9 @@ static struct sys_timer qong_timer = {
 
 MACHINE_START(QONG, "Dave/DENX QongEVB-LITE")
         /* Maintainer: DENX Software Engineering GmbH */
-        .phys_io        = AIPS1_BASE_ADDR,
-        .io_pg_offst    = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc,
-        .boot_params    = PHYS_OFFSET + 0x100,
+        .phys_io        = MX31_AIPS1_BASE_ADDR,
+        .io_pg_offst    = (MX31_AIPS1_BASE_ADDR_VIRT >> 18) & 0xfffc,
+        .boot_params    = MX3x_PHYS_OFFSET + 0x100,
         .map_io         = mx31_map_io,
         .init_irq       = mx31_init_irq,
         .init_machine   = mxc_board_init,
diff --git a/arch/arm/mach-mx3/mx31lite-db.c b/arch/arm/mach-mx3/mx31lite-db.c
index 694611d6b057..ccd874225c3b 100644
--- a/arch/arm/mach-mx3/mx31lite-db.c
+++ b/arch/arm/mach-mx3/mx31lite-db.c
@@ -67,6 +67,13 @@ static unsigned int litekit_db_board_pins[] __initdata = {
         MX31_PIN_CSPI1_SS0__SS0,
         MX31_PIN_CSPI1_SS1__SS1,
         MX31_PIN_CSPI1_SS2__SS2,
+        /* SDHC1 */
+        MX31_PIN_SD1_DATA0__SD1_DATA0,
+        MX31_PIN_SD1_DATA1__SD1_DATA1,
+        MX31_PIN_SD1_DATA2__SD1_DATA2,
+        MX31_PIN_SD1_DATA3__SD1_DATA3,
+        MX31_PIN_SD1_CLK__SD1_CLK,
+        MX31_PIN_SD1_CMD__SD1_CMD,
 };
 
 /* UART */
@@ -79,11 +86,11 @@ static struct imxuart_platform_data uart_pdata __initdata = {
 static int gpio_det, gpio_wp;
 
 #define MMC_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \
-                        PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU)
+                     PAD_CTL_ODE_CMOS)
 
 static int mxc_mmc1_get_ro(struct device *dev)
 {
-        return gpio_get_value(IOMUX_TO_GPIO(MX31_PIN_LCS0));
+        return gpio_get_value(IOMUX_TO_GPIO(MX31_PIN_GPIO1_6));
 }
 
 static int mxc_mmc1_init(struct device *dev,
@@ -94,12 +101,17 @@ static int mxc_mmc1_init(struct device *dev,
         gpio_det = IOMUX_TO_GPIO(MX31_PIN_DCD_DCE1);
         gpio_wp = IOMUX_TO_GPIO(MX31_PIN_GPIO1_6);
 
-        mxc_iomux_set_pad(MX31_PIN_SD1_DATA0, MMC_PAD_CFG);
-        mxc_iomux_set_pad(MX31_PIN_SD1_DATA1, MMC_PAD_CFG);
-        mxc_iomux_set_pad(MX31_PIN_SD1_DATA2, MMC_PAD_CFG);
-        mxc_iomux_set_pad(MX31_PIN_SD1_DATA3, MMC_PAD_CFG);
+        mxc_iomux_set_pad(MX31_PIN_SD1_DATA0,
+                          MMC_PAD_CFG | PAD_CTL_PUE_PUD | PAD_CTL_100K_PU);
+        mxc_iomux_set_pad(MX31_PIN_SD1_DATA1,
+                          MMC_PAD_CFG | PAD_CTL_PUE_PUD | PAD_CTL_100K_PU);
+        mxc_iomux_set_pad(MX31_PIN_SD1_DATA2,
+                          MMC_PAD_CFG | PAD_CTL_PUE_PUD | PAD_CTL_100K_PU);
+        mxc_iomux_set_pad(MX31_PIN_SD1_DATA3,
+                          MMC_PAD_CFG | PAD_CTL_PUE_PUD | PAD_CTL_100K_PU);
+        mxc_iomux_set_pad(MX31_PIN_SD1_CMD,
+                          MMC_PAD_CFG | PAD_CTL_PUE_PUD | PAD_CTL_100K_PU);
         mxc_iomux_set_pad(MX31_PIN_SD1_CLK, MMC_PAD_CFG);
-        mxc_iomux_set_pad(MX31_PIN_SD1_CMD, MMC_PAD_CFG);
 
         ret = gpio_request(gpio_det, "MMC detect");
         if (ret)
@@ -113,7 +125,7 @@ static int mxc_mmc1_init(struct device *dev,
         gpio_direction_input(gpio_wp);
 
         ret = request_irq(IOMUX_TO_IRQ(MX31_PIN_DCD_DCE1), detect_irq,
-                          IRQF_DISABLED | IRQF_TRIGGER_FALLING,
+                          IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
                           "MMC detect", data);
         if (ret)
                 goto exit_free_wp;
@@ -133,7 +145,7 @@ static void mxc_mmc1_exit(struct device *dev, void *data)
 {
         gpio_free(gpio_det);
         gpio_free(gpio_wp);
-        free_irq(IOMUX_TO_IRQ(MX31_PIN_GPIO1_1), data);
+        free_irq(IOMUX_TO_IRQ(MX31_PIN_DCD_DCE1), data);
 }
 
 static struct imxmmc_platform_data mmc_pdata = {
diff --git a/arch/arm/mach-mx3/mx31moboard-devboard.c b/arch/arm/mach-mx3/mx31moboard-devboard.c
index 438428eaf769..9fbad2eb3a49 100644
--- a/arch/arm/mach-mx3/mx31moboard-devboard.c
+++ b/arch/arm/mach-mx3/mx31moboard-devboard.c
@@ -49,6 +49,9 @@ static unsigned int devboard_pins[] = {
         MX31_PIN_CSPI1_SS2__USBH1_RCV, MX31_PIN_CSPI1_SCLK__USBH1_OEB,
         MX31_PIN_CSPI1_SPI_RDY__USBH1_FS, MX31_PIN_SFS6__USBH1_SUSPEND,
         MX31_PIN_NFRE_B__GPIO1_11, MX31_PIN_NFALE__GPIO1_12,
+        /* SEL */
+        MX31_PIN_DTR_DCE1__GPIO2_8, MX31_PIN_DSR_DCE1__GPIO2_9,
+        MX31_PIN_RI_DCE1__GPIO2_10, MX31_PIN_DCD_DCE1__GPIO2_11,
 };
 
 static struct imxuart_platform_data uart_pdata = {
@@ -108,6 +111,33 @@ static struct imxmmc_platform_data sdhc2_pdata = {
         .exit   = devboard_sdhc2_exit,
 };
 
+#define SEL0 IOMUX_TO_GPIO(MX31_PIN_DTR_DCE1)
+#define SEL1 IOMUX_TO_GPIO(MX31_PIN_DSR_DCE1)
+#define SEL2 IOMUX_TO_GPIO(MX31_PIN_RI_DCE1)
+#define SEL3 IOMUX_TO_GPIO(MX31_PIN_DCD_DCE1)
+
+static void devboard_init_sel_gpios(void)
+{
+        if (!gpio_request(SEL0, "sel0")) {
+                gpio_direction_input(SEL0);
+                gpio_export(SEL0, true);
+        }
+
+        if (!gpio_request(SEL1, "sel1")) {
+                gpio_direction_input(SEL1);
+                gpio_export(SEL1, true);
+        }
+
+        if (!gpio_request(SEL2, "sel2")) {
+                gpio_direction_input(SEL2);
+                gpio_export(SEL2, true);
+        }
+
+        if (!gpio_request(SEL3, "sel3")) {
+                gpio_direction_input(SEL3);
+                gpio_export(SEL3, true);
+        }
+}
 #define USB_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \
                         PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU)
 
@@ -196,5 +226,7 @@ void __init mx31moboard_devboard_init(void)
 
         mxc_register_device(&mxcsdhc_device1, &sdhc2_pdata);
 
+        devboard_init_sel_gpios();
+
         devboard_usbh1_init();
 }
diff --git a/arch/arm/mach-mx3/mx31moboard-marxbot.c b/arch/arm/mach-mx3/mx31moboard-marxbot.c
index 1f44b9ccbb0f..3958515d75bf 100644
--- a/arch/arm/mach-mx3/mx31moboard-marxbot.c
+++ b/arch/arm/mach-mx3/mx31moboard-marxbot.c
@@ -66,6 +66,9 @@ static unsigned int marxbot_pins[] = {
         MX31_PIN_CSPI1_SS2__USBH1_RCV, MX31_PIN_CSPI1_SCLK__USBH1_OEB,
         MX31_PIN_CSPI1_SPI_RDY__USBH1_FS, MX31_PIN_SFS6__USBH1_SUSPEND,
         MX31_PIN_NFRE_B__GPIO1_11, MX31_PIN_NFALE__GPIO1_12,
+        /* SEL */
+        MX31_PIN_DTR_DCE1__GPIO2_8, MX31_PIN_DSR_DCE1__GPIO2_9,
+        MX31_PIN_RI_DCE1__GPIO2_10, MX31_PIN_DCD_DCE1__GPIO2_11,
 };
 
 #define SDHC2_CD IOMUX_TO_GPIO(MX31_PIN_ATA_DIOR)
@@ -127,12 +130,12 @@ static struct imxmmc_platform_data sdhc2_pdata = {
 static void dspics_resets_init(void)
 {
         if (!gpio_request(TRSLAT_RST_B, "translator-rst")) {
-                gpio_direction_output(TRSLAT_RST_B, 1);
+                gpio_direction_output(TRSLAT_RST_B, 0);
                 gpio_export(TRSLAT_RST_B, false);
         }
 
         if (!gpio_request(DSPICS_RST_B, "dspics-rst")) {
-                gpio_direction_output(DSPICS_RST_B, 1);
+                gpio_direction_output(DSPICS_RST_B, 0);
                 gpio_export(DSPICS_RST_B, false);
         }
 }
@@ -200,7 +203,7 @@ static int __init marxbot_cam_init(void)
         int ret = gpio_request(CAM_CHOICE, "cam-choice");
         if (ret)
                 return ret;
-        gpio_direction_output(CAM_CHOICE, 1);
+        gpio_direction_output(CAM_CHOICE, 0);
 
         ret = gpio_request(BASECAM_RST_B, "basecam-reset");
         if (ret)
@@ -223,6 +226,34 @@ static int __init marxbot_cam_init(void)
         return 0;
 }
 
+#define SEL0 IOMUX_TO_GPIO(MX31_PIN_DTR_DCE1)
+#define SEL1 IOMUX_TO_GPIO(MX31_PIN_DSR_DCE1)
+#define SEL2 IOMUX_TO_GPIO(MX31_PIN_RI_DCE1)
+#define SEL3 IOMUX_TO_GPIO(MX31_PIN_DCD_DCE1)
+
+static void marxbot_init_sel_gpios(void)
+{
+        if (!gpio_request(SEL0, "sel0")) {
+                gpio_direction_input(SEL0);
+                gpio_export(SEL0, true);
+        }
+
+        if (!gpio_request(SEL1, "sel1")) {
+                gpio_direction_input(SEL1);
+                gpio_export(SEL1, true);
+        }
+
+        if (!gpio_request(SEL2, "sel2")) {
+                gpio_direction_input(SEL2);
+                gpio_export(SEL2, true);
+        }
+
+        if (!gpio_request(SEL3, "sel3")) {
+                gpio_direction_input(SEL3);
+                gpio_export(SEL3, true);
+        }
+}
+
 #define USB_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \
                         PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU)
 
@@ -307,6 +338,8 @@ void __init mx31moboard_marxbot_init(void)
         mxc_iomux_setup_multiple_pins(marxbot_pins, ARRAY_SIZE(marxbot_pins),
                 "marxbot");
 
+        marxbot_init_sel_gpios();
+
         dspics_resets_init();
 
         mxc_register_device(&mxcsdhc_device1, &sdhc2_pdata);
diff --git a/arch/arm/mach-mx3/mx31moboard-smartbot.c b/arch/arm/mach-mx3/mx31moboard-smartbot.c
new file mode 100644
index 000000000000..52a69fc8b14f
--- /dev/null
+++ b/arch/arm/mach-mx3/mx31moboard-smartbot.c
@@ -0,0 +1,162 @@
+/*
+ * Copyright (C) 2009 Valentin Longchamp, EPFL Mobots group
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+
+#include <linux/delay.h>
+#include <linux/gpio.h>
+#include <linux/init.h>
+#include <linux/interrupt.h>
+#include <linux/i2c.h>
+#include <linux/platform_device.h>
+#include <linux/types.h>
+
+#include <mach/common.h>
+#include <mach/hardware.h>
+#include <mach/imx-uart.h>
+#include <mach/iomux-mx3.h>
+
+#include <media/soc_camera.h>
+
+#include "devices.h"
+
+static unsigned int smartbot_pins[] = {
+        /* UART1 */
+        MX31_PIN_CTS2__CTS2, MX31_PIN_RTS2__RTS2,
+        MX31_PIN_TXD2__TXD2, MX31_PIN_RXD2__RXD2,
+        /* CSI */
+        MX31_PIN_CSI_D4__CSI_D4, MX31_PIN_CSI_D5__CSI_D5,
+        MX31_PIN_CSI_D6__CSI_D6, MX31_PIN_CSI_D7__CSI_D7,
+        MX31_PIN_CSI_D8__CSI_D8, MX31_PIN_CSI_D9__CSI_D9,
+        MX31_PIN_CSI_D10__CSI_D10, MX31_PIN_CSI_D11__CSI_D11,
+        MX31_PIN_CSI_D12__CSI_D12, MX31_PIN_CSI_D13__CSI_D13,
+        MX31_PIN_CSI_D14__CSI_D14, MX31_PIN_CSI_D15__CSI_D15,
+        MX31_PIN_CSI_HSYNC__CSI_HSYNC, MX31_PIN_CSI_MCLK__CSI_MCLK,
+        MX31_PIN_CSI_PIXCLK__CSI_PIXCLK, MX31_PIN_CSI_VSYNC__CSI_VSYNC,
+        MX31_PIN_GPIO3_0__GPIO3_0, MX31_PIN_GPIO3_1__GPIO3_1,
+        /* ENABLES */
+        MX31_PIN_DTR_DCE1__GPIO2_8, MX31_PIN_DSR_DCE1__GPIO2_9,
+        MX31_PIN_RI_DCE1__GPIO2_10, MX31_PIN_DCD_DCE1__GPIO2_11,
+};
+
+static struct imxuart_platform_data uart_pdata = {
+        .flags = IMXUART_HAVE_RTSCTS,
+};
+
+#define CAM_POWER       IOMUX_TO_GPIO(MX31_PIN_GPIO3_1)
+#define CAM_RST_B       IOMUX_TO_GPIO(MX31_PIN_GPIO3_0)
+
+static int smartbot_cam_power(struct device *dev, int on)
+{
+        gpio_set_value(CAM_POWER, !on);
+        return 0;
+}
+
+static int smartbot_cam_reset(struct device *dev)
+{
+        gpio_set_value(CAM_RST_B, 0);
+        udelay(100);
+        gpio_set_value(CAM_RST_B, 1);
+        return 0;
+}
+
+static struct i2c_board_info smartbot_i2c_devices[] = {
+        {
+                I2C_BOARD_INFO("mt9t031", 0x5d),
+        },
+};
+
+static struct soc_camera_link base_iclink = {
+        .bus_id         = 0,            /* Must match with the camera ID */
+        .power          = smartbot_cam_power,
+        .reset          = smartbot_cam_reset,
+        .board_info     = &smartbot_i2c_devices[0],
+        .i2c_adapter_id = 0,
+        .module_name    = "mt9t031",
+};
+
+static struct platform_device smartbot_camera[] = {
+        {
+                .name   = "soc-camera-pdrv",
+                .id     = 0,
+                .dev    = {
+                        .platform_data = &base_iclink,
+                },
+        },
+};
+
+static struct platform_device *smartbot_cameras[] __initdata = {
+        &smartbot_camera[0],
+};
+
+static int __init smartbot_cam_init(void)
+{
+        int ret = gpio_request(CAM_RST_B, "cam-reset");
+        if (ret)
+                return ret;
+        gpio_direction_output(CAM_RST_B, 1);
+        ret = gpio_request(CAM_POWER, "cam-standby");
+        if (ret)
+                return ret;
+        gpio_direction_output(CAM_POWER, 0);
+
+        return 0;
+}
+
+#define POWER_EN IOMUX_TO_GPIO(MX31_PIN_DTR_DCE1)
+#define DSPIC_RST_B IOMUX_TO_GPIO(MX31_PIN_DSR_DCE1)
+#define TRSLAT_RST_B IOMUX_TO_GPIO(MX31_PIN_RI_DCE1)
+#define SEL3 IOMUX_TO_GPIO(MX31_PIN_DCD_DCE1)
+
+static void smartbot_resets_init(void)
+{
+        if (!gpio_request(POWER_EN, "power-enable")) {
+                gpio_direction_output(POWER_EN, 0);
+                gpio_export(POWER_EN, false);
+        }
+
+        if (!gpio_request(DSPIC_RST_B, "dspic-rst")) {
+                gpio_direction_output(DSPIC_RST_B, 0);
+                gpio_export(DSPIC_RST_B, false);
+        }
+
+        if (!gpio_request(TRSLAT_RST_B, "translator-rst")) {
+                gpio_direction_output(TRSLAT_RST_B, 0);
+                gpio_export(TRSLAT_RST_B, false);
+        }
+
+        if (!gpio_request(SEL3, "sel3")) {
+                gpio_direction_input(SEL3);
+                gpio_export(SEL3, true);
+        }
+}
+/*
+ * system init for baseboard usage. Will be called by mx31moboard init.
+ */
+void __init mx31moboard_smartbot_init(void)
+{
+        printk(KERN_INFO "Initializing mx31smartbot peripherals\n");
+
+        mxc_iomux_setup_multiple_pins(smartbot_pins, ARRAY_SIZE(smartbot_pins),
+                "smartbot");
+
+        mxc_register_device(&mxc_uart_device1, &uart_pdata);
+
+        smartbot_resets_init();
+
+        smartbot_cam_init();
+        platform_add_devices(smartbot_cameras, ARRAY_SIZE(smartbot_cameras));
+}
diff --git a/arch/arm/mach-mx5/Kconfig b/arch/arm/mach-mx5/Kconfig
new file mode 100644
index 000000000000..1576d51e676c
--- /dev/null
+++ b/arch/arm/mach-mx5/Kconfig
@@ -0,0 +1,18 @@
+if ARCH_MX5
+
+config ARCH_MX51
+        bool
+        default y
+        select MXC_TZIC
+        select ARCH_MXC_IOMUX_V3
+
+comment "MX5 platforms:"
+
+config MACH_MX51_BABBAGE
+        bool "Support MX51 BABBAGE platforms"
+        help
+          Include support for MX51 Babbage platform, also known as MX51EVK in
+          u-boot. This includes specific configurations for the board and its
+          peripherals.
+
+endif
diff --git a/arch/arm/mach-mx5/Makefile b/arch/arm/mach-mx5/Makefile
new file mode 100644
index 000000000000..bf23f869ef51
--- /dev/null
+++ b/arch/arm/mach-mx5/Makefile
@@ -0,0 +1,9 @@
+#
+# Makefile for the linux kernel.
+#
+
+# Object file lists.
+obj-y   := cpu.o mm.o clock-mx51.o devices.o
+
+obj-$(CONFIG_MACH_MX51_BABBAGE) += board-mx51_babbage.o
+
diff --git a/arch/arm/mach-mx5/Makefile.boot b/arch/arm/mach-mx5/Makefile.boot
new file mode 100644
index 000000000000..9939a19d99a1
--- /dev/null
+++ b/arch/arm/mach-mx5/Makefile.boot
@@ -0,0 +1,3 @@
+   zreladdr-y   := 0x90008000
+params_phys-y   := 0x90000100
+initrd_phys-y   := 0x90800000
diff --git a/arch/arm/mach-mx5/board-mx51_babbage.c b/arch/arm/mach-mx5/board-mx51_babbage.c
new file mode 100644
index 000000000000..ee67a71db80d
--- /dev/null
+++ b/arch/arm/mach-mx5/board-mx51_babbage.c
@@ -0,0 +1,98 @@
+/*
+ * Copyright 2009 Freescale Semiconductor, Inc. All Rights Reserved.
+ * Copyright (C) 2009-2010 Amit Kucheria <amit.kucheria@canonical.com>
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+#include <linux/init.h>
+#include <linux/platform_device.h>
+
+#include <mach/common.h>
+#include <mach/hardware.h>
+#include <mach/imx-uart.h>
+#include <mach/iomux-mx51.h>
+
+#include <asm/irq.h>
+#include <asm/setup.h>
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+#include <asm/mach/time.h>
+
+#include "devices.h"
+
+static struct platform_device *devices[] __initdata = {
+        &mxc_fec_device,
+};
+
+static struct pad_desc mx51babbage_pads[] = {
+        /* UART1 */
+        MX51_PAD_UART1_RXD__UART1_RXD,
+        MX51_PAD_UART1_TXD__UART1_TXD,
+        MX51_PAD_UART1_RTS__UART1_RTS,
+        MX51_PAD_UART1_CTS__UART1_CTS,
+
+        /* UART2 */
+        MX51_PAD_UART2_RXD__UART2_RXD,
+        MX51_PAD_UART2_TXD__UART2_TXD,
+
+        /* UART3 */
+        MX51_PAD_EIM_D25__UART3_RXD,
+        MX51_PAD_EIM_D26__UART3_TXD,
+        MX51_PAD_EIM_D27__UART3_RTS,
+        MX51_PAD_EIM_D24__UART3_CTS,
+};
+
+/* Serial ports */
+#if defined(CONFIG_SERIAL_IMX) || defined(CONFIG_SERIAL_IMX_MODULE)
+static struct imxuart_platform_data uart_pdata = {
+        .flags = IMXUART_HAVE_RTSCTS,
+};
+
+static inline void mxc_init_imx_uart(void)
+{
+        mxc_register_device(&mxc_uart_device0, &uart_pdata);
+        mxc_register_device(&mxc_uart_device1, &uart_pdata);
+        mxc_register_device(&mxc_uart_device2, &uart_pdata);
+}
+#else /* !SERIAL_IMX */
+static inline void mxc_init_imx_uart(void)
+{
+}
+#endif /* SERIAL_IMX */
+
+/*
+ * Board specific initialization.
+ */
+static void __init mxc_board_init(void)
+{
+        mxc_iomux_v3_setup_multiple_pads(mx51babbage_pads,
+                                        ARRAY_SIZE(mx51babbage_pads));
+        mxc_init_imx_uart();
+        platform_add_devices(devices, ARRAY_SIZE(devices));
+}
+
+static void __init mx51_babbage_timer_init(void)
+{
+        mx51_clocks_init(32768, 24000000, 22579200, 0);
+}
+
+static struct sys_timer mxc_timer = {
+        .init   = mx51_babbage_timer_init,
+};
+
+MACHINE_START(MX51_BABBAGE, "Freescale MX51 Babbage Board")
+        /* Maintainer: Amit Kucheria <amit.kucheria@canonical.com> */
+        .phys_io = MX51_AIPS1_BASE_ADDR,
+        .io_pg_offst = ((MX51_AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc,
+        .boot_params = PHYS_OFFSET + 0x100,
+        .map_io = mx51_map_io,
+        .init_irq = mx51_init_irq,
+        .init_machine = mxc_board_init,
+        .timer = &mxc_timer,
+MACHINE_END
diff --git a/arch/arm/mach-mx5/clock-mx51.c b/arch/arm/mach-mx5/clock-mx51.c
new file mode 100644
index 000000000000..be90c03101cd
--- /dev/null
+++ b/arch/arm/mach-mx5/clock-mx51.c
@@ -0,0 +1,825 @@
+/*
+ * Copyright 2008-2010 Freescale Semiconductor, Inc. All Rights Reserved.
+ * Copyright (C) 2009-2010 Amit Kucheria <amit.kucheria@canonical.com>
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+#include <linux/mm.h>
+#include <linux/delay.h>
+#include <linux/clk.h>
+#include <linux/io.h>
+
+#include <asm/clkdev.h>
+
+#include <mach/hardware.h>
+#include <mach/common.h>
+#include <mach/clock.h>
+
+#include "crm_regs.h"
+
+/* External clock values passed-in by the board code */
+static unsigned long external_high_reference, external_low_reference;
+static unsigned long oscillator_reference, ckih2_reference;
+
+static struct clk osc_clk;
+static struct clk pll1_main_clk;
+static struct clk pll1_sw_clk;
+static struct clk pll2_sw_clk;
+static struct clk pll3_sw_clk;
+static struct clk lp_apm_clk;
+static struct clk periph_apm_clk;
+static struct clk ahb_clk;
+static struct clk ipg_clk;
+
+#define MAX_DPLL_WAIT_TRIES     1000 /* 1000 * udelay(1) = 1ms */
+
+static int _clk_ccgr_enable(struct clk *clk)
+{
+        u32 reg;
+
+        reg = __raw_readl(clk->enable_reg);
+        reg |= MXC_CCM_CCGRx_MOD_ON << clk->enable_shift;
+        __raw_writel(reg, clk->enable_reg);
+
+        return 0;
+}
+
+static void _clk_ccgr_disable(struct clk *clk)
+{
+        u32 reg;
+        reg = __raw_readl(clk->enable_reg);
+        reg &= ~(MXC_CCM_CCGRx_MOD_OFF << clk->enable_shift);
+        __raw_writel(reg, clk->enable_reg);
+
+}
+
+static void _clk_ccgr_disable_inwait(struct clk *clk)
+{
+        u32 reg;
+
+        reg = __raw_readl(clk->enable_reg);
+        reg &= ~(MXC_CCM_CCGRx_CG_MASK << clk->enable_shift);
+        reg |= MXC_CCM_CCGRx_MOD_IDLE << clk->enable_shift;
+        __raw_writel(reg, clk->enable_reg);
+}
+
+/*
+ * For the 4-to-1 muxed input clock
+ */
+static inline u32 _get_mux(struct clk *parent, struct clk *m0,
+                           struct clk *m1, struct clk *m2, struct clk *m3)
+{
+        if (parent == m0)
+                return 0;
+        else if (parent == m1)
+                return 1;
+        else if (parent == m2)
+                return 2;
+        else if (parent == m3)
+                return 3;
+        else
+                BUG();
+
+        return -EINVAL;
+}
+
+static inline void __iomem *_get_pll_base(struct clk *pll)
+{
+        if (pll == &pll1_main_clk)
+                return MX51_DPLL1_BASE;
+        else if (pll == &pll2_sw_clk)
+                return MX51_DPLL2_BASE;
+        else if (pll == &pll3_sw_clk)
+                return MX51_DPLL3_BASE;
+        else
+                BUG();
+
+        return NULL;
+}
+
+static unsigned long clk_pll_get_rate(struct clk *clk)
+{
+        long mfi, mfn, mfd, pdf, ref_clk, mfn_abs;
+        unsigned long dp_op, dp_mfd, dp_mfn, dp_ctl, pll_hfsm, dbl;
+        void __iomem *pllbase;
+        s64 temp;
+        unsigned long parent_rate;
+
+        parent_rate = clk_get_rate(clk->parent);
+
+        pllbase = _get_pll_base(clk);
+
+        dp_ctl = __raw_readl(pllbase + MXC_PLL_DP_CTL);
+        pll_hfsm = dp_ctl & MXC_PLL_DP_CTL_HFSM;
+        dbl = dp_ctl & MXC_PLL_DP_CTL_DPDCK0_2_EN;
+
+        if (pll_hfsm == 0) {
+                dp_op = __raw_readl(pllbase + MXC_PLL_DP_OP);
+                dp_mfd = __raw_readl(pllbase + MXC_PLL_DP_MFD);
+                dp_mfn = __raw_readl(pllbase + MXC_PLL_DP_MFN);
+        } else {
+                dp_op = __raw_readl(pllbase + MXC_PLL_DP_HFS_OP);
+                dp_mfd = __raw_readl(pllbase + MXC_PLL_DP_HFS_MFD);
+                dp_mfn = __raw_readl(pllbase + MXC_PLL_DP_HFS_MFN);
+        }
+        pdf = dp_op & MXC_PLL_DP_OP_PDF_MASK;
+        mfi = (dp_op & MXC_PLL_DP_OP_MFI_MASK) >> MXC_PLL_DP_OP_MFI_OFFSET;
+        mfi = (mfi <= 5) ? 5 : mfi;
+        mfd = dp_mfd & MXC_PLL_DP_MFD_MASK;
+        mfn = mfn_abs = dp_mfn & MXC_PLL_DP_MFN_MASK;
+        /* Sign extend to 32-bits */
+        if (mfn >= 0x04000000) {
+                mfn |= 0xFC000000;
+                mfn_abs = -mfn;
+        }
+
+        ref_clk = 2 * parent_rate;
+        if (dbl != 0)
+                ref_clk *= 2;
+
+        ref_clk /= (pdf + 1);
+        temp = (u64) ref_clk * mfn_abs;
+        do_div(temp, mfd + 1);
+        if (mfn < 0)
+                temp = -temp;
+        temp = (ref_clk * mfi) + temp;
+
+        return temp;
+}
+
+static int _clk_pll_set_rate(struct clk *clk, unsigned long rate)
+{
+        u32 reg;
+        void __iomem *pllbase;
+
+        long mfi, pdf, mfn, mfd = 999999;
+        s64 temp64;
+        unsigned long quad_parent_rate;
+        unsigned long pll_hfsm, dp_ctl;
+        unsigned long parent_rate;
+
+        parent_rate = clk_get_rate(clk->parent);
+
+        pllbase = _get_pll_base(clk);
+
+        quad_parent_rate = 4 * parent_rate;
+        pdf = mfi = -1;
+        while (++pdf < 16 && mfi < 5)
+                mfi = rate * (pdf+1) / quad_parent_rate;
+        if (mfi > 15)
+                return -EINVAL;
+        pdf--;
+
+        temp64 = rate * (pdf+1) - quad_parent_rate * mfi;
+        do_div(temp64, quad_parent_rate/1000000);
+        mfn = (long)temp64;
+
+        dp_ctl = __raw_readl(pllbase + MXC_PLL_DP_CTL);
+        /* use dpdck0_2 */
+        __raw_writel(dp_ctl | 0x1000L, pllbase + MXC_PLL_DP_CTL);
+        pll_hfsm = dp_ctl & MXC_PLL_DP_CTL_HFSM;
+        if (pll_hfsm == 0) {
+                reg = mfi << 4 | pdf;
+                __raw_writel(reg, pllbase + MXC_PLL_DP_OP);
+                __raw_writel(mfd, pllbase + MXC_PLL_DP_MFD);
+                __raw_writel(mfn, pllbase + MXC_PLL_DP_MFN);
+        } else {
+                reg = mfi << 4 | pdf;
+                __raw_writel(reg, pllbase + MXC_PLL_DP_HFS_OP);
+                __raw_writel(mfd, pllbase + MXC_PLL_DP_HFS_MFD);
+                __raw_writel(mfn, pllbase + MXC_PLL_DP_HFS_MFN);
+        }
+
+        return 0;
+}
+
+static int _clk_pll_enable(struct clk *clk)
+{
+        u32 reg;
+        void __iomem *pllbase;
+        int i = 0;
+
+        pllbase = _get_pll_base(clk);
+        reg = __raw_readl(pllbase + MXC_PLL_DP_CTL) | MXC_PLL_DP_CTL_UPEN;
+        __raw_writel(reg, pllbase + MXC_PLL_DP_CTL);
+
+        /* Wait for lock */
+        do {
+                reg = __raw_readl(pllbase + MXC_PLL_DP_CTL);
+                if (reg & MXC_PLL_DP_CTL_LRF)
+                        break;
+
+                udelay(1);
+        } while (++i < MAX_DPLL_WAIT_TRIES);
+
+        if (i == MAX_DPLL_WAIT_TRIES) {
+                pr_err("MX5: pll locking failed\n");
+                return -EINVAL;
+        }
+
+        return 0;
+}
+
+static void _clk_pll_disable(struct clk *clk)
+{
+        u32 reg;
+        void __iomem *pllbase;
+
+        pllbase = _get_pll_base(clk);
+        reg = __raw_readl(pllbase + MXC_PLL_DP_CTL) & ~MXC_PLL_DP_CTL_UPEN;
+        __raw_writel(reg, pllbase + MXC_PLL_DP_CTL);
+}
+
+static int _clk_pll1_sw_set_parent(struct clk *clk, struct clk *parent)
+{
+        u32 reg, step;
+
+        reg = __raw_readl(MXC_CCM_CCSR);
+
+        /* When switching from pll_main_clk to a bypass clock, first select a
+         * multiplexed clock in 'step_sel', then shift the glitchless mux
+         * 'pll1_sw_clk_sel'.
+         *
+         * When switching back, do it in reverse order
+         */
+        if (parent == &pll1_main_clk) {
+                /* Switch to pll1_main_clk */
+                reg &= ~MXC_CCM_CCSR_PLL1_SW_CLK_SEL;
+                __raw_writel(reg, MXC_CCM_CCSR);
+                /* step_clk mux switched to lp_apm, to save power. */
+                reg = __raw_readl(MXC_CCM_CCSR);
+                reg &= ~MXC_CCM_CCSR_STEP_SEL_MASK;
+                reg |= (MXC_CCM_CCSR_STEP_SEL_LP_APM <<
+                                MXC_CCM_CCSR_STEP_SEL_OFFSET);
+        } else {
+                if (parent == &lp_apm_clk) {
+                        step = MXC_CCM_CCSR_STEP_SEL_LP_APM;
+                } else  if (parent == &pll2_sw_clk) {
+                        step = MXC_CCM_CCSR_STEP_SEL_PLL2_DIVIDED;
+                } else  if (parent == &pll3_sw_clk) {
+                        step = MXC_CCM_CCSR_STEP_SEL_PLL3_DIVIDED;
+                } else
+                        return -EINVAL;
+
+                reg &= ~MXC_CCM_CCSR_STEP_SEL_MASK;
+                reg |= (step << MXC_CCM_CCSR_STEP_SEL_OFFSET);
+
+                __raw_writel(reg, MXC_CCM_CCSR);
+                /* Switch to step_clk */
+                reg = __raw_readl(MXC_CCM_CCSR);
+                reg |= MXC_CCM_CCSR_PLL1_SW_CLK_SEL;
+        }
+        __raw_writel(reg, MXC_CCM_CCSR);
+        return 0;
+}
+
+static unsigned long clk_pll1_sw_get_rate(struct clk *clk)
+{
+        u32 reg, div;
+        unsigned long parent_rate;
+
+        parent_rate = clk_get_rate(clk->parent);
+
+        reg = __raw_readl(MXC_CCM_CCSR);
+
+        if (clk->parent == &pll2_sw_clk) {
+                div = ((reg & MXC_CCM_CCSR_PLL2_PODF_MASK) >>
+                       MXC_CCM_CCSR_PLL2_PODF_OFFSET) + 1;
+        } else if (clk->parent == &pll3_sw_clk) {
+                div = ((reg & MXC_CCM_CCSR_PLL3_PODF_MASK) >>
+                       MXC_CCM_CCSR_PLL3_PODF_OFFSET) + 1;
+        } else
+                div = 1;
+        return parent_rate / div;
+}
+
+static int _clk_pll2_sw_set_parent(struct clk *clk, struct clk *parent)
+{
+        u32 reg;
+
+        reg = __raw_readl(MXC_CCM_CCSR);
+
+        if (parent == &pll2_sw_clk)
+                reg &= ~MXC_CCM_CCSR_PLL2_SW_CLK_SEL;
+        else
+                reg |= MXC_CCM_CCSR_PLL2_SW_CLK_SEL;
+
+        __raw_writel(reg, MXC_CCM_CCSR);
+        return 0;
+}
+
+static int _clk_lp_apm_set_parent(struct clk *clk, struct clk *parent)
+{
+        u32 reg;
+
+        if (parent == &osc_clk)
+                reg = __raw_readl(MXC_CCM_CCSR) & ~MXC_CCM_CCSR_LP_APM_SEL;
+        else
+                return -EINVAL;
+
+        __raw_writel(reg, MXC_CCM_CCSR);
+
+        return 0;
+}
+
+static unsigned long clk_arm_get_rate(struct clk *clk)
+{
+        u32 cacrr, div;
+        unsigned long parent_rate;
+
+        parent_rate = clk_get_rate(clk->parent);
+        cacrr = __raw_readl(MXC_CCM_CACRR);
+        div = (cacrr & MXC_CCM_CACRR_ARM_PODF_MASK) + 1;
+
+        return parent_rate / div;
+}
+
+static int _clk_periph_apm_set_parent(struct clk *clk, struct clk *parent)
+{
+        u32 reg, mux;
+        int i = 0;
+
+        mux = _get_mux(parent, &pll1_sw_clk, &pll3_sw_clk, &lp_apm_clk, NULL);
+
+        reg = __raw_readl(MXC_CCM_CBCMR) & ~MXC_CCM_CBCMR_PERIPH_CLK_SEL_MASK;
+        reg |= mux << MXC_CCM_CBCMR_PERIPH_CLK_SEL_OFFSET;
+        __raw_writel(reg, MXC_CCM_CBCMR);
+
+        /* Wait for lock */
+        do {
+                reg = __raw_readl(MXC_CCM_CDHIPR);
+                if (!(reg &  MXC_CCM_CDHIPR_PERIPH_CLK_SEL_BUSY))
+                        break;
+
+                udelay(1);
+        } while (++i < MAX_DPLL_WAIT_TRIES);
+
+        if (i == MAX_DPLL_WAIT_TRIES) {
+                pr_err("MX5: Set parent for periph_apm clock failed\n");
+                return -EINVAL;
+        }
+
+        return 0;
+}
+
+static int _clk_main_bus_set_parent(struct clk *clk, struct clk *parent)
+{
+        u32 reg;
+
+        reg = __raw_readl(MXC_CCM_CBCDR);
+
+        if (parent == &pll2_sw_clk)
+                reg &= ~MXC_CCM_CBCDR_PERIPH_CLK_SEL;
+        else if (parent == &periph_apm_clk)
+                reg |= MXC_CCM_CBCDR_PERIPH_CLK_SEL;
+        else
+                return -EINVAL;
+
+        __raw_writel(reg, MXC_CCM_CBCDR);
+
+        return 0;
+}
+
+static struct clk main_bus_clk = {
+        .parent = &pll2_sw_clk,
+        .set_parent = _clk_main_bus_set_parent,
+};
+
+static unsigned long clk_ahb_get_rate(struct clk *clk)
+{
+        u32 reg, div;
+        unsigned long parent_rate;
+
+        parent_rate = clk_get_rate(clk->parent);
+
+        reg = __raw_readl(MXC_CCM_CBCDR);
+        div = ((reg & MXC_CCM_CBCDR_AHB_PODF_MASK) >>
+               MXC_CCM_CBCDR_AHB_PODF_OFFSET) + 1;
+        return parent_rate / div;
+}
+
+
+static int _clk_ahb_set_rate(struct clk *clk, unsigned long rate)
+{
+        u32 reg, div;
+        unsigned long parent_rate;
+        int i = 0;
+
+        parent_rate = clk_get_rate(clk->parent);
+
+        div = parent_rate / rate;
+        if (div > 8 || div < 1 || ((parent_rate / div) != rate))
+                return -EINVAL;
+
+        reg = __raw_readl(MXC_CCM_CBCDR);
+        reg &= ~MXC_CCM_CBCDR_AHB_PODF_MASK;
+        reg |= (div - 1) << MXC_CCM_CBCDR_AHB_PODF_OFFSET;
+        __raw_writel(reg, MXC_CCM_CBCDR);
+
+        /* Wait for lock */
+        do {
+                reg = __raw_readl(MXC_CCM_CDHIPR);
+                if (!(reg & MXC_CCM_CDHIPR_AHB_PODF_BUSY))
+                        break;
+
+                udelay(1);
+        } while (++i < MAX_DPLL_WAIT_TRIES);
+
+        if (i == MAX_DPLL_WAIT_TRIES) {
+                pr_err("MX5: clk_ahb_set_rate failed\n");
+                return -EINVAL;
+        }
+
+        return 0;
+}
+
+static unsigned long _clk_ahb_round_rate(struct clk *clk,
+                                                unsigned long rate)
+{
+        u32 div;
+        unsigned long parent_rate;
+
+        parent_rate = clk_get_rate(clk->parent);
+
+        div = parent_rate / rate;
+        if (div > 8)
+                div = 8;
+        else if (div == 0)
+                div++;
+        return parent_rate / div;
+}
+
+
+static int _clk_max_enable(struct clk *clk)
+{
+        u32 reg;
+
+        _clk_ccgr_enable(clk);
+
+        /* Handshake with MAX when LPM is entered. */
+        reg = __raw_readl(MXC_CCM_CLPCR);
+        reg &= ~MXC_CCM_CLPCR_BYPASS_MAX_LPM_HS;
+        __raw_writel(reg, MXC_CCM_CLPCR);
+
+        return 0;
+}
+
+static void _clk_max_disable(struct clk *clk)
+{
+        u32 reg;
+
+        _clk_ccgr_disable_inwait(clk);
+
+        /* No Handshake with MAX when LPM is entered as its disabled. */
+        reg = __raw_readl(MXC_CCM_CLPCR);
+        reg |= MXC_CCM_CLPCR_BYPASS_MAX_LPM_HS;
+        __raw_writel(reg, MXC_CCM_CLPCR);
+}
+
+static unsigned long clk_ipg_get_rate(struct clk *clk)
+{
+        u32 reg, div;
+        unsigned long parent_rate;
+
+        parent_rate = clk_get_rate(clk->parent);
+
+        reg = __raw_readl(MXC_CCM_CBCDR);
+        div = ((reg & MXC_CCM_CBCDR_IPG_PODF_MASK) >>
+               MXC_CCM_CBCDR_IPG_PODF_OFFSET) + 1;
+
+        return parent_rate / div;
+}
+
+static unsigned long clk_ipg_per_get_rate(struct clk *clk)
+{
+        u32 reg, prediv1, prediv2, podf;
+        unsigned long parent_rate;
+
+        parent_rate = clk_get_rate(clk->parent);
+
+        if (clk->parent == &main_bus_clk || clk->parent == &lp_apm_clk) {
+                /* the main_bus_clk is the one before the DVFS engine */
+                reg = __raw_readl(MXC_CCM_CBCDR);
+                prediv1 = ((reg & MXC_CCM_CBCDR_PERCLK_PRED1_MASK) >>
+                           MXC_CCM_CBCDR_PERCLK_PRED1_OFFSET) + 1;
+                prediv2 = ((reg & MXC_CCM_CBCDR_PERCLK_PRED2_MASK) >>
+                           MXC_CCM_CBCDR_PERCLK_PRED2_OFFSET) + 1;
+                podf = ((reg & MXC_CCM_CBCDR_PERCLK_PODF_MASK) >>
+                        MXC_CCM_CBCDR_PERCLK_PODF_OFFSET) + 1;
+                return parent_rate / (prediv1 * prediv2 * podf);
+        } else if (clk->parent == &ipg_clk)
+                return parent_rate;
+        else
+                BUG();
+}
+
+static int _clk_ipg_per_set_parent(struct clk *clk, struct clk *parent)
+{
+        u32 reg;
+
+        reg = __raw_readl(MXC_CCM_CBCMR);
+
+        reg &= ~MXC_CCM_CBCMR_PERCLK_LP_APM_CLK_SEL;
+        reg &= ~MXC_CCM_CBCMR_PERCLK_IPG_CLK_SEL;
+
+        if (parent == &ipg_clk)
+                reg |= MXC_CCM_CBCMR_PERCLK_IPG_CLK_SEL;
+        else if (parent == &lp_apm_clk)
+                reg |= MXC_CCM_CBCMR_PERCLK_LP_APM_CLK_SEL;
+        else if (parent != &main_bus_clk)
+                return -EINVAL;
+
+        __raw_writel(reg, MXC_CCM_CBCMR);
+
+        return 0;
+}
+
+static unsigned long clk_uart_get_rate(struct clk *clk)
+{
+        u32 reg, prediv, podf;
+        unsigned long parent_rate;
+
+        parent_rate = clk_get_rate(clk->parent);
+
+        reg = __raw_readl(MXC_CCM_CSCDR1);
+        prediv = ((reg & MXC_CCM_CSCDR1_UART_CLK_PRED_MASK) >>
+                  MXC_CCM_CSCDR1_UART_CLK_PRED_OFFSET) + 1;
+        podf = ((reg & MXC_CCM_CSCDR1_UART_CLK_PODF_MASK) >>
+                MXC_CCM_CSCDR1_UART_CLK_PODF_OFFSET) + 1;
+
+        return parent_rate / (prediv * podf);
+}
+
+static int _clk_uart_set_parent(struct clk *clk, struct clk *parent)
+{
+        u32 reg, mux;
+
+        mux = _get_mux(parent, &pll1_sw_clk, &pll2_sw_clk, &pll3_sw_clk,
+                       &lp_apm_clk);
+        reg = __raw_readl(MXC_CCM_CSCMR1) & ~MXC_CCM_CSCMR1_UART_CLK_SEL_MASK;
+        reg |= mux << MXC_CCM_CSCMR1_UART_CLK_SEL_OFFSET;
+        __raw_writel(reg, MXC_CCM_CSCMR1);
+
+        return 0;
+}
+
+static unsigned long get_high_reference_clock_rate(struct clk *clk)
+{
+        return external_high_reference;
+}
+
+static unsigned long get_low_reference_clock_rate(struct clk *clk)
+{
+        return external_low_reference;
+}
+
+static unsigned long get_oscillator_reference_clock_rate(struct clk *clk)
+{
+        return oscillator_reference;
+}
+
+static unsigned long get_ckih2_reference_clock_rate(struct clk *clk)
+{
+        return ckih2_reference;
+}
+
+/* External high frequency clock */
+static struct clk ckih_clk = {
+        .get_rate = get_high_reference_clock_rate,
+};
+
+static struct clk ckih2_clk = {
+        .get_rate = get_ckih2_reference_clock_rate,
+};
+
+static struct clk osc_clk = {
+        .get_rate = get_oscillator_reference_clock_rate,
+};
+
+/* External low frequency (32kHz) clock */
+static struct clk ckil_clk = {
+        .get_rate = get_low_reference_clock_rate,
+};
+
+static struct clk pll1_main_clk = {
+        .parent = &osc_clk,
+        .get_rate = clk_pll_get_rate,
+        .enable = _clk_pll_enable,
+        .disable = _clk_pll_disable,
+};
+
+/* Clock tree block diagram (WIP):
+ *      CCM: Clock Controller Module
+ *
+ * PLL output -> |
+ *               | CCM Switcher -> CCM_CLK_ROOT_GEN ->
+ * PLL bypass -> |
+ *
+ */
+
+/* PLL1 SW supplies to ARM core */
+static struct clk pll1_sw_clk = {
+        .parent = &pll1_main_clk,
+        .set_parent = _clk_pll1_sw_set_parent,
+        .get_rate = clk_pll1_sw_get_rate,
+};
+
+/* PLL2 SW supplies to AXI/AHB/IP buses */
+static struct clk pll2_sw_clk = {
+        .parent = &osc_clk,
+        .get_rate = clk_pll_get_rate,
+        .set_rate = _clk_pll_set_rate,
+        .set_parent = _clk_pll2_sw_set_parent,
+        .enable = _clk_pll_enable,
+        .disable = _clk_pll_disable,
+};
+
+/* PLL3 SW supplies to serial clocks like USB, SSI, etc. */
+static struct clk pll3_sw_clk = {
+        .parent = &osc_clk,
+        .set_rate = _clk_pll_set_rate,
+        .get_rate = clk_pll_get_rate,
+        .enable = _clk_pll_enable,
+        .disable = _clk_pll_disable,
+};
+
+/* Low-power Audio Playback Mode clock */
+static struct clk lp_apm_clk = {
+        .parent = &osc_clk,
+        .set_parent = _clk_lp_apm_set_parent,
+};
+
+static struct clk periph_apm_clk = {
+        .parent = &pll1_sw_clk,
+        .set_parent = _clk_periph_apm_set_parent,
+};
+
+static struct clk cpu_clk = {
+        .parent = &pll1_sw_clk,
+        .get_rate = clk_arm_get_rate,
+};
+
+static struct clk ahb_clk = {
+        .parent = &main_bus_clk,
+        .get_rate = clk_ahb_get_rate,
+        .set_rate = _clk_ahb_set_rate,
+        .round_rate = _clk_ahb_round_rate,
+};
+
+/* Main IP interface clock for access to registers */
+static struct clk ipg_clk = {
+        .parent = &ahb_clk,
+        .get_rate = clk_ipg_get_rate,
+};
+
+static struct clk ipg_perclk = {
+        .parent = &lp_apm_clk,
+        .get_rate = clk_ipg_per_get_rate,
+        .set_parent = _clk_ipg_per_set_parent,
+};
+
+static struct clk uart_root_clk = {
+        .parent = &pll2_sw_clk,
+        .get_rate = clk_uart_get_rate,
+        .set_parent = _clk_uart_set_parent,
+};
+
+static struct clk ahb_max_clk = {
+        .parent = &ahb_clk,
+        .enable_reg = MXC_CCM_CCGR0,
+        .enable_shift = MXC_CCM_CCGRx_CG14_OFFSET,
+        .enable = _clk_max_enable,
+        .disable = _clk_max_disable,
+};
+
+static struct clk aips_tz1_clk = {
+        .parent = &ahb_clk,
+        .secondary = &ahb_max_clk,
+        .enable_reg = MXC_CCM_CCGR0,
+        .enable_shift = MXC_CCM_CCGRx_CG12_OFFSET,
+        .enable = _clk_ccgr_enable,
+        .disable = _clk_ccgr_disable_inwait,
+};
+
+static struct clk aips_tz2_clk = {
+        .parent = &ahb_clk,
+        .secondary = &ahb_max_clk,
+        .enable_reg = MXC_CCM_CCGR0,
+        .enable_shift = MXC_CCM_CCGRx_CG13_OFFSET,
+        .enable = _clk_ccgr_enable,
+        .disable = _clk_ccgr_disable_inwait,
+};
+
+static struct clk gpt_32k_clk = {
+        .id = 0,
+        .parent = &ckil_clk,
+};
+
+#define DEFINE_CLOCK(name, i, er, es, gr, sr, p, s)     \
+        static struct clk name = {                      \
+                .id             = i,                    \
+                .enable_reg     = er,                   \
+                .enable_shift   = es,                   \
+                .get_rate       = gr,                   \
+                .set_rate       = sr,                   \
+                .enable         = _clk_ccgr_enable,     \
+                .disable        = _clk_ccgr_disable,    \
+                .parent         = p,                    \
+                .secondary      = s,                    \
+        }
+
+/* DEFINE_CLOCK(name, id, enable_reg, enable_shift,
+   get_rate, set_rate, parent, secondary); */
+
+/* Shared peripheral bus arbiter */
+DEFINE_CLOCK(spba_clk, 0, MXC_CCM_CCGR5, MXC_CCM_CCGRx_CG0_OFFSET,
+        NULL,  NULL, &ipg_clk, NULL);
+
+/* UART */
+DEFINE_CLOCK(uart1_clk, 0, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG4_OFFSET,
+        NULL,  NULL, &uart_root_clk, NULL);
+DEFINE_CLOCK(uart2_clk, 1, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG6_OFFSET,
+        NULL,  NULL, &uart_root_clk, NULL);
+DEFINE_CLOCK(uart3_clk, 2, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG8_OFFSET,
+        NULL,  NULL, &uart_root_clk, NULL);
+DEFINE_CLOCK(uart1_ipg_clk, 0, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG3_OFFSET,
+        NULL,  NULL, &ipg_clk, &aips_tz1_clk);
+DEFINE_CLOCK(uart2_ipg_clk, 1, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG5_OFFSET,
+        NULL,  NULL, &ipg_clk, &aips_tz1_clk);
+DEFINE_CLOCK(uart3_ipg_clk, 2, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG7_OFFSET,
+        NULL,  NULL, &ipg_clk, &spba_clk);
+
+/* GPT */
+DEFINE_CLOCK(gpt_clk, 0, MXC_CCM_CCGR2, MXC_CCM_CCGRx_CG9_OFFSET,
+        NULL,  NULL, &ipg_perclk, NULL);
+DEFINE_CLOCK(gpt_ipg_clk, 0, MXC_CCM_CCGR2, MXC_CCM_CCGRx_CG10_OFFSET,
+        NULL,  NULL, &ipg_clk, NULL);
+
+/* FEC */
+DEFINE_CLOCK(fec_clk, 0, MXC_CCM_CCGR2, MXC_CCM_CCGRx_CG12_OFFSET,
+        NULL,  NULL, &ipg_clk, NULL);
+
+#define _REGISTER_CLOCK(d, n, c) \
+       { \
+                .dev_id = d, \
+                .con_id = n, \
+                .clk = &c,   \
+       },
+
+static struct clk_lookup lookups[] = {
+        _REGISTER_CLOCK("imx-uart.0", NULL, uart1_clk)
+        _REGISTER_CLOCK("imx-uart.1", NULL, uart2_clk)
+        _REGISTER_CLOCK("imx-uart.2", NULL, uart3_clk)
+        _REGISTER_CLOCK(NULL, "gpt", gpt_clk)
+        _REGISTER_CLOCK("fec.0", NULL, fec_clk)
+};
+
+static void clk_tree_init(void)
+{
+        u32 reg;
+
+        ipg_perclk.set_parent(&ipg_perclk, &lp_apm_clk);
+
+        /*
+         * Initialise the IPG PER CLK dividers to 3. IPG_PER_CLK should be at
+         * 8MHz, its derived from lp_apm.
+         *
+         * FIXME: Verify if true for all boards
+         */
+        reg = __raw_readl(MXC_CCM_CBCDR);
+        reg &= ~MXC_CCM_CBCDR_PERCLK_PRED1_MASK;
+        reg &= ~MXC_CCM_CBCDR_PERCLK_PRED2_MASK;
+        reg &= ~MXC_CCM_CBCDR_PERCLK_PODF_MASK;
+        reg |= (2 << MXC_CCM_CBCDR_PERCLK_PRED1_OFFSET);
+        __raw_writel(reg, MXC_CCM_CBCDR);
+}
+
+int __init mx51_clocks_init(unsigned long ckil, unsigned long osc,
+                        unsigned long ckih1, unsigned long ckih2)
+{
+        int i;
+
+        external_low_reference = ckil;
+        external_high_reference = ckih1;
+        ckih2_reference = ckih2;
+        oscillator_reference = osc;
+
+        for (i = 0; i < ARRAY_SIZE(lookups); i++)
+                clkdev_add(&lookups[i]);
+
+        clk_tree_init();
+
+        clk_enable(&cpu_clk);
+        clk_enable(&main_bus_clk);
+
+        /* System timer */
+        mxc_timer_init(&gpt_clk, MX51_IO_ADDRESS(MX51_GPT1_BASE_ADDR),
+                MX51_MXC_INT_GPT);
+        return 0;
+}
diff --git a/arch/arm/mach-mx5/cpu.c b/arch/arm/mach-mx5/cpu.c
new file mode 100644
index 000000000000..41c769f08c4d
--- /dev/null
+++ b/arch/arm/mach-mx5/cpu.c
@@ -0,0 +1,47 @@
+/*
+ * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved.
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ *
+ * This file contains the CPU initialization code.
+ */
+
+#include <linux/types.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <mach/hardware.h>
+#include <asm/io.h>
+
+static int __init post_cpu_init(void)
+{
+        unsigned int reg;
+        void __iomem *base;
+
+        if (!cpu_is_mx51())
+                return 0;
+
+        base = MX51_IO_ADDRESS(MX51_AIPS1_BASE_ADDR);
+        __raw_writel(0x0, base + 0x40);
+        __raw_writel(0x0, base + 0x44);
+        __raw_writel(0x0, base + 0x48);
+        __raw_writel(0x0, base + 0x4C);
+        reg = __raw_readl(base + 0x50) & 0x00FFFFFF;
+        __raw_writel(reg, base + 0x50);
+
+        base = MX51_IO_ADDRESS(MX51_AIPS2_BASE_ADDR);
+        __raw_writel(0x0, base + 0x40);
+        __raw_writel(0x0, base + 0x44);
+        __raw_writel(0x0, base + 0x48);
+        __raw_writel(0x0, base + 0x4C);
+        reg = __raw_readl(base + 0x50) & 0x00FFFFFF;
+        __raw_writel(reg, base + 0x50);
+
+        return 0;
+}
+
+postcore_initcall(post_cpu_init);
diff --git a/arch/arm/mach-mx5/crm_regs.h b/arch/arm/mach-mx5/crm_regs.h
new file mode 100644
index 000000000000..c776b9af0624
--- /dev/null
+++ b/arch/arm/mach-mx5/crm_regs.h
@@ -0,0 +1,583 @@
+/*
+ * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved.
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+#ifndef __ARCH_ARM_MACH_MX51_CRM_REGS_H__
+#define __ARCH_ARM_MACH_MX51_CRM_REGS_H__
+
+#define MX51_CCM_BASE           MX51_IO_ADDRESS(MX51_CCM_BASE_ADDR)
+#define MX51_DPLL1_BASE         MX51_IO_ADDRESS(MX51_PLL1_BASE_ADDR)
+#define MX51_DPLL2_BASE         MX51_IO_ADDRESS(MX51_PLL2_BASE_ADDR)
+#define MX51_DPLL3_BASE         MX51_IO_ADDRESS(MX51_PLL3_BASE_ADDR)
+#define MX51_CORTEXA8_BASE      MX51_IO_ADDRESS(MX51_ARM_BASE_ADDR)
+#define MX51_GPC_BASE           MX51_IO_ADDRESS(MX51_GPC_BASE_ADDR)
+
+/* PLL Register Offsets */
+#define MXC_PLL_DP_CTL                  0x00
+#define MXC_PLL_DP_CONFIG               0x04
+#define MXC_PLL_DP_OP                   0x08
+#define MXC_PLL_DP_MFD                  0x0C
+#define MXC_PLL_DP_MFN                  0x10
+#define MXC_PLL_DP_MFNMINUS             0x14
+#define MXC_PLL_DP_MFNPLUS              0x18
+#define MXC_PLL_DP_HFS_OP               0x1C
+#define MXC_PLL_DP_HFS_MFD              0x20
+#define MXC_PLL_DP_HFS_MFN              0x24
+#define MXC_PLL_DP_MFN_TOGC             0x28
+#define MXC_PLL_DP_DESTAT               0x2c
+
+/* PLL Register Bit definitions */
+#define MXC_PLL_DP_CTL_MUL_CTRL         0x2000
+#define MXC_PLL_DP_CTL_DPDCK0_2_EN      0x1000
+#define MXC_PLL_DP_CTL_DPDCK0_2_OFFSET  12
+#define MXC_PLL_DP_CTL_ADE              0x800
+#define MXC_PLL_DP_CTL_REF_CLK_DIV      0x400
+#define MXC_PLL_DP_CTL_REF_CLK_SEL_MASK (3 << 8)
+#define MXC_PLL_DP_CTL_REF_CLK_SEL_OFFSET       8
+#define MXC_PLL_DP_CTL_HFSM             0x80
+#define MXC_PLL_DP_CTL_PRE              0x40
+#define MXC_PLL_DP_CTL_UPEN             0x20
+#define MXC_PLL_DP_CTL_RST              0x10
+#define MXC_PLL_DP_CTL_RCP              0x8
+#define MXC_PLL_DP_CTL_PLM              0x4
+#define MXC_PLL_DP_CTL_BRM0             0x2
+#define MXC_PLL_DP_CTL_LRF              0x1
+
+#define MXC_PLL_DP_CONFIG_BIST          0x8
+#define MXC_PLL_DP_CONFIG_SJC_CE        0x4
+#define MXC_PLL_DP_CONFIG_AREN          0x2
+#define MXC_PLL_DP_CONFIG_LDREQ         0x1
+
+#define MXC_PLL_DP_OP_MFI_OFFSET        4
+#define MXC_PLL_DP_OP_MFI_MASK          (0xF << 4)
+#define MXC_PLL_DP_OP_PDF_OFFSET        0
+#define MXC_PLL_DP_OP_PDF_MASK          0xF
+
+#define MXC_PLL_DP_MFD_OFFSET           0
+#define MXC_PLL_DP_MFD_MASK             0x07FFFFFF
+
+#define MXC_PLL_DP_MFN_OFFSET           0x0
+#define MXC_PLL_DP_MFN_MASK             0x07FFFFFF
+
+#define MXC_PLL_DP_MFN_TOGC_TOG_DIS     (1 << 17)
+#define MXC_PLL_DP_MFN_TOGC_TOG_EN      (1 << 16)
+#define MXC_PLL_DP_MFN_TOGC_CNT_OFFSET  0x0
+#define MXC_PLL_DP_MFN_TOGC_CNT_MASK    0xFFFF
+
+#define MXC_PLL_DP_DESTAT_TOG_SEL       (1 << 31)
+#define MXC_PLL_DP_DESTAT_MFN           0x07FFFFFF
+
+/* Register addresses of CCM*/
+#define MXC_CCM_CCR             (MX51_CCM_BASE + 0x00)
+#define MXC_CCM_CCDR            (MX51_CCM_BASE + 0x04)
+#define MXC_CCM_CSR             (MX51_CCM_BASE + 0x08)
+#define MXC_CCM_CCSR            (MX51_CCM_BASE + 0x0C)
+#define MXC_CCM_CACRR           (MX51_CCM_BASE + 0x10)
+#define MXC_CCM_CBCDR           (MX51_CCM_BASE + 0x14)
+#define MXC_CCM_CBCMR           (MX51_CCM_BASE + 0x18)
+#define MXC_CCM_CSCMR1          (MX51_CCM_BASE + 0x1C)
+#define MXC_CCM_CSCMR2          (MX51_CCM_BASE + 0x20)
+#define MXC_CCM_CSCDR1          (MX51_CCM_BASE + 0x24)
+#define MXC_CCM_CS1CDR          (MX51_CCM_BASE + 0x28)
+#define MXC_CCM_CS2CDR          (MX51_CCM_BASE + 0x2C)
+#define MXC_CCM_CDCDR           (MX51_CCM_BASE + 0x30)
+#define MXC_CCM_CHSCDR          (MX51_CCM_BASE + 0x34)
+#define MXC_CCM_CSCDR2          (MX51_CCM_BASE + 0x38)
+#define MXC_CCM_CSCDR3          (MX51_CCM_BASE + 0x3C)
+#define MXC_CCM_CSCDR4          (MX51_CCM_BASE + 0x40)
+#define MXC_CCM_CWDR            (MX51_CCM_BASE + 0x44)
+#define MXC_CCM_CDHIPR          (MX51_CCM_BASE + 0x48)
+#define MXC_CCM_CDCR            (MX51_CCM_BASE + 0x4C)
+#define MXC_CCM_CTOR            (MX51_CCM_BASE + 0x50)
+#define MXC_CCM_CLPCR           (MX51_CCM_BASE + 0x54)
+#define MXC_CCM_CISR            (MX51_CCM_BASE + 0x58)
+#define MXC_CCM_CIMR            (MX51_CCM_BASE + 0x5C)
+#define MXC_CCM_CCOSR           (MX51_CCM_BASE + 0x60)
+#define MXC_CCM_CGPR            (MX51_CCM_BASE + 0x64)
+#define MXC_CCM_CCGR0           (MX51_CCM_BASE + 0x68)
+#define MXC_CCM_CCGR1           (MX51_CCM_BASE + 0x6C)
+#define MXC_CCM_CCGR2           (MX51_CCM_BASE + 0x70)
+#define MXC_CCM_CCGR3           (MX51_CCM_BASE + 0x74)
+#define MXC_CCM_CCGR4           (MX51_CCM_BASE + 0x78)
+#define MXC_CCM_CCGR5           (MX51_CCM_BASE + 0x7C)
+#define MXC_CCM_CCGR6           (MX51_CCM_BASE + 0x80)
+#define MXC_CCM_CMEOR           (MX51_CCM_BASE + 0x84)
+
+/* Define the bits in register CCR */
+#define MXC_CCM_CCR_COSC_EN             (1 << 12)
+#define MXC_CCM_CCR_FPM_MULT_MASK       (1 << 11)
+#define MXC_CCM_CCR_CAMP2_EN            (1 << 10)
+#define MXC_CCM_CCR_CAMP1_EN            (1 << 9)
+#define MXC_CCM_CCR_FPM_EN              (1 << 8)
+#define MXC_CCM_CCR_OSCNT_OFFSET        (0)
+#define MXC_CCM_CCR_OSCNT_MASK  (0xFF)
+
+/* Define the bits in register CCDR */
+#define MXC_CCM_CCDR_HSC_HS_MASK        (0x1 << 18)
+#define MXC_CCM_CCDR_IPU_HS_MASK        (0x1 << 17)
+#define MXC_CCM_CCDR_EMI_HS_MASK        (0x1 << 16)
+
+/* Define the bits in register CSR */
+#define MXC_CCM_CSR_COSR_READY  (1 << 5)
+#define MXC_CCM_CSR_LVS_VALUE   (1 << 4)
+#define MXC_CCM_CSR_CAMP2_READY (1 << 3)
+#define MXC_CCM_CSR_CAMP1_READY (1 << 2)
+#define MXC_CCM_CSR_FPM_READY   (1 << 1)
+#define MXC_CCM_CSR_REF_EN_B    (1 << 0)
+
+/* Define the bits in register CCSR */
+#define MXC_CCM_CCSR_LP_APM_SEL         (0x1 << 9)
+#define MXC_CCM_CCSR_STEP_SEL_OFFSET    (7)
+#define MXC_CCM_CCSR_STEP_SEL_MASK      (0x3 << 7)
+#define MXC_CCM_CCSR_STEP_SEL_LP_APM       0
+#define MXC_CCM_CCSR_STEP_SEL_PLL1_BYPASS  1 /* Only when JTAG connected? */
+#define MXC_CCM_CCSR_STEP_SEL_PLL2_DIVIDED 2
+#define MXC_CCM_CCSR_STEP_SEL_PLL3_DIVIDED 3
+#define MXC_CCM_CCSR_PLL2_PODF_OFFSET   (5)
+#define MXC_CCM_CCSR_PLL2_PODF_MASK     (0x3 << 5)
+#define MXC_CCM_CCSR_PLL3_PODF_OFFSET   (3)
+#define MXC_CCM_CCSR_PLL3_PODF_MASK     (0x3 << 3)
+#define MXC_CCM_CCSR_PLL1_SW_CLK_SEL    (1 << 2) /* 0: pll1_main_clk,
+                                                    1: step_clk */
+#define MXC_CCM_CCSR_PLL2_SW_CLK_SEL    (1 << 1)
+#define MXC_CCM_CCSR_PLL3_SW_CLK_SEL    (1 << 0)
+
+/* Define the bits in register CACRR */
+#define MXC_CCM_CACRR_ARM_PODF_OFFSET   (0)
+#define MXC_CCM_CACRR_ARM_PODF_MASK     (0x7)
+
+/* Define the bits in register CBCDR */
+#define MXC_CCM_CBCDR_EMI_CLK_SEL               (0x1 << 26)
+#define MXC_CCM_CBCDR_PERIPH_CLK_SEL            (0x1 << 25)
+#define MXC_CCM_CBCDR_DDR_HF_SEL_OFFSET         (30)
+#define MXC_CCM_CBCDR_DDR_HF_SEL                (0x1 << 30)
+#define MXC_CCM_CBCDR_DDR_PODF_OFFSET           (27)
+#define MXC_CCM_CBCDR_DDR_PODF_MASK             (0x7 << 27)
+#define MXC_CCM_CBCDR_EMI_PODF_OFFSET           (22)
+#define MXC_CCM_CBCDR_EMI_PODF_MASK             (0x7 << 22)
+#define MXC_CCM_CBCDR_AXI_B_PODF_OFFSET         (19)
+#define MXC_CCM_CBCDR_AXI_B_PODF_MASK           (0x7 << 19)
+#define MXC_CCM_CBCDR_AXI_A_PODF_OFFSET         (16)
+#define MXC_CCM_CBCDR_AXI_A_PODF_MASK           (0x7 << 16)
+#define MXC_CCM_CBCDR_NFC_PODF_OFFSET           (13)
+#define MXC_CCM_CBCDR_NFC_PODF_MASK             (0x7 << 13)
+#define MXC_CCM_CBCDR_AHB_PODF_OFFSET           (10)
+#define MXC_CCM_CBCDR_AHB_PODF_MASK             (0x7 << 10)
+#define MXC_CCM_CBCDR_IPG_PODF_OFFSET           (8)
+#define MXC_CCM_CBCDR_IPG_PODF_MASK             (0x3 << 8)
+#define MXC_CCM_CBCDR_PERCLK_PRED1_OFFSET       (6)
+#define MXC_CCM_CBCDR_PERCLK_PRED1_MASK         (0x3 << 6)
+#define MXC_CCM_CBCDR_PERCLK_PRED2_OFFSET       (3)
+#define MXC_CCM_CBCDR_PERCLK_PRED2_MASK         (0x7 << 3)
+#define MXC_CCM_CBCDR_PERCLK_PODF_OFFSET        (0)
+#define MXC_CCM_CBCDR_PERCLK_PODF_MASK          (0x7)
+
+/* Define the bits in register CBCMR */
+#define MXC_CCM_CBCMR_VPU_AXI_CLK_SEL_OFFSET    (14)
+#define MXC_CCM_CBCMR_VPU_AXI_CLK_SEL_MASK      (0x3 << 14)
+#define MXC_CCM_CBCMR_PERIPH_CLK_SEL_OFFSET     (12)
+#define MXC_CCM_CBCMR_PERIPH_CLK_SEL_MASK       (0x3 << 12)
+#define MXC_CCM_CBCMR_DDR_CLK_SEL_OFFSET        (10)
+#define MXC_CCM_CBCMR_DDR_CLK_SEL_MASK          (0x3 << 10)
+#define MXC_CCM_CBCMR_ARM_AXI_CLK_SEL_OFFSET    (8)
+#define MXC_CCM_CBCMR_ARM_AXI_CLK_SEL_MASK      (0x3 << 8)
+#define MXC_CCM_CBCMR_IPU_HSP_CLK_SEL_OFFSET    (6)
+#define MXC_CCM_CBCMR_IPU_HSP_CLK_SEL_MASK      (0x3 << 6)
+#define MXC_CCM_CBCMR_GPU_CLK_SEL_OFFSET        (4)
+#define MXC_CCM_CBCMR_GPU_CLK_SEL_MASK          (0x3 << 4)
+#define MXC_CCM_CBCMR_GPU2D_CLK_SEL_OFFSET      (14)
+#define MXC_CCM_CBCMR_GPU2D_CLK_SEL_MASK        (0x3 << 14)
+#define MXC_CCM_CBCMR_PERCLK_LP_APM_CLK_SEL     (0x1 << 1)
+#define MXC_CCM_CBCMR_PERCLK_IPG_CLK_SEL        (0x1 << 0)
+
+/* Define the bits in register CSCMR1 */
+#define MXC_CCM_CSCMR1_SSI_EXT2_CLK_SEL_OFFSET          (30)
+#define MXC_CCM_CSCMR1_SSI_EXT2_CLK_SEL_MASK            (0x3 << 30)
+#define MXC_CCM_CSCMR1_SSI_EXT1_CLK_SEL_OFFSET          (28)
+#define MXC_CCM_CSCMR1_SSI_EXT1_CLK_SEL_MASK            (0x3 << 28)
+#define MXC_CCM_CSCMR1_USB_PHY_CLK_SEL_OFFSET           (26)
+#define MXC_CCM_CSCMR1_USB_PHY_CLK_SEL                  (0x1 << 26)
+#define MXC_CCM_CSCMR1_UART_CLK_SEL_OFFSET              (24)
+#define MXC_CCM_CSCMR1_UART_CLK_SEL_MASK                (0x3 << 24)
+#define MXC_CCM_CSCMR1_USBOH3_CLK_SEL_OFFSET            (22)
+#define MXC_CCM_CSCMR1_USBOH3_CLK_SEL_MASK              (0x3 << 22)
+#define MXC_CCM_CSCMR1_ESDHC1_MSHC1_CLK_SEL_OFFSET      (20)
+#define MXC_CCM_CSCMR1_ESDHC1_MSHC1_CLK_SEL_MASK        (0x3 << 20)
+#define MXC_CCM_CSCMR1_ESDHC3_CLK_SEL                   (0x1 << 19)
+#define MXC_CCM_CSCMR1_ESDHC4_CLK_SEL                   (0x1 << 18)
+#define MXC_CCM_CSCMR1_ESDHC2_MSHC2_CLK_SEL_OFFSET      (16)
+#define MXC_CCM_CSCMR1_ESDHC2_MSHC2_CLK_SEL_MASK        (0x3 << 16)
+#define MXC_CCM_CSCMR1_SSI1_CLK_SEL_OFFSET              (14)
+#define MXC_CCM_CSCMR1_SSI1_CLK_SEL_MASK                (0x3 << 14)
+#define MXC_CCM_CSCMR1_SSI2_CLK_SEL_OFFSET              (12)
+#define MXC_CCM_CSCMR1_SSI2_CLK_SEL_MASK                (0x3 << 12)
+#define MXC_CCM_CSCMR1_SSI3_CLK_SEL                     (0x1 << 11)
+#define MXC_CCM_CSCMR1_VPU_RCLK_SEL                     (0x1 << 10)
+#define MXC_CCM_CSCMR1_SSI_APM_CLK_SEL_OFFSET           (8)
+#define MXC_CCM_CSCMR1_SSI_APM_CLK_SEL_MASK             (0x3 << 8)
+#define MXC_CCM_CSCMR1_TVE_CLK_SEL                      (0x1 << 7)
+#define MXC_CCM_CSCMR1_TVE_EXT_CLK_SEL                  (0x1 << 6)
+#define MXC_CCM_CSCMR1_CSPI_CLK_SEL_OFFSET              (4)
+#define MXC_CCM_CSCMR1_CSPI_CLK_SEL_MASK                (0x3 << 4)
+#define MXC_CCM_CSCMR1_SPDIF_CLK_SEL_OFFSET             (2)
+#define MXC_CCM_CSCMR1_SPDIF_CLK_SEL_MASK               (0x3 << 2)
+#define MXC_CCM_CSCMR1_SSI_EXT2_COM_CLK_SEL             (0x1 << 1)
+#define MXC_CCM_CSCMR1_SSI_EXT1_COM_CLK_SEL             (0x1)
+
+/* Define the bits in register CSCMR2 */
+#define MXC_CCM_CSCMR2_DI_CLK_SEL_OFFSET(n)             (26+n*3)
+#define MXC_CCM_CSCMR2_DI_CLK_SEL_MASK(n)               (0x7 << (26+n*3))
+#define MXC_CCM_CSCMR2_CSI_MCLK2_CLK_SEL_OFFSET         (24)
+#define MXC_CCM_CSCMR2_CSI_MCLK2_CLK_SEL_MASK           (0x3 << 24)
+#define MXC_CCM_CSCMR2_CSI_MCLK1_CLK_SEL_OFFSET         (22)
+#define MXC_CCM_CSCMR2_CSI_MCLK1_CLK_SEL_MASK           (0x3 << 22)
+#define MXC_CCM_CSCMR2_ESC_CLK_SEL_OFFSET               (20)
+#define MXC_CCM_CSCMR2_ESC_CLK_SEL_MASK                 (0x3 << 20)
+#define MXC_CCM_CSCMR2_HSC2_CLK_SEL_OFFSET              (18)
+#define MXC_CCM_CSCMR2_HSC2_CLK_SEL_MASK                (0x3 << 18)
+#define MXC_CCM_CSCMR2_HSC1_CLK_SEL_OFFSET              (16)
+#define MXC_CCM_CSCMR2_HSC1_CLK_SEL_MASK                (0x3 << 16)
+#define MXC_CCM_CSCMR2_HSI2C_CLK_SEL_OFFSET             (14)
+#define MXC_CCM_CSCMR2_HSI2C_CLK_SEL_MASK               (0x3 << 14)
+#define MXC_CCM_CSCMR2_FIRI_CLK_SEL_OFFSET              (12)
+#define MXC_CCM_CSCMR2_FIRI_CLK_SEL_MASK                (0x3 << 12)
+#define MXC_CCM_CSCMR2_SIM_CLK_SEL_OFFSET               (10)
+#define MXC_CCM_CSCMR2_SIM_CLK_SEL_MASK                 (0x3 << 10)
+#define MXC_CCM_CSCMR2_SLIMBUS_COM                      (0x1 << 9)
+#define MXC_CCM_CSCMR2_SLIMBUS_CLK_SEL_OFFSET           (6)
+#define MXC_CCM_CSCMR2_SLIMBUS_CLK_SEL_MASK             (0x7 << 6)
+#define MXC_CCM_CSCMR2_SPDIF1_COM                       (1 << 5)
+#define MXC_CCM_CSCMR2_SPDIF0_COM                       (1 << 4)
+#define MXC_CCM_CSCMR2_SPDIF1_CLK_SEL_OFFSET            (2)
+#define MXC_CCM_CSCMR2_SPDIF1_CLK_SEL_MASK              (0x3 << 2)
+#define MXC_CCM_CSCMR2_SPDIF0_CLK_SEL_OFFSET            (0)
+#define MXC_CCM_CSCMR2_SPDIF0_CLK_SEL_MASK              (0x3)
+
+/* Define the bits in register CSCDR1 */
+#define MXC_CCM_CSCDR1_ESDHC2_MSHC2_CLK_PRED_OFFSET     (22)
+#define MXC_CCM_CSCDR1_ESDHC2_MSHC2_CLK_PRED_MASK       (0x7 << 22)
+#define MXC_CCM_CSCDR1_ESDHC2_MSHC2_CLK_PODF_OFFSET     (19)
+#define MXC_CCM_CSCDR1_ESDHC2_MSHC2_CLK_PODF_MASK       (0x7 << 19)
+#define MXC_CCM_CSCDR1_ESDHC1_MSHC1_CLK_PRED_OFFSET     (16)
+#define MXC_CCM_CSCDR1_ESDHC1_MSHC1_CLK_PRED_MASK       (0x7 << 16)
+#define MXC_CCM_CSCDR1_PGC_CLK_PODF_OFFSET              (14)
+#define MXC_CCM_CSCDR1_PGC_CLK_PODF_MASK                (0x3 << 14)
+#define MXC_CCM_CSCDR1_ESDHC1_MSHC1_CLK_PODF_OFFSET     (11)
+#define MXC_CCM_CSCDR1_ESDHC1_MSHC1_CLK_PODF_MASK       (0x7 << 11)
+#define MXC_CCM_CSCDR1_USBOH3_CLK_PRED_OFFSET           (8)
+#define MXC_CCM_CSCDR1_USBOH3_CLK_PRED_MASK             (0x7 << 8)
+#define MXC_CCM_CSCDR1_USBOH3_CLK_PODF_OFFSET           (6)
+#define MXC_CCM_CSCDR1_USBOH3_CLK_PODF_MASK             (0x3 << 6)
+#define MXC_CCM_CSCDR1_UART_CLK_PRED_OFFSET             (3)
+#define MXC_CCM_CSCDR1_UART_CLK_PRED_MASK               (0x7 << 3)
+#define MXC_CCM_CSCDR1_UART_CLK_PODF_OFFSET             (0)
+#define MXC_CCM_CSCDR1_UART_CLK_PODF_MASK               (0x7)
+
+/* Define the bits in register CS1CDR and CS2CDR */
+#define MXC_CCM_CS1CDR_SSI_EXT1_CLK_PRED_OFFSET         (22)
+#define MXC_CCM_CS1CDR_SSI_EXT1_CLK_PRED_MASK           (0x7 << 22)
+#define MXC_CCM_CS1CDR_SSI_EXT1_CLK_PODF_OFFSET         (16)
+#define MXC_CCM_CS1CDR_SSI_EXT1_CLK_PODF_MASK           (0x3F << 16)
+#define MXC_CCM_CS1CDR_SSI1_CLK_PRED_OFFSET             (6)
+#define MXC_CCM_CS1CDR_SSI1_CLK_PRED_MASK               (0x7 << 6)
+#define MXC_CCM_CS1CDR_SSI1_CLK_PODF_OFFSET             (0)
+#define MXC_CCM_CS1CDR_SSI1_CLK_PODF_MASK               (0x3F)
+
+#define MXC_CCM_CS2CDR_SSI_EXT2_CLK_PRED_OFFSET         (22)
+#define MXC_CCM_CS2CDR_SSI_EXT2_CLK_PRED_MASK           (0x7 << 22)
+#define MXC_CCM_CS2CDR_SSI_EXT2_CLK_PODF_OFFSET         (16)
+#define MXC_CCM_CS2CDR_SSI_EXT2_CLK_PODF_MASK           (0x3F << 16)
+#define MXC_CCM_CS2CDR_SSI2_CLK_PRED_OFFSET             (6)
+#define MXC_CCM_CS2CDR_SSI2_CLK_PRED_MASK               (0x7 << 6)
+#define MXC_CCM_CS2CDR_SSI2_CLK_PODF_OFFSET             (0)
+#define MXC_CCM_CS2CDR_SSI2_CLK_PODF_MASK               (0x3F)
+
+/* Define the bits in register CDCDR */
+#define MXC_CCM_CDCDR_TVE_CLK_PRED_OFFSET               (28)
+#define MXC_CCM_CDCDR_TVE_CLK_PRED_MASK                 (0x7 << 28)
+#define MXC_CCM_CDCDR_SPDIF0_CLK_PRED_OFFSET            (25)
+#define MXC_CCM_CDCDR_SPDIF0_CLK_PRED_MASK              (0x7 << 25)
+#define MXC_CCM_CDCDR_SPDIF0_CLK_PODF_OFFSET            (19)
+#define MXC_CCM_CDCDR_SPDIF0_CLK_PODF_MASK              (0x3F << 19)
+#define MXC_CCM_CDCDR_SPDIF1_CLK_PRED_OFFSET            (16)
+#define MXC_CCM_CDCDR_SPDIF1_CLK_PRED_MASK              (0x7 << 16)
+#define MXC_CCM_CDCDR_SPDIF1_CLK_PODF_OFFSET            (9)
+#define MXC_CCM_CDCDR_SPDIF1_CLK_PODF_MASK              (0x3F << 9)
+#define MXC_CCM_CDCDR_DI_CLK_PRED_OFFSET                (6)
+#define MXC_CCM_CDCDR_DI_CLK_PRED_MASK                  (0x7 << 6)
+#define MXC_CCM_CDCDR_USB_PHY_PRED_OFFSET               (3)
+#define MXC_CCM_CDCDR_USB_PHY_PRED_MASK                 (0x7 << 3)
+#define MXC_CCM_CDCDR_USB_PHY_PODF_OFFSET               (0)
+#define MXC_CCM_CDCDR_USB_PHY_PODF_MASK                 (0x7)
+
+/* Define the bits in register CHSCCDR */
+#define MXC_CCM_CHSCCDR_ESC_CLK_PRED_OFFSET             (12)
+#define MXC_CCM_CHSCCDR_ESC_CLK_PRED_MASK               (0x7 << 12)
+#define MXC_CCM_CHSCCDR_ESC_CLK_PODF_OFFSET             (6)
+#define MXC_CCM_CHSCCDR_ESC_CLK_PODF_MASK               (0x3F << 6)
+#define MXC_CCM_CHSCCDR_HSC2_CLK_PODF_OFFSET            (3)
+#define MXC_CCM_CHSCCDR_HSC2_CLK_PODF_MASK              (0x7 << 3)
+#define MXC_CCM_CHSCCDR_HSC1_CLK_PODF_OFFSET            (0)
+#define MXC_CCM_CHSCCDR_HSC1_CLK_PODF_MASK              (0x7)
+
+/* Define the bits in register CSCDR2 */
+#define MXC_CCM_CSCDR2_CSPI_CLK_PRED_OFFSET             (25)
+#define MXC_CCM_CSCDR2_CSPI_CLK_PRED_MASK               (0x7 << 25)
+#define MXC_CCM_CSCDR2_CSPI_CLK_PODF_OFFSET             (19)
+#define MXC_CCM_CSCDR2_CSPI_CLK_PODF_MASK               (0x3F << 19)
+#define MXC_CCM_CSCDR2_SIM_CLK_PRED_OFFSET              (16)
+#define MXC_CCM_CSCDR2_SIM_CLK_PRED_MASK                (0x7 << 16)
+#define MXC_CCM_CSCDR2_SIM_CLK_PODF_OFFSET              (9)
+#define MXC_CCM_CSCDR2_SIM_CLK_PODF_MASK                (0x3F << 9)
+#define MXC_CCM_CSCDR2_SLIMBUS_CLK_PRED_OFFSET          (6)
+#define MXC_CCM_CSCDR2_SLIMBUS_PRED_MASK                (0x7 << 6)
+#define MXC_CCM_CSCDR2_SLIMBUS_PODF_OFFSET              (0)
+#define MXC_CCM_CSCDR2_SLIMBUS_PODF_MASK                (0x3F)
+
+/* Define the bits in register CSCDR3 */
+#define MXC_CCM_CSCDR3_HSI2C_CLK_PRED_OFFSET            (16)
+#define MXC_CCM_CSCDR3_HSI2C_CLK_PRED_MASK              (0x7 << 16)
+#define MXC_CCM_CSCDR3_HSI2C_CLK_PODF_OFFSET            (9)
+#define MXC_CCM_CSCDR3_HSI2C_CLK_PODF_MASK              (0x3F << 9)
+#define MXC_CCM_CSCDR3_FIRI_CLK_PRED_OFFSET             (6)
+#define MXC_CCM_CSCDR3_FIRI_CLK_PRED_MASK               (0x7 << 6)
+#define MXC_CCM_CSCDR3_FIRI_CLK_PODF_OFFSET             (0)
+#define MXC_CCM_CSCDR3_FIRI_CLK_PODF_MASK               (0x3F)
+
+/* Define the bits in register CSCDR4 */
+#define MXC_CCM_CSCDR4_CSI_MCLK2_CLK_PRED_OFFSET        (16)
+#define MXC_CCM_CSCDR4_CSI_MCLK2_CLK_PRED_MASK          (0x7 << 16)
+#define MXC_CCM_CSCDR4_CSI_MCLK2_CLK_PODF_OFFSET        (9)
+#define MXC_CCM_CSCDR4_CSI_MCLK2_CLK_PODF_MASK          (0x3F << 9)
+#define MXC_CCM_CSCDR4_CSI_MCLK1_CLK_PRED_OFFSET        (6)
+#define MXC_CCM_CSCDR4_CSI_MCLK1_CLK_PRED_MASK          (0x7 << 6)
+#define MXC_CCM_CSCDR4_CSI_MCLK1_CLK_PODF_OFFSET        (0)
+#define MXC_CCM_CSCDR4_CSI_MCLK1_CLK_PODF_MASK          (0x3F)
+
+/* Define the bits in register CDHIPR */
+#define MXC_CCM_CDHIPR_ARM_PODF_BUSY                    (1 << 16)
+#define MXC_CCM_CDHIPR_DDR_HF_CLK_SEL_BUSY              (1 << 8)
+#define MXC_CCM_CDHIPR_DDR_PODF_BUSY                    (1 << 7)
+#define MXC_CCM_CDHIPR_EMI_CLK_SEL_BUSY                 (1 << 6)
+#define MXC_CCM_CDHIPR_PERIPH_CLK_SEL_BUSY              (1 << 5)
+#define MXC_CCM_CDHIPR_NFC_IPG_INT_MEM_PODF_BUSY        (1 << 4)
+#define MXC_CCM_CDHIPR_AHB_PODF_BUSY                    (1 << 3)
+#define MXC_CCM_CDHIPR_EMI_PODF_BUSY                    (1 << 2)
+#define MXC_CCM_CDHIPR_AXI_B_PODF_BUSY                  (1 << 1)
+#define MXC_CCM_CDHIPR_AXI_A_PODF_BUSY                  (1 << 0)
+
+/* Define the bits in register CDCR */
+#define MXC_CCM_CDCR_ARM_FREQ_SHIFT_DIVIDER             (0x1 << 2)
+#define MXC_CCM_CDCR_PERIPH_CLK_DVFS_PODF_OFFSET        (0)
+#define MXC_CCM_CDCR_PERIPH_CLK_DVFS_PODF_MASK          (0x3)
+
+/* Define the bits in register CLPCR */
+#define MXC_CCM_CLPCR_BYPASS_HSC_LPM_HS         (0x1 << 23)
+#define MXC_CCM_CLPCR_BYPASS_SCC_LPM_HS         (0x1 << 22)
+#define MXC_CCM_CLPCR_BYPASS_MAX_LPM_HS         (0x1 << 21)
+#define MXC_CCM_CLPCR_BYPASS_SDMA_LPM_HS        (0x1 << 20)
+#define MXC_CCM_CLPCR_BYPASS_EMI_LPM_HS         (0x1 << 19)
+#define MXC_CCM_CLPCR_BYPASS_IPU_LPM_HS         (0x1 << 18)
+#define MXC_CCM_CLPCR_BYPASS_RTIC_LPM_HS        (0x1 << 17)
+#define MXC_CCM_CLPCR_BYPASS_RNGC_LPM_HS        (0x1 << 16)
+#define MXC_CCM_CLPCR_COSC_PWRDOWN              (0x1 << 11)
+#define MXC_CCM_CLPCR_STBY_COUNT_OFFSET         (9)
+#define MXC_CCM_CLPCR_STBY_COUNT_MASK           (0x3 << 9)
+#define MXC_CCM_CLPCR_VSTBY                     (0x1 << 8)
+#define MXC_CCM_CLPCR_DIS_REF_OSC               (0x1 << 7)
+#define MXC_CCM_CLPCR_SBYOS                     (0x1 << 6)
+#define MXC_CCM_CLPCR_ARM_CLK_DIS_ON_LPM        (0x1 << 5)
+#define MXC_CCM_CLPCR_LPSR_CLK_SEL_OFFSET       (3)
+#define MXC_CCM_CLPCR_LPSR_CLK_SEL_MASK         (0x3 << 3)
+#define MXC_CCM_CLPCR_LPM_OFFSET                (0)
+#define MXC_CCM_CLPCR_LPM_MASK                  (0x3)
+
+/* Define the bits in register CISR */
+#define MXC_CCM_CISR_ARM_PODF_LOADED                    (0x1 << 25)
+#define MXC_CCM_CISR_NFC_IPG_INT_MEM_PODF_LOADED        (0x1 << 21)
+#define MXC_CCM_CISR_AHB_PODF_LOADED                    (0x1 << 20)
+#define MXC_CCM_CISR_EMI_PODF_LOADED                    (0x1 << 19)
+#define MXC_CCM_CISR_AXI_B_PODF_LOADED                  (0x1 << 18)
+#define MXC_CCM_CISR_AXI_A_PODF_LOADED                  (0x1 << 17)
+#define MXC_CCM_CISR_DIVIDER_LOADED                     (0x1 << 16)
+#define MXC_CCM_CISR_COSC_READY                         (0x1 << 6)
+#define MXC_CCM_CISR_CKIH2_READY                        (0x1 << 5)
+#define MXC_CCM_CISR_CKIH_READY                         (0x1 << 4)
+#define MXC_CCM_CISR_FPM_READY                          (0x1 << 3)
+#define MXC_CCM_CISR_LRF_PLL3                           (0x1 << 2)
+#define MXC_CCM_CISR_LRF_PLL2                           (0x1 << 1)
+#define MXC_CCM_CISR_LRF_PLL1                           (0x1)
+
+/* Define the bits in register CIMR */
+#define MXC_CCM_CIMR_MASK_ARM_PODF_LOADED               (0x1 << 25)
+#define MXC_CCM_CIMR_MASK_NFC_IPG_INT_MEM_PODF_LOADED   (0x1 << 21)
+#define MXC_CCM_CIMR_MASK_EMI_PODF_LOADED               (0x1 << 20)
+#define MXC_CCM_CIMR_MASK_AXI_C_PODF_LOADED             (0x1 << 19)
+#define MXC_CCM_CIMR_MASK_AXI_B_PODF_LOADED             (0x1 << 18)
+#define MXC_CCM_CIMR_MASK_AXI_A_PODF_LOADED             (0x1 << 17)
+#define MXC_CCM_CIMR_MASK_DIVIDER_LOADED                (0x1 << 16)
+#define MXC_CCM_CIMR_MASK_COSC_READY                    (0x1 << 5)
+#define MXC_CCM_CIMR_MASK_CKIH_READY                    (0x1 << 4)
+#define MXC_CCM_CIMR_MASK_FPM_READY                     (0x1 << 3)
+#define MXC_CCM_CIMR_MASK_LRF_PLL3                      (0x1 << 2)
+#define MXC_CCM_CIMR_MASK_LRF_PLL2                      (0x1 << 1)
+#define MXC_CCM_CIMR_MASK_LRF_PLL1                      (0x1)
+
+/* Define the bits in register CCOSR */
+#define MXC_CCM_CCOSR_CKO2_EN_OFFSET                    (0x1 << 24)
+#define MXC_CCM_CCOSR_CKO2_DIV_OFFSET                   (21)
+#define MXC_CCM_CCOSR_CKO2_DIV_MASK                     (0x7 << 21)
+#define MXC_CCM_CCOSR_CKO2_SEL_OFFSET                   (16)
+#define MXC_CCM_CCOSR_CKO2_SEL_MASK                     (0x1F << 16)
+#define MXC_CCM_CCOSR_CKOL_EN                           (0x1 << 7)
+#define MXC_CCM_CCOSR_CKOL_DIV_OFFSET                   (4)
+#define MXC_CCM_CCOSR_CKOL_DIV_MASK                     (0x7 << 4)
+#define MXC_CCM_CCOSR_CKOL_SEL_OFFSET                   (0)
+#define MXC_CCM_CCOSR_CKOL_SEL_MASK                     (0xF)
+
+/* Define the bits in registers CGPR */
+#define MXC_CCM_CGPR_EFUSE_PROG_SUPPLY_GATE             (0x1 << 4)
+#define MXC_CCM_CGPR_FPM_SEL                            (0x1 << 3)
+#define MXC_CCM_CGPR_VL_L2BIST_CLKDIV_OFFSET            (0)
+#define MXC_CCM_CGPR_VL_L2BIST_CLKDIV_MASK              (0x7)
+
+/* Define the bits in registers CCGRx */
+#define MXC_CCM_CCGRx_CG_MASK                           0x3
+#define MXC_CCM_CCGRx_MOD_OFF                           0x0
+#define MXC_CCM_CCGRx_MOD_ON                            0x3
+#define MXC_CCM_CCGRx_MOD_IDLE                          0x1
+
+#define MXC_CCM_CCGRx_CG15_MASK                         (0x3 << 30)
+#define MXC_CCM_CCGRx_CG14_MASK                         (0x3 << 28)
+#define MXC_CCM_CCGRx_CG13_MASK                         (0x3 << 26)
+#define MXC_CCM_CCGRx_CG12_MASK                         (0x3 << 24)
+#define MXC_CCM_CCGRx_CG11_MASK                         (0x3 << 22)
+#define MXC_CCM_CCGRx_CG10_MASK                         (0x3 << 20)
+#define MXC_CCM_CCGRx_CG9_MASK                          (0x3 << 18)
+#define MXC_CCM_CCGRx_CG8_MASK                          (0x3 << 16)
+#define MXC_CCM_CCGRx_CG5_MASK                          (0x3 << 10)
+#define MXC_CCM_CCGRx_CG4_MASK                          (0x3 << 8)
+#define MXC_CCM_CCGRx_CG3_MASK                          (0x3 << 6)
+#define MXC_CCM_CCGRx_CG2_MASK                          (0x3 << 4)
+#define MXC_CCM_CCGRx_CG1_MASK                          (0x3 << 2)
+#define MXC_CCM_CCGRx_CG0_MASK                          (0x3 << 0)
+
+#define MXC_CCM_CCGRx_CG15_OFFSET                       30
+#define MXC_CCM_CCGRx_CG14_OFFSET                       28
+#define MXC_CCM_CCGRx_CG13_OFFSET                       26
+#define MXC_CCM_CCGRx_CG12_OFFSET                       24
+#define MXC_CCM_CCGRx_CG11_OFFSET                       22
+#define MXC_CCM_CCGRx_CG10_OFFSET                       20
+#define MXC_CCM_CCGRx_CG9_OFFSET                        18
+#define MXC_CCM_CCGRx_CG8_OFFSET                        16
+#define MXC_CCM_CCGRx_CG7_OFFSET                        14
+#define MXC_CCM_CCGRx_CG6_OFFSET                        12
+#define MXC_CCM_CCGRx_CG5_OFFSET                        10
+#define MXC_CCM_CCGRx_CG4_OFFSET                        8
+#define MXC_CCM_CCGRx_CG3_OFFSET                        6
+#define MXC_CCM_CCGRx_CG2_OFFSET                        4
+#define MXC_CCM_CCGRx_CG1_OFFSET                        2
+#define MXC_CCM_CCGRx_CG0_OFFSET                        0
+
+#define MXC_DPTC_LP_BASE        (MX51_GPC_BASE + 0x80)
+#define MXC_DPTC_GP_BASE        (MX51_GPC_BASE + 0x100)
+#define MXC_DVFS_CORE_BASE      (MX51_GPC_BASE + 0x180)
+#define MXC_DPTC_PER_BASE       (MX51_GPC_BASE + 0x1C0)
+#define MXC_PGC_IPU_BASE        (MX51_GPC_BASE + 0x220)
+#define MXC_PGC_VPU_BASE        (MX51_GPC_BASE + 0x240)
+#define MXC_PGC_GPU_BASE        (MX51_GPC_BASE + 0x260)
+#define MXC_SRPG_NEON_BASE      (MX51_GPC_BASE + 0x280)
+#define MXC_SRPG_ARM_BASE       (MX51_GPC_BASE + 0x2A0)
+#define MXC_SRPG_EMPGC0_BASE    (MX51_GPC_BASE + 0x2C0)
+#define MXC_SRPG_EMPGC1_BASE    (MX51_GPC_BASE + 0x2D0)
+#define MXC_SRPG_MEGAMIX_BASE   (MX51_GPC_BASE + 0x2E0)
+#define MXC_SRPG_EMI_BASE       (MX51_GPC_BASE + 0x300)
+
+/* CORTEXA8 platform */
+#define MXC_CORTEXA8_PLAT_PVID          (MX51_CORTEXA8_BASE + 0x0)
+#define MXC_CORTEXA8_PLAT_GPC           (MX51_CORTEXA8_BASE + 0x4)
+#define MXC_CORTEXA8_PLAT_PIC           (MX51_CORTEXA8_BASE + 0x8)
+#define MXC_CORTEXA8_PLAT_LPC           (MX51_CORTEXA8_BASE + 0xC)
+#define MXC_CORTEXA8_PLAT_NEON_LPC      (MX51_CORTEXA8_BASE + 0x10)
+#define MXC_CORTEXA8_PLAT_ICGC          (MX51_CORTEXA8_BASE + 0x14)
+#define MXC_CORTEXA8_PLAT_AMC           (MX51_CORTEXA8_BASE + 0x18)
+#define MXC_CORTEXA8_PLAT_NMC           (MX51_CORTEXA8_BASE + 0x20)
+#define MXC_CORTEXA8_PLAT_NMS           (MX51_CORTEXA8_BASE + 0x24)
+
+/* DVFS CORE */
+#define MXC_DVFSTHRS            (MXC_DVFS_CORE_BASE + 0x00)
+#define MXC_DVFSCOUN            (MXC_DVFS_CORE_BASE + 0x04)
+#define MXC_DVFSSIG1            (MXC_DVFS_CORE_BASE + 0x08)
+#define MXC_DVFSSIG0            (MXC_DVFS_CORE_BASE + 0x0C)
+#define MXC_DVFSGPC0            (MXC_DVFS_CORE_BASE + 0x10)
+#define MXC_DVFSGPC1            (MXC_DVFS_CORE_BASE + 0x14)
+#define MXC_DVFSGPBT            (MXC_DVFS_CORE_BASE + 0x18)
+#define MXC_DVFSEMAC            (MXC_DVFS_CORE_BASE + 0x1C)
+#define MXC_DVFSCNTR            (MXC_DVFS_CORE_BASE + 0x20)
+#define MXC_DVFSLTR0_0          (MXC_DVFS_CORE_BASE + 0x24)
+#define MXC_DVFSLTR0_1          (MXC_DVFS_CORE_BASE + 0x28)
+#define MXC_DVFSLTR1_0          (MXC_DVFS_CORE_BASE + 0x2C)
+#define MXC_DVFSLTR1_1          (MXC_DVFS_CORE_BASE + 0x30)
+#define MXC_DVFSPT0             (MXC_DVFS_CORE_BASE + 0x34)
+#define MXC_DVFSPT1             (MXC_DVFS_CORE_BASE + 0x38)
+#define MXC_DVFSPT2             (MXC_DVFS_CORE_BASE + 0x3C)
+#define MXC_DVFSPT3             (MXC_DVFS_CORE_BASE + 0x40)
+
+/* GPC */
+#define MXC_GPC_CNTR            (MX51_GPC_BASE + 0x0)
+#define MXC_GPC_PGR             (MX51_GPC_BASE + 0x4)
+#define MXC_GPC_VCR             (MX51_GPC_BASE + 0x8)
+#define MXC_GPC_ALL_PU          (MX51_GPC_BASE + 0xC)
+#define MXC_GPC_NEON            (MX51_GPC_BASE + 0x10)
+#define MXC_GPC_PGR_ARMPG_OFFSET        8
+#define MXC_GPC_PGR_ARMPG_MASK          (3 << 8)
+
+/* PGC */
+#define MXC_PGC_IPU_PGCR        (MXC_PGC_IPU_BASE + 0x0)
+#define MXC_PGC_IPU_PGSR        (MXC_PGC_IPU_BASE + 0xC)
+#define MXC_PGC_VPU_PGCR        (MXC_PGC_VPU_BASE + 0x0)
+#define MXC_PGC_VPU_PGSR        (MXC_PGC_VPU_BASE + 0xC)
+#define MXC_PGC_GPU_PGCR        (MXC_PGC_GPU_BASE + 0x0)
+#define MXC_PGC_GPU_PGSR        (MXC_PGC_GPU_BASE + 0xC)
+
+#define MXC_PGCR_PCR            1
+#define MXC_SRPGCR_PCR          1
+#define MXC_EMPGCR_PCR          1
+#define MXC_PGSR_PSR            1
+
+
+#define MXC_CORTEXA8_PLAT_LPC_DSM       (1 << 0)
+#define MXC_CORTEXA8_PLAT_LPC_DBG_DSM   (1 << 1)
+
+/* SRPG */
+#define MXC_SRPG_NEON_SRPGCR    (MXC_SRPG_NEON_BASE + 0x0)
+#define MXC_SRPG_NEON_PUPSCR    (MXC_SRPG_NEON_BASE + 0x4)
+#define MXC_SRPG_NEON_PDNSCR    (MXC_SRPG_NEON_BASE + 0x8)
+
+#define MXC_SRPG_ARM_SRPGCR     (MXC_SRPG_ARM_BASE + 0x0)
+#define MXC_SRPG_ARM_PUPSCR     (MXC_SRPG_ARM_BASE + 0x4)
+#define MXC_SRPG_ARM_PDNSCR     (MXC_SRPG_ARM_BASE + 0x8)
+
+#define MXC_SRPG_EMPGC0_SRPGCR  (MXC_SRPG_EMPGC0_BASE + 0x0)
+#define MXC_SRPG_EMPGC0_PUPSCR  (MXC_SRPG_EMPGC0_BASE + 0x4)
+#define MXC_SRPG_EMPGC0_PDNSCR  (MXC_SRPG_EMPGC0_BASE + 0x8)
+
+#define MXC_SRPG_EMPGC1_SRPGCR  (MXC_SRPG_EMPGC1_BASE + 0x0)
+#define MXC_SRPG_EMPGC1_PUPSCR  (MXC_SRPG_EMPGC1_BASE + 0x4)
+#define MXC_SRPG_EMPGC1_PDNSCR  (MXC_SRPG_EMPGC1_BASE + 0x8)
+
+#define MXC_SRPG_MEGAMIX_SRPGCR         (MXC_SRPG_MEGAMIX_BASE + 0x0)
+#define MXC_SRPG_MEGAMIX_PUPSCR         (MXC_SRPG_MEGAMIX_BASE + 0x4)
+#define MXC_SRPG_MEGAMIX_PDNSCR         (MXC_SRPG_MEGAMIX_BASE + 0x8)
+
+#define MXC_SRPGC_EMI_SRPGCR    (MXC_SRPGC_EMI_BASE + 0x0)
+#define MXC_SRPGC_EMI_PUPSCR    (MXC_SRPGC_EMI_BASE + 0x4)
+#define MXC_SRPGC_EMI_PDNSCR    (MXC_SRPGC_EMI_BASE + 0x8)
+
+#endif                          /* __ARCH_ARM_MACH_MX51_CRM_REGS_H__ */
diff --git a/arch/arm/mach-mx5/devices.c b/arch/arm/mach-mx5/devices.c
new file mode 100644
index 000000000000..d6fd3961ade9
--- /dev/null
+++ b/arch/arm/mach-mx5/devices.c
@@ -0,0 +1,96 @@
+/*
+ * Copyright 2009 Amit Kucheria <amit.kucheria@canonical.com>
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+#include <linux/platform_device.h>
+#include <mach/hardware.h>
+#include <mach/imx-uart.h>
+
+static struct resource uart0[] = {
+        {
+                .start = MX51_UART1_BASE_ADDR,
+                .end = MX51_UART1_BASE_ADDR + 0xfff,
+                .flags = IORESOURCE_MEM,
+        }, {
+                .start = MX51_MXC_INT_UART1,
+                .end = MX51_MXC_INT_UART1,
+                .flags = IORESOURCE_IRQ,
+        },
+};
+
+struct platform_device mxc_uart_device0 = {
+        .name = "imx-uart",
+        .id = 0,
+        .resource = uart0,
+        .num_resources = ARRAY_SIZE(uart0),
+};
+
+static struct resource uart1[] = {
+        {
+                .start = MX51_UART2_BASE_ADDR,
+                .end = MX51_UART2_BASE_ADDR + 0xfff,
+                .flags = IORESOURCE_MEM,
+        }, {
+                .start = MX51_MXC_INT_UART2,
+                .end = MX51_MXC_INT_UART2,
+                .flags = IORESOURCE_IRQ,
+        },
+};
+
+struct platform_device mxc_uart_device1 = {
+        .name = "imx-uart",
+        .id = 1,
+        .resource = uart1,
+        .num_resources = ARRAY_SIZE(uart1),
+};
+
+static struct resource uart2[] = {
+        {
+                .start = MX51_UART3_BASE_ADDR,
+                .end = MX51_UART3_BASE_ADDR + 0xfff,
+                .flags = IORESOURCE_MEM,
+        }, {
+                .start = MX51_MXC_INT_UART3,
+                .end = MX51_MXC_INT_UART3,
+                .flags = IORESOURCE_IRQ,
+        },
+};
+
+struct platform_device mxc_uart_device2 = {
+        .name = "imx-uart",
+        .id = 2,
+        .resource = uart2,
+        .num_resources = ARRAY_SIZE(uart2),
+};
+
+static struct resource mxc_fec_resources[] = {
+        {
+                .start  = MX51_MXC_FEC_BASE_ADDR,
+                .end    = MX51_MXC_FEC_BASE_ADDR + 0xfff,
+                .flags  = IORESOURCE_MEM,
+        }, {
+                .start  = MX51_MXC_INT_FEC,
+                .end    = MX51_MXC_INT_FEC,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+struct platform_device mxc_fec_device = {
+        .name = "fec",
+        .id = 0,
+        .num_resources = ARRAY_SIZE(mxc_fec_resources),
+        .resource = mxc_fec_resources,
+};
+
+/* Dummy definition to allow compiling in AVIC and TZIC simultaneously */
+int __init mxc_register_gpios(void)
+{
+        return 0;
+}
diff --git a/arch/arm/mach-mx5/devices.h b/arch/arm/mach-mx5/devices.h
new file mode 100644
index 000000000000..f339ab8c19be
--- /dev/null
+++ b/arch/arm/mach-mx5/devices.h
@@ -0,0 +1,4 @@
+extern struct platform_device mxc_uart_device0;
+extern struct platform_device mxc_uart_device1;
+extern struct platform_device mxc_uart_device2;
+extern struct platform_device mxc_fec_device;
diff --git a/arch/arm/mach-mx5/mm.c b/arch/arm/mach-mx5/mm.c
new file mode 100644
index 000000000000..c21e18be7af8
--- /dev/null
+++ b/arch/arm/mach-mx5/mm.c
@@ -0,0 +1,89 @@
+/*
+ * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved.
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License.  You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ *
+ * Create static mapping between physical to virtual memory.
+ */
+
+#include <linux/mm.h>
+#include <linux/init.h>
+
+#include <asm/mach/map.h>
+
+#include <mach/hardware.h>
+#include <mach/common.h>
+#include <mach/iomux-v3.h>
+
+/*
+ * Define the MX51 memory map.
+ */
+static struct map_desc mxc_io_desc[] __initdata = {
+        {
+                .virtual = MX51_IRAM_BASE_ADDR_VIRT,
+                .pfn = __phys_to_pfn(MX51_IRAM_BASE_ADDR),
+                .length = MX51_IRAM_SIZE,
+                .type = MT_DEVICE
+        }, {
+                .virtual = MX51_DEBUG_BASE_ADDR_VIRT,
+                .pfn = __phys_to_pfn(MX51_DEBUG_BASE_ADDR),
+                .length = MX51_DEBUG_SIZE,
+                .type = MT_DEVICE
+        }, {
+                .virtual = MX51_TZIC_BASE_ADDR_VIRT,
+                .pfn = __phys_to_pfn(MX51_TZIC_BASE_ADDR),
+                .length = MX51_TZIC_SIZE,
+                .type = MT_DEVICE
+        }, {
+                .virtual = MX51_AIPS1_BASE_ADDR_VIRT,
+                .pfn = __phys_to_pfn(MX51_AIPS1_BASE_ADDR),
+                .length = MX51_AIPS1_SIZE,
+                .type = MT_DEVICE
+        }, {
+                .virtual = MX51_SPBA0_BASE_ADDR_VIRT,
+                .pfn = __phys_to_pfn(MX51_SPBA0_BASE_ADDR),
+                .length = MX51_SPBA0_SIZE,
+                .type = MT_DEVICE
+        }, {
+                .virtual = MX51_AIPS2_BASE_ADDR_VIRT,
+                .pfn = __phys_to_pfn(MX51_AIPS2_BASE_ADDR),
+                .length = MX51_AIPS2_SIZE,
+                .type = MT_DEVICE
+        }, {
+                .virtual = MX51_NFC_AXI_BASE_ADDR_VIRT,
+                .pfn = __phys_to_pfn(MX51_NFC_AXI_BASE_ADDR),
+                .length = MX51_NFC_AXI_SIZE,
+                .type = MT_DEVICE
+        },
+};
+
+/*
+ * This function initializes the memory map. It is called during the
+ * system startup to create static physical to virtual memory mappings
+ * for the IO modules.
+ */
+void __init mx51_map_io(void)
+{
+        u32 tzic_addr;
+
+        if (mx51_revision() < MX51_CHIP_REV_2_0)
+                tzic_addr = 0x8FFFC000;
+        else
+                tzic_addr = 0xE0003000;
+        mxc_io_desc[2].pfn =  __phys_to_pfn(tzic_addr);
+
+        mxc_set_cpu_type(MXC_CPU_MX51);
+        mxc_iomux_v3_init(MX51_IO_ADDRESS(MX51_IOMUXC_BASE_ADDR));
+        mxc_arch_reset_init(MX51_IO_ADDRESS(MX51_WDOG_BASE_ADDR));
+        iotable_init(mxc_io_desc, ARRAY_SIZE(mxc_io_desc));
+}
+
+void __init mx51_init_irq(void)
+{
+        tzic_init_irq(MX51_IO_ADDRESS(MX51_TZIC_BASE_ADDR));
+}
diff --git a/arch/arm/mach-mxc91231/magx-zn5.c b/arch/arm/mach-mxc91231/magx-zn5.c
index 7dbe4ca12efd..69816ba82930 100644
--- a/arch/arm/mach-mxc91231/magx-zn5.c
+++ b/arch/arm/mach-mxc91231/magx-zn5.c
@@ -55,7 +55,7 @@ struct sys_timer zn5_timer = {
 MACHINE_START(MAGX_ZN5, "Motorola Zn5")
         .phys_io        = MXC91231_AIPS1_BASE_ADDR,
         .io_pg_offst    = ((MXC91231_AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc,
-        .boot_params    = PHYS_OFFSET + 0x100,
+        .boot_params    = MXC91231_PHYS_OFFSET + 0x100,
         .map_io         = mxc91231_map_io,
         .init_irq       = mxc91231_init_irq,
         .timer          = &zn5_timer,
diff --git a/arch/arm/mach-nomadik/board-nhk8815.c b/arch/arm/mach-nomadik/board-nhk8815.c
index 9438bf6613a3..ab3712c86d2b 100644
--- a/arch/arm/mach-nomadik/board-nhk8815.c
+++ b/arch/arm/mach-nomadik/board-nhk8815.c
@@ -38,7 +38,7 @@
 #define SRC_CR_INIT_MASK        0x00007fff
 #define SRC_CR_INIT_VAL         0x2aaa8000
 
-/* These adresses span 16MB, so use three individual pages */
+/* These addresses span 16MB, so use three individual pages */
 static struct resource nhk8815_nand_resources[] = {
         {
                 .name = "nand_addr",
diff --git a/arch/arm/mach-omap2/board-3630sdp.c b/arch/arm/mach-omap2/board-3630sdp.c
index 4386d2b4a785..4386d2b4a785 100755..100644
--- a/arch/arm/mach-omap2/board-3630sdp.c
+++ b/arch/arm/mach-omap2/board-3630sdp.c
diff --git a/arch/arm/mach-omap2/board-zoom-peripherals.c b/arch/arm/mach-omap2/board-zoom-peripherals.c
index ca95d8d64136..ca95d8d64136 100755..100644
--- a/arch/arm/mach-omap2/board-zoom-peripherals.c
+++ b/arch/arm/mach-omap2/board-zoom-peripherals.c
diff --git a/arch/arm/mach-orion5x/Kconfig b/arch/arm/mach-orion5x/Kconfig
index c3d513cad5ac..905719a677ae 100644
--- a/arch/arm/mach-orion5x/Kconfig
+++ b/arch/arm/mach-orion5x/Kconfig
@@ -57,6 +57,13 @@ config MACH_LINKSTATION_MINI
           Say 'Y' here if you want your kernel to support the
           Buffalo Linkstation Mini platform.
 
+config MACH_LINKSTATION_LS_HGL
+        bool "Buffalo Linkstation LS-HGL"
+        select I2C_BOARDINFO
+        help
+          Say 'Y' here if you want your kernel to support the
+          Buffalo Linkstation LS-HGL platform.
+
 config MACH_TS409
         bool "QNAP TS-409"
         help
diff --git a/arch/arm/mach-orion5x/Makefile b/arch/arm/mach-orion5x/Makefile
index 89772fcd65c7..eb6eabcb41e4 100644
--- a/arch/arm/mach-orion5x/Makefile
+++ b/arch/arm/mach-orion5x/Makefile
@@ -5,6 +5,7 @@ obj-$(CONFIG_MACH_KUROBOX_PRO)	+= kurobox_pro-setup.o
 obj-$(CONFIG_MACH_TERASTATION_PRO2)     += terastation_pro2-setup.o
 obj-$(CONFIG_MACH_LINKSTATION_PRO) += kurobox_pro-setup.o
 obj-$(CONFIG_MACH_LINKSTATION_MINI) += lsmini-setup.o
+obj-$(CONFIG_MACH_LINKSTATION_LS_HGL) += ls_hgl-setup.o
 obj-$(CONFIG_MACH_DNS323)       += dns323-setup.o
 obj-$(CONFIG_MACH_TS209)        += ts209-setup.o tsx09-common.o
 obj-$(CONFIG_MACH_TS409)        += ts409-setup.o tsx09-common.o
diff --git a/arch/arm/mach-orion5x/common.c b/arch/arm/mach-orion5x/common.c
index f87fa1253803..8dc2c76d2260 100644
--- a/arch/arm/mach-orion5x/common.c
+++ b/arch/arm/mach-orion5x/common.c
@@ -488,7 +488,7 @@ static struct platform_device orion5x_xor0_channel = {
         .dev            = {
                 .dma_mask               = &orion5x_xor_dmamask,
                 .coherent_dma_mask      = DMA_BIT_MASK(64),
-                .platform_data          = (void *)&orion5x_xor0_data,
+                .platform_data          = &orion5x_xor0_data,
         },
 };
 
@@ -514,7 +514,7 @@ static struct platform_device orion5x_xor1_channel = {
         .dev            = {
                 .dma_mask               = &orion5x_xor_dmamask,
                 .coherent_dma_mask      = DMA_BIT_MASK(64),
-                .platform_data          = (void *)&orion5x_xor1_data,
+                .platform_data          = &orion5x_xor1_data,
         },
 };
 
diff --git a/arch/arm/mach-orion5x/d2net-setup.c b/arch/arm/mach-orion5x/d2net-setup.c
index 9d4bf763f25b..7130904ad999 100644
--- a/arch/arm/mach-orion5x/d2net-setup.c
+++ b/arch/arm/mach-orion5x/d2net-setup.c
@@ -149,10 +149,7 @@ static void __init d2net_sata_power_init(void)
 
 /*
  * The blue front LED is wired to the CPLD and can blink in relation with the
- * SATA activity. This feature is disabled to make this LED compatible with
- * the leds-gpio driver: MPP14 and MPP15 are configured to act like output
- * GPIO's and have to stay in an active state. This is needed to set the blue
- * LED in a "fix on" state regardless of the SATA activity.
+ * SATA activity.
  *
  * The following array detail the different LED registers and the combination
  * of their possible values:
@@ -171,12 +168,11 @@ static void __init d2net_sata_power_init(void)
 #define D2NET_GPIO_RED_LED              6
 #define D2NET_GPIO_BLUE_LED_BLINK_CTRL  16
 #define D2NET_GPIO_BLUE_LED_OFF         23
-#define D2NET_GPIO_SATA0_ACT            14
-#define D2NET_GPIO_SATA1_ACT            15
 
 static struct gpio_led d2net_leds[] = {
         {
-                .name = "d2net:blue:power",
+                .name = "d2net:blue:sata",
+                .default_trigger = "default-on",
                 .gpio = D2NET_GPIO_BLUE_LED_OFF,
                 .active_low = 1,
         },
@@ -201,25 +197,22 @@ static struct platform_device d2net_gpio_leds = {
 
 static void __init d2net_gpio_leds_init(void)
 {
+        int err;
+
         /* Configure GPIO over MPP max number. */
         orion_gpio_set_valid(D2NET_GPIO_BLUE_LED_OFF, 1);
 
-        if (gpio_request(D2NET_GPIO_SATA0_ACT, "LED SATA0 activity") != 0)
-                return;
-        if (gpio_direction_output(D2NET_GPIO_SATA0_ACT, 1) != 0)
-                goto err_free_1;
-        if (gpio_request(D2NET_GPIO_SATA1_ACT, "LED SATA1 activity") != 0)
-                goto err_free_1;
-        if (gpio_direction_output(D2NET_GPIO_SATA1_ACT, 1) != 0)
-                goto err_free_2;
-        platform_device_register(&d2net_gpio_leds);
-        return;
+        /* Configure register blink_ctrl to allow SATA activity LED blinking. */
+        err = gpio_request(D2NET_GPIO_BLUE_LED_BLINK_CTRL, "blue LED blink");
+        if (err == 0) {
+                err = gpio_direction_output(D2NET_GPIO_BLUE_LED_BLINK_CTRL, 1);
+                if (err)
+                        gpio_free(D2NET_GPIO_BLUE_LED_BLINK_CTRL);
+        }
+        if (err)
+                pr_err("d2net: failed to configure blue LED blink GPIO\n");
 
-err_free_2:
-        gpio_free(D2NET_GPIO_SATA1_ACT);
-err_free_1:
-        gpio_free(D2NET_GPIO_SATA0_ACT);
-        return;
+        platform_device_register(&d2net_gpio_leds);
 }
 
 /****************************************************************************
@@ -289,8 +282,8 @@ static struct orion5x_mpp_mode d2net_mpp_modes[] __initdata = {
         { 11, MPP_UNUSED },
         { 12, MPP_GPIO },       /* SATA 1 power */
         { 13, MPP_UNUSED },
-        { 14, MPP_GPIO },       /* SATA 0 active */
-        { 15, MPP_GPIO },       /* SATA 1 active */
+        { 14, MPP_SATA_LED },   /* SATA 0 active */
+        { 15, MPP_SATA_LED },   /* SATA 1 active */
         { 16, MPP_GPIO },       /* Blue front LED blink control */
         { 17, MPP_UNUSED },
         { 18, MPP_GPIO },       /* Front button (0 = Released, 1 = Pushed ) */
@@ -301,6 +294,8 @@ static struct orion5x_mpp_mode d2net_mpp_modes[] __initdata = {
         /* 24: Inhibit board power off (0 = Disabled, 1 = Enabled) */
 };
 
+#define D2NET_GPIO_INHIBIT_POWER_OFF    24
+
 static void __init d2net_init(void)
 {
         /*
@@ -333,6 +328,8 @@ static void __init d2net_init(void)
 
         i2c_register_board_info(0, d2net_i2c_devices,
                                 ARRAY_SIZE(d2net_i2c_devices));
+
+        orion_gpio_set_valid(D2NET_GPIO_INHIBIT_POWER_OFF, 1);
 }
 
 /* Warning: LaCie use a wrong mach-type (0x20e=526) in their bootloader. */
diff --git a/arch/arm/mach-orion5x/dns323-setup.c b/arch/arm/mach-orion5x/dns323-setup.c
index 8f159db4d08a..421b82f7c63d 100644
--- a/arch/arm/mach-orion5x/dns323-setup.c
+++ b/arch/arm/mach-orion5x/dns323-setup.c
@@ -34,7 +34,8 @@
 #define DNS323_GPIO_LED_RIGHT_AMBER     1
 #define DNS323_GPIO_LED_LEFT_AMBER      2
 #define DNS323_GPIO_SYSTEM_UP           3
-#define DNS323_GPIO_LED_POWER           5
+#define DNS323_GPIO_LED_POWER1          4
+#define DNS323_GPIO_LED_POWER2          5
 #define DNS323_GPIO_OVERTEMP            6
 #define DNS323_GPIO_RTC                 7
 #define DNS323_GPIO_POWER_OFF           8
@@ -237,11 +238,31 @@ error_fail:
  * GPIO LEDs (simple - doesn't use hardware blinking support)
  */
 
+#define ORION_BLINK_HALF_PERIOD 100 /* ms */
+
+static int dns323_gpio_blink_set(unsigned gpio,
+        unsigned long *delay_on, unsigned long *delay_off)
+{
+        static int value = 0;
+
+        if (!*delay_on && !*delay_off)
+                *delay_on = *delay_off = ORION_BLINK_HALF_PERIOD;
+
+        if (ORION_BLINK_HALF_PERIOD == *delay_on
+            && ORION_BLINK_HALF_PERIOD == *delay_off) {
+                value = !value;
+                orion_gpio_set_blink(gpio, value);
+                return 0;
+        }
+
+        return -EINVAL;
+}
+
 static struct gpio_led dns323_leds[] = {
         {
                 .name = "power:blue",
-                .gpio = DNS323_GPIO_LED_POWER,
-                .default_state = LEDS_GPIO_DEFSTATE_ON,
+                .gpio = DNS323_GPIO_LED_POWER2,
+                .default_trigger = "timer",
         }, {
                 .name = "right:amber",
                 .gpio = DNS323_GPIO_LED_RIGHT_AMBER,
@@ -256,6 +277,7 @@ static struct gpio_led dns323_leds[] = {
 static struct gpio_led_platform_data dns323_led_data = {
         .num_leds       = ARRAY_SIZE(dns323_leds),
         .leds           = dns323_leds,
+        .gpio_blink_set = dns323_gpio_blink_set,
 };
 
 static struct platform_device dns323_gpio_leds = {
@@ -412,6 +434,14 @@ static void __init dns323_init(void)
         orion5x_setup_dev_boot_win(DNS323_NOR_BOOT_BASE, DNS323_NOR_BOOT_SIZE);
         platform_device_register(&dns323_nor_flash);
 
+        /* The 5181 power LED is active low and requires
+         * DNS323_GPIO_LED_POWER1 to also be low.
+         */
+        if (dns323_dev_id() == MV88F5181_DEV_ID) {
+                dns323_leds[0].active_low = 1;
+                gpio_direction_output(DNS323_GPIO_LED_POWER1, 0);
+        }
+
         platform_device_register(&dns323_gpio_leds);
 
         platform_device_register(&dns323_button_device);
diff --git a/arch/arm/mach-orion5x/ls_hgl-setup.c b/arch/arm/mach-orion5x/ls_hgl-setup.c
new file mode 100644
index 000000000000..8e569be6e2c7
--- /dev/null
+++ b/arch/arm/mach-orion5x/ls_hgl-setup.c
@@ -0,0 +1,276 @@
+/*
+ * arch/arm/mach-orion5x/ls_hgl-setup.c
+ *
+ * Maintainer: Zhu Qingsen <zhuqs@cn.fujitsu.com>
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2.  This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/mtd/physmap.h>
+#include <linux/mv643xx_eth.h>
+#include <linux/leds.h>
+#include <linux/gpio_keys.h>
+#include <linux/input.h>
+#include <linux/i2c.h>
+#include <linux/ata_platform.h>
+#include <linux/gpio.h>
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+#include <asm/system.h>
+#include <mach/orion5x.h>
+#include "common.h"
+#include "mpp.h"
+
+/*****************************************************************************
+ * Linkstation LS-HGL Info
+ ****************************************************************************/
+
+/*
+ * 256K NOR flash Device bus boot chip select
+ */
+
+#define LS_HGL_NOR_BOOT_BASE    0xf4000000
+#define LS_HGL_NOR_BOOT_SIZE    SZ_256K
+
+/*****************************************************************************
+ * 256KB NOR Flash on BOOT Device
+ ****************************************************************************/
+
+static struct physmap_flash_data ls_hgl_nor_flash_data = {
+        .width          = 1,
+};
+
+static struct resource ls_hgl_nor_flash_resource = {
+        .flags  = IORESOURCE_MEM,
+        .start  = LS_HGL_NOR_BOOT_BASE,
+        .end    = LS_HGL_NOR_BOOT_BASE + LS_HGL_NOR_BOOT_SIZE - 1,
+};
+
+static struct platform_device ls_hgl_nor_flash = {
+        .name                   = "physmap-flash",
+        .id                     = 0,
+        .dev            = {
+                .platform_data  = &ls_hgl_nor_flash_data,
+        },
+        .num_resources          = 1,
+        .resource               = &ls_hgl_nor_flash_resource,
+};
+
+/*****************************************************************************
+ * Ethernet
+ ****************************************************************************/
+
+static struct mv643xx_eth_platform_data ls_hgl_eth_data = {
+        .phy_addr       = 8,
+};
+
+/*****************************************************************************
+ * RTC 5C372a on I2C bus
+ ****************************************************************************/
+
+static struct i2c_board_info __initdata ls_hgl_i2c_rtc = {
+        I2C_BOARD_INFO("rs5c372a", 0x32),
+};
+
+/*****************************************************************************
+ * LEDs attached to GPIO
+ ****************************************************************************/
+
+#define LS_HGL_GPIO_LED_ALARM   2
+#define LS_HGL_GPIO_LED_INFO    3
+#define LS_HGL_GPIO_LED_FUNC    17
+#define LS_HGL_GPIO_LED_PWR     0
+
+
+static struct gpio_led ls_hgl_led_pins[] = {
+        {
+                .name      = "alarm:red",
+                .gpio      = LS_HGL_GPIO_LED_ALARM,
+                .active_low     = 1,
+        }, {
+                .name      = "info:amber",
+                .gpio      = LS_HGL_GPIO_LED_INFO,
+                .active_low     = 1,
+        }, {
+                .name      = "func:blue:top",
+                .gpio      = LS_HGL_GPIO_LED_FUNC,
+                .active_low     = 1,
+        }, {
+                .name      = "power:blue:bottom",
+                .gpio      = LS_HGL_GPIO_LED_PWR,
+        },
+};
+
+static struct gpio_led_platform_data ls_hgl_led_data = {
+        .leds      = ls_hgl_led_pins,
+        .num_leds       = ARRAY_SIZE(ls_hgl_led_pins),
+};
+
+static struct platform_device ls_hgl_leds = {
+        .name   = "leds-gpio",
+        .id     = -1,
+        .dev    = {
+                .platform_data  = &ls_hgl_led_data,
+        },
+};
+
+/****************************************************************************
+ * GPIO Attached Keys
+ ****************************************************************************/
+#define LS_HGL_GPIO_KEY_FUNC       15
+#define LS_HGL_GPIO_KEY_POWER      8
+#define LS_HGL_GPIO_KEY_AUTOPOWER  10
+
+#define LS_HGL_SW_POWER     0x00
+#define LS_HGL_SW_AUTOPOWER 0x01
+
+static struct gpio_keys_button ls_hgl_buttons[] = {
+        {
+                .code      = KEY_OPTION,
+                .gpio      = LS_HGL_GPIO_KEY_FUNC,
+                .desc      = "Function Button",
+                .active_low     = 1,
+        }, {
+                .type           = EV_SW,
+                .code      = LS_HGL_SW_POWER,
+                .gpio      = LS_HGL_GPIO_KEY_POWER,
+                .desc      = "Power-on Switch",
+                .active_low     = 1,
+        }, {
+                .type           = EV_SW,
+                .code      = LS_HGL_SW_AUTOPOWER,
+                .gpio      = LS_HGL_GPIO_KEY_AUTOPOWER,
+                .desc      = "Power-auto Switch",
+                .active_low     = 1,
+        },
+};
+
+static struct gpio_keys_platform_data ls_hgl_button_data = {
+        .buttons        = ls_hgl_buttons,
+        .nbuttons       = ARRAY_SIZE(ls_hgl_buttons),
+};
+
+static struct platform_device ls_hgl_button_device = {
+        .name      = "gpio-keys",
+        .id          = -1,
+        .num_resources  = 0,
+        .dev        = {
+                .platform_data  = &ls_hgl_button_data,
+        },
+};
+
+
+/*****************************************************************************
+ * SATA
+ ****************************************************************************/
+static struct mv_sata_platform_data ls_hgl_sata_data = {
+        .n_ports        = 2,
+};
+
+
+/*****************************************************************************
+ * Linkstation LS-HGL specific power off method: reboot
+ ****************************************************************************/
+/*
+ * On the Linkstation LS-HGL, the shutdown process is following:
+ * - Userland monitors key events until the power switch goes to off position
+ * - The board reboots
+ * - U-boot starts and goes into an idle mode waiting for the user
+ *   to move the switch to ON position
+ */
+
+static void ls_hgl_power_off(void)
+{
+        arm_machine_restart('h', NULL);
+}
+
+
+/*****************************************************************************
+ * General Setup
+ ****************************************************************************/
+
+#define LS_HGL_GPIO_USB_POWER   9
+#define LS_HGL_GPIO_AUTO_POWER  10
+#define LS_HGL_GPIO_POWER           8
+
+#define LS_HGL_GPIO_HDD_POWER   1
+
+static struct orion5x_mpp_mode ls_hgl_mpp_modes[] __initdata = {
+        {  0, MPP_GPIO }, /* LED_PWR */
+        {  1, MPP_GPIO }, /* HDD_PWR */
+        {  2, MPP_GPIO }, /* LED_ALARM */
+        {  3, MPP_GPIO }, /* LED_INFO */
+        {  4, MPP_UNUSED },
+        {  5, MPP_UNUSED },
+        {  6, MPP_GPIO }, /* FAN_LCK */
+        {  7, MPP_GPIO }, /* INIT */
+        {  8, MPP_GPIO }, /* POWER */
+        {  9, MPP_GPIO }, /* USB_PWR */
+        { 10, MPP_GPIO }, /* AUTO_POWER */
+        { 11, MPP_UNUSED }, /* LED_ETH (dummy) */
+        { 12, MPP_UNUSED },
+        { 13, MPP_UNUSED },
+        { 14, MPP_UNUSED },
+        { 15, MPP_GPIO }, /* FUNC */
+        { 16, MPP_UNUSED },
+        { 17, MPP_GPIO }, /* LED_FUNC */
+        { 18, MPP_UNUSED },
+        { 19, MPP_UNUSED },
+        { -1 },
+};
+
+static void __init ls_hgl_init(void)
+{
+        /*
+         * Setup basic Orion functions. Need to be called early.
+         */
+        orion5x_init();
+
+        orion5x_mpp_conf(ls_hgl_mpp_modes);
+
+        /*
+         * Configure peripherals.
+         */
+        orion5x_ehci0_init();
+        orion5x_ehci1_init();
+        orion5x_eth_init(&ls_hgl_eth_data);
+        orion5x_i2c_init();
+        orion5x_sata_init(&ls_hgl_sata_data);
+        orion5x_uart0_init();
+        orion5x_xor_init();
+
+        orion5x_setup_dev_boot_win(LS_HGL_NOR_BOOT_BASE,
+                                   LS_HGL_NOR_BOOT_SIZE);
+        platform_device_register(&ls_hgl_nor_flash);
+
+        platform_device_register(&ls_hgl_button_device);
+
+        platform_device_register(&ls_hgl_leds);
+
+        i2c_register_board_info(0, &ls_hgl_i2c_rtc, 1);
+
+        /* enable USB power */
+        gpio_set_value(LS_HGL_GPIO_USB_POWER, 1);
+
+        /* register power-off method */
+        pm_power_off = ls_hgl_power_off;
+
+        pr_info("%s: finished\n", __func__);
+}
+
+MACHINE_START(LINKSTATION_LS_HGL, "Buffalo Linkstation LS-HGL")
+        /* Maintainer: Zhu Qingsen <zhuqs@cn.fujistu.com> */
+        .phys_io        = ORION5X_REGS_PHYS_BASE,
+        .io_pg_offst    = ((ORION5X_REGS_VIRT_BASE) >> 18) & 0xFFFC,
+        .boot_params    = 0x00000100,
+        .init_machine   = ls_hgl_init,
+        .map_io         = orion5x_map_io,
+        .init_irq       = orion5x_init_irq,
+        .timer          = &orion5x_timer,
+        .fixup          = tag_fixup_mem32,
+MACHINE_END
diff --git a/arch/arm/mach-orion5x/lsmini-setup.c b/arch/arm/mach-orion5x/lsmini-setup.c
index c9bf6b81a80d..c704f056de1e 100644
--- a/arch/arm/mach-orion5x/lsmini-setup.c
+++ b/arch/arm/mach-orion5x/lsmini-setup.c
@@ -11,7 +11,6 @@
 #include <linux/kernel.h>
 #include <linux/init.h>
 #include <linux/platform_device.h>
-#include <linux/pci.h>
 #include <linux/mtd/physmap.h>
 #include <linux/mv643xx_eth.h>
 #include <linux/leds.h>
@@ -19,12 +18,13 @@
 #include <linux/input.h>
 #include <linux/i2c.h>
 #include <linux/ata_platform.h>
-#include <asm/mach-types.h>
 #include <linux/gpio.h>
+#include <asm/mach-types.h>
 #include <asm/mach/arch.h>
+#include <asm/system.h>
+#include <mach/orion5x.h>
 #include "common.h"
 #include "mpp.h"
-#include "include/mach/system.h"
 
 /*****************************************************************************
  * Linkstation Mini Info
@@ -186,7 +186,7 @@ static struct mv_sata_platform_data lsmini_sata_data = {
 
 static void lsmini_power_off(void)
 {
-        arch_reset(0, NULL);
+        arm_machine_restart('h', NULL);
 }
 
 
diff --git a/arch/arm/mach-pxa/Kconfig b/arch/arm/mach-pxa/Kconfig
index dee92182749b..38fbd0a0e402 100644
--- a/arch/arm/mach-pxa/Kconfig
+++ b/arch/arm/mach-pxa/Kconfig
@@ -115,6 +115,11 @@ config MACH_CM_X300
         select CPU_PXA310
         select HAVE_PWM
 
+config MACH_CAPC7117
+        bool "Embedian CAPC-7117 evaluation kit based on the MXM-8x10 CoM"
+        select CPU_PXA320
+        select PXA3xx
+
 config ARCH_GUMSTIX
         bool "Gumstix XScale 255 boards"
         select PXA25x
@@ -417,6 +422,24 @@ config MACH_TREO680
           Say Y here if you intend to run this kernel on Palm Treo 680
           smartphone.
 
+config MACH_RAUMFELD_RC
+        bool "Raumfeld Controller"
+        select PXA3xx
+        select CPU_PXA300
+        select HAVE_PWM
+
+config MACH_RAUMFELD_CONNECTOR
+        bool "Raumfeld Connector"
+        select PXA3xx
+        select CPU_PXA300
+        select PXA_SSP
+
+config MACH_RAUMFELD_SPEAKER
+        bool "Raumfeld Speaker"
+        select PXA3xx
+        select CPU_PXA300
+        select PXA_SSP
+
 config PXA_SHARPSL
         bool "SHARP Zaurus SL-5600, SL-C7xx and SL-Cxx00 Models"
         select SHARP_SCOOP
@@ -435,6 +458,7 @@ config SHARPSL_PM
 config CORGI_SSP_DEPRECATED
         bool
         select PXA_SSP
+        select PXA_SSP_LEGACY
         help
           This option will include corgi_ssp.c and corgi_lcd.c
           that corgi_ts.c and other legacy drivers (corgi_bl.c
@@ -446,6 +470,7 @@ config MACH_POODLE
         select PXA25x
         select SHARP_LOCOMO
         select PXA_SSP
+        select PXA_HAVE_BOARD_IRQS
 
 config MACH_CORGI
         bool "Enable Sharp SL-C700 (Corgi) Support"
@@ -492,6 +517,11 @@ config MACH_TOSA
         select PXA25x
         select PXA_HAVE_BOARD_IRQS
 
+config MACH_ICONTROL
+        bool "TMT iControl/SafeTCam based on the MXM-8x10 CoM"
+        select CPU_PXA320
+        select PXA3xx
+
 config ARCH_PXA_ESERIES
         bool "PXA based Toshiba e-series PDAs"
         select PXA25x
@@ -629,6 +659,11 @@ config PXA_SSP
         help
           Enable support for PXA2xx SSP ports
 
+config PXA_SSP_LEGACY
+        bool
+        help
+          Support of legacy SSP API
+
 config TOSA_BT
         tristate "Control the state of built-in bluetooth chip on Sharp SL-6000"
         depends on MACH_TOSA
diff --git a/arch/arm/mach-pxa/Makefile b/arch/arm/mach-pxa/Makefile
index f64afda7e6f6..86bc87b7f2dd 100644
--- a/arch/arm/mach-pxa/Makefile
+++ b/arch/arm/mach-pxa/Makefile
@@ -48,6 +48,7 @@ obj-$(CONFIG_MACH_ARMCORE)	+= cm-x2xx-pci.o
 endif
 obj-$(CONFIG_MACH_EM_X270)      += em-x270.o
 obj-$(CONFIG_MACH_CM_X300)      += cm-x300.o
+obj-$(CONFIG_MACH_CAPC7117)     += capc7117.o mxm8x10.o
 obj-$(CONFIG_ARCH_GUMSTIX)      += gumstix.o
 obj-$(CONFIG_GUMSTIX_AM200EPD)  += am200epd.o
 obj-$(CONFIG_GUMSTIX_AM300EPD)  += am300epd.o
@@ -82,6 +83,7 @@ obj-$(CONFIG_PXA_SHARP_Cxx00)	+= spitz.o sharpsl_pm.o spitz_pm.o
 obj-$(CONFIG_CORGI_SSP_DEPRECATED)      += corgi_ssp.o corgi_lcd.o
 obj-$(CONFIG_MACH_POODLE)       += poodle.o
 obj-$(CONFIG_MACH_TOSA)         += tosa.o
+obj-$(CONFIG_MACH_ICONTROL)     += icontrol.o mxm8x10.o
 obj-$(CONFIG_ARCH_PXA_ESERIES)  += eseries.o
 obj-$(CONFIG_MACH_E330)         += e330.o
 obj-$(CONFIG_MACH_E350)         += e350.o
@@ -89,6 +91,9 @@ obj-$(CONFIG_MACH_E740)		+= e740.o
 obj-$(CONFIG_MACH_E750)         += e750.o
 obj-$(CONFIG_MACH_E400)         += e400.o
 obj-$(CONFIG_MACH_E800)         += e800.o
+obj-$(CONFIG_MACH_RAUMFELD_RC)          += raumfeld.o
+obj-$(CONFIG_MACH_RAUMFELD_CONNECTOR)   += raumfeld.o
+obj-$(CONFIG_MACH_RAUMFELD_SPEAKER)     += raumfeld.o
 
 # Support for blinky lights
 led-y := leds.o
diff --git a/arch/arm/mach-pxa/am300epd.c b/arch/arm/mach-pxa/am300epd.c
index 4bd10a17332e..993d75e66390 100644
--- a/arch/arm/mach-pxa/am300epd.c
+++ b/arch/arm/mach-pxa/am300epd.c
@@ -288,7 +288,7 @@ int __init am300_init(void)
 }
 
 module_param(panel_type, uint, 0);
-MODULE_PARM_DESC(panel_type, "Select the panel type: 6, 8, 97");
+MODULE_PARM_DESC(panel_type, "Select the panel type: 37, 6, 97");
 
 MODULE_DESCRIPTION("board driver for am300 epd kit");
 MODULE_AUTHOR("Jaya Kumar");
diff --git a/arch/arm/mach-pxa/balloon3.c b/arch/arm/mach-pxa/balloon3.c
index b8cd07ca9380..f3b5ace815e5 100644
--- a/arch/arm/mach-pxa/balloon3.c
+++ b/arch/arm/mach-pxa/balloon3.c
@@ -132,6 +132,14 @@ static void __init balloon3_init_irq(void)
                 "enabled\n", __func__, BALLOON3_AUX_NIRQ);
 }
 
+static unsigned long balloon3_ac97_pin_config[] = {
+        GPIO28_AC97_BITCLK,
+        GPIO29_AC97_SDATA_IN_0,
+        GPIO30_AC97_SDATA_OUT,
+        GPIO31_AC97_SYNC,
+        GPIO113_AC97_nRESET,
+};
+
 static void balloon3_backlight_power(int on)
 {
         pr_debug("%s: power is %s\n", __func__, on ? "on" : "off");
@@ -140,26 +148,7 @@ static void balloon3_backlight_power(int on)
 
 static unsigned long balloon3_lcd_pin_config[] = {
         /* LCD - 16bpp Active TFT */
-        GPIO58_LCD_LDD_0,
-        GPIO59_LCD_LDD_1,
-        GPIO60_LCD_LDD_2,
-        GPIO61_LCD_LDD_3,
-        GPIO62_LCD_LDD_4,
-        GPIO63_LCD_LDD_5,
-        GPIO64_LCD_LDD_6,
-        GPIO65_LCD_LDD_7,
-        GPIO66_LCD_LDD_8,
-        GPIO67_LCD_LDD_9,
-        GPIO68_LCD_LDD_10,
-        GPIO69_LCD_LDD_11,
-        GPIO70_LCD_LDD_12,
-        GPIO71_LCD_LDD_13,
-        GPIO72_LCD_LDD_14,
-        GPIO73_LCD_LDD_15,
-        GPIO74_LCD_FCLK,
-        GPIO75_LCD_LCLK,
-        GPIO76_LCD_PCLK,
-        GPIO77_LCD_BIAS,
+        GPIOxx_LCD_TFT_16BPP,
 
         GPIO99_GPIO,            /* Backlight */
 };
@@ -311,8 +300,10 @@ static void __init balloon3_init(void)
         pxa_set_stuart_info(NULL);
 
         pxa_set_i2c_info(NULL);
-        if (balloon3_has(BALLOON3_FEATURE_AUDIO))
+        if (balloon3_has(BALLOON3_FEATURE_AUDIO)) {
+                pxa2xx_mfp_config(ARRAY_AND_SIZE(balloon3_ac97_pin_config));
                 pxa_set_ac97_info(NULL);
+        }
 
         if (balloon3_has(BALLOON3_FEATURE_TOPPOLY)) {
                 pxa2xx_mfp_config(ARRAY_AND_SIZE(balloon3_lcd_pin_config));
diff --git a/arch/arm/mach-pxa/capc7117.c b/arch/arm/mach-pxa/capc7117.c
new file mode 100644
index 000000000000..aae544631a8b
--- /dev/null
+++ b/arch/arm/mach-pxa/capc7117.c
@@ -0,0 +1,158 @@
+/*
+ * linux/arch/arm/mach-pxa/capc7117.c
+ *
+ * Support for the Embedian CAPC-7117 Evaluation Kit
+ * based on the Embedian MXM-8x10 Computer on Module
+ *
+ * Copyright (C) 2009 Embedian Inc.
+ * Copyright (C) 2009 TMT Services & Supplies (Pty) Ltd.
+ *
+ * 2007-09-04: eric miao <eric.y.miao@gmail.com>
+ *             rewrite to align with latest kernel
+ *
+ * 2010-01-09: Edwin Peer <epeer@tmtservices.co.za>
+ *             Hennie van der Merwe <hvdmerwe@tmtservices.co.za>
+ *             rework for upstream merge
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/irq.h>
+#include <linux/platform_device.h>
+#include <linux/ata_platform.h>
+#include <linux/serial_8250.h>
+#include <linux/gpio.h>
+
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+
+#include <mach/pxa320.h>
+#include <mach/mxm8x10.h>
+
+#include "generic.h"
+
+/* IDE (PATA) Support */
+static struct pata_platform_info pata_platform_data = {
+        .ioport_shift = 1
+};
+
+static struct resource capc7117_ide_resources[] = {
+        [0] = {
+               .start = 0x11000020,
+               .end = 0x1100003f,
+               .flags = IORESOURCE_MEM
+        },
+        [1] = {
+               .start = 0x1100001c,
+               .end = 0x1100001c,
+               .flags = IORESOURCE_MEM
+        },
+        [2] = {
+               .start = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO76)),
+               .end = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO76)),
+               .flags = IORESOURCE_IRQ | IRQF_TRIGGER_RISING
+        }
+};
+
+static struct platform_device capc7117_ide_device = {
+        .name = "pata_platform",
+        .num_resources = ARRAY_SIZE(capc7117_ide_resources),
+        .resource = capc7117_ide_resources,
+        .dev = {
+                .platform_data = &pata_platform_data,
+                .coherent_dma_mask = ~0         /* grumble */
+        }
+};
+
+static void __init capc7117_ide_init(void)
+{
+        platform_device_register(&capc7117_ide_device);
+}
+
+/* TI16C752 UART support */
+#define TI16C752_FLAGS          (UPF_BOOT_AUTOCONF | \
+                                        UPF_IOREMAP | \
+                                        UPF_BUGGY_UART | \
+                                        UPF_SKIP_TEST)
+#define TI16C752_UARTCLK        (22118400)
+static struct plat_serial8250_port ti16c752_platform_data[] = {
+        [0] = {
+               .mapbase = 0x14000000,
+               .irq = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO78)),
+               .irqflags = IRQF_TRIGGER_RISING,
+               .flags = TI16C752_FLAGS,
+               .iotype = UPIO_MEM,
+               .regshift = 1,
+               .uartclk = TI16C752_UARTCLK
+        },
+        [1] = {
+               .mapbase = 0x14000040,
+               .irq = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO79)),
+               .irqflags = IRQF_TRIGGER_RISING,
+               .flags = TI16C752_FLAGS,
+               .iotype = UPIO_MEM,
+               .regshift = 1,
+               .uartclk = TI16C752_UARTCLK
+        },
+        [2] = {
+               .mapbase = 0x14000080,
+               .irq = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO80)),
+               .irqflags = IRQF_TRIGGER_RISING,
+               .flags = TI16C752_FLAGS,
+               .iotype = UPIO_MEM,
+               .regshift = 1,
+               .uartclk = TI16C752_UARTCLK
+        },
+        [3] = {
+               .mapbase = 0x140000c0,
+               .irq = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO81)),
+               .irqflags = IRQF_TRIGGER_RISING,
+               .flags = TI16C752_FLAGS,
+               .iotype = UPIO_MEM,
+               .regshift = 1,
+               .uartclk = TI16C752_UARTCLK
+        },
+        [4] = {
+               /* end of array */
+        }
+};
+
+static struct platform_device ti16c752_device = {
+        .name = "serial8250",
+        .id = PLAT8250_DEV_PLATFORM,
+        .dev = {
+                .platform_data = ti16c752_platform_data
+        }
+};
+
+static void __init capc7117_uarts_init(void)
+{
+        platform_device_register(&ti16c752_device);
+}
+
+static void __init capc7117_init(void)
+{
+        /* Init CoM */
+        mxm_8x10_barebones_init();
+
+        /* Init evaluation board peripherals */
+        mxm_8x10_ac97_init();
+        mxm_8x10_usb_host_init();
+        mxm_8x10_mmc_init();
+
+        capc7117_uarts_init();
+        capc7117_ide_init();
+}
+
+MACHINE_START(CAPC7117,
+              "Embedian CAPC-7117 evaluation kit based on the MXM-8x10 CoM")
+        .phys_io = 0x40000000,
+        .boot_params = 0xa0000100,
+        .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
+        .map_io = pxa_map_io,
+        .init_irq = pxa3xx_init_irq,
+        .timer = &pxa_timer,
+        .init_machine = capc7117_init
+MACHINE_END
diff --git a/arch/arm/mach-pxa/cm-x255.c b/arch/arm/mach-pxa/cm-x255.c
index 253fd76142d6..f1a7703d771b 100644
--- a/arch/arm/mach-pxa/cm-x255.c
+++ b/arch/arm/mach-pxa/cm-x255.c
@@ -50,26 +50,7 @@ static unsigned long cmx255_pin_config[] = {
         GPIO47_STUART_TXD,
 
         /* LCD */
-        GPIO58_LCD_LDD_0,
-        GPIO59_LCD_LDD_1,
-        GPIO60_LCD_LDD_2,
-        GPIO61_LCD_LDD_3,
-        GPIO62_LCD_LDD_4,
-        GPIO63_LCD_LDD_5,
-        GPIO64_LCD_LDD_6,
-        GPIO65_LCD_LDD_7,
-        GPIO66_LCD_LDD_8,
-        GPIO67_LCD_LDD_9,
-        GPIO68_LCD_LDD_10,
-        GPIO69_LCD_LDD_11,
-        GPIO70_LCD_LDD_12,
-        GPIO71_LCD_LDD_13,
-        GPIO72_LCD_LDD_14,
-        GPIO73_LCD_LDD_15,
-        GPIO74_LCD_FCLK,
-        GPIO75_LCD_LCLK,
-        GPIO76_LCD_PCLK,
-        GPIO77_LCD_BIAS,
+        GPIOxx_LCD_TFT_16BPP,
 
         /* SSP1 */
         GPIO23_SSP1_SCLK,
diff --git a/arch/arm/mach-pxa/cm-x270.c b/arch/arm/mach-pxa/cm-x270.c
index eea78b6c2bc5..a9926bb75922 100644
--- a/arch/arm/mach-pxa/cm-x270.c
+++ b/arch/arm/mach-pxa/cm-x270.c
@@ -71,26 +71,7 @@ static unsigned long cmx270_pin_config[] = {
         GPIO111_MMC_DAT_3,
 
         /* LCD */
-        GPIO58_LCD_LDD_0,
-        GPIO59_LCD_LDD_1,
-        GPIO60_LCD_LDD_2,
-        GPIO61_LCD_LDD_3,
-        GPIO62_LCD_LDD_4,
-        GPIO63_LCD_LDD_5,
-        GPIO64_LCD_LDD_6,
-        GPIO65_LCD_LDD_7,
-        GPIO66_LCD_LDD_8,
-        GPIO67_LCD_LDD_9,
-        GPIO68_LCD_LDD_10,
-        GPIO69_LCD_LDD_11,
-        GPIO70_LCD_LDD_12,
-        GPIO71_LCD_LDD_13,
-        GPIO72_LCD_LDD_14,
-        GPIO73_LCD_LDD_15,
-        GPIO74_LCD_FCLK,
-        GPIO75_LCD_LCLK,
-        GPIO76_LCD_PCLK,
-        GPIO77_LCD_BIAS,
+        GPIOxx_LCD_TFT_16BPP,
 
         /* I2C */
         GPIO117_I2C_SCL,
@@ -195,33 +176,57 @@ static struct resource cmx270_2700G_resource[] = {
         },
 };
 
-static unsigned long save_lcd_regs[10];
+static unsigned long cmx270_marathon_on[] = {
+        GPIO58_GPIO,
+        GPIO59_GPIO,
+        GPIO60_GPIO,
+        GPIO61_GPIO,
+        GPIO62_GPIO,
+        GPIO63_GPIO,
+        GPIO64_GPIO,
+        GPIO65_GPIO,
+        GPIO66_GPIO,
+        GPIO67_GPIO,
+        GPIO68_GPIO,
+        GPIO69_GPIO,
+        GPIO70_GPIO,
+        GPIO71_GPIO,
+        GPIO72_GPIO,
+        GPIO73_GPIO,
+        GPIO74_GPIO,
+        GPIO75_GPIO,
+        GPIO76_GPIO,
+        GPIO77_GPIO,
+};
+
+static unsigned long cmx270_marathon_off[] = {
+        GPIOxx_LCD_TFT_16BPP,
+};
 
 static int cmx270_marathon_probe(struct fb_info *fb)
 {
-        /* save PXA-270 pin settings before enabling 2700G */
-        save_lcd_regs[0] = GPDR1;
-        save_lcd_regs[1] = GPDR2;
-        save_lcd_regs[2] = GAFR1_U;
-        save_lcd_regs[3] = GAFR2_L;
-        save_lcd_regs[4] = GAFR2_U;
-
-        /* Disable PXA-270 on-chip controller driving pins */
-        GPDR1 &= ~(0xfc000000);
-        GPDR2 &= ~(0x00c03fff);
-        GAFR1_U &= ~(0xfff00000);
-        GAFR2_L &= ~(0x0fffffff);
-        GAFR2_U &= ~(0x0000f000);
+        int gpio, err;
+
+        for (gpio = 58; gpio <= 77; gpio++) {
+                err = gpio_request(gpio, "LCD");
+                if (err)
+                        return err;
+                gpio_direction_input(gpio);
+        }
+
+        pxa2xx_mfp_config(ARRAY_AND_SIZE(cmx270_marathon_on));
         return 0;
 }
 
 static int cmx270_marathon_remove(struct fb_info *fb)
 {
-        GPDR1 =   save_lcd_regs[0];
-        GPDR2 =   save_lcd_regs[1];
-        GAFR1_U = save_lcd_regs[2];
-        GAFR2_L = save_lcd_regs[3];
-        GAFR2_U = save_lcd_regs[4];
+        int gpio;
+
+        pxa2xx_mfp_config(ARRAY_AND_SIZE(cmx270_marathon_off));
+
+        for (gpio = 58; gpio <= 77; gpio++)
+                gpio_free(gpio);
+
         return 0;
 }
 
diff --git a/arch/arm/mach-pxa/cm-x2xx-pci.c b/arch/arm/mach-pxa/cm-x2xx-pci.c
index 7873fa3d8fa4..161fc2d61207 100644
--- a/arch/arm/mach-pxa/cm-x2xx-pci.c
+++ b/arch/arm/mach-pxa/cm-x2xx-pci.c
@@ -59,7 +59,7 @@ void __init cmx2xx_pci_adjust_zones(int node, unsigned long *zone_size,
 static void cmx2xx_it8152_irq_demux(unsigned int irq, struct irq_desc *desc)
 {
         /* clear our parent irq */
-        GEDR(cmx2xx_it8152_irq_gpio) = GPIO_bit(cmx2xx_it8152_irq_gpio);
+        desc->chip->ack(irq);
 
         it8152_irq_demux(irq, desc);
 }
diff --git a/arch/arm/mach-pxa/e740.c b/arch/arm/mach-pxa/e740.c
index 94b23a9e3877..d578021d1a10 100644
--- a/arch/arm/mach-pxa/e740.c
+++ b/arch/arm/mach-pxa/e740.c
@@ -134,6 +134,12 @@ static unsigned long e740_pin_config[] __initdata = {
         /* IrDA */
         GPIO38_GPIO | MFP_LPM_DRIVE_HIGH,
 
+        /* AC97 */
+        GPIO28_AC97_BITCLK,
+        GPIO29_AC97_SDATA_IN_0,
+        GPIO30_AC97_SDATA_OUT,
+        GPIO31_AC97_SYNC,
+
         /* Audio power control */
         GPIO16_GPIO,  /* AC97 codec AVDD2 supply (analogue power) */
         GPIO40_GPIO,  /* Mic amp power */
diff --git a/arch/arm/mach-pxa/e750.c b/arch/arm/mach-pxa/e750.c
index 5eccbce73a33..af83caa52dd4 100644
--- a/arch/arm/mach-pxa/e750.c
+++ b/arch/arm/mach-pxa/e750.c
@@ -132,6 +132,12 @@ static unsigned long e750_pin_config[] __initdata = {
         /* IrDA */
         GPIO38_GPIO | MFP_LPM_DRIVE_HIGH,
 
+        /* AC97 */
+        GPIO28_AC97_BITCLK,
+        GPIO29_AC97_SDATA_IN_0,
+        GPIO30_AC97_SDATA_OUT,
+        GPIO31_AC97_SYNC,
+
         /* Audio power control */
         GPIO4_GPIO,  /* Headphone amp power */
         GPIO7_GPIO,  /* Speaker amp power */
diff --git a/arch/arm/mach-pxa/e800.c b/arch/arm/mach-pxa/e800.c
index aad129bed199..8ea97bf53fe1 100644
--- a/arch/arm/mach-pxa/e800.c
+++ b/arch/arm/mach-pxa/e800.c
@@ -35,6 +35,14 @@
 
 /* ------------------------ e800 LCD definitions ------------------------- */
 
+static unsigned long e800_pin_config[] __initdata = {
+        /* AC97 */
+        GPIO28_AC97_BITCLK,
+        GPIO29_AC97_SDATA_IN_0,
+        GPIO30_AC97_SDATA_OUT,
+        GPIO31_AC97_SYNC,
+};
+
 static struct w100_gen_regs e800_lcd_regs = {
         .lcd_format =            0x00008003,
         .lcdd_cntl1 =            0x02a00000,
@@ -195,6 +203,7 @@ static struct platform_device *devices[] __initdata = {
 
 static void __init e800_init(void)
 {
+        pxa2xx_mfp_config(ARRAY_AND_SIZE(e800_pin_config));
         pxa_set_ffuart_info(NULL);
         pxa_set_btuart_info(NULL);
         pxa_set_stuart_info(NULL);
diff --git a/arch/arm/mach-pxa/em-x270.c b/arch/arm/mach-pxa/em-x270.c
index c8a01bc85fde..aab04f33e49b 100644
--- a/arch/arm/mach-pxa/em-x270.c
+++ b/arch/arm/mach-pxa/em-x270.c
@@ -109,26 +109,7 @@ static unsigned long common_pin_config[] = {
         GPIO111_MMC_DAT_3,
 
         /* LCD */
-        GPIO58_LCD_LDD_0,
-        GPIO59_LCD_LDD_1,
-        GPIO60_LCD_LDD_2,
-        GPIO61_LCD_LDD_3,
-        GPIO62_LCD_LDD_4,
-        GPIO63_LCD_LDD_5,
-        GPIO64_LCD_LDD_6,
-        GPIO65_LCD_LDD_7,
-        GPIO66_LCD_LDD_8,
-        GPIO67_LCD_LDD_9,
-        GPIO68_LCD_LDD_10,
-        GPIO69_LCD_LDD_11,
-        GPIO70_LCD_LDD_12,
-        GPIO71_LCD_LDD_13,
-        GPIO72_LCD_LDD_14,
-        GPIO73_LCD_LDD_15,
-        GPIO74_LCD_FCLK,
-        GPIO75_LCD_LCLK,
-        GPIO76_LCD_PCLK,
-        GPIO77_LCD_BIAS,
+        GPIOxx_LCD_TFT_16BPP,
 
         /* QCI */
         GPIO84_CIF_FV,
diff --git a/arch/arm/mach-pxa/icontrol.c b/arch/arm/mach-pxa/icontrol.c
new file mode 100644
index 000000000000..771137fc1a82
--- /dev/null
+++ b/arch/arm/mach-pxa/icontrol.c
@@ -0,0 +1,202 @@
+/*
+ * linux/arch/arm/mach-pxa/icontrol.c
+ *
+ * Support for the iControl and SafeTcam platforms from TMT Services
+ * using the Embedian MXM-8x10 Computer on Module
+ *
+ * Copyright (C) 2009 TMT Services & Supplies (Pty) Ltd.
+ *
+ * 2010-01-21 Hennie van der Merve <hvdmerwe@tmtservies.co.za>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/irq.h>
+#include <linux/platform_device.h>
+#include <linux/gpio.h>
+
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+
+#include <mach/pxa320.h>
+#include <mach/mxm8x10.h>
+
+#include <linux/spi/spi.h>
+#include <mach/pxa2xx_spi.h>
+#include <linux/can/platform/mcp251x.h>
+
+#include "generic.h"
+
+#define ICONTROL_MCP251x_nCS1   (15)
+#define ICONTROL_MCP251x_nCS2   (16)
+#define ICONTROL_MCP251x_nCS3   (17)
+#define ICONTROL_MCP251x_nCS4   (24)
+
+#define ICONTROL_MCP251x_nIRQ1  (74)
+#define ICONTROL_MCP251x_nIRQ2  (75)
+#define ICONTROL_MCP251x_nIRQ3  (76)
+#define ICONTROL_MCP251x_nIRQ4  (77)
+
+static struct pxa2xx_spi_chip mcp251x_chip_info1 = {
+        .tx_threshold   = 8,
+        .rx_threshold   = 128,
+        .dma_burst_size = 8,
+        .timeout        = 235,
+        .gpio_cs        = ICONTROL_MCP251x_nCS1
+};
+
+static struct pxa2xx_spi_chip mcp251x_chip_info2 = {
+        .tx_threshold   = 8,
+        .rx_threshold   = 128,
+        .dma_burst_size = 8,
+        .timeout        = 235,
+        .gpio_cs        = ICONTROL_MCP251x_nCS2
+};
+
+static struct pxa2xx_spi_chip mcp251x_chip_info3 = {
+        .tx_threshold   = 8,
+        .rx_threshold   = 128,
+        .dma_burst_size = 8,
+        .timeout        = 235,
+        .gpio_cs        = ICONTROL_MCP251x_nCS3
+};
+
+static struct pxa2xx_spi_chip mcp251x_chip_info4 = {
+        .tx_threshold   = 8,
+        .rx_threshold   = 128,
+        .dma_burst_size = 8,
+        .timeout        = 235,
+        .gpio_cs        = ICONTROL_MCP251x_nCS4
+};
+
+static struct mcp251x_platform_data mcp251x_info = {
+        .oscillator_frequency = 16E6,
+        .model                = CAN_MCP251X_MCP2515,
+        .board_specific_setup = NULL,
+        .power_enable         = NULL,
+        .transceiver_enable   = NULL
+};
+
+static struct spi_board_info mcp251x_board_info[] = {
+        {
+                .modalias        = "mcp251x",
+                .max_speed_hz    = 6500000,
+                .bus_num         = 3,
+                .chip_select     = 0,
+                .platform_data   = &mcp251x_info,
+                .controller_data = &mcp251x_chip_info1,
+                .irq             = gpio_to_irq(ICONTROL_MCP251x_nIRQ1)
+        },
+        {
+                .modalias        = "mcp251x",
+                .max_speed_hz    = 6500000,
+                .bus_num         = 3,
+                .chip_select     = 1,
+                .platform_data   = &mcp251x_info,
+                .controller_data = &mcp251x_chip_info2,
+                .irq             = gpio_to_irq(ICONTROL_MCP251x_nIRQ2)
+        },
+        {
+                .modalias        = "mcp251x",
+                .max_speed_hz    = 6500000,
+                .bus_num         = 4,
+                .chip_select     = 0,
+                .platform_data   = &mcp251x_info,
+                .controller_data = &mcp251x_chip_info3,
+                .irq             = gpio_to_irq(ICONTROL_MCP251x_nIRQ3)
+        },
+        {
+                .modalias        = "mcp251x",
+                .max_speed_hz    = 6500000,
+                .bus_num         = 4,
+                .chip_select     = 1,
+                .platform_data   = &mcp251x_info,
+                .controller_data = &mcp251x_chip_info4,
+                .irq             = gpio_to_irq(ICONTROL_MCP251x_nIRQ4)
+        }
+};
+
+static struct pxa2xx_spi_master pxa_ssp3_spi_master_info = {
+        .clock_enable   = CKEN_SSP3,
+        .num_chipselect = 2,
+        .enable_dma     = 1
+};
+
+static struct pxa2xx_spi_master pxa_ssp4_spi_master_info = {
+        .clock_enable   = CKEN_SSP4,
+        .num_chipselect = 2,
+        .enable_dma     = 1
+};
+
+struct platform_device pxa_spi_ssp3 = {
+        .name          = "pxa2xx-spi",
+        .id            = 3,
+        .dev           = {
+                .platform_data = &pxa_ssp3_spi_master_info,
+        }
+};
+
+struct platform_device pxa_spi_ssp4 = {
+        .name          = "pxa2xx-spi",
+        .id            = 4,
+        .dev           = {
+                .platform_data = &pxa_ssp4_spi_master_info,
+        }
+};
+
+static struct platform_device *icontrol_spi_devices[] __initdata = {
+        &pxa_spi_ssp3,
+        &pxa_spi_ssp4,
+};
+
+static mfp_cfg_t mfp_can_cfg[] __initdata = {
+        /* CAN CS lines */
+        GPIO15_GPIO,
+        GPIO16_GPIO,
+        GPIO17_GPIO,
+        GPIO24_GPIO,
+
+        /* SPI (SSP3) lines */
+        GPIO89_SSP3_SCLK,
+        GPIO91_SSP3_TXD,
+        GPIO92_SSP3_RXD,
+
+        /* SPI (SSP4) lines */
+        GPIO93_SSP4_SCLK,
+        GPIO95_SSP4_TXD,
+        GPIO96_SSP4_RXD,
+
+        /* CAN nIRQ lines */
+        GPIO74_GPIO | MFP_LPM_EDGE_RISE,
+        GPIO75_GPIO | MFP_LPM_EDGE_RISE,
+        GPIO76_GPIO | MFP_LPM_EDGE_RISE,
+        GPIO77_GPIO | MFP_LPM_EDGE_RISE
+};
+
+static void __init icontrol_can_init(void)
+{
+        pxa3xx_mfp_config(ARRAY_AND_SIZE(mfp_can_cfg));
+        platform_add_devices(ARRAY_AND_SIZE(icontrol_spi_devices));
+        spi_register_board_info(ARRAY_AND_SIZE(mcp251x_board_info));
+}
+
+static void __init icontrol_init(void)
+{
+        mxm_8x10_barebones_init();
+        mxm_8x10_usb_host_init();
+        mxm_8x10_mmc_init();
+
+        icontrol_can_init();
+}
+
+MACHINE_START(ICONTROL, "iControl/SafeTcam boards using Embedian MXM-8x10 CoM")
+        .phys_io        = 0x40000000,
+        .boot_params    = 0xa0000100,
+        .io_pg_offst    = (io_p2v(0x40000000) >> 18) & 0xfffc,
+        .map_io         = pxa_map_io,
+        .init_irq       = pxa3xx_init_irq,
+        .timer          = &pxa_timer,
+        .init_machine   = icontrol_init
+MACHINE_END
diff --git a/arch/arm/mach-pxa/idp.c b/arch/arm/mach-pxa/idp.c
index 5c9e11d74f49..bc78c4dc0c66 100644
--- a/arch/arm/mach-pxa/idp.c
+++ b/arch/arm/mach-pxa/idp.c
@@ -47,25 +47,7 @@
 
 static unsigned long idp_pin_config[] __initdata = {
         /* LCD */
-        GPIO58_LCD_LDD_0,
-        GPIO59_LCD_LDD_1,
-        GPIO60_LCD_LDD_2,
-        GPIO61_LCD_LDD_3,
-        GPIO62_LCD_LDD_4,
-        GPIO63_LCD_LDD_5,
-        GPIO64_LCD_LDD_6,
-        GPIO65_LCD_LDD_7,
-        GPIO66_LCD_LDD_8,
-        GPIO67_LCD_LDD_9,
-        GPIO68_LCD_LDD_10,
-        GPIO69_LCD_LDD_11,
-        GPIO70_LCD_LDD_12,
-        GPIO71_LCD_LDD_13,
-        GPIO72_LCD_LDD_14,
-        GPIO73_LCD_LDD_15,
-        GPIO74_LCD_FCLK,
-        GPIO75_LCD_LCLK,
-        GPIO76_LCD_PCLK,
+        GPIOxx_LCD_DSTN_16BPP,
 
         /* BTUART */
         GPIO42_BTUART_RXD,
diff --git a/arch/arm/mach-pxa/imote2.c b/arch/arm/mach-pxa/imote2.c
index 5b0862df61ab..b2f878bd460b 100644
--- a/arch/arm/mach-pxa/imote2.c
+++ b/arch/arm/mach-pxa/imote2.c
@@ -64,7 +64,6 @@ static unsigned long imote2_pin_config[] __initdata = {
         GPIO116_GPIO,                   /* CC_CCA */
         GPIO0_GPIO,                     /* CC_FIFOP */
         GPIO16_GPIO,                    /* CCSFD */
-        GPIO39_GPIO,                    /* CSn */
         GPIO115_GPIO,                   /* Power enable */
 
         /* I2C */
@@ -72,7 +71,7 @@ static unsigned long imote2_pin_config[] __initdata = {
         GPIO118_I2C_SDA,
 
         /* SSP 3 - 802.15.4 radio */
-        GPIO39_GPIO,                    /* Chip Select */
+        GPIO39_GPIO,                    /* Chip Select */
         GPIO34_SSP3_SCLK,
         GPIO35_SSP3_TXD,
         GPIO41_SSP3_RXD,
diff --git a/arch/arm/mach-pxa/include/mach/balloon3.h b/arch/arm/mach-pxa/include/mach/balloon3.h
index bfec09b1814b..1a741065045f 100644
--- a/arch/arm/mach-pxa/include/mach/balloon3.h
+++ b/arch/arm/mach-pxa/include/mach/balloon3.h
@@ -129,6 +129,16 @@ enum balloon3_features {
 #define CPLD_AROUTING_LOONR2INT_BIT    6
 #define CPLD_AROUTING_LOONR2EXT_BIT    7
 
+/* Balloon3 Interrupts */
+#define BALLOON3_IRQ(x)         (IRQ_BOARD_START + (x))
+
+#define BALLOON3_BP_CF_NRDY_IRQ BALLOON3_IRQ(0)
+#define BALLOON3_BP_NSTSCHG_IRQ BALLOON3_IRQ(1)
+
+#define BALLOON3_AUX_NIRQ       IRQ_GPIO(BALLOON3_GPIO_AUX_NIRQ)
+#define BALLOON3_CODEC_IRQ      IRQ_GPIO(BALLOON3_GPIO_CODEC_IRQ)
+#define BALLOON3_S0_CD_IRQ      IRQ_GPIO(BALLOON3_GPIO_S0_CD)
+
 extern int balloon3_has(enum balloon3_features feature);
 
 #endif
diff --git a/arch/arm/mach-pxa/include/mach/hardware.h b/arch/arm/mach-pxa/include/mach/hardware.h
index e741bf1bfb2d..7515757d6911 100644
--- a/arch/arm/mach-pxa/include/mach/hardware.h
+++ b/arch/arm/mach-pxa/include/mach/hardware.h
@@ -314,7 +314,6 @@ extern unsigned long get_clock_tick_rate(void);
 #define PCIBIOS_MIN_IO          0
 #define PCIBIOS_MIN_MEM         0
 #define pcibios_assign_all_busses()     1
-#define HAVE_ARCH_PCI_SET_DMA_MASK      1
 #endif
 
 
diff --git a/arch/arm/mach-pxa/include/mach/irqs.h b/arch/arm/mach-pxa/include/mach/irqs.h
index 3677a9af9c87..ffc8314520f2 100644
--- a/arch/arm/mach-pxa/include/mach/irqs.h
+++ b/arch/arm/mach-pxa/include/mach/irqs.h
@@ -135,82 +135,6 @@
 #define IRQ_BOARD_END           (IRQ_BOARD_START + 16)
 #endif
 
-#define IRQ_SA1111_START        (IRQ_BOARD_END)
-#define IRQ_GPAIN0              (IRQ_BOARD_END + 0)
-#define IRQ_GPAIN1              (IRQ_BOARD_END + 1)
-#define IRQ_GPAIN2              (IRQ_BOARD_END + 2)
-#define IRQ_GPAIN3              (IRQ_BOARD_END + 3)
-#define IRQ_GPBIN0              (IRQ_BOARD_END + 4)
-#define IRQ_GPBIN1              (IRQ_BOARD_END + 5)
-#define IRQ_GPBIN2              (IRQ_BOARD_END + 6)
-#define IRQ_GPBIN3              (IRQ_BOARD_END + 7)
-#define IRQ_GPBIN4              (IRQ_BOARD_END + 8)
-#define IRQ_GPBIN5              (IRQ_BOARD_END + 9)
-#define IRQ_GPCIN0              (IRQ_BOARD_END + 10)
-#define IRQ_GPCIN1              (IRQ_BOARD_END + 11)
-#define IRQ_GPCIN2              (IRQ_BOARD_END + 12)
-#define IRQ_GPCIN3              (IRQ_BOARD_END + 13)
-#define IRQ_GPCIN4              (IRQ_BOARD_END + 14)
-#define IRQ_GPCIN5              (IRQ_BOARD_END + 15)
-#define IRQ_GPCIN6              (IRQ_BOARD_END + 16)
-#define IRQ_GPCIN7              (IRQ_BOARD_END + 17)
-#define IRQ_MSTXINT             (IRQ_BOARD_END + 18)
-#define IRQ_MSRXINT             (IRQ_BOARD_END + 19)
-#define IRQ_MSSTOPERRINT        (IRQ_BOARD_END + 20)
-#define IRQ_TPTXINT             (IRQ_BOARD_END + 21)
-#define IRQ_TPRXINT             (IRQ_BOARD_END + 22)
-#define IRQ_TPSTOPERRINT        (IRQ_BOARD_END + 23)
-#define SSPXMTINT               (IRQ_BOARD_END + 24)
-#define SSPRCVINT               (IRQ_BOARD_END + 25)
-#define SSPROR                  (IRQ_BOARD_END + 26)
-#define AUDXMTDMADONEA          (IRQ_BOARD_END + 32)
-#define AUDRCVDMADONEA          (IRQ_BOARD_END + 33)
-#define AUDXMTDMADONEB          (IRQ_BOARD_END + 34)
-#define AUDRCVDMADONEB          (IRQ_BOARD_END + 35)
-#define AUDTFSR                 (IRQ_BOARD_END + 36)
-#define AUDRFSR                 (IRQ_BOARD_END + 37)
-#define AUDTUR                  (IRQ_BOARD_END + 38)
-#define AUDROR                  (IRQ_BOARD_END + 39)
-#define AUDDTS                  (IRQ_BOARD_END + 40)
-#define AUDRDD                  (IRQ_BOARD_END + 41)
-#define AUDSTO                  (IRQ_BOARD_END + 42)
-#define IRQ_USBPWR              (IRQ_BOARD_END + 43)
-#define IRQ_HCIM                (IRQ_BOARD_END + 44)
-#define IRQ_HCIBUFFACC          (IRQ_BOARD_END + 45)
-#define IRQ_HCIRMTWKP           (IRQ_BOARD_END + 46)
-#define IRQ_NHCIMFCIR           (IRQ_BOARD_END + 47)
-#define IRQ_USB_PORT_RESUME     (IRQ_BOARD_END + 48)
-#define IRQ_S0_READY_NINT       (IRQ_BOARD_END + 49)
-#define IRQ_S1_READY_NINT       (IRQ_BOARD_END + 50)
-#define IRQ_S0_CD_VALID         (IRQ_BOARD_END + 51)
-#define IRQ_S1_CD_VALID         (IRQ_BOARD_END + 52)
-#define IRQ_S0_BVD1_STSCHG      (IRQ_BOARD_END + 53)
-#define IRQ_S1_BVD1_STSCHG      (IRQ_BOARD_END + 54)
-
-#define IRQ_LOCOMO_START        (IRQ_BOARD_END)
-#define IRQ_LOCOMO_KEY          (IRQ_BOARD_END + 0)
-#define IRQ_LOCOMO_GPIO0        (IRQ_BOARD_END + 1)
-#define IRQ_LOCOMO_GPIO1        (IRQ_BOARD_END + 2)
-#define IRQ_LOCOMO_GPIO2        (IRQ_BOARD_END + 3)
-#define IRQ_LOCOMO_GPIO3        (IRQ_BOARD_END + 4)
-#define IRQ_LOCOMO_GPIO4        (IRQ_BOARD_END + 5)
-#define IRQ_LOCOMO_GPIO5        (IRQ_BOARD_END + 6)
-#define IRQ_LOCOMO_GPIO6        (IRQ_BOARD_END + 7)
-#define IRQ_LOCOMO_GPIO7        (IRQ_BOARD_END + 8)
-#define IRQ_LOCOMO_GPIO8        (IRQ_BOARD_END + 9)
-#define IRQ_LOCOMO_GPIO9        (IRQ_BOARD_END + 10)
-#define IRQ_LOCOMO_GPIO10       (IRQ_BOARD_END + 11)
-#define IRQ_LOCOMO_GPIO11       (IRQ_BOARD_END + 12)
-#define IRQ_LOCOMO_GPIO12       (IRQ_BOARD_END + 13)
-#define IRQ_LOCOMO_GPIO13       (IRQ_BOARD_END + 14)
-#define IRQ_LOCOMO_GPIO14       (IRQ_BOARD_END + 15)
-#define IRQ_LOCOMO_GPIO15       (IRQ_BOARD_END + 16)
-#define IRQ_LOCOMO_LT           (IRQ_BOARD_END + 17)
-#define IRQ_LOCOMO_SPI_RFR      (IRQ_BOARD_END + 18)
-#define IRQ_LOCOMO_SPI_RFW      (IRQ_BOARD_END + 19)
-#define IRQ_LOCOMO_SPI_OVRN     (IRQ_BOARD_END + 20)
-#define IRQ_LOCOMO_SPI_TEND     (IRQ_BOARD_END + 21)
-
 /*
  * Figure out the MAX IRQ number.
  *
@@ -219,89 +143,16 @@
  * Otherwise, we have the standard IRQs only.
  */
 #ifdef CONFIG_SA1111
-#define NR_IRQS                 (IRQ_S1_BVD1_STSCHG + 1)
-#elif defined(CONFIG_SHARP_LOCOMO)
-#define NR_IRQS                 (IRQ_LOCOMO_SPI_TEND + 1)
+#define NR_IRQS                 (IRQ_BOARD_END + 55)
 #elif defined(CONFIG_PXA_HAVE_BOARD_IRQS)
 #define NR_IRQS                 (IRQ_BOARD_END)
 #else
 #define NR_IRQS                 (IRQ_BOARD_START)
 #endif
 
-/*
- * Board specific IRQs.  Define them here.
- * Do not surround them with ifdefs.
- */
-#define LUBBOCK_IRQ(x)          (IRQ_BOARD_START + (x))
-#define LUBBOCK_SD_IRQ          LUBBOCK_IRQ(0)
-#define LUBBOCK_SA1111_IRQ      LUBBOCK_IRQ(1)
-#define LUBBOCK_USB_IRQ         LUBBOCK_IRQ(2)  /* usb connect */
-#define LUBBOCK_ETH_IRQ         LUBBOCK_IRQ(3)
-#define LUBBOCK_UCB1400_IRQ     LUBBOCK_IRQ(4)
-#define LUBBOCK_BB_IRQ          LUBBOCK_IRQ(5)
-#define LUBBOCK_USB_DISC_IRQ    LUBBOCK_IRQ(6)  /* usb disconnect */
-#define LUBBOCK_LAST_IRQ        LUBBOCK_IRQ(6)
-
-#define LPD270_IRQ(x)           (IRQ_BOARD_START + (x))
-#define LPD270_USBC_IRQ         LPD270_IRQ(2)
-#define LPD270_ETHERNET_IRQ     LPD270_IRQ(3)
-#define LPD270_AC97_IRQ         LPD270_IRQ(4)
-
-#define MAINSTONE_IRQ(x)        (IRQ_BOARD_START + (x))
-#define MAINSTONE_MMC_IRQ       MAINSTONE_IRQ(0)
-#define MAINSTONE_USIM_IRQ      MAINSTONE_IRQ(1)
-#define MAINSTONE_USBC_IRQ      MAINSTONE_IRQ(2)
-#define MAINSTONE_ETHERNET_IRQ  MAINSTONE_IRQ(3)
-#define MAINSTONE_AC97_IRQ      MAINSTONE_IRQ(4)
-#define MAINSTONE_PEN_IRQ       MAINSTONE_IRQ(5)
-#define MAINSTONE_MSINS_IRQ     MAINSTONE_IRQ(6)
-#define MAINSTONE_EXBRD_IRQ     MAINSTONE_IRQ(7)
-#define MAINSTONE_S0_CD_IRQ     MAINSTONE_IRQ(9)
-#define MAINSTONE_S0_STSCHG_IRQ MAINSTONE_IRQ(10)
-#define MAINSTONE_S0_IRQ        MAINSTONE_IRQ(11)
-#define MAINSTONE_S1_CD_IRQ     MAINSTONE_IRQ(13)
-#define MAINSTONE_S1_STSCHG_IRQ MAINSTONE_IRQ(14)
-#define MAINSTONE_S1_IRQ        MAINSTONE_IRQ(15)
-
-/* Balloon3 Interrupts */
-#define BALLOON3_IRQ(x)         (IRQ_BOARD_START + (x))
-
-#define BALLOON3_BP_CF_NRDY_IRQ BALLOON3_IRQ(0)
-#define BALLOON3_BP_NSTSCHG_IRQ BALLOON3_IRQ(1)
-
-#define BALLOON3_AUX_NIRQ       IRQ_GPIO(BALLOON3_GPIO_AUX_NIRQ)
-#define BALLOON3_CODEC_IRQ      IRQ_GPIO(BALLOON3_GPIO_CODEC_IRQ)
-#define BALLOON3_S0_CD_IRQ      IRQ_GPIO(BALLOON3_GPIO_S0_CD)
-
-/* LoCoMo Interrupts (CONFIG_SHARP_LOCOMO) */
-#define IRQ_LOCOMO_KEY_BASE     (IRQ_BOARD_START + 0)
-#define IRQ_LOCOMO_GPIO_BASE    (IRQ_BOARD_START + 1)
-#define IRQ_LOCOMO_LT_BASE      (IRQ_BOARD_START + 2)
-#define IRQ_LOCOMO_SPI_BASE     (IRQ_BOARD_START + 3)
-
-/* phyCORE-PXA270 (PCM027) Interrupts */
-#define PCM027_IRQ(x)          (IRQ_BOARD_START + (x))
-#define PCM027_BTDET_IRQ       PCM027_IRQ(0)
-#define PCM027_FF_RI_IRQ       PCM027_IRQ(1)
-#define PCM027_MMCDET_IRQ      PCM027_IRQ(2)
-#define PCM027_PM_5V_IRQ       PCM027_IRQ(3)
-
-/* ITE8152 irqs */
 /* add IT8152 IRQs beyond BOARD_END */
 #ifdef CONFIG_PCI_HOST_ITE8152
-#define IT8152_IRQ(x)   (IRQ_BOARD_END + (x))
-
-/* IRQ-sources in 3 groups - local devices, LPC (serial), and external PCI */
-#define IT8152_LD_IRQ_COUNT     9
-#define IT8152_LP_IRQ_COUNT     16
-#define IT8152_PD_IRQ_COUNT     15
-
-/* Priorities: */
-#define IT8152_PD_IRQ(i)        IT8152_IRQ(i)
-#define IT8152_LP_IRQ(i)        (IT8152_IRQ(i) + IT8152_PD_IRQ_COUNT)
-#define IT8152_LD_IRQ(i)        (IT8152_IRQ(i) + IT8152_PD_IRQ_COUNT + IT8152_LP_IRQ_COUNT)
-
-#define IT8152_LAST_IRQ         IT8152_LD_IRQ(IT8152_LD_IRQ_COUNT - 1)
+#define IT8152_LAST_IRQ         (IRQ_BOARD_END + 40)
 
 #if NR_IRQS < (IT8152_LAST_IRQ+1)
 #undef NR_IRQS
diff --git a/arch/arm/mach-pxa/include/mach/lpd270.h b/arch/arm/mach-pxa/include/mach/lpd270.h
index f89fb715266b..0e6440c81683 100644
--- a/arch/arm/mach-pxa/include/mach/lpd270.h
+++ b/arch/arm/mach-pxa/include/mach/lpd270.h
@@ -34,5 +34,9 @@
 #define LPD270_INT_ETHERNET     (1 << 3)  /* Ethernet controller IRQ */
 #define LPD270_INT_USBC         (1 << 2)  /* USB client cable detection IRQ */
 
+#define LPD270_IRQ(x)           (IRQ_BOARD_START + (x))
+#define LPD270_USBC_IRQ         LPD270_IRQ(2)
+#define LPD270_ETHERNET_IRQ     LPD270_IRQ(3)
+#define LPD270_AC97_IRQ         LPD270_IRQ(4)
 
 #endif
diff --git a/arch/arm/mach-pxa/include/mach/lubbock.h b/arch/arm/mach-pxa/include/mach/lubbock.h
index 751b74811d0f..a0d4247f08fc 100644
--- a/arch/arm/mach-pxa/include/mach/lubbock.h
+++ b/arch/arm/mach-pxa/include/mach/lubbock.h
@@ -34,6 +34,17 @@
 #define LUB_IRQ_SET_CLR         __LUB_REG(LUBBOCK_FPGA_PHYS + 0x0d0)
 #define LUB_GP                  __LUB_REG(LUBBOCK_FPGA_PHYS + 0x100)
 
+/* Board specific IRQs */
+#define LUBBOCK_IRQ(x)          (IRQ_BOARD_START + (x))
+#define LUBBOCK_SD_IRQ          LUBBOCK_IRQ(0)
+#define LUBBOCK_SA1111_IRQ      LUBBOCK_IRQ(1)
+#define LUBBOCK_USB_IRQ         LUBBOCK_IRQ(2)  /* usb connect */
+#define LUBBOCK_ETH_IRQ         LUBBOCK_IRQ(3)
+#define LUBBOCK_UCB1400_IRQ     LUBBOCK_IRQ(4)
+#define LUBBOCK_BB_IRQ          LUBBOCK_IRQ(5)
+#define LUBBOCK_USB_DISC_IRQ    LUBBOCK_IRQ(6)  /* usb disconnect */
+#define LUBBOCK_LAST_IRQ        LUBBOCK_IRQ(6)
+
 #ifndef __ASSEMBLY__
 extern void lubbock_set_misc_wr(unsigned int mask, unsigned int set);
 #endif
diff --git a/arch/arm/mach-pxa/include/mach/mainstone.h b/arch/arm/mach-pxa/include/mach/mainstone.h
index 3461c4302ff4..86e623abd64d 100644
--- a/arch/arm/mach-pxa/include/mach/mainstone.h
+++ b/arch/arm/mach-pxa/include/mach/mainstone.h
@@ -117,4 +117,21 @@
 #define MST_PCMCIA_PWR_VCC_33   0x8        /* voltage VCC = 3.3V */
 #define MST_PCMCIA_PWR_VCC_50   0x4        /* voltage VCC = 5.0V */
 
+/* board specific IRQs */
+#define MAINSTONE_IRQ(x)        (IRQ_BOARD_START + (x))
+#define MAINSTONE_MMC_IRQ       MAINSTONE_IRQ(0)
+#define MAINSTONE_USIM_IRQ      MAINSTONE_IRQ(1)
+#define MAINSTONE_USBC_IRQ      MAINSTONE_IRQ(2)
+#define MAINSTONE_ETHERNET_IRQ  MAINSTONE_IRQ(3)
+#define MAINSTONE_AC97_IRQ      MAINSTONE_IRQ(4)
+#define MAINSTONE_PEN_IRQ       MAINSTONE_IRQ(5)
+#define MAINSTONE_MSINS_IRQ     MAINSTONE_IRQ(6)
+#define MAINSTONE_EXBRD_IRQ     MAINSTONE_IRQ(7)
+#define MAINSTONE_S0_CD_IRQ     MAINSTONE_IRQ(9)
+#define MAINSTONE_S0_STSCHG_IRQ MAINSTONE_IRQ(10)
+#define MAINSTONE_S0_IRQ        MAINSTONE_IRQ(11)
+#define MAINSTONE_S1_CD_IRQ     MAINSTONE_IRQ(13)
+#define MAINSTONE_S1_STSCHG_IRQ MAINSTONE_IRQ(14)
+#define MAINSTONE_S1_IRQ        MAINSTONE_IRQ(15)
+
 #endif
diff --git a/arch/arm/mach-pxa/include/mach/mfp-pxa25x.h b/arch/arm/mach-pxa/include/mach/mfp-pxa25x.h
index 9c787855cf24..cafadc33dfd8 100644
--- a/arch/arm/mach-pxa/include/mach/mfp-pxa25x.h
+++ b/arch/arm/mach-pxa/include/mach/mfp-pxa25x.h
@@ -190,4 +190,36 @@
 #define GPIO89_AC97_nRESET      MFP_CFG_OUT(GPIO89, AF0, DRIVE_HIGH)
 #endif  /* CONFIG_CPU_PXA26x */
 
+/* commonly used pin configurations */
+#define GPIOxx_LCD_16BPP        \
+        GPIO58_LCD_LDD_0,       \
+        GPIO59_LCD_LDD_1,       \
+        GPIO60_LCD_LDD_2,       \
+        GPIO61_LCD_LDD_3,       \
+        GPIO62_LCD_LDD_4,       \
+        GPIO63_LCD_LDD_5,       \
+        GPIO64_LCD_LDD_6,       \
+        GPIO65_LCD_LDD_7,       \
+        GPIO66_LCD_LDD_8,       \
+        GPIO67_LCD_LDD_9,       \
+        GPIO68_LCD_LDD_10,      \
+        GPIO69_LCD_LDD_11,      \
+        GPIO70_LCD_LDD_12,      \
+        GPIO71_LCD_LDD_13,      \
+        GPIO72_LCD_LDD_14,      \
+        GPIO73_LCD_LDD_15
+
+#define GPIOxx_LCD_DSTN_16BPP   \
+        GPIOxx_LCD_16BPP,       \
+        GPIO74_LCD_FCLK,        \
+        GPIO75_LCD_LCLK,        \
+        GPIO76_LCD_PCLK
+
+#define GPIOxx_LCD_TFT_16BPP    \
+        GPIOxx_LCD_16BPP,       \
+        GPIO74_LCD_FCLK,        \
+        GPIO75_LCD_LCLK,        \
+        GPIO76_LCD_PCLK,        \
+        GPIO77_LCD_BIAS
+
 #endif /* __ASM_ARCH_MFP_PXA25X_H */
diff --git a/arch/arm/mach-pxa/include/mach/mfp-pxa27x.h b/arch/arm/mach-pxa/include/mach/mfp-pxa27x.h
index 6543c05f47ed..ec0f0b0b6744 100644
--- a/arch/arm/mach-pxa/include/mach/mfp-pxa27x.h
+++ b/arch/arm/mach-pxa/include/mach/mfp-pxa27x.h
@@ -434,5 +434,32 @@
 #define GPIO112_nMSINS          MFP_CFG_IN(GPIO112, AF2)
 #define GPIO32_MSSCLK           MFP_CFG_OUT(GPIO32, AF1, DRIVE_LOW)
 
+/* commonly used pin configurations */
+#define GPIOxx_LCD_16BPP        \
+        GPIO58_LCD_LDD_0,       \
+        GPIO59_LCD_LDD_1,       \
+        GPIO60_LCD_LDD_2,       \
+        GPIO61_LCD_LDD_3,       \
+        GPIO62_LCD_LDD_4,       \
+        GPIO63_LCD_LDD_5,       \
+        GPIO64_LCD_LDD_6,       \
+        GPIO65_LCD_LDD_7,       \
+        GPIO66_LCD_LDD_8,       \
+        GPIO67_LCD_LDD_9,       \
+        GPIO68_LCD_LDD_10,      \
+        GPIO69_LCD_LDD_11,      \
+        GPIO70_LCD_LDD_12,      \
+        GPIO71_LCD_LDD_13,      \
+        GPIO72_LCD_LDD_14,      \
+        GPIO73_LCD_LDD_15
+
+#define GPIOxx_LCD_TFT_16BPP    \
+        GPIOxx_LCD_16BPP,       \
+        GPIO74_LCD_FCLK,        \
+        GPIO75_LCD_LCLK,        \
+        GPIO76_LCD_PCLK,        \
+        GPIO77_LCD_BIAS
+
+
 extern int keypad_set_wake(unsigned int on);
 #endif /* __ASM_ARCH_MFP_PXA27X_H */
diff --git a/arch/arm/mach-pxa/include/mach/mxm8x10.h b/arch/arm/mach-pxa/include/mach/mxm8x10.h
new file mode 100644
index 000000000000..ffa15665a418
--- /dev/null
+++ b/arch/arm/mach-pxa/include/mach/mxm8x10.h
@@ -0,0 +1,21 @@
+#ifndef __MACH_MXM_8X10_H
+#define __MACH_MXM_8X10_H
+
+#define MXM_8X10_ETH_PHYS       0x13000000
+
+#if defined(CONFIG_MMC)
+
+#define MXM_8X10_SD_nCD (72)
+#define MXM_8X10_SD_WP (84)
+
+extern void mxm_8x10_mmc_init(void);
+#else
+static inline void mxm_8x10_mmc_init(void) {}
+#endif
+
+extern void mxm_8x10_usb_host_init(void);
+extern void mxm_8x10_ac97_init(void);
+
+extern void mxm_8x10_barebones_init(void);
+
+#endif /* __MACH_MXM_8X10_H */
diff --git a/arch/arm/mach-pxa/include/mach/pcm027.h b/arch/arm/mach-pxa/include/mach/pcm027.h
index 4dcd2e8baa61..04083263167e 100644
--- a/arch/arm/mach-pxa/include/mach/pcm027.h
+++ b/arch/arm/mach-pxa/include/mach/pcm027.h
@@ -23,6 +23,13 @@
  * Definitions of CPU card resources only
  */
 
+/* phyCORE-PXA270 (PCM027) Interrupts */
+#define PCM027_IRQ(x)          (IRQ_BOARD_START + (x))
+#define PCM027_BTDET_IRQ       PCM027_IRQ(0)
+#define PCM027_FF_RI_IRQ       PCM027_IRQ(1)
+#define PCM027_MMCDET_IRQ      PCM027_IRQ(2)
+#define PCM027_PM_5V_IRQ       PCM027_IRQ(3)
+
 /* I2C RTC */
 #define PCM027_RTC_IRQ_GPIO     0
 #define PCM027_RTC_IRQ          IRQ_GPIO(PCM027_RTC_IRQ_GPIO)
diff --git a/arch/arm/mach-pxa/include/mach/ssp.h b/arch/arm/mach-pxa/include/mach/ssp.h
index cb5cb766f0f1..be1be5b6db51 100644
--- a/arch/arm/mach-pxa/include/mach/ssp.h
+++ b/arch/arm/mach-pxa/include/mach/ssp.h
@@ -46,6 +46,7 @@ struct ssp_device {
         int             drcmr_tx;
 };
 
+#ifdef CONFIG_PXA_SSP_LEGACY
 /*
  * SSP initialisation flags
  */
@@ -78,6 +79,7 @@ void ssp_restore_state(struct ssp_dev *dev, struct ssp_state *ssp);
 int ssp_init(struct ssp_dev *dev, u32 port, u32 init_flags);
 int ssp_config(struct ssp_dev *dev, u32 mode, u32 flags, u32 psp_flags, u32 speed);
 void ssp_exit(struct ssp_dev *dev);
+#endif /* CONFIG_PXA_SSP_LEGACY */
 
 /**
  * ssp_write_reg - Write to a SSP register
diff --git a/arch/arm/mach-pxa/include/mach/uncompress.h b/arch/arm/mach-pxa/include/mach/uncompress.h
index 237734b5b1be..5ef91d9d17e4 100644
--- a/arch/arm/mach-pxa/include/mach/uncompress.h
+++ b/arch/arm/mach-pxa/include/mach/uncompress.h
@@ -10,20 +10,41 @@
  */
 
 #include <linux/serial_reg.h>
-#include <mach/regs-uart.h>
 #include <asm/mach-types.h>
 
-#define __REG(x)       ((volatile unsigned long *)x)
+#define FFUART_BASE     (0x40100000)
+#define BTUART_BASE     (0x40200000)
+#define STUART_BASE     (0x40700000)
 
-static volatile unsigned long *UART = FFUART;
+static unsigned long uart_base = FFUART_BASE;
+static unsigned int uart_shift = 2;
+static unsigned int uart_is_pxa = 1;
+
+static inline unsigned char uart_read(int offset)
+{
+        return *(volatile unsigned char *)(uart_base + (offset << uart_shift));
+}
+
+static inline void uart_write(unsigned char val, int offset)
+{
+        *(volatile unsigned char *)(uart_base + (offset << uart_shift)) = val;
+}
+
+static inline int uart_is_enabled(void)
+{
+        /* assume enabled by default for non-PXA uarts */
+        return uart_is_pxa ? uart_read(UART_IER) & UART_IER_UUE : 1;
+}
 
 static inline void putc(char c)
 {
-        if (!(UART[UART_IER] & IER_UUE))
+        if (!uart_is_enabled())
                 return;
-        while (!(UART[UART_LSR] & LSR_TDRQ))
+
+        while (!(uart_read(UART_LSR) & UART_LSR_THRE))
                 barrier();
-        UART[UART_TX] = c;
+
+        uart_write(c, UART_TX);
 }
 
 /*
@@ -38,7 +59,13 @@ static inline void arch_decomp_setup(void)
         if (machine_is_littleton() || machine_is_intelmote2()
             || machine_is_csb726() || machine_is_stargate2()
             || machine_is_cm_x300() || machine_is_balloon3())
-                UART = STUART;
+                uart_base = STUART_BASE;
+
+        if (machine_is_arcom_zeus()) {
+                uart_base = 0x10000000; /* nCS4 */
+                uart_shift = 1;
+                uart_is_pxa = 0;
+        }
 }
 
 /*
diff --git a/arch/arm/mach-pxa/include/mach/zeus.h b/arch/arm/mach-pxa/include/mach/zeus.h
index c387046d2f28..6e119976003e 100644
--- a/arch/arm/mach-pxa/include/mach/zeus.h
+++ b/arch/arm/mach-pxa/include/mach/zeus.h
@@ -58,6 +58,8 @@
 #define ZEUS_EXT1_GPIO(x)       (ZEUS_EXT1_GPIO_BASE + (x))
 #define ZEUS_USER_GPIO(x)       (ZEUS_USER_GPIO_BASE + (x))
 
+#define ZEUS_CAN_SHDN_GPIO      ZEUS_EXT1_GPIO(2)
+
 /*
  * CPLD registers:
  * Only 4 registers, but spreaded over a 32MB address space.
@@ -68,7 +70,6 @@
 #define ZEUS_CPLD_VERSION       (ZEUS_CPLD + 0x0000)
 #define ZEUS_CPLD_ISA_IRQ       (ZEUS_CPLD + 0x1000)
 #define ZEUS_CPLD_CONTROL       (ZEUS_CPLD + 0x2000)
-#define ZEUS_CPLD_EXTWDOG       (ZEUS_CPLD + 0x3000)
 
 /* CPLD register bits */
 #define ZEUS_CPLD_CONTROL_CF_RST        0x01
diff --git a/arch/arm/mach-pxa/lpd270.c b/arch/arm/mach-pxa/lpd270.c
index 1373c22dbb83..d279507fc748 100644
--- a/arch/arm/mach-pxa/lpd270.c
+++ b/arch/arm/mach-pxa/lpd270.c
@@ -83,6 +83,10 @@ static unsigned long lpd270_pin_config[] __initdata = {
         GPIO89_USBH1_PEN,
 
         /* AC97 */
+        GPIO28_AC97_BITCLK,
+        GPIO29_AC97_SDATA_IN_0,
+        GPIO30_AC97_SDATA_OUT,
+        GPIO31_AC97_SYNC,
         GPIO45_AC97_SYSCLK,
 
         GPIO1_GPIO | WAKEUP_ON_EDGE_BOTH,
@@ -121,7 +125,7 @@ static void lpd270_irq_handler(unsigned int irq, struct irq_desc *desc)
 
         pending = __raw_readw(LPD270_INT_STATUS) & lpd270_irq_enabled;
         do {
-                GEDR(0) = GPIO_bit(0);  /* clear useless edge notification */
+                desc->chip->ack(irq);   /* clear useless edge notification */
                 if (likely(pending)) {
                         irq = LPD270_IRQ(0) + __ffs(pending);
                         generic_handle_irq(irq);
diff --git a/arch/arm/mach-pxa/lubbock.c b/arch/arm/mach-pxa/lubbock.c
index 98ee7e590299..63d65a2a0387 100644
--- a/arch/arm/mach-pxa/lubbock.c
+++ b/arch/arm/mach-pxa/lubbock.c
@@ -66,26 +66,14 @@ static unsigned long lubbock_pin_config[] __initdata = {
         GPIO25_SSP1_TXD,
         GPIO26_SSP1_RXD,
 
+        /* AC97 */
+        GPIO28_AC97_BITCLK,
+        GPIO29_AC97_SDATA_IN_0,
+        GPIO30_AC97_SDATA_OUT,
+        GPIO31_AC97_SYNC,
+
         /* LCD - 16bpp DSTN */
-        GPIO58_LCD_LDD_0,
-        GPIO59_LCD_LDD_1,
-        GPIO60_LCD_LDD_2,
-        GPIO61_LCD_LDD_3,
-        GPIO62_LCD_LDD_4,
-        GPIO63_LCD_LDD_5,
-        GPIO64_LCD_LDD_6,
-        GPIO65_LCD_LDD_7,
-        GPIO66_LCD_LDD_8,
-        GPIO67_LCD_LDD_9,
-        GPIO68_LCD_LDD_10,
-        GPIO69_LCD_LDD_11,
-        GPIO70_LCD_LDD_12,
-        GPIO71_LCD_LDD_13,
-        GPIO72_LCD_LDD_14,
-        GPIO73_LCD_LDD_15,
-        GPIO74_LCD_FCLK,
-        GPIO75_LCD_LCLK,
-        GPIO76_LCD_PCLK,
+        GPIOxx_LCD_DSTN_16BPP,
 
         /* BTUART */
         GPIO42_BTUART_RXD,
@@ -158,7 +146,7 @@ static void lubbock_irq_handler(unsigned int irq, struct irq_desc *desc)
 {
         unsigned long pending = LUB_IRQ_SET_CLR & lubbock_irq_enabled;
         do {
-                GEDR(0) = GPIO_bit(0);  /* clear our parent irq */
+                desc->chip->ack(irq);   /* clear our parent irq */
                 if (likely(pending)) {
                         irq = LUBBOCK_IRQ(0) + __ffs(pending);
                         generic_handle_irq(irq);
@@ -240,11 +228,18 @@ static struct resource sa1111_resources[] = {
         },
 };
 
+static struct sa1111_platform_data sa1111_info = {
+        .irq_base       = IRQ_BOARD_END,
+};
+
 static struct platform_device sa1111_device = {
         .name           = "sa1111",
         .id             = -1,
         .num_resources  = ARRAY_SIZE(sa1111_resources),
         .resource       = sa1111_resources,
+        .dev            = {
+                .platform_data  = &sa1111_info,
+        },
 };
 
 /* ADS7846 is connected through SSP ... and if your board has J5 populated,
diff --git a/arch/arm/mach-pxa/magician.c b/arch/arm/mach-pxa/magician.c
index 189f330719a2..e81dd0c8e40d 100644
--- a/arch/arm/mach-pxa/magician.c
+++ b/arch/arm/mach-pxa/magician.c
@@ -88,26 +88,7 @@ static unsigned long magician_pin_config[] __initdata = {
         GPIO112_MMC_CMD,
 
         /* LCD */
-        GPIO58_LCD_LDD_0,
-        GPIO59_LCD_LDD_1,
-        GPIO60_LCD_LDD_2,
-        GPIO61_LCD_LDD_3,
-        GPIO62_LCD_LDD_4,
-        GPIO63_LCD_LDD_5,
-        GPIO64_LCD_LDD_6,
-        GPIO65_LCD_LDD_7,
-        GPIO66_LCD_LDD_8,
-        GPIO67_LCD_LDD_9,
-        GPIO68_LCD_LDD_10,
-        GPIO69_LCD_LDD_11,
-        GPIO70_LCD_LDD_12,
-        GPIO71_LCD_LDD_13,
-        GPIO72_LCD_LDD_14,
-        GPIO73_LCD_LDD_15,
-        GPIO74_LCD_FCLK,
-        GPIO75_LCD_LCLK,
-        GPIO76_LCD_PCLK,
-        GPIO77_LCD_BIAS,
+        GPIOxx_LCD_TFT_16BPP,
 
         /* QCI */
         GPIO12_CIF_DD_7,
diff --git a/arch/arm/mach-pxa/mainstone.c b/arch/arm/mach-pxa/mainstone.c
index 851ee0fc32e2..5543c64da9ef 100644
--- a/arch/arm/mach-pxa/mainstone.c
+++ b/arch/arm/mach-pxa/mainstone.c
@@ -60,26 +60,7 @@ static unsigned long mainstone_pin_config[] = {
         GPIO15_nCS_1,
 
         /* LCD - 16bpp Active TFT */
-        GPIO58_LCD_LDD_0,
-        GPIO59_LCD_LDD_1,
-        GPIO60_LCD_LDD_2,
-        GPIO61_LCD_LDD_3,
-        GPIO62_LCD_LDD_4,
-        GPIO63_LCD_LDD_5,
-        GPIO64_LCD_LDD_6,
-        GPIO65_LCD_LDD_7,
-        GPIO66_LCD_LDD_8,
-        GPIO67_LCD_LDD_9,
-        GPIO68_LCD_LDD_10,
-        GPIO69_LCD_LDD_11,
-        GPIO70_LCD_LDD_12,
-        GPIO71_LCD_LDD_13,
-        GPIO72_LCD_LDD_14,
-        GPIO73_LCD_LDD_15,
-        GPIO74_LCD_FCLK,
-        GPIO75_LCD_LCLK,
-        GPIO76_LCD_PCLK,
-        GPIO77_LCD_BIAS,
+        GPIOxx_LCD_TFT_16BPP,
         GPIO16_PWM0_OUT,        /* Backlight */
 
         /* MMC */
@@ -107,6 +88,10 @@ static unsigned long mainstone_pin_config[] = {
         GPIO57_nIOIS16,
 
         /* AC97 */
+        GPIO28_AC97_BITCLK,
+        GPIO29_AC97_SDATA_IN_0,
+        GPIO30_AC97_SDATA_OUT,
+        GPIO31_AC97_SYNC,
         GPIO45_AC97_SYSCLK,
 
         /* Keypad */
@@ -162,7 +147,7 @@ static void mainstone_irq_handler(unsigned int irq, struct irq_desc *desc)
 {
         unsigned long pending = MST_INTSETCLR & mainstone_irq_enabled;
         do {
-                GEDR(0) = GPIO_bit(0);  /* clear useless edge notification */
+                desc->chip->ack(irq);   /* clear useless edge notification */
                 if (likely(pending)) {
                         irq = MAINSTONE_IRQ(0) + __ffs(pending);
                         generic_handle_irq(irq);
diff --git a/arch/arm/mach-pxa/mioa701.c b/arch/arm/mach-pxa/mioa701.c
index 2466a44d8fda..843fcca76e26 100644
--- a/arch/arm/mach-pxa/mioa701.c
+++ b/arch/arm/mach-pxa/mioa701.c
@@ -86,25 +86,7 @@ static unsigned long mioa701_pin_config[] = {
         MIO_CFG_OUT(GPIO22_USB_ENABLE, AF0, DRIVE_LOW),
 
         /* LCD */
-        GPIO58_LCD_LDD_0,
-        GPIO59_LCD_LDD_1,
-        GPIO60_LCD_LDD_2,
-        GPIO61_LCD_LDD_3,
-        GPIO62_LCD_LDD_4,
-        GPIO63_LCD_LDD_5,
-        GPIO64_LCD_LDD_6,
-        GPIO65_LCD_LDD_7,
-        GPIO66_LCD_LDD_8,
-        GPIO67_LCD_LDD_9,
-        GPIO68_LCD_LDD_10,
-        GPIO69_LCD_LDD_11,
-        GPIO70_LCD_LDD_12,
-        GPIO71_LCD_LDD_13,
-        GPIO72_LCD_LDD_14,
-        GPIO73_LCD_LDD_15,
-        GPIO74_LCD_FCLK,
-        GPIO75_LCD_LCLK,
-        GPIO76_LCD_PCLK,
+        GPIOxx_LCD_TFT_16BPP,
 
         /* QCI */
         GPIO12_CIF_DD_7,
@@ -155,6 +137,10 @@ static unsigned long mioa701_pin_config[] = {
         GPIO41_FFUART_RTS,
 
         /* Sound */
+        GPIO28_AC97_BITCLK,
+        GPIO29_AC97_SDATA_IN_0,
+        GPIO30_AC97_SDATA_OUT,
+        GPIO31_AC97_SYNC,
         GPIO89_AC97_SYSCLK,
         MIO_CFG_IN(GPIO12_HPJACK_INSERT, AF0),
 
diff --git a/arch/arm/mach-pxa/mxm8x10.c b/arch/arm/mach-pxa/mxm8x10.c
new file mode 100644
index 000000000000..8c9c6f0d56bb
--- /dev/null
+++ b/arch/arm/mach-pxa/mxm8x10.c
@@ -0,0 +1,474 @@
+/*
+ * linux/arch/arm/mach-pxa/mxm8x10.c
+ *
+ * Support for the Embedian MXM-8x10 Computer on Module
+ *
+ * Copyright (C) 2006 Marvell International Ltd.
+ * Copyright (C) 2009 Embedian Inc.
+ * Copyright (C) 2009 TMT Services & Supplies (Pty) Ltd.
+ *
+ * 2007-09-04: eric miao <eric.y.miao@gmail.com>
+ *             rewrite to align with latest kernel
+ *
+ * 2010-01-09: Edwin Peer <epeer@tmtservices.co.za>
+ *             Hennie van der Merwe <hvdmerwe@tmtservices.co.za>
+ *             rework for upstream merge
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/serial_8250.h>
+#include <linux/dm9000.h>
+#include <linux/gpio.h>
+
+#include <plat/i2c.h>
+#include <plat/pxa3xx_nand.h>
+
+#include <mach/pxafb.h>
+#include <mach/mmc.h>
+#include <mach/ohci.h>
+#include <mach/pxa320.h>
+
+#include <mach/mxm8x10.h>
+
+#include "devices.h"
+#include "generic.h"
+
+/* GPIO pin definition
+
+External device stuff   - Leave unconfigured for now...
+---------------------
+GPIO0   -   DREQ    (External DMA Request)
+GPIO3   -   nGCS2   (External Chip Select) Where is nGCS0; nGCS1; nGCS4; nGCS5 ?
+GPIO4   -   nGCS3
+GPIO15  -   EXT_GPIO1
+GPIO16  -   EXT_GPIO2
+GPIO17  -   EXT_GPIO3
+GPIO24  -   EXT_GPIO4
+GPIO25  -   EXT_GPIO5
+GPIO26  -   EXT_GPIO6
+GPIO27  -   EXT_GPIO7
+GPIO28  -   EXT_GPIO8
+GPIO29  -   EXT_GPIO9
+GPIO30  -   EXT_GPIO10
+GPIO31  -   EXT_GPIO11
+GPIO57  -   EXT_GPIO12
+GPIO74  -   EXT_IRQ1
+GPIO75  -   EXT_IRQ2
+GPIO76  -   EXT_IRQ3
+GPIO77  -   EXT_IRQ4
+GPIO78  -   EXT_IRQ5
+GPIO79  -   EXT_IRQ6
+GPIO80  -   EXT_IRQ7
+GPIO81  -   EXT_IRQ8
+GPIO87  -   VCCIO_PWREN (External Device PWREN)
+
+Dallas 1-Wire   - Leave unconfigured for now...
+-------------
+GPIO0_2 -   DS - 1Wire
+
+Ethernet
+--------
+GPIO1   -   DM9000 PWR
+GPIO9   -   DM9K_nIRQ
+GPIO36  -   DM9K_RESET
+
+Keypad  - Leave unconfigured by for now...
+------
+GPIO1_2 -   KP_DKIN0
+GPIO5_2 -   KP_MKOUT7
+GPIO82  -   KP_DKIN1
+GPIO85  -   KP_DKIN2
+GPIO86  -   KP_DKIN3
+GPIO113 -   KP_MKIN0
+GPIO114 -   KP_MKIN1
+GPIO115 -   KP_MKIN2
+GPIO116 -   KP_MKIN3
+GPIO117 -   KP_MKIN4
+GPIO118 -   KP_MKIN5
+GPIO119 -   KP_MKIN6
+GPIO120 -   KP_MKIN7
+GPIO121 -   KP_MKOUT0
+GPIO122 -   KP_MKOUT1
+GPIO122 -   KP_MKOUT2
+GPIO123 -   KP_MKOUT3
+GPIO124 -   KP_MKOUT4
+GPIO125 -   KP_MKOUT5
+GPIO127 -   KP_MKOUT6
+
+Data Bus    - Leave unconfigured for now...
+--------
+GPIO2   -   nWait (Data Bus)
+
+USB Device
+----------
+GPIO4_2 -   USBD_PULLUP
+GPIO10  -   UTM_CLK (USB Device UTM Clk)
+GPIO49  -   USB 2.0 Device UTM_DATA0
+GPIO50  -   USB 2.0 Device UTM_DATA1
+GPIO51  -   USB 2.0 Device UTM_DATA2
+GPIO52  -   USB 2.0 Device UTM_DATA3
+GPIO53  -   USB 2.0 Device UTM_DATA4
+GPIO54  -   USB 2.0 Device UTM_DATA5
+GPIO55  -   USB 2.0 Device UTM_DATA6
+GPIO56  -   USB 2.0 Device UTM_DATA7
+GPIO58  -   UTM_RXVALID (USB 2.0 Device)
+GPIO59  -   UTM_RXACTIVE (USB 2.0 Device)
+GPIO60  -   UTM_RXERROR
+GPIO61  -   UTM_OPMODE0
+GPIO62  -   UTM_OPMODE1
+GPIO71  -   USBD_INT    (USB Device?)
+GPIO73  -   UTM_TXREADY (USB 2.0 Device)
+GPIO83  -   UTM_TXVALID (USB 2.0 Device)
+GPIO98  -   UTM_RESET   (USB 2.0 device)
+GPIO99  -   UTM_XCVR_SELECT
+GPIO100 -   UTM_TERM_SELECT
+GPIO101 -   UTM_SUSPENDM_X
+GPIO102 -   UTM_LINESTATE0
+GPIO103 -   UTM_LINESTATE1
+
+Card-Bus Interface  - Leave unconfigured for now...
+------------------
+GPIO5   -   nPIOR (I/O space output enable)
+GPIO6   -   nPIOW (I/O space write enable)
+GPIO7   -   nIOS16 (Input from I/O space telling size of data bus)
+GPIO8   -   nPWAIT (Input for inserting wait states)
+
+LCD
+---
+GPIO6_2     -   LDD0
+GPIO7_2     -   LDD1
+GPIO8_2     -   LDD2
+GPIO9_2     -   LDD3
+GPIO11_2    -   LDD5
+GPIO12_2    -   LDD6
+GPIO13_2    -   LDD7
+GPIO14_2    -   VSYNC
+GPIO15_2    -   HSYNC
+GPIO16_2    -   VCLK
+GPIO17_2    -   HCLK
+GPIO18_2    -   VDEN
+GPIO63      -   LDD8    (CPU LCD)
+GPIO64      -   LDD9    (CPU LCD)
+GPIO65      -   LDD10   (CPU LCD)
+GPIO66      -   LDD11   (CPU LCD)
+GPIO67      -   LDD12   (CPU LCD)
+GPIO68      -   LDD13   (CPU LCD)
+GPIO69      -   LDD14   (CPU LCD)
+GPIO70      -   LDD15   (CPU LCD)
+GPIO88      -   VCCLCD_PWREN (LCD Panel PWREN)
+GPIO97      -   BACKLIGHT_EN
+GPIO104     -   LCD_PWREN
+
+PWM   - Leave unconfigured for now...
+---
+GPIO11  -   PWM0
+GPIO12  -   PWM1
+GPIO13  -   PWM2
+GPIO14  -   PWM3
+
+SD-CARD
+-------
+GPIO18  -   SDDATA0
+GPIO19  -   SDDATA1
+GPIO20  -   SDDATA2
+GPIO21  -   SDDATA3
+GPIO22  -   SDCLK
+GPIO23  -   SDCMD
+GPIO72  -   SD_WP
+GPIO84  -   SD_nIRQ_CD  (SD-Card)
+
+I2C
+---
+GPIO32  -   I2CSCL
+GPIO33  -   I2CSDA
+
+AC97
+----
+GPIO35  -   AC97_SDATA_IN
+GPIO37  -   AC97_SDATA_OUT
+GPIO38  -   AC97_SYNC
+GPIO39  -   AC97_BITCLK
+GPIO40  -   AC97_nRESET
+
+UART1
+-----
+GPIO41  -   UART_RXD1
+GPIO42  -   UART_TXD1
+GPIO43  -   UART_CTS1
+GPIO44  -   UART_DCD1
+GPIO45  -   UART_DSR1
+GPIO46  -   UART_nRI1
+GPIO47  -   UART_DTR1
+GPIO48  -   UART_RTS1
+
+UART2
+-----
+GPIO109 -   RTS2
+GPIO110 -   RXD2
+GPIO111 -   TXD2
+GPIO112 -   nCTS2
+
+UART3
+-----
+GPIO105 -   nCTS3
+GPIO106 -   nRTS3
+GPIO107 -   TXD3
+GPIO108 -   RXD3
+
+SSP3    - Leave unconfigured for now...
+----
+GPIO89  -   SSP3_CLK
+GPIO90  -   SSP3_SFRM
+GPIO91  -   SSP3_TXD
+GPIO92  -   SSP3_RXD
+
+SSP4
+GPIO93  -   SSP4_CLK
+GPIO94  -   SSP4_SFRM
+GPIO95  -   SSP4_TXD
+GPIO96  -   SSP4_RXD
+*/
+
+static mfp_cfg_t mfp_cfg[] __initdata = {
+        /* USB */
+        GPIO10_UTM_CLK,
+        GPIO49_U2D_PHYDATA_0,
+        GPIO50_U2D_PHYDATA_1,
+        GPIO51_U2D_PHYDATA_2,
+        GPIO52_U2D_PHYDATA_3,
+        GPIO53_U2D_PHYDATA_4,
+        GPIO54_U2D_PHYDATA_5,
+        GPIO55_U2D_PHYDATA_6,
+        GPIO56_U2D_PHYDATA_7,
+        GPIO58_UTM_RXVALID,
+        GPIO59_UTM_RXACTIVE,
+        GPIO60_U2D_RXERROR,
+        GPIO61_U2D_OPMODE0,
+        GPIO62_U2D_OPMODE1,
+        GPIO71_GPIO, /* USBD_INT */
+        GPIO73_UTM_TXREADY,
+        GPIO83_U2D_TXVALID,
+        GPIO98_U2D_RESET,
+        GPIO99_U2D_XCVR_SEL,
+        GPIO100_U2D_TERM_SEL,
+        GPIO101_U2D_SUSPEND,
+        GPIO102_UTM_LINESTATE_0,
+        GPIO103_UTM_LINESTATE_1,
+        GPIO4_2_GPIO | MFP_PULL_HIGH, /* UTM_PULLUP */
+
+        /* DM9000 */
+        GPIO1_GPIO,
+        GPIO9_GPIO,
+        GPIO36_GPIO,
+
+        /* AC97 */
+        GPIO35_AC97_SDATA_IN_0,
+        GPIO37_AC97_SDATA_OUT,
+        GPIO38_AC97_SYNC,
+        GPIO39_AC97_BITCLK,
+        GPIO40_AC97_nACRESET,
+
+        /* UARTS */
+        GPIO41_UART1_RXD,
+        GPIO42_UART1_TXD,
+        GPIO43_UART1_CTS,
+        GPIO44_UART1_DCD,
+        GPIO45_UART1_DSR,
+        GPIO46_UART1_RI,
+        GPIO47_UART1_DTR,
+        GPIO48_UART1_RTS,
+
+        GPIO109_UART2_RTS,
+        GPIO110_UART2_RXD,
+        GPIO111_UART2_TXD,
+        GPIO112_UART2_CTS,
+
+        GPIO105_UART3_CTS,
+        GPIO106_UART3_RTS,
+        GPIO107_UART3_TXD,
+        GPIO108_UART3_RXD,
+
+        GPIO78_GPIO,
+        GPIO79_GPIO,
+        GPIO80_GPIO,
+        GPIO81_GPIO,
+
+        /* I2C */
+        GPIO32_I2C_SCL,
+        GPIO33_I2C_SDA,
+
+        /* MMC */
+        GPIO18_MMC1_DAT0,
+        GPIO19_MMC1_DAT1,
+        GPIO20_MMC1_DAT2,
+        GPIO21_MMC1_DAT3,
+        GPIO22_MMC1_CLK,
+        GPIO23_MMC1_CMD,
+        GPIO72_GPIO | MFP_PULL_HIGH, /* Card Detect */
+        GPIO84_GPIO | MFP_PULL_LOW, /* Write Protect */
+
+        /* IRQ */
+        GPIO74_GPIO | MFP_LPM_EDGE_RISE, /* EXT_IRQ1 */
+        GPIO75_GPIO | MFP_LPM_EDGE_RISE, /* EXT_IRQ2 */
+        GPIO76_GPIO | MFP_LPM_EDGE_RISE, /* EXT_IRQ3 */
+        GPIO77_GPIO | MFP_LPM_EDGE_RISE, /* EXT_IRQ4 */
+        GPIO78_GPIO | MFP_LPM_EDGE_RISE, /* EXT_IRQ5 */
+        GPIO79_GPIO | MFP_LPM_EDGE_RISE, /* EXT_IRQ6 */
+        GPIO80_GPIO | MFP_LPM_EDGE_RISE, /* EXT_IRQ7 */
+        GPIO81_GPIO | MFP_LPM_EDGE_RISE  /* EXT_IRQ8 */
+};
+
+/* MMC/MCI Support */
+#if defined(CONFIG_MMC)
+static struct pxamci_platform_data mxm_8x10_mci_platform_data = {
+        .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34,
+        .detect_delay = 1,
+        .gpio_card_detect = MXM_8X10_SD_nCD,
+        .gpio_card_ro = MXM_8X10_SD_WP,
+        .gpio_power = -1
+};
+
+void __init mxm_8x10_mmc_init(void)
+{
+        pxa_set_mci_info(&mxm_8x10_mci_platform_data);
+}
+#endif
+
+/* USB Open Host Controler Interface */
+static struct pxaohci_platform_data mxm_8x10_ohci_platform_data = {
+        .port_mode = PMM_NPS_MODE,
+        .flags = ENABLE_PORT_ALL
+};
+
+void __init mxm_8x10_usb_host_init(void)
+{
+        pxa_set_ohci_info(&mxm_8x10_ohci_platform_data);
+}
+
+/* AC97 Sound Support */
+static struct platform_device mxm_8x10_ac97_device = {
+        .name = "pxa2xx-ac97"
+};
+
+void __init mxm_8x10_ac97_init(void)
+{
+        platform_device_register(&mxm_8x10_ac97_device);
+}
+
+/* NAND flash Support */
+#if defined(CONFIG_MTD_NAND_PXA3xx) || defined(CONFIG_MTD_NAND_PXA3xx_MODULE)
+#define NAND_BLOCK_SIZE SZ_128K
+#define NB(x)           (NAND_BLOCK_SIZE * (x))
+static struct mtd_partition mxm_8x10_nand_partitions[] = {
+        [0] = {
+               .name = "boot",
+               .size = NB(0x002),
+               .offset = NB(0x000),
+               .mask_flags = MTD_WRITEABLE
+        },
+        [1] = {
+               .name = "kernel",
+               .size = NB(0x010),
+               .offset = NB(0x002),
+               .mask_flags = MTD_WRITEABLE
+        },
+        [2] = {
+               .name = "root",
+               .size = NB(0x36c),
+               .offset = NB(0x012)
+        },
+        [3] = {
+               .name = "bbt",
+               .size = NB(0x082),
+               .offset = NB(0x37e),
+               .mask_flags = MTD_WRITEABLE
+        }
+};
+
+static struct pxa3xx_nand_platform_data mxm_8x10_nand_info = {
+        .enable_arbiter = 1,
+        .keep_config = 1,
+        .parts = mxm_8x10_nand_partitions,
+        .nr_parts = ARRAY_SIZE(mxm_8x10_nand_partitions)
+};
+
+static void __init mxm_8x10_nand_init(void)
+{
+        pxa3xx_set_nand_info(&mxm_8x10_nand_info);
+}
+#else
+static inline void mxm_8x10_nand_init(void) {}
+#endif /* CONFIG_MTD_NAND_PXA3xx || CONFIG_MTD_NAND_PXA3xx_MODULE */
+
+/* Ethernet support: Davicom DM9000 */
+static struct resource dm9k_resources[] = {
+        [0] = {
+               .start = MXM_8X10_ETH_PHYS + 0x300,
+               .end = MXM_8X10_ETH_PHYS + 0x300,
+               .flags = IORESOURCE_MEM
+        },
+        [1] = {
+               .start = MXM_8X10_ETH_PHYS + 0x308,
+               .end = MXM_8X10_ETH_PHYS + 0x308,
+               .flags = IORESOURCE_MEM
+        },
+        [2] = {
+               .start = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO9)),
+               .end = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO9)),
+               .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE
+        }
+};
+
+static struct dm9000_plat_data dm9k_plat_data = {
+        .flags = DM9000_PLATF_16BITONLY
+};
+
+static struct platform_device dm9k_device = {
+        .name = "dm9000",
+        .id = 0,
+        .num_resources = ARRAY_SIZE(dm9k_resources),
+        .resource = dm9k_resources,
+        .dev = {
+                .platform_data = &dm9k_plat_data
+        }
+};
+
+static void __init mxm_8x10_ethernet_init(void)
+{
+        platform_device_register(&dm9k_device);
+}
+
+/* PXA UARTs */
+static void __init mxm_8x10_uarts_init(void)
+{
+        pxa_set_ffuart_info(NULL);
+        pxa_set_btuart_info(NULL);
+        pxa_set_stuart_info(NULL);
+}
+
+/* I2C and Real Time Clock */
+static struct i2c_board_info __initdata mxm_8x10_i2c_devices[] = {
+        {
+                I2C_BOARD_INFO("ds1337", 0x68)
+        }
+};
+
+static void __init mxm_8x10_i2c_init(void)
+{
+        i2c_register_board_info(0, mxm_8x10_i2c_devices,
+                                ARRAY_SIZE(mxm_8x10_i2c_devices));
+        pxa_set_i2c_info(NULL);
+}
+
+void __init mxm_8x10_barebones_init(void)
+{
+        pxa3xx_mfp_config(ARRAY_AND_SIZE(mfp_cfg));
+
+        mxm_8x10_uarts_init();
+        mxm_8x10_nand_init();
+        mxm_8x10_i2c_init();
+        mxm_8x10_ethernet_init();
+}
diff --git a/arch/arm/mach-pxa/palmld.c b/arch/arm/mach-pxa/palmld.c
index e100af78b166..f70c75b38769 100644
--- a/arch/arm/mach-pxa/palmld.c
+++ b/arch/arm/mach-pxa/palmld.c
@@ -83,26 +83,7 @@ static unsigned long palmld_pin_config[] __initdata = {
         GPIO105_KP_MKOUT_2,
 
         /* LCD */
-        GPIO58_LCD_LDD_0,
-        GPIO59_LCD_LDD_1,
-        GPIO60_LCD_LDD_2,
-        GPIO61_LCD_LDD_3,
-        GPIO62_LCD_LDD_4,
-        GPIO63_LCD_LDD_5,
-        GPIO64_LCD_LDD_6,
-        GPIO65_LCD_LDD_7,
-        GPIO66_LCD_LDD_8,
-        GPIO67_LCD_LDD_9,
-        GPIO68_LCD_LDD_10,
-        GPIO69_LCD_LDD_11,
-        GPIO70_LCD_LDD_12,
-        GPIO71_LCD_LDD_13,
-        GPIO72_LCD_LDD_14,
-        GPIO73_LCD_LDD_15,
-        GPIO74_LCD_FCLK,
-        GPIO75_LCD_LCLK,
-        GPIO76_LCD_PCLK,
-        GPIO77_LCD_BIAS,
+        GPIOxx_LCD_TFT_16BPP,
 
         /* PWM */
         GPIO16_PWM0_OUT,
diff --git a/arch/arm/mach-pxa/palmt5.c b/arch/arm/mach-pxa/palmt5.c
index 8fe3ec27568f..d902a813aae3 100644
--- a/arch/arm/mach-pxa/palmt5.c
+++ b/arch/arm/mach-pxa/palmt5.c
@@ -87,26 +87,7 @@ static unsigned long palmt5_pin_config[] __initdata = {
         GPIO105_KP_MKOUT_2,
 
         /* LCD */
-        GPIO58_LCD_LDD_0,
-        GPIO59_LCD_LDD_1,
-        GPIO60_LCD_LDD_2,
-        GPIO61_LCD_LDD_3,
-        GPIO62_LCD_LDD_4,
-        GPIO63_LCD_LDD_5,
-        GPIO64_LCD_LDD_6,
-        GPIO65_LCD_LDD_7,
-        GPIO66_LCD_LDD_8,
-        GPIO67_LCD_LDD_9,
-        GPIO68_LCD_LDD_10,
-        GPIO69_LCD_LDD_11,
-        GPIO70_LCD_LDD_12,
-        GPIO71_LCD_LDD_13,
-        GPIO72_LCD_LDD_14,
-        GPIO73_LCD_LDD_15,
-        GPIO74_LCD_FCLK,
-        GPIO75_LCD_LCLK,
-        GPIO76_LCD_PCLK,
-        GPIO77_LCD_BIAS,
+        GPIOxx_LCD_TFT_16BPP,
 
         /* PWM */
         GPIO16_PWM0_OUT,
diff --git a/arch/arm/mach-pxa/palmtc.c b/arch/arm/mach-pxa/palmtc.c
index b992f07ece21..717d7a638675 100644
--- a/arch/arm/mach-pxa/palmtc.c
+++ b/arch/arm/mach-pxa/palmtc.c
@@ -84,26 +84,7 @@ static unsigned long palmtc_pin_config[] __initdata = {
         GPIO36_GPIO,    /* pullup */
 
         /* LCD */
-        GPIO58_LCD_LDD_0,
-        GPIO59_LCD_LDD_1,
-        GPIO60_LCD_LDD_2,
-        GPIO61_LCD_LDD_3,
-        GPIO62_LCD_LDD_4,
-        GPIO63_LCD_LDD_5,
-        GPIO64_LCD_LDD_6,
-        GPIO65_LCD_LDD_7,
-        GPIO66_LCD_LDD_8,
-        GPIO67_LCD_LDD_9,
-        GPIO68_LCD_LDD_10,
-        GPIO69_LCD_LDD_11,
-        GPIO70_LCD_LDD_12,
-        GPIO71_LCD_LDD_13,
-        GPIO72_LCD_LDD_14,
-        GPIO73_LCD_LDD_15,
-        GPIO74_LCD_FCLK,
-        GPIO75_LCD_LCLK,
-        GPIO76_LCD_PCLK,
-        GPIO77_LCD_BIAS,
+        GPIOxx_LCD_TFT_16BPP,
 
         /* MATRIX KEYPAD */
         GPIO0_GPIO | WAKEUP_ON_EDGE_BOTH,       /* in 0 */
diff --git a/arch/arm/mach-pxa/palmte2.c b/arch/arm/mach-pxa/palmte2.c
index dc728d6ab94e..3d284ff1a64e 100644
--- a/arch/arm/mach-pxa/palmte2.c
+++ b/arch/arm/mach-pxa/palmte2.c
@@ -73,26 +73,7 @@ static unsigned long palmte2_pin_config[] __initdata = {
         GPIO47_FICP_TXD,
 
         /* LCD */
-        GPIO58_LCD_LDD_0,
-        GPIO59_LCD_LDD_1,
-        GPIO60_LCD_LDD_2,
-        GPIO61_LCD_LDD_3,
-        GPIO62_LCD_LDD_4,
-        GPIO63_LCD_LDD_5,
-        GPIO64_LCD_LDD_6,
-        GPIO65_LCD_LDD_7,
-        GPIO66_LCD_LDD_8,
-        GPIO67_LCD_LDD_9,
-        GPIO68_LCD_LDD_10,
-        GPIO69_LCD_LDD_11,
-        GPIO70_LCD_LDD_12,
-        GPIO71_LCD_LDD_13,
-        GPIO72_LCD_LDD_14,
-        GPIO73_LCD_LDD_15,
-        GPIO74_LCD_FCLK,
-        GPIO75_LCD_LCLK,
-        GPIO76_LCD_PCLK,
-        GPIO77_LCD_BIAS,
+        GPIOxx_LCD_TFT_16BPP,
 
         /* GPIO KEYS */
         GPIO5_GPIO,     /* notes */
diff --git a/arch/arm/mach-pxa/palmtreo.c b/arch/arm/mach-pxa/palmtreo.c
index b433bb496711..d8b4469607a1 100644
--- a/arch/arm/mach-pxa/palmtreo.c
+++ b/arch/arm/mach-pxa/palmtreo.c
@@ -99,25 +99,7 @@ static unsigned long treo_pin_config[] __initdata = {
         GPIO93_KP_DKIN_0 | WAKEUP_ON_LEVEL_HIGH,        /* Hotsync button */
 
         /* LCD */
-        GPIO58_LCD_LDD_0,
-        GPIO59_LCD_LDD_1,
-        GPIO60_LCD_LDD_2,
-        GPIO61_LCD_LDD_3,
-        GPIO62_LCD_LDD_4,
-        GPIO63_LCD_LDD_5,
-        GPIO64_LCD_LDD_6,
-        GPIO65_LCD_LDD_7,
-        GPIO66_LCD_LDD_8,
-        GPIO67_LCD_LDD_9,
-        GPIO68_LCD_LDD_10,
-        GPIO69_LCD_LDD_11,
-        GPIO70_LCD_LDD_12,
-        GPIO71_LCD_LDD_13,
-        GPIO72_LCD_LDD_14,
-        GPIO73_LCD_LDD_15,
-        GPIO74_LCD_FCLK,
-        GPIO75_LCD_LCLK,
-        GPIO76_LCD_PCLK,
+        GPIOxx_LCD_TFT_16BPP,
 
         /* Quick Capture Interface */
         GPIO84_CIF_FV,
diff --git a/arch/arm/mach-pxa/palmtx.c b/arch/arm/mach-pxa/palmtx.c
index b37a025c0b7b..007b58c11f8d 100644
--- a/arch/arm/mach-pxa/palmtx.c
+++ b/arch/arm/mach-pxa/palmtx.c
@@ -110,26 +110,7 @@ static unsigned long palmtx_pin_config[] __initdata = {
         GPIO105_KP_MKOUT_2,
 
         /* LCD */
-        GPIO58_LCD_LDD_0,
-        GPIO59_LCD_LDD_1,
-        GPIO60_LCD_LDD_2,
-        GPIO61_LCD_LDD_3,
-        GPIO62_LCD_LDD_4,
-        GPIO63_LCD_LDD_5,
-        GPIO64_LCD_LDD_6,
-        GPIO65_LCD_LDD_7,
-        GPIO66_LCD_LDD_8,
-        GPIO67_LCD_LDD_9,
-        GPIO68_LCD_LDD_10,
-        GPIO69_LCD_LDD_11,
-        GPIO70_LCD_LDD_12,
-        GPIO71_LCD_LDD_13,
-        GPIO72_LCD_LDD_14,
-        GPIO73_LCD_LDD_15,
-        GPIO74_LCD_FCLK,
-        GPIO75_LCD_LCLK,
-        GPIO76_LCD_PCLK,
-        GPIO77_LCD_BIAS,
+        GPIOxx_LCD_TFT_16BPP,
 
         /* FFUART */
         GPIO34_FFUART_RXD,
diff --git a/arch/arm/mach-pxa/palmz72.c b/arch/arm/mach-pxa/palmz72.c
index 1c5d68a94511..3a7925ca3944 100644
--- a/arch/arm/mach-pxa/palmz72.c
+++ b/arch/arm/mach-pxa/palmz72.c
@@ -95,26 +95,8 @@ static unsigned long palmz72_pin_config[] __initdata = {
         GPIO105_KP_MKOUT_2,
 
         /* LCD */
-        GPIO58_LCD_LDD_0,
-        GPIO59_LCD_LDD_1,
-        GPIO60_LCD_LDD_2,
-        GPIO61_LCD_LDD_3,
-        GPIO62_LCD_LDD_4,
-        GPIO63_LCD_LDD_5,
-        GPIO64_LCD_LDD_6,
-        GPIO65_LCD_LDD_7,
-        GPIO66_LCD_LDD_8,
-        GPIO67_LCD_LDD_9,
-        GPIO68_LCD_LDD_10,
-        GPIO69_LCD_LDD_11,
-        GPIO70_LCD_LDD_12,
-        GPIO71_LCD_LDD_13,
-        GPIO72_LCD_LDD_14,
-        GPIO73_LCD_LDD_15,
-        GPIO74_LCD_FCLK,
-        GPIO75_LCD_LCLK,
-        GPIO76_LCD_PCLK,
-        GPIO77_LCD_BIAS,
+        GPIOxx_LCD_TFT_16BPP,
+
         GPIO20_GPIO,    /* bl power */
         GPIO21_GPIO,    /* LCD border switch */
         GPIO22_GPIO,    /* LCD border color */
diff --git a/arch/arm/mach-pxa/pcm990-baseboard.c b/arch/arm/mach-pxa/pcm990-baseboard.c
index d5255ae74fe3..9d0ecea1760c 100644
--- a/arch/arm/mach-pxa/pcm990-baseboard.c
+++ b/arch/arm/mach-pxa/pcm990-baseboard.c
@@ -58,6 +58,12 @@ static unsigned long pcm990_pin_config[] __initdata = {
         /* I2C */
         GPIO117_I2C_SCL,
         GPIO118_I2C_SDA,
+
+        /* AC97 */
+        GPIO28_AC97_BITCLK,
+        GPIO29_AC97_SDATA_IN_0,
+        GPIO30_AC97_SDATA_OUT,
+        GPIO31_AC97_SYNC,
 };
 
 /*
@@ -259,8 +265,7 @@ static void pcm990_irq_handler(unsigned int irq, struct irq_desc *desc)
         unsigned long pending = (~PCM990_INTSETCLR) & pcm990_irq_enabled;
 
         do {
-                GEDR(PCM990_CTRL_INT_IRQ_GPIO) =
-                                        GPIO_bit(PCM990_CTRL_INT_IRQ_GPIO);
+                desc->chip->ack(irq);   /* clear our parent IRQ */
                 if (likely(pending)) {
                         irq = PCM027_IRQ(0) + __ffs(pending);
                         generic_handle_irq(irq);
diff --git a/arch/arm/mach-pxa/poodle.c b/arch/arm/mach-pxa/poodle.c
index c2b938a4d5c9..d58a52415d75 100644
--- a/arch/arm/mach-pxa/poodle.c
+++ b/arch/arm/mach-pxa/poodle.c
@@ -91,26 +91,7 @@ static unsigned long poodle_pin_config[] __initdata = {
         GPIO35_FFUART_CTS,
 
         /* LCD */
-        GPIO58_LCD_LDD_0,
-        GPIO59_LCD_LDD_1,
-        GPIO60_LCD_LDD_2,
-        GPIO61_LCD_LDD_3,
-        GPIO62_LCD_LDD_4,
-        GPIO63_LCD_LDD_5,
-        GPIO64_LCD_LDD_6,
-        GPIO65_LCD_LDD_7,
-        GPIO66_LCD_LDD_8,
-        GPIO67_LCD_LDD_9,
-        GPIO68_LCD_LDD_10,
-        GPIO69_LCD_LDD_11,
-        GPIO70_LCD_LDD_12,
-        GPIO71_LCD_LDD_13,
-        GPIO72_LCD_LDD_14,
-        GPIO73_LCD_LDD_15,
-        GPIO74_LCD_FCLK,
-        GPIO75_LCD_LCLK,
-        GPIO76_LCD_PCLK,
-        GPIO77_LCD_BIAS,
+        GPIOxx_LCD_TFT_16BPP,
 
         /* PC Card */
         GPIO48_nPOE,
@@ -193,11 +174,18 @@ static struct resource locomo_resources[] = {
         },
 };
 
+static struct locomo_platform_data locomo_info = {
+        .irq_base       = IRQ_BOARD_START,
+};
+
 struct platform_device poodle_locomo_device = {
         .name           = "locomo",
         .id             = 0,
         .num_resources  = ARRAY_SIZE(locomo_resources),
         .resource       = locomo_resources,
+        .dev            = {
+                .platform_data  = &locomo_info,
+        },
 };
 
 EXPORT_SYMBOL(poodle_locomo_device);
diff --git a/arch/arm/mach-pxa/pxa27x.c b/arch/arm/mach-pxa/pxa27x.c
index d783123e2d48..0af36177ff08 100644
--- a/arch/arm/mach-pxa/pxa27x.c
+++ b/arch/arm/mach-pxa/pxa27x.c
@@ -40,6 +40,25 @@ void pxa27x_clear_otgph(void)
 }
 EXPORT_SYMBOL(pxa27x_clear_otgph);
 
+static unsigned long ac97_reset_config[] = {
+        GPIO95_AC97_nRESET,
+        GPIO95_GPIO,
+        GPIO113_AC97_nRESET,
+        GPIO113_GPIO,
+};
+
+void pxa27x_assert_ac97reset(int reset_gpio, int on)
+{
+        if (reset_gpio == 113)
+                pxa2xx_mfp_config(on ? &ac97_reset_config[0] :
+                                       &ac97_reset_config[1], 1);
+
+        if (reset_gpio == 95)
+                pxa2xx_mfp_config(on ? &ac97_reset_config[2] :
+                                       &ac97_reset_config[3], 1);
+}
+EXPORT_SYMBOL_GPL(pxa27x_assert_ac97reset);
+
 /* Crystal clock: 13MHz */
 #define BASE_CLK        13000000
 
diff --git a/arch/arm/mach-pxa/raumfeld.c b/arch/arm/mach-pxa/raumfeld.c
new file mode 100644
index 000000000000..3184bdc14526
--- /dev/null
+++ b/arch/arm/mach-pxa/raumfeld.c
@@ -0,0 +1,1108 @@
+/*
+ * arch/arm/mach-pxa/raumfeld.c
+ *
+ * Support for the following Raumfeld devices:
+ *
+ *      * Controller
+ *      * Connector
+ *      * Speaker S/M
+ *
+ * See http://www.raumfeld.com for details.
+ *
+ * Copyright (c) 2009 Daniel Mack <daniel@caiaq.de>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/sysdev.h>
+#include <linux/platform_device.h>
+#include <linux/interrupt.h>
+#include <linux/gpio.h>
+#include <linux/smsc911x.h>
+#include <linux/input.h>
+#include <linux/rotary_encoder.h>
+#include <linux/gpio_keys.h>
+#include <linux/input/eeti_ts.h>
+#include <linux/leds.h>
+#include <linux/w1-gpio.h>
+#include <linux/sched.h>
+#include <linux/pwm_backlight.h>
+#include <linux/i2c.h>
+#include <linux/spi/spi.h>
+#include <linux/spi/spi_gpio.h>
+#include <linux/lis3lv02d.h>
+#include <linux/pda_power.h>
+#include <linux/power_supply.h>
+#include <linux/pda_power.h>
+#include <linux/power_supply.h>
+#include <linux/regulator/max8660.h>
+#include <linux/regulator/machine.h>
+#include <linux/regulator/fixed.h>
+#include <linux/regulator/consumer.h>
+#include <linux/delay.h>
+
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+
+#include <mach/hardware.h>
+#include <mach/pxa3xx-regs.h>
+#include <mach/mfp-pxa3xx.h>
+#include <mach/mfp-pxa300.h>
+#include <mach/ohci.h>
+#include <mach/pxafb.h>
+#include <mach/mmc.h>
+#include <plat/i2c.h>
+#include <plat/pxa3xx_nand.h>
+
+#include "generic.h"
+#include "devices.h"
+#include "clock.h"
+
+/* common GPIO  definitions */
+
+/* inputs */
+#define GPIO_ON_OFF             (14)
+#define GPIO_VOLENC_A           (19)
+#define GPIO_VOLENC_B           (20)
+#define GPIO_CHARGE_DONE        (23)
+#define GPIO_CHARGE_IND         (27)
+#define GPIO_TOUCH_IRQ          (32)
+#define GPIO_ETH_IRQ            (40)
+#define GPIO_SPI_MISO           (98)
+#define GPIO_ACCEL_IRQ          (104)
+#define GPIO_RESCUE_BOOT        (115)
+#define GPIO_DOCK_DETECT        (116)
+#define GPIO_KEY1               (117)
+#define GPIO_KEY2               (118)
+#define GPIO_KEY3               (119)
+#define GPIO_CHARGE_USB_OK      (112)
+#define GPIO_CHARGE_DC_OK       (101)
+#define GPIO_CHARGE_USB_SUSP    (102)
+
+/* outputs */
+#define GPIO_SHUTDOWN_SUPPLY    (16)
+#define GPIO_SHUTDOWN_BATT      (18)
+#define GPIO_CHRG_PEN2          (31)
+#define GPIO_TFT_VA_EN          (33)
+#define GPIO_SPDIF_CS           (34)
+#define GPIO_LED2               (35)
+#define GPIO_LED1               (36)
+#define GPIO_SPDIF_RESET        (38)
+#define GPIO_SPI_CLK            (95)
+#define GPIO_MCLK_DAC_CS        (96)
+#define GPIO_SPI_MOSI           (97)
+#define GPIO_W1_PULLUP_ENABLE   (105)
+#define GPIO_DISPLAY_ENABLE     (106)
+#define GPIO_MCLK_RESET         (111)
+#define GPIO_W2W_RESET          (113)
+#define GPIO_W2W_PDN            (114)
+#define GPIO_CODEC_RESET        (120)
+#define GPIO_AUDIO_VA_ENABLE    (124)
+#define GPIO_ACCEL_CS           (125)
+#define GPIO_ONE_WIRE           (126)
+
+/*
+ * GPIO configurations
+ */
+static mfp_cfg_t raumfeld_controller_pin_config[] __initdata = {
+        /* UART1 */
+        GPIO77_UART1_RXD,
+        GPIO78_UART1_TXD,
+        GPIO79_UART1_CTS,
+        GPIO81_UART1_DSR,
+        GPIO83_UART1_DTR,
+        GPIO84_UART1_RTS,
+
+        /* UART3 */
+        GPIO110_UART3_RXD,
+
+        /* USB Host */
+        GPIO0_2_USBH_PEN,
+        GPIO1_2_USBH_PWR,
+
+        /* I2C */
+        GPIO21_I2C_SCL | MFP_LPM_FLOAT | MFP_PULL_FLOAT,
+        GPIO22_I2C_SDA | MFP_LPM_FLOAT | MFP_PULL_FLOAT,
+
+        /* SPI */
+        GPIO34_GPIO,    /* SPDIF_CS */
+        GPIO96_GPIO,    /* MCLK_CS */
+        GPIO125_GPIO,   /* ACCEL_CS */
+
+        /* MMC */
+        GPIO3_MMC1_DAT0,
+        GPIO4_MMC1_DAT1,
+        GPIO5_MMC1_DAT2,
+        GPIO6_MMC1_DAT3,
+        GPIO7_MMC1_CLK,
+        GPIO8_MMC1_CMD,
+
+        /* One-wire */
+        GPIO126_GPIO | MFP_LPM_FLOAT,
+        GPIO105_GPIO | MFP_PULL_LOW | MFP_LPM_PULL_LOW,
+
+        /* CHRG_USB_OK */
+        GPIO101_GPIO | MFP_PULL_HIGH,
+        /* CHRG_USB_OK */
+        GPIO112_GPIO | MFP_PULL_HIGH,
+        /* CHRG_USB_SUSP */
+        GPIO102_GPIO,
+        /* DISPLAY_ENABLE */
+        GPIO106_GPIO,
+        /* DOCK_DETECT */
+        GPIO116_GPIO | MFP_LPM_FLOAT | MFP_PULL_FLOAT,
+
+        /* LCD */
+        GPIO54_LCD_LDD_0,
+        GPIO55_LCD_LDD_1,
+        GPIO56_LCD_LDD_2,
+        GPIO57_LCD_LDD_3,
+        GPIO58_LCD_LDD_4,
+        GPIO59_LCD_LDD_5,
+        GPIO60_LCD_LDD_6,
+        GPIO61_LCD_LDD_7,
+        GPIO62_LCD_LDD_8,
+        GPIO63_LCD_LDD_9,
+        GPIO64_LCD_LDD_10,
+        GPIO65_LCD_LDD_11,
+        GPIO66_LCD_LDD_12,
+        GPIO67_LCD_LDD_13,
+        GPIO68_LCD_LDD_14,
+        GPIO69_LCD_LDD_15,
+        GPIO70_LCD_LDD_16,
+        GPIO71_LCD_LDD_17,
+        GPIO72_LCD_FCLK,
+        GPIO73_LCD_LCLK,
+        GPIO74_LCD_PCLK,
+        GPIO75_LCD_BIAS,
+};
+
+static mfp_cfg_t raumfeld_connector_pin_config[] __initdata = {
+        /* UART1 */
+        GPIO77_UART1_RXD,
+        GPIO78_UART1_TXD,
+        GPIO79_UART1_CTS,
+        GPIO81_UART1_DSR,
+        GPIO83_UART1_DTR,
+        GPIO84_UART1_RTS,
+
+        /* UART3 */
+        GPIO110_UART3_RXD,
+
+        /* USB Host */
+        GPIO0_2_USBH_PEN,
+        GPIO1_2_USBH_PWR,
+
+        /* I2C */
+        GPIO21_I2C_SCL | MFP_LPM_FLOAT | MFP_PULL_FLOAT,
+        GPIO22_I2C_SDA | MFP_LPM_FLOAT | MFP_PULL_FLOAT,
+
+        /* SPI */
+        GPIO34_GPIO,    /* SPDIF_CS */
+        GPIO96_GPIO,    /* MCLK_CS */
+        GPIO125_GPIO,   /* ACCEL_CS */
+
+        /* MMC */
+        GPIO3_MMC1_DAT0,
+        GPIO4_MMC1_DAT1,
+        GPIO5_MMC1_DAT2,
+        GPIO6_MMC1_DAT3,
+        GPIO7_MMC1_CLK,
+        GPIO8_MMC1_CMD,
+
+        /* Ethernet */
+        GPIO1_nCS2,                     /* CS */
+        GPIO40_GPIO | MFP_PULL_HIGH,    /* IRQ */
+
+        /* SSP for I2S */
+        GPIO85_SSP1_SCLK,
+        GPIO89_SSP1_EXTCLK,
+        GPIO86_SSP1_FRM,
+        GPIO87_SSP1_TXD,
+        GPIO88_SSP1_RXD,
+        GPIO90_SSP1_SYSCLK,
+
+        /* SSP2 for S/PDIF */
+        GPIO25_SSP2_SCLK,
+        GPIO26_SSP2_FRM,
+        GPIO27_SSP2_TXD,
+        GPIO29_SSP2_EXTCLK,
+
+        /* LEDs */
+        GPIO35_GPIO | MFP_LPM_PULL_LOW,
+        GPIO36_GPIO | MFP_LPM_DRIVE_HIGH,
+};
+
+static mfp_cfg_t raumfeld_speaker_pin_config[] __initdata = {
+        /* UART1 */
+        GPIO77_UART1_RXD,
+        GPIO78_UART1_TXD,
+        GPIO79_UART1_CTS,
+        GPIO81_UART1_DSR,
+        GPIO83_UART1_DTR,
+        GPIO84_UART1_RTS,
+
+        /* UART3 */
+        GPIO110_UART3_RXD,
+
+        /* USB Host */
+        GPIO0_2_USBH_PEN,
+        GPIO1_2_USBH_PWR,
+
+        /* I2C */
+        GPIO21_I2C_SCL | MFP_LPM_FLOAT | MFP_PULL_FLOAT,
+        GPIO22_I2C_SDA | MFP_LPM_FLOAT | MFP_PULL_FLOAT,
+
+        /* SPI */
+        GPIO34_GPIO,    /* SPDIF_CS */
+        GPIO96_GPIO,    /* MCLK_CS */
+        GPIO125_GPIO,   /* ACCEL_CS */
+
+        /* MMC */
+        GPIO3_MMC1_DAT0,
+        GPIO4_MMC1_DAT1,
+        GPIO5_MMC1_DAT2,
+        GPIO6_MMC1_DAT3,
+        GPIO7_MMC1_CLK,
+        GPIO8_MMC1_CMD,
+
+        /* Ethernet */
+        GPIO1_nCS2,                     /* CS */
+        GPIO40_GPIO | MFP_PULL_HIGH,    /* IRQ */
+
+        /* SSP for I2S */
+        GPIO85_SSP1_SCLK,
+        GPIO89_SSP1_EXTCLK,
+        GPIO86_SSP1_FRM,
+        GPIO87_SSP1_TXD,
+        GPIO88_SSP1_RXD,
+        GPIO90_SSP1_SYSCLK,
+
+        /* LEDs */
+        GPIO35_GPIO | MFP_LPM_PULL_LOW,
+        GPIO36_GPIO | MFP_LPM_DRIVE_HIGH,
+};
+
+/*
+ * SMSC LAN9220 Ethernet
+ */
+
+static struct resource smc91x_resources[] = {
+        {
+                .start  = PXA3xx_CS2_PHYS,
+                .end    = PXA3xx_CS2_PHYS + 0xfffff,
+                .flags  = IORESOURCE_MEM,
+        },
+        {
+                .start  = gpio_to_irq(GPIO_ETH_IRQ),
+                .end    = gpio_to_irq(GPIO_ETH_IRQ),
+                .flags  = IORESOURCE_IRQ | IRQF_TRIGGER_FALLING,
+        }
+};
+
+static struct smsc911x_platform_config raumfeld_smsc911x_config = {
+        .phy_interface  = PHY_INTERFACE_MODE_MII,
+        .irq_polarity   = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
+        .irq_type       = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
+        .flags          = SMSC911X_USE_32BIT | SMSC911X_SAVE_MAC_ADDRESS,
+};
+
+static struct platform_device smc91x_device = {
+        .name           = "smsc911x",
+        .id             = -1,
+        .num_resources  = ARRAY_SIZE(smc91x_resources),
+        .resource       = smc91x_resources,
+        .dev            = {
+                .platform_data = &raumfeld_smsc911x_config,
+        }
+};
+
+/**
+ * NAND
+ */
+
+static struct mtd_partition raumfeld_nand_partitions[] = {
+        {
+                .name           = "Bootloader",
+                .offset         = 0,
+                .size           = 0xa0000,
+                .mask_flags     = MTD_WRITEABLE, /* force read-only */
+        },
+        {
+                .name           = "BootloaderEnvironment",
+                .offset         = 0xa0000,
+                .size           = 0x20000,
+        },
+        {
+                .name           = "BootloaderSplashScreen",
+                .offset         = 0xc0000,
+                .size           = 0x60000,
+        },
+        {
+                .name           = "UBI",
+                .offset         = 0x120000,
+                .size           = MTDPART_SIZ_FULL,
+        },
+};
+
+static struct pxa3xx_nand_platform_data raumfeld_nand_info = {
+        .enable_arbiter = 1,
+        .keep_config    = 1,
+        .parts          = raumfeld_nand_partitions,
+        .nr_parts       = ARRAY_SIZE(raumfeld_nand_partitions),
+};
+
+/**
+ * USB (OHCI) support
+ */
+
+static struct pxaohci_platform_data raumfeld_ohci_info = {
+        .port_mode      = PMM_GLOBAL_MODE,
+        .flags          = ENABLE_PORT1,
+};
+
+/**
+ * Rotary encoder input device
+ */
+
+static struct rotary_encoder_platform_data raumfeld_rotary_encoder_info = {
+        .steps          = 24,
+        .axis           = REL_X,
+        .relative_axis  = 1,
+        .gpio_a         = GPIO_VOLENC_A,
+        .gpio_b         = GPIO_VOLENC_B,
+        .inverted_a     = 1,
+        .inverted_b     = 0,
+};
+
+static struct platform_device rotary_encoder_device = {
+        .name           = "rotary-encoder",
+        .id             = 0,
+        .dev            = {
+                .platform_data = &raumfeld_rotary_encoder_info,
+        }
+};
+
+/**
+ * GPIO buttons
+ */
+
+static struct gpio_keys_button gpio_keys_button[] = {
+        {
+                .code                   = KEY_F1,
+                .type                   = EV_KEY,
+                .gpio                   = GPIO_KEY1,
+                .active_low             = 1,
+                .wakeup                 = 0,
+                .debounce_interval      = 5, /* ms */
+                .desc                   = "Button 1",
+        },
+        {
+                .code                   = KEY_F2,
+                .type                   = EV_KEY,
+                .gpio                   = GPIO_KEY2,
+                .active_low             = 1,
+                .wakeup                 = 0,
+                .debounce_interval      = 5, /* ms */
+                .desc                   = "Button 2",
+        },
+        {
+                .code                   = KEY_F3,
+                .type                   = EV_KEY,
+                .gpio                   = GPIO_KEY3,
+                .active_low             = 1,
+                .wakeup                 = 0,
+                .debounce_interval      = 5, /* ms */
+                .desc                   = "Button 3",
+        },
+        {
+                .code                   = KEY_F4,
+                .type                   = EV_KEY,
+                .gpio                   = GPIO_RESCUE_BOOT,
+                .active_low             = 0,
+                .wakeup                 = 0,
+                .debounce_interval      = 5, /* ms */
+                .desc                   = "rescue boot button",
+        },
+        {
+                .code                   = KEY_F5,
+                .type                   = EV_KEY,
+                .gpio                   = GPIO_DOCK_DETECT,
+                .active_low             = 1,
+                .wakeup                 = 0,
+                .debounce_interval      = 5, /* ms */
+                .desc                   = "dock detect",
+        },
+        {
+                .code                   = KEY_F6,
+                .type                   = EV_KEY,
+                .gpio                   = GPIO_ON_OFF,
+                .active_low             = 0,
+                .wakeup                 = 0,
+                .debounce_interval      = 5, /* ms */
+                .desc                   = "on/off button",
+        },
+};
+
+static struct gpio_keys_platform_data gpio_keys_platform_data = {
+        .buttons        = gpio_keys_button,
+        .nbuttons       = ARRAY_SIZE(gpio_keys_button),
+        .rep            = 0,
+};
+
+static struct platform_device raumfeld_gpio_keys_device = {
+        .name   = "gpio-keys",
+        .id     = -1,
+        .dev    = {
+                .platform_data  = &gpio_keys_platform_data,
+        }
+};
+
+/**
+ * GPIO LEDs
+ */
+
+static struct gpio_led raumfeld_leds[] = {
+        {
+                .name           = "raumfeld:1",
+                .gpio           = GPIO_LED1,
+                .active_low     = 1,
+                .default_state  = LEDS_GPIO_DEFSTATE_ON,
+        },
+        {
+                .name           = "raumfeld:2",
+                .gpio           = GPIO_LED2,
+                .active_low     = 0,
+                .default_state  = LEDS_GPIO_DEFSTATE_OFF,
+        }
+};
+
+static struct gpio_led_platform_data raumfeld_led_platform_data = {
+        .leds           = raumfeld_leds,
+        .num_leds       = ARRAY_SIZE(raumfeld_leds),
+};
+
+static struct platform_device raumfeld_led_device = {
+        .name   = "leds-gpio",
+        .id     = -1,
+        .dev    = {
+                .platform_data = &raumfeld_led_platform_data,
+        },
+};
+
+/**
+ * One-wire (W1 bus) support
+ */
+
+static void w1_enable_external_pullup(int enable)
+{
+        gpio_set_value(GPIO_W1_PULLUP_ENABLE, enable);
+        msleep(100);
+}
+
+static struct w1_gpio_platform_data w1_gpio_platform_data = {
+        .pin                    = GPIO_ONE_WIRE,
+        .is_open_drain          = 0,
+        .enable_external_pullup = w1_enable_external_pullup,
+};
+
+struct platform_device raumfeld_w1_gpio_device = {
+        .name   = "w1-gpio",
+        .dev    = {
+                .platform_data = &w1_gpio_platform_data
+        }
+};
+
+static void __init raumfeld_w1_init(void)
+{
+        int ret = gpio_request(GPIO_W1_PULLUP_ENABLE,
+                                "W1 external pullup enable");
+
+        if (ret < 0)
+                pr_warning("Unable to request GPIO_W1_PULLUP_ENABLE\n");
+        else
+                gpio_direction_output(GPIO_W1_PULLUP_ENABLE, 0);
+
+        platform_device_register(&raumfeld_w1_gpio_device);
+}
+
+/**
+ * Framebuffer device
+ */
+
+/* PWM controlled backlight */
+static struct platform_pwm_backlight_data raumfeld_pwm_backlight_data = {
+        .pwm_id         = 0,
+        .max_brightness = 100,
+        .dft_brightness = 100,
+        /* 10000 ns = 10 ms ^= 100 kHz */
+        .pwm_period_ns  = 10000,
+};
+
+static struct platform_device raumfeld_pwm_backlight_device = {
+        .name   = "pwm-backlight",
+        .dev    = {
+                .parent         = &pxa27x_device_pwm0.dev,
+                .platform_data  = &raumfeld_pwm_backlight_data,
+        }
+};
+
+/* LT3593 controlled backlight */
+static struct gpio_led raumfeld_lt3593_led = {
+        .name           = "backlight",
+        .gpio           = mfp_to_gpio(MFP_PIN_GPIO17),
+        .default_state  = LEDS_GPIO_DEFSTATE_ON,
+};
+
+static struct gpio_led_platform_data raumfeld_lt3593_platform_data = {
+        .leds           = &raumfeld_lt3593_led,
+        .num_leds       = 1,
+};
+
+static struct platform_device raumfeld_lt3593_device = {
+        .name   = "leds-lt3593",
+        .id     = -1,
+        .dev    = {
+                .platform_data = &raumfeld_lt3593_platform_data,
+        },
+};
+
+static struct pxafb_mode_info sharp_lq043t3dx02_mode = {
+        .pixclock       = 111000,
+        .xres           = 480,
+        .yres           = 272,
+        .bpp            = 16,
+        .hsync_len      = 4,
+        .left_margin    = 2,
+        .right_margin   = 1,
+        .vsync_len      = 1,
+        .upper_margin   = 3,
+        .lower_margin   = 1,
+        .sync           = 0,
+};
+
+static struct pxafb_mach_info raumfeld_sharp_lcd_info = {
+        .modes          = &sharp_lq043t3dx02_mode,
+        .num_modes      = 1,
+        .video_mem_size = 0x400000,
+        .lcd_conn       = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL,
+};
+
+static void __init raumfeld_lcd_init(void)
+{
+        int ret;
+
+        set_pxa_fb_info(&raumfeld_sharp_lcd_info);
+
+        /* Earlier devices had the backlight regulator controlled
+         * via PWM, later versions use another controller for that */
+        if ((system_rev & 0xff) < 2) {
+                mfp_cfg_t raumfeld_pwm_pin_config = GPIO17_PWM0_OUT;
+                pxa3xx_mfp_config(&raumfeld_pwm_pin_config, 1);
+                platform_device_register(&raumfeld_pwm_backlight_device);
+        } else
+                platform_device_register(&raumfeld_lt3593_device);
+
+        ret = gpio_request(GPIO_TFT_VA_EN, "display VA enable");
+        if (ret < 0)
+                pr_warning("Unable to request GPIO_TFT_VA_EN\n");
+        else
+                gpio_direction_output(GPIO_TFT_VA_EN, 1);
+
+        ret = gpio_request(GPIO_DISPLAY_ENABLE, "display enable");
+        if (ret < 0)
+                pr_warning("Unable to request GPIO_DISPLAY_ENABLE\n");
+        else
+                gpio_direction_output(GPIO_DISPLAY_ENABLE, 1);
+}
+
+/**
+ * SPI devices
+ */
+
+struct spi_gpio_platform_data raumfeld_spi_platform_data = {
+        .sck            = GPIO_SPI_CLK,
+        .mosi           = GPIO_SPI_MOSI,
+        .miso           = GPIO_SPI_MISO,
+        .num_chipselect = 3,
+};
+
+static struct platform_device raumfeld_spi_device = {
+        .name   = "spi_gpio",
+        .id     = 0,
+        .dev    = {
+                .platform_data  = &raumfeld_spi_platform_data,
+        }
+};
+
+static struct lis3lv02d_platform_data lis3_pdata = {
+        .click_flags    = LIS3_CLICK_SINGLE_X |
+                          LIS3_CLICK_SINGLE_Y |
+                          LIS3_CLICK_SINGLE_Z,
+        .irq_cfg        = LIS3_IRQ1_CLICK | LIS3_IRQ2_CLICK,
+        .wakeup_flags   = LIS3_WAKEUP_X_LO | LIS3_WAKEUP_X_HI |
+                          LIS3_WAKEUP_Y_LO | LIS3_WAKEUP_Y_HI |
+                          LIS3_WAKEUP_Z_LO | LIS3_WAKEUP_Z_HI,
+        .wakeup_thresh  = 10,
+        .click_thresh_x = 10,
+        .click_thresh_y = 10,
+        .click_thresh_z = 10,
+};
+
+#define SPI_AK4104      \
+{                       \
+        .modalias       = "ak4104",     \
+        .max_speed_hz   = 10000,        \
+        .bus_num        = 0,            \
+        .chip_select    = 0,            \
+        .controller_data = (void *) GPIO_SPDIF_CS,      \
+}
+
+#define SPI_LIS3        \
+{                       \
+        .modalias       = "lis3lv02d_spi",      \
+        .max_speed_hz   = 1000000,              \
+        .bus_num        = 0,                    \
+        .chip_select    = 1,                    \
+        .controller_data = (void *) GPIO_ACCEL_CS,      \
+        .platform_data  = &lis3_pdata,          \
+        .irq            = gpio_to_irq(GPIO_ACCEL_IRQ),  \
+}
+
+#define SPI_DAC7512     \
+{       \
+        .modalias       = "dac7512",            \
+        .max_speed_hz   = 1000000,              \
+        .bus_num        = 0,                    \
+        .chip_select    = 2,                    \
+        .controller_data = (void *) GPIO_MCLK_DAC_CS,   \
+}
+
+static struct spi_board_info connector_spi_devices[] __initdata = {
+        SPI_AK4104,
+        SPI_DAC7512,
+};
+
+static struct spi_board_info speaker_spi_devices[] __initdata = {
+        SPI_DAC7512,
+};
+
+static struct spi_board_info controller_spi_devices[] __initdata = {
+        SPI_LIS3,
+};
+
+/**
+ * MMC for Marvell Libertas 8688 via SDIO
+ */
+
+static int raumfeld_mci_init(struct device *dev, irq_handler_t isr, void *data)
+{
+        gpio_set_value(GPIO_W2W_RESET, 1);
+        gpio_set_value(GPIO_W2W_PDN, 1);
+
+        return 0;
+}
+
+static void raumfeld_mci_exit(struct device *dev, void *data)
+{
+        gpio_set_value(GPIO_W2W_RESET, 0);
+        gpio_set_value(GPIO_W2W_PDN, 0);
+}
+
+static struct pxamci_platform_data raumfeld_mci_platform_data = {
+        .init                   = raumfeld_mci_init,
+        .exit                   = raumfeld_mci_exit,
+        .detect_delay           = 20,
+        .gpio_card_detect       = -1,
+        .gpio_card_ro           = -1,
+        .gpio_power             = -1,
+};
+
+/*
+ * External power / charge logic
+ */
+
+static int power_supply_init(struct device *dev)
+{
+        return 0;
+}
+
+static void power_supply_exit(struct device *dev)
+{
+}
+
+static int raumfeld_is_ac_online(void)
+{
+        return !gpio_get_value(GPIO_CHARGE_DC_OK);
+}
+
+static int raumfeld_is_usb_online(void)
+{
+        return 0;
+}
+
+static char *raumfeld_power_supplicants[] = { "ds2760-battery.0" };
+
+static struct pda_power_pdata power_supply_info = {
+        .init                   = power_supply_init,
+        .is_ac_online           = raumfeld_is_ac_online,
+        .is_usb_online          = raumfeld_is_usb_online,
+        .exit                   = power_supply_exit,
+        .supplied_to            = raumfeld_power_supplicants,
+        .num_supplicants        = ARRAY_SIZE(raumfeld_power_supplicants)
+};
+
+static struct resource power_supply_resources[] = {
+        {
+                .name  = "ac",
+                .flags = IORESOURCE_IRQ |
+                         IORESOURCE_IRQ_HIGHEDGE | IORESOURCE_IRQ_LOWEDGE,
+                .start = GPIO_CHARGE_DC_OK,
+                .end   = GPIO_CHARGE_DC_OK,
+        },
+};
+
+static irqreturn_t charge_done_irq(int irq, void *dev_id)
+{
+        struct power_supply *psy;
+
+        psy = power_supply_get_by_name("ds2760-battery.0");
+
+        if (psy)
+                power_supply_set_battery_charged(psy);
+
+        return IRQ_HANDLED;
+}
+
+static struct platform_device raumfeld_power_supply = {
+        .name = "pda-power",
+        .id   = -1,
+        .dev  = {
+                .platform_data = &power_supply_info,
+        },
+        .resource      = power_supply_resources,
+        .num_resources = ARRAY_SIZE(power_supply_resources),
+};
+
+static void __init raumfeld_power_init(void)
+{
+        int ret;
+
+        /* Set PEN2 high to enable maximum charge current */
+        ret = gpio_request(GPIO_CHRG_PEN2, "CHRG_PEN2");
+        if (ret < 0)
+                pr_warning("Unable to request GPIO_CHRG_PEN2\n");
+        else
+                gpio_direction_output(GPIO_CHRG_PEN2, 1);
+
+        ret = gpio_request(GPIO_CHARGE_DC_OK, "CABLE_DC_OK");
+        if (ret < 0)
+                pr_warning("Unable to request GPIO_CHARGE_DC_OK\n");
+
+        ret = gpio_request(GPIO_CHARGE_USB_SUSP, "CHARGE_USB_SUSP");
+        if (ret < 0)
+                pr_warning("Unable to request GPIO_CHARGE_USB_SUSP\n");
+        else
+                gpio_direction_output(GPIO_CHARGE_USB_SUSP, 0);
+
+        power_supply_resources[0].start = gpio_to_irq(GPIO_CHARGE_DC_OK);
+        power_supply_resources[0].end = gpio_to_irq(GPIO_CHARGE_DC_OK);
+
+        ret = request_irq(gpio_to_irq(GPIO_CHARGE_DONE),
+                        &charge_done_irq, IORESOURCE_IRQ_LOWEDGE,
+                        "charge_done", NULL);
+
+        if (ret < 0)
+                printk(KERN_ERR "%s: unable to register irq %d\n", __func__,
+                        GPIO_CHARGE_DONE);
+        else
+                platform_device_register(&raumfeld_power_supply);
+}
+
+/* Fixed regulator for AUDIO_VA, 0-0048 maps to the cs4270 codec device */
+
+static struct regulator_consumer_supply audio_va_consumer_supply =
+        REGULATOR_SUPPLY("va", "0-0048");
+
+struct regulator_init_data audio_va_initdata = {
+        .consumer_supplies = &audio_va_consumer_supply,
+        .num_consumer_supplies = 1,
+        .constraints = {
+                .valid_ops_mask = REGULATOR_CHANGE_STATUS,
+        },
+};
+
+static struct fixed_voltage_config audio_va_config = {
+        .supply_name            = "audio_va",
+        .microvolts             = 5000000,
+        .gpio                   = GPIO_AUDIO_VA_ENABLE,
+        .enable_high            = 1,
+        .enabled_at_boot        = 0,
+        .init_data              = &audio_va_initdata,
+};
+
+static struct platform_device audio_va_device = {
+        .name   = "reg-fixed-voltage",
+        .id     = 0,
+        .dev    = {
+                .platform_data = &audio_va_config,
+        },
+};
+
+/* Dummy supplies for Codec's VD/VLC */
+
+static struct regulator_consumer_supply audio_dummy_supplies[] = {
+        REGULATOR_SUPPLY("vd", "0-0048"),
+        REGULATOR_SUPPLY("vlc", "0-0048"),
+};
+
+struct regulator_init_data audio_dummy_initdata = {
+        .consumer_supplies = audio_dummy_supplies,
+        .num_consumer_supplies = ARRAY_SIZE(audio_dummy_supplies),
+        .constraints = {
+                .valid_ops_mask = REGULATOR_CHANGE_STATUS,
+        },
+};
+
+static struct fixed_voltage_config audio_dummy_config = {
+        .supply_name            = "audio_vd",
+        .microvolts             = 3300000,
+        .gpio                   = -1,
+        .init_data              = &audio_dummy_initdata,
+};
+
+static struct platform_device audio_supply_dummy_device = {
+        .name   = "reg-fixed-voltage",
+        .id     = 1,
+        .dev    = {
+                .platform_data = &audio_dummy_config,
+        },
+};
+
+static struct platform_device *audio_regulator_devices[] = {
+        &audio_va_device,
+        &audio_supply_dummy_device,
+};
+
+/**
+ * Regulator support via MAX8660
+ */
+
+static struct regulator_consumer_supply vcc_mmc_supply =
+        REGULATOR_SUPPLY("vmmc", "pxa2xx-mci.0");
+
+static struct regulator_init_data vcc_mmc_init_data = {
+        .constraints = {
+                .min_uV                 = 3300000,
+                .max_uV                 = 3300000,
+                .valid_modes_mask       = REGULATOR_MODE_NORMAL,
+                .valid_ops_mask         = REGULATOR_CHANGE_STATUS |
+                                          REGULATOR_CHANGE_VOLTAGE |
+                                          REGULATOR_CHANGE_MODE,
+        },
+        .consumer_supplies = &vcc_mmc_supply,
+        .num_consumer_supplies = 1,
+};
+
+struct max8660_subdev_data max8660_v6_subdev_data = {
+        .id             = MAX8660_V6,
+        .name           = "vmmc",
+        .platform_data  = &vcc_mmc_init_data,
+};
+
+static struct max8660_platform_data max8660_pdata = {
+        .subdevs = &max8660_v6_subdev_data,
+        .num_subdevs = 1,
+};
+
+/**
+ * I2C devices
+ */
+
+static struct i2c_board_info raumfeld_pwri2c_board_info = {
+        .type           = "max8660",
+        .addr           = 0x34,
+        .platform_data  = &max8660_pdata,
+};
+
+static struct i2c_board_info raumfeld_connector_i2c_board_info __initdata = {
+        .type   = "cs4270",
+        .addr   = 0x48,
+};
+
+static struct eeti_ts_platform_data eeti_ts_pdata = {
+        .irq_active_high = 1,
+};
+
+static struct i2c_board_info raumfeld_controller_i2c_board_info __initdata = {
+        .type   = "eeti_ts",
+        .addr   = 0x0a,
+        .irq    = gpio_to_irq(GPIO_TOUCH_IRQ),
+        .platform_data = &eeti_ts_pdata,
+};
+
+static struct platform_device *raumfeld_common_devices[] = {
+        &raumfeld_gpio_keys_device,
+        &raumfeld_led_device,
+        &raumfeld_spi_device,
+};
+
+static void __init raumfeld_audio_init(void)
+{
+        int ret;
+
+        ret = gpio_request(GPIO_CODEC_RESET, "cs4270 reset");
+        if (ret < 0)
+                pr_warning("unable to request GPIO_CODEC_RESET\n");
+        else
+                gpio_direction_output(GPIO_CODEC_RESET, 1);
+
+        ret = gpio_request(GPIO_SPDIF_RESET, "ak4104 s/pdif reset");
+        if (ret < 0)
+                pr_warning("unable to request GPIO_SPDIF_RESET\n");
+        else
+                gpio_direction_output(GPIO_SPDIF_RESET, 1);
+
+        ret = gpio_request(GPIO_MCLK_RESET, "MCLK reset");
+        if (ret < 0)
+                pr_warning("unable to request GPIO_MCLK_RESET\n");
+        else
+                gpio_direction_output(GPIO_MCLK_RESET, 1);
+
+        platform_add_devices(ARRAY_AND_SIZE(audio_regulator_devices));
+}
+
+static void __init raumfeld_common_init(void)
+{
+        int ret;
+
+        /* The on/off button polarity has changed after revision 1 */
+        if ((system_rev & 0xff) > 1) {
+                int i;
+
+                for (i = 0; i < ARRAY_SIZE(gpio_keys_button); i++)
+                        if (!strcmp(gpio_keys_button[i].desc, "on/off button"))
+                                gpio_keys_button[i].active_low = 1;
+        }
+
+        enable_irq_wake(IRQ_WAKEUP0);
+
+        pxa3xx_set_nand_info(&raumfeld_nand_info);
+        pxa3xx_set_i2c_power_info(NULL);
+        pxa_set_ohci_info(&raumfeld_ohci_info);
+        pxa_set_mci_info(&raumfeld_mci_platform_data);
+        pxa_set_i2c_info(NULL);
+        pxa_set_ffuart_info(NULL);
+
+        ret = gpio_request(GPIO_W2W_RESET, "Wi2Wi reset");
+        if (ret < 0)
+                pr_warning("Unable to request GPIO_W2W_RESET\n");
+        else
+                gpio_direction_output(GPIO_W2W_RESET, 0);
+
+        ret = gpio_request(GPIO_W2W_PDN, "Wi2Wi powerup");
+        if (ret < 0)
+                pr_warning("Unable to request GPIO_W2W_PDN\n");
+        else
+                gpio_direction_output(GPIO_W2W_PDN, 0);
+
+        /* this can be used to switch off the device */
+        ret = gpio_request(GPIO_SHUTDOWN_SUPPLY,
+                                "supply shutdown");
+        if (ret < 0)
+                pr_warning("Unable to request GPIO_SHUTDOWN_SUPPLY\n");
+        else
+                gpio_direction_output(GPIO_SHUTDOWN_SUPPLY, 0);
+
+        platform_add_devices(ARRAY_AND_SIZE(raumfeld_common_devices));
+        i2c_register_board_info(1, &raumfeld_pwri2c_board_info, 1);
+}
+
+static void __init raumfeld_controller_init(void)
+{
+        int ret;
+
+        pxa3xx_mfp_config(ARRAY_AND_SIZE(raumfeld_controller_pin_config));
+        platform_device_register(&rotary_encoder_device);
+        spi_register_board_info(ARRAY_AND_SIZE(controller_spi_devices));
+        i2c_register_board_info(0, &raumfeld_controller_i2c_board_info, 1);
+
+        ret = gpio_request(GPIO_SHUTDOWN_BATT, "battery shutdown");
+        if (ret < 0)
+                pr_warning("Unable to request GPIO_SHUTDOWN_BATT\n");
+        else
+                gpio_direction_output(GPIO_SHUTDOWN_BATT, 0);
+
+        raumfeld_common_init();
+        raumfeld_power_init();
+        raumfeld_lcd_init();
+        raumfeld_w1_init();
+}
+
+static void __init raumfeld_connector_init(void)
+{
+        pxa3xx_mfp_config(ARRAY_AND_SIZE(raumfeld_connector_pin_config));
+        spi_register_board_info(ARRAY_AND_SIZE(connector_spi_devices));
+        i2c_register_board_info(0, &raumfeld_connector_i2c_board_info, 1);
+
+        platform_device_register(&smc91x_device);
+
+        raumfeld_audio_init();
+        raumfeld_common_init();
+}
+
+static void __init raumfeld_speaker_init(void)
+{
+        pxa3xx_mfp_config(ARRAY_AND_SIZE(raumfeld_speaker_pin_config));
+        spi_register_board_info(ARRAY_AND_SIZE(speaker_spi_devices));
+        i2c_register_board_info(0, &raumfeld_connector_i2c_board_info, 1);
+
+        platform_device_register(&smc91x_device);
+        platform_device_register(&rotary_encoder_device);
+
+        raumfeld_audio_init();
+        raumfeld_common_init();
+}
+
+/* physical memory regions */
+#define RAUMFELD_SDRAM_BASE     0xa0000000      /* SDRAM region */
+
+#ifdef CONFIG_MACH_RAUMFELD_RC
+MACHINE_START(RAUMFELD_RC, "Raumfeld Controller")
+        .phys_io        = 0x40000000,
+        .io_pg_offst    = (io_p2v(0x40000000) >> 18) & 0xfffc,
+        .boot_params    = RAUMFELD_SDRAM_BASE + 0x100,
+        .init_machine   = raumfeld_controller_init,
+        .map_io         = pxa_map_io,
+        .init_irq       = pxa3xx_init_irq,
+        .timer          = &pxa_timer,
+MACHINE_END
+#endif
+
+#ifdef CONFIG_MACH_RAUMFELD_CONNECTOR
+MACHINE_START(RAUMFELD_CONNECTOR, "Raumfeld Connector")
+        .phys_io        = 0x40000000,
+        .io_pg_offst    = (io_p2v(0x40000000) >> 18) & 0xfffc,
+        .boot_params    = RAUMFELD_SDRAM_BASE + 0x100,
+        .init_machine   = raumfeld_connector_init,
+        .map_io         = pxa_map_io,
+        .init_irq       = pxa3xx_init_irq,
+        .timer          = &pxa_timer,
+MACHINE_END
+#endif
+
+#ifdef CONFIG_MACH_RAUMFELD_SPEAKER
+MACHINE_START(RAUMFELD_SPEAKER, "Raumfeld Speaker")
+        .phys_io        = 0x40000000,
+        .io_pg_offst    = (io_p2v(0x40000000) >> 18) & 0xfffc,
+        .boot_params    = RAUMFELD_SDRAM_BASE + 0x100,
+        .init_machine   = raumfeld_speaker_init,
+        .map_io         = pxa_map_io,
+        .init_irq       = pxa3xx_init_irq,
+        .timer          = &pxa_timer,
+MACHINE_END
+#endif
diff --git a/arch/arm/mach-pxa/spitz.c b/arch/arm/mach-pxa/spitz.c
index 28352c0b8c34..19b5109d9808 100644
--- a/arch/arm/mach-pxa/spitz.c
+++ b/arch/arm/mach-pxa/spitz.c
@@ -56,25 +56,7 @@ static unsigned long spitz_pin_config[] __initdata = {
         GPIO80_nCS_4,   /* SCOOP #1 */
 
         /* LCD - 16bpp Active TFT */
-        GPIO58_LCD_LDD_0,
-        GPIO59_LCD_LDD_1,
-        GPIO60_LCD_LDD_2,
-        GPIO61_LCD_LDD_3,
-        GPIO62_LCD_LDD_4,
-        GPIO63_LCD_LDD_5,
-        GPIO64_LCD_LDD_6,
-        GPIO65_LCD_LDD_7,
-        GPIO66_LCD_LDD_8,
-        GPIO67_LCD_LDD_9,
-        GPIO68_LCD_LDD_10,
-        GPIO69_LCD_LDD_11,
-        GPIO70_LCD_LDD_12,
-        GPIO71_LCD_LDD_13,
-        GPIO72_LCD_LDD_14,
-        GPIO73_LCD_LDD_15,
-        GPIO74_LCD_FCLK,
-        GPIO75_LCD_LCLK,
-        GPIO76_LCD_PCLK,
+        GPIOxx_LCD_TFT_16BPP,
 
         /* PC Card */
         GPIO48_nPOE,
diff --git a/arch/arm/mach-pxa/ssp.c b/arch/arm/mach-pxa/ssp.c
index 9ebe658590fa..a81d6dbf662d 100644
--- a/arch/arm/mach-pxa/ssp.c
+++ b/arch/arm/mach-pxa/ssp.c
@@ -35,6 +35,8 @@
 #include <mach/ssp.h>
 #include <mach/regs-ssp.h>
 
+#ifdef CONFIG_PXA_SSP_LEGACY
+
 #define TIMEOUT 100000
 
 static irqreturn_t ssp_interrupt(int irq, void *dev_id)
@@ -303,6 +305,7 @@ void ssp_exit(struct ssp_dev *dev)
         clk_disable(ssp->clk);
         ssp_free(ssp);
 }
+#endif /* CONFIG_PXA_SSP_LEGACY */
 
 static DEFINE_MUTEX(ssp_lock);
 static LIST_HEAD(ssp_list);
@@ -488,6 +491,7 @@ static void __exit pxa_ssp_exit(void)
 arch_initcall(pxa_ssp_init);
 module_exit(pxa_ssp_exit);
 
+#ifdef CONFIG_PXA_SSP_LEGACY
 EXPORT_SYMBOL(ssp_write_word);
 EXPORT_SYMBOL(ssp_read_word);
 EXPORT_SYMBOL(ssp_flush);
@@ -498,6 +502,7 @@ EXPORT_SYMBOL(ssp_restore_state);
 EXPORT_SYMBOL(ssp_init);
 EXPORT_SYMBOL(ssp_exit);
 EXPORT_SYMBOL(ssp_config);
+#endif
 
 MODULE_DESCRIPTION("PXA SSP driver");
 MODULE_AUTHOR("Liam Girdwood");
diff --git a/arch/arm/mach-pxa/time.c b/arch/arm/mach-pxa/time.c
index 750c448db672..293e40aeaf29 100644
--- a/arch/arm/mach-pxa/time.c
+++ b/arch/arm/mach-pxa/time.c
@@ -76,14 +76,12 @@ pxa_ost0_interrupt(int irq, void *dev_id)
 static int
 pxa_osmr0_set_next_event(unsigned long delta, struct clock_event_device *dev)
 {
-        unsigned long flags, next, oscr;
+        unsigned long next, oscr;
 
-        raw_local_irq_save(flags);
         OIER |= OIER_E0;
         next = OSCR + delta;
         OSMR0 = next;
         oscr = OSCR;
-        raw_local_irq_restore(flags);
 
         return (signed)(next - oscr) <= MIN_OSCR_DELTA ? -ETIME : 0;
 }
@@ -91,23 +89,17 @@ pxa_osmr0_set_next_event(unsigned long delta, struct clock_event_device *dev)
 static void
 pxa_osmr0_set_mode(enum clock_event_mode mode, struct clock_event_device *dev)
 {
-        unsigned long irqflags;
-
         switch (mode) {
         case CLOCK_EVT_MODE_ONESHOT:
-                raw_local_irq_save(irqflags);
                 OIER &= ~OIER_E0;
                 OSSR = OSSR_M0;
-                raw_local_irq_restore(irqflags);
                 break;
 
         case CLOCK_EVT_MODE_UNUSED:
         case CLOCK_EVT_MODE_SHUTDOWN:
                 /* initializing, released, or preparing for suspend */
-                raw_local_irq_save(irqflags);
                 OIER &= ~OIER_E0;
                 OSSR = OSSR_M0;
-                raw_local_irq_restore(irqflags);
                 break;
 
         case CLOCK_EVT_MODE_RESUME:
diff --git a/arch/arm/mach-pxa/tosa.c b/arch/arm/mach-pxa/tosa.c
index c854c168a451..ad552791c4ce 100644
--- a/arch/arm/mach-pxa/tosa.c
+++ b/arch/arm/mach-pxa/tosa.c
@@ -32,6 +32,7 @@
 #include <linux/gpio.h>
 #include <linux/pda_power.h>
 #include <linux/spi/spi.h>
+#include <linux/input/matrix_keypad.h>
 
 #include <asm/setup.h>
 #include <asm/mach-types.h>
@@ -131,24 +132,24 @@ static unsigned long tosa_pin_config[] = {
         GPIO45_BTUART_RTS,
 
         /* Keybd */
-        GPIO58_GPIO | MFP_LPM_DRIVE_LOW,
-        GPIO59_GPIO | MFP_LPM_DRIVE_LOW,
-        GPIO60_GPIO | MFP_LPM_DRIVE_LOW,
-        GPIO61_GPIO | MFP_LPM_DRIVE_LOW,
-        GPIO62_GPIO | MFP_LPM_DRIVE_LOW,
-        GPIO63_GPIO | MFP_LPM_DRIVE_LOW,
-        GPIO64_GPIO | MFP_LPM_DRIVE_LOW,
-        GPIO65_GPIO | MFP_LPM_DRIVE_LOW,
-        GPIO66_GPIO | MFP_LPM_DRIVE_LOW,
-        GPIO67_GPIO | MFP_LPM_DRIVE_LOW,
-        GPIO68_GPIO | MFP_LPM_DRIVE_LOW,
-        GPIO69_GPIO | MFP_LPM_DRIVE_LOW,
-        GPIO70_GPIO | MFP_LPM_DRIVE_LOW,
-        GPIO71_GPIO | MFP_LPM_DRIVE_LOW,
-        GPIO72_GPIO | MFP_LPM_DRIVE_LOW,
-        GPIO73_GPIO | MFP_LPM_DRIVE_LOW,
-        GPIO74_GPIO | MFP_LPM_DRIVE_LOW,
-        GPIO75_GPIO | MFP_LPM_DRIVE_LOW,
+        GPIO58_GPIO | MFP_LPM_DRIVE_LOW,        /* Column 0 */
+        GPIO59_GPIO | MFP_LPM_DRIVE_LOW,        /* Column 1 */
+        GPIO60_GPIO | MFP_LPM_DRIVE_LOW,        /* Column 2 */
+        GPIO61_GPIO | MFP_LPM_DRIVE_LOW,        /* Column 3 */
+        GPIO62_GPIO | MFP_LPM_DRIVE_LOW,        /* Column 4 */
+        GPIO63_GPIO | MFP_LPM_DRIVE_LOW,        /* Column 5 */
+        GPIO64_GPIO | MFP_LPM_DRIVE_LOW,        /* Column 6 */
+        GPIO65_GPIO | MFP_LPM_DRIVE_LOW,        /* Column 7 */
+        GPIO66_GPIO | MFP_LPM_DRIVE_LOW,        /* Column 8 */
+        GPIO67_GPIO | MFP_LPM_DRIVE_LOW,        /* Column 9 */
+        GPIO68_GPIO | MFP_LPM_DRIVE_LOW,        /* Column 10 */
+        GPIO69_GPIO | MFP_LPM_DRIVE_LOW,        /* Row 0 */
+        GPIO70_GPIO | MFP_LPM_DRIVE_LOW,        /* Row 1 */
+        GPIO71_GPIO | MFP_LPM_DRIVE_LOW,        /* Row 2 */
+        GPIO72_GPIO | MFP_LPM_DRIVE_LOW,        /* Row 3 */
+        GPIO73_GPIO | MFP_LPM_DRIVE_LOW,        /* Row 4 */
+        GPIO74_GPIO | MFP_LPM_DRIVE_LOW,        /* Row 5 */
+        GPIO75_GPIO | MFP_LPM_DRIVE_LOW,        /* Row 6 */
 
         /* SPI */
         GPIO81_SSP2_CLK_OUT,
@@ -411,9 +412,87 @@ static struct platform_device tosa_power_device = {
 /*
  * Tosa Keyboard
  */
+static const uint32_t tosakbd_keymap[] = {
+        KEY(0, 2, KEY_W),
+        KEY(0, 6, KEY_K),
+        KEY(0, 7, KEY_BACKSPACE),
+        KEY(0, 8, KEY_P),
+        KEY(1, 1, KEY_Q),
+        KEY(1, 2, KEY_E),
+        KEY(1, 3, KEY_T),
+        KEY(1, 4, KEY_Y),
+        KEY(1, 6, KEY_O),
+        KEY(1, 7, KEY_I),
+        KEY(1, 8, KEY_COMMA),
+        KEY(2, 1, KEY_A),
+        KEY(2, 2, KEY_D),
+        KEY(2, 3, KEY_G),
+        KEY(2, 4, KEY_U),
+        KEY(2, 6, KEY_L),
+        KEY(2, 7, KEY_ENTER),
+        KEY(2, 8, KEY_DOT),
+        KEY(3, 1, KEY_Z),
+        KEY(3, 2, KEY_C),
+        KEY(3, 3, KEY_V),
+        KEY(3, 4, KEY_J),
+        KEY(3, 5, TOSA_KEY_ADDRESSBOOK),
+        KEY(3, 6, TOSA_KEY_CANCEL),
+        KEY(3, 7, TOSA_KEY_CENTER),
+        KEY(3, 8, TOSA_KEY_OK),
+        KEY(3, 9, KEY_LEFTSHIFT),
+        KEY(4, 1, KEY_S),
+        KEY(4, 2, KEY_R),
+        KEY(4, 3, KEY_B),
+        KEY(4, 4, KEY_N),
+        KEY(4, 5, TOSA_KEY_CALENDAR),
+        KEY(4, 6, TOSA_KEY_HOMEPAGE),
+        KEY(4, 7, KEY_LEFTCTRL),
+        KEY(4, 8, TOSA_KEY_LIGHT),
+        KEY(4, 10, KEY_RIGHTSHIFT),
+        KEY(5, 1, KEY_TAB),
+        KEY(5, 2, KEY_SLASH),
+        KEY(5, 3, KEY_H),
+        KEY(5, 4, KEY_M),
+        KEY(5, 5, TOSA_KEY_MENU),
+        KEY(5, 7, KEY_UP),
+        KEY(5, 11, TOSA_KEY_FN),
+        KEY(6, 1, KEY_X),
+        KEY(6, 2, KEY_F),
+        KEY(6, 3, KEY_SPACE),
+        KEY(6, 4, KEY_APOSTROPHE),
+        KEY(6, 5, TOSA_KEY_MAIL),
+        KEY(6, 6, KEY_LEFT),
+        KEY(6, 7, KEY_DOWN),
+        KEY(6, 8, KEY_RIGHT),
+};
+
+static struct matrix_keymap_data tosakbd_keymap_data = {
+        .keymap         = tosakbd_keymap,
+        .keymap_size    = ARRAY_SIZE(tosakbd_keymap),
+};
+
+static const int tosakbd_col_gpios[] =
+                        { 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68 };
+static const int tosakbd_row_gpios[] =
+                        { 69, 70, 71, 72, 73, 74, 75 };
+
+static struct matrix_keypad_platform_data tosakbd_pdata = {
+        .keymap_data            = &tosakbd_keymap_data,
+        .row_gpios              = tosakbd_row_gpios,
+        .col_gpios              = tosakbd_col_gpios,
+        .num_row_gpios          = ARRAY_SIZE(tosakbd_row_gpios),
+        .num_col_gpios          = ARRAY_SIZE(tosakbd_col_gpios),
+        .col_scan_delay_us      = 10,
+        .debounce_ms            = 10,
+        .wakeup                 = 1,
+};
+
 static struct platform_device tosakbd_device = {
-        .name           = "tosa-keyboard",
+        .name           = "matrix-keypad",
         .id             = -1,
+        .dev            = {
+                .platform_data = &tosakbd_pdata,
+        },
 };
 
 static struct gpio_keys_button tosa_gpio_keys[] = {
diff --git a/arch/arm/mach-pxa/trizeps4.c b/arch/arm/mach-pxa/trizeps4.c
index 0aa858ebc573..797f2544d0ce 100644
--- a/arch/arm/mach-pxa/trizeps4.c
+++ b/arch/arm/mach-pxa/trizeps4.c
@@ -72,27 +72,14 @@ static unsigned long trizeps4_pin_config[] __initdata = {
         GPIO79_nCS_3,           /* Logic CS */
         GPIO0_GPIO | WAKEUP_ON_EDGE_RISE,       /* Logic irq */
 
+        /* AC97 */
+        GPIO28_AC97_BITCLK,
+        GPIO29_AC97_SDATA_IN_0,
+        GPIO30_AC97_SDATA_OUT,
+        GPIO31_AC97_SYNC,
+
         /* LCD - 16bpp Active TFT */
-        GPIO58_LCD_LDD_0,
-        GPIO59_LCD_LDD_1,
-        GPIO60_LCD_LDD_2,
-        GPIO61_LCD_LDD_3,
-        GPIO62_LCD_LDD_4,
-        GPIO63_LCD_LDD_5,
-        GPIO64_LCD_LDD_6,
-        GPIO65_LCD_LDD_7,
-        GPIO66_LCD_LDD_8,
-        GPIO67_LCD_LDD_9,
-        GPIO68_LCD_LDD_10,
-        GPIO69_LCD_LDD_11,
-        GPIO70_LCD_LDD_12,
-        GPIO71_LCD_LDD_13,
-        GPIO72_LCD_LDD_14,
-        GPIO73_LCD_LDD_15,
-        GPIO74_LCD_FCLK,
-        GPIO75_LCD_LCLK,
-        GPIO76_LCD_PCLK,
-        GPIO77_LCD_BIAS,
+        GPIOxx_LCD_TFT_16BPP,
 
         /* UART */
         GPIO9_FFUART_CTS,
diff --git a/arch/arm/mach-pxa/viper.c b/arch/arm/mach-pxa/viper.c
index 89f258c9e126..1dd13346f977 100644
--- a/arch/arm/mach-pxa/viper.c
+++ b/arch/arm/mach-pxa/viper.c
@@ -281,7 +281,7 @@ static void viper_irq_handler(unsigned int irq, struct irq_desc *desc)
         do {
                 /* we're in a chained irq handler,
                  * so ack the interrupt by hand */
-                GEDR(VIPER_CPLD_GPIO) = GPIO_bit(VIPER_CPLD_GPIO);
+                desc->chip->ack(irq);
 
                 if (likely(pending)) {
                         irq = viper_bit_to_irq(__ffs(pending));
@@ -711,6 +711,12 @@ static mfp_cfg_t viper_pin_config[] __initdata = {
         GPIO80_nCS_4,
         GPIO33_nCS_5,
 
+        /* AC97 */
+        GPIO28_AC97_BITCLK,
+        GPIO29_AC97_SDATA_IN_0,
+        GPIO30_AC97_SDATA_OUT,
+        GPIO31_AC97_SYNC,
+
         /* FP Backlight */
         GPIO9_GPIO,                             /* VIPER_BCKLIGHT_EN_GPIO */
         GPIO10_GPIO,                            /* VIPER_LCD_EN_GPIO */
diff --git a/arch/arm/mach-pxa/zeus.c b/arch/arm/mach-pxa/zeus.c
index 75f2a37f945d..39896d883584 100644
--- a/arch/arm/mach-pxa/zeus.c
+++ b/arch/arm/mach-pxa/zeus.c
@@ -26,6 +26,7 @@
 #include <linux/i2c.h>
 #include <linux/i2c/pca953x.h>
 #include <linux/apm-emulation.h>
+#include <linux/can/platform/mcp251x.h>
 
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
@@ -387,11 +388,47 @@ static struct pxa2xx_spi_master pxa2xx_spi_ssp3_master_info = {
         .enable_dma     = 1,
 };
 
-static struct platform_device pxa2xx_spi_ssp3_device = {
-        .name = "pxa2xx-spi",
-        .id = 3,
-        .dev = {
-                .platform_data = &pxa2xx_spi_ssp3_master_info,
+/* CAN bus on SPI */
+static int zeus_mcp2515_setup(struct spi_device *sdev)
+{
+        int err;
+
+        err = gpio_request(ZEUS_CAN_SHDN_GPIO, "CAN shutdown");
+        if (err)
+                return err;
+
+        err = gpio_direction_output(ZEUS_CAN_SHDN_GPIO, 1);
+        if (err) {
+                gpio_free(ZEUS_CAN_SHDN_GPIO);
+                return err;
+        }
+
+        return 0;
+}
+
+static int zeus_mcp2515_transceiver_enable(int enable)
+{
+        gpio_set_value(ZEUS_CAN_SHDN_GPIO, !enable);
+        return 0;
+}
+
+static struct mcp251x_platform_data zeus_mcp2515_pdata = {
+        .oscillator_frequency   = 16*1000*1000,
+        .model                  = CAN_MCP251X_MCP2515,
+        .board_specific_setup   = zeus_mcp2515_setup,
+        .transceiver_enable     = zeus_mcp2515_transceiver_enable,
+        .power_enable           = zeus_mcp2515_transceiver_enable,
+};
+
+static struct spi_board_info zeus_spi_board_info[] = {
+        [0] = {
+                .modalias       = "mcp251x",
+                .platform_data  = &zeus_mcp2515_pdata,
+                .irq            = gpio_to_irq(ZEUS_CAN_GPIO),
+                .max_speed_hz   = 1*1000*1000,
+                .bus_num        = 3,
+                .mode           = SPI_MODE_0,
+                .chip_select    = 0,
         },
 };
 
@@ -457,15 +494,28 @@ static struct platform_device zeus_pcmcia_device = {
         },
 };
 
+static struct resource zeus_max6369_resource = {
+        .start          = ZEUS_CPLD_EXTWDOG_PHYS,
+        .end            = ZEUS_CPLD_EXTWDOG_PHYS,
+        .flags          = IORESOURCE_MEM,
+};
+
+struct platform_device zeus_max6369_device = {
+        .name           = "max6369_wdt",
+        .id             = -1,
+        .resource       = &zeus_max6369_resource,
+        .num_resources  = 1,
+};
+
 static struct platform_device *zeus_devices[] __initdata = {
         &zeus_serial_device,
         &zeus_mtd_devices[0],
         &zeus_dm9k0_device,
         &zeus_dm9k1_device,
         &zeus_sram_device,
-        &pxa2xx_spi_ssp3_device,
         &zeus_leds_device,
         &zeus_pcmcia_device,
+        &zeus_max6369_device,
 };
 
 /* AC'97 */
@@ -509,7 +559,9 @@ static void zeus_ohci_exit(struct device *dev)
 
 static struct pxaohci_platform_data zeus_ohci_platform_data = {
         .port_mode      = PMM_NPS_MODE,
-        .flags          = ENABLE_PORT_ALL | POWER_CONTROL_LOW | POWER_SENSE_LOW,
+        /* Clear Power Control Polarity Low and set Power Sense
+         * Polarity Low. Supply power to USB ports. */
+        .flags          = ENABLE_PORT_ALL | POWER_SENSE_LOW,
         .init           = zeus_ohci_init,
         .exit           = zeus_ohci_exit,
 };
@@ -621,11 +673,15 @@ static struct pxa2xx_udc_mach_info zeus_udc_info = {
         .udc_command = zeus_udc_command,
 };
 
+#ifdef CONFIG_PM
 static void zeus_power_off(void)
 {
         local_irq_disable();
         pxa27x_cpu_suspend(PWRMODE_DEEPSLEEP);
 }
+#else
+#define zeus_power_off   NULL
+#endif
 
 #ifdef CONFIG_APM_EMULATION
 static void zeus_get_power_status(struct apm_power_info *info)
@@ -706,6 +762,12 @@ static struct i2c_board_info __initdata zeus_i2c_devices[] = {
 };
 
 static mfp_cfg_t zeus_pin_config[] __initdata = {
+        /* AC97 */
+        GPIO28_AC97_BITCLK,
+        GPIO29_AC97_SDATA_IN_0,
+        GPIO30_AC97_SDATA_OUT,
+        GPIO31_AC97_SYNC,
+
         GPIO15_nCS_1,
         GPIO78_nCS_2,
         GPIO80_nCS_4,
@@ -731,6 +793,11 @@ static mfp_cfg_t zeus_pin_config[] __initdata = {
         GPIO104_CIF_DD_2,
         GPIO105_CIF_DD_1,
 
+        GPIO81_SSP3_TXD,
+        GPIO82_SSP3_RXD,
+        GPIO83_SSP3_SFRM,
+        GPIO84_SSP3_SCLK,
+
         GPIO48_nPOE,
         GPIO49_nPWE,
         GPIO50_nPIOR,
@@ -785,6 +852,8 @@ static void __init zeus_init(void)
         pxa_set_ac97_info(&zeus_ac97_info);
         pxa_set_i2c_info(NULL);
         i2c_register_board_info(0, ARRAY_AND_SIZE(zeus_i2c_devices));
+        pxa2xx_set_spi_info(3, &pxa2xx_spi_ssp3_master_info);
+        spi_register_board_info(zeus_spi_board_info, ARRAY_SIZE(zeus_spi_board_info));
 }
 
 static struct map_desc zeus_io_desc[] __initdata = {
@@ -807,12 +876,6 @@ static struct map_desc zeus_io_desc[] __initdata = {
                 .type    = MT_DEVICE,
         },
         {
-                .virtual = ZEUS_CPLD_EXTWDOG,
-                .pfn     = __phys_to_pfn(ZEUS_CPLD_EXTWDOG_PHYS),
-                .length  = 0x1000,
-                .type    = MT_DEVICE,
-        },
-        {
                 .virtual = ZEUS_PC104IO,
                 .pfn     = __phys_to_pfn(ZEUS_PC104IO_PHYS),
                 .length  = 0x00800000,
@@ -837,7 +900,7 @@ static void __init zeus_map_io(void)
         PCFR = PCFR_OPDE | PCFR_DC_EN | PCFR_FS | PCFR_FP;
 }
 
-MACHINE_START(ARCOM_ZEUS, "Arcom ZEUS")
+MACHINE_START(ARCOM_ZEUS, "Arcom/Eurotech ZEUS")
         /* Maintainer: Marc Zyngier <maz@misterjones.org> */
         .phys_io        = 0x40000000,
         .io_pg_offst    = ((io_p2v(0x40000000) >> 18) & 0xfffc),
diff --git a/arch/arm/mach-s3c2410/dma.c b/arch/arm/mach-s3c2410/dma.c
index 63b753f56c64..0d8e043804c2 100644
--- a/arch/arm/mach-s3c2410/dma.c
+++ b/arch/arm/mach-s3c2410/dma.c
@@ -21,7 +21,7 @@
 #include <mach/dma.h>
 
 #include <plat/cpu.h>
-#include <plat/dma-plat.h>
+#include <plat/dma-s3c24xx.h>
 
 #include <plat/regs-serial.h>
 #include <mach/regs-gpio.h>
diff --git a/arch/arm/mach-s3c2410/include/mach/gpio-core.h b/arch/arm/mach-s3c2410/include/mach/gpio-track.h
index f8b879a7973c..acb259103808 100644
--- a/arch/arm/mach-s3c2410/include/mach/gpio-core.h
+++ b/arch/arm/mach-s3c2410/include/mach/gpio-track.h
@@ -15,7 +15,6 @@
 #ifndef __ASM_ARCH_GPIO_CORE_H
 #define __ASM_ARCH_GPIO_CORE_H __FILE__
 
-#include <plat/gpio-core.h>
 #include <mach/regs-gpio.h>
 
 extern struct s3c_gpio_chip s3c24xx_gpios[];
diff --git a/arch/arm/plat-s3c24xx/include/plat/pm-core.h b/arch/arm/mach-s3c2410/include/mach/pm-core.h
index fb45dd9adca5..70a83b209e25 100644
--- a/arch/arm/plat-s3c24xx/include/plat/pm-core.h
+++ b/arch/arm/mach-s3c2410/include/mach/pm-core.h
@@ -1,4 +1,4 @@
-/* linux/arch/arm/plat-s3c24xx/include/plat/pll.h
+/* linux/arch/arm/mach-s3c2410/include/pm-core.h
  *
  * Copyright 2008 Simtec Electronics
  *      Ben Dooks <ben@simtec.co.uk>
diff --git a/arch/arm/mach-s3c2410/include/mach/regs-gpio.h b/arch/arm/mach-s3c2410/include/mach/regs-gpio.h
index ebc85c6dadbf..fd672f330bf2 100644
--- a/arch/arm/mach-s3c2410/include/mach/regs-gpio.h
+++ b/arch/arm/mach-s3c2410/include/mach/regs-gpio.h
@@ -406,31 +406,31 @@
 #define S3C2443_GPE5_SD1_CLK   (0x02 << 10)
 #define S3C2400_GPE5_EINT5     (0x02 << 10)
 #define S3C2400_GPE5_TCLK1     (0x03 << 10)
+#define S3C2443_GPE5_AC_BITCLK (0x03 << 10)
 
 #define S3C2410_GPE6_SDCMD     (0x02 << 12)
 #define S3C2443_GPE6_SD1_CMD   (0x02 << 12)
-#define S3C2443_GPE6_AC_BITCLK (0x03 << 12)
+#define S3C2443_GPE6_AC_SDI    (0x03 << 12)
 #define S3C2400_GPE6_EINT6     (0x02 << 12)
 
 #define S3C2410_GPE7_SDDAT0    (0x02 << 14)
 #define S3C2443_GPE5_SD1_DAT0  (0x02 << 14)
-#define S3C2443_GPE7_AC_SDI    (0x03 << 14)
+#define S3C2443_GPE7_AC_SDO    (0x03 << 14)
 #define S3C2400_GPE7_EINT7     (0x02 << 14)
 
 #define S3C2410_GPE8_SDDAT1    (0x02 << 16)
 #define S3C2443_GPE8_SD1_DAT1  (0x02 << 16)
-#define S3C2443_GPE8_AC_SDO    (0x03 << 16)
+#define S3C2443_GPE8_AC_SYNC   (0x03 << 16)
 #define S3C2400_GPE8_nXDACK0   (0x02 << 16)
 
 #define S3C2410_GPE9_SDDAT2    (0x02 << 18)
 #define S3C2443_GPE9_SD1_DAT2  (0x02 << 18)
-#define S3C2443_GPE9_AC_SYNC   (0x03 << 18)
+#define S3C2443_GPE9_AC_nRESET (0x03 << 18)
 #define S3C2400_GPE9_nXDACK1   (0x02 << 18)
 #define S3C2400_GPE9_nXBACK    (0x03 << 18)
 
 #define S3C2410_GPE10_SDDAT3   (0x02 << 20)
 #define S3C2443_GPE10_SD1_DAT3 (0x02 << 20)
-#define S3C2443_GPE10_AC_nRESET (0x03 << 20)
 #define S3C2400_GPE10_nXDREQ0  (0x02 << 20)
 
 #define S3C2410_GPE11_SPIMISO0 (0x02 << 22)
diff --git a/arch/arm/mach-s3c2410/include/mach/regs-s3c2443-clock.h b/arch/arm/mach-s3c2410/include/mach/regs-s3c2443-clock.h
index 6026d091a2fe..d87ebe0cb625 100644
--- a/arch/arm/mach-s3c2410/include/mach/regs-s3c2443-clock.h
+++ b/arch/arm/mach-s3c2410/include/mach/regs-s3c2443-clock.h
@@ -42,23 +42,14 @@
 
 #define S3C2443_PLLCON_OFF              (1<<24)
 
-#define S3C2443_CLKSRC_I2S_EXT          (1<<14)
-#define S3C2443_CLKSRC_I2S_EPLLDIV      (0<<14)
-#define S3C2443_CLKSRC_I2S_EPLLREF      (2<<14)
-#define S3C2443_CLKSRC_I2S_EPLLREF3     (3<<14)
-#define S3C2443_CLKSRC_I2S_MASK         (3<<14)
-
 #define S3C2443_CLKSRC_EPLLREF_XTAL     (2<<7)
 #define S3C2443_CLKSRC_EPLLREF_EXTCLK   (3<<7)
 #define S3C2443_CLKSRC_EPLLREF_MPLLREF  (0<<7)
 #define S3C2443_CLKSRC_EPLLREF_MPLLREF2 (1<<7)
 #define S3C2443_CLKSRC_EPLLREF_MASK     (3<<7)
 
-#define S3C2443_CLKSRC_ESYSCLK_EPLL     (1<<6)
-#define S3C2443_CLKSRC_MSYSCLK_MPLL     (1<<4)
 #define S3C2443_CLKSRC_EXTCLK_DIV       (1<<3)
 
-#define S3C2443_CLKDIV0_DVS             (1<<13)
 #define S3C2443_CLKDIV0_HALF_HCLK       (1<<3)
 #define S3C2443_CLKDIV0_HALF_PCLK       (1<<2)
 
@@ -81,28 +72,7 @@
 #define S3C2443_CLKDIV0_ARMDIV_12       (13<<9)
 #define S3C2443_CLKDIV0_ARMDIV_16       (15<<9)
 
-/* S3C2443_CLKDIV1 */
-
-#define S3C2443_CLKDIV1_CAMDIV_MASK     (15<<26)
-#define S3C2443_CLKDIV1_CAMDIV_SHIFT    (26)
-
-#define S3C2443_CLKDIV1_HSSPIDIV_MASK   (3<<24)
-#define S3C2443_CLKDIV1_HSSPIDIV_SHIFT  (24)
-
-#define S3C2443_CLKDIV1_DISPDIV_MASK    (0xff<<16)
-#define S3C2443_CLKDIV1_DISPDIV_SHIFT   (16)
-
-#define S3C2443_CLKDIV1_I2SDIV_MASK     (15<<12)
-#define S3C2443_CLKDIV1_I2SDIV_SHIFT    (12)
-
-#define S3C2443_CLKDIV1_UARTDIV_MASK    (15<<8)
-#define S3C2443_CLKDIV1_UARTDIV_SHIFT   (8)
-
-#define S3C2443_CLKDIV1_HSMMCDIV_MASK   (3<<6)
-#define S3C2443_CLKDIV1_HSMMCDIV_SHIFT  (6)
-
-#define S3C2443_CLKDIV1_USBHOSTDIV_MASK (3<<4)
-#define S3C2443_CLKDIV1_USBHOSTDIV_SHIFT (4)
+/* S3C2443_CLKDIV1 removed, only used in clock.c code */
 
 #define S3C2443_CLKCON_NAND
 
diff --git a/arch/arm/mach-s3c2410/include/mach/spi-gpio.h b/arch/arm/mach-s3c2410/include/mach/spi-gpio.h
index 980a099e209c..dcef2287cb38 100644
--- a/arch/arm/mach-s3c2410/include/mach/spi-gpio.h
+++ b/arch/arm/mach-s3c2410/include/mach/spi-gpio.h
@@ -3,7 +3,7 @@
  * Copyright (c) 2006 Simtec Electronics
  *      Ben Dooks <ben@simtec.co.uk>
  *
- * S3C2410 - SPI Controller platfrom_device info
+ * S3C2410 - SPI Controller platform_device info
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License version 2 as
diff --git a/arch/arm/plat-s3c/include/mach/timex.h b/arch/arm/mach-s3c2410/include/mach/timex.h
index 2a425ed0a7e0..fe9ca1ffd51b 100644
--- a/arch/arm/plat-s3c/include/mach/timex.h
+++ b/arch/arm/mach-s3c2410/include/mach/timex.h
@@ -19,8 +19,6 @@
  * for the time conversion functions to/from jiffies is acceptable.
 */
 
-
 #define CLOCK_TICK_RATE 12000000
 
-
 #endif /* __ASM_ARCH_TIMEX_H */
diff --git a/arch/arm/plat-s3c/include/mach/vmalloc.h b/arch/arm/mach-s3c2410/include/mach/vmalloc.h
index 299d95f365c9..315b0078a34d 100644
--- a/arch/arm/plat-s3c/include/mach/vmalloc.h
+++ b/arch/arm/mach-s3c2410/include/mach/vmalloc.h
@@ -1,4 +1,4 @@
-/* arch/arm/plat-s3c/include/mach/vmalloc.h
+/* arch/arm/mach-s3c2410/include/mach/vmalloc.h
  *
  * from arch/arm/mach-iop3xx/include/mach/vmalloc.h
  *
@@ -15,6 +15,6 @@
 #ifndef __ASM_ARCH_VMALLOC_H
 #define __ASM_ARCH_VMALLOC_H
 
-#define VMALLOC_END       (0xe0000000UL)
+#define VMALLOC_END       (0xE0000000)
 
 #endif /* __ASM_ARCH_VMALLOC_H */
diff --git a/arch/arm/mach-s3c2410/mach-amlm5900.c b/arch/arm/mach-s3c2410/mach-amlm5900.c
index 06a84adfb13f..7047317ed7f4 100644
--- a/arch/arm/mach-s3c2410/mach-amlm5900.c
+++ b/arch/arm/mach-s3c2410/mach-amlm5900.c
@@ -153,7 +153,7 @@ static struct platform_device *amlm5900_devices[] __initdata = {
         &s3c_device_adc,
         &s3c_device_wdt,
         &s3c_device_i2c0,
-        &s3c_device_usb,
+        &s3c_device_ohci,
         &s3c_device_rtc,
         &s3c_device_usbgadget,
         &s3c_device_sdi,
diff --git a/arch/arm/mach-s3c2410/mach-bast.c b/arch/arm/mach-s3c2410/mach-bast.c
index 97162fdd0590..02b1b6220cba 100644
--- a/arch/arm/mach-s3c2410/mach-bast.c
+++ b/arch/arm/mach-s3c2410/mach-bast.c
@@ -584,7 +584,7 @@ static struct s3c_hwmon_pdata bast_hwmon_info = {
 // cat /sys/devices/platform/s3c24xx-adc/s3c-hwmon/in_0
 
 static struct platform_device *bast_devices[] __initdata = {
-        &s3c_device_usb,
+        &s3c_device_ohci,
         &s3c_device_lcd,
         &s3c_device_wdt,
         &s3c_device_i2c0,
diff --git a/arch/arm/mach-s3c2410/mach-h1940.c b/arch/arm/mach-s3c2410/mach-h1940.c
index 1e34abe1a19e..fbedd0760941 100644
--- a/arch/arm/mach-s3c2410/mach-h1940.c
+++ b/arch/arm/mach-s3c2410/mach-h1940.c
@@ -196,7 +196,7 @@ static struct platform_device h1940_device_bluetooth = {
         .id               = -1,
 };
 
-static struct s3c24xx_mci_pdata h1940_mmc_cfg = {
+static struct s3c24xx_mci_pdata h1940_mmc_cfg __initdata = {
         .gpio_detect   = S3C2410_GPF(5),
         .gpio_wprotect = S3C2410_GPH(8),
         .set_power     = NULL,
@@ -272,7 +272,7 @@ static struct platform_device h1940_lcd_powerdev = {
 
 static struct platform_device *h1940_devices[] __initdata = {
         &s3c_device_ts,
-        &s3c_device_usb,
+        &s3c_device_ohci,
         &s3c_device_lcd,
         &s3c_device_wdt,
         &s3c_device_i2c0,
@@ -311,12 +311,11 @@ static void __init h1940_init(void)
         u32 tmp;
 
         s3c24xx_fb_set_platdata(&h1940_fb_info);
+        s3c24xx_mci_set_platdata(&h1940_mmc_cfg);
         s3c24xx_udc_set_platdata(&h1940_udc_cfg);
         s3c24xx_ts_set_platdata(&h1940_ts_cfg);
         s3c_i2c0_set_platdata(NULL);
 
-        s3c_device_sdi.dev.platform_data = &h1940_mmc_cfg;
-
         /* Turn off suspend on both USB ports, and switch the
          * selectable USB port to USB device mode. */
 
diff --git a/arch/arm/mach-s3c2410/mach-n30.c b/arch/arm/mach-s3c2410/mach-n30.c
index 0405712c2263..684710f88142 100644
--- a/arch/arm/mach-s3c2410/mach-n30.c
+++ b/arch/arm/mach-s3c2410/mach-n30.c
@@ -322,7 +322,7 @@ static struct platform_device *n30_devices[] __initdata = {
         &s3c_device_wdt,
         &s3c_device_i2c0,
         &s3c_device_iis,
-        &s3c_device_usb,
+        &s3c_device_ohci,
         &s3c_device_usbgadget,
         &n30_button_device,
         &n30_blue_led,
diff --git a/arch/arm/mach-s3c2410/mach-otom.c b/arch/arm/mach-s3c2410/mach-otom.c
index f6c7261a4a12..d8c7f2efc1a7 100644
--- a/arch/arm/mach-s3c2410/mach-otom.c
+++ b/arch/arm/mach-s3c2410/mach-otom.c
@@ -92,7 +92,7 @@ static struct platform_device otom_device_nor = {
 /* Standard OTOM devices */
 
 static struct platform_device *otom11_devices[] __initdata = {
-        &s3c_device_usb,
+        &s3c_device_ohci,
         &s3c_device_lcd,
         &s3c_device_wdt,
         &s3c_device_i2c0,
diff --git a/arch/arm/mach-s3c2410/mach-qt2410.c b/arch/arm/mach-s3c2410/mach-qt2410.c
index ab092bcda393..92a4ec375d82 100644
--- a/arch/arm/mach-s3c2410/mach-qt2410.c
+++ b/arch/arm/mach-s3c2410/mach-qt2410.c
@@ -246,7 +246,7 @@ static struct platform_device qt2410_spi = {
 /* Board devices */
 
 static struct platform_device *qt2410_devices[] __initdata = {
-        &s3c_device_usb,
+        &s3c_device_ohci,
         &s3c_device_lcd,
         &s3c_device_wdt,
         &s3c_device_i2c0,
diff --git a/arch/arm/mach-s3c2410/mach-smdk2410.c b/arch/arm/mach-s3c2410/mach-smdk2410.c
index c49126ccb1d5..452223042201 100644
--- a/arch/arm/mach-s3c2410/mach-smdk2410.c
+++ b/arch/arm/mach-s3c2410/mach-smdk2410.c
@@ -87,7 +87,7 @@ static struct s3c2410_uartcfg smdk2410_uartcfgs[] __initdata = {
 };
 
 static struct platform_device *smdk2410_devices[] __initdata = {
-        &s3c_device_usb,
+        &s3c_device_ohci,
         &s3c_device_lcd,
         &s3c_device_wdt,
         &s3c_device_i2c0,
diff --git a/arch/arm/mach-s3c2410/mach-tct_hammer.c b/arch/arm/mach-s3c2410/mach-tct_hammer.c
index 8fdb0430bd48..929164a8e9b1 100644
--- a/arch/arm/mach-s3c2410/mach-tct_hammer.c
+++ b/arch/arm/mach-s3c2410/mach-tct_hammer.c
@@ -129,7 +129,7 @@ static struct platform_device *tct_hammer_devices[] __initdata = {
         &s3c_device_adc,
         &s3c_device_wdt,
         &s3c_device_i2c0,
-        &s3c_device_usb,
+        &s3c_device_ohci,
         &s3c_device_rtc,
         &s3c_device_usbgadget,
         &s3c_device_sdi,
diff --git a/arch/arm/mach-s3c2410/mach-vr1000.c b/arch/arm/mach-s3c2410/mach-vr1000.c
index 0d61fb577170..9051f0d31123 100644
--- a/arch/arm/mach-s3c2410/mach-vr1000.c
+++ b/arch/arm/mach-s3c2410/mach-vr1000.c
@@ -334,7 +334,7 @@ static struct i2c_board_info vr1000_i2c_devs[] __initdata = {
 /* devices for this board */
 
 static struct platform_device *vr1000_devices[] __initdata = {
-        &s3c_device_usb,
+        &s3c_device_ohci,
         &s3c_device_lcd,
         &s3c_device_wdt,
         &s3c_device_i2c0,
diff --git a/arch/arm/mach-s3c2410/usb-simtec.c b/arch/arm/mach-s3c2410/usb-simtec.c
index 6b9d0d83a6f9..29bd3d987bec 100644
--- a/arch/arm/mach-s3c2410/usb-simtec.c
+++ b/arch/arm/mach-s3c2410/usb-simtec.c
@@ -91,7 +91,7 @@ static void usb_simtec_enableoc(struct s3c2410_hcd_info *info, int on)
         }
 }
 
-static struct s3c2410_hcd_info usb_simtec_info = {
+static struct s3c2410_hcd_info usb_simtec_info __initdata = {
         .port[0]        = {
                 .flags  = S3C_HCDFLG_USED
         },
@@ -127,6 +127,6 @@ int usb_simtec_init(void)
         gpio_direction_output(S3C2410_GPB(4), 1);
         gpio_direction_input(S3C2410_GPG(10));
 
-        s3c_device_usb.dev.platform_data = &usb_simtec_info;
+        s3c_ohci_set_platdata(&usb_simtec_info);
         return 0;
 }
diff --git a/arch/arm/mach-s3c2412/clock.c b/arch/arm/mach-s3c2412/clock.c
index a037df5e1c2d..0c0505b025cb 100644
--- a/arch/arm/mach-s3c2412/clock.c
+++ b/arch/arm/mach-s3c2412/clock.c
@@ -124,7 +124,9 @@ static struct clk clk_usysclk = {
         .name           = "usysclk",
         .id             = -1,
         .parent         = &clk_xtal,
-        .set_parent     = s3c2412_setparent_usysclk,
+        .ops            = &(struct clk_ops) {
+                .set_parent     = s3c2412_setparent_usysclk,
+        },
 };
 
 static struct clk clk_mrefclk = {
@@ -199,10 +201,12 @@ static int s3c2412_setrate_usbsrc(struct clk *clk, unsigned long rate)
 static struct clk clk_usbsrc = {
         .name           = "usbsrc",
         .id             = -1,
-        .get_rate       = s3c2412_getrate_usbsrc,
-        .set_rate       = s3c2412_setrate_usbsrc,
-        .round_rate     = s3c2412_roundrate_usbsrc,
-        .set_parent     = s3c2412_setparent_usbsrc,
+        .ops            = &(struct clk_ops) {
+                .get_rate       = s3c2412_getrate_usbsrc,
+                .set_rate       = s3c2412_setrate_usbsrc,
+                .round_rate     = s3c2412_roundrate_usbsrc,
+                .set_parent     = s3c2412_setparent_usbsrc,
+        },
 };
 
 static int s3c2412_setparent_msysclk(struct clk *clk, struct clk *parent)
@@ -225,7 +229,9 @@ static int s3c2412_setparent_msysclk(struct clk *clk, struct clk *parent)
 static struct clk clk_msysclk = {
         .name           = "msysclk",
         .id             = -1,
-        .set_parent     = s3c2412_setparent_msysclk,
+        .ops            = &(struct clk_ops) {
+                .set_parent     = s3c2412_setparent_msysclk,
+        },
 };
 
 static int s3c2412_setparent_armclk(struct clk *clk, struct clk *parent)
@@ -264,7 +270,9 @@ static struct clk clk_armclk = {
         .name           = "armclk",
         .id             = -1,
         .parent         = &clk_msysclk,
-        .set_parent     = s3c2412_setparent_armclk,
+        .ops            = &(struct clk_ops) {
+                .set_parent     = s3c2412_setparent_armclk,
+        },
 };
 
 /* these next clocks have an divider immediately after them,
@@ -337,10 +345,12 @@ static int s3c2412_setrate_uart(struct clk *clk, unsigned long rate)
 static struct clk clk_uart = {
         .name           = "uartclk",
         .id             = -1,
-        .get_rate       = s3c2412_getrate_uart,
-        .set_rate       = s3c2412_setrate_uart,
-        .set_parent     = s3c2412_setparent_uart,
-        .round_rate     = s3c2412_roundrate_clksrc,
+        .ops            = &(struct clk_ops) {
+                .get_rate       = s3c2412_getrate_uart,
+                .set_rate       = s3c2412_setrate_uart,
+                .set_parent     = s3c2412_setparent_uart,
+                .round_rate     = s3c2412_roundrate_clksrc,
+        },
 };
 
 static int s3c2412_setparent_i2s(struct clk *clk, struct clk *parent)
@@ -388,10 +398,12 @@ static int s3c2412_setrate_i2s(struct clk *clk, unsigned long rate)
 static struct clk clk_i2s = {
         .name           = "i2sclk",
         .id             = -1,
-        .get_rate       = s3c2412_getrate_i2s,
-        .set_rate       = s3c2412_setrate_i2s,
-        .set_parent     = s3c2412_setparent_i2s,
-        .round_rate     = s3c2412_roundrate_clksrc,
+        .ops            = &(struct clk_ops) {
+                .get_rate       = s3c2412_getrate_i2s,
+                .set_rate       = s3c2412_setrate_i2s,
+                .set_parent     = s3c2412_setparent_i2s,
+                .round_rate     = s3c2412_roundrate_clksrc,
+        },
 };
 
 static int s3c2412_setparent_cam(struct clk *clk, struct clk *parent)
@@ -438,10 +450,12 @@ static int s3c2412_setrate_cam(struct clk *clk, unsigned long rate)
 static struct clk clk_cam = {
         .name           = "camif-upll", /* same as 2440 name */
         .id             = -1,
-        .get_rate       = s3c2412_getrate_cam,
-        .set_rate       = s3c2412_setrate_cam,
-        .set_parent     = s3c2412_setparent_cam,
-        .round_rate     = s3c2412_roundrate_clksrc,
+        .ops            = &(struct clk_ops) {
+                .get_rate       = s3c2412_getrate_cam,
+                .set_rate       = s3c2412_setrate_cam,
+                .set_parent     = s3c2412_setparent_cam,
+                .round_rate     = s3c2412_roundrate_clksrc,
+        },
 };
 
 /* standard clock definitions */
diff --git a/arch/arm/mach-s3c2412/dma.c b/arch/arm/mach-s3c2412/dma.c
index f8d16fc10bc6..e880524904eb 100644
--- a/arch/arm/mach-s3c2412/dma.c
+++ b/arch/arm/mach-s3c2412/dma.c
@@ -20,7 +20,7 @@
 
 #include <mach/dma.h>
 
-#include <plat/dma-plat.h>
+#include <plat/dma-s3c24xx.h>
 #include <plat/cpu.h>
 
 #include <plat/regs-serial.h>
diff --git a/arch/arm/mach-s3c2412/mach-jive.c b/arch/arm/mach-s3c2412/mach-jive.c
index c9fa3fca486c..14f4798291aa 100644
--- a/arch/arm/mach-s3c2412/mach-jive.c
+++ b/arch/arm/mach-s3c2412/mach-jive.c
@@ -468,7 +468,7 @@ static struct i2c_board_info jive_i2c_devs[] __initdata = {
 /* The platform devices being used. */
 
 static struct platform_device *jive_devices[] __initdata = {
-        &s3c_device_usb,
+        &s3c_device_ohci,
         &s3c_device_rtc,
         &s3c_device_wdt,
         &s3c_device_i2c0,
diff --git a/arch/arm/mach-s3c2412/mach-smdk2413.c b/arch/arm/mach-s3c2412/mach-smdk2413.c
index 9a5e43419722..0392065af1af 100644
--- a/arch/arm/mach-s3c2412/mach-smdk2413.c
+++ b/arch/arm/mach-s3c2412/mach-smdk2413.c
@@ -104,8 +104,7 @@ static struct s3c2410_udc_mach_info smdk2413_udc_cfg __initdata = {
 
 
 static struct platform_device *smdk2413_devices[] __initdata = {
-        &s3c_device_usb,
-        //&s3c_device_lcd,
+        &s3c_device_ohci,
         &s3c_device_wdt,
         &s3c_device_i2c0,
         &s3c_device_iis,
diff --git a/arch/arm/mach-s3c2412/mach-vstms.c b/arch/arm/mach-s3c2412/mach-vstms.c
index a6ba591b26bb..3ca9265b6997 100644
--- a/arch/arm/mach-s3c2412/mach-vstms.c
+++ b/arch/arm/mach-s3c2412/mach-vstms.c
@@ -121,7 +121,7 @@ static struct s3c2410_platform_nand __initdata vstms_nand_info = {
 };
 
 static struct platform_device *vstms_devices[] __initdata = {
-        &s3c_device_usb,
+        &s3c_device_ohci,
         &s3c_device_wdt,
         &s3c_device_i2c0,
         &s3c_device_iis,
diff --git a/arch/arm/mach-s3c2440/Kconfig b/arch/arm/mach-s3c2440/Kconfig
index 80879358eb2f..7f465265cf04 100644
--- a/arch/arm/mach-s3c2440/Kconfig
+++ b/arch/arm/mach-s3c2440/Kconfig
@@ -15,14 +15,67 @@ config CPU_S3C2440
         help
           Support for S3C2440 Samsung Mobile CPU based systems.
 
+config CPU_S3C2442
+        bool
+        depends on ARCH_S3C2410
+        select CPU_ARM920T
+        select S3C2410_CLOCK
+        select S3C2410_GPIO
+        select S3C2410_PM if PM
+        select CPU_S3C244X
+        select CPU_LLSERIAL_S3C2440
+        help
+          Support for S3C2442 Samsung Mobile CPU based systems.
+
+config CPU_S3C244X
+        bool
+        depends on ARCH_S3C2410 && (CPU_S3C2440 || CPU_S3C2442)
+        help
+          Support for S3C2440 and S3C2442 Samsung Mobile CPU based systems.
+
+
+
+config S3C2440_CPUFREQ
+        bool "S3C2440/S3C2442 CPU Frequency scaling support"
+        depends on CPU_FREQ_S3C24XX && (CPU_S3C2440 || CPU_S3C2442)
+        select S3C2410_CPUFREQ_UTILS
+        default y
+        help
+          CPU Frequency scaling support for S3C2440 and S3C2442 SoC CPUs.
+
+config S3C2440_XTAL_12000000
+        bool
+        help
+          Indicate that the build needs to support 12MHz system
+          crystal.
+
+config S3C2440_XTAL_16934400
+        bool
+        help
+          Indicate that the build needs to support 16.9344MHz system
+          crystal.
+
+config S3C2440_PLL_12000000
+        bool
+        depends on S3C2440_CPUFREQ && S3C2440_XTAL_12000000
+        default y if CPU_FREQ_S3C24XX_PLL
+        help
+          PLL tables for S3C2440 or S3C2442 CPUs with 12MHz crystals.
+
+config S3C2440_PLL_16934400
+        bool
+        depends on S3C2440_CPUFREQ && S3C2440_XTAL_16934400
+        default y if CPU_FREQ_S3C24XX_PLL
+        help
+          PLL tables for S3C2440 or S3C2442 CPUs with 16.934MHz crystals.
+
 config S3C2440_DMA
         bool
         depends on ARCH_S3C2410 && CPU_S3C24405B
         help
           Support for S3C2440 specific DMA code5A
 
-
-menu "S3C2440 Machines"
+menu "S3C2440 and S3C2442 Machines"
 
 config MACH_ANUBIS
         bool "Simtec Electronics ANUBIS"
@@ -37,6 +90,18 @@ config MACH_ANUBIS
           Say Y here if you are using the Simtec Electronics ANUBIS
           development system
 
+config MACH_NEO1973_GTA02
+        bool "Openmoko GTA02 / Freerunner phone"
+        select CPU_S3C2442
+        select MFD_PCF50633
+        select PCF50633_GPIO
+        select I2C
+        select POWER_SUPPLY
+        select MACH_NEO1973
+        select S3C2410_PWM
+        help
+           Say Y here if you are using the Openmoko GTA02 / Freerunner GSM Phone
+
 config MACH_OSIRIS
         bool "Simtec IM2440D20 (OSIRIS) module"
         select CPU_S3C2440
@@ -94,11 +159,14 @@ config MACH_NEXCODER_2440
 
 config SMDK2440_CPU2440
         bool "SMDK2440 with S3C2440 CPU module"
-        depends on ARCH_S3C2440
         default y if ARCH_S3C2440
         select S3C2440_XTAL_16934400
         select CPU_S3C2440
 
+config SMDK2440_CPU2442
+        bool "SMDM2440 with S3C2442 CPU module"
+        select CPU_S3C2442
+
 config MACH_AT2440EVB
         bool "Avantech AT2440EVB development board"
         select CPU_S3C2440
diff --git a/arch/arm/mach-s3c2440/Makefile b/arch/arm/mach-s3c2440/Makefile
index 5f3224531885..c85ba32d8956 100644
--- a/arch/arm/mach-s3c2440/Makefile
+++ b/arch/arm/mach-s3c2440/Makefile
@@ -10,10 +10,20 @@ obj-n				:=
 obj-                            :=
 
 obj-$(CONFIG_CPU_S3C2440)       += s3c2440.o dsc.o
+obj-$(CONFIG_CPU_S3C2442)       += s3c2442.o
+
 obj-$(CONFIG_CPU_S3C2440)       += irq.o
 obj-$(CONFIG_CPU_S3C2440)       += clock.o
 obj-$(CONFIG_S3C2440_DMA)       += dma.o
 
+obj-$(CONFIG_CPU_S3C244X)       += s3c244x.o
+obj-$(CONFIG_CPU_S3C244X)       += s3c244x-irq.o
+obj-$(CONFIG_CPU_S3C244X)       += s3c244x-clock.o
+obj-$(CONFIG_S3C2440_CPUFREQ)   += s3c2440-cpufreq.o
+
+obj-$(CONFIG_S3C2440_PLL_12000000) += s3c2440-pll-12000000.o
+obj-$(CONFIG_S3C2440_PLL_16934400) += s3c2440-pll-16934400.o
+
 # Machine support
 
 obj-$(CONFIG_MACH_ANUBIS)       += mach-anubis.o
@@ -23,6 +33,7 @@ obj-$(CONFIG_ARCH_S3C2440)	+= mach-smdk2440.o
 obj-$(CONFIG_MACH_NEXCODER_2440) += mach-nexcoder.o
 obj-$(CONFIG_MACH_AT2440EVB) += mach-at2440evb.o
 obj-$(CONFIG_MACH_MINI2440) += mach-mini2440.o
+obj-$(CONFIG_MACH_NEO1973_GTA02) += mach-gta02.o
 
 # extra machine support
 
diff --git a/arch/arm/mach-s3c2440/clock.c b/arch/arm/mach-s3c2440/clock.c
index d1c29b2537cd..3dc2426e2345 100644
--- a/arch/arm/mach-s3c2440/clock.c
+++ b/arch/arm/mach-s3c2440/clock.c
@@ -98,8 +98,10 @@ static struct clk s3c2440_clk_cam = {
 static struct clk s3c2440_clk_cam_upll = {
         .name           = "camif-upll",
         .id             = -1,
-        .set_rate       = s3c2440_camif_upll_setrate,
-        .round_rate     = s3c2440_camif_upll_round,
+        .ops            = &(struct clk_ops) {
+                .set_rate       = s3c2440_camif_upll_setrate,
+                .round_rate     = s3c2440_camif_upll_round,
+        },
 };
 
 static struct clk s3c2440_clk_ac97 = {
diff --git a/arch/arm/mach-s3c2440/dma.c b/arch/arm/mach-s3c2440/dma.c
index e08e081430f0..3b0529f54e9c 100644
--- a/arch/arm/mach-s3c2440/dma.c
+++ b/arch/arm/mach-s3c2440/dma.c
@@ -20,7 +20,7 @@
 #include <mach/map.h>
 #include <mach/dma.h>
 
-#include <plat/dma-plat.h>
+#include <plat/dma-s3c24xx.h>
 #include <plat/cpu.h>
 
 #include <plat/regs-serial.h>
diff --git a/arch/arm/mach-s3c2440/dsc.c b/arch/arm/mach-s3c2440/dsc.c
index 554044272771..9ea66e31f626 100644
--- a/arch/arm/mach-s3c2440/dsc.c
+++ b/arch/arm/mach-s3c2440/dsc.c
@@ -28,7 +28,7 @@
 #include <mach/regs-dsc.h>
 
 #include <plat/cpu.h>
-#include <plat/s3c2440.h>
+#include <plat/s3c244x.h>
 
 int s3c2440_set_dsc(unsigned int pin, unsigned int value)
 {
diff --git a/arch/arm/mach-s3c2442/include/mach/gta02.h b/arch/arm/mach-s3c2440/include/mach/gta02.h
index 953331d8d56a..953331d8d56a 100644
--- a/arch/arm/mach-s3c2442/include/mach/gta02.h
+++ b/arch/arm/mach-s3c2440/include/mach/gta02.h
diff --git a/arch/arm/mach-s3c2440/mach-anubis.c b/arch/arm/mach-s3c2440/mach-anubis.c
index 62a4c3eba97f..b73f78a9da5c 100644
--- a/arch/arm/mach-s3c2440/mach-anubis.c
+++ b/arch/arm/mach-s3c2440/mach-anubis.c
@@ -409,7 +409,7 @@ static struct platform_device anubis_device_sm501 = {
 /* Standard Anubis devices */
 
 static struct platform_device *anubis_devices[] __initdata = {
-        &s3c_device_usb,
+        &s3c_device_ohci,
         &s3c_device_wdt,
         &s3c_device_adc,
         &s3c_device_i2c0,
diff --git a/arch/arm/mach-s3c2440/mach-at2440evb.c b/arch/arm/mach-s3c2440/mach-at2440evb.c
index aa69290e04c6..84725791e6bf 100644
--- a/arch/arm/mach-s3c2440/mach-at2440evb.c
+++ b/arch/arm/mach-s3c2440/mach-at2440evb.c
@@ -165,7 +165,7 @@ static struct platform_device at2440evb_device_eth = {
         },
 };
 
-static struct s3c24xx_mci_pdata at2440evb_mci_pdata = {
+static struct s3c24xx_mci_pdata at2440evb_mci_pdata __initdata = {
         .gpio_detect    = S3C2410_GPG(10),
 };
 
@@ -203,7 +203,7 @@ static struct s3c2410fb_mach_info at2440evb_fb_info __initdata = {
 };
 
 static struct platform_device *at2440evb_devices[] __initdata = {
-        &s3c_device_usb,
+        &s3c_device_ohci,
         &s3c_device_wdt,
         &s3c_device_adc,
         &s3c_device_i2c0,
@@ -216,8 +216,6 @@ static struct platform_device *at2440evb_devices[] __initdata = {
 
 static void __init at2440evb_map_io(void)
 {
-        s3c_device_sdi.dev.platform_data = &at2440evb_mci_pdata;
-
         s3c24xx_init_io(at2440evb_iodesc, ARRAY_SIZE(at2440evb_iodesc));
         s3c24xx_init_clocks(16934400);
         s3c24xx_init_uarts(at2440evb_uartcfgs, ARRAY_SIZE(at2440evb_uartcfgs));
@@ -226,6 +224,7 @@ static void __init at2440evb_map_io(void)
 static void __init at2440evb_init(void)
 {
         s3c24xx_fb_set_platdata(&at2440evb_fb_info);
+        s3c24xx_mci_set_platdata(&at2440evb_mci_pdata);
         s3c_nand_set_platdata(&at2440evb_nand_info);
         s3c_i2c0_set_platdata(NULL);
 
diff --git a/arch/arm/mach-s3c2442/mach-gta02.c b/arch/arm/mach-s3c2440/mach-gta02.c
index 0b4a3a03071f..45799c608d8f 100644
--- a/arch/arm/mach-s3c2442/mach-gta02.c
+++ b/arch/arm/mach-s3c2440/mach-gta02.c
@@ -544,7 +544,7 @@ static struct platform_device gta02_bl_dev = {
 
 
 /* USB */
-static struct s3c2410_hcd_info gta02_usb_info = {
+static struct s3c2410_hcd_info gta02_usb_info __initdata = {
         .port[0]        = {
                 .flags  = S3C_HCDFLG_USED,
         },
@@ -565,7 +565,7 @@ static void __init gta02_map_io(void)
 /* These are the guys that don't need to be children of PMU. */
 
 static struct platform_device *gta02_devices[] __initdata = {
-        &s3c_device_usb,
+        &s3c_device_ohci,
         &s3c_device_wdt,
         &s3c_device_sdi,
         &s3c_device_usbgadget,
@@ -623,9 +623,8 @@ static void __init gta02_machine_init(void)
         INIT_DELAYED_WORK(&gta02_charger_work, gta02_charger_worker);
 #endif
 
-        s3c_device_usb.dev.platform_data = &gta02_usb_info;
-
         s3c24xx_udc_set_platdata(&gta02_udc_cfg);
+        s3c_ohci_set_platdata(&gta02_usb_info);
         s3c_nand_set_platdata(&gta02_nand_info);
         s3c_i2c0_set_platdata(NULL);
 
diff --git a/arch/arm/mach-s3c2440/mach-mini2440.c b/arch/arm/mach-s3c2440/mach-mini2440.c
index 2068e9096a43..571b17683d96 100644
--- a/arch/arm/mach-s3c2440/mach-mini2440.c
+++ b/arch/arm/mach-s3c2440/mach-mini2440.c
@@ -506,9 +506,8 @@ static struct i2c_board_info mini2440_i2c_devs[] __initdata = {
 };
 
 static struct platform_device *mini2440_devices[] __initdata = {
-        &s3c_device_usb,
+        &s3c_device_ohci,
         &s3c_device_wdt,
-/*      &s3c_device_adc,*/ /* ADC doesn't like living with touchscreen ! */
         &s3c_device_i2c0,
         &s3c_device_rtc,
         &s3c_device_usbgadget,
@@ -522,8 +521,6 @@ static struct platform_device *mini2440_devices[] __initdata = {
         &s3c_device_sdi,
         &s3c_device_iis,
         &mini2440_audio,
-/*      &s3c_device_timer[0],*/ /* buzzer pwm, no API for it */
-        /* remaining devices are optional */
 };
 
 static void __init mini2440_map_io(void)
@@ -531,8 +528,6 @@ static void __init mini2440_map_io(void)
         s3c24xx_init_io(mini2440_iodesc, ARRAY_SIZE(mini2440_iodesc));
         s3c24xx_init_clocks(12000000);
         s3c24xx_init_uarts(mini2440_uartcfgs, ARRAY_SIZE(mini2440_uartcfgs));
-
-        s3c_device_sdi.dev.platform_data = &mini2440_mmc_cfg;
 }
 
 /*
@@ -678,6 +673,7 @@ static void __init mini2440_init(void)
         }
 
         s3c24xx_udc_set_platdata(&mini2440_udc_cfg);
+        s3c24xx_mci_set_platdata(&mini2440_mmc_cfg);
         s3c_nand_set_platdata(&mini2440_nand_info);
         s3c_i2c0_set_platdata(NULL);
 
diff --git a/arch/arm/mach-s3c2440/mach-nexcoder.c b/arch/arm/mach-s3c2440/mach-nexcoder.c
index d43edede590e..342041593f22 100644
--- a/arch/arm/mach-s3c2440/mach-nexcoder.c
+++ b/arch/arm/mach-s3c2440/mach-nexcoder.c
@@ -41,7 +41,7 @@
 #include <plat/iic.h>
 
 #include <plat/s3c2410.h>
-#include <plat/s3c2440.h>
+#include <plat/s3c244x.h>
 #include <plat/clock.h>
 #include <plat/devs.h>
 #include <plat/cpu.h>
@@ -106,7 +106,7 @@ static struct platform_device nexcoder_device_nor = {
 /* Standard Nexcoder devices */
 
 static struct platform_device *nexcoder_devices[] __initdata = {
-        &s3c_device_usb,
+        &s3c_device_ohci,
         &s3c_device_lcd,
         &s3c_device_wdt,
         &s3c_device_i2c0,
diff --git a/arch/arm/mach-s3c2440/mach-rx3715.c b/arch/arm/mach-s3c2440/mach-rx3715.c
index a952a13afb1f..1e836e506f8b 100644
--- a/arch/arm/mach-s3c2440/mach-rx3715.c
+++ b/arch/arm/mach-s3c2440/mach-rx3715.c
@@ -176,7 +176,7 @@ static struct s3c2410_platform_nand __initdata rx3715_nand_info = {
 };
 
 static struct platform_device *rx3715_devices[] __initdata = {
-        &s3c_device_usb,
+        &s3c_device_ohci,
         &s3c_device_lcd,
         &s3c_device_wdt,
         &s3c_device_i2c0,
diff --git a/arch/arm/mach-s3c2440/mach-smdk2440.c b/arch/arm/mach-s3c2440/mach-smdk2440.c
index ec13e748ccc5..3ac3d636d615 100644
--- a/arch/arm/mach-s3c2440/mach-smdk2440.c
+++ b/arch/arm/mach-s3c2440/mach-smdk2440.c
@@ -40,7 +40,7 @@
 #include <plat/iic.h>
 
 #include <plat/s3c2410.h>
-#include <plat/s3c2440.h>
+#include <plat/s3c244x.h>
 #include <plat/clock.h>
 #include <plat/devs.h>
 #include <plat/cpu.h>
@@ -150,7 +150,7 @@ static struct s3c2410fb_mach_info smdk2440_fb_info __initdata = {
 };
 
 static struct platform_device *smdk2440_devices[] __initdata = {
-        &s3c_device_usb,
+        &s3c_device_ohci,
         &s3c_device_lcd,
         &s3c_device_wdt,
         &s3c_device_i2c0,
diff --git a/arch/arm/plat-s3c24xx/s3c2440-pll-12000000.c b/arch/arm/mach-s3c2440/s3c2440-pll-12000000.c
index 49f65032f2c0..f105d5e8c477 100644
--- a/arch/arm/plat-s3c24xx/s3c2440-pll-12000000.c
+++ b/arch/arm/mach-s3c2440/s3c2440-pll-12000000.c
@@ -1,4 +1,4 @@
-/* arch/arm/plat-s3c24xx/s3c2440-pll-12000000.c
+/* arch/arm/mach-s3c2440/s3c2440-pll-12000000.c
  *
  * Copyright (c) 2006-2007 Simtec Electronics
  *      http://armlinux.simtec.co.uk/
diff --git a/arch/arm/plat-s3c24xx/s3c2440-pll-16934400.c b/arch/arm/mach-s3c2440/s3c2440-pll-16934400.c
index 7679af13a94d..c8a8f90ef382 100644
--- a/arch/arm/plat-s3c24xx/s3c2440-pll-16934400.c
+++ b/arch/arm/mach-s3c2440/s3c2440-pll-16934400.c
@@ -1,4 +1,4 @@
-/* arch/arm/plat-s3c24xx/s3c2440-pll-16934400.c
+/* arch/arm/mach-s3c2440/s3c2440-pll-16934400.c
  *
  * Copyright (c) 2006-2008 Simtec Electronics
  *      http://armlinux.simtec.co.uk/
diff --git a/arch/arm/mach-s3c2440/s3c2440.c b/arch/arm/mach-s3c2440/s3c2440.c
index ac1f7ea5f405..2b68f7ea45ae 100644
--- a/arch/arm/mach-s3c2440/s3c2440.c
+++ b/arch/arm/mach-s3c2440/s3c2440.c
@@ -29,9 +29,9 @@
 #include <mach/hardware.h>
 #include <asm/irq.h>
 
-#include <plat/s3c2440.h>
 #include <plat/devs.h>
 #include <plat/cpu.h>
+#include <plat/s3c244x.h>
 
 static struct sys_device s3c2440_sysdev = {
         .cls            = &s3c2440_sysclass,
diff --git a/arch/arm/mach-s3c2442/clock.c b/arch/arm/mach-s3c2440/s3c2442.c
index ea1aa1f5157a..188ad1e57dc0 100644
--- a/arch/arm/mach-s3c2442/clock.c
+++ b/arch/arm/mach-s3c2440/s3c2442.c
@@ -1,10 +1,10 @@
-/* linux/arch/arm/mach-s3c2442/clock.c
+/* linux/arch/arm/mach-s3c2442/s3c2442.c
  *
  * Copyright (c) 2004-2005 Simtec Electronics
  *      http://armlinux.simtec.co.uk/
  *      Ben Dooks <ben@simtec.co.uk>
  *
- * S3C2442 Clock support
+ * S3C2442 core and lock support
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
@@ -109,8 +109,10 @@ static struct clk s3c2442_clk_cam = {
 static struct clk s3c2442_clk_cam_upll = {
         .name           = "camif-upll",
         .id             = -1,
-        .set_rate       = s3c2442_camif_upll_setrate,
-        .round_rate     = s3c2442_camif_upll_round,
+        .ops            = &(struct clk_ops) {
+                .set_rate       = s3c2442_camif_upll_setrate,
+                .round_rate     = s3c2442_camif_upll_round,
+        },
 };
 
 static int s3c2442_clk_add(struct sys_device *sysdev)
@@ -149,3 +151,15 @@ static __init int s3c2442_clk_init(void)
 }
 
 arch_initcall(s3c2442_clk_init);
+
+
+static struct sys_device s3c2442_sysdev = {
+        .cls            = &s3c2442_sysclass,
+};
+
+int __init s3c2442_init(void)
+{
+        printk("S3C2442: Initialising architecture\n");
+
+        return sysdev_register(&s3c2442_sysdev);
+}
diff --git a/arch/arm/plat-s3c24xx/s3c244x-clock.c b/arch/arm/mach-s3c2440/s3c244x-clock.c
index 79371091aa38..f8d96130d1d1 100644
--- a/arch/arm/plat-s3c24xx/s3c244x-clock.c
+++ b/arch/arm/mach-s3c2440/s3c244x-clock.c
@@ -68,7 +68,9 @@ static int s3c2440_setparent_armclk(struct clk *clk, struct clk *parent)
 static struct clk clk_arm = {
         .name           = "armclk",
         .id             = -1,
-        .set_parent     = s3c2440_setparent_armclk,
+        .ops            = &(struct clk_ops) {
+                .set_parent     = s3c2440_setparent_armclk,
+        },
 };
 
 static int s3c244x_clk_add(struct sys_device *sysdev)
diff --git a/arch/arm/plat-s3c24xx/s3c244x-irq.c b/arch/arm/mach-s3c2440/s3c244x-irq.c
index a75c0c2431ea..a75c0c2431ea 100644
--- a/arch/arm/plat-s3c24xx/s3c244x-irq.c
+++ b/arch/arm/mach-s3c2440/s3c244x-irq.c
diff --git a/arch/arm/plat-s3c24xx/s3c244x.c b/arch/arm/mach-s3c2440/s3c244x.c
index 12623a474b54..5e4a97e76533 100644
--- a/arch/arm/plat-s3c24xx/s3c244x.c
+++ b/arch/arm/mach-s3c2440/s3c244x.c
@@ -38,8 +38,7 @@
 #include <mach/regs-dsc.h>
 
 #include <plat/s3c2410.h>
-#include <plat/s3c2440.h>
-#include "s3c244x.h"
+#include <plat/s3c244x.h>
 #include <plat/clock.h>
 #include <plat/devs.h>
 #include <plat/cpu.h>
diff --git a/arch/arm/mach-s3c2442/Kconfig b/arch/arm/mach-s3c2442/Kconfig
deleted file mode 100644
index 8d3811852fc7..000000000000
--- a/arch/arm/mach-s3c2442/Kconfig
+++ /dev/null
@@ -1,37 +0,0 @@
-# Copyright 2007 Simtec Electronics
-#
-# Licensed under GPLv2
-
-config CPU_S3C2442
-        bool
-        depends on ARCH_S3C2410
-        select CPU_ARM920T
-        select S3C2410_CLOCK
-        select S3C2410_GPIO
-        select S3C2410_PM if PM
-        select CPU_S3C244X
-        select CPU_LLSERIAL_S3C2440
-        help
-          Support for S3C2442 Samsung Mobile CPU based systems.
-
-
-menu "S3C2442 Machines"
-
-config SMDK2440_CPU2442
-        bool "SMDM2440 with S3C2442 CPU module"
-        depends on ARCH_S3C2440
-        select CPU_S3C2442
-
-config MACH_NEO1973_GTA02
-        bool "Openmoko GTA02 / Freerunner phone"
-        select CPU_S3C2442
-        select MFD_PCF50633
-        select PCF50633_GPIO
-        select I2C
-        select POWER_SUPPLY
-        select MACH_NEO1973
-        select S3C2410_PWM
-        help
-           Say Y here if you are using the Openmoko GTA02 / Freerunner GSM Phone
-
-endmenu
diff --git a/arch/arm/mach-s3c2442/Makefile b/arch/arm/mach-s3c2442/Makefile
deleted file mode 100644
index 2a19113a5769..000000000000
--- a/arch/arm/mach-s3c2442/Makefile
+++ /dev/null
@@ -1,18 +0,0 @@
-# arch/arm/mach-s3c2442/Makefile
-#
-# Copyright 2007 Simtec Electronics
-#
-# Licensed under GPLv2
-
-obj-y                           :=
-obj-m                           :=
-obj-n                           :=
-obj-                            :=
-
-obj-$(CONFIG_CPU_S3C2442)       += s3c2442.o
-obj-$(CONFIG_CPU_S3C2442)       += clock.o
-
-obj-$(CONFIG_MACH_NEO1973_GTA02) += mach-gta02.o
-
-# Machine support
-
diff --git a/arch/arm/mach-s3c2442/s3c2442.c b/arch/arm/mach-s3c2442/s3c2442.c
deleted file mode 100644
index 4663bdc7fff6..000000000000
--- a/arch/arm/mach-s3c2442/s3c2442.c
+++ /dev/null
@@ -1,34 +0,0 @@
-/* linux/arch/arm/mach-s3c2442/s3c2442.c
- *
- * Copyright (c) 2006 Simtec Electronics
- *   Ben Dooks <ben@simtec.co.uk>
- *
- * Samsung S3C2442 Mobile CPU support
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-#include <linux/kernel.h>
-#include <linux/types.h>
-#include <linux/interrupt.h>
-#include <linux/list.h>
-#include <linux/timer.h>
-#include <linux/init.h>
-#include <linux/serial_core.h>
-#include <linux/sysdev.h>
-
-#include <plat/s3c2442.h>
-#include <plat/cpu.h>
-
-static struct sys_device s3c2442_sysdev = {
-        .cls            = &s3c2442_sysclass,
-};
-
-int __init s3c2442_init(void)
-{
-        printk("S3C2442: Initialising architecture\n");
-
-        return sysdev_register(&s3c2442_sysdev);
-}
diff --git a/arch/arm/mach-s3c2443/Kconfig b/arch/arm/mach-s3c2443/Kconfig
index 4314c4424909..698140af247c 100644
--- a/arch/arm/mach-s3c2443/Kconfig
+++ b/arch/arm/mach-s3c2443/Kconfig
@@ -7,6 +7,7 @@ config CPU_S3C2443
         depends on ARCH_S3C2410
         select S3C2443_DMA if S3C2410_DMA
         select CPU_LLSERIAL_S3C2440
+        select SAMSUNG_CLKSRC
         help
           Support for the S3C2443 SoC from the S3C24XX line
 
diff --git a/arch/arm/mach-s3c2443/clock.c b/arch/arm/mach-s3c2443/clock.c
index 2785d69c95b0..62cd4eaee01b 100644
--- a/arch/arm/mach-s3c2443/clock.c
+++ b/arch/arm/mach-s3c2443/clock.c
@@ -1,6 +1,6 @@
 /* linux/arch/arm/mach-s3c2443/clock.c
  *
- * Copyright (c) 2007 Simtec Electronics
+ * Copyright (c) 2007, 2010 Simtec Electronics
  *      Ben Dooks <ben@simtec.co.uk>
  *
  * S3C2443 Clock control support
@@ -42,6 +42,7 @@
 
 #include <plat/s3c2443.h>
 #include <plat/clock.h>
+#include <plat/clock-clksrc.h>
 #include <plat/cpu.h>
 
 /* We currently have to assume that the system is running
@@ -53,141 +54,69 @@
  * set the correct muxing at initialisation
 */
 
-static int s3c2443_clkcon_enable_h(struct clk *clk, int enable)
-{
-        unsigned int clocks = clk->ctrlbit;
-        unsigned long clkcon;
-
-        clkcon = __raw_readl(S3C2443_HCLKCON);
-
-        if (enable)
-                clkcon |= clocks;
-        else
-                clkcon &= ~clocks;
-
-        __raw_writel(clkcon, S3C2443_HCLKCON);
-
-        return 0;
-}
-
-static int s3c2443_clkcon_enable_p(struct clk *clk, int enable)
+static int s3c2443_gate(void __iomem *reg, struct clk *clk, int enable)
 {
-        unsigned int clocks = clk->ctrlbit;
-        unsigned long clkcon;
-
-        clkcon = __raw_readl(S3C2443_PCLKCON);
+        u32 ctrlbit = clk->ctrlbit;
+        u32 con = __raw_readl(reg);
 
         if (enable)
-                clkcon |= clocks;
+                con |= ctrlbit;
         else
-                clkcon &= ~clocks;
-
-        __raw_writel(clkcon, S3C2443_PCLKCON);
+                con &= ~ctrlbit;
 
+        __raw_writel(con, reg);
         return 0;
 }
 
-static int s3c2443_clkcon_enable_s(struct clk *clk, int enable)
-{
-        unsigned int clocks = clk->ctrlbit;
-        unsigned long clkcon;
-
-        clkcon = __raw_readl(S3C2443_SCLKCON);
-
-        if (enable)
-                clkcon |= clocks;
-        else
-                clkcon &= ~clocks;
-
-        __raw_writel(clkcon, S3C2443_SCLKCON);
-
-        return 0;
-}
-
-static unsigned long s3c2443_roundrate_clksrc(struct clk *clk,
-                                              unsigned long rate,
-                                              unsigned int max)
-{
-        unsigned long parent_rate = clk_get_rate(clk->parent);
-        int div;
-
-        if (rate > parent_rate)
-                return parent_rate;
-
-        /* note, we remove the +/- 1 calculations as they cancel out */
-
-        div = (rate / parent_rate);
-
-        if (div < 1)
-                div = 1;
-        else if (div > max)
-                div = max;
-
-        return parent_rate / div;
-}
-
-static unsigned long s3c2443_roundrate_clksrc4(struct clk *clk,
-                                               unsigned long rate)
+static int s3c2443_clkcon_enable_h(struct clk *clk, int enable)
 {
-        return s3c2443_roundrate_clksrc(clk, rate, 4);
+        return s3c2443_gate(S3C2443_HCLKCON, clk, enable);
 }
 
-static unsigned long s3c2443_roundrate_clksrc16(struct clk *clk,
-                                                unsigned long rate)
+static int s3c2443_clkcon_enable_p(struct clk *clk, int enable)
 {
-        return s3c2443_roundrate_clksrc(clk, rate, 16);
+        return s3c2443_gate(S3C2443_PCLKCON, clk, enable);
 }
 
-static unsigned long s3c2443_roundrate_clksrc256(struct clk *clk,
-                                                 unsigned long rate)
+static int s3c2443_clkcon_enable_s(struct clk *clk, int enable)
 {
-        return s3c2443_roundrate_clksrc(clk, rate, 256);
+        return s3c2443_gate(S3C2443_SCLKCON, clk, enable);
 }
 
 /* clock selections */
 
+/* mpllref is a direct descendant of clk_xtal by default, but it is not
+ * elided as the EPLL can be either sourced by the XTAL or EXTCLK and as
+ * such directly equating the two source clocks is impossible.
+ */
 static struct clk clk_mpllref = {
         .name           = "mpllref",
         .parent         = &clk_xtal,
         .id             = -1,
 };
 
-#if 0
-static struct clk clk_mpll = {
-        .name           = "mpll",
-        .parent         = &clk_mpllref,
-        .id             = -1,
-};
-#endif
-
 static struct clk clk_i2s_ext = {
         .name           = "i2s-ext",
         .id             = -1,
 };
 
-static int s3c2443_setparent_epllref(struct clk *clk, struct clk *parent)
-{
-        unsigned long clksrc = __raw_readl(S3C2443_CLKSRC);
-
-        clksrc &= ~S3C2443_CLKSRC_EPLLREF_MASK;
-
-        if (parent == &clk_xtal)
-                clksrc |= S3C2443_CLKSRC_EPLLREF_XTAL;
-        else if (parent == &clk_ext)
-                clksrc |= S3C2443_CLKSRC_EPLLREF_EXTCLK;
-        else if (parent != &clk_mpllref)
-                return -EINVAL;
-
-        __raw_writel(clksrc, S3C2443_CLKSRC);
-        clk->parent = parent;
-
-        return 0;
-}
+static struct clk *clk_epllref_sources[] = {
+        [0] = &clk_mpllref,
+        [1] = &clk_mpllref,
+        [2] = &clk_xtal,
+        [3] = &clk_ext,
+};
 
-static struct clk clk_epllref = {
-        .name           = "epllref",
-        .id             = -1,
-        .set_parent     = s3c2443_setparent_epllref,
+static struct clksrc_clk clk_epllref = {
+        .clk    = {
+                .name           = "epllref",
+                .id             = -1,
+        },
+        .sources = &(struct clksrc_sources) {
+                .sources = clk_epllref_sources,
+                .nr_sources = ARRAY_SIZE(clk_epllref_sources),
+        },
+        .reg_src = { .reg = S3C2443_CLKSRC, .size = 2, .shift = 7 },
 };
 
 static unsigned long s3c2443_getrate_mdivclk(struct clk *clk)
@@ -205,34 +134,29 @@ static struct clk clk_mdivclk = {
         .name           = "mdivclk",
         .parent         = &clk_mpllref,
         .id             = -1,
-        .get_rate       = s3c2443_getrate_mdivclk,
+        .ops            = &(struct clk_ops) {
+                .get_rate       = s3c2443_getrate_mdivclk,
+        },
 };
 
-static int s3c2443_setparent_msysclk(struct clk *clk, struct clk *parent)
-{
-        unsigned long clksrc = __raw_readl(S3C2443_CLKSRC);
-
-        clksrc &= ~(S3C2443_CLKSRC_MSYSCLK_MPLL |
-                    S3C2443_CLKSRC_EXTCLK_DIV);
-
-        if (parent == &clk_mpll)
-                clksrc |= S3C2443_CLKSRC_MSYSCLK_MPLL;
-        else if (parent == &clk_mdivclk)
-                clksrc |= S3C2443_CLKSRC_EXTCLK_DIV;
-        else if (parent != &clk_mpllref)
-                return -EINVAL;
-
-        __raw_writel(clksrc, S3C2443_CLKSRC);
-        clk->parent = parent;
-
-        return 0;
-}
+static struct clk *clk_msysclk_sources[] = {
+        [0] = &clk_mpllref,
+        [1] = &clk_mpll,
+        [2] = &clk_mdivclk,
+        [3] = &clk_mpllref,
+};
 
-static struct clk clk_msysclk = {
-        .name           = "msysclk",
-        .parent         = &clk_xtal,
-        .id             = -1,
-        .set_parent     = s3c2443_setparent_msysclk,
+static struct clksrc_clk clk_msysclk = {
+        .clk    = {
+                .name           = "msysclk",
+                .parent         = &clk_xtal,
+                .id             = -1,
+        },
+        .sources = &(struct clksrc_sources) {
+                .sources = clk_msysclk_sources,
+                .nr_sources = ARRAY_SIZE(clk_msysclk_sources),
+        },
+        .reg_src = { .reg = S3C2443_CLKSRC, .size = 2, .shift = 3 },
 };
 
 /* armdiv
@@ -241,152 +165,159 @@ static struct clk clk_msysclk = {
  * divider values applied to it to then be fed into armclk.
 */
 
-static struct clk clk_armdiv = {
-        .name           = "armdiv",
-        .id             = -1,
-        .parent         = &clk_msysclk,
-};
+/* armdiv divisor table */
 
-/* armclk
- *
- * this is the clock fed into the ARM core itself, either from
- * armdiv or from hclk.
- */
+static unsigned int armdiv[16] = {
+        [S3C2443_CLKDIV0_ARMDIV_1 >> S3C2443_CLKDIV0_ARMDIV_SHIFT]      = 1,
+        [S3C2443_CLKDIV0_ARMDIV_2 >> S3C2443_CLKDIV0_ARMDIV_SHIFT]      = 2,
+        [S3C2443_CLKDIV0_ARMDIV_3 >> S3C2443_CLKDIV0_ARMDIV_SHIFT]      = 3,
+        [S3C2443_CLKDIV0_ARMDIV_4 >> S3C2443_CLKDIV0_ARMDIV_SHIFT]      = 4,
+        [S3C2443_CLKDIV0_ARMDIV_6 >> S3C2443_CLKDIV0_ARMDIV_SHIFT]      = 6,
+        [S3C2443_CLKDIV0_ARMDIV_8 >> S3C2443_CLKDIV0_ARMDIV_SHIFT]      = 8,
+        [S3C2443_CLKDIV0_ARMDIV_12 >> S3C2443_CLKDIV0_ARMDIV_SHIFT]     = 12,
+        [S3C2443_CLKDIV0_ARMDIV_16 >> S3C2443_CLKDIV0_ARMDIV_SHIFT]     = 16,
+};
 
-static int s3c2443_setparent_armclk(struct clk *clk, struct clk *parent)
+static inline unsigned int s3c2443_fclk_div(unsigned long clkcon0)
 {
-        unsigned long clkdiv0;
-
-        clkdiv0 = __raw_readl(S3C2443_CLKDIV0);
-
-        if (parent == &clk_armdiv)
-                clkdiv0 &= ~S3C2443_CLKDIV0_DVS;
-        else if (parent == &clk_h)
-                clkdiv0 |= S3C2443_CLKDIV0_DVS;
-        else
-                return -EINVAL;
+        clkcon0 &= S3C2443_CLKDIV0_ARMDIV_MASK;
 
-        __raw_writel(clkdiv0, S3C2443_CLKDIV0);
-        return 0;
+        return armdiv[clkcon0 >> S3C2443_CLKDIV0_ARMDIV_SHIFT];
 }
 
-static struct clk clk_arm = {
-        .name           = "armclk",
-        .id             = -1,
-        .set_parent     = s3c2443_setparent_armclk,
-};
+static unsigned long s3c2443_armclk_roundrate(struct clk *clk,
+                                              unsigned long rate)
+{
+        unsigned long parent = clk_get_rate(clk->parent);
+        unsigned long calc;
+        unsigned best = 256; /* bigger than any value */
+        unsigned div;
+        int ptr;
 
-/* esysclk
- *
- * this is sourced from either the EPLL or the EPLLref clock
-*/
+        for (ptr = 0; ptr < ARRAY_SIZE(armdiv); ptr++) {
+                div = armdiv[ptr];
+                calc = parent / div;
+                if (calc <= rate && div < best)
+                        best = div;
+        }
 
-static int s3c2443_setparent_esysclk(struct clk *clk, struct clk *parent)
+        return parent / best;
+}
+
+static int s3c2443_armclk_setrate(struct clk *clk, unsigned long rate)
 {
-        unsigned long clksrc = __raw_readl(S3C2443_CLKSRC);
+        unsigned long parent = clk_get_rate(clk->parent);
+        unsigned long calc;
+        unsigned div;
+        unsigned best = 256; /* bigger than any value */
+        int ptr;
+        int val = -1;
+
+        for (ptr = 0; ptr < ARRAY_SIZE(armdiv); ptr++) {
+                div = armdiv[ptr];
+                calc = parent / div;
+                if (calc <= rate && div < best) {
+                        best = div;
+                        val = ptr;
+                }
+        }
 
-        if (parent == &clk_epll)
-                clksrc |= S3C2443_CLKSRC_ESYSCLK_EPLL;
-        else if (parent == &clk_epllref)
-                clksrc &= ~S3C2443_CLKSRC_ESYSCLK_EPLL;
-        else
-                return -EINVAL;
+        if (val >= 0) {
+                unsigned long clkcon0;
 
-        __raw_writel(clksrc, S3C2443_CLKSRC);
-        clk->parent = parent;
+                clkcon0 = __raw_readl(S3C2443_CLKDIV0);
+                clkcon0 &= S3C2443_CLKDIV0_ARMDIV_MASK;
+                clkcon0 |= val << S3C2443_CLKDIV0_ARMDIV_SHIFT;
+                __raw_writel(clkcon0, S3C2443_CLKDIV0);
+        }
 
-        return 0;
+        return (val == -1) ? -EINVAL : 0;
 }
 
-static struct clk clk_esysclk = {
-        .name           = "esysclk",
-        .parent         = &clk_epll,
+static struct clk clk_armdiv = {
+        .name           = "armdiv",
         .id             = -1,
-        .set_parent     = s3c2443_setparent_esysclk,
+        .parent         = &clk_msysclk.clk,
+        .ops            = &(struct clk_ops) {
+                .round_rate = s3c2443_armclk_roundrate,
+                .set_rate = s3c2443_armclk_setrate,
+        },
 };
 
-/* uartclk
+/* armclk
  *
- * UART baud-rate clock sourced from esysclk via a divisor
-*/
-
-static unsigned long s3c2443_getrate_uart(struct clk *clk)
-{
-        unsigned long parent_rate = clk_get_rate(clk->parent);
-        unsigned long div = __raw_readl(S3C2443_CLKDIV1);
-
-        div &= S3C2443_CLKDIV1_UARTDIV_MASK;
-        div >>= S3C2443_CLKDIV1_UARTDIV_SHIFT;
+ * this is the clock fed into the ARM core itself, from armdiv or from hclk.
+ */
 
-        return parent_rate / (div + 1);
-}
+static struct clk *clk_arm_sources[] = {
+        [0] = &clk_armdiv,
+        [1] = &clk_h,
+};
 
+static struct clksrc_clk clk_arm = {
+        .clk    = {
+                .name           = "armclk",
+                .id             = -1,
+        },
+        .sources = &(struct clksrc_sources) {
+                .sources = clk_arm_sources,
+                .nr_sources = ARRAY_SIZE(clk_arm_sources),
+        },
+        .reg_src = { .reg = S3C2443_CLKDIV0, .size = 1, .shift = 13 },
+};
 
-static int s3c2443_setrate_uart(struct clk *clk, unsigned long rate)
-{
-        unsigned long parent_rate = clk_get_rate(clk->parent);
-        unsigned long clkdivn = __raw_readl(S3C2443_CLKDIV1);
+/* esysclk
+ *
+ * this is sourced from either the EPLL or the EPLLref clock
+*/
 
-        rate = s3c2443_roundrate_clksrc16(clk, rate);
-        rate = parent_rate / rate;
+static struct clk *clk_sysclk_sources[] = {
+        [0] = &clk_epllref.clk,
+        [1] = &clk_epll,
+};
 
-        clkdivn &= ~S3C2443_CLKDIV1_UARTDIV_MASK;
-        clkdivn |= (rate - 1) << S3C2443_CLKDIV1_UARTDIV_SHIFT;
+static struct clksrc_clk clk_esysclk = {
+        .clk    = {
+                .name           = "esysclk",
+                .parent         = &clk_epll,
+                .id             = -1,
+        },
+        .sources = &(struct clksrc_sources) {
+                .sources = clk_sysclk_sources,
+                .nr_sources = ARRAY_SIZE(clk_sysclk_sources),
+        },
+        .reg_src = { .reg = S3C2443_CLKSRC, .size = 1, .shift = 6 },
+};
 
-        __raw_writel(clkdivn, S3C2443_CLKDIV1);
-        return 0;
-}
+/* uartclk
+ *
+ * UART baud-rate clock sourced from esysclk via a divisor
+*/
 
-static struct clk clk_uart = {
-        .name           = "uartclk",
-        .id             = -1,
-        .parent         = &clk_esysclk,
-        .get_rate       = s3c2443_getrate_uart,
-        .set_rate       = s3c2443_setrate_uart,
-        .round_rate     = s3c2443_roundrate_clksrc16,
+static struct clksrc_clk clk_uart = {
+        .clk    = {
+                .name           = "uartclk",
+                .id             = -1,
+                .parent         = &clk_esysclk.clk,
+        },
+        .reg_div = { .reg = S3C2443_CLKDIV1, .size = 4, .shift = 8 },
 };
 
+
 /* hsspi
  *
  * high-speed spi clock, sourced from esysclk
 */
 
-static unsigned long s3c2443_getrate_hsspi(struct clk *clk)
-{
-        unsigned long parent_rate = clk_get_rate(clk->parent);
-        unsigned long div = __raw_readl(S3C2443_CLKDIV1);
-
-        div &= S3C2443_CLKDIV1_HSSPIDIV_MASK;
-        div >>= S3C2443_CLKDIV1_HSSPIDIV_SHIFT;
-
-        return parent_rate / (div + 1);
-}
-
-
-static int s3c2443_setrate_hsspi(struct clk *clk, unsigned long rate)
-{
-        unsigned long parent_rate = clk_get_rate(clk->parent);
-        unsigned long clkdivn = __raw_readl(S3C2443_CLKDIV1);
-
-        rate = s3c2443_roundrate_clksrc4(clk, rate);
-        rate = parent_rate / rate;
-
-        clkdivn &= ~S3C2443_CLKDIV1_HSSPIDIV_MASK;
-        clkdivn |= (rate - 1) << S3C2443_CLKDIV1_HSSPIDIV_SHIFT;
-
-        __raw_writel(clkdivn, S3C2443_CLKDIV1);
-        return 0;
-}
-
-static struct clk clk_hsspi = {
-        .name           = "hsspi",
-        .id             = -1,
-        .parent         = &clk_esysclk,
-        .ctrlbit        = S3C2443_SCLKCON_HSSPICLK,
-        .enable         = s3c2443_clkcon_enable_s,
-        .get_rate       = s3c2443_getrate_hsspi,
-        .set_rate       = s3c2443_setrate_hsspi,
-        .round_rate     = s3c2443_roundrate_clksrc4,
+static struct clksrc_clk clk_hsspi = {
+        .clk    = {
+                .name           = "hsspi",
+                .id             = -1,
+                .parent         = &clk_esysclk.clk,
+                .ctrlbit        = S3C2443_SCLKCON_HSSPICLK,
+                .enable         = s3c2443_clkcon_enable_s,
+        },
+        .reg_div = { .reg = S3C2443_CLKDIV1, .size = 2, .shift = 4 },
 };
 
 /* usbhost
@@ -394,41 +325,15 @@ static struct clk clk_hsspi = {
  * usb host bus-clock, usually 48MHz to provide USB bus clock timing
 */
 
-static unsigned long s3c2443_getrate_usbhost(struct clk *clk)
-{
-        unsigned long parent_rate = clk_get_rate(clk->parent);
-        unsigned long div = __raw_readl(S3C2443_CLKDIV1);
-
-        div &= S3C2443_CLKDIV1_USBHOSTDIV_MASK;
-        div >>= S3C2443_CLKDIV1_USBHOSTDIV_SHIFT;
-
-        return parent_rate / (div + 1);
-}
-
-static int s3c2443_setrate_usbhost(struct clk *clk, unsigned long rate)
-{
-        unsigned long parent_rate = clk_get_rate(clk->parent);
-        unsigned long clkdivn = __raw_readl(S3C2443_CLKDIV1);
-
-        rate = s3c2443_roundrate_clksrc4(clk, rate);
-        rate = parent_rate / rate;
-
-        clkdivn &= ~S3C2443_CLKDIV1_USBHOSTDIV_MASK;
-        clkdivn |= (rate - 1) << S3C2443_CLKDIV1_USBHOSTDIV_SHIFT;
-
-        __raw_writel(clkdivn, S3C2443_CLKDIV1);
-        return 0;
-}
-
-static struct clk clk_usb_bus_host = {
-        .name           = "usb-bus-host-parent",
-        .id             = -1,
-        .parent         = &clk_esysclk,
-        .ctrlbit        = S3C2443_SCLKCON_USBHOST,
-        .enable         = s3c2443_clkcon_enable_s,
-        .get_rate       = s3c2443_getrate_usbhost,
-        .set_rate       = s3c2443_setrate_usbhost,
-        .round_rate     = s3c2443_roundrate_clksrc4,
+static struct clksrc_clk clk_usb_bus_host = {
+        .clk    = {
+                .name           = "usb-bus-host-parent",
+                .id             = -1,
+                .parent         = &clk_esysclk.clk,
+                .ctrlbit        = S3C2443_SCLKCON_USBHOST,
+                .enable         = s3c2443_clkcon_enable_s,
+        },
+        .reg_div = { .reg = S3C2443_CLKDIV1, .size = 2, .shift = 4 },
 };
 
 /* clk_hsmcc_div
@@ -438,39 +343,13 @@ static struct clk clk_usb_bus_host = {
  * be fed to the hsmmc block
 */
 
-static unsigned long s3c2443_getrate_hsmmc_div(struct clk *clk)
-{
-        unsigned long parent_rate = clk_get_rate(clk->parent);
-        unsigned long div = __raw_readl(S3C2443_CLKDIV1);
-
-        div &= S3C2443_CLKDIV1_HSMMCDIV_MASK;
-        div >>= S3C2443_CLKDIV1_HSMMCDIV_SHIFT;
-
-        return parent_rate / (div + 1);
-}
-
-static int s3c2443_setrate_hsmmc_div(struct clk *clk, unsigned long rate)
-{
-        unsigned long parent_rate = clk_get_rate(clk->parent);
-        unsigned long clkdivn = __raw_readl(S3C2443_CLKDIV1);
-
-        rate = s3c2443_roundrate_clksrc4(clk, rate);
-        rate = parent_rate / rate;
-
-        clkdivn &= ~S3C2443_CLKDIV1_HSMMCDIV_MASK;
-        clkdivn |= (rate - 1) << S3C2443_CLKDIV1_HSMMCDIV_SHIFT;
-
-        __raw_writel(clkdivn, S3C2443_CLKDIV1);
-        return 0;
-}
-
-static struct clk clk_hsmmc_div = {
-        .name           = "hsmmc-div",
-        .id             = -1,
-        .parent         = &clk_esysclk,
-        .get_rate       = s3c2443_getrate_hsmmc_div,
-        .set_rate       = s3c2443_setrate_hsmmc_div,
-        .round_rate     = s3c2443_roundrate_clksrc4,
+static struct clksrc_clk clk_hsmmc_div = {
+        .clk    = {
+                .name           = "hsmmc-div",
+                .id             = -1,
+                .parent         = &clk_esysclk.clk,
+        },
+        .reg_div = { .reg = S3C2443_CLKDIV1, .size = 2, .shift = 6 },
 };
 
 static int s3c2443_setparent_hsmmc(struct clk *clk, struct clk *parent)
@@ -503,82 +382,55 @@ static int s3c2443_enable_hsmmc(struct clk *clk, int enable)
 static struct clk clk_hsmmc = {
         .name           = "hsmmc-if",
         .id             = -1,
-        .parent         = &clk_hsmmc_div,
+        .parent         = &clk_hsmmc_div.clk,
         .enable         = s3c2443_enable_hsmmc,
-        .set_parent     = s3c2443_setparent_hsmmc,
+        .ops            = &(struct clk_ops) {
+                .set_parent     = s3c2443_setparent_hsmmc,
+        },
 };
 
 /* i2s_eplldiv
  *
- * this clock is the output from the i2s divisor of esysclk
+ * This clock is the output from the I2S divisor of ESYSCLK, and is seperate
+ * from the mux that comes after it (cannot merge into one single clock)
 */
 
-static unsigned long s3c2443_getrate_i2s_eplldiv(struct clk *clk)
-{
-        unsigned long parent_rate = clk_get_rate(clk->parent);
-        unsigned long div = __raw_readl(S3C2443_CLKDIV1);
-
-        div &= S3C2443_CLKDIV1_I2SDIV_MASK;
-        div >>= S3C2443_CLKDIV1_I2SDIV_SHIFT;
-
-        return parent_rate / (div + 1);
-}
-
-static int s3c2443_setrate_i2s_eplldiv(struct clk *clk, unsigned long rate)
-{
-        unsigned long parent_rate = clk_get_rate(clk->parent);
-        unsigned long clkdivn = __raw_readl(S3C2443_CLKDIV1);
-
-        rate = s3c2443_roundrate_clksrc16(clk, rate);
-        rate = parent_rate / rate;
-
-        clkdivn &= ~S3C2443_CLKDIV1_I2SDIV_MASK;
-        clkdivn |= (rate - 1) << S3C2443_CLKDIV1_I2SDIV_SHIFT;
-
-        __raw_writel(clkdivn, S3C2443_CLKDIV1);
-        return 0;
-}
-
-static struct clk clk_i2s_eplldiv = {
-        .name           = "i2s-eplldiv",
-        .id             = -1,
-        .parent         = &clk_esysclk,
-        .get_rate       = s3c2443_getrate_i2s_eplldiv,
-        .set_rate       = s3c2443_setrate_i2s_eplldiv,
-        .round_rate     = s3c2443_roundrate_clksrc16,
+static struct clksrc_clk clk_i2s_eplldiv = {
+        .clk    = {
+                .name           = "i2s-eplldiv",
+                .id             = -1,
+                .parent         = &clk_esysclk.clk,
+        },
+        .reg_div = { .reg = S3C2443_CLKDIV1, .size = 4, .shift = 12, },
 };
 
 /* i2s-ref
  *
  * i2s bus reference clock, selectable from external, esysclk or epllref
+ *
+ * Note, this used to be two clocks, but was compressed into one.
 */
 
-static int s3c2443_setparent_i2s(struct clk *clk, struct clk *parent)
-{
-        unsigned long clksrc = __raw_readl(S3C2443_CLKSRC);
-
-        clksrc &= ~S3C2443_CLKSRC_I2S_MASK;
-
-        if (parent == &clk_epllref)
-                clksrc |= S3C2443_CLKSRC_I2S_EPLLREF;
-        else if (parent == &clk_i2s_ext)
-                clksrc |= S3C2443_CLKSRC_I2S_EXT;
-        else if (parent != &clk_i2s_eplldiv)
-                return -EINVAL;
-
-        clk->parent = parent;
-        __raw_writel(clksrc, S3C2443_CLKSRC);
-
-        return 0;
-}
+struct clk *clk_i2s_srclist[] = {
+        [0] = &clk_i2s_eplldiv.clk,
+        [1] = &clk_i2s_ext,
+        [2] = &clk_epllref.clk,
+        [3] = &clk_epllref.clk,
+};
 
-static struct clk clk_i2s = {
-        .name           = "i2s-if",
-        .id             = -1,
-        .parent         = &clk_i2s_eplldiv,
-        .ctrlbit        = S3C2443_SCLKCON_I2SCLK,
-        .enable         = s3c2443_clkcon_enable_s,
-        .set_parent     = s3c2443_setparent_i2s,
+static struct clksrc_clk clk_i2s = {
+        .clk    = {
+                .name           = "i2s-if",
+                .id             = -1,
+                .ctrlbit        = S3C2443_SCLKCON_I2SCLK,
+                .enable         = s3c2443_clkcon_enable_s,
+
+        },
+        .sources = &(struct clksrc_sources) {
+                .sources = clk_i2s_srclist,
+                .nr_sources = ARRAY_SIZE(clk_i2s_srclist),
+        },
+        .reg_src = { .reg = S3C2443_CLKSRC, .size = 2, .shift = 14 },
 };
 
 /* cam-if
@@ -586,41 +438,15 @@ static struct clk clk_i2s = {
  * camera interface bus-clock, divided down from esysclk
 */
 
-static unsigned long s3c2443_getrate_cam(struct clk *clk)
-{
-        unsigned long parent_rate = clk_get_rate(clk->parent);
-        unsigned long div = __raw_readl(S3C2443_CLKDIV1);
-
-        div  &= S3C2443_CLKDIV1_CAMDIV_MASK;
-        div >>= S3C2443_CLKDIV1_CAMDIV_SHIFT;
-
-        return parent_rate / (div + 1);
-}
-
-static int s3c2443_setrate_cam(struct clk *clk, unsigned long rate)
-{
-        unsigned long parent_rate = clk_get_rate(clk->parent);
-        unsigned long clkdiv1 = __raw_readl(S3C2443_CLKDIV1);
-
-        rate = s3c2443_roundrate_clksrc16(clk, rate);
-        rate = parent_rate / rate;
-
-        clkdiv1 &= ~S3C2443_CLKDIV1_CAMDIV_MASK;
-        clkdiv1 |= (rate - 1) << S3C2443_CLKDIV1_CAMDIV_SHIFT;
-
-        __raw_writel(clkdiv1, S3C2443_CLKDIV1);
-        return 0;
-}
-
-static struct clk clk_cam = {
-        .name           = "camif-upll",         /* same as 2440 name */
-        .id             = -1,
-        .parent         = &clk_esysclk,
-        .ctrlbit        = S3C2443_SCLKCON_CAMCLK,
-        .enable         = s3c2443_clkcon_enable_s,
-        .get_rate       = s3c2443_getrate_cam,
-        .set_rate       = s3c2443_setrate_cam,
-        .round_rate     = s3c2443_roundrate_clksrc16,
+static struct clksrc_clk clk_cam = {
+        .clk    = {
+                .name           = "camif-upll", /* same as 2440 name */
+                .id             = -1,
+                .parent         = &clk_esysclk.clk,
+                .ctrlbit        = S3C2443_SCLKCON_CAMCLK,
+                .enable         = s3c2443_clkcon_enable_s,
+        },
+        .reg_div = { .reg = S3C2443_CLKDIV1, .size = 4, .shift = 26 },
 };
 
 /* display-if
@@ -628,41 +454,15 @@ static struct clk clk_cam = {
  * display interface clock, divided from esysclk
 */
 
-static unsigned long s3c2443_getrate_display(struct clk *clk)
-{
-        unsigned long parent_rate = clk_get_rate(clk->parent);
-        unsigned long div = __raw_readl(S3C2443_CLKDIV1);
-
-        div &= S3C2443_CLKDIV1_DISPDIV_MASK;
-        div >>= S3C2443_CLKDIV1_DISPDIV_SHIFT;
-
-        return parent_rate / (div + 1);
-}
-
-static int s3c2443_setrate_display(struct clk *clk, unsigned long rate)
-{
-        unsigned long parent_rate = clk_get_rate(clk->parent);
-        unsigned long clkdivn = __raw_readl(S3C2443_CLKDIV1);
-
-        rate = s3c2443_roundrate_clksrc256(clk, rate);
-        rate = parent_rate / rate;
-
-        clkdivn &= ~S3C2443_CLKDIV1_UARTDIV_MASK;
-        clkdivn |= (rate - 1) << S3C2443_CLKDIV1_UARTDIV_SHIFT;
-
-        __raw_writel(clkdivn, S3C2443_CLKDIV1);
-        return 0;
-}
-
-static struct clk clk_display = {
-        .name           = "display-if",
-        .id             = -1,
-        .parent         = &clk_esysclk,
-        .ctrlbit        = S3C2443_SCLKCON_DISPCLK,
-        .enable         = s3c2443_clkcon_enable_s,
-        .get_rate       = s3c2443_getrate_display,
-        .set_rate       = s3c2443_setrate_display,
-        .round_rate     = s3c2443_roundrate_clksrc256,
+static struct clksrc_clk clk_display = {
+        .clk    = {
+                .name           = "display-if",
+                .id             = -1,
+                .parent         = &clk_esysclk.clk,
+                .ctrlbit        = S3C2443_SCLKCON_DISPCLK,
+                .enable         = s3c2443_clkcon_enable_s,
+        },
+        .reg_div = { .reg = S3C2443_CLKDIV1, .size = 8, .shift = 16 },
 };
 
 /* prediv
@@ -684,8 +484,10 @@ static unsigned long s3c2443_prediv_getrate(struct clk *clk)
 static struct clk clk_prediv = {
         .name           = "prediv",
         .id             = -1,
-        .parent         = &clk_msysclk,
-        .get_rate       = s3c2443_prediv_getrate,
+        .parent         = &clk_msysclk.clk,
+        .ops            = &(struct clk_ops) {
+                .get_rate       = s3c2443_prediv_getrate,
+        },
 };
 
 /* standard clock definitions */
@@ -857,7 +659,7 @@ static struct clk init_clocks[] = {
         }, {
                 .name           = "usb-bus-host",
                 .id             = -1,
-                .parent         = &clk_usb_bus_host,
+                .parent         = &clk_usb_bus_host.clk,
         }, {
                 .name           = "ac97",
                 .id             = -1,
@@ -868,103 +670,26 @@ static struct clk init_clocks[] = {
 
 /* clocks to add where we need to check their parentage */
 
-/* s3c2443_clk_initparents
- *
- * Initialise the parents for the clocks that we get at start-time
-*/
-
-static int __init clk_init_set_parent(struct clk *clk, struct clk *parent)
-{
-        printk(KERN_DEBUG "clock %s: parent %s\n", clk->name, parent->name);
-        return clk_set_parent(clk, parent);
-}
-
-static void __init s3c2443_clk_initparents(void)
-{
-        unsigned long clksrc = __raw_readl(S3C2443_CLKSRC);
-        struct clk *parent;
-
-        switch (clksrc & S3C2443_CLKSRC_EPLLREF_MASK) {
-        case S3C2443_CLKSRC_EPLLREF_EXTCLK:
-                parent = &clk_ext;
-                break;
-
-        case S3C2443_CLKSRC_EPLLREF_XTAL:
-        default:
-                parent = &clk_xtal;
-                break;
-
-        case S3C2443_CLKSRC_EPLLREF_MPLLREF:
-        case S3C2443_CLKSRC_EPLLREF_MPLLREF2:
-                parent = &clk_mpllref;
-                break;
-        }
-
-        clk_init_set_parent(&clk_epllref, parent);
-
-        switch (clksrc & S3C2443_CLKSRC_I2S_MASK) {
-        case S3C2443_CLKSRC_I2S_EXT:
-                parent = &clk_i2s_ext;
-                break;
-
-        case S3C2443_CLKSRC_I2S_EPLLDIV:
-        default:
-                parent = &clk_i2s_eplldiv;
-                break;
-
-        case S3C2443_CLKSRC_I2S_EPLLREF:
-        case S3C2443_CLKSRC_I2S_EPLLREF3:
-                parent = &clk_epllref;
-        }
-
-        clk_init_set_parent(&clk_i2s, &clk_epllref);
-
-        /* esysclk source */
-
-        parent = (clksrc & S3C2443_CLKSRC_ESYSCLK_EPLL) ?
-                &clk_epll : &clk_epllref;
-
-        clk_init_set_parent(&clk_esysclk, parent);
-
-        /* msysclk source */
-
-        if (clksrc & S3C2443_CLKSRC_MSYSCLK_MPLL) {
-                parent = &clk_mpll;
-        } else {
-                parent = (clksrc & S3C2443_CLKSRC_EXTCLK_DIV) ?
-                        &clk_mdivclk : &clk_mpllref;
-        }
-
-        clk_init_set_parent(&clk_msysclk, parent);
-
-        /* arm */
-
-        if (__raw_readl(S3C2443_CLKDIV0) & S3C2443_CLKDIV0_DVS)
-                parent = &clk_h;
-        else
-                parent = &clk_armdiv;
-
-        clk_init_set_parent(&clk_arm, parent);
-}
-
-/* armdiv divisor table */
-
-static unsigned int armdiv[16] = {
-        [S3C2443_CLKDIV0_ARMDIV_1 >> S3C2443_CLKDIV0_ARMDIV_SHIFT]      = 1,
-        [S3C2443_CLKDIV0_ARMDIV_2 >> S3C2443_CLKDIV0_ARMDIV_SHIFT]      = 2,
-        [S3C2443_CLKDIV0_ARMDIV_3 >> S3C2443_CLKDIV0_ARMDIV_SHIFT]      = 3,
-        [S3C2443_CLKDIV0_ARMDIV_4 >> S3C2443_CLKDIV0_ARMDIV_SHIFT]      = 4,
-        [S3C2443_CLKDIV0_ARMDIV_6 >> S3C2443_CLKDIV0_ARMDIV_SHIFT]      = 6,
-        [S3C2443_CLKDIV0_ARMDIV_8 >> S3C2443_CLKDIV0_ARMDIV_SHIFT]      = 8,
-        [S3C2443_CLKDIV0_ARMDIV_12 >> S3C2443_CLKDIV0_ARMDIV_SHIFT]     = 12,
-        [S3C2443_CLKDIV0_ARMDIV_16 >> S3C2443_CLKDIV0_ARMDIV_SHIFT]     = 16,
+static struct clksrc_clk __initdata *init_list[] = {
+        &clk_epllref, /* should be first */
+        &clk_esysclk,
+        &clk_msysclk,
+        &clk_arm,
+        &clk_i2s_eplldiv,
+        &clk_i2s,
+        &clk_cam,
+        &clk_uart,
+        &clk_display,
+        &clk_hsmmc_div,
+        &clk_usb_bus_host,
 };
 
-static inline unsigned int s3c2443_fclk_div(unsigned long clkcon0)
+static void __init s3c2443_clk_initparents(void)
 {
-        clkcon0 &= S3C2443_CLKDIV0_ARMDIV_MASK;
+        int ptr;
 
-        return armdiv[clkcon0 >> S3C2443_CLKDIV0_ARMDIV_SHIFT];
+        for (ptr = 0; ptr < ARRAY_SIZE(init_list); ptr++)
+                s3c_set_clksrc(init_list[ptr], true);
 }
 
 static inline unsigned long s3c2443_get_hdiv(unsigned long clkcon0)
@@ -976,15 +701,12 @@ static inline unsigned long s3c2443_get_hdiv(unsigned long clkcon0)
 
 /* clocks to add straight away */
 
-static struct clk *clks[] __initdata = {
-        &clk_ext,
-        &clk_epll,
+static struct clksrc_clk *clksrcs[] __initdata = {
         &clk_usb_bus_host,
-        &clk_usb_bus,
-        &clk_esysclk,
         &clk_epllref,
-        &clk_mpllref,
+        &clk_esysclk,
         &clk_msysclk,
+        &clk_arm,
         &clk_uart,
         &clk_display,
         &clk_cam,
@@ -992,9 +714,15 @@ static struct clk *clks[] __initdata = {
         &clk_i2s,
         &clk_hsspi,
         &clk_hsmmc_div,
+};
+
+static struct clk *clks[] __initdata = {
+        &clk_ext,
+        &clk_epll,
+        &clk_usb_bus,
+        &clk_mpllref,
         &clk_hsmmc,
         &clk_armdiv,
-        &clk_arm,
         &clk_prediv,
 };
 
@@ -1014,7 +742,7 @@ void __init_or_cpufreq s3c2443_setup_clocks(void)
         clk_put(xtal_clk);
 
         pll = s3c2443_get_mpll(mpllcon, xtal);
-        clk_msysclk.rate = pll;
+        clk_msysclk.clk.rate = pll;
 
         fclk = pll / s3c2443_fclk_div(clkdiv0);
         hclk = s3c2443_prediv_getrate(&clk_prediv);
@@ -1056,15 +784,18 @@ void __init s3c2443_init_clocks(int xtal)
                 }
         }
 
+        for (ptr = 0; ptr < ARRAY_SIZE(clksrcs); ptr++)
+                s3c_register_clksrc(clksrcs[ptr], 1);
+
         clk_epll.rate = s3c2443_get_epll(epllcon, xtal);
-        clk_epll.parent = &clk_epllref;
-        clk_usb_bus.parent = &clk_usb_bus_host;
+        clk_epll.parent = &clk_epllref.clk;
+        clk_usb_bus.parent = &clk_usb_bus_host.clk;
 
         /* ensure usb bus clock is within correct rate of 48MHz */
 
-        if (clk_get_rate(&clk_usb_bus_host) != (48 * 1000 * 1000)) {
+        if (clk_get_rate(&clk_usb_bus_host.clk) != (48 * 1000 * 1000)) {
                 printk(KERN_INFO "Warning: USB host bus not at 48MHz\n");
-                clk_set_rate(&clk_usb_bus_host, 48*1000*1000);
+                clk_set_rate(&clk_usb_bus_host.clk, 48*1000*1000);
         }
 
         printk("S3C2443: epll %s %ld.%03ld MHz, usb-bus %ld.%03ld MHz\n",
@@ -1074,14 +805,7 @@ void __init s3c2443_init_clocks(int xtal)
 
         /* register clocks from clock array */
 
-        clkp = init_clocks;
-        for (ptr = 0; ptr < ARRAY_SIZE(init_clocks); ptr++, clkp++) {
-                ret = s3c24xx_register_clock(clkp);
-                if (ret < 0) {
-                        printk(KERN_ERR "Failed to register clock %s (%d)\n",
-                               clkp->name, ret);
-                }
-        }
+        s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks));
 
         /* We must be careful disabling the clocks we are not intending to
          * be using at boot time, as subsystems such as the LCD which do
diff --git a/arch/arm/mach-s3c2443/dma.c b/arch/arm/mach-s3c2443/dma.c
index 397f3b5c0b47..3f658685ec16 100644
--- a/arch/arm/mach-s3c2443/dma.c
+++ b/arch/arm/mach-s3c2443/dma.c
@@ -20,7 +20,7 @@
 
 #include <mach/dma.h>
 
-#include <plat/dma-plat.h>
+#include <plat/dma-s3c24xx.h>
 #include <plat/cpu.h>
 
 #include <plat/regs-serial.h>
diff --git a/arch/arm/mach-s3c2443/mach-smdk2443.c b/arch/arm/mach-s3c2443/mach-smdk2443.c
index 039a46243105..e2e362bda9b7 100644
--- a/arch/arm/mach-s3c2443/mach-smdk2443.c
+++ b/arch/arm/mach-s3c2443/mach-smdk2443.c
@@ -40,7 +40,7 @@
 #include <plat/iic.h>
 
 #include <plat/s3c2410.h>
-#include <plat/s3c2440.h>
+#include <plat/s3c2443.h>
 #include <plat/clock.h>
 #include <plat/devs.h>
 #include <plat/cpu.h>
@@ -106,6 +106,9 @@ static struct platform_device *smdk2443_devices[] __initdata = {
         &s3c_device_wdt,
         &s3c_device_i2c0,
         &s3c_device_hsmmc0,
+#ifdef CONFIG_SND_SOC_SMDK2443_WM9710
+        &s3c_device_ac97,
+#endif
 };
 
 static void __init smdk2443_map_io(void)
@@ -118,6 +121,11 @@ static void __init smdk2443_map_io(void)
 static void __init smdk2443_machine_init(void)
 {
         s3c_i2c0_set_platdata(NULL);
+
+#ifdef CONFIG_SND_SOC_SMDK2443_WM9710
+        s3c24xx_ac97_setup_gpio(S3C24XX_AC97_GPE0);
+#endif
+
         platform_add_devices(smdk2443_devices, ARRAY_SIZE(smdk2443_devices));
         smdk_machine_init();
 }
diff --git a/arch/arm/plat-s3c/include/mach/io.h b/arch/arm/mach-s3c24a0/include/mach/io.h
index f6a53631b665..4326c30fabcb 100644
--- a/arch/arm/plat-s3c/include/mach/io.h
+++ b/arch/arm/mach-s3c24a0/include/mach/io.h
@@ -1,9 +1,9 @@
-/* arch/arm/plat-s3c/include/mach/io.h
+/* arch/arm/mach-s3c24a0/include/mach/io.h
  *
  * Copyright 2008 Simtec Electronics
  *      Ben Dooks <ben-linux@fluff.org>
  *
- * Default IO routines for plat-s3c based systems, such as S3C24A0
+ * Default IO routines for S3C24A0
  */
 
 #ifndef __ASM_ARM_ARCH_IO_H
diff --git a/arch/arm/mach-s3c6400/Kconfig b/arch/arm/mach-s3c6400/Kconfig
deleted file mode 100644
index a250bf68709f..000000000000
--- a/arch/arm/mach-s3c6400/Kconfig
+++ /dev/null
@@ -1,30 +0,0 @@
-# Copyright 2008 Openmoko, Inc.
-#       Simtec Electronics, Ben Dooks <ben@simtec.co.uk>
-#
-# Licensed under GPLv2
-
-# Configuration options for the S3C6410 CPU
-
-config CPU_S3C6400
-        bool
-        select CPU_S3C6400_INIT
-        select CPU_S3C6400_CLOCK
-        help
-          Enable S3C6400 CPU support
-
-config S3C6400_SETUP_SDHCI
-        bool
-        help
-          Internal configuration for default SDHCI
-          setup for S3C6400.
-
-# S36400 Macchine support
-
-config MACH_SMDK6400
-       bool "SMDK6400"
-        select CPU_S3C6400
-        select S3C_DEV_HSMMC
-        select S3C_DEV_NAND
-        select S3C6400_SETUP_SDHCI
-        help
-          Machine support for the Samsung SMDK6400
diff --git a/arch/arm/mach-s3c6400/Makefile b/arch/arm/mach-s3c6400/Makefile
deleted file mode 100644
index df1ce4aa03e5..000000000000
--- a/arch/arm/mach-s3c6400/Makefile
+++ /dev/null
@@ -1,23 +0,0 @@
-# arch/arm/mach-s3c6400/Makefile
-#
-# Copyright 2008 Openmoko, Inc.
-# Copyright 2008 Simtec Electronics
-#
-# Licensed under GPLv2
-
-obj-y                           :=
-obj-m                           :=
-obj-n                           :=
-obj-                            :=
-
-# Core support for S3C6400 system
-
-obj-$(CONFIG_CPU_S3C6400)       += s3c6400.o
-
-# setup support
-
-obj-$(CONFIG_S3C6400_SETUP_SDHCI) += setup-sdhci.o
-
-# Machine support
-
-obj-$(CONFIG_MACH_SMDK6400)     += mach-smdk6400.o
diff --git a/arch/arm/mach-s3c6400/include/mach/dma.h b/arch/arm/mach-s3c6400/include/mach/dma.h
deleted file mode 100644
index 6723860748be..000000000000
--- a/arch/arm/mach-s3c6400/include/mach/dma.h
+++ /dev/null
@@ -1,70 +0,0 @@
-/* linux/arch/arm/mach-s3c6400/include/mach/dma.h
- *
- * Copyright 2008 Openmoko, Inc.
- * Copyright 2008 Simtec Electronics
- *      Ben Dooks <ben@simtec.co.uk>
- *      http://armlinux.simtec.co.uk/
- *
- * S3C6400 - DMA support
- */
-
-#ifndef __ASM_ARCH_DMA_H
-#define __ASM_ARCH_DMA_H __FILE__
-
-#define S3C_DMA_CHANNELS        (16)
-
-/* see mach-s3c2410/dma.h for notes on dma channel numbers */
-
-/* Note, for the S3C64XX architecture we keep the DMACH_
- * defines in the order they are allocated to [S]DMA0/[S]DMA1
- * so that is easy to do DHACH_ -> DMA controller conversion
- */
-enum dma_ch {
-        /* DMA0/SDMA0 */
-        DMACH_UART0 = 0,
-        DMACH_UART0_SRC2,
-        DMACH_UART1,
-        DMACH_UART1_SRC2,
-        DMACH_UART2,
-        DMACH_UART2_SRC2,
-        DMACH_UART3,
-        DMACH_UART3_SRC2,
-        DMACH_PCM0_TX,
-        DMACH_PCM0_RX,
-        DMACH_I2S0_OUT,
-        DMACH_I2S0_IN,
-        DMACH_SPI0_TX,
-        DMACH_SPI0_RX,
-        DMACH_HSI_I2SV40_TX,
-        DMACH_HSI_I2SV40_RX,
-
-        /* DMA1/SDMA1 */
-        DMACH_PCM1_TX = 16,
-        DMACH_PCM1_RX,
-        DMACH_I2S1_OUT,
-        DMACH_I2S1_IN,
-        DMACH_SPI1_TX,
-        DMACH_SPI1_RX,
-        DMACH_AC97_PCMOUT,
-        DMACH_AC97_PCMIN,
-        DMACH_AC97_MICIN,
-        DMACH_PWM,
-        DMACH_IRDA,
-        DMACH_EXTERNAL,
-        DMACH_RES1,
-        DMACH_RES2,
-        DMACH_SECURITY_RX,      /* SDMA1 only */
-        DMACH_SECURITY_TX,      /* SDMA1 only */
-        DMACH_MAX               /* the end */
-};
-
-static __inline__ bool s3c_dma_has_circular(void)
-{
-        return true;
-}
-
-#define S3C2410_DMAF_CIRCULAR           (1 << 0)
-
-#include <plat/dma.h>
-
-#endif /* __ASM_ARCH_IRQ_H */
diff --git a/arch/arm/mach-s3c6400/include/mach/gpio-core.h b/arch/arm/mach-s3c6400/include/mach/gpio-core.h
deleted file mode 100644
index d89aae68b0a5..000000000000
--- a/arch/arm/mach-s3c6400/include/mach/gpio-core.h
+++ /dev/null
@@ -1,21 +0,0 @@
-/* arch/arm/mach-s3c6400/include/mach/gpio-core.h
- *
- * Copyright 2008 Openmoko, Inc.
- * Copyright 2008 Simtec Electronics
- *      Ben Dooks <ben@simtec.co.uk>
- *      http://armlinux.simtec.co.uk/
- *
- * S3C64XX - GPIO core support
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-#ifndef __ASM_ARCH_GPIO_CORE_H
-#define __ASM_ARCH_GPIO_CORE_H __FILE__
-
-/* currently we just include the platform support */
-#include <plat/gpio-core.h>
-
-#endif /* __ASM_ARCH_GPIO_CORE_H */
diff --git a/arch/arm/mach-s3c6400/include/mach/irqs.h b/arch/arm/mach-s3c6400/include/mach/irqs.h
deleted file mode 100644
index 4c97f9a4370b..000000000000
--- a/arch/arm/mach-s3c6400/include/mach/irqs.h
+++ /dev/null
@@ -1,16 +0,0 @@
-/* linux/arch/arm/mach-s3c6400/include/mach/irqs.h
- *
- * Copyright 2008 Openmoko, Inc.
- * Copyright 2008 Simtec Electronics
- *      Ben Dooks <ben@simtec.co.uk>
- *      http://armlinux.simtec.co.uk/
- *
- * S3C6400 - IRQ definitions
- */
-
-#ifndef __ASM_ARCH_IRQS_H
-#define __ASM_ARCH_IRQS_H __FILE__
-
-#include <plat/irqs.h>
-
-#endif /* __ASM_ARCH_IRQ_H */
diff --git a/arch/arm/mach-s3c6400/include/mach/regs-clock.h b/arch/arm/mach-s3c6400/include/mach/regs-clock.h
deleted file mode 100644
index a6c7f4eb3a1b..000000000000
--- a/arch/arm/mach-s3c6400/include/mach/regs-clock.h
+++ /dev/null
@@ -1,16 +0,0 @@
-/* linux/arch/arm/mach-s3c6400/include/mach/regs-clock.h
- *
- * Copyright 2008 Openmoko, Inc.
- * Copyright 2008 Simtec Electronics
- *      http://armlinux.simtec.co.uk/
- *      Ben Dooks <ben@simtec.co.uk>
- *
- * S3C64XX - clock register compatibility with s3c24xx
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-#include <plat/regs-clock.h>
-
diff --git a/arch/arm/mach-s3c6410/Makefile b/arch/arm/mach-s3c6410/Makefile
deleted file mode 100644
index 3e48c3dbf973..000000000000
--- a/arch/arm/mach-s3c6410/Makefile
+++ /dev/null
@@ -1,26 +0,0 @@
-# arch/arm/plat-s3c6410/Makefile
-#
-# Copyright 2008 Openmoko, Inc.
-# Copyright 2008 Simtec Electronics
-#
-# Licensed under GPLv2
-
-obj-y                           :=
-obj-m                           :=
-obj-n                           :=
-obj-                            :=
-
-# Core support for S3C6410 system
-
-obj-$(CONFIG_CPU_S3C6410)       += cpu.o
-
-# Helper and device support
-
-obj-$(CONFIG_S3C6410_SETUP_SDHCI)       += setup-sdhci.o
-
-# machine support
-
-obj-$(CONFIG_MACH_ANW6410)      += mach-anw6410.o
-obj-$(CONFIG_MACH_SMDK6410)     += mach-smdk6410.o
-obj-$(CONFIG_MACH_NCP)          += mach-ncp.o
-obj-$(CONFIG_MACH_HMT)          += mach-hmt.o
diff --git a/arch/arm/mach-s3c6410/setup-sdhci.c b/arch/arm/mach-s3c6410/setup-sdhci.c
deleted file mode 100644
index 816d2d9f9ef8..000000000000
--- a/arch/arm/mach-s3c6410/setup-sdhci.c
+++ /dev/null
@@ -1,68 +0,0 @@
-/* linux/arch/arm/mach-s3c6410/setup-sdhci.c
- *
- * Copyright 2008 Simtec Electronics
- * Copyright 2008 Simtec Electronics
- *      Ben Dooks <ben@simtec.co.uk>
- *      http://armlinux.simtec.co.uk/
- *
- * S3C6410 - Helper functions for settign up SDHCI device(s) (HSMMC)
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-#include <linux/kernel.h>
-#include <linux/types.h>
-#include <linux/interrupt.h>
-#include <linux/platform_device.h>
-#include <linux/io.h>
-
-#include <linux/mmc/card.h>
-#include <linux/mmc/host.h>
-
-#include <plat/regs-sdhci.h>
-#include <plat/sdhci.h>
-
-/* clock sources for the mmc bus clock, order as for the ctrl2[5..4] */
-
-char *s3c6410_hsmmc_clksrcs[4] = {
-        [0] = "hsmmc",
-        [1] = "hsmmc",
-        [2] = "mmc_bus",
-        /* [3] = "48m", - note not successfully used yet */
-};
-
-
-void s3c6410_setup_sdhci0_cfg_card(struct platform_device *dev,
-                                    void __iomem *r,
-                                    struct mmc_ios *ios,
-                                    struct mmc_card *card)
-{
-        u32 ctrl2, ctrl3;
-
-        /* don't need to alter anything acording to card-type */
-
-        writel(S3C64XX_SDHCI_CONTROL4_DRIVE_9mA, r + S3C64XX_SDHCI_CONTROL4);
-
-        ctrl2 = readl(r + S3C_SDHCI_CONTROL2);
-        ctrl2 &= S3C_SDHCI_CTRL2_SELBASECLK_MASK;
-        ctrl2 |= (S3C64XX_SDHCI_CTRL2_ENSTAASYNCCLR |
-                  S3C64XX_SDHCI_CTRL2_ENCMDCNFMSK |
-                  S3C_SDHCI_CTRL2_ENFBCLKRX |
-                  S3C_SDHCI_CTRL2_DFCNT_NONE |
-                  S3C_SDHCI_CTRL2_ENCLKOUTHOLD);
-
-        if (ios->clock < 25 * 1000000)
-                ctrl3 = (S3C_SDHCI_CTRL3_FCSEL3 |
-                         S3C_SDHCI_CTRL3_FCSEL2 |
-                         S3C_SDHCI_CTRL3_FCSEL1 |
-                         S3C_SDHCI_CTRL3_FCSEL0);
-        else
-                ctrl3 = (S3C_SDHCI_CTRL3_FCSEL1 | S3C_SDHCI_CTRL3_FCSEL0);
-
-        printk(KERN_INFO "%s: CTRL 2=%08x, 3=%08x\n", __func__, ctrl2, ctrl3);
-        writel(ctrl2, r + S3C_SDHCI_CONTROL2);
-        writel(ctrl3, r + S3C_SDHCI_CONTROL3);
-}
-
diff --git a/arch/arm/mach-s3c6410/Kconfig b/arch/arm/mach-s3c64xx/Kconfig
index 162f4561f80f..959df3840de5 100644
--- a/arch/arm/mach-s3c6410/Kconfig
+++ b/arch/arm/mach-s3c64xx/Kconfig
@@ -1,22 +1,78 @@
 # Copyright 2008 Openmoko, Inc.
-# Copyright 2008 Simtec Electronics
+#       Simtec Electronics, Ben Dooks <ben@simtec.co.uk>
 #
 # Licensed under GPLv2
 
+# temporary until we can eliminate all drivers using it.
+config PLAT_S3C64XX
+        bool
+        depends on ARCH_S3C64XX
+        default y
+        help
+          Base platform code for any Samsung S3C64XX device
+
+
 # Configuration options for the S3C6410 CPU
 
+config CPU_S3C6400
+        bool
+        help
+          Enable S3C6400 CPU support
+
 config CPU_S3C6410
         bool
-        select CPU_S3C6400_INIT
-        select CPU_S3C6400_CLOCK
         help
           Enable S3C6410 CPU support
 
-config S3C6410_SETUP_SDHCI
-        bool
+config S3C64XX_DMA
+        bool "S3C64XX DMA"
+        select S3C_DMA
+
+config S3C64XX_SETUP_SDHCI
         select S3C64XX_SETUP_SDHCI_GPIO
+        bool
         help
-          Internal helper functions for S3C6410 based SDHCI systems
+          Internal configuration for default SDHCI setup for S3C6400 and
+          S3C6410 SoCs.
+
+# platform specific device setup
+
+config S3C64XX_SETUP_I2C0
+        bool
+        default y
+        help
+          Common setup code for i2c bus 0.
+
+          Note, currently since i2c0 is always compiled, this setup helper
+          is always compiled with it.
+
+config S3C64XX_SETUP_I2C1
+        bool
+        help
+          Common setup code for i2c bus 1.
+
+config S3C64XX_SETUP_FB_24BPP
+        bool
+        help
+          Common setup code for S3C64XX with an 24bpp RGB display helper.
+
+config S3C64XX_SETUP_SDHCI_GPIO
+        bool
+        help
+          Common setup code for S3C64XX SDHCI GPIO configurations
+
+# S36400 Macchine support
+
+config MACH_SMDK6400
+       bool "SMDK6400"
+        select CPU_S3C6400
+        select S3C_DEV_HSMMC
+        select S3C_DEV_NAND
+        select S3C64XX_SETUP_SDHCI
+        help
+          Machine support for the Samsung SMDK6400
+
+# S3C6410 machine support
 
 config MACH_ANW6410
         bool "A&W6410"
@@ -35,7 +91,7 @@ config MACH_SMDK6410
         select S3C_DEV_FB
         select S3C_DEV_USB_HOST
         select S3C_DEV_USB_HSOTG
-        select S3C6410_SETUP_SDHCI
+        select S3C64XX_SETUP_SDHCI
         select S3C64XX_SETUP_I2C1
         select S3C64XX_SETUP_FB_24BPP
         help
@@ -58,7 +114,7 @@ config SMDK6410_SD_CH0
           at least some SMDK6410 boards come with the
           resistors fitted so that the card detects for
           channels 0 and 1 are the same.
-       
+
 config SMDK6410_SD_CH1
         bool "Use channel 1 only"
         depends on MACH_SMDK6410
@@ -88,6 +144,21 @@ config SMDK6410_WM1190_EV1
           detected at runtime so the the resulting kernel can be used
           with or without the 1190-EV1 fitted.
 
+config SMDK6410_WM1192_EV1
+        bool "Support Wolfson Microelectronics 1192-EV1 PMIC card"
+        depends on MACH_SMDK6410
+        select REGULATOR
+        select REGULATOR_WM831X
+        select S3C24XX_GPIO_EXTRA64
+        select MFD_WM831X
+        help
+          The Wolfson Microelectronics 1192-EV1 is a WM831x based PMIC
+          daughtercard for the Samsung SMDK6410 reference platform.
+          Enabling this option will build support for this module into
+          the kernel.  The presence of the daughtercard will be
+          detected at runtime so the the resulting kernel can be used
+          with or without the 1192-EV1 fitted.
+
 config MACH_NCP
         bool "NCP"
         select CPU_S3C6410
diff --git a/arch/arm/plat-s3c64xx/Makefile b/arch/arm/mach-s3c64xx/Makefile
index b85b4359e935..3758e15086be 100644
--- a/arch/arm/plat-s3c64xx/Makefile
+++ b/arch/arm/mach-s3c64xx/Makefile
@@ -1,4 +1,4 @@
-# arch/arm/plat-s3c64xx/Makefile
+# arch/arm/mach-s3c64xx/Makefile
 #
 # Copyright 2008 Openmoko, Inc.
 # Copyright 2008 Simtec Electronics
@@ -7,29 +7,25 @@
 
 obj-y                           :=
 obj-m                           :=
-obj-n                           := dummy.o
+obj-n                           :=
 obj-                            :=
 
 # Core files
-
-obj-y                           += dev-uart.o
 obj-y                           += cpu.o
-obj-y                           += irq.o
-obj-y                           += irq-eint.o
 obj-y                           += clock.o
 obj-y                           += gpiolib.o
 
-# CPU support
+# Core support for S3C6400 system
 
-obj-$(CONFIG_CPU_S3C6400_INIT)  += s3c6400-init.o
-obj-$(CONFIG_CPU_S3C6400_CLOCK) += s3c6400-clock.o
-obj-$(CONFIG_CPU_FREQ_S3C64XX)  += cpufreq.o
+obj-$(CONFIG_CPU_S3C6400)       += s3c6400.o
+obj-$(CONFIG_CPU_S3C6410)       += s3c6410.o
 
-# PM support
+obj-y                           += irq.o
+obj-y                           += irq-eint.o
 
-obj-$(CONFIG_PM)                += pm.o
-obj-$(CONFIG_PM)                += sleep.o
-obj-$(CONFIG_PM)                += irq-pm.o
+# CPU frequency scaling
+
+obj-$(CONFIG_CPU_FREQ_S3C64XX)  += cpufreq.o
 
 # DMA support
 
@@ -39,6 +35,28 @@ obj-$(CONFIG_S3C64XX_DMA)	+= dma.o
 
 obj-$(CONFIG_S3C64XX_SETUP_I2C0) += setup-i2c0.o
 obj-$(CONFIG_S3C64XX_SETUP_I2C1) += setup-i2c1.o
+obj-$(CONFIG_S3C64XX_SETUP_SDHCI) += setup-sdhci.o
 obj-$(CONFIG_S3C64XX_SETUP_FB_24BPP) += setup-fb-24bpp.o
 obj-$(CONFIG_S3C64XX_SETUP_SDHCI_GPIO) += setup-sdhci-gpio.o
-obj-$(CONFIG_SND_S3C24XX_SOC) += dev-audio.o
+
+# PM
+
+obj-$(CONFIG_PM)                += pm.o
+obj-$(CONFIG_PM)                += sleep.o
+obj-$(CONFIG_PM)                += irq-pm.o
+
+# Machine support
+
+obj-$(CONFIG_MACH_ANW6410)      += mach-anw6410.o
+obj-$(CONFIG_MACH_SMDK6400)     += mach-smdk6400.o
+obj-$(CONFIG_MACH_SMDK6410)     += mach-smdk6410.o
+obj-$(CONFIG_MACH_NCP)          += mach-ncp.o
+obj-$(CONFIG_MACH_HMT)          += mach-hmt.o
+
+# device support
+
+obj-y                           += dev-uart.o
+obj-y                           += dev-rtc.o
+obj-y                           += dev-audio.o
+obj-$(CONFIG_S3C_ADC)           += dev-adc.o
+obj-$(CONFIG_S3C64XX_DEV_SPI)   += dev-spi.o
diff --git a/arch/arm/mach-s3c6400/Makefile.boot b/arch/arm/mach-s3c64xx/Makefile.boot
index ba41fdc0a586..ba41fdc0a586 100644
--- a/arch/arm/mach-s3c6400/Makefile.boot
+++ b/arch/arm/mach-s3c64xx/Makefile.boot
diff --git a/arch/arm/mach-s3c64xx/clock.c b/arch/arm/mach-s3c64xx/clock.c
new file mode 100644
index 000000000000..2ac2e7d73e53
--- /dev/null
+++ b/arch/arm/mach-s3c64xx/clock.c
@@ -0,0 +1,809 @@
+/* linux/arch/arm/plat-s3c64xx/clock.c
+ *
+ * Copyright 2008 Openmoko, Inc.
+ * Copyright 2008 Simtec Electronics
+ *      Ben Dooks <ben@simtec.co.uk>
+ *      http://armlinux.simtec.co.uk/
+ *
+ * S3C64XX Base clock support
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/interrupt.h>
+#include <linux/ioport.h>
+#include <linux/clk.h>
+#include <linux/err.h>
+#include <linux/io.h>
+
+#include <mach/hardware.h>
+#include <mach/map.h>
+
+#include <mach/regs-sys.h>
+#include <mach/regs-clock.h>
+#include <mach/pll.h>
+
+#include <plat/cpu.h>
+#include <plat/devs.h>
+#include <plat/cpu-freq.h>
+#include <plat/clock.h>
+#include <plat/clock-clksrc.h>
+
+/* fin_apll, fin_mpll and fin_epll are all the same clock, which we call
+ * ext_xtal_mux for want of an actual name from the manual.
+*/
+
+static struct clk clk_ext_xtal_mux = {
+        .name           = "ext_xtal",
+        .id             = -1,
+};
+
+#define clk_fin_apll clk_ext_xtal_mux
+#define clk_fin_mpll clk_ext_xtal_mux
+#define clk_fin_epll clk_ext_xtal_mux
+
+#define clk_fout_mpll   clk_mpll
+#define clk_fout_epll   clk_epll
+
+struct clk clk_h2 = {
+        .name           = "hclk2",
+        .id             = -1,
+        .rate           = 0,
+};
+
+struct clk clk_27m = {
+        .name           = "clk_27m",
+        .id             = -1,
+        .rate           = 27000000,
+};
+
+static int clk_48m_ctrl(struct clk *clk, int enable)
+{
+        unsigned long flags;
+        u32 val;
+
+        /* can't rely on clock lock, this register has other usages */
+        local_irq_save(flags);
+
+        val = __raw_readl(S3C64XX_OTHERS);
+        if (enable)
+                val |= S3C64XX_OTHERS_USBMASK;
+        else
+                val &= ~S3C64XX_OTHERS_USBMASK;
+
+        __raw_writel(val, S3C64XX_OTHERS);
+        local_irq_restore(flags);
+
+        return 0;
+}
+
+struct clk clk_48m = {
+        .name           = "clk_48m",
+        .id             = -1,
+        .rate           = 48000000,
+        .enable         = clk_48m_ctrl,
+};
+
+static int inline s3c64xx_gate(void __iomem *reg,
+                                struct clk *clk,
+                                int enable)
+{
+        unsigned int ctrlbit = clk->ctrlbit;
+        u32 con;
+
+        con = __raw_readl(reg);
+
+        if (enable)
+                con |= ctrlbit;
+        else
+                con &= ~ctrlbit;
+
+        __raw_writel(con, reg);
+        return 0;
+}
+
+static int s3c64xx_pclk_ctrl(struct clk *clk, int enable)
+{
+        return s3c64xx_gate(S3C_PCLK_GATE, clk, enable);
+}
+
+static int s3c64xx_hclk_ctrl(struct clk *clk, int enable)
+{
+        return s3c64xx_gate(S3C_HCLK_GATE, clk, enable);
+}
+
+int s3c64xx_sclk_ctrl(struct clk *clk, int enable)
+{
+        return s3c64xx_gate(S3C_SCLK_GATE, clk, enable);
+}
+
+static struct clk init_clocks_disable[] = {
+        {
+                .name           = "nand",
+                .id             = -1,
+                .parent         = &clk_h,
+        }, {
+                .name           = "adc",
+                .id             = -1,
+                .parent         = &clk_p,
+                .enable         = s3c64xx_pclk_ctrl,
+                .ctrlbit        = S3C_CLKCON_PCLK_TSADC,
+        }, {
+                .name           = "i2c",
+                .id             = -1,
+                .parent         = &clk_p,
+                .enable         = s3c64xx_pclk_ctrl,
+                .ctrlbit        = S3C_CLKCON_PCLK_IIC,
+        }, {
+                .name           = "iis",
+                .id             = 0,
+                .parent         = &clk_p,
+                .enable         = s3c64xx_pclk_ctrl,
+                .ctrlbit        = S3C_CLKCON_PCLK_IIS0,
+        }, {
+                .name           = "iis",
+                .id             = 1,
+                .parent         = &clk_p,
+                .enable         = s3c64xx_pclk_ctrl,
+                .ctrlbit        = S3C_CLKCON_PCLK_IIS1,
+        }, {
+#ifdef CONFIG_CPU_S3C6410
+                .name           = "iis",
+                .id             = -1,  /* There's only one IISv4 port */
+                .parent         = &clk_p,
+                .enable         = s3c64xx_pclk_ctrl,
+                .ctrlbit        = S3C6410_CLKCON_PCLK_IIS2,
+        }, {
+#endif
+                .name           = "spi",
+                .id             = 0,
+                .parent         = &clk_p,
+                .enable         = s3c64xx_pclk_ctrl,
+                .ctrlbit        = S3C_CLKCON_PCLK_SPI0,
+        }, {
+                .name           = "spi",
+                .id             = 1,
+                .parent         = &clk_p,
+                .enable         = s3c64xx_pclk_ctrl,
+                .ctrlbit        = S3C_CLKCON_PCLK_SPI1,
+        }, {
+                .name           = "spi_48m",
+                .id             = 0,
+                .parent         = &clk_48m,
+                .enable         = s3c64xx_sclk_ctrl,
+                .ctrlbit        = S3C_CLKCON_SCLK_SPI0_48,
+        }, {
+                .name           = "spi_48m",
+                .id             = 1,
+                .parent         = &clk_48m,
+                .enable         = s3c64xx_sclk_ctrl,
+                .ctrlbit        = S3C_CLKCON_SCLK_SPI1_48,
+        }, {
+                .name           = "48m",
+                .id             = 0,
+                .parent         = &clk_48m,
+                .enable         = s3c64xx_sclk_ctrl,
+                .ctrlbit        = S3C_CLKCON_SCLK_MMC0_48,
+        }, {
+                .name           = "48m",
+                .id             = 1,
+                .parent         = &clk_48m,
+                .enable         = s3c64xx_sclk_ctrl,
+                .ctrlbit        = S3C_CLKCON_SCLK_MMC1_48,
+        }, {
+                .name           = "48m",
+                .id             = 2,
+                .parent         = &clk_48m,
+                .enable         = s3c64xx_sclk_ctrl,
+                .ctrlbit        = S3C_CLKCON_SCLK_MMC2_48,
+        }, {
+                .name           = "dma0",
+                .id             = -1,
+                .parent         = &clk_h,
+                .enable         = s3c64xx_hclk_ctrl,
+                .ctrlbit        = S3C_CLKCON_HCLK_DMA0,
+        }, {
+                .name           = "dma1",
+                .id             = -1,
+                .parent         = &clk_h,
+                .enable         = s3c64xx_hclk_ctrl,
+                .ctrlbit        = S3C_CLKCON_HCLK_DMA1,
+        },
+};
+
+static struct clk init_clocks[] = {
+        {
+                .name           = "lcd",
+                .id             = -1,
+                .parent         = &clk_h,
+                .enable         = s3c64xx_hclk_ctrl,
+                .ctrlbit        = S3C_CLKCON_HCLK_LCD,
+        }, {
+                .name           = "gpio",
+                .id             = -1,
+                .parent         = &clk_p,
+                .enable         = s3c64xx_pclk_ctrl,
+                .ctrlbit        = S3C_CLKCON_PCLK_GPIO,
+        }, {
+                .name           = "usb-host",
+                .id             = -1,
+                .parent         = &clk_h,
+                .enable         = s3c64xx_hclk_ctrl,
+                .ctrlbit        = S3C_CLKCON_HCLK_UHOST,
+        }, {
+                .name           = "hsmmc",
+                .id             = 0,
+                .parent         = &clk_h,
+                .enable         = s3c64xx_hclk_ctrl,
+                .ctrlbit        = S3C_CLKCON_HCLK_HSMMC0,
+        }, {
+                .name           = "hsmmc",
+                .id             = 1,
+                .parent         = &clk_h,
+                .enable         = s3c64xx_hclk_ctrl,
+                .ctrlbit        = S3C_CLKCON_HCLK_HSMMC1,
+        }, {
+                .name           = "hsmmc",
+                .id             = 2,
+                .parent         = &clk_h,
+                .enable         = s3c64xx_hclk_ctrl,
+                .ctrlbit        = S3C_CLKCON_HCLK_HSMMC2,
+        }, {
+                .name           = "timers",
+                .id             = -1,
+                .parent         = &clk_p,
+                .enable         = s3c64xx_pclk_ctrl,
+                .ctrlbit        = S3C_CLKCON_PCLK_PWM,
+        }, {
+                .name           = "uart",
+                .id             = 0,
+                .parent         = &clk_p,
+                .enable         = s3c64xx_pclk_ctrl,
+                .ctrlbit        = S3C_CLKCON_PCLK_UART0,
+        }, {
+                .name           = "uart",
+                .id             = 1,
+                .parent         = &clk_p,
+                .enable         = s3c64xx_pclk_ctrl,
+                .ctrlbit        = S3C_CLKCON_PCLK_UART1,
+        }, {
+                .name           = "uart",
+                .id             = 2,
+                .parent         = &clk_p,
+                .enable         = s3c64xx_pclk_ctrl,
+                .ctrlbit        = S3C_CLKCON_PCLK_UART2,
+        }, {
+                .name           = "uart",
+                .id             = 3,
+                .parent         = &clk_p,
+                .enable         = s3c64xx_pclk_ctrl,
+                .ctrlbit        = S3C_CLKCON_PCLK_UART3,
+        }, {
+                .name           = "rtc",
+                .id             = -1,
+                .parent         = &clk_p,
+                .enable         = s3c64xx_pclk_ctrl,
+                .ctrlbit        = S3C_CLKCON_PCLK_RTC,
+        }, {
+                .name           = "watchdog",
+                .id             = -1,
+                .parent         = &clk_p,
+                .ctrlbit        = S3C_CLKCON_PCLK_WDT,
+        }, {
+                .name           = "ac97",
+                .id             = -1,
+                .parent         = &clk_p,
+                .ctrlbit        = S3C_CLKCON_PCLK_AC97,
+        }
+};
+
+
+static struct clk clk_fout_apll = {
+        .name           = "fout_apll",
+        .id             = -1,
+};
+
+static struct clk *clk_src_apll_list[] = {
+        [0] = &clk_fin_apll,
+        [1] = &clk_fout_apll,
+};
+
+static struct clksrc_sources clk_src_apll = {
+        .sources        = clk_src_apll_list,
+        .nr_sources     = ARRAY_SIZE(clk_src_apll_list),
+};
+
+static struct clksrc_clk clk_mout_apll = {
+        .clk    = {
+                .name           = "mout_apll",
+                .id             = -1,
+        },
+        .reg_src        = { .reg = S3C_CLK_SRC, .shift = 0, .size = 1  },
+        .sources        = &clk_src_apll,
+};
+
+static struct clk *clk_src_epll_list[] = {
+        [0] = &clk_fin_epll,
+        [1] = &clk_fout_epll,
+};
+
+static struct clksrc_sources clk_src_epll = {
+        .sources        = clk_src_epll_list,
+        .nr_sources     = ARRAY_SIZE(clk_src_epll_list),
+};
+
+static struct clksrc_clk clk_mout_epll = {
+        .clk    = {
+                .name           = "mout_epll",
+                .id             = -1,
+        },
+        .reg_src        = { .reg = S3C_CLK_SRC, .shift = 2, .size = 1  },
+        .sources        = &clk_src_epll,
+};
+
+static struct clk *clk_src_mpll_list[] = {
+        [0] = &clk_fin_mpll,
+        [1] = &clk_fout_mpll,
+};
+
+static struct clksrc_sources clk_src_mpll = {
+        .sources        = clk_src_mpll_list,
+        .nr_sources     = ARRAY_SIZE(clk_src_mpll_list),
+};
+
+static struct clksrc_clk clk_mout_mpll = {
+        .clk = {
+                .name           = "mout_mpll",
+                .id             = -1,
+        },
+        .reg_src        = { .reg = S3C_CLK_SRC, .shift = 1, .size = 1  },
+        .sources        = &clk_src_mpll,
+};
+
+static unsigned int armclk_mask;
+
+static unsigned long s3c64xx_clk_arm_get_rate(struct clk *clk)
+{
+        unsigned long rate = clk_get_rate(clk->parent);
+        u32 clkdiv;
+
+        /* divisor mask starts at bit0, so no need to shift */
+        clkdiv = __raw_readl(S3C_CLK_DIV0) & armclk_mask;
+
+        return rate / (clkdiv + 1);
+}
+
+static unsigned long s3c64xx_clk_arm_round_rate(struct clk *clk,
+                                                unsigned long rate)
+{
+        unsigned long parent = clk_get_rate(clk->parent);
+        u32 div;
+
+        if (parent < rate)
+                return parent;
+
+        div = (parent / rate) - 1;
+        if (div > armclk_mask)
+                div = armclk_mask;
+
+        return parent / (div + 1);
+}
+
+static int s3c64xx_clk_arm_set_rate(struct clk *clk, unsigned long rate)
+{
+        unsigned long parent = clk_get_rate(clk->parent);
+        u32 div;
+        u32 val;
+
+        if (rate < parent / (armclk_mask + 1))
+                return -EINVAL;
+
+        rate = clk_round_rate(clk, rate);
+        div = clk_get_rate(clk->parent) / rate;
+
+        val = __raw_readl(S3C_CLK_DIV0);
+        val &= ~armclk_mask;
+        val |= (div - 1);
+        __raw_writel(val, S3C_CLK_DIV0);
+
+        return 0;
+
+}
+
+static struct clk clk_arm = {
+        .name           = "armclk",
+        .id             = -1,
+        .parent         = &clk_mout_apll.clk,
+        .ops            = &(struct clk_ops) {
+                .get_rate       = s3c64xx_clk_arm_get_rate,
+                .set_rate       = s3c64xx_clk_arm_set_rate,
+                .round_rate     = s3c64xx_clk_arm_round_rate,
+        },
+};
+
+static unsigned long s3c64xx_clk_doutmpll_get_rate(struct clk *clk)
+{
+        unsigned long rate = clk_get_rate(clk->parent);
+
+        printk(KERN_DEBUG "%s: parent is %ld\n", __func__, rate);
+
+        if (__raw_readl(S3C_CLK_DIV0) & S3C6400_CLKDIV0_MPLL_MASK)
+                rate /= 2;
+
+        return rate;
+}
+
+static struct clk_ops clk_dout_ops = {
+        .get_rate       = s3c64xx_clk_doutmpll_get_rate,
+};
+
+static struct clk clk_dout_mpll = {
+        .name           = "dout_mpll",
+        .id             = -1,
+        .parent         = &clk_mout_mpll.clk,
+        .ops            = &clk_dout_ops,
+};
+
+static struct clk *clkset_spi_mmc_list[] = {
+        &clk_mout_epll.clk,
+        &clk_dout_mpll,
+        &clk_fin_epll,
+        &clk_27m,
+};
+
+static struct clksrc_sources clkset_spi_mmc = {
+        .sources        = clkset_spi_mmc_list,
+        .nr_sources     = ARRAY_SIZE(clkset_spi_mmc_list),
+};
+
+static struct clk *clkset_irda_list[] = {
+        &clk_mout_epll.clk,
+        &clk_dout_mpll,
+        NULL,
+        &clk_27m,
+};
+
+static struct clksrc_sources clkset_irda = {
+        .sources        = clkset_irda_list,
+        .nr_sources     = ARRAY_SIZE(clkset_irda_list),
+};
+
+static struct clk *clkset_uart_list[] = {
+        &clk_mout_epll.clk,
+        &clk_dout_mpll,
+        NULL,
+        NULL
+};
+
+static struct clksrc_sources clkset_uart = {
+        .sources        = clkset_uart_list,
+        .nr_sources     = ARRAY_SIZE(clkset_uart_list),
+};
+
+static struct clk *clkset_uhost_list[] = {
+        &clk_48m,
+        &clk_mout_epll.clk,
+        &clk_dout_mpll,
+        &clk_fin_epll,
+};
+
+static struct clksrc_sources clkset_uhost = {
+        .sources        = clkset_uhost_list,
+        .nr_sources     = ARRAY_SIZE(clkset_uhost_list),
+};
+
+/* The peripheral clocks are all controlled via clocksource followed
+ * by an optional divider and gate stage. We currently roll this into
+ * one clock which hides the intermediate clock from the mux.
+ *
+ * Note, the JPEG clock can only be an even divider...
+ *
+ * The scaler and LCD clocks depend on the S3C64XX version, and also
+ * have a common parent divisor so are not included here.
+ */
+
+/* clocks that feed other parts of the clock source tree */
+
+static struct clk clk_iis_cd0 = {
+        .name           = "iis_cdclk0",
+        .id             = -1,
+};
+
+static struct clk clk_iis_cd1 = {
+        .name           = "iis_cdclk1",
+        .id             = -1,
+};
+
+static struct clk clk_pcm_cd = {
+        .name           = "pcm_cdclk",
+        .id             = -1,
+};
+
+static struct clk *clkset_audio0_list[] = {
+        [0] = &clk_mout_epll.clk,
+        [1] = &clk_dout_mpll,
+        [2] = &clk_fin_epll,
+        [3] = &clk_iis_cd0,
+        [4] = &clk_pcm_cd,
+};
+
+static struct clksrc_sources clkset_audio0 = {
+        .sources        = clkset_audio0_list,
+        .nr_sources     = ARRAY_SIZE(clkset_audio0_list),
+};
+
+static struct clk *clkset_audio1_list[] = {
+        [0] = &clk_mout_epll.clk,
+        [1] = &clk_dout_mpll,
+        [2] = &clk_fin_epll,
+        [3] = &clk_iis_cd1,
+        [4] = &clk_pcm_cd,
+};
+
+static struct clksrc_sources clkset_audio1 = {
+        .sources        = clkset_audio1_list,
+        .nr_sources     = ARRAY_SIZE(clkset_audio1_list),
+};
+
+static struct clk *clkset_camif_list[] = {
+        &clk_h2,
+};
+
+static struct clksrc_sources clkset_camif = {
+        .sources        = clkset_camif_list,
+        .nr_sources     = ARRAY_SIZE(clkset_camif_list),
+};
+
+static struct clksrc_clk clksrcs[] = {
+        {
+                .clk    = {
+                        .name           = "mmc_bus",
+                        .id             = 0,
+                        .ctrlbit        = S3C_CLKCON_SCLK_MMC0,
+                        .enable         = s3c64xx_sclk_ctrl,
+                },
+                .reg_src        = { .reg = S3C_CLK_SRC, .shift = 18, .size = 2  },
+                .reg_div        = { .reg = S3C_CLK_DIV1, .shift = 0, .size = 4  },
+                .sources        = &clkset_spi_mmc,
+        }, {
+                .clk    = {
+                        .name           = "mmc_bus",
+                        .id             = 1,
+                        .ctrlbit        = S3C_CLKCON_SCLK_MMC1,
+                        .enable         = s3c64xx_sclk_ctrl,
+                },
+                .reg_src        = { .reg = S3C_CLK_SRC, .shift = 20, .size = 2  },
+                .reg_div        = { .reg = S3C_CLK_DIV1, .shift = 4, .size = 4  },
+                .sources        = &clkset_spi_mmc,
+        }, {
+                .clk    = {
+                        .name           = "mmc_bus",
+                        .id             = 2,
+                        .ctrlbit        = S3C_CLKCON_SCLK_MMC2,
+                        .enable         = s3c64xx_sclk_ctrl,
+                },
+                .reg_src        = { .reg = S3C_CLK_SRC, .shift = 22, .size = 2  },
+                .reg_div        = { .reg = S3C_CLK_DIV1, .shift = 8, .size = 4  },
+                .sources        = &clkset_spi_mmc,
+        }, {
+                .clk    = {
+                        .name           = "usb-bus-host",
+                        .id             = -1,
+                        .ctrlbit        = S3C_CLKCON_SCLK_UHOST,
+                        .enable         = s3c64xx_sclk_ctrl,
+                },
+                .reg_src        = { .reg = S3C_CLK_SRC, .shift = 5, .size = 2  },
+                .reg_div        = { .reg = S3C_CLK_DIV1, .shift = 20, .size = 4  },
+                .sources        = &clkset_uhost,
+        }, {
+                .clk    = {
+                        .name           = "uclk1",
+                        .id             = -1,
+                        .ctrlbit        = S3C_CLKCON_SCLK_UART,
+                        .enable         = s3c64xx_sclk_ctrl,
+                },
+                .reg_src        = { .reg = S3C_CLK_SRC, .shift = 13, .size = 1  },
+                .reg_div        = { .reg = S3C_CLK_DIV2, .shift = 16, .size = 4  },
+                .sources        = &clkset_uart,
+        }, {
+/* Where does UCLK0 come from? */
+                .clk    = {
+                        .name           = "spi-bus",
+                        .id             = 0,
+                        .ctrlbit        = S3C_CLKCON_SCLK_SPI0,
+                        .enable         = s3c64xx_sclk_ctrl,
+                },
+                .reg_src        = { .reg = S3C_CLK_SRC, .shift = 14, .size = 2  },
+                .reg_div        = { .reg = S3C_CLK_DIV2, .shift = 0, .size = 4  },
+                .sources        = &clkset_spi_mmc,
+        }, {
+                .clk    = {
+                        .name           = "spi-bus",
+                        .id             = 1,
+                        .ctrlbit        = S3C_CLKCON_SCLK_SPI1,
+                        .enable         = s3c64xx_sclk_ctrl,
+                },
+                .reg_src        = { .reg = S3C_CLK_SRC, .shift = 16, .size = 2  },
+                .reg_div        = { .reg = S3C_CLK_DIV2, .shift = 4, .size = 4  },
+                .sources        = &clkset_spi_mmc,
+        }, {
+                .clk    = {
+                        .name           = "audio-bus",
+                        .id             = 0,
+                        .ctrlbit        = S3C_CLKCON_SCLK_AUDIO0,
+                        .enable         = s3c64xx_sclk_ctrl,
+                },
+                .reg_src        = { .reg = S3C_CLK_SRC, .shift = 7, .size = 3  },
+                .reg_div        = { .reg = S3C_CLK_DIV2, .shift = 8, .size = 4  },
+                .sources        = &clkset_audio0,
+        }, {
+                .clk    = {
+                        .name           = "audio-bus",
+                        .id             = 1,
+                        .ctrlbit        = S3C_CLKCON_SCLK_AUDIO1,
+                        .enable         = s3c64xx_sclk_ctrl,
+                },
+                .reg_src        = { .reg = S3C_CLK_SRC, .shift = 10, .size = 3  },
+                .reg_div        = { .reg = S3C_CLK_DIV2, .shift = 12, .size = 4  },
+                .sources        = &clkset_audio1,
+        }, {
+                .clk    = {
+                        .name           = "irda-bus",
+                        .id             = 0,
+                        .ctrlbit        = S3C_CLKCON_SCLK_IRDA,
+                        .enable         = s3c64xx_sclk_ctrl,
+                },
+                .reg_src        = { .reg = S3C_CLK_SRC, .shift = 24, .size = 2  },
+                .reg_div        = { .reg = S3C_CLK_DIV2, .shift = 20, .size = 4  },
+                .sources        = &clkset_irda,
+        }, {
+                .clk    = {
+                        .name           = "camera",
+                        .id             = -1,
+                        .ctrlbit        = S3C_CLKCON_SCLK_CAM,
+                        .enable         = s3c64xx_sclk_ctrl,
+                },
+                .reg_div        = { .reg = S3C_CLK_DIV0, .shift = 20, .size = 4  },
+                .reg_src        = { .reg = NULL, .shift = 0, .size = 0  },
+                .sources        = &clkset_camif,
+        },
+};
+
+/* Clock initialisation code */
+
+static struct clksrc_clk *init_parents[] = {
+        &clk_mout_apll,
+        &clk_mout_epll,
+        &clk_mout_mpll,
+};
+
+#define GET_DIV(clk, field) ((((clk) & field##_MASK) >> field##_SHIFT) + 1)
+
+void __init_or_cpufreq s3c6400_setup_clocks(void)
+{
+        struct clk *xtal_clk;
+        unsigned long xtal;
+        unsigned long fclk;
+        unsigned long hclk;
+        unsigned long hclk2;
+        unsigned long pclk;
+        unsigned long epll;
+        unsigned long apll;
+        unsigned long mpll;
+        unsigned int ptr;
+        u32 clkdiv0;
+
+        printk(KERN_DEBUG "%s: registering clocks\n", __func__);
+
+        clkdiv0 = __raw_readl(S3C_CLK_DIV0);
+        printk(KERN_DEBUG "%s: clkdiv0 = %08x\n", __func__, clkdiv0);
+
+        xtal_clk = clk_get(NULL, "xtal");
+        BUG_ON(IS_ERR(xtal_clk));
+
+        xtal = clk_get_rate(xtal_clk);
+        clk_put(xtal_clk);
+
+        printk(KERN_DEBUG "%s: xtal is %ld\n", __func__, xtal);
+
+        /* For now assume the mux always selects the crystal */
+        clk_ext_xtal_mux.parent = xtal_clk;
+
+        epll = s3c6400_get_epll(xtal);
+        mpll = s3c6400_get_pll(xtal, __raw_readl(S3C_MPLL_CON));
+        apll = s3c6400_get_pll(xtal, __raw_readl(S3C_APLL_CON));
+
+        fclk = mpll;
+
+        printk(KERN_INFO "S3C64XX: PLL settings, A=%ld, M=%ld, E=%ld\n",
+               apll, mpll, epll);
+
+        hclk2 = mpll / GET_DIV(clkdiv0, S3C6400_CLKDIV0_HCLK2);
+        hclk = hclk2 / GET_DIV(clkdiv0, S3C6400_CLKDIV0_HCLK);
+        pclk = hclk2 / GET_DIV(clkdiv0, S3C6400_CLKDIV0_PCLK);
+
+        printk(KERN_INFO "S3C64XX: HCLK2=%ld, HCLK=%ld, PCLK=%ld\n",
+               hclk2, hclk, pclk);
+
+        clk_fout_mpll.rate = mpll;
+        clk_fout_epll.rate = epll;
+        clk_fout_apll.rate = apll;
+
+        clk_h2.rate = hclk2;
+        clk_h.rate = hclk;
+        clk_p.rate = pclk;
+        clk_f.rate = fclk;
+
+        for (ptr = 0; ptr < ARRAY_SIZE(init_parents); ptr++)
+                s3c_set_clksrc(init_parents[ptr], true);
+
+        for (ptr = 0; ptr < ARRAY_SIZE(clksrcs); ptr++)
+                s3c_set_clksrc(&clksrcs[ptr], true);
+}
+
+static struct clk *clks1[] __initdata = {
+        &clk_ext_xtal_mux,
+        &clk_iis_cd0,
+        &clk_iis_cd1,
+        &clk_pcm_cd,
+        &clk_mout_epll.clk,
+        &clk_mout_mpll.clk,
+        &clk_dout_mpll,
+        &clk_arm,
+};
+
+static struct clk *clks[] __initdata = {
+        &clk_ext,
+        &clk_epll,
+        &clk_27m,
+        &clk_48m,
+        &clk_h2,
+};
+
+/**
+ * s3c64xx_register_clocks - register clocks for s3c6400 and s3c6410
+ * @xtal: The rate for the clock crystal feeding the PLLs.
+ * @armclk_divlimit: Divisor mask for ARMCLK.
+ *
+ * Register the clocks for the S3C6400 and S3C6410 SoC range, such
+ * as ARMCLK as well as the necessary parent clocks.
+ *
+ * This call does not setup the clocks, which is left to the
+ * s3c6400_setup_clocks() call which may be needed by the cpufreq
+ * or resume code to re-set the clocks if the bootloader has changed
+ * them.
+ */
+void __init s3c64xx_register_clocks(unsigned long xtal, 
+                                    unsigned armclk_divlimit)
+{
+        struct clk *clkp;
+        int ret;
+        int ptr;
+
+        armclk_mask = armclk_divlimit;
+
+        s3c24xx_register_baseclocks(xtal);
+        s3c24xx_register_clocks(clks, ARRAY_SIZE(clks));
+
+        s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks));
+
+        clkp = init_clocks_disable;
+        for (ptr = 0; ptr < ARRAY_SIZE(init_clocks_disable); ptr++, clkp++) {
+
+                ret = s3c24xx_register_clock(clkp);
+                if (ret < 0) {
+                        printk(KERN_ERR "Failed to register clock %s (%d)\n",
+                               clkp->name, ret);
+                }
+
+                (clkp->enable)(clkp, 0);
+        }
+
+        s3c24xx_register_clocks(clks1, ARRAY_SIZE(clks1));
+        s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs));
+        s3c_pwmclk_init();
+}
diff --git a/arch/arm/plat-s3c64xx/cpu.c b/arch/arm/mach-s3c64xx/cpu.c
index 49796d2db86d..374e45e566b8 100644
--- a/arch/arm/plat-s3c64xx/cpu.c
+++ b/arch/arm/mach-s3c64xx/cpu.c
@@ -33,8 +33,8 @@
 #include <plat/devs.h>
 #include <plat/clock.h>
 
-#include <plat/s3c6400.h>
-#include <plat/s3c6410.h>
+#include <mach/s3c6400.h>
+#include <mach/s3c6410.h>
 
 /* table of supported CPUs */
 
@@ -73,17 +73,22 @@ static struct map_desc s3c_iodesc[] __initdata = {
                 .length         = SZ_4K,
                 .type           = MT_DEVICE,
         }, {
+                .virtual        = (unsigned long)S3C_VA_MEM,
+                .pfn            = __phys_to_pfn(S3C64XX_PA_SROM),
+                .length         = SZ_4K,
+                .type           = MT_DEVICE,
+        }, {
                 .virtual        = (unsigned long)(S3C_VA_UART + UART_OFFS),
                 .pfn            = __phys_to_pfn(S3C_PA_UART),
                 .length         = SZ_4K,
                 .type           = MT_DEVICE,
         }, {
-                .virtual        = (unsigned long)S3C_VA_VIC0,
+                .virtual        = (unsigned long)VA_VIC0,
                 .pfn            = __phys_to_pfn(S3C64XX_PA_VIC0),
                 .length         = SZ_16K,
                 .type           = MT_DEVICE,
         }, {
-                .virtual        = (unsigned long)S3C_VA_VIC1,
+                .virtual        = (unsigned long)VA_VIC1,
                 .pfn            = __phys_to_pfn(S3C64XX_PA_VIC1),
                 .length         = SZ_16K,
                 .type           = MT_DEVICE,
@@ -124,6 +129,12 @@ static struct sys_device s3c64xx_sysdev = {
         .cls    = &s3c64xx_sysclass,
 };
 
+/* uart registration process */
+
+void __init s3c6400_common_init_uarts(struct s3c2410_uartcfg *cfg, int no)
+{
+        s3c24xx_init_uartdevs("s3c6400-uart", s3c64xx_uart_resources, cfg, no);
+}
 
 /* read cpu identification code */
 
diff --git a/arch/arm/plat-s3c64xx/cpufreq.c b/arch/arm/mach-s3c64xx/cpufreq.c
index 74c0e8347de5..74c0e8347de5 100644
--- a/arch/arm/plat-s3c64xx/cpufreq.c
+++ b/arch/arm/mach-s3c64xx/cpufreq.c
diff --git a/arch/arm/mach-s3c64xx/dev-adc.c b/arch/arm/mach-s3c64xx/dev-adc.c
new file mode 100644
index 000000000000..fafef9b6bcfa
--- /dev/null
+++ b/arch/arm/mach-s3c64xx/dev-adc.c
@@ -0,0 +1,46 @@
+/* linux/arch/arm/plat-s3c64xx/dev-adc.c
+ *
+ * Copyright 2010 Maurus Cuelenaere
+ *
+ * S3C64xx series device definition for ADC device
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include <linux/kernel.h>
+#include <linux/string.h>
+#include <linux/platform_device.h>
+
+#include <mach/irqs.h>
+#include <mach/map.h>
+
+#include <plat/adc.h>
+#include <plat/devs.h>
+#include <plat/cpu.h>
+
+static struct resource s3c_adc_resource[] = {
+        [0] = {
+                .start = S3C64XX_PA_ADC,
+                .end   = S3C64XX_PA_ADC + SZ_256 - 1,
+                .flags = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start = IRQ_TC,
+                .end   = IRQ_TC,
+                .flags = IORESOURCE_IRQ,
+        },
+        [2] = {
+                .start = IRQ_ADC,
+                .end   = IRQ_ADC,
+                .flags = IORESOURCE_IRQ,
+        },
+};
+
+struct platform_device s3c_device_adc = {
+        .name           = "s3c64xx-adc",
+        .id             = -1,
+        .num_resources  = ARRAY_SIZE(s3c_adc_resource),
+        .resource       = s3c_adc_resource,
+};
diff --git a/arch/arm/mach-s3c64xx/dev-audio.c b/arch/arm/mach-s3c64xx/dev-audio.c
new file mode 100644
index 000000000000..c3e9e73bd0f9
--- /dev/null
+++ b/arch/arm/mach-s3c64xx/dev-audio.c
@@ -0,0 +1,335 @@
+/* linux/arch/arm/plat-s3c/dev-audio.c
+ *
+ * Copyright 2009 Wolfson Microelectronics
+ *      Mark Brown <broonie@opensource.wolfsonmicro.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/kernel.h>
+#include <linux/string.h>
+#include <linux/platform_device.h>
+#include <linux/dma-mapping.h>
+
+#include <mach/irqs.h>
+#include <mach/map.h>
+#include <mach/dma.h>
+#include <mach/gpio.h>
+
+#include <plat/devs.h>
+#include <plat/audio.h>
+#include <plat/gpio-cfg.h>
+
+#include <mach/gpio-bank-c.h>
+#include <mach/gpio-bank-d.h>
+#include <mach/gpio-bank-e.h>
+#include <mach/gpio-bank-h.h>
+
+static int s3c64xx_i2sv3_cfg_gpio(struct platform_device *pdev)
+{
+        switch (pdev->id) {
+        case 0:
+                s3c_gpio_cfgpin(S3C64XX_GPD(0), S3C64XX_GPD0_I2S0_CLK);
+                s3c_gpio_cfgpin(S3C64XX_GPD(1), S3C64XX_GPD1_I2S0_CDCLK);
+                s3c_gpio_cfgpin(S3C64XX_GPD(2), S3C64XX_GPD2_I2S0_LRCLK);
+                s3c_gpio_cfgpin(S3C64XX_GPD(3), S3C64XX_GPD3_I2S0_DI);
+                s3c_gpio_cfgpin(S3C64XX_GPD(4), S3C64XX_GPD4_I2S0_D0);
+                break;
+        case 1:
+                s3c_gpio_cfgpin(S3C64XX_GPE(0), S3C64XX_GPE0_I2S1_CLK);
+                s3c_gpio_cfgpin(S3C64XX_GPE(1), S3C64XX_GPE1_I2S1_CDCLK);
+                s3c_gpio_cfgpin(S3C64XX_GPE(2), S3C64XX_GPE2_I2S1_LRCLK);
+                s3c_gpio_cfgpin(S3C64XX_GPE(3), S3C64XX_GPE3_I2S1_DI);
+                s3c_gpio_cfgpin(S3C64XX_GPE(4), S3C64XX_GPE4_I2S1_D0);
+        default:
+                printk(KERN_DEBUG "Invalid I2S Controller number!");
+                return -EINVAL;
+        }
+
+        return 0;
+}
+
+static int s3c64xx_i2sv4_cfg_gpio(struct platform_device *pdev)
+{
+        s3c_gpio_cfgpin(S3C64XX_GPC(4), S3C64XX_GPC4_I2S_V40_DO0);
+        s3c_gpio_cfgpin(S3C64XX_GPC(5), S3C64XX_GPC5_I2S_V40_DO1);
+        s3c_gpio_cfgpin(S3C64XX_GPC(7), S3C64XX_GPC7_I2S_V40_DO2);
+        s3c_gpio_cfgpin(S3C64XX_GPH(6), S3C64XX_GPH6_I2S_V40_BCLK);
+        s3c_gpio_cfgpin(S3C64XX_GPH(7), S3C64XX_GPH7_I2S_V40_CDCLK);
+        s3c_gpio_cfgpin(S3C64XX_GPH(8), S3C64XX_GPH8_I2S_V40_LRCLK);
+        s3c_gpio_cfgpin(S3C64XX_GPH(9), S3C64XX_GPH9_I2S_V40_DI);
+
+        return 0;
+}
+
+static struct resource s3c64xx_iis0_resource[] = {
+        [0] = {
+                .start = S3C64XX_PA_IIS0,
+                .end   = S3C64XX_PA_IIS0 + 0x100 - 1,
+                .flags = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start = DMACH_I2S0_OUT,
+                .end   = DMACH_I2S0_OUT,
+                .flags = IORESOURCE_DMA,
+        },
+        [2] = {
+                .start = DMACH_I2S0_IN,
+                .end   = DMACH_I2S0_IN,
+                .flags = IORESOURCE_DMA,
+        },
+};
+
+static struct s3c_audio_pdata s3c_i2s0_pdata = {
+        .cfg_gpio = s3c64xx_i2sv3_cfg_gpio,
+};
+
+struct platform_device s3c64xx_device_iis0 = {
+        .name             = "s3c64xx-iis",
+        .id               = 0,
+        .num_resources    = ARRAY_SIZE(s3c64xx_iis0_resource),
+        .resource         = s3c64xx_iis0_resource,
+        .dev = {
+                .platform_data = &s3c_i2s0_pdata,
+        },
+};
+EXPORT_SYMBOL(s3c64xx_device_iis0);
+
+static struct resource s3c64xx_iis1_resource[] = {
+        [0] = {
+                .start = S3C64XX_PA_IIS1,
+                .end   = S3C64XX_PA_IIS1 + 0x100 - 1,
+                .flags = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start = DMACH_I2S1_OUT,
+                .end   = DMACH_I2S1_OUT,
+                .flags = IORESOURCE_DMA,
+        },
+        [2] = {
+                .start = DMACH_I2S1_IN,
+                .end   = DMACH_I2S1_IN,
+                .flags = IORESOURCE_DMA,
+        },
+};
+
+static struct s3c_audio_pdata s3c_i2s1_pdata = {
+        .cfg_gpio = s3c64xx_i2sv3_cfg_gpio,
+};
+
+struct platform_device s3c64xx_device_iis1 = {
+        .name             = "s3c64xx-iis",
+        .id               = 1,
+        .num_resources    = ARRAY_SIZE(s3c64xx_iis1_resource),
+        .resource         = s3c64xx_iis1_resource,
+        .dev = {
+                .platform_data = &s3c_i2s1_pdata,
+        },
+};
+EXPORT_SYMBOL(s3c64xx_device_iis1);
+
+static struct resource s3c64xx_iisv4_resource[] = {
+        [0] = {
+                .start = S3C64XX_PA_IISV4,
+                .end   = S3C64XX_PA_IISV4 + 0x100 - 1,
+                .flags = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start = DMACH_HSI_I2SV40_TX,
+                .end   = DMACH_HSI_I2SV40_TX,
+                .flags = IORESOURCE_DMA,
+        },
+        [2] = {
+                .start = DMACH_HSI_I2SV40_RX,
+                .end   = DMACH_HSI_I2SV40_RX,
+                .flags = IORESOURCE_DMA,
+        },
+};
+
+static struct s3c_audio_pdata s3c_i2sv4_pdata = {
+        .cfg_gpio = s3c64xx_i2sv4_cfg_gpio,
+};
+
+struct platform_device s3c64xx_device_iisv4 = {
+        .name             = "s3c64xx-iis-v4",
+        .id               = -1,
+        .num_resources    = ARRAY_SIZE(s3c64xx_iisv4_resource),
+        .resource         = s3c64xx_iisv4_resource,
+        .dev = {
+                .platform_data = &s3c_i2sv4_pdata,
+        },
+};
+EXPORT_SYMBOL(s3c64xx_device_iisv4);
+
+
+/* PCM Controller platform_devices */
+
+static int s3c64xx_pcm_cfg_gpio(struct platform_device *pdev)
+{
+        switch (pdev->id) {
+        case 0:
+                s3c_gpio_cfgpin(S3C64XX_GPD(0), S3C64XX_GPD0_PCM0_SCLK);
+                s3c_gpio_cfgpin(S3C64XX_GPD(1), S3C64XX_GPD1_PCM0_EXTCLK);
+                s3c_gpio_cfgpin(S3C64XX_GPD(2), S3C64XX_GPD2_PCM0_FSYNC);
+                s3c_gpio_cfgpin(S3C64XX_GPD(3), S3C64XX_GPD3_PCM0_SIN);
+                s3c_gpio_cfgpin(S3C64XX_GPD(4), S3C64XX_GPD4_PCM0_SOUT);
+                break;
+        case 1:
+                s3c_gpio_cfgpin(S3C64XX_GPE(0), S3C64XX_GPE0_PCM1_SCLK);
+                s3c_gpio_cfgpin(S3C64XX_GPE(1), S3C64XX_GPE1_PCM1_EXTCLK);
+                s3c_gpio_cfgpin(S3C64XX_GPE(2), S3C64XX_GPE2_PCM1_FSYNC);
+                s3c_gpio_cfgpin(S3C64XX_GPE(3), S3C64XX_GPE3_PCM1_SIN);
+                s3c_gpio_cfgpin(S3C64XX_GPE(4), S3C64XX_GPE4_PCM1_SOUT);
+                break;
+        default:
+                printk(KERN_DEBUG "Invalid PCM Controller number!");
+                return -EINVAL;
+        }
+
+        return 0;
+}
+
+static struct resource s3c64xx_pcm0_resource[] = {
+        [0] = {
+                .start = S3C64XX_PA_PCM0,
+                .end   = S3C64XX_PA_PCM0 + 0x100 - 1,
+                .flags = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start = DMACH_PCM0_TX,
+                .end   = DMACH_PCM0_TX,
+                .flags = IORESOURCE_DMA,
+        },
+        [2] = {
+                .start = DMACH_PCM0_RX,
+                .end   = DMACH_PCM0_RX,
+                .flags = IORESOURCE_DMA,
+        },
+};
+
+static struct s3c_audio_pdata s3c_pcm0_pdata = {
+        .cfg_gpio = s3c64xx_pcm_cfg_gpio,
+};
+
+struct platform_device s3c64xx_device_pcm0 = {
+        .name             = "samsung-pcm",
+        .id               = 0,
+        .num_resources    = ARRAY_SIZE(s3c64xx_pcm0_resource),
+        .resource         = s3c64xx_pcm0_resource,
+        .dev = {
+                .platform_data = &s3c_pcm0_pdata,
+        },
+};
+EXPORT_SYMBOL(s3c64xx_device_pcm0);
+
+static struct resource s3c64xx_pcm1_resource[] = {
+        [0] = {
+                .start = S3C64XX_PA_PCM1,
+                .end   = S3C64XX_PA_PCM1 + 0x100 - 1,
+                .flags = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start = DMACH_PCM1_TX,
+                .end   = DMACH_PCM1_TX,
+                .flags = IORESOURCE_DMA,
+        },
+        [2] = {
+                .start = DMACH_PCM1_RX,
+                .end   = DMACH_PCM1_RX,
+                .flags = IORESOURCE_DMA,
+        },
+};
+
+static struct s3c_audio_pdata s3c_pcm1_pdata = {
+        .cfg_gpio = s3c64xx_pcm_cfg_gpio,
+};
+
+struct platform_device s3c64xx_device_pcm1 = {
+        .name             = "samsung-pcm",
+        .id               = 1,
+        .num_resources    = ARRAY_SIZE(s3c64xx_pcm1_resource),
+        .resource         = s3c64xx_pcm1_resource,
+        .dev = {
+                .platform_data = &s3c_pcm1_pdata,
+        },
+};
+EXPORT_SYMBOL(s3c64xx_device_pcm1);
+
+/* AC97 Controller platform devices */
+
+static int s3c64xx_ac97_cfg_gpd(struct platform_device *pdev)
+{
+        s3c_gpio_cfgpin(S3C64XX_GPD(0), S3C64XX_GPD0_AC97_BITCLK);
+        s3c_gpio_cfgpin(S3C64XX_GPD(1), S3C64XX_GPD1_AC97_nRESET);
+        s3c_gpio_cfgpin(S3C64XX_GPD(2), S3C64XX_GPD2_AC97_SYNC);
+        s3c_gpio_cfgpin(S3C64XX_GPD(3), S3C64XX_GPD3_AC97_SDI);
+        s3c_gpio_cfgpin(S3C64XX_GPD(4), S3C64XX_GPD4_AC97_SDO);
+
+        return 0;
+}
+
+static int s3c64xx_ac97_cfg_gpe(struct platform_device *pdev)
+{
+        s3c_gpio_cfgpin(S3C64XX_GPE(0), S3C64XX_GPE0_AC97_BITCLK);
+        s3c_gpio_cfgpin(S3C64XX_GPE(1), S3C64XX_GPE1_AC97_nRESET);
+        s3c_gpio_cfgpin(S3C64XX_GPE(2), S3C64XX_GPE2_AC97_SYNC);
+        s3c_gpio_cfgpin(S3C64XX_GPE(3), S3C64XX_GPE3_AC97_SDI);
+        s3c_gpio_cfgpin(S3C64XX_GPE(4), S3C64XX_GPE4_AC97_SDO);
+
+        return 0;
+}
+
+static struct resource s3c64xx_ac97_resource[] = {
+        [0] = {
+                .start = S3C64XX_PA_AC97,
+                .end   = S3C64XX_PA_AC97 + 0x100 - 1,
+                .flags = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start = DMACH_AC97_PCMOUT,
+                .end   = DMACH_AC97_PCMOUT,
+                .flags = IORESOURCE_DMA,
+        },
+        [2] = {
+                .start = DMACH_AC97_PCMIN,
+                .end   = DMACH_AC97_PCMIN,
+                .flags = IORESOURCE_DMA,
+        },
+        [3] = {
+                .start = DMACH_AC97_MICIN,
+                .end   = DMACH_AC97_MICIN,
+                .flags = IORESOURCE_DMA,
+        },
+        [4] = {
+                .start = IRQ_AC97,
+                .end   = IRQ_AC97,
+                .flags = IORESOURCE_IRQ,
+        },
+};
+
+static struct s3c_audio_pdata s3c_ac97_pdata;
+
+static u64 s3c64xx_ac97_dmamask = DMA_BIT_MASK(32);
+
+struct platform_device s3c64xx_device_ac97 = {
+        .name             = "s3c-ac97",
+        .id               = -1,
+        .num_resources    = ARRAY_SIZE(s3c64xx_ac97_resource),
+        .resource         = s3c64xx_ac97_resource,
+        .dev = {
+                .platform_data = &s3c_ac97_pdata,
+                .dma_mask = &s3c64xx_ac97_dmamask,
+                .coherent_dma_mask = DMA_BIT_MASK(32),
+        },
+};
+EXPORT_SYMBOL(s3c64xx_device_ac97);
+
+void __init s3c64xx_ac97_setup_gpio(int num)
+{
+        if (num == S3C64XX_AC97_GPD)
+                s3c_ac97_pdata.cfg_gpio = s3c64xx_ac97_cfg_gpd;
+        else
+                s3c_ac97_pdata.cfg_gpio = s3c64xx_ac97_cfg_gpe;
+}
diff --git a/arch/arm/mach-s3c64xx/dev-rtc.c b/arch/arm/mach-s3c64xx/dev-rtc.c
new file mode 100644
index 000000000000..b9e7a05f0129
--- /dev/null
+++ b/arch/arm/mach-s3c64xx/dev-rtc.c
@@ -0,0 +1,43 @@
+/* linux/arch/arm/plat-s3c64xx/dev-rtc.c
+ *
+ * Copyright 2009 by Maurus Cuelenaere <mcuelenaere@gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/kernel.h>
+#include <linux/string.h>
+#include <linux/platform_device.h>
+
+#include <mach/irqs.h>
+#include <mach/map.h>
+
+#include <plat/devs.h>
+
+static struct resource s3c_rtc_resource[] = {
+        [0] = {
+                .start = S3C64XX_PA_RTC,
+                .end   = S3C64XX_PA_RTC + 0xff,
+                .flags = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start = IRQ_RTC_ALARM,
+                .end   = IRQ_RTC_ALARM,
+                .flags = IORESOURCE_IRQ,
+        },
+        [2] = {
+                .start = IRQ_RTC_TIC,
+                .end   = IRQ_RTC_TIC,
+                .flags = IORESOURCE_IRQ
+        }
+};
+
+struct platform_device s3c_device_rtc = {
+        .name             = "s3c64xx-rtc",
+        .id               = -1,
+        .num_resources    = ARRAY_SIZE(s3c_rtc_resource),
+        .resource         = s3c_rtc_resource,
+};
+EXPORT_SYMBOL(s3c_device_rtc);
diff --git a/arch/arm/mach-s3c64xx/dev-spi.c b/arch/arm/mach-s3c64xx/dev-spi.c
new file mode 100644
index 000000000000..29c32d088515
--- /dev/null
+++ b/arch/arm/mach-s3c64xx/dev-spi.c
@@ -0,0 +1,182 @@
+/* linux/arch/arm/plat-s3c64xx/dev-spi.c
+ *
+ * Copyright (C) 2009 Samsung Electronics Ltd.
+ *      Jaswinder Singh <jassi.brar@samsung.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/kernel.h>
+#include <linux/string.h>
+#include <linux/platform_device.h>
+#include <linux/dma-mapping.h>
+
+#include <mach/dma.h>
+#include <mach/map.h>
+#include <mach/gpio.h>
+#include <mach/gpio-bank-c.h>
+#include <mach/spi-clocks.h>
+
+#include <plat/s3c64xx-spi.h>
+#include <plat/gpio-cfg.h>
+#include <plat/irqs.h>
+
+static char *spi_src_clks[] = {
+        [S3C64XX_SPI_SRCCLK_PCLK] = "pclk",
+        [S3C64XX_SPI_SRCCLK_SPIBUS] = "spi-bus",
+        [S3C64XX_SPI_SRCCLK_48M] = "spi_48m",
+};
+
+/* SPI Controller platform_devices */
+
+/* Since we emulate multi-cs capability, we do not touch the GPC-3,7.
+ * The emulated CS is toggled by board specific mechanism, as it can
+ * be either some immediate GPIO or some signal out of some other
+ * chip in between ... or some yet another way.
+ * We simply do not assume anything about CS.
+ */
+static int s3c64xx_spi_cfg_gpio(struct platform_device *pdev)
+{
+        switch (pdev->id) {
+        case 0:
+                s3c_gpio_cfgpin(S3C64XX_GPC(0), S3C64XX_GPC0_SPI_MISO0);
+                s3c_gpio_cfgpin(S3C64XX_GPC(1), S3C64XX_GPC1_SPI_CLKO);
+                s3c_gpio_cfgpin(S3C64XX_GPC(2), S3C64XX_GPC2_SPI_MOSIO);
+                s3c_gpio_setpull(S3C64XX_GPC(0), S3C_GPIO_PULL_UP);
+                s3c_gpio_setpull(S3C64XX_GPC(1), S3C_GPIO_PULL_UP);
+                s3c_gpio_setpull(S3C64XX_GPC(2), S3C_GPIO_PULL_UP);
+                break;
+
+        case 1:
+                s3c_gpio_cfgpin(S3C64XX_GPC(4), S3C64XX_GPC4_SPI_MISO1);
+                s3c_gpio_cfgpin(S3C64XX_GPC(5), S3C64XX_GPC5_SPI_CLK1);
+                s3c_gpio_cfgpin(S3C64XX_GPC(6), S3C64XX_GPC6_SPI_MOSI1);
+                s3c_gpio_setpull(S3C64XX_GPC(4), S3C_GPIO_PULL_UP);
+                s3c_gpio_setpull(S3C64XX_GPC(5), S3C_GPIO_PULL_UP);
+                s3c_gpio_setpull(S3C64XX_GPC(6), S3C_GPIO_PULL_UP);
+                break;
+
+        default:
+                dev_err(&pdev->dev, "Invalid SPI Controller number!");
+                return -EINVAL;
+        }
+
+        return 0;
+}
+
+static struct resource s3c64xx_spi0_resource[] = {
+        [0] = {
+                .start = S3C64XX_PA_SPI0,
+                .end   = S3C64XX_PA_SPI0 + 0x100 - 1,
+                .flags = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start = DMACH_SPI0_TX,
+                .end   = DMACH_SPI0_TX,
+                .flags = IORESOURCE_DMA,
+        },
+        [2] = {
+                .start = DMACH_SPI0_RX,
+                .end   = DMACH_SPI0_RX,
+                .flags = IORESOURCE_DMA,
+        },
+        [3] = {
+                .start = IRQ_SPI0,
+                .end   = IRQ_SPI0,
+                .flags = IORESOURCE_IRQ,
+        },
+};
+
+static struct s3c64xx_spi_info s3c64xx_spi0_pdata = {
+        .cfg_gpio = s3c64xx_spi_cfg_gpio,
+        .fifo_lvl_mask = 0x7f,
+        .rx_lvl_offset = 13,
+};
+
+static u64 spi_dmamask = DMA_BIT_MASK(32);
+
+struct platform_device s3c64xx_device_spi0 = {
+        .name             = "s3c64xx-spi",
+        .id               = 0,
+        .num_resources    = ARRAY_SIZE(s3c64xx_spi0_resource),
+        .resource         = s3c64xx_spi0_resource,
+        .dev = {
+                .dma_mask               = &spi_dmamask,
+                .coherent_dma_mask      = DMA_BIT_MASK(32),
+                .platform_data = &s3c64xx_spi0_pdata,
+        },
+};
+EXPORT_SYMBOL(s3c64xx_device_spi0);
+
+static struct resource s3c64xx_spi1_resource[] = {
+        [0] = {
+                .start = S3C64XX_PA_SPI1,
+                .end   = S3C64XX_PA_SPI1 + 0x100 - 1,
+                .flags = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start = DMACH_SPI1_TX,
+                .end   = DMACH_SPI1_TX,
+                .flags = IORESOURCE_DMA,
+        },
+        [2] = {
+                .start = DMACH_SPI1_RX,
+                .end   = DMACH_SPI1_RX,
+                .flags = IORESOURCE_DMA,
+        },
+        [3] = {
+                .start = IRQ_SPI1,
+                .end   = IRQ_SPI1,
+                .flags = IORESOURCE_IRQ,
+        },
+};
+
+static struct s3c64xx_spi_info s3c64xx_spi1_pdata = {
+        .cfg_gpio = s3c64xx_spi_cfg_gpio,
+        .fifo_lvl_mask = 0x7f,
+        .rx_lvl_offset = 13,
+};
+
+struct platform_device s3c64xx_device_spi1 = {
+        .name             = "s3c64xx-spi",
+        .id               = 1,
+        .num_resources    = ARRAY_SIZE(s3c64xx_spi1_resource),
+        .resource         = s3c64xx_spi1_resource,
+        .dev = {
+                .dma_mask               = &spi_dmamask,
+                .coherent_dma_mask      = DMA_BIT_MASK(32),
+                .platform_data = &s3c64xx_spi1_pdata,
+        },
+};
+EXPORT_SYMBOL(s3c64xx_device_spi1);
+
+void __init s3c64xx_spi_set_info(int cntrlr, int src_clk_nr, int num_cs)
+{
+        struct s3c64xx_spi_info *pd;
+
+        /* Reject invalid configuration */
+        if (!num_cs || src_clk_nr < 0
+                        || src_clk_nr > S3C64XX_SPI_SRCCLK_48M) {
+                printk(KERN_ERR "%s: Invalid SPI configuration\n", __func__);
+                return;
+        }
+
+        switch (cntrlr) {
+        case 0:
+                pd = &s3c64xx_spi0_pdata;
+                break;
+        case 1:
+                pd = &s3c64xx_spi1_pdata;
+                break;
+        default:
+                printk(KERN_ERR "%s: Invalid SPI controller(%d)\n",
+                                                        __func__, cntrlr);
+                return;
+        }
+
+        pd->num_cs = num_cs;
+        pd->src_clk_nr = src_clk_nr;
+        pd->src_clk_name = spi_src_clks[src_clk_nr];
+}
diff --git a/arch/arm/plat-s3c64xx/dev-uart.c b/arch/arm/mach-s3c64xx/dev-uart.c
index 62c11a6fc7ba..f797f748b999 100644
--- a/arch/arm/plat-s3c64xx/dev-uart.c
+++ b/arch/arm/mach-s3c64xx/dev-uart.c
@@ -145,32 +145,3 @@ struct s3c24xx_uart_resources s3c64xx_uart_resources[] __initdata = {
                 .nr_resources   = ARRAY_SIZE(s3c64xx_uart3_resource),
         },
 };
-
-/* uart devices */
-
-static struct platform_device s3c24xx_uart_device0 = {
-        .id             = 0,
-};
-
-static struct platform_device s3c24xx_uart_device1 = {
-        .id             = 1,
-};
-
-static struct platform_device s3c24xx_uart_device2 = {
-        .id             = 2,
-};
-
-static struct platform_device s3c24xx_uart_device3 = {
-        .id             = 3,
-};
-
-struct platform_device *s3c24xx_uart_src[4] = {
-        &s3c24xx_uart_device0,
-        &s3c24xx_uart_device1,
-        &s3c24xx_uart_device2,
-        &s3c24xx_uart_device3,
-};
-
-struct platform_device *s3c24xx_uart_devs[4] = {
-};
-
diff --git a/arch/arm/plat-s3c64xx/dma.c b/arch/arm/mach-s3c64xx/dma.c
index d554b936fcfb..b62bdf18dca4 100644
--- a/arch/arm/plat-s3c64xx/dma.c
+++ b/arch/arm/mach-s3c64xx/dma.c
@@ -27,8 +27,7 @@
 #include <mach/map.h>
 #include <mach/irqs.h>
 
-#include <plat/dma-plat.h>
-#include <plat/regs-sys.h>
+#include <mach/regs-sys.h>
 
 #include <asm/hardware/pl080.h>
 
diff --git a/arch/arm/plat-s3c64xx/gpiolib.c b/arch/arm/mach-s3c64xx/gpiolib.c
index 778560457277..66e6794481d2 100644
--- a/arch/arm/plat-s3c64xx/gpiolib.c
+++ b/arch/arm/mach-s3c64xx/gpiolib.c
@@ -18,11 +18,11 @@
 
 #include <mach/map.h>
 #include <mach/gpio.h>
-#include <mach/gpio-core.h>
 
+#include <plat/gpio-core.h>
 #include <plat/gpio-cfg.h>
 #include <plat/gpio-cfg-helpers.h>
-#include <plat/regs-gpio.h>
+#include <mach/regs-gpio.h>
 
 /* GPIO bank summary:
  *
@@ -49,150 +49,6 @@
  * [2] BANK has two control registers, GPxCON0 and GPxCON1
  */
 
-#define OFF_GPCON       (0x00)
-#define OFF_GPDAT       (0x04)
-
-#define con_4bit_shift(__off) ((__off) * 4)
-
-#if 1
-#define gpio_dbg(x...) do { } while(0)
-#else
-#define gpio_dbg(x...) printk(KERN_DEBUG x)
-#endif
-
-/* The s3c64xx_gpiolib_4bit routines are to control the gpio banks where
- * the gpio configuration register (GPxCON) has 4 bits per GPIO, as the
- * following example:
- *
- * base + 0x00: Control register, 4 bits per gpio
- *              gpio n: 4 bits starting at (4*n)
- *              0000 = input, 0001 = output, others mean special-function
- * base + 0x04: Data register, 1 bit per gpio
- *              bit n: data bit n
- *
- * Note, since the data register is one bit per gpio and is at base + 0x4
- * we can use s3c_gpiolib_get and s3c_gpiolib_set to change the state of
- * the output.
-*/
-
-static int s3c64xx_gpiolib_4bit_input(struct gpio_chip *chip, unsigned offset)
-{
-        struct s3c_gpio_chip *ourchip = to_s3c_gpio(chip);
-        void __iomem *base = ourchip->base;
-        unsigned long con;
-
-        con = __raw_readl(base + OFF_GPCON);
-        con &= ~(0xf << con_4bit_shift(offset));
-        __raw_writel(con, base + OFF_GPCON);
-
-        gpio_dbg("%s: %p: CON now %08lx\n", __func__, base, con);
-
-        return 0;
-}
-
-static int s3c64xx_gpiolib_4bit_output(struct gpio_chip *chip,
-                                       unsigned offset, int value)
-{
-        struct s3c_gpio_chip *ourchip = to_s3c_gpio(chip);
-        void __iomem *base = ourchip->base;
-        unsigned long con;
-        unsigned long dat;
-
-        con = __raw_readl(base + OFF_GPCON);
-        con &= ~(0xf << con_4bit_shift(offset));
-        con |= 0x1 << con_4bit_shift(offset);
-
-        dat = __raw_readl(base + OFF_GPDAT);
-        if (value)
-                dat |= 1 << offset;
-        else
-                dat &= ~(1 << offset);
-
-        __raw_writel(dat, base + OFF_GPDAT);
-        __raw_writel(con, base + OFF_GPCON);
-        __raw_writel(dat, base + OFF_GPDAT);
-
-        gpio_dbg("%s: %p: CON %08lx, DAT %08lx\n", __func__, base, con, dat);
-
-        return 0;
-}
-
-/* The next set of routines are for the case where the GPIO configuration
- * registers are 4 bits per GPIO but there is more than one register (the
- * bank has more than 8 GPIOs.
- *
- * This case is the similar to the 4 bit case, but the registers are as
- * follows:
- *
- * base + 0x00: Control register, 4 bits per gpio (lower 8 GPIOs)
- *              gpio n: 4 bits starting at (4*n)
- *              0000 = input, 0001 = output, others mean special-function
- * base + 0x04: Control register, 4 bits per gpio (up to 8 additions GPIOs)
- *              gpio n: 4 bits starting at (4*n)
- *              0000 = input, 0001 = output, others mean special-function
- * base + 0x08: Data register, 1 bit per gpio
- *              bit n: data bit n
- *
- * To allow us to use the s3c_gpiolib_get and s3c_gpiolib_set routines we
- * store the 'base + 0x4' address so that these routines see the data
- * register at ourchip->base + 0x04.
-*/
-
-static int s3c64xx_gpiolib_4bit2_input(struct gpio_chip *chip, unsigned offset)
-{
-        struct s3c_gpio_chip *ourchip = to_s3c_gpio(chip);
-        void __iomem *base = ourchip->base;
-        void __iomem *regcon = base;
-        unsigned long con;
-
-        if (offset > 7)
-                offset -= 8;
-        else
-                regcon -= 4;
-
-        con = __raw_readl(regcon);
-        con &= ~(0xf << con_4bit_shift(offset));
-        __raw_writel(con, regcon);
-
-        gpio_dbg("%s: %p: CON %08lx\n", __func__, base, con);
-
-        return 0;
-
-}
-
-static int s3c64xx_gpiolib_4bit2_output(struct gpio_chip *chip,
-                                       unsigned offset, int value)
-{
-        struct s3c_gpio_chip *ourchip = to_s3c_gpio(chip);
-        void __iomem *base = ourchip->base;
-        void __iomem *regcon = base;
-        unsigned long con;
-        unsigned long dat;
-
-        if (offset > 7)
-                offset -= 8;
-        else
-                regcon -= 4;
-
-        con = __raw_readl(regcon);
-        con &= ~(0xf << con_4bit_shift(offset));
-        con |= 0x1 << con_4bit_shift(offset);
-
-        dat = __raw_readl(base + OFF_GPDAT);
-        if (value)
-                dat |= 1 << offset;
-        else
-                dat &= ~(1 << offset);
-
-        __raw_writel(dat, base + OFF_GPDAT);
-        __raw_writel(con, regcon);
-        __raw_writel(dat, base + OFF_GPDAT);
-
-        gpio_dbg("%s: %p: CON %08lx, DAT %08lx\n", __func__, base, con, dat);
-
-        return 0;
-}
-
 static struct s3c_gpio_cfg gpio_4bit_cfg_noint = {
         .set_config     = s3c_gpio_setcfg_s3c64xx_4bit,
         .set_pull       = s3c_gpio_setpull_updown,
@@ -399,20 +255,6 @@ static struct s3c_gpio_chip gpio_2bit[] = {
         },
 };
 
-static __init void s3c64xx_gpiolib_add_4bit(struct s3c_gpio_chip *chip)
-{
-        chip->chip.direction_input = s3c64xx_gpiolib_4bit_input;
-        chip->chip.direction_output = s3c64xx_gpiolib_4bit_output;
-        chip->pm = __gpio_pm(&s3c_gpio_pm_4bit);
-}
-
-static __init void s3c64xx_gpiolib_add_4bit2(struct s3c_gpio_chip *chip)
-{
-        chip->chip.direction_input = s3c64xx_gpiolib_4bit2_input;
-        chip->chip.direction_output = s3c64xx_gpiolib_4bit2_output;
-        chip->pm = __gpio_pm(&s3c_gpio_pm_4bit);
-}
-
 static __init void s3c64xx_gpiolib_add_2bit(struct s3c_gpio_chip *chip)
 {
         chip->pm = __gpio_pm(&s3c_gpio_pm_2bit);
@@ -432,10 +274,10 @@ static __init void s3c64xx_gpiolib_add(struct s3c_gpio_chip *chips,
 static __init int s3c64xx_gpiolib_init(void)
 {
         s3c64xx_gpiolib_add(gpio_4bit, ARRAY_SIZE(gpio_4bit),
-                            s3c64xx_gpiolib_add_4bit);
+                            samsung_gpiolib_add_4bit);
 
         s3c64xx_gpiolib_add(gpio_4bit2, ARRAY_SIZE(gpio_4bit2),
-                            s3c64xx_gpiolib_add_4bit2);
+                            samsung_gpiolib_add_4bit2);
 
         s3c64xx_gpiolib_add(gpio_2bit, ARRAY_SIZE(gpio_2bit),
                             s3c64xx_gpiolib_add_2bit);
diff --git a/arch/arm/mach-s3c6400/include/mach/debug-macro.S b/arch/arm/mach-s3c64xx/include/mach/debug-macro.S
index 5c88875d6a3f..b18ac5266dfc 100644
--- a/arch/arm/mach-s3c6400/include/mach/debug-macro.S
+++ b/arch/arm/mach-s3c64xx/include/mach/debug-macro.S
@@ -21,7 +21,7 @@
          * aligned and add in the offset when we load the value here.
          */
 
-        .macro addruart, rx, tmp
+        .macro addruart, rx
                 mrc     p15, 0, \rx, c1, c0
                 tst     \rx, #1
                 ldreq   \rx, = S3C_PA_UART
diff --git a/arch/arm/plat-s3c64xx/include/plat/dma-plat.h b/arch/arm/mach-s3c64xx/include/mach/dma.h
index 8f76a1e474d6..0a5d9268a23e 100644
--- a/arch/arm/plat-s3c64xx/include/plat/dma-plat.h
+++ b/arch/arm/mach-s3c64xx/include/mach/dma.h
@@ -1,16 +1,71 @@
-/* linux/arch/arm/plat-s3c64xx/include/plat/dma-plat.h
+/* linux/arch/arm/mach-s3c6400/include/mach/dma.h
  *
- * Copyright 2009 Openmoko, Inc.
- * Copyright 2009 Simtec Electronics
- *      Ben Dooks <ben@simtec.co.uk>
- *      http://armlinux.simtec.co.uk/
+ * Copyright 2008 Openmoko, Inc.
+ * Copyright 2008 Simtec Electronics
+ *      Ben Dooks <ben@simtec.co.uk>
+ *      http://armlinux.simtec.co.uk/
  *
- * S3C64XX DMA core
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
+ * S3C6400 - DMA support
+ */
+
+#ifndef __ASM_ARCH_DMA_H
+#define __ASM_ARCH_DMA_H __FILE__
+
+#define S3C_DMA_CHANNELS        (16)
+
+/* see mach-s3c2410/dma.h for notes on dma channel numbers */
+
+/* Note, for the S3C64XX architecture we keep the DMACH_
+ * defines in the order they are allocated to [S]DMA0/[S]DMA1
+ * so that is easy to do DHACH_ -> DMA controller conversion
+ */
+enum dma_ch {
+        /* DMA0/SDMA0 */
+        DMACH_UART0 = 0,
+        DMACH_UART0_SRC2,
+        DMACH_UART1,
+        DMACH_UART1_SRC2,
+        DMACH_UART2,
+        DMACH_UART2_SRC2,
+        DMACH_UART3,
+        DMACH_UART3_SRC2,
+        DMACH_PCM0_TX,
+        DMACH_PCM0_RX,
+        DMACH_I2S0_OUT,
+        DMACH_I2S0_IN,
+        DMACH_SPI0_TX,
+        DMACH_SPI0_RX,
+        DMACH_HSI_I2SV40_TX,
+        DMACH_HSI_I2SV40_RX,
+
+        /* DMA1/SDMA1 */
+        DMACH_PCM1_TX = 16,
+        DMACH_PCM1_RX,
+        DMACH_I2S1_OUT,
+        DMACH_I2S1_IN,
+        DMACH_SPI1_TX,
+        DMACH_SPI1_RX,
+        DMACH_AC97_PCMOUT,
+        DMACH_AC97_PCMIN,
+        DMACH_AC97_MICIN,
+        DMACH_PWM,
+        DMACH_IRDA,
+        DMACH_EXTERNAL,
+        DMACH_RES1,
+        DMACH_RES2,
+        DMACH_SECURITY_RX,      /* SDMA1 only */
+        DMACH_SECURITY_TX,      /* SDMA1 only */
+        DMACH_MAX               /* the end */
+};
+
+static __inline__ bool s3c_dma_has_circular(void)
+{
+        return true;
+}
+
+#define S3C2410_DMAF_CIRCULAR           (1 << 0)
+
+#include <plat/dma.h>
 
 #define DMACH_LOW_LEVEL (1<<28) /* use this to specifiy hardware ch no */
 
@@ -68,3 +123,5 @@ struct s3c2410_dma_chan {
 };
 
 #include <plat/dma-core.h>
+
+#endif /* __ASM_ARCH_IRQ_H */
diff --git a/arch/arm/mach-s3c64xx/include/mach/entry-macro.S b/arch/arm/mach-s3c64xx/include/mach/entry-macro.S
new file mode 100644
index 000000000000..dd362604dcce
--- /dev/null
+++ b/arch/arm/mach-s3c64xx/include/mach/entry-macro.S
@@ -0,0 +1,18 @@
+/* arch/arm/mach-s3c6400/include/mach/entry-macro.S
+ *
+ * Copyright 2008 Openmoko, Inc.
+ * Copyright 2008 Simtec Electronics
+ *      http://armlinux.simtec.co.uk/
+ *      Ben Dooks <ben@simtec.co.uk>
+ *
+ * Low-level IRQ helper macros for the Samsung S3C64XX series
+ *
+ * This file is licensed under  the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+*/
+
+#include <mach/map.h>
+#include <mach/irqs.h>
+
+#include <asm/entry-macro-vic2.S>
diff --git a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-a.h b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-a.h
index 9aa0e427d113..34212e1a7e81 100644
--- a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-a.h
+++ b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-a.h
@@ -1,4 +1,4 @@
-/* linux/arch/arm/plat-s3c64xx/include/plat/gpio-bank-a.h
+/* linux/arch/arm/mach-s3c64xx/include/mach/gpio-bank-a.h
  *
  * Copyright 2008 Openmoko, Inc.
  * Copyright 2008 Simtec Electronics
diff --git a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-b.h b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-b.h
index 3933adb4d50a..7232c037e642 100644
--- a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-b.h
+++ b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-b.h
@@ -1,4 +1,4 @@
-/* linux/arch/arm/plat-s3c64xx/include/plat/gpio-bank-b.h
+/* linux/arch/arm/mach-s3c64xx/include/mach/gpio-bank-b.h
  *
  * Copyright 2008 Openmoko, Inc.
  * Copyright 2008 Simtec Electronics
diff --git a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-c.h b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-c.h
index e22b49f4f982..db189ab1639a 100644
--- a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-c.h
+++ b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-c.h
@@ -1,4 +1,4 @@
-/* linux/arch/arm/plat-s3c64xx/include/plat/gpio-bank-c.h
+/* linux/arch/arm/mach-s3c64xx/include/mach/gpio-bank-c.h
  *
  * Copyright 2008 Openmoko, Inc.
  * Copyright 2008 Simtec Electronics
diff --git a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-d.h b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-d.h
index 6fe4a49c26f0..1a01cee7aca3 100644
--- a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-d.h
+++ b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-d.h
@@ -1,4 +1,4 @@
-/* linux/arch/arm/plat-s3c64xx/include/plat/gpio-bank-d.h
+/* linux/arch/arm/mach-s3c64xx/include/mach/gpio-bank-d.h
  *
  * Copyright 2008 Openmoko, Inc.
  * Copyright 2008 Simtec Electronics
diff --git a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-e.h b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-e.h
index 7fcf3d8e0a48..f057adb627dd 100644
--- a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-e.h
+++ b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-e.h
@@ -1,4 +1,4 @@
-/* linux/arch/arm/plat-s3c64xx/include/plat/gpio-bank-e.h
+/* linux/arch/arm/mach-s3c64xx/include/mach/gpio-bank-e.h
  *
  * Copyright 2008 Openmoko, Inc.
  * Copyright 2008 Simtec Electronics
diff --git a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-f.h b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-f.h
index f3faff974a18..62ab8f5e7835 100644
--- a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-f.h
+++ b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-f.h
@@ -1,4 +1,4 @@
-/* linux/arch/arm/plat-s3c64xx/include/plat/gpio-bank-f.h
+/* linux/arch/arm/mach-s3c64xx/include/mach/gpio-bank-f.h
  *
  * Copyright 2008 Openmoko, Inc.
  * Copyright 2008 Simtec Electronics
diff --git a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-g.h b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-g.h
index 35bbd2378e55..b94954af1598 100644
--- a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-g.h
+++ b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-g.h
@@ -1,4 +1,4 @@
-/* linux/arch/arm/plat-s3c64xx/include/plat/gpio-bank-g.h
+/* linux/arch/arm/mach-s3c64xx/include/mach/gpio-bank-g.h
  *
  * Copyright 2008 Openmoko, Inc.
  * Copyright 2008 Simtec Electronics
diff --git a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-h.h b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-h.h
index 2ba1767512d7..5d75aaad865e 100644
--- a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-h.h
+++ b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-h.h
@@ -1,4 +1,4 @@
-/* linux/arch/arm/plat-s3c64xx/include/plat/gpio-bank-h.h
+/* linux/arch/arm/mach-s3c64xx/include/mach/gpio-bank-h.h
  *
  * Copyright 2008 Openmoko, Inc.
  * Copyright 2008 Simtec Electronics
diff --git a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-i.h b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-i.h
index ce9ebe335566..4ceaa6098bc7 100644
--- a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-i.h
+++ b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-i.h
@@ -1,4 +1,4 @@
-/* linux/arch/arm/plat-s3c64xx/include/plat/gpio-bank-i.h
+/* linux/arch/arm/mach-s3c64xx/include/mach/gpio-bank-i.h
  *
  * Copyright 2008 Openmoko, Inc.
  * Copyright 2008 Simtec Electronics
diff --git a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-j.h b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-j.h
index 21a906299d30..6f25cd079a40 100644
--- a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-j.h
+++ b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-j.h
@@ -1,4 +1,4 @@
-/* linux/arch/arm/plat-s3c64xx/include/plat/gpio-bank-j.h
+/* linux/arch/arm/mach-s3c64xx/include/mach/gpio-bank-j.h
  *
  * Copyright 2008 Openmoko, Inc.
  * Copyright 2008 Simtec Electronics
diff --git a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-n.h b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-n.h
index 569e76120881..d0aeda1cd9de 100644
--- a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-n.h
+++ b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-n.h
@@ -1,4 +1,4 @@
-/* linux/arch/arm/plat-s3c64xx/include/plat/gpio-bank-n.h
+/* linux/arch/arm/mach-s3c64xx/include/mach/gpio-bank-n.h
  *
  * Copyright 2008 Openmoko, Inc.
  * Copyright 2008 Simtec Electronics
diff --git a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-o.h b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-o.h
index b09e12954b57..21868fa102d0 100644
--- a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-o.h
+++ b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-o.h
@@ -1,4 +1,4 @@
-/* linux/arch/arm/plat-s3c64xx/include/plat/gpio-bank-o.h
+/* linux/arch/arm/mach-s3c64xx/include/mach/gpio-bank-o.h
  *
  * Copyright 2008 Openmoko, Inc.
  * Copyright 2008 Simtec Electronics
diff --git a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-p.h b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-p.h
index 92f00517926b..46bcfb63b8de 100644
--- a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-p.h
+++ b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-p.h
@@ -1,4 +1,4 @@
-/* linux/arch/arm/plat-s3c64xx/include/plat/gpio-bank-p.h
+/* linux/arch/arm/mach-s3c64xx/include/mach/gpio-bank-p.h
  *
  * Copyright 2008 Openmoko, Inc.
  * Copyright 2008 Simtec Electronics
diff --git a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-q.h b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-q.h
index 565e60aaee47..1712223487b0 100644
--- a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-q.h
+++ b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-q.h
@@ -1,4 +1,4 @@
-/* linux/arch/arm/plat-s3c64xx/include/plat/gpio-bank-q.h
+/* linux/arch/arm/mach-s3c64xx/include/mach/gpio-bank-q.h
  *
  * Copyright 2008 Openmoko, Inc.
  * Copyright 2008 Simtec Electronics
diff --git a/arch/arm/mach-s3c6400/include/mach/gpio.h b/arch/arm/mach-s3c64xx/include/mach/gpio.h
index e8e35e8fe731..0d46e994048a 100644
--- a/arch/arm/mach-s3c6400/include/mach/gpio.h
+++ b/arch/arm/mach-s3c64xx/include/mach/gpio.h
@@ -91,6 +91,10 @@ enum s3c_gpio_number {
 #define S3C_GPIO_END            S3C64XX_GPIO_END
 
 /* define the number of gpios we need to the one after the GPQ() range */
-#define ARCH_NR_GPIOS   (S3C64XX_GPQ(S3C64XX_GPIO_Q_NR) + 1)
+#define GPIO_BOARD_START (S3C64XX_GPQ(S3C64XX_GPIO_Q_NR) + 1)
+
+#define BOARD_NR_GPIOS 16
+
+#define ARCH_NR_GPIOS   (GPIO_BOARD_START + BOARD_NR_GPIOS)
 
 #include <asm-generic/gpio.h>
diff --git a/arch/arm/mach-s3c6400/include/mach/hardware.h b/arch/arm/mach-s3c64xx/include/mach/hardware.h
index 862d033e57a4..862d033e57a4 100644
--- a/arch/arm/mach-s3c6400/include/mach/hardware.h
+++ b/arch/arm/mach-s3c64xx/include/mach/hardware.h
diff --git a/arch/arm/mach-s3c64xx/include/mach/io.h b/arch/arm/mach-s3c64xx/include/mach/io.h
new file mode 100644
index 000000000000..de5716dbbd65
--- /dev/null
+++ b/arch/arm/mach-s3c64xx/include/mach/io.h
@@ -0,0 +1,18 @@
+/* arch/arm/mach-s3c64xxinclude/mach/io.h
+ *
+ * Copyright 2008 Simtec Electronics
+ *      Ben Dooks <ben-linux@fluff.org>
+ *
+ * Default IO routines for S3C64XX based
+ */
+
+#ifndef __ASM_ARM_ARCH_IO_H
+#define __ASM_ARM_ARCH_IO_H
+
+/* No current ISA/PCI bus support. */
+#define __io(a)         __typesafe_io(a)
+#define __mem_pci(a)    (a)
+
+#define IO_SPACE_LIMIT (0xFFFFFFFF)
+
+#endif
diff --git a/arch/arm/plat-s3c64xx/include/plat/irqs.h b/arch/arm/mach-s3c64xx/include/mach/irqs.h
index 7956fd3bb194..e9ab4ac0b9a8 100644
--- a/arch/arm/plat-s3c64xx/include/plat/irqs.h
+++ b/arch/arm/mach-s3c64xx/include/mach/irqs.h
@@ -1,15 +1,15 @@
-/* linux/arch/arm/plat-s3c64xx/include/mach/irqs.h
+/* linux/arch/arm/mach-s3c64xx/include/mach/irqs.h
  *
  * Copyright 2008 Openmoko, Inc.
  * Copyright 2008 Simtec Electronics
  *      Ben Dooks <ben@simtec.co.uk>
  *      http://armlinux.simtec.co.uk/
  *
- * S3C64XX - Common IRQ support
+ * S3C64XX - IRQ support
  */
 
-#ifndef __ASM_PLAT_S3C64XX_IRQS_H
-#define __ASM_PLAT_S3C64XX_IRQS_H __FILE__
+#ifndef __ASM_MACH_S3C64XX_IRQS_H
+#define __ASM_MACH_S3C64XX_IRQS_H __FILE__
 
 /* we keep the first set of CPU IRQs out of the range of
  * the ISA space, so that the PC104 has them to itself
@@ -24,8 +24,8 @@
 
 #define S3C_IRQ(x)      ((x) + S3C_IRQ_OFFSET)
 
-#define S3C_VIC0_BASE   S3C_IRQ(0)
-#define S3C_VIC1_BASE   S3C_IRQ(32)
+#define IRQ_VIC0_BASE   S3C_IRQ(0)
+#define IRQ_VIC1_BASE   S3C_IRQ(32)
 
 /* UART interrupts, each UART has 4 intterupts per channel so
  * use the space between the ISA and S3C main interrupts. Note, these
@@ -59,8 +59,8 @@
 
 /* VIC based IRQs */
 
-#define S3C64XX_IRQ_VIC0(x)     (S3C_VIC0_BASE + (x))
-#define S3C64XX_IRQ_VIC1(x)     (S3C_VIC1_BASE + (x))
+#define S3C64XX_IRQ_VIC0(x)     (IRQ_VIC0_BASE + (x))
+#define S3C64XX_IRQ_VIC1(x)     (IRQ_VIC1_BASE + (x))
 
 /* VIC0 */
 
@@ -198,7 +198,13 @@
  * interrupt controllers). */
 #define IRQ_BOARD_START (IRQ_EINT_GROUP9_BASE + IRQ_EINT_GROUP9_NR + 1)
 
+#ifdef CONFIG_SMDK6410_WM1190_EV1
+#define IRQ_BOARD_NR 64
+#elif defined(CONFIG_SMDK6410_WM1192_EV1)
+#define IRQ_BOARD_NR 64
+#else
 #define IRQ_BOARD_NR 16
+#endif
 
 #define IRQ_BOARD_END (IRQ_BOARD_START + IRQ_BOARD_NR)
 
@@ -206,5 +212,5 @@
 
 #define NR_IRQS (IRQ_BOARD_END + 1)
 
-#endif /* __ASM_PLAT_S3C64XX_IRQS_H */
+#endif /* __ASM_MACH_S3C64XX_IRQS_H */
 
diff --git a/arch/arm/mach-s3c6400/include/mach/map.h b/arch/arm/mach-s3c64xx/include/mach/map.h
index 106ee13581e2..801c1c0f3a95 100644
--- a/arch/arm/mach-s3c6400/include/mach/map.h
+++ b/arch/arm/mach-s3c64xx/include/mach/map.h
@@ -17,6 +17,18 @@
 
 #include <plat/map-base.h>
 
+/*
+ * Post-mux Chip Select Regions Xm0CSn_
+ * These may be used by SROM, NAND or CF depending on settings
+ */
+
+#define S3C64XX_PA_XM0CSN0 (0x10000000)
+#define S3C64XX_PA_XM0CSN1 (0x18000000)
+#define S3C64XX_PA_XM0CSN2 (0x20000000)
+#define S3C64XX_PA_XM0CSN3 (0x28000000)
+#define S3C64XX_PA_XM0CSN4 (0x30000000)
+#define S3C64XX_PA_XM0CSN5 (0x38000000)
+
 /* HSMMC units */
 #define S3C64XX_PA_HSMMC(x)     (0x7C200000 + ((x) * 0x100000))
 #define S3C64XX_PA_HSMMC0       S3C64XX_PA_HSMMC(0)
@@ -38,16 +50,22 @@
 #define S3C_VA_UART2            S3C_VA_UARTx(2)
 #define S3C_VA_UART3            S3C_VA_UARTx(3)
 
+#define S3C64XX_PA_SROM         (0x70000000)
+
 #define S3C64XX_PA_NAND         (0x70200000)
 #define S3C64XX_PA_FB           (0x77100000)
 #define S3C64XX_PA_USB_HSOTG    (0x7C000000)
 #define S3C64XX_PA_WATCHDOG     (0x7E004000)
+#define S3C64XX_PA_RTC          (0x7E005000)
+#define S3C64XX_PA_ADC          (0x7E00B000)
 #define S3C64XX_PA_SYSCON       (0x7E00F000)
 #define S3C64XX_PA_AC97         (0x7F001000)
 #define S3C64XX_PA_IIS0         (0x7F002000)
 #define S3C64XX_PA_IIS1         (0x7F003000)
 #define S3C64XX_PA_TIMER        (0x7F006000)
 #define S3C64XX_PA_IIC0         (0x7F004000)
+#define S3C64XX_PA_SPI0         (0x7F00B000)
+#define S3C64XX_PA_SPI1         (0x7F00C000)
 #define S3C64XX_PA_PCM0         (0x7F009000)
 #define S3C64XX_PA_PCM1         (0x7F00A000)
 #define S3C64XX_PA_IISV4        (0x7F00D000)
@@ -70,8 +88,8 @@
 #define S3C64XX_VA_USB_HSPHY    S3C_ADDR_CPU(0x00200000)
 
 /* place VICs close together */
-#define S3C_VA_VIC0             (S3C_VA_IRQ + 0x00)
-#define S3C_VA_VIC1             (S3C_VA_IRQ + 0x10000)
+#define VA_VIC0                 (S3C_VA_IRQ + 0x00)
+#define VA_VIC1                 (S3C_VA_IRQ + 0x10000)
 
 /* compatibiltiy defines. */
 #define S3C_PA_TIMER            S3C64XX_PA_TIMER
diff --git a/arch/arm/mach-s3c6400/include/mach/memory.h b/arch/arm/mach-s3c64xx/include/mach/memory.h
index a3ac84a65480..a3ac84a65480 100644
--- a/arch/arm/mach-s3c6400/include/mach/memory.h
+++ b/arch/arm/mach-s3c64xx/include/mach/memory.h
diff --git a/arch/arm/plat-s3c64xx/include/plat/pll.h b/arch/arm/mach-s3c64xx/include/mach/pll.h
index 90bbd72fdc4e..90bbd72fdc4e 100644
--- a/arch/arm/plat-s3c64xx/include/plat/pll.h
+++ b/arch/arm/mach-s3c64xx/include/mach/pll.h
diff --git a/arch/arm/plat-s3c64xx/include/plat/pm-core.h b/arch/arm/mach-s3c64xx/include/mach/pm-core.h
index d347de3ba0dc..1e9f20f0bb7b 100644
--- a/arch/arm/plat-s3c64xx/include/plat/pm-core.h
+++ b/arch/arm/mach-s3c64xx/include/mach/pm-core.h
@@ -1,4 +1,4 @@
-/* linux/arch/arm/plat-s3c64xx/include/plat/pm-core.h
+/* linux/arch/arm/mach-s3c64xx/include/mach/pm-core.h
  *
  * Copyright 2008 Openmoko, Inc.
  * Copyright 2008 Simtec Electronics
@@ -12,7 +12,7 @@
  * published by the Free Software Foundation.
  */
 
-#include <plat/regs-gpio.h>
+#include <mach/regs-gpio.h>
 
 static inline void s3c_pm_debug_init_uart(void)
 {
diff --git a/arch/arm/mach-s3c6400/include/mach/pwm-clock.h b/arch/arm/mach-s3c64xx/include/mach/pwm-clock.h
index b25bedee0d52..b25bedee0d52 100644
--- a/arch/arm/mach-s3c6400/include/mach/pwm-clock.h
+++ b/arch/arm/mach-s3c64xx/include/mach/pwm-clock.h
diff --git a/arch/arm/plat-s3c64xx/include/plat/regs-clock.h b/arch/arm/mach-s3c64xx/include/mach/regs-clock.h
index ff46e7fa957a..3ef62741e5d1 100644
--- a/arch/arm/plat-s3c64xx/include/plat/regs-clock.h
+++ b/arch/arm/mach-s3c64xx/include/mach/regs-clock.h
@@ -35,14 +35,6 @@
 #define S3C_MEM0_GATE           S3C_CLKREG(0x3C)
 
 /* CLKDIV0 */
-#define S3C6400_CLKDIV0_MFC_MASK        (0xf << 28)
-#define S3C6400_CLKDIV0_MFC_SHIFT       (28)
-#define S3C6400_CLKDIV0_JPEG_MASK       (0xf << 24)
-#define S3C6400_CLKDIV0_JPEG_SHIFT      (24)
-#define S3C6400_CLKDIV0_CAM_MASK        (0xf << 20)
-#define S3C6400_CLKDIV0_CAM_SHIFT       (20)
-#define S3C6400_CLKDIV0_SECURITY_MASK   (0x3 << 18)
-#define S3C6400_CLKDIV0_SECURITY_SHIFT  (18)
 #define S3C6400_CLKDIV0_PCLK_MASK       (0xf << 12)
 #define S3C6400_CLKDIV0_PCLK_SHIFT      (12)
 #define S3C6400_CLKDIV0_HCLK2_MASK      (0x7 << 9)
@@ -51,42 +43,11 @@
 #define S3C6400_CLKDIV0_HCLK_SHIFT      (8)
 #define S3C6400_CLKDIV0_MPLL_MASK       (0x1 << 4)
 #define S3C6400_CLKDIV0_MPLL_SHIFT      (4)
+
 #define S3C6400_CLKDIV0_ARM_MASK        (0x7 << 0)
 #define S3C6410_CLKDIV0_ARM_MASK        (0xf << 0)
 #define S3C6400_CLKDIV0_ARM_SHIFT       (0)
 
-/* CLKDIV1 */
-#define S3C6410_CLKDIV1_FIMC_MASK       (0xf << 24)
-#define S3C6410_CLKDIV1_FIMC_SHIFT      (24)
-#define S3C6400_CLKDIV1_UHOST_MASK      (0xf << 20)
-#define S3C6400_CLKDIV1_UHOST_SHIFT     (20)
-#define S3C6400_CLKDIV1_SCALER_MASK     (0xf << 16)
-#define S3C6400_CLKDIV1_SCALER_SHIFT    (16)
-#define S3C6400_CLKDIV1_LCD_MASK        (0xf << 12)
-#define S3C6400_CLKDIV1_LCD_SHIFT       (12)
-#define S3C6400_CLKDIV1_MMC2_MASK       (0xf << 8)
-#define S3C6400_CLKDIV1_MMC2_SHIFT      (8)
-#define S3C6400_CLKDIV1_MMC1_MASK       (0xf << 4)
-#define S3C6400_CLKDIV1_MMC1_SHIFT      (4)
-#define S3C6400_CLKDIV1_MMC0_MASK       (0xf << 0)
-#define S3C6400_CLKDIV1_MMC0_SHIFT      (0)
-
-/* CLKDIV2 */
-#define S3C6410_CLKDIV2_AUDIO2_MASK     (0xf << 24)
-#define S3C6410_CLKDIV2_AUDIO2_SHIFT    (24)
-#define S3C6400_CLKDIV2_IRDA_MASK       (0xf << 20)
-#define S3C6400_CLKDIV2_IRDA_SHIFT      (20)
-#define S3C6400_CLKDIV2_UART_MASK       (0xf << 16)
-#define S3C6400_CLKDIV2_UART_SHIFT      (16)
-#define S3C6400_CLKDIV2_AUDIO1_MASK     (0xf << 12)
-#define S3C6400_CLKDIV2_AUDIO1_SHIFT    (12)
-#define S3C6400_CLKDIV2_AUDIO0_MASK     (0xf << 8)
-#define S3C6400_CLKDIV2_AUDIO0_SHIFT    (8)
-#define S3C6400_CLKDIV2_SPI1_MASK       (0xf << 4)
-#define S3C6400_CLKDIV2_SPI1_SHIFT      (4)
-#define S3C6400_CLKDIV2_SPI0_MASK       (0xf << 0)
-#define S3C6400_CLKDIV2_SPI0_SHIFT      (0)
-
 /* HCLK GATE Registers */
 #define S3C_CLKCON_HCLK_3DSE    (1<<31)
 #define S3C_CLKCON_HCLK_UHOST   (1<<29)
@@ -192,34 +153,4 @@
 #define S3C6400_CLKSRC_EPLL_MOUT_SHIFT  (2)
 #define S3C6400_CLKSRC_MFC              (1 << 4)
 
-#define S3C6410_CLKSRC_TV27_MASK        (0x1 << 31)
-#define S3C6410_CLKSRC_TV27_SHIFT       (31)
-#define S3C6410_CLKSRC_DAC27_MASK       (0x1 << 30)
-#define S3C6410_CLKSRC_DAC27_SHIFT      (30)
-#define S3C6400_CLKSRC_SCALER_MASK      (0x3 << 28)
-#define S3C6400_CLKSRC_SCALER_SHIFT     (28)
-#define S3C6400_CLKSRC_LCD_MASK         (0x3 << 26)
-#define S3C6400_CLKSRC_LCD_SHIFT        (26)
-#define S3C6400_CLKSRC_IRDA_MASK        (0x3 << 24)
-#define S3C6400_CLKSRC_IRDA_SHIFT       (24)
-#define S3C6400_CLKSRC_MMC2_MASK        (0x3 << 22)
-#define S3C6400_CLKSRC_MMC2_SHIFT       (22)
-#define S3C6400_CLKSRC_MMC1_MASK        (0x3 << 20)
-#define S3C6400_CLKSRC_MMC1_SHIFT       (20)
-#define S3C6400_CLKSRC_MMC0_MASK        (0x3 << 18)
-#define S3C6400_CLKSRC_MMC0_SHIFT       (18)
-#define S3C6400_CLKSRC_SPI1_MASK        (0x3 << 16)
-#define S3C6400_CLKSRC_SPI1_SHIFT       (16)
-#define S3C6400_CLKSRC_SPI0_MASK        (0x3 << 14)
-#define S3C6400_CLKSRC_SPI0_SHIFT       (14)
-#define S3C6400_CLKSRC_UART_MASK        (0x1 << 13)
-#define S3C6400_CLKSRC_UART_SHIFT       (13)
-#define S3C6400_CLKSRC_AUDIO1_MASK      (0x7 << 10)
-#define S3C6400_CLKSRC_AUDIO1_SHIFT     (10)
-#define S3C6400_CLKSRC_AUDIO0_MASK      (0x7 << 7)
-#define S3C6400_CLKSRC_AUDIO0_SHIFT     (7)
-#define S3C6400_CLKSRC_UHOST_MASK       (0x3 << 5)
-#define S3C6400_CLKSRC_UHOST_SHIFT      (5)
-
-
 #endif /* _PLAT_REGS_CLOCK_H */
diff --git a/arch/arm/mach-s3c6400/include/mach/regs-fb.h b/arch/arm/mach-s3c64xx/include/mach/regs-fb.h
index f56611526c63..f56611526c63 100644
--- a/arch/arm/mach-s3c6400/include/mach/regs-fb.h
+++ b/arch/arm/mach-s3c64xx/include/mach/regs-fb.h
diff --git a/arch/arm/plat-s3c64xx/include/plat/regs-gpio-memport.h b/arch/arm/mach-s3c64xx/include/mach/regs-gpio-memport.h
index 82342f6fd27d..82342f6fd27d 100644
--- a/arch/arm/plat-s3c64xx/include/plat/regs-gpio-memport.h
+++ b/arch/arm/mach-s3c64xx/include/mach/regs-gpio-memport.h
diff --git a/arch/arm/plat-s3c64xx/include/plat/regs-gpio.h b/arch/arm/mach-s3c64xx/include/mach/regs-gpio.h
index 81f7f6e6832e..81f7f6e6832e 100644
--- a/arch/arm/plat-s3c64xx/include/plat/regs-gpio.h
+++ b/arch/arm/mach-s3c64xx/include/mach/regs-gpio.h
diff --git a/arch/arm/mach-s3c6400/include/mach/regs-irq.h b/arch/arm/mach-s3c64xx/include/mach/regs-irq.h
index bcce68a0bb75..bcce68a0bb75 100644
--- a/arch/arm/mach-s3c6400/include/mach/regs-irq.h
+++ b/arch/arm/mach-s3c64xx/include/mach/regs-irq.h
diff --git a/arch/arm/plat-s3c64xx/include/plat/regs-modem.h b/arch/arm/mach-s3c64xx/include/mach/regs-modem.h
index 49f7759dedfa..49f7759dedfa 100644
--- a/arch/arm/plat-s3c64xx/include/plat/regs-modem.h
+++ b/arch/arm/mach-s3c64xx/include/mach/regs-modem.h
diff --git a/arch/arm/mach-s3c64xx/include/mach/regs-srom.h b/arch/arm/mach-s3c64xx/include/mach/regs-srom.h
new file mode 100644
index 000000000000..756731b36297
--- /dev/null
+++ b/arch/arm/mach-s3c64xx/include/mach/regs-srom.h
@@ -0,0 +1,59 @@
+/* arch/arm/plat-s3c64xx/include/plat/regs-srom.h
+ *
+ * Copyright 2009 Andy Green <andy@warmcat.com>
+ *
+ * S3C64XX SROM definitions
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __PLAT_REGS_SROM_H
+#define __PLAT_REGS_SROM_H __FILE__
+
+#define S3C64XX_SROMREG(x)      (S3C_VA_MEM + (x))
+
+#define S3C64XX_SROM_BW         S3C64XX_SROMREG(0)
+#define S3C64XX_SROM_BC0        S3C64XX_SROMREG(4)
+#define S3C64XX_SROM_BC1        S3C64XX_SROMREG(8)
+#define S3C64XX_SROM_BC2        S3C64XX_SROMREG(0xc)
+#define S3C64XX_SROM_BC3        S3C64XX_SROMREG(0x10)
+#define S3C64XX_SROM_BC4        S3C64XX_SROMREG(0x14)
+#define S3C64XX_SROM_BC5        S3C64XX_SROMREG(0x18)
+
+/*
+ * one register BW holds 5 x 4-bit packed settings for NCS0 - NCS4
+ */
+
+#define S3C64XX_SROM_BW__DATAWIDTH__SHIFT       0
+#define S3C64XX_SROM_BW__WAITENABLE__SHIFT      2
+#define S3C64XX_SROM_BW__BYTEENABLE__SHIFT      3
+#define S3C64XX_SROM_BW__CS_MASK 0xf
+
+#define S3C64XX_SROM_BW__NCS0__SHIFT    0
+#define S3C64XX_SROM_BW__NCS1__SHIFT    4
+#define S3C64XX_SROM_BW__NCS2__SHIFT    8
+#define S3C64XX_SROM_BW__NCS3__SHIFT    0xc
+#define S3C64XX_SROM_BW__NCS4__SHIFT    0x10
+
+/*
+ * applies to same to BCS0 - BCS4
+ */
+
+#define S3C64XX_SROM_BCX__PMC__SHIFT    0
+#define S3C64XX_SROM_BCX__PMC__MASK     3
+#define S3C64XX_SROM_BCX__TACP__SHIFT   4
+#define S3C64XX_SROM_BCX__TACP__MASK    0xf
+#define S3C64XX_SROM_BCX__TCAH__SHIFT   8
+#define S3C64XX_SROM_BCX__TCAH__MASK    0xf
+#define S3C64XX_SROM_BCX__TCOH__SHIFT   12
+#define S3C64XX_SROM_BCX__TCOH__MASK    0xf
+#define S3C64XX_SROM_BCX__TACC__SHIFT   16
+#define S3C64XX_SROM_BCX__TACC__MASK    0x1f
+#define S3C64XX_SROM_BCX__TCOS__SHIFT   24
+#define S3C64XX_SROM_BCX__TCOS__MASK    0xf
+#define S3C64XX_SROM_BCX__TACS__SHIFT   28
+#define S3C64XX_SROM_BCX__TACS__MASK    0xf
+
+#endif /* _PLAT_REGS_SROM_H */
diff --git a/arch/arm/plat-s3c64xx/include/plat/regs-sys.h b/arch/arm/mach-s3c64xx/include/mach/regs-sys.h
index 69b78d9f83b8..69b78d9f83b8 100644
--- a/arch/arm/plat-s3c64xx/include/plat/regs-sys.h
+++ b/arch/arm/mach-s3c64xx/include/mach/regs-sys.h
diff --git a/arch/arm/plat-s3c64xx/include/plat/regs-syscon-power.h b/arch/arm/mach-s3c64xx/include/mach/regs-syscon-power.h
index 270d96ac9705..270d96ac9705 100644
--- a/arch/arm/plat-s3c64xx/include/plat/regs-syscon-power.h
+++ b/arch/arm/mach-s3c64xx/include/mach/regs-syscon-power.h
diff --git a/arch/arm/plat-s3c64xx/include/plat/s3c6400.h b/arch/arm/mach-s3c64xx/include/mach/s3c6400.h
index 11f2e1e119b0..f86958d05352 100644
--- a/arch/arm/plat-s3c64xx/include/plat/s3c6400.h
+++ b/arch/arm/mach-s3c64xx/include/mach/s3c6400.h
@@ -1,4 +1,4 @@
-/* arch/arm/plat-s3c64xx/include/plat/s3c6400.h
+/* arch/arm/mach-s3c64xx/include/macht/s3c6400.h
  *
  * Copyright 2008 Openmoko, Inc.
  * Copyright 2008 Simtec Electronics
@@ -15,9 +15,10 @@
 /* Common init code for S3C6400 related SoCs */
 
 extern void s3c6400_common_init_uarts(struct s3c2410_uartcfg *cfg, int no);
-extern void s3c6400_register_clocks(unsigned armclk_divlimit);
 extern void s3c6400_setup_clocks(void);
 
+extern void s3c64xx_register_clocks(unsigned long xtal, unsigned armclk_limit);
+
 #ifdef CONFIG_CPU_S3C6400
 
 extern  int s3c6400_init(void);
@@ -33,4 +34,3 @@ extern void s3c6400_init_clocks(int xtal);
 #define s3c6400_map_io NULL
 #define s3c6400_init NULL
 #endif
-
diff --git a/arch/arm/plat-s3c64xx/include/plat/s3c6410.h b/arch/arm/mach-s3c64xx/include/mach/s3c6410.h
index 50dcdd6f6800..24f1141ffcb7 100644
--- a/arch/arm/plat-s3c64xx/include/plat/s3c6410.h
+++ b/arch/arm/mach-s3c64xx/include/mach/s3c6410.h
@@ -1,4 +1,4 @@
-/* arch/arm/plat-s3c64xx/include/plat/s3c6410.h
+/* arch/arm/mach-s3c64xx/include/mach/s3c6410.h
  *
  * Copyright 2008 Openmoko,  Inc.
  * Copyright 2008 Simtec Electronics
diff --git a/arch/arm/mach-s3c64xx/include/mach/spi-clocks.h b/arch/arm/mach-s3c64xx/include/mach/spi-clocks.h
new file mode 100644
index 000000000000..9d0c43b4b687
--- /dev/null
+++ b/arch/arm/mach-s3c64xx/include/mach/spi-clocks.h
@@ -0,0 +1,18 @@
+/* linux/arch/arm/mach-s3c64xx/include/mach/spi-clocks.h
+ *
+ * Copyright (C) 2009 Samsung Electronics Ltd.
+ *      Jaswinder Singh <jassi.brar@samsung.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef __S3C64XX_PLAT_SPI_CLKS_H
+#define __S3C64XX_PLAT_SPI_CLKS_H __FILE__
+
+#define S3C64XX_SPI_SRCCLK_PCLK         0
+#define S3C64XX_SPI_SRCCLK_SPIBUS       1
+#define S3C64XX_SPI_SRCCLK_48M          2
+
+#endif /* __S3C64XX_PLAT_SPI_CLKS_H */
diff --git a/arch/arm/mach-s3c6400/include/mach/system.h b/arch/arm/mach-s3c64xx/include/mach/system.h
index 2e58cb7a7147..2e58cb7a7147 100644
--- a/arch/arm/mach-s3c6400/include/mach/system.h
+++ b/arch/arm/mach-s3c64xx/include/mach/system.h
diff --git a/arch/arm/mach-s3c6400/include/mach/tick.h b/arch/arm/mach-s3c64xx/include/mach/tick.h
index d9c0dc7014ec..ebe18a9469b8 100644
--- a/arch/arm/mach-s3c6400/include/mach/tick.h
+++ b/arch/arm/mach-s3c64xx/include/mach/tick.h
@@ -20,7 +20,7 @@
  */
 static inline u32 s3c24xx_ostimer_pending(void)
 {
-        u32 pend = __raw_readl(S3C_VA_VIC0 + VIC_RAW_STATUS);
+        u32 pend = __raw_readl(VA_VIC0 + VIC_RAW_STATUS);
         return pend & 1 << (IRQ_TIMER4_VIC - S3C64XX_IRQ_VIC0(0));
 }
 
diff --git a/arch/arm/mach-s3c64xx/include/mach/timex.h b/arch/arm/mach-s3c64xx/include/mach/timex.h
new file mode 100644
index 000000000000..fb2e8cd40829
--- /dev/null
+++ b/arch/arm/mach-s3c64xx/include/mach/timex.h
@@ -0,0 +1,24 @@
+/* arch/arm/mach-s3c64xx/include/mach/timex.h
+ *
+ * Copyright (c) 2003-2005 Simtec Electronics
+ *      Ben Dooks <ben@simtec.co.uk>
+ *
+ * S3C6400 - time parameters
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_ARCH_TIMEX_H
+#define __ASM_ARCH_TIMEX_H
+
+/* CLOCK_TICK_RATE needs to be evaluatable by the cpp, so making it
+ * a variable is useless. It seems as long as we make our timers an
+ * exact multiple of HZ, any value that makes a 1->1 correspondence
+ * for the time conversion functions to/from jiffies is acceptable.
+*/
+
+#define CLOCK_TICK_RATE 12000000
+
+#endif /* __ASM_ARCH_TIMEX_H */
diff --git a/arch/arm/mach-s3c6400/include/mach/uncompress.h b/arch/arm/mach-s3c64xx/include/mach/uncompress.h
index c6a82a20bf2a..c6a82a20bf2a 100644
--- a/arch/arm/mach-s3c6400/include/mach/uncompress.h
+++ b/arch/arm/mach-s3c64xx/include/mach/uncompress.h
diff --git a/arch/arm/mach-s3c64xx/include/mach/vmalloc.h b/arch/arm/mach-s3c64xx/include/mach/vmalloc.h
new file mode 100644
index 000000000000..7411ef3711a6
--- /dev/null
+++ b/arch/arm/mach-s3c64xx/include/mach/vmalloc.h
@@ -0,0 +1,20 @@
+/* arch/arm/mach-s3c64xx/include/mach/vmalloc.h
+ *
+ * from arch/arm/mach-iop3xx/include/mach/vmalloc.h
+ *
+ * Copyright (c) 2003 Simtec Electronics <linux@simtec.co.uk>
+ *                    http://www.simtec.co.uk/products/SWLINUX/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * S3C6400 vmalloc definition
+*/
+
+#ifndef __ASM_ARCH_VMALLOC_H
+#define __ASM_ARCH_VMALLOC_H
+
+#define VMALLOC_END       (0xE0000000)
+
+#endif /* __ASM_ARCH_VMALLOC_H */
diff --git a/arch/arm/plat-s3c64xx/irq-eint.c b/arch/arm/mach-s3c64xx/irq-eint.c
index ebdf183a0911..5682d6a7f4af 100644
--- a/arch/arm/plat-s3c64xx/irq-eint.c
+++ b/arch/arm/mach-s3c64xx/irq-eint.c
@@ -22,7 +22,7 @@
 #include <asm/hardware/vic.h>
 
 #include <plat/regs-irqtype.h>
-#include <plat/regs-gpio.h>
+#include <mach/regs-gpio.h>
 #include <plat/gpio-cfg.h>
 
 #include <mach/map.h>
diff --git a/arch/arm/plat-s3c64xx/irq-pm.c b/arch/arm/mach-s3c64xx/irq-pm.c
index ca523b5d4c17..da1bec64b9da 100644
--- a/arch/arm/plat-s3c64xx/irq-pm.c
+++ b/arch/arm/mach-s3c64xx/irq-pm.c
@@ -23,7 +23,7 @@
 
 #include <plat/regs-serial.h>
 #include <plat/regs-timer.h>
-#include <plat/regs-gpio.h>
+#include <mach/regs-gpio.h>
 #include <plat/cpu.h>
 #include <plat/pm.h>
 
diff --git a/arch/arm/mach-s3c64xx/irq.c b/arch/arm/mach-s3c64xx/irq.c
new file mode 100644
index 000000000000..67a145d440f3
--- /dev/null
+++ b/arch/arm/mach-s3c64xx/irq.c
@@ -0,0 +1,69 @@
+/* arch/arm/plat-s3c64xx/irq.c
+ *
+ * Copyright 2008 Openmoko, Inc.
+ * Copyright 2008 Simtec Electronics
+ *      Ben Dooks <ben@simtec.co.uk>
+ *      http://armlinux.simtec.co.uk/
+ *
+ * S3C64XX - Interrupt handling
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/kernel.h>
+#include <linux/interrupt.h>
+#include <linux/serial_core.h>
+#include <linux/irq.h>
+#include <linux/io.h>
+
+#include <asm/hardware/vic.h>
+
+#include <mach/map.h>
+#include <plat/irq-vic-timer.h>
+#include <plat/irq-uart.h>
+#include <plat/cpu.h>
+
+static struct s3c_uart_irq uart_irqs[] = {
+        [0] = {
+                .regs           = S3C_VA_UART0,
+                .base_irq       = IRQ_S3CUART_BASE0,
+                .parent_irq     = IRQ_UART0,
+        },
+        [1] = {
+                .regs           = S3C_VA_UART1,
+                .base_irq       = IRQ_S3CUART_BASE1,
+                .parent_irq     = IRQ_UART1,
+        },
+        [2] = {
+                .regs           = S3C_VA_UART2,
+                .base_irq       = IRQ_S3CUART_BASE2,
+                .parent_irq     = IRQ_UART2,
+        },
+        [3] = {
+                .regs           = S3C_VA_UART3,
+                .base_irq       = IRQ_S3CUART_BASE3,
+                .parent_irq     = IRQ_UART3,
+        },
+};
+
+
+void __init s3c64xx_init_irq(u32 vic0_valid, u32 vic1_valid)
+{
+        printk(KERN_DEBUG "%s: initialising interrupts\n", __func__);
+
+        /* initialise the pair of VICs */
+        vic_init(VA_VIC0, IRQ_VIC0_BASE, vic0_valid, 0);
+        vic_init(VA_VIC1, IRQ_VIC1_BASE, vic1_valid, 0);
+
+        /* add the timer sub-irqs */
+
+        s3c_init_vic_timer_irq(IRQ_TIMER0_VIC, IRQ_TIMER0);
+        s3c_init_vic_timer_irq(IRQ_TIMER1_VIC, IRQ_TIMER1);
+        s3c_init_vic_timer_irq(IRQ_TIMER2_VIC, IRQ_TIMER2);
+        s3c_init_vic_timer_irq(IRQ_TIMER3_VIC, IRQ_TIMER3);
+        s3c_init_vic_timer_irq(IRQ_TIMER4_VIC, IRQ_TIMER4);
+
+        s3c_init_uart_irqs(uart_irqs, ARRAY_SIZE(uart_irqs));
+}
diff --git a/arch/arm/mach-s3c6410/mach-anw6410.c b/arch/arm/mach-s3c64xx/mach-anw6410.c
index 661cca63de25..4a0bb243d14a 100644
--- a/arch/arm/mach-s3c6410/mach-anw6410.c
+++ b/arch/arm/mach-s3c64xx/mach-anw6410.c
@@ -1,4 +1,4 @@
-/* linux/arch/arm/mach-s3c6410/mach-anw6410.c
+/* linux/arch/arm/mach-s3c64xx/mach-anw6410.c
  *
  * Copyright 2008 Openmoko, Inc.
  * Copyright 2008 Simtec Electronics
@@ -45,12 +45,12 @@
 #include <plat/iic.h>
 #include <plat/fb.h>
 
-#include <plat/s3c6410.h>
+#include <mach/s3c6410.h>
 #include <plat/clock.h>
 #include <plat/devs.h>
 #include <plat/cpu.h>
-#include <plat/regs-gpio.h>
-#include <plat/regs-modem.h>
+#include <mach/regs-gpio.h>
+#include <mach/regs-modem.h>
 
 /* DM9000 */
 #define ANW6410_PA_DM9000       (0x18000000)
diff --git a/arch/arm/mach-s3c6410/mach-hmt.c b/arch/arm/mach-s3c64xx/mach-hmt.c
index 7619456f2ae8..187441a78dd5 100644
--- a/arch/arm/mach-s3c6410/mach-hmt.c
+++ b/arch/arm/mach-s3c64xx/mach-hmt.c
@@ -38,7 +38,7 @@
 #include <plat/fb.h>
 #include <plat/nand.h>
 
-#include <plat/s3c6410.h>
+#include <mach/s3c6410.h>
 #include <plat/clock.h>
 #include <plat/devs.h>
 #include <plat/cpu.h>
@@ -233,7 +233,7 @@ static struct platform_device *hmt_devices[] __initdata = {
         &s3c_device_i2c0,
         &s3c_device_nand,
         &s3c_device_fb,
-        &s3c_device_usb,
+        &s3c_device_ohci,
         &s3c_device_timer[1],
         &hmt_backlight_device,
         &hmt_leds_device,
diff --git a/arch/arm/mach-s3c6410/mach-ncp.c b/arch/arm/mach-s3c64xx/mach-ncp.c
index 55e9bbfaf68b..bf65747ea68e 100644
--- a/arch/arm/mach-s3c6410/mach-ncp.c
+++ b/arch/arm/mach-s3c64xx/mach-ncp.c
@@ -1,5 +1,5 @@
 /*
- * linux/arch/arm/mach-s3c6410/mach-ncp.c
+ * linux/arch/arm/mach-s3c64xx/mach-ncp.c
  *
  * Copyright (C) 2008-2009 Samsung Electronics
  *
@@ -40,7 +40,7 @@
 #include <plat/iic.h>
 #include <plat/fb.h>
 
-#include <plat/s3c6410.h>
+#include <mach/s3c6410.h>
 #include <plat/clock.h>
 #include <plat/devs.h>
 #include <plat/cpu.h>
diff --git a/arch/arm/mach-s3c6400/mach-smdk6400.c b/arch/arm/mach-s3c64xx/mach-smdk6400.c
index ab19285389a7..f7b18983950c 100644
--- a/arch/arm/mach-s3c6400/mach-smdk6400.c
+++ b/arch/arm/mach-s3c64xx/mach-smdk6400.c
@@ -1,4 +1,4 @@
-/* linux/arch/arm/mach-s3c6400/mach-smdk6400.c
+/* linux/arch/arm/mach-s3c64xx/mach-smdk6400.c
  *
  * Copyright 2008 Simtec Electronics
  *      Ben Dooks <ben@simtec.co.uk>
@@ -31,7 +31,7 @@
 
 #include <plat/regs-serial.h>
 
-#include <plat/s3c6400.h>
+#include <mach/s3c6400.h>
 #include <plat/clock.h>
 #include <plat/devs.h>
 #include <plat/cpu.h>
diff --git a/arch/arm/mach-s3c6410/mach-smdk6410.c b/arch/arm/mach-s3c64xx/mach-smdk6410.c
index 8969fe73b83f..2d5afd221d77 100644
--- a/arch/arm/mach-s3c6410/mach-smdk6410.c
+++ b/arch/arm/mach-s3c64xx/mach-smdk6410.c
@@ -1,4 +1,4 @@
-/* linux/arch/arm/mach-s3c6410/mach-smdk6410.c
+/* linux/arch/arm/mach-s3c64xx/mach-smdk6410.c
  *
  * Copyright 2008 Openmoko, Inc.
  * Copyright 2008 Simtec Electronics
@@ -21,6 +21,7 @@
 #include <linux/platform_device.h>
 #include <linux/io.h>
 #include <linux/i2c.h>
+#include <linux/leds.h>
 #include <linux/fb.h>
 #include <linux/gpio.h>
 #include <linux/delay.h>
@@ -32,6 +33,11 @@
 #include <linux/mfd/wm8350/pmic.h>
 #endif
 
+#ifdef CONFIG_SMDK6410_WM1192_EV1
+#include <linux/mfd/wm831x/core.h>
+#include <linux/mfd/wm831x/pdata.h>
+#endif
+
 #include <video/platform_lcd.h>
 
 #include <asm/mach/arch.h>
@@ -46,14 +52,15 @@
 #include <asm/mach-types.h>
 
 #include <plat/regs-serial.h>
-#include <plat/regs-modem.h>
-#include <plat/regs-gpio.h>
-#include <plat/regs-sys.h>
+#include <mach/regs-modem.h>
+#include <mach/regs-gpio.h>
+#include <mach/regs-sys.h>
+#include <mach/regs-srom.h>
 #include <plat/iic.h>
 #include <plat/fb.h>
 #include <plat/gpio-cfg.h>
 
-#include <plat/s3c6410.h>
+#include <mach/s3c6410.h>
 #include <plat/clock.h>
 #include <plat/devs.h>
 #include <plat/cpu.h>
@@ -154,10 +161,20 @@ static struct s3c_fb_platdata smdk6410_lcd_pdata __initdata = {
         .vidcon1        = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
 };
 
+/*
+ * Configuring Ethernet on SMDK6410
+ *
+ * Both CS8900A and LAN9115 chips share one chip select mediated by CFG6.
+ * The constant address below corresponds to nCS1
+ *
+ *  1) Set CFGB2 p3 ON others off, no other CFGB selects "ethernet"
+ *  2) CFG6 needs to be switched to "LAN9115" side
+ */
+
 static struct resource smdk6410_smsc911x_resources[] = {
         [0] = {
-                .start = 0x18000000,
-                .end   = 0x18000000 + SZ_64K - 1,
+                .start = S3C64XX_PA_XM0CSN1,
+                .end   = S3C64XX_PA_XM0CSN1 + SZ_64K - 1,
                 .flags = IORESOURCE_MEM,
         },
         [1] = {
@@ -235,8 +252,9 @@ static struct platform_device *smdk6410_devices[] __initdata = {
         &s3c_device_i2c0,
         &s3c_device_i2c1,
         &s3c_device_fb,
-        &s3c_device_usb,
+        &s3c_device_ohci,
         &s3c_device_usb_hsotg,
+        &s3c64xx_device_iisv4,
 
 #ifdef CONFIG_REGULATOR
         &smdk6410_b_pwr_5v,
@@ -246,77 +264,124 @@ static struct platform_device *smdk6410_devices[] __initdata = {
         &smdk6410_smsc911x,
 };
 
-#ifdef CONFIG_SMDK6410_WM1190_EV1
-/* S3C64xx internal logic & PLL */
-static struct regulator_init_data wm8350_dcdc1_data = {
+#ifdef CONFIG_REGULATOR
+/* ARM core */
+static struct regulator_consumer_supply smdk6410_vddarm_consumers[] = {
+        {
+                .supply = "vddarm",
+        }
+};
+
+/* VDDARM, BUCK1 on J5 */
+static struct regulator_init_data smdk6410_vddarm = {
         .constraints = {
-                .name = "PVDD_INT/PVDD_PLL",
-                .min_uV = 1200000,
+                .name = "PVDD_ARM",
+                .min_uV = 1000000,
+                .max_uV = 1300000,
+                .always_on = 1,
+                .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
+        },
+        .num_consumer_supplies = ARRAY_SIZE(smdk6410_vddarm_consumers),
+        .consumer_supplies = smdk6410_vddarm_consumers,
+};
+
+/* VDD_INT, BUCK2 on J5 */
+static struct regulator_init_data smdk6410_vddint = {
+        .constraints = {
+                .name = "PVDD_INT",
+                .min_uV = 1000000,
                 .max_uV = 1200000,
                 .always_on = 1,
-                .apply_uV = 1,
+                .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
         },
 };
 
-/* Memory */
-static struct regulator_init_data wm8350_dcdc3_data = {
+/* VDD_HI, LDO3 on J5 */
+static struct regulator_init_data smdk6410_vddhi = {
         .constraints = {
-                .name = "PVDD_MEM",
-                .min_uV = 1800000,
-                .max_uV = 1800000,
+                .name = "PVDD_HI",
                 .always_on = 1,
-                .state_mem = {
-                         .uV = 1800000,
-                         .mode = REGULATOR_MODE_NORMAL,
-                         .enabled = 1,
-                 },
-                .initial_state = PM_SUSPEND_MEM,
         },
 };
 
-/* USB, EXT, PCM, ADC/DAC, USB, MMC */
-static struct regulator_consumer_supply wm8350_dcdc4_consumers[] = {
-        {
-                /* WM8580 */
-                .supply = "DVDD",
-                .dev_name = "0-001b",
+/* VDD_PLL, LDO2 on J5 */
+static struct regulator_init_data smdk6410_vddpll = {
+        .constraints = {
+                .name = "PVDD_PLL",
+                .always_on = 1,
         },
 };
 
-static struct regulator_init_data wm8350_dcdc4_data = {
+/* VDD_UH_MMC, LDO5 on J5 */
+static struct regulator_init_data smdk6410_vdduh_mmc = {
         .constraints = {
-                .name = "PVDD_HI/PVDD_EXT/PVDD_SYS/PVCCM2MTV",
-                .min_uV = 3000000,
-                .max_uV = 3000000,
+                .name = "PVDD_UH/PVDD_MMC",
                 .always_on = 1,
         },
-        .num_consumer_supplies = ARRAY_SIZE(wm8350_dcdc4_consumers),
-        .consumer_supplies = wm8350_dcdc4_consumers,
 };
 
-/* ARM core */
-static struct regulator_consumer_supply dcdc6_consumers[] = {
-        {
-                .supply = "vddarm",
-        }
+/* VCCM3BT, LDO8 on J5 */
+static struct regulator_init_data smdk6410_vccmc3bt = {
+        .constraints = {
+                .name = "PVCCM3BT",
+                .always_on = 1,
+        },
 };
 
-static struct regulator_init_data wm8350_dcdc6_data = {
+/* VCCM2MTV, LDO11 on J5 */
+static struct regulator_init_data smdk6410_vccm2mtv = {
         .constraints = {
-                .name = "PVDD_ARM",
-                .min_uV = 1000000,
-                .max_uV = 1300000,
+                .name = "PVCCM2MTV",
                 .always_on = 1,
-                .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
         },
-        .num_consumer_supplies = ARRAY_SIZE(dcdc6_consumers),
-        .consumer_supplies = dcdc6_consumers,
 };
 
-/* Alive */
-static struct regulator_init_data wm8350_ldo1_data = {
+/* VDD_LCD, LDO12 on J5 */
+static struct regulator_init_data smdk6410_vddlcd = {
+        .constraints = {
+                .name = "PVDD_LCD",
+                .always_on = 1,
+        },
+};
+
+/* VDD_OTGI, LDO9 on J5 */
+static struct regulator_init_data smdk6410_vddotgi = {
+        .constraints = {
+                .name = "PVDD_OTGI",
+                .always_on = 1,
+        },
+};
+
+/* VDD_OTG, LDO14 on J5 */
+static struct regulator_init_data smdk6410_vddotg = {
+        .constraints = {
+                .name = "PVDD_OTG",
+                .always_on = 1,
+        },
+};
+
+/* VDD_ALIVE, LDO15 on J5 */
+static struct regulator_init_data smdk6410_vddalive = {
         .constraints = {
                 .name = "PVDD_ALIVE",
+                .always_on = 1,
+        },
+};
+
+/* VDD_AUDIO, VLDO_AUDIO on J5 */
+static struct regulator_init_data smdk6410_vddaudio = {
+        .constraints = {
+                .name = "PVDD_AUDIO",
+                .always_on = 1,
+        },
+};
+#endif
+
+#ifdef CONFIG_SMDK6410_WM1190_EV1
+/* S3C64xx internal logic & PLL */
+static struct regulator_init_data wm8350_dcdc1_data = {
+        .constraints = {
+                .name = "PVDD_INT/PVDD_PLL",
                 .min_uV = 1200000,
                 .max_uV = 1200000,
                 .always_on = 1,
@@ -324,24 +389,40 @@ static struct regulator_init_data wm8350_ldo1_data = {
         },
 };
 
-/* OTG */
-static struct regulator_init_data wm8350_ldo2_data = {
+/* Memory */
+static struct regulator_init_data wm8350_dcdc3_data = {
         .constraints = {
-                .name = "PVDD_OTG",
-                .min_uV = 3300000,
-                .max_uV = 3300000,
+                .name = "PVDD_MEM",
+                .min_uV = 1800000,
+                .max_uV = 1800000,
                 .always_on = 1,
+                .state_mem = {
+                         .uV = 1800000,
+                         .mode = REGULATOR_MODE_NORMAL,
+                         .enabled = 1,
+                },
+                .initial_state = PM_SUSPEND_MEM,
         },
 };
 
-/* LCD */
-static struct regulator_init_data wm8350_ldo3_data = {
+/* USB, EXT, PCM, ADC/DAC, USB, MMC */
+static struct regulator_consumer_supply wm8350_dcdc4_consumers[] = {
+        {
+                /* WM8580 */
+                .supply = "DVDD",
+                .dev_name = "0-001b",
+        },
+};
+
+static struct regulator_init_data wm8350_dcdc4_data = {
         .constraints = {
-                .name = "PVDD_LCD",
+                .name = "PVDD_HI/PVDD_EXT/PVDD_SYS/PVCCM2MTV",
                 .min_uV = 3000000,
                 .max_uV = 3000000,
                 .always_on = 1,
         },
+        .num_consumer_supplies = ARRAY_SIZE(wm8350_dcdc4_consumers),
+        .consumer_supplies = wm8350_dcdc4_consumers,
 };
 
 /* OTGi/1190-EV1 HPVDD & AVDD */
@@ -362,10 +443,10 @@ static struct {
         { WM8350_DCDC_1, &wm8350_dcdc1_data },
         { WM8350_DCDC_3, &wm8350_dcdc3_data },
         { WM8350_DCDC_4, &wm8350_dcdc4_data },
-        { WM8350_DCDC_6, &wm8350_dcdc6_data },
-        { WM8350_LDO_1, &wm8350_ldo1_data },
-        { WM8350_LDO_2, &wm8350_ldo2_data },
-        { WM8350_LDO_3, &wm8350_ldo3_data },
+        { WM8350_DCDC_6, &smdk6410_vddarm },
+        { WM8350_LDO_1, &smdk6410_vddalive },
+        { WM8350_LDO_2, &smdk6410_vddotg },
+        { WM8350_LDO_3, &smdk6410_vddlcd },
         { WM8350_LDO_4, &wm8350_ldo4_data },
 };
 
@@ -388,6 +469,107 @@ static int __init smdk6410_wm8350_init(struct wm8350 *wm8350)
 static struct wm8350_platform_data __initdata smdk6410_wm8350_pdata = {
         .init = smdk6410_wm8350_init,
         .irq_high = 1,
+        .irq_base = IRQ_BOARD_START,
+};
+#endif
+
+#ifdef CONFIG_SMDK6410_WM1192_EV1
+static struct gpio_led wm1192_pmic_leds[] = {
+        {
+                .name = "PMIC:red:power",
+                .gpio = GPIO_BOARD_START + 3,
+                .default_state = LEDS_GPIO_DEFSTATE_ON,
+        },
+};
+
+static struct gpio_led_platform_data wm1192_pmic_led = {
+        .num_leds = ARRAY_SIZE(wm1192_pmic_leds),
+        .leds = wm1192_pmic_leds,
+};
+
+static struct platform_device wm1192_pmic_led_dev = {
+        .name          = "leds-gpio",
+        .id            = -1,
+        .dev = {
+                .platform_data = &wm1192_pmic_led,
+        },
+};
+
+static int wm1192_pre_init(struct wm831x *wm831x)
+{
+        int ret;
+
+        /* Configure the IRQ line */
+        s3c_gpio_setpull(S3C64XX_GPN(12), S3C_GPIO_PULL_UP);
+
+        ret = platform_device_register(&wm1192_pmic_led_dev);
+        if (ret != 0)
+                dev_err(wm831x->dev, "Failed to add PMIC LED: %d\n", ret);
+
+        return 0;
+}
+
+static struct wm831x_backlight_pdata wm1192_backlight_pdata = {
+        .isink = 1,
+        .max_uA = 27554,
+};
+
+static struct regulator_init_data wm1192_dcdc3 = {
+        .constraints = {
+                .name = "PVDD_MEM/PVDD_GPS",
+                .always_on = 1,
+        },
+};
+
+static struct regulator_consumer_supply wm1192_ldo1_consumers[] = {
+        { .supply = "DVDD", .dev_name = "0-001b", },   /* WM8580 */
+};
+
+static struct regulator_init_data wm1192_ldo1 = {
+        .constraints = {
+                .name = "PVDD_LCD/PVDD_EXT",
+                .always_on = 1,
+        },
+        .consumer_supplies = wm1192_ldo1_consumers,
+        .num_consumer_supplies = ARRAY_SIZE(wm1192_ldo1_consumers),
+};
+
+static struct wm831x_status_pdata wm1192_led7_pdata = {
+        .name = "LED7:green:",
+};
+
+static struct wm831x_status_pdata wm1192_led8_pdata = {
+        .name = "LED8:green:",
+};
+
+static struct wm831x_pdata smdk6410_wm1192_pdata = {
+        .pre_init = wm1192_pre_init,
+        .irq_base = IRQ_BOARD_START,
+
+        .backlight = &wm1192_backlight_pdata,
+        .dcdc = {
+                &smdk6410_vddarm,  /* DCDC1 */
+                &smdk6410_vddint,  /* DCDC2 */
+                &wm1192_dcdc3,
+        },
+        .gpio_base = GPIO_BOARD_START,
+        .ldo = {
+                 &wm1192_ldo1,        /* LDO1 */
+                 &smdk6410_vdduh_mmc, /* LDO2 */
+                 NULL,                /* LDO3 NC */
+                 &smdk6410_vddotgi,   /* LDO4 */
+                 &smdk6410_vddotg,    /* LDO5 */
+                 &smdk6410_vddhi,     /* LDO6 */
+                 &smdk6410_vddaudio,  /* LDO7 */
+                 &smdk6410_vccm2mtv,  /* LDO8 */
+                 &smdk6410_vddpll,    /* LDO9 */
+                 &smdk6410_vccmc3bt,  /* LDO10 */
+                 &smdk6410_vddalive,  /* LDO11 */
+        },
+        .status = {
+                &wm1192_led7_pdata,
+                &wm1192_led8_pdata,
+        },
 };
 #endif
 
@@ -395,6 +577,13 @@ static struct i2c_board_info i2c_devs0[] __initdata = {
         { I2C_BOARD_INFO("24c08", 0x50), },
         { I2C_BOARD_INFO("wm8580", 0x1b), },
 
+#ifdef CONFIG_SMDK6410_WM1192_EV1
+        { I2C_BOARD_INFO("wm8312", 0x34),
+          .platform_data = &smdk6410_wm1192_pdata,
+          .irq = S3C_EINT(12),
+        },
+#endif
+
 #ifdef CONFIG_SMDK6410_WM1190_EV1
         { I2C_BOARD_INFO("wm8350", 0x1a),
           .platform_data = &smdk6410_wm8350_pdata,
@@ -430,10 +619,32 @@ static void __init smdk6410_map_io(void)
 
 static void __init smdk6410_machine_init(void)
 {
+        u32 cs1;
+
         s3c_i2c0_set_platdata(NULL);
         s3c_i2c1_set_platdata(NULL);
         s3c_fb_set_platdata(&smdk6410_lcd_pdata);
 
+        /* configure nCS1 width to 16 bits */
+
+        cs1 = __raw_readl(S3C64XX_SROM_BW) &
+                    ~(S3C64XX_SROM_BW__CS_MASK << S3C64XX_SROM_BW__NCS1__SHIFT);
+        cs1 |= ((1 << S3C64XX_SROM_BW__DATAWIDTH__SHIFT) |
+                (1 << S3C64XX_SROM_BW__WAITENABLE__SHIFT) |
+                (1 << S3C64XX_SROM_BW__BYTEENABLE__SHIFT)) <<
+                                                   S3C64XX_SROM_BW__NCS1__SHIFT;
+        __raw_writel(cs1, S3C64XX_SROM_BW);
+
+        /* set timing for nCS1 suitable for ethernet chip */
+
+        __raw_writel((0 << S3C64XX_SROM_BCX__PMC__SHIFT) |
+                     (6 << S3C64XX_SROM_BCX__TACP__SHIFT) |
+                     (4 << S3C64XX_SROM_BCX__TCAH__SHIFT) |
+                     (1 << S3C64XX_SROM_BCX__TCOH__SHIFT) |
+                     (0xe << S3C64XX_SROM_BCX__TACC__SHIFT) |
+                     (4 << S3C64XX_SROM_BCX__TCOS__SHIFT) |
+                     (0 << S3C64XX_SROM_BCX__TACS__SHIFT), S3C64XX_SROM_BC1);
+
         gpio_request(S3C64XX_GPN(5), "LCD power");
         gpio_request(S3C64XX_GPF(13), "LCD power");
         gpio_request(S3C64XX_GPF(15), "LCD power");
diff --git a/arch/arm/plat-s3c64xx/pm.c b/arch/arm/mach-s3c64xx/pm.c
index 47632fc7eb66..b8ac4597fad7 100644
--- a/arch/arm/plat-s3c64xx/pm.c
+++ b/arch/arm/mach-s3c64xx/pm.c
@@ -20,14 +20,14 @@
 #include <mach/map.h>
 
 #include <plat/pm.h>
-#include <plat/regs-sys.h>
-#include <plat/regs-gpio.h>
-#include <plat/regs-clock.h>
-#include <plat/regs-syscon-power.h>
-#include <plat/regs-gpio-memport.h>
+#include <mach/regs-sys.h>
+#include <mach/regs-gpio.h>
+#include <mach/regs-clock.h>
+#include <mach/regs-syscon-power.h>
+#include <mach/regs-gpio-memport.h>
 
 #ifdef CONFIG_S3C_PM_DEBUG_LED_SMDK
-#include <plat/gpio-bank-n.h>
+#include <mach/gpio-bank-n.h>
 
 void s3c_pm_debug_smdkled(u32 set, u32 clear)
 {
diff --git a/arch/arm/mach-s3c6400/s3c6400.c b/arch/arm/mach-s3c64xx/s3c6400.c
index d876ee503671..707e34e3afd1 100644
--- a/arch/arm/mach-s3c6400/s3c6400.c
+++ b/arch/arm/mach-s3c64xx/s3c6400.c
@@ -1,4 +1,4 @@
-/* linux/arch/arm/mach-s3c6410/cpu.c
+/* linux/arch/arm/mach-s3c64xx/cpu.c
  *
  * Copyright 2009 Simtec Electronics
  *      Ben Dooks <ben@simtec.co.uk>
@@ -30,14 +30,14 @@
 
 #include <plat/cpu-freq.h>
 #include <plat/regs-serial.h>
-#include <plat/regs-clock.h>
+#include <mach/regs-clock.h>
 
 #include <plat/cpu.h>
 #include <plat/devs.h>
 #include <plat/clock.h>
 #include <plat/sdhci.h>
 #include <plat/iic-core.h>
-#include <plat/s3c6400.h>
+#include <mach/s3c6400.h>
 
 void __init s3c6400_map_io(void)
 {
@@ -55,10 +55,7 @@ void __init s3c6400_map_io(void)
 
 void __init s3c6400_init_clocks(int xtal)
 {
-        printk(KERN_DEBUG "%s: initialising clocks\n", __func__);
-        s3c24xx_register_baseclocks(xtal);
-        s3c64xx_register_clocks();
-        s3c6400_register_clocks(S3C6400_CLKDIV0_ARM_MASK);
+        s3c64xx_register_clocks(xtal, S3C6400_CLKDIV0_ARM_MASK);
         s3c6400_setup_clocks();
 }
 
diff --git a/arch/arm/mach-s3c6410/cpu.c b/arch/arm/mach-s3c64xx/s3c6410.c
index 522c08691952..59635d19466a 100644
--- a/arch/arm/mach-s3c6410/cpu.c
+++ b/arch/arm/mach-s3c64xx/s3c6410.c
@@ -1,4 +1,4 @@
-/* linux/arch/arm/mach-s3c6410/cpu.c
+/* linux/arch/arm/mach-s3c64xx/s3c6410.c
  *
  * Copyright 2008 Simtec Electronics
  * Copyright 2008 Simtec Electronics
@@ -31,30 +31,18 @@
 
 #include <plat/cpu-freq.h>
 #include <plat/regs-serial.h>
-#include <plat/regs-clock.h>
+#include <mach/regs-clock.h>
 
 #include <plat/cpu.h>
 #include <plat/devs.h>
 #include <plat/clock.h>
 #include <plat/sdhci.h>
 #include <plat/iic-core.h>
-#include <plat/s3c6400.h>
-#include <plat/s3c6410.h>
-
-/* Initial IO mappings */
-
-static struct map_desc s3c6410_iodesc[] __initdata = {
-};
-
-/* s3c6410_map_io
- *
- * register the standard cpu IO areas
-*/
+#include <mach/s3c6400.h>
+#include <mach/s3c6410.h>
 
 void __init s3c6410_map_io(void)
 {
-        iotable_init(s3c6410_iodesc, ARRAY_SIZE(s3c6410_iodesc));
-
         /* initialise device information early */
         s3c6410_default_sdhci0();
         s3c6410_default_sdhci1();
@@ -70,9 +58,7 @@ void __init s3c6410_map_io(void)
 void __init s3c6410_init_clocks(int xtal)
 {
         printk(KERN_DEBUG "%s: initialising clocks\n", __func__);
-        s3c24xx_register_baseclocks(xtal);
-        s3c64xx_register_clocks();
-        s3c6400_register_clocks(S3C6410_CLKDIV0_ARM_MASK);
+        s3c64xx_register_clocks(xtal, S3C6410_CLKDIV0_ARM_MASK);
         s3c6400_setup_clocks();
 }
 
diff --git a/arch/arm/plat-s3c64xx/setup-fb-24bpp.c b/arch/arm/mach-s3c64xx/setup-fb-24bpp.c
index 8e28e448dd20..8e28e448dd20 100644
--- a/arch/arm/plat-s3c64xx/setup-fb-24bpp.c
+++ b/arch/arm/mach-s3c64xx/setup-fb-24bpp.c
diff --git a/arch/arm/plat-s3c64xx/setup-i2c0.c b/arch/arm/mach-s3c64xx/setup-i2c0.c
index 364480763728..d1b11e6e77e8 100644
--- a/arch/arm/plat-s3c64xx/setup-i2c0.c
+++ b/arch/arm/mach-s3c64xx/setup-i2c0.c
@@ -18,8 +18,8 @@
 struct platform_device; /* don't need the contents */
 
 #include <mach/gpio.h>
+#include <mach/gpio-bank-b.h>
 #include <plat/iic.h>
-#include <plat/gpio-bank-b.h>
 #include <plat/gpio-cfg.h>
 
 void s3c_i2c0_cfg_gpio(struct platform_device *dev)
diff --git a/arch/arm/plat-s3c64xx/setup-i2c1.c b/arch/arm/mach-s3c64xx/setup-i2c1.c
index bbe229bd90ca..2dce57d8c6f8 100644
--- a/arch/arm/plat-s3c64xx/setup-i2c1.c
+++ b/arch/arm/mach-s3c64xx/setup-i2c1.c
@@ -18,8 +18,8 @@
 struct platform_device; /* don't need the contents */
 
 #include <mach/gpio.h>
+#include <mach/gpio-bank-b.h>
 #include <plat/iic.h>
-#include <plat/gpio-bank-b.h>
 #include <plat/gpio-cfg.h>
 
 void s3c_i2c1_cfg_gpio(struct platform_device *dev)
diff --git a/arch/arm/plat-s3c64xx/setup-sdhci-gpio.c b/arch/arm/mach-s3c64xx/setup-sdhci-gpio.c
index a58c0cc7ba5e..a58c0cc7ba5e 100644
--- a/arch/arm/plat-s3c64xx/setup-sdhci-gpio.c
+++ b/arch/arm/mach-s3c64xx/setup-sdhci-gpio.c
diff --git a/arch/arm/mach-s3c6400/setup-sdhci.c b/arch/arm/mach-s3c64xx/setup-sdhci.c
index 1039937403be..1a942037c4ef 100644
--- a/arch/arm/mach-s3c6400/setup-sdhci.c
+++ b/arch/arm/mach-s3c64xx/setup-sdhci.c
@@ -1,11 +1,11 @@
-/* linux/arch/arm/mach-s3c6410/setup-sdhci.c
+/* linux/arch/arm/mach-s3c64xx/setup-sdhci.c
  *
  * Copyright 2008 Simtec Electronics
  * Copyright 2008 Simtec Electronics
  *      Ben Dooks <ben@simtec.co.uk>
  *      http://armlinux.simtec.co.uk/
  *
- * S3C6410 - Helper functions for settign up SDHCI device(s) (HSMMC)
+ * S3C6400/S3C6410 - Helper functions for settign up SDHCI device(s) (HSMMC)
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License version 2 as
@@ -26,7 +26,7 @@
 
 /* clock sources for the mmc bus clock, order as for the ctrl2[5..4] */
 
-char *s3c6400_hsmmc_clksrcs[4] = {
+char *s3c64xx_hsmmc_clksrcs[4] = {
         [0] = "hsmmc",
         [1] = "hsmmc",
         [2] = "mmc_bus",
@@ -61,3 +61,12 @@ void s3c6400_setup_sdhci_cfg_card(struct platform_device *dev,
         writel(ctrl3, r + S3C_SDHCI_CONTROL3);
 }
 
+void s3c6410_setup_sdhci_cfg_card(struct platform_device *dev,
+                                  void __iomem *r,
+                                  struct mmc_ios *ios,
+                                  struct mmc_card *card)
+{
+        writel(S3C64XX_SDHCI_CONTROL4_DRIVE_9mA, r + S3C64XX_SDHCI_CONTROL4);
+
+        s3c6400_setup_sdhci_cfg_card(dev, r, ios, card);
+}
diff --git a/arch/arm/plat-s3c64xx/sleep.S b/arch/arm/mach-s3c64xx/sleep.S
index 8e71fe90a373..b2ef44317368 100644
--- a/arch/arm/plat-s3c64xx/sleep.S
+++ b/arch/arm/mach-s3c64xx/sleep.S
@@ -1,4 +1,4 @@
-/* linux/0arch/arm/plat-s3c64xx/sleep.S
+/* linux/arch/arm/plat-s3c64xx/sleep.S
  *
  * Copyright 2008 Openmoko, Inc.
  * Copyright 2008 Simtec Electronics
@@ -19,8 +19,8 @@
 #undef S3C64XX_VA_GPIO
 #define S3C64XX_VA_GPIO (0x0)
 
-#include <plat/regs-gpio.h>
-#include <plat/gpio-bank-n.h>
+#include <mach/regs-gpio.h>
+#include <mach/gpio-bank-n.h>
 
 #define LL_UART (S3C_PA_UART + (0x400 * CONFIG_S3C_LOWLEVEL_UART_PORT))
 
diff --git a/arch/arm/mach-s5p6440/Kconfig b/arch/arm/mach-s5p6440/Kconfig
new file mode 100644
index 000000000000..4c29ff8b07de
--- /dev/null
+++ b/arch/arm/mach-s5p6440/Kconfig
@@ -0,0 +1,21 @@
+# arch/arm/mach-s5p6440/Kconfig
+#
+# Copyright (c) 2009 Samsung Electronics Co., Ltd.
+#               http://www.samsung.com/
+#
+# Licensed under GPLv2
+
+if ARCH_S5P6440
+
+config CPU_S5P6440
+        bool
+        help
+          Enable S5P6440 CPU support
+
+config MACH_SMDK6440
+        bool "SMDK6440"
+        select CPU_S5P6440
+        help
+          Machine support for the Samsung SMDK6440
+
+endif
diff --git a/arch/arm/mach-s5p6440/Makefile b/arch/arm/mach-s5p6440/Makefile
new file mode 100644
index 000000000000..1ad894b1d3ab
--- /dev/null
+++ b/arch/arm/mach-s5p6440/Makefile
@@ -0,0 +1,19 @@
+# arch/arm/mach-s5p6440/Makefile
+#
+# Copyright (c) 2009 Samsung Electronics Co., Ltd.
+#               http://www.samsung.com/
+#
+# Licensed under GPLv2
+
+obj-y                           :=
+obj-m                           :=
+obj-n                           :=
+obj-                            :=
+
+# Core support for S5P6440 system
+
+obj-$(CONFIG_CPU_S5P6440)       += cpu.o init.o clock.o gpio.o
+
+# machine support
+
+obj-$(CONFIG_MACH_SMDK6440)     += mach-smdk6440.o
diff --git a/arch/arm/mach-s5p6440/Makefile.boot b/arch/arm/mach-s5p6440/Makefile.boot
new file mode 100644
index 000000000000..ff90aa13bd67
--- /dev/null
+++ b/arch/arm/mach-s5p6440/Makefile.boot
@@ -0,0 +1,2 @@
+   zreladdr-y   := 0x20008000
+params_phys-y   := 0x20000100
diff --git a/arch/arm/mach-s5p6440/clock.c b/arch/arm/mach-s5p6440/clock.c
new file mode 100644
index 000000000000..b2672e16e7aa
--- /dev/null
+++ b/arch/arm/mach-s5p6440/clock.c
@@ -0,0 +1,698 @@
+/* linux/arch/arm/mach-s5p6440/clock.c
+ *
+ * Copyright (c) 2009 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * S5P6440 - Clock support
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/list.h>
+#include <linux/errno.h>
+#include <linux/err.h>
+#include <linux/clk.h>
+#include <linux/sysdev.h>
+#include <linux/io.h>
+
+#include <mach/hardware.h>
+#include <mach/map.h>
+
+#include <plat/cpu-freq.h>
+#include <mach/regs-clock.h>
+#include <plat/clock.h>
+#include <plat/cpu.h>
+#include <plat/clock-clksrc.h>
+#include <plat/s5p-clock.h>
+#include <plat/pll.h>
+#include <plat/s5p6440.h>
+
+/* APLL Mux output clock */
+static struct clksrc_clk clk_mout_apll = {
+        .clk    = {
+                .name           = "mout_apll",
+                .id             = -1,
+        },
+        .sources        = &clk_src_apll,
+        .reg_src        = { .reg = S5P_CLK_SRC0, .shift = 0, .size = 1 },
+};
+
+static int s5p6440_epll_enable(struct clk *clk, int enable)
+{
+        unsigned int ctrlbit = clk->ctrlbit;
+        unsigned int epll_con = __raw_readl(S5P_EPLL_CON) & ~ctrlbit;
+
+        if (enable)
+                __raw_writel(epll_con | ctrlbit, S5P_EPLL_CON);
+        else
+                __raw_writel(epll_con, S5P_EPLL_CON);
+
+        return 0;
+}
+
+static unsigned long s5p6440_epll_get_rate(struct clk *clk)
+{
+        return clk->rate;
+}
+
+static u32 epll_div[][5] = {
+        { 36000000,     0,      48, 1, 4 },
+        { 48000000,     0,      32, 1, 3 },
+        { 60000000,     0,      40, 1, 3 },
+        { 72000000,     0,      48, 1, 3 },
+        { 84000000,     0,      28, 1, 2 },
+        { 96000000,     0,      32, 1, 2 },
+        { 32768000,     45264,  43, 1, 4 },
+        { 45158000,     6903,   30, 1, 3 },
+        { 49152000,     50332,  32, 1, 3 },
+        { 67738000,     10398,  45, 1, 3 },
+        { 73728000,     9961,   49, 1, 3 }
+};
+
+static int s5p6440_epll_set_rate(struct clk *clk, unsigned long rate)
+{
+        unsigned int epll_con, epll_con_k;
+        unsigned int i;
+
+        if (clk->rate == rate)  /* Return if nothing changed */
+                return 0;
+
+        epll_con = __raw_readl(S5P_EPLL_CON);
+        epll_con_k = __raw_readl(S5P_EPLL_CON_K);
+
+        epll_con_k &= ~(PLL90XX_KDIV_MASK);
+        epll_con &= ~(PLL90XX_MDIV_MASK | PLL90XX_PDIV_MASK | PLL90XX_SDIV_MASK);
+
+        for (i = 0; i < ARRAY_SIZE(epll_div); i++) {
+                 if (epll_div[i][0] == rate) {
+                        epll_con_k |= (epll_div[i][1] << PLL90XX_KDIV_SHIFT);
+                        epll_con |= (epll_div[i][2] << PLL90XX_MDIV_SHIFT) |
+                                    (epll_div[i][3] << PLL90XX_PDIV_SHIFT) |
+                                    (epll_div[i][4] << PLL90XX_SDIV_SHIFT);
+                        break;
+                }
+        }
+
+        if (i == ARRAY_SIZE(epll_div)) {
+                printk(KERN_ERR "%s: Invalid Clock EPLL Frequency\n", __func__);
+                return -EINVAL;
+        }
+
+        __raw_writel(epll_con, S5P_EPLL_CON);
+        __raw_writel(epll_con_k, S5P_EPLL_CON_K);
+
+        clk->rate = rate;
+
+        return 0;
+}
+
+static struct clk_ops s5p6440_epll_ops = {
+        .get_rate = s5p6440_epll_get_rate,
+        .set_rate = s5p6440_epll_set_rate,
+};
+
+static struct clksrc_clk clk_mout_epll = {
+        .clk    = {
+                .name           = "mout_epll",
+                .id             = -1,
+        },
+        .sources        = &clk_src_epll,
+        .reg_src        = { .reg = S5P_CLK_SRC0, .shift = 2, .size = 1 },
+};
+
+static struct clksrc_clk clk_mout_mpll = {
+        .clk = {
+                .name           = "mout_mpll",
+                .id             = -1,
+        },
+        .sources        = &clk_src_mpll,
+        .reg_src        = { .reg = S5P_CLK_SRC0, .shift = 1, .size = 1 },
+};
+
+static struct clk clk_h_low = {
+        .name           = "hclk_low",
+        .id             = -1,
+        .rate           = 0,
+        .parent         = NULL,
+        .ctrlbit        = 0,
+        .ops            = &clk_ops_def_setrate,
+};
+
+static struct clk clk_p_low = {
+        .name           = "pclk_low",
+        .id             = -1,
+        .rate           = 0,
+        .parent         = NULL,
+        .ctrlbit        = 0,
+        .ops            = &clk_ops_def_setrate,
+};
+
+enum perf_level {
+        L0 = 532*1000,
+        L1 = 266*1000,
+        L2 = 133*1000,
+};
+
+static const u32 clock_table[][3] = {
+        /*{ARM_CLK, DIVarm, DIVhclk}*/
+        {L0 * 1000, (0 << ARM_DIV_RATIO_SHIFT), (3 << S5P_CLKDIV0_HCLK_SHIFT)},
+        {L1 * 1000, (1 << ARM_DIV_RATIO_SHIFT), (1 << S5P_CLKDIV0_HCLK_SHIFT)},
+        {L2 * 1000, (3 << ARM_DIV_RATIO_SHIFT), (0 << S5P_CLKDIV0_HCLK_SHIFT)},
+};
+
+static unsigned long s5p6440_armclk_get_rate(struct clk *clk)
+{
+        unsigned long rate = clk_get_rate(clk->parent);
+        u32 clkdiv;
+
+        /* divisor mask starts at bit0, so no need to shift */
+        clkdiv = __raw_readl(ARM_CLK_DIV) & ARM_DIV_MASK;
+
+        return rate / (clkdiv + 1);
+}
+
+static unsigned long s5p6440_armclk_round_rate(struct clk *clk,
+                                                unsigned long rate)
+{
+        u32 iter;
+
+        for (iter = 1 ; iter < ARRAY_SIZE(clock_table) ; iter++) {
+                if (rate > clock_table[iter][0])
+                        return clock_table[iter-1][0];
+        }
+
+        return clock_table[ARRAY_SIZE(clock_table) - 1][0];
+}
+
+static int s5p6440_armclk_set_rate(struct clk *clk, unsigned long rate)
+{
+        u32 round_tmp;
+        u32 iter;
+        u32 clk_div0_tmp;
+        u32 cur_rate = clk->ops->get_rate(clk);
+        unsigned long flags;
+
+        round_tmp = clk->ops->round_rate(clk, rate);
+        if (round_tmp == cur_rate)
+                return 0;
+
+
+        for (iter = 0 ; iter < ARRAY_SIZE(clock_table) ; iter++) {
+                if (round_tmp == clock_table[iter][0])
+                        break;
+        }
+
+        if (iter >= ARRAY_SIZE(clock_table))
+                iter = ARRAY_SIZE(clock_table) - 1;
+
+        local_irq_save(flags);
+        if (cur_rate > round_tmp) {
+                /* Frequency Down */
+                clk_div0_tmp = __raw_readl(ARM_CLK_DIV) & ~(ARM_DIV_MASK);
+                clk_div0_tmp |= clock_table[iter][1];
+                __raw_writel(clk_div0_tmp, ARM_CLK_DIV);
+
+                clk_div0_tmp = __raw_readl(ARM_CLK_DIV) &
+                                ~(S5P_CLKDIV0_HCLK_MASK);
+                clk_div0_tmp |= clock_table[iter][2];
+                __raw_writel(clk_div0_tmp, ARM_CLK_DIV);
+
+
+        } else {
+                /* Frequency Up */
+                clk_div0_tmp = __raw_readl(ARM_CLK_DIV) &
+                                ~(S5P_CLKDIV0_HCLK_MASK);
+                clk_div0_tmp |= clock_table[iter][2];
+                __raw_writel(clk_div0_tmp, ARM_CLK_DIV);
+
+                clk_div0_tmp = __raw_readl(ARM_CLK_DIV) & ~(ARM_DIV_MASK);
+                clk_div0_tmp |= clock_table[iter][1];
+                __raw_writel(clk_div0_tmp, ARM_CLK_DIV);
+                }
+        local_irq_restore(flags);
+
+        clk->rate = clock_table[iter][0];
+
+        return 0;
+}
+
+static struct clk_ops s5p6440_clkarm_ops = {
+        .get_rate       = s5p6440_armclk_get_rate,
+        .set_rate       = s5p6440_armclk_set_rate,
+        .round_rate     = s5p6440_armclk_round_rate,
+};
+
+static unsigned long s5p6440_clk_doutmpll_get_rate(struct clk *clk)
+{
+        unsigned long rate = clk_get_rate(clk->parent);
+
+        if (__raw_readl(S5P_CLK_DIV0) & S5P_CLKDIV0_MPLL_MASK)
+                rate /= 2;
+
+        return rate;
+}
+
+static struct clk clk_dout_mpll = {
+        .name           = "dout_mpll",
+        .id             = -1,
+        .parent         = &clk_mout_mpll.clk,
+        .ops            = &(struct clk_ops) {
+                .get_rate       = s5p6440_clk_doutmpll_get_rate,
+        },
+};
+
+int s5p6440_clk48m_ctrl(struct clk *clk, int enable)
+{
+        unsigned long flags;
+        u32 val;
+
+        /* can't rely on clock lock, this register has other usages */
+        local_irq_save(flags);
+
+        val = __raw_readl(S5P_OTHERS);
+        if (enable)
+                val |= S5P_OTHERS_USB_SIG_MASK;
+        else
+                val &= ~S5P_OTHERS_USB_SIG_MASK;
+
+        __raw_writel(val, S5P_OTHERS);
+
+        local_irq_restore(flags);
+
+        return 0;
+}
+
+static int s5p6440_pclk_ctrl(struct clk *clk, int enable)
+{
+        return s5p_gatectrl(S5P_CLK_GATE_PCLK, clk, enable);
+}
+
+static int s5p6440_hclk0_ctrl(struct clk *clk, int enable)
+{
+        return s5p_gatectrl(S5P_CLK_GATE_HCLK0, clk, enable);
+}
+
+static int s5p6440_hclk1_ctrl(struct clk *clk, int enable)
+{
+        return s5p_gatectrl(S5P_CLK_GATE_HCLK1, clk, enable);
+}
+
+static int s5p6440_sclk_ctrl(struct clk *clk, int enable)
+{
+        return s5p_gatectrl(S5P_CLK_GATE_SCLK0, clk, enable);
+}
+
+static int s5p6440_mem_ctrl(struct clk *clk, int enable)
+{
+        return s5p_gatectrl(S5P_CLK_GATE_MEM0, clk, enable);
+}
+
+/*
+ * The following clocks will be disabled during clock initialization. It is
+ * recommended to keep the following clocks disabled until the driver requests
+ * for enabling the clock.
+ */
+static struct clk init_clocks_disable[] = {
+        {
+                .name           = "nand",
+                .id             = -1,
+                .parent         = &clk_h,
+                .enable         = s5p6440_mem_ctrl,
+                .ctrlbit        = S5P_CLKCON_MEM0_HCLK_NFCON,
+        }, {
+                .name           = "adc",
+                .id             = -1,
+                .parent         = &clk_p_low,
+                .enable         = s5p6440_pclk_ctrl,
+                .ctrlbit        = S5P_CLKCON_PCLK_TSADC,
+        }, {
+                .name           = "i2c",
+                .id             = -1,
+                .parent         = &clk_p_low,
+                .enable         = s5p6440_pclk_ctrl,
+                .ctrlbit        = S5P_CLKCON_PCLK_IIC0,
+        }, {
+                .name           = "i2s_v40",
+                .id             = 0,
+                .parent         = &clk_p_low,
+                .enable         = s5p6440_pclk_ctrl,
+                .ctrlbit        = S5P_CLKCON_PCLK_IIS2,
+        }, {
+                .name           = "spi",
+                .id             = 0,
+                .parent         = &clk_p_low,
+                .enable         = s5p6440_pclk_ctrl,
+                .ctrlbit        = S5P_CLKCON_PCLK_SPI0,
+        }, {
+                .name           = "spi",
+                .id             = 1,
+                .parent         = &clk_p_low,
+                .enable         = s5p6440_pclk_ctrl,
+                .ctrlbit        = S5P_CLKCON_PCLK_SPI1,
+        }, {
+                .name           = "sclk_spi_48",
+                .id             = 0,
+                .parent         = &clk_48m,
+                .enable         = s5p6440_sclk_ctrl,
+                .ctrlbit        = S5P_CLKCON_SCLK0_SPI0_48,
+        }, {
+                .name           = "sclk_spi_48",
+                .id             = 1,
+                .parent         = &clk_48m,
+                .enable         = s5p6440_sclk_ctrl,
+                .ctrlbit        = S5P_CLKCON_SCLK0_SPI1_48,
+        }, {
+                .name           = "mmc_48m",
+                .id             = 0,
+                .parent         = &clk_48m,
+                .enable         = s5p6440_sclk_ctrl,
+                .ctrlbit        = S5P_CLKCON_SCLK0_MMC0_48,
+        }, {
+                .name           = "mmc_48m",
+                .id             = 1,
+                .parent         = &clk_48m,
+                .enable         = s5p6440_sclk_ctrl,
+                .ctrlbit        = S5P_CLKCON_SCLK0_MMC1_48,
+        }, {
+                .name           = "mmc_48m",
+                .id             = 2,
+                .parent         = &clk_48m,
+                .enable         = s5p6440_sclk_ctrl,
+                .ctrlbit        = S5P_CLKCON_SCLK0_MMC2_48,
+        }, {
+                .name           = "otg",
+                .id             = -1,
+                .parent         = &clk_h_low,
+                .enable         = s5p6440_hclk0_ctrl,
+                .ctrlbit        = S5P_CLKCON_HCLK0_USB
+        }, {
+                .name           = "post",
+                .id             = -1,
+                .parent         = &clk_h_low,
+                .enable         = s5p6440_hclk0_ctrl,
+                .ctrlbit        = S5P_CLKCON_HCLK0_POST0
+        }, {
+                .name           = "lcd",
+                .id             = -1,
+                .parent         = &clk_h_low,
+                .enable         = s5p6440_hclk1_ctrl,
+                .ctrlbit        = S5P_CLKCON_HCLK1_DISPCON,
+        }, {
+                .name           = "hsmmc",
+                .id             = 0,
+                .parent         = &clk_h_low,
+                .enable         = s5p6440_hclk0_ctrl,
+                .ctrlbit        = S5P_CLKCON_HCLK0_HSMMC0,
+        }, {
+                .name           = "hsmmc",
+                .id             = 1,
+                .parent         = &clk_h_low,
+                .enable         = s5p6440_hclk0_ctrl,
+                .ctrlbit        = S5P_CLKCON_HCLK0_HSMMC1,
+        }, {
+                .name           = "hsmmc",
+                .id             = 2,
+                .parent         = &clk_h_low,
+                .enable         = s5p6440_hclk0_ctrl,
+                .ctrlbit        = S5P_CLKCON_HCLK0_HSMMC2,
+        }, {
+                .name           = "rtc",
+                .id             = -1,
+                .parent         = &clk_p_low,
+                .enable         = s5p6440_pclk_ctrl,
+                .ctrlbit        = S5P_CLKCON_PCLK_RTC,
+        }, {
+                .name           = "watchdog",
+                .id             = -1,
+                .parent         = &clk_p_low,
+                .enable         = s5p6440_pclk_ctrl,
+                .ctrlbit        = S5P_CLKCON_PCLK_WDT,
+        }, {
+                .name           = "timers",
+                .id             = -1,
+                .parent         = &clk_p_low,
+                .enable         = s5p6440_pclk_ctrl,
+                .ctrlbit        = S5P_CLKCON_PCLK_PWM,
+        }
+};
+
+/*
+ * The following clocks will be enabled during clock initialization.
+ */
+static struct clk init_clocks[] = {
+        {
+                .name           = "gpio",
+                .id             = -1,
+                .parent         = &clk_p_low,
+                .enable         = s5p6440_pclk_ctrl,
+                .ctrlbit        = S5P_CLKCON_PCLK_GPIO,
+        }, {
+                .name           = "uart",
+                .id             = 0,
+                .parent         = &clk_p_low,
+                .enable         = s5p6440_pclk_ctrl,
+                .ctrlbit        = S5P_CLKCON_PCLK_UART0,
+        }, {
+                .name           = "uart",
+                .id             = 1,
+                .parent         = &clk_p_low,
+                .enable         = s5p6440_pclk_ctrl,
+                .ctrlbit        = S5P_CLKCON_PCLK_UART1,
+        }, {
+                .name           = "uart",
+                .id             = 2,
+                .parent         = &clk_p_low,
+                .enable         = s5p6440_pclk_ctrl,
+                .ctrlbit        = S5P_CLKCON_PCLK_UART2,
+        }, {
+                .name           = "uart",
+                .id             = 3,
+                .parent         = &clk_p_low,
+                .enable         = s5p6440_pclk_ctrl,
+                .ctrlbit        = S5P_CLKCON_PCLK_UART3,
+        }
+};
+
+static struct clk clk_iis_cd_v40 = {
+        .name           = "iis_cdclk_v40",
+        .id             = -1,
+};
+
+static struct clk clk_pcm_cd = {
+        .name           = "pcm_cdclk",
+        .id             = -1,
+};
+
+static struct clk *clkset_spi_mmc_list[] = {
+        &clk_mout_epll.clk,
+        &clk_dout_mpll,
+        &clk_fin_epll,
+};
+
+static struct clksrc_sources clkset_spi_mmc = {
+        .sources        = clkset_spi_mmc_list,
+        .nr_sources     = ARRAY_SIZE(clkset_spi_mmc_list),
+};
+
+static struct clk *clkset_uart_list[] = {
+        &clk_mout_epll.clk,
+        &clk_dout_mpll
+};
+
+static struct clksrc_sources clkset_uart = {
+        .sources        = clkset_uart_list,
+        .nr_sources     = ARRAY_SIZE(clkset_uart_list),
+};
+
+static struct clksrc_clk clksrcs[] = {
+        {
+                .clk    = {
+                        .name           = "mmc_bus",
+                        .id             = 0,
+                        .ctrlbit        = S5P_CLKCON_SCLK0_MMC0,
+                        .enable         = s5p6440_sclk_ctrl,
+                },
+                .sources = &clkset_spi_mmc,
+                .reg_src = { .reg = S5P_CLK_SRC0, .shift = 18, .size = 2 },
+                .reg_div = { .reg = S5P_CLK_DIV1, .shift = 0, .size = 4 },
+        }, {
+                .clk    = {
+                        .name           = "mmc_bus",
+                        .id             = 1,
+                        .ctrlbit        = S5P_CLKCON_SCLK0_MMC1,
+                        .enable         = s5p6440_sclk_ctrl,
+                },
+                .sources = &clkset_spi_mmc,
+                .reg_src = { .reg = S5P_CLK_SRC0, .shift = 20, .size = 2 },
+                .reg_div = { .reg = S5P_CLK_DIV1, .shift = 4, .size = 4 },
+        }, {
+                .clk    = {
+                        .name           = "mmc_bus",
+                        .id             = 2,
+                        .ctrlbit        = S5P_CLKCON_SCLK0_MMC2,
+                        .enable         = s5p6440_sclk_ctrl,
+                },
+                .sources = &clkset_spi_mmc,
+                .reg_src = { .reg = S5P_CLK_SRC0, .shift = 22, .size = 2 },
+                .reg_div = { .reg = S5P_CLK_DIV1, .shift = 8, .size = 4 },
+        }, {
+                .clk    = {
+                        .name           = "uclk1",
+                        .id             = -1,
+                        .ctrlbit        = S5P_CLKCON_SCLK0_UART,
+                        .enable         = s5p6440_sclk_ctrl,
+                },
+                .sources = &clkset_uart,
+                .reg_src = { .reg = S5P_CLK_SRC0, .shift = 13, .size = 1 },
+                .reg_div = { .reg = S5P_CLK_DIV2, .shift = 16, .size = 4 },
+        }, {
+                .clk    = {
+                        .name           = "spi_epll",
+                        .id             = 0,
+                        .ctrlbit        = S5P_CLKCON_SCLK0_SPI0,
+                        .enable         = s5p6440_sclk_ctrl,
+                },
+                .sources = &clkset_spi_mmc,
+                .reg_src = { .reg = S5P_CLK_SRC0, .shift = 14, .size = 2 },
+                .reg_div = { .reg = S5P_CLK_DIV2, .shift = 0, .size = 4 },
+        }, {
+                .clk    = {
+                        .name           = "spi_epll",
+                        .id             = 1,
+                        .ctrlbit        = S5P_CLKCON_SCLK0_SPI1,
+                        .enable         = s5p6440_sclk_ctrl,
+                },
+                .sources = &clkset_spi_mmc,
+                .reg_src = { .reg = S5P_CLK_SRC0, .shift = 16, .size = 2 },
+                .reg_div = { .reg = S5P_CLK_DIV2, .shift = 4, .size = 4 },
+        }
+};
+
+/* Clock initialisation code */
+static struct clksrc_clk *init_parents[] = {
+        &clk_mout_apll,
+        &clk_mout_epll,
+        &clk_mout_mpll,
+};
+
+void __init_or_cpufreq s5p6440_setup_clocks(void)
+{
+        struct clk *xtal_clk;
+        unsigned long xtal;
+        unsigned long fclk;
+        unsigned long hclk;
+        unsigned long hclk_low;
+        unsigned long pclk;
+        unsigned long pclk_low;
+        unsigned long epll;
+        unsigned long apll;
+        unsigned long mpll;
+        unsigned int ptr;
+        u32 clkdiv0;
+        u32 clkdiv3;
+
+        /* Set S5P6440 functions for clk_fout_epll */
+        clk_fout_epll.enable = s5p6440_epll_enable;
+        clk_fout_epll.ops = &s5p6440_epll_ops;
+
+        /* Set S5P6440 functions for arm clock */
+        clk_arm.parent = &clk_mout_apll.clk;
+        clk_arm.ops = &s5p6440_clkarm_ops;
+        clk_48m.enable = s5p6440_clk48m_ctrl;
+
+        clkdiv0 = __raw_readl(S5P_CLK_DIV0);
+        clkdiv3 = __raw_readl(S5P_CLK_DIV3);
+
+        xtal_clk = clk_get(NULL, "ext_xtal");
+        BUG_ON(IS_ERR(xtal_clk));
+
+        xtal = clk_get_rate(xtal_clk);
+        clk_put(xtal_clk);
+
+        epll = s5p_get_pll90xx(xtal, __raw_readl(S5P_EPLL_CON),
+                                __raw_readl(S5P_EPLL_CON_K));
+        mpll = s5p_get_pll45xx(xtal, __raw_readl(S5P_MPLL_CON), pll_4502);
+        apll = s5p_get_pll45xx(xtal, __raw_readl(S5P_APLL_CON), pll_4502);
+
+        printk(KERN_INFO "S5P6440: PLL settings, A=%ld.%ldMHz, M=%ld.%ldMHz," \
+                        " E=%ld.%ldMHz\n",
+                        print_mhz(apll), print_mhz(mpll), print_mhz(epll));
+
+        fclk = apll / GET_DIV(clkdiv0, S5P_CLKDIV0_ARM);
+        hclk = fclk / GET_DIV(clkdiv0, S5P_CLKDIV0_HCLK);
+        pclk = hclk / GET_DIV(clkdiv0, S5P_CLKDIV0_PCLK);
+
+        if (__raw_readl(S5P_OTHERS) & S5P_OTHERS_HCLK_LOW_SEL_MPLL) {
+                /* Asynchronous mode */
+                hclk_low = mpll / GET_DIV(clkdiv3, S5P_CLKDIV3_HCLK_LOW);
+        } else {
+                /* Synchronous mode */
+                hclk_low = apll / GET_DIV(clkdiv3, S5P_CLKDIV3_HCLK_LOW);
+        }
+
+        pclk_low = hclk_low / GET_DIV(clkdiv3, S5P_CLKDIV3_PCLK_LOW);
+
+        printk(KERN_INFO "S5P6440: HCLK=%ld.%ldMHz, HCLK_LOW=%ld.%ldMHz," \
+                        " PCLK=%ld.%ldMHz, PCLK_LOW=%ld.%ldMHz\n",
+                        print_mhz(hclk), print_mhz(hclk_low),
+                        print_mhz(pclk), print_mhz(pclk_low));
+
+        clk_fout_mpll.rate = mpll;
+        clk_fout_epll.rate = epll;
+        clk_fout_apll.rate = apll;
+
+        clk_f.rate = fclk;
+        clk_h.rate = hclk;
+        clk_p.rate = pclk;
+        clk_h_low.rate = hclk_low;
+        clk_p_low.rate = pclk_low;
+
+        for (ptr = 0; ptr < ARRAY_SIZE(init_parents); ptr++)
+                s3c_set_clksrc(init_parents[ptr], true);
+
+        for (ptr = 0; ptr < ARRAY_SIZE(clksrcs); ptr++)
+                s3c_set_clksrc(&clksrcs[ptr], true);
+}
+
+static struct clk *clks[] __initdata = {
+        &clk_ext,
+        &clk_mout_epll.clk,
+        &clk_mout_mpll.clk,
+        &clk_dout_mpll,
+        &clk_iis_cd_v40,
+        &clk_pcm_cd,
+        &clk_p_low,
+        &clk_h_low,
+};
+
+void __init s5p6440_register_clocks(void)
+{
+        struct clk *clkp;
+        int ret;
+        int ptr;
+
+        ret = s3c24xx_register_clocks(clks, ARRAY_SIZE(clks));
+        if (ret > 0)
+                printk(KERN_ERR "Failed to register %u clocks\n", ret);
+
+        s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs));
+        s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks));
+
+        clkp = init_clocks_disable;
+        for (ptr = 0; ptr < ARRAY_SIZE(init_clocks_disable); ptr++, clkp++) {
+
+                ret = s3c24xx_register_clock(clkp);
+                if (ret < 0) {
+                        printk(KERN_ERR "Failed to register clock %s (%d)\n",
+                               clkp->name, ret);
+                }
+                (clkp->enable)(clkp, 0);
+        }
+
+        s3c_pwmclk_init();
+}
diff --git a/arch/arm/mach-s5p6440/cpu.c b/arch/arm/mach-s5p6440/cpu.c
new file mode 100644
index 000000000000..1794131aeacb
--- /dev/null
+++ b/arch/arm/mach-s5p6440/cpu.c
@@ -0,0 +1,114 @@
+/* linux/arch/arm/mach-s5p6440/cpu.c
+ *
+ * Copyright (c) 2009 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <linux/interrupt.h>
+#include <linux/list.h>
+#include <linux/timer.h>
+#include <linux/init.h>
+#include <linux/clk.h>
+#include <linux/io.h>
+#include <linux/sysdev.h>
+#include <linux/serial_core.h>
+#include <linux/platform_device.h>
+
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+#include <asm/mach/irq.h>
+
+#include <asm/proc-fns.h>
+
+#include <mach/hardware.h>
+#include <mach/map.h>
+#include <asm/irq.h>
+
+#include <plat/regs-serial.h>
+#include <mach/regs-clock.h>
+
+#include <plat/cpu.h>
+#include <plat/devs.h>
+#include <plat/clock.h>
+#include <plat/s5p6440.h>
+
+static void s5p6440_idle(void)
+{
+        unsigned long val;
+
+        if (!need_resched()) {
+                val = __raw_readl(S5P_PWR_CFG);
+                val &= ~(0x3<<5);
+                val |= (0x1<<5);
+                __raw_writel(val, S5P_PWR_CFG);
+
+                cpu_do_idle();
+        }
+        local_irq_enable();
+}
+
+/* s5p6440_map_io
+ *
+ * register the standard cpu IO areas
+*/
+
+void __init s5p6440_map_io(void)
+{
+        /* initialize any device information early */
+}
+
+void __init s5p6440_init_clocks(int xtal)
+{
+        printk(KERN_DEBUG "%s: initializing clocks\n", __func__);
+
+        s3c24xx_register_baseclocks(xtal);
+        s5p_register_clocks(xtal);
+        s5p6440_register_clocks();
+        s5p6440_setup_clocks();
+}
+
+void __init s5p6440_init_irq(void)
+{
+        /* S5P6440 supports only 2 VIC */
+        u32 vic[2];
+
+        /*
+         * VIC0 is missing IRQ_VIC0[3, 4, 8, 10, (12-22)]
+         * VIC1 is missing IRQ VIC1[1, 3, 4, 10, 11, 12, 14, 15, 22]
+         */
+        vic[0] = 0xff800ae7;
+        vic[1] = 0xffbf23e5;
+
+        s5p_init_irq(vic, ARRAY_SIZE(vic));
+}
+
+static struct sysdev_class s5p6440_sysclass = {
+        .name   = "s5p6440-core",
+};
+
+static struct sys_device s5p6440_sysdev = {
+        .cls    = &s5p6440_sysclass,
+};
+
+static int __init s5p6440_core_init(void)
+{
+        return sysdev_class_register(&s5p6440_sysclass);
+}
+
+core_initcall(s5p6440_core_init);
+
+int __init s5p6440_init(void)
+{
+        printk(KERN_INFO "S5P6440: Initializing architecture\n");
+
+        /* set idle function */
+        pm_idle = s5p6440_idle;
+
+        return sysdev_register(&s5p6440_sysdev);
+}
diff --git a/arch/arm/mach-s5p6440/gpio.c b/arch/arm/mach-s5p6440/gpio.c
new file mode 100644
index 000000000000..b0ea741177ad
--- /dev/null
+++ b/arch/arm/mach-s5p6440/gpio.c
@@ -0,0 +1,322 @@
+/* arch/arm/mach-s5p6440/gpio.c
+ *
+ * Copyright (c) 2009 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * S5P6440 - GPIOlib support
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/kernel.h>
+#include <linux/irq.h>
+#include <linux/io.h>
+#include <mach/map.h>
+#include <mach/gpio.h>
+#include <mach/regs-gpio.h>
+#include <plat/gpio-core.h>
+#include <plat/gpio-cfg.h>
+#include <plat/gpio-cfg-helpers.h>
+
+/* GPIO bank summary:
+*
+* Bank  GPIOs   Style   SlpCon  ExtInt Group
+* A     6       4Bit    Yes     1
+* B     7       4Bit    Yes     1
+* C     8       4Bit    Yes     2
+* F     2       2Bit    Yes     4 [1]
+* G     7       4Bit    Yes     5
+* H     10      4Bit[2] Yes     6
+* I     16      2Bit    Yes     None
+* J     12      2Bit    Yes     None
+* N     16      2Bit    No      IRQ_EINT
+* P     8       2Bit    Yes     8
+* R     15      4Bit[2] Yes     8
+*
+* [1] BANKF pins 14,15 do not form part of the external interrupt sources
+* [2] BANK has two control registers, GPxCON0 and GPxCON1
+*/
+
+static int s5p6440_gpiolib_rbank_4bit2_input(struct gpio_chip *chip,
+                                             unsigned int offset)
+{
+        struct s3c_gpio_chip *ourchip = to_s3c_gpio(chip);
+        void __iomem *base = ourchip->base;
+        void __iomem *regcon = base;
+        unsigned long con;
+
+        switch (offset) {
+        case 6:
+                offset += 1;
+        case 0:
+        case 1:
+        case 2:
+        case 3:
+        case 4:
+        case 5:
+                regcon -= 4;
+                break;
+        default:
+                offset -= 7;
+                break;
+        }
+
+        con = __raw_readl(regcon);
+        con &= ~(0xf << con_4bit_shift(offset));
+        __raw_writel(con, regcon);
+
+        return 0;
+}
+
+static int s5p6440_gpiolib_rbank_4bit2_output(struct gpio_chip *chip,
+                                              unsigned int offset, int value)
+{
+        struct s3c_gpio_chip *ourchip = to_s3c_gpio(chip);
+        void __iomem *base = ourchip->base;
+        void __iomem *regcon = base;
+        unsigned long con;
+        unsigned long dat;
+        unsigned con_offset  = offset;
+
+        switch (con_offset) {
+        case 6:
+                con_offset += 1;
+        case 0:
+        case 1:
+        case 2:
+        case 3:
+        case 4:
+        case 5:
+                regcon -= 4;
+                break;
+        default:
+                con_offset -= 7;
+                break;
+        }
+
+        con = __raw_readl(regcon);
+        con &= ~(0xf << con_4bit_shift(con_offset));
+        con |= 0x1 << con_4bit_shift(con_offset);
+
+        dat = __raw_readl(base + GPIODAT_OFF);
+        if (value)
+                dat |= 1 << offset;
+        else
+                dat &= ~(1 << offset);
+
+        __raw_writel(con, regcon);
+        __raw_writel(dat, base + GPIODAT_OFF);
+
+        return 0;
+}
+
+int s5p6440_gpio_setcfg_4bit_rbank(struct s3c_gpio_chip *chip,
+                                   unsigned int off, unsigned int cfg)
+{
+        void __iomem *reg = chip->base;
+        unsigned int shift;
+        u32 con;
+
+        switch (off) {
+        case 0:
+        case 1:
+        case 2:
+        case 3:
+        case 4:
+        case 5:
+                shift = (off & 7) * 4;
+                reg -= 4;
+                break;
+        case 6:
+                shift = ((off + 1) & 7) * 4;
+                reg -= 4;
+        default:
+                shift = ((off + 1) & 7) * 4;
+                break;
+        }
+
+        if (s3c_gpio_is_cfg_special(cfg)) {
+                cfg &= 0xf;
+                cfg <<= shift;
+        }
+
+        con = __raw_readl(reg);
+        con &= ~(0xf << shift);
+        con |= cfg;
+        __raw_writel(con, reg);
+
+        return 0;
+}
+
+static struct s3c_gpio_cfg s5p6440_gpio_cfgs[] = {
+        {
+                .cfg_eint       = 0,
+        }, {
+                .cfg_eint       = 7,
+        }, {
+                .cfg_eint       = 3,
+                .set_config     = s5p6440_gpio_setcfg_4bit_rbank,
+        }, {
+                .cfg_eint       = 0,
+                .set_config     = s3c_gpio_setcfg_s3c24xx,
+        }, {
+                .cfg_eint       = 2,
+                .set_config     = s3c_gpio_setcfg_s3c24xx,
+        }, {
+                .cfg_eint       = 3,
+                .set_config     = s3c_gpio_setcfg_s3c24xx,
+        },
+};
+
+static struct s3c_gpio_chip s5p6440_gpio_4bit[] = {
+        {
+                .base   = S5P6440_GPA_BASE,
+                .config = &s5p6440_gpio_cfgs[1],
+                .chip   = {
+                        .base   = S5P6440_GPA(0),
+                        .ngpio  = S5P6440_GPIO_A_NR,
+                        .label  = "GPA",
+                },
+        }, {
+                .base   = S5P6440_GPB_BASE,
+                .config = &s5p6440_gpio_cfgs[1],
+                .chip   = {
+                        .base   = S5P6440_GPB(0),
+                        .ngpio  = S5P6440_GPIO_B_NR,
+                        .label  = "GPB",
+                },
+        }, {
+                .base   = S5P6440_GPC_BASE,
+                .config = &s5p6440_gpio_cfgs[1],
+                .chip   = {
+                        .base   = S5P6440_GPC(0),
+                        .ngpio  = S5P6440_GPIO_C_NR,
+                        .label  = "GPC",
+                },
+        }, {
+                .base   = S5P6440_GPG_BASE,
+                .config = &s5p6440_gpio_cfgs[1],
+                .chip   = {
+                        .base   = S5P6440_GPG(0),
+                        .ngpio  = S5P6440_GPIO_G_NR,
+                        .label  = "GPG",
+                },
+        },
+};
+
+static struct s3c_gpio_chip s5p6440_gpio_4bit2[] = {
+        {
+                .base   = S5P6440_GPH_BASE + 0x4,
+                .config = &s5p6440_gpio_cfgs[1],
+                .chip   = {
+                        .base   = S5P6440_GPH(0),
+                        .ngpio  = S5P6440_GPIO_H_NR,
+                        .label  = "GPH",
+                },
+        },
+};
+
+static struct s3c_gpio_chip gpio_rbank_4bit2[] = {
+        {
+                .base   = S5P6440_GPR_BASE + 0x4,
+                .config = &s5p6440_gpio_cfgs[2],
+                .chip   = {
+                        .base   = S5P6440_GPR(0),
+                        .ngpio  = S5P6440_GPIO_R_NR,
+                        .label  = "GPR",
+                },
+        },
+};
+
+static struct s3c_gpio_chip s5p6440_gpio_2bit[] = {
+        {
+                .base   = S5P6440_GPF_BASE,
+                .config = &s5p6440_gpio_cfgs[5],
+                .chip   = {
+                        .base   = S5P6440_GPF(0),
+                        .ngpio  = S5P6440_GPIO_F_NR,
+                        .label  = "GPF",
+                },
+        }, {
+                .base   = S5P6440_GPI_BASE,
+                .config = &s5p6440_gpio_cfgs[3],
+                .chip   = {
+                        .base   = S5P6440_GPI(0),
+                        .ngpio  = S5P6440_GPIO_I_NR,
+                        .label  = "GPI",
+                },
+        }, {
+                .base   = S5P6440_GPJ_BASE,
+                .config = &s5p6440_gpio_cfgs[3],
+                .chip   = {
+                        .base   = S5P6440_GPJ(0),
+                        .ngpio  = S5P6440_GPIO_J_NR,
+                        .label  = "GPJ",
+                },
+        }, {
+                .base   = S5P6440_GPN_BASE,
+                .config = &s5p6440_gpio_cfgs[4],
+                .chip   = {
+                        .base   = S5P6440_GPN(0),
+                        .ngpio  = S5P6440_GPIO_N_NR,
+                        .label  = "GPN",
+                },
+        }, {
+                .base   = S5P6440_GPP_BASE,
+                .config = &s5p6440_gpio_cfgs[5],
+                .chip   = {
+                        .base   = S5P6440_GPP(0),
+                        .ngpio  = S5P6440_GPIO_P_NR,
+                        .label  = "GPP",
+                },
+        },
+};
+
+void __init s5p6440_gpiolib_set_cfg(struct s3c_gpio_cfg *chipcfg, int nr_chips)
+{
+        for (; nr_chips > 0; nr_chips--, chipcfg++) {
+                if (!chipcfg->set_config)
+                        chipcfg->set_config     = s3c_gpio_setcfg_s3c64xx_4bit;
+                if (!chipcfg->set_pull)
+                        chipcfg->set_pull       = s3c_gpio_setpull_updown;
+                if (!chipcfg->get_pull)
+                        chipcfg->get_pull       = s3c_gpio_getpull_updown;
+        }
+}
+
+static void __init s5p6440_gpio_add_rbank_4bit2(struct s3c_gpio_chip *chip,
+                                                int nr_chips)
+{
+        for (; nr_chips > 0; nr_chips--, chip++) {
+                chip->chip.direction_input = s5p6440_gpiolib_rbank_4bit2_input;
+                chip->chip.direction_output =
+                                        s5p6440_gpiolib_rbank_4bit2_output;
+                s3c_gpiolib_add(chip);
+        }
+}
+
+static int __init s5p6440_gpiolib_init(void)
+{
+        struct s3c_gpio_chip *chips = s5p6440_gpio_2bit;
+        int nr_chips = ARRAY_SIZE(s5p6440_gpio_2bit);
+
+        s5p6440_gpiolib_set_cfg(s5p6440_gpio_cfgs,
+                                ARRAY_SIZE(s5p6440_gpio_cfgs));
+
+        for (; nr_chips > 0; nr_chips--, chips++)
+                s3c_gpiolib_add(chips);
+
+        samsung_gpiolib_add_4bit_chips(s5p6440_gpio_4bit,
+                                ARRAY_SIZE(s5p6440_gpio_4bit));
+
+        samsung_gpiolib_add_4bit2_chips(s5p6440_gpio_4bit2,
+                                ARRAY_SIZE(s5p6440_gpio_4bit2));
+
+        s5p6440_gpio_add_rbank_4bit2(gpio_rbank_4bit2,
+                                ARRAY_SIZE(gpio_rbank_4bit2));
+
+        return 0;
+}
+arch_initcall(s5p6440_gpiolib_init);
diff --git a/arch/arm/mach-s5p6440/include/mach/debug-macro.S b/arch/arm/mach-s5p6440/include/mach/debug-macro.S
new file mode 100644
index 000000000000..48cdb0da026c
--- /dev/null
+++ b/arch/arm/mach-s5p6440/include/mach/debug-macro.S
@@ -0,0 +1,37 @@
+/* linux/arch/arm/mach-s5p6440/include/mach/debug-macro.S
+ *
+ * Copyright (c) 2009 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+/* pull in the relevant register and map files. */
+
+#include <mach/map.h>
+#include <plat/regs-serial.h>
+
+        /* note, for the boot process to work we have to keep the UART
+         * virtual address aligned to an 1MiB boundary for the L1
+         * mapping the head code makes. We keep the UART virtual address
+         * aligned and add in the offset when we load the value here.
+         */
+
+        .macro addruart, rx
+                mrc     p15, 0, \rx, c1, c0
+                tst     \rx, #1
+                ldreq   \rx, = S3C_PA_UART
+                ldrne   \rx, = S3C_VA_UART
+#if CONFIG_DEBUG_S3C_UART != 0
+                add     \rx, \rx, #(0x400 * CONFIG_DEBUG_S3C_UART)
+#endif
+        .endm
+
+/* include the reset of the code which will do the work, we're only
+ * compiling for a single cpu processor type so the default of s3c2440
+ * will be fine with us.
+ */
+
+#include <plat/debug-macro.S>
diff --git a/arch/arm/mach-s5p6440/include/mach/entry-macro.S b/arch/arm/mach-s5p6440/include/mach/entry-macro.S
new file mode 100644
index 000000000000..e65f1b967262
--- /dev/null
+++ b/arch/arm/mach-s5p6440/include/mach/entry-macro.S
@@ -0,0 +1,16 @@
+/* linux/arch/arm/mach-s5p6440/include/mach/entry-macro.S
+ *
+ * Copyright (c) 2009 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * Low-level IRQ helper macros for the Samsung S5P6440
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include <mach/map.h>
+#include <plat/irqs.h>
+
+#include <asm/entry-macro-vic2.S>
diff --git a/arch/arm/mach-s5p6440/include/mach/gpio.h b/arch/arm/mach-s5p6440/include/mach/gpio.h
new file mode 100644
index 000000000000..21783834f2a2
--- /dev/null
+++ b/arch/arm/mach-s5p6440/include/mach/gpio.h
@@ -0,0 +1,80 @@
+/* linux/arch/arm/mach-s5p6440/include/mach/gpio.h
+ *
+ * Copyright (c) 2009 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * S5P6440 - GPIO lib support
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_ARCH_GPIO_H
+#define __ASM_ARCH_GPIO_H __FILE__
+
+#define gpio_get_value  __gpio_get_value
+#define gpio_set_value  __gpio_set_value
+#define gpio_cansleep   __gpio_cansleep
+#define gpio_to_irq     __gpio_to_irq
+
+/* GPIO bank sizes */
+#define S5P6440_GPIO_A_NR       (6)
+#define S5P6440_GPIO_B_NR       (7)
+#define S5P6440_GPIO_C_NR       (8)
+#define S5P6440_GPIO_F_NR       (2)
+#define S5P6440_GPIO_G_NR       (7)
+#define S5P6440_GPIO_H_NR       (10)
+#define S5P6440_GPIO_I_NR       (16)
+#define S5P6440_GPIO_J_NR       (12)
+#define S5P6440_GPIO_N_NR       (16)
+#define S5P6440_GPIO_P_NR       (8)
+#define S5P6440_GPIO_R_NR       (15)
+
+/* GPIO bank numbers */
+
+/* CONFIG_S3C_GPIO_SPACE allows the user to select extra
+ * space for debugging purposes so that any accidental
+ * change from one gpio bank to another can be caught.
+*/
+#define S5P6440_GPIO_NEXT(__gpio) \
+        ((__gpio##_START) + (__gpio##_NR) + CONFIG_S3C_GPIO_SPACE + 1)
+
+enum s5p_gpio_number {
+        S5P6440_GPIO_A_START = 0,
+        S5P6440_GPIO_B_START = S5P6440_GPIO_NEXT(S5P6440_GPIO_A),
+        S5P6440_GPIO_C_START = S5P6440_GPIO_NEXT(S5P6440_GPIO_B),
+        S5P6440_GPIO_F_START = S5P6440_GPIO_NEXT(S5P6440_GPIO_C),
+        S5P6440_GPIO_G_START = S5P6440_GPIO_NEXT(S5P6440_GPIO_F),
+        S5P6440_GPIO_H_START = S5P6440_GPIO_NEXT(S5P6440_GPIO_G),
+        S5P6440_GPIO_I_START = S5P6440_GPIO_NEXT(S5P6440_GPIO_H),
+        S5P6440_GPIO_J_START = S5P6440_GPIO_NEXT(S5P6440_GPIO_I),
+        S5P6440_GPIO_N_START = S5P6440_GPIO_NEXT(S5P6440_GPIO_J),
+        S5P6440_GPIO_P_START = S5P6440_GPIO_NEXT(S5P6440_GPIO_N),
+        S5P6440_GPIO_R_START = S5P6440_GPIO_NEXT(S5P6440_GPIO_P),
+};
+
+/* S5P6440 GPIO number definitions. */
+#define S5P6440_GPA(_nr)        (S5P6440_GPIO_A_START + (_nr))
+#define S5P6440_GPB(_nr)        (S5P6440_GPIO_B_START + (_nr))
+#define S5P6440_GPC(_nr)        (S5P6440_GPIO_C_START + (_nr))
+#define S5P6440_GPF(_nr)        (S5P6440_GPIO_F_START + (_nr))
+#define S5P6440_GPG(_nr)        (S5P6440_GPIO_G_START + (_nr))
+#define S5P6440_GPH(_nr)        (S5P6440_GPIO_H_START + (_nr))
+#define S5P6440_GPI(_nr)        (S5P6440_GPIO_I_START + (_nr))
+#define S5P6440_GPJ(_nr)        (S5P6440_GPIO_J_START + (_nr))
+#define S5P6440_GPN(_nr)        (S5P6440_GPIO_N_START + (_nr))
+#define S5P6440_GPP(_nr)        (S5P6440_GPIO_P_START + (_nr))
+#define S5P6440_GPR(_nr)        (S5P6440_GPIO_R_START + (_nr))
+
+/* the end of the S5P6440 specific gpios */
+#define S5P6440_GPIO_END        (S5P6440_GPR(S5P6440_GPIO_R_NR) + 1)
+#define S3C_GPIO_END            S5P6440_GPIO_END
+
+/* define the number of gpios we need to the one after the GPR() range */
+#define ARCH_NR_GPIOS           (S5P6440_GPR(S5P6440_GPIO_R_NR) +       \
+                                 CONFIG_SAMSUNG_GPIO_EXTRA + 1)
+
+#include <asm-generic/gpio.h>
+
+#endif /* __ASM_ARCH_GPIO_H */
diff --git a/arch/arm/mach-s5p6440/include/mach/hardware.h b/arch/arm/mach-s5p6440/include/mach/hardware.h
new file mode 100644
index 000000000000..be8b26e875db
--- /dev/null
+++ b/arch/arm/mach-s5p6440/include/mach/hardware.h
@@ -0,0 +1,18 @@
+/* linux/arch/arm/mach-s5p6440/include/mach/hardware.h
+ *
+ * Copyright (c) 2009 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * S5P6440 - Hardware support
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_ARCH_HARDWARE_H
+#define __ASM_ARCH_HARDWARE_H __FILE__
+
+/* currently nothing here, placeholder */
+
+#endif /* __ASM_ARCH_HARDWARE_H */
diff --git a/arch/arm/mach-s5p6440/include/mach/io.h b/arch/arm/mach-s5p6440/include/mach/io.h
new file mode 100644
index 000000000000..fa2d69cb1ad7
--- /dev/null
+++ b/arch/arm/mach-s5p6440/include/mach/io.h
@@ -0,0 +1,18 @@
+/* arch/arm/mach-s5p6440/include/mach/io.h
+ *
+ * Copyright 2008 Simtec Electronics
+ *      Ben Dooks <ben-linux@fluff.org>
+ *
+ * Default IO routines for S3C64XX based
+ */
+
+#ifndef __ASM_ARM_ARCH_IO_H
+#define __ASM_ARM_ARCH_IO_H
+
+/* No current ISA/PCI bus support. */
+#define __io(a)         __typesafe_io(a)
+#define __mem_pci(a)    (a)
+
+#define IO_SPACE_LIMIT (0xFFFFFFFF)
+
+#endif
diff --git a/arch/arm/mach-s5p6440/include/mach/irqs.h b/arch/arm/mach-s5p6440/include/mach/irqs.h
new file mode 100644
index 000000000000..a4b9b40d18f2
--- /dev/null
+++ b/arch/arm/mach-s5p6440/include/mach/irqs.h
@@ -0,0 +1,111 @@
+/* linux/arch/arm/mach-s5p6440/include/mach/irqs.h
+ *
+ * Copyright 2009 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * S5P6440 - IRQ definitions
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_ARCH_S5P_IRQS_H
+#define __ASM_ARCH_S5P_IRQS_H __FILE__
+
+#include <plat/irqs.h>
+
+/* VIC0 */
+
+#define IRQ_EINT0_3             S5P_IRQ_VIC0(0)
+#define IRQ_EINT4_11            S5P_IRQ_VIC0(1)
+#define IRQ_RTC_TIC             S5P_IRQ_VIC0(2)
+#define IRQ_IIC1                S5P_IRQ_VIC0(5)
+#define IRQ_I2SV40              S5P_IRQ_VIC0(6)
+#define IRQ_GPS                 S5P_IRQ_VIC0(7)
+#define IRQ_POST0               S5P_IRQ_VIC0(9)
+#define IRQ_2D                  S5P_IRQ_VIC0(11)
+#define IRQ_TIMER0_VIC          S5P_IRQ_VIC0(23)
+#define IRQ_TIMER1_VIC          S5P_IRQ_VIC0(24)
+#define IRQ_TIMER2_VIC          S5P_IRQ_VIC0(25)
+#define IRQ_WDT                 S5P_IRQ_VIC0(26)
+#define IRQ_TIMER3_VIC          S5P_IRQ_VIC0(27)
+#define IRQ_TIMER4_VIC          S5P_IRQ_VIC0(28)
+#define IRQ_DISPCON0            S5P_IRQ_VIC0(29)
+#define IRQ_DISPCON1            S5P_IRQ_VIC0(30)
+#define IRQ_DISPCON2            S5P_IRQ_VIC0(31)
+
+/* VIC1 */
+
+#define IRQ_EINT12_15           S5P_IRQ_VIC1(0)
+#define IRQ_PCM0                S5P_IRQ_VIC1(2)
+#define IRQ_UART0               S5P_IRQ_VIC1(5)
+#define IRQ_UART1               S5P_IRQ_VIC1(6)
+#define IRQ_UART2               S5P_IRQ_VIC1(7)
+#define IRQ_UART3               S5P_IRQ_VIC1(8)
+#define IRQ_DMA0                S5P_IRQ_VIC1(9)
+#define IRQ_NFC                 S5P_IRQ_VIC1(13)
+#define IRQ_SPI0                S5P_IRQ_VIC1(16)
+#define IRQ_SPI1                S5P_IRQ_VIC1(17)
+#define IRQ_IIC                 S5P_IRQ_VIC1(18)
+#define IRQ_DISPCON3            S5P_IRQ_VIC1(19)
+#define IRQ_FIMGVG              S5P_IRQ_VIC1(20)
+#define IRQ_EINT_GROUPS         S5P_IRQ_VIC1(21)
+#define IRQ_PMUIRQ              S5P_IRQ_VIC1(23)
+#define IRQ_HSMMC0              S5P_IRQ_VIC1(24)
+#define IRQ_HSMMC1              S5P_IRQ_VIC1(25)
+#define IRQ_HSMMC2              IRQ_SPI1        /* shared with SPI1 */
+#define IRQ_OTG                 S5P_IRQ_VIC1(26)
+#define IRQ_DSI                 S5P_IRQ_VIC1(27)
+#define IRQ_RTC_ALARM           S5P_IRQ_VIC1(28)
+#define IRQ_TSI                 S5P_IRQ_VIC1(29)
+#define IRQ_PENDN               S5P_IRQ_VIC1(30)
+#define IRQ_TC                  IRQ_PENDN
+#define IRQ_ADC                 S5P_IRQ_VIC1(31)
+
+/*
+ * Since the IRQ_EINT(x) are a linear mapping on s5p6440 we just defined
+ * them as an IRQ_EINT(x) macro from S5P_IRQ_EINT_BASE which we place
+ * after the pair of VICs.
+ */
+
+#define S5P_IRQ_EINT_BASE       (S5P_IRQ_VIC1(31) + 6)
+
+#define S5P_EINT(x)             ((x) + S5P_IRQ_EINT_BASE)
+#define IRQ_EINT(x)             S5P_EINT(x)
+
+/*
+ * Next the external interrupt groups. These are similar to the IRQ_EINT(x)
+ * that they are sourced from the GPIO pins but with a different scheme for
+ * priority and source indication.
+ *
+ * The IRQ_EINT(x) can be thought of as 'group 0' of the available GPIO
+ * interrupts, but for historical reasons they are kept apart from these
+ * next interrupts.
+ *
+ * Use IRQ_EINT_GROUP(group, offset) to get the number for use in the
+ * machine specific support files.
+ */
+
+/* Actually, #6 and #7 are missing in the EINT_GROUP1 */
+#define IRQ_EINT_GROUP1_NR      (15)
+#define IRQ_EINT_GROUP2_NR      (8)
+#define IRQ_EINT_GROUP5_NR      (7)
+#define IRQ_EINT_GROUP6_NR      (10)
+/* Actually, #0, #1 and #2 are missing in the EINT_GROUP8 */
+#define IRQ_EINT_GROUP8_NR      (11)
+
+#define IRQ_EINT_GROUP_BASE     S5P_EINT(16)
+#define IRQ_EINT_GROUP1_BASE    (IRQ_EINT_GROUP_BASE + 0)
+#define IRQ_EINT_GROUP2_BASE    (IRQ_EINT_GROUP1_BASE + IRQ_EINT_GROUP1_NR)
+#define IRQ_EINT_GROUP5_BASE    (IRQ_EINT_GROUP2_BASE + IRQ_EINT_GROUP2_NR)
+#define IRQ_EINT_GROUP6_BASE    (IRQ_EINT_GROUP5_BASE + IRQ_EINT_GROUP5_NR)
+#define IRQ_EINT_GROUP8_BASE    (IRQ_EINT_GROUP6_BASE + IRQ_EINT_GROUP6_NR)
+
+#define IRQ_EINT_GROUP(grp, x)  (IRQ_EINT_GROUP##grp##_BASE + (x))
+
+/* Set the default NR_IRQS */
+
+#define NR_IRQS                 (IRQ_EINT_GROUP8_BASE + IRQ_EINT_GROUP8_NR + 1)
+
+#endif /* __ASM_ARCH_S5P_IRQS_H */
diff --git a/arch/arm/mach-s5p6440/include/mach/map.h b/arch/arm/mach-s5p6440/include/mach/map.h
new file mode 100644
index 000000000000..8924e5a4d6a6
--- /dev/null
+++ b/arch/arm/mach-s5p6440/include/mach/map.h
@@ -0,0 +1,68 @@
+/* linux/arch/arm/mach-s5p6440/include/mach/map.h
+ *
+ * Copyright (c) 2009 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * S5P6440 - Memory map definitions
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_ARCH_MAP_H
+#define __ASM_ARCH_MAP_H __FILE__
+
+#include <plat/map-base.h>
+#include <plat/map-s5p.h>
+
+#define S5P6440_PA_CHIPID       (0xE0000000)
+#define S5P_PA_CHIPID           S5P6440_PA_CHIPID
+
+#define S5P6440_PA_SYSCON       (0xE0100000)
+#define S5P6440_PA_CLK          (S5P6440_PA_SYSCON + 0x0)
+#define S5P_PA_SYSCON           S5P6440_PA_SYSCON
+
+#define S5P6440_PA_GPIO         (0xE0308000)
+#define S5P_PA_GPIO             S5P6440_PA_GPIO
+
+#define S5P6440_PA_VIC0         (0xE4000000)
+#define S5P_PA_VIC0             S5P6440_PA_VIC0
+
+#define S5P6440_PA_VIC1         (0xE4100000)
+#define S5P_PA_VIC1             S5P6440_PA_VIC1
+
+#define S5P6440_PA_TIMER        (0xEA000000)
+#define S5P_PA_TIMER            S5P6440_PA_TIMER
+
+#define S5P6440_PA_RTC          (0xEA100000)
+#define S5P_PA_RTC              S5P6440_PA_RTC
+
+#define S5P6440_PA_WDT          (0xEA200000)
+#define S5P_PA_WDT              S5P6440_PA_WDT
+
+#define S5P6440_PA_UART         (0xEC000000)
+
+#define S5P_PA_UART0            (S5P6440_PA_UART + 0x0)
+#define S5P_PA_UART1            (S5P6440_PA_UART + 0x400)
+#define S5P_PA_UART2            (S5P6440_PA_UART + 0x800)
+#define S5P_PA_UART3            (S5P6440_PA_UART + 0xC00)
+
+#define S5P_SZ_UART             SZ_256
+
+#define S5P6440_PA_IIC0         (0xEC104000)
+
+#define S5P6440_PA_HSOTG        (0xED100000)
+
+#define S5P6440_PA_HSMMC0       (0xED800000)
+#define S5P6440_PA_HSMMC1       (0xED900000)
+#define S5P6440_PA_HSMMC2       (0xEDA00000)
+
+#define S5P6440_PA_SDRAM        (0x20000000)
+#define S5P_PA_SDRAM            S5P6440_PA_SDRAM
+
+/* compatibiltiy defines. */
+#define S3C_PA_UART             S5P6440_PA_UART
+#define S3C_PA_IIC              S5P6440_PA_IIC0
+
+#endif /* __ASM_ARCH_MAP_H */
diff --git a/arch/arm/mach-s5p6440/include/mach/memory.h b/arch/arm/mach-s5p6440/include/mach/memory.h
new file mode 100644
index 000000000000..d62910c71b56
--- /dev/null
+++ b/arch/arm/mach-s5p6440/include/mach/memory.h
@@ -0,0 +1,19 @@
+/* linux/arch/arm/mach-s5p6440/include/mach/memory.h
+ *
+ * Copyright (c) 2009 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * S5P6440 - Memory definitions
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_ARCH_MEMORY_H
+#define __ASM_ARCH_MEMORY_H
+
+#define PHYS_OFFSET             UL(0x20000000)
+#define CONSISTENT_DMA_SIZE     SZ_8M
+
+#endif /* __ASM_ARCH_MEMORY_H */
diff --git a/arch/arm/mach-s5p6440/include/mach/pwm-clock.h b/arch/arm/mach-s5p6440/include/mach/pwm-clock.h
new file mode 100644
index 000000000000..c4bb7c555477
--- /dev/null
+++ b/arch/arm/mach-s5p6440/include/mach/pwm-clock.h
@@ -0,0 +1,62 @@
+/* linux/arch/arm/mach-s5p6440/include/mach/pwm-clock.h
+ *
+ * Copyright 2008 Simtec Electronics
+ *      Ben Dooks <ben@simtec.co.uk>
+ *      http://armlinux.simtec.co.uk/
+ *
+ * Copyright 2009 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * S5P6440 - pwm clock and timer support
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+/**
+ * pwm_cfg_src_is_tclk() - return whether the given mux config is a tclk
+ * @cfg: The timer TCFG1 register bits shifted down to 0.
+ *
+ * Return true if the given configuration from TCFG1 is a TCLK instead
+ * any of the TDIV clocks.
+ */
+static inline int pwm_cfg_src_is_tclk(unsigned long tcfg)
+{
+        return tcfg == S3C2410_TCFG1_MUX_TCLK;
+}
+
+/**
+ * tcfg_to_divisor() - convert tcfg1 setting to a divisor
+ * @tcfg1: The tcfg1 setting, shifted down.
+ *
+ * Get the divisor value for the given tcfg1 setting. We assume the
+ * caller has already checked to see if this is not a TCLK source.
+ */
+static inline unsigned long tcfg_to_divisor(unsigned long tcfg1)
+{
+        return 1 << (1 + tcfg1);
+}
+
+/**
+ * pwm_tdiv_has_div1() - does the tdiv setting have a /1
+ *
+ * Return true if we have a /1 in the tdiv setting.
+ */
+static inline unsigned int pwm_tdiv_has_div1(void)
+{
+        return 0;
+}
+
+/**
+ * pwm_tdiv_div_bits() - calculate TCFG1 divisor value.
+ * @div: The divisor to calculate the bit information for.
+ *
+ * Turn a divisor into the necessary bit field for TCFG1.
+ */
+static inline unsigned long pwm_tdiv_div_bits(unsigned int div)
+{
+        return ilog2(div) - 1;
+}
+
+#define S3C_TCFG1_MUX_TCLK S3C2410_TCFG1_MUX_TCLK
diff --git a/arch/arm/mach-s5p6440/include/mach/regs-clock.h b/arch/arm/mach-s5p6440/include/mach/regs-clock.h
new file mode 100644
index 000000000000..c783ecc9f193
--- /dev/null
+++ b/arch/arm/mach-s5p6440/include/mach/regs-clock.h
@@ -0,0 +1,130 @@
+/* linux/arch/arm/mach-s5p6440/include/mach/regs-clock.h
+ *
+ * Copyright (c) 2009 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * S5P6440 - Clock register definitions
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_ARCH_REGS_CLOCK_H
+#define __ASM_ARCH_REGS_CLOCK_H __FILE__
+
+#include <mach/map.h>
+
+#define S5P_CLKREG(x)           (S3C_VA_SYS + (x))
+
+#define S5P_APLL_LOCK           S5P_CLKREG(0x00)
+#define S5P_MPLL_LOCK           S5P_CLKREG(0x04)
+#define S5P_EPLL_LOCK           S5P_CLKREG(0x08)
+#define S5P_APLL_CON            S5P_CLKREG(0x0C)
+#define S5P_MPLL_CON            S5P_CLKREG(0x10)
+#define S5P_EPLL_CON            S5P_CLKREG(0x14)
+#define S5P_EPLL_CON_K          S5P_CLKREG(0x18)
+#define S5P_CLK_SRC0            S5P_CLKREG(0x1C)
+#define S5P_CLK_DIV0            S5P_CLKREG(0x20)
+#define S5P_CLK_DIV1            S5P_CLKREG(0x24)
+#define S5P_CLK_DIV2            S5P_CLKREG(0x28)
+#define S5P_CLK_OUT             S5P_CLKREG(0x2C)
+#define S5P_CLK_GATE_HCLK0      S5P_CLKREG(0x30)
+#define S5P_CLK_GATE_PCLK       S5P_CLKREG(0x34)
+#define S5P_CLK_GATE_SCLK0      S5P_CLKREG(0x38)
+#define S5P_CLK_GATE_MEM0       S5P_CLKREG(0x3C)
+#define S5P_CLK_DIV3            S5P_CLKREG(0x40)
+#define S5P_CLK_GATE_HCLK1      S5P_CLKREG(0x44)
+#define S5P_CLK_GATE_SCLK1      S5P_CLKREG(0x48)
+#define S5P_AHB_CON0            S5P_CLKREG(0x100)
+#define S5P_CLK_SRC1            S5P_CLKREG(0x10C)
+#define S5P_SWRESET             S5P_CLKREG(0x114)
+#define S5P_SYS_ID              S5P_CLKREG(0x118)
+#define S5P_SYS_OTHERS          S5P_CLKREG(0x11C)
+#define S5P_MEM_CFG_STAT        S5P_CLKREG(0x12C)
+#define S5P_PWR_CFG             S5P_CLKREG(0x804)
+#define S5P_EINT_WAKEUP_MASK    S5P_CLKREG(0x808)
+#define S5P_NORMAL_CFG          S5P_CLKREG(0x810)
+#define S5P_STOP_CFG            S5P_CLKREG(0x814)
+#define S5P_SLEEP_CFG           S5P_CLKREG(0x818)
+#define S5P_OSC_FREQ            S5P_CLKREG(0x820)
+#define S5P_OSC_STABLE          S5P_CLKREG(0x824)
+#define S5P_PWR_STABLE          S5P_CLKREG(0x828)
+#define S5P_MTC_STABLE          S5P_CLKREG(0x830)
+#define S5P_OTHERS              S5P_CLKREG(0x900)
+#define S5P_RST_STAT            S5P_CLKREG(0x904)
+#define S5P_WAKEUP_STAT         S5P_CLKREG(0x908)
+#define S5P_SLPEN               S5P_CLKREG(0x930)
+#define S5P_INFORM0             S5P_CLKREG(0xA00)
+#define S5P_INFORM1             S5P_CLKREG(0xA04)
+#define S5P_INFORM2             S5P_CLKREG(0xA08)
+#define S5P_INFORM3             S5P_CLKREG(0xA0C)
+
+/* CLKDIV0 */
+#define S5P_CLKDIV0_PCLK_MASK           (0xf << 12)
+#define S5P_CLKDIV0_PCLK_SHIFT          (12)
+#define S5P_CLKDIV0_HCLK_MASK           (0xf << 8)
+#define S5P_CLKDIV0_HCLK_SHIFT          (8)
+#define S5P_CLKDIV0_MPLL_MASK           (0x1 << 4)
+#define S5P_CLKDIV0_ARM_MASK            (0xf << 0)
+#define S5P_CLKDIV0_ARM_SHIFT           (0)
+
+/* CLKDIV3 */
+#define S5P_CLKDIV3_PCLK_LOW_MASK       (0xf << 12)
+#define S5P_CLKDIV3_PCLK_LOW_SHIFT      (12)
+#define S5P_CLKDIV3_HCLK_LOW_MASK       (0xf << 8)
+#define S5P_CLKDIV3_HCLK_LOW_SHIFT      (8)
+
+/* HCLK0 GATE Registers */
+#define S5P_CLKCON_HCLK0_USB            (1<<20)
+#define S5P_CLKCON_HCLK0_HSMMC2         (1<<19)
+#define S5P_CLKCON_HCLK0_HSMMC1         (1<<18)
+#define S5P_CLKCON_HCLK0_HSMMC0         (1<<17)
+#define S5P_CLKCON_HCLK0_POST0          (1<<5)
+
+/* HCLK1 GATE Registers */
+#define S5P_CLKCON_HCLK1_DISPCON        (1<<1)
+
+/* PCLK GATE Registers */
+#define S5P_CLKCON_PCLK_IIS2            (1<<26)
+#define S5P_CLKCON_PCLK_SPI1            (1<<22)
+#define S5P_CLKCON_PCLK_SPI0            (1<<21)
+#define S5P_CLKCON_PCLK_GPIO            (1<<18)
+#define S5P_CLKCON_PCLK_IIC0            (1<<17)
+#define S5P_CLKCON_PCLK_TSADC           (1<<12)
+#define S5P_CLKCON_PCLK_PWM             (1<<7)
+#define S5P_CLKCON_PCLK_RTC             (1<<6)
+#define S5P_CLKCON_PCLK_WDT             (1<<5)
+#define S5P_CLKCON_PCLK_UART3           (1<<4)
+#define S5P_CLKCON_PCLK_UART2           (1<<3)
+#define S5P_CLKCON_PCLK_UART1           (1<<2)
+#define S5P_CLKCON_PCLK_UART0           (1<<1)
+
+/* SCLK0 GATE Registers */
+#define S5P_CLKCON_SCLK0_MMC2_48        (1<<29)
+#define S5P_CLKCON_SCLK0_MMC1_48        (1<<28)
+#define S5P_CLKCON_SCLK0_MMC0_48        (1<<27)
+#define S5P_CLKCON_SCLK0_MMC2           (1<<26)
+#define S5P_CLKCON_SCLK0_MMC1           (1<<25)
+#define S5P_CLKCON_SCLK0_MMC0           (1<<24)
+#define S5P_CLKCON_SCLK0_SPI1_48        (1<<23)
+#define S5P_CLKCON_SCLK0_SPI0_48        (1<<22)
+#define S5P_CLKCON_SCLK0_SPI1           (1<<21)
+#define S5P_CLKCON_SCLK0_SPI0           (1<<20)
+#define S5P_CLKCON_SCLK0_UART           (1<<5)
+
+/* SCLK1 GATE Registers */
+
+/* MEM0 GATE Registers */
+#define S5P_CLKCON_MEM0_HCLK_NFCON      (1<<2)
+
+/*OTHERS Resgister */
+#define S5P_OTHERS_USB_SIG_MASK         (1<<16)
+#define S5P_OTHERS_HCLK_LOW_SEL_MPLL    (1<<6)
+
+/* Compatibility defines */
+#define ARM_CLK_DIV                     S5P_CLK_DIV0
+#define ARM_DIV_RATIO_SHIFT             0
+#define ARM_DIV_MASK                    (0xf << ARM_DIV_RATIO_SHIFT)
+
+#endif /* __ASM_ARCH_REGS_CLOCK_H */
diff --git a/arch/arm/mach-s5p6440/include/mach/regs-gpio.h b/arch/arm/mach-s5p6440/include/mach/regs-gpio.h
new file mode 100644
index 000000000000..82ff753913da
--- /dev/null
+++ b/arch/arm/mach-s5p6440/include/mach/regs-gpio.h
@@ -0,0 +1,54 @@
+/* linux/arch/arm/mach-s5p6440/include/mach/regs-gpio.h
+ *
+ * Copyright (c) 2009 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * S5P6440 - GPIO register definitions
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef __ASM_ARCH_REGS_GPIO_H
+#define __ASM_ARCH_REGS_GPIO_H __FILE__
+
+#include <mach/map.h>
+
+/* Base addresses for each of the banks */
+#define S5P6440_GPA_BASE                (S5P_VA_GPIO + 0x0000)
+#define S5P6440_GPB_BASE                (S5P_VA_GPIO + 0x0020)
+#define S5P6440_GPC_BASE                (S5P_VA_GPIO + 0x0040)
+#define S5P6440_GPF_BASE                (S5P_VA_GPIO + 0x00A0)
+#define S5P6440_GPG_BASE                (S5P_VA_GPIO + 0x00C0)
+#define S5P6440_GPH_BASE                (S5P_VA_GPIO + 0x00E0)
+#define S5P6440_GPI_BASE                (S5P_VA_GPIO + 0x0100)
+#define S5P6440_GPJ_BASE                (S5P_VA_GPIO + 0x0120)
+#define S5P6440_GPN_BASE                (S5P_VA_GPIO + 0x0830)
+#define S5P6440_GPP_BASE                (S5P_VA_GPIO + 0x0160)
+#define S5P6440_GPR_BASE                (S5P_VA_GPIO + 0x0290)
+#define S5P6440_EINT0CON0               (S5P_VA_GPIO + 0x900)
+#define S5P6440_EINT0FLTCON0            (S5P_VA_GPIO + 0x910)
+#define S5P6440_EINT0FLTCON1            (S5P_VA_GPIO + 0x914)
+#define S5P6440_EINT0MASK               (S5P_VA_GPIO + 0x920)
+#define S5P6440_EINT0PEND               (S5P_VA_GPIO + 0x924)
+
+/* for LCD */
+#define S5P6440_SPCON_LCD_SEL_RGB       (1 << 0)
+#define S5P6440_SPCON_LCD_SEL_MASK      (3 << 0)
+
+/* These set of macros are not really useful for the
+ * GPF/GPI/GPJ/GPN/GPP,
+ * useful for others set of GPIO's (4 bit)
+ */
+#define S5P6440_GPIO_CONMASK(__gpio)    (0xf << ((__gpio) * 4))
+#define S5P6440_GPIO_INPUT(__gpio)      (0x0 << ((__gpio) * 4))
+#define S5P6440_GPIO_OUTPUT(__gpio)     (0x1 << ((__gpio) * 4))
+
+/* Use these macros for GPF/GPI/GPJ/GPN/GPP set of GPIO (2 bit)
+ * */
+#define S5P6440_GPIO2_CONMASK(__gpio)   (0x3 << ((__gpio) * 2))
+#define S5P6440_GPIO2_INPUT(__gpio)     (0x0 << ((__gpio) * 2))
+#define S5P6440_GPIO2_OUTPUT(__gpio)    (0x1 << ((__gpio) * 2))
+
+#endif /* __ASM_ARCH_REGS_GPIO_H */
diff --git a/arch/arm/mach-s5p6440/include/mach/regs-irq.h b/arch/arm/mach-s5p6440/include/mach/regs-irq.h
new file mode 100644
index 000000000000..a961f4beeb0c
--- /dev/null
+++ b/arch/arm/mach-s5p6440/include/mach/regs-irq.h
@@ -0,0 +1,19 @@
+/* linux/arch/arm/mach-s5p6440/include/mach/regs-irq.h
+ *
+ * Copyright (c) 2009 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * S5P6440 - IRQ register definitions
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_ARCH_REGS_IRQ_H
+#define __ASM_ARCH_REGS_IRQ_H __FILE__
+
+#include <asm/hardware/vic.h>
+#include <mach/map.h>
+
+#endif /* __ASM_ARCH_REGS_IRQ_H */
diff --git a/arch/arm/mach-s5p6440/include/mach/system.h b/arch/arm/mach-s5p6440/include/mach/system.h
new file mode 100644
index 000000000000..d2dd817da66a
--- /dev/null
+++ b/arch/arm/mach-s5p6440/include/mach/system.h
@@ -0,0 +1,26 @@
+/* linux/arch/arm/mach-s5p6440/include/mach/system.h
+ *
+ * Copyright (c) 2009 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * S5P6440 - system support header
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_ARCH_SYSTEM_H
+#define __ASM_ARCH_SYSTEM_H __FILE__
+
+static void arch_idle(void)
+{
+        /* nothing here yet */
+}
+
+static void arch_reset(char mode, const char *cmd)
+{
+        /* nothing here yet */
+}
+
+#endif /* __ASM_ARCH_SYSTEM_H */
diff --git a/arch/arm/mach-s5p6440/include/mach/tick.h b/arch/arm/mach-s5p6440/include/mach/tick.h
new file mode 100644
index 000000000000..2f25c7f07970
--- /dev/null
+++ b/arch/arm/mach-s5p6440/include/mach/tick.h
@@ -0,0 +1,24 @@
+/* linux/arch/arm/mach-s5p6440/include/mach/tick.h
+ *
+ * Copyright (c) 2009 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * S5P6440 - Timer tick support definitions
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_ARCH_TICK_H
+#define __ASM_ARCH_TICK_H __FILE__
+
+static inline u32 s3c24xx_ostimer_pending(void)
+{
+        u32 pend = __raw_readl(VA_VIC0 + VIC_RAW_STATUS);
+        return pend & (1 << (IRQ_TIMER4_VIC - S5P_IRQ_VIC0(0)));
+}
+
+#define TICK_MAX        (0xffffffff)
+
+#endif /* __ASM_ARCH_TICK_H */
diff --git a/arch/arm/mach-s5p6440/include/mach/timex.h b/arch/arm/mach-s5p6440/include/mach/timex.h
new file mode 100644
index 000000000000..fb2e8cd40829
--- /dev/null
+++ b/arch/arm/mach-s5p6440/include/mach/timex.h
@@ -0,0 +1,24 @@
+/* arch/arm/mach-s3c64xx/include/mach/timex.h
+ *
+ * Copyright (c) 2003-2005 Simtec Electronics
+ *      Ben Dooks <ben@simtec.co.uk>
+ *
+ * S3C6400 - time parameters
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_ARCH_TIMEX_H
+#define __ASM_ARCH_TIMEX_H
+
+/* CLOCK_TICK_RATE needs to be evaluatable by the cpp, so making it
+ * a variable is useless. It seems as long as we make our timers an
+ * exact multiple of HZ, any value that makes a 1->1 correspondence
+ * for the time conversion functions to/from jiffies is acceptable.
+*/
+
+#define CLOCK_TICK_RATE 12000000
+
+#endif /* __ASM_ARCH_TIMEX_H */
diff --git a/arch/arm/mach-s5p6440/include/mach/uncompress.h b/arch/arm/mach-s5p6440/include/mach/uncompress.h
new file mode 100644
index 000000000000..7c1f600d65c0
--- /dev/null
+++ b/arch/arm/mach-s5p6440/include/mach/uncompress.h
@@ -0,0 +1,24 @@
+/* linux/arch/arm/mach-s5p6440/include/mach/uncompress.h
+ *
+ * Copyright (c) 2009 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * S5P6440 - uncompress code
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_ARCH_UNCOMPRESS_H
+#define __ASM_ARCH_UNCOMPRESS_H
+
+#include <mach/map.h>
+#include <plat/uncompress.h>
+
+static void arch_detect_cpu(void)
+{
+        /* we do not need to do any cpu detection here at the moment. */
+}
+
+#endif /* __ASM_ARCH_UNCOMPRESS_H */
diff --git a/arch/arm/mach-s5p6440/include/mach/vmalloc.h b/arch/arm/mach-s5p6440/include/mach/vmalloc.h
new file mode 100644
index 000000000000..16df257b1dce
--- /dev/null
+++ b/arch/arm/mach-s5p6440/include/mach/vmalloc.h
@@ -0,0 +1,17 @@
+/* arch/arm/mach-s5p6440/include/mach/vmalloc.h
+ *
+ * Copyright 2010 Ben Dooks <ben-linux@fluff.org>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * S3C6400 vmalloc definition
+*/
+
+#ifndef __ASM_ARCH_VMALLOC_H
+#define __ASM_ARCH_VMALLOC_H
+
+#define VMALLOC_END       (0xE0000000)
+
+#endif /* __ASM_ARCH_VMALLOC_H */
diff --git a/arch/arm/mach-s5p6440/init.c b/arch/arm/mach-s5p6440/init.c
new file mode 100644
index 000000000000..a1f3727e4021
--- /dev/null
+++ b/arch/arm/mach-s5p6440/init.c
@@ -0,0 +1,52 @@
+/* linux/arch/arm/mach-s5p6440/init.c
+ *
+ * Copyright (c) 2009 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * S5P6440 - Init support
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <linux/init.h>
+#include <linux/serial_core.h>
+
+#include <plat/cpu.h>
+#include <plat/devs.h>
+#include <plat/s5p6440.h>
+#include <plat/regs-serial.h>
+
+static struct s3c24xx_uart_clksrc s5p6440_serial_clocks[] = {
+        [0] = {
+                .name           = "pclk_low",
+                .divisor        = 1,
+                .min_baud       = 0,
+                .max_baud       = 0,
+        },
+        [1] = {
+                .name           = "uclk1",
+                .divisor        = 1,
+                .min_baud       = 0,
+                .max_baud       = 0,
+        },
+};
+
+/* uart registration process */
+void __init s5p6440_common_init_uarts(struct s3c2410_uartcfg *cfg, int no)
+{
+        struct s3c2410_uartcfg *tcfg = cfg;
+        u32 ucnt;
+
+        for (ucnt = 0; ucnt < no; ucnt++, tcfg++) {
+                if (!tcfg->clocks) {
+                        tcfg->clocks = s5p6440_serial_clocks;
+                        tcfg->clocks_size = ARRAY_SIZE(s5p6440_serial_clocks);
+                }
+        }
+
+        s3c24xx_init_uartdevs("s3c6400-uart", s5p_uart_resources, cfg, no);
+}
diff --git a/arch/arm/mach-s5p6440/mach-smdk6440.c b/arch/arm/mach-s5p6440/mach-smdk6440.c
new file mode 100644
index 000000000000..3ae88f2c7c77
--- /dev/null
+++ b/arch/arm/mach-s5p6440/mach-smdk6440.c
@@ -0,0 +1,111 @@
+/* linux/arch/arm/mach-s5p6440/mach-smdk6440.c
+ *
+ * Copyright (c) 2009 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <linux/interrupt.h>
+#include <linux/list.h>
+#include <linux/timer.h>
+#include <linux/delay.h>
+#include <linux/init.h>
+#include <linux/serial_core.h>
+#include <linux/platform_device.h>
+#include <linux/io.h>
+#include <linux/module.h>
+#include <linux/clk.h>
+
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+
+#include <mach/hardware.h>
+#include <mach/map.h>
+
+#include <asm/irq.h>
+#include <asm/mach-types.h>
+
+#include <plat/regs-serial.h>
+
+#include <plat/s5p6440.h>
+#include <plat/clock.h>
+#include <mach/regs-clock.h>
+#include <plat/devs.h>
+#include <plat/cpu.h>
+#include <plat/pll.h>
+
+#define S5P6440_UCON_DEFAULT    (S3C2410_UCON_TXILEVEL |        \
+                                S3C2410_UCON_RXILEVEL |         \
+                                S3C2410_UCON_TXIRQMODE |        \
+                                S3C2410_UCON_RXIRQMODE |        \
+                                S3C2410_UCON_RXFIFO_TOI |       \
+                                S3C2443_UCON_RXERR_IRQEN)
+
+#define S5P6440_ULCON_DEFAULT   S3C2410_LCON_CS8
+
+#define S5P6440_UFCON_DEFAULT   (S3C2410_UFCON_FIFOMODE |       \
+                                S3C2440_UFCON_TXTRIG16 |        \
+                                S3C2410_UFCON_RXTRIG8)
+
+static struct s3c2410_uartcfg smdk6440_uartcfgs[] __initdata = {
+        [0] = {
+                .hwport      = 0,
+                .flags       = 0,
+                .ucon        = S5P6440_UCON_DEFAULT,
+                .ulcon       = S5P6440_ULCON_DEFAULT,
+                .ufcon       = S5P6440_UFCON_DEFAULT,
+        },
+        [1] = {
+                .hwport      = 1,
+                .flags       = 0,
+                .ucon        = S5P6440_UCON_DEFAULT,
+                .ulcon       = S5P6440_ULCON_DEFAULT,
+                .ufcon       = S5P6440_UFCON_DEFAULT,
+        },
+        [2] = {
+                .hwport      = 2,
+                .flags       = 0,
+                .ucon        = S5P6440_UCON_DEFAULT,
+                .ulcon       = S5P6440_ULCON_DEFAULT,
+                .ufcon       = S5P6440_UFCON_DEFAULT,
+        },
+        [3] = {
+                .hwport      = 3,
+                .flags       = 0,
+                .ucon        = S5P6440_UCON_DEFAULT,
+                .ulcon       = S5P6440_ULCON_DEFAULT,
+                .ufcon       = S5P6440_UFCON_DEFAULT,
+        },
+};
+
+static struct platform_device *smdk6440_devices[] __initdata = {
+};
+
+static void __init smdk6440_map_io(void)
+{
+        s5p_init_io(NULL, 0, S5P_SYS_ID);
+        s3c24xx_init_clocks(12000000);
+        s3c24xx_init_uarts(smdk6440_uartcfgs, ARRAY_SIZE(smdk6440_uartcfgs));
+}
+
+static void __init smdk6440_machine_init(void)
+{
+        platform_add_devices(smdk6440_devices, ARRAY_SIZE(smdk6440_devices));
+}
+
+MACHINE_START(SMDK6440, "SMDK6440")
+        /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
+        .phys_io        = S3C_PA_UART & 0xfff00000,
+        .io_pg_offst    = (((u32)S3C_VA_UART) >> 18) & 0xfffc,
+        .boot_params    = S5P_PA_SDRAM + 0x100,
+
+        .init_irq       = s5p6440_init_irq,
+        .map_io         = smdk6440_map_io,
+        .init_machine   = smdk6440_machine_init,
+        .timer          = &s3c24xx_timer,
+MACHINE_END
diff --git a/arch/arm/mach-s5p6442/Kconfig b/arch/arm/mach-s5p6442/Kconfig
new file mode 100644
index 000000000000..4f3f6de6a013
--- /dev/null
+++ b/arch/arm/mach-s5p6442/Kconfig
@@ -0,0 +1,24 @@
+# arch/arm/mach-s5p6442/Kconfig
+#
+# Copyright (c) 2010 Samsung Electronics Co., Ltd.
+#               http://www.samsung.com/
+#
+# Licensed under GPLv2
+
+# Configuration options for the S5P6442
+
+if ARCH_S5P6442
+
+config CPU_S5P6442
+        bool
+        select PLAT_S5P
+        help
+          Enable S5P6442 CPU support
+
+config MACH_SMDK6442
+        bool "SMDK6442"
+        select CPU_S5P6442
+        help
+          Machine support for Samsung SMDK6442
+
+endif
diff --git a/arch/arm/mach-s5p6442/Makefile b/arch/arm/mach-s5p6442/Makefile
new file mode 100644
index 000000000000..dde39a6ce6bc
--- /dev/null
+++ b/arch/arm/mach-s5p6442/Makefile
@@ -0,0 +1,19 @@
+# arch/arm/mach-s5p6442/Makefile
+#
+# Copyright (c) 2010 Samsung Electronics Co., Ltd.
+#               http://www.samsung.com/
+#
+# Licensed under GPLv2
+
+obj-y                           :=
+obj-m                           :=
+obj-n                           :=
+obj-                            :=
+
+# Core support for S5P6442 system
+
+obj-$(CONFIG_CPU_S5P6442)       += cpu.o init.o clock.o
+
+# machine support
+
+obj-$(CONFIG_MACH_SMDK6442)     += mach-smdk6442.o
diff --git a/arch/arm/mach-s5p6442/Makefile.boot b/arch/arm/mach-s5p6442/Makefile.boot
new file mode 100644
index 000000000000..ff90aa13bd67
--- /dev/null
+++ b/arch/arm/mach-s5p6442/Makefile.boot
@@ -0,0 +1,2 @@
+   zreladdr-y   := 0x20008000
+params_phys-y   := 0x20000100
diff --git a/arch/arm/mach-s5p6442/clock.c b/arch/arm/mach-s5p6442/clock.c
new file mode 100644
index 000000000000..3aadbf42c112
--- /dev/null
+++ b/arch/arm/mach-s5p6442/clock.c
@@ -0,0 +1,396 @@
+/* linux/arch/arm/mach-s5p6442/clock.c
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * S5P6442 - Clock support
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/list.h>
+#include <linux/err.h>
+#include <linux/clk.h>
+#include <linux/io.h>
+
+#include <mach/map.h>
+
+#include <plat/cpu-freq.h>
+#include <mach/regs-clock.h>
+#include <plat/clock.h>
+#include <plat/cpu.h>
+#include <plat/pll.h>
+#include <plat/s5p-clock.h>
+#include <plat/clock-clksrc.h>
+#include <plat/s5p6442.h>
+
+static struct clksrc_clk clk_mout_apll = {
+        .clk    = {
+                .name           = "mout_apll",
+                .id             = -1,
+        },
+        .sources        = &clk_src_apll,
+        .reg_src        = { .reg = S5P_CLK_SRC0, .shift = 0, .size = 1 },
+};
+
+static struct clksrc_clk clk_mout_mpll = {
+        .clk = {
+                .name           = "mout_mpll",
+                .id             = -1,
+        },
+        .sources        = &clk_src_mpll,
+        .reg_src        = { .reg = S5P_CLK_SRC0, .shift = 4, .size = 1 },
+};
+
+static struct clksrc_clk clk_mout_epll = {
+        .clk    = {
+                .name           = "mout_epll",
+                .id             = -1,
+        },
+        .sources        = &clk_src_epll,
+        .reg_src        = { .reg = S5P_CLK_SRC0, .shift = 8, .size = 1 },
+};
+
+/* Possible clock sources for ARM Mux */
+static struct clk *clk_src_arm_list[] = {
+        [1] = &clk_mout_apll.clk,
+        [2] = &clk_mout_mpll.clk,
+};
+
+static struct clksrc_sources clk_src_arm = {
+        .sources        = clk_src_arm_list,
+        .nr_sources     = ARRAY_SIZE(clk_src_arm_list),
+};
+
+static struct clksrc_clk clk_mout_arm = {
+        .clk    = {
+                .name           = "mout_arm",
+                .id             = -1,
+        },
+        .sources        = &clk_src_arm,
+        .reg_src        = { .reg = S5P_CLK_MUX_STAT0, .shift = 16, .size = 3 },
+};
+
+static struct clk clk_dout_a2m = {
+        .name           = "dout_a2m",
+        .id             = -1,
+        .parent         = &clk_mout_apll.clk,
+};
+
+/* Possible clock sources for D0 Mux */
+static struct clk *clk_src_d0_list[] = {
+        [1] = &clk_mout_mpll.clk,
+        [2] = &clk_dout_a2m,
+};
+
+static struct clksrc_sources clk_src_d0 = {
+        .sources        = clk_src_d0_list,
+        .nr_sources     = ARRAY_SIZE(clk_src_d0_list),
+};
+
+static struct clksrc_clk clk_mout_d0 = {
+        .clk = {
+                .name           = "mout_d0",
+                .id             = -1,
+        },
+        .sources        = &clk_src_d0,
+        .reg_src        = { .reg = S5P_CLK_MUX_STAT0, .shift = 20, .size = 3 },
+};
+
+static struct clk clk_dout_apll = {
+        .name           = "dout_apll",
+        .id             = -1,
+        .parent         = &clk_mout_arm.clk,
+};
+
+/* Possible clock sources for D0SYNC Mux */
+static struct clk *clk_src_d0sync_list[] = {
+        [1] = &clk_mout_d0.clk,
+        [2] = &clk_dout_apll,
+};
+
+static struct clksrc_sources clk_src_d0sync = {
+        .sources        = clk_src_d0sync_list,
+        .nr_sources     = ARRAY_SIZE(clk_src_d0sync_list),
+};
+
+static struct clksrc_clk clk_mout_d0sync = {
+        .clk    = {
+                .name           = "mout_d0sync",
+                .id             = -1,
+        },
+        .sources        = &clk_src_d0sync,
+        .reg_src        = { .reg = S5P_CLK_MUX_STAT1, .shift = 28, .size = 3 },
+};
+
+/* Possible clock sources for D1 Mux */
+static struct clk *clk_src_d1_list[] = {
+        [1] = &clk_mout_mpll.clk,
+        [2] = &clk_dout_a2m,
+};
+
+static struct clksrc_sources clk_src_d1 = {
+        .sources        = clk_src_d1_list,
+        .nr_sources     = ARRAY_SIZE(clk_src_d1_list),
+};
+
+static struct clksrc_clk clk_mout_d1 = {
+        .clk    = {
+                .name           = "mout_d1",
+                .id             = -1,
+        },
+        .sources        = &clk_src_d1,
+        .reg_src        = { .reg = S5P_CLK_MUX_STAT0, .shift = 24, .size = 3 },
+};
+
+/* Possible clock sources for D1SYNC Mux */
+static struct clk *clk_src_d1sync_list[] = {
+        [1] = &clk_mout_d1.clk,
+        [2] = &clk_dout_apll,
+};
+
+static struct clksrc_sources clk_src_d1sync = {
+        .sources        = clk_src_d1sync_list,
+        .nr_sources     = ARRAY_SIZE(clk_src_d1sync_list),
+};
+
+static struct clksrc_clk clk_mout_d1sync = {
+        .clk    = {
+                .name           = "mout_d1sync",
+                .id             = -1,
+        },
+        .sources        = &clk_src_d1sync,
+        .reg_src        = { .reg = S5P_CLK_MUX_STAT1, .shift = 24, .size = 3 },
+};
+
+static struct clk clk_hclkd0 = {
+        .name           = "hclkd0",
+        .id             = -1,
+        .parent         = &clk_mout_d0sync.clk,
+};
+
+static struct clk clk_hclkd1 = {
+        .name           = "hclkd1",
+        .id             = -1,
+        .parent         = &clk_mout_d1sync.clk,
+};
+
+static struct clk clk_pclkd0 = {
+        .name           = "pclkd0",
+        .id             = -1,
+        .parent         = &clk_hclkd0,
+};
+
+static struct clk clk_pclkd1 = {
+        .name           = "pclkd1",
+        .id             = -1,
+        .parent         = &clk_hclkd1,
+};
+
+int s5p6442_clk_ip3_ctrl(struct clk *clk, int enable)
+{
+        return s5p_gatectrl(S5P_CLKGATE_IP3, clk, enable);
+}
+
+static struct clksrc_clk clksrcs[] = {
+        {
+                .clk    = {
+                        .name           = "dout_a2m",
+                        .id             = -1,
+                        .parent         = &clk_mout_apll.clk,
+                },
+                .sources = &clk_src_apll,
+                .reg_src = { .reg = S5P_CLK_SRC0, .shift = 0, .size = 1 },
+                .reg_div = { .reg = S5P_CLK_DIV0, .shift = 4, .size = 3 },
+        }, {
+                .clk    = {
+                        .name           = "dout_apll",
+                        .id             = -1,
+                        .parent         = &clk_mout_arm.clk,
+                },
+                .sources = &clk_src_arm,
+                .reg_src = { .reg = S5P_CLK_MUX_STAT0, .shift = 16, .size = 3 },
+                .reg_div = { .reg = S5P_CLK_DIV0, .shift = 0, .size = 3 },
+        }, {
+                .clk    = {
+                        .name           = "hclkd1",
+                        .id             = -1,
+                        .parent         = &clk_mout_d1sync.clk,
+                },
+                .sources = &clk_src_d1sync,
+                .reg_src = { .reg = S5P_CLK_MUX_STAT1, .shift = 24, .size = 3 },
+                .reg_div = { .reg = S5P_CLK_DIV0, .shift = 24, .size = 4 },
+        }, {
+                .clk    = {
+                        .name           = "hclkd0",
+                        .id             = -1,
+                        .parent         = &clk_mout_d0sync.clk,
+                },
+                .sources = &clk_src_d0sync,
+                .reg_src = { .reg = S5P_CLK_MUX_STAT1, .shift = 28, .size = 3 },
+                .reg_div = { .reg = S5P_CLK_DIV0, .shift = 16, .size = 4 },
+        }, {
+                .clk    = {
+                        .name           = "pclkd0",
+                        .id             = -1,
+                        .parent         = &clk_hclkd0,
+                },
+                .sources = &clk_src_d0sync,
+                .reg_src = { .reg = S5P_CLK_MUX_STAT1, .shift = 28, .size = 3 },
+                .reg_div = { .reg = S5P_CLK_DIV0, .shift = 20, .size = 3 },
+        }, {
+                .clk    = {
+                        .name           = "pclkd1",
+                        .id             = -1,
+                        .parent         = &clk_hclkd1,
+                },
+                .sources = &clk_src_d1sync,
+                .reg_src = { .reg = S5P_CLK_MUX_STAT1, .shift = 24, .size = 3 },
+                .reg_div = { .reg = S5P_CLK_DIV0, .shift = 28, .size = 3 },
+        }
+};
+
+/* Clock initialisation code */
+static struct clksrc_clk *init_parents[] = {
+        &clk_mout_apll,
+        &clk_mout_mpll,
+        &clk_mout_epll,
+        &clk_mout_arm,
+        &clk_mout_d0,
+        &clk_mout_d0sync,
+        &clk_mout_d1,
+        &clk_mout_d1sync,
+};
+
+void __init_or_cpufreq s5p6442_setup_clocks(void)
+{
+        struct clk *pclkd0_clk;
+        struct clk *pclkd1_clk;
+
+        unsigned long xtal;
+        unsigned long arm;
+        unsigned long hclkd0 = 0;
+        unsigned long hclkd1 = 0;
+        unsigned long pclkd0 = 0;
+        unsigned long pclkd1 = 0;
+
+        unsigned long apll;
+        unsigned long mpll;
+        unsigned long epll;
+        unsigned int ptr;
+
+        printk(KERN_DEBUG "%s: registering clocks\n", __func__);
+
+        xtal = clk_get_rate(&clk_xtal);
+
+        printk(KERN_DEBUG "%s: xtal is %ld\n", __func__, xtal);
+
+        apll = s5p_get_pll45xx(xtal, __raw_readl(S5P_APLL_CON), pll_4508);
+        mpll = s5p_get_pll45xx(xtal, __raw_readl(S5P_MPLL_CON), pll_4502);
+        epll = s5p_get_pll45xx(xtal, __raw_readl(S5P_EPLL_CON), pll_4500);
+
+        printk(KERN_INFO "S5P6440: PLL settings, A=%ld, M=%ld, E=%ld",
+                        apll, mpll, epll);
+
+        clk_fout_apll.rate = apll;
+        clk_fout_mpll.rate = mpll;
+        clk_fout_epll.rate = epll;
+
+        for (ptr = 0; ptr < ARRAY_SIZE(init_parents); ptr++)
+                s3c_set_clksrc(init_parents[ptr], true);
+
+        for (ptr = 0; ptr < ARRAY_SIZE(clksrcs); ptr++)
+                s3c_set_clksrc(&clksrcs[ptr], true);
+
+        arm = clk_get_rate(&clk_dout_apll);
+        hclkd0 = clk_get_rate(&clk_hclkd0);
+        hclkd1 = clk_get_rate(&clk_hclkd1);
+
+        pclkd0_clk = clk_get(NULL, "pclkd0");
+        BUG_ON(IS_ERR(pclkd0_clk));
+
+        pclkd0 = clk_get_rate(pclkd0_clk);
+        clk_put(pclkd0_clk);
+
+        pclkd1_clk = clk_get(NULL, "pclkd1");
+        BUG_ON(IS_ERR(pclkd1_clk));
+
+        pclkd1 = clk_get_rate(pclkd1_clk);
+        clk_put(pclkd1_clk);
+
+        printk(KERN_INFO "S5P6442: HCLKD0=%ld, HCLKD1=%ld, PCLKD0=%ld, PCLKD1=%ld\n",
+                        hclkd0, hclkd1, pclkd0, pclkd1);
+
+        /* For backward compatibility */
+        clk_f.rate = arm;
+        clk_h.rate = hclkd1;
+        clk_p.rate = pclkd1;
+
+        clk_pclkd0.rate = pclkd0;
+        clk_pclkd1.rate = pclkd1;
+}
+
+static struct clk init_clocks[] = {
+        {
+                .name           = "systimer",
+                .id             = -1,
+                .parent         = &clk_pclkd1,
+                .enable         = s5p6442_clk_ip3_ctrl,
+                .ctrlbit        = (1<<16),
+        }, {
+                .name           = "uart",
+                .id             = 0,
+                .parent         = &clk_pclkd1,
+                .enable         = s5p6442_clk_ip3_ctrl,
+                .ctrlbit        = (1<<17),
+        }, {
+                .name           = "uart",
+                .id             = 1,
+                .parent         = &clk_pclkd1,
+                .enable         = s5p6442_clk_ip3_ctrl,
+                .ctrlbit        = (1<<18),
+        }, {
+                .name           = "uart",
+                .id             = 2,
+                .parent         = &clk_pclkd1,
+                .enable         = s5p6442_clk_ip3_ctrl,
+                .ctrlbit        = (1<<19),
+        }, {
+                .name           = "timers",
+                .id             = -1,
+                .parent         = &clk_pclkd1,
+                .enable         = s5p6442_clk_ip3_ctrl,
+                .ctrlbit        = (1<<23),
+        },
+};
+
+static struct clk *clks[] __initdata = {
+        &clk_ext,
+        &clk_epll,
+        &clk_mout_apll.clk,
+        &clk_mout_mpll.clk,
+        &clk_mout_epll.clk,
+        &clk_mout_d0.clk,
+        &clk_mout_d0sync.clk,
+        &clk_mout_d1.clk,
+        &clk_mout_d1sync.clk,
+        &clk_hclkd0,
+        &clk_pclkd0,
+        &clk_hclkd1,
+        &clk_pclkd1,
+};
+
+void __init s5p6442_register_clocks(void)
+{
+        s3c24xx_register_clocks(clks, ARRAY_SIZE(clks));
+
+        s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs));
+        s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks));
+
+        s3c_pwmclk_init();
+}
diff --git a/arch/arm/mach-s5p6442/cpu.c b/arch/arm/mach-s5p6442/cpu.c
new file mode 100644
index 000000000000..bc2524df89b3
--- /dev/null
+++ b/arch/arm/mach-s5p6442/cpu.c
@@ -0,0 +1,121 @@
+/* linux/arch/arm/mach-s5p6442/cpu.c
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <linux/interrupt.h>
+#include <linux/list.h>
+#include <linux/timer.h>
+#include <linux/init.h>
+#include <linux/clk.h>
+#include <linux/io.h>
+#include <linux/sysdev.h>
+#include <linux/serial_core.h>
+#include <linux/platform_device.h>
+
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+#include <asm/mach/irq.h>
+
+#include <asm/proc-fns.h>
+
+#include <mach/hardware.h>
+#include <mach/map.h>
+#include <asm/irq.h>
+
+#include <plat/regs-serial.h>
+#include <mach/regs-clock.h>
+
+#include <plat/cpu.h>
+#include <plat/devs.h>
+#include <plat/clock.h>
+#include <plat/s5p6442.h>
+
+/* Initial IO mappings */
+
+static struct map_desc s5p6442_iodesc[] __initdata = {
+        {
+                .virtual        = (unsigned long)S5P_VA_SYSTIMER,
+                .pfn            = __phys_to_pfn(S5P6442_PA_SYSTIMER),
+                .length         = SZ_16K,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = (unsigned long)VA_VIC2,
+                .pfn            = __phys_to_pfn(S5P6442_PA_VIC2),
+                .length         = SZ_16K,
+                .type           = MT_DEVICE,
+        }
+};
+
+static void s5p6442_idle(void)
+{
+        if (!need_resched())
+                cpu_do_idle();
+
+        local_irq_enable();
+}
+
+/* s5p6442_map_io
+ *
+ * register the standard cpu IO areas
+*/
+
+void __init s5p6442_map_io(void)
+{
+        iotable_init(s5p6442_iodesc, ARRAY_SIZE(s5p6442_iodesc));
+}
+
+void __init s5p6442_init_clocks(int xtal)
+{
+        printk(KERN_DEBUG "%s: initializing clocks\n", __func__);
+
+        s3c24xx_register_baseclocks(xtal);
+        s5p_register_clocks(xtal);
+        s5p6442_register_clocks();
+        s5p6442_setup_clocks();
+}
+
+void __init s5p6442_init_irq(void)
+{
+        /* S5P6442 supports 3 VIC */
+        u32 vic[3];
+
+        /* VIC0, VIC1, and VIC2: some interrupt reserved */
+        vic[0] = 0x7fefffff;
+        vic[1] = 0X7f389c81;
+        vic[2] = 0X1bbbcfff;
+
+        s5p_init_irq(vic, ARRAY_SIZE(vic));
+}
+
+static struct sysdev_class s5p6442_sysclass = {
+        .name   = "s5p6442-core",
+};
+
+static struct sys_device s5p6442_sysdev = {
+        .cls    = &s5p6442_sysclass,
+};
+
+static int __init s5p6442_core_init(void)
+{
+        return sysdev_class_register(&s5p6442_sysclass);
+}
+
+core_initcall(s5p6442_core_init);
+
+int __init s5p6442_init(void)
+{
+        printk(KERN_INFO "S5P6442: Initializing architecture\n");
+
+        /* set idle function */
+        pm_idle = s5p6442_idle;
+
+        return sysdev_register(&s5p6442_sysdev);
+}
diff --git a/arch/arm/mach-s5p6442/include/mach/debug-macro.S b/arch/arm/mach-s5p6442/include/mach/debug-macro.S
new file mode 100644
index 000000000000..1aae691e58ef
--- /dev/null
+++ b/arch/arm/mach-s5p6442/include/mach/debug-macro.S
@@ -0,0 +1,36 @@
+/* linux/arch/arm/mach-s5p6442/include/mach/debug-macro.S
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * Based on arch/arm/mach-s3c6400/include/mach/debug-macro.S
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+/* pull in the relevant register and map files. */
+
+#include <mach/map.h>
+#include <plat/regs-serial.h>
+
+        .macro addruart, rx
+                mrc     p15, 0, \rx, c1, c0
+                tst     \rx, #1
+                ldreq   \rx, = S3C_PA_UART
+                ldrne   \rx, = S3C_VA_UART
+#if CONFIG_DEBUG_S3C_UART != 0
+                add     \rx, \rx, #(0x400 * CONFIG_DEBUG_S3C_UART)
+#endif
+        .endm
+
+#define fifo_full fifo_full_s5pv210
+#define fifo_level fifo_level_s5pv210
+
+/* include the reset of the code which will do the work, we're only
+ * compiling for a single cpu processor type so the default of s3c2440
+ * will be fine with us.
+ */
+
+#include <plat/debug-macro.S>
diff --git a/arch/arm/mach-s5p6442/include/mach/entry-macro.S b/arch/arm/mach-s5p6442/include/mach/entry-macro.S
new file mode 100644
index 000000000000..6d574edbf1ae
--- /dev/null
+++ b/arch/arm/mach-s5p6442/include/mach/entry-macro.S
@@ -0,0 +1,48 @@
+/* linux/arch/arm/mach-s5p6442/include/mach/entry-macro.S
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * Low-level IRQ helper macros for the Samsung S5P6442
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include <asm/hardware/vic.h>
+#include <mach/map.h>
+#include <plat/irqs.h>
+
+        .macro  disable_fiq
+        .endm
+
+        .macro  get_irqnr_preamble, base, tmp
+        ldr     \base, =VA_VIC0
+        .endm
+
+        .macro  arch_ret_to_user, tmp1, tmp2
+        .endm
+
+        .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
+
+        @ check the vic0
+        mov     \irqnr, # S5P_IRQ_OFFSET + 31
+        ldr     \irqstat, [ \base, # VIC_IRQ_STATUS ]
+        teq     \irqstat, #0
+
+        @ otherwise try vic1
+        addeq   \tmp, \base, #(VA_VIC1 - VA_VIC0)
+        addeq   \irqnr, \irqnr, #32
+        ldreq   \irqstat, [ \tmp, # VIC_IRQ_STATUS ]
+        teqeq   \irqstat, #0
+
+        @ otherwise try vic2
+        addeq   \tmp, \base, #(VA_VIC2 - VA_VIC0)
+        addeq   \irqnr, \irqnr, #32
+        ldreq   \irqstat, [ \tmp, # VIC_IRQ_STATUS ]
+        teqeq   \irqstat, #0
+
+        clzne   \irqstat, \irqstat
+        subne   \irqnr, \irqnr, \irqstat
+        .endm
diff --git a/arch/arm/mach-s5p6442/include/mach/gpio.h b/arch/arm/mach-s5p6442/include/mach/gpio.h
new file mode 100644
index 000000000000..b8715df2fdab
--- /dev/null
+++ b/arch/arm/mach-s5p6442/include/mach/gpio.h
@@ -0,0 +1,123 @@
+/* linux/arch/arm/mach-s5p6442/include/mach/gpio.h
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * S5P6442 - GPIO lib support
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_ARCH_GPIO_H
+#define __ASM_ARCH_GPIO_H __FILE__
+
+#define gpio_get_value  __gpio_get_value
+#define gpio_set_value  __gpio_set_value
+#define gpio_cansleep   __gpio_cansleep
+#define gpio_to_irq     __gpio_to_irq
+
+/* GPIO bank sizes */
+#define S5P6442_GPIO_A0_NR      (8)
+#define S5P6442_GPIO_A1_NR      (2)
+#define S5P6442_GPIO_B_NR       (4)
+#define S5P6442_GPIO_C0_NR      (5)
+#define S5P6442_GPIO_C1_NR      (5)
+#define S5P6442_GPIO_D0_NR      (2)
+#define S5P6442_GPIO_D1_NR      (6)
+#define S5P6442_GPIO_E0_NR      (8)
+#define S5P6442_GPIO_E1_NR      (5)
+#define S5P6442_GPIO_F0_NR      (8)
+#define S5P6442_GPIO_F1_NR      (8)
+#define S5P6442_GPIO_F2_NR      (8)
+#define S5P6442_GPIO_F3_NR      (6)
+#define S5P6442_GPIO_G0_NR      (7)
+#define S5P6442_GPIO_G1_NR      (7)
+#define S5P6442_GPIO_G2_NR      (7)
+#define S5P6442_GPIO_H0_NR      (8)
+#define S5P6442_GPIO_H1_NR      (8)
+#define S5P6442_GPIO_H2_NR      (8)
+#define S5P6442_GPIO_H3_NR      (8)
+#define S5P6442_GPIO_J0_NR      (8)
+#define S5P6442_GPIO_J1_NR      (6)
+#define S5P6442_GPIO_J2_NR      (8)
+#define S5P6442_GPIO_J3_NR      (8)
+#define S5P6442_GPIO_J4_NR      (5)
+
+/* GPIO bank numbers */
+
+/* CONFIG_S3C_GPIO_SPACE allows the user to select extra
+ * space for debugging purposes so that any accidental
+ * change from one gpio bank to another can be caught.
+*/
+
+#define S5P6442_GPIO_NEXT(__gpio) \
+        ((__gpio##_START) + (__gpio##_NR) + CONFIG_S3C_GPIO_SPACE + 1)
+
+enum s5p_gpio_number {
+        S5P6442_GPIO_A0_START   = 0,
+        S5P6442_GPIO_A1_START   = S5P6442_GPIO_NEXT(S5P6442_GPIO_A0),
+        S5P6442_GPIO_B_START    = S5P6442_GPIO_NEXT(S5P6442_GPIO_A1),
+        S5P6442_GPIO_C0_START   = S5P6442_GPIO_NEXT(S5P6442_GPIO_B),
+        S5P6442_GPIO_C1_START   = S5P6442_GPIO_NEXT(S5P6442_GPIO_C0),
+        S5P6442_GPIO_D0_START   = S5P6442_GPIO_NEXT(S5P6442_GPIO_C1),
+        S5P6442_GPIO_D1_START   = S5P6442_GPIO_NEXT(S5P6442_GPIO_D0),
+        S5P6442_GPIO_E0_START   = S5P6442_GPIO_NEXT(S5P6442_GPIO_D1),
+        S5P6442_GPIO_E1_START   = S5P6442_GPIO_NEXT(S5P6442_GPIO_E0),
+        S5P6442_GPIO_F0_START   = S5P6442_GPIO_NEXT(S5P6442_GPIO_E1),
+        S5P6442_GPIO_F1_START   = S5P6442_GPIO_NEXT(S5P6442_GPIO_F0),
+        S5P6442_GPIO_F2_START   = S5P6442_GPIO_NEXT(S5P6442_GPIO_F1),
+        S5P6442_GPIO_F3_START   = S5P6442_GPIO_NEXT(S5P6442_GPIO_F2),
+        S5P6442_GPIO_G0_START   = S5P6442_GPIO_NEXT(S5P6442_GPIO_F3),
+        S5P6442_GPIO_G1_START   = S5P6442_GPIO_NEXT(S5P6442_GPIO_G0),
+        S5P6442_GPIO_G2_START   = S5P6442_GPIO_NEXT(S5P6442_GPIO_G1),
+        S5P6442_GPIO_H0_START   = S5P6442_GPIO_NEXT(S5P6442_GPIO_G2),
+        S5P6442_GPIO_H1_START   = S5P6442_GPIO_NEXT(S5P6442_GPIO_H0),
+        S5P6442_GPIO_H2_START   = S5P6442_GPIO_NEXT(S5P6442_GPIO_H1),
+        S5P6442_GPIO_H3_START   = S5P6442_GPIO_NEXT(S5P6442_GPIO_H2),
+        S5P6442_GPIO_J0_START   = S5P6442_GPIO_NEXT(S5P6442_GPIO_H3),
+        S5P6442_GPIO_J1_START   = S5P6442_GPIO_NEXT(S5P6442_GPIO_J0),
+        S5P6442_GPIO_J2_START   = S5P6442_GPIO_NEXT(S5P6442_GPIO_J1),
+        S5P6442_GPIO_J3_START   = S5P6442_GPIO_NEXT(S5P6442_GPIO_J2),
+        S5P6442_GPIO_J4_START   = S5P6442_GPIO_NEXT(S5P6442_GPIO_J3),
+};
+
+/* S5P6442 GPIO number definitions. */
+#define S5P6442_GPA0(_nr)       (S5P6442_GPIO_A0_START + (_nr))
+#define S5P6442_GPA1(_nr)       (S5P6442_GPIO_A1_START + (_nr))
+#define S5P6442_GPB(_nr)        (S5P6442_GPIO_B_START + (_nr))
+#define S5P6442_GPC0(_nr)       (S5P6442_GPIO_C0_START + (_nr))
+#define S5P6442_GPC1(_nr)       (S5P6442_GPIO_C1_START + (_nr))
+#define S5P6442_GPD0(_nr)       (S5P6442_GPIO_D0_START + (_nr))
+#define S5P6442_GPD1(_nr)       (S5P6442_GPIO_D1_START + (_nr))
+#define S5P6442_GPE0(_nr)       (S5P6442_GPIO_E0_START + (_nr))
+#define S5P6442_GPE1(_nr)       (S5P6442_GPIO_E1_START + (_nr))
+#define S5P6442_GPF0(_nr)       (S5P6442_GPIO_F0_START + (_nr))
+#define S5P6442_GPF1(_nr)       (S5P6442_GPIO_F1_START + (_nr))
+#define S5P6442_GPF2(_nr)       (S5P6442_GPIO_F2_START + (_nr))
+#define S5P6442_GPF3(_nr)       (S5P6442_GPIO_F3_START + (_nr))
+#define S5P6442_GPG0(_nr)       (S5P6442_GPIO_G0_START + (_nr))
+#define S5P6442_GPG1(_nr)       (S5P6442_GPIO_G1_START + (_nr))
+#define S5P6442_GPG2(_nr)       (S5P6442_GPIO_G2_START + (_nr))
+#define S5P6442_GPH0(_nr)       (S5P6442_GPIO_H0_START + (_nr))
+#define S5P6442_GPH1(_nr)       (S5P6442_GPIO_H1_START + (_nr))
+#define S5P6442_GPH2(_nr)       (S5P6442_GPIO_H2_START + (_nr))
+#define S5P6442_GPH3(_nr)       (S5P6442_GPIO_H3_START + (_nr))
+#define S5P6442_GPJ0(_nr)       (S5P6442_GPIO_J0_START + (_nr))
+#define S5P6442_GPJ1(_nr)       (S5P6442_GPIO_J1_START + (_nr))
+#define S5P6442_GPJ2(_nr)       (S5P6442_GPIO_J2_START + (_nr))
+#define S5P6442_GPJ3(_nr)       (S5P6442_GPIO_J3_START + (_nr))
+#define S5P6442_GPJ4(_nr)       (S5P6442_GPIO_J4_START + (_nr))
+
+/* the end of the S5P6442 specific gpios */
+#define S5P6442_GPIO_END        (S5P6442_GPJ4(S5P6442_GPIO_J4_NR) + 1)
+#define S3C_GPIO_END            S5P6442_GPIO_END
+
+/* define the number of gpios we need to the one after the GPJ4() range */
+#define ARCH_NR_GPIOS           (S5P6442_GPJ4(S5P6442_GPIO_J4_NR) +     \
+                                 CONFIG_SAMSUNG_GPIO_EXTRA + 1)
+
+#include <asm-generic/gpio.h>
+
+#endif /* __ASM_ARCH_GPIO_H */
diff --git a/arch/arm/mach-s5p6442/include/mach/hardware.h b/arch/arm/mach-s5p6442/include/mach/hardware.h
new file mode 100644
index 000000000000..8cd7b67b49d4
--- /dev/null
+++ b/arch/arm/mach-s5p6442/include/mach/hardware.h
@@ -0,0 +1,18 @@
+/* linux/arch/arm/mach-s5p6442/include/mach/hardware.h
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * S5P6442 - Hardware support
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_ARCH_HARDWARE_H
+#define __ASM_ARCH_HARDWARE_H __FILE__
+
+/* currently nothing here, placeholder */
+
+#endif /* __ASM_ARCH_HARDWARE_H */
diff --git a/arch/arm/mach-s5p6442/include/mach/io.h b/arch/arm/mach-s5p6442/include/mach/io.h
new file mode 100644
index 000000000000..5d2195ad0b67
--- /dev/null
+++ b/arch/arm/mach-s5p6442/include/mach/io.h
@@ -0,0 +1,17 @@
+/* arch/arm/mach-s5p6442/include/mach/io.h
+ *
+ * Copyright 2008-2010 Ben Dooks <ben-linux@fluff.org>
+ *
+ * Default IO routines for S5P6442
+ */
+
+#ifndef __ASM_ARM_ARCH_IO_H
+#define __ASM_ARM_ARCH_IO_H
+
+/* No current ISA/PCI bus support. */
+#define __io(a)         __typesafe_io(a)
+#define __mem_pci(a)    (a)
+
+#define IO_SPACE_LIMIT (0xFFFFFFFF)
+
+#endif
diff --git a/arch/arm/mach-s5p6442/include/mach/irqs.h b/arch/arm/mach-s5p6442/include/mach/irqs.h
new file mode 100644
index 000000000000..da665809f6e4
--- /dev/null
+++ b/arch/arm/mach-s5p6442/include/mach/irqs.h
@@ -0,0 +1,86 @@
+/* linux/arch/arm/mach-s5p6442/include/mach/irqs.h
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * S5P6442 - IRQ definitions
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_ARCH_IRQS_H
+#define __ASM_ARCH_IRQS_H __FILE__
+
+#include <plat/irqs.h>
+
+/* VIC0 */
+#define IRQ_EINT16_31           S5P_IRQ_VIC0(16)
+#define IRQ_BATF                S5P_IRQ_VIC0(17)
+#define IRQ_MDMA                S5P_IRQ_VIC0(18)
+#define IRQ_PDMA                S5P_IRQ_VIC0(19)
+#define IRQ_TIMER0_VIC          S5P_IRQ_VIC0(21)
+#define IRQ_TIMER1_VIC          S5P_IRQ_VIC0(22)
+#define IRQ_TIMER2_VIC          S5P_IRQ_VIC0(23)
+#define IRQ_TIMER3_VIC          S5P_IRQ_VIC0(24)
+#define IRQ_TIMER4_VIC          S5P_IRQ_VIC0(25)
+#define IRQ_SYSTIMER            S5P_IRQ_VIC0(26)
+#define IRQ_WDT                 S5P_IRQ_VIC0(27)
+#define IRQ_RTC_ALARM           S5P_IRQ_VIC0(28)
+#define IRQ_RTC_TIC             S5P_IRQ_VIC0(29)
+#define IRQ_GPIOINT             S5P_IRQ_VIC0(30)
+
+/* VIC1 */
+#define IRQ_nPMUIRQ             S5P_IRQ_VIC1(0)
+#define IRQ_ONENAND             S5P_IRQ_VIC1(7)
+#define IRQ_UART0               S5P_IRQ_VIC1(10)
+#define IRQ_UART1               S5P_IRQ_VIC1(11)
+#define IRQ_UART2               S5P_IRQ_VIC1(12)
+#define IRQ_SPI0                S5P_IRQ_VIC1(15)
+#define IRQ_IIC                 S5P_IRQ_VIC1(19)
+#define IRQ_IIC1                S5P_IRQ_VIC1(20)
+#define IRQ_IIC2                S5P_IRQ_VIC1(21)
+#define IRQ_OTG                 S5P_IRQ_VIC1(24)
+#define IRQ_MSM                 S5P_IRQ_VIC1(25)
+#define IRQ_HSMMC0              S5P_IRQ_VIC1(26)
+#define IRQ_HSMMC1              S5P_IRQ_VIC1(27)
+#define IRQ_HSMMC2              S5P_IRQ_VIC1(28)
+#define IRQ_COMMRX              S5P_IRQ_VIC1(29)
+#define IRQ_COMMTX              S5P_IRQ_VIC1(30)
+
+/* VIC2 */
+#define IRQ_LCD0                S5P_IRQ_VIC2(0)
+#define IRQ_LCD1                S5P_IRQ_VIC2(1)
+#define IRQ_LCD2                S5P_IRQ_VIC2(2)
+#define IRQ_LCD3                S5P_IRQ_VIC2(3)
+#define IRQ_ROTATOR             S5P_IRQ_VIC2(4)
+#define IRQ_FIMC0               S5P_IRQ_VIC2(5)
+#define IRQ_FIMC1               S5P_IRQ_VIC2(6)
+#define IRQ_FIMC2               S5P_IRQ_VIC2(7)
+#define IRQ_JPEG                S5P_IRQ_VIC2(8)
+#define IRQ_3D                  S5P_IRQ_VIC2(10)
+#define IRQ_Mixer               S5P_IRQ_VIC2(11)
+#define IRQ_MFC                 S5P_IRQ_VIC2(14)
+#define IRQ_TVENC               S5P_IRQ_VIC2(15)
+#define IRQ_I2S0                S5P_IRQ_VIC2(16)
+#define IRQ_I2S1                S5P_IRQ_VIC2(17)
+#define IRQ_RP                  S5P_IRQ_VIC2(19)
+#define IRQ_PCM0                S5P_IRQ_VIC2(20)
+#define IRQ_PCM1                S5P_IRQ_VIC2(21)
+#define IRQ_ADC                 S5P_IRQ_VIC2(23)
+#define IRQ_PENDN               S5P_IRQ_VIC2(24)
+#define IRQ_KEYPAD              S5P_IRQ_VIC2(25)
+#define IRQ_SSS_INT             S5P_IRQ_VIC2(27)
+#define IRQ_SSS_HASH            S5P_IRQ_VIC2(28)
+#define IRQ_VIC_END             S5P_IRQ_VIC2(31)
+
+#define S5P_IRQ_EINT_BASE       (IRQ_VIC_END + 1)
+
+#define IRQ_EINT(x)             ((x) < 16 ? S5P_IRQ_VIC0(x) : \
+                                        (S5P_IRQ_EINT_BASE + (x)-16))
+/* Set the default NR_IRQS */
+
+#define NR_IRQS                 (IRQ_EINT(31) + 1)
+
+#endif /* __ASM_ARCH_IRQS_H */
diff --git a/arch/arm/mach-s5p6442/include/mach/map.h b/arch/arm/mach-s5p6442/include/mach/map.h
new file mode 100644
index 000000000000..685277d792fb
--- /dev/null
+++ b/arch/arm/mach-s5p6442/include/mach/map.h
@@ -0,0 +1,58 @@
+/* linux/arch/arm/mach-s5p6442/include/mach/map.h
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * S5P6442 - Memory map definitions
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_ARCH_MAP_H
+#define __ASM_ARCH_MAP_H __FILE__
+
+#include <plat/map-base.h>
+#include <plat/map-s5p.h>
+
+#define S5P6442_PA_CHIPID       (0xE0000000)
+#define S5P_PA_CHIPID           S5P6442_PA_CHIPID
+
+#define S5P6442_PA_SYSCON       (0xE0100000)
+#define S5P_PA_SYSCON           S5P6442_PA_SYSCON
+
+#define S5P6442_PA_GPIO         (0xE0200000)
+#define S5P_PA_GPIO             S5P6442_PA_GPIO
+
+#define S5P6442_PA_VIC0         (0xE4000000)
+#define S5P_PA_VIC0             S5P6442_PA_VIC0
+
+#define S5P6442_PA_VIC1         (0xE4100000)
+#define S5P_PA_VIC1             S5P6442_PA_VIC1
+
+#define S5P6442_PA_VIC2         (0xE4200000)
+#define S5P_PA_VIC2             S5P6442_PA_VIC2
+
+#define S5P6442_PA_TIMER        (0xEA000000)
+#define S5P_PA_TIMER            S5P6442_PA_TIMER
+
+#define S5P6442_PA_SYSTIMER     (0xEA100000)
+
+#define S5P6442_PA_UART         (0xEC000000)
+
+#define S5P_PA_UART0            (S5P6442_PA_UART + 0x0)
+#define S5P_PA_UART1            (S5P6442_PA_UART + 0x400)
+#define S5P_PA_UART2            (S5P6442_PA_UART + 0x800)
+#define S5P_SZ_UART             SZ_256
+
+#define S5P6442_PA_IIC0         (0xEC100000)
+
+#define S5P6442_PA_SDRAM        (0x20000000)
+#define S5P_PA_SDRAM            S5P6442_PA_SDRAM
+
+/* compatibiltiy defines. */
+#define S3C_PA_UART             S5P6442_PA_UART
+#define S3C_PA_IIC              S5P6442_PA_IIC0
+
+#endif /* __ASM_ARCH_MAP_H */
diff --git a/arch/arm/mach-s5p6442/include/mach/memory.h b/arch/arm/mach-s5p6442/include/mach/memory.h
new file mode 100644
index 000000000000..9ddd877ba2ea
--- /dev/null
+++ b/arch/arm/mach-s5p6442/include/mach/memory.h
@@ -0,0 +1,19 @@
+/* linux/arch/arm/mach-s5p6442/include/mach/memory.h
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * S5P6442 - Memory definitions
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_ARCH_MEMORY_H
+#define __ASM_ARCH_MEMORY_H
+
+#define PHYS_OFFSET             UL(0x20000000)
+#define CONSISTENT_DMA_SIZE     SZ_8M
+
+#endif /* __ASM_ARCH_MEMORY_H */
diff --git a/arch/arm/mach-s5p6442/include/mach/pwm-clock.h b/arch/arm/mach-s5p6442/include/mach/pwm-clock.h
new file mode 100644
index 000000000000..15e8525da0f1
--- /dev/null
+++ b/arch/arm/mach-s5p6442/include/mach/pwm-clock.h
@@ -0,0 +1,69 @@
+/* linux/arch/arm/mach-s5p6442/include/mach/pwm-clock.h
+ *
+ * Copyright 2008 Simtec Electronics
+ *      Ben Dooks <ben@simtec.co.uk>
+ *      http://armlinux.simtec.co.uk/
+ *
+ * Copyright 2010 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * Based on arch/arm/plat-s3c24xx/include/mach/pwm-clock.h
+ *
+ * S5P6442 - pwm clock and timer support
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_ARCH_PWMCLK_H
+#define __ASM_ARCH_PWMCLK_H __FILE__
+
+/**
+ * pwm_cfg_src_is_tclk() - return whether the given mux config is a tclk
+ * @cfg: The timer TCFG1 register bits shifted down to 0.
+ *
+ * Return true if the given configuration from TCFG1 is a TCLK instead
+ * any of the TDIV clocks.
+ */
+static inline int pwm_cfg_src_is_tclk(unsigned long tcfg)
+{
+        return tcfg == S3C2410_TCFG1_MUX_TCLK;
+}
+
+/**
+ * tcfg_to_divisor() - convert tcfg1 setting to a divisor
+ * @tcfg1: The tcfg1 setting, shifted down.
+ *
+ * Get the divisor value for the given tcfg1 setting. We assume the
+ * caller has already checked to see if this is not a TCLK source.
+ */
+static inline unsigned long tcfg_to_divisor(unsigned long tcfg1)
+{
+        return 1 << (1 + tcfg1);
+}
+
+/**
+ * pwm_tdiv_has_div1() - does the tdiv setting have a /1
+ *
+ * Return true if we have a /1 in the tdiv setting.
+ */
+static inline unsigned int pwm_tdiv_has_div1(void)
+{
+        return 0;
+}
+
+/**
+ * pwm_tdiv_div_bits() - calculate TCFG1 divisor value.
+ * @div: The divisor to calculate the bit information for.
+ *
+ * Turn a divisor into the necessary bit field for TCFG1.
+ */
+static inline unsigned long pwm_tdiv_div_bits(unsigned int div)
+{
+        return ilog2(div) - 1;
+}
+
+#define S3C_TCFG1_MUX_TCLK S3C2410_TCFG1_MUX_TCLK
+
+#endif /* __ASM_ARCH_PWMCLK_H */
diff --git a/arch/arm/mach-s5p6442/include/mach/regs-clock.h b/arch/arm/mach-s5p6442/include/mach/regs-clock.h
new file mode 100644
index 000000000000..d8360b5d4ece
--- /dev/null
+++ b/arch/arm/mach-s5p6442/include/mach/regs-clock.h
@@ -0,0 +1,103 @@
+/* linux/arch/arm/mach-s5p6442/include/mach/regs-clock.h
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * S5P6442 - Clock register definitions
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_ARCH_REGS_CLOCK_H
+#define __ASM_ARCH_REGS_CLOCK_H __FILE__
+
+#include <mach/map.h>
+
+#define S5P_CLKREG(x)           (S3C_VA_SYS + (x))
+
+#define S5P_APLL_LOCK           S5P_CLKREG(0x00)
+#define S5P_MPLL_LOCK           S5P_CLKREG(0x08)
+#define S5P_EPLL_LOCK           S5P_CLKREG(0x10)
+#define S5P_VPLL_LOCK           S5P_CLKREG(0x20)
+
+#define S5P_APLL_CON            S5P_CLKREG(0x100)
+#define S5P_MPLL_CON            S5P_CLKREG(0x108)
+#define S5P_EPLL_CON            S5P_CLKREG(0x110)
+#define S5P_VPLL_CON            S5P_CLKREG(0x120)
+
+#define S5P_CLK_SRC0            S5P_CLKREG(0x200)
+#define S5P_CLK_SRC1            S5P_CLKREG(0x204)
+#define S5P_CLK_SRC2            S5P_CLKREG(0x208)
+#define S5P_CLK_SRC3            S5P_CLKREG(0x20C)
+#define S5P_CLK_SRC4            S5P_CLKREG(0x210)
+#define S5P_CLK_SRC5            S5P_CLKREG(0x214)
+#define S5P_CLK_SRC6            S5P_CLKREG(0x218)
+
+#define S5P_CLK_SRC_MASK0       S5P_CLKREG(0x280)
+#define S5P_CLK_SRC_MASK1       S5P_CLKREG(0x284)
+
+#define S5P_CLK_DIV0            S5P_CLKREG(0x300)
+#define S5P_CLK_DIV1            S5P_CLKREG(0x304)
+#define S5P_CLK_DIV2            S5P_CLKREG(0x308)
+#define S5P_CLK_DIV3            S5P_CLKREG(0x30C)
+#define S5P_CLK_DIV4            S5P_CLKREG(0x310)
+#define S5P_CLK_DIV5            S5P_CLKREG(0x314)
+#define S5P_CLK_DIV6            S5P_CLKREG(0x318)
+
+#define S5P_CLKGATE_IP3         S5P_CLKREG(0x46C)
+
+/* CLK_OUT */
+#define S5P_CLK_OUT_SHIFT       (12)
+#define S5P_CLK_OUT_MASK        (0x1F << S5P_CLK_OUT_SHIFT)
+#define S5P_CLK_OUT             S5P_CLKREG(0x500)
+
+#define S5P_CLK_DIV_STAT0       S5P_CLKREG(0x1000)
+#define S5P_CLK_DIV_STAT1       S5P_CLKREG(0x1004)
+
+#define S5P_CLK_MUX_STAT0       S5P_CLKREG(0x1100)
+#define S5P_CLK_MUX_STAT1       S5P_CLKREG(0x1104)
+
+#define S5P_MDNIE_SEL           S5P_CLKREG(0x7008)
+
+/* Register Bit definition */
+#define S5P_EPLL_EN                     (1<<31)
+#define S5P_EPLL_MASK                   0xffffffff
+#define S5P_EPLLVAL(_m, _p, _s)         ((_m) << 16 | ((_p) << 8) | ((_s)))
+
+/* CLKDIV0 */
+#define S5P_CLKDIV0_APLL_SHIFT          (0)
+#define S5P_CLKDIV0_APLL_MASK           (0x7 << S5P_CLKDIV0_APLL_SHIFT)
+#define S5P_CLKDIV0_A2M_SHIFT           (4)
+#define S5P_CLKDIV0_A2M_MASK            (0x7 << S5P_CLKDIV0_A2M_SHIFT)
+#define S5P_CLKDIV0_D0CLK_SHIFT         (16)
+#define S5P_CLKDIV0_D0CLK_MASK          (0xF << S5P_CLKDIV0_D0CLK_SHIFT)
+#define S5P_CLKDIV0_P0CLK_SHIFT         (20)
+#define S5P_CLKDIV0_P0CLK_MASK          (0x7 << S5P_CLKDIV0_P0CLK_SHIFT)
+#define S5P_CLKDIV0_D1CLK_SHIFT         (24)
+#define S5P_CLKDIV0_D1CLK_MASK          (0xF << S5P_CLKDIV0_D1CLK_SHIFT)
+#define S5P_CLKDIV0_P1CLK_SHIFT         (28)
+#define S5P_CLKDIV0_P1CLK_MASK          (0x7 << S5P_CLKDIV0_P1CLK_SHIFT)
+
+/* Clock MUX status Registers */
+#define S5P_CLK_MUX_STAT0_APLL_SHIFT    (0)
+#define S5P_CLK_MUX_STAT0_APLL_MASK     (0x7 << S5P_CLK_MUX_STAT0_APLL_SHIFT)
+#define S5P_CLK_MUX_STAT0_MPLL_SHIFT    (4)
+#define S5P_CLK_MUX_STAT0_MPLL_MASK     (0x7 << S5P_CLK_MUX_STAT0_MPLL_SHIFT)
+#define S5P_CLK_MUX_STAT0_EPLL_SHIFT    (8)
+#define S5P_CLK_MUX_STAT0_EPLL_MASK     (0x7 << S5P_CLK_MUX_STAT0_EPLL_SHIFT)
+#define S5P_CLK_MUX_STAT0_VPLL_SHIFT    (12)
+#define S5P_CLK_MUX_STAT0_VPLL_MASK     (0x7 << S5P_CLK_MUX_STAT0_VPLL_SHIFT)
+#define S5P_CLK_MUX_STAT0_MUXARM_SHIFT  (16)
+#define S5P_CLK_MUX_STAT0_MUXARM_MASK   (0x7 << S5P_CLK_MUX_STAT0_MUXARM_SHIFT)
+#define S5P_CLK_MUX_STAT0_MUXD0_SHIFT   (20)
+#define S5P_CLK_MUX_STAT0_MUXD0_MASK    (0x7 << S5P_CLK_MUX_STAT0_MUXD0_SHIFT)
+#define S5P_CLK_MUX_STAT0_MUXD1_SHIFT   (24)
+#define S5P_CLK_MUX_STAT0_MUXD1_MASK    (0x7 << S5P_CLK_MUX_STAT0_MUXD1_SHIFT)
+#define S5P_CLK_MUX_STAT1_D1SYNC_SHIFT  (24)
+#define S5P_CLK_MUX_STAT1_D1SYNC_MASK   (0x7 << S5P_CLK_MUX_STAT1_D1SYNC_SHIFT)
+#define S5P_CLK_MUX_STAT1_D0SYNC_SHIFT  (28)
+#define S5P_CLK_MUX_STAT1_D0SYNC_MASK   (0x7 << S5P_CLK_MUX_STAT1_D0SYNC_SHIFT)
+
+#endif /* __ASM_ARCH_REGS_CLOCK_H */
diff --git a/arch/arm/mach-s5p6442/include/mach/regs-irq.h b/arch/arm/mach-s5p6442/include/mach/regs-irq.h
new file mode 100644
index 000000000000..73782b52a83b
--- /dev/null
+++ b/arch/arm/mach-s5p6442/include/mach/regs-irq.h
@@ -0,0 +1,19 @@
+/* linux/arch/arm/mach-s5p6442/include/mach/regs-irq.h
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * S5P6442 - IRQ register definitions
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_ARCH_REGS_IRQ_H
+#define __ASM_ARCH_REGS_IRQ_H __FILE__
+
+#include <asm/hardware/vic.h>
+#include <mach/map.h>
+
+#endif /* __ASM_ARCH_REGS_IRQ_H */
diff --git a/arch/arm/mach-s5p6442/include/mach/system.h b/arch/arm/mach-s5p6442/include/mach/system.h
new file mode 100644
index 000000000000..8bcd8ed0c3c3
--- /dev/null
+++ b/arch/arm/mach-s5p6442/include/mach/system.h
@@ -0,0 +1,26 @@
+/* linux/arch/arm/mach-s5p6442/include/mach/system.h
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * S5P6442 - system support header
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_ARCH_SYSTEM_H
+#define __ASM_ARCH_SYSTEM_H __FILE__
+
+static void arch_idle(void)
+{
+        /* nothing here yet */
+}
+
+static void arch_reset(char mode, const char *cmd)
+{
+        /* nothing here yet */
+}
+
+#endif /* __ASM_ARCH_SYSTEM_H */
diff --git a/arch/arm/mach-s5p6442/include/mach/tick.h b/arch/arm/mach-s5p6442/include/mach/tick.h
new file mode 100644
index 000000000000..e1d4cabf8297
--- /dev/null
+++ b/arch/arm/mach-s5p6442/include/mach/tick.h
@@ -0,0 +1,26 @@
+/* linux/arch/arm/mach-s5p6442/include/mach/tick.h
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * Based on arch/arm/mach-s3c6400/include/mach/tick.h
+ *
+ * S5P6442 - Timer tick support definitions
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_ARCH_TICK_H
+#define __ASM_ARCH_TICK_H __FILE__
+
+static inline u32 s3c24xx_ostimer_pending(void)
+{
+        u32 pend = __raw_readl(VA_VIC0 + VIC_RAW_STATUS);
+        return pend & (1 << (IRQ_TIMER4_VIC - S5P_IRQ_VIC0(0)));
+}
+
+#define TICK_MAX        (0xffffffff)
+
+#endif /* __ASM_ARCH_TICK_H */
diff --git a/arch/arm/mach-s5p6442/include/mach/timex.h b/arch/arm/mach-s5p6442/include/mach/timex.h
new file mode 100644
index 000000000000..ff8f2fcadeb7
--- /dev/null
+++ b/arch/arm/mach-s5p6442/include/mach/timex.h
@@ -0,0 +1,24 @@
+/* arch/arm/mach-s5p6442/include/mach/timex.h
+ *
+ * Copyright (c) 2003-2010 Simtec Electronics
+ *      Ben Dooks <ben@simtec.co.uk>
+ *
+ * S5P6442 - time parameters
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_ARCH_TIMEX_H
+#define __ASM_ARCH_TIMEX_H
+
+/* CLOCK_TICK_RATE needs to be evaluatable by the cpp, so making it
+ * a variable is useless. It seems as long as we make our timers an
+ * exact multiple of HZ, any value that makes a 1->1 correspondence
+ * for the time conversion functions to/from jiffies is acceptable.
+*/
+
+#define CLOCK_TICK_RATE 12000000
+
+#endif /* __ASM_ARCH_TIMEX_H */
diff --git a/arch/arm/mach-s5p6442/include/mach/uncompress.h b/arch/arm/mach-s5p6442/include/mach/uncompress.h
new file mode 100644
index 000000000000..5ac7cbeeb987
--- /dev/null
+++ b/arch/arm/mach-s5p6442/include/mach/uncompress.h
@@ -0,0 +1,24 @@
+/* linux/arch/arm/mach-s5p6442/include/mach/uncompress.h
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * S5P6442 - uncompress code
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_ARCH_UNCOMPRESS_H
+#define __ASM_ARCH_UNCOMPRESS_H
+
+#include <mach/map.h>
+#include <plat/uncompress.h>
+
+static void arch_detect_cpu(void)
+{
+        /* we do not need to do any cpu detection here at the moment. */
+}
+
+#endif /* __ASM_ARCH_UNCOMPRESS_H */
diff --git a/arch/arm/mach-s5p6442/include/mach/vmalloc.h b/arch/arm/mach-s5p6442/include/mach/vmalloc.h
new file mode 100644
index 000000000000..be3333688c20
--- /dev/null
+++ b/arch/arm/mach-s5p6442/include/mach/vmalloc.h
@@ -0,0 +1,17 @@
+/* arch/arm/mach-s5p6442/include/mach/vmalloc.h
+ *
+ * Copyright 2010 Ben Dooks <ben-linux@fluff.org>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * S5P6442 vmalloc definition
+*/
+
+#ifndef __ASM_ARCH_VMALLOC_H
+#define __ASM_ARCH_VMALLOC_H
+
+#define VMALLOC_END       (0xE0000000)
+
+#endif /* __ASM_ARCH_VMALLOC_H */
diff --git a/arch/arm/mach-s5p6442/init.c b/arch/arm/mach-s5p6442/init.c
new file mode 100644
index 000000000000..1874bdb71e1d
--- /dev/null
+++ b/arch/arm/mach-s5p6442/init.c
@@ -0,0 +1,44 @@
+/* linux/arch/arm/mach-s5p6442/s5p6442-init.c
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <linux/init.h>
+#include <linux/serial_core.h>
+
+#include <plat/cpu.h>
+#include <plat/devs.h>
+#include <plat/s5p6442.h>
+#include <plat/regs-serial.h>
+
+static struct s3c24xx_uart_clksrc s5p6442_serial_clocks[] = {
+        [0] = {
+                .name           = "pclk",
+                .divisor        = 1,
+                .min_baud       = 0,
+                .max_baud       = 0,
+        },
+};
+
+/* uart registration process */
+void __init s5p6442_common_init_uarts(struct s3c2410_uartcfg *cfg, int no)
+{
+        struct s3c2410_uartcfg *tcfg = cfg;
+        u32 ucnt;
+
+        for (ucnt = 0; ucnt < no; ucnt++, tcfg++) {
+                if (!tcfg->clocks) {
+                        tcfg->clocks = s5p6442_serial_clocks;
+                        tcfg->clocks_size = ARRAY_SIZE(s5p6442_serial_clocks);
+                }
+        }
+
+        s3c24xx_init_uartdevs("s5pv210-uart", s5p_uart_resources, cfg, no);
+}
diff --git a/arch/arm/mach-s5p6442/mach-smdk6442.c b/arch/arm/mach-s5p6442/mach-smdk6442.c
new file mode 100644
index 000000000000..0d63371ce07c
--- /dev/null
+++ b/arch/arm/mach-s5p6442/mach-smdk6442.c
@@ -0,0 +1,91 @@
+/* linux/arch/arm/mach-s5p6442/mach-smdk6442.c
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <linux/init.h>
+#include <linux/serial_core.h>
+
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+#include <asm/setup.h>
+#include <asm/mach-types.h>
+
+#include <mach/map.h>
+#include <mach/regs-clock.h>
+
+#include <plat/regs-serial.h>
+#include <plat/s5p6442.h>
+#include <plat/devs.h>
+#include <plat/cpu.h>
+
+/* Following are default values for UCON, ULCON and UFCON UART registers */
+#define S5P6442_UCON_DEFAULT    (S3C2410_UCON_TXILEVEL |        \
+                                 S3C2410_UCON_RXILEVEL |        \
+                                 S3C2410_UCON_TXIRQMODE |       \
+                                 S3C2410_UCON_RXIRQMODE |       \
+                                 S3C2410_UCON_RXFIFO_TOI |      \
+                                 S3C2443_UCON_RXERR_IRQEN)
+
+#define S5P6442_ULCON_DEFAULT   S3C2410_LCON_CS8
+
+#define S5P6442_UFCON_DEFAULT   (S3C2410_UFCON_FIFOMODE |       \
+                                 S5PV210_UFCON_TXTRIG4 |        \
+                                 S5PV210_UFCON_RXTRIG4)
+
+static struct s3c2410_uartcfg smdk6442_uartcfgs[] __initdata = {
+        [0] = {
+                .hwport         = 0,
+                .flags          = 0,
+                .ucon           = S5P6442_UCON_DEFAULT,
+                .ulcon          = S5P6442_ULCON_DEFAULT,
+                .ufcon          = S5P6442_UFCON_DEFAULT,
+        },
+        [1] = {
+                .hwport         = 1,
+                .flags          = 0,
+                .ucon           = S5P6442_UCON_DEFAULT,
+                .ulcon          = S5P6442_ULCON_DEFAULT,
+                .ufcon          = S5P6442_UFCON_DEFAULT,
+        },
+        [2] = {
+                .hwport         = 2,
+                .flags          = 0,
+                .ucon           = S5P6442_UCON_DEFAULT,
+                .ulcon          = S5P6442_ULCON_DEFAULT,
+                .ufcon          = S5P6442_UFCON_DEFAULT,
+        },
+};
+
+static struct platform_device *smdk6442_devices[] __initdata = {
+};
+
+static void __init smdk6442_map_io(void)
+{
+        s5p_init_io(NULL, 0, S5P_VA_CHIPID);
+        s3c24xx_init_clocks(12000000);
+        s3c24xx_init_uarts(smdk6442_uartcfgs, ARRAY_SIZE(smdk6442_uartcfgs));
+}
+
+static void __init smdk6442_machine_init(void)
+{
+        platform_add_devices(smdk6442_devices, ARRAY_SIZE(smdk6442_devices));
+}
+
+MACHINE_START(SMDK6442, "SMDK6442")
+        /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
+        .phys_io        = S3C_PA_UART & 0xfff00000,
+        .io_pg_offst    = (((u32)S3C_VA_UART) >> 18) & 0xfffc,
+        .boot_params    = S5P_PA_SDRAM + 0x100,
+        .init_irq       = s5p6442_init_irq,
+        .map_io         = smdk6442_map_io,
+        .init_machine   = smdk6442_machine_init,
+        .timer          = &s3c24xx_timer,
+MACHINE_END
diff --git a/arch/arm/mach-s5pc100/include/mach/gpio-core.h b/arch/arm/mach-s5pc100/include/mach/gpio-core.h
deleted file mode 100644
index ad28d8ec8a78..000000000000
--- a/arch/arm/mach-s5pc100/include/mach/gpio-core.h
+++ /dev/null
@@ -1,21 +0,0 @@
-/* arch/arm/mach-s5pc100/include/mach/gpio-core.h
- *
- * Copyright 2009 Samsung Electronics Co.
- *      Byungho Min <bhmin@samsung.com>
- *
- * S5PC100 - GPIO core support
- *
- * Based on mach-s3c6400/include/mach/gpio-core.h
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-#ifndef __ASM_ARCH_GPIO_CORE_H
-#define __ASM_ARCH_GPIO_CORE_H __FILE__
-
-/* currently we just include the platform support */
-#include <plat/gpio-core.h>
-
-#endif /* __ASM_ARCH_GPIO_CORE_H */
diff --git a/arch/arm/mach-s5pc100/include/mach/io.h b/arch/arm/mach-s5pc100/include/mach/io.h
new file mode 100644
index 000000000000..819acf5eaf89
--- /dev/null
+++ b/arch/arm/mach-s5pc100/include/mach/io.h
@@ -0,0 +1,18 @@
+/* arch/arm/mach-s5pc100/include/mach/io.h
+ *
+ * Copyright 2008 Simtec Electronics
+ *      Ben Dooks <ben-linux@fluff.org>
+ *
+ * Default IO routines for S5PC100 systems
+ */
+
+#ifndef __ASM_ARM_ARCH_IO_H
+#define __ASM_ARM_ARCH_IO_H
+
+/* No current ISA/PCI bus support. */
+#define __io(a)         __typesafe_io(a)
+#define __mem_pci(a)    (a)
+
+#define IO_SPACE_LIMIT (0xFFFFFFFF)
+
+#endif
diff --git a/arch/arm/mach-s5pc100/include/mach/tick.h b/arch/arm/mach-s5pc100/include/mach/tick.h
index d3de0f3591ae..f338c9eec717 100644
--- a/arch/arm/mach-s5pc100/include/mach/tick.h
+++ b/arch/arm/mach-s5pc100/include/mach/tick.h
@@ -21,7 +21,7 @@
 static inline u32 s3c24xx_ostimer_pending(void)
 {
         u32 pend = __raw_readl(S3C_VA_VIC0 + VIC_RAW_STATUS);
-        return pend & 1 << (IRQ_TIMER4 - S5PC1XX_IRQ_VIC0(0));
+        return pend & 1 << (IRQ_TIMER4_VIC - S5PC1XX_IRQ_VIC0(0));
 }
 
 #define TICK_MAX        (0xffffffff)
diff --git a/arch/arm/mach-s5pc100/include/mach/timex.h b/arch/arm/mach-s5pc100/include/mach/timex.h
new file mode 100644
index 000000000000..47ffb17aff96
--- /dev/null
+++ b/arch/arm/mach-s5pc100/include/mach/timex.h
@@ -0,0 +1,24 @@
+/* arch/arm/mach-s5pc100/include/mach/timex.h
+ *
+ * Copyright (c) 2003-2005 Simtec Electronics
+ *      Ben Dooks <ben@simtec.co.uk>
+ *
+ * S3C6400 - time parameters
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_ARCH_TIMEX_H
+#define __ASM_ARCH_TIMEX_H
+
+/* CLOCK_TICK_RATE needs to be evaluatable by the cpp, so making it
+ * a variable is useless. It seems as long as we make our timers an
+ * exact multiple of HZ, any value that makes a 1->1 correspondence
+ * for the time conversion functions to/from jiffies is acceptable.
+*/
+
+#define CLOCK_TICK_RATE 12000000
+
+#endif /* __ASM_ARCH_TIMEX_H */
diff --git a/arch/arm/mach-s5pc100/include/mach/vmalloc.h b/arch/arm/mach-s5pc100/include/mach/vmalloc.h
new file mode 100644
index 000000000000..be9df79903ed
--- /dev/null
+++ b/arch/arm/mach-s5pc100/include/mach/vmalloc.h
@@ -0,0 +1,17 @@
+/* arch/arm/mach-s5pc100/include/mach/vmalloc.h
+ *
+ * Copyright 2010 Ben Dooks <ben-linux@fluff.org>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * S3C6400 vmalloc definition
+*/
+
+#ifndef __ASM_ARCH_VMALLOC_H
+#define __ASM_ARCH_VMALLOC_H
+
+#define VMALLOC_END       (0xe0000000UL)
+
+#endif /* __ASM_ARCH_VMALLOC_H */
diff --git a/arch/arm/mach-s5pc100/setup-sdhci.c b/arch/arm/mach-s5pc100/setup-sdhci.c
index 4385986a3da0..ea7ff19adb95 100644
--- a/arch/arm/mach-s5pc100/setup-sdhci.c
+++ b/arch/arm/mach-s5pc100/setup-sdhci.c
@@ -28,8 +28,8 @@
 char *s5pc100_hsmmc_clksrcs[4] = {
         [0] = "hsmmc",
         [1] = "hsmmc",
-        /* [2] = "mmc_bus", not yet succesfuuly used yet */
-        /* [3] = "48m", - note not succesfully used yet */
+        /* [2] = "mmc_bus", not yet successfully used yet */
+        /* [3] = "48m", - note not successfully used yet */
 };
 
 
diff --git a/arch/arm/mach-s5pv210/Kconfig b/arch/arm/mach-s5pv210/Kconfig
new file mode 100644
index 000000000000..af33a1a89b72
--- /dev/null
+++ b/arch/arm/mach-s5pv210/Kconfig
@@ -0,0 +1,40 @@
+# arch/arm/mach-s5pv210/Kconfig
+#
+# Copyright (c) 2010 Samsung Electronics Co., Ltd.
+#               http://www.samsung.com/
+#
+# Licensed under GPLv2
+
+# Configuration options for the S5PV210/S5PC110
+
+if ARCH_S5PV210
+
+config CPU_S5PV210
+        bool
+        select PLAT_S5P
+        help
+          Enable S5PV210 CPU support
+
+choice
+        prompt "Select machine type"
+        depends on ARCH_S5PV210
+        default MACH_SMDKV210
+
+config MACH_SMDKV210
+        bool "SMDKV210"
+        select CPU_S5PV210
+        select ARCH_SPARSEMEM_ENABLE
+        help
+          Machine support for Samsung SMDKV210
+
+config MACH_SMDKC110
+        bool "SMDKC110"
+        select CPU_S5PV210
+        select ARCH_SPARSEMEM_ENABLE
+        help
+          Machine support for Samsung SMDKC110
+          S5PC110(MCP) is one of package option of S5PV210
+
+endchoice
+
+endif
diff --git a/arch/arm/mach-s5pv210/Makefile b/arch/arm/mach-s5pv210/Makefile
new file mode 100644
index 000000000000..8ebf51c52a01
--- /dev/null
+++ b/arch/arm/mach-s5pv210/Makefile
@@ -0,0 +1,20 @@
+# arch/arm/mach-s5pv210/Makefile
+#
+# Copyright (c) 2010 Samsung Electronics Co., Ltd.
+#               http://www.samsung.com/
+#
+# Licensed under GPLv2
+
+obj-y                           :=
+obj-m                           :=
+obj-n                           :=
+obj-                            :=
+
+# Core support for S5PV210 system
+
+obj-$(CONFIG_CPU_S5PV210)       += cpu.o init.o clock.o
+
+# machine support
+
+obj-$(CONFIG_MACH_SMDKV210)     += mach-smdkv210.o
+obj-$(CONFIG_MACH_SMDKC110)     += mach-smdkc110.o
diff --git a/arch/arm/mach-s5pv210/Makefile.boot b/arch/arm/mach-s5pv210/Makefile.boot
new file mode 100644
index 000000000000..ff90aa13bd67
--- /dev/null
+++ b/arch/arm/mach-s5pv210/Makefile.boot
@@ -0,0 +1,2 @@
+   zreladdr-y   := 0x20008000
+params_phys-y   := 0x20000100
diff --git a/arch/arm/mach-s5pv210/clock.c b/arch/arm/mach-s5pv210/clock.c
new file mode 100644
index 000000000000..ccccae262351
--- /dev/null
+++ b/arch/arm/mach-s5pv210/clock.c
@@ -0,0 +1,454 @@
+/* linux/arch/arm/mach-s5pv210/clock.c
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * S5PV210 - Clock support
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/list.h>
+#include <linux/errno.h>
+#include <linux/err.h>
+#include <linux/clk.h>
+#include <linux/sysdev.h>
+#include <linux/io.h>
+
+#include <mach/map.h>
+
+#include <plat/cpu-freq.h>
+#include <mach/regs-clock.h>
+#include <plat/clock.h>
+#include <plat/cpu.h>
+#include <plat/pll.h>
+#include <plat/s5p-clock.h>
+#include <plat/clock-clksrc.h>
+#include <plat/s5pv210.h>
+
+static int s5pv210_clk_ip0_ctrl(struct clk *clk, int enable)
+{
+        return s5p_gatectrl(S5P_CLKGATE_IP0, clk, enable);
+}
+
+static int s5pv210_clk_ip1_ctrl(struct clk *clk, int enable)
+{
+        return s5p_gatectrl(S5P_CLKGATE_IP1, clk, enable);
+}
+
+static int s5pv210_clk_ip2_ctrl(struct clk *clk, int enable)
+{
+        return s5p_gatectrl(S5P_CLKGATE_IP2, clk, enable);
+}
+
+static int s5pv210_clk_ip3_ctrl(struct clk *clk, int enable)
+{
+        return s5p_gatectrl(S5P_CLKGATE_IP3, clk, enable);
+}
+
+static struct clk clk_h200 = {
+        .name           = "hclk200",
+        .id             = -1,
+};
+
+static struct clk clk_h100 = {
+        .name           = "hclk100",
+        .id             = -1,
+};
+
+static struct clk clk_h166 = {
+        .name           = "hclk166",
+        .id             = -1,
+};
+
+static struct clk clk_h133 = {
+        .name           = "hclk133",
+        .id             = -1,
+};
+
+static struct clk clk_p100 = {
+        .name           = "pclk100",
+        .id             = -1,
+};
+
+static struct clk clk_p83 = {
+        .name           = "pclk83",
+        .id             = -1,
+};
+
+static struct clk clk_p66 = {
+        .name           = "pclk66",
+        .id             = -1,
+};
+
+static struct clk *sys_clks[] = {
+        &clk_h200,
+        &clk_h100,
+        &clk_h166,
+        &clk_h133,
+        &clk_p100,
+        &clk_p83,
+        &clk_p66
+};
+
+static struct clk init_clocks_disable[] = {
+        {
+                .name           = "rot",
+                .id             = -1,
+                .parent         = &clk_h166,
+                .enable         = s5pv210_clk_ip0_ctrl,
+                .ctrlbit        = (1<<29),
+        }, {
+                .name           = "otg",
+                .id             = -1,
+                .parent         = &clk_h133,
+                .enable         = s5pv210_clk_ip1_ctrl,
+                .ctrlbit        = (1<<16),
+        }, {
+                .name           = "usb-host",
+                .id             = -1,
+                .parent         = &clk_h133,
+                .enable         = s5pv210_clk_ip1_ctrl,
+                .ctrlbit        = (1<<17),
+        }, {
+                .name           = "lcd",
+                .id             = -1,
+                .parent         = &clk_h166,
+                .enable         = s5pv210_clk_ip1_ctrl,
+                .ctrlbit        = (1<<0),
+        }, {
+                .name           = "cfcon",
+                .id             = 0,
+                .parent         = &clk_h133,
+                .enable         = s5pv210_clk_ip1_ctrl,
+                .ctrlbit        = (1<<25),
+        }, {
+                .name           = "hsmmc",
+                .id             = 0,
+                .parent         = &clk_h133,
+                .enable         = s5pv210_clk_ip2_ctrl,
+                .ctrlbit        = (1<<16),
+        }, {
+                .name           = "hsmmc",
+                .id             = 1,
+                .parent         = &clk_h133,
+                .enable         = s5pv210_clk_ip2_ctrl,
+                .ctrlbit        = (1<<17),
+        }, {
+                .name           = "hsmmc",
+                .id             = 2,
+                .parent         = &clk_h133,
+                .enable         = s5pv210_clk_ip2_ctrl,
+                .ctrlbit        = (1<<18),
+        }, {
+                .name           = "hsmmc",
+                .id             = 3,
+                .parent         = &clk_h133,
+                .enable         = s5pv210_clk_ip2_ctrl,
+                .ctrlbit        = (1<<19),
+        }, {
+                .name           = "systimer",
+                .id             = -1,
+                .parent         = &clk_p66,
+                .enable         = s5pv210_clk_ip3_ctrl,
+                .ctrlbit        = (1<<16),
+        }, {
+                .name           = "watchdog",
+                .id             = -1,
+                .parent         = &clk_p66,
+                .enable         = s5pv210_clk_ip3_ctrl,
+                .ctrlbit        = (1<<22),
+        }, {
+                .name           = "rtc",
+                .id             = -1,
+                .parent         = &clk_p66,
+                .enable         = s5pv210_clk_ip3_ctrl,
+                .ctrlbit        = (1<<15),
+        }, {
+                .name           = "i2c",
+                .id             = 0,
+                .parent         = &clk_p66,
+                .enable         = s5pv210_clk_ip3_ctrl,
+                .ctrlbit        = (1<<7),
+        }, {
+                .name           = "i2c",
+                .id             = 1,
+                .parent         = &clk_p66,
+                .enable         = s5pv210_clk_ip3_ctrl,
+                .ctrlbit        = (1<<8),
+        }, {
+                .name           = "i2c",
+                .id             = 2,
+                .parent         = &clk_p66,
+                .enable         = s5pv210_clk_ip3_ctrl,
+                .ctrlbit        = (1<<9),
+        }, {
+                .name           = "spi",
+                .id             = 0,
+                .parent         = &clk_p66,
+                .enable         = s5pv210_clk_ip3_ctrl,
+                .ctrlbit        = (1<<12),
+        }, {
+                .name           = "spi",
+                .id             = 1,
+                .parent         = &clk_p66,
+                .enable         = s5pv210_clk_ip3_ctrl,
+                .ctrlbit        = (1<<13),
+        }, {
+                .name           = "spi",
+                .id             = 2,
+                .parent         = &clk_p66,
+                .enable         = s5pv210_clk_ip3_ctrl,
+                .ctrlbit        = (1<<14),
+        }, {
+                .name           = "timers",
+                .id             = -1,
+                .parent         = &clk_p66,
+                .enable         = s5pv210_clk_ip3_ctrl,
+                .ctrlbit        = (1<<23),
+        }, {
+                .name           = "adc",
+                .id             = -1,
+                .parent         = &clk_p66,
+                .enable         = s5pv210_clk_ip3_ctrl,
+                .ctrlbit        = (1<<24),
+        }, {
+                .name           = "keypad",
+                .id             = -1,
+                .parent         = &clk_p66,
+                .enable         = s5pv210_clk_ip3_ctrl,
+                .ctrlbit        = (1<<21),
+        }, {
+                .name           = "i2s_v50",
+                .id             = 0,
+                .parent         = &clk_p,
+                .enable         = s5pv210_clk_ip3_ctrl,
+                .ctrlbit        = (1<<4),
+        }, {
+                .name           = "i2s_v32",
+                .id             = 0,
+                .parent         = &clk_p,
+                .enable         = s5pv210_clk_ip3_ctrl,
+                .ctrlbit        = (1<<4),
+        }, {
+                .name           = "i2s_v32",
+                .id             = 1,
+                .parent         = &clk_p,
+                .enable         = s5pv210_clk_ip3_ctrl,
+                .ctrlbit        = (1<<4),
+        }
+};
+
+static struct clk init_clocks[] = {
+        {
+                .name           = "uart",
+                .id             = 0,
+                .parent         = &clk_p66,
+                .enable         = s5pv210_clk_ip3_ctrl,
+                .ctrlbit        = (1<<7),
+        }, {
+                .name           = "uart",
+                .id             = 1,
+                .parent         = &clk_p66,
+                .enable         = s5pv210_clk_ip3_ctrl,
+                .ctrlbit        = (1<<8),
+        }, {
+                .name           = "uart",
+                .id             = 2,
+                .parent         = &clk_p66,
+                .enable         = s5pv210_clk_ip3_ctrl,
+                .ctrlbit        = (1<<9),
+        }, {
+                .name           = "uart",
+                .id             = 3,
+                .parent         = &clk_p66,
+                .enable         = s5pv210_clk_ip3_ctrl,
+                .ctrlbit        = (1<<10),
+        },
+};
+
+static struct clksrc_clk clk_mout_apll = {
+        .clk    = {
+                .name           = "mout_apll",
+                .id             = -1,
+        },
+        .sources        = &clk_src_apll,
+        .reg_src        = { .reg = S5P_CLK_SRC0, .shift = 0, .size = 1 },
+};
+
+static struct clksrc_clk clk_mout_epll = {
+        .clk    = {
+                .name           = "mout_epll",
+                .id             = -1,
+        },
+        .sources        = &clk_src_epll,
+        .reg_src        = { .reg = S5P_CLK_SRC0, .shift = 8, .size = 1 },
+};
+
+static struct clksrc_clk clk_mout_mpll = {
+        .clk = {
+                .name           = "mout_mpll",
+                .id             = -1,
+        },
+        .sources        = &clk_src_mpll,
+        .reg_src        = { .reg = S5P_CLK_SRC0, .shift = 4, .size = 1 },
+};
+
+static struct clk *clkset_uart_list[] = {
+        [6] = &clk_mout_mpll.clk,
+        [7] = &clk_mout_epll.clk,
+};
+
+static struct clksrc_sources clkset_uart = {
+        .sources        = clkset_uart_list,
+        .nr_sources     = ARRAY_SIZE(clkset_uart_list),
+};
+
+static struct clksrc_clk clksrcs[] = {
+        {
+                .clk    = {
+                        .name           = "uclk1",
+                        .id             = -1,
+                        .ctrlbit        = (1<<17),
+                        .enable         = s5pv210_clk_ip3_ctrl,
+                },
+                .sources = &clkset_uart,
+                .reg_src = { .reg = S5P_CLK_SRC4, .shift = 16, .size = 4 },
+                .reg_div = { .reg = S5P_CLK_DIV4, .shift = 16, .size = 4 },
+        }
+};
+
+/* Clock initialisation code */
+static struct clksrc_clk *init_parents[] = {
+        &clk_mout_apll,
+        &clk_mout_epll,
+        &clk_mout_mpll,
+};
+
+#define GET_DIV(clk, field) ((((clk) & field##_MASK) >> field##_SHIFT) + 1)
+
+void __init_or_cpufreq s5pv210_setup_clocks(void)
+{
+        struct clk *xtal_clk;
+        unsigned long xtal;
+        unsigned long armclk;
+        unsigned long hclk200;
+        unsigned long hclk166;
+        unsigned long hclk133;
+        unsigned long pclk100;
+        unsigned long pclk83;
+        unsigned long pclk66;
+        unsigned long apll;
+        unsigned long mpll;
+        unsigned long epll;
+        unsigned int ptr;
+        u32 clkdiv0, clkdiv1;
+
+        printk(KERN_DEBUG "%s: registering clocks\n", __func__);
+
+        clkdiv0 = __raw_readl(S5P_CLK_DIV0);
+        clkdiv1 = __raw_readl(S5P_CLK_DIV1);
+
+        printk(KERN_DEBUG "%s: clkdiv0 = %08x, clkdiv1 = %08x\n",
+                                __func__, clkdiv0, clkdiv1);
+
+        xtal_clk = clk_get(NULL, "xtal");
+        BUG_ON(IS_ERR(xtal_clk));
+
+        xtal = clk_get_rate(xtal_clk);
+        clk_put(xtal_clk);
+
+        printk(KERN_DEBUG "%s: xtal is %ld\n", __func__, xtal);
+
+        apll = s5p_get_pll45xx(xtal, __raw_readl(S5P_APLL_CON), pll_4508);
+        mpll = s5p_get_pll45xx(xtal, __raw_readl(S5P_MPLL_CON), pll_4502);
+        epll = s5p_get_pll45xx(xtal, __raw_readl(S5P_EPLL_CON), pll_4500);
+
+        printk(KERN_INFO "S5PV210: PLL settings, A=%ld, M=%ld, E=%ld",
+                        apll, mpll, epll);
+
+        armclk = apll / GET_DIV(clkdiv0, S5P_CLKDIV0_APLL);
+        if (__raw_readl(S5P_CLK_SRC0) & S5P_CLKSRC0_MUX200_MASK)
+                hclk200 = mpll / GET_DIV(clkdiv0, S5P_CLKDIV0_HCLK200);
+        else
+                hclk200 = armclk / GET_DIV(clkdiv0, S5P_CLKDIV0_HCLK200);
+
+        if (__raw_readl(S5P_CLK_SRC0) & S5P_CLKSRC0_MUX166_MASK) {
+                hclk166 = apll / GET_DIV(clkdiv0, S5P_CLKDIV0_A2M);
+                hclk166 = hclk166 / GET_DIV(clkdiv0, S5P_CLKDIV0_HCLK166);
+        } else
+                hclk166 = mpll / GET_DIV(clkdiv0, S5P_CLKDIV0_HCLK166);
+
+        if (__raw_readl(S5P_CLK_SRC0) & S5P_CLKSRC0_MUX133_MASK) {
+                hclk133 = apll / GET_DIV(clkdiv0, S5P_CLKDIV0_A2M);
+                hclk133 = hclk133 / GET_DIV(clkdiv0, S5P_CLKDIV0_HCLK133);
+        } else
+                hclk133 = mpll / GET_DIV(clkdiv0, S5P_CLKDIV0_HCLK133);
+
+        pclk100 = hclk200 / GET_DIV(clkdiv0, S5P_CLKDIV0_PCLK100);
+        pclk83 = hclk166 / GET_DIV(clkdiv0, S5P_CLKDIV0_PCLK83);
+        pclk66 = hclk133 / GET_DIV(clkdiv0, S5P_CLKDIV0_PCLK66);
+
+        printk(KERN_INFO "S5PV210: ARMCLK=%ld, HCLKM=%ld, HCLKD=%ld, \
+                        HCLKP=%ld, PCLKM=%ld, PCLKD=%ld, PCLKP=%ld\n",
+               armclk, hclk200, hclk166, hclk133, pclk100, pclk83, pclk66);
+
+        clk_fout_apll.rate = apll;
+        clk_fout_mpll.rate = mpll;
+        clk_fout_epll.rate = epll;
+
+        clk_f.rate = armclk;
+        clk_h.rate = hclk133;
+        clk_p.rate = pclk66;
+        clk_p66.rate = pclk66;
+        clk_p83.rate = pclk83;
+        clk_h133.rate = hclk133;
+        clk_h166.rate = hclk166;
+        clk_h200.rate = hclk200;
+
+        for (ptr = 0; ptr < ARRAY_SIZE(init_parents); ptr++)
+                s3c_set_clksrc(init_parents[ptr], true);
+
+        for (ptr = 0; ptr < ARRAY_SIZE(clksrcs); ptr++)
+                s3c_set_clksrc(&clksrcs[ptr], true);
+}
+
+static struct clk *clks[] __initdata = {
+        &clk_mout_epll.clk,
+        &clk_mout_mpll.clk,
+};
+
+void __init s5pv210_register_clocks(void)
+{
+        struct clk *clkp;
+        int ret;
+        int ptr;
+
+        ret = s3c24xx_register_clocks(clks, ARRAY_SIZE(clks));
+        if (ret > 0)
+                printk(KERN_ERR "Failed to register %u clocks\n", ret);
+
+        s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs));
+        s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks));
+
+        ret = s3c24xx_register_clocks(sys_clks, ARRAY_SIZE(sys_clks));
+        if (ret > 0)
+                printk(KERN_ERR "Failed to register system clocks\n");
+
+        clkp = init_clocks_disable;
+        for (ptr = 0; ptr < ARRAY_SIZE(init_clocks_disable); ptr++, clkp++) {
+                ret = s3c24xx_register_clock(clkp);
+                if (ret < 0) {
+                        printk(KERN_ERR "Failed to register clock %s (%d)\n",
+                               clkp->name, ret);
+                }
+                (clkp->enable)(clkp, 0);
+        }
+
+        s3c_pwmclk_init();
+}
diff --git a/arch/arm/mach-s5pv210/cpu.c b/arch/arm/mach-s5pv210/cpu.c
new file mode 100644
index 000000000000..0e0f8fde2aa6
--- /dev/null
+++ b/arch/arm/mach-s5pv210/cpu.c
@@ -0,0 +1,126 @@
+/* linux/arch/arm/mach-s5pv210/cpu.c
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <linux/interrupt.h>
+#include <linux/list.h>
+#include <linux/timer.h>
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/clk.h>
+#include <linux/io.h>
+#include <linux/sysdev.h>
+#include <linux/platform_device.h>
+
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+#include <asm/mach/irq.h>
+
+#include <asm/proc-fns.h>
+#include <mach/map.h>
+#include <mach/regs-clock.h>
+
+#include <plat/cpu.h>
+#include <plat/devs.h>
+#include <plat/clock.h>
+#include <plat/s5pv210.h>
+
+/* Initial IO mappings */
+
+static struct map_desc s5pv210_iodesc[] __initdata = {
+        {
+                .virtual        = (unsigned long)S5P_VA_SYSTIMER,
+                .pfn            = __phys_to_pfn(S5PV210_PA_SYSTIMER),
+                .length         = SZ_1M,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = (unsigned long)VA_VIC2,
+                .pfn            = __phys_to_pfn(S5PV210_PA_VIC2),
+                .length         = SZ_16K,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = (unsigned long)VA_VIC3,
+                .pfn            = __phys_to_pfn(S5PV210_PA_VIC3),
+                .length         = SZ_16K,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = (unsigned long)S5P_VA_SROMC,
+                .pfn            = __phys_to_pfn(S5PV210_PA_SROMC),
+                .length         = SZ_4K,
+                .type           = MT_DEVICE,
+        }
+};
+
+static void s5pv210_idle(void)
+{
+        if (!need_resched())
+                cpu_do_idle();
+
+        local_irq_enable();
+}
+
+/* s5pv210_map_io
+ *
+ * register the standard cpu IO areas
+*/
+
+void __init s5pv210_map_io(void)
+{
+        iotable_init(s5pv210_iodesc, ARRAY_SIZE(s5pv210_iodesc));
+}
+
+void __init s5pv210_init_clocks(int xtal)
+{
+        printk(KERN_DEBUG "%s: initializing clocks\n", __func__);
+
+        s3c24xx_register_baseclocks(xtal);
+        s5p_register_clocks(xtal);
+        s5pv210_register_clocks();
+        s5pv210_setup_clocks();
+}
+
+void __init s5pv210_init_irq(void)
+{
+        u32 vic[4];     /* S5PV210 supports 4 VIC */
+
+        /* All the VICs are fully populated. */
+        vic[0] = ~0;
+        vic[1] = ~0;
+        vic[2] = ~0;
+        vic[3] = ~0;
+
+        s5p_init_irq(vic, ARRAY_SIZE(vic));
+}
+
+static struct sysdev_class s5pv210_sysclass = {
+        .name   = "s5pv210-core",
+};
+
+static struct sys_device s5pv210_sysdev = {
+        .cls    = &s5pv210_sysclass,
+};
+
+static int __init s5pv210_core_init(void)
+{
+        return sysdev_class_register(&s5pv210_sysclass);
+}
+
+core_initcall(s5pv210_core_init);
+
+int __init s5pv210_init(void)
+{
+        printk(KERN_INFO "S5PV210: Initializing architecture\n");
+
+        /* set idle function */
+        pm_idle = s5pv210_idle;
+
+        return sysdev_register(&s5pv210_sysdev);
+}
diff --git a/arch/arm/mach-s5pv210/include/mach/debug-macro.S b/arch/arm/mach-s5pv210/include/mach/debug-macro.S
new file mode 100644
index 000000000000..7872f5c3dfc2
--- /dev/null
+++ b/arch/arm/mach-s5pv210/include/mach/debug-macro.S
@@ -0,0 +1,42 @@
+/* linux/arch/arm/mach-s5pv210/include/mach/debug-macro.S
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * Based on arch/arm/mach-s3c6400/include/mach/debug-macro.S
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+/* pull in the relevant register and map files. */
+
+#include <mach/map.h>
+#include <plat/regs-serial.h>
+
+        /* note, for the boot process to work we have to keep the UART
+         * virtual address aligned to an 1MiB boundary for the L1
+         * mapping the head code makes. We keep the UART virtual address
+         * aligned and add in the offset when we load the value here.
+         */
+
+        .macro addruart, rx, tmp
+                mrc     p15, 0, \rx, c1, c0
+                tst     \rx, #1
+                ldreq   \rx, = S3C_PA_UART
+                ldrne   \rx, = S3C_VA_UART
+#if CONFIG_DEBUG_S3C_UART != 0
+                add     \rx, \rx, #(0x400 * CONFIG_DEBUG_S3C_UART)
+#endif
+        .endm
+
+#define fifo_full fifo_full_s5pv210
+#define fifo_level fifo_level_s5pv210
+
+/* include the reset of the code which will do the work, we're only
+ * compiling for a single cpu processor type so the default of s3c2440
+ * will be fine with us.
+ */
+
+#include <plat/debug-macro.S>
diff --git a/arch/arm/mach-s5pv210/include/mach/entry-macro.S b/arch/arm/mach-s5pv210/include/mach/entry-macro.S
new file mode 100644
index 000000000000..3aa41ac59f07
--- /dev/null
+++ b/arch/arm/mach-s5pv210/include/mach/entry-macro.S
@@ -0,0 +1,54 @@
+/* linux/arch/arm/mach-s5pv210/include/mach/entry-macro.S
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * Low-level IRQ helper macros for the Samsung S5PV210
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include <asm/hardware/vic.h>
+#include <mach/map.h>
+#include <plat/irqs.h>
+
+        .macro  disable_fiq
+        .endm
+
+        .macro  get_irqnr_preamble, base, tmp
+        ldr     \base, =VA_VIC0
+        .endm
+
+        .macro  arch_ret_to_user, tmp1, tmp2
+        .endm
+
+        .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
+
+        @ check the vic0
+        mov     \irqnr, # S5P_IRQ_OFFSET + 31
+        ldr     \irqstat, [ \base, # VIC_IRQ_STATUS ]
+        teq     \irqstat, #0
+
+        @ otherwise try vic1
+        addeq   \tmp, \base, #(VA_VIC1 - VA_VIC0)
+        addeq   \irqnr, \irqnr, #32
+        ldreq   \irqstat, [ \tmp, # VIC_IRQ_STATUS ]
+        teqeq   \irqstat, #0
+
+        @ otherwise try vic2
+        addeq   \tmp, \base, #(VA_VIC2 - VA_VIC0)
+        addeq   \irqnr, \irqnr, #32
+        ldreq   \irqstat, [ \tmp, # VIC_IRQ_STATUS ]
+        teqeq   \irqstat, #0
+
+        @ otherwise try vic3
+        addeq   \tmp, \base, #(VA_VIC3 - VA_VIC0)
+        addeq   \irqnr, \irqnr, #32
+        ldreq   \irqstat, [ \tmp, # VIC_IRQ_STATUS ]
+        teqeq   \irqstat, #0
+
+        clzne   \irqstat, \irqstat
+        subne   \irqnr, \irqnr, \irqstat
+        .endm
diff --git a/arch/arm/mach-s5pv210/include/mach/gpio.h b/arch/arm/mach-s5pv210/include/mach/gpio.h
new file mode 100644
index 000000000000..533b020e21e9
--- /dev/null
+++ b/arch/arm/mach-s5pv210/include/mach/gpio.h
@@ -0,0 +1,129 @@
+/* linux/arch/arm/mach-s5pv210/include/mach/gpio.h
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * S5PV210 - GPIO lib support
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_ARCH_GPIO_H
+#define __ASM_ARCH_GPIO_H __FILE__
+
+#define gpio_get_value  __gpio_get_value
+#define gpio_set_value  __gpio_set_value
+#define gpio_cansleep   __gpio_cansleep
+#define gpio_to_irq     __gpio_to_irq
+
+/* GPIO bank sizes */
+#define S5PV210_GPIO_A0_NR      (8)
+#define S5PV210_GPIO_A1_NR      (4)
+#define S5PV210_GPIO_B_NR       (8)
+#define S5PV210_GPIO_C0_NR      (5)
+#define S5PV210_GPIO_C1_NR      (5)
+#define S5PV210_GPIO_D0_NR      (4)
+#define S5PV210_GPIO_D1_NR      (6)
+#define S5PV210_GPIO_E0_NR      (8)
+#define S5PV210_GPIO_E1_NR      (5)
+#define S5PV210_GPIO_F0_NR      (8)
+#define S5PV210_GPIO_F1_NR      (8)
+#define S5PV210_GPIO_F2_NR      (8)
+#define S5PV210_GPIO_F3_NR      (6)
+#define S5PV210_GPIO_G0_NR      (7)
+#define S5PV210_GPIO_G1_NR      (7)
+#define S5PV210_GPIO_G2_NR      (7)
+#define S5PV210_GPIO_G3_NR      (7)
+#define S5PV210_GPIO_H0_NR      (8)
+#define S5PV210_GPIO_H1_NR      (8)
+#define S5PV210_GPIO_H2_NR      (8)
+#define S5PV210_GPIO_H3_NR      (8)
+#define S5PV210_GPIO_I_NR       (7)
+#define S5PV210_GPIO_J0_NR      (8)
+#define S5PV210_GPIO_J1_NR      (6)
+#define S5PV210_GPIO_J2_NR      (8)
+#define S5PV210_GPIO_J3_NR      (8)
+#define S5PV210_GPIO_J4_NR      (5)
+
+/* GPIO bank numbers */
+
+/* CONFIG_S3C_GPIO_SPACE allows the user to select extra
+ * space for debugging purposes so that any accidental
+ * change from one gpio bank to another can be caught.
+*/
+
+#define S5PV210_GPIO_NEXT(__gpio) \
+        ((__gpio##_START) + (__gpio##_NR) + CONFIG_S3C_GPIO_SPACE + 1)
+
+enum s5p_gpio_number {
+        S5PV210_GPIO_A0_START   = 0,
+        S5PV210_GPIO_A1_START   = S5PV210_GPIO_NEXT(S5PV210_GPIO_A0),
+        S5PV210_GPIO_B_START    = S5PV210_GPIO_NEXT(S5PV210_GPIO_A1),
+        S5PV210_GPIO_C0_START   = S5PV210_GPIO_NEXT(S5PV210_GPIO_B),
+        S5PV210_GPIO_C1_START   = S5PV210_GPIO_NEXT(S5PV210_GPIO_C0),
+        S5PV210_GPIO_D0_START   = S5PV210_GPIO_NEXT(S5PV210_GPIO_C1),
+        S5PV210_GPIO_D1_START   = S5PV210_GPIO_NEXT(S5PV210_GPIO_D0),
+        S5PV210_GPIO_E0_START   = S5PV210_GPIO_NEXT(S5PV210_GPIO_D1),
+        S5PV210_GPIO_E1_START   = S5PV210_GPIO_NEXT(S5PV210_GPIO_E0),
+        S5PV210_GPIO_F0_START   = S5PV210_GPIO_NEXT(S5PV210_GPIO_E1),
+        S5PV210_GPIO_F1_START   = S5PV210_GPIO_NEXT(S5PV210_GPIO_F0),
+        S5PV210_GPIO_F2_START   = S5PV210_GPIO_NEXT(S5PV210_GPIO_F1),
+        S5PV210_GPIO_F3_START   = S5PV210_GPIO_NEXT(S5PV210_GPIO_F2),
+        S5PV210_GPIO_G0_START   = S5PV210_GPIO_NEXT(S5PV210_GPIO_F3),
+        S5PV210_GPIO_G1_START   = S5PV210_GPIO_NEXT(S5PV210_GPIO_G0),
+        S5PV210_GPIO_G2_START   = S5PV210_GPIO_NEXT(S5PV210_GPIO_G1),
+        S5PV210_GPIO_G3_START   = S5PV210_GPIO_NEXT(S5PV210_GPIO_G2),
+        S5PV210_GPIO_H0_START   = S5PV210_GPIO_NEXT(S5PV210_GPIO_G3),
+        S5PV210_GPIO_H1_START   = S5PV210_GPIO_NEXT(S5PV210_GPIO_H0),
+        S5PV210_GPIO_H2_START   = S5PV210_GPIO_NEXT(S5PV210_GPIO_H1),
+        S5PV210_GPIO_H3_START   = S5PV210_GPIO_NEXT(S5PV210_GPIO_H2),
+        S5PV210_GPIO_I_START    = S5PV210_GPIO_NEXT(S5PV210_GPIO_H3),
+        S5PV210_GPIO_J0_START   = S5PV210_GPIO_NEXT(S5PV210_GPIO_I),
+        S5PV210_GPIO_J1_START   = S5PV210_GPIO_NEXT(S5PV210_GPIO_J0),
+        S5PV210_GPIO_J2_START   = S5PV210_GPIO_NEXT(S5PV210_GPIO_J1),
+        S5PV210_GPIO_J3_START   = S5PV210_GPIO_NEXT(S5PV210_GPIO_J2),
+        S5PV210_GPIO_J4_START   = S5PV210_GPIO_NEXT(S5PV210_GPIO_J3),
+};
+
+/* S5PV210 GPIO number definitions */
+#define S5PV210_GPA0(_nr)       (S5PV210_GPIO_A0_START + (_nr))
+#define S5PV210_GPA1(_nr)       (S5PV210_GPIO_A1_START + (_nr))
+#define S5PV210_GPB(_nr)        (S5PV210_GPIO_B_START + (_nr))
+#define S5PV210_GPC0(_nr)       (S5PV210_GPIO_C0_START + (_nr))
+#define S5PV210_GPC1(_nr)       (S5PV210_GPIO_C1_START + (_nr))
+#define S5PV210_GPD0(_nr)       (S5PV210_GPIO_D0_START + (_nr))
+#define S5PV210_GPD1(_nr)       (S5PV210_GPIO_D1_START + (_nr))
+#define S5PV210_GPE0(_nr)       (S5PV210_GPIO_E0_START + (_nr))
+#define S5PV210_GPE1(_nr)       (S5PV210_GPIO_E1_START + (_nr))
+#define S5PV210_GPF0(_nr)       (S5PV210_GPIO_F0_START + (_nr))
+#define S5PV210_GPF1(_nr)       (S5PV210_GPIO_F1_START + (_nr))
+#define S5PV210_GPF2(_nr)       (S5PV210_GPIO_F2_START + (_nr))
+#define S5PV210_GPF3(_nr)       (S5PV210_GPIO_F3_START + (_nr))
+#define S5PV210_GPG0(_nr)       (S5PV210_GPIO_G0_START + (_nr))
+#define S5PV210_GPG1(_nr)       (S5PV210_GPIO_G1_START + (_nr))
+#define S5PV210_GPG2(_nr)       (S5PV210_GPIO_G2_START + (_nr))
+#define S5PV210_GPG3(_nr)       (S5PV210_GPIO_G3_START + (_nr))
+#define S5PV210_GPH0(_nr)       (S5PV210_GPIO_H0_START + (_nr))
+#define S5PV210_GPH1(_nr)       (S5PV210_GPIO_H1_START + (_nr))
+#define S5PV210_GPH2(_nr)       (S5PV210_GPIO_H2_START + (_nr))
+#define S5PV210_GPH3(_nr)       (S5PV210_GPIO_H3_START + (_nr))
+#define S5PV210_GPI(_nr)        (S5PV210_GPIO_I_START + (_nr))
+#define S5PV210_GPJ0(_nr)       (S5PV210_GPIO_J0_START + (_nr))
+#define S5PV210_GPJ1(_nr)       (S5PV210_GPIO_J1_START + (_nr))
+#define S5PV210_GPJ2(_nr)       (S5PV210_GPIO_J2_START + (_nr))
+#define S5PV210_GPJ3(_nr)       (S5PV210_GPIO_J3_START + (_nr))
+#define S5PV210_GPJ4(_nr)       (S5PV210_GPIO_J4_START + (_nr))
+
+/* the end of the S5PV210 specific gpios */
+#define S5PV210_GPIO_END        (S5PV210_GPJ4(S5PV210_GPIO_J4_NR) + 1)
+#define S3C_GPIO_END            S5PV210_GPIO_END
+
+/* define the number of gpios we need to the one after the GPJ4() range */
+#define ARCH_NR_GPIOS           (S5PV210_GPJ4(S5PV210_GPIO_J4_NR) +     \
+                                 CONFIG_SAMSUNG_GPIO_EXTRA + 1)
+
+#include <asm-generic/gpio.h>
+
+#endif /* __ASM_ARCH_GPIO_H */
diff --git a/arch/arm/mach-s5pv210/include/mach/hardware.h b/arch/arm/mach-s5pv210/include/mach/hardware.h
new file mode 100644
index 000000000000..fada7a392d09
--- /dev/null
+++ b/arch/arm/mach-s5pv210/include/mach/hardware.h
@@ -0,0 +1,18 @@
+/* linux/arch/arm/mach-s5pv210/include/mach/hardware.h
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * S5PV210 - Hardware support
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_ARCH_HARDWARE_H
+#define __ASM_ARCH_HARDWARE_H __FILE__
+
+/* currently nothing here, placeholder */
+
+#endif /* __ASM_ARCH_HARDWARE_H */
diff --git a/arch/arm/mach-s5pv210/include/mach/io.h b/arch/arm/mach-s5pv210/include/mach/io.h
new file mode 100644
index 000000000000..5ab9d560bc86
--- /dev/null
+++ b/arch/arm/mach-s5pv210/include/mach/io.h
@@ -0,0 +1,26 @@
+/* linux/arch/arm/mach-s5pv210/include/mach/io.h
+ *
+ * Copyright 2008-2010 Ben Dooks <ben-linux@fluff.org>
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * Based on arch/arm/mach-s5p6442/include/mach/io.h
+ *
+ * Default IO routines for S5PV210
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_ARM_ARCH_IO_H
+#define __ASM_ARM_ARCH_IO_H __FILE__
+
+/* No current ISA/PCI bus support. */
+#define __io(a)         __typesafe_io(a)
+#define __mem_pci(a)    (a)
+
+#define IO_SPACE_LIMIT (0xFFFFFFFF)
+
+#endif /* __ASM_ARM_ARCH_IO_H */
diff --git a/arch/arm/mach-s5pv210/include/mach/irqs.h b/arch/arm/mach-s5pv210/include/mach/irqs.h
new file mode 100644
index 000000000000..62c5175ef291
--- /dev/null
+++ b/arch/arm/mach-s5pv210/include/mach/irqs.h
@@ -0,0 +1,146 @@
+/* linux/arch/arm/mach-s5pv210/include/mach/irqs.h
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * S5PV210 - IRQ definitions
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_ARCH_IRQS_H
+#define __ASM_ARCH_IRQS_H __FILE__
+
+#include <plat/irqs.h>
+
+/* VIC0: System, DMA, Timer */
+
+#define IRQ_EINT0               S5P_IRQ_VIC0(0)
+#define IRQ_EINT1               S5P_IRQ_VIC0(1)
+#define IRQ_EINT2               S5P_IRQ_VIC0(2)
+#define IRQ_EINT3               S5P_IRQ_VIC0(3)
+#define IRQ_EINT4               S5P_IRQ_VIC0(4)
+#define IRQ_EINT5               S5P_IRQ_VIC0(5)
+#define IRQ_EINT6               S5P_IRQ_VIC0(6)
+#define IRQ_EINT7               S5P_IRQ_VIC0(7)
+#define IRQ_EINT8               S5P_IRQ_VIC0(8)
+#define IRQ_EINT9               S5P_IRQ_VIC0(9)
+#define IRQ_EINT10              S5P_IRQ_VIC0(10)
+#define IRQ_EINT11              S5P_IRQ_VIC0(11)
+#define IRQ_EINT12              S5P_IRQ_VIC0(12)
+#define IRQ_EINT13              S5P_IRQ_VIC0(13)
+#define IRQ_EINT14              S5P_IRQ_VIC0(14)
+#define IRQ_EINT15              S5P_IRQ_VIC0(15)
+#define IRQ_EINT16_31           S5P_IRQ_VIC0(16)
+#define IRQ_BATF                S5P_IRQ_VIC0(17)
+#define IRQ_MDMA                S5P_IRQ_VIC0(18)
+#define IRQ_PDMA0               S5P_IRQ_VIC0(19)
+#define IRQ_PDMA1               S5P_IRQ_VIC0(20)
+#define IRQ_TIMER0_VIC          S5P_IRQ_VIC0(21)
+#define IRQ_TIMER1_VIC          S5P_IRQ_VIC0(22)
+#define IRQ_TIMER2_VIC          S5P_IRQ_VIC0(23)
+#define IRQ_TIMER3_VIC          S5P_IRQ_VIC0(24)
+#define IRQ_TIMER4_VIC          S5P_IRQ_VIC0(25)
+#define IRQ_SYSTIMER            S5P_IRQ_VIC0(26)
+#define IRQ_WDT                 S5P_IRQ_VIC0(27)
+#define IRQ_RTC_ALARM           S5P_IRQ_VIC0(28)
+#define IRQ_RTC_TIC             S5P_IRQ_VIC0(29)
+#define IRQ_GPIOINT             S5P_IRQ_VIC0(30)
+#define IRQ_FIMC3               S5P_IRQ_VIC0(31)
+
+/* VIC1: ARM, Power, Memory, Connectivity, Storage */
+
+#define IRQ_CORTEX0             S5P_IRQ_VIC1(0)
+#define IRQ_CORTEX1             S5P_IRQ_VIC1(1)
+#define IRQ_CORTEX2             S5P_IRQ_VIC1(2)
+#define IRQ_CORTEX3             S5P_IRQ_VIC1(3)
+#define IRQ_CORTEX4             S5P_IRQ_VIC1(4)
+#define IRQ_IEMAPC              S5P_IRQ_VIC1(5)
+#define IRQ_IEMIEC              S5P_IRQ_VIC1(6)
+#define IRQ_ONENAND             S5P_IRQ_VIC1(7)
+#define IRQ_NFC                 S5P_IRQ_VIC1(8)
+#define IRQ_CFC                 S5P_IRQ_VIC1(9)
+#define IRQ_UART0               S5P_IRQ_VIC1(10)
+#define IRQ_UART1               S5P_IRQ_VIC1(11)
+#define IRQ_UART2               S5P_IRQ_VIC1(12)
+#define IRQ_UART3               S5P_IRQ_VIC1(13)
+#define IRQ_IIC                 S5P_IRQ_VIC1(14)
+#define IRQ_SPI0                S5P_IRQ_VIC1(15)
+#define IRQ_SPI1                S5P_IRQ_VIC1(16)
+#define IRQ_SPI2                S5P_IRQ_VIC1(17)
+#define IRQ_IRDA                S5P_IRQ_VIC1(18)
+#define IRQ_CAN0                S5P_IRQ_VIC1(19)
+#define IRQ_CAN1                S5P_IRQ_VIC1(20)
+#define IRQ_HSIRX               S5P_IRQ_VIC1(21)
+#define IRQ_HSITX               S5P_IRQ_VIC1(22)
+#define IRQ_UHOST               S5P_IRQ_VIC1(23)
+#define IRQ_OTG                 S5P_IRQ_VIC1(24)
+#define IRQ_MSM                 S5P_IRQ_VIC1(25)
+#define IRQ_HSMMC0              S5P_IRQ_VIC1(26)
+#define IRQ_HSMMC1              S5P_IRQ_VIC1(27)
+#define IRQ_HSMMC2              S5P_IRQ_VIC1(28)
+#define IRQ_MIPICSI             S5P_IRQ_VIC1(29)
+#define IRQ_MIPIDSI             S5P_IRQ_VIC1(30)
+#define IRQ_ONENAND_AUDI        S5P_IRQ_VIC1(31)
+
+/* VIC2: Multimedia, Audio, Security */
+
+#define IRQ_LCD0                S5P_IRQ_VIC2(0)
+#define IRQ_LCD1                S5P_IRQ_VIC2(1)
+#define IRQ_LCD2                S5P_IRQ_VIC2(2)
+#define IRQ_LCD3                S5P_IRQ_VIC2(3)
+#define IRQ_ROTATOR             S5P_IRQ_VIC2(4)
+#define IRQ_FIMC0               S5P_IRQ_VIC2(5)
+#define IRQ_FIMC1               S5P_IRQ_VIC2(6)
+#define IRQ_FIMC2               S5P_IRQ_VIC2(7)
+#define IRQ_JPEG                S5P_IRQ_VIC2(8)
+#define IRQ_2D                  S5P_IRQ_VIC2(9)
+#define IRQ_3D                  S5P_IRQ_VIC2(10)
+#define IRQ_MIXER               S5P_IRQ_VIC2(11)
+#define IRQ_HDMI                S5P_IRQ_VIC2(12)
+#define IRQ_IIC1                S5P_IRQ_VIC2(13)
+#define IRQ_MFC                 S5P_IRQ_VIC2(14)
+#define IRQ_TVENC               S5P_IRQ_VIC2(15)
+#define IRQ_I2S0                S5P_IRQ_VIC2(16)
+#define IRQ_I2S1                S5P_IRQ_VIC2(17)
+#define IRQ_I2S2                S5P_IRQ_VIC2(18)
+#define IRQ_AC97                S5P_IRQ_VIC2(19)
+#define IRQ_PCM0                S5P_IRQ_VIC2(20)
+#define IRQ_PCM1                S5P_IRQ_VIC2(21)
+#define IRQ_SPDIF               S5P_IRQ_VIC2(22)
+#define IRQ_ADC                 S5P_IRQ_VIC2(23)
+#define IRQ_PENDN               S5P_IRQ_VIC2(24)
+#define IRQ_TC                  IRQ_PENDN
+#define IRQ_KEYPAD              S5P_IRQ_VIC2(25)
+#define IRQ_CG                  S5P_IRQ_VIC2(26)
+#define IRQ_SEC                 S5P_IRQ_VIC2(27)
+#define IRQ_SECRX               S5P_IRQ_VIC2(28)
+#define IRQ_SECTX               S5P_IRQ_VIC2(29)
+#define IRQ_SDMIRQ              S5P_IRQ_VIC2(30)
+#define IRQ_SDMFIQ              S5P_IRQ_VIC2(31)
+
+/* VIC3: Etc */
+
+#define IRQ_IPC                 S5P_IRQ_VIC3(0)
+#define IRQ_HOSTIF              S5P_IRQ_VIC3(1)
+#define IRQ_MMC3                S5P_IRQ_VIC3(2)
+#define IRQ_CEC                 S5P_IRQ_VIC3(3)
+#define IRQ_TSI                 S5P_IRQ_VIC3(4)
+#define IRQ_MDNIE0              S5P_IRQ_VIC3(5)
+#define IRQ_MDNIE1              S5P_IRQ_VIC3(6)
+#define IRQ_MDNIE2              S5P_IRQ_VIC3(7)
+#define IRQ_MDNIE3              S5P_IRQ_VIC3(8)
+#define IRQ_VIC_END             S5P_IRQ_VIC3(31)
+
+#define S5P_IRQ_EINT_BASE       (IRQ_VIC_END + 1)
+
+#define S5P_EINT(x)             ((x) + S5P_IRQ_EINT_BASE)
+#define IRQ_EINT(x)             S5P_EINT(x)
+
+/* Set the default NR_IRQS */
+
+#define NR_IRQS                 (IRQ_EINT(31) + 1)
+
+#endif /* ASM_ARCH_IRQS_H */
diff --git a/arch/arm/mach-s5pv210/include/mach/map.h b/arch/arm/mach-s5pv210/include/mach/map.h
new file mode 100644
index 000000000000..c22694c8231f
--- /dev/null
+++ b/arch/arm/mach-s5pv210/include/mach/map.h
@@ -0,0 +1,65 @@
+/* linux/arch/arm/mach-s5pv210/include/mach/map.h
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * S5PV210 - Memory map definitions
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_ARCH_MAP_H
+#define __ASM_ARCH_MAP_H __FILE__
+
+#include <plat/map-base.h>
+#include <plat/map-s5p.h>
+
+#define S5PV210_PA_CHIPID       (0xE0000000)
+#define S5P_PA_CHIPID           S5PV210_PA_CHIPID
+
+#define S5PV210_PA_SYSCON       (0xE0100000)
+#define S5P_PA_SYSCON           S5PV210_PA_SYSCON
+
+#define S5PV210_PA_GPIO         (0xE0200000)
+#define S5P_PA_GPIO             S5PV210_PA_GPIO
+
+#define S5PV210_PA_IIC0         (0xE1800000)
+
+#define S5PV210_PA_TIMER        (0xE2500000)
+#define S5P_PA_TIMER            S5PV210_PA_TIMER
+
+#define S5PV210_PA_SYSTIMER     (0xE2600000)
+
+#define S5PV210_PA_UART         (0xE2900000)
+
+#define S5P_PA_UART0            (S5PV210_PA_UART + 0x0)
+#define S5P_PA_UART1            (S5PV210_PA_UART + 0x400)
+#define S5P_PA_UART2            (S5PV210_PA_UART + 0x800)
+#define S5P_PA_UART3            (S5PV210_PA_UART + 0xC00)
+
+#define S5P_SZ_UART             SZ_256
+
+#define S5PV210_PA_SROMC        (0xE8000000)
+
+#define S5PV210_PA_VIC0         (0xF2000000)
+#define S5P_PA_VIC0             S5PV210_PA_VIC0
+
+#define S5PV210_PA_VIC1         (0xF2100000)
+#define S5P_PA_VIC1             S5PV210_PA_VIC1
+
+#define S5PV210_PA_VIC2         (0xF2200000)
+#define S5P_PA_VIC2             S5PV210_PA_VIC2
+
+#define S5PV210_PA_VIC3         (0xF2300000)
+#define S5P_PA_VIC3             S5PV210_PA_VIC3
+
+#define S5PV210_PA_SDRAM        (0x20000000)
+#define S5P_PA_SDRAM            S5PV210_PA_SDRAM
+
+/* compatibiltiy defines. */
+#define S3C_PA_UART             S5PV210_PA_UART
+#define S3C_PA_IIC              S5PV210_PA_IIC0
+
+#endif /* __ASM_ARCH_MAP_H */
diff --git a/arch/arm/mach-s5pv210/include/mach/memory.h b/arch/arm/mach-s5pv210/include/mach/memory.h
new file mode 100644
index 000000000000..379117e27600
--- /dev/null
+++ b/arch/arm/mach-s5pv210/include/mach/memory.h
@@ -0,0 +1,23 @@
+/* linux/arch/arm/mach-s5pv210/include/mach/memory.h
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * S5PV210 - Memory definitions
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_ARCH_MEMORY_H
+#define __ASM_ARCH_MEMORY_H
+
+#define PHYS_OFFSET             UL(0x20000000)
+#define CONSISTENT_DMA_SIZE     (SZ_8M + SZ_4M + SZ_2M)
+
+/* Maximum of 256MiB in one bank */
+#define MAX_PHYSMEM_BITS        32
+#define SECTION_SIZE_BITS       28
+
+#endif /* __ASM_ARCH_MEMORY_H */
diff --git a/arch/arm/mach-s5pv210/include/mach/pwm-clock.h b/arch/arm/mach-s5pv210/include/mach/pwm-clock.h
new file mode 100644
index 000000000000..69027fea987a
--- /dev/null
+++ b/arch/arm/mach-s5pv210/include/mach/pwm-clock.h
@@ -0,0 +1,69 @@
+/* linux/arch/arm/mach-s5pv210/include/mach/pwm-clock.h
+ *
+ * Copyright 2008 Simtec Electronics
+ *      Ben Dooks <ben@simtec.co.uk>
+ *      http://armlinux.simtec.co.uk/
+ *
+ * Copyright (c) 2009 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * Based on arch/arm/plat-s3c24xx/include/mach/pwm-clock.h
+ *
+ * S5PV210 - pwm clock and timer support
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_ARCH_PWMCLK_H
+#define __ASM_ARCH_PWMCLK_H __FILE__
+
+/**
+ * pwm_cfg_src_is_tclk() - return whether the given mux config is a tclk
+ * @cfg: The timer TCFG1 register bits shifted down to 0.
+ *
+ * Return true if the given configuration from TCFG1 is a TCLK instead
+ * any of the TDIV clocks.
+ */
+static inline int pwm_cfg_src_is_tclk(unsigned long tcfg)
+{
+        return tcfg == S3C2410_TCFG1_MUX_TCLK;
+}
+
+/**
+ * tcfg_to_divisor() - convert tcfg1 setting to a divisor
+ * @tcfg1: The tcfg1 setting, shifted down.
+ *
+ * Get the divisor value for the given tcfg1 setting. We assume the
+ * caller has already checked to see if this is not a TCLK source.
+ */
+static inline unsigned long tcfg_to_divisor(unsigned long tcfg1)
+{
+        return 1 << (1 + tcfg1);
+}
+
+/**
+ * pwm_tdiv_has_div1() - does the tdiv setting have a /1
+ *
+ * Return true if we have a /1 in the tdiv setting.
+ */
+static inline unsigned int pwm_tdiv_has_div1(void)
+{
+        return 0;
+}
+
+/**
+ * pwm_tdiv_div_bits() - calculate TCFG1 divisor value.
+ * @div: The divisor to calculate the bit information for.
+ *
+ * Turn a divisor into the necessary bit field for TCFG1.
+ */
+static inline unsigned long pwm_tdiv_div_bits(unsigned int div)
+{
+        return ilog2(div) - 1;
+}
+
+#define S3C_TCFG1_MUX_TCLK S3C2410_TCFG1_MUX_TCLK
+
+#endif /* __ASM_ARCH_PWMCLK_H */
diff --git a/arch/arm/mach-s5pv210/include/mach/regs-clock.h b/arch/arm/mach-s5pv210/include/mach/regs-clock.h
new file mode 100644
index 000000000000..e56e0e4673ed
--- /dev/null
+++ b/arch/arm/mach-s5pv210/include/mach/regs-clock.h
@@ -0,0 +1,169 @@
+/* linux/arch/arm/mach-s5pv210/include/mach/regs-clock.h
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * S5PV210 - Clock register definitions
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_ARCH_REGS_CLOCK_H
+#define __ASM_ARCH_REGS_CLOCK_H __FILE__
+
+#include <mach/map.h>
+
+#define S5P_CLKREG(x)           (S3C_VA_SYS + (x))
+
+#define S5P_APLL_LOCK           S5P_CLKREG(0x00)
+#define S5P_MPLL_LOCK           S5P_CLKREG(0x08)
+#define S5P_EPLL_LOCK           S5P_CLKREG(0x10)
+#define S5P_VPLL_LOCK           S5P_CLKREG(0x20)
+
+#define S5P_APLL_CON            S5P_CLKREG(0x100)
+#define S5P_MPLL_CON            S5P_CLKREG(0x108)
+#define S5P_EPLL_CON            S5P_CLKREG(0x110)
+#define S5P_VPLL_CON            S5P_CLKREG(0x120)
+
+#define S5P_CLK_SRC0            S5P_CLKREG(0x200)
+#define S5P_CLK_SRC1            S5P_CLKREG(0x204)
+#define S5P_CLK_SRC2            S5P_CLKREG(0x208)
+#define S5P_CLK_SRC3            S5P_CLKREG(0x20C)
+#define S5P_CLK_SRC4            S5P_CLKREG(0x210)
+#define S5P_CLK_SRC5            S5P_CLKREG(0x214)
+#define S5P_CLK_SRC6            S5P_CLKREG(0x218)
+
+#define S5P_CLK_SRC_MASK0       S5P_CLKREG(0x280)
+#define S5P_CLK_SRC_MASK1       S5P_CLKREG(0x284)
+
+#define S5P_CLK_DIV0            S5P_CLKREG(0x300)
+#define S5P_CLK_DIV1            S5P_CLKREG(0x304)
+#define S5P_CLK_DIV2            S5P_CLKREG(0x308)
+#define S5P_CLK_DIV3            S5P_CLKREG(0x30C)
+#define S5P_CLK_DIV4            S5P_CLKREG(0x310)
+#define S5P_CLK_DIV5            S5P_CLKREG(0x314)
+#define S5P_CLK_DIV6            S5P_CLKREG(0x318)
+#define S5P_CLK_DIV7            S5P_CLKREG(0x31C)
+
+#define S5P_CLKGATE_MAIN0       S5P_CLKREG(0x400)
+#define S5P_CLKGATE_MAIN1       S5P_CLKREG(0x404)
+#define S5P_CLKGATE_MAIN2       S5P_CLKREG(0x408)
+
+#define S5P_CLKGATE_PERI0       S5P_CLKREG(0x420)
+#define S5P_CLKGATE_PERI1       S5P_CLKREG(0x424)
+
+#define S5P_CLKGATE_SCLK0       S5P_CLKREG(0x440)
+#define S5P_CLKGATE_SCLK1       S5P_CLKREG(0x444)
+#define S5P_CLKGATE_IP0         S5P_CLKREG(0x460)
+#define S5P_CLKGATE_IP1         S5P_CLKREG(0x464)
+#define S5P_CLKGATE_IP2         S5P_CLKREG(0x468)
+#define S5P_CLKGATE_IP3         S5P_CLKREG(0x46C)
+#define S5P_CLKGATE_IP4         S5P_CLKREG(0x470)
+
+#define S5P_CLKGATE_BLOCK       S5P_CLKREG(0x480)
+#define S5P_CLKGATE_BUS0        S5P_CLKREG(0x484)
+#define S5P_CLKGATE_BUS1        S5P_CLKREG(0x488)
+#define S5P_CLK_OUT             S5P_CLKREG(0x500)
+
+/* CLKSRC0 */
+#define S5P_CLKSRC0_MUX200_MASK         (0x1<<16)
+#define S5P_CLKSRC0_MUX166_MASK         (0x1<<20)
+#define S5P_CLKSRC0_MUX133_MASK         (0x1<<24)
+
+/* CLKDIV0 */
+#define S5P_CLKDIV0_APLL_SHIFT          (0)
+#define S5P_CLKDIV0_APLL_MASK           (0x7 << S5P_CLKDIV0_APLL_SHIFT)
+#define S5P_CLKDIV0_A2M_SHIFT           (4)
+#define S5P_CLKDIV0_A2M_MASK            (0x7 << S5P_CLKDIV0_A2M_SHIFT)
+#define S5P_CLKDIV0_HCLK200_SHIFT       (8)
+#define S5P_CLKDIV0_HCLK200_MASK        (0x7 << S5P_CLKDIV0_HCLK200_SHIFT)
+#define S5P_CLKDIV0_PCLK100_SHIFT       (12)
+#define S5P_CLKDIV0_PCLK100_MASK        (0x7 << S5P_CLKDIV0_PCLK100_SHIFT)
+#define S5P_CLKDIV0_HCLK166_SHIFT       (16)
+#define S5P_CLKDIV0_HCLK166_MASK        (0xF << S5P_CLKDIV0_HCLK166_SHIFT)
+#define S5P_CLKDIV0_PCLK83_SHIFT        (20)
+#define S5P_CLKDIV0_PCLK83_MASK         (0x7 << S5P_CLKDIV0_PCLK83_SHIFT)
+#define S5P_CLKDIV0_HCLK133_SHIFT       (24)
+#define S5P_CLKDIV0_HCLK133_MASK        (0xF << S5P_CLKDIV0_HCLK133_SHIFT)
+#define S5P_CLKDIV0_PCLK66_SHIFT        (28)
+#define S5P_CLKDIV0_PCLK66_MASK         (0x7 << S5P_CLKDIV0_PCLK66_SHIFT)
+
+/* Registers related to power management */
+#define S5P_PWR_CFG             S5P_CLKREG(0xC000)
+#define S5P_EINT_WAKEUP_MASK    S5P_CLKREG(0xC004)
+#define S5P_WAKEUP_MASK         S5P_CLKREG(0xC008)
+#define S5P_PWR_MODE            S5P_CLKREG(0xC00C)
+#define S5P_NORMAL_CFG          S5P_CLKREG(0xC010)
+#define S5P_IDLE_CFG            S5P_CLKREG(0xC020)
+#define S5P_STOP_CFG            S5P_CLKREG(0xC030)
+#define S5P_STOP_MEM_CFG        S5P_CLKREG(0xC034)
+#define S5P_SLEEP_CFG           S5P_CLKREG(0xC040)
+
+#define S5P_OSC_FREQ            S5P_CLKREG(0xC100)
+#define S5P_OSC_STABLE          S5P_CLKREG(0xC104)
+#define S5P_PWR_STABLE          S5P_CLKREG(0xC108)
+#define S5P_MTC_STABLE          S5P_CLKREG(0xC110)
+#define S5P_CLAMP_STABLE        S5P_CLKREG(0xC114)
+
+#define S5P_WAKEUP_STAT         S5P_CLKREG(0xC200)
+#define S5P_BLK_PWR_STAT        S5P_CLKREG(0xC204)
+
+#define S5P_OTHERS              S5P_CLKREG(0xE000)
+#define S5P_OM_STAT             S5P_CLKREG(0xE100)
+#define S5P_USB_PHY_CONTROL     S5P_CLKREG(0xE80C)
+#define S5P_DAC_CONTROL         S5P_CLKREG(0xE810)
+
+#define S5P_INFORM0             S5P_CLKREG(0xF000)
+#define S5P_INFORM1             S5P_CLKREG(0xF004)
+#define S5P_INFORM2             S5P_CLKREG(0xF008)
+#define S5P_INFORM3             S5P_CLKREG(0xF00C)
+#define S5P_INFORM4             S5P_CLKREG(0xF010)
+#define S5P_INFORM5             S5P_CLKREG(0xF014)
+#define S5P_INFORM6             S5P_CLKREG(0xF018)
+#define S5P_INFORM7             S5P_CLKREG(0xF01C)
+
+#define S5P_RST_STAT            S5P_CLKREG(0xA000)
+#define S5P_OSC_CON             S5P_CLKREG(0x8000)
+#define S5P_MIPI_PHY_CON0       S5P_CLKREG(0x7200)
+#define S5P_MIPI_PHY_CON1       S5P_CLKREG(0x7204)
+#define S5P_MIPI_CONTROL        S5P_CLKREG(0xE814)
+
+#define S5P_IDLE_CFG_TL_MASK    (3 << 30)
+#define S5P_IDLE_CFG_TM_MASK    (3 << 28)
+#define S5P_IDLE_CFG_TL_ON      (2 << 30)
+#define S5P_IDLE_CFG_TM_ON      (2 << 28)
+#define S5P_IDLE_CFG_DIDLE      (1 << 0)
+
+#define S5P_CFG_WFI_CLEAN               (~(3 << 8))
+#define S5P_CFG_WFI_IDLE                (1 << 8)
+#define S5P_CFG_WFI_STOP                (2 << 8)
+#define S5P_CFG_WFI_SLEEP               (3 << 8)
+
+#define S5P_OTHER_SYS_INT               24
+#define S5P_OTHER_STA_TYPE              23
+#define S5P_OTHER_SYSC_INTOFF           (1 << 0)
+#define STA_TYPE_EXPON                  0
+#define STA_TYPE_SFR                    1
+
+#define S5P_PWR_STA_EXP_SCALE           0
+#define S5P_PWR_STA_CNT                 4
+
+#define S5P_PWR_STABLE_COUNT            85500
+
+#define S5P_SLEEP_CFG_OSC_EN            (1 << 0)
+#define S5P_SLEEP_CFG_USBOSC_EN         (1 << 1)
+
+/* OTHERS Resgister */
+#define S5P_OTHERS_USB_SIG_MASK         (1 << 16)
+#define S5P_OTHERS_MIPI_DPHY_EN         (1 << 28)
+
+/* MIPI */
+#define S5P_MIPI_DPHY_EN                (3)
+
+/* S5P_DAC_CONTROL */
+#define S5P_DAC_ENABLE                  (1)
+#define S5P_DAC_DISABLE                 (0)
+
+#endif /* __ASM_ARCH_REGS_CLOCK_H */
diff --git a/arch/arm/mach-s5pv210/include/mach/regs-irq.h b/arch/arm/mach-s5pv210/include/mach/regs-irq.h
new file mode 100644
index 000000000000..5c3b104a7c86
--- /dev/null
+++ b/arch/arm/mach-s5pv210/include/mach/regs-irq.h
@@ -0,0 +1,19 @@
+/* linux/arch/arm/mach-s5pv210/include/mach/regs-irq.h
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * S5PV210 - IRQ register definitions
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_ARCH_REGS_IRQ_H
+#define __ASM_ARCH_REGS_IRQ_H __FILE__
+
+#include <asm/hardware/vic.h>
+#include <mach/map.h>
+
+#endif /* __ASM_ARCH_REGS_IRQ_H */
diff --git a/arch/arm/mach-s5pv210/include/mach/system.h b/arch/arm/mach-s5pv210/include/mach/system.h
new file mode 100644
index 000000000000..1ca04d5025b3
--- /dev/null
+++ b/arch/arm/mach-s5pv210/include/mach/system.h
@@ -0,0 +1,26 @@
+/* linux/arch/arm/mach-s5pv210/include/mach/system.h
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * S5PV210 - system support header
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_ARCH_SYSTEM_H
+#define __ASM_ARCH_SYSTEM_H __FILE__
+
+static void arch_idle(void)
+{
+        /* nothing here yet */
+}
+
+static void arch_reset(char mode, const char *cmd)
+{
+        /* nothing here yet */
+}
+
+#endif /* __ASM_ARCH_SYSTEM_H */
diff --git a/arch/arm/mach-s5pv210/include/mach/tick.h b/arch/arm/mach-s5pv210/include/mach/tick.h
new file mode 100644
index 000000000000..7993b3603ccf
--- /dev/null
+++ b/arch/arm/mach-s5pv210/include/mach/tick.h
@@ -0,0 +1,26 @@
+/* linux/arch/arm/mach-s5pv210/include/mach/tick.h
+ *
+ * Copyright (c) 2009 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * Based on arch/arm/mach-s3c6400/include/mach/tick.h
+ *
+ * S5PV210 - Timer tick support definitions
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_ARCH_TICK_H
+#define __ASM_ARCH_TICK_H __FILE__
+
+static inline u32 s3c24xx_ostimer_pending(void)
+{
+        u32 pend = __raw_readl(VA_VIC0 + VIC_RAW_STATUS);
+        return pend & (1 << (IRQ_TIMER4_VIC - S5P_IRQ_VIC0(0)));
+}
+
+#define TICK_MAX        (0xffffffff)
+
+#endif /* __ASM_ARCH_TICK_H */
diff --git a/arch/arm/mach-s5pv210/include/mach/timex.h b/arch/arm/mach-s5pv210/include/mach/timex.h
new file mode 100644
index 000000000000..73dc85496a83
--- /dev/null
+++ b/arch/arm/mach-s5pv210/include/mach/timex.h
@@ -0,0 +1,29 @@
+/* linux/arch/arm/mach-s5pv210/include/mach/timex.h
+ *
+ * Copyright (c) 2003-2010 Simtec Electronics
+ *      Ben Dooks <ben@simtec.co.uk>
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * Based on arch/arm/mach-s5p6442/include/mach/timex.h
+ *
+ * S5PV210 - time parameters
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_ARCH_TIMEX_H
+#define __ASM_ARCH_TIMEX_H __FILE__
+
+/* CLOCK_TICK_RATE needs to be evaluatable by the cpp, so making it
+ * a variable is useless. It seems as long as we make our timers an
+ * exact multiple of HZ, any value that makes a 1->1 correspondence
+ * for the time conversion functions to/from jiffies is acceptable.
+*/
+
+#define CLOCK_TICK_RATE 12000000
+
+#endif /* __ASM_ARCH_TIMEX_H */
diff --git a/arch/arm/mach-s5pv210/include/mach/uncompress.h b/arch/arm/mach-s5pv210/include/mach/uncompress.h
new file mode 100644
index 000000000000..08ff2fda1fb9
--- /dev/null
+++ b/arch/arm/mach-s5pv210/include/mach/uncompress.h
@@ -0,0 +1,24 @@
+/* linux/arch/arm/mach-s5pv210/include/mach/uncompress.h
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * S5PV210 - uncompress code
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_ARCH_UNCOMPRESS_H
+#define __ASM_ARCH_UNCOMPRESS_H
+
+#include <mach/map.h>
+#include <plat/uncompress.h>
+
+static void arch_detect_cpu(void)
+{
+        /* we do not need to do any cpu detection here at the moment. */
+}
+
+#endif /* __ASM_ARCH_UNCOMPRESS_H */
diff --git a/arch/arm/mach-s5pv210/include/mach/vmalloc.h b/arch/arm/mach-s5pv210/include/mach/vmalloc.h
new file mode 100644
index 000000000000..58f515e0747e
--- /dev/null
+++ b/arch/arm/mach-s5pv210/include/mach/vmalloc.h
@@ -0,0 +1,22 @@
+/* linux/arch/arm/mach-s5p6442/include/mach/vmalloc.h
+ *
+ * Copyright 2010 Ben Dooks <ben-linux@fluff.org>
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * Based on arch/arm/mach-s5p6442/include/mach/vmalloc.h
+ *
+ * S5PV210 vmalloc definition
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_ARCH_VMALLOC_H
+#define __ASM_ARCH_VMALLOC_H __FILE__
+
+#define VMALLOC_END       (0xE0000000)
+
+#endif /* __ASM_ARCH_VMALLOC_H */
diff --git a/arch/arm/mach-s5pv210/init.c b/arch/arm/mach-s5pv210/init.c
new file mode 100644
index 000000000000..4865ae2c475a
--- /dev/null
+++ b/arch/arm/mach-s5pv210/init.c
@@ -0,0 +1,44 @@
+/* linux/arch/arm/mach-s5pv210/init.c
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <linux/init.h>
+#include <linux/serial_core.h>
+
+#include <plat/cpu.h>
+#include <plat/devs.h>
+#include <plat/s5pv210.h>
+#include <plat/regs-serial.h>
+
+static struct s3c24xx_uart_clksrc s5pv210_serial_clocks[] = {
+        [0] = {
+                .name           = "pclk",
+                .divisor        = 1,
+                .min_baud       = 0,
+                .max_baud       = 0,
+        },
+};
+
+/* uart registration process */
+void __init s5pv210_common_init_uarts(struct s3c2410_uartcfg *cfg, int no)
+{
+        struct s3c2410_uartcfg *tcfg = cfg;
+        u32 ucnt;
+
+        for (ucnt = 0; ucnt < no; ucnt++, tcfg++) {
+                if (!tcfg->clocks) {
+                        tcfg->clocks = s5pv210_serial_clocks;
+                        tcfg->clocks_size = ARRAY_SIZE(s5pv210_serial_clocks);
+                }
+        }
+
+        s3c24xx_init_uartdevs("s5pv210-uart", s5p_uart_resources, cfg, no);
+}
diff --git a/arch/arm/mach-s5pv210/mach-smdkc110.c b/arch/arm/mach-s5pv210/mach-smdkc110.c
new file mode 100644
index 000000000000..ab4869df30c0
--- /dev/null
+++ b/arch/arm/mach-s5pv210/mach-smdkc110.c
@@ -0,0 +1,98 @@
+/* linux/arch/arm/mach-s5pv210/mach-smdkc110.c
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <linux/init.h>
+#include <linux/serial_core.h>
+
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+#include <asm/setup.h>
+#include <asm/mach-types.h>
+
+#include <mach/map.h>
+#include <mach/regs-clock.h>
+
+#include <plat/regs-serial.h>
+#include <plat/s5pv210.h>
+#include <plat/devs.h>
+#include <plat/cpu.h>
+
+/* Following are default values for UCON, ULCON and UFCON UART registers */
+#define S5PV210_UCON_DEFAULT    (S3C2410_UCON_TXILEVEL |        \
+                                 S3C2410_UCON_RXILEVEL |        \
+                                 S3C2410_UCON_TXIRQMODE |       \
+                                 S3C2410_UCON_RXIRQMODE |       \
+                                 S3C2410_UCON_RXFIFO_TOI |      \
+                                 S3C2443_UCON_RXERR_IRQEN)
+
+#define S5PV210_ULCON_DEFAULT   S3C2410_LCON_CS8
+
+#define S5PV210_UFCON_DEFAULT   (S3C2410_UFCON_FIFOMODE |       \
+                                 S5PV210_UFCON_TXTRIG4 |        \
+                                 S5PV210_UFCON_RXTRIG4)
+
+static struct s3c2410_uartcfg smdkv210_uartcfgs[] __initdata = {
+        [0] = {
+                .hwport         = 0,
+                .flags          = 0,
+                .ucon           = S5PV210_UCON_DEFAULT,
+                .ulcon          = S5PV210_ULCON_DEFAULT,
+                .ufcon          = S5PV210_UFCON_DEFAULT,
+        },
+        [1] = {
+                .hwport         = 1,
+                .flags          = 0,
+                .ucon           = S5PV210_UCON_DEFAULT,
+                .ulcon          = S5PV210_ULCON_DEFAULT,
+                .ufcon          = S5PV210_UFCON_DEFAULT,
+        },
+        [2] = {
+                .hwport         = 2,
+                .flags          = 0,
+                .ucon           = S5PV210_UCON_DEFAULT,
+                .ulcon          = S5PV210_ULCON_DEFAULT,
+                .ufcon          = S5PV210_UFCON_DEFAULT,
+        },
+        [3] = {
+                .hwport         = 3,
+                .flags          = 0,
+                .ucon           = S5PV210_UCON_DEFAULT,
+                .ulcon          = S5PV210_ULCON_DEFAULT,
+                .ufcon          = S5PV210_UFCON_DEFAULT,
+        },
+};
+
+static struct platform_device *smdkc110_devices[] __initdata = {
+};
+
+static void __init smdkc110_map_io(void)
+{
+        s5p_init_io(NULL, 0, S5P_VA_CHIPID);
+        s3c24xx_init_clocks(24000000);
+        s3c24xx_init_uarts(smdkv210_uartcfgs, ARRAY_SIZE(smdkv210_uartcfgs));
+}
+
+static void __init smdkc110_machine_init(void)
+{
+        platform_add_devices(smdkc110_devices, ARRAY_SIZE(smdkc110_devices));
+}
+
+MACHINE_START(SMDKC110, "SMDKC110")
+        /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
+        .phys_io        = S3C_PA_UART & 0xfff00000,
+        .io_pg_offst    = (((u32)S3C_VA_UART) >> 18) & 0xfffc,
+        .boot_params    = S5P_PA_SDRAM + 0x100,
+        .init_irq       = s5pv210_init_irq,
+        .map_io         = smdkc110_map_io,
+        .init_machine   = smdkc110_machine_init,
+        .timer          = &s3c24xx_timer,
+MACHINE_END
diff --git a/arch/arm/mach-s5pv210/mach-smdkv210.c b/arch/arm/mach-s5pv210/mach-smdkv210.c
new file mode 100644
index 000000000000..a27883253204
--- /dev/null
+++ b/arch/arm/mach-s5pv210/mach-smdkv210.c
@@ -0,0 +1,98 @@
+/* linux/arch/arm/mach-s5pv210/mach-smdkv210.c
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <linux/init.h>
+#include <linux/serial_core.h>
+
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+#include <asm/setup.h>
+#include <asm/mach-types.h>
+
+#include <mach/map.h>
+#include <mach/regs-clock.h>
+
+#include <plat/regs-serial.h>
+#include <plat/s5pv210.h>
+#include <plat/devs.h>
+#include <plat/cpu.h>
+
+/* Following are default values for UCON, ULCON and UFCON UART registers */
+#define S5PV210_UCON_DEFAULT    (S3C2410_UCON_TXILEVEL |        \
+                                 S3C2410_UCON_RXILEVEL |        \
+                                 S3C2410_UCON_TXIRQMODE |       \
+                                 S3C2410_UCON_RXIRQMODE |       \
+                                 S3C2410_UCON_RXFIFO_TOI |      \
+                                 S3C2443_UCON_RXERR_IRQEN)
+
+#define S5PV210_ULCON_DEFAULT   S3C2410_LCON_CS8
+
+#define S5PV210_UFCON_DEFAULT   (S3C2410_UFCON_FIFOMODE |       \
+                                 S5PV210_UFCON_TXTRIG4 |        \
+                                 S5PV210_UFCON_RXTRIG4)
+
+static struct s3c2410_uartcfg smdkv210_uartcfgs[] __initdata = {
+        [0] = {
+                .hwport         = 0,
+                .flags          = 0,
+                .ucon           = S5PV210_UCON_DEFAULT,
+                .ulcon          = S5PV210_ULCON_DEFAULT,
+                .ufcon          = S5PV210_UFCON_DEFAULT,
+        },
+        [1] = {
+                .hwport         = 1,
+                .flags          = 0,
+                .ucon           = S5PV210_UCON_DEFAULT,
+                .ulcon          = S5PV210_ULCON_DEFAULT,
+                .ufcon          = S5PV210_UFCON_DEFAULT,
+        },
+        [2] = {
+                .hwport         = 2,
+                .flags          = 0,
+                .ucon           = S5PV210_UCON_DEFAULT,
+                .ulcon          = S5PV210_ULCON_DEFAULT,
+                .ufcon          = S5PV210_UFCON_DEFAULT,
+        },
+        [3] = {
+                .hwport         = 3,
+                .flags          = 0,
+                .ucon           = S5PV210_UCON_DEFAULT,
+                .ulcon          = S5PV210_ULCON_DEFAULT,
+                .ufcon          = S5PV210_UFCON_DEFAULT,
+        },
+};
+
+static struct platform_device *smdkv210_devices[] __initdata = {
+};
+
+static void __init smdkv210_map_io(void)
+{
+        s5p_init_io(NULL, 0, S5P_VA_CHIPID);
+        s3c24xx_init_clocks(24000000);
+        s3c24xx_init_uarts(smdkv210_uartcfgs, ARRAY_SIZE(smdkv210_uartcfgs));
+}
+
+static void __init smdkv210_machine_init(void)
+{
+        platform_add_devices(smdkv210_devices, ARRAY_SIZE(smdkv210_devices));
+}
+
+MACHINE_START(SMDKV210, "SMDKV210")
+        /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
+        .phys_io        = S3C_PA_UART & 0xfff00000,
+        .io_pg_offst    = (((u32)S3C_VA_UART) >> 18) & 0xfffc,
+        .boot_params    = S5P_PA_SDRAM + 0x100,
+        .init_irq       = s5pv210_init_irq,
+        .map_io         = smdkv210_map_io,
+        .init_machine   = smdkv210_machine_init,
+        .timer          = &s3c24xx_timer,
+MACHINE_END
diff --git a/arch/arm/mach-sa1100/badge4.c b/arch/arm/mach-sa1100/badge4.c
index 051ec0f0023c..259cb2c15fff 100644
--- a/arch/arm/mach-sa1100/badge4.c
+++ b/arch/arm/mach-sa1100/badge4.c
@@ -51,6 +51,10 @@ static struct resource sa1111_resources[] = {
         },
 };
 
+static struct sa1111_platform_data sa1111_info = {
+        .irq_base       = IRQ_BOARD_END,
+};
+
 static u64 sa1111_dmamask = 0xffffffffUL;
 
 static struct platform_device sa1111_device = {
@@ -59,6 +63,7 @@ static struct platform_device sa1111_device = {
         .dev            = {
                 .dma_mask = &sa1111_dmamask,
                 .coherent_dma_mask = 0xffffffff,
+                .platform_data = &sa1111_info,
         },
         .num_resources  = ARRAY_SIZE(sa1111_resources),
         .resource       = sa1111_resources,
diff --git a/arch/arm/mach-sa1100/collie.c b/arch/arm/mach-sa1100/collie.c
index 9982c5c28edf..5d5f330c5d94 100644
--- a/arch/arm/mach-sa1100/collie.c
+++ b/arch/arm/mach-sa1100/collie.c
@@ -234,6 +234,10 @@ static struct resource locomo_resources[] = {
         },
 };
 
+static struct locomo_platform_data locomo_info = {
+        .irq_base       = IRQ_BOARD_START,
+};
+
 struct platform_device collie_locomo_device = {
         .name           = "locomo",
         .id             = 0,
diff --git a/arch/arm/mach-sa1100/include/mach/collie.h b/arch/arm/mach-sa1100/include/mach/collie.h
index 71a0b3fdcc8c..52acda7061b7 100644
--- a/arch/arm/mach-sa1100/include/mach/collie.h
+++ b/arch/arm/mach-sa1100/include/mach/collie.h
@@ -72,13 +72,6 @@
 #define COLLIE_IRQ_GPIO_GA_INT          IRQ_GPIO25
 #define COLLIE_IRQ_GPIO_MAIN_BAT_LOW    IRQ_GPIO26
 
-#define COLLIE_LCM_IRQ_GPIO_RTS         IRQ_LOCOMO_GPIO0
-#define COLLIE_LCM_IRQ_GPIO_CTS         IRQ_LOCOMO_GPIO1
-#define COLLIE_LCM_IRQ_GPIO_DSR         IRQ_LOCOMO_GPIO2
-#define COLLIE_LCM_IRQ_GPIO_DTR         IRQ_LOCOMO_GPIO3
-#define COLLIE_LCM_IRQ_GPIO_nSD_DETECT  IRQ_LOCOMO_GPIO13
-#define COLLIE_LCM_IRQ_GPIO_nSD_WP      IRQ_LOCOMO_GPIO14
-
 /* GPIO's on the TC35143AF (Toshiba Analog Frontend) */
 #define COLLIE_TC35143_GPIO_BASE        (GPIO_MAX + 13)
 #define COLLIE_TC35143_GPIO_VERSION0    UCB_IO_0
diff --git a/arch/arm/mach-sa1100/include/mach/irqs.h b/arch/arm/mach-sa1100/include/mach/irqs.h
index ae81f80b0cf9..8c8845b5ae5b 100644
--- a/arch/arm/mach-sa1100/include/mach/irqs.h
+++ b/arch/arm/mach-sa1100/include/mach/irqs.h
@@ -68,93 +68,17 @@
 #define IRQ_BOARD_START         49
 #define IRQ_BOARD_END           65
 
-#define IRQ_SA1111_START        (IRQ_BOARD_END)
-#define IRQ_GPAIN0              (IRQ_BOARD_END + 0)
-#define IRQ_GPAIN1              (IRQ_BOARD_END + 1)
-#define IRQ_GPAIN2              (IRQ_BOARD_END + 2)
-#define IRQ_GPAIN3              (IRQ_BOARD_END + 3)
-#define IRQ_GPBIN0              (IRQ_BOARD_END + 4)
-#define IRQ_GPBIN1              (IRQ_BOARD_END + 5)
-#define IRQ_GPBIN2              (IRQ_BOARD_END + 6)
-#define IRQ_GPBIN3              (IRQ_BOARD_END + 7)
-#define IRQ_GPBIN4              (IRQ_BOARD_END + 8)
-#define IRQ_GPBIN5              (IRQ_BOARD_END + 9)
-#define IRQ_GPCIN0              (IRQ_BOARD_END + 10)
-#define IRQ_GPCIN1              (IRQ_BOARD_END + 11)
-#define IRQ_GPCIN2              (IRQ_BOARD_END + 12)
-#define IRQ_GPCIN3              (IRQ_BOARD_END + 13)
-#define IRQ_GPCIN4              (IRQ_BOARD_END + 14)
-#define IRQ_GPCIN5              (IRQ_BOARD_END + 15)
-#define IRQ_GPCIN6              (IRQ_BOARD_END + 16)
-#define IRQ_GPCIN7              (IRQ_BOARD_END + 17)
-#define IRQ_MSTXINT             (IRQ_BOARD_END + 18)
-#define IRQ_MSRXINT             (IRQ_BOARD_END + 19)
-#define IRQ_MSSTOPERRINT        (IRQ_BOARD_END + 20)
-#define IRQ_TPTXINT             (IRQ_BOARD_END + 21)
-#define IRQ_TPRXINT             (IRQ_BOARD_END + 22)
-#define IRQ_TPSTOPERRINT        (IRQ_BOARD_END + 23)
-#define SSPXMTINT               (IRQ_BOARD_END + 24)
-#define SSPRCVINT               (IRQ_BOARD_END + 25)
-#define SSPROR                  (IRQ_BOARD_END + 26)
-#define AUDXMTDMADONEA          (IRQ_BOARD_END + 32)
-#define AUDRCVDMADONEA          (IRQ_BOARD_END + 33)
-#define AUDXMTDMADONEB          (IRQ_BOARD_END + 34)
-#define AUDRCVDMADONEB          (IRQ_BOARD_END + 35)
-#define AUDTFSR                 (IRQ_BOARD_END + 36)
-#define AUDRFSR                 (IRQ_BOARD_END + 37)
-#define AUDTUR                  (IRQ_BOARD_END + 38)
-#define AUDROR                  (IRQ_BOARD_END + 39)
-#define AUDDTS                  (IRQ_BOARD_END + 40)
-#define AUDRDD                  (IRQ_BOARD_END + 41)
-#define AUDSTO                  (IRQ_BOARD_END + 42)
-#define IRQ_USBPWR              (IRQ_BOARD_END + 43)
-#define IRQ_HCIM                (IRQ_BOARD_END + 44)
-#define IRQ_HCIBUFFACC          (IRQ_BOARD_END + 45)
-#define IRQ_HCIRMTWKP           (IRQ_BOARD_END + 46)
-#define IRQ_NHCIMFCIR           (IRQ_BOARD_END + 47)
-#define IRQ_USB_PORT_RESUME     (IRQ_BOARD_END + 48)
-#define IRQ_S0_READY_NINT       (IRQ_BOARD_END + 49)
-#define IRQ_S1_READY_NINT       (IRQ_BOARD_END + 50)
-#define IRQ_S0_CD_VALID         (IRQ_BOARD_END + 51)
-#define IRQ_S1_CD_VALID         (IRQ_BOARD_END + 52)
-#define IRQ_S0_BVD1_STSCHG      (IRQ_BOARD_END + 53)
-#define IRQ_S1_BVD1_STSCHG      (IRQ_BOARD_END + 54)
-
-#define IRQ_LOCOMO_START        (IRQ_BOARD_END)
-#define IRQ_LOCOMO_KEY          (IRQ_BOARD_END + 0)
-#define IRQ_LOCOMO_GPIO0        (IRQ_BOARD_END + 1)
-#define IRQ_LOCOMO_GPIO1        (IRQ_BOARD_END + 2)
-#define IRQ_LOCOMO_GPIO2        (IRQ_BOARD_END + 3)
-#define IRQ_LOCOMO_GPIO3        (IRQ_BOARD_END + 4)
-#define IRQ_LOCOMO_GPIO4        (IRQ_BOARD_END + 5)
-#define IRQ_LOCOMO_GPIO5        (IRQ_BOARD_END + 6)
-#define IRQ_LOCOMO_GPIO6        (IRQ_BOARD_END + 7)
-#define IRQ_LOCOMO_GPIO7        (IRQ_BOARD_END + 8)
-#define IRQ_LOCOMO_GPIO8        (IRQ_BOARD_END + 9)
-#define IRQ_LOCOMO_GPIO9        (IRQ_BOARD_END + 10)
-#define IRQ_LOCOMO_GPIO10       (IRQ_BOARD_END + 11)
-#define IRQ_LOCOMO_GPIO11       (IRQ_BOARD_END + 12)
-#define IRQ_LOCOMO_GPIO12       (IRQ_BOARD_END + 13)
-#define IRQ_LOCOMO_GPIO13       (IRQ_BOARD_END + 14)
-#define IRQ_LOCOMO_GPIO14       (IRQ_BOARD_END + 15)
-#define IRQ_LOCOMO_GPIO15       (IRQ_BOARD_END + 16)
-#define IRQ_LOCOMO_LT           (IRQ_BOARD_END + 17)
-#define IRQ_LOCOMO_SPI_RFR      (IRQ_BOARD_END + 18)
-#define IRQ_LOCOMO_SPI_RFW      (IRQ_BOARD_END + 19)
-#define IRQ_LOCOMO_SPI_REND     (IRQ_BOARD_END + 20)
-#define IRQ_LOCOMO_SPI_TEND     (IRQ_BOARD_END + 21)
-
 /*
  * Figure out the MAX IRQ number.
  *
  * If we have an SA1111, the max IRQ is S1_BVD1_STSCHG+1.
- * If we have an LoCoMo, the max IRQ is IRQ_LOCOMO_SPI_TEND+1
+ * If we have an LoCoMo, the max IRQ is IRQ_BOARD_START + 4
  * Otherwise, we have the standard IRQs only.
  */
 #ifdef CONFIG_SA1111
-#define NR_IRQS                 (IRQ_S1_BVD1_STSCHG + 1)
-#elif defined(CONFIG_SHARP_LOCOMO)
-#define NR_IRQS                 (IRQ_LOCOMO_SPI_TEND + 1)
+#define NR_IRQS                 (IRQ_BOARD_END + 55)
+#elif defined(CONFIG_SHARPSL_LOCOMO)
+#define NR_IRQS                 (IRQ_BOARD_START + 4)
 #else
 #define NR_IRQS                 (IRQ_BOARD_START)
 #endif
@@ -166,10 +90,3 @@
 #define IRQ_NEPONSET_SMC9196    (IRQ_BOARD_START + 0)
 #define IRQ_NEPONSET_USAR       (IRQ_BOARD_START + 1)
 #define IRQ_NEPONSET_SA1111     (IRQ_BOARD_START + 2)
-
-/* LoCoMo Interrupts (CONFIG_SHARP_LOCOMO) */
-#define IRQ_LOCOMO_KEY_BASE     (IRQ_BOARD_START + 0)
-#define IRQ_LOCOMO_GPIO_BASE    (IRQ_BOARD_START + 1)
-#define IRQ_LOCOMO_LT_BASE      (IRQ_BOARD_START + 2)
-#define IRQ_LOCOMO_SPI_BASE     (IRQ_BOARD_START + 3)
-
diff --git a/arch/arm/mach-sa1100/jornada720.c b/arch/arm/mach-sa1100/jornada720.c
index 13ebd2d99bfd..d3ec620618f1 100644
--- a/arch/arm/mach-sa1100/jornada720.c
+++ b/arch/arm/mach-sa1100/jornada720.c
@@ -208,6 +208,10 @@ static struct resource sa1111_resources[] = {
         },
 };
 
+static struct sa1111_platform_data sa1111_info = {
+        .irq_base       = IRQ_BOARD_END,
+};
+
 static u64 sa1111_dmamask = 0xffffffffUL;
 
 static struct platform_device sa1111_device = {
@@ -216,6 +220,7 @@ static struct platform_device sa1111_device = {
         .dev            = {
                 .dma_mask = &sa1111_dmamask,
                 .coherent_dma_mask = 0xffffffff,
+                .platform_data = &sa1111_info,
         },
         .num_resources  = ARRAY_SIZE(sa1111_resources),
         .resource       = sa1111_resources,
diff --git a/arch/arm/mach-sa1100/neponset.c b/arch/arm/mach-sa1100/neponset.c
index 6ccd175bc4cf..0b505d9f22d6 100644
--- a/arch/arm/mach-sa1100/neponset.c
+++ b/arch/arm/mach-sa1100/neponset.c
@@ -241,6 +241,10 @@ static struct resource sa1111_resources[] = {
         },
 };
 
+static struct sa1111_platform_data sa1111_info = {
+        .irq_base       = IRQ_BOARD_END,
+};
+
 static u64 sa1111_dmamask = 0xffffffffUL;
 
 static struct platform_device sa1111_device = {
@@ -249,6 +253,7 @@ static struct platform_device sa1111_device = {
         .dev            = {
                 .dma_mask = &sa1111_dmamask,
                 .coherent_dma_mask = 0xffffffff,
+                .platform_data = &sa1111_info,
         },
         .num_resources  = ARRAY_SIZE(sa1111_resources),
         .resource       = sa1111_resources,
diff --git a/arch/arm/mach-sa1100/time.c b/arch/arm/mach-sa1100/time.c
index b9cbb56d6e9d..74b6e0e570b6 100644
--- a/arch/arm/mach-sa1100/time.c
+++ b/arch/arm/mach-sa1100/time.c
@@ -35,14 +35,12 @@ static irqreturn_t sa1100_ost0_interrupt(int irq, void *dev_id)
 static int
 sa1100_osmr0_set_next_event(unsigned long delta, struct clock_event_device *c)
 {
-        unsigned long flags, next, oscr;
+        unsigned long next, oscr;
 
-        raw_local_irq_save(flags);
         OIER |= OIER_E0;
         next = OSCR + delta;
         OSMR0 = next;
         oscr = OSCR;
-        raw_local_irq_restore(flags);
 
         return (signed)(next - oscr) <= MIN_OSCR_DELTA ? -ETIME : 0;
 }
@@ -50,16 +48,12 @@ sa1100_osmr0_set_next_event(unsigned long delta, struct clock_event_device *c)
 static void
 sa1100_osmr0_set_mode(enum clock_event_mode mode, struct clock_event_device *c)
 {
-        unsigned long flags;
-
         switch (mode) {
         case CLOCK_EVT_MODE_ONESHOT:
         case CLOCK_EVT_MODE_UNUSED:
         case CLOCK_EVT_MODE_SHUTDOWN:
-                raw_local_irq_save(flags);
                 OIER &= ~OIER_E0;
                 OSSR = OSSR_M0;
-                raw_local_irq_restore(flags);
                 break;
 
         case CLOCK_EVT_MODE_RESUME:
diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig
new file mode 100644
index 000000000000..aeceb9b92aeb
--- /dev/null
+++ b/arch/arm/mach-shmobile/Kconfig
@@ -0,0 +1,84 @@
+if ARCH_SHMOBILE
+
+comment "SH-Mobile System Type"
+
+config ARCH_SH7367
+        bool "SH-Mobile G3 (SH7367)"
+        select CPU_V6
+        select HAVE_CLK
+        select COMMON_CLKDEV
+        select GENERIC_TIME
+        select GENERIC_CLOCKEVENTS
+
+config ARCH_SH7377
+        bool "SH-Mobile G4 (SH7377)"
+        select CPU_V7
+        select HAVE_CLK
+        select COMMON_CLKDEV
+        select GENERIC_TIME
+        select GENERIC_CLOCKEVENTS
+
+config ARCH_SH7372
+        bool "SH-Mobile AP4 (SH7372)"
+        select CPU_V7
+        select HAVE_CLK
+        select COMMON_CLKDEV
+        select GENERIC_TIME
+        select GENERIC_CLOCKEVENTS
+
+comment "SH-Mobile Board Type"
+
+config MACH_G3EVM
+        bool "G3EVM board"
+        depends on ARCH_SH7367
+        select ARCH_REQUIRE_GPIOLIB
+
+config MACH_G4EVM
+        bool "G4EVM board"
+        depends on ARCH_SH7377
+        select ARCH_REQUIRE_GPIOLIB
+
+config MACH_AP4EVB
+        bool "AP4EVB board"
+        depends on ARCH_SH7372
+        select ARCH_REQUIRE_GPIOLIB
+
+comment "SH-Mobile System Configuration"
+
+menu "Memory configuration"
+
+config MEMORY_START
+        hex "Physical memory start address"
+        default "0x50000000" if MACH_G3EVM
+        default "0x40000000" if MACH_G4EVM
+        default "0x40000000" if MACH_AP4EVB
+        default "0x00000000"
+        ---help---
+          Tweak this only when porting to a new machine which does not
+          already have a defconfig. Changing it from the known correct
+          value on any of the known systems will only lead to disaster.
+
+config MEMORY_SIZE
+        hex "Physical memory size"
+        default "0x08000000" if MACH_G3EVM
+        default "0x08000000" if MACH_G4EVM
+        default "0x10000000" if MACH_AP4EVB
+        default "0x04000000"
+        help
+          This sets the default memory size assumed by your kernel. It can
+          be overridden as normal by the 'mem=' argument on the kernel command
+          line.
+
+endmenu
+
+menu "Timer and clock configuration"
+
+config SH_TIMER_CMT
+        bool "CMT timer driver"
+        default y
+        help
+          This enables build of the CMT timer driver.
+
+endmenu
+
+endif
diff --git a/arch/arm/mach-shmobile/Makefile b/arch/arm/mach-shmobile/Makefile
new file mode 100644
index 000000000000..6d385d371c33
--- /dev/null
+++ b/arch/arm/mach-shmobile/Makefile
@@ -0,0 +1,22 @@
+#
+# Makefile for the linux kernel.
+#
+
+# Common objects
+obj-y                           := timer.o console.o
+
+# CPU objects
+obj-$(CONFIG_ARCH_SH7367)       += setup-sh7367.o clock-sh7367.o intc-sh7367.o
+obj-$(CONFIG_ARCH_SH7377)       += setup-sh7377.o clock-sh7367.o intc-sh7377.o
+obj-$(CONFIG_ARCH_SH7372)       += setup-sh7372.o clock-sh7367.o intc-sh7372.o
+
+# Pinmux setup
+pfc-$(CONFIG_ARCH_SH7367)       := pfc-sh7367.o
+pfc-$(CONFIG_ARCH_SH7377)       := pfc-sh7377.o
+pfc-$(CONFIG_ARCH_SH7372)       := pfc-sh7372.o
+obj-$(CONFIG_GENERIC_GPIO)      += $(pfc-y)
+
+# Board objects
+obj-$(CONFIG_MACH_G3EVM)        += board-g3evm.o
+obj-$(CONFIG_MACH_G4EVM)        += board-g4evm.o
+obj-$(CONFIG_MACH_AP4EVB)       += board-ap4evb.o
diff --git a/arch/arm/mach-shmobile/Makefile.boot b/arch/arm/mach-shmobile/Makefile.boot
new file mode 100644
index 000000000000..1c08ee9de86a
--- /dev/null
+++ b/arch/arm/mach-shmobile/Makefile.boot
@@ -0,0 +1,9 @@
+__ZRELADDR      := $(shell /bin/bash -c 'printf "0x%08x" \
+                     $$[$(CONFIG_MEMORY_START) + 0x8000]')
+
+   zreladdr-y   := $(__ZRELADDR)
+
+# Unsupported legacy stuff
+#
+#params_phys-y (Instead: Pass atags pointer in r2)
+#initrd_phys-y (Instead: Use compiled-in initramfs)
diff --git a/arch/arm/mach-shmobile/board-ap4evb.c b/arch/arm/mach-shmobile/board-ap4evb.c
new file mode 100644
index 000000000000..a0463d926447
--- /dev/null
+++ b/arch/arm/mach-shmobile/board-ap4evb.c
@@ -0,0 +1,301 @@
+/*
+ * AP4EVB board support
+ *
+ * Copyright (C) 2010  Magnus Damm
+ * Copyright (C) 2008  Yoshihiro Shimoda
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/interrupt.h>
+#include <linux/irq.h>
+#include <linux/platform_device.h>
+#include <linux/delay.h>
+#include <linux/mtd/mtd.h>
+#include <linux/mtd/partitions.h>
+#include <linux/mtd/physmap.h>
+#include <linux/io.h>
+#include <linux/smsc911x.h>
+#include <linux/gpio.h>
+#include <linux/input.h>
+#include <linux/input/sh_keysc.h>
+#include <mach/common.h>
+#include <mach/sh7372.h>
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+
+/*
+ * Address      Interface               BusWidth        note
+ * ------------------------------------------------------------------
+ * 0x0000_0000  NOR Flash ROM (MCP)     16bit           SW7 : bit1 = ON
+ * 0x0800_0000  user area               -
+ * 0x1000_0000  NOR Flash ROM (MCP)     16bit           SW7 : bit1 = OFF
+ * 0x1400_0000  Ether (LAN9220)         16bit
+ * 0x1600_0000  user area               -               cannot use with NAND
+ * 0x1800_0000  user area               -
+ * 0x1A00_0000  -
+ * 0x4000_0000  LPDDR2-SDRAM (POP)      32bit
+ */
+
+/*
+ * NOR Flash ROM
+ *
+ *  SW1  |     SW2    | SW7  | NOR Flash ROM
+ *  bit1 | bit1  bit2 | bit1 | Memory allocation
+ * ------+------------+------+------------------
+ *  OFF  | ON     OFF | ON   |    Area 0
+ *  OFF  | ON     OFF | OFF  |    Area 4
+ */
+
+/*
+ * NAND Flash ROM
+ *
+ *  SW1  |     SW2    | SW7  | NAND Flash ROM
+ *  bit1 | bit1  bit2 | bit2 | Memory allocation
+ * ------+------------+------+------------------
+ *  OFF  | ON     OFF | ON   |    FCE 0
+ *  OFF  | ON     OFF | OFF  |    FCE 1
+ */
+
+/*
+ * SMSC 9220
+ *
+ *  SW1         SMSC 9220
+ * -----------------------
+ *  ON          access disable
+ *  OFF         access enable
+ */
+
+/*
+ * KEYSC
+ *
+ * SW43         KEYSC
+ * -------------------------
+ * ON           enable
+ * OFF          disable
+ */
+
+/* MTD */
+static struct mtd_partition nor_flash_partitions[] = {
+        {
+                .name           = "loader",
+                .offset         = 0x00000000,
+                .size           = 512 * 1024,
+        },
+        {
+                .name           = "bootenv",
+                .offset         = MTDPART_OFS_APPEND,
+                .size           = 512 * 1024,
+        },
+        {
+                .name           = "kernel_ro",
+                .offset         = MTDPART_OFS_APPEND,
+                .size           = 8 * 1024 * 1024,
+                .mask_flags     = MTD_WRITEABLE,
+        },
+        {
+                .name           = "kernel",
+                .offset         = MTDPART_OFS_APPEND,
+                .size           = 8 * 1024 * 1024,
+        },
+        {
+                .name           = "data",
+                .offset         = MTDPART_OFS_APPEND,
+                .size           = MTDPART_SIZ_FULL,
+        },
+};
+
+static struct physmap_flash_data nor_flash_data = {
+        .width          = 2,
+        .parts          = nor_flash_partitions,
+        .nr_parts       = ARRAY_SIZE(nor_flash_partitions),
+};
+
+static struct resource nor_flash_resources[] = {
+        [0]     = {
+                .start  = 0x00000000,
+                .end    = 0x08000000 - 1,
+                .flags  = IORESOURCE_MEM,
+        }
+};
+
+static struct platform_device nor_flash_device = {
+        .name           = "physmap-flash",
+        .dev            = {
+                .platform_data  = &nor_flash_data,
+        },
+        .num_resources  = ARRAY_SIZE(nor_flash_resources),
+        .resource       = nor_flash_resources,
+};
+
+/* SMSC 9220 */
+static struct resource smc911x_resources[] = {
+        {
+                .start  = 0x14000000,
+                .end    = 0x16000000 - 1,
+                .flags  = IORESOURCE_MEM,
+        }, {
+                .start  = 6,
+                .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
+        },
+};
+
+static struct smsc911x_platform_config smsc911x_info = {
+        .flags          = SMSC911X_USE_16BIT | SMSC911X_SAVE_MAC_ADDRESS,
+        .irq_polarity   = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
+        .irq_type       = SMSC911X_IRQ_TYPE_PUSH_PULL,
+};
+
+static struct platform_device smc911x_device = {
+        .name           = "smsc911x",
+        .id             = -1,
+        .num_resources  = ARRAY_SIZE(smc911x_resources),
+        .resource       = smc911x_resources,
+        .dev            = {
+                .platform_data = &smsc911x_info,
+        },
+};
+
+/* KEYSC (Needs SW43 set to ON) */
+static struct sh_keysc_info keysc_info = {
+        .mode           = SH_KEYSC_MODE_1,
+        .scan_timing    = 3,
+        .delay          = 2500,
+        .keycodes = {
+                KEY_0, KEY_1, KEY_2, KEY_3, KEY_4,
+                KEY_5, KEY_6, KEY_7, KEY_8, KEY_9,
+                KEY_A, KEY_B, KEY_C, KEY_D, KEY_E,
+                KEY_F, KEY_G, KEY_H, KEY_I, KEY_J,
+                KEY_K, KEY_L, KEY_M, KEY_N, KEY_O,
+        },
+};
+
+static struct resource keysc_resources[] = {
+        [0] = {
+                .name   = "KEYSC",
+                .start  = 0xe61b0000,
+                .end    = 0xe61b0063,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 79,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device keysc_device = {
+        .name           = "sh_keysc",
+        .id             = 0, /* "keysc0" clock */
+        .num_resources  = ARRAY_SIZE(keysc_resources),
+        .resource       = keysc_resources,
+        .dev    = {
+                .platform_data  = &keysc_info,
+        },
+};
+
+static struct platform_device *ap4evb_devices[] __initdata = {
+        &nor_flash_device,
+        &smc911x_device,
+        &keysc_device,
+};
+
+static struct map_desc ap4evb_io_desc[] __initdata = {
+        /* create a 1:1 entity map for 0xe6xxxxxx
+         * used by CPGA, INTC and PFC.
+         */
+        {
+                .virtual        = 0xe6000000,
+                .pfn            = __phys_to_pfn(0xe6000000),
+                .length         = 256 << 20,
+                .type           = MT_DEVICE_NONSHARED
+        },
+};
+
+static void __init ap4evb_map_io(void)
+{
+        iotable_init(ap4evb_io_desc, ARRAY_SIZE(ap4evb_io_desc));
+
+        /* setup early devices, clocks and console here as well */
+        sh7372_add_early_devices();
+        sh7367_clock_init(); /* use g3 clocks for now */
+        shmobile_setup_console();
+}
+
+static void __init ap4evb_init(void)
+{
+        sh7372_pinmux_init();
+
+        /* enable SCIFA0 */
+        gpio_request(GPIO_FN_SCIFA0_TXD, NULL);
+        gpio_request(GPIO_FN_SCIFA0_RXD, NULL);
+
+        /* enable SMSC911X */
+        gpio_request(GPIO_FN_CS5A,      NULL);
+        gpio_request(GPIO_FN_IRQ6_39,   NULL);
+
+        /* enable LED 1 - 4 */
+        gpio_request(GPIO_PORT185, NULL);
+        gpio_request(GPIO_PORT186, NULL);
+        gpio_request(GPIO_PORT187, NULL);
+        gpio_request(GPIO_PORT188, NULL);
+        gpio_direction_output(GPIO_PORT185, 1);
+        gpio_direction_output(GPIO_PORT186, 1);
+        gpio_direction_output(GPIO_PORT187, 1);
+        gpio_direction_output(GPIO_PORT188, 1);
+        gpio_export(GPIO_PORT185, 0);
+        gpio_export(GPIO_PORT186, 0);
+        gpio_export(GPIO_PORT187, 0);
+        gpio_export(GPIO_PORT188, 0);
+
+        /* enable Debug switch (S6) */
+        gpio_request(GPIO_PORT32, NULL);
+        gpio_request(GPIO_PORT33, NULL);
+        gpio_request(GPIO_PORT34, NULL);
+        gpio_request(GPIO_PORT35, NULL);
+        gpio_direction_input(GPIO_PORT32);
+        gpio_direction_input(GPIO_PORT33);
+        gpio_direction_input(GPIO_PORT34);
+        gpio_direction_input(GPIO_PORT35);
+        gpio_export(GPIO_PORT32, 0);
+        gpio_export(GPIO_PORT33, 0);
+        gpio_export(GPIO_PORT34, 0);
+        gpio_export(GPIO_PORT35, 0);
+
+        /* enable KEYSC */
+        gpio_request(GPIO_FN_KEYOUT0, NULL);
+        gpio_request(GPIO_FN_KEYOUT1, NULL);
+        gpio_request(GPIO_FN_KEYOUT2, NULL);
+        gpio_request(GPIO_FN_KEYOUT3, NULL);
+        gpio_request(GPIO_FN_KEYOUT4, NULL);
+        gpio_request(GPIO_FN_KEYIN0_136, NULL);
+        gpio_request(GPIO_FN_KEYIN1_135, NULL);
+        gpio_request(GPIO_FN_KEYIN2_134, NULL);
+        gpio_request(GPIO_FN_KEYIN3_133, NULL);
+        gpio_request(GPIO_FN_KEYIN4,     NULL);
+
+        sh7372_add_standard_devices();
+
+        platform_add_devices(ap4evb_devices, ARRAY_SIZE(ap4evb_devices));
+}
+
+MACHINE_START(AP4EVB, "ap4evb")
+        .phys_io        = 0xe6000000,
+        .io_pg_offst    = ((0xe6000000) >> 18) & 0xfffc,
+        .map_io         = ap4evb_map_io,
+        .init_irq       = sh7372_init_irq,
+        .init_machine   = ap4evb_init,
+        .timer          = &shmobile_timer,
+MACHINE_END
diff --git a/arch/arm/mach-shmobile/board-g3evm.c b/arch/arm/mach-shmobile/board-g3evm.c
new file mode 100644
index 000000000000..f36c9a94d326
--- /dev/null
+++ b/arch/arm/mach-shmobile/board-g3evm.c
@@ -0,0 +1,211 @@
+/*
+ * G3EVM board support
+ *
+ * Copyright (C) 2010  Magnus Damm
+ * Copyright (C) 2008  Yoshihiro Shimoda
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/interrupt.h>
+#include <linux/irq.h>
+#include <linux/platform_device.h>
+#include <linux/delay.h>
+#include <linux/mtd/mtd.h>
+#include <linux/mtd/partitions.h>
+#include <linux/mtd/physmap.h>
+#include <linux/usb/r8a66597.h>
+#include <linux/io.h>
+#include <linux/gpio.h>
+#include <mach/sh7367.h>
+#include <mach/common.h>
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+
+static struct mtd_partition nor_flash_partitions[] = {
+        {
+                .name           = "loader",
+                .offset         = 0x00000000,
+                .size           = 512 * 1024,
+        },
+        {
+                .name           = "bootenv",
+                .offset         = MTDPART_OFS_APPEND,
+                .size           = 512 * 1024,
+        },
+        {
+                .name           = "kernel_ro",
+                .offset         = MTDPART_OFS_APPEND,
+                .size           = 8 * 1024 * 1024,
+                .mask_flags     = MTD_WRITEABLE,
+        },
+        {
+                .name           = "kernel",
+                .offset         = MTDPART_OFS_APPEND,
+                .size           = 8 * 1024 * 1024,
+        },
+        {
+                .name           = "data",
+                .offset         = MTDPART_OFS_APPEND,
+                .size           = MTDPART_SIZ_FULL,
+        },
+};
+
+static struct physmap_flash_data nor_flash_data = {
+        .width          = 2,
+        .parts          = nor_flash_partitions,
+        .nr_parts       = ARRAY_SIZE(nor_flash_partitions),
+};
+
+static struct resource nor_flash_resources[] = {
+        [0]     = {
+                .start  = 0x00000000,
+                .end    = 0x08000000 - 1,
+                .flags  = IORESOURCE_MEM,
+        }
+};
+
+static struct platform_device nor_flash_device = {
+        .name           = "physmap-flash",
+        .dev            = {
+                .platform_data  = &nor_flash_data,
+        },
+        .num_resources  = ARRAY_SIZE(nor_flash_resources),
+        .resource       = nor_flash_resources,
+};
+
+/* USBHS */
+void usb_host_port_power(int port, int power)
+{
+        if (!power) /* only power-on supported for now */
+                return;
+
+        /* set VBOUT/PWEN and EXTLP0 in DVSTCTR */
+        __raw_writew(__raw_readw(0xe6890008) | 0x600, 0xe6890008);
+}
+
+static struct r8a66597_platdata usb_host_data = {
+        .on_chip = 1,
+        .port_power = usb_host_port_power,
+};
+
+static struct resource usb_host_resources[] = {
+        [0] = {
+                .name   = "USBHS",
+                .start  = 0xe6890000,
+                .end    = 0xe68900e5,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 65,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device usb_host_device = {
+        .name           = "r8a66597_hcd",
+        .id             = 0,
+        .dev = {
+                .platform_data          = &usb_host_data,
+                .dma_mask               = NULL,
+                .coherent_dma_mask      = 0xffffffff,
+        },
+        .num_resources  = ARRAY_SIZE(usb_host_resources),
+        .resource       = usb_host_resources,
+};
+
+static struct platform_device *g3evm_devices[] __initdata = {
+        &nor_flash_device,
+        &usb_host_device,
+};
+
+static struct map_desc g3evm_io_desc[] __initdata = {
+        /* create a 1:1 entity map for 0xe6xxxxxx
+         * used by CPGA, INTC and PFC.
+         */
+        {
+                .virtual        = 0xe6000000,
+                .pfn            = __phys_to_pfn(0xe6000000),
+                .length         = 256 << 20,
+                .type           = MT_DEVICE_NONSHARED
+        },
+};
+
+static void __init g3evm_map_io(void)
+{
+        iotable_init(g3evm_io_desc, ARRAY_SIZE(g3evm_io_desc));
+
+        /* setup early devices, clocks and console here as well */
+        sh7367_add_early_devices();
+        sh7367_clock_init();
+        shmobile_setup_console();
+}
+
+static void __init g3evm_init(void)
+{
+        sh7367_pinmux_init();
+
+        /* Lit DS4 LED */
+        gpio_request(GPIO_PORT22, NULL);
+        gpio_direction_output(GPIO_PORT22, 1);
+        gpio_export(GPIO_PORT22, 0);
+
+        /* Lit DS8 LED */
+        gpio_request(GPIO_PORT23, NULL);
+        gpio_direction_output(GPIO_PORT23, 1);
+        gpio_export(GPIO_PORT23, 0);
+
+        /* Lit DS3 LED */
+        gpio_request(GPIO_PORT24, NULL);
+        gpio_direction_output(GPIO_PORT24, 1);
+        gpio_export(GPIO_PORT24, 0);
+
+        /* SCIFA1 */
+        gpio_request(GPIO_FN_SCIFA1_TXD, NULL);
+        gpio_request(GPIO_FN_SCIFA1_RXD, NULL);
+        gpio_request(GPIO_FN_SCIFA1_CTS, NULL);
+        gpio_request(GPIO_FN_SCIFA1_RTS, NULL);
+
+        /* USBHS */
+        gpio_request(GPIO_FN_VBUS0, NULL);
+        gpio_request(GPIO_FN_PWEN, NULL);
+        gpio_request(GPIO_FN_OVCN, NULL);
+        gpio_request(GPIO_FN_OVCN2, NULL);
+        gpio_request(GPIO_FN_EXTLP, NULL);
+        gpio_request(GPIO_FN_IDIN, NULL);
+
+        /* enable clock in SYMSTPCR2 */
+        __raw_writel(__raw_readl(0xe6158048) & ~(1 << 22), 0xe6158048);
+
+        /* setup USB phy */
+        __raw_writew(0x0300, 0xe605810a);       /* USBCR1 */
+        __raw_writew(0x00e0, 0xe60581c0);       /* CPFCH */
+        __raw_writew(0x6010, 0xe60581c6);       /* CGPOSR */
+        __raw_writew(0x8a0a, 0xe605810c);       /* USBCR2 */
+
+        sh7367_add_standard_devices();
+
+        platform_add_devices(g3evm_devices, ARRAY_SIZE(g3evm_devices));
+}
+
+MACHINE_START(G3EVM, "g3evm")
+        .phys_io        = 0xe6000000,
+        .io_pg_offst    = ((0xe6000000) >> 18) & 0xfffc,
+        .map_io         = g3evm_map_io,
+        .init_irq       = sh7367_init_irq,
+        .init_machine   = g3evm_init,
+        .timer          = &shmobile_timer,
+MACHINE_END
diff --git a/arch/arm/mach-shmobile/board-g4evm.c b/arch/arm/mach-shmobile/board-g4evm.c
new file mode 100644
index 000000000000..5acd623f93e7
--- /dev/null
+++ b/arch/arm/mach-shmobile/board-g4evm.c
@@ -0,0 +1,211 @@
+/*
+ * G4EVM board support
+ *
+ * Copyright (C) 2010  Magnus Damm
+ * Copyright (C) 2008  Yoshihiro Shimoda
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/interrupt.h>
+#include <linux/irq.h>
+#include <linux/platform_device.h>
+#include <linux/delay.h>
+#include <linux/mtd/mtd.h>
+#include <linux/mtd/partitions.h>
+#include <linux/mtd/physmap.h>
+#include <linux/usb/r8a66597.h>
+#include <linux/io.h>
+#include <linux/gpio.h>
+#include <mach/sh7377.h>
+#include <mach/common.h>
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+
+static struct mtd_partition nor_flash_partitions[] = {
+        {
+                .name           = "loader",
+                .offset         = 0x00000000,
+                .size           = 512 * 1024,
+        },
+        {
+                .name           = "bootenv",
+                .offset         = MTDPART_OFS_APPEND,
+                .size           = 512 * 1024,
+        },
+        {
+                .name           = "kernel_ro",
+                .offset         = MTDPART_OFS_APPEND,
+                .size           = 8 * 1024 * 1024,
+                .mask_flags     = MTD_WRITEABLE,
+        },
+        {
+                .name           = "kernel",
+                .offset         = MTDPART_OFS_APPEND,
+                .size           = 8 * 1024 * 1024,
+        },
+        {
+                .name           = "data",
+                .offset         = MTDPART_OFS_APPEND,
+                .size           = MTDPART_SIZ_FULL,
+        },
+};
+
+static struct physmap_flash_data nor_flash_data = {
+        .width          = 2,
+        .parts          = nor_flash_partitions,
+        .nr_parts       = ARRAY_SIZE(nor_flash_partitions),
+};
+
+static struct resource nor_flash_resources[] = {
+        [0]     = {
+                .start  = 0x00000000,
+                .end    = 0x08000000 - 1,
+                .flags  = IORESOURCE_MEM,
+        }
+};
+
+static struct platform_device nor_flash_device = {
+        .name           = "physmap-flash",
+        .dev            = {
+                .platform_data  = &nor_flash_data,
+        },
+        .num_resources  = ARRAY_SIZE(nor_flash_resources),
+        .resource       = nor_flash_resources,
+};
+
+/* USBHS */
+void usb_host_port_power(int port, int power)
+{
+        if (!power) /* only power-on supported for now */
+                return;
+
+        /* set VBOUT/PWEN and EXTLP0 in DVSTCTR */
+        __raw_writew(__raw_readw(0xe6890008) | 0x600, 0xe6890008);
+}
+
+static struct r8a66597_platdata usb_host_data = {
+        .on_chip = 1,
+        .port_power = usb_host_port_power,
+};
+
+static struct resource usb_host_resources[] = {
+        [0] = {
+                .name   = "USBHS",
+                .start  = 0xe6890000,
+                .end    = 0xe68900e5,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 65,
+                .end    = 65,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device usb_host_device = {
+        .name           = "r8a66597_hcd",
+        .id             = 0,
+        .dev = {
+                .platform_data          = &usb_host_data,
+                .dma_mask               = NULL,
+                .coherent_dma_mask      = 0xffffffff,
+        },
+        .num_resources  = ARRAY_SIZE(usb_host_resources),
+        .resource       = usb_host_resources,
+};
+
+static struct platform_device *g4evm_devices[] __initdata = {
+        &nor_flash_device,
+        &usb_host_device,
+};
+
+static struct map_desc g4evm_io_desc[] __initdata = {
+        /* create a 1:1 entity map for 0xe6xxxxxx
+         * used by CPGA, INTC and PFC.
+         */
+        {
+                .virtual        = 0xe6000000,
+                .pfn            = __phys_to_pfn(0xe6000000),
+                .length         = 256 << 20,
+                .type           = MT_DEVICE_NONSHARED
+        },
+};
+
+static void __init g4evm_map_io(void)
+{
+        iotable_init(g4evm_io_desc, ARRAY_SIZE(g4evm_io_desc));
+
+        /* setup early devices, clocks and console here as well */
+        sh7377_add_early_devices();
+        sh7367_clock_init(); /* use g3 clocks for now */
+        shmobile_setup_console();
+}
+
+static void __init g4evm_init(void)
+{
+        sh7377_pinmux_init();
+
+        /* Lit DS14 LED */
+        gpio_request(GPIO_PORT109, NULL);
+        gpio_direction_output(GPIO_PORT109, 1);
+        gpio_export(GPIO_PORT109, 1);
+
+        /* Lit DS15 LED */
+        gpio_request(GPIO_PORT110, NULL);
+        gpio_direction_output(GPIO_PORT110, 1);
+        gpio_export(GPIO_PORT110, 1);
+
+        /* Lit DS16 LED */
+        gpio_request(GPIO_PORT112, NULL);
+        gpio_direction_output(GPIO_PORT112, 1);
+        gpio_export(GPIO_PORT112, 1);
+
+        /* Lit DS17 LED */
+        gpio_request(GPIO_PORT113, NULL);
+        gpio_direction_output(GPIO_PORT113, 1);
+        gpio_export(GPIO_PORT113, 1);
+
+        /* USBHS */
+        gpio_request(GPIO_FN_VBUS_0, NULL);
+        gpio_request(GPIO_FN_PWEN, NULL);
+        gpio_request(GPIO_FN_OVCN, NULL);
+        gpio_request(GPIO_FN_OVCN2, NULL);
+        gpio_request(GPIO_FN_EXTLP, NULL);
+        gpio_request(GPIO_FN_IDIN, NULL);
+
+        /* enable clock in SMSTPCR3 */
+        __raw_writel(__raw_readl(0xe615013c) & ~(1 << 22), 0xe615013c);
+
+        /* setup USB phy */
+        __raw_writew(0x0200, 0xe605810a);       /* USBCR1 */
+        __raw_writew(0x00e0, 0xe60581c0);       /* CPFCH */
+        __raw_writew(0x6010, 0xe60581c6);       /* CGPOSR */
+        __raw_writew(0x8a0a, 0xe605810c);       /* USBCR2 */
+
+        sh7377_add_standard_devices();
+
+        platform_add_devices(g4evm_devices, ARRAY_SIZE(g4evm_devices));
+}
+
+MACHINE_START(G4EVM, "g4evm")
+        .phys_io        = 0xe6000000,
+        .io_pg_offst    = ((0xe6000000) >> 18) & 0xfffc,
+        .map_io         = g4evm_map_io,
+        .init_irq       = sh7377_init_irq,
+        .init_machine   = g4evm_init,
+        .timer          = &shmobile_timer,
+MACHINE_END
diff --git a/arch/arm/mach-shmobile/clock-sh7367.c b/arch/arm/mach-shmobile/clock-sh7367.c
new file mode 100644
index 000000000000..58bd54e1113a
--- /dev/null
+++ b/arch/arm/mach-shmobile/clock-sh7367.c
@@ -0,0 +1,96 @@
+/*
+ * Preliminary clock framework support for sh7367
+ *
+ * Copyright (C) 2010  Magnus Damm
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/list.h>
+#include <linux/clk.h>
+
+struct clk {
+        const char *name;
+        unsigned long rate;
+};
+
+#include <asm/clkdev.h>
+
+int __clk_get(struct clk *clk)
+{
+        return 1;
+}
+EXPORT_SYMBOL(__clk_get);
+
+void __clk_put(struct clk *clk)
+{
+}
+EXPORT_SYMBOL(__clk_put);
+
+
+int clk_enable(struct clk *clk)
+{
+        return 0;
+}
+EXPORT_SYMBOL(clk_enable);
+
+void clk_disable(struct clk *clk)
+{
+}
+EXPORT_SYMBOL(clk_disable);
+
+unsigned long clk_get_rate(struct clk *clk)
+{
+        return clk ? clk->rate : 0;
+}
+EXPORT_SYMBOL(clk_get_rate);
+
+/* a static peripheral clock for now - enough to get sh-sci working */
+static struct clk peripheral_clk = {
+        .name       = "peripheral_clk",
+        .rate       = 48000000,
+};
+
+/* a static rclk for now - enough to get sh_cmt working */
+static struct clk r_clk = {
+        .name       = "r_clk",
+        .rate       = 32768,
+};
+
+/* a static usb0 for now - enough to get r8a66597 working */
+static struct clk usb0_clk = {
+        .name       = "usb0",
+};
+
+static struct clk_lookup lookups[] = {
+        {
+                .clk = &peripheral_clk,
+        }, {
+                .clk = &r_clk,
+        }, {
+                .clk = &usb0_clk,
+        }
+};
+
+void __init sh7367_clock_init(void)
+{
+        int i;
+
+        for (i = 0; i < ARRAY_SIZE(lookups); i++) {
+                lookups[i].con_id = lookups[i].clk->name;
+                clkdev_add(&lookups[i]);
+        }
+}
diff --git a/arch/arm/mach-shmobile/console.c b/arch/arm/mach-shmobile/console.c
new file mode 100644
index 000000000000..9411a5bf4fd6
--- /dev/null
+++ b/arch/arm/mach-shmobile/console.c
@@ -0,0 +1,31 @@
+/*
+ * SH-Mobile Console
+ *
+ * Copyright (C) 2010  Magnus Damm
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <mach/common.h>
+#include <asm/mach/map.h>
+
+void __init shmobile_setup_console(void)
+{
+        parse_early_param();
+
+        /* Let earlyprintk output early console messages */
+        early_platform_driver_probe("earlyprintk", 1, 1);
+}
diff --git a/arch/arm/mach-shmobile/include/mach/clkdev.h b/arch/arm/mach-shmobile/include/mach/clkdev.h
new file mode 100644
index 000000000000..36d0163a857a
--- /dev/null
+++ b/arch/arm/mach-shmobile/include/mach/clkdev.h
@@ -0,0 +1,7 @@
+#ifndef __ASM_MACH_CLKDEV_H
+#define __ASM_MACH_CLKDEV_H
+
+int __clk_get(struct clk *clk);
+void __clk_put(struct clk *clk);
+
+#endif /* __ASM_MACH_CLKDEV_H */
diff --git a/arch/arm/mach-shmobile/include/mach/common.h b/arch/arm/mach-shmobile/include/mach/common.h
new file mode 100644
index 000000000000..57903605cc51
--- /dev/null
+++ b/arch/arm/mach-shmobile/include/mach/common.h
@@ -0,0 +1,23 @@
+#ifndef __ARCH_MACH_COMMON_H
+#define __ARCH_MACH_COMMON_H
+
+extern struct sys_timer shmobile_timer;
+extern void shmobile_setup_console(void);
+
+extern void sh7367_init_irq(void);
+extern void sh7367_add_early_devices(void);
+extern void sh7367_add_standard_devices(void);
+extern void sh7367_clock_init(void);
+extern void sh7367_pinmux_init(void);
+
+extern void sh7377_init_irq(void);
+extern void sh7377_add_early_devices(void);
+extern void sh7377_add_standard_devices(void);
+extern void sh7377_pinmux_init(void);
+
+extern void sh7372_init_irq(void);
+extern void sh7372_add_early_devices(void);
+extern void sh7372_add_standard_devices(void);
+extern void sh7372_pinmux_init(void);
+
+#endif /* __ARCH_MACH_COMMON_H */
diff --git a/arch/arm/mach-shmobile/include/mach/dma.h b/arch/arm/mach-shmobile/include/mach/dma.h
new file mode 100644
index 000000000000..40a8c178f10d
--- /dev/null
+++ b/arch/arm/mach-shmobile/include/mach/dma.h
@@ -0,0 +1 @@
+/* empty */
diff --git a/arch/arm/mach-shmobile/include/mach/entry-macro.S b/arch/arm/mach-shmobile/include/mach/entry-macro.S
new file mode 100644
index 000000000000..a285d13c7416
--- /dev/null
+++ b/arch/arm/mach-shmobile/include/mach/entry-macro.S
@@ -0,0 +1,39 @@
+/*
+ * Copyright (C) 2008 Renesas Solutions Corp.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+#include <mach/hardware.h>
+#include <mach/irqs.h>
+
+        .macro  disable_fiq
+        .endm
+
+        .macro  get_irqnr_preamble, base, tmp
+        ldr     \base, =INTFLGA
+        .endm
+
+        .macro  arch_ret_to_user, tmp1, tmp2
+        .endm
+
+        .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
+        ldr     \irqnr, [\base]
+        cmp     \irqnr, #0
+        beq     1000f
+        /* intevt to irq number */
+        lsr     \irqnr, \irqnr, #0x5
+        subs    \irqnr, \irqnr, #16
+
+1000:
+        .endm
diff --git a/arch/arm/mach-shmobile/include/mach/gpio.h b/arch/arm/mach-shmobile/include/mach/gpio.h
new file mode 100644
index 000000000000..5bc6bd444d72
--- /dev/null
+++ b/arch/arm/mach-shmobile/include/mach/gpio.h
@@ -0,0 +1,48 @@
+/*
+ * Generic GPIO API and pinmux table support
+ *
+ * Copyright (c) 2008  Magnus Damm
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+#ifndef __ASM_ARCH_GPIO_H
+#define __ASM_ARCH_GPIO_H
+
+#include <linux/kernel.h>
+#include <linux/errno.h>
+
+#define ARCH_NR_GPIOS 1024
+#include <linux/sh_pfc.h>
+
+#ifdef CONFIG_GPIOLIB
+
+static inline int gpio_get_value(unsigned gpio)
+{
+        return __gpio_get_value(gpio);
+}
+
+static inline void gpio_set_value(unsigned gpio, int value)
+{
+        __gpio_set_value(gpio, value);
+}
+
+static inline int gpio_cansleep(unsigned gpio)
+{
+        return __gpio_cansleep(gpio);
+}
+
+static inline int gpio_to_irq(unsigned gpio)
+{
+        return -ENOSYS;
+}
+
+static inline int irq_to_gpio(unsigned int irq)
+{
+        return -EINVAL;
+}
+
+#endif /* CONFIG_GPIOLIB */
+
+#endif /* __ASM_ARCH_GPIO_H */
diff --git a/arch/arm/mach-shmobile/include/mach/hardware.h b/arch/arm/mach-shmobile/include/mach/hardware.h
new file mode 100644
index 000000000000..3f0ef194603e
--- /dev/null
+++ b/arch/arm/mach-shmobile/include/mach/hardware.h
@@ -0,0 +1,7 @@
+#ifndef __ASM_MACH_HARDWARE_H
+#define __ASM_MACH_HARDWARE_H
+
+/* INTFLGA register - used by low level interrupt code in entry-macro.S */
+#define INTFLGA                 0xe6980018
+
+#endif /* __ASM_MACH_HARDWARE_H */
diff --git a/arch/arm/mach-shmobile/include/mach/io.h b/arch/arm/mach-shmobile/include/mach/io.h
new file mode 100644
index 000000000000..7339fe46cb7c
--- /dev/null
+++ b/arch/arm/mach-shmobile/include/mach/io.h
@@ -0,0 +1,9 @@
+#ifndef __ASM_MACH_IO_H
+#define __ASM_MACH_IO_H
+
+#define IO_SPACE_LIMIT          0xffffffff
+
+#define __io(a)                 ((void __iomem *)(a))
+#define __mem_pci(a)            (a)
+
+#endif /* __ASM_MACH_IO_H */
diff --git a/arch/arm/mach-shmobile/include/mach/irqs.h b/arch/arm/mach-shmobile/include/mach/irqs.h
new file mode 100644
index 000000000000..5179b72e1ee3
--- /dev/null
+++ b/arch/arm/mach-shmobile/include/mach/irqs.h
@@ -0,0 +1,10 @@
+#ifndef __ASM_MACH_IRQS_H
+#define __ASM_MACH_IRQS_H
+
+#define NR_IRQS         512
+#define NR_IRQS_LEGACY  8
+
+#define evt2irq(evt)            (((evt) >> 5) - 16)
+#define irq2evt(irq)            (((irq) + 16) << 5)
+
+#endif /* __ASM_MACH_IRQS_H */
diff --git a/arch/arm/mach-shmobile/include/mach/memory.h b/arch/arm/mach-shmobile/include/mach/memory.h
new file mode 100644
index 000000000000..e188183f4dce
--- /dev/null
+++ b/arch/arm/mach-shmobile/include/mach/memory.h
@@ -0,0 +1,7 @@
+#ifndef __ASM_MACH_MEMORY_H
+#define __ASM_MACH_MEMORY_H
+
+#define PHYS_OFFSET     UL(CONFIG_MEMORY_START)
+#define MEM_SIZE        UL(CONFIG_MEMORY_SIZE)
+
+#endif /* __ASM_MACH_MEMORY_H */
diff --git a/arch/arm/mach-shmobile/include/mach/sh7367.h b/arch/arm/mach-shmobile/include/mach/sh7367.h
new file mode 100644
index 000000000000..52d0de686f68
--- /dev/null
+++ b/arch/arm/mach-shmobile/include/mach/sh7367.h
@@ -0,0 +1,332 @@
+#ifndef __ASM_SH7367_H__
+#define __ASM_SH7367_H__
+
+/* Pin Function Controller:
+ * GPIO_FN_xx - GPIO used to select pin function
+ * GPIO_PORTxx - GPIO mapped to real I/O pin on CPU
+ */
+enum {
+        /* 49-1 -> 49-6 (GPIO) */
+        GPIO_PORT0, GPIO_PORT1, GPIO_PORT2, GPIO_PORT3, GPIO_PORT4,
+        GPIO_PORT5, GPIO_PORT6, GPIO_PORT7, GPIO_PORT8, GPIO_PORT9,
+
+        GPIO_PORT10, GPIO_PORT11, GPIO_PORT12, GPIO_PORT13, GPIO_PORT14,
+        GPIO_PORT15, GPIO_PORT16, GPIO_PORT17, GPIO_PORT18, GPIO_PORT19,
+
+        GPIO_PORT20, GPIO_PORT21, GPIO_PORT22, GPIO_PORT23, GPIO_PORT24,
+        GPIO_PORT25, GPIO_PORT26, GPIO_PORT27, GPIO_PORT28, GPIO_PORT29,
+
+        GPIO_PORT30, GPIO_PORT31, GPIO_PORT32, GPIO_PORT33, GPIO_PORT34,
+        GPIO_PORT35, GPIO_PORT36, GPIO_PORT37, GPIO_PORT38, GPIO_PORT39,
+
+        GPIO_PORT40, GPIO_PORT41, GPIO_PORT42, GPIO_PORT43, GPIO_PORT44,
+        GPIO_PORT45, GPIO_PORT46, GPIO_PORT47, GPIO_PORT48, GPIO_PORT49,
+
+        GPIO_PORT50, GPIO_PORT51, GPIO_PORT52, GPIO_PORT53, GPIO_PORT54,
+        GPIO_PORT55, GPIO_PORT56, GPIO_PORT57, GPIO_PORT58, GPIO_PORT59,
+
+        GPIO_PORT60, GPIO_PORT61, GPIO_PORT62, GPIO_PORT63, GPIO_PORT64,
+        GPIO_PORT65, GPIO_PORT66, GPIO_PORT67, GPIO_PORT68, GPIO_PORT69,
+
+        GPIO_PORT70, GPIO_PORT71, GPIO_PORT72, GPIO_PORT73, GPIO_PORT74,
+        GPIO_PORT75, GPIO_PORT76, GPIO_PORT77, GPIO_PORT78, GPIO_PORT79,
+
+        GPIO_PORT80, GPIO_PORT81, GPIO_PORT82, GPIO_PORT83, GPIO_PORT84,
+        GPIO_PORT85, GPIO_PORT86, GPIO_PORT87, GPIO_PORT88, GPIO_PORT89,
+
+        GPIO_PORT90, GPIO_PORT91, GPIO_PORT92, GPIO_PORT93, GPIO_PORT94,
+        GPIO_PORT95, GPIO_PORT96, GPIO_PORT97, GPIO_PORT98, GPIO_PORT99,
+
+        GPIO_PORT100, GPIO_PORT101, GPIO_PORT102, GPIO_PORT103, GPIO_PORT104,
+        GPIO_PORT105, GPIO_PORT106, GPIO_PORT107, GPIO_PORT108, GPIO_PORT109,
+
+        GPIO_PORT110, GPIO_PORT111, GPIO_PORT112, GPIO_PORT113, GPIO_PORT114,
+        GPIO_PORT115, GPIO_PORT116, GPIO_PORT117, GPIO_PORT118, GPIO_PORT119,
+
+        GPIO_PORT120, GPIO_PORT121, GPIO_PORT122, GPIO_PORT123, GPIO_PORT124,
+        GPIO_PORT125, GPIO_PORT126, GPIO_PORT127, GPIO_PORT128, GPIO_PORT129,
+
+        GPIO_PORT130, GPIO_PORT131, GPIO_PORT132, GPIO_PORT133, GPIO_PORT134,
+        GPIO_PORT135, GPIO_PORT136, GPIO_PORT137, GPIO_PORT138, GPIO_PORT139,
+
+        GPIO_PORT140, GPIO_PORT141, GPIO_PORT142, GPIO_PORT143, GPIO_PORT144,
+        GPIO_PORT145, GPIO_PORT146, GPIO_PORT147, GPIO_PORT148, GPIO_PORT149,
+
+        GPIO_PORT150, GPIO_PORT151, GPIO_PORT152, GPIO_PORT153, GPIO_PORT154,
+        GPIO_PORT155, GPIO_PORT156, GPIO_PORT157, GPIO_PORT158, GPIO_PORT159,
+
+        GPIO_PORT160, GPIO_PORT161, GPIO_PORT162, GPIO_PORT163, GPIO_PORT164,
+        GPIO_PORT165, GPIO_PORT166, GPIO_PORT167, GPIO_PORT168, GPIO_PORT169,
+
+        GPIO_PORT170, GPIO_PORT171, GPIO_PORT172, GPIO_PORT173, GPIO_PORT174,
+        GPIO_PORT175, GPIO_PORT176, GPIO_PORT177, GPIO_PORT178, GPIO_PORT179,
+
+        GPIO_PORT180, GPIO_PORT181, GPIO_PORT182, GPIO_PORT183, GPIO_PORT184,
+        GPIO_PORT185, GPIO_PORT186, GPIO_PORT187, GPIO_PORT188, GPIO_PORT189,
+
+        GPIO_PORT190, GPIO_PORT191, GPIO_PORT192, GPIO_PORT193, GPIO_PORT194,
+        GPIO_PORT195, GPIO_PORT196, GPIO_PORT197, GPIO_PORT198, GPIO_PORT199,
+
+        GPIO_PORT200, GPIO_PORT201, GPIO_PORT202, GPIO_PORT203, GPIO_PORT204,
+        GPIO_PORT205, GPIO_PORT206, GPIO_PORT207, GPIO_PORT208, GPIO_PORT209,
+
+        GPIO_PORT210, GPIO_PORT211, GPIO_PORT212, GPIO_PORT213, GPIO_PORT214,
+        GPIO_PORT215, GPIO_PORT216, GPIO_PORT217, GPIO_PORT218, GPIO_PORT219,
+
+        GPIO_PORT220, GPIO_PORT221, GPIO_PORT222, GPIO_PORT223, GPIO_PORT224,
+        GPIO_PORT225, GPIO_PORT226, GPIO_PORT227, GPIO_PORT228, GPIO_PORT229,
+
+        GPIO_PORT230, GPIO_PORT231, GPIO_PORT232, GPIO_PORT233, GPIO_PORT234,
+        GPIO_PORT235, GPIO_PORT236, GPIO_PORT237, GPIO_PORT238, GPIO_PORT239,
+
+        GPIO_PORT240, GPIO_PORT241, GPIO_PORT242, GPIO_PORT243, GPIO_PORT244,
+        GPIO_PORT245, GPIO_PORT246, GPIO_PORT247, GPIO_PORT248, GPIO_PORT249,
+
+        GPIO_PORT250, GPIO_PORT251, GPIO_PORT252, GPIO_PORT253, GPIO_PORT254,
+        GPIO_PORT255, GPIO_PORT256, GPIO_PORT257, GPIO_PORT258, GPIO_PORT259,
+
+        GPIO_PORT260, GPIO_PORT261, GPIO_PORT262, GPIO_PORT263, GPIO_PORT264,
+        GPIO_PORT265, GPIO_PORT266, GPIO_PORT267, GPIO_PORT268, GPIO_PORT269,
+
+        GPIO_PORT270, GPIO_PORT271, GPIO_PORT272,
+
+        /* Special Pull-up / Pull-down Functions */
+        GPIO_FN_PORT48_KEYIN0_PU, GPIO_FN_PORT49_KEYIN1_PU,
+        GPIO_FN_PORT50_KEYIN2_PU, GPIO_FN_PORT55_KEYIN3_PU,
+        GPIO_FN_PORT56_KEYIN4_PU, GPIO_FN_PORT57_KEYIN5_PU,
+        GPIO_FN_PORT58_KEYIN6_PU,
+
+        /* 49-1 (FN) */
+        GPIO_FN_VBUS0, GPIO_FN_CPORT0, GPIO_FN_CPORT1, GPIO_FN_CPORT2,
+        GPIO_FN_CPORT3, GPIO_FN_CPORT4, GPIO_FN_CPORT5, GPIO_FN_CPORT6,
+        GPIO_FN_CPORT7, GPIO_FN_CPORT8, GPIO_FN_CPORT9, GPIO_FN_CPORT10,
+        GPIO_FN_CPORT11, GPIO_FN_SIN2, GPIO_FN_CPORT12, GPIO_FN_XCTS2,
+        GPIO_FN_CPORT13, GPIO_FN_RFSPO4, GPIO_FN_CPORT14, GPIO_FN_RFSPO5,
+        GPIO_FN_CPORT15, GPIO_FN_CPORT16, GPIO_FN_CPORT17, GPIO_FN_SOUT2,
+        GPIO_FN_CPORT18, GPIO_FN_XRTS2, GPIO_FN_CPORT19, GPIO_FN_CPORT20,
+        GPIO_FN_RFSPO6, GPIO_FN_CPORT21, GPIO_FN_STATUS0, GPIO_FN_CPORT22,
+        GPIO_FN_STATUS1, GPIO_FN_CPORT23, GPIO_FN_STATUS2, GPIO_FN_RFSPO7,
+        GPIO_FN_MPORT0, GPIO_FN_MPORT1, GPIO_FN_B_SYNLD1, GPIO_FN_B_SYNLD2,
+        GPIO_FN_XMAINPS, GPIO_FN_XDIVPS, GPIO_FN_XIDRST, GPIO_FN_IDCLK,
+        GPIO_FN_IDIO, GPIO_FN_SOUT1, GPIO_FN_SCIFA4_TXD,
+        GPIO_FN_M02_BERDAT, GPIO_FN_SIN1, GPIO_FN_SCIFA4_RXD, GPIO_FN_XWUP,
+        GPIO_FN_XRTS1, GPIO_FN_SCIFA4_RTS, GPIO_FN_M03_BERCLK,
+        GPIO_FN_XCTS1, GPIO_FN_SCIFA4_CTS,
+
+        /* 49-2 (FN) */
+        GPIO_FN_HSU_IQ_AGC6, GPIO_FN_MFG2_IN2, GPIO_FN_MSIOF2_MCK0,
+        GPIO_FN_HSU_IQ_AGC5, GPIO_FN_MFG2_IN1, GPIO_FN_MSIOF2_MCK1,
+        GPIO_FN_HSU_IQ_AGC4, GPIO_FN_MSIOF2_RSYNC,
+        GPIO_FN_HSU_IQ_AGC3, GPIO_FN_MFG2_OUT1, GPIO_FN_MSIOF2_RSCK,
+        GPIO_FN_HSU_IQ_AGC2, GPIO_FN_PORT42_KEYOUT0,
+        GPIO_FN_HSU_IQ_AGC1, GPIO_FN_PORT43_KEYOUT1,
+        GPIO_FN_HSU_IQ_AGC0, GPIO_FN_PORT44_KEYOUT2,
+        GPIO_FN_HSU_IQ_AGC_ST, GPIO_FN_PORT45_KEYOUT3,
+        GPIO_FN_HSU_IQ_PDO, GPIO_FN_PORT46_KEYOUT4,
+        GPIO_FN_HSU_IQ_PYO, GPIO_FN_PORT47_KEYOUT5,
+        GPIO_FN_HSU_EN_TXMUX_G3MO, GPIO_FN_PORT48_KEYIN0,
+        GPIO_FN_HSU_I_TXMUX_G3MO, GPIO_FN_PORT49_KEYIN1,
+        GPIO_FN_HSU_Q_TXMUX_G3MO, GPIO_FN_PORT50_KEYIN2,
+        GPIO_FN_HSU_SYO, GPIO_FN_PORT51_MSIOF2_TSYNC,
+        GPIO_FN_HSU_SDO, GPIO_FN_PORT52_MSIOF2_TSCK,
+        GPIO_FN_HSU_TGTTI_G3MO, GPIO_FN_PORT53_MSIOF2_TXD,
+        GPIO_FN_B_TIME_STAMP, GPIO_FN_PORT54_MSIOF2_RXD,
+        GPIO_FN_HSU_SDI, GPIO_FN_PORT55_KEYIN3,
+        GPIO_FN_HSU_SCO, GPIO_FN_PORT56_KEYIN4,
+        GPIO_FN_HSU_DREQ, GPIO_FN_PORT57_KEYIN5,
+        GPIO_FN_HSU_DACK, GPIO_FN_PORT58_KEYIN6,
+        GPIO_FN_HSU_CLK61M, GPIO_FN_PORT59_MSIOF2_SS1,
+        GPIO_FN_HSU_XRST, GPIO_FN_PORT60_MSIOF2_SS2,
+        GPIO_FN_PCMCLKO, GPIO_FN_SYNC8KO, GPIO_FN_DNPCM_A, GPIO_FN_UPPCM_A,
+        GPIO_FN_XTALB1L,
+        GPIO_FN_GPS_AGC1, GPIO_FN_SCIFA0_RTS,
+        GPIO_FN_GPS_AGC2, GPIO_FN_SCIFA0_SCK,
+        GPIO_FN_GPS_AGC3, GPIO_FN_SCIFA0_TXD,
+        GPIO_FN_GPS_AGC4, GPIO_FN_SCIFA0_RXD,
+        GPIO_FN_GPS_PWRD, GPIO_FN_SCIFA0_CTS,
+        GPIO_FN_GPS_IM, GPIO_FN_GPS_IS, GPIO_FN_GPS_QM, GPIO_FN_GPS_QS,
+        GPIO_FN_SIUBOMC, GPIO_FN_TPU2TO0,
+        GPIO_FN_SIUCKB, GPIO_FN_TPU2TO1,
+        GPIO_FN_SIUBOLR, GPIO_FN_BBIF2_TSYNC, GPIO_FN_TPU2TO2,
+        GPIO_FN_SIUBOBT, GPIO_FN_BBIF2_TSCK, GPIO_FN_TPU2TO3,
+        GPIO_FN_SIUBOSLD, GPIO_FN_BBIF2_TXD, GPIO_FN_TPU3TO0,
+        GPIO_FN_SIUBILR, GPIO_FN_TPU3TO1,
+        GPIO_FN_SIUBIBT, GPIO_FN_TPU3TO2,
+        GPIO_FN_SIUBISLD, GPIO_FN_TPU3TO3,
+        GPIO_FN_NMI, GPIO_FN_TPU4TO0,
+        GPIO_FN_DNPCM_M, GPIO_FN_TPU4TO1, GPIO_FN_TPU4TO2, GPIO_FN_TPU4TO3,
+        GPIO_FN_IRQ_TMPB,
+        GPIO_FN_PWEN, GPIO_FN_MFG1_OUT1,
+        GPIO_FN_OVCN, GPIO_FN_MFG1_IN1,
+        GPIO_FN_OVCN2, GPIO_FN_MFG1_IN2,
+
+        /* 49-3 (FN) */
+        GPIO_FN_RFSPO1, GPIO_FN_RFSPO2, GPIO_FN_RFSPO3, GPIO_FN_PORT93_VIO_CKO2,
+        GPIO_FN_USBTERM, GPIO_FN_EXTLP, GPIO_FN_IDIN,
+        GPIO_FN_SCIFA5_CTS, GPIO_FN_MFG0_IN1,
+        GPIO_FN_SCIFA5_RTS, GPIO_FN_MFG0_IN2,
+        GPIO_FN_SCIFA5_RXD,
+        GPIO_FN_SCIFA5_TXD,
+        GPIO_FN_SCIFA5_SCK, GPIO_FN_MFG0_OUT1,
+        GPIO_FN_A0_EA0, GPIO_FN_BS,
+        GPIO_FN_A14_EA14, GPIO_FN_PORT102_KEYOUT0,
+        GPIO_FN_A15_EA15, GPIO_FN_PORT103_KEYOUT1, GPIO_FN_DV_CLKOL,
+        GPIO_FN_A16_EA16, GPIO_FN_PORT104_KEYOUT2,
+        GPIO_FN_DV_VSYNCL, GPIO_FN_MSIOF0_SS1,
+        GPIO_FN_A17_EA17, GPIO_FN_PORT105_KEYOUT3,
+        GPIO_FN_DV_HSYNCL, GPIO_FN_MSIOF0_TSYNC,
+        GPIO_FN_A18_EA18, GPIO_FN_PORT106_KEYOUT4,
+        GPIO_FN_DV_DL0, GPIO_FN_MSIOF0_TSCK,
+        GPIO_FN_A19_EA19, GPIO_FN_PORT107_KEYOUT5,
+        GPIO_FN_DV_DL1, GPIO_FN_MSIOF0_TXD,
+        GPIO_FN_A20_EA20, GPIO_FN_PORT108_KEYIN0,
+        GPIO_FN_DV_DL2, GPIO_FN_MSIOF0_RSCK,
+        GPIO_FN_A21_EA21, GPIO_FN_PORT109_KEYIN1,
+        GPIO_FN_DV_DL3, GPIO_FN_MSIOF0_RSYNC,
+        GPIO_FN_A22_EA22, GPIO_FN_PORT110_KEYIN2,
+        GPIO_FN_DV_DL4, GPIO_FN_MSIOF0_MCK0,
+        GPIO_FN_A23_EA23, GPIO_FN_PORT111_KEYIN3,
+        GPIO_FN_DV_DL5, GPIO_FN_MSIOF0_MCK1,
+        GPIO_FN_A24_EA24, GPIO_FN_PORT112_KEYIN4,
+        GPIO_FN_DV_DL6, GPIO_FN_MSIOF0_RXD,
+        GPIO_FN_A25_EA25, GPIO_FN_PORT113_KEYIN5,
+        GPIO_FN_DV_DL7, GPIO_FN_MSIOF0_SS2,
+        GPIO_FN_A26, GPIO_FN_PORT113_KEYIN6, GPIO_FN_DV_CLKIL,
+        GPIO_FN_D0_ED0_NAF0, GPIO_FN_D1_ED1_NAF1, GPIO_FN_D2_ED2_NAF2,
+        GPIO_FN_D3_ED3_NAF3, GPIO_FN_D4_ED4_NAF4, GPIO_FN_D5_ED5_NAF5,
+        GPIO_FN_D6_ED6_NAF6, GPIO_FN_D7_ED7_NAF7, GPIO_FN_D8_ED8_NAF8,
+        GPIO_FN_D9_ED9_NAF9, GPIO_FN_D10_ED10_NAF10, GPIO_FN_D11_ED11_NAF11,
+        GPIO_FN_D12_ED12_NAF12, GPIO_FN_D13_ED13_NAF13,
+        GPIO_FN_D14_ED14_NAF14, GPIO_FN_D15_ED15_NAF15,
+        GPIO_FN_CS4, GPIO_FN_CS5A, GPIO_FN_CS5B, GPIO_FN_FCE1,
+        GPIO_FN_CS6B, GPIO_FN_XCS2, GPIO_FN_FCE0, GPIO_FN_CS6A,
+        GPIO_FN_DACK0, GPIO_FN_WAIT, GPIO_FN_DREQ0, GPIO_FN_RD_XRD,
+        GPIO_FN_A27, GPIO_FN_RDWR_XWE, GPIO_FN_WE0_XWR0_FWE,
+        GPIO_FN_WE1_XWR1, GPIO_FN_FRB, GPIO_FN_CKO,
+        GPIO_FN_NBRSTOUT, GPIO_FN_NBRST,
+
+        /* 49-4 (FN) */
+        GPIO_FN_RFSPO0, GPIO_FN_PORT146_VIO_CKO2, GPIO_FN_TSTMD,
+        GPIO_FN_VIO_VD, GPIO_FN_VIO_HD,
+        GPIO_FN_VIO_D0, GPIO_FN_VIO_D1, GPIO_FN_VIO_D2,
+        GPIO_FN_VIO_D3, GPIO_FN_VIO_D4, GPIO_FN_VIO_D5,
+        GPIO_FN_VIO_D6, GPIO_FN_VIO_D7, GPIO_FN_VIO_D8,
+        GPIO_FN_VIO_D9, GPIO_FN_VIO_D10, GPIO_FN_VIO_D11,
+        GPIO_FN_VIO_D12, GPIO_FN_VIO_D13, GPIO_FN_VIO_D14,
+        GPIO_FN_VIO_D15, GPIO_FN_VIO_CLK, GPIO_FN_VIO_FIELD,
+        GPIO_FN_VIO_CKO,
+        GPIO_FN_MFG3_IN1, GPIO_FN_MFG3_IN2,
+        GPIO_FN_M9_SLCD_A01, GPIO_FN_MFG3_OUT1, GPIO_FN_TPU0TO0,
+        GPIO_FN_M10_SLCD_CK1, GPIO_FN_MFG4_IN1, GPIO_FN_TPU0TO1,
+        GPIO_FN_M11_SLCD_SO1, GPIO_FN_MFG4_IN2, GPIO_FN_TPU0TO2,
+        GPIO_FN_M12_SLCD_CE1, GPIO_FN_MFG4_OUT1, GPIO_FN_TPU0TO3,
+        GPIO_FN_LCDD0, GPIO_FN_PORT175_KEYOUT0, GPIO_FN_DV_D0,
+        GPIO_FN_SIUCKA, GPIO_FN_MFG0_OUT2,
+        GPIO_FN_LCDD1, GPIO_FN_PORT176_KEYOUT1, GPIO_FN_DV_D1,
+        GPIO_FN_SIUAOLR, GPIO_FN_BBIF2_TSYNC1,
+        GPIO_FN_LCDD2, GPIO_FN_PORT177_KEYOUT2, GPIO_FN_DV_D2,
+        GPIO_FN_SIUAOBT, GPIO_FN_BBIF2_TSCK1,
+        GPIO_FN_LCDD3, GPIO_FN_PORT178_KEYOUT3, GPIO_FN_DV_D3,
+        GPIO_FN_SIUAOSLD, GPIO_FN_BBIF2_TXD1,
+        GPIO_FN_LCDD4, GPIO_FN_PORT179_KEYOUT4, GPIO_FN_DV_D4,
+        GPIO_FN_SIUAISPD, GPIO_FN_MFG1_OUT2,
+        GPIO_FN_LCDD5, GPIO_FN_PORT180_KEYOUT5, GPIO_FN_DV_D5,
+        GPIO_FN_SIUAILR, GPIO_FN_MFG2_OUT2,
+        GPIO_FN_LCDD6, GPIO_FN_DV_D6,
+        GPIO_FN_SIUAIBT, GPIO_FN_MFG3_OUT2, GPIO_FN_XWR2,
+        GPIO_FN_LCDD7, GPIO_FN_DV_D7,
+        GPIO_FN_SIUAISLD, GPIO_FN_MFG4_OUT2, GPIO_FN_XWR3,
+        GPIO_FN_LCDD8, GPIO_FN_DV_D8, GPIO_FN_D16, GPIO_FN_ED16,
+        GPIO_FN_LCDD9, GPIO_FN_DV_D9, GPIO_FN_D17, GPIO_FN_ED17,
+        GPIO_FN_LCDD10, GPIO_FN_DV_D10, GPIO_FN_D18, GPIO_FN_ED18,
+        GPIO_FN_LCDD11, GPIO_FN_DV_D11, GPIO_FN_D19, GPIO_FN_ED19,
+        GPIO_FN_LCDD12, GPIO_FN_DV_D12, GPIO_FN_D20, GPIO_FN_ED20,
+        GPIO_FN_LCDD13, GPIO_FN_DV_D13, GPIO_FN_D21, GPIO_FN_ED21,
+        GPIO_FN_LCDD14, GPIO_FN_DV_D14, GPIO_FN_D22, GPIO_FN_ED22,
+        GPIO_FN_LCDD15, GPIO_FN_DV_D15, GPIO_FN_D23, GPIO_FN_ED23,
+        GPIO_FN_LCDD16, GPIO_FN_DV_HSYNC, GPIO_FN_D24, GPIO_FN_ED24,
+        GPIO_FN_LCDD17, GPIO_FN_DV_VSYNC, GPIO_FN_D25, GPIO_FN_ED25,
+        GPIO_FN_LCDD18, GPIO_FN_DREQ2, GPIO_FN_MSIOF0L_TSCK,
+        GPIO_FN_D26, GPIO_FN_ED26,
+        GPIO_FN_LCDD19, GPIO_FN_MSIOF0L_TSYNC,
+        GPIO_FN_D27, GPIO_FN_ED27,
+        GPIO_FN_LCDD20, GPIO_FN_TS_SPSYNC1, GPIO_FN_MSIOF0L_MCK0,
+        GPIO_FN_D28, GPIO_FN_ED28,
+        GPIO_FN_LCDD21, GPIO_FN_TS_SDAT1, GPIO_FN_MSIOF0L_MCK1,
+        GPIO_FN_D29, GPIO_FN_ED29,
+        GPIO_FN_LCDD22, GPIO_FN_TS_SDEN1, GPIO_FN_MSIOF0L_SS1,
+        GPIO_FN_D30, GPIO_FN_ED30,
+        GPIO_FN_LCDD23, GPIO_FN_TS_SCK1, GPIO_FN_MSIOF0L_SS2,
+        GPIO_FN_D31, GPIO_FN_ED31,
+        GPIO_FN_LCDDCK, GPIO_FN_LCDWR, GPIO_FN_DV_CKO, GPIO_FN_SIUAOSPD,
+        GPIO_FN_LCDRD, GPIO_FN_DACK2, GPIO_FN_MSIOF0L_RSYNC,
+
+
+        /* 49-5 (FN) */
+        GPIO_FN_LCDHSYN, GPIO_FN_LCDCS, GPIO_FN_LCDCS2, GPIO_FN_DACK3,
+        GPIO_FN_LCDDISP, GPIO_FN_LCDRS, GPIO_FN_DREQ3, GPIO_FN_MSIOF0L_RSCK,
+        GPIO_FN_LCDCSYN, GPIO_FN_LCDCSYN2, GPIO_FN_DV_CKI,
+        GPIO_FN_LCDLCLK, GPIO_FN_DREQ1, GPIO_FN_MSIOF0L_RXD,
+        GPIO_FN_LCDDON, GPIO_FN_LCDDON2, GPIO_FN_DACK1, GPIO_FN_MSIOF0L_TXD,
+        GPIO_FN_VIO_DR0, GPIO_FN_VIO_DR1, GPIO_FN_VIO_DR2, GPIO_FN_VIO_DR3,
+        GPIO_FN_VIO_DR4, GPIO_FN_VIO_DR5, GPIO_FN_VIO_DR6, GPIO_FN_VIO_DR7,
+        GPIO_FN_VIO_VDR, GPIO_FN_VIO_HDR,
+        GPIO_FN_VIO_CLKR, GPIO_FN_VIO_CKOR,
+        GPIO_FN_SCIFA1_TXD, GPIO_FN_GPS_PGFA0,
+        GPIO_FN_SCIFA1_SCK, GPIO_FN_GPS_PGFA1,
+        GPIO_FN_SCIFA1_RTS, GPIO_FN_GPS_EPPSINMON,
+        GPIO_FN_SCIFA1_RXD, GPIO_FN_SCIFA1_CTS,
+        GPIO_FN_MSIOF1_TXD, GPIO_FN_SCIFA1_TXD2, GPIO_FN_GPS_TXD,
+        GPIO_FN_MSIOF1_TSYNC, GPIO_FN_SCIFA1_CTS2, GPIO_FN_I2C_SDA2,
+        GPIO_FN_MSIOF1_TSCK, GPIO_FN_SCIFA1_SCK2,
+        GPIO_FN_MSIOF1_RXD, GPIO_FN_SCIFA1_RXD2, GPIO_FN_GPS_RXD,
+        GPIO_FN_MSIOF1_RSCK, GPIO_FN_SCIFA1_RTS2,
+        GPIO_FN_MSIOF1_RSYNC, GPIO_FN_I2C_SCL2,
+        GPIO_FN_MSIOF1_MCK0, GPIO_FN_MSIOF1_MCK1,
+        GPIO_FN_MSIOF1_SS1, GPIO_FN_EDBGREQ3,
+        GPIO_FN_MSIOF1_SS2,
+        GPIO_FN_PORT236_IROUT, GPIO_FN_IRDA_OUT,
+        GPIO_FN_IRDA_IN, GPIO_FN_IRDA_FIRSEL,
+        GPIO_FN_TPU1TO0, GPIO_FN_TS_SPSYNC3,
+        GPIO_FN_TPU1TO1, GPIO_FN_TS_SDAT3,
+        GPIO_FN_TPU1TO2, GPIO_FN_TS_SDEN3, GPIO_FN_PORT241_MSIOF2_SS1,
+        GPIO_FN_TPU1TO3, GPIO_FN_PORT242_MSIOF2_TSCK,
+        GPIO_FN_M13_BSW, GPIO_FN_PORT243_MSIOF2_TSYNC,
+        GPIO_FN_M14_GSW, GPIO_FN_PORT244_MSIOF2_TXD,
+        GPIO_FN_PORT245_IROUT, GPIO_FN_M15_RSW,
+        GPIO_FN_SOUT3, GPIO_FN_SCIFA2_TXD1,
+        GPIO_FN_SIN3, GPIO_FN_SCIFA2_RXD1,
+        GPIO_FN_XRTS3, GPIO_FN_SCIFA2_RTS1, GPIO_FN_PORT248_MSIOF2_SS2,
+        GPIO_FN_XCTS3, GPIO_FN_SCIFA2_CTS1, GPIO_FN_PORT249_MSIOF2_RXD,
+        GPIO_FN_DINT, GPIO_FN_SCIFA2_SCK1, GPIO_FN_TS_SCK3,
+        GPIO_FN_SDHICLK0, GPIO_FN_TCK2,
+        GPIO_FN_SDHICD0,
+        GPIO_FN_SDHID0_0, GPIO_FN_TMS2,
+        GPIO_FN_SDHID0_1, GPIO_FN_TDO2,
+        GPIO_FN_SDHID0_2, GPIO_FN_TDI2,
+        GPIO_FN_SDHID0_3, GPIO_FN_RTCK2,
+
+        /* 49-6 (FN) */
+        GPIO_FN_SDHICMD0, GPIO_FN_TRST2,
+        GPIO_FN_SDHIWP0, GPIO_FN_EDBGREQ2,
+        GPIO_FN_SDHICLK1, GPIO_FN_TCK3,
+        GPIO_FN_SDHID1_0, GPIO_FN_M11_SLCD_SO2,
+        GPIO_FN_TS_SPSYNC2, GPIO_FN_TMS3,
+        GPIO_FN_SDHID1_1, GPIO_FN_M9_SLCD_AO2,
+        GPIO_FN_TS_SDAT2, GPIO_FN_TDO3,
+        GPIO_FN_SDHID1_2, GPIO_FN_M10_SLCD_CK2,
+        GPIO_FN_TS_SDEN2, GPIO_FN_TDI3,
+        GPIO_FN_SDHID1_3, GPIO_FN_M12_SLCD_CE2,
+        GPIO_FN_TS_SCK2, GPIO_FN_RTCK3,
+        GPIO_FN_SDHICMD1, GPIO_FN_TRST3,
+        GPIO_FN_SDHICLK2, GPIO_FN_SCIFB_SCK,
+        GPIO_FN_SDHID2_0, GPIO_FN_SCIFB_TXD,
+        GPIO_FN_SDHID2_1, GPIO_FN_SCIFB_CTS,
+        GPIO_FN_SDHID2_2, GPIO_FN_SCIFB_RXD,
+        GPIO_FN_SDHID2_3, GPIO_FN_SCIFB_RTS,
+        GPIO_FN_SDHICMD2,
+        GPIO_FN_RESETOUTS,
+        GPIO_FN_DIVLOCK,
+};
+
+#endif /* __ASM_SH7367_H__ */
diff --git a/arch/arm/mach-shmobile/include/mach/sh7372.h b/arch/arm/mach-shmobile/include/mach/sh7372.h
new file mode 100644
index 000000000000..dc34f00c56b8
--- /dev/null
+++ b/arch/arm/mach-shmobile/include/mach/sh7372.h
@@ -0,0 +1,434 @@
+/*
+ * Copyright (C) 2010 Renesas Solutions Corp.
+ *
+ * Kuninori Morimoto <morimoto.kuninori@renesas.com>
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+
+#ifndef __ASM_SH7372_H__
+#define __ASM_SH7372_H__
+
+/*
+ * Pin Function Controller:
+ *      GPIO_FN_xx - GPIO used to select pin function
+ *      GPIO_PORTxx - GPIO mapped to real I/O pin on CPU
+ */
+enum {
+        /* PORT */
+        GPIO_PORT0, GPIO_PORT1, GPIO_PORT2, GPIO_PORT3, GPIO_PORT4,
+        GPIO_PORT5, GPIO_PORT6, GPIO_PORT7, GPIO_PORT8, GPIO_PORT9,
+
+        GPIO_PORT10, GPIO_PORT11, GPIO_PORT12, GPIO_PORT13, GPIO_PORT14,
+        GPIO_PORT15, GPIO_PORT16, GPIO_PORT17, GPIO_PORT18, GPIO_PORT19,
+
+        GPIO_PORT20, GPIO_PORT21, GPIO_PORT22, GPIO_PORT23, GPIO_PORT24,
+        GPIO_PORT25, GPIO_PORT26, GPIO_PORT27, GPIO_PORT28, GPIO_PORT29,
+
+        GPIO_PORT30, GPIO_PORT31, GPIO_PORT32, GPIO_PORT33, GPIO_PORT34,
+        GPIO_PORT35, GPIO_PORT36, GPIO_PORT37, GPIO_PORT38, GPIO_PORT39,
+
+        GPIO_PORT40, GPIO_PORT41, GPIO_PORT42, GPIO_PORT43, GPIO_PORT44,
+        GPIO_PORT45, GPIO_PORT46, GPIO_PORT47, GPIO_PORT48, GPIO_PORT49,
+
+        GPIO_PORT50, GPIO_PORT51, GPIO_PORT52, GPIO_PORT53, GPIO_PORT54,
+        GPIO_PORT55, GPIO_PORT56, GPIO_PORT57, GPIO_PORT58, GPIO_PORT59,
+
+        GPIO_PORT60, GPIO_PORT61, GPIO_PORT62, GPIO_PORT63, GPIO_PORT64,
+        GPIO_PORT65, GPIO_PORT66, GPIO_PORT67, GPIO_PORT68, GPIO_PORT69,
+
+        GPIO_PORT70, GPIO_PORT71, GPIO_PORT72, GPIO_PORT73, GPIO_PORT74,
+        GPIO_PORT75, GPIO_PORT76, GPIO_PORT77, GPIO_PORT78, GPIO_PORT79,
+
+        GPIO_PORT80, GPIO_PORT81, GPIO_PORT82, GPIO_PORT83, GPIO_PORT84,
+        GPIO_PORT85, GPIO_PORT86, GPIO_PORT87, GPIO_PORT88, GPIO_PORT89,
+
+        GPIO_PORT90, GPIO_PORT91, GPIO_PORT92, GPIO_PORT93, GPIO_PORT94,
+        GPIO_PORT95, GPIO_PORT96, GPIO_PORT97, GPIO_PORT98, GPIO_PORT99,
+
+        GPIO_PORT100, GPIO_PORT101, GPIO_PORT102, GPIO_PORT103, GPIO_PORT104,
+        GPIO_PORT105, GPIO_PORT106, GPIO_PORT107, GPIO_PORT108, GPIO_PORT109,
+
+        GPIO_PORT110, GPIO_PORT111, GPIO_PORT112, GPIO_PORT113, GPIO_PORT114,
+        GPIO_PORT115, GPIO_PORT116, GPIO_PORT117, GPIO_PORT118, GPIO_PORT119,
+
+        GPIO_PORT120, GPIO_PORT121, GPIO_PORT122, GPIO_PORT123, GPIO_PORT124,
+        GPIO_PORT125, GPIO_PORT126, GPIO_PORT127, GPIO_PORT128, GPIO_PORT129,
+
+        GPIO_PORT130, GPIO_PORT131, GPIO_PORT132, GPIO_PORT133, GPIO_PORT134,
+        GPIO_PORT135, GPIO_PORT136, GPIO_PORT137, GPIO_PORT138, GPIO_PORT139,
+
+        GPIO_PORT140, GPIO_PORT141, GPIO_PORT142, GPIO_PORT143, GPIO_PORT144,
+        GPIO_PORT145, GPIO_PORT146, GPIO_PORT147, GPIO_PORT148, GPIO_PORT149,
+
+        GPIO_PORT150, GPIO_PORT151, GPIO_PORT152, GPIO_PORT153, GPIO_PORT154,
+        GPIO_PORT155, GPIO_PORT156, GPIO_PORT157, GPIO_PORT158, GPIO_PORT159,
+
+        GPIO_PORT160, GPIO_PORT161, GPIO_PORT162, GPIO_PORT163, GPIO_PORT164,
+        GPIO_PORT165, GPIO_PORT166, GPIO_PORT167, GPIO_PORT168, GPIO_PORT169,
+
+        GPIO_PORT170, GPIO_PORT171, GPIO_PORT172, GPIO_PORT173, GPIO_PORT174,
+        GPIO_PORT175, GPIO_PORT176, GPIO_PORT177, GPIO_PORT178, GPIO_PORT179,
+
+        GPIO_PORT180, GPIO_PORT181, GPIO_PORT182, GPIO_PORT183, GPIO_PORT184,
+        GPIO_PORT185, GPIO_PORT186, GPIO_PORT187, GPIO_PORT188, GPIO_PORT189,
+
+        GPIO_PORT190,
+
+        /* IRQ */
+        GPIO_FN_IRQ0_6,         /* PORT   6 */
+        GPIO_FN_IRQ0_162,       /* PORT 162 */
+        GPIO_FN_IRQ1,           /* PORT  12 */
+        GPIO_FN_IRQ2_4,         /* PORT   4 */
+        GPIO_FN_IRQ2_5,         /* PORT   5 */
+        GPIO_FN_IRQ3_8,         /* PORT   8 */
+        GPIO_FN_IRQ3_16,        /* PORT  16 */
+        GPIO_FN_IRQ4_17,        /* PORT  17 */
+        GPIO_FN_IRQ4_163,       /* PORT 163 */
+        GPIO_FN_IRQ5,           /* PORT  18 */
+        GPIO_FN_IRQ6_39,        /* PORT  39 */
+        GPIO_FN_IRQ6_164,       /* PORT 164 */
+        GPIO_FN_IRQ7_40,        /* PORT  40 */
+        GPIO_FN_IRQ7_167,       /* PORT 167 */
+        GPIO_FN_IRQ8_41,        /* PORT  41 */
+        GPIO_FN_IRQ8_168,       /* PORT 168 */
+        GPIO_FN_IRQ9_42,        /* PORT  42 */
+        GPIO_FN_IRQ9_169,       /* PORT 169 */
+        GPIO_FN_IRQ10,          /* PORT  65 */
+        GPIO_FN_IRQ11,          /* PORT  67 */
+        GPIO_FN_IRQ12_80,       /* PORT  80 */
+        GPIO_FN_IRQ12_137,      /* PORT 137 */
+        GPIO_FN_IRQ13_81,       /* PORT  81 */
+        GPIO_FN_IRQ13_145,      /* PORT 145 */
+        GPIO_FN_IRQ14_82,       /* PORT  82 */
+        GPIO_FN_IRQ14_146,      /* PORT 146 */
+        GPIO_FN_IRQ15_83,       /* PORT  83 */
+        GPIO_FN_IRQ15_147,      /* PORT 147 */
+        GPIO_FN_IRQ16_84,       /* PORT  84 */
+        GPIO_FN_IRQ16_170,      /* PORT 170 */
+        GPIO_FN_IRQ17,          /* PORT  85 */
+        GPIO_FN_IRQ18,          /* PORT  86 */
+        GPIO_FN_IRQ19,          /* PORT  87 */
+        GPIO_FN_IRQ20,          /* PORT  92 */
+        GPIO_FN_IRQ21,          /* PORT  93 */
+        GPIO_FN_IRQ22,          /* PORT  94 */
+        GPIO_FN_IRQ23,          /* PORT  95 */
+        GPIO_FN_IRQ24,          /* PORT 112 */
+        GPIO_FN_IRQ25,          /* PORT 119 */
+        GPIO_FN_IRQ26_121,      /* PORT 121 */
+        GPIO_FN_IRQ26_172,      /* PORT 172 */
+        GPIO_FN_IRQ27_122,      /* PORT 122 */
+        GPIO_FN_IRQ27_180,      /* PORT 180 */
+        GPIO_FN_IRQ28_123,      /* PORT 123 */
+        GPIO_FN_IRQ28_181,      /* PORT 181 */
+        GPIO_FN_IRQ29_129,      /* PORT 129 */
+        GPIO_FN_IRQ29_182,      /* PORT 182 */
+        GPIO_FN_IRQ30_130,      /* PORT 130 */
+        GPIO_FN_IRQ30_183,      /* PORT 183 */
+        GPIO_FN_IRQ31_138,      /* PORT 138 */
+        GPIO_FN_IRQ31_184,      /* PORT 184 */
+
+        /*
+         * MSIOF0       (PORT 36, 37, 38, 39
+         *                    40, 41, 42, 43, 44, 45)
+         */
+        GPIO_FN_MSIOF0_TSYNC,   GPIO_FN_MSIOF0_TSCK,
+        GPIO_FN_MSIOF0_RXD,     GPIO_FN_MSIOF0_RSCK,
+        GPIO_FN_MSIOF0_RSYNC,   GPIO_FN_MSIOF0_MCK0,
+        GPIO_FN_MSIOF0_MCK1,    GPIO_FN_MSIOF0_SS1,
+        GPIO_FN_MSIOF0_SS2,     GPIO_FN_MSIOF0_TXD,
+
+        /*
+         * MSIOF1       (PORT 39, 40, 41, 42, 43, 44
+         *                    84, 85, 86, 87, 88, 89, 90, 91, 92, 93)
+         */
+        GPIO_FN_MSIOF1_TSCK_39, GPIO_FN_MSIOF1_TSYNC_40,
+        GPIO_FN_MSIOF1_TSCK_88, GPIO_FN_MSIOF1_TSYNC_89,
+        GPIO_FN_MSIOF1_TXD_41,  GPIO_FN_MSIOF1_RXD_42,
+        GPIO_FN_MSIOF1_TXD_90,  GPIO_FN_MSIOF1_RXD_91,
+        GPIO_FN_MSIOF1_SS1_43,  GPIO_FN_MSIOF1_SS2_44,
+        GPIO_FN_MSIOF1_SS1_92,  GPIO_FN_MSIOF1_SS2_93,
+        GPIO_FN_MSIOF1_RSCK,    GPIO_FN_MSIOF1_RSYNC,
+        GPIO_FN_MSIOF1_MCK0,    GPIO_FN_MSIOF1_MCK1,
+
+        /*
+         * MSIOF2       (PORT 134, 135, 136, 137, 138, 139
+         *                    148, 149, 150, 151)
+         */
+        GPIO_FN_MSIOF2_RSCK,    GPIO_FN_MSIOF2_RSYNC,
+        GPIO_FN_MSIOF2_MCK0,    GPIO_FN_MSIOF2_MCK1,
+        GPIO_FN_MSIOF2_SS1,     GPIO_FN_MSIOF2_SS2,
+        GPIO_FN_MSIOF2_TSYNC,   GPIO_FN_MSIOF2_TSCK,
+        GPIO_FN_MSIOF2_RXD,     GPIO_FN_MSIOF2_TXD,
+
+        /* MSIOF3       (PORT 76, 77, 78, 79, 80, 81, 82, 83) */
+        GPIO_FN_BBIF1_RXD,      GPIO_FN_BBIF1_TSYNC,
+        GPIO_FN_BBIF1_TSCK,     GPIO_FN_BBIF1_TXD,
+        GPIO_FN_BBIF1_RSCK,     GPIO_FN_BBIF1_RSYNC,
+        GPIO_FN_BBIF1_FLOW,     GPIO_FN_BB_RX_FLOW_N,
+
+        /* MSIOF4       (PORT 0, 1, 2, 3) */
+        GPIO_FN_BBIF2_TSCK1,    GPIO_FN_BBIF2_TSYNC1,
+        GPIO_FN_BBIF2_TXD1,     GPIO_FN_BBIF2_RXD,
+
+        /* FSI          (PORT 4, 5, 6, 7, 8, 9, 10, 11, 15) */
+        GPIO_FN_FSIACK,         GPIO_FN_FSIBCK,
+        GPIO_FN_FSIAILR,        GPIO_FN_FSIAIBT,
+        GPIO_FN_FSIAISLD,       GPIO_FN_FSIAOMC,
+        GPIO_FN_FSIAOLR,        GPIO_FN_FSIAOBT,
+        GPIO_FN_FSIAOSLD,       GPIO_FN_FSIASPDIF_11,
+        GPIO_FN_FSIASPDIF_15,
+
+        /* FMSI         (PORT 12, 13, 14, 15, 16, 17, 18, 65) */
+        GPIO_FN_FMSOCK,         GPIO_FN_FMSOOLR,
+        GPIO_FN_FMSIOLR,        GPIO_FN_FMSOOBT,
+        GPIO_FN_FMSIOBT,        GPIO_FN_FMSOSLD,
+        GPIO_FN_FMSOILR,        GPIO_FN_FMSIILR,
+        GPIO_FN_FMSOIBT,        GPIO_FN_FMSIIBT,
+        GPIO_FN_FMSISLD,        GPIO_FN_FMSICK,
+
+        /* SCIFA0       (PORT 152, 153, 156, 157, 158) */
+        GPIO_FN_SCIFA0_TXD,     GPIO_FN_SCIFA0_RXD,
+        GPIO_FN_SCIFA0_SCK,     GPIO_FN_SCIFA0_RTS,
+        GPIO_FN_SCIFA0_CTS,
+
+        /* SCIFA1       (PORT 154, 155, 159, 160, 161) */
+        GPIO_FN_SCIFA1_TXD,     GPIO_FN_SCIFA1_RXD,
+        GPIO_FN_SCIFA1_SCK,     GPIO_FN_SCIFA1_RTS,
+        GPIO_FN_SCIFA1_CTS,
+
+        /* SCIFA2       (PORT 94, 95, 96, 97, 98) */
+        GPIO_FN_SCIFA2_CTS1,    GPIO_FN_SCIFA2_RTS1,
+        GPIO_FN_SCIFA2_TXD1,    GPIO_FN_SCIFA2_RXD1,
+        GPIO_FN_SCIFA2_SCK1,
+
+        /* SCIFA3       (PORT 43, 44,
+                             140, 141, 142, 143, 144) */
+        GPIO_FN_SCIFA3_CTS_43,  GPIO_FN_SCIFA3_CTS_140,
+        GPIO_FN_SCIFA3_RTS_44,  GPIO_FN_SCIFA3_RTS_141,
+        GPIO_FN_SCIFA3_SCK,     GPIO_FN_SCIFA3_TXD,
+        GPIO_FN_SCIFA3_RXD,
+
+        /* SCIFA4       (PORT 5, 6) */
+        GPIO_FN_SCIFA4_RXD,     GPIO_FN_SCIFA4_TXD,
+
+        /* SCIFA5       (PORT 8, 12) */
+        GPIO_FN_SCIFA5_RXD,     GPIO_FN_SCIFA5_TXD,
+
+        /* SCIFB        (PORT 162, 163, 164, 165, 166) */
+        GPIO_FN_SCIFB_SCK,      GPIO_FN_SCIFB_RTS,
+        GPIO_FN_SCIFB_CTS,      GPIO_FN_SCIFB_TXD,
+        GPIO_FN_SCIFB_RXD,
+
+        /*
+         * CEU          (PORT 16, 17,
+         *                    100, 101, 102, 103, 104, 105, 106, 107, 108, 109,
+         *                    110, 111, 112, 113, 114, 115, 116, 117, 118, 119,
+         *                    120)
+         */
+        GPIO_FN_VIO_HD,         GPIO_FN_VIO_CKO1,       GPIO_FN_VIO_CKO2,
+        GPIO_FN_VIO_VD,         GPIO_FN_VIO_CLK,        GPIO_FN_VIO_FIELD,
+        GPIO_FN_VIO_CKO,
+        GPIO_FN_VIO_D0,         GPIO_FN_VIO_D1,         GPIO_FN_VIO_D2,
+        GPIO_FN_VIO_D3,         GPIO_FN_VIO_D4,         GPIO_FN_VIO_D5,
+        GPIO_FN_VIO_D6,         GPIO_FN_VIO_D7,         GPIO_FN_VIO_D8,
+        GPIO_FN_VIO_D9,         GPIO_FN_VIO_D10,        GPIO_FN_VIO_D11,
+        GPIO_FN_VIO_D12,        GPIO_FN_VIO_D13,        GPIO_FN_VIO_D14,
+        GPIO_FN_VIO_D15,
+
+        /* USB0         (PORT 113, 114, 115, 116, 117, 167) */
+        GPIO_FN_IDIN_0,         GPIO_FN_EXTLP_0,
+        GPIO_FN_OVCN2_0,        GPIO_FN_PWEN_0,
+        GPIO_FN_OVCN_0,         GPIO_FN_VBUS0_0,
+
+        /* USB1         (PORT 18, 113, 114, 115, 116, 117, 138, 162, 168) */
+        GPIO_FN_IDIN_1_18,      GPIO_FN_IDIN_1_113,
+        GPIO_FN_PWEN_1_115,     GPIO_FN_PWEN_1_138,
+        GPIO_FN_OVCN_1_114,     GPIO_FN_OVCN_1_162,
+        GPIO_FN_EXTLP_1,        GPIO_FN_OVCN2_1,
+        GPIO_FN_VBUS0_1,
+
+        /* GPIO         (PORT 41, 42, 43, 44) */
+        GPIO_FN_GPI0,   GPIO_FN_GPI1,   GPIO_FN_GPO0,   GPIO_FN_GPO1,
+
+        /*
+         * BSC          (PORT 19,
+         *                    20, 21, 22, 25, 26, 27, 28, 29,
+         *                    30, 31, 32, 33, 34, 35, 36, 37, 38, 39,
+         *                    40, 41, 42, 43, 44, 45,
+         *                    62, 63, 64, 65, 66, 67,
+         *                    71, 72, 74, 75)
+         */
+        GPIO_FN_BS,     GPIO_FN_WE1,
+        GPIO_FN_CKO,    GPIO_FN_WAIT,   GPIO_FN_RDWR,
+
+        GPIO_FN_A0,     GPIO_FN_A1,     GPIO_FN_A2,     GPIO_FN_A3,
+        GPIO_FN_A6,     GPIO_FN_A7,     GPIO_FN_A8,     GPIO_FN_A9,
+        GPIO_FN_A10,    GPIO_FN_A11,    GPIO_FN_A12,    GPIO_FN_A13,
+        GPIO_FN_A14,    GPIO_FN_A15,    GPIO_FN_A16,    GPIO_FN_A17,
+        GPIO_FN_A18,    GPIO_FN_A19,    GPIO_FN_A20,    GPIO_FN_A21,
+        GPIO_FN_A22,    GPIO_FN_A23,    GPIO_FN_A24,    GPIO_FN_A25,
+        GPIO_FN_A26,
+
+        GPIO_FN_CS0,    GPIO_FN_CS2,    GPIO_FN_CS4,
+        GPIO_FN_CS5A,   GPIO_FN_CS5B,   GPIO_FN_CS6A,
+
+        /*
+         * BSC/FLCTL            (PORT 23, 24,
+         *                            46, 47, 48, 49,
+         *                            50, 51, 52, 53, 54, 55, 56, 57, 58, 59,
+         *                            60, 61, 69, 70)
+         */
+        GPIO_FN_RD_FSC,         GPIO_FN_WE0_FWE,
+        GPIO_FN_A4_FOE,         GPIO_FN_A5_FCDE,
+        GPIO_FN_D0_NAF0,        GPIO_FN_D1_NAF1,        GPIO_FN_D2_NAF2,
+        GPIO_FN_D3_NAF3,        GPIO_FN_D4_NAF4,        GPIO_FN_D5_NAF5,
+        GPIO_FN_D6_NAF6,        GPIO_FN_D7_NAF7,        GPIO_FN_D8_NAF8,
+        GPIO_FN_D9_NAF9,        GPIO_FN_D10_NAF10,      GPIO_FN_D11_NAF11,
+        GPIO_FN_D12_NAF12,      GPIO_FN_D13_NAF13,      GPIO_FN_D14_NAF14,
+        GPIO_FN_D15_NAF15,
+
+        /*
+         * MMCIF(1)             (PORT 84, 85, 86, 87, 88, 89,
+         *                            90, 91, 92, 99)
+         */
+        GPIO_FN_MMCD0_0,        GPIO_FN_MMCD0_1,        GPIO_FN_MMCD0_2,
+        GPIO_FN_MMCD0_3,        GPIO_FN_MMCD0_4,        GPIO_FN_MMCD0_5,
+        GPIO_FN_MMCD0_6,        GPIO_FN_MMCD0_7,
+        GPIO_FN_MMCCMD0,        GPIO_FN_MMCCLK0,
+
+        /* MMCIF(2)             (PORT 54, 55, 56, 57, 58, 59, 60, 61, 66, 67) */
+        GPIO_FN_MMCD1_0,        GPIO_FN_MMCD1_1,        GPIO_FN_MMCD1_2,
+        GPIO_FN_MMCD1_3,        GPIO_FN_MMCD1_4,        GPIO_FN_MMCD1_5,
+        GPIO_FN_MMCD1_6,        GPIO_FN_MMCD1_7,
+        GPIO_FN_MMCCLK1,        GPIO_FN_MMCCMD1,
+
+        /* SPU2         (PORT 65) */
+        GPIO_FN_VINT_I,
+
+        /* FLCTL        (PORT 66, 68, 73) */
+        GPIO_FN_FCE1,   GPIO_FN_FCE0,   GPIO_FN_FRB,
+
+        /* HSI          (PORT 76, 77, 78, 79, 80, 81, 82, 83) */
+        GPIO_FN_GP_RX_FLAG,     GPIO_FN_GP_RX_DATA,     GPIO_FN_GP_TX_READY,
+        GPIO_FN_GP_RX_WAKE,     GPIO_FN_MP_TX_FLAG,     GPIO_FN_MP_TX_DATA,
+        GPIO_FN_MP_RX_READY,    GPIO_FN_MP_TX_WAKE,
+
+        /*
+         * MFI          (PORT 76, 77, 78, 79,
+         *                    80, 81, 82, 83, 84, 85, 86, 87, 88, 89,
+         *                    90, 91, 92, 93, 94, 95, 96, 97, 98, 99)
+         */
+        GPIO_FN_MFIv6,  /* see MSEL4CR 6 */
+        GPIO_FN_MFIv4,  /* see MSEL4CR 6 */
+
+        GPIO_FN_MEMC_CS0,               GPIO_FN_MEMC_BUSCLK_MEMC_A0,
+        GPIO_FN_MEMC_CS1_MEMC_A1,       GPIO_FN_MEMC_ADV_MEMC_DREQ0,
+        GPIO_FN_MEMC_WAIT_MEMC_DREQ1,   GPIO_FN_MEMC_NOE,
+        GPIO_FN_MEMC_NWE,               GPIO_FN_MEMC_INT,
+
+        GPIO_FN_MEMC_AD0,       GPIO_FN_MEMC_AD1,       GPIO_FN_MEMC_AD2,
+        GPIO_FN_MEMC_AD3,       GPIO_FN_MEMC_AD4,       GPIO_FN_MEMC_AD5,
+        GPIO_FN_MEMC_AD6,       GPIO_FN_MEMC_AD7,       GPIO_FN_MEMC_AD8,
+        GPIO_FN_MEMC_AD9,       GPIO_FN_MEMC_AD10,      GPIO_FN_MEMC_AD11,
+        GPIO_FN_MEMC_AD12,      GPIO_FN_MEMC_AD13,      GPIO_FN_MEMC_AD14,
+        GPIO_FN_MEMC_AD15,
+
+        /* SIM          (PORT 94, 95, 98) */
+        GPIO_FN_SIM_RST,        GPIO_FN_SIM_CLK,        GPIO_FN_SIM_D,
+
+        /* TPU          (PORT 93, 99, 112, 160, 161) */
+        GPIO_FN_TPU0TO0,        GPIO_FN_TPU0TO1,
+        GPIO_FN_TPU0TO2_93,     GPIO_FN_TPU0TO2_99,
+        GPIO_FN_TPU0TO3,
+
+        /* I2C2         (PORT 110, 111) */
+        GPIO_FN_I2C_SCL2,       GPIO_FN_I2C_SDA2,
+
+        /* I2C3(1)      (PORT 114, 115) */
+        GPIO_FN_I2C_SCL3,       GPIO_FN_I2C_SDA3,
+
+        /* I2C3(2)      (PORT 137, 145) */
+        GPIO_FN_I2C_SCL3S,      GPIO_FN_I2C_SDA3S,
+
+        /* I2C4(2)      (PORT 116, 117) */
+        GPIO_FN_I2C_SCL4,       GPIO_FN_I2C_SDA4,
+
+        /* I2C4(2)      (PORT 146, 147) */
+        GPIO_FN_I2C_SCL4S,      GPIO_FN_I2C_SDA4S,
+
+        /*
+         * KEYSC        (PORT 121, 122, 123, 124, 125, 126, 127, 128, 129,
+         *                    130, 131, 132, 133, 134, 135, 136)
+         */
+        GPIO_FN_KEYOUT0,        GPIO_FN_KEYIN0_121,     GPIO_FN_KEYIN0_136,
+        GPIO_FN_KEYOUT1,        GPIO_FN_KEYIN1_122,     GPIO_FN_KEYIN1_135,
+        GPIO_FN_KEYOUT2,        GPIO_FN_KEYIN2_123,     GPIO_FN_KEYIN2_134,
+        GPIO_FN_KEYOUT3,        GPIO_FN_KEYIN3_124,     GPIO_FN_KEYIN3_133,
+        GPIO_FN_KEYOUT4,        GPIO_FN_KEYIN4,
+        GPIO_FN_KEYOUT5,        GPIO_FN_KEYIN5,
+        GPIO_FN_KEYOUT6,        GPIO_FN_KEYIN6,
+        GPIO_FN_KEYOUT7,        GPIO_FN_KEYIN7,
+
+        /*
+         * LCDC         (PORT      121, 122, 123, 124, 125, 126, 127, 128, 129,
+         *                    130, 131, 132, 133, 134, 135, 136, 137, 138, 139,
+         *                    140, 141, 142, 143, 144, 145, 146, 147, 148, 149,
+         *                    150, 151)
+         */
+        GPIO_FN_LCDC0_SELECT, /* LCDC 0 */
+        GPIO_FN_LCDC1_SELECT, /* LCDC 1 */
+        GPIO_FN_LCDHSYN,        GPIO_FN_LCDCS,  GPIO_FN_LCDVSYN,
+        GPIO_FN_LCDDCK,         GPIO_FN_LCDWR,  GPIO_FN_LCDRD,
+        GPIO_FN_LCDDISP,        GPIO_FN_LCDRS,  GPIO_FN_LCDLCLK,
+        GPIO_FN_LCDDON,
+
+        GPIO_FN_LCDD0,  GPIO_FN_LCDD1,  GPIO_FN_LCDD2,  GPIO_FN_LCDD3,
+        GPIO_FN_LCDD4,  GPIO_FN_LCDD5,  GPIO_FN_LCDD6,  GPIO_FN_LCDD7,
+        GPIO_FN_LCDD8,  GPIO_FN_LCDD9,  GPIO_FN_LCDD10, GPIO_FN_LCDD11,
+        GPIO_FN_LCDD12, GPIO_FN_LCDD13, GPIO_FN_LCDD14, GPIO_FN_LCDD15,
+        GPIO_FN_LCDD16, GPIO_FN_LCDD17, GPIO_FN_LCDD18, GPIO_FN_LCDD19,
+        GPIO_FN_LCDD20, GPIO_FN_LCDD21, GPIO_FN_LCDD22, GPIO_FN_LCDD23,
+
+        /* IRDA         (PORT 139, 140, 141, 142) */
+        GPIO_FN_IRDA_OUT,       GPIO_FN_IRDA_IN,        GPIO_FN_IRDA_FIRSEL,
+        GPIO_FN_IROUT_139,      GPIO_FN_IROUT_140,
+
+        /* TSIF1        (PORT 156, 157, 158, 159) */
+        GPIO_FN_TS0_1SELECT, /* TSIF0 - 1 select */
+        GPIO_FN_TS0_2SELECT, /* TSIF0 - 2 select */
+        GPIO_FN_TS1_1SELECT, /* TSIF1 - 1 select */
+        GPIO_FN_TS1_2SELECT, /* TSIF1 - 2 select */
+
+        GPIO_FN_TS_SPSYNC1,     GPIO_FN_TS_SDAT1,
+        GPIO_FN_TS_SDEN1,       GPIO_FN_TS_SCK1,
+
+        /* TSIF2        (PORT 137, 145, 146, 147) */
+        GPIO_FN_TS_SPSYNC2,     GPIO_FN_TS_SDAT2,
+        GPIO_FN_TS_SDEN2,       GPIO_FN_TS_SCK2,
+
+        /* HDMI         (PORT 169, 170) */
+        GPIO_FN_HDMI_HPD,       GPIO_FN_HDMI_CEC,
+
+        /* SDHI0        (PORT 171, 172, 173, 174, 175, 176, 177, 178) */
+        GPIO_FN_SDHICLK0,       GPIO_FN_SDHICD0,
+        GPIO_FN_SDHICMD0,       GPIO_FN_SDHIWP0,
+        GPIO_FN_SDHID0_0,       GPIO_FN_SDHID0_1,
+        GPIO_FN_SDHID0_2,       GPIO_FN_SDHID0_3,
+
+        /* SDHI1        (PORT 179, 180, 181, 182, 183, 184) */
+        GPIO_FN_SDHICLK1,       GPIO_FN_SDHICMD1,       GPIO_FN_SDHID1_0,
+        GPIO_FN_SDHID1_1,       GPIO_FN_SDHID1_2,       GPIO_FN_SDHID1_3,
+
+        /* SDHI2        (PORT 185, 186, 187, 188, 189, 190) */
+        GPIO_FN_SDHICLK2,       GPIO_FN_SDHICMD2,       GPIO_FN_SDHID2_0,
+        GPIO_FN_SDHID2_1,       GPIO_FN_SDHID2_2,       GPIO_FN_SDHID2_3,
+
+        /* SDENC        see MSEL4CR 19 */
+        GPIO_FN_SDENC_CPG,
+        GPIO_FN_SDENC_DV_CLKI,
+};
+
+#endif /* __ASM_SH7372_H__ */
diff --git a/arch/arm/mach-shmobile/include/mach/sh7377.h b/arch/arm/mach-shmobile/include/mach/sh7377.h
new file mode 100644
index 000000000000..f580e227dd1c
--- /dev/null
+++ b/arch/arm/mach-shmobile/include/mach/sh7377.h
@@ -0,0 +1,360 @@
+#ifndef __ASM_SH7377_H__
+#define __ASM_SH7377_H__
+
+/* Pin Function Controller:
+ * GPIO_FN_xx - GPIO used to select pin function
+ * GPIO_PORTxx - GPIO mapped to real I/O pin on CPU
+ */
+enum {
+        /* 55-1 -> 55-5 (GPIO) */
+        GPIO_PORT0, GPIO_PORT1, GPIO_PORT2, GPIO_PORT3, GPIO_PORT4,
+        GPIO_PORT5, GPIO_PORT6, GPIO_PORT7, GPIO_PORT8, GPIO_PORT9,
+
+        GPIO_PORT10, GPIO_PORT11, GPIO_PORT12, GPIO_PORT13, GPIO_PORT14,
+        GPIO_PORT15, GPIO_PORT16, GPIO_PORT17, GPIO_PORT18, GPIO_PORT19,
+
+        GPIO_PORT20, GPIO_PORT21, GPIO_PORT22, GPIO_PORT23, GPIO_PORT24,
+        GPIO_PORT25, GPIO_PORT26, GPIO_PORT27, GPIO_PORT28, GPIO_PORT29,
+
+        GPIO_PORT30, GPIO_PORT31, GPIO_PORT32, GPIO_PORT33, GPIO_PORT34,
+        GPIO_PORT35, GPIO_PORT36, GPIO_PORT37, GPIO_PORT38, GPIO_PORT39,
+
+        GPIO_PORT40, GPIO_PORT41, GPIO_PORT42, GPIO_PORT43, GPIO_PORT44,
+        GPIO_PORT45, GPIO_PORT46, GPIO_PORT47, GPIO_PORT48, GPIO_PORT49,
+
+        GPIO_PORT50, GPIO_PORT51, GPIO_PORT52, GPIO_PORT53, GPIO_PORT54,
+        GPIO_PORT55, GPIO_PORT56, GPIO_PORT57, GPIO_PORT58, GPIO_PORT59,
+
+        GPIO_PORT60, GPIO_PORT61, GPIO_PORT62, GPIO_PORT63, GPIO_PORT64,
+        GPIO_PORT65, GPIO_PORT66, GPIO_PORT67, GPIO_PORT68, GPIO_PORT69,
+
+        GPIO_PORT70, GPIO_PORT71, GPIO_PORT72, GPIO_PORT73, GPIO_PORT74,
+        GPIO_PORT75, GPIO_PORT76, GPIO_PORT77, GPIO_PORT78, GPIO_PORT79,
+
+        GPIO_PORT80, GPIO_PORT81, GPIO_PORT82, GPIO_PORT83, GPIO_PORT84,
+        GPIO_PORT85, GPIO_PORT86, GPIO_PORT87, GPIO_PORT88, GPIO_PORT89,
+
+        GPIO_PORT90, GPIO_PORT91, GPIO_PORT92, GPIO_PORT93, GPIO_PORT94,
+        GPIO_PORT95, GPIO_PORT96, GPIO_PORT97, GPIO_PORT98, GPIO_PORT99,
+
+        GPIO_PORT100, GPIO_PORT101, GPIO_PORT102, GPIO_PORT103, GPIO_PORT104,
+        GPIO_PORT105, GPIO_PORT106, GPIO_PORT107, GPIO_PORT108, GPIO_PORT109,
+
+        GPIO_PORT110, GPIO_PORT111, GPIO_PORT112, GPIO_PORT113, GPIO_PORT114,
+        GPIO_PORT115, GPIO_PORT116, GPIO_PORT117, GPIO_PORT118,
+
+        GPIO_PORT128, GPIO_PORT129,
+
+        GPIO_PORT130, GPIO_PORT131, GPIO_PORT132, GPIO_PORT133, GPIO_PORT134,
+        GPIO_PORT135, GPIO_PORT136, GPIO_PORT137, GPIO_PORT138, GPIO_PORT139,
+
+        GPIO_PORT140, GPIO_PORT141, GPIO_PORT142, GPIO_PORT143, GPIO_PORT144,
+        GPIO_PORT145, GPIO_PORT146, GPIO_PORT147, GPIO_PORT148, GPIO_PORT149,
+
+        GPIO_PORT150, GPIO_PORT151, GPIO_PORT152, GPIO_PORT153, GPIO_PORT154,
+        GPIO_PORT155, GPIO_PORT156, GPIO_PORT157, GPIO_PORT158, GPIO_PORT159,
+
+        GPIO_PORT160, GPIO_PORT161, GPIO_PORT162, GPIO_PORT163, GPIO_PORT164,
+
+        GPIO_PORT192, GPIO_PORT193, GPIO_PORT194,
+        GPIO_PORT195, GPIO_PORT196, GPIO_PORT197, GPIO_PORT198, GPIO_PORT199,
+
+        GPIO_PORT200, GPIO_PORT201, GPIO_PORT202, GPIO_PORT203, GPIO_PORT204,
+        GPIO_PORT205, GPIO_PORT206, GPIO_PORT207, GPIO_PORT208, GPIO_PORT209,
+
+        GPIO_PORT210, GPIO_PORT211, GPIO_PORT212, GPIO_PORT213, GPIO_PORT214,
+        GPIO_PORT215, GPIO_PORT216, GPIO_PORT217, GPIO_PORT218, GPIO_PORT219,
+
+        GPIO_PORT220, GPIO_PORT221, GPIO_PORT222, GPIO_PORT223, GPIO_PORT224,
+        GPIO_PORT225, GPIO_PORT226, GPIO_PORT227, GPIO_PORT228, GPIO_PORT229,
+
+        GPIO_PORT230, GPIO_PORT231, GPIO_PORT232, GPIO_PORT233, GPIO_PORT234,
+        GPIO_PORT235, GPIO_PORT236, GPIO_PORT237, GPIO_PORT238, GPIO_PORT239,
+
+        GPIO_PORT240, GPIO_PORT241, GPIO_PORT242, GPIO_PORT243, GPIO_PORT244,
+        GPIO_PORT245, GPIO_PORT246, GPIO_PORT247, GPIO_PORT248, GPIO_PORT249,
+
+        GPIO_PORT250, GPIO_PORT251, GPIO_PORT252, GPIO_PORT253, GPIO_PORT254,
+        GPIO_PORT255, GPIO_PORT256, GPIO_PORT257, GPIO_PORT258, GPIO_PORT259,
+
+        GPIO_PORT260, GPIO_PORT261, GPIO_PORT262, GPIO_PORT263, GPIO_PORT264,
+
+        /* Special Pull-up / Pull-down Functions */
+        GPIO_FN_PORT66_KEYIN0_PU, GPIO_FN_PORT67_KEYIN1_PU,
+        GPIO_FN_PORT68_KEYIN2_PU, GPIO_FN_PORT69_KEYIN3_PU,
+        GPIO_FN_PORT70_KEYIN4_PU, GPIO_FN_PORT71_KEYIN5_PU,
+        GPIO_FN_PORT72_KEYIN6_PU,
+
+        /* 55-1 (FN) */
+        GPIO_FN_VBUS_0,
+        GPIO_FN_CPORT0,
+        GPIO_FN_CPORT1,
+        GPIO_FN_CPORT2,
+        GPIO_FN_CPORT3,
+        GPIO_FN_CPORT4,
+        GPIO_FN_CPORT5,
+        GPIO_FN_CPORT6,
+        GPIO_FN_CPORT7,
+        GPIO_FN_CPORT8,
+        GPIO_FN_CPORT9,
+        GPIO_FN_CPORT10,
+        GPIO_FN_CPORT11, GPIO_FN_SIN2,
+        GPIO_FN_CPORT12, GPIO_FN_XCTS2,
+        GPIO_FN_CPORT13, GPIO_FN_RFSPO4,
+        GPIO_FN_CPORT14, GPIO_FN_RFSPO5,
+        GPIO_FN_CPORT15, GPIO_FN_SCIFA0_SCK, GPIO_FN_GPS_AGC2,
+        GPIO_FN_CPORT16, GPIO_FN_SCIFA0_TXD, GPIO_FN_GPS_AGC3,
+        GPIO_FN_CPORT17_IC_OE, GPIO_FN_SOUT2,
+        GPIO_FN_CPORT18, GPIO_FN_XRTS2, GPIO_FN_PORT19_VIO_CKO2,
+        GPIO_FN_CPORT19_MPORT1,
+        GPIO_FN_CPORT20, GPIO_FN_RFSPO6,
+        GPIO_FN_CPORT21, GPIO_FN_STATUS0,
+        GPIO_FN_CPORT22, GPIO_FN_STATUS1,
+        GPIO_FN_CPORT23, GPIO_FN_STATUS2, GPIO_FN_RFSPO7,
+        GPIO_FN_B_SYNLD1,
+        GPIO_FN_B_SYNLD2, GPIO_FN_SYSENMSK,
+        GPIO_FN_XMAINPS,
+        GPIO_FN_XDIVPS,
+        GPIO_FN_XIDRST,
+        GPIO_FN_IDCLK, GPIO_FN_IC_DP,
+        GPIO_FN_IDIO, GPIO_FN_IC_DM,
+        GPIO_FN_SOUT1, GPIO_FN_SCIFA4_TXD, GPIO_FN_M02_BERDAT,
+        GPIO_FN_SIN1, GPIO_FN_SCIFA4_RXD, GPIO_FN_XWUP,
+        GPIO_FN_XRTS1, GPIO_FN_SCIFA4_RTS, GPIO_FN_M03_BERCLK,
+        GPIO_FN_XCTS1, GPIO_FN_SCIFA4_CTS,
+        GPIO_FN_PCMCLKO,
+        GPIO_FN_SYNC8KO,
+
+        /* 55-2 (FN) */
+        GPIO_FN_DNPCM_A,
+        GPIO_FN_UPPCM_A,
+        GPIO_FN_VACK,
+        GPIO_FN_XTALB1L,
+        GPIO_FN_GPS_AGC1, GPIO_FN_SCIFA0_RTS,
+        GPIO_FN_GPS_AGC4, GPIO_FN_SCIFA0_RXD,
+        GPIO_FN_GPS_PWRDOWN, GPIO_FN_SCIFA0_CTS,
+        GPIO_FN_GPS_IM,
+        GPIO_FN_GPS_IS,
+        GPIO_FN_GPS_QM,
+        GPIO_FN_GPS_QS,
+        GPIO_FN_FMSOCK, GPIO_FN_PORT49_IRDA_OUT, GPIO_FN_PORT49_IROUT,
+        GPIO_FN_FMSOOLR, GPIO_FN_BBIF2_TSYNC2, GPIO_FN_TPU2TO2, GPIO_FN_IPORT3,
+        GPIO_FN_FMSIOLR,
+        GPIO_FN_FMSOOBT, GPIO_FN_BBIF2_TSCK2, GPIO_FN_TPU2TO3, GPIO_FN_OPORT1,
+        GPIO_FN_FMSIOBT,
+        GPIO_FN_FMSOSLD, GPIO_FN_BBIF2_TXD2, GPIO_FN_OPORT2,
+        GPIO_FN_FMSOILR, GPIO_FN_PORT53_IRDA_IN, GPIO_FN_TPU3TO3,
+        GPIO_FN_OPORT3, GPIO_FN_FMSIILR,
+        GPIO_FN_FMSOIBT, GPIO_FN_PORT54_IRDA_FIRSEL, GPIO_FN_TPU3TO2,
+        GPIO_FN_FMSIIBT,
+        GPIO_FN_FMSISLD, GPIO_FN_MFG0_OUT1, GPIO_FN_TPU0TO0,
+        GPIO_FN_A0_EA0, GPIO_FN_BS,
+        GPIO_FN_A12_EA12, GPIO_FN_PORT58_VIO_CKOR, GPIO_FN_TPU4TO2,
+        GPIO_FN_A13_EA13, GPIO_FN_PORT59_IROUT, GPIO_FN_MFG0_OUT2,
+        GPIO_FN_TPU0TO1,
+        GPIO_FN_A14_EA14, GPIO_FN_PORT60_KEYOUT5,
+        GPIO_FN_A15_EA15, GPIO_FN_PORT61_KEYOUT4,
+        GPIO_FN_A16_EA16, GPIO_FN_PORT62_KEYOUT3, GPIO_FN_MSIOF0_SS1,
+        GPIO_FN_A17_EA17, GPIO_FN_PORT63_KEYOUT2, GPIO_FN_MSIOF0_TSYNC,
+        GPIO_FN_A18_EA18, GPIO_FN_PORT64_KEYOUT1, GPIO_FN_MSIOF0_TSCK,
+        GPIO_FN_A19_EA19, GPIO_FN_PORT65_KEYOUT0, GPIO_FN_MSIOF0_TXD,
+        GPIO_FN_A20_EA20, GPIO_FN_PORT66_KEYIN0, GPIO_FN_MSIOF0_RSCK,
+        GPIO_FN_A21_EA21, GPIO_FN_PORT67_KEYIN1, GPIO_FN_MSIOF0_RSYNC,
+        GPIO_FN_A22_EA22, GPIO_FN_PORT68_KEYIN2, GPIO_FN_MSIOF0_MCK0,
+        GPIO_FN_A23_EA23, GPIO_FN_PORT69_KEYIN3, GPIO_FN_MSIOF0_MCK1,
+        GPIO_FN_A24_EA24, GPIO_FN_PORT70_KEYIN4, GPIO_FN_MSIOF0_RXD,
+        GPIO_FN_A25_EA25, GPIO_FN_PORT71_KEYIN5, GPIO_FN_MSIOF0_SS2,
+        GPIO_FN_A26, GPIO_FN_PORT72_KEYIN6,
+        GPIO_FN_D0_ED0_NAF0,
+        GPIO_FN_D1_ED1_NAF1,
+        GPIO_FN_D2_ED2_NAF2,
+        GPIO_FN_D3_ED3_NAF3,
+        GPIO_FN_D4_ED4_NAF4,
+        GPIO_FN_D5_ED5_NAF5,
+        GPIO_FN_D6_ED6_NAF6,
+        GPIO_FN_D7_ED7_NAF7,
+        GPIO_FN_D8_ED8_NAF8,
+        GPIO_FN_D9_ED9_NAF9,
+        GPIO_FN_D10_ED10_NAF10,
+        GPIO_FN_D11_ED11_NAF11,
+        GPIO_FN_D12_ED12_NAF12,
+        GPIO_FN_D13_ED13_NAF13,
+        GPIO_FN_D14_ED14_NAF14,
+        GPIO_FN_D15_ED15_NAF15,
+        GPIO_FN_CS4,
+        GPIO_FN_CS5A, GPIO_FN_FMSICK,
+        GPIO_FN_CS5B, GPIO_FN_FCE1,
+
+        /* 55-3 (FN) */
+        GPIO_FN_CS6B, GPIO_FN_XCS2, GPIO_FN_CS6A, GPIO_FN_DACK0,
+        GPIO_FN_FCE0,
+        GPIO_FN_WAIT, GPIO_FN_DREQ0,
+        GPIO_FN_RD_XRD,
+        GPIO_FN_WE0_XWR0_FWE,
+        GPIO_FN_WE1_XWR1,
+        GPIO_FN_FRB,
+        GPIO_FN_CKO,
+        GPIO_FN_NBRSTOUT,
+        GPIO_FN_NBRST,
+        GPIO_FN_GPS_EPPSIN,
+        GPIO_FN_LATCHPULSE,
+        GPIO_FN_LTESIGNAL,
+        GPIO_FN_LEGACYSTATE,
+        GPIO_FN_TCKON,
+        GPIO_FN_VIO_VD, GPIO_FN_PORT128_KEYOUT0, GPIO_FN_IPORT0,
+        GPIO_FN_VIO_HD, GPIO_FN_PORT129_KEYOUT1, GPIO_FN_IPORT1,
+        GPIO_FN_VIO_D0, GPIO_FN_PORT130_KEYOUT2, GPIO_FN_PORT130_MSIOF2_RXD,
+        GPIO_FN_VIO_D1, GPIO_FN_PORT131_KEYOUT3, GPIO_FN_PORT131_MSIOF2_SS1,
+        GPIO_FN_VIO_D2, GPIO_FN_PORT132_KEYOUT4, GPIO_FN_PORT132_MSIOF2_SS2,
+        GPIO_FN_VIO_D3, GPIO_FN_PORT133_KEYOUT5, GPIO_FN_PORT133_MSIOF2_TSYNC,
+        GPIO_FN_VIO_D4, GPIO_FN_PORT134_KEYIN0, GPIO_FN_PORT134_MSIOF2_TXD,
+        GPIO_FN_VIO_D5, GPIO_FN_PORT135_KEYIN1, GPIO_FN_PORT135_MSIOF2_TSCK,
+        GPIO_FN_VIO_D6, GPIO_FN_PORT136_KEYIN2,
+        GPIO_FN_VIO_D7, GPIO_FN_PORT137_KEYIN3,
+        GPIO_FN_VIO_D8, GPIO_FN_M9_SLCD_A01, GPIO_FN_PORT138_FSIAOMC,
+        GPIO_FN_VIO_D9, GPIO_FN_M10_SLCD_CK1, GPIO_FN_PORT139_FSIAOLR,
+        GPIO_FN_VIO_D10, GPIO_FN_M11_SLCD_SO1, GPIO_FN_TPU0TO2,
+        GPIO_FN_PORT140_FSIAOBT,
+        GPIO_FN_VIO_D11, GPIO_FN_M12_SLCD_CE1, GPIO_FN_TPU0TO3,
+        GPIO_FN_PORT141_FSIAOSLD,
+        GPIO_FN_VIO_D12, GPIO_FN_M13_BSW, GPIO_FN_PORT142_FSIACK,
+        GPIO_FN_VIO_D13, GPIO_FN_M14_GSW, GPIO_FN_PORT143_FSIAILR,
+        GPIO_FN_VIO_D14, GPIO_FN_M15_RSW, GPIO_FN_PORT144_FSIAIBT,
+        GPIO_FN_VIO_D15, GPIO_FN_TPU1TO3, GPIO_FN_PORT145_FSIAISLD,
+        GPIO_FN_VIO_CLK, GPIO_FN_PORT146_KEYIN4, GPIO_FN_IPORT2,
+        GPIO_FN_VIO_FIELD, GPIO_FN_PORT147_KEYIN5,
+        GPIO_FN_VIO_CKO, GPIO_FN_PORT148_KEYIN6,
+        GPIO_FN_A27, GPIO_FN_RDWR_XWE, GPIO_FN_MFG0_IN1,
+        GPIO_FN_MFG0_IN2,
+        GPIO_FN_TS_SPSYNC3, GPIO_FN_MSIOF2_RSCK,
+        GPIO_FN_TS_SDAT3, GPIO_FN_MSIOF2_RSYNC,
+        GPIO_FN_TPU1TO2, GPIO_FN_TS_SDEN3, GPIO_FN_PORT153_MSIOF2_SS1,
+        GPIO_FN_SOUT3, GPIO_FN_SCIFA2_TXD1, GPIO_FN_MSIOF2_MCK0,
+        GPIO_FN_SIN3, GPIO_FN_SCIFA2_RXD1, GPIO_FN_MSIOF2_MCK1,
+        GPIO_FN_XRTS3, GPIO_FN_SCIFA2_RTS1, GPIO_FN_PORT156_MSIOF2_SS2,
+        GPIO_FN_XCTS3, GPIO_FN_SCIFA2_CTS1, GPIO_FN_PORT157_MSIOF2_RXD,
+
+        /* 55-4 (FN) */
+        GPIO_FN_DINT, GPIO_FN_SCIFA2_SCK1, GPIO_FN_TS_SCK3,
+        GPIO_FN_PORT159_SCIFB_SCK, GPIO_FN_PORT159_SCIFA5_SCK, GPIO_FN_NMI,
+        GPIO_FN_PORT160_SCIFB_TXD, GPIO_FN_PORT160_SCIFA5_TXD, GPIO_FN_SOUT0,
+        GPIO_FN_PORT161_SCIFB_CTS, GPIO_FN_PORT161_SCIFA5_CTS, GPIO_FN_XCTS0,
+        GPIO_FN_MFG3_IN2,
+        GPIO_FN_PORT162_SCIFB_RXD, GPIO_FN_PORT162_SCIFA5_RXD, GPIO_FN_SIN0,
+        GPIO_FN_MFG3_IN1,
+        GPIO_FN_PORT163_SCIFB_RTS, GPIO_FN_PORT163_SCIFA5_RTS, GPIO_FN_XRTS0,
+        GPIO_FN_MFG3_OUT1,
+        GPIO_FN_TPU3TO0,
+        GPIO_FN_LCDD0, GPIO_FN_PORT192_KEYOUT0, GPIO_FN_EXT_CKI,
+        GPIO_FN_LCDD1, GPIO_FN_PORT193_KEYOUT1, GPIO_FN_PORT193_SCIFA5_CTS,
+        GPIO_FN_BBIF2_TSYNC1,
+        GPIO_FN_LCDD2, GPIO_FN_PORT194_KEYOUT2, GPIO_FN_PORT194_SCIFA5_RTS,
+        GPIO_FN_BBIF2_TSCK1,
+        GPIO_FN_LCDD3, GPIO_FN_PORT195_KEYOUT3, GPIO_FN_PORT195_SCIFA5_RXD,
+        GPIO_FN_BBIF2_TXD1,
+        GPIO_FN_LCDD4, GPIO_FN_PORT196_KEYOUT4, GPIO_FN_PORT196_SCIFA5_TXD,
+        GPIO_FN_LCDD5, GPIO_FN_PORT197_KEYOUT5, GPIO_FN_PORT197_SCIFA5_SCK,
+        GPIO_FN_MFG2_OUT2, GPIO_FN_TPU2TO1,
+        GPIO_FN_LCDD6, GPIO_FN_XWR2,
+        GPIO_FN_LCDD7, GPIO_FN_TPU4TO1, GPIO_FN_MFG4_OUT2, GPIO_FN_XWR3,
+        GPIO_FN_LCDD8, GPIO_FN_PORT200_KEYIN0, GPIO_FN_VIO_DR0, GPIO_FN_D16,
+        GPIO_FN_ED16,
+        GPIO_FN_LCDD9, GPIO_FN_PORT201_KEYIN1, GPIO_FN_VIO_DR1, GPIO_FN_D17,
+        GPIO_FN_ED17,
+        GPIO_FN_LCDD10, GPIO_FN_PORT202_KEYIN2, GPIO_FN_VIO_DR2, GPIO_FN_D18,
+        GPIO_FN_ED18,
+        GPIO_FN_LCDD11, GPIO_FN_PORT203_KEYIN3, GPIO_FN_VIO_DR3, GPIO_FN_D19,
+        GPIO_FN_ED19,
+        GPIO_FN_LCDD12, GPIO_FN_PORT204_KEYIN4, GPIO_FN_VIO_DR4, GPIO_FN_D20,
+        GPIO_FN_ED20,
+        GPIO_FN_LCDD13, GPIO_FN_PORT205_KEYIN5, GPIO_FN_VIO_DR5, GPIO_FN_D21,
+        GPIO_FN_ED21,
+        GPIO_FN_LCDD14, GPIO_FN_PORT206_KEYIN6, GPIO_FN_VIO_DR6, GPIO_FN_D22,
+        GPIO_FN_ED22,
+        GPIO_FN_LCDD15, GPIO_FN_PORT207_MSIOF0L_SS1, GPIO_FN_PORT207_KEYOUT0,
+        GPIO_FN_VIO_DR7,
+        GPIO_FN_D23, GPIO_FN_ED23,
+        GPIO_FN_LCDD16, GPIO_FN_PORT208_MSIOF0L_SS2, GPIO_FN_PORT208_KEYOUT1,
+        GPIO_FN_VIO_VDR,
+        GPIO_FN_D24, GPIO_FN_ED24,
+        GPIO_FN_LCDD17, GPIO_FN_PORT209_KEYOUT2, GPIO_FN_VIO_HDR, GPIO_FN_D25,
+        GPIO_FN_ED25,
+        GPIO_FN_LCDD18, GPIO_FN_DREQ2, GPIO_FN_PORT210_MSIOF0L_SS1, GPIO_FN_D26,
+        GPIO_FN_ED26,
+        GPIO_FN_LCDD19, GPIO_FN_PORT211_MSIOF0L_SS2, GPIO_FN_D27, GPIO_FN_ED27,
+        GPIO_FN_LCDD20, GPIO_FN_TS_SPSYNC1, GPIO_FN_MSIOF0L_MCK0, GPIO_FN_D28,
+        GPIO_FN_ED28,
+        GPIO_FN_LCDD21, GPIO_FN_TS_SDAT1, GPIO_FN_MSIOF0L_MCK1, GPIO_FN_D29,
+        GPIO_FN_ED29,
+        GPIO_FN_LCDD22, GPIO_FN_TS_SDEN1, GPIO_FN_MSIOF0L_RSCK, GPIO_FN_D30,
+        GPIO_FN_ED30,
+        GPIO_FN_LCDD23, GPIO_FN_TS_SCK1, GPIO_FN_MSIOF0L_RSYNC, GPIO_FN_D31,
+        GPIO_FN_ED31,
+        GPIO_FN_LCDDCK, GPIO_FN_LCDWR, GPIO_FN_PORT216_KEYOUT3,
+        GPIO_FN_VIO_CLKR,
+        GPIO_FN_LCDRD, GPIO_FN_DACK2, GPIO_FN_MSIOF0L_TSYNC,
+        GPIO_FN_LCDHSYN, GPIO_FN_LCDCS, GPIO_FN_LCDCS2, GPIO_FN_DACK3,
+        GPIO_FN_PORT218_VIO_CKOR, GPIO_FN_PORT218_KEYOUT4,
+        GPIO_FN_LCDDISP, GPIO_FN_LCDRS, GPIO_FN_DREQ3, GPIO_FN_MSIOF0L_TSCK,
+        GPIO_FN_LCDVSYN, GPIO_FN_LCDVSYN2, GPIO_FN_PORT220_KEYOUT5,
+        GPIO_FN_LCDLCLK, GPIO_FN_DREQ1, GPIO_FN_PWEN, GPIO_FN_MSIOF0L_RXD,
+        GPIO_FN_LCDDON, GPIO_FN_LCDDON2, GPIO_FN_DACK1, GPIO_FN_OVCN,
+        GPIO_FN_MSIOF0L_TXD,
+        GPIO_FN_SCIFA1_TXD, GPIO_FN_OVCN2,
+        GPIO_FN_EXTLP, GPIO_FN_SCIFA1_SCK, GPIO_FN_USBTERM,
+        GPIO_FN_PORT226_VIO_CKO2,
+        GPIO_FN_SCIFA1_RTS, GPIO_FN_IDIN,
+        GPIO_FN_SCIFA1_RXD,
+        GPIO_FN_SCIFA1_CTS, GPIO_FN_MFG1_IN1,
+        GPIO_FN_MSIOF1_TXD, GPIO_FN_SCIFA2_TXD2, GPIO_FN_PORT230_FSIAOMC,
+        GPIO_FN_MSIOF1_TSYNC, GPIO_FN_SCIFA2_CTS2, GPIO_FN_PORT231_FSIAOLR,
+        GPIO_FN_MSIOF1_TSCK, GPIO_FN_SCIFA2_SCK2, GPIO_FN_PORT232_FSIAOBT,
+        GPIO_FN_MSIOF1_RXD, GPIO_FN_SCIFA2_RXD2, GPIO_FN_GPS_VCOTRIG,
+        GPIO_FN_PORT233_FSIACK,
+        GPIO_FN_MSIOF1_RSCK, GPIO_FN_SCIFA2_RTS2, GPIO_FN_PORT234_FSIAOSLD,
+        GPIO_FN_MSIOF1_RSYNC, GPIO_FN_OPORT0, GPIO_FN_MFG1_IN2,
+        GPIO_FN_PORT235_FSIAILR,
+        GPIO_FN_MSIOF1_MCK0, GPIO_FN_I2C_SDA2, GPIO_FN_PORT236_FSIAIBT,
+        GPIO_FN_MSIOF1_MCK1, GPIO_FN_I2C_SCL2, GPIO_FN_PORT237_FSIAISLD,
+        GPIO_FN_MSIOF1_SS1, GPIO_FN_EDBGREQ3,
+
+        /* 55-5 (FN) */
+        GPIO_FN_MSIOF1_SS2,
+        GPIO_FN_SCIFA6_TXD,
+        GPIO_FN_PORT241_IRDA_OUT, GPIO_FN_PORT241_IROUT, GPIO_FN_MFG4_OUT1,
+        GPIO_FN_TPU4TO0,
+        GPIO_FN_PORT242_IRDA_IN, GPIO_FN_MFG4_IN2,
+        GPIO_FN_PORT243_IRDA_FIRSEL, GPIO_FN_PORT243_VIO_CKO2,
+        GPIO_FN_PORT244_SCIFA5_CTS, GPIO_FN_MFG2_IN1, GPIO_FN_PORT244_SCIFB_CTS,
+        GPIO_FN_PORT244_MSIOF2_RXD,
+        GPIO_FN_PORT245_SCIFA5_RTS, GPIO_FN_MFG2_IN2, GPIO_FN_PORT245_SCIFB_RTS,
+        GPIO_FN_PORT245_MSIOF2_TXD,
+        GPIO_FN_PORT246_SCIFA5_RXD, GPIO_FN_MFG1_OUT1,
+        GPIO_FN_PORT246_SCIFB_RXD, GPIO_FN_TPU1TO0,
+        GPIO_FN_PORT247_SCIFA5_TXD, GPIO_FN_MFG3_OUT2,
+        GPIO_FN_PORT247_SCIFB_TXD, GPIO_FN_TPU3TO1,
+        GPIO_FN_PORT248_SCIFA5_SCK, GPIO_FN_MFG2_OUT1,
+        GPIO_FN_PORT248_SCIFB_SCK, GPIO_FN_TPU2TO0,
+        GPIO_FN_PORT248_MSIOF2_TSCK,
+        GPIO_FN_PORT249_IROUT, GPIO_FN_MFG4_IN1, GPIO_FN_PORT249_MSIOF2_TSYNC,
+        GPIO_FN_SDHICLK0, GPIO_FN_TCK2_SWCLK_MC0,
+        GPIO_FN_SDHICD0,
+        GPIO_FN_SDHID0_0, GPIO_FN_TMS2_SWDIO_MC0,
+        GPIO_FN_SDHID0_1, GPIO_FN_TDO2_SWO0_MC0,
+        GPIO_FN_SDHID0_2, GPIO_FN_TDI2,
+        GPIO_FN_SDHID0_3, GPIO_FN_RTCK2_SWO1_MC0,
+        GPIO_FN_SDHICMD0, GPIO_FN_TRST2,
+        GPIO_FN_SDHIWP0, GPIO_FN_EDBGREQ2,
+        GPIO_FN_SDHICLK1, GPIO_FN_TCK3_SWCLK_MC1,
+        GPIO_FN_SDHID1_0, GPIO_FN_M11_SLCD_SO2, GPIO_FN_TS_SPSYNC2,
+        GPIO_FN_TMS3_SWDIO_MC1,
+        GPIO_FN_SDHID1_1, GPIO_FN_M9_SLCD_A02, GPIO_FN_TS_SDAT2,
+        GPIO_FN_TDO3_SWO0_MC1,
+        GPIO_FN_SDHID1_2, GPIO_FN_M10_SLCD_CK2, GPIO_FN_TS_SDEN2, GPIO_FN_TDI3,
+        GPIO_FN_SDHID1_3, GPIO_FN_M12_SLCD_CE2, GPIO_FN_TS_SCK2,
+        GPIO_FN_RTCK3_SWO1_MC1,
+        GPIO_FN_SDHICMD1, GPIO_FN_TRST3,
+        GPIO_FN_RESETOUTS,
+};
+
+#endif /* __ASM_SH7377_H__ */
diff --git a/arch/arm/mach-shmobile/include/mach/system.h b/arch/arm/mach-shmobile/include/mach/system.h
new file mode 100644
index 000000000000..76a687eeaa22
--- /dev/null
+++ b/arch/arm/mach-shmobile/include/mach/system.h
@@ -0,0 +1,14 @@
+#ifndef __ASM_ARCH_SYSTEM_H
+#define __ASM_ARCH_SYSTEM_H
+
+static inline void arch_idle(void)
+{
+        cpu_do_idle();
+}
+
+static inline void arch_reset(char mode, const char *cmd)
+{
+        cpu_reset(0);
+}
+
+#endif
diff --git a/arch/arm/mach-shmobile/include/mach/timex.h b/arch/arm/mach-shmobile/include/mach/timex.h
new file mode 100644
index 000000000000..ae0d8d825c23
--- /dev/null
+++ b/arch/arm/mach-shmobile/include/mach/timex.h
@@ -0,0 +1,6 @@
+#ifndef __ASM_MACH_TIMEX_H
+#define __ASM_MACH_TIMEX_H
+
+#define CLOCK_TICK_RATE         1193180 /* unused i8253 PIT value */
+
+#endif /* __ASM_MACH_TIMEX_H */
diff --git a/arch/arm/mach-shmobile/include/mach/uncompress.h b/arch/arm/mach-shmobile/include/mach/uncompress.h
new file mode 100644
index 000000000000..0bd7556b1387
--- /dev/null
+++ b/arch/arm/mach-shmobile/include/mach/uncompress.h
@@ -0,0 +1,21 @@
+#ifndef __ASM_MACH_UNCOMPRESS_H
+#define __ASM_MACH_UNCOMPRESS_H
+
+/*
+ * This does not append a newline
+ */
+static void putc(int c)
+{
+}
+
+static inline void flush(void)
+{
+}
+
+static void arch_decomp_setup(void)
+{
+}
+
+#define arch_decomp_wdog()
+
+#endif /* __ASM_MACH_UNCOMPRESS_H */
diff --git a/arch/arm/mach-shmobile/include/mach/vmalloc.h b/arch/arm/mach-shmobile/include/mach/vmalloc.h
new file mode 100644
index 000000000000..fb3c4f1ab252
--- /dev/null
+++ b/arch/arm/mach-shmobile/include/mach/vmalloc.h
@@ -0,0 +1,6 @@
+#ifndef __ASM_MACH_VMALLOC_H
+#define __ASM_MACH_VMALLOC_H
+
+#define VMALLOC_END       (PAGE_OFFSET + 0x24000000)
+
+#endif /* __ASM_MACH_VMALLOC_H */
diff --git a/arch/arm/mach-shmobile/intc-sh7367.c b/arch/arm/mach-shmobile/intc-sh7367.c
new file mode 100644
index 000000000000..6a547b47aabb
--- /dev/null
+++ b/arch/arm/mach-shmobile/intc-sh7367.c
@@ -0,0 +1,270 @@
+/*
+ * sh7367 processor support - INTC hardware block
+ *
+ * Copyright (C) 2010  Magnus Damm
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/interrupt.h>
+#include <linux/irq.h>
+#include <linux/io.h>
+#include <linux/sh_intc.h>
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+
+enum {
+        UNUSED_INTCA = 0,
+
+        /* interrupt sources INTCA */
+        IRQ0A, IRQ1A, IRQ2A, IRQ3A, IRQ4A, IRQ5A, IRQ6A, IRQ7A,
+        IRQ8A, IRQ9A, IRQ10A, IRQ11A, IRQ12A, IRQ13A, IRQ14A, IRQ15A,
+        DIRC,
+        CRYPT1_ERR, CRYPT2_STD,
+        IIC1_ALI1, IIC1_TACKI1, IIC1_WAITI1, IIC1_DTEI1,
+        ARM11_IRQPMU, ARM11_COMMTX, ARM11_COMMRX,
+        ETM11_ACQCMP, ETM11_FULL,
+        MFI_MFIM, MFI_MFIS,
+        BBIF1, BBIF2,
+        USBDMAC_USHDMI,
+        USBHS_USHI0, USBHS_USHI1,
+        CMT1_CMT10, CMT1_CMT11, CMT1_CMT12, CMT1_CMT13, CMT2, CMT3,
+        KEYSC_KEY,
+        SCIFA0, SCIFA1, SCIFA2, SCIFA3,
+        MSIOF2, MSIOF1,
+        SCIFA4, SCIFA5, SCIFB,
+        FLCTL_FLSTEI, FLCTL_FLTENDI, FLCTL_FLTREQ0I, FLCTL_FLTREQ1I,
+        SDHI0_SDHI0I0, SDHI0_SDHI0I1, SDHI0_SDHI0I2, SDHI0_SDHI0I3,
+        SDHI1_SDHI1I0, SDHI1_SDHI1I1, SDHI1_SDHI1I2, SDHI1_SDHI1I3,
+        MSU_MSU, MSU_MSU2,
+        IREM,
+        SIU,
+        SPU,
+        IRDA,
+        TPU0, TPU1, TPU2, TPU3, TPU4,
+        LCRC,
+        PINT1, PINT2,
+        TTI20,
+        MISTY,
+        DDM,
+        SDHI2_SDHI2I0, SDHI2_SDHI2I1, SDHI2_SDHI2I2, SDHI2_SDHI2I3,
+        RWDT0, RWDT1,
+        DMAC_1_DEI0, DMAC_1_DEI1, DMAC_1_DEI2, DMAC_1_DEI3,
+        DMAC_2_DEI4, DMAC_2_DEI5, DMAC_2_DADERR,
+        DMAC2_1_DEI0, DMAC2_1_DEI1, DMAC2_1_DEI2, DMAC2_1_DEI3,
+        DMAC2_2_DEI4, DMAC2_2_DEI5, DMAC2_2_DADERR,
+        DMAC3_1_DEI0, DMAC3_1_DEI1, DMAC3_1_DEI2, DMAC3_1_DEI3,
+        DMAC3_2_DEI4, DMAC3_2_DEI5, DMAC3_2_DADERR,
+
+        /* interrupt groups INTCA */
+        DMAC_1, DMAC_2, DMAC2_1, DMAC2_2, DMAC3_1, DMAC3_2,
+        ETM11, ARM11, USBHS, FLCTL, IIC1, SDHI0, SDHI1, SDHI2,
+};
+
+static struct intc_vect intca_vectors[] = {
+        INTC_VECT(IRQ0A, 0x0200), INTC_VECT(IRQ1A, 0x0220),
+        INTC_VECT(IRQ2A, 0x0240), INTC_VECT(IRQ3A, 0x0260),
+        INTC_VECT(IRQ4A, 0x0280), INTC_VECT(IRQ5A, 0x02a0),
+        INTC_VECT(IRQ6A, 0x02c0), INTC_VECT(IRQ7A, 0x02e0),
+        INTC_VECT(IRQ8A, 0x0300), INTC_VECT(IRQ9A, 0x0320),
+        INTC_VECT(IRQ10A, 0x0340), INTC_VECT(IRQ11A, 0x0360),
+        INTC_VECT(IRQ12A, 0x0380), INTC_VECT(IRQ13A, 0x03a0),
+        INTC_VECT(IRQ14A, 0x03c0), INTC_VECT(IRQ15A, 0x03e0),
+        INTC_VECT(DIRC, 0x0560),
+        INTC_VECT(CRYPT1_ERR, 0x05e0),
+        INTC_VECT(CRYPT2_STD, 0x0700),
+        INTC_VECT(IIC1_ALI1, 0x0780), INTC_VECT(IIC1_TACKI1, 0x07a0),
+        INTC_VECT(IIC1_WAITI1, 0x07c0), INTC_VECT(IIC1_DTEI1, 0x07e0),
+        INTC_VECT(ARM11_IRQPMU, 0x0800), INTC_VECT(ARM11_COMMTX, 0x0840),
+        INTC_VECT(ARM11_COMMRX, 0x0860),
+        INTC_VECT(ETM11_ACQCMP, 0x0880), INTC_VECT(ETM11_FULL, 0x08a0),
+        INTC_VECT(MFI_MFIM, 0x0900), INTC_VECT(MFI_MFIS, 0x0920),
+        INTC_VECT(BBIF1, 0x0940), INTC_VECT(BBIF2, 0x0960),
+        INTC_VECT(USBDMAC_USHDMI, 0x0a00),
+        INTC_VECT(USBHS_USHI0, 0x0a20), INTC_VECT(USBHS_USHI1, 0x0a40),
+        INTC_VECT(CMT1_CMT10, 0x0b00), INTC_VECT(CMT1_CMT11, 0x0b20),
+        INTC_VECT(CMT1_CMT12, 0x0b40), INTC_VECT(CMT1_CMT13, 0x0b60),
+        INTC_VECT(CMT2, 0x0b80), INTC_VECT(CMT3, 0x0ba0),
+        INTC_VECT(KEYSC_KEY, 0x0be0),
+        INTC_VECT(SCIFA0, 0x0c00), INTC_VECT(SCIFA1, 0x0c20),
+        INTC_VECT(SCIFA2, 0x0c40), INTC_VECT(SCIFA3, 0x0c60),
+        INTC_VECT(MSIOF2, 0x0c80), INTC_VECT(MSIOF1, 0x0d00),
+        INTC_VECT(SCIFA4, 0x0d20), INTC_VECT(SCIFA5, 0x0d40),
+        INTC_VECT(SCIFB, 0x0d60),
+        INTC_VECT(FLCTL_FLSTEI, 0x0d80), INTC_VECT(FLCTL_FLTENDI, 0x0da0),
+        INTC_VECT(FLCTL_FLTREQ0I, 0x0dc0), INTC_VECT(FLCTL_FLTREQ1I, 0x0de0),
+        INTC_VECT(SDHI0_SDHI0I0, 0x0e00), INTC_VECT(SDHI0_SDHI0I1, 0x0e20),
+        INTC_VECT(SDHI0_SDHI0I2, 0x0e40), INTC_VECT(SDHI0_SDHI0I3, 0x0e60),
+        INTC_VECT(SDHI1_SDHI1I0, 0x0e80), INTC_VECT(SDHI1_SDHI1I1, 0x0ea0),
+        INTC_VECT(SDHI1_SDHI1I2, 0x0ec0), INTC_VECT(SDHI1_SDHI1I3, 0x0ee0),
+        INTC_VECT(MSU_MSU, 0x0f20), INTC_VECT(MSU_MSU2, 0x0f40),
+        INTC_VECT(IREM, 0x0f60),
+        INTC_VECT(SIU, 0x0fa0),
+        INTC_VECT(SPU, 0x0fc0),
+        INTC_VECT(IRDA, 0x0480),
+        INTC_VECT(TPU0, 0x04a0), INTC_VECT(TPU1, 0x04c0),
+        INTC_VECT(TPU2, 0x04e0), INTC_VECT(TPU3, 0x0500),
+        INTC_VECT(TPU4, 0x0520),
+        INTC_VECT(LCRC, 0x0540),
+        INTC_VECT(PINT1, 0x1000), INTC_VECT(PINT2, 0x1020),
+        INTC_VECT(TTI20, 0x1100),
+        INTC_VECT(MISTY, 0x1120),
+        INTC_VECT(DDM, 0x1140),
+        INTC_VECT(SDHI2_SDHI2I0, 0x1200), INTC_VECT(SDHI2_SDHI2I1, 0x1220),
+        INTC_VECT(SDHI2_SDHI2I2, 0x1240), INTC_VECT(SDHI2_SDHI2I3, 0x1260),
+        INTC_VECT(RWDT0, 0x1280), INTC_VECT(RWDT1, 0x12a0),
+        INTC_VECT(DMAC_1_DEI0, 0x2000), INTC_VECT(DMAC_1_DEI1, 0x2020),
+        INTC_VECT(DMAC_1_DEI2, 0x2040), INTC_VECT(DMAC_1_DEI3, 0x2060),
+        INTC_VECT(DMAC_2_DEI4, 0x2080), INTC_VECT(DMAC_2_DEI5, 0x20a0),
+        INTC_VECT(DMAC_2_DADERR, 0x20c0),
+        INTC_VECT(DMAC2_1_DEI0, 0x2100), INTC_VECT(DMAC2_1_DEI1, 0x2120),
+        INTC_VECT(DMAC2_1_DEI2, 0x2140), INTC_VECT(DMAC2_1_DEI3, 0x2160),
+        INTC_VECT(DMAC2_2_DEI4, 0x2180), INTC_VECT(DMAC2_2_DEI5, 0x21a0),
+        INTC_VECT(DMAC2_2_DADERR, 0x21c0),
+        INTC_VECT(DMAC3_1_DEI0, 0x2200), INTC_VECT(DMAC3_1_DEI1, 0x2220),
+        INTC_VECT(DMAC3_1_DEI2, 0x2240), INTC_VECT(DMAC3_1_DEI3, 0x2260),
+        INTC_VECT(DMAC3_2_DEI4, 0x2280), INTC_VECT(DMAC3_2_DEI5, 0x22a0),
+        INTC_VECT(DMAC3_2_DADERR, 0x22c0),
+};
+
+static struct intc_group intca_groups[] __initdata = {
+        INTC_GROUP(DMAC_1, DMAC_1_DEI0,
+                   DMAC_1_DEI1, DMAC_1_DEI2, DMAC_1_DEI3),
+        INTC_GROUP(DMAC_2, DMAC_2_DEI4,
+                   DMAC_2_DEI5, DMAC_2_DADERR),
+        INTC_GROUP(DMAC2_1, DMAC2_1_DEI0,
+                   DMAC2_1_DEI1, DMAC2_1_DEI2, DMAC2_1_DEI3),
+        INTC_GROUP(DMAC2_2, DMAC2_2_DEI4,
+                   DMAC2_2_DEI5, DMAC2_2_DADERR),
+        INTC_GROUP(DMAC3_1, DMAC3_1_DEI0,
+                   DMAC3_1_DEI1, DMAC3_1_DEI2, DMAC3_1_DEI3),
+        INTC_GROUP(DMAC3_2, DMAC3_2_DEI4,
+                   DMAC3_2_DEI5, DMAC3_2_DADERR),
+        INTC_GROUP(ETM11, ETM11_ACQCMP, ETM11_FULL),
+        INTC_GROUP(ARM11, ARM11_IRQPMU, ARM11_COMMTX, ARM11_COMMTX),
+        INTC_GROUP(USBHS, USBHS_USHI0, USBHS_USHI1),
+        INTC_GROUP(FLCTL, FLCTL_FLSTEI, FLCTL_FLTENDI,
+                   FLCTL_FLTREQ0I, FLCTL_FLTREQ1I),
+        INTC_GROUP(IIC1, IIC1_ALI1, IIC1_TACKI1, IIC1_WAITI1, IIC1_DTEI1),
+        INTC_GROUP(SDHI0, SDHI0_SDHI0I0, SDHI0_SDHI0I1,
+                   SDHI0_SDHI0I2, SDHI0_SDHI0I3),
+        INTC_GROUP(SDHI1, SDHI1_SDHI1I0, SDHI1_SDHI1I1,
+                   SDHI1_SDHI1I2, SDHI1_SDHI1I3),
+        INTC_GROUP(SDHI2, SDHI2_SDHI2I0, SDHI2_SDHI2I1,
+                   SDHI2_SDHI2I2, SDHI2_SDHI2I3),
+};
+
+static struct intc_mask_reg intca_mask_registers[] = {
+        { 0xe6900040, 0xe6900060, 8, /* INTMSK00A / INTMSKCLR00A */
+          { IRQ0A, IRQ1A, IRQ2A, IRQ3A, IRQ4A, IRQ5A, IRQ6A, IRQ7A } },
+        { 0xe6900044, 0xe6900064, 8, /* INTMSK10A / INTMSKCLR10A */
+          { IRQ8A, IRQ9A, IRQ10A, IRQ11A, IRQ12A, IRQ13A, IRQ14A, IRQ15A } },
+        { 0xe6940080, 0xe69400c0, 8, /* IMR0A / IMCR0A */
+          { DMAC2_1_DEI3, DMAC2_1_DEI2, DMAC2_1_DEI1, DMAC2_1_DEI0,
+            ARM11_IRQPMU, 0, ARM11_COMMTX, ARM11_COMMRX } },
+        { 0xe6940084, 0xe69400c4, 8, /* IMR1A / IMCR1A */
+          { CRYPT1_ERR, CRYPT2_STD, DIRC, 0,
+            DMAC_1_DEI3, DMAC_1_DEI2, DMAC_1_DEI1, DMAC_1_DEI0 } },
+        { 0xe6940088, 0xe69400c8, 8, /* IMR2A / IMCR2A */
+          { PINT1, PINT2, 0, 0,
+            BBIF1, BBIF2, MFI_MFIS, MFI_MFIM } },
+        { 0xe694008c, 0xe69400cc, 8, /* IMR3A / IMCR3A */
+          { DMAC3_1_DEI3, DMAC3_1_DEI2, DMAC3_1_DEI1, DMAC3_1_DEI0,
+            DMAC3_2_DADERR, DMAC3_2_DEI5, DMAC3_2_DEI4, IRDA } },
+        { 0xe6940090, 0xe69400d0, 8, /* IMR4A / IMCR4A */
+          { DDM, 0, 0, 0,
+            0, 0, ETM11_FULL, ETM11_ACQCMP } },
+        { 0xe6940094, 0xe69400d4, 8, /* IMR5A / IMCR5A */
+          { KEYSC_KEY, DMAC_2_DADERR, DMAC_2_DEI5, DMAC_2_DEI4,
+            SCIFA3, SCIFA2, SCIFA1, SCIFA0 } },
+        { 0xe6940098, 0xe69400d8, 8, /* IMR6A / IMCR6A */
+          { SCIFB, SCIFA5, SCIFA4, MSIOF1,
+            0, 0, MSIOF2, 0 } },
+        { 0xe694009c, 0xe69400dc, 8, /* IMR7A / IMCR7A */
+          { SDHI0_SDHI0I3, SDHI0_SDHI0I2, SDHI0_SDHI0I1, SDHI0_SDHI0I0,
+            FLCTL_FLTREQ1I, FLCTL_FLTREQ0I, FLCTL_FLTENDI, FLCTL_FLSTEI } },
+        { 0xe69400a0, 0xe69400e0, 8, /* IMR8A / IMCR8A */
+          { SDHI1_SDHI1I3, SDHI1_SDHI1I2, SDHI1_SDHI1I1, SDHI1_SDHI1I0,
+            TTI20, USBDMAC_USHDMI, SPU, SIU } },
+        { 0xe69400a4, 0xe69400e4, 8, /* IMR9A / IMCR9A */
+          { CMT1_CMT13, CMT1_CMT12, CMT1_CMT11, CMT1_CMT10,
+            CMT2, USBHS_USHI1, USBHS_USHI0, 0 } },
+        { 0xe69400a8, 0xe69400e8, 8, /* IMR10A / IMCR10A */
+          { 0, DMAC2_2_DADERR, DMAC2_2_DEI5, DMAC2_2_DEI4,
+            0, 0, 0, 0 } },
+        { 0xe69400ac, 0xe69400ec, 8, /* IMR11A / IMCR11A */
+          { IIC1_DTEI1, IIC1_WAITI1, IIC1_TACKI1, IIC1_ALI1,
+            LCRC, MSU_MSU2, IREM, MSU_MSU } },
+        { 0xe69400b0, 0xe69400f0, 8, /* IMR12A / IMCR12A */
+          { 0, 0, TPU0, TPU1,
+            TPU2, TPU3, TPU4, 0 } },
+        { 0xe69400b4, 0xe69400f4, 8, /* IMR13A / IMCR13A */
+          { SDHI2_SDHI2I3, SDHI2_SDHI2I2, SDHI2_SDHI2I1, SDHI2_SDHI2I0,
+            MISTY, CMT3, RWDT1, RWDT0 } },
+};
+
+static struct intc_prio_reg intca_prio_registers[] = {
+        { 0xe6900010, 0, 32, 4, /* INTPRI00A */
+          { IRQ0A, IRQ1A, IRQ2A, IRQ3A, IRQ4A, IRQ5A, IRQ6A, IRQ7A } },
+        { 0xe6900014, 0, 32, 4, /* INTPRI10A */
+          { IRQ8A, IRQ9A, IRQ10A, IRQ11A, IRQ12A, IRQ13A, IRQ14A, IRQ15A } },
+
+        { 0xe6940000, 0, 16, 4, /* IPRAA */ { DMAC3_1, DMAC3_2, CMT2, LCRC } },
+        { 0xe6940004, 0, 16, 4, /* IPRBA */ { IRDA, ETM11, BBIF1, BBIF2 } },
+        { 0xe6940008, 0, 16, 4, /* IPRCA */ { CRYPT1_ERR, CRYPT2_STD,
+                                              CMT1_CMT11, ARM11 } },
+        { 0xe694000c, 0, 16, 4, /* IPRDA */ { PINT1, PINT2,
+                                              CMT1_CMT12, TPU4 } },
+        { 0xe6940010, 0, 16, 4, /* IPREA */ { DMAC_1, MFI_MFIS,
+                                              MFI_MFIM, USBHS } },
+        { 0xe6940014, 0, 16, 4, /* IPRFA */ { KEYSC_KEY, DMAC_2,
+                                              0, CMT1_CMT10 } },
+        { 0xe6940018, 0, 16, 4, /* IPRGA */ { SCIFA0, SCIFA1,
+                                              SCIFA2, SCIFA3 } },
+        { 0xe694001c, 0, 16, 4, /* IPRGH */ { MSIOF2, USBDMAC_USHDMI,
+                                              FLCTL, SDHI0 } },
+        { 0xe6940020, 0, 16, 4, /* IPRIA */ { MSIOF1, SCIFA4, MSU_MSU, IIC1 } },
+        { 0xe6940024, 0, 16, 4, /* IPRJA */ { DMAC2_1, DMAC2_2, SIU, TTI20 } },
+        { 0xe6940028, 0, 16, 4, /* IPRKA */ { 0, CMT1_CMT13, IREM, SDHI1 } },
+        { 0xe694002c, 0, 16, 4, /* IPRLA */ { TPU0, TPU1, TPU2, TPU3 } },
+        { 0xe6940030, 0, 16, 4, /* IPRMA */ { MISTY, CMT3, RWDT1, RWDT0 } },
+        { 0xe6940034, 0, 16, 4, /* IPRNA */ { SCIFB, SCIFA5, SPU, DDM } },
+        { 0xe6940038, 0, 16, 4, /* IPROA */ { 0, 0, DIRC, SDHI2 } },
+};
+
+static struct intc_sense_reg intca_sense_registers[] __initdata = {
+        { 0xe6900000, 16, 2, /* ICR1A */
+          { IRQ0A, IRQ1A, IRQ2A, IRQ3A, IRQ4A, IRQ5A, IRQ6A, IRQ7A } },
+        { 0xe6900004, 16, 2, /* ICR2A */
+          { IRQ8A, IRQ9A, IRQ10A, IRQ11A, IRQ12A, IRQ13A, IRQ14A, IRQ15A } },
+};
+
+static struct intc_mask_reg intca_ack_registers[] __initdata = {
+        { 0xe6900020, 0, 8, /* INTREQ00A */
+          { IRQ0A, IRQ1A, IRQ2A, IRQ3A, IRQ4A, IRQ5A, IRQ6A, IRQ7A } },
+        { 0xe6900024, 0, 8, /* INTREQ10A */
+          { IRQ8A, IRQ9A, IRQ10A, IRQ11A, IRQ12A, IRQ13A, IRQ14A, IRQ15A } },
+};
+
+static DECLARE_INTC_DESC_ACK(intca_desc, "sh7367-intca",
+                             intca_vectors, intca_groups,
+                             intca_mask_registers, intca_prio_registers,
+                             intca_sense_registers, intca_ack_registers);
+
+void __init sh7367_init_irq(void)
+{
+        /* INTCA */
+        register_intc_controller(&intca_desc);
+}
diff --git a/arch/arm/mach-shmobile/intc-sh7372.c b/arch/arm/mach-shmobile/intc-sh7372.c
new file mode 100644
index 000000000000..c57a923f97a6
--- /dev/null
+++ b/arch/arm/mach-shmobile/intc-sh7372.c
@@ -0,0 +1,369 @@
+/*
+ * sh7372 processor support - INTC hardware block
+ *
+ * Copyright (C) 2010  Magnus Damm
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/interrupt.h>
+#include <linux/irq.h>
+#include <linux/io.h>
+#include <linux/sh_intc.h>
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+
+enum {
+        UNUSED_INTCA = 0,
+
+        /* interrupt sources INTCA */
+        IRQ0A, IRQ1A, IRQ2A, IRQ3A, IRQ4A, IRQ5A, IRQ6A, IRQ7A,
+        IRQ8A, IRQ9A, IRQ10A, IRQ11A, IRQ12A, IRQ13A, IRQ14A, IRQ15A,
+        IRQ16A, IRQ17A, IRQ18A, IRQ19A, IRQ20A, IRQ21A, IRQ22A, IRQ23A,
+        IRQ24A, IRQ25A, IRQ26A, IRQ27A, IRQ28A, IRQ29A, IRQ30A, IRQ31A,
+        DIRC,
+        CRYPT_STD,
+        IIC1_ALI1, IIC1_TACKI1, IIC1_WAITI1, IIC1_DTEI1,
+        AP_ARM_IRQPMU, AP_ARM_COMMTX, AP_ARM_COMMRX,
+        MFI_MFIM, MFI_MFIS,
+        BBIF1, BBIF2,
+        USBHSDMAC0_USHDMI,
+        _3DG_SGX540,
+        CMT1_CMT10, CMT1_CMT11, CMT1_CMT12, CMT1_CMT13, CMT2, CMT3,
+        KEYSC_KEY,
+        SCIFA0, SCIFA1, SCIFA2, SCIFA3,
+        MSIOF2, MSIOF1,
+        SCIFA4, SCIFA5, SCIFB,
+        FLCTL_FLSTEI, FLCTL_FLTENDI, FLCTL_FLTREQ0I, FLCTL_FLTREQ1I,
+        SDHI0_SDHI0I0, SDHI0_SDHI0I1, SDHI0_SDHI0I2, SDHI0_SDHI0I3,
+        SDHI1_SDHI1I0, SDHI1_SDHI1I1, SDHI1_SDHI1I2,
+        IRREM,
+        IRDA,
+        TPU0,
+        TTI20,
+        DDM,
+        SDHI2_SDHI2I0, SDHI2_SDHI2I1, SDHI2_SDHI2I2, SDHI2_SDHI2I3,
+        RWDT0,
+        DMAC1_1_DEI0, DMAC1_1_DEI1, DMAC1_1_DEI2, DMAC1_1_DEI3,
+        DMAC1_2_DEI4, DMAC1_2_DEI5, DMAC1_2_DADERR,
+        DMAC2_1_DEI0, DMAC2_1_DEI1, DMAC2_1_DEI2, DMAC2_1_DEI3,
+        DMAC2_2_DEI4, DMAC2_2_DEI5, DMAC2_2_DADERR,
+        DMAC3_1_DEI0, DMAC3_1_DEI1, DMAC3_1_DEI2, DMAC3_1_DEI3,
+        DMAC3_2_DEI4, DMAC3_2_DEI5, DMAC3_2_DADERR,
+        SHWYSTAT_RT, SHWYSTAT_HS, SHWYSTAT_COM,
+        HDMI,
+        SPU2_SPU0, SPU2_SPU1,
+        FSI, FMSI,
+        MIPI_HSI,
+        IPMMU_IPMMUD,
+        CEC_1, CEC_2,
+        AP_ARM_CTIIRQ, AP_ARM_DMAEXTERRIRQ, AP_ARM_DMAIRQ, AP_ARM_DMASIRQ,
+        MFIS2,
+        CPORTR2S,
+        CMT14, CMT15,
+        MMC_MMC_ERR, MMC_MMC_NOR,
+        IIC4_ALI4, IIC4_TACKI4, IIC4_WAITI4, IIC4_DTEI4,
+        IIC3_ALI3, IIC3_TACKI3, IIC3_WAITI3, IIC3_DTEI3,
+        USB0_USB0I1, USB0_USB0I0,
+        USB1_USB1I1, USB1_USB1I0,
+        USBHSDMAC1_USHDMI,
+
+        /* interrupt groups INTCA */
+        DMAC1_1, DMAC1_2, DMAC2_1, DMAC2_2, DMAC3_1, DMAC3_2, SHWYSTAT,
+        AP_ARM1, AP_ARM2, SPU2, FLCTL, IIC1, SDHI0, SDHI1, SDHI2
+};
+
+static struct intc_vect intca_vectors[] __initdata = {
+        INTC_VECT(IRQ0A, 0x0200), INTC_VECT(IRQ1A, 0x0220),
+        INTC_VECT(IRQ2A, 0x0240), INTC_VECT(IRQ3A, 0x0260),
+        INTC_VECT(IRQ4A, 0x0280), INTC_VECT(IRQ5A, 0x02a0),
+        INTC_VECT(IRQ6A, 0x02c0), INTC_VECT(IRQ7A, 0x02e0),
+        INTC_VECT(IRQ8A, 0x0300), INTC_VECT(IRQ9A, 0x0320),
+        INTC_VECT(IRQ10A, 0x0340), INTC_VECT(IRQ11A, 0x0360),
+        INTC_VECT(IRQ12A, 0x0380), INTC_VECT(IRQ13A, 0x03a0),
+        INTC_VECT(IRQ14A, 0x03c0), INTC_VECT(IRQ15A, 0x03e0),
+        INTC_VECT(IRQ16A, 0x3200), INTC_VECT(IRQ17A, 0x3220),
+        INTC_VECT(IRQ18A, 0x3240), INTC_VECT(IRQ19A, 0x3260),
+        INTC_VECT(IRQ20A, 0x3280), INTC_VECT(IRQ31A, 0x32a0),
+        INTC_VECT(IRQ22A, 0x32c0), INTC_VECT(IRQ23A, 0x32e0),
+        INTC_VECT(IRQ24A, 0x3300), INTC_VECT(IRQ25A, 0x3320),
+        INTC_VECT(IRQ26A, 0x3340), INTC_VECT(IRQ27A, 0x3360),
+        INTC_VECT(IRQ28A, 0x3380), INTC_VECT(IRQ29A, 0x33a0),
+        INTC_VECT(IRQ30A, 0x33c0), INTC_VECT(IRQ31A, 0x33e0),
+        INTC_VECT(DIRC, 0x0560),
+        INTC_VECT(CRYPT_STD, 0x0700),
+        INTC_VECT(IIC1_ALI1, 0x0780), INTC_VECT(IIC1_TACKI1, 0x07a0),
+        INTC_VECT(IIC1_WAITI1, 0x07c0), INTC_VECT(IIC1_DTEI1, 0x07e0),
+        INTC_VECT(AP_ARM_IRQPMU, 0x0800), INTC_VECT(AP_ARM_COMMTX, 0x0840),
+        INTC_VECT(AP_ARM_COMMRX, 0x0860),
+        INTC_VECT(MFI_MFIM, 0x0900), INTC_VECT(MFI_MFIS, 0x0920),
+        INTC_VECT(BBIF1, 0x0940), INTC_VECT(BBIF2, 0x0960),
+        INTC_VECT(USBHSDMAC0_USHDMI, 0x0a00),
+        INTC_VECT(_3DG_SGX540, 0x0a60),
+        INTC_VECT(CMT1_CMT10, 0x0b00), INTC_VECT(CMT1_CMT11, 0x0b20),
+        INTC_VECT(CMT1_CMT12, 0x0b40), INTC_VECT(CMT1_CMT13, 0x0b60),
+        INTC_VECT(CMT2, 0x0b80), INTC_VECT(CMT3, 0x0ba0),
+        INTC_VECT(KEYSC_KEY, 0x0be0),
+        INTC_VECT(SCIFA0, 0x0c00), INTC_VECT(SCIFA1, 0x0c20),
+        INTC_VECT(SCIFA2, 0x0c40), INTC_VECT(SCIFA3, 0x0c60),
+        INTC_VECT(MSIOF2, 0x0c80), INTC_VECT(MSIOF1, 0x0d00),
+        INTC_VECT(SCIFA4, 0x0d20), INTC_VECT(SCIFA5, 0x0d40),
+        INTC_VECT(SCIFB, 0x0d60),
+        INTC_VECT(FLCTL_FLSTEI, 0x0d80), INTC_VECT(FLCTL_FLTENDI, 0x0da0),
+        INTC_VECT(FLCTL_FLTREQ0I, 0x0dc0), INTC_VECT(FLCTL_FLTREQ1I, 0x0de0),
+        INTC_VECT(SDHI0_SDHI0I0, 0x0e00), INTC_VECT(SDHI0_SDHI0I1, 0x0e20),
+        INTC_VECT(SDHI0_SDHI0I2, 0x0e40), INTC_VECT(SDHI0_SDHI0I3, 0x0e60),
+        INTC_VECT(SDHI1_SDHI1I0, 0x0e80), INTC_VECT(SDHI1_SDHI1I1, 0x0ea0),
+        INTC_VECT(SDHI1_SDHI1I2, 0x0ec0),
+        INTC_VECT(IRREM, 0x0f60),
+        INTC_VECT(IRDA, 0x0480),
+        INTC_VECT(TPU0, 0x04a0),
+        INTC_VECT(TTI20, 0x1100),
+        INTC_VECT(DDM, 0x1140),
+        INTC_VECT(SDHI2_SDHI2I0, 0x1200), INTC_VECT(SDHI2_SDHI2I1, 0x1220),
+        INTC_VECT(SDHI2_SDHI2I2, 0x1240), INTC_VECT(SDHI2_SDHI2I3, 0x1260),
+        INTC_VECT(RWDT0, 0x1280),
+        INTC_VECT(DMAC1_1_DEI0, 0x2000), INTC_VECT(DMAC1_1_DEI1, 0x2020),
+        INTC_VECT(DMAC1_1_DEI2, 0x2040), INTC_VECT(DMAC1_1_DEI3, 0x2060),
+        INTC_VECT(DMAC1_2_DEI4, 0x2080), INTC_VECT(DMAC1_2_DEI5, 0x20a0),
+        INTC_VECT(DMAC1_2_DADERR, 0x20c0),
+        INTC_VECT(DMAC2_1_DEI0, 0x2100), INTC_VECT(DMAC2_1_DEI1, 0x2120),
+        INTC_VECT(DMAC2_1_DEI2, 0x2140), INTC_VECT(DMAC2_1_DEI3, 0x2160),
+        INTC_VECT(DMAC2_2_DEI4, 0x2180), INTC_VECT(DMAC2_2_DEI5, 0x21a0),
+        INTC_VECT(DMAC2_2_DADERR, 0x21c0),
+        INTC_VECT(DMAC3_1_DEI0, 0x2200), INTC_VECT(DMAC3_1_DEI1, 0x2220),
+        INTC_VECT(DMAC3_1_DEI2, 0x2240), INTC_VECT(DMAC3_1_DEI3, 0x2260),
+        INTC_VECT(DMAC3_2_DEI4, 0x2280), INTC_VECT(DMAC3_2_DEI5, 0x22a0),
+        INTC_VECT(DMAC3_2_DADERR, 0x22c0),
+        INTC_VECT(SHWYSTAT_RT, 0x1300), INTC_VECT(SHWYSTAT_HS, 0x1320),
+        INTC_VECT(SHWYSTAT_COM, 0x1340),
+        INTC_VECT(HDMI, 0x17e0),
+        INTC_VECT(SPU2_SPU0, 0x1800), INTC_VECT(SPU2_SPU1, 0x1820),
+        INTC_VECT(FSI, 0x1840),
+        INTC_VECT(FMSI, 0x1860),
+        INTC_VECT(MIPI_HSI, 0x18e0),
+        INTC_VECT(IPMMU_IPMMUD, 0x1920),
+        INTC_VECT(CEC_1, 0x1940), INTC_VECT(CEC_2, 0x1960),
+        INTC_VECT(AP_ARM_CTIIRQ, 0x1980),
+        INTC_VECT(AP_ARM_DMAEXTERRIRQ, 0x19a0),
+        INTC_VECT(AP_ARM_DMAIRQ, 0x19c0),
+        INTC_VECT(AP_ARM_DMASIRQ, 0x19e0),
+        INTC_VECT(MFIS2, 0x1a00),
+        INTC_VECT(CPORTR2S, 0x1a20),
+        INTC_VECT(CMT14, 0x1a40), INTC_VECT(CMT15, 0x1a60),
+        INTC_VECT(MMC_MMC_ERR, 0x1ac0), INTC_VECT(MMC_MMC_NOR, 0x1ae0),
+        INTC_VECT(IIC4_ALI4, 0x1b00), INTC_VECT(IIC4_TACKI4, 0x1b20),
+        INTC_VECT(IIC4_WAITI4, 0x1b40), INTC_VECT(IIC4_DTEI4, 0x1b60),
+        INTC_VECT(IIC3_ALI3, 0x1b80), INTC_VECT(IIC3_TACKI3, 0x1ba0),
+        INTC_VECT(IIC3_WAITI3, 0x1bc0), INTC_VECT(IIC3_DTEI3, 0x1be0),
+        INTC_VECT(USB0_USB0I1, 0x1c80), INTC_VECT(USB0_USB0I0, 0x1ca0),
+        INTC_VECT(USB1_USB1I1, 0x1cc0), INTC_VECT(USB1_USB1I0, 0x1ce0),
+        INTC_VECT(USBHSDMAC1_USHDMI, 0x1d00),
+};
+
+static struct intc_group intca_groups[] __initdata = {
+        INTC_GROUP(DMAC1_1, DMAC1_1_DEI0,
+                   DMAC1_1_DEI1, DMAC1_1_DEI2, DMAC1_1_DEI3),
+        INTC_GROUP(DMAC1_2, DMAC1_2_DEI4,
+                   DMAC1_2_DEI5, DMAC1_2_DADERR),
+        INTC_GROUP(DMAC2_1, DMAC2_1_DEI0,
+                   DMAC2_1_DEI1, DMAC2_1_DEI2, DMAC2_1_DEI3),
+        INTC_GROUP(DMAC2_2, DMAC2_2_DEI4,
+                   DMAC2_2_DEI5, DMAC2_2_DADERR),
+        INTC_GROUP(DMAC3_1, DMAC3_1_DEI0,
+                   DMAC3_1_DEI1, DMAC3_1_DEI2, DMAC3_1_DEI3),
+        INTC_GROUP(DMAC3_2, DMAC3_2_DEI4,
+                   DMAC3_2_DEI5, DMAC3_2_DADERR),
+        INTC_GROUP(AP_ARM1, AP_ARM_IRQPMU, AP_ARM_COMMTX, AP_ARM_COMMRX),
+        INTC_GROUP(AP_ARM2, AP_ARM_CTIIRQ, AP_ARM_DMAEXTERRIRQ,
+                   AP_ARM_DMAIRQ, AP_ARM_DMASIRQ),
+        INTC_GROUP(SPU2, SPU2_SPU0, SPU2_SPU1),
+        INTC_GROUP(FLCTL, FLCTL_FLSTEI, FLCTL_FLTENDI,
+                   FLCTL_FLTREQ0I, FLCTL_FLTREQ1I),
+        INTC_GROUP(IIC1, IIC1_ALI1, IIC1_TACKI1, IIC1_WAITI1, IIC1_DTEI1),
+        INTC_GROUP(SDHI0, SDHI0_SDHI0I0, SDHI0_SDHI0I1,
+                   SDHI0_SDHI0I2, SDHI0_SDHI0I3),
+        INTC_GROUP(SDHI1, SDHI1_SDHI1I0, SDHI1_SDHI1I1,
+                   SDHI1_SDHI1I2),
+        INTC_GROUP(SDHI2, SDHI2_SDHI2I0, SDHI2_SDHI2I1,
+                   SDHI2_SDHI2I2, SDHI2_SDHI2I3),
+        INTC_GROUP(SHWYSTAT, SHWYSTAT_RT, SHWYSTAT_HS, SHWYSTAT_COM),
+};
+
+static struct intc_mask_reg intca_mask_registers[] __initdata = {
+        { 0xe6900040, 0xe6900060, 8, /* INTMSK00A / INTMSKCLR00A */
+          { IRQ0A, IRQ1A, IRQ2A, IRQ3A, IRQ4A, IRQ5A, IRQ6A, IRQ7A } },
+        { 0xe6900044, 0xe6900064, 8, /* INTMSK10A / INTMSKCLR10A */
+          { IRQ8A, IRQ9A, IRQ10A, IRQ11A, IRQ12A, IRQ13A, IRQ14A, IRQ15A } },
+        { 0xe6900048, 0xe6900068, 8, /* INTMSK20A / INTMSKCLR20A */
+          { IRQ16A, IRQ17A, IRQ18A, IRQ19A, IRQ20A, IRQ21A, IRQ22A, IRQ23A } },
+        { 0xe690004c, 0xe690006c, 8, /* INTMSK30A / INTMSKCLR30A */
+          { IRQ24A, IRQ25A, IRQ26A, IRQ27A, IRQ28A, IRQ29A, IRQ30A, IRQ31A } },
+
+        { 0xe6940080, 0xe69400c0, 8, /* IMR0A / IMCR0A */
+          { DMAC2_1_DEI3, DMAC2_1_DEI2, DMAC2_1_DEI1, DMAC2_1_DEI0,
+            AP_ARM_IRQPMU, 0, AP_ARM_COMMTX, AP_ARM_COMMRX } },
+        { 0xe6940084, 0xe69400c4, 8, /* IMR1A / IMCR1A */
+          { 0, CRYPT_STD, DIRC, 0,
+            DMAC1_1_DEI3, DMAC1_1_DEI2, DMAC1_1_DEI1, DMAC1_1_DEI0 } },
+        { 0xe6940088, 0xe69400c8, 8, /* IMR2A / IMCR2A */
+          { 0, 0, 0, 0,
+            BBIF1, BBIF2, MFI_MFIS, MFI_MFIM } },
+        { 0xe694008c, 0xe69400cc, 8, /* IMR3A / IMCR3A */
+          { DMAC3_1_DEI3, DMAC3_1_DEI2, DMAC3_1_DEI1, DMAC3_1_DEI0,
+            DMAC3_2_DADERR, DMAC3_2_DEI5, DMAC3_2_DEI4, IRDA } },
+        { 0xe6940090, 0xe69400d0, 8, /* IMR4A / IMCR4A */
+          { DDM, 0, 0, 0,
+            0, 0, 0, 0 } },
+        { 0xe6940094, 0xe69400d4, 8, /* IMR5A / IMCR5A */
+          { KEYSC_KEY, DMAC1_2_DADERR, DMAC1_2_DEI5, DMAC1_2_DEI4,
+            SCIFA3, SCIFA2, SCIFA1, SCIFA0 } },
+        { 0xe6940098, 0xe69400d8, 8, /* IMR6A / IMCR6A */
+          { SCIFB, SCIFA5, SCIFA4, MSIOF1,
+            0, 0, MSIOF2, 0 } },
+        { 0xe694009c, 0xe69400dc, 8, /* IMR7A / IMCR7A */
+          { SDHI0_SDHI0I3, SDHI0_SDHI0I2, SDHI0_SDHI0I1, SDHI0_SDHI0I0,
+            FLCTL_FLTREQ1I, FLCTL_FLTREQ0I, FLCTL_FLTENDI, FLCTL_FLSTEI } },
+        { 0xe69400a0, 0xe69400e0, 8, /* IMR8A / IMCR8A */
+          { 0, SDHI1_SDHI1I2, SDHI1_SDHI1I1, SDHI1_SDHI1I0,
+            TTI20, USBHSDMAC0_USHDMI, 0, 0 } },
+        { 0xe69400a4, 0xe69400e4, 8, /* IMR9A / IMCR9A */
+          { CMT1_CMT13, CMT1_CMT12, CMT1_CMT11, CMT1_CMT10,
+            CMT2, 0, 0, _3DG_SGX540 } },
+        { 0xe69400a8, 0xe69400e8, 8, /* IMR10A / IMCR10A */
+          { 0, DMAC2_2_DADERR, DMAC2_2_DEI5, DMAC2_2_DEI4,
+            0, 0, 0, 0 } },
+        { 0xe69400ac, 0xe69400ec, 8, /* IMR11A / IMCR11A */
+          { IIC1_DTEI1, IIC1_WAITI1, IIC1_TACKI1, IIC1_ALI1,
+            0, 0, IRREM, 0 } },
+        { 0xe69400b0, 0xe69400f0, 8, /* IMR12A / IMCR12A */
+          { 0, 0, TPU0, 0,
+            0, 0, 0, 0 } },
+        { 0xe69400b4, 0xe69400f4, 8, /* IMR13A / IMCR13A */
+          { SDHI2_SDHI2I3, SDHI2_SDHI2I2, SDHI2_SDHI2I1, SDHI2_SDHI2I0,
+            0, CMT3, 0, RWDT0 } },
+        { 0xe6950080, 0xe69500c0, 8, /* IMR0A3 / IMCR0A3 */
+          { SHWYSTAT_RT, SHWYSTAT_HS, SHWYSTAT_COM, 0,
+            0, 0, 0, 0 } },
+        { 0xe6950090, 0xe69500d0, 8, /* IMR4A3 / IMCR4A3 */
+          { 0, 0, 0, 0,
+            0, 0, 0, HDMI } },
+        { 0xe6950094, 0xe69500d4, 8, /* IMR5A3 / IMCR5A3 */
+          { SPU2_SPU0, SPU2_SPU1, FSI, FMSI,
+            0, 0, 0, MIPI_HSI } },
+        { 0xe6950098, 0xe69500d8, 8, /* IMR6A3 / IMCR6A3 */
+          { 0, IPMMU_IPMMUD, CEC_1, CEC_2,
+            AP_ARM_CTIIRQ, AP_ARM_DMAEXTERRIRQ,
+            AP_ARM_DMAIRQ, AP_ARM_DMASIRQ } },
+        { 0xe695009c, 0xe69500dc, 8, /* IMR7A3 / IMCR7A3 */
+          { MFIS2, CPORTR2S, CMT14, CMT15,
+            0, 0, MMC_MMC_ERR, MMC_MMC_NOR } },
+        { 0xe69500a0, 0xe69500e0, 8, /* IMR8A3 / IMCR8A3 */
+          { IIC4_ALI4, IIC4_TACKI4, IIC4_WAITI4, IIC4_DTEI4,
+            IIC3_ALI3, IIC3_TACKI3, IIC3_WAITI3, IIC3_DTEI3 } },
+        { 0xe69500a4, 0xe69500e4, 8, /* IMR9A3 / IMCR9A3 */
+          { 0, 0, 0, 0,
+            USB0_USB0I1, USB0_USB0I0, USB1_USB1I1, USB1_USB1I0 } },
+        { 0xe69500a8, 0xe69500e8, 8, /* IMR10A3 / IMCR10A3 */
+          { USBHSDMAC1_USHDMI, 0, 0, 0,
+            0, 0, 0, 0 } },
+};
+
+static struct intc_prio_reg intca_prio_registers[] __initdata = {
+        { 0xe6900010, 0, 32, 4, /* INTPRI00A */
+          { IRQ0A, IRQ1A, IRQ2A, IRQ3A, IRQ4A, IRQ5A, IRQ6A, IRQ7A } },
+        { 0xe6900014, 0, 32, 4, /* INTPRI10A */
+          { IRQ8A, IRQ9A, IRQ10A, IRQ11A, IRQ12A, IRQ13A, IRQ14A, IRQ15A } },
+        { 0xe6900018, 0, 32, 4, /* INTPRI20A */
+          { IRQ16A, IRQ17A, IRQ18A, IRQ19A, IRQ20A, IRQ21A, IRQ22A, IRQ23A } },
+        { 0xe690001c, 0, 32, 4, /* INTPRI30A */
+          { IRQ24A, IRQ25A, IRQ26A, IRQ27A, IRQ28A, IRQ29A, IRQ30A, IRQ31A } },
+
+        { 0xe6940000, 0, 16, 4, /* IPRAA */ { DMAC3_1, DMAC3_2, CMT2, 0 } },
+        { 0xe6940004, 0, 16, 4, /* IPRBA */ { IRDA, 0, BBIF1, BBIF2 } },
+        { 0xe6940008, 0, 16, 4, /* IPRCA */ { 0, CRYPT_STD,
+                                              CMT1_CMT11, AP_ARM1 } },
+        { 0xe694000c, 0, 16, 4, /* IPRDA */ { 0, 0,
+                                              CMT1_CMT12, 0 } },
+        { 0xe6940010, 0, 16, 4, /* IPREA */ { DMAC1_1, MFI_MFIS,
+                                              MFI_MFIM, 0 } },
+        { 0xe6940014, 0, 16, 4, /* IPRFA */ { KEYSC_KEY, DMAC1_2,
+                                              _3DG_SGX540, CMT1_CMT10 } },
+        { 0xe6940018, 0, 16, 4, /* IPRGA */ { SCIFA0, SCIFA1,
+                                              SCIFA2, SCIFA3 } },
+        { 0xe694001c, 0, 16, 4, /* IPRGH */ { MSIOF2, USBHSDMAC0_USHDMI,
+                                              FLCTL, SDHI0 } },
+        { 0xe6940020, 0, 16, 4, /* IPRIA */ { MSIOF1, SCIFA4,
+                                              0/* MSU */, IIC1 } },
+        { 0xe6940024, 0, 16, 4, /* IPRJA */ { DMAC2_1, DMAC2_2,
+                                              0/* MSUG */, TTI20 } },
+        { 0xe6940028, 0, 16, 4, /* IPRKA */ { 0, CMT1_CMT13, IRREM, SDHI1 } },
+        { 0xe694002c, 0, 16, 4, /* IPRLA */ { TPU0, 0, 0, 0 } },
+        { 0xe6940030, 0, 16, 4, /* IPRMA */ { 0, CMT3, 0, RWDT0 } },
+        { 0xe6940034, 0, 16, 4, /* IPRNA */ { SCIFB, SCIFA5, 0, DDM } },
+        { 0xe6940038, 0, 16, 4, /* IPROA */ { 0, 0, DIRC, SDHI2 } },
+        { 0xe6950000, 0, 16, 4, /* IPRAA3 */ { SHWYSTAT, 0, 0, 0 } },
+        { 0xe6950024, 0, 16, 4, /* IPRJA3 */ { 0, 0, 0, HDMI } },
+        { 0xe6950028, 0, 16, 4, /* IPRKA3 */ { SPU2, 0, FSI, FMSI } },
+        { 0xe695002c, 0, 16, 4, /* IPRLA3 */ { 0, 0, 0, MIPI_HSI } },
+        { 0xe6950030, 0, 16, 4, /* IPRMA3 */ { IPMMU_IPMMUD, 0,
+                                               CEC_1, CEC_2 } },
+        { 0xe6950034, 0, 16, 4, /* IPRNA3 */ { AP_ARM2, 0, 0, 0 } },
+        { 0xe6950038, 0, 16, 4, /* IPROA3 */ { MFIS2, CPORTR2S,
+                                               CMT14, CMT15 } },
+        { 0xe694003c, 0, 16, 4, /* IPRPA3 */ { 0, 0,
+                                               MMC_MMC_ERR, MMC_MMC_NOR } },
+        { 0xe6940040, 0, 16, 4, /* IPRQA3 */ { IIC4_ALI4, IIC4_TACKI4,
+                                               IIC4_WAITI4, IIC4_DTEI4 } },
+        { 0xe6940044, 0, 16, 4, /* IPRRA3 */ { IIC3_ALI3, IIC3_TACKI3,
+                                               IIC3_WAITI3, IIC3_DTEI3 } },
+        { 0xe6940048, 0, 16, 4, /* IPRSA3 */ { 0/*ERI*/, 0/*RXI*/,
+                                               0/*TXI*/, 0/*TEI*/} },
+        { 0xe694004c, 0, 16, 4, /* IPRTA3 */ { USB0_USB0I1, USB0_USB0I0,
+                                               USB1_USB1I1, USB1_USB1I0 } },
+        { 0xe6940050, 0, 16, 4, /* IPRUA3 */ { USBHSDMAC1_USHDMI, 0, 0, 0 } },
+};
+
+static struct intc_sense_reg intca_sense_registers[] __initdata = {
+        { 0xe6900000, 32, 4, /* ICR1A */
+          { IRQ0A, IRQ1A, IRQ2A, IRQ3A, IRQ4A, IRQ5A, IRQ6A, IRQ7A } },
+        { 0xe6900004, 32, 4, /* ICR2A */
+          { IRQ8A, IRQ9A, IRQ10A, IRQ11A, IRQ12A, IRQ13A, IRQ14A, IRQ15A } },
+        { 0xe6900008, 32, 4, /* ICR3A */
+          { IRQ16A, IRQ17A, IRQ18A, IRQ19A, IRQ20A, IRQ21A, IRQ22A, IRQ23A } },
+        { 0xe690000c, 32, 4, /* ICR4A */
+          { IRQ24A, IRQ25A, IRQ26A, IRQ27A, IRQ28A, IRQ29A, IRQ30A, IRQ31A } },
+};
+
+static struct intc_mask_reg intca_ack_registers[] __initdata = {
+        { 0xe6900020, 0, 8, /* INTREQ00A */
+          { IRQ0A, IRQ1A, IRQ2A, IRQ3A, IRQ4A, IRQ5A, IRQ6A, IRQ7A } },
+        { 0xe6900024, 0, 8, /* INTREQ10A */
+          { IRQ8A, IRQ9A, IRQ10A, IRQ11A, IRQ12A, IRQ13A, IRQ14A, IRQ15A } },
+        { 0xe6900028, 0, 8, /* INTREQ20A */
+          { IRQ16A, IRQ17A, IRQ18A, IRQ19A, IRQ20A, IRQ21A, IRQ22A, IRQ23A } },
+        { 0xe690002c, 0, 8, /* INTREQ30A */
+          { IRQ24A, IRQ25A, IRQ26A, IRQ27A, IRQ28A, IRQ29A, IRQ30A, IRQ31A } },
+};
+
+static DECLARE_INTC_DESC_ACK(intca_desc, "sh7372-intca",
+                             intca_vectors, intca_groups,
+                             intca_mask_registers, intca_prio_registers,
+                             intca_sense_registers, intca_ack_registers);
+
+void __init sh7372_init_irq(void)
+{
+        register_intc_controller(&intca_desc);
+}
diff --git a/arch/arm/mach-shmobile/intc-sh7377.c b/arch/arm/mach-shmobile/intc-sh7377.c
new file mode 100644
index 000000000000..125021cfba5c
--- /dev/null
+++ b/arch/arm/mach-shmobile/intc-sh7377.c
@@ -0,0 +1,350 @@
+/*
+ * sh7377 processor support - INTC hardware block
+ *
+ * Copyright (C) 2010  Magnus Damm
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/interrupt.h>
+#include <linux/irq.h>
+#include <linux/io.h>
+#include <linux/sh_intc.h>
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+
+enum {
+        UNUSED_INTCA = 0,
+
+        /* interrupt sources INTCA */
+        IRQ0A, IRQ1A, IRQ2A, IRQ3A, IRQ4A, IRQ5A, IRQ6A, IRQ7A,
+        IRQ8A, IRQ9A, IRQ10A, IRQ11A, IRQ12A, IRQ13A, IRQ14A, IRQ15A,
+        IRQ16A, IRQ17A, IRQ18A, IRQ19A, IRQ20A, IRQ21A, IRQ22A, IRQ23A,
+        IRQ24A, IRQ25A, IRQ26A, IRQ27A, IRQ28A, IRQ29A, IRQ30A, IRQ31A,
+        DIRC,
+        _2DG,
+        CRYPT_STD,
+        IIC1_ALI1, IIC1_TACKI1, IIC1_WAITI1, IIC1_DTEI1,
+        AP_ARM_IRQPMU, AP_ARM_COMMTX, AP_ARM_COMMRX,
+        MFI_MFIM, MFI_MFIS,
+        BBIF1, BBIF2,
+        USBDMAC_USHDMI,
+        USBHS_USHI0, USBHS_USHI1,
+        _3DG_SGX540,
+        CMT1_CMT10, CMT1_CMT11, CMT1_CMT12, CMT1_CMT13, CMT2, CMT3,
+        KEYSC_KEY,
+        SCIFA0, SCIFA1, SCIFA2, SCIFA3,
+        MSIOF2, MSIOF1,
+        SCIFA4, SCIFA5, SCIFB,
+        FLCTL_FLSTEI, FLCTL_FLTENDI, FLCTL_FLTREQ0I, FLCTL_FLTREQ1I,
+        SDHI0_SDHI0I0, SDHI0_SDHI0I1, SDHI0_SDHI0I2, SDHI0_SDHI0I3,
+        SDHI1_SDHI1I0, SDHI1_SDHI1I1, SDHI1_SDHI1I2, SDHI1_SDHI1I3,
+        MSU_MSU, MSU_MSU2,
+        IRREM,
+        MSUG,
+        IRDA,
+        TPU0, TPU1, TPU2, TPU3, TPU4,
+        LCRC,
+        PINTCA_PINT1, PINTCA_PINT2,
+        TTI20,
+        MISTY,
+        DDM,
+        RWDT0, RWDT1,
+        DMAC_1_DEI0, DMAC_1_DEI1, DMAC_1_DEI2, DMAC_1_DEI3,
+        DMAC_2_DEI4, DMAC_2_DEI5, DMAC_2_DADERR,
+        DMAC2_1_DEI0, DMAC2_1_DEI1, DMAC2_1_DEI2, DMAC2_1_DEI3,
+        DMAC2_2_DEI4, DMAC2_2_DEI5, DMAC2_2_DADERR,
+        DMAC3_1_DEI0, DMAC3_1_DEI1, DMAC3_1_DEI2, DMAC3_1_DEI3,
+        DMAC3_2_DEI4, DMAC3_2_DEI5, DMAC3_2_DADERR,
+        SHWYSTAT_RT, SHWYSTAT_HS, SHWYSTAT_COM,
+        ICUSB_ICUSB0, ICUSB_ICUSB1,
+        ICUDMC_ICUDMC1, ICUDMC_ICUDMC2,
+        SPU2_SPU0, SPU2_SPU1,
+        FSI,
+        FMSI,
+        SCUV,
+        IPMMU_IPMMUB,
+        AP_ARM_CTIIRQ, AP_ARM_DMAEXTERRIRQ, AP_ARM_DMAIRQ, AP_ARM_DMASIRQ,
+        MFIS2,
+        CPORTR2S,
+        CMT14, CMT15,
+        SCIFA6,
+
+        /* interrupt groups INTCA */
+        DMAC_1, DMAC_2, DMAC2_1, DMAC2_2, DMAC3_1, DMAC3_2, SHWYSTAT,
+        AP_ARM1, AP_ARM2, USBHS, SPU2, FLCTL, IIC1, SDHI0, SDHI1,
+        ICUSB, ICUDMC
+};
+
+static struct intc_vect intca_vectors[] = {
+        INTC_VECT(IRQ0A, 0x0200), INTC_VECT(IRQ1A, 0x0220),
+        INTC_VECT(IRQ2A, 0x0240), INTC_VECT(IRQ3A, 0x0260),
+        INTC_VECT(IRQ4A, 0x0280), INTC_VECT(IRQ5A, 0x02a0),
+        INTC_VECT(IRQ6A, 0x02c0), INTC_VECT(IRQ7A, 0x02e0),
+        INTC_VECT(IRQ8A, 0x0300), INTC_VECT(IRQ9A, 0x0320),
+        INTC_VECT(IRQ10A, 0x0340), INTC_VECT(IRQ11A, 0x0360),
+        INTC_VECT(IRQ12A, 0x0380), INTC_VECT(IRQ13A, 0x03a0),
+        INTC_VECT(IRQ14A, 0x03c0), INTC_VECT(IRQ15A, 0x03e0),
+        INTC_VECT(IRQ16A, 0x3200), INTC_VECT(IRQ17A, 0x3220),
+        INTC_VECT(IRQ18A, 0x3240), INTC_VECT(IRQ19A, 0x3260),
+        INTC_VECT(IRQ20A, 0x3280), INTC_VECT(IRQ31A, 0x32a0),
+        INTC_VECT(IRQ22A, 0x32c0), INTC_VECT(IRQ23A, 0x32e0),
+        INTC_VECT(IRQ24A, 0x3300), INTC_VECT(IRQ25A, 0x3320),
+        INTC_VECT(IRQ26A, 0x3340), INTC_VECT(IRQ27A, 0x3360),
+        INTC_VECT(IRQ28A, 0x3380), INTC_VECT(IRQ29A, 0x33a0),
+        INTC_VECT(IRQ30A, 0x33c0), INTC_VECT(IRQ31A, 0x33e0),
+        INTC_VECT(DIRC, 0x0560),
+        INTC_VECT(_2DG, 0x05e0),
+        INTC_VECT(CRYPT_STD, 0x0700),
+        INTC_VECT(IIC1_ALI1, 0x0780), INTC_VECT(IIC1_TACKI1, 0x07a0),
+        INTC_VECT(IIC1_WAITI1, 0x07c0), INTC_VECT(IIC1_DTEI1, 0x07e0),
+        INTC_VECT(AP_ARM_IRQPMU, 0x0800), INTC_VECT(AP_ARM_COMMTX, 0x0840),
+        INTC_VECT(AP_ARM_COMMRX, 0x0860),
+        INTC_VECT(MFI_MFIM, 0x0900), INTC_VECT(MFI_MFIS, 0x0920),
+        INTC_VECT(BBIF1, 0x0940), INTC_VECT(BBIF2, 0x0960),
+        INTC_VECT(USBDMAC_USHDMI, 0x0a00),
+        INTC_VECT(USBHS_USHI0, 0x0a20), INTC_VECT(USBHS_USHI1, 0x0a40),
+        INTC_VECT(_3DG_SGX540, 0x0a60),
+        INTC_VECT(CMT1_CMT10, 0x0b00), INTC_VECT(CMT1_CMT11, 0x0b20),
+        INTC_VECT(CMT1_CMT12, 0x0b40), INTC_VECT(CMT1_CMT13, 0x0b60),
+        INTC_VECT(CMT2, 0x0b80), INTC_VECT(CMT3, 0x0ba0),
+        INTC_VECT(KEYSC_KEY, 0x0be0),
+        INTC_VECT(SCIFA0, 0x0c00), INTC_VECT(SCIFA1, 0x0c20),
+        INTC_VECT(SCIFA2, 0x0c40), INTC_VECT(SCIFA3, 0x0c60),
+        INTC_VECT(MSIOF2, 0x0c80), INTC_VECT(MSIOF1, 0x0d00),
+        INTC_VECT(SCIFA4, 0x0d20), INTC_VECT(SCIFA5, 0x0d40),
+        INTC_VECT(SCIFB, 0x0d60),
+        INTC_VECT(FLCTL_FLSTEI, 0x0d80), INTC_VECT(FLCTL_FLTENDI, 0x0da0),
+        INTC_VECT(FLCTL_FLTREQ0I, 0x0dc0), INTC_VECT(FLCTL_FLTREQ1I, 0x0de0),
+        INTC_VECT(SDHI0_SDHI0I0, 0x0e00), INTC_VECT(SDHI0_SDHI0I1, 0x0e20),
+        INTC_VECT(SDHI0_SDHI0I2, 0x0e40), INTC_VECT(SDHI0_SDHI0I3, 0x0e60),
+        INTC_VECT(SDHI1_SDHI1I0, 0x0e80), INTC_VECT(SDHI1_SDHI1I1, 0x0ea0),
+        INTC_VECT(SDHI1_SDHI1I2, 0x0ec0), INTC_VECT(SDHI1_SDHI1I3, 0x0ee0),
+        INTC_VECT(MSU_MSU, 0x0f20), INTC_VECT(MSU_MSU2, 0x0f40),
+        INTC_VECT(IRREM, 0x0f60),
+        INTC_VECT(MSUG, 0x0fa0),
+        INTC_VECT(IRDA, 0x0480),
+        INTC_VECT(TPU0, 0x04a0), INTC_VECT(TPU1, 0x04c0),
+        INTC_VECT(TPU2, 0x04e0), INTC_VECT(TPU3, 0x0500),
+        INTC_VECT(TPU4, 0x0520),
+        INTC_VECT(LCRC, 0x0540),
+        INTC_VECT(PINTCA_PINT1, 0x1000), INTC_VECT(PINTCA_PINT2, 0x1020),
+        INTC_VECT(TTI20, 0x1100),
+        INTC_VECT(MISTY, 0x1120),
+        INTC_VECT(DDM, 0x1140),
+        INTC_VECT(RWDT0, 0x1280), INTC_VECT(RWDT1, 0x12a0),
+        INTC_VECT(DMAC_1_DEI0, 0x2000), INTC_VECT(DMAC_1_DEI1, 0x2020),
+        INTC_VECT(DMAC_1_DEI2, 0x2040), INTC_VECT(DMAC_1_DEI3, 0x2060),
+        INTC_VECT(DMAC_2_DEI4, 0x2080), INTC_VECT(DMAC_2_DEI5, 0x20a0),
+        INTC_VECT(DMAC_2_DADERR, 0x20c0),
+        INTC_VECT(DMAC2_1_DEI0, 0x2100), INTC_VECT(DMAC2_1_DEI1, 0x2120),
+        INTC_VECT(DMAC2_1_DEI2, 0x2140), INTC_VECT(DMAC2_1_DEI3, 0x2160),
+        INTC_VECT(DMAC2_2_DEI4, 0x2180), INTC_VECT(DMAC2_2_DEI5, 0x21a0),
+        INTC_VECT(DMAC2_2_DADERR, 0x21c0),
+        INTC_VECT(DMAC3_1_DEI0, 0x2200), INTC_VECT(DMAC3_1_DEI1, 0x2220),
+        INTC_VECT(DMAC3_1_DEI2, 0x2240), INTC_VECT(DMAC3_1_DEI3, 0x2260),
+        INTC_VECT(DMAC3_2_DEI4, 0x2280), INTC_VECT(DMAC3_2_DEI5, 0x22a0),
+        INTC_VECT(DMAC3_2_DADERR, 0x22c0),
+        INTC_VECT(SHWYSTAT_RT, 0x1300), INTC_VECT(SHWYSTAT_HS, 0x1d20),
+        INTC_VECT(SHWYSTAT_COM, 0x1340),
+        INTC_VECT(ICUSB_ICUSB0, 0x1700), INTC_VECT(ICUSB_ICUSB1, 0x1720),
+        INTC_VECT(ICUDMC_ICUDMC1, 0x1780), INTC_VECT(ICUDMC_ICUDMC2, 0x17a0),
+        INTC_VECT(SPU2_SPU0, 0x1800), INTC_VECT(SPU2_SPU1, 0x1820),
+        INTC_VECT(FSI, 0x1840),
+        INTC_VECT(FMSI, 0x1860),
+        INTC_VECT(SCUV, 0x1880),
+        INTC_VECT(IPMMU_IPMMUB, 0x1900),
+        INTC_VECT(AP_ARM_CTIIRQ, 0x1980),
+        INTC_VECT(AP_ARM_DMAEXTERRIRQ, 0x19a0),
+        INTC_VECT(AP_ARM_DMAIRQ, 0x19c0),
+        INTC_VECT(AP_ARM_DMASIRQ, 0x19e0),
+        INTC_VECT(MFIS2, 0x1a00),
+        INTC_VECT(CPORTR2S, 0x1a20),
+        INTC_VECT(CMT14, 0x1a40), INTC_VECT(CMT15, 0x1a60),
+        INTC_VECT(SCIFA6, 0x1a80),
+};
+
+static struct intc_group intca_groups[] __initdata = {
+        INTC_GROUP(DMAC_1, DMAC_1_DEI0,
+                   DMAC_1_DEI1, DMAC_1_DEI2, DMAC_1_DEI3),
+        INTC_GROUP(DMAC_2, DMAC_2_DEI4,
+                   DMAC_2_DEI5, DMAC_2_DADERR),
+        INTC_GROUP(DMAC2_1, DMAC2_1_DEI0,
+                   DMAC2_1_DEI1, DMAC2_1_DEI2, DMAC2_1_DEI3),
+        INTC_GROUP(DMAC2_2, DMAC2_2_DEI4,
+                   DMAC2_2_DEI5, DMAC2_2_DADERR),
+        INTC_GROUP(DMAC3_1, DMAC3_1_DEI0,
+                   DMAC3_1_DEI1, DMAC3_1_DEI2, DMAC3_1_DEI3),
+        INTC_GROUP(DMAC3_2, DMAC3_2_DEI4,
+                   DMAC3_2_DEI5, DMAC3_2_DADERR),
+        INTC_GROUP(AP_ARM1, AP_ARM_IRQPMU, AP_ARM_COMMTX, AP_ARM_COMMTX),
+        INTC_GROUP(USBHS, USBHS_USHI0, USBHS_USHI1),
+        INTC_GROUP(SPU2, SPU2_SPU0, SPU2_SPU1),
+        INTC_GROUP(FLCTL, FLCTL_FLSTEI, FLCTL_FLTENDI,
+                   FLCTL_FLTREQ0I, FLCTL_FLTREQ1I),
+        INTC_GROUP(IIC1, IIC1_ALI1, IIC1_TACKI1, IIC1_WAITI1, IIC1_DTEI1),
+        INTC_GROUP(SDHI0, SDHI0_SDHI0I0, SDHI0_SDHI0I1,
+                   SDHI0_SDHI0I2, SDHI0_SDHI0I3),
+        INTC_GROUP(SDHI1, SDHI1_SDHI1I0, SDHI1_SDHI1I1,
+                   SDHI1_SDHI1I2, SDHI1_SDHI1I3),
+        INTC_GROUP(SHWYSTAT, SHWYSTAT_RT, SHWYSTAT_HS, SHWYSTAT_COM),
+        INTC_GROUP(ICUSB, ICUSB_ICUSB0, ICUSB_ICUSB1),
+        INTC_GROUP(ICUDMC, ICUDMC_ICUDMC1, ICUDMC_ICUDMC2),
+};
+
+static struct intc_mask_reg intca_mask_registers[] = {
+        { 0xe6900040, 0xe6900060, 8, /* INTMSK00A / INTMSKCLR00A */
+          { IRQ0A, IRQ1A, IRQ2A, IRQ3A, IRQ4A, IRQ5A, IRQ6A, IRQ7A } },
+        { 0xe6900044, 0xe6900064, 8, /* INTMSK10A / INTMSKCLR10A */
+          { IRQ8A, IRQ9A, IRQ10A, IRQ11A, IRQ12A, IRQ13A, IRQ14A, IRQ15A } },
+        { 0xe6900048, 0xe6900068, 8, /* INTMSK20A / INTMSKCLR20A */
+          { IRQ16A, IRQ17A, IRQ18A, IRQ19A, IRQ20A, IRQ21A, IRQ22A, IRQ23A } },
+        { 0xe690004c, 0xe690006c, 8, /* INTMSK30A / INTMSKCLR30A */
+          { IRQ24A, IRQ25A, IRQ26A, IRQ27A, IRQ28A, IRQ29A, IRQ30A, IRQ31A } },
+
+        { 0xe6940080, 0xe69400c0, 8, /* IMR0A / IMCR0A */
+          { DMAC2_1_DEI3, DMAC2_1_DEI2, DMAC2_1_DEI1, DMAC2_1_DEI0,
+            AP_ARM_IRQPMU, 0, AP_ARM_COMMTX, AP_ARM_COMMRX } },
+        { 0xe6940084, 0xe69400c4, 8, /* IMR1A / IMCR1A */
+          { _2DG, CRYPT_STD, DIRC, 0,
+            DMAC_1_DEI3, DMAC_1_DEI2, DMAC_1_DEI1, DMAC_1_DEI0 } },
+        { 0xe6940088, 0xe69400c8, 8, /* IMR2A / IMCR2A */
+          { PINTCA_PINT1, PINTCA_PINT2, 0, 0,
+            BBIF1, BBIF2, MFI_MFIS, MFI_MFIM } },
+        { 0xe694008c, 0xe69400cc, 8, /* IMR3A / IMCR3A */
+          { DMAC3_1_DEI3, DMAC3_1_DEI2, DMAC3_1_DEI1, DMAC3_1_DEI0,
+            DMAC3_2_DADERR, DMAC3_2_DEI5, DMAC3_2_DEI4, IRDA } },
+        { 0xe6940090, 0xe69400d0, 8, /* IMR4A / IMCR4A */
+          { DDM, 0, 0, 0,
+            0, 0, 0, 0 } },
+        { 0xe6940094, 0xe69400d4, 8, /* IMR5A / IMCR5A */
+          { KEYSC_KEY, DMAC_2_DADERR, DMAC_2_DEI5, DMAC_2_DEI4,
+            SCIFA3, SCIFA2, SCIFA1, SCIFA0 } },
+        { 0xe6940098, 0xe69400d8, 8, /* IMR6A / IMCR6A */
+          { SCIFB, SCIFA5, SCIFA4, MSIOF1,
+            0, 0, MSIOF2, 0 } },
+        { 0xe694009c, 0xe69400dc, 8, /* IMR7A / IMCR7A */
+          { SDHI0_SDHI0I3, SDHI0_SDHI0I2, SDHI0_SDHI0I1, SDHI0_SDHI0I0,
+            FLCTL_FLTREQ1I, FLCTL_FLTREQ0I, FLCTL_FLTENDI, FLCTL_FLSTEI } },
+        { 0xe69400a0, 0xe69400e0, 8, /* IMR8A / IMCR8A */
+          { SDHI1_SDHI1I3, SDHI1_SDHI1I2, SDHI1_SDHI1I1, SDHI1_SDHI1I0,
+            TTI20, USBDMAC_USHDMI, 0, MSUG } },
+        { 0xe69400a4, 0xe69400e4, 8, /* IMR9A / IMCR9A */
+          { CMT1_CMT13, CMT1_CMT12, CMT1_CMT11, CMT1_CMT10,
+            CMT2, USBHS_USHI1, USBHS_USHI0, _3DG_SGX540 } },
+        { 0xe69400a8, 0xe69400e8, 8, /* IMR10A / IMCR10A */
+          { 0, DMAC2_2_DADERR, DMAC2_2_DEI5, DMAC2_2_DEI4,
+            0, 0, 0, 0 } },
+        { 0xe69400ac, 0xe69400ec, 8, /* IMR11A / IMCR11A */
+          { IIC1_DTEI1, IIC1_WAITI1, IIC1_TACKI1, IIC1_ALI1,
+            LCRC, MSU_MSU2, IRREM, MSU_MSU } },
+        { 0xe69400b0, 0xe69400f0, 8, /* IMR12A / IMCR12A */
+          { 0, 0, TPU0, TPU1,
+            TPU2, TPU3, TPU4, 0 } },
+        { 0xe69400b4, 0xe69400f4, 8, /* IMR13A / IMCR13A */
+          { 0, 0, 0, 0,
+            MISTY, CMT3, RWDT1, RWDT0 } },
+        { 0xe6950080, 0xe69500c0, 8, /* IMR0A3 / IMCR0A3 */
+          { SHWYSTAT_RT, SHWYSTAT_HS, SHWYSTAT_COM, 0,
+            0, 0, 0, 0 } },
+        { 0xe6950090, 0xe69500d0, 8, /* IMR4A3 / IMCR4A3 */
+          { ICUSB_ICUSB0, ICUSB_ICUSB1, 0, 0,
+            ICUDMC_ICUDMC1, ICUDMC_ICUDMC2, 0, 0 } },
+        { 0xe6950094, 0xe69500d4, 8, /* IMR5A3 / IMCR5A3 */
+          { SPU2_SPU0, SPU2_SPU1, FSI, FMSI,
+            SCUV, 0, 0, 0 } },
+        { 0xe6950098, 0xe69500d8, 8, /* IMR6A3 / IMCR6A3 */
+          { IPMMU_IPMMUB, 0, 0, 0,
+            AP_ARM_CTIIRQ, AP_ARM_DMAEXTERRIRQ,
+            AP_ARM_DMAIRQ, AP_ARM_DMASIRQ } },
+        { 0xe695009c, 0xe69500dc, 8, /* IMR7A3 / IMCR7A3 */
+          { MFIS2, CPORTR2S, CMT14, CMT15,
+            SCIFA6, 0, 0, 0 } },
+};
+
+static struct intc_prio_reg intca_prio_registers[] = {
+        { 0xe6900010, 0, 32, 4, /* INTPRI00A */
+          { IRQ0A, IRQ1A, IRQ2A, IRQ3A, IRQ4A, IRQ5A, IRQ6A, IRQ7A } },
+        { 0xe6900014, 0, 32, 4, /* INTPRI10A */
+          { IRQ8A, IRQ9A, IRQ10A, IRQ11A, IRQ12A, IRQ13A, IRQ14A, IRQ15A } },
+        { 0xe6900018, 0, 32, 4, /* INTPRI10A */
+          { IRQ16A, IRQ17A, IRQ18A, IRQ19A, IRQ20A, IRQ21A, IRQ22A, IRQ23A } },
+        { 0xe690001c, 0, 32, 4, /* INTPRI30A */
+          { IRQ24A, IRQ25A, IRQ26A, IRQ27A, IRQ28A, IRQ29A, IRQ30A, IRQ31A } },
+
+        { 0xe6940000, 0, 16, 4, /* IPRAA */ { DMAC3_1, DMAC3_2, CMT2, LCRC } },
+        { 0xe6940004, 0, 16, 4, /* IPRBA */ { IRDA, 0, BBIF1, BBIF2 } },
+        { 0xe6940008, 0, 16, 4, /* IPRCA */ { _2DG, CRYPT_STD,
+                                              CMT1_CMT11, AP_ARM1 } },
+        { 0xe694000c, 0, 16, 4, /* IPRDA */ { PINTCA_PINT1, PINTCA_PINT2,
+                                              CMT1_CMT12, TPU4 } },
+        { 0xe6940010, 0, 16, 4, /* IPREA */ { DMAC_1, MFI_MFIS,
+                                              MFI_MFIM, USBHS } },
+        { 0xe6940014, 0, 16, 4, /* IPRFA */ { KEYSC_KEY, DMAC_2,
+                                              _3DG_SGX540, CMT1_CMT10 } },
+        { 0xe6940018, 0, 16, 4, /* IPRGA */ { SCIFA0, SCIFA1,
+                                              SCIFA2, SCIFA3 } },
+        { 0xe694001c, 0, 16, 4, /* IPRGH */ { MSIOF2, USBDMAC_USHDMI,
+                                              FLCTL, SDHI0 } },
+        { 0xe6940020, 0, 16, 4, /* IPRIA */ { MSIOF1, SCIFA4, MSU_MSU, IIC1 } },
+        { 0xe6940024, 0, 16, 4, /* IPRJA */ { DMAC2_1, DMAC2_2, MSUG, TTI20 } },
+        { 0xe6940028, 0, 16, 4, /* IPRKA */ { 0, CMT1_CMT13, IRREM, SDHI1 } },
+        { 0xe694002c, 0, 16, 4, /* IPRLA */ { TPU0, TPU1, TPU2, TPU3 } },
+        { 0xe6940030, 0, 16, 4, /* IPRMA */ { MISTY, CMT3, RWDT1, RWDT0 } },
+        { 0xe6940034, 0, 16, 4, /* IPRNA */ { SCIFB, SCIFA5, 0, DDM } },
+        { 0xe6940038, 0, 16, 4, /* IPROA */ { 0, 0, DIRC, 0 } },
+        { 0xe6950000, 0, 16, 4, /* IPRAA3 */ { SHWYSTAT, 0, 0, 0 } },
+        { 0xe6950020, 0, 16, 4, /* IPRIA3 */ { ICUSB, 0, 0, 0 } },
+        { 0xe6950024, 0, 16, 4, /* IPRJA3 */ { ICUDMC, 0, 0, 0 } },
+        { 0xe6950028, 0, 16, 4, /* IPRKA3 */ { SPU2, 0, FSI, FMSI } },
+        { 0xe695002c, 0, 16, 4, /* IPRLA3 */ { SCUV, 0, 0, 0 } },
+        { 0xe6950030, 0, 16, 4, /* IPRMA3 */ { IPMMU_IPMMUB, 0, 0, 0 } },
+        { 0xe6950034, 0, 16, 4, /* IPRNA3 */ { AP_ARM2, 0, 0, 0 } },
+        { 0xe6950038, 0, 16, 4, /* IPROA3 */ { MFIS2, CPORTR2S,
+                                               CMT14, CMT15 } },
+        { 0xe694003c, 0, 16, 4, /* IPRPA3 */ { SCIFA6, 0, 0, 0 } },
+};
+
+static struct intc_sense_reg intca_sense_registers[] __initdata = {
+        { 0xe6900000, 16, 2, /* ICR1A */
+          { IRQ0A, IRQ1A, IRQ2A, IRQ3A, IRQ4A, IRQ5A, IRQ6A, IRQ7A } },
+        { 0xe6900004, 16, 2, /* ICR2A */
+          { IRQ8A, IRQ9A, IRQ10A, IRQ11A, IRQ12A, IRQ13A, IRQ14A, IRQ15A } },
+        { 0xe6900008, 16, 2, /* ICR3A */
+          { IRQ16A, IRQ17A, IRQ18A, IRQ19A, IRQ20A, IRQ21A, IRQ22A, IRQ23A } },
+        { 0xe690000c, 16, 2, /* ICR4A */
+          { IRQ24A, IRQ25A, IRQ26A, IRQ27A, IRQ28A, IRQ29A, IRQ30A, IRQ31A } },
+};
+
+static struct intc_mask_reg intca_ack_registers[] __initdata = {
+        { 0xe6900020, 0, 8, /* INTREQ00A */
+          { IRQ0A, IRQ1A, IRQ2A, IRQ3A, IRQ4A, IRQ5A, IRQ6A, IRQ7A } },
+        { 0xe6900024, 0, 8, /* INTREQ10A */
+          { IRQ8A, IRQ9A, IRQ10A, IRQ11A, IRQ12A, IRQ13A, IRQ14A, IRQ15A } },
+        { 0xe6900028, 0, 8, /* INTREQ20A */
+          { IRQ16A, IRQ17A, IRQ18A, IRQ19A, IRQ20A, IRQ21A, IRQ22A, IRQ23A } },
+        { 0xe690002c, 0, 8, /* INTREQ30A */
+          { IRQ24A, IRQ25A, IRQ26A, IRQ27A, IRQ28A, IRQ29A, IRQ30A, IRQ31A } },
+};
+
+static DECLARE_INTC_DESC_ACK(intca_desc, "sh7377-intca",
+                             intca_vectors, intca_groups,
+                             intca_mask_registers, intca_prio_registers,
+                             intca_sense_registers, intca_ack_registers);
+
+void __init sh7377_init_irq(void)
+{
+        register_intc_controller(&intca_desc);
+}
diff --git a/arch/arm/mach-shmobile/pfc-sh7367.c b/arch/arm/mach-shmobile/pfc-sh7367.c
new file mode 100644
index 000000000000..128555e76e43
--- /dev/null
+++ b/arch/arm/mach-shmobile/pfc-sh7367.c
@@ -0,0 +1,1801 @@
+/*
+ * sh7367 processor support - PFC hardware block
+ *
+ * Copyright (C) 2010  Magnus Damm
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/gpio.h>
+#include <mach/sh7367.h>
+
+#define _1(fn, pfx, sfx) fn(pfx, sfx)
+
+#define _10(fn, pfx, sfx)                               \
+        _1(fn, pfx##0, sfx), _1(fn, pfx##1, sfx),       \
+        _1(fn, pfx##2, sfx), _1(fn, pfx##3, sfx),       \
+        _1(fn, pfx##4, sfx), _1(fn, pfx##5, sfx),       \
+        _1(fn, pfx##6, sfx), _1(fn, pfx##7, sfx),       \
+        _1(fn, pfx##8, sfx), _1(fn, pfx##9, sfx)
+
+#define _90(fn, pfx, sfx)                               \
+        _10(fn, pfx##1, sfx), _10(fn, pfx##2, sfx),     \
+        _10(fn, pfx##3, sfx), _10(fn, pfx##4, sfx),     \
+        _10(fn, pfx##5, sfx), _10(fn, pfx##6, sfx),     \
+        _10(fn, pfx##7, sfx), _10(fn, pfx##8, sfx),     \
+        _10(fn, pfx##9, sfx)
+
+#define _273(fn, pfx, sfx)              \
+        _10(fn, pfx, sfx), _90(fn, pfx, sfx),           \
+        _10(fn, pfx##10, sfx), _90(fn, pfx##1, sfx),    \
+        _10(fn, pfx##20, sfx), _10(fn, pfx##21, sfx),   \
+        _10(fn, pfx##22, sfx), _10(fn, pfx##23, sfx),   \
+        _10(fn, pfx##24, sfx), _10(fn, pfx##25, sfx),   \
+        _10(fn, pfx##26, sfx), _1(fn, pfx##270, sfx),   \
+        _1(fn, pfx##271, sfx), _1(fn, pfx##272, sfx)
+
+#define _PORT(pfx, sfx) pfx##_##sfx
+#define PORT_273(str) _273(_PORT, PORT, str)
+
+enum {
+        PINMUX_RESERVED = 0,
+
+        PINMUX_DATA_BEGIN,
+        PORT_273(DATA), /* PORT0_DATA -> PORT272_DATA */
+        PINMUX_DATA_END,
+
+        PINMUX_INPUT_BEGIN,
+        PORT_273(IN), /* PORT0_IN -> PORT272_IN */
+        PINMUX_INPUT_END,
+
+        PINMUX_INPUT_PULLUP_BEGIN,
+        PORT_273(IN_PU), /* PORT0_IN_PU -> PORT272_IN_PU */
+        PINMUX_INPUT_PULLUP_END,
+
+        PINMUX_INPUT_PULLDOWN_BEGIN,
+        PORT_273(IN_PD), /* PORT0_IN_PD -> PORT272_IN_PD */
+        PINMUX_INPUT_PULLDOWN_END,
+
+        PINMUX_OUTPUT_BEGIN,
+        PORT_273(OUT), /* PORT0_OUT -> PORT272_OUT */
+        PINMUX_OUTPUT_END,
+
+        PINMUX_FUNCTION_BEGIN,
+        PORT_273(FN_IN), /* PORT0_FN_IN -> PORT272_FN_IN */
+        PORT_273(FN_OUT), /* PORT0_FN_OUT -> PORT272_FN_OUT */
+        PORT_273(FN0), /* PORT0_FN0 -> PORT272_FN0 */
+        PORT_273(FN1), /* PORT0_FN1 -> PORT272_FN1 */
+        PORT_273(FN2), /* PORT0_FN2 -> PORT272_FN2 */
+        PORT_273(FN3), /* PORT0_FN3 -> PORT272_FN3 */
+        PORT_273(FN4), /* PORT0_FN4 -> PORT272_FN4 */
+        PORT_273(FN5), /* PORT0_FN5 -> PORT272_FN5 */
+        PORT_273(FN6), /* PORT0_FN6 -> PORT272_FN6 */
+        PORT_273(FN7), /* PORT0_FN7 -> PORT272_FN7 */
+
+        MSELBCR_MSEL2_1, MSELBCR_MSEL2_0,
+        PINMUX_FUNCTION_END,
+
+        PINMUX_MARK_BEGIN,
+        /* Special Pull-up / Pull-down Functions */
+        PORT48_KEYIN0_PU_MARK, PORT49_KEYIN1_PU_MARK,
+        PORT50_KEYIN2_PU_MARK, PORT55_KEYIN3_PU_MARK,
+        PORT56_KEYIN4_PU_MARK, PORT57_KEYIN5_PU_MARK,
+        PORT58_KEYIN6_PU_MARK,
+
+        /* 49-1 */
+        VBUS0_MARK, CPORT0_MARK, CPORT1_MARK, CPORT2_MARK,
+        CPORT3_MARK, CPORT4_MARK, CPORT5_MARK, CPORT6_MARK,
+        CPORT7_MARK, CPORT8_MARK, CPORT9_MARK, CPORT10_MARK,
+        CPORT11_MARK, SIN2_MARK, CPORT12_MARK, XCTS2_MARK,
+        CPORT13_MARK, RFSPO4_MARK, CPORT14_MARK, RFSPO5_MARK,
+        CPORT15_MARK, CPORT16_MARK, CPORT17_MARK, SOUT2_MARK,
+        CPORT18_MARK, XRTS2_MARK, CPORT19_MARK, CPORT20_MARK,
+        RFSPO6_MARK, CPORT21_MARK, STATUS0_MARK, CPORT22_MARK,
+        STATUS1_MARK, CPORT23_MARK, STATUS2_MARK, RFSPO7_MARK,
+        MPORT0_MARK, MPORT1_MARK, B_SYNLD1_MARK, B_SYNLD2_MARK,
+        XMAINPS_MARK, XDIVPS_MARK, XIDRST_MARK, IDCLK_MARK,
+        IDIO_MARK, SOUT1_MARK, SCIFA4_TXD_MARK,
+        M02_BERDAT_MARK, SIN1_MARK, SCIFA4_RXD_MARK, XWUP_MARK,
+        XRTS1_MARK, SCIFA4_RTS_MARK, M03_BERCLK_MARK,
+        XCTS1_MARK, SCIFA4_CTS_MARK,
+
+        /* 49-2 */
+        HSU_IQ_AGC6_MARK, MFG2_IN2_MARK, MSIOF2_MCK0_MARK,
+        HSU_IQ_AGC5_MARK, MFG2_IN1_MARK, MSIOF2_MCK1_MARK,
+        HSU_IQ_AGC4_MARK, MSIOF2_RSYNC_MARK,
+        HSU_IQ_AGC3_MARK, MFG2_OUT1_MARK, MSIOF2_RSCK_MARK,
+        HSU_IQ_AGC2_MARK, PORT42_KEYOUT0_MARK,
+        HSU_IQ_AGC1_MARK, PORT43_KEYOUT1_MARK,
+        HSU_IQ_AGC0_MARK, PORT44_KEYOUT2_MARK,
+        HSU_IQ_AGC_ST_MARK, PORT45_KEYOUT3_MARK,
+        HSU_IQ_PDO_MARK, PORT46_KEYOUT4_MARK,
+        HSU_IQ_PYO_MARK, PORT47_KEYOUT5_MARK,
+        HSU_EN_TXMUX_G3MO_MARK, PORT48_KEYIN0_MARK,
+        HSU_I_TXMUX_G3MO_MARK, PORT49_KEYIN1_MARK,
+        HSU_Q_TXMUX_G3MO_MARK, PORT50_KEYIN2_MARK,
+        HSU_SYO_MARK, PORT51_MSIOF2_TSYNC_MARK,
+        HSU_SDO_MARK, PORT52_MSIOF2_TSCK_MARK,
+        HSU_TGTTI_G3MO_MARK, PORT53_MSIOF2_TXD_MARK,
+        B_TIME_STAMP_MARK, PORT54_MSIOF2_RXD_MARK,
+        HSU_SDI_MARK, PORT55_KEYIN3_MARK,
+        HSU_SCO_MARK, PORT56_KEYIN4_MARK,
+        HSU_DREQ_MARK, PORT57_KEYIN5_MARK,
+        HSU_DACK_MARK, PORT58_KEYIN6_MARK,
+        HSU_CLK61M_MARK, PORT59_MSIOF2_SS1_MARK,
+        HSU_XRST_MARK, PORT60_MSIOF2_SS2_MARK,
+        PCMCLKO_MARK, SYNC8KO_MARK, DNPCM_A_MARK, UPPCM_A_MARK,
+        XTALB1L_MARK,
+        GPS_AGC1_MARK, SCIFA0_RTS_MARK,
+        GPS_AGC2_MARK, SCIFA0_SCK_MARK,
+        GPS_AGC3_MARK, SCIFA0_TXD_MARK,
+        GPS_AGC4_MARK, SCIFA0_RXD_MARK,
+        GPS_PWRD_MARK, SCIFA0_CTS_MARK,
+        GPS_IM_MARK, GPS_IS_MARK, GPS_QM_MARK, GPS_QS_MARK,
+        SIUBOMC_MARK, TPU2TO0_MARK,
+        SIUCKB_MARK, TPU2TO1_MARK,
+        SIUBOLR_MARK, BBIF2_TSYNC_MARK, TPU2TO2_MARK,
+        SIUBOBT_MARK, BBIF2_TSCK_MARK, TPU2TO3_MARK,
+        SIUBOSLD_MARK, BBIF2_TXD_MARK, TPU3TO0_MARK,
+        SIUBILR_MARK, TPU3TO1_MARK,
+        SIUBIBT_MARK, TPU3TO2_MARK,
+        SIUBISLD_MARK, TPU3TO3_MARK,
+        NMI_MARK, TPU4TO0_MARK,
+        DNPCM_M_MARK, TPU4TO1_MARK, TPU4TO2_MARK, TPU4TO3_MARK,
+        IRQ_TMPB_MARK,
+        PWEN_MARK, MFG1_OUT1_MARK,
+        OVCN_MARK, MFG1_IN1_MARK,
+        OVCN2_MARK, MFG1_IN2_MARK,
+
+        /* 49-3 */
+        RFSPO1_MARK, RFSPO2_MARK, RFSPO3_MARK, PORT93_VIO_CKO2_MARK,
+        USBTERM_MARK, EXTLP_MARK, IDIN_MARK,
+        SCIFA5_CTS_MARK, MFG0_IN1_MARK,
+        SCIFA5_RTS_MARK, MFG0_IN2_MARK,
+        SCIFA5_RXD_MARK,
+        SCIFA5_TXD_MARK,
+        SCIFA5_SCK_MARK, MFG0_OUT1_MARK,
+        A0_EA0_MARK, BS_MARK,
+        A14_EA14_MARK, PORT102_KEYOUT0_MARK,
+        A15_EA15_MARK, PORT103_KEYOUT1_MARK, DV_CLKOL_MARK,
+        A16_EA16_MARK, PORT104_KEYOUT2_MARK,
+        DV_VSYNCL_MARK, MSIOF0_SS1_MARK,
+        A17_EA17_MARK, PORT105_KEYOUT3_MARK,
+        DV_HSYNCL_MARK, MSIOF0_TSYNC_MARK,
+        A18_EA18_MARK, PORT106_KEYOUT4_MARK,
+        DV_DL0_MARK, MSIOF0_TSCK_MARK,
+        A19_EA19_MARK, PORT107_KEYOUT5_MARK,
+        DV_DL1_MARK, MSIOF0_TXD_MARK,
+        A20_EA20_MARK, PORT108_KEYIN0_MARK,
+        DV_DL2_MARK, MSIOF0_RSCK_MARK,
+        A21_EA21_MARK, PORT109_KEYIN1_MARK,
+        DV_DL3_MARK, MSIOF0_RSYNC_MARK,
+        A22_EA22_MARK, PORT110_KEYIN2_MARK,
+        DV_DL4_MARK, MSIOF0_MCK0_MARK,
+        A23_EA23_MARK, PORT111_KEYIN3_MARK,
+        DV_DL5_MARK, MSIOF0_MCK1_MARK,
+        A24_EA24_MARK, PORT112_KEYIN4_MARK,
+        DV_DL6_MARK, MSIOF0_RXD_MARK,
+        A25_EA25_MARK, PORT113_KEYIN5_MARK,
+        DV_DL7_MARK, MSIOF0_SS2_MARK,
+        A26_MARK, PORT113_KEYIN6_MARK, DV_CLKIL_MARK,
+        D0_ED0_NAF0_MARK, D1_ED1_NAF1_MARK, D2_ED2_NAF2_MARK,
+        D3_ED3_NAF3_MARK, D4_ED4_NAF4_MARK, D5_ED5_NAF5_MARK,
+        D6_ED6_NAF6_MARK, D7_ED7_NAF7_MARK, D8_ED8_NAF8_MARK,
+        D9_ED9_NAF9_MARK, D10_ED10_NAF10_MARK, D11_ED11_NAF11_MARK,
+        D12_ED12_NAF12_MARK, D13_ED13_NAF13_MARK,
+        D14_ED14_NAF14_MARK, D15_ED15_NAF15_MARK,
+        CS4_MARK, CS5A_MARK, CS5B_MARK, FCE1_MARK,
+        CS6B_MARK, XCS2_MARK, FCE0_MARK, CS6A_MARK,
+        DACK0_MARK, WAIT_MARK, DREQ0_MARK, RD_XRD_MARK,
+        A27_MARK, RDWR_XWE_MARK, WE0_XWR0_FWE_MARK,
+        WE1_XWR1_MARK, FRB_MARK, CKO_MARK,
+        NBRSTOUT_MARK, NBRST_MARK,
+
+        /* 49-4 */
+        RFSPO0_MARK, PORT146_VIO_CKO2_MARK, TSTMD_MARK,
+        VIO_VD_MARK, VIO_HD_MARK,
+        VIO_D0_MARK, VIO_D1_MARK, VIO_D2_MARK,
+        VIO_D3_MARK, VIO_D4_MARK, VIO_D5_MARK,
+        VIO_D6_MARK, VIO_D7_MARK, VIO_D8_MARK,
+        VIO_D9_MARK, VIO_D10_MARK, VIO_D11_MARK,
+        VIO_D12_MARK, VIO_D13_MARK, VIO_D14_MARK,
+        VIO_D15_MARK, VIO_CLK_MARK, VIO_FIELD_MARK,
+        VIO_CKO_MARK,
+        MFG3_IN1_MARK, MFG3_IN2_MARK,
+        M9_SLCD_A01_MARK, MFG3_OUT1_MARK, TPU0TO0_MARK,
+        M10_SLCD_CK1_MARK, MFG4_IN1_MARK, TPU0TO1_MARK,
+        M11_SLCD_SO1_MARK, MFG4_IN2_MARK, TPU0TO2_MARK,
+        M12_SLCD_CE1_MARK, MFG4_OUT1_MARK, TPU0TO3_MARK,
+        LCDD0_MARK, PORT175_KEYOUT0_MARK, DV_D0_MARK,
+        SIUCKA_MARK, MFG0_OUT2_MARK,
+        LCDD1_MARK, PORT176_KEYOUT1_MARK, DV_D1_MARK,
+        SIUAOLR_MARK, BBIF2_TSYNC1_MARK,
+        LCDD2_MARK, PORT177_KEYOUT2_MARK, DV_D2_MARK,
+        SIUAOBT_MARK, BBIF2_TSCK1_MARK,
+        LCDD3_MARK, PORT178_KEYOUT3_MARK, DV_D3_MARK,
+        SIUAOSLD_MARK, BBIF2_TXD1_MARK,
+        LCDD4_MARK, PORT179_KEYOUT4_MARK, DV_D4_MARK,
+        SIUAISPD_MARK, MFG1_OUT2_MARK,
+        LCDD5_MARK, PORT180_KEYOUT5_MARK, DV_D5_MARK,
+        SIUAILR_MARK, MFG2_OUT2_MARK,
+        LCDD6_MARK, DV_D6_MARK,
+        SIUAIBT_MARK, MFG3_OUT2_MARK, XWR2_MARK,
+        LCDD7_MARK, DV_D7_MARK,
+        SIUAISLD_MARK, MFG4_OUT2_MARK, XWR3_MARK,
+        LCDD8_MARK, DV_D8_MARK, D16_MARK, ED16_MARK,
+        LCDD9_MARK, DV_D9_MARK, D17_MARK, ED17_MARK,
+        LCDD10_MARK, DV_D10_MARK, D18_MARK, ED18_MARK,
+        LCDD11_MARK, DV_D11_MARK, D19_MARK, ED19_MARK,
+        LCDD12_MARK, DV_D12_MARK, D20_MARK, ED20_MARK,
+        LCDD13_MARK, DV_D13_MARK, D21_MARK, ED21_MARK,
+        LCDD14_MARK, DV_D14_MARK, D22_MARK, ED22_MARK,
+        LCDD15_MARK, DV_D15_MARK, D23_MARK, ED23_MARK,
+        LCDD16_MARK, DV_HSYNC_MARK, D24_MARK, ED24_MARK,
+        LCDD17_MARK, DV_VSYNC_MARK, D25_MARK, ED25_MARK,
+        LCDD18_MARK, DREQ2_MARK, MSIOF0L_TSCK_MARK,
+        D26_MARK, ED26_MARK,
+        LCDD19_MARK, MSIOF0L_TSYNC_MARK,
+        D27_MARK, ED27_MARK,
+        LCDD20_MARK, TS_SPSYNC1_MARK, MSIOF0L_MCK0_MARK,
+        D28_MARK, ED28_MARK,
+        LCDD21_MARK, TS_SDAT1_MARK, MSIOF0L_MCK1_MARK,
+        D29_MARK, ED29_MARK,
+        LCDD22_MARK, TS_SDEN1_MARK, MSIOF0L_SS1_MARK,
+        D30_MARK, ED30_MARK,
+        LCDD23_MARK, TS_SCK1_MARK, MSIOF0L_SS2_MARK,
+        D31_MARK, ED31_MARK,
+        LCDDCK_MARK, LCDWR_MARK, DV_CKO_MARK, SIUAOSPD_MARK,
+        LCDRD_MARK, DACK2_MARK, MSIOF0L_RSYNC_MARK,
+
+        /* 49-5 */
+        LCDHSYN_MARK, LCDCS_MARK, LCDCS2_MARK, DACK3_MARK,
+        LCDDISP_MARK, LCDRS_MARK, DREQ3_MARK, MSIOF0L_RSCK_MARK,
+        LCDCSYN_MARK, LCDCSYN2_MARK, DV_CKI_MARK,
+        LCDLCLK_MARK, DREQ1_MARK, MSIOF0L_RXD_MARK,
+        LCDDON_MARK, LCDDON2_MARK, DACK1_MARK, MSIOF0L_TXD_MARK,
+        VIO_DR0_MARK, VIO_DR1_MARK, VIO_DR2_MARK, VIO_DR3_MARK,
+        VIO_DR4_MARK, VIO_DR5_MARK, VIO_DR6_MARK, VIO_DR7_MARK,
+        VIO_VDR_MARK, VIO_HDR_MARK,
+        VIO_CLKR_MARK, VIO_CKOR_MARK,
+        SCIFA1_TXD_MARK, GPS_PGFA0_MARK,
+        SCIFA1_SCK_MARK, GPS_PGFA1_MARK,
+        SCIFA1_RTS_MARK, GPS_EPPSINMON_MARK,
+        SCIFA1_RXD_MARK, SCIFA1_CTS_MARK,
+        MSIOF1_TXD_MARK, SCIFA1_TXD2_MARK, GPS_TXD_MARK,
+        MSIOF1_TSYNC_MARK, SCIFA1_CTS2_MARK, I2C_SDA2_MARK,
+        MSIOF1_TSCK_MARK, SCIFA1_SCK2_MARK,
+        MSIOF1_RXD_MARK, SCIFA1_RXD2_MARK, GPS_RXD_MARK,
+        MSIOF1_RSCK_MARK, SCIFA1_RTS2_MARK,
+        MSIOF1_RSYNC_MARK, I2C_SCL2_MARK,
+        MSIOF1_MCK0_MARK, MSIOF1_MCK1_MARK,
+        MSIOF1_SS1_MARK, EDBGREQ3_MARK,
+        MSIOF1_SS2_MARK,
+        PORT236_IROUT_MARK, IRDA_OUT_MARK,
+        IRDA_IN_MARK, IRDA_FIRSEL_MARK,
+        TPU1TO0_MARK, TS_SPSYNC3_MARK,
+        TPU1TO1_MARK, TS_SDAT3_MARK,
+        TPU1TO2_MARK, TS_SDEN3_MARK, PORT241_MSIOF2_SS1_MARK,
+        TPU1TO3_MARK, PORT242_MSIOF2_TSCK_MARK,
+        M13_BSW_MARK, PORT243_MSIOF2_TSYNC_MARK,
+        M14_GSW_MARK, PORT244_MSIOF2_TXD_MARK,
+        PORT245_IROUT_MARK, M15_RSW_MARK,
+        SOUT3_MARK, SCIFA2_TXD1_MARK,
+        SIN3_MARK, SCIFA2_RXD1_MARK,
+        XRTS3_MARK, SCIFA2_RTS1_MARK, PORT248_MSIOF2_SS2_MARK,
+        XCTS3_MARK, SCIFA2_CTS1_MARK, PORT249_MSIOF2_RXD_MARK,
+        DINT_MARK, SCIFA2_SCK1_MARK, TS_SCK3_MARK,
+        SDHICLK0_MARK, TCK2_MARK,
+        SDHICD0_MARK,
+        SDHID0_0_MARK, TMS2_MARK,
+        SDHID0_1_MARK, TDO2_MARK,
+        SDHID0_2_MARK, TDI2_MARK,
+        SDHID0_3_MARK, RTCK2_MARK,
+
+        /* 49-6 */
+        SDHICMD0_MARK, TRST2_MARK,
+        SDHIWP0_MARK, EDBGREQ2_MARK,
+        SDHICLK1_MARK, TCK3_MARK,
+        SDHID1_0_MARK, M11_SLCD_SO2_MARK,
+        TS_SPSYNC2_MARK, TMS3_MARK,
+        SDHID1_1_MARK, M9_SLCD_AO2_MARK,
+        TS_SDAT2_MARK, TDO3_MARK,
+        SDHID1_2_MARK, M10_SLCD_CK2_MARK,
+        TS_SDEN2_MARK, TDI3_MARK,
+        SDHID1_3_MARK, M12_SLCD_CE2_MARK,
+        TS_SCK2_MARK, RTCK3_MARK,
+        SDHICMD1_MARK, TRST3_MARK,
+        SDHICLK2_MARK, SCIFB_SCK_MARK,
+        SDHID2_0_MARK, SCIFB_TXD_MARK,
+        SDHID2_1_MARK, SCIFB_CTS_MARK,
+        SDHID2_2_MARK, SCIFB_RXD_MARK,
+        SDHID2_3_MARK, SCIFB_RTS_MARK,
+        SDHICMD2_MARK,
+        RESETOUTS_MARK,
+        DIVLOCK_MARK,
+        PINMUX_MARK_END,
+};
+
+#define PORT_DATA_I(nr) \
+        PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_IN)
+
+#define PORT_DATA_I_PD(nr) \
+        PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
+                    PORT##nr##_IN, PORT##nr##_IN_PD)
+
+#define PORT_DATA_I_PU(nr) \
+        PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
+                    PORT##nr##_IN, PORT##nr##_IN_PU)
+
+#define PORT_DATA_I_PU_PD(nr) \
+        PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
+                    PORT##nr##_IN, PORT##nr##_IN_PD, PORT##nr##_IN_PU)
+
+#define PORT_DATA_O(nr) \
+        PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT)
+
+#define PORT_DATA_IO(nr) \
+        PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT, \
+                    PORT##nr##_IN)
+
+#define PORT_DATA_IO_PD(nr) \
+        PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT, \
+                    PORT##nr##_IN, PORT##nr##_IN_PD)
+
+#define PORT_DATA_IO_PU(nr) \
+        PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT, \
+                    PORT##nr##_IN, PORT##nr##_IN_PU)
+
+#define PORT_DATA_IO_PU_PD(nr) \
+        PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT, \
+                    PORT##nr##_IN, PORT##nr##_IN_PD, PORT##nr##_IN_PU)
+
+
+static pinmux_enum_t pinmux_data[] = {
+
+        /* specify valid pin states for each pin in GPIO mode */
+
+        /* 49-1 (GPIO) */
+        PORT_DATA_I_PD(0),
+        PORT_DATA_I_PU(1), PORT_DATA_I_PU(2), PORT_DATA_I_PU(3),
+        PORT_DATA_I_PU(4), PORT_DATA_I_PU(5), PORT_DATA_I_PU(6),
+        PORT_DATA_I_PU(7), PORT_DATA_I_PU(8), PORT_DATA_I_PU(9),
+        PORT_DATA_I_PU(10), PORT_DATA_I_PU(11), PORT_DATA_I_PU(12),
+        PORT_DATA_I_PU(13),
+        PORT_DATA_IO_PU_PD(14), PORT_DATA_IO_PU_PD(15),
+        PORT_DATA_O(16), PORT_DATA_O(17), PORT_DATA_O(18), PORT_DATA_O(19),
+        PORT_DATA_O(20), PORT_DATA_O(21), PORT_DATA_O(22), PORT_DATA_O(23),
+        PORT_DATA_O(24), PORT_DATA_O(25), PORT_DATA_O(26),
+        PORT_DATA_I_PD(27), PORT_DATA_I_PD(28),
+        PORT_DATA_O(29), PORT_DATA_O(30), PORT_DATA_O(31), PORT_DATA_O(32),
+        PORT_DATA_IO_PU(33),
+        PORT_DATA_O(34),
+        PORT_DATA_I_PU(35),
+        PORT_DATA_O(36),
+        PORT_DATA_I_PU_PD(37),
+
+        /* 49-2 (GPIO) */
+        PORT_DATA_IO_PU_PD(38),
+        PORT_DATA_IO_PD(39), PORT_DATA_IO_PD(40), PORT_DATA_IO_PD(41),
+        PORT_DATA_O(42), PORT_DATA_O(43), PORT_DATA_O(44), PORT_DATA_O(45),
+        PORT_DATA_O(46), PORT_DATA_O(47),
+        PORT_DATA_I_PU_PD(48), PORT_DATA_I_PU_PD(49), PORT_DATA_I_PU_PD(50),
+        PORT_DATA_IO_PD(51), PORT_DATA_IO_PD(52),
+        PORT_DATA_O(53),
+        PORT_DATA_IO_PD(54),
+        PORT_DATA_I_PU_PD(55),
+        PORT_DATA_IO_PU_PD(56),
+        PORT_DATA_I_PU_PD(57),
+        PORT_DATA_IO_PU_PD(58),
+        PORT_DATA_O(59), PORT_DATA_O(60), PORT_DATA_O(61), PORT_DATA_O(62),
+        PORT_DATA_O(63),
+        PORT_DATA_I_PU(64),
+        PORT_DATA_O(65), PORT_DATA_O(66), PORT_DATA_O(67), PORT_DATA_O(68),
+        PORT_DATA_IO_PD(69), PORT_DATA_IO_PD(70),
+        PORT_DATA_I_PD(71), PORT_DATA_I_PD(72), PORT_DATA_I_PD(73),
+        PORT_DATA_I_PD(74),
+        PORT_DATA_IO_PU_PD(75), PORT_DATA_IO_PU_PD(76),
+        PORT_DATA_IO_PD(77), PORT_DATA_IO_PD(78),
+        PORT_DATA_O(79),
+        PORT_DATA_IO_PD(80), PORT_DATA_IO_PD(81), PORT_DATA_IO_PD(82),
+        PORT_DATA_IO_PU_PD(83), PORT_DATA_IO_PU_PD(84),
+        PORT_DATA_IO_PU_PD(85), PORT_DATA_IO_PU_PD(86),
+        PORT_DATA_I_PD(87),
+        PORT_DATA_IO_PU_PD(88),
+        PORT_DATA_I_PU_PD(89), PORT_DATA_I_PU_PD(90),
+
+        /* 49-3 (GPIO) */
+        PORT_DATA_O(91), PORT_DATA_O(92), PORT_DATA_O(93), PORT_DATA_O(94),
+        PORT_DATA_I_PU_PD(95),
+        PORT_DATA_IO_PU_PD(96), PORT_DATA_IO_PU_PD(97), PORT_DATA_IO_PU_PD(98),
+        PORT_DATA_IO_PU_PD(99), PORT_DATA_IO_PU_PD(100),
+        PORT_DATA_IO(101), PORT_DATA_IO(102), PORT_DATA_IO(103),
+        PORT_DATA_IO_PD(104), PORT_DATA_IO_PD(105), PORT_DATA_IO_PD(106),
+        PORT_DATA_IO_PD(107),
+        PORT_DATA_IO_PU_PD(108), PORT_DATA_IO_PU_PD(109),
+        PORT_DATA_IO_PU_PD(110), PORT_DATA_IO_PU_PD(111),
+        PORT_DATA_IO_PU_PD(112), PORT_DATA_IO_PU_PD(113),
+        PORT_DATA_IO_PU_PD(114),
+        PORT_DATA_IO_PU(115), PORT_DATA_IO_PU(116), PORT_DATA_IO_PU(117),
+        PORT_DATA_IO_PU(118), PORT_DATA_IO_PU(119), PORT_DATA_IO_PU(120),
+        PORT_DATA_IO_PU(121), PORT_DATA_IO_PU(122), PORT_DATA_IO_PU(123),
+        PORT_DATA_IO_PU(124), PORT_DATA_IO_PU(125), PORT_DATA_IO_PU(126),
+        PORT_DATA_IO_PU(127), PORT_DATA_IO_PU(128), PORT_DATA_IO_PU(129),
+        PORT_DATA_IO_PU(130),
+        PORT_DATA_O(131), PORT_DATA_O(132), PORT_DATA_O(133),
+        PORT_DATA_IO_PU(134),
+        PORT_DATA_O(135), PORT_DATA_O(136),
+        PORT_DATA_I_PU_PD(137),
+        PORT_DATA_IO(138),
+        PORT_DATA_IO_PU_PD(139),
+        PORT_DATA_IO(140), PORT_DATA_IO(141),
+        PORT_DATA_I_PU(142),
+        PORT_DATA_O(143), PORT_DATA_O(144),
+        PORT_DATA_I_PU(145),
+
+        /* 49-4 (GPIO) */
+        PORT_DATA_O(146),
+        PORT_DATA_I_PU_PD(147),
+        PORT_DATA_I_PD(148), PORT_DATA_I_PD(149),
+        PORT_DATA_IO_PD(150), PORT_DATA_IO_PD(151), PORT_DATA_IO_PD(152),
+        PORT_DATA_IO_PD(153), PORT_DATA_IO_PD(154), PORT_DATA_IO_PD(155),
+        PORT_DATA_IO_PD(156), PORT_DATA_IO_PD(157), PORT_DATA_IO_PD(158),
+        PORT_DATA_IO_PD(159), PORT_DATA_IO_PD(160), PORT_DATA_IO_PD(161),
+        PORT_DATA_IO_PD(162), PORT_DATA_IO_PD(163), PORT_DATA_IO_PD(164),
+        PORT_DATA_IO_PD(165), PORT_DATA_IO_PD(166),
+        PORT_DATA_IO_PU_PD(167),
+        PORT_DATA_O(168),
+        PORT_DATA_I_PD(169), PORT_DATA_I_PD(170),
+        PORT_DATA_O(171),
+        PORT_DATA_IO_PD(172), PORT_DATA_IO_PD(173),
+        PORT_DATA_O(174),
+        PORT_DATA_IO_PD(175), PORT_DATA_IO_PD(176), PORT_DATA_IO_PD(177),
+        PORT_DATA_IO_PD(178), PORT_DATA_IO_PD(179), PORT_DATA_IO_PD(180),
+        PORT_DATA_IO_PD(181), PORT_DATA_IO_PD(182), PORT_DATA_IO_PD(183),
+        PORT_DATA_IO_PD(184), PORT_DATA_IO_PD(185), PORT_DATA_IO_PD(186),
+        PORT_DATA_IO_PD(187), PORT_DATA_IO_PD(188), PORT_DATA_IO_PD(189),
+        PORT_DATA_IO_PD(190), PORT_DATA_IO_PD(191), PORT_DATA_IO_PD(192),
+        PORT_DATA_IO_PD(193), PORT_DATA_IO_PD(194), PORT_DATA_IO_PD(195),
+        PORT_DATA_IO_PD(196), PORT_DATA_IO_PD(197), PORT_DATA_IO_PD(198),
+        PORT_DATA_O(199),
+        PORT_DATA_IO_PD(200),
+
+        /* 49-5 (GPIO) */
+        PORT_DATA_O(201),
+        PORT_DATA_IO_PD(202), PORT_DATA_IO_PD(203),
+        PORT_DATA_I(204),
+        PORT_DATA_O(205),
+        PORT_DATA_IO_PD(206), PORT_DATA_IO_PD(207), PORT_DATA_IO_PD(208),
+        PORT_DATA_IO_PD(209), PORT_DATA_IO_PD(210), PORT_DATA_IO_PD(211),
+        PORT_DATA_IO_PD(212), PORT_DATA_IO_PD(213), PORT_DATA_IO_PD(214),
+        PORT_DATA_IO_PD(215), PORT_DATA_IO_PD(216),
+        PORT_DATA_O(217),
+        PORT_DATA_I_PU_PD(218), PORT_DATA_I_PU_PD(219),
+        PORT_DATA_O(220), PORT_DATA_O(221), PORT_DATA_O(222),
+        PORT_DATA_I_PD(223),
+        PORT_DATA_I_PU_PD(224),
+        PORT_DATA_O(225),
+        PORT_DATA_IO_PD(226),
+        PORT_DATA_IO_PU_PD(227),
+        PORT_DATA_I_PD(228),
+        PORT_DATA_IO_PD(229), PORT_DATA_IO_PD(230),
+        PORT_DATA_I_PU_PD(231), PORT_DATA_I_PU_PD(232),
+        PORT_DATA_IO_PU_PD(233), PORT_DATA_IO_PU_PD(234),
+        PORT_DATA_I_PU_PD(235),
+        PORT_DATA_O(236),
+        PORT_DATA_I_PD(237),
+        PORT_DATA_IO_PU_PD(238), PORT_DATA_IO_PU_PD(239),
+        PORT_DATA_IO_PD(240), PORT_DATA_IO_PD(241),
+        PORT_DATA_IO_PD(242), PORT_DATA_IO_PD(243),
+        PORT_DATA_O(244),
+        PORT_DATA_IO_PU_PD(245),
+        PORT_DATA_O(246),
+        PORT_DATA_I_PD(247),
+        PORT_DATA_IO_PU_PD(248),
+        PORT_DATA_I_PU_PD(249),
+        PORT_DATA_IO_PD(250), PORT_DATA_IO_PD(251),
+        PORT_DATA_IO_PU_PD(252), PORT_DATA_IO_PU_PD(253),
+        PORT_DATA_IO_PU_PD(254), PORT_DATA_IO_PU_PD(255),
+        PORT_DATA_IO_PU_PD(256),
+
+        /* 49-6 (GPIO) */
+        PORT_DATA_IO_PU_PD(257), PORT_DATA_IO_PU_PD(258),
+        PORT_DATA_IO_PD(259),
+        PORT_DATA_IO_PU(260), PORT_DATA_IO_PU(261), PORT_DATA_IO_PU(262),
+        PORT_DATA_IO_PU(263), PORT_DATA_IO_PU(264),
+        PORT_DATA_O(265),
+        PORT_DATA_IO_PU(266), PORT_DATA_IO_PU(267), PORT_DATA_IO_PU(268),
+        PORT_DATA_IO_PU(269), PORT_DATA_IO_PU(270),
+        PORT_DATA_O(271),
+        PORT_DATA_I_PD(272),
+
+        /* Special Pull-up / Pull-down Functions */
+        PINMUX_DATA(PORT48_KEYIN0_PU_MARK, MSELBCR_MSEL2_1,
+                    PORT48_FN2, PORT48_IN_PU),
+        PINMUX_DATA(PORT49_KEYIN1_PU_MARK, MSELBCR_MSEL2_1,
+                    PORT49_FN2, PORT49_IN_PU),
+        PINMUX_DATA(PORT50_KEYIN2_PU_MARK, MSELBCR_MSEL2_1,
+                    PORT50_FN2, PORT50_IN_PU),
+        PINMUX_DATA(PORT55_KEYIN3_PU_MARK, MSELBCR_MSEL2_1,
+                    PORT55_FN2, PORT55_IN_PU),
+        PINMUX_DATA(PORT56_KEYIN4_PU_MARK, MSELBCR_MSEL2_1,
+                    PORT56_FN2, PORT56_IN_PU),
+        PINMUX_DATA(PORT57_KEYIN5_PU_MARK, MSELBCR_MSEL2_1,
+                    PORT57_FN2, PORT57_IN_PU),
+        PINMUX_DATA(PORT58_KEYIN6_PU_MARK, MSELBCR_MSEL2_1,
+                    PORT58_FN2, PORT58_IN_PU),
+
+        /* 49-1 (FN) */
+        PINMUX_DATA(VBUS0_MARK, PORT0_FN1),
+        PINMUX_DATA(CPORT0_MARK, PORT1_FN1),
+        PINMUX_DATA(CPORT1_MARK, PORT2_FN1),
+        PINMUX_DATA(CPORT2_MARK, PORT3_FN1),
+        PINMUX_DATA(CPORT3_MARK, PORT4_FN1),
+        PINMUX_DATA(CPORT4_MARK, PORT5_FN1),
+        PINMUX_DATA(CPORT5_MARK, PORT6_FN1),
+        PINMUX_DATA(CPORT6_MARK, PORT7_FN1),
+        PINMUX_DATA(CPORT7_MARK, PORT8_FN1),
+        PINMUX_DATA(CPORT8_MARK, PORT9_FN1),
+        PINMUX_DATA(CPORT9_MARK, PORT10_FN1),
+        PINMUX_DATA(CPORT10_MARK, PORT11_FN1),
+        PINMUX_DATA(CPORT11_MARK, PORT12_FN1),
+        PINMUX_DATA(SIN2_MARK, PORT12_FN2),
+        PINMUX_DATA(CPORT12_MARK, PORT13_FN1),
+        PINMUX_DATA(XCTS2_MARK, PORT13_FN2),
+        PINMUX_DATA(CPORT13_MARK, PORT14_FN1),
+        PINMUX_DATA(RFSPO4_MARK, PORT14_FN2),
+        PINMUX_DATA(CPORT14_MARK, PORT15_FN1),
+        PINMUX_DATA(RFSPO5_MARK, PORT15_FN2),
+        PINMUX_DATA(CPORT15_MARK, PORT16_FN1),
+        PINMUX_DATA(CPORT16_MARK, PORT17_FN1),
+        PINMUX_DATA(CPORT17_MARK, PORT18_FN1),
+        PINMUX_DATA(SOUT2_MARK, PORT18_FN2),
+        PINMUX_DATA(CPORT18_MARK, PORT19_FN1),
+        PINMUX_DATA(XRTS2_MARK, PORT19_FN1),
+        PINMUX_DATA(CPORT19_MARK, PORT20_FN1),
+        PINMUX_DATA(CPORT20_MARK, PORT21_FN1),
+        PINMUX_DATA(RFSPO6_MARK, PORT21_FN2),
+        PINMUX_DATA(CPORT21_MARK, PORT22_FN1),
+        PINMUX_DATA(STATUS0_MARK, PORT22_FN2),
+        PINMUX_DATA(CPORT22_MARK, PORT23_FN1),
+        PINMUX_DATA(STATUS1_MARK, PORT23_FN2),
+        PINMUX_DATA(CPORT23_MARK, PORT24_FN1),
+        PINMUX_DATA(STATUS2_MARK, PORT24_FN2),
+        PINMUX_DATA(RFSPO7_MARK, PORT24_FN3),
+        PINMUX_DATA(MPORT0_MARK, PORT25_FN1),
+        PINMUX_DATA(MPORT1_MARK, PORT26_FN1),
+        PINMUX_DATA(B_SYNLD1_MARK, PORT27_FN1),
+        PINMUX_DATA(B_SYNLD2_MARK, PORT28_FN1),
+        PINMUX_DATA(XMAINPS_MARK, PORT29_FN1),
+        PINMUX_DATA(XDIVPS_MARK, PORT30_FN1),
+        PINMUX_DATA(XIDRST_MARK, PORT31_FN1),
+        PINMUX_DATA(IDCLK_MARK, PORT32_FN1),
+        PINMUX_DATA(IDIO_MARK, PORT33_FN1),
+        PINMUX_DATA(SOUT1_MARK, PORT34_FN1),
+        PINMUX_DATA(SCIFA4_TXD_MARK, PORT34_FN2),
+        PINMUX_DATA(M02_BERDAT_MARK, PORT34_FN3),
+        PINMUX_DATA(SIN1_MARK, PORT35_FN1),
+        PINMUX_DATA(SCIFA4_RXD_MARK, PORT35_FN2),
+        PINMUX_DATA(XWUP_MARK, PORT35_FN3),
+        PINMUX_DATA(XRTS1_MARK, PORT36_FN1),
+        PINMUX_DATA(SCIFA4_RTS_MARK, PORT36_FN2),
+        PINMUX_DATA(M03_BERCLK_MARK, PORT36_FN3),
+        PINMUX_DATA(XCTS1_MARK, PORT37_FN1),
+        PINMUX_DATA(SCIFA4_CTS_MARK, PORT37_FN2),
+
+        /* 49-2 (FN) */
+        PINMUX_DATA(HSU_IQ_AGC6_MARK, PORT38_FN1),
+        PINMUX_DATA(MFG2_IN2_MARK, PORT38_FN2),
+        PINMUX_DATA(MSIOF2_MCK0_MARK, PORT38_FN3),
+        PINMUX_DATA(HSU_IQ_AGC5_MARK, PORT39_FN1),
+        PINMUX_DATA(MFG2_IN1_MARK, PORT39_FN2),
+        PINMUX_DATA(MSIOF2_MCK1_MARK, PORT39_FN3),
+        PINMUX_DATA(HSU_IQ_AGC4_MARK, PORT40_FN1),
+        PINMUX_DATA(MSIOF2_RSYNC_MARK, PORT40_FN3),
+        PINMUX_DATA(HSU_IQ_AGC3_MARK, PORT41_FN1),
+        PINMUX_DATA(MFG2_OUT1_MARK, PORT41_FN2),
+        PINMUX_DATA(MSIOF2_RSCK_MARK, PORT41_FN3),
+        PINMUX_DATA(HSU_IQ_AGC2_MARK, PORT42_FN1),
+        PINMUX_DATA(PORT42_KEYOUT0_MARK, MSELBCR_MSEL2_1, PORT42_FN2),
+        PINMUX_DATA(HSU_IQ_AGC1_MARK, PORT43_FN1),
+        PINMUX_DATA(PORT43_KEYOUT1_MARK, MSELBCR_MSEL2_1, PORT43_FN2),
+        PINMUX_DATA(HSU_IQ_AGC0_MARK, PORT44_FN1),
+        PINMUX_DATA(PORT44_KEYOUT2_MARK, MSELBCR_MSEL2_1, PORT44_FN2),
+        PINMUX_DATA(HSU_IQ_AGC_ST_MARK, PORT45_FN1),
+        PINMUX_DATA(PORT45_KEYOUT3_MARK, MSELBCR_MSEL2_1, PORT45_FN2),
+        PINMUX_DATA(HSU_IQ_PDO_MARK, PORT46_FN1),
+        PINMUX_DATA(PORT46_KEYOUT4_MARK, MSELBCR_MSEL2_1, PORT46_FN2),
+        PINMUX_DATA(HSU_IQ_PYO_MARK, PORT47_FN1),
+        PINMUX_DATA(PORT47_KEYOUT5_MARK, MSELBCR_MSEL2_1, PORT47_FN2),
+        PINMUX_DATA(HSU_EN_TXMUX_G3MO_MARK, PORT48_FN1),
+        PINMUX_DATA(PORT48_KEYIN0_MARK, MSELBCR_MSEL2_1, PORT48_FN2),
+        PINMUX_DATA(HSU_I_TXMUX_G3MO_MARK, PORT49_FN1),
+        PINMUX_DATA(PORT49_KEYIN1_MARK, MSELBCR_MSEL2_1, PORT49_FN2),
+        PINMUX_DATA(HSU_Q_TXMUX_G3MO_MARK, PORT50_FN1),
+        PINMUX_DATA(PORT50_KEYIN2_MARK, MSELBCR_MSEL2_1, PORT50_FN2),
+        PINMUX_DATA(HSU_SYO_MARK, PORT51_FN1),
+        PINMUX_DATA(PORT51_MSIOF2_TSYNC_MARK, PORT51_FN2),
+        PINMUX_DATA(HSU_SDO_MARK, PORT52_FN1),
+        PINMUX_DATA(PORT52_MSIOF2_TSCK_MARK, PORT52_FN2),
+        PINMUX_DATA(HSU_TGTTI_G3MO_MARK, PORT53_FN1),
+        PINMUX_DATA(PORT53_MSIOF2_TXD_MARK, PORT53_FN2),
+        PINMUX_DATA(B_TIME_STAMP_MARK, PORT54_FN1),
+        PINMUX_DATA(PORT54_MSIOF2_RXD_MARK, PORT54_FN2),
+        PINMUX_DATA(HSU_SDI_MARK, PORT55_FN1),
+        PINMUX_DATA(PORT55_KEYIN3_MARK, MSELBCR_MSEL2_1, PORT55_FN2),
+        PINMUX_DATA(HSU_SCO_MARK, PORT56_FN1),
+        PINMUX_DATA(PORT56_KEYIN4_MARK, MSELBCR_MSEL2_1, PORT56_FN2),
+        PINMUX_DATA(HSU_DREQ_MARK, PORT57_FN1),
+        PINMUX_DATA(PORT57_KEYIN5_MARK, MSELBCR_MSEL2_1, PORT57_FN2),
+        PINMUX_DATA(HSU_DACK_MARK, PORT58_FN1),
+        PINMUX_DATA(PORT58_KEYIN6_MARK, MSELBCR_MSEL2_1, PORT58_FN2),
+        PINMUX_DATA(HSU_CLK61M_MARK, PORT59_FN1),
+        PINMUX_DATA(PORT59_MSIOF2_SS1_MARK, PORT59_FN2),
+        PINMUX_DATA(HSU_XRST_MARK, PORT60_FN1),
+        PINMUX_DATA(PORT60_MSIOF2_SS2_MARK, PORT60_FN2),
+        PINMUX_DATA(PCMCLKO_MARK, PORT61_FN1),
+        PINMUX_DATA(SYNC8KO_MARK, PORT62_FN1),
+        PINMUX_DATA(DNPCM_A_MARK, PORT63_FN1),
+        PINMUX_DATA(UPPCM_A_MARK, PORT64_FN1),
+        PINMUX_DATA(XTALB1L_MARK, PORT65_FN1),
+        PINMUX_DATA(GPS_AGC1_MARK, PORT66_FN1),
+        PINMUX_DATA(SCIFA0_RTS_MARK, PORT66_FN2),
+        PINMUX_DATA(GPS_AGC2_MARK, PORT67_FN1),
+        PINMUX_DATA(SCIFA0_SCK_MARK, PORT67_FN2),
+        PINMUX_DATA(GPS_AGC3_MARK, PORT68_FN1),
+        PINMUX_DATA(SCIFA0_TXD_MARK, PORT68_FN2),
+        PINMUX_DATA(GPS_AGC4_MARK, PORT69_FN1),
+        PINMUX_DATA(SCIFA0_RXD_MARK, PORT69_FN2),
+        PINMUX_DATA(GPS_PWRD_MARK, PORT70_FN1),
+        PINMUX_DATA(SCIFA0_CTS_MARK, PORT70_FN2),
+        PINMUX_DATA(GPS_IM_MARK, PORT71_FN1),
+        PINMUX_DATA(GPS_IS_MARK, PORT72_FN1),
+        PINMUX_DATA(GPS_QM_MARK, PORT73_FN1),
+        PINMUX_DATA(GPS_QS_MARK, PORT74_FN1),
+        PINMUX_DATA(SIUBOMC_MARK, PORT75_FN1),
+        PINMUX_DATA(TPU2TO0_MARK, PORT75_FN3),
+        PINMUX_DATA(SIUCKB_MARK, PORT76_FN1),
+        PINMUX_DATA(TPU2TO1_MARK, PORT76_FN3),
+        PINMUX_DATA(SIUBOLR_MARK, PORT77_FN1),
+        PINMUX_DATA(BBIF2_TSYNC_MARK, PORT77_FN2),
+        PINMUX_DATA(TPU2TO2_MARK, PORT77_FN3),
+        PINMUX_DATA(SIUBOBT_MARK, PORT78_FN1),
+        PINMUX_DATA(BBIF2_TSCK_MARK, PORT78_FN2),
+        PINMUX_DATA(TPU2TO3_MARK, PORT78_FN3),
+        PINMUX_DATA(SIUBOSLD_MARK, PORT79_FN1),
+        PINMUX_DATA(BBIF2_TXD_MARK, PORT79_FN2),
+        PINMUX_DATA(TPU3TO0_MARK, PORT79_FN3),
+        PINMUX_DATA(SIUBILR_MARK, PORT80_FN1),
+        PINMUX_DATA(TPU3TO1_MARK, PORT80_FN3),
+        PINMUX_DATA(SIUBIBT_MARK, PORT81_FN1),
+        PINMUX_DATA(TPU3TO2_MARK, PORT81_FN3),
+        PINMUX_DATA(SIUBISLD_MARK, PORT82_FN1),
+        PINMUX_DATA(TPU3TO3_MARK, PORT82_FN3),
+        PINMUX_DATA(NMI_MARK, PORT83_FN1),
+        PINMUX_DATA(TPU4TO0_MARK, PORT83_FN3),
+        PINMUX_DATA(DNPCM_M_MARK, PORT84_FN1),
+        PINMUX_DATA(TPU4TO1_MARK, PORT84_FN3),
+        PINMUX_DATA(TPU4TO2_MARK, PORT85_FN3),
+        PINMUX_DATA(TPU4TO3_MARK, PORT86_FN3),
+        PINMUX_DATA(IRQ_TMPB_MARK, PORT87_FN1),
+        PINMUX_DATA(PWEN_MARK, PORT88_FN1),
+        PINMUX_DATA(MFG1_OUT1_MARK, PORT88_FN2),
+        PINMUX_DATA(OVCN_MARK, PORT89_FN1),
+        PINMUX_DATA(MFG1_IN1_MARK, PORT89_FN2),
+        PINMUX_DATA(OVCN2_MARK, PORT90_FN1),
+        PINMUX_DATA(MFG1_IN2_MARK, PORT90_FN2),
+
+        /* 49-3 (FN) */
+        PINMUX_DATA(RFSPO1_MARK, PORT91_FN1),
+        PINMUX_DATA(RFSPO2_MARK, PORT92_FN1),
+        PINMUX_DATA(RFSPO3_MARK, PORT93_FN1),
+        PINMUX_DATA(PORT93_VIO_CKO2_MARK, PORT93_FN2),
+        PINMUX_DATA(USBTERM_MARK, PORT94_FN1),
+        PINMUX_DATA(EXTLP_MARK, PORT94_FN2),
+        PINMUX_DATA(IDIN_MARK, PORT95_FN1),
+        PINMUX_DATA(SCIFA5_CTS_MARK, PORT96_FN1),
+        PINMUX_DATA(MFG0_IN1_MARK, PORT96_FN2),
+        PINMUX_DATA(SCIFA5_RTS_MARK, PORT97_FN1),
+        PINMUX_DATA(MFG0_IN2_MARK, PORT97_FN2),
+        PINMUX_DATA(SCIFA5_RXD_MARK, PORT98_FN1),
+        PINMUX_DATA(SCIFA5_TXD_MARK, PORT99_FN1),
+        PINMUX_DATA(SCIFA5_SCK_MARK, PORT100_FN1),
+        PINMUX_DATA(MFG0_OUT1_MARK, PORT100_FN2),
+        PINMUX_DATA(A0_EA0_MARK, PORT101_FN1),
+        PINMUX_DATA(BS_MARK, PORT101_FN2),
+        PINMUX_DATA(A14_EA14_MARK, PORT102_FN1),
+        PINMUX_DATA(PORT102_KEYOUT0_MARK, MSELBCR_MSEL2_0, PORT102_FN2),
+        PINMUX_DATA(A15_EA15_MARK, PORT103_FN1),
+        PINMUX_DATA(PORT103_KEYOUT1_MARK, MSELBCR_MSEL2_0, PORT103_FN2),
+        PINMUX_DATA(DV_CLKOL_MARK, PORT103_FN3),
+        PINMUX_DATA(A16_EA16_MARK, PORT104_FN1),
+        PINMUX_DATA(PORT104_KEYOUT2_MARK, MSELBCR_MSEL2_0, PORT104_FN2),
+        PINMUX_DATA(DV_VSYNCL_MARK, PORT104_FN3),
+        PINMUX_DATA(MSIOF0_SS1_MARK, PORT104_FN4),
+        PINMUX_DATA(A17_EA17_MARK, PORT105_FN1),
+        PINMUX_DATA(PORT105_KEYOUT3_MARK, MSELBCR_MSEL2_0, PORT105_FN2),
+        PINMUX_DATA(DV_HSYNCL_MARK, PORT105_FN3),
+        PINMUX_DATA(MSIOF0_TSYNC_MARK, PORT105_FN4),
+        PINMUX_DATA(A18_EA18_MARK, PORT106_FN1),
+        PINMUX_DATA(PORT106_KEYOUT4_MARK, MSELBCR_MSEL2_0, PORT106_FN2),
+        PINMUX_DATA(DV_DL0_MARK, PORT106_FN3),
+        PINMUX_DATA(MSIOF0_TSCK_MARK, PORT106_FN4),
+        PINMUX_DATA(A19_EA19_MARK, PORT107_FN1),
+        PINMUX_DATA(PORT107_KEYOUT5_MARK, MSELBCR_MSEL2_0, PORT107_FN2),
+        PINMUX_DATA(DV_DL1_MARK, PORT107_FN3),
+        PINMUX_DATA(MSIOF0_TXD_MARK, PORT107_FN4),
+        PINMUX_DATA(A20_EA20_MARK, PORT108_FN1),
+        PINMUX_DATA(PORT108_KEYIN0_MARK, MSELBCR_MSEL2_0, PORT108_FN2),
+        PINMUX_DATA(DV_DL2_MARK, PORT108_FN3),
+        PINMUX_DATA(MSIOF0_RSCK_MARK, PORT108_FN4),
+        PINMUX_DATA(A21_EA21_MARK, PORT109_FN1),
+        PINMUX_DATA(PORT109_KEYIN1_MARK, MSELBCR_MSEL2_0, PORT109_FN2),
+        PINMUX_DATA(DV_DL3_MARK, PORT109_FN3),
+        PINMUX_DATA(MSIOF0_RSYNC_MARK, PORT109_FN4),
+        PINMUX_DATA(A22_EA22_MARK, PORT110_FN1),
+        PINMUX_DATA(PORT110_KEYIN2_MARK, MSELBCR_MSEL2_0, PORT110_FN2),
+        PINMUX_DATA(DV_DL4_MARK, PORT110_FN3),
+        PINMUX_DATA(MSIOF0_MCK0_MARK, PORT110_FN4),
+        PINMUX_DATA(A23_EA23_MARK, PORT111_FN1),
+        PINMUX_DATA(PORT111_KEYIN3_MARK, MSELBCR_MSEL2_0, PORT111_FN2),
+        PINMUX_DATA(DV_DL5_MARK, PORT111_FN3),
+        PINMUX_DATA(MSIOF0_MCK1_MARK, PORT111_FN4),
+        PINMUX_DATA(A24_EA24_MARK, PORT112_FN1),
+        PINMUX_DATA(PORT112_KEYIN4_MARK, MSELBCR_MSEL2_0, PORT112_FN2),
+        PINMUX_DATA(DV_DL6_MARK, PORT112_FN3),
+        PINMUX_DATA(MSIOF0_RXD_MARK, PORT112_FN4),
+        PINMUX_DATA(A25_EA25_MARK, PORT113_FN1),
+        PINMUX_DATA(PORT113_KEYIN5_MARK, MSELBCR_MSEL2_0, PORT113_FN2),
+        PINMUX_DATA(DV_DL7_MARK, PORT113_FN3),
+        PINMUX_DATA(MSIOF0_SS2_MARK, PORT113_FN4),
+        PINMUX_DATA(A26_MARK, PORT114_FN1),
+        PINMUX_DATA(PORT113_KEYIN6_MARK, MSELBCR_MSEL2_0, PORT114_FN2),
+        PINMUX_DATA(DV_CLKIL_MARK, PORT114_FN3),
+        PINMUX_DATA(D0_ED0_NAF0_MARK, PORT115_FN1),
+        PINMUX_DATA(D1_ED1_NAF1_MARK, PORT116_FN1),
+        PINMUX_DATA(D2_ED2_NAF2_MARK, PORT117_FN1),
+        PINMUX_DATA(D3_ED3_NAF3_MARK, PORT118_FN1),
+        PINMUX_DATA(D4_ED4_NAF4_MARK, PORT119_FN1),
+        PINMUX_DATA(D5_ED5_NAF5_MARK, PORT120_FN1),
+        PINMUX_DATA(D6_ED6_NAF6_MARK, PORT121_FN1),
+        PINMUX_DATA(D7_ED7_NAF7_MARK, PORT122_FN1),
+        PINMUX_DATA(D8_ED8_NAF8_MARK, PORT123_FN1),
+        PINMUX_DATA(D9_ED9_NAF9_MARK, PORT124_FN1),
+        PINMUX_DATA(D10_ED10_NAF10_MARK, PORT125_FN1),
+        PINMUX_DATA(D11_ED11_NAF11_MARK, PORT126_FN1),
+        PINMUX_DATA(D12_ED12_NAF12_MARK, PORT127_FN1),
+        PINMUX_DATA(D13_ED13_NAF13_MARK, PORT128_FN1),
+        PINMUX_DATA(D14_ED14_NAF14_MARK, PORT129_FN1),
+        PINMUX_DATA(D15_ED15_NAF15_MARK, PORT130_FN1),
+        PINMUX_DATA(CS4_MARK, PORT131_FN1),
+        PINMUX_DATA(CS5A_MARK, PORT132_FN1),
+        PINMUX_DATA(CS5B_MARK, PORT133_FN1),
+        PINMUX_DATA(FCE1_MARK, PORT133_FN2),
+        PINMUX_DATA(CS6B_MARK, PORT134_FN1),
+        PINMUX_DATA(XCS2_MARK, PORT134_FN2),
+        PINMUX_DATA(FCE0_MARK, PORT135_FN1),
+        PINMUX_DATA(CS6A_MARK, PORT136_FN1),
+        PINMUX_DATA(DACK0_MARK, PORT136_FN2),
+        PINMUX_DATA(WAIT_MARK, PORT137_FN1),
+        PINMUX_DATA(DREQ0_MARK, PORT137_FN2),
+        PINMUX_DATA(RD_XRD_MARK, PORT138_FN1),
+        PINMUX_DATA(A27_MARK, PORT139_FN1),
+        PINMUX_DATA(RDWR_XWE_MARK, PORT139_FN2),
+        PINMUX_DATA(WE0_XWR0_FWE_MARK, PORT140_FN1),
+        PINMUX_DATA(WE1_XWR1_MARK, PORT141_FN1),
+        PINMUX_DATA(FRB_MARK, PORT142_FN1),
+        PINMUX_DATA(CKO_MARK, PORT143_FN1),
+        PINMUX_DATA(NBRSTOUT_MARK, PORT144_FN1),
+        PINMUX_DATA(NBRST_MARK, PORT145_FN1),
+
+        /* 49-4 (FN) */
+        PINMUX_DATA(RFSPO0_MARK, PORT146_FN1),
+        PINMUX_DATA(PORT146_VIO_CKO2_MARK, PORT146_FN2),
+        PINMUX_DATA(TSTMD_MARK, PORT147_FN1),
+        PINMUX_DATA(VIO_VD_MARK, PORT148_FN1),
+        PINMUX_DATA(VIO_HD_MARK, PORT149_FN1),
+        PINMUX_DATA(VIO_D0_MARK, PORT150_FN1),
+        PINMUX_DATA(VIO_D1_MARK, PORT151_FN1),
+        PINMUX_DATA(VIO_D2_MARK, PORT152_FN1),
+        PINMUX_DATA(VIO_D3_MARK, PORT153_FN1),
+        PINMUX_DATA(VIO_D4_MARK, PORT154_FN1),
+        PINMUX_DATA(VIO_D5_MARK, PORT155_FN1),
+        PINMUX_DATA(VIO_D6_MARK, PORT156_FN1),
+        PINMUX_DATA(VIO_D7_MARK, PORT157_FN1),
+        PINMUX_DATA(VIO_D8_MARK, PORT158_FN1),
+        PINMUX_DATA(VIO_D9_MARK, PORT159_FN1),
+        PINMUX_DATA(VIO_D10_MARK, PORT160_FN1),
+        PINMUX_DATA(VIO_D11_MARK, PORT161_FN1),
+        PINMUX_DATA(VIO_D12_MARK, PORT162_FN1),
+        PINMUX_DATA(VIO_D13_MARK, PORT163_FN1),
+        PINMUX_DATA(VIO_D14_MARK, PORT164_FN1),
+        PINMUX_DATA(VIO_D15_MARK, PORT165_FN1),
+        PINMUX_DATA(VIO_CLK_MARK, PORT166_FN1),
+        PINMUX_DATA(VIO_FIELD_MARK, PORT167_FN1),
+        PINMUX_DATA(VIO_CKO_MARK, PORT168_FN1),
+        PINMUX_DATA(MFG3_IN1_MARK, PORT169_FN2),
+        PINMUX_DATA(MFG3_IN2_MARK, PORT170_FN2),
+        PINMUX_DATA(M9_SLCD_A01_MARK, PORT171_FN1),
+        PINMUX_DATA(MFG3_OUT1_MARK, PORT171_FN2),
+        PINMUX_DATA(TPU0TO0_MARK, PORT171_FN3),
+        PINMUX_DATA(M10_SLCD_CK1_MARK, PORT172_FN1),
+        PINMUX_DATA(MFG4_IN1_MARK, PORT172_FN2),
+        PINMUX_DATA(TPU0TO1_MARK, PORT172_FN3),
+        PINMUX_DATA(M11_SLCD_SO1_MARK, PORT173_FN1),
+        PINMUX_DATA(MFG4_IN2_MARK, PORT173_FN2),
+        PINMUX_DATA(TPU0TO2_MARK, PORT173_FN3),
+        PINMUX_DATA(M12_SLCD_CE1_MARK, PORT174_FN1),
+        PINMUX_DATA(MFG4_OUT1_MARK, PORT174_FN2),
+        PINMUX_DATA(TPU0TO3_MARK, PORT174_FN3),
+        PINMUX_DATA(LCDD0_MARK, PORT175_FN1),
+        PINMUX_DATA(PORT175_KEYOUT0_MARK, PORT175_FN2),
+        PINMUX_DATA(DV_D0_MARK, PORT175_FN3),
+        PINMUX_DATA(SIUCKA_MARK, PORT175_FN4),
+        PINMUX_DATA(MFG0_OUT2_MARK, PORT175_FN5),
+        PINMUX_DATA(LCDD1_MARK, PORT176_FN1),
+        PINMUX_DATA(PORT176_KEYOUT1_MARK, PORT176_FN2),
+        PINMUX_DATA(DV_D1_MARK, PORT176_FN3),
+        PINMUX_DATA(SIUAOLR_MARK, PORT176_FN4),
+        PINMUX_DATA(BBIF2_TSYNC1_MARK, PORT176_FN5),
+        PINMUX_DATA(LCDD2_MARK, PORT177_FN1),
+        PINMUX_DATA(PORT177_KEYOUT2_MARK, PORT177_FN2),
+        PINMUX_DATA(DV_D2_MARK, PORT177_FN3),
+        PINMUX_DATA(SIUAOBT_MARK, PORT177_FN4),
+        PINMUX_DATA(BBIF2_TSCK1_MARK, PORT177_FN5),
+        PINMUX_DATA(LCDD3_MARK, PORT178_FN1),
+        PINMUX_DATA(PORT178_KEYOUT3_MARK, PORT178_FN2),
+        PINMUX_DATA(DV_D3_MARK, PORT178_FN3),
+        PINMUX_DATA(SIUAOSLD_MARK, PORT178_FN4),
+        PINMUX_DATA(BBIF2_TXD1_MARK, PORT178_FN5),
+        PINMUX_DATA(LCDD4_MARK, PORT179_FN1),
+        PINMUX_DATA(PORT179_KEYOUT4_MARK, PORT179_FN2),
+        PINMUX_DATA(DV_D4_MARK, PORT179_FN3),
+        PINMUX_DATA(SIUAISPD_MARK, PORT179_FN4),
+        PINMUX_DATA(MFG1_OUT2_MARK, PORT179_FN5),
+        PINMUX_DATA(LCDD5_MARK, PORT180_FN1),
+        PINMUX_DATA(PORT180_KEYOUT5_MARK, PORT180_FN2),
+        PINMUX_DATA(DV_D5_MARK, PORT180_FN3),
+        PINMUX_DATA(SIUAILR_MARK, PORT180_FN4),
+        PINMUX_DATA(MFG2_OUT2_MARK, PORT180_FN5),
+        PINMUX_DATA(LCDD6_MARK, PORT181_FN1),
+        PINMUX_DATA(DV_D6_MARK, PORT181_FN3),
+        PINMUX_DATA(SIUAIBT_MARK, PORT181_FN4),
+        PINMUX_DATA(MFG3_OUT2_MARK, PORT181_FN5),
+        PINMUX_DATA(XWR2_MARK, PORT181_FN7),
+        PINMUX_DATA(LCDD7_MARK, PORT182_FN1),
+        PINMUX_DATA(DV_D7_MARK, PORT182_FN3),
+        PINMUX_DATA(SIUAISLD_MARK, PORT182_FN4),
+        PINMUX_DATA(MFG4_OUT2_MARK, PORT182_FN5),
+        PINMUX_DATA(XWR3_MARK, PORT182_FN7),
+        PINMUX_DATA(LCDD8_MARK, PORT183_FN1),
+        PINMUX_DATA(DV_D8_MARK, PORT183_FN3),
+        PINMUX_DATA(D16_MARK, PORT183_FN6),
+        PINMUX_DATA(ED16_MARK, PORT183_FN7),
+        PINMUX_DATA(LCDD9_MARK, PORT184_FN1),
+        PINMUX_DATA(DV_D9_MARK, PORT184_FN3),
+        PINMUX_DATA(D17_MARK, PORT184_FN6),
+        PINMUX_DATA(ED17_MARK, PORT184_FN7),
+        PINMUX_DATA(LCDD10_MARK, PORT185_FN1),
+        PINMUX_DATA(DV_D10_MARK, PORT185_FN3),
+        PINMUX_DATA(D18_MARK, PORT185_FN6),
+        PINMUX_DATA(ED18_MARK, PORT185_FN7),
+        PINMUX_DATA(LCDD11_MARK, PORT186_FN1),
+        PINMUX_DATA(DV_D11_MARK, PORT186_FN3),
+        PINMUX_DATA(D19_MARK, PORT186_FN6),
+        PINMUX_DATA(ED19_MARK, PORT186_FN7),
+        PINMUX_DATA(LCDD12_MARK, PORT187_FN1),
+        PINMUX_DATA(DV_D12_MARK, PORT187_FN3),
+        PINMUX_DATA(D20_MARK, PORT187_FN6),
+        PINMUX_DATA(ED20_MARK, PORT187_FN7),
+        PINMUX_DATA(LCDD13_MARK, PORT188_FN1),
+        PINMUX_DATA(DV_D13_MARK, PORT188_FN3),
+        PINMUX_DATA(D21_MARK, PORT188_FN6),
+        PINMUX_DATA(ED21_MARK, PORT188_FN7),
+        PINMUX_DATA(LCDD14_MARK, PORT189_FN1),
+        PINMUX_DATA(DV_D14_MARK, PORT189_FN3),
+        PINMUX_DATA(D22_MARK, PORT189_FN6),
+        PINMUX_DATA(ED22_MARK, PORT189_FN7),
+        PINMUX_DATA(LCDD15_MARK, PORT190_FN1),
+        PINMUX_DATA(DV_D15_MARK, PORT190_FN3),
+        PINMUX_DATA(D23_MARK, PORT190_FN6),
+        PINMUX_DATA(ED23_MARK, PORT190_FN7),
+        PINMUX_DATA(LCDD16_MARK, PORT191_FN1),
+        PINMUX_DATA(DV_HSYNC_MARK, PORT191_FN3),
+        PINMUX_DATA(D24_MARK, PORT191_FN6),
+        PINMUX_DATA(ED24_MARK, PORT191_FN7),
+        PINMUX_DATA(LCDD17_MARK, PORT192_FN1),
+        PINMUX_DATA(DV_VSYNC_MARK, PORT192_FN3),
+        PINMUX_DATA(D25_MARK, PORT192_FN6),
+        PINMUX_DATA(ED25_MARK, PORT192_FN7),
+        PINMUX_DATA(LCDD18_MARK, PORT193_FN1),
+        PINMUX_DATA(DREQ2_MARK, PORT193_FN2),
+        PINMUX_DATA(MSIOF0L_TSCK_MARK, PORT193_FN5),
+        PINMUX_DATA(D26_MARK, PORT193_FN6),
+        PINMUX_DATA(ED26_MARK, PORT193_FN7),
+        PINMUX_DATA(LCDD19_MARK, PORT194_FN1),
+        PINMUX_DATA(MSIOF0L_TSYNC_MARK, PORT194_FN5),
+        PINMUX_DATA(D27_MARK, PORT194_FN6),
+        PINMUX_DATA(ED27_MARK, PORT194_FN7),
+        PINMUX_DATA(LCDD20_MARK, PORT195_FN1),
+        PINMUX_DATA(TS_SPSYNC1_MARK, PORT195_FN2),
+        PINMUX_DATA(MSIOF0L_MCK0_MARK, PORT195_FN5),
+        PINMUX_DATA(D28_MARK, PORT195_FN6),
+        PINMUX_DATA(ED28_MARK, PORT195_FN7),
+        PINMUX_DATA(LCDD21_MARK, PORT196_FN1),
+        PINMUX_DATA(TS_SDAT1_MARK, PORT196_FN2),
+        PINMUX_DATA(MSIOF0L_MCK1_MARK, PORT196_FN5),
+        PINMUX_DATA(D29_MARK, PORT196_FN6),
+        PINMUX_DATA(ED29_MARK, PORT196_FN7),
+        PINMUX_DATA(LCDD22_MARK, PORT197_FN1),
+        PINMUX_DATA(TS_SDEN1_MARK, PORT197_FN2),
+        PINMUX_DATA(MSIOF0L_SS1_MARK, PORT197_FN5),
+        PINMUX_DATA(D30_MARK, PORT197_FN6),
+        PINMUX_DATA(ED30_MARK, PORT197_FN7),
+        PINMUX_DATA(LCDD23_MARK, PORT198_FN1),
+        PINMUX_DATA(TS_SCK1_MARK, PORT198_FN2),
+        PINMUX_DATA(MSIOF0L_SS2_MARK, PORT198_FN5),
+        PINMUX_DATA(D31_MARK, PORT198_FN6),
+        PINMUX_DATA(ED31_MARK, PORT198_FN7),
+        PINMUX_DATA(LCDDCK_MARK, PORT199_FN1),
+        PINMUX_DATA(LCDWR_MARK, PORT199_FN2),
+        PINMUX_DATA(DV_CKO_MARK, PORT199_FN3),
+        PINMUX_DATA(SIUAOSPD_MARK, PORT199_FN4),
+        PINMUX_DATA(LCDRD_MARK, PORT200_FN1),
+        PINMUX_DATA(DACK2_MARK, PORT200_FN2),
+        PINMUX_DATA(MSIOF0L_RSYNC_MARK, PORT200_FN5),
+
+        /* 49-5 (FN) */
+        PINMUX_DATA(LCDHSYN_MARK, PORT201_FN1),
+        PINMUX_DATA(LCDCS_MARK, PORT201_FN2),
+        PINMUX_DATA(LCDCS2_MARK, PORT201_FN3),
+        PINMUX_DATA(DACK3_MARK, PORT201_FN4),
+        PINMUX_DATA(LCDDISP_MARK, PORT202_FN1),
+        PINMUX_DATA(LCDRS_MARK, PORT202_FN2),
+        PINMUX_DATA(DREQ3_MARK, PORT202_FN4),
+        PINMUX_DATA(MSIOF0L_RSCK_MARK, PORT202_FN5),
+        PINMUX_DATA(LCDCSYN_MARK, PORT203_FN1),
+        PINMUX_DATA(LCDCSYN2_MARK, PORT203_FN2),
+        PINMUX_DATA(DV_CKI_MARK, PORT203_FN3),
+        PINMUX_DATA(LCDLCLK_MARK, PORT204_FN1),
+        PINMUX_DATA(DREQ1_MARK, PORT204_FN3),
+        PINMUX_DATA(MSIOF0L_RXD_MARK, PORT204_FN5),
+        PINMUX_DATA(LCDDON_MARK, PORT205_FN1),
+        PINMUX_DATA(LCDDON2_MARK, PORT205_FN2),
+        PINMUX_DATA(DACK1_MARK, PORT205_FN3),
+        PINMUX_DATA(MSIOF0L_TXD_MARK, PORT205_FN5),
+        PINMUX_DATA(VIO_DR0_MARK, PORT206_FN1),
+        PINMUX_DATA(VIO_DR1_MARK, PORT207_FN1),
+        PINMUX_DATA(VIO_DR2_MARK, PORT208_FN1),
+        PINMUX_DATA(VIO_DR3_MARK, PORT209_FN1),
+        PINMUX_DATA(VIO_DR4_MARK, PORT210_FN1),
+        PINMUX_DATA(VIO_DR5_MARK, PORT211_FN1),
+        PINMUX_DATA(VIO_DR6_MARK, PORT212_FN1),
+        PINMUX_DATA(VIO_DR7_MARK, PORT213_FN1),
+        PINMUX_DATA(VIO_VDR_MARK, PORT214_FN1),
+        PINMUX_DATA(VIO_HDR_MARK, PORT215_FN1),
+        PINMUX_DATA(VIO_CLKR_MARK, PORT216_FN1),
+        PINMUX_DATA(VIO_CKOR_MARK, PORT217_FN1),
+        PINMUX_DATA(SCIFA1_TXD_MARK, PORT220_FN2),
+        PINMUX_DATA(GPS_PGFA0_MARK, PORT220_FN3),
+        PINMUX_DATA(SCIFA1_SCK_MARK, PORT221_FN2),
+        PINMUX_DATA(GPS_PGFA1_MARK, PORT221_FN3),
+        PINMUX_DATA(SCIFA1_RTS_MARK, PORT222_FN2),
+        PINMUX_DATA(GPS_EPPSINMON_MARK, PORT222_FN3),
+        PINMUX_DATA(SCIFA1_RXD_MARK, PORT223_FN2),
+        PINMUX_DATA(SCIFA1_CTS_MARK, PORT224_FN2),
+        PINMUX_DATA(MSIOF1_TXD_MARK, PORT225_FN1),
+        PINMUX_DATA(SCIFA1_TXD2_MARK, PORT225_FN2),
+        PINMUX_DATA(GPS_TXD_MARK, PORT225_FN3),
+        PINMUX_DATA(MSIOF1_TSYNC_MARK, PORT226_FN1),
+        PINMUX_DATA(SCIFA1_CTS2_MARK, PORT226_FN2),
+        PINMUX_DATA(I2C_SDA2_MARK, PORT226_FN3),
+        PINMUX_DATA(MSIOF1_TSCK_MARK, PORT227_FN1),
+        PINMUX_DATA(SCIFA1_SCK2_MARK, PORT227_FN2),
+        PINMUX_DATA(MSIOF1_RXD_MARK, PORT228_FN1),
+        PINMUX_DATA(SCIFA1_RXD2_MARK, PORT228_FN2),
+        PINMUX_DATA(GPS_RXD_MARK, PORT228_FN3),
+        PINMUX_DATA(MSIOF1_RSCK_MARK, PORT229_FN1),
+        PINMUX_DATA(SCIFA1_RTS2_MARK, PORT229_FN2),
+        PINMUX_DATA(MSIOF1_RSYNC_MARK, PORT230_FN1),
+        PINMUX_DATA(I2C_SCL2_MARK, PORT230_FN3),
+        PINMUX_DATA(MSIOF1_MCK0_MARK, PORT231_FN1),
+        PINMUX_DATA(MSIOF1_MCK1_MARK, PORT232_FN1),
+        PINMUX_DATA(MSIOF1_SS1_MARK, PORT233_FN1),
+        PINMUX_DATA(EDBGREQ3_MARK, PORT233_FN2),
+        PINMUX_DATA(MSIOF1_SS2_MARK, PORT234_FN1),
+        PINMUX_DATA(PORT236_IROUT_MARK, PORT236_FN1),
+        PINMUX_DATA(IRDA_OUT_MARK, PORT236_FN2),
+        PINMUX_DATA(IRDA_IN_MARK, PORT237_FN2),
+        PINMUX_DATA(IRDA_FIRSEL_MARK, PORT238_FN1),
+        PINMUX_DATA(TPU1TO0_MARK, PORT239_FN3),
+        PINMUX_DATA(TS_SPSYNC3_MARK, PORT239_FN4),
+        PINMUX_DATA(TPU1TO1_MARK, PORT240_FN3),
+        PINMUX_DATA(TS_SDAT3_MARK, PORT240_FN4),
+        PINMUX_DATA(TPU1TO2_MARK, PORT241_FN3),
+        PINMUX_DATA(TS_SDEN3_MARK, PORT241_FN4),
+        PINMUX_DATA(PORT241_MSIOF2_SS1_MARK, PORT241_FN5),
+        PINMUX_DATA(TPU1TO3_MARK, PORT242_FN3),
+        PINMUX_DATA(PORT242_MSIOF2_TSCK_MARK, PORT242_FN5),
+        PINMUX_DATA(M13_BSW_MARK, PORT243_FN2),
+        PINMUX_DATA(PORT243_MSIOF2_TSYNC_MARK, PORT243_FN5),
+        PINMUX_DATA(M14_GSW_MARK, PORT244_FN2),
+        PINMUX_DATA(PORT244_MSIOF2_TXD_MARK, PORT244_FN5),
+        PINMUX_DATA(PORT245_IROUT_MARK, PORT245_FN1),
+        PINMUX_DATA(M15_RSW_MARK, PORT245_FN2),
+        PINMUX_DATA(SOUT3_MARK, PORT246_FN1),
+        PINMUX_DATA(SCIFA2_TXD1_MARK, PORT246_FN2),
+        PINMUX_DATA(SIN3_MARK, PORT247_FN1),
+        PINMUX_DATA(SCIFA2_RXD1_MARK, PORT247_FN2),
+        PINMUX_DATA(XRTS3_MARK, PORT248_FN1),
+        PINMUX_DATA(SCIFA2_RTS1_MARK, PORT248_FN2),
+        PINMUX_DATA(PORT248_MSIOF2_SS2_MARK, PORT248_FN5),
+        PINMUX_DATA(XCTS3_MARK, PORT249_FN1),
+        PINMUX_DATA(SCIFA2_CTS1_MARK, PORT249_FN2),
+        PINMUX_DATA(PORT249_MSIOF2_RXD_MARK, PORT249_FN5),
+        PINMUX_DATA(DINT_MARK, PORT250_FN1),
+        PINMUX_DATA(SCIFA2_SCK1_MARK, PORT250_FN2),
+        PINMUX_DATA(TS_SCK3_MARK, PORT250_FN4),
+        PINMUX_DATA(SDHICLK0_MARK, PORT251_FN1),
+        PINMUX_DATA(TCK2_MARK, PORT251_FN2),
+        PINMUX_DATA(SDHICD0_MARK, PORT252_FN1),
+        PINMUX_DATA(SDHID0_0_MARK, PORT253_FN1),
+        PINMUX_DATA(TMS2_MARK, PORT253_FN2),
+        PINMUX_DATA(SDHID0_1_MARK, PORT254_FN1),
+        PINMUX_DATA(TDO2_MARK, PORT254_FN2),
+        PINMUX_DATA(SDHID0_2_MARK, PORT255_FN1),
+        PINMUX_DATA(TDI2_MARK, PORT255_FN2),
+        PINMUX_DATA(SDHID0_3_MARK, PORT256_FN1),
+        PINMUX_DATA(RTCK2_MARK, PORT256_FN2),
+
+        /* 49-6 (FN) */
+        PINMUX_DATA(SDHICMD0_MARK, PORT257_FN1),
+        PINMUX_DATA(TRST2_MARK, PORT257_FN2),
+        PINMUX_DATA(SDHIWP0_MARK, PORT258_FN1),
+        PINMUX_DATA(EDBGREQ2_MARK, PORT258_FN2),
+        PINMUX_DATA(SDHICLK1_MARK, PORT259_FN1),
+        PINMUX_DATA(TCK3_MARK, PORT259_FN4),
+        PINMUX_DATA(SDHID1_0_MARK, PORT260_FN1),
+        PINMUX_DATA(M11_SLCD_SO2_MARK, PORT260_FN2),
+        PINMUX_DATA(TS_SPSYNC2_MARK, PORT260_FN3),
+        PINMUX_DATA(TMS3_MARK, PORT260_FN4),
+        PINMUX_DATA(SDHID1_1_MARK, PORT261_FN1),
+        PINMUX_DATA(M9_SLCD_AO2_MARK, PORT261_FN2),
+        PINMUX_DATA(TS_SDAT2_MARK, PORT261_FN3),
+        PINMUX_DATA(TDO3_MARK, PORT261_FN4),
+        PINMUX_DATA(SDHID1_2_MARK, PORT262_FN1),
+        PINMUX_DATA(M10_SLCD_CK2_MARK, PORT262_FN2),
+        PINMUX_DATA(TS_SDEN2_MARK, PORT262_FN3),
+        PINMUX_DATA(TDI3_MARK, PORT262_FN4),
+        PINMUX_DATA(SDHID1_3_MARK, PORT263_FN1),
+        PINMUX_DATA(M12_SLCD_CE2_MARK, PORT263_FN2),
+        PINMUX_DATA(TS_SCK2_MARK, PORT263_FN3),
+        PINMUX_DATA(RTCK3_MARK, PORT263_FN4),
+        PINMUX_DATA(SDHICMD1_MARK, PORT264_FN1),
+        PINMUX_DATA(TRST3_MARK, PORT264_FN4),
+        PINMUX_DATA(SDHICLK2_MARK, PORT265_FN1),
+        PINMUX_DATA(SCIFB_SCK_MARK, PORT265_FN2),
+        PINMUX_DATA(SDHID2_0_MARK, PORT266_FN1),
+        PINMUX_DATA(SCIFB_TXD_MARK, PORT266_FN2),
+        PINMUX_DATA(SDHID2_1_MARK, PORT267_FN1),
+        PINMUX_DATA(SCIFB_CTS_MARK, PORT267_FN2),
+        PINMUX_DATA(SDHID2_2_MARK, PORT268_FN1),
+        PINMUX_DATA(SCIFB_RXD_MARK, PORT268_FN2),
+        PINMUX_DATA(SDHID2_3_MARK, PORT269_FN1),
+        PINMUX_DATA(SCIFB_RTS_MARK, PORT269_FN2),
+        PINMUX_DATA(SDHICMD2_MARK, PORT270_FN1),
+        PINMUX_DATA(RESETOUTS_MARK, PORT271_FN1),
+        PINMUX_DATA(DIVLOCK_MARK, PORT272_FN1),
+};
+
+#define _GPIO_PORT(pfx, sfx) PINMUX_GPIO(GPIO_PORT##pfx, PORT##pfx##_DATA)
+#define GPIO_PORT_273() _273(_GPIO_PORT, , unused)
+#define GPIO_FN(str) PINMUX_GPIO(GPIO_FN_##str, str##_MARK)
+
+static struct pinmux_gpio pinmux_gpios[] = {
+        /* 49-1 -> 49-6 (GPIO) */
+        GPIO_PORT_273(),
+
+        /* Special Pull-up / Pull-down Functions */
+        GPIO_FN(PORT48_KEYIN0_PU), GPIO_FN(PORT49_KEYIN1_PU),
+        GPIO_FN(PORT50_KEYIN2_PU), GPIO_FN(PORT55_KEYIN3_PU),
+        GPIO_FN(PORT56_KEYIN4_PU), GPIO_FN(PORT57_KEYIN5_PU),
+        GPIO_FN(PORT58_KEYIN6_PU),
+
+        /* 49-1 (FN) */
+        GPIO_FN(VBUS0), GPIO_FN(CPORT0), GPIO_FN(CPORT1), GPIO_FN(CPORT2),
+        GPIO_FN(CPORT3), GPIO_FN(CPORT4), GPIO_FN(CPORT5), GPIO_FN(CPORT6),
+        GPIO_FN(CPORT7), GPIO_FN(CPORT8), GPIO_FN(CPORT9), GPIO_FN(CPORT10),
+        GPIO_FN(CPORT11), GPIO_FN(SIN2), GPIO_FN(CPORT12), GPIO_FN(XCTS2),
+        GPIO_FN(CPORT13), GPIO_FN(RFSPO4), GPIO_FN(CPORT14), GPIO_FN(RFSPO5),
+        GPIO_FN(CPORT15), GPIO_FN(CPORT16), GPIO_FN(CPORT17), GPIO_FN(SOUT2),
+        GPIO_FN(CPORT18), GPIO_FN(XRTS2), GPIO_FN(CPORT19), GPIO_FN(CPORT20),
+        GPIO_FN(RFSPO6), GPIO_FN(CPORT21), GPIO_FN(STATUS0), GPIO_FN(CPORT22),
+        GPIO_FN(STATUS1), GPIO_FN(CPORT23), GPIO_FN(STATUS2), GPIO_FN(RFSPO7),
+        GPIO_FN(MPORT0), GPIO_FN(MPORT1), GPIO_FN(B_SYNLD1), GPIO_FN(B_SYNLD2),
+        GPIO_FN(XMAINPS), GPIO_FN(XDIVPS), GPIO_FN(XIDRST), GPIO_FN(IDCLK),
+        GPIO_FN(IDIO), GPIO_FN(SOUT1), GPIO_FN(SCIFA4_TXD),
+        GPIO_FN(M02_BERDAT), GPIO_FN(SIN1), GPIO_FN(SCIFA4_RXD), GPIO_FN(XWUP),
+        GPIO_FN(XRTS1), GPIO_FN(SCIFA4_RTS), GPIO_FN(M03_BERCLK),
+        GPIO_FN(XCTS1), GPIO_FN(SCIFA4_CTS),
+
+        /* 49-2 (FN) */
+        GPIO_FN(HSU_IQ_AGC6), GPIO_FN(MFG2_IN2), GPIO_FN(MSIOF2_MCK0),
+        GPIO_FN(HSU_IQ_AGC5), GPIO_FN(MFG2_IN1), GPIO_FN(MSIOF2_MCK1),
+        GPIO_FN(HSU_IQ_AGC4), GPIO_FN(MSIOF2_RSYNC),
+        GPIO_FN(HSU_IQ_AGC3), GPIO_FN(MFG2_OUT1), GPIO_FN(MSIOF2_RSCK),
+        GPIO_FN(HSU_IQ_AGC2), GPIO_FN(PORT42_KEYOUT0),
+        GPIO_FN(HSU_IQ_AGC1), GPIO_FN(PORT43_KEYOUT1),
+        GPIO_FN(HSU_IQ_AGC0), GPIO_FN(PORT44_KEYOUT2),
+        GPIO_FN(HSU_IQ_AGC_ST), GPIO_FN(PORT45_KEYOUT3),
+        GPIO_FN(HSU_IQ_PDO), GPIO_FN(PORT46_KEYOUT4),
+        GPIO_FN(HSU_IQ_PYO), GPIO_FN(PORT47_KEYOUT5),
+        GPIO_FN(HSU_EN_TXMUX_G3MO), GPIO_FN(PORT48_KEYIN0),
+        GPIO_FN(HSU_I_TXMUX_G3MO), GPIO_FN(PORT49_KEYIN1),
+        GPIO_FN(HSU_Q_TXMUX_G3MO), GPIO_FN(PORT50_KEYIN2),
+        GPIO_FN(HSU_SYO), GPIO_FN(PORT51_MSIOF2_TSYNC),
+        GPIO_FN(HSU_SDO), GPIO_FN(PORT52_MSIOF2_TSCK),
+        GPIO_FN(HSU_TGTTI_G3MO), GPIO_FN(PORT53_MSIOF2_TXD),
+        GPIO_FN(B_TIME_STAMP), GPIO_FN(PORT54_MSIOF2_RXD),
+        GPIO_FN(HSU_SDI), GPIO_FN(PORT55_KEYIN3),
+        GPIO_FN(HSU_SCO), GPIO_FN(PORT56_KEYIN4),
+        GPIO_FN(HSU_DREQ), GPIO_FN(PORT57_KEYIN5),
+        GPIO_FN(HSU_DACK), GPIO_FN(PORT58_KEYIN6),
+        GPIO_FN(HSU_CLK61M), GPIO_FN(PORT59_MSIOF2_SS1),
+        GPIO_FN(HSU_XRST), GPIO_FN(PORT60_MSIOF2_SS2),
+        GPIO_FN(PCMCLKO), GPIO_FN(SYNC8KO), GPIO_FN(DNPCM_A), GPIO_FN(UPPCM_A),
+        GPIO_FN(XTALB1L),
+        GPIO_FN(GPS_AGC1), GPIO_FN(SCIFA0_RTS),
+        GPIO_FN(GPS_AGC2), GPIO_FN(SCIFA0_SCK),
+        GPIO_FN(GPS_AGC3), GPIO_FN(SCIFA0_TXD),
+        GPIO_FN(GPS_AGC4), GPIO_FN(SCIFA0_RXD),
+        GPIO_FN(GPS_PWRD), GPIO_FN(SCIFA0_CTS),
+        GPIO_FN(GPS_IM), GPIO_FN(GPS_IS), GPIO_FN(GPS_QM), GPIO_FN(GPS_QS),
+        GPIO_FN(SIUBOMC), GPIO_FN(TPU2TO0),
+        GPIO_FN(SIUCKB), GPIO_FN(TPU2TO1),
+        GPIO_FN(SIUBOLR), GPIO_FN(BBIF2_TSYNC), GPIO_FN(TPU2TO2),
+        GPIO_FN(SIUBOBT), GPIO_FN(BBIF2_TSCK), GPIO_FN(TPU2TO3),
+        GPIO_FN(SIUBOSLD), GPIO_FN(BBIF2_TXD), GPIO_FN(TPU3TO0),
+        GPIO_FN(SIUBILR), GPIO_FN(TPU3TO1),
+        GPIO_FN(SIUBIBT), GPIO_FN(TPU3TO2),
+        GPIO_FN(SIUBISLD), GPIO_FN(TPU3TO3),
+        GPIO_FN(NMI), GPIO_FN(TPU4TO0),
+        GPIO_FN(DNPCM_M), GPIO_FN(TPU4TO1), GPIO_FN(TPU4TO2), GPIO_FN(TPU4TO3),
+        GPIO_FN(IRQ_TMPB),
+        GPIO_FN(PWEN), GPIO_FN(MFG1_OUT1),
+        GPIO_FN(OVCN), GPIO_FN(MFG1_IN1),
+        GPIO_FN(OVCN2), GPIO_FN(MFG1_IN2),
+
+        /* 49-3 (FN) */
+        GPIO_FN(RFSPO1), GPIO_FN(RFSPO2), GPIO_FN(RFSPO3),
+        GPIO_FN(PORT93_VIO_CKO2),
+        GPIO_FN(USBTERM), GPIO_FN(EXTLP), GPIO_FN(IDIN),
+        GPIO_FN(SCIFA5_CTS), GPIO_FN(MFG0_IN1),
+        GPIO_FN(SCIFA5_RTS), GPIO_FN(MFG0_IN2),
+        GPIO_FN(SCIFA5_RXD),
+        GPIO_FN(SCIFA5_TXD),
+        GPIO_FN(SCIFA5_SCK), GPIO_FN(MFG0_OUT1),
+        GPIO_FN(A0_EA0), GPIO_FN(BS),
+        GPIO_FN(A14_EA14), GPIO_FN(PORT102_KEYOUT0),
+        GPIO_FN(A15_EA15), GPIO_FN(PORT103_KEYOUT1), GPIO_FN(DV_CLKOL),
+        GPIO_FN(A16_EA16), GPIO_FN(PORT104_KEYOUT2),
+        GPIO_FN(DV_VSYNCL), GPIO_FN(MSIOF0_SS1),
+        GPIO_FN(A17_EA17), GPIO_FN(PORT105_KEYOUT3),
+        GPIO_FN(DV_HSYNCL), GPIO_FN(MSIOF0_TSYNC),
+        GPIO_FN(A18_EA18), GPIO_FN(PORT106_KEYOUT4),
+        GPIO_FN(DV_DL0), GPIO_FN(MSIOF0_TSCK),
+        GPIO_FN(A19_EA19), GPIO_FN(PORT107_KEYOUT5),
+        GPIO_FN(DV_DL1), GPIO_FN(MSIOF0_TXD),
+        GPIO_FN(A20_EA20), GPIO_FN(PORT108_KEYIN0),
+        GPIO_FN(DV_DL2), GPIO_FN(MSIOF0_RSCK),
+        GPIO_FN(A21_EA21), GPIO_FN(PORT109_KEYIN1),
+        GPIO_FN(DV_DL3), GPIO_FN(MSIOF0_RSYNC),
+        GPIO_FN(A22_EA22), GPIO_FN(PORT110_KEYIN2),
+        GPIO_FN(DV_DL4), GPIO_FN(MSIOF0_MCK0),
+        GPIO_FN(A23_EA23), GPIO_FN(PORT111_KEYIN3),
+        GPIO_FN(DV_DL5), GPIO_FN(MSIOF0_MCK1),
+        GPIO_FN(A24_EA24), GPIO_FN(PORT112_KEYIN4),
+        GPIO_FN(DV_DL6), GPIO_FN(MSIOF0_RXD),
+        GPIO_FN(A25_EA25), GPIO_FN(PORT113_KEYIN5),
+        GPIO_FN(DV_DL7), GPIO_FN(MSIOF0_SS2),
+        GPIO_FN(A26), GPIO_FN(PORT113_KEYIN6), GPIO_FN(DV_CLKIL),
+        GPIO_FN(D0_ED0_NAF0), GPIO_FN(D1_ED1_NAF1), GPIO_FN(D2_ED2_NAF2),
+        GPIO_FN(D3_ED3_NAF3), GPIO_FN(D4_ED4_NAF4), GPIO_FN(D5_ED5_NAF5),
+        GPIO_FN(D6_ED6_NAF6), GPIO_FN(D7_ED7_NAF7), GPIO_FN(D8_ED8_NAF8),
+        GPIO_FN(D9_ED9_NAF9), GPIO_FN(D10_ED10_NAF10), GPIO_FN(D11_ED11_NAF11),
+        GPIO_FN(D12_ED12_NAF12), GPIO_FN(D13_ED13_NAF13),
+        GPIO_FN(D14_ED14_NAF14), GPIO_FN(D15_ED15_NAF15),
+        GPIO_FN(CS4), GPIO_FN(CS5A), GPIO_FN(CS5B), GPIO_FN(FCE1),
+        GPIO_FN(CS6B), GPIO_FN(XCS2), GPIO_FN(FCE0), GPIO_FN(CS6A),
+        GPIO_FN(DACK0), GPIO_FN(WAIT), GPIO_FN(DREQ0), GPIO_FN(RD_XRD),
+        GPIO_FN(A27), GPIO_FN(RDWR_XWE), GPIO_FN(WE0_XWR0_FWE),
+        GPIO_FN(WE1_XWR1), GPIO_FN(FRB), GPIO_FN(CKO),
+        GPIO_FN(NBRSTOUT), GPIO_FN(NBRST),
+
+        /* 49-4 (FN) */
+        GPIO_FN(RFSPO0), GPIO_FN(PORT146_VIO_CKO2), GPIO_FN(TSTMD),
+        GPIO_FN(VIO_VD), GPIO_FN(VIO_HD),
+        GPIO_FN(VIO_D0), GPIO_FN(VIO_D1), GPIO_FN(VIO_D2),
+        GPIO_FN(VIO_D3), GPIO_FN(VIO_D4), GPIO_FN(VIO_D5),
+        GPIO_FN(VIO_D6), GPIO_FN(VIO_D7), GPIO_FN(VIO_D8),
+        GPIO_FN(VIO_D9), GPIO_FN(VIO_D10), GPIO_FN(VIO_D11),
+        GPIO_FN(VIO_D12), GPIO_FN(VIO_D13), GPIO_FN(VIO_D14),
+        GPIO_FN(VIO_D15), GPIO_FN(VIO_CLK), GPIO_FN(VIO_FIELD),
+        GPIO_FN(VIO_CKO),
+        GPIO_FN(MFG3_IN1), GPIO_FN(MFG3_IN2),
+        GPIO_FN(M9_SLCD_A01), GPIO_FN(MFG3_OUT1), GPIO_FN(TPU0TO0),
+        GPIO_FN(M10_SLCD_CK1), GPIO_FN(MFG4_IN1), GPIO_FN(TPU0TO1),
+        GPIO_FN(M11_SLCD_SO1), GPIO_FN(MFG4_IN2), GPIO_FN(TPU0TO2),
+        GPIO_FN(M12_SLCD_CE1), GPIO_FN(MFG4_OUT1), GPIO_FN(TPU0TO3),
+        GPIO_FN(LCDD0), GPIO_FN(PORT175_KEYOUT0), GPIO_FN(DV_D0),
+        GPIO_FN(SIUCKA), GPIO_FN(MFG0_OUT2),
+        GPIO_FN(LCDD1), GPIO_FN(PORT176_KEYOUT1), GPIO_FN(DV_D1),
+        GPIO_FN(SIUAOLR), GPIO_FN(BBIF2_TSYNC1),
+        GPIO_FN(LCDD2), GPIO_FN(PORT177_KEYOUT2), GPIO_FN(DV_D2),
+        GPIO_FN(SIUAOBT), GPIO_FN(BBIF2_TSCK1),
+        GPIO_FN(LCDD3), GPIO_FN(PORT178_KEYOUT3), GPIO_FN(DV_D3),
+        GPIO_FN(SIUAOSLD), GPIO_FN(BBIF2_TXD1),
+        GPIO_FN(LCDD4), GPIO_FN(PORT179_KEYOUT4), GPIO_FN(DV_D4),
+        GPIO_FN(SIUAISPD), GPIO_FN(MFG1_OUT2),
+        GPIO_FN(LCDD5), GPIO_FN(PORT180_KEYOUT5), GPIO_FN(DV_D5),
+        GPIO_FN(SIUAILR), GPIO_FN(MFG2_OUT2),
+        GPIO_FN(LCDD6), GPIO_FN(DV_D6),
+        GPIO_FN(SIUAIBT), GPIO_FN(MFG3_OUT2), GPIO_FN(XWR2),
+        GPIO_FN(LCDD7), GPIO_FN(DV_D7),
+        GPIO_FN(SIUAISLD), GPIO_FN(MFG4_OUT2), GPIO_FN(XWR3),
+        GPIO_FN(LCDD8), GPIO_FN(DV_D8), GPIO_FN(D16), GPIO_FN(ED16),
+        GPIO_FN(LCDD9), GPIO_FN(DV_D9), GPIO_FN(D17), GPIO_FN(ED17),
+        GPIO_FN(LCDD10), GPIO_FN(DV_D10), GPIO_FN(D18), GPIO_FN(ED18),
+        GPIO_FN(LCDD11), GPIO_FN(DV_D11), GPIO_FN(D19), GPIO_FN(ED19),
+        GPIO_FN(LCDD12), GPIO_FN(DV_D12), GPIO_FN(D20), GPIO_FN(ED20),
+        GPIO_FN(LCDD13), GPIO_FN(DV_D13), GPIO_FN(D21), GPIO_FN(ED21),
+        GPIO_FN(LCDD14), GPIO_FN(DV_D14), GPIO_FN(D22), GPIO_FN(ED22),
+        GPIO_FN(LCDD15), GPIO_FN(DV_D15), GPIO_FN(D23), GPIO_FN(ED23),
+        GPIO_FN(LCDD16), GPIO_FN(DV_HSYNC), GPIO_FN(D24), GPIO_FN(ED24),
+        GPIO_FN(LCDD17), GPIO_FN(DV_VSYNC), GPIO_FN(D25), GPIO_FN(ED25),
+        GPIO_FN(LCDD18), GPIO_FN(DREQ2), GPIO_FN(MSIOF0L_TSCK),
+        GPIO_FN(D26), GPIO_FN(ED26),
+        GPIO_FN(LCDD19), GPIO_FN(MSIOF0L_TSYNC),
+        GPIO_FN(D27), GPIO_FN(ED27),
+        GPIO_FN(LCDD20), GPIO_FN(TS_SPSYNC1), GPIO_FN(MSIOF0L_MCK0),
+        GPIO_FN(D28), GPIO_FN(ED28),
+        GPIO_FN(LCDD21), GPIO_FN(TS_SDAT1), GPIO_FN(MSIOF0L_MCK1),
+        GPIO_FN(D29), GPIO_FN(ED29),
+        GPIO_FN(LCDD22), GPIO_FN(TS_SDEN1), GPIO_FN(MSIOF0L_SS1),
+        GPIO_FN(D30), GPIO_FN(ED30),
+        GPIO_FN(LCDD23), GPIO_FN(TS_SCK1), GPIO_FN(MSIOF0L_SS2),
+        GPIO_FN(D31), GPIO_FN(ED31),
+        GPIO_FN(LCDDCK), GPIO_FN(LCDWR), GPIO_FN(DV_CKO), GPIO_FN(SIUAOSPD),
+        GPIO_FN(LCDRD), GPIO_FN(DACK2), GPIO_FN(MSIOF0L_RSYNC),
+
+        /* 49-5 (FN) */
+        GPIO_FN(LCDHSYN), GPIO_FN(LCDCS), GPIO_FN(LCDCS2), GPIO_FN(DACK3),
+        GPIO_FN(LCDDISP), GPIO_FN(LCDRS), GPIO_FN(DREQ3), GPIO_FN(MSIOF0L_RSCK),
+        GPIO_FN(LCDCSYN), GPIO_FN(LCDCSYN2), GPIO_FN(DV_CKI),
+        GPIO_FN(LCDLCLK), GPIO_FN(DREQ1), GPIO_FN(MSIOF0L_RXD),
+        GPIO_FN(LCDDON), GPIO_FN(LCDDON2), GPIO_FN(DACK1), GPIO_FN(MSIOF0L_TXD),
+        GPIO_FN(VIO_DR0), GPIO_FN(VIO_DR1), GPIO_FN(VIO_DR2), GPIO_FN(VIO_DR3),
+        GPIO_FN(VIO_DR4), GPIO_FN(VIO_DR5), GPIO_FN(VIO_DR6), GPIO_FN(VIO_DR7),
+        GPIO_FN(VIO_VDR), GPIO_FN(VIO_HDR),
+        GPIO_FN(VIO_CLKR), GPIO_FN(VIO_CKOR),
+        GPIO_FN(SCIFA1_TXD), GPIO_FN(GPS_PGFA0),
+        GPIO_FN(SCIFA1_SCK), GPIO_FN(GPS_PGFA1),
+        GPIO_FN(SCIFA1_RTS), GPIO_FN(GPS_EPPSINMON),
+        GPIO_FN(SCIFA1_RXD), GPIO_FN(SCIFA1_CTS),
+        GPIO_FN(MSIOF1_TXD), GPIO_FN(SCIFA1_TXD2), GPIO_FN(GPS_TXD),
+        GPIO_FN(MSIOF1_TSYNC), GPIO_FN(SCIFA1_CTS2), GPIO_FN(I2C_SDA2),
+        GPIO_FN(MSIOF1_TSCK), GPIO_FN(SCIFA1_SCK2),
+        GPIO_FN(MSIOF1_RXD), GPIO_FN(SCIFA1_RXD2), GPIO_FN(GPS_RXD),
+        GPIO_FN(MSIOF1_RSCK), GPIO_FN(SCIFA1_RTS2),
+        GPIO_FN(MSIOF1_RSYNC), GPIO_FN(I2C_SCL2),
+        GPIO_FN(MSIOF1_MCK0), GPIO_FN(MSIOF1_MCK1),
+        GPIO_FN(MSIOF1_SS1), GPIO_FN(EDBGREQ3),
+        GPIO_FN(MSIOF1_SS2),
+        GPIO_FN(PORT236_IROUT), GPIO_FN(IRDA_OUT),
+        GPIO_FN(IRDA_IN), GPIO_FN(IRDA_FIRSEL),
+        GPIO_FN(TPU1TO0), GPIO_FN(TS_SPSYNC3),
+        GPIO_FN(TPU1TO1), GPIO_FN(TS_SDAT3),
+        GPIO_FN(TPU1TO2), GPIO_FN(TS_SDEN3), GPIO_FN(PORT241_MSIOF2_SS1),
+        GPIO_FN(TPU1TO3), GPIO_FN(PORT242_MSIOF2_TSCK),
+        GPIO_FN(M13_BSW), GPIO_FN(PORT243_MSIOF2_TSYNC),
+        GPIO_FN(M14_GSW), GPIO_FN(PORT244_MSIOF2_TXD),
+        GPIO_FN(PORT245_IROUT), GPIO_FN(M15_RSW),
+        GPIO_FN(SOUT3), GPIO_FN(SCIFA2_TXD1),
+        GPIO_FN(SIN3), GPIO_FN(SCIFA2_RXD1),
+        GPIO_FN(XRTS3), GPIO_FN(SCIFA2_RTS1), GPIO_FN(PORT248_MSIOF2_SS2),
+        GPIO_FN(XCTS3), GPIO_FN(SCIFA2_CTS1), GPIO_FN(PORT249_MSIOF2_RXD),
+        GPIO_FN(DINT), GPIO_FN(SCIFA2_SCK1), GPIO_FN(TS_SCK3),
+        GPIO_FN(SDHICLK0), GPIO_FN(TCK2),
+        GPIO_FN(SDHICD0),
+        GPIO_FN(SDHID0_0), GPIO_FN(TMS2),
+        GPIO_FN(SDHID0_1), GPIO_FN(TDO2),
+        GPIO_FN(SDHID0_2), GPIO_FN(TDI2),
+        GPIO_FN(SDHID0_3), GPIO_FN(RTCK2),
+
+        /* 49-6 (FN) */
+        GPIO_FN(SDHICMD0), GPIO_FN(TRST2),
+        GPIO_FN(SDHIWP0), GPIO_FN(EDBGREQ2),
+        GPIO_FN(SDHICLK1), GPIO_FN(TCK3),
+        GPIO_FN(SDHID1_0), GPIO_FN(M11_SLCD_SO2),
+        GPIO_FN(TS_SPSYNC2), GPIO_FN(TMS3),
+        GPIO_FN(SDHID1_1), GPIO_FN(M9_SLCD_AO2),
+        GPIO_FN(TS_SDAT2), GPIO_FN(TDO3),
+        GPIO_FN(SDHID1_2), GPIO_FN(M10_SLCD_CK2),
+        GPIO_FN(TS_SDEN2), GPIO_FN(TDI3),
+        GPIO_FN(SDHID1_3), GPIO_FN(M12_SLCD_CE2),
+        GPIO_FN(TS_SCK2), GPIO_FN(RTCK3),
+        GPIO_FN(SDHICMD1), GPIO_FN(TRST3),
+        GPIO_FN(SDHICLK2), GPIO_FN(SCIFB_SCK),
+        GPIO_FN(SDHID2_0), GPIO_FN(SCIFB_TXD),
+        GPIO_FN(SDHID2_1), GPIO_FN(SCIFB_CTS),
+        GPIO_FN(SDHID2_2), GPIO_FN(SCIFB_RXD),
+        GPIO_FN(SDHID2_3), GPIO_FN(SCIFB_RTS),
+        GPIO_FN(SDHICMD2),
+        GPIO_FN(RESETOUTS),
+        GPIO_FN(DIVLOCK),
+};
+
+/* helper for top 4 bits in PORTnCR */
+#define PCRH(in, in_pd, in_pu, out)             \
+        0, (out), (in), 0,                      \
+        0, 0, 0, 0,                             \
+        0, 0, (in_pd), 0,                       \
+        0, 0, (in_pu), 0
+
+#define PORTCR(nr, reg)                                         \
+        { PINMUX_CFG_REG("PORT" nr "CR", reg, 8, 4) {           \
+                PCRH(PORT##nr##_IN, PORT##nr##_IN_PD,           \
+                     PORT##nr##_IN_PU, PORT##nr##_OUT),         \
+                PORT##nr##_FN0, PORT##nr##_FN1, PORT##nr##_FN2, \
+                PORT##nr##_FN3, PORT##nr##_FN4, PORT##nr##_FN5, \
+                PORT##nr##_FN6, PORT##nr##_FN7 }                \
+        }
+
+static struct pinmux_cfg_reg pinmux_config_regs[] = {
+        PORTCR(0, 0xe6050000), /* PORT0CR */
+        PORTCR(1, 0xe6050001), /* PORT1CR */
+        PORTCR(2, 0xe6050002), /* PORT2CR */
+        PORTCR(3, 0xe6050003), /* PORT3CR */
+        PORTCR(4, 0xe6050004), /* PORT4CR */
+        PORTCR(5, 0xe6050005), /* PORT5CR */
+        PORTCR(6, 0xe6050006), /* PORT6CR */
+        PORTCR(7, 0xe6050007), /* PORT7CR */
+        PORTCR(8, 0xe6050008), /* PORT8CR */
+        PORTCR(9, 0xe6050009), /* PORT9CR */
+
+        PORTCR(10, 0xe605000a), /* PORT10CR */
+        PORTCR(11, 0xe605000b), /* PORT11CR */
+        PORTCR(12, 0xe605000c), /* PORT12CR */
+        PORTCR(13, 0xe605000d), /* PORT13CR */
+        PORTCR(14, 0xe605000e), /* PORT14CR */
+        PORTCR(15, 0xe605000f), /* PORT15CR */
+        PORTCR(16, 0xe6050010), /* PORT16CR */
+        PORTCR(17, 0xe6050011), /* PORT17CR */
+        PORTCR(18, 0xe6050012), /* PORT18CR */
+        PORTCR(19, 0xe6050013), /* PORT19CR */
+
+        PORTCR(20, 0xe6050014), /* PORT20CR */
+        PORTCR(21, 0xe6050015), /* PORT21CR */
+        PORTCR(22, 0xe6050016), /* PORT22CR */
+        PORTCR(23, 0xe6050017), /* PORT23CR */
+        PORTCR(24, 0xe6050018), /* PORT24CR */
+        PORTCR(25, 0xe6050019), /* PORT25CR */
+        PORTCR(26, 0xe605001a), /* PORT26CR */
+        PORTCR(27, 0xe605001b), /* PORT27CR */
+        PORTCR(28, 0xe605001c), /* PORT28CR */
+        PORTCR(29, 0xe605001d), /* PORT29CR */
+
+        PORTCR(30, 0xe605001e), /* PORT30CR */
+        PORTCR(31, 0xe605001f), /* PORT31CR */
+        PORTCR(32, 0xe6050020), /* PORT32CR */
+        PORTCR(33, 0xe6050021), /* PORT33CR */
+        PORTCR(34, 0xe6050022), /* PORT34CR */
+        PORTCR(35, 0xe6050023), /* PORT35CR */
+        PORTCR(36, 0xe6050024), /* PORT36CR */
+        PORTCR(37, 0xe6050025), /* PORT37CR */
+        PORTCR(38, 0xe6050026), /* PORT38CR */
+        PORTCR(39, 0xe6050027), /* PORT39CR */
+
+        PORTCR(40, 0xe6050028), /* PORT40CR */
+        PORTCR(41, 0xe6050029), /* PORT41CR */
+        PORTCR(42, 0xe605002a), /* PORT42CR */
+        PORTCR(43, 0xe605002b), /* PORT43CR */
+        PORTCR(44, 0xe605002c), /* PORT44CR */
+        PORTCR(45, 0xe605002d), /* PORT45CR */
+        PORTCR(46, 0xe605002e), /* PORT46CR */
+        PORTCR(47, 0xe605002f), /* PORT47CR */
+        PORTCR(48, 0xe6050030), /* PORT48CR */
+        PORTCR(49, 0xe6050031), /* PORT49CR */
+
+        PORTCR(50, 0xe6050032), /* PORT50CR */
+        PORTCR(51, 0xe6050033), /* PORT51CR */
+        PORTCR(52, 0xe6050034), /* PORT52CR */
+        PORTCR(53, 0xe6050035), /* PORT53CR */
+        PORTCR(54, 0xe6050036), /* PORT54CR */
+        PORTCR(55, 0xe6050037), /* PORT55CR */
+        PORTCR(56, 0xe6050038), /* PORT56CR */
+        PORTCR(57, 0xe6050039), /* PORT57CR */
+        PORTCR(58, 0xe605003a), /* PORT58CR */
+        PORTCR(59, 0xe605003b), /* PORT59CR */
+
+        PORTCR(60, 0xe605003c), /* PORT60CR */
+        PORTCR(61, 0xe605003d), /* PORT61CR */
+        PORTCR(62, 0xe605003e), /* PORT62CR */
+        PORTCR(63, 0xe605003f), /* PORT63CR */
+        PORTCR(64, 0xe6050040), /* PORT64CR */
+        PORTCR(65, 0xe6050041), /* PORT65CR */
+        PORTCR(66, 0xe6050042), /* PORT66CR */
+        PORTCR(67, 0xe6050043), /* PORT67CR */
+        PORTCR(68, 0xe6050044), /* PORT68CR */
+        PORTCR(69, 0xe6050045), /* PORT69CR */
+
+        PORTCR(70, 0xe6050046), /* PORT70CR */
+        PORTCR(71, 0xe6050047), /* PORT71CR */
+        PORTCR(72, 0xe6050048), /* PORT72CR */
+        PORTCR(73, 0xe6050049), /* PORT73CR */
+        PORTCR(74, 0xe605004a), /* PORT74CR */
+        PORTCR(75, 0xe605004b), /* PORT75CR */
+        PORTCR(76, 0xe605004c), /* PORT76CR */
+        PORTCR(77, 0xe605004d), /* PORT77CR */
+        PORTCR(78, 0xe605004e), /* PORT78CR */
+        PORTCR(79, 0xe605004f), /* PORT79CR */
+
+        PORTCR(80, 0xe6050050), /* PORT80CR */
+        PORTCR(81, 0xe6050051), /* PORT81CR */
+        PORTCR(82, 0xe6050052), /* PORT82CR */
+        PORTCR(83, 0xe6050053), /* PORT83CR */
+        PORTCR(84, 0xe6050054), /* PORT84CR */
+        PORTCR(85, 0xe6050055), /* PORT85CR */
+        PORTCR(86, 0xe6050056), /* PORT86CR */
+        PORTCR(87, 0xe6050057), /* PORT87CR */
+        PORTCR(88, 0xe6051058), /* PORT88CR */
+        PORTCR(89, 0xe6051059), /* PORT89CR */
+
+        PORTCR(90, 0xe605105a), /* PORT90CR */
+        PORTCR(91, 0xe605105b), /* PORT91CR */
+        PORTCR(92, 0xe605105c), /* PORT92CR */
+        PORTCR(93, 0xe605105d), /* PORT93CR */
+        PORTCR(94, 0xe605105e), /* PORT94CR */
+        PORTCR(95, 0xe605105f), /* PORT95CR */
+        PORTCR(96, 0xe6051060), /* PORT96CR */
+        PORTCR(97, 0xe6051061), /* PORT97CR */
+        PORTCR(98, 0xe6051062), /* PORT98CR */
+        PORTCR(99, 0xe6051063), /* PORT99CR */
+
+        PORTCR(100, 0xe6051064), /* PORT100CR */
+        PORTCR(101, 0xe6051065), /* PORT101CR */
+        PORTCR(102, 0xe6051066), /* PORT102CR */
+        PORTCR(103, 0xe6051067), /* PORT103CR */
+        PORTCR(104, 0xe6051068), /* PORT104CR */
+        PORTCR(105, 0xe6051069), /* PORT105CR */
+        PORTCR(106, 0xe605106a), /* PORT106CR */
+        PORTCR(107, 0xe605106b), /* PORT107CR */
+        PORTCR(108, 0xe605106c), /* PORT108CR */
+        PORTCR(109, 0xe605106d), /* PORT109CR */
+
+        PORTCR(110, 0xe605106e), /* PORT110CR */
+        PORTCR(111, 0xe605106f), /* PORT111CR */
+        PORTCR(112, 0xe6051070), /* PORT112CR */
+        PORTCR(113, 0xe6051071), /* PORT113CR */
+        PORTCR(114, 0xe6051072), /* PORT114CR */
+        PORTCR(115, 0xe6051073), /* PORT115CR */
+        PORTCR(116, 0xe6051074), /* PORT116CR */
+        PORTCR(117, 0xe6051075), /* PORT117CR */
+        PORTCR(118, 0xe6051076), /* PORT118CR */
+        PORTCR(119, 0xe6051077), /* PORT119CR */
+
+        PORTCR(120, 0xe6051078), /* PORT120CR */
+        PORTCR(121, 0xe6051079), /* PORT121CR */
+        PORTCR(122, 0xe605107a), /* PORT122CR */
+        PORTCR(123, 0xe605107b), /* PORT123CR */
+        PORTCR(124, 0xe605107c), /* PORT124CR */
+        PORTCR(125, 0xe605107d), /* PORT125CR */
+        PORTCR(126, 0xe605107e), /* PORT126CR */
+        PORTCR(127, 0xe605107f), /* PORT127CR */
+        PORTCR(128, 0xe6051080), /* PORT128CR */
+        PORTCR(129, 0xe6051081), /* PORT129CR */
+
+        PORTCR(130, 0xe6051082), /* PORT130CR */
+        PORTCR(131, 0xe6051083), /* PORT131CR */
+        PORTCR(132, 0xe6051084), /* PORT132CR */
+        PORTCR(133, 0xe6051085), /* PORT133CR */
+        PORTCR(134, 0xe6051086), /* PORT134CR */
+        PORTCR(135, 0xe6051087), /* PORT135CR */
+        PORTCR(136, 0xe6051088), /* PORT136CR */
+        PORTCR(137, 0xe6051089), /* PORT137CR */
+        PORTCR(138, 0xe605108a), /* PORT138CR */
+        PORTCR(139, 0xe605108b), /* PORT139CR */
+
+        PORTCR(140, 0xe605108c), /* PORT140CR */
+        PORTCR(141, 0xe605108d), /* PORT141CR */
+        PORTCR(142, 0xe605108e), /* PORT142CR */
+        PORTCR(143, 0xe605108f), /* PORT143CR */
+        PORTCR(144, 0xe6051090), /* PORT144CR */
+        PORTCR(145, 0xe6051091), /* PORT145CR */
+        PORTCR(146, 0xe6051092), /* PORT146CR */
+        PORTCR(147, 0xe6051093), /* PORT147CR */
+        PORTCR(148, 0xe6051094), /* PORT148CR */
+        PORTCR(149, 0xe6051095), /* PORT149CR */
+
+        PORTCR(150, 0xe6051096), /* PORT150CR */
+        PORTCR(151, 0xe6051097), /* PORT151CR */
+        PORTCR(152, 0xe6051098), /* PORT152CR */
+        PORTCR(153, 0xe6051099), /* PORT153CR */
+        PORTCR(154, 0xe605109a), /* PORT154CR */
+        PORTCR(155, 0xe605109b), /* PORT155CR */
+        PORTCR(156, 0xe605109c), /* PORT156CR */
+        PORTCR(157, 0xe605109d), /* PORT157CR */
+        PORTCR(158, 0xe605109e), /* PORT158CR */
+        PORTCR(159, 0xe605109f), /* PORT159CR */
+
+        PORTCR(160, 0xe60510a0), /* PORT160CR */
+        PORTCR(161, 0xe60510a1), /* PORT161CR */
+        PORTCR(162, 0xe60510a2), /* PORT162CR */
+        PORTCR(163, 0xe60510a3), /* PORT163CR */
+        PORTCR(164, 0xe60510a4), /* PORT164CR */
+        PORTCR(165, 0xe60510a5), /* PORT165CR */
+        PORTCR(166, 0xe60510a6), /* PORT166CR */
+        PORTCR(167, 0xe60510a7), /* PORT167CR */
+        PORTCR(168, 0xe60510a8), /* PORT168CR */
+        PORTCR(169, 0xe60510a9), /* PORT169CR */
+
+        PORTCR(170, 0xe60510aa), /* PORT170CR */
+        PORTCR(171, 0xe60510ab), /* PORT171CR */
+        PORTCR(172, 0xe60510ac), /* PORT172CR */
+        PORTCR(173, 0xe60510ad), /* PORT173CR */
+        PORTCR(174, 0xe60510ae), /* PORT174CR */
+        PORTCR(175, 0xe60520af), /* PORT175CR */
+        PORTCR(176, 0xe60520b0), /* PORT176CR */
+        PORTCR(177, 0xe60520b1), /* PORT177CR */
+        PORTCR(178, 0xe60520b2), /* PORT178CR */
+        PORTCR(179, 0xe60520b3), /* PORT179CR */
+
+        PORTCR(180, 0xe60520b4), /* PORT180CR */
+        PORTCR(181, 0xe60520b5), /* PORT181CR */
+        PORTCR(182, 0xe60520b6), /* PORT182CR */
+        PORTCR(183, 0xe60520b7), /* PORT183CR */
+        PORTCR(184, 0xe60520b8), /* PORT184CR */
+        PORTCR(185, 0xe60520b9), /* PORT185CR */
+        PORTCR(186, 0xe60520ba), /* PORT186CR */
+        PORTCR(187, 0xe60520bb), /* PORT187CR */
+        PORTCR(188, 0xe60520bc), /* PORT188CR */
+        PORTCR(189, 0xe60520bd), /* PORT189CR */
+
+        PORTCR(190, 0xe60520be), /* PORT190CR */
+        PORTCR(191, 0xe60520bf), /* PORT191CR */
+        PORTCR(192, 0xe60520c0), /* PORT192CR */
+        PORTCR(193, 0xe60520c1), /* PORT193CR */
+        PORTCR(194, 0xe60520c2), /* PORT194CR */
+        PORTCR(195, 0xe60520c3), /* PORT195CR */
+        PORTCR(196, 0xe60520c4), /* PORT196CR */
+        PORTCR(197, 0xe60520c5), /* PORT197CR */
+        PORTCR(198, 0xe60520c6), /* PORT198CR */
+        PORTCR(199, 0xe60520c7), /* PORT199CR */
+
+        PORTCR(200, 0xe60520c8), /* PORT200CR */
+        PORTCR(201, 0xe60520c9), /* PORT201CR */
+        PORTCR(202, 0xe60520ca), /* PORT202CR */
+        PORTCR(203, 0xe60520cb), /* PORT203CR */
+        PORTCR(204, 0xe60520cc), /* PORT204CR */
+        PORTCR(205, 0xe60520cd), /* PORT205CR */
+        PORTCR(206, 0xe60520ce), /* PORT206CR */
+        PORTCR(207, 0xe60520cf), /* PORT207CR */
+        PORTCR(208, 0xe60520d0), /* PORT208CR */
+        PORTCR(209, 0xe60520d1), /* PORT209CR */
+
+        PORTCR(210, 0xe60520d2), /* PORT210CR */
+        PORTCR(211, 0xe60520d3), /* PORT211CR */
+        PORTCR(212, 0xe60520d4), /* PORT212CR */
+        PORTCR(213, 0xe60520d5), /* PORT213CR */
+        PORTCR(214, 0xe60520d6), /* PORT214CR */
+        PORTCR(215, 0xe60520d7), /* PORT215CR */
+        PORTCR(216, 0xe60520d8), /* PORT216CR */
+        PORTCR(217, 0xe60520d9), /* PORT217CR */
+        PORTCR(218, 0xe60520da), /* PORT218CR */
+        PORTCR(219, 0xe60520db), /* PORT219CR */
+
+        PORTCR(220, 0xe60520dc), /* PORT220CR */
+        PORTCR(221, 0xe60520dd), /* PORT221CR */
+        PORTCR(222, 0xe60520de), /* PORT222CR */
+        PORTCR(223, 0xe60520df), /* PORT223CR */
+        PORTCR(224, 0xe60520e0), /* PORT224CR */
+        PORTCR(225, 0xe60520e1), /* PORT225CR */
+        PORTCR(226, 0xe60520e2), /* PORT226CR */
+        PORTCR(227, 0xe60520e3), /* PORT227CR */
+        PORTCR(228, 0xe60520e4), /* PORT228CR */
+        PORTCR(229, 0xe60520e5), /* PORT229CR */
+
+        PORTCR(230, 0xe60520e6), /* PORT230CR */
+        PORTCR(231, 0xe60520e7), /* PORT231CR */
+        PORTCR(232, 0xe60520e8), /* PORT232CR */
+        PORTCR(233, 0xe60520e9), /* PORT233CR */
+        PORTCR(234, 0xe60520ea), /* PORT234CR */
+        PORTCR(235, 0xe60520eb), /* PORT235CR */
+        PORTCR(236, 0xe60530ec), /* PORT236CR */
+        PORTCR(237, 0xe60530ed), /* PORT237CR */
+        PORTCR(238, 0xe60530ee), /* PORT238CR */
+        PORTCR(239, 0xe60530ef), /* PORT239CR */
+
+        PORTCR(240, 0xe60530f0), /* PORT240CR */
+        PORTCR(241, 0xe60530f1), /* PORT241CR */
+        PORTCR(242, 0xe60530f2), /* PORT242CR */
+        PORTCR(243, 0xe60530f3), /* PORT243CR */
+        PORTCR(244, 0xe60530f4), /* PORT244CR */
+        PORTCR(245, 0xe60530f5), /* PORT245CR */
+        PORTCR(246, 0xe60530f6), /* PORT246CR */
+        PORTCR(247, 0xe60530f7), /* PORT247CR */
+        PORTCR(248, 0xe60530f8), /* PORT248CR */
+        PORTCR(249, 0xe60530f9), /* PORT249CR */
+
+        PORTCR(250, 0xe60530fa), /* PORT250CR */
+        PORTCR(251, 0xe60530fb), /* PORT251CR */
+        PORTCR(252, 0xe60530fc), /* PORT252CR */
+        PORTCR(253, 0xe60530fd), /* PORT253CR */
+        PORTCR(254, 0xe60530fe), /* PORT254CR */
+        PORTCR(255, 0xe60530ff), /* PORT255CR */
+        PORTCR(256, 0xe6053100), /* PORT256CR */
+        PORTCR(257, 0xe6053101), /* PORT257CR */
+        PORTCR(258, 0xe6053102), /* PORT258CR */
+        PORTCR(259, 0xe6053103), /* PORT259CR */
+
+        PORTCR(260, 0xe6053104), /* PORT260CR */
+        PORTCR(261, 0xe6053105), /* PORT261CR */
+        PORTCR(262, 0xe6053106), /* PORT262CR */
+        PORTCR(263, 0xe6053107), /* PORT263CR */
+        PORTCR(264, 0xe6053108), /* PORT264CR */
+        PORTCR(265, 0xe6053109), /* PORT265CR */
+        PORTCR(266, 0xe605310a), /* PORT266CR */
+        PORTCR(267, 0xe605310b), /* PORT267CR */
+        PORTCR(268, 0xe605310c), /* PORT268CR */
+        PORTCR(269, 0xe605310d), /* PORT269CR */
+
+        PORTCR(270, 0xe605310e), /* PORT270CR */
+        PORTCR(271, 0xe605310f), /* PORT271CR */
+        PORTCR(272, 0xe6053110), /* PORT272CR */
+
+        { PINMUX_CFG_REG("MSELBCR", 0xe6058024, 32, 1) {
+                0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+                0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+                0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+                0, 0,
+                0, 0,
+                0, 0,
+                0, 0,
+                0, 0,
+                MSELBCR_MSEL2_0, MSELBCR_MSEL2_1,
+                0, 0,
+                0, 0 }
+        },
+        { },
+};
+
+static struct pinmux_data_reg pinmux_data_regs[] = {
+        { PINMUX_DATA_REG("PORTL031_000DR", 0xe6054000, 32) {
+                PORT31_DATA, PORT30_DATA, PORT29_DATA, PORT28_DATA,
+                PORT27_DATA, PORT26_DATA, PORT25_DATA, PORT24_DATA,
+                PORT23_DATA, PORT22_DATA, PORT21_DATA, PORT20_DATA,
+                PORT19_DATA, PORT18_DATA, PORT17_DATA, PORT16_DATA,
+                PORT15_DATA, PORT14_DATA, PORT13_DATA, PORT12_DATA,
+                PORT11_DATA, PORT10_DATA, PORT9_DATA, PORT8_DATA,
+                PORT7_DATA, PORT6_DATA, PORT5_DATA, PORT4_DATA,
+                PORT3_DATA, PORT2_DATA, PORT1_DATA, PORT0_DATA }
+        },
+        { PINMUX_DATA_REG("PORTL063_032DR", 0xe6054004, 32) {
+                PORT63_DATA, PORT62_DATA, PORT61_DATA, PORT60_DATA,
+                PORT59_DATA, PORT58_DATA, PORT57_DATA, PORT56_DATA,
+                PORT55_DATA, PORT54_DATA, PORT53_DATA, PORT52_DATA,
+                PORT51_DATA, PORT50_DATA, PORT49_DATA, PORT48_DATA,
+                PORT47_DATA, PORT46_DATA, PORT45_DATA, PORT44_DATA,
+                PORT43_DATA, PORT42_DATA, PORT41_DATA, PORT40_DATA,
+                PORT39_DATA, PORT38_DATA, PORT37_DATA, PORT36_DATA,
+                PORT35_DATA, PORT34_DATA, PORT33_DATA, PORT32_DATA }
+        },
+        { PINMUX_DATA_REG("PORTL095_064DR", 0xe6054008, 32) {
+                PORT95_DATA, PORT94_DATA, PORT93_DATA, PORT92_DATA,
+                PORT91_DATA, PORT90_DATA, PORT89_DATA, PORT88_DATA,
+                PORT87_DATA, PORT86_DATA, PORT85_DATA, PORT84_DATA,
+                PORT83_DATA, PORT82_DATA, PORT81_DATA, PORT80_DATA,
+                PORT79_DATA, PORT78_DATA, PORT77_DATA, PORT76_DATA,
+                PORT75_DATA, PORT74_DATA, PORT73_DATA, PORT72_DATA,
+                PORT71_DATA, PORT70_DATA, PORT69_DATA, PORT68_DATA,
+                PORT67_DATA, PORT66_DATA, PORT65_DATA, PORT64_DATA }
+        },
+        { PINMUX_DATA_REG("PORTD127_096DR", 0xe6055004, 32) {
+                PORT127_DATA, PORT126_DATA, PORT125_DATA, PORT124_DATA,
+                PORT123_DATA, PORT122_DATA, PORT121_DATA, PORT120_DATA,
+                PORT119_DATA, PORT118_DATA, PORT117_DATA, PORT116_DATA,
+                PORT115_DATA, PORT114_DATA, PORT113_DATA, PORT112_DATA,
+                PORT111_DATA, PORT110_DATA, PORT109_DATA, PORT108_DATA,
+                PORT107_DATA, PORT106_DATA, PORT105_DATA, PORT104_DATA,
+                PORT103_DATA, PORT102_DATA, PORT101_DATA, PORT100_DATA,
+                PORT99_DATA, PORT98_DATA, PORT97_DATA, PORT96_DATA }
+        },
+        { PINMUX_DATA_REG("PORTD159_128DR", 0xe6055008, 32) {
+                PORT159_DATA, PORT158_DATA, PORT157_DATA, PORT156_DATA,
+                PORT155_DATA, PORT154_DATA, PORT153_DATA, PORT152_DATA,
+                PORT151_DATA, PORT150_DATA, PORT149_DATA, PORT148_DATA,
+                PORT147_DATA, PORT146_DATA, PORT145_DATA, PORT144_DATA,
+                PORT143_DATA, PORT142_DATA, PORT141_DATA, PORT140_DATA,
+                PORT139_DATA, PORT138_DATA, PORT137_DATA, PORT136_DATA,
+                PORT135_DATA, PORT134_DATA, PORT133_DATA, PORT132_DATA,
+                PORT131_DATA, PORT130_DATA, PORT129_DATA, PORT128_DATA }
+        },
+        { PINMUX_DATA_REG("PORTR191_160DR", 0xe6056000, 32) {
+                PORT191_DATA, PORT190_DATA, PORT189_DATA, PORT188_DATA,
+                PORT187_DATA, PORT186_DATA, PORT185_DATA, PORT184_DATA,
+                PORT183_DATA, PORT182_DATA, PORT181_DATA, PORT180_DATA,
+                PORT179_DATA, PORT178_DATA, PORT177_DATA, PORT176_DATA,
+                PORT175_DATA, PORT174_DATA, PORT173_DATA, PORT172_DATA,
+                PORT171_DATA, PORT170_DATA, PORT169_DATA, PORT168_DATA,
+                PORT167_DATA, PORT166_DATA, PORT165_DATA, PORT164_DATA,
+                PORT163_DATA, PORT162_DATA, PORT161_DATA, PORT160_DATA }
+        },
+        { PINMUX_DATA_REG("PORTR223_192DR", 0xe6056004, 32) {
+                PORT223_DATA, PORT222_DATA, PORT221_DATA, PORT220_DATA,
+                PORT219_DATA, PORT218_DATA, PORT217_DATA, PORT216_DATA,
+                PORT215_DATA, PORT214_DATA, PORT213_DATA, PORT212_DATA,
+                PORT211_DATA, PORT210_DATA, PORT209_DATA, PORT208_DATA,
+                PORT207_DATA, PORT206_DATA, PORT205_DATA, PORT204_DATA,
+                PORT203_DATA, PORT202_DATA, PORT201_DATA, PORT200_DATA,
+                PORT199_DATA, PORT198_DATA, PORT197_DATA, PORT196_DATA,
+                PORT195_DATA, PORT194_DATA, PORT193_DATA, PORT192_DATA }
+        },
+        { PINMUX_DATA_REG("PORTU255_224DR", 0xe6057000, 32) {
+                PORT255_DATA, PORT254_DATA, PORT253_DATA, PORT252_DATA,
+                PORT251_DATA, PORT250_DATA, PORT249_DATA, PORT248_DATA,
+                PORT247_DATA, PORT246_DATA, PORT245_DATA, PORT244_DATA,
+                PORT243_DATA, PORT242_DATA, PORT241_DATA, PORT240_DATA,
+                PORT239_DATA, PORT238_DATA, PORT237_DATA, PORT236_DATA,
+                PORT235_DATA, PORT234_DATA, PORT233_DATA, PORT232_DATA,
+                PORT231_DATA, PORT230_DATA, PORT229_DATA, PORT228_DATA,
+                PORT227_DATA, PORT226_DATA, PORT225_DATA, PORT224_DATA }
+        },
+        { PINMUX_DATA_REG("PORTU287_256DR", 0xe6057004, 32) {
+                0, 0, 0, 0,
+                0, 0, 0, 0,
+                0, 0, 0, 0,
+                0, 0, 0, PORT272_DATA,
+                PORT271_DATA, PORT270_DATA, PORT269_DATA, PORT268_DATA,
+                PORT267_DATA, PORT266_DATA, PORT265_DATA, PORT264_DATA,
+                PORT263_DATA, PORT262_DATA, PORT261_DATA, PORT260_DATA,
+                PORT259_DATA, PORT258_DATA, PORT257_DATA, PORT256_DATA }
+        },
+        { },
+};
+
+static struct pinmux_info sh7367_pinmux_info = {
+        .name = "sh7367_pfc",
+        .reserved_id = PINMUX_RESERVED,
+        .data = { PINMUX_DATA_BEGIN, PINMUX_DATA_END },
+        .input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END },
+        .input_pu = { PINMUX_INPUT_PULLUP_BEGIN, PINMUX_INPUT_PULLUP_END },
+        .input_pd = { PINMUX_INPUT_PULLDOWN_BEGIN, PINMUX_INPUT_PULLDOWN_END },
+        .output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END },
+        .mark = { PINMUX_MARK_BEGIN, PINMUX_MARK_END },
+        .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
+
+        .first_gpio = GPIO_PORT0,
+        .last_gpio = GPIO_FN_DIVLOCK,
+
+        .gpios = pinmux_gpios,
+        .cfg_regs = pinmux_config_regs,
+        .data_regs = pinmux_data_regs,
+
+        .gpio_data = pinmux_data,
+        .gpio_data_size = ARRAY_SIZE(pinmux_data),
+};
+
+void sh7367_pinmux_init(void)
+{
+        register_pinmux(&sh7367_pinmux_info);
+}
diff --git a/arch/arm/mach-shmobile/pfc-sh7372.c b/arch/arm/mach-shmobile/pfc-sh7372.c
new file mode 100644
index 000000000000..9557d0964d73
--- /dev/null
+++ b/arch/arm/mach-shmobile/pfc-sh7372.c
@@ -0,0 +1,1637 @@
+/*
+ * sh7372 processor support - PFC hardware block
+ *
+ * Copyright (C) 2010  Kuninori Morimoto <morimoto.kuninori@renesas.com>
+ *
+ * Based on
+ * sh7367 processor support - PFC hardware block
+ * Copyright (C) 2010  Magnus Damm
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/gpio.h>
+#include <mach/sh7372.h>
+
+#define _1(fn, pfx, sfx) fn(pfx, sfx)
+
+#define _10(fn, pfx, sfx)                               \
+        _1(fn, pfx##0, sfx), _1(fn, pfx##1, sfx),       \
+        _1(fn, pfx##2, sfx), _1(fn, pfx##3, sfx),       \
+        _1(fn, pfx##4, sfx), _1(fn, pfx##5, sfx),       \
+        _1(fn, pfx##6, sfx), _1(fn, pfx##7, sfx),       \
+        _1(fn, pfx##8, sfx), _1(fn, pfx##9, sfx)
+
+#define _80(fn, pfx, sfx)                               \
+        _10(fn, pfx##1, sfx),   _10(fn, pfx##2, sfx),   \
+        _10(fn, pfx##3, sfx),   _10(fn, pfx##4, sfx),   \
+        _10(fn, pfx##5, sfx),   _10(fn, pfx##6, sfx),   \
+        _10(fn, pfx##7, sfx),   _10(fn, pfx##8, sfx)
+
+#define _190(fn, pfx, sfx) \
+        _10(fn, pfx, sfx), _80(fn, pfx, sfx), _10(fn, pfx##9, sfx), \
+        _10(fn, pfx##10, sfx), _80(fn, pfx##1, sfx), _1(fn, pfx##190, sfx)
+
+#define _PORT(pfx, sfx) pfx##_##sfx
+#define PORT_ALL(str) _190(_PORT, PORT, str)
+
+enum {
+        PINMUX_RESERVED = 0,
+
+        /* PORT0_DATA -> PORT190_DATA */
+        PINMUX_DATA_BEGIN,
+        PORT_ALL(DATA),
+        PINMUX_DATA_END,
+
+        /* PORT0_IN -> PORT190_IN */
+        PINMUX_INPUT_BEGIN,
+        PORT_ALL(IN),
+        PINMUX_INPUT_END,
+
+        /* PORT0_IN_PU -> PORT190_IN_PU */
+        PINMUX_INPUT_PULLUP_BEGIN,
+        PORT_ALL(IN_PU),
+        PINMUX_INPUT_PULLUP_END,
+
+        /* PORT0_IN_PD -> PORT190_IN_PD */
+        PINMUX_INPUT_PULLDOWN_BEGIN,
+        PORT_ALL(IN_PD),
+        PINMUX_INPUT_PULLDOWN_END,
+
+        /* PORT0_OUT -> PORT190_OUT */
+        PINMUX_OUTPUT_BEGIN,
+        PORT_ALL(OUT),
+        PINMUX_OUTPUT_END,
+
+        PINMUX_FUNCTION_BEGIN,
+        PORT_ALL(FN_IN),        /* PORT0_FN_IN  -> PORT190_FN_IN */
+        PORT_ALL(FN_OUT),       /* PORT0_FN_OUT -> PORT190_FN_OUT */
+        PORT_ALL(FN0),          /* PORT0_FN0    -> PORT190_FN0 */
+        PORT_ALL(FN1),          /* PORT0_FN1    -> PORT190_FN1 */
+        PORT_ALL(FN2),          /* PORT0_FN2    -> PORT190_FN2 */
+        PORT_ALL(FN3),          /* PORT0_FN3    -> PORT190_FN3 */
+        PORT_ALL(FN4),          /* PORT0_FN4    -> PORT190_FN4 */
+        PORT_ALL(FN5),          /* PORT0_FN5    -> PORT190_FN5 */
+        PORT_ALL(FN6),          /* PORT0_FN6    -> PORT190_FN6 */
+        PORT_ALL(FN7),          /* PORT0_FN7    -> PORT190_FN7 */
+
+        MSEL1CR_31_0,   MSEL1CR_31_1,
+        MSEL1CR_30_0,   MSEL1CR_30_1,
+        MSEL1CR_29_0,   MSEL1CR_29_1,
+        MSEL1CR_28_0,   MSEL1CR_28_1,
+        MSEL1CR_27_0,   MSEL1CR_27_1,
+        MSEL1CR_26_0,   MSEL1CR_26_1,
+        MSEL1CR_16_0,   MSEL1CR_16_1,
+        MSEL1CR_15_0,   MSEL1CR_15_1,
+        MSEL1CR_14_0,   MSEL1CR_14_1,
+        MSEL1CR_13_0,   MSEL1CR_13_1,
+        MSEL1CR_12_0,   MSEL1CR_12_1,
+        MSEL1CR_9_0,    MSEL1CR_9_1,
+        MSEL1CR_8_0,    MSEL1CR_8_1,
+        MSEL1CR_7_0,    MSEL1CR_7_1,
+        MSEL1CR_6_0,    MSEL1CR_6_1,
+        MSEL1CR_4_0,    MSEL1CR_4_1,
+        MSEL1CR_3_0,    MSEL1CR_3_1,
+        MSEL1CR_2_0,    MSEL1CR_2_1,
+        MSEL1CR_0_0,    MSEL1CR_0_1,
+
+        MSEL3CR_27_0,   MSEL3CR_27_1,
+        MSEL3CR_26_0,   MSEL3CR_26_1,
+        MSEL3CR_21_0,   MSEL3CR_21_1,
+        MSEL3CR_20_0,   MSEL3CR_20_1,
+        MSEL3CR_15_0,   MSEL3CR_15_1,
+        MSEL3CR_9_0,    MSEL3CR_9_1,
+        MSEL3CR_6_0,    MSEL3CR_6_1,
+
+        MSEL4CR_19_0,   MSEL4CR_19_1,
+        MSEL4CR_18_0,   MSEL4CR_18_1,
+        MSEL4CR_17_0,   MSEL4CR_17_1,
+        MSEL4CR_16_0,   MSEL4CR_16_1,
+        MSEL4CR_15_0,   MSEL4CR_15_1,
+        MSEL4CR_14_0,   MSEL4CR_14_1,
+        MSEL4CR_10_0,   MSEL4CR_10_1,
+        MSEL4CR_6_0,    MSEL4CR_6_1,
+        MSEL4CR_4_0,    MSEL4CR_4_1,
+        MSEL4CR_1_0,    MSEL4CR_1_1,
+        PINMUX_FUNCTION_END,
+
+        PINMUX_MARK_BEGIN,
+
+        /* IRQ */
+        IRQ0_6_MARK,    IRQ0_162_MARK,  IRQ1_MARK,      IRQ2_4_MARK,
+        IRQ2_5_MARK,    IRQ3_8_MARK,    IRQ3_16_MARK,   IRQ4_17_MARK,
+        IRQ4_163_MARK,  IRQ5_MARK,      IRQ6_39_MARK,   IRQ6_164_MARK,
+        IRQ7_40_MARK,   IRQ7_167_MARK,  IRQ8_41_MARK,   IRQ8_168_MARK,
+        IRQ9_42_MARK,   IRQ9_169_MARK,  IRQ10_MARK,     IRQ11_MARK,
+        IRQ12_80_MARK,  IRQ12_137_MARK, IRQ13_81_MARK,  IRQ13_145_MARK,
+        IRQ14_82_MARK,  IRQ14_146_MARK, IRQ15_83_MARK,  IRQ15_147_MARK,
+        IRQ16_84_MARK,  IRQ16_170_MARK, IRQ17_MARK,     IRQ18_MARK,
+        IRQ19_MARK,     IRQ20_MARK,     IRQ21_MARK,     IRQ22_MARK,
+        IRQ23_MARK,     IRQ24_MARK,     IRQ25_MARK,     IRQ26_121_MARK,
+        IRQ26_172_MARK, IRQ27_122_MARK, IRQ27_180_MARK, IRQ28_123_MARK,
+        IRQ28_181_MARK, IRQ29_129_MARK, IRQ29_182_MARK, IRQ30_130_MARK,
+        IRQ30_183_MARK, IRQ31_138_MARK, IRQ31_184_MARK,
+
+        /* MSIOF0 */
+        MSIOF0_TSYNC_MARK,      MSIOF0_TSCK_MARK,       MSIOF0_RXD_MARK,
+        MSIOF0_RSCK_MARK,       MSIOF0_RSYNC_MARK,      MSIOF0_MCK0_MARK,
+        MSIOF0_MCK1_MARK,       MSIOF0_SS1_MARK,        MSIOF0_SS2_MARK,
+        MSIOF0_TXD_MARK,
+
+        /* MSIOF1 */
+        MSIOF1_TSCK_39_MARK,    MSIOF1_TSYNC_40_MARK,
+        MSIOF1_TSCK_88_MARK,    MSIOF1_TSYNC_89_MARK,
+        MSIOF1_TXD_41_MARK,     MSIOF1_RXD_42_MARK,
+        MSIOF1_TXD_90_MARK,     MSIOF1_RXD_91_MARK,
+        MSIOF1_SS1_43_MARK,     MSIOF1_SS2_44_MARK,
+        MSIOF1_SS1_92_MARK,     MSIOF1_SS2_93_MARK,
+        MSIOF1_RSCK_MARK,       MSIOF1_RSYNC_MARK,
+        MSIOF1_MCK0_MARK,       MSIOF1_MCK1_MARK,
+
+        /* MSIOF2 */
+        MSIOF2_RSCK_MARK,       MSIOF2_RSYNC_MARK,      MSIOF2_MCK0_MARK,
+        MSIOF2_MCK1_MARK,       MSIOF2_SS1_MARK,        MSIOF2_SS2_MARK,
+        MSIOF2_TSYNC_MARK,      MSIOF2_TSCK_MARK,       MSIOF2_RXD_MARK,
+        MSIOF2_TXD_MARK,
+
+        /* MSIOF3 */
+        BBIF1_RXD_MARK,         BBIF1_TSYNC_MARK,       BBIF1_TSCK_MARK,
+        BBIF1_TXD_MARK,         BBIF1_RSCK_MARK,        BBIF1_RSYNC_MARK,
+        BBIF1_FLOW_MARK,        BB_RX_FLOW_N_MARK,
+
+        /* MSIOF4 */
+        BBIF2_TSCK1_MARK,       BBIF2_TSYNC1_MARK,
+        BBIF2_TXD1_MARK,        BBIF2_RXD_MARK,
+
+        /* FSI */
+        FSIACK_MARK,    FSIBCK_MARK,            FSIAILR_MARK,   FSIAIBT_MARK,
+        FSIAISLD_MARK,  FSIAOMC_MARK,           FSIAOLR_MARK,   FSIAOBT_MARK,
+        FSIAOSLD_MARK,  FSIASPDIF_11_MARK,      FSIASPDIF_15_MARK,
+
+        /* FMSI */
+        FMSOCK_MARK,    FMSOOLR_MARK,   FMSIOLR_MARK,   FMSOOBT_MARK,
+        FMSIOBT_MARK,   FMSOSLD_MARK,   FMSOILR_MARK,   FMSIILR_MARK,
+        FMSOIBT_MARK,   FMSIIBT_MARK,   FMSISLD_MARK,   FMSICK_MARK,
+
+        /* SCIFA0 */
+        SCIFA0_TXD_MARK,        SCIFA0_RXD_MARK,        SCIFA0_SCK_MARK,
+        SCIFA0_RTS_MARK,        SCIFA0_CTS_MARK,
+
+        /* SCIFA1 */
+        SCIFA1_TXD_MARK,        SCIFA1_RXD_MARK,        SCIFA1_SCK_MARK,
+        SCIFA1_RTS_MARK,        SCIFA1_CTS_MARK,
+
+        /* SCIFA2 */
+        SCIFA2_CTS1_MARK,       SCIFA2_RTS1_MARK,       SCIFA2_TXD1_MARK,
+        SCIFA2_RXD1_MARK,       SCIFA2_SCK1_MARK,
+
+        /* SCIFA3 */
+        SCIFA3_CTS_43_MARK,     SCIFA3_CTS_140_MARK,    SCIFA3_RTS_44_MARK,
+        SCIFA3_RTS_141_MARK,    SCIFA3_SCK_MARK,        SCIFA3_TXD_MARK,
+        SCIFA3_RXD_MARK,
+
+        /* SCIFA4 */
+        SCIFA4_RXD_MARK,        SCIFA4_TXD_MARK,
+
+        /* SCIFA5 */
+        SCIFA5_RXD_MARK,        SCIFA5_TXD_MARK,
+
+        /* SCIFB */
+        SCIFB_SCK_MARK, SCIFB_RTS_MARK, SCIFB_CTS_MARK,
+        SCIFB_TXD_MARK, SCIFB_RXD_MARK,
+
+        /* CEU */
+        VIO_HD_MARK,    VIO_CKO1_MARK,  VIO_CKO2_MARK,  VIO_VD_MARK,
+        VIO_CLK_MARK,   VIO_FIELD_MARK, VIO_CKO_MARK,
+        VIO_D0_MARK,    VIO_D1_MARK,    VIO_D2_MARK,    VIO_D3_MARK,
+        VIO_D4_MARK,    VIO_D5_MARK,    VIO_D6_MARK,    VIO_D7_MARK,
+        VIO_D8_MARK,    VIO_D9_MARK,    VIO_D10_MARK,   VIO_D11_MARK,
+        VIO_D12_MARK,   VIO_D13_MARK,   VIO_D14_MARK,   VIO_D15_MARK,
+
+        /* USB0 */
+        IDIN_0_MARK,    EXTLP_0_MARK,   OVCN2_0_MARK,   PWEN_0_MARK,
+        OVCN_0_MARK,    VBUS0_0_MARK,
+
+        /* USB1 */
+        IDIN_1_18_MARK,         IDIN_1_113_MARK,
+        PWEN_1_115_MARK,        PWEN_1_138_MARK,
+        OVCN_1_114_MARK,        OVCN_1_162_MARK,
+        EXTLP_1_MARK,           OVCN2_1_MARK,
+        VBUS0_1_MARK,
+
+        /* GPIO */
+        GPI0_MARK,      GPI1_MARK,      GPO0_MARK,      GPO1_MARK,
+
+        /* BSC */
+        BS_MARK,        WE1_MARK,
+        CKO_MARK,       WAIT_MARK,      RDWR_MARK,
+
+        A0_MARK,        A1_MARK,        A2_MARK,        A3_MARK,
+        A6_MARK,        A7_MARK,        A8_MARK,        A9_MARK,
+        A10_MARK,       A11_MARK,       A12_MARK,       A13_MARK,
+        A14_MARK,       A15_MARK,       A16_MARK,       A17_MARK,
+        A18_MARK,       A19_MARK,       A20_MARK,       A21_MARK,
+        A22_MARK,       A23_MARK,       A24_MARK,       A25_MARK,
+        A26_MARK,
+
+        CS0_MARK,       CS2_MARK,       CS4_MARK,
+        CS5A_MARK,      CS5B_MARK,      CS6A_MARK,
+
+        /* BSC/FLCTL */
+        RD_FSC_MARK,    WE0_FWE_MARK,   A4_FOE_MARK,    A5_FCDE_MARK,
+        D0_NAF0_MARK,   D1_NAF1_MARK,   D2_NAF2_MARK,   D3_NAF3_MARK,
+        D4_NAF4_MARK,   D5_NAF5_MARK,   D6_NAF6_MARK,   D7_NAF7_MARK,
+        D8_NAF8_MARK,   D9_NAF9_MARK,   D10_NAF10_MARK, D11_NAF11_MARK,
+        D12_NAF12_MARK, D13_NAF13_MARK, D14_NAF14_MARK, D15_NAF15_MARK,
+
+        /* MMCIF(1) */
+        MMCD0_0_MARK,   MMCD0_1_MARK,   MMCD0_2_MARK,   MMCD0_3_MARK,
+        MMCD0_4_MARK,   MMCD0_5_MARK,   MMCD0_6_MARK,   MMCD0_7_MARK,
+        MMCCMD0_MARK,   MMCCLK0_MARK,
+
+        /* MMCIF(2) */
+        MMCD1_0_MARK,   MMCD1_1_MARK,   MMCD1_2_MARK,   MMCD1_3_MARK,
+        MMCD1_4_MARK,   MMCD1_5_MARK,   MMCD1_6_MARK,   MMCD1_7_MARK,
+        MMCCLK1_MARK,   MMCCMD1_MARK,
+
+        /* SPU2 */
+        VINT_I_MARK,
+
+        /* FLCTL */
+        FCE1_MARK,      FCE0_MARK,      FRB_MARK,
+
+        /* HSI */
+        GP_RX_FLAG_MARK,        GP_RX_DATA_MARK,        GP_TX_READY_MARK,
+        GP_RX_WAKE_MARK,        MP_TX_FLAG_MARK,        MP_TX_DATA_MARK,
+        MP_RX_READY_MARK,       MP_TX_WAKE_MARK,
+
+        /* MFI */
+        MFIv6_MARK,
+        MFIv4_MARK,
+
+        MEMC_CS0_MARK,                  MEMC_BUSCLK_MEMC_A0_MARK,
+        MEMC_CS1_MEMC_A1_MARK,          MEMC_ADV_MEMC_DREQ0_MARK,
+        MEMC_WAIT_MEMC_DREQ1_MARK,      MEMC_NOE_MARK,
+        MEMC_NWE_MARK,                  MEMC_INT_MARK,
+
+        MEMC_AD0_MARK,  MEMC_AD1_MARK,  MEMC_AD2_MARK,
+        MEMC_AD3_MARK,  MEMC_AD4_MARK,  MEMC_AD5_MARK,
+        MEMC_AD6_MARK,  MEMC_AD7_MARK,  MEMC_AD8_MARK,
+        MEMC_AD9_MARK,  MEMC_AD10_MARK, MEMC_AD11_MARK,
+        MEMC_AD12_MARK, MEMC_AD13_MARK, MEMC_AD14_MARK,
+        MEMC_AD15_MARK,
+
+        /* SIM */
+        SIM_RST_MARK,   SIM_CLK_MARK,   SIM_D_MARK,
+
+        /* TPU */
+        TPU0TO0_MARK,           TPU0TO1_MARK,
+        TPU0TO2_93_MARK,        TPU0TO2_99_MARK,
+        TPU0TO3_MARK,
+
+        /* I2C2 */
+        I2C_SCL2_MARK,  I2C_SDA2_MARK,
+
+        /* I2C3(1) */
+        I2C_SCL3_MARK,  I2C_SDA3_MARK,
+
+        /* I2C3(2) */
+        I2C_SCL3S_MARK, I2C_SDA3S_MARK,
+
+        /* I2C4(2) */
+        I2C_SCL4_MARK,  I2C_SDA4_MARK,
+
+        /* I2C4(2) */
+        I2C_SCL4S_MARK, I2C_SDA4S_MARK,
+
+        /* KEYSC */
+        KEYOUT0_MARK,   KEYIN0_121_MARK,        KEYIN0_136_MARK,
+        KEYOUT1_MARK,   KEYIN1_122_MARK,        KEYIN1_135_MARK,
+        KEYOUT2_MARK,   KEYIN2_123_MARK,        KEYIN2_134_MARK,
+        KEYOUT3_MARK,   KEYIN3_124_MARK,        KEYIN3_133_MARK,
+        KEYOUT4_MARK,   KEYIN4_MARK,
+        KEYOUT5_MARK,   KEYIN5_MARK,
+        KEYOUT6_MARK,   KEYIN6_MARK,
+        KEYOUT7_MARK,   KEYIN7_MARK,
+
+        /* LCDC */
+        LCDC0_SELECT_MARK,
+        LCDC1_SELECT_MARK,
+        LCDHSYN_MARK,   LCDCS_MARK,     LCDVSYN_MARK,   LCDDCK_MARK,
+        LCDWR_MARK,     LCDRD_MARK,     LCDDISP_MARK,   LCDRS_MARK,
+        LCDLCLK_MARK,   LCDDON_MARK,
+
+        LCDD0_MARK,     LCDD1_MARK,     LCDD2_MARK,     LCDD3_MARK,
+        LCDD4_MARK,     LCDD5_MARK,     LCDD6_MARK,     LCDD7_MARK,
+        LCDD8_MARK,     LCDD9_MARK,     LCDD10_MARK,    LCDD11_MARK,
+        LCDD12_MARK,    LCDD13_MARK,    LCDD14_MARK,    LCDD15_MARK,
+        LCDD16_MARK,    LCDD17_MARK,    LCDD18_MARK,    LCDD19_MARK,
+        LCDD20_MARK,    LCDD21_MARK,    LCDD22_MARK,    LCDD23_MARK,
+
+        /* IRDA */
+        IRDA_OUT_MARK,  IRDA_IN_MARK,   IRDA_FIRSEL_MARK,
+        IROUT_139_MARK, IROUT_140_MARK,
+
+        /* TSIF1 */
+        TS0_1SELECT_MARK,
+        TS0_2SELECT_MARK,
+        TS1_1SELECT_MARK,
+        TS1_2SELECT_MARK,
+
+        TS_SPSYNC1_MARK,        TS_SDAT1_MARK,
+        TS_SDEN1_MARK,          TS_SCK1_MARK,
+
+        /* TSIF2 */
+        TS_SPSYNC2_MARK,        TS_SDAT2_MARK,
+        TS_SDEN2_MARK,          TS_SCK2_MARK,
+
+        /* HDMI */
+        HDMI_HPD_MARK,  HDMI_CEC_MARK,
+
+        /* SDHI0 */
+        SDHICLK0_MARK,  SDHICD0_MARK,
+        SDHICMD0_MARK,  SDHIWP0_MARK,
+        SDHID0_0_MARK,  SDHID0_1_MARK,
+        SDHID0_2_MARK,  SDHID0_3_MARK,
+
+        /* SDHI1 */
+        SDHICLK1_MARK,  SDHICMD1_MARK,  SDHID1_0_MARK,
+        SDHID1_1_MARK,  SDHID1_2_MARK,  SDHID1_3_MARK,
+
+        /* SDHI2 */
+        SDHICLK2_MARK,  SDHICMD2_MARK,  SDHID2_0_MARK,
+        SDHID2_1_MARK,  SDHID2_2_MARK,  SDHID2_3_MARK,
+
+        /* SDENC */
+        SDENC_CPG_MARK,
+        SDENC_DV_CLKI_MARK,
+
+        PINMUX_MARK_END,
+};
+
+/* PORT_DATA_I_PD(nr) */
+#define _I___D(nr)                           \
+        PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
+                    PORT##nr##_IN, PORT##nr##_IN_PD)
+
+/* PORT_DATA_I_PU(nr) */
+#define _I__U_(nr)                           \
+        PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
+                    PORT##nr##_IN, PORT##nr##_IN_PU)
+
+/* PORT_DATA_I_PU_PD(nr) */
+#define _I__UD(nr)                           \
+        PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
+                    PORT##nr##_IN, PORT##nr##_IN_PD, PORT##nr##_IN_PU)
+
+/* PORT_DATA_O(nr) */
+#define __O___(nr)                                                      \
+        PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT)
+
+/* PORT_DATA_IO(nr) */
+#define _IO___(nr)                                   \
+        PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT, \
+                    PORT##nr##_IN)
+
+/* PORT_DATA_IO_PD(nr) */
+#define _IO__D(nr)                                           \
+        PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT, \
+                    PORT##nr##_IN, PORT##nr##_IN_PD)
+
+/* PORT_DATA_IO_PU(nr) */
+#define _IO_U_(nr)                                           \
+        PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT, \
+                    PORT##nr##_IN, PORT##nr##_IN_PU)
+
+/* PORT_DATA_IO_PU_PD(nr) */
+#define _IO_UD(nr)                                           \
+        PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT, \
+                    PORT##nr##_IN, PORT##nr##_IN_PD, PORT##nr##_IN_PU)
+
+
+static pinmux_enum_t pinmux_data[] = {
+
+        /* specify valid pin states for each pin in GPIO mode */
+
+        _IO__D(0), _IO__D(1), __O___(2), _I___D(3), _I___D(4),
+        _I___D(5), _IO_UD(6), _I___D(7), _IO__D(8), __O___(9),
+
+        __O___(10), __O___(11), _IO_UD(12), _IO__D(13), _IO__D(14),
+        __O___(15), _IO__D(16), _IO__D(17), _I___D(18), _IO___(19),
+
+        _IO___(20), _IO___(21), _IO___(22), _IO___(23), _IO___(24),
+        _IO___(25), _IO___(26), _IO___(27), _IO___(28), _IO___(29),
+
+        _IO___(30), _IO___(31), _IO___(32), _IO___(33), _IO___(34),
+        _IO___(35), _IO___(36), _IO___(37), _IO___(38), _IO___(39),
+
+        _IO___(40), _IO___(41), _IO___(42), _IO___(43), _IO___(44),
+        _IO___(45), _IO_U_(46), _IO_U_(47), _IO_U_(48), _IO_U_(49),
+
+        _IO_U_(50), _IO_U_(51), _IO_U_(52), _IO_U_(53), _IO_U_(54),
+        _IO_U_(55), _IO_U_(56), _IO_U_(57), _IO_U_(58), _IO_U_(59),
+
+        _IO_U_(60), _IO_U_(61), _IO___(62), __O___(63), __O___(64),
+        _IO_U_(65), __O___(66), _IO_U_(67), __O___(68), _IO___(69), /*66?*/
+
+        _IO___(70), _IO___(71), __O___(72), _I__U_(73), _I__UD(74),
+        _IO_UD(75), _IO_UD(76), _IO_UD(77), _IO_UD(78), _IO_UD(79),
+
+        _IO_UD(80), _IO_UD(81), _IO_UD(82), _IO_UD(83), _IO_UD(84),
+        _IO_UD(85), _IO_UD(86), _IO_UD(87), _IO_UD(88), _IO_UD(89),
+
+        _IO_UD(90), _IO_UD(91), _IO_UD(92), _IO_UD(93), _IO_UD(94),
+        _IO_UD(95), _IO_U_(96), _IO_UD(97), _IO_UD(98), __O___(99), /*99?*/
+
+        _IO__D(100), _IO__D(101), _IO__D(102), _IO__D(103), _IO__D(104),
+        _IO__D(105), _IO_U_(106), _IO_U_(107), _IO_U_(108), _IO_U_(109),
+
+        _IO_U_(110), _IO_U_(111), _IO__D(112), _IO__D(113), _IO_U_(114),
+        _IO_U_(115), _IO_U_(116), _IO_U_(117), _IO_U_(118), _IO_U_(119),
+
+        _IO_U_(120), _IO__D(121), _IO__D(122), _IO__D(123), _IO__D(124),
+        _IO__D(125), _IO__D(126), _IO__D(127), _IO__D(128), _IO_UD(129),
+
+        _IO_UD(130), _IO_UD(131), _IO_UD(132), _IO_UD(133), _IO_UD(134),
+        _IO_UD(135), _IO__D(136), _IO__D(137), _IO__D(138), _IO__D(139),
+
+        _IO__D(140), _IO__D(141), _IO__D(142), _IO_UD(143), _IO__D(144),
+        _IO__D(145), _IO__D(146), _IO__D(147), _IO__D(148), _IO__D(149),
+
+        _IO__D(150), _IO__D(151), _IO_UD(152), _I___D(153), _IO_UD(154),
+        _I___D(155), _IO__D(156), _IO__D(157), _I___D(158), _IO__D(159),
+
+        __O___(160), _IO__D(161), _IO__D(162), _IO__D(163), _I___D(164),
+        _IO__D(165), _I___D(166), _I___D(167), _I___D(168), _I___D(169),
+
+        _I___D(170), __O___(171), _IO_UD(172), _IO_UD(173), _IO_UD(174),
+        _IO_UD(175), _IO_UD(176), _IO_UD(177), _IO_UD(178), __O___(179),
+
+        _IO_UD(180), _IO_UD(181), _IO_UD(182), _IO_UD(183), _IO_UD(184),
+        __O___(185), _IO_UD(186), _IO_UD(187), _IO_UD(188), _IO_UD(189),
+
+        _IO_UD(190),
+
+        /* IRQ */
+        PINMUX_DATA(IRQ0_6_MARK,        PORT6_FN0,      MSEL1CR_0_0),
+        PINMUX_DATA(IRQ0_162_MARK,      PORT162_FN0,    MSEL1CR_0_1),
+        PINMUX_DATA(IRQ1_MARK,          PORT12_FN0),
+        PINMUX_DATA(IRQ2_4_MARK,        PORT4_FN0,      MSEL1CR_2_0),
+        PINMUX_DATA(IRQ2_5_MARK,        PORT5_FN0,      MSEL1CR_2_1),
+        PINMUX_DATA(IRQ3_8_MARK,        PORT8_FN0,      MSEL1CR_3_0),
+        PINMUX_DATA(IRQ3_16_MARK,       PORT16_FN0,     MSEL1CR_3_1),
+        PINMUX_DATA(IRQ4_17_MARK,       PORT17_FN0,     MSEL1CR_4_0),
+        PINMUX_DATA(IRQ4_163_MARK,      PORT163_FN0,    MSEL1CR_4_1),
+        PINMUX_DATA(IRQ5_MARK,          PORT18_FN0),
+        PINMUX_DATA(IRQ6_39_MARK,       PORT39_FN0,     MSEL1CR_6_0),
+        PINMUX_DATA(IRQ6_164_MARK,      PORT164_FN0,    MSEL1CR_6_1),
+        PINMUX_DATA(IRQ7_40_MARK,       PORT40_FN0,     MSEL1CR_7_1),
+        PINMUX_DATA(IRQ7_167_MARK,      PORT167_FN0,    MSEL1CR_7_0),
+        PINMUX_DATA(IRQ8_41_MARK,       PORT41_FN0,     MSEL1CR_8_1),
+        PINMUX_DATA(IRQ8_168_MARK,      PORT168_FN0,    MSEL1CR_8_0),
+        PINMUX_DATA(IRQ9_42_MARK,       PORT42_FN0,     MSEL1CR_9_0),
+        PINMUX_DATA(IRQ9_169_MARK,      PORT169_FN0,    MSEL1CR_9_1),
+        PINMUX_DATA(IRQ10_MARK,         PORT65_FN0,     MSEL1CR_9_1),
+        PINMUX_DATA(IRQ11_MARK,         PORT67_FN0),
+        PINMUX_DATA(IRQ12_80_MARK,      PORT80_FN0,     MSEL1CR_12_0),
+        PINMUX_DATA(IRQ12_137_MARK,     PORT137_FN0,    MSEL1CR_12_1),
+        PINMUX_DATA(IRQ13_81_MARK,      PORT81_FN0,     MSEL1CR_13_0),
+        PINMUX_DATA(IRQ13_145_MARK,     PORT145_FN0,    MSEL1CR_13_1),
+        PINMUX_DATA(IRQ14_82_MARK,      PORT82_FN0,     MSEL1CR_14_0),
+        PINMUX_DATA(IRQ14_146_MARK,     PORT146_FN0,    MSEL1CR_14_1),
+        PINMUX_DATA(IRQ15_83_MARK,      PORT83_FN0,     MSEL1CR_15_0),
+        PINMUX_DATA(IRQ15_147_MARK,     PORT147_FN0,    MSEL1CR_15_1),
+        PINMUX_DATA(IRQ16_84_MARK,      PORT84_FN0,     MSEL1CR_16_0),
+        PINMUX_DATA(IRQ16_170_MARK,     PORT170_FN0,    MSEL1CR_16_1),
+        PINMUX_DATA(IRQ17_MARK,         PORT85_FN0),
+        PINMUX_DATA(IRQ18_MARK,         PORT86_FN0),
+        PINMUX_DATA(IRQ19_MARK,         PORT87_FN0),
+        PINMUX_DATA(IRQ20_MARK,         PORT92_FN0),
+        PINMUX_DATA(IRQ21_MARK,         PORT93_FN0),
+        PINMUX_DATA(IRQ22_MARK,         PORT94_FN0),
+        PINMUX_DATA(IRQ23_MARK,         PORT95_FN0),
+        PINMUX_DATA(IRQ24_MARK,         PORT112_FN0),
+        PINMUX_DATA(IRQ25_MARK,         PORT119_FN0),
+        PINMUX_DATA(IRQ26_121_MARK,     PORT121_FN0,    MSEL1CR_26_1),
+        PINMUX_DATA(IRQ26_172_MARK,     PORT172_FN0,    MSEL1CR_26_0),
+        PINMUX_DATA(IRQ27_122_MARK,     PORT122_FN0,    MSEL1CR_27_1),
+        PINMUX_DATA(IRQ27_180_MARK,     PORT180_FN0,    MSEL1CR_27_0),
+        PINMUX_DATA(IRQ28_123_MARK,     PORT123_FN0,    MSEL1CR_28_1),
+        PINMUX_DATA(IRQ28_181_MARK,     PORT181_FN0,    MSEL1CR_28_0),
+        PINMUX_DATA(IRQ29_129_MARK,     PORT129_FN0,    MSEL1CR_29_1),
+        PINMUX_DATA(IRQ29_182_MARK,     PORT182_FN0,    MSEL1CR_29_0),
+        PINMUX_DATA(IRQ30_130_MARK,     PORT130_FN0,    MSEL1CR_30_1),
+        PINMUX_DATA(IRQ30_183_MARK,     PORT183_FN0,    MSEL1CR_30_0),
+        PINMUX_DATA(IRQ31_138_MARK,     PORT138_FN0,    MSEL1CR_31_1),
+        PINMUX_DATA(IRQ31_184_MARK,     PORT184_FN0,    MSEL1CR_31_0),
+
+        /* Function 1 */
+        PINMUX_DATA(BBIF2_TSCK1_MARK,           PORT0_FN1),
+        PINMUX_DATA(BBIF2_TSYNC1_MARK,          PORT1_FN1),
+        PINMUX_DATA(BBIF2_TXD1_MARK,            PORT2_FN1),
+        PINMUX_DATA(BBIF2_RXD_MARK,             PORT3_FN1),
+        PINMUX_DATA(FSIACK_MARK,                PORT4_FN1),
+        PINMUX_DATA(FSIAILR_MARK,               PORT5_FN1),
+        PINMUX_DATA(FSIAIBT_MARK,               PORT6_FN1),
+        PINMUX_DATA(FSIAISLD_MARK,              PORT7_FN1),
+        PINMUX_DATA(FSIAOMC_MARK,               PORT8_FN1),
+        PINMUX_DATA(FSIAOLR_MARK,               PORT9_FN1),
+        PINMUX_DATA(FSIAOBT_MARK,               PORT10_FN1),
+        PINMUX_DATA(FSIAOSLD_MARK,              PORT11_FN1),
+        PINMUX_DATA(FMSOCK_MARK,                PORT12_FN1),
+        PINMUX_DATA(FMSOOLR_MARK,               PORT13_FN1),
+        PINMUX_DATA(FMSOOBT_MARK,               PORT14_FN1),
+        PINMUX_DATA(FMSOSLD_MARK,               PORT15_FN1),
+        PINMUX_DATA(FMSOILR_MARK,               PORT16_FN1),
+        PINMUX_DATA(FMSOIBT_MARK,               PORT17_FN1),
+        PINMUX_DATA(FMSISLD_MARK,               PORT18_FN1),
+        PINMUX_DATA(A0_MARK,                    PORT19_FN1),
+        PINMUX_DATA(A1_MARK,                    PORT20_FN1),
+        PINMUX_DATA(A2_MARK,                    PORT21_FN1),
+        PINMUX_DATA(A3_MARK,                    PORT22_FN1),
+        PINMUX_DATA(A4_FOE_MARK,                PORT23_FN1),
+        PINMUX_DATA(A5_FCDE_MARK,               PORT24_FN1),
+        PINMUX_DATA(A6_MARK,                    PORT25_FN1),
+        PINMUX_DATA(A7_MARK,                    PORT26_FN1),
+        PINMUX_DATA(A8_MARK,                    PORT27_FN1),
+        PINMUX_DATA(A9_MARK,                    PORT28_FN1),
+        PINMUX_DATA(A10_MARK,                   PORT29_FN1),
+        PINMUX_DATA(A11_MARK,                   PORT30_FN1),
+        PINMUX_DATA(A12_MARK,                   PORT31_FN1),
+        PINMUX_DATA(A13_MARK,                   PORT32_FN1),
+        PINMUX_DATA(A14_MARK,                   PORT33_FN1),
+        PINMUX_DATA(A15_MARK,                   PORT34_FN1),
+        PINMUX_DATA(A16_MARK,                   PORT35_FN1),
+        PINMUX_DATA(A17_MARK,                   PORT36_FN1),
+        PINMUX_DATA(A18_MARK,                   PORT37_FN1),
+        PINMUX_DATA(A19_MARK,                   PORT38_FN1),
+        PINMUX_DATA(A20_MARK,                   PORT39_FN1),
+        PINMUX_DATA(A21_MARK,                   PORT40_FN1),
+        PINMUX_DATA(A22_MARK,                   PORT41_FN1),
+        PINMUX_DATA(A23_MARK,                   PORT42_FN1),
+        PINMUX_DATA(A24_MARK,                   PORT43_FN1),
+        PINMUX_DATA(A25_MARK,                   PORT44_FN1),
+        PINMUX_DATA(A26_MARK,                   PORT45_FN1),
+        PINMUX_DATA(D0_NAF0_MARK,               PORT46_FN1),
+        PINMUX_DATA(D1_NAF1_MARK,               PORT47_FN1),
+        PINMUX_DATA(D2_NAF2_MARK,               PORT48_FN1),
+        PINMUX_DATA(D3_NAF3_MARK,               PORT49_FN1),
+        PINMUX_DATA(D4_NAF4_MARK,               PORT50_FN1),
+        PINMUX_DATA(D5_NAF5_MARK,               PORT51_FN1),
+        PINMUX_DATA(D6_NAF6_MARK,               PORT52_FN1),
+        PINMUX_DATA(D7_NAF7_MARK,               PORT53_FN1),
+        PINMUX_DATA(D8_NAF8_MARK,               PORT54_FN1),
+        PINMUX_DATA(D9_NAF9_MARK,               PORT55_FN1),
+        PINMUX_DATA(D10_NAF10_MARK,             PORT56_FN1),
+        PINMUX_DATA(D11_NAF11_MARK,             PORT57_FN1),
+        PINMUX_DATA(D12_NAF12_MARK,             PORT58_FN1),
+        PINMUX_DATA(D13_NAF13_MARK,             PORT59_FN1),
+        PINMUX_DATA(D14_NAF14_MARK,             PORT60_FN1),
+        PINMUX_DATA(D15_NAF15_MARK,             PORT61_FN1),
+        PINMUX_DATA(CS0_MARK,                   PORT62_FN1),
+        PINMUX_DATA(CS2_MARK,                   PORT63_FN1),
+        PINMUX_DATA(CS4_MARK,                   PORT64_FN1),
+        PINMUX_DATA(CS5A_MARK,                  PORT65_FN1),
+        PINMUX_DATA(CS5B_MARK,                  PORT66_FN1),
+        PINMUX_DATA(CS6A_MARK,                  PORT67_FN1),
+        PINMUX_DATA(FCE0_MARK,                  PORT68_FN1),
+        PINMUX_DATA(RD_FSC_MARK,                PORT69_FN1),
+        PINMUX_DATA(WE0_FWE_MARK,               PORT70_FN1),
+        PINMUX_DATA(WE1_MARK,                   PORT71_FN1),
+        PINMUX_DATA(CKO_MARK,                   PORT72_FN1),
+        PINMUX_DATA(FRB_MARK,                   PORT73_FN1),
+        PINMUX_DATA(WAIT_MARK,                  PORT74_FN1),
+        PINMUX_DATA(RDWR_MARK,                  PORT75_FN1),
+        PINMUX_DATA(MEMC_AD0_MARK,              PORT76_FN1),
+        PINMUX_DATA(MEMC_AD1_MARK,              PORT77_FN1),
+        PINMUX_DATA(MEMC_AD2_MARK,              PORT78_FN1),
+        PINMUX_DATA(MEMC_AD3_MARK,              PORT79_FN1),
+        PINMUX_DATA(MEMC_AD4_MARK,              PORT80_FN1),
+        PINMUX_DATA(MEMC_AD5_MARK,              PORT81_FN1),
+        PINMUX_DATA(MEMC_AD6_MARK,              PORT82_FN1),
+        PINMUX_DATA(MEMC_AD7_MARK,              PORT83_FN1),
+        PINMUX_DATA(MEMC_AD8_MARK,              PORT84_FN1),
+        PINMUX_DATA(MEMC_AD9_MARK,              PORT85_FN1),
+        PINMUX_DATA(MEMC_AD10_MARK,             PORT86_FN1),
+        PINMUX_DATA(MEMC_AD11_MARK,             PORT87_FN1),
+        PINMUX_DATA(MEMC_AD12_MARK,             PORT88_FN1),
+        PINMUX_DATA(MEMC_AD13_MARK,             PORT89_FN1),
+        PINMUX_DATA(MEMC_AD14_MARK,             PORT90_FN1),
+        PINMUX_DATA(MEMC_AD15_MARK,             PORT91_FN1),
+        PINMUX_DATA(MEMC_CS0_MARK,              PORT92_FN1),
+        PINMUX_DATA(MEMC_BUSCLK_MEMC_A0_MARK,   PORT93_FN1),
+        PINMUX_DATA(MEMC_CS1_MEMC_A1_MARK,      PORT94_FN1),
+        PINMUX_DATA(MEMC_ADV_MEMC_DREQ0_MARK,   PORT95_FN1),
+        PINMUX_DATA(MEMC_WAIT_MEMC_DREQ1_MARK,  PORT96_FN1),
+        PINMUX_DATA(MEMC_NOE_MARK,              PORT97_FN1),
+        PINMUX_DATA(MEMC_NWE_MARK,              PORT98_FN1),
+        PINMUX_DATA(MEMC_INT_MARK,              PORT99_FN1),
+        PINMUX_DATA(VIO_VD_MARK,                PORT100_FN1),
+        PINMUX_DATA(VIO_HD_MARK,                PORT101_FN1),
+        PINMUX_DATA(VIO_D0_MARK,                PORT102_FN1),
+        PINMUX_DATA(VIO_D1_MARK,                PORT103_FN1),
+        PINMUX_DATA(VIO_D2_MARK,                PORT104_FN1),
+        PINMUX_DATA(VIO_D3_MARK,                PORT105_FN1),
+        PINMUX_DATA(VIO_D4_MARK,                PORT106_FN1),
+        PINMUX_DATA(VIO_D5_MARK,                PORT107_FN1),
+        PINMUX_DATA(VIO_D6_MARK,                PORT108_FN1),
+        PINMUX_DATA(VIO_D7_MARK,                PORT109_FN1),
+        PINMUX_DATA(VIO_D8_MARK,                PORT110_FN1),
+        PINMUX_DATA(VIO_D9_MARK,                PORT111_FN1),
+        PINMUX_DATA(VIO_D10_MARK,               PORT112_FN1),
+        PINMUX_DATA(VIO_D11_MARK,               PORT113_FN1),
+        PINMUX_DATA(VIO_D12_MARK,               PORT114_FN1),
+        PINMUX_DATA(VIO_D13_MARK,               PORT115_FN1),
+        PINMUX_DATA(VIO_D14_MARK,               PORT116_FN1),
+        PINMUX_DATA(VIO_D15_MARK,               PORT117_FN1),
+        PINMUX_DATA(VIO_CLK_MARK,               PORT118_FN1),
+        PINMUX_DATA(VIO_FIELD_MARK,             PORT119_FN1),
+        PINMUX_DATA(VIO_CKO_MARK,               PORT120_FN1),
+        PINMUX_DATA(LCDD0_MARK,                 PORT121_FN1),
+        PINMUX_DATA(LCDD1_MARK,                 PORT122_FN1),
+        PINMUX_DATA(LCDD2_MARK,                 PORT123_FN1),
+        PINMUX_DATA(LCDD3_MARK,                 PORT124_FN1),
+        PINMUX_DATA(LCDD4_MARK,                 PORT125_FN1),
+        PINMUX_DATA(LCDD5_MARK,                 PORT126_FN1),
+        PINMUX_DATA(LCDD6_MARK,                 PORT127_FN1),
+        PINMUX_DATA(LCDD7_MARK,                 PORT128_FN1),
+        PINMUX_DATA(LCDD8_MARK,                 PORT129_FN1),
+        PINMUX_DATA(LCDD9_MARK,                 PORT130_FN1),
+        PINMUX_DATA(LCDD10_MARK,                PORT131_FN1),
+        PINMUX_DATA(LCDD11_MARK,                PORT132_FN1),
+        PINMUX_DATA(LCDD12_MARK,                PORT133_FN1),
+        PINMUX_DATA(LCDD13_MARK,                PORT134_FN1),
+        PINMUX_DATA(LCDD14_MARK,                PORT135_FN1),
+        PINMUX_DATA(LCDD15_MARK,                PORT136_FN1),
+        PINMUX_DATA(LCDD16_MARK,                PORT137_FN1),
+        PINMUX_DATA(LCDD17_MARK,                PORT138_FN1),
+        PINMUX_DATA(LCDD18_MARK,                PORT139_FN1),
+        PINMUX_DATA(LCDD19_MARK,                PORT140_FN1),
+        PINMUX_DATA(LCDD20_MARK,                PORT141_FN1),
+        PINMUX_DATA(LCDD21_MARK,                PORT142_FN1),
+        PINMUX_DATA(LCDD22_MARK,                PORT143_FN1),
+        PINMUX_DATA(LCDD23_MARK,                PORT144_FN1),
+        PINMUX_DATA(LCDHSYN_MARK,               PORT145_FN1),
+        PINMUX_DATA(LCDVSYN_MARK,               PORT146_FN1),
+        PINMUX_DATA(LCDDCK_MARK,                PORT147_FN1),
+        PINMUX_DATA(LCDRD_MARK,                 PORT148_FN1),
+        PINMUX_DATA(LCDDISP_MARK,               PORT149_FN1),
+        PINMUX_DATA(LCDLCLK_MARK,               PORT150_FN1),
+        PINMUX_DATA(LCDDON_MARK,                PORT151_FN1),
+        PINMUX_DATA(SCIFA0_TXD_MARK,            PORT152_FN1),
+        PINMUX_DATA(SCIFA0_RXD_MARK,            PORT153_FN1),
+        PINMUX_DATA(SCIFA1_TXD_MARK,            PORT154_FN1),
+        PINMUX_DATA(SCIFA1_RXD_MARK,            PORT155_FN1),
+        PINMUX_DATA(TS_SPSYNC1_MARK,            PORT156_FN1),
+        PINMUX_DATA(TS_SDAT1_MARK,              PORT157_FN1),
+        PINMUX_DATA(TS_SDEN1_MARK,              PORT158_FN1),
+        PINMUX_DATA(TS_SCK1_MARK,               PORT159_FN1),
+        PINMUX_DATA(TPU0TO0_MARK,               PORT160_FN1),
+        PINMUX_DATA(TPU0TO1_MARK,               PORT161_FN1),
+        PINMUX_DATA(SCIFB_SCK_MARK,             PORT162_FN1),
+        PINMUX_DATA(SCIFB_RTS_MARK,             PORT163_FN1),
+        PINMUX_DATA(SCIFB_CTS_MARK,             PORT164_FN1),
+        PINMUX_DATA(SCIFB_TXD_MARK,             PORT165_FN1),
+        PINMUX_DATA(SCIFB_RXD_MARK,             PORT166_FN1),
+        PINMUX_DATA(VBUS0_0_MARK,               PORT167_FN1),
+        PINMUX_DATA(VBUS0_1_MARK,               PORT168_FN1),
+        PINMUX_DATA(HDMI_HPD_MARK,              PORT169_FN1),
+        PINMUX_DATA(HDMI_CEC_MARK,              PORT170_FN1),
+        PINMUX_DATA(SDHICLK0_MARK,              PORT171_FN1),
+        PINMUX_DATA(SDHICD0_MARK,               PORT172_FN1),
+        PINMUX_DATA(SDHID0_0_MARK,              PORT173_FN1),
+        PINMUX_DATA(SDHID0_1_MARK,              PORT174_FN1),
+        PINMUX_DATA(SDHID0_2_MARK,              PORT175_FN1),
+        PINMUX_DATA(SDHID0_3_MARK,              PORT176_FN1),
+        PINMUX_DATA(SDHICMD0_MARK,              PORT177_FN1),
+        PINMUX_DATA(SDHIWP0_MARK,               PORT178_FN1),
+        PINMUX_DATA(SDHICLK1_MARK,              PORT179_FN1),
+        PINMUX_DATA(SDHID1_0_MARK,              PORT180_FN1),
+        PINMUX_DATA(SDHID1_1_MARK,              PORT181_FN1),
+        PINMUX_DATA(SDHID1_2_MARK,              PORT182_FN1),
+        PINMUX_DATA(SDHID1_3_MARK,              PORT183_FN1),
+        PINMUX_DATA(SDHICMD1_MARK,              PORT184_FN1),
+        PINMUX_DATA(SDHICLK2_MARK,              PORT185_FN1),
+        PINMUX_DATA(SDHID2_0_MARK,              PORT186_FN1),
+        PINMUX_DATA(SDHID2_1_MARK,              PORT187_FN1),
+        PINMUX_DATA(SDHID2_2_MARK,              PORT188_FN1),
+        PINMUX_DATA(SDHID2_3_MARK,              PORT189_FN1),
+        PINMUX_DATA(SDHICMD2_MARK,              PORT190_FN1),
+
+        /* Function 2 */
+        PINMUX_DATA(FSIBCK_MARK,                PORT4_FN2),
+        PINMUX_DATA(SCIFA4_RXD_MARK,            PORT5_FN2),
+        PINMUX_DATA(SCIFA4_TXD_MARK,            PORT6_FN2),
+        PINMUX_DATA(SCIFA5_RXD_MARK,            PORT8_FN2),
+        PINMUX_DATA(FSIASPDIF_11_MARK,          PORT11_FN2),
+        PINMUX_DATA(SCIFA5_TXD_MARK,            PORT12_FN2),
+        PINMUX_DATA(FMSIOLR_MARK,               PORT13_FN2),
+        PINMUX_DATA(FMSIOBT_MARK,               PORT14_FN2),
+        PINMUX_DATA(FSIASPDIF_15_MARK,          PORT15_FN2),
+        PINMUX_DATA(FMSIILR_MARK,               PORT16_FN2),
+        PINMUX_DATA(FMSIIBT_MARK,               PORT17_FN2),
+        PINMUX_DATA(BS_MARK,                    PORT19_FN2),
+        PINMUX_DATA(MSIOF0_TSYNC_MARK,          PORT36_FN2),
+        PINMUX_DATA(MSIOF0_TSCK_MARK,           PORT37_FN2),
+        PINMUX_DATA(MSIOF0_RXD_MARK,            PORT38_FN2),
+        PINMUX_DATA(MSIOF0_RSCK_MARK,           PORT39_FN2),
+        PINMUX_DATA(MSIOF0_RSYNC_MARK,          PORT40_FN2),
+        PINMUX_DATA(MSIOF0_MCK0_MARK,           PORT41_FN2),
+        PINMUX_DATA(MSIOF0_MCK1_MARK,           PORT42_FN2),
+        PINMUX_DATA(MSIOF0_SS1_MARK,            PORT43_FN2),
+        PINMUX_DATA(MSIOF0_SS2_MARK,            PORT44_FN2),
+        PINMUX_DATA(MSIOF0_TXD_MARK,            PORT45_FN2),
+        PINMUX_DATA(FMSICK_MARK,                PORT65_FN2),
+        PINMUX_DATA(FCE1_MARK,                  PORT66_FN2),
+        PINMUX_DATA(BBIF1_RXD_MARK,             PORT76_FN2),
+        PINMUX_DATA(BBIF1_TSYNC_MARK,           PORT77_FN2),
+        PINMUX_DATA(BBIF1_TSCK_MARK,            PORT78_FN2),
+        PINMUX_DATA(BBIF1_TXD_MARK,             PORT79_FN2),
+        PINMUX_DATA(BBIF1_RSCK_MARK,            PORT80_FN2),
+        PINMUX_DATA(BBIF1_RSYNC_MARK,           PORT81_FN2),
+        PINMUX_DATA(BBIF1_FLOW_MARK,            PORT82_FN2),
+        PINMUX_DATA(BB_RX_FLOW_N_MARK,          PORT83_FN2),
+        PINMUX_DATA(MSIOF1_RSCK_MARK,           PORT84_FN2),
+        PINMUX_DATA(MSIOF1_RSYNC_MARK,          PORT85_FN2),
+        PINMUX_DATA(MSIOF1_MCK0_MARK,           PORT86_FN2),
+        PINMUX_DATA(MSIOF1_MCK1_MARK,           PORT87_FN2),
+        PINMUX_DATA(MSIOF1_TSCK_88_MARK,        PORT88_FN2, MSEL4CR_10_1),
+        PINMUX_DATA(MSIOF1_TSYNC_89_MARK,       PORT89_FN2, MSEL4CR_10_1),
+        PINMUX_DATA(MSIOF1_TXD_90_MARK,         PORT90_FN2, MSEL4CR_10_1),
+        PINMUX_DATA(MSIOF1_RXD_91_MARK,         PORT91_FN2, MSEL4CR_10_1),
+        PINMUX_DATA(MSIOF1_SS1_92_MARK,         PORT92_FN2, MSEL4CR_10_1),
+        PINMUX_DATA(MSIOF1_SS2_93_MARK,         PORT93_FN2, MSEL4CR_10_1),
+        PINMUX_DATA(SCIFA2_CTS1_MARK,           PORT94_FN2),
+        PINMUX_DATA(SCIFA2_RTS1_MARK,           PORT95_FN2),
+        PINMUX_DATA(SCIFA2_TXD1_MARK,           PORT96_FN2),
+        PINMUX_DATA(SCIFA2_RXD1_MARK,           PORT97_FN2),
+        PINMUX_DATA(SCIFA2_SCK1_MARK,           PORT98_FN2),
+        PINMUX_DATA(I2C_SCL2_MARK,              PORT110_FN2),
+        PINMUX_DATA(I2C_SDA2_MARK,              PORT111_FN2),
+        PINMUX_DATA(I2C_SCL3_MARK,              PORT114_FN2, MSEL4CR_16_1),
+        PINMUX_DATA(I2C_SDA3_MARK,              PORT115_FN2, MSEL4CR_16_1),
+        PINMUX_DATA(I2C_SCL4_MARK,              PORT116_FN2, MSEL4CR_17_1),
+        PINMUX_DATA(I2C_SDA4_MARK,              PORT117_FN2, MSEL4CR_17_1),
+        PINMUX_DATA(MSIOF2_RSCK_MARK,           PORT134_FN2),
+        PINMUX_DATA(MSIOF2_RSYNC_MARK,          PORT135_FN2),
+        PINMUX_DATA(MSIOF2_MCK0_MARK,           PORT136_FN2),
+        PINMUX_DATA(MSIOF2_MCK1_MARK,           PORT137_FN2),
+        PINMUX_DATA(MSIOF2_SS1_MARK,            PORT138_FN2),
+        PINMUX_DATA(MSIOF2_SS2_MARK,            PORT139_FN2),
+        PINMUX_DATA(SCIFA3_CTS_140_MARK,        PORT140_FN2, MSEL3CR_9_1),
+        PINMUX_DATA(SCIFA3_RTS_141_MARK,        PORT141_FN2),
+        PINMUX_DATA(SCIFA3_SCK_MARK,            PORT142_FN2),
+        PINMUX_DATA(SCIFA3_TXD_MARK,            PORT143_FN2),
+        PINMUX_DATA(SCIFA3_RXD_MARK,            PORT144_FN2),
+        PINMUX_DATA(MSIOF2_TSYNC_MARK,          PORT148_FN2),
+        PINMUX_DATA(MSIOF2_TSCK_MARK,           PORT149_FN2),
+        PINMUX_DATA(MSIOF2_RXD_MARK,            PORT150_FN2),
+        PINMUX_DATA(MSIOF2_TXD_MARK,            PORT151_FN2),
+        PINMUX_DATA(SCIFA0_SCK_MARK,            PORT156_FN2),
+        PINMUX_DATA(SCIFA0_RTS_MARK,            PORT157_FN2),
+        PINMUX_DATA(SCIFA0_CTS_MARK,            PORT158_FN2),
+        PINMUX_DATA(SCIFA1_SCK_MARK,            PORT159_FN2),
+        PINMUX_DATA(SCIFA1_RTS_MARK,            PORT160_FN2),
+        PINMUX_DATA(SCIFA1_CTS_MARK,            PORT161_FN2),
+
+        /* Function 3 */
+        PINMUX_DATA(VIO_CKO1_MARK,              PORT16_FN3),
+        PINMUX_DATA(VIO_CKO2_MARK,              PORT17_FN3),
+        PINMUX_DATA(IDIN_1_18_MARK,             PORT18_FN3, MSEL4CR_14_1),
+        PINMUX_DATA(MSIOF1_TSCK_39_MARK,        PORT39_FN3, MSEL4CR_10_0),
+        PINMUX_DATA(MSIOF1_TSYNC_40_MARK,       PORT40_FN3, MSEL4CR_10_0),
+        PINMUX_DATA(MSIOF1_TXD_41_MARK,         PORT41_FN3, MSEL4CR_10_0),
+        PINMUX_DATA(MSIOF1_RXD_42_MARK,         PORT42_FN3, MSEL4CR_10_0),
+        PINMUX_DATA(MSIOF1_SS1_43_MARK,         PORT43_FN3, MSEL4CR_10_0),
+        PINMUX_DATA(MSIOF1_SS2_44_MARK,         PORT44_FN3, MSEL4CR_10_0),
+        PINMUX_DATA(MMCD1_0_MARK,               PORT54_FN3, MSEL4CR_15_1),
+        PINMUX_DATA(MMCD1_1_MARK,               PORT55_FN3, MSEL4CR_15_1),
+        PINMUX_DATA(MMCD1_2_MARK,               PORT56_FN3, MSEL4CR_15_1),
+        PINMUX_DATA(MMCD1_3_MARK,               PORT57_FN3, MSEL4CR_15_1),
+        PINMUX_DATA(MMCD1_4_MARK,               PORT58_FN3, MSEL4CR_15_1),
+        PINMUX_DATA(MMCD1_5_MARK,               PORT59_FN3, MSEL4CR_15_1),
+        PINMUX_DATA(MMCD1_6_MARK,               PORT60_FN3, MSEL4CR_15_1),
+        PINMUX_DATA(MMCD1_7_MARK,               PORT61_FN3, MSEL4CR_15_1),
+        PINMUX_DATA(VINT_I_MARK,                PORT65_FN3),
+        PINMUX_DATA(MMCCLK1_MARK,               PORT66_FN3, MSEL4CR_15_1),
+        PINMUX_DATA(MMCCMD1_MARK,               PORT67_FN3, MSEL4CR_15_1),
+        PINMUX_DATA(TPU0TO2_93_MARK,            PORT93_FN3),
+        PINMUX_DATA(TPU0TO2_99_MARK,            PORT99_FN3),
+        PINMUX_DATA(TPU0TO3_MARK,               PORT112_FN3),
+        PINMUX_DATA(IDIN_0_MARK,                PORT113_FN3),
+        PINMUX_DATA(EXTLP_0_MARK,               PORT114_FN3),
+        PINMUX_DATA(OVCN2_0_MARK,               PORT115_FN3),
+        PINMUX_DATA(PWEN_0_MARK,                PORT116_FN3),
+        PINMUX_DATA(OVCN_0_MARK,                PORT117_FN3),
+        PINMUX_DATA(KEYOUT7_MARK,               PORT121_FN3),
+        PINMUX_DATA(KEYOUT6_MARK,               PORT122_FN3),
+        PINMUX_DATA(KEYOUT5_MARK,               PORT123_FN3),
+        PINMUX_DATA(KEYOUT4_MARK,               PORT124_FN3),
+        PINMUX_DATA(KEYOUT3_MARK,               PORT125_FN3),
+        PINMUX_DATA(KEYOUT2_MARK,               PORT126_FN3),
+        PINMUX_DATA(KEYOUT1_MARK,               PORT127_FN3),
+        PINMUX_DATA(KEYOUT0_MARK,               PORT128_FN3),
+        PINMUX_DATA(KEYIN7_MARK,                PORT129_FN3),
+        PINMUX_DATA(KEYIN6_MARK,                PORT130_FN3),
+        PINMUX_DATA(KEYIN5_MARK,                PORT131_FN3),
+        PINMUX_DATA(KEYIN4_MARK,                PORT132_FN3),
+        PINMUX_DATA(KEYIN3_133_MARK,            PORT133_FN3, MSEL4CR_18_0),
+        PINMUX_DATA(KEYIN2_134_MARK,            PORT134_FN3, MSEL4CR_18_0),
+        PINMUX_DATA(KEYIN1_135_MARK,            PORT135_FN3, MSEL4CR_18_0),
+        PINMUX_DATA(KEYIN0_136_MARK,            PORT136_FN3, MSEL4CR_18_0),
+        PINMUX_DATA(TS_SPSYNC2_MARK,            PORT137_FN3),
+        PINMUX_DATA(IROUT_139_MARK,             PORT139_FN3),
+        PINMUX_DATA(IRDA_OUT_MARK,              PORT140_FN3),
+        PINMUX_DATA(IRDA_IN_MARK,               PORT141_FN3),
+        PINMUX_DATA(IRDA_FIRSEL_MARK,           PORT142_FN3),
+        PINMUX_DATA(TS_SDAT2_MARK,              PORT145_FN3),
+        PINMUX_DATA(TS_SDEN2_MARK,              PORT146_FN3),
+        PINMUX_DATA(TS_SCK2_MARK,               PORT147_FN3),
+
+        /* Function 4 */
+        PINMUX_DATA(SCIFA3_CTS_43_MARK, PORT43_FN4, MSEL3CR_9_0),
+        PINMUX_DATA(SCIFA3_RTS_44_MARK, PORT44_FN4),
+        PINMUX_DATA(GP_RX_FLAG_MARK,    PORT76_FN4),
+        PINMUX_DATA(GP_RX_DATA_MARK,    PORT77_FN4),
+        PINMUX_DATA(GP_TX_READY_MARK,   PORT78_FN4),
+        PINMUX_DATA(GP_RX_WAKE_MARK,    PORT79_FN4),
+        PINMUX_DATA(MP_TX_FLAG_MARK,    PORT80_FN4),
+        PINMUX_DATA(MP_TX_DATA_MARK,    PORT81_FN4),
+        PINMUX_DATA(MP_RX_READY_MARK,   PORT82_FN4),
+        PINMUX_DATA(MP_TX_WAKE_MARK,    PORT83_FN4),
+        PINMUX_DATA(MMCD0_0_MARK,       PORT84_FN4, MSEL4CR_15_0),
+        PINMUX_DATA(MMCD0_1_MARK,       PORT85_FN4, MSEL4CR_15_0),
+        PINMUX_DATA(MMCD0_2_MARK,       PORT86_FN4, MSEL4CR_15_0),
+        PINMUX_DATA(MMCD0_3_MARK,       PORT87_FN4, MSEL4CR_15_0),
+        PINMUX_DATA(MMCD0_4_MARK,       PORT88_FN4, MSEL4CR_15_0),
+        PINMUX_DATA(MMCD0_5_MARK,       PORT89_FN4, MSEL4CR_15_0),
+        PINMUX_DATA(MMCD0_6_MARK,       PORT90_FN4, MSEL4CR_15_0),
+        PINMUX_DATA(MMCD0_7_MARK,       PORT91_FN4, MSEL4CR_15_0),
+        PINMUX_DATA(MMCCMD0_MARK,       PORT92_FN4, MSEL4CR_15_0),
+        PINMUX_DATA(SIM_RST_MARK,       PORT94_FN4),
+        PINMUX_DATA(SIM_CLK_MARK,       PORT95_FN4),
+        PINMUX_DATA(SIM_D_MARK,         PORT98_FN4),
+        PINMUX_DATA(MMCCLK0_MARK,       PORT99_FN4, MSEL4CR_15_0),
+        PINMUX_DATA(IDIN_1_113_MARK,    PORT113_FN4, MSEL4CR_14_0),
+        PINMUX_DATA(OVCN_1_114_MARK,    PORT114_FN4, MSEL4CR_14_0),
+        PINMUX_DATA(PWEN_1_115_MARK,    PORT115_FN4),
+        PINMUX_DATA(EXTLP_1_MARK,       PORT116_FN4),
+        PINMUX_DATA(OVCN2_1_MARK,       PORT117_FN4),
+        PINMUX_DATA(KEYIN0_121_MARK,    PORT121_FN4, MSEL4CR_18_1),
+        PINMUX_DATA(KEYIN1_122_MARK,    PORT122_FN4, MSEL4CR_18_1),
+        PINMUX_DATA(KEYIN2_123_MARK,    PORT123_FN4, MSEL4CR_18_1),
+        PINMUX_DATA(KEYIN3_124_MARK,    PORT124_FN4, MSEL4CR_18_1),
+        PINMUX_DATA(PWEN_1_138_MARK,    PORT138_FN4),
+        PINMUX_DATA(IROUT_140_MARK,     PORT140_FN4),
+        PINMUX_DATA(LCDCS_MARK,         PORT145_FN4),
+        PINMUX_DATA(LCDWR_MARK,         PORT147_FN4),
+        PINMUX_DATA(LCDRS_MARK,         PORT149_FN4),
+        PINMUX_DATA(OVCN_1_162_MARK,    PORT162_FN4, MSEL4CR_14_1),
+
+        /* Function 5 */
+        PINMUX_DATA(GPI0_MARK,          PORT41_FN5),
+        PINMUX_DATA(GPI1_MARK,          PORT42_FN5),
+        PINMUX_DATA(GPO0_MARK,          PORT43_FN5),
+        PINMUX_DATA(GPO1_MARK,          PORT44_FN5),
+        PINMUX_DATA(I2C_SCL3S_MARK,     PORT137_FN5, MSEL4CR_16_0),
+        PINMUX_DATA(I2C_SDA3S_MARK,     PORT145_FN5, MSEL4CR_16_0),
+        PINMUX_DATA(I2C_SCL4S_MARK,     PORT146_FN5, MSEL4CR_17_0),
+        PINMUX_DATA(I2C_SDA4S_MARK,     PORT147_FN5, MSEL4CR_17_0),
+
+        /* Function select */
+        PINMUX_DATA(LCDC0_SELECT_MARK,  MSEL3CR_6_0),
+        PINMUX_DATA(LCDC1_SELECT_MARK,  MSEL3CR_6_1),
+
+        PINMUX_DATA(TS0_1SELECT_MARK,   MSEL3CR_21_0, MSEL3CR_20_0),
+        PINMUX_DATA(TS0_2SELECT_MARK,   MSEL3CR_21_0, MSEL3CR_20_1),
+        PINMUX_DATA(TS1_1SELECT_MARK,   MSEL3CR_27_0, MSEL3CR_26_0),
+        PINMUX_DATA(TS1_2SELECT_MARK,   MSEL3CR_27_0, MSEL3CR_26_1),
+
+        PINMUX_DATA(SDENC_CPG_MARK,     MSEL4CR_19_0),
+        PINMUX_DATA(SDENC_DV_CLKI_MARK, MSEL4CR_19_1),
+
+        PINMUX_DATA(MFIv6_MARK,         MSEL4CR_6_0),
+        PINMUX_DATA(MFIv4_MARK,         MSEL4CR_6_1),
+};
+
+#define _GPIO_PORT(pfx, sfx) PINMUX_GPIO(GPIO_PORT##pfx, PORT##pfx##_DATA)
+#define GPIO_PORT_ALL() _190(_GPIO_PORT, , unused)
+#define GPIO_FN(str) PINMUX_GPIO(GPIO_FN_##str, str##_MARK)
+
+static struct pinmux_gpio pinmux_gpios[] = {
+
+        /* PORT */
+        GPIO_PORT_ALL(),
+
+        /* IRQ */
+        GPIO_FN(IRQ0_6),        GPIO_FN(IRQ0_162),      GPIO_FN(IRQ1),
+        GPIO_FN(IRQ2_4),        GPIO_FN(IRQ2_5),        GPIO_FN(IRQ3_8),
+        GPIO_FN(IRQ3_16),       GPIO_FN(IRQ4_17),       GPIO_FN(IRQ4_163),
+        GPIO_FN(IRQ5),          GPIO_FN(IRQ6_39),       GPIO_FN(IRQ6_164),
+        GPIO_FN(IRQ7_40),       GPIO_FN(IRQ7_167),      GPIO_FN(IRQ8_41),
+        GPIO_FN(IRQ8_168),      GPIO_FN(IRQ9_42),       GPIO_FN(IRQ9_169),
+        GPIO_FN(IRQ10),         GPIO_FN(IRQ11),         GPIO_FN(IRQ12_80),
+        GPIO_FN(IRQ12_137),     GPIO_FN(IRQ13_81),      GPIO_FN(IRQ13_145),
+        GPIO_FN(IRQ14_82),      GPIO_FN(IRQ14_146),     GPIO_FN(IRQ15_83),
+        GPIO_FN(IRQ15_147),     GPIO_FN(IRQ16_84),      GPIO_FN(IRQ16_170),
+        GPIO_FN(IRQ17),         GPIO_FN(IRQ18),         GPIO_FN(IRQ19),
+        GPIO_FN(IRQ20),         GPIO_FN(IRQ21),         GPIO_FN(IRQ22),
+        GPIO_FN(IRQ23),         GPIO_FN(IRQ24),         GPIO_FN(IRQ25),
+        GPIO_FN(IRQ26_121),     GPIO_FN(IRQ26_172),     GPIO_FN(IRQ27_122),
+        GPIO_FN(IRQ27_180),     GPIO_FN(IRQ28_123),     GPIO_FN(IRQ28_181),
+        GPIO_FN(IRQ29_129),     GPIO_FN(IRQ29_182),     GPIO_FN(IRQ30_130),
+        GPIO_FN(IRQ30_183),     GPIO_FN(IRQ31_138),     GPIO_FN(IRQ31_184),
+
+        /* MSIOF0 */
+        GPIO_FN(MSIOF0_TSYNC),  GPIO_FN(MSIOF0_TSCK),   GPIO_FN(MSIOF0_RXD),
+        GPIO_FN(MSIOF0_RSCK),   GPIO_FN(MSIOF0_RSYNC),  GPIO_FN(MSIOF0_MCK0),
+        GPIO_FN(MSIOF0_MCK1),   GPIO_FN(MSIOF0_SS1),    GPIO_FN(MSIOF0_SS2),
+        GPIO_FN(MSIOF0_TXD),
+
+        /* MSIOF1 */
+        GPIO_FN(MSIOF1_TSCK_39),        GPIO_FN(MSIOF1_TSCK_88),
+        GPIO_FN(MSIOF1_TSYNC_40),       GPIO_FN(MSIOF1_TSYNC_89),
+        GPIO_FN(MSIOF1_TXD_41),         GPIO_FN(MSIOF1_TXD_90),
+        GPIO_FN(MSIOF1_RXD_42),         GPIO_FN(MSIOF1_RXD_91),
+        GPIO_FN(MSIOF1_SS1_43),         GPIO_FN(MSIOF1_SS1_92),
+        GPIO_FN(MSIOF1_SS2_44),         GPIO_FN(MSIOF1_SS2_93),
+        GPIO_FN(MSIOF1_RSCK),           GPIO_FN(MSIOF1_RSYNC),
+        GPIO_FN(MSIOF1_MCK0),           GPIO_FN(MSIOF1_MCK1),
+
+        /* MSIOF2 */
+        GPIO_FN(MSIOF2_RSCK),   GPIO_FN(MSIOF2_RSYNC),  GPIO_FN(MSIOF2_MCK0),
+        GPIO_FN(MSIOF2_MCK1),   GPIO_FN(MSIOF2_SS1),    GPIO_FN(MSIOF2_SS2),
+        GPIO_FN(MSIOF2_TSYNC),  GPIO_FN(MSIOF2_TSCK),   GPIO_FN(MSIOF2_RXD),
+        GPIO_FN(MSIOF2_TXD),
+
+        /* MSIOF3 */
+        GPIO_FN(BBIF1_RXD),     GPIO_FN(BBIF1_TSYNC),   GPIO_FN(BBIF1_TSCK),
+        GPIO_FN(BBIF1_TXD),     GPIO_FN(BBIF1_RSCK),    GPIO_FN(BBIF1_RSYNC),
+        GPIO_FN(BBIF1_FLOW),    GPIO_FN(BB_RX_FLOW_N),
+
+        /* MSIOF4 */
+        GPIO_FN(BBIF2_TSCK1),   GPIO_FN(BBIF2_TSYNC1),
+        GPIO_FN(BBIF2_TXD1),    GPIO_FN(BBIF2_RXD),
+
+        /* FSI */
+        GPIO_FN(FSIACK),        GPIO_FN(FSIBCK),        GPIO_FN(FSIAILR),
+        GPIO_FN(FSIAIBT),       GPIO_FN(FSIAISLD),      GPIO_FN(FSIAOMC),
+        GPIO_FN(FSIAOLR),       GPIO_FN(FSIAOBT),       GPIO_FN(FSIAOSLD),
+        GPIO_FN(FSIASPDIF_11),  GPIO_FN(FSIASPDIF_15),
+
+        /* FMSI */
+        GPIO_FN(FMSOCK),        GPIO_FN(FMSOOLR),       GPIO_FN(FMSIOLR),
+        GPIO_FN(FMSOOBT),       GPIO_FN(FMSIOBT),       GPIO_FN(FMSOSLD),
+        GPIO_FN(FMSOILR),       GPIO_FN(FMSIILR),       GPIO_FN(FMSOIBT),
+        GPIO_FN(FMSIIBT),       GPIO_FN(FMSISLD),       GPIO_FN(FMSICK),
+
+        /* SCIFA0 */
+        GPIO_FN(SCIFA0_TXD),    GPIO_FN(SCIFA0_RXD),    GPIO_FN(SCIFA0_SCK),
+        GPIO_FN(SCIFA0_RTS),    GPIO_FN(SCIFA0_CTS),
+
+        /* SCIFA1 */
+        GPIO_FN(SCIFA1_TXD),    GPIO_FN(SCIFA1_RXD),    GPIO_FN(SCIFA1_SCK),
+        GPIO_FN(SCIFA1_RTS),    GPIO_FN(SCIFA1_CTS),
+
+        /* SCIFA2 */
+        GPIO_FN(SCIFA2_CTS1),   GPIO_FN(SCIFA2_RTS1),   GPIO_FN(SCIFA2_TXD1),
+        GPIO_FN(SCIFA2_RXD1),   GPIO_FN(SCIFA2_SCK1),
+
+        /* SCIFA3 */
+        GPIO_FN(SCIFA3_CTS_43),         GPIO_FN(SCIFA3_CTS_140),
+        GPIO_FN(SCIFA3_RTS_44),         GPIO_FN(SCIFA3_RTS_141),
+        GPIO_FN(SCIFA3_SCK),            GPIO_FN(SCIFA3_TXD),
+        GPIO_FN(SCIFA3_RXD),
+
+        /* SCIFA4 */
+        GPIO_FN(SCIFA4_RXD),    GPIO_FN(SCIFA4_TXD),
+
+        /* SCIFA5 */
+        GPIO_FN(SCIFA5_RXD),    GPIO_FN(SCIFA5_TXD),
+
+        /* SCIFB */
+        GPIO_FN(SCIFB_SCK),     GPIO_FN(SCIFB_RTS),     GPIO_FN(SCIFB_CTS),
+        GPIO_FN(SCIFB_TXD),     GPIO_FN(SCIFB_RXD),
+
+        /* CEU */
+        GPIO_FN(VIO_HD),        GPIO_FN(VIO_CKO1),      GPIO_FN(VIO_CKO2),
+        GPIO_FN(VIO_VD),        GPIO_FN(VIO_CLK),       GPIO_FN(VIO_FIELD),
+        GPIO_FN(VIO_CKO),       GPIO_FN(VIO_D0),        GPIO_FN(VIO_D1),
+        GPIO_FN(VIO_D2),        GPIO_FN(VIO_D3),        GPIO_FN(VIO_D4),
+        GPIO_FN(VIO_D5),        GPIO_FN(VIO_D6),        GPIO_FN(VIO_D7),
+        GPIO_FN(VIO_D8),        GPIO_FN(VIO_D9),        GPIO_FN(VIO_D10),
+        GPIO_FN(VIO_D11),       GPIO_FN(VIO_D12),       GPIO_FN(VIO_D13),
+        GPIO_FN(VIO_D14),       GPIO_FN(VIO_D15),
+
+        /* USB0 */
+        GPIO_FN(IDIN_0),        GPIO_FN(EXTLP_0),       GPIO_FN(OVCN2_0),
+        GPIO_FN(PWEN_0),        GPIO_FN(OVCN_0),        GPIO_FN(VBUS0_0),
+
+        /* USB1 */
+        GPIO_FN(IDIN_1_18),     GPIO_FN(IDIN_1_113),
+        GPIO_FN(OVCN_1_114),    GPIO_FN(OVCN_1_162),
+        GPIO_FN(PWEN_1_115),    GPIO_FN(PWEN_1_138),
+        GPIO_FN(EXTLP_1),       GPIO_FN(OVCN2_1),
+        GPIO_FN(VBUS0_1),
+
+        /* GPIO */
+        GPIO_FN(GPI0),  GPIO_FN(GPI1),  GPIO_FN(GPO0),  GPIO_FN(GPO1),
+
+        /* BSC */
+        GPIO_FN(BS),    GPIO_FN(WE1),   GPIO_FN(CKO),
+        GPIO_FN(WAIT),  GPIO_FN(RDWR),
+
+        GPIO_FN(A0),    GPIO_FN(A1),    GPIO_FN(A2),
+        GPIO_FN(A3),    GPIO_FN(A6),    GPIO_FN(A7),
+        GPIO_FN(A8),    GPIO_FN(A9),    GPIO_FN(A10),
+        GPIO_FN(A11),   GPIO_FN(A12),   GPIO_FN(A13),
+        GPIO_FN(A14),   GPIO_FN(A15),   GPIO_FN(A16),
+        GPIO_FN(A17),   GPIO_FN(A18),   GPIO_FN(A19),
+        GPIO_FN(A20),   GPIO_FN(A21),   GPIO_FN(A22),
+        GPIO_FN(A23),   GPIO_FN(A24),   GPIO_FN(A25),
+        GPIO_FN(A26),
+
+        GPIO_FN(CS0),   GPIO_FN(CS2),   GPIO_FN(CS4),
+        GPIO_FN(CS5A),  GPIO_FN(CS5B),  GPIO_FN(CS6A),
+
+        /* BSC/FLCTL */
+        GPIO_FN(RD_FSC),        GPIO_FN(WE0_FWE),       GPIO_FN(A4_FOE),
+        GPIO_FN(A5_FCDE),       GPIO_FN(D0_NAF0),       GPIO_FN(D1_NAF1),
+        GPIO_FN(D2_NAF2),       GPIO_FN(D3_NAF3),       GPIO_FN(D4_NAF4),
+        GPIO_FN(D5_NAF5),       GPIO_FN(D6_NAF6),       GPIO_FN(D7_NAF7),
+        GPIO_FN(D8_NAF8),       GPIO_FN(D9_NAF9),       GPIO_FN(D10_NAF10),
+        GPIO_FN(D11_NAF11),     GPIO_FN(D12_NAF12),     GPIO_FN(D13_NAF13),
+        GPIO_FN(D14_NAF14),     GPIO_FN(D15_NAF15),
+
+        /* MMCIF(1) */
+        GPIO_FN(MMCD0_0),       GPIO_FN(MMCD0_1),       GPIO_FN(MMCD0_2),
+        GPIO_FN(MMCD0_3),       GPIO_FN(MMCD0_4),       GPIO_FN(MMCD0_5),
+        GPIO_FN(MMCD0_6),       GPIO_FN(MMCD0_7),       GPIO_FN(MMCCMD0),
+        GPIO_FN(MMCCLK0),
+
+        /* MMCIF(2) */
+        GPIO_FN(MMCD1_0),       GPIO_FN(MMCD1_1),       GPIO_FN(MMCD1_2),
+        GPIO_FN(MMCD1_3),       GPIO_FN(MMCD1_4),       GPIO_FN(MMCD1_5),
+        GPIO_FN(MMCD1_6),       GPIO_FN(MMCD1_7),       GPIO_FN(MMCCLK1),
+        GPIO_FN(MMCCMD1),
+
+        /* SPU2 */
+        GPIO_FN(VINT_I),
+
+        /* FLCTL */
+        GPIO_FN(FCE1),  GPIO_FN(FCE0),  GPIO_FN(FRB),
+
+        /* HSI */
+        GPIO_FN(GP_RX_FLAG),    GPIO_FN(GP_RX_DATA),    GPIO_FN(GP_TX_READY),
+        GPIO_FN(GP_RX_WAKE),    GPIO_FN(MP_TX_FLAG),    GPIO_FN(MP_TX_DATA),
+        GPIO_FN(MP_RX_READY),   GPIO_FN(MP_TX_WAKE),
+
+        /* MFI */
+        GPIO_FN(MFIv6),
+        GPIO_FN(MFIv4),
+
+        GPIO_FN(MEMC_BUSCLK_MEMC_A0),   GPIO_FN(MEMC_ADV_MEMC_DREQ0),
+        GPIO_FN(MEMC_WAIT_MEMC_DREQ1),  GPIO_FN(MEMC_CS1_MEMC_A1),
+        GPIO_FN(MEMC_CS0),      GPIO_FN(MEMC_NOE),
+        GPIO_FN(MEMC_NWE),      GPIO_FN(MEMC_INT),
+
+        GPIO_FN(MEMC_AD0),      GPIO_FN(MEMC_AD1),      GPIO_FN(MEMC_AD2),
+        GPIO_FN(MEMC_AD3),      GPIO_FN(MEMC_AD4),      GPIO_FN(MEMC_AD5),
+        GPIO_FN(MEMC_AD6),      GPIO_FN(MEMC_AD7),      GPIO_FN(MEMC_AD8),
+        GPIO_FN(MEMC_AD9),      GPIO_FN(MEMC_AD10),     GPIO_FN(MEMC_AD11),
+        GPIO_FN(MEMC_AD12),     GPIO_FN(MEMC_AD13),     GPIO_FN(MEMC_AD14),
+        GPIO_FN(MEMC_AD15),
+
+        /* SIM */
+        GPIO_FN(SIM_RST),       GPIO_FN(SIM_CLK),       GPIO_FN(SIM_D),
+
+        /* TPU */
+        GPIO_FN(TPU0TO0),       GPIO_FN(TPU0TO1),       GPIO_FN(TPU0TO2_93),
+        GPIO_FN(TPU0TO2_99),    GPIO_FN(TPU0TO3),
+
+        /* I2C2 */
+        GPIO_FN(I2C_SCL2),      GPIO_FN(I2C_SDA2),
+
+        /* I2C3(1) */
+        GPIO_FN(I2C_SCL3),      GPIO_FN(I2C_SDA3),
+
+        /* I2C3(2) */
+        GPIO_FN(I2C_SCL3S),     GPIO_FN(I2C_SDA3S),
+
+        /* I2C4(2) */
+        GPIO_FN(I2C_SCL4),      GPIO_FN(I2C_SDA4),
+
+        /* I2C4(2) */
+        GPIO_FN(I2C_SCL4S),     GPIO_FN(I2C_SDA4S),
+
+        /* KEYSC */
+        GPIO_FN(KEYOUT0),       GPIO_FN(KEYIN0_121),    GPIO_FN(KEYIN0_136),
+        GPIO_FN(KEYOUT1),       GPIO_FN(KEYIN1_122),    GPIO_FN(KEYIN1_135),
+        GPIO_FN(KEYOUT2),       GPIO_FN(KEYIN2_123),    GPIO_FN(KEYIN2_134),
+        GPIO_FN(KEYOUT3),       GPIO_FN(KEYIN3_124),    GPIO_FN(KEYIN3_133),
+        GPIO_FN(KEYOUT4),       GPIO_FN(KEYIN4),        GPIO_FN(KEYOUT5),
+        GPIO_FN(KEYIN5),        GPIO_FN(KEYOUT6),       GPIO_FN(KEYIN6),
+        GPIO_FN(KEYOUT7),       GPIO_FN(KEYIN7),
+
+        /* LCDC */
+        GPIO_FN(LCDHSYN),       GPIO_FN(LCDCS), GPIO_FN(LCDVSYN),
+        GPIO_FN(LCDDCK),        GPIO_FN(LCDWR), GPIO_FN(LCDRD),
+        GPIO_FN(LCDDISP),       GPIO_FN(LCDRS), GPIO_FN(LCDLCLK),
+        GPIO_FN(LCDDON),
+
+        GPIO_FN(LCDD0),         GPIO_FN(LCDD1),         GPIO_FN(LCDD2),
+        GPIO_FN(LCDD3),         GPIO_FN(LCDD4),         GPIO_FN(LCDD5),
+        GPIO_FN(LCDD6),         GPIO_FN(LCDD7),         GPIO_FN(LCDD8),
+        GPIO_FN(LCDD9),         GPIO_FN(LCDD10),        GPIO_FN(LCDD11),
+        GPIO_FN(LCDD12),        GPIO_FN(LCDD13),        GPIO_FN(LCDD14),
+        GPIO_FN(LCDD15),        GPIO_FN(LCDD16),        GPIO_FN(LCDD17),
+        GPIO_FN(LCDD18),        GPIO_FN(LCDD19),        GPIO_FN(LCDD20),
+        GPIO_FN(LCDD21),        GPIO_FN(LCDD22),        GPIO_FN(LCDD23),
+
+        /* IRDA */
+        GPIO_FN(IRDA_OUT),      GPIO_FN(IRDA_IN),       GPIO_FN(IRDA_FIRSEL),
+        GPIO_FN(IROUT_139),     GPIO_FN(IROUT_140),
+
+        /* TSIF1 */
+        GPIO_FN(TS0_1SELECT),
+        GPIO_FN(TS0_2SELECT),
+        GPIO_FN(TS1_1SELECT),
+        GPIO_FN(TS1_2SELECT),
+
+        GPIO_FN(TS_SPSYNC1),    GPIO_FN(TS_SDAT1),
+        GPIO_FN(TS_SDEN1),      GPIO_FN(TS_SCK1),
+
+        /* TSIF2 */
+        GPIO_FN(TS_SPSYNC2),    GPIO_FN(TS_SDAT2),
+        GPIO_FN(TS_SDEN2),      GPIO_FN(TS_SCK2),
+
+        /* HDMI */
+        GPIO_FN(HDMI_HPD),      GPIO_FN(HDMI_CEC),
+
+        /* SDHI0 */
+        GPIO_FN(SDHICLK0),      GPIO_FN(SDHICD0),       GPIO_FN(SDHICMD0),
+        GPIO_FN(SDHIWP0),       GPIO_FN(SDHID0_0),      GPIO_FN(SDHID0_1),
+        GPIO_FN(SDHID0_2),      GPIO_FN(SDHID0_3),
+
+        /* SDHI1 */
+        GPIO_FN(SDHICLK1),      GPIO_FN(SDHICMD1),      GPIO_FN(SDHID1_0),
+        GPIO_FN(SDHID1_1),      GPIO_FN(SDHID1_2),      GPIO_FN(SDHID1_3),
+
+        /* SDHI2 */
+        GPIO_FN(SDHICLK2),      GPIO_FN(SDHICMD2),      GPIO_FN(SDHID2_0),
+        GPIO_FN(SDHID2_1),      GPIO_FN(SDHID2_2),      GPIO_FN(SDHID2_3),
+
+        /* SDENC */
+        GPIO_FN(SDENC_CPG),
+        GPIO_FN(SDENC_DV_CLKI),
+};
+
+/* helper for top 4 bits in PORTnCR */
+#define PCRH(in, in_pd, in_pu, out)             \
+        0, (out), (in), 0,                      \
+        0, 0, 0, 0,                             \
+        0, 0, (in_pd), 0,                       \
+        0, 0, (in_pu), 0
+
+#define PORTCR(nr, reg)                                         \
+        { PINMUX_CFG_REG("PORT" nr "CR", reg, 8, 4) {           \
+                PCRH(PORT##nr##_IN, PORT##nr##_IN_PD,           \
+                     PORT##nr##_IN_PU, PORT##nr##_OUT),         \
+                PORT##nr##_FN0, PORT##nr##_FN1, PORT##nr##_FN2, \
+                PORT##nr##_FN3, PORT##nr##_FN4, PORT##nr##_FN5, \
+                PORT##nr##_FN6, PORT##nr##_FN7 }                \
+        }
+
+static struct pinmux_cfg_reg pinmux_config_regs[] = {
+        PORTCR(0,       0xE6051000), /* PORT0CR */
+        PORTCR(1,       0xE6051001), /* PORT1CR */
+        PORTCR(2,       0xE6051002), /* PORT2CR */
+        PORTCR(3,       0xE6051003), /* PORT3CR */
+        PORTCR(4,       0xE6051004), /* PORT4CR */
+        PORTCR(5,       0xE6051005), /* PORT5CR */
+        PORTCR(6,       0xE6051006), /* PORT6CR */
+        PORTCR(7,       0xE6051007), /* PORT7CR */
+        PORTCR(8,       0xE6051008), /* PORT8CR */
+        PORTCR(9,       0xE6051009), /* PORT9CR */
+        PORTCR(10,      0xE605100A), /* PORT10CR */
+        PORTCR(11,      0xE605100B), /* PORT11CR */
+        PORTCR(12,      0xE605100C), /* PORT12CR */
+        PORTCR(13,      0xE605100D), /* PORT13CR */
+        PORTCR(14,      0xE605100E), /* PORT14CR */
+        PORTCR(15,      0xE605100F), /* PORT15CR */
+        PORTCR(16,      0xE6051010), /* PORT16CR */
+        PORTCR(17,      0xE6051011), /* PORT17CR */
+        PORTCR(18,      0xE6051012), /* PORT18CR */
+        PORTCR(19,      0xE6051013), /* PORT19CR */
+        PORTCR(20,      0xE6051014), /* PORT20CR */
+        PORTCR(21,      0xE6051015), /* PORT21CR */
+        PORTCR(22,      0xE6051016), /* PORT22CR */
+        PORTCR(23,      0xE6051017), /* PORT23CR */
+        PORTCR(24,      0xE6051018), /* PORT24CR */
+        PORTCR(25,      0xE6051019), /* PORT25CR */
+        PORTCR(26,      0xE605101A), /* PORT26CR */
+        PORTCR(27,      0xE605101B), /* PORT27CR */
+        PORTCR(28,      0xE605101C), /* PORT28CR */
+        PORTCR(29,      0xE605101D), /* PORT29CR */
+        PORTCR(30,      0xE605101E), /* PORT30CR */
+        PORTCR(31,      0xE605101F), /* PORT31CR */
+        PORTCR(32,      0xE6051020), /* PORT32CR */
+        PORTCR(33,      0xE6051021), /* PORT33CR */
+        PORTCR(34,      0xE6051022), /* PORT34CR */
+        PORTCR(35,      0xE6051023), /* PORT35CR */
+        PORTCR(36,      0xE6051024), /* PORT36CR */
+        PORTCR(37,      0xE6051025), /* PORT37CR */
+        PORTCR(38,      0xE6051026), /* PORT38CR */
+        PORTCR(39,      0xE6051027), /* PORT39CR */
+        PORTCR(40,      0xE6051028), /* PORT40CR */
+        PORTCR(41,      0xE6051029), /* PORT41CR */
+        PORTCR(42,      0xE605102A), /* PORT42CR */
+        PORTCR(43,      0xE605102B), /* PORT43CR */
+        PORTCR(44,      0xE605102C), /* PORT44CR */
+        PORTCR(45,      0xE605102D), /* PORT45CR */
+        PORTCR(46,      0xE605202E), /* PORT46CR */
+        PORTCR(47,      0xE605202F), /* PORT47CR */
+        PORTCR(48,      0xE6052030), /* PORT48CR */
+        PORTCR(49,      0xE6052031), /* PORT49CR */
+        PORTCR(50,      0xE6052032), /* PORT50CR */
+        PORTCR(51,      0xE6052033), /* PORT51CR */
+        PORTCR(52,      0xE6052034), /* PORT52CR */
+        PORTCR(53,      0xE6052035), /* PORT53CR */
+        PORTCR(54,      0xE6052036), /* PORT54CR */
+        PORTCR(55,      0xE6052037), /* PORT55CR */
+        PORTCR(56,      0xE6052038), /* PORT56CR */
+        PORTCR(57,      0xE6052039), /* PORT57CR */
+        PORTCR(58,      0xE605203A), /* PORT58CR */
+        PORTCR(59,      0xE605203B), /* PORT59CR */
+        PORTCR(60,      0xE605203C), /* PORT60CR */
+        PORTCR(61,      0xE605203D), /* PORT61CR */
+        PORTCR(62,      0xE605203E), /* PORT62CR */
+        PORTCR(63,      0xE605203F), /* PORT63CR */
+        PORTCR(64,      0xE6052040), /* PORT64CR */
+        PORTCR(65,      0xE6052041), /* PORT65CR */
+        PORTCR(66,      0xE6052042), /* PORT66CR */
+        PORTCR(67,      0xE6052043), /* PORT67CR */
+        PORTCR(68,      0xE6052044), /* PORT68CR */
+        PORTCR(69,      0xE6052045), /* PORT69CR */
+        PORTCR(70,      0xE6052046), /* PORT70CR */
+        PORTCR(71,      0xE6052047), /* PORT71CR */
+        PORTCR(72,      0xE6052048), /* PORT72CR */
+        PORTCR(73,      0xE6052049), /* PORT73CR */
+        PORTCR(74,      0xE605204A), /* PORT74CR */
+        PORTCR(75,      0xE605204B), /* PORT75CR */
+        PORTCR(76,      0xE605004C), /* PORT76CR */
+        PORTCR(77,      0xE605004D), /* PORT77CR */
+        PORTCR(78,      0xE605004E), /* PORT78CR */
+        PORTCR(79,      0xE605004F), /* PORT79CR */
+        PORTCR(80,      0xE6050050), /* PORT80CR */
+        PORTCR(81,      0xE6050051), /* PORT81CR */
+        PORTCR(82,      0xE6050052), /* PORT82CR */
+        PORTCR(83,      0xE6050053), /* PORT83CR */
+        PORTCR(84,      0xE6050054), /* PORT84CR */
+        PORTCR(85,      0xE6050055), /* PORT85CR */
+        PORTCR(86,      0xE6050056), /* PORT86CR */
+        PORTCR(87,      0xE6050057), /* PORT87CR */
+        PORTCR(88,      0xE6050058), /* PORT88CR */
+        PORTCR(89,      0xE6050059), /* PORT89CR */
+        PORTCR(90,      0xE605005A), /* PORT90CR */
+        PORTCR(91,      0xE605005B), /* PORT91CR */
+        PORTCR(92,      0xE605005C), /* PORT92CR */
+        PORTCR(93,      0xE605005D), /* PORT93CR */
+        PORTCR(94,      0xE605005E), /* PORT94CR */
+        PORTCR(95,      0xE605005F), /* PORT95CR */
+        PORTCR(96,      0xE6050060), /* PORT96CR */
+        PORTCR(97,      0xE6050061), /* PORT97CR */
+        PORTCR(98,      0xE6050062), /* PORT98CR */
+        PORTCR(99,      0xE6050063), /* PORT99CR */
+        PORTCR(100,     0xE6053064), /* PORT100CR */
+        PORTCR(101,     0xE6053065), /* PORT101CR */
+        PORTCR(102,     0xE6053066), /* PORT102CR */
+        PORTCR(103,     0xE6053067), /* PORT103CR */
+        PORTCR(104,     0xE6053068), /* PORT104CR */
+        PORTCR(105,     0xE6053069), /* PORT105CR */
+        PORTCR(106,     0xE605306A), /* PORT106CR */
+        PORTCR(107,     0xE605306B), /* PORT107CR */
+        PORTCR(108,     0xE605306C), /* PORT108CR */
+        PORTCR(109,     0xE605306D), /* PORT109CR */
+        PORTCR(110,     0xE605306E), /* PORT110CR */
+        PORTCR(111,     0xE605306F), /* PORT111CR */
+        PORTCR(112,     0xE6053070), /* PORT112CR */
+        PORTCR(113,     0xE6053071), /* PORT113CR */
+        PORTCR(114,     0xE6053072), /* PORT114CR */
+        PORTCR(115,     0xE6053073), /* PORT115CR */
+        PORTCR(116,     0xE6053074), /* PORT116CR */
+        PORTCR(117,     0xE6053075), /* PORT117CR */
+        PORTCR(118,     0xE6053076), /* PORT118CR */
+        PORTCR(119,     0xE6053077), /* PORT119CR */
+        PORTCR(120,     0xE6053078), /* PORT120CR */
+        PORTCR(121,     0xE6050079), /* PORT121CR */
+        PORTCR(122,     0xE605007A), /* PORT122CR */
+        PORTCR(123,     0xE605007B), /* PORT123CR */
+        PORTCR(124,     0xE605007C), /* PORT124CR */
+        PORTCR(125,     0xE605007D), /* PORT125CR */
+        PORTCR(126,     0xE605007E), /* PORT126CR */
+        PORTCR(127,     0xE605007F), /* PORT127CR */
+        PORTCR(128,     0xE6050080), /* PORT128CR */
+        PORTCR(129,     0xE6050081), /* PORT129CR */
+        PORTCR(130,     0xE6050082), /* PORT130CR */
+        PORTCR(131,     0xE6050083), /* PORT131CR */
+        PORTCR(132,     0xE6050084), /* PORT132CR */
+        PORTCR(133,     0xE6050085), /* PORT133CR */
+        PORTCR(134,     0xE6050086), /* PORT134CR */
+        PORTCR(135,     0xE6050087), /* PORT135CR */
+        PORTCR(136,     0xE6050088), /* PORT136CR */
+        PORTCR(137,     0xE6050089), /* PORT137CR */
+        PORTCR(138,     0xE605008A), /* PORT138CR */
+        PORTCR(139,     0xE605008B), /* PORT139CR */
+        PORTCR(140,     0xE605008C), /* PORT140CR */
+        PORTCR(141,     0xE605008D), /* PORT141CR */
+        PORTCR(142,     0xE605008E), /* PORT142CR */
+        PORTCR(143,     0xE605008F), /* PORT143CR */
+        PORTCR(144,     0xE6050090), /* PORT144CR */
+        PORTCR(145,     0xE6050091), /* PORT145CR */
+        PORTCR(146,     0xE6050092), /* PORT146CR */
+        PORTCR(147,     0xE6050093), /* PORT147CR */
+        PORTCR(148,     0xE6050094), /* PORT148CR */
+        PORTCR(149,     0xE6050095), /* PORT149CR */
+        PORTCR(150,     0xE6050096), /* PORT150CR */
+        PORTCR(151,     0xE6050097), /* PORT151CR */
+        PORTCR(152,     0xE6053098), /* PORT152CR */
+        PORTCR(153,     0xE6053099), /* PORT153CR */
+        PORTCR(154,     0xE605309A), /* PORT154CR */
+        PORTCR(155,     0xE605309B), /* PORT155CR */
+        PORTCR(156,     0xE605009C), /* PORT156CR */
+        PORTCR(157,     0xE605009D), /* PORT157CR */
+        PORTCR(158,     0xE605009E), /* PORT158CR */
+        PORTCR(159,     0xE605009F), /* PORT159CR */
+        PORTCR(160,     0xE60500A0), /* PORT160CR */
+        PORTCR(161,     0xE60500A1), /* PORT161CR */
+        PORTCR(162,     0xE60500A2), /* PORT162CR */
+        PORTCR(163,     0xE60500A3), /* PORT163CR */
+        PORTCR(164,     0xE60500A4), /* PORT164CR */
+        PORTCR(165,     0xE60500A5), /* PORT165CR */
+        PORTCR(166,     0xE60500A6), /* PORT166CR */
+        PORTCR(167,     0xE60520A7), /* PORT167CR */
+        PORTCR(168,     0xE60520A8), /* PORT168CR */
+        PORTCR(169,     0xE60520A9), /* PORT169CR */
+        PORTCR(170,     0xE60520AA), /* PORT170CR */
+        PORTCR(171,     0xE60520AB), /* PORT171CR */
+        PORTCR(172,     0xE60520AC), /* PORT172CR */
+        PORTCR(173,     0xE60520AD), /* PORT173CR */
+        PORTCR(174,     0xE60520AE), /* PORT174CR */
+        PORTCR(175,     0xE60520AF), /* PORT175CR */
+        PORTCR(176,     0xE60520B0), /* PORT176CR */
+        PORTCR(177,     0xE60520B1), /* PORT177CR */
+        PORTCR(178,     0xE60520B2), /* PORT178CR */
+        PORTCR(179,     0xE60520B3), /* PORT179CR */
+        PORTCR(180,     0xE60520B4), /* PORT180CR */
+        PORTCR(181,     0xE60520B5), /* PORT181CR */
+        PORTCR(182,     0xE60520B6), /* PORT182CR */
+        PORTCR(183,     0xE60520B7), /* PORT183CR */
+        PORTCR(184,     0xE60520B8), /* PORT184CR */
+        PORTCR(185,     0xE60520B9), /* PORT185CR */
+        PORTCR(186,     0xE60520BA), /* PORT186CR */
+        PORTCR(187,     0xE60520BB), /* PORT187CR */
+        PORTCR(188,     0xE60520BC), /* PORT188CR */
+        PORTCR(189,     0xE60520BD), /* PORT189CR */
+        PORTCR(190,     0xE60520BE), /* PORT190CR */
+
+        { PINMUX_CFG_REG("MSEL1CR", 0xE605800C, 32, 1) {
+                        MSEL1CR_31_0,   MSEL1CR_31_1,
+                        MSEL1CR_30_0,   MSEL1CR_30_1,
+                        MSEL1CR_29_0,   MSEL1CR_29_1,
+                        MSEL1CR_28_0,   MSEL1CR_28_1,
+                        MSEL1CR_27_0,   MSEL1CR_27_1,
+                        MSEL1CR_26_0,   MSEL1CR_26_1,
+                        0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+                        0, 0, 0, 0, 0, 0, 0, 0,
+                        MSEL1CR_16_0,   MSEL1CR_16_1,
+                        MSEL1CR_15_0,   MSEL1CR_15_1,
+                        MSEL1CR_14_0,   MSEL1CR_14_1,
+                        MSEL1CR_13_0,   MSEL1CR_13_1,
+                        MSEL1CR_12_0,   MSEL1CR_12_1,
+                        0, 0, 0, 0,
+                        MSEL1CR_9_0,    MSEL1CR_9_1,
+                        MSEL1CR_8_0,    MSEL1CR_8_1,
+                        MSEL1CR_7_0,    MSEL1CR_7_1,
+                        MSEL1CR_6_0,    MSEL1CR_6_1,
+                        0, 0,
+                        MSEL1CR_4_0,    MSEL1CR_4_1,
+                        MSEL1CR_3_0,    MSEL1CR_3_1,
+                        MSEL1CR_2_0,    MSEL1CR_2_1,
+                        0, 0,
+                        MSEL1CR_0_0,    MSEL1CR_0_1,
+                }
+        },
+        { PINMUX_CFG_REG("MSEL3CR", 0xE6058020, 32, 1) {
+                        0, 0, 0, 0,
+                        0, 0, 0, 0,
+                        MSEL3CR_27_0,   MSEL3CR_27_1,
+                        MSEL3CR_26_0,   MSEL3CR_26_1,
+                        0, 0, 0, 0,
+                        0, 0, 0, 0,
+                        MSEL3CR_21_0,   MSEL3CR_21_1,
+                        MSEL3CR_20_0,   MSEL3CR_20_1,
+                        0, 0, 0, 0,
+                        0, 0, 0, 0,
+                        MSEL3CR_15_0,   MSEL3CR_15_1,
+                        0, 0, 0, 0,
+                        0, 0, 0, 0,
+                        0, 0,
+                        MSEL3CR_9_0,    MSEL3CR_9_1,
+                        0, 0, 0, 0,
+                        MSEL3CR_6_0,    MSEL3CR_6_1,
+                        0, 0, 0, 0,
+                        0, 0, 0, 0,
+                        0, 0, 0, 0,
+                        }
+        },
+        { PINMUX_CFG_REG("MSEL4CR", 0xE6058024, 32, 1) {
+                        0, 0, 0, 0,
+                        0, 0, 0, 0,
+                        0, 0, 0, 0,
+                        0, 0, 0, 0,
+                        0, 0, 0, 0,
+                        0, 0, 0, 0,
+                        MSEL4CR_19_0,   MSEL4CR_19_1,
+                        MSEL4CR_18_0,   MSEL4CR_18_1,
+                        MSEL4CR_17_0,   MSEL4CR_17_1,
+                        MSEL4CR_16_0,   MSEL4CR_16_1,
+                        MSEL4CR_15_0,   MSEL4CR_15_1,
+                        MSEL4CR_14_0,   MSEL4CR_14_1,
+                        0, 0, 0, 0,
+                        0, 0,
+                        MSEL4CR_10_0,   MSEL4CR_10_1,
+                        0, 0, 0, 0,
+                        0, 0,
+                        MSEL4CR_6_0,    MSEL4CR_6_1,
+                        0, 0,
+                        MSEL4CR_4_0,    MSEL4CR_4_1,
+                        0, 0, 0, 0,
+                        MSEL4CR_1_0,    MSEL4CR_1_1,
+                        0, 0,
+                }
+        },
+        { },
+};
+
+static struct pinmux_data_reg pinmux_data_regs[] = {
+        { PINMUX_DATA_REG("PORTL095_064DR", 0xE6054008, 32) {
+                        PORT95_DATA, PORT94_DATA, PORT93_DATA, PORT92_DATA,
+                        PORT91_DATA, PORT90_DATA, PORT89_DATA, PORT88_DATA,
+                        PORT87_DATA, PORT86_DATA, PORT85_DATA, PORT84_DATA,
+                        PORT83_DATA, PORT82_DATA, PORT81_DATA, PORT80_DATA,
+                        PORT79_DATA, PORT78_DATA, PORT77_DATA, PORT76_DATA,
+                        0, 0, 0, 0,
+                        0, 0, 0, 0,
+                        0, 0, 0, 0,
+                }
+        },
+        { PINMUX_DATA_REG("PORTL127_096DR", 0xE605400C, 32) {
+                        PORT127_DATA, PORT126_DATA, PORT125_DATA, PORT124_DATA,
+                        PORT123_DATA, PORT122_DATA, PORT121_DATA, 0,
+                        0, 0, 0, 0,
+                        0, 0, 0, 0,
+                        0, 0, 0, 0,
+                        0, 0, 0, 0,
+                        0, 0, 0, 0,
+                        PORT99_DATA,  PORT98_DATA,  PORT97_DATA,  PORT96_DATA,
+                }
+        },
+        { PINMUX_DATA_REG("PORTL159_128DR", 0xE6054010, 32) {
+                        PORT159_DATA, PORT158_DATA, PORT157_DATA, PORT156_DATA,
+                        0, 0, 0, 0,
+                        PORT151_DATA, PORT150_DATA, PORT149_DATA, PORT148_DATA,
+                        PORT147_DATA, PORT146_DATA, PORT145_DATA, PORT144_DATA,
+                        PORT143_DATA, PORT142_DATA, PORT141_DATA, PORT140_DATA,
+                        PORT139_DATA, PORT138_DATA, PORT137_DATA, PORT136_DATA,
+                        PORT135_DATA, PORT134_DATA, PORT133_DATA, PORT132_DATA,
+                        PORT131_DATA, PORT130_DATA, PORT129_DATA, PORT128_DATA,
+                }
+        },
+        { PINMUX_DATA_REG("PORTL191_160DR", 0xE6054014, 32) {
+                        0, 0, 0, 0,
+                        0, 0, 0, 0,
+                        0, 0, 0, 0,
+                        0, 0, 0, 0,
+                        0, 0, 0, 0,
+                        0, 0, 0, 0,
+                        0,            PORT166_DATA, PORT165_DATA, PORT164_DATA,
+                        PORT163_DATA, PORT162_DATA, PORT161_DATA, PORT160_DATA,
+                }
+        },
+        { PINMUX_DATA_REG("PORTD031_000DR", 0xE6055000, 32) {
+                        PORT31_DATA, PORT30_DATA, PORT29_DATA, PORT28_DATA,
+                        PORT27_DATA, PORT26_DATA, PORT25_DATA, PORT24_DATA,
+                        PORT23_DATA, PORT22_DATA, PORT21_DATA, PORT20_DATA,
+                        PORT19_DATA, PORT18_DATA, PORT17_DATA, PORT16_DATA,
+                        PORT15_DATA, PORT14_DATA, PORT13_DATA, PORT12_DATA,
+                        PORT11_DATA, PORT10_DATA, PORT9_DATA,  PORT8_DATA,
+                        PORT7_DATA,  PORT6_DATA,  PORT5_DATA,  PORT4_DATA,
+                        PORT3_DATA,  PORT2_DATA,  PORT1_DATA,  PORT0_DATA,
+                }
+        },
+        { PINMUX_DATA_REG("PORTD063_032DR", 0xE6055004, 32) {
+                        0, 0, 0, 0, 0, 0, 0, 0,
+                        0, 0, 0, 0, 0, 0, 0, 0,
+                        0,           0,           PORT45_DATA, PORT44_DATA,
+                        PORT43_DATA, PORT42_DATA, PORT41_DATA, PORT40_DATA,
+                        PORT39_DATA, PORT38_DATA, PORT37_DATA, PORT36_DATA,
+                        PORT35_DATA, PORT34_DATA, PORT33_DATA, PORT32_DATA,
+                }
+        },
+        { PINMUX_DATA_REG("PORTR063_032DR", 0xE6056004, 32) {
+                        PORT63_DATA, PORT62_DATA, PORT61_DATA, PORT60_DATA,
+                        PORT59_DATA, PORT58_DATA, PORT57_DATA, PORT56_DATA,
+                        PORT55_DATA, PORT54_DATA, PORT53_DATA, PORT52_DATA,
+                        PORT51_DATA, PORT50_DATA, PORT49_DATA, PORT48_DATA,
+                        PORT47_DATA, PORT46_DATA, 0, 0,
+                        0, 0, 0, 0,
+                        0, 0, 0, 0,
+                        0, 0, 0, 0,
+                }
+        },
+        { PINMUX_DATA_REG("PORTR095_064DR", 0xE6056008, 32) {
+                        0, 0, 0, 0,
+                        0, 0, 0, 0,
+                        0, 0, 0, 0,
+                        0, 0, 0, 0,
+                        0, 0, 0, 0,
+                        PORT75_DATA, PORT74_DATA, PORT73_DATA, PORT72_DATA,
+                        PORT71_DATA, PORT70_DATA, PORT69_DATA, PORT68_DATA,
+                        PORT67_DATA, PORT66_DATA, PORT65_DATA, PORT64_DATA,
+                }
+        },
+        { PINMUX_DATA_REG("PORTR191_160DR", 0xE6056014, 32) {
+                        0,            PORT190_DATA, PORT189_DATA, PORT188_DATA,
+                        PORT187_DATA, PORT186_DATA, PORT185_DATA, PORT184_DATA,
+                        PORT183_DATA, PORT182_DATA, PORT181_DATA, PORT180_DATA,
+                        PORT179_DATA, PORT178_DATA, PORT177_DATA, PORT176_DATA,
+                        PORT175_DATA, PORT174_DATA, PORT173_DATA, PORT172_DATA,
+                        PORT171_DATA, PORT170_DATA, PORT169_DATA, PORT168_DATA,
+                        PORT167_DATA, 0, 0, 0,
+                        0, 0, 0, 0,
+                }
+        },
+        { PINMUX_DATA_REG("PORTU127_096DR", 0xE605700C, 32) {
+                        0, 0, 0, 0,
+                        0, 0, 0, PORT120_DATA,
+                        PORT119_DATA, PORT118_DATA, PORT117_DATA, PORT116_DATA,
+                        PORT115_DATA, PORT114_DATA, PORT113_DATA, PORT112_DATA,
+                        PORT111_DATA, PORT110_DATA, PORT109_DATA, PORT108_DATA,
+                        PORT107_DATA, PORT106_DATA, PORT105_DATA, PORT104_DATA,
+                        PORT103_DATA, PORT102_DATA, PORT101_DATA, PORT100_DATA,
+                        0, 0, 0, 0,
+                }
+        },
+        { PINMUX_DATA_REG("PORTU159_128DR", 0xE6057010, 32) {
+                        0, 0, 0, 0,
+                        PORT155_DATA, PORT154_DATA, PORT153_DATA, PORT152_DATA,
+                        0, 0, 0, 0,
+                        0, 0, 0, 0,
+                        0, 0, 0, 0,
+                        0, 0, 0, 0,
+                        0, 0, 0, 0,
+                        0, 0, 0, 0,
+                }
+        },
+        { },
+};
+
+static struct pinmux_info sh7372_pinmux_info = {
+        .name = "sh7372_pfc",
+        .reserved_id = PINMUX_RESERVED,
+        .data = { PINMUX_DATA_BEGIN, PINMUX_DATA_END },
+        .input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END },
+        .input_pu = { PINMUX_INPUT_PULLUP_BEGIN, PINMUX_INPUT_PULLUP_END },
+        .input_pd = { PINMUX_INPUT_PULLDOWN_BEGIN, PINMUX_INPUT_PULLDOWN_END },
+        .output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END },
+        .mark = { PINMUX_MARK_BEGIN, PINMUX_MARK_END },
+        .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
+
+        .first_gpio = GPIO_PORT0,
+        .last_gpio = GPIO_FN_SDENC_DV_CLKI,
+
+        .gpios = pinmux_gpios,
+        .cfg_regs = pinmux_config_regs,
+        .data_regs = pinmux_data_regs,
+
+        .gpio_data = pinmux_data,
+        .gpio_data_size = ARRAY_SIZE(pinmux_data),
+};
+
+void sh7372_pinmux_init(void)
+{
+        register_pinmux(&sh7372_pinmux_info);
+}
diff --git a/arch/arm/mach-shmobile/pfc-sh7377.c b/arch/arm/mach-shmobile/pfc-sh7377.c
new file mode 100644
index 000000000000..613e6842ad05
--- /dev/null
+++ b/arch/arm/mach-shmobile/pfc-sh7377.c
@@ -0,0 +1,1767 @@
+/*
+ * sh7377 processor support - PFC hardware block
+ *
+ * Copyright (C) 2010  NISHIMOTO Hiroki
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; version 2 of the
+ * License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/gpio.h>
+#include <mach/sh7377.h>
+
+#define _1(fn, pfx, sfx) fn(pfx, sfx)
+
+#define _10(fn, pfx, sfx)                               \
+        _1(fn, pfx##0, sfx), _1(fn, pfx##1, sfx),       \
+        _1(fn, pfx##2, sfx), _1(fn, pfx##3, sfx),       \
+        _1(fn, pfx##4, sfx), _1(fn, pfx##5, sfx),       \
+        _1(fn, pfx##6, sfx), _1(fn, pfx##7, sfx),       \
+        _1(fn, pfx##8, sfx), _1(fn, pfx##9, sfx)
+
+#define _90(fn, pfx, sfx)                               \
+        _10(fn, pfx##1, sfx), _10(fn, pfx##2, sfx),     \
+        _10(fn, pfx##3, sfx), _10(fn, pfx##4, sfx),     \
+        _10(fn, pfx##5, sfx), _10(fn, pfx##6, sfx),     \
+        _10(fn, pfx##7, sfx), _10(fn, pfx##8, sfx),     \
+        _10(fn, pfx##9, sfx)
+
+#define _265(fn, pfx, sfx)                              \
+        _10(fn, pfx, sfx), _90(fn, pfx, sfx),           \
+        _10(fn, pfx##10, sfx),                          \
+        _1(fn, pfx##110, sfx), _1(fn, pfx##111, sfx),   \
+        _1(fn, pfx##112, sfx), _1(fn, pfx##113, sfx),   \
+        _1(fn, pfx##114, sfx), _1(fn, pfx##115, sfx),   \
+        _1(fn, pfx##116, sfx), _1(fn, pfx##117, sfx),   \
+        _1(fn, pfx##118, sfx),                          \
+        _1(fn, pfx##128, sfx), _1(fn, pfx##129, sfx),   \
+        _10(fn, pfx##13, sfx), _10(fn, pfx##14, sfx),   \
+        _10(fn, pfx##15, sfx),                          \
+        _1(fn, pfx##160, sfx), _1(fn, pfx##161, sfx),   \
+        _1(fn, pfx##162, sfx), _1(fn, pfx##163, sfx),   \
+        _1(fn, pfx##164, sfx),                          \
+        _1(fn, pfx##192, sfx), _1(fn, pfx##193, sfx),   \
+        _1(fn, pfx##194, sfx), _1(fn, pfx##195, sfx),   \
+        _1(fn, pfx##196, sfx), _1(fn, pfx##197, sfx),   \
+        _1(fn, pfx##198, sfx), _1(fn, pfx##199, sfx),   \
+        _10(fn, pfx##20, sfx), _10(fn, pfx##21, sfx),   \
+        _10(fn, pfx##22, sfx), _10(fn, pfx##23, sfx),   \
+        _10(fn, pfx##24, sfx), _10(fn, pfx##25, sfx),   \
+        _1(fn, pfx##260, sfx), _1(fn, pfx##261, sfx),   \
+        _1(fn, pfx##262, sfx), _1(fn, pfx##263, sfx),   \
+        _1(fn, pfx##264, sfx)
+
+#define _PORT(pfx, sfx) pfx##_##sfx
+#define PORT_265(str) _265(_PORT, PORT, str)
+
+enum {
+        PINMUX_RESERVED = 0,
+
+        PINMUX_DATA_BEGIN,
+        PORT_265(DATA), /* PORT0_DATA -> PORT264_DATA */
+        PINMUX_DATA_END,
+
+        PINMUX_INPUT_BEGIN,
+        PORT_265(IN), /* PORT0_IN -> PORT264_IN */
+        PINMUX_INPUT_END,
+
+        PINMUX_INPUT_PULLUP_BEGIN,
+        PORT_265(IN_PU), /* PORT0_IN_PU -> PORT264_IN_PU */
+        PINMUX_INPUT_PULLUP_END,
+
+        PINMUX_INPUT_PULLDOWN_BEGIN,
+        PORT_265(IN_PD), /* PORT0_IN_PD -> PORT264_IN_PD */
+        PINMUX_INPUT_PULLDOWN_END,
+
+        PINMUX_OUTPUT_BEGIN,
+        PORT_265(OUT), /* PORT0_OUT -> PORT264_OUT */
+        PINMUX_OUTPUT_END,
+
+        PINMUX_FUNCTION_BEGIN,
+        PORT_265(FN_IN), /* PORT0_FN_IN -> PORT264_FN_IN */
+        PORT_265(FN_OUT), /* PORT0_FN_OUT -> PORT264_FN_OUT */
+        PORT_265(FN0), /* PORT0_FN0 -> PORT264_FN0 */
+        PORT_265(FN1), /* PORT0_FN1 -> PORT264_FN1 */
+        PORT_265(FN2), /* PORT0_FN2 -> PORT264_FN2 */
+        PORT_265(FN3), /* PORT0_FN3 -> PORT264_FN3 */
+        PORT_265(FN4), /* PORT0_FN4 -> PORT264_FN4 */
+        PORT_265(FN5), /* PORT0_FN5 -> PORT264_FN5 */
+        PORT_265(FN6), /* PORT0_FN6 -> PORT264_FN6 */
+        PORT_265(FN7), /* PORT0_FN7 -> PORT264_FN7 */
+
+        MSELBCR_MSEL17_1, MSELBCR_MSEL17_0,
+        MSELBCR_MSEL16_1, MSELBCR_MSEL16_0,
+        PINMUX_FUNCTION_END,
+
+        PINMUX_MARK_BEGIN,
+        /* Special Pull-up / Pull-down Functions */
+        PORT66_KEYIN0_PU_MARK, PORT67_KEYIN1_PU_MARK,
+        PORT68_KEYIN2_PU_MARK, PORT69_KEYIN3_PU_MARK,
+        PORT70_KEYIN4_PU_MARK, PORT71_KEYIN5_PU_MARK,
+        PORT72_KEYIN6_PU_MARK,
+
+        /* 55-1 */
+        VBUS_0_MARK,
+        CPORT0_MARK,
+        CPORT1_MARK,
+        CPORT2_MARK,
+        CPORT3_MARK,
+        CPORT4_MARK,
+        CPORT5_MARK,
+        CPORT6_MARK,
+        CPORT7_MARK,
+        CPORT8_MARK,
+        CPORT9_MARK,
+        CPORT10_MARK,
+        CPORT11_MARK, SIN2_MARK,
+        CPORT12_MARK, XCTS2_MARK,
+        CPORT13_MARK, RFSPO4_MARK,
+        CPORT14_MARK, RFSPO5_MARK,
+        CPORT15_MARK, SCIFA0_SCK_MARK, GPS_AGC2_MARK,
+        CPORT16_MARK, SCIFA0_TXD_MARK, GPS_AGC3_MARK,
+        CPORT17_IC_OE_MARK, SOUT2_MARK,
+        CPORT18_MARK, XRTS2_MARK, PORT19_VIO_CKO2_MARK,
+        CPORT19_MPORT1_MARK,
+        CPORT20_MARK, RFSPO6_MARK,
+        CPORT21_MARK, STATUS0_MARK,
+        CPORT22_MARK, STATUS1_MARK,
+        CPORT23_MARK, STATUS2_MARK, RFSPO7_MARK,
+        B_SYNLD1_MARK,
+        B_SYNLD2_MARK, SYSENMSK_MARK,
+        XMAINPS_MARK,
+        XDIVPS_MARK,
+        XIDRST_MARK,
+        IDCLK_MARK, IC_DP_MARK,
+        IDIO_MARK, IC_DM_MARK,
+        SOUT1_MARK, SCIFA4_TXD_MARK, M02_BERDAT_MARK,
+        SIN1_MARK, SCIFA4_RXD_MARK, XWUP_MARK,
+        XRTS1_MARK, SCIFA4_RTS_MARK, M03_BERCLK_MARK,
+        XCTS1_MARK, SCIFA4_CTS_MARK,
+        PCMCLKO_MARK,
+        SYNC8KO_MARK,
+
+        /* 55-2 */
+        DNPCM_A_MARK,
+        UPPCM_A_MARK,
+        VACK_MARK,
+        XTALB1L_MARK,
+        GPS_AGC1_MARK, SCIFA0_RTS_MARK,
+        GPS_AGC4_MARK, SCIFA0_RXD_MARK,
+        GPS_PWRDOWN_MARK, SCIFA0_CTS_MARK,
+        GPS_IM_MARK,
+        GPS_IS_MARK,
+        GPS_QM_MARK,
+        GPS_QS_MARK,
+        FMSOCK_MARK, PORT49_IRDA_OUT_MARK, PORT49_IROUT_MARK,
+        FMSOOLR_MARK, BBIF2_TSYNC2_MARK, TPU2TO2_MARK, IPORT3_MARK,
+        FMSIOLR_MARK,
+        FMSOOBT_MARK, BBIF2_TSCK2_MARK, TPU2TO3_MARK, OPORT1_MARK,
+        FMSIOBT_MARK,
+        FMSOSLD_MARK, BBIF2_TXD2_MARK, OPORT2_MARK,
+        FMSOILR_MARK, PORT53_IRDA_IN_MARK, TPU3TO3_MARK, OPORT3_MARK,
+        FMSIILR_MARK,
+        FMSOIBT_MARK, PORT54_IRDA_FIRSEL_MARK, TPU3TO2_MARK, FMSIIBT_MARK,
+        FMSISLD_MARK, MFG0_OUT1_MARK, TPU0TO0_MARK,
+        A0_EA0_MARK, BS_MARK,
+        A12_EA12_MARK, PORT58_VIO_CKOR_MARK, TPU4TO2_MARK,
+        A13_EA13_MARK, PORT59_IROUT_MARK, MFG0_OUT2_MARK, TPU0TO1_MARK,
+        A14_EA14_MARK, PORT60_KEYOUT5_MARK,
+        A15_EA15_MARK, PORT61_KEYOUT4_MARK,
+        A16_EA16_MARK, PORT62_KEYOUT3_MARK, MSIOF0_SS1_MARK,
+        A17_EA17_MARK, PORT63_KEYOUT2_MARK, MSIOF0_TSYNC_MARK,
+        A18_EA18_MARK, PORT64_KEYOUT1_MARK, MSIOF0_TSCK_MARK,
+        A19_EA19_MARK, PORT65_KEYOUT0_MARK, MSIOF0_TXD_MARK,
+        A20_EA20_MARK, PORT66_KEYIN0_MARK, MSIOF0_RSCK_MARK,
+        A21_EA21_MARK, PORT67_KEYIN1_MARK, MSIOF0_RSYNC_MARK,
+        A22_EA22_MARK, PORT68_KEYIN2_MARK, MSIOF0_MCK0_MARK,
+        A23_EA23_MARK, PORT69_KEYIN3_MARK, MSIOF0_MCK1_MARK,
+        A24_EA24_MARK, PORT70_KEYIN4_MARK, MSIOF0_RXD_MARK,
+        A25_EA25_MARK, PORT71_KEYIN5_MARK, MSIOF0_SS2_MARK,
+        A26_MARK, PORT72_KEYIN6_MARK,
+        D0_ED0_NAF0_MARK,
+        D1_ED1_NAF1_MARK,
+        D2_ED2_NAF2_MARK,
+        D3_ED3_NAF3_MARK,
+        D4_ED4_NAF4_MARK,
+        D5_ED5_NAF5_MARK,
+        D6_ED6_NAF6_MARK,
+        D7_ED7_NAF7_MARK,
+        D8_ED8_NAF8_MARK,
+        D9_ED9_NAF9_MARK,
+        D10_ED10_NAF10_MARK,
+        D11_ED11_NAF11_MARK,
+        D12_ED12_NAF12_MARK,
+        D13_ED13_NAF13_MARK,
+        D14_ED14_NAF14_MARK,
+        D15_ED15_NAF15_MARK,
+        CS4_MARK,
+        CS5A_MARK, FMSICK_MARK,
+        CS5B_MARK, FCE1_MARK,
+
+        /* 55-3 */
+        CS6B_MARK, XCS2_MARK, CS6A_MARK, DACK0_MARK,
+        FCE0_MARK,
+        WAIT_MARK, DREQ0_MARK,
+        RD_XRD_MARK,
+        WE0_XWR0_FWE_MARK,
+        WE1_XWR1_MARK,
+        FRB_MARK,
+        CKO_MARK,
+        NBRSTOUT_MARK,
+        NBRST_MARK,
+        GPS_EPPSIN_MARK,
+        LATCHPULSE_MARK,
+        LTESIGNAL_MARK,
+        LEGACYSTATE_MARK,
+        TCKON_MARK,
+        VIO_VD_MARK, PORT128_KEYOUT0_MARK, IPORT0_MARK,
+        VIO_HD_MARK, PORT129_KEYOUT1_MARK, IPORT1_MARK,
+        VIO_D0_MARK, PORT130_KEYOUT2_MARK, PORT130_MSIOF2_RXD_MARK,
+        VIO_D1_MARK, PORT131_KEYOUT3_MARK, PORT131_MSIOF2_SS1_MARK,
+        VIO_D2_MARK, PORT132_KEYOUT4_MARK, PORT132_MSIOF2_SS2_MARK,
+        VIO_D3_MARK, PORT133_KEYOUT5_MARK, PORT133_MSIOF2_TSYNC_MARK,
+        VIO_D4_MARK, PORT134_KEYIN0_MARK, PORT134_MSIOF2_TXD_MARK,
+        VIO_D5_MARK, PORT135_KEYIN1_MARK, PORT135_MSIOF2_TSCK_MARK,
+        VIO_D6_MARK, PORT136_KEYIN2_MARK,
+        VIO_D7_MARK, PORT137_KEYIN3_MARK,
+        VIO_D8_MARK, M9_SLCD_A01_MARK, PORT138_FSIAOMC_MARK,
+        VIO_D9_MARK, M10_SLCD_CK1_MARK, PORT139_FSIAOLR_MARK,
+        VIO_D10_MARK, M11_SLCD_SO1_MARK, TPU0TO2_MARK, PORT140_FSIAOBT_MARK,
+        VIO_D11_MARK, M12_SLCD_CE1_MARK, TPU0TO3_MARK, PORT141_FSIAOSLD_MARK,
+        VIO_D12_MARK, M13_BSW_MARK, PORT142_FSIACK_MARK,
+        VIO_D13_MARK, M14_GSW_MARK, PORT143_FSIAILR_MARK,
+        VIO_D14_MARK, M15_RSW_MARK, PORT144_FSIAIBT_MARK,
+        VIO_D15_MARK, TPU1TO3_MARK, PORT145_FSIAISLD_MARK,
+        VIO_CLK_MARK, PORT146_KEYIN4_MARK, IPORT2_MARK,
+        VIO_FIELD_MARK, PORT147_KEYIN5_MARK,
+        VIO_CKO_MARK, PORT148_KEYIN6_MARK,
+        A27_MARK, RDWR_XWE_MARK, MFG0_IN1_MARK,
+        MFG0_IN2_MARK,
+        TS_SPSYNC3_MARK, MSIOF2_RSCK_MARK,
+        TS_SDAT3_MARK, MSIOF2_RSYNC_MARK,
+        TPU1TO2_MARK, TS_SDEN3_MARK, PORT153_MSIOF2_SS1_MARK,
+        SOUT3_MARK, SCIFA2_TXD1_MARK, MSIOF2_MCK0_MARK,
+        SIN3_MARK, SCIFA2_RXD1_MARK, MSIOF2_MCK1_MARK,
+        XRTS3_MARK, SCIFA2_RTS1_MARK, PORT156_MSIOF2_SS2_MARK,
+        XCTS3_MARK, SCIFA2_CTS1_MARK, PORT157_MSIOF2_RXD_MARK,
+
+        /* 55-4 */
+        DINT_MARK, SCIFA2_SCK1_MARK, TS_SCK3_MARK,
+        PORT159_SCIFB_SCK_MARK, PORT159_SCIFA5_SCK_MARK, NMI_MARK,
+        PORT160_SCIFB_TXD_MARK, PORT160_SCIFA5_TXD_MARK, SOUT0_MARK,
+        PORT161_SCIFB_CTS_MARK, PORT161_SCIFA5_CTS_MARK, XCTS0_MARK,
+        MFG3_IN2_MARK,
+        PORT162_SCIFB_RXD_MARK, PORT162_SCIFA5_RXD_MARK, SIN0_MARK,
+        MFG3_IN1_MARK,
+        PORT163_SCIFB_RTS_MARK, PORT163_SCIFA5_RTS_MARK, XRTS0_MARK,
+        MFG3_OUT1_MARK, TPU3TO0_MARK,
+        LCDD0_MARK, PORT192_KEYOUT0_MARK, EXT_CKI_MARK,
+        LCDD1_MARK, PORT193_KEYOUT1_MARK, PORT193_SCIFA5_CTS_MARK,
+        BBIF2_TSYNC1_MARK,
+        LCDD2_MARK, PORT194_KEYOUT2_MARK, PORT194_SCIFA5_RTS_MARK,
+        BBIF2_TSCK1_MARK,
+        LCDD3_MARK, PORT195_KEYOUT3_MARK, PORT195_SCIFA5_RXD_MARK,
+        BBIF2_TXD1_MARK,
+        LCDD4_MARK, PORT196_KEYOUT4_MARK, PORT196_SCIFA5_TXD_MARK,
+        LCDD5_MARK, PORT197_KEYOUT5_MARK, PORT197_SCIFA5_SCK_MARK,
+        MFG2_OUT2_MARK,
+        TPU2TO1_MARK,
+        LCDD6_MARK, XWR2_MARK,
+        LCDD7_MARK, TPU4TO1_MARK, MFG4_OUT2_MARK, XWR3_MARK,
+        LCDD8_MARK, PORT200_KEYIN0_MARK, VIO_DR0_MARK, D16_MARK, ED16_MARK,
+        LCDD9_MARK, PORT201_KEYIN1_MARK, VIO_DR1_MARK, D17_MARK, ED17_MARK,
+        LCDD10_MARK, PORT202_KEYIN2_MARK, VIO_DR2_MARK, D18_MARK, ED18_MARK,
+        LCDD11_MARK, PORT203_KEYIN3_MARK, VIO_DR3_MARK, D19_MARK, ED19_MARK,
+        LCDD12_MARK, PORT204_KEYIN4_MARK, VIO_DR4_MARK, D20_MARK, ED20_MARK,
+        LCDD13_MARK, PORT205_KEYIN5_MARK, VIO_DR5_MARK, D21_MARK, ED21_MARK,
+        LCDD14_MARK, PORT206_KEYIN6_MARK, VIO_DR6_MARK, D22_MARK, ED22_MARK,
+        LCDD15_MARK, PORT207_MSIOF0L_SS1_MARK, PORT207_KEYOUT0_MARK,
+        VIO_DR7_MARK, D23_MARK, ED23_MARK,
+        LCDD16_MARK, PORT208_MSIOF0L_SS2_MARK, PORT208_KEYOUT1_MARK,
+        VIO_VDR_MARK, D24_MARK, ED24_MARK,
+        LCDD17_MARK, PORT209_KEYOUT2_MARK, VIO_HDR_MARK, D25_MARK, ED25_MARK,
+        LCDD18_MARK, DREQ2_MARK, PORT210_MSIOF0L_SS1_MARK, D26_MARK, ED26_MARK,
+        LCDD19_MARK, PORT211_MSIOF0L_SS2_MARK, D27_MARK, ED27_MARK,
+        LCDD20_MARK, TS_SPSYNC1_MARK, MSIOF0L_MCK0_MARK, D28_MARK, ED28_MARK,
+        LCDD21_MARK, TS_SDAT1_MARK, MSIOF0L_MCK1_MARK, D29_MARK, ED29_MARK,
+        LCDD22_MARK, TS_SDEN1_MARK, MSIOF0L_RSCK_MARK, D30_MARK, ED30_MARK,
+        LCDD23_MARK, TS_SCK1_MARK, MSIOF0L_RSYNC_MARK, D31_MARK, ED31_MARK,
+        LCDDCK_MARK, LCDWR_MARK, PORT216_KEYOUT3_MARK, VIO_CLKR_MARK,
+        LCDRD_MARK, DACK2_MARK, MSIOF0L_TSYNC_MARK,
+        LCDHSYN_MARK, LCDCS_MARK, LCDCS2_MARK, DACK3_MARK,
+        PORT218_VIO_CKOR_MARK, PORT218_KEYOUT4_MARK,
+        LCDDISP_MARK, LCDRS_MARK, DREQ3_MARK, MSIOF0L_TSCK_MARK,
+        LCDVSYN_MARK, LCDVSYN2_MARK, PORT220_KEYOUT5_MARK,
+        LCDLCLK_MARK, DREQ1_MARK, PWEN_MARK, MSIOF0L_RXD_MARK,
+        LCDDON_MARK, LCDDON2_MARK, DACK1_MARK, OVCN_MARK, MSIOF0L_TXD_MARK,
+        SCIFA1_TXD_MARK, OVCN2_MARK,
+        EXTLP_MARK, SCIFA1_SCK_MARK, USBTERM_MARK, PORT226_VIO_CKO2_MARK,
+        SCIFA1_RTS_MARK, IDIN_MARK,
+        SCIFA1_RXD_MARK,
+        SCIFA1_CTS_MARK, MFG1_IN1_MARK,
+        MSIOF1_TXD_MARK, SCIFA2_TXD2_MARK, PORT230_FSIAOMC_MARK,
+        MSIOF1_TSYNC_MARK, SCIFA2_CTS2_MARK, PORT231_FSIAOLR_MARK,
+        MSIOF1_TSCK_MARK, SCIFA2_SCK2_MARK, PORT232_FSIAOBT_MARK,
+        MSIOF1_RXD_MARK, SCIFA2_RXD2_MARK, GPS_VCOTRIG_MARK,
+        PORT233_FSIACK_MARK,
+        MSIOF1_RSCK_MARK, SCIFA2_RTS2_MARK, PORT234_FSIAOSLD_MARK,
+        MSIOF1_RSYNC_MARK, OPORT0_MARK, MFG1_IN2_MARK, PORT235_FSIAILR_MARK,
+        MSIOF1_MCK0_MARK, I2C_SDA2_MARK, PORT236_FSIAIBT_MARK,
+        MSIOF1_MCK1_MARK, I2C_SCL2_MARK, PORT237_FSIAISLD_MARK,
+        MSIOF1_SS1_MARK, EDBGREQ3_MARK,
+
+        /* 55-5 */
+        MSIOF1_SS2_MARK,
+        SCIFA6_TXD_MARK,
+        PORT241_IRDA_OUT_MARK, PORT241_IROUT_MARK, MFG4_OUT1_MARK,
+        TPU4TO0_MARK,
+        PORT242_IRDA_IN_MARK, MFG4_IN2_MARK,
+        PORT243_IRDA_FIRSEL_MARK, PORT243_VIO_CKO2_MARK,
+        PORT244_SCIFA5_CTS_MARK, MFG2_IN1_MARK, PORT244_SCIFB_CTS_MARK,
+        PORT244_MSIOF2_RXD_MARK,
+        PORT245_SCIFA5_RTS_MARK, MFG2_IN2_MARK, PORT245_SCIFB_RTS_MARK,
+        PORT245_MSIOF2_TXD_MARK,
+        PORT246_SCIFA5_RXD_MARK, MFG1_OUT1_MARK, PORT246_SCIFB_RXD_MARK,
+        TPU1TO0_MARK,
+        PORT247_SCIFA5_TXD_MARK, MFG3_OUT2_MARK, PORT247_SCIFB_TXD_MARK,
+        TPU3TO1_MARK,
+        PORT248_SCIFA5_SCK_MARK, MFG2_OUT1_MARK, PORT248_SCIFB_SCK_MARK,
+        TPU2TO0_MARK,
+        PORT248_MSIOF2_TSCK_MARK,
+        PORT249_IROUT_MARK, MFG4_IN1_MARK, PORT249_MSIOF2_TSYNC_MARK,
+        SDHICLK0_MARK, TCK2_SWCLK_MC0_MARK,
+        SDHICD0_MARK,
+        SDHID0_0_MARK, TMS2_SWDIO_MC0_MARK,
+        SDHID0_1_MARK, TDO2_SWO0_MC0_MARK,
+        SDHID0_2_MARK, TDI2_MARK,
+        SDHID0_3_MARK, RTCK2_SWO1_MC0_MARK,
+        SDHICMD0_MARK, TRST2_MARK,
+        SDHIWP0_MARK, EDBGREQ2_MARK,
+        SDHICLK1_MARK, TCK3_SWCLK_MC1_MARK,
+        SDHID1_0_MARK, M11_SLCD_SO2_MARK, TS_SPSYNC2_MARK,
+        TMS3_SWDIO_MC1_MARK,
+        SDHID1_1_MARK, M9_SLCD_A02_MARK, TS_SDAT2_MARK, TDO3_SWO0_MC1_MARK,
+        SDHID1_2_MARK, M10_SLCD_CK2_MARK, TS_SDEN2_MARK, TDI3_MARK,
+        SDHID1_3_MARK, M12_SLCD_CE2_MARK, TS_SCK2_MARK, RTCK3_SWO1_MC1_MARK,
+        SDHICMD1_MARK, TRST3_MARK,
+        RESETOUTS_MARK,
+        PINMUX_MARK_END,
+};
+
+#define PORT_DATA_I(nr) \
+        PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_IN)
+
+#define PORT_DATA_I_PD(nr)      \
+        PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0,    \
+                                PORT##nr##_IN, PORT##nr##_IN_PD)
+
+#define PORT_DATA_I_PU(nr)      \
+        PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0,    \
+                                PORT##nr##_IN, PORT##nr##_IN_PU)
+
+#define PORT_DATA_I_PU_PD(nr)   \
+        PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0,    \
+                                PORT##nr##_IN, PORT##nr##_IN_PD,        \
+                                PORT##nr##_IN_PU)
+
+#define PORT_DATA_O(nr) \
+        PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0,    \
+                                PORT##nr##_OUT)
+
+#define PORT_DATA_IO(nr)        \
+        PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0,    \
+                                PORT##nr##_OUT, PORT##nr##_IN)
+
+#define PORT_DATA_IO_PD(nr)     \
+        PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0,    \
+                                PORT##nr##_OUT, PORT##nr##_IN,          \
+                                PORT##nr##_IN_PD)
+
+#define PORT_DATA_IO_PU(nr)     \
+        PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0,    \
+                                PORT##nr##_OUT, PORT##nr##_IN,          \
+                                PORT##nr##_IN_PU)
+
+#define PORT_DATA_IO_PU_PD(nr)  \
+        PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0,    \
+                                PORT##nr##_OUT, PORT##nr##_IN,          \
+                                PORT##nr##_IN_PD, PORT##nr##_IN_PU)
+
+static pinmux_enum_t pinmux_data[] = {
+        /* specify valid pin states for each pin in GPIO mode */
+        /* 55-1 (GPIO) */
+        PORT_DATA_I_PD(0), PORT_DATA_I_PU(1),
+        PORT_DATA_I_PU(2), PORT_DATA_I_PU(3),
+        PORT_DATA_I_PU(4), PORT_DATA_I_PU(5),
+        PORT_DATA_I_PU(6), PORT_DATA_I_PU(7),
+        PORT_DATA_I_PU(8), PORT_DATA_I_PU(9),
+        PORT_DATA_I_PU(10), PORT_DATA_I_PU(11),
+        PORT_DATA_IO_PU(12), PORT_DATA_IO_PU(13),
+        PORT_DATA_IO_PU_PD(14), PORT_DATA_IO_PU_PD(15),
+        PORT_DATA_O(16), PORT_DATA_IO(17),
+        PORT_DATA_O(18), PORT_DATA_O(19),
+        PORT_DATA_O(20), PORT_DATA_O(21),
+        PORT_DATA_O(22), PORT_DATA_O(23),
+        PORT_DATA_O(24), PORT_DATA_I_PD(25),
+        PORT_DATA_I_PD(26), PORT_DATA_O(27),
+        PORT_DATA_O(28), PORT_DATA_O(29),
+        PORT_DATA_IO(30), PORT_DATA_IO_PU(31),
+        PORT_DATA_IO_PD(32), PORT_DATA_I_PU(33),
+        PORT_DATA_IO_PD(34), PORT_DATA_I_PU_PD(35),
+        PORT_DATA_O(36), PORT_DATA_IO(37),
+
+        /* 55-2 (GPIO) */
+        PORT_DATA_O(38), PORT_DATA_I_PU(39),
+        PORT_DATA_I_PU_PD(40), PORT_DATA_O(41),
+        PORT_DATA_IO_PD(42), PORT_DATA_IO_PD(43),
+        PORT_DATA_IO_PD(44), PORT_DATA_I_PD(45),
+        PORT_DATA_I_PD(46), PORT_DATA_I_PD(47),
+        PORT_DATA_I_PD(48), PORT_DATA_IO_PU_PD(49),
+        PORT_DATA_IO_PD(50), PORT_DATA_IO_PD(51),
+        PORT_DATA_O(52), PORT_DATA_IO_PU_PD(53),
+        PORT_DATA_IO_PU_PD(54), PORT_DATA_IO_PD(55),
+        PORT_DATA_I_PU_PD(56), PORT_DATA_IO(57),
+        PORT_DATA_IO(58), PORT_DATA_IO(59),
+        PORT_DATA_IO(60), PORT_DATA_IO(61),
+        PORT_DATA_IO_PD(62), PORT_DATA_IO_PD(63),
+        PORT_DATA_IO_PD(64), PORT_DATA_IO_PD(65),
+        PORT_DATA_IO_PU_PD(66), PORT_DATA_IO_PU_PD(67),
+        PORT_DATA_IO_PU_PD(68), PORT_DATA_IO_PU_PD(69),
+        PORT_DATA_IO_PU_PD(70), PORT_DATA_IO_PU_PD(71),
+        PORT_DATA_IO_PU_PD(72), PORT_DATA_I_PU_PD(73),
+        PORT_DATA_IO_PU(74), PORT_DATA_IO_PU(75),
+        PORT_DATA_IO_PU(76), PORT_DATA_IO_PU(77),
+        PORT_DATA_IO_PU(78), PORT_DATA_IO_PU(79),
+        PORT_DATA_IO_PU(80), PORT_DATA_IO_PU(81),
+        PORT_DATA_IO_PU(82), PORT_DATA_IO_PU(83),
+        PORT_DATA_IO_PU(84), PORT_DATA_IO_PU(85),
+        PORT_DATA_IO_PU(86), PORT_DATA_IO_PU(87),
+        PORT_DATA_IO_PU(88), PORT_DATA_IO_PU(89),
+        PORT_DATA_O(90), PORT_DATA_IO_PU(91),
+        PORT_DATA_O(92),
+
+        /* 55-3 (GPIO) */
+        PORT_DATA_IO_PU(93),
+        PORT_DATA_O(94),
+        PORT_DATA_I_PU_PD(95),
+        PORT_DATA_IO(96), PORT_DATA_IO(97),
+        PORT_DATA_IO(98), PORT_DATA_I_PU(99),
+        PORT_DATA_O(100), PORT_DATA_O(101),
+        PORT_DATA_I_PU(102), PORT_DATA_IO_PD(103),
+        PORT_DATA_I_PD(104), PORT_DATA_I_PD(105),
+        PORT_DATA_I_PD(106), PORT_DATA_I_PD(107),
+        PORT_DATA_I_PD(108), PORT_DATA_IO_PD(109),
+        PORT_DATA_IO_PD(110), PORT_DATA_I_PD(111),
+        PORT_DATA_IO_PD(112), PORT_DATA_IO_PD(113),
+        PORT_DATA_IO_PD(114), PORT_DATA_I_PD(115),
+        PORT_DATA_I_PD(116), PORT_DATA_IO_PD(117),
+        PORT_DATA_I_PD(118), PORT_DATA_IO_PD(128),
+        PORT_DATA_IO_PD(129), PORT_DATA_IO_PD(130),
+        PORT_DATA_IO_PD(131), PORT_DATA_IO_PD(132),
+        PORT_DATA_IO_PD(133), PORT_DATA_IO_PU_PD(134),
+        PORT_DATA_IO_PU_PD(135), PORT_DATA_IO_PU_PD(136),
+        PORT_DATA_IO_PU_PD(137), PORT_DATA_IO_PD(138),
+        PORT_DATA_IO_PD(139), PORT_DATA_IO_PD(140),
+        PORT_DATA_IO_PD(141), PORT_DATA_IO_PD(142),
+        PORT_DATA_IO_PD(143), PORT_DATA_IO_PU_PD(144),
+        PORT_DATA_IO_PD(145), PORT_DATA_IO_PU_PD(146),
+        PORT_DATA_IO_PU_PD(147), PORT_DATA_IO_PU_PD(148),
+        PORT_DATA_IO_PU_PD(149), PORT_DATA_I_PD(150),
+        PORT_DATA_IO_PU_PD(151), PORT_DATA_IO_PD(152),
+        PORT_DATA_IO_PD(153), PORT_DATA_IO_PD(154),
+        PORT_DATA_I_PD(155), PORT_DATA_IO_PU_PD(156),
+        PORT_DATA_I_PD(157), PORT_DATA_IO_PD(158),
+
+        /* 55-4 (GPIO) */
+        PORT_DATA_IO_PU_PD(159), PORT_DATA_IO_PU_PD(160),
+        PORT_DATA_I_PU_PD(161), PORT_DATA_I_PU_PD(162),
+        PORT_DATA_IO_PU_PD(163), PORT_DATA_I_PU_PD(164),
+        PORT_DATA_IO_PD(192), PORT_DATA_IO_PD(193),
+        PORT_DATA_IO_PD(194), PORT_DATA_IO_PD(195),
+        PORT_DATA_IO_PD(196), PORT_DATA_IO_PD(197),
+        PORT_DATA_IO_PD(198), PORT_DATA_IO_PD(199),
+        PORT_DATA_IO_PU_PD(200), PORT_DATA_IO_PU_PD(201),
+        PORT_DATA_IO_PU_PD(202), PORT_DATA_IO_PU_PD(203),
+        PORT_DATA_IO_PU_PD(204), PORT_DATA_IO_PU_PD(205),
+        PORT_DATA_IO_PU_PD(206), PORT_DATA_IO_PD(207),
+        PORT_DATA_IO_PD(208), PORT_DATA_IO_PD(209),
+        PORT_DATA_IO_PD(210), PORT_DATA_IO_PD(211),
+        PORT_DATA_IO_PD(212), PORT_DATA_IO_PD(213),
+        PORT_DATA_IO_PD(214), PORT_DATA_IO_PD(215),
+        PORT_DATA_IO_PD(216), PORT_DATA_IO_PD(217),
+        PORT_DATA_O(218), PORT_DATA_IO_PD(219),
+        PORT_DATA_IO_PD(220), PORT_DATA_IO_PD(221),
+        PORT_DATA_IO_PU_PD(222),
+        PORT_DATA_I_PU_PD(223), PORT_DATA_I_PU_PD(224),
+        PORT_DATA_IO_PU_PD(225), PORT_DATA_O(226),
+        PORT_DATA_IO_PU_PD(227), PORT_DATA_I_PD(228),
+        PORT_DATA_I_PD(229), PORT_DATA_IO(230),
+        PORT_DATA_IO_PD(231), PORT_DATA_IO_PU_PD(232),
+        PORT_DATA_I_PD(233), PORT_DATA_IO_PU_PD(234),
+        PORT_DATA_IO_PU_PD(235), PORT_DATA_IO_PU_PD(236),
+        PORT_DATA_IO_PD(237), PORT_DATA_IO_PU_PD(238),
+
+        /* 55-5 (GPIO) */
+        PORT_DATA_IO_PU_PD(239), PORT_DATA_IO_PU_PD(240),
+        PORT_DATA_O(241), PORT_DATA_I_PD(242),
+        PORT_DATA_IO_PU_PD(243), PORT_DATA_IO_PU_PD(244),
+        PORT_DATA_IO_PU_PD(245), PORT_DATA_IO_PU_PD(246),
+        PORT_DATA_IO_PU_PD(247), PORT_DATA_IO_PU_PD(248),
+        PORT_DATA_IO_PU_PD(249), PORT_DATA_IO_PD(250),
+        PORT_DATA_IO_PU_PD(251), PORT_DATA_IO_PU_PD(252),
+        PORT_DATA_IO_PU_PD(253), PORT_DATA_IO_PU_PD(254),
+        PORT_DATA_IO_PU_PD(255), PORT_DATA_IO_PU_PD(256),
+        PORT_DATA_IO_PU_PD(257), PORT_DATA_IO_PD(258),
+        PORT_DATA_IO_PU_PD(259), PORT_DATA_IO_PU_PD(260),
+        PORT_DATA_IO_PU_PD(261), PORT_DATA_IO_PU_PD(262),
+        PORT_DATA_IO_PU_PD(263),
+
+        /* Special Pull-up / Pull-down Functions */
+        PINMUX_DATA(PORT66_KEYIN0_PU_MARK, MSELBCR_MSEL17_0, MSELBCR_MSEL16_0,
+                                PORT66_FN2, PORT66_IN_PU),
+        PINMUX_DATA(PORT67_KEYIN1_PU_MARK, MSELBCR_MSEL17_0, MSELBCR_MSEL16_0,
+                                PORT67_FN2, PORT67_IN_PU),
+        PINMUX_DATA(PORT68_KEYIN2_PU_MARK, MSELBCR_MSEL17_0, MSELBCR_MSEL16_0,
+                                PORT68_FN2, PORT68_IN_PU),
+        PINMUX_DATA(PORT69_KEYIN3_PU_MARK, MSELBCR_MSEL17_0, MSELBCR_MSEL16_0,
+                                PORT69_FN2, PORT69_IN_PU),
+        PINMUX_DATA(PORT70_KEYIN4_PU_MARK, MSELBCR_MSEL17_0, MSELBCR_MSEL16_0,
+                                PORT70_FN2, PORT70_IN_PU),
+        PINMUX_DATA(PORT71_KEYIN5_PU_MARK, MSELBCR_MSEL17_0, MSELBCR_MSEL16_0,
+                                PORT71_FN2, PORT71_IN_PU),
+        PINMUX_DATA(PORT72_KEYIN6_PU_MARK, MSELBCR_MSEL17_0, MSELBCR_MSEL16_0,
+                                PORT72_FN2, PORT72_IN_PU),
+
+
+        /* 55-1 (FN) */
+        PINMUX_DATA(VBUS_0_MARK, PORT0_FN1),
+        PINMUX_DATA(CPORT0_MARK, PORT1_FN1),
+        PINMUX_DATA(CPORT1_MARK, PORT2_FN1),
+        PINMUX_DATA(CPORT2_MARK, PORT3_FN1),
+        PINMUX_DATA(CPORT3_MARK, PORT4_FN1),
+        PINMUX_DATA(CPORT4_MARK, PORT5_FN1),
+        PINMUX_DATA(CPORT5_MARK, PORT6_FN1),
+        PINMUX_DATA(CPORT6_MARK, PORT7_FN1),
+        PINMUX_DATA(CPORT7_MARK, PORT8_FN1),
+        PINMUX_DATA(CPORT8_MARK, PORT9_FN1),
+        PINMUX_DATA(CPORT9_MARK, PORT10_FN1),
+        PINMUX_DATA(CPORT10_MARK, PORT11_FN1),
+        PINMUX_DATA(CPORT11_MARK, PORT12_FN1),
+        PINMUX_DATA(SIN2_MARK, PORT12_FN2),
+        PINMUX_DATA(CPORT12_MARK, PORT13_FN1),
+        PINMUX_DATA(XCTS2_MARK, PORT13_FN2),
+        PINMUX_DATA(CPORT13_MARK, PORT14_FN1),
+        PINMUX_DATA(RFSPO4_MARK, PORT14_FN2),
+        PINMUX_DATA(CPORT14_MARK, PORT15_FN1),
+        PINMUX_DATA(RFSPO5_MARK, PORT15_FN2),
+        PINMUX_DATA(CPORT15_MARK, PORT16_FN1),
+        PINMUX_DATA(SCIFA0_SCK_MARK, PORT16_FN2),
+        PINMUX_DATA(GPS_AGC2_MARK, PORT16_FN3),
+        PINMUX_DATA(CPORT16_MARK, PORT17_FN1),
+        PINMUX_DATA(SCIFA0_TXD_MARK, PORT17_FN2),
+        PINMUX_DATA(GPS_AGC3_MARK, PORT17_FN3),
+        PINMUX_DATA(CPORT17_IC_OE_MARK, PORT18_FN1),
+        PINMUX_DATA(SOUT2_MARK, PORT18_FN2),
+        PINMUX_DATA(CPORT18_MARK, PORT19_FN1),
+        PINMUX_DATA(XRTS2_MARK, PORT19_FN2),
+        PINMUX_DATA(PORT19_VIO_CKO2_MARK, PORT19_FN3),
+        PINMUX_DATA(CPORT19_MPORT1_MARK, PORT20_FN1),
+        PINMUX_DATA(CPORT20_MARK, PORT21_FN1),
+        PINMUX_DATA(RFSPO6_MARK, PORT21_FN2),
+        PINMUX_DATA(CPORT21_MARK, PORT22_FN1),
+        PINMUX_DATA(STATUS0_MARK, PORT22_FN2),
+        PINMUX_DATA(CPORT22_MARK, PORT23_FN1),
+        PINMUX_DATA(STATUS1_MARK, PORT23_FN2),
+        PINMUX_DATA(CPORT23_MARK, PORT24_FN1),
+        PINMUX_DATA(STATUS2_MARK, PORT24_FN2),
+        PINMUX_DATA(RFSPO7_MARK, PORT24_FN3),
+        PINMUX_DATA(B_SYNLD1_MARK, PORT25_FN1),
+        PINMUX_DATA(B_SYNLD2_MARK, PORT26_FN1),
+        PINMUX_DATA(SYSENMSK_MARK, PORT26_FN2),
+        PINMUX_DATA(XMAINPS_MARK, PORT27_FN1),
+        PINMUX_DATA(XDIVPS_MARK, PORT28_FN1),
+        PINMUX_DATA(XIDRST_MARK, PORT29_FN1),
+        PINMUX_DATA(IDCLK_MARK, PORT30_FN1),
+        PINMUX_DATA(IC_DP_MARK, PORT30_FN2),
+        PINMUX_DATA(IDIO_MARK, PORT31_FN1),
+        PINMUX_DATA(IC_DM_MARK, PORT31_FN2),
+        PINMUX_DATA(SOUT1_MARK, PORT32_FN1),
+        PINMUX_DATA(SCIFA4_TXD_MARK, PORT32_FN2),
+        PINMUX_DATA(M02_BERDAT_MARK, PORT32_FN3),
+        PINMUX_DATA(SIN1_MARK, PORT33_FN1),
+        PINMUX_DATA(SCIFA4_RXD_MARK, PORT33_FN2),
+        PINMUX_DATA(XWUP_MARK, PORT33_FN3),
+        PINMUX_DATA(XRTS1_MARK, PORT34_FN1),
+        PINMUX_DATA(SCIFA4_RTS_MARK, PORT34_FN2),
+        PINMUX_DATA(M03_BERCLK_MARK, PORT34_FN3),
+        PINMUX_DATA(XCTS1_MARK, PORT35_FN1),
+        PINMUX_DATA(SCIFA4_CTS_MARK, PORT35_FN2),
+        PINMUX_DATA(PCMCLKO_MARK, PORT36_FN1),
+        PINMUX_DATA(SYNC8KO_MARK, PORT37_FN1),
+
+        /* 55-2 (FN) */
+        PINMUX_DATA(DNPCM_A_MARK, PORT38_FN1),
+        PINMUX_DATA(UPPCM_A_MARK, PORT39_FN1),
+        PINMUX_DATA(VACK_MARK, PORT40_FN1),
+        PINMUX_DATA(XTALB1L_MARK, PORT41_FN1),
+        PINMUX_DATA(GPS_AGC1_MARK, PORT42_FN1),
+        PINMUX_DATA(SCIFA0_RTS_MARK, PORT42_FN2),
+        PINMUX_DATA(GPS_AGC4_MARK, PORT43_FN1),
+        PINMUX_DATA(SCIFA0_RXD_MARK, PORT43_FN2),
+        PINMUX_DATA(GPS_PWRDOWN_MARK, PORT44_FN1),
+        PINMUX_DATA(SCIFA0_CTS_MARK, PORT44_FN2),
+        PINMUX_DATA(GPS_IM_MARK, PORT45_FN1),
+        PINMUX_DATA(GPS_IS_MARK, PORT46_FN1),
+        PINMUX_DATA(GPS_QM_MARK, PORT47_FN1),
+        PINMUX_DATA(GPS_QS_MARK, PORT48_FN1),
+        PINMUX_DATA(FMSOCK_MARK, PORT49_FN1),
+        PINMUX_DATA(PORT49_IRDA_OUT_MARK, PORT49_FN2),
+        PINMUX_DATA(PORT49_IROUT_MARK, PORT49_FN3),
+        PINMUX_DATA(FMSOOLR_MARK, PORT50_FN1),
+        PINMUX_DATA(BBIF2_TSYNC2_MARK, PORT50_FN2),
+        PINMUX_DATA(TPU2TO2_MARK, PORT50_FN3),
+        PINMUX_DATA(IPORT3_MARK, PORT50_FN4),
+        PINMUX_DATA(FMSIOLR_MARK, PORT50_FN5),
+        PINMUX_DATA(FMSOOBT_MARK, PORT51_FN1),
+        PINMUX_DATA(BBIF2_TSCK2_MARK, PORT51_FN2),
+        PINMUX_DATA(TPU2TO3_MARK, PORT51_FN3),
+        PINMUX_DATA(OPORT1_MARK, PORT51_FN4),
+        PINMUX_DATA(FMSIOBT_MARK, PORT51_FN5),
+        PINMUX_DATA(FMSOSLD_MARK, PORT52_FN1),
+        PINMUX_DATA(BBIF2_TXD2_MARK, PORT52_FN2),
+        PINMUX_DATA(OPORT2_MARK, PORT52_FN3),
+        PINMUX_DATA(FMSOILR_MARK, PORT53_FN1),
+        PINMUX_DATA(PORT53_IRDA_IN_MARK, PORT53_FN2),
+        PINMUX_DATA(TPU3TO3_MARK, PORT53_FN3),
+        PINMUX_DATA(OPORT3_MARK, PORT53_FN4),
+        PINMUX_DATA(FMSIILR_MARK, PORT53_FN5),
+        PINMUX_DATA(FMSOIBT_MARK, PORT54_FN1),
+        PINMUX_DATA(PORT54_IRDA_FIRSEL_MARK, PORT54_FN2),
+        PINMUX_DATA(TPU3TO2_MARK, PORT54_FN3),
+        PINMUX_DATA(FMSIIBT_MARK, PORT54_FN4),
+        PINMUX_DATA(FMSISLD_MARK, PORT55_FN1),
+        PINMUX_DATA(MFG0_OUT1_MARK, PORT55_FN2),
+        PINMUX_DATA(TPU0TO0_MARK, PORT55_FN3),
+        PINMUX_DATA(A0_EA0_MARK, PORT57_FN1),
+        PINMUX_DATA(BS_MARK, PORT57_FN2),
+        PINMUX_DATA(A12_EA12_MARK, PORT58_FN1),
+        PINMUX_DATA(PORT58_VIO_CKOR_MARK, PORT58_FN2),
+        PINMUX_DATA(TPU4TO2_MARK, PORT58_FN3),
+        PINMUX_DATA(A13_EA13_MARK, PORT59_FN1),
+        PINMUX_DATA(PORT59_IROUT_MARK, PORT59_FN2),
+        PINMUX_DATA(MFG0_OUT2_MARK, PORT59_FN3),
+        PINMUX_DATA(TPU0TO1_MARK, PORT59_FN4),
+        PINMUX_DATA(A14_EA14_MARK, PORT60_FN1),
+        PINMUX_DATA(PORT60_KEYOUT5_MARK, PORT60_FN2),
+        PINMUX_DATA(A15_EA15_MARK, PORT61_FN1),
+        PINMUX_DATA(PORT61_KEYOUT4_MARK, PORT61_FN2),
+        PINMUX_DATA(A16_EA16_MARK, PORT62_FN1),
+        PINMUX_DATA(PORT62_KEYOUT3_MARK, PORT62_FN2),
+        PINMUX_DATA(MSIOF0_SS1_MARK, PORT62_FN3),
+        PINMUX_DATA(A17_EA17_MARK, PORT63_FN1),
+        PINMUX_DATA(PORT63_KEYOUT2_MARK, PORT63_FN2),
+        PINMUX_DATA(MSIOF0_TSYNC_MARK, PORT63_FN3),
+        PINMUX_DATA(A18_EA18_MARK, PORT64_FN1),
+        PINMUX_DATA(PORT64_KEYOUT1_MARK, PORT64_FN2),
+        PINMUX_DATA(MSIOF0_TSCK_MARK, PORT64_FN3),
+        PINMUX_DATA(A19_EA19_MARK, PORT65_FN1),
+        PINMUX_DATA(PORT65_KEYOUT0_MARK, PORT65_FN2),
+        PINMUX_DATA(MSIOF0_TXD_MARK, PORT65_FN3),
+        PINMUX_DATA(A20_EA20_MARK, PORT66_FN1),
+        PINMUX_DATA(PORT66_KEYIN0_MARK, PORT66_FN2),
+        PINMUX_DATA(MSIOF0_RSCK_MARK, PORT66_FN3),
+        PINMUX_DATA(A21_EA21_MARK, PORT67_FN1),
+        PINMUX_DATA(PORT67_KEYIN1_MARK, PORT67_FN2),
+        PINMUX_DATA(MSIOF0_RSYNC_MARK, PORT67_FN3),
+        PINMUX_DATA(A22_EA22_MARK, PORT68_FN1),
+        PINMUX_DATA(PORT68_KEYIN2_MARK, PORT68_FN2),
+        PINMUX_DATA(MSIOF0_MCK0_MARK, PORT68_FN3),
+        PINMUX_DATA(A23_EA23_MARK, PORT69_FN1),
+        PINMUX_DATA(PORT69_KEYIN3_MARK, PORT69_FN2),
+        PINMUX_DATA(MSIOF0_MCK1_MARK, PORT69_FN3),
+        PINMUX_DATA(A24_EA24_MARK, PORT70_FN1),
+        PINMUX_DATA(PORT70_KEYIN4_MARK, PORT70_FN2),
+        PINMUX_DATA(MSIOF0_RXD_MARK, PORT70_FN3),
+        PINMUX_DATA(A25_EA25_MARK, PORT71_FN1),
+        PINMUX_DATA(PORT71_KEYIN5_MARK, PORT71_FN2),
+        PINMUX_DATA(MSIOF0_SS2_MARK, PORT71_FN3),
+        PINMUX_DATA(A26_MARK, PORT72_FN1),
+        PINMUX_DATA(PORT72_KEYIN6_MARK, PORT72_FN2),
+        PINMUX_DATA(D0_ED0_NAF0_MARK, PORT74_FN1),
+        PINMUX_DATA(D1_ED1_NAF1_MARK, PORT75_FN1),
+        PINMUX_DATA(D2_ED2_NAF2_MARK, PORT76_FN1),
+        PINMUX_DATA(D3_ED3_NAF3_MARK, PORT77_FN1),
+        PINMUX_DATA(D4_ED4_NAF4_MARK, PORT78_FN1),
+        PINMUX_DATA(D5_ED5_NAF5_MARK, PORT79_FN1),
+        PINMUX_DATA(D6_ED6_NAF6_MARK, PORT80_FN1),
+        PINMUX_DATA(D7_ED7_NAF7_MARK, PORT81_FN1),
+        PINMUX_DATA(D8_ED8_NAF8_MARK, PORT82_FN1),
+        PINMUX_DATA(D9_ED9_NAF9_MARK, PORT83_FN1),
+        PINMUX_DATA(D10_ED10_NAF10_MARK, PORT84_FN1),
+        PINMUX_DATA(D11_ED11_NAF11_MARK, PORT85_FN1),
+        PINMUX_DATA(D12_ED12_NAF12_MARK, PORT86_FN1),
+        PINMUX_DATA(D13_ED13_NAF13_MARK, PORT87_FN1),
+        PINMUX_DATA(D14_ED14_NAF14_MARK, PORT88_FN1),
+        PINMUX_DATA(D15_ED15_NAF15_MARK, PORT89_FN1),
+        PINMUX_DATA(CS4_MARK, PORT90_FN1),
+        PINMUX_DATA(CS5A_MARK, PORT91_FN1),
+        PINMUX_DATA(FMSICK_MARK, PORT91_FN2),
+        PINMUX_DATA(CS5B_MARK, PORT92_FN1),
+        PINMUX_DATA(FCE1_MARK, PORT92_FN2),
+
+        /* 55-3 (FN) */
+        PINMUX_DATA(CS6B_MARK, PORT93_FN1),
+        PINMUX_DATA(XCS2_MARK, PORT93_FN2),
+        PINMUX_DATA(CS6A_MARK, PORT93_FN3),
+        PINMUX_DATA(DACK0_MARK, PORT93_FN4),
+        PINMUX_DATA(FCE0_MARK, PORT94_FN1),
+        PINMUX_DATA(WAIT_MARK, PORT95_FN1),
+        PINMUX_DATA(DREQ0_MARK, PORT95_FN2),
+        PINMUX_DATA(RD_XRD_MARK, PORT96_FN1),
+        PINMUX_DATA(WE0_XWR0_FWE_MARK, PORT97_FN1),
+        PINMUX_DATA(WE1_XWR1_MARK, PORT98_FN1),
+        PINMUX_DATA(FRB_MARK, PORT99_FN1),
+        PINMUX_DATA(CKO_MARK, PORT100_FN1),
+        PINMUX_DATA(NBRSTOUT_MARK, PORT101_FN1),
+        PINMUX_DATA(NBRST_MARK, PORT102_FN1),
+        PINMUX_DATA(GPS_EPPSIN_MARK, PORT106_FN1),
+        PINMUX_DATA(LATCHPULSE_MARK, PORT110_FN1),
+        PINMUX_DATA(LTESIGNAL_MARK, PORT111_FN1),
+        PINMUX_DATA(LEGACYSTATE_MARK, PORT112_FN1),
+        PINMUX_DATA(TCKON_MARK, PORT118_FN1),
+        PINMUX_DATA(VIO_VD_MARK, PORT128_FN1),
+        PINMUX_DATA(PORT128_KEYOUT0_MARK, PORT128_FN2),
+        PINMUX_DATA(IPORT0_MARK, PORT128_FN3),
+        PINMUX_DATA(VIO_HD_MARK, PORT129_FN1),
+        PINMUX_DATA(PORT129_KEYOUT1_MARK, PORT129_FN2),
+        PINMUX_DATA(IPORT1_MARK, PORT129_FN3),
+        PINMUX_DATA(VIO_D0_MARK, PORT130_FN1),
+        PINMUX_DATA(PORT130_KEYOUT2_MARK, PORT130_FN2),
+        PINMUX_DATA(PORT130_MSIOF2_RXD_MARK, PORT130_FN3),
+        PINMUX_DATA(VIO_D1_MARK, PORT131_FN1),
+        PINMUX_DATA(PORT131_KEYOUT3_MARK, PORT131_FN2),
+        PINMUX_DATA(PORT131_MSIOF2_SS1_MARK, PORT131_FN3),
+        PINMUX_DATA(VIO_D2_MARK, PORT132_FN1),
+        PINMUX_DATA(PORT132_KEYOUT4_MARK, PORT132_FN2),
+        PINMUX_DATA(PORT132_MSIOF2_SS2_MARK, PORT132_FN3),
+        PINMUX_DATA(VIO_D3_MARK, PORT133_FN1),
+        PINMUX_DATA(PORT133_KEYOUT5_MARK, PORT133_FN2),
+        PINMUX_DATA(PORT133_MSIOF2_TSYNC_MARK, PORT133_FN3),
+        PINMUX_DATA(VIO_D4_MARK, PORT134_FN1),
+        PINMUX_DATA(PORT134_KEYIN0_MARK, PORT134_FN2),
+        PINMUX_DATA(PORT134_MSIOF2_TXD_MARK, PORT134_FN3),
+        PINMUX_DATA(VIO_D5_MARK, PORT135_FN1),
+        PINMUX_DATA(PORT135_KEYIN1_MARK, PORT135_FN2),
+        PINMUX_DATA(PORT135_MSIOF2_TSCK_MARK, PORT135_FN3),
+        PINMUX_DATA(VIO_D6_MARK, PORT136_FN1),
+        PINMUX_DATA(PORT136_KEYIN2_MARK, PORT136_FN2),
+        PINMUX_DATA(VIO_D7_MARK, PORT137_FN1),
+        PINMUX_DATA(PORT137_KEYIN3_MARK, PORT137_FN2),
+        PINMUX_DATA(VIO_D8_MARK, PORT138_FN1),
+        PINMUX_DATA(M9_SLCD_A01_MARK, PORT138_FN2),
+        PINMUX_DATA(PORT138_FSIAOMC_MARK, PORT138_FN3),
+        PINMUX_DATA(VIO_D9_MARK, PORT139_FN1),
+        PINMUX_DATA(M10_SLCD_CK1_MARK, PORT139_FN2),
+        PINMUX_DATA(PORT139_FSIAOLR_MARK, PORT139_FN3),
+        PINMUX_DATA(VIO_D10_MARK, PORT140_FN1),
+        PINMUX_DATA(M11_SLCD_SO1_MARK, PORT140_FN2),
+        PINMUX_DATA(TPU0TO2_MARK, PORT140_FN3),
+        PINMUX_DATA(PORT140_FSIAOBT_MARK, PORT140_FN4),
+        PINMUX_DATA(VIO_D11_MARK, PORT141_FN1),
+        PINMUX_DATA(M12_SLCD_CE1_MARK, PORT141_FN2),
+        PINMUX_DATA(TPU0TO3_MARK, PORT141_FN3),
+        PINMUX_DATA(PORT141_FSIAOSLD_MARK, PORT141_FN4),
+        PINMUX_DATA(VIO_D12_MARK, PORT142_FN1),
+        PINMUX_DATA(M13_BSW_MARK, PORT142_FN2),
+        PINMUX_DATA(PORT142_FSIACK_MARK, PORT142_FN3),
+        PINMUX_DATA(VIO_D13_MARK, PORT143_FN1),
+        PINMUX_DATA(M14_GSW_MARK, PORT143_FN2),
+        PINMUX_DATA(PORT143_FSIAILR_MARK, PORT143_FN3),
+        PINMUX_DATA(VIO_D14_MARK, PORT144_FN1),
+        PINMUX_DATA(M15_RSW_MARK, PORT144_FN2),
+        PINMUX_DATA(PORT144_FSIAIBT_MARK, PORT144_FN3),
+        PINMUX_DATA(VIO_D15_MARK, PORT145_FN1),
+        PINMUX_DATA(TPU1TO3_MARK, PORT145_FN2),
+        PINMUX_DATA(PORT145_FSIAISLD_MARK, PORT145_FN3),
+        PINMUX_DATA(VIO_CLK_MARK, PORT146_FN1),
+        PINMUX_DATA(PORT146_KEYIN4_MARK, PORT146_FN2),
+        PINMUX_DATA(IPORT2_MARK, PORT146_FN3),
+        PINMUX_DATA(VIO_FIELD_MARK, PORT147_FN1),
+        PINMUX_DATA(PORT147_KEYIN5_MARK, PORT147_FN2),
+        PINMUX_DATA(VIO_CKO_MARK, PORT148_FN1),
+        PINMUX_DATA(PORT148_KEYIN6_MARK, PORT148_FN2),
+        PINMUX_DATA(A27_MARK, PORT149_FN1),
+        PINMUX_DATA(RDWR_XWE_MARK, PORT149_FN2),
+        PINMUX_DATA(MFG0_IN1_MARK, PORT149_FN3),
+        PINMUX_DATA(MFG0_IN2_MARK, PORT150_FN1),
+        PINMUX_DATA(TS_SPSYNC3_MARK, PORT151_FN1),
+        PINMUX_DATA(MSIOF2_RSCK_MARK, PORT151_FN2),
+        PINMUX_DATA(TS_SDAT3_MARK, PORT152_FN1),
+        PINMUX_DATA(MSIOF2_RSYNC_MARK, PORT152_FN2),
+        PINMUX_DATA(TPU1TO2_MARK, PORT153_FN1),
+        PINMUX_DATA(TS_SDEN3_MARK, PORT153_FN2),
+        PINMUX_DATA(PORT153_MSIOF2_SS1_MARK, PORT153_FN3),
+        PINMUX_DATA(SOUT3_MARK, PORT154_FN1),
+        PINMUX_DATA(SCIFA2_TXD1_MARK, PORT154_FN2),
+        PINMUX_DATA(MSIOF2_MCK0_MARK, PORT154_FN3),
+        PINMUX_DATA(SIN3_MARK, PORT155_FN1),
+        PINMUX_DATA(SCIFA2_RXD1_MARK, PORT155_FN2),
+        PINMUX_DATA(MSIOF2_MCK1_MARK, PORT155_FN3),
+        PINMUX_DATA(XRTS3_MARK, PORT156_FN1),
+        PINMUX_DATA(SCIFA2_RTS1_MARK, PORT156_FN2),
+        PINMUX_DATA(PORT156_MSIOF2_SS2_MARK, PORT156_FN3),
+        PINMUX_DATA(XCTS3_MARK, PORT157_FN1),
+        PINMUX_DATA(SCIFA2_CTS1_MARK, PORT157_FN2),
+        PINMUX_DATA(PORT157_MSIOF2_RXD_MARK, PORT157_FN3),
+
+        /* 55-4 (FN) */
+        PINMUX_DATA(DINT_MARK, PORT158_FN1),
+        PINMUX_DATA(SCIFA2_SCK1_MARK, PORT158_FN2),
+        PINMUX_DATA(TS_SCK3_MARK, PORT158_FN3),
+        PINMUX_DATA(PORT159_SCIFB_SCK_MARK, PORT159_FN1),
+        PINMUX_DATA(PORT159_SCIFA5_SCK_MARK, PORT159_FN2),
+        PINMUX_DATA(NMI_MARK, PORT159_FN3),
+        PINMUX_DATA(PORT160_SCIFB_TXD_MARK, PORT160_FN1),
+        PINMUX_DATA(PORT160_SCIFA5_TXD_MARK, PORT160_FN2),
+        PINMUX_DATA(SOUT0_MARK, PORT160_FN3),
+        PINMUX_DATA(PORT161_SCIFB_CTS_MARK, PORT161_FN1),
+        PINMUX_DATA(PORT161_SCIFA5_CTS_MARK, PORT161_FN2),
+        PINMUX_DATA(XCTS0_MARK, PORT161_FN3),
+        PINMUX_DATA(MFG3_IN2_MARK, PORT161_FN4),
+        PINMUX_DATA(PORT162_SCIFB_RXD_MARK, PORT162_FN1),
+        PINMUX_DATA(PORT162_SCIFA5_RXD_MARK, PORT162_FN2),
+        PINMUX_DATA(SIN0_MARK, PORT162_FN3),
+        PINMUX_DATA(MFG3_IN1_MARK, PORT162_FN4),
+        PINMUX_DATA(PORT163_SCIFB_RTS_MARK, PORT163_FN1),
+        PINMUX_DATA(PORT163_SCIFA5_RTS_MARK, PORT163_FN2),
+        PINMUX_DATA(XRTS0_MARK, PORT163_FN3),
+        PINMUX_DATA(MFG3_OUT1_MARK, PORT163_FN4),
+        PINMUX_DATA(TPU3TO0_MARK, PORT163_FN5),
+        PINMUX_DATA(LCDD0_MARK, PORT192_FN1),
+        PINMUX_DATA(PORT192_KEYOUT0_MARK, PORT192_FN2),
+        PINMUX_DATA(EXT_CKI_MARK, PORT192_FN3),
+        PINMUX_DATA(LCDD1_MARK, PORT193_FN1),
+        PINMUX_DATA(PORT193_KEYOUT1_MARK, PORT193_FN2),
+        PINMUX_DATA(PORT193_SCIFA5_CTS_MARK, PORT193_FN3),
+        PINMUX_DATA(BBIF2_TSYNC1_MARK, PORT193_FN4),
+        PINMUX_DATA(LCDD2_MARK, PORT194_FN1),
+        PINMUX_DATA(PORT194_KEYOUT2_MARK, PORT194_FN2),
+        PINMUX_DATA(PORT194_SCIFA5_RTS_MARK, PORT194_FN3),
+        PINMUX_DATA(BBIF2_TSCK1_MARK, PORT194_FN4),
+        PINMUX_DATA(LCDD3_MARK, PORT195_FN1),
+        PINMUX_DATA(PORT195_KEYOUT3_MARK, PORT195_FN2),
+        PINMUX_DATA(PORT195_SCIFA5_RXD_MARK, PORT195_FN3),
+        PINMUX_DATA(BBIF2_TXD1_MARK, PORT195_FN4),
+        PINMUX_DATA(LCDD4_MARK, PORT196_FN1),
+        PINMUX_DATA(PORT196_KEYOUT4_MARK, PORT196_FN2),
+        PINMUX_DATA(PORT196_SCIFA5_TXD_MARK, PORT196_FN3),
+        PINMUX_DATA(LCDD5_MARK, PORT197_FN1),
+        PINMUX_DATA(PORT197_KEYOUT5_MARK, PORT197_FN2),
+        PINMUX_DATA(PORT197_SCIFA5_SCK_MARK, PORT197_FN3),
+        PINMUX_DATA(MFG2_OUT2_MARK, PORT197_FN4),
+        PINMUX_DATA(LCDD6_MARK, PORT198_FN1),
+        PINMUX_DATA(LCDD7_MARK, PORT199_FN1),
+        PINMUX_DATA(TPU4TO1_MARK, PORT199_FN2),
+        PINMUX_DATA(MFG4_OUT2_MARK, PORT199_FN3),
+        PINMUX_DATA(LCDD8_MARK, PORT200_FN1),
+        PINMUX_DATA(PORT200_KEYIN0_MARK, PORT200_FN2),
+        PINMUX_DATA(VIO_DR0_MARK, PORT200_FN3),
+        PINMUX_DATA(D16_MARK, PORT200_FN4),
+        PINMUX_DATA(LCDD9_MARK, PORT201_FN1),
+        PINMUX_DATA(PORT201_KEYIN1_MARK, PORT201_FN2),
+        PINMUX_DATA(VIO_DR1_MARK, PORT201_FN3),
+        PINMUX_DATA(D17_MARK, PORT201_FN4),
+        PINMUX_DATA(LCDD10_MARK, PORT202_FN1),
+        PINMUX_DATA(PORT202_KEYIN2_MARK, PORT202_FN2),
+        PINMUX_DATA(VIO_DR2_MARK, PORT202_FN3),
+        PINMUX_DATA(D18_MARK, PORT202_FN4),
+        PINMUX_DATA(LCDD11_MARK, PORT203_FN1),
+        PINMUX_DATA(PORT203_KEYIN3_MARK, PORT203_FN2),
+        PINMUX_DATA(VIO_DR3_MARK, PORT203_FN3),
+        PINMUX_DATA(D19_MARK, PORT203_FN4),
+        PINMUX_DATA(LCDD12_MARK, PORT204_FN1),
+        PINMUX_DATA(PORT204_KEYIN4_MARK, PORT204_FN2),
+        PINMUX_DATA(VIO_DR4_MARK, PORT204_FN3),
+        PINMUX_DATA(D20_MARK, PORT204_FN4),
+        PINMUX_DATA(LCDD13_MARK, PORT205_FN1),
+        PINMUX_DATA(PORT205_KEYIN5_MARK, PORT205_FN2),
+        PINMUX_DATA(VIO_DR5_MARK, PORT205_FN3),
+        PINMUX_DATA(D21_MARK, PORT205_FN4),
+        PINMUX_DATA(LCDD14_MARK, PORT206_FN1),
+        PINMUX_DATA(PORT206_KEYIN6_MARK, PORT206_FN2),
+        PINMUX_DATA(VIO_DR6_MARK, PORT206_FN3),
+        PINMUX_DATA(D22_MARK, PORT206_FN4),
+        PINMUX_DATA(LCDD15_MARK, PORT207_FN1),
+        PINMUX_DATA(PORT207_MSIOF0L_SS1_MARK, PORT207_FN2),
+        PINMUX_DATA(PORT207_KEYOUT0_MARK, PORT207_FN3),
+        PINMUX_DATA(VIO_DR7_MARK, PORT207_FN4),
+        PINMUX_DATA(D23_MARK, PORT207_FN5),
+        PINMUX_DATA(LCDD16_MARK, PORT208_FN1),
+        PINMUX_DATA(PORT208_MSIOF0L_SS2_MARK, PORT208_FN2),
+        PINMUX_DATA(PORT208_KEYOUT1_MARK, PORT208_FN3),
+        PINMUX_DATA(VIO_VDR_MARK, PORT208_FN4),
+        PINMUX_DATA(D24_MARK, PORT208_FN5),
+        PINMUX_DATA(LCDD17_MARK, PORT209_FN1),
+        PINMUX_DATA(PORT209_KEYOUT2_MARK, PORT209_FN2),
+        PINMUX_DATA(VIO_HDR_MARK, PORT209_FN3),
+        PINMUX_DATA(D25_MARK, PORT209_FN4),
+        PINMUX_DATA(LCDD18_MARK, PORT210_FN1),
+        PINMUX_DATA(DREQ2_MARK, PORT210_FN2),
+        PINMUX_DATA(PORT210_MSIOF0L_SS1_MARK, PORT210_FN3),
+        PINMUX_DATA(D26_MARK, PORT210_FN4),
+        PINMUX_DATA(LCDD19_MARK, PORT211_FN1),
+        PINMUX_DATA(PORT211_MSIOF0L_SS2_MARK, PORT211_FN2),
+        PINMUX_DATA(D27_MARK, PORT211_FN3),
+        PINMUX_DATA(LCDD20_MARK, PORT212_FN1),
+        PINMUX_DATA(TS_SPSYNC1_MARK, PORT212_FN2),
+        PINMUX_DATA(MSIOF0L_MCK0_MARK, PORT212_FN3),
+        PINMUX_DATA(D28_MARK, PORT212_FN4),
+        PINMUX_DATA(LCDD21_MARK, PORT213_FN1),
+        PINMUX_DATA(TS_SDAT1_MARK, PORT213_FN2),
+        PINMUX_DATA(MSIOF0L_MCK1_MARK, PORT213_FN3),
+        PINMUX_DATA(D29_MARK, PORT213_FN4),
+        PINMUX_DATA(LCDD22_MARK, PORT214_FN1),
+        PINMUX_DATA(TS_SDEN1_MARK, PORT214_FN2),
+        PINMUX_DATA(MSIOF0L_RSCK_MARK, PORT214_FN3),
+        PINMUX_DATA(D30_MARK, PORT214_FN4),
+        PINMUX_DATA(LCDD23_MARK, PORT215_FN1),
+        PINMUX_DATA(TS_SCK1_MARK, PORT215_FN2),
+        PINMUX_DATA(MSIOF0L_RSYNC_MARK, PORT215_FN3),
+        PINMUX_DATA(D31_MARK, PORT215_FN4),
+        PINMUX_DATA(LCDDCK_MARK, PORT216_FN1),
+        PINMUX_DATA(LCDWR_MARK, PORT216_FN2),
+        PINMUX_DATA(PORT216_KEYOUT3_MARK, PORT216_FN3),
+        PINMUX_DATA(VIO_CLKR_MARK, PORT216_FN4),
+        PINMUX_DATA(LCDRD_MARK, PORT217_FN1),
+        PINMUX_DATA(DACK2_MARK, PORT217_FN2),
+        PINMUX_DATA(MSIOF0L_TSYNC_MARK, PORT217_FN3),
+        PINMUX_DATA(LCDHSYN_MARK, PORT218_FN1),
+        PINMUX_DATA(LCDCS_MARK, PORT218_FN2),
+        PINMUX_DATA(LCDCS2_MARK, PORT218_FN3),
+        PINMUX_DATA(DACK3_MARK, PORT218_FN4),
+        PINMUX_DATA(PORT218_VIO_CKOR_MARK, PORT218_FN5),
+        PINMUX_DATA(PORT218_KEYOUT4_MARK, PORT218_FN6),
+        PINMUX_DATA(LCDDISP_MARK, PORT219_FN1),
+        PINMUX_DATA(LCDRS_MARK, PORT219_FN2),
+        PINMUX_DATA(DREQ3_MARK, PORT219_FN3),
+        PINMUX_DATA(MSIOF0L_TSCK_MARK, PORT219_FN4),
+        PINMUX_DATA(LCDVSYN_MARK, PORT220_FN1),
+        PINMUX_DATA(LCDVSYN2_MARK, PORT220_FN2),
+        PINMUX_DATA(PORT220_KEYOUT5_MARK, PORT220_FN3),
+        PINMUX_DATA(LCDLCLK_MARK, PORT221_FN1),
+        PINMUX_DATA(DREQ1_MARK, PORT221_FN2),
+        PINMUX_DATA(PWEN_MARK, PORT221_FN3),
+        PINMUX_DATA(MSIOF0L_RXD_MARK, PORT221_FN4),
+        PINMUX_DATA(LCDDON_MARK, PORT222_FN1),
+        PINMUX_DATA(LCDDON2_MARK, PORT222_FN2),
+        PINMUX_DATA(DACK1_MARK, PORT222_FN3),
+        PINMUX_DATA(OVCN_MARK, PORT222_FN4),
+        PINMUX_DATA(MSIOF0L_TXD_MARK, PORT222_FN5),
+        PINMUX_DATA(SCIFA1_TXD_MARK, PORT225_FN1),
+        PINMUX_DATA(OVCN2_MARK, PORT225_FN2),
+        PINMUX_DATA(EXTLP_MARK, PORT226_FN1),
+        PINMUX_DATA(SCIFA1_SCK_MARK, PORT226_FN2),
+        PINMUX_DATA(USBTERM_MARK, PORT226_FN3),
+        PINMUX_DATA(PORT226_VIO_CKO2_MARK, PORT226_FN4),
+        PINMUX_DATA(SCIFA1_RTS_MARK, PORT227_FN1),
+        PINMUX_DATA(IDIN_MARK, PORT227_FN2),
+        PINMUX_DATA(SCIFA1_RXD_MARK, PORT228_FN1),
+        PINMUX_DATA(SCIFA1_CTS_MARK, PORT229_FN1),
+        PINMUX_DATA(MFG1_IN1_MARK, PORT229_FN2),
+        PINMUX_DATA(MSIOF1_TXD_MARK, PORT230_FN1),
+        PINMUX_DATA(SCIFA2_TXD2_MARK, PORT230_FN2),
+        PINMUX_DATA(PORT230_FSIAOMC_MARK, PORT230_FN3),
+        PINMUX_DATA(MSIOF1_TSYNC_MARK, PORT231_FN1),
+        PINMUX_DATA(SCIFA2_CTS2_MARK, PORT231_FN2),
+        PINMUX_DATA(PORT231_FSIAOLR_MARK, PORT231_FN3),
+        PINMUX_DATA(MSIOF1_TSCK_MARK, PORT232_FN1),
+        PINMUX_DATA(SCIFA2_SCK2_MARK, PORT232_FN2),
+        PINMUX_DATA(PORT232_FSIAOBT_MARK, PORT232_FN3),
+        PINMUX_DATA(MSIOF1_RXD_MARK, PORT233_FN1),
+        PINMUX_DATA(SCIFA2_RXD2_MARK, PORT233_FN2),
+        PINMUX_DATA(GPS_VCOTRIG_MARK, PORT233_FN3),
+        PINMUX_DATA(PORT233_FSIACK_MARK, PORT233_FN4),
+        PINMUX_DATA(MSIOF1_RSCK_MARK, PORT234_FN1),
+        PINMUX_DATA(SCIFA2_RTS2_MARK, PORT234_FN2),
+        PINMUX_DATA(PORT234_FSIAOSLD_MARK, PORT234_FN3),
+        PINMUX_DATA(MSIOF1_RSYNC_MARK, PORT235_FN1),
+        PINMUX_DATA(OPORT0_MARK, PORT235_FN2),
+        PINMUX_DATA(MFG1_IN2_MARK, PORT235_FN3),
+        PINMUX_DATA(PORT235_FSIAILR_MARK, PORT235_FN4),
+        PINMUX_DATA(MSIOF1_MCK0_MARK, PORT236_FN1),
+        PINMUX_DATA(I2C_SDA2_MARK, PORT236_FN2),
+        PINMUX_DATA(PORT236_FSIAIBT_MARK, PORT236_FN3),
+        PINMUX_DATA(MSIOF1_MCK1_MARK, PORT237_FN1),
+        PINMUX_DATA(I2C_SCL2_MARK, PORT237_FN2),
+        PINMUX_DATA(PORT237_FSIAISLD_MARK, PORT237_FN3),
+        PINMUX_DATA(MSIOF1_SS1_MARK, PORT238_FN1),
+        PINMUX_DATA(EDBGREQ3_MARK, PORT238_FN2),
+
+        /* 55-5 (FN) */
+        PINMUX_DATA(MSIOF1_SS2_MARK, PORT239_FN1),
+        PINMUX_DATA(SCIFA6_TXD_MARK, PORT240_FN1),
+        PINMUX_DATA(PORT241_IRDA_OUT_MARK, PORT241_FN1),
+        PINMUX_DATA(PORT241_IROUT_MARK, PORT241_FN2),
+        PINMUX_DATA(MFG4_OUT1_MARK, PORT241_FN3),
+        PINMUX_DATA(TPU4TO0_MARK, PORT241_FN4),
+        PINMUX_DATA(PORT242_IRDA_IN_MARK, PORT242_FN1),
+        PINMUX_DATA(MFG4_IN2_MARK, PORT242_FN2),
+        PINMUX_DATA(PORT243_IRDA_FIRSEL_MARK, PORT243_FN1),
+        PINMUX_DATA(PORT243_VIO_CKO2_MARK, PORT243_FN2),
+        PINMUX_DATA(PORT244_SCIFA5_CTS_MARK, PORT244_FN1),
+        PINMUX_DATA(MFG2_IN1_MARK, PORT244_FN2),
+        PINMUX_DATA(PORT244_SCIFB_CTS_MARK, PORT244_FN3),
+        PINMUX_DATA(PORT245_SCIFA5_RTS_MARK, PORT245_FN1),
+        PINMUX_DATA(MFG2_IN2_MARK, PORT245_FN2),
+        PINMUX_DATA(PORT245_SCIFB_RTS_MARK, PORT245_FN3),
+        PINMUX_DATA(PORT246_SCIFA5_RXD_MARK, PORT246_FN1),
+        PINMUX_DATA(MFG1_OUT1_MARK, PORT246_FN2),
+        PINMUX_DATA(PORT246_SCIFB_RXD_MARK, PORT246_FN3),
+        PINMUX_DATA(TPU1TO0_MARK, PORT246_FN4),
+        PINMUX_DATA(PORT247_SCIFA5_TXD_MARK, PORT247_FN1),
+        PINMUX_DATA(MFG3_OUT2_MARK, PORT247_FN2),
+        PINMUX_DATA(PORT247_SCIFB_TXD_MARK, PORT247_FN3),
+        PINMUX_DATA(TPU3TO1_MARK, PORT247_FN4),
+        PINMUX_DATA(PORT248_SCIFA5_SCK_MARK, PORT248_FN1),
+        PINMUX_DATA(MFG2_OUT1_MARK, PORT248_FN2),
+        PINMUX_DATA(PORT248_SCIFB_SCK_MARK, PORT248_FN3),
+        PINMUX_DATA(TPU2TO0_MARK, PORT248_FN4),
+        PINMUX_DATA(PORT249_IROUT_MARK, PORT249_FN1),
+        PINMUX_DATA(MFG4_IN1_MARK, PORT249_FN2),
+        PINMUX_DATA(SDHICLK0_MARK, PORT250_FN1),
+        PINMUX_DATA(TCK2_SWCLK_MC0_MARK, PORT250_FN2),
+        PINMUX_DATA(SDHICD0_MARK, PORT251_FN1),
+        PINMUX_DATA(SDHID0_0_MARK, PORT252_FN1),
+        PINMUX_DATA(TMS2_SWDIO_MC0_MARK, PORT252_FN2),
+        PINMUX_DATA(SDHID0_1_MARK, PORT253_FN1),
+        PINMUX_DATA(TDO2_SWO0_MC0_MARK, PORT253_FN2),
+        PINMUX_DATA(SDHID0_2_MARK, PORT254_FN1),
+        PINMUX_DATA(TDI2_MARK, PORT254_FN2),
+        PINMUX_DATA(SDHID0_3_MARK, PORT255_FN1),
+        PINMUX_DATA(RTCK2_SWO1_MC0_MARK, PORT255_FN2),
+        PINMUX_DATA(SDHICMD0_MARK, PORT256_FN1),
+        PINMUX_DATA(TRST2_MARK, PORT256_FN2),
+        PINMUX_DATA(SDHIWP0_MARK, PORT257_FN1),
+        PINMUX_DATA(EDBGREQ2_MARK, PORT257_FN2),
+        PINMUX_DATA(SDHICLK1_MARK, PORT258_FN1),
+        PINMUX_DATA(TCK3_SWCLK_MC1_MARK, PORT258_FN2),
+        PINMUX_DATA(SDHID1_0_MARK, PORT259_FN1),
+        PINMUX_DATA(M11_SLCD_SO2_MARK, PORT259_FN2),
+        PINMUX_DATA(TS_SPSYNC2_MARK, PORT259_FN3),
+        PINMUX_DATA(TMS3_SWDIO_MC1_MARK, PORT259_FN4),
+        PINMUX_DATA(SDHID1_1_MARK, PORT260_FN1),
+        PINMUX_DATA(M9_SLCD_A02_MARK, PORT260_FN2),
+        PINMUX_DATA(TS_SDAT2_MARK, PORT260_FN3),
+        PINMUX_DATA(TDO3_SWO0_MC1_MARK, PORT260_FN4),
+        PINMUX_DATA(SDHID1_2_MARK, PORT261_FN1),
+        PINMUX_DATA(M10_SLCD_CK2_MARK, PORT261_FN2),
+        PINMUX_DATA(TS_SDEN2_MARK, PORT261_FN3),
+        PINMUX_DATA(TDI3_MARK, PORT261_FN4),
+        PINMUX_DATA(SDHID1_3_MARK, PORT262_FN1),
+        PINMUX_DATA(M12_SLCD_CE2_MARK, PORT262_FN2),
+        PINMUX_DATA(TS_SCK2_MARK, PORT262_FN3),
+        PINMUX_DATA(RTCK3_SWO1_MC1_MARK, PORT262_FN4),
+        PINMUX_DATA(SDHICMD1_MARK, PORT263_FN1),
+        PINMUX_DATA(TRST3_MARK, PORT263_FN2),
+        PINMUX_DATA(RESETOUTS_MARK, PORT264_FN1),
+};
+
+#define _GPIO_PORT(pfx, sfx) PINMUX_GPIO(GPIO_PORT##pfx, PORT##pfx##_DATA)
+#define GPIO_PORT_265() _265(_GPIO_PORT, , unused)
+#define GPIO_FN(str) PINMUX_GPIO(GPIO_FN_##str, str##_MARK)
+
+static struct pinmux_gpio pinmux_gpios[] = {
+        /* 55-1 -> 55-5 (GPIO) */
+        GPIO_PORT_265(),
+
+        /* Special Pull-up / Pull-down Functions */
+        GPIO_FN(PORT66_KEYIN0_PU), GPIO_FN(PORT67_KEYIN1_PU),
+        GPIO_FN(PORT68_KEYIN2_PU), GPIO_FN(PORT69_KEYIN3_PU),
+        GPIO_FN(PORT70_KEYIN4_PU), GPIO_FN(PORT71_KEYIN5_PU),
+        GPIO_FN(PORT72_KEYIN6_PU),
+
+        /* 55-1 (FN) */
+        GPIO_FN(VBUS_0),
+        GPIO_FN(CPORT0),
+        GPIO_FN(CPORT1),
+        GPIO_FN(CPORT2),
+        GPIO_FN(CPORT3),
+        GPIO_FN(CPORT4),
+        GPIO_FN(CPORT5),
+        GPIO_FN(CPORT6),
+        GPIO_FN(CPORT7),
+        GPIO_FN(CPORT8),
+        GPIO_FN(CPORT9),
+        GPIO_FN(CPORT10),
+        GPIO_FN(CPORT11), GPIO_FN(SIN2),
+        GPIO_FN(CPORT12), GPIO_FN(XCTS2),
+        GPIO_FN(CPORT13), GPIO_FN(RFSPO4),
+        GPIO_FN(CPORT14), GPIO_FN(RFSPO5),
+        GPIO_FN(CPORT15), GPIO_FN(SCIFA0_SCK), GPIO_FN(GPS_AGC2),
+        GPIO_FN(CPORT16), GPIO_FN(SCIFA0_TXD), GPIO_FN(GPS_AGC3),
+        GPIO_FN(CPORT17_IC_OE), GPIO_FN(SOUT2),
+        GPIO_FN(CPORT18), GPIO_FN(XRTS2), GPIO_FN(PORT19_VIO_CKO2),
+        GPIO_FN(CPORT19_MPORT1),
+        GPIO_FN(CPORT20), GPIO_FN(RFSPO6),
+        GPIO_FN(CPORT21), GPIO_FN(STATUS0),
+        GPIO_FN(CPORT22), GPIO_FN(STATUS1),
+        GPIO_FN(CPORT23), GPIO_FN(STATUS2), GPIO_FN(RFSPO7),
+        GPIO_FN(B_SYNLD1),
+        GPIO_FN(B_SYNLD2), GPIO_FN(SYSENMSK),
+        GPIO_FN(XMAINPS),
+        GPIO_FN(XDIVPS),
+        GPIO_FN(XIDRST),
+        GPIO_FN(IDCLK), GPIO_FN(IC_DP),
+        GPIO_FN(IDIO), GPIO_FN(IC_DM),
+        GPIO_FN(SOUT1), GPIO_FN(SCIFA4_TXD), GPIO_FN(M02_BERDAT),
+        GPIO_FN(SIN1), GPIO_FN(SCIFA4_RXD), GPIO_FN(XWUP),
+        GPIO_FN(XRTS1), GPIO_FN(SCIFA4_RTS), GPIO_FN(M03_BERCLK),
+        GPIO_FN(XCTS1), GPIO_FN(SCIFA4_CTS),
+        GPIO_FN(PCMCLKO),
+        GPIO_FN(SYNC8KO),
+
+        /* 55-2 (FN) */
+        GPIO_FN(DNPCM_A),
+        GPIO_FN(UPPCM_A),
+        GPIO_FN(VACK),
+        GPIO_FN(XTALB1L),
+        GPIO_FN(GPS_AGC1), GPIO_FN(SCIFA0_RTS),
+        GPIO_FN(GPS_AGC4), GPIO_FN(SCIFA0_RXD),
+        GPIO_FN(GPS_PWRDOWN), GPIO_FN(SCIFA0_CTS),
+        GPIO_FN(GPS_IM),
+        GPIO_FN(GPS_IS),
+        GPIO_FN(GPS_QM),
+        GPIO_FN(GPS_QS),
+        GPIO_FN(FMSOCK), GPIO_FN(PORT49_IRDA_OUT), GPIO_FN(PORT49_IROUT),
+        GPIO_FN(FMSOOLR), GPIO_FN(BBIF2_TSYNC2), GPIO_FN(TPU2TO2),
+        GPIO_FN(IPORT3), GPIO_FN(FMSIOLR),
+        GPIO_FN(FMSOOBT), GPIO_FN(BBIF2_TSCK2), GPIO_FN(TPU2TO3),
+        GPIO_FN(OPORT1), GPIO_FN(FMSIOBT),
+        GPIO_FN(FMSOSLD), GPIO_FN(BBIF2_TXD2), GPIO_FN(OPORT2),
+        GPIO_FN(FMSOILR), GPIO_FN(PORT53_IRDA_IN), GPIO_FN(TPU3TO3),
+        GPIO_FN(OPORT3), GPIO_FN(FMSIILR),
+        GPIO_FN(FMSOIBT), GPIO_FN(PORT54_IRDA_FIRSEL), GPIO_FN(TPU3TO2),
+        GPIO_FN(FMSIIBT),
+        GPIO_FN(FMSISLD), GPIO_FN(MFG0_OUT1), GPIO_FN(TPU0TO0),
+        GPIO_FN(A0_EA0), GPIO_FN(BS),
+        GPIO_FN(A12_EA12), GPIO_FN(PORT58_VIO_CKOR), GPIO_FN(TPU4TO2),
+        GPIO_FN(A13_EA13), GPIO_FN(PORT59_IROUT), GPIO_FN(MFG0_OUT2),
+        GPIO_FN(TPU0TO1),
+        GPIO_FN(A14_EA14), GPIO_FN(PORT60_KEYOUT5),
+        GPIO_FN(A15_EA15), GPIO_FN(PORT61_KEYOUT4),
+        GPIO_FN(A16_EA16), GPIO_FN(PORT62_KEYOUT3), GPIO_FN(MSIOF0_SS1),
+        GPIO_FN(A17_EA17), GPIO_FN(PORT63_KEYOUT2), GPIO_FN(MSIOF0_TSYNC),
+        GPIO_FN(A18_EA18), GPIO_FN(PORT64_KEYOUT1), GPIO_FN(MSIOF0_TSCK),
+        GPIO_FN(A19_EA19), GPIO_FN(PORT65_KEYOUT0), GPIO_FN(MSIOF0_TXD),
+        GPIO_FN(A20_EA20), GPIO_FN(PORT66_KEYIN0), GPIO_FN(MSIOF0_RSCK),
+        GPIO_FN(A21_EA21), GPIO_FN(PORT67_KEYIN1), GPIO_FN(MSIOF0_RSYNC),
+        GPIO_FN(A22_EA22), GPIO_FN(PORT68_KEYIN2), GPIO_FN(MSIOF0_MCK0),
+        GPIO_FN(A23_EA23), GPIO_FN(PORT69_KEYIN3), GPIO_FN(MSIOF0_MCK1),
+        GPIO_FN(A24_EA24), GPIO_FN(PORT70_KEYIN4), GPIO_FN(MSIOF0_RXD),
+        GPIO_FN(A25_EA25), GPIO_FN(PORT71_KEYIN5), GPIO_FN(MSIOF0_SS2),
+        GPIO_FN(A26), GPIO_FN(PORT72_KEYIN6),
+        GPIO_FN(D0_ED0_NAF0),
+        GPIO_FN(D1_ED1_NAF1),
+        GPIO_FN(D2_ED2_NAF2),
+        GPIO_FN(D3_ED3_NAF3),
+        GPIO_FN(D4_ED4_NAF4),
+        GPIO_FN(D5_ED5_NAF5),
+        GPIO_FN(D6_ED6_NAF6),
+        GPIO_FN(D7_ED7_NAF7),
+        GPIO_FN(D8_ED8_NAF8),
+        GPIO_FN(D9_ED9_NAF9),
+        GPIO_FN(D10_ED10_NAF10),
+        GPIO_FN(D11_ED11_NAF11),
+        GPIO_FN(D12_ED12_NAF12),
+        GPIO_FN(D13_ED13_NAF13),
+        GPIO_FN(D14_ED14_NAF14),
+        GPIO_FN(D15_ED15_NAF15),
+        GPIO_FN(CS4),
+        GPIO_FN(CS5A), GPIO_FN(FMSICK),
+
+        /* 55-3 (FN) */
+        GPIO_FN(CS5B), GPIO_FN(FCE1),
+        GPIO_FN(CS6B), GPIO_FN(XCS2), GPIO_FN(CS6A), GPIO_FN(DACK0),
+        GPIO_FN(FCE0),
+        GPIO_FN(WAIT), GPIO_FN(DREQ0),
+        GPIO_FN(RD_XRD),
+        GPIO_FN(WE0_XWR0_FWE),
+        GPIO_FN(WE1_XWR1),
+        GPIO_FN(FRB),
+        GPIO_FN(CKO),
+        GPIO_FN(NBRSTOUT),
+        GPIO_FN(NBRST),
+        GPIO_FN(GPS_EPPSIN),
+        GPIO_FN(LATCHPULSE),
+        GPIO_FN(LTESIGNAL),
+        GPIO_FN(LEGACYSTATE),
+        GPIO_FN(TCKON),
+        GPIO_FN(VIO_VD), GPIO_FN(PORT128_KEYOUT0), GPIO_FN(IPORT0),
+        GPIO_FN(VIO_HD), GPIO_FN(PORT129_KEYOUT1), GPIO_FN(IPORT1),
+        GPIO_FN(VIO_D0), GPIO_FN(PORT130_KEYOUT2), GPIO_FN(PORT130_MSIOF2_RXD),
+        GPIO_FN(VIO_D1), GPIO_FN(PORT131_KEYOUT3), GPIO_FN(PORT131_MSIOF2_SS1),
+        GPIO_FN(VIO_D2), GPIO_FN(PORT132_KEYOUT4), GPIO_FN(PORT132_MSIOF2_SS2),
+        GPIO_FN(VIO_D3), GPIO_FN(PORT133_KEYOUT5),
+        GPIO_FN(PORT133_MSIOF2_TSYNC),
+        GPIO_FN(VIO_D4), GPIO_FN(PORT134_KEYIN0), GPIO_FN(PORT134_MSIOF2_TXD),
+        GPIO_FN(VIO_D5), GPIO_FN(PORT135_KEYIN1), GPIO_FN(PORT135_MSIOF2_TSCK),
+        GPIO_FN(VIO_D6), GPIO_FN(PORT136_KEYIN2),
+        GPIO_FN(VIO_D7), GPIO_FN(PORT137_KEYIN3),
+        GPIO_FN(VIO_D8), GPIO_FN(M9_SLCD_A01), GPIO_FN(PORT138_FSIAOMC),
+        GPIO_FN(VIO_D9), GPIO_FN(M10_SLCD_CK1), GPIO_FN(PORT139_FSIAOLR),
+        GPIO_FN(VIO_D10), GPIO_FN(M11_SLCD_SO1), GPIO_FN(TPU0TO2),
+        GPIO_FN(PORT140_FSIAOBT),
+        GPIO_FN(VIO_D11), GPIO_FN(M12_SLCD_CE1), GPIO_FN(TPU0TO3),
+        GPIO_FN(PORT141_FSIAOSLD),
+        GPIO_FN(VIO_D12), GPIO_FN(M13_BSW), GPIO_FN(PORT142_FSIACK),
+        GPIO_FN(VIO_D13), GPIO_FN(M14_GSW), GPIO_FN(PORT143_FSIAILR),
+        GPIO_FN(VIO_D14), GPIO_FN(M15_RSW), GPIO_FN(PORT144_FSIAIBT),
+        GPIO_FN(VIO_D15), GPIO_FN(TPU1TO3), GPIO_FN(PORT145_FSIAISLD),
+        GPIO_FN(VIO_CLK), GPIO_FN(PORT146_KEYIN4), GPIO_FN(IPORT2),
+        GPIO_FN(VIO_FIELD), GPIO_FN(PORT147_KEYIN5),
+        GPIO_FN(VIO_CKO), GPIO_FN(PORT148_KEYIN6),
+        GPIO_FN(A27), GPIO_FN(RDWR_XWE), GPIO_FN(MFG0_IN1),
+        GPIO_FN(MFG0_IN2),
+        GPIO_FN(TS_SPSYNC3), GPIO_FN(MSIOF2_RSCK),
+        GPIO_FN(TS_SDAT3), GPIO_FN(MSIOF2_RSYNC),
+        GPIO_FN(TPU1TO2), GPIO_FN(TS_SDEN3), GPIO_FN(PORT153_MSIOF2_SS1),
+        GPIO_FN(SOUT3), GPIO_FN(SCIFA2_TXD1), GPIO_FN(MSIOF2_MCK0),
+        GPIO_FN(SIN3), GPIO_FN(SCIFA2_RXD1), GPIO_FN(MSIOF2_MCK1),
+        GPIO_FN(XRTS3), GPIO_FN(SCIFA2_RTS1), GPIO_FN(PORT156_MSIOF2_SS2),
+        GPIO_FN(XCTS3), GPIO_FN(SCIFA2_CTS1), GPIO_FN(PORT157_MSIOF2_RXD),
+
+        /* 55-4 (FN) */
+        GPIO_FN(DINT), GPIO_FN(SCIFA2_SCK1), GPIO_FN(TS_SCK3),
+        GPIO_FN(PORT159_SCIFB_SCK), GPIO_FN(PORT159_SCIFA5_SCK), GPIO_FN(NMI),
+        GPIO_FN(PORT160_SCIFB_TXD), GPIO_FN(PORT160_SCIFA5_TXD), GPIO_FN(SOUT0),
+        GPIO_FN(PORT161_SCIFB_CTS), GPIO_FN(PORT161_SCIFA5_CTS), GPIO_FN(XCTS0),
+        GPIO_FN(MFG3_IN2),
+        GPIO_FN(PORT162_SCIFB_RXD), GPIO_FN(PORT162_SCIFA5_RXD), GPIO_FN(SIN0),
+        GPIO_FN(MFG3_IN1),
+        GPIO_FN(PORT163_SCIFB_RTS), GPIO_FN(PORT163_SCIFA5_RTS), GPIO_FN(XRTS0),
+        GPIO_FN(MFG3_OUT1), GPIO_FN(TPU3TO0),
+        GPIO_FN(LCDD0), GPIO_FN(PORT192_KEYOUT0), GPIO_FN(EXT_CKI),
+        GPIO_FN(LCDD1), GPIO_FN(PORT193_KEYOUT1), GPIO_FN(PORT193_SCIFA5_CTS),
+        GPIO_FN(BBIF2_TSYNC1),
+        GPIO_FN(LCDD2), GPIO_FN(PORT194_KEYOUT2), GPIO_FN(PORT194_SCIFA5_RTS),
+        GPIO_FN(BBIF2_TSCK1),
+        GPIO_FN(LCDD3), GPIO_FN(PORT195_KEYOUT3), GPIO_FN(PORT195_SCIFA5_RXD),
+        GPIO_FN(BBIF2_TXD1),
+        GPIO_FN(LCDD4), GPIO_FN(PORT196_KEYOUT4), GPIO_FN(PORT196_SCIFA5_TXD),
+        GPIO_FN(LCDD5), GPIO_FN(PORT197_KEYOUT5), GPIO_FN(PORT197_SCIFA5_SCK),
+        GPIO_FN(MFG2_OUT2),
+        GPIO_FN(LCDD6),
+        GPIO_FN(LCDD7), GPIO_FN(TPU4TO1), GPIO_FN(MFG4_OUT2),
+        GPIO_FN(LCDD8), GPIO_FN(PORT200_KEYIN0), GPIO_FN(VIO_DR0),
+        GPIO_FN(D16),
+        GPIO_FN(LCDD9), GPIO_FN(PORT201_KEYIN1), GPIO_FN(VIO_DR1),
+        GPIO_FN(D17),
+        GPIO_FN(LCDD10), GPIO_FN(PORT202_KEYIN2), GPIO_FN(VIO_DR2),
+        GPIO_FN(D18),
+        GPIO_FN(LCDD11), GPIO_FN(PORT203_KEYIN3), GPIO_FN(VIO_DR3),
+        GPIO_FN(D19),
+        GPIO_FN(LCDD12), GPIO_FN(PORT204_KEYIN4), GPIO_FN(VIO_DR4),
+        GPIO_FN(D20),
+        GPIO_FN(LCDD13), GPIO_FN(PORT205_KEYIN5), GPIO_FN(VIO_DR5),
+        GPIO_FN(D21),
+        GPIO_FN(LCDD14), GPIO_FN(PORT206_KEYIN6), GPIO_FN(VIO_DR6),
+        GPIO_FN(D22),
+        GPIO_FN(LCDD15), GPIO_FN(PORT207_MSIOF0L_SS1), GPIO_FN(PORT207_KEYOUT0),
+        GPIO_FN(VIO_DR7), GPIO_FN(D23),
+        GPIO_FN(LCDD16), GPIO_FN(PORT208_MSIOF0L_SS2), GPIO_FN(PORT208_KEYOUT1),
+        GPIO_FN(VIO_VDR), GPIO_FN(D24),
+        GPIO_FN(LCDD17), GPIO_FN(PORT209_KEYOUT2), GPIO_FN(VIO_HDR),
+        GPIO_FN(D25),
+        GPIO_FN(LCDD18), GPIO_FN(DREQ2), GPIO_FN(PORT210_MSIOF0L_SS1),
+        GPIO_FN(D26),
+        GPIO_FN(LCDD19), GPIO_FN(PORT211_MSIOF0L_SS2), GPIO_FN(D27),
+        GPIO_FN(LCDD20), GPIO_FN(TS_SPSYNC1), GPIO_FN(MSIOF0L_MCK0),
+        GPIO_FN(D28),
+        GPIO_FN(LCDD21), GPIO_FN(TS_SDAT1), GPIO_FN(MSIOF0L_MCK1),
+        GPIO_FN(D29),
+        GPIO_FN(LCDD22), GPIO_FN(TS_SDEN1), GPIO_FN(MSIOF0L_RSCK),
+        GPIO_FN(D30),
+        GPIO_FN(LCDD23), GPIO_FN(TS_SCK1), GPIO_FN(MSIOF0L_RSYNC),
+        GPIO_FN(D31),
+        GPIO_FN(LCDDCK), GPIO_FN(LCDWR), GPIO_FN(PORT216_KEYOUT3),
+        GPIO_FN(VIO_CLKR),
+        GPIO_FN(LCDRD), GPIO_FN(DACK2), GPIO_FN(MSIOF0L_TSYNC),
+        GPIO_FN(LCDHSYN), GPIO_FN(LCDCS), GPIO_FN(LCDCS2), GPIO_FN(DACK3),
+        GPIO_FN(PORT218_VIO_CKOR), GPIO_FN(PORT218_KEYOUT4),
+        GPIO_FN(LCDDISP), GPIO_FN(LCDRS), GPIO_FN(DREQ3), GPIO_FN(MSIOF0L_TSCK),
+        GPIO_FN(LCDVSYN), GPIO_FN(LCDVSYN2), GPIO_FN(PORT220_KEYOUT5),
+        GPIO_FN(LCDLCLK), GPIO_FN(DREQ1), GPIO_FN(PWEN), GPIO_FN(MSIOF0L_RXD),
+        GPIO_FN(LCDDON), GPIO_FN(LCDDON2), GPIO_FN(DACK1), GPIO_FN(OVCN),
+        GPIO_FN(MSIOF0L_TXD),
+        GPIO_FN(SCIFA1_TXD), GPIO_FN(OVCN2),
+        GPIO_FN(EXTLP), GPIO_FN(SCIFA1_SCK), GPIO_FN(USBTERM),
+        GPIO_FN(PORT226_VIO_CKO2),
+        GPIO_FN(SCIFA1_RTS), GPIO_FN(IDIN),
+        GPIO_FN(SCIFA1_RXD),
+        GPIO_FN(SCIFA1_CTS), GPIO_FN(MFG1_IN1),
+        GPIO_FN(MSIOF1_TXD), GPIO_FN(SCIFA2_TXD2), GPIO_FN(PORT230_FSIAOMC),
+        GPIO_FN(MSIOF1_TSYNC), GPIO_FN(SCIFA2_CTS2), GPIO_FN(PORT231_FSIAOLR),
+        GPIO_FN(MSIOF1_TSCK), GPIO_FN(SCIFA2_SCK2), GPIO_FN(PORT232_FSIAOBT),
+        GPIO_FN(MSIOF1_RXD), GPIO_FN(SCIFA2_RXD2), GPIO_FN(GPS_VCOTRIG),
+        GPIO_FN(PORT233_FSIACK),
+        GPIO_FN(MSIOF1_RSCK), GPIO_FN(SCIFA2_RTS2), GPIO_FN(PORT234_FSIAOSLD),
+        GPIO_FN(MSIOF1_RSYNC), GPIO_FN(OPORT0), GPIO_FN(MFG1_IN2),
+        GPIO_FN(PORT235_FSIAILR),
+        GPIO_FN(MSIOF1_MCK0), GPIO_FN(I2C_SDA2), GPIO_FN(PORT236_FSIAIBT),
+        GPIO_FN(MSIOF1_MCK1), GPIO_FN(I2C_SCL2), GPIO_FN(PORT237_FSIAISLD),
+        GPIO_FN(MSIOF1_SS1), GPIO_FN(EDBGREQ3),
+
+        /* 55-5 (FN) */
+        GPIO_FN(MSIOF1_SS2),
+        GPIO_FN(SCIFA6_TXD),
+        GPIO_FN(PORT241_IRDA_OUT), GPIO_FN(PORT241_IROUT), GPIO_FN(MFG4_OUT1),
+        GPIO_FN(TPU4TO0),
+        GPIO_FN(PORT242_IRDA_IN), GPIO_FN(MFG4_IN2),
+        GPIO_FN(PORT243_IRDA_FIRSEL), GPIO_FN(PORT243_VIO_CKO2),
+        GPIO_FN(PORT244_SCIFA5_CTS), GPIO_FN(MFG2_IN1),
+        GPIO_FN(PORT244_SCIFB_CTS),
+        GPIO_FN(PORT245_SCIFA5_RTS), GPIO_FN(MFG2_IN2),
+        GPIO_FN(PORT245_SCIFB_RTS),
+        GPIO_FN(PORT246_SCIFA5_RXD), GPIO_FN(MFG1_OUT1),
+        GPIO_FN(PORT246_SCIFB_RXD), GPIO_FN(TPU1TO0),
+        GPIO_FN(PORT247_SCIFA5_TXD), GPIO_FN(MFG3_OUT2),
+        GPIO_FN(PORT247_SCIFB_TXD), GPIO_FN(TPU3TO1),
+        GPIO_FN(PORT248_SCIFA5_SCK), GPIO_FN(MFG2_OUT1),
+        GPIO_FN(PORT248_SCIFB_SCK), GPIO_FN(TPU2TO0),
+        GPIO_FN(PORT249_IROUT), GPIO_FN(MFG4_IN1),
+        GPIO_FN(SDHICLK0), GPIO_FN(TCK2_SWCLK_MC0),
+        GPIO_FN(SDHICD0),
+        GPIO_FN(SDHID0_0), GPIO_FN(TMS2_SWDIO_MC0),
+        GPIO_FN(SDHID0_1), GPIO_FN(TDO2_SWO0_MC0),
+        GPIO_FN(SDHID0_2), GPIO_FN(TDI2),
+        GPIO_FN(SDHID0_3), GPIO_FN(RTCK2_SWO1_MC0),
+        GPIO_FN(SDHICMD0), GPIO_FN(TRST2),
+        GPIO_FN(SDHIWP0), GPIO_FN(EDBGREQ2),
+        GPIO_FN(SDHICLK1), GPIO_FN(TCK3_SWCLK_MC1),
+        GPIO_FN(SDHID1_0), GPIO_FN(M11_SLCD_SO2), GPIO_FN(TS_SPSYNC2),
+        GPIO_FN(TMS3_SWDIO_MC1),
+        GPIO_FN(SDHID1_1), GPIO_FN(M9_SLCD_A02), GPIO_FN(TS_SDAT2),
+        GPIO_FN(TDO3_SWO0_MC1),
+        GPIO_FN(SDHID1_2), GPIO_FN(M10_SLCD_CK2), GPIO_FN(TS_SDEN2),
+        GPIO_FN(TDI3),
+        GPIO_FN(SDHID1_3), GPIO_FN(M12_SLCD_CE2), GPIO_FN(TS_SCK2),
+        GPIO_FN(RTCK3_SWO1_MC1),
+        GPIO_FN(SDHICMD1), GPIO_FN(TRST3),
+        GPIO_FN(RESETOUTS),
+};
+
+/* helper for top 4 bits in PORTnCR */
+#define PCRH(in, in_pd, in_pu, out)     \
+        0, (out), (in), 0,      \
+                0, 0, 0, 0,     \
+                0, 0, (in_pd), 0,       \
+                0, 0, (in_pu), 0
+
+#define PORTCR(nr, reg) \
+        { PINMUX_CFG_REG("PORT" nr "CR", reg, 8, 4) {   \
+                        PCRH(PORT##nr##_IN, PORT##nr##_IN_PD,   \
+                                 PORT##nr##_IN_PU, PORT##nr##_OUT),     \
+                                PORT##nr##_FN0, PORT##nr##_FN1, \
+                                PORT##nr##_FN2, PORT##nr##_FN3, \
+                                PORT##nr##_FN4, PORT##nr##_FN5, \
+                                PORT##nr##_FN6, PORT##nr##_FN7 }        \
+        }
+
+static struct pinmux_cfg_reg pinmux_config_regs[] = {
+        PORTCR(0, 0xe6050000), /* PORT0CR */
+        PORTCR(1, 0xe6050001), /* PORT1CR */
+        PORTCR(2, 0xe6050002), /* PORT2CR */
+        PORTCR(3, 0xe6050003), /* PORT3CR */
+        PORTCR(4, 0xe6050004), /* PORT4CR */
+        PORTCR(5, 0xe6050005), /* PORT5CR */
+        PORTCR(6, 0xe6050006), /* PORT6CR */
+        PORTCR(7, 0xe6050007), /* PORT7CR */
+        PORTCR(8, 0xe6050008), /* PORT8CR */
+        PORTCR(9, 0xe6050009), /* PORT9CR */
+
+        PORTCR(10, 0xe605000a), /* PORT10CR */
+        PORTCR(11, 0xe605000b), /* PORT11CR */
+        PORTCR(12, 0xe605000c), /* PORT12CR */
+        PORTCR(13, 0xe605000d), /* PORT13CR */
+        PORTCR(14, 0xe605000e), /* PORT14CR */
+        PORTCR(15, 0xe605000f), /* PORT15CR */
+        PORTCR(16, 0xe6050010), /* PORT16CR */
+        PORTCR(17, 0xe6050011), /* PORT17CR */
+        PORTCR(18, 0xe6050012), /* PORT18CR */
+        PORTCR(19, 0xe6050013), /* PORT19CR */
+
+        PORTCR(20, 0xe6050014), /* PORT20CR */
+        PORTCR(21, 0xe6050015), /* PORT21CR */
+        PORTCR(22, 0xe6050016), /* PORT22CR */
+        PORTCR(23, 0xe6050017), /* PORT23CR */
+        PORTCR(24, 0xe6050018), /* PORT24CR */
+        PORTCR(25, 0xe6050019), /* PORT25CR */
+        PORTCR(26, 0xe605001a), /* PORT26CR */
+        PORTCR(27, 0xe605001b), /* PORT27CR */
+        PORTCR(28, 0xe605001c), /* PORT28CR */
+        PORTCR(29, 0xe605001d), /* PORT29CR */
+
+        PORTCR(30, 0xe605001e), /* PORT30CR */
+        PORTCR(31, 0xe605001f), /* PORT31CR */
+        PORTCR(32, 0xe6050020), /* PORT32CR */
+        PORTCR(33, 0xe6050021), /* PORT33CR */
+        PORTCR(34, 0xe6050022), /* PORT34CR */
+        PORTCR(35, 0xe6050023), /* PORT35CR */
+        PORTCR(36, 0xe6050024), /* PORT36CR */
+        PORTCR(37, 0xe6050025), /* PORT37CR */
+        PORTCR(38, 0xe6050026), /* PORT38CR */
+        PORTCR(39, 0xe6050027), /* PORT39CR */
+
+        PORTCR(40, 0xe6050028), /* PORT40CR */
+        PORTCR(41, 0xe6050029), /* PORT41CR */
+        PORTCR(42, 0xe605002a), /* PORT42CR */
+        PORTCR(43, 0xe605002b), /* PORT43CR */
+        PORTCR(44, 0xe605002c), /* PORT44CR */
+        PORTCR(45, 0xe605002d), /* PORT45CR */
+        PORTCR(46, 0xe605002e), /* PORT46CR */
+        PORTCR(47, 0xe605002f), /* PORT47CR */
+        PORTCR(48, 0xe6050030), /* PORT48CR */
+        PORTCR(49, 0xe6050031), /* PORT49CR */
+
+        PORTCR(50, 0xe6050032), /* PORT50CR */
+        PORTCR(51, 0xe6050033), /* PORT51CR */
+        PORTCR(52, 0xe6050034), /* PORT52CR */
+        PORTCR(53, 0xe6050035), /* PORT53CR */
+        PORTCR(54, 0xe6050036), /* PORT54CR */
+        PORTCR(55, 0xe6050037), /* PORT55CR */
+        PORTCR(56, 0xe6050038), /* PORT56CR */
+        PORTCR(57, 0xe6050039), /* PORT57CR */
+        PORTCR(58, 0xe605003a), /* PORT58CR */
+        PORTCR(59, 0xe605003b), /* PORT59CR */
+
+        PORTCR(60, 0xe605003c), /* PORT60CR */
+        PORTCR(61, 0xe605003d), /* PORT61CR */
+        PORTCR(62, 0xe605003e), /* PORT62CR */
+        PORTCR(63, 0xe605003f), /* PORT63CR */
+        PORTCR(64, 0xe6050040), /* PORT64CR */
+        PORTCR(65, 0xe6050041), /* PORT65CR */
+        PORTCR(66, 0xe6050042), /* PORT66CR */
+        PORTCR(67, 0xe6050043), /* PORT67CR */
+        PORTCR(68, 0xe6050044), /* PORT68CR */
+        PORTCR(69, 0xe6050045), /* PORT69CR */
+
+        PORTCR(70, 0xe6050046), /* PORT70CR */
+        PORTCR(71, 0xe6050047), /* PORT71CR */
+        PORTCR(72, 0xe6050048), /* PORT72CR */
+        PORTCR(73, 0xe6050049), /* PORT73CR */
+        PORTCR(74, 0xe605004a), /* PORT74CR */
+        PORTCR(75, 0xe605004b), /* PORT75CR */
+        PORTCR(76, 0xe605004c), /* PORT76CR */
+        PORTCR(77, 0xe605004d), /* PORT77CR */
+        PORTCR(78, 0xe605004e), /* PORT78CR */
+        PORTCR(79, 0xe605004f), /* PORT79CR */
+
+        PORTCR(80, 0xe6050050), /* PORT80CR */
+        PORTCR(81, 0xe6050051), /* PORT81CR */
+        PORTCR(82, 0xe6050052), /* PORT82CR */
+        PORTCR(83, 0xe6050053), /* PORT83CR */
+        PORTCR(84, 0xe6050054), /* PORT84CR */
+        PORTCR(85, 0xe6050055), /* PORT85CR */
+        PORTCR(86, 0xe6050056), /* PORT86CR */
+        PORTCR(87, 0xe6050057), /* PORT87CR */
+        PORTCR(88, 0xe6050058), /* PORT88CR */
+        PORTCR(89, 0xe6050059), /* PORT89CR */
+
+        PORTCR(90, 0xe605005a), /* PORT90CR */
+        PORTCR(91, 0xe605005b), /* PORT91CR */
+        PORTCR(92, 0xe605005c), /* PORT92CR */
+        PORTCR(93, 0xe605005d), /* PORT93CR */
+        PORTCR(94, 0xe605005e), /* PORT94CR */
+        PORTCR(95, 0xe605005f), /* PORT95CR */
+        PORTCR(96, 0xe6050060), /* PORT96CR */
+        PORTCR(97, 0xe6050061), /* PORT97CR */
+        PORTCR(98, 0xe6050062), /* PORT98CR */
+        PORTCR(99, 0xe6050063), /* PORT99CR */
+
+        PORTCR(100, 0xe6050064), /* PORT100CR */
+        PORTCR(101, 0xe6050065), /* PORT101CR */
+        PORTCR(102, 0xe6050066), /* PORT102CR */
+        PORTCR(103, 0xe6050067), /* PORT103CR */
+        PORTCR(104, 0xe6050068), /* PORT104CR */
+        PORTCR(105, 0xe6050069), /* PORT105CR */
+        PORTCR(106, 0xe605006a), /* PORT106CR */
+        PORTCR(107, 0xe605006b), /* PORT107CR */
+        PORTCR(108, 0xe605006c), /* PORT108CR */
+        PORTCR(109, 0xe605006d), /* PORT109CR */
+
+        PORTCR(110, 0xe605006e), /* PORT110CR */
+        PORTCR(111, 0xe605006f), /* PORT111CR */
+        PORTCR(112, 0xe6050070), /* PORT112CR */
+        PORTCR(113, 0xe6050071), /* PORT113CR */
+        PORTCR(114, 0xe6050072), /* PORT114CR */
+        PORTCR(115, 0xe6050073), /* PORT115CR */
+        PORTCR(116, 0xe6050074), /* PORT116CR */
+        PORTCR(117, 0xe6050075), /* PORT117CR */
+        PORTCR(118, 0xe6050076), /* PORT118CR */
+
+        PORTCR(128, 0xe6051080), /* PORT128CR */
+        PORTCR(129, 0xe6051081), /* PORT129CR */
+
+        PORTCR(130, 0xe6051082), /* PORT130CR */
+        PORTCR(131, 0xe6051083), /* PORT131CR */
+        PORTCR(132, 0xe6051084), /* PORT132CR */
+        PORTCR(133, 0xe6051085), /* PORT133CR */
+        PORTCR(134, 0xe6051086), /* PORT134CR */
+        PORTCR(135, 0xe6051087), /* PORT135CR */
+        PORTCR(136, 0xe6051088), /* PORT136CR */
+        PORTCR(137, 0xe6051089), /* PORT137CR */
+        PORTCR(138, 0xe605108a), /* PORT138CR */
+        PORTCR(139, 0xe605108b), /* PORT139CR */
+
+        PORTCR(140, 0xe605108c), /* PORT140CR */
+        PORTCR(141, 0xe605108d), /* PORT141CR */
+        PORTCR(142, 0xe605108e), /* PORT142CR */
+        PORTCR(143, 0xe605108f), /* PORT143CR */
+        PORTCR(144, 0xe6051090), /* PORT144CR */
+        PORTCR(145, 0xe6051091), /* PORT145CR */
+        PORTCR(146, 0xe6051092), /* PORT146CR */
+        PORTCR(147, 0xe6051093), /* PORT147CR */
+        PORTCR(148, 0xe6051094), /* PORT148CR */
+        PORTCR(149, 0xe6051095), /* PORT149CR */
+
+        PORTCR(150, 0xe6051096), /* PORT150CR */
+        PORTCR(151, 0xe6051097), /* PORT151CR */
+        PORTCR(152, 0xe6051098), /* PORT152CR */
+        PORTCR(153, 0xe6051099), /* PORT153CR */
+        PORTCR(154, 0xe605109a), /* PORT154CR */
+        PORTCR(155, 0xe605109b), /* PORT155CR */
+        PORTCR(156, 0xe605109c), /* PORT156CR */
+        PORTCR(157, 0xe605109d), /* PORT157CR */
+        PORTCR(158, 0xe605109e), /* PORT158CR */
+        PORTCR(159, 0xe605109f), /* PORT159CR */
+
+        PORTCR(160, 0xe60510a0), /* PORT160CR */
+        PORTCR(161, 0xe60510a1), /* PORT161CR */
+        PORTCR(162, 0xe60510a2), /* PORT162CR */
+        PORTCR(163, 0xe60510a3), /* PORT163CR */
+        PORTCR(164, 0xe60510a4), /* PORT164CR */
+
+        PORTCR(192, 0xe60520c0), /* PORT192CR */
+        PORTCR(193, 0xe60520c1), /* PORT193CR */
+        PORTCR(194, 0xe60520c2), /* PORT194CR */
+        PORTCR(195, 0xe60520c3), /* PORT195CR */
+        PORTCR(196, 0xe60520c4), /* PORT196CR */
+        PORTCR(197, 0xe60520c5), /* PORT197CR */
+        PORTCR(198, 0xe60520c6), /* PORT198CR */
+        PORTCR(199, 0xe60520c7), /* PORT199CR */
+
+        PORTCR(200, 0xe60520c8), /* PORT200CR */
+        PORTCR(201, 0xe60520c9), /* PORT201CR */
+        PORTCR(202, 0xe60520ca), /* PORT202CR */
+        PORTCR(203, 0xe60520cb), /* PORT203CR */
+        PORTCR(204, 0xe60520cc), /* PORT204CR */
+        PORTCR(205, 0xe60520cd), /* PORT205CR */
+        PORTCR(206, 0xe60520ce), /* PORT206CR */
+        PORTCR(207, 0xe60520cf), /* PORT207CR */
+        PORTCR(208, 0xe60520d0), /* PORT208CR */
+        PORTCR(209, 0xe60520d1), /* PORT209CR */
+
+        PORTCR(210, 0xe60520d2), /* PORT210CR */
+        PORTCR(211, 0xe60520d3), /* PORT211CR */
+        PORTCR(212, 0xe60520d4), /* PORT212CR */
+        PORTCR(213, 0xe60520d5), /* PORT213CR */
+        PORTCR(214, 0xe60520d6), /* PORT214CR */
+        PORTCR(215, 0xe60520d7), /* PORT215CR */
+        PORTCR(216, 0xe60520d8), /* PORT216CR */
+        PORTCR(217, 0xe60520d9), /* PORT217CR */
+        PORTCR(218, 0xe60520da), /* PORT218CR */
+        PORTCR(219, 0xe60520db), /* PORT219CR */
+
+        PORTCR(220, 0xe60520dc), /* PORT220CR */
+        PORTCR(221, 0xe60520dd), /* PORT221CR */
+        PORTCR(222, 0xe60520de), /* PORT222CR */
+        PORTCR(223, 0xe60520df), /* PORT223CR */
+        PORTCR(224, 0xe60520e0), /* PORT224CR */
+        PORTCR(225, 0xe60520e1), /* PORT225CR */
+        PORTCR(226, 0xe60520e2), /* PORT226CR */
+        PORTCR(227, 0xe60520e3), /* PORT227CR */
+        PORTCR(228, 0xe60520e4), /* PORT228CR */
+        PORTCR(229, 0xe60520e5), /* PORT229CR */
+
+        PORTCR(230, 0xe60520e6), /* PORT230CR */
+        PORTCR(231, 0xe60520e7), /* PORT231CR */
+        PORTCR(232, 0xe60520e8), /* PORT232CR */
+        PORTCR(233, 0xe60520e9), /* PORT233CR */
+        PORTCR(234, 0xe60520ea), /* PORT234CR */
+        PORTCR(235, 0xe60520eb), /* PORT235CR */
+        PORTCR(236, 0xe60520ec), /* PORT236CR */
+        PORTCR(237, 0xe60520ed), /* PORT237CR */
+        PORTCR(238, 0xe60520ee), /* PORT238CR */
+        PORTCR(239, 0xe60520ef), /* PORT239CR */
+
+        PORTCR(240, 0xe60520f0), /* PORT240CR */
+        PORTCR(241, 0xe60520f1), /* PORT241CR */
+        PORTCR(242, 0xe60520f2), /* PORT242CR */
+        PORTCR(243, 0xe60520f3), /* PORT243CR */
+        PORTCR(244, 0xe60520f4), /* PORT244CR */
+        PORTCR(245, 0xe60520f5), /* PORT245CR */
+        PORTCR(246, 0xe60520f6), /* PORT246CR */
+        PORTCR(247, 0xe60520f7), /* PORT247CR */
+        PORTCR(248, 0xe60520f8), /* PORT248CR */
+        PORTCR(249, 0xe60520f9), /* PORT249CR */
+
+        PORTCR(250, 0xe60520fa), /* PORT250CR */
+        PORTCR(251, 0xe60520fb), /* PORT251CR */
+        PORTCR(252, 0xe60520fc), /* PORT252CR */
+        PORTCR(253, 0xe60520fd), /* PORT253CR */
+        PORTCR(254, 0xe60520fe), /* PORT254CR */
+        PORTCR(255, 0xe60520ff), /* PORT255CR */
+        PORTCR(256, 0xe6052100), /* PORT256CR */
+        PORTCR(257, 0xe6052101), /* PORT257CR */
+        PORTCR(258, 0xe6052102), /* PORT258CR */
+        PORTCR(259, 0xe6052103), /* PORT259CR */
+
+        PORTCR(260, 0xe6052104), /* PORT260CR */
+        PORTCR(261, 0xe6052105), /* PORT261CR */
+        PORTCR(262, 0xe6052106), /* PORT262CR */
+        PORTCR(263, 0xe6052107), /* PORT263CR */
+        PORTCR(264, 0xe6052108), /* PORT264CR */
+
+        { PINMUX_CFG_REG("MSELBCR", 0xe6058024, 32, 1) {
+                        0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+                        0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+                        MSELBCR_MSEL17_0, MSELBCR_MSEL17_1,
+                        MSELBCR_MSEL16_0, MSELBCR_MSEL16_1,
+                        0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+                        0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
+        },
+        { },
+};
+
+static struct pinmux_data_reg pinmux_data_regs[] = {
+        { PINMUX_DATA_REG("PORTL031_000DR", 0xe6054000, 32) {
+                        PORT31_DATA, PORT30_DATA, PORT29_DATA, PORT28_DATA,
+                        PORT27_DATA, PORT26_DATA, PORT25_DATA, PORT24_DATA,
+                        PORT23_DATA, PORT22_DATA, PORT21_DATA, PORT20_DATA,
+                        PORT19_DATA, PORT18_DATA, PORT17_DATA, PORT16_DATA,
+                        PORT15_DATA, PORT14_DATA, PORT13_DATA, PORT12_DATA,
+                        PORT11_DATA, PORT10_DATA, PORT9_DATA, PORT8_DATA,
+                        PORT7_DATA, PORT6_DATA, PORT5_DATA, PORT4_DATA,
+                        PORT3_DATA, PORT2_DATA, PORT1_DATA, PORT0_DATA }
+        },
+        { PINMUX_DATA_REG("PORTL063_032DR", 0xe6054004, 32) {
+                        PORT63_DATA, PORT62_DATA, PORT61_DATA, PORT60_DATA,
+                        PORT59_DATA, PORT58_DATA, PORT57_DATA, PORT56_DATA,
+                        PORT55_DATA, PORT54_DATA, PORT53_DATA, PORT52_DATA,
+                        PORT51_DATA, PORT50_DATA, PORT49_DATA, PORT48_DATA,
+                        PORT47_DATA, PORT46_DATA, PORT45_DATA, PORT44_DATA,
+                        PORT43_DATA, PORT42_DATA, PORT41_DATA, PORT40_DATA,
+                        PORT39_DATA, PORT38_DATA, PORT37_DATA, PORT36_DATA,
+                        PORT35_DATA, PORT34_DATA, PORT33_DATA, PORT32_DATA }
+        },
+        { PINMUX_DATA_REG("PORTL095_064DR", 0xe6054008, 32) {
+                        PORT95_DATA, PORT94_DATA, PORT93_DATA, PORT92_DATA,
+                        PORT91_DATA, PORT90_DATA, PORT89_DATA, PORT88_DATA,
+                        PORT87_DATA, PORT86_DATA, PORT85_DATA, PORT84_DATA,
+                        PORT83_DATA, PORT82_DATA, PORT81_DATA, PORT80_DATA,
+                        PORT79_DATA, PORT78_DATA, PORT77_DATA, PORT76_DATA,
+                        PORT75_DATA, PORT74_DATA, PORT73_DATA, PORT72_DATA,
+                        PORT71_DATA, PORT70_DATA, PORT69_DATA, PORT68_DATA,
+                        PORT67_DATA, PORT66_DATA, PORT65_DATA, PORT64_DATA }
+        },
+        { PINMUX_DATA_REG("PORTD127_096DR", 0xe605400C, 32) {
+                        0, 0, 0, 0,
+                        0, 0, 0, 0,
+                        0, PORT118_DATA, PORT117_DATA, PORT116_DATA,
+                        PORT115_DATA, PORT114_DATA, PORT113_DATA, PORT112_DATA,
+                        PORT111_DATA, PORT110_DATA, PORT109_DATA, PORT108_DATA,
+                        PORT107_DATA, PORT106_DATA, PORT105_DATA, PORT104_DATA,
+                        PORT103_DATA, PORT102_DATA, PORT101_DATA, PORT100_DATA,
+                        PORT99_DATA, PORT98_DATA, PORT97_DATA, PORT96_DATA }
+        },
+        { PINMUX_DATA_REG("PORTD159_128DR", 0xe6055000, 32) {
+                        PORT159_DATA, PORT158_DATA, PORT157_DATA, PORT156_DATA,
+                        PORT155_DATA, PORT154_DATA, PORT153_DATA, PORT152_DATA,
+                        PORT151_DATA, PORT150_DATA, PORT149_DATA, PORT148_DATA,
+                        PORT147_DATA, PORT146_DATA, PORT145_DATA, PORT144_DATA,
+                        PORT143_DATA, PORT142_DATA, PORT141_DATA, PORT140_DATA,
+                        PORT139_DATA, PORT138_DATA, PORT137_DATA, PORT136_DATA,
+                        PORT135_DATA, PORT134_DATA, PORT133_DATA, PORT132_DATA,
+                        PORT131_DATA, PORT130_DATA, PORT129_DATA, PORT128_DATA }
+        },
+        { PINMUX_DATA_REG("PORTR191_160DR", 0xe6055004, 32) {
+                        0, 0, 0, 0,
+                        0, 0, 0, 0,
+                        0, 0, 0, 0,
+                        0, 0, 0, 0,
+                        0, 0, 0, 0,
+                        0, 0, 0, 0,
+                        0, 0, 0, PORT164_DATA,
+                        PORT163_DATA, PORT162_DATA, PORT161_DATA, PORT160_DATA }
+        },
+        { PINMUX_DATA_REG("PORTR223_192DR", 0xe6056000, 32) {
+                        PORT223_DATA, PORT222_DATA, PORT221_DATA, PORT220_DATA,
+                        PORT219_DATA, PORT218_DATA, PORT217_DATA, PORT216_DATA,
+                        PORT215_DATA, PORT214_DATA, PORT213_DATA, PORT212_DATA,
+                        PORT211_DATA, PORT210_DATA, PORT209_DATA, PORT208_DATA,
+                        PORT207_DATA, PORT206_DATA, PORT205_DATA, PORT204_DATA,
+                        PORT203_DATA, PORT202_DATA, PORT201_DATA, PORT200_DATA,
+                        PORT199_DATA, PORT198_DATA, PORT197_DATA, PORT196_DATA,
+                        PORT195_DATA, PORT194_DATA, PORT193_DATA, PORT192_DATA }
+        },
+        { PINMUX_DATA_REG("PORTU255_224DR", 0xe6056004, 32) {
+                        PORT255_DATA, PORT254_DATA, PORT253_DATA, PORT252_DATA,
+                        PORT251_DATA, PORT250_DATA, PORT249_DATA, PORT248_DATA,
+                        PORT247_DATA, PORT246_DATA, PORT245_DATA, PORT244_DATA,
+                        PORT243_DATA, PORT242_DATA, PORT241_DATA, PORT240_DATA,
+                        PORT239_DATA, PORT238_DATA, PORT237_DATA, PORT236_DATA,
+                        PORT235_DATA, PORT234_DATA, PORT233_DATA, PORT232_DATA,
+                        PORT231_DATA, PORT230_DATA, PORT229_DATA, PORT228_DATA,
+                        PORT227_DATA, PORT226_DATA, PORT225_DATA, PORT224_DATA }
+        },
+        { PINMUX_DATA_REG("PORTU287_256DR", 0xe6056008, 32) {
+                        0, 0, 0, 0,
+                        0, 0, 0, 0,
+                        0, 0, 0, 0,
+                        0, 0, 0, 0,
+                        0, 0, 0, 0,
+                        0, 0, 0, PORT264_DATA,
+                        PORT263_DATA, PORT262_DATA, PORT261_DATA, PORT260_DATA,
+                        PORT259_DATA, PORT258_DATA, PORT257_DATA, PORT256_DATA }
+        },
+        { },
+};
+
+static struct pinmux_info sh7377_pinmux_info = {
+        .name = "sh7377_pfc",
+        .reserved_id = PINMUX_RESERVED,
+        .data = { PINMUX_DATA_BEGIN, PINMUX_DATA_END },
+        .input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END },
+        .input_pu = { PINMUX_INPUT_PULLUP_BEGIN, PINMUX_INPUT_PULLUP_END },
+        .input_pd = { PINMUX_INPUT_PULLDOWN_BEGIN, PINMUX_INPUT_PULLDOWN_END },
+        .output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END },
+        .mark = { PINMUX_MARK_BEGIN, PINMUX_MARK_END },
+        .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
+
+        .first_gpio = GPIO_PORT0,
+        .last_gpio = GPIO_FN_RESETOUTS,
+
+        .gpios = pinmux_gpios,
+        .cfg_regs = pinmux_config_regs,
+        .data_regs = pinmux_data_regs,
+
+        .gpio_data = pinmux_data,
+        .gpio_data_size = ARRAY_SIZE(pinmux_data),
+};
+
+void sh7377_pinmux_init(void)
+{
+        register_pinmux(&sh7377_pinmux_info);
+}
diff --git a/arch/arm/mach-shmobile/setup-sh7367.c b/arch/arm/mach-shmobile/setup-sh7367.c
new file mode 100644
index 000000000000..eca90716140e
--- /dev/null
+++ b/arch/arm/mach-shmobile/setup-sh7367.c
@@ -0,0 +1,198 @@
+/*
+ * sh7367 processor support
+ *
+ * Copyright (C) 2010  Magnus Damm
+ * Copyright (C) 2008  Yoshihiro Shimoda
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/interrupt.h>
+#include <linux/irq.h>
+#include <linux/platform_device.h>
+#include <linux/delay.h>
+#include <linux/input.h>
+#include <linux/io.h>
+#include <linux/serial_sci.h>
+#include <linux/sh_timer.h>
+#include <mach/hardware.h>
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+
+static struct plat_sci_port scif0_platform_data = {
+        .mapbase        = 0xe6c40000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 80, 80, 80, 80 },
+};
+
+static struct platform_device scif0_device = {
+        .name           = "sh-sci",
+        .id             = 0,
+        .dev            = {
+                .platform_data  = &scif0_platform_data,
+        },
+};
+
+static struct plat_sci_port scif1_platform_data = {
+        .mapbase        = 0xe6c50000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 81, 81, 81, 81 },
+};
+
+static struct platform_device scif1_device = {
+        .name           = "sh-sci",
+        .id             = 1,
+        .dev            = {
+                .platform_data  = &scif1_platform_data,
+        },
+};
+
+static struct plat_sci_port scif2_platform_data = {
+        .mapbase        = 0xe6c60000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 82, 82, 82, 82 },
+};
+
+static struct platform_device scif2_device = {
+        .name           = "sh-sci",
+        .id             = 2,
+        .dev            = {
+                .platform_data  = &scif2_platform_data,
+        },
+};
+
+static struct plat_sci_port scif3_platform_data = {
+        .mapbase        = 0xe6c70000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 83, 83, 83, 83 },
+};
+
+static struct platform_device scif3_device = {
+        .name           = "sh-sci",
+        .id             = 3,
+        .dev            = {
+                .platform_data  = &scif3_platform_data,
+        },
+};
+
+static struct plat_sci_port scif4_platform_data = {
+        .mapbase        = 0xe6c80000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 89, 89, 89, 89 },
+};
+
+static struct platform_device scif4_device = {
+        .name           = "sh-sci",
+        .id             = 4,
+        .dev            = {
+                .platform_data  = &scif4_platform_data,
+        },
+};
+
+static struct plat_sci_port scif5_platform_data = {
+        .mapbase        = 0xe6cb0000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 90, 90, 90, 90 },
+};
+
+static struct platform_device scif5_device = {
+        .name           = "sh-sci",
+        .id             = 5,
+        .dev            = {
+                .platform_data  = &scif5_platform_data,
+        },
+};
+
+static struct plat_sci_port scif6_platform_data = {
+        .mapbase        = 0xe6c30000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 91, 91, 91, 91 },
+};
+
+static struct platform_device scif6_device = {
+        .name           = "sh-sci",
+        .id             = 6,
+        .dev            = {
+                .platform_data  = &scif6_platform_data,
+        },
+};
+
+static struct sh_timer_config cmt10_platform_data = {
+        .name = "CMT10",
+        .channel_offset = 0x10,
+        .timer_bit = 0,
+        .clk = "r_clk",
+        .clockevent_rating = 125,
+        .clocksource_rating = 125,
+};
+
+static struct resource cmt10_resources[] = {
+        [0] = {
+                .name   = "CMT10",
+                .start  = 0xe6138010,
+                .end    = 0xe613801b,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 72,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device cmt10_device = {
+        .name           = "sh_cmt",
+        .id             = 10,
+        .dev = {
+                .platform_data  = &cmt10_platform_data,
+        },
+        .resource       = cmt10_resources,
+        .num_resources  = ARRAY_SIZE(cmt10_resources),
+};
+
+static struct platform_device *sh7367_early_devices[] __initdata = {
+        &scif0_device,
+        &scif1_device,
+        &scif2_device,
+        &scif3_device,
+        &scif4_device,
+        &scif5_device,
+        &scif6_device,
+        &cmt10_device,
+};
+
+void __init sh7367_add_standard_devices(void)
+{
+        platform_add_devices(sh7367_early_devices,
+                             ARRAY_SIZE(sh7367_early_devices));
+}
+
+#define SYMSTPCR2 0xe6158048
+#define SYMSTPCR2_CMT1 (1 << 29)
+
+void __init sh7367_add_early_devices(void)
+{
+        /* enable clock to CMT1 */
+        __raw_writel(__raw_readl(SYMSTPCR2) & ~SYMSTPCR2_CMT1, SYMSTPCR2);
+
+        early_platform_add_devices(sh7367_early_devices,
+                                   ARRAY_SIZE(sh7367_early_devices));
+}
diff --git a/arch/arm/mach-shmobile/setup-sh7372.c b/arch/arm/mach-shmobile/setup-sh7372.c
new file mode 100644
index 000000000000..1d1153290f59
--- /dev/null
+++ b/arch/arm/mach-shmobile/setup-sh7372.c
@@ -0,0 +1,199 @@
+/*
+ * sh7372 processor support
+ *
+ * Copyright (C) 2010  Magnus Damm
+ * Copyright (C) 2008  Yoshihiro Shimoda
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/interrupt.h>
+#include <linux/irq.h>
+#include <linux/platform_device.h>
+#include <linux/delay.h>
+#include <linux/input.h>
+#include <linux/io.h>
+#include <linux/serial_sci.h>
+#include <linux/sh_intc.h>
+#include <linux/sh_timer.h>
+#include <mach/hardware.h>
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+
+static struct plat_sci_port scif0_platform_data = {
+        .mapbase        = 0xe6c40000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 80, 80, 80, 80 },
+};
+
+static struct platform_device scif0_device = {
+        .name           = "sh-sci",
+        .id             = 0,
+        .dev            = {
+                .platform_data  = &scif0_platform_data,
+        },
+};
+
+static struct plat_sci_port scif1_platform_data = {
+        .mapbase        = 0xe6c50000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 81, 81, 81, 81 },
+};
+
+static struct platform_device scif1_device = {
+        .name           = "sh-sci",
+        .id             = 1,
+        .dev            = {
+                .platform_data  = &scif1_platform_data,
+        },
+};
+
+static struct plat_sci_port scif2_platform_data = {
+        .mapbase        = 0xe6c60000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 82, 82, 82, 82 },
+};
+
+static struct platform_device scif2_device = {
+        .name           = "sh-sci",
+        .id             = 2,
+        .dev            = {
+                .platform_data  = &scif2_platform_data,
+        },
+};
+
+static struct plat_sci_port scif3_platform_data = {
+        .mapbase        = 0xe6c70000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 83, 83, 83, 83 },
+};
+
+static struct platform_device scif3_device = {
+        .name           = "sh-sci",
+        .id             = 3,
+        .dev            = {
+                .platform_data  = &scif3_platform_data,
+        },
+};
+
+static struct plat_sci_port scif4_platform_data = {
+        .mapbase        = 0xe6c80000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 89, 89, 89, 89 },
+};
+
+static struct platform_device scif4_device = {
+        .name           = "sh-sci",
+        .id             = 4,
+        .dev            = {
+                .platform_data  = &scif4_platform_data,
+        },
+};
+
+static struct plat_sci_port scif5_platform_data = {
+        .mapbase        = 0xe6cb0000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 90, 90, 90, 90 },
+};
+
+static struct platform_device scif5_device = {
+        .name           = "sh-sci",
+        .id             = 5,
+        .dev            = {
+                .platform_data  = &scif5_platform_data,
+        },
+};
+
+static struct plat_sci_port scif6_platform_data = {
+        .mapbase        = 0xe6c30000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 91, 91, 91, 91 },
+};
+
+static struct platform_device scif6_device = {
+        .name           = "sh-sci",
+        .id             = 6,
+        .dev            = {
+                .platform_data  = &scif6_platform_data,
+        },
+};
+
+static struct sh_timer_config cmt10_platform_data = {
+        .name = "CMT10",
+        .channel_offset = 0x10,
+        .timer_bit = 0,
+        .clk = "r_clk",
+        .clockevent_rating = 125,
+        .clocksource_rating = 125,
+};
+
+static struct resource cmt10_resources[] = {
+        [0] = {
+                .name   = "CMT10",
+                .start  = 0xe6138010,
+                .end    = 0xe613801b,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 72,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device cmt10_device = {
+        .name           = "sh_cmt",
+        .id             = 10,
+        .dev = {
+                .platform_data  = &cmt10_platform_data,
+        },
+        .resource       = cmt10_resources,
+        .num_resources  = ARRAY_SIZE(cmt10_resources),
+};
+
+static struct platform_device *sh7372_early_devices[] __initdata = {
+        &scif0_device,
+        &scif1_device,
+        &scif2_device,
+        &scif3_device,
+        &scif4_device,
+        &scif5_device,
+        &scif6_device,
+        &cmt10_device,
+};
+
+void __init sh7372_add_standard_devices(void)
+{
+        platform_add_devices(sh7372_early_devices,
+                            ARRAY_SIZE(sh7372_early_devices));
+}
+
+#define SMSTPCR3 0xe615013c
+#define SMSTPCR3_CMT1 (1 << 29)
+
+void __init sh7372_add_early_devices(void)
+{
+        /* enable clock to CMT1 */
+        __raw_writel(__raw_readl(SMSTPCR3) & ~SMSTPCR3_CMT1, SMSTPCR3);
+
+        early_platform_add_devices(sh7372_early_devices,
+                                   ARRAY_SIZE(sh7372_early_devices));
+}
diff --git a/arch/arm/mach-shmobile/setup-sh7377.c b/arch/arm/mach-shmobile/setup-sh7377.c
new file mode 100644
index 000000000000..60e37774c35c
--- /dev/null
+++ b/arch/arm/mach-shmobile/setup-sh7377.c
@@ -0,0 +1,215 @@
+/*
+ * sh7377 processor support
+ *
+ * Copyright (C) 2010  Magnus Damm
+ * Copyright (C) 2008  Yoshihiro Shimoda
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/interrupt.h>
+#include <linux/irq.h>
+#include <linux/platform_device.h>
+#include <linux/delay.h>
+#include <linux/input.h>
+#include <linux/io.h>
+#include <linux/serial_sci.h>
+#include <linux/sh_intc.h>
+#include <linux/sh_timer.h>
+#include <mach/hardware.h>
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+
+static struct plat_sci_port scif0_platform_data = {
+        .mapbase        = 0xe6c40000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 80, 80, 80, 80 },
+};
+
+static struct platform_device scif0_device = {
+        .name           = "sh-sci",
+        .id             = 0,
+        .dev            = {
+                .platform_data  = &scif0_platform_data,
+        },
+};
+
+static struct plat_sci_port scif1_platform_data = {
+        .mapbase        = 0xe6c50000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 81, 81, 81, 81 },
+};
+
+static struct platform_device scif1_device = {
+        .name           = "sh-sci",
+        .id             = 1,
+        .dev            = {
+                .platform_data  = &scif1_platform_data,
+        },
+};
+
+static struct plat_sci_port scif2_platform_data = {
+        .mapbase        = 0xe6c60000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 82, 82, 82, 82 },
+};
+
+static struct platform_device scif2_device = {
+        .name           = "sh-sci",
+        .id             = 2,
+        .dev            = {
+                .platform_data  = &scif2_platform_data,
+        },
+};
+
+static struct plat_sci_port scif3_platform_data = {
+        .mapbase        = 0xe6c70000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 83, 83, 83, 83 },
+};
+
+static struct platform_device scif3_device = {
+        .name           = "sh-sci",
+        .id             = 3,
+        .dev            = {
+                .platform_data  = &scif3_platform_data,
+        },
+};
+
+static struct plat_sci_port scif4_platform_data = {
+        .mapbase        = 0xe6c80000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 89, 89, 89, 89 },
+};
+
+static struct platform_device scif4_device = {
+        .name           = "sh-sci",
+        .id             = 4,
+        .dev            = {
+                .platform_data  = &scif4_platform_data,
+        },
+};
+
+static struct plat_sci_port scif5_platform_data = {
+        .mapbase        = 0xe6cb0000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 90, 90, 90, 90 },
+};
+
+static struct platform_device scif5_device = {
+        .name           = "sh-sci",
+        .id             = 5,
+        .dev            = {
+                .platform_data  = &scif5_platform_data,
+        },
+};
+
+static struct plat_sci_port scif6_platform_data = {
+        .mapbase        = 0xe6cc0000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 196, 196, 196, 196 },
+};
+
+static struct platform_device scif6_device = {
+        .name           = "sh-sci",
+        .id             = 6,
+        .dev            = {
+                .platform_data  = &scif6_platform_data,
+        },
+};
+
+static struct plat_sci_port scif7_platform_data = {
+        .mapbase        = 0xe6c30000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 91, 91, 91, 91 },
+};
+
+static struct platform_device scif7_device = {
+        .name           = "sh-sci",
+        .id             = 7,
+        .dev            = {
+                .platform_data  = &scif7_platform_data,
+        },
+};
+
+static struct sh_timer_config cmt10_platform_data = {
+        .name = "CMT10",
+        .channel_offset = 0x10,
+        .timer_bit = 0,
+        .clk = "r_clk",
+        .clockevent_rating = 125,
+        .clocksource_rating = 125,
+};
+
+static struct resource cmt10_resources[] = {
+        [0] = {
+                .name   = "CMT10",
+                .start  = 0xe6138010,
+                .end    = 0xe613801b,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 72,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device cmt10_device = {
+        .name           = "sh_cmt",
+        .id             = 10,
+        .dev = {
+                .platform_data  = &cmt10_platform_data,
+        },
+        .resource       = cmt10_resources,
+        .num_resources  = ARRAY_SIZE(cmt10_resources),
+};
+
+static struct platform_device *sh7377_early_devices[] __initdata = {
+        &scif0_device,
+        &scif1_device,
+        &scif2_device,
+        &scif3_device,
+        &scif4_device,
+        &scif5_device,
+        &scif6_device,
+        &scif7_device,
+        &cmt10_device,
+};
+
+void __init sh7377_add_standard_devices(void)
+{
+        platform_add_devices(sh7377_early_devices,
+                            ARRAY_SIZE(sh7377_early_devices));
+}
+
+#define SMSTPCR3 0xe615013c
+#define SMSTPCR3_CMT1 (1 << 29)
+
+void __init sh7377_add_early_devices(void)
+{
+        /* enable clock to CMT1 */
+        __raw_writel(__raw_readl(SMSTPCR3) & ~SMSTPCR3_CMT1, SMSTPCR3);
+
+        early_platform_add_devices(sh7377_early_devices,
+                                   ARRAY_SIZE(sh7377_early_devices));
+}
diff --git a/arch/arm/mach-shmobile/timer.c b/arch/arm/mach-shmobile/timer.c
new file mode 100644
index 000000000000..895794b543cd
--- /dev/null
+++ b/arch/arm/mach-shmobile/timer.c
@@ -0,0 +1,46 @@
+/*
+ * SH-Mobile Timer
+ *
+ * Copyright (C) 2010  Magnus Damm
+ * Copyright (C) 2002 - 2009  Paul Mundt
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ *
+ */
+#include <linux/platform_device.h>
+#include <asm/mach/time.h>
+
+static void __init shmobile_late_time_init(void)
+{
+        /*
+         * Make sure all compiled-in early timers register themselves.
+         *
+         * Run probe() for two "earlytimer" devices, these will be the
+         * clockevents and clocksource devices respectively. In the event
+         * that only a clockevents device is available, we -ENODEV on the
+         * clocksource and the jiffies clocksource is used transparently
+         * instead. No error handling is necessary here.
+         */
+        early_platform_driver_register_all("earlytimer");
+        early_platform_driver_probe("earlytimer", 2, 0);
+}
+
+static void __init shmobile_timer_init(void)
+{
+        late_time_init = shmobile_late_time_init;
+}
+
+struct sys_timer shmobile_timer = {
+        .init           = shmobile_timer_init,
+};
diff --git a/arch/arm/mach-u300/core.c b/arch/arm/mach-u300/core.c
index 01b50313914c..5f34eb674d68 100644
--- a/arch/arm/mach-u300/core.c
+++ b/arch/arm/mach-u300/core.c
@@ -358,7 +358,7 @@ static struct resource ave_resources[] = {
         /*
          * The AVE3e requires two regions of 256MB that it considers
          * "invisible". The hardware will not be able to access these
-         * adresses, so they should never point to system RAM.
+         * addresses, so they should never point to system RAM.
          */
         {
                 .name  = "AVE3e Reserved 0",
@@ -1596,7 +1596,7 @@ static void __init u300_init_check_chip(void)
 /*
  * Some devices and their resources require reserved physical memory from
  * the end of the available RAM. This function traverses the list of devices
- * and assigns actual adresses to these.
+ * and assigns actual addresses to these.
  */
 static void __init u300_assign_physmem(void)
 {
diff --git a/arch/arm/mach-u300/include/mach/debug-macro.S b/arch/arm/mach-u300/include/mach/debug-macro.S
index ca4a028c2661..92c12420256f 100644
--- a/arch/arm/mach-u300/include/mach/debug-macro.S
+++ b/arch/arm/mach-u300/include/mach/debug-macro.S
@@ -11,7 +11,7 @@
 #include <mach/hardware.h>
 
         .macro  addruart, rx, tmp
-        /* If we move the adress using MMU, use this. */
+        /* If we move the address using MMU, use this. */
         mrc     p15, 0, \rx, c1, c0
         tst     \rx, #1                 @ MMU enabled?
         ldreq   \rx,      = U300_SLOW_PER_PHYS_BASE @ MMU off, physical address
diff --git a/arch/arm/mach-ux500/include/mach/hardware.h b/arch/arm/mach-ux500/include/mach/hardware.h
index 6da650202dc7..04ea836969b3 100644
--- a/arch/arm/mach-ux500/include/mach/hardware.h
+++ b/arch/arm/mach-ux500/include/mach/hardware.h
@@ -68,12 +68,12 @@
 #define U8500_PKAM_BASE         (U8500_PER6_BASE + 0x2000)
 #define U8500_CRYPTO0_BASE      (U8500_PER6_BASE + 0xa000)
 #define U8500_CRYPTO1_BASE      (U8500_PER6_BASE + 0xb000)
-#define U8500_CLKRST6_BASE      (U8500_PER7_BASE + 0xf000)
+#define U8500_CLKRST6_BASE      (U8500_PER6_BASE + 0xf000)
 
 /* per5 base addressess */
 #define U8500_USBOTG_BASE       (U8500_PER5_BASE + 0x00000)
 #define U8500_GPIO5_BASE        (U8500_PER5_BASE + 0x1e000)
-#define U8500_CLKRST5_BASE      (U8500_PER7_BASE + 0x1f000)
+#define U8500_CLKRST5_BASE      (U8500_PER5_BASE + 0x1f000)
 
 /* per4 base addressess */
 #define U8500_BACKUPRAM0_BASE   (U8500_PER4_BASE + 0x0000)
@@ -95,7 +95,7 @@
 #define U8500_UART2_BASE        (U8500_PER3_BASE + 0x7000)
 #define U8500_SDI5_BASE         (U8500_PER3_BASE + 0x8000)
 #define U8500_GPIO3_BASE        (U8500_PER3_BASE + 0xe000)
-#define U8500_CLKRST3_BASE      (U8500_PER7_BASE + 0xf000)
+#define U8500_CLKRST3_BASE      (U8500_PER3_BASE + 0xf000)
 
 /* per2 base addressess */
 #define U8500_I2C3_BASE         (U8500_PER2_BASE + 0x0000)
@@ -123,7 +123,7 @@
 #define U8500_SPI3_BASE         (U8500_PER1_BASE + 0x9000)
 #define U8500_SLIM0_BASE        (U8500_PER1_BASE + 0xa000)
 #define U8500_GPIO1_BASE        (U8500_PER1_BASE + 0xe000)
-#define U8500_CLKRST1_BASE      (U8500_PER2_BASE + 0xf000)
+#define U8500_CLKRST1_BASE      (U8500_PER1_BASE + 0xf000)
 
 /* ST-Ericsson modified pl022 id */
 #define SSP_PER_ID              0x01080022
diff --git a/arch/arm/mach-w90x900/cpu.h b/arch/arm/mach-w90x900/cpu.h
index 4d58ba164e25..f8730b60bd76 100644
--- a/arch/arm/mach-w90x900/cpu.h
+++ b/arch/arm/mach-w90x900/cpu.h
@@ -57,3 +57,4 @@ extern struct platform_device nuc900_device_fmi;
 extern struct platform_device nuc900_device_kpi;
 extern struct platform_device nuc900_device_rtc;
 extern struct platform_device nuc900_device_ts;
+extern struct platform_device nuc900_device_lcd;
diff --git a/arch/arm/mach-w90x900/dev.c b/arch/arm/mach-w90x900/dev.c
index ec711f4b4019..48876122df91 100644
--- a/arch/arm/mach-w90x900/dev.c
+++ b/arch/arm/mach-w90x900/dev.c
@@ -34,6 +34,7 @@
 #include <mach/regs-serial.h>
 #include <mach/nuc900_spi.h>
 #include <mach/map.h>
+#include <mach/fb.h>
 
 #include "cpu.h"
 
@@ -380,6 +381,47 @@ struct platform_device nuc900_device_kpi = {
         .resource       = nuc900_kpi_resource,
 };
 
+#ifdef CONFIG_FB_NUC900
+
+static struct resource nuc900_lcd_resource[] = {
+        [0] = {
+                .start = W90X900_PA_LCD,
+                .end   = W90X900_PA_LCD + W90X900_SZ_LCD - 1,
+                .flags = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start = IRQ_LCD,
+                .end   = IRQ_LCD,
+                .flags = IORESOURCE_IRQ,
+        }
+};
+
+static u64 nuc900_device_lcd_dmamask = -1;
+struct platform_device nuc900_device_lcd = {
+        .name             = "nuc900-lcd",
+        .id               = -1,
+        .num_resources    = ARRAY_SIZE(nuc900_lcd_resource),
+        .resource         = nuc900_lcd_resource,
+        .dev              = {
+                .dma_mask               = &nuc900_device_lcd_dmamask,
+                .coherent_dma_mask      = -1,
+        }
+};
+
+void  nuc900_fb_set_platdata(struct nuc900fb_mach_info *pd)
+{
+        struct nuc900fb_mach_info *npd;
+
+        npd = kmalloc(sizeof(*npd), GFP_KERNEL);
+        if (npd) {
+                memcpy(npd, pd, sizeof(*npd));
+                nuc900_device_lcd.dev.platform_data = npd;
+        } else {
+                printk(KERN_ERR "no memory for LCD platform data\n");
+        }
+}
+#endif
+
 /*Here should be your evb resourse,such as LCD*/
 
 static struct platform_device *nuc900_public_dev[] __initdata = {
diff --git a/arch/arm/mach-w90x900/include/mach/fb.h b/arch/arm/mach-w90x900/include/mach/fb.h
new file mode 100644
index 000000000000..cec5ece765ed
--- /dev/null
+++ b/arch/arm/mach-w90x900/include/mach/fb.h
@@ -0,0 +1,83 @@
+/* linux/include/asm/arch-nuc900/fb.h
+ *
+ * Copyright (c) 2008 Nuvoton technology corporation
+ * All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * Changelog:
+ *
+ *   2008/08/26     vincen.zswan modify this file for LCD.
+ */
+
+#ifndef __ASM_ARM_FB_H
+#define __ASM_ARM_FB_H
+
+
+
+/* LCD Controller Hardware Desc */
+struct nuc900fb_hw {
+        unsigned int lcd_dccs;
+        unsigned int lcd_device_ctrl;
+        unsigned int lcd_mpulcd_cmd;
+        unsigned int lcd_int_cs;
+        unsigned int lcd_crtc_size;
+        unsigned int lcd_crtc_dend;
+        unsigned int lcd_crtc_hr;
+        unsigned int lcd_crtc_hsync;
+        unsigned int lcd_crtc_vr;
+        unsigned int lcd_va_baddr0;
+        unsigned int lcd_va_baddr1;
+        unsigned int lcd_va_fbctrl;
+        unsigned int lcd_va_scale;
+        unsigned int lcd_va_test;
+        unsigned int lcd_va_win;
+        unsigned int lcd_va_stuff;
+};
+
+/* LCD Display Description */
+struct nuc900fb_display {
+        /* LCD Image type */
+        unsigned type;
+
+        /* LCD Screen Size */
+        unsigned short width;
+        unsigned short height;
+
+        /* LCD Screen Info */
+        unsigned short xres;
+        unsigned short yres;
+        unsigned short bpp;
+
+        unsigned long pixclock;
+        unsigned short left_margin;
+        unsigned short right_margin;
+        unsigned short hsync_len;
+        unsigned short upper_margin;
+        unsigned short lower_margin;
+        unsigned short vsync_len;
+
+        /* hardware special register value */
+        unsigned int dccs;
+        unsigned int devctl;
+        unsigned int fbctrl;
+        unsigned int scale;
+};
+
+struct nuc900fb_mach_info {
+        struct nuc900fb_display *displays;
+        unsigned num_displays;
+        unsigned default_display;
+        /* GPIO Setting  Info */
+        unsigned gpio_dir;
+        unsigned gpio_dir_mask;
+        unsigned gpio_data;
+        unsigned gpio_data_mask;
+};
+
+extern void __init nuc900_fb_set_platdata(struct nuc900fb_mach_info *);
+
+#endif /* __ASM_ARM_FB_H */
diff --git a/arch/arm/mach-w90x900/include/mach/regs-ldm.h b/arch/arm/mach-w90x900/include/mach/regs-ldm.h
new file mode 100644
index 000000000000..e9d480a5b232
--- /dev/null
+++ b/arch/arm/mach-w90x900/include/mach/regs-ldm.h
@@ -0,0 +1,253 @@
+/*
+ * arch/arm/mach-w90x900/include/mach/regs-serial.h
+ *
+ * Copyright (c) 2009 Nuvoton technology corporation
+ * All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ *  Description:
+ *     Nuvoton Display, LCM Register list
+ *  Author:  Wang Qiang (rurality.linux@gmail.com) 2009/12/11
+ *
+ */
+
+
+#ifndef __ASM_ARM_W90X900_REGS_LDM_H
+#define __ASM_ARM_W90X900_REGS_LDM_H
+
+#include <mach/map.h>
+
+/* Display Controller Control/Status Register */
+#define REG_LCM_DCCS                    (0x00)
+
+#define LCM_DCCS_ENG_RST                (1 << 0)
+#define LCM_DCCS_VA_EN                  (1 << 1)
+#define LCM_DCCS_OSD_EN                 (1 << 2)
+#define LCM_DCCS_DISP_OUT_EN            (1 << 3)
+#define LCM_DCCS_DISP_INT_EN            (1 << 4)
+#define LCM_DCCS_CMD_ON                 (1 << 5)
+#define LCM_DCCS_FIELD_INTR             (1 << 6)
+#define LCM_DCCS_SINGLE                 (1 << 7)
+
+enum LCM_DCCS_VA_SRC {
+        LCM_DCCS_VA_SRC_YUV422          = (0 << 8),
+        LCM_DCCS_VA_SRC_YCBCR422        = (1 << 8),
+        LCM_DCCS_VA_SRC_RGB888          = (2 << 8),
+        LCM_DCCS_VA_SRC_RGB666          = (3 << 8),
+        LCM_DCCS_VA_SRC_RGB565          = (4 << 8),
+        LCM_DCCS_VA_SRC_RGB444LOW       = (5 << 8),
+        LCM_DCCS_VA_SRC_RGB444HIGH      = (7 << 8)
+};
+
+
+/* Display Device Control Register */
+#define REG_LCM_DEV_CTRL                (0x04)
+
+enum LCM_DEV_CTRL_SWAP_YCbCr {
+        LCM_DEV_CTRL_SWAP_UYVY          = (0 << 1),
+        LCM_DEV_CTRL_SWAP_YUYV          = (1 << 1),
+        LCM_DEV_CTRL_SWAP_VYUY          = (2 << 1),
+        LCM_DEV_CTRL_SWAP_YVYU          = (3 << 1)
+};
+
+enum LCM_DEV_CTRL_RGB_SHIFT {
+        LCM_DEV_CTRL_RGB_SHIFT_NOT      = (0 << 3),
+        LCM_DEV_CTRL_RGB_SHIFT_ONECYCLE = (1 << 3),
+        LCM_DEV_CTRL_RGB_SHIFT_TWOCYCLE = (2 << 3),
+        LCM_DEV_CTRL_RGB_SHIFT_NOT_DEF  = (3 << 3)
+};
+
+enum LCM_DEV_CTRL_DEVICE {
+        LCM_DEV_CTRL_DEVICE_YUV422      = (0 << 5),
+        LCM_DEV_CTRL_DEVICE_YUV444      = (1 << 5),
+        LCM_DEV_CTRL_DEVICE_UNIPAC      = (4 << 5),
+        LCM_DEV_CTRL_DEVICE_SEIKO_EPSON = (5 << 5),
+        LCM_DEV_CTRL_DEVICE_HIGH_COLOR  = (6 << 5),
+        LCM_DEV_CTRL_DEVICE_MPU         = (7 << 5)
+};
+
+#define LCM_DEV_CTRL_LCD_DDA            (8)
+#define LCM_DEV_CTRL_YUV2CCIR           (16)
+
+enum LCM_DEV_CTRL_LCD_SEL {
+        LCM_DEV_CTRL_LCD_SEL_RGB_GBR    = (0 << 17),
+        LCM_DEV_CTRL_LCD_SEL_BGR_RBG    = (1 << 17),
+        LCM_DEV_CTRL_LCD_SEL_GBR_RGB    = (2 << 17),
+        LCM_DEV_CTRL_LCD_SEL_RBG_BGR    = (3 << 17)
+};
+
+enum LCM_DEV_CTRL_FAL_D {
+        LCM_DEV_CTRL_FAL_D_FALLING      = (0 << 19),
+        LCM_DEV_CTRL_FAL_D_RISING       = (1 << 19),
+};
+
+enum LCM_DEV_CTRL_H_POL {
+        LCM_DEV_CTRL_H_POL_LOW          = (0 << 20),
+        LCM_DEV_CTRL_H_POL_HIGH         = (1 << 20),
+};
+
+enum LCM_DEV_CTRL_V_POL {
+        LCM_DEV_CTRL_V_POL_LOW          = (0 << 21),
+        LCM_DEV_CTRL_V_POL_HIGH         = (1 << 21),
+};
+
+enum LCM_DEV_CTRL_VR_LACE {
+        LCM_DEV_CTRL_VR_LACE_NINTERLACE = (0 << 22),
+        LCM_DEV_CTRL_VR_LACE_INTERLACE  = (1 << 22),
+};
+
+enum LCM_DEV_CTRL_LACE {
+        LCM_DEV_CTRL_LACE_NINTERLACE    = (0 << 23),
+        LCM_DEV_CTRL_LACE_INTERLACE     = (1 << 23),
+};
+
+enum LCM_DEV_CTRL_RGB_SCALE {
+        LCM_DEV_CTRL_RGB_SCALE_4096     = (0 << 24),
+        LCM_DEV_CTRL_RGB_SCALE_65536    = (1 << 24),
+        LCM_DEV_CTRL_RGB_SCALE_262144   = (2 << 24),
+        LCM_DEV_CTRL_RGB_SCALE_16777216 = (3 << 24),
+};
+
+enum LCM_DEV_CTRL_DBWORD {
+        LCM_DEV_CTRL_DBWORD_HALFWORD    = (0 << 26),
+        LCM_DEV_CTRL_DBWORD_FULLWORD    = (1 << 26),
+};
+
+enum LCM_DEV_CTRL_MPU68 {
+        LCM_DEV_CTRL_MPU68_80_SERIES    = (0 << 27),
+        LCM_DEV_CTRL_MPU68_68_SERIES    = (1 << 27),
+};
+
+enum LCM_DEV_CTRL_DE_POL {
+        LCM_DEV_CTRL_DE_POL_HIGH        = (0 << 28),
+        LCM_DEV_CTRL_DE_POL_LOW         = (1 << 28),
+};
+
+#define LCM_DEV_CTRL_CMD16              (29)
+#define LCM_DEV_CTRL_CM16t18            (30)
+#define LCM_DEV_CTRL_CMD_LOW            (31)
+
+/* MPU-Interface LCD Write Command */
+#define REG_LCM_MPU_CMD                 (0x08)
+
+/* Interrupt Control/Status Register */
+#define REG_LCM_INT_CS                  (0x0c)
+#define LCM_INT_CS_DISP_F_EN            (1 << 0)
+#define LCM_INT_CS_UNDERRUN_EN          (1 << 1)
+#define LCM_INT_CS_BUS_ERROR_INT        (1 << 28)
+#define LCM_INT_CS_UNDERRUN_INT         (1 << 29)
+#define LCM_INT_CS_DISP_F_STATUS        (1 << 30)
+#define LCM_INT_CS_DISP_F_INT           (1 << 31)
+
+/* CRTC Display Size Control Register */
+#define REG_LCM_CRTC_SIZE               (0x10)
+#define LCM_CRTC_SIZE_VTTVAL(x)         ((x) << 16)
+#define LCM_CRTC_SIZE_HTTVAL(x)         ((x) << 0)
+
+/* CRTC Display Enable End */
+#define REG_LCM_CRTC_DEND               (0x14)
+#define LCM_CRTC_DEND_VDENDVAL(x)       ((x) << 16)
+#define LCM_CRTC_DEND_HDENDVAL(x)       ((x) << 0)
+
+/* CRTC Internal Horizontal Retrace Control Register */
+#define REG_LCM_CRTC_HR                 (0x18)
+#define LCM_CRTC_HR_EVAL(x)             ((x) << 16)
+#define LCM_CRTC_HR_SVAL(x)             ((x) << 0)
+
+/* CRTC Horizontal Sync Control Register */
+#define REG_LCM_CRTC_HSYNC              (0x1C)
+#define LCM_CRTC_HSYNC_SHIFTVAL(x)      ((x) << 30)
+#define LCM_CRTC_HSYNC_EVAL(x)          ((x) << 16)
+#define LCM_CRTC_HSYNC_SVAL(x)          ((x) << 0)
+
+/* CRTC Internal Vertical Retrace Control Register */
+#define REG_LCM_CRTC_VR                 (0x20)
+#define LCM_CRTC_VR_EVAL(x)             ((x) << 16)
+#define LCM_CRTC_VR_SVAL(x)             ((x) << 0)
+
+/* Video Stream Frame Buffer-0 Starting Address */
+#define REG_LCM_VA_BADDR0               (0x24)
+
+/* Video Stream Frame Buffer-1 Starting Address */
+#define REG_LCM_VA_BADDR1               (0x28)
+
+/* Video Stream Frame Buffer Control Register */
+#define REG_LCM_VA_FBCTRL               (0x2C)
+#define LCM_VA_FBCTRL_IO_REGION_HALF    (1 << 28)
+#define LCM_VA_FBCTRL_FIELD_DUAL        (1 << 29)
+#define LCM_VA_FBCTRL_START_BUF         (1 << 30)
+#define LCM_VA_FBCTRL_DB_EN             (1 << 31)
+
+/* Video Stream Scaling Control Register */
+#define REG_LCM_VA_SCALE                (0x30)
+#define LCM_VA_SCALE_XCOPY_INTERPOLATION (0 << 15)
+#define LCM_VA_SCALE_XCOPY_DUPLICATION   (1 << 15)
+
+/* Image Stream Active Window Coordinates */
+#define REG_LCM_VA_WIN                  (0x38)
+
+/* Image Stream Stuff Pixel */
+#define REG_LCM_VA_STUFF                (0x3C)
+
+/* OSD Window Starting Coordinates */
+#define REG_LCM_OSD_WINS                (0x40)
+
+/* OSD Window Ending Coordinates */
+#define REG_LCM_OSD_WINE                (0x44)
+
+/* OSD Stream Frame Buffer Starting Address */
+#define REG_LCM_OSD_BADDR               (0x48)
+
+/* OSD Stream Frame Buffer Control Register */
+#define REG_LCM_OSD_FBCTRL              (0x4c)
+
+/* OSD Overlay Control Register */
+#define REG_LCM_OSD_OVERLAY             (0x50)
+
+/* OSD Overlay Color-Key Pattern Register */
+#define REG_LCM_OSD_CKEY                (0x54)
+
+/* OSD Overlay Color-Key Mask Register */
+#define REG_LCM_OSD_CMASK               (0x58)
+
+/* OSD Window Skip1 Register */
+#define REG_LCM_OSD_SKIP1               (0x5C)
+
+/* OSD Window Skip2 Register */
+#define REG_LCM_OSD_SKIP2               (0x60)
+
+/* OSD horizontal up scaling control register */
+#define REG_LCM_OSD_SCALE               (0x64)
+
+/* MPU Vsync control register */
+#define REG_LCM_MPU_VSYNC               (0x68)
+
+/* Hardware cursor control Register */
+#define REG_LCM_HC_CTRL                 (0x6C)
+
+/* Hardware cursot tip point potison on va picture */
+#define REG_LCM_HC_POS                  (0x70)
+
+/* Hardware Cursor Window Buffer Control Register */
+#define REG_LCM_HC_WBCTRL               (0x74)
+
+/* Hardware cursor memory base address register */
+#define REG_LCM_HC_BADDR                (0x78)
+
+/* Hardware cursor color ram register mapped to bpp = 0 */
+#define REG_LCM_HC_COLOR0               (0x7C)
+
+/* Hardware cursor color ram register mapped to bpp = 1 */
+#define REG_LCM_HC_COLOR1               (0x80)
+
+/* Hardware cursor color ram register mapped to bpp = 2 */
+#define REG_LCM_HC_COLOR2               (0x84)
+
+/* Hardware cursor color ram register mapped to bpp = 3 */
+#define REG_LCM_HC_COLOR3               (0x88)
+
+#endif /* __ASM_ARM_W90X900_REGS_LDM_H */
diff --git a/arch/arm/mach-w90x900/mach-nuc950evb.c b/arch/arm/mach-w90x900/mach-nuc950evb.c
index cef903bcccd1..b3edc3cccf52 100644
--- a/arch/arm/mach-w90x900/mach-nuc950evb.c
+++ b/arch/arm/mach-w90x900/mach-nuc950evb.c
@@ -10,6 +10,8 @@
  * This program is free software; you can redistribute it and/or
  * modify it under the terms of the GNU General Public License as
  * published by the Free Software Foundation;version 2 of the License.
+ *   history:
+ *     Wang Qiang (rurality.linux@gmail.com) add LCD support
  *
  */
 
@@ -18,9 +20,51 @@
 #include <asm/mach/map.h>
 #include <asm/mach-types.h>
 #include <mach/map.h>
+#include <mach/regs-ldm.h>
+#include <mach/fb.h>
 
 #include "nuc950.h"
 
+#ifdef CONFIG_FB_NUC900
+/* LCD Controller */
+static struct nuc900fb_display __initdata nuc950_lcd_info[] = {
+        /* Giantplus Technology GPM1040A0 320x240 Color TFT LCD */
+        [0] = {
+                .type           = LCM_DCCS_VA_SRC_RGB565,
+                .width          = 320,
+                .height         = 240,
+                .xres           = 320,
+                .yres           = 240,
+                .bpp            = 16,
+                .pixclock       = 200000,
+                .left_margin    = 34,
+                .right_margin   = 54,
+                .hsync_len      = 10,
+                .upper_margin   = 18,
+                .lower_margin   = 4,
+                .vsync_len      = 1,
+                .dccs           = 0x8e00041a,
+                .devctl         = 0x060800c0,
+                .fbctrl         = 0x00a000a0,
+                .scale          = 0x04000400,
+        },
+};
+
+static struct nuc900fb_mach_info nuc950_fb_info __initdata = {
+#if defined(CONFIG_GPM1040A0_320X240)
+        .displays               = &nuc950_lcd_info[0],
+#else
+        .displays               = nuc950_lcd_info,
+#endif
+        .num_displays           = ARRAY_SIZE(nuc950_lcd_info),
+        .default_display        = 0,
+        .gpio_dir               = 0x00000004,
+        .gpio_dir_mask          = 0xFFFFFFFD,
+        .gpio_data              = 0x00000004,
+        .gpio_data_mask         = 0xFFFFFFFD,
+};
+#endif
+
 static void __init nuc950evb_map_io(void)
 {
         nuc950_map_io();
@@ -30,6 +74,9 @@ static void __init nuc950evb_map_io(void)
 static void __init nuc950evb_init(void)
 {
         nuc950_board_init();
+#ifdef CONFIG_FB_NUC900
+        nuc900_fb_set_platdata(&nuc950_fb_info);
+#endif
 }
 
 MACHINE_START(W90P950EVB, "W90P950EVB")
diff --git a/arch/arm/mach-w90x900/nuc950.c b/arch/arm/mach-w90x900/nuc950.c
index 149508116d18..4d1f1ab044c4 100644
--- a/arch/arm/mach-w90x900/nuc950.c
+++ b/arch/arm/mach-w90x900/nuc950.c
@@ -18,6 +18,7 @@
 #include <linux/platform_device.h>
 #include <asm/mach/map.h>
 #include <mach/hardware.h>
+
 #include "cpu.h"
 
 /* define specific CPU platform device */
@@ -25,6 +26,9 @@
 static struct platform_device *nuc950_dev[] __initdata = {
         &nuc900_device_kpi,
         &nuc900_device_fmi,
+#ifdef CONFIG_FB_NUC900
+        &nuc900_device_lcd,
+#endif
 };
 
 /* define specific CPU platform io map */
diff --git a/arch/arm/plat-mxc/Kconfig b/arch/arm/plat-mxc/Kconfig
index 8b0a1ee039fa..7f7ad6f289bd 100644
--- a/arch/arm/plat-mxc/Kconfig
+++ b/arch/arm/plat-mxc/Kconfig
@@ -9,38 +9,43 @@ choice
 config ARCH_MX1
         bool "MX1-based"
         select CPU_ARM920T
-        select COMMON_CLKDEV
+        select IMX_HAVE_IOMUX_V1
         help
           This enables support for systems based on the Freescale i.MX1 family
 
 config ARCH_MX2
         bool "MX2-based"
         select CPU_ARM926T
-        select COMMON_CLKDEV
+        select IMX_HAVE_IOMUX_V1
         help
           This enables support for systems based on the Freescale i.MX2 family
 
 config ARCH_MX25
         bool "MX25-based"
         select CPU_ARM926T
-        select COMMON_CLKDEV
+        select ARCH_MXC_IOMUX_V3
+        select HAVE_FB_IMX
         help
           This enables support for systems based on the Freescale i.MX25 family
 
 config ARCH_MX3
         bool "MX3-based"
         select CPU_V6
-        select COMMON_CLKDEV
         help
           This enables support for systems based on the Freescale i.MX3 family
 
 config ARCH_MXC91231
         bool "MXC91231-based"
         select CPU_V6
-        select COMMON_CLKDEV
         help
           This enables support for systems based on the Freescale MXC91231 family
 
+config ARCH_MX5
+        bool "MX5-based"
+        select CPU_V7
+        help
+          This enables support for systems based on the Freescale i.MX51 family
+
 endchoice
 
 source "arch/arm/mach-mx1/Kconfig"
@@ -48,12 +53,12 @@ source "arch/arm/mach-mx2/Kconfig"
 source "arch/arm/mach-mx3/Kconfig"
 source "arch/arm/mach-mx25/Kconfig"
 source "arch/arm/mach-mxc91231/Kconfig"
+source "arch/arm/mach-mx5/Kconfig"
 
 endmenu
 
 config MXC_IRQ_PRIOR
         bool "Use IRQ priority"
-        depends on ARCH_MXC
         help
           Select this if you want to use prioritized IRQ handling.
           This feature prevents higher priority ISR to be interrupted
@@ -62,9 +67,16 @@ config MXC_IRQ_PRIOR
           requirements for timing.
           Say N here, unless you have a specialized requirement.
 
+config MXC_TZIC
+        bool "Enable TrustZone Interrupt Controller"
+        depends on ARCH_MX51
+        help
+          This will be automatically selected for all processors
+          containing this interrupt controller.
+          Say N here only if you are really sure.
+
 config MXC_PWM
         tristate "Enable PWM driver"
-        depends on ARCH_MXC
         select HAVE_PWM
         help
           Enable support for the i.MX PWM controller(s).
@@ -74,7 +86,9 @@ config MXC_ULPI
 
 config ARCH_HAS_RNGA
         bool
-        depends on ARCH_MXC
+
+config IMX_HAVE_IOMUX_V1
+        bool
 
 config ARCH_MXC_IOMUX_V3
         bool
diff --git a/arch/arm/plat-mxc/Makefile b/arch/arm/plat-mxc/Makefile
index 6cee38df58b2..895bc3c5e0c0 100644
--- a/arch/arm/plat-mxc/Makefile
+++ b/arch/arm/plat-mxc/Makefile
@@ -5,8 +5,12 @@
 # Common support
 obj-y := irq.o clock.o gpio.o time.o devices.o cpu.o system.o
 
-obj-$(CONFIG_ARCH_MX1) += iomux-mx1-mx2.o dma-mx1-mx2.o
-obj-$(CONFIG_ARCH_MX2) += iomux-mx1-mx2.o dma-mx1-mx2.o
+# MX51 uses the TZIC interrupt controller, older platforms use AVIC (irq.o)
+obj-$(CONFIG_MXC_TZIC) += tzic.o
+
+obj-$(CONFIG_ARCH_MX1) += dma-mx1-mx2.o
+obj-$(CONFIG_ARCH_MX2) += dma-mx1-mx2.o
+obj-$(CONFIG_IMX_HAVE_IOMUX_V1) += iomux-v1.o
 obj-$(CONFIG_ARCH_MXC_IOMUX_V3) += iomux-v3.o
 obj-$(CONFIG_MXC_PWM)  += pwm.o
 obj-$(CONFIG_USB_EHCI_MXC) += ehci.o
diff --git a/arch/arm/plat-mxc/audmux-v1.c b/arch/arm/plat-mxc/audmux-v1.c
index da6387dcdf21..b62917ca3f95 100644
--- a/arch/arm/plat-mxc/audmux-v1.c
+++ b/arch/arm/plat-mxc/audmux-v1.c
@@ -50,8 +50,18 @@ EXPORT_SYMBOL_GPL(mxc_audmux_v1_configure_port);
 
 static int mxc_audmux_v1_init(void)
 {
-        if (cpu_is_mx27() || cpu_is_mx21())
-                audmux_base = IO_ADDRESS(AUDMUX_BASE_ADDR);
+#ifdef CONFIG_MACH_MX21
+        if (cpu_is_mx21())
+                audmux_base = MX21_IO_ADDRESS(MX21_AUDMUX_BASE_ADDR);
+        else
+#endif
+#ifdef CONFIG_MACH_MX27
+        if (cpu_is_mx27())
+                audmux_base = MX27_IO_ADDRESS(MX27_AUDMUX_BASE_ADDR);
+        else
+#endif
+                (void)0;
+        
         return 0;
 }
 
diff --git a/arch/arm/plat-mxc/audmux-v2.c b/arch/arm/plat-mxc/audmux-v2.c
index b06954a84436..d983cd6c788c 100644
--- a/arch/arm/plat-mxc/audmux-v2.c
+++ b/arch/arm/plat-mxc/audmux-v2.c
@@ -190,7 +190,10 @@ static int mxc_audmux_v2_init(void)
 {
         int ret;
 
-        if (cpu_is_mx35()) {
+        if (cpu_is_mx31())
+                audmux_base = MX31_IO_ADDRESS(MX31_AUDMUX_BASE_ADDR);
+
+        else if (cpu_is_mx35()) {
                 audmux_clk = clk_get(NULL, "audmux");
                 if (IS_ERR(audmux_clk)) {
                         ret = PTR_ERR(audmux_clk);
@@ -198,11 +201,9 @@ static int mxc_audmux_v2_init(void)
                                         ret);
                         return ret;
                 }
+                audmux_base = MX35_IO_ADDRESS(MX35_AUDMUX_BASE_ADDR);
         }
 
-        if (cpu_is_mx31() || cpu_is_mx35())
-                audmux_base = IO_ADDRESS(AUDMUX_BASE_ADDR);
-
         audmux_debugfs_init();
 
         return 0;
diff --git a/arch/arm/plat-mxc/clock.c b/arch/arm/plat-mxc/clock.c
index 9e8fbd57495c..323ff8ccc877 100644
--- a/arch/arm/plat-mxc/clock.c
+++ b/arch/arm/plat-mxc/clock.c
@@ -56,6 +56,7 @@ static void __clk_disable(struct clk *clk)
         __clk_disable(clk->parent);
         __clk_disable(clk->secondary);
 
+        WARN_ON(!clk->usecount);
         if (!(--clk->usecount) && clk->disable)
                 clk->disable(clk);
 }
diff --git a/arch/arm/plat-mxc/dma-mx1-mx2.c b/arch/arm/plat-mxc/dma-mx1-mx2.c
index 9c1b3f9c4f4d..e16014b0d13c 100644
--- a/arch/arm/plat-mxc/dma-mx1-mx2.c
+++ b/arch/arm/plat-mxc/dma-mx1-mx2.c
@@ -128,6 +128,18 @@ struct imx_dma_channel {
         int hw_chaining;
 };
 
+static void __iomem *imx_dmav1_baseaddr;
+
+static void imx_dmav1_writel(unsigned val, unsigned offset)
+{
+        __raw_writel(val, imx_dmav1_baseaddr + offset);
+}
+
+static unsigned imx_dmav1_readl(unsigned offset)
+{
+        return __raw_readl(imx_dmav1_baseaddr + offset);
+}
+
 static struct imx_dma_channel imx_dma_channels[IMX_DMA_CHANNELS];
 
 static struct clk *dma_clk;
@@ -140,7 +152,6 @@ static int imx_dma_hw_chain(struct imx_dma_channel *imxdma)
                 return 0;
 }
 
-
 /*
  * imx_dma_sg_next - prepare next chunk for scatter-gather DMA emulation
  */
@@ -160,17 +171,17 @@ static inline int imx_dma_sg_next(int channel, struct scatterlist *sg)
                 imxdma->resbytes -= now;
 
         if ((imxdma->dma_mode & DMA_MODE_MASK) == DMA_MODE_READ)
-                __raw_writel(sg->dma_address, DMA_BASE + DMA_DAR(channel));
+                imx_dmav1_writel(sg->dma_address, DMA_DAR(channel));
         else
-                __raw_writel(sg->dma_address, DMA_BASE + DMA_SAR(channel));
+                imx_dmav1_writel(sg->dma_address, DMA_SAR(channel));
 
-        __raw_writel(now, DMA_BASE + DMA_CNTR(channel));
+        imx_dmav1_writel(now, DMA_CNTR(channel));
 
         pr_debug("imxdma%d: next sg chunk dst 0x%08x, src 0x%08x, "
                 "size 0x%08x\n", channel,
-                 __raw_readl(DMA_BASE + DMA_DAR(channel)),
-                 __raw_readl(DMA_BASE + DMA_SAR(channel)),
-                 __raw_readl(DMA_BASE + DMA_CNTR(channel)));
+                 imx_dmav1_readl(DMA_DAR(channel)),
+                 imx_dmav1_readl(DMA_SAR(channel)),
+                 imx_dmav1_readl(DMA_CNTR(channel)));
 
         return now;
 }
@@ -218,27 +229,26 @@ imx_dma_setup_single(int channel, dma_addr_t dma_address,
                         channel, __func__, (unsigned int)dma_address,
                         dma_length, dev_addr);
 
-                __raw_writel(dev_addr, DMA_BASE + DMA_SAR(channel));
-                __raw_writel(dma_address, DMA_BASE + DMA_DAR(channel));
-                __raw_writel(imxdma->ccr_from_device,
-                                DMA_BASE + DMA_CCR(channel));
+                imx_dmav1_writel(dev_addr, DMA_SAR(channel));
+                imx_dmav1_writel(dma_address, DMA_DAR(channel));
+                imx_dmav1_writel(imxdma->ccr_from_device, DMA_CCR(channel));
         } else if ((dmamode & DMA_MODE_MASK) == DMA_MODE_WRITE) {
                 pr_debug("imxdma%d: %s dma_addressg=0x%08x dma_length=%d "
                         "dev_addr=0x%08x for write\n",
                         channel, __func__, (unsigned int)dma_address,
                         dma_length, dev_addr);
 
-                __raw_writel(dma_address, DMA_BASE + DMA_SAR(channel));
-                __raw_writel(dev_addr, DMA_BASE + DMA_DAR(channel));
-                __raw_writel(imxdma->ccr_to_device,
-                                DMA_BASE + DMA_CCR(channel));
+                imx_dmav1_writel(dma_address, DMA_SAR(channel));
+                imx_dmav1_writel(dev_addr, DMA_DAR(channel));
+                imx_dmav1_writel(imxdma->ccr_to_device,
+                                DMA_CCR(channel));
         } else {
                 printk(KERN_ERR "imxdma%d: imx_dma_setup_single bad dmamode\n",
                        channel);
                 return -EINVAL;
         }
 
-        __raw_writel(dma_length, DMA_BASE + DMA_CNTR(channel));
+        imx_dmav1_writel(dma_length, DMA_CNTR(channel));
 
         return 0;
 }
@@ -316,17 +326,15 @@ imx_dma_setup_sg(int channel,
                         "dev_addr=0x%08x for read\n",
                         channel, __func__, sg, sgcount, dma_length, dev_addr);
 
-                __raw_writel(dev_addr, DMA_BASE + DMA_SAR(channel));
-                __raw_writel(imxdma->ccr_from_device,
-                                DMA_BASE + DMA_CCR(channel));
+                imx_dmav1_writel(dev_addr, DMA_SAR(channel));
+                imx_dmav1_writel(imxdma->ccr_from_device, DMA_CCR(channel));
         } else if ((dmamode & DMA_MODE_MASK) == DMA_MODE_WRITE) {
                 pr_debug("imxdma%d: %s sg=%p sgcount=%d total length=%d "
                         "dev_addr=0x%08x for write\n",
                         channel, __func__, sg, sgcount, dma_length, dev_addr);
 
-                __raw_writel(dev_addr, DMA_BASE + DMA_DAR(channel));
-                __raw_writel(imxdma->ccr_to_device,
-                                DMA_BASE + DMA_CCR(channel));
+                imx_dmav1_writel(dev_addr, DMA_DAR(channel));
+                imx_dmav1_writel(imxdma->ccr_to_device, DMA_CCR(channel));
         } else {
                 printk(KERN_ERR "imxdma%d: imx_dma_setup_sg bad dmamode\n",
                        channel);
@@ -360,7 +368,7 @@ imx_dma_config_channel(int channel, unsigned int config_port,
         imxdma->ccr_from_device = config_port | (config_mem << 2) | dreq;
         imxdma->ccr_to_device = config_mem | (config_port << 2) | dreq;
 
-        __raw_writel(dmareq, DMA_BASE + DMA_RSSR(channel));
+        imx_dmav1_writel(dmareq, DMA_RSSR(channel));
 
         return 0;
 }
@@ -368,7 +376,7 @@ EXPORT_SYMBOL(imx_dma_config_channel);
 
 void imx_dma_config_burstlen(int channel, unsigned int burstlen)
 {
-        __raw_writel(burstlen, DMA_BASE + DMA_BLR(channel));
+        imx_dmav1_writel(burstlen, DMA_BLR(channel));
 }
 EXPORT_SYMBOL(imx_dma_config_burstlen);
 
@@ -398,7 +406,7 @@ imx_dma_setup_handlers(int channel,
         }
 
         local_irq_save(flags);
-        __raw_writel(1 << channel, DMA_BASE + DMA_DISR);
+        imx_dmav1_writel(1 << channel, DMA_DISR);
         imxdma->irq_handler = irq_handler;
         imxdma->err_handler = err_handler;
         imxdma->data = data;
@@ -462,22 +470,21 @@ void imx_dma_enable(int channel)
 
         local_irq_save(flags);
 
-        __raw_writel(1 << channel, DMA_BASE + DMA_DISR);
-        __raw_writel(__raw_readl(DMA_BASE + DMA_DIMR) & ~(1 << channel),
-                DMA_BASE + DMA_DIMR);
-        __raw_writel(__raw_readl(DMA_BASE + DMA_CCR(channel)) | CCR_CEN |
-                CCR_ACRPT,
-                DMA_BASE + DMA_CCR(channel));
+        imx_dmav1_writel(1 << channel, DMA_DISR);
+        imx_dmav1_writel(imx_dmav1_readl(DMA_DIMR) & ~(1 << channel), DMA_DIMR);
+        imx_dmav1_writel(imx_dmav1_readl(DMA_CCR(channel)) | CCR_CEN |
+                CCR_ACRPT, DMA_CCR(channel));
 
 #ifdef CONFIG_ARCH_MX2
-        if (imxdma->sg && imx_dma_hw_chain(imxdma)) {
+        if ((cpu_is_mx21() || cpu_is_mx27()) &&
+                        imxdma->sg && imx_dma_hw_chain(imxdma)) {
                 imxdma->sg = sg_next(imxdma->sg);
                 if (imxdma->sg) {
                         u32 tmp;
                         imx_dma_sg_next(channel, imxdma->sg);
-                        tmp = __raw_readl(DMA_BASE + DMA_CCR(channel));
-                        __raw_writel(tmp | CCR_RPT | CCR_ACRPT,
-                                DMA_BASE + DMA_CCR(channel));
+                        tmp = imx_dmav1_readl(DMA_CCR(channel));
+                        imx_dmav1_writel(tmp | CCR_RPT | CCR_ACRPT,
+                                DMA_CCR(channel));
                 }
         }
 #endif
@@ -502,11 +509,10 @@ void imx_dma_disable(int channel)
                 del_timer(&imxdma->watchdog);
 
         local_irq_save(flags);
-        __raw_writel(__raw_readl(DMA_BASE + DMA_DIMR) | (1 << channel),
-                DMA_BASE + DMA_DIMR);
-        __raw_writel(__raw_readl(DMA_BASE + DMA_CCR(channel)) & ~CCR_CEN,
-                DMA_BASE + DMA_CCR(channel));
-        __raw_writel(1 << channel, DMA_BASE + DMA_DISR);
+        imx_dmav1_writel(imx_dmav1_readl(DMA_DIMR) | (1 << channel), DMA_DIMR);
+        imx_dmav1_writel(imx_dmav1_readl(DMA_CCR(channel)) & ~CCR_CEN,
+                        DMA_CCR(channel));
+        imx_dmav1_writel(1 << channel, DMA_DISR);
         imxdma->in_use = 0;
         local_irq_restore(flags);
 }
@@ -517,7 +523,7 @@ static void imx_dma_watchdog(unsigned long chno)
 {
         struct imx_dma_channel *imxdma = &imx_dma_channels[chno];
 
-        __raw_writel(0, DMA_BASE + DMA_CCR(chno));
+        imx_dmav1_writel(0, DMA_CCR(chno));
         imxdma->in_use = 0;
         imxdma->sg = NULL;
 
@@ -533,17 +539,17 @@ static irqreturn_t dma_err_handler(int irq, void *dev_id)
         unsigned int err_mask;
         int errcode;
 
-        disr = __raw_readl(DMA_BASE + DMA_DISR);
+        disr = imx_dmav1_readl(DMA_DISR);
 
-        err_mask = __raw_readl(DMA_BASE + DMA_DBTOSR) |
-                   __raw_readl(DMA_BASE + DMA_DRTOSR) |
-                   __raw_readl(DMA_BASE + DMA_DSESR)  |
-                   __raw_readl(DMA_BASE + DMA_DBOSR);
+        err_mask = imx_dmav1_readl(DMA_DBTOSR) |
+                   imx_dmav1_readl(DMA_DRTOSR) |
+                   imx_dmav1_readl(DMA_DSESR)  |
+                   imx_dmav1_readl(DMA_DBOSR);
 
         if (!err_mask)
                 return IRQ_HANDLED;
 
-        __raw_writel(disr & err_mask, DMA_BASE + DMA_DISR);
+        imx_dmav1_writel(disr & err_mask, DMA_DISR);
 
         for (i = 0; i < IMX_DMA_CHANNELS; i++) {
                 if (!(err_mask & (1 << i)))
@@ -551,20 +557,20 @@ static irqreturn_t dma_err_handler(int irq, void *dev_id)
                 imxdma = &imx_dma_channels[i];
                 errcode = 0;
 
-                if (__raw_readl(DMA_BASE + DMA_DBTOSR) & (1 << i)) {
-                        __raw_writel(1 << i, DMA_BASE + DMA_DBTOSR);
+                if (imx_dmav1_readl(DMA_DBTOSR) & (1 << i)) {
+                        imx_dmav1_writel(1 << i, DMA_DBTOSR);
                         errcode |= IMX_DMA_ERR_BURST;
                 }
-                if (__raw_readl(DMA_BASE + DMA_DRTOSR) & (1 << i)) {
-                        __raw_writel(1 << i, DMA_BASE + DMA_DRTOSR);
+                if (imx_dmav1_readl(DMA_DRTOSR) & (1 << i)) {
+                        imx_dmav1_writel(1 << i, DMA_DRTOSR);
                         errcode |= IMX_DMA_ERR_REQUEST;
                 }
-                if (__raw_readl(DMA_BASE + DMA_DSESR) & (1 << i)) {
-                        __raw_writel(1 << i, DMA_BASE + DMA_DSESR);
+                if (imx_dmav1_readl(DMA_DSESR) & (1 << i)) {
+                        imx_dmav1_writel(1 << i, DMA_DSESR);
                         errcode |= IMX_DMA_ERR_TRANSFER;
                 }
-                if (__raw_readl(DMA_BASE + DMA_DBOSR) & (1 << i)) {
-                        __raw_writel(1 << i, DMA_BASE + DMA_DBOSR);
+                if (imx_dmav1_readl(DMA_DBOSR) & (1 << i)) {
+                        imx_dmav1_writel(1 << i, DMA_DBOSR);
                         errcode |= IMX_DMA_ERR_BUFFER;
                 }
                 if (imxdma->name && imxdma->err_handler) {
@@ -607,7 +613,7 @@ static void dma_irq_handle_channel(int chno)
                 if (imxdma->sg) {
                         imx_dma_sg_next(chno, imxdma->sg);
 
-                        tmp = __raw_readl(DMA_BASE + DMA_CCR(chno));
+                        tmp = imx_dmav1_readl(DMA_CCR(chno));
 
                         if (imx_dma_hw_chain(imxdma)) {
                                 /* FIXME: The timeout should probably be
@@ -617,15 +623,13 @@ static void dma_irq_handle_channel(int chno)
                                         jiffies + msecs_to_jiffies(500));
 
                                 tmp |= CCR_CEN | CCR_RPT | CCR_ACRPT;
-                                __raw_writel(tmp, DMA_BASE +
-                                                DMA_CCR(chno));
+                                imx_dmav1_writel(tmp, DMA_CCR(chno));
                         } else {
-                                __raw_writel(tmp & ~CCR_CEN, DMA_BASE +
-                                                DMA_CCR(chno));
+                                imx_dmav1_writel(tmp & ~CCR_CEN, DMA_CCR(chno));
                                 tmp |= CCR_CEN;
                         }
 
-                        __raw_writel(tmp, DMA_BASE + DMA_CCR(chno));
+                        imx_dmav1_writel(tmp, DMA_CCR(chno));
 
                         if (imxdma->prog_handler)
                                 imxdma->prog_handler(chno, imxdma->data,
@@ -640,7 +644,7 @@ static void dma_irq_handle_channel(int chno)
                 }
         }
 
-        __raw_writel(0, DMA_BASE + DMA_CCR(chno));
+        imx_dmav1_writel(0, DMA_CCR(chno));
         imxdma->in_use = 0;
         if (imxdma->irq_handler)
                 imxdma->irq_handler(chno, imxdma->data);
@@ -651,15 +655,16 @@ static irqreturn_t dma_irq_handler(int irq, void *dev_id)
         int i, disr;
 
 #ifdef CONFIG_ARCH_MX2
-        dma_err_handler(irq, dev_id);
+        if (cpu_is_mx21() || cpu_is_mx27())
+                dma_err_handler(irq, dev_id);
 #endif
 
-        disr = __raw_readl(DMA_BASE + DMA_DISR);
+        disr = imx_dmav1_readl(DMA_DISR);
 
         pr_debug("imxdma: dma_irq_handler called, disr=0x%08x\n",
                      disr);
 
-        __raw_writel(disr, DMA_BASE + DMA_DISR);
+        imx_dmav1_writel(disr, DMA_DISR);
         for (i = 0; i < IMX_DMA_CHANNELS; i++) {
                 if (disr & (1 << i))
                         dma_irq_handle_channel(i);
@@ -699,17 +704,19 @@ int imx_dma_request(int channel, const char *name)
         local_irq_restore(flags); /* request_irq() can block */
 
 #ifdef CONFIG_ARCH_MX2
-        ret = request_irq(MXC_INT_DMACH0 + channel, dma_irq_handler, 0, "DMA",
-                        NULL);
-        if (ret) {
-                imxdma->name = NULL;
-                printk(KERN_CRIT "Can't register IRQ %d for DMA channel %d\n",
-                                MXC_INT_DMACH0 + channel, channel);
-                return ret;
+        if (cpu_is_mx21() || cpu_is_mx27()) {
+                ret = request_irq(MX2x_INT_DMACH0 + channel,
+                                dma_irq_handler, 0, "DMA", NULL);
+                if (ret) {
+                        imxdma->name = NULL;
+                        pr_crit("Can't register IRQ %d for DMA channel %d\n",
+                                        MX2x_INT_DMACH0 + channel, channel);
+                        return ret;
+                }
+                init_timer(&imxdma->watchdog);
+                imxdma->watchdog.function = &imx_dma_watchdog;
+                imxdma->watchdog.data = channel;
         }
-        init_timer(&imxdma->watchdog);
-        imxdma->watchdog.function = &imx_dma_watchdog;
-        imxdma->watchdog.data = channel;
 #endif
 
         return ret;
@@ -738,7 +745,8 @@ void imx_dma_free(int channel)
         imxdma->name = NULL;
 
 #ifdef CONFIG_ARCH_MX2
-        free_irq(MXC_INT_DMACH0 + channel, NULL);
+        if (cpu_is_mx21() || cpu_is_mx27())
+                free_irq(MX2x_INT_DMACH0 + channel, NULL);
 #endif
 
         local_irq_restore(flags);
@@ -796,34 +804,53 @@ static int __init imx_dma_init(void)
         int ret = 0;
         int i;
 
+#ifdef CONFIG_ARCH_MX1
+        if (cpu_is_mx1())
+                imx_dmav1_baseaddr = MX1_IO_ADDRESS(MX1_DMA_BASE_ADDR);
+        else
+#endif
+#ifdef CONFIG_MACH_MX21
+        if (cpu_is_mx21())
+                imx_dmav1_baseaddr = MX21_IO_ADDRESS(MX21_DMA_BASE_ADDR);
+        else
+#endif
+#ifdef CONFIG_MACH_MX27
+        if (cpu_is_mx27())
+                imx_dmav1_baseaddr = MX27_IO_ADDRESS(MX27_DMA_BASE_ADDR);
+        else
+#endif
+                BUG();
+
         dma_clk = clk_get(NULL, "dma");
         clk_enable(dma_clk);
 
         /* reset DMA module */
-        __raw_writel(DCR_DRST, DMA_BASE + DMA_DCR);
+        imx_dmav1_writel(DCR_DRST, DMA_DCR);
 
 #ifdef CONFIG_ARCH_MX1
-        ret = request_irq(DMA_INT, dma_irq_handler, 0, "DMA", NULL);
-        if (ret) {
-                printk(KERN_CRIT "Wow!  Can't register IRQ for DMA\n");
-                return ret;
-        }
+        if (cpu_is_mx1()) {
+                ret = request_irq(MX1_DMA_INT, dma_irq_handler, 0, "DMA", NULL);
+                if (ret) {
+                        pr_crit("Wow!  Can't register IRQ for DMA\n");
+                        return ret;
+                }
 
-        ret = request_irq(DMA_ERR, dma_err_handler, 0, "DMA", NULL);
-        if (ret) {
-                printk(KERN_CRIT "Wow!  Can't register ERRIRQ for DMA\n");
-                free_irq(DMA_INT, NULL);
-                return ret;
+                ret = request_irq(MX1_DMA_ERR, dma_err_handler, 0, "DMA", NULL);
+                if (ret) {
+                        pr_crit("Wow!  Can't register ERRIRQ for DMA\n");
+                        free_irq(MX1_DMA_INT, NULL);
+                        return ret;
+                }
         }
 #endif
         /* enable DMA module */
-        __raw_writel(DCR_DEN, DMA_BASE + DMA_DCR);
+        imx_dmav1_writel(DCR_DEN, DMA_DCR);
 
         /* clear all interrupts */
-        __raw_writel((1 << IMX_DMA_CHANNELS) - 1, DMA_BASE + DMA_DISR);
+        imx_dmav1_writel((1 << IMX_DMA_CHANNELS) - 1, DMA_DISR);
 
         /* disable interrupts */
-        __raw_writel((1 << IMX_DMA_CHANNELS) - 1, DMA_BASE + DMA_DIMR);
+        imx_dmav1_writel((1 << IMX_DMA_CHANNELS) - 1, DMA_DIMR);
 
         for (i = 0; i < IMX_DMA_CHANNELS; i++) {
                 imx_dma_channels[i].sg = NULL;
diff --git a/arch/arm/plat-mxc/ehci.c b/arch/arm/plat-mxc/ehci.c
index 41599be882e8..cb0b63874482 100644
--- a/arch/arm/plat-mxc/ehci.c
+++ b/arch/arm/plat-mxc/ehci.c
@@ -25,25 +25,37 @@
 #define USBCTRL_OTGBASE_OFFSET  0x600
 
 #define MX31_OTG_SIC_SHIFT      29
-#define MX31_OTG_SIC_MASK       (0xf << MX31_OTG_SIC_SHIFT)
+#define MX31_OTG_SIC_MASK       (0x3 << MX31_OTG_SIC_SHIFT)
 #define MX31_OTG_PM_BIT         (1 << 24)
 
 #define MX31_H2_SIC_SHIFT       21
-#define MX31_H2_SIC_MASK        (0xf << MX31_H2_SIC_SHIFT)
+#define MX31_H2_SIC_MASK        (0x3 << MX31_H2_SIC_SHIFT)
 #define MX31_H2_PM_BIT          (1 << 16)
 #define MX31_H2_DT_BIT          (1 << 5)
 
 #define MX31_H1_SIC_SHIFT       13
-#define MX31_H1_SIC_MASK        (0xf << MX31_H1_SIC_SHIFT)
+#define MX31_H1_SIC_MASK        (0x3 << MX31_H1_SIC_SHIFT)
 #define MX31_H1_PM_BIT          (1 << 8)
 #define MX31_H1_DT_BIT          (1 << 4)
 
+#define MX35_OTG_SIC_SHIFT      29
+#define MX35_OTG_SIC_MASK       (0x3 << MX35_OTG_SIC_SHIFT)
+#define MX35_OTG_PM_BIT         (1 << 24)
+
+#define MX35_H1_SIC_SHIFT       21
+#define MX35_H1_SIC_MASK        (0x3 << MX35_H1_SIC_SHIFT)
+#define MX35_H1_PM_BIT          (1 << 8)
+#define MX35_H1_IPPUE_UP_BIT    (1 << 7)
+#define MX35_H1_IPPUE_DOWN_BIT  (1 << 6)
+#define MX35_H1_TLL_BIT         (1 << 5)
+#define MX35_H1_USBTE_BIT       (1 << 4)
+
 int mxc_set_usbcontrol(int port, unsigned int flags)
 {
         unsigned int v;
-
+#ifdef CONFIG_ARCH_MX3
         if (cpu_is_mx31()) {
-                v = readl(IO_ADDRESS(MX31_OTG_BASE_ADDR +
+                v = readl(MX31_IO_ADDRESS(MX31_OTG_BASE_ADDR +
                                      USBCTRL_OTGBASE_OFFSET));
 
                 switch (port) {
@@ -51,15 +63,15 @@ int mxc_set_usbcontrol(int port, unsigned int flags)
                         v &= ~(MX31_OTG_SIC_MASK | MX31_OTG_PM_BIT);
                         v |= (flags & MXC_EHCI_INTERFACE_MASK)
                                         << MX31_OTG_SIC_SHIFT;
-                        if (flags & MXC_EHCI_POWER_PINS_ENABLED)
+                        if (!(flags & MXC_EHCI_POWER_PINS_ENABLED))
                                 v |= MX31_OTG_PM_BIT;
 
                         break;
                 case 1: /* H1 port */
-                        v &= ~(MX31_H1_SIC_MASK | MX31_H1_PM_BIT);
+                        v &= ~(MX31_H1_SIC_MASK | MX31_H1_PM_BIT | MX31_H1_DT_BIT);
                         v |= (flags & MXC_EHCI_INTERFACE_MASK)
                                                 << MX31_H1_SIC_SHIFT;
-                        if (flags & MXC_EHCI_POWER_PINS_ENABLED)
+                        if (!(flags & MXC_EHCI_POWER_PINS_ENABLED))
                                 v |= MX31_H1_PM_BIT;
 
                         if (!(flags & MXC_EHCI_TTL_ENABLED))
@@ -67,7 +79,7 @@ int mxc_set_usbcontrol(int port, unsigned int flags)
 
                         break;
                 case 2: /* H2 port */
-                        v &= ~(MX31_H2_SIC_MASK | MX31_H2_PM_BIT);
+                        v &= ~(MX31_H2_SIC_MASK | MX31_H2_PM_BIT | MX31_H2_DT_BIT);
                         v |= (flags & MXC_EHCI_INTERFACE_MASK)
                                                 << MX31_H2_SIC_SHIFT;
                         if (!(flags & MXC_EHCI_POWER_PINS_ENABLED))
@@ -77,13 +89,103 @@ int mxc_set_usbcontrol(int port, unsigned int flags)
                                 v |= MX31_H2_DT_BIT;
 
                         break;
+                default:
+                        return -EINVAL;
                 }
 
-                writel(v, IO_ADDRESS(MX31_OTG_BASE_ADDR +
+                writel(v, MX31_IO_ADDRESS(MX31_OTG_BASE_ADDR +
                                      USBCTRL_OTGBASE_OFFSET));
                 return 0;
         }
 
+        if (cpu_is_mx35()) {
+                v = readl(MX35_IO_ADDRESS(MX35_OTG_BASE_ADDR +
+                                     USBCTRL_OTGBASE_OFFSET));
+
+                switch (port) {
+                case 0: /* OTG port */
+                        v &= ~(MX35_OTG_SIC_MASK | MX35_OTG_PM_BIT);
+                        v |= (flags & MXC_EHCI_INTERFACE_MASK)
+                                        << MX35_OTG_SIC_SHIFT;
+                        if (!(flags & MXC_EHCI_POWER_PINS_ENABLED))
+                                v |= MX35_OTG_PM_BIT;
+
+                        break;
+                case 1: /* H1 port */
+                        v &= ~(MX35_H1_SIC_MASK | MX35_H1_PM_BIT | MX35_H1_TLL_BIT |
+                                MX35_H1_USBTE_BIT | MX35_H1_IPPUE_DOWN_BIT | MX35_H1_IPPUE_UP_BIT);
+                        v |= (flags & MXC_EHCI_INTERFACE_MASK)
+                                                << MX35_H1_SIC_SHIFT;
+                        if (!(flags & MXC_EHCI_POWER_PINS_ENABLED))
+                                v |= MX35_H1_PM_BIT;
+
+                        if (!(flags & MXC_EHCI_TTL_ENABLED))
+                                v |= MX35_H1_TLL_BIT;
+
+                        if (flags & MXC_EHCI_INTERNAL_PHY)
+                                v |= MX35_H1_USBTE_BIT;
+
+                        if (flags & MXC_EHCI_IPPUE_DOWN)
+                                v |= MX35_H1_IPPUE_DOWN_BIT;
+
+                        if (flags & MXC_EHCI_IPPUE_UP)
+                                v |= MX35_H1_IPPUE_UP_BIT;
+
+                        break;
+                default:
+                        return -EINVAL;
+                }
+
+                writel(v, MX35_IO_ADDRESS(MX35_OTG_BASE_ADDR +
+                                     USBCTRL_OTGBASE_OFFSET));
+                return 0;
+        }
+#endif /* CONFIG_ARCH_MX3 */
+#ifdef CONFIG_MACH_MX27
+        if (cpu_is_mx27()) {
+                /* On i.MX27 we can use the i.MX31 USBCTRL bits, they
+                 * are identical
+                 */
+                v = readl(MX27_IO_ADDRESS(MX27_OTG_BASE_ADDR +
+                                     USBCTRL_OTGBASE_OFFSET));
+                switch (port) {
+                case 0: /* OTG port */
+                        v &= ~(MX31_OTG_SIC_MASK | MX31_OTG_PM_BIT);
+                        v |= (flags & MXC_EHCI_INTERFACE_MASK)
+                                        << MX31_OTG_SIC_SHIFT;
+                        if (!(flags & MXC_EHCI_POWER_PINS_ENABLED))
+                                v |= MX31_OTG_PM_BIT;
+                        break;
+                case 1: /* H1 port */
+                        v &= ~(MX31_H1_SIC_MASK | MX31_H1_PM_BIT | MX31_H1_DT_BIT);
+                        v |= (flags & MXC_EHCI_INTERFACE_MASK)
+                                                << MX31_H1_SIC_SHIFT;
+                        if (!(flags & MXC_EHCI_POWER_PINS_ENABLED))
+                                v |= MX31_H1_PM_BIT;
+
+                        if (!(flags & MXC_EHCI_TTL_ENABLED))
+                                v |= MX31_H1_DT_BIT;
+
+                        break;
+                case 2: /* H2 port */
+                        v &= ~(MX31_H2_SIC_MASK | MX31_H2_PM_BIT | MX31_H2_DT_BIT);
+                        v |= (flags & MXC_EHCI_INTERFACE_MASK)
+                                                << MX31_H2_SIC_SHIFT;
+                        if (!(flags & MXC_EHCI_POWER_PINS_ENABLED))
+                                v |= MX31_H2_PM_BIT;
+
+                        if (!(flags & MXC_EHCI_TTL_ENABLED))
+                                v |= MX31_H2_DT_BIT;
+
+                        break;
+                default:
+                        return -EINVAL;
+                }
+                writel(v, MX27_IO_ADDRESS(MX27_OTG_BASE_ADDR +
+                                     USBCTRL_OTGBASE_OFFSET));
+                return 0;
+        }
+#endif /* CONFIG_MACH_MX27 */
         printk(KERN_WARNING
                 "%s() unable to setup USBCONTROL for this CPU\n", __func__);
         return -EINVAL;
diff --git a/arch/arm/plat-mxc/gpio.c b/arch/arm/plat-mxc/gpio.c
index d65ebe303b9f..70b23893f094 100644
--- a/arch/arm/plat-mxc/gpio.c
+++ b/arch/arm/plat-mxc/gpio.c
@@ -140,16 +140,13 @@ static void mxc_flip_edge(struct mxc_gpio_port *port, u32 gpio)
         val = __raw_readl(reg);
         edge = (val >> (bit << 1)) & 3;
         val &= ~(0x3 << (bit << 1));
-        switch (edge) {
-        case GPIO_INT_HIGH_LEV:
+        if (edge == GPIO_INT_HIGH_LEV) {
                 edge = GPIO_INT_LOW_LEV;
                 pr_debug("mxc: switch GPIO %d to low trigger\n", gpio);
-                break;
-        case GPIO_INT_LOW_LEV:
+        } else if (edge == GPIO_INT_LOW_LEV) {
                 edge = GPIO_INT_HIGH_LEV;
                 pr_debug("mxc: switch GPIO %d to high trigger\n", gpio);
-                break;
-        default:
+        } else {
                 pr_err("mxc: invalid configuration for GPIO %d: %x\n",
                        gpio, edge);
                 return;
@@ -157,25 +154,20 @@ static void mxc_flip_edge(struct mxc_gpio_port *port, u32 gpio)
         __raw_writel(val | (edge << (bit << 1)), reg);
 }
 
-/* handle n interrupts in one status register */
+/* handle 32 interrupts in one status register */
 static void mxc_gpio_irq_handler(struct mxc_gpio_port *port, u32 irq_stat)
 {
-        u32 gpio_irq_no;
+        u32 gpio_irq_no_base = port->virtual_irq_start;
 
-        gpio_irq_no = port->virtual_irq_start;
-        for (; irq_stat != 0; irq_stat >>= 1, gpio_irq_no++) {
-                u32 gpio = irq_to_gpio(gpio_irq_no);
-
-                if ((irq_stat & 1) == 0)
-                        continue;
+        while (irq_stat != 0) {
+                int irqoffset = fls(irq_stat) - 1;
 
-                BUG_ON(!(irq_desc[gpio_irq_no].handle_irq));
+                if (port->both_edges & (1 << irqoffset))
+                        mxc_flip_edge(port, irqoffset);
 
-                if (port->both_edges & (1 << (gpio & 31)))
-                        mxc_flip_edge(port, gpio);
+                generic_handle_irq(gpio_irq_no_base + irqoffset);
 
-                irq_desc[gpio_irq_no].handle_irq(gpio_irq_no,
-                                &irq_desc[gpio_irq_no]);
+                irq_stat &= ~(1 << irqoffset);
         }
 }
 
diff --git a/arch/arm/plat-mxc/include/mach/board-kzmarm11.h b/arch/arm/plat-mxc/include/mach/board-kzmarm11.h
index 05ff2f31ef1f..93cc66f104c7 100644
--- a/arch/arm/plat-mxc/include/mach/board-kzmarm11.h
+++ b/arch/arm/plat-mxc/include/mach/board-kzmarm11.h
@@ -21,19 +21,19 @@
 /*
  *  KZM-ARM11-01 Board Control Registers on FPGA
  */
-#define KZM_ARM11_CTL1          (CS4_BASE_ADDR + 0x1000)
-#define KZM_ARM11_CTL2          (CS4_BASE_ADDR + 0x1001)
-#define KZM_ARM11_RSW1          (CS4_BASE_ADDR + 0x1002)
-#define KZM_ARM11_BACK_LIGHT    (CS4_BASE_ADDR + 0x1004)
-#define KZM_ARM11_FPGA_REV      (CS4_BASE_ADDR + 0x1008)
-#define KZM_ARM11_7SEG_LED      (CS4_BASE_ADDR + 0x1010)
-#define KZM_ARM11_LEDS          (CS4_BASE_ADDR + 0x1020)
-#define KZM_ARM11_DIPSW2        (CS4_BASE_ADDR + 0x1003)
+#define KZM_ARM11_CTL1          (MX31_CS4_BASE_ADDR + 0x1000)
+#define KZM_ARM11_CTL2          (MX31_CS4_BASE_ADDR + 0x1001)
+#define KZM_ARM11_RSW1          (MX31_CS4_BASE_ADDR + 0x1002)
+#define KZM_ARM11_BACK_LIGHT    (MX31_CS4_BASE_ADDR + 0x1004)
+#define KZM_ARM11_FPGA_REV      (MX31_CS4_BASE_ADDR + 0x1008)
+#define KZM_ARM11_7SEG_LED      (MX31_CS4_BASE_ADDR + 0x1010)
+#define KZM_ARM11_LEDS          (MX31_CS4_BASE_ADDR + 0x1020)
+#define KZM_ARM11_DIPSW2        (MX31_CS4_BASE_ADDR + 0x1003)
 
 /*
  * External UART for touch panel on FPGA
  */
-#define KZM_ARM11_16550         (CS4_BASE_ADDR + 0x1050)
+#define KZM_ARM11_16550         (MX31_CS4_BASE_ADDR + 0x1050)
 
 #endif /* __ARM_ARCH_BOARD_KZM_ARM11_H */
 
diff --git a/arch/arm/plat-mxc/include/mach/board-mx31ads.h b/arch/arm/plat-mxc/include/mach/board-mx31ads.h
index 2cbfa35e82ff..095a199591c6 100644
--- a/arch/arm/plat-mxc/include/mach/board-mx31ads.h
+++ b/arch/arm/plat-mxc/include/mach/board-mx31ads.h
@@ -14,7 +14,7 @@
 #include <mach/hardware.h>
 
 /* Base address of PBC controller */
-#define PBC_BASE_ADDRESS        IO_ADDRESS(CS4_BASE_ADDR)
+#define PBC_BASE_ADDRESS        MX31_CS4_BASE_ADDR_VIRT
 /* Offsets for the PBC Controller register */
 
 /* PBC Board status register offset */
diff --git a/arch/arm/plat-mxc/include/mach/board-mx31moboard.h b/arch/arm/plat-mxc/include/mach/board-mx31moboard.h
index d5be6b5a6acf..fc5fec9b55f0 100644
--- a/arch/arm/plat-mxc/include/mach/board-mx31moboard.h
+++ b/arch/arm/plat-mxc/include/mach/board-mx31moboard.h
@@ -25,6 +25,7 @@ enum mx31moboard_boards {
         MX31NOBOARD     = 0,
         MX31DEVBOARD    = 1,
         MX31MARXBOT     = 2,
+        MX31SMARTBOT    = 3,
 };
 
 /*
@@ -34,6 +35,7 @@ enum mx31moboard_boards {
 
 extern void mx31moboard_devboard_init(void);
 extern void mx31moboard_marxbot_init(void);
+extern void mx31moboard_smartbot_init(void);
 
 #endif
 
diff --git a/arch/arm/plat-mxc/include/mach/clock.h b/arch/arm/plat-mxc/include/mach/clock.h
index 43a82d0c534d..753a5988d85c 100644
--- a/arch/arm/plat-mxc/include/mach/clock.h
+++ b/arch/arm/plat-mxc/include/mach/clock.h
@@ -26,13 +26,6 @@
 struct module;
 
 struct clk {
-#ifndef CONFIG_COMMON_CLKDEV
-        /* As soon as i.MX1 and i.MX31 switched to clkdev, this
-         * block can go away */
-        struct list_head node;
-        struct module *owner;
-        const char *name;
-#endif
         int id;
         /* Source clock this clk depends on */
         struct clk *parent;
diff --git a/arch/arm/plat-mxc/include/mach/common.h b/arch/arm/plat-mxc/include/mach/common.h
index 4bf1068ffad9..2941472582d2 100644
--- a/arch/arm/plat-mxc/include/mach/common.h
+++ b/arch/arm/plat-mxc/include/mach/common.h
@@ -20,14 +20,17 @@ extern void mx25_map_io(void);
 extern void mx27_map_io(void);
 extern void mx31_map_io(void);
 extern void mx35_map_io(void);
+extern void mx51_map_io(void);
 extern void mxc91231_map_io(void);
 extern void mxc_init_irq(void __iomem *);
+extern void tzic_init_irq(void __iomem *);
 extern void mx1_init_irq(void);
 extern void mx21_init_irq(void);
 extern void mx25_init_irq(void);
 extern void mx27_init_irq(void);
 extern void mx31_init_irq(void);
 extern void mx35_init_irq(void);
+extern void mx51_init_irq(void);
 extern void mxc91231_init_irq(void);
 extern void mxc_timer_init(struct clk *timer_clk, void __iomem *, int);
 extern int mx1_clocks_init(unsigned long fref);
@@ -36,6 +39,8 @@ extern int mx25_clocks_init(void);
 extern int mx27_clocks_init(unsigned long fref);
 extern int mx31_clocks_init(unsigned long fref);
 extern int mx35_clocks_init(void);
+extern int mx51_clocks_init(unsigned long ckil, unsigned long osc,
+                        unsigned long ckih1, unsigned long ckih2);
 extern int mxc91231_clocks_init(unsigned long fref);
 extern int mxc_register_gpios(void);
 extern int mxc_register_device(struct platform_device *pdev, void *data);
diff --git a/arch/arm/plat-mxc/include/mach/debug-macro.S b/arch/arm/plat-mxc/include/mach/debug-macro.S
index 5a6ae1b9e1e8..0b6e11eaeb8c 100644
--- a/arch/arm/plat-mxc/include/mach/debug-macro.S
+++ b/arch/arm/plat-mxc/include/mach/debug-macro.S
@@ -10,6 +10,7 @@
  * published by the Free Software Foundation.
  *
  */
+#define IMX_NEEDS_DEPRECATED_SYMBOLS
 
 #ifdef CONFIG_ARCH_MX1
 #include <mach/mx1.h>
@@ -44,13 +45,22 @@
 #define UART_VADDR      AIPS1_IO_ADDRESS(UART1_BASE_ADDR)
 #endif
 
+#ifdef CONFIG_ARCH_MX5
+#ifdef UART_PADDR
+#error "CONFIG_DEBUG_LL is incompatible with multiple archs"
+#endif
+#include <mach/mx51.h>
+#define UART_PADDR      MX51_UART1_BASE_ADDR
+#define UART_VADDR      MX51_AIPS1_IO_ADDRESS(MX51_UART1_BASE_ADDR)
+#endif
+
 #ifdef CONFIG_ARCH_MXC91231
 #ifdef UART_PADDR
 #error "CONFIG_DEBUG_LL is incompatible with multiple archs"
 #endif
 #include <mach/mxc91231.h>
 #define UART_PADDR      MXC91231_UART2_BASE_ADDR
-#define UART_VADDR      MXC91231_AIPS1_IO_ADDRESS(MXC91231_UART2_BASE_ADDR)
+#define UART_VADDR      MXC91231_IO_ADDRESS(MXC91231_UART2_BASE_ADDR)
 #endif
                 .macro  addruart, rx, tmp
                 mrc     p15, 0, \rx, c1, c0
diff --git a/arch/arm/plat-mxc/include/mach/entry-macro.S b/arch/arm/plat-mxc/include/mach/entry-macro.S
index 7cf290efe768..aeb08697726b 100644
--- a/arch/arm/plat-mxc/include/mach/entry-macro.S
+++ b/arch/arm/plat-mxc/include/mach/entry-macro.S
@@ -1,6 +1,6 @@
 /*
  *  Copyright (C) 2007 Lennert Buytenhek <buytenh@wantstofly.org>
- *  Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved.
+ *  Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved.
  */
 
 /*
@@ -18,11 +18,16 @@
         .endm
 
         .macro  get_irqnr_preamble, base, tmp
+#ifndef CONFIG_MXC_TZIC
         ldr     \base, =avic_base
         ldr     \base, [\base]
 #ifdef CONFIG_MXC_IRQ_PRIOR
         ldr     r4, [\base, #AVIC_NIMASK]
 #endif
+#elif defined CONFIG_MXC_TZIC
+        ldr     \base, =tzic_base
+        ldr     \base, [\base]
+#endif /* CONFIG_MXC_TZIC */
         .endm
 
         .macro  arch_ret_to_user, tmp1, tmp2
@@ -32,6 +37,7 @@
         @ and returns its number in irqnr
         @ and returns if an interrupt occured in irqstat
         .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
+#ifndef CONFIG_MXC_TZIC
         @ Load offset & priority of the highest priority
         @ interrupt pending from AVIC_NIVECSR
         ldr     \irqstat, [\base, #0x40]
@@ -45,6 +51,32 @@
         strne   \tmp, [\base, #AVIC_NIMASK]
         streq   r4, [\base, #AVIC_NIMASK]
 #endif
+#elif defined CONFIG_MXC_TZIC
+        @ Load offset & priority of the highest priority
+        @ interrupt pending.
+        @ 0xD80 is HIPND0 register
+        mov     \irqnr, #0
+        mov     \irqstat, #0x0D80
+1000:
+        ldr     \tmp,   [\irqstat, \base]
+        cmp     \tmp, #0
+        bne     1001f
+        addeq   \irqnr, \irqnr, #32
+        addeq   \irqstat, \irqstat, #4
+        cmp     \irqnr, #128
+        blo     1000b
+        b       2001f
+1001:   mov     \irqstat, #1
+1002:   tst     \tmp, \irqstat
+        bne     2002f
+        movs    \tmp, \tmp, lsr #1
+        addne   \irqnr, \irqnr, #1
+        bne     1002b
+2001:
+        mov  \irqnr, #0
+2002:
+        movs \irqnr, \irqnr
+#endif
         .endm
 
         @ irq priority table (not used)
diff --git a/arch/arm/plat-mxc/include/mach/hardware.h b/arch/arm/plat-mxc/include/mach/hardware.h
index 78db75475f69..ebadf4ac43fc 100644
--- a/arch/arm/plat-mxc/include/mach/hardware.h
+++ b/arch/arm/plat-mxc/include/mach/hardware.h
@@ -22,6 +22,15 @@
 
 #include <asm/sizes.h>
 
+#define IMX_IO_ADDRESS(addr, module)                                    \
+        ((void __force __iomem *)                                       \
+         (((unsigned long)((addr) - (module ## _BASE_ADDR)) < module ## _SIZE) ?\
+         (addr) - (module ## _BASE_ADDR) + (module ## _BASE_ADDR_VIRT) : 0))
+
+#ifdef CONFIG_ARCH_MX5
+#include <mach/mx51.h>
+#endif
+
 #ifdef CONFIG_ARCH_MX3
 #include <mach/mx3x.h>
 #include <mach/mx31.h>
diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx1.h b/arch/arm/plat-mxc/include/mach/iomux-mx1.h
index bf23305c19cc..6b1507cf378e 100644
--- a/arch/arm/plat-mxc/include/mach/iomux-mx1.h
+++ b/arch/arm/plat-mxc/include/mach/iomux-mx1.h
@@ -1,166 +1,155 @@
 /*
-* Copyright (C) 2008 by Sascha Hauer <kernel@pengutronix.de>
-*
-* This program is free software; you can redistribute it and/or
-* modify it under the terms of the GNU General Public License
-* as published by the Free Software Foundation; either version 2
-* of the License, or (at your option) any later version.
-* This program is distributed in the hope that it will be useful,
-* but WITHOUT ANY WARRANTY; without even the implied warranty of
-* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-* GNU General Public License for more details.
-*
-* You should have received a copy of the GNU General Public License
-* along with this program; if not, write to the Free Software
-* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
-* MA 02110-1301, USA.
-*/
+ * Copyright (C) 2008 by Sascha Hauer <kernel@pengutronix.de>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+ * MA 02110-1301, USA.
+ */
+#ifndef __MACH_IOMUX_MX1_H__
+#define __MACH_IOMUX_MX1_H__
 
-#ifndef _MXC_IOMUX_MX1_H
-#define _MXC_IOMUX_MX1_H
+#include <mach/iomux-v1.h>
 
-#ifndef GPIO_PORTA
-#error Please include mach/iomux.h
-#endif
+#define PA0_AIN_SPI2_CLK        (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 0)
+#define PA0_AF_ETMTRACESYNC     (GPIO_PORTA | GPIO_AF | 0)
+#define PA1_AOUT_SPI2_RXD       (GPIO_PORTA | GPIO_AOUT | GPIO_IN | 1)
+#define PA1_PF_TIN              (GPIO_PORTA | GPIO_PF | 1)
+#define PA2_PF_PWM0             (GPIO_PORTA | GPIO_PF | GPIO_OUT | 2)
+#define PA3_PF_CSI_MCLK         (GPIO_PORTA | GPIO_PF | 3)
+#define PA4_PF_CSI_D0           (GPIO_PORTA | GPIO_PF | 4)
+#define PA5_PF_CSI_D1           (GPIO_PORTA | GPIO_PF | 5)
+#define PA6_PF_CSI_D2           (GPIO_PORTA | GPIO_PF | 6)
+#define PA7_PF_CSI_D3           (GPIO_PORTA | GPIO_PF | 7)
+#define PA8_PF_CSI_D4           (GPIO_PORTA | GPIO_PF | 8)
+#define PA9_PF_CSI_D5           (GPIO_PORTA | GPIO_PF | 9)
+#define PA10_PF_CSI_D6          (GPIO_PORTA | GPIO_PF | 10)
+#define PA11_PF_CSI_D7          (GPIO_PORTA | GPIO_PF | 11)
+#define PA12_PF_CSI_VSYNC       (GPIO_PORTA | GPIO_PF | 12)
+#define PA13_PF_CSI_HSYNC       (GPIO_PORTA | GPIO_PF | 13)
+#define PA14_PF_CSI_PIXCLK      (GPIO_PORTA | GPIO_PF | 14)
+#define PA15_PF_I2C_SDA         (GPIO_PORTA | GPIO_PF | GPIO_OUT | 15)
+#define PA16_PF_I2C_SCL         (GPIO_PORTA | GPIO_PF | GPIO_OUT | 16)
+#define PA17_AF_ETMTRACEPKT4    (GPIO_PORTA | GPIO_AF | 17)
+#define PA17_AIN_SPI2_SS        (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 17)
+#define PA18_AF_ETMTRACEPKT5    (GPIO_PORTA | GPIO_AF | 18)
+#define PA19_AF_ETMTRACEPKT6    (GPIO_PORTA | GPIO_AF | 19)
+#define PA20_AF_ETMTRACEPKT7    (GPIO_PORTA | GPIO_AF | 20)
+#define PA21_PF_A0              (GPIO_PORTA | GPIO_PF | 21)
+#define PA22_PF_CS4             (GPIO_PORTA | GPIO_PF | 22)
+#define PA23_PF_CS5             (GPIO_PORTA | GPIO_PF | 23)
+#define PA24_PF_A16             (GPIO_PORTA | GPIO_PF | 24)
+#define PA24_AF_ETMTRACEPKT0    (GPIO_PORTA | GPIO_AF | 24)
+#define PA25_PF_A17             (GPIO_PORTA | GPIO_PF | 25)
+#define PA25_AF_ETMTRACEPKT1    (GPIO_PORTA | GPIO_AF | 25)
+#define PA26_PF_A18             (GPIO_PORTA | GPIO_PF | 26)
+#define PA26_AF_ETMTRACEPKT2    (GPIO_PORTA | GPIO_AF | 26)
+#define PA27_PF_A19             (GPIO_PORTA | GPIO_PF | 27)
+#define PA27_AF_ETMTRACEPKT3    (GPIO_PORTA | GPIO_AF | 27)
+#define PA28_PF_A20             (GPIO_PORTA | GPIO_PF | 28)
+#define PA28_AF_ETMPIPESTAT0    (GPIO_PORTA | GPIO_AF | 28)
+#define PA29_PF_A21             (GPIO_PORTA | GPIO_PF | 29)
+#define PA29_AF_ETMPIPESTAT1    (GPIO_PORTA | GPIO_AF | 29)
+#define PA30_PF_A22             (GPIO_PORTA | GPIO_PF | 30)
+#define PA30_AF_ETMPIPESTAT2    (GPIO_PORTA | GPIO_AF | 30)
+#define PA31_PF_A23             (GPIO_PORTA | GPIO_PF | 31)
+#define PA31_AF_ETMTRACECLK     (GPIO_PORTA | GPIO_AF | 31)
+#define PB8_PF_SD_DAT0          (GPIO_PORTB | GPIO_PF | GPIO_PUEN | 8)
+#define PB8_AF_MS_PIO           (GPIO_PORTB | GPIO_AF | 8)
+#define PB9_PF_SD_DAT1          (GPIO_PORTB | GPIO_PF | GPIO_PUEN | 9)
+#define PB9_AF_MS_PI1           (GPIO_PORTB | GPIO_AF | 9)
+#define PB10_PF_SD_DAT2         (GPIO_PORTB | GPIO_PF | GPIO_PUEN | 10)
+#define PB10_AF_MS_SCLKI        (GPIO_PORTB | GPIO_AF | 10)
+#define PB11_PF_SD_DAT3         (GPIO_PORTB | GPIO_PF | 11)
+#define PB11_AF_MS_SDIO         (GPIO_PORTB | GPIO_AF | 11)
+#define PB12_PF_SD_CLK          (GPIO_PORTB | GPIO_PF | 12)
+#define PB12_AF_MS_SCLK0        (GPIO_PORTB | GPIO_AF | 12)
+#define PB13_PF_SD_CMD          (GPIO_PORTB | GPIO_PF | GPIO_PUEN | 13)
+#define PB13_AF_MS_BS           (GPIO_PORTB | GPIO_AF | 13)
+#define PB14_AF_SSI_RXFS        (GPIO_PORTB | GPIO_AF | 14)
+#define PB15_AF_SSI_RXCLK       (GPIO_PORTB | GPIO_AF | 15)
+#define PB16_AF_SSI_RXDAT       (GPIO_PORTB | GPIO_AF | GPIO_IN | 16)
+#define PB17_AF_SSI_TXDAT       (GPIO_PORTB | GPIO_AF | GPIO_OUT | 17)
+#define PB18_AF_SSI_TXFS        (GPIO_PORTB | GPIO_AF | 18)
+#define PB19_AF_SSI_TXCLK       (GPIO_PORTB | GPIO_AF | 19)
+#define PB20_PF_USBD_AFE        (GPIO_PORTB | GPIO_PF | 20)
+#define PB21_PF_USBD_OE         (GPIO_PORTB | GPIO_PF | 21)
+#define PB22_PF_USBD_RCV        (GPIO_PORTB | GPIO_PF | 22)
+#define PB23_PF_USBD_SUSPND     (GPIO_PORTB | GPIO_PF | 23)
+#define PB24_PF_USBD_VP         (GPIO_PORTB | GPIO_PF | 24)
+#define PB25_PF_USBD_VM         (GPIO_PORTB | GPIO_PF | 25)
+#define PB26_PF_USBD_VPO        (GPIO_PORTB | GPIO_PF | 26)
+#define PB27_PF_USBD_VMO        (GPIO_PORTB | GPIO_PF | 27)
+#define PB28_PF_UART2_CTS       (GPIO_PORTB | GPIO_PF | GPIO_OUT | 28)
+#define PB29_PF_UART2_RTS       (GPIO_PORTB | GPIO_PF | GPIO_IN | 29)
+#define PB30_PF_UART2_TXD       (GPIO_PORTB | GPIO_PF | GPIO_OUT | 30)
+#define PB31_PF_UART2_RXD       (GPIO_PORTB | GPIO_PF | GPIO_IN | 31)
+#define PC3_PF_SSI_RXFS         (GPIO_PORTC | GPIO_PF | 3)
+#define PC4_PF_SSI_RXCLK        (GPIO_PORTC | GPIO_PF | 4)
+#define PC5_PF_SSI_RXDAT        (GPIO_PORTC | GPIO_PF | GPIO_IN | 5)
+#define PC6_PF_SSI_TXDAT        (GPIO_PORTC | GPIO_PF | GPIO_OUT | 6)
+#define PC7_PF_SSI_TXFS         (GPIO_PORTC | GPIO_PF | 7)
+#define PC8_PF_SSI_TXCLK        (GPIO_PORTC | GPIO_PF | 8)
+#define PC9_PF_UART1_CTS        (GPIO_PORTC | GPIO_PF | GPIO_OUT | 9)
+#define PC10_PF_UART1_RTS       (GPIO_PORTC | GPIO_PF | GPIO_IN | 10)
+#define PC11_PF_UART1_TXD       (GPIO_PORTC | GPIO_PF | GPIO_OUT | 11)
+#define PC12_PF_UART1_RXD       (GPIO_PORTC | GPIO_PF | GPIO_IN | 12)
+#define PC13_PF_SPI1_SPI_RDY    (GPIO_PORTC | GPIO_PF | 13)
+#define PC14_PF_SPI1_SCLK       (GPIO_PORTC | GPIO_PF | 14)
+#define PC15_PF_SPI1_SS         (GPIO_PORTC | GPIO_PF | 15)
+#define PC16_PF_SPI1_MISO       (GPIO_PORTC | GPIO_PF | 16)
+#define PC17_PF_SPI1_MOSI       (GPIO_PORTC | GPIO_PF | 17)
+#define PC24_BIN_UART3_RI       (GPIO_PORTC | GPIO_BIN | GPIO_OUT | 24)
+#define PC25_BIN_UART3_DSR      (GPIO_PORTC | GPIO_BIN | GPIO_OUT | 25)
+#define PC26_AOUT_UART3_DTR     (GPIO_PORTC | GPIO_AOUT | GPIO_IN | 26)
+#define PC27_BIN_UART3_DCD      (GPIO_PORTC | GPIO_BIN | GPIO_OUT | 27)
+#define PC28_BIN_UART3_CTS      (GPIO_PORTC | GPIO_BIN | GPIO_OUT | 28)
+#define PC29_AOUT_UART3_RTS     (GPIO_PORTC | GPIO_AOUT | GPIO_IN | 29)
+#define PC30_BIN_UART3_TX       (GPIO_PORTC | GPIO_BIN | 30)
+#define PC31_AOUT_UART3_RX      (GPIO_PORTC | GPIO_AOUT | GPIO_IN | 31)
+#define PD6_PF_LSCLK            (GPIO_PORTD | GPIO_PF | GPIO_OUT | 6)
+#define PD7_PF_REV              (GPIO_PORTD | GPIO_PF | 7)
+#define PD7_AF_UART2_DTR        (GPIO_PORTD | GPIO_AF | GPIO_IN | 7)
+#define PD7_AIN_SPI2_SCLK       (GPIO_PORTD | GPIO_AIN | 7)
+#define PD8_PF_CLS              (GPIO_PORTD | GPIO_PF | 8)
+#define PD8_AF_UART2_DCD        (GPIO_PORTD | GPIO_AF | GPIO_OUT | 8)
+#define PD8_AIN_SPI2_SS         (GPIO_PORTD | GPIO_AIN | 8)
+#define PD9_PF_PS               (GPIO_PORTD | GPIO_PF | 9)
+#define PD9_AF_UART2_RI         (GPIO_PORTD | GPIO_AF | GPIO_OUT | 9)
+#define PD9_AOUT_SPI2_RXD       (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 9)
+#define PD10_PF_SPL_SPR         (GPIO_PORTD | GPIO_PF | GPIO_OUT | 10)
+#define PD10_AF_UART2_DSR       (GPIO_PORTD | GPIO_AF | GPIO_OUT | 10)
+#define PD10_AIN_SPI2_TXD       (GPIO_PORTD | GPIO_AIN | GPIO_OUT | 10)
+#define PD11_PF_CONTRAST        (GPIO_PORTD | GPIO_PF | GPIO_OUT | 11)
+#define PD12_PF_ACD_OE          (GPIO_PORTD | GPIO_PF | GPIO_OUT | 12)
+#define PD13_PF_LP_HSYNC        (GPIO_PORTD | GPIO_PF | GPIO_OUT | 13)
+#define PD14_PF_FLM_VSYNC       (GPIO_PORTD | GPIO_PF | GPIO_OUT | 14)
+#define PD15_PF_LD0             (GPIO_PORTD | GPIO_PF | GPIO_OUT | 15)
+#define PD16_PF_LD1             (GPIO_PORTD | GPIO_PF | GPIO_OUT | 16)
+#define PD17_PF_LD2             (GPIO_PORTD | GPIO_PF | GPIO_OUT | 17)
+#define PD18_PF_LD3             (GPIO_PORTD | GPIO_PF | GPIO_OUT | 18)
+#define PD19_PF_LD4             (GPIO_PORTD | GPIO_PF | GPIO_OUT | 19)
+#define PD20_PF_LD5             (GPIO_PORTD | GPIO_PF | GPIO_OUT | 20)
+#define PD21_PF_LD6             (GPIO_PORTD | GPIO_PF | GPIO_OUT | 21)
+#define PD22_PF_LD7             (GPIO_PORTD | GPIO_PF | GPIO_OUT | 22)
+#define PD23_PF_LD8             (GPIO_PORTD | GPIO_PF | GPIO_OUT | 23)
+#define PD24_PF_LD9             (GPIO_PORTD | GPIO_PF | GPIO_OUT | 24)
+#define PD25_PF_LD10            (GPIO_PORTD | GPIO_PF | GPIO_OUT | 25)
+#define PD26_PF_LD11            (GPIO_PORTD | GPIO_PF | GPIO_OUT | 26)
+#define PD27_PF_LD12            (GPIO_PORTD | GPIO_PF | GPIO_OUT | 27)
+#define PD28_PF_LD13            (GPIO_PORTD | GPIO_PF | GPIO_OUT | 28)
+#define PD29_PF_LD14            (GPIO_PORTD | GPIO_PF | GPIO_OUT | 29)
+#define PD30_PF_LD15            (GPIO_PORTD | GPIO_PF | GPIO_OUT | 30)
+#define PD31_PF_TMR2OUT         (GPIO_PORTD | GPIO_PF | 31)
+#define PD31_BIN_SPI2_TXD       (GPIO_PORTD | GPIO_BIN | 31)
 
-/* FIXME: This list is not completed. The correct directions are
-* missing on some (many) pins
-*/
-
-
-/* Primary GPIO pin functions */
-
-#define PA0_AIN_SPI2_CLK        (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 0)
-#define PA0_AF_ETMTRACESYNC     (GPIO_PORTA | GPIO_AF | 0)
-#define PA1_AOUT_SPI2_RXD       (GPIO_PORTA | GPIO_AOUT | GPIO_IN | 1)
-#define PA1_PF_TIN              (GPIO_PORTA | GPIO_PF | 1)
-#define PA2_PF_PWM0             (GPIO_PORTA | GPIO_PF | GPIO_OUT | 2)
-#define PA3_PF_CSI_MCLK         (GPIO_PORTA | GPIO_PF | 3)
-#define PA4_PF_CSI_D0           (GPIO_PORTA | GPIO_PF | 4)
-#define PA5_PF_CSI_D1           (GPIO_PORTA | GPIO_PF | 5)
-#define PA6_PF_CSI_D2           (GPIO_PORTA | GPIO_PF | 6)
-#define PA7_PF_CSI_D3           (GPIO_PORTA | GPIO_PF | 7)
-#define PA8_PF_CSI_D4           (GPIO_PORTA | GPIO_PF | 8)
-#define PA9_PF_CSI_D5           (GPIO_PORTA | GPIO_PF | 9)
-#define PA10_PF_CSI_D6          (GPIO_PORTA | GPIO_PF | 10)
-#define PA11_PF_CSI_D7          (GPIO_PORTA | GPIO_PF | 11)
-#define PA12_PF_CSI_VSYNC       (GPIO_PORTA | GPIO_PF | 12)
-#define PA13_PF_CSI_HSYNC       (GPIO_PORTA | GPIO_PF | 13)
-#define PA14_PF_CSI_PIXCLK      (GPIO_PORTA | GPIO_PF | 14)
-#define PA15_PF_I2C_SDA         (GPIO_PORTA | GPIO_PF | GPIO_OUT | 15)
-#define PA16_PF_I2C_SCL         (GPIO_PORTA | GPIO_PF | GPIO_OUT | 16)
-#define PA17_AF_ETMTRACEPKT4    (GPIO_PORTA | GPIO_AF | 17)
-#define PA17_AIN_SPI2_SS        (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 17)
-#define PA18_AF_ETMTRACEPKT5    (GPIO_PORTA | GPIO_AF | 18)
-#define PA19_AF_ETMTRACEPKT6    (GPIO_PORTA | GPIO_AF | 19)
-#define PA20_AF_ETMTRACEPKT7    (GPIO_PORTA | GPIO_AF | 20)
-#define PA21_PF_A0              (GPIO_PORTA | GPIO_PF | 21)
-#define PA22_PF_CS4             (GPIO_PORTA | GPIO_PF | 22)
-#define PA23_PF_CS5             (GPIO_PORTA | GPIO_PF | 23)
-#define PA24_PF_A16             (GPIO_PORTA | GPIO_PF | 24)
-#define PA24_AF_ETMTRACEPKT0    (GPIO_PORTA | GPIO_AF | 24)
-#define PA25_PF_A17             (GPIO_PORTA | GPIO_PF | 25)
-#define PA25_AF_ETMTRACEPKT1    (GPIO_PORTA | GPIO_AF | 25)
-#define PA26_PF_A18             (GPIO_PORTA | GPIO_PF | 26)
-#define PA26_AF_ETMTRACEPKT2    (GPIO_PORTA | GPIO_AF | 26)
-#define PA27_PF_A19             (GPIO_PORTA | GPIO_PF | 27)
-#define PA27_AF_ETMTRACEPKT3    (GPIO_PORTA | GPIO_AF | 27)
-#define PA28_PF_A20             (GPIO_PORTA | GPIO_PF | 28)
-#define PA28_AF_ETMPIPESTAT0    (GPIO_PORTA | GPIO_AF | 28)
-#define PA29_PF_A21             (GPIO_PORTA | GPIO_PF | 29)
-#define PA29_AF_ETMPIPESTAT1    (GPIO_PORTA | GPIO_AF | 29)
-#define PA30_PF_A22             (GPIO_PORTA | GPIO_PF | 30)
-#define PA30_AF_ETMPIPESTAT2    (GPIO_PORTA | GPIO_AF | 30)
-#define PA31_PF_A23             (GPIO_PORTA | GPIO_PF | 31)
-#define PA31_AF_ETMTRACECLK     (GPIO_PORTA | GPIO_AF | 31)
-#define PB8_PF_SD_DAT0          (GPIO_PORTB | GPIO_PF | GPIO_PUEN | 8)
-#define PB8_AF_MS_PIO           (GPIO_PORTB | GPIO_AF | 8)
-#define PB9_PF_SD_DAT1          (GPIO_PORTB | GPIO_PF | GPIO_PUEN | 9)
-#define PB9_AF_MS_PI1           (GPIO_PORTB | GPIO_AF | 9)
-#define PB10_PF_SD_DAT2         (GPIO_PORTB | GPIO_PF | GPIO_PUEN | 10)
-#define PB10_AF_MS_SCLKI        (GPIO_PORTB | GPIO_AF | 10)
-#define PB11_PF_SD_DAT3         (GPIO_PORTB | GPIO_PF | 11)
-#define PB11_AF_MS_SDIO         (GPIO_PORTB | GPIO_AF | 11)
-#define PB12_PF_SD_CLK          (GPIO_PORTB | GPIO_PF | 12)
-#define PB12_AF_MS_SCLK0        (GPIO_PORTB | GPIO_AF | 12)
-#define PB13_PF_SD_CMD          (GPIO_PORTB | GPIO_PF | GPIO_PUEN | 13)
-#define PB13_AF_MS_BS           (GPIO_PORTB | GPIO_AF | 13)
-#define PB14_AF_SSI_RXFS        (GPIO_PORTB | GPIO_AF | 14)
-#define PB15_AF_SSI_RXCLK       (GPIO_PORTB | GPIO_AF | 15)
-#define PB16_AF_SSI_RXDAT       (GPIO_PORTB | GPIO_AF | GPIO_IN | 16)
-#define PB17_AF_SSI_TXDAT       (GPIO_PORTB | GPIO_AF | GPIO_OUT | 17)
-#define PB18_AF_SSI_TXFS        (GPIO_PORTB | GPIO_AF | 18)
-#define PB19_AF_SSI_TXCLK       (GPIO_PORTB | GPIO_AF | 19)
-#define PB20_PF_USBD_AFE        (GPIO_PORTB | GPIO_PF | 20)
-#define PB21_PF_USBD_OE         (GPIO_PORTB | GPIO_PF | 21)
-#define PB22_PF_USBD_RCV        (GPIO_PORTB | GPIO_PF | 22)
-#define PB23_PF_USBD_SUSPND     (GPIO_PORTB | GPIO_PF | 23)
-#define PB24_PF_USBD_VP         (GPIO_PORTB | GPIO_PF | 24)
-#define PB25_PF_USBD_VM         (GPIO_PORTB | GPIO_PF | 25)
-#define PB26_PF_USBD_VPO        (GPIO_PORTB | GPIO_PF | 26)
-#define PB27_PF_USBD_VMO        (GPIO_PORTB | GPIO_PF | 27)
-#define PB28_PF_UART2_CTS       (GPIO_PORTB | GPIO_PF | GPIO_OUT | 28)
-#define PB29_PF_UART2_RTS       (GPIO_PORTB | GPIO_PF | GPIO_IN | 29)
-#define PB30_PF_UART2_TXD       (GPIO_PORTB | GPIO_PF | GPIO_OUT | 30)
-#define PB31_PF_UART2_RXD       (GPIO_PORTB | GPIO_PF | GPIO_IN | 31)
-#define PC3_PF_SSI_RXFS         (GPIO_PORTC | GPIO_PF | 3)
-#define PC4_PF_SSI_RXCLK        (GPIO_PORTC | GPIO_PF | 4)
-#define PC5_PF_SSI_RXDAT        (GPIO_PORTC | GPIO_PF | GPIO_IN | 5)
-#define PC6_PF_SSI_TXDAT        (GPIO_PORTC | GPIO_PF | GPIO_OUT | 6)
-#define PC7_PF_SSI_TXFS         (GPIO_PORTC | GPIO_PF | 7)
-#define PC8_PF_SSI_TXCLK        (GPIO_PORTC | GPIO_PF | 8)
-#define PC9_PF_UART1_CTS        (GPIO_PORTC | GPIO_PF | GPIO_OUT | 9)
-#define PC10_PF_UART1_RTS       (GPIO_PORTC | GPIO_PF | GPIO_IN | 10)
-#define PC11_PF_UART1_TXD       (GPIO_PORTC | GPIO_PF | GPIO_OUT | 11)
-#define PC12_PF_UART1_RXD       (GPIO_PORTC | GPIO_PF | GPIO_IN | 12)
-#define PC13_PF_SPI1_SPI_RDY    (GPIO_PORTC | GPIO_PF | 13)
-#define PC14_PF_SPI1_SCLK       (GPIO_PORTC | GPIO_PF | 14)
-#define PC15_PF_SPI1_SS         (GPIO_PORTC | GPIO_PF | 15)
-#define PC16_PF_SPI1_MISO       (GPIO_PORTC | GPIO_PF | 16)
-#define PC17_PF_SPI1_MOSI       (GPIO_PORTC | GPIO_PF | 17)
-#define PC24_BIN_UART3_RI       (GPIO_PORTC | GPIO_BIN | GPIO_OUT | 24)
-#define PC25_BIN_UART3_DSR      (GPIO_PORTC | GPIO_BIN | GPIO_OUT | 25)
-#define PC26_AOUT_UART3_DTR     (GPIO_PORTC | GPIO_AOUT | GPIO_IN | 26)
-#define PC27_BIN_UART3_DCD      (GPIO_PORTC | GPIO_BIN | GPIO_OUT | 27)
-#define PC28_BIN_UART3_CTS      (GPIO_PORTC | GPIO_BIN | GPIO_OUT | 28)
-#define PC29_AOUT_UART3_RTS     (GPIO_PORTC | GPIO_AOUT | GPIO_IN | 29)
-#define PC30_BIN_UART3_TX       (GPIO_PORTC | GPIO_BIN | 30)
-#define PC31_AOUT_UART3_RX      (GPIO_PORTC | GPIO_AOUT | GPIO_IN | 31)
-#define PD6_PF_LSCLK            (GPIO_PORTD | GPIO_PF | GPIO_OUT | 6)
-#define PD7_PF_REV              (GPIO_PORTD | GPIO_PF | 7)
-#define PD7_AF_UART2_DTR        (GPIO_PORTD | GPIO_AF | GPIO_IN | 7)
-#define PD7_AIN_SPI2_SCLK       (GPIO_PORTD | GPIO_AIN | 7)
-#define PD8_PF_CLS              (GPIO_PORTD | GPIO_PF | 8)
-#define PD8_AF_UART2_DCD        (GPIO_PORTD | GPIO_AF | GPIO_OUT | 8)
-#define PD8_AIN_SPI2_SS         (GPIO_PORTD | GPIO_AIN | 8)
-#define PD9_PF_PS               (GPIO_PORTD | GPIO_PF | 9)
-#define PD9_AF_UART2_RI         (GPIO_PORTD | GPIO_AF | GPIO_OUT | 9)
-#define PD9_AOUT_SPI2_RXD       (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 9)
-#define PD10_PF_SPL_SPR         (GPIO_PORTD | GPIO_PF | GPIO_OUT | 10)
-#define PD10_AF_UART2_DSR       (GPIO_PORTD | GPIO_AF | GPIO_OUT | 10)
-#define PD10_AIN_SPI2_TXD       (GPIO_PORTD | GPIO_AIN | GPIO_OUT | 10)
-#define PD11_PF_CONTRAST        (GPIO_PORTD | GPIO_PF | GPIO_OUT | 11)
-#define PD12_PF_ACD_OE          (GPIO_PORTD | GPIO_PF | GPIO_OUT | 12)
-#define PD13_PF_LP_HSYNC        (GPIO_PORTD | GPIO_PF | GPIO_OUT | 13)
-#define PD14_PF_FLM_VSYNC       (GPIO_PORTD | GPIO_PF | GPIO_OUT | 14)
-#define PD15_PF_LD0             (GPIO_PORTD | GPIO_PF | GPIO_OUT | 15)
-#define PD16_PF_LD1             (GPIO_PORTD | GPIO_PF | GPIO_OUT | 16)
-#define PD17_PF_LD2             (GPIO_PORTD | GPIO_PF | GPIO_OUT | 17)
-#define PD18_PF_LD3             (GPIO_PORTD | GPIO_PF | GPIO_OUT | 18)
-#define PD19_PF_LD4             (GPIO_PORTD | GPIO_PF | GPIO_OUT | 19)
-#define PD20_PF_LD5             (GPIO_PORTD | GPIO_PF | GPIO_OUT | 20)
-#define PD21_PF_LD6             (GPIO_PORTD | GPIO_PF | GPIO_OUT | 21)
-#define PD22_PF_LD7             (GPIO_PORTD | GPIO_PF | GPIO_OUT | 22)
-#define PD23_PF_LD8             (GPIO_PORTD | GPIO_PF | GPIO_OUT | 23)
-#define PD24_PF_LD9             (GPIO_PORTD | GPIO_PF | GPIO_OUT | 24)
-#define PD25_PF_LD10            (GPIO_PORTD | GPIO_PF | GPIO_OUT | 25)
-#define PD26_PF_LD11            (GPIO_PORTD | GPIO_PF | GPIO_OUT | 26)
-#define PD27_PF_LD12            (GPIO_PORTD | GPIO_PF | GPIO_OUT | 27)
-#define PD28_PF_LD13            (GPIO_PORTD | GPIO_PF | GPIO_OUT | 28)
-#define PD29_PF_LD14            (GPIO_PORTD | GPIO_PF | GPIO_OUT | 29)
-#define PD30_PF_LD15            (GPIO_PORTD | GPIO_PF | GPIO_OUT | 30)
-#define PD31_PF_TMR2OUT         (GPIO_PORTD | GPIO_PF | 31)
-#define PD31_BIN_SPI2_TXD       (GPIO_PORTD | GPIO_BIN | 31)
-
-
-#endif
+#endif /* ifndef __MACH_IOMUX_MX1_H__ */
diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx21.h b/arch/arm/plat-mxc/include/mach/iomux-mx21.h
index 63aaa972e275..1495dfda7834 100644
--- a/arch/arm/plat-mxc/include/mach/iomux-mx21.h
+++ b/arch/arm/plat-mxc/include/mach/iomux-mx21.h
@@ -1,126 +1,122 @@
 /*
-* Copyright (C) 2009 by Holger Schurig <hs4233@mail.mn-solutions.de>
-*
-* This program is free software; you can redistribute it and/or
-* modify it under the terms of the GNU General Public License
-* as published by the Free Software Foundation; either version 2
-* of the License, or (at your option) any later version.
-* This program is distributed in the hope that it will be useful,
-* but WITHOUT ANY WARRANTY; without even the implied warranty of
-* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-* GNU General Public License for more details.
-*
-* You should have received a copy of the GNU General Public License
-* along with this program; if not, write to the Free Software
-* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
-* MA 02110-1301, USA.
-*/
-
-#ifndef _MXC_IOMUX_MX21_H
-#define _MXC_IOMUX_MX21_H
-
-#ifndef GPIO_PORTA
-#error Please include mach/iomux.h
-#endif
-
+ * Copyright (C) 2009 by Holger Schurig <hs4233@mail.mn-solutions.de>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+ * MA 02110-1301, USA.
+ */
+#ifndef __MACH_IOMUX_MX21_H__
+#define __MACH_IOMUX_MX21_H__
+
+#include <mach/iomux-mx2x.h>
+#include <mach/iomux-v1.h>
 
 /* Primary GPIO pin functions */
 
-#define PB22_PF_USBH1_BYP       (GPIO_PORTB | GPIO_PF | 22)
-#define PB25_PF_USBH1_ON        (GPIO_PORTB | GPIO_PF | 25)
-#define PC5_PF_USBOTG_SDA       (GPIO_PORTC | GPIO_PF | 5)
-#define PC6_PF_USBOTG_SCL       (GPIO_PORTC | GPIO_PF | 6)
-#define PC7_PF_USBOTG_ON        (GPIO_PORTC | GPIO_PF | 7)
-#define PC8_PF_USBOTG_FS        (GPIO_PORTC | GPIO_PF | 8)
-#define PC9_PF_USBOTG_OE        (GPIO_PORTC | GPIO_PF | 9)
-#define PC10_PF_USBOTG_TXDM     (GPIO_PORTC | GPIO_PF | 10)
-#define PC11_PF_USBOTG_TXDP     (GPIO_PORTC | GPIO_PF | 11)
-#define PC12_PF_USBOTG_RXDM     (GPIO_PORTC | GPIO_PF | 12)
-#define PC13_PF_USBOTG_RXDP     (GPIO_PORTC | GPIO_PF | 13)
-#define PC16_PF_SAP_FS          (GPIO_PORTC | GPIO_PF | 16)
-#define PC17_PF_SAP_RXD         (GPIO_PORTC | GPIO_PF | 17)
-#define PC18_PF_SAP_TXD         (GPIO_PORTC | GPIO_PF | 18)
-#define PC19_PF_SAP_CLK         (GPIO_PORTC | GPIO_PF | 19)
-#define PE0_PF_TEST_WB2         (GPIO_PORTE | GPIO_PF | 0)
-#define PE1_PF_TEST_WB1         (GPIO_PORTE | GPIO_PF | 1)
-#define PE2_PF_TEST_WB0         (GPIO_PORTE | GPIO_PF | 2)
-#define PF1_PF_NFCE             (GPIO_PORTF | GPIO_PF | 1)
-#define PF3_PF_NFCLE            (GPIO_PORTF | GPIO_PF | 3)
-#define PF7_PF_NFIO0            (GPIO_PORTF | GPIO_PF | 7)
-#define PF8_PF_NFIO1            (GPIO_PORTF | GPIO_PF | 8)
-#define PF9_PF_NFIO2            (GPIO_PORTF | GPIO_PF | 9)
-#define PF10_PF_NFIO3           (GPIO_PORTF | GPIO_PF | 10)
-#define PF11_PF_NFIO4           (GPIO_PORTF | GPIO_PF | 11)
-#define PF12_PF_NFIO5           (GPIO_PORTF | GPIO_PF | 12)
-#define PF13_PF_NFIO6           (GPIO_PORTF | GPIO_PF | 13)
-#define PF14_PF_NFIO7           (GPIO_PORTF | GPIO_PF | 14)
-#define PF16_PF_RES             (GPIO_PORTF | GPIO_PF | 16)
+#define PB22_PF_USBH1_BYP       (GPIO_PORTB | GPIO_PF | 22)
+#define PB25_PF_USBH1_ON        (GPIO_PORTB | GPIO_PF | 25)
+#define PC5_PF_USBOTG_SDA       (GPIO_PORTC | GPIO_PF | 5)
+#define PC6_PF_USBOTG_SCL       (GPIO_PORTC | GPIO_PF | 6)
+#define PC7_PF_USBOTG_ON        (GPIO_PORTC | GPIO_PF | 7)
+#define PC8_PF_USBOTG_FS        (GPIO_PORTC | GPIO_PF | 8)
+#define PC9_PF_USBOTG_OE        (GPIO_PORTC | GPIO_PF | 9)
+#define PC10_PF_USBOTG_TXDM     (GPIO_PORTC | GPIO_PF | 10)
+#define PC11_PF_USBOTG_TXDP     (GPIO_PORTC | GPIO_PF | 11)
+#define PC12_PF_USBOTG_RXDM     (GPIO_PORTC | GPIO_PF | 12)
+#define PC13_PF_USBOTG_RXDP     (GPIO_PORTC | GPIO_PF | 13)
+#define PC16_PF_SAP_FS          (GPIO_PORTC | GPIO_PF | 16)
+#define PC17_PF_SAP_RXD         (GPIO_PORTC | GPIO_PF | 17)
+#define PC18_PF_SAP_TXD         (GPIO_PORTC | GPIO_PF | 18)
+#define PC19_PF_SAP_CLK         (GPIO_PORTC | GPIO_PF | 19)
+#define PE0_PF_TEST_WB2         (GPIO_PORTE | GPIO_PF | 0)
+#define PE1_PF_TEST_WB1         (GPIO_PORTE | GPIO_PF | 1)
+#define PE2_PF_TEST_WB0         (GPIO_PORTE | GPIO_PF | 2)
+#define PF1_PF_NFCE             (GPIO_PORTF | GPIO_PF | 1)
+#define PF3_PF_NFCLE            (GPIO_PORTF | GPIO_PF | 3)
+#define PF7_PF_NFIO0            (GPIO_PORTF | GPIO_PF | 7)
+#define PF8_PF_NFIO1            (GPIO_PORTF | GPIO_PF | 8)
+#define PF9_PF_NFIO2            (GPIO_PORTF | GPIO_PF | 9)
+#define PF10_PF_NFIO3           (GPIO_PORTF | GPIO_PF | 10)
+#define PF11_PF_NFIO4           (GPIO_PORTF | GPIO_PF | 11)
+#define PF12_PF_NFIO5           (GPIO_PORTF | GPIO_PF | 12)
+#define PF13_PF_NFIO6           (GPIO_PORTF | GPIO_PF | 13)
+#define PF14_PF_NFIO7           (GPIO_PORTF | GPIO_PF | 14)
+#define PF16_PF_RES             (GPIO_PORTF | GPIO_PF | 16)
 
 /* Alternate GPIO pin functions */
 
-#define PA5_AF_BMI_CLK_CS       (GPIO_PORTA | GPIO_AF | 5)
-#define PA6_AF_BMI_D0           (GPIO_PORTA | GPIO_AF | 6)
-#define PA7_AF_BMI_D1           (GPIO_PORTA | GPIO_AF | 7)
-#define PA8_AF_BMI_D2           (GPIO_PORTA | GPIO_AF | 8)
-#define PA9_AF_BMI_D3           (GPIO_PORTA | GPIO_AF | 9)
-#define PA10_AF_BMI_D4          (GPIO_PORTA | GPIO_AF | 10)
-#define PA11_AF_BMI_D5          (GPIO_PORTA | GPIO_AF | 11)
-#define PA12_AF_BMI_D6          (GPIO_PORTA | GPIO_AF | 12)
-#define PA13_AF_BMI_D7          (GPIO_PORTA | GPIO_AF | 13)
-#define PA14_AF_BMI_D8          (GPIO_PORTA | GPIO_AF | 14)
-#define PA15_AF_BMI_D9          (GPIO_PORTA | GPIO_AF | 15)
-#define PA16_AF_BMI_D10         (GPIO_PORTA | GPIO_AF | 16)
-#define PA17_AF_BMI_D11         (GPIO_PORTA | GPIO_AF | 17)
-#define PA18_AF_BMI_D12         (GPIO_PORTA | GPIO_AF | 18)
-#define PA19_AF_BMI_D13         (GPIO_PORTA | GPIO_AF | 19)
-#define PA20_AF_BMI_D14         (GPIO_PORTA | GPIO_AF | 20)
-#define PA21_AF_BMI_D15         (GPIO_PORTA | GPIO_AF | 21)
-#define PA22_AF_BMI_READ_REQ    (GPIO_PORTA | GPIO_AF | 22)
-#define PA23_AF_BMI_WRITE       (GPIO_PORTA | GPIO_AF | 23)
-#define PA29_AF_BMI_RX_FULL     (GPIO_PORTA | GPIO_AF | 29)
-#define PA30_AF_BMI_READ        (GPIO_PORTA | GPIO_AF | 30)
+#define PA5_AF_BMI_CLK_CS       (GPIO_PORTA | GPIO_AF | 5)
+#define PA6_AF_BMI_D0           (GPIO_PORTA | GPIO_AF | 6)
+#define PA7_AF_BMI_D1           (GPIO_PORTA | GPIO_AF | 7)
+#define PA8_AF_BMI_D2           (GPIO_PORTA | GPIO_AF | 8)
+#define PA9_AF_BMI_D3           (GPIO_PORTA | GPIO_AF | 9)
+#define PA10_AF_BMI_D4          (GPIO_PORTA | GPIO_AF | 10)
+#define PA11_AF_BMI_D5          (GPIO_PORTA | GPIO_AF | 11)
+#define PA12_AF_BMI_D6          (GPIO_PORTA | GPIO_AF | 12)
+#define PA13_AF_BMI_D7          (GPIO_PORTA | GPIO_AF | 13)
+#define PA14_AF_BMI_D8          (GPIO_PORTA | GPIO_AF | 14)
+#define PA15_AF_BMI_D9          (GPIO_PORTA | GPIO_AF | 15)
+#define PA16_AF_BMI_D10         (GPIO_PORTA | GPIO_AF | 16)
+#define PA17_AF_BMI_D11         (GPIO_PORTA | GPIO_AF | 17)
+#define PA18_AF_BMI_D12         (GPIO_PORTA | GPIO_AF | 18)
+#define PA19_AF_BMI_D13         (GPIO_PORTA | GPIO_AF | 19)
+#define PA20_AF_BMI_D14         (GPIO_PORTA | GPIO_AF | 20)
+#define PA21_AF_BMI_D15         (GPIO_PORTA | GPIO_AF | 21)
+#define PA22_AF_BMI_READ_REQ    (GPIO_PORTA | GPIO_AF | 22)
+#define PA23_AF_BMI_WRITE       (GPIO_PORTA | GPIO_AF | 23)
+#define PA29_AF_BMI_RX_FULL     (GPIO_PORTA | GPIO_AF | 29)
+#define PA30_AF_BMI_READ        (GPIO_PORTA | GPIO_AF | 30)
 
 /* AIN GPIO pin functions */
 
-#define PC14_AIN_SYS_CLK        (GPIO_PORTC | GPIO_AIN | GPIO_OUT | 14)
-#define PD21_AIN_USBH2_FS       (GPIO_PORTD | GPIO_AIN | GPIO_OUT | 21)
-#define PD22_AIN_USBH2_OE       (GPIO_PORTD | GPIO_AIN | GPIO_OUT | 22)
-#define PD23_AIN_USBH2_TXDM     (GPIO_PORTD | GPIO_AIN | GPIO_OUT | 23)
-#define PD24_AIN_USBH2_TXDP     (GPIO_PORTD | GPIO_AIN | GPIO_OUT | 24)
-#define PE8_AIN_IR_TXD          (GPIO_PORTE | GPIO_AIN | GPIO_OUT | 8)
-#define PF0_AIN_PC_RST          (GPIO_PORTF | GPIO_AIN | GPIO_OUT | 0)
-#define PF1_AIN_PC_CE1          (GPIO_PORTF | GPIO_AIN | GPIO_OUT | 1)
-#define PF2_AIN_PC_CE2          (GPIO_PORTF | GPIO_AIN | GPIO_OUT | 2)
-#define PF3_AIN_PC_POE          (GPIO_PORTF | GPIO_AIN | GPIO_OUT | 3)
-#define PF4_AIN_PC_OE           (GPIO_PORTF | GPIO_AIN | GPIO_OUT | 4)
-#define PF5_AIN_PC_RW           (GPIO_PORTF | GPIO_AIN | GPIO_OUT | 5)
+#define PC14_AIN_SYS_CLK        (GPIO_PORTC | GPIO_AIN | GPIO_OUT | 14)
+#define PD21_AIN_USBH2_FS       (GPIO_PORTD | GPIO_AIN | GPIO_OUT | 21)
+#define PD22_AIN_USBH2_OE       (GPIO_PORTD | GPIO_AIN | GPIO_OUT | 22)
+#define PD23_AIN_USBH2_TXDM     (GPIO_PORTD | GPIO_AIN | GPIO_OUT | 23)
+#define PD24_AIN_USBH2_TXDP     (GPIO_PORTD | GPIO_AIN | GPIO_OUT | 24)
+#define PE8_AIN_IR_TXD          (GPIO_PORTE | GPIO_AIN | GPIO_OUT | 8)
+#define PF0_AIN_PC_RST          (GPIO_PORTF | GPIO_AIN | GPIO_OUT | 0)
+#define PF1_AIN_PC_CE1          (GPIO_PORTF | GPIO_AIN | GPIO_OUT | 1)
+#define PF2_AIN_PC_CE2          (GPIO_PORTF | GPIO_AIN | GPIO_OUT | 2)
+#define PF3_AIN_PC_POE          (GPIO_PORTF | GPIO_AIN | GPIO_OUT | 3)
+#define PF4_AIN_PC_OE           (GPIO_PORTF | GPIO_AIN | GPIO_OUT | 4)
+#define PF5_AIN_PC_RW           (GPIO_PORTF | GPIO_AIN | GPIO_OUT | 5)
 
 /* BIN GPIO pin functions */
 
-#define PC14_BIN_SYS_CLK        (GPIO_PORTC | GPIO_BIN | GPIO_OUT | 14)
-#define PD27_BIN_EXT_DMA_GRANT  (GPIO_PORTD | GPIO_BIN | GPIO_OUT | 27)
+#define PC14_BIN_SYS_CLK        (GPIO_PORTC | GPIO_BIN | GPIO_OUT | 14)
+#define PD27_BIN_EXT_DMA_GRANT  (GPIO_PORTD | GPIO_BIN | GPIO_OUT | 27)
 
 /* CIN GPIO pin functions */
 
-#define PB26_CIN_USBH1_RXDAT    (GPIO_PORTB | GPIO_CIN | GPIO_OUT | 26)
+#define PB26_CIN_USBH1_RXDAT    (GPIO_PORTB | GPIO_CIN | GPIO_OUT | 26)
 
 /* AOUT GPIO pin functions */
 
-#define PA29_AOUT_BMI_WAIT      (GPIO_PORTA | GPIO_AOUT | GPIO_IN | 29)
-#define PD19_AOUT_USBH2_RXDM    (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 19)
-#define PD20_AOUT_USBH2_RXDP    (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 20)
-#define PD25_AOUT_EXT_DMAREQ    (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 25)
-#define PD26_AOUT_USBOTG_RXDAT  (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 26)
-#define PE9_AOUT_IR_RXD         (GPIO_PORTE | GPIO_AOUT | GPIO_IN | 9)
-#define PF6_AOUT_PC_BVD2        (GPIO_PORTF | GPIO_AOUT | GPIO_IN | 6)
-#define PF7_AOUT_PC_BVD1        (GPIO_PORTF | GPIO_AOUT | GPIO_IN | 7)
-#define PF8_AOUT_PC_VS2         (GPIO_PORTF | GPIO_AOUT | GPIO_IN | 8)
-#define PF9_AOUT_PC_VS1         (GPIO_PORTF | GPIO_AOUT | GPIO_IN | 9)
-#define PF10_AOUT_PC_WP         (GPIO_PORTF | GPIO_AOUT | GPIO_IN | 10)
-#define PF11_AOUT_PC_READY      (GPIO_PORTF | GPIO_AOUT | GPIO_IN | 11)
-#define PF12_AOUT_PC_WAIT       (GPIO_PORTF | GPIO_AOUT | GPIO_IN | 12)
-#define PF13_AOUT_PC_CD2        (GPIO_PORTF | GPIO_AOUT | GPIO_IN | 13)
-#define PF14_AOUT_PC_CD1        (GPIO_PORTF | GPIO_AOUT | GPIO_IN | 14)
-
-
-#endif
+#define PA29_AOUT_BMI_WAIT      (GPIO_PORTA | GPIO_AOUT | GPIO_IN | 29)
+#define PD19_AOUT_USBH2_RXDM    (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 19)
+#define PD20_AOUT_USBH2_RXDP    (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 20)
+#define PD25_AOUT_EXT_DMAREQ    (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 25)
+#define PD26_AOUT_USBOTG_RXDAT  (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 26)
+#define PE9_AOUT_IR_RXD         (GPIO_PORTE | GPIO_AOUT | GPIO_IN | 9)
+#define PF6_AOUT_PC_BVD2        (GPIO_PORTF | GPIO_AOUT | GPIO_IN | 6)
+#define PF7_AOUT_PC_BVD1        (GPIO_PORTF | GPIO_AOUT | GPIO_IN | 7)
+#define PF8_AOUT_PC_VS2         (GPIO_PORTF | GPIO_AOUT | GPIO_IN | 8)
+#define PF9_AOUT_PC_VS1         (GPIO_PORTF | GPIO_AOUT | GPIO_IN | 9)
+#define PF10_AOUT_PC_WP         (GPIO_PORTF | GPIO_AOUT | GPIO_IN | 10)
+#define PF11_AOUT_PC_READY      (GPIO_PORTF | GPIO_AOUT | GPIO_IN | 11)
+#define PF12_AOUT_PC_WAIT       (GPIO_PORTF | GPIO_AOUT | GPIO_IN | 12)
+#define PF13_AOUT_PC_CD2        (GPIO_PORTF | GPIO_AOUT | GPIO_IN | 13)
+#define PF14_AOUT_PC_CD1        (GPIO_PORTF | GPIO_AOUT | GPIO_IN | 14)
+
+#endif /* ifndef __MACH_IOMUX_MX21_H__ */
diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx25.h b/arch/arm/plat-mxc/include/mach/iomux-mx25.h
index 9af494f0ab3d..f39220d1b67a 100644
--- a/arch/arm/plat-mxc/include/mach/iomux-mx25.h
+++ b/arch/arm/plat-mxc/include/mach/iomux-mx25.h
@@ -7,7 +7,7 @@
  *    Copyright 2008 Freescale Semiconductor, Inc. All Rights Reserved.
  * and
  * arch/arm/plat-mxc/include/mach/iomux-mx35.h
- *    Copyright (C, NO_PAD_CTRL) 2009 by Jan Weitzel Phytec Messtechnik GmbH <armlinux@phytec.de>
+ *    Copyright (C) 2009 by Jan Weitzel Phytec Messtechnik GmbH <armlinux@phytec.de>
  *
  * The code contained herein is licensed under the GNU General Public
  * License. You may obtain a copy of the GNU General Public License
@@ -16,24 +16,11 @@
  * http://www.opensource.org/licenses/gpl-license.html
  * http://www.gnu.org/copyleft/gpl.html
  */
-#ifndef __IOMUX_MX25_H__
-#define __IOMUX_MX25_H__
+#ifndef __MACH_IOMUX_MX25_H__
+#define __MACH_IOMUX_MX25_H__
 
 #include <mach/iomux-v3.h>
 
-#ifndef GPIO_PORTA
-#error Please include mach/iomux.h
-#endif
-
-/*
- *
- * @brief MX25 I/O Pin List
- *
- * @ingroup GPIO_MX25
- */
-
-#ifndef __ASSEMBLY__
-
 /*
  * IOMUX/PAD Bit field definitions
  */
@@ -462,9 +449,11 @@
 #define MX25_PAD_GPIO_C__CAN2_TX        IOMUX_PAD(0x3f8, 0x1fc, 0x16, 0, 0, PAD_CTL_PUS_22K_UP)
 
 #define MX25_PAD_GPIO_D__GPIO_D         IOMUX_PAD(0x3fc, 0x200, 0x10, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_GPIO_E__LD16           IOMUX_PAD(0x400, 0x204, 0x02, 0, 0, NO_PAD_CTRL)
 #define MX25_PAD_GPIO_D__CAN2_RX        IOMUX_PAD(0x3fc, 0x200, 0x16, 0x484, 1, PAD_CTL_PUS_22K_UP)
 
 #define MX25_PAD_GPIO_E__GPIO_E         IOMUX_PAD(0x400, 0x204, 0x10, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_GPIO_F__LD17           IOMUX_PAD(0x404, 0x208, 0x02, 0, 0, NO_PAD_CTRL)
 #define MX25_PAD_GPIO_E__AUD7_TXD       IOMUX_PAD(0x400, 0x204, 0x14, 0, 0, NO_PAD_CTRL)
 
 #define MX25_PAD_GPIO_F__GPIO_F         IOMUX_PAD(0x404, 0x208, 0x10, 0, 0, NO_PAD_CTRL)
@@ -513,5 +502,4 @@
 #define MX25_PAD_CTL_GRP_DVS_SDHC1      IOMUX_PAD(0x458, 0x000, 0, 0, 0, NO_PAD_CTRL)
 #define MX25_PAD_CTL_GRP_DVS_LCD        IOMUX_PAD(0x45c, 0x000, 0, 0, 0, NO_PAD_CTRL)
 
-#endif // __ASSEMBLY__
-#endif // __IOMUX_MX25_H__
+#endif /* __MACH_IOMUX_MX25_H__ */
diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx27.h b/arch/arm/plat-mxc/include/mach/iomux-mx27.h
index 5ac158b70f61..d9f9a6e32d80 100644
--- a/arch/arm/plat-mxc/include/mach/iomux-mx27.h
+++ b/arch/arm/plat-mxc/include/mach/iomux-mx27.h
@@ -1,207 +1,205 @@
 /*
-* Copyright (C) 2008 by Sascha Hauer <kernel@pengutronix.de>
-* Copyright (C) 2009 by Holger Schurig <hs4233@mail.mn-solutions.de>
-*
-* This program is free software; you can redistribute it and/or
-* modify it under the terms of the GNU General Public License
-* as published by the Free Software Foundation; either version 2
-* of the License, or (at your option) any later version.
-* This program is distributed in the hope that it will be useful,
-* but WITHOUT ANY WARRANTY; without even the implied warranty of
-* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-* GNU General Public License for more details.
-*
-* You should have received a copy of the GNU General Public License
-* along with this program; if not, write to the Free Software
-* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
-* MA 02110-1301, USA.
-*/
-
-#ifndef _MXC_IOMUX_MX27_H
-#define _MXC_IOMUX_MX27_H
-
-#ifndef GPIO_PORTA
-#error Please include mach/iomux.h
-#endif
-
+ * Copyright (C) 2008 by Sascha Hauer <kernel@pengutronix.de>
+ * Copyright (C) 2009 by Holger Schurig <hs4233@mail.mn-solutions.de>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+ * MA 02110-1301, USA.
+ */
+#ifndef __MACH_IOMUX_MX27_H__
+#define __MACH_IOMUX_MX27_H__
+
+#include <mach/iomux-mx2x.h>
+#include <mach/iomux-v1.h>
 
 /* Primary GPIO pin functions */
 
-#define PA0_PF_USBH2_CLK        (GPIO_PORTA | GPIO_PF | 0)
-#define PA1_PF_USBH2_DIR        (GPIO_PORTA | GPIO_PF | 1)
-#define PA2_PF_USBH2_DATA7      (GPIO_PORTA | GPIO_PF | 2)
-#define PA3_PF_USBH2_NXT        (GPIO_PORTA | GPIO_PF | 3)
-#define PA4_PF_USBH2_STP        (GPIO_PORTA | GPIO_PF | 4)
-#define PB22_PF_USBH1_SUSP      (GPIO_PORTB | GPIO_PF | 22)
-#define PB25_PF_USBH1_RCV       (GPIO_PORTB | GPIO_PF | 25)
-#define PC5_PF_I2C2_SDA         (GPIO_PORTC | GPIO_PF | GPIO_IN | 5)
-#define PC6_PF_I2C2_SCL         (GPIO_PORTC | GPIO_PF | GPIO_IN | 6)
-#define PC7_PF_USBOTG_DATA5     (GPIO_PORTC | GPIO_PF | GPIO_OUT | 7)
-#define PC8_PF_USBOTG_DATA6     (GPIO_PORTC | GPIO_PF | GPIO_OUT | 8)
-#define PC9_PF_USBOTG_DATA0     (GPIO_PORTC | GPIO_PF | GPIO_OUT | 9)
-#define PC10_PF_USBOTG_DATA2    (GPIO_PORTC | GPIO_PF | GPIO_OUT | 10)
-#define PC11_PF_USBOTG_DATA1    (GPIO_PORTC | GPIO_PF | GPIO_OUT | 11)
-#define PC12_PF_USBOTG_DATA4    (GPIO_PORTC | GPIO_PF | GPIO_OUT | 12)
-#define PC13_PF_USBOTG_DATA3    (GPIO_PORTC | GPIO_PF | GPIO_OUT | 13)
-#define PC16_PF_SSI4_FS         (GPIO_PORTC | GPIO_PF | GPIO_IN | 16)
-#define PC17_PF_SSI4_RXD        (GPIO_PORTC | GPIO_PF | GPIO_IN | 17)
-#define PC18_PF_SSI4_TXD        (GPIO_PORTC | GPIO_PF | GPIO_IN | 18)
-#define PC19_PF_SSI4_CLK        (GPIO_PORTC | GPIO_PF | GPIO_IN | 19)
-#define PC25_AF_GPT5_TIN        (GPIO_PORTC | GPIO_AF | 25)
-#define PC27_AF_GPT4_TIN        (GPIO_PORTC | GPIO_AF | 27)
-#define PD0_PF_SD3_CMD          (GPIO_PORTD | GPIO_PF | 0)
-#define PD1_PF_SD3_CLK          (GPIO_PORTD | GPIO_PF | 1)
-#define PD2_PF_ATA_DATA0        (GPIO_PORTD | GPIO_PF | 2)
-#define PD3_PF_ATA_DATA1        (GPIO_PORTD | GPIO_PF | 3)
-#define PD4_PF_ATA_DATA2        (GPIO_PORTD | GPIO_PF | 4)
-#define PD5_PF_ATA_DATA3        (GPIO_PORTD | GPIO_PF | 5)
-#define PD6_PF_ATA_DATA4        (GPIO_PORTD | GPIO_PF | 6)
-#define PD7_PF_ATA_DATA5        (GPIO_PORTD | GPIO_PF | 7)
-#define PD8_PF_ATA_DATA6        (GPIO_PORTD | GPIO_PF | 8)
-#define PD9_PF_ATA_DATA7        (GPIO_PORTD | GPIO_PF | 9)
-#define PD10_PF_ATA_DATA8       (GPIO_PORTD | GPIO_PF | 10)
-#define PD11_PF_ATA_DATA9       (GPIO_PORTD | GPIO_PF | 11)
-#define PD12_PF_ATA_DATA10      (GPIO_PORTD | GPIO_PF | 12)
-#define PD13_PF_ATA_DATA11      (GPIO_PORTD | GPIO_PF | 13)
-#define PD14_PF_ATA_DATA12      (GPIO_PORTD | GPIO_PF | 14)
-#define PD15_PF_ATA_DATA13      (GPIO_PORTD | GPIO_PF | 15)
-#define PD16_PF_ATA_DATA14      (GPIO_PORTD | GPIO_PF | 16)
-#define PE0_PF_USBOTG_NXT       (GPIO_PORTE | GPIO_PF | GPIO_OUT | 0)
-#define PE1_PF_USBOTG_STP       (GPIO_PORTE | GPIO_PF | GPIO_OUT | 1)
-#define PE2_PF_USBOTG_DIR       (GPIO_PORTE | GPIO_PF | GPIO_OUT | 2)
-#define PE24_PF_USBOTG_CLK      (GPIO_PORTE | GPIO_PF | GPIO_OUT | 24)
-#define PE25_PF_USBOTG_DATA7    (GPIO_PORTE | GPIO_PF | GPIO_OUT | 25)
-#define PF1_PF_NFCLE            (GPIO_PORTF | GPIO_PF | 1)
-#define PF3_PF_NFCE             (GPIO_PORTF | GPIO_PF | 3)
-#define PF7_PF_PC_POE           (GPIO_PORTF | GPIO_PF | 7)
-#define PF8_PF_PC_RW            (GPIO_PORTF | GPIO_PF | 8)
-#define PF9_PF_PC_IOIS16        (GPIO_PORTF | GPIO_PF | 9)
-#define PF10_PF_PC_RST          (GPIO_PORTF | GPIO_PF | 10)
-#define PF11_PF_PC_BVD2         (GPIO_PORTF | GPIO_PF | 11)
-#define PF12_PF_PC_BVD1         (GPIO_PORTF | GPIO_PF | 12)
-#define PF13_PF_PC_VS2          (GPIO_PORTF | GPIO_PF | 13)
-#define PF14_PF_PC_VS1          (GPIO_PORTF | GPIO_PF | 14)
-#define PF16_PF_PC_PWRON        (GPIO_PORTF | GPIO_PF | 16)
-#define PF17_PF_PC_READY        (GPIO_PORTF | GPIO_PF | 17)
-#define PF18_PF_PC_WAIT         (GPIO_PORTF | GPIO_PF | 18)
-#define PF19_PF_PC_CD2          (GPIO_PORTF | GPIO_PF | 19)
-#define PF20_PF_PC_CD1          (GPIO_PORTF | GPIO_PF | 20)
-#define PF23_PF_ATA_DATA15      (GPIO_PORTF | GPIO_PF | 23)
+#define PA0_PF_USBH2_CLK        (GPIO_PORTA | GPIO_PF | 0)
+#define PA1_PF_USBH2_DIR        (GPIO_PORTA | GPIO_PF | 1)
+#define PA2_PF_USBH2_DATA7      (GPIO_PORTA | GPIO_PF | 2)
+#define PA3_PF_USBH2_NXT        (GPIO_PORTA | GPIO_PF | 3)
+#define PA4_PF_USBH2_STP        (GPIO_PORTA | GPIO_PF | 4)
+#define PB22_PF_USBH1_SUSP      (GPIO_PORTB | GPIO_PF | 22)
+#define PB25_PF_USBH1_RCV       (GPIO_PORTB | GPIO_PF | 25)
+#define PC5_PF_I2C2_SDA         (GPIO_PORTC | GPIO_PF | GPIO_IN | 5)
+#define PC6_PF_I2C2_SCL         (GPIO_PORTC | GPIO_PF | GPIO_IN | 6)
+#define PC7_PF_USBOTG_DATA5     (GPIO_PORTC | GPIO_PF | GPIO_OUT | 7)
+#define PC8_PF_USBOTG_DATA6     (GPIO_PORTC | GPIO_PF | GPIO_OUT | 8)
+#define PC9_PF_USBOTG_DATA0     (GPIO_PORTC | GPIO_PF | GPIO_OUT | 9)
+#define PC10_PF_USBOTG_DATA2    (GPIO_PORTC | GPIO_PF | GPIO_OUT | 10)
+#define PC11_PF_USBOTG_DATA1    (GPIO_PORTC | GPIO_PF | GPIO_OUT | 11)
+#define PC12_PF_USBOTG_DATA4    (GPIO_PORTC | GPIO_PF | GPIO_OUT | 12)
+#define PC13_PF_USBOTG_DATA3    (GPIO_PORTC | GPIO_PF | GPIO_OUT | 13)
+#define PC16_PF_SSI4_FS         (GPIO_PORTC | GPIO_PF | GPIO_IN | 16)
+#define PC17_PF_SSI4_RXD        (GPIO_PORTC | GPIO_PF | GPIO_IN | 17)
+#define PC18_PF_SSI4_TXD        (GPIO_PORTC | GPIO_PF | GPIO_IN | 18)
+#define PC19_PF_SSI4_CLK        (GPIO_PORTC | GPIO_PF | GPIO_IN | 19)
+#define PD0_PF_SD3_CMD          (GPIO_PORTD | GPIO_PF | 0)
+#define PD1_PF_SD3_CLK          (GPIO_PORTD | GPIO_PF | 1)
+#define PD2_PF_ATA_DATA0        (GPIO_PORTD | GPIO_PF | 2)
+#define PD3_PF_ATA_DATA1        (GPIO_PORTD | GPIO_PF | 3)
+#define PD4_PF_ATA_DATA2        (GPIO_PORTD | GPIO_PF | 4)
+#define PD5_PF_ATA_DATA3        (GPIO_PORTD | GPIO_PF | 5)
+#define PD6_PF_ATA_DATA4        (GPIO_PORTD | GPIO_PF | 6)
+#define PD7_PF_ATA_DATA5        (GPIO_PORTD | GPIO_PF | 7)
+#define PD8_PF_ATA_DATA6        (GPIO_PORTD | GPIO_PF | 8)
+#define PD9_PF_ATA_DATA7        (GPIO_PORTD | GPIO_PF | 9)
+#define PD10_PF_ATA_DATA8       (GPIO_PORTD | GPIO_PF | 10)
+#define PD11_PF_ATA_DATA9       (GPIO_PORTD | GPIO_PF | 11)
+#define PD12_PF_ATA_DATA10      (GPIO_PORTD | GPIO_PF | 12)
+#define PD13_PF_ATA_DATA11      (GPIO_PORTD | GPIO_PF | 13)
+#define PD14_PF_ATA_DATA12      (GPIO_PORTD | GPIO_PF | 14)
+#define PD15_PF_ATA_DATA13      (GPIO_PORTD | GPIO_PF | 15)
+#define PD16_PF_ATA_DATA14      (GPIO_PORTD | GPIO_PF | 16)
+#define PE0_PF_USBOTG_NXT       (GPIO_PORTE | GPIO_PF | GPIO_OUT | 0)
+#define PE1_PF_USBOTG_STP       (GPIO_PORTE | GPIO_PF | GPIO_OUT | 1)
+#define PE2_PF_USBOTG_DIR       (GPIO_PORTE | GPIO_PF | GPIO_OUT | 2)
+#define PE24_PF_USBOTG_CLK      (GPIO_PORTE | GPIO_PF | GPIO_OUT | 24)
+#define PE25_PF_USBOTG_DATA7    (GPIO_PORTE | GPIO_PF | GPIO_OUT | 25)
+#define PF1_PF_NFCLE            (GPIO_PORTF | GPIO_PF | 1)
+#define PF3_PF_NFCE             (GPIO_PORTF | GPIO_PF | 3)
+#define PF7_PF_PC_POE           (GPIO_PORTF | GPIO_PF | 7)
+#define PF8_PF_PC_RW            (GPIO_PORTF | GPIO_PF | 8)
+#define PF9_PF_PC_IOIS16        (GPIO_PORTF | GPIO_PF | 9)
+#define PF10_PF_PC_RST          (GPIO_PORTF | GPIO_PF | 10)
+#define PF11_PF_PC_BVD2         (GPIO_PORTF | GPIO_PF | 11)
+#define PF12_PF_PC_BVD1         (GPIO_PORTF | GPIO_PF | 12)
+#define PF13_PF_PC_VS2          (GPIO_PORTF | GPIO_PF | 13)
+#define PF14_PF_PC_VS1          (GPIO_PORTF | GPIO_PF | 14)
+#define PF16_PF_PC_PWRON        (GPIO_PORTF | GPIO_PF | 16)
+#define PF17_PF_PC_READY        (GPIO_PORTF | GPIO_PF | 17)
+#define PF18_PF_PC_WAIT         (GPIO_PORTF | GPIO_PF | 18)
+#define PF19_PF_PC_CD2          (GPIO_PORTF | GPIO_PF | 19)
+#define PF20_PF_PC_CD1          (GPIO_PORTF | GPIO_PF | 20)
+#define PF23_PF_ATA_DATA15      (GPIO_PORTF | GPIO_PF | 23)
 
 /* Alternate GPIO pin functions */
 
-#define PB4_AF_MSHC_DATA0       (GPIO_PORTB | GPIO_AF | GPIO_OUT | 4)
-#define PB5_AF_MSHC_DATA1       (GPIO_PORTB | GPIO_AF | GPIO_OUT | 5)
-#define PB6_AF_MSHC_DATA2       (GPIO_PORTB | GPIO_AF | GPIO_OUT | 6)
-#define PB7_AF_MSHC_DATA4       (GPIO_PORTB | GPIO_AF | GPIO_OUT | 7)
-#define PB8_AF_MSHC_BS          (GPIO_PORTB | GPIO_AF | GPIO_OUT | 8)
-#define PB9_AF_MSHC_SCLK        (GPIO_PORTB | GPIO_AF | GPIO_OUT | 9)
-#define PB10_AF_UART6_TXD       (GPIO_PORTB | GPIO_AF | GPIO_OUT | 10)
-#define PB11_AF_UART6_RXD       (GPIO_PORTB | GPIO_AF | GPIO_IN | 11)
-#define PB12_AF_UART6_CTS       (GPIO_PORTB | GPIO_AF | GPIO_OUT | 12)
-#define PB13_AF_UART6_RTS       (GPIO_PORTB | GPIO_AF | GPIO_IN | 13)
-#define PB18_AF_UART5_TXD       (GPIO_PORTB | GPIO_AF | GPIO_OUT | 18)
-#define PB19_AF_UART5_RXD       (GPIO_PORTB | GPIO_AF | GPIO_IN | 19)
-#define PB20_AF_UART5_CTS       (GPIO_PORTB | GPIO_AF | GPIO_OUT | 20)
-#define PB21_AF_UART5_RTS       (GPIO_PORTB | GPIO_AF | GPIO_IN | 21)
-#define PC8_AF_FEC_MDIO         (GPIO_PORTC | GPIO_AF | GPIO_IN | 8)
-#define PC24_AF_GPT5_TOUT       (GPIO_PORTC | GPIO_AF | 24)
-#define PC26_AF_GPT4_TOUT       (GPIO_PORTC | GPIO_AF | 26)
-#define PD1_AF_ETMTRACE_PKT15   (GPIO_PORTD | GPIO_AF | 1)
-#define PD6_AF_ETMTRACE_PKT14   (GPIO_PORTD | GPIO_AF | 6)
-#define PD7_AF_ETMTRACE_PKT13   (GPIO_PORTD | GPIO_AF | 7)
-#define PD9_AF_ETMTRACE_PKT12   (GPIO_PORTD | GPIO_AF | 9)
-#define PD2_AF_SD3_D0           (GPIO_PORTD | GPIO_AF | 2)
-#define PD3_AF_SD3_D1           (GPIO_PORTD | GPIO_AF | 3)
-#define PD4_AF_SD3_D2           (GPIO_PORTD | GPIO_AF | 4)
-#define PD5_AF_SD3_D3           (GPIO_PORTD | GPIO_AF | 5)
-#define PD8_AF_FEC_MDIO         (GPIO_PORTD | GPIO_AF | GPIO_IN | 8)
-#define PD10_AF_ETMTRACE_PKT11  (GPIO_PORTD | GPIO_AF | 10)
-#define PD11_AF_ETMTRACE_PKT10  (GPIO_PORTD | GPIO_AF | 11)
-#define PD12_AF_ETMTRACE_PKT9   (GPIO_PORTD | GPIO_AF | 12)
-#define PD13_AF_ETMTRACE_PKT8   (GPIO_PORTD | GPIO_AF | 13)
-#define PD14_AF_ETMTRACE_PKT7   (GPIO_PORTD | GPIO_AF | 14)
-#define PD15_AF_ETMTRACE_PKT6   (GPIO_PORTD | GPIO_AF | 15)
-#define PD16_AF_ETMTRACE_PKT5   (GPIO_PORTD | GPIO_AF | 16)
-#define PF1_AF_ETMTRACE_PKT0    (GPIO_PORTF | GPIO_AF | 1)
-#define PF3_AF_ETMTRACE_PKT2    (GPIO_PORTF | GPIO_AF | 3)
-#define PF5_AF_ETMPIPESTAT11    (GPIO_PORTF | GPIO_AF | 5)
-#define PF7_AF_ATA_BUFFER_EN    (GPIO_PORTF | GPIO_AF | 7)
-#define PF8_AF_ATA_IORDY        (GPIO_PORTF | GPIO_AF | 8)
-#define PF9_AF_ATA_INTRQ        (GPIO_PORTF | GPIO_AF | 9)
-#define PF10_AF_ATA_RESET       (GPIO_PORTF | GPIO_AF | 10)
-#define PF11_AF_ATA_DMACK       (GPIO_PORTF | GPIO_AF | 11)
-#define PF12_AF_ATA_DMAREQ      (GPIO_PORTF | GPIO_AF | 12)
-#define PF13_AF_ATA_DA0         (GPIO_PORTF | GPIO_AF | 13)
-#define PF14_AF_ATA_DA1         (GPIO_PORTF | GPIO_AF | 14)
-#define PF15_AF_ETMTRACE_SYNC   (GPIO_PORTF | GPIO_AF | 15)
-#define PF16_AF_ATA_DA2         (GPIO_PORTF | GPIO_AF | 16)
-#define PF17_AF_ATA_CS0         (GPIO_PORTF | GPIO_AF | 17)
-#define PF18_AF_ATA_CS1         (GPIO_PORTF | GPIO_AF | 18)
-#define PF19_AF_ATA_DIOW        (GPIO_PORTF | GPIO_AF | 19)
-#define PF20_AF_ATA_DIOR        (GPIO_PORTF | GPIO_AF | 20)
-#define PF22_AF_ETMTRACE_CLK    (GPIO_PORTF | GPIO_AF | 22)
-#define PF23_AF_ETMTRACE_PKT4   (GPIO_PORTF | GPIO_AF | 23)
+#define PB4_AF_MSHC_DATA0       (GPIO_PORTB | GPIO_AF | GPIO_OUT | 4)
+#define PB5_AF_MSHC_DATA1       (GPIO_PORTB | GPIO_AF | GPIO_OUT | 5)
+#define PB6_AF_MSHC_DATA2       (GPIO_PORTB | GPIO_AF | GPIO_OUT | 6)
+#define PB7_AF_MSHC_DATA4       (GPIO_PORTB | GPIO_AF | GPIO_OUT | 7)
+#define PB8_AF_MSHC_BS          (GPIO_PORTB | GPIO_AF | GPIO_OUT | 8)
+#define PB9_AF_MSHC_SCLK        (GPIO_PORTB | GPIO_AF | GPIO_OUT | 9)
+#define PB10_AF_UART6_TXD       (GPIO_PORTB | GPIO_AF | GPIO_OUT | 10)
+#define PB11_AF_UART6_RXD       (GPIO_PORTB | GPIO_AF | GPIO_IN | 11)
+#define PB12_AF_UART6_CTS       (GPIO_PORTB | GPIO_AF | GPIO_OUT | 12)
+#define PB13_AF_UART6_RTS       (GPIO_PORTB | GPIO_AF | GPIO_IN | 13)
+#define PB18_AF_UART5_TXD       (GPIO_PORTB | GPIO_AF | GPIO_OUT | 18)
+#define PB19_AF_UART5_RXD       (GPIO_PORTB | GPIO_AF | GPIO_IN | 19)
+#define PB20_AF_UART5_CTS       (GPIO_PORTB | GPIO_AF | GPIO_OUT | 20)
+#define PB21_AF_UART5_RTS       (GPIO_PORTB | GPIO_AF | GPIO_IN | 21)
+#define PC8_AF_FEC_MDIO         (GPIO_PORTC | GPIO_AF | GPIO_IN | 8)
+#define PC24_AF_GPT5_TOUT       (GPIO_PORTC | GPIO_AF | 24)
+#define PC25_AF_GPT5_TIN        (GPIO_PORTC | GPIO_AF | 25)
+#define PC26_AF_GPT4_TOUT       (GPIO_PORTC | GPIO_AF | 26)
+#define PC27_AF_GPT4_TIN        (GPIO_PORTC | GPIO_AF | 27)
+#define PD1_AF_ETMTRACE_PKT15   (GPIO_PORTD | GPIO_AF | 1)
+#define PD6_AF_ETMTRACE_PKT14   (GPIO_PORTD | GPIO_AF | 6)
+#define PD7_AF_ETMTRACE_PKT13   (GPIO_PORTD | GPIO_AF | 7)
+#define PD9_AF_ETMTRACE_PKT12   (GPIO_PORTD | GPIO_AF | 9)
+#define PD2_AF_SD3_D0           (GPIO_PORTD | GPIO_AF | 2)
+#define PD3_AF_SD3_D1           (GPIO_PORTD | GPIO_AF | 3)
+#define PD4_AF_SD3_D2           (GPIO_PORTD | GPIO_AF | 4)
+#define PD5_AF_SD3_D3           (GPIO_PORTD | GPIO_AF | 5)
+#define PD8_AF_FEC_MDIO         (GPIO_PORTD | GPIO_AF | GPIO_IN | 8)
+#define PD10_AF_ETMTRACE_PKT11  (GPIO_PORTD | GPIO_AF | 10)
+#define PD11_AF_ETMTRACE_PKT10  (GPIO_PORTD | GPIO_AF | 11)
+#define PD12_AF_ETMTRACE_PKT9   (GPIO_PORTD | GPIO_AF | 12)
+#define PD13_AF_ETMTRACE_PKT8   (GPIO_PORTD | GPIO_AF | 13)
+#define PD14_AF_ETMTRACE_PKT7   (GPIO_PORTD | GPIO_AF | 14)
+#define PD15_AF_ETMTRACE_PKT6   (GPIO_PORTD | GPIO_AF | 15)
+#define PD16_AF_ETMTRACE_PKT5   (GPIO_PORTD | GPIO_AF | 16)
+#define PF1_AF_ETMTRACE_PKT0    (GPIO_PORTF | GPIO_AF | 1)
+#define PF3_AF_ETMTRACE_PKT2    (GPIO_PORTF | GPIO_AF | 3)
+#define PF5_AF_ETMPIPESTAT11    (GPIO_PORTF | GPIO_AF | 5)
+#define PF7_AF_ATA_BUFFER_EN    (GPIO_PORTF | GPIO_AF | 7)
+#define PF8_AF_ATA_IORDY        (GPIO_PORTF | GPIO_AF | 8)
+#define PF9_AF_ATA_INTRQ        (GPIO_PORTF | GPIO_AF | 9)
+#define PF10_AF_ATA_RESET       (GPIO_PORTF | GPIO_AF | 10)
+#define PF11_AF_ATA_DMACK       (GPIO_PORTF | GPIO_AF | 11)
+#define PF12_AF_ATA_DMAREQ      (GPIO_PORTF | GPIO_AF | 12)
+#define PF13_AF_ATA_DA0         (GPIO_PORTF | GPIO_AF | 13)
+#define PF14_AF_ATA_DA1         (GPIO_PORTF | GPIO_AF | 14)
+#define PF15_AF_ETMTRACE_SYNC   (GPIO_PORTF | GPIO_AF | 15)
+#define PF16_AF_ATA_DA2         (GPIO_PORTF | GPIO_AF | 16)
+#define PF17_AF_ATA_CS0         (GPIO_PORTF | GPIO_AF | 17)
+#define PF18_AF_ATA_CS1         (GPIO_PORTF | GPIO_AF | 18)
+#define PF19_AF_ATA_DIOW        (GPIO_PORTF | GPIO_AF | 19)
+#define PF20_AF_ATA_DIOR        (GPIO_PORTF | GPIO_AF | 20)
+#define PF22_AF_ETMTRACE_CLK    (GPIO_PORTF | GPIO_AF | 22)
+#define PF23_AF_ETMTRACE_PKT4   (GPIO_PORTF | GPIO_AF | 23)
 
 /* AIN GPIO pin functions */
 
-#define PC14_AIN_SSI1_MCLK      (GPIO_PORTC | GPIO_AIN | GPIO_OUT | 14)
-#define PC15_AIN_GPT6_TOUT      (GPIO_PORTC | GPIO_AIN | GPIO_OUT | 15)
-#define PD0_AIN_FEC_TXD0        (GPIO_PORTD | GPIO_AIN | GPIO_OUT | 0)
-#define PD1_AIN_FEC_TXD1        (GPIO_PORTD | GPIO_AIN | GPIO_OUT | 1)
-#define PD2_AIN_FEC_TXD2        (GPIO_PORTD | GPIO_AIN | GPIO_OUT | 2)
-#define PD3_AIN_FEC_TXD3        (GPIO_PORTD | GPIO_AIN | GPIO_OUT | 3)
-#define PD9_AIN_FEC_MDC         (GPIO_PORTD | GPIO_AIN | GPIO_OUT | 9)
-#define PD16_AIN_FEC_TX_ER      (GPIO_PORTD | GPIO_AIN | GPIO_OUT | 16)
-#define PD27_AIN_EXT_DMA_GRANT  (GPIO_PORTD | GPIO_AIN | GPIO_OUT | 27)
-#define PF23_AIN_FEC_TX_EN      (GPIO_PORTF | GPIO_AIN | GPIO_OUT | 23)
+#define PC14_AIN_SSI1_MCLK      (GPIO_PORTC | GPIO_AIN | GPIO_OUT | 14)
+#define PC15_AIN_GPT6_TOUT      (GPIO_PORTC | GPIO_AIN | GPIO_OUT | 15)
+#define PD0_AIN_FEC_TXD0        (GPIO_PORTD | GPIO_AIN | GPIO_OUT | 0)
+#define PD1_AIN_FEC_TXD1        (GPIO_PORTD | GPIO_AIN | GPIO_OUT | 1)
+#define PD2_AIN_FEC_TXD2        (GPIO_PORTD | GPIO_AIN | GPIO_OUT | 2)
+#define PD3_AIN_FEC_TXD3        (GPIO_PORTD | GPIO_AIN | GPIO_OUT | 3)
+#define PD9_AIN_FEC_MDC         (GPIO_PORTD | GPIO_AIN | GPIO_OUT | 9)
+#define PD16_AIN_FEC_TX_ER      (GPIO_PORTD | GPIO_AIN | GPIO_OUT | 16)
+#define PD27_AIN_EXT_DMA_GRANT  (GPIO_PORTD | GPIO_AIN | GPIO_OUT | 27)
+#define PF23_AIN_FEC_TX_EN      (GPIO_PORTF | GPIO_AIN | GPIO_OUT | 23)
 
 /* BIN GPIO pin functions */
 
-#define PC14_BIN_SSI2_MCLK      (GPIO_PORTC | GPIO_BIN | GPIO_OUT | 14)
+#define PC14_BIN_SSI2_MCLK      (GPIO_PORTC | GPIO_BIN | GPIO_OUT | 14)
 
 /* CIN GPIO pin functions */
 
-#define PD2_CIN_SLCDC1_DAT0     (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 2)
-#define PD3_CIN_SLCDC1_DAT1     (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 3)
-#define PD4_CIN_SLCDC1_DAT2     (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 4)
-#define PD5_CIN_SLCDC1_DAT3     (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 5)
-#define PD6_CIN_SLCDC1_DAT4     (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 6)
-#define PD7_CIN_SLCDC1_DAT5     (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 7)
-#define PD8_CIN_SLCDC1_DAT6     (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 8)
-#define PD9_CIN_SLCDC1_DAT7     (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 9)
-#define PD10_CIN_SLCDC1_DAT8    (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 10)
-#define PD11_CIN_SLCDC1_DAT9    (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 11)
-#define PD12_CIN_SLCDC1_DAT10   (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 12)
-#define PD13_CIN_SLCDC1_DAT11   (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 13)
-#define PD14_CIN_SLCDC1_DAT12   (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 14)
-#define PD15_CIN_SLCDC1_DAT13   (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 15)
-#define PD16_CIN_SLCDC1_DAT14   (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 16)
-#define PD23_CIN_SLCDC1_DAT15   (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 23)
-#define PF27_CIN_EXT_DMA_GRANT  (GPIO_PORTF | GPIO_CIN | GPIO_OUT | 27)
+#define PD2_CIN_SLCDC1_DAT0     (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 2)
+#define PD3_CIN_SLCDC1_DAT1     (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 3)
+#define PD4_CIN_SLCDC1_DAT2     (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 4)
+#define PD5_CIN_SLCDC1_DAT3     (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 5)
+#define PD6_CIN_SLCDC1_DAT4     (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 6)
+#define PD7_CIN_SLCDC1_DAT5     (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 7)
+#define PD8_CIN_SLCDC1_DAT6     (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 8)
+#define PD9_CIN_SLCDC1_DAT7     (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 9)
+#define PD10_CIN_SLCDC1_DAT8    (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 10)
+#define PD11_CIN_SLCDC1_DAT9    (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 11)
+#define PD12_CIN_SLCDC1_DAT10   (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 12)
+#define PD13_CIN_SLCDC1_DAT11   (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 13)
+#define PD14_CIN_SLCDC1_DAT12   (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 14)
+#define PD15_CIN_SLCDC1_DAT13   (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 15)
+#define PD16_CIN_SLCDC1_DAT14   (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 16)
+#define PD23_CIN_SLCDC1_DAT15   (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 23)
+#define PF27_CIN_EXT_DMA_GRANT  (GPIO_PORTF | GPIO_CIN | GPIO_OUT | 27)
 /* LCDC_TESTx on PBxx omitted, because it's not clear what they do */
 
 /* AOUT GPIO pin functions */
 
-#define PC14_AOUT_GPT6_TIN      (GPIO_PORTC | GPIO_AOUT | GPIO_IN | 14)
-#define PD4_AOUT_FEC_RX_ER      (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 4)
-#define PD5_AOUT_FEC_RXD1       (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 5)
-#define PD6_AOUT_FEC_RXD2       (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 6)
-#define PD7_AOUT_FEC_RXD3       (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 7)
-#define PD10_AOUT_FEC_CRS       (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 10)
-#define PD11_AOUT_FEC_TX_CLK    (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 11)
-#define PD12_AOUT_FEC_RXD0      (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 12)
-#define PD13_AOUT_FEC_RX_DV     (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 13)
-#define PD14_AOUT_FEC_RX_CLK    (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 14)
-#define PD15_AOUT_FEC_COL       (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 15)
-
-#define PC17_BOUT_PC_IOIS16     (GPIO_PORTC | GPIO_BOUT | GPIO_IN | 17)
-#define PC18_BOUT_PC_BVD2       (GPIO_PORTC | GPIO_BOUT | GPIO_IN | 18)
-#define PC19_BOUT_PC_BVD1       (GPIO_PORTC | GPIO_BOUT | GPIO_IN | 19)
-#define PC28_BOUT_PC_BVD2       (GPIO_PORTC | GPIO_BOUT | GPIO_IN | 28)
-#define PC29_BOUT_PC_VS1        (GPIO_PORTC | GPIO_BOUT | GPIO_IN | 29)
-#define PC30_BOUT_PC_READY      (GPIO_PORTC | GPIO_BOUT | GPIO_IN | 30)
-#define PC31_BOUT_PC_WAIT       (GPIO_PORTC | GPIO_BOUT | GPIO_IN | 31)
-
-
-#endif /* _MXC_GPIO_MX1_MX2_H */
+#define PC14_AOUT_GPT6_TIN      (GPIO_PORTC | GPIO_AOUT | GPIO_IN | 14)
+#define PD4_AOUT_FEC_RX_ER      (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 4)
+#define PD5_AOUT_FEC_RXD1       (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 5)
+#define PD6_AOUT_FEC_RXD2       (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 6)
+#define PD7_AOUT_FEC_RXD3       (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 7)
+#define PD10_AOUT_FEC_CRS       (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 10)
+#define PD11_AOUT_FEC_TX_CLK    (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 11)
+#define PD12_AOUT_FEC_RXD0      (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 12)
+#define PD13_AOUT_FEC_RX_DV     (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 13)
+#define PD14_AOUT_FEC_RX_CLK    (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 14)
+#define PD15_AOUT_FEC_COL       (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 15)
+
+/* BOUT GPIO pin functions */
+
+#define PC17_BOUT_PC_IOIS16     (GPIO_PORTC | GPIO_BOUT | GPIO_IN | 17)
+#define PC18_BOUT_PC_BVD2       (GPIO_PORTC | GPIO_BOUT | GPIO_IN | 18)
+#define PC19_BOUT_PC_BVD1       (GPIO_PORTC | GPIO_BOUT | GPIO_IN | 19)
+#define PC28_BOUT_PC_BVD2       (GPIO_PORTC | GPIO_BOUT | GPIO_IN | 28)
+#define PC29_BOUT_PC_VS1        (GPIO_PORTC | GPIO_BOUT | GPIO_IN | 29)
+#define PC30_BOUT_PC_READY      (GPIO_PORTC | GPIO_BOUT | GPIO_IN | 30)
+#define PC31_BOUT_PC_WAIT       (GPIO_PORTC | GPIO_BOUT | GPIO_IN | 31)
+
+#endif /* __MACH_IOMUX_MX27_H__ */
diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx2x.h b/arch/arm/plat-mxc/include/mach/iomux-mx2x.h
index fb5ae638e79f..c4f116d214f2 100644
--- a/arch/arm/plat-mxc/include/mach/iomux-mx2x.h
+++ b/arch/arm/plat-mxc/include/mach/iomux-mx2x.h
@@ -1,237 +1,230 @@
 /*
-* Copyright (C) 2008 by Sascha Hauer <kernel@pengutronix.de>
-* Copyright (C) 2009 by Holger Schurig <hs4233@mail.mn-solutions.de>
-*
-* This program is free software; you can redistribute it and/or
-* modify it under the terms of the GNU General Public License
-* as published by the Free Software Foundation; either version 2
-* of the License, or (at your option) any later version.
-* This program is distributed in the hope that it will be useful,
-* but WITHOUT ANY WARRANTY; without even the implied warranty of
-* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-* GNU General Public License for more details.
-*
-* You should have received a copy of the GNU General Public License
-* along with this program; if not, write to the Free Software
-* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
-* MA 02110-1301, USA.
-*/
-
-#ifndef _MXC_IOMUX_MX2x_H
-#define _MXC_IOMUX_MX2x_H
-
-#ifndef GPIO_PORTA
-#error Please include mach/iomux.h
-#endif
-
+ * Copyright (C) 2008 by Sascha Hauer <kernel@pengutronix.de>
+ * Copyright (C) 2009 by Holger Schurig <hs4233@mail.mn-solutions.de>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+ * MA 02110-1301, USA.
+ */
+#ifndef __MACH_IOMUX_MX2x_H__
+#define __MACH_IOMUX_MX2x_H__
 
 /* Primary GPIO pin functions */
 
-#define PA5_PF_LSCLK            (GPIO_PORTA | GPIO_PF | GPIO_OUT | 5)
-#define PA6_PF_LD0              (GPIO_PORTA | GPIO_PF | GPIO_OUT | 6)
-#define PA7_PF_LD1              (GPIO_PORTA | GPIO_PF | GPIO_OUT | 7)
-#define PA8_PF_LD2              (GPIO_PORTA | GPIO_PF | GPIO_OUT | 8)
-#define PA9_PF_LD3              (GPIO_PORTA | GPIO_PF | GPIO_OUT | 9)
-#define PA10_PF_LD4             (GPIO_PORTA | GPIO_PF | GPIO_OUT | 10)
-#define PA11_PF_LD5             (GPIO_PORTA | GPIO_PF | GPIO_OUT | 11)
-#define PA12_PF_LD6             (GPIO_PORTA | GPIO_PF | GPIO_OUT | 12)
-#define PA13_PF_LD7             (GPIO_PORTA | GPIO_PF | GPIO_OUT | 13)
-#define PA14_PF_LD8             (GPIO_PORTA | GPIO_PF | GPIO_OUT | 14)
-#define PA15_PF_LD9             (GPIO_PORTA | GPIO_PF | GPIO_OUT | 15)
-#define PA16_PF_LD10            (GPIO_PORTA | GPIO_PF | GPIO_OUT | 16)
-#define PA17_PF_LD11            (GPIO_PORTA | GPIO_PF | GPIO_OUT | 17)
-#define PA18_PF_LD12            (GPIO_PORTA | GPIO_PF | GPIO_OUT | 18)
-#define PA19_PF_LD13            (GPIO_PORTA | GPIO_PF | GPIO_OUT | 19)
-#define PA20_PF_LD14            (GPIO_PORTA | GPIO_PF | GPIO_OUT | 20)
-#define PA21_PF_LD15            (GPIO_PORTA | GPIO_PF | GPIO_OUT | 21)
-#define PA22_PF_LD16            (GPIO_PORTA | GPIO_PF | GPIO_OUT | 22)
-#define PA23_PF_LD17            (GPIO_PORTA | GPIO_PF | GPIO_OUT | 23)
-#define PA24_PF_REV             (GPIO_PORTA | GPIO_PF | GPIO_OUT | 24)
-#define PA25_PF_CLS             (GPIO_PORTA | GPIO_PF | GPIO_OUT | 25)
-#define PA26_PF_PS              (GPIO_PORTA | GPIO_PF | GPIO_OUT | 26)
-#define PA27_PF_SPL_SPR         (GPIO_PORTA | GPIO_PF | GPIO_OUT | 27)
-#define PA28_PF_HSYNC           (GPIO_PORTA | GPIO_PF | GPIO_OUT | 28)
-#define PA29_PF_VSYNC           (GPIO_PORTA | GPIO_PF | GPIO_OUT | 29)
-#define PA30_PF_CONTRAST        (GPIO_PORTA | GPIO_PF | GPIO_OUT | 30)
-#define PA31_PF_OE_ACD          (GPIO_PORTA | GPIO_PF | GPIO_OUT | 31)
-#define PB4_PF_SD2_D0           (GPIO_PORTB | GPIO_PF | 4)
-#define PB5_PF_SD2_D1           (GPIO_PORTB | GPIO_PF | 5)
-#define PB6_PF_SD2_D2           (GPIO_PORTB | GPIO_PF | 6)
-#define PB7_PF_SD2_D3           (GPIO_PORTB | GPIO_PF | 7)
-#define PB8_PF_SD2_CMD          (GPIO_PORTB | GPIO_PF | 8)
-#define PB9_PF_SD2_CLK          (GPIO_PORTB | GPIO_PF | 9)
-#define PB10_PF_CSI_D0          (GPIO_PORTB | GPIO_PF | GPIO_OUT | 10)
-#define PB11_PF_CSI_D1          (GPIO_PORTB | GPIO_PF | GPIO_OUT | 11)
-#define PB12_PF_CSI_D2          (GPIO_PORTB | GPIO_PF | GPIO_OUT | 12)
-#define PB13_PF_CSI_D3          (GPIO_PORTB | GPIO_PF | GPIO_OUT | 13)
-#define PB14_PF_CSI_D4          (GPIO_PORTB | GPIO_PF | GPIO_OUT | 14)
-#define PB15_PF_CSI_MCLK        (GPIO_PORTB | GPIO_PF | GPIO_OUT | 15)
-#define PB16_PF_CSI_PIXCLK      (GPIO_PORTB | GPIO_PF | GPIO_OUT | 16)
-#define PB17_PF_CSI_D5          (GPIO_PORTB | GPIO_PF | GPIO_OUT | 17)
-#define PB18_PF_CSI_D6          (GPIO_PORTB | GPIO_PF | GPIO_OUT | 18)
-#define PB19_PF_CSI_D7          (GPIO_PORTB | GPIO_PF | GPIO_OUT | 19)
-#define PB20_PF_CSI_VSYNC       (GPIO_PORTB | GPIO_PF | GPIO_OUT | 20)
-#define PB21_PF_CSI_HSYNC       (GPIO_PORTB | GPIO_PF | GPIO_OUT | 21)
-#define PB23_PF_USB_PWR         (GPIO_PORTB | GPIO_PF | 23)
-#define PB24_PF_USB_OC          (GPIO_PORTB | GPIO_PF | 24)
-#define PB26_PF_USBH1_FS        (GPIO_PORTB | GPIO_PF | 26)
-#define PB27_PF_USBH1_OE        (GPIO_PORTB | GPIO_PF | 27)
-#define PB28_PF_USBH1_TXDM      (GPIO_PORTB | GPIO_PF | 28)
-#define PB29_PF_USBH1_TXDP      (GPIO_PORTB | GPIO_PF | 29)
-#define PB30_PF_USBH1_RXDM      (GPIO_PORTB | GPIO_PF | 30)
-#define PB31_PF_USBH1_RXDP      (GPIO_PORTB | GPIO_PF | 31)
-#define PC14_PF_TOUT            (GPIO_PORTC | GPIO_PF | 14)
-#define PC15_PF_TIN             (GPIO_PORTC | GPIO_PF | 15)
-#define PC20_PF_SSI1_FS         (GPIO_PORTC | GPIO_PF | GPIO_IN | 20)
-#define PC21_PF_SSI1_RXD        (GPIO_PORTC | GPIO_PF | GPIO_IN | 21)
-#define PC22_PF_SSI1_TXD        (GPIO_PORTC | GPIO_PF | GPIO_IN | 22)
-#define PC23_PF_SSI1_CLK        (GPIO_PORTC | GPIO_PF | GPIO_IN | 23)
-#define PC24_PF_SSI2_FS         (GPIO_PORTC | GPIO_PF | GPIO_IN | 24)
-#define PC25_PF_SSI2_RXD        (GPIO_PORTC | GPIO_PF | GPIO_IN | 25)
-#define PC26_PF_SSI2_TXD        (GPIO_PORTC | GPIO_PF | GPIO_IN | 26)
-#define PC27_PF_SSI2_CLK        (GPIO_PORTC | GPIO_PF | GPIO_IN | 27)
-#define PC28_PF_SSI3_FS         (GPIO_PORTC | GPIO_PF | GPIO_IN | 28)
-#define PC29_PF_SSI3_RXD        (GPIO_PORTC | GPIO_PF | GPIO_IN | 29)
-#define PC30_PF_SSI3_TXD        (GPIO_PORTC | GPIO_PF | GPIO_IN | 30)
-#define PC31_PF_SSI3_CLK        (GPIO_PORTC | GPIO_PF | GPIO_IN | 31)
-#define PD17_PF_I2C_DATA        (GPIO_PORTD | GPIO_PF | GPIO_OUT | 17)
-#define PD18_PF_I2C_CLK         (GPIO_PORTD | GPIO_PF | GPIO_OUT | 18)
-#define PD19_PF_CSPI2_SS2       (GPIO_PORTD | GPIO_PF | 19)
-#define PD20_PF_CSPI2_SS1       (GPIO_PORTD | GPIO_PF | 20)
-#define PD21_PF_CSPI2_SS0       (GPIO_PORTD | GPIO_PF | 21)
-#define PD22_PF_CSPI2_SCLK      (GPIO_PORTD | GPIO_PF | 22)
-#define PD23_PF_CSPI2_MISO      (GPIO_PORTD | GPIO_PF | 23)
-#define PD24_PF_CSPI2_MOSI      (GPIO_PORTD | GPIO_PF | 24)
-#define PD25_PF_CSPI1_RDY       (GPIO_PORTD | GPIO_PF | GPIO_OUT | 25)
-#define PD26_PF_CSPI1_SS2       (GPIO_PORTD | GPIO_PF | GPIO_OUT | 26)
-#define PD27_PF_CSPI1_SS1       (GPIO_PORTD | GPIO_PF | GPIO_OUT | 27)
-#define PD28_PF_CSPI1_SS0       (GPIO_PORTD | GPIO_PF | GPIO_OUT | 28)
-#define PD29_PF_CSPI1_SCLK      (GPIO_PORTD | GPIO_PF | GPIO_OUT | 29)
-#define PD30_PF_CSPI1_MISO      (GPIO_PORTD | GPIO_PF | GPIO_IN | 30)
-#define PD31_PF_CSPI1_MOSI      (GPIO_PORTD | GPIO_PF | GPIO_OUT | 31)
-#define PE3_PF_UART2_CTS        (GPIO_PORTE | GPIO_PF | GPIO_OUT | 3)
-#define PE4_PF_UART2_RTS        (GPIO_PORTE | GPIO_PF | GPIO_IN | 4)
-#define PE5_PF_PWMO             (GPIO_PORTE | GPIO_PF | 5)
-#define PE6_PF_UART2_TXD        (GPIO_PORTE | GPIO_PF | GPIO_OUT | 6)
-#define PE7_PF_UART2_RXD        (GPIO_PORTE | GPIO_PF | GPIO_IN | 7)
-#define PE8_PF_UART3_TXD        (GPIO_PORTE | GPIO_PF | GPIO_OUT | 8)
-#define PE9_PF_UART3_RXD        (GPIO_PORTE | GPIO_PF | GPIO_IN | 9)
-#define PE10_PF_UART3_CTS       (GPIO_PORTE | GPIO_PF | GPIO_OUT | 10)
-#define PE11_PF_UART3_RTS       (GPIO_PORTE | GPIO_PF | GPIO_IN | 11)
-#define PE12_PF_UART1_TXD       (GPIO_PORTE | GPIO_PF | GPIO_OUT | 12)
-#define PE13_PF_UART1_RXD       (GPIO_PORTE | GPIO_PF | GPIO_IN | 13)
-#define PE14_PF_UART1_CTS       (GPIO_PORTE | GPIO_PF | GPIO_OUT | 14)
-#define PE15_PF_UART1_RTS       (GPIO_PORTE | GPIO_PF | GPIO_IN | 15)
-#define PE16_PF_RTCK            (GPIO_PORTE | GPIO_PF | GPIO_OUT | 16)
-#define PE17_PF_RESET_OUT       (GPIO_PORTE | GPIO_PF | 17)
-#define PE18_PF_SD1_D0          (GPIO_PORTE | GPIO_PF | 18)
-#define PE19_PF_SD1_D1          (GPIO_PORTE | GPIO_PF | 19)
-#define PE20_PF_SD1_D2          (GPIO_PORTE | GPIO_PF | 20)
-#define PE21_PF_SD1_D3          (GPIO_PORTE | GPIO_PF | 21)
-#define PE22_PF_SD1_CMD         (GPIO_PORTE | GPIO_PF | 22)
-#define PE23_PF_SD1_CLK         (GPIO_PORTE | GPIO_PF | 23)
-#define PF0_PF_NRFB             (GPIO_PORTF | GPIO_PF | 0)
-#define PF2_PF_NFWP             (GPIO_PORTF | GPIO_PF | 2)
-#define PF4_PF_NFALE            (GPIO_PORTF | GPIO_PF | 4)
-#define PF5_PF_NFRE             (GPIO_PORTF | GPIO_PF | 5)
-#define PF6_PF_NFWE             (GPIO_PORTF | GPIO_PF | 6)
-#define PF15_PF_CLKO            (GPIO_PORTF | GPIO_PF | 15)
-#define PF21_PF_CS4             (GPIO_PORTF | GPIO_PF | 21)
-#define PF22_PF_CS5             (GPIO_PORTF | GPIO_PF | 22)
+#define PA5_PF_LSCLK            (GPIO_PORTA | GPIO_PF | GPIO_OUT | 5)
+#define PA6_PF_LD0              (GPIO_PORTA | GPIO_PF | GPIO_OUT | 6)
+#define PA7_PF_LD1              (GPIO_PORTA | GPIO_PF | GPIO_OUT | 7)
+#define PA8_PF_LD2              (GPIO_PORTA | GPIO_PF | GPIO_OUT | 8)
+#define PA9_PF_LD3              (GPIO_PORTA | GPIO_PF | GPIO_OUT | 9)
+#define PA10_PF_LD4             (GPIO_PORTA | GPIO_PF | GPIO_OUT | 10)
+#define PA11_PF_LD5             (GPIO_PORTA | GPIO_PF | GPIO_OUT | 11)
+#define PA12_PF_LD6             (GPIO_PORTA | GPIO_PF | GPIO_OUT | 12)
+#define PA13_PF_LD7             (GPIO_PORTA | GPIO_PF | GPIO_OUT | 13)
+#define PA14_PF_LD8             (GPIO_PORTA | GPIO_PF | GPIO_OUT | 14)
+#define PA15_PF_LD9             (GPIO_PORTA | GPIO_PF | GPIO_OUT | 15)
+#define PA16_PF_LD10            (GPIO_PORTA | GPIO_PF | GPIO_OUT | 16)
+#define PA17_PF_LD11            (GPIO_PORTA | GPIO_PF | GPIO_OUT | 17)
+#define PA18_PF_LD12            (GPIO_PORTA | GPIO_PF | GPIO_OUT | 18)
+#define PA19_PF_LD13            (GPIO_PORTA | GPIO_PF | GPIO_OUT | 19)
+#define PA20_PF_LD14            (GPIO_PORTA | GPIO_PF | GPIO_OUT | 20)
+#define PA21_PF_LD15            (GPIO_PORTA | GPIO_PF | GPIO_OUT | 21)
+#define PA22_PF_LD16            (GPIO_PORTA | GPIO_PF | GPIO_OUT | 22)
+#define PA23_PF_LD17            (GPIO_PORTA | GPIO_PF | GPIO_OUT | 23)
+#define PA24_PF_REV             (GPIO_PORTA | GPIO_PF | GPIO_OUT | 24)
+#define PA25_PF_CLS             (GPIO_PORTA | GPIO_PF | GPIO_OUT | 25)
+#define PA26_PF_PS              (GPIO_PORTA | GPIO_PF | GPIO_OUT | 26)
+#define PA27_PF_SPL_SPR         (GPIO_PORTA | GPIO_PF | GPIO_OUT | 27)
+#define PA28_PF_HSYNC           (GPIO_PORTA | GPIO_PF | GPIO_OUT | 28)
+#define PA29_PF_VSYNC           (GPIO_PORTA | GPIO_PF | GPIO_OUT | 29)
+#define PA30_PF_CONTRAST        (GPIO_PORTA | GPIO_PF | GPIO_OUT | 30)
+#define PA31_PF_OE_ACD          (GPIO_PORTA | GPIO_PF | GPIO_OUT | 31)
+#define PB4_PF_SD2_D0           (GPIO_PORTB | GPIO_PF | 4)
+#define PB5_PF_SD2_D1           (GPIO_PORTB | GPIO_PF | 5)
+#define PB6_PF_SD2_D2           (GPIO_PORTB | GPIO_PF | 6)
+#define PB7_PF_SD2_D3           (GPIO_PORTB | GPIO_PF | 7)
+#define PB8_PF_SD2_CMD          (GPIO_PORTB | GPIO_PF | 8)
+#define PB9_PF_SD2_CLK          (GPIO_PORTB | GPIO_PF | 9)
+#define PB10_PF_CSI_D0          (GPIO_PORTB | GPIO_PF | GPIO_OUT | 10)
+#define PB11_PF_CSI_D1          (GPIO_PORTB | GPIO_PF | GPIO_OUT | 11)
+#define PB12_PF_CSI_D2          (GPIO_PORTB | GPIO_PF | GPIO_OUT | 12)
+#define PB13_PF_CSI_D3          (GPIO_PORTB | GPIO_PF | GPIO_OUT | 13)
+#define PB14_PF_CSI_D4          (GPIO_PORTB | GPIO_PF | GPIO_OUT | 14)
+#define PB15_PF_CSI_MCLK        (GPIO_PORTB | GPIO_PF | GPIO_OUT | 15)
+#define PB16_PF_CSI_PIXCLK      (GPIO_PORTB | GPIO_PF | GPIO_OUT | 16)
+#define PB17_PF_CSI_D5          (GPIO_PORTB | GPIO_PF | GPIO_OUT | 17)
+#define PB18_PF_CSI_D6          (GPIO_PORTB | GPIO_PF | GPIO_OUT | 18)
+#define PB19_PF_CSI_D7          (GPIO_PORTB | GPIO_PF | GPIO_OUT | 19)
+#define PB20_PF_CSI_VSYNC       (GPIO_PORTB | GPIO_PF | GPIO_OUT | 20)
+#define PB21_PF_CSI_HSYNC       (GPIO_PORTB | GPIO_PF | GPIO_OUT | 21)
+#define PB23_PF_USB_PWR         (GPIO_PORTB | GPIO_PF | 23)
+#define PB24_PF_USB_OC          (GPIO_PORTB | GPIO_PF | 24)
+#define PB26_PF_USBH1_FS        (GPIO_PORTB | GPIO_PF | 26)
+#define PB27_PF_USBH1_OE        (GPIO_PORTB | GPIO_PF | 27)
+#define PB28_PF_USBH1_TXDM      (GPIO_PORTB | GPIO_PF | 28)
+#define PB29_PF_USBH1_TXDP      (GPIO_PORTB | GPIO_PF | 29)
+#define PB30_PF_USBH1_RXDM      (GPIO_PORTB | GPIO_PF | 30)
+#define PB31_PF_USBH1_RXDP      (GPIO_PORTB | GPIO_PF | 31)
+#define PC14_PF_TOUT            (GPIO_PORTC | GPIO_PF | 14)
+#define PC15_PF_TIN             (GPIO_PORTC | GPIO_PF | 15)
+#define PC20_PF_SSI1_FS         (GPIO_PORTC | GPIO_PF | GPIO_IN | 20)
+#define PC21_PF_SSI1_RXD        (GPIO_PORTC | GPIO_PF | GPIO_IN | 21)
+#define PC22_PF_SSI1_TXD        (GPIO_PORTC | GPIO_PF | GPIO_IN | 22)
+#define PC23_PF_SSI1_CLK        (GPIO_PORTC | GPIO_PF | GPIO_IN | 23)
+#define PC24_PF_SSI2_FS         (GPIO_PORTC | GPIO_PF | GPIO_IN | 24)
+#define PC25_PF_SSI2_RXD        (GPIO_PORTC | GPIO_PF | GPIO_IN | 25)
+#define PC26_PF_SSI2_TXD        (GPIO_PORTC | GPIO_PF | GPIO_IN | 26)
+#define PC27_PF_SSI2_CLK        (GPIO_PORTC | GPIO_PF | GPIO_IN | 27)
+#define PC28_PF_SSI3_FS         (GPIO_PORTC | GPIO_PF | GPIO_IN | 28)
+#define PC29_PF_SSI3_RXD        (GPIO_PORTC | GPIO_PF | GPIO_IN | 29)
+#define PC30_PF_SSI3_TXD        (GPIO_PORTC | GPIO_PF | GPIO_IN | 30)
+#define PC31_PF_SSI3_CLK        (GPIO_PORTC | GPIO_PF | GPIO_IN | 31)
+#define PD17_PF_I2C_DATA        (GPIO_PORTD | GPIO_PF | GPIO_OUT | 17)
+#define PD18_PF_I2C_CLK         (GPIO_PORTD | GPIO_PF | GPIO_OUT | 18)
+#define PD19_PF_CSPI2_SS2       (GPIO_PORTD | GPIO_PF | 19)
+#define PD20_PF_CSPI2_SS1       (GPIO_PORTD | GPIO_PF | 20)
+#define PD21_PF_CSPI2_SS0       (GPIO_PORTD | GPIO_PF | 21)
+#define PD22_PF_CSPI2_SCLK      (GPIO_PORTD | GPIO_PF | 22)
+#define PD23_PF_CSPI2_MISO      (GPIO_PORTD | GPIO_PF | 23)
+#define PD24_PF_CSPI2_MOSI      (GPIO_PORTD | GPIO_PF | 24)
+#define PD25_PF_CSPI1_RDY       (GPIO_PORTD | GPIO_PF | GPIO_OUT | 25)
+#define PD26_PF_CSPI1_SS2       (GPIO_PORTD | GPIO_PF | GPIO_OUT | 26)
+#define PD27_PF_CSPI1_SS1       (GPIO_PORTD | GPIO_PF | GPIO_OUT | 27)
+#define PD28_PF_CSPI1_SS0       (GPIO_PORTD | GPIO_PF | GPIO_OUT | 28)
+#define PD29_PF_CSPI1_SCLK      (GPIO_PORTD | GPIO_PF | GPIO_OUT | 29)
+#define PD30_PF_CSPI1_MISO      (GPIO_PORTD | GPIO_PF | GPIO_IN | 30)
+#define PD31_PF_CSPI1_MOSI      (GPIO_PORTD | GPIO_PF | GPIO_OUT | 31)
+#define PE3_PF_UART2_CTS        (GPIO_PORTE | GPIO_PF | GPIO_OUT | 3)
+#define PE4_PF_UART2_RTS        (GPIO_PORTE | GPIO_PF | GPIO_IN | 4)
+#define PE5_PF_PWMO             (GPIO_PORTE | GPIO_PF | 5)
+#define PE6_PF_UART2_TXD        (GPIO_PORTE | GPIO_PF | GPIO_OUT | 6)
+#define PE7_PF_UART2_RXD        (GPIO_PORTE | GPIO_PF | GPIO_IN | 7)
+#define PE8_PF_UART3_TXD        (GPIO_PORTE | GPIO_PF | GPIO_OUT | 8)
+#define PE9_PF_UART3_RXD        (GPIO_PORTE | GPIO_PF | GPIO_IN | 9)
+#define PE10_PF_UART3_CTS       (GPIO_PORTE | GPIO_PF | GPIO_OUT | 10)
+#define PE11_PF_UART3_RTS       (GPIO_PORTE | GPIO_PF | GPIO_IN | 11)
+#define PE12_PF_UART1_TXD       (GPIO_PORTE | GPIO_PF | GPIO_OUT | 12)
+#define PE13_PF_UART1_RXD       (GPIO_PORTE | GPIO_PF | GPIO_IN | 13)
+#define PE14_PF_UART1_CTS       (GPIO_PORTE | GPIO_PF | GPIO_OUT | 14)
+#define PE15_PF_UART1_RTS       (GPIO_PORTE | GPIO_PF | GPIO_IN | 15)
+#define PE16_PF_RTCK            (GPIO_PORTE | GPIO_PF | GPIO_OUT | 16)
+#define PE17_PF_RESET_OUT       (GPIO_PORTE | GPIO_PF | 17)
+#define PE18_PF_SD1_D0          (GPIO_PORTE | GPIO_PF | 18)
+#define PE19_PF_SD1_D1          (GPIO_PORTE | GPIO_PF | 19)
+#define PE20_PF_SD1_D2          (GPIO_PORTE | GPIO_PF | 20)
+#define PE21_PF_SD1_D3          (GPIO_PORTE | GPIO_PF | 21)
+#define PE22_PF_SD1_CMD         (GPIO_PORTE | GPIO_PF | 22)
+#define PE23_PF_SD1_CLK         (GPIO_PORTE | GPIO_PF | 23)
+#define PF0_PF_NRFB             (GPIO_PORTF | GPIO_PF | 0)
+#define PF2_PF_NFWP             (GPIO_PORTF | GPIO_PF | 2)
+#define PF4_PF_NFALE            (GPIO_PORTF | GPIO_PF | 4)
+#define PF5_PF_NFRE             (GPIO_PORTF | GPIO_PF | 5)
+#define PF6_PF_NFWE             (GPIO_PORTF | GPIO_PF | 6)
+#define PF15_PF_CLKO            (GPIO_PORTF | GPIO_PF | 15)
+#define PF21_PF_CS4             (GPIO_PORTF | GPIO_PF | 21)
+#define PF22_PF_CS5             (GPIO_PORTF | GPIO_PF | 22)
 
 /* Alternate GPIO pin functions */
 
-#define PB26_AF_UART4_RTS       (GPIO_PORTB | GPIO_AF | GPIO_IN | 26)
-#define PB28_AF_UART4_TXD       (GPIO_PORTB | GPIO_AF | GPIO_OUT | 28)
-#define PB29_AF_UART4_CTS       (GPIO_PORTB | GPIO_AF | GPIO_OUT | 29)
-#define PB31_AF_UART4_RXD       (GPIO_PORTB | GPIO_AF | GPIO_IN | 31)
-#define PC28_AF_SLCDC2_D0       (GPIO_PORTC | GPIO_AF | 28)
-#define PC29_AF_SLCDC2_RS       (GPIO_PORTC | GPIO_AF | 29)
-#define PC30_AF_SLCDC2_CS       (GPIO_PORTC | GPIO_AF | 30)
-#define PC31_AF_SLCDC2_CLK      (GPIO_PORTC | GPIO_AF | 31)
-#define PD19_AF_USBH2_DATA4     (GPIO_PORTD | GPIO_AF | 19)
-#define PD20_AF_USBH2_DATA3     (GPIO_PORTD | GPIO_AF | 20)
-#define PD21_AF_USBH2_DATA6     (GPIO_PORTD | GPIO_AF | 21)
-#define PD22_AF_USBH2_DATA0     (GPIO_PORTD | GPIO_AF | 22)
-#define PD23_AF_USBH2_DATA2     (GPIO_PORTD | GPIO_AF | 23)
-#define PD24_AF_USBH2_DATA1     (GPIO_PORTD | GPIO_AF | 24)
-#define PD26_AF_USBH2_DATA5     (GPIO_PORTD | GPIO_AF | 26)
-#define PE0_AF_KP_COL6          (GPIO_PORTE | GPIO_AF | 0)
-#define PE1_AF_KP_ROW6          (GPIO_PORTE | GPIO_AF | 1)
-#define PE2_AF_KP_ROW7          (GPIO_PORTE | GPIO_AF | 2)
-#define PE3_AF_KP_COL7          (GPIO_PORTE | GPIO_AF | 3)
-#define PE4_AF_KP_ROW7          (GPIO_PORTE | GPIO_AF | 4)
-#define PE6_AF_KP_COL6          (GPIO_PORTE | GPIO_AF | 6)
-#define PE7_AF_KP_ROW6          (GPIO_PORTE | GPIO_AF | 7)
-#define PE16_AF_OWIRE           (GPIO_PORTE | GPIO_AF | 16)
-#define PE18_AF_CSPI3_MISO      (GPIO_PORTE | GPIO_AF | GPIO_IN | 18)
-#define PE21_AF_CSPI3_SS        (GPIO_PORTE | GPIO_AF | GPIO_OUT | 21)
-#define PE22_AF_CSPI3_MOSI      (GPIO_PORTE | GPIO_AF | GPIO_OUT | 22)
-#define PE23_AF_CSPI3_SCLK      (GPIO_PORTE | GPIO_AF | GPIO_OUT | 23)
+#define PB26_AF_UART4_RTS       (GPIO_PORTB | GPIO_AF | GPIO_IN | 26)
+#define PB28_AF_UART4_TXD       (GPIO_PORTB | GPIO_AF | GPIO_OUT | 28)
+#define PB29_AF_UART4_CTS       (GPIO_PORTB | GPIO_AF | GPIO_OUT | 29)
+#define PB31_AF_UART4_RXD       (GPIO_PORTB | GPIO_AF | GPIO_IN | 31)
+#define PC28_AF_SLCDC2_D0       (GPIO_PORTC | GPIO_AF | 28)
+#define PC29_AF_SLCDC2_RS       (GPIO_PORTC | GPIO_AF | 29)
+#define PC30_AF_SLCDC2_CS       (GPIO_PORTC | GPIO_AF | 30)
+#define PC31_AF_SLCDC2_CLK      (GPIO_PORTC | GPIO_AF | 31)
+#define PD19_AF_USBH2_DATA4     (GPIO_PORTD | GPIO_AF | 19)
+#define PD20_AF_USBH2_DATA3     (GPIO_PORTD | GPIO_AF | 20)
+#define PD21_AF_USBH2_DATA6     (GPIO_PORTD | GPIO_AF | 21)
+#define PD22_AF_USBH2_DATA0     (GPIO_PORTD | GPIO_AF | 22)
+#define PD23_AF_USBH2_DATA2     (GPIO_PORTD | GPIO_AF | 23)
+#define PD24_AF_USBH2_DATA1     (GPIO_PORTD | GPIO_AF | 24)
+#define PD26_AF_USBH2_DATA5     (GPIO_PORTD | GPIO_AF | 26)
+#define PE0_AF_KP_COL6          (GPIO_PORTE | GPIO_AF | 0)
+#define PE1_AF_KP_ROW6          (GPIO_PORTE | GPIO_AF | 1)
+#define PE2_AF_KP_ROW7          (GPIO_PORTE | GPIO_AF | 2)
+#define PE3_AF_KP_COL7          (GPIO_PORTE | GPIO_AF | 3)
+#define PE4_AF_KP_ROW7          (GPIO_PORTE | GPIO_AF | 4)
+#define PE6_AF_KP_COL6          (GPIO_PORTE | GPIO_AF | 6)
+#define PE7_AF_KP_ROW6          (GPIO_PORTE | GPIO_AF | 7)
+#define PE16_AF_OWIRE           (GPIO_PORTE | GPIO_AF | 16)
+#define PE18_AF_CSPI3_MISO      (GPIO_PORTE | GPIO_AF | GPIO_IN | 18)
+#define PE21_AF_CSPI3_SS        (GPIO_PORTE | GPIO_AF | GPIO_OUT | 21)
+#define PE22_AF_CSPI3_MOSI      (GPIO_PORTE | GPIO_AF | GPIO_OUT | 22)
+#define PE23_AF_CSPI3_SCLK      (GPIO_PORTE | GPIO_AF | GPIO_OUT | 23)
 
 /* AIN GPIO pin functions */
 
-#define PA6_AIN_SLCDC1_DAT0     (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 6)
-#define PA7_AIN_SLCDC1_DAT1     (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 7)
-#define PA8_AIN_SLCDC1_DAT2     (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 8)
-#define PA0_AIN_SLCDC1_DAT3     (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 0)
-#define PA11_AIN_SLCDC1_DAT5    (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 11)
-#define PA13_AIN_SLCDC1_DAT7    (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 13)
-#define PA15_AIN_SLCDC1_DAT9    (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 15)
-#define PA17_AIN_SLCDC1_DAT11   (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 17)
-#define PA19_AIN_SLCDC1_DAT13   (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 19)
-#define PA21_AIN_SLCDC1_DAT15   (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 21)
-#define PA22_AIN_EXT_DMAGRANT   (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 22)
-#define PA24_AIN_SLCDC1_D0      (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 24)
-#define PA25_AIN_SLCDC1_RS      (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 25)
-#define PA26_AIN_SLCDC1_CS      (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 26)
-#define PA27_AIN_SLCDC1_CLK     (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 27)
-#define PB6_AIN_SLCDC1_D0       (GPIO_PORTB | GPIO_AIN | GPIO_OUT | 6)
-#define PB7_AIN_SLCDC1_RS       (GPIO_PORTB | GPIO_AIN | GPIO_OUT | 7)
-#define PB8_AIN_SLCDC1_CS       (GPIO_PORTB | GPIO_AIN | GPIO_OUT | 8)
-#define PB9_AIN_SLCDC1_CLK      (GPIO_PORTB | GPIO_AIN | GPIO_OUT | 9)
-#define PB25_AIN_SLCDC1_DAT0    (GPIO_PORTB | GPIO_AIN | GPIO_OUT | 25)
-#define PB26_AIN_SLCDC1_DAT1    (GPIO_PORTB | GPIO_AIN | GPIO_OUT | 26)
-#define PB27_AIN_SLCDC1_DAT2    (GPIO_PORTB | GPIO_AIN | GPIO_OUT | 27)
-#define PB28_AIN_SLCDC1_DAT3    (GPIO_PORTB | GPIO_AIN | GPIO_OUT | 28)
-#define PB29_AIN_SLCDC1_DAT4    (GPIO_PORTB | GPIO_AIN | GPIO_OUT | 29)
-#define PB30_AIN_SLCDC1_DAT5    (GPIO_PORTB | GPIO_AIN | GPIO_OUT | 30)
-#define PB31_AIN_SLCDC1_DAT6    (GPIO_PORTB | GPIO_AIN | GPIO_OUT | 31)
-#define PC5_AIN_SLCDC1_DAT7     (GPIO_PORTC | GPIO_AIN | GPIO_OUT | 5)
-#define PC6_AIN_SLCDC1_DAT8     (GPIO_PORTC | GPIO_AIN | GPIO_OUT | 6)
-#define PC7_AIN_SLCDC1_DAT9     (GPIO_PORTC | GPIO_AIN | GPIO_OUT | 7)
-#define PC8_AIN_SLCDC1_DAT10    (GPIO_PORTC | GPIO_AIN | GPIO_OUT | 8)
-#define PC9_AIN_SLCDC1_DAT11    (GPIO_PORTC | GPIO_AIN | GPIO_OUT | 9)
-#define PC10_AIN_SLCDC1_DAT12   (GPIO_PORTC | GPIO_AIN | GPIO_OUT | 10)
-#define PC11_AIN_SLCDC1_DAT13   (GPIO_PORTC | GPIO_AIN | GPIO_OUT | 11)
-#define PC12_AIN_SLCDC1_DAT14   (GPIO_PORTC | GPIO_AIN | GPIO_OUT | 12)
-#define PC13_AIN_SLCDC1_DAT15   (GPIO_PORTC | GPIO_AIN | GPIO_OUT | 13)
-#define PE5_AIN_PC_SPKOUT       (GPIO_PORTE | GPIO_AIN | GPIO_OUT | 5)
+#define PA6_AIN_SLCDC1_DAT0     (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 6)
+#define PA7_AIN_SLCDC1_DAT1     (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 7)
+#define PA8_AIN_SLCDC1_DAT2     (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 8)
+#define PA0_AIN_SLCDC1_DAT3     (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 0)
+#define PA11_AIN_SLCDC1_DAT5    (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 11)
+#define PA13_AIN_SLCDC1_DAT7    (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 13)
+#define PA15_AIN_SLCDC1_DAT9    (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 15)
+#define PA17_AIN_SLCDC1_DAT11   (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 17)
+#define PA19_AIN_SLCDC1_DAT13   (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 19)
+#define PA21_AIN_SLCDC1_DAT15   (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 21)
+#define PA22_AIN_EXT_DMAGRANT   (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 22)
+#define PA24_AIN_SLCDC1_D0      (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 24)
+#define PA25_AIN_SLCDC1_RS      (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 25)
+#define PA26_AIN_SLCDC1_CS      (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 26)
+#define PA27_AIN_SLCDC1_CLK     (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 27)
+#define PB6_AIN_SLCDC1_D0       (GPIO_PORTB | GPIO_AIN | GPIO_OUT | 6)
+#define PB7_AIN_SLCDC1_RS       (GPIO_PORTB | GPIO_AIN | GPIO_OUT | 7)
+#define PB8_AIN_SLCDC1_CS       (GPIO_PORTB | GPIO_AIN | GPIO_OUT | 8)
+#define PB9_AIN_SLCDC1_CLK      (GPIO_PORTB | GPIO_AIN | GPIO_OUT | 9)
+#define PB25_AIN_SLCDC1_DAT0    (GPIO_PORTB | GPIO_AIN | GPIO_OUT | 25)
+#define PB26_AIN_SLCDC1_DAT1    (GPIO_PORTB | GPIO_AIN | GPIO_OUT | 26)
+#define PB27_AIN_SLCDC1_DAT2    (GPIO_PORTB | GPIO_AIN | GPIO_OUT | 27)
+#define PB28_AIN_SLCDC1_DAT3    (GPIO_PORTB | GPIO_AIN | GPIO_OUT | 28)
+#define PB29_AIN_SLCDC1_DAT4    (GPIO_PORTB | GPIO_AIN | GPIO_OUT | 29)
+#define PB30_AIN_SLCDC1_DAT5    (GPIO_PORTB | GPIO_AIN | GPIO_OUT | 30)
+#define PB31_AIN_SLCDC1_DAT6    (GPIO_PORTB | GPIO_AIN | GPIO_OUT | 31)
+#define PC5_AIN_SLCDC1_DAT7     (GPIO_PORTC | GPIO_AIN | GPIO_OUT | 5)
+#define PC6_AIN_SLCDC1_DAT8     (GPIO_PORTC | GPIO_AIN | GPIO_OUT | 6)
+#define PC7_AIN_SLCDC1_DAT9     (GPIO_PORTC | GPIO_AIN | GPIO_OUT | 7)
+#define PC8_AIN_SLCDC1_DAT10    (GPIO_PORTC | GPIO_AIN | GPIO_OUT | 8)
+#define PC9_AIN_SLCDC1_DAT11    (GPIO_PORTC | GPIO_AIN | GPIO_OUT | 9)
+#define PC10_AIN_SLCDC1_DAT12   (GPIO_PORTC | GPIO_AIN | GPIO_OUT | 10)
+#define PC11_AIN_SLCDC1_DAT13   (GPIO_PORTC | GPIO_AIN | GPIO_OUT | 11)
+#define PC12_AIN_SLCDC1_DAT14   (GPIO_PORTC | GPIO_AIN | GPIO_OUT | 12)
+#define PC13_AIN_SLCDC1_DAT15   (GPIO_PORTC | GPIO_AIN | GPIO_OUT | 13)
+#define PE5_AIN_PC_SPKOUT       (GPIO_PORTE | GPIO_AIN | GPIO_OUT | 5)
 
 /* BIN GPIO pin functions */
 
-#define PE5_BIN_TOUT2           (GPIO_PORTE | GPIO_BIN | GPIO_OUT | 5)
+#define PE5_BIN_TOUT2           (GPIO_PORTE | GPIO_BIN | GPIO_OUT | 5)
 
 /* CIN GPIO pin functions */
 
-#define PA14_CIN_SLCDC1_DAT0    (GPIO_PORTA | GPIO_CIN | GPIO_OUT | 14)
-#define PA15_CIN_SLCDC1_DAT1    (GPIO_PORTA | GPIO_CIN | GPIO_OUT | 15)
-#define PA16_CIN_SLCDC1_DAT2    (GPIO_PORTA | GPIO_CIN | GPIO_OUT | 16)
-#define PA17_CIN_SLCDC1_DAT3    (GPIO_PORTA | GPIO_CIN | GPIO_OUT | 17)
-#define PA18_CIN_SLCDC1_DAT4    (GPIO_PORTA | GPIO_CIN | GPIO_OUT | 18)
-#define PA19_CIN_SLCDC1_DAT5    (GPIO_PORTA | GPIO_CIN | GPIO_OUT | 19)
-#define PA20_CIN_SLCDC1_DAT6    (GPIO_PORTA | GPIO_CIN | GPIO_OUT | 20)
-#define PA21_CIN_SLCDC1_DAT7    (GPIO_PORTA | GPIO_CIN | GPIO_OUT | 21)
-#define PB30_CIN_UART4_CTS      (GPIO_PORTB | GPIO_CIN | GPIO_OUT | 30)
-#define PE5_CIN_TOUT3           (GPIO_PORTE | GPIO_CIN | GPIO_OUT | 5)
+#define PA14_CIN_SLCDC1_DAT0    (GPIO_PORTA | GPIO_CIN | GPIO_OUT | 14)
+#define PA15_CIN_SLCDC1_DAT1    (GPIO_PORTA | GPIO_CIN | GPIO_OUT | 15)
+#define PA16_CIN_SLCDC1_DAT2    (GPIO_PORTA | GPIO_CIN | GPIO_OUT | 16)
+#define PA17_CIN_SLCDC1_DAT3    (GPIO_PORTA | GPIO_CIN | GPIO_OUT | 17)
+#define PA18_CIN_SLCDC1_DAT4    (GPIO_PORTA | GPIO_CIN | GPIO_OUT | 18)
+#define PA19_CIN_SLCDC1_DAT5    (GPIO_PORTA | GPIO_CIN | GPIO_OUT | 19)
+#define PA20_CIN_SLCDC1_DAT6    (GPIO_PORTA | GPIO_CIN | GPIO_OUT | 20)
+#define PA21_CIN_SLCDC1_DAT7    (GPIO_PORTA | GPIO_CIN | GPIO_OUT | 21)
+#define PB30_CIN_UART4_CTS      (GPIO_PORTB | GPIO_CIN | GPIO_OUT | 30)
+#define PE5_CIN_TOUT3           (GPIO_PORTE | GPIO_CIN | GPIO_OUT | 5)
 
 /* AOUT GPIO pin functions */
 
-#define PB29_AOUT_UART4_RXD     (GPIO_PORTB | GPIO_AOUT | GPIO_IN | 29)
-#define PB31_AOUT_UART4_RTS     (GPIO_PORTB | GPIO_AOUT | GPIO_IN | 31)
+#define PB29_AOUT_UART4_RXD     (GPIO_PORTB | GPIO_AOUT | GPIO_IN | 29)
+#define PB31_AOUT_UART4_RTS     (GPIO_PORTB | GPIO_AOUT | GPIO_IN | 31)
 #define PC8_AOUT_USBOTG_TXR_INT (GPIO_PORTC | GPIO_AOUT | GPIO_IN | 8)
-#define PC15_AOUT_WKGD          (GPIO_PORTC | GPIO_AOUT | GPIO_IN | 15)
-#define PF21_AOUT_DTACK         (GPIO_PORTF | GPIO_AOUT | GPIO_IN | 21)
-
+#define PC15_AOUT_WKGD          (GPIO_PORTC | GPIO_AOUT | GPIO_IN | 15)
+#define PF21_AOUT_DTACK         (GPIO_PORTF | GPIO_AOUT | GPIO_IN | 21)
 
-#endif
+#endif /* ifndef __MACH_IOMUX_MX2x_H__ */
diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx3.h b/arch/arm/plat-mxc/include/mach/iomux-mx3.h
index e1fc6da1cd10..e51465d7b224 100644
--- a/arch/arm/plat-mxc/include/mach/iomux-mx3.h
+++ b/arch/arm/plat-mxc/include/mach/iomux-mx3.h
@@ -16,12 +16,10 @@
  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
  * MA 02110-1301, USA.
  */
-
-#ifndef __MACH_MX31_IOMUX_H__
-#define __MACH_MX31_IOMUX_H__
+#ifndef __MACH_IOMUX_MX3_H__
+#define __MACH_IOMUX_MX3_H__
 
 #include <linux/types.h>
-
 /*
  * various IOMUX output functions
  */
@@ -34,7 +32,7 @@
 #define IOMUX_OCONFIG_ALT4 (5 << 4)     /* used as alternate function 4 */
 #define IOMUX_OCONFIG_ALT5 (6 << 4)     /* used as alternate function 5 */
 #define IOMUX_OCONFIG_ALT6 (7 << 4)     /* used as alternate function 6 */
-#define IOMUX_ICONFIG_NONE  0           /* not configured for input */
+#define IOMUX_ICONFIG_NONE  0           /* not configured for input */
 #define IOMUX_ICONFIG_GPIO  1           /* used as GPIO */
 #define IOMUX_ICONFIG_FUNC  2           /* used as function */
 #define IOMUX_ICONFIG_ALT1  4           /* used as alternate function 1 */
@@ -167,11 +165,6 @@ int mxc_iomux_mode(unsigned int pin_mode);
         MXC_GPIO_IRQ_START)
 
 /*
- * The number of gpio devices among the pads
- */
-#define GPIO_PORT_MAX 3
-
-/*
  * This enumeration is constructed based on the Section
  * "sw_pad_ctl & sw_mux_ctl details" of the MX31 IC Spec. Each enumerated
  * value is constructed based on the rules described above.
@@ -633,40 +626,40 @@ enum iomux_pins {
 #define MX31_PIN_TXD2__GPIO1_28         IOMUX_MODE(MX31_PIN_TXD2, IOMUX_CONFIG_GPIO)
 #define MX31_PIN_CSI_D4__GPIO3_4        IOMUX_MODE(MX31_PIN_CSI_D4, IOMUX_CONFIG_GPIO)
 #define MX31_PIN_CSI_D5__GPIO3_5        IOMUX_MODE(MX31_PIN_CSI_D5, IOMUX_CONFIG_GPIO)
-#define MX31_PIN_USBOTG_DATA0__USBOTG_DATA0    IOMUX_MODE(MX31_PIN_USBOTG_DATA0, IOMUX_CONFIG_FUNC)
-#define MX31_PIN_USBOTG_DATA1__USBOTG_DATA1    IOMUX_MODE(MX31_PIN_USBOTG_DATA1, IOMUX_CONFIG_FUNC)
-#define MX31_PIN_USBOTG_DATA2__USBOTG_DATA2    IOMUX_MODE(MX31_PIN_USBOTG_DATA2, IOMUX_CONFIG_FUNC)
-#define MX31_PIN_USBOTG_DATA3__USBOTG_DATA3    IOMUX_MODE(MX31_PIN_USBOTG_DATA3, IOMUX_CONFIG_FUNC)
-#define MX31_PIN_USBOTG_DATA4__USBOTG_DATA4    IOMUX_MODE(MX31_PIN_USBOTG_DATA4, IOMUX_CONFIG_FUNC)
-#define MX31_PIN_USBOTG_DATA5__USBOTG_DATA5    IOMUX_MODE(MX31_PIN_USBOTG_DATA5, IOMUX_CONFIG_FUNC)
-#define MX31_PIN_USBOTG_DATA6__USBOTG_DATA6    IOMUX_MODE(MX31_PIN_USBOTG_DATA6, IOMUX_CONFIG_FUNC)
-#define MX31_PIN_USBOTG_DATA7__USBOTG_DATA7    IOMUX_MODE(MX31_PIN_USBOTG_DATA7, IOMUX_CONFIG_FUNC)
-#define MX31_PIN_USBOTG_CLK__USBOTG_CLK        IOMUX_MODE(MX31_PIN_USBOTG_CLK, IOMUX_CONFIG_FUNC)
-#define MX31_PIN_USBOTG_DIR__USBOTG_DIR        IOMUX_MODE(MX31_PIN_USBOTG_DIR, IOMUX_CONFIG_FUNC)
-#define MX31_PIN_USBOTG_NXT__USBOTG_NXT        IOMUX_MODE(MX31_PIN_USBOTG_NXT, IOMUX_CONFIG_FUNC)
-#define MX31_PIN_USBOTG_STP__USBOTG_STP        IOMUX_MODE(MX31_PIN_USBOTG_STP, IOMUX_CONFIG_FUNC)
-#define MX31_PIN_CSPI1_MOSI__USBH1_RXDM        IOMUX_MODE(MX31_PIN_CSPI1_MOSI, IOMUX_CONFIG_ALT1)
-#define MX31_PIN_CSPI1_MISO__USBH1_RXDP        IOMUX_MODE(MX31_PIN_CSPI1_MISO, IOMUX_CONFIG_ALT1)
-#define MX31_PIN_CSPI1_SS0__USBH1_TXDM         IOMUX_MODE(MX31_PIN_CSPI1_SS0,  IOMUX_CONFIG_ALT1)
-#define MX31_PIN_CSPI1_SS1__USBH1_TXDP         IOMUX_MODE(MX31_PIN_CSPI1_SS1,  IOMUX_CONFIG_ALT1)
-#define MX31_PIN_CSPI1_SS2__USBH1_RCV          IOMUX_MODE(MX31_PIN_CSPI1_SS2,  IOMUX_CONFIG_ALT1)
-#define MX31_PIN_CSPI1_SCLK__USBH1_OEB         IOMUX_MODE(MX31_PIN_CSPI1_SCLK, IOMUX_CONFIG_ALT1)
-#define MX31_PIN_CSPI1_SPI_RDY__USBH1_FS       IOMUX_MODE(MX31_PIN_CSPI1_SPI_RDY, IOMUX_CONFIG_ALT1)
+#define MX31_PIN_USBOTG_DATA0__USBOTG_DATA0     IOMUX_MODE(MX31_PIN_USBOTG_DATA0, IOMUX_CONFIG_FUNC)
+#define MX31_PIN_USBOTG_DATA1__USBOTG_DATA1     IOMUX_MODE(MX31_PIN_USBOTG_DATA1, IOMUX_CONFIG_FUNC)
+#define MX31_PIN_USBOTG_DATA2__USBOTG_DATA2     IOMUX_MODE(MX31_PIN_USBOTG_DATA2, IOMUX_CONFIG_FUNC)
+#define MX31_PIN_USBOTG_DATA3__USBOTG_DATA3     IOMUX_MODE(MX31_PIN_USBOTG_DATA3, IOMUX_CONFIG_FUNC)
+#define MX31_PIN_USBOTG_DATA4__USBOTG_DATA4     IOMUX_MODE(MX31_PIN_USBOTG_DATA4, IOMUX_CONFIG_FUNC)
+#define MX31_PIN_USBOTG_DATA5__USBOTG_DATA5     IOMUX_MODE(MX31_PIN_USBOTG_DATA5, IOMUX_CONFIG_FUNC)
+#define MX31_PIN_USBOTG_DATA6__USBOTG_DATA6     IOMUX_MODE(MX31_PIN_USBOTG_DATA6, IOMUX_CONFIG_FUNC)
+#define MX31_PIN_USBOTG_DATA7__USBOTG_DATA7     IOMUX_MODE(MX31_PIN_USBOTG_DATA7, IOMUX_CONFIG_FUNC)
+#define MX31_PIN_USBOTG_CLK__USBOTG_CLK         IOMUX_MODE(MX31_PIN_USBOTG_CLK, IOMUX_CONFIG_FUNC)
+#define MX31_PIN_USBOTG_DIR__USBOTG_DIR         IOMUX_MODE(MX31_PIN_USBOTG_DIR, IOMUX_CONFIG_FUNC)
+#define MX31_PIN_USBOTG_NXT__USBOTG_NXT         IOMUX_MODE(MX31_PIN_USBOTG_NXT, IOMUX_CONFIG_FUNC)
+#define MX31_PIN_USBOTG_STP__USBOTG_STP         IOMUX_MODE(MX31_PIN_USBOTG_STP, IOMUX_CONFIG_FUNC)
+#define MX31_PIN_CSPI1_MOSI__USBH1_RXDM         IOMUX_MODE(MX31_PIN_CSPI1_MOSI, IOMUX_CONFIG_ALT1)
+#define MX31_PIN_CSPI1_MISO__USBH1_RXDP         IOMUX_MODE(MX31_PIN_CSPI1_MISO, IOMUX_CONFIG_ALT1)
+#define MX31_PIN_CSPI1_SS0__USBH1_TXDM          IOMUX_MODE(MX31_PIN_CSPI1_SS0, IOMUX_CONFIG_ALT1)
+#define MX31_PIN_CSPI1_SS1__USBH1_TXDP          IOMUX_MODE(MX31_PIN_CSPI1_SS1, IOMUX_CONFIG_ALT1)
+#define MX31_PIN_CSPI1_SS2__USBH1_RCV           IOMUX_MODE(MX31_PIN_CSPI1_SS2, IOMUX_CONFIG_ALT1)
+#define MX31_PIN_CSPI1_SCLK__USBH1_OEB          IOMUX_MODE(MX31_PIN_CSPI1_SCLK, IOMUX_CONFIG_ALT1)
+#define MX31_PIN_CSPI1_SPI_RDY__USBH1_FS        IOMUX_MODE(MX31_PIN_CSPI1_SPI_RDY, IOMUX_CONFIG_ALT1)
 #define MX31_PIN_SFS6__USBH1_SUSPEND    IOMUX_MODE(MX31_PIN_SFS6, IOMUX_CONFIG_FUNC)
 #define MX31_PIN_NFRE_B__GPIO1_11       IOMUX_MODE(MX31_PIN_NFRE_B, IOMUX_CONFIG_GPIO)
 #define MX31_PIN_NFALE__GPIO1_12        IOMUX_MODE(MX31_PIN_NFALE, IOMUX_CONFIG_GPIO)
-#define MX31_PIN_USBH2_DATA0__USBH2_DATA0      IOMUX_MODE(MX31_PIN_USBH2_DATA0, IOMUX_CONFIG_FUNC)
-#define MX31_PIN_USBH2_DATA1__USBH2_DATA1      IOMUX_MODE(MX31_PIN_USBH2_DATA1, IOMUX_CONFIG_FUNC)
+#define MX31_PIN_USBH2_DATA0__USBH2_DATA0       IOMUX_MODE(MX31_PIN_USBH2_DATA0, IOMUX_CONFIG_FUNC)
+#define MX31_PIN_USBH2_DATA1__USBH2_DATA1       IOMUX_MODE(MX31_PIN_USBH2_DATA1, IOMUX_CONFIG_FUNC)
 #define MX31_PIN_STXD3__USBH2_DATA2     IOMUX_MODE(MX31_PIN_STXD3, IOMUX_CONFIG_FUNC)
 #define MX31_PIN_SRXD3__USBH2_DATA3     IOMUX_MODE(MX31_PIN_SRXD3, IOMUX_CONFIG_FUNC)
 #define MX31_PIN_SCK3__USBH2_DATA4      IOMUX_MODE(MX31_PIN_SCK3, IOMUX_CONFIG_FUNC)
 #define MX31_PIN_SFS3__USBH2_DATA5      IOMUX_MODE(MX31_PIN_SFS3, IOMUX_CONFIG_FUNC)
 #define MX31_PIN_STXD6__USBH2_DATA6     IOMUX_MODE(MX31_PIN_STXD6, IOMUX_CONFIG_FUNC)
 #define MX31_PIN_SRXD6__USBH2_DATA7     IOMUX_MODE(MX31_PIN_SRXD6, IOMUX_CONFIG_FUNC)
-#define MX31_PIN_USBH2_CLK__USBH2_CLK          IOMUX_MODE(MX31_PIN_USBH2_CLK, IOMUX_CONFIG_FUNC)
-#define MX31_PIN_USBH2_DIR__USBH2_DIR          IOMUX_MODE(MX31_PIN_USBH2_DIR, IOMUX_CONFIG_FUNC)
-#define MX31_PIN_USBH2_NXT__USBH2_NXT          IOMUX_MODE(MX31_PIN_USBH2_NXT, IOMUX_CONFIG_FUNC)
-#define MX31_PIN_USBH2_STP__USBH2_STP          IOMUX_MODE(MX31_PIN_USBH2_STP, IOMUX_CONFIG_FUNC)
+#define MX31_PIN_USBH2_CLK__USBH2_CLK           IOMUX_MODE(MX31_PIN_USBH2_CLK, IOMUX_CONFIG_FUNC)
+#define MX31_PIN_USBH2_DIR__USBH2_DIR           IOMUX_MODE(MX31_PIN_USBH2_DIR, IOMUX_CONFIG_FUNC)
+#define MX31_PIN_USBH2_NXT__USBH2_NXT           IOMUX_MODE(MX31_PIN_USBH2_NXT, IOMUX_CONFIG_FUNC)
+#define MX31_PIN_USBH2_STP__USBH2_STP           IOMUX_MODE(MX31_PIN_USBH2_STP, IOMUX_CONFIG_FUNC)
 #define MX31_PIN_SCK6__GPIO1_25         IOMUX_MODE(MX31_PIN_SCK6, IOMUX_CONFIG_GPIO)
 #define MX31_PIN_USB_OC__GPIO1_30       IOMUX_MODE(MX31_PIN_USB_OC, IOMUX_CONFIG_GPIO)
 #define MX31_PIN_I2C_DAT__I2C1_SDA      IOMUX_MODE(MX31_PIN_I2C_DAT, IOMUX_CONFIG_FUNC)
@@ -711,8 +704,8 @@ enum iomux_pins {
 #define MX31_PIN_DSR_DCE1__GPIO2_9      IOMUX_MODE(MX31_PIN_DSR_DCE1, IOMUX_CONFIG_GPIO)
 #define MX31_PIN_RI_DCE1__GPIO2_10      IOMUX_MODE(MX31_PIN_RI_DCE1, IOMUX_CONFIG_GPIO)
 #define MX31_PIN_DCD_DCE1__GPIO2_11     IOMUX_MODE(MX31_PIN_DCD_DCE1, IOMUX_CONFIG_GPIO)
-#define MX31_PIN_STXD5__GPIO1_21       IOMUX_MODE(MX31_PIN_STXD5, IOMUX_CONFIG_GPIO)
-#define MX31_PIN_SRXD5__GPIO1_22       IOMUX_MODE(MX31_PIN_SRXD5, IOMUX_CONFIG_GPIO)
+#define MX31_PIN_STXD5__GPIO1_21        IOMUX_MODE(MX31_PIN_STXD5, IOMUX_CONFIG_GPIO)
+#define MX31_PIN_SRXD5__GPIO1_22        IOMUX_MODE(MX31_PIN_SRXD5, IOMUX_CONFIG_GPIO)
 #define MX31_PIN_GPIO1_3__GPIO1_3       IOMUX_MODE(MX31_PIN_GPIO1_3, IOMUX_CONFIG_GPIO)
 #define MX31_PIN_CSPI2_SS1__CSPI3_SS1   IOMUX_MODE(MX31_PIN_CSPI2_SS1, IOMUX_CONFIG_ALT1)
 #define MX31_PIN_RTS1__GPIO2_6          IOMUX_MODE(MX31_PIN_RTS1, IOMUX_CONFIG_GPIO)
@@ -727,13 +720,14 @@ enum iomux_pins {
 #define MX31_PIN_SCK5__SCK5             IOMUX_MODE(MX31_PIN_SCK5, IOMUX_CONFIG_FUNC)
 #define MX31_PIN_SFS5__SFS5             IOMUX_MODE(MX31_PIN_SFS5, IOMUX_CONFIG_FUNC)
 
-/*XXX: The SS0, SS1, SS2, SS3 lines of spi3 are multiplexed by cspi2_ss0, cspi2_ss1, cspi1_ss0
- * cspi1_ss1*/
+/*
+ * XXX: The SS0, SS1, SS2, SS3 lines of spi3 are multiplexed with cspi2_ss0,
+ * cspi2_ss1, cspi1_ss0 cspi1_ss1
+ */
 
 /*
  * This function configures the pad value for a IOMUX pin.
  */
 void mxc_iomux_set_pad(enum iomux_pins, u32);
 
-#endif
-
+#endif /* ifndef __MACH_IOMUX_MX3_H__ */
diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx35.h b/arch/arm/plat-mxc/include/mach/iomux-mx35.h
index c88d40795f7a..2a24bae1b878 100644
--- a/arch/arm/plat-mxc/include/mach/iomux-mx35.h
+++ b/arch/arm/plat-mxc/include/mach/iomux-mx35.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (C, NO_PAD_CTRL) 2009 by Jan Weitzel Phytec Messtechnik GmbH <armlinux@phytec.de>
+ * Copyright (C) 2009 by Jan Weitzel Phytec Messtechnik GmbH <armlinux@phytec.de>
  *
  * This program is free software; you can redistribute it and/or
  * modify it under the terms of the GNU General Public License
diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx51.h b/arch/arm/plat-mxc/include/mach/iomux-mx51.h
new file mode 100644
index 000000000000..b4f975e6a665
--- /dev/null
+++ b/arch/arm/plat-mxc/include/mach/iomux-mx51.h
@@ -0,0 +1,326 @@
+/*
+ * Copyright (C) 2009-2010 Amit Kucheria <amit.kucheria@canonical.com>
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+#ifndef __MACH_IOMUX_MX51_H__
+#define __MACH_IOMUX_MX51_H__
+
+#include <mach/iomux-v3.h>
+
+/*
+ * various IOMUX alternate output functions (1-7)
+ */
+typedef enum iomux_config {
+        IOMUX_CONFIG_ALT0,
+        IOMUX_CONFIG_ALT1,
+        IOMUX_CONFIG_ALT2,
+        IOMUX_CONFIG_ALT3,
+        IOMUX_CONFIG_ALT4,
+        IOMUX_CONFIG_ALT5,
+        IOMUX_CONFIG_ALT6,
+        IOMUX_CONFIG_ALT7,
+        IOMUX_CONFIG_GPIO,      /* added to help user use GPIO mode */
+        IOMUX_CONFIG_SION = 0x1 << 4,   /* LOOPBACK:MUX SION bit */
+} iomux_pin_cfg_t;
+
+/* Pad control groupings */
+#define MX51_UART1_PAD_CTRL     (PAD_CTL_HYS | PAD_CTL_PKE | PAD_CTL_PUE | \
+                                PAD_CTL_DSE_HIGH)
+#define MX51_UART2_PAD_CTRL     (PAD_CTL_PKE | PAD_CTL_PUE | PAD_CTL_DSE_HIGH | \
+                                PAD_CTL_SRE_FAST)
+#define MX51_UART3_PAD_CTRL     (PAD_CTL_PKE | PAD_CTL_DSE_HIGH | \
+                                PAD_CTL_SRE_FAST)
+
+/*
+ * The naming convention for the pad modes is MX51_PAD_<padname>__<padmode>
+ * If <padname> or <padmode> refers to a GPIO, it is named
+ * GPIO_<unit>_<num> see also iomux-v3.h
+ */
+
+/*
+ * FIXME: This was converted using scripts from existing Freescale code to
+ * this form used upstream. Need to verify the name format.
+ */
+
+/*                                              PAD      MUX   ALT INPSE PATH PADCTRL */
+
+#define MX51_PAD_GPIO_2_0__EIM_D16      IOMUX_PAD(0x3f0, 0x05c, 1, 0x0,   0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_2_1__EIM_D17      IOMUX_PAD(0x3f4, 0x060, 1, 0x0,   0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_2_2__EIM_D18      IOMUX_PAD(0x3f8, 0x064, 1, 0x0,   0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_2_3__EIM_D19      IOMUX_PAD(0x3fc, 0x068, 1, 0x0,   0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_2_4__EIM_D20      IOMUX_PAD(0x400, 0x06c, 1, 0x0,   0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_2_5__EIM_D21      IOMUX_PAD(0x404, 0x070, 1, 0x0,   0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_2_6__EIM_D22      IOMUX_PAD(0x408, 0x074, 1, 0x0,   0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_2_7__EIM_D23      IOMUX_PAD(0x40c, 0x078, 1, 0x0,   0, NO_PAD_CTRL)
+
+/* Babbage UART3 */
+#define MX51_PAD_EIM_D24__UART3_CTS     IOMUX_PAD(0x410, 0x07c, IOMUX_CONFIG_ALT3, 0x0, 0, MX51_UART3_PAD_CTRL)
+#define MX51_PAD_EIM_D25__UART3_RXD     IOMUX_PAD(0x414, 0x080, IOMUX_CONFIG_ALT3, 0x9f4, 0, MX51_UART3_PAD_CTRL)
+#define MX51_PAD_EIM_D26__UART3_TXD     IOMUX_PAD(0x418, 0x084, IOMUX_CONFIG_ALT3, 0x0, 0, MX51_UART3_PAD_CTRL)
+#define MX51_PAD_EIM_D27__UART3_RTS     IOMUX_PAD(0x41c, 0x088, IOMUX_CONFIG_ALT3, 0x9f0, 0, MX51_UART3_PAD_CTRL)
+
+#define MX51_PAD_EIM_D28__EIM_D28       IOMUX_PAD(0x420, 0x08c, 0, 0x0,   0, NO_PAD_CTRL)
+#define MX51_PAD_EIM_D29__EIM_D29       IOMUX_PAD(0x424, 0x090, 0, 0x0,   0, NO_PAD_CTRL)
+#define MX51_PAD_EIM_D30__EIM_D30       IOMUX_PAD(0x428, 0x094, 0, 0x0,   0, NO_PAD_CTRL)
+#define MX51_PAD_EIM_D31__EIM_D31       IOMUX_PAD(0x42c, 0x09c, 0, 0x0,   0, NO_PAD_CTRL)
+
+#define MX51_PAD_GPIO_2_10__EIM_A16     IOMUX_PAD(0x430, 0x09c, 1, 0x0,   0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_2_11__EIM_A17     IOMUX_PAD(0x434, 0x0a0, 1, 0x0,   0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_2_12__EIM_A18     IOMUX_PAD(0x438, 0x0a4, 1, 0x0,   0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_2_13__EIM_A19     IOMUX_PAD(0x43c, 0x0a8, 1, 0x0,   0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_2_14__EIM_A20     IOMUX_PAD(0x440, 0x0ac, 1, 0x0,   0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_2_15__EIM_A21     IOMUX_PAD(0x444, 0x0b0, 1, 0x0,   0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_2_16__EIM_A22     IOMUX_PAD(0x448, 0x0b4, 1, 0x0,   0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_2_17__EIM_A23     IOMUX_PAD(0x44c, 0x0b8, 1, 0x0,   0, NO_PAD_CTRL)
+
+#define MX51_PAD_GPIO_2_18__EIM_A24     IOMUX_PAD(0x450, 0x0bc, 1, 0x0,   0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_2_19__EIM_A25     IOMUX_PAD(0x454, 0x0c0, 1, 0x0,   0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_2_20__EIM_A26     IOMUX_PAD(0x458, 0x0c4, 1, 0x0,   0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_2_21__EIM_A27     IOMUX_PAD(0x45c, 0x0c8, 1, 0x0,   0, NO_PAD_CTRL)
+#define MX51_PAD_EIM_EB0__EIM_EB0       IOMUX_PAD(0x460, 0x0cc, 0, 0x0,   0, NO_PAD_CTRL)
+#define MX51_PAD_EIM_EB1__EIM_EB1       IOMUX_PAD(0x464, 0x0d0, 0, 0x0,   0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_2_22__EIM_EB2     IOMUX_PAD(0x468, 0x0d4, 1, 0x0,   0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_2_23__EIM_EB3     IOMUX_PAD(0x46c, 0x0d8, 1, 0x0,   0, NO_PAD_CTRL)
+
+#define MX51_PAD_GPIO_2_24__EIM_OE      IOMUX_PAD(0x470, 0x0dc, 1, 0x0,   0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_2_25__EIM_CS0     IOMUX_PAD(0x474, 0x0e0, 1, 0x0,   0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_2_26__EIM_CS1     IOMUX_PAD(0x478, 0x0e4, 1, 0x0,   0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_2_27__EIM_CS2     IOMUX_PAD(0x47c, 0x0e8, 1, 0x0,   0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_2_28__EIM_CS3     IOMUX_PAD(0x480, 0x0ec, 1, 0x0,   0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_2_29__EIM_CS4     IOMUX_PAD(0x484, 0x0f0, 1, 0x0,   0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_2_30__EIM_CS5     IOMUX_PAD(0x488, 0x0f4, 1, 0x0,   0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_2_31__EIM_DTACK   IOMUX_PAD(0x48c, 0x0f8, 1, 0x0,   0, NO_PAD_CTRL)
+
+#define MX51_PAD_GPIO_3_1__EIM_LBA      IOMUX_PAD(0x494, 0xFC, 1, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_3_2__EIM_CRE      IOMUX_PAD(0x4A0, 0x100, 1, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_DRAM_CS1__DRAM_CS1     IOMUX_PAD(0x4D0, 0x104, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_3_3__NANDF_WE_B   IOMUX_PAD(0x4E4, 0x108, 3, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_3_4__NANDF_RE_B   IOMUX_PAD(0x4E8, 0x10C, 3, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_3_5__NANDF_ALE    IOMUX_PAD(0x4EC, 0x110, 3, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_3_6__NANDF_CLE    IOMUX_PAD(0x4F0, 0x114, 3, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_3_7__NANDF_WP_B   IOMUX_PAD(0x4F4, 0x118, 3, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_3_8__NANDF_RB0    IOMUX_PAD(0x4F8, 0x11C, 3, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_3_9__NANDF_RB1    IOMUX_PAD(0x4FC, 0x120, 3, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_3_10__NANDF_RB2   IOMUX_PAD(0x500, 0x124, 3, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_3_11__NANDF_RB3   IOMUX_PAD(0x504, 0x128, 3, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_3_12__GPIO_NAND   IOMUX_PAD(0x514, 0x12C, 3, 0x0, 0, NO_PAD_CTRL)
+/* REVISIT: Not sure of these values
+
+  #define MX51_PAD_GPIO_1___NANDF_RB4   IOMUX_PAD(, , , 0x0, 0, NO_PAD_CTRL)
+  #define MX51_PAD_GPIO_3_13__NANDF_RB5 IOMUX_PAD(0x5D8, 0x130, 3, 0x0, 0, NO_PAD_CTRL)
+  #define MX51_PAD_GPIO_3_15__NANDF_RB7 IOMUX_PAD(0x5E0, 0x138, 3, 0x0, 0, NO_PAD_CTRL)
+*/
+#define MX51_PAD_GPIO_3_14__NANDF_RB6   IOMUX_PAD(0x5DC, 0x134, 3, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_3_16__NANDF_CS0   IOMUX_PAD(0x518, 0x130, 3, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_3_17__NANDF_CS1   IOMUX_PAD(0x51C, 0x134, 3, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_3_18__NANDF_CS2   IOMUX_PAD(0x520, 0x138, 3, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_3_19__NANDF_CS3   IOMUX_PAD(0x524, 0x13C, 3, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_3_20__NANDF_CS4   IOMUX_PAD(0x528, 0x140, 3, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_3_21__NANDF_CS5   IOMUX_PAD(0x52C, 0x144, 3, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_3_22__NANDF_CS6   IOMUX_PAD(0x530, 0x148, 3, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_3_23__NANDF_CS7   IOMUX_PAD(0x534, 0x14C, 3, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_3_24__NANDF_RDY_INT       IOMUX_PAD(0x538, 0x150, 3, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_3_25__NANDF_D15   IOMUX_PAD(0x53C, 0x154, 3, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_3_26__NANDF_D14   IOMUX_PAD(0x540, 0x158, 3, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_3_27__NANDF_D13   IOMUX_PAD(0x544, 0x15C, 3, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_3_28__NANDF_D12   IOMUX_PAD(0x548, 0x160, 3, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_3_29__NANDF_D11   IOMUX_PAD(0x54C, 0x164, 3, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_3_30__NANDF_D10   IOMUX_PAD(0x550, 0x168, 3, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_3_31__NANDF_D9    IOMUX_PAD(0x554, 0x16C, 3, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_4_0__NANDF_D8     IOMUX_PAD(0x558, 0x170, 3, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_4_1__NANDF_D7     IOMUX_PAD(0x55C, 0x174, 3, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_4_2__NANDF_D6     IOMUX_PAD(0x560, 0x178, 3, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_4_3__NANDF_D5     IOMUX_PAD(0x564, 0x17C, 3, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_4_4__NANDF_D4     IOMUX_PAD(0x568, 0x180, 3, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_4_5__NANDF_D3     IOMUX_PAD(0x56C, 0x184, 3, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_4_6__NANDF_D2     IOMUX_PAD(0x570, 0x188, 3, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_4_7__NANDF_D1     IOMUX_PAD(0x574, 0x18C, 3, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_4_8__NANDF_D0     IOMUX_PAD(0x578, 0x190, 3, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_3_12__CSI1_D8     IOMUX_PAD(0x57C, 0x194, 3, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_3_13__CSI1_D9     IOMUX_PAD(0x580, 0x198, 3, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_CSI1_D10__CSI1_D10     IOMUX_PAD(0x584, 0x19C, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_CSI1_D11__CSI1_D11     IOMUX_PAD(0x588, 0x1A0, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_CSI1_D12__CSI1_D12     IOMUX_PAD(0x58C, 0x1A4, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_CSI1_D13__CSI1_D13     IOMUX_PAD(0x590, 0x1A8, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_CSI1_D14__CSI1_D14     IOMUX_PAD(0x594, 0x1AC, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_CSI1_D15__CSI1_D15     IOMUX_PAD(0x598, 0x1B0, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_CSI1_D16__CSI1_D16     IOMUX_PAD(0x59C, 0x1B4, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_CSI1_D17__CSI1_D17     IOMUX_PAD(0x5A0, 0x1B8, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_CSI1_D18__CSI1_D18     IOMUX_PAD(0x5A4, 0x1BC, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_CSI1_D19__CSI1_D19     IOMUX_PAD(0x5A8, 0x1C0, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_CSI1_VSYNC__CSI1_VSYNC IOMUX_PAD(0x5AC, 0x1C4, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_CSI1_HSYNC__CSI1_HSYNC IOMUX_PAD(0x5B0, 0x1C8, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_CSI1_PIXCLK__CSI1_PIXCLK       IOMUX_PAD(0x5B4, 0x0, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_CSI1_MCLK__CSI1_MCLK   IOMUX_PAD(0x5B8, 0x0, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_CSI1_PKE0__CSI1_PKE0   IOMUX_PAD(0x860, 0x0, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_4_9__CSI2_D12     IOMUX_PAD(0x5BC, 0x1CC, 3, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_4_10__CSI2_D13    IOMUX_PAD(0x5C0, 0x1D0, 3, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_4_11__CSI2_D14    IOMUX_PAD(0x5C4, 0x1D4, 3, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_4_12__CSI2_D15    IOMUX_PAD(0x5C8, 0x1D8, 3, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_4_11__CSI2_D16    IOMUX_PAD(0x5CC, 0x1DC, 3, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_4_12__CSI2_D17    IOMUX_PAD(0x5D0, 0x1E0, 3, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_4_11__CSI2_D18    IOMUX_PAD(0x5D4, 0x1E4, 3, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_4_12__CSI2_D19    IOMUX_PAD(0x5D8, 0x1E8, 3, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_4_13__CSI2_VSYNC  IOMUX_PAD(0x5DC, 0x1EC, 3, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_4_14__CSI2_HSYNC  IOMUX_PAD(0x5E0, 0x1F0, 3, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_4_15__CSI2_PIXCLK IOMUX_PAD(0x5E4, 0x1F4, 3, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_CSI2_PKE0__CSI2_PKE0   IOMUX_PAD(0x81C, 0x0, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_4_16__I2C1_CLK    IOMUX_PAD(0x5E8, 0x1F8, 3, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_4_17__I2C1_DAT    IOMUX_PAD(0x5EC, 0x1FC, 3, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_4_18__AUD3_BB_TXD IOMUX_PAD(0x5F0, 0x200, 3, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_4_19__AUD3_BB_RXD IOMUX_PAD(0x5F4, 0x204, 3, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_4_20__AUD3_BB_CK  IOMUX_PAD(0x5F8, 0x208, 3, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_4_21__AUD3_BB_FS  IOMUX_PAD(0x5FC, 0x20C, 3, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_4_22__CSPI1_MOSI  IOMUX_PAD(0x600, 0x210, 3, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_4_23__CSPI1_MISO  IOMUX_PAD(0x604, 0x214, 3, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_4_24__CSPI1_SS0   IOMUX_PAD(0x608, 0x218, 3, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_4_25__CSPI1_SS1   IOMUX_PAD(0x60C, 0x21C, 3, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_4_26__CSPI1_RDY   IOMUX_PAD(0x610, 0x220, 3, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_4_27__CSPI1_SCLK  IOMUX_PAD(0x614, 0x224, 3, 0x0, 0, NO_PAD_CTRL)
+
+/* Babbage UART1 */
+#define MX51_PAD_UART1_RXD__UART1_RXD   IOMUX_PAD(0x618, 0x228, IOMUX_CONFIG_ALT0, 0x9e4, 0, MX51_UART1_PAD_CTRL | PAD_CTL_SRE_FAST)
+#define MX51_PAD_UART1_TXD__UART1_TXD   IOMUX_PAD(0x61C, 0x22C, IOMUX_CONFIG_ALT0, 0x0, 0, MX51_UART1_PAD_CTRL | PAD_CTL_SRE_FAST)
+#define MX51_PAD_UART1_RTS__UART1_RTS   IOMUX_PAD(0x620, 0x230, IOMUX_CONFIG_ALT0, 0x9e0, 0, MX51_UART1_PAD_CTRL)
+#define MX51_PAD_UART1_CTS__UART1_CTS   IOMUX_PAD(0x624, 0x234, IOMUX_CONFIG_ALT0, 0x0, 0, MX51_UART1_PAD_CTRL)
+
+/* Babbage UART2 */
+#define MX51_PAD_UART2_RXD__UART2_RXD   IOMUX_PAD(0x628, 0x238, IOMUX_CONFIG_ALT0, 0x9ec, 2, MX51_UART2_PAD_CTRL)
+#define MX51_PAD_UART2_TXD__UART2_TXD   IOMUX_PAD(0x62C, 0x23C, IOMUX_CONFIG_ALT0, 0x0, 0, MX51_UART2_PAD_CTRL)
+
+#define MX51_PAD_GPIO_1_22__UART3_RXD   IOMUX_PAD(0x630, 0x240, 3, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_1_23__UART3_TXD   IOMUX_PAD(0x634, 0x244, 3, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_1_24__OWIRE_LINE  IOMUX_PAD(0x638, 0x248, 3, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_KEY_ROW0__KEY_ROW0     IOMUX_PAD(0x63C, 0x24C, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_KEY_ROW1__KEY_ROW1     IOMUX_PAD(0x640, 0x250, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_KEY_ROW2__KEY_ROW2     IOMUX_PAD(0x644, 0x254, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_KEY_ROW3__KEY_ROW3     IOMUX_PAD(0x648, 0x258, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_KEY_COL0__KEY_COL0     IOMUX_PAD(0x64C, 0x25C, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_KEY_COL1__KEY_COL1     IOMUX_PAD(0x650, 0x260, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_KEY_COL2__KEY_COL2     IOMUX_PAD(0x654, 0x264, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_KEY_COL3__KEY_COL3     IOMUX_PAD(0x658, 0x268, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_KEY_COL4__KEY_COL4     IOMUX_PAD(0x65C, 0x26C, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_KEY_COL5__KEY_COL5     IOMUX_PAD(0x660, 0x270, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_1_25__USBH1_CLK   IOMUX_PAD(0x678, 0x278, 2, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_1_26__USBH1_DIR   IOMUX_PAD(0x67C, 0x27C, 2, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_1_27__USBH1_STP   IOMUX_PAD(0x680, 0x280, 2, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_1_28__USBH1_NXT   IOMUX_PAD(0x684, 0x284, 2, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_1_11__USBH1_DATA0 IOMUX_PAD(0x688, 0x288, 2, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_1_12__USBH1_DATA1 IOMUX_PAD(0x68C, 0x28C, 2, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_1_13__USBH1_DATA2 IOMUX_PAD(0x690, 0x290, 2, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_1_14__USBH1_DATA3 IOMUX_PAD(0x694, 0x294, 2, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_1_15__USBH1_DATA4 IOMUX_PAD(0x698, 0x298, 2, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_1_16__USBH1_DATA5 IOMUX_PAD(0x69C, 0x29C, 2, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_1_17__USBH1_DATA6 IOMUX_PAD(0x6A0, 0x2A0, 2, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_1_18__USBH1_DATA7 IOMUX_PAD(0x6A4, 0x2A4, 2, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_3_0__DI1_PIN11    IOMUX_PAD(0x6A8, 0x2A8, 4, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_3_1__DI1_PIN12    IOMUX_PAD(0x6AC, 0x2AC, 4, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_3_2__DI1_PIN13    IOMUX_PAD(0x6B0, 0x2B0, 4, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_3_3__DI1_D0_CS    IOMUX_PAD(0x6B4, 0x2B4, 4, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_3_4__DI1_D1_CS    IOMUX_PAD(0x6B8, 0x2B8, 4, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_3_5__DISPB2_SER_DIN       IOMUX_PAD(0x6BC, 0x2BC, 4, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_3_6__DISPB2_SER_DIO       IOMUX_PAD(0x6C0, 0x2C0, 4, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_3_7__DISPB2_SER_CLK       IOMUX_PAD(0x6C4, 0x2C4, 4, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_3_8__DISPB2_SER_RS        IOMUX_PAD(0x6C8, 0x2C8, 4, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_DISP1_DAT0__DISP1_DAT0 IOMUX_PAD(0x6CC, 0x2CC, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_DISP1_DAT1__DISP1_DAT1 IOMUX_PAD(0x6D0, 0x2D0, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_DISP1_DAT2__DISP1_DAT2 IOMUX_PAD(0x6D4, 0x2D4, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_DISP1_DAT3__DISP1_DAT3 IOMUX_PAD(0x6D8, 0x2D8, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_DISP1_DAT4__DISP1_DAT4 IOMUX_PAD(0x6DC, 0x2DC, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_DISP1_DAT5__DISP1_DAT5 IOMUX_PAD(0x6E0, 0x2E0, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_DISP1_DAT6__DISP1_DAT6 IOMUX_PAD(0x6E4, 0x2E4, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_DISP1_DAT7__DISP1_DAT7 IOMUX_PAD(0x6E8, 0x2E8, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_DISP1_DAT8__DISP1_DAT8 IOMUX_PAD(0x6EC, 0x2EC, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_DISP1_DAT9__DISP1_DAT9 IOMUX_PAD(0x6F0, 0x2F0, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_DISP1_DAT10__DISP1_DAT10       IOMUX_PAD(0x6F4, 0x2F4, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_DISP1_DAT11__DISP1_DAT11       IOMUX_PAD(0x6F8, 0x2F8, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_DISP1_DAT12__DISP1_DAT12       IOMUX_PAD(0x6FC, 0x2FC, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_DISP1_DAT13__DISP1_DAT13       IOMUX_PAD(0x700, 0x300, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_DISP1_DAT14__DISP1_DAT14       IOMUX_PAD(0x704, 0x304, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_DISP1_DAT15__DISP1_DAT15       IOMUX_PAD(0x708, 0x308, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_DISP1_DAT16__DISP1_DAT16       IOMUX_PAD(0x70C, 0x30C, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_DISP1_DAT17__DISP1_DAT17       IOMUX_PAD(0x710, 0x310, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_DISP1_DAT18__DISP1_DAT18       IOMUX_PAD(0x714, 0x314, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_DISP1_DAT19__DISP1_DAT19       IOMUX_PAD(0x718, 0x318, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_DISP1_DAT20__DISP1_DAT20       IOMUX_PAD(0x71C, 0x31C, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_DISP1_DAT21__DISP1_DAT21       IOMUX_PAD(0x720, 0x320, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_DISP1_DAT22__DISP1_DAT22       IOMUX_PAD(0x724, 0x324, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_DISP1_DAT23__DISP1_DAT23       IOMUX_PAD(0x728, 0x328, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_DI1_PIN3__DI1_PIN3     IOMUX_PAD(0x72C, 0x32C, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_DI1_PIN2__DI1_PIN2     IOMUX_PAD(0x734, 0x330, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_DI_GP1__DI_GP1 IOMUX_PAD(0x73C, 0x334, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_DI_GP2__DI_GP2 IOMUX_PAD(0x740, 0x338, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_DI_GP3__DI_GP3 IOMUX_PAD(0x744, 0x33C, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_DI2_PIN4__DI2_PIN4     IOMUX_PAD(0x748, 0x340, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_DI2_PIN2__DI2_PIN2     IOMUX_PAD(0x74C, 0x344, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_DI2_PIN3__DI2_PIN3     IOMUX_PAD(0x750, 0x348, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_DI2_DISP_CLK__DI2_DISP_CLK     IOMUX_PAD(0x754, 0x34C, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_DI_GP4__DI_GP4 IOMUX_PAD(0x758, 0x350, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_DISP2_DAT0__DISP2_DAT0 IOMUX_PAD(0x75C, 0x354, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_DISP2_DAT1__DISP2_DAT1 IOMUX_PAD(0x760, 0x358, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_DISP2_DAT2__DISP2_DAT2 IOMUX_PAD(0x764, 0x35C, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_DISP2_DAT3__DISP2_DAT3 IOMUX_PAD(0x768, 0x360, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_DISP2_DAT4__DISP2_DAT4 IOMUX_PAD(0x76C, 0x364, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_DISP2_DAT5__DISP2_DAT5 IOMUX_PAD(0x770, 0x368, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_1_19__DISP2_DAT6  IOMUX_PAD(0x774, 0x36C, 5, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_1_29__DISP2_DAT7  IOMUX_PAD(0x778, 0x370, 5, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_1_30__DISP2_DAT8  IOMUX_PAD(0x77C, 0x374, 5, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_1_31__DISP2_DAT9  IOMUX_PAD(0x780, 0x378, 5, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_DISP2_DAT10__DISP2_DAT10       IOMUX_PAD(0x784, 0x37C, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_DISP2_DAT11__DISP2_DAT11       IOMUX_PAD(0x788, 0x380, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_DISP2_DAT12__DISP2_DAT12       IOMUX_PAD(0x78C, 0x384, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_DISP2_DAT13__DISP2_DAT13       IOMUX_PAD(0x790, 0x388, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_DISP2_DAT14__DISP2_DAT14       IOMUX_PAD(0x794, 0x38C, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_DISP2_DAT15__DISP2_DAT15       IOMUX_PAD(0x798, 0x390, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_SD1_CMD__SD1_CMD       IOMUX_PAD(0x79C, 0x394, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_SD1_CLK__SD1_CLK       IOMUX_PAD(0x7A0, 0x398, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_SD1_DATA0__SD1_DATA0   IOMUX_PAD(0x7A4, 0x39C, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_SD1_DATA1__SD1_DATA1   IOMUX_PAD(0x7A8, 0x3A0, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_SD1_DATA2__SD1_DATA2   IOMUX_PAD(0x7AC, 0x3A4, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_SD1_DATA3__SD1_DATA3   IOMUX_PAD(0x7B0, 0x3A8, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_1_0__GPIO1_0      IOMUX_PAD(0x7B4, 0x3AC, 1, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_1_1__GPIO1_1      IOMUX_PAD(0x7B8, 0x3B0, 1, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_SD2_CMD__SD2_CMD       IOMUX_PAD(0x7BC, 0x3B4, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_SD2_CLK__SD2_CLK       IOMUX_PAD(0x7C0, 0x3B8, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_SD2_DATA0__SD2_DATA0   IOMUX_PAD(0x7C4, 0x3BC, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_SD2_DATA1__SD2_DATA1   IOMUX_PAD(0x7C8, 0x3C0, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_SD2_DATA2__SD2_DATA2   IOMUX_PAD(0x7CC, 0x3C4, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_SD2_DATA3__SD2_DATA3   IOMUX_PAD(0x7D0, 0x3C8, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_1_2__GPIO1_2      IOMUX_PAD(0x7D4, 0x3CC, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_1_3__GPIO1_3      IOMUX_PAD(0x7D8, 0x3D0, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_PMIC_INT_REQ__PMIC_INT_REQ     IOMUX_PAD(0x7FC, 0x3D4, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_1_4__GPIO1_4      IOMUX_PAD(0x804, 0x3D8, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_1_5__GPIO1_5      IOMUX_PAD(0x808, 0x3DC, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_1_6__GPIO1_6      IOMUX_PAD(0x80C, 0x3E0, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_1_7__GPIO1_7      IOMUX_PAD(0x810, 0x3E4, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_1_8__GPIO1_8      IOMUX_PAD(0x814, 0x3E8, 0, 0x0, 1, \
+                                                (PAD_CTL_SRE_SLOW | PAD_CTL_DSE_MED | PAD_CTL_PUS_100K_UP |  PAD_CTL_HYS))
+#define MX51_PAD_GPIO_1_9__GPIO1_9      IOMUX_PAD(0x818, 0x3EC, 0, 0x0, 0, NO_PAD_CTRL)
+
+/* EIM */
+#define MX51_PAD_EIM_DA0__EIM_DA0       IOMUX_PAD(0x7a8, 0x01c, 0, 0x0,   0, NO_PAD_CTRL)
+#define MX51_PAD_EIM_DA1__EIM_DA1       IOMUX_PAD(0x7a8, 0x020, 0, 0x0,   0, NO_PAD_CTRL)
+#define MX51_PAD_EIM_DA2__EIM_DA2       IOMUX_PAD(0x7a8, 0x024, 0, 0x0,   0, NO_PAD_CTRL)
+#define MX51_PAD_EIM_DA3__EIM_DA3       IOMUX_PAD(0x7a8, 0x028, 0, 0x0,   0, NO_PAD_CTRL)
+#define MX51_PAD_EIM_DA4__EIM_DA4       IOMUX_PAD(0x7ac, 0x02c, 0, 0x0,   0, NO_PAD_CTRL)
+#define MX51_PAD_EIM_DA5__EIM_DA5       IOMUX_PAD(0x7ac, 0x030, 0, 0x0,   0, NO_PAD_CTRL)
+#define MX51_PAD_EIM_DA6__EIM_DA6       IOMUX_PAD(0x7ac, 0x034, 0, 0x0,   0, NO_PAD_CTRL)
+#define MX51_PAD_EIM_DA7__EIM_DA7       IOMUX_PAD(0x7ac, 0x038, 0, 0x0,   0, NO_PAD_CTRL)
+
+#define MX51_PAD_EIM_DA8__EIM_DA8       IOMUX_PAD(0x7b0, 0x03c, 0, 0x0,   0, NO_PAD_CTRL)
+#define MX51_PAD_EIM_DA9__EIM_DA9       IOMUX_PAD(0x7b0, 0x040, 0, 0x0,   0, NO_PAD_CTRL)
+#define MX51_PAD_EIM_DA10__EIM_DA10     IOMUX_PAD(0x7b0, 0x044, 0, 0x0,   0, NO_PAD_CTRL)
+#define MX51_PAD_EIM_DA11__EIM_DA11     IOMUX_PAD(0x7b0, 0x048, 0, 0x0,   0, NO_PAD_CTRL)
+#define MX51_PAD_EIM_DA12__EIM_DA12     IOMUX_PAD(0x7bc, 0x04c, 0, 0x0,   0, NO_PAD_CTRL)
+#define MX51_PAD_EIM_DA13__EIM_DA13     IOMUX_PAD(0x7bc, 0x050, 0, 0x0,   0, NO_PAD_CTRL)
+#define MX51_PAD_EIM_DA14__EIM_DA14     IOMUX_PAD(0x7bc, 0x054, 0, 0x0,   0, NO_PAD_CTRL)
+#define MX51_PAD_EIM_DA15__EIM_DA15     IOMUX_PAD(0x7bc, 0x058, 0, 0x0,   0, NO_PAD_CTRL)
+
+#endif /* __MACH_IOMUX_MX51_H__ */
diff --git a/arch/arm/plat-mxc/include/mach/iomux-v1.h b/arch/arm/plat-mxc/include/mach/iomux-v1.h
new file mode 100644
index 000000000000..884f5753f279
--- /dev/null
+++ b/arch/arm/plat-mxc/include/mach/iomux-v1.h
@@ -0,0 +1,103 @@
+/*
+ * Copyright (C) 2008 by Sascha Hauer <kernel@pengutronix.de>
+ * Copyright (C) 2009 by Holger Schurig <hs4233@mail.mn-solutions.de>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+ * MA 02110-1301, USA.
+ */
+#ifndef __MACH_IOMUX_V1_H__
+#define __MACH_IOMUX_V1_H__
+
+/*
+*  GPIO Module and I/O Multiplexer
+*  x = 0..3 for reg_A, reg_B, reg_C, reg_D
+*/
+#define MXC_DDIR(x)     (0x00 + ((x) << 8))
+#define MXC_OCR1(x)     (0x04 + ((x) << 8))
+#define MXC_OCR2(x)     (0x08 + ((x) << 8))
+#define MXC_ICONFA1(x)  (0x0c + ((x) << 8))
+#define MXC_ICONFA2(x)  (0x10 + ((x) << 8))
+#define MXC_ICONFB1(x)  (0x14 + ((x) << 8))
+#define MXC_ICONFB2(x)  (0x18 + ((x) << 8))
+#define MXC_DR(x)       (0x1c + ((x) << 8))
+#define MXC_GIUS(x)     (0x20 + ((x) << 8))
+#define MXC_SSR(x)      (0x24 + ((x) << 8))
+#define MXC_ICR1(x)     (0x28 + ((x) << 8))
+#define MXC_ICR2(x)     (0x2c + ((x) << 8))
+#define MXC_IMR(x)      (0x30 + ((x) << 8))
+#define MXC_ISR(x)      (0x34 + ((x) << 8))
+#define MXC_GPR(x)      (0x38 + ((x) << 8))
+#define MXC_SWR(x)      (0x3c + ((x) << 8))
+#define MXC_PUEN(x)     (0x40 + ((x) << 8))
+
+#define MX1_NUM_GPIO_PORT       4
+#define MX21_NUM_GPIO_PORT      6
+#define MX27_NUM_GPIO_PORT      6
+
+#define GPIO_PIN_MASK 0x1f
+
+#define GPIO_PORT_SHIFT 5
+#define GPIO_PORT_MASK (0x7 << GPIO_PORT_SHIFT)
+
+#define GPIO_PORTA      (0 << GPIO_PORT_SHIFT)
+#define GPIO_PORTB      (1 << GPIO_PORT_SHIFT)
+#define GPIO_PORTC      (2 << GPIO_PORT_SHIFT)
+#define GPIO_PORTD      (3 << GPIO_PORT_SHIFT)
+#define GPIO_PORTE      (4 << GPIO_PORT_SHIFT)
+#define GPIO_PORTF      (5 << GPIO_PORT_SHIFT)
+
+#define GPIO_OUT        (1 << 8)
+#define GPIO_IN         (0 << 8)
+#define GPIO_PUEN       (1 << 9)
+
+#define GPIO_PF         (1 << 10)
+#define GPIO_AF         (1 << 11)
+
+#define GPIO_OCR_SHIFT 12
+#define GPIO_OCR_MASK   (3 << GPIO_OCR_SHIFT)
+#define GPIO_AIN        (0 << GPIO_OCR_SHIFT)
+#define GPIO_BIN        (1 << GPIO_OCR_SHIFT)
+#define GPIO_CIN        (2 << GPIO_OCR_SHIFT)
+#define GPIO_GPIO       (3 << GPIO_OCR_SHIFT)
+
+#define GPIO_AOUT_SHIFT 14
+#define GPIO_AOUT_MASK  (3 << GPIO_AOUT_SHIFT)
+#define GPIO_AOUT       (0 << GPIO_AOUT_SHIFT)
+#define GPIO_AOUT_ISR   (1 << GPIO_AOUT_SHIFT)
+#define GPIO_AOUT_0     (2 << GPIO_AOUT_SHIFT)
+#define GPIO_AOUT_1     (3 << GPIO_AOUT_SHIFT)
+
+#define GPIO_BOUT_SHIFT 16
+#define GPIO_BOUT_MASK  (3 << GPIO_BOUT_SHIFT)
+#define GPIO_BOUT       (0 << GPIO_BOUT_SHIFT)
+#define GPIO_BOUT_ISR   (1 << GPIO_BOUT_SHIFT)
+#define GPIO_BOUT_0     (2 << GPIO_BOUT_SHIFT)
+#define GPIO_BOUT_1     (3 << GPIO_BOUT_SHIFT)
+
+/* decode irq number to use with IMR(x), ISR(x) and friends */
+#define IRQ_TO_REG(irq) ((irq - MXC_INTERNAL_IRQS) >> 5)
+
+#define IRQ_GPIOA(x)  (MXC_GPIO_IRQ_START + x)
+#define IRQ_GPIOB(x)  (IRQ_GPIOA(32) + x)
+#define IRQ_GPIOC(x)  (IRQ_GPIOB(32) + x)
+#define IRQ_GPIOD(x)  (IRQ_GPIOC(32) + x)
+#define IRQ_GPIOE(x)  (IRQ_GPIOD(32) + x)
+#define IRQ_GPIOF(x)  (IRQ_GPIOE(32) + x)
+
+extern int mxc_gpio_mode(int gpio_mode);
+extern int mxc_gpio_setup_multiple_pins(const int *pin_list, unsigned count,
+                const char *label);
+extern void mxc_gpio_release_multiple_pins(const int *pin_list, int count);
+
+#endif /* __MACH_IOMUX_V1_H__ */
diff --git a/arch/arm/plat-mxc/include/mach/iomux-v3.h b/arch/arm/plat-mxc/include/mach/iomux-v3.h
index 1deda0184892..f2f73d31d5ba 100644
--- a/arch/arm/plat-mxc/include/mach/iomux-v3.h
+++ b/arch/arm/plat-mxc/include/mach/iomux-v3.h
@@ -81,11 +81,13 @@ struct pad_desc {
 
 #define PAD_CTL_ODE                     (1 << 3)
 
-#define PAD_CTL_DSE_STANDARD            (0 << 1)
-#define PAD_CTL_DSE_HIGH                (1 << 1)
-#define PAD_CTL_DSE_MAX                 (2 << 1)
+#define PAD_CTL_DSE_LOW                 (0 << 1)
+#define PAD_CTL_DSE_MED                 (1 << 1)
+#define PAD_CTL_DSE_HIGH                (2 << 1)
+#define PAD_CTL_DSE_MAX                 (3 << 1)
 
 #define PAD_CTL_SRE_FAST                (1 << 0)
+#define PAD_CTL_SRE_SLOW                (0 << 0)
 
 /*
  * setups a single pad in the iomuxer
diff --git a/arch/arm/plat-mxc/include/mach/iomux.h b/arch/arm/plat-mxc/include/mach/iomux.h
index 011cfcd8b820..3d226d7e7be2 100644
--- a/arch/arm/plat-mxc/include/mach/iomux.h
+++ b/arch/arm/plat-mxc/include/mach/iomux.h
@@ -1,102 +1,14 @@
 /*
-* Copyright (C) 2008 by Sascha Hauer <kernel@pengutronix.de>
-* Copyright (C) 2009 by Holger Schurig <hs4233@mail.mn-solutions.de>
-*
-* This program is free software; you can redistribute it and/or
-* modify it under the terms of the GNU General Public License
-* as published by the Free Software Foundation; either version 2
-* of the License, or (at your option) any later version.
-* This program is distributed in the hope that it will be useful,
-* but WITHOUT ANY WARRANTY; without even the implied warranty of
-* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-* GNU General Public License for more details.
-*
-* You should have received a copy of the GNU General Public License
-* along with this program; if not, write to the Free Software
-* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
-* MA 02110-1301, USA.
-*/
-
-#ifndef _MXC_IOMUX_H
-#define _MXC_IOMUX_H
-
-/*
-*  GPIO Module and I/O Multiplexer
-*  x = 0..3 for reg_A, reg_B, reg_C, reg_D
-*/
-#define VA_GPIO_BASE    IO_ADDRESS(GPIO_BASE_ADDR)
-#define MXC_DDIR(x)    (0x00 + ((x) << 8))
-#define MXC_OCR1(x)    (0x04 + ((x) << 8))
-#define MXC_OCR2(x)    (0x08 + ((x) << 8))
-#define MXC_ICONFA1(x) (0x0c + ((x) << 8))
-#define MXC_ICONFA2(x) (0x10 + ((x) << 8))
-#define MXC_ICONFB1(x) (0x14 + ((x) << 8))
-#define MXC_ICONFB2(x) (0x18 + ((x) << 8))
-#define MXC_DR(x)      (0x1c + ((x) << 8))
-#define MXC_GIUS(x)    (0x20 + ((x) << 8))
-#define MXC_SSR(x)     (0x24 + ((x) << 8))
-#define MXC_ICR1(x)    (0x28 + ((x) << 8))
-#define MXC_ICR2(x)    (0x2c + ((x) << 8))
-#define MXC_IMR(x)     (0x30 + ((x) << 8))
-#define MXC_ISR(x)     (0x34 + ((x) << 8))
-#define MXC_GPR(x)     (0x38 + ((x) << 8))
-#define MXC_SWR(x)     (0x3c + ((x) << 8))
-#define MXC_PUEN(x)    (0x40 + ((x) << 8))
-
-#ifdef CONFIG_ARCH_MX1
-# define GPIO_PORT_MAX  3
-#endif
-#ifdef CONFIG_ARCH_MX2
-# define GPIO_PORT_MAX  5
-#endif
-#ifdef CONFIG_ARCH_MX25
-# define GPIO_PORT_MAX  3
-#endif
-
-#ifndef GPIO_PORT_MAX
-# error "GPIO config port count unknown!"
-#endif
-
-#define GPIO_PIN_MASK 0x1f
-
-#define GPIO_PORT_SHIFT 5
-#define GPIO_PORT_MASK (0x7 << GPIO_PORT_SHIFT)
-
-#define GPIO_PORTA (0 << GPIO_PORT_SHIFT)
-#define GPIO_PORTB (1 << GPIO_PORT_SHIFT)
-#define GPIO_PORTC (2 << GPIO_PORT_SHIFT)
-#define GPIO_PORTD (3 << GPIO_PORT_SHIFT)
-#define GPIO_PORTE (4 << GPIO_PORT_SHIFT)
-#define GPIO_PORTF (5 << GPIO_PORT_SHIFT)
-
-#define GPIO_OUT   (1 << 8)
-#define GPIO_IN    (0 << 8)
-#define GPIO_PUEN  (1 << 9)
-
-#define GPIO_PF    (1 << 10)
-#define GPIO_AF    (1 << 11)
-
-#define GPIO_OCR_SHIFT 12
-#define GPIO_OCR_MASK (3 << GPIO_OCR_SHIFT)
-#define GPIO_AIN   (0 << GPIO_OCR_SHIFT)
-#define GPIO_BIN   (1 << GPIO_OCR_SHIFT)
-#define GPIO_CIN   (2 << GPIO_OCR_SHIFT)
-#define GPIO_GPIO  (3 << GPIO_OCR_SHIFT)
-
-#define GPIO_AOUT_SHIFT 14
-#define GPIO_AOUT_MASK (3 << GPIO_AOUT_SHIFT)
-#define GPIO_AOUT     (0 << GPIO_AOUT_SHIFT)
-#define GPIO_AOUT_ISR (1 << GPIO_AOUT_SHIFT)
-#define GPIO_AOUT_0   (2 << GPIO_AOUT_SHIFT)
-#define GPIO_AOUT_1   (3 << GPIO_AOUT_SHIFT)
-
-#define GPIO_BOUT_SHIFT 16
-#define GPIO_BOUT_MASK (3 << GPIO_BOUT_SHIFT)
-#define GPIO_BOUT      (0 << GPIO_BOUT_SHIFT)
-#define GPIO_BOUT_ISR  (1 << GPIO_BOUT_SHIFT)
-#define GPIO_BOUT_0    (2 << GPIO_BOUT_SHIFT)
-#define GPIO_BOUT_1    (3 << GPIO_BOUT_SHIFT)
+ * Copyright (C) 2010 Uwe Kleine-Koenig, Pengutronix
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published by
+ * the Free Software Foundation.
+ */
+#ifndef __MACH_IOMUX_H__
+#define __MACH_IOMUX_H__
 
+/* This file will go away, please include mach/iomux-mx... directly */
 
 #ifdef CONFIG_ARCH_MX1
 #include <mach/iomux-mx1.h>
@@ -110,25 +22,5 @@
 #include <mach/iomux-mx27.h>
 #endif
 #endif
-#ifdef CONFIG_ARCH_MX25
-#include <mach/iomux-mx25.h>
-#endif
 
-
-/* decode irq number to use with IMR(x), ISR(x) and friends */
-#define IRQ_TO_REG(irq) ((irq - MXC_INTERNAL_IRQS) >> 5)
-
-#define IRQ_GPIOA(x)  (MXC_GPIO_IRQ_START + x)
-#define IRQ_GPIOB(x)  (IRQ_GPIOA(32) + x)
-#define IRQ_GPIOC(x)  (IRQ_GPIOB(32) + x)
-#define IRQ_GPIOD(x)  (IRQ_GPIOC(32) + x)
-#define IRQ_GPIOE(x)  (IRQ_GPIOD(32) + x)
-#define IRQ_GPIOF(x)  (IRQ_GPIOE(32) + x)
-
-
-extern void mxc_gpio_mode(int gpio_mode);
-extern int mxc_gpio_setup_multiple_pins(const int *pin_list, unsigned count,
-        const char *label);
-extern void mxc_gpio_release_multiple_pins(const int *pin_list, int count);
-
-#endif
+#endif /* __MACH_IOMUX_H__ */
diff --git a/arch/arm/plat-mxc/include/mach/irqs.h b/arch/arm/plat-mxc/include/mach/irqs.h
index 0cb347645db4..86781f7b0c0c 100644
--- a/arch/arm/plat-mxc/include/mach/irqs.h
+++ b/arch/arm/plat-mxc/include/mach/irqs.h
@@ -12,22 +12,29 @@
 #define __ASM_ARCH_MXC_IRQS_H__
 
 /*
- * So far all i.MX SoCs have 64 internal interrupts
+ * SoCs with TZIC interrupt controller have 128 IRQs, those with AVIC have 64
  */
+#ifdef CONFIG_MXC_TZIC
+#define MXC_INTERNAL_IRQS       128
+#else
 #define MXC_INTERNAL_IRQS       64
+#endif
 
 #define MXC_GPIO_IRQ_START      MXC_INTERNAL_IRQS
 
-#if defined CONFIG_ARCH_MX1
-#define MXC_GPIO_IRQS           (32 * 4)
-#elif defined CONFIG_ARCH_MX2
+/* these are ordered by size to support multi-SoC kernels */
+#if defined CONFIG_ARCH_MX2
 #define MXC_GPIO_IRQS           (32 * 6)
-#elif defined CONFIG_ARCH_MX3
-#define MXC_GPIO_IRQS           (32 * 3)
+#elif defined CONFIG_ARCH_MX1
+#define MXC_GPIO_IRQS           (32 * 4)
 #elif defined CONFIG_ARCH_MX25
 #define MXC_GPIO_IRQS           (32 * 4)
+#elif defined CONFIG_ARCH_MX5
+#define MXC_GPIO_IRQS           (32 * 4)
 #elif defined CONFIG_ARCH_MXC91231
 #define MXC_GPIO_IRQS           (32 * 4)
+#elif defined CONFIG_ARCH_MX3
+#define MXC_GPIO_IRQS           (32 * 3)
 #endif
 
 /*
@@ -51,6 +58,7 @@
 #else
 #define MX3_IPU_IRQS 0
 #endif
+/* REVISIT: Add IPU irqs on IMX51 */
 
 #define NR_IRQS                 (MXC_IPU_IRQ_START + MX3_IPU_IRQS)
 
diff --git a/arch/arm/plat-mxc/include/mach/memory.h b/arch/arm/plat-mxc/include/mach/memory.h
index d3afafdcc0e5..c4b40c35a6a1 100644
--- a/arch/arm/plat-mxc/include/mach/memory.h
+++ b/arch/arm/plat-mxc/include/mach/memory.h
@@ -11,37 +11,45 @@
 #ifndef __ASM_ARCH_MXC_MEMORY_H__
 #define __ASM_ARCH_MXC_MEMORY_H__
 
-#if defined CONFIG_ARCH_MX1
-#define PHYS_OFFSET             UL(0x08000000)
-#elif defined CONFIG_ARCH_MX2
-#ifdef CONFIG_MACH_MX21
-#define PHYS_OFFSET             UL(0xC0000000)
-#endif
-#ifdef CONFIG_MACH_MX27
-#define PHYS_OFFSET             UL(0xA0000000)
-#endif
-#elif defined CONFIG_ARCH_MX3
-#define PHYS_OFFSET             UL(0x80000000)
-#elif defined CONFIG_ARCH_MX25
-#define PHYS_OFFSET             UL(0x80000000)
-#elif defined CONFIG_ARCH_MXC91231
-#define PHYS_OFFSET             UL(0x90000000)
+#define MX1_PHYS_OFFSET         UL(0x08000000)
+#define MX21_PHYS_OFFSET        UL(0xc0000000)
+#define MX25_PHYS_OFFSET        UL(0x80000000)
+#define MX27_PHYS_OFFSET        UL(0xa0000000)
+#define MX3x_PHYS_OFFSET        UL(0x80000000)
+#define MX51_PHYS_OFFSET        UL(0x90000000)
+#define MXC91231_PHYS_OFFSET    UL(0x90000000)
+
+#if !defined(CONFIG_RUNTIME_PHYS_OFFSET)
+# if defined CONFIG_ARCH_MX1
+#  define PHYS_OFFSET           MX1_PHYS_OFFSET
+# elif defined CONFIG_MACH_MX21
+#  define PHYS_OFFSET           MX21_PHYS_OFFSET
+# elif defined CONFIG_ARCH_MX25
+#  define PHYS_OFFSET           MX25_PHYS_OFFSET
+# elif defined CONFIG_MACH_MX27
+#  define PHYS_OFFSET           MX27_PHYS_OFFSET
+# elif defined CONFIG_ARCH_MX3
+#  define PHYS_OFFSET           MX3x_PHYS_OFFSET
+# elif defined CONFIG_ARCH_MXC91231
+#  define PHYS_OFFSET           MXC91231_PHYS_OFFSET
+# elif defined CONFIG_ARCH_MX5
+#  define PHYS_OFFSET           MX51_PHYS_OFFSET
+# endif
 #endif
 
-#if defined(CONFIG_MX1_VIDEO)
+#if defined(CONFIG_MX3_VIDEO)
 /*
  * Increase size of DMA-consistent memory region.
- * This is required for i.MX camera driver to capture at least four VGA frames.
+ * This is required for mx3 camera driver to capture at least two QXGA frames.
  */
-#define CONSISTENT_DMA_SIZE SZ_4M
-#endif /* CONFIG_MX1_VIDEO */
+#define CONSISTENT_DMA_SIZE SZ_8M
 
-#if defined(CONFIG_MX3_VIDEO)
+#elif defined(CONFIG_MX1_VIDEO)
 /*
  * Increase size of DMA-consistent memory region.
- * This is required for mx3 camera driver to capture at least two QXGA frames.
+ * This is required for i.MX camera driver to capture at least four VGA frames.
  */
-#define CONSISTENT_DMA_SIZE SZ_8M
-#endif /* CONFIG_MX3_VIDEO */
+#define CONSISTENT_DMA_SIZE SZ_4M
+#endif /* CONFIG_MX1_VIDEO */
 
 #endif /* __ASM_ARCH_MXC_MEMORY_H__ */
diff --git a/arch/arm/plat-mxc/include/mach/mtd-xip.h b/arch/arm/plat-mxc/include/mach/mtd-xip.h
deleted file mode 100644
index 1ab1bba5688d..000000000000
--- a/arch/arm/plat-mxc/include/mach/mtd-xip.h
+++ /dev/null
@@ -1,34 +0,0 @@
-/*
- * MTD primitives for XIP support. Architecture specific functions
- *
- * Do not include this file directly. It's included from linux/mtd/xip.h
- *
- * Copyright (C) 2008 Darius Augulis <augulis.darius@gmail.com>, Teltonika, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- */
-
-#include <mach/mxc_timer.h>
-
-#ifndef __ARCH_IMX_MTD_XIP_H__
-#define __ARCH_IMX_MTD_XIP_H__
-
-#ifdef CONFIG_ARCH_MX1
-/* AITC registers */
-#define AITC_BASE       IO_ADDRESS(AVIC_BASE_ADDR)
-#define NIPNDH          (AITC_BASE + 0x58)
-#define NIPNDL          (AITC_BASE + 0x5C)
-#define INTENABLEH      (AITC_BASE + 0x10)
-#define INTENABLEL      (AITC_BASE + 0x14)
-/* MTD macros */
-#define xip_irqpending() ((__raw_readl(INTENABLEH) &  __raw_readl(NIPNDH)) \
-                        || (__raw_readl(INTENABLEL) &  __raw_readl(NIPNDL)))
-#define xip_currtime()          (__raw_readl(TIMER_BASE + MXC_TCN))
-#define xip_elapsed_since(x)    (signed)((__raw_readl(TIMER_BASE + MXC_TCN) - (x)) / 96)
-#define xip_cpu_idle()          asm volatile ("mcr p15, 0, %0, c7, c0, 4" :: "r" (0))
-#endif /* CONFIG_ARCH_MX1 */
-
-#endif /* __ARCH_IMX_MTD_XIP_H__ */
diff --git a/arch/arm/plat-mxc/include/mach/mx1.h b/arch/arm/plat-mxc/include/mach/mx1.h
index 1b2890a5c452..5eba7e6785de 100644
--- a/arch/arm/plat-mxc/include/mach/mx1.h
+++ b/arch/arm/plat-mxc/include/mach/mx1.h
@@ -9,156 +9,289 @@
  * published by the Free Software Foundation.
  */
 
-#ifndef __ASM_ARCH_MXC_MX1_H__
-#define __ASM_ARCH_MXC_MX1_H__
+#ifndef __MACH_MX1_H__
+#define __MACH_MX1_H__
 
 #include <mach/vmalloc.h>
 
 /*
  * Memory map
  */
-#define IMX_IO_PHYS     0x00200000
-#define IMX_IO_SIZE     0x00100000
-#define IMX_IO_BASE     VMALLOC_END
+#define MX1_IO_BASE_ADDR        0x00200000
+#define MX1_IO_SIZE             SZ_1M
+#define MX1_IO_BASE_ADDR_VIRT   VMALLOC_END
 
-#define IMX_CS0_PHYS    0x10000000
-#define IMX_CS0_SIZE    0x02000000
+#define MX1_CS0_PHYS            0x10000000
+#define MX1_CS0_SIZE            0x02000000
 
-#define IMX_CS1_PHYS    0x12000000
-#define IMX_CS1_SIZE    0x01000000
+#define MX1_CS1_PHYS            0x12000000
+#define MX1_CS1_SIZE            0x01000000
 
-#define IMX_CS2_PHYS    0x13000000
-#define IMX_CS2_SIZE    0x01000000
+#define MX1_CS2_PHYS            0x13000000
+#define MX1_CS2_SIZE            0x01000000
 
-#define IMX_CS3_PHYS    0x14000000
-#define IMX_CS3_SIZE    0x01000000
+#define MX1_CS3_PHYS            0x14000000
+#define MX1_CS3_SIZE            0x01000000
 
-#define IMX_CS4_PHYS    0x15000000
-#define IMX_CS4_SIZE    0x01000000
+#define MX1_CS4_PHYS            0x15000000
+#define MX1_CS4_SIZE            0x01000000
 
-#define IMX_CS5_PHYS    0x16000000
-#define IMX_CS5_SIZE    0x01000000
+#define MX1_CS5_PHYS            0x16000000
+#define MX1_CS5_SIZE            0x01000000
 
 /*
  *  Register BASEs, based on OFFSETs
  */
-#define AIPI1_BASE_ADDR         (0x00000 + IMX_IO_PHYS)
-#define WDT_BASE_ADDR           (0x01000 + IMX_IO_PHYS)
-#define TIM1_BASE_ADDR          (0x02000 + IMX_IO_PHYS)
-#define TIM2_BASE_ADDR          (0x03000 + IMX_IO_PHYS)
-#define RTC_BASE_ADDR           (0x04000 + IMX_IO_PHYS)
-#define LCDC_BASE_ADDR          (0x05000 + IMX_IO_PHYS)
-#define UART1_BASE_ADDR         (0x06000 + IMX_IO_PHYS)
-#define UART2_BASE_ADDR         (0x07000 + IMX_IO_PHYS)
-#define PWM_BASE_ADDR           (0x08000 + IMX_IO_PHYS)
-#define DMA_BASE_ADDR           (0x09000 + IMX_IO_PHYS)
-#define AIPI2_BASE_ADDR         (0x10000 + IMX_IO_PHYS)
-#define SIM_BASE_ADDR           (0x11000 + IMX_IO_PHYS)
-#define USBD_BASE_ADDR          (0x12000 + IMX_IO_PHYS)
-#define SPI1_BASE_ADDR          (0x13000 + IMX_IO_PHYS)
-#define MMC_BASE_ADDR           (0x14000 + IMX_IO_PHYS)
-#define ASP_BASE_ADDR           (0x15000 + IMX_IO_PHYS)
-#define BTA_BASE_ADDR           (0x16000 + IMX_IO_PHYS)
-#define I2C_BASE_ADDR           (0x17000 + IMX_IO_PHYS)
-#define SSI_BASE_ADDR           (0x18000 + IMX_IO_PHYS)
-#define SPI2_BASE_ADDR          (0x19000 + IMX_IO_PHYS)
-#define MSHC_BASE_ADDR          (0x1A000 + IMX_IO_PHYS)
-#define CCM_BASE_ADDR           (0x1B000 + IMX_IO_PHYS)
-#define SCM_BASE_ADDR           (0x1B804 + IMX_IO_PHYS)
-#define GPIO_BASE_ADDR          (0x1C000 + IMX_IO_PHYS)
-#define EIM_BASE_ADDR           (0x20000 + IMX_IO_PHYS)
-#define SDRAMC_BASE_ADDR        (0x21000 + IMX_IO_PHYS)
-#define MMA_BASE_ADDR           (0x22000 + IMX_IO_PHYS)
-#define AVIC_BASE_ADDR          (0x23000 + IMX_IO_PHYS)
-#define CSI_BASE_ADDR           (0x24000 + IMX_IO_PHYS)
+#define MX1_AIPI1_BASE_ADDR             (0x00000 + MX1_IO_BASE_ADDR)
+#define MX1_WDT_BASE_ADDR               (0x01000 + MX1_IO_BASE_ADDR)
+#define MX1_TIM1_BASE_ADDR              (0x02000 + MX1_IO_BASE_ADDR)
+#define MX1_TIM2_BASE_ADDR              (0x03000 + MX1_IO_BASE_ADDR)
+#define MX1_RTC_BASE_ADDR               (0x04000 + MX1_IO_BASE_ADDR)
+#define MX1_LCDC_BASE_ADDR              (0x05000 + MX1_IO_BASE_ADDR)
+#define MX1_UART1_BASE_ADDR             (0x06000 + MX1_IO_BASE_ADDR)
+#define MX1_UART2_BASE_ADDR             (0x07000 + MX1_IO_BASE_ADDR)
+#define MX1_PWM_BASE_ADDR               (0x08000 + MX1_IO_BASE_ADDR)
+#define MX1_DMA_BASE_ADDR               (0x09000 + MX1_IO_BASE_ADDR)
+#define MX1_AIPI2_BASE_ADDR             (0x10000 + MX1_IO_BASE_ADDR)
+#define MX1_SIM_BASE_ADDR               (0x11000 + MX1_IO_BASE_ADDR)
+#define MX1_USBD_BASE_ADDR              (0x12000 + MX1_IO_BASE_ADDR)
+#define MX1_SPI1_BASE_ADDR              (0x13000 + MX1_IO_BASE_ADDR)
+#define MX1_MMC_BASE_ADDR               (0x14000 + MX1_IO_BASE_ADDR)
+#define MX1_ASP_BASE_ADDR               (0x15000 + MX1_IO_BASE_ADDR)
+#define MX1_BTA_BASE_ADDR               (0x16000 + MX1_IO_BASE_ADDR)
+#define MX1_I2C_BASE_ADDR               (0x17000 + MX1_IO_BASE_ADDR)
+#define MX1_SSI_BASE_ADDR               (0x18000 + MX1_IO_BASE_ADDR)
+#define MX1_SPI2_BASE_ADDR              (0x19000 + MX1_IO_BASE_ADDR)
+#define MX1_MSHC_BASE_ADDR              (0x1A000 + MX1_IO_BASE_ADDR)
+#define MX1_CCM_BASE_ADDR               (0x1B000 + MX1_IO_BASE_ADDR)
+#define MX1_SCM_BASE_ADDR               (0x1B804 + MX1_IO_BASE_ADDR)
+#define MX1_GPIO_BASE_ADDR              (0x1C000 + MX1_IO_BASE_ADDR)
+#define MX1_EIM_BASE_ADDR               (0x20000 + MX1_IO_BASE_ADDR)
+#define MX1_SDRAMC_BASE_ADDR            (0x21000 + MX1_IO_BASE_ADDR)
+#define MX1_MMA_BASE_ADDR               (0x22000 + MX1_IO_BASE_ADDR)
+#define MX1_AVIC_BASE_ADDR              (0x23000 + MX1_IO_BASE_ADDR)
+#define MX1_CSI_BASE_ADDR               (0x24000 + MX1_IO_BASE_ADDR)
 
 /* macro to get at IO space when running virtually */
-#define IO_ADDRESS(x)   ((x) - IMX_IO_PHYS + IMX_IO_BASE)
-
-/* define macros needed for entry-macro.S */
-#define AVIC_IO_ADDRESS(x)      IO_ADDRESS(x)
+#define MX1_IO_ADDRESS(x) (                                             \
+        IMX_IO_ADDRESS(x, MX1_IO))
 
 /* fixed interrput numbers */
-#define INT_SOFTINT             0
-#define CSI_INT                 6
-#define DSPA_MAC_INT            7
-#define DSPA_INT                8
-#define COMP_INT                9
-#define MSHC_XINT               10
-#define GPIO_INT_PORTA          11
-#define GPIO_INT_PORTB          12
-#define GPIO_INT_PORTC          13
-#define LCDC_INT                14
-#define SIM_INT                 15
-#define SIM_DATA_INT            16
-#define RTC_INT                 17
-#define RTC_SAMINT              18
-#define UART2_MINT_PFERR        19
-#define UART2_MINT_RTS          20
-#define UART2_MINT_DTR          21
-#define UART2_MINT_UARTC        22
-#define UART2_MINT_TX           23
-#define UART2_MINT_RX           24
-#define UART1_MINT_PFERR        25
-#define UART1_MINT_RTS          26
-#define UART1_MINT_DTR          27
-#define UART1_MINT_UARTC        28
-#define UART1_MINT_TX           29
-#define UART1_MINT_RX           30
-#define VOICE_DAC_INT           31
-#define VOICE_ADC_INT           32
-#define PEN_DATA_INT            33
-#define PWM_INT                 34
-#define SDHC_INT                35
-#define I2C_INT                 39
-#define CSPI_INT                41
-#define SSI_TX_INT              42
-#define SSI_TX_ERR_INT          43
-#define SSI_RX_INT              44
-#define SSI_RX_ERR_INT          45
-#define TOUCH_INT               46
-#define USBD_INT0               47
-#define USBD_INT1               48
-#define USBD_INT2               49
-#define USBD_INT3               50
-#define USBD_INT4               51
-#define USBD_INT5               52
-#define USBD_INT6               53
-#define BTSYS_INT               55
-#define BTTIM_INT               56
-#define BTWUI_INT               57
-#define TIM2_INT                58
-#define TIM1_INT                59
-#define DMA_ERR                 60
-#define DMA_INT                 61
-#define GPIO_INT_PORTD          62
-#define WDT_INT                 63
+#define MX1_INT_SOFTINT         0
+#define MX1_CSI_INT             6
+#define MX1_DSPA_MAC_INT        7
+#define MX1_DSPA_INT            8
+#define MX1_COMP_INT            9
+#define MX1_MSHC_XINT           10
+#define MX1_GPIO_INT_PORTA      11
+#define MX1_GPIO_INT_PORTB      12
+#define MX1_GPIO_INT_PORTC      13
+#define MX1_LCDC_INT            14
+#define MX1_SIM_INT             15
+#define MX1_SIM_DATA_INT        16
+#define MX1_RTC_INT             17
+#define MX1_RTC_SAMINT          18
+#define MX1_UART2_MINT_PFERR    19
+#define MX1_UART2_MINT_RTS      20
+#define MX1_UART2_MINT_DTR      21
+#define MX1_UART2_MINT_UARTC    22
+#define MX1_UART2_MINT_TX       23
+#define MX1_UART2_MINT_RX       24
+#define MX1_UART1_MINT_PFERR    25
+#define MX1_UART1_MINT_RTS      26
+#define MX1_UART1_MINT_DTR      27
+#define MX1_UART1_MINT_UARTC    28
+#define MX1_UART1_MINT_TX       29
+#define MX1_UART1_MINT_RX       30
+#define MX1_VOICE_DAC_INT       31
+#define MX1_VOICE_ADC_INT       32
+#define MX1_PEN_DATA_INT        33
+#define MX1_PWM_INT             34
+#define MX1_SDHC_INT            35
+#define MX1_I2C_INT             39
+#define MX1_CSPI_INT            41
+#define MX1_SSI_TX_INT          42
+#define MX1_SSI_TX_ERR_INT      43
+#define MX1_SSI_RX_INT          44
+#define MX1_SSI_RX_ERR_INT      45
+#define MX1_TOUCH_INT           46
+#define MX1_USBD_INT0           47
+#define MX1_USBD_INT1           48
+#define MX1_USBD_INT2           49
+#define MX1_USBD_INT3           50
+#define MX1_USBD_INT4           51
+#define MX1_USBD_INT5           52
+#define MX1_USBD_INT6           53
+#define MX1_BTSYS_INT           55
+#define MX1_BTTIM_INT           56
+#define MX1_BTWUI_INT           57
+#define MX1_TIM2_INT            58
+#define MX1_TIM1_INT            59
+#define MX1_DMA_ERR             60
+#define MX1_DMA_INT             61
+#define MX1_GPIO_INT_PORTD      62
+#define MX1_WDT_INT             63
 
 /* DMA */
-#define DMA_REQ_UART3_T         2
-#define DMA_REQ_UART3_R         3
-#define DMA_REQ_SSI2_T          4
-#define DMA_REQ_SSI2_R          5
-#define DMA_REQ_CSI_STAT        6
-#define DMA_REQ_CSI_R           7
-#define DMA_REQ_MSHC            8
-#define DMA_REQ_DSPA_DCT_DOUT   9
-#define DMA_REQ_DSPA_DCT_DIN    10
-#define DMA_REQ_DSPA_MAC        11
-#define DMA_REQ_EXT             12
-#define DMA_REQ_SDHC            13
-#define DMA_REQ_SPI1_R          14
-#define DMA_REQ_SPI1_T          15
-#define DMA_REQ_SSI_T           16
-#define DMA_REQ_SSI_R           17
-#define DMA_REQ_ASP_DAC         18
-#define DMA_REQ_ASP_ADC         19
-#define DMA_REQ_USP_EP(x)       (20 + (x))
-#define DMA_REQ_SPI2_R          26
-#define DMA_REQ_SPI2_T          27
-#define DMA_REQ_UART2_T         28
-#define DMA_REQ_UART2_R         29
-#define DMA_REQ_UART1_T         30
-#define DMA_REQ_UART1_R         31
-
-#endif /*  __ASM_ARCH_MXC_MX1_H__ */
+#define MX1_DMA_REQ_UART3_T             2
+#define MX1_DMA_REQ_UART3_R             3
+#define MX1_DMA_REQ_SSI2_T              4
+#define MX1_DMA_REQ_SSI2_R              5
+#define MX1_DMA_REQ_CSI_STAT            6
+#define MX1_DMA_REQ_CSI_R               7
+#define MX1_DMA_REQ_MSHC                8
+#define MX1_DMA_REQ_DSPA_DCT_DOUT       9
+#define MX1_DMA_REQ_DSPA_DCT_DIN        10
+#define MX1_DMA_REQ_DSPA_MAC            11
+#define MX1_DMA_REQ_EXT                 12
+#define MX1_DMA_REQ_SDHC                13
+#define MX1_DMA_REQ_SPI1_R              14
+#define MX1_DMA_REQ_SPI1_T              15
+#define MX1_DMA_REQ_SSI_T               16
+#define MX1_DMA_REQ_SSI_R               17
+#define MX1_DMA_REQ_ASP_DAC             18
+#define MX1_DMA_REQ_ASP_ADC             19
+#define MX1_DMA_REQ_USP_EP(x)           (20 + (x))
+#define MX1_DMA_REQ_SPI2_R              26
+#define MX1_DMA_REQ_SPI2_T              27
+#define MX1_DMA_REQ_UART2_T             28
+#define MX1_DMA_REQ_UART2_R             29
+#define MX1_DMA_REQ_UART1_T             30
+#define MX1_DMA_REQ_UART1_R             31
+
+/*
+ * This doesn't depend on IMX_NEEDS_DEPRECATED_SYMBOLS
+ * to not break drivers/usb/gadget/imx_udc.  Should go
+ * away after this driver uses the new name.
+ */
+#define USBD_INT0               MX1_USBD_INT0
+
+#ifdef IMX_NEEDS_DEPRECATED_SYMBOLS
+/* these should go away */
+#define IMX_IO_PHYS MX1_IO_BASE_ADDR
+#define IMX_IO_SIZE MX1_IO_SIZE
+#define IMX_IO_BASE MX1_IO_BASE_ADDR_VIRT
+#define IMX_CS0_PHYS MX1_CS0_PHYS
+#define IMX_CS0_SIZE MX1_CS0_SIZE
+#define IMX_CS1_PHYS MX1_CS1_PHYS
+#define IMX_CS1_SIZE MX1_CS1_SIZE
+#define IMX_CS2_PHYS MX1_CS2_PHYS
+#define IMX_CS2_SIZE MX1_CS2_SIZE
+#define IMX_CS3_PHYS MX1_CS3_PHYS
+#define IMX_CS3_SIZE MX1_CS3_SIZE
+#define IMX_CS4_PHYS MX1_CS4_PHYS
+#define IMX_CS4_SIZE MX1_CS4_SIZE
+#define IMX_CS5_PHYS MX1_CS5_PHYS
+#define IMX_CS5_SIZE MX1_CS5_SIZE
+#define AIPI1_BASE_ADDR MX1_AIPI1_BASE_ADDR
+#define WDT_BASE_ADDR MX1_WDT_BASE_ADDR
+#define TIM1_BASE_ADDR MX1_TIM1_BASE_ADDR
+#define TIM2_BASE_ADDR MX1_TIM2_BASE_ADDR
+#define RTC_BASE_ADDR MX1_RTC_BASE_ADDR
+#define LCDC_BASE_ADDR MX1_LCDC_BASE_ADDR
+#define UART1_BASE_ADDR MX1_UART1_BASE_ADDR
+#define UART2_BASE_ADDR MX1_UART2_BASE_ADDR
+#define PWM_BASE_ADDR MX1_PWM_BASE_ADDR
+#define DMA_BASE_ADDR MX1_DMA_BASE_ADDR
+#define AIPI2_BASE_ADDR MX1_AIPI2_BASE_ADDR
+#define SIM_BASE_ADDR MX1_SIM_BASE_ADDR
+#define USBD_BASE_ADDR MX1_USBD_BASE_ADDR
+#define SPI1_BASE_ADDR MX1_SPI1_BASE_ADDR
+#define MMC_BASE_ADDR MX1_MMC_BASE_ADDR
+#define ASP_BASE_ADDR MX1_ASP_BASE_ADDR
+#define BTA_BASE_ADDR MX1_BTA_BASE_ADDR
+#define I2C_BASE_ADDR MX1_I2C_BASE_ADDR
+#define SSI_BASE_ADDR MX1_SSI_BASE_ADDR
+#define SPI2_BASE_ADDR MX1_SPI2_BASE_ADDR
+#define MSHC_BASE_ADDR MX1_MSHC_BASE_ADDR
+#define CCM_BASE_ADDR MX1_CCM_BASE_ADDR
+#define SCM_BASE_ADDR MX1_SCM_BASE_ADDR
+#define GPIO_BASE_ADDR MX1_GPIO_BASE_ADDR
+#define EIM_BASE_ADDR MX1_EIM_BASE_ADDR
+#define SDRAMC_BASE_ADDR MX1_SDRAMC_BASE_ADDR
+#define MMA_BASE_ADDR MX1_MMA_BASE_ADDR
+#define AVIC_BASE_ADDR MX1_AVIC_BASE_ADDR
+#define CSI_BASE_ADDR MX1_CSI_BASE_ADDR
+#define IO_ADDRESS(x) MX1_IO_ADDRESS(x)
+#define AVIC_IO_ADDRESS(x) IO_ADDRESS(x)
+#define INT_SOFTINT MX1_INT_SOFTINT
+#define CSI_INT MX1_CSI_INT
+#define DSPA_MAC_INT MX1_DSPA_MAC_INT
+#define DSPA_INT MX1_DSPA_INT
+#define COMP_INT MX1_COMP_INT
+#define MSHC_XINT MX1_MSHC_XINT
+#define GPIO_INT_PORTA MX1_GPIO_INT_PORTA
+#define GPIO_INT_PORTB MX1_GPIO_INT_PORTB
+#define GPIO_INT_PORTC MX1_GPIO_INT_PORTC
+#define LCDC_INT MX1_LCDC_INT
+#define SIM_INT MX1_SIM_INT
+#define SIM_DATA_INT MX1_SIM_DATA_INT
+#define RTC_INT MX1_RTC_INT
+#define RTC_SAMINT MX1_RTC_SAMINT
+#define UART2_MINT_PFERR MX1_UART2_MINT_PFERR
+#define UART2_MINT_RTS MX1_UART2_MINT_RTS
+#define UART2_MINT_DTR MX1_UART2_MINT_DTR
+#define UART2_MINT_UARTC MX1_UART2_MINT_UARTC
+#define UART2_MINT_TX MX1_UART2_MINT_TX
+#define UART2_MINT_RX MX1_UART2_MINT_RX
+#define UART1_MINT_PFERR MX1_UART1_MINT_PFERR
+#define UART1_MINT_RTS MX1_UART1_MINT_RTS
+#define UART1_MINT_DTR MX1_UART1_MINT_DTR
+#define UART1_MINT_UARTC MX1_UART1_MINT_UARTC
+#define UART1_MINT_TX MX1_UART1_MINT_TX
+#define UART1_MINT_RX MX1_UART1_MINT_RX
+#define VOICE_DAC_INT MX1_VOICE_DAC_INT
+#define VOICE_ADC_INT MX1_VOICE_ADC_INT
+#define PEN_DATA_INT MX1_PEN_DATA_INT
+#define PWM_INT MX1_PWM_INT
+#define SDHC_INT MX1_SDHC_INT
+#define I2C_INT MX1_I2C_INT
+#define CSPI_INT MX1_CSPI_INT
+#define SSI_TX_INT MX1_SSI_TX_INT
+#define SSI_TX_ERR_INT MX1_SSI_TX_ERR_INT
+#define SSI_RX_INT MX1_SSI_RX_INT
+#define SSI_RX_ERR_INT MX1_SSI_RX_ERR_INT
+#define TOUCH_INT MX1_TOUCH_INT
+#define USBD_INT1 MX1_USBD_INT1
+#define USBD_INT2 MX1_USBD_INT2
+#define USBD_INT3 MX1_USBD_INT3
+#define USBD_INT4 MX1_USBD_INT4
+#define USBD_INT5 MX1_USBD_INT5
+#define USBD_INT6 MX1_USBD_INT6
+#define BTSYS_INT MX1_BTSYS_INT
+#define BTTIM_INT MX1_BTTIM_INT
+#define BTWUI_INT MX1_BTWUI_INT
+#define TIM2_INT MX1_TIM2_INT
+#define TIM1_INT MX1_TIM1_INT
+#define DMA_ERR MX1_DMA_ERR
+#define DMA_INT MX1_DMA_INT
+#define GPIO_INT_PORTD MX1_GPIO_INT_PORTD
+#define WDT_INT MX1_WDT_INT
+#define DMA_REQ_UART3_T MX1_DMA_REQ_UART3_T
+#define DMA_REQ_UART3_R MX1_DMA_REQ_UART3_R
+#define DMA_REQ_SSI2_T MX1_DMA_REQ_SSI2_T
+#define DMA_REQ_SSI2_R MX1_DMA_REQ_SSI2_R
+#define DMA_REQ_CSI_STAT MX1_DMA_REQ_CSI_STAT
+#define DMA_REQ_CSI_R MX1_DMA_REQ_CSI_R
+#define DMA_REQ_MSHC MX1_DMA_REQ_MSHC
+#define DMA_REQ_DSPA_DCT_DOUT MX1_DMA_REQ_DSPA_DCT_DOUT
+#define DMA_REQ_DSPA_DCT_DIN MX1_DMA_REQ_DSPA_DCT_DIN
+#define DMA_REQ_DSPA_MAC MX1_DMA_REQ_DSPA_MAC
+#define DMA_REQ_EXT MX1_DMA_REQ_EXT
+#define DMA_REQ_SDHC MX1_DMA_REQ_SDHC
+#define DMA_REQ_SPI1_R MX1_DMA_REQ_SPI1_R
+#define DMA_REQ_SPI1_T MX1_DMA_REQ_SPI1_T
+#define DMA_REQ_SSI_T MX1_DMA_REQ_SSI_T
+#define DMA_REQ_SSI_R MX1_DMA_REQ_SSI_R
+#define DMA_REQ_ASP_DAC MX1_DMA_REQ_ASP_DAC
+#define DMA_REQ_ASP_ADC MX1_DMA_REQ_ASP_ADC
+#define DMA_REQ_USP_EP(x) MX1_DMA_REQ_USP_EP(x)
+#define DMA_REQ_SPI2_R MX1_DMA_REQ_SPI2_R
+#define DMA_REQ_SPI2_T MX1_DMA_REQ_SPI2_T
+#define DMA_REQ_UART2_T MX1_DMA_REQ_UART2_T
+#define DMA_REQ_UART2_R MX1_DMA_REQ_UART2_R
+#define DMA_REQ_UART1_T MX1_DMA_REQ_UART1_T
+#define DMA_REQ_UART1_R MX1_DMA_REQ_UART1_R
+#endif /* ifdef IMX_NEEDS_DEPRECATED_SYMBOLS */
+
+#endif /* ifndef __MACH_MX1_H__ */
diff --git a/arch/arm/plat-mxc/include/mach/mx21.h b/arch/arm/plat-mxc/include/mach/mx21.h
index bb297d8765a7..ed98b9c9f389 100644
--- a/arch/arm/plat-mxc/include/mach/mx21.h
+++ b/arch/arm/plat-mxc/include/mach/mx21.h
@@ -22,8 +22,8 @@
  * MA  02110-1301, USA.
  */
 
-#ifndef __ASM_ARCH_MXC_MX21_H__
-#define __ASM_ARCH_MXC_MX21_H__
+#ifndef __MACH_MX21_H__
+#define __MACH_MX21_H__
 
 #define MX21_AIPI_BASE_ADDR             0x10000000
 #define MX21_AIPI_BASE_ADDR_VIRT        0xf4000000
@@ -92,6 +92,11 @@
 
 #define MX21_IRAM_BASE_ADDR             0xffffe800      /* internal ram */
 
+#define MX21_IO_ADDRESS(x) (                                            \
+        IMX_IO_ADDRESS(x, MX21_AIPI) ?:                                 \
+        IMX_IO_ADDRESS(x, MX21_SAHB1) ?:                                \
+        IMX_IO_ADDRESS(x, MX21_X_MEMC))
+
 /* fixed interrupt numbers */
 #define MX21_INT_CSPI3          6
 #define MX21_INT_GPIO           8
@@ -179,6 +184,7 @@
 #define MX21_DMA_REQ_CSI_STAT   30
 #define MX21_DMA_REQ_CSI_RX     31
 
+#ifdef IMX_NEEDS_DEPRECATED_SYMBOLS
 /* these should go away */
 #define SDRAM_BASE_ADDR MX21_SDRAM_BASE_ADDR
 #define CSD1_BASE_ADDR MX21_CSD1_BASE_ADDR
@@ -211,5 +217,6 @@
 #define DMA_REQ_FIRI_RX MX21_DMA_REQ_FIRI_RX
 #define DMA_REQ_BMI_TX MX21_DMA_REQ_BMI_TX
 #define DMA_REQ_BMI_RX MX21_DMA_REQ_BMI_RX
+#endif
 
-#endif /* __ASM_ARCH_MXC_MX21_H__ */
+#endif /* ifndef __MACH_MX21_H__ */
diff --git a/arch/arm/plat-mxc/include/mach/mx25.h b/arch/arm/plat-mxc/include/mach/mx25.h
index 854e2dc58481..4eb6e334bda5 100644
--- a/arch/arm/plat-mxc/include/mach/mx25.h
+++ b/arch/arm/plat-mxc/include/mach/mx25.h
@@ -22,27 +22,27 @@
 #define MX25_GPIO3_BASE_ADDR_VIRT       (MX25_AIPS2_BASE_ADDR_VIRT + 0xa4000)
 #define MX25_GPIO4_BASE_ADDR_VIRT       (MX25_AIPS2_BASE_ADDR_VIRT + 0x9c000)
 
-#define MX25_AIPS1_IO_ADDRESS(x)  \
-        (((x) - MX25_AIPS1_BASE_ADDR) + MX25_AIPS1_BASE_ADDR_VIRT)
-#define MX25_AIPS2_IO_ADDRESS(x)  \
-        (((x) - MX25_AIPS2_BASE_ADDR) + MX25_AIPS2_BASE_ADDR_VIRT)
-#define MX25_AVIC_IO_ADDRESS(x)  \
-        (((x) - MX25_AVIC_BASE_ADDR) + MX25_AVIC_BASE_ADDR_VIRT)
+#define MX25_IO_ADDRESS(x) (                                    \
+        IMX_IO_ADDRESS(x, MX25_AIPS1) ?:                        \
+        IMX_IO_ADDRESS(x, MX25_AIPS2) ?:                        \
+        IMX_IO_ADDRESS(x, MX25_AVIC))
 
-#define __in_range(addr, name)  ((addr) >= name##_BASE_ADDR && (addr) < name##_BASE_ADDR + name##_SIZE)
-
-#define MX25_IO_ADDRESS(x)                                      \
-        (void __force __iomem *)                                \
-        (__in_range(x, MX25_AIPS1) ? MX25_AIPS1_IO_ADDRESS(x) : \
-        __in_range(x, MX25_AIPS2) ? MX25_AIPS2_IO_ADDRESS(x) :  \
-        __in_range(x, MX25_AVIC) ? MX25_AVIC_IO_ADDRESS(x) :    \
-        0xDEADBEEF)
-
-#define UART1_BASE_ADDR                 0x43f90000
-#define UART2_BASE_ADDR                 0x43f94000
+#define MX25_UART1_BASE_ADDR            0x43f90000
+#define MX25_UART2_BASE_ADDR            0x43f94000
 
 #define MX25_FEC_BASE_ADDR              0x50038000
+#define MX25_NFC_BASE_ADDR              0xbb000000
+#define MX25_DRYICE_BASE_ADDR           0x53ffc000
+#define MX25_LCDC_BASE_ADDR             0x53fbc000
 
+#define MX25_INT_DRYICE 25
 #define MX25_INT_FEC    57
+#define MX25_INT_NANDFC 33
+#define MX25_INT_LCDC   39
+
+#if defined(IMX_NEEDS_DEPRECATED_SYMBOLS)
+#define UART1_BASE_ADDR                 MX25_UART1_BASE_ADDR
+#define UART2_BASE_ADDR                 MX25_UART2_BASE_ADDR
+#endif
 
-#endif /* __MACH_MX25_H__ */
+#endif /* ifndef __MACH_MX25_H__ */
diff --git a/arch/arm/plat-mxc/include/mach/mx27.h b/arch/arm/plat-mxc/include/mach/mx27.h
index e2ae19f51710..bae9cd75beee 100644
--- a/arch/arm/plat-mxc/include/mach/mx27.h
+++ b/arch/arm/plat-mxc/include/mach/mx27.h
@@ -21,8 +21,12 @@
  * MA  02110-1301, USA.
  */
 
-#ifndef __ASM_ARCH_MXC_MX27_H__
-#define __ASM_ARCH_MXC_MX27_H__
+#ifndef __MACH_MX27_H__
+#define __MACH_MX27_H__
+
+#ifndef __ASSEMBLER__
+#include <linux/io.h>
+#endif
 
 #define MX27_AIPI_BASE_ADDR             0x10000000
 #define MX27_AIPI_BASE_ADDR_VIRT        0xf4000000
@@ -109,11 +113,31 @@
 #define MX27_M3IF_BASE_ADDR                     (MX27_X_MEMC_BASE_ADDR + 0x3000)
 #define MX27_PCMCIA_CTL_BASE_ADDR               (MX27_X_MEMC_BASE_ADDR + 0x4000)
 
+#define MX27_WEIM_CSCRx_BASE_ADDR(cs)   (MX27_WEIM_BASE_ADDR + (cs) * 0x10)
+#define MX27_WEIM_CSCRxU(cs)                    (MX27_WEIM_CSCRx_BASE_ADDR(cs))
+#define MX27_WEIM_CSCRxL(cs)                    (MX27_WEIM_CSCRx_BASE_ADDR(cs) + 0x4)
+#define MX27_WEIM_CSCRxA(cs)                    (MX27_WEIM_CSCRx_BASE_ADDR(cs) + 0x8)
+
 #define MX27_PCMCIA_MEM_BASE_ADDR       0xdc000000
 
 /* IRAM */
 #define MX27_IRAM_BASE_ADDR             0xffff4c00      /* internal ram */
 
+#define MX27_IO_ADDRESS(x) (                                            \
+        IMX_IO_ADDRESS(x, MX27_AIPI) ?:                                 \
+        IMX_IO_ADDRESS(x, MX27_SAHB1) ?:                                \
+        IMX_IO_ADDRESS(x, MX27_X_MEMC))
+
+#ifndef __ASSEMBLER__
+static inline void mx27_setup_weimcs(size_t cs,
+                unsigned upper, unsigned lower, unsigned addional)
+{
+        __raw_writel(upper, MX27_IO_ADDRESS(MX27_WEIM_CSCRxU(cs)));
+        __raw_writel(lower, MX27_IO_ADDRESS(MX27_WEIM_CSCRxL(cs)));
+        __raw_writel(addional, MX27_IO_ADDRESS(MX27_WEIM_CSCRxA(cs)));
+}
+#endif
+
 /* fixed interrupt numbers */
 #define MX27_INT_I2C2           1
 #define MX27_INT_GPT6           2
@@ -225,6 +249,7 @@
 extern int mx27_revision(void);
 #endif
 
+#ifdef IMX_NEEDS_DEPRECATED_SYMBOLS
 /* these should go away */
 #define MSHC_BASE_ADDR MX27_MSHC_BASE_ADDR
 #define GPT5_BASE_ADDR MX27_GPT5_BASE_ADDR
@@ -292,5 +317,6 @@ extern int mx27_revision(void);
 #define DMA_REQ_UART6_RX MX27_DMA_REQ_UART6_RX
 #define DMA_REQ_SDHC3 MX27_DMA_REQ_SDHC3
 #define DMA_REQ_NFC MX27_DMA_REQ_NFC
+#endif
 
-#endif /* __ASM_ARCH_MXC_MX27_H__ */
+#endif /* ifndef __MACH_MX27_H__ */
diff --git a/arch/arm/plat-mxc/include/mach/mx2x.h b/arch/arm/plat-mxc/include/mach/mx2x.h
index f2eaf140ed02..afb895a0b5b8 100644
--- a/arch/arm/plat-mxc/include/mach/mx2x.h
+++ b/arch/arm/plat-mxc/include/mach/mx2x.h
@@ -20,8 +20,8 @@
  * MA  02110-1301, USA.
  */
 
-#ifndef __ASM_ARCH_MXC_MX2x_H__
-#define __ASM_ARCH_MXC_MX2x_H__
+#ifndef __MACH_MX2x_H__
+#define __MACH_MX2x_H__
 
 /* The following addresses are common between i.MX21 and i.MX27 */
 
@@ -176,6 +176,7 @@
 #define MX2x_DMA_REQ_CSI_STAT   30
 #define MX2x_DMA_REQ_CSI_RX     31
 
+#ifdef IMX_NEEDS_DEPRECATED_SYMBOLS
 /* these should go away */
 #define AIPI_BASE_ADDR MX2x_AIPI_BASE_ADDR
 #define AIPI_BASE_ADDR_VIRT MX2x_AIPI_BASE_ADDR_VIRT
@@ -287,5 +288,6 @@
 #define DMA_REQ_UART1_TX MX2x_DMA_REQ_UART1_TX
 #define DMA_REQ_CSI_STAT MX2x_DMA_REQ_CSI_STAT
 #define DMA_REQ_CSI_RX MX2x_DMA_REQ_CSI_RX
+#endif
 
-#endif /* __ASM_ARCH_MXC_MX2x_H__ */
+#endif /* ifndef __MACH_MX2x_H__ */
diff --git a/arch/arm/plat-mxc/include/mach/mx31.h b/arch/arm/plat-mxc/include/mach/mx31.h
index b8b47d139eb5..fb90e119c2b5 100644
--- a/arch/arm/plat-mxc/include/mach/mx31.h
+++ b/arch/arm/plat-mxc/include/mach/mx31.h
@@ -1,3 +1,10 @@
+#ifndef __MACH_MX31_H__
+#define __MACH_MX31_H__
+
+#ifndef __ASSEMBLER__
+#include <linux/io.h>
+#endif
+
 /*
  * IRAM
  */
@@ -107,8 +114,30 @@
 #define MX31_EMI_CTL_BASE_ADDR                  (MX31_X_MEMC_BASE_ADDR + 0x4000)
 #define MX31_PCMCIA_CTL_BASE_ADDR               MX31_EMI_CTL_BASE_ADDR
 
+#define MX31_WEIM_CSCRx_BASE_ADDR(cs)   (MX31_WEIM_BASE_ADDR + (cs) * 0x10)
+#define MX31_WEIM_CSCRxU(cs)                    (MX31_WEIM_CSCRx_BASE_ADDR(cs))
+#define MX31_WEIM_CSCRxL(cs)                    (MX31_WEIM_CSCRx_BASE_ADDR(cs) + 0x4)
+#define MX31_WEIM_CSCRxA(cs)                    (MX31_WEIM_CSCRx_BASE_ADDR(cs) + 0x8)
+
 #define MX31_PCMCIA_MEM_BASE_ADDR       0xbc000000
 
+#define MX31_IO_ADDRESS(x) (                                            \
+        IMX_IO_ADDRESS(x, MX31_AIPS1) ?:                                \
+        IMX_IO_ADDRESS(x, MX31_AIPS2) ?:                                \
+        IMX_IO_ADDRESS(x, MX31_AVIC) ?:                                 \
+        IMX_IO_ADDRESS(x, MX31_X_MEMC) ?:                               \
+        IMX_IO_ADDRESS(x, MX31_SPBA0))
+
+#ifndef __ASSEMBLER__
+static inline void mx31_setup_weimcs(size_t cs,
+                unsigned upper, unsigned lower, unsigned addional)
+{
+        __raw_writel(upper, MX31_IO_ADDRESS(MX31_WEIM_CSCRxU(cs)));
+        __raw_writel(lower, MX31_IO_ADDRESS(MX31_WEIM_CSCRxL(cs)));
+        __raw_writel(addional, MX31_IO_ADDRESS(MX31_WEIM_CSCRxA(cs)));
+}
+#endif
+
 #define MX31_INT_I2C3           3
 #define MX31_INT_I2C2           4
 #define MX31_INT_MPEG4_ENCODER  5
@@ -186,6 +215,7 @@
 #define MX31_SYSTEM_REV_MIN             MX31_CHIP_REV_1_0
 #define MX31_SYSTEM_REV_NUM             3
 
+#ifdef IMX_NEEDS_DEPRECATED_SYMBOLS
 /* these should go away */
 #define ATA_BASE_ADDR MX31_ATA_BASE_ADDR
 #define UART4_BASE_ADDR MX31_UART4_BASE_ADDR
@@ -216,3 +246,6 @@
 #define MXC_INT_UART5 MX31_INT_UART5
 #define MXC_INT_CCM MX31_INT_CCM
 #define MXC_INT_PCMCIA MX31_INT_PCMCIA
+#endif
+
+#endif /* ifndef __MACH_MX31_H__ */
diff --git a/arch/arm/plat-mxc/include/mach/mx35.h b/arch/arm/plat-mxc/include/mach/mx35.h
index af871bce35b6..526a55842ae5 100644
--- a/arch/arm/plat-mxc/include/mach/mx35.h
+++ b/arch/arm/plat-mxc/include/mach/mx35.h
@@ -1,3 +1,5 @@
+#ifndef __MACH_MX35_H__
+#define __MACH_MX35_H__
 /*
  * IRAM
  */
@@ -104,6 +106,13 @@
 #define MX35_NFC_BASE_ADDR              0xbb000000
 #define MX35_PCMCIA_MEM_BASE_ADDR       0xbc000000
 
+#define MX35_IO_ADDRESS(x) (                                            \
+        IMX_IO_ADDRESS(x, MX35_AIPS1) ?:                                \
+        IMX_IO_ADDRESS(x, MX35_AIPS2) ?:                                \
+        IMX_IO_ADDRESS(x, MX35_AVIC) ?:                                 \
+        IMX_IO_ADDRESS(x, MX35_X_MEMC) ?:                               \
+        IMX_IO_ADDRESS(x, MX35_SPBA0))
+
 /*
  * Interrupt numbers
  */
@@ -180,6 +189,7 @@
 #define MX35_SYSTEM_REV_MIN             MX35_CHIP_REV_1_0
 #define MX35_SYSTEM_REV_NUM             3
 
+#ifdef IMX_NEEDS_DEPRECATED_SYMBOLS
 /* these should go away */
 #define MXC_FEC_BASE_ADDR MX35_FEC_BASE_ADDR
 #define MXC_INT_OWIRE MX35_INT_OWIRE
@@ -195,3 +205,6 @@
 #define MXC_INT_MLB MX35_INT_MLB
 #define MXC_INT_SPDIF MX35_INT_SPDIF
 #define MXC_INT_FEC MX35_INT_FEC
+#endif
+
+#endif /* ifndef __MACH_MX35_H__ */
diff --git a/arch/arm/plat-mxc/include/mach/mx3x.h b/arch/arm/plat-mxc/include/mach/mx3x.h
index be69272407ad..7a356de385f5 100644
--- a/arch/arm/plat-mxc/include/mach/mx3x.h
+++ b/arch/arm/plat-mxc/include/mach/mx3x.h
@@ -8,8 +8,8 @@
  * published by the Free Software Foundation.
  */
 
-#ifndef __ASM_ARCH_MXC_MX31_H__
-#define __ASM_ARCH_MXC_MX31_H__
+#ifndef __MACH_MX3x_H__
+#define __MACH_MX3x_H__
 
 /*
  * MX31 memory map:
@@ -269,6 +269,7 @@ static inline int mx31_revision(void)
 }
 #endif
 
+#ifdef IMX_NEEDS_DEPRECATED_SYMBOLS
 /* these should go away */
 #define L2CC_BASE_ADDR MX3x_L2CC_BASE_ADDR
 #define L2CC_SIZE MX3x_L2CC_SIZE
@@ -401,5 +402,6 @@ static inline int mx31_revision(void)
 #define CHIP_REV_3_2 MX3x_CHIP_REV_3_2
 #define SYSTEM_REV_MIN MX3x_SYSTEM_REV_MIN
 #define SYSTEM_REV_NUM MX3x_SYSTEM_REV_NUM
+#endif
 
-#endif /*  __ASM_ARCH_MXC_MX31_H__ */
+#endif /* ifndef __MACH_MX3x_H__ */
diff --git a/arch/arm/plat-mxc/include/mach/mx51.h b/arch/arm/plat-mxc/include/mach/mx51.h
new file mode 100644
index 000000000000..771532b6b4a6
--- /dev/null
+++ b/arch/arm/plat-mxc/include/mach/mx51.h
@@ -0,0 +1,454 @@
+#ifndef __ASM_ARCH_MXC_MX51_H__
+#define __ASM_ARCH_MXC_MX51_H__
+
+/*
+ * MX51 memory map:
+ *
+ *
+ * Virt         Phys            Size    What
+ * ---------------------------------------------------------------------------
+ * FA3E0000     1FFE0000        128K    IRAM (SCCv2 RAM)
+ *              30000000        256M    GPU
+ *              40000000        512M    IPU
+ * FA200000     60000000        1M      DEBUG
+ * FB100000     70000000        1M      SPBA 0
+ * FB000000     73F00000        1M      AIPS 1
+ * FB200000     83F00000        1M      AIPS 2
+ * FA100000     8FFFC000        16K     TZIC (interrupt controller)
+ *              90000000        256M    CSD0 SDRAM/DDR
+ *              A0000000        256M    CSD1 SDRAM/DDR
+ *              B0000000        128M    CS0 Flash
+ *              B8000000        128M    CS1 Flash
+ *              C0000000        128M    CS2 Flash
+ *              C8000000        64M     CS3 Flash
+ *              CC000000        32M     CS4 SRAM
+ *              CE000000        32M     CS5 SRAM
+ * F9000000     CFFF0000        64K     NFC (NAND Flash AXI)
+ *
+ */
+
+/*
+ * IRAM
+ */
+#define MX51_IRAM_BASE_ADDR             0x1FFE0000      /* internal ram */
+#define MX51_IRAM_BASE_ADDR_VIRT        0xFA3E0000
+#define MX51_IRAM_PARTITIONS            16
+#define MX51_IRAM_PARTITIONS_TO1        12
+#define MX51_IRAM_SIZE          (MX51_IRAM_PARTITIONS * SZ_8K)  /* 128KB */
+
+/*
+ * NFC
+ */
+#define MX51_NFC_AXI_BASE_ADDR          0xCFFF0000      /* NAND flash AXI */
+#define MX51_NFC_AXI_BASE_ADDR_VIRT     0xF9000000
+#define MX51_NFC_AXI_SIZE               SZ_64K
+
+/*
+ * Graphics Memory of GPU
+ */
+#define MX51_GPU_BASE_ADDR              0x20000000
+#define MX51_GPU2D_BASE_ADDR            0xD0000000
+
+#define MX51_TZIC_BASE_ADDR             0x8FFFC000
+#define MX51_TZIC_BASE_ADDR_VIRT        0xFA100000
+#define MX51_TZIC_SIZE                  SZ_16K
+
+#define MX51_DEBUG_BASE_ADDR            0x60000000
+#define MX51_DEBUG_BASE_ADDR_VIRT       0xFA200000
+#define MX51_DEBUG_SIZE                 SZ_1M
+#define MX51_ETB_BASE_ADDR              (MX51_DEBUG_BASE_ADDR + 0x00001000)
+#define MX51_ETM_BASE_ADDR              (MX51_DEBUG_BASE_ADDR + 0x00002000)
+#define MX51_TPIU_BASE_ADDR             (MX51_DEBUG_BASE_ADDR + 0x00003000)
+#define MX51_CTI0_BASE_ADDR             (MX51_DEBUG_BASE_ADDR + 0x00004000)
+#define MX51_CTI1_BASE_ADDR             (MX51_DEBUG_BASE_ADDR + 0x00005000)
+#define MX51_CTI2_BASE_ADDR             (MX51_DEBUG_BASE_ADDR + 0x00006000)
+#define MX51_CTI3_BASE_ADDR             (MX51_DEBUG_BASE_ADDR + 0x00007000)
+#define MX51_CORTEX_DBG_BASE_ADDR       (MX51_DEBUG_BASE_ADDR + 0x00008000)
+
+/*
+ * SPBA global module enabled #0
+ */
+#define MX51_SPBA0_BASE_ADDR            0x70000000
+#define MX51_SPBA0_BASE_ADDR_VIRT       0xFB100000
+#define MX51_SPBA0_SIZE                 SZ_1M
+
+#define MX51_MMC_SDHC1_BASE_ADDR        (MX51_SPBA0_BASE_ADDR + 0x00004000)
+#define MX51_MMC_SDHC2_BASE_ADDR        (MX51_SPBA0_BASE_ADDR + 0x00008000)
+#define MX51_UART3_BASE_ADDR            (MX51_SPBA0_BASE_ADDR + 0x0000C000)
+#define MX51_CSPI1_BASE_ADDR            (MX51_SPBA0_BASE_ADDR + 0x00010000)
+#define MX51_SSI2_BASE_ADDR             (MX51_SPBA0_BASE_ADDR + 0x00014000)
+#define MX51_MMC_SDHC3_BASE_ADDR        (MX51_SPBA0_BASE_ADDR + 0x00020000)
+#define MX51_MMC_SDHC4_BASE_ADDR        (MX51_SPBA0_BASE_ADDR + 0x00024000)
+#define MX51_SPDIF_BASE_ADDR            (MX51_SPBA0_BASE_ADDR + 0x00028000)
+#define MX51_ATA_DMA_BASE_ADDR          (MX51_SPBA0_BASE_ADDR + 0x00030000)
+#define MX51_SLIM_DMA_BASE_ADDR         (MX51_SPBA0_BASE_ADDR + 0x00034000)
+#define MX51_HSI2C_DMA_BASE_ADDR        (MX51_SPBA0_BASE_ADDR + 0x00038000)
+#define MX51_SPBA_CTRL_BASE_ADDR        (MX51_SPBA0_BASE_ADDR + 0x0003C000)
+
+/*
+ * defines for SPBA modules
+ */
+#define MX51_SPBA_SDHC1 0x04
+#define MX51_SPBA_SDHC2 0x08
+#define MX51_SPBA_UART3 0x0C
+#define MX51_SPBA_CSPI1 0x10
+#define MX51_SPBA_SSI2  0x14
+#define MX51_SPBA_SDHC3 0x20
+#define MX51_SPBA_SDHC4 0x24
+#define MX51_SPBA_SPDIF 0x28
+#define MX51_SPBA_ATA   0x30
+#define MX51_SPBA_SLIM  0x34
+#define MX51_SPBA_HSI2C 0x38
+#define MX51_SPBA_CTRL  0x3C
+
+/*
+ * AIPS 1
+ */
+#define MX51_AIPS1_BASE_ADDR    0x73F00000
+#define MX51_AIPS1_BASE_ADDR_VIRT       0xFB000000
+#define MX51_AIPS1_SIZE         SZ_1M
+
+#define MX51_OTG_BASE_ADDR      (MX51_AIPS1_BASE_ADDR + 0x00080000)
+#define MX51_GPIO1_BASE_ADDR    (MX51_AIPS1_BASE_ADDR + 0x00084000)
+#define MX51_GPIO2_BASE_ADDR    (MX51_AIPS1_BASE_ADDR + 0x00088000)
+#define MX51_GPIO3_BASE_ADDR    (MX51_AIPS1_BASE_ADDR + 0x0008C000)
+#define MX51_GPIO4_BASE_ADDR    (MX51_AIPS1_BASE_ADDR + 0x00090000)
+#define MX51_KPP_BASE_ADDR      (MX51_AIPS1_BASE_ADDR + 0x00094000)
+#define MX51_WDOG_BASE_ADDR     (MX51_AIPS1_BASE_ADDR + 0x00098000)
+#define MX51_WDOG2_BASE_ADDR    (MX51_AIPS1_BASE_ADDR + 0x0009C000)
+#define MX51_GPT1_BASE_ADDR     (MX51_AIPS1_BASE_ADDR + 0x000A0000)
+#define MX51_SRTC_BASE_ADDR     (MX51_AIPS1_BASE_ADDR + 0x000A4000)
+#define MX51_IOMUXC_BASE_ADDR   (MX51_AIPS1_BASE_ADDR + 0x000A8000)
+#define MX51_EPIT1_BASE_ADDR    (MX51_AIPS1_BASE_ADDR + 0x000AC000)
+#define MX51_EPIT2_BASE_ADDR    (MX51_AIPS1_BASE_ADDR + 0x000B0000)
+#define MX51_PWM1_BASE_ADDR     (MX51_AIPS1_BASE_ADDR + 0x000B4000)
+#define MX51_PWM2_BASE_ADDR     (MX51_AIPS1_BASE_ADDR + 0x000B8000)
+#define MX51_UART1_BASE_ADDR    (MX51_AIPS1_BASE_ADDR + 0x000BC000)
+#define MX51_UART2_BASE_ADDR    (MX51_AIPS1_BASE_ADDR + 0x000C0000)
+#define MX51_SRC_BASE_ADDR      (MX51_AIPS1_BASE_ADDR + 0x000D0000)
+#define MX51_CCM_BASE_ADDR      (MX51_AIPS1_BASE_ADDR + 0x000D4000)
+#define MX51_GPC_BASE_ADDR      (MX51_AIPS1_BASE_ADDR + 0x000D8000)
+
+/*
+ * Defines for modules using static and dynamic DMA channels
+ */
+#define MX51_MXC_DMA_CHANNEL_IRAM       30
+#define MX51_MXC_DMA_CHANNEL_SPDIF_TX   MXC_DMA_DYNAMIC_CHANNEL
+#define MX51_MXC_DMA_CHANNEL_UART1_RX   MXC_DMA_DYNAMIC_CHANNEL
+#define MX51_MXC_DMA_CHANNEL_UART1_TX   MXC_DMA_DYNAMIC_CHANNEL
+#define MX51_MXC_DMA_CHANNEL_UART2_RX   MXC_DMA_DYNAMIC_CHANNEL
+#define MX51_MXC_DMA_CHANNEL_UART2_TX   MXC_DMA_DYNAMIC_CHANNEL
+#define MX51_MXC_DMA_CHANNEL_UART3_RX   MXC_DMA_DYNAMIC_CHANNEL
+#define MX51_MXC_DMA_CHANNEL_UART3_TX   MXC_DMA_DYNAMIC_CHANNEL
+#define MX51_MXC_DMA_CHANNEL_MMC1       MXC_DMA_DYNAMIC_CHANNEL
+#define MX51_MXC_DMA_CHANNEL_MMC2       MXC_DMA_DYNAMIC_CHANNEL
+#define MX51_MXC_DMA_CHANNEL_SSI1_RX    MXC_DMA_DYNAMIC_CHANNEL
+#define MX51_MXC_DMA_CHANNEL_SSI1_TX    MXC_DMA_DYNAMIC_CHANNEL
+#define MX51_MXC_DMA_CHANNEL_SSI2_RX    MXC_DMA_DYNAMIC_CHANNEL
+#ifdef CONFIG_SDMA_IRAM
+#define MX51_MXC_DMA_CHANNEL_SSI2_TX    (MX51_MXC_DMA_CHANNEL_IRAM + 1)
+#else                           /*CONFIG_SDMA_IRAM */
+#define MX51_MXC_DMA_CHANNEL_SSI2_TX    MXC_DMA_DYNAMIC_CHANNEL
+#endif                          /*CONFIG_SDMA_IRAM */
+#define MX51_MXC_DMA_CHANNEL_CSPI1_RX   MXC_DMA_DYNAMIC_CHANNEL
+#define MX51_MXC_DMA_CHANNEL_CSPI1_TX   MXC_DMA_DYNAMIC_CHANNEL
+#define MX51_MXC_DMA_CHANNEL_CSPI2_RX   MXC_DMA_DYNAMIC_CHANNEL
+#define MX51_MXC_DMA_CHANNEL_CSPI2_TX   MXC_DMA_DYNAMIC_CHANNEL
+#define MX51_MXC_DMA_CHANNEL_CSPI3_RX   MXC_DMA_DYNAMIC_CHANNEL
+#define MX51_MXC_DMA_CHANNEL_CSPI3_TX   MXC_DMA_DYNAMIC_CHANNEL
+#define MX51_MXC_DMA_CHANNEL_ATA_RX     MXC_DMA_DYNAMIC_CHANNEL
+#define MX51_MXC_DMA_CHANNEL_ATA_TX     MXC_DMA_DYNAMIC_CHANNEL
+#define MX51_MXC_DMA_CHANNEL_MEMORY     MXC_DMA_DYNAMIC_CHANNEL
+
+/*
+ * AIPS 2
+ */
+#define MX51_AIPS2_BASE_ADDR            0x83F00000
+#define MX51_AIPS2_BASE_ADDR_VIRT       0xFB200000
+#define MX51_AIPS2_SIZE                 SZ_1M
+
+#define MX51_PLL1_BASE_ADDR     (MX51_AIPS2_BASE_ADDR + 0x00080000)
+#define MX51_PLL2_BASE_ADDR     (MX51_AIPS2_BASE_ADDR + 0x00084000)
+#define MX51_PLL3_BASE_ADDR     (MX51_AIPS2_BASE_ADDR + 0x00088000)
+#define MX51_AHBMAX_BASE_ADDR   (MX51_AIPS2_BASE_ADDR + 0x00094000)
+#define MX51_IIM_BASE_ADDR      (MX51_AIPS2_BASE_ADDR + 0x00098000)
+#define MX51_CSU_BASE_ADDR      (MX51_AIPS2_BASE_ADDR + 0x0009C000)
+#define MX51_ARM_BASE_ADDR      (MX51_AIPS2_BASE_ADDR + 0x000A0000)
+#define MX51_OWIRE_BASE_ADDR    (MX51_AIPS2_BASE_ADDR + 0x000A4000)
+#define MX51_FIRI_BASE_ADDR     (MX51_AIPS2_BASE_ADDR + 0x000A8000)
+#define MX51_CSPI2_BASE_ADDR    (MX51_AIPS2_BASE_ADDR + 0x000AC000)
+#define MX51_SDMA_BASE_ADDR     (MX51_AIPS2_BASE_ADDR + 0x000B0000)
+#define MX51_SCC_BASE_ADDR      (MX51_AIPS2_BASE_ADDR + 0x000B4000)
+#define MX51_ROMCP_BASE_ADDR    (MX51_AIPS2_BASE_ADDR + 0x000B8000)
+#define MX51_RTIC_BASE_ADDR     (MX51_AIPS2_BASE_ADDR + 0x000BC000)
+#define MX51_CSPI3_BASE_ADDR    (MX51_AIPS2_BASE_ADDR + 0x000C0000)
+#define MX51_I2C2_BASE_ADDR     (MX51_AIPS2_BASE_ADDR + 0x000C4000)
+#define MX51_I2C1_BASE_ADDR     (MX51_AIPS2_BASE_ADDR + 0x000C8000)
+#define MX51_SSI1_BASE_ADDR     (MX51_AIPS2_BASE_ADDR + 0x000CC000)
+#define MX51_AUDMUX_BASE_ADDR   (MX51_AIPS2_BASE_ADDR + 0x000D0000)
+#define MX51_M4IF_BASE_ADDR     (MX51_AIPS2_BASE_ADDR + 0x000D8000)
+#define MX51_ESDCTL_BASE_ADDR   (MX51_AIPS2_BASE_ADDR + 0x000D9000)
+#define MX51_WEIM_BASE_ADDR     (MX51_AIPS2_BASE_ADDR + 0x000DA000)
+#define MX51_NFC_BASE_ADDR      (MX51_AIPS2_BASE_ADDR + 0x000DB000)
+#define MX51_EMI_BASE_ADDR      (MX51_AIPS2_BASE_ADDR + 0x000DBF00)
+#define MX51_MIPI_HSC_BASE_ADDR (MX51_AIPS2_BASE_ADDR + 0x000DC000)
+#define MX51_ATA_BASE_ADDR      (MX51_AIPS2_BASE_ADDR + 0x000E0000)
+#define MX51_SIM_BASE_ADDR      (MX51_AIPS2_BASE_ADDR + 0x000E4000)
+#define MX51_SSI3BASE_ADDR      (MX51_AIPS2_BASE_ADDR + 0x000E8000)
+#define MX51_MXC_FEC_BASE_ADDR  (MX51_AIPS2_BASE_ADDR + 0x000EC000)
+#define MX51_TVE_BASE_ADDR      (MX51_AIPS2_BASE_ADDR + 0x000F0000)
+#define MX51_VPU_BASE_ADDR      (MX51_AIPS2_BASE_ADDR + 0x000F4000)
+#define MX51_SAHARA_BASE_ADDR   (MX51_AIPS2_BASE_ADDR + 0x000F8000)
+
+/*
+ * Memory regions and CS
+ */
+#define MX51_GPU_CTRL_BASE_ADDR         0x30000000
+#define MX51_IPU_CTRL_BASE_ADDR         0x40000000
+#define MX51_CSD0_BASE_ADDR             0x90000000
+#define MX51_CSD1_BASE_ADDR             0xA0000000
+#define MX51_CS0_BASE_ADDR              0xB0000000
+#define MX51_CS1_BASE_ADDR              0xB8000000
+#define MX51_CS2_BASE_ADDR              0xC0000000
+#define MX51_CS3_BASE_ADDR              0xC8000000
+#define MX51_CS4_BASE_ADDR              0xCC000000
+#define MX51_CS5_BASE_ADDR              0xCE000000
+
+/* Does given address belongs to the specified memory region? */
+#define ADDRESS_IN_REGION(addr, start, size)                    \
+        (((addr) >= (start)) && ((addr) < (start)+(size)))
+
+/* Does given address belongs to the specified named `module'? */
+#define MX51_IS_MODULE(addr, module)                           \
+        ADDRESS_IN_REGION(addr, MX51_ ## module ## _BASE_ADDR, \
+                                MX51_ ## module ## _SIZE)
+/*
+ * This macro defines the physical to virtual address mapping for all the
+ * peripheral modules. It is used by passing in the physical address as x
+ * and returning the virtual address. If the physical address is not mapped,
+ * it returns 0xDEADBEEF
+ */
+
+#define MX51_IO_ADDRESS(x)                                      \
+        (void __iomem *)                                        \
+        (MX51_IS_MODULE(x, IRAM) ? MX51_IRAM_IO_ADDRESS(x) :    \
+        MX51_IS_MODULE(x, TZIC) ? MX51_TZIC_IO_ADDRESS(x) :     \
+        MX51_IS_MODULE(x, DEBUG) ? MX51_DEBUG_IO_ADDRESS(x) :   \
+        MX51_IS_MODULE(x, SPBA0) ? MX51_SPBA0_IO_ADDRESS(x) :   \
+        MX51_IS_MODULE(x, AIPS1) ? MX51_AIPS1_IO_ADDRESS(x) :   \
+        MX51_IS_MODULE(x, AIPS2) ? MX51_AIPS2_IO_ADDRESS(x) :   \
+        MX51_IS_MODULE(x, NFC_AXI) ? MX51_NFC_AXI_IO_ADDRESS(x) : \
+        0xDEADBEEF)
+
+/*
+ * define the address mapping macros: in physical address order
+ */
+#define MX51_IRAM_IO_ADDRESS(x)  \
+        (((x) - MX51_IRAM_BASE_ADDR) + MX51_IRAM_BASE_ADDR_VIRT)
+
+#define MX51_TZIC_IO_ADDRESS(x)  \
+        (((x) - MX51_TZIC_BASE_ADDR) + MX51_TZIC_BASE_ADDR_VIRT)
+
+#define MX51_DEBUG_IO_ADDRESS(x)  \
+        (((x) - MX51_DEBUG_BASE_ADDR) + MX51_DEBUG_BASE_ADDR_VIRT)
+
+#define MX51_SPBA0_IO_ADDRESS(x)  \
+        (((x) - MX51_SPBA0_BASE_ADDR) + MX51_SPBA0_BASE_ADDR_VIRT)
+
+#define MX51_AIPS1_IO_ADDRESS(x)  \
+        (((x) - MX51_AIPS1_BASE_ADDR) + MX51_AIPS1_BASE_ADDR_VIRT)
+
+#define MX51_AIPS2_IO_ADDRESS(x)  \
+        (((x) - MX51_AIPS2_BASE_ADDR) + MX51_AIPS2_BASE_ADDR_VIRT)
+
+#define MX51_NFC_AXI_IO_ADDRESS(x) \
+        (((x) - MX51_NFC_AXI_BASE_ADDR) + MX51_NFC_AXI_BASE_ADDR_VIRT)
+
+#define MX51_IS_MEM_DEVICE_NONSHARED(x)         0
+
+/*
+ * DMA request assignments
+ */
+#define MX51_DMA_REQ_SSI3_TX1   47
+#define MX51_DMA_REQ_SSI3_RX1   46
+#define MX51_DMA_REQ_SPDIF      45
+#define MX51_DMA_REQ_UART3_TX   44
+#define MX51_DMA_REQ_UART3_RX   43
+#define MX51_DMA_REQ_SLIM_B_TX  42
+#define MX51_DMA_REQ_SDHC4      41
+#define MX51_DMA_REQ_SDHC3      40
+#define MX51_DMA_REQ_CSPI_TX    39
+#define MX51_DMA_REQ_CSPI_RX    38
+#define MX51_DMA_REQ_SSI3_TX2   37
+#define MX51_DMA_REQ_IPU        36
+#define MX51_DMA_REQ_SSI3_RX2   35
+#define MX51_DMA_REQ_EPIT2      34
+#define MX51_DMA_REQ_CTI2_1     33
+#define MX51_DMA_REQ_EMI_WR     32
+#define MX51_DMA_REQ_CTI2_0     31
+#define MX51_DMA_REQ_EMI_RD     30
+#define MX51_DMA_REQ_SSI1_TX1   29
+#define MX51_DMA_REQ_SSI1_RX1   28
+#define MX51_DMA_REQ_SSI1_TX2   27
+#define MX51_DMA_REQ_SSI1_RX2   26
+#define MX51_DMA_REQ_SSI2_TX1   25
+#define MX51_DMA_REQ_SSI2_RX1   24
+#define MX51_DMA_REQ_SSI2_TX2   23
+#define MX51_DMA_REQ_SSI2_RX2   22
+#define MX51_DMA_REQ_SDHC2      21
+#define MX51_DMA_REQ_SDHC1      20
+#define MX51_DMA_REQ_UART1_TX   19
+#define MX51_DMA_REQ_UART1_RX   18
+#define MX51_DMA_REQ_UART2_TX   17
+#define MX51_DMA_REQ_UART2_RX   16
+#define MX51_DMA_REQ_GPU        15
+#define MX51_DMA_REQ_EXTREQ1    14
+#define MX51_DMA_REQ_FIRI_TX    13
+#define MX51_DMA_REQ_FIRI_RX    12
+#define MX51_DMA_REQ_HS_I2C_RX  11
+#define MX51_DMA_REQ_HS_I2C_TX  10
+#define MX51_DMA_REQ_CSPI2_TX   9
+#define MX51_DMA_REQ_CSPI2_RX   8
+#define MX51_DMA_REQ_CSPI1_TX   7
+#define MX51_DMA_REQ_CSPI1_RX   6
+#define MX51_DMA_REQ_SLIM_B     5
+#define MX51_DMA_REQ_ATA_TX_END 4
+#define MX51_DMA_REQ_ATA_TX     3
+#define MX51_DMA_REQ_ATA_RX     2
+#define MX51_DMA_REQ_GPC        1
+#define MX51_DMA_REQ_VPU        0
+
+/*
+ * Interrupt numbers
+ */
+#define MX51_MXC_INT_BASE       0
+#define MX51_MXC_INT_RESV0      0
+#define MX51_MXC_INT_MMC_SDHC1  1
+#define MX51_MXC_INT_MMC_SDHC2  2
+#define MX51_MXC_INT_MMC_SDHC3  3
+#define MX51_MXC_INT_MMC_SDHC4  4
+#define MX51_MXC_INT_RESV5      5
+#define MX51_MXC_INT_SDMA       6
+#define MX51_MXC_INT_IOMUX      7
+#define MX51_MXC_INT_NFC        8
+#define MX51_MXC_INT_VPU        9
+#define MX51_MXC_INT_IPU_ERR    10
+#define MX51_MXC_INT_IPU_SYN    11
+#define MX51_MXC_INT_GPU        12
+#define MX51_MXC_INT_RESV13     13
+#define MX51_MXC_INT_USB_H1     14
+#define MX51_MXC_INT_EMI        15
+#define MX51_MXC_INT_USB_H2     16
+#define MX51_MXC_INT_USB_H3     17
+#define MX51_MXC_INT_USB_OTG    18
+#define MX51_MXC_INT_SAHARA_H0  19
+#define MX51_MXC_INT_SAHARA_H1  20
+#define MX51_MXC_INT_SCC_SMN    21
+#define MX51_MXC_INT_SCC_STZ    22
+#define MX51_MXC_INT_SCC_SCM    23
+#define MX51_MXC_INT_SRTC_NTZ   24
+#define MX51_MXC_INT_SRTC_TZ    25
+#define MX51_MXC_INT_RTIC       26
+#define MX51_MXC_INT_CSU        27
+#define MX51_MXC_INT_SLIM_B     28
+#define MX51_MXC_INT_SSI1       29
+#define MX51_MXC_INT_SSI2       30
+#define MX51_MXC_INT_UART1      31
+#define MX51_MXC_INT_UART2      32
+#define MX51_MXC_INT_UART3      33
+#define MX51_MXC_INT_RESV34     34
+#define MX51_MXC_INT_RESV35     35
+#define MX51_MXC_INT_CSPI1      36
+#define MX51_MXC_INT_CSPI2      37
+#define MX51_MXC_INT_CSPI       38
+#define MX51_MXC_INT_GPT        39
+#define MX51_MXC_INT_EPIT1      40
+#define MX51_MXC_INT_EPIT2      41
+#define MX51_MXC_INT_GPIO1_INT7 42
+#define MX51_MXC_INT_GPIO1_INT6 43
+#define MX51_MXC_INT_GPIO1_INT5 44
+#define MX51_MXC_INT_GPIO1_INT4 45
+#define MX51_MXC_INT_GPIO1_INT3 46
+#define MX51_MXC_INT_GPIO1_INT2 47
+#define MX51_MXC_INT_GPIO1_INT1 48
+#define MX51_MXC_INT_GPIO1_INT0 49
+#define MX51_MXC_INT_GPIO1_LOW  50
+#define MX51_MXC_INT_GPIO1_HIGH 51
+#define MX51_MXC_INT_GPIO2_LOW  52
+#define MX51_MXC_INT_GPIO2_HIGH 53
+#define MX51_MXC_INT_GPIO3_LOW  54
+#define MX51_MXC_INT_GPIO3_HIGH 55
+#define MX51_MXC_INT_GPIO4_LOW  56
+#define MX51_MXC_INT_GPIO4_HIGH 57
+#define MX51_MXC_INT_WDOG1      58
+#define MX51_MXC_INT_WDOG2      59
+#define MX51_MXC_INT_KPP        60
+#define MX51_MXC_INT_PWM1       61
+#define MX51_MXC_INT_I2C1       62
+#define MX51_MXC_INT_I2C2       63
+#define MX51_MXC_INT_HS_I2C     64
+#define MX51_MXC_INT_RESV65     65
+#define MX51_MXC_INT_RESV66     66
+#define MX51_MXC_INT_SIM_IPB    67
+#define MX51_MXC_INT_SIM_DAT    68
+#define MX51_MXC_INT_IIM        69
+#define MX51_MXC_INT_ATA        70
+#define MX51_MXC_INT_CCM1       71
+#define MX51_MXC_INT_CCM2       72
+#define MX51_MXC_INT_GPC1       73
+#define MX51_MXC_INT_GPC2       74
+#define MX51_MXC_INT_SRC        75
+#define MX51_MXC_INT_NM         76
+#define MX51_MXC_INT_PMU        77
+#define MX51_MXC_INT_CTI_IRQ    78
+#define MX51_MXC_INT_CTI1_TG0   79
+#define MX51_MXC_INT_CTI1_TG1   80
+#define MX51_MXC_INT_MCG_ERR    81
+#define MX51_MXC_INT_MCG_TMR    82
+#define MX51_MXC_INT_MCG_FUNC   83
+#define MX51_MXC_INT_GPU2_IRQ   84
+#define MX51_MXC_INT_GPU2_BUSY  85
+#define MX51_MXC_INT_RESV86     86
+#define MX51_MXC_INT_FEC        87
+#define MX51_MXC_INT_OWIRE      88
+#define MX51_MXC_INT_CTI1_TG2   89
+#define MX51_MXC_INT_SJC        90
+#define MX51_MXC_INT_SPDIF      91
+#define MX51_MXC_INT_TVE        92
+#define MX51_MXC_INT_FIRI       93
+#define MX51_MXC_INT_PWM2       94
+#define MX51_MXC_INT_SLIM_EXP   95
+#define MX51_MXC_INT_SSI3       96
+#define MX51_MXC_INT_EMI_BOOT   97
+#define MX51_MXC_INT_CTI1_TG3   98
+#define MX51_MXC_INT_SMC_RX     99
+#define MX51_MXC_INT_VPU_IDLE   100
+#define MX51_MXC_INT_EMI_NFC    101
+#define MX51_MXC_INT_GPU_IDLE   102
+
+/* silicon revisions specific to i.MX51 */
+#define MX51_CHIP_REV_1_0       0x10
+#define MX51_CHIP_REV_1_1       0x11
+#define MX51_CHIP_REV_1_2       0x12
+#define MX51_CHIP_REV_1_3       0x13
+#define MX51_CHIP_REV_2_0       0x20
+#define MX51_CHIP_REV_2_1       0x21
+#define MX51_CHIP_REV_2_2       0x22
+#define MX51_CHIP_REV_2_3       0x23
+#define MX51_CHIP_REV_3_0       0x30
+#define MX51_CHIP_REV_3_1       0x31
+#define MX51_CHIP_REV_3_2       0x32
+
+/* Mandatory defines used globally */
+
+#if !defined(__ASSEMBLY__) && !defined(__MXC_BOOT_UNCOMPRESS)
+
+extern unsigned int system_rev;
+
+static inline unsigned int mx51_revision(void)
+{
+        return system_rev;
+}
+#endif
+
+#endif  /*  __ASM_ARCH_MXC_MX51_H__ */
diff --git a/arch/arm/plat-mxc/include/mach/mxc.h b/arch/arm/plat-mxc/include/mach/mxc.h
index 51990536b845..a790bf212972 100644
--- a/arch/arm/plat-mxc/include/mach/mxc.h
+++ b/arch/arm/plat-mxc/include/mach/mxc.h
@@ -30,6 +30,7 @@
 #define MXC_CPU_MX27            27
 #define MXC_CPU_MX31            31
 #define MXC_CPU_MX35            35
+#define MXC_CPU_MX51            51
 #define MXC_CPU_MXC91231        91231
 
 #ifndef __ASSEMBLY__
@@ -108,6 +109,18 @@ extern unsigned int __mxc_cpu_type;
 # define cpu_is_mx35()          (0)
 #endif
 
+#ifdef CONFIG_ARCH_MX5
+# ifdef mxc_cpu_type
+#  undef mxc_cpu_type
+#  define mxc_cpu_type __mxc_cpu_type
+# else
+#  define mxc_cpu_type MXC_CPU_MX51
+# endif
+# define cpu_is_mx51()          (mxc_cpu_type == MXC_CPU_MX51)
+#else
+# define cpu_is_mx51()          (0)
+#endif
+
 #ifdef CONFIG_ARCH_MXC91231
 # ifdef mxc_cpu_type
 #  undef mxc_cpu_type
@@ -121,9 +134,10 @@ extern unsigned int __mxc_cpu_type;
 #endif
 
 #if defined(CONFIG_ARCH_MX3) || defined(CONFIG_ARCH_MX2)
-#define CSCR_U(n) (IO_ADDRESS(WEIM_BASE_ADDR) + n * 0x10)
-#define CSCR_L(n) (IO_ADDRESS(WEIM_BASE_ADDR) + n * 0x10 + 0x4)
-#define CSCR_A(n) (IO_ADDRESS(WEIM_BASE_ADDR) + n * 0x10 + 0x8)
+/* These are deprecated, use mx[23][157]_setup_weimcs instead. */
+#define CSCR_U(n) (IO_ADDRESS(WEIM_BASE_ADDR + n * 0x10))
+#define CSCR_L(n) (IO_ADDRESS(WEIM_BASE_ADDR + n * 0x10 + 0x4))
+#define CSCR_A(n) (IO_ADDRESS(WEIM_BASE_ADDR + n * 0x10 + 0x8))
 #endif
 
 #define cpu_is_mx3()    (cpu_is_mx31() || cpu_is_mx35() || cpu_is_mxc91231())
diff --git a/arch/arm/plat-mxc/include/mach/mxc91231.h b/arch/arm/plat-mxc/include/mach/mxc91231.h
index 81484d1ef232..5182b986b785 100644
--- a/arch/arm/plat-mxc/include/mach/mxc91231.h
+++ b/arch/arm/plat-mxc/include/mach/mxc91231.h
@@ -184,60 +184,22 @@
 #define MXC91231_CS4_BASE_ADDR          0xB4000000
 #define MXC91231_CS5_BASE_ADDR          0xB6000000
 
-/* Is given address belongs to the specified memory region? */
-#define ADDRESS_IN_REGION(addr, start, size) \
-        (((addr) >= (start)) && ((addr) < (start)+(size)))
-
-/* Is given address belongs to the specified named `module'? */
-#define MXC91231_IS_MODULE(addr, module) \
-        ADDRESS_IN_REGION(addr, MXC91231_ ## module ## _BASE_ADDR, \
-                                MXC91231_ ## module ## _SIZE)
 /*
  * This macro defines the physical to virtual address mapping for all the
  * peripheral modules. It is used by passing in the physical address as x
  * and returning the virtual address. If the physical address is not mapped,
- * it returns 0xDEADBEEF
- */
-
-#define MXC91231_IO_ADDRESS(x) \
-        (void __iomem *) \
-        (MXC91231_IS_MODULE(x, L2CC) ? MXC91231_L2CC_IO_ADDRESS(x) : \
-         MXC91231_IS_MODULE(x, AIPS1) ? MXC91231_AIPS1_IO_ADDRESS(x) : \
-         MXC91231_IS_MODULE(x, AIPS2) ? MXC91231_AIPS2_IO_ADDRESS(x) : \
-         MXC91231_IS_MODULE(x, SPBA0) ? MXC91231_SPBA0_IO_ADDRESS(x) : \
-         MXC91231_IS_MODULE(x, SPBA1) ? MXC91231_SPBA1_IO_ADDRESS(x) : \
-         MXC91231_IS_MODULE(x, ROMP) ? MXC91231_ROMP_IO_ADDRESS(x) : \
-         MXC91231_IS_MODULE(x, AVIC) ? MXC91231_AVIC_IO_ADDRESS(x) : \
-         MXC91231_IS_MODULE(x, X_MEMC) ? MXC91231_X_MEMC_IO_ADDRESS(x) : \
-         0xDEADBEEF)
-
-
-/*
- * define the address mapping macros: in physical address order
+ * it returns 0.
  */
-#define MXC91231_L2CC_IO_ADDRESS(x)  \
-        (((x) - MXC91231_L2CC_BASE_ADDR) + MXC91231_L2CC_BASE_ADDR_VIRT)
-
-#define MXC91231_AIPS1_IO_ADDRESS(x)  \
-        (((x) - MXC91231_AIPS1_BASE_ADDR) + MXC91231_AIPS1_BASE_ADDR_VIRT)
-
-#define MXC91231_SPBA0_IO_ADDRESS(x)  \
-        (((x) - MXC91231_SPBA0_BASE_ADDR) + MXC91231_SPBA0_BASE_ADDR_VIRT)
-
-#define MXC91231_SPBA1_IO_ADDRESS(x)  \
-        (((x) - MXC91231_SPBA1_BASE_ADDR) + MXC91231_SPBA1_BASE_ADDR_VIRT)
-
-#define MXC91231_AIPS2_IO_ADDRESS(x)  \
-        (((x) - MXC91231_AIPS2_BASE_ADDR) + MXC91231_AIPS2_BASE_ADDR_VIRT)
-
-#define MXC91231_ROMP_IO_ADDRESS(x)  \
-        (((x) - MXC91231_ROMP_BASE_ADDR) + MXC91231_ROMP_BASE_ADDR_VIRT)
-
-#define MXC91231_AVIC_IO_ADDRESS(x)  \
-        (((x) - MXC91231_AVIC_BASE_ADDR) + MXC91231_AVIC_BASE_ADDR_VIRT)
 
-#define MXC91231_X_MEMC_IO_ADDRESS(x)  \
-        (((x) - MXC91231_X_MEMC_BASE_ADDR) + MXC91231_X_MEMC_BASE_ADDR_VIRT)
+#define MXC91231_IO_ADDRESS(x) (                                        \
+        IMX_IO_ADDRESS(x, MXC91231_L2CC) ?:                             \
+        IMX_IO_ADDRESS(x, MXC91231_X_MEMC) ?:                           \
+        IMX_IO_ADDRESS(x, MXC91231_ROMP) ?:                             \
+        IMX_IO_ADDRESS(x, MXC91231_AVIC) ?:                             \
+        IMX_IO_ADDRESS(x, MXC91231_AIPS1) ?:                            \
+        IMX_IO_ADDRESS(x, MXC91231_SPBA0) ?:                            \
+        IMX_IO_ADDRESS(x, MXC91231_SPBA1) ?:                            \
+        IMX_IO_ADDRESS(x, MXC91231_AIPS2))
 
 /*
  * Interrupt numbers
diff --git a/arch/arm/plat-mxc/include/mach/mxc_ehci.h b/arch/arm/plat-mxc/include/mach/mxc_ehci.h
index 8f796239393e..4b9b8368c0c0 100644
--- a/arch/arm/plat-mxc/include/mach/mxc_ehci.h
+++ b/arch/arm/plat-mxc/include/mach/mxc_ehci.h
@@ -22,6 +22,10 @@
 #define MXC_EHCI_POWER_PINS_ENABLED     (1 << 5)
 #define MXC_EHCI_TTL_ENABLED            (1 << 6)
 
+#define MXC_EHCI_INTERNAL_PHY           (1 << 7)
+#define MXC_EHCI_IPPUE_DOWN             (1 << 8)
+#define MXC_EHCI_IPPUE_UP               (1 << 9)
+
 struct mxc_usbh_platform_data {
         int (*init)(struct platform_device *pdev);
         int (*exit)(struct platform_device *pdev);
diff --git a/arch/arm/plat-mxc/include/mach/ssi.h b/arch/arm/plat-mxc/include/mach/ssi.h
new file mode 100644
index 000000000000..c34ded523f10
--- /dev/null
+++ b/arch/arm/plat-mxc/include/mach/ssi.h
@@ -0,0 +1,18 @@
+#ifndef __MACH_SSI_H
+#define __MACH_SSI_H
+
+struct snd_ac97;
+
+extern unsigned char imx_ssi_fiq_start, imx_ssi_fiq_end;
+extern unsigned long imx_ssi_fiq_base, imx_ssi_fiq_tx_buffer, imx_ssi_fiq_rx_buffer;
+
+struct imx_ssi_platform_data {
+        unsigned int flags;
+#define IMX_SSI_DMA            (1 << 0)
+#define IMX_SSI_USE_AC97       (1 << 1)
+        void (*ac97_reset) (struct snd_ac97 *ac97);
+        void (*ac97_warm_reset)(struct snd_ac97 *ac97);
+};
+
+#endif /* __MACH_SSI_H */
+
diff --git a/arch/arm/plat-mxc/include/mach/timex.h b/arch/arm/plat-mxc/include/mach/timex.h
index 527a6c24788e..024416ed11cd 100644
--- a/arch/arm/plat-mxc/include/mach/timex.h
+++ b/arch/arm/plat-mxc/include/mach/timex.h
@@ -28,6 +28,8 @@
 #define CLOCK_TICK_RATE         16625000
 #elif defined CONFIG_ARCH_MX25
 #define CLOCK_TICK_RATE         16000000
+#elif defined CONFIG_ARCH_MX5
+#define CLOCK_TICK_RATE         8000000
 #elif defined CONFIG_ARCH_MXC91231
 #define CLOCK_TICK_RATE         13000000
 #endif
diff --git a/arch/arm/plat-mxc/include/mach/uncompress.h b/arch/arm/plat-mxc/include/mach/uncompress.h
index d49384cb1e97..52e476a150ca 100644
--- a/arch/arm/plat-mxc/include/mach/uncompress.h
+++ b/arch/arm/plat-mxc/include/mach/uncompress.h
@@ -1,8 +1,6 @@
 /*
  *  arch/arm/plat-mxc/include/mach/uncompress.h
  *
- *
- *
  *  Copyright (C) 1999 ARM Limited
  *  Copyright (C) Shane Nay (shane@minirl.com)
  *
@@ -25,7 +23,6 @@
 
 #define __MXC_BOOT_UNCOMPRESS
 
-#include <mach/hardware.h>
 #include <asm/mach-types.h>
 
 static unsigned long uart_base;
diff --git a/arch/arm/plat-mxc/iomux-mx1-mx2.c b/arch/arm/plat-mxc/iomux-mx1-mx2.c
deleted file mode 100644
index a37163ce280b..000000000000
--- a/arch/arm/plat-mxc/iomux-mx1-mx2.c
+++ /dev/null
@@ -1,157 +0,0 @@
-/*
- *  arch/arm/mach-mxc/generic.c
- *
- *  author: Sascha Hauer
- *  Created: april 20th, 2004
- *  Copyright: Synertronixx GmbH
- *
- *  Common code for i.MX machines
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- *
- */
-
-#include <linux/errno.h>
-#include <linux/init.h>
-#include <linux/kernel.h>
-#include <linux/module.h>
-#include <linux/string.h>
-#include <linux/gpio.h>
-
-#include <mach/hardware.h>
-#include <asm/mach/map.h>
-#include <mach/iomux.h>
-
-void mxc_gpio_mode(int gpio_mode)
-{
-        unsigned int pin = gpio_mode & GPIO_PIN_MASK;
-        unsigned int port = (gpio_mode & GPIO_PORT_MASK) >> GPIO_PORT_SHIFT;
-        unsigned int ocr = (gpio_mode & GPIO_OCR_MASK) >> GPIO_OCR_SHIFT;
-        unsigned int tmp;
-
-        /* Pullup enable */
-        tmp = __raw_readl(VA_GPIO_BASE + MXC_PUEN(port));
-        if (gpio_mode & GPIO_PUEN)
-                tmp |= (1 << pin);
-        else
-                tmp &= ~(1 << pin);
-        __raw_writel(tmp, VA_GPIO_BASE + MXC_PUEN(port));
-
-        /* Data direction */
-        tmp = __raw_readl(VA_GPIO_BASE + MXC_DDIR(port));
-        if (gpio_mode & GPIO_OUT)
-                tmp |= 1 << pin;
-        else
-                tmp &= ~(1 << pin);
-        __raw_writel(tmp, VA_GPIO_BASE + MXC_DDIR(port));
-
-        /* Primary / alternate function */
-        tmp = __raw_readl(VA_GPIO_BASE + MXC_GPR(port));
-        if (gpio_mode & GPIO_AF)
-                tmp |= (1 << pin);
-        else
-                tmp &= ~(1 << pin);
-        __raw_writel(tmp, VA_GPIO_BASE + MXC_GPR(port));
-
-        /* use as gpio? */
-        tmp = __raw_readl(VA_GPIO_BASE + MXC_GIUS(port));
-        if (gpio_mode & (GPIO_PF | GPIO_AF))
-                tmp &= ~(1 << pin);
-        else
-                tmp |= (1 << pin);
-        __raw_writel(tmp, VA_GPIO_BASE + MXC_GIUS(port));
-
-        if (pin < 16) {
-                tmp = __raw_readl(VA_GPIO_BASE + MXC_OCR1(port));
-                tmp &= ~(3 << (pin * 2));
-                tmp |= (ocr << (pin * 2));
-                __raw_writel(tmp, VA_GPIO_BASE + MXC_OCR1(port));
-
-                tmp = __raw_readl(VA_GPIO_BASE + MXC_ICONFA1(port));
-                tmp &= ~(3 << (pin * 2));
-                tmp |= ((gpio_mode >> GPIO_AOUT_SHIFT) & 3) << (pin * 2);
-                __raw_writel(tmp, VA_GPIO_BASE + MXC_ICONFA1(port));
-
-                tmp = __raw_readl(VA_GPIO_BASE + MXC_ICONFB1(port));
-                tmp &= ~(3 << (pin * 2));
-                tmp |= ((gpio_mode >> GPIO_BOUT_SHIFT) & 3) << (pin * 2);
-                __raw_writel(tmp, VA_GPIO_BASE + MXC_ICONFB1(port));
-        } else {
-                pin -= 16;
-
-                tmp = __raw_readl(VA_GPIO_BASE + MXC_OCR2(port));
-                tmp &= ~(3 << (pin * 2));
-                tmp |= (ocr << (pin * 2));
-                __raw_writel(tmp, VA_GPIO_BASE + MXC_OCR2(port));
-
-                tmp = __raw_readl(VA_GPIO_BASE + MXC_ICONFA2(port));
-                tmp &= ~(3 << (pin * 2));
-                tmp |= ((gpio_mode >> GPIO_AOUT_SHIFT) & 3) << (pin * 2);
-                __raw_writel(tmp, VA_GPIO_BASE + MXC_ICONFA2(port));
-
-                tmp = __raw_readl(VA_GPIO_BASE + MXC_ICONFB2(port));
-                tmp &= ~(3 << (pin * 2));
-                tmp |= ((gpio_mode >> GPIO_BOUT_SHIFT) & 3) << (pin * 2);
-                __raw_writel(tmp, VA_GPIO_BASE + MXC_ICONFB2(port));
-        }
-}
-EXPORT_SYMBOL(mxc_gpio_mode);
-
-int mxc_gpio_setup_multiple_pins(const int *pin_list, unsigned count,
-                const char *label)
-{
-        const int *p = pin_list;
-        int i;
-        unsigned gpio;
-        unsigned mode;
-        int ret = -EINVAL;
-
-        for (i = 0; i < count; i++) {
-                gpio = *p & (GPIO_PIN_MASK | GPIO_PORT_MASK);
-                mode = *p & ~(GPIO_PIN_MASK | GPIO_PORT_MASK);
-
-                if (gpio >= (GPIO_PORT_MAX + 1) * 32)
-                        goto setup_error;
-
-                ret = gpio_request(gpio, label);
-                if (ret)
-                        goto setup_error;
-
-                mxc_gpio_mode(gpio | mode);
-
-                p++;
-        }
-        return 0;
-
-setup_error:
-        mxc_gpio_release_multiple_pins(pin_list, i);
-        return ret;
-}
-EXPORT_SYMBOL(mxc_gpio_setup_multiple_pins);
-
-void mxc_gpio_release_multiple_pins(const int *pin_list, int count)
-{
-        const int *p = pin_list;
-        int i;
-
-        for (i = 0; i < count; i++) {
-                unsigned gpio = *p & (GPIO_PIN_MASK | GPIO_PORT_MASK);
-                gpio_free(gpio);
-                p++;
-        }
-
-}
-EXPORT_SYMBOL(mxc_gpio_release_multiple_pins);
-
diff --git a/arch/arm/plat-mxc/iomux-v1.c b/arch/arm/plat-mxc/iomux-v1.c
new file mode 100644
index 000000000000..960a02cbcbaf
--- /dev/null
+++ b/arch/arm/plat-mxc/iomux-v1.c
@@ -0,0 +1,238 @@
+/*
+ * arch/arm/plat-mxc/iomux-v1.c
+ *
+ * Copyright (C) 2004 Sascha Hauer, Synertronixx GmbH
+ * Copyright (C) 2009 Uwe Kleine-Koenig, Pengutronix
+ *
+ * Common code for i.MX1, i.MX21 and i.MX27
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA.
+ */
+
+#include <linux/errno.h>
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/string.h>
+#include <linux/gpio.h>
+
+#include <mach/hardware.h>
+#include <asm/mach/map.h>
+#include <mach/iomux-v1.h>
+
+static void __iomem *imx_iomuxv1_baseaddr;
+static unsigned imx_iomuxv1_numports;
+
+static inline unsigned long imx_iomuxv1_readl(unsigned offset)
+{
+        return __raw_readl(imx_iomuxv1_baseaddr + offset);
+}
+
+static inline void imx_iomuxv1_writel(unsigned long val, unsigned offset)
+{
+        __raw_writel(val, imx_iomuxv1_baseaddr + offset);
+}
+
+static inline void imx_iomuxv1_rmwl(unsigned offset,
+                unsigned long mask, unsigned long value)
+{
+        unsigned long reg = imx_iomuxv1_readl(offset);
+
+        reg &= ~mask;
+        reg |= value;
+
+        imx_iomuxv1_writel(reg, offset);
+}
+
+static inline void imx_iomuxv1_set_puen(
+                unsigned int port, unsigned int pin, int on)
+{
+        unsigned long mask = 1 << pin;
+
+        imx_iomuxv1_rmwl(MXC_PUEN(port), mask, on ? mask : 0);
+}
+
+static inline void imx_iomuxv1_set_ddir(
+                unsigned int port, unsigned int pin, int out)
+{
+        unsigned long mask = 1 << pin;
+
+        imx_iomuxv1_rmwl(MXC_DDIR(port), mask, out ? mask : 0);
+}
+
+static inline void imx_iomuxv1_set_gpr(
+                unsigned int port, unsigned int pin, int af)
+{
+        unsigned long mask = 1 << pin;
+
+        imx_iomuxv1_rmwl(MXC_GPR(port), mask, af ? mask : 0);
+}
+
+static inline void imx_iomuxv1_set_gius(
+                unsigned int port, unsigned int pin, int inuse)
+{
+        unsigned long mask = 1 << pin;
+
+        imx_iomuxv1_rmwl(MXC_GIUS(port), mask, inuse ? mask : 0);
+}
+
+static inline void imx_iomuxv1_set_ocr(
+                unsigned int port, unsigned int pin, unsigned int ocr)
+{
+        unsigned long shift = (pin & 0xf) << 1;
+        unsigned long mask = 3 << shift;
+        unsigned long value = ocr << shift;
+        unsigned long offset = pin < 16 ? MXC_OCR1(port) : MXC_OCR2(port);
+
+        imx_iomuxv1_rmwl(offset, mask, value);
+}
+
+static inline void imx_iomuxv1_set_iconfa(
+                unsigned int port, unsigned int pin, unsigned int aout)
+{
+        unsigned long shift = (pin & 0xf) << 1;
+        unsigned long mask = 3 << shift;
+        unsigned long value = aout << shift;
+        unsigned long offset = pin < 16 ? MXC_ICONFA1(port) : MXC_ICONFA2(port);
+
+        imx_iomuxv1_rmwl(offset, mask, value);
+}
+
+static inline void imx_iomuxv1_set_iconfb(
+                unsigned int port, unsigned int pin, unsigned int bout)
+{
+        unsigned long shift = (pin & 0xf) << 1;
+        unsigned long mask = 3 << shift;
+        unsigned long value = bout << shift;
+        unsigned long offset = pin < 16 ? MXC_ICONFB1(port) : MXC_ICONFB2(port);
+
+        imx_iomuxv1_rmwl(offset, mask, value);
+}
+
+int mxc_gpio_mode(int gpio_mode)
+{
+        unsigned int pin = gpio_mode & GPIO_PIN_MASK;
+        unsigned int port = (gpio_mode & GPIO_PORT_MASK) >> GPIO_PORT_SHIFT;
+        unsigned int ocr = (gpio_mode & GPIO_OCR_MASK) >> GPIO_OCR_SHIFT;
+        unsigned int aout = (gpio_mode >> GPIO_AOUT_SHIFT) & 3;
+        unsigned int bout = (gpio_mode >> GPIO_BOUT_SHIFT) & 3;
+
+        if (port >= imx_iomuxv1_numports)
+                return -EINVAL;
+
+        /* Pullup enable */
+        imx_iomuxv1_set_puen(port, pin, gpio_mode & GPIO_PUEN);
+
+        /* Data direction */
+        imx_iomuxv1_set_ddir(port, pin, gpio_mode & GPIO_OUT);
+
+        /* Primary / alternate function */
+        imx_iomuxv1_set_gpr(port, pin, gpio_mode & GPIO_AF);
+
+        /* use as gpio? */
+        imx_iomuxv1_set_gius(port, pin, !(gpio_mode & (GPIO_PF | GPIO_AF)));
+
+        imx_iomuxv1_set_ocr(port, pin, ocr);
+
+        imx_iomuxv1_set_iconfa(port, pin, aout);
+
+        imx_iomuxv1_set_iconfb(port, pin, bout);
+
+        return 0;
+}
+EXPORT_SYMBOL(mxc_gpio_mode);
+
+static int imx_iomuxv1_setup_multiple(const int *list, unsigned count)
+{
+        size_t i;
+        int ret;
+
+        for (i = 0; i < count; ++i) {
+                ret = mxc_gpio_mode(list[i]);
+
+                if (ret)
+                        return ret;
+        }
+
+        return ret;
+}
+
+int mxc_gpio_setup_multiple_pins(const int *pin_list, unsigned count,
+                const char *label)
+{
+        size_t i;
+        int ret;
+
+        for (i = 0; i < count; ++i) {
+                unsigned gpio = pin_list[i] & (GPIO_PIN_MASK | GPIO_PORT_MASK);
+
+                ret = gpio_request(gpio, label);
+                if (ret)
+                        goto err_gpio_request;
+        }
+
+        ret = imx_iomuxv1_setup_multiple(pin_list, count);
+        if (ret)
+                goto err_setup;
+
+        return 0;
+
+err_setup:
+        BUG_ON(i != count);
+
+err_gpio_request:
+        mxc_gpio_release_multiple_pins(pin_list, i);
+
+        return ret;
+}
+EXPORT_SYMBOL(mxc_gpio_setup_multiple_pins);
+
+void mxc_gpio_release_multiple_pins(const int *pin_list, int count)
+{
+        size_t i;
+
+        for (i = 0; i < count; ++i) {
+                unsigned gpio = pin_list[i] & (GPIO_PIN_MASK | GPIO_PORT_MASK);
+
+                gpio_free(gpio);
+        }
+}
+EXPORT_SYMBOL(mxc_gpio_release_multiple_pins);
+
+static int imx_iomuxv1_init(void)
+{
+#ifdef CONFIG_ARCH_MX1
+        if (cpu_is_mx1()) {
+                imx_iomuxv1_baseaddr = MX1_IO_ADDRESS(MX1_GPIO_BASE_ADDR);
+                imx_iomuxv1_numports = MX1_NUM_GPIO_PORT;
+        } else
+#endif
+#ifdef CONFIG_MACH_MX21
+        if (cpu_is_mx21()) {
+                imx_iomuxv1_baseaddr = MX21_IO_ADDRESS(MX21_GPIO_BASE_ADDR);
+                imx_iomuxv1_numports = MX21_NUM_GPIO_PORT;
+        } else
+#endif
+#ifdef CONFIG_MACH_MX27
+        if (cpu_is_mx27()) {
+                imx_iomuxv1_baseaddr = MX27_IO_ADDRESS(MX27_GPIO_BASE_ADDR);
+                imx_iomuxv1_numports = MX27_NUM_GPIO_PORT;
+        } else
+#endif
+                return -ENODEV;
+
+        return 0;
+}
+pure_initcall(imx_iomuxv1_init);
diff --git a/arch/arm/plat-mxc/time.c b/arch/arm/plat-mxc/time.c
index 844567ee35fe..c1ce51abdba6 100644
--- a/arch/arm/plat-mxc/time.c
+++ b/arch/arm/plat-mxc/time.c
@@ -30,9 +30,15 @@
 #include <asm/mach/time.h>
 #include <mach/common.h>
 
+/*
+ * There are 2 versions of the timer hardware on Freescale MXC hardware.
+ * Version 1: MX1/MXL, MX21, MX27.
+ * Version 2: MX25, MX31, MX35, MX37, MX51
+ */
+
 /* defines common for all i.MX */
 #define MXC_TCTL                0x00
-#define MXC_TCTL_TEN            (1 << 0)
+#define MXC_TCTL_TEN            (1 << 0) /* Enable module */
 #define MXC_TPRER               0x04
 
 /* MX1, MX21, MX27 */
@@ -47,8 +53,8 @@
 #define MX2_TSTAT_CAPT          (1 << 1)
 #define MX2_TSTAT_COMP          (1 << 0)
 
-/* MX31, MX35, MX25, MXC91231 */
-#define MX3_TCTL_WAITEN         (1 << 3)
+/* MX31, MX35, MX25, MXC91231, MX5 */
+#define MX3_TCTL_WAITEN         (1 << 3) /* Wait enable mode */
 #define MX3_TCTL_CLK_IPG        (1 << 6)
 #define MX3_TCTL_FRR            (1 << 9)
 #define MX3_IR                  0x0c
@@ -57,6 +63,9 @@
 #define MX3_TCN                 0x24
 #define MX3_TCMP                0x10
 
+#define timer_is_v1()   (cpu_is_mx1() || cpu_is_mx21() || cpu_is_mx27())
+#define timer_is_v2()   (!timer_is_v1())
+
 static struct clock_event_device clockevent_mxc;
 static enum clock_event_mode clockevent_mode = CLOCK_EVT_MODE_UNUSED;
 
@@ -66,7 +75,7 @@ static inline void gpt_irq_disable(void)
 {
         unsigned int tmp;
 
-        if (cpu_is_mx3() || cpu_is_mx25())
+        if (timer_is_v2())
                 __raw_writel(0, timer_base + MX3_IR);
         else {
                 tmp = __raw_readl(timer_base + MXC_TCTL);
@@ -76,7 +85,7 @@ static inline void gpt_irq_disable(void)
 
 static inline void gpt_irq_enable(void)
 {
-        if (cpu_is_mx3() || cpu_is_mx25())
+        if (timer_is_v2())
                 __raw_writel(1<<0, timer_base + MX3_IR);
         else {
                 __raw_writel(__raw_readl(timer_base + MXC_TCTL) | MX1_2_TCTL_IRQEN,
@@ -86,11 +95,13 @@ static inline void gpt_irq_enable(void)
 
 static void gpt_irq_acknowledge(void)
 {
-        if (cpu_is_mx1())
-                __raw_writel(0, timer_base + MX1_2_TSTAT);
-        if (cpu_is_mx2())
-                __raw_writel(MX2_TSTAT_CAPT | MX2_TSTAT_COMP, timer_base + MX1_2_TSTAT);
-        if (cpu_is_mx3() || cpu_is_mx25())
+        if (timer_is_v1()) {
+                if (cpu_is_mx1())
+                        __raw_writel(0, timer_base + MX1_2_TSTAT);
+                else
+                        __raw_writel(MX2_TSTAT_CAPT | MX2_TSTAT_COMP,
+                                timer_base + MX1_2_TSTAT);
+        } else if (timer_is_v2())
                 __raw_writel(MX3_TSTAT_OF1, timer_base + MX3_TSTAT);
 }
 
@@ -117,7 +128,7 @@ static int __init mxc_clocksource_init(struct clk *timer_clk)
 {
         unsigned int c = clk_get_rate(timer_clk);
 
-        if (cpu_is_mx3() || cpu_is_mx25())
+        if (timer_is_v2())
                 clocksource_mxc.read = mx3_get_cycles;
 
         clocksource_mxc.mult = clocksource_hz2mult(c,
@@ -180,7 +191,7 @@ static void mxc_set_mode(enum clock_event_mode mode,
 
         if (mode != clockevent_mode) {
                 /* Set event time into far-far future */
-                if (cpu_is_mx3() || cpu_is_mx25())
+                if (timer_is_v2())
                         __raw_writel(__raw_readl(timer_base + MX3_TCN) - 3,
                                         timer_base + MX3_TCMP);
                 else
@@ -233,7 +244,7 @@ static irqreturn_t mxc_timer_interrupt(int irq, void *dev_id)
         struct clock_event_device *evt = &clockevent_mxc;
         uint32_t tstat;
 
-        if (cpu_is_mx3() || cpu_is_mx25())
+        if (timer_is_v2())
                 tstat = __raw_readl(timer_base + MX3_TSTAT);
         else
                 tstat = __raw_readl(timer_base + MX1_2_TSTAT);
@@ -264,7 +275,7 @@ static int __init mxc_clockevent_init(struct clk *timer_clk)
 {
         unsigned int c = clk_get_rate(timer_clk);
 
-        if (cpu_is_mx3() || cpu_is_mx25())
+        if (timer_is_v2())
                 clockevent_mxc.set_next_event = mx3_set_next_event;
 
         clockevent_mxc.mult = div_sc(c, NSEC_PER_SEC,
@@ -296,7 +307,7 @@ void __init mxc_timer_init(struct clk *timer_clk, void __iomem *base, int irq)
         __raw_writel(0, timer_base + MXC_TCTL);
         __raw_writel(0, timer_base + MXC_TPRER); /* see datasheet note */
 
-        if (cpu_is_mx3() || cpu_is_mx25())
+        if (timer_is_v2())
                 tctl_val = MX3_TCTL_CLK_IPG | MX3_TCTL_FRR | MX3_TCTL_WAITEN | MXC_TCTL_TEN;
         else
                 tctl_val = MX1_2_TCTL_FRR | MX1_2_TCTL_CLK_PCLK1 | MXC_TCTL_TEN;
diff --git a/arch/arm/plat-mxc/tzic.c b/arch/arm/plat-mxc/tzic.c
new file mode 100644
index 000000000000..afa6709db0b3
--- /dev/null
+++ b/arch/arm/plat-mxc/tzic.c
@@ -0,0 +1,172 @@
+/*
+ * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved.
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+#include <linux/module.h>
+#include <linux/moduleparam.h>
+#include <linux/init.h>
+#include <linux/device.h>
+#include <linux/errno.h>
+#include <linux/io.h>
+
+#include <asm/mach/irq.h>
+
+#include <mach/hardware.h>
+
+/*
+ *****************************************
+ * TZIC Registers                        *
+ *****************************************
+ */
+
+#define TZIC_INTCNTL    0x0000  /* Control register */
+#define TZIC_INTTYPE    0x0004  /* Controller Type register */
+#define TZIC_IMPID      0x0008  /* Distributor Implementer Identification */
+#define TZIC_PRIOMASK   0x000C  /* Priority Mask Reg */
+#define TZIC_SYNCCTRL   0x0010  /* Synchronizer Control register */
+#define TZIC_DSMINT     0x0014  /* DSM interrupt Holdoffregister */
+#define TZIC_INTSEC0(i) (0x0080 + ((i) << 2)) /* Interrupt Security Reg 0 */
+#define TZIC_ENSET0(i)  (0x0100 + ((i) << 2)) /* Enable Set Reg 0 */
+#define TZIC_ENCLEAR0(i) (0x0180 + ((i) << 2)) /* Enable Clear Reg 0 */
+#define TZIC_SRCSET0    0x0200  /* Source Set Register 0 */
+#define TZIC_SRCCLAR0   0x0280  /* Source Clear Register 0 */
+#define TZIC_PRIORITY0  0x0400  /* Priority Register 0 */
+#define TZIC_PND0       0x0D00  /* Pending Register 0 */
+#define TZIC_HIPND0     0x0D80  /* High Priority Pending Register */
+#define TZIC_WAKEUP0(i) (0x0E00 + ((i) << 2))   /* Wakeup Config Register */
+#define TZIC_SWINT      0x0F00  /* Software Interrupt Rigger Register */
+#define TZIC_ID0        0x0FD0  /* Indentification Register 0 */
+
+void __iomem *tzic_base; /* Used as irq controller base in entry-macro.S */
+
+/**
+ * tzic_mask_irq() - Disable interrupt number "irq" in the TZIC
+ *
+ * @param  irq          interrupt source number
+ */
+static void tzic_mask_irq(unsigned int irq)
+{
+        int index, off;
+
+        index = irq >> 5;
+        off = irq & 0x1F;
+        __raw_writel(1 << off, tzic_base + TZIC_ENCLEAR0(index));
+}
+
+/**
+ * tzic_unmask_irq() - Enable interrupt number "irq" in the TZIC
+ *
+ * @param  irq          interrupt source number
+ */
+static void tzic_unmask_irq(unsigned int irq)
+{
+        int index, off;
+
+        index = irq >> 5;
+        off = irq & 0x1F;
+        __raw_writel(1 << off, tzic_base + TZIC_ENSET0(index));
+}
+
+static unsigned int wakeup_intr[4];
+
+/**
+ * tzic_set_wake_irq() - Set interrupt number "irq" in the TZIC as a wake-up source.
+ *
+ * @param  irq          interrupt source number
+ * @param  enable       enable as wake-up if equal to non-zero
+ *                      disble as wake-up if equal to zero
+ *
+ * @return       This function returns 0 on success.
+ */
+static int tzic_set_wake_irq(unsigned int irq, unsigned int enable)
+{
+        unsigned int index, off;
+
+        index = irq >> 5;
+        off = irq & 0x1F;
+
+        if (index > 3)
+                return -EINVAL;
+
+        if (enable)
+                wakeup_intr[index] |= (1 << off);
+        else
+                wakeup_intr[index] &= ~(1 << off);
+
+        return 0;
+}
+
+static struct irq_chip mxc_tzic_chip = {
+        .name = "MXC_TZIC",
+        .ack = tzic_mask_irq,
+        .mask = tzic_mask_irq,
+        .unmask = tzic_unmask_irq,
+        .set_wake = tzic_set_wake_irq,
+};
+
+/*
+ * This function initializes the TZIC hardware and disables all the
+ * interrupts. It registers the interrupt enable and disable functions
+ * to the kernel for each interrupt source.
+ */
+void __init tzic_init_irq(void __iomem *irqbase)
+{
+        int i;
+
+        tzic_base = irqbase;
+        /* put the TZIC into the reset value with
+         * all interrupts disabled
+         */
+        i = __raw_readl(tzic_base + TZIC_INTCNTL);
+
+        __raw_writel(0x80010001, tzic_base + TZIC_INTCNTL);
+        __raw_writel(0x1f, tzic_base + TZIC_PRIOMASK);
+        __raw_writel(0x02, tzic_base + TZIC_SYNCCTRL);
+
+        for (i = 0; i < 4; i++)
+                __raw_writel(0xFFFFFFFF, tzic_base + TZIC_INTSEC0(i));
+
+        /* disable all interrupts */
+        for (i = 0; i < 4; i++)
+                __raw_writel(0xFFFFFFFF, tzic_base + TZIC_ENCLEAR0(i));
+
+        /* all IRQ no FIQ Warning :: No selection */
+
+        for (i = 0; i < MXC_INTERNAL_IRQS; i++) {
+                set_irq_chip(i, &mxc_tzic_chip);
+                set_irq_handler(i, handle_level_irq);
+                set_irq_flags(i, IRQF_VALID);
+        }
+
+        pr_info("TrustZone Interrupt Controller (TZIC) initialized\n");
+}
+
+/**
+ * tzic_enable_wake() - enable wakeup interrupt
+ *
+ * @param is_idle               1 if called in idle loop (ENSET0 register);
+ *                              0 to be used when called from low power entry
+ * @return                      0 if successful; non-zero otherwise
+ */
+int tzic_enable_wake(int is_idle)
+{
+        unsigned int i, v;
+
+        __raw_writel(1, tzic_base + TZIC_DSMINT);
+        if (unlikely(__raw_readl(tzic_base + TZIC_DSMINT) == 0))
+                return -EAGAIN;
+
+        for (i = 0; i < 4; i++) {
+                v = is_idle ? __raw_readl(TZIC_ENSET0(i)) : wakeup_intr[i];
+                __raw_writel(v, TZIC_WAKEUP0(i));
+        }
+
+        return 0;
+}
diff --git a/arch/arm/plat-nomadik/timer.c b/arch/arm/plat-nomadik/timer.c
index 62f18ad43a28..fa7cb3a57cbf 100644
--- a/arch/arm/plat-nomadik/timer.c
+++ b/arch/arm/plat-nomadik/timer.c
@@ -49,24 +49,17 @@ static struct clocksource nmdk_clksrc = {
 static void nmdk_clkevt_mode(enum clock_event_mode mode,
                              struct clock_event_device *dev)
 {
-        unsigned long flags;
-
         switch (mode) {
         case CLOCK_EVT_MODE_PERIODIC:
-                /* enable interrupts -- and count current value? */
-                raw_local_irq_save(flags);
+                /* count current value? */
                 writel(readl(mtu_base + MTU_IMSC) | 1, mtu_base + MTU_IMSC);
-                raw_local_irq_restore(flags);
                 break;
         case CLOCK_EVT_MODE_ONESHOT:
                 BUG(); /* Not supported, yet */
                 /* FALLTHROUGH */
         case CLOCK_EVT_MODE_SHUTDOWN:
         case CLOCK_EVT_MODE_UNUSED:
-                /* disable irq */
-                raw_local_irq_save(flags);
                 writel(readl(mtu_base + MTU_IMSC) & ~1, mtu_base + MTU_IMSC);
-                raw_local_irq_restore(flags);
                 break;
         case CLOCK_EVT_MODE_RESUME:
                 break;
diff --git a/arch/arm/plat-s3c/Kconfig b/arch/arm/plat-s3c/Kconfig
deleted file mode 100644
index 9e9d0286e48f..000000000000
--- a/arch/arm/plat-s3c/Kconfig
+++ /dev/null
@@ -1,215 +0,0 @@
-# Copyright 2007 Simtec Electronics
-#
-# Licensed under GPLv2
-
-config PLAT_S3C
-        bool
-        depends on ARCH_S3C2410 || ARCH_S3C24A0 || ARCH_S3C64XX
-        default y
-        select NO_IOPORT
-        help
-          Base platform code for any Samsung S3C device
-
-# low-level serial option nodes
-
-if PLAT_S3C
-
-config CPU_LLSERIAL_S3C2410_ONLY
-        bool
-        default y if CPU_LLSERIAL_S3C2410 && !CPU_LLSERIAL_S3C2440
-
-config CPU_LLSERIAL_S3C2440_ONLY
-        bool
-        default y if CPU_LLSERIAL_S3C2440 && !CPU_LLSERIAL_S3C2410
-
-config CPU_LLSERIAL_S3C2410
-        bool
-        help
-          Selected if there is an S3C2410 (or register compatible) serial
-          low-level implementation needed
-
-config CPU_LLSERIAL_S3C2440
-        bool
-        help
-          Selected if there is an S3C2440 (or register compatible) serial
-          low-level implementation needed
-
-# boot configurations
-
-comment "Boot options"
-
-config S3C_BOOT_WATCHDOG
-        bool "S3C Initialisation watchdog"
-        depends on S3C2410_WATCHDOG
-        help
-          Say y to enable the watchdog during the kernel decompression
-          stage. If the kernel fails to uncompress, then the watchdog
-          will trigger a reset and the system should restart.
-
-config S3C_BOOT_ERROR_RESET
-        bool "S3C Reboot on decompression error"
-        help
-          Say y here to use the watchdog to reset the system if the
-          kernel decompressor detects an error during decompression.
-
-config S3C_BOOT_UART_FORCE_FIFO
-       bool "Force UART FIFO on during boot process"
-       default y
-       help
-         Say Y here to force the UART FIFOs on during the kernel
-         uncompressor
-
-comment "Power management"
-
-config S3C2410_PM_DEBUG
-        bool "S3C2410 PM Suspend debug"
-        depends on PM
-        help
-          Say Y here if you want verbose debugging from the PM Suspend and
-          Resume code. See <file:Documentation/arm/Samsung-S3C24XX/Suspend.txt>
-          for more information.
-
-config S3C_PM_DEBUG_LED_SMDK
-       bool "SMDK LED suspend/resume debugging"
-       depends on PM && (MACH_SMDK6410)
-       help
-         Say Y here to enable the use of the SMDK LEDs on the baseboard
-         for debugging of the state of the suspend and resume process.
-
-         Note, this currently only works for S3C64XX based SMDK boards.
-
-config S3C2410_PM_CHECK
-        bool "S3C2410 PM Suspend Memory CRC"
-        depends on PM && CRC32
-        help
-          Enable the PM code's memory area checksum over sleep. This option
-          will generate CRCs of all blocks of memory, and store them before
-          going to sleep. The blocks are then checked on resume for any
-          errors.
-
-          Note, this can take several seconds depending on memory size
-          and CPU speed.
-
-          See <file:Documentation/arm/Samsung-S3C24XX/Suspend.txt>
-
-config S3C2410_PM_CHECK_CHUNKSIZE
-        int "S3C2410 PM Suspend CRC Chunksize (KiB)"
-        depends on PM && S3C2410_PM_CHECK
-        default 64
-        help
-          Set the chunksize in Kilobytes of the CRC for checking memory
-          corruption over suspend and resume. A smaller value will mean that
-          the CRC data block will take more memory, but wil identify any
-          faults with better precision.
-
-          See <file:Documentation/arm/Samsung-S3C24XX/Suspend.txt>
-
-config S3C_LOWLEVEL_UART_PORT
-        int "S3C UART to use for low-level messages"
-        default 0
-        help
-          Choice of which UART port to use for the low-level messages,
-          such as the `Uncompressing...` at start time. The value of
-          this configuration should be between zero and two. The port
-          must have been initialised by the boot-loader before use.
-
-# options for gpiolib support
-
-config S3C_GPIO_SPACE
-        int "Space between gpio banks"
-        default 0
-        help
-          Add a number of spare GPIO entries between each bank for debugging
-          purposes. This allows any problems where an counter overflows from
-          one bank to another to be caught, at the expense of using a little
-          more memory.
-
-config S3C_GPIO_TRACK
-        bool
-        help
-          Internal configuration option to enable the s3c specific gpio
-          chip tracking if the platform requires it.
-
-config S3C_GPIO_PULL_UPDOWN
-        bool
-        help
-          Internal configuration to enable the correct GPIO pull helper
-
-config S3C_GPIO_PULL_DOWN
-        bool
-        help
-          Internal configuration to enable the correct GPIO pull helper
-
-config S3C_GPIO_PULL_UP
-        bool
-        help
-          Internal configuration to enable the correct GPIO pull helper
-
-config S3C_GPIO_CFG_S3C24XX
-        bool
-        help
-          Internal configuration to enable S3C24XX style GPIO configuration
-          functions.
-
-config S3C_GPIO_CFG_S3C64XX
-        bool
-        help
-          Internal configuration to enable S3C64XX style GPIO configuration
-          functions.
-
-config S5P_GPIO_CFG_S5PC1XX
-        bool
-        help
-          Internal configuration to enable S5PC1XX style GPIO configuration
-          functions.
-
-# DMA
-
-config S3C_DMA
-        bool
-        help
-          Internal configuration for S3C DMA core
-
-# device definitions to compile in
-
-config S3C_DEV_HSMMC
-        bool
-        help
-          Compile in platform device definitions for HSMMC code
-
-config S3C_DEV_HSMMC1
-        bool
-        help
-          Compile in platform device definitions for HSMMC channel 1
-
-config S3C_DEV_HSMMC2
-        bool
-        help
-          Compile in platform device definitions for HSMMC channel 2
-
-config S3C_DEV_I2C1
-        bool
-        help
-          Compile in platform device definitions for I2C channel 1
-
-config S3C_DEV_FB
-        bool
-        help
-          Compile in platform device definition for framebuffer
-
-config S3C_DEV_USB_HOST
-        bool
-        help
-          Compile in platform device definition for USB host.
-
-config S3C_DEV_USB_HSOTG
-        bool
-        help
-          Compile in platform device definition for USB high-speed OtG
-
-config S3C_DEV_NAND
-        bool
-        help
-          Compile in platform device definition for NAND controller
-
-endif
diff --git a/arch/arm/plat-s3c/Makefile b/arch/arm/plat-s3c/Makefile
deleted file mode 100644
index 50444da98425..000000000000
--- a/arch/arm/plat-s3c/Makefile
+++ /dev/null
@@ -1,45 +0,0 @@
-# arch/arm/plat-s3c/Makefile
-#
-# Copyright 2008 Simtec Electronics
-#
-# Licensed under GPLv2
-
-obj-y                           :=
-obj-m                           :=
-obj-n                           :=
-obj-                            :=
-
-# Core support for all Samsung SoCs
-
-obj-y                           +=  init.o
-obj-y                           += time.o
-obj-y                           += clock.o
-obj-y                           += pwm-clock.o
-obj-y                           += gpio.o
-obj-y                           += gpio-config.o
-
-# DMA support
-
-obj-$(CONFIG_S3C_DMA)           += dma.o
-
-# PM support
-
-obj-$(CONFIG_PM)                += pm.o
-obj-$(CONFIG_PM)                += pm-gpio.o
-obj-$(CONFIG_S3C2410_PM_CHECK)  += pm-check.o
-
-# PWM support
-
-obj-$(CONFIG_HAVE_PWM)          += pwm.o
-
-# devices
-
-obj-$(CONFIG_S3C_DEV_HSMMC)     += dev-hsmmc.o
-obj-$(CONFIG_S3C_DEV_HSMMC1)    += dev-hsmmc1.o
-obj-$(CONFIG_S3C_DEV_HSMMC2)    += dev-hsmmc2.o
-obj-y                           += dev-i2c0.o
-obj-$(CONFIG_S3C_DEV_I2C1)      += dev-i2c1.o
-obj-$(CONFIG_S3C_DEV_FB)        += dev-fb.o
-obj-$(CONFIG_S3C_DEV_USB_HOST)  += dev-usb.o
-obj-$(CONFIG_S3C_DEV_USB_HSOTG) += dev-usb-hsotg.o
-obj-$(CONFIG_S3C_DEV_NAND)      += dev-nand.o
diff --git a/arch/arm/plat-s3c24xx/Kconfig b/arch/arm/plat-s3c24xx/Kconfig
index 342647eb91d8..6e93ef8f3d43 100644
--- a/arch/arm/plat-s3c24xx/Kconfig
+++ b/arch/arm/plat-s3c24xx/Kconfig
@@ -14,58 +14,40 @@ config PLAT_S3C24XX
 
 if PLAT_S3C24XX
 
-# code that is shared between a number of the s3c24xx implementations
+# low-level serial option nodes
 
-config S3C2410_CLOCK
+config CPU_LLSERIAL_S3C2410_ONLY
         bool
-        help
-          Clock code for the S3C2410, and similar processors which
-          is currently includes the S3C2410, S3C2440, S3C2442.
+        default y if CPU_LLSERIAL_S3C2410 && !CPU_LLSERIAL_S3C2440
 
-config S3C24XX_DCLK
+config CPU_LLSERIAL_S3C2440_ONLY
         bool
-        help
-          Clock code for supporting DCLK/CLKOUT on S3C24XX architectures
+        default y if CPU_LLSERIAL_S3C2440 && !CPU_LLSERIAL_S3C2410
 
-config CPU_S3C244X
+config CPU_LLSERIAL_S3C2410
         bool
-        depends on ARCH_S3C2410 && (CPU_S3C2440 || CPU_S3C2442)
-        help
-          Support for S3C2440 and S3C2442 Samsung Mobile CPU based systems.
-
-config S3C2440_CPUFREQ
-        bool "S3C2440/S3C2442 CPU Frequency scaling support"
-        depends on CPU_FREQ_S3C24XX && (CPU_S3C2440 || CPU_S3C2442)
-        select S3C2410_CPUFREQ_UTILS
-        default y
         help
-          CPU Frequency scaling support for S3C2440 and S3C2442 SoC CPUs.
+          Selected if there is an S3C2410 (or register compatible) serial
+          low-level implementation needed
 
-config S3C2440_XTAL_12000000
+config CPU_LLSERIAL_S3C2440
         bool
         help
-          Indicate that the build needs to support 12MHz system
-          crystal.
+          Selected if there is an S3C2440 (or register compatible) serial
+          low-level implementation needed
 
-config S3C2440_XTAL_16934400
-        bool
-        help
-          Indicate that the build needs to support 16.9344MHz system
-          crystal.
+# code that is shared between a number of the s3c24xx implementations
 
-config S3C2440_PLL_12000000
+config S3C2410_CLOCK
         bool
-        depends on S3C2440_CPUFREQ && S3C2440_XTAL_12000000
-        default y if CPU_FREQ_S3C24XX_PLL
         help
-          PLL tables for S3C2440 or S3C2442 CPUs with 12MHz crystals.
+          Clock code for the S3C2410, and similar processors which
+          is currently includes the S3C2410, S3C2440, S3C2442.
 
-config S3C2440_PLL_16934400
+config S3C24XX_DCLK
         bool
-        depends on S3C2440_CPUFREQ && S3C2440_XTAL_16934400
-        default y if CPU_FREQ_S3C24XX_PLL
         help
-          PLL tables for S3C2440 or S3C2442 CPUs with 16.934MHz crystals.
+          Clock code for supporting DCLK/CLKOUT on S3C24XX architectures
 
 config S3C24XX_PWM
         bool "PWM device support"
@@ -74,7 +56,6 @@ config S3C24XX_PWM
           Support for exporting the PWM timer blocks via the pwm device
           system.
 
-
 # gpio configurations
 
 config S3C24XX_GPIO_EXTRA
@@ -117,13 +98,6 @@ config S3C2410_DMA_DEBUG
           Enable debugging output for the DMA code. This option sends info
           to the kernel log, at priority KERN_DEBUG.
 
-config S3C24XX_ADC
-        bool "ADC common driver support"
-        help
-          Core support for the ADC block found in the S3C24XX SoC systems
-          for drivers such as the touchscreen and hwmon to use to share
-          this resource.
-
 # SPI default pin configuration code
 
 config S3C24XX_SPI_BUS0_GPE11_GPE12_GPE13
diff --git a/arch/arm/plat-s3c24xx/Makefile b/arch/arm/plat-s3c24xx/Makefile
index 5dee8c12e8b4..c2237c41141f 100644
--- a/arch/arm/plat-s3c24xx/Makefile
+++ b/arch/arm/plat-s3c24xx/Makefile
@@ -25,20 +25,12 @@ obj-$(CONFIG_CPU_FREQ_S3C24XX_DEBUGFS) += cpu-freq-debugfs.o
 
 # Architecture dependant builds
 
-obj-$(CONFIG_CPU_S3C244X)       += s3c244x.o
-obj-$(CONFIG_CPU_S3C244X)       += s3c244x-irq.o
-obj-$(CONFIG_CPU_S3C244X)       += s3c244x-clock.o
-obj-$(CONFIG_S3C2440_CPUFREQ)   += s3c2440-cpufreq.o
-obj-$(CONFIG_S3C2440_PLL_12000000) += s3c2440-pll-12000000.o
-obj-$(CONFIG_S3C2440_PLL_16934400) += s3c2440-pll-16934400.o
-
 obj-$(CONFIG_PM_SIMTEC)         += pm-simtec.o
 obj-$(CONFIG_PM)                += pm.o
 obj-$(CONFIG_PM)                += irq-pm.o
 obj-$(CONFIG_PM)                += sleep.o
 obj-$(CONFIG_S3C2410_CLOCK)     += s3c2410-clock.o
 obj-$(CONFIG_S3C2410_DMA)       += dma.o
-obj-$(CONFIG_S3C24XX_ADC)       += adc.o
 obj-$(CONFIG_S3C2410_IOTIMING)  += s3c2410-iotiming.o
 obj-$(CONFIG_S3C2412_IOTIMING)  += s3c2412-iotiming.o
 obj-$(CONFIG_S3C2410_CPUFREQ_UTILS) += s3c2410-cpufreq-utils.o
diff --git a/arch/arm/plat-s3c24xx/clock-dclk.c b/arch/arm/plat-s3c24xx/clock-dclk.c
index ac061a1bcb37..cf97caafe56b 100644
--- a/arch/arm/plat-s3c24xx/clock-dclk.c
+++ b/arch/arm/plat-s3c24xx/clock-dclk.c
@@ -161,14 +161,18 @@ static int s3c24xx_clkout_setparent(struct clk *clk, struct clk *parent)
 
 /* external clock definitions */
 
+static struct clk_ops dclk_ops = {
+        .set_parent     = s3c24xx_dclk_setparent,
+        .set_rate       = s3c24xx_set_dclk_rate,
+        .round_rate     = s3c24xx_round_dclk_rate,
+};
+
 struct clk s3c24xx_dclk0 = {
         .name           = "dclk0",
         .id             = -1,
         .ctrlbit        = S3C2410_DCLKCON_DCLK0EN,
         .enable         = s3c24xx_dclk_enable,
-        .set_parent     = s3c24xx_dclk_setparent,
-        .set_rate       = s3c24xx_set_dclk_rate,
-        .round_rate     = s3c24xx_round_dclk_rate,
+        .ops            = &dclk_ops,
 };
 
 struct clk s3c24xx_dclk1 = {
@@ -176,19 +180,21 @@ struct clk s3c24xx_dclk1 = {
         .id             = -1,
         .ctrlbit        = S3C2410_DCLKCON_DCLK1EN,
         .enable         = s3c24xx_dclk_enable,
-        .set_parent     = s3c24xx_dclk_setparent,
-        .set_rate       = s3c24xx_set_dclk_rate,
-        .round_rate     = s3c24xx_round_dclk_rate,
+        .ops            = &dclk_ops,
+};
+
+static struct clk_ops clkout_ops = {
+        .set_parent     = s3c24xx_clkout_setparent,
 };
 
 struct clk s3c24xx_clkout0 = {
         .name           = "clkout0",
         .id             = -1,
-        .set_parent     = s3c24xx_clkout_setparent,
+        .ops            = &clkout_ops,
 };
 
 struct clk s3c24xx_clkout1 = {
         .name           = "clkout1",
         .id             = -1,
-        .set_parent     = s3c24xx_clkout_setparent,
+        .ops            = &clkout_ops,
 };
diff --git a/arch/arm/plat-s3c24xx/cpu.c b/arch/arm/plat-s3c24xx/cpu.c
index 4af9dd948793..9ca64df35bf6 100644
--- a/arch/arm/plat-s3c24xx/cpu.c
+++ b/arch/arm/plat-s3c24xx/cpu.c
@@ -49,9 +49,7 @@
 #include <plat/s3c2400.h>
 #include <plat/s3c2410.h>
 #include <plat/s3c2412.h>
-#include "s3c244x.h"
-#include <plat/s3c2440.h>
-#include <plat/s3c2442.h>
+#include <plat/s3c244x.h>
 #include <plat/s3c2443.h>
 
 /* table of supported CPUs */
diff --git a/arch/arm/plat-s3c24xx/devs.c b/arch/arm/plat-s3c24xx/devs.c
index 7f686a31e672..8c6de1c9968f 100644
--- a/arch/arm/plat-s3c24xx/devs.c
+++ b/arch/arm/plat-s3c24xx/devs.c
@@ -32,6 +32,7 @@
 
 #include <plat/regs-serial.h>
 #include <plat/udc.h>
+#include <plat/mci.h>
 
 #include <plat/devs.h>
 #include <plat/cpu.h>
@@ -112,34 +113,6 @@ struct s3c24xx_uart_resources s3c2410_uart_resources[] __initdata = {
         },
 };
 
-/* yart devices */
-
-static struct platform_device s3c24xx_uart_device0 = {
-        .id             = 0,
-};
-
-static struct platform_device s3c24xx_uart_device1 = {
-        .id             = 1,
-};
-
-static struct platform_device s3c24xx_uart_device2 = {
-        .id             = 2,
-};
-
-static struct platform_device s3c24xx_uart_device3 = {
-        .id             = 3,
-};
-
-struct platform_device *s3c24xx_uart_src[4] = {
-        &s3c24xx_uart_device0,
-        &s3c24xx_uart_device1,
-        &s3c24xx_uart_device2,
-        &s3c24xx_uart_device3,
-};
-
-struct platform_device *s3c24xx_uart_devs[4] = {
-};
-
 /* LCD Controller */
 
 static struct resource s3c_lcd_resource[] = {
@@ -185,9 +158,27 @@ void __init s3c24xx_fb_set_platdata(struct s3c2410fb_mach_info *pd)
 }
 
 /* Touchscreen */
+
+static struct resource s3c_ts_resource[] = {
+        [0] = {
+                .start = S3C24XX_PA_ADC,
+                .end   = S3C24XX_PA_ADC + S3C24XX_SZ_ADC - 1,
+                .flags = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start = IRQ_TC,
+                .end   = IRQ_TC,
+                .flags = IORESOURCE_IRQ,
+        },
+
+};
+
 struct platform_device s3c_device_ts = {
         .name             = "s3c2410-ts",
         .id               = -1,
+        .dev.parent     = &s3c_device_adc.dev,
+        .num_resources    = ARRAY_SIZE(s3c_ts_resource),
+        .resource         = s3c_ts_resource,
 };
 EXPORT_SYMBOL(s3c_device_ts);
 
@@ -379,6 +370,18 @@ struct platform_device s3c_device_sdi = {
 
 EXPORT_SYMBOL(s3c_device_sdi);
 
+void s3c24xx_mci_set_platdata(struct s3c24xx_mci_pdata *pdata)
+{
+        struct s3c24xx_mci_pdata *npd;
+
+        npd = kmemdup(pdata, sizeof(struct s3c24xx_mci_pdata), GFP_KERNEL);
+        if (!npd)
+                printk(KERN_ERR "%s: no memory to copy pdata", __func__);
+
+        s3c_device_sdi.dev.platform_data = npd;
+}
+
+
 /* SPI (0) */
 
 static struct resource s3c_spi0_resource[] = {
diff --git a/arch/arm/plat-s3c24xx/dma.c b/arch/arm/plat-s3c24xx/dma.c
index f0ea7943ac5a..93827b3d4e84 100644
--- a/arch/arm/plat-s3c24xx/dma.c
+++ b/arch/arm/plat-s3c24xx/dma.c
@@ -33,7 +33,7 @@
 #include <mach/dma.h>
 #include <mach/map.h>
 
-#include <plat/dma-plat.h>
+#include <plat/dma-s3c24xx.h>
 #include <plat/regs-dma.h>
 
 /* io map for dma */
diff --git a/arch/arm/plat-s3c24xx/gpiolib.c b/arch/arm/plat-s3c24xx/gpiolib.c
index 6d7a961d3269..4f0f11a6a677 100644
--- a/arch/arm/plat-s3c24xx/gpiolib.c
+++ b/arch/arm/plat-s3c24xx/gpiolib.c
@@ -20,7 +20,7 @@
 #include <linux/io.h>
 #include <linux/gpio.h>
 
-#include <mach/gpio-core.h>
+#include <plat/gpio-core.h>
 #include <mach/hardware.h>
 #include <asm/irq.h>
 #include <plat/pm.h>
diff --git a/arch/arm/plat-s3c/include/plat/audio-simtec.h b/arch/arm/plat-s3c24xx/include/plat/audio-simtec.h
index 53a93656d5db..de5e88fdcb31 100644
--- a/arch/arm/plat-s3c/include/plat/audio-simtec.h
+++ b/arch/arm/plat-s3c24xx/include/plat/audio-simtec.h
@@ -1,4 +1,4 @@
-/* arch/arm/plat-s3c/include/plat/audio-simtec.h
+/* arch/arm/plat-s3c24xx/include/plat/audio-simtec.h
  *
  * Copyright 2008 Simtec Electronics
  *      http://armlinux.simtec.co.uk/
diff --git a/arch/arm/plat-s3c24xx/include/plat/cpu-freq-core.h b/arch/arm/plat-s3c24xx/include/plat/cpu-freq-core.h
index 33d421d78bad..d623235ae961 100644
--- a/arch/arm/plat-s3c24xx/include/plat/cpu-freq-core.h
+++ b/arch/arm/plat-s3c24xx/include/plat/cpu-freq-core.h
@@ -135,7 +135,7 @@ struct s3c_cpufreq_config {
  * @locktime_m: The lock-time in uS for the MPLL.
  * @locktime_u: The lock-time in uS for the UPLL.
  * @locttime_bits: The number of bits each LOCKTIME field.
- * @need_pll: Set if this driver needs to change the PLL values to acheive
+ * @need_pll: Set if this driver needs to change the PLL values to achieve
  *      any frequency changes. This is really only need by devices like the
  *      S3C2410 where there is no or limited divider between the PLL and the
  *      ARMCLK.
diff --git a/arch/arm/plat-s3c24xx/include/plat/mci.h b/arch/arm/plat-s3c24xx/include/plat/mci.h
index 36aaa10fad06..2ac2b21ec490 100644
--- a/arch/arm/plat-s3c24xx/include/plat/mci.h
+++ b/arch/arm/plat-s3c24xx/include/plat/mci.h
@@ -40,4 +40,13 @@ struct s3c24xx_mci_pdata {
                                      unsigned short vdd);
 };
 
+/**
+ * s3c24xx_mci_set_platdata - set platform data for mmc/sdi device
+ * @pdata: The platform data
+ *
+ * Copy the platform data supplied by @pdata so that this can be marked
+ * __initdata.
+ */
+extern void s3c24xx_mci_set_platdata(struct s3c24xx_mci_pdata *pdata);
+
 #endif /* _ARCH_NCI_H */
diff --git a/arch/arm/plat-s3c24xx/include/plat/s3c2440.h b/arch/arm/plat-s3c24xx/include/plat/s3c2440.h
deleted file mode 100644
index 107853bf9481..000000000000
--- a/arch/arm/plat-s3c24xx/include/plat/s3c2440.h
+++ /dev/null
@@ -1,17 +0,0 @@
-/* linux/include/asm-arm/plat-s3c24xx/s3c2440.h
- *
- * Copyright (c) 2004-2005 Simtec Electronics
- *      Ben Dooks <ben@simtec.co.uk>
- *
- * Header file for s3c2440 cpu support
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-#ifdef CONFIG_CPU_S3C2440
-extern  int s3c2440_init(void);
-#else
-#define s3c2440_init NULL
-#endif
diff --git a/arch/arm/plat-s3c24xx/s3c244x.h b/arch/arm/plat-s3c24xx/include/plat/s3c244x.h
index 6aab5eaae2b4..307248d1ccbb 100644
--- a/arch/arm/plat-s3c24xx/s3c244x.h
+++ b/arch/arm/plat-s3c24xx/include/plat/s3c244x.h
@@ -1,4 +1,4 @@
-/* linux/arch/arm/plat-s3c24xx/s3c244x.h
+/* linux/arch/arm/plat-s3c24xx/include/plat/s3c244x.h
  *
  * Copyright (c) 2004-2005 Simtec Electronics
  *      Ben Dooks <ben@simtec.co.uk>
@@ -23,3 +23,15 @@ extern void s3c244x_init_clocks(int xtal);
 #define s3c244x_init_uarts NULL
 #define s3c244x_map_io NULL
 #endif
+
+#ifdef CONFIG_CPU_S3C2440
+extern  int s3c2440_init(void);
+#else
+#define s3c2440_init NULL
+#endif
+
+#ifdef CONFIG_CPU_S3C2442
+extern  int s3c2442_init(void);
+#else
+#define s3c2442_init NULL
+#endif
diff --git a/arch/arm/plat-s3c64xx/Kconfig b/arch/arm/plat-s3c64xx/Kconfig
deleted file mode 100644
index e6da87a5885c..000000000000
--- a/arch/arm/plat-s3c64xx/Kconfig
+++ /dev/null
@@ -1,71 +0,0 @@
-# Copyright 2008 Openmoko, Inc.
-# Copyright 2008 Simtec Electronics
-#       Ben Dooks <ben@simtec.co.uk>
-#
-# Licensed under GPLv2
-
-config PLAT_S3C64XX
-        bool
-        depends on ARCH_S3C64XX
-        default y
-        select CPU_V6
-        select PLAT_S3C
-        select ARM_VIC
-        select NO_IOPORT
-        select ARCH_REQUIRE_GPIOLIB
-        select S3C_GPIO_TRACK
-        select S3C_GPIO_PULL_UPDOWN
-        select S3C_GPIO_CFG_S3C24XX
-        select S3C_GPIO_CFG_S3C64XX
-        select S3C_DEV_NAND
-        select USB_ARCH_HAS_OHCI
-        help
-          Base platform code for any Samsung S3C64XX device
-
-if PLAT_S3C64XX
-
-# Configuration options shared by all S3C64XX implementations
-
-config CPU_S3C6400_INIT
-        bool
-        help
-          Common initialisation code for the S3C6400 that is shared
-          by other CPUs in the series, such as the S3C6410.
-
-config CPU_S3C6400_CLOCK
-        bool
-        help
-          Common clock support code for the S3C6400 that is shared
-          by other CPUs in the series, such as the S3C6410.
-
-config S3C64XX_DMA
-        bool "S3C64XX DMA"
-        select S3C_DMA
-
-# platform specific device setup
-
-config S3C64XX_SETUP_I2C0
-        bool
-        default y
-        help
-          Common setup code for i2c bus 0.
-
-          Note, currently since i2c0 is always compiled, this setup helper
-          is always compiled with it.
-
-config S3C64XX_SETUP_I2C1
-        bool
-        help
-          Common setup code for i2c bus 1.
-
-config S3C64XX_SETUP_FB_24BPP
-        bool
-        help
-          Common setup code for S3C64XX with an 24bpp RGB display helper.
-
-config S3C64XX_SETUP_SDHCI_GPIO
-        bool
-        help
-          Common setup code for S3C64XX SDHCI GPIO configurations
-
-endif
diff --git a/arch/arm/plat-s3c64xx/clock.c b/arch/arm/plat-s3c64xx/clock.c
deleted file mode 100644
index 7a36e899360d..000000000000
--- a/arch/arm/plat-s3c64xx/clock.c
+++ /dev/null
@@ -1,300 +0,0 @@
-/* linux/arch/arm/plat-s3c64xx/clock.c
- *
- * Copyright 2008 Openmoko, Inc.
- * Copyright 2008 Simtec Electronics
- *      Ben Dooks <ben@simtec.co.uk>
- *      http://armlinux.simtec.co.uk/
- *
- * S3C64XX Base clock support
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-#include <linux/init.h>
-#include <linux/module.h>
-#include <linux/interrupt.h>
-#include <linux/ioport.h>
-#include <linux/io.h>
-
-#include <mach/hardware.h>
-#include <mach/map.h>
-
-#include <plat/regs-sys.h>
-#include <plat/regs-clock.h>
-#include <plat/cpu.h>
-#include <plat/devs.h>
-#include <plat/clock.h>
-
-struct clk clk_h2 = {
-        .name           = "hclk2",
-        .id             = -1,
-        .rate           = 0,
-};
-
-struct clk clk_27m = {
-        .name           = "clk_27m",
-        .id             = -1,
-        .rate           = 27000000,
-};
-
-static int clk_48m_ctrl(struct clk *clk, int enable)
-{
-        unsigned long flags;
-        u32 val;
-
-        /* can't rely on clock lock, this register has other usages */
-        local_irq_save(flags);
-
-        val = __raw_readl(S3C64XX_OTHERS);
-        if (enable)
-                val |= S3C64XX_OTHERS_USBMASK;
-        else
-                val &= ~S3C64XX_OTHERS_USBMASK;
-
-        __raw_writel(val, S3C64XX_OTHERS);
-        local_irq_restore(flags);
-
-        return 0;
-}
-
-struct clk clk_48m = {
-        .name           = "clk_48m",
-        .id             = -1,
-        .rate           = 48000000,
-        .enable         = clk_48m_ctrl,
-};
-
-static int inline s3c64xx_gate(void __iomem *reg,
-                                struct clk *clk,
-                                int enable)
-{
-        unsigned int ctrlbit = clk->ctrlbit;
-        u32 con;
-
-        con = __raw_readl(reg);
-
-        if (enable)
-                con |= ctrlbit;
-        else
-                con &= ~ctrlbit;
-
-        __raw_writel(con, reg);
-        return 0;
-}
-
-static int s3c64xx_pclk_ctrl(struct clk *clk, int enable)
-{
-        return s3c64xx_gate(S3C_PCLK_GATE, clk, enable);
-}
-
-static int s3c64xx_hclk_ctrl(struct clk *clk, int enable)
-{
-        return s3c64xx_gate(S3C_HCLK_GATE, clk, enable);
-}
-
-int s3c64xx_sclk_ctrl(struct clk *clk, int enable)
-{
-        return s3c64xx_gate(S3C_SCLK_GATE, clk, enable);
-}
-
-static struct clk init_clocks_disable[] = {
-        {
-                .name           = "nand",
-                .id             = -1,
-                .parent         = &clk_h,
-        }, {
-                .name           = "adc",
-                .id             = -1,
-                .parent         = &clk_p,
-                .enable         = s3c64xx_pclk_ctrl,
-                .ctrlbit        = S3C_CLKCON_PCLK_TSADC,
-        }, {
-                .name           = "i2c",
-                .id             = -1,
-                .parent         = &clk_p,
-                .enable         = s3c64xx_pclk_ctrl,
-                .ctrlbit        = S3C_CLKCON_PCLK_IIC,
-        }, {
-                .name           = "iis",
-                .id             = 0,
-                .parent         = &clk_p,
-                .enable         = s3c64xx_pclk_ctrl,
-                .ctrlbit        = S3C_CLKCON_PCLK_IIS0,
-        }, {
-                .name           = "iis",
-                .id             = 1,
-                .parent         = &clk_p,
-                .enable         = s3c64xx_pclk_ctrl,
-                .ctrlbit        = S3C_CLKCON_PCLK_IIS1,
-        }, {
-                .name           = "spi",
-                .id             = 0,
-                .parent         = &clk_p,
-                .enable         = s3c64xx_pclk_ctrl,
-                .ctrlbit        = S3C_CLKCON_PCLK_SPI0,
-        }, {
-                .name           = "spi",
-                .id             = 1,
-                .parent         = &clk_p,
-                .enable         = s3c64xx_pclk_ctrl,
-                .ctrlbit        = S3C_CLKCON_PCLK_SPI1,
-        }, {
-                .name           = "48m",
-                .id             = 0,
-                .parent         = &clk_48m,
-                .enable         = s3c64xx_sclk_ctrl,
-                .ctrlbit        = S3C_CLKCON_SCLK_MMC0_48,
-        }, {
-                .name           = "48m",
-                .id             = 1,
-                .parent         = &clk_48m,
-                .enable         = s3c64xx_sclk_ctrl,
-                .ctrlbit        = S3C_CLKCON_SCLK_MMC1_48,
-        }, {
-                .name           = "48m",
-                .id             = 2,
-                .parent         = &clk_48m,
-                .enable         = s3c64xx_sclk_ctrl,
-                .ctrlbit        = S3C_CLKCON_SCLK_MMC2_48,
-        }, {
-                .name           = "dma0",
-                .id             = -1,
-                .parent         = &clk_h,
-                .enable         = s3c64xx_hclk_ctrl,
-                .ctrlbit        = S3C_CLKCON_HCLK_DMA0,
-        }, {
-                .name           = "dma1",
-                .id             = -1,
-                .parent         = &clk_h,
-                .enable         = s3c64xx_hclk_ctrl,
-                .ctrlbit        = S3C_CLKCON_HCLK_DMA1,
-        },
-};
-
-static struct clk init_clocks[] = {
-        {
-                .name           = "lcd",
-                .id             = -1,
-                .parent         = &clk_h,
-                .enable         = s3c64xx_hclk_ctrl,
-                .ctrlbit        = S3C_CLKCON_HCLK_LCD,
-        }, {
-                .name           = "gpio",
-                .id             = -1,
-                .parent         = &clk_p,
-                .enable         = s3c64xx_pclk_ctrl,
-                .ctrlbit        = S3C_CLKCON_PCLK_GPIO,
-        }, {
-                .name           = "usb-host",
-                .id             = -1,
-                .parent         = &clk_h,
-                .enable         = s3c64xx_hclk_ctrl,
-                .ctrlbit        = S3C_CLKCON_HCLK_UHOST,
-        }, {
-                .name           = "hsmmc",
-                .id             = 0,
-                .parent         = &clk_h,
-                .enable         = s3c64xx_hclk_ctrl,
-                .ctrlbit        = S3C_CLKCON_HCLK_HSMMC0,
-        }, {
-                .name           = "hsmmc",
-                .id             = 1,
-                .parent         = &clk_h,
-                .enable         = s3c64xx_hclk_ctrl,
-                .ctrlbit        = S3C_CLKCON_HCLK_HSMMC1,
-        }, {
-                .name           = "hsmmc",
-                .id             = 2,
-                .parent         = &clk_h,
-                .enable         = s3c64xx_hclk_ctrl,
-                .ctrlbit        = S3C_CLKCON_HCLK_HSMMC2,
-        }, {
-                .name           = "timers",
-                .id             = -1,
-                .parent         = &clk_p,
-                .enable         = s3c64xx_pclk_ctrl,
-                .ctrlbit        = S3C_CLKCON_PCLK_PWM,
-        }, {
-                .name           = "uart",
-                .id             = 0,
-                .parent         = &clk_p,
-                .enable         = s3c64xx_pclk_ctrl,
-                .ctrlbit        = S3C_CLKCON_PCLK_UART0,
-        }, {
-                .name           = "uart",
-                .id             = 1,
-                .parent         = &clk_p,
-                .enable         = s3c64xx_pclk_ctrl,
-                .ctrlbit        = S3C_CLKCON_PCLK_UART1,
-        }, {
-                .name           = "uart",
-                .id             = 2,
-                .parent         = &clk_p,
-                .enable         = s3c64xx_pclk_ctrl,
-                .ctrlbit        = S3C_CLKCON_PCLK_UART2,
-        }, {
-                .name           = "uart",
-                .id             = 3,
-                .parent         = &clk_p,
-                .enable         = s3c64xx_pclk_ctrl,
-                .ctrlbit        = S3C_CLKCON_PCLK_UART3,
-        }, {
-                .name           = "rtc",
-                .id             = -1,
-                .parent         = &clk_p,
-                .enable         = s3c64xx_pclk_ctrl,
-                .ctrlbit        = S3C_CLKCON_PCLK_RTC,
-        }, {
-                .name           = "watchdog",
-                .id             = -1,
-                .parent         = &clk_p,
-                .ctrlbit        = S3C_CLKCON_PCLK_WDT,
-        }, {
-                .name           = "ac97",
-                .id             = -1,
-                .parent         = &clk_p,
-                .ctrlbit        = S3C_CLKCON_PCLK_AC97,
-        }
-};
-
-static struct clk *clks[] __initdata = {
-        &clk_ext,
-        &clk_epll,
-        &clk_27m,
-        &clk_48m,
-        &clk_h2,
-};
-
-void __init s3c64xx_register_clocks(void)
-{
-        struct clk *clkp;
-        int ret;
-        int ptr;
-
-        s3c24xx_register_clocks(clks, ARRAY_SIZE(clks));
-
-        clkp = init_clocks;
-        for (ptr = 0; ptr < ARRAY_SIZE(init_clocks); ptr++, clkp++) {
-                ret = s3c24xx_register_clock(clkp);
-                if (ret < 0) {
-                        printk(KERN_ERR "Failed to register clock %s (%d)\n",
-                               clkp->name, ret);
-                }
-        }
-
-        clkp = init_clocks_disable;
-        for (ptr = 0; ptr < ARRAY_SIZE(init_clocks_disable); ptr++, clkp++) {
-
-                ret = s3c24xx_register_clock(clkp);
-                if (ret < 0) {
-                        printk(KERN_ERR "Failed to register clock %s (%d)\n",
-                               clkp->name, ret);
-                }
-
-                (clkp->enable)(clkp, 0);
-        }
-
-        s3c_pwmclk_init();
-}
diff --git a/arch/arm/plat-s3c64xx/dev-audio.c b/arch/arm/plat-s3c64xx/dev-audio.c
deleted file mode 100644
index a21a88fbb7e3..000000000000
--- a/arch/arm/plat-s3c64xx/dev-audio.c
+++ /dev/null
@@ -1,167 +0,0 @@
-/* linux/arch/arm/plat-s3c/dev-audio.c
- *
- * Copyright 2009 Wolfson Microelectronics
- *      Mark Brown <broonie@opensource.wolfsonmicro.com>
- *
-
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#include <linux/kernel.h>
-#include <linux/string.h>
-#include <linux/platform_device.h>
-
-#include <mach/irqs.h>
-#include <mach/map.h>
-#include <mach/dma.h>
-#include <mach/gpio.h>
-
-#include <plat/devs.h>
-#include <plat/audio.h>
-#include <plat/gpio-bank-d.h>
-#include <plat/gpio-bank-e.h>
-#include <plat/gpio-cfg.h>
-
-static struct resource s3c64xx_iis0_resource[] = {
-        [0] = {
-                .start = S3C64XX_PA_IIS0,
-                .end   = S3C64XX_PA_IIS0 + 0x100 - 1,
-                .flags = IORESOURCE_MEM,
-        },
-};
-
-struct platform_device s3c64xx_device_iis0 = {
-        .name             = "s3c64xx-iis",
-        .id               = 0,
-        .num_resources    = ARRAY_SIZE(s3c64xx_iis0_resource),
-        .resource         = s3c64xx_iis0_resource,
-};
-EXPORT_SYMBOL(s3c64xx_device_iis0);
-
-static struct resource s3c64xx_iis1_resource[] = {
-        [0] = {
-                .start = S3C64XX_PA_IIS1,
-                .end   = S3C64XX_PA_IIS1 + 0x100 - 1,
-                .flags = IORESOURCE_MEM,
-        },
-};
-
-struct platform_device s3c64xx_device_iis1 = {
-        .name             = "s3c64xx-iis",
-        .id               = 1,
-        .num_resources    = ARRAY_SIZE(s3c64xx_iis1_resource),
-        .resource         = s3c64xx_iis1_resource,
-};
-EXPORT_SYMBOL(s3c64xx_device_iis1);
-
-static struct resource s3c64xx_iisv4_resource[] = {
-        [0] = {
-                .start = S3C64XX_PA_IISV4,
-                .end   = S3C64XX_PA_IISV4 + 0x100 - 1,
-                .flags = IORESOURCE_MEM,
-        },
-};
-
-struct platform_device s3c64xx_device_iisv4 = {
-        .name             = "s3c64xx-iis-v4",
-        .id               = -1,
-        .num_resources    = ARRAY_SIZE(s3c64xx_iisv4_resource),
-        .resource         = s3c64xx_iisv4_resource,
-};
-EXPORT_SYMBOL(s3c64xx_device_iisv4);
-
-
-/* PCM Controller platform_devices */
-
-static int s3c64xx_pcm_cfg_gpio(struct platform_device *pdev)
-{
-        switch (pdev->id) {
-        case 0:
-                s3c_gpio_cfgpin(S3C64XX_GPD(0), S3C64XX_GPD0_PCM0_SCLK);
-                s3c_gpio_cfgpin(S3C64XX_GPD(1), S3C64XX_GPD1_PCM0_EXTCLK);
-                s3c_gpio_cfgpin(S3C64XX_GPD(2), S3C64XX_GPD2_PCM0_FSYNC);
-                s3c_gpio_cfgpin(S3C64XX_GPD(3), S3C64XX_GPD3_PCM0_SIN);
-                s3c_gpio_cfgpin(S3C64XX_GPD(4), S3C64XX_GPD4_PCM0_SOUT);
-                break;
-        case 1:
-                s3c_gpio_cfgpin(S3C64XX_GPE(0), S3C64XX_GPE0_PCM1_SCLK);
-                s3c_gpio_cfgpin(S3C64XX_GPE(1), S3C64XX_GPE1_PCM1_EXTCLK);
-                s3c_gpio_cfgpin(S3C64XX_GPE(2), S3C64XX_GPE2_PCM1_FSYNC);
-                s3c_gpio_cfgpin(S3C64XX_GPE(3), S3C64XX_GPE3_PCM1_SIN);
-                s3c_gpio_cfgpin(S3C64XX_GPE(4), S3C64XX_GPE4_PCM1_SOUT);
-                break;
-        default:
-                printk(KERN_DEBUG "Invalid PCM Controller number!");
-                return -EINVAL;
-        }
-
-        return 0;
-}
-
-static struct resource s3c64xx_pcm0_resource[] = {
-        [0] = {
-                .start = S3C64XX_PA_PCM0,
-                .end   = S3C64XX_PA_PCM0 + 0x100 - 1,
-                .flags = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start = DMACH_PCM0_TX,
-                .end   = DMACH_PCM0_TX,
-                .flags = IORESOURCE_DMA,
-        },
-        [2] = {
-                .start = DMACH_PCM0_RX,
-                .end   = DMACH_PCM0_RX,
-                .flags = IORESOURCE_DMA,
-        },
-};
-
-static struct s3c_audio_pdata s3c_pcm0_pdata = {
-        .cfg_gpio = s3c64xx_pcm_cfg_gpio,
-};
-
-struct platform_device s3c64xx_device_pcm0 = {
-        .name             = "samsung-pcm",
-        .id               = 0,
-        .num_resources    = ARRAY_SIZE(s3c64xx_pcm0_resource),
-        .resource         = s3c64xx_pcm0_resource,
-        .dev = {
-                .platform_data = &s3c_pcm0_pdata,
-        },
-};
-EXPORT_SYMBOL(s3c64xx_device_pcm0);
-
-static struct resource s3c64xx_pcm1_resource[] = {
-        [0] = {
-                .start = S3C64XX_PA_PCM1,
-                .end   = S3C64XX_PA_PCM1 + 0x100 - 1,
-                .flags = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start = DMACH_PCM1_TX,
-                .end   = DMACH_PCM1_TX,
-                .flags = IORESOURCE_DMA,
-        },
-        [2] = {
-                .start = DMACH_PCM1_RX,
-                .end   = DMACH_PCM1_RX,
-                .flags = IORESOURCE_DMA,
-        },
-};
-
-static struct s3c_audio_pdata s3c_pcm1_pdata = {
-        .cfg_gpio = s3c64xx_pcm_cfg_gpio,
-};
-
-struct platform_device s3c64xx_device_pcm1 = {
-        .name             = "samsung-pcm",
-        .id               = 1,
-        .num_resources    = ARRAY_SIZE(s3c64xx_pcm1_resource),
-        .resource         = s3c64xx_pcm1_resource,
-        .dev = {
-                .platform_data = &s3c_pcm1_pdata,
-        },
-};
-EXPORT_SYMBOL(s3c64xx_device_pcm1);
diff --git a/arch/arm/plat-s3c64xx/irq.c b/arch/arm/plat-s3c64xx/irq.c
deleted file mode 100644
index 8dc5b6da9789..000000000000
--- a/arch/arm/plat-s3c64xx/irq.c
+++ /dev/null
@@ -1,256 +0,0 @@
-/* arch/arm/plat-s3c64xx/irq.c
- *
- * Copyright 2008 Openmoko, Inc.
- * Copyright 2008 Simtec Electronics
- *      Ben Dooks <ben@simtec.co.uk>
- *      http://armlinux.simtec.co.uk/
- *
- * S3C64XX - Interrupt handling
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#include <linux/kernel.h>
-#include <linux/interrupt.h>
-#include <linux/serial_core.h>
-#include <linux/irq.h>
-#include <linux/io.h>
-
-#include <asm/hardware/vic.h>
-
-#include <mach/map.h>
-#include <plat/regs-serial.h>
-#include <plat/regs-timer.h>
-#include <plat/cpu.h>
-
-/* Timer interrupt handling */
-
-static void s3c_irq_demux_timer(unsigned int base_irq, unsigned int sub_irq)
-{
-        generic_handle_irq(sub_irq);
-}
-
-static void s3c_irq_demux_timer0(unsigned int irq, struct irq_desc *desc)
-{
-        s3c_irq_demux_timer(irq, IRQ_TIMER0);
-}
-
-static void s3c_irq_demux_timer1(unsigned int irq, struct irq_desc *desc)
-{
-        s3c_irq_demux_timer(irq, IRQ_TIMER1);
-}
-
-static void s3c_irq_demux_timer2(unsigned int irq, struct irq_desc *desc)
-{
-        s3c_irq_demux_timer(irq, IRQ_TIMER2);
-}
-
-static void s3c_irq_demux_timer3(unsigned int irq, struct irq_desc *desc)
-{
-        s3c_irq_demux_timer(irq, IRQ_TIMER3);
-}
-
-static void s3c_irq_demux_timer4(unsigned int irq, struct irq_desc *desc)
-{
-        s3c_irq_demux_timer(irq, IRQ_TIMER4);
-}
-
-/* We assume the IRQ_TIMER0..IRQ_TIMER4 range is continuous. */
-
-static void s3c_irq_timer_mask(unsigned int irq)
-{
-        u32 reg = __raw_readl(S3C64XX_TINT_CSTAT);
-
-        reg &= 0x1f;  /* mask out pending interrupts */
-        reg &= ~(1 << (irq - IRQ_TIMER0));
-        __raw_writel(reg, S3C64XX_TINT_CSTAT);
-}
-
-static void s3c_irq_timer_unmask(unsigned int irq)
-{
-        u32 reg = __raw_readl(S3C64XX_TINT_CSTAT);
-
-        reg &= 0x1f;  /* mask out pending interrupts */
-        reg |= 1 << (irq - IRQ_TIMER0);
-        __raw_writel(reg, S3C64XX_TINT_CSTAT);
-}
-
-static void s3c_irq_timer_ack(unsigned int irq)
-{
-        u32 reg = __raw_readl(S3C64XX_TINT_CSTAT);
-
-        reg &= 0x1f;
-        reg |= (1 << 5) << (irq - IRQ_TIMER0);
-        __raw_writel(reg, S3C64XX_TINT_CSTAT);
-}
-
-static struct irq_chip s3c_irq_timer = {
-        .name           = "s3c-timer",
-        .mask           = s3c_irq_timer_mask,
-        .unmask         = s3c_irq_timer_unmask,
-        .ack            = s3c_irq_timer_ack,
-};
-
-struct uart_irq {
-        void __iomem    *regs;
-        unsigned int     base_irq;
-        unsigned int     parent_irq;
-};
-
-/* Note, we make use of the fact that the parent IRQs, IRQ_UART[0..3]
- * are consecutive when looking up the interrupt in the demux routines.
- */
-static struct uart_irq uart_irqs[] = {
-        [0] = {
-                .regs           = S3C_VA_UART0,
-                .base_irq       = IRQ_S3CUART_BASE0,
-                .parent_irq     = IRQ_UART0,
-        },
-        [1] = {
-                .regs           = S3C_VA_UART1,
-                .base_irq       = IRQ_S3CUART_BASE1,
-                .parent_irq     = IRQ_UART1,
-        },
-        [2] = {
-                .regs           = S3C_VA_UART2,
-                .base_irq       = IRQ_S3CUART_BASE2,
-                .parent_irq     = IRQ_UART2,
-        },
-        [3] = {
-                .regs           = S3C_VA_UART3,
-                .base_irq       = IRQ_S3CUART_BASE3,
-                .parent_irq     = IRQ_UART3,
-        },
-};
-
-static inline void __iomem *s3c_irq_uart_base(unsigned int irq)
-{
-        struct uart_irq *uirq = get_irq_chip_data(irq);
-        return uirq->regs;
-}
-
-static inline unsigned int s3c_irq_uart_bit(unsigned int irq)
-{
-        return irq & 3;
-}
-
-/* UART interrupt registers, not worth adding to seperate include header */
-
-static void s3c_irq_uart_mask(unsigned int irq)
-{
-        void __iomem *regs = s3c_irq_uart_base(irq);
-        unsigned int bit = s3c_irq_uart_bit(irq);
-        u32 reg;
-
-        reg = __raw_readl(regs + S3C64XX_UINTM);
-        reg |= (1 << bit);
-        __raw_writel(reg, regs + S3C64XX_UINTM);
-}
-
-static void s3c_irq_uart_maskack(unsigned int irq)
-{
-        void __iomem *regs = s3c_irq_uart_base(irq);
-        unsigned int bit = s3c_irq_uart_bit(irq);
-        u32 reg;
-
-        reg = __raw_readl(regs + S3C64XX_UINTM);
-        reg |= (1 << bit);
-        __raw_writel(reg, regs + S3C64XX_UINTM);
-        __raw_writel(1 << bit, regs + S3C64XX_UINTP);
-}
-
-static void s3c_irq_uart_unmask(unsigned int irq)
-{
-        void __iomem *regs = s3c_irq_uart_base(irq);
-        unsigned int bit = s3c_irq_uart_bit(irq);
-        u32 reg;
-
-        reg = __raw_readl(regs + S3C64XX_UINTM);
-        reg &= ~(1 << bit);
-        __raw_writel(reg, regs + S3C64XX_UINTM);
-}
-
-static void s3c_irq_uart_ack(unsigned int irq)
-{
-        void __iomem *regs = s3c_irq_uart_base(irq);
-        unsigned int bit = s3c_irq_uart_bit(irq);
-
-        __raw_writel(1 << bit, regs + S3C64XX_UINTP);
-}
-
-static void s3c_irq_demux_uart(unsigned int irq, struct irq_desc *desc)
-{
-        struct uart_irq *uirq = &uart_irqs[irq - IRQ_UART0];
-        u32 pend = __raw_readl(uirq->regs + S3C64XX_UINTP);
-        int base = uirq->base_irq;
-
-        if (pend & (1 << 0))
-                generic_handle_irq(base);
-        if (pend & (1 << 1))
-                generic_handle_irq(base + 1);
-        if (pend & (1 << 2))
-                generic_handle_irq(base + 2);
-        if (pend & (1 << 3))
-                generic_handle_irq(base + 3);
-}
-
-static struct irq_chip s3c_irq_uart = {
-        .name           = "s3c-uart",
-        .mask           = s3c_irq_uart_mask,
-        .unmask         = s3c_irq_uart_unmask,
-        .mask_ack       = s3c_irq_uart_maskack,
-        .ack            = s3c_irq_uart_ack,
-};
-
-static void __init s3c64xx_uart_irq(struct uart_irq *uirq)
-{
-        void __iomem *reg_base = uirq->regs;
-        unsigned int irq;
-        int offs;
-
-        /* mask all interrupts at the start. */
-        __raw_writel(0xf, reg_base + S3C64XX_UINTM);
-
-        for (offs = 0; offs < 3; offs++) {
-                irq = uirq->base_irq + offs;
-
-                set_irq_chip(irq, &s3c_irq_uart);
-                set_irq_chip_data(irq, uirq);
-                set_irq_handler(irq, handle_level_irq);
-                set_irq_flags(irq, IRQF_VALID);
-        }
-
-        set_irq_chained_handler(uirq->parent_irq, s3c_irq_demux_uart);
-}
-
-void __init s3c64xx_init_irq(u32 vic0_valid, u32 vic1_valid)
-{
-        int uart, irq;
-
-        printk(KERN_DEBUG "%s: initialising interrupts\n", __func__);
-
-        /* initialise the pair of VICs */
-        vic_init(S3C_VA_VIC0, S3C_VIC0_BASE, vic0_valid, 0);
-        vic_init(S3C_VA_VIC1, S3C_VIC1_BASE, vic1_valid, 0);
-
-        /* add the timer sub-irqs */
-
-        set_irq_chained_handler(IRQ_TIMER0_VIC, s3c_irq_demux_timer0);
-        set_irq_chained_handler(IRQ_TIMER1_VIC, s3c_irq_demux_timer1);
-        set_irq_chained_handler(IRQ_TIMER2_VIC, s3c_irq_demux_timer2);
-        set_irq_chained_handler(IRQ_TIMER3_VIC, s3c_irq_demux_timer3);
-        set_irq_chained_handler(IRQ_TIMER4_VIC, s3c_irq_demux_timer4);
-
-        for (irq = IRQ_TIMER0; irq <= IRQ_TIMER4; irq++) {
-                set_irq_chip(irq, &s3c_irq_timer);
-                set_irq_handler(irq, handle_level_irq);
-                set_irq_flags(irq, IRQF_VALID);
-        }
-
-        for (uart = 0; uart < ARRAY_SIZE(uart_irqs); uart++)
-                s3c64xx_uart_irq(&uart_irqs[uart]);
-}
-
-
diff --git a/arch/arm/plat-s3c64xx/s3c6400-clock.c b/arch/arm/plat-s3c64xx/s3c6400-clock.c
deleted file mode 100644
index ffd56deb9e81..000000000000
--- a/arch/arm/plat-s3c64xx/s3c6400-clock.c
+++ /dev/null
@@ -1,758 +0,0 @@
-/* linux/arch/arm/plat-s3c64xx/s3c6400-clock.c
- *
- * Copyright 2008 Openmoko, Inc.
- * Copyright 2008 Simtec Electronics
- *      Ben Dooks <ben@simtec.co.uk>
- *      http://armlinux.simtec.co.uk/
- *
- * S3C6400 based common clock support
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-#include <linux/init.h>
-#include <linux/module.h>
-#include <linux/kernel.h>
-#include <linux/list.h>
-#include <linux/errno.h>
-#include <linux/err.h>
-#include <linux/clk.h>
-#include <linux/sysdev.h>
-#include <linux/io.h>
-
-#include <mach/hardware.h>
-#include <mach/map.h>
-
-#include <plat/cpu-freq.h>
-
-#include <plat/regs-clock.h>
-#include <plat/clock.h>
-#include <plat/cpu.h>
-#include <plat/pll.h>
-
-/* fin_apll, fin_mpll and fin_epll are all the same clock, which we call
- * ext_xtal_mux for want of an actual name from the manual.
-*/
-
-static struct clk clk_ext_xtal_mux = {
-        .name           = "ext_xtal",
-        .id             = -1,
-};
-
-#define clk_fin_apll clk_ext_xtal_mux
-#define clk_fin_mpll clk_ext_xtal_mux
-#define clk_fin_epll clk_ext_xtal_mux
-
-#define clk_fout_mpll   clk_mpll
-#define clk_fout_epll   clk_epll
-
-struct clk_sources {
-        unsigned int    nr_sources;
-        struct clk      **sources;
-};
-
-struct clksrc_clk {
-        struct clk              clk;
-        unsigned int            mask;
-        unsigned int            shift;
-
-        struct clk_sources      *sources;
-
-        unsigned int            divider_shift;
-        void __iomem            *reg_divider;
-};
-
-static struct clk clk_fout_apll = {
-        .name           = "fout_apll",
-        .id             = -1,
-};
-
-static struct clk *clk_src_apll_list[] = {
-        [0] = &clk_fin_apll,
-        [1] = &clk_fout_apll,
-};
-
-static struct clk_sources clk_src_apll = {
-        .sources        = clk_src_apll_list,
-        .nr_sources     = ARRAY_SIZE(clk_src_apll_list),
-};
-
-static struct clksrc_clk clk_mout_apll = {
-        .clk    = {
-                .name           = "mout_apll",
-                .id             = -1,
-        },
-        .shift          = S3C6400_CLKSRC_APLL_MOUT_SHIFT,
-        .mask           = S3C6400_CLKSRC_APLL_MOUT,
-        .sources        = &clk_src_apll,
-};
-
-static struct clk *clk_src_epll_list[] = {
-        [0] = &clk_fin_epll,
-        [1] = &clk_fout_epll,
-};
-
-static struct clk_sources clk_src_epll = {
-        .sources        = clk_src_epll_list,
-        .nr_sources     = ARRAY_SIZE(clk_src_epll_list),
-};
-
-static struct clksrc_clk clk_mout_epll = {
-        .clk    = {
-                .name           = "mout_epll",
-                .id             = -1,
-        },
-        .shift          = S3C6400_CLKSRC_EPLL_MOUT_SHIFT,
-        .mask           = S3C6400_CLKSRC_EPLL_MOUT,
-        .sources        = &clk_src_epll,
-};
-
-static struct clk *clk_src_mpll_list[] = {
-        [0] = &clk_fin_mpll,
-        [1] = &clk_fout_mpll,
-};
-
-static struct clk_sources clk_src_mpll = {
-        .sources        = clk_src_mpll_list,
-        .nr_sources     = ARRAY_SIZE(clk_src_mpll_list),
-};
-
-static struct clksrc_clk clk_mout_mpll = {
-        .clk = {
-                .name           = "mout_mpll",
-                .id             = -1,
-        },
-        .shift          = S3C6400_CLKSRC_MPLL_MOUT_SHIFT,
-        .mask           = S3C6400_CLKSRC_MPLL_MOUT,
-        .sources        = &clk_src_mpll,
-};
-
-static unsigned int armclk_mask;
-
-static unsigned long s3c64xx_clk_arm_get_rate(struct clk *clk)
-{
-        unsigned long rate = clk_get_rate(clk->parent);
-        u32 clkdiv;
-
-        /* divisor mask starts at bit0, so no need to shift */
-        clkdiv = __raw_readl(S3C_CLK_DIV0) & armclk_mask;
-
-        return rate / (clkdiv + 1);
-}
-
-static unsigned long s3c64xx_clk_arm_round_rate(struct clk *clk,
-                                                unsigned long rate)
-{
-        unsigned long parent = clk_get_rate(clk->parent);
-        u32 div;
-
-        if (parent < rate)
-                return parent;
-
-        div = (parent / rate) - 1;
-        if (div > armclk_mask)
-                div = armclk_mask;
-
-        return parent / (div + 1);
-}
-
-static int s3c64xx_clk_arm_set_rate(struct clk *clk, unsigned long rate)
-{
-        unsigned long parent = clk_get_rate(clk->parent);
-        u32 div;
-        u32 val;
-
-        if (rate < parent / (armclk_mask + 1))
-                return -EINVAL;
-
-        rate = clk_round_rate(clk, rate);
-        div = clk_get_rate(clk->parent) / rate;
-
-        val = __raw_readl(S3C_CLK_DIV0);
-        val &= ~armclk_mask;
-        val |= (div - 1);
-        __raw_writel(val, S3C_CLK_DIV0);
-
-        return 0;
-
-}
-
-static struct clk clk_arm = {
-        .name           = "armclk",
-        .id             = -1,
-        .parent         = &clk_mout_apll.clk,
-        .get_rate       = s3c64xx_clk_arm_get_rate,
-        .set_rate       = s3c64xx_clk_arm_set_rate,
-        .round_rate     = s3c64xx_clk_arm_round_rate,
-};
-
-static unsigned long s3c64xx_clk_doutmpll_get_rate(struct clk *clk)
-{
-        unsigned long rate = clk_get_rate(clk->parent);
-
-        printk(KERN_DEBUG "%s: parent is %ld\n", __func__, rate);
-
-        if (__raw_readl(S3C_CLK_DIV0) & S3C6400_CLKDIV0_MPLL_MASK)
-                rate /= 2;
-
-        return rate;
-}
-
-static struct clk clk_dout_mpll = {
-        .name           = "dout_mpll",
-        .id             = -1,
-        .parent         = &clk_mout_mpll.clk,
-        .get_rate       = s3c64xx_clk_doutmpll_get_rate,
-};
-
-static struct clk *clkset_spi_mmc_list[] = {
-        &clk_mout_epll.clk,
-        &clk_dout_mpll,
-        &clk_fin_epll,
-        &clk_27m,
-};
-
-static struct clk_sources clkset_spi_mmc = {
-        .sources        = clkset_spi_mmc_list,
-        .nr_sources     = ARRAY_SIZE(clkset_spi_mmc_list),
-};
-
-static struct clk *clkset_irda_list[] = {
-        &clk_mout_epll.clk,
-        &clk_dout_mpll,
-        NULL,
-        &clk_27m,
-};
-
-static struct clk_sources clkset_irda = {
-        .sources        = clkset_irda_list,
-        .nr_sources     = ARRAY_SIZE(clkset_irda_list),
-};
-
-static struct clk *clkset_uart_list[] = {
-        &clk_mout_epll.clk,
-        &clk_dout_mpll,
-        NULL,
-        NULL
-};
-
-static struct clk_sources clkset_uart = {
-        .sources        = clkset_uart_list,
-        .nr_sources     = ARRAY_SIZE(clkset_uart_list),
-};
-
-static struct clk *clkset_uhost_list[] = {
-        &clk_48m,
-        &clk_mout_epll.clk,
-        &clk_dout_mpll,
-        &clk_fin_epll,
-};
-
-static struct clk_sources clkset_uhost = {
-        .sources        = clkset_uhost_list,
-        .nr_sources     = ARRAY_SIZE(clkset_uhost_list),
-};
-
-
-/* The peripheral clocks are all controlled via clocksource followed
- * by an optional divider and gate stage. We currently roll this into
- * one clock which hides the intermediate clock from the mux.
- *
- * Note, the JPEG clock can only be an even divider...
- *
- * The scaler and LCD clocks depend on the S3C64XX version, and also
- * have a common parent divisor so are not included here.
- */
-
-static inline struct clksrc_clk *to_clksrc(struct clk *clk)
-{
-        return container_of(clk, struct clksrc_clk, clk);
-}
-
-static unsigned long s3c64xx_getrate_clksrc(struct clk *clk)
-{
-        struct clksrc_clk *sclk = to_clksrc(clk);
-        unsigned long rate = clk_get_rate(clk->parent);
-        u32 clkdiv = __raw_readl(sclk->reg_divider);
-
-        clkdiv >>= sclk->divider_shift;
-        clkdiv &= 0xf;
-        clkdiv++;
-
-        rate /= clkdiv;
-        return rate;
-}
-
-static int s3c64xx_setrate_clksrc(struct clk *clk, unsigned long rate)
-{
-        struct clksrc_clk *sclk = to_clksrc(clk);
-        void __iomem *reg = sclk->reg_divider;
-        unsigned int div;
-        u32 val;
-
-        rate = clk_round_rate(clk, rate);
-        div = clk_get_rate(clk->parent) / rate;
-        if (div > 16)
-                return -EINVAL;
-
-        val = __raw_readl(reg);
-        val &= ~(0xf << sclk->divider_shift);
-        val |= (div - 1) << sclk->divider_shift;
-        __raw_writel(val, reg);
-
-        return 0;
-}
-
-static int s3c64xx_setparent_clksrc(struct clk *clk, struct clk *parent)
-{
-        struct clksrc_clk *sclk = to_clksrc(clk);
-        struct clk_sources *srcs = sclk->sources;
-        u32 clksrc = __raw_readl(S3C_CLK_SRC);
-        int src_nr = -1;
-        int ptr;
-
-        for (ptr = 0; ptr < srcs->nr_sources; ptr++)
-                if (srcs->sources[ptr] == parent) {
-                        src_nr = ptr;
-                        break;
-                }
-
-        if (src_nr >= 0) {
-                clksrc &= ~sclk->mask;
-                clksrc |= src_nr << sclk->shift;
-
-                __raw_writel(clksrc, S3C_CLK_SRC);
-
-                clk->parent = parent;
-                return 0;
-        }
-
-        return -EINVAL;
-}
-
-static unsigned long s3c64xx_roundrate_clksrc(struct clk *clk,
-                                              unsigned long rate)
-{
-        unsigned long parent_rate = clk_get_rate(clk->parent);
-        int div;
-
-        if (rate > parent_rate)
-                rate = parent_rate;
-        else {
-                div = parent_rate / rate;
-
-                if (div == 0)
-                        div = 1;
-                if (div > 16)
-                        div = 16;
-
-                rate = parent_rate / div;
-        }
-
-        return rate;
-}
-
-static struct clksrc_clk clk_mmc0 = {
-        .clk    = {
-                .name           = "mmc_bus",
-                .id             = 0,
-                .ctrlbit        = S3C_CLKCON_SCLK_MMC0,
-                .enable         = s3c64xx_sclk_ctrl,
-                .set_parent     = s3c64xx_setparent_clksrc,
-                .get_rate       = s3c64xx_getrate_clksrc,
-                .set_rate       = s3c64xx_setrate_clksrc,
-                .round_rate     = s3c64xx_roundrate_clksrc,
-        },
-        .shift          = S3C6400_CLKSRC_MMC0_SHIFT,
-        .mask           = S3C6400_CLKSRC_MMC0_MASK,
-        .sources        = &clkset_spi_mmc,
-        .divider_shift  = S3C6400_CLKDIV1_MMC0_SHIFT,
-        .reg_divider    = S3C_CLK_DIV1,
-};
-
-static struct clksrc_clk clk_mmc1 = {
-        .clk    = {
-                .name           = "mmc_bus",
-                .id             = 1,
-                .ctrlbit        = S3C_CLKCON_SCLK_MMC1,
-                .enable         = s3c64xx_sclk_ctrl,
-                .get_rate       = s3c64xx_getrate_clksrc,
-                .set_rate       = s3c64xx_setrate_clksrc,
-                .set_parent     = s3c64xx_setparent_clksrc,
-                .round_rate     = s3c64xx_roundrate_clksrc,
-        },
-        .shift          = S3C6400_CLKSRC_MMC1_SHIFT,
-        .mask           = S3C6400_CLKSRC_MMC1_MASK,
-        .sources        = &clkset_spi_mmc,
-        .divider_shift  = S3C6400_CLKDIV1_MMC1_SHIFT,
-        .reg_divider    = S3C_CLK_DIV1,
-};
-
-static struct clksrc_clk clk_mmc2 = {
-        .clk    = {
-                .name           = "mmc_bus",
-                .id             = 2,
-                .ctrlbit        = S3C_CLKCON_SCLK_MMC2,
-                .enable         = s3c64xx_sclk_ctrl,
-                .get_rate       = s3c64xx_getrate_clksrc,
-                .set_rate       = s3c64xx_setrate_clksrc,
-                .set_parent     = s3c64xx_setparent_clksrc,
-                .round_rate     = s3c64xx_roundrate_clksrc,
-        },
-        .shift          = S3C6400_CLKSRC_MMC2_SHIFT,
-        .mask           = S3C6400_CLKSRC_MMC2_MASK,
-        .sources        = &clkset_spi_mmc,
-        .divider_shift  = S3C6400_CLKDIV1_MMC2_SHIFT,
-        .reg_divider    = S3C_CLK_DIV1,
-};
-
-static struct clksrc_clk clk_usbhost = {
-        .clk    = {
-                .name           = "usb-bus-host",
-                .id             = -1,
-                .ctrlbit        = S3C_CLKCON_SCLK_UHOST,
-                .enable         = s3c64xx_sclk_ctrl,
-                .set_parent     = s3c64xx_setparent_clksrc,
-                .get_rate       = s3c64xx_getrate_clksrc,
-                .set_rate       = s3c64xx_setrate_clksrc,
-                .round_rate     = s3c64xx_roundrate_clksrc,
-        },
-        .shift          = S3C6400_CLKSRC_UHOST_SHIFT,
-        .mask           = S3C6400_CLKSRC_UHOST_MASK,
-        .sources        = &clkset_uhost,
-        .divider_shift  = S3C6400_CLKDIV1_UHOST_SHIFT,
-        .reg_divider    = S3C_CLK_DIV1,
-};
-
-static struct clksrc_clk clk_uart_uclk1 = {
-        .clk    = {
-                .name           = "uclk1",
-                .id             = -1,
-                .ctrlbit        = S3C_CLKCON_SCLK_UART,
-                .enable         = s3c64xx_sclk_ctrl,
-                .set_parent     = s3c64xx_setparent_clksrc,
-                .get_rate       = s3c64xx_getrate_clksrc,
-                .set_rate       = s3c64xx_setrate_clksrc,
-                .round_rate     = s3c64xx_roundrate_clksrc,
-        },
-        .shift          = S3C6400_CLKSRC_UART_SHIFT,
-        .mask           = S3C6400_CLKSRC_UART_MASK,
-        .sources        = &clkset_uart,
-        .divider_shift  = S3C6400_CLKDIV2_UART_SHIFT,
-        .reg_divider    = S3C_CLK_DIV2,
-};
-
-/* Where does UCLK0 come from? */
-
-static struct clksrc_clk clk_spi0 = {
-        .clk    = {
-                .name           = "spi-bus",
-                .id             = 0,
-                .ctrlbit        = S3C_CLKCON_SCLK_SPI0,
-                .enable         = s3c64xx_sclk_ctrl,
-                .set_parent     = s3c64xx_setparent_clksrc,
-                .get_rate       = s3c64xx_getrate_clksrc,
-                .set_rate       = s3c64xx_setrate_clksrc,
-                .round_rate     = s3c64xx_roundrate_clksrc,
-        },
-        .shift          = S3C6400_CLKSRC_SPI0_SHIFT,
-        .mask           = S3C6400_CLKSRC_SPI0_MASK,
-        .sources        = &clkset_spi_mmc,
-        .divider_shift  = S3C6400_CLKDIV2_SPI0_SHIFT,
-        .reg_divider    = S3C_CLK_DIV2,
-};
-
-static struct clksrc_clk clk_spi1 = {
-        .clk    = {
-                .name           = "spi-bus",
-                .id             = 1,
-                .ctrlbit        = S3C_CLKCON_SCLK_SPI1,
-                .enable         = s3c64xx_sclk_ctrl,
-                .set_parent     = s3c64xx_setparent_clksrc,
-                .get_rate       = s3c64xx_getrate_clksrc,
-                .set_rate       = s3c64xx_setrate_clksrc,
-                .round_rate     = s3c64xx_roundrate_clksrc,
-        },
-        .shift          = S3C6400_CLKSRC_SPI1_SHIFT,
-        .mask           = S3C6400_CLKSRC_SPI1_MASK,
-        .sources        = &clkset_spi_mmc,
-        .divider_shift  = S3C6400_CLKDIV2_SPI1_SHIFT,
-        .reg_divider    = S3C_CLK_DIV2,
-};
-
-static struct clk clk_iis_cd0 = {
-        .name           = "iis_cdclk0",
-        .id             = -1,
-};
-
-static struct clk clk_iis_cd1 = {
-        .name           = "iis_cdclk1",
-        .id             = -1,
-};
-
-static struct clk clk_pcm_cd = {
-        .name           = "pcm_cdclk",
-        .id             = -1,
-};
-
-static struct clk *clkset_audio0_list[] = {
-        [0] = &clk_mout_epll.clk,
-        [1] = &clk_dout_mpll,
-        [2] = &clk_fin_epll,
-        [3] = &clk_iis_cd0,
-        [4] = &clk_pcm_cd,
-};
-
-static struct clk_sources clkset_audio0 = {
-        .sources        = clkset_audio0_list,
-        .nr_sources     = ARRAY_SIZE(clkset_audio0_list),
-};
-
-static struct clksrc_clk clk_audio0 = {
-        .clk    = {
-                .name           = "audio-bus",
-                .id             = 0,
-                .ctrlbit        = S3C_CLKCON_SCLK_AUDIO0,
-                .enable         = s3c64xx_sclk_ctrl,
-                .set_parent     = s3c64xx_setparent_clksrc,
-                .get_rate       = s3c64xx_getrate_clksrc,
-                .set_rate       = s3c64xx_setrate_clksrc,
-                .round_rate     = s3c64xx_roundrate_clksrc,
-        },
-        .shift          = S3C6400_CLKSRC_AUDIO0_SHIFT,
-        .mask           = S3C6400_CLKSRC_AUDIO0_MASK,
-        .sources        = &clkset_audio0,
-        .divider_shift  = S3C6400_CLKDIV2_AUDIO0_SHIFT,
-        .reg_divider    = S3C_CLK_DIV2,
-};
-
-static struct clk *clkset_audio1_list[] = {
-        [0] = &clk_mout_epll.clk,
-        [1] = &clk_dout_mpll,
-        [2] = &clk_fin_epll,
-        [3] = &clk_iis_cd1,
-        [4] = &clk_pcm_cd,
-};
-
-static struct clk_sources clkset_audio1 = {
-        .sources        = clkset_audio1_list,
-        .nr_sources     = ARRAY_SIZE(clkset_audio1_list),
-};
-
-static struct clksrc_clk clk_audio1 = {
-        .clk    = {
-                .name           = "audio-bus",
-                .id             = 1,
-                .ctrlbit        = S3C_CLKCON_SCLK_AUDIO1,
-                .enable         = s3c64xx_sclk_ctrl,
-                .set_parent     = s3c64xx_setparent_clksrc,
-                .get_rate       = s3c64xx_getrate_clksrc,
-                .set_rate       = s3c64xx_setrate_clksrc,
-                .round_rate     = s3c64xx_roundrate_clksrc,
-        },
-        .shift          = S3C6400_CLKSRC_AUDIO1_SHIFT,
-        .mask           = S3C6400_CLKSRC_AUDIO1_MASK,
-        .sources        = &clkset_audio1,
-        .divider_shift  = S3C6400_CLKDIV2_AUDIO1_SHIFT,
-        .reg_divider    = S3C_CLK_DIV2,
-};
-
-static struct clksrc_clk clk_irda = {
-        .clk    = {
-                .name           = "irda-bus",
-                .id             = 0,
-                .ctrlbit        = S3C_CLKCON_SCLK_IRDA,
-                .enable         = s3c64xx_sclk_ctrl,
-                .set_parent     = s3c64xx_setparent_clksrc,
-                .get_rate       = s3c64xx_getrate_clksrc,
-                .set_rate       = s3c64xx_setrate_clksrc,
-                .round_rate     = s3c64xx_roundrate_clksrc,
-        },
-        .shift          = S3C6400_CLKSRC_IRDA_SHIFT,
-        .mask           = S3C6400_CLKSRC_IRDA_MASK,
-        .sources        = &clkset_irda,
-        .divider_shift  = S3C6400_CLKDIV2_IRDA_SHIFT,
-        .reg_divider    = S3C_CLK_DIV2,
-};
-
-static struct clk *clkset_camif_list[] = {
-        &clk_h2,
-};
-
-static struct clk_sources clkset_camif = {
-        .sources        = clkset_camif_list,
-        .nr_sources     = ARRAY_SIZE(clkset_camif_list),
-};
-
-static struct clksrc_clk clk_camif = {
-        .clk    = {
-                .name           = "camera",
-                .id             = -1,
-                .ctrlbit        = S3C_CLKCON_SCLK_CAM,
-                .enable         = s3c64xx_sclk_ctrl,
-                .set_parent     = s3c64xx_setparent_clksrc,
-                .get_rate       = s3c64xx_getrate_clksrc,
-                .set_rate       = s3c64xx_setrate_clksrc,
-                .round_rate     = s3c64xx_roundrate_clksrc,
-        },
-        .shift          = 0,
-        .mask           = 0,
-        .sources        = &clkset_camif,
-        .divider_shift  = S3C6400_CLKDIV0_CAM_SHIFT,
-        .reg_divider    = S3C_CLK_DIV0,
-};
-
-/* Clock initialisation code */
-
-static struct clksrc_clk *init_parents[] = {
-        &clk_mout_apll,
-        &clk_mout_epll,
-        &clk_mout_mpll,
-        &clk_mmc0,
-        &clk_mmc1,
-        &clk_mmc2,
-        &clk_usbhost,
-        &clk_uart_uclk1,
-        &clk_spi0,
-        &clk_spi1,
-        &clk_audio0,
-        &clk_audio1,
-        &clk_irda,
-        &clk_camif,
-};
-
-static void __init_or_cpufreq s3c6400_set_clksrc(struct clksrc_clk *clk)
-{
-        struct clk_sources *srcs = clk->sources;
-        u32 clksrc = __raw_readl(S3C_CLK_SRC);
-
-        clksrc &= clk->mask;
-        clksrc >>= clk->shift;
-
-        if (clksrc > srcs->nr_sources || !srcs->sources[clksrc]) {
-                printk(KERN_ERR "%s: bad source %d\n",
-                       clk->clk.name, clksrc);
-                return;
-        }
-
-        clk->clk.parent = srcs->sources[clksrc];
-
-        printk(KERN_INFO "%s: source is %s (%d), rate is %ld\n",
-               clk->clk.name, clk->clk.parent->name, clksrc,
-               clk_get_rate(&clk->clk));
-}
-
-#define GET_DIV(clk, field) ((((clk) & field##_MASK) >> field##_SHIFT) + 1)
-
-void __init_or_cpufreq s3c6400_setup_clocks(void)
-{
-        struct clk *xtal_clk;
-        unsigned long xtal;
-        unsigned long fclk;
-        unsigned long hclk;
-        unsigned long hclk2;
-        unsigned long pclk;
-        unsigned long epll;
-        unsigned long apll;
-        unsigned long mpll;
-        unsigned int ptr;
-        u32 clkdiv0;
-
-        printk(KERN_DEBUG "%s: registering clocks\n", __func__);
-
-        clkdiv0 = __raw_readl(S3C_CLK_DIV0);
-        printk(KERN_DEBUG "%s: clkdiv0 = %08x\n", __func__, clkdiv0);
-
-        xtal_clk = clk_get(NULL, "xtal");
-        BUG_ON(IS_ERR(xtal_clk));
-
-        xtal = clk_get_rate(xtal_clk);
-        clk_put(xtal_clk);
-
-        printk(KERN_DEBUG "%s: xtal is %ld\n", __func__, xtal);
-
-        /* For now assume the mux always selects the crystal */
-        clk_ext_xtal_mux.parent = xtal_clk;
-
-        epll = s3c6400_get_epll(xtal);
-        mpll = s3c6400_get_pll(xtal, __raw_readl(S3C_MPLL_CON));
-        apll = s3c6400_get_pll(xtal, __raw_readl(S3C_APLL_CON));
-
-        fclk = mpll;
-
-        printk(KERN_INFO "S3C64XX: PLL settings, A=%ld, M=%ld, E=%ld\n",
-               apll, mpll, epll);
-
-        hclk2 = mpll / GET_DIV(clkdiv0, S3C6400_CLKDIV0_HCLK2);
-        hclk = hclk2 / GET_DIV(clkdiv0, S3C6400_CLKDIV0_HCLK);
-        pclk = hclk2 / GET_DIV(clkdiv0, S3C6400_CLKDIV0_PCLK);
-
-        printk(KERN_INFO "S3C64XX: HCLK2=%ld, HCLK=%ld, PCLK=%ld\n",
-               hclk2, hclk, pclk);
-
-        clk_fout_mpll.rate = mpll;
-        clk_fout_epll.rate = epll;
-        clk_fout_apll.rate = apll;
-
-        clk_h2.rate = hclk2;
-        clk_h.rate = hclk;
-        clk_p.rate = pclk;
-        clk_f.rate = fclk;
-
-        for (ptr = 0; ptr < ARRAY_SIZE(init_parents); ptr++)
-                s3c6400_set_clksrc(init_parents[ptr]);
-}
-
-static struct clk *clks[] __initdata = {
-        &clk_ext_xtal_mux,
-        &clk_iis_cd0,
-        &clk_iis_cd1,
-        &clk_pcm_cd,
-        &clk_mout_epll.clk,
-        &clk_mout_mpll.clk,
-        &clk_dout_mpll,
-        &clk_mmc0.clk,
-        &clk_mmc1.clk,
-        &clk_mmc2.clk,
-        &clk_usbhost.clk,
-        &clk_uart_uclk1.clk,
-        &clk_spi0.clk,
-        &clk_spi1.clk,
-        &clk_audio0.clk,
-        &clk_audio1.clk,
-        &clk_irda.clk,
-        &clk_camif.clk,
-        &clk_arm,
-};
-
-/**
- * s3c6400_register_clocks - register clocks for s3c6400 and above
- * @armclk_divlimit: Divisor mask for ARMCLK
- *
- * Register the clocks for the S3C6400 and above SoC range, such
- * as ARMCLK and the clocks which have divider chains attached.
- *
- * This call does not setup the clocks, which is left to the
- * s3c6400_setup_clocks() call which may be needed by the cpufreq
- * or resume code to re-set the clocks if the bootloader has changed
- * them.
- */
-void __init s3c6400_register_clocks(unsigned armclk_divlimit)
-{
-        struct clk *clkp;
-        int ret;
-        int ptr;
-
-        armclk_mask = armclk_divlimit;
-
-        for (ptr = 0; ptr < ARRAY_SIZE(clks); ptr++) {
-                clkp = clks[ptr];
-                ret = s3c24xx_register_clock(clkp);
-                if (ret < 0) {
-                        printk(KERN_ERR "Failed to register clock %s (%d)\n",
-                               clkp->name, ret);
-                }
-        }
-}
diff --git a/arch/arm/plat-s3c64xx/s3c6400-init.c b/arch/arm/plat-s3c64xx/s3c6400-init.c
deleted file mode 100644
index 6c28f39df097..000000000000
--- a/arch/arm/plat-s3c64xx/s3c6400-init.c
+++ /dev/null
@@ -1,29 +0,0 @@
-/* linux/arch/arm/plat-s3c64xx/s3c6400-init.c
- *
- * Copyright 2008 Openmoko, Inc.
- * Copyright 2008 Simtec Electronics
- *      Ben Dooks <ben@simtec.co.uk>
- *      http://armlinux.simtec.co.uk/
- *
- * S3C6400 - CPU initialisation (common with other S3C64XX chips)
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#include <linux/kernel.h>
-#include <linux/types.h>
-#include <linux/init.h>
-
-#include <plat/cpu.h>
-#include <plat/devs.h>
-#include <plat/s3c6400.h>
-#include <plat/s3c6410.h>
-
-/* uart registration process */
-
-void __init s3c6400_common_init_uarts(struct s3c2410_uartcfg *cfg, int no)
-{
-        s3c24xx_init_uartdevs("s3c6400-uart", s3c64xx_uart_resources, cfg, no);
-}
diff --git a/arch/arm/plat-s5p/Kconfig b/arch/arm/plat-s5p/Kconfig
new file mode 100644
index 000000000000..d400a6a20fe4
--- /dev/null
+++ b/arch/arm/plat-s5p/Kconfig
@@ -0,0 +1,25 @@
+# arch/arm/plat-s5p/Kconfig
+#
+# Copyright (c) 2009 Samsung Electronics Co., Ltd.
+#               http://www.samsung.com/
+#
+# Licensed under GPLv2
+
+config PLAT_S5P
+        bool
+        depends on (ARCH_S5P6440 || ARCH_S5P6442 || ARCH_S5PV210)
+        default y
+        select ARM_VIC
+        select NO_IOPORT
+        select ARCH_REQUIRE_GPIOLIB
+        select S3C_GPIO_TRACK
+        select SAMSUNG_GPIOLIB_4BIT
+        select S3C_GPIO_CFG_S3C64XX
+        select S3C_GPIO_PULL_UPDOWN
+        select S3C_GPIO_CFG_S3C24XX
+        select PLAT_SAMSUNG
+        select SAMSUNG_CLKSRC
+        select SAMSUNG_IRQ_VIC_TIMER
+        select SAMSUNG_IRQ_UART
+        help
+          Base platform code for Samsung's S5P series SoC.
diff --git a/arch/arm/plat-s5p/Makefile b/arch/arm/plat-s5p/Makefile
new file mode 100644
index 000000000000..a7c54b332d27
--- /dev/null
+++ b/arch/arm/plat-s5p/Makefile
@@ -0,0 +1,19 @@
+# arch/arm/plat-s5p/Makefile
+#
+# Copyright (c) 2009 Samsung Electronics Co., Ltd.
+#               http://www.samsung.com/
+#
+# Licensed under GPLv2
+
+obj-y                           :=
+obj-m                           :=
+obj-n                           := dummy.o
+obj-                            :=
+
+# Core files
+
+obj-y                           += dev-uart.o
+obj-y                           += cpu.o
+obj-y                           += clock.o
+obj-y                           += irq.o
+obj-y                           += setup-i2c0.o
diff --git a/arch/arm/plat-s5p/clock.c b/arch/arm/plat-s5p/clock.c
new file mode 100644
index 000000000000..aa96e335073b
--- /dev/null
+++ b/arch/arm/plat-s5p/clock.c
@@ -0,0 +1,149 @@
+/* linux/arch/arm/plat-s5p/clock.c
+ *
+ * Copyright 2009 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * S5P - Common clock support
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/list.h>
+#include <linux/errno.h>
+#include <linux/err.h>
+#include <linux/clk.h>
+#include <linux/sysdev.h>
+#include <linux/io.h>
+#include <asm/div64.h>
+
+#include <plat/clock.h>
+#include <plat/clock-clksrc.h>
+#include <plat/s5p-clock.h>
+
+/* fin_apll, fin_mpll and fin_epll are all the same clock, which we call
+ * clk_ext_xtal_mux.
+*/
+struct clk clk_ext_xtal_mux = {
+        .name           = "ext_xtal",
+        .id             = -1,
+};
+
+static struct clk s5p_clk_27m = {
+        .name           = "clk_27m",
+        .id             = -1,
+        .rate           = 27000000,
+};
+
+/* 48MHz USB Phy clock output */
+struct clk clk_48m = {
+        .name           = "clk_48m",
+        .id             = -1,
+        .rate           = 48000000,
+};
+
+/* APLL clock output
+ * No need .ctrlbit, this is always on
+*/
+struct clk clk_fout_apll = {
+        .name           = "fout_apll",
+        .id             = -1,
+};
+
+/* MPLL clock output
+ * No need .ctrlbit, this is always on
+*/
+struct clk clk_fout_mpll = {
+        .name           = "fout_mpll",
+        .id             = -1,
+};
+
+/* EPLL clock output */
+struct clk clk_fout_epll = {
+        .name           = "fout_epll",
+        .id             = -1,
+        .ctrlbit        = (1 << 31),
+};
+
+/* ARM clock */
+struct clk clk_arm = {
+        .name           = "armclk",
+        .id             = -1,
+        .rate           = 0,
+        .ctrlbit        = 0,
+};
+
+/* Possible clock sources for APLL Mux */
+static struct clk *clk_src_apll_list[] = {
+        [0] = &clk_fin_apll,
+        [1] = &clk_fout_apll,
+};
+
+struct clksrc_sources clk_src_apll = {
+        .sources        = clk_src_apll_list,
+        .nr_sources     = ARRAY_SIZE(clk_src_apll_list),
+};
+
+/* Possible clock sources for MPLL Mux */
+static struct clk *clk_src_mpll_list[] = {
+        [0] = &clk_fin_mpll,
+        [1] = &clk_fout_mpll,
+};
+
+struct clksrc_sources clk_src_mpll = {
+        .sources        = clk_src_mpll_list,
+        .nr_sources     = ARRAY_SIZE(clk_src_mpll_list),
+};
+
+/* Possible clock sources for EPLL Mux */
+static struct clk *clk_src_epll_list[] = {
+        [0] = &clk_fin_epll,
+        [1] = &clk_fout_epll,
+};
+
+struct clksrc_sources clk_src_epll = {
+        .sources        = clk_src_epll_list,
+        .nr_sources     = ARRAY_SIZE(clk_src_epll_list),
+};
+
+struct clk clk_vpll = {
+        .name           = "vpll",
+        .id             = -1,
+};
+
+int s5p_gatectrl(void __iomem *reg, struct clk *clk, int enable)
+{
+        unsigned int ctrlbit = clk->ctrlbit;
+        u32 con;
+
+        con = __raw_readl(reg);
+        con = enable ? (con | ctrlbit) : (con & ~ctrlbit);
+        __raw_writel(con, reg);
+        return 0;
+}
+
+static struct clk *s5p_clks[] __initdata = {
+        &clk_ext_xtal_mux,
+        &clk_48m,
+        &s5p_clk_27m,
+        &clk_fout_apll,
+        &clk_fout_mpll,
+        &clk_fout_epll,
+        &clk_arm,
+        &clk_vpll,
+};
+
+void __init s5p_register_clocks(unsigned long xtal_freq)
+{
+        int ret;
+
+        clk_ext_xtal_mux.rate = xtal_freq;
+
+        ret = s3c24xx_register_clocks(s5p_clks, ARRAY_SIZE(s5p_clks));
+        if (ret > 0)
+                printk(KERN_ERR "Failed to register s5p clocks\n");
+}
diff --git a/arch/arm/plat-s5p/cpu.c b/arch/arm/plat-s5p/cpu.c
new file mode 100644
index 000000000000..f92e5de3a755
--- /dev/null
+++ b/arch/arm/plat-s5p/cpu.c
@@ -0,0 +1,113 @@
+/* linux/arch/arm/plat-s5p/cpu.c
+ *
+ * Copyright (c) 2009 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * S5P CPU Support
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include <linux/init.h>
+#include <linux/module.h>
+#include <mach/map.h>
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+#include <mach/regs-clock.h>
+#include <plat/cpu.h>
+#include <plat/s5p6440.h>
+#include <plat/s5p6442.h>
+#include <plat/s5pv210.h>
+
+/* table of supported CPUs */
+
+static const char name_s5p6440[] = "S5P6440";
+static const char name_s5p6442[] = "S5P6442";
+static const char name_s5pv210[] = "S5PV210/S5PC110";
+
+static struct cpu_table cpu_ids[] __initdata = {
+        {
+                .idcode         = 0x56440100,
+                .idmask         = 0xffffff00,
+                .map_io         = s5p6440_map_io,
+                .init_clocks    = s5p6440_init_clocks,
+                .init_uarts     = s5p6440_init_uarts,
+                .init           = s5p6440_init,
+                .name           = name_s5p6440,
+        }, {
+                .idcode         = 0x36442000,
+                .idmask         = 0xffffff00,
+                .map_io         = s5p6442_map_io,
+                .init_clocks    = s5p6442_init_clocks,
+                .init_uarts     = s5p6442_init_uarts,
+                .init           = s5p6442_init,
+                .name           = name_s5p6442,
+        }, {
+                .idcode         = 0x43110000,
+                .idmask         = 0xfffff000,
+                .map_io         = s5pv210_map_io,
+                .init_clocks    = s5pv210_init_clocks,
+                .init_uarts     = s5pv210_init_uarts,
+                .init           = s5pv210_init,
+                .name           = name_s5pv210,
+        },
+};
+
+/* minimal IO mapping */
+
+static struct map_desc s5p_iodesc[] __initdata = {
+        {
+                .virtual        = (unsigned long)S5P_VA_CHIPID,
+                .pfn            = __phys_to_pfn(S5P_PA_CHIPID),
+                .length         = SZ_4K,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = (unsigned long)S3C_VA_SYS,
+                .pfn            = __phys_to_pfn(S5P_PA_SYSCON),
+                .length         = SZ_64K,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = (unsigned long)S3C_VA_UART,
+                .pfn            = __phys_to_pfn(S3C_PA_UART),
+                .length         = SZ_4K,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = (unsigned long)VA_VIC0,
+                .pfn            = __phys_to_pfn(S5P_PA_VIC0),
+                .length         = SZ_16K,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = (unsigned long)VA_VIC1,
+                .pfn            = __phys_to_pfn(S5P_PA_VIC1),
+                .length         = SZ_16K,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = (unsigned long)S3C_VA_TIMER,
+                .pfn            = __phys_to_pfn(S5P_PA_TIMER),
+                .length         = SZ_16K,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = (unsigned long)S5P_VA_GPIO,
+                .pfn            = __phys_to_pfn(S5P_PA_GPIO),
+                .length         = SZ_4K,
+                .type           = MT_DEVICE,
+        },
+};
+
+/* read cpu identification code */
+
+void __init s5p_init_io(struct map_desc *mach_desc,
+                        int size, void __iomem *cpuid_addr)
+{
+        unsigned long idcode;
+
+        /* initialize the io descriptors we need for initialization */
+        iotable_init(s5p_iodesc, ARRAY_SIZE(s5p_iodesc));
+        if (mach_desc)
+                iotable_init(mach_desc, size);
+
+        idcode = __raw_readl(cpuid_addr);
+        s3c_init_cpu(idcode, cpu_ids, ARRAY_SIZE(cpu_ids));
+}
diff --git a/arch/arm/plat-s5p/dev-uart.c b/arch/arm/plat-s5p/dev-uart.c
new file mode 100644
index 000000000000..a89331ef4ae1
--- /dev/null
+++ b/arch/arm/plat-s5p/dev-uart.c
@@ -0,0 +1,139 @@
+/* linux/arch/arm/plat-s5p/dev-uart.c
+ *
+ * Copyright (c) 2009 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * Base S5P UART resource and device definitions
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <linux/interrupt.h>
+#include <linux/list.h>
+#include <linux/platform_device.h>
+
+#include <asm/mach/arch.h>
+#include <asm/mach/irq.h>
+#include <mach/hardware.h>
+#include <mach/map.h>
+
+#include <plat/devs.h>
+
+ /* Serial port registrations */
+
+static struct resource s5p_uart0_resource[] = {
+        [0] = {
+                .start  = S5P_PA_UART0,
+                .end    = S5P_PA_UART0 + S5P_SZ_UART,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = IRQ_S5P_UART_RX0,
+                .end    = IRQ_S5P_UART_RX0,
+                .flags  = IORESOURCE_IRQ,
+        },
+        [2] = {
+                .start  = IRQ_S5P_UART_TX0,
+                .end    = IRQ_S5P_UART_TX0,
+                .flags  = IORESOURCE_IRQ,
+        },
+        [3] = {
+                .start  = IRQ_S5P_UART_ERR0,
+                .end    = IRQ_S5P_UART_ERR0,
+                .flags  = IORESOURCE_IRQ,
+        }
+};
+
+static struct resource s5p_uart1_resource[] = {
+        [0] = {
+                .start  = S5P_PA_UART1,
+                .end    = S5P_PA_UART1 + S5P_SZ_UART,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = IRQ_S5P_UART_RX1,
+                .end    = IRQ_S5P_UART_RX1,
+                .flags  = IORESOURCE_IRQ,
+        },
+        [2] = {
+                .start  = IRQ_S5P_UART_TX1,
+                .end    = IRQ_S5P_UART_TX1,
+                .flags  = IORESOURCE_IRQ,
+        },
+        [3] = {
+                .start  = IRQ_S5P_UART_ERR1,
+                .end    = IRQ_S5P_UART_ERR1,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct resource s5p_uart2_resource[] = {
+        [0] = {
+                .start  = S5P_PA_UART2,
+                .end    = S5P_PA_UART2 + S5P_SZ_UART,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = IRQ_S5P_UART_RX2,
+                .end    = IRQ_S5P_UART_RX2,
+                .flags  = IORESOURCE_IRQ,
+        },
+        [2] = {
+                .start  = IRQ_S5P_UART_TX2,
+                .end    = IRQ_S5P_UART_TX2,
+                .flags  = IORESOURCE_IRQ,
+        },
+        [3] = {
+                .start  = IRQ_S5P_UART_ERR2,
+                .end    = IRQ_S5P_UART_ERR2,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct resource s5p_uart3_resource[] = {
+#if CONFIG_SERIAL_SAMSUNG_UARTS > 3
+        [0] = {
+                .start  = S5P_PA_UART3,
+                .end    = S5P_PA_UART3 + S5P_SZ_UART,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = IRQ_S5P_UART_RX3,
+                .end    = IRQ_S5P_UART_RX3,
+                .flags  = IORESOURCE_IRQ,
+        },
+        [2] = {
+                .start  = IRQ_S5P_UART_TX3,
+                .end    = IRQ_S5P_UART_TX3,
+                .flags  = IORESOURCE_IRQ,
+        },
+        [3] = {
+                .start  = IRQ_S5P_UART_ERR3,
+                .end    = IRQ_S5P_UART_ERR3,
+                .flags  = IORESOURCE_IRQ,
+        },
+#endif
+};
+
+struct s3c24xx_uart_resources s5p_uart_resources[] __initdata = {
+        [0] = {
+                .resources      = s5p_uart0_resource,
+                .nr_resources   = ARRAY_SIZE(s5p_uart0_resource),
+        },
+        [1] = {
+                .resources      = s5p_uart1_resource,
+                .nr_resources   = ARRAY_SIZE(s5p_uart1_resource),
+        },
+        [2] = {
+                .resources      = s5p_uart2_resource,
+                .nr_resources   = ARRAY_SIZE(s5p_uart2_resource),
+        },
+        [3] = {
+                .resources      = s5p_uart3_resource,
+                .nr_resources   = ARRAY_SIZE(s5p_uart3_resource),
+        },
+};
diff --git a/arch/arm/plat-s5p/include/plat/irqs.h b/arch/arm/plat-s5p/include/plat/irqs.h
new file mode 100644
index 000000000000..42e757f2e40c
--- /dev/null
+++ b/arch/arm/plat-s5p/include/plat/irqs.h
@@ -0,0 +1,90 @@
+/* linux/arch/arm/plat-s5p/include/plat/irqs.h
+ *
+ * Copyright (c) 2009 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * S5P Common IRQ support
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_PLAT_S5P_IRQS_H
+#define __ASM_PLAT_S5P_IRQS_H __FILE__
+
+/* we keep the first set of CPU IRQs out of the range of
+ * the ISA space, so that the PC104 has them to itself
+ * and we don't end up having to do horrible things to the
+ * standard ISA drivers....
+ *
+ * note, since we're using the VICs, our start must be a
+ * mulitple of 32 to allow the common code to work
+ */
+
+#define S5P_IRQ_OFFSET          (32)
+
+#define S5P_IRQ(x)              ((x) + S5P_IRQ_OFFSET)
+
+#define S5P_VIC0_BASE           S5P_IRQ(0)
+#define S5P_VIC1_BASE           S5P_IRQ(32)
+#define S5P_VIC2_BASE           S5P_IRQ(64)
+#define S5P_VIC3_BASE           S5P_IRQ(96)
+
+#define VIC_BASE(x)             (S5P_VIC0_BASE + ((x)*32))
+
+#define IRQ_VIC0_BASE           S5P_VIC0_BASE
+#define IRQ_VIC1_BASE           S5P_VIC1_BASE
+#define IRQ_VIC2_BASE           S5P_VIC2_BASE
+
+/* UART interrupts, each UART has 4 intterupts per channel so
+ * use the space between the ISA and S3C main interrupts. Note, these
+ * are not in the same order as the S3C24XX series! */
+
+#define IRQ_S5P_UART_BASE0      (16)
+#define IRQ_S5P_UART_BASE1      (20)
+#define IRQ_S5P_UART_BASE2      (24)
+#define IRQ_S5P_UART_BASE3      (28)
+
+#define UART_IRQ_RXD            (0)
+#define UART_IRQ_ERR            (1)
+#define UART_IRQ_TXD            (2)
+
+#define IRQ_S5P_UART_RX0        (IRQ_S5P_UART_BASE0 + UART_IRQ_RXD)
+#define IRQ_S5P_UART_TX0        (IRQ_S5P_UART_BASE0 + UART_IRQ_TXD)
+#define IRQ_S5P_UART_ERR0       (IRQ_S5P_UART_BASE0 + UART_IRQ_ERR)
+
+#define IRQ_S5P_UART_RX1        (IRQ_S5P_UART_BASE1 + UART_IRQ_RXD)
+#define IRQ_S5P_UART_TX1        (IRQ_S5P_UART_BASE1 + UART_IRQ_TXD)
+#define IRQ_S5P_UART_ERR1       (IRQ_S5P_UART_BASE1 + UART_IRQ_ERR)
+
+#define IRQ_S5P_UART_RX2        (IRQ_S5P_UART_BASE2 + UART_IRQ_RXD)
+#define IRQ_S5P_UART_TX2        (IRQ_S5P_UART_BASE2 + UART_IRQ_TXD)
+#define IRQ_S5P_UART_ERR2       (IRQ_S5P_UART_BASE2 + UART_IRQ_ERR)
+
+#define IRQ_S5P_UART_RX3        (IRQ_S5P_UART_BASE3 + UART_IRQ_RXD)
+#define IRQ_S5P_UART_TX3        (IRQ_S5P_UART_BASE3 + UART_IRQ_TXD)
+#define IRQ_S5P_UART_ERR3       (IRQ_S5P_UART_BASE3 + UART_IRQ_ERR)
+
+/* S3C compatibilty defines */
+#define IRQ_S3CUART_RX0         IRQ_S5P_UART_RX0
+#define IRQ_S3CUART_RX1         IRQ_S5P_UART_RX1
+#define IRQ_S3CUART_RX2         IRQ_S5P_UART_RX2
+#define IRQ_S3CUART_RX3         IRQ_S5P_UART_RX3
+
+/* VIC based IRQs */
+
+#define S5P_IRQ_VIC0(x)         (S5P_VIC0_BASE + (x))
+#define S5P_IRQ_VIC1(x)         (S5P_VIC1_BASE + (x))
+#define S5P_IRQ_VIC2(x)         (S5P_VIC2_BASE + (x))
+#define S5P_IRQ_VIC3(x)         (S5P_VIC3_BASE + (x))
+
+#define S5P_TIMER_IRQ(x)        S5P_IRQ(11 + (x))
+
+#define IRQ_TIMER0              S5P_TIMER_IRQ(0)
+#define IRQ_TIMER1              S5P_TIMER_IRQ(1)
+#define IRQ_TIMER2              S5P_TIMER_IRQ(2)
+#define IRQ_TIMER3              S5P_TIMER_IRQ(3)
+#define IRQ_TIMER4              S5P_TIMER_IRQ(4)
+
+#endif /* __ASM_PLAT_S5P_IRQS_H */
diff --git a/arch/arm/plat-s5p/include/plat/map-s5p.h b/arch/arm/plat-s5p/include/plat/map-s5p.h
new file mode 100644
index 000000000000..14828521f70c
--- /dev/null
+++ b/arch/arm/plat-s5p/include/plat/map-s5p.h
@@ -0,0 +1,34 @@
+/* linux/arch/arm/plat-s5p/include/plat/map-s5p.h
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * S5P - Memory map definitions
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_PLAT_MAP_S5P_H
+#define __ASM_PLAT_MAP_S5P_H __FILE__
+
+#define S5P_VA_CHIPID           S3C_ADDR(0x00700000)
+#define S5P_VA_GPIO             S3C_ADDR(0x00500000)
+#define S5P_VA_SYSTIMER         S3C_ADDR(0x01200000)
+#define S5P_VA_SROMC            S3C_ADDR(0x01100000)
+
+#define S5P_VA_UART0            (S3C_VA_UART + 0x0)
+#define S5P_VA_UART1            (S3C_VA_UART + 0x400)
+#define S5P_VA_UART2            (S3C_VA_UART + 0x800)
+#define S5P_VA_UART3            (S3C_VA_UART + 0xC00)
+
+#define S3C_UART_OFFSET         (0x400)
+
+#define VA_VIC(x)               (S3C_VA_IRQ + ((x) * 0x10000))
+#define VA_VIC0                 VA_VIC(0)
+#define VA_VIC1                 VA_VIC(1)
+#define VA_VIC2                 VA_VIC(2)
+#define VA_VIC3                 VA_VIC(3)
+
+#endif /* __ASM_PLAT_MAP_S5P_H */
diff --git a/arch/arm/plat-s5p/include/plat/pll.h b/arch/arm/plat-s5p/include/plat/pll.h
new file mode 100644
index 000000000000..d48325bb29e2
--- /dev/null
+++ b/arch/arm/plat-s5p/include/plat/pll.h
@@ -0,0 +1,83 @@
+/* arch/arm/plat-s5p/include/plat/pll.h
+ *
+ * Copyright (c) 2009 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * S5P PLL code
+ *
+ * Based on arch/arm/plat-s3c64xx/include/plat/pll.h
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#define PLL45XX_MDIV_MASK       (0x3FF)
+#define PLL45XX_PDIV_MASK       (0x3F)
+#define PLL45XX_SDIV_MASK       (0x7)
+#define PLL45XX_MDIV_SHIFT      (16)
+#define PLL45XX_PDIV_SHIFT      (8)
+#define PLL45XX_SDIV_SHIFT      (0)
+
+#include <asm/div64.h>
+
+enum pll45xx_type_t {
+        pll_4500,
+        pll_4502,
+        pll_4508
+};
+
+static inline unsigned long s5p_get_pll45xx(unsigned long baseclk, u32 pll_con,
+                                            enum pll45xx_type_t pll_type)
+{
+        u32 mdiv, pdiv, sdiv;
+        u64 fvco = baseclk;
+
+        mdiv = (pll_con >> PLL45XX_MDIV_SHIFT) & PLL45XX_MDIV_MASK;
+        pdiv = (pll_con >> PLL45XX_PDIV_SHIFT) & PLL45XX_PDIV_MASK;
+        sdiv = (pll_con >> PLL45XX_SDIV_SHIFT) & PLL45XX_SDIV_MASK;
+
+        if (pll_type == pll_4508)
+                sdiv = sdiv - 1;
+
+        fvco *= mdiv;
+        do_div(fvco, (pdiv << sdiv));
+
+        return (unsigned long)fvco;
+}
+
+#define PLL90XX_MDIV_MASK       (0xFF)
+#define PLL90XX_PDIV_MASK       (0x3F)
+#define PLL90XX_SDIV_MASK       (0x7)
+#define PLL90XX_KDIV_MASK       (0xffff)
+#define PLL90XX_MDIV_SHIFT      (16)
+#define PLL90XX_PDIV_SHIFT      (8)
+#define PLL90XX_SDIV_SHIFT      (0)
+#define PLL90XX_KDIV_SHIFT      (0)
+
+static inline unsigned long s5p_get_pll90xx(unsigned long baseclk,
+                                            u32 pll_con, u32 pll_conk)
+{
+        unsigned long result;
+        u32 mdiv, pdiv, sdiv, kdiv;
+        u64 tmp;
+
+        mdiv = (pll_con >> PLL90XX_MDIV_SHIFT) & PLL90XX_MDIV_MASK;
+        pdiv = (pll_con >> PLL90XX_PDIV_SHIFT) & PLL90XX_PDIV_MASK;
+        sdiv = (pll_con >> PLL90XX_SDIV_SHIFT) & PLL90XX_SDIV_MASK;
+        kdiv = pll_conk & PLL90XX_KDIV_MASK;
+
+        /* We need to multiple baseclk by mdiv (the integer part) and kdiv
+         * which is in 2^16ths, so shift mdiv up (does not overflow) and
+         * add kdiv before multiplying. The use of tmp is to avoid any
+         * overflows before shifting bac down into result when multipling
+         * by the mdiv and kdiv pair.
+         */
+
+        tmp = baseclk;
+        tmp *= (mdiv << 16) + kdiv;
+        do_div(tmp, (pdiv << sdiv));
+        result = tmp >> 16;
+
+        return result;
+}
diff --git a/arch/arm/plat-s5p/include/plat/s5p-clock.h b/arch/arm/plat-s5p/include/plat/s5p-clock.h
new file mode 100644
index 000000000000..56fb8b414d41
--- /dev/null
+++ b/arch/arm/plat-s5p/include/plat/s5p-clock.h
@@ -0,0 +1,40 @@
+/* linux/arch/arm/plat-s5p/include/plat/s5p-clock.h
+ *
+ * Copyright 2009 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * Header file for s5p clock support
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_PLAT_S5P_CLOCK_H
+#define __ASM_PLAT_S5P_CLOCK_H __FILE__
+
+#include <linux/clk.h>
+
+#define GET_DIV(clk, field) ((((clk) & field##_MASK) >> field##_SHIFT) + 1)
+
+#define clk_fin_apll clk_ext_xtal_mux
+#define clk_fin_mpll clk_ext_xtal_mux
+#define clk_fin_epll clk_ext_xtal_mux
+#define clk_fin_vpll clk_ext_xtal_mux
+
+extern struct clk clk_ext_xtal_mux;
+extern struct clk clk_48m;
+extern struct clk clk_fout_apll;
+extern struct clk clk_fout_mpll;
+extern struct clk clk_fout_epll;
+extern struct clk clk_arm;
+extern struct clk clk_vpll;
+
+extern struct clksrc_sources clk_src_apll;
+extern struct clksrc_sources clk_src_mpll;
+extern struct clksrc_sources clk_src_epll;
+
+extern int s5p6440_clk48m_ctrl(struct clk *clk, int enable);
+extern int s5p_gatectrl(void __iomem *reg, struct clk *clk, int enable);
+
+#endif /* __ASM_PLAT_S5P_CLOCK_H */
diff --git a/arch/arm/plat-s5p/include/plat/s5p6440.h b/arch/arm/plat-s5p/include/plat/s5p6440.h
new file mode 100644
index 000000000000..a4cd75afeb3b
--- /dev/null
+++ b/arch/arm/plat-s5p/include/plat/s5p6440.h
@@ -0,0 +1,37 @@
+/* arch/arm/plat-s5p/include/plat/s5p6440.h
+ *
+ * Copyright (c) 2009 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * Header file for s5p6440 cpu support
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+ /* Common init code for S5P6440 related SoCs */
+
+extern void s5p6440_common_init_uarts(struct s3c2410_uartcfg *cfg, int no);
+extern void s5p6440_register_clocks(void);
+extern void s5p6440_setup_clocks(void);
+
+#ifdef CONFIG_CPU_S5P6440
+
+extern  int s5p6440_init(void);
+extern void s5p6440_init_irq(void);
+extern void s5p6440_map_io(void);
+extern void s5p6440_init_clocks(int xtal);
+
+#define s5p6440_init_uarts s5p6440_common_init_uarts
+
+#else
+#define s5p6440_init_clocks NULL
+#define s5p6440_init_uarts NULL
+#define s5p6440_map_io NULL
+#define s5p6440_init NULL
+#endif
+
+/* S5P6440 timer */
+
+extern struct sys_timer s5p6440_timer;
diff --git a/arch/arm/plat-s5p/include/plat/s5p6442.h b/arch/arm/plat-s5p/include/plat/s5p6442.h
new file mode 100644
index 000000000000..7b8801349c94
--- /dev/null
+++ b/arch/arm/plat-s5p/include/plat/s5p6442.h
@@ -0,0 +1,33 @@
+/* arch/arm/plat-s5p/include/plat/s5p6442.h
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * Header file for s5p6442 cpu support
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+/* Common init code for S5P6442 related SoCs */
+
+extern void s5p6442_common_init_uarts(struct s3c2410_uartcfg *cfg, int no);
+extern void s5p6442_register_clocks(void);
+extern void s5p6442_setup_clocks(void);
+
+#ifdef CONFIG_CPU_S5P6442
+
+extern  int s5p6442_init(void);
+extern void s5p6442_init_irq(void);
+extern void s5p6442_map_io(void);
+extern void s5p6442_init_clocks(int xtal);
+
+#define s5p6442_init_uarts s5p6442_common_init_uarts
+
+#else
+#define s5p6442_init_clocks NULL
+#define s5p6442_init_uarts NULL
+#define s5p6442_map_io NULL
+#define s5p6442_init NULL
+#endif
diff --git a/arch/arm/plat-s5p/include/plat/s5pv210.h b/arch/arm/plat-s5p/include/plat/s5pv210.h
new file mode 100644
index 000000000000..6c93a0c78100
--- /dev/null
+++ b/arch/arm/plat-s5p/include/plat/s5pv210.h
@@ -0,0 +1,33 @@
+/* linux/arch/arm/plat-s5p/include/plat/s5pv210.h
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * Header file for s5pv210 cpu support
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+/* Common init code for S5PV210 related SoCs */
+
+extern void s5pv210_common_init_uarts(struct s3c2410_uartcfg *cfg, int no);
+extern void s5pv210_register_clocks(void);
+extern void s5pv210_setup_clocks(void);
+
+#ifdef CONFIG_CPU_S5PV210
+
+extern  int s5pv210_init(void);
+extern void s5pv210_init_irq(void);
+extern void s5pv210_map_io(void);
+extern void s5pv210_init_clocks(int xtal);
+
+#define s5pv210_init_uarts s5pv210_common_init_uarts
+
+#else
+#define s5pv210_init_clocks NULL
+#define s5pv210_init_uarts NULL
+#define s5pv210_map_io NULL
+#define s5pv210_init NULL
+#endif
diff --git a/arch/arm/plat-s5p/irq.c b/arch/arm/plat-s5p/irq.c
new file mode 100644
index 000000000000..25e1eb6de59e
--- /dev/null
+++ b/arch/arm/plat-s5p/irq.c
@@ -0,0 +1,72 @@
+/* arch/arm/plat-s5p/irq.c
+ *
+ * Copyright (c) 2009 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * S5P - Interrupt handling
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include <linux/kernel.h>
+#include <linux/interrupt.h>
+#include <linux/irq.h>
+#include <linux/io.h>
+
+#include <asm/hardware/vic.h>
+
+#include <linux/serial_core.h>
+#include <mach/map.h>
+#include <plat/regs-timer.h>
+#include <plat/regs-serial.h>
+#include <plat/cpu.h>
+#include <plat/irq-vic-timer.h>
+#include <plat/irq-uart.h>
+
+/*
+ * Note, we make use of the fact that the parent IRQs, IRQ_UART[0..3]
+ * are consecutive when looking up the interrupt in the demux routines.
+ */
+static struct s3c_uart_irq uart_irqs[] = {
+        [0] = {
+                .regs           = S5P_VA_UART0,
+                .base_irq       = IRQ_S5P_UART_BASE0,
+                .parent_irq     = IRQ_UART0,
+        },
+        [1] = {
+                .regs           = S5P_VA_UART1,
+                .base_irq       = IRQ_S5P_UART_BASE1,
+                .parent_irq     = IRQ_UART1,
+        },
+        [2] = {
+                .regs           = S5P_VA_UART2,
+                .base_irq       = IRQ_S5P_UART_BASE2,
+                .parent_irq     = IRQ_UART2,
+        },
+#if CONFIG_SERIAL_SAMSUNG_UARTS > 3
+        [3] = {
+                .regs           = S5P_VA_UART3,
+                .base_irq       = IRQ_S5P_UART_BASE3,
+                .parent_irq     = IRQ_UART3,
+        },
+#endif
+};
+
+void __init s5p_init_irq(u32 *vic, u32 num_vic)
+{
+        int irq;
+
+        /* initialize the VICs */
+        for (irq = 0; irq < num_vic; irq++)
+                vic_init(VA_VIC(irq), VIC_BASE(irq), vic[irq], 0);
+
+        s3c_init_vic_timer_irq(IRQ_TIMER0_VIC, IRQ_TIMER0);
+        s3c_init_vic_timer_irq(IRQ_TIMER1_VIC, IRQ_TIMER1);
+        s3c_init_vic_timer_irq(IRQ_TIMER2_VIC, IRQ_TIMER2);
+        s3c_init_vic_timer_irq(IRQ_TIMER3_VIC, IRQ_TIMER3);
+        s3c_init_vic_timer_irq(IRQ_TIMER4_VIC, IRQ_TIMER4);
+
+        s3c_init_uart_irqs(uart_irqs, ARRAY_SIZE(uart_irqs));
+}
diff --git a/arch/arm/plat-s5p/setup-i2c0.c b/arch/arm/plat-s5p/setup-i2c0.c
new file mode 100644
index 000000000000..67a66e02a97a
--- /dev/null
+++ b/arch/arm/plat-s5p/setup-i2c0.c
@@ -0,0 +1,25 @@
+/* linux/arch/arm/plat-s5p/setup-i2c0.c
+ *
+ * Copyright (c) 2009 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * I2C0 GPIO configuration.
+ *
+ * Based on plat-s3c64xx/setup-i2c0.c
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include <linux/kernel.h>
+#include <linux/types.h>
+
+struct platform_device; /* don't need the contents */
+
+#include <plat/iic.h>
+
+void s3c_i2c0_cfg_gpio(struct platform_device *dev)
+{
+        /* Will be populated later */
+}
diff --git a/arch/arm/plat-s5pc1xx/Kconfig b/arch/arm/plat-s5pc1xx/Kconfig
index b7b9e91c0243..c7ccdf22eefa 100644
--- a/arch/arm/plat-s5pc1xx/Kconfig
+++ b/arch/arm/plat-s5pc1xx/Kconfig
@@ -11,6 +11,9 @@ config PLAT_S5PC1XX
         select ARM_VIC
         select NO_IOPORT
         select ARCH_REQUIRE_GPIOLIB
+        select SAMSUNG_CLKSRC
+        select SAMSUNG_IRQ_UART
+        select SAMSUNG_IRQ_VIC_TIMER
         select S3C_GPIO_TRACK
         select S3C_GPIO_PULL_UPDOWN
         select S3C_GPIO_CFG_S3C24XX
diff --git a/arch/arm/plat-s5pc1xx/clock.c b/arch/arm/plat-s5pc1xx/clock.c
index 26c21d849790..387f23190c3c 100644
--- a/arch/arm/plat-s5pc1xx/clock.c
+++ b/arch/arm/plat-s5pc1xx/clock.c
@@ -64,25 +64,13 @@ struct clk clk_54m = {
         .rate           = 54000000,
 };
 
-static int clk_default_setrate(struct clk *clk, unsigned long rate)
-{
-        clk->rate = rate;
-        return 0;
-}
-
-static int clk_dummy_enable(struct clk *clk, int enable)
-{
-        return 0;
-}
-
 struct clk clk_hd0 = {
         .name           = "hclkd0",
         .id             = -1,
         .rate           = 0,
         .parent         = NULL,
         .ctrlbit        = 0,
-        .set_rate       = clk_default_setrate,
-        .enable         = clk_dummy_enable,
+        .ops            = &clk_ops_def_setrate,
 };
 
 struct clk clk_pd0 = {
@@ -91,8 +79,7 @@ struct clk clk_pd0 = {
         .rate           = 0,
         .parent         = NULL,
         .ctrlbit        = 0,
-        .set_rate       = clk_default_setrate,
-        .enable         = clk_dummy_enable,
+        .ops            = &clk_ops_def_setrate,
 };
 
 static int s5pc1xx_clk_gate(void __iomem *reg, struct clk *clk, int enable)
@@ -686,6 +673,8 @@ static struct clk s5pc100_init_clocks[] = {
 static struct clk *clks[] __initdata = {
         &clk_ext,
         &clk_epll,
+        &clk_pd0,
+        &clk_hd0,
         &clk_27m,
         &clk_48m,
         &clk_54m,
@@ -700,16 +689,8 @@ void __init s5pc1xx_register_clocks(void)
 
         s3c24xx_register_clocks(clks, ARRAY_SIZE(clks));
 
-        clkp = s5pc100_init_clocks;
-        size = ARRAY_SIZE(s5pc100_init_clocks);
-
-        for (ptr = 0; ptr < size; ptr++, clkp++) {
-                ret = s3c24xx_register_clock(clkp);
-                if (ret < 0) {
-                        printk(KERN_ERR "Failed to register clock %s (%d)\n",
-                               clkp->name, ret);
-                }
-        }
+        s3c_register_clocks(s5pc100_init_clocks,
+                            ARRAY_SIZE(s5pc100_init_clocks));
 
         clkp = s5pc100_init_clocks_disable;
         size = ARRAY_SIZE(s5pc100_init_clocks_disable);
diff --git a/arch/arm/plat-s5pc1xx/dev-uart.c b/arch/arm/plat-s5pc1xx/dev-uart.c
index f749bc5407b5..586c95c60bfe 100644
--- a/arch/arm/plat-s5pc1xx/dev-uart.c
+++ b/arch/arm/plat-s5pc1xx/dev-uart.c
@@ -143,32 +143,3 @@ struct s3c24xx_uart_resources s5pc1xx_uart_resources[] __initdata = {
                 .nr_resources   = ARRAY_SIZE(s5pc1xx_uart3_resource),
         },
 };
-
-/* uart devices */
-
-static struct platform_device s3c24xx_uart_device0 = {
-        .id             = 0,
-};
-
-static struct platform_device s3c24xx_uart_device1 = {
-        .id             = 1,
-};
-
-static struct platform_device s3c24xx_uart_device2 = {
-        .id             = 2,
-};
-
-static struct platform_device s3c24xx_uart_device3 = {
-        .id             = 3,
-};
-
-struct platform_device *s3c24xx_uart_src[4] = {
-        &s3c24xx_uart_device0,
-        &s3c24xx_uart_device1,
-        &s3c24xx_uart_device2,
-        &s3c24xx_uart_device3,
-};
-
-struct platform_device *s3c24xx_uart_devs[4] = {
-};
-
diff --git a/arch/arm/plat-s5pc1xx/gpio-config.c b/arch/arm/plat-s5pc1xx/gpio-config.c
index bba675df9c75..a4f67e80a150 100644
--- a/arch/arm/plat-s5pc1xx/gpio-config.c
+++ b/arch/arm/plat-s5pc1xx/gpio-config.c
@@ -16,7 +16,7 @@
 #include <linux/gpio.h>
 #include <linux/io.h>
 
-#include <mach/gpio-core.h>
+#include <plat/gpio-core.h>
 #include <plat/gpio-cfg-s5pc1xx.h>
 
 s5p_gpio_drvstr_t s5p_gpio_get_drvstr(unsigned int pin, unsigned int off)
diff --git a/arch/arm/plat-s5pc1xx/gpiolib.c b/arch/arm/plat-s5pc1xx/gpiolib.c
index facb410e7a71..1ffc57ac293d 100644
--- a/arch/arm/plat-s5pc1xx/gpiolib.c
+++ b/arch/arm/plat-s5pc1xx/gpiolib.c
@@ -17,8 +17,8 @@
 #include <linux/gpio.h>
 
 #include <mach/map.h>
-#include <mach/gpio-core.h>
 
+#include <plat/gpio-core.h>
 #include <plat/gpio-cfg.h>
 #include <plat/gpio-cfg-helpers.h>
 #include <plat/regs-gpio.h>
diff --git a/arch/arm/plat-s5pc1xx/include/plat/irqs.h b/arch/arm/plat-s5pc1xx/include/plat/irqs.h
index ef8736366f0d..409c804315e8 100644
--- a/arch/arm/plat-s5pc1xx/include/plat/irqs.h
+++ b/arch/arm/plat-s5pc1xx/include/plat/irqs.h
@@ -88,11 +88,11 @@
 #define IRQ_MDMA                S5PC1XX_IRQ_VIC0(18)
 #define IRQ_PDMA0               S5PC1XX_IRQ_VIC0(19)
 #define IRQ_PDMA1               S5PC1XX_IRQ_VIC0(20)
-#define IRQ_TIMER0              S5PC1XX_IRQ_VIC0(21)
-#define IRQ_TIMER1              S5PC1XX_IRQ_VIC0(22)
-#define IRQ_TIMER2              S5PC1XX_IRQ_VIC0(23)
-#define IRQ_TIMER3              S5PC1XX_IRQ_VIC0(24)
-#define IRQ_TIMER4              S5PC1XX_IRQ_VIC0(25)
+#define IRQ_TIMER0_VIC          S5PC1XX_IRQ_VIC0(21)
+#define IRQ_TIMER1_VIC          S5PC1XX_IRQ_VIC0(22)
+#define IRQ_TIMER2_VIC          S5PC1XX_IRQ_VIC0(23)
+#define IRQ_TIMER3_VIC          S5PC1XX_IRQ_VIC0(24)
+#define IRQ_TIMER4_VIC          S5PC1XX_IRQ_VIC0(25)
 #define IRQ_SYSTIMER            S5PC1XX_IRQ_VIC0(26)
 #define IRQ_WDT                 S5PC1XX_IRQ_VIC0(27)
 #define IRQ_RTC_ALARM           S5PC1XX_IRQ_VIC0(28)
@@ -171,8 +171,15 @@
 #define IRQ_SDMIRQ              S5PC1XX_IRQ_VIC2(30)
 #define IRQ_SDMFIQ              S5PC1XX_IRQ_VIC2(31)
 
+#define IRQ_TIMER(x)            (IRQ_SDMFIQ + 1 + (x))
+#define IRQ_TIMER0              IRQ_TIMER(0)
+#define IRQ_TIMER1              IRQ_TIMER(1)
+#define IRQ_TIMER2              IRQ_TIMER(2)
+#define IRQ_TIMER3              IRQ_TIMER(3)
+#define IRQ_TIMER4              IRQ_TIMER(4)
+
 /* External interrupt */
-#define S3C_IRQ_EINT_BASE       (IRQ_SDMFIQ + 1)
+#define S3C_IRQ_EINT_BASE       (IRQ_SDMFIQ + 6)
 
 #define S3C_EINT(x)             (S3C_IRQ_EINT_BASE + (x - 16))
 #define IRQ_EINT(x)             (x < 16 ? IRQ_EINT0 + x : S3C_EINT(x))
diff --git a/arch/arm/plat-s5pc1xx/include/plat/regs-clock.h b/arch/arm/plat-s5pc1xx/include/plat/regs-clock.h
index c5cc86e92d65..24dec4e52538 100644
--- a/arch/arm/plat-s5pc1xx/include/plat/regs-clock.h
+++ b/arch/arm/plat-s5pc1xx/include/plat/regs-clock.h
@@ -61,73 +61,10 @@
 #define S5PC100_EPLL_MASK               0xffffffff
 #define S5PC100_EPLLVAL(_m, _p, _s)     ((_m) << 16 | ((_p) << 8) | ((_s)))
 
-/* CLKSRC0 */
-#define S5PC100_CLKSRC0_APLL_MASK               (0x1<<0)
-#define S5PC100_CLKSRC0_APLL_SHIFT              (0)
-#define S5PC100_CLKSRC0_MPLL_MASK               (0x1<<4)
-#define S5PC100_CLKSRC0_MPLL_SHIFT              (4)
-#define S5PC100_CLKSRC0_EPLL_MASK               (0x1<<8)
-#define S5PC100_CLKSRC0_EPLL_SHIFT              (8)
-#define S5PC100_CLKSRC0_HPLL_MASK               (0x1<<12)
-#define S5PC100_CLKSRC0_HPLL_SHIFT              (12)
-#define S5PC100_CLKSRC0_AMMUX_MASK              (0x1<<16)
-#define S5PC100_CLKSRC0_AMMUX_SHIFT             (16)
-#define S5PC100_CLKSRC0_HREF_MASK               (0x1<<20)
-#define S5PC100_CLKSRC0_HREF_SHIFT              (20)
-#define S5PC100_CLKSRC0_ONENAND_MASK    (0x1<<24)
-#define S5PC100_CLKSRC0_ONENAND_SHIFT   (24)
-
-
-/* CLKSRC1 */
-#define S5PC100_CLKSRC1_UART_MASK               (0x1<<0)
-#define S5PC100_CLKSRC1_UART_SHIFT              (0)
-#define S5PC100_CLKSRC1_SPI0_MASK               (0x3<<4)
-#define S5PC100_CLKSRC1_SPI0_SHIFT              (4)
-#define S5PC100_CLKSRC1_SPI1_MASK               (0x3<<8)
-#define S5PC100_CLKSRC1_SPI1_SHIFT              (8)
-#define S5PC100_CLKSRC1_SPI2_MASK               (0x3<<12)
-#define S5PC100_CLKSRC1_SPI2_SHIFT              (12)
-#define S5PC100_CLKSRC1_IRDA_MASK               (0x3<<16)
-#define S5PC100_CLKSRC1_IRDA_SHIFT              (16)
-#define S5PC100_CLKSRC1_UHOST_MASK              (0x3<<20)
-#define S5PC100_CLKSRC1_UHOST_SHIFT             (20)
-#define S5PC100_CLKSRC1_CLK48M_MASK             (0x1<<24)
+/* CLKSRC0..CLKSRC3 -> mostly removed due to clksrc updates */
+#define S5PC100_CLKSRC1_CLK48M_MASK     (0x1<<24)
 #define S5PC100_CLKSRC1_CLK48M_SHIFT    (24)
 
-/* CLKSRC2 */
-#define S5PC100_CLKSRC2_MMC0_MASK               (0x3<<0)
-#define S5PC100_CLKSRC2_MMC0_SHIFT              (0)
-#define S5PC100_CLKSRC2_MMC1_MASK               (0x3<<4)
-#define S5PC100_CLKSRC2_MMC1_SHIFT              (4)
-#define S5PC100_CLKSRC2_MMC2_MASK               (0x3<<8)
-#define S5PC100_CLKSRC2_MMC2_SHIFT              (8)
-#define S5PC100_CLKSRC2_LCD_MASK                (0x3<<12)
-#define S5PC100_CLKSRC2_LCD_SHIFT               (12)
-#define S5PC100_CLKSRC2_FIMC0_MASK              (0x3<<16)
-#define S5PC100_CLKSRC2_FIMC0_SHIFT             (16)
-#define S5PC100_CLKSRC2_FIMC1_MASK              (0x3<<20)
-#define S5PC100_CLKSRC2_FIMC1_SHIFT             (20)
-#define S5PC100_CLKSRC2_FIMC2_MASK              (0x3<<24)
-#define S5PC100_CLKSRC2_FIMC2_SHIFT             (24)
-#define S5PC100_CLKSRC2_MIXER_MASK              (0x3<<28)
-#define S5PC100_CLKSRC2_MIXER_SHIFT             (28)
-
-/* CLKSRC3 */
-#define S5PC100_CLKSRC3_PWI_MASK                (0x3<<0)
-#define S5PC100_CLKSRC3_PWI_SHIFT               (0)
-#define S5PC100_CLKSRC3_HCLKD2_MASK             (0x1<<4)
-#define S5PC100_CLKSRC3_HCLKD2_SHIFT    (4)
-#define S5PC100_CLKSRC3_I2SD2_MASK              (0x3<<8)
-#define S5PC100_CLKSRC3_I2SD2_SHIFT             (8)
-#define S5PC100_CLKSRC3_AUDIO0_MASK             (0x7<<12)
-#define S5PC100_CLKSRC3_AUDIO0_SHIFT    (12)
-#define S5PC100_CLKSRC3_AUDIO1_MASK             (0x7<<16)
-#define S5PC100_CLKSRC3_AUDIO1_SHIFT    (16)
-#define S5PC100_CLKSRC3_AUDIO2_MASK             (0x7<<20)
-#define S5PC100_CLKSRC3_AUDIO2_SHIFT    (20)
-#define S5PC100_CLKSRC3_SPDIF_MASK              (0x3<<24)
-#define S5PC100_CLKSRC3_SPDIF_SHIFT             (24)
-
 /* CLKDIV0 */
 #define S5PC100_CLKDIV0_APLL_MASK               (0x1<<0)
 #define S5PC100_CLKDIV0_APLL_SHIFT              (0)
@@ -140,7 +77,7 @@
 #define S5PC100_CLKDIV0_SECSS_MASK              (0x7<<16)
 #define S5PC100_CLKDIV0_SECSS_SHIFT             (16)
 
-/* CLKDIV1 */
+/* CLKDIV1 (OneNAND clock only used in one place, removed) */
 #define S5PC100_CLKDIV1_APLL2_MASK              (0x7<<0)
 #define S5PC100_CLKDIV1_APLL2_SHIFT             (0)
 #define S5PC100_CLKDIV1_MPLL_MASK               (0x3<<4)
@@ -151,56 +88,12 @@
 #define S5PC100_CLKDIV1_D1_SHIFT                (12)
 #define S5PC100_CLKDIV1_PCLKD1_MASK             (0x7<<16)
 #define S5PC100_CLKDIV1_PCLKD1_SHIFT    (16)
-#define S5PC100_CLKDIV1_ONENAND_MASK    (0x3<<20)
-#define S5PC100_CLKDIV1_ONENAND_SHIFT   (20)
 #define S5PC100_CLKDIV1_CAM_MASK                (0x1F<<24)
 #define S5PC100_CLKDIV1_CAM_SHIFT               (24)
 
-/* CLKDIV2 */
-#define S5PC100_CLKDIV2_UART_MASK               (0x7<<0)
-#define S5PC100_CLKDIV2_UART_SHIFT              (0)
-#define S5PC100_CLKDIV2_SPI0_MASK               (0xf<<4)
-#define S5PC100_CLKDIV2_SPI0_SHIFT              (4)
-#define S5PC100_CLKDIV2_SPI1_MASK               (0xf<<8)
-#define S5PC100_CLKDIV2_SPI1_SHIFT              (8)
-#define S5PC100_CLKDIV2_SPI2_MASK               (0xf<<12)
-#define S5PC100_CLKDIV2_SPI2_SHIFT              (12)
-#define S5PC100_CLKDIV2_IRDA_MASK               (0xf<<16)
-#define S5PC100_CLKDIV2_IRDA_SHIFT              (16)
-#define S5PC100_CLKDIV2_UHOST_MASK              (0xf<<20)
-#define S5PC100_CLKDIV2_UHOST_SHIFT             (20)
-
-/* CLKDIV3 */
-#define S5PC100_CLKDIV3_MMC0_MASK               (0xf<<0)
-#define S5PC100_CLKDIV3_MMC0_SHIFT              (0)
-#define S5PC100_CLKDIV3_MMC1_MASK               (0xf<<4)
-#define S5PC100_CLKDIV3_MMC1_SHIFT              (4)
-#define S5PC100_CLKDIV3_MMC2_MASK               (0xf<<8)
-#define S5PC100_CLKDIV3_MMC2_SHIFT              (8)
-#define S5PC100_CLKDIV3_LCD_MASK                (0xf<<12)
-#define S5PC100_CLKDIV3_LCD_SHIFT               (12)
-#define S5PC100_CLKDIV3_FIMC0_MASK              (0xf<<16)
-#define S5PC100_CLKDIV3_FIMC0_SHIFT             (16)
-#define S5PC100_CLKDIV3_FIMC1_MASK              (0xf<<20)
-#define S5PC100_CLKDIV3_FIMC1_SHIFT             (20)
-#define S5PC100_CLKDIV3_FIMC2_MASK              (0xf<<24)
-#define S5PC100_CLKDIV3_FIMC2_SHIFT             (24)
-#define S5PC100_CLKDIV3_HDMI_MASK               (0xf<<28)
-#define S5PC100_CLKDIV3_HDMI_SHIFT              (28)
-
-/* CLKDIV4 */
-#define S5PC100_CLKDIV4_PWI_MASK                (0x7<<0)
-#define S5PC100_CLKDIV4_PWI_SHIFT               (0)
-#define S5PC100_CLKDIV4_HCLKD2_MASK             (0x7<<4)
-#define S5PC100_CLKDIV4_HCLKD2_SHIFT    (4)
-#define S5PC100_CLKDIV4_I2SD2_MASK              (0xf<<8)
-#define S5PC100_CLKDIV4_I2SD2_SHIFT             (8)
-#define S5PC100_CLKDIV4_AUDIO0_MASK             (0xf<<12)
-#define S5PC100_CLKDIV4_AUDIO0_SHIFT    (12)
-#define S5PC100_CLKDIV4_AUDIO1_MASK             (0xf<<16)
-#define S5PC100_CLKDIV4_AUDIO1_SHIFT    (16)
-#define S5PC100_CLKDIV4_AUDIO2_MASK             (0xf<<20)
-#define S5PC100_CLKDIV4_AUDIO2_SHIFT    (20)
+/* CLKDIV2 => removed in clksrc update */
+/* CLKDIV3 => removed in clksrc update, or not needed */
+/* CLKDIV4 => removed in clksrc update, or not needed */
 
 /* HCLKD0/PCLKD0 Clock Gate 0 Registers */
 #define S5PC100_CLKGATE_D00_INTC                (1<<0)
diff --git a/arch/arm/plat-s5pc1xx/irq.c b/arch/arm/plat-s5pc1xx/irq.c
index e44fd04ef333..bfc524827819 100644
--- a/arch/arm/plat-s5pc1xx/irq.c
+++ b/arch/arm/plat-s5pc1xx/irq.c
@@ -20,87 +20,14 @@
 #include <asm/hardware/vic.h>
 
 #include <mach/map.h>
-#include <plat/regs-timer.h>
+#include <plat/irq-vic-timer.h>
+#include <plat/irq-uart.h>
 #include <plat/cpu.h>
 
-/* Timer interrupt handling */
-
-static void s3c_irq_demux_timer(unsigned int base_irq, unsigned int sub_irq)
-{
-        generic_handle_irq(sub_irq);
-}
-
-static void s3c_irq_demux_timer0(unsigned int irq, struct irq_desc *desc)
-{
-        s3c_irq_demux_timer(irq, IRQ_TIMER0);
-}
-
-static void s3c_irq_demux_timer1(unsigned int irq, struct irq_desc *desc)
-{
-        s3c_irq_demux_timer(irq, IRQ_TIMER1);
-}
-
-static void s3c_irq_demux_timer2(unsigned int irq, struct irq_desc *desc)
-{
-        s3c_irq_demux_timer(irq, IRQ_TIMER2);
-}
-
-static void s3c_irq_demux_timer3(unsigned int irq, struct irq_desc *desc)
-{
-        s3c_irq_demux_timer(irq, IRQ_TIMER3);
-}
-
-static void s3c_irq_demux_timer4(unsigned int irq, struct irq_desc *desc)
-{
-        s3c_irq_demux_timer(irq, IRQ_TIMER4);
-}
-
-/* We assume the IRQ_TIMER0..IRQ_TIMER4 range is continuous. */
-
-static void s3c_irq_timer_mask(unsigned int irq)
-{
-        u32 reg = __raw_readl(S3C64XX_TINT_CSTAT);
-
-        reg &= 0x1f;  /* mask out pending interrupts */
-        reg &= ~(1 << (irq - IRQ_TIMER0));
-        __raw_writel(reg, S3C64XX_TINT_CSTAT);
-}
-
-static void s3c_irq_timer_unmask(unsigned int irq)
-{
-        u32 reg = __raw_readl(S3C64XX_TINT_CSTAT);
-
-        reg &= 0x1f;  /* mask out pending interrupts */
-        reg |= 1 << (irq - IRQ_TIMER0);
-        __raw_writel(reg, S3C64XX_TINT_CSTAT);
-}
-
-static void s3c_irq_timer_ack(unsigned int irq)
-{
-        u32 reg = __raw_readl(S3C64XX_TINT_CSTAT);
-
-        reg &= 0x1f;  /* mask out pending interrupts */
-        reg |= (1 << 5) << (irq - IRQ_TIMER0);
-        __raw_writel(reg, S3C64XX_TINT_CSTAT);
-}
-
-static struct irq_chip s3c_irq_timer = {
-        .name           = "s3c-timer",
-        .mask           = s3c_irq_timer_mask,
-        .unmask         = s3c_irq_timer_unmask,
-        .ack            = s3c_irq_timer_ack,
-};
-
-struct uart_irq {
-        void __iomem    *regs;
-        unsigned int     base_irq;
-        unsigned int     parent_irq;
-};
-
 /* Note, we make use of the fact that the parent IRQs, IRQ_UART[0..3]
  * are consecutive when looking up the interrupt in the demux routines.
  */
-static struct uart_irq uart_irqs[] = {
+static struct s3c_uart_irq uart_irqs[] = {
         [0] = {
                 .regs           = (void *)S3C_VA_UART0,
                 .base_irq       = IRQ_S3CUART_BASE0,
@@ -123,113 +50,9 @@ static struct uart_irq uart_irqs[] = {
         },
 };
 
-static inline void __iomem *s3c_irq_uart_base(unsigned int irq)
-{
-        struct uart_irq *uirq = get_irq_chip_data(irq);
-        return uirq->regs;
-}
-
-static inline unsigned int s3c_irq_uart_bit(unsigned int irq)
-{
-        return irq & 3;
-}
-
-/* UART interrupt registers, not worth adding to seperate include header */
-#define S3C64XX_UINTP   0x30
-#define S3C64XX_UINTSP  0x34
-#define S3C64XX_UINTM   0x38
-
-static void s3c_irq_uart_mask(unsigned int irq)
-{
-        void __iomem *regs = s3c_irq_uart_base(irq);
-        unsigned int bit = s3c_irq_uart_bit(irq);
-        u32 reg;
-
-        reg = __raw_readl(regs + S3C64XX_UINTM);
-        reg |= (1 << bit);
-        __raw_writel(reg, regs + S3C64XX_UINTM);
-}
-
-static void s3c_irq_uart_maskack(unsigned int irq)
-{
-        void __iomem *regs = s3c_irq_uart_base(irq);
-        unsigned int bit = s3c_irq_uart_bit(irq);
-        u32 reg;
-
-        reg = __raw_readl(regs + S3C64XX_UINTM);
-        reg |= (1 << bit);
-        __raw_writel(reg, regs + S3C64XX_UINTM);
-        __raw_writel(1 << bit, regs + S3C64XX_UINTP);
-}
-
-static void s3c_irq_uart_unmask(unsigned int irq)
-{
-        void __iomem *regs = s3c_irq_uart_base(irq);
-        unsigned int bit = s3c_irq_uart_bit(irq);
-        u32 reg;
-
-        reg = __raw_readl(regs + S3C64XX_UINTM);
-        reg &= ~(1 << bit);
-        __raw_writel(reg, regs + S3C64XX_UINTM);
-}
-
-static void s3c_irq_uart_ack(unsigned int irq)
-{
-        void __iomem *regs = s3c_irq_uart_base(irq);
-        unsigned int bit = s3c_irq_uart_bit(irq);
-
-        __raw_writel(1 << bit, regs + S3C64XX_UINTP);
-}
-
-static void s3c_irq_demux_uart(unsigned int irq, struct irq_desc *desc)
-{
-        struct uart_irq *uirq = &uart_irqs[irq - IRQ_UART0];
-        u32 pend = __raw_readl(uirq->regs + S3C64XX_UINTP);
-        int base = uirq->base_irq;
-
-        if (pend & (1 << 0))
-                generic_handle_irq(base);
-        if (pend & (1 << 1))
-                generic_handle_irq(base + 1);
-        if (pend & (1 << 2))
-                generic_handle_irq(base + 2);
-        if (pend & (1 << 3))
-                generic_handle_irq(base + 3);
-}
-
-static struct irq_chip s3c_irq_uart = {
-        .name           = "s3c-uart",
-        .mask           = s3c_irq_uart_mask,
-        .unmask         = s3c_irq_uart_unmask,
-        .mask_ack       = s3c_irq_uart_maskack,
-        .ack            = s3c_irq_uart_ack,
-};
-
-static void __init s5pc1xx_uart_irq(struct uart_irq *uirq)
-{
-        void __iomem *reg_base = uirq->regs;
-        unsigned int irq;
-        int offs;
-
-        /* mask all interrupts at the start. */
-        __raw_writel(0xf, reg_base + S3C64XX_UINTM);
-
-        for (offs = 0; offs < 3; offs++) {
-                irq = uirq->base_irq + offs;
-
-                set_irq_chip(irq, &s3c_irq_uart);
-                set_irq_chip_data(irq, uirq);
-                set_irq_handler(irq, handle_level_irq);
-                set_irq_flags(irq, IRQF_VALID);
-        }
-
-        set_irq_chained_handler(uirq->parent_irq, s3c_irq_demux_uart);
-}
-
 void __init s5pc1xx_init_irq(u32 *vic_valid, int num)
 {
         int i;
-        int uart, irq;
 
         printk(KERN_DEBUG "%s: initialising interrupts\n", __func__);
 
@@ -240,20 +63,13 @@ void __init s5pc1xx_init_irq(u32 *vic_valid, int num)
 
         /* add the timer sub-irqs */
 
-        set_irq_chained_handler(IRQ_TIMER0, s3c_irq_demux_timer0);
-        set_irq_chained_handler(IRQ_TIMER1, s3c_irq_demux_timer1);
-        set_irq_chained_handler(IRQ_TIMER2, s3c_irq_demux_timer2);
-        set_irq_chained_handler(IRQ_TIMER3, s3c_irq_demux_timer3);
-        set_irq_chained_handler(IRQ_TIMER4, s3c_irq_demux_timer4);
-
-        for (irq = IRQ_TIMER0; irq <= IRQ_TIMER4; irq++) {
-                set_irq_chip(irq, &s3c_irq_timer);
-                set_irq_handler(irq, handle_level_irq);
-                set_irq_flags(irq, IRQF_VALID);
-        }
+        s3c_init_vic_timer_irq(IRQ_TIMER0_VIC, IRQ_TIMER0);
+        s3c_init_vic_timer_irq(IRQ_TIMER1_VIC, IRQ_TIMER1);
+        s3c_init_vic_timer_irq(IRQ_TIMER2_VIC, IRQ_TIMER2);
+        s3c_init_vic_timer_irq(IRQ_TIMER3_VIC, IRQ_TIMER3);
+        s3c_init_vic_timer_irq(IRQ_TIMER4_VIC, IRQ_TIMER4);
 
-        for (uart = 0; uart < ARRAY_SIZE(uart_irqs); uart++)
-                s5pc1xx_uart_irq(&uart_irqs[uart]);
+        s3c_init_uart_irqs(uart_irqs, ARRAY_SIZE(uart_irqs));
 }
 
 
diff --git a/arch/arm/plat-s5pc1xx/s5pc100-clock.c b/arch/arm/plat-s5pc1xx/s5pc100-clock.c
index b436d44510c8..2bf6c57a96a2 100644
--- a/arch/arm/plat-s5pc1xx/s5pc100-clock.c
+++ b/arch/arm/plat-s5pc1xx/s5pc100-clock.c
@@ -29,6 +29,7 @@
 
 #include <plat/regs-clock.h>
 #include <plat/clock.h>
+#include <plat/clock-clksrc.h>
 #include <plat/cpu.h>
 #include <plat/pll.h>
 #include <plat/devs.h>
@@ -51,23 +52,6 @@ static struct clk clk_ext_xtal_mux = {
 #define clk_fout_mpll   clk_mpll
 #define clk_vclk_54m    clk_54m
 
-struct clk_sources {
-        unsigned int    nr_sources;
-        struct clk      **sources;
-};
-
-struct clksrc_clk {
-        struct clk              clk;
-        unsigned int            mask;
-        unsigned int            shift;
-
-        struct clk_sources      *sources;
-
-        unsigned int            divider_shift;
-        void __iomem            *reg_divider;
-        void __iomem            *reg_source;
-};
-
 /* APLL */
 static struct clk clk_fout_apll = {
         .name           = "fout_apll",
@@ -80,7 +64,7 @@ static struct clk *clk_src_apll_list[] = {
         [1] = &clk_fout_apll,
 };
 
-static struct clk_sources clk_src_apll = {
+static struct clksrc_sources clk_src_apll = {
         .sources        = clk_src_apll_list,
         .nr_sources     = ARRAY_SIZE(clk_src_apll_list),
 };
@@ -90,10 +74,8 @@ static struct clksrc_clk clk_mout_apll = {
                 .name           = "mout_apll",
                 .id             = -1,
         },
-        .shift          = S5PC100_CLKSRC0_APLL_SHIFT,
-        .mask           = S5PC100_CLKSRC0_APLL_MASK,
         .sources        = &clk_src_apll,
-        .reg_source     = S5PC100_CLKSRC0,
+        .reg_src = { .reg = S5PC100_CLKSRC0, .shift = 0, .size = 1, },
 };
 
 static unsigned long s5pc100_clk_dout_apll_get_rate(struct clk *clk)
@@ -111,7 +93,9 @@ static struct clk clk_dout_apll = {
         .name           = "dout_apll",
         .id             = -1,
         .parent         = &clk_mout_apll.clk,
-        .get_rate       = s5pc100_clk_dout_apll_get_rate,
+        .ops            = &(struct clk_ops) {
+                .get_rate       = s5pc100_clk_dout_apll_get_rate,
+        },
 };
 
 static unsigned long s5pc100_clk_arm_get_rate(struct clk *clk)
@@ -165,9 +149,11 @@ static struct clk clk_arm = {
         .name           = "armclk",
         .id             = -1,
         .parent         = &clk_dout_apll,
-        .get_rate       = s5pc100_clk_arm_get_rate,
-        .set_rate       = s5pc100_clk_arm_set_rate,
-        .round_rate     = s5pc100_clk_arm_round_rate,
+        .ops            = &(struct clk_ops) {
+                .get_rate       = s5pc100_clk_arm_get_rate,
+                .set_rate       = s5pc100_clk_arm_set_rate,
+                .round_rate     = s5pc100_clk_arm_round_rate,
+        },
 };
 
 static unsigned long s5pc100_clk_dout_d0_bus_get_rate(struct clk *clk)
@@ -185,7 +171,9 @@ static struct clk clk_dout_d0_bus = {
         .name           = "dout_d0_bus",
         .id             = -1,
         .parent         = &clk_arm,
-        .get_rate       = s5pc100_clk_dout_d0_bus_get_rate,
+        .ops            = &(struct clk_ops) {
+                .get_rate       = s5pc100_clk_dout_d0_bus_get_rate,
+        },
 };
 
 static unsigned long s5pc100_clk_dout_pclkd0_get_rate(struct clk *clk)
@@ -203,7 +191,9 @@ static struct clk clk_dout_pclkd0 = {
         .name           = "dout_pclkd0",
         .id             = -1,
         .parent         = &clk_dout_d0_bus,
-        .get_rate       = s5pc100_clk_dout_pclkd0_get_rate,
+        .ops            = &(struct clk_ops) {
+                .get_rate       = s5pc100_clk_dout_pclkd0_get_rate,
+        },
 };
 
 static unsigned long s5pc100_clk_dout_apll2_get_rate(struct clk *clk)
@@ -221,7 +211,9 @@ static struct clk clk_dout_apll2 = {
         .name           = "dout_apll2",
         .id             = -1,
         .parent         = &clk_mout_apll.clk,
-        .get_rate       = s5pc100_clk_dout_apll2_get_rate,
+        .ops            = &(struct clk_ops) {
+                .get_rate       = s5pc100_clk_dout_apll2_get_rate,
+        },
 };
 
 /* MPLL */
@@ -230,7 +222,7 @@ static struct clk *clk_src_mpll_list[] = {
         [1] = &clk_fout_mpll,
 };
 
-static struct clk_sources clk_src_mpll = {
+static struct clksrc_sources clk_src_mpll = {
         .sources        = clk_src_mpll_list,
         .nr_sources     = ARRAY_SIZE(clk_src_mpll_list),
 };
@@ -240,10 +232,8 @@ static struct clksrc_clk clk_mout_mpll = {
                 .name           = "mout_mpll",
                 .id             = -1,
         },
-        .shift          = S5PC100_CLKSRC0_MPLL_SHIFT,
-        .mask           = S5PC100_CLKSRC0_MPLL_MASK,
         .sources        = &clk_src_mpll,
-        .reg_source     = S5PC100_CLKSRC0,
+        .reg_src = { .reg = S5PC100_CLKSRC0, .shift = 4, .size = 1, },
 };
 
 static struct clk *clkset_am_list[] = {
@@ -251,7 +241,7 @@ static struct clk *clkset_am_list[] = {
         [1] = &clk_dout_apll2,
 };
 
-static struct clk_sources clk_src_am = {
+static struct clksrc_sources clk_src_am = {
         .sources        = clkset_am_list,
         .nr_sources     = ARRAY_SIZE(clkset_am_list),
 };
@@ -261,10 +251,8 @@ static struct clksrc_clk clk_mout_am = {
                 .name           = "mout_am",
                 .id             = -1,
         },
-        .shift          = S5PC100_CLKSRC0_AMMUX_SHIFT,
-        .mask           = S5PC100_CLKSRC0_AMMUX_MASK,
         .sources        = &clk_src_am,
-        .reg_source     = S5PC100_CLKSRC0,
+        .reg_src = { .reg = S5PC100_CLKSRC0, .shift = 16, .size = 1, },
 };
 
 static unsigned long s5pc100_clk_dout_d1_bus_get_rate(struct clk *clk)
@@ -284,7 +272,9 @@ static struct clk clk_dout_d1_bus = {
         .name           = "dout_d1_bus",
         .id             = -1,
         .parent         = &clk_mout_am.clk,
-        .get_rate       = s5pc100_clk_dout_d1_bus_get_rate,
+        .ops            = &(struct clk_ops) {
+                .get_rate       = s5pc100_clk_dout_d1_bus_get_rate,
+        },
 };
 
 static struct clk *clkset_onenand_list[] = {
@@ -292,7 +282,7 @@ static struct clk *clkset_onenand_list[] = {
         [1] = &clk_dout_d1_bus,
 };
 
-static struct clk_sources clk_src_onenand = {
+static struct clksrc_sources clk_src_onenand = {
         .sources        = clkset_onenand_list,
         .nr_sources     = ARRAY_SIZE(clkset_onenand_list),
 };
@@ -302,10 +292,8 @@ static struct clksrc_clk clk_mout_onenand = {
                 .name           = "mout_onenand",
                 .id             = -1,
         },
-        .shift          = S5PC100_CLKSRC0_ONENAND_SHIFT,
-        .mask           = S5PC100_CLKSRC0_ONENAND_MASK,
         .sources        = &clk_src_onenand,
-        .reg_source     = S5PC100_CLKSRC0,
+        .reg_src = { .reg = S5PC100_CLKSRC0, .shift = 24, .size = 1, },
 };
 
 static unsigned long s5pc100_clk_dout_pclkd1_get_rate(struct clk *clk)
@@ -325,7 +313,9 @@ static struct clk clk_dout_pclkd1 = {
         .name           = "dout_pclkd1",
         .id             = -1,
         .parent         = &clk_dout_d1_bus,
-        .get_rate       = s5pc100_clk_dout_pclkd1_get_rate,
+        .ops            = &(struct clk_ops) {
+                .get_rate       = s5pc100_clk_dout_pclkd1_get_rate,
+        },
 };
 
 static unsigned long s5pc100_clk_dout_mpll2_get_rate(struct clk *clk)
@@ -345,7 +335,9 @@ static struct clk clk_dout_mpll2 = {
         .name           = "dout_mpll2",
         .id             = -1,
         .parent         = &clk_mout_am.clk,
-        .get_rate       = s5pc100_clk_dout_mpll2_get_rate,
+        .ops            = &(struct clk_ops) {
+                .get_rate       = s5pc100_clk_dout_mpll2_get_rate,
+        },
 };
 
 static unsigned long s5pc100_clk_dout_cam_get_rate(struct clk *clk)
@@ -365,7 +357,9 @@ static struct clk clk_dout_cam = {
         .name           = "dout_cam",
         .id             = -1,
         .parent         = &clk_dout_mpll2,
-        .get_rate       = s5pc100_clk_dout_cam_get_rate,
+        .ops            = &(struct clk_ops) {
+                .get_rate       = s5pc100_clk_dout_cam_get_rate,
+        },
 };
 
 static unsigned long s5pc100_clk_dout_mpll_get_rate(struct clk *clk)
@@ -385,7 +379,9 @@ static struct clk clk_dout_mpll = {
         .name           = "dout_mpll",
         .id             = -1,
         .parent         = &clk_mout_am.clk,
-        .get_rate       = s5pc100_clk_dout_mpll_get_rate,
+        .ops            = &(struct clk_ops) {
+                .get_rate       = s5pc100_clk_dout_mpll_get_rate,
+        },
 };
 
 /* EPLL */
@@ -399,7 +395,7 @@ static struct clk *clk_src_epll_list[] = {
         [1] = &clk_fout_epll,
 };
 
-static struct clk_sources clk_src_epll = {
+static struct clksrc_sources clk_src_epll = {
         .sources        = clk_src_epll_list,
         .nr_sources     = ARRAY_SIZE(clk_src_epll_list),
 };
@@ -409,10 +405,8 @@ static struct clksrc_clk clk_mout_epll = {
                 .name           = "mout_epll",
                 .id             = -1,
         },
-        .shift          = S5PC100_CLKSRC0_EPLL_SHIFT,
-        .mask           = S5PC100_CLKSRC0_EPLL_MASK,
-        .sources        = &clk_src_epll,
-        .reg_source     = S5PC100_CLKSRC0,
+        .sources = &clk_src_epll,
+        .reg_src = { .reg = S5PC100_CLKSRC0, .shift = 8, .size = 1, },
 };
 
 /* HPLL */
@@ -426,7 +420,7 @@ static struct clk *clk_src_hpll_list[] = {
         [1] = &clk_fout_hpll,
 };
 
-static struct clk_sources clk_src_hpll = {
+static struct clksrc_sources clk_src_hpll = {
         .sources        = clk_src_hpll_list,
         .nr_sources     = ARRAY_SIZE(clk_src_hpll_list),
 };
@@ -436,10 +430,8 @@ static struct clksrc_clk clk_mout_hpll = {
                 .name           = "mout_hpll",
                 .id             = -1,
         },
-        .shift          = S5PC100_CLKSRC0_HPLL_SHIFT,
-        .mask           = S5PC100_CLKSRC0_HPLL_MASK,
-        .sources        = &clk_src_hpll,
-        .reg_source     = S5PC100_CLKSRC0,
+        .sources = &clk_src_hpll,
+        .reg_src = { .reg = S5PC100_CLKSRC0, .shift = 12, .size = 1, },
 };
 
 /* Peripherals */
@@ -454,190 +446,6 @@ static struct clksrc_clk clk_mout_hpll = {
  * have a common parent divisor so are not included here.
  */
 
-static inline struct clksrc_clk *to_clksrc(struct clk *clk)
-{
-        return container_of(clk, struct clksrc_clk, clk);
-}
-
-static unsigned long s5pc100_getrate_clksrc(struct clk *clk)
-{
-        struct clksrc_clk *sclk = to_clksrc(clk);
-        unsigned long rate = clk_get_rate(clk->parent);
-        u32 clkdiv = __raw_readl(sclk->reg_divider);
-
-        clkdiv >>= sclk->divider_shift;
-        clkdiv &= 0xf;
-        clkdiv++;
-
-        rate /= clkdiv;
-        return rate;
-}
-
-static int s5pc100_setrate_clksrc(struct clk *clk, unsigned long rate)
-{
-        struct clksrc_clk *sclk = to_clksrc(clk);
-        void __iomem *reg = sclk->reg_divider;
-        unsigned int div;
-        u32 val;
-
-        rate = clk_round_rate(clk, rate);
-        div = clk_get_rate(clk->parent) / rate;
-        if (div > 16)
-                return -EINVAL;
-
-        val = __raw_readl(reg);
-        val &= ~(0xf << sclk->divider_shift);
-        val |= (div - 1) << sclk->divider_shift;
-        __raw_writel(val, reg);
-
-        return 0;
-}
-
-static int s5pc100_setparent_clksrc(struct clk *clk, struct clk *parent)
-{
-        struct clksrc_clk *sclk = to_clksrc(clk);
-        struct clk_sources *srcs = sclk->sources;
-        u32 clksrc = __raw_readl(sclk->reg_source);
-        int src_nr = -1;
-        int ptr;
-
-        for (ptr = 0; ptr < srcs->nr_sources; ptr++)
-                if (srcs->sources[ptr] == parent) {
-                        src_nr = ptr;
-                        break;
-                }
-
-        if (src_nr >= 0) {
-                clksrc &= ~sclk->mask;
-                clksrc |= src_nr << sclk->shift;
-
-                __raw_writel(clksrc, sclk->reg_source);
-                return 0;
-        }
-
-        return -EINVAL;
-}
-
-static unsigned long s5pc100_roundrate_clksrc(struct clk *clk,
-                                              unsigned long rate)
-{
-        unsigned long parent_rate = clk_get_rate(clk->parent);
-        int div;
-
-        if (rate > parent_rate)
-                rate = parent_rate;
-        else {
-                div = rate / parent_rate;
-
-                if (div == 0)
-                        div = 1;
-                if (div > 16)
-                        div = 16;
-
-                rate = parent_rate / div;
-        }
-
-        return rate;
-}
-
-static struct clk *clkset_spi_list[] = {
-        &clk_mout_epll.clk,
-        &clk_dout_mpll2,
-        &clk_fin_epll,
-        &clk_mout_hpll.clk,
-};
-
-static struct clk_sources clkset_spi = {
-        .sources        = clkset_spi_list,
-        .nr_sources     = ARRAY_SIZE(clkset_spi_list),
-};
-
-static struct clksrc_clk clk_spi0 = {
-        .clk    = {
-                .name           = "spi_bus",
-                .id             = 0,
-                .ctrlbit        = S5PC100_CLKGATE_SCLK0_SPI0,
-                .enable         = s5pc100_sclk0_ctrl,
-                .set_parent     = s5pc100_setparent_clksrc,
-                .get_rate       = s5pc100_getrate_clksrc,
-                .set_rate       = s5pc100_setrate_clksrc,
-                .round_rate     = s5pc100_roundrate_clksrc,
-        },
-        .shift          = S5PC100_CLKSRC1_SPI0_SHIFT,
-        .mask           = S5PC100_CLKSRC1_SPI0_MASK,
-        .sources        = &clkset_spi,
-        .divider_shift  = S5PC100_CLKDIV2_SPI0_SHIFT,
-        .reg_divider    = S5PC100_CLKDIV2,
-        .reg_source     = S5PC100_CLKSRC1,
-};
-
-static struct clksrc_clk clk_spi1 = {
-        .clk    = {
-                .name           = "spi_bus",
-                .id             = 1,
-                .ctrlbit        = S5PC100_CLKGATE_SCLK0_SPI1,
-                .enable         = s5pc100_sclk0_ctrl,
-                .set_parent     = s5pc100_setparent_clksrc,
-                .get_rate       = s5pc100_getrate_clksrc,
-                .set_rate       = s5pc100_setrate_clksrc,
-                .round_rate     = s5pc100_roundrate_clksrc,
-        },
-        .shift          = S5PC100_CLKSRC1_SPI1_SHIFT,
-        .mask           = S5PC100_CLKSRC1_SPI1_MASK,
-        .sources        = &clkset_spi,
-        .divider_shift  = S5PC100_CLKDIV2_SPI1_SHIFT,
-        .reg_divider    = S5PC100_CLKDIV2,
-        .reg_source     = S5PC100_CLKSRC1,
-};
-
-static struct clksrc_clk clk_spi2 = {
-        .clk    = {
-                .name           = "spi_bus",
-                .id             = 2,
-                .ctrlbit        = S5PC100_CLKGATE_SCLK0_SPI2,
-                .enable         = s5pc100_sclk0_ctrl,
-                .set_parent     = s5pc100_setparent_clksrc,
-                .get_rate       = s5pc100_getrate_clksrc,
-                .set_rate       = s5pc100_setrate_clksrc,
-                .round_rate     = s5pc100_roundrate_clksrc,
-        },
-        .shift          = S5PC100_CLKSRC1_SPI2_SHIFT,
-        .mask           = S5PC100_CLKSRC1_SPI2_MASK,
-        .sources        = &clkset_spi,
-        .divider_shift  = S5PC100_CLKDIV2_SPI2_SHIFT,
-        .reg_divider    = S5PC100_CLKDIV2,
-        .reg_source     = S5PC100_CLKSRC1,
-};
-
-static struct clk *clkset_uart_list[] = {
-        &clk_mout_epll.clk,
-        &clk_dout_mpll,
-};
-
-static struct clk_sources clkset_uart = {
-        .sources        = clkset_uart_list,
-        .nr_sources     = ARRAY_SIZE(clkset_uart_list),
-};
-
-static struct clksrc_clk clk_uart_uclk1 = {
-        .clk    = {
-                .name           = "uclk1",
-                .id             = -1,
-                .ctrlbit        = S5PC100_CLKGATE_SCLK0_UART,
-                .enable         = s5pc100_sclk0_ctrl,
-                .set_parent     = s5pc100_setparent_clksrc,
-                .get_rate       = s5pc100_getrate_clksrc,
-                .set_rate       = s5pc100_setrate_clksrc,
-                .round_rate     = s5pc100_roundrate_clksrc,
-        },
-        .shift          = S5PC100_CLKSRC1_UART_SHIFT,
-        .mask           = S5PC100_CLKSRC1_UART_MASK,
-        .sources        = &clkset_uart,
-        .divider_shift  = S5PC100_CLKDIV2_UART_SHIFT,
-        .reg_divider    = S5PC100_CLKDIV2,
-        .reg_source     = S5PC100_CLKSRC1,
-};
-
 static struct clk clk_iis_cd0 = {
         .name           = "iis_cdclk0",
         .id             = -1,
@@ -672,28 +480,31 @@ static struct clk *clkset_audio0_list[] = {
         &clk_mout_hpll.clk,
 };
 
-static struct clk_sources clkset_audio0 = {
+static struct clksrc_sources clkset_audio0 = {
         .sources        = clkset_audio0_list,
         .nr_sources     = ARRAY_SIZE(clkset_audio0_list),
 };
 
-static struct clksrc_clk clk_audio0 = {
-        .clk    = {
-                .name           = "audio-bus",
-                .id             = 0,
-                .ctrlbit        = S5PC100_CLKGATE_SCLK1_AUDIO0,
-                .enable         = s5pc100_sclk1_ctrl,
-                .set_parent     = s5pc100_setparent_clksrc,
-                .get_rate       = s5pc100_getrate_clksrc,
-                .set_rate       = s5pc100_setrate_clksrc,
-                .round_rate     = s5pc100_roundrate_clksrc,
-        },
-        .shift          = S5PC100_CLKSRC3_AUDIO0_SHIFT,
-        .mask           = S5PC100_CLKSRC3_AUDIO0_MASK,
-        .sources        = &clkset_audio0,
-        .divider_shift  = S5PC100_CLKDIV4_AUDIO0_SHIFT,
-        .reg_divider    = S5PC100_CLKDIV4,
-        .reg_source     = S5PC100_CLKSRC3,
+static struct clk *clkset_spi_list[] = {
+        &clk_mout_epll.clk,
+        &clk_dout_mpll2,
+        &clk_fin_epll,
+        &clk_mout_hpll.clk,
+};
+
+static struct clksrc_sources clkset_spi = {
+        .sources        = clkset_spi_list,
+        .nr_sources     = ARRAY_SIZE(clkset_spi_list),
+};
+
+static struct clk *clkset_uart_list[] = {
+        &clk_mout_epll.clk,
+        &clk_dout_mpll,
+};
+
+static struct clksrc_sources clkset_uart = {
+        .sources        = clkset_uart_list,
+        .nr_sources     = ARRAY_SIZE(clkset_uart_list),
 };
 
 static struct clk *clkset_audio1_list[] = {
@@ -705,30 +516,11 @@ static struct clk *clkset_audio1_list[] = {
         &clk_mout_hpll.clk,
 };
 
-static struct clk_sources clkset_audio1 = {
+static struct clksrc_sources clkset_audio1 = {
         .sources        = clkset_audio1_list,
         .nr_sources     = ARRAY_SIZE(clkset_audio1_list),
 };
 
-static struct clksrc_clk clk_audio1 = {
-        .clk    = {
-                .name           = "audio-bus",
-                .id             = 1,
-                .ctrlbit        = S5PC100_CLKGATE_SCLK1_AUDIO1,
-                .enable         = s5pc100_sclk1_ctrl,
-                .set_parent     = s5pc100_setparent_clksrc,
-                .get_rate       = s5pc100_getrate_clksrc,
-                .set_rate       = s5pc100_setrate_clksrc,
-                .round_rate     = s5pc100_roundrate_clksrc,
-        },
-        .shift          = S5PC100_CLKSRC3_AUDIO1_SHIFT,
-        .mask           = S5PC100_CLKSRC3_AUDIO1_MASK,
-        .sources        = &clkset_audio1,
-        .divider_shift  = S5PC100_CLKDIV4_AUDIO1_SHIFT,
-        .reg_divider    = S5PC100_CLKDIV4,
-        .reg_source     = S5PC100_CLKSRC3,
-};
-
 static struct clk *clkset_audio2_list[] = {
         &clk_mout_epll.clk,
         &clk_dout_mpll,
@@ -737,52 +529,56 @@ static struct clk *clkset_audio2_list[] = {
         &clk_mout_hpll.clk,
 };
 
-static struct clk_sources clkset_audio2 = {
+static struct clksrc_sources clkset_audio2 = {
         .sources        = clkset_audio2_list,
         .nr_sources     = ARRAY_SIZE(clkset_audio2_list),
 };
 
-static struct clksrc_clk clk_audio2 = {
-        .clk    = {
-                .name           = "audio-bus",
-                .id             = 2,
-                .ctrlbit        = S5PC100_CLKGATE_SCLK1_AUDIO2,
-                .enable         = s5pc100_sclk1_ctrl,
-                .set_parent     = s5pc100_setparent_clksrc,
-                .get_rate       = s5pc100_getrate_clksrc,
-                .set_rate       = s5pc100_setrate_clksrc,
-                .round_rate     = s5pc100_roundrate_clksrc,
+static struct clksrc_clk clksrc_audio[] = {
+        {
+                .clk    = {
+                        .name           = "audio-bus",
+                        .id             = 0,
+                        .ctrlbit        = S5PC100_CLKGATE_SCLK1_AUDIO0,
+                        .enable         = s5pc100_sclk1_ctrl,
+                },
+                .sources = &clkset_audio0,
+                .reg_div = { .reg = S5PC100_CLKDIV4, .shift = 12, .size = 4, },
+                .reg_src = { .reg = S5PC100_CLKSRC3, .shift = 12, .size = 3, },
+        }, {
+                .clk    = {
+                        .name           = "audio-bus",
+                        .id             = 1,
+                        .ctrlbit        = S5PC100_CLKGATE_SCLK1_AUDIO1,
+                        .enable         = s5pc100_sclk1_ctrl,
+                },
+                .sources = &clkset_audio1,
+                .reg_div = { .reg = S5PC100_CLKDIV4, .shift = 16, .size = 4, },
+                .reg_src = { .reg = S5PC100_CLKSRC3, .shift = 16, .size = 3, },
+        }, {
+                .clk    = {
+                        .name           = "audio-bus",
+                        .id             = 2,
+                        .ctrlbit        = S5PC100_CLKGATE_SCLK1_AUDIO2,
+                        .enable         = s5pc100_sclk1_ctrl,
+                },
+                .sources = &clkset_audio2,
+                .reg_div = { .reg = S5PC100_CLKDIV4, .shift = 20, .size = 4, },
+                .reg_src = { .reg = S5PC100_CLKSRC3, .shift = 20, .size = 3, },
         },
-        .shift          = S5PC100_CLKSRC3_AUDIO2_SHIFT,
-        .mask           = S5PC100_CLKSRC3_AUDIO2_MASK,
-        .sources        = &clkset_audio2,
-        .divider_shift  = S5PC100_CLKDIV4_AUDIO2_SHIFT,
-        .reg_divider    = S5PC100_CLKDIV4,
-        .reg_source     = S5PC100_CLKSRC3,
 };
 
 static struct clk *clkset_spdif_list[] = {
-        &clk_audio0.clk,
-        &clk_audio1.clk,
-        &clk_audio2.clk,
+        &clksrc_audio[0].clk,
+        &clksrc_audio[1].clk,
+        &clksrc_audio[2].clk,
 };
 
-static struct clk_sources clkset_spdif = {
+static struct clksrc_sources clkset_spdif = {
         .sources        = clkset_spdif_list,
         .nr_sources     = ARRAY_SIZE(clkset_spdif_list),
 };
 
-static struct clksrc_clk clk_spdif = {
-        .clk    = {
-                .name           = "spdif",
-                .id             = -1,
-        },
-        .shift          = S5PC100_CLKSRC3_SPDIF_SHIFT,
-        .mask           = S5PC100_CLKSRC3_SPDIF_MASK,
-        .sources        = &clkset_spdif,
-        .reg_source     = S5PC100_CLKSRC3,
-};
-
 static struct clk *clkset_lcd_fimc_list[] = {
         &clk_mout_epll.clk,
         &clk_dout_mpll,
@@ -790,87 +586,11 @@ static struct clk *clkset_lcd_fimc_list[] = {
         &clk_vclk_54m,
 };
 
-static struct clk_sources clkset_lcd_fimc = {
+static struct clksrc_sources clkset_lcd_fimc = {
         .sources        = clkset_lcd_fimc_list,
         .nr_sources     = ARRAY_SIZE(clkset_lcd_fimc_list),
 };
 
-static struct clksrc_clk clk_lcd = {
-        .clk    = {
-                .name           = "lcd",
-                .id             = -1,
-                .ctrlbit        = S5PC100_CLKGATE_SCLK1_LCD,
-                .enable         = s5pc100_sclk1_ctrl,
-                .set_parent     = s5pc100_setparent_clksrc,
-                .get_rate       = s5pc100_getrate_clksrc,
-                .set_rate       = s5pc100_setrate_clksrc,
-                .round_rate     = s5pc100_roundrate_clksrc,
-        },
-        .shift          = S5PC100_CLKSRC2_LCD_SHIFT,
-        .mask           = S5PC100_CLKSRC2_LCD_MASK,
-        .sources        = &clkset_lcd_fimc,
-        .divider_shift  = S5PC100_CLKDIV3_LCD_SHIFT,
-        .reg_divider    = S5PC100_CLKDIV3,
-        .reg_source     = S5PC100_CLKSRC2,
-};
-
-static struct clksrc_clk clk_fimc0 = {
-        .clk    = {
-                .name           = "fimc",
-                .id             = 0,
-                .ctrlbit        = S5PC100_CLKGATE_SCLK1_FIMC0,
-                .enable         = s5pc100_sclk1_ctrl,
-                .set_parent     = s5pc100_setparent_clksrc,
-                .get_rate       = s5pc100_getrate_clksrc,
-                .set_rate       = s5pc100_setrate_clksrc,
-                .round_rate     = s5pc100_roundrate_clksrc,
-        },
-        .shift          = S5PC100_CLKSRC2_FIMC0_SHIFT,
-        .mask           = S5PC100_CLKSRC2_FIMC0_MASK,
-        .sources        = &clkset_lcd_fimc,
-        .divider_shift  = S5PC100_CLKDIV3_FIMC0_SHIFT,
-        .reg_divider    = S5PC100_CLKDIV3,
-        .reg_source     = S5PC100_CLKSRC2,
-};
-
-static struct clksrc_clk clk_fimc1 = {
-        .clk    = {
-                .name           = "fimc",
-                .id             = 1,
-                .ctrlbit        = S5PC100_CLKGATE_SCLK1_FIMC1,
-                .enable         = s5pc100_sclk1_ctrl,
-                .set_parent     = s5pc100_setparent_clksrc,
-                .get_rate       = s5pc100_getrate_clksrc,
-                .set_rate       = s5pc100_setrate_clksrc,
-                .round_rate     = s5pc100_roundrate_clksrc,
-        },
-        .shift          = S5PC100_CLKSRC2_FIMC1_SHIFT,
-        .mask           = S5PC100_CLKSRC2_FIMC1_MASK,
-        .sources        = &clkset_lcd_fimc,
-        .divider_shift  = S5PC100_CLKDIV3_FIMC1_SHIFT,
-        .reg_divider    = S5PC100_CLKDIV3,
-        .reg_source     = S5PC100_CLKSRC2,
-};
-
-static struct clksrc_clk clk_fimc2 = {
-        .clk    = {
-                .name           = "fimc",
-                .id             = 2,
-                .ctrlbit        = S5PC100_CLKGATE_SCLK1_FIMC2,
-                .enable         = s5pc100_sclk1_ctrl,
-                .set_parent     = s5pc100_setparent_clksrc,
-                .get_rate       = s5pc100_getrate_clksrc,
-                .set_rate       = s5pc100_setrate_clksrc,
-                .round_rate     = s5pc100_roundrate_clksrc,
-        },
-        .shift          = S5PC100_CLKSRC2_FIMC2_SHIFT,
-        .mask           = S5PC100_CLKSRC2_FIMC2_MASK,
-        .sources        = &clkset_lcd_fimc,
-        .divider_shift  = S5PC100_CLKDIV3_FIMC2_SHIFT,
-        .reg_divider    = S5PC100_CLKDIV3,
-        .reg_source     = S5PC100_CLKSRC2,
-};
-
 static struct clk *clkset_mmc_list[] = {
         &clk_mout_epll.clk,
         &clk_dout_mpll,
@@ -878,69 +598,11 @@ static struct clk *clkset_mmc_list[] = {
         &clk_mout_hpll.clk ,
 };
 
-static struct clk_sources clkset_mmc = {
+static struct clksrc_sources clkset_mmc = {
         .sources        = clkset_mmc_list,
         .nr_sources     = ARRAY_SIZE(clkset_mmc_list),
 };
 
-static struct clksrc_clk clk_mmc0 = {
-        .clk    = {
-                .name           = "mmc_bus",
-                .id             = 0,
-                .ctrlbit        = S5PC100_CLKGATE_SCLK0_MMC0,
-                .enable         = s5pc100_sclk0_ctrl,
-                .set_parent     = s5pc100_setparent_clksrc,
-                .get_rate       = s5pc100_getrate_clksrc,
-                .set_rate       = s5pc100_setrate_clksrc,
-                .round_rate     = s5pc100_roundrate_clksrc,
-        },
-        .shift          = S5PC100_CLKSRC2_MMC0_SHIFT,
-        .mask           = S5PC100_CLKSRC2_MMC0_MASK,
-        .sources        = &clkset_mmc,
-        .divider_shift  = S5PC100_CLKDIV3_MMC0_SHIFT,
-        .reg_divider    = S5PC100_CLKDIV3,
-        .reg_source     = S5PC100_CLKSRC2,
-};
-
-static struct clksrc_clk clk_mmc1 = {
-        .clk    = {
-                .name           = "mmc_bus",
-                .id             = 1,
-                .ctrlbit        = S5PC100_CLKGATE_SCLK0_MMC1,
-                .enable         = s5pc100_sclk0_ctrl,
-                .set_parent     = s5pc100_setparent_clksrc,
-                .get_rate       = s5pc100_getrate_clksrc,
-                .set_rate       = s5pc100_setrate_clksrc,
-                .round_rate     = s5pc100_roundrate_clksrc,
-        },
-        .shift          = S5PC100_CLKSRC2_MMC1_SHIFT,
-        .mask           = S5PC100_CLKSRC2_MMC1_MASK,
-        .sources        = &clkset_mmc,
-        .divider_shift  = S5PC100_CLKDIV3_MMC1_SHIFT,
-        .reg_divider    = S5PC100_CLKDIV3,
-        .reg_source     = S5PC100_CLKSRC2,
-};
-
-static struct clksrc_clk clk_mmc2 = {
-        .clk    = {
-                .name           = "mmc_bus",
-                .id             = 2,
-                .ctrlbit        = S5PC100_CLKGATE_SCLK0_MMC2,
-                .enable         = s5pc100_sclk0_ctrl,
-                .set_parent     = s5pc100_setparent_clksrc,
-                .get_rate       = s5pc100_getrate_clksrc,
-                .set_rate       = s5pc100_setrate_clksrc,
-                .round_rate     = s5pc100_roundrate_clksrc,
-        },
-        .shift          = S5PC100_CLKSRC2_MMC2_SHIFT,
-        .mask           = S5PC100_CLKSRC2_MMC2_MASK,
-        .sources        = &clkset_mmc,
-        .divider_shift  = S5PC100_CLKDIV3_MMC2_SHIFT,
-        .reg_divider    = S5PC100_CLKDIV3,
-        .reg_source     = S5PC100_CLKSRC2,
-};
-
-
 static struct clk *clkset_usbhost_list[] = {
         &clk_mout_epll.clk,
         &clk_dout_mpll,
@@ -948,28 +610,141 @@ static struct clk *clkset_usbhost_list[] = {
         &clk_48m,
 };
 
-static struct clk_sources clkset_usbhost = {
+static struct clksrc_sources clkset_usbhost = {
         .sources        = clkset_usbhost_list,
         .nr_sources     = ARRAY_SIZE(clkset_usbhost_list),
 };
 
-static struct clksrc_clk clk_usbhost = {
-        .clk    = {
-                .name           = "usbhost",
-                .id             = -1,
-                .ctrlbit        = S5PC100_CLKGATE_SCLK0_USBHOST,
-                .enable         = s5pc100_sclk0_ctrl,
-                .set_parent     = s5pc100_setparent_clksrc,
-                .get_rate       = s5pc100_getrate_clksrc,
-                .set_rate       = s5pc100_setrate_clksrc,
-                .round_rate     = s5pc100_roundrate_clksrc,
-        },
-        .shift          = S5PC100_CLKSRC1_UHOST_SHIFT,
-        .mask           = S5PC100_CLKSRC1_UHOST_MASK,
-        .sources        = &clkset_usbhost,
-        .divider_shift  = S5PC100_CLKDIV2_UHOST_SHIFT,
-        .reg_divider    = S5PC100_CLKDIV2,
-        .reg_source     = S5PC100_CLKSRC1,
+static struct clksrc_clk clksrc_clks[] = {
+        {
+                .clk    = {
+                        .name           = "spi_bus",
+                        .id             = 0,
+                        .ctrlbit        = S5PC100_CLKGATE_SCLK0_SPI0,
+                        .enable         = s5pc100_sclk0_ctrl,
+
+                },
+                .sources = &clkset_spi,
+                .reg_div = { .reg = S5PC100_CLKDIV2, .shift = 4, .size = 4, },
+                .reg_src = { .reg = S5PC100_CLKSRC1, .shift = 4, .size = 2, },
+        }, {
+                .clk    = {
+                        .name           = "spi_bus",
+                        .id             = 1,
+                        .ctrlbit        = S5PC100_CLKGATE_SCLK0_SPI1,
+                        .enable         = s5pc100_sclk0_ctrl,
+                },
+                .sources = &clkset_spi,
+                .reg_div = { .reg = S5PC100_CLKDIV2, .shift = 8, .size = 4, },
+                .reg_src = { .reg = S5PC100_CLKSRC1, .shift = 8, .size = 2, },
+        }, {
+                .clk    = {
+                        .name           = "spi_bus",
+                        .id             = 2,
+                        .ctrlbit        = S5PC100_CLKGATE_SCLK0_SPI2,
+                        .enable         = s5pc100_sclk0_ctrl,
+                },
+                .sources = &clkset_spi,
+                .reg_div = { .reg = S5PC100_CLKDIV2, .shift = 12, .size = 4, },
+                .reg_src = { .reg = S5PC100_CLKSRC1, .shift = 12, .size = 2, },
+        }, {
+                .clk    = {
+                        .name           = "uclk1",
+                        .id             = -1,
+                        .ctrlbit        = S5PC100_CLKGATE_SCLK0_UART,
+                        .enable         = s5pc100_sclk0_ctrl,
+                },
+                .sources = &clkset_uart,
+                .reg_div = { .reg = S5PC100_CLKDIV2, .shift = 0, .size = 3, },
+                .reg_src = { .reg = S5PC100_CLKSRC1, .shift = 0, .size = 1, },
+        }, {
+                .clk    = {
+                        .name           = "spdif",
+                        .id             = -1,
+                },
+                .sources        = &clkset_spdif,
+                .reg_src = { .reg = S5PC100_CLKSRC3, .shift = 24, .size = 2, },
+        }, {
+                .clk    = {
+                        .name           = "lcd",
+                        .id             = -1,
+                        .ctrlbit        = S5PC100_CLKGATE_SCLK1_LCD,
+                        .enable         = s5pc100_sclk1_ctrl,
+                },
+                .sources = &clkset_lcd_fimc,
+                .reg_div = { .reg = S5PC100_CLKDIV3, .shift = 12, .size = 4, },
+                .reg_src = { .reg = S5PC100_CLKSRC2, .shift = 12, .size = 2, },
+        }, {
+                .clk    = {
+                        .name           = "fimc",
+                        .id             = 0,
+                        .ctrlbit        = S5PC100_CLKGATE_SCLK1_FIMC0,
+                        .enable         = s5pc100_sclk1_ctrl,
+                },
+                .sources = &clkset_lcd_fimc,
+                .reg_div = { .reg = S5PC100_CLKDIV3, .shift = 16, .size = 4, },
+                .reg_src = { .reg = S5PC100_CLKSRC2, .shift = 16, .size = 2, },
+        }, {
+                .clk    = {
+                        .name           = "fimc",
+                        .id             = 1,
+                        .ctrlbit        = S5PC100_CLKGATE_SCLK1_FIMC1,
+                        .enable         = s5pc100_sclk1_ctrl,
+                },
+                .sources        = &clkset_lcd_fimc,
+                .reg_div = { .reg = S5PC100_CLKDIV3, .shift = 20, .size = 4, },
+                .reg_src = { .reg = S5PC100_CLKSRC2, .shift = 20, .size = 2, },
+        }, {
+                .clk    = {
+                        .name           = "fimc",
+                        .id             = 2,
+                        .ctrlbit        = S5PC100_CLKGATE_SCLK1_FIMC2,
+                        .enable         = s5pc100_sclk1_ctrl,
+                },
+                .sources = &clkset_lcd_fimc,
+                .reg_div = { .reg = S5PC100_CLKDIV3, .shift = 24, .size = 4, },
+                .reg_src = { .reg = S5PC100_CLKSRC2, .shift = 24, .size = 2, },
+        }, {
+                .clk    = {
+                        .name           = "mmc_bus",
+                        .id             = 0,
+                        .ctrlbit        = S5PC100_CLKGATE_SCLK0_MMC0,
+                        .enable         = s5pc100_sclk0_ctrl,
+                },
+                .sources = &clkset_mmc,
+                .reg_div = { .reg = S5PC100_CLKDIV3, .shift = 0, .size = 4, },
+                .reg_src = { .reg = S5PC100_CLKSRC2, .shift = 0, .size = 2, },
+        }, {
+                .clk    = {
+                        .name           = "mmc_bus",
+                        .id             = 1,
+                        .ctrlbit        = S5PC100_CLKGATE_SCLK0_MMC1,
+                        .enable         = s5pc100_sclk0_ctrl,
+                },
+                .sources = &clkset_mmc,
+                .reg_div = { .reg = S5PC100_CLKDIV3, .shift = 4, .size = 4, },
+                .reg_src = { .reg = S5PC100_CLKSRC2, .shift = 4, .size = 2, },
+        }, {
+                .clk    = {
+                        .name           = "mmc_bus",
+                        .id             = 2,
+                        .ctrlbit        = S5PC100_CLKGATE_SCLK0_MMC2,
+                        .enable         = s5pc100_sclk0_ctrl,
+                },
+                .sources        = &clkset_mmc,
+                .reg_div = { .reg = S5PC100_CLKDIV3, .shift = 8, .size = 4, },
+                .reg_src = { .reg = S5PC100_CLKSRC2, .shift = 8, .size = 2, },
+        }, {
+                .clk    = {
+                        .name           = "usbhost",
+                        .id             = -1,
+                        .ctrlbit        = S5PC100_CLKGATE_SCLK0_USBHOST,
+                        .enable         = s5pc100_sclk0_ctrl,
+                },
+                .sources = &clkset_usbhost,
+                .reg_div = { .reg = S5PC100_CLKDIV2, .shift = 20, .size = 4, },
+                .reg_src = { .reg = S5PC100_CLKSRC1, .shift = 20, .size = 2, },
+        }
 };
 
 /* Clock initialisation code */
@@ -981,45 +756,8 @@ static struct clksrc_clk *init_parents[] = {
         &clk_mout_onenand,
         &clk_mout_epll,
         &clk_mout_hpll,
-        &clk_spi0,
-        &clk_spi1,
-        &clk_spi2,
-        &clk_uart_uclk1,
-        &clk_audio0,
-        &clk_audio1,
-        &clk_audio2,
-        &clk_spdif,
-        &clk_lcd,
-        &clk_fimc0,
-        &clk_fimc1,
-        &clk_fimc2,
-        &clk_mmc0,
-        &clk_mmc1,
-        &clk_mmc2,
-        &clk_usbhost,
 };
 
-static void __init_or_cpufreq s5pc100_set_clksrc(struct clksrc_clk *clk)
-{
-        struct clk_sources *srcs = clk->sources;
-        u32 clksrc = __raw_readl(clk->reg_source);
-
-        clksrc &= clk->mask;
-        clksrc >>= clk->shift;
-
-        if (clksrc > srcs->nr_sources || !srcs->sources[clksrc]) {
-                printk(KERN_ERR "%s: bad source %d\n",
-                       clk->clk.name, clksrc);
-                return;
-        }
-
-        clk->clk.parent = srcs->sources[clksrc];
-
-        printk(KERN_INFO "%s: source is %s (%d), rate is %ld.%03ld MHz\n",
-                clk->clk.name, clk->clk.parent->name, clksrc,
-                print_mhz(clk_get_rate(&clk->clk)));
-}
-
 #define GET_DIV(clk, field) ((((clk) & field##_MASK) >> field##_SHIFT) + 1)
 
 void __init_or_cpufreq s5pc100_setup_clocks(void)
@@ -1083,17 +821,25 @@ void __init_or_cpufreq s5pc100_setup_clocks(void)
         clk_f.rate = armclk;
 
         for (ptr = 0; ptr < ARRAY_SIZE(init_parents); ptr++)
-                s5pc100_set_clksrc(init_parents[ptr]);
+                s3c_set_clksrc(init_parents[ptr], true);
+
+        for (ptr = 0; ptr < ARRAY_SIZE(clksrc_audio); ptr++)
+                s3c_set_clksrc(clksrc_audio + ptr, true);
+
+        for (ptr = 0; ptr < ARRAY_SIZE(clksrc_clks); ptr++)
+                s3c_set_clksrc(clksrc_clks + ptr, true);
 }
 
 static struct clk *clks[] __initdata = {
         &clk_ext_xtal_mux,
-        &clk_mout_apll.clk,
         &clk_dout_apll,
         &clk_dout_d0_bus,
         &clk_dout_pclkd0,
         &clk_dout_apll2,
+        &clk_mout_apll.clk,
         &clk_mout_mpll.clk,
+        &clk_mout_epll.clk,
+        &clk_mout_hpll.clk,
         &clk_mout_am.clk,
         &clk_dout_d1_bus,
         &clk_mout_onenand.clk,
@@ -1101,29 +847,12 @@ static struct clk *clks[] __initdata = {
         &clk_dout_mpll2,
         &clk_dout_cam,
         &clk_dout_mpll,
-        &clk_mout_epll.clk,
         &clk_fout_epll,
         &clk_iis_cd0,
         &clk_iis_cd1,
         &clk_iis_cd2,
         &clk_pcm_cd0,
         &clk_pcm_cd1,
-        &clk_spi0.clk,
-        &clk_spi1.clk,
-        &clk_spi2.clk,
-        &clk_uart_uclk1.clk,
-        &clk_audio0.clk,
-        &clk_audio1.clk,
-        &clk_audio2.clk,
-        &clk_spdif.clk,
-        &clk_lcd.clk,
-        &clk_fimc0.clk,
-        &clk_fimc1.clk,
-        &clk_fimc2.clk,
-        &clk_mmc0.clk,
-        &clk_mmc1.clk,
-        &clk_mmc2.clk,
-        &clk_usbhost.clk,
         &clk_arm,
 };
 
@@ -1141,4 +870,7 @@ void __init s5pc100_register_clocks(void)
                                clkp->name, ret);
                 }
         }
+
+        s3c_register_clksrc(clksrc_audio, ARRAY_SIZE(clksrc_audio));
+        s3c_register_clksrc(clksrc_clks, ARRAY_SIZE(clksrc_clks));
 }
diff --git a/arch/arm/plat-samsung/Kconfig b/arch/arm/plat-samsung/Kconfig
index 486a0d6301e7..d552c65fa1b0 100644
--- a/arch/arm/plat-samsung/Kconfig
+++ b/arch/arm/plat-samsung/Kconfig
@@ -7,11 +7,240 @@
 config PLAT_SAMSUNG
         bool
         depends on ARCH_S3C2410 || ARCH_S3C24A0 || ARCH_S3C64XX || ARCH_S5PC1XX
+        select NO_IOPORT
         default y
         help
           Base platform code for all Samsung SoC based systems
 
 if PLAT_SAMSUNG
 
+# boot configurations
+
+comment "Boot options"
+
+config S3C_BOOT_WATCHDOG
+        bool "S3C Initialisation watchdog"
+        depends on S3C2410_WATCHDOG
+        help
+          Say y to enable the watchdog during the kernel decompression
+          stage. If the kernel fails to uncompress, then the watchdog
+          will trigger a reset and the system should restart.
+
+config S3C_BOOT_ERROR_RESET
+        bool "S3C Reboot on decompression error"
+        help
+          Say y here to use the watchdog to reset the system if the
+          kernel decompressor detects an error during decompression.
+
+config S3C_BOOT_UART_FORCE_FIFO
+       bool "Force UART FIFO on during boot process"
+       default y
+       help
+         Say Y here to force the UART FIFOs on during the kernel
+         uncompressor
+
+
+config S3C_LOWLEVEL_UART_PORT
+        int "S3C UART to use for low-level messages"
+        default 0
+        help
+          Choice of which UART port to use for the low-level messages,
+          such as the `Uncompressing...` at start time. The value of
+          this configuration should be between zero and two. The port
+          must have been initialised by the boot-loader before use.
+
+# clock options
+
+config SAMSUNG_CLKSRC
+        bool
+        help
+          Select the clock code for the clksrc implementation
+          used by newer systems such as the S3C64XX.
+
+# options for IRQ support
+
+config SAMSUNG_IRQ_VIC_TIMER
+       bool
+       help
+         Internal configuration to build the VIC timer interrupt code.
+
+config SAMSUNG_IRQ_UART
+       bool
+       help
+         Internal configuration to build the IRQ UART demux code.
+
+# options for gpio configuration support
+
+config SAMSUNG_GPIOLIB_4BIT
+        bool
+        help
+          GPIOlib file contains the 4 bit modification functions for gpio
+          configuration. GPIOlib shall be compiled only for S3C64XX and S5P
+          series of processors.
+
+config S3C_GPIO_CFG_S3C24XX
+        bool
+        help
+          Internal configuration to enable S3C24XX style GPIO configuration
+          functions.
+
+config S3C_GPIO_CFG_S3C64XX
+        bool
+        help
+          Internal configuration to enable S3C64XX style GPIO configuration
+          functions.
+
+config S5P_GPIO_CFG_S5PC1XX
+        bool
+        help
+          Internal configuration to enable S5PC1XX style GPIO configuration
+          functions.
+
+config S3C_GPIO_PULL_UPDOWN
+        bool
+        help
+          Internal configuration to enable the correct GPIO pull helper
+
+config S3C_GPIO_PULL_DOWN
+        bool
+        help
+          Internal configuration to enable the correct GPIO pull helper
+
+config S3C_GPIO_PULL_UP
+        bool
+        help
+          Internal configuration to enable the correct GPIO pull helper
+
+config SAMSUNG_GPIO_EXTRA
+        int "Number of additional GPIO pins"
+        default 0
+        help
+          Use additional GPIO space in addition to the GPIO's the SOC
+          provides. This allows expanding the GPIO space for use with
+          GPIO expanders.
+
+config S3C_GPIO_SPACE
+        int "Space between gpio banks"
+        default 0
+        help
+          Add a number of spare GPIO entries between each bank for debugging
+          purposes. This allows any problems where an counter overflows from
+          one bank to another to be caught, at the expense of using a little
+          more memory.
+
+config S3C_GPIO_TRACK
+        bool
+        help
+          Internal configuration option to enable the s3c specific gpio
+          chip tracking if the platform requires it.
+
+# ADC driver
+
+config S3C_ADC
+        bool "ADC common driver support"
+        help
+          Core support for the ADC block found in the Samsung SoC systems
+          for drivers such as the touchscreen and hwmon to use to share
+          this resource.
+
+# device definitions to compile in
+
+config S3C_DEV_HSMMC
+        bool
+        help
+          Compile in platform device definitions for HSMMC code
+
+config S3C_DEV_HSMMC1
+        bool
+        help
+          Compile in platform device definitions for HSMMC channel 1
+
+config S3C_DEV_HSMMC2
+        bool
+        help
+          Compile in platform device definitions for HSMMC channel 2
+
+config S3C_DEV_I2C1
+        bool
+        help
+          Compile in platform device definitions for I2C channel 1
+
+config S3C_DEV_FB
+        bool
+        help
+          Compile in platform device definition for framebuffer
+
+config S3C_DEV_USB_HOST
+        bool
+        help
+          Compile in platform device definition for USB host.
+
+config S3C_DEV_USB_HSOTG
+        bool
+        help
+          Compile in platform device definition for USB high-speed OtG
+
+config S3C_DEV_NAND
+        bool
+        help
+          Compile in platform device definition for NAND controller
+
+config S3C64XX_DEV_SPI
+        bool
+        help
+          Compile in platform device definitions for S3C64XX's type
+          SPI controllers.
+
+# DMA
+
+config S3C_DMA
+        bool
+        help
+          Internal configuration for S3C DMA core
+
+comment "Power management"
+
+config SAMSUNG_PM_DEBUG
+        bool "S3C2410 PM Suspend debug"
+        depends on PM
+        help
+          Say Y here if you want verbose debugging from the PM Suspend and
+          Resume code. See <file:Documentation/arm/Samsung-S3C24XX/Suspend.txt>
+          for more information.
+
+config S3C_PM_DEBUG_LED_SMDK
+       bool "SMDK LED suspend/resume debugging"
+       depends on PM && (MACH_SMDK6410)
+       help
+         Say Y here to enable the use of the SMDK LEDs on the baseboard
+         for debugging of the state of the suspend and resume process.
+
+         Note, this currently only works for S3C64XX based SMDK boards.
+
+config SAMSUNG_PM_CHECK
+        bool "S3C2410 PM Suspend Memory CRC"
+        depends on PM && CRC32
+        help
+          Enable the PM code's memory area checksum over sleep. This option
+          will generate CRCs of all blocks of memory, and store them before
+          going to sleep. The blocks are then checked on resume for any
+          errors.
+
+          Note, this can take several seconds depending on memory size
+          and CPU speed.
+
+          See <file:Documentation/arm/Samsung-S3C24XX/Suspend.txt>
+
+config SAMSUNG_PM_CHECK_CHUNKSIZE
+        int "S3C2410 PM Suspend CRC Chunksize (KiB)"
+        depends on PM && SAMSUNG_PM_CHECK
+        default 64
+        help
+          Set the chunksize in Kilobytes of the CRC for checking memory
+          corruption over suspend and resume. A smaller value will mean that
+          the CRC data block will take more memory, but wil identify any
+          faults with better precision.
+
+          See <file:Documentation/arm/Samsung-S3C24XX/Suspend.txt>
 
 endif
diff --git a/arch/arm/plat-samsung/Makefile b/arch/arm/plat-samsung/Makefile
index 4478b9f7dc34..22c89d08f6e5 100644
--- a/arch/arm/plat-samsung/Makefile
+++ b/arch/arm/plat-samsung/Makefile
@@ -9,3 +9,48 @@ obj-m				:=
 obj-n                           := dummy.o
 obj-                            :=
 
+# Objects we always build independent of SoC choice
+
+obj-y                           += init.o
+obj-y                           += time.o
+obj-y                           += clock.o
+obj-y                           += pwm-clock.o
+obj-y                           += gpio.o
+obj-y                           += gpio-config.o
+
+obj-$(CONFIG_SAMSUNG_GPIOLIB_4BIT)      += gpiolib.o
+obj-$(CONFIG_SAMSUNG_CLKSRC)    += clock-clksrc.o
+
+obj-$(CONFIG_SAMSUNG_IRQ_UART)  += irq-uart.o
+obj-$(CONFIG_SAMSUNG_IRQ_VIC_TIMER) += irq-vic-timer.o
+
+# ADC
+
+obj-$(CONFIG_S3C_ADC)   += adc.o
+
+# devices
+
+obj-$(CONFIG_S3C_DEV_HSMMC)     += dev-hsmmc.o
+obj-$(CONFIG_S3C_DEV_HSMMC1)    += dev-hsmmc1.o
+obj-$(CONFIG_S3C_DEV_HSMMC2)    += dev-hsmmc2.o
+obj-y                           += dev-i2c0.o
+obj-$(CONFIG_S3C_DEV_I2C1)      += dev-i2c1.o
+obj-$(CONFIG_S3C_DEV_FB)        += dev-fb.o
+obj-y                           += dev-uart.o
+obj-$(CONFIG_S3C_DEV_USB_HOST)  += dev-usb.o
+obj-$(CONFIG_S3C_DEV_USB_HSOTG) += dev-usb-hsotg.o
+obj-$(CONFIG_S3C_DEV_NAND)      += dev-nand.o
+
+# DMA support
+
+obj-$(CONFIG_S3C_DMA)           += dma.o
+
+# PM support
+
+obj-$(CONFIG_PM)                += pm.o
+obj-$(CONFIG_PM)                += pm-gpio.o
+obj-$(CONFIG_SAMSUNG_PM_CHECK)  += pm-check.o
+
+# PWM support
+
+obj-$(CONFIG_HAVE_PWM)          += pwm.o
diff --git a/arch/arm/plat-s3c24xx/adc.c b/arch/arm/plat-samsung/adc.c
index ce47627f3368..0b5833b9ac5b 100644
--- a/arch/arm/plat-s3c24xx/adc.c
+++ b/arch/arm/plat-samsung/adc.c
@@ -1,10 +1,10 @@
-/* arch/arm/plat-s3c24xx/adc.c
+/* arch/arm/plat-samsung/adc.c
  *
  * Copyright (c) 2008 Simtec Electronics
  *      http://armlinux.simtec.co.uk/
  *      Ben Dooks <ben@simtec.co.uk>, <ben-linux@fluff.org>
  *
- * S3C24XX ADC device core
+ * Samsung ADC device core
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
@@ -37,6 +37,11 @@
  * action is required.
  */
 
+enum s3c_cpu_type {
+        TYPE_S3C24XX,
+        TYPE_S3C64XX
+};
+
 struct s3c_adc_client {
         struct platform_device  *pdev;
         struct list_head         pend;
@@ -257,12 +262,13 @@ static irqreturn_t s3c_adc_irq(int irq, void *pw)
 {
         struct adc_device *adc = pw;
         struct s3c_adc_client *client = adc->cur;
+        enum s3c_cpu_type cpu = platform_get_device_id(adc->pdev)->driver_data;
         unsigned long flags;
         unsigned data0, data1;
 
         if (!client) {
                 dev_warn(&adc->pdev->dev, "%s: no adc pending\n", __func__);
-                return IRQ_HANDLED;
+                goto exit;
         }
 
         data0 = readl(adc->regs + S3C2410_ADCDAT0);
@@ -271,9 +277,17 @@ static irqreturn_t s3c_adc_irq(int irq, void *pw)
 
         client->nr_samples--;
 
+        if (cpu == TYPE_S3C64XX) {
+                /* S3C64XX ADC resolution is 12-bit */
+                data0 &= 0xfff;
+                data1 &= 0xfff;
+        } else {
+                data0 &= 0x3ff;
+                data1 &= 0x3ff;
+        }
+
         if (client->convert_cb)
-                (client->convert_cb)(client, data0 & 0x3ff, data1 & 0x3ff,
-                                     &client->nr_samples);
+                (client->convert_cb)(client, data0, data1, &client->nr_samples);
 
         if (client->nr_samples > 0) {
                 /* fire another conversion for this */
@@ -289,6 +303,11 @@ static irqreturn_t s3c_adc_irq(int irq, void *pw)
                 local_irq_restore(flags);
         }
 
+exit:
+        if (cpu == TYPE_S3C64XX) {
+                /* Clear ADC interrupt */
+                writel(0, adc->regs + S3C64XX_ADCCLRINT);
+        }
         return IRQ_HANDLED;
 }
 
@@ -298,6 +317,7 @@ static int s3c_adc_probe(struct platform_device *pdev)
         struct adc_device *adc;
         struct resource *regs;
         int ret;
+        unsigned tmp;
 
         adc = kzalloc(sizeof(struct adc_device), GFP_KERNEL);
         if (adc == NULL) {
@@ -344,8 +364,12 @@ static int s3c_adc_probe(struct platform_device *pdev)
 
         clk_enable(adc->clk);
 
-        writel(adc->prescale | S3C2410_ADCCON_PRSCEN,
-               adc->regs + S3C2410_ADCCON);
+        tmp = adc->prescale | S3C2410_ADCCON_PRSCEN;
+        if (platform_get_device_id(pdev)->driver_data == TYPE_S3C64XX) {
+                /* Enable 12-bit ADC resolution */
+                tmp |= S3C64XX_ADCCON_RESSEL;
+        }
+        writel(tmp, adc->regs + S3C2410_ADCCON);
 
         dev_info(dev, "attached adc driver\n");
 
@@ -388,6 +412,7 @@ static int s3c_adc_suspend(struct platform_device *pdev, pm_message_t state)
         con |= S3C2410_ADCCON_STDBM;
         writel(con, adc->regs + S3C2410_ADCCON);
 
+        disable_irq(adc->irq);
         clk_disable(adc->clk);
 
         return 0;
@@ -398,6 +423,7 @@ static int s3c_adc_resume(struct platform_device *pdev)
         struct adc_device *adc = platform_get_drvdata(pdev);
 
         clk_enable(adc->clk);
+        enable_irq(adc->irq);
 
         writel(adc->prescale | S3C2410_ADCCON_PRSCEN,
                adc->regs + S3C2410_ADCCON);
@@ -410,9 +436,22 @@ static int s3c_adc_resume(struct platform_device *pdev)
 #define s3c_adc_resume NULL
 #endif
 
+static struct platform_device_id s3c_adc_driver_ids[] = {
+        {
+                .name           = "s3c24xx-adc",
+                .driver_data    = TYPE_S3C24XX,
+        }, {
+                .name           = "s3c64xx-adc",
+                .driver_data    = TYPE_S3C64XX,
+        },
+        { }
+};
+MODULE_DEVICE_TABLE(platform, s3c_adc_driver_ids);
+
 static struct platform_driver s3c_adc_driver = {
+        .id_table       = s3c_adc_driver_ids,
         .driver         = {
-                .name   = "s3c24xx-adc",
+                .name   = "s3c-adc",
                 .owner  = THIS_MODULE,
         },
         .probe          = s3c_adc_probe,
diff --git a/arch/arm/plat-samsung/clock-clksrc.c b/arch/arm/plat-samsung/clock-clksrc.c
new file mode 100644
index 000000000000..ae8b8507663f
--- /dev/null
+++ b/arch/arm/plat-samsung/clock-clksrc.c
@@ -0,0 +1,212 @@
+/* linux/arch/arm/plat-samsung/clock-clksrc.c
+ *
+ * Copyright 2008 Simtec Electronics
+ *      Ben Dooks <ben@simtec.co.uk>
+ *      http://armlinux.simtec.co.uk/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/list.h>
+#include <linux/errno.h>
+#include <linux/err.h>
+#include <linux/clk.h>
+#include <linux/sysdev.h>
+#include <linux/io.h>
+
+#include <plat/clock.h>
+#include <plat/clock-clksrc.h>
+#include <plat/cpu-freq.h>
+
+static inline struct clksrc_clk *to_clksrc(struct clk *clk)
+{
+        return container_of(clk, struct clksrc_clk, clk);
+}
+
+static inline u32 bit_mask(u32 shift, u32 nr_bits)
+{
+        u32 mask = 0xffffffff >> (32 - nr_bits);
+
+        return mask << shift;
+}
+
+static unsigned long s3c_getrate_clksrc(struct clk *clk)
+{
+        struct clksrc_clk *sclk = to_clksrc(clk);
+        unsigned long rate = clk_get_rate(clk->parent);
+        u32 clkdiv = __raw_readl(sclk->reg_div.reg);
+        u32 mask = bit_mask(sclk->reg_div.shift, sclk->reg_div.size);
+
+        clkdiv &= mask;
+        clkdiv >>= sclk->reg_div.shift;
+        clkdiv++;
+
+        rate /= clkdiv;
+        return rate;
+}
+
+static int s3c_setrate_clksrc(struct clk *clk, unsigned long rate)
+{
+        struct clksrc_clk *sclk = to_clksrc(clk);
+        void __iomem *reg = sclk->reg_div.reg;
+        unsigned int div;
+        u32 mask = bit_mask(sclk->reg_div.shift, sclk->reg_div.size);
+        u32 val;
+
+        rate = clk_round_rate(clk, rate);
+        div = clk_get_rate(clk->parent) / rate;
+        if (div > (1 << sclk->reg_div.size))
+                return -EINVAL;
+
+        val = __raw_readl(reg);
+        val &= ~mask;
+        val |= (div - 1) << sclk->reg_div.shift;
+        __raw_writel(val, reg);
+
+        return 0;
+}
+
+static int s3c_setparent_clksrc(struct clk *clk, struct clk *parent)
+{
+        struct clksrc_clk *sclk = to_clksrc(clk);
+        struct clksrc_sources *srcs = sclk->sources;
+        u32 clksrc = __raw_readl(sclk->reg_src.reg);
+        u32 mask = bit_mask(sclk->reg_src.shift, sclk->reg_src.size);
+        int src_nr = -1;
+        int ptr;
+
+        for (ptr = 0; ptr < srcs->nr_sources; ptr++)
+                if (srcs->sources[ptr] == parent) {
+                        src_nr = ptr;
+                        break;
+                }
+
+        if (src_nr >= 0) {
+                clk->parent = parent;
+
+                clksrc &= ~mask;
+                clksrc |= src_nr << sclk->reg_src.shift;
+
+                __raw_writel(clksrc, sclk->reg_src.reg);
+                return 0;
+        }
+
+        return -EINVAL;
+}
+
+static unsigned long s3c_roundrate_clksrc(struct clk *clk,
+                                              unsigned long rate)
+{
+        struct clksrc_clk *sclk = to_clksrc(clk);
+        unsigned long parent_rate = clk_get_rate(clk->parent);
+        int max_div = 1 << sclk->reg_div.size;
+        int div;
+
+        if (rate >= parent_rate)
+                rate = parent_rate;
+        else {
+                div = parent_rate / rate;
+                if (parent_rate % rate)
+                        div++;
+
+                if (div == 0)
+                        div = 1;
+                if (div > max_div)
+                        div = max_div;
+
+                rate = parent_rate / div;
+        }
+
+        return rate;
+}
+
+/* Clock initialisation code */
+
+void __init_or_cpufreq s3c_set_clksrc(struct clksrc_clk *clk, bool announce)
+{
+        struct clksrc_sources *srcs = clk->sources;
+        u32 mask = bit_mask(clk->reg_src.shift, clk->reg_src.size);
+        u32 clksrc;
+
+        if (!clk->reg_src.reg) {
+                if (!clk->clk.parent)
+                        printk(KERN_ERR "%s: no parent clock specified\n",
+                                clk->clk.name);
+                return;
+        }
+
+        clksrc = __raw_readl(clk->reg_src.reg);
+        clksrc &= mask;
+        clksrc >>= clk->reg_src.shift;
+
+        if (clksrc > srcs->nr_sources || !srcs->sources[clksrc]) {
+                printk(KERN_ERR "%s: bad source %d\n",
+                       clk->clk.name, clksrc);
+                return;
+        }
+
+        clk->clk.parent = srcs->sources[clksrc];
+
+        if (announce)
+                printk(KERN_INFO "%s: source is %s (%d), rate is %ld\n",
+                       clk->clk.name, clk->clk.parent->name, clksrc,
+                       clk_get_rate(&clk->clk));
+}
+
+static struct clk_ops clksrc_ops = {
+        .set_parent     = s3c_setparent_clksrc,
+        .get_rate       = s3c_getrate_clksrc,
+        .set_rate       = s3c_setrate_clksrc,
+        .round_rate     = s3c_roundrate_clksrc,
+};
+
+static struct clk_ops clksrc_ops_nodiv = {
+        .set_parent     = s3c_setparent_clksrc,
+};
+
+static struct clk_ops clksrc_ops_nosrc = {
+        .get_rate       = s3c_getrate_clksrc,
+        .set_rate       = s3c_setrate_clksrc,
+        .round_rate     = s3c_roundrate_clksrc,
+};
+
+void __init s3c_register_clksrc(struct clksrc_clk *clksrc, int size)
+{
+        int ret;
+
+        for (; size > 0; size--, clksrc++) {
+                if (!clksrc->reg_div.reg && !clksrc->reg_src.reg)
+                        printk(KERN_ERR "%s: clock %s has no registers set\n",
+                               __func__, clksrc->clk.name);
+
+                /* fill in the default functions */
+
+                if (!clksrc->clk.ops) {
+                        if (!clksrc->reg_div.reg)
+                                clksrc->clk.ops = &clksrc_ops_nodiv;
+                        else if (!clksrc->reg_src.reg)
+                                clksrc->clk.ops = &clksrc_ops_nosrc;
+                        else
+                                clksrc->clk.ops = &clksrc_ops;
+                }
+
+                /* setup the clocksource, but do not announce it
+                 * as it may be re-set by the setup routines
+                 * called after the rest of the clocks have been
+                 * registered
+                 */
+                s3c_set_clksrc(clksrc, false);
+
+                ret = s3c24xx_register_clock(&clksrc->clk);
+
+                if (ret < 0) {
+                        printk(KERN_ERR "%s: failed to register %s (%d)\n",
+                               __func__, clksrc->clk.name, ret);
+                }
+        }
+}
diff --git a/arch/arm/plat-s3c/clock.c b/arch/arm/plat-samsung/clock.c
index 619cfa82dcab..1b25c9d8c403 100644
--- a/arch/arm/plat-s3c/clock.c
+++ b/arch/arm/plat-samsung/clock.c
@@ -150,8 +150,8 @@ unsigned long clk_get_rate(struct clk *clk)
         if (clk->rate != 0)
                 return clk->rate;
 
-        if (clk->get_rate != NULL)
-                return (clk->get_rate)(clk);
+        if (clk->ops != NULL && clk->ops->get_rate != NULL)
+                return (clk->ops->get_rate)(clk);
 
         if (clk->parent != NULL)
                 return clk_get_rate(clk->parent);
@@ -161,8 +161,8 @@ unsigned long clk_get_rate(struct clk *clk)
 
 long clk_round_rate(struct clk *clk, unsigned long rate)
 {
-        if (!IS_ERR(clk) && clk->round_rate)
-                return (clk->round_rate)(clk, rate);
+        if (!IS_ERR(clk) && clk->ops && clk->ops->round_rate)
+                return (clk->ops->round_rate)(clk, rate);
 
         return rate;
 }
@@ -178,13 +178,14 @@ int clk_set_rate(struct clk *clk, unsigned long rate)
          * the clock may have been made this way by choice.
          */
 
-        WARN_ON(clk->set_rate == NULL);
+        WARN_ON(clk->ops == NULL);
+        WARN_ON(clk->ops && clk->ops->set_rate == NULL);
 
-        if (clk->set_rate == NULL)
+        if (clk->ops == NULL || clk->ops->set_rate == NULL)
                 return -EINVAL;
 
         spin_lock(&clocks_lock);
-        ret = (clk->set_rate)(clk, rate);
+        ret = (clk->ops->set_rate)(clk, rate);
         spin_unlock(&clocks_lock);
 
         return ret;
@@ -204,8 +205,8 @@ int clk_set_parent(struct clk *clk, struct clk *parent)
 
         spin_lock(&clocks_lock);
 
-        if (clk->set_parent)
-                ret = (clk->set_parent)(clk, parent);
+        if (clk->ops && clk->ops->set_parent)
+                ret = (clk->ops->set_parent)(clk, parent);
 
         spin_unlock(&clocks_lock);
 
@@ -224,12 +225,16 @@ EXPORT_SYMBOL(clk_set_parent);
 
 /* base clocks */
 
-static int clk_default_setrate(struct clk *clk, unsigned long rate)
+int clk_default_setrate(struct clk *clk, unsigned long rate)
 {
         clk->rate = rate;
         return 0;
 }
 
+struct clk_ops clk_ops_def_setrate = {
+        .set_rate       = clk_default_setrate,
+};
+
 struct clk clk_xtal = {
         .name           = "xtal",
         .id             = -1,
@@ -251,7 +256,7 @@ struct clk clk_epll = {
 struct clk clk_mpll = {
         .name           = "mpll",
         .id             = -1,
-        .set_rate       = clk_default_setrate,
+        .ops            = &clk_ops_def_setrate,
 };
 
 struct clk clk_upll = {
@@ -267,7 +272,6 @@ struct clk clk_f = {
         .rate           = 0,
         .parent         = &clk_mpll,
         .ctrlbit        = 0,
-        .set_rate       = clk_default_setrate,
 };
 
 struct clk clk_h = {
@@ -276,7 +280,7 @@ struct clk clk_h = {
         .rate           = 0,
         .parent         = NULL,
         .ctrlbit        = 0,
-        .set_rate       = clk_default_setrate,
+        .ops            = &clk_ops_def_setrate,
 };
 
 struct clk clk_p = {
@@ -285,7 +289,7 @@ struct clk clk_p = {
         .rate           = 0,
         .parent         = NULL,
         .ctrlbit        = 0,
-        .set_rate       = clk_default_setrate,
+        .ops            = &clk_ops_def_setrate,
 };
 
 struct clk clk_usb_bus = {
@@ -296,7 +300,6 @@ struct clk clk_usb_bus = {
 };
 
 
-
 struct clk s3c24xx_uclk = {
         .name           = "uclk",
         .id             = -1,
@@ -304,6 +307,12 @@ struct clk s3c24xx_uclk = {
 
 /* initialise the clock system */
 
+/**
+ * s3c24xx_register_clock() - register a clock
+ * @clk: The clock to register
+ *
+ * Add the specified clock to the list of clocks known by the system.
+ */
 int s3c24xx_register_clock(struct clk *clk)
 {
         if (clk->enable == NULL)
@@ -321,18 +330,52 @@ int s3c24xx_register_clock(struct clk *clk)
         return 0;
 }
 
+/**
+ * s3c24xx_register_clocks() - register an array of clock pointers
+ * @clks: Pointer to an array of struct clk pointers
+ * @nr_clks: The number of clocks in the @clks array.
+ *
+ * Call s3c24xx_register_clock() for all the clock pointers contained
+ * in the @clks list. Returns the number of failures.
+ */
 int s3c24xx_register_clocks(struct clk **clks, int nr_clks)
 {
         int fails = 0;
 
         for (; nr_clks > 0; nr_clks--, clks++) {
-                if (s3c24xx_register_clock(*clks) < 0)
+                if (s3c24xx_register_clock(*clks) < 0) {
+                        struct clk *clk = *clks;
+                        printk(KERN_ERR "%s: failed to register %p: %s\n",
+                               __func__, clk, clk->name);
                         fails++;
+                }
         }
 
         return fails;
 }
 
+/**
+ * s3c_register_clocks() - register an array of clocks
+ * @clkp: Pointer to the first clock in the array.
+ * @nr_clks: Number of clocks to register.
+ *
+ * Call s3c24xx_register_clock() on the @clkp array given, printing an
+ * error if it fails to register the clock (unlikely).
+ */
+void __init s3c_register_clocks(struct clk *clkp, int nr_clks)
+{
+        int ret;
+
+        for (; nr_clks > 0; nr_clks--, clkp++) {
+                ret = s3c24xx_register_clock(clkp);
+
+                if (ret < 0) {
+                        printk(KERN_ERR "Failed to register clock %s (%d)\n",
+                               clkp->name, ret);
+                }
+        }
+}
+
 /* initalise all the clocks */
 
 int __init s3c24xx_register_baseclocks(unsigned long xtal)
diff --git a/arch/arm/plat-s3c/dev-fb.c b/arch/arm/plat-samsung/dev-fb.c
index a90198fc4b0f..a90198fc4b0f 100644
--- a/arch/arm/plat-s3c/dev-fb.c
+++ b/arch/arm/plat-samsung/dev-fb.c
diff --git a/arch/arm/plat-s3c/dev-hsmmc.c b/arch/arm/plat-samsung/dev-hsmmc.c
index 4c05b39810e2..4c05b39810e2 100644
--- a/arch/arm/plat-s3c/dev-hsmmc.c
+++ b/arch/arm/plat-samsung/dev-hsmmc.c
diff --git a/arch/arm/plat-s3c/dev-hsmmc1.c b/arch/arm/plat-samsung/dev-hsmmc1.c
index e49bc4cd0ee6..e49bc4cd0ee6 100644
--- a/arch/arm/plat-s3c/dev-hsmmc1.c
+++ b/arch/arm/plat-samsung/dev-hsmmc1.c
diff --git a/arch/arm/plat-s3c/dev-hsmmc2.c b/arch/arm/plat-samsung/dev-hsmmc2.c
index 824580bc0e06..824580bc0e06 100644
--- a/arch/arm/plat-s3c/dev-hsmmc2.c
+++ b/arch/arm/plat-samsung/dev-hsmmc2.c
diff --git a/arch/arm/plat-s3c/dev-i2c0.c b/arch/arm/plat-samsung/dev-i2c0.c
index 4c761529b949..4c761529b949 100644
--- a/arch/arm/plat-s3c/dev-i2c0.c
+++ b/arch/arm/plat-samsung/dev-i2c0.c
diff --git a/arch/arm/plat-s3c/dev-i2c1.c b/arch/arm/plat-samsung/dev-i2c1.c
index d44f79110506..d44f79110506 100644
--- a/arch/arm/plat-s3c/dev-i2c1.c
+++ b/arch/arm/plat-samsung/dev-i2c1.c
diff --git a/arch/arm/plat-s3c/dev-nand.c b/arch/arm/plat-samsung/dev-nand.c
index a52fb6cf618f..a52fb6cf618f 100644
--- a/arch/arm/plat-s3c/dev-nand.c
+++ b/arch/arm/plat-samsung/dev-nand.c
diff --git a/arch/arm/plat-samsung/dev-uart.c b/arch/arm/plat-samsung/dev-uart.c
new file mode 100644
index 000000000000..3776cd952450
--- /dev/null
+++ b/arch/arm/plat-samsung/dev-uart.c
@@ -0,0 +1,44 @@
+/* linux/arch/arm/plat-samsung/dev-uart.c
+ *      originally from arch/arm/plat-s3c24xx/devs.c
+ *x
+ * Copyright (c) 2004 Simtec Electronics
+ *      Ben Dooks <ben@simtec.co.uk>
+ *
+ * Base S3C24XX platform device definitions
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+*/
+
+#include <linux/kernel.h>
+#include <linux/platform_device.h>
+
+/* uart devices */
+
+static struct platform_device s3c24xx_uart_device0 = {
+        .id             = 0,
+};
+
+static struct platform_device s3c24xx_uart_device1 = {
+        .id             = 1,
+};
+
+static struct platform_device s3c24xx_uart_device2 = {
+        .id             = 2,
+};
+
+static struct platform_device s3c24xx_uart_device3 = {
+        .id             = 3,
+};
+
+struct platform_device *s3c24xx_uart_src[4] = {
+        &s3c24xx_uart_device0,
+        &s3c24xx_uart_device1,
+        &s3c24xx_uart_device2,
+        &s3c24xx_uart_device3,
+};
+
+struct platform_device *s3c24xx_uart_devs[4] = {
+};
diff --git a/arch/arm/plat-s3c/dev-usb-hsotg.c b/arch/arm/plat-samsung/dev-usb-hsotg.c
index e2f604b51c86..33a844ab6917 100644
--- a/arch/arm/plat-s3c/dev-usb-hsotg.c
+++ b/arch/arm/plat-samsung/dev-usb-hsotg.c
@@ -14,6 +14,7 @@
 #include <linux/kernel.h>
 #include <linux/string.h>
 #include <linux/platform_device.h>
+#include <linux/dma-mapping.h>
 
 #include <mach/irqs.h>
 #include <mach/map.h>
@@ -33,9 +34,15 @@ static struct resource s3c_usb_hsotg_resources[] = {
         },
 };
 
+static u64 s3c_hsotg_dmamask = DMA_BIT_MASK(32);
+
 struct platform_device s3c_device_usb_hsotg = {
         .name           = "s3c-hsotg",
         .id             = -1,
         .num_resources  = ARRAY_SIZE(s3c_usb_hsotg_resources),
         .resource       = s3c_usb_hsotg_resources,
+        .dev            = {
+                .dma_mask               = &s3c_hsotg_dmamask,
+                .coherent_dma_mask      = DMA_BIT_MASK(32),
+        },
 };
diff --git a/arch/arm/plat-s3c/dev-usb.c b/arch/arm/plat-samsung/dev-usb.c
index 2ee85abed6d9..88165657fa53 100644
--- a/arch/arm/plat-s3c/dev-usb.c
+++ b/arch/arm/plat-samsung/dev-usb.c
@@ -19,7 +19,7 @@
 #include <mach/map.h>
 
 #include <plat/devs.h>
-
+#include <plat/usb-control.h>
 
 static struct resource s3c_usb_resource[] = {
         [0] = {
@@ -36,7 +36,7 @@ static struct resource s3c_usb_resource[] = {
 
 static u64 s3c_device_usb_dmamask = 0xffffffffUL;
 
-struct platform_device s3c_device_usb = {
+struct platform_device s3c_device_ohci = {
         .name             = "s3c2410-ohci",
         .id               = -1,
         .num_resources    = ARRAY_SIZE(s3c_usb_resource),
@@ -47,4 +47,23 @@ struct platform_device s3c_device_usb = {
         }
 };
 
-EXPORT_SYMBOL(s3c_device_usb);
+EXPORT_SYMBOL(s3c_device_ohci);
+
+/**
+ * s3c_ohci_set_platdata - initialise OHCI device platform data
+ * @info: The platform data.
+ *
+ * This call copies the @info passed in and sets the device .platform_data
+ * field to that copy. The @info is copied so that the original can be marked
+ * __initdata.
+ */
+void __init s3c_ohci_set_platdata(struct s3c2410_hcd_info *info)
+{
+        struct s3c2410_hcd_info *npd;
+
+        npd = kmemdup(info, sizeof(struct s3c2410_hcd_info), GFP_KERNEL);
+        if (!npd)
+                printk(KERN_ERR "%s: no memory for platform data\n", __func__);
+
+        s3c_device_ohci.dev.platform_data = npd;
+}
diff --git a/arch/arm/plat-s3c/dma.c b/arch/arm/plat-samsung/dma.c
index a995850cd9d5..cb459dd95459 100644
--- a/arch/arm/plat-s3c/dma.c
+++ b/arch/arm/plat-samsung/dma.c
@@ -1,4 +1,4 @@
-/* linux/arch/arm/plat-s3c/dma.c
+/* linux/arch/arm/plat-samsung/dma.c
  *
  * Copyright (c) 2003-2009 Simtec Electronics
  *      Ben Dooks <ben@simtec.co.uk>
@@ -20,8 +20,6 @@ struct s3c2410_dma_buf;
 #include <mach/dma.h>
 #include <mach/irqs.h>
 
-#include <plat/dma-plat.h>
-
 /* dma channel state information */
 struct s3c2410_dma_chan s3c2410_chans[S3C_DMA_CHANNELS];
 struct s3c2410_dma_chan *s3c_dma_chan_map[DMACH_MAX];
diff --git a/arch/arm/plat-s3c/gpio-config.c b/arch/arm/plat-samsung/gpio-config.c
index 456969b6fa0d..44a84e896546 100644
--- a/arch/arm/plat-s3c/gpio-config.c
+++ b/arch/arm/plat-samsung/gpio-config.c
@@ -17,7 +17,7 @@
 #include <linux/gpio.h>
 #include <linux/io.h>
 
-#include <mach/gpio-core.h>
+#include <plat/gpio-core.h>
 #include <plat/gpio-cfg.h>
 #include <plat/gpio-cfg-helpers.h>
 
diff --git a/arch/arm/plat-s3c/gpio.c b/arch/arm/plat-samsung/gpio.c
index 5ff24e0f9f89..28d2ab8a08db 100644
--- a/arch/arm/plat-s3c/gpio.c
+++ b/arch/arm/plat-samsung/gpio.c
@@ -16,7 +16,7 @@
 #include <linux/io.h>
 #include <linux/gpio.h>
 
-#include <mach/gpio-core.h>
+#include <plat/gpio-core.h>
 
 #ifdef CONFIG_S3C_GPIO_TRACK
 struct s3c_gpio_chip *s3c_gpios[S3C_GPIO_END];
diff --git a/arch/arm/plat-samsung/gpiolib.c b/arch/arm/plat-samsung/gpiolib.c
new file mode 100644
index 000000000000..8a8ba8bc1d96
--- /dev/null
+++ b/arch/arm/plat-samsung/gpiolib.c
@@ -0,0 +1,199 @@
+/* arch/arm/plat-samsung/gpiolib.c
+ *
+ * Copyright 2008 Openmoko, Inc.
+ * Copyright 2008 Simtec Electronics
+ *      Ben Dooks <ben@simtec.co.uk>
+ *      http://armlinux.simtec.co.uk/
+ *
+ * Copyright (c) 2009 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * SAMSUNG - GPIOlib support
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/kernel.h>
+#include <linux/irq.h>
+#include <linux/io.h>
+#include <mach/gpio.h>
+#include <plat/gpio-core.h>
+#include <plat/gpio-cfg.h>
+#include <plat/gpio-cfg-helpers.h>
+
+#ifndef DEBUG_GPIO
+#define gpio_dbg(x...) do { } while (0)
+#else
+#define gpio_dbg(x...) printk(KERN_DEBUG x)
+#endif
+
+/* The samsung_gpiolib_4bit routines are to control the gpio banks where
+ * the gpio configuration register (GPxCON) has 4 bits per GPIO, as the
+ * following example:
+ *
+ * base + 0x00: Control register, 4 bits per gpio
+ *              gpio n: 4 bits starting at (4*n)
+ *              0000 = input, 0001 = output, others mean special-function
+ * base + 0x04: Data register, 1 bit per gpio
+ *              bit n: data bit n
+ *
+ * Note, since the data register is one bit per gpio and is at base + 0x4
+ * we can use s3c_gpiolib_get and s3c_gpiolib_set to change the state of
+ * the output.
+*/
+
+static int samsung_gpiolib_4bit_input(struct gpio_chip *chip,
+                                      unsigned int offset)
+{
+        struct s3c_gpio_chip *ourchip = to_s3c_gpio(chip);
+        void __iomem *base = ourchip->base;
+        unsigned long con;
+
+        con = __raw_readl(base + GPIOCON_OFF);
+        con &= ~(0xf << con_4bit_shift(offset));
+        __raw_writel(con, base + GPIOCON_OFF);
+
+        gpio_dbg("%s: %p: CON now %08lx\n", __func__, base, con);
+
+        return 0;
+}
+
+static int samsung_gpiolib_4bit_output(struct gpio_chip *chip,
+                                       unsigned int offset, int value)
+{
+        struct s3c_gpio_chip *ourchip = to_s3c_gpio(chip);
+        void __iomem *base = ourchip->base;
+        unsigned long con;
+        unsigned long dat;
+
+        con = __raw_readl(base + GPIOCON_OFF);
+        con &= ~(0xf << con_4bit_shift(offset));
+        con |= 0x1 << con_4bit_shift(offset);
+
+        dat = __raw_readl(base + GPIODAT_OFF);
+
+        if (value)
+                dat |= 1 << offset;
+        else
+                dat &= ~(1 << offset);
+
+        __raw_writel(dat, base + GPIODAT_OFF);
+        __raw_writel(con, base + GPIOCON_OFF);
+        __raw_writel(dat, base + GPIODAT_OFF);
+
+        gpio_dbg("%s: %p: CON %08lx, DAT %08lx\n", __func__, base, con, dat);
+
+        return 0;
+}
+
+/* The next set of routines are for the case where the GPIO configuration
+ * registers are 4 bits per GPIO but there is more than one register (the
+ * bank has more than 8 GPIOs.
+ *
+ * This case is the similar to the 4 bit case, but the registers are as
+ * follows:
+ *
+ * base + 0x00: Control register, 4 bits per gpio (lower 8 GPIOs)
+ *              gpio n: 4 bits starting at (4*n)
+ *              0000 = input, 0001 = output, others mean special-function
+ * base + 0x04: Control register, 4 bits per gpio (up to 8 additions GPIOs)
+ *              gpio n: 4 bits starting at (4*n)
+ *              0000 = input, 0001 = output, others mean special-function
+ * base + 0x08: Data register, 1 bit per gpio
+ *              bit n: data bit n
+ *
+ * To allow us to use the s3c_gpiolib_get and s3c_gpiolib_set routines we
+ * store the 'base + 0x4' address so that these routines see the data
+ * register at ourchip->base + 0x04.
+ */
+
+static int samsung_gpiolib_4bit2_input(struct gpio_chip *chip,
+                                       unsigned int offset)
+{
+        struct s3c_gpio_chip *ourchip = to_s3c_gpio(chip);
+        void __iomem *base = ourchip->base;
+        void __iomem *regcon = base;
+        unsigned long con;
+
+        if (offset > 7)
+                offset -= 8;
+        else
+                regcon -= 4;
+
+        con = __raw_readl(regcon);
+        con &= ~(0xf << con_4bit_shift(offset));
+        __raw_writel(con, regcon);
+
+        gpio_dbg("%s: %p: CON %08lx\n", __func__, base, con);
+
+        return 0;
+}
+
+static int samsung_gpiolib_4bit2_output(struct gpio_chip *chip,
+                                        unsigned int offset, int value)
+{
+        struct s3c_gpio_chip *ourchip = to_s3c_gpio(chip);
+        void __iomem *base = ourchip->base;
+        void __iomem *regcon = base;
+        unsigned long con;
+        unsigned long dat;
+        unsigned con_offset = offset;
+
+        if (con_offset > 7)
+                con_offset -= 8;
+        else
+                regcon -= 4;
+
+        con = __raw_readl(regcon);
+        con &= ~(0xf << con_4bit_shift(con_offset));
+        con |= 0x1 << con_4bit_shift(con_offset);
+
+        dat = __raw_readl(base + GPIODAT_OFF);
+
+        if (value)
+                dat |= 1 << offset;
+        else
+                dat &= ~(1 << offset);
+
+        __raw_writel(dat, base + GPIODAT_OFF);
+        __raw_writel(con, regcon);
+        __raw_writel(dat, base + GPIODAT_OFF);
+
+        gpio_dbg("%s: %p: CON %08lx, DAT %08lx\n", __func__, base, con, dat);
+
+        return 0;
+}
+
+void __init samsung_gpiolib_add_4bit(struct s3c_gpio_chip *chip)
+{
+        chip->chip.direction_input = samsung_gpiolib_4bit_input;
+        chip->chip.direction_output = samsung_gpiolib_4bit_output;
+        chip->pm = __gpio_pm(&s3c_gpio_pm_4bit);
+}
+
+void __init samsung_gpiolib_add_4bit2(struct s3c_gpio_chip *chip)
+{
+        chip->chip.direction_input = samsung_gpiolib_4bit2_input;
+        chip->chip.direction_output = samsung_gpiolib_4bit2_output;
+        chip->pm = __gpio_pm(&s3c_gpio_pm_4bit);
+}
+
+void __init samsung_gpiolib_add_4bit_chips(struct s3c_gpio_chip *chip,
+                                           int nr_chips)
+{
+        for (; nr_chips > 0; nr_chips--, chip++) {
+                samsung_gpiolib_add_4bit(chip);
+                s3c_gpiolib_add(chip);
+        }
+}
+
+void __init samsung_gpiolib_add_4bit2_chips(struct s3c_gpio_chip *chip,
+                                            int nr_chips)
+{
+        for (; nr_chips > 0; nr_chips--, chip++) {
+                samsung_gpiolib_add_4bit2(chip);
+                s3c_gpiolib_add(chip);
+        }
+}
diff --git a/arch/arm/plat-s3c/include/plat/adc.h b/arch/arm/plat-samsung/include/plat/adc.h
index 5f3b1cd53b90..e8382c7be10b 100644
--- a/arch/arm/plat-s3c/include/plat/adc.h
+++ b/arch/arm/plat-samsung/include/plat/adc.h
@@ -1,10 +1,10 @@
-/* arch/arm/plat-s3c/include/plat/adc.h
+/* arch/arm/plat-samsung/include/plat/adc.h
  *
  * Copyright (c) 2008 Simtec Electronics
  *      http://armlinux.simnte.co.uk/
  *      Ben Dooks <ben@simtec.co.uk>
  *
- * S3C24XX ADC driver information
+ * S3C ADC driver information
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License version 2 as
diff --git a/arch/arm/plat-s3c/include/plat/audio.h b/arch/arm/plat-samsung/include/plat/audio.h
index f22d23bb6271..e32f9edfd4b7 100644
--- a/arch/arm/plat-s3c/include/plat/audio.h
+++ b/arch/arm/plat-samsung/include/plat/audio.h
@@ -1,4 +1,4 @@
-/* arch/arm/plat-s3c/include/plat/audio.h
+/* arch/arm/plat-samsung/include/plat/audio.h
  *
  * Copyright (c) 2009 Samsung Electronics Co. Ltd
  * Author: Jaswinder Singh <jassi.brar@samsung.com>
@@ -8,6 +8,14 @@
  * published by the Free Software Foundation.
  */
 
+/* The machine init code calls s3c*_ac97_setup_gpio with
+ * one of these defines in order to select appropriate bank
+ * of GPIO for AC97 pins
+ */
+#define S3C64XX_AC97_GPD  0
+#define S3C64XX_AC97_GPE  1
+extern void s3c64xx_ac97_setup_gpio(int);
+
 /**
  * struct s3c_audio_pdata - common platform data for audio device drivers
  * @cfg_gpio: Callback function to setup mux'ed pins in I2S/PCM/AC97 mode
diff --git a/arch/arm/plat-samsung/include/plat/clock-clksrc.h b/arch/arm/plat-samsung/include/plat/clock-clksrc.h
new file mode 100644
index 000000000000..50a8ca7c3760
--- /dev/null
+++ b/arch/arm/plat-samsung/include/plat/clock-clksrc.h
@@ -0,0 +1,83 @@
+/* linux/arch/arm/plat-samsung/include/plat/clock-clksrc.h
+ *
+ * Parts taken from arch/arm/plat-s3c64xx/clock.c
+ *      Copyright 2008 Openmoko, Inc.
+ *      Copyright 2008 Simtec Electronics
+ *              Ben Dooks <ben@simtec.co.uk>
+ *              http://armlinux.simtec.co.uk/
+ *
+ * Copyright 2009 Ben Dooks <ben-linux@fluff.org>
+ * Copyright 2009 Harald Welte
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+/**
+ * struct clksrc_sources - list of sources for a given clock
+ * @sources: array of pointers to clocks
+ * @nr_sources: The size of @sources
+ */
+struct clksrc_sources {
+        unsigned int    nr_sources;
+        struct clk      **sources;
+};
+
+/**
+ * struct clksrc_reg - register definition for clock control bits
+ * @reg: pointer to the register in virtual memory.
+ * @shift: the shift in bits to where the bitfield is.
+ * @size: the size in bits of the bitfield.
+ *
+ * This specifies the size and position of the bits we are interested
+ * in within the register specified by @reg.
+ */
+struct clksrc_reg {
+        void __iomem            *reg;
+        unsigned short          shift;
+        unsigned short          size;
+};
+
+/**
+ * struct clksrc_clk - class of clock for newer style samsung devices.
+ * @clk: the standard clock representation
+ * @sources: the sources for this clock
+ * @reg_src: the register definition for selecting the clock's source
+ * @reg_div: the register definition for the clock's output divisor
+ *
+ * This clock implements the features required by the newer SoCs where
+ * the standard clock block provides an input mux and a post-mux divisor
+ * to provide the periperhal's clock.
+ *
+ * The array of @sources provides the mapping of mux position to the
+ * clock, and @reg_src shows the code where to modify to change the mux
+ * position. The @reg_div defines how to change the divider settings on
+ * the output.
+ */
+struct clksrc_clk {
+        struct clk              clk;
+        struct clksrc_sources   *sources;
+
+        struct clksrc_reg       reg_src;
+        struct clksrc_reg       reg_div;
+};
+
+/**
+ * s3c_set_clksrc() - setup the clock from the register settings
+ * @clk: The clock to setup.
+ * @announce: true to announce the setting to printk().
+ *
+ * Setup the clock from the current register settings, for when the
+ * kernel boots or if it is resuming from a possibly unknown state.
+ */
+extern void s3c_set_clksrc(struct clksrc_clk *clk, bool announce);
+
+/**
+ * s3c_register_clksrc() register clocks from an array of clksrc clocks
+ * @srcs: The array of clocks to register
+ * @size: The size of the @srcs array.
+ *
+ * Initialise and register the array of clocks described by @srcs.
+ */
+extern void s3c_register_clksrc(struct clksrc_clk *srcs, int size);
diff --git a/arch/arm/plat-s3c/include/plat/clock.h b/arch/arm/plat-samsung/include/plat/clock.h
index d86af84b5b8c..60b62692ac7a 100644
--- a/arch/arm/plat-s3c/include/plat/clock.h
+++ b/arch/arm/plat-samsung/include/plat/clock.h
@@ -11,6 +11,30 @@
 
 #include <linux/spinlock.h>
 
+struct clk;
+
+/**
+ * struct clk_ops - standard clock operations
+ * @set_rate: set the clock rate, see clk_set_rate().
+ * @get_rate: get the clock rate, see clk_get_rate().
+ * @round_rate: round a given clock rate, see clk_round_rate().
+ * @set_parent: set the clock's parent, see clk_set_parent().
+ *
+ * Group the common clock implementations together so that we
+ * don't have to keep setting the same fiels again. We leave
+ * enable in struct clk.
+ *
+ * Adding an extra layer of indirection into the process should
+ * not be a problem as it is unlikely these operations are going
+ * to need to be called quickly.
+ */
+struct clk_ops {
+        int                 (*set_rate)(struct clk *c, unsigned long rate);
+        unsigned long       (*get_rate)(struct clk *c);
+        unsigned long       (*round_rate)(struct clk *c, unsigned long rate);
+        int                 (*set_parent)(struct clk *c, struct clk *parent);
+};
+
 struct clk {
         struct list_head      list;
         struct module        *owner;
@@ -21,11 +45,8 @@ struct clk {
         unsigned long         rate;
         unsigned long         ctrlbit;
 
+        struct clk_ops          *ops;
         int                 (*enable)(struct clk *, int enable);
-        int                 (*set_rate)(struct clk *c, unsigned long rate);
-        unsigned long       (*get_rate)(struct clk *c);
-        unsigned long       (*round_rate)(struct clk *c, unsigned long rate);
-        int                 (*set_parent)(struct clk *c, struct clk *parent);
 };
 
 /* other clocks which may be registered by board support */
@@ -54,6 +75,9 @@ extern struct clk clk_h2;
 extern struct clk clk_27m;
 extern struct clk clk_48m;
 
+extern int clk_default_setrate(struct clk *clk, unsigned long rate);
+extern struct clk_ops clk_ops_def_setrate;
+
 /* exports for arch/arm/mach-s3c2410
  *
  * Please DO NOT use these outside of arch/arm/mach-s3c2410
@@ -66,9 +90,11 @@ extern int s3c2410_clkcon_enable(struct clk *clk, int enable);
 extern int s3c24xx_register_clock(struct clk *clk);
 extern int s3c24xx_register_clocks(struct clk **clk, int nr_clks);
 
+extern void s3c_register_clocks(struct clk *clk, int nr_clks);
+
 extern int s3c24xx_register_baseclocks(unsigned long xtal);
 
-extern void s3c64xx_register_clocks(void);
+extern void s5p_register_clocks(unsigned long xtal_freq);
 
 extern void s3c24xx_setup_clocks(unsigned long fclk,
                                  unsigned long hclk,
diff --git a/arch/arm/plat-s3c/include/plat/cpu-freq.h b/arch/arm/plat-samsung/include/plat/cpu-freq.h
index 94eb06a2ea5c..80c4a809c721 100644
--- a/arch/arm/plat-s3c/include/plat/cpu-freq.h
+++ b/arch/arm/plat-samsung/include/plat/cpu-freq.h
@@ -1,4 +1,4 @@
-/* arch/arm/plat-s3c/include/plat/cpu-freq.h
+/* arch/arm/plat-samsung/include/plat/cpu-freq.h
  *
  * Copyright (c) 2006-2007 Simtec Electronics
  *      http://armlinux.simtec.co.uk/
diff --git a/arch/arm/plat-s3c/include/plat/cpu.h b/arch/arm/plat-samsung/include/plat/cpu.h
index d1131ca11e97..d316b4a579f4 100644
--- a/arch/arm/plat-s3c/include/plat/cpu.h
+++ b/arch/arm/plat-samsung/include/plat/cpu.h
@@ -1,4 +1,4 @@
-/* linux/arch/arm/plat-s3c/include/plat/cpu.h
+/* linux/arch/arm/plat-samsung/include/plat/cpu.h
  *
  * Copyright (c) 2004-2005 Simtec Electronics
  *      Ben Dooks <ben@simtec.co.uk>
@@ -48,9 +48,12 @@ extern void s3c_init_cpu(unsigned long idcode,
 
 extern void s3c24xx_init_irq(void);
 extern void s3c64xx_init_irq(u32 vic0, u32 vic1);
+extern void s5p_init_irq(u32 *vic, u32 num_vic);
 
 extern void s3c24xx_init_io(struct map_desc *mach_desc, int size);
 extern void s3c64xx_init_io(struct map_desc *mach_desc, int size);
+extern void s5p_init_io(struct map_desc *mach_desc,
+                        int size, void __iomem *cpuid_addr);
 
 extern void s3c24xx_init_uarts(struct s3c2410_uartcfg *cfg, int no);
 
diff --git a/arch/arm/plat-s3c/include/plat/debug-macro.S b/arch/arm/plat-samsung/include/plat/debug-macro.S
index 3634d4e3708b..dc6efd90e8ff 100644
--- a/arch/arm/plat-s3c/include/plat/debug-macro.S
+++ b/arch/arm/plat-samsung/include/plat/debug-macro.S
@@ -1,4 +1,4 @@
-/* linux/include/asm-arm/plat-s3c/debug-macro.S
+/* arch/arm/plat-samsung/include/plat/debug-macro.S
  *
  * Copyright 2005, 2007 Simtec Electronics
  *      http://armlinux.simtec.co.uk/
@@ -11,6 +11,18 @@
 
 #include <plat/regs-serial.h>
 
+/* The S5PV210/S5PC110 and S5P6442 implementations are as belows. */
+
+        .macro fifo_level_s5pv210 rd, rx
+                ldr     \rd, [ \rx, # S3C2410_UFSTAT ]
+                and     \rd, \rd, #S5PV210_UFSTAT_TXMASK
+        .endm
+
+        .macro  fifo_full_s5pv210 rd, rx
+                ldr     \rd, [ \rx, # S3C2410_UFSTAT ]
+                tst     \rd, #S5PV210_UFSTAT_TXFULL
+        .endm
+
 /* The S3C2440 implementations are used by default as they are the
  * most widely re-used */
 
diff --git a/arch/arm/plat-s3c/include/plat/devs.h b/arch/arm/plat-samsung/include/plat/devs.h
index c1c20b023917..796d24258313 100644
--- a/arch/arm/plat-s3c/include/plat/devs.h
+++ b/arch/arm/plat-samsung/include/plat/devs.h
@@ -1,4 +1,4 @@
-/* linux/include/asm-arm/plat-s3c24xx/devs.h
+/* arch/arm/plat-samsung/include/plat/devs.h
  *
  * Copyright (c) 2004 Simtec Electronics
  * Ben Dooks <ben@simtec.co.uk>
@@ -18,6 +18,7 @@ struct s3c24xx_uart_resources {
 
 extern struct s3c24xx_uart_resources s3c2410_uart_resources[];
 extern struct s3c24xx_uart_resources s3c64xx_uart_resources[];
+extern struct s3c24xx_uart_resources s5p_uart_resources[];
 
 extern struct platform_device *s3c24xx_uart_devs[];
 extern struct platform_device *s3c24xx_uart_src[];
@@ -28,12 +29,18 @@ extern struct platform_device s3c64xx_device_iis0;
 extern struct platform_device s3c64xx_device_iis1;
 extern struct platform_device s3c64xx_device_iisv4;
 
+extern struct platform_device s3c64xx_device_spi0;
+extern struct platform_device s3c64xx_device_spi1;
+
 extern struct platform_device s3c64xx_device_pcm0;
 extern struct platform_device s3c64xx_device_pcm1;
 
+extern struct platform_device s3c64xx_device_ac97;
+
 extern struct platform_device s3c_device_ts;
+
 extern struct platform_device s3c_device_fb;
-extern struct platform_device s3c_device_usb;
+extern struct platform_device s3c_device_ohci;
 extern struct platform_device s3c_device_lcd;
 extern struct platform_device s3c_device_wdt;
 extern struct platform_device s3c_device_i2c0;
diff --git a/arch/arm/plat-s3c/include/plat/dma-core.h b/arch/arm/plat-samsung/include/plat/dma-core.h
index 32ff2a92cb3c..32ff2a92cb3c 100644
--- a/arch/arm/plat-s3c/include/plat/dma-core.h
+++ b/arch/arm/plat-samsung/include/plat/dma-core.h
diff --git a/arch/arm/plat-s3c24xx/include/plat/dma-plat.h b/arch/arm/plat-samsung/include/plat/dma-s3c24xx.h
index 9565ead1bc9b..336d5ac02035 100644
--- a/arch/arm/plat-s3c24xx/include/plat/dma-plat.h
+++ b/arch/arm/plat-samsung/include/plat/dma-s3c24xx.h
@@ -1,9 +1,9 @@
-/* linux/arch/arm/plat-s3c24xx/include/plat/dma-plat.h
+/* linux/arch/arm/plat-samsung/include/plat/dma-s3c24xx.h
  *
  * Copyright (C) 2006 Simtec Electronics
  *      Ben Dooks <ben@simtec.co.uk>
  *
- * Samsung S3C24XX DMA support
+ * Samsung S3C24XX DMA support - per SoC functions
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License version 2 as
diff --git a/arch/arm/plat-s3c/include/plat/dma.h b/arch/arm/plat-samsung/include/plat/dma.h
index e429d10be3ad..7584d751ed51 100644
--- a/arch/arm/plat-s3c/include/plat/dma.h
+++ b/arch/arm/plat-samsung/include/plat/dma.h
@@ -1,4 +1,4 @@
-/* arch/arm/plat-s3c/include/plat/dma.h
+/* arch/arm/plat-samsung/include/plat/dma.h
  *
  * Copyright (C) 2003-2006 Simtec Electronics
  *      Ben Dooks <ben@simtec.co.uk>
diff --git a/arch/arm/plat-s3c/include/plat/fb.h b/arch/arm/plat-samsung/include/plat/fb.h
index f8db87930f8b..ffc01a76b7ce 100644
--- a/arch/arm/plat-s3c/include/plat/fb.h
+++ b/arch/arm/plat-samsung/include/plat/fb.h
@@ -1,4 +1,4 @@
-/* linux/arch/arm/plat-s3c/include/plat/fb.h
+/* arch/arm/plat-samsung/include/plat/fb.h
  *
  * Copyright 2008 Openmoko, Inc.
  * Copyright 2008 Simtec Electronics
diff --git a/arch/arm/plat-s3c/include/plat/gpio-cfg-helpers.h b/arch/arm/plat-samsung/include/plat/gpio-cfg-helpers.h
index 652e2bbdaa20..dda19da037ad 100644
--- a/arch/arm/plat-s3c/include/plat/gpio-cfg-helpers.h
+++ b/arch/arm/plat-samsung/include/plat/gpio-cfg-helpers.h
@@ -78,7 +78,7 @@ extern int s3c_gpio_setcfg_s3c24xx_a(struct s3c_gpio_chip *chip,
  *      others = Special functions (dependant on bank)
  *
  * Note, since the code to deal with the case where there are two control
- * registers instead of one, we do not have a seperate set of functions for
+ * registers instead of one, we do not have a separate set of functions for
  * each case.
 */
 extern int s3c_gpio_setcfg_s3c64xx_4bit(struct s3c_gpio_chip *chip,
diff --git a/arch/arm/plat-s3c/include/plat/gpio-cfg.h b/arch/arm/plat-samsung/include/plat/gpio-cfg.h
index 29cd6a86cade..29cd6a86cade 100644
--- a/arch/arm/plat-s3c/include/plat/gpio-cfg.h
+++ b/arch/arm/plat-samsung/include/plat/gpio-cfg.h
diff --git a/arch/arm/plat-s3c/include/plat/gpio-core.h b/arch/arm/plat-samsung/include/plat/gpio-core.h
index 32af612767aa..49ff406a7066 100644
--- a/arch/arm/plat-s3c/include/plat/gpio-core.h
+++ b/arch/arm/plat-samsung/include/plat/gpio-core.h
@@ -11,6 +11,11 @@
  * published by the Free Software Foundation.
 */
 
+#define GPIOCON_OFF     (0x00)
+#define GPIODAT_OFF     (0x04)
+
+#define con_4bit_shift(__off) ((__off) * 4)
+
 /* Define the core gpiolib support functions that the s3c platforms may
  * need to extend or change depending on the hardware and the s3c chip
  * selected at build or found at run time.
@@ -80,6 +85,29 @@ extern void s3c_gpiolib_add(struct s3c_gpio_chip *chip);
  * and any other necessary functions.
  */
 
+/**
+ * samsung_gpiolib_add_4bit_chips - 4bit single register GPIO config.
+ * @chip: The gpio chip that is being configured.
+ * @nr_chips: The no of chips (gpio ports) for the GPIO being configured.
+ *
+ * This helper deal with the GPIO cases where the control register has 4 bits
+ * of control per GPIO, generally in the form of:
+ * 0000 = Input
+ * 0001 = Output
+ * others = Special functions (dependant on bank)
+ *
+ * Note, since the code to deal with the case where there are two control
+ * registers instead of one, we do not have a seperate set of function
+ * (samsung_gpiolib_add_4bit2_chips)for each case.
+ */
+extern void samsung_gpiolib_add_4bit_chips(struct s3c_gpio_chip *chip,
+                                           int nr_chips);
+extern void samsung_gpiolib_add_4bit2_chips(struct s3c_gpio_chip *chip,
+                                            int nr_chips);
+
+extern void samsung_gpiolib_add_4bit(struct s3c_gpio_chip *chip);
+extern void samsung_gpiolib_add_4bit2(struct s3c_gpio_chip *chip);
+
 #ifdef CONFIG_S3C_GPIO_TRACK
 extern struct s3c_gpio_chip *s3c_gpios[S3C_GPIO_END];
 
@@ -90,6 +118,8 @@ static inline struct s3c_gpio_chip *s3c_gpiolib_getchip(unsigned int chip)
 #else
 /* machine specific code should provide s3c_gpiolib_getchip */
 
+#include <mach/gpio-track.h>
+
 static inline void s3c_gpiolib_track(struct s3c_gpio_chip *chip) { }
 #endif
 
diff --git a/arch/arm/plat-s3c/include/plat/hwmon.h b/arch/arm/plat-samsung/include/plat/hwmon.h
index 1ba88ea0aa31..1ba88ea0aa31 100644
--- a/arch/arm/plat-s3c/include/plat/hwmon.h
+++ b/arch/arm/plat-samsung/include/plat/hwmon.h
diff --git a/arch/arm/plat-s3c/include/plat/iic-core.h b/arch/arm/plat-samsung/include/plat/iic-core.h
index 36397ca20962..36397ca20962 100644
--- a/arch/arm/plat-s3c/include/plat/iic-core.h
+++ b/arch/arm/plat-samsung/include/plat/iic-core.h
diff --git a/arch/arm/plat-s3c/include/plat/iic.h b/arch/arm/plat-samsung/include/plat/iic.h
index 3083df00dee6..3083df00dee6 100644
--- a/arch/arm/plat-s3c/include/plat/iic.h
+++ b/arch/arm/plat-samsung/include/plat/iic.h
diff --git a/arch/arm/plat-samsung/include/plat/irq-uart.h b/arch/arm/plat-samsung/include/plat/irq-uart.h
new file mode 100644
index 000000000000..a9331e49bea3
--- /dev/null
+++ b/arch/arm/plat-samsung/include/plat/irq-uart.h
@@ -0,0 +1,20 @@
+/* arch/arm/plat-samsung/include/plat/irq-uart.h
+ *
+ * Copyright (c) 2010 Simtec Electronics
+ *      Ben Dooks <ben@simtec.co.uk>
+ *
+ * Header file for Samsung SoC UART IRQ demux for S3C64XX and later
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+struct s3c_uart_irq {
+        void __iomem    *regs;
+        unsigned int     base_irq;
+        unsigned int     parent_irq;
+};
+
+extern void s3c_init_uart_irqs(struct s3c_uart_irq *irq, unsigned int nr_irqs);
+
diff --git a/arch/arm/plat-s3c24xx/include/plat/s3c2442.h b/arch/arm/plat-samsung/include/plat/irq-vic-timer.h
index 451a23a2092a..a90b53431b5b 100644
--- a/arch/arm/plat-s3c24xx/include/plat/s3c2442.h
+++ b/arch/arm/plat-samsung/include/plat/irq-vic-timer.h
@@ -1,17 +1,13 @@
-/* linux/include/asm-arm/plat-s3c24xx/s3c2442.h
+/* arch/arm/plat-samsung/include/plat/irq-vic-timer.h
  *
- * Copyright (c) 2006 Simtec Electronics
+ * Copyright (c) 2010 Simtec Electronics
  *      Ben Dooks <ben@simtec.co.uk>
  *
- * Header file for s3c2442 cpu support
+ * Header file for Samsung SoC IRQ VIC timer
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License version 2 as
  * published by the Free Software Foundation.
 */
 
-#ifdef CONFIG_CPU_S3C2442
-extern  int s3c2442_init(void);
-#else
-#define s3c2442_init NULL
-#endif
+extern void s3c_init_vic_timer_irq(unsigned int vic, unsigned int timer);
diff --git a/arch/arm/plat-s3c/include/plat/map-base.h b/arch/arm/plat-samsung/include/plat/map-base.h
index 250be311c85b..250be311c85b 100644
--- a/arch/arm/plat-s3c/include/plat/map-base.h
+++ b/arch/arm/plat-samsung/include/plat/map-base.h
diff --git a/arch/arm/plat-s3c/include/plat/nand.h b/arch/arm/plat-samsung/include/plat/nand.h
index 226147b7e026..b64115fa93a4 100644
--- a/arch/arm/plat-s3c/include/plat/nand.h
+++ b/arch/arm/plat-samsung/include/plat/nand.h
@@ -3,7 +3,7 @@
  * Copyright (c) 2004 Simtec Electronics
  *      Ben Dooks <ben@simtec.co.uk>
  *
- * S3C2410 - NAND device controller platfrom_device info
+ * S3C2410 - NAND device controller platform_device info
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License version 2 as
diff --git a/arch/arm/plat-s3c/include/plat/pm.h b/arch/arm/plat-samsung/include/plat/pm.h
index 7a797192fcf3..245836d91931 100644
--- a/arch/arm/plat-s3c/include/plat/pm.h
+++ b/arch/arm/plat-samsung/include/plat/pm.h
@@ -1,4 +1,4 @@
-/* linux/include/asm-arm/plat-s3c24xx/pm.h
+/* arch/arm/plat-samsung/include/plat/pm.h
  *
  * Copyright (c) 2004 Simtec Electronics
  *      http://armlinux.simtec.co.uk/
@@ -111,7 +111,7 @@ extern int s3c24xx_irq_resume(struct sys_device *dev);
 
 /* PM debug functions */
 
-#ifdef CONFIG_S3C2410_PM_DEBUG
+#ifdef CONFIG_SAMSUNG_PM_DEBUG
 /**
  * s3c_pm_dbg() - low level debug function for use in suspend/resume.
  * @msg: The message to print.
@@ -141,7 +141,7 @@ static inline void s3c_pm_debug_smdkled(u32 set, u32 clear) { }
 
 /* suspend memory checking */
 
-#ifdef CONFIG_S3C2410_PM_CHECK
+#ifdef CONFIG_SAMSUNG_PM_CHECK
 extern void s3c_pm_check_prepare(void);
 extern void s3c_pm_check_restore(void);
 extern void s3c_pm_check_cleanup(void);
diff --git a/arch/arm/plat-s3c/include/plat/regs-ac97.h b/arch/arm/plat-samsung/include/plat/regs-ac97.h
index c3878f7acb83..c3878f7acb83 100644
--- a/arch/arm/plat-s3c/include/plat/regs-ac97.h
+++ b/arch/arm/plat-samsung/include/plat/regs-ac97.h
diff --git a/arch/arm/plat-s3c/include/plat/regs-adc.h b/arch/arm/plat-samsung/include/plat/regs-adc.h
index 4323cccc86cd..7554c4fcddb9 100644
--- a/arch/arm/plat-s3c/include/plat/regs-adc.h
+++ b/arch/arm/plat-samsung/include/plat/regs-adc.h
@@ -19,9 +19,13 @@
 #define S3C2410_ADCDLY     S3C2410_ADCREG(0x08)
 #define S3C2410_ADCDAT0    S3C2410_ADCREG(0x0C)
 #define S3C2410_ADCDAT1    S3C2410_ADCREG(0x10)
+#define S3C64XX_ADCUPDN         S3C2410_ADCREG(0x14)
+#define S3C64XX_ADCCLRINT       S3C2410_ADCREG(0x18)
+#define S3C64XX_ADCCLRINTPNDNUP S3C2410_ADCREG(0x20)
 
 
 /* ADCCON Register Bits */
+#define S3C64XX_ADCCON_RESSEL           (1<<16)
 #define S3C2410_ADCCON_ECFLG            (1<<15)
 #define S3C2410_ADCCON_PRSCEN           (1<<14)
 #define S3C2410_ADCCON_PRSCVL(x)        (((x)&0xFF)<<6)
diff --git a/arch/arm/plat-s3c/include/plat/regs-fb-v4.h b/arch/arm/plat-samsung/include/plat/regs-fb-v4.h
index a60ed0d06c94..0f43599248ad 100644
--- a/arch/arm/plat-s3c/include/plat/regs-fb-v4.h
+++ b/arch/arm/plat-samsung/include/plat/regs-fb-v4.h
@@ -1,4 +1,4 @@
-/* arch/arm/plat-s3c/include/plat/regs-fb-v4.h
+/* arch/arm/plat-samsung/include/plat/regs-fb-v4.h
  *
  * Copyright 2008 Openmoko, Inc.
  * Copyright 2008 Simtec Electronics
diff --git a/arch/arm/plat-s3c/include/plat/regs-fb.h b/arch/arm/plat-samsung/include/plat/regs-fb.h
index e9ee599d430e..0ef806e50344 100644
--- a/arch/arm/plat-s3c/include/plat/regs-fb.h
+++ b/arch/arm/plat-samsung/include/plat/regs-fb.h
@@ -1,4 +1,4 @@
-/* arch/arm/plat-s3c/include/plat/regs-fb.h
+/* arch/arm/plat-samsung/include/plat/regs-fb.h
  *
  * Copyright 2008 Openmoko, Inc.
  * Copyright 2008 Simtec Electronics
diff --git a/arch/arm/plat-s3c/include/plat/regs-iic.h b/arch/arm/plat-samsung/include/plat/regs-iic.h
index 2f7c17de8ac8..2f7c17de8ac8 100644
--- a/arch/arm/plat-s3c/include/plat/regs-iic.h
+++ b/arch/arm/plat-samsung/include/plat/regs-iic.h
diff --git a/arch/arm/plat-s3c/include/plat/regs-irqtype.h b/arch/arm/plat-samsung/include/plat/regs-irqtype.h
index c63cd3fc5ad3..c63cd3fc5ad3 100644
--- a/arch/arm/plat-s3c/include/plat/regs-irqtype.h
+++ b/arch/arm/plat-samsung/include/plat/regs-irqtype.h
diff --git a/arch/arm/plat-s3c/include/plat/regs-nand.h b/arch/arm/plat-samsung/include/plat/regs-nand.h
index 238efea7b9e4..238efea7b9e4 100644
--- a/arch/arm/plat-s3c/include/plat/regs-nand.h
+++ b/arch/arm/plat-samsung/include/plat/regs-nand.h
diff --git a/arch/arm/plat-s3c/include/plat/regs-rtc.h b/arch/arm/plat-samsung/include/plat/regs-rtc.h
index d5837cf8e402..d5837cf8e402 100644
--- a/arch/arm/plat-s3c/include/plat/regs-rtc.h
+++ b/arch/arm/plat-samsung/include/plat/regs-rtc.h
diff --git a/arch/arm/plat-s3c/include/plat/regs-s3c2412-iis.h b/arch/arm/plat-samsung/include/plat/regs-s3c2412-iis.h
index abf2fbc2eb2f..abf2fbc2eb2f 100644
--- a/arch/arm/plat-s3c/include/plat/regs-s3c2412-iis.h
+++ b/arch/arm/plat-samsung/include/plat/regs-s3c2412-iis.h
diff --git a/arch/arm/plat-s3c/include/plat/regs-sdhci.h b/arch/arm/plat-samsung/include/plat/regs-sdhci.h
index e34049ad44cc..e34049ad44cc 100644
--- a/arch/arm/plat-s3c/include/plat/regs-sdhci.h
+++ b/arch/arm/plat-samsung/include/plat/regs-sdhci.h
diff --git a/arch/arm/plat-s3c/include/plat/regs-serial.h b/arch/arm/plat-samsung/include/plat/regs-serial.h
index 85d8904e7f24..a6eba8496b24 100644
--- a/arch/arm/plat-s3c/include/plat/regs-serial.h
+++ b/arch/arm/plat-samsung/include/plat/regs-serial.h
@@ -1,4 +1,4 @@
-/* arch/arm/mach-s3c2410/include/mach/regs-serial.h
+/* arch/arm/plat-samsung/include/plat/regs-serial.h
  *
  *  From linux/include/asm-arm/hardware/serial_s3c2410.h
  *
@@ -194,6 +194,36 @@
 #define S3C64XX_UINTSP          0x34
 #define S3C64XX_UINTM           0x38
 
+/* Following are specific to S5PV210 and S5P6442 */
+#define S5PV210_UCON_CLKMASK    (1<<10)
+#define S5PV210_UCON_PCLK       (0<<10)
+#define S5PV210_UCON_UCLK       (1<<10)
+
+#define S5PV210_UFCON_TXTRIG0   (0<<8)
+#define S5PV210_UFCON_TXTRIG4   (1<<8)
+#define S5PV210_UFCON_TXTRIG8   (2<<8)
+#define S5PV210_UFCON_TXTRIG16  (3<<8)
+#define S5PV210_UFCON_TXTRIG32  (4<<8)
+#define S5PV210_UFCON_TXTRIG64  (5<<8)
+#define S5PV210_UFCON_TXTRIG128 (6<<8)
+#define S5PV210_UFCON_TXTRIG256 (7<<8)
+
+#define S5PV210_UFCON_RXTRIG1   (0<<4)
+#define S5PV210_UFCON_RXTRIG4   (1<<4)
+#define S5PV210_UFCON_RXTRIG8   (2<<4)
+#define S5PV210_UFCON_RXTRIG16  (3<<4)
+#define S5PV210_UFCON_RXTRIG32  (4<<4)
+#define S5PV210_UFCON_RXTRIG64  (5<<4)
+#define S5PV210_UFCON_RXTRIG128 (6<<4)
+#define S5PV210_UFCON_RXTRIG256 (7<<4)
+
+#define S5PV210_UFSTAT_TXFULL   (1<<24)
+#define S5PV210_UFSTAT_RXFULL   (1<<8)
+#define S5PV210_UFSTAT_TXMASK   (255<<16)
+#define S5PV210_UFSTAT_TXSHIFT  (16)
+#define S5PV210_UFSTAT_RXMASK   (255<<0)
+#define S5PV210_UFSTAT_RXSHIFT  (0)
+
 #ifndef __ASSEMBLY__
 
 /* struct s3c24xx_uart_clksrc
diff --git a/arch/arm/plat-s3c/include/plat/regs-timer.h b/arch/arm/plat-samsung/include/plat/regs-timer.h
index d097d92f8cc7..d097d92f8cc7 100644
--- a/arch/arm/plat-s3c/include/plat/regs-timer.h
+++ b/arch/arm/plat-samsung/include/plat/regs-timer.h
diff --git a/arch/arm/plat-s3c/include/plat/regs-usb-hsotg-phy.h b/arch/arm/plat-samsung/include/plat/regs-usb-hsotg-phy.h
index 36a85f5000c8..a111ad871833 100644
--- a/arch/arm/plat-s3c/include/plat/regs-usb-hsotg-phy.h
+++ b/arch/arm/plat-samsung/include/plat/regs-usb-hsotg-phy.h
@@ -12,7 +12,7 @@
  * published by the Free Software Foundation.
 */
 
-/* Note, this is a seperate header file as some of the clock framework
+/* Note, this is a separate header file as some of the clock framework
  * needs to touch this if the clk_48m is used as the USB OHCI or other
  * peripheral source.
 */
diff --git a/arch/arm/plat-s3c/include/plat/regs-usb-hsotg.h b/arch/arm/plat-samsung/include/plat/regs-usb-hsotg.h
index 8d18d9d4d148..8d18d9d4d148 100644
--- a/arch/arm/plat-s3c/include/plat/regs-usb-hsotg.h
+++ b/arch/arm/plat-samsung/include/plat/regs-usb-hsotg.h
diff --git a/arch/arm/plat-s3c/include/plat/regs-watchdog.h b/arch/arm/plat-samsung/include/plat/regs-watchdog.h
index 4938492470f7..4938492470f7 100644
--- a/arch/arm/plat-s3c/include/plat/regs-watchdog.h
+++ b/arch/arm/plat-samsung/include/plat/regs-watchdog.h
diff --git a/arch/arm/plat-samsung/include/plat/s3c64xx-spi.h b/arch/arm/plat-samsung/include/plat/s3c64xx-spi.h
new file mode 100644
index 000000000000..d17724149315
--- /dev/null
+++ b/arch/arm/plat-samsung/include/plat/s3c64xx-spi.h
@@ -0,0 +1,67 @@
+/* linux/arch/arm/plat-samsung/include/plat/s3c64xx-spi.h
+ *
+ * Copyright (C) 2009 Samsung Electronics Ltd.
+ *      Jaswinder Singh <jassi.brar@samsung.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef __S3C64XX_PLAT_SPI_H
+#define __S3C64XX_PLAT_SPI_H
+
+/**
+ * struct s3c64xx_spi_csinfo - ChipSelect description
+ * @fb_delay: Slave specific feedback delay.
+ *            Refer to FB_CLK_SEL register definition in SPI chapter.
+ * @line: Custom 'identity' of the CS line.
+ * @set_level: CS line control.
+ *
+ * This is per SPI-Slave Chipselect information.
+ * Allocate and initialize one in machine init code and make the
+ * spi_board_info.controller_data point to it.
+ */
+struct s3c64xx_spi_csinfo {
+        u8 fb_delay;
+        unsigned line;
+        void (*set_level)(unsigned line_id, int lvl);
+};
+
+/**
+ * struct s3c64xx_spi_info - SPI Controller defining structure
+ * @src_clk_nr: Clock source index for the CLK_CFG[SPI_CLKSEL] field.
+ * @src_clk_name: Platform name of the corresponding clock.
+ * @num_cs: Number of CS this controller emulates.
+ * @cfg_gpio: Configure pins for this SPI controller.
+ * @fifo_lvl_mask: All tx fifo_lvl fields start at offset-6
+ * @rx_lvl_offset: Depends on tx fifo_lvl field and bus number
+ * @high_speed: If the controller supports HIGH_SPEED_EN bit
+ */
+struct s3c64xx_spi_info {
+        int src_clk_nr;
+        char *src_clk_name;
+
+        int num_cs;
+
+        int (*cfg_gpio)(struct platform_device *pdev);
+
+        /* Following two fields are for future compatibility */
+        int fifo_lvl_mask;
+        int rx_lvl_offset;
+        int high_speed;
+};
+
+/**
+ * s3c64xx_spi_set_info - SPI Controller configure callback by the board
+ *                              initialization code.
+ * @cntrlr: SPI controller number the configuration is for.
+ * @src_clk_nr: Clock the SPI controller is to use to generate SPI clocks.
+ * @num_cs: Number of elements in the 'cs' array.
+ *
+ * Call this from machine init code for each SPI Controller that
+ * has some chips attached to it.
+ */
+extern void s3c64xx_spi_set_info(int cntrlr, int src_clk_nr, int num_cs);
+
+#endif /* __S3C64XX_PLAT_SPI_H */
diff --git a/arch/arm/plat-s3c/include/plat/sdhci.h b/arch/arm/plat-samsung/include/plat/sdhci.h
index 53198673b6bd..7d07cd7aa4f2 100644
--- a/arch/arm/plat-s3c/include/plat/sdhci.h
+++ b/arch/arm/plat-samsung/include/plat/sdhci.h
@@ -78,8 +78,8 @@ extern void s3c64xx_setup_sdhci2_cfg_gpio(struct platform_device *, int w);
 
 /* S3C6400 SDHCI setup */
 
-#ifdef CONFIG_S3C6400_SETUP_SDHCI
-extern char *s3c6400_hsmmc_clksrcs[4];
+#ifdef CONFIG_S3C64XX_SETUP_SDHCI
+extern char *s3c64xx_hsmmc_clksrcs[4];
 
 #ifdef CONFIG_S3C_DEV_HSMMC
 extern void s3c6400_setup_sdhci_cfg_card(struct platform_device *dev,
@@ -89,7 +89,7 @@ extern void s3c6400_setup_sdhci_cfg_card(struct platform_device *dev,
 
 static inline void s3c6400_default_sdhci0(void)
 {
-        s3c_hsmmc0_def_platdata.clocks = s3c6400_hsmmc_clksrcs;
+        s3c_hsmmc0_def_platdata.clocks = s3c64xx_hsmmc_clksrcs;
         s3c_hsmmc0_def_platdata.cfg_gpio = s3c64xx_setup_sdhci0_cfg_gpio;
         s3c_hsmmc0_def_platdata.cfg_card = s3c6400_setup_sdhci_cfg_card;
 }
@@ -101,7 +101,7 @@ static inline void s3c6400_default_sdhci0(void) { }
 #ifdef CONFIG_S3C_DEV_HSMMC1
 static inline void s3c6400_default_sdhci1(void)
 {
-        s3c_hsmmc1_def_platdata.clocks = s3c6400_hsmmc_clksrcs;
+        s3c_hsmmc1_def_platdata.clocks = s3c64xx_hsmmc_clksrcs;
         s3c_hsmmc1_def_platdata.cfg_gpio = s3c64xx_setup_sdhci1_cfg_gpio;
         s3c_hsmmc1_def_platdata.cfg_card = s3c6400_setup_sdhci_cfg_card;
 }
@@ -112,7 +112,7 @@ static inline void s3c6400_default_sdhci1(void) { }
 #ifdef CONFIG_S3C_DEV_HSMMC2
 static inline void s3c6400_default_sdhci2(void)
 {
-        s3c_hsmmc2_def_platdata.clocks = s3c6400_hsmmc_clksrcs;
+        s3c_hsmmc2_def_platdata.clocks = s3c64xx_hsmmc_clksrcs;
         s3c_hsmmc2_def_platdata.cfg_gpio = s3c64xx_setup_sdhci2_cfg_gpio;
         s3c_hsmmc2_def_platdata.cfg_card = s3c6400_setup_sdhci_cfg_card;
 }
@@ -120,27 +120,19 @@ static inline void s3c6400_default_sdhci2(void)
 static inline void s3c6400_default_sdhci2(void) { }
 #endif /* CONFIG_S3C_DEV_HSMMC2 */
 
-#else
-static inline void s3c6400_default_sdhci0(void) { }
-static inline void s3c6400_default_sdhci1(void) { }
-#endif /* CONFIG_S3C6400_SETUP_SDHCI */
-
 /* S3C6410 SDHCI setup */
 
-#ifdef CONFIG_S3C6410_SETUP_SDHCI
-extern char *s3c6410_hsmmc_clksrcs[4];
-
-extern void s3c6410_setup_sdhci0_cfg_card(struct platform_device *dev,
-                                           void __iomem *r,
-                                           struct mmc_ios *ios,
-                                           struct mmc_card *card);
+extern void s3c6410_setup_sdhci_cfg_card(struct platform_device *dev,
+                                         void __iomem *r,
+                                         struct mmc_ios *ios,
+                                         struct mmc_card *card);
 
 #ifdef CONFIG_S3C_DEV_HSMMC
 static inline void s3c6410_default_sdhci0(void)
 {
-        s3c_hsmmc0_def_platdata.clocks = s3c6410_hsmmc_clksrcs;
+        s3c_hsmmc0_def_platdata.clocks = s3c64xx_hsmmc_clksrcs;
         s3c_hsmmc0_def_platdata.cfg_gpio = s3c64xx_setup_sdhci0_cfg_gpio;
-        s3c_hsmmc0_def_platdata.cfg_card = s3c6410_setup_sdhci0_cfg_card;
+        s3c_hsmmc0_def_platdata.cfg_card = s3c6410_setup_sdhci_cfg_card;
 }
 #else
 static inline void s3c6410_default_sdhci0(void) { }
@@ -149,9 +141,9 @@ static inline void s3c6410_default_sdhci0(void) { }
 #ifdef CONFIG_S3C_DEV_HSMMC1
 static inline void s3c6410_default_sdhci1(void)
 {
-        s3c_hsmmc1_def_platdata.clocks = s3c6410_hsmmc_clksrcs;
+        s3c_hsmmc1_def_platdata.clocks = s3c64xx_hsmmc_clksrcs;
         s3c_hsmmc1_def_platdata.cfg_gpio = s3c64xx_setup_sdhci1_cfg_gpio;
-        s3c_hsmmc1_def_platdata.cfg_card = s3c6410_setup_sdhci0_cfg_card;
+        s3c_hsmmc1_def_platdata.cfg_card = s3c6410_setup_sdhci_cfg_card;
 }
 #else
 static inline void s3c6410_default_sdhci1(void) { }
@@ -160,9 +152,9 @@ static inline void s3c6410_default_sdhci1(void) { }
 #ifdef CONFIG_S3C_DEV_HSMMC2
 static inline void s3c6410_default_sdhci2(void)
 {
-        s3c_hsmmc2_def_platdata.clocks = s3c6410_hsmmc_clksrcs;
+        s3c_hsmmc2_def_platdata.clocks = s3c64xx_hsmmc_clksrcs;
         s3c_hsmmc2_def_platdata.cfg_gpio = s3c64xx_setup_sdhci2_cfg_gpio;
-        s3c_hsmmc2_def_platdata.cfg_card = s3c6410_setup_sdhci0_cfg_card;
+        s3c_hsmmc2_def_platdata.cfg_card = s3c6410_setup_sdhci_cfg_card;
 }
 #else
 static inline void s3c6410_default_sdhci2(void) { }
@@ -171,7 +163,10 @@ static inline void s3c6410_default_sdhci2(void) { }
 #else
 static inline void s3c6410_default_sdhci0(void) { }
 static inline void s3c6410_default_sdhci1(void) { }
-#endif /* CONFIG_S3C6410_SETUP_SDHCI */
+static inline void s3c6400_default_sdhci0(void) { }
+static inline void s3c6400_default_sdhci1(void) { }
+
+#endif /* CONFIG_S3C64XX_SETUP_SDHCI */
 
 /* S5PC100 SDHCI setup */
 
diff --git a/arch/arm/plat-s3c/include/plat/udc-hs.h b/arch/arm/plat-samsung/include/plat/udc-hs.h
index dd04db043109..a22a4f2eea94 100644
--- a/arch/arm/plat-s3c/include/plat/udc-hs.h
+++ b/arch/arm/plat-samsung/include/plat/udc-hs.h
@@ -12,7 +12,7 @@
  * published by the Free Software Foundation.
 */
 
-enum s3c_hostg_dmamode {
+enum s3c_hsotg_dmamode {
         S3C_HSOTG_DMA_NONE,     /* do not use DMA at-all */
         S3C_HSOTG_DMA_ONLY,     /* always use DMA */
         S3C_HSOTG_DMA_DRV,      /* DMA is chosen by driver */
@@ -24,6 +24,6 @@ enum s3c_hostg_dmamode {
  * @is_osc: The clock source is an oscillator, not a crystal
  */
 struct s3c_hsotg_plat {
-        enum s3c_hostg_dmamode  dma;
+        enum s3c_hsotg_dmamode  dma;
         unsigned int            is_osc : 1;
 };
diff --git a/arch/arm/plat-s3c/include/plat/uncompress.h b/arch/arm/plat-samsung/include/plat/uncompress.h
index dc66a477f62e..e87ce8ffbbcd 100644
--- a/arch/arm/plat-s3c/include/plat/uncompress.h
+++ b/arch/arm/plat-samsung/include/plat/uncompress.h
@@ -1,4 +1,4 @@
-/* linux/include/asm-arm/plat-s3c/uncompress.h
+/* arch/arm/plat-samsung/include/plat/uncompress.h
  *
  * Copyright 2003, 2007 Simtec Electronics
  *      http://armlinux.simtec.co.uk/
diff --git a/arch/arm/plat-s3c/include/plat/usb-control.h b/arch/arm/plat-samsung/include/plat/usb-control.h
index 822c87fe948e..7fa1fbefc3f2 100644
--- a/arch/arm/plat-s3c/include/plat/usb-control.h
+++ b/arch/arm/plat-samsung/include/plat/usb-control.h
@@ -1,4 +1,4 @@
-/* arch/arm/plat-s3c/include/plat/usb-control.h
+/* arch/arm/plat-samsung/include/plat/usb-control.h
  *
  * Copyright (c) 2004 Simtec Electronics
  *      Ben Dooks <ben@simtec.co.uk>
@@ -38,4 +38,6 @@ static void inline s3c2410_usb_report_oc(struct s3c2410_hcd_info *info, int port
         }
 }
 
+extern void s3c_ohci_set_platdata(struct s3c2410_hcd_info *info);
+
 #endif /*__ASM_ARCH_USBCONTROL_H */
diff --git a/arch/arm/plat-s3c/include/plat/watchdog-reset.h b/arch/arm/plat-samsung/include/plat/watchdog-reset.h
index 54b762acb5a0..54b762acb5a0 100644
--- a/arch/arm/plat-s3c/include/plat/watchdog-reset.h
+++ b/arch/arm/plat-samsung/include/plat/watchdog-reset.h
diff --git a/arch/arm/plat-s3c/init.c b/arch/arm/plat-samsung/init.c
index 6790edfaca6f..6790edfaca6f 100644
--- a/arch/arm/plat-s3c/init.c
+++ b/arch/arm/plat-samsung/init.c
diff --git a/arch/arm/plat-samsung/irq-uart.c b/arch/arm/plat-samsung/irq-uart.c
new file mode 100644
index 000000000000..4f8c102674ae
--- /dev/null
+++ b/arch/arm/plat-samsung/irq-uart.c
@@ -0,0 +1,143 @@
+/* arch/arm/plat-samsung/irq-uart.c
+ *      originally part of arch/arm/plat-s3c64xx/irq.c
+ *
+ * Copyright 2008 Openmoko, Inc.
+ * Copyright 2008 Simtec Electronics
+ *      Ben Dooks <ben@simtec.co.uk>
+ *      http://armlinux.simtec.co.uk/
+ *
+ * Samsung- UART Interrupt handling
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/kernel.h>
+#include <linux/interrupt.h>
+#include <linux/serial_core.h>
+#include <linux/irq.h>
+#include <linux/io.h>
+
+#include <mach/map.h>
+#include <plat/irq-uart.h>
+#include <plat/regs-serial.h>
+#include <plat/cpu.h>
+
+/* Note, we make use of the fact that the parent IRQs, IRQ_UART[0..3]
+ * are consecutive when looking up the interrupt in the demux routines.
+ */
+
+static inline void __iomem *s3c_irq_uart_base(unsigned int irq)
+{
+        struct s3c_uart_irq *uirq = get_irq_chip_data(irq);
+        return uirq->regs;
+}
+
+static inline unsigned int s3c_irq_uart_bit(unsigned int irq)
+{
+        return irq & 3;
+}
+
+static void s3c_irq_uart_mask(unsigned int irq)
+{
+        void __iomem *regs = s3c_irq_uart_base(irq);
+        unsigned int bit = s3c_irq_uart_bit(irq);
+        u32 reg;
+
+        reg = __raw_readl(regs + S3C64XX_UINTM);
+        reg |= (1 << bit);
+        __raw_writel(reg, regs + S3C64XX_UINTM);
+}
+
+static void s3c_irq_uart_maskack(unsigned int irq)
+{
+        void __iomem *regs = s3c_irq_uart_base(irq);
+        unsigned int bit = s3c_irq_uart_bit(irq);
+        u32 reg;
+
+        reg = __raw_readl(regs + S3C64XX_UINTM);
+        reg |= (1 << bit);
+        __raw_writel(reg, regs + S3C64XX_UINTM);
+        __raw_writel(1 << bit, regs + S3C64XX_UINTP);
+}
+
+static void s3c_irq_uart_unmask(unsigned int irq)
+{
+        void __iomem *regs = s3c_irq_uart_base(irq);
+        unsigned int bit = s3c_irq_uart_bit(irq);
+        u32 reg;
+
+        reg = __raw_readl(regs + S3C64XX_UINTM);
+        reg &= ~(1 << bit);
+        __raw_writel(reg, regs + S3C64XX_UINTM);
+}
+
+static void s3c_irq_uart_ack(unsigned int irq)
+{
+        void __iomem *regs = s3c_irq_uart_base(irq);
+        unsigned int bit = s3c_irq_uart_bit(irq);
+
+        __raw_writel(1 << bit, regs + S3C64XX_UINTP);
+}
+
+static void s3c_irq_demux_uart(unsigned int irq, struct irq_desc *desc)
+{
+        struct s3c_uart_irq *uirq = desc->handler_data;
+        u32 pend = __raw_readl(uirq->regs + S3C64XX_UINTP);
+        int base = uirq->base_irq;
+
+        if (pend & (1 << 0))
+                generic_handle_irq(base);
+        if (pend & (1 << 1))
+                generic_handle_irq(base + 1);
+        if (pend & (1 << 2))
+                generic_handle_irq(base + 2);
+        if (pend & (1 << 3))
+                generic_handle_irq(base + 3);
+}
+
+static struct irq_chip s3c_irq_uart = {
+        .name           = "s3c-uart",
+        .mask           = s3c_irq_uart_mask,
+        .unmask         = s3c_irq_uart_unmask,
+        .mask_ack       = s3c_irq_uart_maskack,
+        .ack            = s3c_irq_uart_ack,
+};
+
+static void __init s3c_init_uart_irq(struct s3c_uart_irq *uirq)
+{
+        struct irq_desc *desc = irq_to_desc(uirq->parent_irq);
+        void __iomem *reg_base = uirq->regs;
+        unsigned int irq;
+        int offs;
+
+        /* mask all interrupts at the start. */
+        __raw_writel(0xf, reg_base + S3C64XX_UINTM);
+
+        for (offs = 0; offs < 3; offs++) {
+                irq = uirq->base_irq + offs;
+
+                set_irq_chip(irq, &s3c_irq_uart);
+                set_irq_chip_data(irq, uirq);
+                set_irq_handler(irq, handle_level_irq);
+                set_irq_flags(irq, IRQF_VALID);
+        }
+
+        desc->handler_data = uirq;
+        set_irq_chained_handler(uirq->parent_irq, s3c_irq_demux_uart);
+}
+
+/**
+ * s3c_init_uart_irqs() - initialise UART IRQs and the necessary demuxing
+ * @irq: The interrupt data for registering
+ * @nr_irqs: The number of interrupt descriptions in @irq.
+ *
+ * Register the UART interrupts specified by @irq including the demuxing
+ * routines. This supports the S3C6400 and newer style of devices.
+ */
+void __init s3c_init_uart_irqs(struct s3c_uart_irq *irq, unsigned int nr_irqs)
+{
+        for (; nr_irqs > 0; nr_irqs--, irq++)
+                s3c_init_uart_irq(irq);
+}
diff --git a/arch/arm/plat-samsung/irq-vic-timer.c b/arch/arm/plat-samsung/irq-vic-timer.c
new file mode 100644
index 000000000000..0270519fcabc
--- /dev/null
+++ b/arch/arm/plat-samsung/irq-vic-timer.c
@@ -0,0 +1,86 @@
+/* arch/arm/plat-samsung/irq-vic-timer.c
+ *      originally part of arch/arm/plat-s3c64xx/irq.c
+ *
+ * Copyright 2008 Openmoko, Inc.
+ * Copyright 2008 Simtec Electronics
+ *      Ben Dooks <ben@simtec.co.uk>
+ *      http://armlinux.simtec.co.uk/
+ *
+ * S3C64XX - Interrupt handling
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/kernel.h>
+#include <linux/interrupt.h>
+#include <linux/irq.h>
+#include <linux/io.h>
+
+#include <mach/map.h>
+#include <plat/irq-vic-timer.h>
+#include <plat/regs-timer.h>
+
+static void s3c_irq_demux_vic_timer(unsigned int irq, struct irq_desc *desc)
+{
+        generic_handle_irq((int)desc->handler_data);
+}
+
+/* We assume the IRQ_TIMER0..IRQ_TIMER4 range is continuous. */
+
+static void s3c_irq_timer_mask(unsigned int irq)
+{
+        u32 reg = __raw_readl(S3C64XX_TINT_CSTAT);
+
+        reg &= 0x1f;  /* mask out pending interrupts */
+        reg &= ~(1 << (irq - IRQ_TIMER0));
+        __raw_writel(reg, S3C64XX_TINT_CSTAT);
+}
+
+static void s3c_irq_timer_unmask(unsigned int irq)
+{
+        u32 reg = __raw_readl(S3C64XX_TINT_CSTAT);
+
+        reg &= 0x1f;  /* mask out pending interrupts */
+        reg |= 1 << (irq - IRQ_TIMER0);
+        __raw_writel(reg, S3C64XX_TINT_CSTAT);
+}
+
+static void s3c_irq_timer_ack(unsigned int irq)
+{
+        u32 reg = __raw_readl(S3C64XX_TINT_CSTAT);
+
+        reg &= 0x1f;
+        reg |= (1 << 5) << (irq - IRQ_TIMER0);
+        __raw_writel(reg, S3C64XX_TINT_CSTAT);
+}
+
+static struct irq_chip s3c_irq_timer = {
+        .name           = "s3c-timer",
+        .mask           = s3c_irq_timer_mask,
+        .unmask         = s3c_irq_timer_unmask,
+        .ack            = s3c_irq_timer_ack,
+};
+
+/**
+ * s3c_init_vic_timer_irq() - initialise timer irq chanined off VIC.\
+ * @parent_irq: The parent IRQ on the VIC for the timer.
+ * @timer_irq: The IRQ to be used for the timer.
+ *
+ * Register the necessary IRQ chaining and support for the timer IRQs
+ * chained of the VIC.
+ */
+void __init s3c_init_vic_timer_irq(unsigned int parent_irq,
+                                   unsigned int timer_irq)
+{
+        struct irq_desc *desc = irq_to_desc(parent_irq);
+
+        set_irq_chained_handler(parent_irq, s3c_irq_demux_vic_timer);
+
+        set_irq_chip(timer_irq, &s3c_irq_timer);
+        set_irq_handler(timer_irq, handle_level_irq);
+        set_irq_flags(timer_irq, IRQF_VALID);
+
+        desc->handler_data = (void *)timer_irq;
+}
diff --git a/arch/arm/plat-s3c/pm-check.c b/arch/arm/plat-samsung/pm-check.c
index 8eb1f439861c..0b5bb774192a 100644
--- a/arch/arm/plat-s3c/pm-check.c
+++ b/arch/arm/plat-samsung/pm-check.c
@@ -20,8 +20,8 @@
 
 #include <plat/pm.h>
 
-#if CONFIG_S3C2410_PM_CHECK_CHUNKSIZE < 1
-#error CONFIG_S3C2410_PM_CHECK_CHUNKSIZE must be a positive non-zero value
+#if CONFIG_SAMSUNG_PM_CHECK_CHUNKSIZE < 1
+#error CONFIG_SAMSUNG_PM_CHECK_CHUNKSIZE must be a positive non-zero value
 #endif
 
 /* suspend checking code...
@@ -29,12 +29,12 @@
  * this next area does a set of crc checks over all the installed
  * memory, so the system can verify if the resume was ok.
  *
- * CONFIG_S3C2410_PM_CHECK_CHUNKSIZE defines the block-size for the CRC,
+ * CONFIG_SAMSUNG_PM_CHECK_CHUNKSIZE defines the block-size for the CRC,
  * increasing it will mean that the area corrupted will be less easy to spot,
  * and reducing the size will cause the CRC save area to grow
 */
 
-#define CHECK_CHUNKSIZE (CONFIG_S3C2410_PM_CHECK_CHUNKSIZE * 1024)
+#define CHECK_CHUNKSIZE (CONFIG_SAMSUNG_PM_CHECK_CHUNKSIZE * 1024)
 
 static u32 crc_size;    /* size needed for the crc block */
 static u32 *crcs;       /* allocated over suspend/resume */
diff --git a/arch/arm/plat-s3c/pm-gpio.c b/arch/arm/plat-samsung/pm-gpio.c
index cfd326a8b693..69a4c7f02e25 100644
--- a/arch/arm/plat-s3c/pm-gpio.c
+++ b/arch/arm/plat-samsung/pm-gpio.c
@@ -19,7 +19,7 @@
 #include <linux/io.h>
 #include <linux/gpio.h>
 
-#include <mach/gpio-core.h>
+#include <plat/gpio-core.h>
 #include <plat/pm.h>
 
 /* PM GPIO helpers */
diff --git a/arch/arm/plat-s3c/pm.c b/arch/arm/plat-samsung/pm.c
index 767470601e5c..27cfca597699 100644
--- a/arch/arm/plat-s3c/pm.c
+++ b/arch/arm/plat-samsung/pm.c
@@ -29,7 +29,7 @@
 #include <asm/irq.h>
 
 #include <plat/pm.h>
-#include <plat/pm-core.h>
+#include <mach/pm-core.h>
 
 /* for external use */
 
@@ -41,7 +41,7 @@ unsigned long s3c_pm_flags;
  * resume before the console layer is available.
 */
 
-#ifdef CONFIG_S3C2410_PM_DEBUG
+#ifdef CONFIG_SAMSUNG_PM_DEBUG
 extern void printascii(const char *);
 
 void s3c_pm_dbg(const char *fmt, ...)
@@ -65,13 +65,13 @@ static inline void s3c_pm_debug_init(void)
 #else
 #define s3c_pm_debug_init() do { } while(0)
 
-#endif /* CONFIG_S3C2410_PM_DEBUG */
+#endif /* CONFIG_SAMSUNG_PM_DEBUG */
 
 /* Save the UART configurations if we are configured for debug. */
 
 unsigned char pm_uart_udivslot;
 
-#ifdef CONFIG_S3C2410_PM_DEBUG
+#ifdef CONFIG_SAMSUNG_PM_DEBUG
 
 struct pm_uart_save uart_save[CONFIG_SERIAL_SAMSUNG_UARTS];
 
diff --git a/arch/arm/plat-s3c/pwm-clock.c b/arch/arm/plat-samsung/pwm-clock.c
index a318215ab535..46c9381e083b 100644
--- a/arch/arm/plat-s3c/pwm-clock.c
+++ b/arch/arm/plat-samsung/pwm-clock.c
@@ -130,20 +130,22 @@ static int clk_pwm_scaler_set_rate(struct clk *clk, unsigned long rate)
         return 0;
 }
 
+static struct clk_ops clk_pwm_scaler_ops = {
+        .get_rate       = clk_pwm_scaler_get_rate,
+        .set_rate       = clk_pwm_scaler_set_rate,
+        .round_rate     = clk_pwm_scaler_round_rate,
+};
+
 static struct clk clk_timer_scaler[] = {
         [0]     = {
                 .name           = "pwm-scaler0",
                 .id             = -1,
-                .get_rate       = clk_pwm_scaler_get_rate,
-                .set_rate       = clk_pwm_scaler_set_rate,
-                .round_rate     = clk_pwm_scaler_round_rate,
+                .ops            = &clk_pwm_scaler_ops,
         },
         [1]     = {
                 .name           = "pwm-scaler1",
                 .id             = -1,
-                .get_rate       = clk_pwm_scaler_get_rate,
-                .set_rate       = clk_pwm_scaler_set_rate,
-                .round_rate     = clk_pwm_scaler_round_rate,
+                .ops            = &clk_pwm_scaler_ops,
         },
 };
 
@@ -256,50 +258,46 @@ static int clk_pwm_tdiv_set_rate(struct clk *clk, unsigned long rate)
         return 0;
 }
 
+static struct clk_ops clk_tdiv_ops = {
+        .get_rate       = clk_pwm_tdiv_get_rate,
+        .set_rate       = clk_pwm_tdiv_set_rate,
+        .round_rate     = clk_pwm_tdiv_round_rate,
+};
+
 static struct pwm_tdiv_clk clk_timer_tdiv[] = {
         [0]     = {
                 .clk    = {
-                        .name           = "pwm-tdiv",
-                        .parent         = &clk_timer_scaler[0],
-                        .get_rate       = clk_pwm_tdiv_get_rate,
-                        .set_rate       = clk_pwm_tdiv_set_rate,
-                        .round_rate     = clk_pwm_tdiv_round_rate,
+                        .name   = "pwm-tdiv",
+                        .ops    = &clk_tdiv_ops,
+                        .parent = &clk_timer_scaler[0],
                 },
         },
         [1]     = {
                 .clk    = {
-                        .name           = "pwm-tdiv",
-                        .parent         = &clk_timer_scaler[0],
-                        .get_rate       = clk_pwm_tdiv_get_rate,
-                        .set_rate       = clk_pwm_tdiv_set_rate,
-                        .round_rate     = clk_pwm_tdiv_round_rate,
+                        .name   = "pwm-tdiv",
+                        .ops    = &clk_tdiv_ops,
+                        .parent = &clk_timer_scaler[0],
                 }
         },
         [2]     = {
                 .clk    = {
-                        .name           = "pwm-tdiv",
-                        .parent         = &clk_timer_scaler[1],
-                        .get_rate       = clk_pwm_tdiv_get_rate,
-                        .set_rate       = clk_pwm_tdiv_set_rate,
-                        .round_rate     = clk_pwm_tdiv_round_rate,
+                        .name   = "pwm-tdiv",
+                        .ops    = &clk_tdiv_ops,
+                        .parent = &clk_timer_scaler[1],
                 },
         },
         [3]     = {
                 .clk    = {
-                        .name           = "pwm-tdiv",
-                        .parent         = &clk_timer_scaler[1],
-                        .get_rate       = clk_pwm_tdiv_get_rate,
-                        .set_rate       = clk_pwm_tdiv_set_rate,
-                        .round_rate     = clk_pwm_tdiv_round_rate,
+                        .name   = "pwm-tdiv",
+                        .ops    = &clk_tdiv_ops,
+                        .parent = &clk_timer_scaler[1],
                 },
         },
         [4]     = {
                 .clk    = {
-                        .name           = "pwm-tdiv",
-                        .parent         = &clk_timer_scaler[1],
-                        .get_rate       = clk_pwm_tdiv_get_rate,
-                        .set_rate       = clk_pwm_tdiv_set_rate,
-                        .round_rate     = clk_pwm_tdiv_round_rate,
+                        .name   = "pwm-tdiv",
+                        .ops    = &clk_tdiv_ops,
+                        .parent = &clk_timer_scaler[1],
                 },
         },
 };
@@ -356,31 +354,35 @@ static int clk_pwm_tin_set_parent(struct clk *clk, struct clk *parent)
         return 0;
 }
 
+static struct clk_ops clk_tin_ops = {
+        .set_parent     = clk_pwm_tin_set_parent,
+};
+
 static struct clk clk_tin[] = {
         [0]     = {
-                .name           = "pwm-tin",
-                .id             = 0,
-                .set_parent     = clk_pwm_tin_set_parent,
+                .name   = "pwm-tin",
+                .id     = 0,
+                .ops    = &clk_tin_ops,
         },
         [1]     = {
-                .name           = "pwm-tin",
-                .id             = 1,
-                .set_parent     = clk_pwm_tin_set_parent,
+                .name   = "pwm-tin",
+                .id     = 1,
+                .ops    = &clk_tin_ops,
         },
         [2]     = {
-                .name           = "pwm-tin",
-                .id             = 2,
-                .set_parent     = clk_pwm_tin_set_parent,
+                .name   = "pwm-tin",
+                .id     = 2,
+                .ops    = &clk_tin_ops,
         },
         [3]     = {
-                .name           = "pwm-tin",
-                .id             = 3,
-                .set_parent     = clk_pwm_tin_set_parent,
+                .name   = "pwm-tin",
+                .id     = 3,
+                .ops    = &clk_tin_ops,
         },
         [4]     = {
-                .name           = "pwm-tin",
-                .id             = 4,
-                .set_parent     = clk_pwm_tin_set_parent,
+                .name   = "pwm-tin",
+                .id     = 4,
+                .ops    = &clk_tin_ops,
         },
 };
 
@@ -428,25 +430,15 @@ __init void s3c_pwmclk_init(void)
                 return;
         }
 
-        for (clk = 0; clk < ARRAY_SIZE(clk_timer_scaler); clk++) {
+        for (clk = 0; clk < ARRAY_SIZE(clk_timer_scaler); clk++)
                 clk_timer_scaler[clk].parent = clk_timers;
-                ret = s3c24xx_register_clock(&clk_timer_scaler[clk]);
-                if (ret < 0) {
-                        printk(KERN_ERR "error adding pwm scaler%d clock\n", clk);
-                        return;
-                }
-        }
 
-        for (clk = 0; clk < ARRAY_SIZE(clk_timer_tclk); clk++) {
-                ret = s3c24xx_register_clock(&clk_timer_tclk[clk]);
-                if (ret < 0) {
-                        printk(KERN_ERR "error adding pww tclk%d\n", clk);
-                        return;
-                }
-        }
+        s3c_register_clocks(clk_timer_scaler, ARRAY_SIZE(clk_timer_scaler));
+        s3c_register_clocks(clk_timer_tclk, ARRAY_SIZE(clk_timer_tclk));
 
         for (clk = 0; clk < ARRAY_SIZE(clk_timer_tdiv); clk++) {
                 ret = clk_pwm_tdiv_register(clk);
+
                 if (ret < 0) {
                         printk(KERN_ERR "error adding pwm%d tdiv clock\n", clk);
                         return;
diff --git a/arch/arm/plat-s3c/pwm.c b/arch/arm/plat-samsung/pwm.c
index ef019f27b67d..ef019f27b67d 100644
--- a/arch/arm/plat-s3c/pwm.c
+++ b/arch/arm/plat-samsung/pwm.c
diff --git a/arch/arm/plat-s3c/time.c b/arch/arm/plat-samsung/time.c
index 3b27b29da478..2231d80ad817 100644
--- a/arch/arm/plat-s3c/time.c
+++ b/arch/arm/plat-samsung/time.c
@@ -1,4 +1,4 @@
-/* linux/arch/arm/plat-s3c24xx/time.c
+/* linux/arch/arm/plat-samsung/time.c
  *
  * Copyright (C) 2003-2005 Simtec Electronics
  *      Ben Dooks, <ben@simtec.co.uk>
diff --git a/arch/avr32/include/asm/ptrace.h b/arch/avr32/include/asm/ptrace.h
index 9e2d44f4e0fe..e53dd0d900f5 100644
--- a/arch/avr32/include/asm/ptrace.h
+++ b/arch/avr32/include/asm/ptrace.h
@@ -124,6 +124,8 @@ struct pt_regs {
 
 #include <asm/ocd.h>
 
+#define arch_has_single_step()          (1)
+
 #define arch_ptrace_attach(child)       ocd_enable(child)
 
 #define user_mode(regs)                 (((regs)->sr & MODE_MASK) == MODE_USER)
diff --git a/arch/avr32/kernel/ptrace.c b/arch/avr32/kernel/ptrace.c
index 1fed38fcf594..dd5b882aab40 100644
--- a/arch/avr32/kernel/ptrace.c
+++ b/arch/avr32/kernel/ptrace.c
@@ -28,9 +28,9 @@ static struct pt_regs *get_user_regs(struct task_struct *tsk)
                                   THREAD_SIZE - sizeof(struct pt_regs));
 }
 
-static void ptrace_single_step(struct task_struct *tsk)
+static void user_enable_single_step(struct task_struct *tsk)
 {
-        pr_debug("ptrace_single_step: pid=%u, PC=0x%08lx, SR=0x%08lx\n",
+        pr_debug("user_enable_single_step: pid=%u, PC=0x%08lx, SR=0x%08lx\n",
                  tsk->pid, task_pt_regs(tsk)->pc, task_pt_regs(tsk)->sr);
 
         /*
@@ -49,6 +49,11 @@ static void ptrace_single_step(struct task_struct *tsk)
         set_tsk_thread_flag(tsk, TIF_SINGLE_STEP);
 }
 
+void user_disable_single_step(struct task_struct *child)
+{
+        /* XXX(hch): a no-op here seems wrong.. */
+}
+
 /*
  * Called by kernel/ptrace.c when detaching
  *
@@ -167,50 +172,6 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
                 ret = ptrace_write_user(child, addr, data);
                 break;
 
-        /* continue and stop at next (return from) syscall */
-        case PTRACE_SYSCALL:
-        /* restart after signal */
-        case PTRACE_CONT:
-                ret = -EIO;
-                if (!valid_signal(data))
-                        break;
-                if (request == PTRACE_SYSCALL)
-                        set_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
-                else
-                        clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
-                child->exit_code = data;
-                /* XXX: Are we sure no breakpoints are active here? */
-                wake_up_process(child);
-                ret = 0;
-                break;
-
-        /*
-         * Make the child exit. Best I can do is send it a
-         * SIGKILL. Perhaps it should be put in the status that it
-         * wants to exit.
-         */
-        case PTRACE_KILL:
-                ret = 0;
-                if (child->exit_state == EXIT_ZOMBIE)
-                        break;
-                child->exit_code = SIGKILL;
-                wake_up_process(child);
-                break;
-
-        /*
-         * execute single instruction.
-         */
-        case PTRACE_SINGLESTEP:
-                ret = -EIO;
-                if (!valid_signal(data))
-                        break;
-                clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
-                ptrace_single_step(child);
-                child->exit_code = data;
-                wake_up_process(child);
-                ret = 0;
-                break;
-
         case PTRACE_GETREGS:
                 ret = ptrace_getregs(child, (void __user *)data);
                 break;
diff --git a/arch/blackfin/include/asm/dma-mapping.h b/arch/blackfin/include/asm/dma-mapping.h
index f9172ff30e5c..413a30314a6f 100644
--- a/arch/blackfin/include/asm/dma-mapping.h
+++ b/arch/blackfin/include/asm/dma-mapping.h
@@ -65,13 +65,6 @@ _dma_sync(dma_addr_t addr, size_t size, enum dma_data_direction dir)
         }
 }
 
-/*
- * Map a single buffer of the indicated size for DMA in streaming mode.
- * The 32-bit bus address to use is returned.
- *
- * Once the device is given the dma address, the device owns this memory
- * until either pci_unmap_single or pci_dma_sync_single is performed.
- */
 static inline dma_addr_t
 dma_map_single(struct device *dev, void *ptr, size_t size,
                enum dma_data_direction dir)
@@ -88,14 +81,6 @@ dma_map_page(struct device *dev, struct page *page,
         return dma_map_single(dev, page_address(page) + offset, size, dir);
 }
 
-/*
- * Unmap a single streaming mode DMA translation.  The dma_addr and size
- * must match what was provided for in a previous pci_map_single call.  All
- * other usages are undefined.
- *
- * After this call, reads by the cpu to the buffer are guarenteed to see
- * whatever the device wrote there.
- */
 static inline void
 dma_unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size,
                  enum dma_data_direction dir)
@@ -110,30 +95,9 @@ dma_unmap_page(struct device *dev, dma_addr_t dma_addr, size_t size,
         dma_unmap_single(dev, dma_addr, size, dir);
 }
 
-/*
- * Map a set of buffers described by scatterlist in streaming
- * mode for DMA.  This is the scather-gather version of the
- * above pci_map_single interface.  Here the scatter gather list
- * elements are each tagged with the appropriate dma address
- * and length.  They are obtained via sg_dma_{address,length}(SG).
- *
- * NOTE: An implementation may be able to use a smaller number of
- *       DMA address/length pairs than there are SG table elements.
- *       (for example via virtual mapping capabilities)
- *       The routine returns the number of addr/length pairs actually
- *       used, at most nents.
- *
- * Device ownership issues as mentioned above for pci_map_single are
- * the same here.
- */
 extern int dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
                       enum dma_data_direction dir);
 
-/*
- * Unmap a set of streaming mode DMA translations.
- * Again, cpu read rules concerning calls here are the same as for
- * pci_unmap_single() above.
- */
 static inline void
 dma_unmap_sg(struct device *dev, struct scatterlist *sg,
              int nhwentries, enum dma_data_direction dir)
diff --git a/arch/blackfin/include/asm/nand.h b/arch/blackfin/include/asm/nand.h
index 3ae8b569edfc..3a1e79dfc8d9 100644
--- a/arch/blackfin/include/asm/nand.h
+++ b/arch/blackfin/include/asm/nand.h
@@ -1,5 +1,5 @@
 /*
- * BF5XX - NAND flash controller platfrom_device info
+ * BF5XX - NAND flash controller platform_device info
  *
  * Copyright 2007-2008 Analog Devices, Inc.
  *
@@ -8,7 +8,7 @@
 
 /* struct bf5xx_nand_platform
  *
- * define a interface between platfrom board specific code and
+ * define a interface between platform board specific code and
  * bf54x NFC driver.
  *
  * nr_partitions = number of partitions pointed to be partitoons (or zero)
diff --git a/arch/cris/arch-v10/kernel/entry.S b/arch/cris/arch-v10/kernel/entry.S
index c52bef39e250..0d6420d087fd 100644
--- a/arch/cris/arch-v10/kernel/entry.S
+++ b/arch/cris/arch-v10/kernel/entry.S
@@ -692,7 +692,7 @@ sys_call_table:
         .long sys_swapon
         .long sys_reboot
         .long sys_old_readdir
-        .long old_mmap          /* 90 */
+        .long sys_old_mmap      /* 90 */
         .long sys_munmap
         .long sys_truncate
         .long sys_ftruncate
diff --git a/arch/cris/arch-v10/kernel/ptrace.c b/arch/cris/arch-v10/kernel/ptrace.c
index ee505b2eb4db..e70c804e9377 100644
--- a/arch/cris/arch-v10/kernel/ptrace.c
+++ b/arch/cris/arch-v10/kernel/ptrace.c
@@ -127,57 +127,6 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
                         ret = 0;
                         break;
 
-                case PTRACE_SYSCALL:
-                case PTRACE_CONT:
-                        ret = -EIO;
-                        
-                        if (!valid_signal(data))
-                                break;
-                        
-                        if (request == PTRACE_SYSCALL) {
-                                set_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
-                        }
-                        else {
-                                clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
-                        }
-                        
-                        child->exit_code = data;
-                        
-                        /* TODO: make sure any pending breakpoint is killed */
-                        wake_up_process(child);
-                        ret = 0;
-                        
-                        break;
-                
-                /* Make the child exit by sending it a sigkill. */
-                case PTRACE_KILL:
-                        ret = 0;
-                        
-                        if (child->exit_state == EXIT_ZOMBIE)
-                                break;
-                        
-                        child->exit_code = SIGKILL;
-                        
-                        /* TODO: make sure any pending breakpoint is killed */
-                        wake_up_process(child);
-                        break;
-
-                /* Set the trap flag. */
-                case PTRACE_SINGLESTEP:
-                        ret = -EIO;
-                        
-                        if (!valid_signal(data))
-                                break;
-                        
-                        clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
-
-                        /* TODO: set some clever breakpoint mechanism... */
-
-                        child->exit_code = data;
-                        wake_up_process(child);
-                        ret = 0;
-                        break;
-
                 /* Get all GP registers from the child. */
                 case PTRACE_GETREGS: {
                         int i;
diff --git a/arch/cris/arch-v10/lib/old_checksum.c b/arch/cris/arch-v10/lib/old_checksum.c
index 1734b467efa6..8f79163f1394 100644
--- a/arch/cris/arch-v10/lib/old_checksum.c
+++ b/arch/cris/arch-v10/lib/old_checksum.c
@@ -77,7 +77,7 @@ __wsum csum_partial(const void *p, int len, __wsum __sum)
                 sum += *buff++;
 
         if (endMarker > buff)
-                sum += *(const u8 *)buff;       /* add extra byte seperately */
+                sum += *(const u8 *)buff;       /* add extra byte separately */
 
         BITOFF;
         return (__force __wsum)sum;
diff --git a/arch/cris/arch-v32/kernel/entry.S b/arch/cris/arch-v32/kernel/entry.S
index 435b9671bd4b..1f39861eac8c 100644
--- a/arch/cris/arch-v32/kernel/entry.S
+++ b/arch/cris/arch-v32/kernel/entry.S
@@ -615,7 +615,7 @@ sys_call_table:
         .long sys_swapon
         .long sys_reboot
         .long sys_old_readdir
-        .long old_mmap          /* 90 */
+        .long sys_old_mmap      /* 90 */
         .long sys_munmap
         .long sys_truncate
         .long sys_ftruncate
diff --git a/arch/cris/arch-v32/kernel/ptrace.c b/arch/cris/arch-v32/kernel/ptrace.c
index dd401473f5b5..f4ebd1e7d0f5 100644
--- a/arch/cris/arch-v32/kernel/ptrace.c
+++ b/arch/cris/arch-v32/kernel/ptrace.c
@@ -78,6 +78,35 @@ int put_reg(struct task_struct *task, unsigned int regno, unsigned long data)
         return 0;
 }
 
+void user_enable_single_step(struct task_struct *child)
+{
+        unsigned long tmp;
+
+        /*
+         * Set up SPC if not set already (in which case we have no other
+         * choice but to trust it).
+         */
+        if (!get_reg(child, PT_SPC)) {
+                /* In case we're stopped in a delay slot. */
+                tmp = get_reg(child, PT_ERP) & ~1;
+                put_reg(child, PT_SPC, tmp);
+        }
+        tmp = get_reg(child, PT_CCS) | SBIT_USER;
+        put_reg(child, PT_CCS, tmp);
+}
+
+void user_disable_single_step(struct task_struct *child)
+{
+        put_reg(child, PT_SPC, 0);
+
+        if (!get_debugreg(child->pid, PT_BP_CTRL)) {
+                unsigned long tmp;
+                /* If no h/w bp configured, disable S bit. */
+                tmp = get_reg(child, PT_CCS) & ~SBIT_USER;
+                put_reg(child, PT_CCS, tmp);
+        }
+}
+
 /*
  * Called by kernel/ptrace.c when detaching.
  *
@@ -89,8 +118,7 @@ ptrace_disable(struct task_struct *child)
         unsigned long tmp;
 
         /* Deconfigure SPC and S-bit. */
-        tmp = get_reg(child, PT_CCS) & ~SBIT_USER;
-        put_reg(child, PT_CCS, tmp);
+        user_disable_single_step(child);
         put_reg(child, PT_SPC, 0);
 
         /* Deconfigure any watchpoints associated with the child. */
@@ -169,83 +197,6 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
                         ret = 0;
                         break;
 
-                case PTRACE_SYSCALL:
-                case PTRACE_CONT:
-                        ret = -EIO;
-
-                        if (!valid_signal(data))
-                                break;
-
-                        /* Continue means no single-step. */
-                        put_reg(child, PT_SPC, 0);
-
-                        if (!get_debugreg(child->pid, PT_BP_CTRL)) {
-                                unsigned long tmp;
-                                /* If no h/w bp configured, disable S bit. */
-                                tmp = get_reg(child, PT_CCS) & ~SBIT_USER;
-                                put_reg(child, PT_CCS, tmp);
-                        }
-
-                        if (request == PTRACE_SYSCALL) {
-                                set_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
-                        }
-                        else {
-                                clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
-                        }
-
-                        child->exit_code = data;
-
-                        /* TODO: make sure any pending breakpoint is killed */
-                        wake_up_process(child);
-                        ret = 0;
-
-                        break;
-
-                /* Make the child exit by sending it a sigkill. */
-                case PTRACE_KILL:
-                        ret = 0;
-
-                        if (child->exit_state == EXIT_ZOMBIE)
-                                break;
-
-                        child->exit_code = SIGKILL;
-
-                        /* Deconfigure single-step and h/w bp. */
-                        ptrace_disable(child);
-
-                        /* TODO: make sure any pending breakpoint is killed */
-                        wake_up_process(child);
-                        break;
-
-                /* Set the trap flag. */
-                case PTRACE_SINGLESTEP: {
-                        unsigned long tmp;
-                        ret = -EIO;
-
-                        /* Set up SPC if not set already (in which case we have
-                           no other choice but to trust it). */
-                        if (!get_reg(child, PT_SPC)) {
-                                /* In case we're stopped in a delay slot. */
-                                tmp = get_reg(child, PT_ERP) & ~1;
-                                put_reg(child, PT_SPC, tmp);
-                        }
-                        tmp = get_reg(child, PT_CCS) | SBIT_USER;
-                        put_reg(child, PT_CCS, tmp);
-
-                        if (!valid_signal(data))
-                                break;
-
-                        clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
-
-                        /* TODO: set some clever breakpoint mechanism... */
-
-                        child->exit_code = data;
-                        wake_up_process(child);
-                        ret = 0;
-                        break;
-
-                }
-
                 /* Get all GP registers from the child. */
                 case PTRACE_GETREGS: {
                         int i;
diff --git a/arch/cris/arch-v32/mm/tlb.c b/arch/cris/arch-v32/mm/tlb.c
index 6779bcb28ab0..c030d020660a 100644
--- a/arch/cris/arch-v32/mm/tlb.c
+++ b/arch/cris/arch-v32/mm/tlb.c
@@ -189,7 +189,7 @@ switch_mm(struct mm_struct *prev, struct mm_struct *next,
                 spin_unlock(&mmu_context_lock);
 
                 /*
-                 * Remember the pgd for the fault handlers. Keep a seperate
+                 * Remember the pgd for the fault handlers. Keep a separate
                  * copy of it because current and active_mm might be invalid
                  * at points where * there's still a need to derefer the pgd.
                  */
diff --git a/arch/cris/include/arch-v32/arch/ptrace.h b/arch/cris/include/arch-v32/arch/ptrace.h
index 41f4e8662bc2..ffca8d0f2e17 100644
--- a/arch/cris/include/arch-v32/arch/ptrace.h
+++ b/arch/cris/include/arch-v32/arch/ptrace.h
@@ -108,6 +108,7 @@ struct switch_stack {
 
 #ifdef __KERNEL__
 
+#define arch_has_single_step() (1)
 #define user_mode(regs) (((regs)->ccs & (1 << (U_CCS_BITNR + CCS_SHIFT))) != 0)
 #define instruction_pointer(regs) ((regs)->erp)
 extern void show_regs(struct pt_regs *);
diff --git a/arch/cris/include/asm/pci.h b/arch/cris/include/asm/pci.h
index 730ce40fdd0f..9f1cd56da28c 100644
--- a/arch/cris/include/asm/pci.h
+++ b/arch/cris/include/asm/pci.h
@@ -44,14 +44,6 @@ struct pci_dev;
  */
 #define PCI_DMA_BUS_IS_PHYS     (1)
 
-/* pci_unmap_{page,single} is a nop so... */
-#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME)
-#define DECLARE_PCI_UNMAP_LEN(LEN_NAME)
-#define pci_unmap_addr(PTR, ADDR_NAME)          (0)
-#define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) do { } while (0)
-#define pci_unmap_len(PTR, LEN_NAME)            (0)
-#define pci_unmap_len_set(PTR, LEN_NAME, VAL)   do { } while (0)
-
 #define HAVE_PCI_MMAP
 extern int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,
                                enum pci_mmap_state mmap_state, int write_combine);
diff --git a/arch/cris/include/asm/unistd.h b/arch/cris/include/asm/unistd.h
index c17079388bb9..f6fad83b3a8c 100644
--- a/arch/cris/include/asm/unistd.h
+++ b/arch/cris/include/asm/unistd.h
@@ -352,6 +352,7 @@
 #define __ARCH_WANT_STAT64
 #define __ARCH_WANT_SYS_ALARM
 #define __ARCH_WANT_SYS_GETHOSTNAME
+#define __ARCH_WANT_SYS_IPC
 #define __ARCH_WANT_SYS_PAUSE
 #define __ARCH_WANT_SYS_SGETMASK
 #define __ARCH_WANT_SYS_SIGNAL
@@ -364,6 +365,7 @@
 #define __ARCH_WANT_SYS_LLSEEK
 #define __ARCH_WANT_SYS_NICE
 #define __ARCH_WANT_SYS_OLD_GETRLIMIT
+#define __ARCH_WANT_SYS_OLD_MMAP
 #define __ARCH_WANT_SYS_OLDUMOUNT
 #define __ARCH_WANT_SYS_SIGPENDING
 #define __ARCH_WANT_SYS_SIGPROCMASK
diff --git a/arch/cris/kernel/sys_cris.c b/arch/cris/kernel/sys_cris.c
index c2bbb1ac98a9..7aa036ec78ff 100644
--- a/arch/cris/kernel/sys_cris.c
+++ b/arch/cris/kernel/sys_cris.c
@@ -26,24 +26,6 @@
 #include <asm/uaccess.h>
 #include <asm/segment.h>
 
-asmlinkage unsigned long old_mmap(unsigned long __user *args)
-{        
-        unsigned long buffer[6];
-        int err = -EFAULT;
-
-        if (copy_from_user(&buffer, args, sizeof(buffer)))
-                goto out;
-
-        err = -EINVAL;
-        if (buffer[5] & ~PAGE_MASK) /* verify that offset is on page boundary */
-                goto out;
-
-        err = sys_mmap_pgoff(buffer[0], buffer[1], buffer[2], buffer[3],
-                       buffer[4], buffer[5] >> PAGE_SHIFT);
-out:
-        return err;
-}
-
 asmlinkage long
 sys_mmap2(unsigned long addr, unsigned long len, unsigned long prot,
           unsigned long flags, unsigned long fd, unsigned long pgoff)
@@ -51,81 +33,3 @@ sys_mmap2(unsigned long addr, unsigned long len, unsigned long prot,
         /* bug(?): 8Kb pages here */
         return sys_mmap_pgoff(addr, len, prot, flags, fd, pgoff);
 }
-
-/*
- * sys_ipc() is the de-multiplexer for the SysV IPC calls..
- *
- * This is really horribly ugly. (same as arch/i386)
- */
-
-asmlinkage int sys_ipc (uint call, int first, int second,
-                        int third, void __user *ptr, long fifth)
-{
-        int version, ret;
-
-        version = call >> 16; /* hack for backward compatibility */
-        call &= 0xffff;
-
-        switch (call) {
-        case SEMOP:
-                return sys_semtimedop (first, (struct sembuf __user *)ptr, second, NULL);
-        case SEMTIMEDOP:
-                return sys_semtimedop(first, (struct sembuf __user *)ptr, second,
-                                        (const struct timespec __user *)fifth);
-
-        case SEMGET:
-                return sys_semget (first, second, third);
-        case SEMCTL: {
-                union semun fourth;
-                if (!ptr)
-                        return -EINVAL;
-                if (get_user(fourth.__pad, (void * __user *) ptr))
-                        return -EFAULT;
-                return sys_semctl (first, second, third, fourth);
-        }
-
-        case MSGSND:
-                return sys_msgsnd (first, (struct msgbuf __user *) ptr, 
-                                   second, third);
-        case MSGRCV:
-                switch (version) {
-                case 0: {
-                        struct ipc_kludge tmp;
-                        if (!ptr)
-                                return -EINVAL;
-                        
-                        if (copy_from_user(&tmp,
-                                           (struct ipc_kludge __user *) ptr, 
-                                           sizeof (tmp)))
-                                return -EFAULT;
-                        return sys_msgrcv (first, tmp.msgp, second,
-                                           tmp.msgtyp, third);
-                }
-                default:
-                        return sys_msgrcv (first,
-                                           (struct msgbuf __user *) ptr,
-                                           second, fifth, third);
-                }
-        case MSGGET:
-                return sys_msgget ((key_t) first, second);
-        case MSGCTL:
-                return sys_msgctl (first, second, (struct msqid_ds __user *) ptr);
-
-        case SHMAT: {
-                ulong raddr;
-                ret = do_shmat (first, (char __user *) ptr, second, &raddr);
-                if (ret)
-                        return ret;
-                return put_user (raddr, (ulong __user *) third);
-        }
-        case SHMDT: 
-                return sys_shmdt ((char __user *)ptr);
-        case SHMGET:
-                return sys_shmget (first, second, third);
-        case SHMCTL:
-                return sys_shmctl (first, second,
-                                   (struct shmid_ds __user *) ptr);
-        default:
-                return -ENOSYS;
-        }
-}
diff --git a/arch/frv/include/asm/dma-mapping.h b/arch/frv/include/asm/dma-mapping.h
index b2898877c07b..6af5d83e2fb2 100644
--- a/arch/frv/include/asm/dma-mapping.h
+++ b/arch/frv/include/asm/dma-mapping.h
@@ -7,6 +7,11 @@
 #include <asm/scatterlist.h>
 #include <asm/io.h>
 
+/*
+ * See Documentation/DMA-API.txt for the description of how the
+ * following DMA API should work.
+ */
+
 #define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
 #define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
 
@@ -16,24 +21,9 @@ extern unsigned long __nongprelbss dma_coherent_mem_end;
 void *dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t *dma_handle, gfp_t gfp);
 void dma_free_coherent(struct device *dev, size_t size, void *vaddr, dma_addr_t dma_handle);
 
-/*
- * Map a single buffer of the indicated size for DMA in streaming mode.
- * The 32-bit bus address to use is returned.
- *
- * Once the device is given the dma address, the device owns this memory
- * until either pci_unmap_single or pci_dma_sync_single is performed.
- */
 extern dma_addr_t dma_map_single(struct device *dev, void *ptr, size_t size,
                                  enum dma_data_direction direction);
 
-/*
- * Unmap a single streaming mode DMA translation.  The dma_addr and size
- * must match what was provided for in a previous pci_map_single call.  All
- * other usages are undefined.
- *
- * After this call, reads by the cpu to the buffer are guarenteed to see
- * whatever the device wrote there.
- */
 static inline
 void dma_unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size,
                       enum dma_data_direction direction)
@@ -41,30 +31,9 @@ void dma_unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size,
         BUG_ON(direction == DMA_NONE);
 }
 
-/*
- * Map a set of buffers described by scatterlist in streaming
- * mode for DMA.  This is the scather-gather version of the
- * above pci_map_single interface.  Here the scatter gather list
- * elements are each tagged with the appropriate dma address
- * and length.  They are obtained via sg_dma_{address,length}(SG).
- *
- * NOTE: An implementation may be able to use a smaller number of
- *       DMA address/length pairs than there are SG table elements.
- *       (for example via virtual mapping capabilities)
- *       The routine returns the number of addr/length pairs actually
- *       used, at most nents.
- *
- * Device ownership issues as mentioned above for pci_map_single are
- * the same here.
- */
 extern int dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
                       enum dma_data_direction direction);
 
-/*
- * Unmap a set of streaming mode DMA translations.
- * Again, cpu read rules concerning calls here are the same as for
- * pci_unmap_single() above.
- */
 static inline
 void dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nhwentries,
              enum dma_data_direction direction)
diff --git a/arch/frv/include/asm/pci.h b/arch/frv/include/asm/pci.h
index 8c7260a3cd41..0d5997909850 100644
--- a/arch/frv/include/asm/pci.h
+++ b/arch/frv/include/asm/pci.h
@@ -43,14 +43,6 @@ extern void pci_free_consistent(struct pci_dev *hwdev, size_t size,
 /* Return the index of the PCI controller for device PDEV. */
 #define pci_controller_num(PDEV)        (0)
 
-/* pci_unmap_{page,single} is a nop so... */
-#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME)
-#define DECLARE_PCI_UNMAP_LEN(LEN_NAME)
-#define pci_unmap_addr(PTR, ADDR_NAME)          (0)
-#define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) do { } while (0)
-#define pci_unmap_len(PTR, LEN_NAME)            (0)
-#define pci_unmap_len_set(PTR, LEN_NAME, VAL)   do { } while (0)
-
 #ifdef CONFIG_PCI
 static inline void pci_dma_burst_advice(struct pci_dev *pdev,
                                         enum pci_dma_burst_strategy *strat,
diff --git a/arch/frv/include/asm/ptrace.h b/arch/frv/include/asm/ptrace.h
index a54b535c9e49..6bfad4cf1907 100644
--- a/arch/frv/include/asm/ptrace.h
+++ b/arch/frv/include/asm/ptrace.h
@@ -84,8 +84,6 @@ extern void show_regs(struct pt_regs *);
 #define task_pt_regs(task) ((task)->thread.frame0)
 
 #define arch_has_single_step()  (1)
-extern void user_enable_single_step(struct task_struct *);
-extern void user_disable_single_step(struct task_struct *);
 
 #endif /* !__ASSEMBLY__ */
 #endif /* __KERNEL__ */
diff --git a/arch/frv/include/asm/unistd.h b/arch/frv/include/asm/unistd.h
index be6ef0f5cd42..b28da499e22a 100644
--- a/arch/frv/include/asm/unistd.h
+++ b/arch/frv/include/asm/unistd.h
@@ -354,6 +354,7 @@
 #define __ARCH_WANT_STAT64
 #define __ARCH_WANT_SYS_ALARM
 /* #define __ARCH_WANT_SYS_GETHOSTNAME */
+#define __ARCH_WANT_SYS_IPC
 #define __ARCH_WANT_SYS_PAUSE
 /* #define __ARCH_WANT_SYS_SGETMASK */
 /* #define __ARCH_WANT_SYS_SIGNAL */
diff --git a/arch/frv/kernel/sys_frv.c b/arch/frv/kernel/sys_frv.c
index 1d3d4c9e2521..9c4980825bbb 100644
--- a/arch/frv/kernel/sys_frv.c
+++ b/arch/frv/kernel/sys_frv.c
@@ -42,92 +42,3 @@ asmlinkage long sys_mmap2(unsigned long addr, unsigned long len,
         return sys_mmap_pgoff(addr, len, prot, flags, fd,
                               pgoff >> (PAGE_SHIFT - 12));
 }
-
-/*
- * sys_ipc() is the de-multiplexer for the SysV IPC calls..
- *
- * This is really horribly ugly.
- */
-asmlinkage long sys_ipc(unsigned long call,
-                        unsigned long first,
-                        unsigned long second,
-                        unsigned long third,
-                        void __user *ptr,
-                        unsigned long fifth)
-{
-        int version, ret;
-
-        version = call >> 16; /* hack for backward compatibility */
-        call &= 0xffff;
-
-        switch (call) {
-        case SEMOP:
-                return sys_semtimedop(first, (struct sembuf __user *)ptr, second, NULL);
-        case SEMTIMEDOP:
-                return sys_semtimedop(first, (struct sembuf __user *)ptr, second,
-                                      (const struct timespec __user *)fifth);
-
-        case SEMGET:
-                return sys_semget (first, second, third);
-        case SEMCTL: {
-                union semun fourth;
-                if (!ptr)
-                        return -EINVAL;
-                if (get_user(fourth.__pad, (void * __user *) ptr))
-                        return -EFAULT;
-                return sys_semctl (first, second, third, fourth);
-        }
-
-        case MSGSND:
-                return sys_msgsnd (first, (struct msgbuf __user *) ptr,
-                                   second, third);
-        case MSGRCV:
-                switch (version) {
-                case 0: {
-                        struct ipc_kludge tmp;
-                        if (!ptr)
-                                return -EINVAL;
-
-                        if (copy_from_user(&tmp,
-                                           (struct ipc_kludge __user *) ptr,
-                                           sizeof (tmp)))
-                                return -EFAULT;
-                        return sys_msgrcv (first, tmp.msgp, second,
-                                           tmp.msgtyp, third);
-                }
-                default:
-                        return sys_msgrcv (first,
-                                           (struct msgbuf __user *) ptr,
-                                           second, fifth, third);
-                }
-        case MSGGET:
-                return sys_msgget ((key_t) first, second);
-        case MSGCTL:
-                return sys_msgctl (first, second, (struct msqid_ds __user *) ptr);
-
-        case SHMAT:
-                switch (version) {
-                default: {
-                        ulong raddr;
-                        ret = do_shmat (first, (char __user *) ptr, second, &raddr);
-                        if (ret)
-                                return ret;
-                        return put_user (raddr, (ulong __user *) third);
-                }
-                case 1: /* iBCS2 emulator entry point */
-                        if (!segment_eq(get_fs(), get_ds()))
-                                return -EINVAL;
-                        /* The "(ulong *) third" is valid _only_ because of the kernel segment thing */
-                        return do_shmat (first, (char __user *) ptr, second, (ulong *) third);
-                }
-        case SHMDT:
-                return sys_shmdt ((char __user *)ptr);
-        case SHMGET:
-                return sys_shmget (first, second, third);
-        case SHMCTL:
-                return sys_shmctl (first, second,
-                                   (struct shmid_ds __user *) ptr);
-        default:
-                return -ENOSYS;
-        }
-}
diff --git a/arch/frv/mb93090-mb00/pci-dma-nommu.c b/arch/frv/mb93090-mb00/pci-dma-nommu.c
index 4e1ba0b15443..e47857f889b6 100644
--- a/arch/frv/mb93090-mb00/pci-dma-nommu.c
+++ b/arch/frv/mb93090-mb00/pci-dma-nommu.c
@@ -106,13 +106,6 @@ void dma_free_coherent(struct device *hwdev, size_t size, void *vaddr, dma_addr_
 
 EXPORT_SYMBOL(dma_free_coherent);
 
-/*
- * Map a single buffer of the indicated size for DMA in streaming mode.
- * The 32-bit bus address to use is returned.
- *
- * Once the device is given the dma address, the device owns this memory
- * until either dma_unmap_single or pci_dma_sync_single is performed.
- */
 dma_addr_t dma_map_single(struct device *dev, void *ptr, size_t size,
                           enum dma_data_direction direction)
 {
@@ -125,22 +118,6 @@ dma_addr_t dma_map_single(struct device *dev, void *ptr, size_t size,
 
 EXPORT_SYMBOL(dma_map_single);
 
-/*
- * Map a set of buffers described by scatterlist in streaming
- * mode for DMA.  This is the scather-gather version of the
- * above dma_map_single interface.  Here the scatter gather list
- * elements are each tagged with the appropriate dma address
- * and length.  They are obtained via sg_dma_{address,length}(SG).
- *
- * NOTE: An implementation may be able to use a smaller number of
- *       DMA address/length pairs than there are SG table elements.
- *       (for example via virtual mapping capabilities)
- *       The routine returns the number of addr/length pairs actually
- *       used, at most nents.
- *
- * Device ownership issues as mentioned above for dma_map_single are
- * the same here.
- */
 int dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
                enum dma_data_direction direction)
 {
@@ -157,13 +134,6 @@ int dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
 
 EXPORT_SYMBOL(dma_map_sg);
 
-/*
- * Map a single page of the indicated size for DMA in streaming mode.
- * The 32-bit bus address to use is returned.
- *
- * Device ownership issues as mentioned above for dma_map_single are
- * the same here.
- */
 dma_addr_t dma_map_page(struct device *dev, struct page *page, unsigned long offset,
                         size_t size, enum dma_data_direction direction)
 {
diff --git a/arch/frv/mb93090-mb00/pci-dma.c b/arch/frv/mb93090-mb00/pci-dma.c
index 45954f0813dc..2c912e805162 100644
--- a/arch/frv/mb93090-mb00/pci-dma.c
+++ b/arch/frv/mb93090-mb00/pci-dma.c
@@ -38,13 +38,6 @@ void dma_free_coherent(struct device *hwdev, size_t size, void *vaddr, dma_addr_
 
 EXPORT_SYMBOL(dma_free_coherent);
 
-/*
- * Map a single buffer of the indicated size for DMA in streaming mode.
- * The 32-bit bus address to use is returned.
- *
- * Once the device is given the dma address, the device owns this memory
- * until either pci_unmap_single or pci_dma_sync_single is performed.
- */
 dma_addr_t dma_map_single(struct device *dev, void *ptr, size_t size,
                           enum dma_data_direction direction)
 {
@@ -57,22 +50,6 @@ dma_addr_t dma_map_single(struct device *dev, void *ptr, size_t size,
 
 EXPORT_SYMBOL(dma_map_single);
 
-/*
- * Map a set of buffers described by scatterlist in streaming
- * mode for DMA.  This is the scather-gather version of the
- * above dma_map_single interface.  Here the scatter gather list
- * elements are each tagged with the appropriate dma address
- * and length.  They are obtained via sg_dma_{address,length}(SG).
- *
- * NOTE: An implementation may be able to use a smaller number of
- *       DMA address/length pairs than there are SG table elements.
- *       (for example via virtual mapping capabilities)
- *       The routine returns the number of addr/length pairs actually
- *       used, at most nents.
- *
- * Device ownership issues as mentioned above for dma_map_single are
- * the same here.
- */
 int dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
                enum dma_data_direction direction)
 {
@@ -103,13 +80,6 @@ int dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
 
 EXPORT_SYMBOL(dma_map_sg);
 
-/*
- * Map a single page of the indicated size for DMA in streaming mode.
- * The 32-bit bus address to use is returned.
- *
- * Device ownership issues as mentioned above for dma_map_single are
- * the same here.
- */
 dma_addr_t dma_map_page(struct device *dev, struct page *page, unsigned long offset,
                         size_t size, enum dma_data_direction direction)
 {
diff --git a/arch/h8300/include/asm/io.h b/arch/h8300/include/asm/io.h
index 33e842f3284b..c1a8df22080f 100644
--- a/arch/h8300/include/asm/io.h
+++ b/arch/h8300/include/asm/io.h
@@ -25,7 +25,7 @@
  * memory location directly.
  */
 /* ++roman: The assignments to temp. vars avoid that gcc sometimes generates
- * two accesses to memory, which may be undesireable for some devices.
+ * two accesses to memory, which may be undesirable for some devices.
  */
 
 /*
diff --git a/arch/h8300/include/asm/ptrace.h b/arch/h8300/include/asm/ptrace.h
index c2e05e4b512e..d866c0efba87 100644
--- a/arch/h8300/include/asm/ptrace.h
+++ b/arch/h8300/include/asm/ptrace.h
@@ -55,6 +55,8 @@ struct pt_regs {
 /* Find the stack offset for a register, relative to thread.esp0. */
 #define PT_REG(reg)     ((long)&((struct pt_regs *)0)->reg)
 
+#define arch_has_single_step()  (1)
+
 #define user_mode(regs) (!((regs)->ccr & PS_S))
 #define instruction_pointer(regs) ((regs)->pc)
 #define profile_pc(regs) instruction_pointer(regs)
diff --git a/arch/h8300/include/asm/unistd.h b/arch/h8300/include/asm/unistd.h
index 99f3c3561ecb..50f2c5a36591 100644
--- a/arch/h8300/include/asm/unistd.h
+++ b/arch/h8300/include/asm/unistd.h
@@ -336,6 +336,7 @@
 #define __ARCH_WANT_STAT64
 #define __ARCH_WANT_SYS_ALARM
 #define __ARCH_WANT_SYS_GETHOSTNAME
+#define __ARCH_WANT_SYS_IPC
 #define __ARCH_WANT_SYS_PAUSE
 #define __ARCH_WANT_SYS_SGETMASK
 #define __ARCH_WANT_SYS_SIGNAL
@@ -348,6 +349,8 @@
 #define __ARCH_WANT_SYS_LLSEEK
 #define __ARCH_WANT_SYS_NICE
 #define __ARCH_WANT_SYS_OLD_GETRLIMIT
+#define __ARCH_WANT_SYS_OLD_MMAP
+#define __ARCH_WANT_SYS_OLD_SELECT
 #define __ARCH_WANT_SYS_OLDUMOUNT
 #define __ARCH_WANT_SYS_SIGPENDING
 #define __ARCH_WANT_SYS_SIGPROCMASK
diff --git a/arch/h8300/kernel/ptrace.c b/arch/h8300/kernel/ptrace.c
index d32bbf02fc48..df114122ebdf 100644
--- a/arch/h8300/kernel/ptrace.c
+++ b/arch/h8300/kernel/ptrace.c
@@ -34,25 +34,20 @@
 /* cpu depend functions */
 extern long h8300_get_reg(struct task_struct *task, int regno);
 extern int  h8300_put_reg(struct task_struct *task, int regno, unsigned long data);
-extern void h8300_disable_trace(struct task_struct *child);
-extern void h8300_enable_trace(struct task_struct *child);
+
+
+void user_disable_single_step(struct task_struct *child)
+{
+}
 
 /*
  * does not yet catch signals sent when the child dies.
  * in exit.c or in signal.c.
  */
 
-inline
-static int read_long(struct task_struct * tsk, unsigned long addr,
-        unsigned long * result)
-{
-        *result = *(unsigned long *)addr;
-        return 0;
-}
-
 void ptrace_disable(struct task_struct *child)
 {
-        h8300_disable_trace(child);
+        user_disable_single_step(child);
 }
 
 long arch_ptrace(struct task_struct *child, long request, long addr, long data)
@@ -60,17 +55,6 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
         int ret;
 
         switch (request) {
-                case PTRACE_PEEKTEXT: /* read word at location addr. */ 
-                case PTRACE_PEEKDATA: {
-                        unsigned long tmp;
-
-                        ret = read_long(child, addr, &tmp);
-                        if (ret < 0)
-                                break ;
-                        ret = put_user(tmp, (unsigned long *) data);
-                        break ;
-                }
-
         /* read the word at location addr in the USER area. */
                 case PTRACE_PEEKUSR: {
                         unsigned long tmp = 0;
@@ -109,11 +93,6 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
                 }
 
       /* when I and D space are separate, this will have to be fixed. */
-                case PTRACE_POKETEXT: /* write the word at location addr. */
-                case PTRACE_POKEDATA:
-                        ret = generic_ptrace_pokedata(child, addr, data);
-                        break;
-
                 case PTRACE_POKEUSR: /* write the word at location addr in the USER area */
                         if ((addr & 3) || addr < 0 || addr >= sizeof(struct user)) {
                                 ret = -EIO;
@@ -131,53 +110,6 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
                         }
                         ret = -EIO;
                         break ;
-                case PTRACE_SYSCALL: /* continue and stop at next (return from) syscall */
-                case PTRACE_CONT: { /* restart after signal. */
-                        ret = -EIO;
-                        if (!valid_signal(data))
-                                break ;
-                        if (request == PTRACE_SYSCALL)
-                                set_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
-                        else
-                                clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
-                        child->exit_code = data;
-                        wake_up_process(child);
-                        /* make sure the single step bit is not set. */
-                        h8300_disable_trace(child);
-                        ret = 0;
-                }
-
-/*
- * make the child exit.  Best I can do is send it a sigkill. 
- * perhaps it should be put in the status that it wants to 
- * exit.
- */
-                case PTRACE_KILL: {
-
-                        ret = 0;
-                        if (child->exit_state == EXIT_ZOMBIE) /* already dead */
-                                break;
-                        child->exit_code = SIGKILL;
-                        h8300_disable_trace(child);
-                        wake_up_process(child);
-                        break;
-                }
-
-                case PTRACE_SINGLESTEP: {  /* set the trap flag. */
-                        ret = -EIO;
-                        if (!valid_signal(data))
-                                break;
-                        clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
-                        child->exit_code = data;
-                        h8300_enable_trace(child);
-                        wake_up_process(child);
-                        ret = 0;
-                        break;
-                }
-
-                case PTRACE_DETACH:     /* detach a process that was attached. */
-                        ret = ptrace_detach(child, data);
-                        break;
 
                 case PTRACE_GETREGS: { /* Get all gp regs from the child. */
                         int i;
@@ -210,7 +142,7 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
                 }
 
                 default:
-                        ret = -EIO;
+                        ret = ptrace_request(child, request, addr, data);
                         break;
         }
         return ret;
diff --git a/arch/h8300/kernel/sys_h8300.c b/arch/h8300/kernel/sys_h8300.c
index b5969db0ca10..f9b3f44da69f 100644
--- a/arch/h8300/kernel/sys_h8300.c
+++ b/arch/h8300/kernel/sys_h8300.c
@@ -26,144 +26,6 @@
 #include <asm/traps.h>
 #include <asm/unistd.h>
 
-/*
- * Perform the select(nd, in, out, ex, tv) and mmap() system
- * calls. Linux/m68k cloned Linux/i386, which didn't use to be able to
- * handle more than 4 system call parameters, so these system calls
- * used a memory block for parameter passing..
- */
-
-struct mmap_arg_struct {
-        unsigned long addr;
-        unsigned long len;
-        unsigned long prot;
-        unsigned long flags;
-        unsigned long fd;
-        unsigned long offset;
-};
-
-asmlinkage int old_mmap(struct mmap_arg_struct *arg)
-{
-        struct mmap_arg_struct a;
-        int error = -EFAULT;
-
-        if (copy_from_user(&a, arg, sizeof(a)))
-                goto out;
-
-        error = -EINVAL;
-        if (a.offset & ~PAGE_MASK)
-                goto out;
-
-        error = sys_mmap_pgoff(a.addr, a.len, a.prot, a.flags, a.fd,
-                               a.offset >> PAGE_SHIFT);
-out:
-        return error;
-}
-
-struct sel_arg_struct {
-        unsigned long n;
-        fd_set *inp, *outp, *exp;
-        struct timeval *tvp;
-};
-
-asmlinkage int old_select(struct sel_arg_struct *arg)
-{
-        struct sel_arg_struct a;
-
-        if (copy_from_user(&a, arg, sizeof(a)))
-                return -EFAULT;
-        /* sys_select() does the appropriate kernel locking */
-        return sys_select(a.n, a.inp, a.outp, a.exp, a.tvp);
-}
-
-/*
- * sys_ipc() is the de-multiplexer for the SysV IPC calls..
- *
- * This is really horribly ugly.
- */
-asmlinkage int sys_ipc (uint call, int first, int second,
-                        int third, void *ptr, long fifth)
-{
-        int version, ret;
-
-        version = call >> 16; /* hack for backward compatibility */
-        call &= 0xffff;
-
-        if (call <= SEMCTL)
-                switch (call) {
-                case SEMOP:
-                        return sys_semop (first, (struct sembuf *)ptr, second);
-                case SEMGET:
-                        return sys_semget (first, second, third);
-                case SEMCTL: {
-                        union semun fourth;
-                        if (!ptr)
-                                return -EINVAL;
-                        if (get_user(fourth.__pad, (void **) ptr))
-                                return -EFAULT;
-                        return sys_semctl (first, second, third, fourth);
-                        }
-                default:
-                        return -EINVAL;
-                }
-        if (call <= MSGCTL) 
-                switch (call) {
-                case MSGSND:
-                        return sys_msgsnd (first, (struct msgbuf *) ptr, 
-                                          second, third);
-                case MSGRCV:
-                        switch (version) {
-                        case 0: {
-                                struct ipc_kludge tmp;
-                                if (!ptr)
-                                        return -EINVAL;
-                                if (copy_from_user (&tmp,
-                                                    (struct ipc_kludge *)ptr,
-                                                    sizeof (tmp)))
-                                        return -EFAULT;
-                                return sys_msgrcv (first, tmp.msgp, second,
-                                                   tmp.msgtyp, third);
-                                }
-                        default:
-                                return sys_msgrcv (first,
-                                                   (struct msgbuf *) ptr,
-                                                   second, fifth, third);
-                        }
-                case MSGGET:
-                        return sys_msgget ((key_t) first, second);
-                case MSGCTL:
-                        return sys_msgctl (first, second,
-                                           (struct msqid_ds *) ptr);
-                default:
-                        return -EINVAL;
-                }
-        if (call <= SHMCTL) 
-                switch (call) {
-                case SHMAT:
-                        switch (version) {
-                        default: {
-                                ulong raddr;
-                                ret = do_shmat (first, (char *) ptr,
-                                                 second, &raddr);
-                                if (ret)
-                                        return ret;
-                                return put_user (raddr, (ulong *) third);
-                        }
-                        }
-                case SHMDT: 
-                        return sys_shmdt ((char *)ptr);
-                case SHMGET:
-                        return sys_shmget (first, second, third);
-                case SHMCTL:
-                        return sys_shmctl (first, second,
-                                           (struct shmid_ds *) ptr);
-                default:
-                        return -EINVAL;
-                }
-
-        return -EINVAL;
-}
-
 /* sys_cacheflush -- no support.  */
 asmlinkage int
 sys_cacheflush (unsigned long addr, int scope, int cache, unsigned long len)
diff --git a/arch/h8300/kernel/syscalls.S b/arch/h8300/kernel/syscalls.S
index 2d69881eda6a..faefaff7d43d 100644
--- a/arch/h8300/kernel/syscalls.S
+++ b/arch/h8300/kernel/syscalls.S
@@ -96,7 +96,7 @@ SYMBOL_NAME_LABEL(sys_call_table)
         .long SYMBOL_NAME(sys_settimeofday)
         .long SYMBOL_NAME(sys_getgroups16)      /* 80 */
         .long SYMBOL_NAME(sys_setgroups16)
-        .long SYMBOL_NAME(old_select)
+        .long SYMBOL_NAME(sys_old_select)
         .long SYMBOL_NAME(sys_symlink)
         .long SYMBOL_NAME(sys_lstat)
         .long SYMBOL_NAME(sys_readlink)         /* 85 */
@@ -104,7 +104,7 @@ SYMBOL_NAME_LABEL(sys_call_table)
         .long SYMBOL_NAME(sys_swapon)
         .long SYMBOL_NAME(sys_reboot)
         .long SYMBOL_NAME(sys_old_readdir)
-        .long SYMBOL_NAME(old_mmap)             /* 90 */
+        .long SYMBOL_NAME(sys_old_mmap)         /* 90 */
         .long SYMBOL_NAME(sys_munmap)
         .long SYMBOL_NAME(sys_truncate)
         .long SYMBOL_NAME(sys_ftruncate)
diff --git a/arch/h8300/platform/h8300h/ptrace_h8300h.c b/arch/h8300/platform/h8300h/ptrace_h8300h.c
index 746b1ae672a1..4f1ed0279633 100644
--- a/arch/h8300/platform/h8300h/ptrace_h8300h.c
+++ b/arch/h8300/platform/h8300h/ptrace_h8300h.c
@@ -60,7 +60,7 @@ int h8300_put_reg(struct task_struct *task, int regno, unsigned long data)
 }
 
 /* disable singlestep */
-void h8300_disable_trace(struct task_struct *child)
+void user_disable_single_step(struct task_struct *child)
 {
         if((long)child->thread.breakinfo.addr != -1L) {
                 *child->thread.breakinfo.addr = child->thread.breakinfo.inst;
@@ -264,7 +264,7 @@ static unsigned short *getnextpc(struct task_struct *child, unsigned short *pc)
 
 /* Set breakpoint(s) to simulate a single step from the current PC.  */
 
-void h8300_enable_trace(struct task_struct *child)
+void user_enable_single_step(struct task_struct *child)
 {
         unsigned short *nextpc;
         nextpc = getnextpc(child,(unsigned short *)h8300_get_reg(child, PT_PC));
@@ -276,7 +276,7 @@ void h8300_enable_trace(struct task_struct *child)
 asmlinkage void trace_trap(unsigned long bp)
 {
         if ((unsigned long)current->thread.breakinfo.addr == bp) {
-                h8300_disable_trace(current);
+                user_disable_single_step(current);
                 force_sig(SIGTRAP,current);
         } else
                 force_sig(SIGILL,current);
diff --git a/arch/h8300/platform/h8s/ptrace_h8s.c b/arch/h8300/platform/h8s/ptrace_h8s.c
index e8cd46f9255c..c058ab1a8495 100644
--- a/arch/h8300/platform/h8s/ptrace_h8s.c
+++ b/arch/h8300/platform/h8s/ptrace_h8s.c
@@ -65,13 +65,13 @@ int h8300_put_reg(struct task_struct *task, int regno, unsigned long data)
 }
 
 /* disable singlestep */
-void h8300_disable_trace(struct task_struct *child)
+void user_disable_single_step(struct task_struct *child)
 {
         *(unsigned short *)(child->thread.esp0 + h8300_register_offset[PT_EXR]) &= ~EXR_TRACE;
 }
 
 /* enable singlestep */
-void h8300_enable_trace(struct task_struct *child)
+void user_enable_single_step(struct task_struct *child)
 {
         *(unsigned short *)(child->thread.esp0 + h8300_register_offset[PT_EXR]) |= EXR_TRACE;
 }
diff --git a/arch/ia64/Kconfig b/arch/ia64/Kconfig
index 9a50d7dd2a0b..4d4f4188cdf1 100644
--- a/arch/ia64/Kconfig
+++ b/arch/ia64/Kconfig
@@ -53,6 +53,9 @@ config MMU
         bool
         default y
 
+config NEED_DMA_MAP_STATE
+        def_bool y
+
 config SWIOTLB
        bool
 
diff --git a/arch/ia64/include/asm/compat.h b/arch/ia64/include/asm/compat.h
index dfcf75b8426d..f90edc85b509 100644
--- a/arch/ia64/include/asm/compat.h
+++ b/arch/ia64/include/asm/compat.h
@@ -5,7 +5,8 @@
  */
 #include <linux/types.h>
 
-#define COMPAT_USER_HZ  100
+#define COMPAT_USER_HZ          100
+#define COMPAT_UTS_MACHINE      "i686\0\0\0"
 
 typedef u32             compat_size_t;
 typedef s32             compat_ssize_t;
diff --git a/arch/ia64/include/asm/pci.h b/arch/ia64/include/asm/pci.h
index 55281aabe5f2..73b5f785e70c 100644
--- a/arch/ia64/include/asm/pci.h
+++ b/arch/ia64/include/asm/pci.h
@@ -56,20 +56,6 @@ pcibios_penalize_isa_irq (int irq, int active)
 
 #include <asm-generic/pci-dma-compat.h>
 
-/* pci_unmap_{single,page} is not a nop, thus... */
-#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME)       \
-        dma_addr_t ADDR_NAME;
-#define DECLARE_PCI_UNMAP_LEN(LEN_NAME)         \
-        __u32 LEN_NAME;
-#define pci_unmap_addr(PTR, ADDR_NAME)                  \
-        ((PTR)->ADDR_NAME)
-#define pci_unmap_addr_set(PTR, ADDR_NAME, VAL)         \
-        (((PTR)->ADDR_NAME) = (VAL))
-#define pci_unmap_len(PTR, LEN_NAME)                    \
-        ((PTR)->LEN_NAME)
-#define pci_unmap_len_set(PTR, LEN_NAME, VAL)           \
-        (((PTR)->LEN_NAME) = (VAL))
-
 #ifdef CONFIG_PCI
 static inline void pci_dma_burst_advice(struct pci_dev *pdev,
                                         enum pci_dma_burst_strategy *strat,
diff --git a/arch/ia64/include/asm/ptrace.h b/arch/ia64/include/asm/ptrace.h
index 14055c636adf..7ae9c3f15a1c 100644
--- a/arch/ia64/include/asm/ptrace.h
+++ b/arch/ia64/include/asm/ptrace.h
@@ -319,11 +319,7 @@ static inline unsigned long user_stack_pointer(struct pt_regs *regs)
         ptrace_attach_sync_user_rbs(child)
 
   #define arch_has_single_step()  (1)
-  extern void user_enable_single_step(struct task_struct *);
-  extern void user_disable_single_step(struct task_struct *);
-
   #define arch_has_block_step()   (1)
-  extern void user_enable_block_step(struct task_struct *);
 
 #endif /* !__KERNEL__ */
 
diff --git a/arch/ia64/sn/kernel/setup.c b/arch/ia64/sn/kernel/setup.c
index e456f062f241..d00dfc180021 100644
--- a/arch/ia64/sn/kernel/setup.c
+++ b/arch/ia64/sn/kernel/setup.c
@@ -241,7 +241,7 @@ static void __cpuinit sn_check_for_wars(void)
  * Note:  This stuff is duped here because Altix requires the PCDP to
  * locate a usable VGA device due to lack of proper ACPI support.  Structures
  * could be used from drivers/firmware/pcdp.h, but it was decided that moving
- * this file to a more public location just for Altix use was undesireable.
+ * this file to a more public location just for Altix use was undesirable.
  */
 
 struct hcdp_uart_desc {
diff --git a/arch/m32r/include/asm/ptrace.h b/arch/m32r/include/asm/ptrace.h
index a0755b982028..840a1231edeb 100644
--- a/arch/m32r/include/asm/ptrace.h
+++ b/arch/m32r/include/asm/ptrace.h
@@ -120,6 +120,8 @@ struct pt_regs {
 
 #include <asm/m32r.h>           /* M32R_PSW_BSM, M32R_PSW_BPM */
 
+#define arch_has_single_step() (1)
+
 struct task_struct;
 extern void init_debug_traps(struct task_struct *);
 #define arch_ptrace_attach(child) \
diff --git a/arch/m32r/include/asm/unistd.h b/arch/m32r/include/asm/unistd.h
index cf701c933249..76125777483c 100644
--- a/arch/m32r/include/asm/unistd.h
+++ b/arch/m32r/include/asm/unistd.h
@@ -339,6 +339,7 @@
 #define __ARCH_WANT_STAT64
 #define __ARCH_WANT_SYS_ALARM
 #define __ARCH_WANT_SYS_GETHOSTNAME
+#define __ARCH_WANT_SYS_IPC
 #define __ARCH_WANT_SYS_PAUSE
 #define __ARCH_WANT_SYS_TIME
 #define __ARCH_WANT_SYS_UTIME
diff --git a/arch/m32r/kernel/ptrace.c b/arch/m32r/kernel/ptrace.c
index 98682bba0ed9..e555091eb97c 100644
--- a/arch/m32r/kernel/ptrace.c
+++ b/arch/m32r/kernel/ptrace.c
@@ -580,6 +580,35 @@ init_debug_traps(struct task_struct *child)
         }
 }
 
+void user_enable_single_step(struct task_struct *child)
+{
+        unsigned long next_pc;
+        unsigned long pc, insn;
+
+        clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
+
+        /* Compute next pc.  */
+        pc = get_stack_long(child, PT_BPC);
+
+        if (access_process_vm(child, pc&~3, &insn, sizeof(insn), 0)
+            != sizeof(insn))
+                break;
+
+        compute_next_pc(insn, pc, &next_pc, child);
+        if (next_pc & 0x80000000)
+                break;
+
+        if (embed_debug_trap(child, next_pc))
+                break;
+
+        invalidate_cache();
+}
+
+void user_disable_single_step(struct task_struct *child)
+{
+        unregister_all_debug_traps(child);
+        invalidate_cache();
+}
 
 /*
  * Called by kernel/ptrace.c when detaching..
@@ -630,74 +659,6 @@ arch_ptrace(struct task_struct *child, long request, long addr, long data)
                 ret = ptrace_write_user(child, addr, data);
                 break;
 
-        /*
-         * continue/restart and stop at next (return from) syscall
-         */
-        case PTRACE_SYSCALL:
-        case PTRACE_CONT:
-                ret = -EIO;
-                if (!valid_signal(data))
-                        break;
-                if (request == PTRACE_SYSCALL)
-                        set_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
-                else
-                        clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
-                child->exit_code = data;
-                wake_up_process(child);
-                ret = 0;
-                break;
-
-        /*
-         * make the child exit.  Best I can do is send it a sigkill.
-         * perhaps it should be put in the status that it wants to
-         * exit.
-         */
-        case PTRACE_KILL: {
-                ret = 0;
-                unregister_all_debug_traps(child);
-                invalidate_cache();
-                if (child->exit_state == EXIT_ZOMBIE)   /* already dead */
-                        break;
-                child->exit_code = SIGKILL;
-                wake_up_process(child);
-                break;
-        }
-
-        /*
-         * execute single instruction.
-         */
-        case PTRACE_SINGLESTEP: {
-                unsigned long next_pc;
-                unsigned long pc, insn;
-
-                ret = -EIO;
-                if (!valid_signal(data))
-                        break;
-                clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
-
-                /* Compute next pc.  */
-                pc = get_stack_long(child, PT_BPC);
-
-                if (access_process_vm(child, pc&~3, &insn, sizeof(insn), 0)
-                    != sizeof(insn))
-                        break;
-
-                compute_next_pc(insn, pc, &next_pc, child);
-                if (next_pc & 0x80000000)
-                        break;
-
-                if (embed_debug_trap(child, next_pc))
-                        break;
-
-                invalidate_cache();
-                child->exit_code = data;
-
-                /* give it a chance to run. */
-                wake_up_process(child);
-                ret = 0;
-                break;
-        }
-
         case PTRACE_GETREGS:
                 ret = ptrace_getregs(child, (void __user *)data);
                 break;
diff --git a/arch/m32r/kernel/sys_m32r.c b/arch/m32r/kernel/sys_m32r.c
index d3c865c5a6ba..0a00f467edfa 100644
--- a/arch/m32r/kernel/sys_m32r.c
+++ b/arch/m32r/kernel/sys_m32r.c
@@ -76,98 +76,6 @@ asmlinkage int sys_tas(int __user *addr)
         return oldval;
 }
 
-/*
- * sys_ipc() is the de-multiplexer for the SysV IPC calls..
- *
- * This is really horribly ugly.
- */
-asmlinkage int sys_ipc(uint call, int first, int second,
-                       int third, void __user *ptr, long fifth)
-{
-        int version, ret;
-
-        version = call >> 16; /* hack for backward compatibility */
-        call &= 0xffff;
-
-        switch (call) {
-        case SEMOP:
-                return sys_semtimedop(first, (struct sembuf __user *)ptr,
-                                      second, NULL);
-        case SEMTIMEDOP:
-                return sys_semtimedop(first, (struct sembuf __user *)ptr,
-                                      second, (const struct timespec __user *)fifth);
-        case SEMGET:
-                return sys_semget (first, second, third);
-        case SEMCTL: {
-                union semun fourth;
-                if (!ptr)
-                        return -EINVAL;
-                if (get_user(fourth.__pad, (void __user * __user *) ptr))
-                        return -EFAULT;
-                return sys_semctl (first, second, third, fourth);
-                }
-
-        case MSGSND:
-                return sys_msgsnd (first, (struct msgbuf __user *) ptr,
-                                   second, third);
-        case MSGRCV:
-                switch (version) {
-                case 0: {
-                        struct ipc_kludge tmp;
-                        if (!ptr)
-                                return -EINVAL;
-
-                        if (copy_from_user(&tmp,
-                                           (struct ipc_kludge __user *) ptr,
-                                           sizeof (tmp)))
-                                return -EFAULT;
-                        return sys_msgrcv (first, tmp.msgp, second,
-                                           tmp.msgtyp, third);
-                        }
-                default:
-                        return sys_msgrcv (first,
-                                           (struct msgbuf __user *) ptr,
-                                           second, fifth, third);
-                }
-        case MSGGET:
-                return sys_msgget ((key_t) first, second);
-        case MSGCTL:
-                return sys_msgctl (first, second,
-                                   (struct msqid_ds __user *) ptr);
-        case SHMAT: {
-                ulong raddr;
-
-                if (!access_ok(VERIFY_WRITE, (ulong __user *) third,
-                                      sizeof(ulong)))
-                        return -EFAULT;
-                ret = do_shmat (first, (char __user *) ptr, second, &raddr);
-                if (ret)
-                        return ret;
-                return put_user (raddr, (ulong __user *) third);
-                }
-        case SHMDT:
-                return sys_shmdt ((char __user *)ptr);
-        case SHMGET:
-                return sys_shmget (first, second, third);
-        case SHMCTL:
-                return sys_shmctl (first, second,
-                                   (struct shmid_ds __user *) ptr);
-        default:
-                return -ENOSYS;
-        }
-}
-
-asmlinkage int sys_uname(struct old_utsname __user * name)
-{
-        int err;
-        if (!name)
-                return -EFAULT;
-        down_read(&uts_sem);
-        err = copy_to_user(name, utsname(), sizeof (*name));
-        up_read(&uts_sem);
-        return err?-EFAULT:0;
-}
-
 asmlinkage int sys_cacheflush(void *addr, int bytes, int cache)
 {
         /* This should flush more selectively ...  */
diff --git a/arch/m68k/atari/atakeyb.c b/arch/m68k/atari/atakeyb.c
index 4add96d13b19..5890897d28bf 100644
--- a/arch/m68k/atari/atakeyb.c
+++ b/arch/m68k/atari/atakeyb.c
@@ -121,7 +121,7 @@ KEYBOARD_STATE kb_state;
  * bytes have been lost and in which state of the packet structure we are now.
  * This usually causes keyboards bytes to be interpreted as mouse movements
  * and vice versa, which is very annoying. It seems better to throw away some
- * bytes (that are usually mouse bytes) than to misinterpret them. Therefor I
+ * bytes (that are usually mouse bytes) than to misinterpret them. Therefore I
  * introduced the RESYNC state for IKBD data. In this state, the bytes up to
  * one that really looks like a key event (0x04..0xf2) or the start of a mouse
  * packet (0xf8..0xfb) are thrown away, but at most 2 bytes. This at least
diff --git a/arch/m68k/include/asm/fbio.h b/arch/m68k/include/asm/fbio.h
index b9215a0907d3..0a21da87f7d6 100644
--- a/arch/m68k/include/asm/fbio.h
+++ b/arch/m68k/include/asm/fbio.h
@@ -173,7 +173,7 @@ struct mdi_cfginfo {
         int     mdi_ncluts;     /* Number of implemented CLUTs in this MDI */
         int     mdi_type;       /* FBTYPE name */
         int     mdi_height;     /* height */
-        int     mdi_width;      /* widht */
+        int     mdi_width;      /* width */
         int     mdi_size;       /* available ram */
         int     mdi_mode;       /* 8bpp, 16bpp or 32bpp */
         int     mdi_pixfreq;    /* pixel clock (from PROM) */
diff --git a/arch/m68k/include/asm/io_no.h b/arch/m68k/include/asm/io_no.h
index 359065d5a9f2..6e2413e518cb 100644
--- a/arch/m68k/include/asm/io_no.h
+++ b/arch/m68k/include/asm/io_no.h
@@ -16,7 +16,7 @@
  * memory location directly.
  */
 /* ++roman: The assignments to temp. vars avoid that gcc sometimes generates
- * two accesses to memory, which may be undesireable for some devices.
+ * two accesses to memory, which may be undesirable for some devices.
  */
 
 /*
diff --git a/arch/m68k/include/asm/ptrace.h b/arch/m68k/include/asm/ptrace.h
index 21605c736f69..6e6e3ac1d913 100644
--- a/arch/m68k/include/asm/ptrace.h
+++ b/arch/m68k/include/asm/ptrace.h
@@ -87,18 +87,10 @@ struct switch_stack {
 #define profile_pc(regs) instruction_pointer(regs)
 extern void show_regs(struct pt_regs *);
 
-/*
- * These are defined as per linux/ptrace.h.
- */
-struct task_struct;
-
 #define arch_has_single_step()  (1)
-extern void user_enable_single_step(struct task_struct *);
-extern void user_disable_single_step(struct task_struct *);
 
 #ifdef CONFIG_MMU
 #define arch_has_block_step()   (1)
-extern void user_enable_block_step(struct task_struct *);
 #endif
 
 #endif /* __KERNEL__ */
diff --git a/arch/m68k/include/asm/unistd.h b/arch/m68k/include/asm/unistd.h
index d72a71dabecb..60b15d0aa072 100644
--- a/arch/m68k/include/asm/unistd.h
+++ b/arch/m68k/include/asm/unistd.h
@@ -351,6 +351,7 @@
 #define __ARCH_WANT_STAT64
 #define __ARCH_WANT_SYS_ALARM
 #define __ARCH_WANT_SYS_GETHOSTNAME
+#define __ARCH_WANT_SYS_IPC
 #define __ARCH_WANT_SYS_PAUSE
 #define __ARCH_WANT_SYS_SGETMASK
 #define __ARCH_WANT_SYS_SIGNAL
@@ -363,6 +364,8 @@
 #define __ARCH_WANT_SYS_LLSEEK
 #define __ARCH_WANT_SYS_NICE
 #define __ARCH_WANT_SYS_OLD_GETRLIMIT
+#define __ARCH_WANT_SYS_OLD_MMAP
+#define __ARCH_WANT_SYS_OLD_SELECT
 #define __ARCH_WANT_SYS_OLDUMOUNT
 #define __ARCH_WANT_SYS_SIGPENDING
 #define __ARCH_WANT_SYS_SIGPROCMASK
diff --git a/arch/m68k/kernel/entry.S b/arch/m68k/kernel/entry.S
index e136b8cbe9b9..2391bdff0996 100644
--- a/arch/m68k/kernel/entry.S
+++ b/arch/m68k/kernel/entry.S
@@ -510,7 +510,7 @@ sys_call_table:
         .long sys_settimeofday
         .long sys_getgroups16   /* 80 */
         .long sys_setgroups16
-        .long old_select
+        .long sys_old_select
         .long sys_symlink
         .long sys_lstat
         .long sys_readlink      /* 85 */
@@ -518,7 +518,7 @@ sys_call_table:
         .long sys_swapon
         .long sys_reboot
         .long sys_old_readdir
-        .long old_mmap          /* 90 */
+        .long sys_old_mmap      /* 90 */
         .long sys_munmap
         .long sys_truncate
         .long sys_ftruncate
diff --git a/arch/m68k/kernel/sys_m68k.c b/arch/m68k/kernel/sys_m68k.c
index e3ad2d671973..77896692eb0a 100644
--- a/arch/m68k/kernel/sys_m68k.c
+++ b/arch/m68k/kernel/sys_m68k.c
@@ -46,137 +46,6 @@ asmlinkage long sys_mmap2(unsigned long addr, unsigned long len,
         return sys_mmap_pgoff(addr, len, prot, flags, fd, pgoff);
 }
 
-/*
- * Perform the select(nd, in, out, ex, tv) and mmap() system
- * calls. Linux/m68k cloned Linux/i386, which didn't use to be able to
- * handle more than 4 system call parameters, so these system calls
- * used a memory block for parameter passing..
- */
-
-struct mmap_arg_struct {
-        unsigned long addr;
-        unsigned long len;
-        unsigned long prot;
-        unsigned long flags;
-        unsigned long fd;
-        unsigned long offset;
-};
-
-asmlinkage int old_mmap(struct mmap_arg_struct __user *arg)
-{
-        struct mmap_arg_struct a;
-        int error = -EFAULT;
-
-        if (copy_from_user(&a, arg, sizeof(a)))
-                goto out;
-
-        error = -EINVAL;
-        if (a.offset & ~PAGE_MASK)
-                goto out;
-
-        error = sys_mmap_pgoff(a.addr, a.len, a.prot, a.flags, a.fd,
-                               a.offset >> PAGE_SHIFT);
-out:
-        return error;
-}
-
-struct sel_arg_struct {
-        unsigned long n;
-        fd_set __user *inp, *outp, *exp;
-        struct timeval __user *tvp;
-};
-
-asmlinkage int old_select(struct sel_arg_struct __user *arg)
-{
-        struct sel_arg_struct a;
-
-        if (copy_from_user(&a, arg, sizeof(a)))
-                return -EFAULT;
-        /* sys_select() does the appropriate kernel locking */
-        return sys_select(a.n, a.inp, a.outp, a.exp, a.tvp);
-}
-
-/*
- * sys_ipc() is the de-multiplexer for the SysV IPC calls..
- *
- * This is really horribly ugly.
- */
-asmlinkage int sys_ipc (uint call, int first, int second,
-                        int third, void __user *ptr, long fifth)
-{
-        int version, ret;
-
-        version = call >> 16; /* hack for backward compatibility */
-        call &= 0xffff;
-
-        if (call <= SEMCTL)
-                switch (call) {
-                case SEMOP:
-                        return sys_semop (first, ptr, second);
-                case SEMGET:
-                        return sys_semget (first, second, third);
-                case SEMCTL: {
-                        union semun fourth;
-                        if (!ptr)
-                                return -EINVAL;
-                        if (get_user(fourth.__pad, (void __user *__user *) ptr))
-                                return -EFAULT;
-                        return sys_semctl (first, second, third, fourth);
-                        }
-                default:
-                        return -ENOSYS;
-                }
-        if (call <= MSGCTL)
-                switch (call) {
-                case MSGSND:
-                        return sys_msgsnd (first, ptr, second, third);
-                case MSGRCV:
-                        switch (version) {
-                        case 0: {
-                                struct ipc_kludge tmp;
-                                if (!ptr)
-                                        return -EINVAL;
-                                if (copy_from_user (&tmp, ptr, sizeof (tmp)))
-                                        return -EFAULT;
-                                return sys_msgrcv (first, tmp.msgp, second,
-                                                   tmp.msgtyp, third);
-                                }
-                        default:
-                                return sys_msgrcv (first, ptr,
-                                                   second, fifth, third);
-                        }
-                case MSGGET:
-                        return sys_msgget ((key_t) first, second);
-                case MSGCTL:
-                        return sys_msgctl (first, second, ptr);
-                default:
-                        return -ENOSYS;
-                }
-        if (call <= SHMCTL)
-                switch (call) {
-                case SHMAT:
-                        switch (version) {
-                        default: {
-                                ulong raddr;
-                                ret = do_shmat (first, ptr, second, &raddr);
-                                if (ret)
-                                        return ret;
-                                return put_user (raddr, (ulong __user *) third);
-                        }
-                        }
-                case SHMDT:
-                        return sys_shmdt (ptr);
-                case SHMGET:
-                        return sys_shmget (first, second, third);
-                case SHMCTL:
-                        return sys_shmctl (first, second, ptr);
-                default:
-                        return -ENOSYS;
-                }
-
-        return -EINVAL;
-}
-
 /* Convert virtual (user) address VADDR to physical address PADDR */
 #define virt_to_phys_040(vaddr)                                         \
 ({                                                                      \
diff --git a/arch/m68knommu/kernel/ptrace.c b/arch/m68knommu/kernel/ptrace.c
index 85ed2f988f98..f6be1248d216 100644
--- a/arch/m68knommu/kernel/ptrace.c
+++ b/arch/m68knommu/kernel/ptrace.c
@@ -116,12 +116,6 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
         int ret;
 
         switch (request) {
-                /* when I and D space are separate, these will need to be fixed. */
-                case PTRACE_PEEKTEXT: /* read word at location addr. */ 
-                case PTRACE_PEEKDATA:
-                        ret = generic_ptrace_peekdata(child, addr, data);
-                        break;
-
                 /* read the word at location addr in the USER area. */
                 case PTRACE_PEEKUSR: {
                         unsigned long tmp;
@@ -160,12 +154,6 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
                         break;
                 }
 
-                /* when I and D space are separate, this will have to be fixed. */
-                case PTRACE_POKETEXT: /* write the word at location addr. */
-                case PTRACE_POKEDATA:
-                        ret = generic_ptrace_pokedata(child, addr, data);
-                        break;
-
                 case PTRACE_POKEUSR: /* write the word at location addr in the USER area */
                         ret = -EIO;
                         if ((addr & 3) || addr < 0 ||
@@ -202,66 +190,6 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
                         }
                         break;
 
-                case PTRACE_SYSCALL: /* continue and stop at next (return from) syscall */
-                case PTRACE_CONT: { /* restart after signal. */
-                        long tmp;
-
-                        ret = -EIO;
-                        if (!valid_signal(data))
-                                break;
-                        if (request == PTRACE_SYSCALL)
-                                set_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
-                        else
-                                clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
-                        child->exit_code = data;
-                        /* make sure the single step bit is not set. */
-                        tmp = get_reg(child, PT_SR) & ~(TRACE_BITS << 16);
-                        put_reg(child, PT_SR, tmp);
-                        wake_up_process(child);
-                        ret = 0;
-                        break;
-                }
-
-                /*
-                 * make the child exit.  Best I can do is send it a sigkill. 
-                 * perhaps it should be put in the status that it wants to 
-                 * exit.
-                 */
-                case PTRACE_KILL: {
-                        long tmp;
-
-                        ret = 0;
-                        if (child->exit_state == EXIT_ZOMBIE) /* already dead */
-                                break;
-                        child->exit_code = SIGKILL;
-                        /* make sure the single step bit is not set. */
-                        tmp = get_reg(child, PT_SR) & ~(TRACE_BITS << 16);
-                        put_reg(child, PT_SR, tmp);
-                        wake_up_process(child);
-                        break;
-                }
-
-                case PTRACE_SINGLESTEP: {  /* set the trap flag. */
-                        long tmp;
-
-                        ret = -EIO;
-                        if (!valid_signal(data))
-                                break;
-                        clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
-                        tmp = get_reg(child, PT_SR) | (TRACE_BITS << 16);
-                        put_reg(child, PT_SR, tmp);
-
-                        child->exit_code = data;
-                        /* give it a chance to run. */
-                        wake_up_process(child);
-                        ret = 0;
-                        break;
-                }
-
-                case PTRACE_DETACH:     /* detach a process that was attached. */
-                        ret = ptrace_detach(child, data);
-                        break;
-
                 case PTRACE_GETREGS: { /* Get all gp regs from the child. */
                         int i;
                         unsigned long tmp;
@@ -325,7 +253,7 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
                 break;
 
                 default:
-                        ret = -EIO;
+                        ret = ptrace_request(child, request, addr, data);
                         break;
         }
         return ret;
diff --git a/arch/m68knommu/kernel/sys_m68k.c b/arch/m68knommu/kernel/sys_m68k.c
index 923dd4aab875..d65e9c4c930c 100644
--- a/arch/m68knommu/kernel/sys_m68k.c
+++ b/arch/m68knommu/kernel/sys_m68k.c
@@ -27,142 +27,6 @@
 #include <asm/cacheflush.h>
 #include <asm/unistd.h>
 
-/*
- * Perform the select(nd, in, out, ex, tv) and mmap() system
- * calls. Linux/m68k cloned Linux/i386, which didn't use to be able to
- * handle more than 4 system call parameters, so these system calls
- * used a memory block for parameter passing..
- */
-
-struct mmap_arg_struct {
-        unsigned long addr;
-        unsigned long len;
-        unsigned long prot;
-        unsigned long flags;
-        unsigned long fd;
-        unsigned long offset;
-};
-
-asmlinkage int old_mmap(struct mmap_arg_struct *arg)
-{
-        struct mmap_arg_struct a;
-        int error = -EFAULT;
-
-        if (copy_from_user(&a, arg, sizeof(a)))
-                goto out;
-
-        error = -EINVAL;
-        if (a.offset & ~PAGE_MASK)
-                goto out;
-
-        error = sys_mmap_pgoff(a.addr, a.len, a.prot, a.flags, a.fd,
-                                a.offset >> PAGE_SHIFT);
-out:
-        return error;
-}
-
-struct sel_arg_struct {
-        unsigned long n;
-        fd_set *inp, *outp, *exp;
-        struct timeval *tvp;
-};
-
-asmlinkage int old_select(struct sel_arg_struct *arg)
-{
-        struct sel_arg_struct a;
-
-        if (copy_from_user(&a, arg, sizeof(a)))
-                return -EFAULT;
-        /* sys_select() does the appropriate kernel locking */
-        return sys_select(a.n, a.inp, a.outp, a.exp, a.tvp);
-}
-
-/*
- * sys_ipc() is the de-multiplexer for the SysV IPC calls..
- *
- * This is really horribly ugly.
- */
-asmlinkage int sys_ipc (uint call, int first, int second,
-                        int third, void *ptr, long fifth)
-{
-        int version, ret;
-
-        version = call >> 16; /* hack for backward compatibility */
-        call &= 0xffff;
-
-        if (call <= SEMCTL)
-                switch (call) {
-                case SEMOP:
-                        return sys_semop (first, (struct sembuf *)ptr, second);
-                case SEMGET:
-                        return sys_semget (first, second, third);
-                case SEMCTL: {
-                        union semun fourth;
-                        if (!ptr)
-                                return -EINVAL;
-                        if (get_user(fourth.__pad, (void **) ptr))
-                                return -EFAULT;
-                        return sys_semctl (first, second, third, fourth);
-                        }
-                default:
-                        return -EINVAL;
-                }
-        if (call <= MSGCTL) 
-                switch (call) {
-                case MSGSND:
-                        return sys_msgsnd (first, (struct msgbuf *) ptr, 
-                                          second, third);
-                case MSGRCV:
-                        switch (version) {
-                        case 0: {
-                                struct ipc_kludge tmp;
-                                if (!ptr)
-                                        return -EINVAL;
-                                if (copy_from_user (&tmp,
-                                                    (struct ipc_kludge *)ptr,
-                                                    sizeof (tmp)))
-                                        return -EFAULT;
-                                return sys_msgrcv (first, tmp.msgp, second,
-                                                   tmp.msgtyp, third);
-                                }
-                        default:
-                                return sys_msgrcv (first,
-                                                   (struct msgbuf *) ptr,
-                                                   second, fifth, third);
-                        }
-                case MSGGET:
-                        return sys_msgget ((key_t) first, second);
-                case MSGCTL:
-                        return sys_msgctl (first, second,
-                                           (struct msqid_ds *) ptr);
-                default:
-                        return -EINVAL;
-                }
-        if (call <= SHMCTL)
-                switch (call) {
-                case SHMAT:
-                        switch (version) {
-                        default: {
-                                ulong raddr;
-                                ret = do_shmat (first, ptr, second, &raddr);
-                                if (ret)
-                                        return ret;
-                                return put_user (raddr, (ulong __user *) third);
-                        }
-                        }
-                case SHMDT:
-                        return sys_shmdt (ptr);
-                case SHMGET:
-                        return sys_shmget (first, second, third);
-                case SHMCTL:
-                        return sys_shmctl (first, second, ptr);
-                default:
-                        return -ENOSYS;
-                }
-
-        return -EINVAL;
-}
-
 /* sys_cacheflush -- flush (part of) the processor cache.  */
 asmlinkage int
 sys_cacheflush (unsigned long addr, int scope, int cache, unsigned long len)
diff --git a/arch/m68knommu/kernel/syscalltable.S b/arch/m68knommu/kernel/syscalltable.S
index 56dd01ded148..b30b3eb197a5 100644
--- a/arch/m68knommu/kernel/syscalltable.S
+++ b/arch/m68knommu/kernel/syscalltable.S
@@ -100,7 +100,7 @@ ENTRY(sys_call_table)
         .long sys_settimeofday
         .long sys_getgroups16   /* 80 */
         .long sys_setgroups16
-        .long old_select
+        .long sys_old_select
         .long sys_symlink
         .long sys_lstat
         .long sys_readlink      /* 85 */
@@ -108,7 +108,7 @@ ENTRY(sys_call_table)
         .long sys_ni_syscall    /* sys_swapon */
         .long sys_reboot
         .long sys_old_readdir
-        .long old_mmap          /* 90 */
+        .long sys_old_mmap      /* 90 */
         .long sys_munmap
         .long sys_truncate
         .long sys_ftruncate
diff --git a/arch/microblaze/kernel/ptrace.c b/arch/microblaze/kernel/ptrace.c
index 4b3ac32754de..6d6349a145f9 100644
--- a/arch/microblaze/kernel/ptrace.c
+++ b/arch/microblaze/kernel/ptrace.c
@@ -78,26 +78,6 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
         unsigned long copied;
 
         switch (request) {
-        case PTRACE_PEEKTEXT: /* read word at location addr. */
-        case PTRACE_PEEKDATA:
-                pr_debug("PEEKTEXT/PEEKDATA at %08lX\n", addr);
-                copied = access_process_vm(child, addr, &val, sizeof(val), 0);
-                rval = -EIO;
-                if (copied != sizeof(val))
-                        break;
-                rval = put_user(val, (unsigned long *)data);
-                break;
-
-        case PTRACE_POKETEXT: /* write the word at location addr. */
-        case PTRACE_POKEDATA:
-                pr_debug("POKETEXT/POKEDATA to %08lX\n", addr);
-                rval = 0;
-                if (access_process_vm(child, addr, &data, sizeof(data), 1)
-                    == sizeof(data))
-                        break;
-                rval = -EIO;
-                break;
-
         /* Read/write the word at location ADDR in the registers. */
         case PTRACE_PEEKUSR:
         case PTRACE_POKEUSR:
@@ -130,50 +110,8 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
                 if (rval == 0 && request == PTRACE_PEEKUSR)
                         rval = put_user(val, (unsigned long *)data);
                 break;
-        /* Continue and stop at next (return from) syscall */
-        case PTRACE_SYSCALL:
-                pr_debug("PTRACE_SYSCALL\n");
-        case PTRACE_SINGLESTEP:
-                pr_debug("PTRACE_SINGLESTEP\n");
-        /* Restart after a signal.  */
-        case PTRACE_CONT:
-                pr_debug("PTRACE_CONT\n");
-                rval = -EIO;
-                if (!valid_signal(data))
-                        break;
-
-                if (request == PTRACE_SYSCALL)
-                        set_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
-                else
-                        clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
-
-                child->exit_code = data;
-                pr_debug("wakeup_process\n");
-                wake_up_process(child);
-                rval = 0;
-                break;
-
-        /*
-         * make the child exit.  Best I can do is send it a sigkill.
-         * perhaps it should be put in the status that it wants to
-         * exit.
-         */
-        case PTRACE_KILL:
-                pr_debug("PTRACE_KILL\n");
-                rval = 0;
-                if (child->exit_state == EXIT_ZOMBIE)   /* already dead */
-                        break;
-                child->exit_code = SIGKILL;
-                wake_up_process(child);
-                break;
-
-        case PTRACE_DETACH: /* detach a process that was attached. */
-                pr_debug("PTRACE_DETACH\n");
-                rval = ptrace_detach(child, data);
-                break;
         default:
-                /* rval = ptrace_request(child, request, addr, data); noMMU */
-                rval = -EIO;
+                rval = ptrace_request(child, request, addr, data);
         }
         return rval;
 }
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 591ca0cd4c24..29e86923d1bf 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -812,9 +812,9 @@ config DMA_COHERENT
 
 config DMA_NONCOHERENT
         bool
-        select DMA_NEED_PCI_MAP_STATE
+        select NEED_DMA_MAP_STATE
 
-config DMA_NEED_PCI_MAP_STATE
+config NEED_DMA_MAP_STATE
         bool
 
 config SYS_HAS_EARLY_PRINTK
diff --git a/arch/mips/include/asm/compat.h b/arch/mips/include/asm/compat.h
index f58aed354bfd..613f6912dfc1 100644
--- a/arch/mips/include/asm/compat.h
+++ b/arch/mips/include/asm/compat.h
@@ -8,7 +8,8 @@
 #include <asm/page.h>
 #include <asm/ptrace.h>
 
-#define COMPAT_USER_HZ  100
+#define COMPAT_USER_HZ          100
+#define COMPAT_UTS_MACHINE      "mips\0\0\0"
 
 typedef u32             compat_size_t;
 typedef s32             compat_ssize_t;
diff --git a/arch/mips/include/asm/pci.h b/arch/mips/include/asm/pci.h
index 5ebf82572ec0..3beea1479b43 100644
--- a/arch/mips/include/asm/pci.h
+++ b/arch/mips/include/asm/pci.h
@@ -102,28 +102,6 @@ struct pci_dev;
  */
 extern unsigned int PCI_DMA_BUS_IS_PHYS;
 
-#ifdef CONFIG_DMA_NEED_PCI_MAP_STATE
-
-/* pci_unmap_{single,page} is not a nop, thus... */
-#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME)       dma_addr_t ADDR_NAME;
-#define DECLARE_PCI_UNMAP_LEN(LEN_NAME)         __u32 LEN_NAME;
-#define pci_unmap_addr(PTR, ADDR_NAME)          ((PTR)->ADDR_NAME)
-#define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) (((PTR)->ADDR_NAME) = (VAL))
-#define pci_unmap_len(PTR, LEN_NAME)            ((PTR)->LEN_NAME)
-#define pci_unmap_len_set(PTR, LEN_NAME, VAL)   (((PTR)->LEN_NAME) = (VAL))
-
-#else /* CONFIG_DMA_NEED_PCI_MAP_STATE  */
-
-/* pci_unmap_{page,single} is a nop so... */
-#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME)
-#define DECLARE_PCI_UNMAP_LEN(LEN_NAME)
-#define pci_unmap_addr(PTR, ADDR_NAME)          (0)
-#define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) do { } while (0)
-#define pci_unmap_len(PTR, LEN_NAME)            (0)
-#define pci_unmap_len_set(PTR, LEN_NAME, VAL)   do { } while (0)
-
-#endif /* CONFIG_DMA_NEED_PCI_MAP_STATE  */
-
 #ifdef CONFIG_PCI
 static inline void pci_dma_burst_advice(struct pci_dev *pdev,
                                         enum pci_dma_burst_strategy *strat,
diff --git a/arch/mips/include/asm/unistd.h b/arch/mips/include/asm/unistd.h
index 65c679ecbe6b..1b5a6648eb86 100644
--- a/arch/mips/include/asm/unistd.h
+++ b/arch/mips/include/asm/unistd.h
@@ -1004,6 +1004,7 @@
 #define __ARCH_WANT_OLD_READDIR
 #define __ARCH_WANT_SYS_ALARM
 #define __ARCH_WANT_SYS_GETHOSTNAME
+#define __ARCH_WANT_SYS_IPC
 #define __ARCH_WANT_SYS_PAUSE
 #define __ARCH_WANT_SYS_SGETMASK
 #define __ARCH_WANT_SYS_UTIME
@@ -1013,6 +1014,7 @@
 #define __ARCH_WANT_SYS_LLSEEK
 #define __ARCH_WANT_SYS_NICE
 #define __ARCH_WANT_SYS_OLD_GETRLIMIT
+#define __ARCH_WANT_SYS_OLD_UNAME
 #define __ARCH_WANT_SYS_OLDUMOUNT
 #define __ARCH_WANT_SYS_SIGPENDING
 #define __ARCH_WANT_SYS_SIGPROCMASK
diff --git a/arch/mips/kernel/linux32.c b/arch/mips/kernel/linux32.c
index bde79ef602e6..a39d0597a375 100644
--- a/arch/mips/kernel/linux32.c
+++ b/arch/mips/kernel/linux32.c
@@ -249,22 +249,6 @@ SYSCALL_DEFINE5(n32_msgrcv, int, msqid, u32, msgp, size_t, msgsz,
 }
 #endif
 
-SYSCALL_DEFINE1(32_newuname, struct new_utsname __user *, name)
-{
-        int ret = 0;
-
-        down_read(&uts_sem);
-        if (copy_to_user(name, utsname(), sizeof *name))
-                ret = -EFAULT;
-        up_read(&uts_sem);
-
-        if (current->personality == PER_LINUX32 && !ret)
-                if (copy_to_user(name->machine, "mips\0\0\0", 8))
-                        ret = -EFAULT;
-
-        return ret;
-}
-
 SYSCALL_DEFINE1(32_personality, unsigned long, personality)
 {
         int ret;
diff --git a/arch/mips/kernel/ptrace.c b/arch/mips/kernel/ptrace.c
index 054861ccb4dd..c51b95ff8644 100644
--- a/arch/mips/kernel/ptrace.c
+++ b/arch/mips/kernel/ptrace.c
@@ -493,36 +493,6 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
                 ret = ptrace_setfpregs(child, (__u32 __user *) data);
                 break;
 
-        case PTRACE_SYSCALL: /* continue and stop at next (return from) syscall */
-        case PTRACE_CONT: { /* restart after signal. */
-                ret = -EIO;
-                if (!valid_signal(data))
-                        break;
-                if (request == PTRACE_SYSCALL) {
-                        set_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
-                }
-                else {
-                        clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
-                }
-                child->exit_code = data;
-                wake_up_process(child);
-                ret = 0;
-                break;
-        }
-
-        /*
-         * make the child exit.  Best I can do is send it a sigkill.
-         * perhaps it should be put in the status that it wants to
-         * exit.
-         */
-        case PTRACE_KILL:
-                ret = 0;
-                if (child->exit_state == EXIT_ZOMBIE)   /* already dead */
-                        break;
-                child->exit_code = SIGKILL;
-                wake_up_process(child);
-                break;
-
         case PTRACE_GET_THREAD_AREA:
                 ret = put_user(task_thread_info(child)->tp_value,
                                 (unsigned long __user *) data);
diff --git a/arch/mips/kernel/scall64-n32.S b/arch/mips/kernel/scall64-n32.S
index 66b5a48676dd..44337ba03717 100644
--- a/arch/mips/kernel/scall64-n32.S
+++ b/arch/mips/kernel/scall64-n32.S
@@ -181,7 +181,7 @@ EXPORT(sysn32_call_table)
         PTR     sys_exit
         PTR     compat_sys_wait4
         PTR     sys_kill                        /* 6060 */
-        PTR     sys_32_newuname
+        PTR     sys_newuname
         PTR     sys_semget
         PTR     sys_semop
         PTR     sys_n32_semctl
diff --git a/arch/mips/kernel/scall64-o32.S b/arch/mips/kernel/scall64-o32.S
index 515f9eab2b28..813689ef2384 100644
--- a/arch/mips/kernel/scall64-o32.S
+++ b/arch/mips/kernel/scall64-o32.S
@@ -325,7 +325,7 @@ sys_call_table:
         PTR     sys32_sigreturn
         PTR     sys32_clone                     /* 4120 */
         PTR     sys_setdomainname
-        PTR     sys_32_newuname
+        PTR     sys_newuname
         PTR     sys_ni_syscall                  /* sys_modify_ldt */
         PTR     compat_sys_adjtimex
         PTR     sys_mprotect                    /* 4125 */
diff --git a/arch/mips/kernel/syscall.c b/arch/mips/kernel/syscall.c
index 3f7f466190b4..e96b1c30c7aa 100644
--- a/arch/mips/kernel/syscall.c
+++ b/arch/mips/kernel/syscall.c
@@ -215,48 +215,6 @@ out:
         return error;
 }
 
-/*
- * Compacrapability ...
- */
-SYSCALL_DEFINE1(uname, struct old_utsname __user *, name)
-{
-        if (name && !copy_to_user(name, utsname(), sizeof (*name)))
-                return 0;
-        return -EFAULT;
-}
-
-/*
- * Compacrapability ...
- */
-SYSCALL_DEFINE1(olduname, struct oldold_utsname __user *, name)
-{
-        int error;
-
-        if (!name)
-                return -EFAULT;
-        if (!access_ok(VERIFY_WRITE, name, sizeof(struct oldold_utsname)))
-                return -EFAULT;
-
-        error = __copy_to_user(&name->sysname, &utsname()->sysname,
-                               __OLD_UTS_LEN);
-        error -= __put_user(0, name->sysname + __OLD_UTS_LEN);
-        error -= __copy_to_user(&name->nodename, &utsname()->nodename,
-                                __OLD_UTS_LEN);
-        error -= __put_user(0, name->nodename + __OLD_UTS_LEN);
-        error -= __copy_to_user(&name->release, &utsname()->release,
-                                __OLD_UTS_LEN);
-        error -= __put_user(0, name->release + __OLD_UTS_LEN);
-        error -= __copy_to_user(&name->version, &utsname()->version,
-                                __OLD_UTS_LEN);
-        error -= __put_user(0, name->version + __OLD_UTS_LEN);
-        error -= __copy_to_user(&name->machine, &utsname()->machine,
-                                __OLD_UTS_LEN);
-        error = __put_user(0, name->machine + __OLD_UTS_LEN);
-        error = error ? -EFAULT : 0;
-
-        return error;
-}
-
 SYSCALL_DEFINE1(set_thread_area, unsigned long, addr)
 {
         struct thread_info *ti = task_thread_info(current);
@@ -407,94 +365,6 @@ _sys_sysmips(nabi_no_regargs struct pt_regs regs)
 }
 
 /*
- * sys_ipc() is the de-multiplexer for the SysV IPC calls..
- *
- * This is really horribly ugly.
- */
-SYSCALL_DEFINE6(ipc, unsigned int, call, int, first, int, second,
-        unsigned long, third, void __user *, ptr, long, fifth)
-{
-        int version, ret;
-
-        version = call >> 16; /* hack for backward compatibility */
-        call &= 0xffff;
-
-        switch (call) {
-        case SEMOP:
-                return sys_semtimedop(first, (struct sembuf __user *)ptr,
-                                      second, NULL);
-        case SEMTIMEDOP:
-                return sys_semtimedop(first, (struct sembuf __user *)ptr,
-                                      second,
-                                      (const struct timespec __user *)fifth);
-        case SEMGET:
-                return sys_semget(first, second, third);
-        case SEMCTL: {
-                union semun fourth;
-                if (!ptr)
-                        return -EINVAL;
-                if (get_user(fourth.__pad, (void __user *__user *) ptr))
-                        return -EFAULT;
-                return sys_semctl(first, second, third, fourth);
-        }
-
-        case MSGSND:
-                return sys_msgsnd(first, (struct msgbuf __user *) ptr,
-                                  second, third);
-        case MSGRCV:
-                switch (version) {
-                case 0: {
-                        struct ipc_kludge tmp;
-                        if (!ptr)
-                                return -EINVAL;
-
-                        if (copy_from_user(&tmp,
-                                           (struct ipc_kludge __user *) ptr,
-                                           sizeof(tmp)))
-                                return -EFAULT;
-                        return sys_msgrcv(first, tmp.msgp, second,
-                                          tmp.msgtyp, third);
-                }
-                default:
-                        return sys_msgrcv(first,
-                                          (struct msgbuf __user *) ptr,
-                                          second, fifth, third);
-                }
-        case MSGGET:
-                return sys_msgget((key_t) first, second);
-        case MSGCTL:
-                return sys_msgctl(first, second,
-                                  (struct msqid_ds __user *) ptr);
-
-        case SHMAT:
-                switch (version) {
-                default: {
-                        unsigned long raddr;
-                        ret = do_shmat(first, (char __user *) ptr, second,
-                                       &raddr);
-                        if (ret)
-                                return ret;
-                        return put_user(raddr, (unsigned long __user *) third);
-                }
-                case 1: /* iBCS2 emulator entry point */
-                        if (!segment_eq(get_fs(), get_ds()))
-                                return -EINVAL;
-                        return do_shmat(first, (char __user *) ptr, second,
-                                        (unsigned long *) third);
-                }
-        case SHMDT:
-                return sys_shmdt((char __user *)ptr);
-        case SHMGET:
-                return sys_shmget(first, second, third);
-        case SHMCTL:
-                return sys_shmctl(first, second,
-                                  (struct shmid_ds __user *) ptr);
-        default:
-                return -ENOSYS;
-        }
-}
-
-/*
  * No implemented yet ...
  */
 SYSCALL_DEFINE3(cachectl, char *, addr, int, nbytes, int, op)
diff --git a/arch/mn10300/include/asm/dma-mapping.h b/arch/mn10300/include/asm/dma-mapping.h
index ccae8f6c6326..4ed1522b38d2 100644
--- a/arch/mn10300/include/asm/dma-mapping.h
+++ b/arch/mn10300/include/asm/dma-mapping.h
@@ -17,6 +17,11 @@
 #include <asm/cache.h>
 #include <asm/io.h>
 
+/*
+ * See Documentation/DMA-API.txt for the description of how the
+ * following DMA API should work.
+ */
+
 extern void *dma_alloc_coherent(struct device *dev, size_t size,
                                 dma_addr_t *dma_handle, int flag);
 
@@ -26,13 +31,6 @@ extern void dma_free_coherent(struct device *dev, size_t size,
 #define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent((d), (s), (h), (f))
 #define dma_free_noncoherent(d, s, v, h)  dma_free_coherent((d), (s), (v), (h))
 
-/*
- * Map a single buffer of the indicated size for DMA in streaming mode.  The
- * 32-bit bus address to use is returned.
- *
- * Once the device is given the dma address, the device owns this memory until
- * either pci_unmap_single or pci_dma_sync_single is performed.
- */
 static inline
 dma_addr_t dma_map_single(struct device *dev, void *ptr, size_t size,
                           enum dma_data_direction direction)
@@ -42,14 +40,6 @@ dma_addr_t dma_map_single(struct device *dev, void *ptr, size_t size,
         return virt_to_bus(ptr);
 }
 
-/*
- * Unmap a single streaming mode DMA translation.  The dma_addr and size must
- * match what was provided for in a previous pci_map_single call.  All other
- * usages are undefined.
- *
- * After this call, reads by the cpu to the buffer are guarenteed to see
- * whatever the device wrote there.
- */
 static inline
 void dma_unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size,
                       enum dma_data_direction direction)
@@ -57,20 +47,6 @@ void dma_unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size,
         BUG_ON(direction == DMA_NONE);
 }
 
-/*
- * Map a set of buffers described by scatterlist in streaming mode for DMA.
- * This is the scather-gather version of the above pci_map_single interface.
- * Here the scatter gather list elements are each tagged with the appropriate
- * dma address and length.  They are obtained via sg_dma_{address,length}(SG).
- *
- * NOTE: An implementation may be able to use a smaller number of DMA
- *       address/length pairs than there are SG table elements.  (for example
- *       via virtual mapping capabilities) The routine returns the number of
- *       addr/length pairs actually used, at most nents.
- *
- * Device ownership issues as mentioned above for pci_map_single are the same
- * here.
- */
 static inline
 int dma_map_sg(struct device *dev, struct scatterlist *sglist, int nents,
                enum dma_data_direction direction)
@@ -91,11 +67,6 @@ int dma_map_sg(struct device *dev, struct scatterlist *sglist, int nents,
         return nents;
 }
 
-/*
- * Unmap a set of streaming mode DMA translations.
- * Again, cpu read rules concerning calls here are the same as for
- * pci_unmap_single() above.
- */
 static inline
 void dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nhwentries,
                   enum dma_data_direction direction)
@@ -103,10 +74,6 @@ void dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nhwentries,
         BUG_ON(!valid_dma_direction(direction));
 }
 
-/*
- * pci_{map,unmap}_single_page maps a kernel page to a dma_addr_t. identical
- * to pci_map_single, but takes a struct page instead of a virtual address
- */
 static inline
 dma_addr_t dma_map_page(struct device *dev, struct page *page,
                         unsigned long offset, size_t size,
@@ -123,15 +90,6 @@ void dma_unmap_page(struct device *dev, dma_addr_t dma_address, size_t size,
         BUG_ON(direction == DMA_NONE);
 }
 
-/*
- * Make physical memory consistent for a single streaming mode DMA translation
- * after a transfer.
- *
- * If you perform a pci_map_single() but wish to interrogate the buffer using
- * the cpu, yet do not wish to teardown the PCI dma mapping, you must call this
- * function before doing so.  At the next point you give the PCI dma address
- * back to the card, the device again owns the buffer.
- */
 static inline
 void dma_sync_single_for_cpu(struct device *dev, dma_addr_t dma_handle,
                              size_t size, enum dma_data_direction direction)
@@ -161,13 +119,6 @@ dma_sync_single_range_for_device(struct device *dev, dma_addr_t dma_handle,
 }
 
 
-/*
- * Make physical memory consistent for a set of streaming mode DMA translations
- * after a transfer.
- *
- * The same as pci_dma_sync_single but for a scatter-gather list, same rules
- * and usage.
- */
 static inline
 void dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg,
                          int nelems, enum dma_data_direction direction)
@@ -187,12 +138,6 @@ int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
         return 0;
 }
 
-/*
- * Return whether the given PCI device DMA address mask can be supported
- * properly.  For example, if your device can only drive the low 24-bits during
- * PCI bus mastering, then you would pass 0x00ffffff as the mask to this
- * function.
- */
 static inline
 int dma_supported(struct device *dev, u64 mask)
 {
diff --git a/arch/mn10300/include/asm/ptrace.h b/arch/mn10300/include/asm/ptrace.h
index 1b0ba5e182b0..7c2e911052b6 100644
--- a/arch/mn10300/include/asm/ptrace.h
+++ b/arch/mn10300/include/asm/ptrace.h
@@ -99,8 +99,6 @@ struct task_struct;
 extern void show_regs(struct pt_regs *);
 
 #define arch_has_single_step()  (1)
-extern void user_enable_single_step(struct task_struct *);
-extern void user_disable_single_step(struct task_struct *);
 
 #endif  /*  !__ASSEMBLY  */
 
diff --git a/arch/mn10300/include/asm/unistd.h b/arch/mn10300/include/asm/unistd.h
index c05acb95c2a9..9d056f515929 100644
--- a/arch/mn10300/include/asm/unistd.h
+++ b/arch/mn10300/include/asm/unistd.h
@@ -363,6 +363,7 @@
 #define __ARCH_WANT_STAT64
 #define __ARCH_WANT_SYS_ALARM
 #define __ARCH_WANT_SYS_GETHOSTNAME
+#define __ARCH_WANT_SYS_IPC
 #define __ARCH_WANT_SYS_PAUSE
 #define __ARCH_WANT_SYS_SGETMASK
 #define __ARCH_WANT_SYS_SIGNAL
@@ -375,6 +376,7 @@
 #define __ARCH_WANT_SYS_LLSEEK
 #define __ARCH_WANT_SYS_NICE
 #define __ARCH_WANT_SYS_OLD_GETRLIMIT
+#define __ARCH_WANT_SYS_OLD_SELECT
 #define __ARCH_WANT_SYS_OLDUMOUNT
 #define __ARCH_WANT_SYS_SIGPENDING
 #define __ARCH_WANT_SYS_SIGPROCMASK
diff --git a/arch/mn10300/kernel/entry.S b/arch/mn10300/kernel/entry.S
index 88e3e1c3cc21..d9ed5a15c547 100644
--- a/arch/mn10300/kernel/entry.S
+++ b/arch/mn10300/kernel/entry.S
@@ -468,7 +468,7 @@ ENTRY(sys_call_table)
         .long sys_settimeofday
         .long sys_getgroups16   /* 80 */
         .long sys_setgroups16
-        .long old_select
+        .long sys_old_select
         .long sys_symlink
         .long sys_lstat
         .long sys_readlink      /* 85 */
diff --git a/arch/mn10300/kernel/sys_mn10300.c b/arch/mn10300/kernel/sys_mn10300.c
index 17cc6ce04e84..815f1355fad4 100644
--- a/arch/mn10300/kernel/sys_mn10300.c
+++ b/arch/mn10300/kernel/sys_mn10300.c
@@ -31,109 +31,3 @@ asmlinkage long old_mmap(unsigned long addr, unsigned long len,
                 return -EINVAL;
         return sys_mmap_pgoff(addr, len, prot, flags, fd, offset >> PAGE_SHIFT);
 }
-
-struct sel_arg_struct {
-        unsigned long n;
-        fd_set *inp;
-        fd_set *outp;
-        fd_set *exp;
-        struct timeval *tvp;
-};
-
-asmlinkage int old_select(struct sel_arg_struct __user *arg)
-{
-        struct sel_arg_struct a;
-
-        if (copy_from_user(&a, arg, sizeof(a)))
-                return -EFAULT;
-        /* sys_select() does the appropriate kernel locking */
-        return sys_select(a.n, a.inp, a.outp, a.exp, a.tvp);
-}
-
-/*
- * sys_ipc() is the de-multiplexer for the SysV IPC calls..
- *
- * This is really horribly ugly.
- */
-asmlinkage long sys_ipc(uint call, int first, int second,
-                        int third, void __user *ptr, long fifth)
-{
-        int version, ret;
-
-        version = call >> 16; /* hack for backward compatibility */
-        call &= 0xffff;
-
-        switch (call) {
-        case SEMOP:
-                return sys_semtimedop(first, (struct sembuf __user *)ptr,
-                                      second, NULL);
-        case SEMTIMEDOP:
-                return sys_semtimedop(first, (struct sembuf __user *)ptr,
-                                      second,
-                                      (const struct timespec __user *)fifth);
-        case SEMGET:
-                return sys_semget(first, second, third);
-        case SEMCTL: {
-                union semun fourth;
-                if (!ptr)
-                        return -EINVAL;
-                if (get_user(fourth.__pad, (void __user * __user *) ptr))
-                        return -EFAULT;
-                return sys_semctl(first, second, third, fourth);
-        }
-
-        case MSGSND:
-                return sys_msgsnd(first, (struct msgbuf __user *) ptr,
-                                  second, third);
-        case MSGRCV:
-                switch (version) {
-                case 0: {
-                        struct ipc_kludge tmp;
-                        if (!ptr)
-                                return -EINVAL;
-
-                        if (copy_from_user(&tmp,
-                                           (struct ipc_kludge __user *) ptr,
-                                           sizeof(tmp)))
-                                return -EFAULT;
-                        return sys_msgrcv(first, tmp.msgp, second,
-                                          tmp.msgtyp, third);
-                }
-                default:
-                        return sys_msgrcv(first,
-                                          (struct msgbuf __user *) ptr,
-                                           second, fifth, third);
-                }
-        case MSGGET:
-                return sys_msgget((key_t) first, second);
-        case MSGCTL:
-                return sys_msgctl(first, second,
-                                   (struct msqid_ds __user *) ptr);
-
-        case SHMAT:
-                switch (version) {
-                default: {
-                        ulong raddr;
-                        ret = do_shmat(first, (char __user *) ptr, second,
-                                       &raddr);
-                        if (ret)
-                                return ret;
-                        return put_user(raddr, (ulong *) third);
-                }
-                case 1: /* iBCS2 emulator entry point */
-                        if (!segment_eq(get_fs(), get_ds()))
-                                return -EINVAL;
-                        return do_shmat(first, (char __user *) ptr, second,
-                                        (ulong *) third);
-                }
-        case SHMDT:
-                return sys_shmdt((char __user *)ptr);
-        case SHMGET:
-                return sys_shmget(first, second, third);
-        case SHMCTL:
-                return sys_shmctl(first, second,
-                                  (struct shmid_ds __user *) ptr);
-        default:
-                return -EINVAL;
-        }
-}
diff --git a/arch/parisc/Kconfig b/arch/parisc/Kconfig
index f388dc68f605..9c4da3d63bfb 100644
--- a/arch/parisc/Kconfig
+++ b/arch/parisc/Kconfig
@@ -95,6 +95,9 @@ config PM
 config STACKTRACE_SUPPORT
         def_bool y
 
+config NEED_DMA_MAP_STATE
+        def_bool y
+
 config ISA_DMA_API
         bool
 
diff --git a/arch/parisc/include/asm/compat.h b/arch/parisc/include/asm/compat.h
index 7f32611a7a5e..02b77baa5da6 100644
--- a/arch/parisc/include/asm/compat.h
+++ b/arch/parisc/include/asm/compat.h
@@ -7,7 +7,8 @@
 #include <linux/sched.h>
 #include <linux/thread_info.h>
 
-#define COMPAT_USER_HZ 100
+#define COMPAT_USER_HZ          100
+#define COMPAT_UTS_MACHINE      "parisc\0\0"
 
 typedef u32     compat_size_t;
 typedef s32     compat_ssize_t;
diff --git a/arch/parisc/include/asm/pci.h b/arch/parisc/include/asm/pci.h
index 64c7aa590ae5..2242a5c636c2 100644
--- a/arch/parisc/include/asm/pci.h
+++ b/arch/parisc/include/asm/pci.h
@@ -183,20 +183,6 @@ struct pci_bios_ops {
         void (*fixup_bus)(struct pci_bus *bus);
 };
 
-/* pci_unmap_{single,page} is not a nop, thus... */
-#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME)       \
-        dma_addr_t ADDR_NAME;
-#define DECLARE_PCI_UNMAP_LEN(LEN_NAME)         \
-        __u32 LEN_NAME;
-#define pci_unmap_addr(PTR, ADDR_NAME)                  \
-        ((PTR)->ADDR_NAME)
-#define pci_unmap_addr_set(PTR, ADDR_NAME, VAL)         \
-        (((PTR)->ADDR_NAME) = (VAL))
-#define pci_unmap_len(PTR, LEN_NAME)                    \
-        ((PTR)->LEN_NAME)
-#define pci_unmap_len_set(PTR, LEN_NAME, VAL)           \
-        (((PTR)->LEN_NAME) = (VAL))
-
 /*
 ** Stuff declared in arch/parisc/kernel/pci.c
 */
diff --git a/arch/parisc/include/asm/ptrace.h b/arch/parisc/include/asm/ptrace.h
index aead40b16dd8..7f09533da771 100644
--- a/arch/parisc/include/asm/ptrace.h
+++ b/arch/parisc/include/asm/ptrace.h
@@ -47,13 +47,8 @@ struct pt_regs {
 
 #define task_regs(task) ((struct pt_regs *) ((char *)(task) + TASK_REGS))
 
-struct task_struct;
 #define arch_has_single_step()  1
-void user_disable_single_step(struct task_struct *task);
-void user_enable_single_step(struct task_struct *task);
-
 #define arch_has_block_step()   1
-void user_enable_block_step(struct task_struct *task);
 
 /* XXX should we use iaoq[1] or iaoq[0] ? */
 #define user_mode(regs)                 (((regs)->iaoq[0] & 3) ? 1 : 0)
diff --git a/arch/parisc/kernel/sys_parisc.c b/arch/parisc/kernel/sys_parisc.c
index 9147391afb03..c9b932260f47 100644
--- a/arch/parisc/kernel/sys_parisc.c
+++ b/arch/parisc/kernel/sys_parisc.c
@@ -234,18 +234,3 @@ long parisc_personality(unsigned long personality)
 
         return err;
 }
-
-long parisc_newuname(struct new_utsname __user *name)
-{
-        int err = sys_newuname(name);
-
-#ifdef CONFIG_COMPAT
-        if (!err && personality(current->personality) == PER_LINUX32) {
-                if (__put_user(0, name->machine + 6) ||
-                    __put_user(0, name->machine + 7))
-                        err = -EFAULT;
-        }
-#endif
-
-        return err;
-}
diff --git a/arch/parisc/kernel/syscall_table.S b/arch/parisc/kernel/syscall_table.S
index de5f6dab48b7..3d52c978738f 100644
--- a/arch/parisc/kernel/syscall_table.S
+++ b/arch/parisc/kernel/syscall_table.S
@@ -127,7 +127,7 @@
         ENTRY_SAME(socketpair)
         ENTRY_SAME(setpgid)
         ENTRY_SAME(send)
-        ENTRY_OURS(newuname)
+        ENTRY_SAME(newuname)
         ENTRY_SAME(umask)               /* 60 */
         ENTRY_SAME(chroot)
         ENTRY_COMP(ustat)
diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
index 155d571f5e26..8a54eb8e3768 100644
--- a/arch/powerpc/Kconfig
+++ b/arch/powerpc/Kconfig
@@ -672,6 +672,9 @@ config ZONE_DMA
         bool
         default y
 
+config NEED_DMA_MAP_STATE
+        def_bool (PPC64 || NOT_COHERENT_CACHE)
+
 config GENERIC_ISA_DMA
         bool
         depends on PPC64 || POWER4 || 6xx && !CPM2
diff --git a/arch/powerpc/boot/dts/gef_ppc9a.dts b/arch/powerpc/boot/dts/gef_ppc9a.dts
index 977f260d5e64..83f4b79dff85 100644
--- a/arch/powerpc/boot/dts/gef_ppc9a.dts
+++ b/arch/powerpc/boot/dts/gef_ppc9a.dts
@@ -1,7 +1,7 @@
 /*
- * GE Fanuc PPC9A Device Tree Source
+ * GE PPC9A Device Tree Source
  *
- * Copyright 2008 GE Fanuc Intelligent Platforms Embedded Systems, Inc.
+ * Copyright 2008 GE Intelligent Platforms Embedded Systems, Inc.
  *
  * This program is free software; you can redistribute  it and/or modify it
  * under  the terms of  the GNU General  Public License as published by the
diff --git a/arch/powerpc/boot/dts/gef_sbc310.dts b/arch/powerpc/boot/dts/gef_sbc310.dts
index 8e4efff3bda1..fc3a331dd392 100644
--- a/arch/powerpc/boot/dts/gef_sbc310.dts
+++ b/arch/powerpc/boot/dts/gef_sbc310.dts
@@ -1,7 +1,7 @@
 /*
- * GE Fanuc SBC310 Device Tree Source
+ * GE SBC310 Device Tree Source
  *
- * Copyright 2008 GE Fanuc Intelligent Platforms Embedded Systems, Inc.
+ * Copyright 2008 GE Intelligent Platforms Embedded Systems, Inc.
  *
  * This program is free software; you can redistribute  it and/or modify it
  * under  the terms of  the GNU General  Public License as published by the
diff --git a/arch/powerpc/boot/dts/gef_sbc610.dts b/arch/powerpc/boot/dts/gef_sbc610.dts
index bb7060078fb4..c0671cc98125 100644
--- a/arch/powerpc/boot/dts/gef_sbc610.dts
+++ b/arch/powerpc/boot/dts/gef_sbc610.dts
@@ -1,7 +1,7 @@
 /*
- * GE Fanuc SBC610 Device Tree Source
+ * GE SBC610 Device Tree Source
  *
- * Copyright 2008 GE Fanuc Intelligent Platforms Embedded Systems, Inc.
+ * Copyright 2008 GE Intelligent Platforms Embedded Systems, Inc.
  *
  * This program is free software; you can redistribute  it and/or modify it
  * under  the terms of  the GNU General  Public License as published by the
diff --git a/arch/powerpc/boot/dts/kmeter1.dts b/arch/powerpc/boot/dts/kmeter1.dts
index 65b8b4f27efe..d8b5d12fb663 100644
--- a/arch/powerpc/boot/dts/kmeter1.dts
+++ b/arch/powerpc/boot/dts/kmeter1.dts
@@ -490,7 +490,7 @@
                         compatible = "cfi-flash";
                         /*
                          * The Intel P30 chip has 2 non-identical chips on
-                         * one die, so we need to define 2 seperate regions
+                         * one die, so we need to define 2 separate regions
                          * that are scanned by physmap_of independantly.
                          */
                         reg = <0 0x00000000 0x02000000
diff --git a/arch/powerpc/include/asm/compat.h b/arch/powerpc/include/asm/compat.h
index 4774c2f92232..396d21a80058 100644
--- a/arch/powerpc/include/asm/compat.h
+++ b/arch/powerpc/include/asm/compat.h
@@ -7,7 +7,8 @@
 #include <linux/types.h>
 #include <linux/sched.h>
 
-#define COMPAT_USER_HZ  100
+#define COMPAT_USER_HZ          100
+#define COMPAT_UTS_MACHINE      "ppc\0\0"
 
 typedef u32             compat_size_t;
 typedef s32             compat_ssize_t;
diff --git a/arch/powerpc/include/asm/dma-mapping.h b/arch/powerpc/include/asm/dma-mapping.h
index 80a973bb9e71..c85ef230135b 100644
--- a/arch/powerpc/include/asm/dma-mapping.h
+++ b/arch/powerpc/include/asm/dma-mapping.h
@@ -127,9 +127,6 @@ static inline int dma_supported(struct device *dev, u64 mask)
         return dma_ops->dma_supported(dev, mask);
 }
 
-/* We have our own implementation of pci_set_dma_mask() */
-#define HAVE_ARCH_PCI_SET_DMA_MASK
-
 static inline int dma_set_mask(struct device *dev, u64 dma_mask)
 {
         struct dma_map_ops *dma_ops = get_dma_ops(dev);
diff --git a/arch/powerpc/include/asm/paca.h b/arch/powerpc/include/asm/paca.h
index d8a693109c82..a011603d4079 100644
--- a/arch/powerpc/include/asm/paca.h
+++ b/arch/powerpc/include/asm/paca.h
@@ -14,6 +14,9 @@
 #define _ASM_POWERPC_PACA_H
 #ifdef __KERNEL__
 
+#ifdef CONFIG_PPC64
+
+#include <linux/init.h>
 #include <asm/types.h>
 #include <asm/lppaca.h>
 #include <asm/mmu.h>
@@ -145,8 +148,19 @@ struct paca_struct {
 #endif
 };
 
-extern struct paca_struct paca[];
-extern void initialise_pacas(void);
+extern struct paca_struct *paca;
+extern __initdata struct paca_struct boot_paca;
+extern void initialise_paca(struct paca_struct *new_paca, int cpu);
+
+extern void allocate_pacas(void);
+extern void free_unused_pacas(void);
+
+#else /* CONFIG_PPC64 */
+
+static inline void allocate_pacas(void) { };
+static inline void free_unused_pacas(void) { };
+
+#endif /* CONFIG_PPC64 */
 
 #endif /* __KERNEL__ */
 #endif /* _ASM_POWERPC_PACA_H */
diff --git a/arch/powerpc/include/asm/pci.h b/arch/powerpc/include/asm/pci.h
index b5ea626eea2d..a20a9ad2258b 100644
--- a/arch/powerpc/include/asm/pci.h
+++ b/arch/powerpc/include/asm/pci.h
@@ -141,38 +141,6 @@ extern int pci_mmap_legacy_page_range(struct pci_bus *bus,
 
 #define HAVE_PCI_LEGACY 1
 
-#if defined(CONFIG_PPC64) || defined(CONFIG_NOT_COHERENT_CACHE)
-/*
- * For 64-bit kernels, pci_unmap_{single,page} is not a nop.
- * For 32-bit non-coherent kernels, pci_dma_sync_single_for_cpu() and
- * so on are not nops.
- * and thus...
- */
-#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME)       \
-        dma_addr_t ADDR_NAME;
-#define DECLARE_PCI_UNMAP_LEN(LEN_NAME)         \
-        __u32 LEN_NAME;
-#define pci_unmap_addr(PTR, ADDR_NAME)                  \
-        ((PTR)->ADDR_NAME)
-#define pci_unmap_addr_set(PTR, ADDR_NAME, VAL)         \
-        (((PTR)->ADDR_NAME) = (VAL))
-#define pci_unmap_len(PTR, LEN_NAME)                    \
-        ((PTR)->LEN_NAME)
-#define pci_unmap_len_set(PTR, LEN_NAME, VAL)           \
-        (((PTR)->LEN_NAME) = (VAL))
-
-#else /* 32-bit && coherent */
-
-/* pci_unmap_{page,single} is a nop so... */
-#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME)
-#define DECLARE_PCI_UNMAP_LEN(LEN_NAME)
-#define pci_unmap_addr(PTR, ADDR_NAME)          (0)
-#define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) do { } while (0)
-#define pci_unmap_len(PTR, LEN_NAME)            (0)
-#define pci_unmap_len_set(PTR, LEN_NAME, VAL)   do { } while (0)
-
-#endif /* CONFIG_PPC64 || CONFIG_NOT_COHERENT_CACHE */
-
 #ifdef CONFIG_PPC64
 
 /* The PCI address space does not equal the physical memory address
diff --git a/arch/powerpc/include/asm/perf_event.h b/arch/powerpc/include/asm/perf_event.h
index 3288ce3997e0..e6d4ce69b126 100644
--- a/arch/powerpc/include/asm/perf_event.h
+++ b/arch/powerpc/include/asm/perf_event.h
@@ -1,110 +1,23 @@
 /*
- * Performance event support - PowerPC-specific definitions.
+ * Performance event support - hardware-specific disambiguation
  *
- * Copyright 2008-2009 Paul Mackerras, IBM Corporation.
+ * For now this is a compile-time decision, but eventually it should be
+ * runtime.  This would allow multiplatform perf event support for e300 (fsl
+ * embedded perf counters) plus server/classic, and would accommodate
+ * devices other than the core which provide their own performance counters.
+ *
+ * Copyright 2010 Freescale Semiconductor, Inc.
  *
  * This program is free software; you can redistribute it and/or
  * modify it under the terms of the GNU General Public License
  * as published by the Free Software Foundation; either version
  * 2 of the License, or (at your option) any later version.
  */
-#include <linux/types.h>
-
-#include <asm/hw_irq.h>
-
-#define MAX_HWEVENTS            8
-#define MAX_EVENT_ALTERNATIVES  8
-#define MAX_LIMITED_HWCOUNTERS  2
-
-/*
- * This struct provides the constants and functions needed to
- * describe the PMU on a particular POWER-family CPU.
- */
-struct power_pmu {
-        const char      *name;
-        int             n_counter;
-        int             max_alternatives;
-        unsigned long   add_fields;
-        unsigned long   test_adder;
-        int             (*compute_mmcr)(u64 events[], int n_ev,
-                                unsigned int hwc[], unsigned long mmcr[]);
-        int             (*get_constraint)(u64 event_id, unsigned long *mskp,
-                                unsigned long *valp);
-        int             (*get_alternatives)(u64 event_id, unsigned int flags,
-                                u64 alt[]);
-        void            (*disable_pmc)(unsigned int pmc, unsigned long mmcr[]);
-        int             (*limited_pmc_event)(u64 event_id);
-        u32             flags;
-        int             n_generic;
-        int             *generic_events;
-        int             (*cache_events)[PERF_COUNT_HW_CACHE_MAX]
-                               [PERF_COUNT_HW_CACHE_OP_MAX]
-                               [PERF_COUNT_HW_CACHE_RESULT_MAX];
-};
-
-/*
- * Values for power_pmu.flags
- */
-#define PPMU_LIMITED_PMC5_6     1       /* PMC5/6 have limited function */
-#define PPMU_ALT_SIPR           2       /* uses alternate posn for SIPR/HV */
-
-/*
- * Values for flags to get_alternatives()
- */
-#define PPMU_LIMITED_PMC_OK     1       /* can put this on a limited PMC */
-#define PPMU_LIMITED_PMC_REQD   2       /* have to put this on a limited PMC */
-#define PPMU_ONLY_COUNT_RUN     4       /* only counting in run state */
-
-extern int register_power_pmu(struct power_pmu *);
 
-struct pt_regs;
-extern unsigned long perf_misc_flags(struct pt_regs *regs);
-extern unsigned long perf_instruction_pointer(struct pt_regs *regs);
-
-#define PERF_EVENT_INDEX_OFFSET 1
-
-/*
- * Only override the default definitions in include/linux/perf_event.h
- * if we have hardware PMU support.
- */
 #ifdef CONFIG_PPC_PERF_CTRS
-#define perf_misc_flags(regs)   perf_misc_flags(regs)
+#include <asm/perf_event_server.h>
 #endif
 
-/*
- * The power_pmu.get_constraint function returns a 32/64-bit value and
- * a 32/64-bit mask that express the constraints between this event_id and
- * other events.
- *
- * The value and mask are divided up into (non-overlapping) bitfields
- * of three different types:
- *
- * Select field: this expresses the constraint that some set of bits
- * in MMCR* needs to be set to a specific value for this event_id.  For a
- * select field, the mask contains 1s in every bit of the field, and
- * the value contains a unique value for each possible setting of the
- * MMCR* bits.  The constraint checking code will ensure that two events
- * that set the same field in their masks have the same value in their
- * value dwords.
- *
- * Add field: this expresses the constraint that there can be at most
- * N events in a particular class.  A field of k bits can be used for
- * N <= 2^(k-1) - 1.  The mask has the most significant bit of the field
- * set (and the other bits 0), and the value has only the least significant
- * bit of the field set.  In addition, the 'add_fields' and 'test_adder'
- * in the struct power_pmu for this processor come into play.  The
- * add_fields value contains 1 in the LSB of the field, and the
- * test_adder contains 2^(k-1) - 1 - N in the field.
- *
- * NAND field: this expresses the constraint that you may not have events
- * in all of a set of classes.  (For example, on PPC970, you can't select
- * events from the FPU, ISU and IDU simultaneously, although any two are
- * possible.)  For N classes, the field is N+1 bits wide, and each class
- * is assigned one bit from the least-significant N bits.  The mask has
- * only the most-significant bit set, and the value has only the bit
- * for the event_id's class set.  The test_adder has the least significant
- * bit set in the field.
- *
- * If an event_id is not subject to the constraint expressed by a particular
- * field, then it will have 0 in both the mask and value for that field.
- */
+#ifdef CONFIG_FSL_EMB_PERF_EVENT
+#include <asm/perf_event_fsl_emb.h>
+#endif
diff --git a/arch/powerpc/include/asm/perf_event_fsl_emb.h b/arch/powerpc/include/asm/perf_event_fsl_emb.h
new file mode 100644
index 000000000000..718a9fa94e68
--- /dev/null
+++ b/arch/powerpc/include/asm/perf_event_fsl_emb.h
@@ -0,0 +1,50 @@
+/*
+ * Performance event support - Freescale embedded specific definitions.
+ *
+ * Copyright 2008-2009 Paul Mackerras, IBM Corporation.
+ * Copyright 2010 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+
+#include <linux/types.h>
+#include <asm/hw_irq.h>
+
+#define MAX_HWEVENTS 4
+
+/* event flags */
+#define FSL_EMB_EVENT_VALID      1
+#define FSL_EMB_EVENT_RESTRICTED 2
+
+/* upper half of event flags is PMLCb */
+#define FSL_EMB_EVENT_THRESHMUL  0x0000070000000000ULL
+#define FSL_EMB_EVENT_THRESH     0x0000003f00000000ULL
+
+struct fsl_emb_pmu {
+        const char      *name;
+        int             n_counter; /* total number of counters */
+
+        /*
+         * The number of contiguous counters starting at zero that
+         * can hold restricted events, or zero if there are no
+         * restricted events.
+         *
+         * This isn't a very flexible method of expressing constraints,
+         * but it's very simple and is adequate for existing chips.
+         */
+        int             n_restricted;
+
+        /* Returns event flags and PMLCb (FSL_EMB_EVENT_*) */
+        u64             (*xlate_event)(u64 event_id);
+
+        int             n_generic;
+        int             *generic_events;
+        int             (*cache_events)[PERF_COUNT_HW_CACHE_MAX]
+                               [PERF_COUNT_HW_CACHE_OP_MAX]
+                               [PERF_COUNT_HW_CACHE_RESULT_MAX];
+};
+
+int register_fsl_emb_pmu(struct fsl_emb_pmu *);
diff --git a/arch/powerpc/include/asm/perf_event_server.h b/arch/powerpc/include/asm/perf_event_server.h
new file mode 100644
index 000000000000..8f1df1208d23
--- /dev/null
+++ b/arch/powerpc/include/asm/perf_event_server.h
@@ -0,0 +1,110 @@
+/*
+ * Performance event support - PowerPC classic/server specific definitions.
+ *
+ * Copyright 2008-2009 Paul Mackerras, IBM Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+
+#include <linux/types.h>
+#include <asm/hw_irq.h>
+
+#define MAX_HWEVENTS            8
+#define MAX_EVENT_ALTERNATIVES  8
+#define MAX_LIMITED_HWCOUNTERS  2
+
+/*
+ * This struct provides the constants and functions needed to
+ * describe the PMU on a particular POWER-family CPU.
+ */
+struct power_pmu {
+        const char      *name;
+        int             n_counter;
+        int             max_alternatives;
+        unsigned long   add_fields;
+        unsigned long   test_adder;
+        int             (*compute_mmcr)(u64 events[], int n_ev,
+                                unsigned int hwc[], unsigned long mmcr[]);
+        int             (*get_constraint)(u64 event_id, unsigned long *mskp,
+                                unsigned long *valp);
+        int             (*get_alternatives)(u64 event_id, unsigned int flags,
+                                u64 alt[]);
+        void            (*disable_pmc)(unsigned int pmc, unsigned long mmcr[]);
+        int             (*limited_pmc_event)(u64 event_id);
+        u32             flags;
+        int             n_generic;
+        int             *generic_events;
+        int             (*cache_events)[PERF_COUNT_HW_CACHE_MAX]
+                               [PERF_COUNT_HW_CACHE_OP_MAX]
+                               [PERF_COUNT_HW_CACHE_RESULT_MAX];
+};
+
+/*
+ * Values for power_pmu.flags
+ */
+#define PPMU_LIMITED_PMC5_6     1       /* PMC5/6 have limited function */
+#define PPMU_ALT_SIPR           2       /* uses alternate posn for SIPR/HV */
+
+/*
+ * Values for flags to get_alternatives()
+ */
+#define PPMU_LIMITED_PMC_OK     1       /* can put this on a limited PMC */
+#define PPMU_LIMITED_PMC_REQD   2       /* have to put this on a limited PMC */
+#define PPMU_ONLY_COUNT_RUN     4       /* only counting in run state */
+
+extern int register_power_pmu(struct power_pmu *);
+
+struct pt_regs;
+extern unsigned long perf_misc_flags(struct pt_regs *regs);
+extern unsigned long perf_instruction_pointer(struct pt_regs *regs);
+
+#define PERF_EVENT_INDEX_OFFSET 1
+
+/*
+ * Only override the default definitions in include/linux/perf_event.h
+ * if we have hardware PMU support.
+ */
+#ifdef CONFIG_PPC_PERF_CTRS
+#define perf_misc_flags(regs)   perf_misc_flags(regs)
+#endif
+
+/*
+ * The power_pmu.get_constraint function returns a 32/64-bit value and
+ * a 32/64-bit mask that express the constraints between this event_id and
+ * other events.
+ *
+ * The value and mask are divided up into (non-overlapping) bitfields
+ * of three different types:
+ *
+ * Select field: this expresses the constraint that some set of bits
+ * in MMCR* needs to be set to a specific value for this event_id.  For a
+ * select field, the mask contains 1s in every bit of the field, and
+ * the value contains a unique value for each possible setting of the
+ * MMCR* bits.  The constraint checking code will ensure that two events
+ * that set the same field in their masks have the same value in their
+ * value dwords.
+ *
+ * Add field: this expresses the constraint that there can be at most
+ * N events in a particular class.  A field of k bits can be used for
+ * N <= 2^(k-1) - 1.  The mask has the most significant bit of the field
+ * set (and the other bits 0), and the value has only the least significant
+ * bit of the field set.  In addition, the 'add_fields' and 'test_adder'
+ * in the struct power_pmu for this processor come into play.  The
+ * add_fields value contains 1 in the LSB of the field, and the
+ * test_adder contains 2^(k-1) - 1 - N in the field.
+ *
+ * NAND field: this expresses the constraint that you may not have events
+ * in all of a set of classes.  (For example, on PPC970, you can't select
+ * events from the FPU, ISU and IDU simultaneously, although any two are
+ * possible.)  For N classes, the field is N+1 bits wide, and each class
+ * is assigned one bit from the least-significant N bits.  The mask has
+ * only the most-significant bit set, and the value has only the bit
+ * for the event_id's class set.  The test_adder has the least significant
+ * bit set in the field.
+ *
+ * If an event_id is not subject to the constraint expressed by a particular
+ * field, then it will have 0 in both the mask and value for that field.
+ */
diff --git a/arch/powerpc/include/asm/ptrace.h b/arch/powerpc/include/asm/ptrace.h
index b45108126562..9e2d84c06b74 100644
--- a/arch/powerpc/include/asm/ptrace.h
+++ b/arch/powerpc/include/asm/ptrace.h
@@ -137,15 +137,8 @@ do {									      \
 } while (0)
 #endif /* __powerpc64__ */
 
-/*
- * These are defined as per linux/ptrace.h, which see.
- */
 #define arch_has_single_step()  (1)
 #define arch_has_block_step()   (!cpu_has_feature(CPU_FTR_601))
-extern void user_enable_single_step(struct task_struct *);
-extern void user_enable_block_step(struct task_struct *);
-extern void user_disable_single_step(struct task_struct *);
-
 #define ARCH_HAS_USER_SINGLE_STEP_INFO
 
 #endif /* __ASSEMBLY__ */
diff --git a/arch/powerpc/include/asm/reg_booke.h b/arch/powerpc/include/asm/reg_booke.h
index 8808d307fe7e..414d434a66d0 100644
--- a/arch/powerpc/include/asm/reg_booke.h
+++ b/arch/powerpc/include/asm/reg_booke.h
@@ -421,8 +421,8 @@
 /* Bit definitions related to the DBCR2. */
 #define DBCR2_DAC1US    0xC0000000      /* Data Addr Cmp 1 Sup/User   */
 #define DBCR2_DAC1ER    0x30000000      /* Data Addr Cmp 1 Eff/Real */
-#define DBCR2_DAC2US    0x00000000      /* Data Addr Cmp 2 Sup/User   */
-#define DBCR2_DAC2ER    0x00000000      /* Data Addr Cmp 2 Eff/Real */
+#define DBCR2_DAC2US    0x0C000000      /* Data Addr Cmp 2 Sup/User   */
+#define DBCR2_DAC2ER    0x03000000      /* Data Addr Cmp 2 Eff/Real */
 #define DBCR2_DAC12M    0x00800000      /* DAC 1-2 range enable */
 #define DBCR2_DAC12MM   0x00400000      /* DAC 1-2 Mask mode*/
 #define DBCR2_DAC12MX   0x00C00000      /* DAC 1-2 range eXclusive */
diff --git a/arch/powerpc/include/asm/reg_fsl_emb.h b/arch/powerpc/include/asm/reg_fsl_emb.h
index 0de404dfee8b..77bb71cfd991 100644
--- a/arch/powerpc/include/asm/reg_fsl_emb.h
+++ b/arch/powerpc/include/asm/reg_fsl_emb.h
@@ -31,7 +31,7 @@
 #define PMLCA_FCM0      0x08000000      /* Freeze when PMM==0 */
 #define PMLCA_CE        0x04000000      /* Condition Enable */
 
-#define PMLCA_EVENT_MASK 0x007f0000     /* Event field */
+#define PMLCA_EVENT_MASK 0x00ff0000     /* Event field */
 #define PMLCA_EVENT_SHIFT       16
 
 #define PMRN_PMLCB0     0x110   /* PM Local Control B0 */
diff --git a/arch/powerpc/include/asm/syscalls.h b/arch/powerpc/include/asm/syscalls.h
index eb8eb400c664..4084e567d28e 100644
--- a/arch/powerpc/include/asm/syscalls.h
+++ b/arch/powerpc/include/asm/syscalls.h
@@ -7,7 +7,6 @@
 #include <linux/types.h>
 #include <asm/signal.h>
 
-struct new_utsname;
 struct pt_regs;
 struct rtas_args;
 struct sigaction;
@@ -35,12 +34,9 @@ asmlinkage long sys_pipe2(int __user *fildes, int flags);
 asmlinkage long sys_rt_sigaction(int sig,
                 const struct sigaction __user *act,
                 struct sigaction __user *oact, size_t sigsetsize);
-asmlinkage int sys_ipc(uint call, int first, unsigned long second,
-                long third, void __user *ptr, long fifth);
 asmlinkage long ppc64_personality(unsigned long personality);
 asmlinkage int ppc_rtas(struct rtas_args __user *uargs);
 asmlinkage time_t sys64_time(time_t __user * tloc);
-asmlinkage long ppc_newuname(struct new_utsname __user * name);
 
 asmlinkage long sys_rt_sigsuspend(sigset_t __user *unewset,
                 size_t sigsetsize);
diff --git a/arch/powerpc/include/asm/systbl.h b/arch/powerpc/include/asm/systbl.h
index 07d2d19ab5e9..a5ee345b6a5c 100644
--- a/arch/powerpc/include/asm/systbl.h
+++ b/arch/powerpc/include/asm/systbl.h
@@ -125,7 +125,7 @@ SYSCALL_SPU(fsync)
 SYS32ONLY(sigreturn)
 PPC_SYS(clone)
 COMPAT_SYS_SPU(setdomainname)
-PPC_SYS_SPU(newuname)
+SYSCALL_SPU(newuname)
 SYSCALL(ni_syscall)
 COMPAT_SYS_SPU(adjtimex)
 SYSCALL_SPU(mprotect)
diff --git a/arch/powerpc/include/asm/unistd.h b/arch/powerpc/include/asm/unistd.h
index f6ca76176766..f0a10266e7f7 100644
--- a/arch/powerpc/include/asm/unistd.h
+++ b/arch/powerpc/include/asm/unistd.h
@@ -364,6 +364,7 @@
 #define __ARCH_WANT_STAT64
 #define __ARCH_WANT_SYS_ALARM
 #define __ARCH_WANT_SYS_GETHOSTNAME
+#define __ARCH_WANT_SYS_IPC
 #define __ARCH_WANT_SYS_PAUSE
 #define __ARCH_WANT_SYS_SGETMASK
 #define __ARCH_WANT_SYS_SIGNAL
@@ -376,6 +377,7 @@
 #define __ARCH_WANT_SYS_LLSEEK
 #define __ARCH_WANT_SYS_NICE
 #define __ARCH_WANT_SYS_OLD_GETRLIMIT
+#define __ARCH_WANT_SYS_OLD_UNAME
 #define __ARCH_WANT_SYS_OLDUMOUNT
 #define __ARCH_WANT_SYS_SIGPENDING
 #define __ARCH_WANT_SYS_SIGPROCMASK
diff --git a/arch/powerpc/kernel/Makefile b/arch/powerpc/kernel/Makefile
index c002b0410219..877326320e74 100644
--- a/arch/powerpc/kernel/Makefile
+++ b/arch/powerpc/kernel/Makefile
@@ -98,11 +98,16 @@ obj64-$(CONFIG_AUDIT)		+= compat_audit.o
 
 obj-$(CONFIG_DYNAMIC_FTRACE)    += ftrace.o
 obj-$(CONFIG_FUNCTION_GRAPH_TRACER)     += ftrace.o
-obj-$(CONFIG_PPC_PERF_CTRS)     += perf_event.o perf_callchain.o
+obj-$(CONFIG_PERF_EVENTS)       += perf_callchain.o
+
+obj-$(CONFIG_PPC_PERF_CTRS)     += perf_event.o
 obj64-$(CONFIG_PPC_PERF_CTRS)   += power4-pmu.o ppc970-pmu.o power5-pmu.o \
                                    power5+-pmu.o power6-pmu.o power7-pmu.o
 obj32-$(CONFIG_PPC_PERF_CTRS)   += mpc7450-pmu.o
 
+obj-$(CONFIG_FSL_EMB_PERF_EVENT) += perf_event_fsl_emb.o
+obj-$(CONFIG_FSL_EMB_PERF_EVENT_E500) += e500-pmu.o
+
 obj-$(CONFIG_8XX_MINIMAL_FPEMU) += softemu8xx.o
 
 ifneq ($(CONFIG_PPC_INDIRECT_IO),y)
diff --git a/arch/powerpc/kernel/cputable.c b/arch/powerpc/kernel/cputable.c
index 2fc82bac3bbc..8af4949434b2 100644
--- a/arch/powerpc/kernel/cputable.c
+++ b/arch/powerpc/kernel/cputable.c
@@ -1808,7 +1808,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .icache_bsize           = 64,
                 .dcache_bsize           = 64,
                 .num_pmcs               = 4,
-                .oprofile_cpu_type      = "ppc/e500", /* xxx - galak, e500mc? */
+                .oprofile_cpu_type      = "ppc/e500mc",
                 .oprofile_type          = PPC_OPROFILE_FSL_EMB,
                 .cpu_setup              = __setup_cpu_e500mc,
                 .machine_check          = machine_check_e500,
diff --git a/arch/powerpc/kernel/e500-pmu.c b/arch/powerpc/kernel/e500-pmu.c
new file mode 100644
index 000000000000..7c07de0d8943
--- /dev/null
+++ b/arch/powerpc/kernel/e500-pmu.c
@@ -0,0 +1,129 @@
+/*
+ * Performance counter support for e500 family processors.
+ *
+ * Copyright 2008-2009 Paul Mackerras, IBM Corporation.
+ * Copyright 2010 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include <linux/string.h>
+#include <linux/perf_event.h>
+#include <asm/reg.h>
+#include <asm/cputable.h>
+
+/*
+ * Map of generic hardware event types to hardware events
+ * Zero if unsupported
+ */
+static int e500_generic_events[] = {
+        [PERF_COUNT_HW_CPU_CYCLES] = 1,
+        [PERF_COUNT_HW_INSTRUCTIONS] = 2,
+        [PERF_COUNT_HW_CACHE_MISSES] = 41, /* Data L1 cache reloads */
+        [PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = 12,
+        [PERF_COUNT_HW_BRANCH_MISSES] = 15,
+};
+
+#define C(x)    PERF_COUNT_HW_CACHE_##x
+
+/*
+ * Table of generalized cache-related events.
+ * 0 means not supported, -1 means nonsensical, other values
+ * are event codes.
+ */
+static int e500_cache_events[C(MAX)][C(OP_MAX)][C(RESULT_MAX)] = {
+        /*
+         * D-cache misses are not split into read/write/prefetch;
+         * use raw event 41.
+         */
+        [C(L1D)] = {            /*      RESULT_ACCESS   RESULT_MISS */
+                [C(OP_READ)] = {        27,             0       },
+                [C(OP_WRITE)] = {       28,             0       },
+                [C(OP_PREFETCH)] = {    29,             0       },
+        },
+        [C(L1I)] = {            /*      RESULT_ACCESS   RESULT_MISS */
+                [C(OP_READ)] = {        2,              60      },
+                [C(OP_WRITE)] = {       -1,             -1      },
+                [C(OP_PREFETCH)] = {    0,              0       },
+        },
+        /*
+         * Assuming LL means L2, it's not a good match for this model.
+         * It allocates only on L1 castout or explicit prefetch, and
+         * does not have separate read/write events (but it does have
+         * separate instruction/data events).
+         */
+        [C(LL)] = {             /*      RESULT_ACCESS   RESULT_MISS */
+                [C(OP_READ)] = {        0,              0       },
+                [C(OP_WRITE)] = {       0,              0       },
+                [C(OP_PREFETCH)] = {    0,              0       },
+        },
+        /*
+         * There are data/instruction MMU misses, but that's a miss on
+         * the chip's internal level-one TLB which is probably not
+         * what the user wants.  Instead, unified level-two TLB misses
+         * are reported here.
+         */
+        [C(DTLB)] = {           /*      RESULT_ACCESS   RESULT_MISS */
+                [C(OP_READ)] = {        26,             66      },
+                [C(OP_WRITE)] = {       -1,             -1      },
+                [C(OP_PREFETCH)] = {    -1,             -1      },
+        },
+        [C(BPU)] = {            /*      RESULT_ACCESS   RESULT_MISS */
+                [C(OP_READ)] = {        12,             15      },
+                [C(OP_WRITE)] = {       -1,             -1      },
+                [C(OP_PREFETCH)] = {    -1,             -1      },
+        },
+};
+
+static int num_events = 128;
+
+/* Upper half of event id is PMLCb, for threshold events */
+static u64 e500_xlate_event(u64 event_id)
+{
+        u32 event_low = (u32)event_id;
+        u64 ret;
+
+        if (event_low >= num_events)
+                return 0;
+
+        ret = FSL_EMB_EVENT_VALID;
+
+        if (event_low >= 76 && event_low <= 81) {
+                ret |= FSL_EMB_EVENT_RESTRICTED;
+                ret |= event_id &
+                       (FSL_EMB_EVENT_THRESHMUL | FSL_EMB_EVENT_THRESH);
+        } else if (event_id &
+                   (FSL_EMB_EVENT_THRESHMUL | FSL_EMB_EVENT_THRESH)) {
+                /* Threshold requested on non-threshold event */
+                return 0;
+        }
+
+        return ret;
+}
+
+static struct fsl_emb_pmu e500_pmu = {
+        .name                   = "e500 family",
+        .n_counter              = 4,
+        .n_restricted           = 2,
+        .xlate_event            = e500_xlate_event,
+        .n_generic              = ARRAY_SIZE(e500_generic_events),
+        .generic_events         = e500_generic_events,
+        .cache_events           = &e500_cache_events,
+};
+
+static int init_e500_pmu(void)
+{
+        if (!cur_cpu_spec->oprofile_cpu_type)
+                return -ENODEV;
+
+        if (!strcmp(cur_cpu_spec->oprofile_cpu_type, "ppc/e500mc"))
+                num_events = 256;
+        else if (strcmp(cur_cpu_spec->oprofile_cpu_type, "ppc/e500"))
+                return -ENODEV;
+
+        return register_fsl_emb_pmu(&e500_pmu);
+}
+
+arch_initcall(init_e500_pmu);
diff --git a/arch/powerpc/kernel/head_64.S b/arch/powerpc/kernel/head_64.S
index 925807488022..bed9a29ee383 100644
--- a/arch/powerpc/kernel/head_64.S
+++ b/arch/powerpc/kernel/head_64.S
@@ -219,7 +219,8 @@ generic_secondary_common_init:
          * physical cpu id in r24, we need to search the pacas to find
          * which logical id maps to our physical one.
          */
-        LOAD_REG_ADDR(r13, paca)        /* Get base vaddr of paca array  */
+        LOAD_REG_ADDR(r13, paca)        /* Load paca pointer             */
+        ld      r13,0(r13)              /* Get base vaddr of paca array  */
         li      r5,0                    /* logical cpu id                */
 1:      lhz     r6,PACAHWCPUID(r13)     /* Load HW procid from paca      */
         cmpw    r6,r24                  /* Compare to our id             */
@@ -536,7 +537,8 @@ _GLOBAL(pmac_secondary_start)
         mtmsrd  r3                      /* RI on */
 
         /* Set up a paca value for this processor. */
-        LOAD_REG_ADDR(r4,paca)          /* Get base vaddr of paca array */
+        LOAD_REG_ADDR(r4,paca)          /* Load paca pointer            */
+        ld      r4,0(r4)                /* Get base vaddr of paca array */
         mulli   r13,r24,PACA_SIZE       /* Calculate vaddr of right paca */
         add     r13,r13,r4              /* for this processor.          */
         mtspr   SPRN_SPRG_PACA,r13      /* Save vaddr of paca in an SPRG*/
@@ -615,6 +617,17 @@ _GLOBAL(start_secondary_prolog)
         std     r3,0(r1)                /* Zero the stack frame pointer */
         bl      .start_secondary
         b       .
+/*
+ * Reset stack pointer and call start_secondary
+ * to continue with online operation when woken up
+ * from cede in cpu offline.
+ */
+_GLOBAL(start_secondary_resume)
+        ld      r1,PACAKSAVE(r13)       /* Reload kernel stack pointer */
+        li      r3,0
+        std     r3,0(r1)                /* Zero the stack frame pointer */
+        bl      .start_secondary
+        b       .
 #endif
 
 /*
diff --git a/arch/powerpc/kernel/legacy_serial.c b/arch/powerpc/kernel/legacy_serial.c
index 9ddfaef1a184..035ada5443ee 100644
--- a/arch/powerpc/kernel/legacy_serial.c
+++ b/arch/powerpc/kernel/legacy_serial.c
@@ -469,7 +469,7 @@ static int __init serial_dev_init(void)
                 return -ENODEV;
 
         /*
-         * Before we register the platfrom serial devices, we need
+         * Before we register the platform serial devices, we need
          * to fixup their interrupts and their IO ports.
          */
         DBG("Fixing serial ports interrupts and IO ports ...\n");
diff --git a/arch/powerpc/kernel/paca.c b/arch/powerpc/kernel/paca.c
index d16b1ea55d44..0c40c6f476fe 100644
--- a/arch/powerpc/kernel/paca.c
+++ b/arch/powerpc/kernel/paca.c
@@ -9,11 +9,15 @@
 
 #include <linux/threads.h>
 #include <linux/module.h>
+#include <linux/lmb.h>
 
+#include <asm/firmware.h>
 #include <asm/lppaca.h>
 #include <asm/paca.h>
 #include <asm/sections.h>
 #include <asm/pgtable.h>
+#include <asm/iseries/lpar_map.h>
+#include <asm/iseries/hv_types.h>
 
 /* This symbol is provided by the linker - let it fill in the paca
  * field correctly */
@@ -70,37 +74,82 @@ struct slb_shadow slb_shadow[] __cacheline_aligned = {
  * processors.  The processor VPD array needs one entry per physical
  * processor (not thread).
  */
-struct paca_struct paca[NR_CPUS];
+struct paca_struct *paca;
 EXPORT_SYMBOL(paca);
 
-void __init initialise_pacas(void)
-{
-        int cpu;
+struct paca_struct boot_paca;
 
-        /* The TOC register (GPR2) points 32kB into the TOC, so that 64kB
-         * of the TOC can be addressed using a single machine instruction.
-         */
+void __init initialise_paca(struct paca_struct *new_paca, int cpu)
+{
+       /* The TOC register (GPR2) points 32kB into the TOC, so that 64kB
+        * of the TOC can be addressed using a single machine instruction.
+        */
         unsigned long kernel_toc = (unsigned long)(&__toc_start) + 0x8000UL;
 
-        /* Can't use for_each_*_cpu, as they aren't functional yet */
-        for (cpu = 0; cpu < NR_CPUS; cpu++) {
-                struct paca_struct *new_paca = &paca[cpu];
-
 #ifdef CONFIG_PPC_BOOK3S
-                new_paca->lppaca_ptr = &lppaca[cpu];
+        new_paca->lppaca_ptr = &lppaca[cpu];
 #else
-                new_paca->kernel_pgd = swapper_pg_dir;
+        new_paca->kernel_pgd = swapper_pg_dir;
 #endif
-                new_paca->lock_token = 0x8000;
-                new_paca->paca_index = cpu;
-                new_paca->kernel_toc = kernel_toc;
-                new_paca->kernelbase = (unsigned long) _stext;
-                new_paca->kernel_msr = MSR_KERNEL;
-                new_paca->hw_cpu_id = 0xffff;
-                new_paca->__current = &init_task;
+        new_paca->lock_token = 0x8000;
+        new_paca->paca_index = cpu;
+        new_paca->kernel_toc = kernel_toc;
+        new_paca->kernelbase = (unsigned long) _stext;
+        new_paca->kernel_msr = MSR_KERNEL;
+        new_paca->hw_cpu_id = 0xffff;
+        new_paca->__current = &init_task;
 #ifdef CONFIG_PPC_STD_MMU_64
-                new_paca->slb_shadow_ptr = &slb_shadow[cpu];
+        new_paca->slb_shadow_ptr = &slb_shadow[cpu];
 #endif /* CONFIG_PPC_STD_MMU_64 */
+}
+
+static int __initdata paca_size;
+
+void __init allocate_pacas(void)
+{
+        int nr_cpus, cpu, limit;
+
+        /*
+         * We can't take SLB misses on the paca, and we want to access them
+         * in real mode, so allocate them within the RMA and also within
+         * the first segment. On iSeries they must be within the area mapped
+         * by the HV, which is HvPagesToMap * HVPAGESIZE bytes.
+         */
+        limit = min(0x10000000ULL, lmb.rmo_size);
+        if (firmware_has_feature(FW_FEATURE_ISERIES))
+                limit = min(limit, HvPagesToMap * HVPAGESIZE);
+
+        nr_cpus = NR_CPUS;
+        /* On iSeries we know we can never have more than 64 cpus */
+        if (firmware_has_feature(FW_FEATURE_ISERIES))
+                nr_cpus = min(64, nr_cpus);
+
+        paca_size = PAGE_ALIGN(sizeof(struct paca_struct) * nr_cpus);
+
+        paca = __va(lmb_alloc_base(paca_size, PAGE_SIZE, limit));
+        memset(paca, 0, paca_size);
+
+        printk(KERN_DEBUG "Allocated %u bytes for %d pacas at %p\n",
+                paca_size, nr_cpus, paca);
+
+        /* Can't use for_each_*_cpu, as they aren't functional yet */
+        for (cpu = 0; cpu < nr_cpus; cpu++)
+                initialise_paca(&paca[cpu], cpu);
+}
+
+void __init free_unused_pacas(void)
+{
+        int new_size;
+
+        new_size = PAGE_ALIGN(sizeof(struct paca_struct) * num_possible_cpus());
+
+        if (new_size >= paca_size)
+                return;
+
+        lmb_free(__pa(paca) + new_size, paca_size - new_size);
+
+        printk(KERN_DEBUG "Freed %u bytes for unused pacas\n",
+                paca_size - new_size);
 
-        }
+        paca_size = new_size;
 }
diff --git a/arch/powerpc/kernel/pci-common.c b/arch/powerpc/kernel/pci-common.c
index 2597f9545d8a..f3c42ce516e7 100644
--- a/arch/powerpc/kernel/pci-common.c
+++ b/arch/powerpc/kernel/pci-common.c
@@ -63,21 +63,6 @@ struct dma_map_ops *get_pci_dma_ops(void)
 }
 EXPORT_SYMBOL(get_pci_dma_ops);
 
-int pci_set_dma_mask(struct pci_dev *dev, u64 mask)
-{
-        return dma_set_mask(&dev->dev, mask);
-}
-
-int pci_set_consistent_dma_mask(struct pci_dev *dev, u64 mask)
-{
-        int rc;
-
-        rc = dma_set_mask(&dev->dev, mask);
-        dev->dev.coherent_dma_mask = dev->dma_mask;
-
-        return rc;
-}
-
 struct pci_controller *pcibios_alloc_controller(struct device_node *dev)
 {
         struct pci_controller *phb;
diff --git a/arch/powerpc/kernel/perf_event_fsl_emb.c b/arch/powerpc/kernel/perf_event_fsl_emb.c
new file mode 100644
index 000000000000..369872f6cf78
--- /dev/null
+++ b/arch/powerpc/kernel/perf_event_fsl_emb.c
@@ -0,0 +1,654 @@
+/*
+ * Performance event support - Freescale Embedded Performance Monitor
+ *
+ * Copyright 2008-2009 Paul Mackerras, IBM Corporation.
+ * Copyright 2010 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include <linux/kernel.h>
+#include <linux/sched.h>
+#include <linux/perf_event.h>
+#include <linux/percpu.h>
+#include <linux/hardirq.h>
+#include <asm/reg_fsl_emb.h>
+#include <asm/pmc.h>
+#include <asm/machdep.h>
+#include <asm/firmware.h>
+#include <asm/ptrace.h>
+
+struct cpu_hw_events {
+        int n_events;
+        int disabled;
+        u8  pmcs_enabled;
+        struct perf_event *event[MAX_HWEVENTS];
+};
+static DEFINE_PER_CPU(struct cpu_hw_events, cpu_hw_events);
+
+static struct fsl_emb_pmu *ppmu;
+
+/* Number of perf_events counting hardware events */
+static atomic_t num_events;
+/* Used to avoid races in calling reserve/release_pmc_hardware */
+static DEFINE_MUTEX(pmc_reserve_mutex);
+
+/*
+ * If interrupts were soft-disabled when a PMU interrupt occurs, treat
+ * it as an NMI.
+ */
+static inline int perf_intr_is_nmi(struct pt_regs *regs)
+{
+#ifdef __powerpc64__
+        return !regs->softe;
+#else
+        return 0;
+#endif
+}
+
+static void perf_event_interrupt(struct pt_regs *regs);
+
+/*
+ * Read one performance monitor counter (PMC).
+ */
+static unsigned long read_pmc(int idx)
+{
+        unsigned long val;
+
+        switch (idx) {
+        case 0:
+                val = mfpmr(PMRN_PMC0);
+                break;
+        case 1:
+                val = mfpmr(PMRN_PMC1);
+                break;
+        case 2:
+                val = mfpmr(PMRN_PMC2);
+                break;
+        case 3:
+                val = mfpmr(PMRN_PMC3);
+                break;
+        default:
+                printk(KERN_ERR "oops trying to read PMC%d\n", idx);
+                val = 0;
+        }
+        return val;
+}
+
+/*
+ * Write one PMC.
+ */
+static void write_pmc(int idx, unsigned long val)
+{
+        switch (idx) {
+        case 0:
+                mtpmr(PMRN_PMC0, val);
+                break;
+        case 1:
+                mtpmr(PMRN_PMC1, val);
+                break;
+        case 2:
+                mtpmr(PMRN_PMC2, val);
+                break;
+        case 3:
+                mtpmr(PMRN_PMC3, val);
+                break;
+        default:
+                printk(KERN_ERR "oops trying to write PMC%d\n", idx);
+        }
+
+        isync();
+}
+
+/*
+ * Write one local control A register
+ */
+static void write_pmlca(int idx, unsigned long val)
+{
+        switch (idx) {
+        case 0:
+                mtpmr(PMRN_PMLCA0, val);
+                break;
+        case 1:
+                mtpmr(PMRN_PMLCA1, val);
+                break;
+        case 2:
+                mtpmr(PMRN_PMLCA2, val);
+                break;
+        case 3:
+                mtpmr(PMRN_PMLCA3, val);
+                break;
+        default:
+                printk(KERN_ERR "oops trying to write PMLCA%d\n", idx);
+        }
+
+        isync();
+}
+
+/*
+ * Write one local control B register
+ */
+static void write_pmlcb(int idx, unsigned long val)
+{
+        switch (idx) {
+        case 0:
+                mtpmr(PMRN_PMLCB0, val);
+                break;
+        case 1:
+                mtpmr(PMRN_PMLCB1, val);
+                break;
+        case 2:
+                mtpmr(PMRN_PMLCB2, val);
+                break;
+        case 3:
+                mtpmr(PMRN_PMLCB3, val);
+                break;
+        default:
+                printk(KERN_ERR "oops trying to write PMLCB%d\n", idx);
+        }
+
+        isync();
+}
+
+static void fsl_emb_pmu_read(struct perf_event *event)
+{
+        s64 val, delta, prev;
+
+        /*
+         * Performance monitor interrupts come even when interrupts
+         * are soft-disabled, as long as interrupts are hard-enabled.
+         * Therefore we treat them like NMIs.
+         */
+        do {
+                prev = atomic64_read(&event->hw.prev_count);
+                barrier();
+                val = read_pmc(event->hw.idx);
+        } while (atomic64_cmpxchg(&event->hw.prev_count, prev, val) != prev);
+
+        /* The counters are only 32 bits wide */
+        delta = (val - prev) & 0xfffffffful;
+        atomic64_add(delta, &event->count);
+        atomic64_sub(delta, &event->hw.period_left);
+}
+
+/*
+ * Disable all events to prevent PMU interrupts and to allow
+ * events to be added or removed.
+ */
+void hw_perf_disable(void)
+{
+        struct cpu_hw_events *cpuhw;
+        unsigned long flags;
+
+        local_irq_save(flags);
+        cpuhw = &__get_cpu_var(cpu_hw_events);
+
+        if (!cpuhw->disabled) {
+                cpuhw->disabled = 1;
+
+                /*
+                 * Check if we ever enabled the PMU on this cpu.
+                 */
+                if (!cpuhw->pmcs_enabled) {
+                        ppc_enable_pmcs();
+                        cpuhw->pmcs_enabled = 1;
+                }
+
+                if (atomic_read(&num_events)) {
+                        /*
+                         * Set the 'freeze all counters' bit, and disable
+                         * interrupts.  The barrier is to make sure the
+                         * mtpmr has been executed and the PMU has frozen
+                         * the events before we return.
+                         */
+
+                        mtpmr(PMRN_PMGC0, PMGC0_FAC);
+                        isync();
+                }
+        }
+        local_irq_restore(flags);
+}
+
+/*
+ * Re-enable all events if disable == 0.
+ * If we were previously disabled and events were added, then
+ * put the new config on the PMU.
+ */
+void hw_perf_enable(void)
+{
+        struct cpu_hw_events *cpuhw;
+        unsigned long flags;
+
+        local_irq_save(flags);
+        cpuhw = &__get_cpu_var(cpu_hw_events);
+        if (!cpuhw->disabled)
+                goto out;
+
+        cpuhw->disabled = 0;
+        ppc_set_pmu_inuse(cpuhw->n_events != 0);
+
+        if (cpuhw->n_events > 0) {
+                mtpmr(PMRN_PMGC0, PMGC0_PMIE | PMGC0_FCECE);
+                isync();
+        }
+
+ out:
+        local_irq_restore(flags);
+}
+
+static int collect_events(struct perf_event *group, int max_count,
+                          struct perf_event *ctrs[])
+{
+        int n = 0;
+        struct perf_event *event;
+
+        if (!is_software_event(group)) {
+                if (n >= max_count)
+                        return -1;
+                ctrs[n] = group;
+                n++;
+        }
+        list_for_each_entry(event, &group->sibling_list, group_entry) {
+                if (!is_software_event(event) &&
+                    event->state != PERF_EVENT_STATE_OFF) {
+                        if (n >= max_count)
+                                return -1;
+                        ctrs[n] = event;
+                        n++;
+                }
+        }
+        return n;
+}
+
+/* perf must be disabled, context locked on entry */
+static int fsl_emb_pmu_enable(struct perf_event *event)
+{
+        struct cpu_hw_events *cpuhw;
+        int ret = -EAGAIN;
+        int num_counters = ppmu->n_counter;
+        u64 val;
+        int i;
+
+        cpuhw = &get_cpu_var(cpu_hw_events);
+
+        if (event->hw.config & FSL_EMB_EVENT_RESTRICTED)
+                num_counters = ppmu->n_restricted;
+
+        /*
+         * Allocate counters from top-down, so that restricted-capable
+         * counters are kept free as long as possible.
+         */
+        for (i = num_counters - 1; i >= 0; i--) {
+                if (cpuhw->event[i])
+                        continue;
+
+                break;
+        }
+
+        if (i < 0)
+                goto out;
+
+        event->hw.idx = i;
+        cpuhw->event[i] = event;
+        ++cpuhw->n_events;
+
+        val = 0;
+        if (event->hw.sample_period) {
+                s64 left = atomic64_read(&event->hw.period_left);
+                if (left < 0x80000000L)
+                        val = 0x80000000L - left;
+        }
+        atomic64_set(&event->hw.prev_count, val);
+        write_pmc(i, val);
+        perf_event_update_userpage(event);
+
+        write_pmlcb(i, event->hw.config >> 32);
+        write_pmlca(i, event->hw.config_base);
+
+        ret = 0;
+ out:
+        put_cpu_var(cpu_hw_events);
+        return ret;
+}
+
+/* perf must be disabled, context locked on entry */
+static void fsl_emb_pmu_disable(struct perf_event *event)
+{
+        struct cpu_hw_events *cpuhw;
+        int i = event->hw.idx;
+
+        if (i < 0)
+                goto out;
+
+        fsl_emb_pmu_read(event);
+
+        cpuhw = &get_cpu_var(cpu_hw_events);
+
+        WARN_ON(event != cpuhw->event[event->hw.idx]);
+
+        write_pmlca(i, 0);
+        write_pmlcb(i, 0);
+        write_pmc(i, 0);
+
+        cpuhw->event[i] = NULL;
+        event->hw.idx = -1;
+
+        /*
+         * TODO: if at least one restricted event exists, and we
+         * just freed up a non-restricted-capable counter, and
+         * there is a restricted-capable counter occupied by
+         * a non-restricted event, migrate that event to the
+         * vacated counter.
+         */
+
+        cpuhw->n_events--;
+
+ out:
+        put_cpu_var(cpu_hw_events);
+}
+
+/*
+ * Re-enable interrupts on a event after they were throttled
+ * because they were coming too fast.
+ *
+ * Context is locked on entry, but perf is not disabled.
+ */
+static void fsl_emb_pmu_unthrottle(struct perf_event *event)
+{
+        s64 val, left;
+        unsigned long flags;
+
+        if (event->hw.idx < 0 || !event->hw.sample_period)
+                return;
+        local_irq_save(flags);
+        perf_disable();
+        fsl_emb_pmu_read(event);
+        left = event->hw.sample_period;
+        event->hw.last_period = left;
+        val = 0;
+        if (left < 0x80000000L)
+                val = 0x80000000L - left;
+        write_pmc(event->hw.idx, val);
+        atomic64_set(&event->hw.prev_count, val);
+        atomic64_set(&event->hw.period_left, left);
+        perf_event_update_userpage(event);
+        perf_enable();
+        local_irq_restore(flags);
+}
+
+static struct pmu fsl_emb_pmu = {
+        .enable         = fsl_emb_pmu_enable,
+        .disable        = fsl_emb_pmu_disable,
+        .read           = fsl_emb_pmu_read,
+        .unthrottle     = fsl_emb_pmu_unthrottle,
+};
+
+/*
+ * Release the PMU if this is the last perf_event.
+ */
+static void hw_perf_event_destroy(struct perf_event *event)
+{
+        if (!atomic_add_unless(&num_events, -1, 1)) {
+                mutex_lock(&pmc_reserve_mutex);
+                if (atomic_dec_return(&num_events) == 0)
+                        release_pmc_hardware();
+                mutex_unlock(&pmc_reserve_mutex);
+        }
+}
+
+/*
+ * Translate a generic cache event_id config to a raw event_id code.
+ */
+static int hw_perf_cache_event(u64 config, u64 *eventp)
+{
+        unsigned long type, op, result;
+        int ev;
+
+        if (!ppmu->cache_events)
+                return -EINVAL;
+
+        /* unpack config */
+        type = config & 0xff;
+        op = (config >> 8) & 0xff;
+        result = (config >> 16) & 0xff;
+
+        if (type >= PERF_COUNT_HW_CACHE_MAX ||
+            op >= PERF_COUNT_HW_CACHE_OP_MAX ||
+            result >= PERF_COUNT_HW_CACHE_RESULT_MAX)
+                return -EINVAL;
+
+        ev = (*ppmu->cache_events)[type][op][result];
+        if (ev == 0)
+                return -EOPNOTSUPP;
+        if (ev == -1)
+                return -EINVAL;
+        *eventp = ev;
+        return 0;
+}
+
+const struct pmu *hw_perf_event_init(struct perf_event *event)
+{
+        u64 ev;
+        struct perf_event *events[MAX_HWEVENTS];
+        int n;
+        int err;
+        int num_restricted;
+        int i;
+
+        switch (event->attr.type) {
+        case PERF_TYPE_HARDWARE:
+                ev = event->attr.config;
+                if (ev >= ppmu->n_generic || ppmu->generic_events[ev] == 0)
+                        return ERR_PTR(-EOPNOTSUPP);
+                ev = ppmu->generic_events[ev];
+                break;
+
+        case PERF_TYPE_HW_CACHE:
+                err = hw_perf_cache_event(event->attr.config, &ev);
+                if (err)
+                        return ERR_PTR(err);
+                break;
+
+        case PERF_TYPE_RAW:
+                ev = event->attr.config;
+                break;
+
+        default:
+                return ERR_PTR(-EINVAL);
+        }
+
+        event->hw.config = ppmu->xlate_event(ev);
+        if (!(event->hw.config & FSL_EMB_EVENT_VALID))
+                return ERR_PTR(-EINVAL);
+
+        /*
+         * If this is in a group, check if it can go on with all the
+         * other hardware events in the group.  We assume the event
+         * hasn't been linked into its leader's sibling list at this point.
+         */
+        n = 0;
+        if (event->group_leader != event) {
+                n = collect_events(event->group_leader,
+                                   ppmu->n_counter - 1, events);
+                if (n < 0)
+                        return ERR_PTR(-EINVAL);
+        }
+
+        if (event->hw.config & FSL_EMB_EVENT_RESTRICTED) {
+                num_restricted = 0;
+                for (i = 0; i < n; i++) {
+                        if (events[i]->hw.config & FSL_EMB_EVENT_RESTRICTED)
+                                num_restricted++;
+                }
+
+                if (num_restricted >= ppmu->n_restricted)
+                        return ERR_PTR(-EINVAL);
+        }
+
+        event->hw.idx = -1;
+
+        event->hw.config_base = PMLCA_CE | PMLCA_FCM1 |
+                                (u32)((ev << 16) & PMLCA_EVENT_MASK);
+
+        if (event->attr.exclude_user)
+                event->hw.config_base |= PMLCA_FCU;
+        if (event->attr.exclude_kernel)
+                event->hw.config_base |= PMLCA_FCS;
+        if (event->attr.exclude_idle)
+                return ERR_PTR(-ENOTSUPP);
+
+        event->hw.last_period = event->hw.sample_period;
+        atomic64_set(&event->hw.period_left, event->hw.last_period);
+
+        /*
+         * See if we need to reserve the PMU.
+         * If no events are currently in use, then we have to take a
+         * mutex to ensure that we don't race with another task doing
+         * reserve_pmc_hardware or release_pmc_hardware.
+         */
+        err = 0;
+        if (!atomic_inc_not_zero(&num_events)) {
+                mutex_lock(&pmc_reserve_mutex);
+                if (atomic_read(&num_events) == 0 &&
+                    reserve_pmc_hardware(perf_event_interrupt))
+                        err = -EBUSY;
+                else
+                        atomic_inc(&num_events);
+                mutex_unlock(&pmc_reserve_mutex);
+
+                mtpmr(PMRN_PMGC0, PMGC0_FAC);
+                isync();
+        }
+        event->destroy = hw_perf_event_destroy;
+
+        if (err)
+                return ERR_PTR(err);
+        return &fsl_emb_pmu;
+}
+
+/*
+ * A counter has overflowed; update its count and record
+ * things if requested.  Note that interrupts are hard-disabled
+ * here so there is no possibility of being interrupted.
+ */
+static void record_and_restart(struct perf_event *event, unsigned long val,
+                               struct pt_regs *regs, int nmi)
+{
+        u64 period = event->hw.sample_period;
+        s64 prev, delta, left;
+        int record = 0;
+
+        /* we don't have to worry about interrupts here */
+        prev = atomic64_read(&event->hw.prev_count);
+        delta = (val - prev) & 0xfffffffful;
+        atomic64_add(delta, &event->count);
+
+        /*
+         * See if the total period for this event has expired,
+         * and update for the next period.
+         */
+        val = 0;
+        left = atomic64_read(&event->hw.period_left) - delta;
+        if (period) {
+                if (left <= 0) {
+                        left += period;
+                        if (left <= 0)
+                                left = period;
+                        record = 1;
+                }
+                if (left < 0x80000000LL)
+                        val = 0x80000000LL - left;
+        }
+
+        /*
+         * Finally record data if requested.
+         */
+        if (record) {
+                struct perf_sample_data data = {
+                        .period = event->hw.last_period,
+                };
+
+                if (perf_event_overflow(event, nmi, &data, regs)) {
+                        /*
+                         * Interrupts are coming too fast - throttle them
+                         * by setting the event to 0, so it will be
+                         * at least 2^30 cycles until the next interrupt
+                         * (assuming each event counts at most 2 counts
+                         * per cycle).
+                         */
+                        val = 0;
+                        left = ~0ULL >> 1;
+                }
+        }
+
+        write_pmc(event->hw.idx, val);
+        atomic64_set(&event->hw.prev_count, val);
+        atomic64_set(&event->hw.period_left, left);
+        perf_event_update_userpage(event);
+}
+
+static void perf_event_interrupt(struct pt_regs *regs)
+{
+        int i;
+        struct cpu_hw_events *cpuhw = &__get_cpu_var(cpu_hw_events);
+        struct perf_event *event;
+        unsigned long val;
+        int found = 0;
+        int nmi;
+
+        nmi = perf_intr_is_nmi(regs);
+        if (nmi)
+                nmi_enter();
+        else
+                irq_enter();
+
+        for (i = 0; i < ppmu->n_counter; ++i) {
+                event = cpuhw->event[i];
+
+                val = read_pmc(i);
+                if ((int)val < 0) {
+                        if (event) {
+                                /* event has overflowed */
+                                found = 1;
+                                record_and_restart(event, val, regs, nmi);
+                        } else {
+                                /*
+                                 * Disabled counter is negative,
+                                 * reset it just in case.
+                                 */
+                                write_pmc(i, 0);
+                        }
+                }
+        }
+
+        /* PMM will keep counters frozen until we return from the interrupt. */
+        mtmsr(mfmsr() | MSR_PMM);
+        mtpmr(PMRN_PMGC0, PMGC0_PMIE | PMGC0_FCECE);
+        isync();
+
+        if (nmi)
+                nmi_exit();
+        else
+                irq_exit();
+}
+
+void hw_perf_event_setup(int cpu)
+{
+        struct cpu_hw_events *cpuhw = &per_cpu(cpu_hw_events, cpu);
+
+        memset(cpuhw, 0, sizeof(*cpuhw));
+}
+
+int register_fsl_emb_pmu(struct fsl_emb_pmu *pmu)
+{
+        if (ppmu)
+                return -EBUSY;          /* something's already registered */
+
+        ppmu = pmu;
+        pr_info("%s performance monitor hardware support registered\n",
+                pmu->name);
+
+        return 0;
+}
diff --git a/arch/powerpc/kernel/prom.c b/arch/powerpc/kernel/prom.c
index 43238b2054b6..05131d634e73 100644
--- a/arch/powerpc/kernel/prom.c
+++ b/arch/powerpc/kernel/prom.c
@@ -43,6 +43,7 @@
 #include <asm/smp.h>
 #include <asm/system.h>
 #include <asm/mmu.h>
+#include <asm/paca.h>
 #include <asm/pgtable.h>
 #include <asm/pci.h>
 #include <asm/iommu.h>
@@ -721,6 +722,8 @@ void __init early_init_devtree(void *params)
          * FIXME .. and the initrd too? */
         move_device_tree();
 
+        allocate_pacas();
+
         DBG("Scanning CPUs ...\n");
 
         /* Retreive CPU related informations from the flat tree
diff --git a/arch/powerpc/kernel/ptrace.c b/arch/powerpc/kernel/ptrace.c
index d9b05866615f..ed2cfe17d25e 100644
--- a/arch/powerpc/kernel/ptrace.c
+++ b/arch/powerpc/kernel/ptrace.c
@@ -940,7 +940,7 @@ static int del_instruction_bp(struct task_struct *child, int slot)
 {
         switch (slot) {
         case 1:
-                if (child->thread.iac1 == 0)
+                if ((child->thread.dbcr0 & DBCR0_IAC1) == 0)
                         return -ENOENT;
 
                 if (dbcr_iac_range(child) & DBCR_IAC12MODE) {
@@ -952,7 +952,7 @@ static int del_instruction_bp(struct task_struct *child, int slot)
                 child->thread.dbcr0 &= ~DBCR0_IAC1;
                 break;
         case 2:
-                if (child->thread.iac2 == 0)
+                if ((child->thread.dbcr0 & DBCR0_IAC2) == 0)
                         return -ENOENT;
 
                 if (dbcr_iac_range(child) & DBCR_IAC12MODE)
@@ -963,7 +963,7 @@ static int del_instruction_bp(struct task_struct *child, int slot)
                 break;
 #if CONFIG_PPC_ADV_DEBUG_IACS > 2
         case 3:
-                if (child->thread.iac3 == 0)
+                if ((child->thread.dbcr0 & DBCR0_IAC3) == 0)
                         return -ENOENT;
 
                 if (dbcr_iac_range(child) & DBCR_IAC34MODE) {
@@ -975,7 +975,7 @@ static int del_instruction_bp(struct task_struct *child, int slot)
                 child->thread.dbcr0 &= ~DBCR0_IAC3;
                 break;
         case 4:
-                if (child->thread.iac4 == 0)
+                if ((child->thread.dbcr0 & DBCR0_IAC4) == 0)
                         return -ENOENT;
 
                 if (dbcr_iac_range(child) & DBCR_IAC34MODE)
@@ -1054,7 +1054,7 @@ static int set_dac(struct task_struct *child, struct ppc_hw_breakpoint *bp_info)
 static int del_dac(struct task_struct *child, int slot)
 {
         if (slot == 1) {
-                if (child->thread.dac1 == 0)
+                if ((dbcr_dac(child) & (DBCR_DAC1R | DBCR_DAC1W)) == 0)
                         return -ENOENT;
 
                 child->thread.dac1 = 0;
@@ -1070,7 +1070,7 @@ static int del_dac(struct task_struct *child, int slot)
                 child->thread.dvc1 = 0;
 #endif
         } else if (slot == 2) {
-                if (child->thread.dac1 == 0)
+                if ((dbcr_dac(child) & (DBCR_DAC2R | DBCR_DAC2W)) == 0)
                         return -ENOENT;
 
 #ifdef CONFIG_PPC_ADV_DEBUG_DAC_RANGE
diff --git a/arch/powerpc/kernel/setup-common.c b/arch/powerpc/kernel/setup-common.c
index 03dd6a248198..48f0a008b20b 100644
--- a/arch/powerpc/kernel/setup-common.c
+++ b/arch/powerpc/kernel/setup-common.c
@@ -36,6 +36,7 @@
 #include <linux/lmb.h>
 #include <linux/of_platform.h>
 #include <asm/io.h>
+#include <asm/paca.h>
 #include <asm/prom.h>
 #include <asm/processor.h>
 #include <asm/vdso_datapage.h>
@@ -493,6 +494,8 @@ void __init smp_setup_cpu_maps(void)
          * here will have to be reworked
          */
         cpu_init_thread_core_maps(nthreads);
+
+        free_unused_pacas();
 }
 #endif /* CONFIG_SMP */
 
diff --git a/arch/powerpc/kernel/setup_64.c b/arch/powerpc/kernel/setup_64.c
index 6568406b2a30..63547394048c 100644
--- a/arch/powerpc/kernel/setup_64.c
+++ b/arch/powerpc/kernel/setup_64.c
@@ -144,9 +144,9 @@ early_param("smt-enabled", early_smt_enabled);
 #endif /* CONFIG_SMP */
 
 /* Put the paca pointer into r13 and SPRG_PACA */
-void __init setup_paca(int cpu)
+static void __init setup_paca(struct paca_struct *new_paca)
 {
-        local_paca = &paca[cpu];
+        local_paca = new_paca;
         mtspr(SPRN_SPRG_PACA, local_paca);
 #ifdef CONFIG_PPC_BOOK3E
         mtspr(SPRN_SPRG_TLB_EXFRAME, local_paca->extlb);
@@ -176,14 +176,12 @@ void __init early_setup(unsigned long dt_ptr)
 {
         /* -------- printk is _NOT_ safe to use here ! ------- */
 
-        /* Fill in any unititialised pacas */
-        initialise_pacas();
-
         /* Identify CPU type */
         identify_cpu(0, mfspr(SPRN_PVR));
 
         /* Assume we're on cpu 0 for now. Don't write to the paca yet! */
-        setup_paca(0);
+        initialise_paca(&boot_paca, 0);
+        setup_paca(&boot_paca);
 
         /* Initialize lockdep early or else spinlocks will blow */
         lockdep_init();
@@ -203,7 +201,7 @@ void __init early_setup(unsigned long dt_ptr)
         early_init_devtree(__va(dt_ptr));
 
         /* Now we know the logical id of our boot cpu, setup the paca. */
-        setup_paca(boot_cpuid);
+        setup_paca(&paca[boot_cpuid]);
 
         /* Fix up paca fields required for the boot cpu */
         get_paca()->cpu_start = 1;
diff --git a/arch/powerpc/kernel/syscalls.c b/arch/powerpc/kernel/syscalls.c
index 3370e62e43d4..f2496f2faecc 100644
--- a/arch/powerpc/kernel/syscalls.c
+++ b/arch/powerpc/kernel/syscalls.c
@@ -42,100 +42,6 @@
 #include <asm/time.h>
 #include <asm/unistd.h>
 
-/*
- * sys_ipc() is the de-multiplexer for the SysV IPC calls..
- *
- * This is really horribly ugly.
- */
-int sys_ipc(uint call, int first, unsigned long second, long third,
-            void __user *ptr, long fifth)
-{
-        int version, ret;
-
-        version = call >> 16; /* hack for backward compatibility */
-        call &= 0xffff;
-
-        ret = -ENOSYS;
-        switch (call) {
-        case SEMOP:
-                ret = sys_semtimedop(first, (struct sembuf __user *)ptr,
-                                      (unsigned)second, NULL);
-                break;
-        case SEMTIMEDOP:
-                ret = sys_semtimedop(first, (struct sembuf __user *)ptr,
-                                      (unsigned)second,
-                                      (const struct timespec __user *) fifth);
-                break;
-        case SEMGET:
-                ret = sys_semget (first, (int)second, third);
-                break;
-        case SEMCTL: {
-                union semun fourth;
-
-                ret = -EINVAL;
-                if (!ptr)
-                        break;
-                if ((ret = get_user(fourth.__pad, (void __user * __user *)ptr)))
-                        break;
-                ret = sys_semctl(first, (int)second, third, fourth);
-                break;
-        }
-        case MSGSND:
-                ret = sys_msgsnd(first, (struct msgbuf __user *)ptr,
-                                 (size_t)second, third);
-                break;
-        case MSGRCV:
-                switch (version) {
-                case 0: {
-                        struct ipc_kludge tmp;
-
-                        ret = -EINVAL;
-                        if (!ptr)
-                                break;
-                        if ((ret = copy_from_user(&tmp,
-                                                (struct ipc_kludge __user *) ptr,
-                                                sizeof (tmp)) ? -EFAULT : 0))
-                                break;
-                        ret = sys_msgrcv(first, tmp.msgp, (size_t) second,
-                                          tmp.msgtyp, third);
-                        break;
-                }
-                default:
-                        ret = sys_msgrcv (first, (struct msgbuf __user *) ptr,
-                                          (size_t)second, fifth, third);
-                        break;
-                }
-                break;
-        case MSGGET:
-                ret = sys_msgget((key_t)first, (int)second);
-                break;
-        case MSGCTL:
-                ret = sys_msgctl(first, (int)second,
-                                  (struct msqid_ds __user *)ptr);
-                break;
-        case SHMAT: {
-                ulong raddr;
-                ret = do_shmat(first, (char __user *)ptr, (int)second, &raddr);
-                if (ret)
-                        break;
-                ret = put_user(raddr, (ulong __user *) third);
-                break;
-        }
-        case SHMDT:
-                ret = sys_shmdt((char __user *)ptr);
-                break;
-        case SHMGET:
-                ret = sys_shmget(first, (size_t)second, third);
-                break;
-        case SHMCTL:
-                ret = sys_shmctl(first, (int)second,
-                                 (struct shmid_ds __user *)ptr);
-                break;
-        }
-
-        return ret;
-}
-
 static inline unsigned long do_mmap2(unsigned long addr, size_t len,
                         unsigned long prot, unsigned long flags,
                         unsigned long fd, unsigned long off, int shift)
@@ -210,76 +116,6 @@ long ppc64_personality(unsigned long personality)
 }
 #endif
 
-#ifdef CONFIG_PPC64
-#define OVERRIDE_MACHINE    (personality(current->personality) == PER_LINUX32)
-#else
-#define OVERRIDE_MACHINE    0
-#endif
-
-static inline int override_machine(char __user *mach)
-{
-        if (OVERRIDE_MACHINE) {
-                /* change ppc64 to ppc */
-                if (__put_user(0, mach+3) || __put_user(0, mach+4))
-                        return -EFAULT;
-        }
-        return 0;
-}
-
-long ppc_newuname(struct new_utsname __user * name)
-{
-        int err = 0;
-
-        down_read(&uts_sem);
-        if (copy_to_user(name, utsname(), sizeof(*name)))
-                err = -EFAULT;
-        up_read(&uts_sem);
-        if (!err)
-                err = override_machine(name->machine);
-        return err;
-}
-
-int sys_uname(struct old_utsname __user *name)
-{
-        int err = 0;
-        
-        down_read(&uts_sem);
-        if (copy_to_user(name, utsname(), sizeof(*name)))
-                err = -EFAULT;
-        up_read(&uts_sem);
-        if (!err)
-                err = override_machine(name->machine);
-        return err;
-}
-
-int sys_olduname(struct oldold_utsname __user *name)
-{
-        int error;
-
-        if (!access_ok(VERIFY_WRITE, name, sizeof(struct oldold_utsname)))
-                return -EFAULT;
-  
-        down_read(&uts_sem);
-        error = __copy_to_user(&name->sysname, &utsname()->sysname,
-                               __OLD_UTS_LEN);
-        error |= __put_user(0, name->sysname + __OLD_UTS_LEN);
-        error |= __copy_to_user(&name->nodename, &utsname()->nodename,
-                                __OLD_UTS_LEN);
-        error |= __put_user(0, name->nodename + __OLD_UTS_LEN);
-        error |= __copy_to_user(&name->release, &utsname()->release,
-                                __OLD_UTS_LEN);
-        error |= __put_user(0, name->release + __OLD_UTS_LEN);
-        error |= __copy_to_user(&name->version, &utsname()->version,
-                                __OLD_UTS_LEN);
-        error |= __put_user(0, name->version + __OLD_UTS_LEN);
-        error |= __copy_to_user(&name->machine, &utsname()->machine,
-                                __OLD_UTS_LEN);
-        error |= override_machine(name->machine);
-        up_read(&uts_sem);
-
-        return error? -EFAULT: 0;
-}
-
 long ppc_fadvise64_64(int fd, int advice, u32 offset_high, u32 offset_low,
                       u32 len_high, u32 len_low)
 {
diff --git a/arch/powerpc/mm/init_32.c b/arch/powerpc/mm/init_32.c
index 4ec900af332f..b1dbd9ee87cc 100644
--- a/arch/powerpc/mm/init_32.c
+++ b/arch/powerpc/mm/init_32.c
@@ -47,7 +47,7 @@
 #include "mmu_decl.h"
 
 #if defined(CONFIG_KERNEL_START_BOOL) || defined(CONFIG_LOWMEM_SIZE_BOOL)
-/* The ammount of lowmem must be within 0xF0000000 - KERNELBASE. */
+/* The amount of lowmem must be within 0xF0000000 - KERNELBASE. */
 #if (CONFIG_LOWMEM_SIZE > (0xF0000000 - PAGE_OFFSET))
 #error "You must adjust CONFIG_LOWMEM_SIZE or CONFIG_START_KERNEL"
 #endif
diff --git a/arch/powerpc/platforms/82xx/pq2ads-pci-pic.c b/arch/powerpc/platforms/82xx/pq2ads-pci-pic.c
index 9d962d7c72c1..d4a09f8705b5 100644
--- a/arch/powerpc/platforms/82xx/pq2ads-pci-pic.c
+++ b/arch/powerpc/platforms/82xx/pq2ads-pci-pic.c
@@ -24,7 +24,7 @@
 
 #include "pq2.h"
 
-static DEFINE_SPINLOCK(pci_pic_lock);
+static DEFINE_RAW_SPINLOCK(pci_pic_lock);
 
 struct pq2ads_pci_pic {
         struct device_node *node;
@@ -45,12 +45,12 @@ static void pq2ads_pci_mask_irq(unsigned int virq)
 
         if (irq != -1) {
                 unsigned long flags;
-                spin_lock_irqsave(&pci_pic_lock, flags);
+                raw_spin_lock_irqsave(&pci_pic_lock, flags);
 
                 setbits32(&priv->regs->mask, 1 << irq);
                 mb();
 
-                spin_unlock_irqrestore(&pci_pic_lock, flags);
+                raw_spin_unlock_irqrestore(&pci_pic_lock, flags);
         }
 }
 
@@ -62,9 +62,9 @@ static void pq2ads_pci_unmask_irq(unsigned int virq)
         if (irq != -1) {
                 unsigned long flags;
 
-                spin_lock_irqsave(&pci_pic_lock, flags);
+                raw_spin_lock_irqsave(&pci_pic_lock, flags);
                 clrbits32(&priv->regs->mask, 1 << irq);
-                spin_unlock_irqrestore(&pci_pic_lock, flags);
+                raw_spin_unlock_irqrestore(&pci_pic_lock, flags);
         }
 }
 
diff --git a/arch/powerpc/platforms/85xx/socrates_fpga_pic.c b/arch/powerpc/platforms/85xx/socrates_fpga_pic.c
index 42e87f08aa01..d48527ffc425 100644
--- a/arch/powerpc/platforms/85xx/socrates_fpga_pic.c
+++ b/arch/powerpc/platforms/85xx/socrates_fpga_pic.c
@@ -50,7 +50,7 @@ static struct socrates_fpga_irq_info fpga_irqs[SOCRATES_FPGA_NUM_IRQS] = {
 
 #define socrates_fpga_irq_to_hw(virq)    ((unsigned int)irq_map[virq].hwirq)
 
-static DEFINE_SPINLOCK(socrates_fpga_pic_lock);
+static DEFINE_RAW_SPINLOCK(socrates_fpga_pic_lock);
 
 static void __iomem *socrates_fpga_pic_iobase;
 static struct irq_host *socrates_fpga_pic_irq_host;
@@ -80,9 +80,9 @@ static inline unsigned int socrates_fpga_pic_get_irq(unsigned int irq)
         if (i == 3)
                 return NO_IRQ;
 
-        spin_lock_irqsave(&socrates_fpga_pic_lock, flags);
+        raw_spin_lock_irqsave(&socrates_fpga_pic_lock, flags);
         cause = socrates_fpga_pic_read(FPGA_PIC_IRQMASK(i));
-        spin_unlock_irqrestore(&socrates_fpga_pic_lock, flags);
+        raw_spin_unlock_irqrestore(&socrates_fpga_pic_lock, flags);
         for (i = SOCRATES_FPGA_NUM_IRQS - 1; i >= 0; i--) {
                 if (cause >> (i + 16))
                         break;
@@ -116,12 +116,12 @@ static void socrates_fpga_pic_ack(unsigned int virq)
         hwirq = socrates_fpga_irq_to_hw(virq);
 
         irq_line = fpga_irqs[hwirq].irq_line;
-        spin_lock_irqsave(&socrates_fpga_pic_lock, flags);
+        raw_spin_lock_irqsave(&socrates_fpga_pic_lock, flags);
         mask = socrates_fpga_pic_read(FPGA_PIC_IRQMASK(irq_line))
                 & SOCRATES_FPGA_IRQ_MASK;
         mask |= (1 << (hwirq + 16));
         socrates_fpga_pic_write(FPGA_PIC_IRQMASK(irq_line), mask);
-        spin_unlock_irqrestore(&socrates_fpga_pic_lock, flags);
+        raw_spin_unlock_irqrestore(&socrates_fpga_pic_lock, flags);
 }
 
 static void socrates_fpga_pic_mask(unsigned int virq)
@@ -134,12 +134,12 @@ static void socrates_fpga_pic_mask(unsigned int virq)
         hwirq = socrates_fpga_irq_to_hw(virq);
 
         irq_line = fpga_irqs[hwirq].irq_line;
-        spin_lock_irqsave(&socrates_fpga_pic_lock, flags);
+        raw_spin_lock_irqsave(&socrates_fpga_pic_lock, flags);
         mask = socrates_fpga_pic_read(FPGA_PIC_IRQMASK(irq_line))
                 & SOCRATES_FPGA_IRQ_MASK;
         mask &= ~(1 << hwirq);
         socrates_fpga_pic_write(FPGA_PIC_IRQMASK(irq_line), mask);
-        spin_unlock_irqrestore(&socrates_fpga_pic_lock, flags);
+        raw_spin_unlock_irqrestore(&socrates_fpga_pic_lock, flags);
 }
 
 static void socrates_fpga_pic_mask_ack(unsigned int virq)
@@ -152,13 +152,13 @@ static void socrates_fpga_pic_mask_ack(unsigned int virq)
         hwirq = socrates_fpga_irq_to_hw(virq);
 
         irq_line = fpga_irqs[hwirq].irq_line;
-        spin_lock_irqsave(&socrates_fpga_pic_lock, flags);
+        raw_spin_lock_irqsave(&socrates_fpga_pic_lock, flags);
         mask = socrates_fpga_pic_read(FPGA_PIC_IRQMASK(irq_line))
                 & SOCRATES_FPGA_IRQ_MASK;
         mask &= ~(1 << hwirq);
         mask |= (1 << (hwirq + 16));
         socrates_fpga_pic_write(FPGA_PIC_IRQMASK(irq_line), mask);
-        spin_unlock_irqrestore(&socrates_fpga_pic_lock, flags);
+        raw_spin_unlock_irqrestore(&socrates_fpga_pic_lock, flags);
 }
 
 static void socrates_fpga_pic_unmask(unsigned int virq)
@@ -171,12 +171,12 @@ static void socrates_fpga_pic_unmask(unsigned int virq)
         hwirq = socrates_fpga_irq_to_hw(virq);
 
         irq_line = fpga_irqs[hwirq].irq_line;
-        spin_lock_irqsave(&socrates_fpga_pic_lock, flags);
+        raw_spin_lock_irqsave(&socrates_fpga_pic_lock, flags);
         mask = socrates_fpga_pic_read(FPGA_PIC_IRQMASK(irq_line))
                 & SOCRATES_FPGA_IRQ_MASK;
         mask |= (1 << hwirq);
         socrates_fpga_pic_write(FPGA_PIC_IRQMASK(irq_line), mask);
-        spin_unlock_irqrestore(&socrates_fpga_pic_lock, flags);
+        raw_spin_unlock_irqrestore(&socrates_fpga_pic_lock, flags);
 }
 
 static void socrates_fpga_pic_eoi(unsigned int virq)
@@ -189,12 +189,12 @@ static void socrates_fpga_pic_eoi(unsigned int virq)
         hwirq = socrates_fpga_irq_to_hw(virq);
 
         irq_line = fpga_irqs[hwirq].irq_line;
-        spin_lock_irqsave(&socrates_fpga_pic_lock, flags);
+        raw_spin_lock_irqsave(&socrates_fpga_pic_lock, flags);
         mask = socrates_fpga_pic_read(FPGA_PIC_IRQMASK(irq_line))
                 & SOCRATES_FPGA_IRQ_MASK;
         mask |= (1 << (hwirq + 16));
         socrates_fpga_pic_write(FPGA_PIC_IRQMASK(irq_line), mask);
-        spin_unlock_irqrestore(&socrates_fpga_pic_lock, flags);
+        raw_spin_unlock_irqrestore(&socrates_fpga_pic_lock, flags);
 }
 
 static int socrates_fpga_pic_set_type(unsigned int virq,
@@ -220,14 +220,14 @@ static int socrates_fpga_pic_set_type(unsigned int virq,
         default:
                 return -EINVAL;
         }
-        spin_lock_irqsave(&socrates_fpga_pic_lock, flags);
+        raw_spin_lock_irqsave(&socrates_fpga_pic_lock, flags);
         mask = socrates_fpga_pic_read(FPGA_PIC_IRQCFG);
         if (polarity)
                 mask |= (1 << hwirq);
         else
                 mask &= ~(1 << hwirq);
         socrates_fpga_pic_write(FPGA_PIC_IRQCFG, mask);
-        spin_unlock_irqrestore(&socrates_fpga_pic_lock, flags);
+        raw_spin_unlock_irqrestore(&socrates_fpga_pic_lock, flags);
         return 0;
 }
 
@@ -314,14 +314,14 @@ void socrates_fpga_pic_init(struct device_node *pic)
 
         socrates_fpga_pic_iobase = of_iomap(pic, 0);
 
-        spin_lock_irqsave(&socrates_fpga_pic_lock, flags);
+        raw_spin_lock_irqsave(&socrates_fpga_pic_lock, flags);
         socrates_fpga_pic_write(FPGA_PIC_IRQMASK(0),
                         SOCRATES_FPGA_IRQ_MASK << 16);
         socrates_fpga_pic_write(FPGA_PIC_IRQMASK(1),
                         SOCRATES_FPGA_IRQ_MASK << 16);
         socrates_fpga_pic_write(FPGA_PIC_IRQMASK(2),
                         SOCRATES_FPGA_IRQ_MASK << 16);
-        spin_unlock_irqrestore(&socrates_fpga_pic_lock, flags);
+        raw_spin_unlock_irqrestore(&socrates_fpga_pic_lock, flags);
 
         pr_info("FPGA PIC: Setting up Socrates FPGA PIC\n");
 }
diff --git a/arch/powerpc/platforms/86xx/Kconfig b/arch/powerpc/platforms/86xx/Kconfig
index 2bbfd530d6d8..fbe9f3621424 100644
--- a/arch/powerpc/platforms/86xx/Kconfig
+++ b/arch/powerpc/platforms/86xx/Kconfig
@@ -33,32 +33,32 @@ config MPC8610_HPCD
           This option enables support for the MPC8610 HPCD board.
 
 config GEF_PPC9A
-        bool "GE Fanuc PPC9A"
+        bool "GE PPC9A"
         select DEFAULT_UIMAGE
         select MMIO_NVRAM
         select GENERIC_GPIO
         select ARCH_REQUIRE_GPIOLIB
         help
-          This option enables support for GE Fanuc's PPC9A.
+          This option enables support for the GE PPC9A.
 
 config GEF_SBC310
-        bool "GE Fanuc SBC310"
+        bool "GE SBC310"
         select DEFAULT_UIMAGE
         select MMIO_NVRAM
         select GENERIC_GPIO
         select ARCH_REQUIRE_GPIOLIB
         help
-          This option enables support for GE Fanuc's SBC310.
+          This option enables support for the GE SBC310.
 
 config GEF_SBC610
-        bool "GE Fanuc SBC610"
+        bool "GE SBC610"
         select DEFAULT_UIMAGE
         select MMIO_NVRAM
         select GENERIC_GPIO
         select ARCH_REQUIRE_GPIOLIB
         select HAS_RAPIDIO
         help
-          This option enables support for GE Fanuc's SBC610.
+          This option enables support for the GE SBC610.
 
 endif
 
diff --git a/arch/powerpc/platforms/86xx/gef_gpio.c b/arch/powerpc/platforms/86xx/gef_gpio.c
index b2ea8875adba..11f7b2b6f49e 100644
--- a/arch/powerpc/platforms/86xx/gef_gpio.c
+++ b/arch/powerpc/platforms/86xx/gef_gpio.c
@@ -1,9 +1,9 @@
 /*
- * Driver for GE Fanuc's FPGA based GPIO pins
+ * Driver for GE FPGA based GPIO
  *
- * Author: Martyn Welch <martyn.welch@gefanuc.com>
+ * Author: Martyn Welch <martyn.welch@ge.com>
  *
- * 2008 (c) GE Fanuc Intelligent Platforms Embedded Systems, Inc.
+ * 2008 (c) GE Intelligent Platforms Embedded Systems, Inc.
  *
  * This file is licensed under the terms of the GNU General Public License
  * version 2.  This program is licensed "as is" without any warranty of any
@@ -164,6 +164,6 @@ static int __init gef_gpio_init(void)
 };
 arch_initcall(gef_gpio_init);
 
-MODULE_DESCRIPTION("GE Fanuc I/O FPGA GPIO driver");
-MODULE_AUTHOR("Martyn Welch <martyn.welch@gefanuc.com");
+MODULE_DESCRIPTION("GE I/O FPGA GPIO driver");
+MODULE_AUTHOR("Martyn Welch <martyn.welch@ge.com");
 MODULE_LICENSE("GPL");
diff --git a/arch/powerpc/platforms/86xx/gef_pic.c b/arch/powerpc/platforms/86xx/gef_pic.c
index 0110a8736d33..6df9e2561c06 100644
--- a/arch/powerpc/platforms/86xx/gef_pic.c
+++ b/arch/powerpc/platforms/86xx/gef_pic.c
@@ -1,9 +1,9 @@
 /*
- * Interrupt handling for GE Fanuc's FPGA based PIC
+ * Interrupt handling for GE FPGA based PIC
  *
- * Author: Martyn Welch <martyn.welch@gefanuc.com>
+ * Author: Martyn Welch <martyn.welch@ge.com>
  *
- * 2008 (c) GE Fanuc Intelligent Platforms Embedded Systems, Inc.
+ * 2008 (c) GE Intelligent Platforms Embedded Systems, Inc.
  *
  * This file is licensed under the terms of the GNU General Public License
  * version 2.  This program is licensed "as is" without any warranty of any
@@ -49,7 +49,7 @@
 #define gef_irq_to_hw(virq)    ((unsigned int)irq_map[virq].hwirq)
 
 
-static DEFINE_SPINLOCK(gef_pic_lock);
+static DEFINE_RAW_SPINLOCK(gef_pic_lock);
 
 static void __iomem *gef_pic_irq_reg_base;
 static struct irq_host *gef_pic_irq_host;
@@ -118,11 +118,11 @@ static void gef_pic_mask(unsigned int virq)
 
         hwirq = gef_irq_to_hw(virq);
 
-        spin_lock_irqsave(&gef_pic_lock, flags);
+        raw_spin_lock_irqsave(&gef_pic_lock, flags);
         mask = in_be32(gef_pic_irq_reg_base + GEF_PIC_INTR_MASK(0));
         mask &= ~(1 << hwirq);
         out_be32(gef_pic_irq_reg_base + GEF_PIC_INTR_MASK(0), mask);
-        spin_unlock_irqrestore(&gef_pic_lock, flags);
+        raw_spin_unlock_irqrestore(&gef_pic_lock, flags);
 }
 
 static void gef_pic_mask_ack(unsigned int virq)
@@ -141,11 +141,11 @@ static void gef_pic_unmask(unsigned int virq)
 
         hwirq = gef_irq_to_hw(virq);
 
-        spin_lock_irqsave(&gef_pic_lock, flags);
+        raw_spin_lock_irqsave(&gef_pic_lock, flags);
         mask = in_be32(gef_pic_irq_reg_base + GEF_PIC_INTR_MASK(0));
         mask |= (1 << hwirq);
         out_be32(gef_pic_irq_reg_base + GEF_PIC_INTR_MASK(0), mask);
-        spin_unlock_irqrestore(&gef_pic_lock, flags);
+        raw_spin_unlock_irqrestore(&gef_pic_lock, flags);
 }
 
 static struct irq_chip gef_pic_chip = {
@@ -199,7 +199,7 @@ void __init gef_pic_init(struct device_node *np)
         /* Map the devices registers into memory */
         gef_pic_irq_reg_base = of_iomap(np, 0);
 
-        spin_lock_irqsave(&gef_pic_lock, flags);
+        raw_spin_lock_irqsave(&gef_pic_lock, flags);
 
         /* Initialise everything as masked. */
         out_be32(gef_pic_irq_reg_base + GEF_PIC_CPU0_INTR_MASK, 0);
@@ -208,7 +208,7 @@ void __init gef_pic_init(struct device_node *np)
         out_be32(gef_pic_irq_reg_base + GEF_PIC_CPU0_MCP_MASK, 0);
         out_be32(gef_pic_irq_reg_base + GEF_PIC_CPU1_MCP_MASK, 0);
 
-        spin_unlock_irqrestore(&gef_pic_lock, flags);
+        raw_spin_unlock_irqrestore(&gef_pic_lock, flags);
 
         /* Map controller */
         gef_pic_cascade_irq = irq_of_parse_and_map(np, 0);
diff --git a/arch/powerpc/platforms/86xx/gef_ppc9a.c b/arch/powerpc/platforms/86xx/gef_ppc9a.c
index a792e5d85813..60ce07e39100 100644
--- a/arch/powerpc/platforms/86xx/gef_ppc9a.c
+++ b/arch/powerpc/platforms/86xx/gef_ppc9a.c
@@ -1,9 +1,9 @@
 /*
- * GE Fanuc PPC9A board support
+ * GE PPC9A board support
  *
- * Author: Martyn Welch <martyn.welch@gefanuc.com>
+ * Author: Martyn Welch <martyn.welch@ge.com>
  *
- * Copyright 2008 GE Fanuc Intelligent Platforms Embedded Systems, Inc.
+ * Copyright 2008 GE Intelligent Platforms Embedded Systems, Inc.
  *
  * This program is free software; you can redistribute  it and/or modify it
  * under  the terms of  the GNU General  Public License as published by the
@@ -82,7 +82,7 @@ static void __init gef_ppc9a_setup_arch(void)
         }
 #endif
 
-        printk(KERN_INFO "GE Fanuc Intelligent Platforms PPC9A 6U VME SBC\n");
+        printk(KERN_INFO "GE Intelligent Platforms PPC9A 6U VME SBC\n");
 
 #ifdef CONFIG_SMP
         mpc86xx_smp_init();
@@ -151,7 +151,7 @@ static void gef_ppc9a_show_cpuinfo(struct seq_file *m)
 {
         uint svid = mfspr(SPRN_SVR);
 
-        seq_printf(m, "Vendor\t\t: GE Fanuc Intelligent Platforms\n");
+        seq_printf(m, "Vendor\t\t: GE Intelligent Platforms\n");
 
         seq_printf(m, "Revision\t: %u%c\n", gef_ppc9a_get_pcb_rev(),
                 ('A' + gef_ppc9a_get_board_rev()));
@@ -235,7 +235,7 @@ static int __init declare_of_platform_devices(void)
 machine_device_initcall(gef_ppc9a, declare_of_platform_devices);
 
 define_machine(gef_ppc9a) {
-        .name                   = "GE Fanuc PPC9A",
+        .name                   = "GE PPC9A",
         .probe                  = gef_ppc9a_probe,
         .setup_arch             = gef_ppc9a_setup_arch,
         .init_IRQ               = gef_ppc9a_init_irq,
diff --git a/arch/powerpc/platforms/86xx/gef_sbc310.c b/arch/powerpc/platforms/86xx/gef_sbc310.c
index 6a1a613836c2..3ecee25bf3ed 100644
--- a/arch/powerpc/platforms/86xx/gef_sbc310.c
+++ b/arch/powerpc/platforms/86xx/gef_sbc310.c
@@ -1,9 +1,9 @@
 /*
- * GE Fanuc SBC310 board support
+ * GE SBC310 board support
  *
- * Author: Martyn Welch <martyn.welch@gefanuc.com>
+ * Author: Martyn Welch <martyn.welch@ge.com>
  *
- * Copyright 2008 GE Fanuc Intelligent Platforms Embedded Systems, Inc.
+ * Copyright 2008 GE Intelligent Platforms Embedded Systems, Inc.
  *
  * This program is free software; you can redistribute  it and/or modify it
  * under  the terms of  the GNU General  Public License as published by the
@@ -82,7 +82,7 @@ static void __init gef_sbc310_setup_arch(void)
         }
 #endif
 
-        printk(KERN_INFO "GE Fanuc Intelligent Platforms SBC310 6U VPX SBC\n");
+        printk(KERN_INFO "GE Intelligent Platforms SBC310 6U VPX SBC\n");
 
 #ifdef CONFIG_SMP
         mpc86xx_smp_init();
@@ -142,7 +142,7 @@ static void gef_sbc310_show_cpuinfo(struct seq_file *m)
 {
         uint svid = mfspr(SPRN_SVR);
 
-        seq_printf(m, "Vendor\t\t: GE Fanuc Intelligent Platforms\n");
+        seq_printf(m, "Vendor\t\t: GE Intelligent Platforms\n");
 
         seq_printf(m, "Board ID\t: 0x%2.2x\n", gef_sbc310_get_board_id());
         seq_printf(m, "Revision\t: %u%c\n", gef_sbc310_get_pcb_rev(),
@@ -223,7 +223,7 @@ static int __init declare_of_platform_devices(void)
 machine_device_initcall(gef_sbc310, declare_of_platform_devices);
 
 define_machine(gef_sbc310) {
-        .name                   = "GE Fanuc SBC310",
+        .name                   = "GE SBC310",
         .probe                  = gef_sbc310_probe,
         .setup_arch             = gef_sbc310_setup_arch,
         .init_IRQ               = gef_sbc310_init_irq,
diff --git a/arch/powerpc/platforms/86xx/gef_sbc610.c b/arch/powerpc/platforms/86xx/gef_sbc610.c
index e10688a0fc4e..5090d608d9ee 100644
--- a/arch/powerpc/platforms/86xx/gef_sbc610.c
+++ b/arch/powerpc/platforms/86xx/gef_sbc610.c
@@ -1,9 +1,9 @@
 /*
- * GE Fanuc SBC610 board support
+ * GE SBC610 board support
  *
- * Author: Martyn Welch <martyn.welch@gefanuc.com>
+ * Author: Martyn Welch <martyn.welch@ge.com>
  *
- * Copyright 2008 GE Fanuc Intelligent Platforms Embedded Systems, Inc.
+ * Copyright 2008 GE Intelligent Platforms Embedded Systems, Inc.
  *
  * This program is free software; you can redistribute  it and/or modify it
  * under  the terms of  the GNU General  Public License as published by the
@@ -82,7 +82,7 @@ static void __init gef_sbc610_setup_arch(void)
         }
 #endif
 
-        printk(KERN_INFO "GE Fanuc Intelligent Platforms SBC610 6U VPX SBC\n");
+        printk(KERN_INFO "GE Intelligent Platforms SBC610 6U VPX SBC\n");
 
 #ifdef CONFIG_SMP
         mpc86xx_smp_init();
@@ -133,7 +133,7 @@ static void gef_sbc610_show_cpuinfo(struct seq_file *m)
 {
         uint svid = mfspr(SPRN_SVR);
 
-        seq_printf(m, "Vendor\t\t: GE Fanuc Intelligent Platforms\n");
+        seq_printf(m, "Vendor\t\t: GE Intelligent Platforms\n");
 
         seq_printf(m, "Revision\t: %u%c\n", gef_sbc610_get_pcb_rev(),
                 ('A' + gef_sbc610_get_board_rev() - 1));
@@ -212,7 +212,7 @@ static int __init declare_of_platform_devices(void)
 machine_device_initcall(gef_sbc610, declare_of_platform_devices);
 
 define_machine(gef_sbc610) {
-        .name                   = "GE Fanuc SBC610",
+        .name                   = "GE SBC610",
         .probe                  = gef_sbc610_probe,
         .setup_arch             = gef_sbc610_setup_arch,
         .init_IRQ               = gef_sbc610_init_irq,
diff --git a/arch/powerpc/platforms/Kconfig.cputype b/arch/powerpc/platforms/Kconfig.cputype
index fa0f690d3867..a8aae0b54579 100644
--- a/arch/powerpc/platforms/Kconfig.cputype
+++ b/arch/powerpc/platforms/Kconfig.cputype
@@ -144,6 +144,16 @@ config FSL_EMB_PERFMON
           and some e300 cores (c3 and c4).  Select this only if your
           core supports the Embedded Performance Monitor APU
 
+config FSL_EMB_PERF_EVENT
+        bool
+        depends on FSL_EMB_PERFMON && PERF_EVENTS && !PPC_PERF_CTRS
+        default y
+
+config FSL_EMB_PERF_EVENT_E500
+        bool
+        depends on FSL_EMB_PERF_EVENT && E500
+        default y
+
 config 4xx
         bool
         depends on 40x || 44x
diff --git a/arch/powerpc/platforms/iseries/exception.S b/arch/powerpc/platforms/iseries/exception.S
index 5369653dcf6a..fba5bf915073 100644
--- a/arch/powerpc/platforms/iseries/exception.S
+++ b/arch/powerpc/platforms/iseries/exception.S
@@ -43,17 +43,14 @@ system_reset_iSeries:
         LOAD_REG_ADDR(r23, alpaca)
         li      r0,ALPACA_SIZE
         sub     r23,r13,r23
-        divdu   r23,r23,r0              /* r23 has cpu number */
-        LOAD_REG_ADDR(r13, paca)
-        mulli   r0,r23,PACA_SIZE
-        add     r13,r13,r0
-        mtspr   SPRN_SPRG_PACA,r13      /* Save it away for the future */
-        mfmsr   r24
-        ori     r24,r24,MSR_RI
-        mtmsrd  r24                     /* RI on */
-        mr      r24,r23
+        divdu   r24,r23,r0              /* r24 has cpu number */
         cmpwi   0,r24,0                 /* Are we processor 0? */
         bne     1f
+        LOAD_REG_ADDR(r13, boot_paca)
+        mtspr   SPRN_SPRG_PACA,r13      /* Save it away for the future */
+        mfmsr   r23
+        ori     r23,r23,MSR_RI
+        mtmsrd  r23                     /* RI on */
         b       .__start_initialization_iSeries /* Start up the first processor */
 1:      mfspr   r4,SPRN_CTRLF
         li      r5,CTRL_RUNLATCH        /* Turn off the run light */
@@ -86,6 +83,16 @@ system_reset_iSeries:
 #endif
 
 2:
+        /* Load our paca now that it's been allocated */
+        LOAD_REG_ADDR(r13, paca)
+        ld      r13,0(r13)
+        mulli   r0,r24,PACA_SIZE
+        add     r13,r13,r0
+        mtspr   SPRN_SPRG_PACA,r13      /* Save it away for the future */
+        mfmsr   r23
+        ori     r23,r23,MSR_RI
+        mtmsrd  r23                     /* RI on */
+
         HMT_LOW
 #ifdef CONFIG_SMP
         lbz     r23,PACAPROCSTART(r13)  /* Test if this processor
diff --git a/arch/powerpc/platforms/pseries/hotplug-cpu.c b/arch/powerpc/platforms/pseries/hotplug-cpu.c
index d1b124e44d77..a8e1d5d17a28 100644
--- a/arch/powerpc/platforms/pseries/hotplug-cpu.c
+++ b/arch/powerpc/platforms/pseries/hotplug-cpu.c
@@ -122,44 +122,32 @@ static void pseries_mach_cpu_die(void)
                 if (!get_lppaca()->shared_proc)
                         get_lppaca()->donate_dedicated_cpu = 1;
 
-                printk(KERN_INFO
-                        "cpu %u (hwid %u) ceding for offline with hint %d\n",
-                        cpu, hwcpu, cede_latency_hint);
                 while (get_preferred_offline_state(cpu) == CPU_STATE_INACTIVE) {
                         extended_cede_processor(cede_latency_hint);
-                        printk(KERN_INFO "cpu %u (hwid %u) returned from cede.\n",
-                                cpu, hwcpu);
-                        printk(KERN_INFO
-                        "Decrementer value = %x Timebase value = %llx\n",
-                        get_dec(), get_tb());
                 }
 
-                printk(KERN_INFO "cpu %u (hwid %u) got prodded to go online\n",
-                        cpu, hwcpu);
-
                 if (!get_lppaca()->shared_proc)
                         get_lppaca()->donate_dedicated_cpu = 0;
                 get_lppaca()->idle = 0;
-        }
 
-        if (get_preferred_offline_state(cpu) == CPU_STATE_ONLINE) {
-                unregister_slb_shadow(hwcpu, __pa(get_slb_shadow()));
+                if (get_preferred_offline_state(cpu) == CPU_STATE_ONLINE) {
+                        unregister_slb_shadow(hwcpu, __pa(get_slb_shadow()));
 
-                /*
-                 * NOTE: Calling start_secondary() here for now to
-                 * start new context.
-                 * However, need to do it cleanly by resetting the
-                 * stack pointer.
-                 */
-                start_secondary();
+                        /*
+                         * Call to start_secondary_resume() will not return.
+                         * Kernel stack will be reset and start_secondary()
+                         * will be called to continue the online operation.
+                         */
+                        start_secondary_resume();
+                }
+        }
 
-        } else if (get_preferred_offline_state(cpu) == CPU_STATE_OFFLINE) {
+        /* Requested state is CPU_STATE_OFFLINE at this point */
+        WARN_ON(get_preferred_offline_state(cpu) != CPU_STATE_OFFLINE);
 
-                set_cpu_current_state(cpu, CPU_STATE_OFFLINE);
-                unregister_slb_shadow(hard_smp_processor_id(),
-                                        __pa(get_slb_shadow()));
-                rtas_stop_self();
-        }
+        set_cpu_current_state(cpu, CPU_STATE_OFFLINE);
+        unregister_slb_shadow(hwcpu, __pa(get_slb_shadow()));
+        rtas_stop_self();
 
         /* Should never get here... */
         BUG();
diff --git a/arch/powerpc/platforms/pseries/offline_states.h b/arch/powerpc/platforms/pseries/offline_states.h
index 22574e0d9d91..75a6f480d931 100644
--- a/arch/powerpc/platforms/pseries/offline_states.h
+++ b/arch/powerpc/platforms/pseries/offline_states.h
@@ -9,10 +9,31 @@ enum cpu_state_vals {
         CPU_MAX_OFFLINE_STATES
 };
 
+#ifdef CONFIG_HOTPLUG_CPU
 extern enum cpu_state_vals get_cpu_current_state(int cpu);
 extern void set_cpu_current_state(int cpu, enum cpu_state_vals state);
-extern enum cpu_state_vals get_preferred_offline_state(int cpu);
 extern void set_preferred_offline_state(int cpu, enum cpu_state_vals state);
 extern void set_default_offline_state(int cpu);
+#else
+static inline enum cpu_state_vals get_cpu_current_state(int cpu)
+{
+        return CPU_STATE_ONLINE;
+}
+
+static inline void set_cpu_current_state(int cpu, enum cpu_state_vals state)
+{
+}
+
+static inline void set_preferred_offline_state(int cpu, enum cpu_state_vals state)
+{
+}
+
+static inline void set_default_offline_state(int cpu)
+{
+}
+#endif
+
+extern enum cpu_state_vals get_preferred_offline_state(int cpu);
 extern int start_secondary(void);
+extern void start_secondary_resume(void);
 #endif
diff --git a/arch/powerpc/platforms/pseries/plpar_wrappers.h b/arch/powerpc/platforms/pseries/plpar_wrappers.h
index 0603c91538ae..a05f8d427856 100644
--- a/arch/powerpc/platforms/pseries/plpar_wrappers.h
+++ b/arch/powerpc/platforms/pseries/plpar_wrappers.h
@@ -259,12 +259,12 @@ static inline long plpar_ipi(unsigned long servernum, unsigned long mfrr)
         return plpar_hcall_norets(H_IPI, servernum, mfrr);
 }
 
-static inline long plpar_xirr(unsigned long *xirr_ret)
+static inline long plpar_xirr(unsigned long *xirr_ret, unsigned char cppr)
 {
         long rc;
         unsigned long retbuf[PLPAR_HCALL_BUFSIZE];
 
-        rc = plpar_hcall(H_XIRR, retbuf);
+        rc = plpar_hcall(H_XIRR, retbuf, cppr);
 
         *xirr_ret = retbuf[0];
 
diff --git a/arch/powerpc/platforms/pseries/xics.c b/arch/powerpc/platforms/pseries/xics.c
index 4ca641042ec3..1bcedd8b4616 100644
--- a/arch/powerpc/platforms/pseries/xics.c
+++ b/arch/powerpc/platforms/pseries/xics.c
@@ -120,12 +120,12 @@ static inline void direct_qirr_info(int n_cpu, u8 value)
 
 /* LPAR low level accessors */
 
-static inline unsigned int lpar_xirr_info_get(void)
+static inline unsigned int lpar_xirr_info_get(unsigned char cppr)
 {
         unsigned long lpar_rc;
         unsigned long return_value;
 
-        lpar_rc = plpar_xirr(&return_value);
+        lpar_rc = plpar_xirr(&return_value, cppr);
         if (lpar_rc != H_SUCCESS)
                 panic(" bad return code xirr - rc = %lx\n", lpar_rc);
         return (unsigned int)return_value;
@@ -331,7 +331,8 @@ static unsigned int xics_get_irq_direct(void)
 
 static unsigned int xics_get_irq_lpar(void)
 {
-        unsigned int xirr = lpar_xirr_info_get();
+        struct xics_cppr *os_cppr = &__get_cpu_var(xics_cppr);
+        unsigned int xirr = lpar_xirr_info_get(os_cppr->stack[os_cppr->index]);
         unsigned int vec = xics_xirr_vector(xirr);
         unsigned int irq;
 
diff --git a/arch/powerpc/sysdev/cpm2_pic.h b/arch/powerpc/sysdev/cpm2_pic.h
index 30e5828a2781..2c5f70c24485 100644
--- a/arch/powerpc/sysdev/cpm2_pic.h
+++ b/arch/powerpc/sysdev/cpm2_pic.h
@@ -3,6 +3,6 @@
 
 extern unsigned int cpm2_get_irq(void);
 
-extern void cpm2_pic_init(struct device_node*);
+extern void cpm2_pic_init(struct device_node *);
 
 #endif /* _PPC_KERNEL_CPM2_H */
diff --git a/arch/powerpc/sysdev/qe_lib/qe_ic.c b/arch/powerpc/sysdev/qe_lib/qe_ic.c
index d927da893ec4..541ba9863647 100644
--- a/arch/powerpc/sysdev/qe_lib/qe_ic.c
+++ b/arch/powerpc/sysdev/qe_lib/qe_ic.c
@@ -33,7 +33,7 @@
 
 #include "qe_ic.h"
 
-static DEFINE_SPINLOCK(qe_ic_lock);
+static DEFINE_RAW_SPINLOCK(qe_ic_lock);
 
 static struct qe_ic_info qe_ic_info[] = {
         [1] = {
@@ -201,13 +201,13 @@ static void qe_ic_unmask_irq(unsigned int virq)
         unsigned long flags;
         u32 temp;
 
-        spin_lock_irqsave(&qe_ic_lock, flags);
+        raw_spin_lock_irqsave(&qe_ic_lock, flags);
 
         temp = qe_ic_read(qe_ic->regs, qe_ic_info[src].mask_reg);
         qe_ic_write(qe_ic->regs, qe_ic_info[src].mask_reg,
                     temp | qe_ic_info[src].mask);
 
-        spin_unlock_irqrestore(&qe_ic_lock, flags);
+        raw_spin_unlock_irqrestore(&qe_ic_lock, flags);
 }
 
 static void qe_ic_mask_irq(unsigned int virq)
@@ -217,7 +217,7 @@ static void qe_ic_mask_irq(unsigned int virq)
         unsigned long flags;
         u32 temp;
 
-        spin_lock_irqsave(&qe_ic_lock, flags);
+        raw_spin_lock_irqsave(&qe_ic_lock, flags);
 
         temp = qe_ic_read(qe_ic->regs, qe_ic_info[src].mask_reg);
         qe_ic_write(qe_ic->regs, qe_ic_info[src].mask_reg,
@@ -233,7 +233,7 @@ static void qe_ic_mask_irq(unsigned int virq)
          */
         mb();
 
-        spin_unlock_irqrestore(&qe_ic_lock, flags);
+        raw_spin_unlock_irqrestore(&qe_ic_lock, flags);
 }
 
 static struct irq_chip qe_ic_irq_chip = {
diff --git a/arch/s390/crypto/sha_common.c b/arch/s390/crypto/sha_common.c
index 7903ec47e6b9..f42dbabc0d30 100644
--- a/arch/s390/crypto/sha_common.c
+++ b/arch/s390/crypto/sha_common.c
@@ -79,7 +79,7 @@ int s390_sha_final(struct shash_desc *desc, u8 *out)
         memset(ctx->buf + index, 0x00, end - index - 8);
 
         /*
-         * Append message length. Well, SHA-512 wants a 128 bit lenght value,
+         * Append message length. Well, SHA-512 wants a 128 bit length value,
          * nevertheless we use u64, should be enough for now...
          */
         bits = ctx->count * 8;
diff --git a/arch/s390/include/asm/cio.h b/arch/s390/include/asm/cio.h
index e85679af54dd..e34347d567a6 100644
--- a/arch/s390/include/asm/cio.h
+++ b/arch/s390/include/asm/cio.h
@@ -20,7 +20,7 @@
 /**
  * struct ccw1 - channel command word
  * @cmd_code: command code
- * @flags: flags, like IDA adressing, etc.
+ * @flags: flags, like IDA addressing, etc.
  * @count: byte count
  * @cda: data address
  *
diff --git a/arch/s390/include/asm/compat.h b/arch/s390/include/asm/compat.h
index 01a08020bc0e..104f2007f097 100644
--- a/arch/s390/include/asm/compat.h
+++ b/arch/s390/include/asm/compat.h
@@ -35,7 +35,8 @@
 
 extern long psw32_user_bits;
 
-#define COMPAT_USER_HZ  100
+#define COMPAT_USER_HZ          100
+#define COMPAT_UTS_MACHINE      "s390\0\0\0\0"
 
 typedef u32             compat_size_t;
 typedef s32             compat_ssize_t;
diff --git a/arch/s390/include/asm/ptrace.h b/arch/s390/include/asm/ptrace.h
index dd2d913afcae..fef9b33cdd59 100644
--- a/arch/s390/include/asm/ptrace.h
+++ b/arch/s390/include/asm/ptrace.h
@@ -489,9 +489,6 @@ struct user_regs_struct
  * These are defined as per linux/ptrace.h, which see.
  */
 #define arch_has_single_step()  (1)
-struct task_struct;
-extern void user_enable_single_step(struct task_struct *);
-extern void user_disable_single_step(struct task_struct *);
 extern void show_regs(struct pt_regs * regs);
 
 #define user_mode(regs) (((regs)->psw.mask & PSW_MASK_PSTATE) != 0)
diff --git a/arch/s390/include/asm/unistd.h b/arch/s390/include/asm/unistd.h
index 6e9f049fa823..5f0075150a65 100644
--- a/arch/s390/include/asm/unistd.h
+++ b/arch/s390/include/asm/unistd.h
@@ -392,6 +392,7 @@
 #define __ARCH_WANT_SYS_LLSEEK
 #define __ARCH_WANT_SYS_NICE
 #define __ARCH_WANT_SYS_OLD_GETRLIMIT
+#define __ARCH_WANT_SYS_OLD_MMAP
 #define __ARCH_WANT_SYS_OLDUMOUNT
 #define __ARCH_WANT_SYS_SIGPENDING
 #define __ARCH_WANT_SYS_SIGPROCMASK
diff --git a/arch/s390/kernel/compat_wrapper.S b/arch/s390/kernel/compat_wrapper.S
index 30de2d0e52bb..672ce52341b4 100644
--- a/arch/s390/kernel/compat_wrapper.S
+++ b/arch/s390/kernel/compat_wrapper.S
@@ -547,7 +547,7 @@ sys32_setdomainname_wrapper:
         .globl  sys32_newuname_wrapper
 sys32_newuname_wrapper:
         llgtr   %r2,%r2                 # struct new_utsname *
-        jg      sys_s390_newuname       # branch to system call
+        jg      sys_newuname            # branch to system call
 
         .globl  compat_sys_adjtimex_wrapper
 compat_sys_adjtimex_wrapper:
diff --git a/arch/s390/kernel/entry.h b/arch/s390/kernel/entry.h
index e1e5e767ab56..eb15c12ec158 100644
--- a/arch/s390/kernel/entry.h
+++ b/arch/s390/kernel/entry.h
@@ -24,17 +24,13 @@ int __cpuinit start_secondary(void *cpuvoid);
 void __init startup_init(void);
 void die(const char * str, struct pt_regs * regs, long err);
 
-struct new_utsname;
-struct mmap_arg_struct;
+struct s390_mmap_arg_struct;
 struct fadvise64_64_args;
 struct old_sigaction;
-struct sel_arg_struct;
 
-long sys_mmap2(struct mmap_arg_struct __user  *arg);
-long sys_s390_old_mmap(struct mmap_arg_struct __user *arg);
-long sys_ipc(uint call, int first, unsigned long second,
+long sys_mmap2(struct s390_mmap_arg_struct __user  *arg);
+long sys_s390_ipc(uint call, int first, unsigned long second,
              unsigned long third, void __user *ptr);
-long sys_s390_newuname(struct new_utsname __user *name);
 long sys_s390_personality(unsigned long personality);
 long sys_s390_fadvise64(int fd, u32 offset_high, u32 offset_low,
                     size_t len, int advice);
diff --git a/arch/s390/kernel/sclp.S b/arch/s390/kernel/sclp.S
index 27af3bf3a009..2e82fdd89320 100644
--- a/arch/s390/kernel/sclp.S
+++ b/arch/s390/kernel/sclp.S
@@ -235,7 +235,7 @@ _sclp_print:
         lh      %r9,0(%r8)                      # update sccb length
         ar      %r9,%r6
         sth     %r9,0(%r8)
-        ar      %r7,%r6                         # update current mto adress
+        ar      %r7,%r6                         # update current mto address
         ltr     %r0,%r0                         # more characters?
         jnz     .LinitmtoS4
         l       %r2,.LwritedataS4-.LbaseS4(%r13)# write data
diff --git a/arch/s390/kernel/sys_s390.c b/arch/s390/kernel/sys_s390.c
index 86a74c9c9e63..7b6b0f81a283 100644
--- a/arch/s390/kernel/sys_s390.c
+++ b/arch/s390/kernel/sys_s390.c
@@ -33,13 +33,12 @@
 #include "entry.h"
 
 /*
- * Perform the select(nd, in, out, ex, tv) and mmap() system
- * calls. Linux for S/390 isn't able to handle more than 5
- * system call parameters, so these system calls used a memory
- * block for parameter passing..
+ * Perform the mmap() system call. Linux for S/390 isn't able to handle more
+ * than 5 system call parameters, so this system call uses a memory block
+ * for parameter passing.
  */
 
-struct mmap_arg_struct {
+struct s390_mmap_arg_struct {
         unsigned long addr;
         unsigned long len;
         unsigned long prot;
@@ -48,9 +47,9 @@ struct mmap_arg_struct {
         unsigned long offset;
 };
 
-SYSCALL_DEFINE1(mmap2, struct mmap_arg_struct __user *, arg)
+SYSCALL_DEFINE1(mmap2, struct s390_mmap_arg_struct __user *, arg)
 {
-        struct mmap_arg_struct a;
+        struct s390_mmap_arg_struct a;
         int error = -EFAULT;
 
         if (copy_from_user(&a, arg, sizeof(a)))
@@ -60,29 +59,12 @@ out:
         return error;
 }
 
-SYSCALL_DEFINE1(s390_old_mmap, struct mmap_arg_struct __user *, arg)
-{
-        struct mmap_arg_struct a;
-        long error = -EFAULT;
-
-        if (copy_from_user(&a, arg, sizeof(a)))
-                goto out;
-
-        error = -EINVAL;
-        if (a.offset & ~PAGE_MASK)
-                goto out;
-
-        error = sys_mmap_pgoff(a.addr, a.len, a.prot, a.flags, a.fd, a.offset >> PAGE_SHIFT);
-out:
-        return error;
-}
-
 /*
  * sys_ipc() is the de-multiplexer for the SysV IPC calls..
  *
  * This is really horribly ugly.
  */
-SYSCALL_DEFINE5(ipc, uint, call, int, first, unsigned long, second,
+SYSCALL_DEFINE5(s390_ipc, uint, call, int, first, unsigned long, second,
                 unsigned long, third, void __user *, ptr)
 {
         struct ipc_kludge tmp;
@@ -149,17 +131,6 @@ SYSCALL_DEFINE5(ipc, uint, call, int, first, unsigned long, second,
 }
 
 #ifdef CONFIG_64BIT
-SYSCALL_DEFINE1(s390_newuname, struct new_utsname __user *, name)
-{
-        int ret = sys_newuname(name);
-
-        if (personality(current->personality) == PER_LINUX32 && !ret) {
-                ret = copy_to_user(name->machine, "s390\0\0\0\0", 8);
-                if (ret) ret = -EFAULT;
-        }
-        return ret;
-}
-
 SYSCALL_DEFINE1(s390_personality, unsigned long, personality)
 {
         int ret;
diff --git a/arch/s390/kernel/syscalls.S b/arch/s390/kernel/syscalls.S
index 30eca070d426..201ce6bed34e 100644
--- a/arch/s390/kernel/syscalls.S
+++ b/arch/s390/kernel/syscalls.S
@@ -98,7 +98,7 @@ SYSCALL(sys_uselib,sys_uselib,sys32_uselib_wrapper)
 SYSCALL(sys_swapon,sys_swapon,sys32_swapon_wrapper)
 SYSCALL(sys_reboot,sys_reboot,sys32_reboot_wrapper)
 SYSCALL(sys_ni_syscall,sys_ni_syscall,old32_readdir_wrapper)    /* old readdir syscall */
-SYSCALL(sys_s390_old_mmap,sys_s390_old_mmap,old32_mmap_wrapper) /* 90 */
+SYSCALL(sys_old_mmap,sys_old_mmap,old32_mmap_wrapper)           /* 90 */
 SYSCALL(sys_munmap,sys_munmap,sys32_munmap_wrapper)
 SYSCALL(sys_truncate,sys_truncate,sys32_truncate_wrapper)
 SYSCALL(sys_ftruncate,sys_ftruncate,sys32_ftruncate_wrapper)
@@ -125,12 +125,12 @@ NI_SYSCALL							/* vm86old for i386 */
 SYSCALL(sys_wait4,sys_wait4,compat_sys_wait4_wrapper)
 SYSCALL(sys_swapoff,sys_swapoff,sys32_swapoff_wrapper)          /* 115 */
 SYSCALL(sys_sysinfo,sys_sysinfo,compat_sys_sysinfo_wrapper)
-SYSCALL(sys_ipc,sys_ipc,sys32_ipc_wrapper)
+SYSCALL(sys_s390_ipc,sys_s390_ipc,sys32_ipc_wrapper)
 SYSCALL(sys_fsync,sys_fsync,sys32_fsync_wrapper)
 SYSCALL(sys_sigreturn,sys_sigreturn,sys32_sigreturn)
 SYSCALL(sys_clone,sys_clone,sys_clone_wrapper)                  /* 120 */
 SYSCALL(sys_setdomainname,sys_setdomainname,sys32_setdomainname_wrapper)
-SYSCALL(sys_newuname,sys_s390_newuname,sys32_newuname_wrapper)
+SYSCALL(sys_newuname,sys_newuname,sys32_newuname_wrapper)
 NI_SYSCALL                                                      /* modify_ldt for i386 */
 SYSCALL(sys_adjtimex,sys_adjtimex,compat_sys_adjtimex_wrapper)
 SYSCALL(sys_mprotect,sys_mprotect,sys32_mprotect_wrapper)       /* 125 */
diff --git a/arch/score/include/asm/ptrace.h b/arch/score/include/asm/ptrace.h
index d40e691f23e2..e89dc9b1ef49 100644
--- a/arch/score/include/asm/ptrace.h
+++ b/arch/score/include/asm/ptrace.h
@@ -90,8 +90,7 @@ extern int read_tsk_short(struct task_struct *, unsigned long,
                          unsigned short *);
 
 #define arch_has_single_step()  (1)
-extern void user_enable_single_step(struct task_struct *);
-extern void user_disable_single_step(struct task_struct *);
+
 #endif /* __KERNEL__ */
 
 #endif /* _ASM_SCORE_PTRACE_H */
diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig
index 05cef5061293..8d90564c2bcf 100644
--- a/arch/sh/Kconfig
+++ b/arch/sh/Kconfig
@@ -183,6 +183,9 @@ config DMA_COHERENT
 config DMA_NONCOHERENT
         def_bool !DMA_COHERENT
 
+config NEED_DMA_MAP_STATE
+        def_bool DMA_NONCOHERENT
+
 source "init/Kconfig"
 
 source "kernel/Kconfig.freezer"
diff --git a/arch/sh/include/asm/pci.h b/arch/sh/include/asm/pci.h
index 1042f7f0a48b..8bd952fcf3ba 100644
--- a/arch/sh/include/asm/pci.h
+++ b/arch/sh/include/asm/pci.h
@@ -83,25 +83,6 @@ static inline void pcibios_penalize_isa_irq(int irq, int active)
  */
 #define PCI_DMA_BUS_IS_PHYS     (dma_ops->is_phys)
 
-/* pci_unmap_{single,page} being a nop depends upon the
- * configuration.
- */
-#ifdef CONFIG_DMA_NONCOHERENT
-#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME)       dma_addr_t ADDR_NAME;
-#define DECLARE_PCI_UNMAP_LEN(LEN_NAME)         __u32 LEN_NAME;
-#define pci_unmap_addr(PTR, ADDR_NAME)          ((PTR)->ADDR_NAME)
-#define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) (((PTR)->ADDR_NAME) = (VAL))
-#define pci_unmap_len(PTR, LEN_NAME)            ((PTR)->LEN_NAME)
-#define pci_unmap_len_set(PTR, LEN_NAME, VAL)   (((PTR)->LEN_NAME) = (VAL))
-#else
-#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME)
-#define DECLARE_PCI_UNMAP_LEN(LEN_NAME)
-#define pci_unmap_addr(PTR, ADDR_NAME)          (0)
-#define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) do { } while (0)
-#define pci_unmap_len(PTR, LEN_NAME)            (0)
-#define pci_unmap_len_set(PTR, LEN_NAME, VAL)   do { } while (0)
-#endif
-
 #ifdef CONFIG_PCI
 /*
  * None of the SH PCI controllers support MWI, it is always treated as a
diff --git a/arch/sh/include/asm/ptrace.h b/arch/sh/include/asm/ptrace.h
index e11b14ea2c43..2168fde25611 100644
--- a/arch/sh/include/asm/ptrace.h
+++ b/arch/sh/include/asm/ptrace.h
@@ -123,8 +123,6 @@ extern void show_regs(struct pt_regs *);
 struct task_struct;
 
 #define arch_has_single_step()  (1)
-extern void user_enable_single_step(struct task_struct *);
-extern void user_disable_single_step(struct task_struct *);
 
 struct perf_event;
 struct perf_sample_data;
diff --git a/arch/sh/include/asm/syscalls.h b/arch/sh/include/asm/syscalls.h
index c1e2b8deb837..507725af2e54 100644
--- a/arch/sh/include/asm/syscalls.h
+++ b/arch/sh/include/asm/syscalls.h
@@ -3,17 +3,12 @@
 
 #ifdef __KERNEL__
 
-struct old_utsname;
-
 asmlinkage int old_mmap(unsigned long addr, unsigned long len,
                         unsigned long prot, unsigned long flags,
                         int fd, unsigned long off);
 asmlinkage long sys_mmap2(unsigned long addr, unsigned long len,
                           unsigned long prot, unsigned long flags,
                           unsigned long fd, unsigned long pgoff);
-asmlinkage int sys_ipc(uint call, int first, int second,
-                       int third, void __user *ptr, long fifth);
-asmlinkage int sys_uname(struct old_utsname __user *name);
 
 #ifdef CONFIG_SUPERH32
 # include "syscalls_32.h"
diff --git a/arch/sh/include/asm/unistd_32.h b/arch/sh/include/asm/unistd_32.h
index 365744b05269..0e7f0fc8f086 100644
--- a/arch/sh/include/asm/unistd_32.h
+++ b/arch/sh/include/asm/unistd_32.h
@@ -358,6 +358,7 @@
 #define __ARCH_WANT_STAT64
 #define __ARCH_WANT_SYS_ALARM
 #define __ARCH_WANT_SYS_GETHOSTNAME
+#define __ARCH_WANT_SYS_IPC
 #define __ARCH_WANT_SYS_PAUSE
 #define __ARCH_WANT_SYS_SGETMASK
 #define __ARCH_WANT_SYS_SIGNAL
@@ -370,6 +371,7 @@
 #define __ARCH_WANT_SYS_LLSEEK
 #define __ARCH_WANT_SYS_NICE
 #define __ARCH_WANT_SYS_OLD_GETRLIMIT
+#define __ARCH_WANT_SYS_OLD_UNAME
 #define __ARCH_WANT_SYS_OLDUMOUNT
 #define __ARCH_WANT_SYS_SIGPENDING
 #define __ARCH_WANT_SYS_SIGPROCMASK
diff --git a/arch/sh/include/asm/unistd_64.h b/arch/sh/include/asm/unistd_64.h
index 25de158aac3a..0580c33a1e04 100644
--- a/arch/sh/include/asm/unistd_64.h
+++ b/arch/sh/include/asm/unistd_64.h
@@ -398,6 +398,7 @@
 #define __ARCH_WANT_STAT64
 #define __ARCH_WANT_SYS_ALARM
 #define __ARCH_WANT_SYS_GETHOSTNAME
+#define __ARCH_WANT_SYS_IPC
 #define __ARCH_WANT_SYS_PAUSE
 #define __ARCH_WANT_SYS_SGETMASK
 #define __ARCH_WANT_SYS_SIGNAL
@@ -410,6 +411,7 @@
 #define __ARCH_WANT_SYS_LLSEEK
 #define __ARCH_WANT_SYS_NICE
 #define __ARCH_WANT_SYS_OLD_GETRLIMIT
+#define __ARCH_WANT_SYS_OLD_UNAME
 #define __ARCH_WANT_SYS_OLDUMOUNT
 #define __ARCH_WANT_SYS_SIGPENDING
 #define __ARCH_WANT_SYS_SIGPROCMASK
diff --git a/arch/sh/kernel/cpu/clock.c b/arch/sh/kernel/cpu/clock.c
index 83da5debeedf..e9fa1bfed53e 100644
--- a/arch/sh/kernel/cpu/clock.c
+++ b/arch/sh/kernel/cpu/clock.c
@@ -404,7 +404,7 @@ EXPORT_SYMBOL_GPL(clk_round_rate);
  *  If an entry has a device ID, it must match
  *  If an entry has a connection ID, it must match
  * Then we take the most specific entry - with the following
- * order of precidence: dev+con > dev only > con only.
+ * order of precedence: dev+con > dev only > con only.
  */
 static struct clk *clk_find(const char *dev_id, const char *con_id)
 {
diff --git a/arch/sh/kernel/sys_sh.c b/arch/sh/kernel/sys_sh.c
index 71399cde03b5..81f58371613d 100644
--- a/arch/sh/kernel/sys_sh.c
+++ b/arch/sh/kernel/sys_sh.c
@@ -53,110 +53,6 @@ asmlinkage long sys_mmap2(unsigned long addr, unsigned long len,
         return sys_mmap_pgoff(addr, len, prot, flags, fd, pgoff);
 }
 
-/*
- * sys_ipc() is the de-multiplexer for the SysV IPC calls..
- *
- * This is really horribly ugly.
- */
-asmlinkage int sys_ipc(uint call, int first, int second,
-                       int third, void __user *ptr, long fifth)
-{
-        int version, ret;
-
-        version = call >> 16; /* hack for backward compatibility */
-        call &= 0xffff;
-
-        if (call <= SEMTIMEDOP)
-                switch (call) {
-                case SEMOP:
-                        return sys_semtimedop(first,
-                                              (struct sembuf __user *)ptr,
-                                              second, NULL);
-                case SEMTIMEDOP:
-                        return sys_semtimedop(first,
-                                (struct sembuf __user *)ptr, second,
-                                (const struct timespec __user *)fifth);
-                case SEMGET:
-                        return sys_semget (first, second, third);
-                case SEMCTL: {
-                        union semun fourth;
-                        if (!ptr)
-                                return -EINVAL;
-                        if (get_user(fourth.__pad, (void __user * __user *) ptr))
-                                return -EFAULT;
-                        return sys_semctl (first, second, third, fourth);
-                        }
-                default:
-                        return -EINVAL;
-                }
-
-        if (call <= MSGCTL)
-                switch (call) {
-                case MSGSND:
-                        return sys_msgsnd (first, (struct msgbuf __user *) ptr,
-                                          second, third);
-                case MSGRCV:
-                        switch (version) {
-                        case 0:
-                        {
-                                struct ipc_kludge tmp;
-
-                                if (!ptr)
-                                        return -EINVAL;
-
-                                if (copy_from_user(&tmp,
-                                        (struct ipc_kludge __user *) ptr,
-                                                   sizeof (tmp)))
-                                        return -EFAULT;
-
-                                return sys_msgrcv (first, tmp.msgp, second,
-                                                   tmp.msgtyp, third);
-                        }
-                        default:
-                                return sys_msgrcv (first,
-                                                   (struct msgbuf __user *) ptr,
-                                                   second, fifth, third);
-                        }
-                case MSGGET:
-                        return sys_msgget ((key_t) first, second);
-                case MSGCTL:
-                        return sys_msgctl (first, second,
-                                           (struct msqid_ds __user *) ptr);
-                default:
-                        return -EINVAL;
-                }
-        if (call <= SHMCTL)
-                switch (call) {
-                case SHMAT:
-                        switch (version) {
-                        default: {
-                                ulong raddr;
-                                ret = do_shmat (first, (char __user *) ptr,
-                                                 second, &raddr);
-                                if (ret)
-                                        return ret;
-                                return put_user (raddr, (ulong __user *) third);
-                        }
-                        case 1: /* iBCS2 emulator entry point */
-                                if (!segment_eq(get_fs(), get_ds()))
-                                        return -EINVAL;
-                                return do_shmat (first, (char __user *) ptr,
-                                                  second, (ulong *) third);
-                        }
-                case SHMDT:
-                        return sys_shmdt ((char __user *)ptr);
-                case SHMGET:
-                        return sys_shmget (first, second, third);
-                case SHMCTL:
-                        return sys_shmctl (first, second,
-                                           (struct shmid_ds __user *) ptr);
-                default:
-                        return -EINVAL;
-                }
-
-        return -EINVAL;
-}
-
 /* sys_cacheflush -- flush (part of) the processor cache.  */
 asmlinkage int sys_cacheflush(unsigned long addr, unsigned long len, int op)
 {
@@ -197,14 +93,3 @@ asmlinkage int sys_cacheflush(unsigned long addr, unsigned long len, int op)
         up_read(&current->mm->mmap_sem);
         return 0;
 }
-
-asmlinkage int sys_uname(struct old_utsname __user *name)
-{
-        int err;
-        if (!name)
-                return -EFAULT;
-        down_read(&uts_sem);
-        err = copy_to_user(name, utsname(), sizeof(*name));
-        up_read(&uts_sem);
-        return err?-EFAULT:0;
-}
diff --git a/arch/sparc/Kconfig b/arch/sparc/Kconfig
index 4097f6a10860..6db513674050 100644
--- a/arch/sparc/Kconfig
+++ b/arch/sparc/Kconfig
@@ -127,6 +127,9 @@ config ZONE_DMA
         bool
         default y if SPARC32
 
+config NEED_DMA_MAP_STATE
+        def_bool y
+
 config GENERIC_ISA_DMA
         bool
         default y if SPARC32
diff --git a/arch/sparc/include/asm/compat.h b/arch/sparc/include/asm/compat.h
index 0e706257918f..5016f76ea98a 100644
--- a/arch/sparc/include/asm/compat.h
+++ b/arch/sparc/include/asm/compat.h
@@ -5,7 +5,8 @@
  */
 #include <linux/types.h>
 
-#define COMPAT_USER_HZ  100
+#define COMPAT_USER_HZ          100
+#define COMPAT_UTS_MACHINE      "sparc\0\0"
 
 typedef u32             compat_size_t;
 typedef s32             compat_ssize_t;
diff --git a/arch/sparc/include/asm/dma-mapping.h b/arch/sparc/include/asm/dma-mapping.h
index 5a8c308e2b5c..4b4a0c0b0ccd 100644
--- a/arch/sparc/include/asm/dma-mapping.h
+++ b/arch/sparc/include/asm/dma-mapping.h
@@ -8,7 +8,6 @@
 #define DMA_ERROR_CODE  (~(dma_addr_t)0x0)
 
 extern int dma_supported(struct device *dev, u64 mask);
-extern int dma_set_mask(struct device *dev, u64 dma_mask);
 
 #define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
 #define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
@@ -62,4 +61,17 @@ static inline int dma_get_cache_alignment(void)
         return (1 << INTERNODE_CACHE_SHIFT);
 }
 
+static inline int dma_set_mask(struct device *dev, u64 mask)
+{
+#ifdef CONFIG_PCI
+        if (dev->bus == &pci_bus_type) {
+                if (!dev->dma_mask || !dma_supported(dev, mask))
+                        return -EINVAL;
+                *dev->dma_mask = mask;
+                return 0;
+        }
+#endif
+        return -EINVAL;
+}
+
 #endif
diff --git a/arch/sparc/include/asm/fbio.h b/arch/sparc/include/asm/fbio.h
index b9215a0907d3..0a21da87f7d6 100644
--- a/arch/sparc/include/asm/fbio.h
+++ b/arch/sparc/include/asm/fbio.h
@@ -173,7 +173,7 @@ struct mdi_cfginfo {
         int     mdi_ncluts;     /* Number of implemented CLUTs in this MDI */
         int     mdi_type;       /* FBTYPE name */
         int     mdi_height;     /* height */
-        int     mdi_width;      /* widht */
+        int     mdi_width;      /* width */
         int     mdi_size;       /* available ram */
         int     mdi_mode;       /* 8bpp, 16bpp or 32bpp */
         int     mdi_pixfreq;    /* pixel clock (from PROM) */
diff --git a/arch/sparc/include/asm/pci_32.h b/arch/sparc/include/asm/pci_32.h
index e769f668a4b5..332ac9ab36bc 100644
--- a/arch/sparc/include/asm/pci_32.h
+++ b/arch/sparc/include/asm/pci_32.h
@@ -32,20 +32,6 @@ static inline void pcibios_penalize_isa_irq(int irq, int active)
 
 struct pci_dev;
 
-/* pci_unmap_{single,page} is not a nop, thus... */
-#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME)       \
-        dma_addr_t ADDR_NAME;
-#define DECLARE_PCI_UNMAP_LEN(LEN_NAME)         \
-        __u32 LEN_NAME;
-#define pci_unmap_addr(PTR, ADDR_NAME)                  \
-        ((PTR)->ADDR_NAME)
-#define pci_unmap_addr_set(PTR, ADDR_NAME, VAL)         \
-        (((PTR)->ADDR_NAME) = (VAL))
-#define pci_unmap_len(PTR, LEN_NAME)                    \
-        ((PTR)->LEN_NAME)
-#define pci_unmap_len_set(PTR, LEN_NAME, VAL)           \
-        (((PTR)->LEN_NAME) = (VAL))
-
 #ifdef CONFIG_PCI
 static inline void pci_dma_burst_advice(struct pci_dev *pdev,
                                         enum pci_dma_burst_strategy *strat,
diff --git a/arch/sparc/include/asm/pci_64.h b/arch/sparc/include/asm/pci_64.h
index b0576df6ec83..5312782f0b5e 100644
--- a/arch/sparc/include/asm/pci_64.h
+++ b/arch/sparc/include/asm/pci_64.h
@@ -32,20 +32,6 @@ static inline void pcibios_penalize_isa_irq(int irq, int active)
  */
 #define PCI_DMA_BUS_IS_PHYS     (0)
 
-/* pci_unmap_{single,page} is not a nop, thus... */
-#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME)       \
-        dma_addr_t ADDR_NAME;
-#define DECLARE_PCI_UNMAP_LEN(LEN_NAME)         \
-        __u32 LEN_NAME;
-#define pci_unmap_addr(PTR, ADDR_NAME)                  \
-        ((PTR)->ADDR_NAME)
-#define pci_unmap_addr_set(PTR, ADDR_NAME, VAL)         \
-        (((PTR)->ADDR_NAME) = (VAL))
-#define pci_unmap_len(PTR, LEN_NAME)                    \
-        ((PTR)->LEN_NAME)
-#define pci_unmap_len_set(PTR, LEN_NAME, VAL)           \
-        (((PTR)->LEN_NAME) = (VAL))
-
 /* PCI IOMMU mapping bypass support. */
 
 /* PCI 64-bit addressing works for all slots on all controller
diff --git a/arch/sparc/include/asm/unistd.h b/arch/sparc/include/asm/unistd.h
index cb4b9bfd0d87..d0b3b01ac9d4 100644
--- a/arch/sparc/include/asm/unistd.h
+++ b/arch/sparc/include/asm/unistd.h
@@ -432,7 +432,9 @@
 #define __ARCH_WANT_SYS_SIGPENDING
 #define __ARCH_WANT_SYS_SIGPROCMASK
 #define __ARCH_WANT_SYS_RT_SIGSUSPEND
-#ifndef __32bit_syscall_numbers__
+#ifdef __32bit_syscall_numbers__
+#define __ARCH_WANT_SYS_IPC
+#else
 #define __ARCH_WANT_COMPAT_SYS_TIME
 #define __ARCH_WANT_COMPAT_SYS_RT_SIGSUSPEND
 #endif
diff --git a/arch/sparc/kernel/iommu.c b/arch/sparc/kernel/iommu.c
index 5fad94950e76..8414549c1834 100644
--- a/arch/sparc/kernel/iommu.c
+++ b/arch/sparc/kernel/iommu.c
@@ -862,13 +862,3 @@ int dma_supported(struct device *dev, u64 device_mask)
         return 0;
 }
 EXPORT_SYMBOL(dma_supported);
-
-int dma_set_mask(struct device *dev, u64 dma_mask)
-{
-#ifdef CONFIG_PCI
-        if (dev->bus == &pci_bus_type)
-                return pci_set_dma_mask(to_pci_dev(dev), dma_mask);
-#endif
-        return -EINVAL;
-}
-EXPORT_SYMBOL(dma_set_mask);
diff --git a/arch/sparc/kernel/ioport.c b/arch/sparc/kernel/ioport.c
index 3c8c44f6a41c..84e5386714cd 100644
--- a/arch/sparc/kernel/ioport.c
+++ b/arch/sparc/kernel/ioport.c
@@ -676,17 +676,6 @@ int dma_supported(struct device *dev, u64 mask)
 }
 EXPORT_SYMBOL(dma_supported);
 
-int dma_set_mask(struct device *dev, u64 dma_mask)
-{
-#ifdef CONFIG_PCI
-        if (dev->bus == &pci_bus_type)
-                return pci_set_dma_mask(to_pci_dev(dev), dma_mask);
-#endif
-        return -EOPNOTSUPP;
-}
-EXPORT_SYMBOL(dma_set_mask);
-
-
 #ifdef CONFIG_PROC_FS
 
 static int sparc_io_proc_show(struct seq_file *m, void *v)
diff --git a/arch/sparc/kernel/perf_event.c b/arch/sparc/kernel/perf_event.c
index 9f2b2bac8b2b..b867ab3353b4 100644
--- a/arch/sparc/kernel/perf_event.c
+++ b/arch/sparc/kernel/perf_event.c
@@ -1353,7 +1353,7 @@ static void perf_callchain_user_32(struct pt_regs *regs,
 }
 
 /* Like powerpc we can't get PMU interrupts within the PMU handler,
- * so no need for seperate NMI and IRQ chains as on x86.
+ * so no need for separate NMI and IRQ chains as on x86.
  */
 static DEFINE_PER_CPU(struct perf_callchain_entry, callchain);
 
diff --git a/arch/sparc/kernel/sys_sparc_32.c b/arch/sparc/kernel/sys_sparc_32.c
index 3a82e65d8db2..ee995b7dae7e 100644
--- a/arch/sparc/kernel/sys_sparc_32.c
+++ b/arch/sparc/kernel/sys_sparc_32.c
@@ -98,119 +98,6 @@ out:
         return error;
 }
 
-/*
- * sys_ipc() is the de-multiplexer for the SysV IPC calls..
- *
- * This is really horribly ugly.
- */
-
-asmlinkage int sys_ipc (uint call, int first, int second, int third, void __user *ptr, long fifth)
-{
-        int version, err;
-
-        version = call >> 16; /* hack for backward compatibility */
-        call &= 0xffff;
-
-        if (call <= SEMCTL)
-                switch (call) {
-                case SEMOP:
-                        err = sys_semtimedop (first, (struct sembuf __user *)ptr, second, NULL);
-                        goto out;
-                case SEMTIMEDOP:
-                        err = sys_semtimedop (first, (struct sembuf __user *)ptr, second, (const struct timespec __user *) fifth);
-                        goto out;
-                case SEMGET:
-                        err = sys_semget (first, second, third);
-                        goto out;
-                case SEMCTL: {
-                        union semun fourth;
-                        err = -EINVAL;
-                        if (!ptr)
-                                goto out;
-                        err = -EFAULT;
-                        if (get_user(fourth.__pad,
-                                     (void __user * __user *)ptr))
-                                goto out;
-                        err = sys_semctl (first, second, third, fourth);
-                        goto out;
-                        }
-                default:
-                        err = -ENOSYS;
-                        goto out;
-                }
-        if (call <= MSGCTL) 
-                switch (call) {
-                case MSGSND:
-                        err = sys_msgsnd (first, (struct msgbuf __user *) ptr, 
-                                          second, third);
-                        goto out;
-                case MSGRCV:
-                        switch (version) {
-                        case 0: {
-                                struct ipc_kludge tmp;
-                                err = -EINVAL;
-                                if (!ptr)
-                                        goto out;
-                                err = -EFAULT;
-                                if (copy_from_user(&tmp, (struct ipc_kludge __user *) ptr, sizeof (tmp)))
-                                        goto out;
-                                err = sys_msgrcv (first, tmp.msgp, second, tmp.msgtyp, third);
-                                goto out;
-                                }
-                        case 1: default:
-                                err = sys_msgrcv (first,
-                                                  (struct msgbuf __user *) ptr,
-                                                  second, fifth, third);
-                                goto out;
-                        }
-                case MSGGET:
-                        err = sys_msgget ((key_t) first, second);
-                        goto out;
-                case MSGCTL:
-                        err = sys_msgctl (first, second, (struct msqid_ds __user *) ptr);
-                        goto out;
-                default:
-                        err = -ENOSYS;
-                        goto out;
-                }
-        if (call <= SHMCTL) 
-                switch (call) {
-                case SHMAT:
-                        switch (version) {
-                        case 0: default: {
-                                ulong raddr;
-                                err = do_shmat (first, (char __user *) ptr, second, &raddr);
-                                if (err)
-                                        goto out;
-                                err = -EFAULT;
-                                if (put_user (raddr, (ulong __user *) third))
-                                        goto out;
-                                err = 0;
-                                goto out;
-                                }
-                        case 1: /* iBCS2 emulator entry point */
-                                err = -EINVAL;
-                                goto out;
-                        }
-                case SHMDT: 
-                        err = sys_shmdt ((char __user *)ptr);
-                        goto out;
-                case SHMGET:
-                        err = sys_shmget (first, second, third);
-                        goto out;
-                case SHMCTL:
-                        err = sys_shmctl (first, second, (struct shmid_ds __user *) ptr);
-                        goto out;
-                default:
-                        err = -ENOSYS;
-                        goto out;
-                }
-        else
-                err = -ENOSYS;
-out:
-        return err;
-}
-
 int sparc_mmap_check(unsigned long addr, unsigned long len)
 {
         if (ARCH_SUN4C &&
diff --git a/arch/sparc/kernel/sys_sparc_64.c b/arch/sparc/kernel/sys_sparc_64.c
index cb1bef6f14b7..3d435c42e6db 100644
--- a/arch/sparc/kernel/sys_sparc_64.c
+++ b/arch/sparc/kernel/sys_sparc_64.c
@@ -426,7 +426,7 @@ out:
  * This is really horribly ugly.
  */
 
-SYSCALL_DEFINE6(ipc, unsigned int, call, int, first, unsigned long, second,
+SYSCALL_DEFINE6(sparc_ipc, unsigned int, call, int, first, unsigned long, second,
                 unsigned long, third, void __user *, ptr, long, fifth)
 {
         long err;
@@ -510,17 +510,6 @@ out:
         return err;
 }
 
-SYSCALL_DEFINE1(sparc64_newuname, struct new_utsname __user *, name)
-{
-        int ret = sys_newuname(name);
-        
-        if (current->personality == PER_LINUX32 && !ret) {
-                ret = (copy_to_user(name->machine, "sparc\0\0", 8)
-                       ? -EFAULT : 0);
-        }
-        return ret;
-}
-
 SYSCALL_DEFINE1(sparc64_personality, unsigned long, personality)
 {
         int ret;
diff --git a/arch/sparc/kernel/systbls.h b/arch/sparc/kernel/systbls.h
index 68312fe8da74..118759cd7342 100644
--- a/arch/sparc/kernel/systbls.h
+++ b/arch/sparc/kernel/systbls.h
@@ -6,15 +6,12 @@
 #include <asm/utrap.h>
 #include <asm/signal.h>
 
-struct new_utsname;
-
 extern asmlinkage unsigned long sys_getpagesize(void);
 extern asmlinkage long sparc_pipe(struct pt_regs *regs);
-extern asmlinkage long sys_ipc(unsigned int call, int first,
+extern asmlinkage long sys_sparc_ipc(unsigned int call, int first,
                                unsigned long second,
                                unsigned long third,
                                void __user *ptr, long fifth);
-extern asmlinkage long sparc64_newuname(struct new_utsname __user *name);
 extern asmlinkage long sparc64_personality(unsigned long personality);
 extern asmlinkage long sys64_munmap(unsigned long addr, size_t len);
 extern asmlinkage unsigned long sys64_mremap(unsigned long addr,
diff --git a/arch/sparc/kernel/systbls_64.S b/arch/sparc/kernel/systbls_64.S
index 17614251fb6d..9db058dd039e 100644
--- a/arch/sparc/kernel/systbls_64.S
+++ b/arch/sparc/kernel/systbls_64.S
@@ -55,7 +55,7 @@ sys_call_table32:
 /*170*/ .word sys32_lsetxattr, sys32_fsetxattr, sys_getxattr, sys_lgetxattr, compat_sys_getdents
         .word sys_setsid, sys_fchdir, sys32_fgetxattr, sys_listxattr, sys_llistxattr
 /*180*/ .word sys32_flistxattr, sys_removexattr, sys_lremovexattr, compat_sys_sigpending, sys_ni_syscall
-        .word sys32_setpgid, sys32_fremovexattr, sys32_tkill, sys32_exit_group, sys_sparc64_newuname
+        .word sys32_setpgid, sys32_fremovexattr, sys32_tkill, sys32_exit_group, sys_newuname
 /*190*/ .word sys32_init_module, sys_sparc64_personality, sys_remap_file_pages, sys32_epoll_create, sys32_epoll_ctl
         .word sys32_epoll_wait, sys32_ioprio_set, sys_getppid, sys32_sigaction, sys_sgetmask
 /*200*/ .word sys32_ssetmask, sys_sigsuspend, compat_sys_newlstat, sys_uselib, compat_sys_old_readdir
@@ -130,13 +130,13 @@ sys_call_table:
 /*170*/ .word sys_lsetxattr, sys_fsetxattr, sys_getxattr, sys_lgetxattr, sys_getdents
         .word sys_setsid, sys_fchdir, sys_fgetxattr, sys_listxattr, sys_llistxattr
 /*180*/ .word sys_flistxattr, sys_removexattr, sys_lremovexattr, sys_nis_syscall, sys_ni_syscall
-        .word sys_setpgid, sys_fremovexattr, sys_tkill, sys_exit_group, sys_sparc64_newuname
+        .word sys_setpgid, sys_fremovexattr, sys_tkill, sys_exit_group, sys_newuname
 /*190*/ .word sys_init_module, sys_sparc64_personality, sys_remap_file_pages, sys_epoll_create, sys_epoll_ctl
         .word sys_epoll_wait, sys_ioprio_set, sys_getppid, sys_nis_syscall, sys_sgetmask
 /*200*/ .word sys_ssetmask, sys_nis_syscall, sys_newlstat, sys_uselib, sys_nis_syscall
         .word sys_readahead, sys_socketcall, sys_syslog, sys_lookup_dcookie, sys_fadvise64
 /*210*/ .word sys_fadvise64_64, sys_tgkill, sys_waitpid, sys_swapoff, sys_sysinfo
-        .word sys_ipc, sys_nis_syscall, sys_clone, sys_ioprio_get, sys_adjtimex
+        .word sys_sparc_ipc, sys_nis_syscall, sys_clone, sys_ioprio_get, sys_adjtimex
 /*220*/ .word sys_nis_syscall, sys_ni_syscall, sys_delete_module, sys_ni_syscall, sys_getpgid
         .word sys_bdflush, sys_sysfs, sys_nis_syscall, sys_setfsuid, sys_setfsgid
 /*230*/ .word sys_select, sys_nis_syscall, sys_splice, sys_stime, sys_statfs64
diff --git a/arch/um/include/asm/dma-mapping.h b/arch/um/include/asm/dma-mapping.h
index 378de4bbf49f..b948c14a7867 100644
--- a/arch/um/include/asm/dma-mapping.h
+++ b/arch/um/include/asm/dma-mapping.h
@@ -104,14 +104,6 @@ dma_get_cache_alignment(void)
 }
 
 static inline void
-dma_sync_single_range(struct device *dev, dma_addr_t dma_handle,
-                      unsigned long offset, size_t size,
-                      enum dma_data_direction direction)
-{
-        BUG();
-}
-
-static inline void
 dma_cache_sync(struct device *dev, void *vaddr, size_t size,
                enum dma_data_direction direction)
 {
diff --git a/arch/um/include/asm/ptrace-generic.h b/arch/um/include/asm/ptrace-generic.h
index 6c8899013c92..2cd899f75a3c 100644
--- a/arch/um/include/asm/ptrace-generic.h
+++ b/arch/um/include/asm/ptrace-generic.h
@@ -16,6 +16,8 @@ struct pt_regs {
         struct uml_pt_regs regs;
 };
 
+#define arch_has_single_step()  (1)
+
 #define EMPTY_REGS { .regs = EMPTY_UML_PT_REGS }
 
 #define PT_REGS_IP(r) UPT_IP(&(r)->regs)
diff --git a/arch/um/kernel/ptrace.c b/arch/um/kernel/ptrace.c
index 8e3d69e4fcb5..484509948ee9 100644
--- a/arch/um/kernel/ptrace.c
+++ b/arch/um/kernel/ptrace.c
@@ -12,16 +12,25 @@
 #endif
 #include "skas_ptrace.h"
 
-static inline void set_singlestepping(struct task_struct *child, int on)
+
+
+void user_enable_single_step(struct task_struct *child)
 {
-        if (on)
-                child->ptrace |= PT_DTRACE;
-        else
-                child->ptrace &= ~PT_DTRACE;
+        child->ptrace |= PT_DTRACE;
         child->thread.singlestep_syscall = 0;
 
 #ifdef SUBARCH_SET_SINGLESTEPPING
-        SUBARCH_SET_SINGLESTEPPING(child, on);
+        SUBARCH_SET_SINGLESTEPPING(child, 1);
+#endif
+}
+
+void user_disable_single_step(struct task_struct *child)
+{
+        child->ptrace &= ~PT_DTRACE;
+        child->thread.singlestep_syscall = 0;
+
+#ifdef SUBARCH_SET_SINGLESTEPPING
+        SUBARCH_SET_SINGLESTEPPING(child, 0);
 #endif
 }
 
@@ -30,7 +39,7 @@ static inline void set_singlestepping(struct task_struct *child, int on)
  */
 void ptrace_disable(struct task_struct *child)
 {
-        set_singlestepping(child,0);
+        user_disable_single_step(child);
 }
 
 extern int peek_user(struct task_struct * child, long addr, long data);
@@ -69,53 +78,6 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
                 ret = -EIO;
                 break;
 
-        /* continue and stop at next (return from) syscall */
-        case PTRACE_SYSCALL:
-        /* restart after signal. */
-        case PTRACE_CONT: {
-                ret = -EIO;
-                if (!valid_signal(data))
-                        break;
-
-                set_singlestepping(child, 0);
-                if (request == PTRACE_SYSCALL)
-                        set_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
-                else clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
-                child->exit_code = data;
-                wake_up_process(child);
-                ret = 0;
-                break;
-        }
-
-/*
- * make the child exit.  Best I can do is send it a sigkill.
- * perhaps it should be put in the status that it wants to
- * exit.
- */
-        case PTRACE_KILL: {
-                ret = 0;
-                if (child->exit_state == EXIT_ZOMBIE)   /* already dead */
-                        break;
-
-                set_singlestepping(child, 0);
-                child->exit_code = SIGKILL;
-                wake_up_process(child);
-                break;
-        }
-
-        case PTRACE_SINGLESTEP: {  /* set the trap flag. */
-                ret = -EIO;
-                if (!valid_signal(data))
-                        break;
-                clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
-                set_singlestepping(child, 1);
-                child->exit_code = data;
-                /* give it a chance to run. */
-                wake_up_process(child);
-                ret = 0;
-                break;
-        }
-
 #ifdef PTRACE_GETREGS
         case PTRACE_GETREGS: { /* Get all gp regs from the child. */
                 if (!access_ok(VERIFY_WRITE, p, MAX_REG_OFFSET)) {
diff --git a/arch/um/kernel/syscall.c b/arch/um/kernel/syscall.c
index cccab850c27e..4393173923f5 100644
--- a/arch/um/kernel/syscall.c
+++ b/arch/um/kernel/syscall.c
@@ -51,51 +51,6 @@ long old_mmap(unsigned long addr, unsigned long len,
         return err;
 }
 
-long sys_uname(struct old_utsname __user * name)
-{
-        long err;
-        if (!name)
-                return -EFAULT;
-        down_read(&uts_sem);
-        err = copy_to_user(name, utsname(), sizeof (*name));
-        up_read(&uts_sem);
-        return err?-EFAULT:0;
-}
-
-long sys_olduname(struct oldold_utsname __user * name)
-{
-        long error;
-
-        if (!name)
-                return -EFAULT;
-        if (!access_ok(VERIFY_WRITE,name,sizeof(struct oldold_utsname)))
-                return -EFAULT;
-
-        down_read(&uts_sem);
-
-        error = __copy_to_user(&name->sysname, &utsname()->sysname,
-                               __OLD_UTS_LEN);
-        error |= __put_user(0, name->sysname + __OLD_UTS_LEN);
-        error |= __copy_to_user(&name->nodename, &utsname()->nodename,
-                                __OLD_UTS_LEN);
-        error |= __put_user(0, name->nodename + __OLD_UTS_LEN);
-        error |= __copy_to_user(&name->release, &utsname()->release,
-                                __OLD_UTS_LEN);
-        error |= __put_user(0, name->release + __OLD_UTS_LEN);
-        error |= __copy_to_user(&name->version, &utsname()->version,
-                                __OLD_UTS_LEN);
-        error |= __put_user(0, name->version + __OLD_UTS_LEN);
-        error |= __copy_to_user(&name->machine, &utsname()->machine,
-                                __OLD_UTS_LEN);
-        error |= __put_user(0, name->machine + __OLD_UTS_LEN);
-
-        up_read(&uts_sem);
-
-        error = error ? -EFAULT : 0;
-
-        return error;
-}
-
 int kernel_execve(const char *filename, char *const argv[], char *const envp[])
 {
         mm_segment_t fs;
diff --git a/arch/um/sys-i386/shared/sysdep/syscalls.h b/arch/um/sys-i386/shared/sysdep/syscalls.h
index e7787679e317..05cb796aecb5 100644
--- a/arch/um/sys-i386/shared/sysdep/syscalls.h
+++ b/arch/um/sys-i386/shared/sysdep/syscalls.h
@@ -13,8 +13,6 @@ typedef long syscall_handler_t(struct pt_regs);
  */
 extern syscall_handler_t sys_rt_sigaction;
 
-extern syscall_handler_t old_mmap_i386;
-
 extern syscall_handler_t *sys_call_table[];
 
 #define EXECUTE_SYSCALL(syscall, regs) \
diff --git a/arch/um/sys-i386/sys_call_table.S b/arch/um/sys-i386/sys_call_table.S
index c6260dd6ebb9..de274071455d 100644
--- a/arch/um/sys-i386/sys_call_table.S
+++ b/arch/um/sys-i386/sys_call_table.S
@@ -7,7 +7,7 @@
 #define sys_vm86old sys_ni_syscall
 #define sys_vm86 sys_ni_syscall
 
-#define old_mmap old_mmap_i386
+#define old_mmap sys_old_mmap
 
 #define ptregs_fork sys_fork
 #define ptregs_execve sys_execve
diff --git a/arch/um/sys-i386/syscalls.c b/arch/um/sys-i386/syscalls.c
index 857ca0b3bdef..70ca357393b8 100644
--- a/arch/um/sys-i386/syscalls.c
+++ b/arch/um/sys-i386/syscalls.c
@@ -12,57 +12,6 @@
 #include "asm/unistd.h"
 
 /*
- * Perform the select(nd, in, out, ex, tv) and mmap() system
- * calls. Linux/i386 didn't use to be able to handle more than
- * 4 system call parameters, so these system calls used a memory
- * block for parameter passing..
- */
-
-struct mmap_arg_struct {
-        unsigned long addr;
-        unsigned long len;
-        unsigned long prot;
-        unsigned long flags;
-        unsigned long fd;
-        unsigned long offset;
-};
-
-extern int old_mmap(unsigned long addr, unsigned long len,
-                    unsigned long prot, unsigned long flags,
-                    unsigned long fd, unsigned long offset);
-
-long old_mmap_i386(struct mmap_arg_struct __user *arg)
-{
-        struct mmap_arg_struct a;
-        int err = -EFAULT;
-
-        if (copy_from_user(&a, arg, sizeof(a)))
-                goto out;
-
-        err = old_mmap(a.addr, a.len, a.prot, a.flags, a.fd, a.offset);
- out:
-        return err;
-}
-
-struct sel_arg_struct {
-        unsigned long n;
-        fd_set __user *inp;
-        fd_set __user *outp;
-        fd_set __user *exp;
-        struct timeval __user *tvp;
-};
-
-long old_select(struct sel_arg_struct __user *arg)
-{
-        struct sel_arg_struct a;
-
-        if (copy_from_user(&a, arg, sizeof(a)))
-                return -EFAULT;
-        /* sys_select() does the appropriate kernel locking */
-        return sys_select(a.n, a.inp, a.outp, a.exp, a.tvp);
-}
-
-/*
  * The prototype on i386 is:
  *
  *     int clone(int flags, void * child_stack, int * parent_tidptr, struct user_desc * newtls, int * child_tidptr)
@@ -85,92 +34,6 @@ long sys_clone(unsigned long clone_flags, unsigned long newsp,
         return ret;
 }
 
-/*
- * sys_ipc() is the de-multiplexer for the SysV IPC calls..
- *
- * This is really horribly ugly.
- */
-long sys_ipc (uint call, int first, int second,
-             int third, void __user *ptr, long fifth)
-{
-        int version, ret;
-
-        version = call >> 16; /* hack for backward compatibility */
-        call &= 0xffff;
-
-        switch (call) {
-        case SEMOP:
-                return sys_semtimedop(first, (struct sembuf __user *) ptr,
-                                      second, NULL);
-        case SEMTIMEDOP:
-                return sys_semtimedop(first, (struct sembuf __user *) ptr,
-                                      second,
-                                      (const struct timespec __user *) fifth);
-        case SEMGET:
-                return sys_semget (first, second, third);
-        case SEMCTL: {
-                union semun fourth;
-                if (!ptr)
-                        return -EINVAL;
-                if (get_user(fourth.__pad, (void __user * __user *) ptr))
-                        return -EFAULT;
-                return sys_semctl (first, second, third, fourth);
-        }
-
-        case MSGSND:
-                return sys_msgsnd (first, (struct msgbuf *) ptr,
-                                   second, third);
-        case MSGRCV:
-                switch (version) {
-                case 0: {
-                        struct ipc_kludge tmp;
-                        if (!ptr)
-                                return -EINVAL;
-
-                        if (copy_from_user(&tmp,
-                                           (struct ipc_kludge *) ptr,
-                                           sizeof (tmp)))
-                                return -EFAULT;
-                        return sys_msgrcv (first, tmp.msgp, second,
-                                           tmp.msgtyp, third);
-                }
-                default:
-                        panic("msgrcv with version != 0");
-                        return sys_msgrcv (first,
-                                           (struct msgbuf *) ptr,
-                                           second, fifth, third);
-                }
-        case MSGGET:
-                return sys_msgget ((key_t) first, second);
-        case MSGCTL:
-                return sys_msgctl (first, second, (struct msqid_ds *) ptr);
-
-        case SHMAT:
-                switch (version) {
-                default: {
-                        ulong raddr;
-                        ret = do_shmat (first, (char *) ptr, second, &raddr);
-                        if (ret)
-                                return ret;
-                        return put_user (raddr, (ulong *) third);
-                }
-                case 1: /* iBCS2 emulator entry point */
-                        if (!segment_eq(get_fs(), get_ds()))
-                                return -EINVAL;
-                        return do_shmat (first, (char *) ptr, second, (ulong *) third);
-                }
-        case SHMDT:
-                return sys_shmdt ((char *)ptr);
-        case SHMGET:
-                return sys_shmget (first, second, third);
-        case SHMCTL:
-                return sys_shmctl (first, second,
-                                   (struct shmid_ds *) ptr);
-        default:
-                return -ENOSYS;
-        }
-}
-
 long sys_sigaction(int sig, const struct old_sigaction __user *act,
                          struct old_sigaction __user *oact)
 {
diff --git a/arch/um/sys-x86_64/syscall_table.c b/arch/um/sys-x86_64/syscall_table.c
index dd21d69715e6..47d469e7e7ce 100644
--- a/arch/um/sys-x86_64/syscall_table.c
+++ b/arch/um/sys-x86_64/syscall_table.c
@@ -26,11 +26,6 @@
 
 /* On UML we call it this way ("old" means it's not mmap2) */
 #define sys_mmap old_mmap
-/*
- * On x86-64 sys_uname is actually sys_newuname plus a compatibility trick.
- * See arch/x86_64/kernel/sys_x86_64.c
- */
-#define sys_uname sys_uname64
 
 #define stub_clone sys_clone
 #define stub_fork sys_fork
diff --git a/arch/um/sys-x86_64/syscalls.c b/arch/um/sys-x86_64/syscalls.c
index f1199fd34d38..f3d82bb6e15a 100644
--- a/arch/um/sys-x86_64/syscalls.c
+++ b/arch/um/sys-x86_64/syscalls.c
@@ -12,20 +12,6 @@
 #include "asm/uaccess.h"
 #include "os.h"
 
-asmlinkage long sys_uname64(struct new_utsname __user * name)
-{
-        int err;
-
-        down_read(&uts_sem);
-        err = copy_to_user(name, utsname(), sizeof (*name));
-        up_read(&uts_sem);
-
-        if (personality(current->personality) == PER_LINUX32)
-                err |= copy_to_user(&name->machine, "i686", 5);
-
-        return err ? -EFAULT : 0;
-}
-
 long arch_prctl(struct task_struct *task, int code, unsigned long __user *addr)
 {
         unsigned long *ptr = addr, tmp;
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index e98440371525..93936de67796 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -102,6 +102,9 @@ config ZONE_DMA
 config SBUS
         bool
 
+config NEED_DMA_MAP_STATE
+       def_bool (X86_64 || DMAR || DMA_API_DEBUG)
+
 config GENERIC_ISA_DMA
         def_bool y
 
diff --git a/arch/x86/crypto/twofish-i586-asm_32.S b/arch/x86/crypto/twofish-i586-asm_32.S
index 39b98ed2c1b9..575331cb2a8a 100644
--- a/arch/x86/crypto/twofish-i586-asm_32.S
+++ b/arch/x86/crypto/twofish-i586-asm_32.S
@@ -22,7 +22,7 @@
 
 #include <asm/asm-offsets.h>
 
-/* return adress at 0 */
+/* return address at 0 */
 
 #define in_blk    12  /* input byte array address parameter*/
 #define out_blk   8  /* output byte array address parameter*/
@@ -230,8 +230,8 @@ twofish_enc_blk:
         push    %edi
 
         mov     tfm + 16(%esp), %ebp    /* abuse the base pointer: set new base bointer to the crypto tfm */
-        add     $crypto_tfm_ctx_offset, %ebp    /* ctx adress */
-        mov     in_blk+16(%esp),%edi    /* input adress in edi */
+        add     $crypto_tfm_ctx_offset, %ebp    /* ctx address */
+        mov     in_blk+16(%esp),%edi    /* input address in edi */
 
         mov     (%edi),         %eax
         mov     b_offset(%edi), %ebx
@@ -286,8 +286,8 @@ twofish_dec_blk:
 
 
         mov     tfm + 16(%esp), %ebp    /* abuse the base pointer: set new base bointer to the crypto tfm */
-        add     $crypto_tfm_ctx_offset, %ebp    /* ctx adress */
-        mov     in_blk+16(%esp),%edi    /* input adress in edi */
+        add     $crypto_tfm_ctx_offset, %ebp    /* ctx address */
+        mov     in_blk+16(%esp),%edi    /* input address in edi */
 
         mov     (%edi),         %eax
         mov     b_offset(%edi), %ebx
diff --git a/arch/x86/crypto/twofish-x86_64-asm_64.S b/arch/x86/crypto/twofish-x86_64-asm_64.S
index 35974a586615..573aa102542e 100644
--- a/arch/x86/crypto/twofish-x86_64-asm_64.S
+++ b/arch/x86/crypto/twofish-x86_64-asm_64.S
@@ -221,11 +221,11 @@
 twofish_enc_blk:
         pushq    R1
 
-        /* %rdi contains the crypto tfm adress */
-        /* %rsi contains the output adress */
-        /* %rdx contains the input adress */
-        add     $crypto_tfm_ctx_offset, %rdi    /* set ctx adress */
-        /* ctx adress is moved to free one non-rex register
+        /* %rdi contains the crypto tfm address */
+        /* %rsi contains the output address */
+        /* %rdx contains the input address */
+        add     $crypto_tfm_ctx_offset, %rdi    /* set ctx address */
+        /* ctx address is moved to free one non-rex register
         as target for the 8bit high operations */
         mov     %rdi,           %r11
 
@@ -274,11 +274,11 @@ twofish_enc_blk:
 twofish_dec_blk:
         pushq    R1
 
-        /* %rdi contains the crypto tfm adress */
-        /* %rsi contains the output adress */
-        /* %rdx contains the input adress */
-        add     $crypto_tfm_ctx_offset, %rdi    /* set ctx adress */
-        /* ctx adress is moved to free one non-rex register
+        /* %rdi contains the crypto tfm address */
+        /* %rsi contains the output address */
+        /* %rdx contains the input address */
+        add     $crypto_tfm_ctx_offset, %rdi    /* set ctx address */
+        /* ctx address is moved to free one non-rex register
         as target for the 8bit high operations */
         mov     %rdi,           %r11
 
diff --git a/arch/x86/ia32/ia32entry.S b/arch/x86/ia32/ia32entry.S
index 53147ad85b96..59b4556a5b92 100644
--- a/arch/x86/ia32/ia32entry.S
+++ b/arch/x86/ia32/ia32entry.S
@@ -563,7 +563,7 @@ ia32_sys_call_table:
         .quad quiet_ni_syscall                  /* old mpx syscall holder */
         .quad sys_setpgid
         .quad quiet_ni_syscall                  /* old ulimit syscall holder */
-        .quad sys32_olduname
+        .quad sys_olduname
         .quad sys_umask         /* 60 */
         .quad sys_chroot
         .quad compat_sys_ustat
@@ -586,7 +586,7 @@ ia32_sys_call_table:
         .quad compat_sys_settimeofday
         .quad sys_getgroups16   /* 80 */
         .quad sys_setgroups16
-        .quad sys32_old_select
+        .quad compat_sys_old_select
         .quad sys_symlink
         .quad sys_lstat
         .quad sys_readlink              /* 85 */
@@ -613,7 +613,7 @@ ia32_sys_call_table:
         .quad compat_sys_newstat
         .quad compat_sys_newlstat
         .quad compat_sys_newfstat
-        .quad sys32_uname
+        .quad sys_uname
         .quad stub32_iopl               /* 110 */
         .quad sys_vhangup
         .quad quiet_ni_syscall  /* old "idle" system call */
diff --git a/arch/x86/ia32/sys_ia32.c b/arch/x86/ia32/sys_ia32.c
index 422572c77923..74c35431b7d8 100644
--- a/arch/x86/ia32/sys_ia32.c
+++ b/arch/x86/ia32/sys_ia32.c
@@ -143,7 +143,7 @@ asmlinkage long sys32_fstatat(unsigned int dfd, char __user *filename,
  * block for parameter passing..
  */
 
-struct mmap_arg_struct {
+struct mmap_arg_struct32 {
         unsigned int addr;
         unsigned int len;
         unsigned int prot;
@@ -152,9 +152,9 @@ struct mmap_arg_struct {
         unsigned int offset;
 };
 
-asmlinkage long sys32_mmap(struct mmap_arg_struct __user *arg)
+asmlinkage long sys32_mmap(struct mmap_arg_struct32 __user *arg)
 {
-        struct mmap_arg_struct a;
+        struct mmap_arg_struct32 a;
 
         if (copy_from_user(&a, arg, sizeof(a)))
                 return -EFAULT;
@@ -332,24 +332,6 @@ asmlinkage long sys32_alarm(unsigned int seconds)
         return alarm_setitimer(seconds);
 }
 
-struct sel_arg_struct {
-        unsigned int n;
-        unsigned int inp;
-        unsigned int outp;
-        unsigned int exp;
-        unsigned int tvp;
-};
-
-asmlinkage long sys32_old_select(struct sel_arg_struct __user *arg)
-{
-        struct sel_arg_struct a;
-
-        if (copy_from_user(&a, arg, sizeof(a)))
-                return -EFAULT;
-        return compat_sys_select(a.n, compat_ptr(a.inp), compat_ptr(a.outp),
-                                 compat_ptr(a.exp), compat_ptr(a.tvp));
-}
-
 asmlinkage long sys32_waitpid(compat_pid_t pid, unsigned int *stat_addr,
                               int options)
 {
@@ -466,58 +448,6 @@ asmlinkage long sys32_sendfile(int out_fd, int in_fd,
         return ret;
 }
 
-asmlinkage long sys32_olduname(struct oldold_utsname __user *name)
-{
-        char *arch = "x86_64";
-        int err;
-
-        if (!name)
-                return -EFAULT;
-        if (!access_ok(VERIFY_WRITE, name, sizeof(struct oldold_utsname)))
-                return -EFAULT;
-
-        down_read(&uts_sem);
-
-        err = __copy_to_user(&name->sysname, &utsname()->sysname,
-                             __OLD_UTS_LEN);
-        err |= __put_user(0, name->sysname+__OLD_UTS_LEN);
-        err |= __copy_to_user(&name->nodename, &utsname()->nodename,
-                              __OLD_UTS_LEN);
-        err |= __put_user(0, name->nodename+__OLD_UTS_LEN);
-        err |= __copy_to_user(&name->release, &utsname()->release,
-                              __OLD_UTS_LEN);
-        err |= __put_user(0, name->release+__OLD_UTS_LEN);
-        err |= __copy_to_user(&name->version, &utsname()->version,
-                              __OLD_UTS_LEN);
-        err |= __put_user(0, name->version+__OLD_UTS_LEN);
-
-        if (personality(current->personality) == PER_LINUX32)
-                arch = "i686";
-
-        err |= __copy_to_user(&name->machine, arch, strlen(arch) + 1);
-
-        up_read(&uts_sem);
-
-        err = err ? -EFAULT : 0;
-
-        return err;
-}
-
-long sys32_uname(struct old_utsname __user *name)
-{
-        int err;
-
-        if (!name)
-                return -EFAULT;
-        down_read(&uts_sem);
-        err = copy_to_user(name, utsname(), sizeof(*name));
-        up_read(&uts_sem);
-        if (personality(current->personality) == PER_LINUX32)
-                err |= copy_to_user(&name->machine, "i686", 5);
-
-        return err ? -EFAULT : 0;
-}
-
 asmlinkage long sys32_execve(char __user *name, compat_uptr_t __user *argv,
                              compat_uptr_t __user *envp, struct pt_regs *regs)
 {
diff --git a/arch/x86/include/asm/compat.h b/arch/x86/include/asm/compat.h
index 9a9c7bdc923d..306160e58b48 100644
--- a/arch/x86/include/asm/compat.h
+++ b/arch/x86/include/asm/compat.h
@@ -8,7 +8,8 @@
 #include <linux/sched.h>
 #include <asm/user32.h>
 
-#define COMPAT_USER_HZ  100
+#define COMPAT_USER_HZ          100
+#define COMPAT_UTS_MACHINE      "i686\0\0"
 
 typedef u32             compat_size_t;
 typedef s32             compat_ssize_t;
diff --git a/arch/x86/include/asm/pci.h b/arch/x86/include/asm/pci.h
index 3e002ca5a287..404a880ea325 100644
--- a/arch/x86/include/asm/pci.h
+++ b/arch/x86/include/asm/pci.h
@@ -97,34 +97,6 @@ extern void pci_iommu_alloc(void);
 
 #define PCI_DMA_BUS_IS_PHYS (dma_ops->is_phys)
 
-#if defined(CONFIG_X86_64) || defined(CONFIG_DMAR) || defined(CONFIG_DMA_API_DEBUG)
-
-#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME)       \
-                dma_addr_t ADDR_NAME;
-#define DECLARE_PCI_UNMAP_LEN(LEN_NAME)         \
-                __u32 LEN_NAME;
-#define pci_unmap_addr(PTR, ADDR_NAME)                  \
-                ((PTR)->ADDR_NAME)
-#define pci_unmap_addr_set(PTR, ADDR_NAME, VAL)         \
-                (((PTR)->ADDR_NAME) = (VAL))
-#define pci_unmap_len(PTR, LEN_NAME)                    \
-                ((PTR)->LEN_NAME)
-#define pci_unmap_len_set(PTR, LEN_NAME, VAL)           \
-                (((PTR)->LEN_NAME) = (VAL))
-
-#else
-
-#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME)       dma_addr_t ADDR_NAME[0];
-#define DECLARE_PCI_UNMAP_LEN(LEN_NAME) unsigned LEN_NAME[0];
-#define pci_unmap_addr(PTR, ADDR_NAME)  sizeof((PTR)->ADDR_NAME)
-#define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) \
-                do { break; } while (pci_unmap_addr(PTR, ADDR_NAME))
-#define pci_unmap_len(PTR, LEN_NAME)            sizeof((PTR)->LEN_NAME)
-#define pci_unmap_len_set(PTR, LEN_NAME, VAL) \
-                do { break; } while (pci_unmap_len(PTR, LEN_NAME))
-
-#endif
-
 #endif  /* __KERNEL__ */
 
 #ifdef CONFIG_X86_64
diff --git a/arch/x86/include/asm/ptrace.h b/arch/x86/include/asm/ptrace.h
index 20102808b191..69a686a7dff0 100644
--- a/arch/x86/include/asm/ptrace.h
+++ b/arch/x86/include/asm/ptrace.h
@@ -274,14 +274,7 @@ static inline unsigned long regs_get_kernel_stack_nth(struct pt_regs *regs,
                 return 0;
 }
 
-/*
- * These are defined as per linux/ptrace.h, which see.
- */
 #define arch_has_single_step()  (1)
-extern void user_enable_single_step(struct task_struct *);
-extern void user_disable_single_step(struct task_struct *);
-
-extern void user_enable_block_step(struct task_struct *);
 #ifdef CONFIG_X86_DEBUGCTLMSR
 #define arch_has_block_step()   (1)
 #else
diff --git a/arch/x86/include/asm/sys_ia32.h b/arch/x86/include/asm/sys_ia32.h
index d5f69045c100..3ad421784ae7 100644
--- a/arch/x86/include/asm/sys_ia32.h
+++ b/arch/x86/include/asm/sys_ia32.h
@@ -26,8 +26,8 @@ asmlinkage long sys32_lstat64(char __user *, struct stat64 __user *);
 asmlinkage long sys32_fstat64(unsigned int, struct stat64 __user *);
 asmlinkage long sys32_fstatat(unsigned int, char __user *,
                               struct stat64 __user *, int);
-struct mmap_arg_struct;
-asmlinkage long sys32_mmap(struct mmap_arg_struct __user *);
+struct mmap_arg_struct32;
+asmlinkage long sys32_mmap(struct mmap_arg_struct32 __user *);
 asmlinkage long sys32_mprotect(unsigned long, size_t, unsigned long);
 
 struct sigaction32;
@@ -40,8 +40,6 @@ asmlinkage long sys32_rt_sigprocmask(int, compat_sigset_t __user *,
                                      compat_sigset_t __user *, unsigned int);
 asmlinkage long sys32_alarm(unsigned int);
 
-struct sel_arg_struct;
-asmlinkage long sys32_old_select(struct sel_arg_struct __user *);
 asmlinkage long sys32_waitpid(compat_pid_t, unsigned int *, int);
 asmlinkage long sys32_sysfs(int, u32, u32);
 
@@ -56,11 +54,6 @@ asmlinkage long sys32_pwrite(unsigned int, char __user *, u32, u32, u32);
 asmlinkage long sys32_personality(unsigned long);
 asmlinkage long sys32_sendfile(int, int, compat_off_t __user *, s32);
 
-struct oldold_utsname;
-struct old_utsname;
-asmlinkage long sys32_olduname(struct oldold_utsname __user *);
-long sys32_uname(struct old_utsname __user *);
-
 asmlinkage long sys32_execve(char __user *, compat_uptr_t __user *,
                              compat_uptr_t __user *, struct pt_regs *);
 asmlinkage long sys32_clone(unsigned int, unsigned int, struct pt_regs *);
diff --git a/arch/x86/include/asm/syscalls.h b/arch/x86/include/asm/syscalls.h
index 8868b9420b0e..5c044b43e9a7 100644
--- a/arch/x86/include/asm/syscalls.h
+++ b/arch/x86/include/asm/syscalls.h
@@ -50,18 +50,6 @@ asmlinkage int sys_sigaction(int, const struct old_sigaction __user *,
                              struct old_sigaction __user *);
 unsigned long sys_sigreturn(struct pt_regs *);
 
-/* kernel/sys_i386_32.c */
-struct mmap_arg_struct;
-struct sel_arg_struct;
-struct oldold_utsname;
-struct old_utsname;
-
-asmlinkage int old_mmap(struct mmap_arg_struct __user *);
-asmlinkage int old_select(struct sel_arg_struct __user *);
-asmlinkage int sys_ipc(uint, int, int, int, void __user *, long);
-asmlinkage int sys_uname(struct old_utsname __user *);
-asmlinkage int sys_olduname(struct oldold_utsname __user *);
-
 /* kernel/vm86_32.c */
 int sys_vm86old(struct vm86_struct __user *, struct pt_regs *);
 int sys_vm86(unsigned long, unsigned long, struct pt_regs *);
@@ -73,11 +61,8 @@ int sys_vm86(unsigned long, unsigned long, struct pt_regs *);
 long sys_arch_prctl(int, unsigned long);
 
 /* kernel/sys_x86_64.c */
-struct new_utsname;
-
 asmlinkage long sys_mmap(unsigned long, unsigned long, unsigned long,
                          unsigned long, unsigned long, unsigned long);
-asmlinkage long sys_uname(struct new_utsname __user *);
 
 #endif /* CONFIG_X86_32 */
 #endif /* _ASM_X86_SYSCALLS_H */
diff --git a/arch/x86/include/asm/unistd_32.h b/arch/x86/include/asm/unistd_32.h
index 3baf379fa840..beb9b5f8f8a4 100644
--- a/arch/x86/include/asm/unistd_32.h
+++ b/arch/x86/include/asm/unistd_32.h
@@ -354,6 +354,7 @@
 #define __ARCH_WANT_STAT64
 #define __ARCH_WANT_SYS_ALARM
 #define __ARCH_WANT_SYS_GETHOSTNAME
+#define __ARCH_WANT_SYS_IPC
 #define __ARCH_WANT_SYS_PAUSE
 #define __ARCH_WANT_SYS_SGETMASK
 #define __ARCH_WANT_SYS_SIGNAL
@@ -366,6 +367,9 @@
 #define __ARCH_WANT_SYS_LLSEEK
 #define __ARCH_WANT_SYS_NICE
 #define __ARCH_WANT_SYS_OLD_GETRLIMIT
+#define __ARCH_WANT_SYS_OLD_UNAME
+#define __ARCH_WANT_SYS_OLD_MMAP
+#define __ARCH_WANT_SYS_OLD_SELECT
 #define __ARCH_WANT_SYS_OLDUMOUNT
 #define __ARCH_WANT_SYS_SIGPENDING
 #define __ARCH_WANT_SYS_SIGPROCMASK
diff --git a/arch/x86/include/asm/unistd_64.h b/arch/x86/include/asm/unistd_64.h
index 4843f7ba754a..ff4307b0e81e 100644
--- a/arch/x86/include/asm/unistd_64.h
+++ b/arch/x86/include/asm/unistd_64.h
@@ -146,7 +146,7 @@ __SYSCALL(__NR_wait4, sys_wait4)
 #define __NR_kill                               62
 __SYSCALL(__NR_kill, sys_kill)
 #define __NR_uname                              63
-__SYSCALL(__NR_uname, sys_uname)
+__SYSCALL(__NR_uname, sys_newuname)
 
 #define __NR_semget                             64
 __SYSCALL(__NR_semget, sys_semget)
@@ -680,6 +680,7 @@ __SYSCALL(__NR_recvmmsg, sys_recvmmsg)
 #define __ARCH_WANT_SYS_LLSEEK
 #define __ARCH_WANT_SYS_NICE
 #define __ARCH_WANT_SYS_OLD_GETRLIMIT
+#define __ARCH_WANT_SYS_OLD_UNAME
 #define __ARCH_WANT_SYS_OLDUMOUNT
 #define __ARCH_WANT_SYS_SIGPENDING
 #define __ARCH_WANT_SYS_SIGPROCMASK
diff --git a/arch/x86/kernel/apic/apic_flat_64.c b/arch/x86/kernel/apic/apic_flat_64.c
index e3c3d820c325..09d3b17ce0c2 100644
--- a/arch/x86/kernel/apic/apic_flat_64.c
+++ b/arch/x86/kernel/apic/apic_flat_64.c
@@ -223,7 +223,7 @@ struct apic apic_flat =  {
 };
 
 /*
- * Physflat mode is used when there are more than 8 CPUs on a AMD system.
+ * Physflat mode is used when there are more than 8 CPUs on a system.
  * We cannot use logical delivery in this case because the mask
  * overflows, so use physical mode.
  */
diff --git a/arch/x86/kernel/head_64.S b/arch/x86/kernel/head_64.S
index 2d8b5035371c..3d1e6f16b7a6 100644
--- a/arch/x86/kernel/head_64.S
+++ b/arch/x86/kernel/head_64.S
@@ -27,7 +27,7 @@
 #define GET_CR2_INTO_RCX movq %cr2, %rcx
 #endif
 
-/* we are not able to switch in one step to the final KERNEL ADRESS SPACE
+/* we are not able to switch in one step to the final KERNEL ADDRESS SPACE
  * because we need identity-mapped pages.
  *
  */
diff --git a/arch/x86/kernel/pci-calgary_64.c b/arch/x86/kernel/pci-calgary_64.c
index 2bbde6078143..fb99f7edb341 100644
--- a/arch/x86/kernel/pci-calgary_64.c
+++ b/arch/x86/kernel/pci-calgary_64.c
@@ -1309,7 +1309,7 @@ static void calgary_init_bitmap_from_tce_table(struct iommu_table *tbl)
 /*
  * get_tce_space_from_tar():
  * Function for kdump case. Get the tce tables from first kernel
- * by reading the contents of the base adress register of calgary iommu
+ * by reading the contents of the base address register of calgary iommu
  */
 static void __init get_tce_space_from_tar(void)
 {
diff --git a/arch/x86/kernel/pci-dma.c b/arch/x86/kernel/pci-dma.c
index 1aa966c565f9..a4ac764a6880 100644
--- a/arch/x86/kernel/pci-dma.c
+++ b/arch/x86/kernel/pci-dma.c
@@ -38,7 +38,7 @@ int iommu_detected __read_mostly = 0;
  * This variable becomes 1 if iommu=pt is passed on the kernel command line.
  * If this variable is 1, IOMMU implementations do no DMA translation for
  * devices and allow every device to access to whole physical memory. This is
- * useful if a user want to use an IOMMU only for KVM device assignment to
+ * useful if a user wants to use an IOMMU only for KVM device assignment to
  * guests and not for driver dma translation.
  */
 int iommu_pass_through __read_mostly;
diff --git a/arch/x86/kernel/ptrace.c b/arch/x86/kernel/ptrace.c
index 2d96aab82a48..a503b1fd04e5 100644
--- a/arch/x86/kernel/ptrace.c
+++ b/arch/x86/kernel/ptrace.c
@@ -581,7 +581,7 @@ ptrace_modify_breakpoint(struct perf_event *bp, int len, int type,
         struct perf_event_attr attr;
 
         /*
-         * We shoud have at least an inactive breakpoint at this
+         * We should have at least an inactive breakpoint at this
          * slot. It means the user is writing dr7 without having
          * written the address register first
          */
diff --git a/arch/x86/kernel/sys_i386_32.c b/arch/x86/kernel/sys_i386_32.c
index dee1ff7cba58..196552bb412c 100644
--- a/arch/x86/kernel/sys_i386_32.c
+++ b/arch/x86/kernel/sys_i386_32.c
@@ -25,191 +25,6 @@
 #include <asm/syscalls.h>
 
 /*
- * Perform the select(nd, in, out, ex, tv) and mmap() system
- * calls. Linux/i386 didn't use to be able to handle more than
- * 4 system call parameters, so these system calls used a memory
- * block for parameter passing..
- */
-
-struct mmap_arg_struct {
-        unsigned long addr;
-        unsigned long len;
-        unsigned long prot;
-        unsigned long flags;
-        unsigned long fd;
-        unsigned long offset;
-};
-
-asmlinkage int old_mmap(struct mmap_arg_struct __user *arg)
-{
-        struct mmap_arg_struct a;
-        int err = -EFAULT;
-
-        if (copy_from_user(&a, arg, sizeof(a)))
-                goto out;
-
-        err = -EINVAL;
-        if (a.offset & ~PAGE_MASK)
-                goto out;
-
-        err = sys_mmap_pgoff(a.addr, a.len, a.prot, a.flags,
-                        a.fd, a.offset >> PAGE_SHIFT);
-out:
-        return err;
-}
-
-
-struct sel_arg_struct {
-        unsigned long n;
-        fd_set __user *inp, *outp, *exp;
-        struct timeval __user *tvp;
-};
-
-asmlinkage int old_select(struct sel_arg_struct __user *arg)
-{
-        struct sel_arg_struct a;
-
-        if (copy_from_user(&a, arg, sizeof(a)))
-                return -EFAULT;
-        /* sys_select() does the appropriate kernel locking */
-        return sys_select(a.n, a.inp, a.outp, a.exp, a.tvp);
-}
-
-/*
- * sys_ipc() is the de-multiplexer for the SysV IPC calls..
- *
- * This is really horribly ugly.
- */
-asmlinkage int sys_ipc(uint call, int first, int second,
-                        int third, void __user *ptr, long fifth)
-{
-        int version, ret;
-
-        version = call >> 16; /* hack for backward compatibility */
-        call &= 0xffff;
-
-        switch (call) {
-        case SEMOP:
-                return sys_semtimedop(first, (struct sembuf __user *)ptr, second, NULL);
-        case SEMTIMEDOP:
-                return sys_semtimedop(first, (struct sembuf __user *)ptr, second,
-                                        (const struct timespec __user *)fifth);
-
-        case SEMGET:
-                return sys_semget(first, second, third);
-        case SEMCTL: {
-                union semun fourth;
-                if (!ptr)
-                        return -EINVAL;
-                if (get_user(fourth.__pad, (void __user * __user *) ptr))
-                        return -EFAULT;
-                return sys_semctl(first, second, third, fourth);
-        }
-
-        case MSGSND:
-                return sys_msgsnd(first, (struct msgbuf __user *) ptr,
-                                   second, third);
-        case MSGRCV:
-                switch (version) {
-                case 0: {
-                        struct ipc_kludge tmp;
-                        if (!ptr)
-                                return -EINVAL;
-
-                        if (copy_from_user(&tmp,
-                                           (struct ipc_kludge __user *) ptr,
-                                           sizeof(tmp)))
-                                return -EFAULT;
-                        return sys_msgrcv(first, tmp.msgp, second,
-                                           tmp.msgtyp, third);
-                }
-                default:
-                        return sys_msgrcv(first,
-                                           (struct msgbuf __user *) ptr,
-                                           second, fifth, third);
-                }
-        case MSGGET:
-                return sys_msgget((key_t) first, second);
-        case MSGCTL:
-                return sys_msgctl(first, second, (struct msqid_ds __user *) ptr);
-
-        case SHMAT:
-                switch (version) {
-                default: {
-                        ulong raddr;
-                        ret = do_shmat(first, (char __user *) ptr, second, &raddr);
-                        if (ret)
-                                return ret;
-                        return put_user(raddr, (ulong __user *) third);
-                }
-                case 1: /* iBCS2 emulator entry point */
-                        if (!segment_eq(get_fs(), get_ds()))
-                                return -EINVAL;
-                        /* The "(ulong *) third" is valid _only_ because of the kernel segment thing */
-                        return do_shmat(first, (char __user *) ptr, second, (ulong *) third);
-                }
-        case SHMDT:
-                return sys_shmdt((char __user *)ptr);
-        case SHMGET:
-                return sys_shmget(first, second, third);
-        case SHMCTL:
-                return sys_shmctl(first, second,
-                                   (struct shmid_ds __user *) ptr);
-        default:
-                return -ENOSYS;
-        }
-}
-
-/*
- * Old cruft
- */
-asmlinkage int sys_uname(struct old_utsname __user *name)
-{
-        int err;
-        if (!name)
-                return -EFAULT;
-        down_read(&uts_sem);
-        err = copy_to_user(name, utsname(), sizeof(*name));
-        up_read(&uts_sem);
-        return err? -EFAULT:0;
-}
-
-asmlinkage int sys_olduname(struct oldold_utsname __user *name)
-{
-        int error;
-
-        if (!name)
-                return -EFAULT;
-        if (!access_ok(VERIFY_WRITE, name, sizeof(struct oldold_utsname)))
-                return -EFAULT;
-
-        down_read(&uts_sem);
-
-        error = __copy_to_user(&name->sysname, &utsname()->sysname,
-                               __OLD_UTS_LEN);
-        error |= __put_user(0, name->sysname + __OLD_UTS_LEN);
-        error |= __copy_to_user(&name->nodename, &utsname()->nodename,
-                                __OLD_UTS_LEN);
-        error |= __put_user(0, name->nodename + __OLD_UTS_LEN);
-        error |= __copy_to_user(&name->release, &utsname()->release,
-                                __OLD_UTS_LEN);
-        error |= __put_user(0, name->release + __OLD_UTS_LEN);
-        error |= __copy_to_user(&name->version, &utsname()->version,
-                                __OLD_UTS_LEN);
-        error |= __put_user(0, name->version + __OLD_UTS_LEN);
-        error |= __copy_to_user(&name->machine, &utsname()->machine,
-                                __OLD_UTS_LEN);
-        error |= __put_user(0, name->machine + __OLD_UTS_LEN);
-
-        up_read(&uts_sem);
-
-        error = error ? -EFAULT : 0;
-
-        return error;
-}
-
-
-/*
  * Do a system call from kernel instead of calling sys_execve so we
  * end up with proper pt_regs.
  */
diff --git a/arch/x86/kernel/sys_x86_64.c b/arch/x86/kernel/sys_x86_64.c
index 8aa2057efd12..ff14a5044ce6 100644
--- a/arch/x86/kernel/sys_x86_64.c
+++ b/arch/x86/kernel/sys_x86_64.c
@@ -209,15 +209,3 @@ bottomup:
 
         return addr;
 }
-
-
-SYSCALL_DEFINE1(uname, struct new_utsname __user *, name)
-{
-        int err;
-        down_read(&uts_sem);
-        err = copy_to_user(name, utsname(), sizeof(*name));
-        up_read(&uts_sem);
-        if (personality(current->personality) == PER_LINUX32)
-                err |= copy_to_user(&name->machine, "i686", 5);
-        return err ? -EFAULT : 0;
-}
diff --git a/arch/x86/kernel/syscall_table_32.S b/arch/x86/kernel/syscall_table_32.S
index 15228b5d3eb7..8b3729341216 100644
--- a/arch/x86/kernel/syscall_table_32.S
+++ b/arch/x86/kernel/syscall_table_32.S
@@ -81,7 +81,7 @@ ENTRY(sys_call_table)
         .long sys_settimeofday
         .long sys_getgroups16   /* 80 */
         .long sys_setgroups16
-        .long old_select
+        .long sys_old_select
         .long sys_symlink
         .long sys_lstat
         .long sys_readlink      /* 85 */
@@ -89,7 +89,7 @@ ENTRY(sys_call_table)
         .long sys_swapon
         .long sys_reboot
         .long sys_old_readdir
-        .long old_mmap          /* 90 */
+        .long sys_old_mmap      /* 90 */
         .long sys_munmap
         .long sys_truncate
         .long sys_ftruncate
diff --git a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c
index 208a857c679f..9faf91ae1841 100644
--- a/arch/x86/kernel/tsc.c
+++ b/arch/x86/kernel/tsc.c
@@ -50,7 +50,7 @@ u64 native_sched_clock(void)
          *   unstable. We do this because unlike Time Of Day,
          *   the scheduler clock tolerates small errors and it's
          *   very important for it to be as fast as the platform
-         *   can achive it. )
+         *   can achieve it. )
          */
         if (unlikely(tsc_disabled)) {
                 /* No locking but a rare wrong value is not a big deal: */
diff --git a/arch/x86/kernel/vmiclock_32.c b/arch/x86/kernel/vmiclock_32.c
index 2f1ca5614292..5e1ff66ecd73 100644
--- a/arch/x86/kernel/vmiclock_32.c
+++ b/arch/x86/kernel/vmiclock_32.c
@@ -167,7 +167,7 @@ static int vmi_timer_next_event(unsigned long delta,
 {
         /* Unfortunately, set_next_event interface only passes relative
          * expiry, but we want absolute expiry.  It'd be better if were
-         * were passed an aboslute expiry, since a bunch of time may
+         * were passed an absolute expiry, since a bunch of time may
          * have been stolen between the time the delta is computed and
          * when we set the alarm below. */
         cycle_t now = vmi_timer_ops.get_cycle_counter(vmi_counter(VMI_ONESHOT));
diff --git a/arch/x86/xen/smp.c b/arch/x86/xen/smp.c
index 563d20504988..deafb65ef44e 100644
--- a/arch/x86/xen/smp.c
+++ b/arch/x86/xen/smp.c
@@ -361,7 +361,7 @@ static void xen_cpu_die(unsigned int cpu)
                 alternatives_smp_switch(0);
 }
 
-static void __cpuinit xen_play_dead(void) /* used only with CPU_HOTPLUG */
+static void __cpuinit xen_play_dead(void) /* used only with HOTPLUG_CPU */
 {
         play_dead_common();
         HYPERVISOR_vcpu_op(VCPUOP_down, smp_processor_id(), NULL);
diff --git a/arch/xtensa/include/asm/pci.h b/arch/xtensa/include/asm/pci.h
index 66410acf18b4..4609b0f15f1f 100644
--- a/arch/xtensa/include/asm/pci.h
+++ b/arch/xtensa/include/asm/pci.h
@@ -56,14 +56,6 @@ struct pci_dev;
 
 #define PCI_DMA_BUS_IS_PHYS     (1)
 
-/* pci_unmap_{page,single} is a no-op, so */
-#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME)
-#define DECLARE_PCI_UNMAP_LEN(LEN_NAME)
-#define pci_unmap_addr(PTR, ADDR_NAME)          (0)
-#define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) do { } while (0)
-#define pci_ubnmap_len(PTR, LEN_NAME)           (0)
-#define pci_unmap_len_set(PTR, LEN_NAME, VAL)   do { } while (0)
-
 /* Map a range of PCI memory or I/O space for a device into user space */
 int pci_mmap_page_range(struct pci_dev *pdev, struct vm_area_struct *vma,
                         enum pci_mmap_state mmap_state, int write_combine);
diff --git a/arch/xtensa/include/asm/ptrace.h b/arch/xtensa/include/asm/ptrace.h
index 905e1e619654..3c549f798727 100644
--- a/arch/xtensa/include/asm/ptrace.h
+++ b/arch/xtensa/include/asm/ptrace.h
@@ -113,6 +113,7 @@ struct pt_regs {
 
 #include <variant/core.h>
 
+# define arch_has_single_step() (1)
 # define task_pt_regs(tsk) ((struct pt_regs*) \
   (task_stack_page(tsk) + KERNEL_STACK_SIZE - (XCHAL_NUM_AREGS-16)*4) - 1)
 # define user_mode(regs) (((regs)->ps & 0x00000020)!=0)
diff --git a/arch/xtensa/kernel/entry.S b/arch/xtensa/kernel/entry.S
index 80d24c485fd3..77fc9f6dc016 100644
--- a/arch/xtensa/kernel/entry.S
+++ b/arch/xtensa/kernel/entry.S
@@ -104,7 +104,7 @@
  *   excsave has been restored, and
  *   stack pointer (a1) has been set.
  *
- * Note: _user_exception might be at an odd adress. Don't use call0..call12
+ * Note: _user_exception might be at an odd address. Don't use call0..call12
  */
 
 ENTRY(user_exception)
@@ -244,7 +244,7 @@ _user_exception:
  *   excsave has been restored, and
  *   stack pointer (a1) has been set.
  *
- * Note: _kernel_exception might be at an odd adress. Don't use call0..call12
+ * Note: _kernel_exception might be at an odd address. Don't use call0..call12
  */
 
 ENTRY(kernel_exception)
diff --git a/arch/xtensa/kernel/ptrace.c b/arch/xtensa/kernel/ptrace.c
index 9486882ef0af..9d4e1ceb3f09 100644
--- a/arch/xtensa/kernel/ptrace.c
+++ b/arch/xtensa/kernel/ptrace.c
@@ -30,6 +30,17 @@
 #include <asm/elf.h>
 #include <asm/coprocessor.h>
 
+
+void user_enable_single_step(struct task_struct *child)
+{
+        child->ptrace |= PT_SINGLESTEP;
+}
+
+void user_disable_single_step(struct task_struct *child)
+{
+        child->ptrace &= ~PT_SINGLESTEP;
+}
+
 /*
  * Called by kernel/ptrace.c when detaching to disable single stepping.
  */
@@ -268,51 +279,6 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
                 ret = ptrace_pokeusr(child, addr, data);
                 break;
 
-        /* continue and stop at next (return from) syscall */
-
-        case PTRACE_SYSCALL:
-        case PTRACE_CONT: /* restart after signal. */
-        {
-                ret = -EIO;
-                if (!valid_signal(data))
-                        break;
-                if (request == PTRACE_SYSCALL)
-                        set_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
-                else
-                        clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
-                child->exit_code = data;
-                /* Make sure the single step bit is not set. */
-                child->ptrace &= ~PT_SINGLESTEP;
-                wake_up_process(child);
-                ret = 0;
-                break;
-        }
-
-        /*
-         * make the child exit.  Best I can do is send it a sigkill.
-         * perhaps it should be put in the status that it wants to
-         * exit.
-         */
-        case PTRACE_KILL:
-                ret = 0;
-                if (child->exit_state == EXIT_ZOMBIE)   /* already dead */
-                        break;
-                child->exit_code = SIGKILL;
-                child->ptrace &= ~PT_SINGLESTEP;
-                wake_up_process(child);
-                break;
-
-        case PTRACE_SINGLESTEP:
-                ret = -EIO;
-                if (!valid_signal(data))
-                        break;
-                clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
-                child->ptrace |= PT_SINGLESTEP;
-                child->exit_code = data;
-                wake_up_process(child);
-                ret = 0;
-                break;
-
         case PTRACE_GETREGS:
                 ret = ptrace_getregs(child, (void __user *) data);
                 break;
diff --git a/block/Kconfig b/block/Kconfig
index e20fbde0875c..62a5921321cd 100644
--- a/block/Kconfig
+++ b/block/Kconfig
@@ -78,7 +78,7 @@ config BLK_DEV_INTEGRITY
         Protection.  If in doubt, say N.
 
 config BLK_CGROUP
-        bool
+        tristate
         depends on CGROUPS
         default n
         ---help---
diff --git a/block/Kconfig.iosched b/block/Kconfig.iosched
index b71abfb0d726..fc71cf071fb2 100644
--- a/block/Kconfig.iosched
+++ b/block/Kconfig.iosched
@@ -23,6 +23,7 @@ config IOSCHED_DEADLINE
 
 config IOSCHED_CFQ
         tristate "CFQ I/O scheduler"
+        select BLK_CGROUP if CFQ_GROUP_IOSCHED
         default y
         ---help---
           The CFQ I/O scheduler tries to distribute bandwidth equally
@@ -35,7 +36,6 @@ config IOSCHED_CFQ
 config CFQ_GROUP_IOSCHED
         bool "CFQ Group Scheduling support"
         depends on IOSCHED_CFQ && CGROUPS
-        select BLK_CGROUP
         default n
         ---help---
           Enable group IO scheduling in CFQ.
diff --git a/block/blk-cgroup.c b/block/blk-cgroup.c
index c85d74cae200..4b686ad08eaa 100644
--- a/block/blk-cgroup.c
+++ b/block/blk-cgroup.c
@@ -23,6 +23,31 @@ static LIST_HEAD(blkio_list);
 struct blkio_cgroup blkio_root_cgroup = { .weight = 2*BLKIO_WEIGHT_DEFAULT };
 EXPORT_SYMBOL_GPL(blkio_root_cgroup);
 
+static struct cgroup_subsys_state *blkiocg_create(struct cgroup_subsys *,
+                                                  struct cgroup *);
+static int blkiocg_can_attach(struct cgroup_subsys *, struct cgroup *,
+                              struct task_struct *, bool);
+static void blkiocg_attach(struct cgroup_subsys *, struct cgroup *,
+                           struct cgroup *, struct task_struct *, bool);
+static void blkiocg_destroy(struct cgroup_subsys *, struct cgroup *);
+static int blkiocg_populate(struct cgroup_subsys *, struct cgroup *);
+
+struct cgroup_subsys blkio_subsys = {
+        .name = "blkio",
+        .create = blkiocg_create,
+        .can_attach = blkiocg_can_attach,
+        .attach = blkiocg_attach,
+        .destroy = blkiocg_destroy,
+        .populate = blkiocg_populate,
+#ifdef CONFIG_BLK_CGROUP
+        /* note: blkio_subsys_id is otherwise defined in blk-cgroup.h */
+        .subsys_id = blkio_subsys_id,
+#endif
+        .use_id = 1,
+        .module = THIS_MODULE,
+};
+EXPORT_SYMBOL_GPL(blkio_subsys);
+
 struct blkio_cgroup *cgroup_to_blkio_cgroup(struct cgroup *cgroup)
 {
         return container_of(cgroup_subsys_state(cgroup, blkio_subsys_id),
@@ -253,7 +278,8 @@ remove_entry:
 done:
         free_css_id(&blkio_subsys, &blkcg->css);
         rcu_read_unlock();
-        kfree(blkcg);
+        if (blkcg != &blkio_root_cgroup)
+                kfree(blkcg);
 }
 
 static struct cgroup_subsys_state *
@@ -319,17 +345,6 @@ static void blkiocg_attach(struct cgroup_subsys *subsys, struct cgroup *cgroup,
         task_unlock(tsk);
 }
 
-struct cgroup_subsys blkio_subsys = {
-        .name = "blkio",
-        .create = blkiocg_create,
-        .can_attach = blkiocg_can_attach,
-        .attach = blkiocg_attach,
-        .destroy = blkiocg_destroy,
-        .populate = blkiocg_populate,
-        .subsys_id = blkio_subsys_id,
-        .use_id = 1,
-};
-
 void blkio_policy_register(struct blkio_policy_type *blkiop)
 {
         spin_lock(&blkio_list_lock);
@@ -345,3 +360,17 @@ void blkio_policy_unregister(struct blkio_policy_type *blkiop)
         spin_unlock(&blkio_list_lock);
 }
 EXPORT_SYMBOL_GPL(blkio_policy_unregister);
+
+static int __init init_cgroup_blkio(void)
+{
+        return cgroup_load_subsys(&blkio_subsys);
+}
+
+static void __exit exit_cgroup_blkio(void)
+{
+        cgroup_unload_subsys(&blkio_subsys);
+}
+
+module_init(init_cgroup_blkio);
+module_exit(exit_cgroup_blkio);
+MODULE_LICENSE("GPL");
diff --git a/block/blk-cgroup.h b/block/blk-cgroup.h
index 84bf745fa775..8ccc20464dae 100644
--- a/block/blk-cgroup.h
+++ b/block/blk-cgroup.h
@@ -15,7 +15,13 @@
 
 #include <linux/cgroup.h>
 
-#ifdef CONFIG_BLK_CGROUP
+#if defined(CONFIG_BLK_CGROUP) || defined(CONFIG_BLK_CGROUP_MODULE)
+
+#ifndef CONFIG_BLK_CGROUP
+/* When blk-cgroup is a module, its subsys_id isn't a compile-time constant */
+extern struct cgroup_subsys blkio_subsys;
+#define blkio_subsys_id blkio_subsys.subsys_id
+#endif
 
 struct blkio_cgroup {
         struct cgroup_subsys_state css;
@@ -91,7 +97,7 @@ static inline void blkiocg_update_blkio_group_dequeue_stats(
                         struct blkio_group *blkg, unsigned long dequeue) {}
 #endif
 
-#ifdef CONFIG_BLK_CGROUP
+#if defined(CONFIG_BLK_CGROUP) || defined(CONFIG_BLK_CGROUP_MODULE)
 extern struct blkio_cgroup blkio_root_cgroup;
 extern struct blkio_cgroup *cgroup_to_blkio_cgroup(struct cgroup *cgroup);
 extern void blkiocg_add_blkio_group(struct blkio_cgroup *blkcg,
diff --git a/block/bsg.c b/block/bsg.c
index a9fd2d84b53a..46597a6bd112 100644
--- a/block/bsg.c
+++ b/block/bsg.c
@@ -260,7 +260,7 @@ bsg_map_hdr(struct bsg_device *bd, struct sg_io_v4 *hdr, fmode_t has_write_perm,
                 return ERR_PTR(ret);
 
         /*
-         * map scatter-gather elements seperately and string them to request
+         * map scatter-gather elements separately and string them to request
          */
         rq = blk_get_request(q, rw, GFP_KERNEL);
         if (!rq)
diff --git a/crypto/Kconfig b/crypto/Kconfig
index 6a2e295ee227..403857ad06d4 100644
--- a/crypto/Kconfig
+++ b/crypto/Kconfig
@@ -826,8 +826,8 @@ config CRYPTO_ANSI_CPRNG
         help
           This option enables the generic pseudo random number generator
           for cryptographic modules.  Uses the Algorithm specified in
-          ANSI X9.31 A.2.4. Not this option must be enabled if CRYPTO_FIPS 
-          is selected
+          ANSI X9.31 A.2.4. Note that this option must be enabled if
+          CRYPTO_FIPS is selected
 
 source "drivers/crypto/Kconfig"
 
diff --git a/drivers/Makefile b/drivers/Makefile
index 81e36596b1e9..34f1e1064dbc 100644
--- a/drivers/Makefile
+++ b/drivers/Makefile
@@ -99,6 +99,7 @@ obj-$(CONFIG_SGI_SN)		+= sn/
 obj-y                           += firmware/
 obj-$(CONFIG_CRYPTO)            += crypto/
 obj-$(CONFIG_SUPERH)            += sh/
+obj-$(CONFIG_ARCH_SHMOBILE)     += sh/
 obj-$(CONFIG_GENERIC_TIME)      += clocksource/
 obj-$(CONFIG_DMA_ENGINE)        += dma/
 obj-$(CONFIG_DCA)               += dca/
diff --git a/drivers/acpi/dock.c b/drivers/acpi/dock.c
index b2586f57e1f5..d9a85f1ddde6 100644
--- a/drivers/acpi/dock.c
+++ b/drivers/acpi/dock.c
@@ -605,7 +605,7 @@ register_hotplug_dock_device(acpi_handle handle, struct acpi_dock_ops *ops,
         list_for_each_entry(dock_station, &dock_stations, sibling) {
                 /*
                  * An ATA bay can be in a dock and itself can be ejected
-                 * seperately, so there are two 'dock stations' which need the
+                 * separately, so there are two 'dock stations' which need the
                  * ops
                  */
                 dd = find_dock_dependent_device(dock_station, handle);
diff --git a/drivers/acpi/proc.c b/drivers/acpi/proc.c
index d0d25e2e1ced..1ac678d2c51c 100644
--- a/drivers/acpi/proc.c
+++ b/drivers/acpi/proc.c
@@ -435,7 +435,7 @@ acpi_system_write_wakeup_device(struct file *file,
                                 found_dev->wakeup.gpe_device)) {
                                 printk(KERN_WARNING
                                        "ACPI: '%s' and '%s' have the same GPE, "
-                                       "can't disable/enable one seperately\n",
+                                       "can't disable/enable one separately\n",
                                        dev->pnp.bus_id, found_dev->pnp.bus_id);
                                 dev->wakeup.state.enabled =
                                     found_dev->wakeup.state.enabled;
diff --git a/drivers/ata/libata-core.c b/drivers/ata/libata-core.c
index 9c77b0d1a9d0..4a28420efff2 100644
--- a/drivers/ata/libata-core.c
+++ b/drivers/ata/libata-core.c
@@ -2232,7 +2232,7 @@ retry:
                  * Some drives were very specific about that exact sequence.
                  *
                  * Note that ATA4 says lba is mandatory so the second check
-                 * shoud never trigger.
+                 * should never trigger.
                  */
                 if (ata_id_major_version(id) < 4 || !ata_id_has_lba(id)) {
                         err_mask = ata_dev_init_params(dev, id[3], id[6]);
diff --git a/drivers/ata/libata-sff.c b/drivers/ata/libata-sff.c
index 02441fd57e9e..561dec2481cb 100644
--- a/drivers/ata/libata-sff.c
+++ b/drivers/ata/libata-sff.c
@@ -2287,7 +2287,7 @@ EXPORT_SYMBOL_GPL(ata_sff_postreset);
  *      @qc: command
  *
  *      Drain the FIFO and device of any stuck data following a command
- *      failing to complete. In some cases this is neccessary before a
+ *      failing to complete. In some cases this is necessary before a
  *      reset will recover the device.
  *
  */
diff --git a/drivers/ata/pata_acpi.c b/drivers/ata/pata_acpi.c
index 294f3020a78a..8e5e13210426 100644
--- a/drivers/ata/pata_acpi.c
+++ b/drivers/ata/pata_acpi.c
@@ -161,7 +161,7 @@ static void pacpi_set_dmamode(struct ata_port *ap, struct ata_device *adev)
  *
  *      Called when the libata layer is about to issue a command. We wrap
  *      this interface so that we can load the correct ATA timings if
- *      neccessary.
+ *      necessary.
  */
 
 static unsigned int pacpi_qc_issue(struct ata_queued_cmd *qc)
diff --git a/drivers/ata/pata_hpt3x3.c b/drivers/ata/pata_hpt3x3.c
index c86c71639a95..727a81ce4c9f 100644
--- a/drivers/ata/pata_hpt3x3.c
+++ b/drivers/ata/pata_hpt3x3.c
@@ -180,7 +180,7 @@ static void hpt3x3_init_chipset(struct pci_dev *dev)
  *      @id: Entry in match table
  *
  *      Perform basic initialisation. We set the device up so we access all
- *      ports via BAR4. This is neccessary to work around errata.
+ *      ports via BAR4. This is necessary to work around errata.
  */
 
 static int hpt3x3_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
diff --git a/drivers/ata/pata_pcmcia.c b/drivers/ata/pata_pcmcia.c
index 36103531feeb..147de2fd66d2 100644
--- a/drivers/ata/pata_pcmcia.c
+++ b/drivers/ata/pata_pcmcia.c
@@ -131,7 +131,7 @@ static unsigned int ata_data_xfer_8bit(struct ata_device *dev,
  *      @qc: command
  *
  *      Drain the FIFO and device of any stuck data following a command
- *      failing to complete. In some cases this is neccessary before a
+ *      failing to complete. In some cases this is necessary before a
  *      reset will recover the device.
  *
  */
diff --git a/drivers/block/drbd/drbd_int.h b/drivers/block/drbd/drbd_int.h
index 2bf3a6ef3684..d9301e861d9f 100644
--- a/drivers/block/drbd/drbd_int.h
+++ b/drivers/block/drbd/drbd_int.h
@@ -95,7 +95,7 @@ extern char usermode_helper[];
 
 /* All EEs on the free list should have ID_VACANT (== 0)
  * freshly allocated EEs get !ID_VACANT (== 1)
- * so if it says "cannot dereference null pointer at adress 0x00000001",
+ * so if it says "cannot dereference null pointer at address 0x00000001",
  * it is most likely one of these :( */
 
 #define ID_IN_SYNC      (4711ULL)
@@ -1171,7 +1171,7 @@ extern int drbd_bitmap_io(struct drbd_conf *mdev, int (*io_fn)(struct drbd_conf
 /* Meta data layout
    We reserve a 128MB Block (4k aligned)
    * either at the end of the backing device
-   * or on a seperate meta data device. */
+   * or on a separate meta data device. */
 
 #define MD_RESERVED_SECT (128LU << 11)  /* 128 MB, unit sectors */
 /* The following numbers are sectors */
diff --git a/drivers/block/drbd/drbd_req.h b/drivers/block/drbd/drbd_req.h
index f22c1bc8ec7e..16119d7056cc 100644
--- a/drivers/block/drbd/drbd_req.h
+++ b/drivers/block/drbd/drbd_req.h
@@ -57,7 +57,7 @@
  *
  *  It may me handed over to the local disk subsystem.
  *  It may be completed by the local disk subsystem,
- *    either sucessfully or with io-error.
+ *    either successfully or with io-error.
  *  In case it is a READ request, and it failed locally,
  *    it may be retried remotely.
  *
diff --git a/drivers/block/floppy.c b/drivers/block/floppy.c
index b9b117059b62..90c4038702da 100644
--- a/drivers/block/floppy.c
+++ b/drivers/block/floppy.c
@@ -144,13 +144,23 @@
  * Better audit of register_blkdev.
  */
 
-#define FLOPPY_SANITY_CHECK
 #undef  FLOPPY_SILENT_DCL_CLEAR
 
 #define REALLY_SLOW_IO
 
 #define DEBUGT 2
-#define DCL_DEBUG       /* debug disk change line */
+
+#define DPRINT(format, args...) \
+        pr_info("floppy%d: " format, current_drive, ##args)
+
+#define DCL_DEBUG               /* debug disk change line */
+#ifdef DCL_DEBUG
+#define debug_dcl(test, fmt, args...) \
+        do { if ((test) & FD_DEBUG) DPRINT(fmt, ##args); } while (0)
+#else
+#define debug_dcl(test, fmt, args...) \
+        do { if (0) DPRINT(fmt, ##args); } while (0)
+#endif
 
 /* do print messages for unexpected interrupts */
 static int print_unex = 1;
@@ -180,6 +190,8 @@ static int print_unex = 1;
 #include <linux/mod_devicetable.h>
 #include <linux/buffer_head.h>  /* for invalidate_buffers() */
 #include <linux/mutex.h>
+#include <linux/io.h>
+#include <linux/uaccess.h>
 
 /*
  * PS/2 floppies have much slower step rates than regular floppies.
@@ -191,8 +203,6 @@ static int slow_floppy;
 #include <asm/dma.h>
 #include <asm/irq.h>
 #include <asm/system.h>
-#include <asm/io.h>
-#include <asm/uaccess.h>
 
 static int FLOPPY_IRQ = 6;
 static int FLOPPY_DMA = 2;
@@ -241,8 +251,6 @@ static int allowed_drive_mask = 0x33;
 
 static int irqdma_allocated;
 
-#define DEVICE_NAME "floppy"
-
 #include <linux/blkdev.h>
 #include <linux/blkpg.h>
 #include <linux/cdrom.h>        /* for the compatibility eject ioctl */
@@ -250,7 +258,7 @@ static int irqdma_allocated;
 
 static struct request *current_req;
 static struct request_queue *floppy_queue;
-static void do_fd_request(struct request_queue * q);
+static void do_fd_request(struct request_queue *q);
 
 #ifndef fd_get_dma_residue
 #define fd_get_dma_residue() get_dma_residue(FLOPPY_DMA)
@@ -263,7 +271,7 @@ static void do_fd_request(struct request_queue * q);
 #endif
 
 #ifndef fd_dma_mem_alloc
-#define fd_dma_mem_alloc(size) __get_dma_pages(GFP_KERNEL,get_order(size))
+#define fd_dma_mem_alloc(size) __get_dma_pages(GFP_KERNEL, get_order(size))
 #endif
 
 static inline void fallback_on_nodma_alloc(char **addr, size_t l)
@@ -273,7 +281,7 @@ static inline void fallback_on_nodma_alloc(char **addr, size_t l)
                 return;         /* we have the memory */
         if (can_use_virtual_dma != 2)
                 return;         /* no fallback allowed */
-        printk("DMA memory shortage. Temporarily falling back on virtual DMA\n");
+        pr_info("DMA memory shortage. Temporarily falling back on virtual DMA\n");
         *addr = (char *)nodma_mem_alloc(l);
 #else
         return;
@@ -283,59 +291,50 @@ static inline void fallback_on_nodma_alloc(char **addr, size_t l)
 /* End dma memory related stuff */
 
 static unsigned long fake_change;
-static int initialising = 1;
+static bool initialized;
 
-#define ITYPE(x) (((x)>>2) & 0x1f)
-#define TOMINOR(x) ((x & 3) | ((x & 4) << 5))
-#define UNIT(x) ((x) & 0x03)    /* drive on fdc */
-#define FDC(x) (((x) & 0x04) >> 2)      /* fdc of drive */
+#define ITYPE(x)        (((x) >> 2) & 0x1f)
+#define TOMINOR(x)      ((x & 3) | ((x & 4) << 5))
+#define UNIT(x)         ((x) & 0x03)            /* drive on fdc */
+#define FDC(x)          (((x) & 0x04) >> 2)     /* fdc of drive */
         /* reverse mapping from unit and fdc to drive */
 #define REVDRIVE(fdc, unit) ((unit) + ((fdc) << 2))
-#define DP (&drive_params[current_drive])
-#define DRS (&drive_state[current_drive])
-#define DRWE (&write_errors[current_drive])
-#define FDCS (&fdc_state[fdc])
-#define CLEARF(x) clear_bit(x##_BIT, &DRS->flags)
-#define SETF(x) set_bit(x##_BIT, &DRS->flags)
-#define TESTF(x) test_bit(x##_BIT, &DRS->flags)
 
-#define UDP (&drive_params[drive])
-#define UDRS (&drive_state[drive])
-#define UDRWE (&write_errors[drive])
-#define UFDCS (&fdc_state[FDC(drive)])
-#define UCLEARF(x) clear_bit(x##_BIT, &UDRS->flags)
-#define USETF(x) set_bit(x##_BIT, &UDRS->flags)
-#define UTESTF(x) test_bit(x##_BIT, &UDRS->flags)
+#define DP      (&drive_params[current_drive])
+#define DRS     (&drive_state[current_drive])
+#define DRWE    (&write_errors[current_drive])
+#define FDCS    (&fdc_state[fdc])
 
-#define DPRINT(format, args...) printk(DEVICE_NAME "%d: " format, current_drive , ## args)
+#define UDP     (&drive_params[drive])
+#define UDRS    (&drive_state[drive])
+#define UDRWE   (&write_errors[drive])
+#define UFDCS   (&fdc_state[FDC(drive)])
 
-#define PH_HEAD(floppy,head) (((((floppy)->stretch & 2) >>1) ^ head) << 2)
-#define STRETCH(floppy) ((floppy)->stretch & FD_STRETCH)
-
-#define CLEARSTRUCT(x) memset((x), 0, sizeof(*(x)))
+#define PH_HEAD(floppy, head) (((((floppy)->stretch & 2) >> 1) ^ head) << 2)
+#define STRETCH(floppy) ((floppy)->stretch & FD_STRETCH)
 
 /* read/write */
-#define COMMAND raw_cmd->cmd[0]
-#define DR_SELECT raw_cmd->cmd[1]
-#define TRACK raw_cmd->cmd[2]
-#define HEAD raw_cmd->cmd[3]
-#define SECTOR raw_cmd->cmd[4]
-#define SIZECODE raw_cmd->cmd[5]
-#define SECT_PER_TRACK raw_cmd->cmd[6]
-#define GAP raw_cmd->cmd[7]
-#define SIZECODE2 raw_cmd->cmd[8]
+#define COMMAND         (raw_cmd->cmd[0])
+#define DR_SELECT       (raw_cmd->cmd[1])
+#define TRACK           (raw_cmd->cmd[2])
+#define HEAD            (raw_cmd->cmd[3])
+#define SECTOR          (raw_cmd->cmd[4])
+#define SIZECODE        (raw_cmd->cmd[5])
+#define SECT_PER_TRACK  (raw_cmd->cmd[6])
+#define GAP             (raw_cmd->cmd[7])
+#define SIZECODE2       (raw_cmd->cmd[8])
 #define NR_RW 9
 
 /* format */
-#define F_SIZECODE raw_cmd->cmd[2]
-#define F_SECT_PER_TRACK raw_cmd->cmd[3]
-#define F_GAP raw_cmd->cmd[4]
-#define F_FILL raw_cmd->cmd[5]
+#define F_SIZECODE      (raw_cmd->cmd[2])
+#define F_SECT_PER_TRACK (raw_cmd->cmd[3])
+#define F_GAP           (raw_cmd->cmd[4])
+#define F_FILL          (raw_cmd->cmd[5])
 #define NR_F 6
 
 /*
- * Maximum disk size (in kilobytes). This default is used whenever the
- * current disk size is unknown.
+ * Maximum disk size (in kilobytes).
+ * This default is used whenever the current disk size is unknown.
  * [Now it is rather a minimum]
  */
 #define MAX_DISK_SIZE 4         /* 3984 */
@@ -345,16 +344,17 @@ static int initialising = 1;
  */
 #define MAX_REPLIES 16
 static unsigned char reply_buffer[MAX_REPLIES];
-static int inr;                 /* size of reply buffer, when called from interrupt */
-#define ST0 (reply_buffer[0])
-#define ST1 (reply_buffer[1])
-#define ST2 (reply_buffer[2])
-#define ST3 (reply_buffer[0])   /* result of GETSTATUS */
-#define R_TRACK (reply_buffer[3])
-#define R_HEAD (reply_buffer[4])
-#define R_SECTOR (reply_buffer[5])
-#define R_SIZECODE (reply_buffer[6])
-#define SEL_DLY (2*HZ/100)
+static int inr;         /* size of reply buffer, when called from interrupt */
+#define ST0             (reply_buffer[0])
+#define ST1             (reply_buffer[1])
+#define ST2             (reply_buffer[2])
+#define ST3             (reply_buffer[0])       /* result of GETSTATUS */
+#define R_TRACK         (reply_buffer[3])
+#define R_HEAD          (reply_buffer[4])
+#define R_SECTOR        (reply_buffer[5])
+#define R_SIZECODE      (reply_buffer[6])
+
+#define SEL_DLY         (2 * HZ / 100)
 
 /*
  * this struct defines the different floppy drive types.
@@ -505,9 +505,9 @@ static char floppy_device_name[] = "floppy";
 static int probing;
 
 /* Synchronization of FDC access. */
-#define FD_COMMAND_NONE -1
-#define FD_COMMAND_ERROR 2
-#define FD_COMMAND_OKAY 3
+#define FD_COMMAND_NONE         -1
+#define FD_COMMAND_ERROR        2
+#define FD_COMMAND_OKAY         3
 
 static volatile int command_status = FD_COMMAND_NONE;
 static unsigned long fdc_busy;
@@ -515,11 +515,6 @@ static DECLARE_WAIT_QUEUE_HEAD(fdc_wait);
 static DECLARE_WAIT_QUEUE_HEAD(command_done);
 
 #define NO_SIGNAL (!interruptible || !signal_pending(current))
-#define CALL(x) if ((x) == -EINTR) return -EINTR
-#define ECALL(x) if ((ret = (x))) return ret;
-#define _WAIT(x,i) CALL(ret=wait_til_done((x),i))
-#define WAIT(x) _WAIT((x),interruptible)
-#define IWAIT(x) _WAIT((x),1)
 
 /* Errors during formatting are counted here. */
 static int format_errors;
@@ -545,8 +540,9 @@ static int max_buffer_sectors;
 static int *errors;
 typedef void (*done_f)(int);
 static struct cont_t {
-        void (*interrupt)(void);        /* this is called after the interrupt of the
-                                         * main command */
+        void (*interrupt)(void);
+                                /* this is called after the interrupt of the
+                                 * main command */
         void (*redo)(void);     /* this is called to retry the operation */
         void (*error)(void);    /* this is called to tally an error */
         done_f done;            /* this is called to say if the operation has
@@ -571,7 +567,6 @@ static void floppy_release_irq_and_dma(void);
  * reset doesn't need to be tested before sending commands, because
  * output_byte is automatically disabled when reset is set.
  */
-#define CHECK_RESET { if (FDCS->reset){ reset_fdc(); return; } }
 static void reset_fdc(void);
 
 /*
@@ -579,9 +574,9 @@ static void reset_fdc(void);
  * information to interrupts. They are the data used for the current
  * request.
  */
-#define NO_TRACK -1
-#define NEED_1_RECAL -2
-#define NEED_2_RECAL -3
+#define NO_TRACK        -1
+#define NEED_1_RECAL    -2
+#define NEED_2_RECAL    -3
 
 static int usage_count;
 
@@ -621,39 +616,35 @@ static inline void set_debugt(void)
         debugtimer = jiffies;
 }
 
-static inline void debugt(const char *message)
+static inline void debugt(const char *func, const char *msg)
 {
         if (DP->flags & DEBUGT)
-                printk("%s dtime=%lu\n", message, jiffies - debugtimer);
+                pr_info("%s:%s dtime=%lu\n", func, msg, jiffies - debugtimer);
 }
 #else
 static inline void set_debugt(void) { }
-static inline void debugt(const char *message) { }
+static inline void debugt(const char *func, const char *msg) { }
 #endif /* DEBUGT */
 
-typedef void (*timeout_fn) (unsigned long);
+typedef void (*timeout_fn)(unsigned long);
 static DEFINE_TIMER(fd_timeout, floppy_shutdown, 0, 0);
 
 static const char *timeout_message;
 
-#ifdef FLOPPY_SANITY_CHECK
-static void is_alive(const char *message)
+static void is_alive(const char *func, const char *message)
 {
         /* this routine checks whether the floppy driver is "alive" */
-        if (test_bit(0, &fdc_busy) && command_status < 2
-            && !timer_pending(&fd_timeout)) {
-                DPRINT("timeout handler died: %s\n", message);
+        if (test_bit(0, &fdc_busy) && command_status < 2 &&
+            !timer_pending(&fd_timeout)) {
+                DPRINT("%s: timeout handler died.  %s\n", func, message);
         }
 }
-#endif
 
-static void (*do_floppy) (void) = NULL;
-
-#ifdef FLOPPY_SANITY_CHECK
+static void (*do_floppy)(void) = NULL;
 
 #define OLOGSIZE 20
 
-static void (*lasthandler) (void);
+static void (*lasthandler)(void);
 static unsigned long interruptjiffies;
 static unsigned long resultjiffies;
 static int resultsize;
@@ -666,12 +657,11 @@ static struct output_log {
 } output_log[OLOGSIZE];
 
 static int output_log_pos;
-#endif
 
 #define current_reqD -1
 #define MAXTIMEOUT -2
 
-static void __reschedule_timeout(int drive, const char *message, int marg)
+static void __reschedule_timeout(int drive, const char *message)
 {
         if (drive == current_reqD)
                 drive = current_drive;
@@ -682,25 +672,22 @@ static void __reschedule_timeout(int drive, const char *message, int marg)
         } else
                 fd_timeout.expires = jiffies + UDP->timeout;
         add_timer(&fd_timeout);
-        if (UDP->flags & FD_DEBUG) {
-                DPRINT("reschedule timeout ");
-                printk(message, marg);
-                printk("\n");
-        }
+        if (UDP->flags & FD_DEBUG)
+                DPRINT("reschedule timeout %s\n", message);
         timeout_message = message;
 }
 
-static void reschedule_timeout(int drive, const char *message, int marg)
+static void reschedule_timeout(int drive, const char *message)
 {
         unsigned long flags;
 
         spin_lock_irqsave(&floppy_lock, flags);
-        __reschedule_timeout(drive, message, marg);
+        __reschedule_timeout(drive, message);
         spin_unlock_irqrestore(&floppy_lock, flags);
 }
 
-#define INFBOUND(a,b) (a)=max_t(int, a, b)
-#define SUPBOUND(a,b) (a)=min_t(int, a, b)
+#define INFBOUND(a, b) (a) = max_t(int, a, b)
+#define SUPBOUND(a, b) (a) = min_t(int, a, b)
 
 /*
  * Bottom half floppy driver.
@@ -739,7 +726,6 @@ static int disk_change(int drive)
 {
         int fdc = FDC(drive);
 
-#ifdef FLOPPY_SANITY_CHECK
         if (time_before(jiffies, UDRS->select_date + UDP->select_delay))
                 DPRINT("WARNING disk change called early\n");
         if (!(FDCS->dor & (0x10 << UNIT(drive))) ||
@@ -748,31 +734,27 @@ static int disk_change(int drive)
                 DPRINT("drive=%d fdc=%d dor=%x\n", drive, FDC(drive),
                        (unsigned int)FDCS->dor);
         }
-#endif
 
-#ifdef DCL_DEBUG
-        if (UDP->flags & FD_DEBUG) {
-                DPRINT("checking disk change line for drive %d\n", drive);
-                DPRINT("jiffies=%lu\n", jiffies);
-                DPRINT("disk change line=%x\n", fd_inb(FD_DIR) & 0x80);
-                DPRINT("flags=%lx\n", UDRS->flags);
-        }
-#endif
+        debug_dcl(UDP->flags,
+                  "checking disk change line for drive %d\n", drive);
+        debug_dcl(UDP->flags, "jiffies=%lu\n", jiffies);
+        debug_dcl(UDP->flags, "disk change line=%x\n", fd_inb(FD_DIR) & 0x80);
+        debug_dcl(UDP->flags, "flags=%lx\n", UDRS->flags);
+
         if (UDP->flags & FD_BROKEN_DCL)
-                return UTESTF(FD_DISK_CHANGED);
+                return test_bit(FD_DISK_CHANGED_BIT, &UDRS->flags);
         if ((fd_inb(FD_DIR) ^ UDP->flags) & 0x80) {
-                USETF(FD_VERIFY);       /* verify write protection */
-                if (UDRS->maxblock) {
-                        /* mark it changed */
-                        USETF(FD_DISK_CHANGED);
-                }
+                set_bit(FD_VERIFY_BIT, &UDRS->flags);
+                                        /* verify write protection */
+
+                if (UDRS->maxblock)     /* mark it changed */
+                        set_bit(FD_DISK_CHANGED_BIT, &UDRS->flags);
 
                 /* invalidate its geometry */
                 if (UDRS->keep_data >= 0) {
                         if ((UDP->flags & FTD_MSG) &&
                             current_type[drive] != NULL)
-                                DPRINT("Disk type is undefined after "
-                                       "disk change\n");
+                                DPRINT("Disk type is undefined after disk change\n");
                         current_type[drive] = NULL;
                         floppy_sizes[TOMINOR(drive)] = MAX_DISK_SIZE << 1;
                 }
@@ -780,7 +762,7 @@ static int disk_change(int drive)
                 return 1;
         } else {
                 UDRS->last_checked = jiffies;
-                UCLEARF(FD_DISK_NEWCHANGE);
+                clear_bit(FD_DISK_NEWCHANGE_BIT, &UDRS->flags);
         }
         return 0;
 }
@@ -790,6 +772,12 @@ static inline int is_selected(int dor, int unit)
         return ((dor & (0x10 << unit)) && (dor & 3) == unit);
 }
 
+static bool is_ready_state(int status)
+{
+        int state = status & (STATUS_READY | STATUS_DIR | STATUS_DMA);
+        return state == STATUS_READY;
+}
+
 static int set_dor(int fdc, char mask, char data)
 {
         unsigned char unit;
@@ -806,11 +794,8 @@ static int set_dor(int fdc, char mask, char data)
                 unit = olddor & 0x3;
                 if (is_selected(olddor, unit) && !is_selected(newdor, unit)) {
                         drive = REVDRIVE(fdc, unit);
-#ifdef DCL_DEBUG
-                        if (UDP->flags & FD_DEBUG) {
-                                DPRINT("calling disk change from set_dor\n");
-                        }
-#endif
+                        debug_dcl(UDP->flags,
+                                  "calling disk change from set_dor\n");
                         disk_change(drive);
                 }
                 FDCS->dor = newdor;
@@ -834,8 +819,10 @@ static void twaddle(void)
         DRS->select_date = jiffies;
 }
 
-/* reset all driver information about the current fdc. This is needed after
- * a reset, and after a raw command. */
+/*
+ * Reset all driver information about the current fdc.
+ * This is needed after a reset, and after a raw command.
+ */
 static void reset_fdc_info(int mode)
 {
         int drive;
@@ -857,7 +844,7 @@ static void set_fdc(int drive)
                 current_drive = drive;
         }
         if (fdc != 1 && fdc != 0) {
-                printk("bad fdc value\n");
+                pr_info("bad fdc value\n");
                 return;
         }
         set_dor(fdc, ~0, 8);
@@ -871,11 +858,10 @@ static void set_fdc(int drive)
 }
 
 /* locks the driver */
-static int _lock_fdc(int drive, int interruptible, int line)
+static int _lock_fdc(int drive, bool interruptible, int line)
 {
         if (!usage_count) {
-                printk(KERN_ERR
-                       "Trying to lock fdc while usage count=0 at line %d\n",
+                pr_err("Trying to lock fdc while usage count=0 at line %d\n",
                        line);
                 return -1;
         }
@@ -904,15 +890,13 @@ static int _lock_fdc(int drive, int interruptible, int line)
         }
         command_status = FD_COMMAND_NONE;
 
-        __reschedule_timeout(drive, "lock fdc", 0);
+        __reschedule_timeout(drive, "lock fdc");
         set_fdc(drive);
         return 0;
 }
 
-#define lock_fdc(drive,interruptible) _lock_fdc(drive,interruptible, __LINE__)
-
-#define LOCK_FDC(drive,interruptible) \
-if (lock_fdc(drive,interruptible)) return -EINTR;
+#define lock_fdc(drive, interruptible)                  \
+        _lock_fdc(drive, interruptible, __LINE__)
 
 /* unlocks the driver */
 static inline void unlock_fdc(void)
@@ -924,7 +908,7 @@ static inline void unlock_fdc(void)
                 DPRINT("FDC access conflict!\n");
 
         if (do_floppy)
-                DPRINT("device interrupt still active at FDC release: %p!\n",
+                DPRINT("device interrupt still active at FDC release: %pf!\n",
                        do_floppy);
         command_status = FD_COMMAND_NONE;
         spin_lock_irqsave(&floppy_lock, flags);
@@ -1003,7 +987,7 @@ static void empty(void)
 
 static DECLARE_WORK(floppy_work, NULL);
 
-static void schedule_bh(void (*handler) (void))
+static void schedule_bh(void (*handler)(void))
 {
         PREPARE_WORK(&floppy_work, (work_func_t)handler);
         schedule_work(&floppy_work);
@@ -1026,11 +1010,7 @@ static void cancel_activity(void)
  * transfer */
 static void fd_watchdog(void)
 {
-#ifdef DCL_DEBUG
-        if (DP->flags & FD_DEBUG) {
-                DPRINT("calling disk change from watchdog\n");
-        }
-#endif
+        debug_dcl(DP->flags, "calling disk change from watchdog\n");
 
         if (disk_change(current_drive)) {
                 DPRINT("disk removed during i/o\n");
@@ -1039,7 +1019,7 @@ static void fd_watchdog(void)
                 reset_fdc();
         } else {
                 del_timer(&fd_timer);
-                fd_timer.function = (timeout_fn) fd_watchdog;
+                fd_timer.function = (timeout_fn)fd_watchdog;
                 fd_timer.expires = jiffies + HZ / 10;
                 add_timer(&fd_timer);
         }
@@ -1105,25 +1085,23 @@ static void setup_DMA(void)
 {
         unsigned long f;
 
-#ifdef FLOPPY_SANITY_CHECK
         if (raw_cmd->length == 0) {
                 int i;
 
-                printk("zero dma transfer size:");
+                pr_info("zero dma transfer size:");
                 for (i = 0; i < raw_cmd->cmd_count; i++)
-                        printk("%x,", raw_cmd->cmd[i]);
-                printk("\n");
+                        pr_cont("%x,", raw_cmd->cmd[i]);
+                pr_cont("\n");
                 cont->done(0);
                 FDCS->reset = 1;
                 return;
         }
         if (((unsigned long)raw_cmd->kernel_data) % 512) {
-                printk("non aligned address: %p\n", raw_cmd->kernel_data);
+                pr_info("non aligned address: %p\n", raw_cmd->kernel_data);
                 cont->done(0);
                 FDCS->reset = 1;
                 return;
         }
-#endif
         f = claim_dma_lock();
         fd_disable_dma();
 #ifdef fd_dma_setup
@@ -1165,7 +1143,7 @@ static int wait_til_ready(void)
                 if (status & STATUS_READY)
                         return status;
         }
-        if (!initialising) {
+        if (initialized) {
                 DPRINT("Getstatus times out (%x) on fdc %d\n", status, fdc);
                 show_floppy();
         }
@@ -1176,22 +1154,21 @@ static int wait_til_ready(void)
 /* sends a command byte to the fdc */
 static int output_byte(char byte)
 {
-        int status;
+        int status = wait_til_ready();
 
-        if ((status = wait_til_ready()) < 0)
+        if (status < 0)
                 return -1;
-        if ((status & (STATUS_READY | STATUS_DIR | STATUS_DMA)) == STATUS_READY) {
+
+        if (is_ready_state(status)) {
                 fd_outb(byte, FD_DATA);
-#ifdef FLOPPY_SANITY_CHECK
                 output_log[output_log_pos].data = byte;
                 output_log[output_log_pos].status = status;
                 output_log[output_log_pos].jiffies = jiffies;
                 output_log_pos = (output_log_pos + 1) % OLOGSIZE;
-#endif
                 return 0;
         }
         FDCS->reset = 1;
-        if (!initialising) {
+        if (initialized) {
                 DPRINT("Unable to send byte %x to FDC. Fdc=%x Status=%x\n",
                        byte, fdc, status);
                 show_floppy();
@@ -1199,8 +1176,6 @@ static int output_byte(char byte)
         return -1;
 }
 
-#define LAST_OUT(x) if (output_byte(x)<0){ reset_fdc();return;}
-
 /* gets the response from the fdc */
 static int result(void)
 {
@@ -1208,14 +1183,13 @@ static int result(void)
         int status = 0;
 
         for (i = 0; i < MAX_REPLIES; i++) {
-                if ((status = wait_til_ready()) < 0)
+                status = wait_til_ready();
+                if (status < 0)
                         break;
                 status &= STATUS_DIR | STATUS_READY | STATUS_BUSY | STATUS_DMA;
                 if ((status & ~STATUS_BUSY) == STATUS_READY) {
-#ifdef FLOPPY_SANITY_CHECK
                         resultjiffies = jiffies;
                         resultsize = i;
-#endif
                         return i;
                 }
                 if (status == (STATUS_DIR | STATUS_READY | STATUS_BUSY))
@@ -1223,10 +1197,9 @@ static int result(void)
                 else
                         break;
         }
-        if (!initialising) {
-                DPRINT
-                    ("get result error. Fdc=%d Last status=%x Read bytes=%d\n",
-                     fdc, status, i);
+        if (initialized) {
+                DPRINT("get result error. Fdc=%d Last status=%x Read bytes=%d\n",
+                       fdc, status, i);
                 show_floppy();
         }
         FDCS->reset = 1;
@@ -1237,12 +1210,14 @@ static int result(void)
 /* does the fdc need more output? */
 static int need_more_output(void)
 {
-        int status;
+        int status = wait_til_ready();
 
-        if ((status = wait_til_ready()) < 0)
+        if (status < 0)
                 return -1;
-        if ((status & (STATUS_READY | STATUS_DIR | STATUS_DMA)) == STATUS_READY)
+
+        if (is_ready_state(status))
                 return MORE_OUTPUT;
+
         return result();
 }
 
@@ -1264,9 +1239,12 @@ static inline void perpendicular_mode(void)
                 default:
                         DPRINT("Invalid data rate for perpendicular mode!\n");
                         cont->done(0);
-                        FDCS->reset = 1;        /* convenient way to return to
-                                                 * redo without to much hassle (deep
-                                                 * stack et al. */
+                        FDCS->reset = 1;
+                                        /*
+                                         * convenient way to return to
+                                         * redo without too much hassle
+                                         * (deep stack et al.)
+                                         */
                         return;
                 }
         } else
@@ -1366,9 +1344,9 @@ static void fdc_specify(void)
 
         /* Convert step rate from microseconds to milliseconds and 4 bits */
         srt = 16 - DIV_ROUND_UP(DP->srt * scale_dtr / 1000, NOMINAL_DTR);
-        if (slow_floppy) {
+        if (slow_floppy)
                 srt = srt / 4;
-        }
+
         SUPBOUND(srt, 0xf);
         INFBOUND(srt, 0);
 
@@ -1415,16 +1393,46 @@ static int fdc_dtr(void)
          * Pause 5 msec to avoid trouble. (Needs to be 2 jiffies)
          */
         FDCS->dtr = raw_cmd->rate & 3;
-        return (fd_wait_for_completion(jiffies + 2UL * HZ / 100,
-                                       (timeout_fn) floppy_ready));
+        return fd_wait_for_completion(jiffies + 2UL * HZ / 100,
+                                      (timeout_fn)floppy_ready);
 }                               /* fdc_dtr */
 
 static void tell_sector(void)
 {
-        printk(": track %d, head %d, sector %d, size %d",
-               R_TRACK, R_HEAD, R_SECTOR, R_SIZECODE);
+        pr_cont(": track %d, head %d, sector %d, size %d",
+                R_TRACK, R_HEAD, R_SECTOR, R_SIZECODE);
 }                               /* tell_sector */
 
+static void print_errors(void)
+{
+        DPRINT("");
+        if (ST0 & ST0_ECE) {
+                pr_cont("Recalibrate failed!");
+        } else if (ST2 & ST2_CRC) {
+                pr_cont("data CRC error");
+                tell_sector();
+        } else if (ST1 & ST1_CRC) {
+                pr_cont("CRC error");
+                tell_sector();
+        } else if ((ST1 & (ST1_MAM | ST1_ND)) ||
+                   (ST2 & ST2_MAM)) {
+                if (!probing) {
+                        pr_cont("sector not found");
+                        tell_sector();
+                } else
+                        pr_cont("probe failed...");
+        } else if (ST2 & ST2_WC) {      /* seek error */
+                pr_cont("wrong cylinder");
+        } else if (ST2 & ST2_BC) {      /* cylinder marked as bad */
+                pr_cont("bad cylinder");
+        } else {
+                pr_cont("unknown error. ST[0..2] are: 0x%x 0x%x 0x%x",
+                        ST0, ST1, ST2);
+                tell_sector();
+        }
+        pr_cont("\n");
+}
+
 /*
  * OK, this error interpreting routine is called after a
  * DMA read/write has succeeded
@@ -1437,7 +1445,7 @@ static int interpret_errors(void)
         char bad;
 
         if (inr != 7) {
-                DPRINT("-- FDC reply error");
+                DPRINT("-- FDC reply error\n");
                 FDCS->reset = 1;
                 return 1;
         }
@@ -1450,43 +1458,17 @@ static int interpret_errors(void)
                 bad = 1;
                 if (ST1 & ST1_WP) {
                         DPRINT("Drive is write protected\n");
-                        CLEARF(FD_DISK_WRITABLE);
+                        clear_bit(FD_DISK_WRITABLE_BIT, &DRS->flags);
                         cont->done(0);
                         bad = 2;
                 } else if (ST1 & ST1_ND) {
-                        SETF(FD_NEED_TWADDLE);
+                        set_bit(FD_NEED_TWADDLE_BIT, &DRS->flags);
                 } else if (ST1 & ST1_OR) {
                         if (DP->flags & FTD_MSG)
                                 DPRINT("Over/Underrun - retrying\n");
                         bad = 0;
                 } else if (*errors >= DP->max_errors.reporting) {
-                        DPRINT("");
-                        if (ST0 & ST0_ECE) {
-                                printk("Recalibrate failed!");
-                        } else if (ST2 & ST2_CRC) {
-                                printk("data CRC error");
-                                tell_sector();
-                        } else if (ST1 & ST1_CRC) {
-                                printk("CRC error");
-                                tell_sector();
-                        } else if ((ST1 & (ST1_MAM | ST1_ND))
-                                   || (ST2 & ST2_MAM)) {
-                                if (!probing) {
-                                        printk("sector not found");
-                                        tell_sector();
-                                } else
-                                        printk("probe failed...");
-                        } else if (ST2 & ST2_WC) {      /* seek error */
-                                printk("wrong cylinder");
-                        } else if (ST2 & ST2_BC) {      /* cylinder marked as bad */
-                                printk("bad cylinder");
-                        } else {
-                                printk
-                                    ("unknown error. ST[0..2] are: 0x%x 0x%x 0x%x",
-                                     ST0, ST1, ST2);
-                                tell_sector();
-                        }
-                        printk("\n");
+                        print_errors();
                 }
                 if (ST2 & ST2_WC || ST2 & ST2_BC)
                         /* wrong cylinder => recal */
@@ -1531,9 +1513,9 @@ static void setup_rw_floppy(void)
                  */
                 if (time_after(ready_date, jiffies + DP->select_delay)) {
                         ready_date -= DP->select_delay;
-                        function = (timeout_fn) floppy_start;
+                        function = (timeout_fn)floppy_start;
                 } else
-                        function = (timeout_fn) setup_rw_floppy;
+                        function = (timeout_fn)setup_rw_floppy;
 
                 /* wait until the floppy is spinning fast enough */
                 if (fd_wait_for_completion(ready_date, function))
@@ -1551,7 +1533,7 @@ static void setup_rw_floppy(void)
         for (i = 0; i < raw_cmd->cmd_count; i++)
                 r |= output_byte(raw_cmd->cmd[i]);
 
-        debugt("rw_command: ");
+        debugt(__func__, "rw_command");
 
         if (r) {
                 cont->error();
@@ -1574,7 +1556,7 @@ static int blind_seek;
  */
 static void seek_interrupt(void)
 {
-        debugt("seek interrupt:");
+        debugt(__func__, "");
         if (inr != 2 || (ST0 & 0xF8) != 0x20) {
                 DPRINT("seek failed\n");
                 DRS->track = NEED_2_RECAL;
@@ -1583,14 +1565,11 @@ static void seek_interrupt(void)
                 return;
         }
         if (DRS->track >= 0 && DRS->track != ST1 && !blind_seek) {
-#ifdef DCL_DEBUG
-                if (DP->flags & FD_DEBUG) {
-                        DPRINT
-                            ("clearing NEWCHANGE flag because of effective seek\n");
-                        DPRINT("jiffies=%lu\n", jiffies);
-                }
-#endif
-                CLEARF(FD_DISK_NEWCHANGE);      /* effective seek */
+                debug_dcl(DP->flags,
+                          "clearing NEWCHANGE flag because of effective seek\n");
+                debug_dcl(DP->flags, "jiffies=%lu\n", jiffies);
+                clear_bit(FD_DISK_NEWCHANGE_BIT, &DRS->flags);
+                                        /* effective seek */
                 DRS->select_date = jiffies;
         }
         DRS->track = ST1;
@@ -1599,26 +1578,23 @@ static void seek_interrupt(void)
 
 static void check_wp(void)
 {
-        if (TESTF(FD_VERIFY)) {
-                /* check write protection */
+        if (test_bit(FD_VERIFY_BIT, &DRS->flags)) {
+                                        /* check write protection */
                 output_byte(FD_GETSTATUS);
                 output_byte(UNIT(current_drive));
                 if (result() != 1) {
                         FDCS->reset = 1;
                         return;
                 }
-                CLEARF(FD_VERIFY);
-                CLEARF(FD_NEED_TWADDLE);
-#ifdef DCL_DEBUG
-                if (DP->flags & FD_DEBUG) {
-                        DPRINT("checking whether disk is write protected\n");
-                        DPRINT("wp=%x\n", ST3 & 0x40);
-                }
-#endif
+                clear_bit(FD_VERIFY_BIT, &DRS->flags);
+                clear_bit(FD_NEED_TWADDLE_BIT, &DRS->flags);
+                debug_dcl(DP->flags,
+                          "checking whether disk is write protected\n");
+                debug_dcl(DP->flags, "wp=%x\n", ST3 & 0x40);
                 if (!(ST3 & 0x40))
-                        SETF(FD_DISK_WRITABLE);
+                        set_bit(FD_DISK_WRITABLE_BIT, &DRS->flags);
                 else
-                        CLEARF(FD_DISK_WRITABLE);
+                        clear_bit(FD_DISK_WRITABLE_BIT, &DRS->flags);
         }
 }
 
@@ -1628,19 +1604,15 @@ static void seek_floppy(void)
 
         blind_seek = 0;
 
-#ifdef DCL_DEBUG
-        if (DP->flags & FD_DEBUG) {
-                DPRINT("calling disk change from seek\n");
-        }
-#endif
+        debug_dcl(DP->flags, "calling disk change from %s\n", __func__);
 
-        if (!TESTF(FD_DISK_NEWCHANGE) &&
+        if (!test_bit(FD_DISK_NEWCHANGE_BIT, &DRS->flags) &&
             disk_change(current_drive) && (raw_cmd->flags & FD_RAW_NEED_DISK)) {
                 /* the media changed flag should be cleared after the seek.
                  * If it isn't, this means that there is really no disk in
                  * the drive.
                  */
-                SETF(FD_DISK_CHANGED);
+                set_bit(FD_DISK_CHANGED_BIT, &DRS->flags);
                 cont->done(0);
                 cont->redo();
                 return;
@@ -1648,7 +1620,7 @@ static void seek_floppy(void)
         if (DRS->track <= NEED_1_RECAL) {
                 recalibrate_floppy();
                 return;
-        } else if (TESTF(FD_DISK_NEWCHANGE) &&
+        } else if (test_bit(FD_DISK_NEWCHANGE_BIT, &DRS->flags) &&
                    (raw_cmd->flags & FD_RAW_NEED_DISK) &&
                    (DRS->track <= NO_TRACK || DRS->track == raw_cmd->track)) {
                 /* we seek to clear the media-changed condition. Does anybody
@@ -1677,19 +1649,22 @@ static void seek_floppy(void)
         do_floppy = seek_interrupt;
         output_byte(FD_SEEK);
         output_byte(UNIT(current_drive));
-        LAST_OUT(track);
-        debugt("seek command:");
+        if (output_byte(track) < 0) {
+                reset_fdc();
+                return;
+        }
+        debugt(__func__, "");
 }
 
 static void recal_interrupt(void)
 {
-        debugt("recal interrupt:");
+        debugt(__func__, "");
         if (inr != 2)
                 FDCS->reset = 1;
         else if (ST0 & ST0_ECE) {
                 switch (DRS->track) {
                 case NEED_1_RECAL:
-                        debugt("recal interrupt need 1 recal:");
+                        debugt(__func__, "need 1 recal");
                         /* after a second recalibrate, we still haven't
                          * reached track 0. Probably no drive. Raise an
                          * error, as failing immediately might upset
@@ -1698,25 +1673,21 @@ static void recal_interrupt(void)
                         cont->redo();
                         return;
                 case NEED_2_RECAL:
-                        debugt("recal interrupt need 2 recal:");
+                        debugt(__func__, "need 2 recal");
                         /* If we already did a recalibrate,
                          * and we are not at track 0, this
                          * means we have moved. (The only way
                          * not to move at recalibration is to
                          * be already at track 0.) Clear the
                          * new change flag */
-#ifdef DCL_DEBUG
-                        if (DP->flags & FD_DEBUG) {
-                                DPRINT
-                                    ("clearing NEWCHANGE flag because of second recalibrate\n");
-                        }
-#endif
+                        debug_dcl(DP->flags,
+                                  "clearing NEWCHANGE flag because of second recalibrate\n");
 
-                        CLEARF(FD_DISK_NEWCHANGE);
+                        clear_bit(FD_DISK_NEWCHANGE_BIT, &DRS->flags);
                         DRS->select_date = jiffies;
                         /* fall through */
                 default:
-                        debugt("recal interrupt default:");
+                        debugt(__func__, "default");
                         /* Recalibrate moves the head by at
                          * most 80 steps. If after one
                          * recalibrate we don't have reached
@@ -1738,8 +1709,8 @@ static void print_result(char *message, int inr)
         DPRINT("%s ", message);
         if (inr >= 0)
                 for (i = 0; i < inr; i++)
-                        printk("repl[%d]=%x ", i, reply_buffer[i]);
-        printk("\n");
+                        pr_cont("repl[%d]=%x ", i, reply_buffer[i]);
+        pr_cont("\n");
 }
 
 /* interrupt handler. Note that this can be called externally on the Sparc */
@@ -1760,10 +1731,10 @@ irqreturn_t floppy_interrupt(int irq, void *dev_id)
         do_floppy = NULL;
         if (fdc >= N_FDC || FDCS->address == -1) {
                 /* we don't even know which FDC is the culprit */
-                printk("DOR0=%x\n", fdc_state[0].dor);
-                printk("floppy interrupt on bizarre fdc %d\n", fdc);
-                printk("handler=%p\n", handler);
-                is_alive("bizarre fdc");
+                pr_info("DOR0=%x\n", fdc_state[0].dor);
+                pr_info("floppy interrupt on bizarre fdc %d\n", fdc);
+                pr_info("handler=%pf\n", handler);
+                is_alive(__func__, "bizarre fdc");
                 return IRQ_NONE;
         }
 
@@ -1777,7 +1748,7 @@ irqreturn_t floppy_interrupt(int irq, void *dev_id)
          * activity.
          */
 
-        do_print = !handler && print_unex && !initialising;
+        do_print = !handler && print_unex && initialized;
 
         inr = result();
         if (do_print)
@@ -1790,15 +1761,15 @@ irqreturn_t floppy_interrupt(int irq, void *dev_id)
                         if (do_print)
                                 print_result("sensei", inr);
                         max_sensei--;
-                } while ((ST0 & 0x83) != UNIT(current_drive) && inr == 2
-                         && max_sensei);
+                } while ((ST0 & 0x83) != UNIT(current_drive) &&
+                         inr == 2 && max_sensei);
         }
         if (!handler) {
                 FDCS->reset = 1;
                 return IRQ_NONE;
         }
         schedule_bh(handler);
-        is_alive("normal interrupt end");
+        is_alive(__func__, "normal interrupt end");
 
         /* FIXME! Was it really for us? */
         return IRQ_HANDLED;
@@ -1806,10 +1777,11 @@ irqreturn_t floppy_interrupt(int irq, void *dev_id)
 
 static void recalibrate_floppy(void)
 {
-        debugt("recalibrate floppy:");
+        debugt(__func__, "");
         do_floppy = recal_interrupt;
         output_byte(FD_RECALIBRATE);
-        LAST_OUT(UNIT(current_drive));
+        if (output_byte(UNIT(current_drive)) < 0)
+                reset_fdc();
 }
 
 /*
@@ -1817,10 +1789,10 @@ static void recalibrate_floppy(void)
  */
 static void reset_interrupt(void)
 {
-        debugt("reset interrupt:");
+        debugt(__func__, "");
         result();               /* get the status ready for set_fdc */
         if (FDCS->reset) {
-                printk("reset set in interrupt, calling %p\n", cont->error);
+                pr_info("reset set in interrupt, calling %pf\n", cont->error);
                 cont->error();  /* a reset just after a reset. BAD! */
         }
         cont->redo();
@@ -1858,53 +1830,49 @@ static void show_floppy(void)
 {
         int i;
 
-        printk("\n");
-        printk("floppy driver state\n");
-        printk("-------------------\n");
-        printk("now=%lu last interrupt=%lu diff=%lu last called handler=%p\n",
-               jiffies, interruptjiffies, jiffies - interruptjiffies,
-               lasthandler);
+        pr_info("\n");
+        pr_info("floppy driver state\n");
+        pr_info("-------------------\n");
+        pr_info("now=%lu last interrupt=%lu diff=%lu last called handler=%pf\n",
+                jiffies, interruptjiffies, jiffies - interruptjiffies,
+                lasthandler);
 
-#ifdef FLOPPY_SANITY_CHECK
-        printk("timeout_message=%s\n", timeout_message);
-        printk("last output bytes:\n");
+        pr_info("timeout_message=%s\n", timeout_message);
+        pr_info("last output bytes:\n");
         for (i = 0; i < OLOGSIZE; i++)
-                printk("%2x %2x %lu\n",
-                       output_log[(i + output_log_pos) % OLOGSIZE].data,
-                       output_log[(i + output_log_pos) % OLOGSIZE].status,
-                       output_log[(i + output_log_pos) % OLOGSIZE].jiffies);
-        printk("last result at %lu\n", resultjiffies);
-        printk("last redo_fd_request at %lu\n", lastredo);
-        for (i = 0; i < resultsize; i++) {
-                printk("%2x ", reply_buffer[i]);
-        }
-        printk("\n");
-#endif
-
-        printk("status=%x\n", fd_inb(FD_STATUS));
-        printk("fdc_busy=%lu\n", fdc_busy);
+                pr_info("%2x %2x %lu\n",
+                        output_log[(i + output_log_pos) % OLOGSIZE].data,
+                        output_log[(i + output_log_pos) % OLOGSIZE].status,
+                        output_log[(i + output_log_pos) % OLOGSIZE].jiffies);
+        pr_info("last result at %lu\n", resultjiffies);
+        pr_info("last redo_fd_request at %lu\n", lastredo);
+        print_hex_dump(KERN_INFO, "", DUMP_PREFIX_NONE, 16, 1,
+                       reply_buffer, resultsize, true);
+
+        pr_info("status=%x\n", fd_inb(FD_STATUS));
+        pr_info("fdc_busy=%lu\n", fdc_busy);
         if (do_floppy)
-                printk("do_floppy=%p\n", do_floppy);
+                pr_info("do_floppy=%pf\n", do_floppy);
         if (work_pending(&floppy_work))
-                printk("floppy_work.func=%p\n", floppy_work.func);
+                pr_info("floppy_work.func=%pf\n", floppy_work.func);
         if (timer_pending(&fd_timer))
-                printk("fd_timer.function=%p\n", fd_timer.function);
+                pr_info("fd_timer.function=%pf\n", fd_timer.function);
         if (timer_pending(&fd_timeout)) {
-                printk("timer_function=%p\n", fd_timeout.function);
-                printk("expires=%lu\n", fd_timeout.expires - jiffies);
-                printk("now=%lu\n", jiffies);
-        }
-        printk("cont=%p\n", cont);
-        printk("current_req=%p\n", current_req);
-        printk("command_status=%d\n", command_status);
-        printk("\n");
+                pr_info("timer_function=%pf\n", fd_timeout.function);
+                pr_info("expires=%lu\n", fd_timeout.expires - jiffies);
+                pr_info("now=%lu\n", jiffies);
+        }
+        pr_info("cont=%p\n", cont);
+        pr_info("current_req=%p\n", current_req);
+        pr_info("command_status=%d\n", command_status);
+        pr_info("\n");
 }
 
 static void floppy_shutdown(unsigned long data)
 {
         unsigned long flags;
 
-        if (!initialising)
+        if (initialized)
                 show_floppy();
         cancel_activity();
 
@@ -1916,17 +1884,17 @@ static void floppy_shutdown(unsigned long data)
 
         /* avoid dma going to a random drive after shutdown */
 
-        if (!initialising)
+        if (initialized)
                 DPRINT("floppy timeout called\n");
         FDCS->reset = 1;
         if (cont) {
                 cont->done(0);
                 cont->redo();   /* this will recall reset when needed */
         } else {
-                printk("no cont in shutdown!\n");
+                pr_info("no cont in shutdown!\n");
                 process_fd_request();
         }
-        is_alive("floppy shutdown");
+        is_alive(__func__, "");
 }
 
 /* start motor, check media-changed condition and write protection */
@@ -1954,27 +1922,26 @@ static int start_motor(void (*function)(void))
         set_dor(fdc, mask, data);
 
         /* wait_for_completion also schedules reset if needed. */
-        return (fd_wait_for_completion(DRS->select_date + DP->select_delay,
-                                       (timeout_fn) function));
+        return fd_wait_for_completion(DRS->select_date + DP->select_delay,
+                                      (timeout_fn)function);
 }
 
 static void floppy_ready(void)
 {
-        CHECK_RESET;
+        if (FDCS->reset) {
+                reset_fdc();
+                return;
+        }
         if (start_motor(floppy_ready))
                 return;
         if (fdc_dtr())
                 return;
 
-#ifdef DCL_DEBUG
-        if (DP->flags & FD_DEBUG) {
-                DPRINT("calling disk change from floppy_ready\n");
-        }
-#endif
+        debug_dcl(DP->flags, "calling disk change from floppy_ready\n");
         if (!(raw_cmd->flags & FD_RAW_NO_MOTOR) &&
             disk_change(current_drive) && !DP->select_delay)
-                twaddle();      /* this clears the dcl on certain drive/controller
-                                 * combinations */
+                twaddle();      /* this clears the dcl on certain
+                                 * drive/controller combinations */
 
 #ifdef fd_chose_dma_mode
         if ((raw_cmd->flags & FD_RAW_READ) || (raw_cmd->flags & FD_RAW_WRITE)) {
@@ -1998,15 +1965,11 @@ static void floppy_ready(void)
 
 static void floppy_start(void)
 {
-        reschedule_timeout(current_reqD, "floppy start", 0);
+        reschedule_timeout(current_reqD, "floppy start");
 
         scandrives();
-#ifdef DCL_DEBUG
-        if (DP->flags & FD_DEBUG) {
-                DPRINT("setting NEWCHANGE in floppy_start\n");
-        }
-#endif
-        SETF(FD_DISK_NEWCHANGE);
+        debug_dcl(DP->flags, "setting NEWCHANGE in floppy_start\n");
+        set_bit(FD_DISK_NEWCHANGE_BIT, &DRS->flags);
         floppy_ready();
 }
 
@@ -2026,7 +1989,7 @@ static void floppy_start(void)
 
 static void do_wakeup(void)
 {
-        reschedule_timeout(MAXTIMEOUT, "do wakeup", 0);
+        reschedule_timeout(MAXTIMEOUT, "do wakeup");
         cont = NULL;
         command_status += 2;
         wake_up(&command_done);
@@ -2046,7 +2009,7 @@ static struct cont_t intr_cont = {
         .done           = (done_f)empty
 };
 
-static int wait_til_done(void (*handler)(void), int interruptible)
+static int wait_til_done(void (*handler)(void), bool interruptible)
 {
         int ret;
 
@@ -2064,7 +2027,7 @@ static int wait_til_done(void (*handler)(void), int interruptible)
                         if (command_status >= 2 || !NO_SIGNAL)
                                 break;
 
-                        is_alive("wait_til_done");
+                        is_alive(__func__, "");
                         schedule();
                 }
 
@@ -2180,9 +2143,9 @@ static void format_interrupt(void)
         cont->redo();
 }
 
-#define CODE2SIZE (ssize = ((1 << SIZECODE) + 3) >> 2)
-#define FM_MODE(x,y) ((y) & ~(((x)->rate & 0x80) >>1))
+#define FM_MODE(x, y) ((y) & ~(((x)->rate & 0x80) >> 1))
 #define CT(x) ((x) | 0xc0)
+
 static void setup_format_params(int track)
 {
         int n;
@@ -2197,8 +2160,8 @@ static void setup_format_params(int track)
         raw_cmd = &default_raw_cmd;
         raw_cmd->track = track;
 
-        raw_cmd->flags = FD_RAW_WRITE | FD_RAW_INTR | FD_RAW_SPIN |
-            FD_RAW_NEED_DISK | FD_RAW_NEED_SEEK;
+        raw_cmd->flags = (FD_RAW_WRITE | FD_RAW_INTR | FD_RAW_SPIN |
+                          FD_RAW_NEED_DISK | FD_RAW_NEED_SEEK);
         raw_cmd->rate = _floppy->rate & 0x43;
         raw_cmd->cmd_count = NR_F;
         COMMAND = FM_MODE(_floppy, FD_FORMAT);
@@ -2257,7 +2220,7 @@ static void redo_format(void)
         buffer_track = -1;
         setup_format_params(format_req.track << STRETCH(_floppy));
         floppy_start();
-        debugt("queue format request");
+        debugt(__func__, "queue format request");
 }
 
 static struct cont_t format_cont = {
@@ -2271,7 +2234,9 @@ static int do_format(int drive, struct format_descr *tmp_format_req)
 {
         int ret;
 
-        LOCK_FDC(drive, 1);
+        if (lock_fdc(drive, true))
+                return -EINTR;
+
         set_floppy(drive);
         if (!_floppy ||
             _floppy->track > DP->tracks ||
@@ -2286,7 +2251,9 @@ static int do_format(int drive, struct format_descr *tmp_format_req)
         format_errors = 0;
         cont = &format_cont;
         errors = &format_errors;
-        IWAIT(redo_format);
+        ret = wait_til_done(redo_format, true);
+        if (ret == -EINTR)
+                return -EINTR;
         process_fd_request();
         return ret;
 }
@@ -2320,12 +2287,14 @@ static void request_done(int uptodate)
         struct request *req = current_req;
         unsigned long flags;
         int block;
+        char msg[sizeof("request done ") + sizeof(int) * 3];
 
         probing = 0;
-        reschedule_timeout(MAXTIMEOUT, "request done %d", uptodate);
+        snprintf(msg, sizeof(msg), "request done %d", uptodate);
+        reschedule_timeout(MAXTIMEOUT, msg);
 
         if (!req) {
-                printk("floppy.c: no request in request_done\n");
+                pr_info("floppy.c: no request in request_done\n");
                 return;
         }
 
@@ -2377,7 +2346,7 @@ static void rw_interrupt(void)
                 DRS->first_read_date = jiffies;
 
         nr_sectors = 0;
-        CODE2SIZE;
+        ssize = DIV_ROUND_UP(1 << SIZECODE, 4);
 
         if (ST1 & ST1_EOC)
                 eoc = 1;
@@ -2393,20 +2362,18 @@ static void rw_interrupt(void)
                        R_HEAD - HEAD) * SECT_PER_TRACK +
                       R_SECTOR - SECTOR + eoc) << SIZECODE >> 2;
 
-#ifdef FLOPPY_SANITY_CHECK
         if (nr_sectors / ssize >
             DIV_ROUND_UP(in_sector_offset + current_count_sectors, ssize)) {
                 DPRINT("long rw: %x instead of %lx\n",
                        nr_sectors, current_count_sectors);
-                printk("rs=%d s=%d\n", R_SECTOR, SECTOR);
-                printk("rh=%d h=%d\n", R_HEAD, HEAD);
-                printk("rt=%d t=%d\n", R_TRACK, TRACK);
-                printk("heads=%d eoc=%d\n", heads, eoc);
-                printk("spt=%d st=%d ss=%d\n", SECT_PER_TRACK,
-                       fsector_t, ssize);
-                printk("in_sector_offset=%d\n", in_sector_offset);
+                pr_info("rs=%d s=%d\n", R_SECTOR, SECTOR);
+                pr_info("rh=%d h=%d\n", R_HEAD, HEAD);
+                pr_info("rt=%d t=%d\n", R_TRACK, TRACK);
+                pr_info("heads=%d eoc=%d\n", heads, eoc);
+                pr_info("spt=%d st=%d ss=%d\n",
+                        SECT_PER_TRACK, fsector_t, ssize);
+                pr_info("in_sector_offset=%d\n", in_sector_offset);
         }
-#endif
 
         nr_sectors -= in_sector_offset;
         INFBOUND(nr_sectors, 0);
@@ -2511,19 +2478,17 @@ static void copy_buffer(int ssize, int max_sector, int max_sector_2)
                                               blk_rq_sectors(current_req));
 
         remaining = current_count_sectors << 9;
-#ifdef FLOPPY_SANITY_CHECK
         if (remaining > blk_rq_bytes(current_req) && CT(COMMAND) == FD_WRITE) {
                 DPRINT("in copy buffer\n");
-                printk("current_count_sectors=%ld\n", current_count_sectors);
-                printk("remaining=%d\n", remaining >> 9);
-                printk("current_req->nr_sectors=%u\n",
-                       blk_rq_sectors(current_req));
-                printk("current_req->current_nr_sectors=%u\n",
-                       blk_rq_cur_sectors(current_req));
-                printk("max_sector=%d\n", max_sector);
-                printk("ssize=%d\n", ssize);
+                pr_info("current_count_sectors=%ld\n", current_count_sectors);
+                pr_info("remaining=%d\n", remaining >> 9);
+                pr_info("current_req->nr_sectors=%u\n",
+                        blk_rq_sectors(current_req));
+                pr_info("current_req->current_nr_sectors=%u\n",
+                        blk_rq_cur_sectors(current_req));
+                pr_info("max_sector=%d\n", max_sector);
+                pr_info("ssize=%d\n", ssize);
         }
-#endif
 
         buffer_max = max(max_sector, buffer_max);
 
@@ -2539,26 +2504,24 @@ static void copy_buffer(int ssize, int max_sector, int max_sector_2)
                 SUPBOUND(size, remaining);
 
                 buffer = page_address(bv->bv_page) + bv->bv_offset;
-#ifdef FLOPPY_SANITY_CHECK
                 if (dma_buffer + size >
                     floppy_track_buffer + (max_buffer_sectors << 10) ||
                     dma_buffer < floppy_track_buffer) {
                         DPRINT("buffer overrun in copy buffer %d\n",
-                               (int)((floppy_track_buffer -
-                                      dma_buffer) >> 9));
-                        printk("fsector_t=%d buffer_min=%d\n",
-                               fsector_t, buffer_min);
-                        printk("current_count_sectors=%ld\n",
-                               current_count_sectors);
+                               (int)((floppy_track_buffer - dma_buffer) >> 9));
+                        pr_info("fsector_t=%d buffer_min=%d\n",
+                                fsector_t, buffer_min);
+                        pr_info("current_count_sectors=%ld\n",
+                                current_count_sectors);
                         if (CT(COMMAND) == FD_READ)
-                                printk("read\n");
+                                pr_info("read\n");
                         if (CT(COMMAND) == FD_WRITE)
-                                printk("write\n");
+                                pr_info("write\n");
                         break;
                 }
                 if (((unsigned long)buffer) % 512)
                         DPRINT("%p buffer not aligned\n", buffer);
-#endif
+
                 if (CT(COMMAND) == FD_READ)
                         memcpy(buffer, dma_buffer, size);
                 else
@@ -2567,13 +2530,11 @@ static void copy_buffer(int ssize, int max_sector, int max_sector_2)
                 remaining -= size;
                 dma_buffer += size;
         }
-#ifdef FLOPPY_SANITY_CHECK
         if (remaining) {
                 if (remaining > 0)
                         max_sector -= remaining >> 9;
                 DPRINT("weirdness: remaining %d\n", remaining >> 9);
         }
-#endif
 }
 
 /* work around a bug in pseudo DMA
@@ -2593,15 +2554,14 @@ static void virtualdmabug_workaround(void)
 
                 hard_sectors = raw_cmd->length >> (7 + SIZECODE);
                 end_sector = SECTOR + hard_sectors - 1;
-#ifdef FLOPPY_SANITY_CHECK
                 if (end_sector > SECT_PER_TRACK) {
-                        printk("too many sectors %d > %d\n",
-                               end_sector, SECT_PER_TRACK);
+                        pr_info("too many sectors %d > %d\n",
+                                end_sector, SECT_PER_TRACK);
                         return;
                 }
-#endif
-                SECT_PER_TRACK = end_sector;    /* make sure SECT_PER_TRACK points
-                                                 * to end of transfer */
+                SECT_PER_TRACK = end_sector;
+                                        /* make sure SECT_PER_TRACK
+                                         * points to end of transfer */
         }
 }
 
@@ -2624,7 +2584,7 @@ static int make_raw_rw_request(void)
         int ssize;
 
         if (max_buffer_sectors == 0) {
-                printk("VFS: Block I/O scheduled on unopened device\n");
+                pr_info("VFS: Block I/O scheduled on unopened device\n");
                 return 0;
         }
 
@@ -2641,7 +2601,7 @@ static int make_raw_rw_request(void)
                 raw_cmd->flags |= FD_RAW_WRITE;
                 COMMAND = FM_MODE(_floppy, FD_WRITE);
         } else {
-                DPRINT("make_raw_rw_request: unknown command\n");
+                DPRINT("%s: unknown command\n", __func__);
                 return 0;
         }
 
@@ -2659,7 +2619,8 @@ static int make_raw_rw_request(void)
         HEAD = fsector_t / _floppy->sect;
 
         if (((_floppy->stretch & (FD_SWAPSIDES | FD_SECTBASEMASK)) ||
-             TESTF(FD_NEED_TWADDLE)) && fsector_t < _floppy->sect)
+             test_bit(FD_NEED_TWADDLE_BIT, &DRS->flags)) &&
+            fsector_t < _floppy->sect)
                 max_sector = _floppy->sect;
 
         /* 2M disks have phantom sectors on the first track */
@@ -2685,7 +2646,7 @@ static int make_raw_rw_request(void)
         raw_cmd->track = TRACK << STRETCH(_floppy);
         DR_SELECT = UNIT(current_drive) + PH_HEAD(_floppy, HEAD);
         GAP = _floppy->gap;
-        CODE2SIZE;
+        ssize = DIV_ROUND_UP(1 << SIZECODE, 4);
         SECT_PER_TRACK = _floppy->sect << 2 >> SIZECODE;
         SECTOR = ((fsector_t % _floppy->sect) << 2 >> SIZECODE) +
             FD_SECTBASE(_floppy);
@@ -2730,8 +2691,10 @@ static int make_raw_rw_request(void)
                 }
         } else if (in_sector_offset || blk_rq_sectors(current_req) < ssize) {
                 if (CT(COMMAND) == FD_WRITE) {
-                        if (fsector_t + blk_rq_sectors(current_req) > ssize &&
-                            fsector_t + blk_rq_sectors(current_req) < ssize + ssize)
+                        unsigned int sectors;
+
+                        sectors = fsector_t + blk_rq_sectors(current_req);
+                        if (sectors > ssize && sectors < ssize + ssize)
                                 max_size = ssize + ssize;
                         else
                                 max_size = ssize;
@@ -2752,12 +2715,10 @@ static int make_raw_rw_request(void)
                  * on a 64 bit machine!
                  */
                 max_size = buffer_chain_size();
-                dma_limit =
-                    (MAX_DMA_ADDRESS -
-                     ((unsigned long)current_req->buffer)) >> 9;
-                if ((unsigned long)max_size > dma_limit) {
+                dma_limit = (MAX_DMA_ADDRESS -
+                             ((unsigned long)current_req->buffer)) >> 9;
+                if ((unsigned long)max_size > dma_limit)
                         max_size = dma_limit;
-                }
                 /* 64 kb boundaries */
                 if (CROSS_64KB(current_req->buffer, max_size << 9))
                         max_size = (K_64 -
@@ -2773,16 +2734,16 @@ static int make_raw_rw_request(void)
                  */
                 if (!direct ||
                     (indirect * 2 > direct * 3 &&
-                     *errors < DP->max_errors.read_track && ((!probing
-                       || (DP->read_track & (1 << DRS->probed_format)))))) {
+                     *errors < DP->max_errors.read_track &&
+                     ((!probing ||
+                       (DP->read_track & (1 << DRS->probed_format)))))) {
                         max_size = blk_rq_sectors(current_req);
                 } else {
                         raw_cmd->kernel_data = current_req->buffer;
                         raw_cmd->length = current_count_sectors << 9;
                         if (raw_cmd->length == 0) {
-                                DPRINT
-                                    ("zero dma transfer attempted from make_raw_request\n");
-                                DPRINT("indirect=%d direct=%d fsector_t=%d",
+                                DPRINT("%s: zero dma transfer attempted\n", __func__);
+                                DPRINT("indirect=%d direct=%d fsector_t=%d\n",
                                        indirect, direct, fsector_t);
                                 return 0;
                         }
@@ -2802,25 +2763,22 @@ static int make_raw_rw_request(void)
             ((CT(COMMAND) == FD_READ ||
               (!in_sector_offset && blk_rq_sectors(current_req) >= ssize)) &&
              max_sector > 2 * max_buffer_sectors + buffer_min &&
-             max_size + fsector_t > 2 * max_buffer_sectors + buffer_min)
-            /* not enough space */
-            ) {
+             max_size + fsector_t > 2 * max_buffer_sectors + buffer_min)) {
+                /* not enough space */
                 buffer_track = -1;
                 buffer_drive = current_drive;
                 buffer_max = buffer_min = aligned_sector_t;
         }
         raw_cmd->kernel_data = floppy_track_buffer +
-            ((aligned_sector_t - buffer_min) << 9);
+                ((aligned_sector_t - buffer_min) << 9);
 
         if (CT(COMMAND) == FD_WRITE) {
                 /* copy write buffer to track buffer.
                  * if we get here, we know that the write
                  * is either aligned or the data already in the buffer
                  * (buffer will be overwritten) */
-#ifdef FLOPPY_SANITY_CHECK
                 if (in_sector_offset && buffer_track == -1)
                         DPRINT("internal error offset !=0 on write\n");
-#endif
                 buffer_track = raw_cmd->track;
                 buffer_drive = current_drive;
                 copy_buffer(ssize, max_sector,
@@ -2834,7 +2792,6 @@ static int make_raw_rw_request(void)
         raw_cmd->length = in_sector_offset + current_count_sectors;
         raw_cmd->length = ((raw_cmd->length - 1) | (ssize - 1)) + 1;
         raw_cmd->length <<= 9;
-#ifdef FLOPPY_SANITY_CHECK
         if ((raw_cmd->length < current_count_sectors << 9) ||
             (raw_cmd->kernel_data != current_req->buffer &&
              CT(COMMAND) == FD_WRITE &&
@@ -2845,19 +2802,19 @@ static int make_raw_rw_request(void)
                 DPRINT("fractionary current count b=%lx s=%lx\n",
                        raw_cmd->length, current_count_sectors);
                 if (raw_cmd->kernel_data != current_req->buffer)
-                        printk("addr=%d, length=%ld\n",
-                               (int)((raw_cmd->kernel_data -
-                                      floppy_track_buffer) >> 9),
-                               current_count_sectors);
-                printk("st=%d ast=%d mse=%d msi=%d\n",
-                       fsector_t, aligned_sector_t, max_sector, max_size);
-                printk("ssize=%x SIZECODE=%d\n", ssize, SIZECODE);
-                printk("command=%x SECTOR=%d HEAD=%d, TRACK=%d\n",
-                       COMMAND, SECTOR, HEAD, TRACK);
-                printk("buffer drive=%d\n", buffer_drive);
-                printk("buffer track=%d\n", buffer_track);
-                printk("buffer_min=%d\n", buffer_min);
-                printk("buffer_max=%d\n", buffer_max);
+                        pr_info("addr=%d, length=%ld\n",
+                                (int)((raw_cmd->kernel_data -
+                                       floppy_track_buffer) >> 9),
+                                current_count_sectors);
+                pr_info("st=%d ast=%d mse=%d msi=%d\n",
+                        fsector_t, aligned_sector_t, max_sector, max_size);
+                pr_info("ssize=%x SIZECODE=%d\n", ssize, SIZECODE);
+                pr_info("command=%x SECTOR=%d HEAD=%d, TRACK=%d\n",
+                        COMMAND, SECTOR, HEAD, TRACK);
+                pr_info("buffer drive=%d\n", buffer_drive);
+                pr_info("buffer track=%d\n", buffer_track);
+                pr_info("buffer_min=%d\n", buffer_min);
+                pr_info("buffer_max=%d\n", buffer_max);
                 return 0;
         }
 
@@ -2868,14 +2825,14 @@ static int make_raw_rw_request(void)
                     raw_cmd->kernel_data + raw_cmd->length >
                     floppy_track_buffer + (max_buffer_sectors << 10)) {
                         DPRINT("buffer overrun in schedule dma\n");
-                        printk("fsector_t=%d buffer_min=%d current_count=%ld\n",
-                               fsector_t, buffer_min, raw_cmd->length >> 9);
-                        printk("current_count_sectors=%ld\n",
-                               current_count_sectors);
+                        pr_info("fsector_t=%d buffer_min=%d current_count=%ld\n",
+                                fsector_t, buffer_min, raw_cmd->length >> 9);
+                        pr_info("current_count_sectors=%ld\n",
+                                current_count_sectors);
                         if (CT(COMMAND) == FD_READ)
-                                printk("read\n");
+                                pr_info("read\n");
                         if (CT(COMMAND) == FD_WRITE)
-                                printk("write\n");
+                                pr_info("write\n");
                         return 0;
                 }
         } else if (raw_cmd->length > blk_rq_bytes(current_req) ||
@@ -2884,14 +2841,13 @@ static int make_raw_rw_request(void)
                 return 0;
         } else if (raw_cmd->length < current_count_sectors << 9) {
                 DPRINT("more sectors than bytes\n");
-                printk("bytes=%ld\n", raw_cmd->length >> 9);
-                printk("sectors=%ld\n", current_count_sectors);
+                pr_info("bytes=%ld\n", raw_cmd->length >> 9);
+                pr_info("sectors=%ld\n", current_count_sectors);
         }
         if (raw_cmd->length == 0) {
                 DPRINT("zero dma transfer attempted from make_raw_request\n");
                 return 0;
         }
-#endif
 
         virtualdmabug_workaround();
         return 2;
@@ -2899,7 +2855,6 @@ static int make_raw_rw_request(void)
 
 static void redo_fd_request(void)
 {
-#define REPEAT {request_done(0); continue; }
         int drive;
         int tmp;
 
@@ -2907,63 +2862,63 @@ static void redo_fd_request(void)
         if (current_drive < N_DRIVE)
                 floppy_off(current_drive);
 
-        for (;;) {
-                if (!current_req) {
-                        struct request *req;
-
-                        spin_lock_irq(floppy_queue->queue_lock);
-                        req = blk_fetch_request(floppy_queue);
-                        spin_unlock_irq(floppy_queue->queue_lock);
-                        if (!req) {
-                                do_floppy = NULL;
-                                unlock_fdc();
-                                return;
-                        }
-                        current_req = req;
-                }
-                drive = (long)current_req->rq_disk->private_data;
-                set_fdc(drive);
-                reschedule_timeout(current_reqD, "redo fd request", 0);
+do_request:
+        if (!current_req) {
+                struct request *req;
 
-                set_floppy(drive);
-                raw_cmd = &default_raw_cmd;
-                raw_cmd->flags = 0;
-                if (start_motor(redo_fd_request))
+                spin_lock_irq(floppy_queue->queue_lock);
+                req = blk_fetch_request(floppy_queue);
+                spin_unlock_irq(floppy_queue->queue_lock);
+                if (!req) {
+                        do_floppy = NULL;
+                        unlock_fdc();
                         return;
-                disk_change(current_drive);
-                if (test_bit(current_drive, &fake_change) ||
-                    TESTF(FD_DISK_CHANGED)) {
-                        DPRINT("disk absent or changed during operation\n");
-                        REPEAT;
-                }
-                if (!_floppy) { /* Autodetection */
-                        if (!probing) {
-                                DRS->probed_format = 0;
-                                if (next_valid_format()) {
-                                        DPRINT("no autodetectable formats\n");
-                                        _floppy = NULL;
-                                        REPEAT;
-                                }
-                        }
-                        probing = 1;
-                        _floppy =
-                            floppy_type + DP->autodetect[DRS->probed_format];
-                } else
-                        probing = 0;
-                errors = &(current_req->errors);
-                tmp = make_raw_rw_request();
-                if (tmp < 2) {
-                        request_done(tmp);
-                        continue;
                 }
+                current_req = req;
+        }
+        drive = (long)current_req->rq_disk->private_data;
+        set_fdc(drive);
+        reschedule_timeout(current_reqD, "redo fd request");
 
-                if (TESTF(FD_NEED_TWADDLE))
-                        twaddle();
-                schedule_bh(floppy_start);
-                debugt("queue fd request");
+        set_floppy(drive);
+        raw_cmd = &default_raw_cmd;
+        raw_cmd->flags = 0;
+        if (start_motor(redo_fd_request))
                 return;
+
+        disk_change(current_drive);
+        if (test_bit(current_drive, &fake_change) ||
+            test_bit(FD_DISK_CHANGED_BIT, &DRS->flags)) {
+                DPRINT("disk absent or changed during operation\n");
+                request_done(0);
+                goto do_request;
+        }
+        if (!_floppy) { /* Autodetection */
+                if (!probing) {
+                        DRS->probed_format = 0;
+                        if (next_valid_format()) {
+                                DPRINT("no autodetectable formats\n");
+                                _floppy = NULL;
+                                request_done(0);
+                                goto do_request;
+                        }
+                }
+                probing = 1;
+                _floppy = floppy_type + DP->autodetect[DRS->probed_format];
+        } else
+                probing = 0;
+        errors = &(current_req->errors);
+        tmp = make_raw_rw_request();
+        if (tmp < 2) {
+                request_done(tmp);
+                goto do_request;
         }
-#undef REPEAT
+
+        if (test_bit(FD_NEED_TWADDLE_BIT, &DRS->flags))
+                twaddle();
+        schedule_bh(floppy_start);
+        debugt(__func__, "queue fd request");
+        return;
 }
 
 static struct cont_t rw_cont = {
@@ -2979,30 +2934,30 @@ static void process_fd_request(void)
         schedule_bh(redo_fd_request);
 }
 
-static void do_fd_request(struct request_queue * q)
+static void do_fd_request(struct request_queue *q)
 {
         if (max_buffer_sectors == 0) {
-                printk("VFS: do_fd_request called on non-open device\n");
+                pr_info("VFS: %s called on non-open device\n", __func__);
                 return;
         }
 
         if (usage_count == 0) {
-                printk("warning: usage count=0, current_req=%p exiting\n",
-                       current_req);
-                printk("sect=%ld type=%x flags=%x\n",
-                       (long)blk_rq_pos(current_req), current_req->cmd_type,
-                       current_req->cmd_flags);
+                pr_info("warning: usage count=0, current_req=%p exiting\n",
+                        current_req);
+                pr_info("sect=%ld type=%x flags=%x\n",
+                        (long)blk_rq_pos(current_req), current_req->cmd_type,
+                        current_req->cmd_flags);
                 return;
         }
         if (test_bit(0, &fdc_busy)) {
                 /* fdc busy, this new request will be treated when the
                    current one is done */
-                is_alive("do fd request, old request running");
+                is_alive(__func__, "old request running");
                 return;
         }
-        lock_fdc(MAXTIMEOUT, 0);
+        lock_fdc(MAXTIMEOUT, false);
         process_fd_request();
-        is_alive("do fd request");
+        is_alive(__func__, "");
 }
 
 static struct cont_t poll_cont = {
@@ -3012,24 +2967,18 @@ static struct cont_t poll_cont = {
         .done           = generic_done
 };
 
-static int poll_drive(int interruptible, int flag)
+static int poll_drive(bool interruptible, int flag)
 {
-        int ret;
-
         /* no auto-sense, just clear dcl */
         raw_cmd = &default_raw_cmd;
         raw_cmd->flags = flag;
         raw_cmd->track = 0;
         raw_cmd->cmd_count = 0;
         cont = &poll_cont;
-#ifdef DCL_DEBUG
-        if (DP->flags & FD_DEBUG) {
-                DPRINT("setting NEWCHANGE in poll_drive\n");
-        }
-#endif
-        SETF(FD_DISK_NEWCHANGE);
-        WAIT(floppy_ready);
-        return ret;
+        debug_dcl(DP->flags, "setting NEWCHANGE in poll_drive\n");
+        set_bit(FD_DISK_NEWCHANGE_BIT, &DRS->flags);
+
+        return wait_til_done(floppy_ready, interruptible);
 }
 
 /*
@@ -3039,7 +2988,7 @@ static int poll_drive(int interruptible, int flag)
 
 static void reset_intr(void)
 {
-        printk("weird, reset interrupt called\n");
+        pr_info("weird, reset interrupt called\n");
 }
 
 static struct cont_t reset_cont = {
@@ -3049,20 +2998,23 @@ static struct cont_t reset_cont = {
         .done           = generic_done
 };
 
-static int user_reset_fdc(int drive, int arg, int interruptible)
+static int user_reset_fdc(int drive, int arg, bool interruptible)
 {
         int ret;
 
-        ret = 0;
-        LOCK_FDC(drive, interruptible);
+        if (lock_fdc(drive, interruptible))
+                return -EINTR;
+
         if (arg == FD_RESET_ALWAYS)
                 FDCS->reset = 1;
         if (FDCS->reset) {
                 cont = &reset_cont;
-                WAIT(reset_fdc);
+                ret = wait_til_done(reset_fdc, interruptible);
+                if (ret == -EINTR)
+                        return -EINTR;
         }
         process_fd_request();
-        return ret;
+        return 0;
 }
 
 /*
@@ -3075,17 +3027,12 @@ static inline int fd_copyout(void __user *param, const void *address,
         return copy_to_user(param, address, size) ? -EFAULT : 0;
 }
 
-static inline int fd_copyin(void __user *param, void *address, unsigned long size)
+static inline int fd_copyin(void __user *param, void *address,
+                            unsigned long size)
 {
         return copy_from_user(address, param, size) ? -EFAULT : 0;
 }
 
-#define _COPYOUT(x) (copy_to_user((void __user *)param, &(x), sizeof(x)) ? -EFAULT : 0)
-#define _COPYIN(x) (copy_from_user(&(x), (void __user *)param, sizeof(x)) ? -EFAULT : 0)
-
-#define COPYOUT(x) ECALL(_COPYOUT(x))
-#define COPYIN(x) ECALL(_COPYIN(x))
-
 static inline const char *drive_name(int type, int drive)
 {
         struct floppy_struct *floppy;
@@ -3156,23 +3103,29 @@ static struct cont_t raw_cmd_cont = {
         .done           = raw_cmd_done
 };
 
-static inline int raw_cmd_copyout(int cmd, char __user *param,
+static inline int raw_cmd_copyout(int cmd, void __user *param,
                                   struct floppy_raw_cmd *ptr)
 {
         int ret;
 
         while (ptr) {
-                COPYOUT(*ptr);
+                ret = copy_to_user(param, ptr, sizeof(*ptr));
+                if (ret)
+                        return -EFAULT;
                 param += sizeof(struct floppy_raw_cmd);
                 if ((ptr->flags & FD_RAW_READ) && ptr->buffer_length) {
-                        if (ptr->length >= 0
-                            && ptr->length <= ptr->buffer_length)
-                                ECALL(fd_copyout
-                                      (ptr->data, ptr->kernel_data,
-                                       ptr->buffer_length - ptr->length));
+                        if (ptr->length >= 0 &&
+                            ptr->length <= ptr->buffer_length) {
+                                long length = ptr->buffer_length - ptr->length;
+                                ret = fd_copyout(ptr->data, ptr->kernel_data,
+                                                 length);
+                                if (ret)
+                                        return ret;
+                        }
                 }
                 ptr = ptr->next;
         }
+
         return 0;
 }
 
@@ -3195,7 +3148,7 @@ static void raw_cmd_free(struct floppy_raw_cmd **ptr)
         }
 }
 
-static inline int raw_cmd_copyin(int cmd, char __user *param,
+static inline int raw_cmd_copyin(int cmd, void __user *param,
                                  struct floppy_raw_cmd **rcmd)
 {
         struct floppy_raw_cmd *ptr;
@@ -3203,17 +3156,19 @@ static inline int raw_cmd_copyin(int cmd, char __user *param,
         int i;
 
         *rcmd = NULL;
-        while (1) {
-                ptr = (struct floppy_raw_cmd *)
-                    kmalloc(sizeof(struct floppy_raw_cmd), GFP_USER);
-                if (!ptr)
-                        return -ENOMEM;
-                *rcmd = ptr;
-                COPYIN(*ptr);
-                ptr->next = NULL;
-                ptr->buffer_length = 0;
-                param += sizeof(struct floppy_raw_cmd);
-                if (ptr->cmd_count > 33)
+
+loop:
+        ptr = kmalloc(sizeof(struct floppy_raw_cmd), GFP_USER);
+        if (!ptr)
+                return -ENOMEM;
+        *rcmd = ptr;
+        ret = copy_from_user(ptr, param, sizeof(*ptr));
+        if (ret)
+                return -EFAULT;
+        ptr->next = NULL;
+        ptr->buffer_length = 0;
+        param += sizeof(struct floppy_raw_cmd);
+        if (ptr->cmd_count > 33)
                         /* the command may now also take up the space
                          * initially intended for the reply & the
                          * reply count. Needed for long 82078 commands
@@ -3222,31 +3177,35 @@ static inline int raw_cmd_copyin(int cmd, char __user *param,
                          * 16 bytes for a structure, you'll one day
                          * discover that you really need 17...
                          */
+                return -EINVAL;
+
+        for (i = 0; i < 16; i++)
+                ptr->reply[i] = 0;
+        ptr->resultcode = 0;
+        ptr->kernel_data = NULL;
+
+        if (ptr->flags & (FD_RAW_READ | FD_RAW_WRITE)) {
+                if (ptr->length <= 0)
                         return -EINVAL;
+                ptr->kernel_data = (char *)fd_dma_mem_alloc(ptr->length);
+                fallback_on_nodma_alloc(&ptr->kernel_data, ptr->length);
+                if (!ptr->kernel_data)
+                        return -ENOMEM;
+                ptr->buffer_length = ptr->length;
+        }
+        if (ptr->flags & FD_RAW_WRITE) {
+                ret = fd_copyin(ptr->data, ptr->kernel_data, ptr->length);
+                if (ret)
+                        return ret;
+        }
 
-                for (i = 0; i < 16; i++)
-                        ptr->reply[i] = 0;
-                ptr->resultcode = 0;
-                ptr->kernel_data = NULL;
-
-                if (ptr->flags & (FD_RAW_READ | FD_RAW_WRITE)) {
-                        if (ptr->length <= 0)
-                                return -EINVAL;
-                        ptr->kernel_data =
-                            (char *)fd_dma_mem_alloc(ptr->length);
-                        fallback_on_nodma_alloc(&ptr->kernel_data, ptr->length);
-                        if (!ptr->kernel_data)
-                                return -ENOMEM;
-                        ptr->buffer_length = ptr->length;
-                }
-                if (ptr->flags & FD_RAW_WRITE)
-                        ECALL(fd_copyin(ptr->data, ptr->kernel_data,
-                                        ptr->length));
+        if (ptr->flags & FD_RAW_MORE) {
                 rcmd = &(ptr->next);
-                if (!(ptr->flags & FD_RAW_MORE))
-                        return 0;
                 ptr->rate &= 0x43;
+                goto loop;
         }
+
+        return 0;
 }
 
 static int raw_cmd_ioctl(int cmd, void __user *param)
@@ -3283,12 +3242,8 @@ static int raw_cmd_ioctl(int cmd, void __user *param)
 
         raw_cmd = my_raw_cmd;
         cont = &raw_cmd_cont;
-        ret = wait_til_done(floppy_start, 1);
-#ifdef DCL_DEBUG
-        if (DP->flags & FD_DEBUG) {
-                DPRINT("calling disk change from raw_cmd ioctl\n");
-        }
-#endif
+        ret = wait_til_done(floppy_start, true);
+        debug_dcl(DP->flags, "calling disk change from raw_cmd ioctl\n");
 
         if (ret != -EINTR && FDCS->reset)
                 ret = -EIO;
@@ -3327,7 +3282,7 @@ static inline int set_geometry(unsigned int cmd, struct floppy_struct *g,
                 if (!capable(CAP_SYS_ADMIN))
                         return -EPERM;
                 mutex_lock(&open_lock);
-                if (lock_fdc(drive, 1)) {
+                if (lock_fdc(drive, true)) {
                         mutex_unlock(&open_lock);
                         return -EINTR;
                 }
@@ -3346,11 +3301,15 @@ static inline int set_geometry(unsigned int cmd, struct floppy_struct *g,
                 mutex_unlock(&open_lock);
         } else {
                 int oldStretch;
-                LOCK_FDC(drive, 1);
-                if (cmd != FDDEFPRM)
+
+                if (lock_fdc(drive, true))
+                        return -EINTR;
+                if (cmd != FDDEFPRM) {
                         /* notice a disk change immediately, else
                          * we lose our settings immediately*/
-                        CALL(poll_drive(1, FD_RAW_NEED_DISK));
+                        if (poll_drive(true, FD_RAW_NEED_DISK) == -EINTR)
+                                return -EINTR;
+                }
                 oldStretch = g->stretch;
                 user_params[drive] = *g;
                 if (buffer_drive == drive)
@@ -3415,7 +3374,7 @@ static inline int normalize_ioctl(int *cmd, int *size)
                         *size = _IOC_SIZE(*cmd);
                         *cmd = ioctl_table[i];
                         if (*size > _IOC_SIZE(*cmd)) {
-                                printk("ioctl not yet supported\n");
+                                pr_info("ioctl not yet supported\n");
                                 return -EFAULT;
                         }
                         return 0;
@@ -3429,8 +3388,10 @@ static int get_floppy_geometry(int drive, int type, struct floppy_struct **g)
         if (type)
                 *g = &floppy_type[type];
         else {
-                LOCK_FDC(drive, 0);
-                CALL(poll_drive(0, 0));
+                if (lock_fdc(drive, false))
+                        return -EINTR;
+                if (poll_drive(false, 0) == -EINTR)
+                        return -EINTR;
                 process_fd_request();
                 *g = current_type[drive];
         }
@@ -3459,10 +3420,6 @@ static int fd_getgeo(struct block_device *bdev, struct hd_geometry *geo)
 static int fd_ioctl(struct block_device *bdev, fmode_t mode, unsigned int cmd,
                     unsigned long param)
 {
-#define FD_IOCTL_ALLOWED (mode & (FMODE_WRITE|FMODE_WRITE_IOCTL))
-#define OUT(c,x) case c: outparam = (const char *) (x); break
-#define IN(c,x,tag) case c: *(x) = inparam. tag ; return 0
-
         int drive = (long)bdev->bd_disk->private_data;
         int type = ITYPE(UDRS->fd_device);
         int i;
@@ -3474,26 +3431,28 @@ static int fd_ioctl(struct block_device *bdev, fmode_t mode, unsigned int cmd,
                 struct floppy_max_errors max_errors;
                 struct floppy_drive_params dp;
         } inparam;              /* parameters coming from user space */
-        const char *outparam;   /* parameters passed back to user space */
+        const void *outparam;   /* parameters passed back to user space */
 
         /* convert compatibility eject ioctls into floppy eject ioctl.
          * We do this in order to provide a means to eject floppy disks before
          * installing the new fdutils package */
         if (cmd == CDROMEJECT ||        /* CD-ROM eject */
-            cmd == 0x6470 /* SunOS floppy eject */ ) {
+            cmd == 0x6470) {            /* SunOS floppy eject */
                 DPRINT("obsolete eject ioctl\n");
                 DPRINT("please use floppycontrol --eject\n");
                 cmd = FDEJECT;
         }
 
-        /* convert the old style command into a new style command */
-        if ((cmd & 0xff00) == 0x0200) {
-                ECALL(normalize_ioctl(&cmd, &size));
-        } else
+        if (!((cmd & 0xff00) == 0x0200))
                 return -EINVAL;
 
+        /* convert the old style command into a new style command */
+        ret = normalize_ioctl(&cmd, &size);
+        if (ret)
+                return ret;
+
         /* permission checks */
-        if (((cmd & 0x40) && !FD_IOCTL_ALLOWED) ||
+        if (((cmd & 0x40) && !(mode & (FMODE_WRITE | FMODE_WRITE_IOCTL))) ||
             ((cmd & 0x80) && !capable(CAP_SYS_ADMIN)))
                 return -EPERM;
 
@@ -3501,129 +3460,142 @@ static int fd_ioctl(struct block_device *bdev, fmode_t mode, unsigned int cmd,
                 return -EINVAL;
 
         /* copyin */
-        CLEARSTRUCT(&inparam);
-        if (_IOC_DIR(cmd) & _IOC_WRITE)
-            ECALL(fd_copyin((void __user *)param, &inparam, size))
-
-                switch (cmd) {
-                case FDEJECT:
-                        if (UDRS->fd_ref != 1)
-                                /* somebody else has this drive open */
-                                return -EBUSY;
-                        LOCK_FDC(drive, 1);
-
-                        /* do the actual eject. Fails on
-                         * non-Sparc architectures */
-                        ret = fd_eject(UNIT(drive));
-
-                        USETF(FD_DISK_CHANGED);
-                        USETF(FD_VERIFY);
-                        process_fd_request();
+        memset(&inparam, 0, sizeof(inparam));
+        if (_IOC_DIR(cmd) & _IOC_WRITE) {
+                ret = fd_copyin((void __user *)param, &inparam, size);
+                if (ret)
                         return ret;
-                case FDCLRPRM:
-                        LOCK_FDC(drive, 1);
-                        current_type[drive] = NULL;
-                        floppy_sizes[drive] = MAX_DISK_SIZE << 1;
-                        UDRS->keep_data = 0;
-                        return invalidate_drive(bdev);
-                case FDSETPRM:
-                case FDDEFPRM:
-                        return set_geometry(cmd, &inparam.g,
-                                            drive, type, bdev);
-                case FDGETPRM:
-                        ECALL(get_floppy_geometry(drive, type,
-                                                  (struct floppy_struct **)
-                                                  &outparam));
-                        break;
-
-                case FDMSGON:
-                        UDP->flags |= FTD_MSG;
-                        return 0;
-                case FDMSGOFF:
-                        UDP->flags &= ~FTD_MSG;
-                        return 0;
-
-                case FDFMTBEG:
-                        LOCK_FDC(drive, 1);
-                        CALL(poll_drive(1, FD_RAW_NEED_DISK));
-                        ret = UDRS->flags;
-                        process_fd_request();
-                        if (ret & FD_VERIFY)
-                                return -ENODEV;
-                        if (!(ret & FD_DISK_WRITABLE))
-                                return -EROFS;
-                        return 0;
-                case FDFMTTRK:
-                        if (UDRS->fd_ref != 1)
-                                return -EBUSY;
-                        return do_format(drive, &inparam.f);
-                case FDFMTEND:
-                case FDFLUSH:
-                        LOCK_FDC(drive, 1);
-                        return invalidate_drive(bdev);
-
-                case FDSETEMSGTRESH:
-                        UDP->max_errors.reporting =
-                            (unsigned short)(param & 0x0f);
-                        return 0;
-                        OUT(FDGETMAXERRS, &UDP->max_errors);
-                        IN(FDSETMAXERRS, &UDP->max_errors, max_errors);
-
-                case FDGETDRVTYP:
-                        outparam = drive_name(type, drive);
-                        SUPBOUND(size, strlen(outparam) + 1);
-                        break;
-
-                        IN(FDSETDRVPRM, UDP, dp);
-                        OUT(FDGETDRVPRM, UDP);
-
-                case FDPOLLDRVSTAT:
-                        LOCK_FDC(drive, 1);
-                        CALL(poll_drive(1, FD_RAW_NEED_DISK));
-                        process_fd_request();
-                        /* fall through */
-                        OUT(FDGETDRVSTAT, UDRS);
-
-                case FDRESET:
-                        return user_reset_fdc(drive, (int)param, 1);
-
-                        OUT(FDGETFDCSTAT, UFDCS);
+        }
 
-                case FDWERRORCLR:
-                        CLEARSTRUCT(UDRWE);
-                        return 0;
-                        OUT(FDWERRORGET, UDRWE);
-
-                case FDRAWCMD:
-                        if (type)
-                                return -EINVAL;
-                        LOCK_FDC(drive, 1);
-                        set_floppy(drive);
-                        CALL(i = raw_cmd_ioctl(cmd, (void __user *)param));
-                        process_fd_request();
-                        return i;
+        switch (cmd) {
+        case FDEJECT:
+                if (UDRS->fd_ref != 1)
+                        /* somebody else has this drive open */
+                        return -EBUSY;
+                if (lock_fdc(drive, true))
+                        return -EINTR;
 
-                case FDTWADDLE:
-                        LOCK_FDC(drive, 1);
-                        twaddle();
-                        process_fd_request();
-                        return 0;
+                /* do the actual eject. Fails on
+                 * non-Sparc architectures */
+                ret = fd_eject(UNIT(drive));
 
-                default:
+                set_bit(FD_DISK_CHANGED_BIT, &UDRS->flags);
+                set_bit(FD_VERIFY_BIT, &UDRS->flags);
+                process_fd_request();
+                return ret;
+        case FDCLRPRM:
+                if (lock_fdc(drive, true))
+                        return -EINTR;
+                current_type[drive] = NULL;
+                floppy_sizes[drive] = MAX_DISK_SIZE << 1;
+                UDRS->keep_data = 0;
+                return invalidate_drive(bdev);
+        case FDSETPRM:
+        case FDDEFPRM:
+                return set_geometry(cmd, &inparam.g, drive, type, bdev);
+        case FDGETPRM:
+                ret = get_floppy_geometry(drive, type,
+                                          (struct floppy_struct **)&outparam);
+                if (ret)
+                        return ret;
+                break;
+        case FDMSGON:
+                UDP->flags |= FTD_MSG;
+                return 0;
+        case FDMSGOFF:
+                UDP->flags &= ~FTD_MSG;
+                return 0;
+        case FDFMTBEG:
+                if (lock_fdc(drive, true))
+                        return -EINTR;
+                if (poll_drive(true, FD_RAW_NEED_DISK) == -EINTR)
+                        return -EINTR;
+                ret = UDRS->flags;
+                process_fd_request();
+                if (ret & FD_VERIFY)
+                        return -ENODEV;
+                if (!(ret & FD_DISK_WRITABLE))
+                        return -EROFS;
+                return 0;
+        case FDFMTTRK:
+                if (UDRS->fd_ref != 1)
+                        return -EBUSY;
+                return do_format(drive, &inparam.f);
+        case FDFMTEND:
+        case FDFLUSH:
+                if (lock_fdc(drive, true))
+                        return -EINTR;
+                return invalidate_drive(bdev);
+        case FDSETEMSGTRESH:
+                UDP->max_errors.reporting = (unsigned short)(param & 0x0f);
+                return 0;
+        case FDGETMAXERRS:
+                outparam = &UDP->max_errors;
+                break;
+        case FDSETMAXERRS:
+                UDP->max_errors = inparam.max_errors;
+                break;
+        case FDGETDRVTYP:
+                outparam = drive_name(type, drive);
+                SUPBOUND(size, strlen((const char *)outparam) + 1);
+                break;
+        case FDSETDRVPRM:
+                *UDP = inparam.dp;
+                break;
+        case FDGETDRVPRM:
+                outparam = UDP;
+                break;
+        case FDPOLLDRVSTAT:
+                if (lock_fdc(drive, true))
+                        return -EINTR;
+                if (poll_drive(true, FD_RAW_NEED_DISK) == -EINTR)
+                        return -EINTR;
+                process_fd_request();
+                /* fall through */
+        case FDGETDRVSTAT:
+                outparam = UDRS;
+                break;
+        case FDRESET:
+                return user_reset_fdc(drive, (int)param, true);
+        case FDGETFDCSTAT:
+                outparam = UFDCS;
+                break;
+        case FDWERRORCLR:
+                memset(UDRWE, 0, sizeof(*UDRWE));
+                return 0;
+        case FDWERRORGET:
+                outparam = UDRWE;
+                break;
+        case FDRAWCMD:
+                if (type)
                         return -EINVAL;
-                }
+                if (lock_fdc(drive, true))
+                        return -EINTR;
+                set_floppy(drive);
+                i = raw_cmd_ioctl(cmd, (void __user *)param);
+                if (i == -EINTR)
+                        return -EINTR;
+                process_fd_request();
+                return i;
+        case FDTWADDLE:
+                if (lock_fdc(drive, true))
+                        return -EINTR;
+                twaddle();
+                process_fd_request();
+                return 0;
+        default:
+                return -EINVAL;
+        }
 
         if (_IOC_DIR(cmd) & _IOC_READ)
                 return fd_copyout((void __user *)param, outparam, size);
-        else
-                return 0;
-#undef OUT
-#undef IN
+
+        return 0;
 }
 
 static void __init config_types(void)
 {
-        int first = 1;
+        bool has_drive = false;
         int drive;
 
         /* read drive info out of physical CMOS */
@@ -3655,17 +3627,22 @@ static void __init config_types(void)
                         name = temparea;
                 }
                 if (name) {
-                        const char *prepend = ",";
-                        if (first) {
-                                prepend = KERN_INFO "Floppy drive(s):";
-                                first = 0;
+                        const char *prepend;
+                        if (!has_drive) {
+                                prepend = "";
+                                has_drive = true;
+                                pr_info("Floppy drive(s):");
+                        } else {
+                                prepend = ",";
                         }
-                        printk("%s fd%d is %s", prepend, drive, name);
+
+                        pr_cont("%s fd%d is %s", prepend, drive, name);
                 }
                 *UDP = *params;
         }
-        if (!first)
-                printk("\n");
+
+        if (has_drive)
+                pr_cont("\n");
 }
 
 static int floppy_release(struct gendisk *disk, fmode_t mode)
@@ -3705,8 +3682,8 @@ static int floppy_open(struct block_device *bdev, fmode_t mode)
                 goto out2;
 
         if (!UDRS->fd_ref && (UDP->flags & FD_BROKEN_DCL)) {
-                USETF(FD_DISK_CHANGED);
-                USETF(FD_VERIFY);
+                set_bit(FD_DISK_CHANGED_BIT, &UDRS->flags);
+                set_bit(FD_VERIFY_BIT, &UDRS->flags);
         }
 
         if (UDRS->fd_ref == -1 || (UDRS->fd_ref && (mode & FMODE_EXCL)))
@@ -3735,9 +3712,8 @@ static int floppy_open(struct block_device *bdev, fmode_t mode)
                         INFBOUND(try, 16);
                         tmp = (char *)fd_dma_mem_alloc(1024 * try);
                 }
-                if (!tmp && !floppy_track_buffer) {
+                if (!tmp && !floppy_track_buffer)
                         fallback_on_nodma_alloc(&tmp, 2048 * try);
-                }
                 if (!tmp && !floppy_track_buffer) {
                         DPRINT("Unable to allocate DMA memory\n");
                         goto out;
@@ -3767,11 +3743,12 @@ static int floppy_open(struct block_device *bdev, fmode_t mode)
                 if (mode & (FMODE_READ|FMODE_WRITE)) {
                         UDRS->last_checked = 0;
                         check_disk_change(bdev);
-                        if (UTESTF(FD_DISK_CHANGED))
+                        if (test_bit(FD_DISK_CHANGED_BIT, &UDRS->flags))
                                 goto out;
                 }
                 res = -EROFS;
-                if ((mode & FMODE_WRITE) && !(UTESTF(FD_DISK_WRITABLE)))
+                if ((mode & FMODE_WRITE) &&
+                    !test_bit(FD_DISK_WRITABLE_BIT, &UDRS->flags))
                         goto out;
         }
         mutex_unlock(&open_lock);
@@ -3795,17 +3772,18 @@ static int check_floppy_change(struct gendisk *disk)
 {
         int drive = (long)disk->private_data;
 
-        if (UTESTF(FD_DISK_CHANGED) || UTESTF(FD_VERIFY))
+        if (test_bit(FD_DISK_CHANGED_BIT, &UDRS->flags) ||
+            test_bit(FD_VERIFY_BIT, &UDRS->flags))
                 return 1;
 
         if (time_after(jiffies, UDRS->last_checked + UDP->checkfreq)) {
-                lock_fdc(drive, 0);
-                poll_drive(0, 0);
+                lock_fdc(drive, false);
+                poll_drive(false, 0);
                 process_fd_request();
         }
 
-        if (UTESTF(FD_DISK_CHANGED) ||
-            UTESTF(FD_VERIFY) ||
+        if (test_bit(FD_DISK_CHANGED_BIT, &UDRS->flags) ||
+            test_bit(FD_VERIFY_BIT, &UDRS->flags) ||
             test_bit(drive, &fake_change) ||
             (!ITYPE(UDRS->fd_device) && !current_type[drive]))
                 return 1;
@@ -3818,8 +3796,7 @@ static int check_floppy_change(struct gendisk *disk)
  * a disk in the drive, and whether that disk is writable.
  */
 
-static void floppy_rb0_complete(struct bio *bio,
-                               int err)
+static void floppy_rb0_complete(struct bio *bio, int err)
 {
         complete((struct completion *)bio->bi_private);
 }
@@ -3877,14 +3854,16 @@ static int floppy_revalidate(struct gendisk *disk)
         int cf;
         int res = 0;
 
-        if (UTESTF(FD_DISK_CHANGED) ||
-            UTESTF(FD_VERIFY) || test_bit(drive, &fake_change) || NO_GEOM) {
+        if (test_bit(FD_DISK_CHANGED_BIT, &UDRS->flags) ||
+            test_bit(FD_VERIFY_BIT, &UDRS->flags) ||
+            test_bit(drive, &fake_change) || NO_GEOM) {
                 if (usage_count == 0) {
-                        printk("VFS: revalidate called on non-open device.\n");
+                        pr_info("VFS: revalidate called on non-open device.\n");
                         return -EFAULT;
                 }
-                lock_fdc(drive, 0);
-                cf = UTESTF(FD_DISK_CHANGED) || UTESTF(FD_VERIFY);
+                lock_fdc(drive, false);
+                cf = (test_bit(FD_DISK_CHANGED_BIT, &UDRS->flags) ||
+                      test_bit(FD_VERIFY_BIT, &UDRS->flags));
                 if (!(cf || test_bit(drive, &fake_change) || NO_GEOM)) {
                         process_fd_request();   /*already done by another thread */
                         return 0;
@@ -3894,7 +3873,7 @@ static int floppy_revalidate(struct gendisk *disk)
                 if (buffer_drive == drive)
                         buffer_track = -1;
                 clear_bit(drive, &fake_change);
-                UCLEARF(FD_DISK_CHANGED);
+                clear_bit(FD_DISK_CHANGED_BIT, &UDRS->flags);
                 if (cf)
                         UDRS->generation++;
                 if (NO_GEOM) {
@@ -3902,7 +3881,7 @@ static int floppy_revalidate(struct gendisk *disk)
                         res = __floppy_read_block_0(opened_bdev[drive]);
                 } else {
                         if (cf)
-                                poll_drive(0, FD_RAW_NEED_DISK);
+                                poll_drive(false, FD_RAW_NEED_DISK);
                         process_fd_request();
                 }
         }
@@ -3934,21 +3913,21 @@ static char __init get_fdc_version(void)
         output_byte(FD_DUMPREGS);       /* 82072 and better know DUMPREGS */
         if (FDCS->reset)
                 return FDC_NONE;
-        if ((r = result()) <= 0x00)
+        r = result();
+        if (r <= 0x00)
                 return FDC_NONE;        /* No FDC present ??? */
         if ((r == 1) && (reply_buffer[0] == 0x80)) {
-                printk(KERN_INFO "FDC %d is an 8272A\n", fdc);
+                pr_info("FDC %d is an 8272A\n", fdc);
                 return FDC_8272A;       /* 8272a/765 don't know DUMPREGS */
         }
         if (r != 10) {
-                printk
-                    ("FDC %d init: DUMPREGS: unexpected return of %d bytes.\n",
-                     fdc, r);
+                pr_info("FDC %d init: DUMPREGS: unexpected return of %d bytes.\n",
+                        fdc, r);
                 return FDC_UNKNOWN;
         }
 
         if (!fdc_configure()) {
-                printk(KERN_INFO "FDC %d is an 82072\n", fdc);
+                pr_info("FDC %d is an 82072\n", fdc);
                 return FDC_82072;       /* 82072 doesn't know CONFIGURE */
         }
 
@@ -3956,52 +3935,50 @@ static char __init get_fdc_version(void)
         if (need_more_output() == MORE_OUTPUT) {
                 output_byte(0);
         } else {
-                printk(KERN_INFO "FDC %d is an 82072A\n", fdc);
+                pr_info("FDC %d is an 82072A\n", fdc);
                 return FDC_82072A;      /* 82072A as found on Sparcs. */
         }
 
         output_byte(FD_UNLOCK);
         r = result();
         if ((r == 1) && (reply_buffer[0] == 0x80)) {
-                printk(KERN_INFO "FDC %d is a pre-1991 82077\n", fdc);
-                return FDC_82077_ORIG;  /* Pre-1991 82077, doesn't know 
+                pr_info("FDC %d is a pre-1991 82077\n", fdc);
+                return FDC_82077_ORIG;  /* Pre-1991 82077, doesn't know
                                          * LOCK/UNLOCK */
         }
         if ((r != 1) || (reply_buffer[0] != 0x00)) {
-                printk("FDC %d init: UNLOCK: unexpected return of %d bytes.\n",
-                       fdc, r);
+                pr_info("FDC %d init: UNLOCK: unexpected return of %d bytes.\n",
+                        fdc, r);
                 return FDC_UNKNOWN;
         }
         output_byte(FD_PARTID);
         r = result();
         if (r != 1) {
-                printk("FDC %d init: PARTID: unexpected return of %d bytes.\n",
-                       fdc, r);
+                pr_info("FDC %d init: PARTID: unexpected return of %d bytes.\n",
+                        fdc, r);
                 return FDC_UNKNOWN;
         }
         if (reply_buffer[0] == 0x80) {
-                printk(KERN_INFO "FDC %d is a post-1991 82077\n", fdc);
+                pr_info("FDC %d is a post-1991 82077\n", fdc);
                 return FDC_82077;       /* Revised 82077AA passes all the tests */
         }
         switch (reply_buffer[0] >> 5) {
         case 0x0:
                 /* Either a 82078-1 or a 82078SL running at 5Volt */
-                printk(KERN_INFO "FDC %d is an 82078.\n", fdc);
+                pr_info("FDC %d is an 82078.\n", fdc);
                 return FDC_82078;
         case 0x1:
-                printk(KERN_INFO "FDC %d is a 44pin 82078\n", fdc);
+                pr_info("FDC %d is a 44pin 82078\n", fdc);
                 return FDC_82078;
         case 0x2:
-                printk(KERN_INFO "FDC %d is a S82078B\n", fdc);
+                pr_info("FDC %d is a S82078B\n", fdc);
                 return FDC_S82078B;
         case 0x3:
-                printk(KERN_INFO "FDC %d is a National Semiconductor PC87306\n",
-                       fdc);
+                pr_info("FDC %d is a National Semiconductor PC87306\n", fdc);
                 return FDC_87306;
         default:
-                printk(KERN_INFO
-                       "FDC %d init: 82078 variant with unknown PARTID=%d.\n",
-                       fdc, reply_buffer[0] >> 5);
+                pr_info("FDC %d init: 82078 variant with unknown PARTID=%d.\n",
+                        fdc, reply_buffer[0] >> 5);
                 return FDC_82078_UNKN;
         }
 }                               /* get_fdc_version */
@@ -4113,9 +4090,9 @@ static int __init floppy_setup(char *str)
                                 else
                                         param = config_params[i].def_param;
                                 if (config_params[i].fn)
-                                        config_params[i].
-                                            fn(ints, param,
-                                               config_params[i].param2);
+                                        config_params[i].fn(ints, param,
+                                                            config_params[i].
+                                                            param2);
                                 if (config_params[i].var) {
                                         DPRINT("%s=%d\n", str, param);
                                         *config_params[i].var = param;
@@ -4129,8 +4106,8 @@ static int __init floppy_setup(char *str)
 
                 DPRINT("allowed options are:");
                 for (i = 0; i < ARRAY_SIZE(config_params); i++)
-                        printk(" %s", config_params[i].name);
-                printk("\n");
+                        pr_cont(" %s", config_params[i].name);
+                pr_cont("\n");
         } else
                 DPRINT("botched floppy option\n");
         DPRINT("Read Documentation/blockdev/floppy.txt\n");
@@ -4148,7 +4125,8 @@ static ssize_t floppy_cmos_show(struct device *dev,
         drive = p->id;
         return sprintf(buf, "%X\n", UDP->cmos);
 }
-DEVICE_ATTR(cmos,S_IRUGO,floppy_cmos_show,NULL);
+
+DEVICE_ATTR(cmos, S_IRUGO, floppy_cmos_show, NULL);
 
 static void floppy_device_release(struct device *dev)
 {
@@ -4160,7 +4138,7 @@ static int floppy_resume(struct device *dev)
 
         for (fdc = 0; fdc < N_FDC; fdc++)
                 if (FDCS->address != -1)
-                        user_reset_fdc(-1, FD_RESET_ALWAYS, 0);
+                        user_reset_fdc(-1, FD_RESET_ALWAYS, false);
 
         return 0;
 }
@@ -4172,8 +4150,8 @@ static const struct dev_pm_ops floppy_pm_ops = {
 
 static struct platform_driver floppy_driver = {
         .driver = {
-                .name = "floppy",
-                .pm = &floppy_pm_ops,
+                   .name = "floppy",
+                   .pm = &floppy_pm_ops,
         },
 };
 
@@ -4245,16 +4223,16 @@ static int __init floppy_init(void)
                 else
                         floppy_sizes[i] = MAX_DISK_SIZE << 1;
 
-        reschedule_timeout(MAXTIMEOUT, "floppy init", MAXTIMEOUT);
+        reschedule_timeout(MAXTIMEOUT, "floppy init");
         config_types();
 
         for (i = 0; i < N_FDC; i++) {
                 fdc = i;
-                CLEARSTRUCT(FDCS);
+                memset(FDCS, 0, sizeof(*FDCS));
                 FDCS->dtr = -1;
                 FDCS->dor = 0x4;
 #if defined(__sparc__) || defined(__mc68000__)
-                /*sparcs/sun3x don't have a DOR reset which we can fall back on to */
+        /*sparcs/sun3x don't have a DOR reset which we can fall back on to */
 #ifdef __mc68000__
                 if (MACH_IS_SUN3X)
 #endif
@@ -4283,11 +4261,11 @@ static int __init floppy_init(void)
 
         /* initialise drive state */
         for (drive = 0; drive < N_DRIVE; drive++) {
-                CLEARSTRUCT(UDRS);
-                CLEARSTRUCT(UDRWE);
-                USETF(FD_DISK_NEWCHANGE);
-                USETF(FD_DISK_CHANGED);
-                USETF(FD_VERIFY);
+                memset(UDRS, 0, sizeof(*UDRS));
+                memset(UDRWE, 0, sizeof(*UDRWE));
+                set_bit(FD_DISK_NEWCHANGE_BIT, &UDRS->flags);
+                set_bit(FD_DISK_CHANGED_BIT, &UDRS->flags);
+                set_bit(FD_VERIFY_BIT, &UDRS->flags);
                 UDRS->fd_device = -1;
                 floppy_track_buffer = NULL;
                 max_buffer_sectors = 0;
@@ -4307,7 +4285,7 @@ static int __init floppy_init(void)
                 if (FDCS->address == -1)
                         continue;
                 FDCS->rawcmd = 2;
-                if (user_reset_fdc(-1, FD_RESET_ALWAYS, 0)) {
+                if (user_reset_fdc(-1, FD_RESET_ALWAYS, false)) {
                         /* free ioports reserved by floppy_grab_irq_and_dma() */
                         floppy_release_regions(fdc);
                         FDCS->address = -1;
@@ -4330,12 +4308,12 @@ static int __init floppy_init(void)
                  * properly, so force a reset for the standard FDC clones,
                  * to avoid interrupt garbage.
                  */
-                user_reset_fdc(-1, FD_RESET_ALWAYS, 0);
+                user_reset_fdc(-1, FD_RESET_ALWAYS, false);
         }
         fdc = 0;
         del_timer(&fd_timeout);
         current_drive = 0;
-        initialising = 0;
+        initialized = true;
         if (have_no_fdc) {
                 DPRINT("no floppy controllers found\n");
                 err = have_no_fdc;
@@ -4356,7 +4334,8 @@ static int __init floppy_init(void)
                 if (err)
                         goto out_flush_work;
 
-                err = device_create_file(&floppy_device[drive].dev,&dev_attr_cmos);
+                err = device_create_file(&floppy_device[drive].dev,
+                                         &dev_attr_cmos);
                 if (err)
                         goto out_unreg_platform_dev;
 
@@ -4420,8 +4399,10 @@ static int floppy_request_regions(int fdc)
         const struct io_region *p;
 
         for (p = io_regions; p < ARRAY_END(io_regions); p++) {
-                if (!request_region(FDCS->address + p->offset, p->size, "floppy")) {
-                        DPRINT("Floppy io-port 0x%04lx in use\n", FDCS->address + p->offset);
+                if (!request_region(FDCS->address + p->offset,
+                                    p->size, "floppy")) {
+                        DPRINT("Floppy io-port 0x%04lx in use\n",
+                               FDCS->address + p->offset);
                         floppy_release_allocated_regions(fdc, p);
                         return -EBUSY;
                 }
@@ -4512,11 +4493,9 @@ cleanup:
 static void floppy_release_irq_and_dma(void)
 {
         int old_fdc;
-#ifdef FLOPPY_SANITY_CHECK
 #ifndef __sparc__
         int drive;
 #endif
-#endif
         long tmpsize;
         unsigned long tmpaddr;
         unsigned long flags;
@@ -4547,20 +4526,18 @@ static void floppy_release_irq_and_dma(void)
                 buffer_min = buffer_max = -1;
                 fd_dma_mem_free(tmpaddr, tmpsize);
         }
-#ifdef FLOPPY_SANITY_CHECK
 #ifndef __sparc__
         for (drive = 0; drive < N_FDC * 4; drive++)
                 if (timer_pending(motor_off_timer + drive))
-                        printk("motor off timer %d still active\n", drive);
+                        pr_info("motor off timer %d still active\n", drive);
 #endif
 
         if (timer_pending(&fd_timeout))
-                printk("floppy timer still active:%s\n", timeout_message);
+                pr_info("floppy timer still active:%s\n", timeout_message);
         if (timer_pending(&fd_timer))
-                printk("auxiliary floppy timer still active\n");
+                pr_info("auxiliary floppy timer still active\n");
         if (work_pending(&floppy_work))
-                printk("work still pending\n");
-#endif
+                pr_info("work still pending\n");
         old_fdc = fdc;
         for (fdc = 0; fdc < N_FDC; fdc++)
                 if (FDCS->address != -1)
@@ -4577,7 +4554,9 @@ static void __init parse_floppy_cfg_string(char *cfg)
         char *ptr;
 
         while (*cfg) {
-                for (ptr = cfg; *cfg && *cfg != ' ' && *cfg != '\t'; cfg++) ;
+                ptr = cfg;
+                while (*cfg && *cfg != ' ' && *cfg != '\t')
+                        cfg++;
                 if (*cfg) {
                         *cfg = '\0';
                         cfg++;
@@ -4625,6 +4604,7 @@ static void __exit floppy_module_exit(void)
         /* eject disk, if any */
         fd_eject(0);
 }
+
 module_exit(floppy_module_exit);
 
 module_param(floppy, charp, 0);
@@ -4636,9 +4616,10 @@ MODULE_LICENSE("GPL");
 
 /* This doesn't actually get used other than for module information */
 static const struct pnp_device_id floppy_pnpids[] = {
-        { "PNP0700", 0 },
-        { }
+        {"PNP0700", 0},
+        {}
 };
+
 MODULE_DEVICE_TABLE(pnp, floppy_pnpids);
 
 #else
diff --git a/drivers/char/ChangeLog b/drivers/char/ChangeLog
deleted file mode 100644
index 56b8a2e76ab1..000000000000
--- a/drivers/char/ChangeLog
+++ /dev/null
@@ -1,775 +0,0 @@
-2001-08-11  Tim Waugh  <twaugh@redhat.com>
-
-        * serial.c (get_pci_port): Deal with awkward Titan cards.
-
-1998-08-26  Theodore Ts'o  <tytso@rsts-11.mit.edu>
-
-        * serial.c (rs_open): Correctly decrement the module in-use count
-                on errors.
-
-Thu Feb 19 14:24:08 1998  Theodore Ts'o  <tytso@rsts-11.mit.edu>
-
-        * tty_io.c (tty_name): Remove the non-reentrant (and non-SMP safe)
-                version of tty_name, and rename the reentrant _tty_name
-                function to be tty_name.
-                (tty_open): Add a warning message stating callout devices
-                are deprecated.
-
-Mon Dec  1 08:24:15 1997  Theodore Ts'o  <tytso@rsts-11.mit.edu>
-
-        * tty_io.c (tty_get_baud_rate): Print a warning syslog if the
-                tty->alt_speed kludge is used; this means the system is
-                using the deprecated SPD_HI ioctls.
-
-Mon Nov 24 10:37:49 1997  Theodore Ts'o  <tytso@rsts-11.mit.edu>
-
-        * serial.c, esp.c, rocket.c: Change drivers to take advantage of
-                tty_get_baud_rate().
-        
-        * tty_io.c (tty_get_baud_rate): New function which computes the
-                correct baud rate for the tty.  More factoring out of
-                common code out of the serial driver to the high-level tty
-                functions....
-
-Sat Nov 22 07:53:36 1997  Theodore Ts'o  <tytso@rsts-11.mit.edu>
-
-        * serial.c, esp.c, rocket.c: Add tty->driver.break() routine, and
-                allow high-level tty code to handle the break and soft
-                carrier ioctls.
-        
-        * tty_ioctl.c (n_tty_ioctl): Support TIOCGSOFTCAR and
-                TIOCSSOFTCAR, so that device drivers don't have to support
-                it.
-
-        * serial.c (autoconfig): Change 16750 test to hopefully eliminate
-                false results by people with strange 16550As being
-                detected as 16750s.  Hopefully 16750s will still be
-                detected as 16750, and other weird UARTs won't get poorly
-                autodetected.  If this doesn't work, I'll have to disable
-                the auto identification for the 16750.
-
-        * tty_io.c (tty_hangup): Now actually do the tty hangup
-                processing during the timer processing, and disable
-                interrupts while doing the hangup processing.  This avoids
-                several nasty race conditions which happened when the
-                hangup processing was done asynchronously.
-                (tty_ioctl): Do break handling in the tty driver if
-                driver's break function is supported.  
-                (tty_flip_buffer_push): New exported function which should
-                be used by drivers to push characters in the flip buffer
-                to the tty handler.  This may either be done using a task
-                queue function for better CPU efficiency, or directly for
-                low latency operation.
-
-        * serial.c (rs_set_termios): Fix bug rs_set_termios when
-                transitioning away from B0, submitted by Stanislav
-                Voronyi. 
-
-Thu Jun 19 20:05:58 1997  Theodore Ts'o  <tytso@rsts-11.mit.edu>
-
-        * serial.c (begin_break, end_break, rs_ioctl): Applied patch
-                to support BSD ioctls to set and clear the break
-                condition explicitly.
-
-        * console.c (scrup, scrdown, insert_line, delete_line): Applied
-                fix suggested by Aaron Tiensivu to speed up block scrolls
-                up and down.
-
-        * n_tty.c (opost_block, write_chan): Added a modified "fast
-                console" patch which processes a block of text via
-                "cooking" efficiently.
-
-Wed Jun 18 15:25:50 1997  Theodore Ts'o  <tytso@rsts-11.mit.edu>
-
-        * tty_io.c (init_dev, release_dev): Applied fix suggested by Bill
-                Hawes to prevent race conditions in the tty code.
-
-        * n_tty.c (n_tty_chars_in_buffer): Applied fix suggested by Bill
-                Hawes so that n_tty_chars_in_buffer returns the correct
-                value in the case when the tty is in cannonical mode.  (To
-                avoid a pty deadlock with telnetd.)
-
-Thu Feb 27 01:53:08 1997  Theodore Ts'o  <tytso@rsts-11.mit.edu>
-
-        * serial.c (change_speed): Add support for the termios flag
-                CMSPAR, which allows the user to select stick parity.
-                (i.e, if PARODD is set, the parity bit is always 1; if
-                PARRODD is not set, then the parity bit is always 0).
-
-Wed Feb 26 19:03:10 1997  Theodore Ts'o  <tytso@rsts-11.mit.edu>
-
-        * serial.c (cleanup_module): Fix memory leak when using the serial
-                driver as a module; make sure tmp_buf gets freed!
-
-Tue Feb 25 11:01:59 1997  Theodore Ts'o  <tytso@rsts-11.mit.edu>
-
-        * serial.c (set_modem_info): Add support for setting and clearing
-                the OUT1 and OUT2 bits.  (For special case UART's, usually
-                for half-duplex.)
-                (autoconfig, change_speed): Fix TI 16750 support.
-
-Sun Feb 16 00:14:43 1997  Theodore Ts'o  <tytso@rsts-11.mit.edu>
-
-        * tty_io.c (release_dev): Add sanity check to make sure there are
-                no waiters on tty->read_wait or tty->write_wait.
-
-        * serial.c (rs_init): Don't autoconfig a device if the I/O region
-                is already reserved.
-
-        * serial.c (serial_proc_info): Add support for /proc/serial.
-
-Thu Feb 13 00:49:10 1997  Theodore Ts'o  <tytso@rsts-11.mit.edu>
-
-        * serial.c (receive_chars): When the UART repotrs an overrun
-                condition, it does so with a valid character.  Changed to
-                not throw away the valid character, but instead report the
-                overrun after the valid character.
-
-        * serial.c: Added new #ifdef's for some of the advanced serial
-                driver features.  A minimal driver that only supports COM
-                1/2/3/4 without sharing serial interrupts only takes 17k;
-                the full driver takes 32k.
-                
-Wed Feb 12 14:50:44 1997  Theodore Ts'o  <tytso@rsts-11.mit.edu>
-
-        * vt.c:
-        * pty.c: 
-        * tty_ioctl.c: 
-        * serial.c: Update routines to use the new 2.1 memory access
-                routines.
-
-Wed Dec  4 07:51:52 1996  Theodore Ts'o  <tytso@localhost.mit.edu>
-
-        * serial.c (change_speed): Use save_flags(); cli() and
-                restore_flags() in order to ensure we don't accidentally
-                turn on interrupts when starting up the port.
-                (startup): Move the insertion of serial structure into the
-                IRQ chain earlier into the startup processing.  Interrupts
-                should be off this whole time, but we eventually will want
-                to reduce this window.
-
-Thu Nov 21 10:05:22 1996  Theodore Ts'o  <tytso@localhost.mit.edu>
-
-        * tty_ioctl.c (tty_wait_until_sent): Always check the driver
-                wait_until_ready routine, even if there are no characters
-                in the xmit buffer.  (There may be charactes in the device
-                FIFO.)
-                (n_tty_ioctl): Add new flag tty->flow_stopped which
-                indicates whether the tty is stopped due to a request by
-                the TCXONC ioctl (used by tcflow).  If so, don't let an
-                incoming XOFF character restart the tty.  The tty can only
-                be restarted by another TCXONC request.
-
-        * tty_io.c (start_tty): Don't allow the tty to be restarted if
-                tty->flow_stopped is true.
-
-        * n_tty.c (n_tty_receive_char): If tty->flow_stopped is true, and
-                IXANY is set, don't eat a character trying to restart the
-                tty.
-
-        * serial.c (startup): Remove need for MCR_noint from the
-                async_struct structure.  Only turn on DTR and RTS if the
-                baud rate is not zero.
-                (change_speed): More accurately calculate the timeout
-                value based on the word size.  Move responsibility of
-                hangup when speed becomes B0 to rs_set_termios()
-                (set_serial_info): When changing the UART type set the
-                current xmit_fifo_size as well as the permanent
-                xmit_fifo_size.
-                (rs_ioctl): Fix TCSBRK (used by tcdrain) and TCSBRKP
-                ioctls to return EINTR if interrupted by a signal.
-                (rs_set_termios): If the baud rate changes to or from B0,
-                this function is now responsible for setting or clearing
-                DTR and RTS.  DTR and RTS are only be changed on the
-                transition to or from the B0 state.
-                (rs_close): Wait for the characters to drain based on
-                info->timeout.  At low baud rates (50 bps), it may take a
-                long time for the FIFO to completely drain out!
-                (rs_wait_until_sent): Fixed timeout handling.  Now
-                releases control to the scheduler, but checks frequently
-                enough so that the function is sensitive enough to pass
-                the timing requirements of the NIST-PCTS.
-                (block_til_ready): When opening the device, don't turn on
-                DTR and RTS if the baud rate is B0.
-
-Thu Nov 14 00:06:09 1996  Theodore Ts'o  <tytso@rsts-11.mit.edu>
-
-        * serial.c (autoconfig): Fix autoconfiguration problems;
-                info->flags wasn't getting initialized from the state
-                structure.  Put in more paranoid test for the 16750.
-
-Fri Nov  8 20:19:50 1996  Theodore Ts'o  <tytso@rsts-11.mit.edu>
-
-        * n_tty.c (n_tty_flush_buffer): Only call driver->unthrottle() if
-                the tty was previous throttled.
-                (n_tty_set_termios, write_chan): Add changes suggested by
-                        Simon P. Allen to allow hardware cooking.
-
-        * tty_ioctl.c (set_termios): If we get a signal while waiting for
-                the tty to drain, return -EINTR.
-        
-        * serial.c (change_speed): Add support for CREAD, as required by
-                POSIX.
-
-Sat Nov  2 20:43:10 1996  Theodore Ts'o  <tytso@rsts-11.mit.edu>
-
-        * serial.c: Wholesale changes.  Added support for the Startech
-                16650 and 16650V2 chips.  (WARNING: the new startech
-                16650A may or may not work!)  Added support for the
-                TI16750 (not yet tested).  Split async_struct into a
-                transient part (async_struct) and a permanent part
-                (serial_state) which contains the configuration
-                information for the ports.  Added new driver routines
-                wait_until_sent() and send_xchar() to help with POSIX
-                compliance.  Added support for radio clocks which waggle
-                the carrier detect line (CONFIG_HARD_PPS).
-        
-        * tty_ioctl.c (tty_wait_until_sent): Added call to new driver
-                function tty->driver.wait_until_sent(), which returns when
-                the tty's device xmit buffers are drained.  Needed for
-                full POSIX compliance.
-
-                (send_prio_char): New function, called by the ioctl's
-                TCIOFF and TCION; uses the new driver call send_xchar(),
-                which will send the XON or XOFF character at high priority
-                (and even if tty output is stopped).
-
-Wed Jun  5 18:52:04 1996  Theodore Ts'o  <tytso@rsts-11.mit.edu>
-
-        * pty.c (pty_close): When closing a pty, make sure packet mode is
-                cleared.
-
-Sun May 26 09:33:52 1996  Theodore Ts'o  <tytso@rsts-11.mit.edu>
-
-        * vesa_blank.c (set_vesa_blanking): Add missing verify_area() call.
-
-        * selection.c (set_selection): Add missing verify_area() call.
-
-        * tty_io.c (tty_ioctl): Add missing verify_area() calls.
-
-        * serial.c (rs_ioctl): Add missing verify_area() calls.
-                (rs_init): Allow initialization of serial driver
-                configuration from a module.
-
-        * random.c (extract_entropy): Add missing verify_area call.
-                Don't limit number of characters returned to
-                32,768. Extract entropy is now no longer a inlined
-                function.
-
-                (random_read): Check return value in case extract_entropy
-                returns an error.
-
-                (secure_tcp_sequence_number): New function which returns a
-                secure TCP sequence number.  This is needed to prevent some
-                nasty TCP hijacking attacks.
-        
-                (init_std_data): Initialize using gettimeofday() instead of
-                struct timeval xtime.
-
-                (fast_add_entropy_word, add_entropy_word): Rename the
-                inline function add_entropy_word() to
-                fast_add_entropy_word().  Make add_entropy_word() be the
-                non-inlined function which is used in non-timing critical
-                places, in order to save space.
-
-                (initialize_benchmark, begin_benchmark, end_benchmark): New
-                functions defined when RANDOM_BENCHMARK is defined.  They
-                allow us to benchmark the speed of the
-                add_timer_randomness() call.
-
-                (int_ln, rotate_left): Add two new inline functions with
-                i386 optimized asm instructions.  This speeds up the
-                critical add_entropy_word() and add_timer_randomness()
-                functions, which are called from interrupt handlers.
-
-Tue May  7 22:51:11 1996    <tytso@rsts-11.mit.edu>
-
-        * random.c (add_timer_randomness): Limit the amount randomness
-                that we estimate to 12 bits.  (An arbitrary amount).
-
-                (extract_entropy): To make it harder to analyze the hash
-                function, fold the hash function in half using XOR, and
-                use the folded result as the value to emit to the user.
-                Also, add timer randomness each pass through the
-                exact_entropy call, to increase the amount of unknown
-                values during the extraction process.
-
-                (random_ioctl): Use IOR/IOW definitions to define the
-                ioctl values used by the /dev/random driver.  Allow the
-                old ioctl values to be used for backwards compatibility
-                (for a limited amount of time).
-
-Wed Apr 24 14:02:04 1996  Theodore Ts'o  <tytso@rsts-11.mit.edu>
-
-        * random.c (add_timer_randomness): Use 2nd derivative as well to
-                better estimate entropy.
-
-                (rand_initialize): Explicitly initialize all the pointers
-                to NULL.  (Clearing pointers using memset isn't portable.)
-                Initialize the random pool with OS-dependent data.
-
-                (random_write): Add sanity checking to the arguments to
-                random_write(), so that bad arguments won't cause a kernel
-                SEGV. 
-
-                (random_read): Update the access time of the device inode
-                when you return data to the user.
-
-                (random_ioctl): Wake up the random_wait channel when there
-                are only WAIT_INPUT_BITS available.  Add more paranoia
-                checks to make sure entropy_count doesn't go beyond the
-                bounds of (0, POOLSIZE).  Add a few missing verify_area
-                checks.  Add support for the RNDCLEARPOOL ioctl, which
-                zaps the random pool.
-
-                (add_timer_randomness): Wake up the random_wait
-                channel only when there are WAIT_INPUT_BITS available.
-
-                (random_select): Allow a random refresh daemon process to
-                select on /dev/random for writing; wake up the daemon when
-                there are less than WAIT_OUTPUT_BITS bits of randomness
-                available.
-
-Tue Apr 23 22:56:07 1996    <tytso@rsts-11.mit.edu>
-
-        * tty_io.c (init_dev): Change return code when user attempts to
-                open master pty which is already open from EAGAIN to EIO,
-                to match with BSD expectations.  EIO is more correct
-                anyway, since EAGAIN implies that retrying will be
-                successful --- which it might be.... Eventually!!
-
-        * pty.c (pty_open, pty_close): Fix wait loop so that we don't
-                busy loop while waiting for the master side to open.
-                Fix tty opening/closing logic.  TTY_SLAVE_CLOSED was
-                renamed to TTY_OTHER_CLOSED, so that the name is more
-                descriptive.  Also fixed code so that the tty flag
-                actually works correctly now....
-
-Mon Apr  1 10:22:01 1996    <tytso@rsts-11.mit.edu>
-
-        * serial.c (rs_close): Cleaned up modularization changes.
-                Remove code which forced line discipline back to N_TTY
-                this is done in the tty upper layers, and there's no
-                reason to do it here.  (Making this change also
-                removed the requirement that the serial module access
-                the internal kernel symbol "ldiscs".)
-
-        * tty_io.c (tty_init): Formally register a tty_driver entry for
-                /dev/tty (device 4, 0) and /dev/console (device 5, 0).
-                This guarantees that major device numbers 4 and 5 will be
-                reserved for the tty subsystem (as they have to be because
-                of /dev/tty and /dev/console).  Removed tty_regdev, as
-                this interface is no longer necessary.
-
-Sun Mar 17 20:42:47 GMT 1996 <ah@doc.ic.ac.uk>
-
-        * serial.c : modularisation (changes in linux/fs/device.c allow
-                kerneld to automatically load the serial module).
-
-        * Makefile, Config.in : serial modularisation adds.
-
-        * tty_io.c : tty_init_ctty used by to register "cua" driver just
-                for the /dev/tty device (5,0).  Added tty_regdev.
-        
-        * serial.c (shutdown, rs_ioctl) : when port shuts down wakeup processes
-          waiting on delta_msr_wait. The TIOCMIWAIT ioctl returns EIO
-          if no change was done since the time of call.
-
-Sat Mar 16 14:33:13 1996 <aeb@cwi.nl>
-
-        * tty_io.c (disassociate_ctty): If disassociate_ctty is called by
-                exit, do not perform an implicit vhangup on a pty.
-
-Fri Feb  9 14:15:47 1996    <tytso@rsts-11.mit.edu>
-
-        * serial.c (block_til_ready): Fixed another race condition which
-                happens if a hangup happens during the open.
-
-Wed Jan 10 10:08:00 1996    <tytso@rsts-11.mit.edu>
-
-        * serial.c (block_til_ready): Remove race condition which happened
-                if a hangup condition happened during the setup of the
-                UART, before rs_open() called block_til_ready().  This
-                caused the info->count counter to be erroneously
-                decremented.
-
-        * serial.c (startup, rs_open): Remove race condition that could
-                cause a memory leak of one page.  (Fortunately, both race
-                conditions were relatively rare in practice.)
-
-Tue Dec  5 13:21:27 1995    <tytso@rsts-11.mit.edu>
-
-        * serial.c (check_modem_status, rs_ioctl): Support the new
-                ioctl()'s TIOCGICOUNT, TIOCMIWAIT.  These allow an
-                application program to wait on a modem serial register
-                status bit change, and to find out how many changes have
-                taken place for the MSR bits.
-
-                (rs_write): Eliminate a race condition which is introduced
-                if it is necessary to wait for the semaphore.
-
-Sat Nov  4 17:14:45 1995    <tytso@rsts-11.mit.edu>
-
-        * tty_io.c (tty_init): Move registration of TTY_MAJOR and
-                TTY_AUX_MAJOR to the end, so that /proc/devices looks
-                prettier. 
-
-        * pty.c (pty_init): Use new major numbers for PTY master and slave
-                devices.  This allow us to have more than 64 pty's.  We
-                register the old pty devices for backwards compatibility.
-                Note that a system should either be using the old pty
-                devices or the new pty devices --- in general, it should
-                try to use both, since they map into the same pty table.
-                The old pty devices are strictly for backwards compatibility.
-
-Wed Oct 11 12:45:24 1995    <tytso@rsts-11.mit.edu>
-
-        * tty_io.c (disassociate_ctty): If disassociate_ctty is called by
-                exit, perform an implicit vhangup on the tty.
-
-        * pty.c (pty_close): When the master pty is closed, send a hangup
-                to the slave pty.
-                (pty_open): Use the flag TTY_SLAVE_CLOSED to test to see
-                if there are any open slave ptys, instead of using
-                tty->link->count.  The old method got confused if there
-                were processes that had hung-up file descriptors on the
-                slave tty.
-
-Tue May  2 00:53:25 1995    <tytso@rsx-11.mit.edu>
-
-        * tty_io.c (tty_set_ldisc): Wait until the output buffer is
-                drained before closing the old line discipline --- needed
-                in only one case: XON/XOFF processing.
-
-        * n_tty.c (n_tty_close): Don't bother waiting until the output
-                driver is closed; in general, the line discipline
-                shouldn't care if the hardware is finished
-                transmitting before the line discipline terminates.
-
-        * tty_io.c (release_dev): Shutdown the line discipline after
-                decrementing the tty count variable; but set the
-                TTY_CLOSING flag so that we know that this tty structure
-                isn't long for this world.
-
-        * tty_io.c (init_dev): Add sanity code to check to see if
-                TTY_CLOSING is set on a tty structure; if so, something
-                bad has happened (probably a line discipline close blocked
-                when it shouldn't have; so do a kernel printk and then
-                return an error).
-
-Wed Apr 26 10:23:44 1995  Theodore Y. Ts'o  <tytso@localhost>
-
-        * tty_io.c (release_dev): Try to shutdown the line discipline
-                *before* decrementing the tty count variable; this removes
-                a potential race condition which occurs when the line
-                discipline close blocks, and another process then tries
-                open the same serial port.
-
-        * serial.c (rs_hangup): When hanging up, flush the output buffer
-                before shutting down the UART.  Otherwise the line
-                discipline close blocks waiting for the characters to get
-                flushed, which never happens until the serial port gets reused.
-
-Wed Apr 12 08:06:16 1995  Theodore Y. Ts'o  <tytso@localhost>
-
-        * serial.c (do_serial_hangup, do_softint, check_modem_status,
-                rs_init):  Hangups are now scheduled via a separate tqueue
-                structure in the async_struct structure, tqueue_hangup.
-                This task is pushed on to the tq_schedule queue, so that
-                it is processed synchronously by the scheduler.
-
-Sat Feb 18 12:13:51 1995  Theodore Y. Ts'o  (tytso@rt-11)
-
-        * tty_io.c (disassociate_ctty, tty_open, tty_ioctl): Clear
-                current->tty_old_pgrp field when a session leader
-                acquires a controlling tty, and after a session leader
-                has disassociated from a controlling tty.
-
-Fri Feb 17 09:34:09 1995  Theodore Y. Ts'o  (tytso@rt-11)
-
-        * serial.c (rs_interrupt_single, rs_interrupt, rs_interrupt_multi): 
-                Change the number of passes made from 64 to be 256,
-                configurable with the #define RS_ISR_PASS_LIMIT.
-
-        * serial.c (rs_init, set_serial_info, get_serial_info, rs_close):
-                Remove support for closing_wait2.  Instead, set
-                tty->closing and rely on the line discipline to prevent
-                echo wars.
-
-        * n_tty.c (n_tty_receive_char):  IEXTEN does not need to be
-                enabled in order for IXANY to be active.
-
-                If tty->closing is set, then only process XON and XOFF
-                characters.
-
-Sun Feb 12 23:57:48 1995  Theodore Y. Ts'o  (tytso@rt-11)
-
-        * serial.c (rs_timer): Change the interrupt poll time from 60
-                seconds to 10 seconds, configurable with the #define
-                RS_STROBE_TIME.
-
-        * serial.c (rs_interrupt_multi, startup, shutdown, rs_ioctl,
-                set_multiport_struct, get_multiport_struct): Add
-                provisions for a new type of interrupt service routine,
-                which better supports multiple serial ports on a single
-                IRQ.  
-
-Sun Feb  5 19:35:11 1995  Theodore Y. Ts'o  (tytso@rt-11)
-
-        * tty_ioctl.c (n_tty_ioctl, set_termios, tty_wait_until_sent): 
-        * serial.c (rs_ioctl, rs_close): 
-        * cyclades.c (cy_ioctl, cy_close): 
-        * n_tty.c (n_tty_close):  Rename wait_until_sent to
-                tty_wait_until_sent, so that it's a better name to export
-                in ksyms.c.
-
-Sat Feb  4 23:36:20 1995  Theodore Y. Ts'o  (tytso@rt-11)
-
-        * serial.c (rs_close): Added missing check for closing_wait2 being
-                ASYNC_CLOSING_WAIT_NONE.
-
-Thu Jan 26 09:02:49 1995  Theodore Y. Ts'o  (tytso@rt-11)
-
-        * serial.c (rs_init, set_serial_info, get_serial_info,
-                rs_close): Support close_wait in the serial driver.
-                This is helpful for slow devices (like serial
-                plotters) so that their outputs don't get flushed upon
-                device close.  This has to be configurable because
-                normally we don't want ports to be hung up for long
-                periods of time during a close when they are not
-                connected to a device, or the device is powered off.
-
-                The default is to wait 30 seconds; in the case of a
-                very slow device, the close_wait timeout should be
-                lengthened.  If it is set to 0, the kernel will wait
-                forever for all of the data to be transmitted.
-
-Thu Jan 17 01:17:20 1995  Theodore Y. Ts'o  (tytso@rt-11)
-
-        * serial.c (startup, change_speed, rs_init): Add support to detect
-                the StarTech 16650 chip.  Treat it as a 16450 for now,
-                because of its FIFO bugs.
-
-Thu Jan  5 21:21:57 1995  <dahinds@users.sourceforge.net>
-
-        * serial.c: (receive_char): Added counter to prevent infinite loop
-                when a PCMCIA serial device is ejected.
-
-Thu Dec 29 17:53:48 1994    <tytso@rsx-11.mit.edu>
-
-        * tty_io.c (check_tty_count): New procedure which checks
-                tty->count to make sure that it matches with the number of
-                open file descriptors which point at the structure.  If
-                the number doesn't match, it prints a warning message.
-
-Wed Dec 28 15:41:51 1994    <tytso@rsx-11.mit.edu>
-
-        * tty_io.c (do_tty_hangup, disassociate_ctty): At hangup time,
-                save the tty's current foreground process group in the
-                session leader's task structure.  When the session leader
-                terminates, send a SIGHUP, SIGCONT to that process group.
-                This is not required by POSIX, but it's not prohibited
-                either, and it appears to be the least intrusive way
-                to fix a problem that dialup servers have with
-                orphaned process groups caused by modem hangups.
-
-Thu Dec  8 14:52:11 1994    <tytso@rsx-11.mit.edu>
-
-        * serial.c (rs_ioctl): Don't allow most ioctl's if the serial port
-                isn't initialized.
-
-        * serial.c (rs_close): Don't clear the IER if the serial port
-                isn't initialized. 
-
-        * serial.c (block_til_ready): Don't try to block on the dialin
-                port if the serial port isn't initialized.
-
-Wed Dec  7 10:48:30 1994  Si Park (si@wimpol.demon.co.uk)
-        * tty_io.c (tty_register_driver): Fix bug when linking onto
-                the tty_drivers list. We now test that there are elements
-                already on the list before setting the back link from the
-                first element to the new driver.
-
-        * tty_io.c (tty_unregister_driver): Fix bug in unlinking the
-                specified driver from the tty_drivers list. We were not
-                setting the back link correctly. This used to result in
-                a dangling back link pointer and cause panics on the next
-                call to get_tty_driver().
-
-Tue Nov 29 10:21:09 1994  Theodore Y. Ts'o  (tytso@rt-11)
-
-        * tty_io.c (tty_unregister_driver): Fix bug in
-                tty_unregister_driver where the pointer to the refcount is
-                tested, instead of the refcount itself.  This caused
-                tty_unregister_driver to always return EBUSY.
-
-Sat Nov 26 11:59:24 1994  Theodore Y. Ts'o  (tytso@rt-11)
-
-        * tty_io.c (tty_ioctl): Add support for the new ioctl
-                TIOCTTYGSTRUCT, which allow a kernel debugging program
-                direct read access to the tty and tty_driver structures.
-
-Fri Nov 25 17:26:22 1994  Theodore Y. Ts'o  (tytso@rt-11)
-
-        * serial.c (rs_set_termios): Don't wake up processes blocked in
-                open when the CLOCAL flag changes, since a blocking
-                open only samples the CLOCAL flag once when it blocks,
-                and doesn't check it again.  (n.b.  FreeBSD has a
-                different behavior for blocking opens; it's not clear
-                whether Linux or FreeBSD's interpretation is correct.
-                POSIX doesn't give clear guidance on this issue, so
-                this may change in the future....)
-
-        * serial.c (block_til_ready): Use the correct termios structure to
-                check the CLOCAL flag.  If the cuaXX device is active,
-                then check the saved termios for the ttySXX device.
-                Otherwise, use the currently active termios structure.
-
-Sun Nov  6 21:05:44 1994  Theodore Y. Ts'o  (tytso@rt-11)
-
-        * serial.c (change_speed): Add support for direct access of
-                57,600 and 115,200 bps.
-
-Wed Nov  2 10:32:36 1994  Theodore Y. Ts'o  (tytso@rt-11)
-
-        * n_tty.c (n_tty_receive_room): Only allow excess characters
-                through if we are in ICANON mode *and* there are other no
-                pending lines in the buffer.  Otherwise cut and paste over
-                4k breaks.
-
-Sat Oct 29 18:17:34 1994  Theodore Y. Ts'o  (tytso@rt-11)
-
-        * serial.c (rs_ioctl, get_lsr_info): Added patch suggested by Arne
-                Riiber so that user mode programs can tell when the
-                transmitter shift register is empty.
-
-Thu Oct 27 23:14:29 1994  Theodore Y. Ts'o  (tytso@rt-11)
-
-        * tty_ioctl.c (wait_until_sent): Added debugging printk statements
-                (under the #ifdef TTY_DEBUG_WAIT_UNTIL_SENT)  
-
-        * serial.c (rs_interrupt, rs_interrupt_single, receive_chars,
-                change_speed, rs_close): rs_close now disables receiver
-                interrupts when closing the serial port.  This allows the
-                serial port to close quickly when Linux and a modem (or a
-                mouse) are engaged in an echo war; when closing the serial
-                port, we now first stop listening to incoming characters,
-                and *then* wait for the transmit buffer to drain.  
-
-                In order to make this change, the info->read_status_mask
-                is now used to control what bits of the line status
-                register are looked at in the interrupt routine in all
-                cases; previously it was only used in receive_chars to
-                select a few of the status bits.
-
-Mon Oct 24 23:36:21 1994  Theodore Y. Ts'o  (tytso@rt-11)
-
-        * serial.c (rs_close): Add a timeout to the transmitter flush
-                loop; this is just a sanity check in case we have flaky
-                (or non-existent-but-configured-by-the-user) hardware.
-
-Fri Oct 21 09:37:23 1994  Theodore Y. Ts'o  (tytso@rt-11)
-
-        * tty_io.c (tty_fasync): When asynchronous I/O is enabled, if the
-                process or process group has not be specified yet, set it
-                to be the tty's process group, or if that is not yet set,
-                to the current process's pid.
-
-Thu Oct 20 23:17:28 1994  Theodore Y. Ts'o  (tytso@rt-11)
-
-        * n_tty.c (n_tty_receive_room): If we are doing input
-                canonicalization, let as many characters through as
-                possible, so that the excess characters can be "beeped".
-
-Tue Oct 18 10:02:43 1994  Theodore Y. Ts'o  (tytso@rt-11)
-
-        * serial.c (rs_start): Removed an incorrect '!' that was
-                preventing transmit interrupts from being re-enabled in
-                rs_start().  Fortunately in most cases it would be
-                re-enabled elsewhere, but this still should be fixed
-                correctly.
-
-Sun Oct  9 23:46:03 1994  Theodore Y. Ts'o  (tytso@rt-11)
-
-        * tty_io.c (do_tty_hangup): If the tty driver flags
-                TTY_DRIVER_RESET_TERMIOS is set, then reset the termios
-                settings back to the driver's initial configuration.  This
-                allows the termios settings to be reset even if a process
-                has hung up file descriptors keeping a pty's termios from
-                being freed and reset.
-
-        * tty_io.c (release_dev): Fix memory leak.  The pty's other
-                termios structure should also be freed.
-
-        * serial.c (rs_close, shutdown): Change how we wait for the
-                transmitter to completely drain before shutting down the
-                serial port.  We now do it by scheduling in another
-                process instead of busy looping with the interrupts turned
-                on.  This may eliminate some race condition problems that
-                some people seem to be reporting.
-
-Sun Sep 25 14:18:14 1994  Theodore Y. Ts'o  (tytso@rt-11)
-
-        * tty_io.c (release_dev): When freeing a tty make sure that both
-                the tty and the o_tty (if present) aren't a process's
-                controlling tty.  (Previously, we only checked the tty.)
-
-        * serial.c (change_speed): Only enable the Modem Status
-                Interrupt for a port if CLOCAL is not set or CRTSCTS
-                is set.  If we're not checking the carrier detect and
-                CTS line, there's no point in enabling the modem
-                status interrupt.  This will save spurious interrupts
-                from slowing down systems who have terminals that
-                don't support either line.  (Of course, if you want
-                only one of CD and CTS support, you will need a
-                properly wired serial cable.)
-
-Thu Sep 22 08:32:48 1994  Theodore Y. Ts'o  (tytso@rt-11)
-
-        * tty_io.c (do_SAK): Return if tty is null.
-
-        * tty_io.c (_tty_name): Return "NULL tty" if the passed in tty is
-                NULL.
-
-Sat Sep 17 13:19:25 1994  Theodore Y. Ts'o  (tytso@rt-11)
-
-        * tty_ioctl.c (n_tty_ioctl): Fix TIOCGLCKTRMIOS and
-                TIOCSLCKTRMIOS, which were totally broken.  Remove
-                extra indirection from argument; it should be a struct
-                termios *, not a struct termios **.
-                &real_tty->termios_locked should have been
-                real_tty->termios_locked.  This caused us to be
-                reading and writing the termios_locked structure to
-                random places in kernel memory.  
-
-        * tty_io.c (release_dev): Oops!  Forgot to delete a critical kfree
-                of the locked_termios.  This leaves the locked_termios
-                structure pointed at a freed object.  
-
-Fri Sep 16 08:13:25 1994  Theodore Y. Ts'o  (tytso@rt-11)
-
-        * tty_io.c (tty_open): Don't check for an exclusive open until
-                after the device specific open routine has been called.
-                Otherwise, the serial device ref counting will be screwed
-                up.
-
-        * serial.c (rs_open, block_til_ready): Don't set termios structure
-                until after block_til_ready has returned successfully.
-                Modify block_til_ready to check the normal_termios
-                structure directly, so it doesn't rely on termios being
-                set before it's called.
-
-Thu Sep 15 23:34:01 1994  Theodore Y. Ts'o  (tytso@rt-11)
-
-        * serial.c (rs_close): Turn off interrupts during rs_close() to
-                prevent a race condition with the hangup code (which
-                runs during a software interrupt).
-
-        * tty_io.c (release_dev): Don't free the locked_termios structure;
-                its state must be retained across device opens.
-
-
-        * tty_io.c (tty_unregister_driver): Added function to unregister a
-                tty driver.  (For loadable device drivers.)
-
-
diff --git a/drivers/char/agp/intel-agp.c b/drivers/char/agp/intel-agp.c
index 919a28558d36..a3e10dc7cc25 100644
--- a/drivers/char/agp/intel-agp.c
+++ b/drivers/char/agp/intel-agp.c
@@ -298,7 +298,7 @@ static void intel_agp_insert_sg_entries(struct agp_memory *mem,
                         j++;
                 }
         } else {
-                /* sg may merge pages, but we have to seperate
+                /* sg may merge pages, but we have to separate
                  * per-page addr for GTT */
                 unsigned int len, m;
 
diff --git a/drivers/char/applicom.c b/drivers/char/applicom.c
index fe2cb2f5db17..a7424bf7eacf 100644
--- a/drivers/char/applicom.c
+++ b/drivers/char/applicom.c
@@ -14,7 +14,7 @@
 /* et passe en argument a acinit, mais est scrute sur le bus pour s'adapter  */
 /* au nombre de cartes presentes sur le bus. IOCL code 6 affichait V2.4.3    */
 /* F.LAFORSE 28/11/95 creation de fichiers acXX.o avec les differentes       */
-/* adresses de base des cartes, IOCTL 6 plus complet                         */
+/* addresses de base des cartes, IOCTL 6 plus complet                         */
 /* J.PAGET le 19/08/96 copie de la version V2.6 en V2.8.0 sans modification  */
 /* de code autre que le texte V2.6.1 en V2.8.0                               */
 /*****************************************************************************/
diff --git a/drivers/char/hvc_iseries.c b/drivers/char/hvc_iseries.c
index fd0242676a2a..21c54955084e 100644
--- a/drivers/char/hvc_iseries.c
+++ b/drivers/char/hvc_iseries.c
@@ -353,7 +353,7 @@ static void hvc_close_event(struct HvLpEvent *event)
 
         if (!hvlpevent_is_int(event)) {
                 printk(KERN_WARNING
-                        "hvc: got unexpected close acknowlegement\n");
+                        "hvc: got unexpected close acknowledgement\n");
                 return;
         }
 
diff --git a/drivers/char/hw_random/n2-drv.c b/drivers/char/hw_random/n2-drv.c
index 9b3e09cd41f9..10f868eefaa6 100644
--- a/drivers/char/hw_random/n2-drv.c
+++ b/drivers/char/hw_random/n2-drv.c
@@ -71,7 +71,7 @@ MODULE_VERSION(DRV_MODULE_VERSION);
  *        x22 + x21 + x17 + x15 + x13 + x12 + x11 + x7 + x5 + x + 1
  *
  * The RNG_CTL_VCO value of each noise cell must be programmed
- * seperately.  This is why 4 control register values must be provided
+ * separately.  This is why 4 control register values must be provided
  * to the hypervisor.  During a write, the hypervisor writes them all,
  * one at a time, to the actual RNG_CTL register.  The first three
  * values are used to setup the desired RNG_CTL_VCO for each entropy
diff --git a/drivers/char/ip2/i2hw.h b/drivers/char/ip2/i2hw.h
index 8aa6e7ab8d5b..c0ba6c05f0cd 100644
--- a/drivers/char/ip2/i2hw.h
+++ b/drivers/char/ip2/i2hw.h
@@ -559,7 +559,7 @@ Loadware may be sent to the board in two ways:
 
 2) It may be hard-coded into your source by including a .h file (typically
         supplied by Computone), which declares a data array and initializes every
-        element. This acheives the same result as if an entire loadware file had 
+        element. This achieves the same result as if an entire loadware file had 
         been read into the array.
 
         This requires more data space in your program, but access to the file system
diff --git a/drivers/char/ipmi/ipmi_si_intf.c b/drivers/char/ipmi/ipmi_si_intf.c
index 176f1751237f..4462b113ba3f 100644
--- a/drivers/char/ipmi/ipmi_si_intf.c
+++ b/drivers/char/ipmi/ipmi_si_intf.c
@@ -295,6 +295,9 @@ struct smi_info {
 static int force_kipmid[SI_MAX_PARMS];
 static int num_force_kipmid;
 
+static unsigned int kipmid_max_busy_us[SI_MAX_PARMS];
+static int num_max_busy_us;
+
 static int unload_when_empty = 1;
 
 static int try_smi_init(struct smi_info *smi);
@@ -925,23 +928,77 @@ static void set_run_to_completion(void *send_info, int i_run_to_completion)
         }
 }
 
+/*
+ * Use -1 in the nsec value of the busy waiting timespec to tell that
+ * we are spinning in kipmid looking for something and not delaying
+ * between checks
+ */
+static inline void ipmi_si_set_not_busy(struct timespec *ts)
+{
+        ts->tv_nsec = -1;
+}
+static inline int ipmi_si_is_busy(struct timespec *ts)
+{
+        return ts->tv_nsec != -1;
+}
+
+static int ipmi_thread_busy_wait(enum si_sm_result smi_result,
+                                 const struct smi_info *smi_info,
+                                 struct timespec *busy_until)
+{
+        unsigned int max_busy_us = 0;
+
+        if (smi_info->intf_num < num_max_busy_us)
+                max_busy_us = kipmid_max_busy_us[smi_info->intf_num];
+        if (max_busy_us == 0 || smi_result != SI_SM_CALL_WITH_DELAY)
+                ipmi_si_set_not_busy(busy_until);
+        else if (!ipmi_si_is_busy(busy_until)) {
+                getnstimeofday(busy_until);
+                timespec_add_ns(busy_until, max_busy_us*NSEC_PER_USEC);
+        } else {
+                struct timespec now;
+                getnstimeofday(&now);
+                if (unlikely(timespec_compare(&now, busy_until) > 0)) {
+                        ipmi_si_set_not_busy(busy_until);
+                        return 0;
+                }
+        }
+        return 1;
+}
+
+
+/*
+ * A busy-waiting loop for speeding up IPMI operation.
+ *
+ * Lousy hardware makes this hard.  This is only enabled for systems
+ * that are not BT and do not have interrupts.  It starts spinning
+ * when an operation is complete or until max_busy tells it to stop
+ * (if that is enabled).  See the paragraph on kimid_max_busy_us in
+ * Documentation/IPMI.txt for details.
+ */
 static int ipmi_thread(void *data)
 {
         struct smi_info *smi_info = data;
         unsigned long flags;
         enum si_sm_result smi_result;
+        struct timespec busy_until;
 
+        ipmi_si_set_not_busy(&busy_until);
         set_user_nice(current, 19);
         while (!kthread_should_stop()) {
+                int busy_wait;
+
                 spin_lock_irqsave(&(smi_info->si_lock), flags);
                 smi_result = smi_event_handler(smi_info, 0);
                 spin_unlock_irqrestore(&(smi_info->si_lock), flags);
+                busy_wait = ipmi_thread_busy_wait(smi_result, smi_info,
+                                                  &busy_until);
                 if (smi_result == SI_SM_CALL_WITHOUT_DELAY)
                         ; /* do nothing */
-                else if (smi_result == SI_SM_CALL_WITH_DELAY)
+                else if (smi_result == SI_SM_CALL_WITH_DELAY && busy_wait)
                         schedule();
                 else
-                        schedule_timeout_interruptible(1);
+                        schedule_timeout_interruptible(0);
         }
         return 0;
 }
@@ -1144,7 +1201,7 @@ static int           regsizes[SI_MAX_PARMS];
 static unsigned int num_regsizes;
 static int           regshifts[SI_MAX_PARMS];
 static unsigned int num_regshifts;
-static int slave_addrs[SI_MAX_PARMS];
+static int slave_addrs[SI_MAX_PARMS]; /* Leaving 0 chooses the default value */
 static unsigned int num_slave_addrs;
 
 #define IPMI_IO_ADDR_SPACE  0
@@ -1212,6 +1269,11 @@ module_param(unload_when_empty, int, 0);
 MODULE_PARM_DESC(unload_when_empty, "Unload the module if no interfaces are"
                  " specified or found, default is 1.  Setting to 0"
                  " is useful for hot add of devices using hotmod.");
+module_param_array(kipmid_max_busy_us, uint, &num_max_busy_us, 0644);
+MODULE_PARM_DESC(kipmid_max_busy_us,
+                 "Max time (in microseconds) to busy-wait for IPMI data before"
+                 " sleeping. 0 (default) means to wait forever. Set to 100-500"
+                 " if kipmid is using up a lot of CPU time.");
 
 
 static void std_irq_cleanup(struct smi_info *info)
@@ -1607,7 +1669,7 @@ static int hotmod_handler(const char *val, struct kernel_param *kp)
                 regsize = 1;
                 regshift = 0;
                 irq = 0;
-                ipmb = 0x20;
+                ipmb = 0; /* Choose the default if not specified */
 
                 next = strchr(curr, ':');
                 if (next) {
@@ -1799,6 +1861,7 @@ static __devinit void hardcode_find_bmc(void)
                 info->irq = irqs[i];
                 if (info->irq)
                         info->irq_setup = std_irq_setup;
+                info->slave_addr = slave_addrs[i];
 
                 try_smi_init(info);
         }
diff --git a/drivers/char/mem.c b/drivers/char/mem.c
index 48788db4e280..1f3215ac085b 100644
--- a/drivers/char/mem.c
+++ b/drivers/char/mem.c
@@ -3,7 +3,7 @@
  *
  *  Copyright (C) 1991, 1992  Linus Torvalds
  *
- *  Added devfs support. 
+ *  Added devfs support.
  *    Jan-11-1998, C. Scott Ananian <cananian@alumni.princeton.edu>
  *  Shared /dev/zero mmapping support, Feb 2000, Kanoj Sarcar <kanoj@sgi.com>
  */
@@ -44,36 +44,6 @@ static inline unsigned long size_inside_page(unsigned long start,
         return min(sz, size);
 }
 
-/*
- * Architectures vary in how they handle caching for addresses
- * outside of main memory.
- *
- */
-static inline int uncached_access(struct file *file, unsigned long addr)
-{
-#if defined(CONFIG_IA64)
-        /*
-         * On ia64, we ignore O_DSYNC because we cannot tolerate memory attribute aliases.
-         */
-        return !(efi_mem_attributes(addr) & EFI_MEMORY_WB);
-#elif defined(CONFIG_MIPS)
-        {
-                extern int __uncached_access(struct file *file,
-                                             unsigned long addr);
-
-                return __uncached_access(file, addr);
-        }
-#else
-        /*
-         * Accessing memory above the top the kernel knows about or through a file pointer
-         * that was marked O_DSYNC will be done non-cached.
-         */
-        if (file->f_flags & O_DSYNC)
-                return 1;
-        return addr >= __pa(high_memory);
-#endif
-}
-
 #ifndef ARCH_HAS_VALID_PHYS_ADDR_RANGE
 static inline int valid_phys_addr_range(unsigned long addr, size_t count)
 {
@@ -115,15 +85,15 @@ static inline int range_is_allowed(unsigned long pfn, unsigned long size)
 }
 #endif
 
-void __attribute__((weak)) unxlate_dev_mem_ptr(unsigned long phys, void *addr)
+void __weak unxlate_dev_mem_ptr(unsigned long phys, void *addr)
 {
 }
 
 /*
- * This funcion reads the *physical* memory. The f_pos points directly to the 
- * memory location. 
+ * This funcion reads the *physical* memory. The f_pos points directly to the
+ * memory location.
  */
-static ssize_t read_mem(struct file * file, char __user * buf,
+static ssize_t read_mem(struct file *file, char __user *buf,
                         size_t count, loff_t *ppos)
 {
         unsigned long p = *ppos;
@@ -140,10 +110,10 @@ static ssize_t read_mem(struct file * file, char __user * buf,
                 if (sz > 0) {
                         if (clear_user(buf, sz))
                                 return -EFAULT;
-                        buf += sz; 
-                        p += sz; 
-                        count -= sz; 
-                        read += sz; 
+                        buf += sz;
+                        p += sz;
+                        count -= sz;
+                        read += sz;
                 }
         }
 #endif
@@ -157,9 +127,9 @@ static ssize_t read_mem(struct file * file, char __user * buf,
                         return -EPERM;
 
                 /*
-                 * On ia64 if a page has been mapped somewhere as
-                 * uncached, then it must also be accessed uncached
-                 * by the kernel or data corruption may occur
+                 * On ia64 if a page has been mapped somewhere as uncached, then
+                 * it must also be accessed uncached by the kernel or data
+                 * corruption may occur.
                  */
                 ptr = xlate_dev_mem_ptr(p);
                 if (!ptr)
@@ -180,7 +150,7 @@ static ssize_t read_mem(struct file * file, char __user * buf,
         return read;
 }
 
-static ssize_t write_mem(struct file * file, const char __user * buf, 
+static ssize_t write_mem(struct file *file, const char __user *buf,
                          size_t count, loff_t *ppos)
 {
         unsigned long p = *ppos;
@@ -212,9 +182,9 @@ static ssize_t write_mem(struct file * file, const char __user * buf,
                         return -EPERM;
 
                 /*
-                 * On ia64 if a page has been mapped somewhere as
-                 * uncached, then it must also be accessed uncached
-                 * by the kernel or data corruption may occur
+                 * On ia64 if a page has been mapped somewhere as uncached, then
+                 * it must also be accessed uncached by the kernel or data
+                 * corruption may occur.
                  */
                 ptr = xlate_dev_mem_ptr(p);
                 if (!ptr) {
@@ -242,13 +212,46 @@ static ssize_t write_mem(struct file * file, const char __user * buf,
         return written;
 }
 
-int __attribute__((weak)) phys_mem_access_prot_allowed(struct file *file,
+int __weak phys_mem_access_prot_allowed(struct file *file,
         unsigned long pfn, unsigned long size, pgprot_t *vma_prot)
 {
         return 1;
 }
 
 #ifndef __HAVE_PHYS_MEM_ACCESS_PROT
+
+/*
+ * Architectures vary in how they handle caching for addresses
+ * outside of main memory.
+ *
+ */
+static int uncached_access(struct file *file, unsigned long addr)
+{
+#if defined(CONFIG_IA64)
+        /*
+         * On ia64, we ignore O_DSYNC because we cannot tolerate memory
+         * attribute aliases.
+         */
+        return !(efi_mem_attributes(addr) & EFI_MEMORY_WB);
+#elif defined(CONFIG_MIPS)
+        {
+                extern int __uncached_access(struct file *file,
+                                             unsigned long addr);
+
+                return __uncached_access(file, addr);
+        }
+#else
+        /*
+         * Accessing memory above the top the kernel knows about or through a
+         * file pointer
+         * that was marked O_DSYNC will be done non-cached.
+         */
+        if (file->f_flags & O_DSYNC)
+                return 1;
+        return addr >= __pa(high_memory);
+#endif
+}
+
 static pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn,
                                      unsigned long size, pgprot_t vma_prot)
 {
@@ -294,7 +297,7 @@ static const struct vm_operations_struct mmap_mem_ops = {
 #endif
 };
 
-static int mmap_mem(struct file * file, struct vm_area_struct * vma)
+static int mmap_mem(struct file *file, struct vm_area_struct *vma)
 {
         size_t size = vma->vm_end - vma->vm_start;
 
@@ -329,7 +332,7 @@ static int mmap_mem(struct file * file, struct vm_area_struct * vma)
 }
 
 #ifdef CONFIG_DEVKMEM
-static int mmap_kmem(struct file * file, struct vm_area_struct * vma)
+static int mmap_kmem(struct file *file, struct vm_area_struct *vma)
 {
         unsigned long pfn;
 
@@ -337,9 +340,9 @@ static int mmap_kmem(struct file * file, struct vm_area_struct * vma)
         pfn = __pa((u64)vma->vm_pgoff << PAGE_SHIFT) >> PAGE_SHIFT;
 
         /*
-         * RED-PEN: on some architectures there is more mapped memory
-         * than available in mem_map which pfn_valid checks
-         * for. Perhaps should add a new macro here.
+         * RED-PEN: on some architectures there is more mapped memory than
+         * available in mem_map which pfn_valid checks for. Perhaps should add a
+         * new macro here.
          *
          * RED-PEN: vmalloc is not supported right now.
          */
@@ -389,7 +392,7 @@ static ssize_t read_oldmem(struct file *file, char __user *buf,
 /*
  * This function reads the *virtual* memory as seen by the kernel.
  */
-static ssize_t read_kmem(struct file *file, char __user *buf, 
+static ssize_t read_kmem(struct file *file, char __user *buf,
                          size_t count, loff_t *ppos)
 {
         unsigned long p = *ppos;
@@ -400,8 +403,8 @@ static ssize_t read_kmem(struct file *file, char __user *buf,
         read = 0;
         if (p < (unsigned long) high_memory) {
                 low_count = count;
-                if (count > (unsigned long) high_memory - p)
-                        low_count = (unsigned long) high_memory - p;
+                if (count > (unsigned long)high_memory - p)
+                        low_count = (unsigned long)high_memory - p;
 
 #ifdef __ARCH_HAS_NO_PAGE_ZERO_MAPPED
                 /* we don't have page 0 mapped on sparc and m68k.. */
@@ -465,9 +468,8 @@ static ssize_t read_kmem(struct file *file, char __user *buf,
 }
 
 
-static inline ssize_t
-do_write_kmem(unsigned long p, const char __user *buf,
-              size_t count, loff_t *ppos)
+static ssize_t do_write_kmem(unsigned long p, const char __user *buf,
+                                size_t count, loff_t *ppos)
 {
         ssize_t written, sz;
         unsigned long copied;
@@ -491,9 +493,9 @@ do_write_kmem(unsigned long p, const char __user *buf,
                 sz = size_inside_page(p, count);
 
                 /*
-                 * On ia64 if a page has been mapped somewhere as
-                 * uncached, then it must also be accessed uncached
-                 * by the kernel or data corruption may occur
+                 * On ia64 if a page has been mapped somewhere as uncached, then
+                 * it must also be accessed uncached by the kernel or data
+                 * corruption may occur.
                  */
                 ptr = xlate_dev_kmem_ptr((char *)p);
 
@@ -514,11 +516,10 @@ do_write_kmem(unsigned long p, const char __user *buf,
         return written;
 }
 
-
 /*
  * This function writes to the *virtual* memory as seen by the kernel.
  */
-static ssize_t write_kmem(struct file * file, const char __user * buf, 
+static ssize_t write_kmem(struct file *file, const char __user *buf,
                           size_t count, loff_t *ppos)
 {
         unsigned long p = *ppos;
@@ -570,17 +571,17 @@ static ssize_t write_kmem(struct file * file, const char __user * buf,
 #endif
 
 #ifdef CONFIG_DEVPORT
-static ssize_t read_port(struct file * file, char __user * buf,
+static ssize_t read_port(struct file *file, char __user *buf,
                          size_t count, loff_t *ppos)
 {
         unsigned long i = *ppos;
         char __user *tmp = buf;
 
         if (!access_ok(VERIFY_WRITE, buf, count))
-                return -EFAULT; 
+                return -EFAULT;
         while (count-- > 0 && i < 65536) {
-                if (__put_user(inb(i),tmp) < 0) 
-                        return -EFAULT;  
+                if (__put_user(inb(i), tmp) < 0)
+                        return -EFAULT;
                 i++;
                 tmp++;
         }
@@ -588,22 +589,22 @@ static ssize_t read_port(struct file * file, char __user * buf,
         return tmp-buf;
 }
 
-static ssize_t write_port(struct file * file, const char __user * buf,
+static ssize_t write_port(struct file *file, const char __user *buf,
                           size_t count, loff_t *ppos)
 {
         unsigned long i = *ppos;
         const char __user * tmp = buf;
 
-        if (!access_ok(VERIFY_READ,buf,count))
+        if (!access_ok(VERIFY_READ, buf, count))
                 return -EFAULT;
         while (count-- > 0 && i < 65536) {
                 char c;
                 if (__get_user(c, tmp)) {
                         if (tmp > buf)
                                 break;
-                        return -EFAULT; 
+                        return -EFAULT;
                 }
-                outb(c,i);
+                outb(c, i);
                 i++;
                 tmp++;
         }
@@ -612,13 +613,13 @@ static ssize_t write_port(struct file * file, const char __user * buf,
 }
 #endif
 
-static ssize_t read_null(struct file * file, char __user * buf,
+static ssize_t read_null(struct file *file, char __user *buf,
                          size_t count, loff_t *ppos)
 {
         return 0;
 }
 
-static ssize_t write_null(struct file * file, const char __user * buf,
+static ssize_t write_null(struct file *file, const char __user *buf,
                           size_t count, loff_t *ppos)
 {
         return count;
@@ -630,13 +631,13 @@ static int pipe_to_null(struct pipe_inode_info *info, struct pipe_buffer *buf,
         return sd->len;
 }
 
-static ssize_t splice_write_null(struct pipe_inode_info *pipe,struct file *out,
+static ssize_t splice_write_null(struct pipe_inode_info *pipe, struct file *out,
                                  loff_t *ppos, size_t len, unsigned int flags)
 {
         return splice_from_pipe(pipe, out, ppos, len, flags, pipe_to_null);
 }
 
-static ssize_t read_zero(struct file * file, char __user * buf, 
+static ssize_t read_zero(struct file *file, char __user *buf,
                          size_t count, loff_t *ppos)
 {
         size_t written;
@@ -667,7 +668,7 @@ static ssize_t read_zero(struct file * file, char __user * buf,
         return written ? written : -EFAULT;
 }
 
-static int mmap_zero(struct file * file, struct vm_area_struct * vma)
+static int mmap_zero(struct file *file, struct vm_area_struct *vma)
 {
 #ifndef CONFIG_MMU
         return -ENOSYS;
@@ -677,7 +678,7 @@ static int mmap_zero(struct file * file, struct vm_area_struct * vma)
         return 0;
 }
 
-static ssize_t write_full(struct file * file, const char __user * buf,
+static ssize_t write_full(struct file *file, const char __user *buf,
                           size_t count, loff_t *ppos)
 {
         return -ENOSPC;
@@ -688,8 +689,7 @@ static ssize_t write_full(struct file * file, const char __user * buf,
  * can fopen() both devices with "a" now.  This was previously impossible.
  * -- SRB.
  */
-
-static loff_t null_lseek(struct file * file, loff_t offset, int orig)
+static loff_t null_lseek(struct file *file, loff_t offset, int orig)
 {
         return file->f_pos = 0;
 }
@@ -702,24 +702,31 @@ static loff_t null_lseek(struct file * file, loff_t offset, int orig)
  * also note that seeking relative to the "end of file" isn't supported:
  * it has no meaning, so it returns -EINVAL.
  */
-static loff_t memory_lseek(struct file * file, loff_t offset, int orig)
+static loff_t memory_lseek(struct file *file, loff_t offset, int orig)
 {
         loff_t ret;
 
         mutex_lock(&file->f_path.dentry->d_inode->i_mutex);
         switch (orig) {
-                case 0:
-                        file->f_pos = offset;
-                        ret = file->f_pos;
-                        force_successful_syscall_return();
+        case SEEK_CUR:
+                offset += file->f_pos;
+                if ((unsigned long long)offset <
+                    (unsigned long long)file->f_pos) {
+                        ret = -EOVERFLOW;
                         break;
-                case 1:
-                        file->f_pos += offset;
-                        ret = file->f_pos;
-                        force_successful_syscall_return();
+                }
+        case SEEK_SET:
+                /* to avoid userland mistaking f_pos=-9 as -EBADF=-9 */
+                if ((unsigned long long)offset >= ~0xFFFULL) {
+                        ret = -EOVERFLOW;
                         break;
-                default:
-                        ret = -EINVAL;
+                }
+                file->f_pos = offset;
+                ret = file->f_pos;
+                force_successful_syscall_return();
+                break;
+        default:
+                ret = -EINVAL;
         }
         mutex_unlock(&file->f_path.dentry->d_inode->i_mutex);
         return ret;
@@ -803,7 +810,7 @@ static const struct file_operations oldmem_fops = {
 };
 #endif
 
-static ssize_t kmsg_write(struct file * file, const char __user * buf,
+static ssize_t kmsg_write(struct file *file, const char __user *buf,
                           size_t count, loff_t *ppos)
 {
         char *tmp;
@@ -825,7 +832,7 @@ static ssize_t kmsg_write(struct file * file, const char __user * buf,
 }
 
 static const struct file_operations kmsg_fops = {
-        .write =        kmsg_write,
+        .write = kmsg_write,
 };
 
 static const struct memdev {
@@ -876,7 +883,7 @@ static int memory_open(struct inode *inode, struct file *filp)
 }
 
 static const struct file_operations memory_fops = {
-        .open           = memory_open,
+        .open = memory_open,
 };
 
 static char *mem_devnode(struct device *dev, mode_t *mode)
@@ -897,7 +904,7 @@ static int __init chr_dev_init(void)
         if (err)
                 return err;
 
-        if (register_chrdev(MEM_MAJOR,"mem",&memory_fops))
+        if (register_chrdev(MEM_MAJOR, "mem", &memory_fops))
                 printk("unable to get major %d for memory devs\n", MEM_MAJOR);
 
         mem_class = class_create(THIS_MODULE, "mem");
diff --git a/drivers/char/mmtimer.c b/drivers/char/mmtimer.c
index 918711aa56f3..04fd0d843b3b 100644
--- a/drivers/char/mmtimer.c
+++ b/drivers/char/mmtimer.c
@@ -546,7 +546,7 @@ static void mmtimer_tasklet(unsigned long data)
 {
         int nodeid = data;
         struct mmtimer_node *mn = &timers[nodeid];
-        struct mmtimer *x = rb_entry(mn->next, struct mmtimer, list);
+        struct mmtimer *x;
         struct k_itimer *t;
         unsigned long flags;
 
diff --git a/drivers/char/n_tty.c b/drivers/char/n_tty.c
index 2e50f4dfc79c..bdae8327143c 100644
--- a/drivers/char/n_tty.c
+++ b/drivers/char/n_tty.c
@@ -48,6 +48,7 @@
 #include <linux/audit.h>
 #include <linux/file.h>
 #include <linux/uaccess.h>
+#include <linux/module.h>
 
 #include <asm/system.h>
 
@@ -2091,3 +2092,19 @@ struct tty_ldisc_ops tty_ldisc_N_TTY = {
         .receive_buf     = n_tty_receive_buf,
         .write_wakeup    = n_tty_write_wakeup
 };
+
+/**
+ *      n_tty_inherit_ops       -       inherit N_TTY methods
+ *      @ops: struct tty_ldisc_ops where to save N_TTY methods
+ *
+ *      Used by a generic struct tty_ldisc_ops to easily inherit N_TTY
+ *      methods.
+ */
+
+void n_tty_inherit_ops(struct tty_ldisc_ops *ops)
+{
+        *ops = tty_ldisc_N_TTY;
+        ops->owner = NULL;
+        ops->refcount = ops->flags = 0;
+}
+EXPORT_SYMBOL_GPL(n_tty_inherit_ops);
diff --git a/drivers/char/pty.c b/drivers/char/pty.c
index 385c44b3034f..5ee424817263 100644
--- a/drivers/char/pty.c
+++ b/drivers/char/pty.c
@@ -220,7 +220,7 @@ static void pty_set_termios(struct tty_struct *tty,
  *      @tty: tty being resized
  *      @ws: window size being set.
  *
- *      Update the termios variables and send the neccessary signals to
+ *      Update the termios variables and send the necessary signals to
  *      peform a terminal resize correctly
  */
 
diff --git a/drivers/char/random.c b/drivers/char/random.c
index 2849713d2231..2fd3d39995d5 100644
--- a/drivers/char/random.c
+++ b/drivers/char/random.c
@@ -1191,7 +1191,7 @@ const struct file_operations urandom_fops = {
 void generate_random_uuid(unsigned char uuid_out[16])
 {
         get_random_bytes(uuid_out, 16);
-        /* Set UUID version to 4 --- truely random generation */
+        /* Set UUID version to 4 --- truly random generation */
         uuid_out[6] = (uuid_out[6] & 0x0F) | 0x40;
         /* Set the UUID variant to DCE */
         uuid_out[8] = (uuid_out[8] & 0x3F) | 0x80;
diff --git a/drivers/char/serial167.c b/drivers/char/serial167.c
index 986aa606a6b6..1ec3d5cd748f 100644
--- a/drivers/char/serial167.c
+++ b/drivers/char/serial167.c
@@ -1989,7 +1989,7 @@ void mvme167_serial_console_setup(int cflag)
         /*
          * Attempt to set up all channels to something reasonable, and
          * bang out a INIT_CHAN command.  We should then be able to limit
-         * the ammount of fiddling we have to do in normal running.
+         * the amount of fiddling we have to do in normal running.
          */
 
         for (ch = 3; ch >= 0; ch--) {
diff --git a/drivers/char/tty_audit.c b/drivers/char/tty_audit.c
index ac16fbec72d0..283a15bc84e3 100644
--- a/drivers/char/tty_audit.c
+++ b/drivers/char/tty_audit.c
@@ -148,7 +148,6 @@ void tty_audit_fork(struct signal_struct *sig)
         spin_lock_irq(&current->sighand->siglock);
         sig->audit_tty = current->signal->audit_tty;
         spin_unlock_irq(&current->sighand->siglock);
-        sig->tty_audit_buf = NULL;
 }
 
 /**
diff --git a/drivers/char/tty_io.c b/drivers/char/tty_io.c
index dcb9083ecde0..a42c466f7092 100644
--- a/drivers/char/tty_io.c
+++ b/drivers/char/tty_io.c
@@ -2028,7 +2028,7 @@ static int tiocgwinsz(struct tty_struct *tty, struct winsize __user *arg)
  *      @rows: rows (character)
  *      @cols: cols (character)
  *
- *      Update the termios variables and send the neccessary signals to
+ *      Update the termios variables and send the necessary signals to
  *      peform a terminal resize correctly
  */
 
diff --git a/drivers/char/vt.c b/drivers/char/vt.c
index 50faa1fb0f06..bd1d1164fec5 100644
--- a/drivers/char/vt.c
+++ b/drivers/char/vt.c
@@ -821,7 +821,7 @@ static inline int resize_screen(struct vc_data *vc, int width, int height,
  *
  *      Resize a virtual console, clipping according to the actual constraints.
  *      If the caller passes a tty structure then update the termios winsize
- *      information and perform any neccessary signal handling.
+ *      information and perform any necessary signal handling.
  *
  *      Caller must hold the console semaphore. Takes the termios mutex and
  *      ctrl_lock of the tty IFF a tty is passed.
@@ -2119,8 +2119,6 @@ static int do_con_write(struct tty_struct *tty, const unsigned char *buf, int co
         uint8_t inverse;
         uint8_t width;
         u16 himask, charmask;
-        const unsigned char *orig_buf = NULL;
-        int orig_count;
 
         if (in_interrupt())
                 return count;
@@ -2142,8 +2140,6 @@ static int do_con_write(struct tty_struct *tty, const unsigned char *buf, int co
             release_console_sem();
             return 0;
         }
-        orig_buf = buf;
-        orig_count = count;
 
         himask = vc->vc_hi_font_mask;
         charmask = himask ? 0x1ff : 0xff;
diff --git a/drivers/crypto/hifn_795x.c b/drivers/crypto/hifn_795x.c
index 09ad9154d86c..73e8b1713b54 100644
--- a/drivers/crypto/hifn_795x.c
+++ b/drivers/crypto/hifn_795x.c
@@ -321,7 +321,7 @@ static atomic_t hifn_dev_number;
 #define HIFN_PUBOPLEN_MOD_M     0x0000007f      /* modulus length mask */
 #define HIFN_PUBOPLEN_MOD_S     0               /* modulus length shift */
 #define HIFN_PUBOPLEN_EXP_M     0x0003ff80      /* exponent length mask */
-#define HIFN_PUBOPLEN_EXP_S     7               /* exponent lenght shift */
+#define HIFN_PUBOPLEN_EXP_S     7               /* exponent length shift */
 #define HIFN_PUBOPLEN_RED_M     0x003c0000      /* reducend length mask */
 #define HIFN_PUBOPLEN_RED_S     18              /* reducend length shift */
 
diff --git a/drivers/dma/coh901318_lli.h b/drivers/dma/coh901318_lli.h
index 7bf713b79c6b..7a5c80990e9e 100644
--- a/drivers/dma/coh901318_lli.h
+++ b/drivers/dma/coh901318_lli.h
@@ -30,7 +30,7 @@ struct device;
  * @pool: pool handle
  * @dev: dma device
  * @lli_nbr: number of lli:s in the pool
- * @algin: adress alignemtn of lli:s
+ * @algin: address alignemtn of lli:s
  * returns 0 on success otherwise none zero
  */
 int coh901318_pool_create(struct coh901318_pool *pool,
diff --git a/drivers/edac/e752x_edac.c b/drivers/edac/e752x_edac.c
index d205d493a68a..243e9aacad69 100644
--- a/drivers/edac/e752x_edac.c
+++ b/drivers/edac/e752x_edac.c
@@ -75,6 +75,14 @@ static struct edac_pci_ctl_info *e752x_pci;
 #define E752X_NR_CSROWS         8       /* number of csrows */
 
 /* E752X register addresses - device 0 function 0 */
+#define E752X_MCHSCRB           0x52    /* Memory Scrub register (16b) */
+                                        /*
+                                         * 6:5     Scrub Completion Count
+                                         * 3:2     Scrub Rate (i3100 only)
+                                         *      01=fast 10=normal
+                                         * 1:0     Scrub Mode enable
+                                         *      00=off 10=on
+                                         */
 #define E752X_DRB               0x60    /* DRAM row boundary register (8b) */
 #define E752X_DRA               0x70    /* DRAM row attribute register (8b) */
                                         /*
@@ -240,6 +248,41 @@ static const struct e752x_dev_info e752x_devs[] = {
                 .ctl_name = "3100"},
 };
 
+/* Valid scrub rates for the e752x/3100 hardware memory scrubber. We
+ * map the scrubbing bandwidth to a hardware register value. The 'set'
+ * operation finds the 'matching or higher value'.  Note that scrubbing
+ * on the e752x can only be enabled/disabled.  The 3100 supports
+ * a normal and fast mode.
+ */
+
+#define SDRATE_EOT 0xFFFFFFFF
+
+struct scrubrate {
+        u32 bandwidth;  /* bandwidth consumed by scrubbing in bytes/sec */
+        u16 scrubval;   /* register value for scrub rate */
+};
+
+/* Rate below assumes same performance as i3100 using PC3200 DDR2 in
+ * normal mode.  e752x bridges don't support choosing normal or fast mode,
+ * so the scrubbing bandwidth value isn't all that important - scrubbing is
+ * either on or off.
+ */
+static const struct scrubrate scrubrates_e752x[] = {
+        {0,             0x00},  /* Scrubbing Off */
+        {500000,        0x02},  /* Scrubbing On */
+        {SDRATE_EOT,    0x00}   /* End of Table */
+};
+
+/* Fast mode: 2 GByte PC3200 DDR2 scrubbed in 33s = 63161283 bytes/s
+ * Normal mode: 125 (32000 / 256) times slower than fast mode.
+ */
+static const struct scrubrate scrubrates_i3100[] = {
+        {0,             0x00},  /* Scrubbing Off */
+        {500000,        0x0a},  /* Normal mode - 32k clocks */
+        {62500000,      0x06},  /* Fast mode - 256 clocks */
+        {SDRATE_EOT,    0x00}   /* End of Table */
+};
+
 static unsigned long ctl_page_to_phys(struct mem_ctl_info *mci,
                                 unsigned long page)
 {
@@ -915,6 +958,68 @@ static void e752x_check(struct mem_ctl_info *mci)
         e752x_process_error_info(mci, &info, 1);
 }
 
+/* Program byte/sec bandwidth scrub rate to hardware */
+static int set_sdram_scrub_rate(struct mem_ctl_info *mci, u32 *new_bw)
+{
+        const struct scrubrate *scrubrates;
+        struct e752x_pvt *pvt = (struct e752x_pvt *) mci->pvt_info;
+        struct pci_dev *pdev = pvt->dev_d0f0;
+        int i;
+
+        if (pvt->dev_info->ctl_dev == PCI_DEVICE_ID_INTEL_3100_0)
+                scrubrates = scrubrates_i3100;
+        else
+                scrubrates = scrubrates_e752x;
+
+        /* Translate the desired scrub rate to a e752x/3100 register value.
+         * Search for the bandwidth that is equal or greater than the
+         * desired rate and program the cooresponding register value.
+         */
+        for (i = 0; scrubrates[i].bandwidth != SDRATE_EOT; i++)
+                if (scrubrates[i].bandwidth >= *new_bw)
+                        break;
+
+        if (scrubrates[i].bandwidth == SDRATE_EOT)
+                return -1;
+
+        pci_write_config_word(pdev, E752X_MCHSCRB, scrubrates[i].scrubval);
+
+        return 0;
+}
+
+/* Convert current scrub rate value into byte/sec bandwidth */
+static int get_sdram_scrub_rate(struct mem_ctl_info *mci, u32 *bw)
+{
+        const struct scrubrate *scrubrates;
+        struct e752x_pvt *pvt = (struct e752x_pvt *) mci->pvt_info;
+        struct pci_dev *pdev = pvt->dev_d0f0;
+        u16 scrubval;
+        int i;
+
+        if (pvt->dev_info->ctl_dev == PCI_DEVICE_ID_INTEL_3100_0)
+                scrubrates = scrubrates_i3100;
+        else
+                scrubrates = scrubrates_e752x;
+
+        /* Find the bandwidth matching the memory scrubber configuration */
+        pci_read_config_word(pdev, E752X_MCHSCRB, &scrubval);
+        scrubval = scrubval & 0x0f;
+
+        for (i = 0; scrubrates[i].bandwidth != SDRATE_EOT; i++)
+                if (scrubrates[i].scrubval == scrubval)
+                        break;
+
+        if (scrubrates[i].bandwidth == SDRATE_EOT) {
+                e752x_printk(KERN_WARNING,
+                        "Invalid sdram scrub control value: 0x%x\n", scrubval);
+                return -1;
+        }
+
+        *bw = scrubrates[i].bandwidth;
+
+        return 0;
+}
+
 /* Return 1 if dual channel mode is active.  Else return 0. */
 static inline int dual_channel_active(u16 ddrcsr)
 {
@@ -1073,10 +1178,7 @@ fail:
 
 /* Setup system bus parity mask register.
  * Sysbus parity supported on:
- *   e7320/e7520/e7525 + Xeon
- *   i3100 + Xeon/Celeron
- * Sysbus parity not supported on:
- *   i3100 + Pentium M/Celeron M/Core Duo/Core2 Duo
+ * e7320/e7520/e7525 + Xeon
  */
 static void e752x_init_sysbus_parity_mask(struct e752x_pvt *pvt)
 {
@@ -1087,10 +1189,7 @@ static void e752x_init_sysbus_parity_mask(struct e752x_pvt *pvt)
         /* Allow module parameter override, else see if CPU supports parity */
         if (sysbus_parity != -1) {
                 enable = sysbus_parity;
-        } else if (cpu_id[0] &&
-                   ((strstr(cpu_id, "Pentium") && strstr(cpu_id, " M ")) ||
-                    (strstr(cpu_id, "Celeron") && strstr(cpu_id, " M ")) ||
-                    (strstr(cpu_id, "Core") && strstr(cpu_id, "Duo")))) {
+        } else if (cpu_id[0] && !strstr(cpu_id, "Xeon")) {
                 e752x_printk(KERN_INFO, "System Bus Parity not "
                              "supported by CPU, disabling\n");
                 enable = 0;
@@ -1187,6 +1286,8 @@ static int e752x_probe1(struct pci_dev *pdev, int dev_idx)
         mci->dev_name = pci_name(pdev);
         mci->edac_check = e752x_check;
         mci->ctl_page_to_phys = ctl_page_to_phys;
+        mci->set_sdram_scrub_rate = set_sdram_scrub_rate;
+        mci->get_sdram_scrub_rate = get_sdram_scrub_rate;
 
         /* set the map type.  1 = normal, 0 = reversed
          * Must be set before e752x_init_csrows in case csrow mapping
diff --git a/drivers/edac/mpc85xx_edac.c b/drivers/edac/mpc85xx_edac.c
index ecd5928d7110..94cac0aacea3 100644
--- a/drivers/edac/mpc85xx_edac.c
+++ b/drivers/edac/mpc85xx_edac.c
@@ -239,16 +239,15 @@ static int __devinit mpc85xx_pci_err_probe(struct of_device *op,
         /* we only need the error registers */
         r.start += 0xe00;
 
-        if (!devm_request_mem_region(&op->dev, r.start,
-                                        r.end - r.start + 1, pdata->name)) {
+        if (!devm_request_mem_region(&op->dev, r.start, resource_size(&r),
+                                        pdata->name)) {
                 printk(KERN_ERR "%s: Error while requesting mem region\n",
                        __func__);
                 res = -EBUSY;
                 goto err;
         }
 
-        pdata->pci_vbase = devm_ioremap(&op->dev, r.start,
-                                        r.end - r.start + 1);
+        pdata->pci_vbase = devm_ioremap(&op->dev, r.start, resource_size(&r));
         if (!pdata->pci_vbase) {
                 printk(KERN_ERR "%s: Unable to setup PCI err regs\n", __func__);
                 res = -ENOMEM;
@@ -668,15 +667,125 @@ static struct of_platform_driver mpc85xx_l2_err_driver = {
 
 /**************************** MC Err device ***************************/
 
+/*
+ * Taken from table 8-55 in the MPC8641 User's Manual and/or 9-61 in the
+ * MPC8572 User's Manual.  Each line represents a syndrome bit column as a
+ * 64-bit value, but split into an upper and lower 32-bit chunk.  The labels
+ * below correspond to Freescale's manuals.
+ */
+static unsigned int ecc_table[16] = {
+        /* MSB           LSB */
+        /* [0:31]    [32:63] */
+        0xf00fe11e, 0xc33c0ff7, /* Syndrome bit 7 */
+        0x00ff00ff, 0x00fff0ff,
+        0x0f0f0f0f, 0x0f0fff00,
+        0x11113333, 0x7777000f,
+        0x22224444, 0x8888222f,
+        0x44448888, 0xffff4441,
+        0x8888ffff, 0x11118882,
+        0xffff1111, 0x22221114, /* Syndrome bit 0 */
+};
+
+/*
+ * Calculate the correct ECC value for a 64-bit value specified by high:low
+ */
+static u8 calculate_ecc(u32 high, u32 low)
+{
+        u32 mask_low;
+        u32 mask_high;
+        int bit_cnt;
+        u8 ecc = 0;
+        int i;
+        int j;
+
+        for (i = 0; i < 8; i++) {
+                mask_high = ecc_table[i * 2];
+                mask_low = ecc_table[i * 2 + 1];
+                bit_cnt = 0;
+
+                for (j = 0; j < 32; j++) {
+                        if ((mask_high >> j) & 1)
+                                bit_cnt ^= (high >> j) & 1;
+                        if ((mask_low >> j) & 1)
+                                bit_cnt ^= (low >> j) & 1;
+                }
+
+                ecc |= bit_cnt << i;
+        }
+
+        return ecc;
+}
+
+/*
+ * Create the syndrome code which is generated if the data line specified by
+ * 'bit' failed.  Eg generate an 8-bit codes seen in Table 8-55 in the MPC8641
+ * User's Manual and 9-61 in the MPC8572 User's Manual.
+ */
+static u8 syndrome_from_bit(unsigned int bit) {
+        int i;
+        u8 syndrome = 0;
+
+        /*
+         * Cycle through the upper or lower 32-bit portion of each value in
+         * ecc_table depending on if 'bit' is in the upper or lower half of
+         * 64-bit data.
+         */
+        for (i = bit < 32; i < 16; i += 2)
+                syndrome |= ((ecc_table[i] >> (bit % 32)) & 1) << (i / 2);
+
+        return syndrome;
+}
+
+/*
+ * Decode data and ecc syndrome to determine what went wrong
+ * Note: This can only decode single-bit errors
+ */
+static void sbe_ecc_decode(u32 cap_high, u32 cap_low, u32 cap_ecc,
+                       int *bad_data_bit, int *bad_ecc_bit)
+{
+        int i;
+        u8 syndrome;
+
+        *bad_data_bit = -1;
+        *bad_ecc_bit = -1;
+
+        /*
+         * Calculate the ECC of the captured data and XOR it with the captured
+         * ECC to find an ECC syndrome value we can search for
+         */
+        syndrome = calculate_ecc(cap_high, cap_low) ^ cap_ecc;
+
+        /* Check if a data line is stuck... */
+        for (i = 0; i < 64; i++) {
+                if (syndrome == syndrome_from_bit(i)) {
+                        *bad_data_bit = i;
+                        return;
+                }
+        }
+
+        /* If data is correct, check ECC bits for errors... */
+        for (i = 0; i < 8; i++) {
+                if ((syndrome >> i) & 0x1) {
+                        *bad_ecc_bit = i;
+                        return;
+                }
+        }
+}
+
 static void mpc85xx_mc_check(struct mem_ctl_info *mci)
 {
         struct mpc85xx_mc_pdata *pdata = mci->pvt_info;
         struct csrow_info *csrow;
+        u32 bus_width;
         u32 err_detect;
         u32 syndrome;
         u32 err_addr;
         u32 pfn;
         int row_index;
+        u32 cap_high;
+        u32 cap_low;
+        int bad_data_bit;
+        int bad_ecc_bit;
 
         err_detect = in_be32(pdata->mc_vbase + MPC85XX_MC_ERR_DETECT);
         if (!err_detect)
@@ -692,6 +801,15 @@ static void mpc85xx_mc_check(struct mem_ctl_info *mci)
         }
 
         syndrome = in_be32(pdata->mc_vbase + MPC85XX_MC_CAPTURE_ECC);
+
+        /* Mask off appropriate bits of syndrome based on bus width */
+        bus_width = (in_be32(pdata->mc_vbase + MPC85XX_MC_DDR_SDRAM_CFG) &
+                        DSC_DBW_MASK) ? 32 : 64;
+        if (bus_width == 64)
+                syndrome &= 0xff;
+        else
+                syndrome &= 0xffff;
+
         err_addr = in_be32(pdata->mc_vbase + MPC85XX_MC_CAPTURE_ADDRESS);
         pfn = err_addr >> PAGE_SHIFT;
 
@@ -701,14 +819,35 @@ static void mpc85xx_mc_check(struct mem_ctl_info *mci)
                         break;
         }
 
-        mpc85xx_mc_printk(mci, KERN_ERR, "Capture Data High: %#8.8x\n",
-                          in_be32(pdata->mc_vbase +
-                                  MPC85XX_MC_CAPTURE_DATA_HI));
-        mpc85xx_mc_printk(mci, KERN_ERR, "Capture Data Low: %#8.8x\n",
-                          in_be32(pdata->mc_vbase +
-                                  MPC85XX_MC_CAPTURE_DATA_LO));
-        mpc85xx_mc_printk(mci, KERN_ERR, "syndrome: %#8.8x\n", syndrome);
-        mpc85xx_mc_printk(mci, KERN_ERR, "err addr: %#8.8x\n", err_addr);
+        cap_high = in_be32(pdata->mc_vbase + MPC85XX_MC_CAPTURE_DATA_HI);
+        cap_low = in_be32(pdata->mc_vbase + MPC85XX_MC_CAPTURE_DATA_LO);
+
+        /*
+         * Analyze single-bit errors on 64-bit wide buses
+         * TODO: Add support for 32-bit wide buses
+         */
+        if ((err_detect & DDR_EDE_SBE) && (bus_width == 64)) {
+                sbe_ecc_decode(cap_high, cap_low, syndrome,
+                                &bad_data_bit, &bad_ecc_bit);
+
+                if (bad_data_bit != -1)
+                        mpc85xx_mc_printk(mci, KERN_ERR,
+                                "Faulty Data bit: %d\n", bad_data_bit);
+                if (bad_ecc_bit != -1)
+                        mpc85xx_mc_printk(mci, KERN_ERR,
+                                "Faulty ECC bit: %d\n", bad_ecc_bit);
+
+                mpc85xx_mc_printk(mci, KERN_ERR,
+                        "Expected Data / ECC:\t%#8.8x_%08x / %#2.2x\n",
+                        cap_high ^ (1 << (bad_data_bit - 32)),
+                        cap_low ^ (1 << bad_data_bit),
+                        syndrome ^ (1 << bad_ecc_bit));
+        }
+
+        mpc85xx_mc_printk(mci, KERN_ERR,
+                        "Captured Data / ECC:\t%#8.8x_%08x / %#2.2x\n",
+                        cap_high, cap_low, syndrome);
+        mpc85xx_mc_printk(mci, KERN_ERR, "Err addr: %#8.8x\n", err_addr);
         mpc85xx_mc_printk(mci, KERN_ERR, "PFN: %#8.8x\n", pfn);
 
         /* we are out of range */
diff --git a/drivers/edac/mpc85xx_edac.h b/drivers/edac/mpc85xx_edac.h
index 52432ee7c4b9..cb24df839460 100644
--- a/drivers/edac/mpc85xx_edac.h
+++ b/drivers/edac/mpc85xx_edac.h
@@ -48,6 +48,9 @@
 #define DSC_MEM_EN      0x80000000
 #define DSC_ECC_EN      0x20000000
 #define DSC_RD_EN       0x10000000
+#define DSC_DBW_MASK    0x00180000
+#define DSC_DBW_32      0x00080000
+#define DSC_DBW_64      0x00000000
 
 #define DSC_SDTYPE_MASK         0x07000000
 
diff --git a/drivers/gpu/drm/nouveau/nouveau_bios.c b/drivers/gpu/drm/nouveau/nouveau_bios.c
index 71247da17da5..75bceee76044 100644
--- a/drivers/gpu/drm/nouveau/nouveau_bios.c
+++ b/drivers/gpu/drm/nouveau/nouveau_bios.c
@@ -3545,7 +3545,7 @@ int nouveau_bios_parse_lvds_table(struct drm_device *dev, int pxclk, bool *dl, b
          * at which modes should be set up in the dual link style.
          *
          * Following the header, the BMP (ver 0xa) table has several records,
-         * indexed by a seperate xlat table, indexed in turn by the fp strap in
+         * indexed by a separate xlat table, indexed in turn by the fp strap in
          * EXTDEV_BOOT. Each record had a config byte, followed by 6 script
          * numbers for use by INIT_SUB which controlled panel init and power,
          * and finally a dword of ms to sleep between power off and on
diff --git a/drivers/gpu/drm/nouveau/nouveau_drv.h b/drivers/gpu/drm/nouveau/nouveau_drv.h
index 5f8d987af363..4b9aaf2a8d0f 100644
--- a/drivers/gpu/drm/nouveau/nouveau_drv.h
+++ b/drivers/gpu/drm/nouveau/nouveau_drv.h
@@ -553,7 +553,7 @@ struct drm_nouveau_private {
         uint32_t ramro_offset;
         uint32_t ramro_size;
 
-        /* base physical adresses */
+        /* base physical addresses */
         uint64_t fb_phys;
         uint64_t fb_available_size;
         uint64_t fb_mappable_pages;
diff --git a/drivers/gpu/drm/radeon/radeon_state.c b/drivers/gpu/drm/radeon/radeon_state.c
index 3c32f840dcd2..40ab6d9c3736 100644
--- a/drivers/gpu/drm/radeon/radeon_state.c
+++ b/drivers/gpu/drm/radeon/radeon_state.c
@@ -1093,7 +1093,7 @@ static void radeon_cp_dispatch_clear(struct drm_device * dev,
                                         /* judging by the first tile offset needed, could possibly
                                            directly address/clear 4x4 tiles instead of 8x2 * 4x4
                                            macro tiles, though would still need clear mask for
-                                           right/bottom if truely 4x4 granularity is desired ? */
+                                           right/bottom if truly 4x4 granularity is desired ? */
                                         OUT_RING(tileoffset * 16);
                                         /* the number of tiles to clear */
                                         OUT_RING(nrtilesx + 1);
diff --git a/drivers/gpu/drm/via/via_irq.c b/drivers/gpu/drm/via/via_irq.c
index 5935b8842e86..34079f251cd4 100644
--- a/drivers/gpu/drm/via/via_irq.c
+++ b/drivers/gpu/drm/via/via_irq.c
@@ -150,7 +150,7 @@ irqreturn_t via_driver_irq_handler(DRM_IRQ_ARGS)
                 cur_irq++;
         }
 
-        /* Acknowlege interrupts */
+        /* Acknowledge interrupts */
         VIA_WRITE(VIA_REG_INTERRUPT, status);
 
 
@@ -165,7 +165,7 @@ static __inline__ void viadrv_acknowledge_irqs(drm_via_private_t * dev_priv)
         u32 status;
 
         if (dev_priv) {
-                /* Acknowlege interrupts */
+                /* Acknowledge interrupts */
                 status = VIA_READ(VIA_REG_INTERRUPT);
                 VIA_WRITE(VIA_REG_INTERRUPT, status |
                           dev_priv->irq_pending_mask);
diff --git a/drivers/i2c/algos/i2c-algo-pcf.c b/drivers/i2c/algos/i2c-algo-pcf.c
index 7ce75775ec73..6b6bd06202b2 100644
--- a/drivers/i2c/algos/i2c-algo-pcf.c
+++ b/drivers/i2c/algos/i2c-algo-pcf.c
@@ -176,7 +176,7 @@ static int pcf_init_8584 (struct i2c_algo_pcf_data *adap)
          */
         if (((temp = get_pcf(adap, 1)) & 0x7f) != (0)) {
                 DEB2(printk(KERN_ERR "i2c-algo-pcf.o: PCF detection failed -- can't select S0 (0x%02x).\n", temp));
-                return -ENXIO; /* definetly not PCF8584 */
+                return -ENXIO; /* definitely not PCF8584 */
         }
 
         /* load own address in S0, effective address is (own << 1) */
diff --git a/drivers/i2c/busses/i2c-pxa.c b/drivers/i2c/busses/i2c-pxa.c
index 7647a20523a0..90ffbf6f9d4f 100644
--- a/drivers/i2c/busses/i2c-pxa.c
+++ b/drivers/i2c/busses/i2c-pxa.c
@@ -12,7 +12,7 @@
  *
  *  History:
  *    Apr 2002: Initial version [CS]
- *    Jun 2002: Properly seperated algo/adap [FB]
+ *    Jun 2002: Properly separated algo/adap [FB]
  *    Jan 2003: Fixed several bugs concerning interrupt handling [Kai-Uwe Bloem]
  *    Jan 2003: added limited signal handling [Kai-Uwe Bloem]
  *    Sep 2004: Major rework to ensure efficient bus handling [RMK]
diff --git a/drivers/ieee1394/pcilynx.c b/drivers/ieee1394/pcilynx.c
index 9555fd253865..bf47fee79808 100644
--- a/drivers/ieee1394/pcilynx.c
+++ b/drivers/ieee1394/pcilynx.c
@@ -1452,7 +1452,7 @@ static int __devinit add_card(struct pci_dev *dev,
                                 PRINT(KERN_ERR, lynx->id, "unable to read bus info block from i2c");
                         } else {
                                 PRINT(KERN_INFO, lynx->id, "got bus info block from serial eeprom");
-                                /* FIXME: probably we shoud rewrite the max_rec, max_ROM(1394a),
+                                /* FIXME: probably we should rewrite the max_rec, max_ROM(1394a),
                                  * generation(1394a) and link_spd(1394a) field and recalculate
                                  * the CRC */
 
diff --git a/drivers/infiniband/hw/ehca/ehca_qes.h b/drivers/infiniband/hw/ehca/ehca_qes.h
index 5d28e3e98a20..90c4efa67586 100644
--- a/drivers/infiniband/hw/ehca/ehca_qes.h
+++ b/drivers/infiniband/hw/ehca/ehca_qes.h
@@ -46,7 +46,7 @@
 
 #include "ehca_tools.h"
 
-/* virtual scatter gather entry to specify remote adresses with length */
+/* virtual scatter gather entry to specify remote addresses with length */
 struct ehca_vsgentry {
         u64 vaddr;
         u32 lkey;
@@ -148,7 +148,7 @@ struct ehca_wqe {
         u32 immediate_data;
         union {
                 struct {
-                        u64 remote_virtual_adress;
+                        u64 remote_virtual_address;
                         u32 rkey;
                         u32 reserved;
                         u64 atomic_1st_op_dma_len;
diff --git a/drivers/infiniband/hw/ehca/ehca_reqs.c b/drivers/infiniband/hw/ehca/ehca_reqs.c
index e3ec7fdd67bd..9a3fbfca9b41 100644
--- a/drivers/infiniband/hw/ehca/ehca_reqs.c
+++ b/drivers/infiniband/hw/ehca/ehca_reqs.c
@@ -269,7 +269,7 @@ static inline int ehca_write_swqe(struct ehca_qp *qp,
                 /* no break is intentional here */
         case IB_QPT_RC:
                 /* TODO: atomic not implemented */
-                wqe_p->u.nud.remote_virtual_adress =
+                wqe_p->u.nud.remote_virtual_address =
                         send_wr->wr.rdma.remote_addr;
                 wqe_p->u.nud.rkey = send_wr->wr.rdma.rkey;
 
diff --git a/drivers/input/keyboard/locomokbd.c b/drivers/input/keyboard/locomokbd.c
index 9caed30f3bbb..b1ab29861e1c 100644
--- a/drivers/input/keyboard/locomokbd.c
+++ b/drivers/input/keyboard/locomokbd.c
@@ -192,11 +192,18 @@ static void locomokbd_scankeyboard(struct locomokbd *locomokbd)
 static irqreturn_t locomokbd_interrupt(int irq, void *dev_id)
 {
         struct locomokbd *locomokbd = dev_id;
+        u16 r;
+
+        r = locomo_readl(locomokbd->base + LOCOMO_KIC);
+        if ((r & 0x0001) == 0)
+                return IRQ_HANDLED;
+
+        locomo_writel(r & ~0x0100, locomokbd->base + LOCOMO_KIC); /* Ack */
+
         /** wait chattering delay **/
         udelay(100);
 
         locomokbd_scankeyboard(locomokbd);
-
         return IRQ_HANDLED;
 }
 
@@ -210,6 +217,25 @@ static void locomokbd_timer_callback(unsigned long data)
         locomokbd_scankeyboard(locomokbd);
 }
 
+static int locomokbd_open(struct input_dev *dev)
+{
+        struct locomokbd *locomokbd = input_get_drvdata(dev);
+        u16 r;
+        
+        r = locomo_readl(locomokbd->base + LOCOMO_KIC) | 0x0010;
+        locomo_writel(r, locomokbd->base + LOCOMO_KIC);
+        return 0;
+}
+
+static void locomokbd_close(struct input_dev *dev)
+{
+        struct locomokbd *locomokbd = input_get_drvdata(dev);
+        u16 r;
+        
+        r = locomo_readl(locomokbd->base + LOCOMO_KIC) & ~0x0010;
+        locomo_writel(r, locomokbd->base + LOCOMO_KIC);
+}
+
 static int __devinit locomokbd_probe(struct locomo_dev *dev)
 {
         struct locomokbd *locomokbd;
@@ -253,6 +279,8 @@ static int __devinit locomokbd_probe(struct locomo_dev *dev)
         input_dev->id.vendor = 0x0001;
         input_dev->id.product = 0x0001;
         input_dev->id.version = 0x0100;
+        input_dev->open = locomokbd_open;
+        input_dev->close = locomokbd_close;
         input_dev->dev.parent = &dev->dev;
 
         input_dev->evbit[0] = BIT_MASK(EV_KEY) | BIT_MASK(EV_REP) |
@@ -261,6 +289,8 @@ static int __devinit locomokbd_probe(struct locomo_dev *dev)
         input_dev->keycodesize = sizeof(locomokbd_keycode[0]);
         input_dev->keycodemax = ARRAY_SIZE(locomokbd_keycode);
 
+        input_set_drvdata(input_dev, locomokbd);
+
         memcpy(locomokbd->keycode, locomokbd_keycode, sizeof(locomokbd->keycode));
         for (i = 0; i < LOCOMOKBD_NUMKEYS; i++)
                 set_bit(locomokbd->keycode[i], input_dev->keybit);
diff --git a/drivers/input/misc/yealink.h b/drivers/input/misc/yealink.h
index 48af0be9cbdf..1e0f52397010 100644
--- a/drivers/input/misc/yealink.h
+++ b/drivers/input/misc/yealink.h
@@ -127,7 +127,7 @@ struct yld_ctl_packet {
  * yld_status struct.
  */
 
-/* LCD, each segment must be driven seperately.
+/* LCD, each segment must be driven separately.
  *
  * Layout:
  *
diff --git a/drivers/input/serio/i8042.c b/drivers/input/serio/i8042.c
index b54aee7cd9e3..ff4d77c4de11 100644
--- a/drivers/input/serio/i8042.c
+++ b/drivers/input/serio/i8042.c
@@ -430,7 +430,7 @@ static bool i8042_filter(unsigned char data, unsigned char str,
         }
 
         if (i8042_platform_filter && i8042_platform_filter(data, str, serio)) {
-                dbg("Filtered out by platfrom filter\n");
+                dbg("Filtered out by platform filter\n");
                 return true;
         }
 
diff --git a/drivers/input/tablet/aiptek.c b/drivers/input/tablet/aiptek.c
index 7d005a3616d7..4be039d7dcad 100644
--- a/drivers/input/tablet/aiptek.c
+++ b/drivers/input/tablet/aiptek.c
@@ -362,7 +362,7 @@ static const int macroKeyEvents[] = {
 };
 
 /***********************************************************************
- * Map values to strings and back. Every map shoudl have the following
+ * Map values to strings and back. Every map should have the following
  * as its last element: { NULL, AIPTEK_INVALID_VALUE }.
  */
 #define AIPTEK_INVALID_VALUE    -1
diff --git a/drivers/isdn/hardware/mISDN/mISDNisar.c b/drivers/isdn/hardware/mISDN/mISDNisar.c
index 09095c747110..f0bc6fa95809 100644
--- a/drivers/isdn/hardware/mISDN/mISDNisar.c
+++ b/drivers/isdn/hardware/mISDN/mISDNisar.c
@@ -1712,13 +1712,13 @@ mISDNisar_init(struct isar_hw *isar, void *hw)
 }
 EXPORT_SYMBOL(mISDNisar_init);
 
-static int isar_mod_init(void)
+static int __init isar_mod_init(void)
 {
         pr_notice("mISDN: ISAR driver Rev. %s\n", ISAR_REV);
         return 0;
 }
 
-static void isar_mod_cleanup(void)
+static void __exit isar_mod_cleanup(void)
 {
         pr_notice("mISDN: ISAR module unloaded\n");
 }
diff --git a/drivers/isdn/i4l/isdn_common.c b/drivers/isdn/i4l/isdn_common.c
index adb1e8c36b46..00c60e2e0ff7 100644
--- a/drivers/isdn/i4l/isdn_common.c
+++ b/drivers/isdn/i4l/isdn_common.c
@@ -1347,7 +1347,7 @@ isdn_ioctl(struct inode *inode, struct file *file, uint cmd, ulong arg)
 /*
  * isdn net devices manage lots of configuration variables as linked lists.
  * Those lists must only be manipulated from user space. Some of the ioctl's
- * service routines access user space and are not atomic. Therefor, ioctl's
+ * service routines access user space and are not atomic. Therefore, ioctl's
  * manipulating the lists and ioctl's sleeping while accessing the lists
  * are serialized by means of a semaphore.
  */
diff --git a/drivers/isdn/mISDN/dsp_core.c b/drivers/isdn/mISDN/dsp_core.c
index 43ff4d3b046e..6eac588e0a37 100644
--- a/drivers/isdn/mISDN/dsp_core.c
+++ b/drivers/isdn/mISDN/dsp_core.c
@@ -1114,7 +1114,7 @@ static struct Bprotocol DSP = {
         .create = dspcreate
 };
 
-static int dsp_init(void)
+static int __init dsp_init(void)
 {
         int err;
         int tics;
@@ -1212,7 +1212,7 @@ static int dsp_init(void)
 }
 
 
-static void dsp_cleanup(void)
+static void __exit dsp_cleanup(void)
 {
         mISDN_unregister_Bprotocol(&DSP);
 
diff --git a/drivers/isdn/mISDN/l1oip_core.c b/drivers/isdn/mISDN/l1oip_core.c
index f1e8af54dff0..325b1ad7d4b8 100644
--- a/drivers/isdn/mISDN/l1oip_core.c
+++ b/drivers/isdn/mISDN/l1oip_core.c
@@ -477,7 +477,7 @@ l1oip_socket_parse(struct l1oip *hc, struct sockaddr_in *sin, u8 *buf, int len)
                 printk(KERN_DEBUG "%s: received frame, parsing... (%d)\n",
                         __func__, len);
 
-        /* check lenght */
+        /* check length */
         if (len < 1+1+2) {
                 printk(KERN_WARNING "%s: packet error - length %d below "
                         "4 bytes\n", __func__, len);
@@ -1509,7 +1509,7 @@ l1oip_init(void)
                         printk(KERN_DEBUG "%s: interface %d is %s with %s.\n",
                             __func__, l1oip_cnt, pri ? "PRI" : "BRI",
                             bundle ? "bundled IP packet for all B-channels" :
-                            "seperate IP packets for every B-channel");
+                            "separate IP packets for every B-channel");
 
                 hc = kzalloc(sizeof(struct l1oip), GFP_ATOMIC);
                 if (!hc) {
diff --git a/drivers/isdn/sc/hardware.h b/drivers/isdn/sc/hardware.h
index 9e6d5302bf8e..627324856ead 100644
--- a/drivers/isdn/sc/hardware.h
+++ b/drivers/isdn/sc/hardware.h
@@ -87,7 +87,7 @@
 #define BRI_CHANNELS    2               /* Number of B channels */
 #define BRI_BASEPG_VAL  0x98
 #define BRI_MAGIC       0x60000         /* Magic Number */
-#define BRI_MEMSIZE     0x10000         /* Ammount of RAM (64K) */
+#define BRI_MEMSIZE     0x10000         /* Amount of RAM (64K) */
 #define BRI_PARTNO      "72-029"
 #define BRI_FEATURES    ISDN_FEATURE_L2_HDLC | ISDN_FEATURE_L3_TRANS;
 /*
diff --git a/drivers/macintosh/therm_pm72.c b/drivers/macintosh/therm_pm72.c
index 5738d8bf2d97..921373e4e3af 100644
--- a/drivers/macintosh/therm_pm72.c
+++ b/drivers/macintosh/therm_pm72.c
@@ -948,10 +948,16 @@ static void do_monitor_cpu_combined(void)
                 printk(KERN_WARNING "Warning ! Temperature way above maximum (%d) !\n",
                        temp_combi >> 16);
                 state0->overtemp += CPU_MAX_OVERTEMP / 4;
-        } else if (temp_combi > (state0->mpu.tmax << 16))
+        } else if (temp_combi > (state0->mpu.tmax << 16)) {
                 state0->overtemp++;
-        else
+                printk(KERN_WARNING "Temperature %d above max %d. overtemp %d\n",
+                       temp_combi >> 16, state0->mpu.tmax, state0->overtemp);
+        } else {
+                if (state0->overtemp)
+                        printk(KERN_WARNING "Temperature back down to %d\n",
+                               temp_combi >> 16);
                 state0->overtemp = 0;
+        }
         if (state0->overtemp >= CPU_MAX_OVERTEMP)
                 critical_state = 1;
         if (state0->overtemp > 0) {
@@ -1023,10 +1029,16 @@ static void do_monitor_cpu_split(struct cpu_pid_state *state)
                        " (%d) !\n",
                        state->index, temp >> 16);
                 state->overtemp += CPU_MAX_OVERTEMP / 4;
-        } else if (temp > (state->mpu.tmax << 16))
+        } else if (temp > (state->mpu.tmax << 16)) {
                 state->overtemp++;
-        else
+                printk(KERN_WARNING "CPU %d temperature %d above max %d. overtemp %d\n",
+                       state->index, temp >> 16, state->mpu.tmax, state->overtemp);
+        } else {
+                if (state->overtemp)
+                        printk(KERN_WARNING "CPU %d temperature back down to %d\n",
+                               state->index, temp >> 16);
                 state->overtemp = 0;
+        }
         if (state->overtemp >= CPU_MAX_OVERTEMP)
                 critical_state = 1;
         if (state->overtemp > 0) {
@@ -1085,10 +1097,16 @@ static void do_monitor_cpu_rack(struct cpu_pid_state *state)
                        " (%d) !\n",
                        state->index, temp >> 16);
                 state->overtemp = CPU_MAX_OVERTEMP / 4;
-        } else if (temp > (state->mpu.tmax << 16))
+        } else if (temp > (state->mpu.tmax << 16)) {
                 state->overtemp++;
-        else
+                printk(KERN_WARNING "CPU %d temperature %d above max %d. overtemp %d\n",
+                       state->index, temp >> 16, state->mpu.tmax, state->overtemp);
+        } else {
+                if (state->overtemp)
+                        printk(KERN_WARNING "CPU %d temperature back down to %d\n",
+                               state->index, temp >> 16);
                 state->overtemp = 0;
+        }
         if (state->overtemp >= CPU_MAX_OVERTEMP)
                 critical_state = 1;
         if (state->overtemp > 0) {
diff --git a/drivers/macintosh/therm_pm72.h b/drivers/macintosh/therm_pm72.h
index 393cc9df94e1..df3680e2a22f 100644
--- a/drivers/macintosh/therm_pm72.h
+++ b/drivers/macintosh/therm_pm72.h
@@ -269,7 +269,7 @@ struct slots_pid_state
 #define CPU_TEMP_HISTORY_SIZE           2
 #define CPU_POWER_HISTORY_SIZE          10
 #define CPU_PID_INTERVAL                1
-#define CPU_MAX_OVERTEMP                30
+#define CPU_MAX_OVERTEMP                90
 
 #define CPUA_PUMP_RPM_INDEX             7
 #define CPUB_PUMP_RPM_INDEX             8
diff --git a/drivers/media/dvb/dvb-core/dvb_frontend.h b/drivers/media/dvb/dvb-core/dvb_frontend.h
index 52e4ce4304ee..80dda308ff74 100644
--- a/drivers/media/dvb/dvb-core/dvb_frontend.h
+++ b/drivers/media/dvb/dvb-core/dvb_frontend.h
@@ -214,14 +214,14 @@ struct dvb_tuner_ops {
         int (*get_status)(struct dvb_frontend *fe, u32 *status);
         int (*get_rf_strength)(struct dvb_frontend *fe, u16 *strength);
 
-        /** These are provided seperately from set_params in order to facilitate silicon
-         * tuners which require sophisticated tuning loops, controlling each parameter seperately. */
+        /** These are provided separately from set_params in order to facilitate silicon
+         * tuners which require sophisticated tuning loops, controlling each parameter separately. */
         int (*set_frequency)(struct dvb_frontend *fe, u32 frequency);
         int (*set_bandwidth)(struct dvb_frontend *fe, u32 bandwidth);
 
         /*
-         * These are provided seperately from set_params in order to facilitate silicon
-         * tuners which require sophisticated tuning loops, controlling each parameter seperately.
+         * These are provided separately from set_params in order to facilitate silicon
+         * tuners which require sophisticated tuning loops, controlling each parameter separately.
          */
         int (*set_state)(struct dvb_frontend *fe, enum tuner_param param, struct tuner_state *state);
         int (*get_state)(struct dvb_frontend *fe, enum tuner_param param, struct tuner_state *state);
diff --git a/drivers/media/video/bt8xx/bttv-cards.c b/drivers/media/video/bt8xx/bttv-cards.c
index 12279f6d9bc4..716870ae85d5 100644
--- a/drivers/media/video/bt8xx/bttv-cards.c
+++ b/drivers/media/video/bt8xx/bttv-cards.c
@@ -4404,7 +4404,7 @@ static void rv605_muxsel(struct bttv *btv, unsigned int input)
 /* Tibet Systems 'Progress DVR' CS16 muxsel helper [Chris Fanning]
  *
  * The CS16 (available on eBay cheap) is a PCI board with four Fusion
- * 878A chips, a PCI bridge, an Atmel microcontroller, four sync seperator
+ * 878A chips, a PCI bridge, an Atmel microcontroller, four sync separator
  * chips, ten eight input analog multiplexors, a not chip and a few
  * other components.
  *
@@ -4426,7 +4426,7 @@ static void rv605_muxsel(struct bttv *btv, unsigned int input)
  *
  * There is an ATMEL microcontroller with an 8031 core on board.  I have not
  * determined what function (if any) it provides.  With the microcontroller
- * and sync seperator chips a guess is that it might have to do with video
+ * and sync separator chips a guess is that it might have to do with video
  * switching and maybe some digital I/O.
  */
 static void tibetCS16_muxsel(struct bttv *btv, unsigned int input)
diff --git a/drivers/media/video/gspca/ov519.c b/drivers/media/video/gspca/ov519.c
index bc4ced6c013b..f36e11a0458d 100644
--- a/drivers/media/video/gspca/ov519.c
+++ b/drivers/media/video/gspca/ov519.c
@@ -512,7 +512,7 @@ static const struct v4l2_pix_format ovfx2_ov3610_mode[] = {
 /*
  * The FX2 chip does not give us a zero length read at end of frame.
  * It does, however, give a short read at the end of a frame, if
- * neccessary, rather than run two frames together.
+ * necessary, rather than run two frames together.
  *
  * By choosing the right bulk transfer size, we are guaranteed to always
  * get a short read for the last read of each frame.  Frame sizes are
diff --git a/drivers/media/video/pwc/philips.txt b/drivers/media/video/pwc/philips.txt
index f9f3584281d8..d38dd791511e 100644
--- a/drivers/media/video/pwc/philips.txt
+++ b/drivers/media/video/pwc/philips.txt
@@ -33,7 +33,7 @@ a lot of extra information, a FAQ, and the binary plugin 'PWCX'. This plugin
 contains decompression routines that allow you to use higher image sizes and
 framerates; in addition the webcam uses less bandwidth on the USB bus (handy
 if you want to run more than 1 camera simultaneously). These routines fall
-under a NDA, and may therefor not be distributed as source; however, its use
+under a NDA, and may therefore not be distributed as source; however, its use
 is completely optional.
 
 You can build this code either into your kernel, or as a module. I recommend
diff --git a/drivers/media/video/sn9c102/sn9c102_sensor.h b/drivers/media/video/sn9c102/sn9c102_sensor.h
index 4af7382da5c5..494957b10bac 100644
--- a/drivers/media/video/sn9c102/sn9c102_sensor.h
+++ b/drivers/media/video/sn9c102/sn9c102_sensor.h
@@ -120,7 +120,7 @@ extern int sn9c102_write_regs(struct sn9c102_device*, const u8 valreg[][2],
 /*
    Write multiple registers with constant values. For example:
    sn9c102_write_const_regs(cam, {0x00, 0x14}, {0x60, 0x17}, {0x0f, 0x18});
-   Register adresses must be < 256.
+   Register addresses must be < 256.
 */
 #define sn9c102_write_const_regs(sn9c102_device, data...)                     \
         ({ static const u8 _valreg[][2] = {data};                             \
diff --git a/drivers/media/video/tea6420.c b/drivers/media/video/tea6420.c
index 0446524d3543..6bf6bc7dbc7f 100644
--- a/drivers/media/video/tea6420.c
+++ b/drivers/media/video/tea6420.c
@@ -6,7 +6,7 @@
 
     The tea6420 is a bus controlled audio-matrix with 5 stereo inputs,
     4 stereo outputs and gain control for each output.
-    It is cascadable, i.e. it can be found at the adresses 0x98
+    It is cascadable, i.e. it can be found at the addresses 0x98
     and 0x9a on the i2c-bus.
 
     For detailed informations download the specifications directly
diff --git a/drivers/message/i2o/iop.c b/drivers/message/i2o/iop.c
index e5ab62141503..ef5ce2676f05 100644
--- a/drivers/message/i2o/iop.c
+++ b/drivers/message/i2o/iop.c
@@ -539,7 +539,7 @@ static int i2o_iop_reset(struct i2o_controller *c)
                  * which is indeterminate. We need to wait until the IOP has
                  * rebooted before we can let the system talk to it. We read
                  * the inbound Free_List until a message is available. If we
-                 * can't read one in the given ammount of time, we assume the
+                 * can't read one in the given amount of time, we assume the
                  * IOP could not reboot properly.
                  */
                 osm_debug("%s: Reset in progress, waiting for reboot...\n",
diff --git a/drivers/mfd/sm501.c b/drivers/mfd/sm501.c
index dc9ea95c0561..ff0718efb0ae 100644
--- a/drivers/mfd/sm501.c
+++ b/drivers/mfd/sm501.c
@@ -523,7 +523,7 @@ unsigned long sm501_set_clock(struct device *dev,
         unsigned long clock = readl(sm->regs + SM501_CURRENT_CLOCK);
         unsigned char reg;
         unsigned int pll_reg = 0;
-        unsigned long sm501_freq; /* the actual frequency acheived */
+        unsigned long sm501_freq; /* the actual frequency achieved */
 
         struct sm501_clock to;
 
@@ -533,7 +533,7 @@ unsigned long sm501_set_clock(struct device *dev,
 
         switch (clksrc) {
         case SM501_CLOCK_P2XCLK:
-                /* This clock is divided in half so to achive the
+                /* This clock is divided in half so to achieve the
                  * requested frequency the value must be multiplied by
                  * 2. This clock also has an additional pre divisor */
 
@@ -562,7 +562,7 @@ unsigned long sm501_set_clock(struct device *dev,
                 break;
 
         case SM501_CLOCK_V2XCLK:
-                /* This clock is divided in half so to achive the
+                /* This clock is divided in half so to achieve the
                  * requested frequency the value must be multiplied by 2. */
 
                 sm501_freq = (sm501_select_clock(2 * req_freq, &to, 3) / 2);
@@ -648,7 +648,7 @@ unsigned long sm501_find_clock(struct device *dev,
                                unsigned long req_freq)
 {
         struct sm501_devdata *sm = dev_get_drvdata(dev);
-        unsigned long sm501_freq; /* the frequency achiveable by the 501 */
+        unsigned long sm501_freq; /* the frequency achieveable by the 501 */
         struct sm501_clock to;
 
         switch (clksrc) {
diff --git a/drivers/misc/sgi-gru/grutables.h b/drivers/misc/sgi-gru/grutables.h
index 02a77b8b8eef..7a8b9068ea03 100644
--- a/drivers/misc/sgi-gru/grutables.h
+++ b/drivers/misc/sgi-gru/grutables.h
@@ -516,8 +516,7 @@ struct gru_blade_state {
 
 /* Scan all active GRUs in a GRU bitmap */
 #define for_each_gru_in_bitmap(gid, map)                                \
-        for ((gid) = find_first_bit((map), GRU_MAX_GRUS); (gid) < GRU_MAX_GRUS;\
-                (gid)++, (gid) = find_next_bit((map), GRU_MAX_GRUS, (gid)))
+        for_each_set_bit((gid), (map), GRU_MAX_GRUS)
 
 /* Scan all active GRUs on a specific blade */
 #define for_each_gru_on_blade(gru, nid, i)                              \
@@ -536,23 +535,17 @@ struct gru_blade_state {
 
 /* Scan each CBR whose bit is set in a TFM (or copy of) */
 #define for_each_cbr_in_tfm(i, map)                                     \
-        for ((i) = find_first_bit(map, GRU_NUM_CBE);                    \
-                        (i) < GRU_NUM_CBE;                              \
-                        (i)++, (i) = find_next_bit(map, GRU_NUM_CBE, i))
+        for_each_set_bit((i), (map), GRU_NUM_CBE)
 
 /* Scan each CBR in a CBR bitmap. Note: multiple CBRs in an allocation unit */
 #define for_each_cbr_in_allocation_map(i, map, k)                       \
-        for ((k) = find_first_bit(map, GRU_CBR_AU); (k) < GRU_CBR_AU;   \
-                        (k) = find_next_bit(map, GRU_CBR_AU, (k) + 1))  \
+        for_each_set_bit((k), (map), GRU_CBR_AU)                        \
                 for ((i) = (k)*GRU_CBR_AU_SIZE;                         \
                                 (i) < ((k) + 1) * GRU_CBR_AU_SIZE; (i)++)
 
 /* Scan each DSR in a DSR bitmap. Note: multiple DSRs in an allocation unit */
 #define for_each_dsr_in_allocation_map(i, map, k)                       \
-        for ((k) = find_first_bit((const unsigned long *)map, GRU_DSR_AU);\
-                        (k) < GRU_DSR_AU;                               \
-                        (k) = find_next_bit((const unsigned long *)map, \
-                                          GRU_DSR_AU, (k) + 1))         \
+        for_each_set_bit((k), (const unsigned long *)(map), GRU_DSR_AU) \
                 for ((i) = (k) * GRU_DSR_AU_CL;                         \
                                 (i) < ((k) + 1) * GRU_DSR_AU_CL; (i)++)
 
diff --git a/drivers/mmc/card/sdio_uart.c b/drivers/mmc/card/sdio_uart.c
index 3fab78ba8952..723e50894db9 100644
--- a/drivers/mmc/card/sdio_uart.c
+++ b/drivers/mmc/card/sdio_uart.c
@@ -575,7 +575,7 @@ static int uart_carrier_raised(struct tty_port *tport)
         struct sdio_uart_port *port =
                         container_of(tport, struct sdio_uart_port, port);
         unsigned int ret = sdio_uart_claim_func(port);
-        if (ret)        /* Missing hardware shoudn't block for carrier */
+        if (ret)        /* Missing hardware shouldn't block for carrier */
                 return 1;
         ret = sdio_uart_get_mctrl(port);
         sdio_uart_release_func(port);
diff --git a/drivers/mmc/core/core.c b/drivers/mmc/core/core.c
index f4b97d3c3d0f..3168ebd616b2 100644
--- a/drivers/mmc/core/core.c
+++ b/drivers/mmc/core/core.c
@@ -1089,6 +1089,7 @@ void mmc_rescan(struct work_struct *work)
         mmc_claim_host(host);
 
         mmc_power_up(host);
+        sdio_reset(host);
         mmc_go_idle(host);
 
         mmc_send_if_cond(host, host->ocr_avail);
diff --git a/drivers/mmc/core/sdio_ops.c b/drivers/mmc/core/sdio_ops.c
index 4eb7825fd1a7..dea36d9c22e6 100644
--- a/drivers/mmc/core/sdio_ops.c
+++ b/drivers/mmc/core/sdio_ops.c
@@ -67,13 +67,13 @@ int mmc_send_io_op_cond(struct mmc_host *host, u32 ocr, u32 *rocr)
         return err;
 }
 
-int mmc_io_rw_direct(struct mmc_card *card, int write, unsigned fn,
-        unsigned addr, u8 in, u8* out)
+static int mmc_io_rw_direct_host(struct mmc_host *host, int write, unsigned fn,
+        unsigned addr, u8 in, u8 *out)
 {
         struct mmc_command cmd;
         int err;
 
-        BUG_ON(!card);
+        BUG_ON(!host);
         BUG_ON(fn > 7);
 
         /* sanity check */
@@ -90,11 +90,11 @@ int mmc_io_rw_direct(struct mmc_card *card, int write, unsigned fn,
         cmd.arg |= in;
         cmd.flags = MMC_RSP_SPI_R5 | MMC_RSP_R5 | MMC_CMD_AC;
 
-        err = mmc_wait_for_cmd(card->host, &cmd, 0);
+        err = mmc_wait_for_cmd(host, &cmd, 0);
         if (err)
                 return err;
 
-        if (mmc_host_is_spi(card->host)) {
+        if (mmc_host_is_spi(host)) {
                 /* host driver already reported errors */
         } else {
                 if (cmd.resp[0] & R5_ERROR)
@@ -106,7 +106,7 @@ int mmc_io_rw_direct(struct mmc_card *card, int write, unsigned fn,
         }
 
         if (out) {
-                if (mmc_host_is_spi(card->host))
+                if (mmc_host_is_spi(host))
                         *out = (cmd.resp[0] >> 8) & 0xFF;
                 else
                         *out = cmd.resp[0] & 0xFF;
@@ -115,6 +115,13 @@ int mmc_io_rw_direct(struct mmc_card *card, int write, unsigned fn,
         return 0;
 }
 
+int mmc_io_rw_direct(struct mmc_card *card, int write, unsigned fn,
+        unsigned addr, u8 in, u8 *out)
+{
+        BUG_ON(!card);
+        return mmc_io_rw_direct_host(card->host, write, fn, addr, in, out);
+}
+
 int mmc_io_rw_extended(struct mmc_card *card, int write, unsigned fn,
         unsigned addr, int incr_addr, u8 *buf, unsigned blocks, unsigned blksz)
 {
@@ -182,3 +189,20 @@ int mmc_io_rw_extended(struct mmc_card *card, int write, unsigned fn,
         return 0;
 }
 
+int sdio_reset(struct mmc_host *host)
+{
+        int ret;
+        u8 abort;
+
+        /* SDIO Simplified Specification V2.0, 4.4 Reset for SDIO */
+
+        ret = mmc_io_rw_direct_host(host, 0, 0, SDIO_CCCR_ABORT, 0, &abort);
+        if (ret)
+                abort = 0x08;
+        else
+                abort |= 0x08;
+
+        ret = mmc_io_rw_direct_host(host, 1, 0, SDIO_CCCR_ABORT, abort, NULL);
+        return ret;
+}
+
diff --git a/drivers/mmc/core/sdio_ops.h b/drivers/mmc/core/sdio_ops.h
index e2e74b0d17d8..12a4d3ab174c 100644
--- a/drivers/mmc/core/sdio_ops.h
+++ b/drivers/mmc/core/sdio_ops.h
@@ -17,6 +17,7 @@ int mmc_io_rw_direct(struct mmc_card *card, int write, unsigned fn,
         unsigned addr, u8 in, u8* out);
 int mmc_io_rw_extended(struct mmc_card *card, int write, unsigned fn,
         unsigned addr, int incr_addr, u8 *buf, unsigned blocks, unsigned blksz);
+int sdio_reset(struct mmc_host *host);
 
 #endif
 
diff --git a/drivers/mmc/host/msm_sdcc.c b/drivers/mmc/host/msm_sdcc.c
index b31946e0b4ca..4c068e5fe6b2 100644
--- a/drivers/mmc/host/msm_sdcc.c
+++ b/drivers/mmc/host/msm_sdcc.c
@@ -1250,9 +1250,7 @@ msmsdcc_resume(struct platform_device *dev)
 
                 if (mmc->card && mmc->card->type != MMC_TYPE_SDIO)
                         mmc_resume_host(mmc);
-                        if (host->stat_irq)
-                                enable_irq(host->stat_irq);
-                else if (host->stat_irq)
+                if (host->stat_irq)
                         enable_irq(host->stat_irq);
         }
         return 0;
diff --git a/drivers/mmc/host/mxcmmc.c b/drivers/mmc/host/mxcmmc.c
index 60a2b69e54f5..2df90412abb5 100644
--- a/drivers/mmc/host/mxcmmc.c
+++ b/drivers/mmc/host/mxcmmc.c
@@ -4,7 +4,7 @@
  *  This is a driver for the SDHC controller found in Freescale MX2/MX3
  *  SoCs. It is basically the same hardware as found on MX1 (imxmmc.c).
  *  Unlike the hardware found on MX1, this hardware just works and does
- *  not need all the quirks found in imxmmc.c, hence the seperate driver.
+ *  not need all the quirks found in imxmmc.c, hence the separate driver.
  *
  *  Copyright (C) 2008 Sascha Hauer, Pengutronix <s.hauer@pengutronix.de>
  *  Copyright (C) 2006 Pavel Pisa, PiKRON <ppisa@pikron.com>
@@ -708,7 +708,7 @@ static int mxcmci_probe(struct platform_device *pdev)
         mmc->max_blk_size = 2048;
         mmc->max_blk_count = 65535;
         mmc->max_req_size = mmc->max_blk_size * mmc->max_blk_count;
-        mmc->max_seg_size = mmc->max_seg_size;
+        mmc->max_seg_size = mmc->max_req_size;
 
         host = mmc_priv(mmc);
         host->base = ioremap(r->start, resource_size(r));
diff --git a/drivers/mtd/chips/cfi_util.c b/drivers/mtd/chips/cfi_util.c
index ca584d0380b4..ca584d0380b4 100755..100644
--- a/drivers/mtd/chips/cfi_util.c
+++ b/drivers/mtd/chips/cfi_util.c
diff --git a/drivers/mtd/chips/jedec_probe.c b/drivers/mtd/chips/jedec_probe.c
index 1bec5e1ce6ac..8db1148dfa47 100644
--- a/drivers/mtd/chips/jedec_probe.c
+++ b/drivers/mtd/chips/jedec_probe.c
@@ -226,7 +226,7 @@ struct unlock_addr {
  * exists, but is for MTD_UADDR_NOT_SUPPORTED - and, therefore,
  * should not be used.  The  problem is that structures with
  * initializers have extra fields initialized to 0.  It is _very_
- * desireable to have the unlock address entries for unsupported
+ * desirable to have the unlock address entries for unsupported
  * data widths automatically initialized - that means that
  * MTD_UADDR_NOT_SUPPORTED must be 0 and the first entry here
  * must go unused.
diff --git a/drivers/mtd/inftlcore.c b/drivers/mtd/inftlcore.c
index 8aca5523a337..8aca5523a337 100755..100644
--- a/drivers/mtd/inftlcore.c
+++ b/drivers/mtd/inftlcore.c
diff --git a/drivers/mtd/maps/pismo.c b/drivers/mtd/maps/pismo.c
index c48cad271f5d..30e12c88d1da 100644
--- a/drivers/mtd/maps/pismo.c
+++ b/drivers/mtd/maps/pismo.c
@@ -118,7 +118,7 @@ static int __devinit pismo_add_device(struct pismo_data *pismo, int i,
 {
         struct platform_device *dev;
         struct resource res = { };
-        phys_addr_t base = region.base;
+        phys_addr_t base = region->base;
         int ret;
 
         if (base == ~0)
diff --git a/drivers/mtd/maps/plat-ram.c b/drivers/mtd/maps/plat-ram.c
index dafb91944e70..76a76be5a7bd 100644
--- a/drivers/mtd/maps/plat-ram.c
+++ b/drivers/mtd/maps/plat-ram.c
@@ -4,7 +4,7 @@
  *      http://www.simtec.co.uk/products/SWLINUX/
  *      Ben Dooks <ben@simtec.co.uk>
  *
- * Generic platfrom device based RAM map
+ * Generic platform device based RAM map
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
diff --git a/drivers/mtd/nand/Kconfig b/drivers/mtd/nand/Kconfig
index bb6465604235..1157d5679e66 100644
--- a/drivers/mtd/nand/Kconfig
+++ b/drivers/mtd/nand/Kconfig
@@ -444,7 +444,7 @@ config MTD_NAND_FSL_UPM
 
 config MTD_NAND_MXC
         tristate "MXC NAND support"
-        depends on ARCH_MX2 || ARCH_MX3
+        depends on ARCH_MX2 || ARCH_MX25 || ARCH_MX3
         help
           This enables the driver for the NAND flash controller on the
           MXC processors.
diff --git a/drivers/mtd/nand/bcm_umi_nand.c b/drivers/mtd/nand/bcm_umi_nand.c
index 087bcd745bb7..7d1cca7a31a9 100644
--- a/drivers/mtd/nand/bcm_umi_nand.c
+++ b/drivers/mtd/nand/bcm_umi_nand.c
@@ -381,7 +381,7 @@ static int __devinit bcm_umi_nand_probe(struct platform_device *pdev)
         if (!r)
                 return -ENXIO;
 
-        /* map physical adress */
+        /* map physical address */
         bcm_umi_io_base = ioremap(r->start, r->end - r->start + 1);
 
         if (!bcm_umi_io_base) {
@@ -525,7 +525,7 @@ static int bcm_umi_nand_remove(struct platform_device *pdev)
         /* Release resources, unregister device */
         nand_release(board_mtd);
 
-        /* unmap physical adress */
+        /* unmap physical address */
         iounmap(bcm_umi_io_base);
 
         /* Free the MTD device structure */
diff --git a/drivers/mtd/nand/mxc_nand.c b/drivers/mtd/nand/mxc_nand.c
index 45dec5770da0..b2900d8406d3 100644
--- a/drivers/mtd/nand/mxc_nand.c
+++ b/drivers/mtd/nand/mxc_nand.c
@@ -507,7 +507,7 @@ static void mxc_do_addr_cycle(struct mtd_info *mtd, int column, int page_addr)
                  * MXC NANDFC can only perform full page+spare or
                  * spare-only read/write.  When the upper layers
                  * layers perform a read/write buf operation,
-                 * we will used the saved column adress to index into
+                 * we will used the saved column address to index into
                  * the full page.
                  */
                 send_addr(host, 0, page_addr == -1);
diff --git a/drivers/net/atlx/atl2.h b/drivers/net/atlx/atl2.h
index d918bbe621ea..927e4de6474d 100644
--- a/drivers/net/atlx/atl2.h
+++ b/drivers/net/atlx/atl2.h
@@ -442,7 +442,7 @@ struct atl2_hw {
 struct atl2_ring_header {
     /* pointer to the descriptor ring memory */
     void *desc;
-    /* physical adress of the descriptor ring */
+    /* physical address of the descriptor ring */
     dma_addr_t dma;
     /* length of descriptor ring in bytes */
     unsigned int size;
diff --git a/drivers/net/chelsio/sge.c b/drivers/net/chelsio/sge.c
index 71384114a4ed..55d99ca82f8a 100644
--- a/drivers/net/chelsio/sge.c
+++ b/drivers/net/chelsio/sge.c
@@ -248,7 +248,7 @@ static void restart_sched(unsigned long);
  *
  * Interrupts are handled by a single CPU and it is likely that on a MP system
  * the application is migrated to another CPU. In that scenario, we try to
- * seperate the RX(in irq context) and TX state in order to decrease memory
+ * separate the RX(in irq context) and TX state in order to decrease memory
  * contention.
  */
 struct sge {
diff --git a/drivers/net/cs89x0.c b/drivers/net/cs89x0.c
index 14624019ce71..b0208e474f7e 100644
--- a/drivers/net/cs89x0.c
+++ b/drivers/net/cs89x0.c
@@ -580,7 +580,7 @@ cs89x0_probe1(struct net_device *dev, int ioaddr, int modular)
         }
 
 #ifdef CONFIG_SH_HICOSH4
-        /* truely reset the chip */
+        /* truly reset the chip */
         writeword(ioaddr, ADD_PORT, 0x0114);
         writeword(ioaddr, DATA_PORT, 0x0040);
 #endif
diff --git a/drivers/net/cxgb3/sge.c b/drivers/net/cxgb3/sge.c
index 78e265b484b6..67e61b2a8c42 100644
--- a/drivers/net/cxgb3/sge.c
+++ b/drivers/net/cxgb3/sge.c
@@ -197,13 +197,13 @@ static inline void refill_rspq(struct adapter *adapter,
 /**
  *      need_skb_unmap - does the platform need unmapping of sk_buffs?
  *
- *      Returns true if the platfrom needs sk_buff unmapping.  The compiler
+ *      Returns true if the platform needs sk_buff unmapping.  The compiler
  *      optimizes away unecessary code if this returns true.
  */
 static inline int need_skb_unmap(void)
 {
         /*
-         * This structure is used to tell if the platfrom needs buffer
+         * This structure is used to tell if the platform needs buffer
          * unmapping by checking if DECLARE_PCI_UNMAP_ADDR defines anything.
          */
         struct dummy {
diff --git a/drivers/net/davinci_emac.c b/drivers/net/davinci_emac.c
index 1ac9440eb3fb..13f9869927e3 100644
--- a/drivers/net/davinci_emac.c
+++ b/drivers/net/davinci_emac.c
@@ -2658,7 +2658,7 @@ static int __devinit davinci_emac_probe(struct platform_device *pdev)
 
         pdata = pdev->dev.platform_data;
         if (!pdata) {
-                printk(KERN_ERR "DaVinci EMAC: No platfrom data\n");
+                printk(KERN_ERR "DaVinci EMAC: No platform data\n");
                 return -ENODEV;
         }
 
diff --git a/drivers/net/e1000e/82571.c b/drivers/net/e1000e/82571.c
index 3c95acb3a87d..712ccc66ba25 100644
--- a/drivers/net/e1000e/82571.c
+++ b/drivers/net/e1000e/82571.c
@@ -1346,7 +1346,7 @@ static s32 e1000_setup_fiber_serdes_link_82571(struct e1000_hw *hw)
  *
  *  1) down
  *  2) autoneg_progress
- *  3) autoneg_complete (the link sucessfully autonegotiated)
+ *  3) autoneg_complete (the link successfully autonegotiated)
  *  4) forced_up (the link has been forced up, it did not autonegotiate)
  *
  **/
diff --git a/drivers/net/e1000e/lib.c b/drivers/net/e1000e/lib.c
index 2425ed11d5cc..a8b2c0de27c4 100644
--- a/drivers/net/e1000e/lib.c
+++ b/drivers/net/e1000e/lib.c
@@ -647,7 +647,7 @@ s32 e1000e_check_for_serdes_link(struct e1000_hw *hw)
                                 if (!(rxcw & E1000_RXCW_IV)) {
                                         mac->serdes_has_link = true;
                                         e_dbg("SERDES: Link up - autoneg "
-                                           "completed sucessfully.\n");
+                                           "completed successfully.\n");
                                 } else {
                                         mac->serdes_has_link = false;
                                         e_dbg("SERDES: Link down - invalid"
diff --git a/drivers/net/igb/igb_main.c b/drivers/net/igb/igb_main.c
index 583a21c1def3..0ed25f059a00 100644
--- a/drivers/net/igb/igb_main.c
+++ b/drivers/net/igb/igb_main.c
@@ -688,7 +688,7 @@ static void igb_set_interrupt_capability(struct igb_adapter *adapter)
         /* start with one vector for every rx queue */
         numvecs = adapter->num_rx_queues;
 
-        /* if tx handler is seperate add 1 for every tx queue */
+        /* if tx handler is separate add 1 for every tx queue */
         if (!(adapter->flags & IGB_FLAG_QUEUE_PAIRS))
                 numvecs += adapter->num_tx_queues;
 
diff --git a/drivers/net/irda/sa1100_ir.c b/drivers/net/irda/sa1100_ir.c
index c412e8026173..1dcdce0631aa 100644
--- a/drivers/net/irda/sa1100_ir.c
+++ b/drivers/net/irda/sa1100_ir.c
@@ -331,7 +331,7 @@ static int sa1100_irda_resume(struct platform_device *pdev)
                  * If we missed a speed change, initialise at the new speed
                  * directly.  It is debatable whether this is actually
                  * required, but in the interests of continuing from where
-                 * we left off it is desireable.  The converse argument is
+                 * we left off it is desirable.  The converse argument is
                  * that we should re-negotiate at 9600 baud again.
                  */
                 if (si->newspeed) {
diff --git a/drivers/net/ks8851.c b/drivers/net/ks8851.c
index b5219cce12ed..0573e0bb4444 100644
--- a/drivers/net/ks8851.c
+++ b/drivers/net/ks8851.c
@@ -407,7 +407,7 @@ static irqreturn_t ks8851_irq(int irq, void *pw)
  * @buff: The buffer address
  * @len: The length of the data to read
  *
- * Issue an RXQ FIFO read command and read the @len ammount of data from
+ * Issue an RXQ FIFO read command and read the @len amount of data from
  * the FIFO into the buffer specified by @buff.
  */
 static void ks8851_rdfifo(struct ks8851_net *ks, u8 *buff, unsigned len)
diff --git a/drivers/net/qlge/qlge_ethtool.c b/drivers/net/qlge/qlge_ethtool.c
index 05b8bde9980d..7dbff87480dc 100644
--- a/drivers/net/qlge/qlge_ethtool.c
+++ b/drivers/net/qlge/qlge_ethtool.c
@@ -405,7 +405,7 @@ static int ql_set_wol(struct net_device *ndev, struct ethtool_wolinfo *wol)
                 u32 wol = 0;
                 status = ql_mb_wol_mode(qdev, wol);
                 netif_err(qdev, drv, qdev->ndev, "WOL %s (wol code 0x%x)\n",
-                          status == 0 ? "cleared sucessfully" : "clear failed",
+                          status == 0 ? "cleared successfully" : "clear failed",
                           wol);
         }
 
diff --git a/drivers/net/qlge/qlge_main.c b/drivers/net/qlge/qlge_main.c
index c26ec5d740f6..fd34f266c0a8 100644
--- a/drivers/net/qlge/qlge_main.c
+++ b/drivers/net/qlge/qlge_main.c
@@ -3855,7 +3855,7 @@ int ql_wol(struct ql_adapter *qdev)
                 status = ql_mb_wol_mode(qdev, wol);
                 netif_err(qdev, drv, qdev->ndev,
                           "WOL %s (wol code 0x%x) on %s\n",
-                          (status == 0) ? "Sucessfully set" : "Failed",
+                          (status == 0) ? "Successfully set" : "Failed",
                           wol, qdev->ndev->name);
         }
 
diff --git a/drivers/net/sfc/regs.h b/drivers/net/sfc/regs.h
index 89d606fe9248..18a3be428348 100644
--- a/drivers/net/sfc/regs.h
+++ b/drivers/net/sfc/regs.h
@@ -95,7 +95,7 @@
 #define FRF_AA_INT_ACK_KER_FIELD_LBN 0
 #define FRF_AA_INT_ACK_KER_FIELD_WIDTH 32
 
-/* INT_ISR0_REG: Function 0 Interrupt Acknowlege Status register */
+/* INT_ISR0_REG: Function 0 Interrupt Acknowledge Status register */
 #define FR_BZ_INT_ISR0 0x00000090
 #define FRF_BZ_INT_ISR_REG_LBN 0
 #define FRF_BZ_INT_ISR_REG_WIDTH 64
diff --git a/drivers/net/skfp/ess.c b/drivers/net/skfp/ess.c
index a85efcfd9d0e..e8387d25f24a 100644
--- a/drivers/net/skfp/ess.c
+++ b/drivers/net/skfp/ess.c
@@ -557,7 +557,7 @@ static void ess_send_alc_req(struct s_smc *smc)
 
         /*
          * send never allocation request where the requested payload and
-         * overhead is zero or deallocate bandwidht when no bandwidth is
+         * overhead is zero or deallocate bandwidth when no bandwidth is
          * parsed
          */
         if (!smc->mib.fddiESSPayload) {
diff --git a/drivers/net/smsc9420.c b/drivers/net/smsc9420.c
index 30110a11d737..34fa10d8ad40 100644
--- a/drivers/net/smsc9420.c
+++ b/drivers/net/smsc9420.c
@@ -1347,7 +1347,7 @@ static int smsc9420_open(struct net_device *dev)
 
         netif_carrier_off(dev);
 
-        /* disable, mask and acknowlege all interrupts */
+        /* disable, mask and acknowledge all interrupts */
         spin_lock_irqsave(&pd->int_lock, flags);
         int_cfg = smsc9420_reg_read(pd, INT_CFG) & (~INT_CFG_IRQ_EN_);
         smsc9420_reg_write(pd, INT_CFG, int_cfg);
diff --git a/drivers/net/spider_net.c b/drivers/net/spider_net.c
index 2f8a8c32021e..5ba9d989f8fc 100644
--- a/drivers/net/spider_net.c
+++ b/drivers/net/spider_net.c
@@ -474,7 +474,7 @@ spider_net_prepare_rx_descr(struct spider_net_card *card,
  * spider_net_enable_rxchtails - sets RX dmac chain tail addresses
  * @card: card structure
  *
- * spider_net_enable_rxchtails sets the RX DMAC chain tail adresses in the
+ * spider_net_enable_rxchtails sets the RX DMAC chain tail addresses in the
  * chip by writing to the appropriate register. DMA is enabled in
  * spider_net_enable_rxdmac.
  */
@@ -1820,7 +1820,7 @@ spider_net_enable_card(struct spider_net_card *card)
 
         spider_net_write_reg(card, SPIDER_NET_ECMODE, SPIDER_NET_ECMODE_VALUE);
 
-        /* set chain tail adress for RX chains and
+        /* set chain tail address for RX chains and
          * enable DMA */
         spider_net_enable_rxchtails(card);
         spider_net_enable_rxdmac(card);
diff --git a/drivers/net/sungem.c b/drivers/net/sungem.c
index 4344017bfaef..70196bc5fe61 100644
--- a/drivers/net/sungem.c
+++ b/drivers/net/sungem.c
@@ -782,7 +782,7 @@ static int gem_rx(struct gem *gp, int work_to_do)
                         break;
 
                 /* When writing back RX descriptor, GEM writes status
-                 * then buffer address, possibly in seperate transactions.
+                 * then buffer address, possibly in separate transactions.
                  * If we don't wait for the chip to write both, we could
                  * post a new buffer to this descriptor then have GEM spam
                  * on the buffer address.  We sync on the RX completion
diff --git a/drivers/net/tehuti.c b/drivers/net/tehuti.c
index 0c9780217c87..f5493092521a 100644
--- a/drivers/net/tehuti.c
+++ b/drivers/net/tehuti.c
@@ -1851,7 +1851,7 @@ static void bdx_tx_push_desc(struct bdx_priv *priv, void *data, int size)
  * @data - desc's data
  * @size - desc's size
  *
- * NOTE: this func does check for available space and, if neccessary, waits for
+ * NOTE: this func does check for available space and, if necessary, waits for
  *   NIC to read existing data before writing new one.
  */
 static void bdx_tx_push_desc_safe(struct bdx_priv *priv, void *data, int size)
diff --git a/drivers/net/tokenring/tms380tr.c b/drivers/net/tokenring/tms380tr.c
index 21a01753312a..ee71bcfb3753 100644
--- a/drivers/net/tokenring/tms380tr.c
+++ b/drivers/net/tokenring/tms380tr.c
@@ -693,7 +693,7 @@ static netdev_tx_t tms380tr_hardware_send_packet(struct sk_buff *skb,
  * NOTE: This function should be used whenever the status of any TPL must be
  * modified by the driver, because the compiler may otherwise change the
  * order of instructions such that writing the TPL status may be executed at
- * an undesireable time. When this function is used, the status is always
+ * an undesirable time. When this function is used, the status is always
  * written when the function is called.
  */
 static void tms380tr_write_tpl_status(TPL *tpl, unsigned int Status)
@@ -2264,7 +2264,7 @@ static void tms380tr_rcv_status_irq(struct net_device *dev)
  * This function should be used whenever the status of any RPL must be
  * modified by the driver, because the compiler may otherwise change the
  * order of instructions such that writing the RPL status may be executed
- * at an undesireable time. When this function is used, the status is
+ * at an undesirable time. When this function is used, the status is
  * always written when the function is called.
  */
 static void tms380tr_write_rpl_status(RPL *rpl, unsigned int Status)
diff --git a/drivers/net/tun.c b/drivers/net/tun.c
index ce1efa4c0b0d..96c39bddc78c 100644
--- a/drivers/net/tun.c
+++ b/drivers/net/tun.c
@@ -1437,7 +1437,7 @@ static int tun_chr_close(struct inode *inode, struct file *file)
 
                 __tun_detach(tun);
 
-                /* If desireable, unregister the netdevice. */
+                /* If desirable, unregister the netdevice. */
                 if (!(tun->flags & TUN_PERSIST)) {
                         rtnl_lock();
                         if (dev->reg_state == NETREG_REGISTERED)
diff --git a/drivers/net/typhoon.c b/drivers/net/typhoon.c
index e3ddcb8f29df..2fbf15235c05 100644
--- a/drivers/net/typhoon.c
+++ b/drivers/net/typhoon.c
@@ -2096,7 +2096,7 @@ typhoon_tx_timeout(struct net_device *dev)
 
         if(typhoon_reset(tp->ioaddr, WaitNoSleep) < 0) {
                 netdev_warn(dev, "could not reset in tx timeout\n");
-                goto truely_dead;
+                goto truly_dead;
         }
 
         /* If we ever start using the Hi ring, it will need cleaning too */
@@ -2105,13 +2105,13 @@ typhoon_tx_timeout(struct net_device *dev)
 
         if(typhoon_start_runtime(tp) < 0) {
                 netdev_err(dev, "could not start runtime in tx timeout\n");
-                goto truely_dead;
+                goto truly_dead;
         }
 
         netif_wake_queue(dev);
         return;
 
-truely_dead:
+truly_dead:
         /* Reset the hardware, and turn off carrier to avoid more timeouts */
         typhoon_reset(tp->ioaddr, NoWait);
         netif_carrier_off(dev);
diff --git a/drivers/net/ucc_geth.c b/drivers/net/ucc_geth.c
index 23a97518bc1f..1b0aef37e495 100644
--- a/drivers/net/ucc_geth.c
+++ b/drivers/net/ucc_geth.c
@@ -430,7 +430,7 @@ static void hw_add_addr_in_hash(struct ucc_geth_private *ugeth,
             ucc_fast_get_qe_cr_subblock(ugeth->ug_info->uf_info.ucc_num);
 
         /* Ethernet frames are defined in Little Endian mode,
-        therefor to insert */
+        therefore to insert */
         /* the address to the hash (Big Endian mode), we reverse the bytes.*/
 
         set_mac_addr(&p_82xx_addr_filt->taddr.h, p_enet_addr);
diff --git a/drivers/net/wan/cosa.c b/drivers/net/wan/cosa.c
index b36bf96eb502..f0bd70fb650c 100644
--- a/drivers/net/wan/cosa.c
+++ b/drivers/net/wan/cosa.c
@@ -811,7 +811,7 @@ static ssize_t cosa_read(struct file *file,
         cosa_enable_rx(chan);
         spin_lock_irqsave(&cosa->lock, flags);
         add_wait_queue(&chan->rxwaitq, &wait);
-        while(!chan->rx_status) {
+        while (!chan->rx_status) {
                 current->state = TASK_INTERRUPTIBLE;
                 spin_unlock_irqrestore(&cosa->lock, flags);
                 schedule();
@@ -896,7 +896,7 @@ static ssize_t cosa_write(struct file *file,
 
         spin_lock_irqsave(&cosa->lock, flags);
         add_wait_queue(&chan->txwaitq, &wait);
-        while(!chan->tx_status) {
+        while (!chan->tx_status) {
                 current->state = TASK_INTERRUPTIBLE;
                 spin_unlock_irqrestore(&cosa->lock, flags);
                 schedule();
@@ -1153,7 +1153,7 @@ static int cosa_ioctl_common(struct cosa_data *cosa,
         struct channel_data *channel, unsigned int cmd, unsigned long arg)
 {
         void __user *argp = (void __user *)arg;
-        switch(cmd) {
+        switch (cmd) {
         case COSAIORSET:        /* Reset the device */
                 if (!capable(CAP_NET_ADMIN))
                         return -EACCES;
@@ -1704,7 +1704,7 @@ static inline void tx_interrupt(struct cosa_data *cosa, int status)
                         spin_unlock_irqrestore(&cosa->lock, flags);
                         return;
                 }
-                while(1) {
+                while (1) {
                         cosa->txchan++;
                         i++;
                         if (cosa->txchan >= cosa->nchannels)
@@ -2010,7 +2010,7 @@ again:
 static void debug_status_in(struct cosa_data *cosa, int status)
 {
         char *s;
-        switch(status & SR_CMD_FROM_SRP_MASK) {
+        switch (status & SR_CMD_FROM_SRP_MASK) {
         case SR_UP_REQUEST:
                 s = "RX_REQ";
                 break;
diff --git a/drivers/net/wan/hdlc_cisco.c b/drivers/net/wan/hdlc_cisco.c
index f1bff98acd1f..1ceccf1ca6c7 100644
--- a/drivers/net/wan/hdlc_cisco.c
+++ b/drivers/net/wan/hdlc_cisco.c
@@ -141,7 +141,7 @@ static __be16 cisco_type_trans(struct sk_buff *skb, struct net_device *dev)
             data->address != CISCO_UNICAST)
                 return cpu_to_be16(ETH_P_HDLC);
 
-        switch(data->protocol) {
+        switch (data->protocol) {
         case cpu_to_be16(ETH_P_IP):
         case cpu_to_be16(ETH_P_IPX):
         case cpu_to_be16(ETH_P_IPV6):
@@ -190,7 +190,7 @@ static int cisco_rx(struct sk_buff *skb)
                 cisco_data = (struct cisco_packet*)(skb->data + sizeof
                                                     (struct hdlc_header));
 
-                switch(ntohl (cisco_data->type)) {
+                switch (ntohl (cisco_data->type)) {
                 case CISCO_ADDR_REQ: /* Stolen from syncppp.c :-) */
                         in_dev = dev->ip_ptr;
                         addr = 0;
@@ -245,8 +245,8 @@ static int cisco_rx(struct sk_buff *skb)
 
                         dev_kfree_skb_any(skb);
                         return NET_RX_SUCCESS;
-                } /* switch(keepalive type) */
-        } /* switch(protocol) */
+                } /* switch (keepalive type) */
+        } /* switch (protocol) */
 
         printk(KERN_INFO "%s: Unsupported protocol %x\n", dev->name,
                ntohs(data->protocol));
diff --git a/drivers/net/wan/hdlc_x25.c b/drivers/net/wan/hdlc_x25.c
index aa9248f8eb1a..6e1ca256effd 100644
--- a/drivers/net/wan/hdlc_x25.c
+++ b/drivers/net/wan/hdlc_x25.c
@@ -202,10 +202,10 @@ static int x25_ioctl(struct net_device *dev, struct ifreq *ifr)
                 return 0; /* return protocol only, no settable parameters */
 
         case IF_PROTO_X25:
-                if(!capable(CAP_NET_ADMIN))
+                if (!capable(CAP_NET_ADMIN))
                         return -EPERM;
 
-                if(dev->flags & IFF_UP)
+                if (dev->flags & IFF_UP)
                         return -EBUSY;
 
                 result=hdlc->attach(dev, ENCODING_NRZ,PARITY_CRC16_PR1_CCITT);
diff --git a/drivers/net/wimax/i2400m/fw.c b/drivers/net/wimax/i2400m/fw.c
index e803a7dc6502..25c24f0368d8 100644
--- a/drivers/net/wimax/i2400m/fw.c
+++ b/drivers/net/wimax/i2400m/fw.c
@@ -612,7 +612,7 @@ ssize_t i2400m_bm_cmd(struct i2400m *i2400m,
                 goto error_wait_for_ack;
         }
         rx_bytes = result;
-        /* verify the ack and read more if neccessary [result is the
+        /* verify the ack and read more if necessary [result is the
          * final amount of bytes we get in the ack]  */
         result = __i2400m_bm_ack_verify(i2400m, opcode, ack, ack_size, flags);
         if (result < 0)
diff --git a/drivers/net/wimax/i2400m/i2400m.h b/drivers/net/wimax/i2400m/i2400m.h
index 04df9bbe340f..820b128705ec 100644
--- a/drivers/net/wimax/i2400m/i2400m.h
+++ b/drivers/net/wimax/i2400m/i2400m.h
@@ -627,7 +627,7 @@ enum i2400m_bm_cmd_flags {
  * @I2400M_BRI_NO_REBOOT: Do not reboot the device and proceed
  *     directly to wait for a reboot barker from the device.
  * @I2400M_BRI_MAC_REINIT: We need to reinitialize the boot
- *     rom after reading the MAC adress. This is quite a dirty hack,
+ *     rom after reading the MAC address. This is quite a dirty hack,
  *     if you ask me -- the device requires the bootrom to be
  *     intialized after reading the MAC address.
  */
diff --git a/drivers/net/wimax/i2400m/sdio.c b/drivers/net/wimax/i2400m/sdio.c
index 76a50ac02ebb..14f876b1358b 100644
--- a/drivers/net/wimax/i2400m/sdio.c
+++ b/drivers/net/wimax/i2400m/sdio.c
@@ -304,7 +304,7 @@ error_kzalloc:
  *
  * The device will be fully reset internally, but won't be
  * disconnected from the bus (so no reenumeration will
- * happen). Firmware upload will be neccessary.
+ * happen). Firmware upload will be necessary.
  *
  * The device will send a reboot barker that will trigger the driver
  * to reinitialize the state via __i2400m_dev_reset_handle.
@@ -314,7 +314,7 @@ error_kzalloc:
  *
  * The device will be fully reset internally, disconnected from the
  * bus an a reenumeration will happen. Firmware upload will be
- * neccessary. Thus, we don't do any locking or struct
+ * necessary. Thus, we don't do any locking or struct
  * reinitialization, as we are going to be fully disconnected and
  * reenumerated.
  *
diff --git a/drivers/net/wimax/i2400m/usb.c b/drivers/net/wimax/i2400m/usb.c
index 98f4f8c5fb68..99f04c475898 100644
--- a/drivers/net/wimax/i2400m/usb.c
+++ b/drivers/net/wimax/i2400m/usb.c
@@ -246,7 +246,7 @@ error_kzalloc:
  *
  * The device will be fully reset internally, but won't be
  * disconnected from the USB bus (so no reenumeration will
- * happen). Firmware upload will be neccessary.
+ * happen). Firmware upload will be necessary.
  *
  * The device will send a reboot barker in the notification endpoint
  * that will trigger the driver to reinitialize the state
@@ -257,7 +257,7 @@ error_kzalloc:
  *
  * The device will be fully reset internally, disconnected from the
  * USB bus an a reenumeration will happen. Firmware upload will be
- * neccessary. Thus, we don't do any locking or struct
+ * necessary. Thus, we don't do any locking or struct
  * reinitialization, as we are going to be fully disconnected and
  * reenumerated.
  *
diff --git a/drivers/net/wireless/ath/ar9170/main.c b/drivers/net/wireless/ath/ar9170/main.c
index a6452af9c6c5..08dc42da0f63 100644
--- a/drivers/net/wireless/ath/ar9170/main.c
+++ b/drivers/net/wireless/ath/ar9170/main.c
@@ -2512,7 +2512,7 @@ void *ar9170_alloc(size_t priv_size)
         /*
          * this buffer is used for rx stream reconstruction.
          * Under heavy load this device (or the transport layer?)
-         * tends to split the streams into seperate rx descriptors.
+         * tends to split the streams into separate rx descriptors.
          */
 
         skb = __dev_alloc_skb(AR9170_MAX_RX_BUFFER_SIZE, GFP_KERNEL);
diff --git a/drivers/net/wireless/iwmc3200wifi/lmac.h b/drivers/net/wireless/iwmc3200wifi/lmac.h
index a3a79b5e2898..a855a99e49b8 100644
--- a/drivers/net/wireless/iwmc3200wifi/lmac.h
+++ b/drivers/net/wireless/iwmc3200wifi/lmac.h
@@ -262,7 +262,7 @@ struct iwm_ct_kill_cfg_cmd {
 
 /* Power Management */
 #define POWER_TABLE_CMD                 0x77
-#define SAVE_RESTORE_ADRESS_CMD         0x78
+#define SAVE_RESTORE_ADDRESS_CMD                0x78
 #define REPLY_WATERMARK_CMD             0x79
 #define PM_DEBUG_STATISTIC_NOTIFIC      0x7B
 #define PD_FLUSH_N_NOTIFICATION         0x7C
diff --git a/drivers/net/wireless/rt2x00/rt2500usb.c b/drivers/net/wireless/rt2x00/rt2500usb.c
index ee34c137e7cd..9b04964deced 100644
--- a/drivers/net/wireless/rt2x00/rt2500usb.c
+++ b/drivers/net/wireless/rt2x00/rt2500usb.c
@@ -368,7 +368,7 @@ static int rt2500usb_config_key(struct rt2x00_dev *rt2x00dev,
 
                 /*
                  * The encryption key doesn't fit within the CSR cache,
-                 * this means we should allocate it seperately and use
+                 * this means we should allocate it separately and use
                  * rt2x00usb_vendor_request() to send the key to the hardware.
                  */
                 reg = KEY_ENTRY(key->hw_key_idx);
@@ -382,7 +382,7 @@ static int rt2500usb_config_key(struct rt2x00_dev *rt2x00dev,
                 /*
                  * The driver does not support the IV/EIV generation
                  * in hardware. However it demands the data to be provided
-                 * both seperately as well as inside the frame.
+                 * both separately as well as inside the frame.
                  * We already provided the CONFIG_CRYPTO_COPY_IV to rt2x00lib
                  * to ensure rt2x00lib will not strip the data from the
                  * frame after the copy, now we must tell mac80211
diff --git a/drivers/net/wireless/rt2x00/rt2800usb.c b/drivers/net/wireless/rt2x00/rt2800usb.c
index 5e4ee2023fcf..d27d7d5d850c 100644
--- a/drivers/net/wireless/rt2x00/rt2800usb.c
+++ b/drivers/net/wireless/rt2x00/rt2800usb.c
@@ -99,7 +99,7 @@ static int rt2800usb_check_firmware(struct rt2x00_dev *rt2x00dev,
          * There are 2 variations of the rt2870 firmware.
          * a) size: 4kb
          * b) size: 8kb
-         * Note that (b) contains 2 seperate firmware blobs of 4k
+         * Note that (b) contains 2 separate firmware blobs of 4k
          * within the file. The first blob is the same firmware as (a),
          * but the second blob is for the additional chipsets.
          */
@@ -117,7 +117,7 @@ static int rt2800usb_check_firmware(struct rt2x00_dev *rt2x00dev,
 
         /*
          * 8kb firmware files must be checked as if it were
-         * 2 seperate firmware files.
+         * 2 separate firmware files.
          */
         while (offset < len) {
                 if (!rt2800usb_check_crc(data + offset, 4096))
diff --git a/drivers/net/wireless/rt2x00/rt2x00debug.c b/drivers/net/wireless/rt2x00/rt2x00debug.c
index 70c04c282efc..28a1c46ec4eb 100644
--- a/drivers/net/wireless/rt2x00/rt2x00debug.c
+++ b/drivers/net/wireless/rt2x00/rt2x00debug.c
@@ -109,7 +109,7 @@ struct rt2x00debug_intf {
 
         /*
          * HW crypto statistics.
-         * All statistics are stored seperately per cipher type.
+         * All statistics are stored separately per cipher type.
          */
         struct rt2x00debug_crypto crypto_stats[CIPHER_MAX];
 
diff --git a/drivers/net/wireless/rt2x00/rt2x00dev.c b/drivers/net/wireless/rt2x00/rt2x00dev.c
index b93731b79903..dd5ab8fe2321 100644
--- a/drivers/net/wireless/rt2x00/rt2x00dev.c
+++ b/drivers/net/wireless/rt2x00/rt2x00dev.c
@@ -394,7 +394,7 @@ void rt2x00lib_rxdone(struct rt2x00_dev *rt2x00dev,
         /*
          * Hardware might have stripped the IV/EIV/ICV data,
          * in that case it is possible that the data was
-         * provided seperately (through hardware descriptor)
+         * provided separately (through hardware descriptor)
          * in which case we should reinsert the data into the frame.
          */
         if ((rxdesc.dev_flags & RXDONE_CRYPTO_IV) &&
diff --git a/drivers/net/wireless/rt2x00/rt2x00queue.c b/drivers/net/wireless/rt2x00/rt2x00queue.c
index 0b4801a14601..5b6b789cad3d 100644
--- a/drivers/net/wireless/rt2x00/rt2x00queue.c
+++ b/drivers/net/wireless/rt2x00/rt2x00queue.c
@@ -497,7 +497,7 @@ int rt2x00queue_write_tx_frame(struct data_queue *queue, struct sk_buff *skb,
         /*
          * When hardware encryption is supported, and this frame
          * is to be encrypted, we should strip the IV/EIV data from
-         * the frame so we can provide it to the driver seperately.
+         * the frame so we can provide it to the driver separately.
          */
         if (test_bit(ENTRY_TXD_ENCRYPT, &txdesc.flags) &&
             !test_bit(ENTRY_TXD_ENCRYPT_IV, &txdesc.flags)) {
diff --git a/drivers/net/wireless/rt2x00/rt61pci.c b/drivers/net/wireless/rt2x00/rt61pci.c
index e2da928dd9f0..177472742172 100644
--- a/drivers/net/wireless/rt2x00/rt61pci.c
+++ b/drivers/net/wireless/rt2x00/rt61pci.c
@@ -476,7 +476,7 @@ static int rt61pci_config_pairwise_key(struct rt2x00_dev *rt2x00dev,
                  * The driver does not support the IV/EIV generation
                  * in hardware. However it doesn't support the IV/EIV
                  * inside the ieee80211 frame either, but requires it
-                 * to be provided seperately for the descriptor.
+                 * to be provided separately for the descriptor.
                  * rt2x00lib will cut the IV/EIV data out of all frames
                  * given to us by mac80211, but we must tell mac80211
                  * to generate the IV/EIV data.
diff --git a/drivers/net/wireless/rt2x00/rt73usb.c b/drivers/net/wireless/rt2x00/rt73usb.c
index f39a8ed17841..e77aec8d0a84 100644
--- a/drivers/net/wireless/rt2x00/rt73usb.c
+++ b/drivers/net/wireless/rt2x00/rt73usb.c
@@ -339,7 +339,7 @@ static int rt73usb_config_shared_key(struct rt2x00_dev *rt2x00dev,
                  * The driver does not support the IV/EIV generation
                  * in hardware. However it doesn't support the IV/EIV
                  * inside the ieee80211 frame either, but requires it
-                 * to be provided seperately for the descriptor.
+                 * to be provided separately for the descriptor.
                  * rt2x00lib will cut the IV/EIV data out of all frames
                  * given to us by mac80211, but we must tell mac80211
                  * to generate the IV/EIV data.
@@ -439,7 +439,7 @@ static int rt73usb_config_pairwise_key(struct rt2x00_dev *rt2x00dev,
                  * The driver does not support the IV/EIV generation
                  * in hardware. However it doesn't support the IV/EIV
                  * inside the ieee80211 frame either, but requires it
-                 * to be provided seperately for the descriptor.
+                 * to be provided separately for the descriptor.
                  * rt2x00lib will cut the IV/EIV data out of all frames
                  * given to us by mac80211, but we must tell mac80211
                  * to generate the IV/EIV data.
@@ -1661,7 +1661,7 @@ static void rt73usb_fill_rxdone(struct queue_entry *entry,
 
                 /*
                  * Hardware has stripped IV/EIV data from 802.11 frame during
-                 * decryption. It has provided the data seperately but rt2x00lib
+                 * decryption. It has provided the data separately but rt2x00lib
                  * should decide if it should be reinserted.
                  */
                 rxdesc->flags |= RX_FLAG_IV_STRIPPED;
diff --git a/drivers/net/wireless/zd1211rw/zd_mac.c b/drivers/net/wireless/zd1211rw/zd_mac.c
index 2d555cc30508..a22a19203120 100644
--- a/drivers/net/wireless/zd1211rw/zd_mac.c
+++ b/drivers/net/wireless/zd1211rw/zd_mac.c
@@ -374,7 +374,7 @@ static void zd_mac_tx_status(struct ieee80211_hw *hw, struct sk_buff *skb,
  * zd_mac_tx_failed - callback for failed frames
  * @dev: the mac80211 wireless device
  *
- * This function is called if a frame couldn't be successfully be
+ * This function is called if a frame couldn't be successfully
  * transferred. The first frame from the tx queue, will be selected and
  * reported as error to the upper layers.
  */
diff --git a/drivers/parport/ChangeLog b/drivers/parport/ChangeLog
deleted file mode 100644
index 8565bbbeb6ec..000000000000
--- a/drivers/parport/ChangeLog
+++ /dev/null
@@ -1,583 +0,0 @@
-2001-10-11  Tim Waugh  <twaugh@redhat.com>
-        * parport_pc.c, parport_serial.c: Support for NetMos cards.
-        + Patch originally from Michael Reinelt <reinelt@eunet.at>.
-
-2002-04-25  Tim Waugh  <twaugh@redhat.com>
-
-        * parport_serial.c, parport_pc.c: Move some SIIG cards around.
-        Patch from Andrey Panin.
-
-2002-01-20  Tim Waugh  <twaugh@redhat.com>
-
-        * parport_pc.c (parport_pc_compat_write_block_pio,
-        parport_pc_ecp_write_block_pio, parport_pc_ecp_read_block_pio):
-        Use the default implementations if the caller wants to use
-        O_NONBLOCK.
-
-2002-02-25  Tim Waugh  <twaugh@redhat.com>
-
-        * parport_pc.c: Make sure that priv->ctr_writable includes IntEn
-        even if IRQ is given as a parameter.
-
-2002-01-21  Tim Waugh  <twaugh@redhat.com>
-
-        * daisy.c: Apply patch from Max Vorobiev to make parport_daisy_select
-        work for ECP/EPP modes.
-
-2002-01-13  Niels Kristian Bech Jensen  <nkbj@image.dk>
-
-        * parport_pc.c: Change some occurrences of frob_set_mode to
-        ECR_WRITE.  This fixes PLIP.
-
-2002-01-04  Tim Waugh  <twaugh@redhat.com>
-
-        * share.c (parport_claim_or_block): Sleep interruptibly to prevent
-        a possible deadlock.
-
-2001-12-07  Damian Gruszka  <damian.gruszka@VisionSystems.de>
-
-        * parport_pc.c (ECR_WRITE): Define.  If there are forbidden bits
-        in the ECR register for some chips, this will be a useful place to
-        put that knowledge.
-        (change_mode): Use ECR_WRITE.
-        (parport_pc_restore_state): Likewise.
-        (parport_ECPPS2_supported): Likewise.
-        (parport_ECPEPP_supported): Likewise.
-        (irq_probe_EPP): Likewise.
-        (programmable_irq_support): Likewise.
-        (programmable_dma_support): Likewise.
-        (parport_pc_probe_port): Likewise.
-
-        (frob_set_mode): New function.  Set the mode bits of the ECR.
-        (get_fifo_residue): Use frob_set_mode.
-        (parport_pc_ecpepp_read_data): Likewise.
-        (parport_pc_ecpepp_write_data): Likewise.
-        (parport_pc_ecpepp_read_addr): Likewise.
-        (parport_pc_ecpepp_write_addr): Likewise.
-        (parport_pc_compat_write_block_pio): Likewise.
-        (parport_pc_ecp_write_block_pio): Likewise.
-        (parport_ECR_present): Likewise.
-        (parport_ECP_supported): Likewise.
-        (parport_EPP_supported): Likewise.
-        (parport_ECPEPP_supported): Likewise.
-        (programmable_irq_support): Likewise.
-        (irq_probe_ECP): Likewise.
-        (programmable_dma_support): Likewise.
-
-        (parport_pc_enable_irq): Only enable interrupts if we know which
-        IRQ line they will come from.
-        (parport_pc_init_state): Set nErrIntrEn at initialisation.
-        (parport_pc_restore_state): Only write writable bits of CTR.
-        (parport_irq_probe): If no IRQ is found, take ackIntEn out of the
-        writable bit set.
-
-2001-12-07  Tim Waugh  <twaugh@redhat.com>
-
-        * parport_pc.c (parport_pc_fifo_write_block_pio): Correct typo.
-        (parport_pc_init_state): Only set ackIntEn if we know which IRQ
-        line the interrupts will come from.
-
-2001-12-07  Tim Waugh  <twaugh@redhat.com>
-
-        * ieee1284_ops.c (parport_ieee1284_epp_write_addr,
-        parport_ieee1284_epp_read_addr): Actually do something useful.
-
-2001-12-07  Tim Waugh  <twaugh@redhat.com>
-
-        * parport_pc.c (dmaval): Don't use DMA by default.  It seems to be
-        too buggy at the moment.  Use 'dma=auto' to restore the previous
-        behaviour.
-
-2001-12-07  Tim Waugh  <twaugh@redhat.com>
-
-        * daisy.c (DEBUG): Undefine.
-
-2001-12-06  Tim Waugh  <twaugh@redhat.com>
-
-        * ieee1284_ops.c (parport_ieee1284_ecp_read_data): Mask off
-        PARPORT_CONTROL_AUTOFD as well.  Bug spotted by Joe
-        <joeja@mindspring.com>.
-
-2001-12-03  Rich Liu  <Rich.Liu@ite.com.tw>
-
-        * parport_pc.c (sio_ite_8872_probe): ITE8873 is a single-port
-        serial board, not a serial+parallel.
-
-2001-11-30  Niels Kristian Bech Jensen  <nkbj@image.dk>
-
-        * parport_pc.c: Fix compiler warning.
-
-2001-11-14  Tim Waugh  <twaugh@redhat.com>
-
-        * parport_pc.c (parport_pc_pci_probe): Hooks for PCI cards before
-        and after probing for ports.
-        * parport_serial.c (parport_register): Likewise.
-
-2001-11-12  Tim Waugh  <twaugh@redhat.com>
-
-        * parport_pc.c (init_module): Warn when parameters are ignored.
-
-2001-11-01  Damian Gruszka  <damian.gruszka@VisionSystems.de>
-
-        * parport_serial.c (serial_register): Set base_baud before
-        calling register_serial.
-
-2001-10-26  Tim Waugh  <twaugh@redhat.com>
-
-        * parport_pc.c (parport_irq_probe): When ECR programmable IRQ
-        support fails, generate interrupts using the FIFO even if we don't
-        want to use the FIFO for real data transfers.
-        (parport_pc_probe_port): Display the ECR address if we have an
-        ECR, not just if we will use the FIFO.
-
-2001-10-24  Dave Strauss  <D.Strauss@motorola.com>
-
-        * parport_pc.c (parport_pc_compat_write_block_pio,
-        parport_pc_ecp_write_block_pio): Allow a few seconds for an ECP
-        transfer to finish up.
-
-2001-10-11  Tim Waugh  <twaugh@redhat.com>
-
-        * parport_pc (sio_ite_8872_probe): New function, submitted by Rich
-        Liu from ITE.  Cleaned up, removed bogus phys_to_virt calls.
-
-2001-10-24  Tim Waugh  <twaugh@redhat.com>
-
-        * parport_pc.c: Support for AKS AladdinCARD.  Patch from
-        Aladdin Knowledge Systems (Christian Groessler).
-
-2001-10-24  Tim Waugh  <twaugh@redhat.com>
-        
-        * ieee1284_ops.c (parport_ieee1284_ecp_read_data): Try to minimise
-        turnaround time.
-
-        * ieee1284.c (parport_poll_peripheral): Try a couple of times
-        first without delaying.
-
-2001-10-10  Tim Waugh  <twaugh@redhat.com>
-
-        * parport_pc.c: Support for OX16PCI954 PCI card.
-
-2001-10-10  Tim Waugh  <twaugh@redhat.com>
-
-        * parport_pc.c: Support for OX12PCI840 PCI card (reported by
-        mk@daveg.com).  Lock-ups diagnosed by Ronnie Arosa (and now we
-        just don't trust its ECR).
-
-2001-10-10  Gunther Mayer  <gunther.mayer@braunschweig.okersurf.de>
-
-        * parport_pc.c: Support for AVLAB cards.
-
-2001-10-10  Tim Waugh  <twaugh@redhat.com>
-
-        * ieee1284_ops.c (ecp_forward_to_reverse, ecp_reverse_to_forward):
-        Remember to retry direction switch if it fails.  Patch from David
-        Lambert.
-
-2001-10-08  David C. Hansen  <haveblue@us.ibm.com>
-
-        * share.c: Make driverlist_lock and parportlist_lock static.
-
-2001-10-08  Philip Blundell  <philb@gnu.org>
-
-        * parport_pc.c: New modular parameter verbose_logging.
-        Make port->modes indicate the modes that we are prepared to use,
-        rather than the modes that are available.
-
-2001-10-07  Tim Waugh  <twaugh@redhat.com>
-
-        * parport_pc.c (parport_pc_probe_port): Fix memory leak spotted by
-        Kipp Cannon.
-
-2001-10-07  Tim Waugh  <twaugh@redhat.com>
-
-        * parport_serial.c: Remove NetMos support, since it causes problems
-        for some people.
-
-2001-08-30  Tim Waugh  <twaugh@redhat.com>
-
-        * parport_serial.c (parport_serial_pci_probe): Clean-up on partial
-        registration failure.
-
-2001-08-14  Tim Waugh  <twaugh@redhat.com>
-
-        * parport_pc.c (parport_pc_init_superio): Allow for more than one
-        SuperIO device.  Patch from Rich Lio (ITE).
-
-2001-08-11  Tim Waugh  <twaugh@redhat.com>
-
-        * parport_pc.c: Support for Titan Electronics cards.
-
-2001-08-08  Tim Waugh  <twaugh@redhat.com>
-
-        * share.c (parport_unregister_device): Remove device from wait list
-        too.
-
-2001-06-20  Tim Waugh  <twaugh@redhat.com>
-
-        * parport_pc.c: Make 'io_hi=0' work.
-
-2001-05-31  Tim Waugh  <twaugh@redhat.com>
-
-        * parport_serial.c: New file.
-
-2001-06-05  Tim Waugh  <twaugh@redhat.com>
-
-        * parport_pc.c (parport_pc_unregister_port): New exported function.
-        Do the opposite of parport_pc_probe_port.
-        (cleanup_module): Use it.
-
-2001-05-22  Juan Quintela  <quintela@mandrakesoft.com>
-
-        * parport_amiga.c: Set printk levels.
-        * parport_gsc.c: Likewise.
-        * parport_mfc3.c: Likewise.
-        * parport_pc.c: Likewise.
-        * parport_sunbpp.c: Likewise.
-        * probe.c: Likewise.
-        * share.c: Likewise.
-
-2001-05-10  Fred Barnes  <frmb2@ukc.ac.uk>
-
-       * parport_pc.c (parport_pc_epp_read_data): added support for
-       reading from a w91284pic peripheral, flag is PARPORT_W91284PIC.
-
-2001-05-07  Fred Barnes  <frmb2@ukc.ac.uk>
- 
-        * parport_pc.c (parport_pc_epp_read_data,
-        parport_pc_epp_write_data, parport_pc_epp_read_addr,
-        parport_pc_epp_write_addr): support for fast reads/writes using
-        the PARPORT_EPP_FAST flag.
- 
-        * ieee1284.c (parport_read, parport_write): added code to handle
-        software EPP mode (IEEE1284_MODE_EPPSWE).  Added code to allow
-        BYTE mode reverse transfers (previously always went for NIBBLE
-        mode).
- 
-        * ieee1284_ops.c (parport_ieee1284_epp_read_data,
-        parport_ieee1284_epp_write_data): fixed various polarity problems.
-        Also (theoretically) fixed address versions (.._addr), but no
-        hardware to test this on.
- 
-        * parport_pc.h: added parport_dump_state() function for debugging.
-        Needs to have DEBUG_PARPORT to be defined for it to be included.
- 
-2001-05-03  Tim Waugh  <twaugh@redhat.com>
-
-        * parport_pc.c: Fix the compile problem I introduce from the last
-        change.
-
-2001-04-20  Paul Gortmaker  <p_gortmaker@yahoo.com>
-
-        * parport_pc.c: Cut down the size quite a bit (more than 4k off
-        the object, about 1k off the zImage) for the older non-PCI
-        machines which are typically resource starved anyway...
-
-2001-03-26  R Horn  <rjh@world.std.com>
-
-        * parport_pc.c: Some commentary changes.
-
-2001-04-19  Tim Waugh  <twaugh@redhat.com>
-
-        * parport_pc.c (parport_pc_probe_port): Remove __devinit
-        attribute.  Export unconditionally.
-
-2001-04-14  Jeff Garzik  <jgarzik@pobox.com>
-
-        Merged:  2001-03-30  Tim Waugh  <twaugh@redhat.com>
-
-        * drivers/parport/parport_pc.c: Make Via SuperIO chipsets behave
-        like everything else with respect to irq= and dma= parameters.
-
-2001-04-08  Tim Waugh  <twaugh@redhat.com>
-
-      * parport_pc.c (parport_pc_save_state): Read from the soft copy of
-      the control port.
-      (parport_pc_restore_state): Update the soft copy of the control
-      port.
-
-2001-03-26  Tim Waugh  <twaugh@redhat.com>
-
-        * share.c (parport_find_number, parport_find_base): Trigger
-        a lowlevel driver load if there are no ports yet.
-
-2001-03-26  Tim Waugh  <twaugh@redhat.com>
-
-        * parport_pc.c (parport_ECP_supported): Remove the IRQ conflict
-        check since it seems totally unreliable.
-
-2001-03-02  Tim Waugh  <twaugh@redhat.com>
-
-        * ieee1284_ops.c (parport_ieee1284_read_nibble): Reset nAutoFd
-        on timeout.  Matches 2.2.x behaviour.
-
-2001-03-02  Andrew Morton
-
-        * parport_pc.c (registered_parport): New static variable.
-        (parport_pc_find_ports): Set it when we register PCI driver.
-        (init_module): Unregister PCI driver if necessary when we
-        fail.
-
-2001-03-02  Tim Waugh  <twaugh@redhat.com>
-
-        * ieee1284_ops.c (parport_ieee1284_write_compat): Don't use
-        down_trylock to reset the IRQ count.  Don't even use sema_init,
-        because it's not even necessary to reset the count.  I can't
-        remember why we ever did.
-
-2001-01-04  Peter Osterlund  <peter.osterlund@mailbox.swipnet.se>
-
-        * ieee1284.c (parport_negotiate): Fix missing printk argument.
-
-2001-01-03  Paul Schleger  <Paul.Schleger@t-online.de>
-
-        * probe.c (parse_data): Get rid of trailing blanks in values.
-        Needed for XEROX XJ8C printer.
-
-2001-01-03  Tim Waugh  <twaugh@redhat.com>
-
-        * parport_pc.c (parport_pc_probe_port): Say something when probes
-        are omitted.
-
-2001-01-03  Tim Waugh  <twaugh@redhat.com>
-
-        * parport_pc.c (sio_via_686a_probe): Correct dma=255 fix.
-
-2000-11-21  Tim Waugh  <twaugh@redhat.com>
-
-        * parport_pc.c (parport_pc_ecp_write_block_pio): Fix
-        reverse-to-forward logic.  Spotted by Roland Kuck
-        <rci@cityweb.de>.
-
-2000-09-16  Cesar Eduardo Barros  <cesarb@nitnet.com.br>
-
-        * parport_pc.c (sio_via_686a_probe): Handle case
-        where hardware returns 255 for IRQ or DMA.
-
-2000-07-20  Eddie C. Dost  <ecd@skynet.be>
-
-        * share.c (attach_driver_chain): attach[i](port) needs to be
-        replaced by attach[count](port).
-
-2000-07-20  Eddie C. Dost  <ecd@skynet.be>
-
-        * daisy.c (add_dev): kmalloc args are in wrong order.
-
-2000-07-12  Tim Waugh  <twaugh@redhat.com>
-
-        * share.c: Documentation for parport_{get,port}_port,
-        parport_find_{number,base}.
-
-2000-07-12  Tim Waugh  <twaugh@redhat.com>
-
-        * share.c (parport_unregister_device): Remove unneeded locking
-        (test cad==dev).
-        (parport_claim): Likewise.
-        (parport_find_number): New function.
-
-2000-07-12  Tim Waugh  <twaugh@redhat.com>
-
-        * share.c (parport_register_port): Hold the parportlist_lock while
-        looking for a free parport number.
-        (parport_register_driver): Make sure that attach can block.
-        (attach_driver_chain): Likewise.
-
-2000-07-12  Tim Waugh  <twaugh@redhat.com>
-
-        * share.c (call_driver_chain): Do reference counting things.
-        (parport_get_port): New function.
-        (parport_put_port): New function.
-        (parport_register_port): Initialise reference count to zero.
-        (parport_unregister_port): Check reference count rather than
-        driver list to see if we can free the port.
-
-2000-07-12  Tim Waugh  <twaugh@redhat.com>
-
-        * share.c: Clarifications in doc comments.
-
-2000-07-12  Tim Waugh  <twaugh@redhat.com>
-
-        * share.c (parport_unregister_port): Fix typo in comment.
-
-2000-07-11  Gunther Mayer  <gunther.mayer@braunschweig.okersurf.de>
-
-        * parport_pc.c: Support for the full range of Timedia cards.
-
-2000-07-08  Tim Waugh  <twaugh@redhat.com>
-
-        * daisy.c: License block comments as part of parportbook.
-        * ieee1284.c: Likewise.
-        * share.c: Likewise.
-
-2000-06-30  Petr Vandrovec  <vandrove@vc.cvut.cz>
-
-        * procfs.c (do_hardware_modes): Generated string can be up to 34
-        chars long.
-
-2000-06-20  Gunther Mayer  <gunther.mayer@braunschweig.okersurf.de>
-
-        * parport_pc.c (parport_pc_compat_write_block_pio): Warn about
-        change_mode failures.
-        (parport_pc_ecp_write_block_pio): Likewise.
-        (parport_pc_ecp_read_block_pio): Likewise.
-
-2000-06-20  Gunther Mayer  <gunther.mayer@braunschweig.okersurf.de>
-
-        * parport_pc.c (parport_SPP_supported): Warn more about possibly
-        incorrect parameters.
-
-2000-06-15  Tim Waugh  <twaugh@redhat.com>
-
-        * parport_pc.c (parport_ECP_supported): Set PARPORT_MODE_COMPAT
-        for ECP ports, since they can all do hardware accelerated
-        compatibility mode (I assume).
-
-2000-06-13  Tim Waugh  <twaugh@redhat.com>
-
-        * parport_pc.c (cleanup_module): Remark about possible bugs.
-
-2000-06-13  Tim Waugh  <twaugh@redhat.com>
-
-        * procfs.c: Break 'hardware' out into separate files.
-
-2000-05-28  Gunther Mayer  <gunther.mayer@braunschweig.okersurf.de>
-
-        * Fix PCI ID printk for non-superio PCI cards.
-
-2000-05-28  Tim Waugh  <twaugh@redhat.com>
-
-        * share.c (call_driver_chain): Get the driverlist_lock.
-        (parport_register_device): Make sure that port->devices always
-        looks consistent.
-        (parport_register_driver): Ensure that parport drivers are given
-        parameters that are valid for the duration of the callback by
-        locking the portlist against changes.
-        (parport_unregister_driver): Likewise.
-        (parport_claim): Don't overwrite flags.
-
-2000-05-28  Tim Waugh  <twaugh@redhat.com>
-
-        * daisy.c (assign_addrs): Avoid double-probing daisy-chain devices
-        if the first probe succeeds.
-
-2000-05-16  Tim Waugh  <twaugh@redhat.com>
-
-        * share.c (parport_claim): Fix SMP race.
-
-2000-05-15  Gunther Mayer  <gunther.mayer@braunschweig.okersurf.de>
-
-        * parport_pc.c (parport_pc_compat_write_block_pio): Check for
-        timeouts.
-        (parport_pc_ecp_write_block_pio): Likewise.
-        (parport_pc_ecp_read_block_pio): Likewise.
-
-2000-05-02  Gunther Mayer  <gunther.mayer@braunschweig.okersurf.de>
-
-        * parport_pc.c: PCI SYBA patch and verbose PCI detection.
-
-2000-05-02  Gunther Mayer  <gunther.mayer@braunschweig.okersurf.de>
-
-        * parport_pc.c (decode_smsc): Fix SMSC 665/666 identification.
-
-2000-04-28  Tim Waugh  <twaugh@redhat.com>
-
-        * ieee1284.c: Short function descriptions can't be multiline.
-
-        * daisy.c: Short function descriptions can't be multiline.
-
-2000-04-19  Tim Waugh  <twaugh@redhat.com>
-
-        * parport_pc.c (parport_pc_fifo_write_block_dma): Make maxlen
-        calculation a bit clearer.
-
-        * ieee1284.c (parport_negotiate): Turn on data line drivers.
-
-        * ieee1284_ops.c (parport_ieee1284_read_byte): Turn off data line
-        drivers.
-        (parport_ieee1284_write_compat): Turn on data line drivers.
-
-        * daisy.c (assign_addrs): Turn on data line drivers.
-        (cpp_mux): Likewise.
-        (cpp_daisy): Likewise.
-
-2000-04-04  Tim Waugh  <twaugh@redhat.com>
-
-        * parport_pc.c: Add support for another PCI card.
-
-2000-04-04  Tim Waugh  <twaugh@redhat.com>
-
-        * daisy.c: Documentation in kernel-doc format.
-
-        * ieee1284.c: Likewise.
-
-        * share.c: Likewise.
-
-2000-04-01  Tim Waugh  <twaugh@redhat.com>
-
-        * share.c (parport_register_device): Need to hold the module
-        reference counts before sleeping.
-
-2000-03-27  Tim Waugh  <twaugh@redhat.com>
-
-        * parport_pc.c (parport_pc_ecp_read_block_pio): Correct operation
-        when peripheral is trying to send data when we stop listening.
-
-2000-03-22  Tim Waugh  <twaugh@redhat.com>
-
-        * init.c (parport_setup): Fix return value.
-
-2000-03-21  Tim Waugh  <twaugh@redhat.com>
-
-        * parport_pc.c (parport_pc_pci_probe): Fix return value; call
-        pci_enable_device.
-
-2000-03-16  Tim Waugh  <twaugh@redhat.com>
-
-        * parport_pc.c (parport_ECP_supported): This seems to trigger on
-        machines that don't have an IRQ conflict; toned down the warning
-        message accordingly.
-
-2000-03-16  Gunther Mayer  <gunther.mayer@braunschweig.netsurf.de>
-
-        * parport_pc.c (show_parconfig_smsc37c669): Fix typo.
-        (decode_winbond): More IDs.
-        (winbond_check): Protect against false positives.
-        (winbond_check2): Likewise.
-        (smsc_check): Likewise.
-
-2000-03-15  Tim Waugh  <twaugh@redhat.com>
-
-        * parport_pc.c (cleanup_module): Don't call pci_unregister_driver
-        if we didn't call pci_register_driver first.
-
-2000-03-13  Tim Waugh  <twaugh@redhat.com>
-
-        * parport_pc.c (parport_pc_init): Moved from asm/parport.h.
-
-        * Config.in: CONFIG_PARPORT_PC_SUPERIO: new option.
-
-        * parport_pc.c (show_parconfig_smsc37c669): Make __devinit.
-        (show_parconfig_winbond): Likewise.
-        (decode_winbond): Likewise.
-        (decode_smsc): Likewise.
-        (winbond_check): Likewise.
-        (winbond_check2): Likewise.
-        (smsc_check): Likewise.
-        (detect_and_report_winbond): Likewise.
-        (detect_and_report_smsc): Likewise.
-        (get_superio_dma): Likewise.
-        (get_superio_irq): Likewise.
-        (parport_pc_find_isa_ports): New function.
-        (parport_pc_find_ports): New function.
-        (init_module): Make superio a config option, not a parameter.
-
-2000-03-10  Tim Waugh  <twaugh@redhat.com>
-
-        * parport_pc.c (decode_winbond): Use correct 83877ATF chip ID.
-        (decode_winbond): Fix typo.
-
-2000-03-09  Tim Waugh  <twaugh@redhat.com>
-
-        * parport_pc.c: Integrate SuperIO PCI probe with normal PCI card
-        probe, so that the MODULE_DEVICE_TABLE is complete.
-
diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
index 897fa5ccdb78..cb1dd5f4988c 100644
--- a/drivers/pci/pci.c
+++ b/drivers/pci/pci.c
@@ -1583,8 +1583,10 @@ void pci_pm_init(struct pci_dev *dev)
         int pm;
         u16 pmc;
 
+        pm_runtime_forbid(&dev->dev);
         device_enable_async_suspend(&dev->dev);
         dev->wakeup_prepared = false;
+
         dev->pm_cap = 0;
 
         /* find PCI PM capability in list */
@@ -2296,35 +2298,6 @@ void pci_msi_off(struct pci_dev *dev)
         }
 }
 
-#ifndef HAVE_ARCH_PCI_SET_DMA_MASK
-/*
- * These can be overridden by arch-specific implementations
- */
-int
-pci_set_dma_mask(struct pci_dev *dev, u64 mask)
-{
-        if (!pci_dma_supported(dev, mask))
-                return -EIO;
-
-        dev->dma_mask = mask;
-        dev_dbg(&dev->dev, "using %dbit DMA mask\n", fls64(mask));
-
-        return 0;
-}
-    
-int
-pci_set_consistent_dma_mask(struct pci_dev *dev, u64 mask)
-{
-        if (!pci_dma_supported(dev, mask))
-                return -EIO;
-
-        dev->dev.coherent_dma_mask = mask;
-        dev_dbg(&dev->dev, "using %dbit consistent DMA mask\n", fls64(mask));
-
-        return 0;
-}
-#endif
-
 #ifndef HAVE_ARCH_PCI_SET_DMA_MAX_SEGMENT_SIZE
 int pci_set_dma_max_seg_size(struct pci_dev *dev, unsigned int size)
 {
@@ -3066,8 +3039,6 @@ EXPORT_SYMBOL(pci_set_mwi);
 EXPORT_SYMBOL(pci_try_set_mwi);
 EXPORT_SYMBOL(pci_clear_mwi);
 EXPORT_SYMBOL_GPL(pci_intx);
-EXPORT_SYMBOL(pci_set_dma_mask);
-EXPORT_SYMBOL(pci_set_consistent_dma_mask);
 EXPORT_SYMBOL(pci_assign_resource);
 EXPORT_SYMBOL(pci_find_parent_resource);
 EXPORT_SYMBOL(pci_select_bars);
diff --git a/drivers/pcmcia/sa1111_generic.c b/drivers/pcmcia/sa1111_generic.c
index de6bc333d299..db79ca61cf96 100644
--- a/drivers/pcmcia/sa1111_generic.c
+++ b/drivers/pcmcia/sa1111_generic.c
@@ -21,11 +21,18 @@
 
 #include "sa1111_generic.h"
 
+#define IDX_IRQ_S0_READY_NINT   (0)
+#define IDX_IRQ_S0_CD_VALID     (1)
+#define IDX_IRQ_S0_BVD1_STSCHG  (2)
+#define IDX_IRQ_S1_READY_NINT   (3)
+#define IDX_IRQ_S1_CD_VALID     (4)
+#define IDX_IRQ_S1_BVD1_STSCHG  (5)
+
 static struct pcmcia_irqs irqs[] = {
-        { 0, IRQ_S0_CD_VALID,    "SA1111 PCMCIA card detect" },
-        { 0, IRQ_S0_BVD1_STSCHG, "SA1111 PCMCIA BVD1"        },
-        { 1, IRQ_S1_CD_VALID,    "SA1111 CF card detect"     },
-        { 1, IRQ_S1_BVD1_STSCHG, "SA1111 CF BVD1"            },
+        { 0, NO_IRQ, "SA1111 PCMCIA card detect" },
+        { 0, NO_IRQ, "SA1111 PCMCIA BVD1"        },
+        { 1, NO_IRQ, "SA1111 CF card detect"     },
+        { 1, NO_IRQ, "SA1111 CF BVD1"            },
 };
 
 static int sa1111_pcmcia_hw_init(struct soc_pcmcia_socket *skt)
@@ -136,7 +143,9 @@ int sa1111_pcmcia_add(struct sa1111_dev *dev, struct pcmcia_low_level *ops,
                 s->soc.ops = ops;
                 s->soc.socket.owner = ops->owner;
                 s->soc.socket.dev.parent = &dev->dev;
-                s->soc.socket.pci_irq = s->soc.nr ? IRQ_S1_READY_NINT : IRQ_S0_READY_NINT;
+                s->soc.socket.pci_irq = s->soc.nr ?
+                                dev->irq[IDX_IRQ_S0_READY_NINT] :
+                                dev->irq[IDX_IRQ_S1_READY_NINT];
                 s->dev = dev;
 
                 ret = add(&s->soc);
@@ -162,6 +171,12 @@ static int pcmcia_probe(struct sa1111_dev *dev)
 
         base = dev->mapbase;
 
+        /* Initialize PCMCIA IRQs */
+        irqs[0].irq = dev->irq[IDX_IRQ_S0_CD_VALID];
+        irqs[1].irq = dev->irq[IDX_IRQ_S0_BVD1_STSCHG];
+        irqs[2].irq = dev->irq[IDX_IRQ_S1_CD_VALID];
+        irqs[3].irq = dev->irq[IDX_IRQ_S1_BVD1_STSCHG];
+
         /*
          * Initialise the suspend state.
          */
diff --git a/drivers/platform/x86/thinkpad_acpi.c b/drivers/platform/x86/thinkpad_acpi.c
index e7b0c3bcef89..c64e3528889b 100644
--- a/drivers/platform/x86/thinkpad_acpi.c
+++ b/drivers/platform/x86/thinkpad_acpi.c
@@ -1668,7 +1668,7 @@ static void tpacpi_remove_driver_attributes(struct device_driver *drv)
  * Table of recommended minimum BIOS versions
  *
  * Reasons for listing:
- *    1. Stable BIOS, listed because the unknown ammount of
+ *    1. Stable BIOS, listed because the unknown amount of
  *       bugs and bad ACPI behaviour on older versions
  *
  *    2. BIOS or EC fw with known bugs that trigger on Linux
@@ -7108,7 +7108,7 @@ static struct ibm_struct volume_driver_data = {
  *
  *      Fan speed changes of any sort (including those caused by the
  *      disengaged mode) are usually done slowly by the firmware as the
- *      maximum ammount of fan duty cycle change per second seems to be
+ *      maximum amount of fan duty cycle change per second seems to be
  *      limited.
  *
  *      Reading is not available if GFAN exists.
diff --git a/drivers/pps/Kconfig b/drivers/pps/Kconfig
index cc2eb8edb514..1afe4e03440f 100644
--- a/drivers/pps/Kconfig
+++ b/drivers/pps/Kconfig
@@ -30,4 +30,6 @@ config PPS_DEBUG
           messages to the system log.  Select this if you are having a
           problem with PPS support and want to see more of what is going on.
 
+source drivers/pps/clients/Kconfig
+
 endmenu
diff --git a/drivers/pps/Makefile b/drivers/pps/Makefile
index 19ea582f431d..98960ddd3188 100644
--- a/drivers/pps/Makefile
+++ b/drivers/pps/Makefile
@@ -4,5 +4,6 @@
 
 pps_core-y                      := pps.o kapi.o sysfs.o
 obj-$(CONFIG_PPS)               := pps_core.o
+obj-y                           += clients/
 
 ccflags-$(CONFIG_PPS_DEBUG) := -DDEBUG
diff --git a/drivers/pps/clients/Kconfig b/drivers/pps/clients/Kconfig
new file mode 100644
index 000000000000..4e801bd7254f
--- /dev/null
+++ b/drivers/pps/clients/Kconfig
@@ -0,0 +1,25 @@
+#
+# PPS clients configuration
+#
+
+if PPS
+
+comment "PPS clients support"
+
+config PPS_CLIENT_KTIMER
+        tristate "Kernel timer client (Testing client, use for debug)"
+        help
+          If you say yes here you get support for a PPS debugging client
+          which uses a kernel timer to generate the PPS signal.
+
+          This driver can also be built as a module.  If so, the module
+          will be called pps-ktimer.
+
+config PPS_CLIENT_LDISC
+        tristate "PPS line discipline"
+        depends on PPS
+        help
+          If you say yes here you get support for a PPS source connected
+          with the CD (Carrier Detect) pin of your serial port.
+
+endif
diff --git a/drivers/pps/clients/Makefile b/drivers/pps/clients/Makefile
new file mode 100644
index 000000000000..812c9b19b430
--- /dev/null
+++ b/drivers/pps/clients/Makefile
@@ -0,0 +1,10 @@
+#
+# Makefile for PPS clients.
+#
+
+obj-$(CONFIG_PPS_CLIENT_KTIMER) += pps-ktimer.o
+obj-$(CONFIG_PPS_CLIENT_LDISC)  += pps-ldisc.o
+
+ifeq ($(CONFIG_PPS_DEBUG),y)
+EXTRA_CFLAGS += -DDEBUG
+endif
diff --git a/drivers/pps/clients/pps-ktimer.c b/drivers/pps/clients/pps-ktimer.c
new file mode 100644
index 000000000000..e7ef5b8186d0
--- /dev/null
+++ b/drivers/pps/clients/pps-ktimer.c
@@ -0,0 +1,123 @@
+/*
+ * pps-ktimer.c -- kernel timer test client
+ *
+ *
+ * Copyright (C) 2005-2006   Rodolfo Giometti <giometti@linux.it>
+ *
+ *   This program is free software; you can redistribute it and/or modify
+ *   it under the terms of the GNU General Public License as published by
+ *   the Free Software Foundation; either version 2 of the License, or
+ *   (at your option) any later version.
+ *
+ *   This program is distributed in the hope that it will be useful,
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *   GNU General Public License for more details.
+ *
+ *   You should have received a copy of the GNU General Public License
+ *   along with this program; if not, write to the Free Software
+ *   Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/time.h>
+#include <linux/timer.h>
+#include <linux/pps_kernel.h>
+
+/*
+ * Global variables
+ */
+
+static int source;
+static struct timer_list ktimer;
+
+/*
+ * The kernel timer
+ */
+
+static void pps_ktimer_event(unsigned long ptr)
+{
+        struct timespec __ts;
+        struct pps_ktime ts;
+
+        /* First of all we get the time stamp... */
+        getnstimeofday(&__ts);
+
+        pr_info("PPS event at %lu\n", jiffies);
+
+        /* ... and translate it to PPS time data struct */
+        ts.sec = __ts.tv_sec;
+        ts.nsec = __ts.tv_nsec;
+
+        pps_event(source, &ts, PPS_CAPTUREASSERT, NULL);
+
+        mod_timer(&ktimer, jiffies + HZ);
+}
+
+/*
+ * The echo function
+ */
+
+static void pps_ktimer_echo(int source, int event, void *data)
+{
+        pr_info("echo %s %s for source %d\n",
+                event & PPS_CAPTUREASSERT ? "assert" : "",
+                event & PPS_CAPTURECLEAR ? "clear" : "",
+                source);
+}
+
+/*
+ * The PPS info struct
+ */
+
+static struct pps_source_info pps_ktimer_info = {
+        .name           = "ktimer",
+        .path           = "",
+        .mode           = PPS_CAPTUREASSERT | PPS_OFFSETASSERT |
+                          PPS_ECHOASSERT |
+                          PPS_CANWAIT | PPS_TSFMT_TSPEC,
+        .echo           = pps_ktimer_echo,
+        .owner          = THIS_MODULE,
+};
+
+/*
+ * Module staff
+ */
+
+static void __exit pps_ktimer_exit(void)
+{
+        del_timer_sync(&ktimer);
+        pps_unregister_source(source);
+
+        pr_info("ktimer PPS source unregistered\n");
+}
+
+static int __init pps_ktimer_init(void)
+{
+        int ret;
+
+        ret = pps_register_source(&pps_ktimer_info,
+                                PPS_CAPTUREASSERT | PPS_OFFSETASSERT);
+        if (ret < 0) {
+                printk(KERN_ERR "cannot register ktimer source\n");
+                return ret;
+        }
+        source = ret;
+
+        setup_timer(&ktimer, pps_ktimer_event, 0);
+        mod_timer(&ktimer, jiffies + HZ);
+
+        pr_info("ktimer PPS source registered at %d\n", source);
+
+        return  0;
+}
+
+module_init(pps_ktimer_init);
+module_exit(pps_ktimer_exit);
+
+MODULE_AUTHOR("Rodolfo Giometti <giometti@linux.it>");
+MODULE_DESCRIPTION("dummy PPS source by using a kernel timer (just for debug)");
+MODULE_LICENSE("GPL");
diff --git a/drivers/pps/clients/pps-ldisc.c b/drivers/pps/clients/pps-ldisc.c
new file mode 100644
index 000000000000..8e1932d29fd4
--- /dev/null
+++ b/drivers/pps/clients/pps-ldisc.c
@@ -0,0 +1,154 @@
+/*
+ * pps-ldisc.c -- PPS line discipline
+ *
+ *
+ * Copyright (C) 2008   Rodolfo Giometti <giometti@linux.it>
+ *
+ *   This program is free software; you can redistribute it and/or modify
+ *   it under the terms of the GNU General Public License as published by
+ *   the Free Software Foundation; either version 2 of the License, or
+ *   (at your option) any later version.
+ *
+ *   This program is distributed in the hope that it will be useful,
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *   GNU General Public License for more details.
+ *
+ *   You should have received a copy of the GNU General Public License
+ *   along with this program; if not, write to the Free Software
+ *   Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <linux/module.h>
+#include <linux/serial_core.h>
+#include <linux/tty.h>
+#include <linux/pps_kernel.h>
+
+#define PPS_TTY_MAGIC           0x0001
+
+static void pps_tty_dcd_change(struct tty_struct *tty, unsigned int status,
+                                struct timespec *ts)
+{
+        int id = (long)tty->disc_data;
+        struct timespec __ts;
+        struct pps_ktime pps_ts;
+
+        /* First of all we get the time stamp... */
+        getnstimeofday(&__ts);
+
+        /* Does caller give us a timestamp? */
+        if (ts) {       /* Yes. Let's use it! */
+                pps_ts.sec = ts->tv_sec;
+                pps_ts.nsec = ts->tv_nsec;
+        } else {        /* No. Do it ourself! */
+                pps_ts.sec = __ts.tv_sec;
+                pps_ts.nsec = __ts.tv_nsec;
+        }
+
+        /* Now do the PPS event report */
+        pps_event(id, &pps_ts, status ? PPS_CAPTUREASSERT : PPS_CAPTURECLEAR,
+                        NULL);
+
+        pr_debug("PPS %s at %lu on source #%d\n",
+                        status ? "assert" : "clear", jiffies, id);
+}
+
+static int (*alias_n_tty_open)(struct tty_struct *tty);
+
+static int pps_tty_open(struct tty_struct *tty)
+{
+        struct pps_source_info info;
+        struct tty_driver *drv = tty->driver;
+        int index = tty->index + drv->name_base;
+        int ret;
+
+        info.owner = THIS_MODULE;
+        info.dev = NULL;
+        snprintf(info.name, PPS_MAX_NAME_LEN, "%s%d", drv->driver_name, index);
+        snprintf(info.path, PPS_MAX_NAME_LEN, "/dev/%s%d", drv->name, index);
+        info.mode = PPS_CAPTUREBOTH | \
+                        PPS_OFFSETASSERT | PPS_OFFSETCLEAR | \
+                        PPS_CANWAIT | PPS_TSFMT_TSPEC;
+
+        ret = pps_register_source(&info, PPS_CAPTUREBOTH | \
+                                PPS_OFFSETASSERT | PPS_OFFSETCLEAR);
+        if (ret < 0) {
+                pr_err("cannot register PPS source \"%s\"\n", info.path);
+                return ret;
+        }
+        tty->disc_data = (void *)(long)ret;
+
+        /* Should open N_TTY ldisc too */
+        ret = alias_n_tty_open(tty);
+        if (ret < 0)
+                pps_unregister_source((long)tty->disc_data);
+
+        pr_info("PPS source #%d \"%s\" added\n", ret, info.path);
+
+        return 0;
+}
+
+static void (*alias_n_tty_close)(struct tty_struct *tty);
+
+static void pps_tty_close(struct tty_struct *tty)
+{
+        int id = (long)tty->disc_data;
+
+        pps_unregister_source(id);
+        alias_n_tty_close(tty);
+
+        pr_info("PPS source #%d removed\n", id);
+}
+
+static struct tty_ldisc_ops pps_ldisc_ops;
+
+/*
+ * Module stuff
+ */
+
+static int __init pps_tty_init(void)
+{
+        int err;
+
+        /* Inherit the N_TTY's ops */
+        n_tty_inherit_ops(&pps_ldisc_ops);
+
+        /* Save N_TTY's open()/close() methods */
+        alias_n_tty_open = pps_ldisc_ops.open;
+        alias_n_tty_close = pps_ldisc_ops.close;
+
+        /* Init PPS_TTY data */
+        pps_ldisc_ops.owner = THIS_MODULE;
+        pps_ldisc_ops.magic = PPS_TTY_MAGIC;
+        pps_ldisc_ops.name = "pps_tty";
+        pps_ldisc_ops.dcd_change = pps_tty_dcd_change;
+        pps_ldisc_ops.open = pps_tty_open;
+        pps_ldisc_ops.close = pps_tty_close;
+
+        err = tty_register_ldisc(N_PPS, &pps_ldisc_ops);
+        if (err)
+                pr_err("can't register PPS line discipline\n");
+        else
+                pr_info("PPS line discipline registered\n");
+
+        return err;
+}
+
+static void __exit pps_tty_cleanup(void)
+{
+        int err;
+
+        err = tty_unregister_ldisc(N_PPS);
+        if (err)
+                pr_err("can't unregister PPS line discipline\n");
+        else
+                pr_info("PPS line discipline removed\n");
+}
+
+module_init(pps_tty_init);
+module_exit(pps_tty_cleanup);
+
+MODULE_ALIAS_LDISC(N_PPS);
+MODULE_AUTHOR("Rodolfo Giometti <giometti@linux.it>");
+MODULE_DESCRIPTION("PPS TTY device driver");
+MODULE_LICENSE("GPL");
diff --git a/drivers/rtc/hctosys.c b/drivers/rtc/hctosys.c
index 33c0e98243ee..bc90b091f195 100644
--- a/drivers/rtc/hctosys.c
+++ b/drivers/rtc/hctosys.c
@@ -22,48 +22,57 @@
  * the best guess is to add 0.5s.
  */
 
+int rtc_hctosys_ret = -ENODEV;
+
 static int __init rtc_hctosys(void)
 {
-        int err;
+        int err = -ENODEV;
         struct rtc_time tm;
+        struct timespec tv = {
+                .tv_nsec = NSEC_PER_SEC >> 1,
+        };
         struct rtc_device *rtc = rtc_class_open(CONFIG_RTC_HCTOSYS_DEVICE);
 
         if (rtc == NULL) {
-                printk("%s: unable to open rtc device (%s)\n",
+                pr_err("%s: unable to open rtc device (%s)\n",
                         __FILE__, CONFIG_RTC_HCTOSYS_DEVICE);
-                return -ENODEV;
+                goto err_open;
         }
 
         err = rtc_read_time(rtc, &tm);
-        if (err == 0) {
-                err = rtc_valid_tm(&tm);
-                if (err == 0) {
-                        struct timespec tv;
+        if (err) {
+                dev_err(rtc->dev.parent,
+                        "hctosys: unable to read the hardware clock\n");
+                goto err_read;
 
-                        tv.tv_nsec = NSEC_PER_SEC >> 1;
+        }
 
-                        rtc_tm_to_time(&tm, &tv.tv_sec);
+        err = rtc_valid_tm(&tm);
+        if (err) {
+                dev_err(rtc->dev.parent,
+                        "hctosys: invalid date/time\n");
+                goto err_invalid;
+        }
 
-                        do_settimeofday(&tv);
+        rtc_tm_to_time(&tm, &tv.tv_sec);
 
-                        dev_info(rtc->dev.parent,
-                                "setting system clock to "
-                                "%d-%02d-%02d %02d:%02d:%02d UTC (%u)\n",
-                                tm.tm_year + 1900, tm.tm_mon + 1, tm.tm_mday,
-                                tm.tm_hour, tm.tm_min, tm.tm_sec,
-                                (unsigned int) tv.tv_sec);
-                }
-                else
-                        dev_err(rtc->dev.parent,
-                                "hctosys: invalid date/time\n");
-        }
-        else
-                dev_err(rtc->dev.parent,
-                        "hctosys: unable to read the hardware clock\n");
+        do_settimeofday(&tv);
 
+        dev_info(rtc->dev.parent,
+                "setting system clock to "
+                "%d-%02d-%02d %02d:%02d:%02d UTC (%u)\n",
+                tm.tm_year + 1900, tm.tm_mon + 1, tm.tm_mday,
+                tm.tm_hour, tm.tm_min, tm.tm_sec,
+                (unsigned int) tv.tv_sec);
+
+err_invalid:
+err_read:
         rtc_class_close(rtc);
 
-        return 0;
+err_open:
+        rtc_hctosys_ret = err;
+
+        return err;
 }
 
 late_initcall(rtc_hctosys);
diff --git a/drivers/rtc/rtc-sysfs.c b/drivers/rtc/rtc-sysfs.c
index 7dd23a6fc825..380083ca572f 100644
--- a/drivers/rtc/rtc-sysfs.c
+++ b/drivers/rtc/rtc-sysfs.c
@@ -107,8 +107,9 @@ rtc_sysfs_show_hctosys(struct device *dev, struct device_attribute *attr,
                 char *buf)
 {
 #ifdef CONFIG_RTC_HCTOSYS_DEVICE
-        if (strcmp(dev_name(&to_rtc_device(dev)->dev),
-                   CONFIG_RTC_HCTOSYS_DEVICE) == 0)
+        if (rtc_hctosys_ret == 0 &&
+                        strcmp(dev_name(&to_rtc_device(dev)->dev),
+                                CONFIG_RTC_HCTOSYS_DEVICE) == 0)
                 return sprintf(buf, "1\n");
         else
 #endif
diff --git a/drivers/s390/char/raw3270.c b/drivers/s390/char/raw3270.c
index 62ddf5202b79..2a4c566456e7 100644
--- a/drivers/s390/char/raw3270.c
+++ b/drivers/s390/char/raw3270.c
@@ -373,7 +373,7 @@ raw3270_irq (struct ccw_device *cdev, unsigned long intparm, struct irb *irb)
                 rq->rc = ccw_device_start(rp->cdev, &rq->ccw,
                                           (unsigned long) rq, 0, 0);
                 if (rq->rc == 0)
-                        return; /* Sucessfully restarted. */
+                        return; /* Successfully restarted. */
                 break;
         case RAW3270_IO_STOP:
                 if (!rq)
diff --git a/drivers/s390/char/sclp.c b/drivers/s390/char/sclp.c
index ec88c59842e3..f6d72e1f2a38 100644
--- a/drivers/s390/char/sclp.c
+++ b/drivers/s390/char/sclp.c
@@ -196,7 +196,7 @@ __sclp_start_request(struct sclp_req *req)
         req->start_count++;
 
         if (rc == 0) {
-                /* Sucessfully started request */
+                /* Successfully started request */
                 req->status = SCLP_REQ_RUNNING;
                 sclp_running_state = sclp_running_state_running;
                 __sclp_set_request_timer(SCLP_RETRY_INTERVAL * HZ,
diff --git a/drivers/scsi/a100u2w.c b/drivers/scsi/a100u2w.c
index 208d6df9ed59..ff5716d5f044 100644
--- a/drivers/scsi/a100u2w.c
+++ b/drivers/scsi/a100u2w.c
@@ -492,7 +492,7 @@ static void init_alloc_map(struct orc_host * host)
  *      init_orchid             -       initialise the host adapter
  *      @host:host adapter to initialise
  *
- *      Initialise the controller and if neccessary load the firmware.
+ *      Initialise the controller and if necessary load the firmware.
  *
  *      Returns -1 if the initialisation fails.
  */
diff --git a/drivers/scsi/initio.c b/drivers/scsi/initio.c
index 89a59484be02..a7714160fbc3 100644
--- a/drivers/scsi/initio.c
+++ b/drivers/scsi/initio.c
@@ -531,7 +531,7 @@ static void initio_read_eeprom(unsigned long base)
  *      initio_stop_bm          -       stop bus master
  *      @host: InitIO we are stopping
  *
- *      Stop any pending DMA operation, aborting the DMA if neccessary
+ *      Stop any pending DMA operation, aborting the DMA if necessary
  */
 
 static void initio_stop_bm(struct initio_host * host)
diff --git a/drivers/scsi/libfc/fc_fcp.c b/drivers/scsi/libfc/fc_fcp.c
index 6fde2fabfd9b..774e7ac837a5 100644
--- a/drivers/scsi/libfc/fc_fcp.c
+++ b/drivers/scsi/libfc/fc_fcp.c
@@ -48,7 +48,7 @@ struct kmem_cache *scsi_pkt_cachep;
 #define FC_SRB_CMD_SENT         (1 << 0)        /* cmd has been sent */
 #define FC_SRB_RCV_STATUS       (1 << 1)        /* response has arrived */
 #define FC_SRB_ABORT_PENDING    (1 << 2)        /* cmd abort sent to device */
-#define FC_SRB_ABORTED          (1 << 3)        /* abort acknowleged */
+#define FC_SRB_ABORTED          (1 << 3)        /* abort acknowledged */
 #define FC_SRB_DISCONTIG        (1 << 4)        /* non-sequential data recvd */
 #define FC_SRB_COMPL            (1 << 5)        /* fc_io_compl has been run */
 #define FC_SRB_FCP_PROCESSING_TMO (1 << 6)      /* timer function processing */
@@ -519,7 +519,7 @@ crc_err:
  *
  * Called after receiving a Transfer Ready data descriptor.
  * If the LLD is capable of sequence offload then send down the
- * seq_blen ammount of data in single frame, otherwise send
+ * seq_blen amount of data in single frame, otherwise send
  * multiple frames of the maximum frame payload supported by
  * the target port.
  */
diff --git a/drivers/scsi/lpfc/lpfc_els.c b/drivers/scsi/lpfc/lpfc_els.c
index 08b6634cb994..2a40a6eabf4d 100644
--- a/drivers/scsi/lpfc/lpfc_els.c
+++ b/drivers/scsi/lpfc/lpfc_els.c
@@ -981,7 +981,7 @@ lpfc_issue_els_flogi(struct lpfc_vport *vport, struct lpfc_nodelist *ndlp,
  * function returns, it does not guarantee all the IOCBs are actually aborted.
  *
  * Return code
- *   0 - Sucessfully issued abort iocb on all outstanding flogis (Always 0)
+ *   0 - Successfully issued abort iocb on all outstanding flogis (Always 0)
  **/
 int
 lpfc_els_abort_flogi(struct lpfc_hba *phba)
@@ -3129,7 +3129,7 @@ lpfc_cmpl_els_rsp(struct lpfc_hba *phba, struct lpfc_iocbq *cmdiocb,
         if (ndlp && NLP_CHK_NODE_ACT(ndlp) &&
             (*((uint32_t *) (pcmd)) == ELS_CMD_LS_RJT)) {
                 /* A LS_RJT associated with Default RPI cleanup has its own
-                 * seperate code path.
+                 * separate code path.
                  */
                 if (!(ndlp->nlp_flag & NLP_RM_DFLT_RPI))
                         ls_rjt = 1;
diff --git a/drivers/scsi/lpfc/lpfc_scsi.c b/drivers/scsi/lpfc/lpfc_scsi.c
index 7f21b47db791..483fb74bc592 100644
--- a/drivers/scsi/lpfc/lpfc_scsi.c
+++ b/drivers/scsi/lpfc/lpfc_scsi.c
@@ -1575,7 +1575,7 @@ lpfc_bg_scsi_prep_dma_buf(struct lpfc_hba *phba,
                 case LPFC_PG_TYPE_NO_DIF:
                         num_bde = lpfc_bg_setup_bpl(phba, scsi_cmnd, bpl,
                                         datasegcnt);
-                        /* we shoud have 2 or more entries in buffer list */
+                        /* we should have 2 or more entries in buffer list */
                         if (num_bde < 2)
                                 goto err;
                         break;
@@ -1612,7 +1612,7 @@ lpfc_bg_scsi_prep_dma_buf(struct lpfc_hba *phba,
 
                         num_bde = lpfc_bg_setup_bpl_prot(phba, scsi_cmnd, bpl,
                                         datasegcnt, protsegcnt);
-                        /* we shoud have 3 or more entries in buffer list */
+                        /* we should have 3 or more entries in buffer list */
                         if (num_bde < 3)
                                 goto err;
                         break;
diff --git a/drivers/scsi/pcmcia/nsp_cs.h b/drivers/scsi/pcmcia/nsp_cs.h
index 7db28cd49446..8c61a4fe1db9 100644
--- a/drivers/scsi/pcmcia/nsp_cs.h
+++ b/drivers/scsi/pcmcia/nsp_cs.h
@@ -187,7 +187,7 @@
 #define S_IO            BIT(1)    /* Input/Output line from SCSI bus */
 #define S_CD            BIT(2)    /* Command/Data line from SCSI bus */
 #define S_BUSY          BIT(3)    /* Busy line from SCSI bus         */
-#define S_ACK           BIT(4)    /* Acknowlege line from SCSI bus   */
+#define S_ACK           BIT(4)    /* Acknowledge line from SCSI bus  */
 #define S_REQUEST       BIT(5)    /* Request line from SCSI bus      */
 #define S_SELECT        BIT(6)    /*                                 */
 #define S_ATN           BIT(7)    /*                                 */
diff --git a/drivers/scsi/pm8001/pm8001_hwi.c b/drivers/scsi/pm8001/pm8001_hwi.c
index 9b44c6f1b10e..7985ae45d688 100644
--- a/drivers/scsi/pm8001/pm8001_hwi.c
+++ b/drivers/scsi/pm8001/pm8001_hwi.c
@@ -2924,7 +2924,7 @@ hw_event_sas_phy_up(struct pm8001_hba_info *pm8001_ha, void *piomb)
                 break;
         default:
                 PM8001_MSG_DBG(pm8001_ha,
-                        pm8001_printk("unkown device type(%x)\n", deviceType));
+                        pm8001_printk("unknown device type(%x)\n", deviceType));
                 break;
         }
         phy->phy_type |= PORT_TYPE_SAS;
diff --git a/drivers/scsi/pm8001/pm8001_sas.c b/drivers/scsi/pm8001/pm8001_sas.c
index 7f9c83a76390..3b2c98fba834 100644
--- a/drivers/scsi/pm8001/pm8001_sas.c
+++ b/drivers/scsi/pm8001/pm8001_sas.c
@@ -600,7 +600,7 @@ static void pm8001_free_dev(struct pm8001_device *pm8001_dev)
   * by the command "OPC_INB_REG_DEV", after that the HBA will assign a
   * device ID(according to device's sas address) and returned it to LLDD. From
   * now on, we communicate with HBA FW with the device ID which HBA assigned
-  * rather than sas address. it is the neccessary step for our HBA but it is
+  * rather than sas address. it is the necessary step for our HBA but it is
   * the optional for other HBA driver.
   */
 static int pm8001_dev_found_notify(struct domain_device *dev)
diff --git a/drivers/scsi/pmcraid.h b/drivers/scsi/pmcraid.h
index 92f89d50850c..b8ad07c3449e 100644
--- a/drivers/scsi/pmcraid.h
+++ b/drivers/scsi/pmcraid.h
@@ -938,7 +938,7 @@ static struct pmcraid_ioasc_error pmcraid_ioasc_error_table[] = {
 
 /*
  * pmcraid_ioctl_header - definition of header structure that preceeds all the
- * buffers given as ioctl arguements.
+ * buffers given as ioctl arguments.
  *
  * .signature           : always ASCII string, "PMCRAID"
  * .reserved            : not used
diff --git a/drivers/scsi/sd.c b/drivers/scsi/sd.c
index 1dd4d8407694..83881dfb33c0 100644
--- a/drivers/scsi/sd.c
+++ b/drivers/scsi/sd.c
@@ -2111,7 +2111,7 @@ static int sd_revalidate_disk(struct gendisk *disk)
  *      which is followed by sdaaa.
  *
  *      This is basically 26 base counting with one extra 'nil' entry
- *      at the beggining from the second digit on and can be
+ *      at the beginning from the second digit on and can be
  *      determined using similar method as 26 base conversion with the
  *      index shifted -1 after each digit is computed.
  *
diff --git a/drivers/scsi/ses.c b/drivers/scsi/ses.c
index 1d7a8780e00c..0d9d6f7567f5 100644
--- a/drivers/scsi/ses.c
+++ b/drivers/scsi/ses.c
@@ -595,8 +595,6 @@ static int ses_intf_add(struct device *cdev,
                 ses_dev->page10_len = len;
                 buf = NULL;
         }
-        kfree(hdr_buf);
-
         scomp = kzalloc(sizeof(struct ses_component) * components, GFP_KERNEL);
         if (!scomp)
                 goto err_free;
@@ -608,6 +606,8 @@ static int ses_intf_add(struct device *cdev,
                 goto err_free;
         }
 
+        kfree(hdr_buf);
+
         edev->scratch = ses_dev;
         for (i = 0; i < components; i++)
                 edev->component[i].scratch = scomp + i;
diff --git a/drivers/serial/8250.c b/drivers/serial/8250.c
index 7c4ebe6ee18b..c3db16b7afa1 100644
--- a/drivers/serial/8250.c
+++ b/drivers/serial/8250.c
@@ -2408,6 +2408,21 @@ serial8250_set_termios(struct uart_port *port, struct ktermios *termios,
 }
 
 static void
+serial8250_set_ldisc(struct uart_port *port)
+{
+        int line = port->line;
+
+        if (line >= port->state->port.tty->driver->num)
+                return;
+
+        if (port->state->port.tty->ldisc->ops->num == N_PPS) {
+                port->flags |= UPF_HARDPPS_CD;
+                serial8250_enable_ms(port);
+        } else
+                port->flags &= ~UPF_HARDPPS_CD;
+}
+
+static void
 serial8250_pm(struct uart_port *port, unsigned int state,
               unsigned int oldstate)
 {
@@ -2628,6 +2643,7 @@ static struct uart_ops serial8250_pops = {
         .startup        = serial8250_startup,
         .shutdown       = serial8250_shutdown,
         .set_termios    = serial8250_set_termios,
+        .set_ldisc      = serial8250_set_ldisc,
         .pm             = serial8250_pm,
         .type           = serial8250_type,
         .release_port   = serial8250_release_port,
diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
index d6ff73395623..f55c49475a8c 100644
--- a/drivers/serial/Kconfig
+++ b/drivers/serial/Kconfig
@@ -447,7 +447,7 @@ config SERIAL_CLPS711X_CONSOLE
 
 config SERIAL_SAMSUNG
         tristate "Samsung SoC serial support"
-        depends on ARM && PLAT_S3C
+        depends on ARM && PLAT_SAMSUNG
         select SERIAL_CORE
         help
           Support for the on-chip UARTs on the Samsung S3C24XX series CPUs,
@@ -455,11 +455,18 @@ config SERIAL_SAMSUNG
           provide all of these ports, depending on how the serial port
           pins are configured.
 
+config SERIAL_SAMSUNG_UARTS_4
+        bool
+        depends on ARM && PLAT_SAMSUNG
+        default y if CPU_S3C2443
+        help
+          Internal node for the common case of 4 Samsung compatible UARTs
+
 config SERIAL_SAMSUNG_UARTS
         int
-        depends on ARM && PLAT_S3C
+        depends on ARM && PLAT_SAMSUNG
         default 2 if ARCH_S3C2400
-        default 4 if ARCH_S5PC1XX || ARCH_S3C64XX || CPU_S3C2443
+        default 4 if SERIAL_SAMSUNG_UARTS_4
         default 3
         help
           Select the number of available UART ports for the Samsung S3C
@@ -526,20 +533,30 @@ config SERIAL_S3C24A0
           Serial port support for the Samsung S3C24A0 SoC
 
 config SERIAL_S3C6400
-        tristate "Samsung S3C6400/S3C6410 Serial port support"
-        depends on SERIAL_SAMSUNG && (CPU_S3C6400 || CPU_S3C6410)
+        tristate "Samsung S3C6400/S3C6410/S5P6440 Seria port support"
+        depends on SERIAL_SAMSUNG && (CPU_S3C6400 || CPU_S3C6410 || CPU_S5P6440)
+        select SERIAL_SAMSUNG_UARTS_4
         default y
         help
-          Serial port support for the Samsung S3C6400 and S3C6410
+          Serial port support for the Samsung S3C6400, S3C6410 and S5P6440
           SoCs
 
 config SERIAL_S5PC100
         tristate "Samsung S5PC100 Serial port support"
         depends on SERIAL_SAMSUNG && CPU_S5PC100
+        select SERIAL_SAMSUNG_UARTS_4
         default y
         help
           Serial port support for the Samsung S5PC100 SoCs
 
+config SERIAL_S5PV210
+        tristate "Samsung S5PV210 Serial port support"
+        depends on SERIAL_SAMSUNG && (CPU_S5PV210 || CPU_S5P6442)
+        select SERIAL_SAMSUNG_UARTS_4 if CPU_S5PV210
+        default y
+        help
+          Serial port support for Samsung's S5P Family of SoC's
+
 config SERIAL_MAX3100
         tristate "MAX3100 support"
         depends on SPI
@@ -996,7 +1013,7 @@ config SERIAL_IP22_ZILOG_CONSOLE
 
 config SERIAL_SH_SCI
         tristate "SuperH SCI(F) serial port support"
-        depends on HAVE_CLK && (SUPERH || H8300)
+        depends on HAVE_CLK && (SUPERH || H8300 || ARCH_SHMOBILE)
         select SERIAL_CORE
 
 config SERIAL_SH_SCI_NR_UARTS
diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile
index 5548fe7df61d..6aa4723b74ee 100644
--- a/drivers/serial/Makefile
+++ b/drivers/serial/Makefile
@@ -45,6 +45,7 @@ obj-$(CONFIG_SERIAL_S3C2440) += s3c2440.o
 obj-$(CONFIG_SERIAL_S3C24A0) += s3c24a0.o
 obj-$(CONFIG_SERIAL_S3C6400) += s3c6400.o
 obj-$(CONFIG_SERIAL_S5PC100) += s3c6400.o
+obj-$(CONFIG_SERIAL_S5PV210) += s5pv210.o
 obj-$(CONFIG_SERIAL_MAX3100) += max3100.o
 obj-$(CONFIG_SERIAL_IP22_ZILOG) += ip22zilog.o
 obj-$(CONFIG_SERIAL_MUX) += mux.o
diff --git a/drivers/serial/amba-pl010.c b/drivers/serial/amba-pl010.c
index 429a8ae86933..e4b3c2c88bb6 100644
--- a/drivers/serial/amba-pl010.c
+++ b/drivers/serial/amba-pl010.c
@@ -471,6 +471,20 @@ pl010_set_termios(struct uart_port *port, struct ktermios *termios,
         spin_unlock_irqrestore(&uap->port.lock, flags);
 }
 
+static void pl010_set_ldisc(struct uart_port *port)
+{
+        int line = port->line;
+
+        if (line >= port->state->port.tty->driver->num)
+                return;
+
+        if (port->state->port.tty->ldisc->ops->num == N_PPS) {
+                port->flags |= UPF_HARDPPS_CD;
+                pl010_enable_ms(port);
+        } else
+                port->flags &= ~UPF_HARDPPS_CD;
+}
+
 static const char *pl010_type(struct uart_port *port)
 {
         return port->type == PORT_AMBA ? "AMBA" : NULL;
@@ -531,6 +545,7 @@ static struct uart_ops amba_pl010_pops = {
         .startup        = pl010_startup,
         .shutdown       = pl010_shutdown,
         .set_termios    = pl010_set_termios,
+        .set_ldisc      = pl010_set_ldisc,
         .type           = pl010_type,
         .release_port   = pl010_release_port,
         .request_port   = pl010_request_port,
diff --git a/drivers/serial/imx.c b/drivers/serial/imx.c
index d00fcf8e6c70..e579d7a1807a 100644
--- a/drivers/serial/imx.c
+++ b/drivers/serial/imx.c
@@ -440,7 +440,7 @@ static irqreturn_t imx_rxint(int irq, void *dev_id)
 
                 temp = readl(sport->port.membase + USR2);
                 if (temp & USR2_BRCD) {
-                        writel(temp | USR2_BRCD, sport->port.membase + USR2);
+                        writel(USR2_BRCD, sport->port.membase + USR2);
                         if (uart_handle_break(&sport->port))
                                 continue;
                 }
diff --git a/drivers/serial/s3c2412.c b/drivers/serial/s3c2412.c
index ce75e28e36ef..1700b1a2fb7e 100644
--- a/drivers/serial/s3c2412.c
+++ b/drivers/serial/s3c2412.c
@@ -102,6 +102,7 @@ static struct s3c24xx_uart_info s3c2412_uart_inf = {
         .name           = "Samsung S3C2412 UART",
         .type           = PORT_S3C2412,
         .fifosize       = 64,
+        .has_divslot    = 1,
         .rx_fifomask    = S3C2440_UFSTAT_RXMASK,
         .rx_fifoshift   = S3C2440_UFSTAT_RXSHIFT,
         .rx_fifofull    = S3C2440_UFSTAT_RXFULL,
diff --git a/drivers/serial/s5pv210.c b/drivers/serial/s5pv210.c
new file mode 100644
index 000000000000..8dc03837617b
--- /dev/null
+++ b/drivers/serial/s5pv210.c
@@ -0,0 +1,154 @@
+/* linux/drivers/serial/s5pv210.c
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * Based on drivers/serial/s3c6400.c
+ *
+ * Driver for Samsung S5PV210 SoC UARTs.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include <linux/module.h>
+#include <linux/ioport.h>
+#include <linux/io.h>
+#include <linux/platform_device.h>
+#include <linux/init.h>
+#include <linux/serial_core.h>
+#include <linux/serial.h>
+
+#include <asm/irq.h>
+#include <mach/hardware.h>
+#include <plat/regs-serial.h>
+#include "samsung.h"
+
+static int s5pv210_serial_setsource(struct uart_port *port,
+                                        struct s3c24xx_uart_clksrc *clk)
+{
+        unsigned long ucon = rd_regl(port, S3C2410_UCON);
+
+        if (strcmp(clk->name, "pclk") == 0)
+                ucon &= ~S5PV210_UCON_CLKMASK;
+        else if (strcmp(clk->name, "uclk1") == 0)
+                ucon |= S5PV210_UCON_CLKMASK;
+        else {
+                printk(KERN_ERR "unknown clock source %s\n", clk->name);
+                return -EINVAL;
+        }
+
+        wr_regl(port, S3C2410_UCON, ucon);
+        return 0;
+}
+
+
+static int s5pv210_serial_getsource(struct uart_port *port,
+                                        struct s3c24xx_uart_clksrc *clk)
+{
+        u32 ucon = rd_regl(port, S3C2410_UCON);
+
+        clk->divisor = 1;
+
+        switch (ucon & S5PV210_UCON_CLKMASK) {
+        case S5PV210_UCON_PCLK:
+                clk->name = "pclk";
+                break;
+        case S5PV210_UCON_UCLK:
+                clk->name = "uclk1";
+                break;
+        }
+
+        return 0;
+}
+
+static int s5pv210_serial_resetport(struct uart_port *port,
+                                        struct s3c2410_uartcfg *cfg)
+{
+        unsigned long ucon = rd_regl(port, S3C2410_UCON);
+
+        ucon &= S5PV210_UCON_CLKMASK;
+        wr_regl(port, S3C2410_UCON,  ucon | cfg->ucon);
+        wr_regl(port, S3C2410_ULCON, cfg->ulcon);
+
+        /* reset both fifos */
+        wr_regl(port, S3C2410_UFCON, cfg->ufcon | S3C2410_UFCON_RESETBOTH);
+        wr_regl(port, S3C2410_UFCON, cfg->ufcon);
+
+        return 0;
+}
+
+#define S5PV210_UART_DEFAULT_INFO(fifo_size)                    \
+                .name           = "Samsung S5PV210 UART0",      \
+                .type           = PORT_S3C6400,                 \
+                .fifosize       = fifo_size,                    \
+                .has_divslot    = 1,                            \
+                .rx_fifomask    = S5PV210_UFSTAT_RXMASK,        \
+                .rx_fifoshift   = S5PV210_UFSTAT_RXSHIFT,       \
+                .rx_fifofull    = S5PV210_UFSTAT_RXFULL,        \
+                .tx_fifofull    = S5PV210_UFSTAT_TXFULL,        \
+                .tx_fifomask    = S5PV210_UFSTAT_TXMASK,        \
+                .tx_fifoshift   = S5PV210_UFSTAT_TXSHIFT,       \
+                .get_clksrc     = s5pv210_serial_getsource,     \
+                .set_clksrc     = s5pv210_serial_setsource,     \
+                .reset_port     = s5pv210_serial_resetport
+
+static struct s3c24xx_uart_info s5p_port_fifo256 = {
+        S5PV210_UART_DEFAULT_INFO(256),
+};
+
+static struct s3c24xx_uart_info s5p_port_fifo64 = {
+        S5PV210_UART_DEFAULT_INFO(64),
+};
+
+static struct s3c24xx_uart_info s5p_port_fifo16 = {
+        S5PV210_UART_DEFAULT_INFO(16),
+};
+
+static struct s3c24xx_uart_info *s5p_uart_inf[] = {
+        [0] = &s5p_port_fifo256,
+        [1] = &s5p_port_fifo64,
+        [2] = &s5p_port_fifo16,
+        [3] = &s5p_port_fifo16,
+};
+
+/* device management */
+static int s5p_serial_probe(struct platform_device *pdev)
+{
+        return s3c24xx_serial_probe(pdev, s5p_uart_inf[pdev->id]);
+}
+
+static struct platform_driver s5p_serial_drv = {
+        .probe          = s5p_serial_probe,
+        .remove         = __devexit_p(s3c24xx_serial_remove),
+        .driver         = {
+                .name   = "s5pv210-uart",
+                .owner  = THIS_MODULE,
+        },
+};
+
+static int __init s5pv210_serial_console_init(void)
+{
+        return s3c24xx_serial_initconsole(&s5p_serial_drv, s5p_uart_inf);
+}
+
+console_initcall(s5pv210_serial_console_init);
+
+static int __init s5p_serial_init(void)
+{
+        return s3c24xx_serial_init(&s5p_serial_drv, *s5p_uart_inf);
+}
+
+static void __exit s5p_serial_exit(void)
+{
+        platform_driver_unregister(&s5p_serial_drv);
+}
+
+module_init(s5p_serial_init);
+module_exit(s5p_serial_exit);
+
+MODULE_LICENSE("GPL");
+MODULE_ALIAS("platform:s5pv210-uart");
+MODULE_DESCRIPTION("Samsung S5PV210 UART Driver support");
+MODULE_AUTHOR("Thomas Abraham <thomas.ab@samsung.com>");
diff --git a/drivers/serial/samsung.c b/drivers/serial/samsung.c
index 52e3df113ec0..a9d6c5626a0a 100644
--- a/drivers/serial/samsung.c
+++ b/drivers/serial/samsung.c
@@ -1271,7 +1271,7 @@ s3c24xx_serial_console_txrdy(struct uart_port *port, unsigned int ufcon)
         unsigned long ufstat, utrstat;
 
         if (ufcon & S3C2410_UFCON_FIFOMODE) {
-                /* fifo mode - check ammount of data in fifo registers... */
+                /* fifo mode - check amount of data in fifo registers... */
 
                 ufstat = rd_regl(port, S3C2410_UFSTAT);
                 return (ufstat & info->tx_fifofull) ? 0 : 1;
@@ -1374,7 +1374,7 @@ s3c24xx_serial_get_options(struct uart_port *port, int *baud,
  * data.
 */
 
-static int s3c24xx_serial_init_ports(struct s3c24xx_uart_info *info)
+static int s3c24xx_serial_init_ports(struct s3c24xx_uart_info **info)
 {
         struct s3c24xx_uart_port *ptr = s3c24xx_serial_ports;
         struct platform_device **platdev_ptr;
@@ -1385,7 +1385,7 @@ static int s3c24xx_serial_init_ports(struct s3c24xx_uart_info *info)
         platdev_ptr = s3c24xx_uart_devs;
 
         for (i = 0; i < CONFIG_SERIAL_SAMSUNG_UARTS; i++, ptr++, platdev_ptr++) {
-                s3c24xx_serial_init_port(ptr, info, *platdev_ptr);
+                s3c24xx_serial_init_port(ptr, info[i], *platdev_ptr);
         }
 
         return 0;
@@ -1451,7 +1451,7 @@ static struct console s3c24xx_serial_console = {
 };
 
 int s3c24xx_serial_initconsole(struct platform_driver *drv,
-                               struct s3c24xx_uart_info *info)
+                               struct s3c24xx_uart_info **info)
 
 {
         struct platform_device *dev = s3c24xx_uart_devs[0];
diff --git a/drivers/serial/samsung.h b/drivers/serial/samsung.h
index 1fb22343df42..0ac06a07d25f 100644
--- a/drivers/serial/samsung.h
+++ b/drivers/serial/samsung.h
@@ -75,19 +75,24 @@ extern int s3c24xx_serial_probe(struct platform_device *dev,
 extern int __devexit s3c24xx_serial_remove(struct platform_device *dev);
 
 extern int s3c24xx_serial_initconsole(struct platform_driver *drv,
-                                      struct s3c24xx_uart_info *uart);
+                                      struct s3c24xx_uart_info **uart);
 
 extern int s3c24xx_serial_init(struct platform_driver *drv,
                                struct s3c24xx_uart_info *info);
 
 #ifdef CONFIG_SERIAL_SAMSUNG_CONSOLE
 
-#define s3c24xx_console_init(__drv, __inf)                      \
-static int __init s3c_serial_console_init(void)                 \
-{                                                               \
-        return s3c24xx_serial_initconsole(__drv, __inf);        \
-}                                                               \
-                                                                \
+#define s3c24xx_console_init(__drv, __inf)                              \
+static int __init s3c_serial_console_init(void)                         \
+{                                                                       \
+        struct s3c24xx_uart_info *uinfo[CONFIG_SERIAL_SAMSUNG_UARTS];   \
+        int i;                                                          \
+                                                                        \
+        for (i = 0; i < CONFIG_SERIAL_SAMSUNG_UARTS; i++)               \
+                uinfo[i] = __inf;                                       \
+        return s3c24xx_serial_initconsole(__drv, uinfo);                \
+}                                                                       \
+                                                                        \
 console_initcall(s3c_serial_console_init)
 
 #else
diff --git a/drivers/serial/sh-sci.h b/drivers/serial/sh-sci.h
index f7d2589926d2..fad67d33b0bd 100644
--- a/drivers/serial/sh-sci.h
+++ b/drivers/serial/sh-sci.h
@@ -30,7 +30,8 @@
  */
 # define SCSCR_INIT(port) (port->mapbase == SCIF2) ? 0xF3 : 0xF0
 #elif defined(CONFIG_CPU_SUBTYPE_SH7720) || \
-      defined(CONFIG_CPU_SUBTYPE_SH7721)
+      defined(CONFIG_CPU_SUBTYPE_SH7721) || \
+      defined(CONFIG_ARCH_SHMOBILE)
 # define SCSCR_INIT(port)  0x0030 /* TIE=0,RIE=0,TE=1,RE=1 */
 # define PORT_PTCR         0xA405011EUL
 # define PORT_PVCR         0xA4050122UL
@@ -228,7 +229,8 @@
 
 #if defined(CONFIG_CPU_SUBTYPE_SH7705) || \
     defined(CONFIG_CPU_SUBTYPE_SH7720) || \
-    defined(CONFIG_CPU_SUBTYPE_SH7721)
+    defined(CONFIG_CPU_SUBTYPE_SH7721) || \
+    defined(CONFIG_ARCH_SHMOBILE)
 # define SCIF_ORER    0x0200
 # define SCIF_ERRORS ( SCIF_PER | SCIF_FER | SCIF_ER | SCIF_BRK | SCIF_ORER)
 # define SCIF_RFDC_MASK 0x007f
@@ -261,7 +263,8 @@
 
 #if defined(CONFIG_CPU_SUBTYPE_SH7705) || \
     defined(CONFIG_CPU_SUBTYPE_SH7720) || \
-    defined(CONFIG_CPU_SUBTYPE_SH7721)
+    defined(CONFIG_CPU_SUBTYPE_SH7721) || \
+    defined(CONFIG_ARCH_SHMOBILE)
 # define SCxSR_RDxF_CLEAR(port)  (sci_in(port, SCxSR) & 0xfffc)
 # define SCxSR_ERROR_CLEAR(port) (sci_in(port, SCxSR) & 0xfd73)
 # define SCxSR_TDxE_CLEAR(port)  (sci_in(port, SCxSR) & 0xffdf)
@@ -356,7 +359,7 @@
     SCI_OUT(sci_size, sci_offset, value);                               \
   }
 
-#ifdef CONFIG_CPU_SH3
+#if defined(CONFIG_CPU_SH3) || defined(CONFIG_ARCH_SHMOBILE)
 #if defined(CONFIG_CPU_SUBTYPE_SH7710) || defined(CONFIG_CPU_SUBTYPE_SH7712)
 #define SCIx_FNS(name, sh3_sci_offset, sh3_sci_size, sh4_sci_offset, sh4_sci_size, \
                                 sh3_scif_offset, sh3_scif_size, sh4_scif_offset, sh4_scif_size, \
@@ -366,7 +369,8 @@
           CPU_SCIF_FNS(name, sh4_scif_offset, sh4_scif_size)
 #elif defined(CONFIG_CPU_SUBTYPE_SH7705) || \
       defined(CONFIG_CPU_SUBTYPE_SH7720) || \
-      defined(CONFIG_CPU_SUBTYPE_SH7721)
+      defined(CONFIG_CPU_SUBTYPE_SH7721) || \
+      defined(CONFIG_ARCH_SHMOBILE)
 #define SCIF_FNS(name, scif_offset, scif_size) \
   CPU_SCIF_FNS(name, scif_offset, scif_size)
 #else
@@ -401,7 +405,8 @@
 
 #if defined(CONFIG_CPU_SUBTYPE_SH7705) || \
     defined(CONFIG_CPU_SUBTYPE_SH7720) || \
-    defined(CONFIG_CPU_SUBTYPE_SH7721)
+    defined(CONFIG_CPU_SUBTYPE_SH7721) || \
+    defined(CONFIG_ARCH_SHMOBILE)
 
 SCIF_FNS(SCSMR,  0x00, 16)
 SCIF_FNS(SCBRR,  0x04,  8)
@@ -413,7 +418,7 @@ SCIF_FNS(SCFCR,  0x18, 16)
 SCIF_FNS(SCFDR,  0x1c, 16)
 SCIF_FNS(SCxTDR, 0x20,  8)
 SCIF_FNS(SCxRDR, 0x24,  8)
-SCIF_FNS(SCLSR,  0x24, 16)
+SCIF_FNS(SCLSR,  0x00,  0)
 #elif defined(CONFIG_CPU_SUBTYPE_SH7723) ||\
       defined(CONFIG_CPU_SUBTYPE_SH7724)
 SCIx_FNS(SCSMR,  0x00, 16, 0x00, 16)
@@ -583,7 +588,8 @@ static inline int sci_rxd_in(struct uart_port *port)
 #define SCBRR_VALUE(bps, clk) ((clk+16*bps)/(16*bps)-1)
 #elif defined(CONFIG_CPU_SUBTYPE_SH7705) || \
       defined(CONFIG_CPU_SUBTYPE_SH7720) || \
-      defined(CONFIG_CPU_SUBTYPE_SH7721)
+      defined(CONFIG_CPU_SUBTYPE_SH7721) || \
+      defined(CONFIG_ARCH_SHMOBILE)
 #define SCBRR_VALUE(bps, clk) (((clk*2)+16*bps)/(32*bps)-1)
 #elif defined(CONFIG_CPU_SUBTYPE_SH7723) ||\
       defined(CONFIG_CPU_SUBTYPE_SH7724)
diff --git a/drivers/sh/intc.c b/drivers/sh/intc.c
index 3a5a17db9474..c2750391fd34 100644
--- a/drivers/sh/intc.c
+++ b/drivers/sh/intc.c
@@ -762,6 +762,10 @@ static void __init intc_register_irq(struct intc_desc *desc,
 
         if (desc->hw.ack_regs)
                 ack_handle[irq] = intc_ack_data(desc, d, enum_id);
+
+#ifdef CONFIG_ARM
+        set_irq_flags(irq, IRQF_VALID); /* Enable IRQ on ARM systems */
+#endif
 }
 
 static unsigned int __init save_reg(struct intc_desc_int *d,
@@ -1024,8 +1028,12 @@ unsigned int create_irq_nr(unsigned int irq_want, int node)
 out_unlock:
         spin_unlock_irqrestore(&vector_lock, flags);
 
-        if (irq > 0)
+        if (irq > 0) {
                 dynamic_irq_init(irq);
+#ifdef CONFIG_ARM
+                set_irq_flags(irq, IRQF_VALID); /* Enable IRQ on ARM systems */
+#endif
+        }
 
         return irq;
 }
diff --git a/drivers/spi/spi_s3c24xx.c b/drivers/spi/spi_s3c24xx.c
index c010733877ae..1fabede9e061 100644
--- a/drivers/spi/spi_s3c24xx.c
+++ b/drivers/spi/spi_s3c24xx.c
@@ -275,7 +275,7 @@ static inline u32 ack_bit(unsigned int irq)
  * Claim the FIQ handler (only one can be active at any one time) and
  * then setup the correct transfer code for this transfer.
  *
- * This call updates all the necessary state information if sucessful,
+ * This call updates all the necessary state information if successful,
  * so the caller does not need to do anything more than start the transfer
  * as normal, since the IRQ will have been re-routed to the FIQ handler.
 */
diff --git a/drivers/usb/gadget/fsl_mx3_udc.c b/drivers/usb/gadget/fsl_mx3_udc.c
index 4bc2bf3d602e..20a802ecaa15 100644
--- a/drivers/usb/gadget/fsl_mx3_udc.c
+++ b/drivers/usb/gadget/fsl_mx3_udc.c
@@ -17,6 +17,8 @@
 #include <linux/fsl_devices.h>
 #include <linux/platform_device.h>
 
+#include <mach/hardware.h>
+
 static struct clk *mxc_ahb_clk;
 static struct clk *mxc_usb_clk;
 
@@ -28,14 +30,16 @@ int fsl_udc_clk_init(struct platform_device *pdev)
 
         pdata = pdev->dev.platform_data;
 
-        mxc_ahb_clk = clk_get(&pdev->dev, "usb_ahb");
-        if (IS_ERR(mxc_ahb_clk))
-                return PTR_ERR(mxc_ahb_clk);
+        if (!cpu_is_mx35()) {
+                mxc_ahb_clk = clk_get(&pdev->dev, "usb_ahb");
+                if (IS_ERR(mxc_ahb_clk))
+                        return PTR_ERR(mxc_ahb_clk);
 
-        ret = clk_enable(mxc_ahb_clk);
-        if (ret < 0) {
-                dev_err(&pdev->dev, "clk_enable(\"usb_ahb\") failed\n");
-                goto eenahb;
+                ret = clk_enable(mxc_ahb_clk);
+                if (ret < 0) {
+                        dev_err(&pdev->dev, "clk_enable(\"usb_ahb\") failed\n");
+                        goto eenahb;
+                }
         }
 
         /* make sure USB_CLK is running at 60 MHz +/- 1000 Hz */
@@ -50,6 +54,7 @@ int fsl_udc_clk_init(struct platform_device *pdev)
         if (pdata->phy_mode != FSL_USB2_PHY_ULPI &&
             (freq < 59999000 || freq > 60001000)) {
                 dev_err(&pdev->dev, "USB_CLK=%lu, should be 60MHz\n", freq);
+                ret = -EINVAL;
                 goto eclkrate;
         }
 
@@ -66,9 +71,11 @@ eclkrate:
         clk_put(mxc_usb_clk);
         mxc_usb_clk = NULL;
 egusb:
-        clk_disable(mxc_ahb_clk);
+        if (!cpu_is_mx35())
+                clk_disable(mxc_ahb_clk);
 eenahb:
-        clk_put(mxc_ahb_clk);
+        if (!cpu_is_mx35())
+                clk_put(mxc_ahb_clk);
         return ret;
 }
 
@@ -90,6 +97,8 @@ void fsl_udc_clk_release(void)
                 clk_disable(mxc_usb_clk);
                 clk_put(mxc_usb_clk);
         }
-        clk_disable(mxc_ahb_clk);
-        clk_put(mxc_ahb_clk);
+        if (!cpu_is_mx35()) {
+                clk_disable(mxc_ahb_clk);
+                clk_put(mxc_ahb_clk);
+        }
 }
diff --git a/drivers/usb/gadget/pxa25x_udc.c b/drivers/usb/gadget/pxa25x_udc.c
index e6fedbd5a654..be5fb34d9602 100644
--- a/drivers/usb/gadget/pxa25x_udc.c
+++ b/drivers/usb/gadget/pxa25x_udc.c
@@ -65,6 +65,10 @@
 #include <mach/pxa25x-udc.h>
 #endif
 
+#ifdef CONFIG_ARCH_LUBBOCK
+#include <mach/lubbock.h>
+#endif
+
 #include <asm/mach/udc_pxa2xx.h>
 
 
diff --git a/drivers/usb/gadget/s3c-hsotg.c b/drivers/usb/gadget/s3c-hsotg.c
index 7e5bf593d386..f742c8e7397c 100644
--- a/drivers/usb/gadget/s3c-hsotg.c
+++ b/drivers/usb/gadget/s3c-hsotg.c
@@ -30,7 +30,7 @@
 
 #include <plat/regs-usb-hsotg-phy.h>
 #include <plat/regs-usb-hsotg.h>
-#include <plat/regs-sys.h>
+#include <mach/regs-sys.h>
 #include <plat/udc-hs.h>
 
 #define DMA_ADDR_INVALID (~((dma_addr_t)0))
diff --git a/drivers/usb/musb/davinci.c b/drivers/usb/musb/davinci.c
index 66913811af5e..a883f9dd3f8a 100644
--- a/drivers/usb/musb/davinci.c
+++ b/drivers/usb/musb/davinci.c
@@ -274,7 +274,7 @@ static irqreturn_t davinci_interrupt(int irq, void *__hci)
         /* NOTE: DaVinci shadows the Mentor IRQs.  Don't manage them through
          * the Mentor registers (except for setup), use the TI ones and EOI.
          *
-         * Docs describe irq "vector" registers asociated with the CPPI and
+         * Docs describe irq "vector" registers associated with the CPPI and
          * USB EOI registers.  These hold a bitmask corresponding to the
          * current IRQ, not an irq handler address.  Would using those bits
          * resolve some of the races observed in this dispatch code??
diff --git a/drivers/usb/musb/musb_regs.h b/drivers/usb/musb/musb_regs.h
index 292894a2c247..8d8062b10e2f 100644
--- a/drivers/usb/musb/musb_regs.h
+++ b/drivers/usb/musb/musb_regs.h
@@ -491,7 +491,7 @@ static inline u8  musb_read_txhubport(void __iomem *mbase, u8 epnum)
 #define MUSB_FLAT_OFFSET(_epnum, _offset)       \
         (USB_OFFSET(USB_EP_NI0_TXMAXP) + (0x40 * (_epnum)) + (_offset))
 
-/* Not implemented - HW has seperate Tx/Rx FIFO */
+/* Not implemented - HW has separate Tx/Rx FIFO */
 #define MUSB_TXCSR_MODE                 0x0000
 
 static inline void musb_write_txfifosz(void __iomem *mbase, u8 c_size)
diff --git a/drivers/usb/serial/cypress_m8.c b/drivers/usb/serial/cypress_m8.c
index baf74b44e6ed..e23c77925e7a 100644
--- a/drivers/usb/serial/cypress_m8.c
+++ b/drivers/usb/serial/cypress_m8.c
@@ -152,7 +152,7 @@ struct cypress_private {
         int isthrottled;                   /* if throttled, discard reads */
         wait_queue_head_t delta_msr_wait;  /* used for TIOCMIWAIT */
         char prev_status, diff_status;     /* used for TIOCMIWAIT */
-        /* we pass a pointer to this as the arguement sent to
+        /* we pass a pointer to this as the argument sent to
            cypress_set_termios old_termios */
         struct ktermios tmp_termios;       /* stores the old termios settings */
 };
diff --git a/drivers/usb/serial/opticon.c b/drivers/usb/serial/opticon.c
index f37476e22684..701452ae9197 100644
--- a/drivers/usb/serial/opticon.c
+++ b/drivers/usb/serial/opticon.c
@@ -115,7 +115,7 @@ static void opticon_bulk_callback(struct urb *urb)
                 }
         } else {
                 dev_dbg(&priv->udev->dev,
-                        "Improper ammount of data received from the device, "
+                        "Improper amount of data received from the device, "
                         "%d bytes", urb->actual_length);
         }
 
diff --git a/drivers/usb/serial/symbolserial.c b/drivers/usb/serial/symbolserial.c
index 72398888858f..ee190cc1757c 100644
--- a/drivers/usb/serial/symbolserial.c
+++ b/drivers/usb/serial/symbolserial.c
@@ -94,7 +94,7 @@ static void symbol_int_callback(struct urb *urb)
                 }
         } else {
                 dev_dbg(&priv->udev->dev,
-                        "Improper ammount of data received from the device, "
+                        "Improper amount of data received from the device, "
                         "%d bytes", urb->actual_length);
         }
 
diff --git a/drivers/usb/wusbcore/wusbhc.h b/drivers/usb/wusbcore/wusbhc.h
index fd2fd4e277e1..759cda55f7c3 100644
--- a/drivers/usb/wusbcore/wusbhc.h
+++ b/drivers/usb/wusbcore/wusbhc.h
@@ -198,7 +198,7 @@ struct wusb_port {
  *                 ports) this HC will take. Read-only.
  *
  * @port           Array of port status for each fake root port. Guaranteed to
- *                 always be the same lenght during device existence
+ *                 always be the same length during device existence
  *                 [this allows for some unlocked but referenced reading].
  *
  * @mmcies_max     Max number of Information Elements this HC can send
diff --git a/drivers/uwb/i1480/i1480-est.c b/drivers/uwb/i1480/i1480-est.c
index 7bf8c6febae7..f2eb4d8b76c9 100644
--- a/drivers/uwb/i1480/i1480-est.c
+++ b/drivers/uwb/i1480/i1480-est.c
@@ -54,7 +54,7 @@ static struct uwb_est_entry i1480_est_fd01[] = {
                 .size = sizeof(struct i1480_rceb) + 2 },
 };
 
-static int i1480_est_init(void)
+static int __init i1480_est_init(void)
 {
         int result = uwb_est_register(i1480_CET_VS1, 0x00, 0x8086, 0x0c3b,
                                       i1480_est_fd00,
@@ -73,7 +73,7 @@ static int i1480_est_init(void)
 }
 module_init(i1480_est_init);
 
-static void i1480_est_exit(void)
+static void __exit i1480_est_exit(void)
 {
         uwb_est_unregister(i1480_CET_VS1, 0x00, 0x8086, 0x0c3b,
                            i1480_est_fd00, ARRAY_SIZE(i1480_est_fd00));
diff --git a/drivers/uwb/uwbd.c b/drivers/uwb/uwbd.c
index 5a777d8624da..6210fe1fd1bb 100644
--- a/drivers/uwb/uwbd.c
+++ b/drivers/uwb/uwbd.c
@@ -43,7 +43,7 @@
  *
  * EVENTS
  *
- * Events have a type, a subtype, a lenght, some other stuff and the
+ * Events have a type, a subtype, a length, some other stuff and the
  * data blob, which depends on the event. The header is 'struct
  * uwb_event'; for payloads, see 'struct uwbd_evt_*'.
  *
diff --git a/drivers/video/68328fb.c b/drivers/video/68328fb.c
index 0b17824b0eb5..2110556f76b3 100644
--- a/drivers/video/68328fb.c
+++ b/drivers/video/68328fb.c
@@ -308,7 +308,7 @@ static int mc68x328fb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
          * Pseudocolor:
          *    uses offset = 0 && length = RAMDAC register width.
          *    var->{color}.offset is 0
-         *    var->{color}.length contains widht of DAC
+         *    var->{color}.length contains width of DAC
          *    cmap is not used
          *    RAMDAC[X] is programmed to (red, green, blue)
          * Truecolor:
diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig
index 5a5c303a6373..1c60053439a9 100644
--- a/drivers/video/Kconfig
+++ b/drivers/video/Kconfig
@@ -400,9 +400,12 @@ config FB_SA1100
           If you plan to use the LCD display with your SA-1100 system, say
           Y here.
 
+config HAVE_FB_IMX
+        bool
+
 config FB_IMX
         tristate "Motorola i.MX LCD support"
-        depends on FB && (ARCH_MX1 || ARCH_MX2)
+        depends on FB && (HAVE_FB_IMX || ARCH_MX1 || ARCH_MX2)
         select FB_CFB_FILLRECT
         select FB_CFB_COPYAREA
         select FB_CFB_IMAGEBLIT
@@ -1494,7 +1497,6 @@ config FB_VIA
        select FB_CFB_FILLRECT
        select FB_CFB_COPYAREA
        select FB_CFB_IMAGEBLIT
-       select FB_SOFT_CURSOR
        select I2C_ALGOBIT
        select I2C
        help
@@ -1945,6 +1947,27 @@ config FB_S3C2410_DEBUG
           Turn on debugging messages. Note that you can set/unset at run time
           through sysfs
 
+config FB_NUC900
+        bool "NUC900 LCD framebuffer support"
+        depends on FB && ARCH_W90X900
+        select FB_CFB_FILLRECT
+        select FB_CFB_COPYAREA
+        select FB_CFB_IMAGEBLIT
+        ---help---
+          Frame buffer driver for the built-in LCD controller in the Nuvoton
+          NUC900 processor
+
+config GPM1040A0_320X240
+        bool "Giantplus Technology GPM1040A0 320x240 Color TFT LCD"
+        depends on FB_NUC900
+
+config FB_NUC900_DEBUG
+        bool "NUC900 lcd debug messages"
+        depends on FB_NUC900
+        help
+          Turn on debugging messages. Note that you can set/unset at run time
+          through sysfs
+
 config FB_SM501
         tristate "Silicon Motion SM501 framebuffer support"
         depends on FB && MFD_SM501
diff --git a/drivers/video/Makefile b/drivers/video/Makefile
index 4ecb30c4f3f2..a42ad55e3a15 100644
--- a/drivers/video/Makefile
+++ b/drivers/video/Makefile
@@ -129,6 +129,7 @@ obj-$(CONFIG_XEN_FBDEV_FRONTEND)  += xen-fbfront.o
 obj-$(CONFIG_FB_CARMINE)          += carminefb.o
 obj-$(CONFIG_FB_MB862XX)          += mb862xx/
 obj-$(CONFIG_FB_MSM)              += msm/
+obj-$(CONFIG_FB_NUC900)           += nuc900fb.o
 
 # Platform or fallback drivers go here
 obj-$(CONFIG_FB_UVESA)            += uvesafb.o
diff --git a/drivers/video/asiliantfb.c b/drivers/video/asiliantfb.c
index 9fe90ce928fb..e70bc225fe31 100644
--- a/drivers/video/asiliantfb.c
+++ b/drivers/video/asiliantfb.c
@@ -140,7 +140,7 @@ static void asiliant_calc_dclk2(u32 *ppixclock, u8 *dclk2_m, u8 *dclk2_n, u8 *dc
 
                 /* 3 <= m <= 257 */
                 if (m >= 3 && m <= 257) {
-                        unsigned new_error = ((Ftarget * n) - (Fref * m)) >= 0 ?
+                        unsigned new_error = Ftarget * n >= Fref * m ?
                                                ((Ftarget * n) - (Fref * m)) : ((Fref * m) - (Ftarget * n));
                         if (new_error < best_error) {
                                 best_n = n;
@@ -152,7 +152,7 @@ static void asiliant_calc_dclk2(u32 *ppixclock, u8 *dclk2_m, u8 *dclk2_n, u8 *dc
                 else if (m <= 1028) {
                         /* remember there are still only 8-bits of precision in m, so
                          * avoid over-optimistic error calculations */
-                        unsigned new_error = ((Ftarget * n) - (Fref * (m & ~3))) >= 0 ?
+                        unsigned new_error = Ftarget * n >= Fref * (m & ~3) ?
                                                ((Ftarget * n) - (Fref * (m & ~3))) : ((Fref * (m & ~3)) - (Ftarget * n));
                         if (new_error < best_error) {
                                 best_n = n;
diff --git a/drivers/video/bf54x-lq043fb.c b/drivers/video/bf54x-lq043fb.c
index e49ae5edcc00..814312a7452f 100644
--- a/drivers/video/bf54x-lq043fb.c
+++ b/drivers/video/bf54x-lq043fb.c
@@ -82,7 +82,6 @@ struct bfin_bf54xfb_info {
         unsigned char *fb_buffer;       /* RGB Buffer */
 
         dma_addr_t dma_handle;
-        int lq043_mmap;
         int lq043_open_cnt;
         int irq;
         spinlock_t lock;        /* lock */
@@ -316,7 +315,6 @@ static int bfin_bf54x_fb_release(struct fb_info *info, int user)
         spin_lock(&fbi->lock);
 
         fbi->lq043_open_cnt--;
-        fbi->lq043_mmap = 0;
 
         if (fbi->lq043_open_cnt <= 0) {
 
@@ -374,33 +372,6 @@ static int bfin_bf54x_fb_check_var(struct fb_var_screeninfo *var,
         return 0;
 }
 
-static int bfin_bf54x_fb_mmap(struct fb_info *info, struct vm_area_struct *vma)
-{
-
-        struct bfin_bf54xfb_info *fbi = info->par;
-
-        if (fbi->lq043_mmap)
-                return -1;
-
-        spin_lock(&fbi->lock);
-        fbi->lq043_mmap = 1;
-        spin_unlock(&fbi->lock);
-
-        vma->vm_start = (unsigned long)(fbi->fb_buffer);
-
-        vma->vm_end = vma->vm_start + info->fix.smem_len;
-        /* For those who don't understand how mmap works, go read
-         *   Documentation/nommu-mmap.txt.
-         * For those that do, you will know that the VM_MAYSHARE flag
-         * must be set in the vma->vm_flags structure on noMMU
-         *   Other flags can be set, and are documented in
-         *   include/linux/mm.h
-         */
-        vma->vm_flags |=  VM_MAYSHARE | VM_SHARED;
-
-        return 0;
-}
-
 int bfin_bf54x_fb_cursor(struct fb_info *info, struct fb_cursor *cursor)
 {
         if (nocursor)
@@ -452,7 +423,6 @@ static struct fb_ops bfin_bf54x_fb_ops = {
         .fb_fillrect = cfb_fillrect,
         .fb_copyarea = cfb_copyarea,
         .fb_imageblit = cfb_imageblit,
-        .fb_mmap = bfin_bf54x_fb_mmap,
         .fb_cursor = bfin_bf54x_fb_cursor,
         .fb_setcolreg = bfin_bf54x_fb_setcolreg,
 };
diff --git a/drivers/video/bfin-lq035q1-fb.c b/drivers/video/bfin-lq035q1-fb.c
index b690c269784a..03872365a36d 100644
--- a/drivers/video/bfin-lq035q1-fb.c
+++ b/drivers/video/bfin-lq035q1-fb.c
@@ -22,7 +22,6 @@
 #include <linux/dma-mapping.h>
 #include <linux/platform_device.h>
 #include <linux/spi/spi.h>
-#include <linux/dma-mapping.h>
 
 #include <asm/blackfin.h>
 #include <asm/irq.h>
diff --git a/drivers/video/bfin-t350mcqb-fb.c b/drivers/video/bfin-t350mcqb-fb.c
index 2549c53b26a0..5653d083a983 100644
--- a/drivers/video/bfin-t350mcqb-fb.c
+++ b/drivers/video/bfin-t350mcqb-fb.c
@@ -87,7 +87,6 @@ struct bfin_t350mcqbfb_info {
         struct device *dev;
         unsigned char *fb_buffer;       /* RGB Buffer */
         dma_addr_t dma_handle;
-        int lq043_mmap;
         int lq043_open_cnt;
         int irq;
         spinlock_t lock;        /* lock */
@@ -235,7 +234,6 @@ static int bfin_t350mcqb_fb_release(struct fb_info *info, int user)
         spin_lock(&fbi->lock);
 
         fbi->lq043_open_cnt--;
-        fbi->lq043_mmap = 0;
 
         if (fbi->lq043_open_cnt <= 0) {
                 bfin_t350mcqb_disable_ppi();
@@ -293,32 +291,6 @@ static int bfin_t350mcqb_fb_check_var(struct fb_var_screeninfo *var,
         return 0;
 }
 
-static int bfin_t350mcqb_fb_mmap(struct fb_info *info, struct vm_area_struct *vma)
-{
-        struct bfin_t350mcqbfb_info *fbi = info->par;
-
-        if (fbi->lq043_mmap)
-                return -1;
-
-        spin_lock(&fbi->lock);
-        fbi->lq043_mmap = 1;
-        spin_unlock(&fbi->lock);
-
-        vma->vm_start = (unsigned long)(fbi->fb_buffer + ACTIVE_VIDEO_MEM_OFFSET);
-
-        vma->vm_end = vma->vm_start + info->fix.smem_len;
-        /* For those who don't understand how mmap works, go read
-         *   Documentation/nommu-mmap.txt.
-         * For those that do, you will know that the VM_MAYSHARE flag
-         * must be set in the vma->vm_flags structure on noMMU
-         *   Other flags can be set, and are documented in
-         *   include/linux/mm.h
-         */
-        vma->vm_flags |= VM_MAYSHARE | VM_SHARED;
-
-        return 0;
-}
-
 int bfin_t350mcqb_fb_cursor(struct fb_info *info, struct fb_cursor *cursor)
 {
         if (nocursor)
@@ -370,7 +342,6 @@ static struct fb_ops bfin_t350mcqb_fb_ops = {
         .fb_fillrect = cfb_fillrect,
         .fb_copyarea = cfb_copyarea,
         .fb_imageblit = cfb_imageblit,
-        .fb_mmap = bfin_t350mcqb_fb_mmap,
         .fb_cursor = bfin_t350mcqb_fb_cursor,
         .fb_setcolreg = bfin_t350mcqb_fb_setcolreg,
 };
diff --git a/drivers/video/broadsheetfb.c b/drivers/video/broadsheetfb.c
index df9ccb901d86..ebda6876d3a9 100644
--- a/drivers/video/broadsheetfb.c
+++ b/drivers/video/broadsheetfb.c
@@ -29,11 +29,65 @@
 #include <linux/init.h>
 #include <linux/platform_device.h>
 #include <linux/list.h>
+#include <linux/firmware.h>
 #include <linux/uaccess.h>
 
 #include <video/broadsheetfb.h>
 
-/* Display specific information */
+/* track panel specific parameters */
+struct panel_info {
+        int w;
+        int h;
+        u16 sdcfg;
+        u16 gdcfg;
+        u16 lutfmt;
+        u16 fsynclen;
+        u16 fendfbegin;
+        u16 lsynclen;
+        u16 lendlbegin;
+        u16 pixclk;
+};
+
+/* table of panel specific parameters to be indexed into by the board drivers */
+static struct panel_info panel_table[] = {
+        {       /* standard 6" on TFT backplane */
+                .w = 800,
+                .h = 600,
+                .sdcfg = (100 | (1 << 8) | (1 << 9)),
+                .gdcfg = 2,
+                .lutfmt = (4 | (1 << 7)),
+                .fsynclen = 4,
+                .fendfbegin = (10 << 8) | 4,
+                .lsynclen = 10,
+                .lendlbegin = (100 << 8) | 4,
+                .pixclk = 6,
+        },
+        {       /* custom 3.7" flexible on PET or steel */
+                .w = 320,
+                .h = 240,
+                .sdcfg = (67 | (0 << 8) | (0 << 9) | (0 << 10) | (0 << 12)),
+                .gdcfg = 3,
+                .lutfmt = (4 | (1 << 7)),
+                .fsynclen = 0,
+                .fendfbegin = (80 << 8) | 4,
+                .lsynclen = 10,
+                .lendlbegin = (80 << 8) | 20,
+                .pixclk = 14,
+        },
+        {       /* standard 9.7" on TFT backplane */
+                .w = 1200,
+                .h = 825,
+                .sdcfg = (100 | (1 << 8) | (1 << 9) | (0 << 10) | (0 << 12)),
+                .gdcfg = 2,
+                .lutfmt = (4 | (1 << 7)),
+                .fsynclen = 0,
+                .fendfbegin = (4 << 8) | 4,
+                .lsynclen = 4,
+                .lendlbegin = (60 << 8) | 10,
+                .pixclk = 3,
+        },
+};
+
 #define DPY_W 800
 #define DPY_H 600
 
@@ -62,30 +116,30 @@ static struct fb_var_screeninfo broadsheetfb_var __devinitdata = {
 };
 
 /* main broadsheetfb functions */
-static void broadsheet_issue_data(struct broadsheetfb_par *par, u16 data)
+static void broadsheet_gpio_issue_data(struct broadsheetfb_par *par, u16 data)
 {
         par->board->set_ctl(par, BS_WR, 0);
         par->board->set_hdb(par, data);
         par->board->set_ctl(par, BS_WR, 1);
 }
 
-static void broadsheet_issue_cmd(struct broadsheetfb_par *par, u16 data)
+static void broadsheet_gpio_issue_cmd(struct broadsheetfb_par *par, u16 data)
 {
         par->board->set_ctl(par, BS_DC, 0);
-        broadsheet_issue_data(par, data);
+        broadsheet_gpio_issue_data(par, data);
 }
 
-static void broadsheet_send_command(struct broadsheetfb_par *par, u16 data)
+static void broadsheet_gpio_send_command(struct broadsheetfb_par *par, u16 data)
 {
         par->board->wait_for_rdy(par);
 
         par->board->set_ctl(par, BS_CS, 0);
-        broadsheet_issue_cmd(par, data);
+        broadsheet_gpio_issue_cmd(par, data);
         par->board->set_ctl(par, BS_DC, 1);
         par->board->set_ctl(par, BS_CS, 1);
 }
 
-static void broadsheet_send_cmdargs(struct broadsheetfb_par *par, u16 cmd,
+static void broadsheet_gpio_send_cmdargs(struct broadsheetfb_par *par, u16 cmd,
                                         int argc, u16 *argv)
 {
         int i;
@@ -93,15 +147,43 @@ static void broadsheet_send_cmdargs(struct broadsheetfb_par *par, u16 cmd,
         par->board->wait_for_rdy(par);
 
         par->board->set_ctl(par, BS_CS, 0);
-        broadsheet_issue_cmd(par, cmd);
+        broadsheet_gpio_issue_cmd(par, cmd);
         par->board->set_ctl(par, BS_DC, 1);
 
         for (i = 0; i < argc; i++)
-                broadsheet_issue_data(par, argv[i]);
+                broadsheet_gpio_issue_data(par, argv[i]);
         par->board->set_ctl(par, BS_CS, 1);
 }
 
-static void broadsheet_burst_write(struct broadsheetfb_par *par, int size,
+static void broadsheet_mmio_send_cmdargs(struct broadsheetfb_par *par, u16 cmd,
+                                    int argc, u16 *argv)
+{
+        int i;
+
+        par->board->mmio_write(par, BS_MMIO_CMD, cmd);
+
+        for (i = 0; i < argc; i++)
+                par->board->mmio_write(par, BS_MMIO_DATA, argv[i]);
+}
+
+static void broadsheet_send_command(struct broadsheetfb_par *par, u16 data)
+{
+        if (par->board->mmio_write)
+                par->board->mmio_write(par, BS_MMIO_CMD, data);
+        else
+                broadsheet_gpio_send_command(par, data);
+}
+
+static void broadsheet_send_cmdargs(struct broadsheetfb_par *par, u16 cmd,
+                                    int argc, u16 *argv)
+{
+        if (par->board->mmio_write)
+                broadsheet_mmio_send_cmdargs(par, cmd, argc, argv);
+        else
+                broadsheet_gpio_send_cmdargs(par, cmd, argc, argv);
+}
+
+static void broadsheet_gpio_burst_write(struct broadsheetfb_par *par, int size,
                                         u16 *data)
 {
         int i;
@@ -121,7 +203,30 @@ static void broadsheet_burst_write(struct broadsheetfb_par *par, int size,
         par->board->set_ctl(par, BS_CS, 1);
 }
 
-static u16 broadsheet_get_data(struct broadsheetfb_par *par)
+static void broadsheet_mmio_burst_write(struct broadsheetfb_par *par, int size,
+                                   u16 *data)
+{
+        int i;
+        u16 tmp;
+
+        for (i = 0; i < size; i++) {
+                tmp = (data[i] & 0x0F) << 4;
+                tmp |= (data[i] & 0x0F00) << 4;
+                par->board->mmio_write(par, BS_MMIO_DATA, tmp);
+        }
+
+}
+
+static void broadsheet_burst_write(struct broadsheetfb_par *par, int size,
+                                   u16 *data)
+{
+        if (par->board->mmio_write)
+                broadsheet_mmio_burst_write(par, size, data);
+        else
+                broadsheet_gpio_burst_write(par, size, data);
+}
+
+static u16 broadsheet_gpio_get_data(struct broadsheetfb_par *par)
 {
         u16 res;
         /* wait for ready to go hi. (lo is busy) */
@@ -141,7 +246,16 @@ static u16 broadsheet_get_data(struct broadsheetfb_par *par)
         return res;
 }
 
-static void broadsheet_write_reg(struct broadsheetfb_par *par, u16 reg,
+
+static u16 broadsheet_get_data(struct broadsheetfb_par *par)
+{
+        if (par->board->mmio_read)
+                return par->board->mmio_read(par);
+        else
+                return broadsheet_gpio_get_data(par);
+}
+
+static void broadsheet_gpio_write_reg(struct broadsheetfb_par *par, u16 reg,
                                         u16 data)
 {
         /* wait for ready to go hi. (lo is busy) */
@@ -150,44 +264,541 @@ static void broadsheet_write_reg(struct broadsheetfb_par *par, u16 reg,
         /* cs lo, dc lo for cmd, we lo for each data, db as usual */
         par->board->set_ctl(par, BS_CS, 0);
 
-        broadsheet_issue_cmd(par, BS_CMD_WR_REG);
+        broadsheet_gpio_issue_cmd(par, BS_CMD_WR_REG);
 
         par->board->set_ctl(par, BS_DC, 1);
 
-        broadsheet_issue_data(par, reg);
-        broadsheet_issue_data(par, data);
+        broadsheet_gpio_issue_data(par, reg);
+        broadsheet_gpio_issue_data(par, data);
 
         par->board->set_ctl(par, BS_CS, 1);
 }
 
+static void broadsheet_mmio_write_reg(struct broadsheetfb_par *par, u16 reg,
+                                 u16 data)
+{
+        par->board->mmio_write(par, BS_MMIO_CMD, BS_CMD_WR_REG);
+        par->board->mmio_write(par, BS_MMIO_DATA, reg);
+        par->board->mmio_write(par, BS_MMIO_DATA, data);
+
+}
+
+static void broadsheet_write_reg(struct broadsheetfb_par *par, u16 reg,
+                                        u16 data)
+{
+        if (par->board->mmio_write)
+                broadsheet_mmio_write_reg(par, reg, data);
+        else
+                broadsheet_gpio_write_reg(par, reg, data);
+}
+
+static void broadsheet_write_reg32(struct broadsheetfb_par *par, u16 reg,
+                                        u32 data)
+{
+        broadsheet_write_reg(par, reg, cpu_to_le32(data) & 0xFFFF);
+        broadsheet_write_reg(par, reg + 2, (cpu_to_le32(data) >> 16) & 0xFFFF);
+}
+
+
 static u16 broadsheet_read_reg(struct broadsheetfb_par *par, u16 reg)
 {
-        broadsheet_send_command(par, reg);
-        msleep(100);
+        broadsheet_send_cmdargs(par, BS_CMD_RD_REG, 1, &reg);
+        par->board->wait_for_rdy(par);
         return broadsheet_get_data(par);
 }
 
+/* functions for waveform manipulation */
+static int is_broadsheet_pll_locked(struct broadsheetfb_par *par)
+{
+        return broadsheet_read_reg(par, 0x000A) & 0x0001;
+}
+
+static int broadsheet_setup_plls(struct broadsheetfb_par *par)
+{
+        int retry_count = 0;
+        u16 tmp;
+
+        /* disable arral saemipu mode */
+        broadsheet_write_reg(par, 0x0006, 0x0000);
+
+        broadsheet_write_reg(par, 0x0010, 0x0004);
+        broadsheet_write_reg(par, 0x0012, 0x5949);
+        broadsheet_write_reg(par, 0x0014, 0x0040);
+        broadsheet_write_reg(par, 0x0016, 0x0000);
+
+        do {
+                if (retry_count++ > 100)
+                        return -ETIMEDOUT;
+                mdelay(1);
+        } while (!is_broadsheet_pll_locked(par));
+
+        tmp = broadsheet_read_reg(par, 0x0006);
+        tmp &= ~0x1;
+        broadsheet_write_reg(par, 0x0006, tmp);
+
+        return 0;
+}
+
+static int broadsheet_setup_spi(struct broadsheetfb_par *par)
+{
+
+        broadsheet_write_reg(par, 0x0204, ((3 << 3) | 1));
+        broadsheet_write_reg(par, 0x0208, 0x0001);
+
+        return 0;
+}
+
+static int broadsheet_setup_spiflash(struct broadsheetfb_par *par,
+                                                u16 *orig_sfmcd)
+{
+
+        *orig_sfmcd = broadsheet_read_reg(par, 0x0204);
+        broadsheet_write_reg(par, 0x0208, 0);
+        broadsheet_write_reg(par, 0x0204, 0);
+        broadsheet_write_reg(par, 0x0204, ((3 << 3) | 1));
+
+        return 0;
+}
+
+static int broadsheet_spiflash_wait_for_bit(struct broadsheetfb_par *par,
+                                                u16 reg, int bitnum, int val,
+                                                int timeout)
+{
+        u16 tmp;
+
+        do {
+                tmp = broadsheet_read_reg(par, reg);
+                if (((tmp >> bitnum) & 1) == val)
+                        return 0;
+                mdelay(1);
+        } while (timeout--);
+
+        return -ETIMEDOUT;
+}
+
+static int broadsheet_spiflash_write_byte(struct broadsheetfb_par *par, u8 data)
+{
+        broadsheet_write_reg(par, 0x0202, (data | 0x100));
+
+        return broadsheet_spiflash_wait_for_bit(par, 0x0206, 3, 0, 100);
+}
+
+static int broadsheet_spiflash_read_byte(struct broadsheetfb_par *par, u8 *data)
+{
+        int err;
+        u16 tmp;
+
+        broadsheet_write_reg(par, 0x0202, 0);
+
+        err = broadsheet_spiflash_wait_for_bit(par, 0x0206, 3, 0, 100);
+        if (err)
+                return err;
+
+        tmp = broadsheet_read_reg(par, 0x200);
+
+        *data = tmp & 0xFF;
+
+        return 0;
+}
+
+static int broadsheet_spiflash_wait_for_status(struct broadsheetfb_par *par,
+                                                                int timeout)
+{
+        u8 tmp;
+        int err;
+
+        do {
+                broadsheet_write_reg(par, 0x0208, 1);
+
+                err = broadsheet_spiflash_write_byte(par, 0x05);
+                if (err)
+                        goto failout;
+
+                err = broadsheet_spiflash_read_byte(par, &tmp);
+                if (err)
+                        goto failout;
+
+                broadsheet_write_reg(par, 0x0208, 0);
+
+                if (!(tmp & 0x1))
+                        return 0;
+
+                mdelay(5);
+        } while (timeout--);
+
+        dev_err(par->info->device, "Timed out waiting for spiflash status\n");
+        return -ETIMEDOUT;
+
+failout:
+        broadsheet_write_reg(par, 0x0208, 0);
+        return err;
+}
+
+static int broadsheet_spiflash_op_on_address(struct broadsheetfb_par *par,
+                                                        u8 op, u32 addr)
+{
+        int i;
+        u8 tmp;
+        int err;
+
+        broadsheet_write_reg(par, 0x0208, 1);
+
+        err = broadsheet_spiflash_write_byte(par, op);
+        if (err)
+                return err;
+
+        for (i = 2; i >= 0; i--) {
+                tmp = ((addr >> (i * 8)) & 0xFF);
+                err = broadsheet_spiflash_write_byte(par, tmp);
+                if (err)
+                        return err;
+        }
+
+        return err;
+}
+
+static int broadsheet_verify_spiflash(struct broadsheetfb_par *par,
+                                                int *flash_type)
+{
+        int err = 0;
+        u8 sig;
+
+        err = broadsheet_spiflash_op_on_address(par, 0xAB, 0x00000000);
+        if (err)
+                goto failout;
+
+        err = broadsheet_spiflash_read_byte(par, &sig);
+        if (err)
+                goto failout;
+
+        if ((sig != 0x10) && (sig != 0x11)) {
+                dev_err(par->info->device, "Unexpected flash type\n");
+                err = -EINVAL;
+                goto failout;
+        }
+
+        *flash_type = sig;
+
+failout:
+        broadsheet_write_reg(par, 0x0208, 0);
+        return err;
+}
+
+static int broadsheet_setup_for_wfm_write(struct broadsheetfb_par *par,
+                                        u16 *initial_sfmcd, int *flash_type)
+
+{
+        int err;
+
+        err = broadsheet_setup_plls(par);
+        if (err)
+                return err;
+
+        broadsheet_write_reg(par, 0x0106, 0x0203);
+
+        err = broadsheet_setup_spi(par);
+        if (err)
+                return err;
+
+        err = broadsheet_setup_spiflash(par, initial_sfmcd);
+        if (err)
+                return err;
+
+        return broadsheet_verify_spiflash(par, flash_type);
+}
+
+static int broadsheet_spiflash_write_control(struct broadsheetfb_par *par,
+                                                int mode)
+{
+        int err;
+
+        broadsheet_write_reg(par, 0x0208, 1);
+        if (mode)
+                err = broadsheet_spiflash_write_byte(par, 0x06);
+        else
+                err = broadsheet_spiflash_write_byte(par, 0x04);
+
+        broadsheet_write_reg(par, 0x0208, 0);
+        return err;
+}
+
+static int broadsheet_spiflash_erase_sector(struct broadsheetfb_par *par,
+                                                int addr)
+{
+        int err;
+
+        broadsheet_spiflash_write_control(par, 1);
+
+        err = broadsheet_spiflash_op_on_address(par, 0xD8, addr);
+
+        broadsheet_write_reg(par, 0x0208, 0);
+
+        if (err)
+                return err;
+
+        err = broadsheet_spiflash_wait_for_status(par, 1000);
+
+        return err;
+}
+
+static int broadsheet_spiflash_read_range(struct broadsheetfb_par *par,
+                                                int addr, int size, char *data)
+{
+        int err;
+        int i;
+
+        err = broadsheet_spiflash_op_on_address(par, 0x03, addr);
+        if (err)
+                goto failout;
+
+        for (i = 0; i < size; i++) {
+                err = broadsheet_spiflash_read_byte(par, &data[i]);
+                if (err)
+                        goto failout;
+        }
+
+failout:
+        broadsheet_write_reg(par, 0x0208, 0);
+        return err;
+}
+
+#define BS_SPIFLASH_PAGE_SIZE 256
+static int broadsheet_spiflash_write_page(struct broadsheetfb_par *par,
+                                                int addr, const char *data)
+{
+        int err;
+        int i;
+
+        broadsheet_spiflash_write_control(par, 1);
+
+        err = broadsheet_spiflash_op_on_address(par, 0x02, addr);
+        if (err)
+                goto failout;
+
+        for (i = 0; i < BS_SPIFLASH_PAGE_SIZE; i++) {
+                err = broadsheet_spiflash_write_byte(par, data[i]);
+                if (err)
+                        goto failout;
+        }
+
+        broadsheet_write_reg(par, 0x0208, 0);
+
+        err = broadsheet_spiflash_wait_for_status(par, 100);
+
+failout:
+        return err;
+}
+
+static int broadsheet_spiflash_write_sector(struct broadsheetfb_par *par,
+                                int addr, const char *data, int sector_size)
+{
+        int i;
+        int err;
+
+        for (i = 0; i < sector_size; i += BS_SPIFLASH_PAGE_SIZE) {
+                err = broadsheet_spiflash_write_page(par, addr + i, &data[i]);
+                if (err)
+                        return err;
+        }
+        return 0;
+}
+
+/*
+ * The caller must guarantee that the data to be rewritten is entirely
+ * contained within this sector. That is, data_start_addr + data_len
+ * must be less than sector_start_addr + sector_size.
+ */
+static int broadsheet_spiflash_rewrite_sector(struct broadsheetfb_par *par,
+                                        int sector_size, int data_start_addr,
+                                        int data_len, const char *data)
+{
+        int err;
+        char *sector_buffer;
+        int tail_start_addr;
+        int start_sector_addr;
+
+        sector_buffer = kzalloc(sizeof(char)*sector_size, GFP_KERNEL);
+        if (!sector_buffer)
+                return -ENOMEM;
+
+        /* the start address of the sector is the 0th byte of that sector */
+        start_sector_addr = (data_start_addr / sector_size) * sector_size;
+
+        /*
+         * check if there is head data that we need to readback into our sector
+         * buffer first
+         */
+        if (data_start_addr != start_sector_addr) {
+                /*
+                 * we need to read every byte up till the start address of our
+                 * data and we put it into our sector buffer.
+                 */
+                err = broadsheet_spiflash_read_range(par, start_sector_addr,
+                                                data_start_addr, sector_buffer);
+                if (err)
+                        return err;
+        }
+
+        /* now we copy our data into the right place in the sector buffer */
+        memcpy(sector_buffer + data_start_addr, data, data_len);
+
+        /*
+         * now we check if there is a tail section of the sector that we need to
+         * readback.
+         */
+        tail_start_addr = (data_start_addr + data_len) % sector_size;
+
+        if (tail_start_addr) {
+                int tail_len;
+
+                tail_len = sector_size - tail_start_addr;
+
+                /* now we read this tail into our sector buffer */
+                err = broadsheet_spiflash_read_range(par, tail_start_addr,
+                        tail_len, sector_buffer + tail_start_addr);
+                if (err)
+                        return err;
+        }
+
+        /* if we got here we have the full sector that we want to rewrite. */
+
+        /* first erase the sector */
+        err = broadsheet_spiflash_erase_sector(par, start_sector_addr);
+        if (err)
+                return err;
+
+        /* now write it */
+        err = broadsheet_spiflash_write_sector(par, start_sector_addr,
+                                        sector_buffer, sector_size);
+        return err;
+}
+
+static int broadsheet_write_spiflash(struct broadsheetfb_par *par, u32 wfm_addr,
+                                const u8 *wfm, int bytecount, int flash_type)
+{
+        int sector_size;
+        int err;
+        int cur_addr;
+        int writecount;
+        int maxlen;
+        int offset = 0;
+
+        switch (flash_type) {
+        case 0x10:
+                sector_size = 32*1024;
+                break;
+        case 0x11:
+        default:
+                sector_size = 64*1024;
+                break;
+        }
+
+        while (bytecount) {
+                cur_addr = wfm_addr + offset;
+                maxlen = roundup(cur_addr, sector_size) - cur_addr;
+                writecount = min(bytecount, maxlen);
+
+                err = broadsheet_spiflash_rewrite_sector(par, sector_size,
+                                cur_addr, writecount, wfm + offset);
+                if (err)
+                        return err;
+
+                offset += writecount;
+                bytecount -= writecount;
+        }
+
+        return 0;
+}
+
+static int broadsheet_store_waveform_to_spiflash(struct broadsheetfb_par *par,
+                                                const u8 *wfm, size_t wfm_size)
+{
+        int err = 0;
+        u16 initial_sfmcd = 0;
+        int flash_type = 0;
+
+        err = broadsheet_setup_for_wfm_write(par, &initial_sfmcd, &flash_type);
+        if (err)
+                goto failout;
+
+        err = broadsheet_write_spiflash(par, 0x886, wfm, wfm_size, flash_type);
+
+failout:
+        broadsheet_write_reg(par, 0x0204, initial_sfmcd);
+        return err;
+}
+
+static ssize_t broadsheet_loadstore_waveform(struct device *dev,
+                                                struct device_attribute *attr,
+                                                const char *buf, size_t len)
+{
+        int err;
+        struct fb_info *info = dev_get_drvdata(dev);
+        struct broadsheetfb_par *par = info->par;
+        const struct firmware *fw_entry;
+
+        if (len < 1)
+                return -EINVAL;
+
+        err = request_firmware(&fw_entry, "broadsheet.wbf", dev);
+        if (err < 0) {
+                dev_err(dev, "Failed to get broadsheet waveform\n");
+                goto err_failed;
+        }
+
+        /* try to enforce reasonable min max on waveform */
+        if ((fw_entry->size < 8*1024) || (fw_entry->size > 64*1024)) {
+                dev_err(dev, "Invalid waveform\n");
+                err = -EINVAL;
+                goto err_failed;
+        }
+
+        mutex_lock(&(par->io_lock));
+        err = broadsheet_store_waveform_to_spiflash(par, fw_entry->data,
+                                                        fw_entry->size);
+
+        mutex_unlock(&(par->io_lock));
+        if (err < 0) {
+                dev_err(dev, "Failed to store broadsheet waveform\n");
+                goto err_failed;
+        }
+
+        dev_info(dev, "Stored broadsheet waveform, size %zd\n", fw_entry->size);
+
+        return len;
+
+err_failed:
+        return err;
+}
+static DEVICE_ATTR(loadstore_waveform, S_IWUSR, NULL,
+                        broadsheet_loadstore_waveform);
+
+/* upper level functions that manipulate the display and other stuff */
 static void __devinit broadsheet_init_display(struct broadsheetfb_par *par)
 {
         u16 args[5];
-
-        args[0] = DPY_W;
-        args[1] = DPY_H;
-        args[2] = (100 | (1 << 8) | (1 << 9)); /* sdcfg */
-        args[3] = 2; /* gdrv cfg */
-        args[4] = (4 | (1 << 7)); /* lut index format */
+        int xres = par->info->var.xres;
+        int yres = par->info->var.yres;
+
+        args[0] = panel_table[par->panel_index].w;
+        args[1] = panel_table[par->panel_index].h;
+        args[2] = panel_table[par->panel_index].sdcfg;
+        args[3] = panel_table[par->panel_index].gdcfg;
+        args[4] = panel_table[par->panel_index].lutfmt;
         broadsheet_send_cmdargs(par, BS_CMD_INIT_DSPE_CFG, 5, args);
 
         /* did the controller really set it? */
         broadsheet_send_cmdargs(par, BS_CMD_INIT_DSPE_CFG, 5, args);
 
-        args[0] = 4; /* fsync len */
-        args[1] = (10 << 8) | 4; /* fend/fbegin len */
-        args[2] = 10; /* line sync len */
-        args[3] = (100 << 8) | 4; /* line end/begin len */
-        args[4] = 6; /* pixel clock cfg */
+        args[0] = panel_table[par->panel_index].fsynclen;
+        args[1] = panel_table[par->panel_index].fendfbegin;
+        args[2] = panel_table[par->panel_index].lsynclen;
+        args[3] = panel_table[par->panel_index].lendlbegin;
+        args[4] = panel_table[par->panel_index].pixclk;
         broadsheet_send_cmdargs(par, BS_CMD_INIT_DSPE_TMG, 5, args);
 
+        broadsheet_write_reg32(par, 0x310, xres*yres*2);
+
         /* setup waveform */
         args[0] = 0x886;
         args[1] = 0;
@@ -207,8 +818,9 @@ static void __devinit broadsheet_init_display(struct broadsheetfb_par *par)
         args[0] = 0x154;
         broadsheet_send_cmdargs(par, BS_CMD_WR_REG, 1, args);
 
-        broadsheet_burst_write(par, DPY_W*DPY_H/2,
-                                (u16 *) par->info->screen_base);
+        broadsheet_burst_write(par, (panel_table[par->panel_index].w *
+                                        panel_table[par->panel_index].h)/2,
+                                        (u16 *) par->info->screen_base);
 
         broadsheet_send_command(par, BS_CMD_LD_IMG_END);
 
@@ -222,6 +834,21 @@ static void __devinit broadsheet_init_display(struct broadsheetfb_par *par)
         par->board->wait_for_rdy(par);
 }
 
+static void __devinit broadsheet_identify(struct broadsheetfb_par *par)
+{
+        u16 rev, prc;
+        struct device *dev = par->info->device;
+
+        rev = broadsheet_read_reg(par, BS_REG_REV);
+        prc = broadsheet_read_reg(par, BS_REG_PRC);
+        dev_info(dev, "Broadsheet Rev 0x%x, Product Code 0x%x\n", rev, prc);
+
+        if (prc != 0x0047)
+                dev_warn(dev, "Unrecognized Broadsheet Product Code\n");
+        if (rev != 0x0100)
+                dev_warn(dev, "Unrecognized Broadsheet Revision\n");
+}
+
 static void __devinit broadsheet_init(struct broadsheetfb_par *par)
 {
         broadsheet_send_command(par, BS_CMD_INIT_SYS_RUN);
@@ -236,6 +863,7 @@ static void broadsheetfb_dpy_update_pages(struct broadsheetfb_par *par,
         u16 args[5];
         unsigned char *buf = (unsigned char *)par->info->screen_base;
 
+        mutex_lock(&(par->io_lock));
         /* y1 must be a multiple of 4 so drop the lower bits */
         y1 &= 0xFFFC;
         /* y2 must be a multiple of 4 , but - 1 so up the lower bits */
@@ -265,6 +893,7 @@ static void broadsheetfb_dpy_update_pages(struct broadsheetfb_par *par,
         broadsheet_send_command(par, BS_CMD_WAIT_DSPE_FREND);
 
         par->board->wait_for_rdy(par);
+        mutex_unlock(&(par->io_lock));
 
 }
 
@@ -272,13 +901,15 @@ static void broadsheetfb_dpy_update(struct broadsheetfb_par *par)
 {
         u16 args[5];
 
+        mutex_lock(&(par->io_lock));
         args[0] = 0x3 << 4;
         broadsheet_send_cmdargs(par, BS_CMD_LD_IMG, 1, args);
 
         args[0] = 0x154;
         broadsheet_send_cmdargs(par, BS_CMD_WR_REG, 1, args);
-        broadsheet_burst_write(par, DPY_W*DPY_H/2,
-                                (u16 *) par->info->screen_base);
+        broadsheet_burst_write(par, (panel_table[par->panel_index].w *
+                                        panel_table[par->panel_index].h)/2,
+                                        (u16 *) par->info->screen_base);
 
         broadsheet_send_command(par, BS_CMD_LD_IMG_END);
 
@@ -290,7 +921,7 @@ static void broadsheetfb_dpy_update(struct broadsheetfb_par *par)
         broadsheet_send_command(par, BS_CMD_WAIT_DSPE_FREND);
 
         par->board->wait_for_rdy(par);
-
+        mutex_unlock(&(par->io_lock));
 }
 
 /* this is called back from the deferred io workqueue */
@@ -436,6 +1067,8 @@ static int __devinit broadsheetfb_probe(struct platform_device *dev)
         unsigned char *videomemory;
         struct broadsheetfb_par *par;
         int i;
+        int dpyw, dpyh;
+        int panel_index;
 
         /* pick up board specific routines */
         board = dev->dev.platform_data;
@@ -450,7 +1083,24 @@ static int __devinit broadsheetfb_probe(struct platform_device *dev)
         if (!info)
                 goto err;
 
-        videomemorysize = (DPY_W*DPY_H);
+        switch (board->get_panel_type()) {
+        case 37:
+                panel_index = 1;
+                break;
+        case 97:
+                panel_index = 2;
+                break;
+        case 6:
+        default:
+                panel_index = 0;
+                break;
+        }
+
+        dpyw = panel_table[panel_index].w;
+        dpyh = panel_table[panel_index].h;
+
+        videomemorysize = roundup((dpyw*dpyh), PAGE_SIZE);
+
         videomemory = vmalloc(videomemorysize);
         if (!videomemory)
                 goto err_fb_rel;
@@ -460,16 +1110,25 @@ static int __devinit broadsheetfb_probe(struct platform_device *dev)
         info->screen_base = (char *)videomemory;
         info->fbops = &broadsheetfb_ops;
 
+        broadsheetfb_var.xres = dpyw;
+        broadsheetfb_var.yres = dpyh;
+        broadsheetfb_var.xres_virtual = dpyw;
+        broadsheetfb_var.yres_virtual = dpyh;
         info->var = broadsheetfb_var;
+
+        broadsheetfb_fix.line_length = dpyw;
         info->fix = broadsheetfb_fix;
         info->fix.smem_len = videomemorysize;
         par = info->par;
+        par->panel_index = panel_index;
         par->info = info;
         par->board = board;
         par->write_reg = broadsheet_write_reg;
         par->read_reg = broadsheet_read_reg;
         init_waitqueue_head(&par->waitq);
 
+        mutex_init(&par->io_lock);
+
         info->flags = FBINFO_FLAG_DEFAULT | FBINFO_VIRTFB;
 
         info->fbdefio = &broadsheetfb_defio;
@@ -496,13 +1155,20 @@ static int __devinit broadsheetfb_probe(struct platform_device *dev)
         if (retval < 0)
                 goto err_free_irq;
 
+        broadsheet_identify(par);
+
         broadsheet_init(par);
 
         retval = register_framebuffer(info);
         if (retval < 0)
                 goto err_free_irq;
+
         platform_set_drvdata(dev, info);
 
+        retval = device_create_file(&dev->dev, &dev_attr_loadstore_waveform);
+        if (retval < 0)
+                goto err_unreg_fb;
+
         printk(KERN_INFO
                "fb%d: Broadsheet frame buffer, using %dK of video memory\n",
                info->node, videomemorysize >> 10);
@@ -510,6 +1176,8 @@ static int __devinit broadsheetfb_probe(struct platform_device *dev)
 
         return 0;
 
+err_unreg_fb:
+        unregister_framebuffer(info);
 err_free_irq:
         board->cleanup(par);
 err_cmap:
@@ -530,6 +1198,8 @@ static int __devexit broadsheetfb_remove(struct platform_device *dev)
 
         if (info) {
                 struct broadsheetfb_par *par = info->par;
+
+                device_remove_file(info->dev, &dev_attr_loadstore_waveform);
                 unregister_framebuffer(info);
                 fb_deferred_io_cleanup(info);
                 par->board->cleanup(par);
diff --git a/drivers/video/mb862xx/mb862xxfb.c b/drivers/video/mb862xx/mb862xxfb.c
index fabb0c59a211..8280a58a0e55 100644
--- a/drivers/video/mb862xx/mb862xxfb.c
+++ b/drivers/video/mb862xx/mb862xxfb.c
@@ -31,15 +31,6 @@
 #define CARMINE_MEM_SIZE        0x8000000
 #define DRV_NAME                "mb862xxfb"
 
-#if defined(CONFIG_LWMON5)
-static struct mb862xx_gc_mode lwmon5_gc_mode = {
-        /* Mode for Sharp LQ104V1DG61 TFT LCD Panel */
-        { "640x480", 60, 640, 480, 40000, 48, 16, 32, 11, 96, 2, 0, 0, 0 },
-        /* 16 bits/pixel, 32MB, 100MHz, SDRAM memory mode value */
-        16, 0x2000000, GC_CCF_COT_100, 0x414fb7f2
-};
-#endif
-
 #if defined(CONFIG_SOCRATES)
 static struct mb862xx_gc_mode socrates_gc_mode = {
         /* Mode for Prime View PM070WL4 TFT LCD Panel */
@@ -600,10 +591,6 @@ static int __devinit of_platform_mb862xx_probe(struct of_device *ofdev,
                 goto irqdisp;
         }
 
-#if defined(CONFIG_LWMON5)
-        par->gc_mode = &lwmon5_gc_mode;
-#endif
-
 #if defined(CONFIG_SOCRATES)
         par->gc_mode = &socrates_gc_mode;
 #endif
diff --git a/drivers/video/mbx/mbxfb.c b/drivers/video/mbx/mbxfb.c
index 01f77bcc68f9..afea9abbd678 100644
--- a/drivers/video/mbx/mbxfb.c
+++ b/drivers/video/mbx/mbxfb.c
@@ -693,7 +693,7 @@ static void __devinit setup_memc(struct fb_info *fbi)
         unsigned long tmp;
         int i;
 
-        /* FIXME: use platfrom specific parameters */
+        /* FIXME: use platform specific parameters */
         /* setup SDRAM controller */
         write_reg_dly((LMCFG_LMC_DS | LMCFG_LMC_TS | LMCFG_LMD_TS |
                 LMCFG_LMA_TS),
diff --git a/drivers/video/modedb.c b/drivers/video/modedb.c
index 0129f1bc3522..b895aae41630 100644
--- a/drivers/video/modedb.c
+++ b/drivers/video/modedb.c
@@ -893,7 +893,7 @@ const struct fb_videomode *fb_match_mode(const struct fb_var_screeninfo *var,
 }
 
 /**
- * fb_add_videomode: adds videomode entry to modelist
+ * fb_add_videomode - adds videomode entry to modelist
  * @mode: videomode to add
  * @head: struct list_head of modelist
  *
@@ -928,7 +928,7 @@ int fb_add_videomode(const struct fb_videomode *mode, struct list_head *head)
 }
 
 /**
- * fb_delete_videomode: removed videomode entry from modelist
+ * fb_delete_videomode - removed videomode entry from modelist
  * @mode: videomode to remove
  * @head: struct list_head of modelist
  *
@@ -953,7 +953,7 @@ void fb_delete_videomode(const struct fb_videomode *mode,
 }
 
 /**
- * fb_destroy_modelist: destroy modelist
+ * fb_destroy_modelist - destroy modelist
  * @head: struct list_head of modelist
  */
 void fb_destroy_modelist(struct list_head *head)
@@ -968,7 +968,7 @@ void fb_destroy_modelist(struct list_head *head)
 EXPORT_SYMBOL_GPL(fb_destroy_modelist);
 
 /**
- * fb_videomode_to_modelist: convert mode array to mode list
+ * fb_videomode_to_modelist - convert mode array to mode list
  * @modedb: array of struct fb_videomode
  * @num: number of entries in array
  * @head: struct list_head of modelist
diff --git a/drivers/video/nuc900fb.c b/drivers/video/nuc900fb.c
new file mode 100644
index 000000000000..6bf0d460a738
--- /dev/null
+++ b/drivers/video/nuc900fb.c
@@ -0,0 +1,779 @@
+/*
+ *
+ * Copyright (c) 2009 Nuvoton technology corporation
+ * All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ *  Description:
+ *    Nuvoton LCD Controller Driver
+ *  Author:
+ *    Wang Qiang (rurality.linux@gmail.com) 2009/12/11
+ */
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/errno.h>
+#include <linux/string.h>
+#include <linux/mm.h>
+#include <linux/tty.h>
+#include <linux/slab.h>
+#include <linux/delay.h>
+#include <linux/fb.h>
+#include <linux/init.h>
+#include <linux/dma-mapping.h>
+#include <linux/interrupt.h>
+#include <linux/workqueue.h>
+#include <linux/wait.h>
+#include <linux/platform_device.h>
+#include <linux/clk.h>
+#include <linux/cpufreq.h>
+#include <linux/io.h>
+#include <linux/pm.h>
+#include <linux/device.h>
+
+#include <mach/map.h>
+#include <mach/regs-clock.h>
+#include <mach/regs-ldm.h>
+#include <mach/fb.h>
+#include <mach/clkdev.h>
+
+#include "nuc900fb.h"
+
+
+/*
+ *  Initialize the nuc900 video (dual) buffer address
+ */
+static void nuc900fb_set_lcdaddr(struct fb_info *info)
+{
+        struct nuc900fb_info *fbi = info->par;
+        void __iomem *regs = fbi->io;
+        unsigned long vbaddr1, vbaddr2;
+
+        vbaddr1  = info->fix.smem_start;
+        vbaddr2  = info->fix.smem_start;
+        vbaddr2 += info->fix.line_length * info->var.yres;
+
+        /* set frambuffer start phy addr*/
+        writel(vbaddr1, regs + REG_LCM_VA_BADDR0);
+        writel(vbaddr2, regs + REG_LCM_VA_BADDR1);
+
+        writel(fbi->regs.lcd_va_fbctrl, regs + REG_LCM_VA_FBCTRL);
+        writel(fbi->regs.lcd_va_scale, regs + REG_LCM_VA_SCALE);
+}
+
+/*
+ *      calculate divider for lcd div
+ */
+static unsigned int nuc900fb_calc_pixclk(struct nuc900fb_info *fbi,
+                                         unsigned long pixclk)
+{
+        unsigned long clk = fbi->clk_rate;
+        unsigned long long div;
+
+        /* pixclk is in picseconds. our clock is in Hz*/
+        /* div = (clk * pixclk)/10^12 */
+        div = (unsigned long long)clk * pixclk;
+        div >>= 12;
+        do_div(div, 625 * 625UL * 625);
+
+        dev_dbg(fbi->dev, "pixclk %ld, divisor is %lld\n", pixclk, div);
+
+        return div;
+}
+
+/*
+ *      Check the video params of 'var'.
+ */
+static int nuc900fb_check_var(struct fb_var_screeninfo *var,
+                               struct fb_info *info)
+{
+        struct nuc900fb_info *fbi = info->par;
+        struct nuc900fb_mach_info *mach_info = fbi->dev->platform_data;
+        struct nuc900fb_display *display = NULL;
+        struct nuc900fb_display *default_display = mach_info->displays +
+                                                   mach_info->default_display;
+        int i;
+
+        dev_dbg(fbi->dev, "check_var(var=%p, info=%p)\n", var, info);
+
+        /* validate x/y resolution */
+        /* choose default mode if possible */
+        if (var->xres == default_display->xres &&
+            var->yres == default_display->yres &&
+            var->bits_per_pixel == default_display->bpp)
+                display = default_display;
+        else
+                for (i = 0; i < mach_info->num_displays; i++)
+                        if (var->xres == mach_info->displays[i].xres &&
+                            var->yres == mach_info->displays[i].yres &&
+                            var->bits_per_pixel == mach_info->displays[i].bpp) {
+                                display = mach_info->displays + i;
+                                break;
+                        }
+
+        if (display == NULL) {
+                printk(KERN_ERR "wrong resolution or depth %dx%d at %d bit per pixel\n",
+                        var->xres, var->yres, var->bits_per_pixel);
+                return -EINVAL;
+        }
+
+        /* it should be the same size as the display */
+        var->xres_virtual       = display->xres;
+        var->yres_virtual       = display->yres;
+        var->height             = display->height;
+        var->width              = display->width;
+
+        /* copy lcd settings */
+        var->pixclock           = display->pixclock;
+        var->left_margin        = display->left_margin;
+        var->right_margin       = display->right_margin;
+        var->upper_margin       = display->upper_margin;
+        var->lower_margin       = display->lower_margin;
+        var->vsync_len          = display->vsync_len;
+        var->hsync_len          = display->hsync_len;
+
+        var->transp.offset      = 0;
+        var->transp.length      = 0;
+
+        fbi->regs.lcd_dccs = display->dccs;
+        fbi->regs.lcd_device_ctrl = display->devctl;
+        fbi->regs.lcd_va_fbctrl = display->fbctrl;
+        fbi->regs.lcd_va_scale = display->scale;
+
+        /* set R/G/B possions */
+        switch (var->bits_per_pixel) {
+        case 1:
+        case 2:
+        case 4:
+        case 8:
+        default:
+                var->red.offset         = 0;
+                var->red.length         = var->bits_per_pixel;
+                var->green              = var->red;
+                var->blue               = var->red;
+                break;
+        case 12:
+                var->red.length         = 4;
+                var->green.length       = 4;
+                var->blue.length        = 4;
+                var->red.offset         = 8;
+                var->green.offset       = 4;
+                var->blue.offset        = 0;
+                break;
+        case 16:
+                var->red.length         = 5;
+                var->green.length       = 6;
+                var->blue.length        = 5;
+                var->red.offset         = 11;
+                var->green.offset       = 5;
+                var->blue.offset        = 0;
+                break;
+        case 18:
+                var->red.length         = 6;
+                var->green.length       = 6;
+                var->blue.length        = 6;
+                var->red.offset         = 12;
+                var->green.offset       = 6;
+                var->blue.offset        = 0;
+                break;
+        case 32:
+                var->red.length         = 8;
+                var->green.length       = 8;
+                var->blue.length        = 8;
+                var->red.offset         = 16;
+                var->green.offset       = 8;
+                var->blue.offset        = 0;
+                break;
+        }
+
+        return 0;
+}
+
+/*
+ *      Calculate lcd register values from var setting & save into hw
+ */
+static void nuc900fb_calculate_lcd_regs(const struct fb_info *info,
+                                        struct nuc900fb_hw *regs)
+{
+        const struct fb_var_screeninfo *var = &info->var;
+        int vtt = var->height + var->upper_margin + var->lower_margin;
+        int htt = var->width + var->left_margin + var->right_margin;
+        int hsync = var->width + var->right_margin;
+        int vsync = var->height + var->lower_margin;
+
+        regs->lcd_crtc_size = LCM_CRTC_SIZE_VTTVAL(vtt) |
+                              LCM_CRTC_SIZE_HTTVAL(htt);
+        regs->lcd_crtc_dend = LCM_CRTC_DEND_VDENDVAL(var->height) |
+                              LCM_CRTC_DEND_HDENDVAL(var->width);
+        regs->lcd_crtc_hr = LCM_CRTC_HR_EVAL(var->width + 5) |
+                            LCM_CRTC_HR_SVAL(var->width + 1);
+        regs->lcd_crtc_hsync = LCM_CRTC_HSYNC_EVAL(hsync + var->hsync_len) |
+                               LCM_CRTC_HSYNC_SVAL(hsync);
+        regs->lcd_crtc_vr = LCM_CRTC_VR_EVAL(vsync + var->vsync_len) |
+                            LCM_CRTC_VR_SVAL(vsync);
+
+}
+
+/*
+ *      Activate (set) the controller from the given framebuffer
+ *      information
+ */
+static void nuc900fb_activate_var(struct fb_info *info)
+{
+        struct nuc900fb_info *fbi = info->par;
+        void __iomem *regs = fbi->io;
+        struct fb_var_screeninfo *var = &info->var;
+        int clkdiv;
+
+        clkdiv = nuc900fb_calc_pixclk(fbi, var->pixclock) - 1;
+        if (clkdiv < 0)
+                clkdiv = 0;
+
+        nuc900fb_calculate_lcd_regs(info, &fbi->regs);
+
+        /* set the new lcd registers*/
+
+        dev_dbg(fbi->dev, "new lcd register set:\n");
+        dev_dbg(fbi->dev, "dccs       = 0x%08x\n", fbi->regs.lcd_dccs);
+        dev_dbg(fbi->dev, "dev_ctl    = 0x%08x\n", fbi->regs.lcd_device_ctrl);
+        dev_dbg(fbi->dev, "crtc_size  = 0x%08x\n", fbi->regs.lcd_crtc_size);
+        dev_dbg(fbi->dev, "crtc_dend  = 0x%08x\n", fbi->regs.lcd_crtc_dend);
+        dev_dbg(fbi->dev, "crtc_hr    = 0x%08x\n", fbi->regs.lcd_crtc_hr);
+        dev_dbg(fbi->dev, "crtc_hsync = 0x%08x\n", fbi->regs.lcd_crtc_hsync);
+        dev_dbg(fbi->dev, "crtc_vr    = 0x%08x\n", fbi->regs.lcd_crtc_vr);
+
+        writel(fbi->regs.lcd_device_ctrl, regs + REG_LCM_DEV_CTRL);
+        writel(fbi->regs.lcd_crtc_size, regs + REG_LCM_CRTC_SIZE);
+        writel(fbi->regs.lcd_crtc_dend, regs + REG_LCM_CRTC_DEND);
+        writel(fbi->regs.lcd_crtc_hr, regs + REG_LCM_CRTC_HR);
+        writel(fbi->regs.lcd_crtc_hsync, regs + REG_LCM_CRTC_HSYNC);
+        writel(fbi->regs.lcd_crtc_vr, regs + REG_LCM_CRTC_VR);
+
+        /* set lcd address pointers */
+        nuc900fb_set_lcdaddr(info);
+
+        writel(fbi->regs.lcd_dccs, regs + REG_LCM_DCCS);
+}
+
+/*
+ *      Alters the hardware state.
+ *
+ */
+static int nuc900fb_set_par(struct fb_info *info)
+{
+        struct fb_var_screeninfo *var = &info->var;
+
+        switch (var->bits_per_pixel) {
+        case 32:
+        case 24:
+        case 18:
+        case 16:
+        case 12:
+                info->fix.visual = FB_VISUAL_TRUECOLOR;
+                break;
+        case 1:
+                info->fix.visual = FB_VISUAL_MONO01;
+                break;
+        default:
+                info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
+                break;
+        }
+
+        info->fix.line_length = (var->xres_virtual * var->bits_per_pixel) / 8;
+
+        /* activate this new configuration */
+        nuc900fb_activate_var(info);
+        return 0;
+}
+
+static inline unsigned int chan_to_field(unsigned int chan,
+                                         struct fb_bitfield *bf)
+{
+        chan &= 0xffff;
+        chan >>= 16 - bf->length;
+        return chan << bf->offset;
+}
+
+static int nuc900fb_setcolreg(unsigned regno,
+                               unsigned red, unsigned green, unsigned blue,
+                               unsigned transp, struct fb_info *info)
+{
+        unsigned int val;
+
+        switch (info->fix.visual) {
+        case FB_VISUAL_TRUECOLOR:
+                /* true-colour, use pseuo-palette */
+                if (regno < 16) {
+                        u32 *pal = info->pseudo_palette;
+
+                        val  = chan_to_field(red, &info->var.red);
+                        val |= chan_to_field(green, &info->var.green);
+                        val |= chan_to_field(blue, &info->var.blue);
+                        pal[regno] = val;
+                }
+                break;
+
+        default:
+                return 1;   /* unknown type */
+        }
+        return 0;
+}
+
+/**
+ *      nuc900fb_blank
+ *
+ */
+static int nuc900fb_blank(int blank_mode, struct fb_info *info)
+{
+
+        return 0;
+}
+
+static struct fb_ops nuc900fb_ops = {
+        .owner                  = THIS_MODULE,
+        .fb_check_var           = nuc900fb_check_var,
+        .fb_set_par             = nuc900fb_set_par,
+        .fb_blank               = nuc900fb_blank,
+        .fb_setcolreg           = nuc900fb_setcolreg,
+        .fb_fillrect            = cfb_fillrect,
+        .fb_copyarea            = cfb_copyarea,
+        .fb_imageblit           = cfb_imageblit,
+};
+
+
+static inline void modify_gpio(void __iomem *reg,
+                               unsigned long set, unsigned long mask)
+{
+        unsigned long tmp;
+        tmp = readl(reg) & ~mask;
+        writel(tmp | set, reg);
+}
+
+/*
+ * Initialise LCD-related registers
+ */
+static int nuc900fb_init_registers(struct fb_info *info)
+{
+        struct nuc900fb_info *fbi = info->par;
+        struct nuc900fb_mach_info *mach_info = fbi->dev->platform_data;
+        void __iomem *regs = fbi->io;
+
+        /*reset the display engine*/
+        writel(0, regs + REG_LCM_DCCS);
+        writel(readl(regs + REG_LCM_DCCS) | LCM_DCCS_ENG_RST,
+               regs + REG_LCM_DCCS);
+        ndelay(100);
+        writel(readl(regs + REG_LCM_DCCS) & (~LCM_DCCS_ENG_RST),
+               regs + REG_LCM_DCCS);
+        ndelay(100);
+
+        writel(0, regs + REG_LCM_DEV_CTRL);
+
+        /* config gpio output */
+        modify_gpio(W90X900_VA_GPIO + 0x54, mach_info->gpio_dir,
+                    mach_info->gpio_dir_mask);
+        modify_gpio(W90X900_VA_GPIO + 0x58, mach_info->gpio_data,
+                    mach_info->gpio_data_mask);
+
+        return 0;
+}
+
+
+/*
+ *    Alloc the SDRAM region of NUC900 for the frame buffer.
+ *    The buffer should be a non-cached, non-buffered, memory region
+ *    to allow palette and pixel writes without flushing the cache.
+ */
+static int __init nuc900fb_map_video_memory(struct fb_info *info)
+{
+        struct nuc900fb_info *fbi = info->par;
+        dma_addr_t map_dma;
+        unsigned long map_size = PAGE_ALIGN(info->fix.smem_len);
+
+        dev_dbg(fbi->dev, "nuc900fb_map_video_memory(fbi=%p) map_size %lu\n",
+                fbi, map_size);
+
+        info->screen_base = dma_alloc_writecombine(fbi->dev, map_size,
+                                                        &map_dma, GFP_KERNEL);
+
+        if (!info->screen_base)
+                return -ENOMEM;
+
+        memset(info->screen_base, 0x00, map_size);
+        info->fix.smem_start = map_dma;
+
+        return 0;
+}
+
+static inline void nuc900fb_unmap_video_memory(struct fb_info *info)
+{
+        struct nuc900fb_info *fbi = info->par;
+        dma_free_writecombine(fbi->dev, PAGE_ALIGN(info->fix.smem_len),
+                              info->screen_base, info->fix.smem_start);
+}
+
+static irqreturn_t nuc900fb_irqhandler(int irq, void *dev_id)
+{
+        struct nuc900fb_info *fbi = dev_id;
+        void __iomem *regs = fbi->io;
+        void __iomem *irq_base = fbi->irq_base;
+        unsigned long lcdirq = readl(regs + REG_LCM_INT_CS);
+
+        if (lcdirq & LCM_INT_CS_DISP_F_STATUS) {
+                writel(readl(irq_base) | 1<<30, irq_base);
+
+                /* wait VA_EN low */
+                if ((readl(regs + REG_LCM_DCCS) &
+                    LCM_DCCS_SINGLE) == LCM_DCCS_SINGLE)
+                        while ((readl(regs + REG_LCM_DCCS) &
+                               LCM_DCCS_VA_EN) == LCM_DCCS_VA_EN)
+                                ;
+                /* display_out-enable */
+                writel(readl(regs + REG_LCM_DCCS) | LCM_DCCS_DISP_OUT_EN,
+                        regs + REG_LCM_DCCS);
+                /* va-enable*/
+                writel(readl(regs + REG_LCM_DCCS) | LCM_DCCS_VA_EN,
+                        regs + REG_LCM_DCCS);
+        } else if (lcdirq & LCM_INT_CS_UNDERRUN_INT) {
+                writel(readl(irq_base) | LCM_INT_CS_UNDERRUN_INT, irq_base);
+        } else if (lcdirq & LCM_INT_CS_BUS_ERROR_INT) {
+                writel(readl(irq_base) | LCM_INT_CS_BUS_ERROR_INT, irq_base);
+        }
+
+        return IRQ_HANDLED;
+}
+
+#ifdef CONFIG_CPU_FREQ
+
+static int nuc900fb_cpufreq_transition(struct notifier_block *nb,
+                                       unsigned long val, void *data)
+{
+        struct nuc900fb_info *info;
+        struct fb_info *fbinfo;
+        long delta_f;
+        info = container_of(nb, struct nuc900fb_info, freq_transition);
+        fbinfo = platform_get_drvdata(to_platform_device(info->dev));
+
+        delta_f = info->clk_rate - clk_get_rate(info->clk);
+
+        if ((val == CPUFREQ_POSTCHANGE && delta_f > 0) ||
+           (val == CPUFREQ_PRECHANGE && delta_f < 0)) {
+                info->clk_rate = clk_get_rate(info->clk);
+                nuc900fb_activate_var(fbinfo);
+        }
+
+        return 0;
+}
+
+static inline int nuc900fb_cpufreq_register(struct nuc900fb_info *fbi)
+{
+        fbi->freq_transition.notifier_call = nuc900fb_cpufreq_transition;
+        return cpufreq_register_notifier(&fbi->freq_transition,
+                                  CPUFREQ_TRANSITION_NOTIFIER);
+}
+
+static inline void nuc900fb_cpufreq_deregister(struct nuc900fb_info *fbi)
+{
+        cpufreq_unregister_notifier(&fbi->freq_transition,
+                                    CPUFREQ_TRANSITION_NOTIFIER);
+}
+#else
+static inline int nuc900fb_cpufreq_transition(struct notifier_block *nb,
+                                       unsigned long val, void *data)
+{
+        return 0;
+}
+
+static inline int nuc900fb_cpufreq_register(struct nuc900fb_info *fbi)
+{
+        return 0;
+}
+
+static inline void nuc900fb_cpufreq_deregister(struct nuc900fb_info *info)
+{
+}
+#endif
+
+static char driver_name[] = "nuc900fb";
+
+static int __devinit nuc900fb_probe(struct platform_device *pdev)
+{
+        struct nuc900fb_info *fbi;
+        struct nuc900fb_display *display;
+        struct fb_info     *fbinfo;
+        struct nuc900fb_mach_info *mach_info;
+        struct resource *res;
+        int ret;
+        int irq;
+        int i;
+        int size;
+
+        dev_dbg(&pdev->dev, "devinit\n");
+        mach_info = pdev->dev.platform_data;
+        if (mach_info == NULL) {
+                dev_err(&pdev->dev,
+                        "no platform data for lcd, cannot attach\n");
+                return -EINVAL;
+        }
+
+        if (mach_info->default_display > mach_info->num_displays) {
+                dev_err(&pdev->dev,
+                        "default display No. is %d but only %d displays \n",
+                        mach_info->default_display, mach_info->num_displays);
+                return -EINVAL;
+        }
+
+
+        display = mach_info->displays + mach_info->default_display;
+
+        irq = platform_get_irq(pdev, 0);
+        if (irq < 0) {
+                dev_err(&pdev->dev, "no irq for device\n");
+                return -ENOENT;
+        }
+
+        fbinfo = framebuffer_alloc(sizeof(struct nuc900fb_info), &pdev->dev);
+        if (!fbinfo)
+                return -ENOMEM;
+
+        platform_set_drvdata(pdev, fbinfo);
+
+        fbi = fbinfo->par;
+        fbi->dev = &pdev->dev;
+
+#ifdef CONFIG_CPU_NUC950
+        fbi->drv_type = LCDDRV_NUC950;
+#endif
+
+        res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+
+        size = (res->end - res->start) + 1;
+        fbi->mem = request_mem_region(res->start, size, pdev->name);
+        if (fbi->mem == NULL) {
+                dev_err(&pdev->dev, "failed to alloc memory region\n");
+                ret = -ENOENT;
+                goto free_fb;
+        }
+
+        fbi->io = ioremap(res->start, size);
+        if (fbi->io == NULL) {
+                dev_err(&pdev->dev, "ioremap() of lcd registers failed\n");
+                ret = -ENXIO;
+                goto release_mem_region;
+        }
+
+        fbi->irq_base = fbi->io + REG_LCM_INT_CS;
+
+
+        /* Stop the LCD */
+        writel(0, fbi->io + REG_LCM_DCCS);
+
+        /* fill the fbinfo*/
+        strcpy(fbinfo->fix.id, driver_name);
+        fbinfo->fix.type                = FB_TYPE_PACKED_PIXELS;
+        fbinfo->fix.type_aux            = 0;
+        fbinfo->fix.xpanstep            = 0;
+        fbinfo->fix.ypanstep            = 0;
+        fbinfo->fix.ywrapstep           = 0;
+        fbinfo->fix.accel               = FB_ACCEL_NONE;
+        fbinfo->var.nonstd              = 0;
+        fbinfo->var.activate            = FB_ACTIVATE_NOW;
+        fbinfo->var.accel_flags         = 0;
+        fbinfo->var.vmode               = FB_VMODE_NONINTERLACED;
+        fbinfo->fbops                   = &nuc900fb_ops;
+        fbinfo->flags                   = FBINFO_FLAG_DEFAULT;
+        fbinfo->pseudo_palette          = &fbi->pseudo_pal;
+
+        ret = request_irq(irq, nuc900fb_irqhandler, IRQF_DISABLED,
+                          pdev->name, fbinfo);
+        if (ret) {
+                dev_err(&pdev->dev, "cannot register irq handler %d -err %d\n",
+                        irq, ret);
+                ret = -EBUSY;
+                goto release_regs;
+        }
+
+        nuc900_driver_clksrc_div(&pdev->dev, "ext", 0x2);
+
+        fbi->clk = clk_get(&pdev->dev, NULL);
+        if (!fbi->clk || IS_ERR(fbi->clk)) {
+                printk(KERN_ERR "nuc900-lcd:failed to get lcd clock source\n");
+                ret = -ENOENT;
+                goto release_irq;
+        }
+
+        clk_enable(fbi->clk);
+        dev_dbg(&pdev->dev, "got and enabled clock\n");
+
+        fbi->clk_rate = clk_get_rate(fbi->clk);
+
+        /* calutate the video buffer size */
+        for (i = 0; i < mach_info->num_displays; i++) {
+                unsigned long smem_len = mach_info->displays[i].xres;
+                smem_len *= mach_info->displays[i].yres;
+                smem_len *= mach_info->displays[i].bpp;
+                smem_len >>= 3;
+                if (fbinfo->fix.smem_len < smem_len)
+                        fbinfo->fix.smem_len = smem_len;
+        }
+
+        /* Initialize Video Memory */
+        ret = nuc900fb_map_video_memory(fbinfo);
+        if (ret) {
+                printk(KERN_ERR "Failed to allocate video RAM: %x\n", ret);
+                goto release_clock;
+        }
+
+        dev_dbg(&pdev->dev, "got video memory\n");
+
+        fbinfo->var.xres = display->xres;
+        fbinfo->var.yres = display->yres;
+        fbinfo->var.bits_per_pixel = display->bpp;
+
+        nuc900fb_init_registers(fbinfo);
+
+        nuc900fb_check_var(&fbinfo->var, fbinfo);
+
+        ret = nuc900fb_cpufreq_register(fbi);
+        if (ret < 0) {
+                dev_err(&pdev->dev, "Failed to register cpufreq\n");
+                goto free_video_memory;
+        }
+
+        ret = register_framebuffer(fbinfo);
+        if (ret) {
+                printk(KERN_ERR "failed to register framebuffer device: %d\n",
+                        ret);
+                goto free_cpufreq;
+        }
+
+        printk(KERN_INFO "fb%d: %s frame buffer device\n",
+                fbinfo->node, fbinfo->fix.id);
+
+        return 0;
+
+free_cpufreq:
+        nuc900fb_cpufreq_deregister(fbi);
+free_video_memory:
+        nuc900fb_unmap_video_memory(fbinfo);
+release_clock:
+        clk_disable(fbi->clk);
+        clk_put(fbi->clk);
+release_irq:
+        free_irq(irq, fbi);
+release_regs:
+        iounmap(fbi->io);
+release_mem_region:
+        release_mem_region((unsigned long)fbi->mem, size);
+free_fb:
+        framebuffer_release(fbinfo);
+        return ret;
+}
+
+/*
+ * shutdown the lcd controller
+ */
+static void nuc900fb_stop_lcd(struct fb_info *info)
+{
+        struct nuc900fb_info *fbi = info->par;
+        void __iomem *regs = fbi->io;
+
+        writel((~LCM_DCCS_DISP_INT_EN) | (~LCM_DCCS_VA_EN) | (~LCM_DCCS_OSD_EN),
+                regs + REG_LCM_DCCS);
+}
+
+/*
+ *  Cleanup
+ */
+static int nuc900fb_remove(struct platform_device *pdev)
+{
+        struct fb_info *fbinfo = platform_get_drvdata(pdev);
+        struct nuc900fb_info *fbi = fbinfo->par;
+        int irq;
+
+        nuc900fb_stop_lcd(fbinfo);
+        msleep(1);
+
+        nuc900fb_unmap_video_memory(fbinfo);
+
+        iounmap(fbi->io);
+
+        irq = platform_get_irq(pdev, 0);
+        free_irq(irq, fbi);
+
+        release_resource(fbi->mem);
+        kfree(fbi->mem);
+
+        platform_set_drvdata(pdev, NULL);
+        framebuffer_release(fbinfo);
+
+        return 0;
+}
+
+#ifdef CONFIG_PM
+
+/*
+ *      suspend and resume support for the lcd controller
+ */
+
+static int nuc900fb_suspend(struct platform_device *dev, pm_message_t state)
+{
+        struct fb_info     *fbinfo = platform_get_drvdata(dev);
+        struct nuc900fb_info *info = fbinfo->par;
+
+        nuc900fb_stop_lcd();
+        msleep(1);
+        clk_disable(info->clk);
+        return 0;
+}
+
+static int nuc900fb_resume(struct platform_device *dev)
+{
+        struct fb_info     *fbinfo = platform_get_drvdata(dev);
+        struct nuc900fb_info *fbi = fbinfo->par;
+
+        printk(KERN_INFO "nuc900fb resume\n");
+
+        clk_enable(fbi->clk);
+        msleep(1);
+
+        nuc900fb_init_registers(fbinfo);
+        nuc900fb_activate_var(bfinfo);
+
+        return 0;
+}
+
+#else
+#define nuc900fb_suspend NULL
+#define nuc900fb_resume  NULL
+#endif
+
+static struct platform_driver nuc900fb_driver = {
+        .probe          = nuc900fb_probe,
+        .remove         = nuc900fb_remove,
+        .suspend        = nuc900fb_suspend,
+        .resume         = nuc900fb_resume,
+        .driver         = {
+                .name   = "nuc900-lcd",
+                .owner  = THIS_MODULE,
+        },
+};
+
+int __devinit nuc900fb_init(void)
+{
+        return platform_driver_register(&nuc900fb_driver);
+}
+
+static void __exit nuc900fb_cleanup(void)
+{
+        platform_driver_unregister(&nuc900fb_driver);
+}
+
+module_init(nuc900fb_init);
+module_exit(nuc900fb_cleanup);
+
+MODULE_DESCRIPTION("Framebuffer driver for the NUC900");
+MODULE_LICENSE("GPL");
diff --git a/drivers/video/nuc900fb.h b/drivers/video/nuc900fb.h
new file mode 100644
index 000000000000..6c23aa3d3b89
--- /dev/null
+++ b/drivers/video/nuc900fb.h
@@ -0,0 +1,55 @@
+/*
+ *
+ * Copyright (c) 2009 Nuvoton technology corporation
+ * All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ *   Auther:
+ *        Wang Qiang(rurality.linux@gmail.com)  2009/12/16
+ */
+
+#ifndef __NUC900FB_H
+#define __NUC900FB_H
+
+#include <mach/map.h>
+#include <mach/fb.h>
+
+enum nuc900_lcddrv_type {
+        LCDDRV_NUC910,
+        LCDDRV_NUC930,
+        LCDDRV_NUC932,
+        LCDDRV_NUC950,
+        LCDDRV_NUC960,
+};
+
+
+#define PALETTE_BUFFER_SIZE     256
+#define PALETTE_BUFF_CLEAR      (0x80000000) /* entry is clear/invalid */
+
+struct nuc900fb_info {
+        struct device           *dev;
+        struct clk              *clk;
+
+        struct resource         *mem;
+        void __iomem            *io;
+        void __iomem            *irq_base;
+        int                     drv_type;
+        struct nuc900fb_hw      regs;
+        unsigned long           clk_rate;
+
+#ifdef CONFIG_CPU_FREQ
+        struct notifier_block   freq_transition;
+#endif
+
+        /* keep these registers in case we need to re-write palette */
+        u32                     palette_buffer[PALETTE_BUFFER_SIZE];
+        u32                     pseudo_pal[16];
+};
+
+int nuc900fb_init(void);
+
+#endif /* __NUC900FB_H */
diff --git a/drivers/video/omap/lcdc.c b/drivers/video/omap/lcdc.c
index a33483910dc8..9557f963662e 100644
--- a/drivers/video/omap/lcdc.c
+++ b/drivers/video/omap/lcdc.c
@@ -389,7 +389,7 @@ static int omap_lcdc_enable_plane(int plane, int enable)
 /*
  * Configure the LCD DMA for a palette load operation and do the palette
  * downloading synchronously. We don't use the frame+palette load mode of
- * the controller, since the palette can always be downloaded seperately.
+ * the controller, since the palette can always be downloaded separately.
  */
 static void load_palette(void)
 {
diff --git a/drivers/video/pm2fb.c b/drivers/video/pm2fb.c
index 36436ee6c1a4..27f93aab6ddc 100644
--- a/drivers/video/pm2fb.c
+++ b/drivers/video/pm2fb.c
@@ -896,7 +896,7 @@ static int pm2fb_setcolreg(unsigned regno, unsigned red, unsigned green,
          * Pseudocolor:
          *    uses offset = 0 && length = DAC register width.
          *    var->{color}.offset is 0
-         *    var->{color}.length contains widht of DAC
+         *    var->{color}.length contains width of DAC
          *    cmap is not used
          *    DAC[X] is programmed to (red, green, blue)
          * Truecolor:
diff --git a/drivers/video/s1d13xxxfb.c b/drivers/video/s1d13xxxfb.c
index 0deb0a8867b7..7b63429f1a7c 100644
--- a/drivers/video/s1d13xxxfb.c
+++ b/drivers/video/s1d13xxxfb.c
@@ -517,12 +517,12 @@ s1d13xxxfb_bitblt_copyarea(struct fb_info *info, const struct fb_copyarea *area)
                 src = (sy * stride) + (bpp * sx);
         }
 
-        /* set source adress */
+        /* set source address */
         s1d13xxxfb_writereg(info->par, S1DREG_BBLT_SRC_START0, (src & 0xff));
         s1d13xxxfb_writereg(info->par, S1DREG_BBLT_SRC_START1, (src >> 8) & 0x00ff);
         s1d13xxxfb_writereg(info->par, S1DREG_BBLT_SRC_START2, (src >> 16) & 0x00ff);
 
-        /* set destination adress */
+        /* set destination address */
         s1d13xxxfb_writereg(info->par, S1DREG_BBLT_DST_START0, (dst & 0xff));
         s1d13xxxfb_writereg(info->par, S1DREG_BBLT_DST_START1, (dst >> 8) & 0x00ff);
         s1d13xxxfb_writereg(info->par, S1DREG_BBLT_DST_START2, (dst >> 16) & 0x00ff);
diff --git a/drivers/video/sis/sis_main.c b/drivers/video/sis/sis_main.c
index 9d2b6bc49036..a531a0f7cdf2 100644
--- a/drivers/video/sis/sis_main.c
+++ b/drivers/video/sis/sis_main.c
@@ -1891,9 +1891,6 @@ static struct fb_ops sisfb_ops = {
         .fb_fillrect    = fbcon_sis_fillrect,
         .fb_copyarea    = fbcon_sis_copyarea,
         .fb_imageblit   = cfb_imageblit,
-#ifdef CONFIG_FB_SOFT_CURSOR
-        .fb_cursor      = soft_cursor,
-#endif
         .fb_sync        = fbcon_sis_sync,
 #ifdef SIS_NEW_CONFIG_COMPAT
         .fb_compat_ioctl= sisfb_ioctl,
diff --git a/drivers/video/sm501fb.c b/drivers/video/sm501fb.c
index 35370d0ecf03..b7dc1800efa9 100644
--- a/drivers/video/sm501fb.c
+++ b/drivers/video/sm501fb.c
@@ -411,7 +411,7 @@ static int sm501fb_set_par_common(struct fb_info *info,
         struct sm501fb_par  *par = info->par;
         struct sm501fb_info *fbi = par->info;
         unsigned long pixclock;      /* pixelclock in Hz */
-        unsigned long sm501pixclock; /* pixelclock the 501 can achive in Hz */
+        unsigned long sm501pixclock; /* pixelclock the 501 can achieve in Hz */
         unsigned int mem_type;
         unsigned int clock_type;
         unsigned int head_addr;
diff --git a/drivers/video/sstfb.c b/drivers/video/sstfb.c
index 609d0a521ca2..79840f11fecb 100644
--- a/drivers/video/sstfb.c
+++ b/drivers/video/sstfb.c
@@ -1102,7 +1102,7 @@ static void sst_set_vidmod_ics(struct fb_info *info, const int bpp)
  * detect dac type
  * prerequisite : write to FbiInitx enabled, video and fbi and pci fifo reset,
  * dram refresh disabled, FbiInit remaped.
- * TODO: mmh.. maybe i shoud put the "prerequisite" in the func ...
+ * TODO: mmh.. maybe i should put the "prerequisite" in the func ...
  */
 
 
diff --git a/drivers/video/via/Makefile b/drivers/video/via/Makefile
index e533b4b6aba4..eeed238ad6a2 100644
--- a/drivers/video/via/Makefile
+++ b/drivers/video/via/Makefile
@@ -4,4 +4,4 @@
 
 obj-$(CONFIG_FB_VIA) += viafb.o
 
-viafb-y :=viafbdev.o hw.o iface.o  via_i2c.o dvi.o lcd.o ioctl.o accel.o via_utility.o vt1636.o global.o tblDPASetting.o viamode.o tbl1636.o
+viafb-y :=viafbdev.o hw.o via_i2c.o dvi.o lcd.o ioctl.o accel.o via_utility.o vt1636.o global.o tblDPASetting.o viamode.o tbl1636.o
diff --git a/drivers/video/via/chip.h b/drivers/video/via/chip.h
index 474f428aea92..8c06bd3c0b4d 100644
--- a/drivers/video/via/chip.h
+++ b/drivers/video/via/chip.h
@@ -107,7 +107,6 @@
 struct tmds_chip_information {
         int tmds_chip_name;
         int tmds_chip_slave_addr;
-        int dvi_panel_id;
         int data_mode;
         int output_interface;
         int i2c_port;
@@ -142,14 +141,9 @@ struct tmds_setting_information {
         int iga_path;
         int h_active;
         int v_active;
-        int bpp;
-        int refresh_rate;
-        int get_dvi_size_method;
         int max_pixel_clock;
-        int dvi_panel_size;
-        int dvi_panel_hres;
-        int dvi_panel_vres;
-        int native_size;
+        int max_hres;
+        int max_vres;
 };
 
 struct lvds_setting_information {
@@ -160,7 +154,6 @@ struct lvds_setting_information {
         int refresh_rate;
         int get_lcd_size_method;
         int lcd_panel_id;
-        int lcd_panel_size;
         int lcd_panel_hres;
         int lcd_panel_vres;
         int display_method;
diff --git a/drivers/video/via/dvi.c b/drivers/video/via/dvi.c
index 67b36932212b..abe59b8c7a05 100644
--- a/drivers/video/via/dvi.c
+++ b/drivers/video/via/dvi.c
@@ -23,11 +23,10 @@
 static void tmds_register_write(int index, u8 data);
 static int tmds_register_read(int index);
 static int tmds_register_read_bytes(int index, u8 *buff, int buff_len);
-static int check_reduce_blanking_mode(int mode_index,
-        int refresh_rate);
-static int dvi_get_panel_size_from_DDCv1(void);
-static int dvi_get_panel_size_from_DDCv2(void);
-static unsigned char dvi_get_panel_info(void);
+static void dvi_get_panel_size_from_DDCv1(struct tmds_chip_information
+        *tmds_chip, struct tmds_setting_information *tmds_setting);
+static void dvi_get_panel_size_from_DDCv2(struct tmds_chip_information
+        *tmds_chip, struct tmds_setting_information *tmds_setting);
 static int viafb_dvi_query_EDID(void);
 
 static int check_tmds_chip(int device_id_subaddr, int device_id)
@@ -38,23 +37,24 @@ static int check_tmds_chip(int device_id_subaddr, int device_id)
                 return FAIL;
 }
 
-void viafb_init_dvi_size(void)
+void viafb_init_dvi_size(struct tmds_chip_information *tmds_chip,
+        struct tmds_setting_information *tmds_setting)
 {
         DEBUG_MSG(KERN_INFO "viafb_init_dvi_size()\n");
-        DEBUG_MSG(KERN_INFO
-                "viaparinfo->tmds_setting_info->get_dvi_size_method %d\n",
-                  viaparinfo->tmds_setting_info->get_dvi_size_method);
 
-        switch (viaparinfo->tmds_setting_info->get_dvi_size_method) {
-        case GET_DVI_SIZE_BY_SYSTEM_BIOS:
+        viafb_dvi_sense();
+        switch (viafb_dvi_query_EDID()) {
+        case 1:
+                dvi_get_panel_size_from_DDCv1(tmds_chip, tmds_setting);
                 break;
-        case GET_DVI_SZIE_BY_HW_STRAPPING:
+        case 2:
+                dvi_get_panel_size_from_DDCv2(tmds_chip, tmds_setting);
                 break;
-        case GET_DVI_SIZE_BY_VGA_BIOS:
         default:
-                dvi_get_panel_info();
+                printk(KERN_WARNING "viafb_init_dvi_size: DVI panel size undetected!\n");
                 break;
         }
+
         return;
 }
 
@@ -189,42 +189,14 @@ static int tmds_register_read_bytes(int index, u8 *buff, int buff_len)
         return 0;
 }
 
-static int check_reduce_blanking_mode(int mode_index,
-        int refresh_rate)
-{
-        if (refresh_rate != 60)
-                return false;
-
-        switch (mode_index) {
-                /* Following modes have reduce blanking mode. */
-        case VIA_RES_1360X768:
-        case VIA_RES_1400X1050:
-        case VIA_RES_1440X900:
-        case VIA_RES_1600X900:
-        case VIA_RES_1680X1050:
-        case VIA_RES_1920X1080:
-        case VIA_RES_1920X1200:
-                break;
-
-        default:
-                DEBUG_MSG(KERN_INFO
-                          "This dvi mode %d have no reduce blanking mode!\n",
-                          mode_index);
-                return false;
-        }
-
-        return true;
-}
-
 /* DVI Set Mode */
-void viafb_dvi_set_mode(int video_index, int mode_bpp, int set_iga)
+void viafb_dvi_set_mode(struct VideoModeTable *mode, int mode_bpp,
+        int set_iga)
 {
-        struct VideoModeTable *videoMode = NULL;
+        struct VideoModeTable *rb_mode;
         struct crt_mode_table *pDviTiming;
         unsigned long desirePixelClock, maxPixelClock;
-        int status = 0;
-        videoMode = viafb_get_modetbl_pointer(video_index);
-        pDviTiming = videoMode->crtc;
+        pDviTiming = mode->crtc;
         desirePixelClock = pDviTiming->clk / 1000000;
         maxPixelClock = (unsigned long)viaparinfo->
                 tmds_setting_info->max_pixel_clock;
@@ -232,20 +204,14 @@ void viafb_dvi_set_mode(int video_index, int mode_bpp, int set_iga)
         DEBUG_MSG(KERN_INFO "\nDVI_set_mode!!\n");
 
         if ((maxPixelClock != 0) && (desirePixelClock > maxPixelClock)) {
-                /*Check if reduce-blanking mode is exist */
-                status =
-                    check_reduce_blanking_mode(video_index,
-                                               pDviTiming->refresh_rate);
-                if (status) {
-                        video_index += 100;     /*Use reduce-blanking mode */
-                        videoMode = viafb_get_modetbl_pointer(video_index);
-                        pDviTiming = videoMode->crtc;
-                        DEBUG_MSG(KERN_INFO
-                                  "DVI use reduce blanking mode %d!!\n",
-                                  video_index);
+                rb_mode = viafb_get_rb_mode(mode->crtc[0].crtc.hor_addr,
+                        mode->crtc[0].crtc.ver_addr);
+                if (rb_mode) {
+                        mode = rb_mode;
+                        pDviTiming = rb_mode->crtc;
                 }
         }
-        viafb_fill_crtc_timing(pDviTiming, video_index, mode_bpp / 8, set_iga);
+        viafb_fill_crtc_timing(pDviTiming, mode, mode_bpp / 8, set_iga);
         viafb_set_output_path(DEVICE_DVI, set_iga,
                         viaparinfo->chip_info->tmds_chip_info.output_interface);
 }
@@ -350,25 +316,18 @@ static int viafb_dvi_query_EDID(void)
                 return false;
 }
 
-/*
- *
- * int dvi_get_panel_size_from_DDCv1(void)
- *
- *     - Get Panel Size Using EDID1 Table
- *
- * Return Type:    int
- *
- */
-static int dvi_get_panel_size_from_DDCv1(void)
+/* Get Panel Size Using EDID1 Table */
+static void dvi_get_panel_size_from_DDCv1(struct tmds_chip_information
+        *tmds_chip, struct tmds_setting_information *tmds_setting)
 {
-        int i, max_h = 0, max_v = 0, tmp, restore;
+        int i, max_h = 0, tmp, restore;
         unsigned char rData;
         unsigned char EDID_DATA[18];
 
         DEBUG_MSG(KERN_INFO "\n dvi_get_panel_size_from_DDCv1 \n");
 
-        restore = viaparinfo->chip_info->tmds_chip_info.tmds_chip_slave_addr;
-        viaparinfo->chip_info->tmds_chip_info.tmds_chip_slave_addr = 0xA0;
+        restore = tmds_chip->tmds_chip_slave_addr;
+        tmds_chip->tmds_chip_slave_addr = 0xA0;
 
         rData = tmds_register_read(0x23);
         if (rData & 0x3C)
@@ -414,8 +373,8 @@ static int dvi_get_panel_size_from_DDCv1(void)
                                 /* The first two byte must be zero. */
                                 if (EDID_DATA[3] == 0xFD) {
                                         /* To get max pixel clock. */
-                                        viaparinfo->tmds_setting_info->
-                                        max_pixel_clock = EDID_DATA[9] * 10;
+                                        tmds_setting->max_pixel_clock =
+                                                EDID_DATA[9] * 10;
                                 }
                         }
                         break;
@@ -425,154 +384,88 @@ static int dvi_get_panel_size_from_DDCv1(void)
                 }
         }
 
+        tmds_setting->max_hres = max_h;
         switch (max_h) {
         case 640:
-                viaparinfo->tmds_setting_info->dvi_panel_size =
-                        VIA_RES_640X480;
+                tmds_setting->max_vres = 480;
                 break;
         case 800:
-                viaparinfo->tmds_setting_info->dvi_panel_size =
-                        VIA_RES_800X600;
+                tmds_setting->max_vres = 600;
                 break;
         case 1024:
-                viaparinfo->tmds_setting_info->dvi_panel_size =
-                        VIA_RES_1024X768;
+                tmds_setting->max_vres = 768;
                 break;
         case 1280:
-                viaparinfo->tmds_setting_info->dvi_panel_size =
-                        VIA_RES_1280X1024;
+                tmds_setting->max_vres = 1024;
                 break;
         case 1400:
-                viaparinfo->tmds_setting_info->dvi_panel_size =
-                        VIA_RES_1400X1050;
+                tmds_setting->max_vres = 1050;
                 break;
         case 1440:
-                viaparinfo->tmds_setting_info->dvi_panel_size =
-                        VIA_RES_1440X1050;
+                tmds_setting->max_vres = 1050;
                 break;
         case 1600:
-                viaparinfo->tmds_setting_info->dvi_panel_size =
-                        VIA_RES_1600X1200;
+                tmds_setting->max_vres = 1200;
                 break;
         case 1920:
-                if (max_v == 1200) {
-                        viaparinfo->tmds_setting_info->dvi_panel_size =
-                                VIA_RES_1920X1200;
-                } else {
-                        viaparinfo->tmds_setting_info->dvi_panel_size =
-                                VIA_RES_1920X1080;
-                }
-
+                tmds_setting->max_vres = 1080;
                 break;
         default:
-                viaparinfo->tmds_setting_info->dvi_panel_size =
-                        VIA_RES_1024X768;
-                DEBUG_MSG(KERN_INFO "Unknown panel size max resolution = %d !\
-                                         set default panel size.\n", max_h);
+                DEBUG_MSG(KERN_INFO "Unknown panel size max resolution = %d ! "
+                                         "set default panel size.\n", max_h);
                 break;
         }
 
         DEBUG_MSG(KERN_INFO "DVI max pixelclock = %d\n",
-                  viaparinfo->tmds_setting_info->max_pixel_clock);
-        viaparinfo->chip_info->tmds_chip_info.tmds_chip_slave_addr = restore;
-        return viaparinfo->tmds_setting_info->dvi_panel_size;
+                tmds_setting->max_pixel_clock);
+        tmds_chip->tmds_chip_slave_addr = restore;
 }
 
-/*
- *
- * int dvi_get_panel_size_from_DDCv2(void)
- *
- *     - Get Panel Size Using EDID2 Table
- *
- * Return Type:    int
- *
- */
-static int dvi_get_panel_size_from_DDCv2(void)
+/* Get Panel Size Using EDID2 Table */
+static void dvi_get_panel_size_from_DDCv2(struct tmds_chip_information
+        *tmds_chip, struct tmds_setting_information *tmds_setting)
 {
-        int HSize = 0, restore;
+        int restore;
         unsigned char R_Buffer[2];
 
         DEBUG_MSG(KERN_INFO "\n dvi_get_panel_size_from_DDCv2 \n");
 
-        restore = viaparinfo->chip_info->tmds_chip_info.tmds_chip_slave_addr;
-        viaparinfo->chip_info->tmds_chip_info.tmds_chip_slave_addr = 0xA2;
+        restore = tmds_chip->tmds_chip_slave_addr;
+        tmds_chip->tmds_chip_slave_addr = 0xA2;
 
         /* Horizontal: 0x76, 0x77 */
         tmds_register_read_bytes(0x76, R_Buffer, 2);
-        HSize = R_Buffer[0];
-        HSize += R_Buffer[1] << 8;
+        tmds_setting->max_hres = R_Buffer[0] + (R_Buffer[1] << 8);
 
-        switch (HSize) {
+        switch (tmds_setting->max_hres) {
         case 640:
-                viaparinfo->tmds_setting_info->dvi_panel_size =
-                        VIA_RES_640X480;
+                tmds_setting->max_vres = 480;
                 break;
         case 800:
-                viaparinfo->tmds_setting_info->dvi_panel_size =
-                        VIA_RES_800X600;
+                tmds_setting->max_vres = 600;
                 break;
         case 1024:
-                viaparinfo->tmds_setting_info->dvi_panel_size =
-                        VIA_RES_1024X768;
+                tmds_setting->max_vres = 768;
                 break;
         case 1280:
-                viaparinfo->tmds_setting_info->dvi_panel_size =
-                        VIA_RES_1280X1024;
+                tmds_setting->max_vres = 1024;
                 break;
         case 1400:
-                viaparinfo->tmds_setting_info->dvi_panel_size =
-                        VIA_RES_1400X1050;
+                tmds_setting->max_vres = 1050;
                 break;
         case 1440:
-                viaparinfo->tmds_setting_info->dvi_panel_size =
-                        VIA_RES_1440X1050;
+                tmds_setting->max_vres = 1050;
                 break;
         case 1600:
-                viaparinfo->tmds_setting_info->dvi_panel_size =
-                        VIA_RES_1600X1200;
-                break;
-        default:
-                viaparinfo->tmds_setting_info->dvi_panel_size =
-                        VIA_RES_1024X768;
-                DEBUG_MSG(KERN_INFO "Unknown panel size max resolution = %d!\
-                                        set default panel size.\n", HSize);
-                break;
-        }
-
-        viaparinfo->chip_info->tmds_chip_info.tmds_chip_slave_addr = restore;
-        return viaparinfo->tmds_setting_info->dvi_panel_size;
-}
-
-/*
- *
- * unsigned char dvi_get_panel_info(void)
- *
- *     - Get Panel Size
- *
- * Return Type:    unsigned char
- */
-static unsigned char dvi_get_panel_info(void)
-{
-        unsigned char dvipanelsize;
-        DEBUG_MSG(KERN_INFO "dvi_get_panel_info! \n");
-
-        viafb_dvi_sense();
-        switch (viafb_dvi_query_EDID()) {
-        case 1:
-                dvi_get_panel_size_from_DDCv1();
-                break;
-        case 2:
-                dvi_get_panel_size_from_DDCv2();
+                tmds_setting->max_vres = 1200;
                 break;
         default:
+                DEBUG_MSG(KERN_INFO "Unknown panel size max resolution = %d! "
+                        "set default panel size.\n", tmds_setting->max_hres);
                 break;
         }
 
-        DEBUG_MSG(KERN_INFO "dvi panel size is %2d \n",
-                  viaparinfo->tmds_setting_info->dvi_panel_size);
-        dvipanelsize = (unsigned char)(viaparinfo->
-                tmds_setting_info->dvi_panel_size);
-        return dvipanelsize;
+        tmds_chip->tmds_chip_slave_addr = restore;
 }
 
 /* If Disable DVI, turn off pad */
diff --git a/drivers/video/via/dvi.h b/drivers/video/via/dvi.h
index e1ec37fb0dc3..0dffcfd395f3 100644
--- a/drivers/video/via/dvi.h
+++ b/drivers/video/via/dvi.h
@@ -53,12 +53,13 @@
 #define     DEV_CONNECT_DVI     0x01
 #define     DEV_CONNECT_HDMI    0x02
 
-struct VideoModeTable *viafb_get_cea_mode_tbl_pointer(int Index);
 int viafb_dvi_sense(void);
 void viafb_dvi_disable(void);
 void viafb_dvi_enable(void);
 int viafb_tmds_trasmitter_identify(void);
-void viafb_init_dvi_size(void);
-void viafb_dvi_set_mode(int video_index, int mode_bpp, int set_iga);
+void viafb_init_dvi_size(struct tmds_chip_information *tmds_chip,
+        struct tmds_setting_information *tmds_setting);
+void viafb_dvi_set_mode(struct VideoModeTable *videoMode, int mode_bpp,
+        int set_iga);
 
 #endif /* __DVI_H__ */
diff --git a/drivers/video/via/global.c b/drivers/video/via/global.c
index b675cdbb03ad..1ee511b73307 100644
--- a/drivers/video/via/global.c
+++ b/drivers/video/via/global.c
@@ -23,15 +23,12 @@ int viafb_platform_epia_dvi = STATE_OFF;
 int viafb_device_lcd_dualedge = STATE_OFF;
 int viafb_bus_width = 12;
 int viafb_display_hardware_layout = HW_LAYOUT_LCD_DVI;
-int viafb_memsize;
 int viafb_DeviceStatus = CRT_Device;
 int viafb_hotplug;
 int viafb_refresh = 60;
 int viafb_refresh1 = 60;
 int viafb_lcd_dsp_method = LCD_EXPANDSION;
 int viafb_lcd_mode = LCD_OPENLDI;
-int viafb_bpp = 32;
-int viafb_bpp1 = 32;
 int viafb_CRT_ON = 1;
 int viafb_DVI_ON;
 int viafb_LCD_ON ;
@@ -42,8 +39,6 @@ int viafb_hotplug_Xres = 640;
 int viafb_hotplug_Yres = 480;
 int viafb_hotplug_bpp = 32;
 int viafb_hotplug_refresh = 60;
-unsigned int viafb_second_offset;
-int viafb_second_size;
 int viafb_primary_dev = None_Device;
 unsigned int viafb_second_xres = 640;
 unsigned int viafb_second_yres = 480;
diff --git a/drivers/video/via/global.h b/drivers/video/via/global.h
index d69d0ca99c2f..8d95d5fd1388 100644
--- a/drivers/video/via/global.h
+++ b/drivers/video/via/global.h
@@ -35,7 +35,6 @@
 
 #include "debug.h"
 
-#include "iface.h"
 #include "viafbdev.h"
 #include "chip.h"
 #include "accel.h"
@@ -68,8 +67,6 @@ extern int viafb_refresh;
 extern int viafb_refresh1;
 extern int viafb_lcd_dsp_method;
 extern int viafb_lcd_mode;
-extern int viafb_bpp;
-extern int viafb_bpp1;
 
 extern int viafb_CRT_ON;
 extern int viafb_hotplug_Xres;
diff --git a/drivers/video/via/hw.c b/drivers/video/via/hw.c
index 3e083ff67ae2..f2583b1b527f 100644
--- a/drivers/video/via/hw.c
+++ b/drivers/video/via/hw.c
@@ -524,7 +524,6 @@ static void dvi_patch_skew_dvp1(void);
 static void dvi_patch_skew_dvp_low(void);
 static void set_dvi_output_path(int set_iga, int output_interface);
 static void set_lcd_output_path(int set_iga, int output_interface);
-static int search_mode_setting(int ModeInfoIndex);
 static void load_fix_bit_crtc_reg(void);
 static void init_gfx_chip_info(struct pci_dev *pdev,
                                 const struct pci_device_id *pdi);
@@ -686,6 +685,84 @@ void viafb_set_secondary_pitch(u32 pitch)
         viafb_write_reg_mask(0x71, VIACR, (pitch >> (10 - 7)) & 0x80, 0x80);
 }
 
+void viafb_set_primary_color_depth(u8 depth)
+{
+        u8 value;
+
+        DEBUG_MSG(KERN_DEBUG "viafb_set_primary_color_depth(%d)\n", depth);
+        switch (depth) {
+        case 8:
+                value = 0x00;
+                break;
+        case 15:
+                value = 0x04;
+                break;
+        case 16:
+                value = 0x14;
+                break;
+        case 24:
+                value = 0x0C;
+                break;
+        case 30:
+                value = 0x08;
+                break;
+        default:
+                printk(KERN_WARNING "viafb_set_primary_color_depth: "
+                        "Unsupported depth: %d\n", depth);
+                return;
+        }
+
+        viafb_write_reg_mask(0x15, VIASR, value, 0x1C);
+}
+
+void viafb_set_secondary_color_depth(u8 depth)
+{
+        u8 value;
+
+        DEBUG_MSG(KERN_DEBUG "viafb_set_secondary_color_depth(%d)\n", depth);
+        switch (depth) {
+        case 8:
+                value = 0x00;
+                break;
+        case 16:
+                value = 0x40;
+                break;
+        case 24:
+                value = 0xC0;
+                break;
+        case 30:
+                value = 0x80;
+                break;
+        default:
+                printk(KERN_WARNING "viafb_set_secondary_color_depth: "
+                        "Unsupported depth: %d\n", depth);
+                return;
+        }
+
+        viafb_write_reg_mask(0x67, VIACR, value, 0xC0);
+}
+
+static void set_color_register(u8 index, u8 red, u8 green, u8 blue)
+{
+        outb(0xFF, 0x3C6); /* bit mask of palette */
+        outb(index, 0x3C8);
+        outb(red, 0x3C9);
+        outb(green, 0x3C9);
+        outb(blue, 0x3C9);
+}
+
+void viafb_set_primary_color_register(u8 index, u8 red, u8 green, u8 blue)
+{
+        viafb_write_reg_mask(0x1A, VIASR, 0x00, 0x01);
+        set_color_register(index, red, green, blue);
+}
+
+void viafb_set_secondary_color_register(u8 index, u8 red, u8 green, u8 blue)
+{
+        viafb_write_reg_mask(0x1A, VIASR, 0x01, 0x01);
+        set_color_register(index, red, green, blue);
+}
+
 void viafb_set_output_path(int device, int set_iga, int output_interface)
 {
         switch (device) {
@@ -710,11 +787,8 @@ static void set_crt_output_path(int set_iga)
                 viafb_write_reg_mask(SR16, VIASR, 0x00, BIT6);
                 break;
         case IGA2:
-        case IGA1_IGA2:
                 viafb_write_reg_mask(CR6A, VIACR, 0xC0, BIT6 + BIT7);
                 viafb_write_reg_mask(SR16, VIASR, 0x40, BIT6);
-                if (set_iga == IGA1_IGA2)
-                        viafb_write_reg_mask(CR6B, VIACR, 0x08, BIT3);
                 break;
         }
 }
@@ -904,13 +978,6 @@ static void set_lcd_output_path(int set_iga, int output_interface)
 
                 enable_second_display_channel();
                 break;
-
-        case IGA1_IGA2:
-                viafb_write_reg_mask(CR6B, VIACR, 0x08, BIT3);
-                viafb_write_reg_mask(CR6A, VIACR, 0x08, BIT3);
-
-                disable_second_display_channel();
-                break;
         }
 
         switch (output_interface) {
@@ -987,49 +1054,6 @@ static void set_lcd_output_path(int set_iga, int output_interface)
         }
 }
 
-/* Search Mode Index */
-static int search_mode_setting(int ModeInfoIndex)
-{
-        int i = 0;
-
-        while ((i < NUM_TOTAL_MODETABLE) &&
-                        (ModeInfoIndex != CLE266Modes[i].ModeIndex))
-                i++;
-        if (i >= NUM_TOTAL_MODETABLE)
-                i = 0;
-        return i;
-
-}
-
-struct VideoModeTable *viafb_get_modetbl_pointer(int Index)
-{
-        struct VideoModeTable *TmpTbl = NULL;
-        TmpTbl = &CLE266Modes[search_mode_setting(Index)];
-        return TmpTbl;
-}
-
-struct VideoModeTable *viafb_get_cea_mode_tbl_pointer(int Index)
-{
-        struct VideoModeTable *TmpTbl = NULL;
-        int i = 0;
-        while ((i < NUM_TOTAL_CEA_MODES) &&
-                        (Index != CEA_HDMI_Modes[i].ModeIndex))
-                i++;
-        if ((i < NUM_TOTAL_CEA_MODES))
-                TmpTbl = &CEA_HDMI_Modes[i];
-         else {
-                /*Still use general timing if don't find CEA timing */
-                i = 0;
-                while ((i < NUM_TOTAL_MODETABLE) &&
-                                (Index != CLE266Modes[i].ModeIndex))
-                       i++;
-                if (i >= NUM_TOTAL_MODETABLE)
-                        i = 0;
-                TmpTbl = &CLE266Modes[i];
-        }
-        return TmpTbl;
-}
-
 static void load_fix_bit_crtc_reg(void)
 {
         /* always set to 1 */
@@ -1121,15 +1145,13 @@ void viafb_load_fetch_count_reg(int h_addr, int bpp_byte, int set_iga)
         struct io_register *reg = NULL;
 
         switch (set_iga) {
-        case IGA1_IGA2:
         case IGA1:
                 reg_value = IGA1_FETCH_COUNT_FORMULA(h_addr, bpp_byte);
                 viafb_load_reg_num = fetch_count_reg.
                         iga1_fetch_count_reg.reg_num;
                 reg = fetch_count_reg.iga1_fetch_count_reg.reg;
                 viafb_load_reg(reg_value, viafb_load_reg_num, reg, VIASR);
-                if (set_iga == IGA1)
-                        break;
+                break;
         case IGA2:
                 reg_value = IGA2_FETCH_COUNT_FORMULA(h_addr, bpp_byte);
                 viafb_load_reg_num = fetch_count_reg.
@@ -1499,7 +1521,7 @@ void viafb_set_vclock(u32 CLK, int set_iga)
         /* H.W. Reset : ON */
         viafb_write_reg_mask(CR17, VIACR, 0x00, BIT7);
 
-        if ((set_iga == IGA1) || (set_iga == IGA1_IGA2)) {
+        if (set_iga == IGA1) {
                 /* Change D,N FOR VCLK */
                 switch (viaparinfo->chip_info->gfx_chip_name) {
                 case UNICHROME_CLE266:
@@ -1528,7 +1550,7 @@ void viafb_set_vclock(u32 CLK, int set_iga)
                 }
         }
 
-        if ((set_iga == IGA2) || (set_iga == IGA1_IGA2)) {
+        if (set_iga == IGA2) {
                 /* Change D,N FOR LCK */
                 switch (viaparinfo->chip_info->gfx_chip_name) {
                 case UNICHROME_CLE266:
@@ -1557,12 +1579,12 @@ void viafb_set_vclock(u32 CLK, int set_iga)
         viafb_write_reg_mask(CR17, VIACR, 0x80, BIT7);
 
         /* Reset PLL */
-        if ((set_iga == IGA1) || (set_iga == IGA1_IGA2)) {
+        if (set_iga == IGA1) {
                 viafb_write_reg_mask(SR40, VIASR, 0x02, BIT1);
                 viafb_write_reg_mask(SR40, VIASR, 0x00, BIT1);
         }
 
-        if ((set_iga == IGA2) || (set_iga == IGA1_IGA2)) {
+        if (set_iga == IGA2) {
                 viafb_write_reg_mask(SR40, VIASR, 0x01, BIT0);
                 viafb_write_reg_mask(SR40, VIASR, 0x00, BIT0);
         }
@@ -1805,47 +1827,15 @@ void viafb_load_crtc_timing(struct display_timing device_timing,
         viafb_lock_crt();
 }
 
-void viafb_set_color_depth(int bpp_byte, int set_iga)
-{
-        if (set_iga == IGA1) {
-                switch (bpp_byte) {
-                case MODE_8BPP:
-                        viafb_write_reg_mask(SR15, VIASR, 0x22, 0x7E);
-                        break;
-                case MODE_16BPP:
-                        viafb_write_reg_mask(SR15, VIASR, 0xB6, 0xFE);
-                        break;
-                case MODE_32BPP:
-                        viafb_write_reg_mask(SR15, VIASR, 0xAE, 0xFE);
-                        break;
-                }
-        } else {
-                switch (bpp_byte) {
-                case MODE_8BPP:
-                        viafb_write_reg_mask(CR67, VIACR, 0x00, BIT6 + BIT7);
-                        break;
-                case MODE_16BPP:
-                        viafb_write_reg_mask(CR67, VIACR, 0x40, BIT6 + BIT7);
-                        break;
-                case MODE_32BPP:
-                        viafb_write_reg_mask(CR67, VIACR, 0xC0, BIT6 + BIT7);
-                        break;
-                }
-        }
-}
-
 void viafb_fill_crtc_timing(struct crt_mode_table *crt_table,
-        int mode_index, int bpp_byte, int set_iga)
+        struct VideoModeTable *video_mode, int bpp_byte, int set_iga)
 {
-        struct VideoModeTable *video_mode;
         struct display_timing crt_reg;
         int i;
         int index = 0;
         int h_addr, v_addr;
         u32 pll_D_N;
 
-        video_mode = &CLE266Modes[search_mode_setting(mode_index)];
-
         for (i = 0; i < video_mode->mode_array; i++) {
                 index = i;
 
@@ -1858,8 +1848,10 @@ void viafb_fill_crtc_timing(struct crt_mode_table *crt_table,
 
         /* Mode 640x480 has border, but LCD/DFP didn't have border. */
         /* So we would delete border. */
-        if ((viafb_LCD_ON | viafb_DVI_ON) && (mode_index == VIA_RES_640X480)
-            && (viaparinfo->crt_setting_info->refresh_rate == 60)) {
+        if ((viafb_LCD_ON | viafb_DVI_ON)
+            && video_mode->crtc[0].crtc.hor_addr == 640
+            && video_mode->crtc[0].crtc.ver_addr == 480
+            && viaparinfo->crt_setting_info->refresh_rate == 60) {
                 /* The border is 8 pixels. */
                 crt_reg.hor_blank_start = crt_reg.hor_blank_start - 8;
 
@@ -1912,9 +1904,6 @@ void viafb_fill_crtc_timing(struct crt_mode_table *crt_table,
             && (viaparinfo->chip_info->gfx_chip_name != UNICHROME_K400))
                 viafb_load_FIFO_reg(set_iga, h_addr, v_addr);
 
-        /* load SR Register About Memory and Color part */
-        viafb_set_color_depth(bpp_byte, set_iga);
-
         pll_D_N = viafb_get_clk_value(crt_table[index].clk);
         DEBUG_MSG(KERN_INFO "PLL=%x", pll_D_N);
         viafb_set_vclock(pll_D_N, set_iga);
@@ -1956,9 +1945,6 @@ void viafb_update_device_setting(int hres, int vres,
 
                 viaparinfo->tmds_setting_info->h_active = hres;
                 viaparinfo->tmds_setting_info->v_active = vres;
-                viaparinfo->tmds_setting_info->bpp = bpp;
-                viaparinfo->tmds_setting_info->refresh_rate =
-                        vmode_refresh;
 
                 viaparinfo->lvds_setting_info->h_active = hres;
                 viaparinfo->lvds_setting_info->v_active = vres;
@@ -1975,9 +1961,6 @@ void viafb_update_device_setting(int hres, int vres,
                 if (viaparinfo->tmds_setting_info->iga_path == IGA2) {
                         viaparinfo->tmds_setting_info->h_active = hres;
                         viaparinfo->tmds_setting_info->v_active = vres;
-                        viaparinfo->tmds_setting_info->bpp = bpp;
-                        viaparinfo->tmds_setting_info->refresh_rate =
-                                vmode_refresh;
                 }
 
                 if (viaparinfo->lvds_setting_info->iga_path == IGA2) {
@@ -2076,9 +2059,8 @@ static void init_tmds_chip_info(void)
 
         DEBUG_MSG(KERN_INFO "TMDS Chip = %d\n",
                   viaparinfo->chip_info->tmds_chip_info.tmds_chip_name);
-        viaparinfo->tmds_setting_info->get_dvi_size_method =
-                GET_DVI_SIZE_BY_VGA_BIOS;
-        viafb_init_dvi_size();
+        viafb_init_dvi_size(&viaparinfo->shared->chip_info.tmds_chip_info,
+                &viaparinfo->shared->tmds_setting_info);
 }
 
 static void init_lvds_chip_info(void)
@@ -2195,28 +2177,19 @@ static void set_display_channel(void)
         }
 }
 
-int viafb_setmode(int vmode_index, int hor_res, int ver_res, int video_bpp,
-        int vmode_index1, int hor_res1, int ver_res1, int video_bpp1)
+int viafb_setmode(struct VideoModeTable *vmode_tbl, int video_bpp,
+        struct VideoModeTable *vmode_tbl1, int video_bpp1)
 {
         int i, j;
         int port;
         u8 value, index, mask;
-        struct VideoModeTable *vmode_tbl;
         struct crt_mode_table *crt_timing;
-        struct VideoModeTable *vmode_tbl1 = NULL;
         struct crt_mode_table *crt_timing1 = NULL;
 
-        DEBUG_MSG(KERN_INFO "Set Mode!!\n");
-        DEBUG_MSG(KERN_INFO
-                  "vmode_index=%d hor_res=%d ver_res=%d video_bpp=%d\n",
-                  vmode_index, hor_res, ver_res, video_bpp);
-
         device_screen_off();
-        vmode_tbl = &CLE266Modes[search_mode_setting(vmode_index)];
         crt_timing = vmode_tbl->crtc;
 
         if (viafb_SAMM_ON == 1) {
-                vmode_tbl1 = &CLE266Modes[search_mode_setting(vmode_index1)];
                 crt_timing1 = vmode_tbl1->crtc;
         }
 
@@ -2267,12 +2240,11 @@ int viafb_setmode(int vmode_index, int hor_res, int ver_res, int video_bpp,
                 outb(VPIT.SR[i - 1], VIASR + 1);
         }
 
-        viafb_set_primary_address(0);
-        viafb_set_secondary_address(viafb_SAMM_ON ? viafb_second_offset : 0);
+        viafb_write_reg_mask(0x15, VIASR, 0xA2, 0xA2);
         viafb_set_iga_path();
 
         /* Write CRTC */
-        viafb_fill_crtc_timing(crt_timing, vmode_index, video_bpp / 8, IGA1);
+        viafb_fill_crtc_timing(crt_timing, vmode_tbl, video_bpp / 8, IGA1);
 
         /* Write Graphic Controller */
         for (i = 0; i < StdGR; i++) {
@@ -2292,65 +2264,25 @@ int viafb_setmode(int vmode_index, int hor_res, int ver_res, int video_bpp,
 
         /* Update Patch Register */
 
-        if ((viaparinfo->chip_info->gfx_chip_name == UNICHROME_CLE266)
-            || (viaparinfo->chip_info->gfx_chip_name == UNICHROME_K400)) {
-                for (i = 0; i < NUM_TOTAL_PATCH_MODE; i++) {
-                        if (res_patch_table[i].mode_index == vmode_index) {
-                                for (j = 0;
-                                     j < res_patch_table[i].table_length; j++) {
-                                        index =
-                                            res_patch_table[i].
-                                            io_reg_table[j].index;
-                                        port =
-                                            res_patch_table[i].
-                                            io_reg_table[j].port;
-                                        value =
-                                            res_patch_table[i].
-                                            io_reg_table[j].value;
-                                        mask =
-                                            res_patch_table[i].
-                                            io_reg_table[j].mask;
-                                        viafb_write_reg_mask(index, port, value,
-                                                       mask);
-                                }
-                        }
-                }
-        }
-
-        if (viafb_SAMM_ON == 1) {
-                if ((viaparinfo->chip_info->gfx_chip_name == UNICHROME_CLE266)
-                    || (viaparinfo->chip_info->gfx_chip_name ==
-                    UNICHROME_K400)) {
-                        for (i = 0; i < NUM_TOTAL_PATCH_MODE; i++) {
-                                if (res_patch_table[i].mode_index ==
-                                    vmode_index1) {
-                                        for (j = 0;
-                                             j <
-                                             res_patch_table[i].
-                                             table_length; j++) {
-                                                index =
-                                                    res_patch_table[i].
-                                                    io_reg_table[j].index;
-                                                port =
-                                                    res_patch_table[i].
-                                                    io_reg_table[j].port;
-                                                value =
-                                                    res_patch_table[i].
-                                                    io_reg_table[j].value;
-                                                mask =
-                                                    res_patch_table[i].
-                                                    io_reg_table[j].mask;
-                                                viafb_write_reg_mask(index,
-                                                        port, value, mask);
-                                        }
-                                }
-                        }
+        if ((viaparinfo->chip_info->gfx_chip_name == UNICHROME_CLE266
+            || viaparinfo->chip_info->gfx_chip_name == UNICHROME_K400)
+            && vmode_tbl->crtc[0].crtc.hor_addr == 1024
+            && vmode_tbl->crtc[0].crtc.ver_addr == 768) {
+                for (j = 0; j < res_patch_table[0].table_length; j++) {
+                        index = res_patch_table[0].io_reg_table[j].index;
+                        port = res_patch_table[0].io_reg_table[j].port;
+                        value = res_patch_table[0].io_reg_table[j].value;
+                        mask = res_patch_table[0].io_reg_table[j].mask;
+                        viafb_write_reg_mask(index, port, value, mask);
                 }
         }
 
         viafb_set_primary_pitch(viafbinfo->fix.line_length);
         viafb_set_secondary_pitch(viafb_dual_fb ? viafbinfo1->fix.line_length
                 : viafbinfo->fix.line_length);
+        viafb_set_primary_color_depth(viaparinfo->depth);
+        viafb_set_secondary_color_depth(viafb_dual_fb ? viaparinfo1->depth
+                : viaparinfo->depth);
         /* Update Refresh Rate Setting */
 
         /* Clear On Screen */
@@ -2359,11 +2291,11 @@ int viafb_setmode(int vmode_index, int hor_res, int ver_res, int video_bpp,
         if (viafb_CRT_ON) {
                 if (viafb_SAMM_ON && (viaparinfo->crt_setting_info->iga_path ==
                         IGA2)) {
-                        viafb_fill_crtc_timing(crt_timing1, vmode_index1,
+                        viafb_fill_crtc_timing(crt_timing1, vmode_tbl1,
                                 video_bpp1 / 8,
                                 viaparinfo->crt_setting_info->iga_path);
                 } else {
-                        viafb_fill_crtc_timing(crt_timing, vmode_index,
+                        viafb_fill_crtc_timing(crt_timing, vmode_tbl,
                                 video_bpp / 8,
                                 viaparinfo->crt_setting_info->iga_path);
                 }
@@ -2373,7 +2305,7 @@ int viafb_setmode(int vmode_index, int hor_res, int ver_res, int video_bpp,
                 /* Patch if set_hres is not 8 alignment (1366) to viafb_setmode
                 to 8 alignment (1368),there is several pixels (2 pixels)
                 on right side of screen. */
-                if (hor_res % 8) {
+                if (vmode_tbl->crtc[0].crtc.hor_addr % 8) {
                         viafb_unlock_crt();
                         viafb_write_reg(CR02, VIACR,
                                 viafb_read_reg(VIACR, CR02) - 1);
@@ -2384,14 +2316,14 @@ int viafb_setmode(int vmode_index, int hor_res, int ver_res, int video_bpp,
         if (viafb_DVI_ON) {
                 if (viafb_SAMM_ON &&
                         (viaparinfo->tmds_setting_info->iga_path == IGA2)) {
-                        viafb_dvi_set_mode(viafb_get_mode_index
+                        viafb_dvi_set_mode(viafb_get_mode
                                      (viaparinfo->tmds_setting_info->h_active,
                                       viaparinfo->tmds_setting_info->
                                       v_active),
                                      video_bpp1, viaparinfo->
                                      tmds_setting_info->iga_path);
                 } else {
-                        viafb_dvi_set_mode(viafb_get_mode_index
+                        viafb_dvi_set_mode(viafb_get_mode
                                      (viaparinfo->tmds_setting_info->h_active,
                                       viaparinfo->
                                       tmds_setting_info->v_active),
@@ -2445,8 +2377,8 @@ int viafb_setmode(int vmode_index, int hor_res, int ver_res, int video_bpp,
 
         /* If set mode normally, save resolution information for hot-plug . */
         if (!viafb_hotplug) {
-                viafb_hotplug_Xres = hor_res;
-                viafb_hotplug_Yres = ver_res;
+                viafb_hotplug_Xres = vmode_tbl->crtc[0].crtc.hor_addr;
+                viafb_hotplug_Yres = vmode_tbl->crtc[0].crtc.ver_addr;
                 viafb_hotplug_bpp = video_bpp;
                 viafb_hotplug_refresh = viafb_refresh;
 
@@ -2706,13 +2638,11 @@ void viafb_set_dpa_gfx(int output_interface, struct GFX_DPA_SETTING\
 
 /*According var's xres, yres fill var's other timing information*/
 void viafb_fill_var_timing_info(struct fb_var_screeninfo *var, int refresh,
-                          int mode_index)
+        struct VideoModeTable *vmode_tbl)
 {
-        struct VideoModeTable *vmode_tbl = NULL;
         struct crt_mode_table *crt_timing = NULL;
         struct display_timing crt_reg;
         int i = 0, index = 0;
-        vmode_tbl = &CLE266Modes[search_mode_setting(mode_index)];
         crt_timing = vmode_tbl->crtc;
         for (i = 0; i < vmode_tbl->mode_array; i++) {
                 index = i;
@@ -2721,36 +2651,6 @@ void viafb_fill_var_timing_info(struct fb_var_screeninfo *var, int refresh,
         }
 
         crt_reg = crt_timing[index].crtc;
-        switch (var->bits_per_pixel) {
-        case 8:
-                var->red.offset = 0;
-                var->green.offset = 0;
-                var->blue.offset = 0;
-                var->red.length = 6;
-                var->green.length = 6;
-                var->blue.length = 6;
-                break;
-        case 16:
-                var->red.offset = 11;
-                var->green.offset = 5;
-                var->blue.offset = 0;
-                var->red.length = 5;
-                var->green.length = 6;
-                var->blue.length = 5;
-                break;
-        case 32:
-                var->red.offset = 16;
-                var->green.offset = 8;
-                var->blue.offset = 0;
-                var->red.length = 8;
-                var->green.length = 8;
-                var->blue.length = 8;
-                break;
-        default:
-                /* never happed, put here to keep consistent */
-                break;
-        }
-
         var->pixclock = viafb_get_pixclock(var->xres, var->yres, refresh);
         var->left_margin =
             crt_reg.hor_total - (crt_reg.hor_sync_start + crt_reg.hor_sync_end);
diff --git a/drivers/video/via/hw.h b/drivers/video/via/hw.h
index b874d952b446..12ef32d334cb 100644
--- a/drivers/video/via/hw.h
+++ b/drivers/video/via/hw.h
@@ -22,6 +22,7 @@
 #ifndef __HW_H__
 #define __HW_H__
 
+#include "viamode.h"
 #include "global.h"
 
 /***************************************************
@@ -862,8 +863,6 @@ struct pci_device_id_info {
 };
 
 extern unsigned int viafb_second_virtual_xres;
-extern unsigned int viafb_second_offset;
-extern int viafb_second_size;
 extern int viafb_SAMM_ON;
 extern int viafb_dual_fb;
 extern int viafb_LCD2_ON;
@@ -874,8 +873,9 @@ extern int viafb_hotplug;
 void viafb_write_reg_mask(u8 index, int io_port, u8 data, u8 mask);
 void viafb_set_output_path(int device, int set_iga,
         int output_interface);
+
 void viafb_fill_crtc_timing(struct crt_mode_table *crt_table,
-                      int mode_index, int bpp_byte, int set_iga);
+        struct VideoModeTable *video_mode, int bpp_byte, int set_iga);
 
 void viafb_set_vclock(u32 CLK, int set_iga);
 void viafb_load_reg(int timing_value, int viafb_load_reg_num,
@@ -891,16 +891,15 @@ void viafb_lock_crt(void);
 void viafb_unlock_crt(void);
 void viafb_load_fetch_count_reg(int h_addr, int bpp_byte, int set_iga);
 void viafb_write_regx(struct io_reg RegTable[], int ItemNum);
-struct VideoModeTable *viafb_get_modetbl_pointer(int Index);
 u32 viafb_get_clk_value(int clk);
 void viafb_load_FIFO_reg(int set_iga, int hor_active, int ver_active);
-void viafb_set_color_depth(int bpp_byte, int set_iga);
 void viafb_set_dpa_gfx(int output_interface, struct GFX_DPA_SETTING\
                                         *p_gfx_dpa_setting);
 
-int viafb_setmode(int vmode_index, int hor_res, int ver_res,
-            int video_bpp, int vmode_index1, int hor_res1,
-            int ver_res1, int video_bpp1);
+int viafb_setmode(struct VideoModeTable *vmode_tbl, int video_bpp,
+        struct VideoModeTable *vmode_tbl1, int video_bpp1);
+void viafb_fill_var_timing_info(struct fb_var_screeninfo *var, int refresh,
+        struct VideoModeTable *vmode_tbl);
 void viafb_init_chip_info(struct pci_dev *pdev,
                           const struct pci_device_id *pdi);
 void viafb_init_dac(int set_iga);
@@ -915,6 +914,8 @@ void viafb_set_primary_address(u32 addr);
 void viafb_set_secondary_address(u32 addr);
 void viafb_set_primary_pitch(u32 pitch);
 void viafb_set_secondary_pitch(u32 pitch);
+void viafb_set_primary_color_register(u8 index, u8 red, u8 green, u8 blue);
+void viafb_set_secondary_color_register(u8 index, u8 red, u8 green, u8 blue);
 void viafb_get_fb_info(unsigned int *fb_base, unsigned int *fb_len);
 
 #endif /* __HW_H__ */
diff --git a/drivers/video/via/iface.c b/drivers/video/via/iface.c
deleted file mode 100644
index 1570636c8d51..000000000000
--- a/drivers/video/via/iface.c
+++ /dev/null
@@ -1,78 +0,0 @@
-/*
- * Copyright 1998-2008 VIA Technologies, Inc. All Rights Reserved.
- * Copyright 2001-2008 S3 Graphics, Inc. All Rights Reserved.
-
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public
- * License as published by the Free Software Foundation;
- * either version 2, or (at your option) any later version.
-
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTIES OR REPRESENTATIONS; without even
- * the implied warranty of MERCHANTABILITY or FITNESS FOR
- * A PARTICULAR PURPOSE.See the GNU General Public License
- * for more details.
-
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc.,
- * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
- */
-
-#include "global.h"
-
-/* Get frame buffer size from VGA BIOS */
-
-unsigned int viafb_get_memsize(void)
-{
-        unsigned int m;
-
-        /* If memory size provided by user */
-        if (viafb_memsize)
-                m = viafb_memsize * Mb;
-        else {
-                m = (unsigned int)viafb_read_reg(VIASR, SR39);
-                m = m * (4 * Mb);
-
-                if ((m < (16 * Mb)) || (m > (64 * Mb)))
-                        m = 16 * Mb;
-        }
-        DEBUG_MSG(KERN_INFO "framebuffer size = %d Mb\n", m / Mb);
-        return m;
-}
-
-/* Get Video Buffer Starting Physical Address(back door)*/
-
-unsigned long viafb_get_videobuf_addr(void)
-{
-        struct pci_dev *pdev = NULL;
-        unsigned char sys_mem;
-        unsigned char video_mem;
-        unsigned long sys_mem_size;
-        unsigned long video_mem_size;
-        /*system memory = 256 MB, video memory 64 MB */
-        unsigned long vmem_starting_adr = 0x0C000000;
-
-        pdev =
-            (struct pci_dev *)pci_get_device(VIA_K800_BRIDGE_VID,
-                                             VIA_K800_BRIDGE_DID, NULL);
-        if (pdev != NULL) {
-                pci_read_config_byte(pdev, VIA_K800_SYSTEM_MEMORY_REG,
-                                     &sys_mem);
-                pci_read_config_byte(pdev, VIA_K800_VIDEO_MEMORY_REG,
-                                     &video_mem);
-                video_mem = (video_mem & 0x70) >> 4;
-                sys_mem_size = ((unsigned long)sys_mem) << 24;
-                if (video_mem != 0)
-                        video_mem_size = (1 << (video_mem)) * 1024 * 1024;
-                else
-                        video_mem_size = 0;
-
-                vmem_starting_adr = sys_mem_size - video_mem_size;
-                pci_dev_put(pdev);
-        }
-
-        DEBUG_MSG(KERN_INFO "Video Memory Starting Address = %lx \n",
-                  vmem_starting_adr);
-        return vmem_starting_adr;
-}
diff --git a/drivers/video/via/iface.h b/drivers/video/via/iface.h
deleted file mode 100644
index 790ec3e3aea2..000000000000
--- a/drivers/video/via/iface.h
+++ /dev/null
@@ -1,38 +0,0 @@
-/*
- * Copyright 1998-2008 VIA Technologies, Inc. All Rights Reserved.
- * Copyright 2001-2008 S3 Graphics, Inc. All Rights Reserved.
-
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public
- * License as published by the Free Software Foundation;
- * either version 2, or (at your option) any later version.
-
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTIES OR REPRESENTATIONS; without even
- * the implied warranty of MERCHANTABILITY or FITNESS FOR
- * A PARTICULAR PURPOSE.See the GNU General Public License
- * for more details.
-
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc.,
- * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
- */
-
-#ifndef __IFACE_H__
-#define __IFACE_H__
-
-#define Kb  (1024)
-#define Mb  (Kb*Kb)
-
-#define VIA_K800_BRIDGE_VID         0x1106
-#define VIA_K800_BRIDGE_DID         0x3204
-
-#define VIA_K800_SYSTEM_MEMORY_REG  0x47
-#define VIA_K800_VIDEO_MEMORY_REG   0xA1
-
-extern int viafb_memsize;
-unsigned int viafb_get_memsize(void);
-unsigned long viafb_get_videobuf_addr(void);
-
-#endif /* __IFACE_H__ */
diff --git a/drivers/video/via/lcd.c b/drivers/video/via/lcd.c
index 09353e2b92f6..1b1ccdc2d83d 100644
--- a/drivers/video/via/lcd.c
+++ b/drivers/video/via/lcd.c
@@ -22,25 +22,7 @@
 #include "global.h"
 #include "lcdtbl.h"
 
-static struct iga2_shadow_crtc_timing iga2_shadow_crtc_reg = {
-        /* IGA2 Shadow Horizontal Total */
-        {IGA2_SHADOW_HOR_TOTAL_REG_NUM, {{CR6D, 0, 7}, {CR71, 3, 3} } },
-        /* IGA2 Shadow Horizontal Blank End */
-        {IGA2_SHADOW_HOR_BLANK_END_REG_NUM, {{CR6E, 0, 7} } },
-        /* IGA2 Shadow Vertical Total */
-        {IGA2_SHADOW_VER_TOTAL_REG_NUM, {{CR6F, 0, 7}, {CR71, 0, 2} } },
-        /* IGA2 Shadow Vertical Addressable Video */
-        {IGA2_SHADOW_VER_ADDR_REG_NUM, {{CR70, 0, 7}, {CR71, 4, 6} } },
-        /* IGA2 Shadow Vertical Blank Start */
-        {IGA2_SHADOW_VER_BLANK_START_REG_NUM,
-         {{CR72, 0, 7}, {CR74, 4, 6} } },
-        /* IGA2 Shadow Vertical Blank End */
-        {IGA2_SHADOW_VER_BLANK_END_REG_NUM, {{CR73, 0, 7}, {CR74, 0, 2} } },
-        /* IGA2 Shadow Vertical Sync Start */
-        {IGA2_SHADOW_VER_SYNC_START_REG_NUM, {{CR75, 0, 7}, {CR76, 4, 6} } },
-        /* IGA2 Shadow Vertical Sync End */
-        {IGA2_SHADOW_VER_SYNC_END_REG_NUM, {{CR76, 0, 3} } }
-};
+#define viafb_compact_res(x, y) (((x)<<16)|(y))
 
 static struct _lcd_scaling_factor lcd_scaling_factor = {
         /* LCD Horizontal Scaling Factor Register */
@@ -59,16 +41,10 @@ static struct _lcd_scaling_factor lcd_scaling_factor_CLE = {
 
 static int check_lvds_chip(int device_id_subaddr, int device_id);
 static bool lvds_identify_integratedlvds(void);
-static int fp_id_to_vindex(int panel_id);
+static void fp_id_to_vindex(int panel_id);
 static int lvds_register_read(int index);
 static void load_lcd_scaling(int set_hres, int set_vres, int panel_hres,
                       int panel_vres);
-static void load_lcd_k400_patch_tbl(int set_hres, int set_vres,
-        int panel_id);
-static void load_lcd_p880_patch_tbl(int set_hres, int set_vres,
-        int panel_id);
-static void load_lcd_patch_regs(int set_hres, int set_vres,
-        int panel_id, int set_iga);
 static void via_pitch_alignment_patch_lcd(
         struct lvds_setting_information *plvds_setting_info,
                                    struct lvds_chip_information
@@ -98,8 +74,6 @@ static void check_diport_of_integrated_lvds(
 static struct display_timing lcd_centering_timging(struct display_timing
                                             mode_crt_reg,
                                            struct display_timing panel_crt_reg);
-static void load_crtc_shadow_timing(struct display_timing mode_timing,
-                             struct display_timing panel_timing);
 static void viafb_load_scaling_factor_for_p4m900(int set_hres,
         int set_vres, int panel_hres, int panel_vres);
 
@@ -125,33 +99,24 @@ void viafb_init_lcd_size(void)
                 break;
         case GET_LCD_SIZE_BY_VGA_BIOS:
                 DEBUG_MSG(KERN_INFO "Get LCD Size method by VGA BIOS !!\n");
-                viaparinfo->lvds_setting_info->lcd_panel_size =
-                    fp_id_to_vindex(viafb_lcd_panel_id);
+                fp_id_to_vindex(viafb_lcd_panel_id);
                 DEBUG_MSG(KERN_INFO "LCD Panel_ID = %d\n",
                           viaparinfo->lvds_setting_info->lcd_panel_id);
-                DEBUG_MSG(KERN_INFO "LCD Panel Size = %d\n",
-                          viaparinfo->lvds_setting_info->lcd_panel_size);
                 break;
         case GET_LCD_SIZE_BY_USER_SETTING:
                 DEBUG_MSG(KERN_INFO "Get LCD Size method by user setting !!\n");
-                viaparinfo->lvds_setting_info->lcd_panel_size =
-                    fp_id_to_vindex(viafb_lcd_panel_id);
+                fp_id_to_vindex(viafb_lcd_panel_id);
                 DEBUG_MSG(KERN_INFO "LCD Panel_ID = %d\n",
                           viaparinfo->lvds_setting_info->lcd_panel_id);
-                DEBUG_MSG(KERN_INFO "LCD Panel Size = %d\n",
-                          viaparinfo->lvds_setting_info->lcd_panel_size);
                 break;
         default:
                 DEBUG_MSG(KERN_INFO "viafb_init_lcd_size fail\n");
                 viaparinfo->lvds_setting_info->lcd_panel_id =
                         LCD_PANEL_ID1_800X600;
-                viaparinfo->lvds_setting_info->lcd_panel_size =
-                    fp_id_to_vindex(LCD_PANEL_ID1_800X600);
+                fp_id_to_vindex(LCD_PANEL_ID1_800X600);
         }
         viaparinfo->lvds_setting_info2->lcd_panel_id =
                 viaparinfo->lvds_setting_info->lcd_panel_id;
-        viaparinfo->lvds_setting_info2->lcd_panel_size =
-                viaparinfo->lvds_setting_info->lcd_panel_size;
         viaparinfo->lvds_setting_info2->lcd_panel_hres =
                 viaparinfo->lvds_setting_info->lcd_panel_hres;
         viaparinfo->lvds_setting_info2->lcd_panel_vres =
@@ -171,13 +136,13 @@ static bool lvds_identify_integratedlvds(void)
                 if (viaparinfo->chip_info->lvds_chip_info.lvds_chip_name) {
                         viaparinfo->chip_info->lvds_chip_info2.lvds_chip_name =
                             INTEGRATED_LVDS;
-                        DEBUG_MSG(KERN_INFO "Support two dual channel LVDS!\
-                                  (Internal LVDS + External LVDS)\n");
+                        DEBUG_MSG(KERN_INFO "Support two dual channel LVDS! "
+                                  "(Internal LVDS + External LVDS)\n");
                 } else {
                         viaparinfo->chip_info->lvds_chip_info.lvds_chip_name =
                             INTEGRATED_LVDS;
-                        DEBUG_MSG(KERN_INFO "Not found external LVDS,\
-                                  so can't support two dual channel LVDS!\n");
+                        DEBUG_MSG(KERN_INFO "Not found external LVDS, "
+                                  "so can't support two dual channel LVDS!\n");
                 }
         } else if (viafb_display_hardware_layout == HW_LAYOUT_LCD1_LCD2) {
                 /* Two single channel LCD (Internal LVDS + Internal LVDS): */
@@ -185,8 +150,8 @@ static bool lvds_identify_integratedlvds(void)
                 INTEGRATED_LVDS;
                 viaparinfo->chip_info->lvds_chip_info2.lvds_chip_name =
                         INTEGRATED_LVDS;
-                DEBUG_MSG(KERN_INFO "Support two single channel LVDS!\
-                          (Internal LVDS + Internal LVDS)\n");
+                DEBUG_MSG(KERN_INFO "Support two single channel LVDS! "
+                          "(Internal LVDS + Internal LVDS)\n");
         } else if (viafb_display_hardware_layout != HW_LAYOUT_DVI_ONLY) {
                 /* If we have found external LVDS, just use it,
                    otherwise, we will use internal LVDS as default. */
@@ -248,7 +213,7 @@ int viafb_lvds_trasmitter_identify(void)
         return FAIL;
 }
 
-static int fp_id_to_vindex(int panel_id)
+static void fp_id_to_vindex(int panel_id)
 {
         DEBUG_MSG(KERN_INFO "fp_get_panel_id()\n");
 
@@ -264,7 +229,6 @@ static int fp_id_to_vindex(int panel_id)
                         LCD_PANEL_ID0_640X480;
                 viaparinfo->lvds_setting_info->device_lcd_dualedge = 0;
                 viaparinfo->lvds_setting_info->LCDDithering = 1;
-                return VIA_RES_640X480;
                 break;
         case 0x1:
                 viaparinfo->lvds_setting_info->lcd_panel_hres = 800;
@@ -273,7 +237,6 @@ static int fp_id_to_vindex(int panel_id)
                         LCD_PANEL_ID1_800X600;
                 viaparinfo->lvds_setting_info->device_lcd_dualedge = 0;
                 viaparinfo->lvds_setting_info->LCDDithering = 1;
-                return VIA_RES_800X600;
                 break;
         case 0x2:
                 viaparinfo->lvds_setting_info->lcd_panel_hres = 1024;
@@ -282,7 +245,6 @@ static int fp_id_to_vindex(int panel_id)
                         LCD_PANEL_ID2_1024X768;
                 viaparinfo->lvds_setting_info->device_lcd_dualedge = 0;
                 viaparinfo->lvds_setting_info->LCDDithering = 1;
-                return VIA_RES_1024X768;
                 break;
         case 0x3:
                 viaparinfo->lvds_setting_info->lcd_panel_hres = 1280;
@@ -291,7 +253,6 @@ static int fp_id_to_vindex(int panel_id)
                         LCD_PANEL_ID3_1280X768;
                 viaparinfo->lvds_setting_info->device_lcd_dualedge = 0;
                 viaparinfo->lvds_setting_info->LCDDithering = 1;
-                return VIA_RES_1280X768;
                 break;
         case 0x4:
                 viaparinfo->lvds_setting_info->lcd_panel_hres = 1280;
@@ -300,7 +261,6 @@ static int fp_id_to_vindex(int panel_id)
                         LCD_PANEL_ID4_1280X1024;
                 viaparinfo->lvds_setting_info->device_lcd_dualedge = 1;
                 viaparinfo->lvds_setting_info->LCDDithering = 1;
-                return VIA_RES_1280X1024;
                 break;
         case 0x5:
                 viaparinfo->lvds_setting_info->lcd_panel_hres = 1400;
@@ -309,7 +269,6 @@ static int fp_id_to_vindex(int panel_id)
                         LCD_PANEL_ID5_1400X1050;
                 viaparinfo->lvds_setting_info->device_lcd_dualedge = 1;
                 viaparinfo->lvds_setting_info->LCDDithering = 1;
-                return VIA_RES_1400X1050;
                 break;
         case 0x6:
                 viaparinfo->lvds_setting_info->lcd_panel_hres = 1600;
@@ -318,7 +277,6 @@ static int fp_id_to_vindex(int panel_id)
                         LCD_PANEL_ID6_1600X1200;
                 viaparinfo->lvds_setting_info->device_lcd_dualedge = 1;
                 viaparinfo->lvds_setting_info->LCDDithering = 1;
-                return VIA_RES_1600X1200;
                 break;
         case 0x8:
                 viaparinfo->lvds_setting_info->lcd_panel_hres = 800;
@@ -327,7 +285,6 @@ static int fp_id_to_vindex(int panel_id)
                         LCD_PANEL_IDA_800X480;
                 viaparinfo->lvds_setting_info->device_lcd_dualedge = 0;
                 viaparinfo->lvds_setting_info->LCDDithering = 1;
-                return VIA_RES_800X480;
                 break;
         case 0x9:
                 viaparinfo->lvds_setting_info->lcd_panel_hres = 1024;
@@ -336,7 +293,6 @@ static int fp_id_to_vindex(int panel_id)
                         LCD_PANEL_ID2_1024X768;
                 viaparinfo->lvds_setting_info->device_lcd_dualedge = 1;
                 viaparinfo->lvds_setting_info->LCDDithering = 1;
-                return VIA_RES_1024X768;
                 break;
         case 0xA:
                 viaparinfo->lvds_setting_info->lcd_panel_hres = 1024;
@@ -345,7 +301,6 @@ static int fp_id_to_vindex(int panel_id)
                         LCD_PANEL_ID2_1024X768;
                 viaparinfo->lvds_setting_info->device_lcd_dualedge = 0;
                 viaparinfo->lvds_setting_info->LCDDithering = 0;
-                return VIA_RES_1024X768;
                 break;
         case 0xB:
                 viaparinfo->lvds_setting_info->lcd_panel_hres = 1024;
@@ -354,7 +309,6 @@ static int fp_id_to_vindex(int panel_id)
                         LCD_PANEL_ID2_1024X768;
                 viaparinfo->lvds_setting_info->device_lcd_dualedge = 1;
                 viaparinfo->lvds_setting_info->LCDDithering = 0;
-                return VIA_RES_1024X768;
                 break;
         case 0xC:
                 viaparinfo->lvds_setting_info->lcd_panel_hres = 1280;
@@ -363,7 +317,6 @@ static int fp_id_to_vindex(int panel_id)
                         LCD_PANEL_ID3_1280X768;
                 viaparinfo->lvds_setting_info->device_lcd_dualedge = 0;
                 viaparinfo->lvds_setting_info->LCDDithering = 0;
-                return VIA_RES_1280X768;
                 break;
         case 0xD:
                 viaparinfo->lvds_setting_info->lcd_panel_hres = 1280;
@@ -372,7 +325,6 @@ static int fp_id_to_vindex(int panel_id)
                         LCD_PANEL_ID4_1280X1024;
                 viaparinfo->lvds_setting_info->device_lcd_dualedge = 1;
                 viaparinfo->lvds_setting_info->LCDDithering = 0;
-                return VIA_RES_1280X1024;
                 break;
         case 0xE:
                 viaparinfo->lvds_setting_info->lcd_panel_hres = 1400;
@@ -381,7 +333,6 @@ static int fp_id_to_vindex(int panel_id)
                         LCD_PANEL_ID5_1400X1050;
                 viaparinfo->lvds_setting_info->device_lcd_dualedge = 1;
                 viaparinfo->lvds_setting_info->LCDDithering = 0;
-                return VIA_RES_1400X1050;
                 break;
         case 0xF:
                 viaparinfo->lvds_setting_info->lcd_panel_hres = 1600;
@@ -390,7 +341,6 @@ static int fp_id_to_vindex(int panel_id)
                         LCD_PANEL_ID6_1600X1200;
                 viaparinfo->lvds_setting_info->device_lcd_dualedge = 1;
                 viaparinfo->lvds_setting_info->LCDDithering = 0;
-                return VIA_RES_1600X1200;
                 break;
         case 0x10:
                 viaparinfo->lvds_setting_info->lcd_panel_hres = 1366;
@@ -399,7 +349,6 @@ static int fp_id_to_vindex(int panel_id)
                         LCD_PANEL_ID7_1366X768;
                 viaparinfo->lvds_setting_info->device_lcd_dualedge = 0;
                 viaparinfo->lvds_setting_info->LCDDithering = 0;
-                return VIA_RES_1368X768;
                 break;
         case 0x11:
                 viaparinfo->lvds_setting_info->lcd_panel_hres = 1024;
@@ -408,7 +357,6 @@ static int fp_id_to_vindex(int panel_id)
                         LCD_PANEL_ID8_1024X600;
                 viaparinfo->lvds_setting_info->device_lcd_dualedge = 0;
                 viaparinfo->lvds_setting_info->LCDDithering = 1;
-                return VIA_RES_1024X600;
                 break;
         case 0x12:
                 viaparinfo->lvds_setting_info->lcd_panel_hres = 1280;
@@ -417,7 +365,6 @@ static int fp_id_to_vindex(int panel_id)
                         LCD_PANEL_ID3_1280X768;
                 viaparinfo->lvds_setting_info->device_lcd_dualedge = 1;
                 viaparinfo->lvds_setting_info->LCDDithering = 1;
-                return VIA_RES_1280X768;
                 break;
         case 0x13:
                 viaparinfo->lvds_setting_info->lcd_panel_hres = 1280;
@@ -426,7 +373,6 @@ static int fp_id_to_vindex(int panel_id)
                         LCD_PANEL_ID9_1280X800;
                 viaparinfo->lvds_setting_info->device_lcd_dualedge = 0;
                 viaparinfo->lvds_setting_info->LCDDithering = 1;
-                return VIA_RES_1280X800;
                 break;
         case 0x14:
                 viaparinfo->lvds_setting_info->lcd_panel_hres = 1360;
@@ -435,7 +381,6 @@ static int fp_id_to_vindex(int panel_id)
                         LCD_PANEL_IDB_1360X768;
                 viaparinfo->lvds_setting_info->device_lcd_dualedge = 0;
                 viaparinfo->lvds_setting_info->LCDDithering = 0;
-                return VIA_RES_1360X768;
                 break;
         case 0x15:
                 viaparinfo->lvds_setting_info->lcd_panel_hres = 1280;
@@ -444,7 +389,6 @@ static int fp_id_to_vindex(int panel_id)
                         LCD_PANEL_ID3_1280X768;
                 viaparinfo->lvds_setting_info->device_lcd_dualedge = 1;
                 viaparinfo->lvds_setting_info->LCDDithering = 0;
-                return VIA_RES_1280X768;
                 break;
         case 0x16:
                 viaparinfo->lvds_setting_info->lcd_panel_hres = 480;
@@ -453,7 +397,6 @@ static int fp_id_to_vindex(int panel_id)
                         LCD_PANEL_IDC_480X640;
                 viaparinfo->lvds_setting_info->device_lcd_dualedge = 0;
                 viaparinfo->lvds_setting_info->LCDDithering = 1;
-                return VIA_RES_480X640;
                 break;
         default:
                 viaparinfo->lvds_setting_info->lcd_panel_hres = 800;
@@ -462,7 +405,6 @@ static int fp_id_to_vindex(int panel_id)
                         LCD_PANEL_ID1_800X600;
                 viaparinfo->lvds_setting_info->device_lcd_dualedge = 0;
                 viaparinfo->lvds_setting_info->LCDDithering = 1;
-                return VIA_RES_800X600;
         }
 }
 
@@ -573,284 +515,6 @@ static void load_lcd_scaling(int set_hres, int set_vres, int panel_hres,
         }
 }
 
-static void load_lcd_k400_patch_tbl(int set_hres, int set_vres,
-        int panel_id)
-{
-        int vmode_index;
-        int reg_num = 0;
-        struct io_reg *lcd_patch_reg = NULL;
-
-        vmode_index = viafb_get_mode_index(set_hres, set_vres);
-        switch (panel_id) {
-                /* LCD 800x600 */
-        case LCD_PANEL_ID1_800X600:
-                switch (vmode_index) {
-                case VIA_RES_640X400:
-                case VIA_RES_640X480:
-                        reg_num = NUM_TOTAL_K400_LCD_RES_6X4_8X6;
-                        lcd_patch_reg = K400_LCD_RES_6X4_8X6;
-                        break;
-                case VIA_RES_720X480:
-                case VIA_RES_720X576:
-                        reg_num = NUM_TOTAL_K400_LCD_RES_7X4_8X6;
-                        lcd_patch_reg = K400_LCD_RES_7X4_8X6;
-                        break;
-                }
-                break;
-
-                /* LCD 1024x768 */
-        case LCD_PANEL_ID2_1024X768:
-                switch (vmode_index) {
-                case VIA_RES_640X400:
-                case VIA_RES_640X480:
-                        reg_num = NUM_TOTAL_K400_LCD_RES_6X4_10X7;
-                        lcd_patch_reg = K400_LCD_RES_6X4_10X7;
-                        break;
-                case VIA_RES_720X480:
-                case VIA_RES_720X576:
-                        reg_num = NUM_TOTAL_K400_LCD_RES_7X4_10X7;
-                        lcd_patch_reg = K400_LCD_RES_7X4_10X7;
-                        break;
-                case VIA_RES_800X600:
-                        reg_num = NUM_TOTAL_K400_LCD_RES_8X6_10X7;
-                        lcd_patch_reg = K400_LCD_RES_8X6_10X7;
-                        break;
-                }
-                break;
-
-                /* LCD 1280x1024 */
-        case LCD_PANEL_ID4_1280X1024:
-                switch (vmode_index) {
-                case VIA_RES_640X400:
-                case VIA_RES_640X480:
-                        reg_num = NUM_TOTAL_K400_LCD_RES_6X4_12X10;
-                        lcd_patch_reg = K400_LCD_RES_6X4_12X10;
-                        break;
-                case VIA_RES_720X480:
-                case VIA_RES_720X576:
-                        reg_num = NUM_TOTAL_K400_LCD_RES_7X4_12X10;
-                        lcd_patch_reg = K400_LCD_RES_7X4_12X10;
-                        break;
-                case VIA_RES_800X600:
-                        reg_num = NUM_TOTAL_K400_LCD_RES_8X6_12X10;
-                        lcd_patch_reg = K400_LCD_RES_8X6_12X10;
-                        break;
-                case VIA_RES_1024X768:
-                        reg_num = NUM_TOTAL_K400_LCD_RES_10X7_12X10;
-                        lcd_patch_reg = K400_LCD_RES_10X7_12X10;
-                        break;
-
-                }
-                break;
-
-                /* LCD 1400x1050 */
-        case LCD_PANEL_ID5_1400X1050:
-                switch (vmode_index) {
-                case VIA_RES_640X480:
-                        reg_num = NUM_TOTAL_K400_LCD_RES_6X4_14X10;
-                        lcd_patch_reg = K400_LCD_RES_6X4_14X10;
-                        break;
-                case VIA_RES_800X600:
-                        reg_num = NUM_TOTAL_K400_LCD_RES_8X6_14X10;
-                        lcd_patch_reg = K400_LCD_RES_8X6_14X10;
-                        break;
-                case VIA_RES_1024X768:
-                        reg_num = NUM_TOTAL_K400_LCD_RES_10X7_14X10;
-                        lcd_patch_reg = K400_LCD_RES_10X7_14X10;
-                        break;
-                case VIA_RES_1280X768:
-                case VIA_RES_1280X800:
-                case VIA_RES_1280X960:
-                case VIA_RES_1280X1024:
-                        reg_num = NUM_TOTAL_K400_LCD_RES_12X10_14X10;
-                        lcd_patch_reg = K400_LCD_RES_12X10_14X10;
-                        break;
-                }
-                break;
-
-                /* LCD 1600x1200 */
-        case LCD_PANEL_ID6_1600X1200:
-                switch (vmode_index) {
-                case VIA_RES_640X400:
-                case VIA_RES_640X480:
-                        reg_num = NUM_TOTAL_K400_LCD_RES_6X4_16X12;
-                        lcd_patch_reg = K400_LCD_RES_6X4_16X12;
-                        break;
-                case VIA_RES_720X480:
-                case VIA_RES_720X576:
-                        reg_num = NUM_TOTAL_K400_LCD_RES_7X4_16X12;
-                        lcd_patch_reg = K400_LCD_RES_7X4_16X12;
-                        break;
-                case VIA_RES_800X600:
-                        reg_num = NUM_TOTAL_K400_LCD_RES_8X6_16X12;
-                        lcd_patch_reg = K400_LCD_RES_8X6_16X12;
-                        break;
-                case VIA_RES_1024X768:
-                        reg_num = NUM_TOTAL_K400_LCD_RES_10X7_16X12;
-                        lcd_patch_reg = K400_LCD_RES_10X7_16X12;
-                        break;
-                case VIA_RES_1280X768:
-                case VIA_RES_1280X800:
-                case VIA_RES_1280X960:
-                case VIA_RES_1280X1024:
-                        reg_num = NUM_TOTAL_K400_LCD_RES_12X10_16X12;
-                        lcd_patch_reg = K400_LCD_RES_12X10_16X12;
-                        break;
-                }
-                break;
-
-                /* LCD 1366x768 */
-        case LCD_PANEL_ID7_1366X768:
-                switch (vmode_index) {
-                case VIA_RES_640X480:
-                        reg_num = NUM_TOTAL_K400_LCD_RES_6X4_1366X7;
-                        lcd_patch_reg = K400_LCD_RES_6X4_1366X7;
-                        break;
-                case VIA_RES_720X480:
-                case VIA_RES_720X576:
-                        reg_num = NUM_TOTAL_K400_LCD_RES_7X4_1366X7;
-                        lcd_patch_reg = K400_LCD_RES_7X4_1366X7;
-                        break;
-                case VIA_RES_800X600:
-                        reg_num = NUM_TOTAL_K400_LCD_RES_8X6_1366X7;
-                        lcd_patch_reg = K400_LCD_RES_8X6_1366X7;
-                        break;
-                case VIA_RES_1024X768:
-                        reg_num = NUM_TOTAL_K400_LCD_RES_10X7_1366X7;
-                        lcd_patch_reg = K400_LCD_RES_10X7_1366X7;
-                        break;
-                case VIA_RES_1280X768:
-                case VIA_RES_1280X800:
-                case VIA_RES_1280X960:
-                case VIA_RES_1280X1024:
-                        reg_num = NUM_TOTAL_K400_LCD_RES_12X10_1366X7;
-                        lcd_patch_reg = K400_LCD_RES_12X10_1366X7;
-                        break;
-                }
-                break;
-
-                /* LCD 1360x768 */
-        case LCD_PANEL_IDB_1360X768:
-                break;
-        }
-        if (reg_num != 0) {
-                /* H.W. Reset : ON */
-                viafb_write_reg_mask(CR17, VIACR, 0x00, BIT7);
-
-                viafb_write_regx(lcd_patch_reg, reg_num);
-
-                /* H.W. Reset : OFF */
-                viafb_write_reg_mask(CR17, VIACR, 0x80, BIT7);
-
-                /* Reset PLL */
-                viafb_write_reg_mask(SR40, VIASR, 0x02, BIT1);
-                viafb_write_reg_mask(SR40, VIASR, 0x00, BIT1);
-
-                /* Fire! */
-                outb(inb(VIARMisc) | (BIT2 + BIT3), VIAWMisc);
-        }
-}
-
-static void load_lcd_p880_patch_tbl(int set_hres, int set_vres,
-        int panel_id)
-{
-        int vmode_index;
-        int reg_num = 0;
-        struct io_reg *lcd_patch_reg = NULL;
-
-        vmode_index = viafb_get_mode_index(set_hres, set_vres);
-
-        switch (panel_id) {
-        case LCD_PANEL_ID5_1400X1050:
-                switch (vmode_index) {
-                case VIA_RES_640X480:
-                        reg_num = NUM_TOTAL_P880_LCD_RES_6X4_14X10;
-                        lcd_patch_reg = P880_LCD_RES_6X4_14X10;
-                        break;
-                case VIA_RES_800X600:
-                        reg_num = NUM_TOTAL_P880_LCD_RES_8X6_14X10;
-                        lcd_patch_reg = P880_LCD_RES_8X6_14X10;
-                        break;
-                }
-                break;
-        case LCD_PANEL_ID6_1600X1200:
-                switch (vmode_index) {
-                case VIA_RES_640X400:
-                case VIA_RES_640X480:
-                        reg_num = NUM_TOTAL_P880_LCD_RES_6X4_16X12;
-                        lcd_patch_reg = P880_LCD_RES_6X4_16X12;
-                        break;
-                case VIA_RES_720X480:
-                case VIA_RES_720X576:
-                        reg_num = NUM_TOTAL_P880_LCD_RES_7X4_16X12;
-                        lcd_patch_reg = P880_LCD_RES_7X4_16X12;
-                        break;
-                case VIA_RES_800X600:
-                        reg_num = NUM_TOTAL_P880_LCD_RES_8X6_16X12;
-                        lcd_patch_reg = P880_LCD_RES_8X6_16X12;
-                        break;
-                case VIA_RES_1024X768:
-                        reg_num = NUM_TOTAL_P880_LCD_RES_10X7_16X12;
-                        lcd_patch_reg = P880_LCD_RES_10X7_16X12;
-                        break;
-                case VIA_RES_1280X768:
-                case VIA_RES_1280X960:
-                case VIA_RES_1280X1024:
-                        reg_num = NUM_TOTAL_P880_LCD_RES_12X10_16X12;
-                        lcd_patch_reg = P880_LCD_RES_12X10_16X12;
-                        break;
-                }
-                break;
-
-        }
-        if (reg_num != 0) {
-                /* H.W. Reset : ON */
-                viafb_write_reg_mask(CR17, VIACR, 0x00, BIT7);
-
-                viafb_write_regx(lcd_patch_reg, reg_num);
-
-                /* H.W. Reset : OFF */
-                viafb_write_reg_mask(CR17, VIACR, 0x80, BIT7);
-
-                /* Reset PLL */
-                viafb_write_reg_mask(SR40, VIASR, 0x02, BIT1);
-                viafb_write_reg_mask(SR40, VIASR, 0x00, BIT1);
-
-                /* Fire! */
-                outb(inb(VIARMisc) | (BIT2 + BIT3), VIAWMisc);
-        }
-}
-
-static void load_lcd_patch_regs(int set_hres, int set_vres,
-        int panel_id, int set_iga)
-{
-        int vmode_index;
-
-        vmode_index = viafb_get_mode_index(set_hres, set_vres);
-
-        viafb_unlock_crt();
-
-        /* Patch for simultaneous & Expansion */
-        if ((set_iga == IGA1_IGA2) &&
-                (viaparinfo->lvds_setting_info->display_method ==
-            LCD_EXPANDSION)) {
-                switch (viaparinfo->chip_info->gfx_chip_name) {
-                case UNICHROME_CLE266:
-                case UNICHROME_K400:
-                        load_lcd_k400_patch_tbl(set_hres, set_vres, panel_id);
-                        break;
-                case UNICHROME_K800:
-                        break;
-                case UNICHROME_PM800:
-                case UNICHROME_CN700:
-                case UNICHROME_CX700:
-                        load_lcd_p880_patch_tbl(set_hres, set_vres, panel_id);
-                }
-        }
-
-        viafb_lock_crt();
-}
-
 static void via_pitch_alignment_patch_lcd(
         struct lvds_setting_information *plvds_setting_info,
                                    struct lvds_chip_information
@@ -949,29 +613,25 @@ void viafb_lcd_set_mode(struct crt_mode_table *mode_crt_table,
                   struct lvds_setting_information *plvds_setting_info,
                   struct lvds_chip_information *plvds_chip_info)
 {
-        int video_index = plvds_setting_info->lcd_panel_size;
         int set_iga = plvds_setting_info->iga_path;
         int mode_bpp = plvds_setting_info->bpp;
-        int set_hres, set_vres;
-        int panel_hres, panel_vres;
+        int set_hres = plvds_setting_info->h_active;
+        int set_vres = plvds_setting_info->v_active;
+        int panel_hres = plvds_setting_info->lcd_panel_hres;
+        int panel_vres = plvds_setting_info->lcd_panel_vres;
         u32 pll_D_N;
-        int offset;
         struct display_timing mode_crt_reg, panel_crt_reg;
         struct crt_mode_table *panel_crt_table = NULL;
-        struct VideoModeTable *vmode_tbl = NULL;
+        struct VideoModeTable *vmode_tbl = viafb_get_mode(panel_hres,
+                panel_vres);
 
         DEBUG_MSG(KERN_INFO "viafb_lcd_set_mode!!\n");
         /* Get mode table */
         mode_crt_reg = mode_crt_table->crtc;
         /* Get panel table Pointer */
-        vmode_tbl = viafb_get_modetbl_pointer(video_index);
         panel_crt_table = vmode_tbl->crtc;
         panel_crt_reg = panel_crt_table->crtc;
         DEBUG_MSG(KERN_INFO "bellow viafb_lcd_set_mode!!\n");
-        set_hres = plvds_setting_info->h_active;
-        set_vres = plvds_setting_info->v_active;
-        panel_hres = plvds_setting_info->lcd_panel_hres;
-        panel_vres = plvds_setting_info->lcd_panel_vres;
         if (VT1636_LVDS == plvds_chip_info->lvds_chip_name)
                 viafb_init_lvds_vt1636(plvds_setting_info, plvds_chip_info);
         plvds_setting_info->vclk = panel_crt_table->clk;
@@ -1001,54 +661,12 @@ void viafb_lcd_set_mode(struct crt_mode_table *mode_crt_table,
                 }
         }
 
-        if (set_iga == IGA1_IGA2) {
-                load_crtc_shadow_timing(mode_crt_reg, panel_crt_reg);
-                /* Fill shadow registers */
-
-                switch (plvds_setting_info->lcd_panel_id) {
-                case LCD_PANEL_ID0_640X480:
-                        offset = 80;
-                        break;
-                case LCD_PANEL_ID1_800X600:
-                case LCD_PANEL_IDA_800X480:
-                        offset = 110;
-                        break;
-                case LCD_PANEL_ID2_1024X768:
-                        offset = 150;
-                        break;
-                case LCD_PANEL_ID3_1280X768:
-                case LCD_PANEL_ID4_1280X1024:
-                case LCD_PANEL_ID5_1400X1050:
-                case LCD_PANEL_ID9_1280X800:
-                        offset = 190;
-                        break;
-                case LCD_PANEL_ID6_1600X1200:
-                        offset = 250;
-                        break;
-                case LCD_PANEL_ID7_1366X768:
-                case LCD_PANEL_IDB_1360X768:
-                        offset = 212;
-                        break;
-                default:
-                        offset = 140;
-                        break;
-                }
-
-                /* Offset for simultaneous */
-                viafb_set_secondary_pitch(offset << 3);
-                DEBUG_MSG(KERN_INFO "viafb_load_reg!!\n");
-                viafb_load_fetch_count_reg(set_hres, 4, IGA2);
-                /* Fetch count for simultaneous */
-        } else {                /* SAMM */
-                /* Fetch count for IGA2 only */
-                viafb_load_fetch_count_reg(set_hres, mode_bpp / 8, set_iga);
-
-                if ((viaparinfo->chip_info->gfx_chip_name != UNICHROME_CLE266)
-                    && (viaparinfo->chip_info->gfx_chip_name != UNICHROME_K400))
-                        viafb_load_FIFO_reg(set_iga, set_hres, set_vres);
+        /* Fetch count for IGA2 only */
+        viafb_load_fetch_count_reg(set_hres, mode_bpp / 8, set_iga);
 
-                viafb_set_color_depth(mode_bpp / 8, set_iga);
-        }
+        if ((viaparinfo->chip_info->gfx_chip_name != UNICHROME_CLE266)
+                && (viaparinfo->chip_info->gfx_chip_name != UNICHROME_K400))
+                viafb_load_FIFO_reg(set_iga, set_hres, set_vres);
 
         fill_lcd_format();
 
@@ -1065,11 +683,6 @@ void viafb_lcd_set_mode(struct crt_mode_table *mode_crt_table,
             || (UNICHROME_K8M890 == viaparinfo->chip_info->gfx_chip_name))
                 viafb_write_reg_mask(CR6A, VIACR, 0x01, BIT0);
 
-        load_lcd_patch_regs(set_hres, set_vres,
-                            plvds_setting_info->lcd_panel_id, set_iga);
-
-        DEBUG_MSG(KERN_INFO "load_lcd_patch_regs!!\n");
-
         /* Patch for non 32bit alignment mode */
         via_pitch_alignment_patch_lcd(plvds_setting_info, plvds_chip_info);
 }
@@ -1283,8 +896,7 @@ void viafb_lcd_enable(void)
                 viafb_write_reg_mask(CR6A, VIACR, 0x48, 0x48);
         }
 
-        if ((viaparinfo->lvds_setting_info->iga_path == IGA1)
-            || (viaparinfo->lvds_setting_info->iga_path == IGA1_IGA2)) {
+        if (viaparinfo->lvds_setting_info->iga_path == IGA1) {
                 /* CRT path set to IGA2    */
                 viafb_write_reg_mask(SR16, VIASR, 0x40, 0x40);
                 /* IGA2 path disabled      */
@@ -1476,210 +1088,6 @@ static struct display_timing lcd_centering_timging(struct display_timing
         return crt_reg;
 }
 
-static void load_crtc_shadow_timing(struct display_timing mode_timing,
-                             struct display_timing panel_timing)
-{
-        struct io_register *reg = NULL;
-        int i;
-        int viafb_load_reg_Num = 0;
-        int reg_value = 0;
-
-        if (viaparinfo->lvds_setting_info->display_method == LCD_EXPANDSION) {
-                /* Expansion */
-                for (i = 12; i < 20; i++) {
-                        switch (i) {
-                        case H_TOTAL_SHADOW_INDEX:
-                                reg_value =
-                                    IGA2_HOR_TOTAL_SHADOW_FORMULA
-                                    (panel_timing.hor_total);
-                                viafb_load_reg_Num =
-                                    iga2_shadow_crtc_reg.hor_total_shadow.
-                                    reg_num;
-                                reg = iga2_shadow_crtc_reg.hor_total_shadow.reg;
-                                break;
-                        case H_BLANK_END_SHADOW_INDEX:
-                                reg_value =
-                                    IGA2_HOR_BLANK_END_SHADOW_FORMULA
-                                    (panel_timing.hor_blank_start,
-                                     panel_timing.hor_blank_end);
-                                viafb_load_reg_Num =
-                                    iga2_shadow_crtc_reg.
-                                    hor_blank_end_shadow.reg_num;
-                                reg =
-                                    iga2_shadow_crtc_reg.
-                                    hor_blank_end_shadow.reg;
-                                break;
-                        case V_TOTAL_SHADOW_INDEX:
-                                reg_value =
-                                    IGA2_VER_TOTAL_SHADOW_FORMULA
-                                    (panel_timing.ver_total);
-                                viafb_load_reg_Num =
-                                    iga2_shadow_crtc_reg.ver_total_shadow.
-                                    reg_num;
-                                reg = iga2_shadow_crtc_reg.ver_total_shadow.reg;
-                                break;
-                        case V_ADDR_SHADOW_INDEX:
-                                reg_value =
-                                    IGA2_VER_ADDR_SHADOW_FORMULA
-                                    (panel_timing.ver_addr);
-                                viafb_load_reg_Num =
-                                    iga2_shadow_crtc_reg.ver_addr_shadow.
-                                    reg_num;
-                                reg = iga2_shadow_crtc_reg.ver_addr_shadow.reg;
-                                break;
-                        case V_BLANK_SATRT_SHADOW_INDEX:
-                                reg_value =
-                                    IGA2_VER_BLANK_START_SHADOW_FORMULA
-                                    (panel_timing.ver_blank_start);
-                                viafb_load_reg_Num =
-                                    iga2_shadow_crtc_reg.
-                                    ver_blank_start_shadow.reg_num;
-                                reg =
-                                    iga2_shadow_crtc_reg.
-                                    ver_blank_start_shadow.reg;
-                                break;
-                        case V_BLANK_END_SHADOW_INDEX:
-                                reg_value =
-                                    IGA2_VER_BLANK_END_SHADOW_FORMULA
-                                    (panel_timing.ver_blank_start,
-                                     panel_timing.ver_blank_end);
-                                viafb_load_reg_Num =
-                                    iga2_shadow_crtc_reg.
-                                    ver_blank_end_shadow.reg_num;
-                                reg =
-                                    iga2_shadow_crtc_reg.
-                                    ver_blank_end_shadow.reg;
-                                break;
-                        case V_SYNC_SATRT_SHADOW_INDEX:
-                                reg_value =
-                                    IGA2_VER_SYNC_START_SHADOW_FORMULA
-                                    (panel_timing.ver_sync_start);
-                                viafb_load_reg_Num =
-                                    iga2_shadow_crtc_reg.
-                                    ver_sync_start_shadow.reg_num;
-                                reg =
-                                    iga2_shadow_crtc_reg.
-                                    ver_sync_start_shadow.reg;
-                                break;
-                        case V_SYNC_END_SHADOW_INDEX:
-                                reg_value =
-                                    IGA2_VER_SYNC_END_SHADOW_FORMULA
-                                    (panel_timing.ver_sync_start,
-                                     panel_timing.ver_sync_end);
-                                viafb_load_reg_Num =
-                                    iga2_shadow_crtc_reg.
-                                    ver_sync_end_shadow.reg_num;
-                                reg =
-                                    iga2_shadow_crtc_reg.
-                                    ver_sync_end_shadow.reg;
-                                break;
-                        }
-                        viafb_load_reg(reg_value,
-                                viafb_load_reg_Num, reg, VIACR);
-                }
-        } else {                /* Centering */
-                for (i = 12; i < 20; i++) {
-                        switch (i) {
-                        case H_TOTAL_SHADOW_INDEX:
-                                reg_value =
-                                    IGA2_HOR_TOTAL_SHADOW_FORMULA
-                                    (panel_timing.hor_total);
-                                viafb_load_reg_Num =
-                                    iga2_shadow_crtc_reg.hor_total_shadow.
-                                    reg_num;
-                                reg = iga2_shadow_crtc_reg.hor_total_shadow.reg;
-                                break;
-                        case H_BLANK_END_SHADOW_INDEX:
-                                reg_value =
-                                    IGA2_HOR_BLANK_END_SHADOW_FORMULA
-                                    (panel_timing.hor_blank_start,
-                                     panel_timing.hor_blank_end);
-                                viafb_load_reg_Num =
-                                    iga2_shadow_crtc_reg.
-                                    hor_blank_end_shadow.reg_num;
-                                reg =
-                                    iga2_shadow_crtc_reg.
-                                    hor_blank_end_shadow.reg;
-                                break;
-                        case V_TOTAL_SHADOW_INDEX:
-                                reg_value =
-                                    IGA2_VER_TOTAL_SHADOW_FORMULA
-                                    (panel_timing.ver_total);
-                                viafb_load_reg_Num =
-                                    iga2_shadow_crtc_reg.ver_total_shadow.
-                                    reg_num;
-                                reg = iga2_shadow_crtc_reg.ver_total_shadow.reg;
-                                break;
-                        case V_ADDR_SHADOW_INDEX:
-                                reg_value =
-                                    IGA2_VER_ADDR_SHADOW_FORMULA
-                                    (mode_timing.ver_addr);
-                                viafb_load_reg_Num =
-                                    iga2_shadow_crtc_reg.ver_addr_shadow.
-                                    reg_num;
-                                reg = iga2_shadow_crtc_reg.ver_addr_shadow.reg;
-                                break;
-                        case V_BLANK_SATRT_SHADOW_INDEX:
-                                reg_value =
-                                    IGA2_VER_BLANK_START_SHADOW_FORMULA
-                                    (mode_timing.ver_blank_start);
-                                viafb_load_reg_Num =
-                                    iga2_shadow_crtc_reg.
-                                    ver_blank_start_shadow.reg_num;
-                                reg =
-                                    iga2_shadow_crtc_reg.
-                                    ver_blank_start_shadow.reg;
-                                break;
-                        case V_BLANK_END_SHADOW_INDEX:
-                                reg_value =
-                                    IGA2_VER_BLANK_END_SHADOW_FORMULA
-                                    (panel_timing.ver_blank_start,
-                                     panel_timing.ver_blank_end);
-                                viafb_load_reg_Num =
-                                    iga2_shadow_crtc_reg.
-                                    ver_blank_end_shadow.reg_num;
-                                reg =
-                                    iga2_shadow_crtc_reg.
-                                    ver_blank_end_shadow.reg;
-                                break;
-                        case V_SYNC_SATRT_SHADOW_INDEX:
-                                reg_value =
-                                    IGA2_VER_SYNC_START_SHADOW_FORMULA(
-                                    (panel_timing.ver_sync_start -
-                                    panel_timing.ver_blank_start) +
-                                    (panel_timing.ver_addr -
-                                    mode_timing.ver_addr) / 2 +
-                                    mode_timing.ver_addr);
-                                viafb_load_reg_Num =
-                                    iga2_shadow_crtc_reg.ver_sync_start_shadow.
-                                    reg_num;
-                                reg =
-                                    iga2_shadow_crtc_reg.ver_sync_start_shadow.
-                                    reg;
-                                break;
-                        case V_SYNC_END_SHADOW_INDEX:
-                                reg_value =
-                                    IGA2_VER_SYNC_END_SHADOW_FORMULA(
-                                    (panel_timing.ver_sync_start -
-                                    panel_timing.ver_blank_start) +
-                                    (panel_timing.ver_addr -
-                                    mode_timing.ver_addr) / 2 +
-                                    mode_timing.ver_addr,
-                                    panel_timing.ver_sync_end);
-                                viafb_load_reg_Num =
-                                    iga2_shadow_crtc_reg.ver_sync_end_shadow.
-                                    reg_num;
-                                reg =
-                                    iga2_shadow_crtc_reg.ver_sync_end_shadow.
-                                    reg;
-                                break;
-                        }
-                        viafb_load_reg(reg_value,
-                                viafb_load_reg_Num, reg, VIACR);
-                }
-        }
-}
-
 bool viafb_lcd_get_mobile_state(bool *mobile)
 {
         unsigned char *romptr, *tableptr;
diff --git a/drivers/video/via/share.h b/drivers/video/via/share.h
index 7cd03e2a1275..d55aaa7b912c 100644
--- a/drivers/video/via/share.h
+++ b/drivers/video/via/share.h
@@ -43,61 +43,6 @@
 /* Video Memory Size */
 #define VIDEO_MEMORY_SIZE_16M    0x1000000
 
-/* Definition Mode Index
-*/
-#define     VIA_RES_640X480                     0
-#define     VIA_RES_800X600                     1
-#define     VIA_RES_1024X768                    2
-#define     VIA_RES_1152X864                    3
-#define     VIA_RES_1280X1024                   4
-#define     VIA_RES_1600X1200                   5
-#define     VIA_RES_1440X1050                   6
-#define     VIA_RES_1280X768                    7
-#define     VIA_RES_1280X960                    8
-#define     VIA_RES_1920X1440                   9
-#define     VIA_RES_848X480                     10
-#define     VIA_RES_1400X1050                   11
-#define     VIA_RES_720X480                     12
-#define     VIA_RES_720X576                     13
-#define     VIA_RES_1024X512                    14
-#define     VIA_RES_856X480                     15
-#define     VIA_RES_1024X576                    16
-#define     VIA_RES_640X400                     17
-#define     VIA_RES_1280X720                    18
-#define     VIA_RES_1920X1080                   19
-#define     VIA_RES_800X480                     20
-#define     VIA_RES_1368X768                    21
-#define     VIA_RES_1024X600                    22
-#define     VIA_RES_1280X800                    23
-#define     VIA_RES_1680X1050                   24
-#define     VIA_RES_960X600                     25
-#define     VIA_RES_1000X600                    26
-#define     VIA_RES_1088X612                    27
-#define     VIA_RES_1152X720                    28
-#define     VIA_RES_1200X720                    29
-#define     VIA_RES_1280X600                    30
-#define     VIA_RES_1360X768                    31
-#define     VIA_RES_1366X768                    32
-#define     VIA_RES_1440X900                    33
-#define     VIA_RES_1600X900                    34
-#define     VIA_RES_1600X1024                   35
-#define     VIA_RES_1792X1344                   36
-#define     VIA_RES_1856X1392                   37
-#define     VIA_RES_1920X1200                   38
-#define     VIA_RES_2048X1536                   39
-#define     VIA_RES_480X640                     40
-
-/*Reduce Blanking*/
-#define     VIA_RES_1360X768_RB                 131
-#define     VIA_RES_1440X900_RB                 133
-#define     VIA_RES_1400X1050_RB                111
-#define     VIA_RES_1600X900_RB                 134
-#define     VIA_RES_1680X1050_RB                124
-#define     VIA_RES_1920X1080_RB                119
-#define     VIA_RES_1920X1200_RB                138
-
-#define     VIA_RES_INVALID                     255
-
 /* standard VGA IO port
 */
 #define VIARMisc    0x3CC
@@ -118,7 +63,6 @@
 /* Display path */
 #define IGA1        1
 #define IGA2        2
-#define IGA1_IGA2   3
 
 /* Define Color Depth  */
 #define MODE_8BPP       1
diff --git a/drivers/video/via/via_utility.c b/drivers/video/via/via_utility.c
index d53c3d54ed8e..aefdeeec89b1 100644
--- a/drivers/video/via/via_utility.c
+++ b/drivers/video/via/via_utility.c
@@ -239,15 +239,3 @@ void viafb_get_gamma_support_state(int bpp, unsigned int *support_state)
         else
                 *support_state = CRT_Device | DVI_Device | LCD_Device;
 }
-
-int viafb_input_parameter_converter(int parameter_value)
-{
-        int result;
-
-        if (parameter_value >= 1 && parameter_value <= 9)
-                result = 1 << (parameter_value - 1);
-        else
-                result = 1;
-
-        return result;
-}
diff --git a/drivers/video/via/via_utility.h b/drivers/video/via/via_utility.h
index 2fd455202ebd..1670ba82143f 100644
--- a/drivers/video/via/via_utility.h
+++ b/drivers/video/via/via_utility.h
@@ -30,6 +30,5 @@ bool viafb_lcd_get_support_expand_state(u32 xres, u32 yres);
 void viafb_set_gamma_table(int bpp, unsigned int *gamma_table);
 void viafb_get_gamma_table(unsigned int *gamma_table);
 void viafb_get_gamma_support_state(int bpp, unsigned int *support_state);
-int viafb_input_parameter_converter(int parameter_value);
 
 #endif /* __VIAUTILITY_H__ */
diff --git a/drivers/video/via/viafbdev.c b/drivers/video/via/viafbdev.c
index 3028e7ddc3b5..ce7783b63f6a 100644
--- a/drivers/video/via/viafbdev.c
+++ b/drivers/video/via/viafbdev.c
@@ -26,18 +26,22 @@
 
 #include "global.h"
 
-static struct fb_var_screeninfo default_var;
 static char *viafb_name = "Via";
 static u32 pseudo_pal[17];
 
 /* video mode */
-static char *viafb_mode = "640x480";
-static char *viafb_mode1 = "640x480";
+static char *viafb_mode;
+static char *viafb_mode1;
+static int viafb_bpp = 32;
+static int viafb_bpp1 = 32;
+
+static unsigned int viafb_second_offset;
+static int viafb_second_size;
 
 static int viafb_accel = 1;
 
 /* Added for specifying active devices.*/
-char *viafb_active_dev = "";
+char *viafb_active_dev;
 
 /*Added for specify lcd output port*/
 char *viafb_lcd_port = "";
@@ -50,18 +54,78 @@ static void apply_second_mode_setting(struct fb_var_screeninfo
         *sec_var);
 static void retrieve_device_setting(struct viafb_ioctl_setting
         *setting_info);
+static int viafb_pan_display(struct fb_var_screeninfo *var,
+        struct fb_info *info);
 
 static struct fb_ops viafb_ops;
 
 
+static void viafb_fill_var_color_info(struct fb_var_screeninfo *var, u8 depth)
+{
+        var->grayscale = 0;
+        var->red.msb_right = 0;
+        var->green.msb_right = 0;
+        var->blue.msb_right = 0;
+        var->transp.offset = 0;
+        var->transp.length = 0;
+        var->transp.msb_right = 0;
+        var->nonstd = 0;
+        switch (depth) {
+        case 8:
+                var->bits_per_pixel = 8;
+                var->red.offset = 0;
+                var->green.offset = 0;
+                var->blue.offset = 0;
+                var->red.length = 8;
+                var->green.length = 8;
+                var->blue.length = 8;
+                break;
+        case 15:
+                var->bits_per_pixel = 16;
+                var->red.offset = 10;
+                var->green.offset = 5;
+                var->blue.offset = 0;
+                var->red.length = 5;
+                var->green.length = 5;
+                var->blue.length = 5;
+                break;
+        case 16:
+                var->bits_per_pixel = 16;
+                var->red.offset = 11;
+                var->green.offset = 5;
+                var->blue.offset = 0;
+                var->red.length = 5;
+                var->green.length = 6;
+                var->blue.length = 5;
+                break;
+        case 24:
+                var->bits_per_pixel = 32;
+                var->red.offset = 16;
+                var->green.offset = 8;
+                var->blue.offset = 0;
+                var->red.length = 8;
+                var->green.length = 8;
+                var->blue.length = 8;
+                break;
+        case 30:
+                var->bits_per_pixel = 32;
+                var->red.offset = 20;
+                var->green.offset = 10;
+                var->blue.offset = 0;
+                var->red.length = 10;
+                var->green.length = 10;
+                var->blue.length = 10;
+                break;
+        }
+}
+
 static void viafb_update_fix(struct fb_info *info)
 {
         u32 bpp = info->var.bits_per_pixel;
 
         info->fix.visual =
                 bpp == 8 ? FB_VISUAL_PSEUDOCOLOR : FB_VISUAL_TRUECOLOR;
-        info->fix.line_length =
-                ((info->var.xres_virtual + 7) & ~7) * bpp / 8;
+        info->fix.line_length = (info->var.xres_virtual * bpp / 8 + 7) & ~7;
 }
 
 static void viafb_setup_fixinfo(struct fb_fix_screeninfo *fix,
@@ -75,6 +139,7 @@ static void viafb_setup_fixinfo(struct fb_fix_screeninfo *fix,
 
         fix->type = FB_TYPE_PACKED_PIXELS;
         fix->type_aux = 0;
+        fix->visual = FB_VISUAL_TRUECOLOR;
 
         fix->xpanstep = fix->ywrapstep = 0;
         fix->ypanstep = 1;
@@ -97,9 +162,10 @@ static int viafb_release(struct fb_info *info, int user)
 static int viafb_check_var(struct fb_var_screeninfo *var,
         struct fb_info *info)
 {
-        int vmode_index, htotal, vtotal;
+        int htotal, vtotal, depth;
+        struct VideoModeTable *vmode_entry;
         struct viafb_par *ppar = info->par;
-        u32 long_refresh;
+        u32 long_refresh, line;
 
         DEBUG_MSG(KERN_INFO "viafb_check_var!\n");
         /* Sanity check */
@@ -107,26 +173,36 @@ static int viafb_check_var(struct fb_var_screeninfo *var,
         if (var->vmode & FB_VMODE_INTERLACED || var->vmode & FB_VMODE_DOUBLE)
                 return -EINVAL;
 
-        vmode_index = viafb_get_mode_index(var->xres, var->yres);
-        if (vmode_index == VIA_RES_INVALID) {
+        vmode_entry = viafb_get_mode(var->xres, var->yres);
+        if (!vmode_entry) {
                 DEBUG_MSG(KERN_INFO
                           "viafb: Mode %dx%dx%d not supported!!\n",
                           var->xres, var->yres, var->bits_per_pixel);
                 return -EINVAL;
         }
 
-        if (24 == var->bits_per_pixel)
-                var->bits_per_pixel = 32;
+        depth = fb_get_color_depth(var, &info->fix);
+        if (!depth)
+                depth = var->bits_per_pixel;
 
-        if (var->bits_per_pixel != 8 && var->bits_per_pixel != 16 &&
-                var->bits_per_pixel != 32)
+        if (depth < 0 || depth > 32)
                 return -EINVAL;
+        else if (!depth)
+                depth = 24;
+        else if (depth == 15 && viafb_dual_fb && ppar->iga_path == IGA1)
+                depth = 15;
+        else if (depth == 30)
+                depth = 30;
+        else if (depth <= 8)
+                depth = 8;
+        else if (depth <= 16)
+                depth = 16;
+        else
+                depth = 24;
 
-        if ((var->xres_virtual * (var->bits_per_pixel >> 3)) & 0x1F)
-                /*32 pixel alignment */
-                var->xres_virtual = (var->xres_virtual + 31) & ~31;
-        if (var->xres_virtual * var->yres_virtual * var->bits_per_pixel / 8 >
-                ppar->memsize)
+        viafb_fill_var_color_info(var, depth);
+        line = (var->xres_virtual * var->bits_per_pixel / 8 + 7) & ~7;
+        if (line * var->yres_virtual > ppar->memsize)
                 return -EINVAL;
 
         /* Based on var passed in to calculate the refresh,
@@ -142,7 +218,7 @@ static int viafb_check_var(struct fb_var_screeninfo *var,
         viafb_refresh = viafb_get_refresh(var->xres, var->yres, long_refresh);
 
         /* Adjust var according to our driver's own table */
-        viafb_fill_var_timing_info(var, viafb_refresh, vmode_index);
+        viafb_fill_var_timing_info(var, viafb_refresh, vmode_entry);
         if (info->var.accel_flags & FB_ACCELF_TEXT &&
                 !ppar->shared->engine_mmio)
                 info->var.accel_flags = 0;
@@ -153,39 +229,45 @@ static int viafb_check_var(struct fb_var_screeninfo *var,
 static int viafb_set_par(struct fb_info *info)
 {
         struct viafb_par *viapar = info->par;
-        int vmode_index;
-        int vmode_index1 = 0;
+        struct VideoModeTable *vmode_entry, *vmode_entry1 = NULL;
         DEBUG_MSG(KERN_INFO "viafb_set_par!\n");
 
         viapar->depth = fb_get_color_depth(&info->var, &info->fix);
-        viafb_update_device_setting(info->var.xres, info->var.yres,
-                              info->var.bits_per_pixel, viafb_refresh, 0);
+        viafb_update_device_setting(viafbinfo->var.xres, viafbinfo->var.yres,
+                viafbinfo->var.bits_per_pixel, viafb_refresh, 0);
 
-        vmode_index = viafb_get_mode_index(info->var.xres, info->var.yres);
-
-        if (viafb_SAMM_ON == 1) {
+        vmode_entry = viafb_get_mode(viafbinfo->var.xres, viafbinfo->var.yres);
+        if (viafb_dual_fb) {
+                vmode_entry1 = viafb_get_mode(viafbinfo1->var.xres,
+                        viafbinfo1->var.yres);
+                viafb_update_device_setting(viafbinfo1->var.xres,
+                        viafbinfo1->var.yres, viafbinfo1->var.bits_per_pixel,
+                        viafb_refresh1, 1);
+        } else if (viafb_SAMM_ON == 1) {
                 DEBUG_MSG(KERN_INFO
                 "viafb_second_xres = %d, viafb_second_yres = %d, bpp = %d\n",
                           viafb_second_xres, viafb_second_yres, viafb_bpp1);
-                vmode_index1 = viafb_get_mode_index(viafb_second_xres,
+                vmode_entry1 = viafb_get_mode(viafb_second_xres,
                         viafb_second_yres);
-                DEBUG_MSG(KERN_INFO "->viafb_SAMM_ON: index=%d\n",
-                        vmode_index1);
 
                 viafb_update_device_setting(viafb_second_xres,
                         viafb_second_yres, viafb_bpp1, viafb_refresh1, 1);
         }
 
-        if (vmode_index != VIA_RES_INVALID) {
+        if (vmode_entry) {
                 viafb_update_fix(info);
-                viafb_bpp = info->var.bits_per_pixel;
+                if (viafb_dual_fb && viapar->iga_path == IGA2)
+                        viafb_bpp1 = info->var.bits_per_pixel;
+                else
+                        viafb_bpp = info->var.bits_per_pixel;
+
                 if (info->var.accel_flags & FB_ACCELF_TEXT)
                         info->flags &= ~FBINFO_HWACCEL_DISABLED;
                 else
                         info->flags |= FBINFO_HWACCEL_DISABLED;
-                viafb_setmode(vmode_index, info->var.xres, info->var.yres,
-                        info->var.bits_per_pixel, vmode_index1,
-                        viafb_second_xres, viafb_second_yres, viafb_bpp1);
+                viafb_setmode(vmode_entry, info->var.bits_per_pixel,
+                        vmode_entry1, viafb_bpp1);
+                viafb_pan_display(&info->var, info);
         }
 
         return 0;
@@ -195,234 +277,52 @@ static int viafb_set_par(struct fb_info *info)
 static int viafb_setcolreg(unsigned regno, unsigned red, unsigned green,
 unsigned blue, unsigned transp, struct fb_info *info)
 {
-        u8 sr1a, sr1b, cr67, cr6a, rev = 0, shift = 10;
-        unsigned cmap_entries = (info->var.bits_per_pixel == 8) ? 256 : 16;
-        DEBUG_MSG(KERN_INFO "viafb_setcolreg!\n");
-        if (regno >= cmap_entries)
-                return 1;
-        if (UNICHROME_CLE266 == viaparinfo->chip_info->gfx_chip_name) {
-                /*
-                 * Read PCI bus 0,dev 0,function 0,index 0xF6 to get chip rev.
-                 */
-                outl(0x80000000 | (0xf6 & ~3), (unsigned long)0xCF8);
-                rev = (inl((unsigned long)0xCFC) >> ((0xf6 & 3) * 8)) & 0xff;
-        }
-        switch (info->var.bits_per_pixel) {
-        case 8:
-                outb(0x1A, 0x3C4);
-                sr1a = inb(0x3C5);
-                outb(0x1B, 0x3C4);
-                sr1b = inb(0x3C5);
-                outb(0x67, 0x3D4);
-                cr67 = inb(0x3D5);
-                outb(0x6A, 0x3D4);
-                cr6a = inb(0x3D5);
-
-                /* Map the 3C6/7/8/9 to the IGA2 */
-                outb(0x1A, 0x3C4);
-                outb(sr1a | 0x01, 0x3C5);
-                /* Second Display Engine colck always on */
-                outb(0x1B, 0x3C4);
-                outb(sr1b | 0x80, 0x3C5);
-                /* Second Display Color Depth 8 */
-                outb(0x67, 0x3D4);
-                outb(cr67 & 0x3F, 0x3D5);
-                outb(0x6A, 0x3D4);
-                /* Second Display Channel Reset CR6A[6]) */
-                outb(cr6a & 0xBF, 0x3D5);
-                /* Second Display Channel Enable CR6A[7] */
-                outb(cr6a | 0x80, 0x3D5);
-                /* Second Display Channel stop reset) */
-                outb(cr6a | 0x40, 0x3D5);
-
-                /* Bit mask of palette */
-                outb(0xFF, 0x3c6);
-                /* Write one register of IGA2 */
-                outb(regno, 0x3C8);
-                if (UNICHROME_CLE266 == viaparinfo->chip_info->gfx_chip_name &&
-                        rev >= 15) {
-                        shift = 8;
-                        viafb_write_reg_mask(CR6A, VIACR, BIT5, BIT5);
-                        viafb_write_reg_mask(SR15, VIASR, BIT7, BIT7);
-                } else {
-                        shift = 10;
-                        viafb_write_reg_mask(CR6A, VIACR, 0, BIT5);
-                        viafb_write_reg_mask(SR15, VIASR, 0, BIT7);
-                }
-                outb(red >> shift, 0x3C9);
-                outb(green >> shift, 0x3C9);
-                outb(blue >> shift, 0x3C9);
-
-                /* Map the 3C6/7/8/9 to the IGA1 */
-                outb(0x1A, 0x3C4);
-                outb(sr1a & 0xFE, 0x3C5);
-                /* Bit mask of palette */
-                outb(0xFF, 0x3c6);
-                /* Write one register of IGA1 */
-                outb(regno, 0x3C8);
-                outb(red >> shift, 0x3C9);
-                outb(green >> shift, 0x3C9);
-                outb(blue >> shift, 0x3C9);
-
-                outb(0x1A, 0x3C4);
-                outb(sr1a, 0x3C5);
-                outb(0x1B, 0x3C4);
-                outb(sr1b, 0x3C5);
-                outb(0x67, 0x3D4);
-                outb(cr67, 0x3D5);
-                outb(0x6A, 0x3D4);
-                outb(cr6a, 0x3D5);
-                break;
-        case 16:
-                ((u32 *) info->pseudo_palette)[regno] = (red & 0xF800) |
-                    ((green & 0xFC00) >> 5) | ((blue & 0xF800) >> 11);
-                break;
-        case 32:
-                ((u32 *) info->pseudo_palette)[regno] =
-                    ((transp & 0xFF00) << 16) |
-                    ((red & 0xFF00) << 8) |
-                    ((green & 0xFF00)) | ((blue & 0xFF00) >> 8);
-                break;
-        }
-
-        return 0;
+        struct viafb_par *viapar = info->par;
+        u32 r, g, b;
 
-}
+        if (info->fix.visual == FB_VISUAL_PSEUDOCOLOR) {
+                if (regno > 255)
+                        return -EINVAL;
 
-/*CALLED BY: fb_set_cmap */
-/*           fb_set_var, pass 256 colors */
-/*CALLED BY: fb_set_cmap */
-/*           fbcon_set_palette, pass 16 colors */
-static int viafb_setcmap(struct fb_cmap *cmap, struct fb_info *info)
-{
-        u32 len = cmap->len;
-        u32 i;
-        u16 *pred = cmap->red;
-        u16 *pgreen = cmap->green;
-        u16 *pblue = cmap->blue;
-        u16 *ptransp = cmap->transp;
-        u8 sr1a, sr1b, cr67, cr6a, rev = 0, shift = 10;
-        if (len > 256)
-                return 1;
-        if (UNICHROME_CLE266 == viaparinfo->chip_info->gfx_chip_name) {
-                /*
-                 * Read PCI bus 0, dev 0, function 0, index 0xF6 to get chip
-                 * rev.
-                 */
-                outl(0x80000000 | (0xf6 & ~3), (unsigned long)0xCF8);
-                rev = (inl((unsigned long)0xCFC) >> ((0xf6 & 3) * 8)) & 0xff;
-        }
-        switch (info->var.bits_per_pixel) {
-        case 8:
-                outb(0x1A, 0x3C4);
-                sr1a = inb(0x3C5);
-                outb(0x1B, 0x3C4);
-                sr1b = inb(0x3C5);
-                outb(0x67, 0x3D4);
-                cr67 = inb(0x3D5);
-                outb(0x6A, 0x3D4);
-                cr6a = inb(0x3D5);
-                /* Map the 3C6/7/8/9 to the IGA2 */
-                outb(0x1A, 0x3C4);
-                outb(sr1a | 0x01, 0x3C5);
-                outb(0x1B, 0x3C4);
-                /* Second Display Engine colck always on */
-                outb(sr1b | 0x80, 0x3C5);
-                outb(0x67, 0x3D4);
-                /* Second Display Color Depth 8 */
-                outb(cr67 & 0x3F, 0x3D5);
-                outb(0x6A, 0x3D4);
-                /* Second Display Channel Reset CR6A[6]) */
-                outb(cr6a & 0xBF, 0x3D5);
-                /* Second Display Channel Enable CR6A[7] */
-                outb(cr6a | 0x80, 0x3D5);
-                /* Second Display Channel stop reset) */
-                outb(cr6a | 0xC0, 0x3D5);
-
-                /* Bit mask of palette */
-                outb(0xFF, 0x3c6);
-                outb(0x00, 0x3C8);
-                if (UNICHROME_CLE266 == viaparinfo->chip_info->gfx_chip_name &&
-                        rev >= 15) {
-                        shift = 8;
-                        viafb_write_reg_mask(CR6A, VIACR, BIT5, BIT5);
-                        viafb_write_reg_mask(SR15, VIASR, BIT7, BIT7);
-                } else {
-                        shift = 10;
-                        viafb_write_reg_mask(CR6A, VIACR, 0, BIT5);
-                        viafb_write_reg_mask(SR15, VIASR, 0, BIT7);
-                }
-                for (i = 0; i < len; i++) {
-                        outb((*(pred + i)) >> shift, 0x3C9);
-                        outb((*(pgreen + i)) >> shift, 0x3C9);
-                        outb((*(pblue + i)) >> shift, 0x3C9);
-                }
+                if (!viafb_dual_fb || viapar->iga_path == IGA1)
+                        viafb_set_primary_color_register(regno, red >> 8,
+                                green >> 8, blue >> 8);
 
-                outb(0x1A, 0x3C4);
-                /* Map the 3C6/7/8/9 to the IGA1 */
-                outb(sr1a & 0xFE, 0x3C5);
-                /* Bit mask of palette */
-                outb(0xFF, 0x3c6);
-                outb(0x00, 0x3C8);
-                for (i = 0; i < len; i++) {
-                        outb((*(pred + i)) >> shift, 0x3C9);
-                        outb((*(pgreen + i)) >> shift, 0x3C9);
-                        outb((*(pblue + i)) >> shift, 0x3C9);
-                }
+                if (!viafb_dual_fb || viapar->iga_path == IGA2)
+                        viafb_set_secondary_color_register(regno, red >> 8,
+                                green >> 8, blue >> 8);
+        } else {
+                if (regno > 15)
+                        return -EINVAL;
 
-                outb(0x1A, 0x3C4);
-                outb(sr1a, 0x3C5);
-                outb(0x1B, 0x3C4);
-                outb(sr1b, 0x3C5);
-                outb(0x67, 0x3D4);
-                outb(cr67, 0x3D5);
-                outb(0x6A, 0x3D4);
-                outb(cr6a, 0x3D5);
-                break;
-        case 16:
-                if (len > 17)
-                        return 0;       /* Because static u32 pseudo_pal[17]; */
-                for (i = 0; i < len; i++)
-                        ((u32 *) info->pseudo_palette)[i] =
-                            (*(pred + i) & 0xF800) |
-                            ((*(pgreen + i) & 0xFC00) >> 5) |
-                            ((*(pblue + i) & 0xF800) >> 11);
-                break;
-        case 32:
-                if (len > 17)
-                        return 0;
-                if (ptransp) {
-                        for (i = 0; i < len; i++)
-                                ((u32 *) info->pseudo_palette)[i] =
-                                    ((*(ptransp + i) & 0xFF00) << 16) |
-                                    ((*(pred + i) & 0xFF00) << 8) |
-                                    ((*(pgreen + i) & 0xFF00)) |
-                                    ((*(pblue + i) & 0xFF00) >> 8);
-                } else {
-                        for (i = 0; i < len; i++)
-                                ((u32 *) info->pseudo_palette)[i] =
-                                    0x00000000 |
-                                    ((*(pred + i) & 0xFF00) << 8) |
-                                    ((*(pgreen + i) & 0xFF00)) |
-                                    ((*(pblue + i) & 0xFF00) >> 8);
-                }
-                break;
+                r = (red >> (16 - info->var.red.length))
+                        << info->var.red.offset;
+                b = (blue >> (16 - info->var.blue.length))
+                        << info->var.blue.offset;
+                g = (green >> (16 - info->var.green.length))
+                        << info->var.green.offset;
+                ((u32 *) info->pseudo_palette)[regno] = r | g | b;
         }
+
         return 0;
 }
 
 static int viafb_pan_display(struct fb_var_screeninfo *var,
         struct fb_info *info)
 {
-        unsigned int offset;
-
-        DEBUG_MSG(KERN_INFO "viafb_pan_display!\n");
-
-        offset = (var->xoffset + (var->yoffset * var->xres_virtual)) *
-            var->bits_per_pixel / 16;
+        struct viafb_par *viapar = info->par;
+        u32 vram_addr = (var->yoffset * var->xres_virtual + var->xoffset)
+                * (var->bits_per_pixel / 8) + viapar->vram_addr;
+
+        DEBUG_MSG(KERN_DEBUG "viafb_pan_display, address = %d\n", vram_addr);
+        if (!viafb_dual_fb) {
+                viafb_set_primary_address(vram_addr);
+                viafb_set_secondary_address(vram_addr);
+        } else if (viapar->iga_path == IGA1)
+                viafb_set_primary_address(vram_addr);
+        else
+                viafb_set_secondary_address(vram_addr);
 
-        DEBUG_MSG(KERN_INFO "\nviafb_pan_display,offset =%d ", offset);
-        viafb_set_primary_address(offset);
         return 0;
 }
 
@@ -476,6 +376,7 @@ static int viafb_ioctl(struct fb_info *info, u_int cmd, u_long arg)
         u32 gpu32;
 
         DEBUG_MSG(KERN_INFO "viafb_ioctl: 0x%X !!\n", cmd);
+        printk(KERN_WARNING "viafb_ioctl: Please avoid this interface as it is unstable and might change or vanish at any time!\n");
         memset(&u, 0, sizeof(u));
 
         switch (cmd) {
@@ -1015,23 +916,6 @@ static int viafb_sync(struct fb_info *info)
         return 0;
 }
 
-int viafb_get_mode_index(int hres, int vres)
-{
-        u32 i;
-        DEBUG_MSG(KERN_INFO "viafb_get_mode_index!\n");
-
-        for (i = 0; i < NUM_TOTAL_MODETABLE; i++)
-                if (CLE266Modes[i].mode_array &&
-                        CLE266Modes[i].crtc[0].crtc.hor_addr == hres &&
-                        CLE266Modes[i].crtc[0].crtc.ver_addr == vres)
-                        break;
-
-        if (i == NUM_TOTAL_MODETABLE)
-                return VIA_RES_INVALID;
-
-        return CLE266Modes[i].ModeIndex;
-}
-
 static void check_available_device_to_enable(int device_id)
 {
         int device_num = 0;
@@ -1330,7 +1214,7 @@ static void retrieve_device_setting(struct viafb_ioctl_setting
         setting_info->lcd_attributes.lcd_mode = viafb_lcd_mode;
 }
 
-static void parse_active_dev(void)
+static int parse_active_dev(void)
 {
         viafb_CRT_ON = STATE_OFF;
         viafb_DVI_ON = STATE_OFF;
@@ -1341,60 +1225,63 @@ static void parse_active_dev(void)
            IGA path to devices in SAMM case. */
         /*    Note: The previous of active_dev is primary device,
            and the following is secondary device. */
-        if (!strncmp(viafb_active_dev, "CRT+DVI", 7)) {
+        if (!viafb_active_dev) {
+                viafb_CRT_ON = STATE_ON;
+                viafb_SAMM_ON = STATE_OFF;
+        } else if (!strcmp(viafb_active_dev, "CRT+DVI")) {
                 /* CRT+DVI */
                 viafb_CRT_ON = STATE_ON;
                 viafb_DVI_ON = STATE_ON;
                 viafb_primary_dev = CRT_Device;
-        } else if (!strncmp(viafb_active_dev, "DVI+CRT", 7)) {
+        } else if (!strcmp(viafb_active_dev, "DVI+CRT")) {
                 /* DVI+CRT */
                 viafb_CRT_ON = STATE_ON;
                 viafb_DVI_ON = STATE_ON;
                 viafb_primary_dev = DVI_Device;
-        } else if (!strncmp(viafb_active_dev, "CRT+LCD", 7)) {
+        } else if (!strcmp(viafb_active_dev, "CRT+LCD")) {
                 /* CRT+LCD */
                 viafb_CRT_ON = STATE_ON;
                 viafb_LCD_ON = STATE_ON;
                 viafb_primary_dev = CRT_Device;
-        } else if (!strncmp(viafb_active_dev, "LCD+CRT", 7)) {
+        } else if (!strcmp(viafb_active_dev, "LCD+CRT")) {
                 /* LCD+CRT */
                 viafb_CRT_ON = STATE_ON;
                 viafb_LCD_ON = STATE_ON;
                 viafb_primary_dev = LCD_Device;
-        } else if (!strncmp(viafb_active_dev, "DVI+LCD", 7)) {
+        } else if (!strcmp(viafb_active_dev, "DVI+LCD")) {
                 /* DVI+LCD */
                 viafb_DVI_ON = STATE_ON;
                 viafb_LCD_ON = STATE_ON;
                 viafb_primary_dev = DVI_Device;
-        } else if (!strncmp(viafb_active_dev, "LCD+DVI", 7)) {
+        } else if (!strcmp(viafb_active_dev, "LCD+DVI")) {
                 /* LCD+DVI */
                 viafb_DVI_ON = STATE_ON;
                 viafb_LCD_ON = STATE_ON;
                 viafb_primary_dev = LCD_Device;
-        } else if (!strncmp(viafb_active_dev, "LCD+LCD2", 8)) {
+        } else if (!strcmp(viafb_active_dev, "LCD+LCD2")) {
                 viafb_LCD_ON = STATE_ON;
                 viafb_LCD2_ON = STATE_ON;
                 viafb_primary_dev = LCD_Device;
-        } else if (!strncmp(viafb_active_dev, "LCD2+LCD", 8)) {
+        } else if (!strcmp(viafb_active_dev, "LCD2+LCD")) {
                 viafb_LCD_ON = STATE_ON;
                 viafb_LCD2_ON = STATE_ON;
                 viafb_primary_dev = LCD2_Device;
-        } else if (!strncmp(viafb_active_dev, "CRT", 3)) {
+        } else if (!strcmp(viafb_active_dev, "CRT")) {
                 /* CRT only */
                 viafb_CRT_ON = STATE_ON;
                 viafb_SAMM_ON = STATE_OFF;
-        } else if (!strncmp(viafb_active_dev, "DVI", 3)) {
+        } else if (!strcmp(viafb_active_dev, "DVI")) {
                 /* DVI only */
                 viafb_DVI_ON = STATE_ON;
                 viafb_SAMM_ON = STATE_OFF;
-        } else if (!strncmp(viafb_active_dev, "LCD", 3)) {
+        } else if (!strcmp(viafb_active_dev, "LCD")) {
                 /* LCD only */
                 viafb_LCD_ON = STATE_ON;
                 viafb_SAMM_ON = STATE_OFF;
-        } else {
-                viafb_CRT_ON = STATE_ON;
-                viafb_SAMM_ON = STATE_OFF;
-        }
+        } else
+                return -EINVAL;
+
+        return 0;
 }
 
 static int parse_port(char *opt_str, int *output_interface)
@@ -1823,35 +1710,37 @@ static void viafb_remove_proc(struct proc_dir_entry *viafb_entry)
         remove_proc_entry("viafb", NULL);
 }
 
-static void parse_mode(const char *str, u32 *xres, u32 *yres)
+static int parse_mode(const char *str, u32 *xres, u32 *yres)
 {
         char *ptr;
 
+        if (!str) {
+                *xres = 640;
+                *yres = 480;
+                return 0;
+        }
+
         *xres = simple_strtoul(str, &ptr, 10);
         if (ptr[0] != 'x')
-                goto out_default;
+                return -EINVAL;
 
         *yres = simple_strtoul(&ptr[1], &ptr, 10);
         if (ptr[0])
-                goto out_default;
-
-        return;
+                return -EINVAL;
 
-out_default:
-        printk(KERN_WARNING "viafb received invalid mode string: %s\n", str);
-        *xres = 640;
-        *yres = 480;
+        return 0;
 }
 
 static int __devinit via_pci_probe(struct pci_dev *pdev,
                                    const struct pci_device_id *ent)
 {
         u32 default_xres, default_yres;
-        int vmode_index;
+        struct VideoModeTable *vmode_entry;
+        struct fb_var_screeninfo default_var;
         u32 viafb_par_length;
 
         DEBUG_MSG(KERN_INFO "VIAFB PCI Probe!!\n");
-
+        memset(&default_var, 0, sizeof(default_var));
         viafb_par_length = ALIGN(sizeof(struct viafb_par), BITS_PER_LONG/8);
 
         /* Allocate fb_info and ***_par here, also including some other needed
@@ -1877,7 +1766,6 @@ static int __devinit via_pci_probe(struct pci_dev *pdev,
 
         if (viafb_dual_fb)
                 viafb_SAMM_ON = 1;
-        parse_active_dev();
         parse_lcd_port();
         parse_dvi_port();
 
@@ -1926,9 +1814,7 @@ static int __devinit via_pci_probe(struct pci_dev *pdev,
         }
 
         parse_mode(viafb_mode, &default_xres, &default_yres);
-        vmode_index = viafb_get_mode_index(default_xres, default_yres);
-        DEBUG_MSG(KERN_INFO "0->index=%d\n", vmode_index);
-
+        vmode_entry = viafb_get_mode(default_xres, default_yres);
         if (viafb_SAMM_ON == 1) {
                 parse_mode(viafb_mode1, &viafb_second_xres,
                         &viafb_second_yres);
@@ -1947,19 +1833,6 @@ static int __devinit via_pci_probe(struct pci_dev *pdev,
                         viafb_second_virtual_yres = viafb_second_yres;
         }
 
-        switch (viafb_bpp) {
-        case 0 ... 8:
-                viafb_bpp = 8;
-                break;
-        case 9 ... 16:
-                viafb_bpp = 16;
-                break;
-        case 17 ... 32:
-                viafb_bpp = 32;
-                break;
-        default:
-                viafb_bpp = 8;
-        }
         default_var.xres = default_xres;
         default_var.yres = default_yres;
         switch (default_xres) {
@@ -1972,8 +1845,6 @@ static int __devinit via_pci_probe(struct pci_dev *pdev,
         }
         default_var.yres_virtual = default_yres;
         default_var.bits_per_pixel = viafb_bpp;
-        if (default_var.bits_per_pixel == 15)
-                default_var.bits_per_pixel = 16;
         default_var.pixclock =
             viafb_get_pixclock(default_xres, default_yres, viafb_refresh);
         default_var.left_margin = (default_xres >> 3) & 0xf8;
@@ -1982,6 +1853,8 @@ static int __devinit via_pci_probe(struct pci_dev *pdev,
         default_var.lower_margin = 4;
         default_var.hsync_len = default_var.left_margin;
         default_var.vsync_len = 4;
+        viafb_setup_fixinfo(&viafbinfo->fix, viaparinfo);
+        viafbinfo->var = default_var;
 
         if (viafb_dual_fb) {
                 viafbinfo1 = framebuffer_alloc(viafb_par_length, &pdev->dev);
@@ -2016,8 +1889,6 @@ static int __devinit via_pci_probe(struct pci_dev *pdev,
                 default_var.yres = viafb_second_yres;
                 default_var.xres_virtual = viafb_second_virtual_xres;
                 default_var.yres_virtual = viafb_second_virtual_yres;
-                if (viafb_bpp1 != viafb_bpp)
-                        viafb_bpp1 = viafb_bpp;
                 default_var.bits_per_pixel = viafb_bpp1;
                 default_var.pixclock =
                     viafb_get_pixclock(viafb_second_xres, viafb_second_yres,
@@ -2037,9 +1908,7 @@ static int __devinit via_pci_probe(struct pci_dev *pdev,
                         &viafbinfo1->fix);
         }
 
-        viafb_setup_fixinfo(&viafbinfo->fix, viaparinfo);
-        viafb_check_var(&default_var, viafbinfo);
-        viafbinfo->var = default_var;
+        viafb_check_var(&viafbinfo->var, viafbinfo);
         viafb_update_fix(viafbinfo);
         viaparinfo->depth = fb_get_color_depth(&viafbinfo->var,
                 &viafbinfo->fix);
@@ -2197,12 +2066,20 @@ static struct pci_driver viafb_driver = {
 
 static int __init viafb_init(void)
 {
+        u32 dummy;
 #ifndef MODULE
         char *option = NULL;
         if (fb_get_options("viafb", &option))
                 return -ENODEV;
         viafb_setup(option);
 #endif
+        if (parse_mode(viafb_mode, &dummy, &dummy)
+                || parse_mode(viafb_mode1, &dummy, &dummy)
+                || viafb_bpp < 0 || viafb_bpp > 32
+                || viafb_bpp1 < 0 || viafb_bpp1 > 32
+                || parse_active_dev())
+                return -EINVAL;
+
         printk(KERN_INFO
        "VIA Graphics Intergration Chipset framebuffer %d.%d initializing\n",
                VERSION_MAJOR, VERSION_MINOR);
@@ -2230,15 +2107,12 @@ static struct fb_ops viafb_ops = {
         .fb_cursor = viafb_cursor,
         .fb_ioctl = viafb_ioctl,
         .fb_sync = viafb_sync,
-        .fb_setcmap = viafb_setcmap,
 };
 
 module_init(viafb_init);
 module_exit(viafb_exit);
 
 #ifdef MODULE
-module_param(viafb_memsize, int, S_IRUSR);
-
 module_param(viafb_mode, charp, S_IRUSR);
 MODULE_PARM_DESC(viafb_mode, "Set resolution (default=640x480)");
 
diff --git a/drivers/video/via/viafbdev.h b/drivers/video/via/viafbdev.h
index 0c94d2441922..61b5953cd159 100644
--- a/drivers/video/via/viafbdev.h
+++ b/drivers/video/via/viafbdev.h
@@ -83,22 +83,16 @@ struct viafb_par {
 
 extern unsigned int viafb_second_virtual_yres;
 extern unsigned int viafb_second_virtual_xres;
-extern unsigned int viafb_second_offset;
-extern int viafb_second_size;
 extern int viafb_SAMM_ON;
 extern int viafb_dual_fb;
 extern int viafb_LCD2_ON;
 extern int viafb_LCD_ON;
 extern int viafb_DVI_ON;
 extern int viafb_hotplug;
-extern int viafb_memsize;
 
 extern int strict_strtoul(const char *cp, unsigned int base,
         unsigned long *res);
 
-void viafb_fill_var_timing_info(struct fb_var_screeninfo *var, int refresh,
-                          int mode_index);
-int viafb_get_mode_index(int hres, int vres);
 u8 viafb_gpio_i2c_read_lvds(struct lvds_setting_information
         *plvds_setting_info, struct lvds_chip_information
         *plvds_chip_info, u8 index);
diff --git a/drivers/video/via/viamode.c b/drivers/video/via/viamode.c
index b74f8a67923c..af50e244016c 100644
--- a/drivers/video/via/viamode.c
+++ b/drivers/video/via/viamode.c
@@ -412,7 +412,7 @@ struct io_reg PM1024x768[] = { {VIASR, 0x16, 0xBF, 0x0C},
 };
 
 struct patch_table res_patch_table[] = {
-        {VIA_RES_1024X768, ARRAY_SIZE(PM1024x768), PM1024x768}
+        {ARRAY_SIZE(PM1024x768), PM1024x768}
 };
 
 /* struct VPITTable {
@@ -879,169 +879,151 @@ struct crt_mode_table CRTM2048x1536[] = {
          {2800, 2048, 2048, 752, 2200, 224, 1592, 1536, 1536, 56, 1539, 4} }
 };
 
-/* Video Mode Table */
-/* struct VideoModeTable {*/
-/*  int                               ModeIndex;*/
-/*  struct crt_mode_table             *crtc;*/
-/*  int                               mode_array;*/
-/* };*/
-struct VideoModeTable CLE266Modes[] = {
+struct VideoModeTable viafb_modes[] = {
         /* Display : 480x640 (GTF) */
-        {VIA_RES_480X640, CRTM480x640, ARRAY_SIZE(CRTM480x640)},
+        {CRTM480x640, ARRAY_SIZE(CRTM480x640)},
 
         /* Display : 640x480 */
-        {VIA_RES_640X480, CRTM640x480, ARRAY_SIZE(CRTM640x480)},
+        {CRTM640x480, ARRAY_SIZE(CRTM640x480)},
 
         /* Display : 720x480 (GTF) */
-        {VIA_RES_720X480, CRTM720x480, ARRAY_SIZE(CRTM720x480)},
+        {CRTM720x480, ARRAY_SIZE(CRTM720x480)},
 
         /* Display : 720x576 (GTF) */
-        {VIA_RES_720X576, CRTM720x576, ARRAY_SIZE(CRTM720x576)},
+        {CRTM720x576, ARRAY_SIZE(CRTM720x576)},
 
         /* Display : 800x600 */
-        {VIA_RES_800X600, CRTM800x600, ARRAY_SIZE(CRTM800x600)},
+        {CRTM800x600, ARRAY_SIZE(CRTM800x600)},
 
         /* Display : 800x480 (CVT) */
-        {VIA_RES_800X480, CRTM800x480, ARRAY_SIZE(CRTM800x480)},
+        {CRTM800x480, ARRAY_SIZE(CRTM800x480)},
 
         /* Display : 848x480 (CVT) */
-        {VIA_RES_848X480, CRTM848x480, ARRAY_SIZE(CRTM848x480)},
+        {CRTM848x480, ARRAY_SIZE(CRTM848x480)},
 
         /* Display : 852x480 (GTF) */
-        {VIA_RES_856X480, CRTM852x480, ARRAY_SIZE(CRTM852x480)},
+        {CRTM852x480, ARRAY_SIZE(CRTM852x480)},
 
         /* Display : 1024x512 (GTF) */
-        {VIA_RES_1024X512, CRTM1024x512, ARRAY_SIZE(CRTM1024x512)},
+        {CRTM1024x512, ARRAY_SIZE(CRTM1024x512)},
 
         /* Display : 1024x600 */
-        {VIA_RES_1024X600, CRTM1024x600, ARRAY_SIZE(CRTM1024x600)},
-
-        /* Display : 1024x576 (GTF) */
-        /*{ VIA_RES_1024X576, CRTM1024x576, ARRAY_SIZE(CRTM1024x576)}, */
+        {CRTM1024x600, ARRAY_SIZE(CRTM1024x600)},
 
         /* Display : 1024x768 */
-        {VIA_RES_1024X768, CRTM1024x768, ARRAY_SIZE(CRTM1024x768)},
+        {CRTM1024x768, ARRAY_SIZE(CRTM1024x768)},
 
         /* Display : 1152x864 */
-        {VIA_RES_1152X864, CRTM1152x864, ARRAY_SIZE(CRTM1152x864)},
+        {CRTM1152x864, ARRAY_SIZE(CRTM1152x864)},
 
         /* Display : 1280x768 (GTF) */
-        {VIA_RES_1280X768, CRTM1280x768, ARRAY_SIZE(CRTM1280x768)},
+        {CRTM1280x768, ARRAY_SIZE(CRTM1280x768)},
 
         /* Display : 960x600 (CVT) */
-        {VIA_RES_960X600, CRTM960x600, ARRAY_SIZE(CRTM960x600)},
+        {CRTM960x600, ARRAY_SIZE(CRTM960x600)},
 
         /* Display : 1000x600 (GTF) */
-        {VIA_RES_1000X600, CRTM1000x600, ARRAY_SIZE(CRTM1000x600)},
+        {CRTM1000x600, ARRAY_SIZE(CRTM1000x600)},
 
         /* Display : 1024x576 (GTF) */
-        {VIA_RES_1024X576, CRTM1024x576, ARRAY_SIZE(CRTM1024x576)},
+        {CRTM1024x576, ARRAY_SIZE(CRTM1024x576)},
 
         /* Display : 1088x612 (GTF) */
-        {VIA_RES_1088X612, CRTM1088x612, ARRAY_SIZE(CRTM1088x612)},
+        {CRTM1088x612, ARRAY_SIZE(CRTM1088x612)},
 
         /* Display : 1152x720 (CVT) */
-        {VIA_RES_1152X720, CRTM1152x720, ARRAY_SIZE(CRTM1152x720)},
+        {CRTM1152x720, ARRAY_SIZE(CRTM1152x720)},
 
         /* Display : 1200x720 (GTF) */
-        {VIA_RES_1200X720, CRTM1200x720, ARRAY_SIZE(CRTM1200x720)},
+        {CRTM1200x720, ARRAY_SIZE(CRTM1200x720)},
 
         /* Display : 1280x600 (GTF) */
-        {VIA_RES_1280X600, CRTM1280x600, ARRAY_SIZE(CRTM1280x600)},
+        {CRTM1280x600, ARRAY_SIZE(CRTM1280x600)},
 
         /* Display : 1280x800 (CVT) */
-        {VIA_RES_1280X800, CRTM1280x800, ARRAY_SIZE(CRTM1280x800)},
-
-        /* Display : 1280x800 (GTF) */
-        /*{ M1280x800, CRTM1280x800, ARRAY_SIZE(CRTM1280x800)}, */
+        {CRTM1280x800, ARRAY_SIZE(CRTM1280x800)},
 
         /* Display : 1280x960 */
-        {VIA_RES_1280X960, CRTM1280x960, ARRAY_SIZE(CRTM1280x960)},
+        {CRTM1280x960, ARRAY_SIZE(CRTM1280x960)},
 
         /* Display : 1280x1024 */
-        {VIA_RES_1280X1024, CRTM1280x1024, ARRAY_SIZE(CRTM1280x1024)},
+        {CRTM1280x1024, ARRAY_SIZE(CRTM1280x1024)},
 
         /* Display : 1360x768 (CVT) */
-        {VIA_RES_1360X768, CRTM1360x768, ARRAY_SIZE(CRTM1360x768)},
-
-        /* Display : 1360x768 (CVT Reduce Blanking) */
-        {VIA_RES_1360X768_RB, CRTM1360x768_RB,
-         ARRAY_SIZE(CRTM1360x768_RB)},
+        {CRTM1360x768, ARRAY_SIZE(CRTM1360x768)},
 
         /* Display : 1366x768 */
-        {VIA_RES_1366X768, CRTM1366x768, ARRAY_SIZE(CRTM1366x768)},
+        {CRTM1366x768, ARRAY_SIZE(CRTM1366x768)},
 
         /* Display : 1368x768 (GTF) */
-        /*{ M1368x768,CRTM1368x768,ARRAY_SIZE(CRTM1368x768)}, */
-        /* Display : 1368x768 (GTF) */
-        {VIA_RES_1368X768, CRTM1368x768, ARRAY_SIZE(CRTM1368x768)},
+        {CRTM1368x768, ARRAY_SIZE(CRTM1368x768)},
 
         /* Display : 1440x900 (CVT) */
-        {VIA_RES_1440X900, CRTM1440x900, ARRAY_SIZE(CRTM1440x900)},
-
-        /* Display : 1440x900 (CVT Reduce Blanking) */
-        {VIA_RES_1440X900_RB, CRTM1440x900_RB,
-         ARRAY_SIZE(CRTM1440x900_RB)},
+        {CRTM1440x900, ARRAY_SIZE(CRTM1440x900)},
 
         /* Display : 1440x1050 (GTF) */
-        {VIA_RES_1440X1050, CRTM1440x1050, ARRAY_SIZE(CRTM1440x1050)},
-
-        /* Display : 1400x1050 (CVT Reduce Blanking) */
-        {VIA_RES_1400X1050_RB, CRTM1400x1050_RB,
-         ARRAY_SIZE(CRTM1400x1050_RB)},
+        {CRTM1440x1050, ARRAY_SIZE(CRTM1440x1050)},
 
         /* Display : 1600x900 (CVT) */
-        {VIA_RES_1600X900, CRTM1600x900, ARRAY_SIZE(CRTM1600x900)},
-
-        /* Display : 1600x900 (CVT Reduce Blanking) */
-        {VIA_RES_1600X900_RB, CRTM1600x900_RB,
-         ARRAY_SIZE(CRTM1600x900_RB)},
+        {CRTM1600x900, ARRAY_SIZE(CRTM1600x900)},
 
         /* Display : 1600x1024 (GTF) */
-        {VIA_RES_1600X1024, CRTM1600x1024, ARRAY_SIZE(CRTM1600x1024)},
+        {CRTM1600x1024, ARRAY_SIZE(CRTM1600x1024)},
 
         /* Display : 1600x1200 */
-        {VIA_RES_1600X1200, CRTM1600x1200, ARRAY_SIZE(CRTM1600x1200)},
+        {CRTM1600x1200, ARRAY_SIZE(CRTM1600x1200)},
 
         /* Display : 1680x1050 (CVT) */
-        {VIA_RES_1680X1050, CRTM1680x1050, ARRAY_SIZE(CRTM1680x1050)},
-
-        /* Display : 1680x1050 (CVT Reduce Blanking) */
-        {VIA_RES_1680X1050_RB, CRTM1680x1050_RB,
-         ARRAY_SIZE(CRTM1680x1050_RB)},
+        {CRTM1680x1050, ARRAY_SIZE(CRTM1680x1050)},
 
         /* Display : 1792x1344 (DMT) */
-        {VIA_RES_1792X1344, CRTM1792x1344, ARRAY_SIZE(CRTM1792x1344)},
+        {CRTM1792x1344, ARRAY_SIZE(CRTM1792x1344)},
 
         /* Display : 1856x1392 (DMT) */
-        {VIA_RES_1856X1392, CRTM1856x1392, ARRAY_SIZE(CRTM1856x1392)},
+        {CRTM1856x1392, ARRAY_SIZE(CRTM1856x1392)},
 
         /* Display : 1920x1440 */
-        {VIA_RES_1920X1440, CRTM1920x1440, ARRAY_SIZE(CRTM1920x1440)},
+        {CRTM1920x1440, ARRAY_SIZE(CRTM1920x1440)},
 
         /* Display : 2048x1536 */
-        {VIA_RES_2048X1536, CRTM2048x1536, ARRAY_SIZE(CRTM2048x1536)},
+        {CRTM2048x1536, ARRAY_SIZE(CRTM2048x1536)},
 
         /* Display : 1280x720 */
-        {VIA_RES_1280X720, CRTM1280x720, ARRAY_SIZE(CRTM1280x720)},
+        {CRTM1280x720, ARRAY_SIZE(CRTM1280x720)},
 
         /* Display : 1920x1080 (CVT) */
-        {VIA_RES_1920X1080, CRTM1920x1080, ARRAY_SIZE(CRTM1920x1080)},
-
-        /* Display : 1920x1080 (CVT Reduce Blanking) */
-        {VIA_RES_1920X1080_RB, CRTM1920x1080_RB,
-         ARRAY_SIZE(CRTM1920x1080_RB)},
+        {CRTM1920x1080, ARRAY_SIZE(CRTM1920x1080)},
 
         /* Display : 1920x1200 (CVT) */
-        {VIA_RES_1920X1200, CRTM1920x1200, ARRAY_SIZE(CRTM1920x1200)},
-
-        /* Display : 1920x1200 (CVT Reduce Blanking) */
-        {VIA_RES_1920X1200_RB, CRTM1920x1200_RB,
-         ARRAY_SIZE(CRTM1920x1200_RB)},
+        {CRTM1920x1200, ARRAY_SIZE(CRTM1920x1200)},
 
         /* Display : 1400x1050 (CVT) */
-        {VIA_RES_1400X1050, CRTM1400x1050, ARRAY_SIZE(CRTM1400x1050)}
+        {CRTM1400x1050, ARRAY_SIZE(CRTM1400x1050)}
 };
+
+struct VideoModeTable viafb_rb_modes[] = {
+        /* Display : 1360x768 (CVT Reduce Blanking) */
+        {CRTM1360x768_RB, ARRAY_SIZE(CRTM1360x768_RB)},
+
+        /* Display : 1440x900 (CVT Reduce Blanking) */
+        {CRTM1440x900_RB, ARRAY_SIZE(CRTM1440x900_RB)},
+
+        /* Display : 1400x1050 (CVT Reduce Blanking) */
+        {CRTM1400x1050_RB, ARRAY_SIZE(CRTM1400x1050_RB)},
+
+        /* Display : 1600x900 (CVT Reduce Blanking) */
+        {CRTM1600x900_RB, ARRAY_SIZE(CRTM1600x900_RB)},
+
+        /* Display : 1680x1050 (CVT Reduce Blanking) */
+        {CRTM1680x1050_RB, ARRAY_SIZE(CRTM1680x1050_RB)},
+
+        /* Display : 1920x1080 (CVT Reduce Blanking) */
+        {CRTM1920x1080_RB, ARRAY_SIZE(CRTM1920x1080_RB)},
+
+        /* Display : 1920x1200 (CVT Reduce Blanking) */
+        {CRTM1920x1200_RB, ARRAY_SIZE(CRTM1920x1200_RB)}
+};
+
 struct crt_mode_table CEAM1280x720[] = {
         {REFRESH_60, CLK_74_270M, M1280X720_CEA_R60_HSP,
          M1280X720_CEA_R60_VSP,
@@ -1056,8 +1038,8 @@ struct crt_mode_table CEAM1920x1080[] = {
 };
 struct VideoModeTable CEA_HDMI_Modes[] = {
         /* Display : 1280x720 */
-        {VIA_RES_1280X720, CEAM1280x720, ARRAY_SIZE(CEAM1280x720)},
-        {VIA_RES_1920X1080, CEAM1920x1080, ARRAY_SIZE(CEAM1920x1080)}
+        {CEAM1280x720, ARRAY_SIZE(CEAM1280x720)},
+        {CEAM1920x1080, ARRAY_SIZE(CEAM1920x1080)}
 };
 
 int NUM_TOTAL_RES_MAP_REFRESH = ARRAY_SIZE(res_map_refresh_tbl);
@@ -1069,4 +1051,28 @@ int NUM_TOTAL_CX700_ModeXregs = ARRAY_SIZE(CX700_ModeXregs);
 int NUM_TOTAL_VX855_ModeXregs = ARRAY_SIZE(VX855_ModeXregs);
 int NUM_TOTAL_CLE266_ModeXregs = ARRAY_SIZE(CLE266_ModeXregs);
 int NUM_TOTAL_PATCH_MODE = ARRAY_SIZE(res_patch_table);
-int NUM_TOTAL_MODETABLE = ARRAY_SIZE(CLE266Modes);
+
+
+struct VideoModeTable *viafb_get_mode(int hres, int vres)
+{
+        u32 i;
+        for (i = 0; i < ARRAY_SIZE(viafb_modes); i++)
+                if (viafb_modes[i].mode_array &&
+                        viafb_modes[i].crtc[0].crtc.hor_addr == hres &&
+                        viafb_modes[i].crtc[0].crtc.ver_addr == vres)
+                        return &viafb_modes[i];
+
+        return NULL;
+}
+
+struct VideoModeTable *viafb_get_rb_mode(int hres, int vres)
+{
+        u32 i;
+        for (i = 0; i < ARRAY_SIZE(viafb_rb_modes); i++)
+                if (viafb_rb_modes[i].mode_array &&
+                        viafb_rb_modes[i].crtc[0].crtc.hor_addr == hres &&
+                        viafb_rb_modes[i].crtc[0].crtc.ver_addr == vres)
+                        return &viafb_rb_modes[i];
+
+        return NULL;
+}
diff --git a/drivers/video/via/viamode.h b/drivers/video/via/viamode.h
index a9d6554fabdf..5b1ced86514b 100644
--- a/drivers/video/via/viamode.h
+++ b/drivers/video/via/viamode.h
@@ -32,13 +32,11 @@ struct VPITTable {
 };
 
 struct VideoModeTable {
-        int ModeIndex;
         struct crt_mode_table *crtc;
         int mode_array;
 };
 
 struct patch_table {
-        int mode_index;
         int table_length;
         struct io_reg *io_reg_table;
 };
@@ -59,13 +57,11 @@ extern int NUM_TOTAL_CX700_ModeXregs;
 extern int NUM_TOTAL_VX855_ModeXregs;
 extern int NUM_TOTAL_CLE266_ModeXregs;
 extern int NUM_TOTAL_PATCH_MODE;
-extern int NUM_TOTAL_MODETABLE;
 
 /********************/
 /* Mode Table       */
 /********************/
 
-extern struct VideoModeTable CLE266Modes[];
 extern struct crt_mode_table CEAM1280x720[];
 extern struct crt_mode_table CEAM1920x1080[];
 extern struct VideoModeTable CEA_HDMI_Modes[];
@@ -81,4 +77,8 @@ extern struct io_reg CLE266_ModeXregs[];
 extern struct io_reg PM1024x768[];
 extern struct patch_table res_patch_table[];
 extern struct VPITTable VPIT;
+
+struct VideoModeTable *viafb_get_mode(int hres, int vres);
+struct VideoModeTable *viafb_get_rb_mode(int hres, int vres);
+
 #endif /* __VIAMODE_H__ */
diff --git a/drivers/w1/masters/ds2482.c b/drivers/w1/masters/ds2482.c
index 406caa6a71cb..e5f74416d4b7 100644
--- a/drivers/w1/masters/ds2482.c
+++ b/drivers/w1/masters/ds2482.c
@@ -214,7 +214,7 @@ static int ds2482_wait_1wire_idle(struct ds2482_data *pdev)
                          (++retries < DS2482_WAIT_IDLE_TIMEOUT));
         }
 
-        if (retries > DS2482_WAIT_IDLE_TIMEOUT)
+        if (retries >= DS2482_WAIT_IDLE_TIMEOUT)
                 printk(KERN_ERR "%s: timeout on channel %d\n",
                        __func__, pdev->channel);
 
diff --git a/drivers/w1/masters/mxc_w1.c b/drivers/w1/masters/mxc_w1.c
index 65244c02551b..492670358cbf 100644
--- a/drivers/w1/masters/mxc_w1.c
+++ b/drivers/w1/masters/mxc_w1.c
@@ -102,7 +102,7 @@ static u8 mxc_w1_ds2_touch_bit(void *data, u8 bit)
         return ((__raw_readb(ctrl_addr)) >> 3) & 0x1;
 }
 
-static int __init mxc_w1_probe(struct platform_device *pdev)
+static int __devinit mxc_w1_probe(struct platform_device *pdev)
 {
         struct mxc_w1_device *mdev;
         struct resource *res;
@@ -166,7 +166,7 @@ failed_clk:
 /*
  * disassociate the w1 device from the driver
  */
-static int mxc_w1_remove(struct platform_device *pdev)
+static int __devexit mxc_w1_remove(struct platform_device *pdev)
 {
         struct mxc_w1_device *mdev = platform_get_drvdata(pdev);
         struct resource *res;
diff --git a/drivers/w1/w1.c b/drivers/w1/w1.c
index acc7e3b7fe17..ad5897dc4495 100644
--- a/drivers/w1/w1.c
+++ b/drivers/w1/w1.c
@@ -986,7 +986,7 @@ int w1_process(void *data)
         return 0;
 }
 
-static int w1_init(void)
+static int __init w1_init(void)
 {
         int retval;
 
@@ -1034,7 +1034,7 @@ err_out_exit_init:
         return retval;
 }
 
-static void w1_fini(void)
+static void __exit w1_fini(void)
 {
         struct w1_master *dev;
 
diff --git a/drivers/zorro/zorro.ids b/drivers/zorro/zorro.ids
index 0c0f99e2dd62..de24e3decedd 100644
--- a/drivers/zorro/zorro.ids
+++ b/drivers/zorro/zorro.ids
@@ -108,7 +108,7 @@
         0c00  500XP/SupraDrive WordSync [SCSI Host Adapter]
         0d00  SupraDrive WordSync II [SCSI Host Adapter]
         1000  2400zi+ [Modem]
-0422  Computer Systems Assosiates
+0422  Computer Systems Associates
         1100  Magnum 40 [Accelerator and SCSI Host Adapter]
         1500  12 Gauge [SCSI Host Adapter]
 0439  Marc Michael Groth
diff --git a/fs/affs/bitmap.c b/fs/affs/bitmap.c
index dc5ef14bdc1c..8306d53307ed 100644
--- a/fs/affs/bitmap.c
+++ b/fs/affs/bitmap.c
@@ -128,7 +128,7 @@ err_range:
 /*
  * Allocate a block in the given allocation zone.
  * Since we have to byte-swap the bitmap on little-endian
- * machines, this is rather expensive. Therefor we will
+ * machines, this is rather expensive. Therefore we will
  * preallocate up to 16 blocks from the same word, if
  * possible. We are not doing preallocations in the
  * header zone, though.
diff --git a/fs/binfmt_elf_fdpic.c b/fs/binfmt_elf_fdpic.c
index 6d6a16c5e9bb..2c32d00a6690 100644
--- a/fs/binfmt_elf_fdpic.c
+++ b/fs/binfmt_elf_fdpic.c
@@ -1374,7 +1374,7 @@ static inline void fill_note(struct memelfnote *note, const char *name, int type
 
 /*
  * fill up all the fields in prstatus from the given task struct, except
- * registers which need to be filled up seperately.
+ * registers which need to be filled up separately.
  */
 static void fill_prstatus(struct elf_prstatus *prstatus,
                           struct task_struct *p, long signr)
diff --git a/fs/bio.c b/fs/bio.c
index dc17afd672e3..e1f922184b45 100644
--- a/fs/bio.c
+++ b/fs/bio.c
@@ -264,13 +264,12 @@ EXPORT_SYMBOL(bio_init);
  * bio_alloc_bioset - allocate a bio for I/O
  * @gfp_mask:   the GFP_ mask given to the slab allocator
  * @nr_iovecs:  number of iovecs to pre-allocate
- * @bs:         the bio_set to allocate from. If %NULL, just use kmalloc
+ * @bs:         the bio_set to allocate from.
  *
  * Description:
- *   bio_alloc_bioset will first try its own mempool to satisfy the allocation.
+ *   bio_alloc_bioset will try its own mempool to satisfy the allocation.
  *   If %__GFP_WAIT is set then we will block on the internal pool waiting
- *   for a &struct bio to become free. If a %NULL @bs is passed in, we will
- *   fall back to just using @kmalloc to allocate the required memory.
+ *   for a &struct bio to become free.
  *
  *   Note that the caller must set ->bi_destructor on successful return
  *   of a bio, to do the appropriate freeing of the bio once the reference
diff --git a/fs/btrfs/disk-io.c b/fs/btrfs/disk-io.c
index 2b59201b955c..0427183e3e05 100644
--- a/fs/btrfs/disk-io.c
+++ b/fs/btrfs/disk-io.c
@@ -901,7 +901,7 @@ static int __setup_root(u32 nodesize, u32 leafsize, u32 sectorsize,
         root->highest_objectid = 0;
         root->name = NULL;
         root->in_sysfs = 0;
-        root->inode_tree.rb_node = NULL;
+        root->inode_tree = RB_ROOT;
 
         INIT_LIST_HEAD(&root->dirty_list);
         INIT_LIST_HEAD(&root->orphan_list);
@@ -1673,7 +1673,7 @@ struct btrfs_root *open_ctree(struct super_block *sb,
         insert_inode_hash(fs_info->btree_inode);
 
         spin_lock_init(&fs_info->block_group_cache_lock);
-        fs_info->block_group_cache_tree.rb_node = NULL;
+        fs_info->block_group_cache_tree = RB_ROOT;
 
         extent_io_tree_init(&fs_info->freed_extents[0],
                              fs_info->btree_inode->i_mapping, GFP_NOFS);
diff --git a/fs/btrfs/extent_io.c b/fs/btrfs/extent_io.c
index b177ed319612..7073cbb1b2d4 100644
--- a/fs/btrfs/extent_io.c
+++ b/fs/btrfs/extent_io.c
@@ -104,8 +104,8 @@ void extent_io_exit(void)
 void extent_io_tree_init(struct extent_io_tree *tree,
                           struct address_space *mapping, gfp_t mask)
 {
-        tree->state.rb_node = NULL;
-        tree->buffer.rb_node = NULL;
+        tree->state = RB_ROOT;
+        tree->buffer = RB_ROOT;
         tree->ops = NULL;
         tree->dirty_bytes = 0;
         spin_lock_init(&tree->lock);
diff --git a/fs/btrfs/extent_map.c b/fs/btrfs/extent_map.c
index 428fcac45f90..28d87ba60ce8 100644
--- a/fs/btrfs/extent_map.c
+++ b/fs/btrfs/extent_map.c
@@ -35,7 +35,7 @@ void extent_map_exit(void)
  */
 void extent_map_tree_init(struct extent_map_tree *tree, gfp_t mask)
 {
-        tree->map.rb_node = NULL;
+        tree->map = RB_ROOT;
         rwlock_init(&tree->lock);
 }
 
diff --git a/fs/btrfs/free-space-cache.c b/fs/btrfs/free-space-cache.c
index cb2849f03251..dd831ed31eea 100644
--- a/fs/btrfs/free-space-cache.c
+++ b/fs/btrfs/free-space-cache.c
@@ -870,7 +870,7 @@ __btrfs_return_cluster_to_free_space(
                 tree_insert_offset(&block_group->free_space_offset,
                                    entry->offset, &entry->offset_index, 0);
         }
-        cluster->root.rb_node = NULL;
+        cluster->root = RB_ROOT;
 
 out:
         spin_unlock(&cluster->lock);
@@ -1355,7 +1355,7 @@ void btrfs_init_free_cluster(struct btrfs_free_cluster *cluster)
 {
         spin_lock_init(&cluster->lock);
         spin_lock_init(&cluster->refill_lock);
-        cluster->root.rb_node = NULL;
+        cluster->root = RB_ROOT;
         cluster->max_size = 0;
         cluster->points_to_bitmap = false;
         INIT_LIST_HEAD(&cluster->block_group_list);
diff --git a/fs/btrfs/ordered-data.h b/fs/btrfs/ordered-data.h
index 1fe1282ef47c..9116c6d0c5a9 100644
--- a/fs/btrfs/ordered-data.h
+++ b/fs/btrfs/ordered-data.h
@@ -129,7 +129,7 @@ static inline void
 btrfs_ordered_inode_tree_init(struct btrfs_ordered_inode_tree *t)
 {
         mutex_init(&t->mutex);
-        t->tree.rb_node = NULL;
+        t->tree = RB_ROOT;
         t->last = NULL;
 }
 
diff --git a/fs/btrfs/ref-cache.h b/fs/btrfs/ref-cache.h
index bc283ad2db73..e2a55cb2072b 100644
--- a/fs/btrfs/ref-cache.h
+++ b/fs/btrfs/ref-cache.h
@@ -52,7 +52,7 @@ static inline size_t btrfs_leaf_ref_size(int nr_extents)
 
 static inline void btrfs_leaf_ref_tree_init(struct btrfs_leaf_ref_tree *tree)
 {
-        tree->root.rb_node = NULL;
+        tree->root = RB_ROOT;
         INIT_LIST_HEAD(&tree->list);
         spin_lock_init(&tree->lock);
 }
diff --git a/fs/btrfs/relocation.c b/fs/btrfs/relocation.c
index ab7ab5318745..0109e5606bad 100644
--- a/fs/btrfs/relocation.c
+++ b/fs/btrfs/relocation.c
@@ -170,14 +170,14 @@ struct async_merge {
 
 static void mapping_tree_init(struct mapping_tree *tree)
 {
-        tree->rb_root.rb_node = NULL;
+        tree->rb_root = RB_ROOT;
         spin_lock_init(&tree->lock);
 }
 
 static void backref_cache_init(struct backref_cache *cache)
 {
         int i;
-        cache->rb_root.rb_node = NULL;
+        cache->rb_root = RB_ROOT;
         for (i = 0; i < BTRFS_MAX_LEVEL; i++)
                 INIT_LIST_HEAD(&cache->pending[i]);
         spin_lock_init(&cache->lock);
diff --git a/fs/btrfs/super.c b/fs/btrfs/super.c
index 8a1ea6e64575..f8b4521de907 100644
--- a/fs/btrfs/super.c
+++ b/fs/btrfs/super.c
@@ -128,7 +128,7 @@ int btrfs_parse_options(struct btrfs_root *root, char *options)
 {
         struct btrfs_fs_info *info = root->fs_info;
         substring_t args[MAX_OPT_ARGS];
-        char *p, *num;
+        char *p, *num, *orig;
         int intarg;
         int ret = 0;
 
@@ -143,6 +143,7 @@ int btrfs_parse_options(struct btrfs_root *root, char *options)
         if (!options)
                 return -ENOMEM;
 
+        orig = options;
 
         while ((p = strsep(&options, ",")) != NULL) {
                 int token;
@@ -280,7 +281,7 @@ int btrfs_parse_options(struct btrfs_root *root, char *options)
                 }
         }
 out:
-        kfree(options);
+        kfree(orig);
         return ret;
 }
 
diff --git a/fs/btrfs/transaction.c b/fs/btrfs/transaction.c
index b2acc79f1b34..2a36e236a492 100644
--- a/fs/btrfs/transaction.c
+++ b/fs/btrfs/transaction.c
@@ -69,7 +69,7 @@ static noinline int join_transaction(struct btrfs_root *root)
                 cur_trans->commit_done = 0;
                 cur_trans->start_time = get_seconds();
 
-                cur_trans->delayed_refs.root.rb_node = NULL;
+                cur_trans->delayed_refs.root = RB_ROOT;
                 cur_trans->delayed_refs.num_entries = 0;
                 cur_trans->delayed_refs.num_heads_ready = 0;
                 cur_trans->delayed_refs.num_heads = 0;
diff --git a/fs/buffer.c b/fs/buffer.c
index 6fa530256bfd..c9c266db0624 100644
--- a/fs/buffer.c
+++ b/fs/buffer.c
@@ -2893,7 +2893,7 @@ int block_write_full_page_endio(struct page *page, get_block_t *get_block,
 
         /*
          * The page straddles i_size.  It must be zeroed out on each and every
-         * writepage invokation because it may be mmapped.  "A file is mapped
+         * writepage invocation because it may be mmapped.  "A file is mapped
          * in multiples of the page size.  For a file that is not a multiple of
          * the  page size, the remaining memory is zeroed when mapped, and
          * writes to that region are not written out to the file."
@@ -3265,7 +3265,7 @@ static void recalc_bh_state(void)
         
 struct buffer_head *alloc_buffer_head(gfp_t gfp_flags)
 {
-        struct buffer_head *ret = kmem_cache_alloc(bh_cachep, gfp_flags);
+        struct buffer_head *ret = kmem_cache_zalloc(bh_cachep, gfp_flags);
         if (ret) {
                 INIT_LIST_HEAD(&ret->b_assoc_buffers);
                 get_cpu_var(bh_accounting).nr++;
@@ -3352,15 +3352,6 @@ int bh_submit_read(struct buffer_head *bh)
 }
 EXPORT_SYMBOL(bh_submit_read);
 
-static void
-init_buffer_head(void *data)
-{
-        struct buffer_head *bh = data;
-
-        memset(bh, 0, sizeof(*bh));
-        INIT_LIST_HEAD(&bh->b_assoc_buffers);
-}
-
 void __init buffer_init(void)
 {
         int nrpages;
@@ -3369,7 +3360,7 @@ void __init buffer_init(void)
                         sizeof(struct buffer_head), 0,
                                 (SLAB_RECLAIM_ACCOUNT|SLAB_PANIC|
                                 SLAB_MEM_SPREAD),
-                                init_buffer_head);
+                                NULL);
 
         /*
          * Limit the bh occupancy to 10% of ZONE_NORMAL
diff --git a/fs/cifs/asn1.c b/fs/cifs/asn1.c
index 20692fbfdb24..a20bea598933 100644
--- a/fs/cifs/asn1.c
+++ b/fs/cifs/asn1.c
@@ -136,7 +136,7 @@ asn1_enum_decode(struct asn1_ctx *ctx, __le32 *val)
                 return 0;
         }
 
-        ch = *(ctx->pointer)++; /* ch has 0xa, ptr points to lenght octet */
+        ch = *(ctx->pointer)++; /* ch has 0xa, ptr points to length octet */
         if ((ch) == ASN1_ENUM)  /* if ch value is ENUM, 0xa */
                 *val = *(++(ctx->pointer)); /* value has enum value */
         else
diff --git a/fs/cifs/cifs_dfs_ref.c b/fs/cifs/cifs_dfs_ref.c
index b44ce0a0711c..b1d61d0bdfc7 100644
--- a/fs/cifs/cifs_dfs_ref.c
+++ b/fs/cifs/cifs_dfs_ref.c
@@ -54,7 +54,7 @@ void cifs_dfs_release_automount_timer(void)
  * Extracts sharename form full UNC.
  * i.e. strips from UNC trailing path that is not part of share
  * name and fixup missing '\' in the begining of DFS node refferal
- * if neccessary.
+ * if necessary.
  * Returns pointer to share name on success or ERR_PTR on error.
  * Caller is responsible for freeing returned string.
  */
diff --git a/fs/cifs/cifssmb.c b/fs/cifs/cifssmb.c
index 9d17df3e0768..611835899844 100644
--- a/fs/cifs/cifssmb.c
+++ b/fs/cifs/cifssmb.c
@@ -3886,7 +3886,7 @@ parse_DFS_referrals(TRANSACTION2_GET_DFS_REFER_RSP *pSMBr,
                 goto parse_DFS_referrals_exit;
         }
 
-        /* collect neccessary data from referrals */
+        /* collect necessary data from referrals */
         for (i = 0; i < *num_of_nodes; i++) {
                 char *temp;
                 int max_len;
diff --git a/fs/compat.c b/fs/compat.c
index 00d90c2e66f0..030602d453b7 100644
--- a/fs/compat.c
+++ b/fs/compat.c
@@ -1795,6 +1795,24 @@ asmlinkage long compat_sys_select(int n, compat_ulong_t __user *inp,
         return ret;
 }
 
+struct compat_sel_arg_struct {
+        compat_ulong_t n;
+        compat_uptr_t inp;
+        compat_uptr_t outp;
+        compat_uptr_t exp;
+        compat_uptr_t tvp;
+};
+
+asmlinkage long compat_sys_old_select(struct compat_sel_arg_struct __user *arg)
+{
+        struct compat_sel_arg_struct a;
+
+        if (copy_from_user(&a, arg, sizeof(a)))
+                return -EFAULT;
+        return compat_sys_select(a.n, compat_ptr(a.inp), compat_ptr(a.outp),
+                                 compat_ptr(a.exp), compat_ptr(a.tvp));
+}
+
 #ifdef HAVE_SET_RESTORE_SIGMASK
 static long do_compat_pselect(int n, compat_ulong_t __user *inp,
         compat_ulong_t __user *outp, compat_ulong_t __user *exp,
diff --git a/fs/dlm/member.c b/fs/dlm/member.c
index 84f70bfb0baf..b12532e553f8 100644
--- a/fs/dlm/member.c
+++ b/fs/dlm/member.c
@@ -312,7 +312,7 @@ int dlm_ls_stop(struct dlm_ls *ls)
         /*
          * This in_recovery lock does two things:
          * 1) Keeps this function from returning until all threads are out
-         *    of locking routines and locking is truely stopped.
+         *    of locking routines and locking is truly stopped.
          * 2) Keeps any new requests from being processed until it's unlocked
          *    when recovery is complete.
          */
diff --git a/fs/ext3/super.c b/fs/ext3/super.c
index e844accbf55d..1bee604cc6cd 100644
--- a/fs/ext3/super.c
+++ b/fs/ext3/super.c
@@ -164,7 +164,7 @@ void ext3_msg(struct super_block *sb, const char *prefix,
  * write out the superblock safely.
  *
  * We'll just use the journal_abort() error code to record an error in
- * the journal instead.  On recovery, the journal will compain about
+ * the journal instead.  On recovery, the journal will complain about
  * that error until we've noted it down and cleared it.
  */
 
diff --git a/fs/ext4/mballoc.c b/fs/ext4/mballoc.c
index 506713a2ebd8..54df209d2eed 100644
--- a/fs/ext4/mballoc.c
+++ b/fs/ext4/mballoc.c
@@ -69,7 +69,7 @@
  *
  * pa_lstart -> the logical start block for this prealloc space
  * pa_pstart -> the physical start block for this prealloc space
- * pa_len    -> lenght for this prealloc space
+ * pa_len    -> length for this prealloc space
  * pa_free   ->  free space available in this prealloc space
  *
  * The inode preallocation space is used looking at the _logical_ start
diff --git a/fs/ext4/super.c b/fs/ext4/super.c
index ce84a6ed4a48..ba191dae8730 100644
--- a/fs/ext4/super.c
+++ b/fs/ext4/super.c
@@ -302,7 +302,7 @@ void ext4_journal_abort_handle(const char *caller, const char *err_fn,
  * write out the superblock safely.
  *
  * We'll just use the jbd2_journal_abort() error code to record an error in
- * the journal instead.  On recovery, the journal will compain about
+ * the journal instead.  On recovery, the journal will complain about
  * that error until we've noted it down and cleared it.
  */
 
diff --git a/fs/fuse/inode.c b/fs/fuse/inode.c
index 1a822ce2b24b..ec14d19ce501 100644
--- a/fs/fuse/inode.c
+++ b/fs/fuse/inode.c
@@ -850,7 +850,7 @@ static void fuse_send_init(struct fuse_conn *fc, struct fuse_req *req)
         req->in.args[0].size = sizeof(*arg);
         req->in.args[0].value = arg;
         req->out.numargs = 1;
-        /* Variable length arguement used for backward compatibility
+        /* Variable length argument used for backward compatibility
            with interface version < 7.5.  Rest of init_out is zeroed
            by do_get_request(), so a short reply is not a problem */
         req->out.argvar = 1;
diff --git a/fs/gfs2/ops_fstype.c b/fs/gfs2/ops_fstype.c
index a054b526dc08..c1309ed1c496 100644
--- a/fs/gfs2/ops_fstype.c
+++ b/fs/gfs2/ops_fstype.c
@@ -1001,7 +1001,7 @@ static const struct lm_lockops nolock_ops = {
 /**
  * gfs2_lm_mount - mount a locking protocol
  * @sdp: the filesystem
- * @args: mount arguements
+ * @args: mount arguments
  * @silent: if 1, don't complain if the FS isn't a GFS2 fs
  *
  * Returns: errno
diff --git a/fs/jbd/transaction.c b/fs/jbd/transaction.c
index 99e9fea11077..5ae71e75a491 100644
--- a/fs/jbd/transaction.c
+++ b/fs/jbd/transaction.c
@@ -1398,7 +1398,7 @@ int journal_stop(handle_t *handle)
          * the case where our storage is so fast that it is more optimal to go
          * ahead and force a flush and wait for the transaction to be committed
          * than it is to wait for an arbitrary amount of time for new writers to
-         * join the transaction.  We acheive this by measuring how long it takes
+         * join the transaction.  We achieve this by measuring how long it takes
          * to commit a transaction, and compare it with how long this
          * transaction has been running, and if run time < commit time then we
          * sleep for the delta and commit.  This greatly helps super fast disks
diff --git a/fs/locks.c b/fs/locks.c
index ae9ded026b7c..ab24d49fc048 100644
--- a/fs/locks.c
+++ b/fs/locks.c
@@ -1455,7 +1455,7 @@ EXPORT_SYMBOL(generic_setlease);
  *      leases held by processes on this node.
  *
  *      There is also no break_lease method; filesystems that
- *      handle their own leases shoud break leases themselves from the
+ *      handle their own leases should break leases themselves from the
  *      filesystem's open, create, and (on truncate) setattr methods.
  *
  *      Warning: the only current setlease methods exist only to disable
diff --git a/fs/mpage.c b/fs/mpage.c
index 42381bd6543b..598d54e200eb 100644
--- a/fs/mpage.c
+++ b/fs/mpage.c
@@ -561,7 +561,7 @@ page_is_mapped:
         if (page->index >= end_index) {
                 /*
                  * The page straddles i_size.  It must be zeroed out on each
-                 * and every writepage invokation because it may be mmapped.
+                 * and every writepage invocation because it may be mmapped.
                  * "A file is mapped in multiples of the page size.  For a file
                  * that is not a multiple of the page size, the remaining memory
                  * is zeroed when mapped, and writes to that region are not
diff --git a/fs/namei.c b/fs/namei.c
index 48e60a187325..1c0fca6e899e 100644
--- a/fs/namei.c
+++ b/fs/namei.c
@@ -2544,7 +2544,7 @@ SYSCALL_DEFINE2(link, const char __user *, oldname, const char __user *, newname
  *      e) conversion from fhandle to dentry may come in the wrong moment - when
  *         we are removing the target. Solution: we will have to grab ->i_mutex
  *         in the fhandle_to_dentry code. [FIXME - current nfsfh.c relies on
- *         ->i_mutex on parents, which works but leads to some truely excessive
+ *         ->i_mutex on parents, which works but leads to some truly excessive
  *         locking].
  */
 static int vfs_rename_dir(struct inode *old_dir, struct dentry *old_dentry,
diff --git a/fs/nfsd/nfs4xdr.c b/fs/nfsd/nfs4xdr.c
index 78c7e24e5129..c47b4d7bafa7 100644
--- a/fs/nfsd/nfs4xdr.c
+++ b/fs/nfsd/nfs4xdr.c
@@ -1528,7 +1528,7 @@ static void write_cinfo(__be32 **p, struct nfsd4_change_info *c)
         } } while (0);
 
 /* Encode as an array of strings the string given with components
- * seperated @sep.
+ * separated @sep.
  */
 static __be32 nfsd4_encode_components(char sep, char *components,
                                    __be32 **pp, int *buflen)
diff --git a/fs/ntfs/ChangeLog b/fs/ntfs/ChangeLog
deleted file mode 100644
index 37c11e194372..000000000000
--- a/fs/ntfs/ChangeLog
+++ /dev/null
@@ -1,1702 +0,0 @@
-ToDo/Notes:
-        - Find and fix bugs.
-        - The only places in the kernel where a file is resized are
-          ntfs_file_write*() and ntfs_truncate() for both of which i_mutex is
-          held.  Just have to be careful in read-/writepage and other helpers
-          not running under i_mutex that we play nice.  Also need to be careful
-          with initialized_size extension in ntfs_file_write*() and writepage.
-          UPDATE: The only things that need to be checked are the compressed
-          write and the other attribute resize/write cases like index
-          attributes, etc.  For now none of these are implemented so are safe.
-        - Implement filling in of holes in aops.c::ntfs_writepage() and its
-          helpers.
-        - Implement mft.c::sync_mft_mirror_umount().  We currently will just
-          leave the volume dirty on umount if the final iput(vol->mft_ino)
-          causes a write of any mirrored mft records due to the mft mirror
-          inode having been discarded already.  Whether this can actually ever
-          happen is unclear however so it is worth waiting until someone hits
-          the problem.
-
-2.1.29 - Fix a deadlock at mount time.
-
-        - During mount the VFS holds s_umount lock on the superblock.  So when
-          we try to empty the journal $LogFile contents by calling
-          ntfs_attr_set() when the machine does not have much memory and the
-          journal is large ntfs_attr_set() results in the VM trying to balance
-          dirty pages which in turn tries to that the s_umount lock and thus we
-          get a deadlock.  The solution is to not use ntfs_attr_set() and
-          instead do the zeroing by hand at the block level rather than page
-          cache level.
-        - Fix sparse warnings.
-
-2.1.28 - Fix a deadlock.
-
-        - Fix deadlock in fs/ntfs/inode.c::ntfs_put_inode().  Thanks to Sergey
-          Vlasov for the report and detailed analysis of the deadlock.  The fix
-          involved getting rid of ntfs_put_inode() altogether and hence NTFS no
-          longer has a ->put_inode super operation.
-
-2.1.27 - Various bug fixes and cleanups.
-
-        - Fix two compiler warnings on Alpha.  Thanks to Andrew Morton for
-          reporting them.
-        - Fix an (innocent) off-by-one error in the runlist code.
-        - Fix a buggette in an "should be impossible" case handling where we
-          continued the attribute lookup loop instead of aborting it.
-        - Use buffer_migrate_page() for the ->migratepage function of all ntfs
-          address space operations.
-        - Fix comparison of $MFT and $MFTMirr to not bail out when there are
-          unused, invalid mft records which are the same in both $MFT and
-          $MFTMirr.
-        - Add support for sparse files which have a compression unit of 0.
-        - Remove all the make_bad_inode() calls.  This should only be called
-          from read inode and new inode code paths.
-        - Limit name length in fs/ntfs/unistr.c::ntfs_nlstoucs() to maximum
-          allowed by NTFS, i.e. 255 Unicode characters, not including the
-          terminating NULL (which is not stored on disk).
-        - Improve comments on file attribute flags in fs/ntfs/layout.h.
-        - Fix a bug in fs/ntfs/inode.c::ntfs_read_locked_index_inode() where we
-          forgot to update a temporary variable so loading index inodes which
-          have an index allocation attribute failed.
-        - Add a missing call to flush_dcache_mft_record_page() in
-          fs/ntfs/inode.c::ntfs_write_inode().
-        - Handle the recently introduced -ENAMETOOLONG return value from
-          fs/ntfs/unistr.c::ntfs_nlstoucs() in fs/ntfs/namei.c::ntfs_lookup().
-        - Semaphore to mutex conversion.  (Ingo Molnar)
-
-2.1.26 - Minor bug fixes and updates.
-
-        - Fix a potential overflow in file.c where a cast to s64 was missing in
-          a left shift of a page index.
-        - The struct inode has had its i_sem semaphore changed to a mutex named
-          i_mutex.
-        - We have struct kmem_cache now so use it instead of the typedef
-          kmem_cache_t.  (Pekka Enberg)
-        - Implement support for sector sizes above 512 bytes (up to the maximum
-          supported by NTFS which is 4096 bytes).
-        - Do more detailed reporting of why we cannot mount read-write by
-          special casing the VOLUME_MODIFIED_BY_CHKDSK flag.
-        - Miscellaneous updates to layout.h.
-        - Cope with attribute list attribute having invalid flags.  Windows
-          copes with this and even chkdsk does not detect or fix this so we
-          have to cope with it, too.  Thanks to Pawel Kot for reporting the
-          problem.
-
-2.1.25 - (Almost) fully implement write(2) and truncate(2).
-
-        - Change ntfs_map_runlist_nolock(), ntfs_attr_find_vcn_nolock() and
-          {__,}ntfs_cluster_free() to also take an optional attribute search
-          context as argument.  This allows calling these functions with the
-          mft record mapped.  Update all callers.
-        - Fix potential deadlock in ntfs_mft_data_extend_allocation_nolock()
-          error handling by passing in the active search context when calling
-          ntfs_cluster_free().
-        - Change ntfs_cluster_alloc() to take an extra boolean parameter
-          specifying whether the cluster are being allocated to extend an
-          attribute or to fill a hole.
-        - Change ntfs_attr_make_non_resident() to call ntfs_cluster_alloc()
-          with @is_extension set to TRUE and remove the runlist terminator
-          fixup code as this is now done by ntfs_cluster_alloc().
-        - Change ntfs_attr_make_non_resident to take the attribute value size
-          as an extra parameter.  This is needed since we need to know the size
-          before we can map the mft record and our callers always know it.  The
-          reason we cannot simply read the size from the vfs inode i_size is
-          that this is not necessarily uptodate.  This happens when
-          ntfs_attr_make_non_resident() is called in the ->truncate call path.
-        - Fix ntfs_attr_make_non_resident() to update the vfs inode i_blocks
-          which is zero for a resident attribute but should no longer be zero
-          once the attribute is non-resident as it then has real clusters
-          allocated.
-        - Add fs/ntfs/attrib.[hc]::ntfs_attr_extend_allocation(), a function to
-          extend the allocation of an attributes.  Optionally, the data size,
-          but not the initialized size can be extended, too.
-        - Implement fs/ntfs/inode.[hc]::ntfs_truncate().  It only supports
-          uncompressed and unencrypted files and it never creates sparse files
-          at least for the moment (making a file sparse requires us to modify
-          its directory entries and we do not support directory operations at
-          the moment).  Also, support for highly fragmented files, i.e. ones
-          whose data attribute is split across multiple extents, is severly
-          limited.  When such a case is encountered, EOPNOTSUPP is returned.
-        - Enable ATTR_SIZE attribute changes in ntfs_setattr().  This completes
-          the initial implementation of file truncation.  Now both open(2)ing
-          a file with the O_TRUNC flag and the {,f}truncate(2) system calls
-          will resize a file appropriately.  The limitations are that only
-          uncompressed and unencrypted files are supported.  Also, there is
-          only very limited support for highly fragmented files (the ones whose
-          $DATA attribute is split into multiple attribute extents).
-        - In attrib.c::ntfs_attr_set() call balance_dirty_pages_ratelimited()
-          and cond_resched() in the main loop as we could be dirtying a lot of
-          pages and this ensures we play nice with the VM and the system as a
-          whole.
-        - Implement file operations ->write, ->aio_write, ->writev for regular
-          files.  This replaces the old use of generic_file_write(), et al and
-          the address space operations ->prepare_write and ->commit_write.
-          This means that both sparse and non-sparse (unencrypted and
-          uncompressed) files can now be extended using the normal write(2)
-          code path.  There are two limitations at present and these are that
-          we never create sparse files and that we only have limited support
-          for highly fragmented files, i.e. ones whose data attribute is split
-          across multiple extents.   When such a case is encountered,
-          EOPNOTSUPP is returned.
-        - $EA attributes can be both resident and non-resident.
-        - Use %z for size_t to fix compilation warnings.  (Andrew Morton)
-        - Fix compilation warnings with gcc-4.0.2 on SUSE 10.0.
-        - Document extended attribute ($EA) NEED_EA flag.  (Based on libntfs
-          patch by Yura Pakhuchiy.)
-
-2.1.24 - Lots of bug fixes and support more clean journal states.
-
-        - Support journals ($LogFile) which have been modified by chkdsk.  This
-          means users can boot into Windows after we marked the volume dirty.
-          The Windows boot will run chkdsk and then reboot.  The user can then
-          immediately boot into Linux rather than having to do a full Windows
-          boot first before rebooting into Linux and we will recognize such a
-          journal and empty it as it is clean by definition.  Note, this only
-          works if chkdsk left the journal in an obviously clean state.
-        - Support journals ($LogFile) with only one restart page as well as
-          journals with two different restart pages.  We sanity check both and
-          either use the only sane one or the more recent one of the two in the
-          case that both are valid.
-        - Add fs/ntfs/malloc.h::ntfs_malloc_nofs_nofail() which is analogous to
-          ntfs_malloc_nofs() but it performs allocations with __GFP_NOFAIL and
-          hence cannot fail.
-        - Use ntfs_malloc_nofs_nofail() in the two critical regions in
-          fs/ntfs/runlist.c::ntfs_runlists_merge().  This means we no longer
-          need to panic() if the allocation fails as it now cannot fail.
-        - Fix two nasty runlist merging bugs that had gone unnoticed so far.
-          Thanks to Stefano Picerno for the bug report.
-        - Remove two bogus BUG_ON()s from fs/ntfs/mft.c.
-        - Fix handling of valid but empty mapping pairs array in
-          fs/ntfs/runlist.c::ntfs_mapping_pairs_decompress().
-        - Report unrepresentable inodes during ntfs_readdir() as KERN_WARNING
-          messages and include the inode number.  Thanks to Yura Pakhuchiy for
-          pointing this out.
-        - Change ntfs_rl_truncate_nolock() to throw away the runlist if the new
-          length is zero.
-        - Add runlist.[hc]::ntfs_rl_punch_nolock() which punches a caller
-          specified hole into a runlist.
-        - Fix a bug in fs/ntfs/index.c::ntfs_index_lookup().  When the returned
-          index entry is in the index root, we forgot to set the @ir pointer in
-          the index context.  Thanks to Yura Pakhuchiy for finding this bug.
-        - Remove bogus setting of PageError in ntfs_read_compressed_block().
-        - Add fs/ntfs/attrib.[hc]::ntfs_resident_attr_value_resize().
-        - Fix a bug in ntfs_map_runlist_nolock() where we forgot to protect
-          access to the allocated size in the ntfs inode with the size lock.
-        - Fix ntfs_attr_vcn_to_lcn_nolock() and ntfs_attr_find_vcn_nolock() to
-          return LCN_ENOENT when there is no runlist and the allocated size is
-          zero.
-        - Fix load_attribute_list() to handle the case of a NULL runlist.
-        - Fix handling of sparse attributes in ntfs_attr_make_non_resident().
-        - Add BUG() checks to ntfs_attr_make_non_resident() and ntfs_attr_set()
-          to ensure that these functions are never called for compressed or
-          encrypted attributes.
-        - Fix cluster (de)allocators to work when the runlist is NULL and more
-          importantly to take a locked runlist rather than them locking it
-          which leads to lock reversal.
-        - Truncate {a,c,m}time to the ntfs supported time granularity when
-          updating the times in the inode in ntfs_setattr().
-        - Fixup handling of sparse, compressed, and encrypted attributes in
-          fs/ntfs/inode.c::ntfs_read_locked_{,attr_,index_}inode(),
-          fs/ntfs/aops.c::ntfs_{read,write}page().
-        - Make ntfs_write_block() not instantiate sparse blocks if they contain
-          only zeroes.
-        - Optimize fs/ntfs/aops.c::ntfs_write_block() by extending the page
-          lock protection over the buffer submission for i/o which allows the
-          removal of the get_bh()/put_bh() pairs for each buffer.
-        - Fix fs/ntfs/aops.c::ntfs_{read,write}_block() to handle the case
-          where a concurrent truncate has truncated the runlist under our feet.
-        - Fix page_has_buffers()/page_buffers() handling in fs/ntfs/aops.c.
-        - In fs/ntfs/aops.c::ntfs_end_buffer_async_read(), use a bit spin lock
-          in the first buffer head instead of a driver global spin lock to
-          improve scalability.
-        - Minor fix to error handling and error message display in
-          fs/ntfs/aops.c::ntfs_prepare_nonresident_write().
-        - Change the mount options {u,f,d}mask to always parse the number as
-          an octal number to conform to how chmod(1) works, too.  Thanks to
-          Giuseppe Bilotta and Horst von Brand for pointing out the errors of
-          my ways.
-        - Fix various bugs in the runlist merging code.  (Based on libntfs
-          changes by Richard Russon.)
-        - Fix sparse warnings that have crept in over time.
-        - Change ntfs_cluster_free() to require a write locked runlist on entry
-          since we otherwise get into a lock reversal deadlock if a read locked
-          runlist is passed in. In the process also change it to take an ntfs
-          inode instead of a vfs inode as parameter.
-        - Fix the definition of the CHKD ntfs record magic.  It had an off by
-          two error causing it to be CHKB instead of CHKD.
-        - Fix a stupid bug in __ntfs_bitmap_set_bits_in_run() which caused the
-          count to become negative and hence we had a wild memset() scribbling
-          all over the system's ram.
-
-2.1.23 - Implement extension of resident files and make writing safe as well as
-         many bug fixes, cleanups, and enhancements...
-
-        - Add printk rate limiting for ntfs_warning() and ntfs_error() when
-          compiled without debug.  This avoids a possible denial of service
-          attack.  Thanks to Carl-Daniel Hailfinger from SuSE for pointing this
-          out.
-        - Fix compilation warnings on ia64.  (Randy Dunlap)
-        - Use i_size_{read,write}() instead of reading i_size by hand and cache
-          the value where apropriate.
-        - Add size_lock to the ntfs_inode structure.  This is an rw spinlock
-          and it locks against access to the inode sizes.  Note, ->size_lock
-          is also accessed from irq context so you must use the _irqsave and
-          _irqrestore lock and unlock functions, respectively.  Protect all
-          accesses to allocated_size, initialized_size, and compressed_size.
-        - Minor optimization to fs/ntfs/super.c::ntfs_statfs() and its helpers.
-        - Implement extension of resident files in the regular file write code
-          paths (fs/ntfs/aops.c::ntfs_{prepare,commit}_write()).  At present
-          this only works until the data attribute becomes too big for the mft
-          record after which we abort the write returning -EOPNOTSUPP from
-          ntfs_prepare_write().
-        - Add disable_sparse mount option together with a per volume sparse
-          enable bit which is set appropriately and a per inode sparse disable
-          bit which is preset on some system file inodes as appropriate.
-        - Enforce that sparse support is disabled on NTFS volumes pre 3.0.
-        - Fix a bug in fs/ntfs/runlist.c::ntfs_mapping_pairs_decompress() in
-          the creation of the unmapped runlist element for the base attribute
-          extent.
-        - Split ntfs_map_runlist() into ntfs_map_runlist() and a non-locking
-          helper ntfs_map_runlist_nolock() which is used by ntfs_map_runlist().
-          This allows us to map runlist fragments with the runlist lock already
-          held without having to drop and reacquire it around the call.  Adapt
-          all callers.
-        - Change ntfs_find_vcn() to ntfs_find_vcn_nolock() which takes a locked
-          runlist.  This allows us to find runlist elements with the runlist
-          lock already held without having to drop and reacquire it around the
-          call.  Adapt all callers.
-        - Change time to u64 in time.h::ntfs2utc() as it otherwise generates a
-          warning in the do_div() call on sparc32.  Thanks to Meelis Roos for
-          the report and analysis of the warning.
-        - Fix a nasty runlist merge bug when merging two holes.
-        - Set the ntfs_inode->allocated_size to the real allocated size in the
-          mft record for resident attributes (fs/ntfs/inode.c).
-        - Small readability cleanup to use "a" instead of "ctx->attr"
-          everywhere (fs/ntfs/inode.c).
-        - Make fs/ntfs/namei.c::ntfs_get_{parent,dentry} static and move the
-          definition of ntfs_export_ops from fs/ntfs/super.c to namei.c.  Also,
-          declare ntfs_export_ops in fs/ntfs/ntfs.h.
-        - Correct sparse file handling.  The compressed values need to be
-          checked and set in the ntfs inode as done for compressed files and
-          the compressed size needs to be used for vfs inode->i_blocks instead
-          of the allocated size, again, as done for compressed files.
-        - Add AT_EA in addition to AT_DATA to whitelist for being allowed to be
-          non-resident in fs/ntfs/attrib.c::ntfs_attr_can_be_non_resident().
-        - Add fs/ntfs/attrib.c::ntfs_attr_vcn_to_lcn_nolock() used by the new
-          write code.
-        - Fix bug in fs/ntfs/attrib.c::ntfs_find_vcn_nolock() where after
-          dropping the read lock and taking the write lock we were not checking
-          whether someone else did not already do the work we wanted to do.
-        - Rename fs/ntfs/attrib.c::ntfs_find_vcn_nolock() to
-          ntfs_attr_find_vcn_nolock() and update all callers.
-        - Add fs/ntfs/attrib.[hc]::ntfs_attr_make_non_resident().
-        - Fix sign of various error return values to be negative in
-          fs/ntfs/lcnalloc.c.
-        - Modify ->readpage and ->writepage (fs/ntfs/aops.c) so they detect and
-          handle the case where an attribute is converted from resident to
-          non-resident by a concurrent file write.
-        - Remove checks for NULL before calling kfree() since kfree() does the
-          checking itself.  (Jesper Juhl)
-        - Some utilities modify the boot sector but do not update the checksum.
-          Thus, relax the checking in fs/ntfs/super.c::is_boot_sector_ntfs() to
-          only emit a warning when the checksum is incorrect rather than
-          refusing the mount.  Thanks to Bernd Casimir for pointing this
-          problem out.
-        - Update attribute definition handling.
-        - Add NTFS_MAX_CLUSTER_SIZE and NTFS_MAX_PAGES_PER_CLUSTER constants.
-        - Use NTFS_MAX_CLUSTER_SIZE in super.c instead of hard coding 0x10000.
-        - Use MAX_BUF_PER_PAGE instead of variable sized array allocation for
-          better code generation and one less sparse warning in fs/ntfs/aops.c.
-        - Remove spurious void pointer casts from fs/ntfs/.  (Pekka Enberg)
-        - Use C99 style structure initialization after memory allocation where
-          possible (fs/ntfs/{attrib.c,index.c,super.c}).  Thanks to Al Viro and
-          Pekka Enberg.
-        - Stamp the transaction log ($UsnJrnl), aka user space journal, if it
-          is active on the volume and we are mounting read-write or remounting
-          from read-only to read-write.
-        - Fix a bug in address space operations error recovery code paths where
-          if the runlist was not mapped at all and a mapping error occured we
-          would leave the runlist locked on exit to the function so that the
-          next access to the same file would try to take the lock and deadlock.
-        - Detect the case when Windows has been suspended to disk on the volume
-          to be mounted and if this is the case do not allow (re)mounting
-          read-write.  This is done by parsing hiberfil.sys if present.
-        - Fix several occurences of a bug where we would perform 'var & ~const'
-          with a 64-bit variable and a int, i.e. 32-bit, constant.  This causes
-          the higher order 32-bits of the 64-bit variable to be zeroed.  To fix
-          this cast the 'const' to the same 64-bit type as 'var'.
-        - Change the runlist terminator of the newly allocated cluster(s) to
-          LCN_ENOENT in ntfs_attr_make_non_resident().  Otherwise the runlist
-          code gets confused.
-        - Add an extra parameter @last_vcn to ntfs_get_size_for_mapping_pairs()
-          and ntfs_mapping_pairs_build() to allow the runlist encoding to be
-          partial which is desirable when filling holes in sparse attributes.
-          Update all callers.
-        - Change ntfs_map_runlist_nolock() to only decompress the mapping pairs
-          if the requested vcn is inside it.  Otherwise we get into problems
-          when we try to map an out of bounds vcn because we then try to map
-          the already mapped runlist fragment which causes
-          ntfs_mapping_pairs_decompress() to fail and return error.  Update
-          ntfs_attr_find_vcn_nolock() accordingly.
-        - Fix a nasty deadlock that appeared in recent kernels.
-          The situation: VFS inode X on a mounted ntfs volume is dirty.  For
-          same inode X, the ntfs_inode is dirty and thus corresponding on-disk
-          inode, i.e. mft record, which is in a dirty PAGE_CACHE_PAGE belonging
-          to the table of inodes, i.e. $MFT, inode 0.
-          What happens:
-          Process 1: sys_sync()/umount()/whatever...  calls
-          __sync_single_inode() for $MFT -> do_writepages() -> write_page for
-          the dirty page containing the on-disk inode X, the page is now locked
-          -> ntfs_write_mst_block() which clears PageUptodate() on the page to
-          prevent anyone else getting hold of it whilst it does the write out.
-          This is necessary as the on-disk inode needs "fixups" applied before
-          the write to disk which are removed again after the write and
-          PageUptodate is then set again.  It then analyses the page looking
-          for dirty on-disk inodes and when it finds one it calls
-          ntfs_may_write_mft_record() to see if it is safe to write this
-          on-disk inode.  This then calls ilookup5() to check if the
-          corresponding VFS inode is in icache().  This in turn calls ifind()
-          which waits on the inode lock via wait_on_inode whilst holding the
-          global inode_lock.
-          Process 2: pdflush results in a call to __sync_single_inode for the
-          same VFS inode X on the ntfs volume.  This locks the inode (I_LOCK)
-          then calls write-inode -> ntfs_write_inode -> map_mft_record() ->
-          read_cache_page() for the page (in page cache of table of inodes
-          $MFT, inode 0) containing the on-disk inode.  This page has
-          PageUptodate() clear because of Process 1 (see above) so
-          read_cache_page() blocks when it tries to take the page lock for the
-          page so it can call ntfs_read_page().
-          Thus Process 1 is holding the page lock on the page containing the
-          on-disk inode X and it is waiting on the inode X to be unlocked in
-          ifind() so it can write the page out and then unlock the page.
-          And Process 2 is holding the inode lock on inode X and is waiting for
-          the page to be unlocked so it can call ntfs_readpage() or discover
-          that Process 1 set PageUptodate() again and use the page.
-          Thus we have a deadlock due to ifind() waiting on the inode lock.
-          The solution: The fix is to use the newly introduced
-          ilookup5_nowait() which does not wait on the inode's lock and hence
-          avoids the deadlock.  This is safe as we do not care about the VFS
-          inode and only use the fact that it is in the VFS inode cache and the
-          fact that the vfs and ntfs inodes are one struct in memory to find
-          the ntfs inode in memory if present.  Also, the ntfs inode has its
-          own locking so it does not matter if the vfs inode is locked.
-        - Fix bug in mft record writing where we forgot to set the device in
-          the buffers when mapping them after the VM had discarded them.
-          Thanks to Martin MOKREJÅ for the bug report.
-
-2.1.22 - Many bug and race fixes and error handling improvements.
-
-        - Improve error handling in fs/ntfs/inode.c::ntfs_truncate().
-        - Change fs/ntfs/inode.c::ntfs_truncate() to return an error code
-          instead of void and provide a helper ntfs_truncate_vfs() for the
-          vfs ->truncate method.
-        - Add a new ntfs inode flag NInoTruncateFailed() and modify
-          fs/ntfs/inode.c::ntfs_truncate() to set and clear it appropriately.
-        - Fix min_size and max_size definitions in ATTR_DEF structure in
-          fs/ntfs/layout.h to be signed.
-        - Add attribute definition handling helpers to fs/ntfs/attrib.[hc]:
-          ntfs_attr_size_bounds_check(), ntfs_attr_can_be_non_resident(), and
-          ntfs_attr_can_be_resident(), which in turn use the new private helper
-          ntfs_attr_find_in_attrdef().
-        - In fs/ntfs/aops.c::mark_ntfs_record_dirty(), take the
-          mapping->private_lock around the dirtying of the buffer heads
-          analagous to the way it is done in __set_page_dirty_buffers().
-        - Ensure the mft record size does not exceed the PAGE_CACHE_SIZE at
-          mount time as this cannot work with the current implementation.
-        - Check for location of attribute name and improve error handling in
-          general in fs/ntfs/inode.c::ntfs_read_locked_inode() and friends.
-        - In fs/ntfs/aops.c::ntfs_writepage(), if the page is fully outside
-          i_size, i.e. race with truncate, invalidate the buffers on the page
-          so that they become freeable and hence the page does not leak.
-        - Remove unused function fs/ntfs/runlist.c::ntfs_rl_merge().  (Adrian
-          Bunk)
-        - Fix stupid bug in fs/ntfs/attrib.c::ntfs_attr_find() that resulted in
-          a NULL pointer dereference in the error code path when a corrupt
-          attribute was found.  (Thanks to Domen Puncer for the bug report.)
-        - Add MODULE_VERSION() to fs/ntfs/super.c.
-        - Make several functions and variables static.  (Adrian Bunk)
-        - Modify fs/ntfs/aops.c::mark_ntfs_record_dirty() so it allocates
-          buffers for the page if they are not present and then marks the
-          buffers belonging to the ntfs record dirty.  This causes the buffers
-          to become busy and hence they are safe from removal until the page
-          has been written out.
-        - Fix stupid bug in fs/ntfs/attrib.c::ntfs_external_attr_find() in the
-          error handling code path that resulted in a BUG() due to trying to
-          unmap an extent mft record when the mapping of it had failed and it
-          thus was not mapped.  (Thanks to Ken MacFerrin for the bug report.)
-        - Drop the runlist lock after the vcn has been read in
-          fs/ntfs/lcnalloc.c::__ntfs_cluster_free().
-        - Rewrite handling of multi sector transfer errors.  We now do not set
-          PageError() when such errors are detected in the async i/o handler
-          fs/ntfs/aops.c::ntfs_end_buffer_async_read().  All users of mst
-          protected attributes now check the magic of each ntfs record as they
-          use it and act appropriately.  This has the effect of making errors
-          granular per ntfs record rather than per page which solves the case
-          where we cannot access any of the ntfs records in a page when a
-          single one of them had an mst error.  (Thanks to Ken MacFerrin for
-          the bug report.)
-        - Fix error handling in fs/ntfs/quota.c::ntfs_mark_quotas_out_of_date()
-          where we failed to release i_mutex on the $Quota/$Q attribute inode.
-        - Fix bug in handling of bad inodes in fs/ntfs/namei.c::ntfs_lookup().
-        - Add mapping of unmapped buffers to all remaining code paths, i.e.
-          fs/ntfs/aops.c::ntfs_write_mst_block(), mft.c::ntfs_sync_mft_mirror(),
-          and write_mft_record_nolock().  From now on we require that the
-          complete runlist for the mft mirror is always mapped into memory.
-        - Add creation of buffers to fs/ntfs/mft.c::ntfs_sync_mft_mirror().
-        - Improve error handling in fs/ntfs/aops.c::ntfs_{read,write}_block().
-        - Cleanup fs/ntfs/aops.c::ntfs_{read,write}page() since we know that a
-          resident attribute will be smaller than a page which makes the code
-          simpler.  Also make the code more tolerant to concurrent ->truncate.
-
-2.1.21 - Fix some races and bugs, rewrite mft write code, add mft allocator.
-
-        - Implement extent mft record deallocation
-          fs/ntfs/mft.c::ntfs_extent_mft_record_free().
-        - Splitt runlist related functions off from attrib.[hc] to runlist.[hc].
-        - Add vol->mft_data_pos and initialize it at mount time.
-        - Rename init_runlist() to ntfs_init_runlist(), ntfs_vcn_to_lcn() to
-          ntfs_rl_vcn_to_lcn(), decompress_mapping_pairs() to
-          ntfs_mapping_pairs_decompress(), ntfs_merge_runlists() to
-          ntfs_runlists_merge() and adapt all callers.
-        - Add fs/ntfs/runlist.[hc]::ntfs_get_nr_significant_bytes(),
-          ntfs_get_size_for_mapping_pairs(), ntfs_write_significant_bytes(),
-          and ntfs_mapping_pairs_build(), adapted from libntfs.
-        - Make fs/ntfs/lcnalloc.c::ntfs_cluster_free_from_rl_nolock() not
-          static and add a declaration for it to lcnalloc.h.
-        - Add fs/ntfs/lcnalloc.h::ntfs_cluster_free_from_rl() which is a static
-          inline wrapper for ntfs_cluster_free_from_rl_nolock() which takes the
-          cluster bitmap lock for the duration of the call.
-        - Add fs/ntfs/attrib.[hc]::ntfs_attr_record_resize().
-        - Implement the equivalent of memset() for an ntfs attribute in
-          fs/ntfs/attrib.[hc]::ntfs_attr_set() and switch
-          fs/ntfs/logfile.c::ntfs_empty_logfile() to using it.
-        - Remove unnecessary casts from LCN_* constants.
-        - Implement fs/ntfs/runlist.c::ntfs_rl_truncate_nolock().
-        - Add MFT_RECORD_OLD as a copy of MFT_RECORD in fs/ntfs/layout.h and
-          change MFT_RECORD to contain the NTFS 3.1+ specific fields.
-        - Add a helper function fs/ntfs/aops.c::mark_ntfs_record_dirty() which
-          marks all buffers belonging to an ntfs record dirty, followed by
-          marking the page the ntfs record is in dirty and also marking the vfs
-          inode containing the ntfs record dirty (I_DIRTY_PAGES).
-        - Switch fs/ntfs/index.h::ntfs_index_entry_mark_dirty() to using the
-          new helper fs/ntfs/aops.c::mark_ntfs_record_dirty() and remove the no
-          longer needed fs/ntfs/index.[hc]::__ntfs_index_entry_mark_dirty().
-        - Move ntfs_{un,}map_page() from ntfs.h to aops.h and fix resulting
-          include errors.
-        - Move the typedefs for runlist_element and runlist from types.h to
-          runlist.h and fix resulting include errors.
-        - Remove unused {__,}format_mft_record() from fs/ntfs/mft.c.
-        - Modify fs/ntfs/mft.c::__mark_mft_record_dirty() to use the helper
-          mark_ntfs_record_dirty() which also changes the behaviour in that we
-          now set the buffers belonging to the mft record dirty as well as the
-          page itself.
-        - Update fs/ntfs/mft.c::write_mft_record_nolock() and sync_mft_mirror()
-          to cope with the fact that there now are dirty buffers in mft pages.
-        - Update fs/ntfs/inode.c::ntfs_write_inode() to also use the helper
-          mark_ntfs_record_dirty() and thus to set the buffers belonging to the
-          mft record dirty as well as the page itself.
-        - Fix compiler warnings on x86-64 in fs/ntfs/dir.c.  (Randy Dunlap,
-          slightly modified by me)
-        - Add fs/ntfs/mft.c::try_map_mft_record() which fails with -EALREADY if
-          the mft record is already locked and otherwise behaves the same way
-          as fs/ntfs/mft.c::map_mft_record().
-        - Modify fs/ntfs/mft.c::write_mft_record_nolock() so that it only
-          writes the mft record if the buffers belonging to it are dirty.
-          Otherwise we assume that it was written out by other means already.
-        - Attempting to write outside initialized size is _not_ a bug so remove
-          the bug check from fs/ntfs/aops.c::ntfs_write_mst_block().  It is in
-          fact required to write outside initialized size when preparing to
-          extend the initialized size.
-        - Map the page instead of using page_address() before writing to it in
-          fs/ntfs/aops.c::ntfs_mft_writepage().
-        - Provide exclusion between opening an inode / mapping an mft record
-          and accessing the mft record in fs/ntfs/mft.c::ntfs_mft_writepage()
-          by setting the page not uptodate throughout ntfs_mft_writepage().
-        - Clear the page uptodate flag in fs/ntfs/aops.c::ntfs_write_mst_block()
-          to ensure noone can see the page whilst the mst fixups are applied.
-        - Add the helper fs/ntfs/mft.c::ntfs_may_write_mft_record() which
-          checks if an mft record may be written out safely obtaining any
-          necessary locks in the process.  This is used by
-          fs/ntfs/aops.c::ntfs_write_mst_block().
-        - Modify fs/ntfs/aops.c::ntfs_write_mst_block() to also work for
-          writing mft records and improve its error handling in the process.
-          Now if any of the records in the page fail to be written out, all
-          other records will be written out instead of aborting completely.
-        - Remove ntfs_mft_aops and update all users to use ntfs_mst_aops.
-        - Modify fs/ntfs/inode.c::ntfs_read_locked_inode() to set the
-          ntfs_mst_aops for all inodes which are NInoMstProtected() and
-          ntfs_aops for all other inodes.
-        - Rename fs/ntfs/mft.c::sync_mft_mirror{,_umount}() to
-          ntfs_sync_mft_mirror{,_umount}() and change their parameters so they
-          no longer require an ntfs inode to be present.  Update all callers.
-        - Cleanup the error handling in fs/ntfs/mft.c::ntfs_sync_mft_mirror().
-        - Clear the page uptodate flag in fs/ntfs/mft.c::ntfs_sync_mft_mirror()
-          to ensure noone can see the page whilst the mst fixups are applied.
-        - Remove the no longer needed fs/ntfs/mft.c::ntfs_mft_writepage() and
-          fs/ntfs/mft.c::try_map_mft_record().
-        - Fix callers of fs/ntfs/aops.c::mark_ntfs_record_dirty() to call it
-          with the ntfs inode which contains the page rather than the ntfs
-          inode the mft record of which is in the page.
-        - Fix race condition in fs/ntfs/inode.c::ntfs_put_inode() by moving the
-          index inode bitmap inode release code from there to
-          fs/ntfs/inode.c::ntfs_clear_big_inode().  (Thanks to Christoph
-          Hellwig for spotting this.)
-        - Fix race condition in fs/ntfs/inode.c::ntfs_put_inode() by taking the
-          inode semaphore around the code that sets ni->itype.index.bmp_ino to
-          NULL and reorganize the code to optimize it a bit.  (Thanks to
-          Christoph Hellwig for spotting this.)
-        - Modify fs/ntfs/aops.c::mark_ntfs_record_dirty() to no longer take the
-          ntfs inode as a parameter as this is confusing and misleading and the
-          needed ntfs inode is available via NTFS_I(page->mapping->host).
-          Adapt all callers to this change.
-        - Modify fs/ntfs/mft.c::write_mft_record_nolock() and
-          fs/ntfs/aops.c::ntfs_write_mst_block() to only check the dirty state
-          of the first buffer in a record and to take this as the ntfs record
-          dirty state.  We cannot look at the dirty state for subsequent
-          buffers because we might be racing with
-          fs/ntfs/aops.c::mark_ntfs_record_dirty().
-        - Move the static inline ntfs_init_big_inode() from fs/ntfs/inode.c to
-          inode.h and make fs/ntfs/inode.c::__ntfs_init_inode() non-static and
-          add a declaration for it to inode.h.  Fix some compilation issues
-          that resulted due to #includes and header file interdependencies.
-        - Simplify setup of i_mode in fs/ntfs/inode.c::ntfs_read_locked_inode().
-        - Add helpers fs/ntfs/layout.h::MK_MREF() and MK_LE_MREF().
-        - Modify fs/ntfs/mft.c::map_extent_mft_record() to only verify the mft
-          record sequence number if it is specified (i.e. not zero).
-        - Add fs/ntfs/mft.[hc]::ntfs_mft_record_alloc() and various helper
-          functions used by it.
-        - Update Documentation/filesystems/ntfs.txt with instructions on how to
-          use the Device-Mapper driver with NTFS ftdisk/LDM raid.  This removes
-          the linear raid problem with the Software RAID / MD driver when one
-          or more of the devices has an odd number of sectors.
-
-2.1.20 - Fix two stupid bugs introduced in 2.1.18 release.
-
-        - Fix stupid bug in fs/ntfs/attrib.c::ntfs_attr_reinit_search_ctx()
-          where we did not clear ctx->al_entry but it was still set due to
-          changes in ntfs_attr_lookup() and ntfs_external_attr_find() in
-          particular.
-        - Fix another stupid bug in fs/ntfs/attrib.c::ntfs_external_attr_find()
-          where we forgot to unmap the extent mft record when we had finished
-          enumerating an attribute which caused a bug check to trigger when the
-          VFS calls ->clear_inode.
-
-2.1.19 - Many cleanups, improvements, and a minor bug fix.
-
-        - Update ->setattr (fs/ntfs/inode.c::ntfs_setattr()) to refuse to
-          change the uid, gid, and mode of an inode as we do not support NTFS
-          ACLs yet.
-        - Remove BKL use from ntfs_setattr() syncing up with the rest of the
-          kernel.
-        - Get rid of the ugly transparent union in fs/ntfs/dir.c::ntfs_readdir()
-          and ntfs_filldir() as per suggestion from Al Viro.
-        - Change '\0' and L'\0' to simply 0 as per advice from Linus Torvalds.
-        - Update ->truncate (fs/ntfs/inode.c::ntfs_truncate()) to check if the
-          inode size has changed and to only output an error if so.
-        - Rename fs/ntfs/attrib.h::attribute_value_length() to ntfs_attr_size().
-        - Add le{16,32,64} as well as sle{16,32,64} data types to
-          fs/ntfs/types.h.
-        - Change ntfschar to be le16 instead of u16 in fs/ntfs/types.h.
-        - Add le versions of VCN, LCN, and LSN called leVCN, leLCN, and leLSN,
-          respectively, to fs/ntfs/types.h.
-        - Update endianness conversion macros in fs/ntfs/endian.h to use the
-          new types as appropriate.
-        - Do proper type casting when using sle64_to_cpup() in fs/ntfs/dir.c
-          and index.c.
-        - Add leMFT_REF data type to fs/ntfs/layout.h.
-        - Update all NTFS header files with the new little endian data types.
-          Affected files are fs/ntfs/layout.h, logfile.h, and time.h.
-        - Do proper type casting when using ntfs_is_*_recordp() in
-          fs/ntfs/logfile.c, mft.c, and super.c. 
-        - Fix all the sparse bitwise warnings.  Had to change all the typedef
-          enums storing little endian values to simple enums plus a typedef for
-          the datatype to make sparse happy.
-        - Fix a bug found by the new sparse bitwise warnings where the default
-          upcase table was defined as a pointer to wchar_t rather than ntfschar
-          in fs/ntfs/ntfs.h and super.c.
-        - Change {const_,}cpu_to_le{16,32}(0) to just 0 as suggested by Al Viro.
-
-2.1.18 - Fix scheduling latencies at mount time as well as an endianness bug.
-
-        - Remove vol->nr_mft_records as it was pretty meaningless and optimize
-          the calculation of total/free inodes as used by statfs().
-        - Fix scheduling latencies in ntfs_fill_super() by dropping the BKL
-          because the code itself is using the ntfs_lock semaphore which
-          provides safe locking.  (Ingo Molnar)
-        - Fix a potential bug in fs/ntfs/mft.c::map_extent_mft_record() that
-          could occur in the future for when we start closing/freeing extent
-          inodes if we don't set base_ni->ext.extent_ntfs_inos to NULL after
-          we free it.
-        - Rename {find,lookup}_attr() to ntfs_attr_{find,lookup}() as well as
-          find_external_attr() to ntfs_external_attr_find() to cleanup the
-          namespace a bit and to be more consistent with libntfs.
-        - Rename {{re,}init,get,put}_attr_search_ctx() to
-          ntfs_attr_{{re,}init,get,put}_search_ctx() as well as the type
-          attr_search_context to ntfs_attr_search_ctx.
-        - Force use of ntfs_attr_find() in ntfs_attr_lookup() when searching
-          for the attribute list attribute itself.
-        - Fix endianness bug in ntfs_external_attr_find().
-        - Change ntfs_{external_,}attr_find() to return 0 on success, -ENOENT
-          if the attribute is not found, and -EIO on real error.  In the case
-          of -ENOENT, the search context is updated to describe the attribute
-          before which the attribute being searched for would need to be
-          inserted if such an action were to be desired and in the case of
-          ntfs_external_attr_find() the search context is also updated to
-          indicate the attribute list entry before which the attribute list
-          entry of the attribute being searched for would need to be inserted
-          if such an action were to be desired.  Also make ntfs_find_attr()
-          static and remove its prototype from attrib.h as it is not used
-          anywhere other than attrib.c.  Update ntfs_attr_lookup() and all
-          callers of ntfs_{external,}attr_{find,lookup}() for the new return
-          values.
-        - Minor cleanup of fs/ntfs/inode.c::ntfs_init_locked_inode().
-
-2.1.17 - Fix bugs in mount time error code paths and other updates.
-
-        - Implement bitmap modification code (fs/ntfs/bitmap.[hc]).  This
-          includes functions to set/clear a single bit or a run of bits.
-        - Add fs/ntfs/attrib.[hc]::ntfs_find_vcn() which returns the locked
-          runlist element containing a particular vcn.  It also takes care of
-          mapping any needed runlist fragments.
-        - Implement cluster (de-)allocation code (fs/ntfs/lcnalloc.[hc]).
-        - Load attribute definition table from $AttrDef at mount time.
-        - Fix bugs in mount time error code paths involving (de)allocation of
-          the default and volume upcase tables.
-        - Remove ntfs_nr_mounts as it is no longer used.
-
-2.1.16 - Implement access time updates, file sync, async io, and read/writev.
-
-        - Add support for readv/writev and aio_read/aio_write (fs/ntfs/file.c).
-          This is done by setting the appropriate file operations pointers to
-          the generic helper functions provided by mm/filemap.c.
-        - Implement fsync, fdatasync, and msync both for files (fs/ntfs/file.c)
-          and directories (fs/ntfs/dir.c).
-        - Add support for {a,m,c}time updates to inode.c::ntfs_write_inode().
-          Note, except for the root directory and any other system files opened
-          by the user, the system files will not have their access times
-          updated as they are only accessed at the inode level an hence the
-          file level functions which cause the times to be updated are never
-          invoked.
-
-2.1.15 - Invalidate quotas when (re)mounting read-write.
-
-        - Add new element itype.index.collation_rule to the ntfs inode
-          structure and set it appropriately in ntfs_read_locked_inode().
-        - Implement a new inode type "index" to allow efficient access to the
-          indices found in various system files and adapt inode handling
-          accordingly (fs/ntfs/inode.[hc]).  An index inode is essentially an
-          attribute inode (NInoAttr() is true) with an attribute type of
-          AT_INDEX_ALLOCATION.  As such, it is no longer allowed to call
-          ntfs_attr_iget() with an attribute type of AT_INDEX_ALLOCATION as
-          there would be no way to distinguish between normal attribute inodes
-          and index inodes.  The function to obtain an index inode is
-          ntfs_index_iget() and it uses the helper function
-          ntfs_read_locked_index_inode().  Note, we do not overload
-          ntfs_attr_iget() as indices consist of multiple attributes so using
-          ntfs_attr_iget() to obtain an index inode would be confusing.
-        - Ensure that there is no overflow when doing page->index <<
-          PAGE_CACHE_SHIFT by casting page->index to s64 in fs/ntfs/aops.c.
-        - Use atomic kmap instead of kmap() in fs/ntfs/aops.c::ntfs_read_page()
-          and ntfs_read_block().
-        - Use case sensitive attribute lookups instead of case insensitive ones.
-        - Lock all page cache pages belonging to mst protected attributes while
-          accessing them to ensure we never see corrupt data while the page is
-          under writeout.
-        - Add framework for generic ntfs collation (fs/ntfs/collation.[hc]).
-          We have ntfs_is_collation_rule_supported() to check if the collation
-          rule you want to use is supported and ntfs_collation() which actually
-          collates two data items.  We currently only support COLLATION_BINARY
-          and COLLATION_NTOFS_ULONG but support for other collation rules will
-          be added as the need arises.
-        - Add a new type, ntfs_index_context, to allow retrieval of an index
-          entry using the corresponding index key.  To get an index context,
-          use ntfs_index_ctx_get() and to release it, use ntfs_index_ctx_put().
-          This also adds a new slab cache for the index contexts.  To lookup a
-          key in an index inode, use ntfs_index_lookup().  After modifying an
-          index entry, call ntfs_index_entry_flush_dcache_page() followed by
-          ntfs_index_entry_mark_dirty() to ensure the changes are written out
-          to disk.  For details see fs/ntfs/index.[hc].  Note, at present, if
-          an index entry is in the index allocation attribute rather than the
-          index root attribute it will not be written out (you will get a
-          warning message about discarded changes instead).
-        - Load the quota file ($Quota) and check if quota tracking is enabled
-          and if so, mark the quotas out of date.  This causes windows to
-          rescan the volume on boot and update all quota entries.
-        - Add a set_page_dirty address space operation for ntfs_m[fs]t_aops.
-          It is simply set to __set_page_dirty_nobuffers() to make sure that
-          running set_page_dirty() on a page containing mft/ntfs records will
-          not affect the dirty state of the page buffers.
-        - Add fs/ntfs/index.c::__ntfs_index_entry_mark_dirty() which sets all
-          buffers that are inside the ntfs record in the page dirty after which
-          it sets the page dirty.  This allows ->writepage to only write the
-          dirty index records rather than having to write all the records in
-          the page.  Modify fs/ntfs/index.h::ntfs_index_entry_mark_dirty() to
-          use this rather than __set_page_dirty_nobuffers().
-        - Implement fs/ntfs/aops.c::ntfs_write_mst_block() which enables the
-          writing of page cache pages belonging to mst protected attributes
-          like the index allocation attribute in directory indices and other
-          indices like $Quota/$Q, etc.  This means that the quota is now marked
-          out of date on all volumes rather than only on ones where the quota
-          defaults entry is in the index root attribute of the $Quota/$Q index.
-
-2.1.14 - Fix an NFSd caused deadlock reported by several users.
-
-        - Modify fs/ntfs/ntfs_readdir() to copy the index root attribute value
-          to a buffer so that we can put the search context and unmap the mft
-          record before calling the filldir() callback.  We need to do this
-          because of NFSd which calls ->lookup() from its filldir callback()
-          and this causes NTFS to deadlock as ntfs_lookup() maps the mft record
-          of the directory and since ntfs_readdir() has got it mapped already
-          ntfs_lookup() deadlocks.
-
-2.1.13 - Enable overwriting of resident files and housekeeping of system files.
-
-        - Implement writing of mft records (fs/ntfs/mft.[hc]), which includes
-          keeping the mft mirror in sync with the mft when mirrored mft records
-          are written.  The functions are write_mft_record{,_nolock}().  The
-          implementation is quite rudimentary for now with lots of things not
-          implemented yet but I am not sure any of them can actually occur so
-          I will wait for people to hit each one and only then implement it.
-        - Commit open system inodes at umount time.  This should make it
-          virtually impossible for sync_mft_mirror_umount() to ever be needed.
-        - Implement ->write_inode (fs/ntfs/inode.c::ntfs_write_inode()) for the
-          ntfs super operations.  This gives us inode writing via the VFS inode
-          dirty code paths.  Note:  Access time updates are not implemented yet.
-        - Implement fs/ntfs/mft.[hc]::{,__}mark_mft_record_dirty() and make
-          fs/ntfs/aops.c::ntfs_writepage() and ntfs_commit_write() use it, thus
-          finally enabling resident file overwrite!  (-8  This also includes a
-          placeholder for ->writepage (ntfs_mft_writepage()), which for now
-          just redirties the page and returns.  Also, at umount time, we for
-          now throw away all mft data page cache pages after the last call to
-          ntfs_commit_inode() in the hope that all inodes will have been
-          written out by then and hence no dirty (meta)data will be lost.  We
-          also check for this case and emit an error message telling the user
-          to run chkdsk.
-        - Use set_page_writeback() and end_page_writeback() in the resident
-          attribute code path of fs/ntfs/aops.c::ntfs_writepage() otherwise
-          the radix-tree tag PAGECACHE_TAG_DIRTY remains set even though the
-          page is clean.
-        - Implement ntfs_mft_writepage() so it now checks if any of the mft
-          records in the page are dirty and if so redirties the page and
-          returns.  Otherwise it just returns (after doing set_page_writeback(),
-          unlock_page(), end_page_writeback() or the radix-tree tag
-          PAGECACHE_TAG_DIRTY remains set even though the page is clean), thus
-          alowing the VM to do with the page as it pleases.  Also, at umount
-          time, now only throw away dirty mft (meta)data pages if dirty inodes
-          are present and ask the user to email us if they see this happening.
-        - Add functions ntfs_{clear,set}_volume_flags(), to modify the volume
-          information flags (fs/ntfs/super.c).
-        - Mark the volume dirty when (re)mounting read-write and mark it clean
-          when unmounting or remounting read-only.  If any volume errors are
-          found, the volume is left marked dirty to force chkdsk to run.
-        - Add code to set the NT4 compatibility flag when (re)mounting
-          read-write for newer NTFS versions but leave it commented out for now
-          since we do not make any modifications that are NTFS 1.2 specific yet
-          and since setting this flag breaks Captive-NTFS which is not nice.
-          This code must be enabled once we start writing NTFS 1.2 specific
-          changes otherwise Windows NTFS driver might crash / cause corruption.
-
-2.1.12 - Fix the second fix to the decompression engine and some cleanups.
-
-        - Add a new address space operations struct, ntfs_mst_aops, for mst
-          protected attributes.  This is because the default ntfs_aops do not
-          make sense with mst protected data and were they to write anything to
-          such an attribute they would cause data corruption so we provide
-          ntfs_mst_aops which does not have any write related operations set.
-        - Cleanup dirty ntfs inode handling (fs/ntfs/inode.[hc]) which also
-          includes an adapted ntfs_commit_inode() and an implementation of
-          ntfs_write_inode() which for now just cleans dirty inodes without
-          writing them (it does emit a warning that this is happening).
-        - Undo the second decompression engine fix (see 2.1.9 release ChangeLog
-          entry) as it was only fixing a theoretical bug but at the same time
-          it badly broke the handling of sparse and uncompressed compression
-          blocks.
-
-2.1.11 - Driver internal cleanups.
-
-        - Only build logfile.o if building the driver with read-write support.
-        - Really final white space cleanups.
-        - Use generic_ffs() instead of ffs() in logfile.c which allows the
-          log_page_size variable to be optimized by gcc into a constant.
-        - Rename uchar_t to ntfschar everywhere as uchar_t is unsigned 1-byte
-          char as defined by POSIX and as found on some systems.
-
-2.1.10 - Force read-only (re)mounting of volumes with unsupported volume flags.
-
-        - Finish off the white space cleanups (remove trailing spaces, etc).
-        - Clean up ntfs_fill_super() and ntfs_read_inode_mount() by removing
-          the kludges around the first iget().  Instead of (re)setting ->s_op
-          we have the $MFT inode set up by explicit new_inode() / set ->i_ino /
-          insert_inode_hash() / call ntfs_read_inode_mount() directly.  This
-          kills the need for second super_operations and allows to return error
-          from ntfs_read_inode_mount() without resorting to ugly "poisoning"
-          tricks.  (Al Viro)
-        - Force read-only (re)mounting if any of the following bits are set in
-          the volume information flags:
-                VOLUME_IS_DIRTY, VOLUME_RESIZE_LOG_FILE,
-                VOLUME_UPGRADE_ON_MOUNT, VOLUME_DELETE_USN_UNDERWAY,
-                VOLUME_REPAIR_OBJECT_ID, VOLUME_MODIFIED_BY_CHKDSK
-          To make this easier we define VOLUME_MUST_MOUNT_RO_MASK with all the
-          above bits set so the test is made easy.
-
-2.1.9 - Fix two bugs in decompression engine.
-
-        - Fix a bug where we would not always detect that we have reached the
-          end of a compression block because we were ending at minus one byte
-          which is effectively the same as being at the end.  The fix is to
-          check whether the uncompressed buffer has been fully filled and if so
-          we assume we have reached the end of the compression block.  A big
-          thank you to Marcin Gibuła for the bug report, the assistance in
-          tracking down the bug and testing the fix.
-        - Fix a possible bug where when a compressed read is truncated to the
-          end of the file, the offset inside the last page was not truncated.
-
-2.1.8 - Handle $MFT mirror and $LogFile, improve time handling, and cleanups.
-
-        - Use get_bh() instead of manual atomic_inc() in fs/ntfs/compress.c.
-        - Modify fs/ntfs/time.c::ntfs2utc(), get_current_ntfs_time(), and
-          utc2ntfs() to work with struct timespec instead of time_t on the
-          Linux UTC time side thus preserving the full precision of the NTFS
-          time and only loosing up to 99 nano-seconds in the Linux UTC time.
-        - Move fs/ntfs/time.c to fs/ntfs/time.h and make the time functions
-          static inline.
-        - Remove unused ntfs_dirty_inode().
-        - Cleanup super operations declaration in fs/ntfs/super.c.
-        - Wrap flush_dcache_mft_record_page() in #ifdef NTFS_RW.
-        - Add NInoTestSetFoo() and NInoTestClearFoo() macro magic to
-          fs/ntfs/inode.h and use it to declare NInoTest{Set,Clear}Dirty.
-        - Move typedefs for ntfs_attr and test_t from fs/ntfs/inode.c to
-          fs/ntfs/inode.h so they can be used elsewhere.
-        - Determine the mft mirror size as the number of mirrored mft records
-          and store it in ntfs_volume->mftmirr_size (fs/ntfs/super.c).
-        - Load the mft mirror at mount time and compare the mft records stored
-          in it to the ones in the mft.  Force a read-only mount if the two do
-          not match (fs/ntfs/super.c).
-        - Fix type casting related warnings on 64-bit architectures.  Thanks
-          to Meelis Roos for reporting them.
-        - Move %L to %ll as %L is floating point and %ll is integer which is
-          what we want.
-        - Read the journal ($LogFile) and determine if the volume has been
-          shutdown cleanly and force a read-only mount if not (fs/ntfs/super.c
-          and fs/ntfs/logfile.c).  This is a little bit of a crude check in
-          that we only look at the restart areas and not at the actual log
-          records so that there will be a very small number of cases where we
-          think that a volume is dirty when in fact it is clean.  This should
-          only affect volumes that have not been shutdown cleanly and did not
-          have any pending, non-check-pointed i/o.
-        - If the $LogFile indicates a clean shutdown and a read-write (re)mount
-          is requested, empty $LogFile by overwriting it with 0xff bytes to
-          ensure that Windows cannot cause data corruption by replaying a stale
-          journal after Linux has written to the volume.
-
-2.1.7 - Enable NFS exporting of mounted NTFS volumes.
-
-        - Set i_generation in the VFS inode from the seq_no of the NTFS inode.
-        - Make ntfs_lookup() NFS export safe, i.e. use d_splice_alias(), etc.
-        - Implement ->get_dentry() in fs/ntfs/namei.c::ntfs_get_dentry() as the
-          default doesn't allow inode number 0 which is a valid inode on NTFS
-          and even if it did allow that it uses iget() instead of ntfs_iget()
-          which makes it useless for us.
-        - Implement ->get_parent() in fs/ntfs/namei.c::ntfs_get_parent() as the
-          default just returns -EACCES which is not very useful.
-        - Define export operations (->s_export_op) for NTFS (ntfs_export_ops)
-          and set them up in the super block at mount time (super.c) this
-          allows mounted NTFS volumes to be exported via NFS.
-        - Add missing return -EOPNOTSUPP; in
-          fs/ntfs/aops.c::ntfs_commit_nonresident_write().
-        - Enforce no atime and no dir atime updates at mount/remount time as
-          they are not implemented yet anyway.
-        - Move a few assignments in fs/ntfs/attrib.c::load_attribute_list() to
-          after a NULL check.  Thanks to Dave Jones for pointing this out.
-
-2.1.6 - Fix minor bug in handling of compressed directories.
-
-        - Fix bug in handling of compressed directories.  A compressed
-          directory is not really compressed so when we set the ->i_blocks
-          field of a compressed directory inode we were setting it from the
-          non-existing field ni->itype.compressed.size which gave random
-          results...  For directories we now always use ni->allocated_size.
-
-2.1.5 - Fix minor bug in attribute list attribute handling.
-
-        - Fix bug in attribute list handling.  Actually it is not as much a bug
-          as too much protection in that we were not allowing attribute lists
-          which waste space on disk while Windows XP clearly allows it and in
-          fact creates such attribute lists so our driver was failing.
-        - Update NTFS documentation ready for 2.6 kernel release.
-
-2.1.4 - Reduce compiler requirements.
-
-        - Remove all uses of unnamed structs and unions in the driver to make
-          old and newer gcc versions happy. Makes it a bit uglier IMO but at
-          least people will stop hassling me about it.
-
-2.1.3 - Important bug fixes in corner cases.
-
-        - super.c::parse_ntfs_boot_sector(): Correct the check for 64-bit
-          clusters. (Philipp Thomas)
-        - attrib.c::load_attribute_list(): Fix bug when initialized_size is a
-          multiple of the block_size but not the cluster size. (Szabolcs
-          Szakacsits)
-
-2.1.2 - Important bug fixes aleviating the hangs in statfs.
-
-        - Fix buggy free cluster and free inode determination logic.
-
-2.1.1 - Minor updates.
-
-        - Add handling for initialized_size != data_size in compressed files.
-        - Reduce function local stack usage from 0x3d4 bytes to just noise in
-          fs/ntfs/upcase.c. (Randy Dunlap)
-        - Remove compiler warnings for newer gcc.
-        - Pages are no longer kmapped by mm/filemap.c::generic_file_write()
-          around calls to ->{prepare,commit}_write.  Adapt NTFS appropriately
-          in fs/ntfs/aops.c::ntfs_prepare_nonresident_write() by using
-          kmap_atomic(KM_USER0).
-
-2.1.0 - First steps towards write support: implement file overwrite.
-
-        - Add configuration option for developmental write support with an
-          appropriately scary configuration help text.
-        - Initial implementation of fs/ntfs/aops.c::ntfs_writepage() and its
-          helper fs/ntfs/aops.c::ntfs_write_block(). This enables mmap(2) based
-          overwriting of existing files on ntfs. Note: Resident files are
-          only written into memory, and not written out to disk at present, so
-          avoid writing to files smaller than about 1kiB.
-        - Initial implementation of fs/ntfs/aops.c::ntfs_prepare_write(), its
-          helper fs/ntfs/aops.c::ntfs_prepare_nonresident_write() and their
-          counterparts, fs/ntfs/aops.c::ntfs_commit_write(), and
-          fs/ntfs/aops.c::ntfs_commit_nonresident_write(), respectively. Also,
-          add generic_file_write() to the ntfs file operations (fs/ntfs/file.c).
-          This enables write(2) based overwriting of existing files on ntfs.
-          Note: As with mmap(2) based overwriting, resident files are only
-          written into memory, and not written out to disk at present, so avoid
-          writing to files smaller than about 1kiB.
-        - Implement ->truncate (fs/ntfs/inode.c::ntfs_truncate()) and
-          ->setattr() (fs/ntfs/inode.c::ntfs_setattr()) inode operations for
-          files with the purpose of intercepting and aborting all i_size
-          changes which we do not support yet. ntfs_truncate() actually only
-          emits a warning message but AFAICS our interception of i_size changes
-          elsewhere means ntfs_truncate() never gets called for i_size changes.
-          It is only called from generic_file_write() when we fail in
-          ntfs_prepare_{,nonresident_}write() in order to discard any
-          instantiated buffers beyond i_size. Thus i_size is not actually
-          changed so our warning message is enough. Unfortunately it is not
-          possible to easily determine if i_size is being changed or not hence
-          we just emit an appropriately worded error message.
-
-2.0.25 - Small bug fixes and cleanups.
-
-        - Unlock the page in an out of memory error code path in
-          fs/ntfs/aops.c::ntfs_read_block().
-        - If fs/ntfs/aops.c::ntfs_read_page() is called on an uptodate page,
-          just unlock the page and return. (This can happen due to ->writepage
-          clearing PageUptodate() during write out of MstProtected()
-          attributes.
-        - Remove leaked write code again.
-
-2.0.24 - Cleanups.
-
-        - Treat BUG_ON() as ASSERT() not VERIFY(), i.e. do not use side effects
-          inside BUG_ON(). (Adam J. Richter)
-        - Split logical OR expressions inside BUG_ON() into individual BUG_ON()
-          calls for improved debugging. (Adam J. Richter)
-        - Add errors flag to the ntfs volume state, accessed via
-          NVol{,Set,Clear}Errors(vol).
-        - Do not allow read-write remounts of read-only volumes with errors.
-        - Clarify comment for ntfs file operation sendfile which was added by
-          Christoph Hellwig a while ago (just using generic_file_sendfile())
-          to say that ntfs ->sendfile is only used for the case where the
-          source data is on the ntfs partition and the destination is
-          somewhere else, i.e. nothing we need to concern ourselves with.
-        - Add generic_file_write() as our ntfs file write operation.
-
-2.0.23 - Major bug fixes (races, deadlocks, non-i386 architectures).
-
-        - Massive internal locking changes to mft record locking. Fixes lock
-          recursion and replaces the mrec_lock read/write semaphore with a
-          mutex. Also removes the now superfluous mft_count. This fixes several
-          race conditions and deadlocks, especially in the future write code.
-        - Fix ntfs over loopback for compressed files by adding an
-          optimization barrier. (gcc was screwing up otherwise ?)
-        - Miscellaneous cleanups all over the code and a fix or two in error
-          handling code paths.
-        Thanks go to Christoph Hellwig for pointing out the following two:
-        - Remove now unused function fs/ntfs/malloc.h::vmalloc_nofs().
-        - Fix ntfs_free() for ia64 and parisc by checking for VMALLOC_END, too.
-
-2.0.22 - Cleanups, mainly to ntfs_readdir(), and use C99 initializers.
-
-        - Change fs/ntfs/dir.c::ntfs_reddir() to only read/write ->f_pos once
-          at entry/exit respectively.
-        - Use C99 initializers for structures.
-        - Remove unused variable blocks from fs/ntfs/aops.c::ntfs_read_block().
-
-2.0.21 - Check for, and refuse to work with too large files/directories/volumes.
-
-        - Limit volume size at mount time to 2TiB on architectures where
-          unsigned long is 32-bits (fs/ntfs/super.c::parse_ntfs_boot_sector()).
-          This is the most we can do without overflowing the 32-bit limit of
-          the block device size imposed on us by sb_bread() and sb_getblk()
-          for the time being.
-        - Limit file/directory size at open() time to 16TiB on architectures
-          where unsigned long is 32-bits (fs/ntfs/file.c::ntfs_file_open() and
-          fs/ntfs/dir.c::ntfs_dir_open()). This is the most we can do without
-          overflowing the page cache page index.
-
-2.0.20 - Support non-resident directory index bitmaps, fix page leak in readdir.
-
-        - Move the directory index bitmap to use an attribute inode instead of
-          having special fields for it inside the ntfs inode structure. This
-          means that the index bitmaps now use the page cache for i/o, too,
-          and also as a side effect we get support for non-resident index
-          bitmaps for free.
-        - Simplify/cleanup error handling in fs/ntfs/dir.c::ntfs_readdir() and
-          fix a page leak that manifested itself in some cases.
-        - Add fs/ntfs/inode.c::ntfs_put_inode(), which we need to release the
-          index bitmap inode on the final iput().
-
-2.0.19 - Fix race condition, improvements, and optimizations in i/o interface.
-
-        - Apply block optimization added to fs/ntfs/aops.c::ntfs_read_block()
-          to fs/ntfs/compress.c::ntfs_file_read_compressed_block() as well.
-        - Drop the "file" from ntfs_file_read_compressed_block().
-        - Rename fs/ntfs/aops.c::ntfs_enb_buffer_read_async() to
-          ntfs_end_buffer_async_read() (more like the fs/buffer.c counterpart).
-        - Update ntfs_end_buffer_async_read() with the improved logic from
-          its updated counterpart fs/buffer.c::end_buffer_async_read(). Apply
-          further logic improvements to better determine when we set PageError.
-        - Update submission of buffers in fs/ntfs/aops.c::ntfs_read_block() to
-          check for the buffers being uptodate first in line with the updated
-          fs/buffer.c::block_read_full_page(). This plugs a small race
-          condition.
-
-2.0.18 - Fix race condition in reading of compressed files.
-
-        - There was a narrow window between checking a buffer head for being
-          uptodate and locking it in ntfs_file_read_compressed_block(). We now
-          lock the buffer and then check whether it is uptodate or not.
-
-2.0.17 - Cleanups and optimizations - shrinking the ToDo list.
-
-        - Modify fs/ntfs/inode.c::ntfs_read_locked_inode() to return an error
-          code and update callers, i.e. ntfs_iget(), to pass that error code
-          up instead of just using -EIO.
-        - Modifications to super.c to ensure that both mount and remount
-          cannot set any write related options when the driver is compiled
-          read-only.
-        - Optimize block resolution in fs/ntfs/aops.c::ntfs_read_block() to
-          cache the current runlist element. This should improve performance
-          when reading very large and/or very fragmented data.
-
-2.0.16 - Convert access to $MFT/$BITMAP to attribute inode API.
-
-        - Fix a stupid bug introduced in 2.0.15 where we were unmapping the
-          wrong inode in fs/ntfs/inode.c::ntfs_attr_iget().
-        - Fix debugging check in fs/ntfs/aops.c::ntfs_read_block().
-        - Convert $MFT/$BITMAP access to attribute inode API and remove all
-          remnants of the ugly mftbmp address space and operations hack. This
-          means we finally have only one readpage function as well as only one
-          async io completion handler. Yey! The mft bitmap is now just an
-          attribute inode and is accessed from vol->mftbmp_ino just as if it
-          were a normal file. Fake inodes rule. (-:
-
-2.0.15 - Fake inodes based attribute i/o via the pagecache, fixes and cleanups.
-
-        - Fix silly bug in fs/ntfs/super.c::parse_options() which was causing
-          remounts to fail when the partition had an entry in /etc/fstab and
-          the entry specified the nls= option.
-        - Apply same macro magic used in fs/ntfs/inode.h to fs/ntfs/volume.h to
-          expand all the helper functions NVolFoo(), NVolSetFoo(), and
-          NVolClearFoo().
-        - Move copyright statement from driver initialisation message to
-          module description (fs/super.c). This makes the initialisation
-          message fit on one line and fits in better with rest of kernel.
-        - Update fs/ntfs/attrib.c::map_run_list() to work on both real and
-          attribute inodes, and both for files and directories.
-        - Implement fake attribute inodes allowing all attribute i/o to go via
-          the page cache and to use all the normal vfs/mm functionality:
-          - Add ntfs_attr_iget() and its helper ntfs_read_locked_attr_inode()
-            to fs/ntfs/inode.c.
-          - Add needed cleanup code to ntfs_clear_big_inode().
-        - Merge address space operations for files and directories (aops.c),
-          now just have ntfs_aops:
-          - Rename:
-                end_buffer_read_attr_async() -> ntfs_end_buffer_read_async(),
-                ntfs_attr_read_block()       -> ntfs_read_block(),
-                ntfs_file_read_page()        -> ntfs_readpage().
-          - Rewrite fs/ntfs/aops.c::ntfs_readpage() to work on both real and
-            attribute inodes, and both for files and directories.
-          - Remove obsolete fs/ntfs/aops.c::ntfs_mst_readpage().
-
-2.0.14 - Run list merging code cleanup, minor locking changes, typo fixes.
-
-        - Change fs/ntfs/super.c::ntfs_statfs() to not rely on BKL by moving
-          the locking out of super.c::get_nr_free_mft_records() and taking and
-          dropping the mftbmp_lock rw_semaphore in ntfs_statfs() itself.
-        - Bring attribute runlist merging code (fs/ntfs/attrib.c) in sync with
-          current userspace ntfs library code. This means that if a merge
-          fails the original runlists are always left unmodified instead of
-          being silently corrupted.
-        - Misc typo fixes.
-
-2.0.13 - Use iget5_locked() in preparation for fake inodes and small cleanups.
-
-        - Remove nr_mft_bits and the now superfluous union with nr_mft_records
-          from ntfs_volume structure.
-        - Remove nr_lcn_bits and the now superfluous union with nr_clusters
-          from ntfs_volume structure.
-        - Use iget5_locked() and friends instead of conventional iget(). Wrap
-          the call in fs/ntfs/inode.c::ntfs_iget() and update callers of iget()
-          to use ntfs_iget(). Leave only one iget() call at mount time so we
-          don't need an ntfs_iget_mount().
-        - Change fs/ntfs/inode.c::ntfs_new_extent_inode() to take mft_no as an
-          additional argument.
-
-2.0.12 - Initial cleanup of address space operations following 2.0.11 changes.
-
-        - Merge fs/ntfs/aops.c::end_buffer_read_mst_async() and
-          fs/ntfs/aops.c::end_buffer_read_file_async() into one function
-          fs/ntfs/aops.c::end_buffer_read_attr_async() using NInoMstProtected()
-          to determine whether to apply mst fixups or not.
-        - Above change allows merging fs/ntfs/aops.c::ntfs_file_read_block()
-          and fs/ntfs/aops.c::ntfs_mst_readpage() into one function
-          fs/ntfs/aops.c::ntfs_attr_read_block(). Also, create a tiny wrapper
-          fs/ntfs/aops.c::ntfs_mst_readpage() to transform the parameters from
-          the VFS readpage function prototype to the ntfs_attr_read_block()
-          function prototype.
-
-2.0.11 - Initial preparations for fake inode based attribute i/o.
-
-        - Move definition of ntfs_inode_state_bits to fs/ntfs/inode.h and
-          do some macro magic (adapted from include/linux/buffer_head.h) to
-          expand all the helper functions NInoFoo(), NInoSetFoo(), and
-          NInoClearFoo().
-        - Add new flag to ntfs_inode_state_bits: NI_Sparse.
-        - Add new fields to ntfs_inode structure to allow use of fake inodes
-          for attribute i/o: type, name, name_len. Also add new state bits:
-          NI_Attr, which, if set, indicates the inode is a fake inode, and
-          NI_MstProtected, which, if set, indicates the attribute uses multi
-          sector transfer protection, i.e. fixups need to be applied after
-          reads and before/after writes.
-        - Rename fs/ntfs/inode.c::ntfs_{new,clear,destroy}_inode() to
-          ntfs_{new,clear,destroy}_extent_inode() and update callers.
-        - Use ntfs_clear_extent_inode() in fs/ntfs/inode.c::__ntfs_clear_inode()
-          instead of ntfs_destroy_extent_inode().
-        - Cleanup memory deallocations in {__,}ntfs_clear_{,big_}inode().
-        - Make all operations on ntfs inode state bits use the NIno* functions.
-        - Set up the new ntfs inode fields and state bits in
-          fs/ntfs/inode.c::ntfs_read_inode() and add appropriate cleanup of
-          allocated memory to __ntfs_clear_inode().
-        - Cleanup ntfs_inode structure a bit for better ordering of elements
-          w.r.t. their size to allow better packing of the structure in memory.
-
-2.0.10 - There can only be 2^32 - 1 inodes on an NTFS volume.
-
-        - Add check at mount time to verify that the number of inodes on the
-          volume does not exceed 2^32 - 1, which is the maximum allowed for
-          NTFS according to Microsoft.
-        - Change mft_no member of ntfs_inode structure to be unsigned long.
-          Update all users. This makes ntfs_inode->mft_no just a copy of struct
-          inode->i_ino. But we can't just always use struct inode->i_ino and
-          remove mft_no because extent inodes do not have an attached struct
-          inode.
-
-2.0.9 - Decompression engine now uses a single buffer and other cleanups.
-
-        - Change decompression engine to use a single buffer protected by a
-          spin lock instead of per-CPU buffers. (Rusty Russell)
-        - Do not update cb_pos when handling a partial final page during
-          decompression of a sparse compression block, as the value is later
-          reset without being read/used. (Rusty Russell)
-        - Switch to using the new KM_BIO_SRC_IRQ for atomic kmap()s. (Andrew
-          Morton)
-        - Change buffer size in ntfs_readdir()/ntfs_filldir() to use
-          NLS_MAX_CHARSET_SIZE which makes the buffers almost 1kiB each but
-          it also makes everything safer so it is a good thing.
-        - Miscellaneous minor cleanups to comments.
-
-2.0.8 - Major updates for handling of case sensitivity and dcache aliasing.
-
-        Big thanks go to Al Viro and other inhabitants of #kernel for investing
-        their time to discuss the case sensitivity and dcache aliasing issues.
-
-        - Remove unused source file fs/ntfs/attraops.c.
-        - Remove show_inodes mount option(s), thus dropping support for
-          displaying of short file names.
-        - Remove deprecated mount option posix.
-        - Restore show_sys_files mount option.
-        - Add new mount option case_sensitive, to determine if the driver
-          treats file names as case sensitive or not. If case sensitive, create
-          file names in the POSIX namespace. Otherwise create file names in the
-          LONG/WIN32 namespace. Note, files remain accessible via their short
-          file name, if it exists.
-        - Remove really dumb logic bug in boot sector recovery code.
-        - Fix dcache aliasing issues wrt short/long file names via changes
-          to fs/ntfs/dir.c::ntfs_lookup_inode_by_name() and
-          fs/ntfs/namei.c::ntfs_lookup():
-          - Add additional argument to ntfs_lookup_inode_by_name() in which we
-            return information about the matching file name if the case is not
-            matching or the match is a short file name. See comments above the
-            function definition for details.
-          - Change ntfs_lookup() to only create dcache entries for the correctly
-            cased file name and only for the WIN32 namespace counterpart of DOS
-            namespace file names. This ensures we have only one dentry per
-            directory and also removes all dcache aliasing issues between short
-            and long file names once we add write support. See comments above
-            function for details.
-        - Fix potential 1 byte overflow in fs/ntfs/unistr.c::ntfs_ucstonls().
-
-2.0.7 - Minor cleanups and updates for changes in core kernel code.
-
-        - Remove much of the NULL struct element initializers.
-        - Various updates to make compatible with recent kernels.
-        - Remove defines of MAX_BUF_PER_PAGE and include linux/buffer_head.h
-          in fs/ntfs/ntfs.h instead.
-        - Remove no longer needed KERNEL_VERSION checks. We are now in the
-          kernel proper so they are no longer needed.
-
-2.0.6 - Major bugfix to make compatible with other kernel changes.
-
-        - Initialize the mftbmp address space properly now that there are more
-          fields in the struct address_space. This was leading to hangs and
-          oopses on umount since 2.5.12 because of changes to other parts of
-          the kernel. We probably want a kernel generic init_address_space()
-          function...
-        - Drop BKL from ntfs_readdir() after consultation with Al Viro. The
-          only caller of ->readdir() is vfs_readdir() which holds i_mutex
-          during the call, and i_mutex is sufficient protection against changes
-          in the directory inode (including ->i_size).
-        - Use generic_file_llseek() for directories (as opposed to
-          default_llseek()) as this downs i_mutex instead of the BKL which is
-          what we now need for exclusion against ->f_pos changes considering we
-          no longer take the BKL in ntfs_readdir().
-
-2.0.5 - Major bugfix. Buffer overflow in extent inode handling.
-
-        - No need to set old blocksize in super.c::ntfs_fill_super() as the
-          VFS does so via invocation of deactivate_super() calling
-          fs->fill_super() calling block_kill_super() which does it.
-        - BKL moved from VFS into dir.c::ntfs_readdir(). (Linus Torvalds)
-          -> Do we really need it? I don't think so as we have exclusion on
-          the directory ntfs_inode rw_semaphore mrec_lock. We mmight have to
-          move the ->f_pos accesses under the mrec_lock though. Check this...
-        - Fix really, really, really stupid buffer overflow in extent inode
-          handling in mft.c::map_extent_mft_record().
-
-2.0.4 - Cleanups and updates for kernel 2.5.11.
-
-        - Add documentation on how to use the MD driver to be able to use NTFS
-          stripe and volume sets in Linux and generally cleanup documentation
-          a bit.
-        Remove all uses of kdev_t in favour of struct block_device *:
-        - Change compress.c::ntfs_file_read_compressed_block() to use
-          sb_getblk() instead of getblk().
-        - Change super.c::ntfs_fill_super() to use bdev_hardsect_size() instead
-          of get_hardsect_size().
-        - No need to get old blocksize in super.c::ntfs_fill_super() as
-          fs/super.c::get_sb_bdev() already does this.
-        - Set bh->b_bdev instead of bh->b_dev throughout aops.c.
-
-2.0.3 - Small bug fixes, cleanups, and performance improvements.
-
-        - Remove some dead code from mft.c.
-        - Optimize readpage and read_block functions throughout aops.c so that
-          only initialized blocks are read. Non-initialized ones have their
-          buffer head mapped, zeroed, and set up to date, without scheduling
-          any i/o. Thanks to Al Viro for advice on how to avoid the device i/o.
-        Thanks go to Andrew Morton for spotting the below:
-        - Fix buglet in allocate_compression_buffers() error code path.
-        - Call flush_dcache_page() after modifying page cache page contents in
-          ntfs_file_readpage().
-        - Check for existence of page buffers throughout aops.c before calling
-          create_empty_buffers(). This happens when an I/O error occurs and the
-          read is retried. (It also happens once writing is implemented so that
-          needed doing anyway but I had left it for later...)
-        - Don't BUG_ON() uptodate and/or mapped buffers throughout aops.c in
-          readpage and read_block functions. Reasoning same as above (i.e. I/O
-          error retries and future write code paths.)
-
-2.0.2 - Minor updates and cleanups.
-
-        - Cleanup: rename mst.c::__post_read_mst_fixup to post_write_mst_fixup
-          and cleanup the code a bit, removing the unused size parameter.
-        - Change default fmask to 0177 and update documentation.
-        - Change attrib.c::get_attr_search_ctx() to return the search context
-          directly instead of taking the address of a pointer. A return value
-          of NULL means the allocation failed. Updated all callers
-          appropriately.
-        - Update to 2.5.9 kernel (preserving backwards compatibility) by
-          replacing all occurences of page->buffers with page_buffers(page).
-        - Fix minor bugs in runlist merging, also minor cleanup.
-        - Updates to bootsector layout and mft mirror contents descriptions.
-        - Small bug fix in error detection in unistr.c and some cleanups.
-        - Grow name buffer allocations in unistr.c in aligned mutlipled of 64
-          bytes.
-
-2.0.1 - Minor updates.
-
-        - Make default umask correspond to documentation.
-        - Improve documentation.
-        - Set default mode to include execute bit. The {u,f,d}mask can be used
-          to take it away if desired. This allows binaries to be executed from
-          a mounted ntfs partition.
-
-2.0.0 - New version number. Remove TNG from the name. Now in the kernel.
-
-        - Add kill_super, just keeping up with the vfs changes in the kernel.
-        - Repeat some changes from tng-0.0.8 that somehow got lost on the way
-          from the CVS import into BitKeeper.
-        - Begin to implement proper handling of allocated_size vs
-          initialized_size vs data_size (i.e. i_size). Done are
-          mft.c::ntfs_mft_readpage(), aops.c::end_buffer_read_index_async(),
-          and attrib.c::load_attribute_list().
-        - Lock the runlist in attrib.c::load_attribute_list() while using it.
-        - Fix memory leak in ntfs_file_read_compressed_block() and generally
-          clean up compress.c a little, removing some uncommented/unused debug
-          code.
-        - Tidy up dir.c a little bit.
-        - Don't bother getting the runlist in inode.c::ntfs_read_inode().
-        - Merge mft.c::ntfs_mft_readpage() and aops.c::ntfs_index_readpage()
-          creating aops.c::ntfs_mst_readpage(), improving the handling of
-          holes and overflow in the process and implementing the correct
-          equivalent of ntfs_file_get_block() in ntfs_mst_readpage() itself.
-          I am aiming for correctness at the moment. Modularisation can come
-          later.
-        - Rename aops.c::end_buffer_read_index_async() to
-          end_buffer_read_mst_async() and optimize the overflow checking and
-          handling.
-        - Use the host of the mftbmp address space mapping to hold the ntfs
-          volume. This is needed so the async i/o completion handler can
-          retrieve a pointer to the volume. Hopefully this will not cause
-          problems elsewhere in the kernel... Otherwise will need to use a
-          fake inode.
-        - Complete implementation of proper handling of allocated_size vs
-          initialized_size vs data_size (i.e. i_size) in whole driver.
-          Basically aops.c is now completely rewritten.
-        - Change NTFS driver name to just NTFS and set version number to 2.0.0
-          to make a clear distinction from the old driver which is still on
-          version 1.1.22.
-
-tng-0.0.8 - 08/03/2002 - Now using BitKeeper, http://linux-ntfs.bkbits.net/
-
-        - Replace bdevname(sb->s_dev) with sb->s_id.
-        - Remove now superfluous new-line characters in all callers of
-          ntfs_debug().
-        - Apply kludge in ntfs_read_inode(), setting i_nlink to 1 for
-          directories. Without this the "find" utility gets very upset which is
-          fair enough as Linux/Unix do not support directory hard links.
-        - Further runlist merging work. (Richard Russon)
-        - Backwards compatibility for gcc-2.95. (Richard Russon)
-        - Update to kernel 2.5.5-pre1 and rediff the now tiny patch.
-        - Convert to new filesystem declaration using ->ntfs_get_sb() and
-          replacing ntfs_read_super() with ntfs_fill_super().
-        - Set s_maxbytes to MAX_LFS_FILESIZE to avoid page cache page index
-          overflow on 32-bit architectures.
-        - Cleanup upcase loading code to use ntfs_(un)map_page().
-        - Disable/reenable preemtion in critical sections of compession engine.
-        - Replace device size determination in ntfs_fill_super() with
-          sb->s_bdev->bd_inode->i_size (in bytes) and remove now superfluous
-          function super.c::get_nr_blocks().
-        - Implement a mount time option (show_inodes) allowing choice of which
-          types of inode names readdir() returns and modify ntfs_filldir()
-          accordingly. There are several parameters to show_inodes:
-                system: system files
-                win32:  long file names (including POSIX file names) [DEFAULT]
-                long:   same as win32
-                dos:    short file names only (excluding POSIX file names)
-                short:  same as dos
-                posix:  same as both win32 and dos
-                all:    all file names
-          Note that the options are additive, i.e. specifying:
-                -o show_inodes=system,show_inodes=win32,show_inodes=dos
-          is the same as specifying:
-                -o show_inodes=all
-          Note that the "posix" and "all" options will show all directory
-          names, BUT the link count on each directory inode entry is set to 1,
-          due to Linux not supporting directory hard links. This may well
-          confuse some userspace applications, since the directory names will
-          have the same inode numbers. Thus it is NOT advisable to use the
-          "posix" or "all" options. We provide them only for completeness sake.
-        - Add copies of allocated_size, initialized_size, and compressed_size to
-          the ntfs inode structure and set them up in
-          inode.c::ntfs_read_inode(). These reflect the unnamed data attribute
-          for files and the index allocation attribute for directories.
-        - Add copies of allocated_size and initialized_size to ntfs inode for
-          $BITMAP attribute of large directories and set them up in
-          inode.c::ntfs_read_inode().
-        - Add copies of allocated_size and initialized_size to ntfs volume for
-          $BITMAP attribute of $MFT and set them up in
-          super.c::load_system_files().
-        - Parse deprecated ntfs driver options (iocharset, show_sys_files,
-          posix, and utf8) and tell user what the new options to use are. Note
-          we still do support them but they will be removed with kernel 2.7.x.
-        - Change all occurences of integer long long printf formatting to hex
-          as printk() will not support long long integer format if/when the
-          div64 patch goes into the kernel.
-        - Make slab caches have stable names and change the names to what they
-          were intended to be. These changes are required/made possible by the
-          new slab cache name handling which removes the length limitation by
-          requiring the caller of kmem_cache_create() to supply a stable name
-          which is then referenced but not copied.
-        - Rename run_list structure to run_list_element and create a new
-          run_list structure containing a pointer to a run_list_element
-          structure and a read/write semaphore. Adapt all users of runlists
-          to new scheme and take and release the lock as needed. This fixes a
-          nasty race as the run_list changes even when inodes are locked for
-          reading and even when the inode isn't locked at all, so we really
-          needed the serialization. We use a semaphore rather than a spinlock
-          as memory allocations can sleep and doing everything GFP_ATOMIC
-          would be silly.
-        - Cleanup read_inode() removing all code checking for lowest_vcn != 0.
-          This can never happen due to the nature of lookup_attr() and how we
-          support attribute lists. If it did happen it would imply the inode
-          being corrupt.
-        - Check for lowest_vcn != 0 in ntfs_read_inode() and mark the inode as
-          bad if found.
-        - Update to 2.5.6-pre2 changes in struct address_space.
-        - Use parent_ino() when accessing d_parent inode number in dir.c.
-        - Import Sourceforge CVS repository into BitKeeper repository:
-                http://linux-ntfs.bkbits.net/ntfs-tng-2.5
-        - Update fs/Makefile, fs/Config.help, fs/Config.in, and
-          Documentation/filesystems/ntfs.txt for NTFS TNG.
-        - Create kernel configuration option controlling whether debugging
-          is enabled or not.
-        - Add the required export of end_buffer_io_sync() from the patches
-          directory to the kernel code.
-        - Update inode.c::ntfs_show_options() with show_inodes mount option.
-        - Update errors mount option.
-
-tng-0.0.7 - 13/02/2002 - The driver is now feature complete for read-only!
-
-        - Cleanup mft.c and it's debug/error output in particular. Fix a minor
-          bug in mapping of extent inodes. Update all the comments to fit all
-          the recent code changes.
-        - Modify vcn_to_lcn() to cope with entirely unmapped runlists.
-        - Cleanups in compress.c, mostly comments and folding help.
-        - Implement attrib.c::map_run_list() as a generic helper.
-        - Make compress.c::ntfs_file_read_compressed_block() use map_run_list()
-          thus making code shorter and enabling attribute list support.
-        - Cleanup incorrect use of [su]64 with %L printf format specifier in
-          all source files. Type casts to [unsigned] long long added to correct
-          the mismatches (important for architectures which have long long not
-          being 64 bits).
-        - Merge async io completion handlers for directory indexes and $MFT
-          data into one by setting the index_block_size{_bits} of the ntfs
-          inode for $MFT to the mft_record_size{_bits} of the ntfs_volume.
-        - Cleanup aops.c, update comments.
-        - Make ntfs_file_get_block() use map_run_list() so all files now
-          support attribute lists.
-        - Make ntfs_dir_readpage() almost verbatim copy of
-          block_read_full_page() by using ntfs_file_get_block() with only real
-          difference being the use of our own async io completion handler
-          rather than the default one, thus reducing the amount of code and
-          automatically enabling attribute list support for directory indices.
-        - Fix bug in load_attribute_list() - forgot to call brelse in error
-          code path.
-        - Change parameters to find_attr() and lookup_attr(). We no longer
-          pass in the upcase table and its length. These can be gotten from
-          ctx->ntfs_ino->vol->upcase{_len}. Update all callers.
-        - Cleanups in attrib.c.
-        - Implement merging of runlists, attrib.c::merge_run_lists() and its
-          helpers. (Richard Russon)
-        - Attribute lists part 2, attribute extents and multi part runlists:
-          enable proper support for LCN_RL_NOT_MAPPED and automatic mapping of
-          further runlist parts via attrib.c::map_run_list().
-        - Tiny endianness bug fix in decompress_mapping_pairs().
-
-tng-0.0.6 - Encrypted directories, bug fixes, cleanups, debugging enhancements.
-
-        - Enable encrypted directories. (Their index root is marked encrypted
-          to indicate that new files in that directory should be created
-          encrypted.)
-        - Fix bug in NInoBmpNonResident() macro. (Cut and paste error.)
-        - Enable $Extend system directory. Most (if not all) extended system
-          files do not have unnamed data attributes so ntfs_read_inode() had to
-          special case them but that is ok, as the special casing recovery
-          happens inside an error code path so there is zero slow down in the
-          normal fast path. The special casing is done by introducing a new
-          function inode.c::ntfs_is_extended_system_file() which checks if any
-          of the hard links in the inode point to $Extend as being their parent
-          directory and if they do we assume this is an extended system file.
-        - Create a sysctl/proc interface to allow {dis,en}abling of debug output
-          when compiled with -DDEBUG. Default is debug messages to be disabled.
-          To enable them, one writes a non-zero value to /proc/sys/fs/ntfs-debug
-          (if /proc is enabled) or uses sysctl(2) to effect the same (if sysctl
-          interface is enabled). Inspired by old ntfs driver.
-        - Add debug_msgs insmod/kernel boot parameter to set whether debug
-          messages are {dis,en}abled. This is useful to enable debug messages
-          during ntfs initialization and is the only way to activate debugging
-          when the sysctl interface is not enabled.
-        - Cleanup debug output in various places.
-        - Remove all dollar signs ($) from the source (except comments) to
-          enable compilation on architectures whose gcc compiler does not
-          support dollar signs in the names of variables/constants. Attribute
-          types now start with AT_ instead of $ and $I30 is now just I30.
-        - Cleanup ntfs_lookup() and add consistency check of sequence numbers.
-        - Load complete runlist for $MFT/$BITMAP during mount and cleanup
-          access functions. This means we now cope with $MFT/$BITMAP being
-          spread accross several mft records.
-        - Disable modification of mft_zone_multiplier on remount. We can always
-          reenable this later on if we really want to, but we will need to make
-          sure we readjust the mft_zone size / layout accordingly.
-
-tng-0.0.5 - Modernize for 2.5.x and further in line-ing with Al Viro's comments.
-
-        - Use sb_set_blocksize() instead of set_blocksize() and verify the
-          return value.
-        - Use sb_bread() instead of bread() throughout.
-        - Add index_vcn_size{_bits} to ntfs_inode structure to store the size
-          of a directory index block vcn. Apply resulting simplifications in
-          dir.c everywhere.
-        - Fix a small bug somewhere (but forgot what it was).
-        - Change ntfs_{debug,error,warning} to enable gcc to do type checking
-          on the printf-format parameter list and fix bugs reported by gcc
-          as a result. (Richard Russon)
-        - Move inode allocation strategy to Al's new stuff but maintain the
-          divorce of ntfs_inode from struct inode. To achieve this we have two
-          separate slab caches, one for big ntfs inodes containing a struct
-          inode and pure ntfs inodes and at the same time fix some faulty
-          error code paths in ntfs_read_inode().
-        - Show mount options in proc (inode.c::ntfs_show_options()).
-
-tng-0.0.4 - Big changes, getting in line with Al Viro's comments.
-
-        - Modified (un)map_mft_record functions to be common for read and write
-          case. To specify which is which, added extra parameter at front of
-          parameter list. Pass either READ or WRITE to this, each has the
-          obvious meaning.
-        - General cleanups to allow for easier folding in vi.
-        - attrib.c::decompress_mapping_pairs() now accepts the old runlist
-          argument, and invokes attrib.c::merge_run_lists() to merge the old
-          and the new runlists.
-        - Removed attrib.c::find_first_attr().
-        - Implemented loading of attribute list and complete runlist for $MFT.
-          This means we now cope with $MFT being spread across several mft
-          records.
-        - Adapt to 2.5.2-pre9 and the changed create_empty_buffers() syntax.
-        - Adapt major/minor/kdev_t/[bk]devname stuff to new 2.5.x kernels.
-        - Make ntfs_volume be allocated via kmalloc() instead of using a slab
-          cache. There are too little ntfs_volume structures at any one time
-          to justify a private slab cache.
-        - Fix bogus kmap() use in async io completion. Now use kmap_atomic().
-          Use KM_BIO_IRQ on advice from IRC/kernel...
-        - Use ntfs_map_page() in map_mft_record() and create ->readpage method
-          for reading $MFT (ntfs_mft_readpage). In the process create dedicated
-          address space operations (ntfs_mft_aops) for $MFT inode mapping. Also
-          removed the now superfluous exports from the kernel core patch.
-        - Fix a bug where kfree() was used instead of ntfs_free().
-        - Change map_mft_record() to take ntfs_inode as argument instead of
-          vfs inode. Dito for unmap_mft_record(). Adapt all callers.
-        - Add pointer to ntfs_volume to ntfs_inode.
-        - Add mft record number and sequence number to ntfs_inode. Stop using
-          i_ino and i_generation for in-driver purposes.
-        - Implement attrib.c::merge_run_lists(). (Richard Russon)
-        - Remove use of proper inodes by extent inodes. Move i_ino and
-          i_generation to ntfs_inode to do this. Apply simplifications that
-          result and remove iget_no_wait(), etc.
-        - Pass ntfs_inode everywhere in the driver (used to be struct inode).
-        - Add reference counting in ntfs_inode for the ntfs inode itself and
-          for the mapped mft record.
-        - Extend mft record mapping so we can (un)map extent mft records (new
-          functions (un)map_extent_mft_record), and so mappings are reference
-          counted and don't have to happen twice if already mapped - just ref
-          count increases.
-        - Add -o iocharset as alias to -o nls for backwards compatibility.
-        - The latest core patch is now tiny. In fact just a single additional
-          export is necessary over the base kernel.
-
-tng-0.0.3 - Cleanups, enhancements, bug fixes.
-
-        - Work on attrib.c::decompress_mapping_pairs() to detect base extents
-          and setup the runlist appropriately using knowledge provided by the
-          sizes in the base attribute record.
-        - Balance the get_/put_attr_search_ctx() calls so we don't leak memory
-          any more.
-        - Introduce ntfs_malloc_nofs() and ntfs_free() to allocate/free a single
-          page or use vmalloc depending on the amount of memory requested.
-        - Cleanup error output. The __FUNCTION__ "(): " is now added
-          automatically. Introduced a new header file debug.h to support this
-          and also moved ntfs_debug() function into it.
-        - Make reading of compressed files more intelligent and especially get
-          rid of the vmalloc_nofs() from readpage(). This now uses per CPU
-          buffers (allocated at first mount with cluster size <= 4kiB and
-          deallocated on last umount with cluster size <= 4kiB), and
-          asynchronous io for the compressed data using a list of buffer heads.
-          Er, we use synchronous io as async io only works on whole pages
-          covered by buffers and not on individual buffer heads...
-        - Bug fix for reading compressed files with sparse compression blocks.
-
-tng-0.0.2 - Now handles larger/fragmented/compressed volumes/files/dirs.
-
-        - Fixed handling of directories when cluster size exceeds index block
-          size.
-        - Hide DOS only name space directory entries from readdir() but allow
-          them in lookup(). This should fix the problem that Linux doesn't
-          support directory hard links, while still allowing access to entries
-          via their short file name. This also has the benefit of mimicking
-          what Windows users are used to, so it is the ideal solution.
-        - Implemented sync_page everywhere so no more hangs in D state when
-          waiting for a page.
-        - Stop using bforget() in favour of brelse().
-        - Stop locking buffers unnecessarily.
-        - Implemented compressed files (inode->mapping contains uncompressed
-          data, raw compressed data is currently bread() into a vmalloc()ed
-          memory buffer).
-        - Enable compressed directories. (Their index root is marked compressed
-          to indicate that new files in that directory should be created
-          compressed.)
-        - Use vsnprintf rather than vsprintf in the ntfs_error and ntfs_warning
-          functions. (Thanks to Will Dyson for pointing this out.)
-        - Moved the ntfs_inode and ntfs_volume (the former ntfs_inode_info and
-          ntfs_sb_info) out of the common inode and super_block structures and
-          started using the generic_ip and generic_sbp pointers instead. This
-          makes ntfs entirely private with respect to the kernel tree.
-        - Detect compiler version and abort with error message if gcc less than
-          2.96 is used.
-        - Fix bug in name comparison function in unistr.c.
-        - Implement attribute lists part 1, the infrastructure: search contexts
-          and operations, find_external_attr(), lookup_attr()) and make the
-          code use the infrastructure.
-        - Fix stupid buffer overflow bug that became apparent on larger run
-          list containing attributes.
-        - Fix bugs in readdir() that became apparent on larger directories.
-
-        The driver is now really useful and survives the test
-                find . -type f -exec md5sum "{}" \;
-        without any error messages on a over 1GiB sized partition with >16k
-        files on it, including compressed files and directories and many files
-        and directories with attribute lists.
-
-tng-0.0.1 - The first useful version.
-
-        - Added ntfs_lookup().
-        - Added default upcase generation and handling.
-        - Added compile options to be shown on module init.
-        - Many bug fixes that were "hidden" before.
-        - Update to latest kernel.
-        - Added ntfs_readdir().
-        - Added file operations for mmap(), read(), open() and llseek(). We just
-          use the generic ones. The whole point of going through implementing
-          readpage() methods and where possible get_block() call backs is that
-          this allows us to make use of the generic high level methods provided
-          by the kernel.
-
-        The driver is now actually useful! Yey. (-: It undoubtedly has got bugs
-        though and it doesn't implement accesssing compressed files yet. Also,
-        accessing files with attribute list attributes is not implemented yet
-        either. But for small or simple filesystems it should work and allow
-        you to list directories, use stat on directory entries and the file
-        system, open, read, mmap and llseek around in files. A big mile stone
-        has been reached!
-
-tng-0.0.0 - Initial version tag.
-
-        Initial driver implementation. The driver can mount and umount simple
-        NTFS filesystems (i.e. ones without attribute lists in the system
-        files). If the mount fails there might be problems in the error handling
-        code paths, so be warned. Otherwise it seems to be loading the system
-        files nicely and the mft record read mapping/unmapping seems to be
-        working nicely, too. Proof of inode metadata in the page cache and non-
-        resident file unnamed stream data in the page cache concepts is thus
-        complete.
diff --git a/fs/ocfs2/cluster/tcp.c b/fs/ocfs2/cluster/tcp.c
index d8d0c65ac03c..73e743eea2c8 100644
--- a/fs/ocfs2/cluster/tcp.c
+++ b/fs/ocfs2/cluster/tcp.c
@@ -72,9 +72,9 @@
 
 #include "tcp_internal.h"
 
-#define SC_NODEF_FMT "node %s (num %u) at %u.%u.%u.%u:%u"
+#define SC_NODEF_FMT "node %s (num %u) at %pI4:%u"
 #define SC_NODEF_ARGS(sc) sc->sc_node->nd_name, sc->sc_node->nd_num,    \
-                          NIPQUAD(sc->sc_node->nd_ipv4_address),        \
+                          &sc->sc_node->nd_ipv4_address,                \
                           ntohs(sc->sc_node->nd_ipv4_port)
 
 /*
diff --git a/fs/ocfs2/dlmglue.c b/fs/ocfs2/dlmglue.c
index 8298608d4165..50c4ee805da4 100644
--- a/fs/ocfs2/dlmglue.c
+++ b/fs/ocfs2/dlmglue.c
@@ -1881,7 +1881,7 @@ out:
  * ocfs2_file_lock() and ocfs2_file_unlock() map to a single pair of
  * flock() calls. The locking approach this requires is sufficiently
  * different from all other cluster lock types that we implement a
- * seperate path to the "low-level" dlm calls. In particular:
+ * separate path to the "low-level" dlm calls. In particular:
  *
  * - No optimization of lock levels is done - we take at exactly
  *   what's been requested.
diff --git a/fs/ocfs2/extent_map.c b/fs/ocfs2/extent_map.c
index 5328529e7fd2..c562a7581cf9 100644
--- a/fs/ocfs2/extent_map.c
+++ b/fs/ocfs2/extent_map.c
@@ -453,7 +453,7 @@ static int ocfs2_get_clusters_nocache(struct inode *inode,
         if (i == -1) {
                 /*
                  * Holes can be larger than the maximum size of an
-                 * extent, so we return their lengths in a seperate
+                 * extent, so we return their lengths in a separate
                  * field.
                  */
                 if (hole_len) {
diff --git a/fs/qnx4/inode.c b/fs/qnx4/inode.c
index ebf3440d28ca..277575ddc05c 100644
--- a/fs/qnx4/inode.c
+++ b/fs/qnx4/inode.c
@@ -201,7 +201,8 @@ static const char *qnx4_checkroot(struct super_block *sb)
                                 rootdir = (struct qnx4_inode_entry *) (bh->b_data + i * QNX4_DIR_ENTRY_SIZE);
                                 if (rootdir->di_fname != NULL) {
                                         QNX4DEBUG((KERN_INFO "rootdir entry found : [%s]\n", rootdir->di_fname));
-                                        if (!strncmp(rootdir->di_fname, QNX4_BMNAME, sizeof QNX4_BMNAME)) {
+                                        if (!strcmp(rootdir->di_fname,
+                                                    QNX4_BMNAME)) {
                                                 found = 1;
                                                 qnx4_sb(sb)->BitMap = kmalloc( sizeof( struct qnx4_inode_entry ), GFP_KERNEL );
                                                 if (!qnx4_sb(sb)->BitMap) {
diff --git a/fs/reiserfs/bitmap.c b/fs/reiserfs/bitmap.c
index dc014f7def05..483442e66ed6 100644
--- a/fs/reiserfs/bitmap.c
+++ b/fs/reiserfs/bitmap.c
@@ -169,7 +169,7 @@ static int scan_bitmap_block(struct reiserfs_transaction_handle *th,
                         return 0;       // No free blocks in this bitmap
                 }
 
-                /* search for a first zero bit -- beggining of a window */
+                /* search for a first zero bit -- beginning of a window */
                 *beg = reiserfs_find_next_zero_le_bit
                     ((unsigned long *)(bh->b_data), boundary, *beg);
 
diff --git a/fs/select.c b/fs/select.c
index 73715e90030f..500a669f7790 100644
--- a/fs/select.c
+++ b/fs/select.c
@@ -691,6 +691,23 @@ SYSCALL_DEFINE6(pselect6, int, n, fd_set __user *, inp, fd_set __user *, outp,
 }
 #endif /* HAVE_SET_RESTORE_SIGMASK */
 
+#ifdef __ARCH_WANT_SYS_OLD_SELECT
+struct sel_arg_struct {
+        unsigned long n;
+        fd_set __user *inp, *outp, *exp;
+        struct timeval __user *tvp;
+};
+
+SYSCALL_DEFINE1(old_select, struct sel_arg_struct __user *, arg)
+{
+        struct sel_arg_struct a;
+
+        if (copy_from_user(&a, arg, sizeof(a)))
+                return -EFAULT;
+        return sys_select(a.n, a.inp, a.outp, a.exp, a.tvp);
+}
+#endif
+
 struct poll_list {
         struct poll_list *next;
         int len;
diff --git a/fs/udf/inode.c b/fs/udf/inode.c
index a00602b2e32d..bb863fe579ac 100644
--- a/fs/udf/inode.c
+++ b/fs/udf/inode.c
@@ -106,7 +106,7 @@ void udf_clear_inode(struct inode *inode)
         if (iinfo->i_alloc_type != ICBTAG_FLAG_AD_IN_ICB &&
             inode->i_size != iinfo->i_lenExtents) {
                 printk(KERN_WARNING "UDF-fs (%s): Inode %lu (mode %o) has "
-                        "inode size %llu different from extent lenght %llu. "
+                        "inode size %llu different from extent length %llu. "
                         "Filesystem need not be standards compliant.\n",
                         inode->i_sb->s_id, inode->i_ino, inode->i_mode,
                         (unsigned long long)inode->i_size,
diff --git a/fs/ufs/super.c b/fs/ufs/super.c
index 66b63a751615..14743d935a93 100644
--- a/fs/ufs/super.c
+++ b/fs/ufs/super.c
@@ -1016,6 +1016,9 @@ magic_found:
                 case UFS_FSSTABLE:
                         UFSD("fs is stable\n");
                         break;
+                case UFS_FSLOG:
+                        UFSD("fs is logging fs\n");
+                        break;
                 case UFS_FSOSF1:
                         UFSD("fs is DEC OSF/1\n");
                         break;
diff --git a/fs/ufs/ufs_fs.h b/fs/ufs/ufs_fs.h
index 54bde1895a80..6943ec677c0b 100644
--- a/fs/ufs/ufs_fs.h
+++ b/fs/ufs/ufs_fs.h
@@ -138,6 +138,7 @@ typedef __u16 __bitwise __fs16;
 
 #define UFS_USEEFT  ((__u16)65535)
 
+/* fs_clean values */
 #define UFS_FSOK      0x7c269d38
 #define UFS_FSACTIVE  ((__s8)0x00)
 #define UFS_FSCLEAN   ((__s8)0x01)
@@ -145,6 +146,11 @@ typedef __u16 __bitwise __fs16;
 #define UFS_FSOSF1    ((__s8)0x03)      /* is this correct for DEC OSF/1? */
 #define UFS_FSBAD     ((__s8)0xff)
 
+/* Solaris-specific fs_clean values */
+#define UFS_FSSUSPEND ((__s8)0xfe)      /* temporarily suspended */
+#define UFS_FSLOG     ((__s8)0xfd)      /* logging fs */
+#define UFS_FSFIX     ((__s8)0xfc)      /* being repaired while mounted */
+
 /* From here to next blank line, s_flags for ufs_sb_info */
 /* directory entry encoding */
 #define UFS_DE_MASK             0x00000010      /* mask for the following */
@@ -227,11 +233,16 @@ typedef __u16 __bitwise __fs16;
  */
 #define ufs_cbtocylno(bno) \
         ((bno) * uspi->s_nspf / uspi->s_spc)
-#define ufs_cbtorpos(bno) \
+#define ufs_cbtorpos(bno)                                     \
+        ((UFS_SB(sb)->s_flags & UFS_CG_SUN) ?                 \
+         (((((bno) * uspi->s_nspf % uspi->s_spc) %            \
+            uspi->s_nsect) *                                  \
+           uspi->s_nrpos) / uspi->s_nsect)                    \
+         :                                                    \
         ((((bno) * uspi->s_nspf % uspi->s_spc / uspi->s_nsect \
         * uspi->s_trackskew + (bno) * uspi->s_nspf % uspi->s_spc \
         % uspi->s_nsect * uspi->s_interleave) % uspi->s_nsect \
-        * uspi->s_nrpos) / uspi->s_npsect)
+          * uspi->s_nrpos) / uspi->s_npsect))
 
 /*
  * The following macros optimize certain frequently calculated
diff --git a/include/asm-generic/pci-dma-compat.h b/include/asm-generic/pci-dma-compat.h
index 37b3706226e7..1437b7da09b2 100644
--- a/include/asm-generic/pci-dma-compat.h
+++ b/include/asm-generic/pci-dma-compat.h
@@ -6,9 +6,6 @@
 
 #include <linux/dma-mapping.h>
 
-/* note pci_set_dma_mask isn't here, since it's a public function
- * exported from drivers/pci, use dma_supported instead */
-
 static inline int
 pci_dma_supported(struct pci_dev *hwdev, u64 mask)
 {
@@ -104,4 +101,16 @@ pci_dma_mapping_error(struct pci_dev *pdev, dma_addr_t dma_addr)
         return dma_mapping_error(&pdev->dev, dma_addr);
 }
 
+#ifdef CONFIG_PCI
+static inline int pci_set_dma_mask(struct pci_dev *dev, u64 mask)
+{
+        return dma_set_mask(&dev->dev, mask);
+}
+
+static inline int pci_set_consistent_dma_mask(struct pci_dev *dev, u64 mask)
+{
+        return dma_set_coherent_mask(&dev->dev, mask);
+}
+#endif
+
 #endif
diff --git a/include/linux/acct.h b/include/linux/acct.h
index 882dc7248766..3e4737fa6cce 100644
--- a/include/linux/acct.h
+++ b/include/linux/acct.h
@@ -121,16 +121,15 @@ struct vfsmount;
 struct super_block;
 struct pacct_struct;
 struct pid_namespace;
+extern int acct_parm[]; /* for sysctl */
 extern void acct_auto_close_mnt(struct vfsmount *m);
 extern void acct_auto_close(struct super_block *sb);
-extern void acct_init_pacct(struct pacct_struct *pacct);
 extern void acct_collect(long exitcode, int group_dead);
 extern void acct_process(void);
 extern void acct_exit_ns(struct pid_namespace *);
 #else
 #define acct_auto_close_mnt(x)  do { } while (0)
 #define acct_auto_close(x)      do { } while (0)
-#define acct_init_pacct(x)      do { } while (0)
 #define acct_collect(x,y)       do { } while (0)
 #define acct_process()          do { } while (0)
 #define acct_exit_ns(ns)        do { } while (0)
diff --git a/include/linux/cgroup.h b/include/linux/cgroup.h
index c9bbcb2a75ae..b8ad1ea99586 100644
--- a/include/linux/cgroup.h
+++ b/include/linux/cgroup.h
@@ -37,16 +37,24 @@ extern void cgroup_post_fork(struct task_struct *p);
 extern void cgroup_exit(struct task_struct *p, int run_callbacks);
 extern int cgroupstats_build(struct cgroupstats *stats,
                                 struct dentry *dentry);
+extern int cgroup_load_subsys(struct cgroup_subsys *ss);
+extern void cgroup_unload_subsys(struct cgroup_subsys *ss);
 
 extern const struct file_operations proc_cgroup_operations;
 
-/* Define the enumeration of all cgroup subsystems */
+/* Define the enumeration of all builtin cgroup subsystems */
 #define SUBSYS(_x) _x ## _subsys_id,
 enum cgroup_subsys_id {
 #include <linux/cgroup_subsys.h>
-        CGROUP_SUBSYS_COUNT
+        CGROUP_BUILTIN_SUBSYS_COUNT
 };
 #undef SUBSYS
+/*
+ * This define indicates the maximum number of subsystems that can be loaded
+ * at once. We limit to this many since cgroupfs_root has subsys_bits to keep
+ * track of all of them.
+ */
+#define CGROUP_SUBSYS_COUNT (BITS_PER_BYTE*sizeof(unsigned long))
 
 /* Per-subsystem/per-cgroup state maintained by the system. */
 struct cgroup_subsys_state {
@@ -76,6 +84,12 @@ enum {
         CSS_REMOVED, /* This CSS is dead */
 };
 
+/* Caller must verify that the css is not for root cgroup */
+static inline void __css_get(struct cgroup_subsys_state *css, int count)
+{
+        atomic_add(count, &css->refcnt);
+}
+
 /*
  * Call css_get() to hold a reference on the css; it can be used
  * for a reference obtained via:
@@ -87,7 +101,7 @@ static inline void css_get(struct cgroup_subsys_state *css)
 {
         /* We don't need to reference count the root state */
         if (!test_bit(CSS_ROOT, &css->flags))
-                atomic_inc(&css->refcnt);
+                __css_get(css, 1);
 }
 
 static inline bool css_is_removed(struct cgroup_subsys_state *css)
@@ -118,11 +132,11 @@ static inline bool css_tryget(struct cgroup_subsys_state *css)
  * css_get() or css_tryget()
  */
 
-extern void __css_put(struct cgroup_subsys_state *css);
+extern void __css_put(struct cgroup_subsys_state *css, int count);
 static inline void css_put(struct cgroup_subsys_state *css)
 {
         if (!test_bit(CSS_ROOT, &css->flags))
-                __css_put(css);
+                __css_put(css, 1);
 }
 
 /* bits in struct cgroup flags field */
@@ -221,6 +235,10 @@ struct cgroup {
 
         /* For RCU-protected deletion */
         struct rcu_head rcu_head;
+
+        /* List of events which userspace want to recieve */
+        struct list_head event_list;
+        spinlock_t event_list_lock;
 };
 
 /*
@@ -258,7 +276,8 @@ struct css_set {
         /*
          * Set of subsystem states, one for each subsystem. This array
          * is immutable after creation apart from the init_css_set
-         * during subsystem registration (at boot time).
+         * during subsystem registration (at boot time) and modular subsystem
+         * loading/unloading.
          */
         struct cgroup_subsys_state *subsys[CGROUP_SUBSYS_COUNT];
 
@@ -363,6 +382,23 @@ struct cftype {
         int (*trigger)(struct cgroup *cgrp, unsigned int event);
 
         int (*release)(struct inode *inode, struct file *file);
+
+        /*
+         * register_event() callback will be used to add new userspace
+         * waiter for changes related to the cftype. Implement it if
+         * you want to provide this functionality. Use eventfd_signal()
+         * on eventfd to send notification to userspace.
+         */
+        int (*register_event)(struct cgroup *cgrp, struct cftype *cft,
+                        struct eventfd_ctx *eventfd, const char *args);
+        /*
+         * unregister_event() callback will be called when userspace
+         * closes the eventfd or on cgroup removing.
+         * This callback must be implemented, if you want provide
+         * notification functionality.
+         */
+        int (*unregister_event)(struct cgroup *cgrp, struct cftype *cft,
+                        struct eventfd_ctx *eventfd);
 };
 
 struct cgroup_scanner {
@@ -428,6 +464,8 @@ struct cgroup_subsys {
         void (*destroy)(struct cgroup_subsys *ss, struct cgroup *cgrp);
         int (*can_attach)(struct cgroup_subsys *ss, struct cgroup *cgrp,
                           struct task_struct *tsk, bool threadgroup);
+        void (*cancel_attach)(struct cgroup_subsys *ss, struct cgroup *cgrp,
+                          struct task_struct *tsk, bool threadgroup);
         void (*attach)(struct cgroup_subsys *ss, struct cgroup *cgrp,
                         struct cgroup *old_cgrp, struct task_struct *tsk,
                         bool threadgroup);
@@ -472,6 +510,9 @@ struct cgroup_subsys {
         /* used when use_id == true */
         struct idr idr;
         spinlock_t id_lock;
+
+        /* should be defined only by modular subsystems */
+        struct module *module;
 };
 
 #define SUBSYS(_x) extern struct cgroup_subsys _x ## _subsys;
diff --git a/include/linux/compat.h b/include/linux/compat.h
index ef68119a4fd2..717c691ecd8e 100644
--- a/include/linux/compat.h
+++ b/include/linux/compat.h
@@ -23,6 +23,7 @@
 typedef __compat_uid32_t        compat_uid_t;
 typedef __compat_gid32_t        compat_gid_t;
 
+struct compat_sel_arg_struct;
 struct rusage;
 
 struct compat_itimerspec { 
@@ -249,6 +250,8 @@ asmlinkage long compat_sys_select(int n, compat_ulong_t __user *inp,
                 compat_ulong_t __user *outp, compat_ulong_t __user *exp,
                 struct compat_timeval __user *tvp);
 
+asmlinkage long compat_sys_old_select(struct compat_sel_arg_struct __user *arg);
+
 asmlinkage long compat_sys_wait4(compat_pid_t pid,
                                  compat_uint_t __user *stat_addr, int options,
                                  struct compat_rusage __user *ru);
diff --git a/include/linux/coredump.h b/include/linux/coredump.h
index b3c91d7cede4..8ba66a9d9022 100644
--- a/include/linux/coredump.h
+++ b/include/linux/coredump.h
@@ -16,6 +16,8 @@ static inline int dump_write(struct file *file, const void *addr, int nr)
 
 static inline int dump_seek(struct file *file, loff_t off)
 {
+        int ret = 1;
+
         if (file->f_op->llseek && file->f_op->llseek != no_llseek) {
                 if (file->f_op->llseek(file, off, SEEK_CUR) < 0)
                         return 0;
@@ -29,13 +31,15 @@ static inline int dump_seek(struct file *file, loff_t off)
 
                         if (n > PAGE_SIZE)
                                 n = PAGE_SIZE;
-                        if (!dump_write(file, buf, n))
-                                return 0;
+                        if (!dump_write(file, buf, n)) {
+                                ret = 0;
+                                break;
+                        }
                         off -= n;
                 }
                 free_page((unsigned long)buf);
         }
-        return 1;
+        return ret;
 }
 
 #endif /* _LINUX_COREDUMP_H */
diff --git a/include/linux/decompress/mm.h b/include/linux/decompress/mm.h
index 5032b9a31ae7..ad5ec1d0475e 100644
--- a/include/linux/decompress/mm.h
+++ b/include/linux/decompress/mm.h
@@ -14,11 +14,21 @@
 
 /* Code active when included from pre-boot environment: */
 
+/*
+ * Some architectures want to ensure there is no local data in their
+ * pre-boot environment, so that data can arbitarily relocated (via
+ * GOT references).  This is achieved by defining STATIC_RW_DATA to
+ * be null.
+ */
+#ifndef STATIC_RW_DATA
+#define STATIC_RW_DATA static
+#endif
+
 /* A trivial malloc implementation, adapted from
  *  malloc by Hannu Savolainen 1993 and Matthias Urlichs 1994
  */
-static unsigned long malloc_ptr;
-static int malloc_count;
+STATIC_RW_DATA unsigned long malloc_ptr;
+STATIC_RW_DATA int malloc_count;
 
 static void *malloc(int size)
 {
diff --git a/include/linux/dm9000.h b/include/linux/dm9000.h
index c30879cf93bc..96e87693d933 100644
--- a/include/linux/dm9000.h
+++ b/include/linux/dm9000.h
@@ -23,7 +23,7 @@
 #define DM9000_PLATF_NO_EEPROM  (0x0010)
 #define DM9000_PLATF_SIMPLE_PHY (0x0020)  /* Use NSR to find LinkStatus */
 
-/* platfrom data for platfrom device structure's platfrom_data field */
+/* platform data for platform device structure's platform_data field */
 
 struct dm9000_plat_data {
         unsigned int    flags;
diff --git a/include/linux/dma-mapping.h b/include/linux/dma-mapping.h
index 91b761846061..ca32ed78b057 100644
--- a/include/linux/dma-mapping.h
+++ b/include/linux/dma-mapping.h
@@ -127,6 +127,14 @@ static inline u64 dma_get_mask(struct device *dev)
         return DMA_BIT_MASK(32);
 }
 
+static inline int dma_set_coherent_mask(struct device *dev, u64 mask)
+{
+        if (!dma_supported(dev, mask))
+                return -EIO;
+        dev->coherent_dma_mask = mask;
+        return 0;
+}
+
 extern u64 dma_get_required_mask(struct device *dev);
 
 static inline unsigned int dma_get_max_seg_size(struct device *dev)
@@ -232,4 +240,20 @@ struct dma_attrs;
 
 #endif /* CONFIG_HAVE_DMA_ATTRS */
 
+#ifdef CONFIG_NEED_DMA_MAP_STATE
+#define DEFINE_DMA_UNMAP_ADDR(ADDR_NAME)        dma_addr_t ADDR_NAME
+#define DEFINE_DMA_UNMAP_LEN(LEN_NAME)          __u32 LEN_NAME
+#define dma_unmap_addr(PTR, ADDR_NAME)           ((PTR)->ADDR_NAME)
+#define dma_unmap_addr_set(PTR, ADDR_NAME, VAL)  (((PTR)->ADDR_NAME) = (VAL))
+#define dma_unmap_len(PTR, LEN_NAME)             ((PTR)->LEN_NAME)
+#define dma_unmap_len_set(PTR, LEN_NAME, VAL)    (((PTR)->LEN_NAME) = (VAL))
+#else
+#define DEFINE_DMA_UNMAP_ADDR(ADDR_NAME)
+#define DEFINE_DMA_UNMAP_LEN(LEN_NAME)
+#define dma_unmap_addr(PTR, ADDR_NAME)           (0)
+#define dma_unmap_addr_set(PTR, ADDR_NAME, VAL)  do { } while (0)
+#define dma_unmap_len(PTR, LEN_NAME)             (0)
+#define dma_unmap_len_set(PTR, LEN_NAME, VAL)    do { } while (0)
+#endif
+
 #endif
diff --git a/include/linux/hil.h b/include/linux/hil.h
index 13352d7d0caf..523785a9de70 100644
--- a/include/linux/hil.h
+++ b/include/linux/hil.h
@@ -168,14 +168,14 @@ enum hil_command {
         HIL_CMD_PR6     = 0x45, /* Prompt6 */
         HIL_CMD_PR7     = 0x46, /* Prompt7 */
         HIL_CMD_PRM     = 0x47, /* Prompt (General Purpose) */
-        HIL_CMD_AK1     = 0x48, /* Acknowlege1 */  
-        HIL_CMD_AK2     = 0x49, /* Acknowlege2 */
-        HIL_CMD_AK3     = 0x4a, /* Acknowlege3 */
-        HIL_CMD_AK4     = 0x4b, /* Acknowlege4 */
-        HIL_CMD_AK5     = 0x4c, /* Acknowlege5 */
-        HIL_CMD_AK6     = 0x4d, /* Acknowlege6 */
-        HIL_CMD_AK7     = 0x4e, /* Acknowlege7 */
-        HIL_CMD_ACK     = 0x4f, /* Acknowlege (General Purpose) */
+        HIL_CMD_AK1     = 0x48, /* Acknowledge1 */  
+        HIL_CMD_AK2     = 0x49, /* Acknowledge2 */
+        HIL_CMD_AK3     = 0x4a, /* Acknowledge3 */
+        HIL_CMD_AK4     = 0x4b, /* Acknowledge4 */
+        HIL_CMD_AK5     = 0x4c, /* Acknowledge5 */
+        HIL_CMD_AK6     = 0x4d, /* Acknowledge6 */
+        HIL_CMD_AK7     = 0x4e, /* Acknowledge7 */
+        HIL_CMD_ACK     = 0x4f, /* Acknowledge (General Purpose) */
 
         /* 0x50 to 0x78 reserved for future use  */
         /* 0x80 to 0xEF device-specific commands */
diff --git a/include/linux/init_task.h b/include/linux/init_task.h
index abec69b63d7e..b1ed1cd8e2a8 100644
--- a/include/linux/init_task.h
+++ b/include/linux/init_task.h
@@ -32,14 +32,6 @@ extern struct fs_struct init_fs;
 }
 
 extern struct nsproxy init_nsproxy;
-#define INIT_NSPROXY(nsproxy) {                                         \
-        .pid_ns         = &init_pid_ns,                                 \
-        .count          = ATOMIC_INIT(1),                               \
-        .uts_ns         = &init_uts_ns,                                 \
-        .mnt_ns         = NULL,                                         \
-        INIT_NET_NS(net_ns)                                             \
-        INIT_IPC_NS(ipc_ns)                                             \
-}
 
 #define INIT_SIGHAND(sighand) {                                         \
         .count          = ATOMIC_INIT(1),                               \
diff --git a/include/linux/iocontext.h b/include/linux/iocontext.h
index 1195a806fe0c..a0bb301afac0 100644
--- a/include/linux/iocontext.h
+++ b/include/linux/iocontext.h
@@ -42,7 +42,7 @@ struct io_context {
         unsigned short ioprio;
         unsigned short ioprio_changed;
 
-#ifdef CONFIG_BLK_CGROUP
+#if defined(CONFIG_BLK_CGROUP) || defined(CONFIG_BLK_CGROUP_MODULE)
         unsigned short cgroup_changed;
 #endif
 
diff --git a/include/linux/ipc_namespace.h b/include/linux/ipc_namespace.h
index 07baa38bce37..51952989ad42 100644
--- a/include/linux/ipc_namespace.h
+++ b/include/linux/ipc_namespace.h
@@ -62,11 +62,6 @@ extern struct ipc_namespace init_ipc_ns;
 extern atomic_t nr_ipc_ns;
 
 extern spinlock_t mq_lock;
-#if defined(CONFIG_POSIX_MQUEUE) || defined(CONFIG_SYSVIPC)
-#define INIT_IPC_NS(ns)         .ns             = &init_ipc_ns,
-#else
-#define INIT_IPC_NS(ns)
-#endif
 
 #ifdef CONFIG_SYSVIPC
 extern int register_ipcns_notifier(struct ipc_namespace *);
diff --git a/include/linux/ipmi_smi.h b/include/linux/ipmi_smi.h
index f7c9c75a2775..4b48318ac542 100644
--- a/include/linux/ipmi_smi.h
+++ b/include/linux/ipmi_smi.h
@@ -39,7 +39,6 @@
 #include <linux/module.h>
 #include <linux/device.h>
 #include <linux/platform_device.h>
-#include <linux/ipmi_smi.h>
 
 /* This files describes the interface for IPMI system management interface
    drivers to bind into the IPMI message handler. */
diff --git a/include/linux/kmod.h b/include/linux/kmod.h
index 384ca8bbf1ac..facb27fe7de0 100644
--- a/include/linux/kmod.h
+++ b/include/linux/kmod.h
@@ -27,6 +27,7 @@
 #define KMOD_PATH_LEN 256
 
 #ifdef CONFIG_MODULES
+extern char modprobe_path[]; /* for sysctl */
 /* modprobe exit status on success, -ve on error.  Return value
  * usually useless though. */
 extern int __request_module(bool wait, const char *name, ...) \
diff --git a/include/linux/lockdep.h b/include/linux/lockdep.h
index 10206a87da19..a03977a96d7e 100644
--- a/include/linux/lockdep.h
+++ b/include/linux/lockdep.h
@@ -12,6 +12,10 @@
 struct task_struct;
 struct lockdep_map;
 
+/* for sysctl */
+extern int prove_locking;
+extern int lock_stat;
+
 #ifdef CONFIG_LOCKDEP
 
 #include <linux/linkage.h>
diff --git a/include/linux/lru_cache.h b/include/linux/lru_cache.h
index 3a2b2d9b0472..de48d167568b 100644
--- a/include/linux/lru_cache.h
+++ b/include/linux/lru_cache.h
@@ -64,7 +64,7 @@ For crash recovery after replication node failure,
   usually the condition is softened to regions that _may_ have been target of
   in-flight WRITE IO, e.g. by only lazily clearing the on-disk write-intent
   bitmap, trading frequency of meta data transactions against amount of
-  (possibly unneccessary) resync traffic.
+  (possibly unnecessary) resync traffic.
 
   If we set a hard limit on the area that may be "hot" at any given time, we
   limit the amount of resync traffic needed for crash recovery.
diff --git a/include/linux/memcontrol.h b/include/linux/memcontrol.h
index 1f9b119f4ace..44301c6affa8 100644
--- a/include/linux/memcontrol.h
+++ b/include/linux/memcontrol.h
@@ -124,7 +124,6 @@ static inline bool mem_cgroup_disabled(void)
         return false;
 }
 
-extern bool mem_cgroup_oom_called(struct task_struct *task);
 void mem_cgroup_update_file_mapped(struct page *page, int val);
 unsigned long mem_cgroup_soft_limit_reclaim(struct zone *zone, int order,
                                                 gfp_t gfp_mask, int nid,
@@ -258,11 +257,6 @@ static inline bool mem_cgroup_disabled(void)
         return true;
 }
 
-static inline bool mem_cgroup_oom_called(struct task_struct *task)
-{
-        return false;
-}
-
 static inline int
 mem_cgroup_inactive_anon_is_low(struct mem_cgroup *memcg)
 {
diff --git a/include/linux/mm.h b/include/linux/mm.h
index 3899395a03de..e70f21beb4b4 100644
--- a/include/linux/mm.h
+++ b/include/linux/mm.h
@@ -971,7 +971,13 @@ static inline void setmax_mm_hiwater_rss(unsigned long *maxrss,
                 *maxrss = hiwater_rss;
 }
 
+#if defined(SPLIT_RSS_COUNTING)
 void sync_mm_rss(struct task_struct *task, struct mm_struct *mm);
+#else
+static inline void sync_mm_rss(struct task_struct *task, struct mm_struct *mm)
+{
+}
+#endif
 
 /*
  * A callback you can register to apply pressure to ageable caches.
@@ -1459,5 +1465,7 @@ extern void shake_page(struct page *p, int access);
 extern atomic_long_t mce_bad_pages;
 extern int soft_offline_page(struct page *page, int flags);
 
+extern void dump_page(struct page *page);
+
 #endif /* __KERNEL__ */
 #endif /* _LINUX_MM_H */
diff --git a/include/linux/mm_types.h b/include/linux/mm_types.h
index 048b46270aa5..b8bb9a6a1f37 100644
--- a/include/linux/mm_types.h
+++ b/include/linux/mm_types.h
@@ -203,7 +203,7 @@ enum {
         NR_MM_COUNTERS
 };
 
-#if USE_SPLIT_PTLOCKS
+#if USE_SPLIT_PTLOCKS && defined(CONFIG_MMU)
 #define SPLIT_RSS_COUNTING
 struct mm_rss_stat {
         atomic_long_t count[NR_MM_COUNTERS];
diff --git a/include/linux/mmzone.h b/include/linux/mmzone.h
index bc209d8b7b5c..cf9e458e96b0 100644
--- a/include/linux/mmzone.h
+++ b/include/linux/mmzone.h
@@ -342,7 +342,7 @@ struct zone {
          * prev_priority holds the scanning priority for this zone.  It is
          * defined as the scanning priority at which we achieved our reclaim
          * target at the previous try_to_free_pages() or balance_pgdat()
-         * invokation.
+         * invocation.
          *
          * We use prev_priority as a measure of how much stress page reclaim is
          * under - it drives the swappiness decision: whether to unmap mapped
diff --git a/include/linux/module.h b/include/linux/module.h
index dd618eb026aa..5e869ffd34aa 100644
--- a/include/linux/module.h
+++ b/include/linux/module.h
@@ -175,6 +175,7 @@ struct notifier_block;
 
 #ifdef CONFIG_MODULES
 
+extern int modules_disabled; /* for sysctl */
 /* Get/put a kernel symbol (calls must be symmetric) */
 void *__symbol_get(const char *symbol);
 void *__symbol_get_gpl(const char *symbol);
diff --git a/include/linux/nodemask.h b/include/linux/nodemask.h
index c4fa64b585ff..dba35e413371 100644
--- a/include/linux/nodemask.h
+++ b/include/linux/nodemask.h
@@ -483,7 +483,7 @@ static inline int num_node_state(enum node_states state)
                         type *name = kmalloc(sizeof(*name), gfp_flags)
 #define NODEMASK_FREE(m)                        kfree(m)
 #else
-#define NODEMASK_ALLOC(type, name, gfp_flags)   type _name, *name = &_name
+#define NODEMASK_ALLOC(type, name, gfp_flags)   type _##name, *name = &_##name
 #define NODEMASK_FREE(m)                        do {} while (0)
 #endif
 
diff --git a/include/linux/page_cgroup.h b/include/linux/page_cgroup.h
index b0e4eb126236..30b08136fdf3 100644
--- a/include/linux/page_cgroup.h
+++ b/include/linux/page_cgroup.h
@@ -118,6 +118,8 @@ static inline void __init page_cgroup_init_flatmem(void)
 #include <linux/swap.h>
 
 #ifdef CONFIG_CGROUP_MEM_RES_CTLR_SWAP
+extern unsigned short swap_cgroup_cmpxchg(swp_entry_t ent,
+                                        unsigned short old, unsigned short new);
 extern unsigned short swap_cgroup_record(swp_entry_t ent, unsigned short id);
 extern unsigned short lookup_swap_cgroup(swp_entry_t ent);
 extern int swap_cgroup_swapon(int type, unsigned long max_pages);
diff --git a/include/linux/pci-dma.h b/include/linux/pci-dma.h
new file mode 100644
index 000000000000..549a041f9c08
--- /dev/null
+++ b/include/linux/pci-dma.h
@@ -0,0 +1,11 @@
+#ifndef _LINUX_PCI_DMA_H
+#define _LINUX_PCI_DMA_H
+
+#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) DEFINE_DMA_UNMAP_ADDR(ADDR_NAME);
+#define DECLARE_PCI_UNMAP_LEN(LEN_NAME)   DEFINE_DMA_UNMAP_LEN(LEN_NAME);
+#define pci_unmap_addr             dma_unmap_addr
+#define pci_unmap_addr_set         dma_unmap_addr_set
+#define pci_unmap_len              dma_unmap_len
+#define pci_unmap_len_set          dma_unmap_len_set
+
+#endif
diff --git a/include/linux/pci.h b/include/linux/pci.h
index cd5809a5963e..a788fa12ff31 100644
--- a/include/linux/pci.h
+++ b/include/linux/pci.h
@@ -769,8 +769,6 @@ int pci_try_set_mwi(struct pci_dev *dev);
 void pci_clear_mwi(struct pci_dev *dev);
 void pci_intx(struct pci_dev *dev, int enable);
 void pci_msi_off(struct pci_dev *dev);
-int pci_set_dma_mask(struct pci_dev *dev, u64 mask);
-int pci_set_consistent_dma_mask(struct pci_dev *dev, u64 mask);
 int pci_set_dma_max_seg_size(struct pci_dev *dev, unsigned int size);
 int pci_set_dma_seg_boundary(struct pci_dev *dev, unsigned long mask);
 int pcix_get_max_mmrbc(struct pci_dev *dev);
@@ -904,6 +902,7 @@ int pci_set_vga_state(struct pci_dev *pdev, bool decode,
                       unsigned int command_bits, bool change_bridge);
 /* kmem_cache style wrapper around pci_alloc_consistent() */
 
+#include <linux/pci-dma.h>
 #include <linux/dmapool.h>
 
 #define pci_pool dma_pool
diff --git a/include/linux/poll.h b/include/linux/poll.h
index 6673743946f7..600cc1fde64d 100644
--- a/include/linux/poll.h
+++ b/include/linux/poll.h
@@ -10,8 +10,10 @@
 #include <linux/wait.h>
 #include <linux/string.h>
 #include <linux/fs.h>
+#include <linux/sysctl.h>
 #include <asm/uaccess.h>
 
+extern struct ctl_table epoll_table[]; /* for sysctl */
 /* ~832 bytes of stack space used max in sys_select/sys_poll before allocating
    additional memory. */
 #define MAX_STACK_ALLOC 832
diff --git a/include/linux/ptrace.h b/include/linux/ptrace.h
index c5eab89da51e..e1fb60729979 100644
--- a/include/linux/ptrace.h
+++ b/include/linux/ptrace.h
@@ -264,6 +264,9 @@ static inline void user_enable_single_step(struct task_struct *task)
 static inline void user_disable_single_step(struct task_struct *task)
 {
 }
+#else
+extern void user_enable_single_step(struct task_struct *);
+extern void user_disable_single_step(struct task_struct *);
 #endif  /* arch_has_single_step */
 
 #ifndef arch_has_block_step
@@ -291,6 +294,8 @@ static inline void user_enable_block_step(struct task_struct *task)
 {
         BUG();                  /* This can never be called.  */
 }
+#else
+extern void user_enable_block_step(struct task_struct *);
 #endif  /* arch_has_block_step */
 
 #ifdef ARCH_HAS_USER_SINGLE_STEP_INFO
diff --git a/include/linux/rbtree.h b/include/linux/rbtree.h
index 9c295411d01f..5210a5c60877 100644
--- a/include/linux/rbtree.h
+++ b/include/linux/rbtree.h
@@ -25,10 +25,10 @@
 
   Some example of insert and search follows here. The search is a plain
   normal search over an ordered tree. The insert instead must be implemented
-  int two steps: as first thing the code must insert the element in
-  order as a red leaf in the tree, then the support library function
-  rb_insert_color() must be called. Such function will do the
-  not trivial work to rebalance the rbtree if necessary.
+  in two steps: First, the code must insert the element in order as a red leaf
+  in the tree, and then the support library function rb_insert_color() must
+  be called. Such function will do the not trivial work to rebalance the
+  rbtree, if necessary.
 
 -----------------------------------------------------------------------
 static inline struct page * rb_search_page_cache(struct inode * inode,
diff --git a/include/linux/rcupdate.h b/include/linux/rcupdate.h
index c84373626336..a005cac5e302 100644
--- a/include/linux/rcupdate.h
+++ b/include/linux/rcupdate.h
@@ -41,6 +41,10 @@
 #include <linux/lockdep.h>
 #include <linux/completion.h>
 
+#ifdef CONFIG_RCU_TORTURE_TEST
+extern int rcutorture_runnable; /* for sysctl */
+#endif /* #ifdef CONFIG_RCU_TORTURE_TEST */
+
 /**
  * struct rcu_head - callback structure for use with RCU
  * @next: next update requests in a list
diff --git a/include/linux/reboot.h b/include/linux/reboot.h
index 988e55fe649b..3005d5a7fce5 100644
--- a/include/linux/reboot.h
+++ b/include/linux/reboot.h
@@ -64,6 +64,7 @@ extern void kernel_restart(char *cmd);
 extern void kernel_halt(void);
 extern void kernel_power_off(void);
 
+extern int C_A_D; /* for sysctl */
 void ctrl_alt_del(void);
 
 #define POWEROFF_CMD_PATH_LEN   256
diff --git a/include/linux/rtc.h b/include/linux/rtc.h
index 60f88a7fb13d..14dbc83ded20 100644
--- a/include/linux/rtc.h
+++ b/include/linux/rtc.h
@@ -238,6 +238,12 @@ static inline bool is_leap_year(unsigned int year)
         return (!(year % 4) && (year % 100)) || !(year % 400);
 }
 
+#ifdef CONFIG_RTC_HCTOSYS
+extern int rtc_hctosys_ret;
+#else
+#define rtc_hctosys_ret -ENODEV
+#endif
+
 #endif /* __KERNEL__ */
 
 #endif /* _LINUX_RTC_H_ */
diff --git a/include/linux/rtmutex.h b/include/linux/rtmutex.h
index 281d8fd775e8..8d522ffeda33 100644
--- a/include/linux/rtmutex.h
+++ b/include/linux/rtmutex.h
@@ -16,6 +16,8 @@
 #include <linux/plist.h>
 #include <linux/spinlock_types.h>
 
+extern int max_lock_depth; /* for sysctl */
+
 /**
  * The rt_mutex structure
  *
diff --git a/include/linux/sched.h b/include/linux/sched.h
index 46c6f8d5dc06..8d70ff802da2 100644
--- a/include/linux/sched.h
+++ b/include/linux/sched.h
@@ -1473,7 +1473,7 @@ struct task_struct {
 
         struct list_head        *scm_work_list;
 #ifdef CONFIG_FUNCTION_GRAPH_TRACER
-        /* Index of current stored adress in ret_stack */
+        /* Index of current stored address in ret_stack */
         int curr_ret_stack;
         /* Stack of return addresses for return function tracing */
         struct ftrace_ret_stack *ret_stack;
@@ -2391,9 +2391,7 @@ void thread_group_cputimer(struct task_struct *tsk, struct task_cputime *times);
 
 static inline void thread_group_cputime_init(struct signal_struct *sig)
 {
-        sig->cputimer.cputime = INIT_CPUTIME;
         spin_lock_init(&sig->cputimer.lock);
-        sig->cputimer.running = 0;
 }
 
 static inline void thread_group_cputime_free(struct signal_struct *sig)
diff --git a/include/linux/serial_core.h b/include/linux/serial_core.h
index 8c3dd36fe91a..78dd1e7120a9 100644
--- a/include/linux/serial_core.h
+++ b/include/linux/serial_core.h
@@ -491,9 +491,13 @@ uart_handle_dcd_change(struct uart_port *uport, unsigned int status)
 {
         struct uart_state *state = uport->state;
         struct tty_port *port = &state->port;
+        struct tty_ldisc *ld = tty_ldisc_ref(port->tty);
+        struct timespec ts;
 
-        uport->icount.dcd++;
+        if (ld && ld->ops->dcd_change)
+                getnstimeofday(&ts);
 
+        uport->icount.dcd++;
 #ifdef CONFIG_HARD_PPS
         if ((uport->flags & UPF_HARDPPS_CD) && status)
                 hardpps();
@@ -505,6 +509,11 @@ uart_handle_dcd_change(struct uart_port *uport, unsigned int status)
                 else if (port->tty)
                         tty_hangup(port->tty);
         }
+
+        if (ld && ld->ops->dcd_change)
+                ld->ops->dcd_change(port->tty, status, &ts);
+        if (ld)
+                tty_ldisc_deref(ld);
 }
 
 /**
diff --git a/include/linux/signal.h b/include/linux/signal.h
index ab9272cc270c..fcd2b14b1932 100644
--- a/include/linux/signal.h
+++ b/include/linux/signal.h
@@ -7,6 +7,8 @@
 #ifdef __KERNEL__
 #include <linux/list.h>
 
+/* for sysctl */
+extern int print_fatal_signals;
 /*
  * Real Time signals may be queued.
  */
diff --git a/include/linux/swap.h b/include/linux/swap.h
index a2602a8207a6..1f59d9340c4d 100644
--- a/include/linux/swap.h
+++ b/include/linux/swap.h
@@ -355,6 +355,7 @@ static inline void disable_swap_token(void)
 #ifdef CONFIG_CGROUP_MEM_RES_CTLR
 extern void
 mem_cgroup_uncharge_swapcache(struct page *page, swp_entry_t ent, bool swapout);
+extern int mem_cgroup_count_swap_user(swp_entry_t ent, struct page **pagep);
 #else
 static inline void
 mem_cgroup_uncharge_swapcache(struct page *page, swp_entry_t ent, bool swapout)
@@ -485,6 +486,14 @@ mem_cgroup_uncharge_swapcache(struct page *page, swp_entry_t ent)
 {
 }
 
+#ifdef CONFIG_CGROUP_MEM_RES_CTLR
+static inline int
+mem_cgroup_count_swap_user(swp_entry_t ent, struct page **pagep)
+{
+        return 0;
+}
+#endif
+
 #endif /* CONFIG_SWAP */
 #endif /* __KERNEL__*/
 #endif /* _LINUX_SWAP_H */
diff --git a/include/linux/syscalls.h b/include/linux/syscalls.h
index 8126f239edf0..44f2ad0e8825 100644
--- a/include/linux/syscalls.h
+++ b/include/linux/syscalls.h
@@ -23,6 +23,7 @@ struct kexec_segment;
 struct linux_dirent;
 struct linux_dirent64;
 struct list_head;
+struct mmap_arg_struct;
 struct msgbuf;
 struct msghdr;
 struct mmsghdr;
@@ -30,10 +31,13 @@ struct msqid_ds;
 struct new_utsname;
 struct nfsctl_arg;
 struct __old_kernel_stat;
+struct oldold_utsname;
+struct old_utsname;
 struct pollfd;
 struct rlimit;
 struct rusage;
 struct sched_param;
+struct sel_arg_struct;
 struct semaphore;
 struct sembuf;
 struct shmid_ds;
@@ -638,6 +642,7 @@ asmlinkage long sys_poll(struct pollfd __user *ufds, unsigned int nfds,
                                 long timeout);
 asmlinkage long sys_select(int n, fd_set __user *inp, fd_set __user *outp,
                         fd_set __user *exp, struct timeval __user *tvp);
+asmlinkage long sys_old_select(struct sel_arg_struct __user *arg);
 asmlinkage long sys_epoll_create(int size);
 asmlinkage long sys_epoll_create1(int flags);
 asmlinkage long sys_epoll_ctl(int epfd, int op, int fd,
@@ -652,6 +657,8 @@ asmlinkage long sys_gethostname(char __user *name, int len);
 asmlinkage long sys_sethostname(char __user *name, int len);
 asmlinkage long sys_setdomainname(char __user *name, int len);
 asmlinkage long sys_newuname(struct new_utsname __user *name);
+asmlinkage long sys_uname(struct old_utsname __user *);
+asmlinkage long sys_olduname(struct oldold_utsname __user *);
 
 asmlinkage long sys_getrlimit(unsigned int resource,
                                 struct rlimit __user *rlim);
@@ -681,6 +688,8 @@ asmlinkage long sys_shmat(int shmid, char __user *shmaddr, int shmflg);
 asmlinkage long sys_shmget(key_t key, size_t size, int flag);
 asmlinkage long sys_shmdt(char __user *shmaddr);
 asmlinkage long sys_shmctl(int shmid, int cmd, struct shmid_ds __user *buf);
+asmlinkage long sys_ipc(unsigned int call, int first, int second,
+                unsigned long third, void __user *ptr, long fifth);
 
 asmlinkage long sys_mq_open(const char __user *name, int oflag, mode_t mode, struct mq_attr __user *attr);
 asmlinkage long sys_mq_unlink(const char __user *name);
@@ -836,4 +845,6 @@ asmlinkage long sys_perf_event_open(
 asmlinkage long sys_mmap_pgoff(unsigned long addr, unsigned long len,
                         unsigned long prot, unsigned long flags,
                         unsigned long fd, unsigned long pgoff);
+asmlinkage long sys_old_mmap(struct mmap_arg_struct __user *arg);
+
 #endif
diff --git a/include/linux/taskstats_kern.h b/include/linux/taskstats_kern.h
index 3398f4553269..b6523c1427ce 100644
--- a/include/linux/taskstats_kern.h
+++ b/include/linux/taskstats_kern.h
@@ -14,11 +14,6 @@
 extern struct kmem_cache *taskstats_cache;
 extern struct mutex taskstats_exit_mutex;
 
-static inline void taskstats_tgid_init(struct signal_struct *sig)
-{
-        sig->stats = NULL;
-}
-
 static inline void taskstats_tgid_free(struct signal_struct *sig)
 {
         if (sig->stats)
@@ -30,8 +25,6 @@ extern void taskstats_init_early(void);
 #else
 static inline void taskstats_exit(struct task_struct *tsk, int group_dead)
 {}
-static inline void taskstats_tgid_init(struct signal_struct *sig)
-{}
 static inline void taskstats_tgid_free(struct signal_struct *sig)
 {}
 static inline void taskstats_init_early(void)
diff --git a/include/linux/tty.h b/include/linux/tty.h
index d96e5882f129..568369a86306 100644
--- a/include/linux/tty.h
+++ b/include/linux/tty.h
@@ -514,6 +514,7 @@ extern void tty_ldisc_enable(struct tty_struct *tty);
 
 /* n_tty.c */
 extern struct tty_ldisc_ops tty_ldisc_N_TTY;
+extern void n_tty_inherit_ops(struct tty_ldisc_ops *ops);
 
 /* tty_audit.c */
 #ifdef CONFIG_AUDIT
diff --git a/include/linux/tty_ldisc.h b/include/linux/tty_ldisc.h
index 0c4ee9b88f85..526d66f066a3 100644
--- a/include/linux/tty_ldisc.h
+++ b/include/linux/tty_ldisc.h
@@ -99,6 +99,12 @@
  *      cease I/O to the tty driver. Can sleep. The driver should
  *      seek to perform this action quickly but should wait until
  *      any pending driver I/O is completed.
+ *
+ * void (*dcd_change)(struct tty_struct *tty, unsigned int status,
+ *                      struct timespec *ts)
+ *
+ *      Tells the discipline that the DCD pin has changed its status and
+ *      the relative timestamp. Pointer ts can be NULL.
  */
 
 #include <linux/fs.h>
@@ -136,6 +142,8 @@ struct tty_ldisc_ops {
         void    (*receive_buf)(struct tty_struct *, const unsigned char *cp,
                                char *fp, int count);
         void    (*write_wakeup)(struct tty_struct *);
+        void    (*dcd_change)(struct tty_struct *, unsigned int,
+                                struct timespec *);
 
         struct  module *owner;
         
diff --git a/include/math-emu/op-common.h b/include/math-emu/op-common.h
index f456534dcaf9..fd882261225e 100644
--- a/include/math-emu/op-common.h
+++ b/include/math-emu/op-common.h
@@ -29,7 +29,7 @@
   _FP_FRAC_DECL_##wc(X)
 
 /*
- * Finish truely unpacking a native fp value by classifying the kind
+ * Finish truly unpacking a native fp value by classifying the kind
  * of fp value and normalizing both the exponent and the fraction.
  */
 
diff --git a/include/media/davinci/vpfe_capture.h b/include/media/davinci/vpfe_capture.h
index d863e5e8426d..4314a5f6a087 100644
--- a/include/media/davinci/vpfe_capture.h
+++ b/include/media/davinci/vpfe_capture.h
@@ -165,7 +165,7 @@ struct vpfe_device {
         u8 started;
         /*
          * offset where second field starts from the starting of the
-         * buffer for field seperated YCbCr formats
+         * buffer for field separated YCbCr formats
          */
         u32 field_off;
 };
diff --git a/include/net/irda/irttp.h b/include/net/irda/irttp.h
index 0788c23d2828..11aee7a2972a 100644
--- a/include/net/irda/irttp.h
+++ b/include/net/irda/irttp.h
@@ -97,7 +97,7 @@
 #define TTP_MAX_SDU_SIZE 0x01
 
 /*
- *  This structure contains all data assosiated with one instance of a TTP 
+ *  This structure contains all data associated with one instance of a TTP 
  *  connection.
  */
 struct tsap_cb {
diff --git a/include/net/net_namespace.h b/include/net/net_namespace.h
index 82b7be4db89a..bd10a7908993 100644
--- a/include/net/net_namespace.h
+++ b/include/net/net_namespace.h
@@ -100,14 +100,9 @@ struct net {
 extern struct net init_net;
 
 #ifdef CONFIG_NET
-#define INIT_NET_NS(net_ns) .net_ns = &init_net,
-
 extern struct net *copy_net_ns(unsigned long flags, struct net *net_ns);
 
 #else /* CONFIG_NET */
-
-#define INIT_NET_NS(net_ns)
-
 static inline struct net *copy_net_ns(unsigned long flags, struct net *net_ns)
 {
         /* There is nothing to copy so this is a noop */
diff --git a/include/scsi/sg.h b/include/scsi/sg.h
index 934ae389671d..a9f3c6fc3f57 100644
--- a/include/scsi/sg.h
+++ b/include/scsi/sg.h
@@ -70,6 +70,9 @@ Major new features in SG 3.x driver (cf SG 2.x drivers)
  (for the lk 2.2 series).
 */
 
+#ifdef __KERNEL__
+extern int sg_big_buff; /* for sysctl */
+#endif
 
 /* New interface introduced in the 3.x SG drivers follows */
 
diff --git a/include/video/broadsheetfb.h b/include/video/broadsheetfb.h
index a758534c0272..548d28f4ec67 100644
--- a/include/video/broadsheetfb.h
+++ b/include/video/broadsheetfb.h
@@ -29,11 +29,19 @@
 #define BS_CMD_UPD_FULL         0x33
 #define BS_CMD_UPD_GDRV_CLR     0x37
 
+/* Broadsheet register interface defines */
+#define BS_REG_REV              0x00
+#define BS_REG_PRC              0x02
+
 /* Broadsheet pin interface specific defines */
 #define BS_CS   0x01
 #define BS_DC   0x02
 #define BS_WR   0x03
 
+/* Broadsheet IO interface specific defines */
+#define BS_MMIO_CMD     0x01
+#define BS_MMIO_DATA    0x02
+
 /* struct used by broadsheet. board specific stuff comes from *board */
 struct broadsheetfb_par {
         struct fb_info *info;
@@ -41,6 +49,8 @@ struct broadsheetfb_par {
         void (*write_reg)(struct broadsheetfb_par *, u16 reg, u16 val);
         u16 (*read_reg)(struct broadsheetfb_par *, u16 reg);
         wait_queue_head_t waitq;
+        int panel_index;
+        struct mutex io_lock;
 };
 
 /* board specific routines */
@@ -48,12 +58,17 @@ struct broadsheet_board {
         struct module *owner;
         int (*init)(struct broadsheetfb_par *);
         int (*wait_for_rdy)(struct broadsheetfb_par *);
-        void (*set_ctl)(struct broadsheetfb_par *, unsigned char, u8);
-        void (*set_hdb)(struct broadsheetfb_par *, u16);
-        u16 (*get_hdb)(struct broadsheetfb_par *);
         void (*cleanup)(struct broadsheetfb_par *);
         int (*get_panel_type)(void);
         int (*setup_irq)(struct fb_info *);
-};
 
+        /* Functions for boards that use GPIO */
+        void (*set_ctl)(struct broadsheetfb_par *, unsigned char, u8);
+        void (*set_hdb)(struct broadsheetfb_par *, u16);
+        u16 (*get_hdb)(struct broadsheetfb_par *);
+
+        /* Functions for boards that have specialized MMIO */
+        void (*mmio_write)(struct broadsheetfb_par *, int type, u16);
+        u16 (*mmio_read)(struct broadsheetfb_par *);
+};
 #endif
diff --git a/init/Kconfig b/init/Kconfig
index 089a230e5652..eb77e8ccde1c 100644
--- a/init/Kconfig
+++ b/init/Kconfig
@@ -463,6 +463,7 @@ config HAVE_UNSTABLE_SCHED_CLOCK
 
 menuconfig CGROUPS
         boolean "Control Group support"
+        depends on EVENTFD
         help
           This option adds support for grouping sets of processes together, for
           use with process control subsystems such as Cpusets, CFS, memory
diff --git a/ipc/Makefile b/ipc/Makefile
index 4e1955ea815d..9075e172e52c 100644
--- a/ipc/Makefile
+++ b/ipc/Makefile
@@ -3,7 +3,7 @@
 #
 
 obj-$(CONFIG_SYSVIPC_COMPAT) += compat.o
-obj-$(CONFIG_SYSVIPC) += util.o msgutil.o msg.o sem.o shm.o ipcns_notifier.o
+obj-$(CONFIG_SYSVIPC) += util.o msgutil.o msg.o sem.o shm.o ipcns_notifier.o syscall.o
 obj-$(CONFIG_SYSVIPC_SYSCTL) += ipc_sysctl.o
 obj_mq-$(CONFIG_COMPAT) += compat_mq.o
 obj-$(CONFIG_POSIX_MQUEUE) += mqueue.o msgutil.o $(obj_mq-y)
diff --git a/ipc/mqueue.c b/ipc/mqueue.c
index b6cb06451f4b..e4e3f04803ca 100644
--- a/ipc/mqueue.c
+++ b/ipc/mqueue.c
@@ -155,7 +155,7 @@ static struct inode *mqueue_get_inode(struct super_block *sb,
                         spin_lock(&mq_lock);
                         if (u->mq_bytes + mq_bytes < u->mq_bytes ||
                             u->mq_bytes + mq_bytes >
-                            p->signal->rlim[RLIMIT_MSGQUEUE].rlim_cur) {
+                            task_rlimit(p, RLIMIT_MSGQUEUE)) {
                                 spin_unlock(&mq_lock);
                                 kfree(info->messages);
                                 goto out_inode;
diff --git a/ipc/shm.c b/ipc/shm.c
index 23256b855819..1a314c89f93c 100644
--- a/ipc/shm.c
+++ b/ipc/shm.c
@@ -764,8 +764,7 @@ SYSCALL_DEFINE3(shmctl, int, shmid, int, cmd, struct shmid_ds __user *, buf)
                         if (euid != shp->shm_perm.uid &&
                             euid != shp->shm_perm.cuid)
                                 goto out_unlock;
-                        if (cmd == SHM_LOCK &&
-                            !current->signal->rlim[RLIMIT_MEMLOCK].rlim_cur)
+                        if (cmd == SHM_LOCK && !rlimit(RLIMIT_MEMLOCK))
                                 goto out_unlock;
                 }
 
diff --git a/ipc/syscall.c b/ipc/syscall.c
new file mode 100644
index 000000000000..355a3da9ec73
--- /dev/null
+++ b/ipc/syscall.c
@@ -0,0 +1,99 @@
+/*
+ * sys_ipc() is the old de-multiplexer for the SysV IPC calls.
+ *
+ * This is really horribly ugly, and new architectures should just wire up
+ * the individual syscalls instead.
+ */
+#include <linux/unistd.h>
+
+#ifdef __ARCH_WANT_SYS_IPC
+#include <linux/errno.h>
+#include <linux/ipc.h>
+#include <linux/shm.h>
+#include <linux/syscalls.h>
+#include <linux/uaccess.h>
+
+SYSCALL_DEFINE6(ipc, unsigned int, call, int, first, int, second,
+                unsigned long, third, void __user *, ptr, long, fifth)
+{
+        int version, ret;
+
+        version = call >> 16; /* hack for backward compatibility */
+        call &= 0xffff;
+
+        switch (call) {
+        case SEMOP:
+                return sys_semtimedop(first, (struct sembuf __user *)ptr,
+                                      second, NULL);
+        case SEMTIMEDOP:
+                return sys_semtimedop(first, (struct sembuf __user *)ptr,
+                                      second,
+                                      (const struct timespec __user *)fifth);
+
+        case SEMGET:
+                return sys_semget(first, second, third);
+        case SEMCTL: {
+                union semun fourth;
+                if (!ptr)
+                        return -EINVAL;
+                if (get_user(fourth.__pad, (void __user * __user *) ptr))
+                        return -EFAULT;
+                return sys_semctl(first, second, third, fourth);
+        }
+
+        case MSGSND:
+                return sys_msgsnd(first, (struct msgbuf __user *) ptr,
+                                  second, third);
+        case MSGRCV:
+                switch (version) {
+                case 0: {
+                        struct ipc_kludge tmp;
+                        if (!ptr)
+                                return -EINVAL;
+
+                        if (copy_from_user(&tmp,
+                                           (struct ipc_kludge __user *) ptr,
+                                           sizeof(tmp)))
+                                return -EFAULT;
+                        return sys_msgrcv(first, tmp.msgp, second,
+                                           tmp.msgtyp, third);
+                }
+                default:
+                        return sys_msgrcv(first,
+                                           (struct msgbuf __user *) ptr,
+                                           second, fifth, third);
+                }
+        case MSGGET:
+                return sys_msgget((key_t) first, second);
+        case MSGCTL:
+                return sys_msgctl(first, second, (struct msqid_ds __user *)ptr);
+
+        case SHMAT:
+                switch (version) {
+                default: {
+                        unsigned long raddr;
+                        ret = do_shmat(first, (char __user *)ptr,
+                                       second, &raddr);
+                        if (ret)
+                                return ret;
+                        return put_user(raddr, (unsigned long __user *) third);
+                }
+                case 1:
+                        /*
+                         * This was the entry point for kernel-originating calls
+                         * from iBCS2 in 2.2 days.
+                         */
+                        return -EINVAL;
+                }
+        case SHMDT:
+                return sys_shmdt((char __user *)ptr);
+        case SHMGET:
+                return sys_shmget(first, second, third);
+        case SHMCTL:
+                return sys_shmctl(first, second,
+                                   (struct shmid_ds __user *) ptr);
+        default:
+                return -ENOSYS;
+        }
+}
+#endif
diff --git a/kernel/acct.c b/kernel/acct.c
index a6605ca921b6..24f8c81fc48d 100644
--- a/kernel/acct.c
+++ b/kernel/acct.c
@@ -588,16 +588,6 @@ out:
 }
 
 /**
- * acct_init_pacct - initialize a new pacct_struct
- * @pacct: per-process accounting info struct to initialize
- */
-void acct_init_pacct(struct pacct_struct *pacct)
-{
-        memset(pacct, 0, sizeof(struct pacct_struct));
-        pacct->ac_utime = pacct->ac_stime = cputime_zero;
-}
-
-/**
  * acct_collect - collect accounting information into pacct_struct
  * @exitcode: task exit code
  * @group_dead: not 0, if this thread is the last one in the process.
diff --git a/kernel/audit.c b/kernel/audit.c
index 5feed232be9d..78f7f86aa238 100644
--- a/kernel/audit.c
+++ b/kernel/audit.c
@@ -398,7 +398,7 @@ static void kauditd_send_skb(struct sk_buff *skb)
         skb_get(skb);
         err = netlink_unicast(audit_sock, skb, audit_nlk_pid, 0);
         if (err < 0) {
-                BUG_ON(err != -ECONNREFUSED); /* Shoudn't happen */
+                BUG_ON(err != -ECONNREFUSED); /* Shouldn't happen */
                 printk(KERN_ERR "audit: *NO* daemon at audit_pid=%d\n", audit_pid);
                 audit_log_lost("auditd dissapeared\n");
                 audit_pid = 0;
diff --git a/kernel/cgroup.c b/kernel/cgroup.c
index 4fd90e129772..ef909a329750 100644
--- a/kernel/cgroup.c
+++ b/kernel/cgroup.c
@@ -4,6 +4,10 @@
  *  Based originally on the cpuset system, extracted by Paul Menage
  *  Copyright (C) 2006 Google, Inc
  *
+ *  Notifications support
+ *  Copyright (C) 2009 Nokia Corporation
+ *  Author: Kirill A. Shutemov
+ *
  *  Copyright notices from the original cpuset code:
  *  --------------------------------------------------
  *  Copyright (C) 2003 BULL SA.
@@ -44,6 +48,7 @@
 #include <linux/string.h>
 #include <linux/sort.h>
 #include <linux/kmod.h>
+#include <linux/module.h>
 #include <linux/delayacct.h>
 #include <linux/cgroupstats.h>
 #include <linux/hash.h>
@@ -52,15 +57,21 @@
 #include <linux/pid_namespace.h>
 #include <linux/idr.h>
 #include <linux/vmalloc.h> /* TODO: replace with more sophisticated array */
+#include <linux/eventfd.h>
+#include <linux/poll.h>
 
 #include <asm/atomic.h>
 
 static DEFINE_MUTEX(cgroup_mutex);
 
-/* Generate an array of cgroup subsystem pointers */
+/*
+ * Generate an array of cgroup subsystem pointers. At boot time, this is
+ * populated up to CGROUP_BUILTIN_SUBSYS_COUNT, and modular subsystems are
+ * registered after that. The mutable section of this array is protected by
+ * cgroup_mutex.
+ */
 #define SUBSYS(_x) &_x ## _subsys,
-
-static struct cgroup_subsys *subsys[] = {
+static struct cgroup_subsys *subsys[CGROUP_SUBSYS_COUNT] = {
 #include <linux/cgroup_subsys.h>
 };
 
@@ -147,6 +158,35 @@ struct css_id {
         unsigned short stack[0]; /* Array of Length (depth+1) */
 };
 
+/*
+ * cgroup_event represents events which userspace want to recieve.
+ */
+struct cgroup_event {
+        /*
+         * Cgroup which the event belongs to.
+         */
+        struct cgroup *cgrp;
+        /*
+         * Control file which the event associated.
+         */
+        struct cftype *cft;
+        /*
+         * eventfd to signal userspace about the event.
+         */
+        struct eventfd_ctx *eventfd;
+        /*
+         * Each of these stored in a list by the cgroup.
+         */
+        struct list_head list;
+        /*
+         * All fields below needed to unregister event when
+         * userspace closes eventfd.
+         */
+        poll_table pt;
+        wait_queue_head_t *wqh;
+        wait_queue_t wait;
+        struct work_struct remove;
+};
 
 /* The list of hierarchy roots */
 
@@ -250,7 +290,8 @@ struct cg_cgroup_link {
 static struct css_set init_css_set;
 static struct cg_cgroup_link init_css_set_link;
 
-static int cgroup_subsys_init_idr(struct cgroup_subsys *ss);
+static int cgroup_init_idr(struct cgroup_subsys *ss,
+                           struct cgroup_subsys_state *css);
 
 /* css_set_lock protects the list of css_set objects, and the
  * chain of tasks off each css_set.  Nests outside task->alloc_lock
@@ -448,8 +489,11 @@ static struct css_set *find_existing_css_set(
         struct hlist_node *node;
         struct css_set *cg;
 
-        /* Built the set of subsystem state objects that we want to
-         * see in the new css_set */
+        /*
+         * Build the set of subsystem state objects that we want to see in the
+         * new css_set. while subsystems can change globally, the entries here
+         * won't change, so no need for locking.
+         */
         for (i = 0; i < CGROUP_SUBSYS_COUNT; i++) {
                 if (root->subsys_bits & (1UL << i)) {
                         /* Subsystem is in this hierarchy. So we want
@@ -696,6 +740,7 @@ void cgroup_lock(void)
 {
         mutex_lock(&cgroup_mutex);
 }
+EXPORT_SYMBOL_GPL(cgroup_lock);
 
 /**
  * cgroup_unlock - release lock on cgroup changes
@@ -706,6 +751,7 @@ void cgroup_unlock(void)
 {
         mutex_unlock(&cgroup_mutex);
 }
+EXPORT_SYMBOL_GPL(cgroup_unlock);
 
 /*
  * A couple of forward declarations required, due to cyclic reference loop:
@@ -757,6 +803,7 @@ static int cgroup_call_pre_destroy(struct cgroup *cgrp)
                         if (ret)
                                 break;
                 }
+
         return ret;
 }
 
@@ -884,7 +931,11 @@ void cgroup_release_and_wakeup_rmdir(struct cgroup_subsys_state *css)
         css_put(css);
 }
 
-
+/*
+ * Call with cgroup_mutex held. Drops reference counts on modules, including
+ * any duplicate ones that parse_cgroupfs_options took. If this function
+ * returns an error, no reference counts are touched.
+ */
 static int rebind_subsystems(struct cgroupfs_root *root,
                               unsigned long final_bits)
 {
@@ -892,6 +943,8 @@ static int rebind_subsystems(struct cgroupfs_root *root,
         struct cgroup *cgrp = &root->top_cgroup;
         int i;
 
+        BUG_ON(!mutex_is_locked(&cgroup_mutex));
+
         removed_bits = root->actual_subsys_bits & ~final_bits;
         added_bits = final_bits & ~root->actual_subsys_bits;
         /* Check that any added subsystems are currently free */
@@ -900,6 +953,12 @@ static int rebind_subsystems(struct cgroupfs_root *root,
                 struct cgroup_subsys *ss = subsys[i];
                 if (!(bit & added_bits))
                         continue;
+                /*
+                 * Nobody should tell us to do a subsys that doesn't exist:
+                 * parse_cgroupfs_options should catch that case and refcounts
+                 * ensure that subsystems won't disappear once selected.
+                 */
+                BUG_ON(ss == NULL);
                 if (ss->root != &rootnode) {
                         /* Subsystem isn't free */
                         return -EBUSY;
@@ -919,6 +978,7 @@ static int rebind_subsystems(struct cgroupfs_root *root,
                 unsigned long bit = 1UL << i;
                 if (bit & added_bits) {
                         /* We're binding this subsystem to this hierarchy */
+                        BUG_ON(ss == NULL);
                         BUG_ON(cgrp->subsys[i]);
                         BUG_ON(!dummytop->subsys[i]);
                         BUG_ON(dummytop->subsys[i]->cgroup != dummytop);
@@ -930,8 +990,10 @@ static int rebind_subsystems(struct cgroupfs_root *root,
                         if (ss->bind)
                                 ss->bind(ss, cgrp);
                         mutex_unlock(&ss->hierarchy_mutex);
+                        /* refcount was already taken, and we're keeping it */
                 } else if (bit & removed_bits) {
                         /* We're removing this subsystem */
+                        BUG_ON(ss == NULL);
                         BUG_ON(cgrp->subsys[i] != dummytop->subsys[i]);
                         BUG_ON(cgrp->subsys[i]->cgroup != cgrp);
                         mutex_lock(&ss->hierarchy_mutex);
@@ -942,9 +1004,20 @@ static int rebind_subsystems(struct cgroupfs_root *root,
                         subsys[i]->root = &rootnode;
                         list_move(&ss->sibling, &rootnode.subsys_list);
                         mutex_unlock(&ss->hierarchy_mutex);
+                        /* subsystem is now free - drop reference on module */
+                        module_put(ss->module);
                 } else if (bit & final_bits) {
                         /* Subsystem state should already exist */
+                        BUG_ON(ss == NULL);
                         BUG_ON(!cgrp->subsys[i]);
+                        /*
+                         * a refcount was taken, but we already had one, so
+                         * drop the extra reference.
+                         */
+                        module_put(ss->module);
+#ifdef CONFIG_MODULE_UNLOAD
+                        BUG_ON(ss->module && !module_refcount(ss->module));
+#endif
                 } else {
                         /* Subsystem state shouldn't exist */
                         BUG_ON(cgrp->subsys[i]);
@@ -986,13 +1059,20 @@ struct cgroup_sb_opts {
 
 };
 
-/* Convert a hierarchy specifier into a bitmask of subsystems and
- * flags. */
-static int parse_cgroupfs_options(char *data,
-                                     struct cgroup_sb_opts *opts)
+/*
+ * Convert a hierarchy specifier into a bitmask of subsystems and flags. Call
+ * with cgroup_mutex held to protect the subsys[] array. This function takes
+ * refcounts on subsystems to be used, unless it returns error, in which case
+ * no refcounts are taken.
+ */
+static int parse_cgroupfs_options(char *data, struct cgroup_sb_opts *opts)
 {
         char *token, *o = data ?: "all";
         unsigned long mask = (unsigned long)-1;
+        int i;
+        bool module_pin_failed = false;
+
+        BUG_ON(!mutex_is_locked(&cgroup_mutex));
 
 #ifdef CONFIG_CPUSETS
         mask = ~(1UL << cpuset_subsys_id);
@@ -1005,10 +1085,11 @@ static int parse_cgroupfs_options(char *data,
                         return -EINVAL;
                 if (!strcmp(token, "all")) {
                         /* Add all non-disabled subsystems */
-                        int i;
                         opts->subsys_bits = 0;
                         for (i = 0; i < CGROUP_SUBSYS_COUNT; i++) {
                                 struct cgroup_subsys *ss = subsys[i];
+                                if (ss == NULL)
+                                        continue;
                                 if (!ss->disabled)
                                         opts->subsys_bits |= 1ul << i;
                         }
@@ -1026,7 +1107,6 @@ static int parse_cgroupfs_options(char *data,
                         if (!opts->release_agent)
                                 return -ENOMEM;
                 } else if (!strncmp(token, "name=", 5)) {
-                        int i;
                         const char *name = token + 5;
                         /* Can't specify an empty name */
                         if (!strlen(name))
@@ -1050,9 +1130,10 @@ static int parse_cgroupfs_options(char *data,
                                 return -ENOMEM;
                 } else {
                         struct cgroup_subsys *ss;
-                        int i;
                         for (i = 0; i < CGROUP_SUBSYS_COUNT; i++) {
                                 ss = subsys[i];
+                                if (ss == NULL)
+                                        continue;
                                 if (!strcmp(token, ss->name)) {
                                         if (!ss->disabled)
                                                 set_bit(i, &opts->subsys_bits);
@@ -1087,9 +1168,54 @@ static int parse_cgroupfs_options(char *data,
         if (!opts->subsys_bits && !opts->name)
                 return -EINVAL;
 
+        /*
+         * Grab references on all the modules we'll need, so the subsystems
+         * don't dance around before rebind_subsystems attaches them. This may
+         * take duplicate reference counts on a subsystem that's already used,
+         * but rebind_subsystems handles this case.
+         */
+        for (i = CGROUP_BUILTIN_SUBSYS_COUNT; i < CGROUP_SUBSYS_COUNT; i++) {
+                unsigned long bit = 1UL << i;
+
+                if (!(bit & opts->subsys_bits))
+                        continue;
+                if (!try_module_get(subsys[i]->module)) {
+                        module_pin_failed = true;
+                        break;
+                }
+        }
+        if (module_pin_failed) {
+                /*
+                 * oops, one of the modules was going away. this means that we
+                 * raced with a module_delete call, and to the user this is
+                 * essentially a "subsystem doesn't exist" case.
+                 */
+                for (i--; i >= CGROUP_BUILTIN_SUBSYS_COUNT; i--) {
+                        /* drop refcounts only on the ones we took */
+                        unsigned long bit = 1UL << i;
+
+                        if (!(bit & opts->subsys_bits))
+                                continue;
+                        module_put(subsys[i]->module);
+                }
+                return -ENOENT;
+        }
+
         return 0;
 }
 
+static void drop_parsed_module_refcounts(unsigned long subsys_bits)
+{
+        int i;
+        for (i = CGROUP_BUILTIN_SUBSYS_COUNT; i < CGROUP_SUBSYS_COUNT; i++) {
+                unsigned long bit = 1UL << i;
+
+                if (!(bit & subsys_bits))
+                        continue;
+                module_put(subsys[i]->module);
+        }
+}
+
 static int cgroup_remount(struct super_block *sb, int *flags, char *data)
 {
         int ret = 0;
@@ -1106,21 +1232,19 @@ static int cgroup_remount(struct super_block *sb, int *flags, char *data)
         if (ret)
                 goto out_unlock;
 
-        /* Don't allow flags to change at remount */
-        if (opts.flags != root->flags) {
-                ret = -EINVAL;
-                goto out_unlock;
-        }
-
-        /* Don't allow name to change at remount */
-        if (opts.name && strcmp(opts.name, root->name)) {
+        /* Don't allow flags or name to change at remount */
+        if (opts.flags != root->flags ||
+            (opts.name && strcmp(opts.name, root->name))) {
                 ret = -EINVAL;
+                drop_parsed_module_refcounts(opts.subsys_bits);
                 goto out_unlock;
         }
 
         ret = rebind_subsystems(root, opts.subsys_bits);
-        if (ret)
+        if (ret) {
+                drop_parsed_module_refcounts(opts.subsys_bits);
                 goto out_unlock;
+        }
 
         /* (re)populate subsystem files */
         cgroup_populate_dir(cgrp);
@@ -1151,6 +1275,8 @@ static void init_cgroup_housekeeping(struct cgroup *cgrp)
         INIT_LIST_HEAD(&cgrp->release_list);
         INIT_LIST_HEAD(&cgrp->pidlists);
         mutex_init(&cgrp->pidlist_mutex);
+        INIT_LIST_HEAD(&cgrp->event_list);
+        spin_lock_init(&cgrp->event_list_lock);
 }
 
 static void init_cgroup_root(struct cgroupfs_root *root)
@@ -1306,7 +1432,9 @@ static int cgroup_get_sb(struct file_system_type *fs_type,
         struct cgroupfs_root *new_root;
 
         /* First find the desired set of subsystems */
+        mutex_lock(&cgroup_mutex);
         ret = parse_cgroupfs_options(data, &opts);
+        mutex_unlock(&cgroup_mutex);
         if (ret)
                 goto out_err;
 
@@ -1317,7 +1445,7 @@ static int cgroup_get_sb(struct file_system_type *fs_type,
         new_root = cgroup_root_from_opts(&opts);
         if (IS_ERR(new_root)) {
                 ret = PTR_ERR(new_root);
-                goto out_err;
+                goto drop_modules;
         }
         opts.new_root = new_root;
 
@@ -1326,7 +1454,7 @@ static int cgroup_get_sb(struct file_system_type *fs_type,
         if (IS_ERR(sb)) {
                 ret = PTR_ERR(sb);
                 cgroup_drop_root(opts.new_root);
-                goto out_err;
+                goto drop_modules;
         }
 
         root = sb->s_fs_info;
@@ -1382,6 +1510,11 @@ static int cgroup_get_sb(struct file_system_type *fs_type,
                         free_cg_links(&tmp_cg_links);
                         goto drop_new_super;
                 }
+                /*
+                 * There must be no failure case after here, since rebinding
+                 * takes care of subsystems' refcounts, which are explicitly
+                 * dropped in the failure exit path.
+                 */
 
                 /* EBUSY should be the only error here */
                 BUG_ON(ret);
@@ -1420,6 +1553,8 @@ static int cgroup_get_sb(struct file_system_type *fs_type,
                  * any) is not needed
                  */
                 cgroup_drop_root(opts.new_root);
+                /* no subsys rebinding, so refcounts don't change */
+                drop_parsed_module_refcounts(opts.subsys_bits);
         }
 
         simple_set_mnt(mnt, sb);
@@ -1429,6 +1564,8 @@ static int cgroup_get_sb(struct file_system_type *fs_type,
 
  drop_new_super:
         deactivate_locked_super(sb);
+ drop_modules:
+        drop_parsed_module_refcounts(opts.subsys_bits);
  out_err:
         kfree(opts.release_agent);
         kfree(opts.name);
@@ -1542,6 +1679,7 @@ int cgroup_path(const struct cgroup *cgrp, char *buf, int buflen)
         memmove(buf, start, buf + buflen - start);
         return 0;
 }
+EXPORT_SYMBOL_GPL(cgroup_path);
 
 /**
  * cgroup_attach_task - attach task 'tsk' to cgroup 'cgrp'
@@ -1554,7 +1692,7 @@ int cgroup_path(const struct cgroup *cgrp, char *buf, int buflen)
 int cgroup_attach_task(struct cgroup *cgrp, struct task_struct *tsk)
 {
         int retval = 0;
-        struct cgroup_subsys *ss;
+        struct cgroup_subsys *ss, *failed_ss = NULL;
         struct cgroup *oldcgrp;
         struct css_set *cg;
         struct css_set *newcg;
@@ -1568,8 +1706,16 @@ int cgroup_attach_task(struct cgroup *cgrp, struct task_struct *tsk)
         for_each_subsys(root, ss) {
                 if (ss->can_attach) {
                         retval = ss->can_attach(ss, cgrp, tsk, false);
-                        if (retval)
-                                return retval;
+                        if (retval) {
+                                /*
+                                 * Remember on which subsystem the can_attach()
+                                 * failed, so that we only call cancel_attach()
+                                 * against the subsystems whose can_attach()
+                                 * succeeded. (See below)
+                                 */
+                                failed_ss = ss;
+                                goto out;
+                        }
                 }
         }
 
@@ -1583,14 +1729,17 @@ int cgroup_attach_task(struct cgroup *cgrp, struct task_struct *tsk)
          */
         newcg = find_css_set(cg, cgrp);
         put_css_set(cg);
-        if (!newcg)
-                return -ENOMEM;
+        if (!newcg) {
+                retval = -ENOMEM;
+                goto out;
+        }
 
         task_lock(tsk);
         if (tsk->flags & PF_EXITING) {
                 task_unlock(tsk);
                 put_css_set(newcg);
-                return -ESRCH;
+                retval = -ESRCH;
+                goto out;
         }
         rcu_assign_pointer(tsk->cgroups, newcg);
         task_unlock(tsk);
@@ -1616,7 +1765,22 @@ int cgroup_attach_task(struct cgroup *cgrp, struct task_struct *tsk)
          * is no longer empty.
          */
         cgroup_wakeup_rmdir_waiter(cgrp);
-        return 0;
+out:
+        if (retval) {
+                for_each_subsys(root, ss) {
+                        if (ss == failed_ss)
+                                /*
+                                 * This subsystem was the one that failed the
+                                 * can_attach() check earlier, so we don't need
+                                 * to call cancel_attach() against it or any
+                                 * remaining subsystems.
+                                 */
+                                break;
+                        if (ss->cancel_attach)
+                                ss->cancel_attach(ss, cgrp, tsk, false);
+                }
+        }
+        return retval;
 }
 
 /*
@@ -1682,6 +1846,7 @@ bool cgroup_lock_live_group(struct cgroup *cgrp)
         }
         return true;
 }
+EXPORT_SYMBOL_GPL(cgroup_lock_live_group);
 
 static int cgroup_release_agent_write(struct cgroup *cgrp, struct cftype *cft,
                                       const char *buffer)
@@ -1950,6 +2115,16 @@ static const struct inode_operations cgroup_dir_inode_operations = {
         .rename = cgroup_rename,
 };
 
+/*
+ * Check if a file is a control file
+ */
+static inline struct cftype *__file_cft(struct file *file)
+{
+        if (file->f_dentry->d_inode->i_fop != &cgroup_file_operations)
+                return ERR_PTR(-EINVAL);
+        return __d_cft(file->f_dentry);
+}
+
 static int cgroup_create_file(struct dentry *dentry, mode_t mode,
                                 struct super_block *sb)
 {
@@ -2069,6 +2244,7 @@ int cgroup_add_file(struct cgroup *cgrp,
                 error = PTR_ERR(dentry);
         return error;
 }
+EXPORT_SYMBOL_GPL(cgroup_add_file);
 
 int cgroup_add_files(struct cgroup *cgrp,
                         struct cgroup_subsys *subsys,
@@ -2083,6 +2259,7 @@ int cgroup_add_files(struct cgroup *cgrp,
         }
         return 0;
 }
+EXPORT_SYMBOL_GPL(cgroup_add_files);
 
 /**
  * cgroup_task_count - count the number of tasks in a cgroup.
@@ -2468,7 +2645,8 @@ static struct cgroup_pidlist *cgroup_pidlist_find(struct cgroup *cgrp,
 {
         struct cgroup_pidlist *l;
         /* don't need task_nsproxy() if we're looking at ourself */
-        struct pid_namespace *ns = get_pid_ns(current->nsproxy->pid_ns);
+        struct pid_namespace *ns = current->nsproxy->pid_ns;
+
         /*
          * We can't drop the pidlist_mutex before taking the l->mutex in case
          * the last ref-holder is trying to remove l from the list at the same
@@ -2478,8 +2656,6 @@ static struct cgroup_pidlist *cgroup_pidlist_find(struct cgroup *cgrp,
         mutex_lock(&cgrp->pidlist_mutex);
         list_for_each_entry(l, &cgrp->pidlists, links) {
                 if (l->key.type == type && l->key.ns == ns) {
-                        /* found a matching list - drop the extra refcount */
-                        put_pid_ns(ns);
                         /* make sure l doesn't vanish out from under us */
                         down_write(&l->mutex);
                         mutex_unlock(&cgrp->pidlist_mutex);
@@ -2490,13 +2666,12 @@ static struct cgroup_pidlist *cgroup_pidlist_find(struct cgroup *cgrp,
         l = kmalloc(sizeof(struct cgroup_pidlist), GFP_KERNEL);
         if (!l) {
                 mutex_unlock(&cgrp->pidlist_mutex);
-                put_pid_ns(ns);
                 return l;
         }
         init_rwsem(&l->mutex);
         down_write(&l->mutex);
         l->key.type = type;
-        l->key.ns = ns;
+        l->key.ns = get_pid_ns(ns);
         l->use_count = 0; /* don't increment here */
         l->list = NULL;
         l->owner = cgrp;
@@ -2804,6 +2979,174 @@ static int cgroup_write_notify_on_release(struct cgroup *cgrp,
 }
 
 /*
+ * Unregister event and free resources.
+ *
+ * Gets called from workqueue.
+ */
+static void cgroup_event_remove(struct work_struct *work)
+{
+        struct cgroup_event *event = container_of(work, struct cgroup_event,
+                        remove);
+        struct cgroup *cgrp = event->cgrp;
+
+        /* TODO: check return code */
+        event->cft->unregister_event(cgrp, event->cft, event->eventfd);
+
+        eventfd_ctx_put(event->eventfd);
+        kfree(event);
+        dput(cgrp->dentry);
+}
+
+/*
+ * Gets called on POLLHUP on eventfd when user closes it.
+ *
+ * Called with wqh->lock held and interrupts disabled.
+ */
+static int cgroup_event_wake(wait_queue_t *wait, unsigned mode,
+                int sync, void *key)
+{
+        struct cgroup_event *event = container_of(wait,
+                        struct cgroup_event, wait);
+        struct cgroup *cgrp = event->cgrp;
+        unsigned long flags = (unsigned long)key;
+
+        if (flags & POLLHUP) {
+                remove_wait_queue_locked(event->wqh, &event->wait);
+                spin_lock(&cgrp->event_list_lock);
+                list_del(&event->list);
+                spin_unlock(&cgrp->event_list_lock);
+                /*
+                 * We are in atomic context, but cgroup_event_remove() may
+                 * sleep, so we have to call it in workqueue.
+                 */
+                schedule_work(&event->remove);
+        }
+
+        return 0;
+}
+
+static void cgroup_event_ptable_queue_proc(struct file *file,
+                wait_queue_head_t *wqh, poll_table *pt)
+{
+        struct cgroup_event *event = container_of(pt,
+                        struct cgroup_event, pt);
+
+        event->wqh = wqh;
+        add_wait_queue(wqh, &event->wait);
+}
+
+/*
+ * Parse input and register new cgroup event handler.
+ *
+ * Input must be in format '<event_fd> <control_fd> <args>'.
+ * Interpretation of args is defined by control file implementation.
+ */
+static int cgroup_write_event_control(struct cgroup *cgrp, struct cftype *cft,
+                                      const char *buffer)
+{
+        struct cgroup_event *event = NULL;
+        unsigned int efd, cfd;
+        struct file *efile = NULL;
+        struct file *cfile = NULL;
+        char *endp;
+        int ret;
+
+        efd = simple_strtoul(buffer, &endp, 10);
+        if (*endp != ' ')
+                return -EINVAL;
+        buffer = endp + 1;
+
+        cfd = simple_strtoul(buffer, &endp, 10);
+        if ((*endp != ' ') && (*endp != '\0'))
+                return -EINVAL;
+        buffer = endp + 1;
+
+        event = kzalloc(sizeof(*event), GFP_KERNEL);
+        if (!event)
+                return -ENOMEM;
+        event->cgrp = cgrp;
+        INIT_LIST_HEAD(&event->list);
+        init_poll_funcptr(&event->pt, cgroup_event_ptable_queue_proc);
+        init_waitqueue_func_entry(&event->wait, cgroup_event_wake);
+        INIT_WORK(&event->remove, cgroup_event_remove);
+
+        efile = eventfd_fget(efd);
+        if (IS_ERR(efile)) {
+                ret = PTR_ERR(efile);
+                goto fail;
+        }
+
+        event->eventfd = eventfd_ctx_fileget(efile);
+        if (IS_ERR(event->eventfd)) {
+                ret = PTR_ERR(event->eventfd);
+                goto fail;
+        }
+
+        cfile = fget(cfd);
+        if (!cfile) {
+                ret = -EBADF;
+                goto fail;
+        }
+
+        /* the process need read permission on control file */
+        ret = file_permission(cfile, MAY_READ);
+        if (ret < 0)
+                goto fail;
+
+        event->cft = __file_cft(cfile);
+        if (IS_ERR(event->cft)) {
+                ret = PTR_ERR(event->cft);
+                goto fail;
+        }
+
+        if (!event->cft->register_event || !event->cft->unregister_event) {
+                ret = -EINVAL;
+                goto fail;
+        }
+
+        ret = event->cft->register_event(cgrp, event->cft,
+                        event->eventfd, buffer);
+        if (ret)
+                goto fail;
+
+        if (efile->f_op->poll(efile, &event->pt) & POLLHUP) {
+                event->cft->unregister_event(cgrp, event->cft, event->eventfd);
+                ret = 0;
+                goto fail;
+        }
+
+        /*
+         * Events should be removed after rmdir of cgroup directory, but before
+         * destroying subsystem state objects. Let's take reference to cgroup
+         * directory dentry to do that.
+         */
+        dget(cgrp->dentry);
+
+        spin_lock(&cgrp->event_list_lock);
+        list_add(&event->list, &cgrp->event_list);
+        spin_unlock(&cgrp->event_list_lock);
+
+        fput(cfile);
+        fput(efile);
+
+        return 0;
+
+fail:
+        if (cfile)
+                fput(cfile);
+
+        if (event && event->eventfd && !IS_ERR(event->eventfd))
+                eventfd_ctx_put(event->eventfd);
+
+        if (!IS_ERR_OR_NULL(efile))
+                fput(efile);
+
+        kfree(event);
+
+        return ret;
+}
+
+/*
  * for the common functions, 'private' gives the type of file
  */
 /* for hysterical raisins, we can't put this on the older files */
@@ -2828,6 +3171,11 @@ static struct cftype files[] = {
                 .read_u64 = cgroup_read_notify_on_release,
                 .write_u64 = cgroup_write_notify_on_release,
         },
+        {
+                .name = CGROUP_FILE_GENERIC_PREFIX "event_control",
+                .write_string = cgroup_write_event_control,
+                .mode = S_IWUGO,
+        },
 };
 
 static struct cftype cft_release_agent = {
@@ -2892,8 +3240,14 @@ static void cgroup_lock_hierarchy(struct cgroupfs_root *root)
         /* We need to take each hierarchy_mutex in a consistent order */
         int i;
 
+        /*
+         * No worry about a race with rebind_subsystems that might mess up the
+         * locking order, since both parties are under cgroup_mutex.
+         */
         for (i = 0; i < CGROUP_SUBSYS_COUNT; i++) {
                 struct cgroup_subsys *ss = subsys[i];
+                if (ss == NULL)
+                        continue;
                 if (ss->root == root)
                         mutex_lock(&ss->hierarchy_mutex);
         }
@@ -2905,6 +3259,8 @@ static void cgroup_unlock_hierarchy(struct cgroupfs_root *root)
 
         for (i = 0; i < CGROUP_SUBSYS_COUNT; i++) {
                 struct cgroup_subsys *ss = subsys[i];
+                if (ss == NULL)
+                        continue;
                 if (ss->root == root)
                         mutex_unlock(&ss->hierarchy_mutex);
         }
@@ -3028,11 +3384,16 @@ static int cgroup_has_css_refs(struct cgroup *cgrp)
          * synchronization other than RCU, and the subsystem linked
          * list isn't RCU-safe */
         int i;
+        /*
+         * We won't need to lock the subsys array, because the subsystems
+         * we're concerned about aren't going anywhere since our cgroup root
+         * has a reference on them.
+         */
         for (i = 0; i < CGROUP_SUBSYS_COUNT; i++) {
                 struct cgroup_subsys *ss = subsys[i];
                 struct cgroup_subsys_state *css;
-                /* Skip subsystems not in this hierarchy */
-                if (ss->root != cgrp->root)
+                /* Skip subsystems not present or not in this hierarchy */
+                if (ss == NULL || ss->root != cgrp->root)
                         continue;
                 css = cgrp->subsys[ss->subsys_id];
                 /* When called from check_for_release() it's possible
@@ -3106,6 +3467,7 @@ static int cgroup_rmdir(struct inode *unused_dir, struct dentry *dentry)
         struct dentry *d;
         struct cgroup *parent;
         DEFINE_WAIT(wait);
+        struct cgroup_event *event, *tmp;
         int ret;
 
         /* the vfs holds both inode->i_mutex already */
@@ -3189,6 +3551,20 @@ again:
         set_bit(CGRP_RELEASABLE, &parent->flags);
         check_for_release(parent);
 
+        /*
+         * Unregister events and notify userspace.
+         * Notify userspace about cgroup removing only after rmdir of cgroup
+         * directory to avoid race between userspace and kernelspace
+         */
+        spin_lock(&cgrp->event_list_lock);
+        list_for_each_entry_safe(event, tmp, &cgrp->event_list, list) {
+                list_del(&event->list);
+                remove_wait_queue(event->wqh, &event->wait);
+                eventfd_signal(event->eventfd, 1);
+                schedule_work(&event->remove);
+        }
+        spin_unlock(&cgrp->event_list_lock);
+
         mutex_unlock(&cgroup_mutex);
         return 0;
 }
@@ -3223,7 +3599,196 @@ static void __init cgroup_init_subsys(struct cgroup_subsys *ss)
         mutex_init(&ss->hierarchy_mutex);
         lockdep_set_class(&ss->hierarchy_mutex, &ss->subsys_key);
         ss->active = 1;
+
+        /* this function shouldn't be used with modular subsystems, since they
+         * need to register a subsys_id, among other things */
+        BUG_ON(ss->module);
+}
+
+/**
+ * cgroup_load_subsys: load and register a modular subsystem at runtime
+ * @ss: the subsystem to load
+ *
+ * This function should be called in a modular subsystem's initcall. If the
+ * subsytem is built as a module, it will be assigned a new subsys_id and set
+ * up for use. If the subsystem is built-in anyway, work is delegated to the
+ * simpler cgroup_init_subsys.
+ */
+int __init_or_module cgroup_load_subsys(struct cgroup_subsys *ss)
+{
+        int i;
+        struct cgroup_subsys_state *css;
+
+        /* check name and function validity */
+        if (ss->name == NULL || strlen(ss->name) > MAX_CGROUP_TYPE_NAMELEN ||
+            ss->create == NULL || ss->destroy == NULL)
+                return -EINVAL;
+
+        /*
+         * we don't support callbacks in modular subsystems. this check is
+         * before the ss->module check for consistency; a subsystem that could
+         * be a module should still have no callbacks even if the user isn't
+         * compiling it as one.
+         */
+        if (ss->fork || ss->exit)
+                return -EINVAL;
+
+        /*
+         * an optionally modular subsystem is built-in: we want to do nothing,
+         * since cgroup_init_subsys will have already taken care of it.
+         */
+        if (ss->module == NULL) {
+                /* a few sanity checks */
+                BUG_ON(ss->subsys_id >= CGROUP_BUILTIN_SUBSYS_COUNT);
+                BUG_ON(subsys[ss->subsys_id] != ss);
+                return 0;
+        }
+
+        /*
+         * need to register a subsys id before anything else - for example,
+         * init_cgroup_css needs it.
+         */
+        mutex_lock(&cgroup_mutex);
+        /* find the first empty slot in the array */
+        for (i = CGROUP_BUILTIN_SUBSYS_COUNT; i < CGROUP_SUBSYS_COUNT; i++) {
+                if (subsys[i] == NULL)
+                        break;
+        }
+        if (i == CGROUP_SUBSYS_COUNT) {
+                /* maximum number of subsystems already registered! */
+                mutex_unlock(&cgroup_mutex);
+                return -EBUSY;
+        }
+        /* assign ourselves the subsys_id */
+        ss->subsys_id = i;
+        subsys[i] = ss;
+
+        /*
+         * no ss->create seems to need anything important in the ss struct, so
+         * this can happen first (i.e. before the rootnode attachment).
+         */
+        css = ss->create(ss, dummytop);
+        if (IS_ERR(css)) {
+                /* failure case - need to deassign the subsys[] slot. */
+                subsys[i] = NULL;
+                mutex_unlock(&cgroup_mutex);
+                return PTR_ERR(css);
+        }
+
+        list_add(&ss->sibling, &rootnode.subsys_list);
+        ss->root = &rootnode;
+
+        /* our new subsystem will be attached to the dummy hierarchy. */
+        init_cgroup_css(css, ss, dummytop);
+        /* init_idr must be after init_cgroup_css because it sets css->id. */
+        if (ss->use_id) {
+                int ret = cgroup_init_idr(ss, css);
+                if (ret) {
+                        dummytop->subsys[ss->subsys_id] = NULL;
+                        ss->destroy(ss, dummytop);
+                        subsys[i] = NULL;
+                        mutex_unlock(&cgroup_mutex);
+                        return ret;
+                }
+        }
+
+        /*
+         * Now we need to entangle the css into the existing css_sets. unlike
+         * in cgroup_init_subsys, there are now multiple css_sets, so each one
+         * will need a new pointer to it; done by iterating the css_set_table.
+         * furthermore, modifying the existing css_sets will corrupt the hash
+         * table state, so each changed css_set will need its hash recomputed.
+         * this is all done under the css_set_lock.
+         */
+        write_lock(&css_set_lock);
+        for (i = 0; i < CSS_SET_TABLE_SIZE; i++) {
+                struct css_set *cg;
+                struct hlist_node *node, *tmp;
+                struct hlist_head *bucket = &css_set_table[i], *new_bucket;
+
+                hlist_for_each_entry_safe(cg, node, tmp, bucket, hlist) {
+                        /* skip entries that we already rehashed */
+                        if (cg->subsys[ss->subsys_id])
+                                continue;
+                        /* remove existing entry */
+                        hlist_del(&cg->hlist);
+                        /* set new value */
+                        cg->subsys[ss->subsys_id] = css;
+                        /* recompute hash and restore entry */
+                        new_bucket = css_set_hash(cg->subsys);
+                        hlist_add_head(&cg->hlist, new_bucket);
+                }
+        }
+        write_unlock(&css_set_lock);
+
+        mutex_init(&ss->hierarchy_mutex);
+        lockdep_set_class(&ss->hierarchy_mutex, &ss->subsys_key);
+        ss->active = 1;
+
+        /* success! */
+        mutex_unlock(&cgroup_mutex);
+        return 0;
 }
+EXPORT_SYMBOL_GPL(cgroup_load_subsys);
+
+/**
+ * cgroup_unload_subsys: unload a modular subsystem
+ * @ss: the subsystem to unload
+ *
+ * This function should be called in a modular subsystem's exitcall. When this
+ * function is invoked, the refcount on the subsystem's module will be 0, so
+ * the subsystem will not be attached to any hierarchy.
+ */
+void cgroup_unload_subsys(struct cgroup_subsys *ss)
+{
+        struct cg_cgroup_link *link;
+        struct hlist_head *hhead;
+
+        BUG_ON(ss->module == NULL);
+
+        /*
+         * we shouldn't be called if the subsystem is in use, and the use of
+         * try_module_get in parse_cgroupfs_options should ensure that it
+         * doesn't start being used while we're killing it off.
+         */
+        BUG_ON(ss->root != &rootnode);
+
+        mutex_lock(&cgroup_mutex);
+        /* deassign the subsys_id */
+        BUG_ON(ss->subsys_id < CGROUP_BUILTIN_SUBSYS_COUNT);
+        subsys[ss->subsys_id] = NULL;
+
+        /* remove subsystem from rootnode's list of subsystems */
+        list_del(&ss->sibling);
+
+        /*
+         * disentangle the css from all css_sets attached to the dummytop. as
+         * in loading, we need to pay our respects to the hashtable gods.
+         */
+        write_lock(&css_set_lock);
+        list_for_each_entry(link, &dummytop->css_sets, cgrp_link_list) {
+                struct css_set *cg = link->cg;
+
+                hlist_del(&cg->hlist);
+                BUG_ON(!cg->subsys[ss->subsys_id]);
+                cg->subsys[ss->subsys_id] = NULL;
+                hhead = css_set_hash(cg->subsys);
+                hlist_add_head(&cg->hlist, hhead);
+        }
+        write_unlock(&css_set_lock);
+
+        /*
+         * remove subsystem's css from the dummytop and free it - need to free
+         * before marking as null because ss->destroy needs the cgrp->subsys
+         * pointer to find their state. note that this also takes care of
+         * freeing the css_id.
+         */
+        ss->destroy(ss, dummytop);
+        dummytop->subsys[ss->subsys_id] = NULL;
+
+        mutex_unlock(&cgroup_mutex);
+}
+EXPORT_SYMBOL_GPL(cgroup_unload_subsys);
 
 /**
  * cgroup_init_early - cgroup initialization at system boot
@@ -3253,7 +3818,8 @@ int __init cgroup_init_early(void)
         for (i = 0; i < CSS_SET_TABLE_SIZE; i++)
                 INIT_HLIST_HEAD(&css_set_table[i]);
 
-        for (i = 0; i < CGROUP_SUBSYS_COUNT; i++) {
+        /* at bootup time, we don't worry about modular subsystems */
+        for (i = 0; i < CGROUP_BUILTIN_SUBSYS_COUNT; i++) {
                 struct cgroup_subsys *ss = subsys[i];
 
                 BUG_ON(!ss->name);
@@ -3288,12 +3854,13 @@ int __init cgroup_init(void)
         if (err)
                 return err;
 
-        for (i = 0; i < CGROUP_SUBSYS_COUNT; i++) {
+        /* at bootup time, we don't worry about modular subsystems */
+        for (i = 0; i < CGROUP_BUILTIN_SUBSYS_COUNT; i++) {
                 struct cgroup_subsys *ss = subsys[i];
                 if (!ss->early_init)
                         cgroup_init_subsys(ss);
                 if (ss->use_id)
-                        cgroup_subsys_init_idr(ss);
+                        cgroup_init_idr(ss, init_css_set.subsys[ss->subsys_id]);
         }
 
         /* Add init_css_set to the hash table */
@@ -3397,9 +3964,16 @@ static int proc_cgroupstats_show(struct seq_file *m, void *v)
         int i;
 
         seq_puts(m, "#subsys_name\thierarchy\tnum_cgroups\tenabled\n");
+        /*
+         * ideally we don't want subsystems moving around while we do this.
+         * cgroup_mutex is also necessary to guarantee an atomic snapshot of
+         * subsys/hierarchy state.
+         */
         mutex_lock(&cgroup_mutex);
         for (i = 0; i < CGROUP_SUBSYS_COUNT; i++) {
                 struct cgroup_subsys *ss = subsys[i];
+                if (ss == NULL)
+                        continue;
                 seq_printf(m, "%s\t%d\t%d\t%d\n",
                            ss->name, ss->root->hierarchy_id,
                            ss->root->number_of_cgroups, !ss->disabled);
@@ -3457,7 +4031,12 @@ void cgroup_fork_callbacks(struct task_struct *child)
 {
         if (need_forkexit_callback) {
                 int i;
-                for (i = 0; i < CGROUP_SUBSYS_COUNT; i++) {
+                /*
+                 * forkexit callbacks are only supported for builtin
+                 * subsystems, and the builtin section of the subsys array is
+                 * immutable, so we don't need to lock the subsys array here.
+                 */
+                for (i = 0; i < CGROUP_BUILTIN_SUBSYS_COUNT; i++) {
                         struct cgroup_subsys *ss = subsys[i];
                         if (ss->fork)
                                 ss->fork(ss, child);
@@ -3526,7 +4105,11 @@ void cgroup_exit(struct task_struct *tsk, int run_callbacks)
         struct css_set *cg;
 
         if (run_callbacks && need_forkexit_callback) {
-                for (i = 0; i < CGROUP_SUBSYS_COUNT; i++) {
+                /*
+                 * modular subsystems can't use callbacks, so no need to lock
+                 * the subsys array
+                 */
+                for (i = 0; i < CGROUP_BUILTIN_SUBSYS_COUNT; i++) {
                         struct cgroup_subsys *ss = subsys[i];
                         if (ss->exit)
                                 ss->exit(ss, tsk);
@@ -3720,12 +4303,13 @@ static void check_for_release(struct cgroup *cgrp)
         }
 }
 
-void __css_put(struct cgroup_subsys_state *css)
+/* Caller must verify that the css is not for root cgroup */
+void __css_put(struct cgroup_subsys_state *css, int count)
 {
         struct cgroup *cgrp = css->cgroup;
         int val;
         rcu_read_lock();
-        val = atomic_dec_return(&css->refcnt);
+        val = atomic_sub_return(count, &css->refcnt);
         if (val == 1) {
                 if (notify_on_release(cgrp)) {
                         set_bit(CGRP_RELEASABLE, &cgrp->flags);
@@ -3736,6 +4320,7 @@ void __css_put(struct cgroup_subsys_state *css)
         rcu_read_unlock();
         WARN_ON_ONCE(val < 1);
 }
+EXPORT_SYMBOL_GPL(__css_put);
 
 /*
  * Notify userspace when a cgroup is released, by running the
@@ -3817,8 +4402,11 @@ static int __init cgroup_disable(char *str)
         while ((token = strsep(&str, ",")) != NULL) {
                 if (!*token)
                         continue;
-
-                for (i = 0; i < CGROUP_SUBSYS_COUNT; i++) {
+                /*
+                 * cgroup_disable, being at boot time, can't know about module
+                 * subsystems, so we don't worry about them.
+                 */
+                for (i = 0; i < CGROUP_BUILTIN_SUBSYS_COUNT; i++) {
                         struct cgroup_subsys *ss = subsys[i];
 
                         if (!strcmp(token, ss->name)) {
@@ -3848,6 +4436,7 @@ unsigned short css_id(struct cgroup_subsys_state *css)
                 return cssid->id;
         return 0;
 }
+EXPORT_SYMBOL_GPL(css_id);
 
 unsigned short css_depth(struct cgroup_subsys_state *css)
 {
@@ -3857,6 +4446,7 @@ unsigned short css_depth(struct cgroup_subsys_state *css)
                 return cssid->depth;
         return 0;
 }
+EXPORT_SYMBOL_GPL(css_depth);
 
 bool css_is_ancestor(struct cgroup_subsys_state *child,
                     const struct cgroup_subsys_state *root)
@@ -3893,6 +4483,7 @@ void free_css_id(struct cgroup_subsys *ss, struct cgroup_subsys_state *css)
         spin_unlock(&ss->id_lock);
         call_rcu(&id->rcu_head, __free_css_id_cb);
 }
+EXPORT_SYMBOL_GPL(free_css_id);
 
 /*
  * This is called by init or create(). Then, calls to this function are
@@ -3942,15 +4533,14 @@ err_out:
 
 }
 
-static int __init cgroup_subsys_init_idr(struct cgroup_subsys *ss)
+static int __init_or_module cgroup_init_idr(struct cgroup_subsys *ss,
+                                            struct cgroup_subsys_state *rootcss)
 {
         struct css_id *newid;
-        struct cgroup_subsys_state *rootcss;
 
         spin_lock_init(&ss->id_lock);
         idr_init(&ss->idr);
 
-        rootcss = init_css_set.subsys[ss->subsys_id];
         newid = get_new_cssid(ss, 0);
         if (IS_ERR(newid))
                 return PTR_ERR(newid);
@@ -4010,6 +4600,7 @@ struct cgroup_subsys_state *css_lookup(struct cgroup_subsys *ss, int id)
 
         return rcu_dereference(cssid->css);
 }
+EXPORT_SYMBOL_GPL(css_lookup);
 
 /**
  * css_get_next - lookup next cgroup under specified hierarchy.
diff --git a/kernel/fork.c b/kernel/fork.c
index b0ec34abc0bb..1beb6c303c41 100644
--- a/kernel/fork.c
+++ b/kernel/fork.c
@@ -833,17 +833,6 @@ static void posix_cpu_timers_init_group(struct signal_struct *sig)
         /* Thread group counters. */
         thread_group_cputime_init(sig);
 
-        /* Expiration times and increments. */
-        sig->it[CPUCLOCK_PROF].expires = cputime_zero;
-        sig->it[CPUCLOCK_PROF].incr = cputime_zero;
-        sig->it[CPUCLOCK_VIRT].expires = cputime_zero;
-        sig->it[CPUCLOCK_VIRT].incr = cputime_zero;
-
-        /* Cached expiration times. */
-        sig->cputime_expires.prof_exp = cputime_zero;
-        sig->cputime_expires.virt_exp = cputime_zero;
-        sig->cputime_expires.sched_exp = 0;
-
         cpu_limit = ACCESS_ONCE(sig->rlim[RLIMIT_CPU].rlim_cur);
         if (cpu_limit != RLIM_INFINITY) {
                 sig->cputime_expires.prof_exp = secs_to_cputime(cpu_limit);
@@ -863,7 +852,7 @@ static int copy_signal(unsigned long clone_flags, struct task_struct *tsk)
         if (clone_flags & CLONE_THREAD)
                 return 0;
 
-        sig = kmem_cache_alloc(signal_cachep, GFP_KERNEL);
+        sig = kmem_cache_zalloc(signal_cachep, GFP_KERNEL);
         tsk->signal = sig;
         if (!sig)
                 return -ENOMEM;
@@ -871,46 +860,21 @@ static int copy_signal(unsigned long clone_flags, struct task_struct *tsk)
         atomic_set(&sig->count, 1);
         atomic_set(&sig->live, 1);
         init_waitqueue_head(&sig->wait_chldexit);
-        sig->flags = 0;
         if (clone_flags & CLONE_NEWPID)
                 sig->flags |= SIGNAL_UNKILLABLE;
-        sig->group_exit_code = 0;
-        sig->group_exit_task = NULL;
-        sig->group_stop_count = 0;
         sig->curr_target = tsk;
         init_sigpending(&sig->shared_pending);
         INIT_LIST_HEAD(&sig->posix_timers);
 
         hrtimer_init(&sig->real_timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL);
-        sig->it_real_incr.tv64 = 0;
         sig->real_timer.function = it_real_fn;
 
-        sig->leader = 0;        /* session leadership doesn't inherit */
-        sig->tty_old_pgrp = NULL;
-        sig->tty = NULL;
-
-        sig->utime = sig->stime = sig->cutime = sig->cstime = cputime_zero;
-        sig->gtime = cputime_zero;
-        sig->cgtime = cputime_zero;
-#ifndef CONFIG_VIRT_CPU_ACCOUNTING
-        sig->prev_utime = sig->prev_stime = cputime_zero;
-#endif
-        sig->nvcsw = sig->nivcsw = sig->cnvcsw = sig->cnivcsw = 0;
-        sig->min_flt = sig->maj_flt = sig->cmin_flt = sig->cmaj_flt = 0;
-        sig->inblock = sig->oublock = sig->cinblock = sig->coublock = 0;
-        sig->maxrss = sig->cmaxrss = 0;
-        task_io_accounting_init(&sig->ioac);
-        sig->sum_sched_runtime = 0;
-        taskstats_tgid_init(sig);
-
         task_lock(current->group_leader);
         memcpy(sig->rlim, current->signal->rlim, sizeof sig->rlim);
         task_unlock(current->group_leader);
 
         posix_cpu_timers_init_group(sig);
 
-        acct_init_pacct(&sig->pacct);
-
         tty_audit_fork(sig);
 
         sig->oom_adj = current->signal->oom_adj;
diff --git a/kernel/irq/chip.c b/kernel/irq/chip.c
index d70394f12ee9..42ec11b2af8a 100644
--- a/kernel/irq/chip.c
+++ b/kernel/irq/chip.c
@@ -554,7 +554,7 @@ out:
  *      signal. The occurence is latched into the irq controller hardware
  *      and must be acked in order to be reenabled. After the ack another
  *      interrupt can happen on the same source even before the first one
- *      is handled by the assosiacted event handler. If this happens it
+ *      is handled by the associated event handler. If this happens it
  *      might be necessary to disable (mask) the interrupt depending on the
  *      controller hardware. This requires to reenable the interrupt inside
  *      of the loop which handles the interrupts which have arrived while
diff --git a/kernel/irq/devres.c b/kernel/irq/devres.c
index d06df9c41cba..1ef4ffcdfa55 100644
--- a/kernel/irq/devres.c
+++ b/kernel/irq/devres.c
@@ -42,7 +42,7 @@ static int devm_irq_match(struct device *dev, void *res, void *data)
  *      automatically freed on driver detach.
  *
  *      If an IRQ allocated with this function needs to be freed
- *      separately, dev_free_irq() must be used.
+ *      separately, devm_free_irq() must be used.
  */
 int devm_request_threaded_irq(struct device *dev, unsigned int irq,
                               irq_handler_t handler, irq_handler_t thread_fn,
@@ -81,7 +81,7 @@ EXPORT_SYMBOL(devm_request_threaded_irq);
  *      Except for the extra @dev argument, this function takes the
  *      same arguments and performs the same function as free_irq().
  *      This function instead of free_irq() should be used to manually
- *      free IRQs allocated with dev_request_irq().
+ *      free IRQs allocated with devm_request_irq().
  */
 void devm_free_irq(struct device *dev, unsigned int irq, void *dev_id)
 {
diff --git a/kernel/ksysfs.c b/kernel/ksysfs.c
index 6b1ccc3f0205..21fe3c426948 100644
--- a/kernel/ksysfs.c
+++ b/kernel/ksysfs.c
@@ -33,7 +33,7 @@ static ssize_t uevent_seqnum_show(struct kobject *kobj,
 }
 KERNEL_ATTR_RO(uevent_seqnum);
 
-/* uevent helper program, used during early boo */
+/* uevent helper program, used during early boot */
 static ssize_t uevent_helper_show(struct kobject *kobj,
                                   struct kobj_attribute *attr, char *buf)
 {
diff --git a/kernel/nsproxy.c b/kernel/nsproxy.c
index 09b4ff9711b2..2ab67233ee8f 100644
--- a/kernel/nsproxy.c
+++ b/kernel/nsproxy.c
@@ -24,7 +24,18 @@
 
 static struct kmem_cache *nsproxy_cachep;
 
-struct nsproxy init_nsproxy = INIT_NSPROXY(init_nsproxy);
+struct nsproxy init_nsproxy = {
+        .count  = ATOMIC_INIT(1),
+        .uts_ns = &init_uts_ns,
+#if defined(CONFIG_POSIX_MQUEUE) || defined(CONFIG_SYSVIPC)
+        .ipc_ns = &init_ipc_ns,
+#endif
+        .mnt_ns = NULL,
+        .pid_ns = &init_pid_ns,
+#ifdef CONFIG_NET
+        .net_ns = &init_net,
+#endif
+};
 
 static inline struct nsproxy *create_nsproxy(void)
 {
diff --git a/kernel/params.c b/kernel/params.c
index d55a53ec9234..0b30ecd53a52 100644
--- a/kernel/params.c
+++ b/kernel/params.c
@@ -401,8 +401,8 @@ int param_get_string(char *buffer, struct kernel_param *kp)
 }
 
 /* sysfs output in /sys/modules/XYZ/parameters/ */
-#define to_module_attr(n) container_of(n, struct module_attribute, attr);
-#define to_module_kobject(n) container_of(n, struct module_kobject, kobj);
+#define to_module_attr(n) container_of(n, struct module_attribute, attr)
+#define to_module_kobject(n) container_of(n, struct module_kobject, kobj)
 
 extern struct kernel_param __start___param[], __stop___param[];
 
@@ -420,7 +420,7 @@ struct module_param_attrs
 };
 
 #ifdef CONFIG_SYSFS
-#define to_param_attr(n) container_of(n, struct param_attribute, mattr);
+#define to_param_attr(n) container_of(n, struct param_attribute, mattr)
 
 static ssize_t param_attr_show(struct module_attribute *mattr,
                                struct module *mod, char *buf)
diff --git a/kernel/pid_namespace.c b/kernel/pid_namespace.c
index 86b3796b0436..79aac93acf99 100644
--- a/kernel/pid_namespace.c
+++ b/kernel/pid_namespace.c
@@ -161,13 +161,12 @@ void zap_pid_ns_processes(struct pid_namespace *pid_ns)
                 rcu_read_lock();
 
                 /*
-                 * Use force_sig() since it clears SIGNAL_UNKILLABLE ensuring
-                 * any nested-container's init processes don't ignore the
-                 * signal
+                 * Any nested-container's init processes won't ignore the
+                 * SEND_SIG_NOINFO signal, see send_signal()->si_fromuser().
                  */
                 task = pid_task(find_vpid(nr), PIDTYPE_PID);
                 if (task)
-                        force_sig(SIGKILL, task);
+                        send_sig_info(SIGKILL, SEND_SIG_NOINFO, task);
 
                 rcu_read_unlock();
 
diff --git a/kernel/sched_cpupri.c b/kernel/sched_cpupri.c
index 82095bf2099f..fccf9fbb0d7b 100644
--- a/kernel/sched_cpupri.c
+++ b/kernel/sched_cpupri.c
@@ -56,7 +56,7 @@ static int convert_prio(int prio)
  * @lowest_mask: A mask to fill in with selected CPUs (or NULL)
  *
  * Note: This function returns the recommended CPUs as calculated during the
- * current invokation.  By the time the call returns, the CPUs may have in
+ * current invocation.  By the time the call returns, the CPUs may have in
  * fact changed priorities any number of times.  While not ideal, it is not
  * an issue of correctness since the normal rebalancer logic will correct
  * any discrepancies created by racing against the uncertainty of the current
diff --git a/kernel/sys.c b/kernel/sys.c
index 9814e43fb23b..8298878f4f71 100644
--- a/kernel/sys.c
+++ b/kernel/sys.c
@@ -33,6 +33,7 @@
 #include <linux/task_io_accounting_ops.h>
 #include <linux/seccomp.h>
 #include <linux/cpu.h>
+#include <linux/personality.h>
 #include <linux/ptrace.h>
 #include <linux/fs_struct.h>
 
@@ -1114,6 +1115,15 @@ out:
 
 DECLARE_RWSEM(uts_sem);
 
+#ifdef COMPAT_UTS_MACHINE
+#define override_architecture(name) \
+        (current->personality == PER_LINUX32 && \
+         copy_to_user(name->machine, COMPAT_UTS_MACHINE, \
+                      sizeof(COMPAT_UTS_MACHINE)))
+#else
+#define override_architecture(name)     0
+#endif
+
 SYSCALL_DEFINE1(newuname, struct new_utsname __user *, name)
 {
         int errno = 0;
@@ -1122,9 +1132,66 @@ SYSCALL_DEFINE1(newuname, struct new_utsname __user *, name)
         if (copy_to_user(name, utsname(), sizeof *name))
                 errno = -EFAULT;
         up_read(&uts_sem);
+
+        if (!errno && override_architecture(name))
+                errno = -EFAULT;
         return errno;
 }
 
+#ifdef __ARCH_WANT_SYS_OLD_UNAME
+/*
+ * Old cruft
+ */
+SYSCALL_DEFINE1(uname, struct old_utsname __user *, name)
+{
+        int error = 0;
+
+        if (!name)
+                return -EFAULT;
+
+        down_read(&uts_sem);
+        if (copy_to_user(name, utsname(), sizeof(*name)))
+                error = -EFAULT;
+        up_read(&uts_sem);
+
+        if (!error && override_architecture(name))
+                error = -EFAULT;
+        return error;
+}
+
+SYSCALL_DEFINE1(olduname, struct oldold_utsname __user *, name)
+{
+        int error;
+
+        if (!name)
+                return -EFAULT;
+        if (!access_ok(VERIFY_WRITE, name, sizeof(struct oldold_utsname)))
+                return -EFAULT;
+
+        down_read(&uts_sem);
+        error = __copy_to_user(&name->sysname, &utsname()->sysname,
+                               __OLD_UTS_LEN);
+        error |= __put_user(0, name->sysname + __OLD_UTS_LEN);
+        error |= __copy_to_user(&name->nodename, &utsname()->nodename,
+                                __OLD_UTS_LEN);
+        error |= __put_user(0, name->nodename + __OLD_UTS_LEN);
+        error |= __copy_to_user(&name->release, &utsname()->release,
+                                __OLD_UTS_LEN);
+        error |= __put_user(0, name->release + __OLD_UTS_LEN);
+        error |= __copy_to_user(&name->version, &utsname()->version,
+                                __OLD_UTS_LEN);
+        error |= __put_user(0, name->version + __OLD_UTS_LEN);
+        error |= __copy_to_user(&name->machine, &utsname()->machine,
+                                __OLD_UTS_LEN);
+        error |= __put_user(0, name->machine + __OLD_UTS_LEN);
+        up_read(&uts_sem);
+
+        if (!error && override_architecture(name))
+                error = -EFAULT;
+        return error ? -EFAULT : 0;
+}
+#endif
+
 SYSCALL_DEFINE2(sethostname, char __user *, name, int, len)
 {
         int errno;
diff --git a/kernel/sys_ni.c b/kernel/sys_ni.c
index 695384f12a7d..70f2ea758ffe 100644
--- a/kernel/sys_ni.c
+++ b/kernel/sys_ni.c
@@ -126,6 +126,7 @@ cond_syscall(sys_setreuid16);
 cond_syscall(sys_setuid16);
 cond_syscall(sys_vm86old);
 cond_syscall(sys_vm86);
+cond_syscall(sys_ipc);
 cond_syscall(compat_sys_ipc);
 cond_syscall(compat_sys_sysctl);
 cond_syscall(sys_flock);
diff --git a/kernel/sysctl.c b/kernel/sysctl.c
index 0ef19c614f6d..8686b0f5fc12 100644
--- a/kernel/sysctl.c
+++ b/kernel/sysctl.c
@@ -23,6 +23,7 @@
 #include <linux/swap.h>
 #include <linux/slab.h>
 #include <linux/sysctl.h>
+#include <linux/signal.h>
 #include <linux/proc_fs.h>
 #include <linux/security.h>
 #include <linux/ctype.h>
@@ -60,13 +61,23 @@
 #include <asm/stacktrace.h>
 #include <asm/io.h>
 #endif
+#ifdef CONFIG_BSD_PROCESS_ACCT
+#include <linux/acct.h>
+#endif
+#ifdef CONFIG_RT_MUTEXES
+#include <linux/rtmutex.h>
+#endif
+#if defined(CONFIG_PROVE_LOCKING) || defined(CONFIG_LOCK_STAT)
+#include <linux/lockdep.h>
+#endif
+#ifdef CONFIG_CHR_DEV_SG
+#include <scsi/sg.h>
+#endif
 
 
 #if defined(CONFIG_SYSCTL)
 
 /* External variables not in a header file. */
-extern int C_A_D;
-extern int print_fatal_signals;
 extern int sysctl_overcommit_memory;
 extern int sysctl_overcommit_ratio;
 extern int sysctl_panic_on_oom;
@@ -88,9 +99,6 @@ extern int sysctl_nr_open_min, sysctl_nr_open_max;
 #ifndef CONFIG_MMU
 extern int sysctl_nr_trim_pages;
 #endif
-#ifdef CONFIG_RCU_TORTURE_TEST
-extern int rcutorture_runnable;
-#endif /* #ifdef CONFIG_RCU_TORTURE_TEST */
 #ifdef CONFIG_BLOCK
 extern int blk_iopoll_enabled;
 #endif
@@ -120,14 +128,6 @@ static int min_percpu_pagelist_fract = 8;
 
 static int ngroups_max = NGROUPS_MAX;
 
-#ifdef CONFIG_MODULES
-extern char modprobe_path[];
-extern int modules_disabled;
-#endif
-#ifdef CONFIG_CHR_DEV_SG
-extern int sg_big_buff;
-#endif
-
 #ifdef CONFIG_SPARC
 #include <asm/system.h>
 #endif
@@ -149,10 +149,6 @@ extern int sysctl_userprocess_debug;
 extern int spin_retry;
 #endif
 
-#ifdef CONFIG_BSD_PROCESS_ACCT
-extern int acct_parm[];
-#endif
-
 #ifdef CONFIG_IA64
 extern int no_unaligned_warning;
 extern int unaligned_dump_stack;
@@ -160,10 +156,6 @@ extern int unaligned_dump_stack;
 
 extern struct ratelimit_state printk_ratelimit_state;
 
-#ifdef CONFIG_RT_MUTEXES
-extern int max_lock_depth;
-#endif
-
 #ifdef CONFIG_PROC_SYSCTL
 static int proc_do_cad_pid(struct ctl_table *table, int write,
                   void __user *buffer, size_t *lenp, loff_t *ppos);
@@ -202,9 +194,6 @@ extern struct ctl_table epoll_table[];
 int sysctl_legacy_va_layout;
 #endif
 
-extern int prove_locking;
-extern int lock_stat;
-
 /* The default sysctl tables: */
 
 static struct ctl_table root_table[] = {
diff --git a/kernel/trace/ring_buffer.c b/kernel/trace/ring_buffer.c
index 0287f9f52f5a..a2f0fe951831 100644
--- a/kernel/trace/ring_buffer.c
+++ b/kernel/trace/ring_buffer.c
@@ -2542,7 +2542,7 @@ EXPORT_SYMBOL_GPL(ring_buffer_record_disable);
  * @buffer: The ring buffer to enable writes
  *
  * Note, multiple disables will need the same number of enables
- * to truely enable the writing (much like preempt_disable).
+ * to truly enable the writing (much like preempt_disable).
  */
 void ring_buffer_record_enable(struct ring_buffer *buffer)
 {
@@ -2578,7 +2578,7 @@ EXPORT_SYMBOL_GPL(ring_buffer_record_disable_cpu);
  * @cpu: The CPU to enable.
  *
  * Note, multiple disables will need the same number of enables
- * to truely enable the writing (much like preempt_disable).
+ * to truly enable the writing (much like preempt_disable).
  */
 void ring_buffer_record_enable_cpu(struct ring_buffer *buffer, int cpu)
 {
diff --git a/kernel/trace/trace.h b/kernel/trace/trace.h
index fd05bcaf91b0..09b39112a5e2 100644
--- a/kernel/trace/trace.h
+++ b/kernel/trace/trace.h
@@ -550,7 +550,7 @@ static inline int ftrace_trace_task(struct task_struct *task)
  * struct trace_parser - servers for reading the user input separated by spaces
  * @cont: set if the input is not complete - no final space char was found
  * @buffer: holds the parsed user input
- * @idx: user input lenght
+ * @idx: user input length
  * @size: buffer size
  */
 struct trace_parser {
diff --git a/lib/zlib_inflate/inffast.c b/lib/zlib_inflate/inffast.c
index 215447c55261..2c13ecc5bb2c 100644
--- a/lib/zlib_inflate/inffast.c
+++ b/lib/zlib_inflate/inffast.c
@@ -8,21 +8,6 @@
 #include "inflate.h"
 #include "inffast.h"
 
-/* Only do the unaligned "Faster" variant when
- * CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS is set
- *
- * On powerpc, it won't be as we don't include autoconf.h
- * automatically for the boot wrapper, which is intended as
- * we run in an environment where we may not be able to deal
- * with (even rare) alignment faults. In addition, we do not
- * define __KERNEL__ for arch/powerpc/boot unlike x86
- */
-
-#ifdef CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS
-#include <asm/unaligned.h>
-#include <asm/byteorder.h>
-#endif
-
 #ifndef ASMINF
 
 /* Allow machine dependent optimization for post-increment or pre-increment.
@@ -36,14 +21,31 @@
    - Pentium III (Anderson)
    - M68060 (Nikl)
  */
+union uu {
+        unsigned short us;
+        unsigned char b[2];
+};
+
+/* Endian independed version */
+static inline unsigned short
+get_unaligned16(const unsigned short *p)
+{
+        union uu  mm;
+        unsigned char *b = (unsigned char *)p;
+
+        mm.b[0] = b[0];
+        mm.b[1] = b[1];
+        return mm.us;
+}
+
 #ifdef POSTINC
 #  define OFF 0
 #  define PUP(a) *(a)++
-#  define UP_UNALIGNED(a) get_unaligned((a)++)
+#  define UP_UNALIGNED(a) get_unaligned16((a)++)
 #else
 #  define OFF 1
 #  define PUP(a) *++(a)
-#  define UP_UNALIGNED(a) get_unaligned(++(a))
+#  define UP_UNALIGNED(a) get_unaligned16(++(a))
 #endif
 
 /*
@@ -256,7 +258,6 @@ void inflate_fast(z_streamp strm, unsigned start)
                     }
                 }
                 else {
-#ifdef CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS
                     unsigned short *sout;
                     unsigned long loops;
 
@@ -274,22 +275,25 @@ void inflate_fast(z_streamp strm, unsigned start)
                         sfrom = (unsigned short *)(from - OFF);
                         loops = len >> 1;
                         do
+#ifdef CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS
+                            PUP(sout) = PUP(sfrom);
+#else
                             PUP(sout) = UP_UNALIGNED(sfrom);
+#endif
                         while (--loops);
                         out = (unsigned char *)sout + OFF;
                         from = (unsigned char *)sfrom + OFF;
                     } else { /* dist == 1 or dist == 2 */
                         unsigned short pat16;
 
-                        pat16 = *(sout-2+2*OFF);
-                        if (dist == 1)
-#if defined(__BIG_ENDIAN)
-                            pat16 = (pat16 & 0xff) | ((pat16 & 0xff) << 8);
-#elif defined(__LITTLE_ENDIAN)
-                            pat16 = (pat16 & 0xff00) | ((pat16 & 0xff00) >> 8);
-#else
-#error __BIG_ENDIAN nor __LITTLE_ENDIAN is defined
-#endif
+                        pat16 = *(sout-1+OFF);
+                        if (dist == 1) {
+                                union uu mm;
+                                /* copy one char pattern to both bytes */
+                                mm.us = pat16;
+                                mm.b[0] = mm.b[1];
+                                pat16 = mm.us;
+                        }
                         loops = len >> 1;
                         do
                             PUP(sout) = pat16;
@@ -298,20 +302,6 @@ void inflate_fast(z_streamp strm, unsigned start)
                     }
                     if (len & 1)
                         PUP(out) = PUP(from);
-#else /* CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS */
-                    from = out - dist;          /* copy direct from output */
-                    do {                        /* minimum length is three */
-                         PUP(out) = PUP(from);
-                         PUP(out) = PUP(from);
-                         PUP(out) = PUP(from);
-                         len -= 3;
-                    } while (len > 2);
-                    if (len) {
-                         PUP(out) = PUP(from);
-                         if (len > 1)
-                             PUP(out) = PUP(from);
-                    }
-#endif /* !CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS */
                 }
             }
             else if ((op & 64) == 0) {          /* 2nd level distance code */
diff --git a/mm/highmem.c b/mm/highmem.c
index 9c1e627f282e..bed8a8bfd01f 100644
--- a/mm/highmem.c
+++ b/mm/highmem.c
@@ -220,7 +220,7 @@ EXPORT_SYMBOL(kmap_high);
  * @page: &struct page to pin
  *
  * Returns the page's current virtual memory address, or NULL if no mapping
- * exists.  When and only when a non null address is returned then a
+ * exists.  If and only if a non null address is returned then a
  * matching call to kunmap_high() is necessary.
  *
  * This can be called from any context.
diff --git a/mm/memcontrol.c b/mm/memcontrol.c
index d813823ab08f..7973b5221fb8 100644
--- a/mm/memcontrol.c
+++ b/mm/memcontrol.c
@@ -6,6 +6,10 @@
  * Copyright 2007 OpenVZ SWsoft Inc
  * Author: Pavel Emelianov <xemul@openvz.org>
  *
+ * Memory thresholds
+ * Copyright (C) 2009 Nokia Corporation
+ * Author: Kirill A. Shutemov
+ *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
  * the Free Software Foundation; either version 2 of the License, or
@@ -21,6 +25,7 @@
 #include <linux/memcontrol.h>
 #include <linux/cgroup.h>
 #include <linux/mm.h>
+#include <linux/hugetlb.h>
 #include <linux/pagemap.h>
 #include <linux/smp.h>
 #include <linux/page-flags.h>
@@ -32,7 +37,10 @@
 #include <linux/rbtree.h>
 #include <linux/slab.h>
 #include <linux/swap.h>
+#include <linux/swapops.h>
 #include <linux/spinlock.h>
+#include <linux/eventfd.h>
+#include <linux/sort.h>
 #include <linux/fs.h>
 #include <linux/seq_file.h>
 #include <linux/vmalloc.h>
@@ -55,7 +63,15 @@ static int really_do_swap_account __initdata = 1; /* for remember boot option*/
 #define do_swap_account         (0)
 #endif
 
-#define SOFTLIMIT_EVENTS_THRESH (1000)
+/*
+ * Per memcg event counter is incremented at every pagein/pageout. This counter
+ * is used for trigger some periodic events. This is straightforward and better
+ * than using jiffies etc. to handle periodic memcg event.
+ *
+ * These values will be used as !((event) & ((1 <<(thresh)) - 1))
+ */
+#define THRESHOLDS_EVENTS_THRESH (7) /* once in 128 */
+#define SOFTLIMIT_EVENTS_THRESH (10) /* once in 1024 */
 
 /*
  * Statistics for memory cgroup.
@@ -69,62 +85,16 @@ enum mem_cgroup_stat_index {
         MEM_CGROUP_STAT_FILE_MAPPED,  /* # of pages charged as file rss */
         MEM_CGROUP_STAT_PGPGIN_COUNT,   /* # of pages paged in */
         MEM_CGROUP_STAT_PGPGOUT_COUNT,  /* # of pages paged out */
-        MEM_CGROUP_STAT_EVENTS, /* sum of pagein + pageout for internal use */
         MEM_CGROUP_STAT_SWAPOUT, /* # of pages, swapped out */
+        MEM_CGROUP_EVENTS,      /* incremented at every  pagein/pageout */
 
         MEM_CGROUP_STAT_NSTATS,
 };
 
 struct mem_cgroup_stat_cpu {
         s64 count[MEM_CGROUP_STAT_NSTATS];
-} ____cacheline_aligned_in_smp;
-
-struct mem_cgroup_stat {
-        struct mem_cgroup_stat_cpu cpustat[0];
 };
 
-static inline void
-__mem_cgroup_stat_reset_safe(struct mem_cgroup_stat_cpu *stat,
-                                enum mem_cgroup_stat_index idx)
-{
-        stat->count[idx] = 0;
-}
-
-static inline s64
-__mem_cgroup_stat_read_local(struct mem_cgroup_stat_cpu *stat,
-                                enum mem_cgroup_stat_index idx)
-{
-        return stat->count[idx];
-}
-
-/*
- * For accounting under irq disable, no need for increment preempt count.
- */
-static inline void __mem_cgroup_stat_add_safe(struct mem_cgroup_stat_cpu *stat,
-                enum mem_cgroup_stat_index idx, int val)
-{
-        stat->count[idx] += val;
-}
-
-static s64 mem_cgroup_read_stat(struct mem_cgroup_stat *stat,
-                enum mem_cgroup_stat_index idx)
-{
-        int cpu;
-        s64 ret = 0;
-        for_each_possible_cpu(cpu)
-                ret += stat->cpustat[cpu].count[idx];
-        return ret;
-}
-
-static s64 mem_cgroup_local_usage(struct mem_cgroup_stat *stat)
-{
-        s64 ret;
-
-        ret = mem_cgroup_read_stat(stat, MEM_CGROUP_STAT_CACHE);
-        ret += mem_cgroup_read_stat(stat, MEM_CGROUP_STAT_RSS);
-        return ret;
-}
-
 /*
  * per-zone information in memory controller.
  */
@@ -174,6 +144,22 @@ struct mem_cgroup_tree {
 
 static struct mem_cgroup_tree soft_limit_tree __read_mostly;
 
+struct mem_cgroup_threshold {
+        struct eventfd_ctx *eventfd;
+        u64 threshold;
+};
+
+struct mem_cgroup_threshold_ary {
+        /* An array index points to threshold just below usage. */
+        atomic_t current_threshold;
+        /* Size of entries[] */
+        unsigned int size;
+        /* Array of thresholds */
+        struct mem_cgroup_threshold entries[0];
+};
+
+static void mem_cgroup_threshold(struct mem_cgroup *mem);
+
 /*
  * The memory controller data structure. The memory controller controls both
  * page cache and RSS per cgroup. We would eventually like to provide
@@ -217,7 +203,7 @@ struct mem_cgroup {
          * Should the accounting and control be hierarchical, per subtree?
          */
         bool use_hierarchy;
-        unsigned long   last_oom_jiffies;
+        atomic_t        oom_lock;
         atomic_t        refcnt;
 
         unsigned int    swappiness;
@@ -225,10 +211,48 @@ struct mem_cgroup {
         /* set when res.limit == memsw.limit */
         bool            memsw_is_minimum;
 
+        /* protect arrays of thresholds */
+        struct mutex thresholds_lock;
+
+        /* thresholds for memory usage. RCU-protected */
+        struct mem_cgroup_threshold_ary *thresholds;
+
+        /* thresholds for mem+swap usage. RCU-protected */
+        struct mem_cgroup_threshold_ary *memsw_thresholds;
+
         /*
-         * statistics. This must be placed at the end of memcg.
+         * Should we move charges of a task when a task is moved into this
+         * mem_cgroup ? And what type of charges should we move ?
          */
-        struct mem_cgroup_stat stat;
+        unsigned long   move_charge_at_immigrate;
+
+        /*
+         * percpu counter.
+         */
+        struct mem_cgroup_stat_cpu *stat;
+};
+
+/* Stuffs for move charges at task migration. */
+/*
+ * Types of charges to be moved. "move_charge_at_immitgrate" is treated as a
+ * left-shifted bitmap of these types.
+ */
+enum move_type {
+        MOVE_CHARGE_TYPE_ANON,  /* private anonymous page and swap of it */
+        NR_MOVE_TYPE,
+};
+
+/* "mc" and its members are protected by cgroup_mutex */
+static struct move_charge_struct {
+        struct mem_cgroup *from;
+        struct mem_cgroup *to;
+        unsigned long precharge;
+        unsigned long moved_charge;
+        unsigned long moved_swap;
+        struct task_struct *moving_task;        /* a task moving charges */
+        wait_queue_head_t waitq;                /* a waitq for other context */
+} mc = {
+        .waitq = __WAIT_QUEUE_HEAD_INITIALIZER(mc.waitq),
 };
 
 /*
@@ -371,23 +395,6 @@ mem_cgroup_remove_exceeded(struct mem_cgroup *mem,
         spin_unlock(&mctz->lock);
 }
 
-static bool mem_cgroup_soft_limit_check(struct mem_cgroup *mem)
-{
-        bool ret = false;
-        int cpu;
-        s64 val;
-        struct mem_cgroup_stat_cpu *cpustat;
-
-        cpu = get_cpu();
-        cpustat = &mem->stat.cpustat[cpu];
-        val = __mem_cgroup_stat_read_local(cpustat, MEM_CGROUP_STAT_EVENTS);
-        if (unlikely(val > SOFTLIMIT_EVENTS_THRESH)) {
-                __mem_cgroup_stat_reset_safe(cpustat, MEM_CGROUP_STAT_EVENTS);
-                ret = true;
-        }
-        put_cpu();
-        return ret;
-}
 
 static void mem_cgroup_update_tree(struct mem_cgroup *mem, struct page *page)
 {
@@ -481,17 +488,31 @@ mem_cgroup_largest_soft_limit_node(struct mem_cgroup_tree_per_zone *mctz)
         return mz;
 }
 
+static s64 mem_cgroup_read_stat(struct mem_cgroup *mem,
+                enum mem_cgroup_stat_index idx)
+{
+        int cpu;
+        s64 val = 0;
+
+        for_each_possible_cpu(cpu)
+                val += per_cpu(mem->stat->count[idx], cpu);
+        return val;
+}
+
+static s64 mem_cgroup_local_usage(struct mem_cgroup *mem)
+{
+        s64 ret;
+
+        ret = mem_cgroup_read_stat(mem, MEM_CGROUP_STAT_RSS);
+        ret += mem_cgroup_read_stat(mem, MEM_CGROUP_STAT_CACHE);
+        return ret;
+}
+
 static void mem_cgroup_swap_statistics(struct mem_cgroup *mem,
                                          bool charge)
 {
         int val = (charge) ? 1 : -1;
-        struct mem_cgroup_stat *stat = &mem->stat;
-        struct mem_cgroup_stat_cpu *cpustat;
-        int cpu = get_cpu();
-
-        cpustat = &stat->cpustat[cpu];
-        __mem_cgroup_stat_add_safe(cpustat, MEM_CGROUP_STAT_SWAPOUT, val);
-        put_cpu();
+        this_cpu_add(mem->stat->count[MEM_CGROUP_STAT_SWAPOUT], val);
 }
 
 static void mem_cgroup_charge_statistics(struct mem_cgroup *mem,
@@ -499,24 +520,21 @@ static void mem_cgroup_charge_statistics(struct mem_cgroup *mem,
                                          bool charge)
 {
         int val = (charge) ? 1 : -1;
-        struct mem_cgroup_stat *stat = &mem->stat;
-        struct mem_cgroup_stat_cpu *cpustat;
-        int cpu = get_cpu();
 
-        cpustat = &stat->cpustat[cpu];
+        preempt_disable();
+
         if (PageCgroupCache(pc))
-                __mem_cgroup_stat_add_safe(cpustat, MEM_CGROUP_STAT_CACHE, val);
+                __this_cpu_add(mem->stat->count[MEM_CGROUP_STAT_CACHE], val);
         else
-                __mem_cgroup_stat_add_safe(cpustat, MEM_CGROUP_STAT_RSS, val);
+                __this_cpu_add(mem->stat->count[MEM_CGROUP_STAT_RSS], val);
 
         if (charge)
-                __mem_cgroup_stat_add_safe(cpustat,
-                                MEM_CGROUP_STAT_PGPGIN_COUNT, 1);
+                __this_cpu_inc(mem->stat->count[MEM_CGROUP_STAT_PGPGIN_COUNT]);
         else
-                __mem_cgroup_stat_add_safe(cpustat,
-                                MEM_CGROUP_STAT_PGPGOUT_COUNT, 1);
-        __mem_cgroup_stat_add_safe(cpustat, MEM_CGROUP_STAT_EVENTS, 1);
-        put_cpu();
+                __this_cpu_inc(mem->stat->count[MEM_CGROUP_STAT_PGPGOUT_COUNT]);
+        __this_cpu_inc(mem->stat->count[MEM_CGROUP_EVENTS]);
+
+        preempt_enable();
 }
 
 static unsigned long mem_cgroup_get_local_zonestat(struct mem_cgroup *mem,
@@ -534,6 +552,29 @@ static unsigned long mem_cgroup_get_local_zonestat(struct mem_cgroup *mem,
         return total;
 }
 
+static bool __memcg_event_check(struct mem_cgroup *mem, int event_mask_shift)
+{
+        s64 val;
+
+        val = this_cpu_read(mem->stat->count[MEM_CGROUP_EVENTS]);
+
+        return !(val & ((1 << event_mask_shift) - 1));
+}
+
+/*
+ * Check events in order.
+ *
+ */
+static void memcg_check_events(struct mem_cgroup *mem, struct page *page)
+{
+        /* threshold event is triggered in finer grain than soft limit */
+        if (unlikely(__memcg_event_check(mem, THRESHOLDS_EVENTS_THRESH))) {
+                mem_cgroup_threshold(mem);
+                if (unlikely(__memcg_event_check(mem, SOFTLIMIT_EVENTS_THRESH)))
+                        mem_cgroup_update_tree(mem, page);
+        }
+}
+
 static struct mem_cgroup *mem_cgroup_from_cont(struct cgroup *cont)
 {
         return container_of(cgroup_subsys_state(cont,
@@ -1000,7 +1041,7 @@ static int mem_cgroup_count_children_cb(struct mem_cgroup *mem, void *data)
 }
 
 /**
- * mem_cgroup_print_mem_info: Called from OOM with tasklist_lock held in read mode.
+ * mem_cgroup_print_oom_info: Called from OOM with tasklist_lock held in read mode.
  * @memcg: The memory cgroup that went over limit
  * @p: Task that is going to be killed
  *
@@ -1174,7 +1215,7 @@ static int mem_cgroup_hierarchical_reclaim(struct mem_cgroup *root_mem,
                                 }
                         }
                 }
-                if (!mem_cgroup_local_usage(&victim->stat)) {
+                if (!mem_cgroup_local_usage(victim)) {
                         /* this cgroup's local usage == 0 */
                         css_put(&victim->css);
                         continue;
@@ -1205,32 +1246,102 @@ static int mem_cgroup_hierarchical_reclaim(struct mem_cgroup *root_mem,
         return total;
 }
 
-bool mem_cgroup_oom_called(struct task_struct *task)
+static int mem_cgroup_oom_lock_cb(struct mem_cgroup *mem, void *data)
 {
-        bool ret = false;
-        struct mem_cgroup *mem;
-        struct mm_struct *mm;
+        int *val = (int *)data;
+        int x;
+        /*
+         * Logically, we can stop scanning immediately when we find
+         * a memcg is already locked. But condidering unlock ops and
+         * creation/removal of memcg, scan-all is simple operation.
+         */
+        x = atomic_inc_return(&mem->oom_lock);
+        *val = max(x, *val);
+        return 0;
+}
+/*
+ * Check OOM-Killer is already running under our hierarchy.
+ * If someone is running, return false.
+ */
+static bool mem_cgroup_oom_lock(struct mem_cgroup *mem)
+{
+        int lock_count = 0;
 
-        rcu_read_lock();
-        mm = task->mm;
-        if (!mm)
-                mm = &init_mm;
-        mem = mem_cgroup_from_task(rcu_dereference(mm->owner));
-        if (mem && time_before(jiffies, mem->last_oom_jiffies + HZ/10))
-                ret = true;
-        rcu_read_unlock();
-        return ret;
+        mem_cgroup_walk_tree(mem, &lock_count, mem_cgroup_oom_lock_cb);
+
+        if (lock_count == 1)
+                return true;
+        return false;
 }
 
-static int record_last_oom_cb(struct mem_cgroup *mem, void *data)
+static int mem_cgroup_oom_unlock_cb(struct mem_cgroup *mem, void *data)
 {
-        mem->last_oom_jiffies = jiffies;
+        /*
+         * When a new child is created while the hierarchy is under oom,
+         * mem_cgroup_oom_lock() may not be called. We have to use
+         * atomic_add_unless() here.
+         */
+        atomic_add_unless(&mem->oom_lock, -1, 0);
         return 0;
 }
 
-static void record_last_oom(struct mem_cgroup *mem)
+static void mem_cgroup_oom_unlock(struct mem_cgroup *mem)
 {
-        mem_cgroup_walk_tree(mem, NULL, record_last_oom_cb);
+        mem_cgroup_walk_tree(mem, NULL, mem_cgroup_oom_unlock_cb);
+}
+
+static DEFINE_MUTEX(memcg_oom_mutex);
+static DECLARE_WAIT_QUEUE_HEAD(memcg_oom_waitq);
+
+/*
+ * try to call OOM killer. returns false if we should exit memory-reclaim loop.
+ */
+bool mem_cgroup_handle_oom(struct mem_cgroup *mem, gfp_t mask)
+{
+        DEFINE_WAIT(wait);
+        bool locked;
+
+        /* At first, try to OOM lock hierarchy under mem.*/
+        mutex_lock(&memcg_oom_mutex);
+        locked = mem_cgroup_oom_lock(mem);
+        /*
+         * Even if signal_pending(), we can't quit charge() loop without
+         * accounting. So, UNINTERRUPTIBLE is appropriate. But SIGKILL
+         * under OOM is always welcomed, use TASK_KILLABLE here.
+         */
+        if (!locked)
+                prepare_to_wait(&memcg_oom_waitq, &wait, TASK_KILLABLE);
+        mutex_unlock(&memcg_oom_mutex);
+
+        if (locked)
+                mem_cgroup_out_of_memory(mem, mask);
+        else {
+                schedule();
+                finish_wait(&memcg_oom_waitq, &wait);
+        }
+        mutex_lock(&memcg_oom_mutex);
+        mem_cgroup_oom_unlock(mem);
+        /*
+         * Here, we use global waitq .....more fine grained waitq ?
+         * Assume following hierarchy.
+         * A/
+         *   01
+         *   02
+         * assume OOM happens both in A and 01 at the same time. Tthey are
+         * mutually exclusive by lock. (kill in 01 helps A.)
+         * When we use per memcg waitq, we have to wake up waiters on A and 02
+         * in addtion to waiters on 01. We use global waitq for avoiding mess.
+         * It will not be a big problem.
+         * (And a task may be moved to other groups while it's waiting for OOM.)
+         */
+        wake_up_all(&memcg_oom_waitq);
+        mutex_unlock(&memcg_oom_mutex);
+
+        if (test_thread_flag(TIF_MEMDIE) || fatal_signal_pending(current))
+                return false;
+        /* Give chance to dying process */
+        schedule_timeout(1);
+        return true;
 }
 
 /*
@@ -1240,9 +1351,6 @@ static void record_last_oom(struct mem_cgroup *mem)
 void mem_cgroup_update_file_mapped(struct page *page, int val)
 {
         struct mem_cgroup *mem;
-        struct mem_cgroup_stat *stat;
-        struct mem_cgroup_stat_cpu *cpustat;
-        int cpu;
         struct page_cgroup *pc;
 
         pc = lookup_page_cgroup(page);
@@ -1258,13 +1366,10 @@ void mem_cgroup_update_file_mapped(struct page *page, int val)
                 goto done;
 
         /*
-         * Preemption is already disabled, we don't need get_cpu()
+         * Preemption is already disabled. We can use __this_cpu_xxx
          */
-        cpu = smp_processor_id();
-        stat = &mem->stat;
-        cpustat = &stat->cpustat[cpu];
+        __this_cpu_add(mem->stat->count[MEM_CGROUP_STAT_FILE_MAPPED], val);
 
-        __mem_cgroup_stat_add_safe(cpustat, MEM_CGROUP_STAT_FILE_MAPPED, val);
 done:
         unlock_page_cgroup(pc);
 }
@@ -1401,19 +1506,21 @@ static int __cpuinit memcg_stock_cpu_callback(struct notifier_block *nb,
  * oom-killer can be invoked.
  */
 static int __mem_cgroup_try_charge(struct mm_struct *mm,
-                        gfp_t gfp_mask, struct mem_cgroup **memcg,
-                        bool oom, struct page *page)
+                        gfp_t gfp_mask, struct mem_cgroup **memcg, bool oom)
 {
         struct mem_cgroup *mem, *mem_over_limit;
         int nr_retries = MEM_CGROUP_RECLAIM_RETRIES;
         struct res_counter *fail_res;
         int csize = CHARGE_SIZE;
 
-        if (unlikely(test_thread_flag(TIF_MEMDIE))) {
-                /* Don't account this! */
-                *memcg = NULL;
-                return 0;
-        }
+        /*
+         * Unlike gloval-vm's OOM-kill, we're not in memory shortage
+         * in system level. So, allow to go ahead dying process in addition to
+         * MEMDIE process.
+         */
+        if (unlikely(test_thread_flag(TIF_MEMDIE)
+                     || fatal_signal_pending(current)))
+                goto bypass;
 
         /*
          * We always charge the cgroup the mm_struct belongs to.
@@ -1440,7 +1547,7 @@ static int __mem_cgroup_try_charge(struct mm_struct *mm,
                 unsigned long flags = 0;
 
                 if (consume_stock(mem))
-                        goto charged;
+                        goto done;
 
                 ret = res_counter_charge(&mem->res, csize, &fail_res);
                 if (likely(!ret)) {
@@ -1483,28 +1590,70 @@ static int __mem_cgroup_try_charge(struct mm_struct *mm,
                 if (mem_cgroup_check_under_limit(mem_over_limit))
                         continue;
 
+                /* try to avoid oom while someone is moving charge */
+                if (mc.moving_task && current != mc.moving_task) {
+                        struct mem_cgroup *from, *to;
+                        bool do_continue = false;
+                        /*
+                         * There is a small race that "from" or "to" can be
+                         * freed by rmdir, so we use css_tryget().
+                         */
+                        rcu_read_lock();
+                        from = mc.from;
+                        to = mc.to;
+                        if (from && css_tryget(&from->css)) {
+                                if (mem_over_limit->use_hierarchy)
+                                        do_continue = css_is_ancestor(
+                                                        &from->css,
+                                                        &mem_over_limit->css);
+                                else
+                                        do_continue = (from == mem_over_limit);
+                                css_put(&from->css);
+                        }
+                        if (!do_continue && to && css_tryget(&to->css)) {
+                                if (mem_over_limit->use_hierarchy)
+                                        do_continue = css_is_ancestor(
+                                                        &to->css,
+                                                        &mem_over_limit->css);
+                                else
+                                        do_continue = (to == mem_over_limit);
+                                css_put(&to->css);
+                        }
+                        rcu_read_unlock();
+                        if (do_continue) {
+                                DEFINE_WAIT(wait);
+                                prepare_to_wait(&mc.waitq, &wait,
+                                                        TASK_INTERRUPTIBLE);
+                                /* moving charge context might have finished. */
+                                if (mc.moving_task)
+                                        schedule();
+                                finish_wait(&mc.waitq, &wait);
+                                continue;
+                        }
+                }
+
                 if (!nr_retries--) {
-                        if (oom) {
-                                mem_cgroup_out_of_memory(mem_over_limit, gfp_mask);
-                                record_last_oom(mem_over_limit);
+                        if (!oom)
+                                goto nomem;
+                        if (mem_cgroup_handle_oom(mem_over_limit, gfp_mask)) {
+                                nr_retries = MEM_CGROUP_RECLAIM_RETRIES;
+                                continue;
                         }
-                        goto nomem;
+                        /* When we reach here, current task is dying .*/
+                        css_put(&mem->css);
+                        goto bypass;
                 }
         }
         if (csize > PAGE_SIZE)
                 refill_stock(mem, csize - PAGE_SIZE);
-charged:
-        /*
-         * Insert ancestor (and ancestor's ancestors), to softlimit RB-tree.
-         * if they exceeds softlimit.
-         */
-        if (mem_cgroup_soft_limit_check(mem))
-                mem_cgroup_update_tree(mem, page);
 done:
         return 0;
 nomem:
         css_put(&mem->css);
         return -ENOMEM;
+bypass:
+        *memcg = NULL;
+        return 0;
 }
 
 /*
@@ -1512,14 +1661,23 @@ nomem:
  * This function is for that and do uncharge, put css's refcnt.
  * gotten by try_charge().
  */
-static void mem_cgroup_cancel_charge(struct mem_cgroup *mem)
+static void __mem_cgroup_cancel_charge(struct mem_cgroup *mem,
+                                                        unsigned long count)
 {
         if (!mem_cgroup_is_root(mem)) {
-                res_counter_uncharge(&mem->res, PAGE_SIZE);
+                res_counter_uncharge(&mem->res, PAGE_SIZE * count);
                 if (do_swap_account)
-                        res_counter_uncharge(&mem->memsw, PAGE_SIZE);
+                        res_counter_uncharge(&mem->memsw, PAGE_SIZE * count);
+                VM_BUG_ON(test_bit(CSS_ROOT, &mem->css.flags));
+                WARN_ON_ONCE(count > INT_MAX);
+                __css_put(&mem->css, (int)count);
         }
-        css_put(&mem->css);
+        /* we don't need css_put for root */
+}
+
+static void mem_cgroup_cancel_charge(struct mem_cgroup *mem)
+{
+        __mem_cgroup_cancel_charge(mem, 1);
 }
 
 /*
@@ -1615,6 +1773,12 @@ static void __mem_cgroup_commit_charge(struct mem_cgroup *mem,
         mem_cgroup_charge_statistics(mem, pc, true);
 
         unlock_page_cgroup(pc);
+        /*
+         * "charge_statistics" updated event counter. Then, check it.
+         * Insert ancestor (and ancestor's ancestors), to softlimit RB-tree.
+         * if they exceeds softlimit.
+         */
+        memcg_check_events(mem, pc->page);
 }
 
 /**
@@ -1622,22 +1786,22 @@ static void __mem_cgroup_commit_charge(struct mem_cgroup *mem,
  * @pc: page_cgroup of the page.
  * @from: mem_cgroup which the page is moved from.
  * @to: mem_cgroup which the page is moved to. @from != @to.
+ * @uncharge: whether we should call uncharge and css_put against @from.
  *
  * The caller must confirm following.
  * - page is not on LRU (isolate_page() is useful.)
  * - the pc is locked, used, and ->mem_cgroup points to @from.
  *
- * This function does "uncharge" from old cgroup but doesn't do "charge" to
- * new cgroup. It should be done by a caller.
+ * This function doesn't do "charge" nor css_get to new cgroup. It should be
+ * done by a caller(__mem_cgroup_try_charge would be usefull). If @uncharge is
+ * true, this function does "uncharge" from old cgroup, but it doesn't if
+ * @uncharge is false, so a caller should do "uncharge".
  */
 
 static void __mem_cgroup_move_account(struct page_cgroup *pc,
-        struct mem_cgroup *from, struct mem_cgroup *to)
+        struct mem_cgroup *from, struct mem_cgroup *to, bool uncharge)
 {
         struct page *page;
-        int cpu;
-        struct mem_cgroup_stat *stat;
-        struct mem_cgroup_stat_cpu *cpustat;
 
         VM_BUG_ON(from == to);
         VM_BUG_ON(PageLRU(pc->page));
@@ -1645,38 +1809,28 @@ static void __mem_cgroup_move_account(struct page_cgroup *pc,
         VM_BUG_ON(!PageCgroupUsed(pc));
         VM_BUG_ON(pc->mem_cgroup != from);
 
-        if (!mem_cgroup_is_root(from))
-                res_counter_uncharge(&from->res, PAGE_SIZE);
-        mem_cgroup_charge_statistics(from, pc, false);
-
         page = pc->page;
         if (page_mapped(page) && !PageAnon(page)) {
-                cpu = smp_processor_id();
-                /* Update mapped_file data for mem_cgroup "from" */
-                stat = &from->stat;
-                cpustat = &stat->cpustat[cpu];
-                __mem_cgroup_stat_add_safe(cpustat, MEM_CGROUP_STAT_FILE_MAPPED,
-                                                -1);
-
-                /* Update mapped_file data for mem_cgroup "to" */
-                stat = &to->stat;
-                cpustat = &stat->cpustat[cpu];
-                __mem_cgroup_stat_add_safe(cpustat, MEM_CGROUP_STAT_FILE_MAPPED,
-                                                1);
+                /* Update mapped_file data for mem_cgroup */
+                preempt_disable();
+                __this_cpu_dec(from->stat->count[MEM_CGROUP_STAT_FILE_MAPPED]);
+                __this_cpu_inc(to->stat->count[MEM_CGROUP_STAT_FILE_MAPPED]);
+                preempt_enable();
         }
+        mem_cgroup_charge_statistics(from, pc, false);
+        if (uncharge)
+                /* This is not "cancel", but cancel_charge does all we need. */
+                mem_cgroup_cancel_charge(from);
 
-        if (do_swap_account && !mem_cgroup_is_root(from))
-                res_counter_uncharge(&from->memsw, PAGE_SIZE);
-        css_put(&from->css);
-
-        css_get(&to->css);
+        /* caller should have done css_get */
         pc->mem_cgroup = to;
         mem_cgroup_charge_statistics(to, pc, true);
         /*
          * We charges against "to" which may not have any tasks. Then, "to"
          * can be under rmdir(). But in current implementation, caller of
-         * this function is just force_empty() and it's garanteed that
-         * "to" is never removed. So, we don't check rmdir status here.
+         * this function is just force_empty() and move charge, so it's
+         * garanteed that "to" is never removed. So, we don't check rmdir
+         * status here.
          */
 }
 
@@ -1685,15 +1839,20 @@ static void __mem_cgroup_move_account(struct page_cgroup *pc,
  * __mem_cgroup_move_account()
  */
 static int mem_cgroup_move_account(struct page_cgroup *pc,
-                                struct mem_cgroup *from, struct mem_cgroup *to)
+                struct mem_cgroup *from, struct mem_cgroup *to, bool uncharge)
 {
         int ret = -EINVAL;
         lock_page_cgroup(pc);
         if (PageCgroupUsed(pc) && pc->mem_cgroup == from) {
-                __mem_cgroup_move_account(pc, from, to);
+                __mem_cgroup_move_account(pc, from, to, uncharge);
                 ret = 0;
         }
         unlock_page_cgroup(pc);
+        /*
+         * check events
+         */
+        memcg_check_events(to, pc->page);
+        memcg_check_events(from, pc->page);
         return ret;
 }
 
@@ -1722,15 +1881,13 @@ static int mem_cgroup_move_parent(struct page_cgroup *pc,
                 goto put;
 
         parent = mem_cgroup_from_cont(pcg);
-        ret = __mem_cgroup_try_charge(NULL, gfp_mask, &parent, false, page);
+        ret = __mem_cgroup_try_charge(NULL, gfp_mask, &parent, false);
         if (ret || !parent)
                 goto put_back;
 
-        ret = mem_cgroup_move_account(pc, child, parent);
-        if (!ret)
-                css_put(&parent->css);  /* drop extra refcnt by try_charge() */
-        else
-                mem_cgroup_cancel_charge(parent);       /* does css_put */
+        ret = mem_cgroup_move_account(pc, child, parent, true);
+        if (ret)
+                mem_cgroup_cancel_charge(parent);
 put_back:
         putback_lru_page(page);
 put:
@@ -1760,7 +1917,7 @@ static int mem_cgroup_charge_common(struct page *page, struct mm_struct *mm,
         prefetchw(pc);
 
         mem = memcg;
-        ret = __mem_cgroup_try_charge(mm, gfp_mask, &mem, true, page);
+        ret = __mem_cgroup_try_charge(mm, gfp_mask, &mem, true);
         if (ret || !mem)
                 return ret;
 
@@ -1880,14 +2037,14 @@ int mem_cgroup_try_charge_swapin(struct mm_struct *mm,
         if (!mem)
                 goto charge_cur_mm;
         *ptr = mem;
-        ret = __mem_cgroup_try_charge(NULL, mask, ptr, true, page);
+        ret = __mem_cgroup_try_charge(NULL, mask, ptr, true);
         /* drop extra refcnt from tryget */
         css_put(&mem->css);
         return ret;
 charge_cur_mm:
         if (unlikely(!mm))
                 mm = &init_mm;
-        return __mem_cgroup_try_charge(mm, mask, ptr, true, page);
+        return __mem_cgroup_try_charge(mm, mask, ptr, true);
 }
 
 static void
@@ -2064,8 +2221,7 @@ __mem_cgroup_uncharge_common(struct page *page, enum charge_type ctype)
         mz = page_cgroup_zoneinfo(pc);
         unlock_page_cgroup(pc);
 
-        if (mem_cgroup_soft_limit_check(mem))
-                mem_cgroup_update_tree(mem, page);
+        memcg_check_events(mem, page);
         /* at swapout, this memcg will be accessed to record to swap */
         if (ctype != MEM_CGROUP_CHARGE_TYPE_SWAPOUT)
                 css_put(&mem->css);
@@ -2192,6 +2348,64 @@ void mem_cgroup_uncharge_swap(swp_entry_t ent)
         }
         rcu_read_unlock();
 }
+
+/**
+ * mem_cgroup_move_swap_account - move swap charge and swap_cgroup's record.
+ * @entry: swap entry to be moved
+ * @from:  mem_cgroup which the entry is moved from
+ * @to:  mem_cgroup which the entry is moved to
+ * @need_fixup: whether we should fixup res_counters and refcounts.
+ *
+ * It succeeds only when the swap_cgroup's record for this entry is the same
+ * as the mem_cgroup's id of @from.
+ *
+ * Returns 0 on success, -EINVAL on failure.
+ *
+ * The caller must have charged to @to, IOW, called res_counter_charge() about
+ * both res and memsw, and called css_get().
+ */
+static int mem_cgroup_move_swap_account(swp_entry_t entry,
+                struct mem_cgroup *from, struct mem_cgroup *to, bool need_fixup)
+{
+        unsigned short old_id, new_id;
+
+        old_id = css_id(&from->css);
+        new_id = css_id(&to->css);
+
+        if (swap_cgroup_cmpxchg(entry, old_id, new_id) == old_id) {
+                mem_cgroup_swap_statistics(from, false);
+                mem_cgroup_swap_statistics(to, true);
+                /*
+                 * This function is only called from task migration context now.
+                 * It postpones res_counter and refcount handling till the end
+                 * of task migration(mem_cgroup_clear_mc()) for performance
+                 * improvement. But we cannot postpone mem_cgroup_get(to)
+                 * because if the process that has been moved to @to does
+                 * swap-in, the refcount of @to might be decreased to 0.
+                 */
+                mem_cgroup_get(to);
+                if (need_fixup) {
+                        if (!mem_cgroup_is_root(from))
+                                res_counter_uncharge(&from->memsw, PAGE_SIZE);
+                        mem_cgroup_put(from);
+                        /*
+                         * we charged both to->res and to->memsw, so we should
+                         * uncharge to->res.
+                         */
+                        if (!mem_cgroup_is_root(to))
+                                res_counter_uncharge(&to->res, PAGE_SIZE);
+                        css_put(&to->css);
+                }
+                return 0;
+        }
+        return -EINVAL;
+}
+#else
+static inline int mem_cgroup_move_swap_account(swp_entry_t entry,
+                struct mem_cgroup *from, struct mem_cgroup *to, bool need_fixup)
+{
+        return -EINVAL;
+}
 #endif
 
 /*
@@ -2216,8 +2430,7 @@ int mem_cgroup_prepare_migration(struct page *page, struct mem_cgroup **ptr)
         unlock_page_cgroup(pc);
 
         if (mem) {
-                ret = __mem_cgroup_try_charge(NULL, GFP_KERNEL, &mem, false,
-                                                page);
+                ret = __mem_cgroup_try_charge(NULL, GFP_KERNEL, &mem, false);
                 css_put(&mem->css);
         }
         *ptr = mem;
@@ -2704,7 +2917,7 @@ static int
 mem_cgroup_get_idx_stat(struct mem_cgroup *mem, void *data)
 {
         struct mem_cgroup_idx_data *d = data;
-        d->val += mem_cgroup_read_stat(&mem->stat, d->idx);
+        d->val += mem_cgroup_read_stat(mem, d->idx);
         return 0;
 }
 
@@ -2719,40 +2932,50 @@ mem_cgroup_get_recursive_idx_stat(struct mem_cgroup *mem,
         *val = d.val;
 }
 
+static inline u64 mem_cgroup_usage(struct mem_cgroup *mem, bool swap)
+{
+        u64 idx_val, val;
+
+        if (!mem_cgroup_is_root(mem)) {
+                if (!swap)
+                        return res_counter_read_u64(&mem->res, RES_USAGE);
+                else
+                        return res_counter_read_u64(&mem->memsw, RES_USAGE);
+        }
+
+        mem_cgroup_get_recursive_idx_stat(mem, MEM_CGROUP_STAT_CACHE, &idx_val);
+        val = idx_val;
+        mem_cgroup_get_recursive_idx_stat(mem, MEM_CGROUP_STAT_RSS, &idx_val);
+        val += idx_val;
+
+        if (swap) {
+                mem_cgroup_get_recursive_idx_stat(mem,
+                                MEM_CGROUP_STAT_SWAPOUT, &idx_val);
+                val += idx_val;
+        }
+
+        return val << PAGE_SHIFT;
+}
+
 static u64 mem_cgroup_read(struct cgroup *cont, struct cftype *cft)
 {
         struct mem_cgroup *mem = mem_cgroup_from_cont(cont);
-        u64 idx_val, val;
+        u64 val;
         int type, name;
 
         type = MEMFILE_TYPE(cft->private);
         name = MEMFILE_ATTR(cft->private);
         switch (type) {
         case _MEM:
-                if (name == RES_USAGE && mem_cgroup_is_root(mem)) {
-                        mem_cgroup_get_recursive_idx_stat(mem,
-                                MEM_CGROUP_STAT_CACHE, &idx_val);
-                        val = idx_val;
-                        mem_cgroup_get_recursive_idx_stat(mem,
-                                MEM_CGROUP_STAT_RSS, &idx_val);
-                        val += idx_val;
-                        val <<= PAGE_SHIFT;
-                } else
+                if (name == RES_USAGE)
+                        val = mem_cgroup_usage(mem, false);
+                else
                         val = res_counter_read_u64(&mem->res, name);
                 break;
         case _MEMSWAP:
-                if (name == RES_USAGE && mem_cgroup_is_root(mem)) {
-                        mem_cgroup_get_recursive_idx_stat(mem,
-                                MEM_CGROUP_STAT_CACHE, &idx_val);
-                        val = idx_val;
-                        mem_cgroup_get_recursive_idx_stat(mem,
-                                MEM_CGROUP_STAT_RSS, &idx_val);
-                        val += idx_val;
-                        mem_cgroup_get_recursive_idx_stat(mem,
-                                MEM_CGROUP_STAT_SWAPOUT, &idx_val);
-                        val += idx_val;
-                        val <<= PAGE_SHIFT;
-                } else
+                if (name == RES_USAGE)
+                        val = mem_cgroup_usage(mem, true);
+                else
                         val = res_counter_read_u64(&mem->memsw, name);
                 break;
         default:
@@ -2865,6 +3088,39 @@ static int mem_cgroup_reset(struct cgroup *cont, unsigned int event)
         return 0;
 }
 
+static u64 mem_cgroup_move_charge_read(struct cgroup *cgrp,
+                                        struct cftype *cft)
+{
+        return mem_cgroup_from_cont(cgrp)->move_charge_at_immigrate;
+}
+
+#ifdef CONFIG_MMU
+static int mem_cgroup_move_charge_write(struct cgroup *cgrp,
+                                        struct cftype *cft, u64 val)
+{
+        struct mem_cgroup *mem = mem_cgroup_from_cont(cgrp);
+
+        if (val >= (1 << NR_MOVE_TYPE))
+                return -EINVAL;
+        /*
+         * We check this value several times in both in can_attach() and
+         * attach(), so we need cgroup lock to prevent this value from being
+         * inconsistent.
+         */
+        cgroup_lock();
+        mem->move_charge_at_immigrate = val;
+        cgroup_unlock();
+
+        return 0;
+}
+#else
+static int mem_cgroup_move_charge_write(struct cgroup *cgrp,
+                                        struct cftype *cft, u64 val)
+{
+        return -ENOSYS;
+}
+#endif
+
 
 /* For read statistics */
 enum {
@@ -2910,18 +3166,18 @@ static int mem_cgroup_get_local_stat(struct mem_cgroup *mem, void *data)
         s64 val;
 
         /* per cpu stat */
-        val = mem_cgroup_read_stat(&mem->stat, MEM_CGROUP_STAT_CACHE);
+        val = mem_cgroup_read_stat(mem, MEM_CGROUP_STAT_CACHE);
         s->stat[MCS_CACHE] += val * PAGE_SIZE;
-        val = mem_cgroup_read_stat(&mem->stat, MEM_CGROUP_STAT_RSS);
+        val = mem_cgroup_read_stat(mem, MEM_CGROUP_STAT_RSS);
         s->stat[MCS_RSS] += val * PAGE_SIZE;
-        val = mem_cgroup_read_stat(&mem->stat, MEM_CGROUP_STAT_FILE_MAPPED);
+        val = mem_cgroup_read_stat(mem, MEM_CGROUP_STAT_FILE_MAPPED);
         s->stat[MCS_FILE_MAPPED] += val * PAGE_SIZE;
-        val = mem_cgroup_read_stat(&mem->stat, MEM_CGROUP_STAT_PGPGIN_COUNT);
+        val = mem_cgroup_read_stat(mem, MEM_CGROUP_STAT_PGPGIN_COUNT);
         s->stat[MCS_PGPGIN] += val;
-        val = mem_cgroup_read_stat(&mem->stat, MEM_CGROUP_STAT_PGPGOUT_COUNT);
+        val = mem_cgroup_read_stat(mem, MEM_CGROUP_STAT_PGPGOUT_COUNT);
         s->stat[MCS_PGPGOUT] += val;
         if (do_swap_account) {
-                val = mem_cgroup_read_stat(&mem->stat, MEM_CGROUP_STAT_SWAPOUT);
+                val = mem_cgroup_read_stat(mem, MEM_CGROUP_STAT_SWAPOUT);
                 s->stat[MCS_SWAP] += val * PAGE_SIZE;
         }
 
@@ -3049,12 +3305,249 @@ static int mem_cgroup_swappiness_write(struct cgroup *cgrp, struct cftype *cft,
         return 0;
 }
 
+static void __mem_cgroup_threshold(struct mem_cgroup *memcg, bool swap)
+{
+        struct mem_cgroup_threshold_ary *t;
+        u64 usage;
+        int i;
+
+        rcu_read_lock();
+        if (!swap)
+                t = rcu_dereference(memcg->thresholds);
+        else
+                t = rcu_dereference(memcg->memsw_thresholds);
+
+        if (!t)
+                goto unlock;
+
+        usage = mem_cgroup_usage(memcg, swap);
+
+        /*
+         * current_threshold points to threshold just below usage.
+         * If it's not true, a threshold was crossed after last
+         * call of __mem_cgroup_threshold().
+         */
+        i = atomic_read(&t->current_threshold);
+
+        /*
+         * Iterate backward over array of thresholds starting from
+         * current_threshold and check if a threshold is crossed.
+         * If none of thresholds below usage is crossed, we read
+         * only one element of the array here.
+         */
+        for (; i >= 0 && unlikely(t->entries[i].threshold > usage); i--)
+                eventfd_signal(t->entries[i].eventfd, 1);
+
+        /* i = current_threshold + 1 */
+        i++;
+
+        /*
+         * Iterate forward over array of thresholds starting from
+         * current_threshold+1 and check if a threshold is crossed.
+         * If none of thresholds above usage is crossed, we read
+         * only one element of the array here.
+         */
+        for (; i < t->size && unlikely(t->entries[i].threshold <= usage); i++)
+                eventfd_signal(t->entries[i].eventfd, 1);
+
+        /* Update current_threshold */
+        atomic_set(&t->current_threshold, i - 1);
+unlock:
+        rcu_read_unlock();
+}
+
+static void mem_cgroup_threshold(struct mem_cgroup *memcg)
+{
+        __mem_cgroup_threshold(memcg, false);
+        if (do_swap_account)
+                __mem_cgroup_threshold(memcg, true);
+}
+
+static int compare_thresholds(const void *a, const void *b)
+{
+        const struct mem_cgroup_threshold *_a = a;
+        const struct mem_cgroup_threshold *_b = b;
+
+        return _a->threshold - _b->threshold;
+}
+
+static int mem_cgroup_register_event(struct cgroup *cgrp, struct cftype *cft,
+                struct eventfd_ctx *eventfd, const char *args)
+{
+        struct mem_cgroup *memcg = mem_cgroup_from_cont(cgrp);
+        struct mem_cgroup_threshold_ary *thresholds, *thresholds_new;
+        int type = MEMFILE_TYPE(cft->private);
+        u64 threshold, usage;
+        int size;
+        int i, ret;
+
+        ret = res_counter_memparse_write_strategy(args, &threshold);
+        if (ret)
+                return ret;
+
+        mutex_lock(&memcg->thresholds_lock);
+        if (type == _MEM)
+                thresholds = memcg->thresholds;
+        else if (type == _MEMSWAP)
+                thresholds = memcg->memsw_thresholds;
+        else
+                BUG();
+
+        usage = mem_cgroup_usage(memcg, type == _MEMSWAP);
+
+        /* Check if a threshold crossed before adding a new one */
+        if (thresholds)
+                __mem_cgroup_threshold(memcg, type == _MEMSWAP);
+
+        if (thresholds)
+                size = thresholds->size + 1;
+        else
+                size = 1;
+
+        /* Allocate memory for new array of thresholds */
+        thresholds_new = kmalloc(sizeof(*thresholds_new) +
+                        size * sizeof(struct mem_cgroup_threshold),
+                        GFP_KERNEL);
+        if (!thresholds_new) {
+                ret = -ENOMEM;
+                goto unlock;
+        }
+        thresholds_new->size = size;
+
+        /* Copy thresholds (if any) to new array */
+        if (thresholds)
+                memcpy(thresholds_new->entries, thresholds->entries,
+                                thresholds->size *
+                                sizeof(struct mem_cgroup_threshold));
+        /* Add new threshold */
+        thresholds_new->entries[size - 1].eventfd = eventfd;
+        thresholds_new->entries[size - 1].threshold = threshold;
+
+        /* Sort thresholds. Registering of new threshold isn't time-critical */
+        sort(thresholds_new->entries, size,
+                        sizeof(struct mem_cgroup_threshold),
+                        compare_thresholds, NULL);
+
+        /* Find current threshold */
+        atomic_set(&thresholds_new->current_threshold, -1);
+        for (i = 0; i < size; i++) {
+                if (thresholds_new->entries[i].threshold < usage) {
+                        /*
+                         * thresholds_new->current_threshold will not be used
+                         * until rcu_assign_pointer(), so it's safe to increment
+                         * it here.
+                         */
+                        atomic_inc(&thresholds_new->current_threshold);
+                }
+        }
+
+        if (type == _MEM)
+                rcu_assign_pointer(memcg->thresholds, thresholds_new);
+        else
+                rcu_assign_pointer(memcg->memsw_thresholds, thresholds_new);
+
+        /* To be sure that nobody uses thresholds before freeing it */
+        synchronize_rcu();
+
+        kfree(thresholds);
+unlock:
+        mutex_unlock(&memcg->thresholds_lock);
+
+        return ret;
+}
+
+static int mem_cgroup_unregister_event(struct cgroup *cgrp, struct cftype *cft,
+                struct eventfd_ctx *eventfd)
+{
+        struct mem_cgroup *memcg = mem_cgroup_from_cont(cgrp);
+        struct mem_cgroup_threshold_ary *thresholds, *thresholds_new;
+        int type = MEMFILE_TYPE(cft->private);
+        u64 usage;
+        int size = 0;
+        int i, j, ret;
+
+        mutex_lock(&memcg->thresholds_lock);
+        if (type == _MEM)
+                thresholds = memcg->thresholds;
+        else if (type == _MEMSWAP)
+                thresholds = memcg->memsw_thresholds;
+        else
+                BUG();
+
+        /*
+         * Something went wrong if we trying to unregister a threshold
+         * if we don't have thresholds
+         */
+        BUG_ON(!thresholds);
+
+        usage = mem_cgroup_usage(memcg, type == _MEMSWAP);
+
+        /* Check if a threshold crossed before removing */
+        __mem_cgroup_threshold(memcg, type == _MEMSWAP);
+
+        /* Calculate new number of threshold */
+        for (i = 0; i < thresholds->size; i++) {
+                if (thresholds->entries[i].eventfd != eventfd)
+                        size++;
+        }
+
+        /* Set thresholds array to NULL if we don't have thresholds */
+        if (!size) {
+                thresholds_new = NULL;
+                goto assign;
+        }
+
+        /* Allocate memory for new array of thresholds */
+        thresholds_new = kmalloc(sizeof(*thresholds_new) +
+                        size * sizeof(struct mem_cgroup_threshold),
+                        GFP_KERNEL);
+        if (!thresholds_new) {
+                ret = -ENOMEM;
+                goto unlock;
+        }
+        thresholds_new->size = size;
+
+        /* Copy thresholds and find current threshold */
+        atomic_set(&thresholds_new->current_threshold, -1);
+        for (i = 0, j = 0; i < thresholds->size; i++) {
+                if (thresholds->entries[i].eventfd == eventfd)
+                        continue;
+
+                thresholds_new->entries[j] = thresholds->entries[i];
+                if (thresholds_new->entries[j].threshold < usage) {
+                        /*
+                         * thresholds_new->current_threshold will not be used
+                         * until rcu_assign_pointer(), so it's safe to increment
+                         * it here.
+                         */
+                        atomic_inc(&thresholds_new->current_threshold);
+                }
+                j++;
+        }
+
+assign:
+        if (type == _MEM)
+                rcu_assign_pointer(memcg->thresholds, thresholds_new);
+        else
+                rcu_assign_pointer(memcg->memsw_thresholds, thresholds_new);
+
+        /* To be sure that nobody uses thresholds before freeing it */
+        synchronize_rcu();
+
+        kfree(thresholds);
+unlock:
+        mutex_unlock(&memcg->thresholds_lock);
+
+        return ret;
+}
 
 static struct cftype mem_cgroup_files[] = {
         {
                 .name = "usage_in_bytes",
                 .private = MEMFILE_PRIVATE(_MEM, RES_USAGE),
                 .read_u64 = mem_cgroup_read,
+                .register_event = mem_cgroup_register_event,
+                .unregister_event = mem_cgroup_unregister_event,
         },
         {
                 .name = "max_usage_in_bytes",
@@ -3098,6 +3591,11 @@ static struct cftype mem_cgroup_files[] = {
                 .read_u64 = mem_cgroup_swappiness_read,
                 .write_u64 = mem_cgroup_swappiness_write,
         },
+        {
+                .name = "move_charge_at_immigrate",
+                .read_u64 = mem_cgroup_move_charge_read,
+                .write_u64 = mem_cgroup_move_charge_write,
+        },
 };
 
 #ifdef CONFIG_CGROUP_MEM_RES_CTLR_SWAP
@@ -3106,6 +3604,8 @@ static struct cftype memsw_cgroup_files[] = {
                 .name = "memsw.usage_in_bytes",
                 .private = MEMFILE_PRIVATE(_MEMSWAP, RES_USAGE),
                 .read_u64 = mem_cgroup_read,
+                .register_event = mem_cgroup_register_event,
+                .unregister_event = mem_cgroup_unregister_event,
         },
         {
                 .name = "memsw.max_usage_in_bytes",
@@ -3180,17 +3680,12 @@ static void free_mem_cgroup_per_zone_info(struct mem_cgroup *mem, int node)
         kfree(mem->info.nodeinfo[node]);
 }
 
-static int mem_cgroup_size(void)
-{
-        int cpustat_size = nr_cpu_ids * sizeof(struct mem_cgroup_stat_cpu);
-        return sizeof(struct mem_cgroup) + cpustat_size;
-}
-
 static struct mem_cgroup *mem_cgroup_alloc(void)
 {
         struct mem_cgroup *mem;
-        int size = mem_cgroup_size();
+        int size = sizeof(struct mem_cgroup);
 
+        /* Can be very big if MAX_NUMNODES is very big */
         if (size < PAGE_SIZE)
                 mem = kmalloc(size, GFP_KERNEL);
         else
@@ -3198,6 +3693,14 @@ static struct mem_cgroup *mem_cgroup_alloc(void)
 
         if (mem)
                 memset(mem, 0, size);
+        mem->stat = alloc_percpu(struct mem_cgroup_stat_cpu);
+        if (!mem->stat) {
+                if (size < PAGE_SIZE)
+                        kfree(mem);
+                else
+                        vfree(mem);
+                mem = NULL;
+        }
         return mem;
 }
 
@@ -3222,7 +3725,8 @@ static void __mem_cgroup_free(struct mem_cgroup *mem)
         for_each_node_state(node, N_POSSIBLE)
                 free_mem_cgroup_per_zone_info(mem, node);
 
-        if (mem_cgroup_size() < PAGE_SIZE)
+        free_percpu(mem->stat);
+        if (sizeof(struct mem_cgroup) < PAGE_SIZE)
                 kfree(mem);
         else
                 vfree(mem);
@@ -3233,9 +3737,9 @@ static void mem_cgroup_get(struct mem_cgroup *mem)
         atomic_inc(&mem->refcnt);
 }
 
-static void mem_cgroup_put(struct mem_cgroup *mem)
+static void __mem_cgroup_put(struct mem_cgroup *mem, int count)
 {
-        if (atomic_dec_and_test(&mem->refcnt)) {
+        if (atomic_sub_and_test(count, &mem->refcnt)) {
                 struct mem_cgroup *parent = parent_mem_cgroup(mem);
                 __mem_cgroup_free(mem);
                 if (parent)
@@ -3243,6 +3747,11 @@ static void mem_cgroup_put(struct mem_cgroup *mem)
         }
 }
 
+static void mem_cgroup_put(struct mem_cgroup *mem)
+{
+        __mem_cgroup_put(mem, 1);
+}
+
 /*
  * Returns the parent mem_cgroup in memcgroup hierarchy with hierarchy enabled.
  */
@@ -3319,7 +3828,6 @@ mem_cgroup_create(struct cgroup_subsys *ss, struct cgroup *cont)
                         INIT_WORK(&stock->work, drain_local_stock);
                 }
                 hotcpu_notifier(memcg_stock_cpu_callback, 0);
-
         } else {
                 parent = mem_cgroup_from_cont(cont->parent);
                 mem->use_hierarchy = parent->use_hierarchy;
@@ -3345,6 +3853,8 @@ mem_cgroup_create(struct cgroup_subsys *ss, struct cgroup *cont)
         if (parent)
                 mem->swappiness = get_swappiness(parent);
         atomic_set(&mem->refcnt, 1);
+        mem->move_charge_at_immigrate = 0;
+        mutex_init(&mem->thresholds_lock);
         return &mem->css;
 free_out:
         __mem_cgroup_free(mem);
@@ -3381,16 +3891,444 @@ static int mem_cgroup_populate(struct cgroup_subsys *ss,
         return ret;
 }
 
+#ifdef CONFIG_MMU
+/* Handlers for move charge at task migration. */
+#define PRECHARGE_COUNT_AT_ONCE 256
+static int mem_cgroup_do_precharge(unsigned long count)
+{
+        int ret = 0;
+        int batch_count = PRECHARGE_COUNT_AT_ONCE;
+        struct mem_cgroup *mem = mc.to;
+
+        if (mem_cgroup_is_root(mem)) {
+                mc.precharge += count;
+                /* we don't need css_get for root */
+                return ret;
+        }
+        /* try to charge at once */
+        if (count > 1) {
+                struct res_counter *dummy;
+                /*
+                 * "mem" cannot be under rmdir() because we've already checked
+                 * by cgroup_lock_live_cgroup() that it is not removed and we
+                 * are still under the same cgroup_mutex. So we can postpone
+                 * css_get().
+                 */
+                if (res_counter_charge(&mem->res, PAGE_SIZE * count, &dummy))
+                        goto one_by_one;
+                if (do_swap_account && res_counter_charge(&mem->memsw,
+                                                PAGE_SIZE * count, &dummy)) {
+                        res_counter_uncharge(&mem->res, PAGE_SIZE * count);
+                        goto one_by_one;
+                }
+                mc.precharge += count;
+                VM_BUG_ON(test_bit(CSS_ROOT, &mem->css.flags));
+                WARN_ON_ONCE(count > INT_MAX);
+                __css_get(&mem->css, (int)count);
+                return ret;
+        }
+one_by_one:
+        /* fall back to one by one charge */
+        while (count--) {
+                if (signal_pending(current)) {
+                        ret = -EINTR;
+                        break;
+                }
+                if (!batch_count--) {
+                        batch_count = PRECHARGE_COUNT_AT_ONCE;
+                        cond_resched();
+                }
+                ret = __mem_cgroup_try_charge(NULL, GFP_KERNEL, &mem, false);
+                if (ret || !mem)
+                        /* mem_cgroup_clear_mc() will do uncharge later */
+                        return -ENOMEM;
+                mc.precharge++;
+        }
+        return ret;
+}
+#else   /* !CONFIG_MMU */
+static int mem_cgroup_can_attach(struct cgroup_subsys *ss,
+                                struct cgroup *cgroup,
+                                struct task_struct *p,
+                                bool threadgroup)
+{
+        return 0;
+}
+static void mem_cgroup_cancel_attach(struct cgroup_subsys *ss,
+                                struct cgroup *cgroup,
+                                struct task_struct *p,
+                                bool threadgroup)
+{
+}
 static void mem_cgroup_move_task(struct cgroup_subsys *ss,
                                 struct cgroup *cont,
                                 struct cgroup *old_cont,
                                 struct task_struct *p,
                                 bool threadgroup)
 {
+}
+#endif
+
+/**
+ * is_target_pte_for_mc - check a pte whether it is valid for move charge
+ * @vma: the vma the pte to be checked belongs
+ * @addr: the address corresponding to the pte to be checked
+ * @ptent: the pte to be checked
+ * @target: the pointer the target page or swap ent will be stored(can be NULL)
+ *
+ * Returns
+ *   0(MC_TARGET_NONE): if the pte is not a target for move charge.
+ *   1(MC_TARGET_PAGE): if the page corresponding to this pte is a target for
+ *     move charge. if @target is not NULL, the page is stored in target->page
+ *     with extra refcnt got(Callers should handle it).
+ *   2(MC_TARGET_SWAP): if the swap entry corresponding to this pte is a
+ *     target for charge migration. if @target is not NULL, the entry is stored
+ *     in target->ent.
+ *
+ * Called with pte lock held.
+ */
+union mc_target {
+        struct page     *page;
+        swp_entry_t     ent;
+};
+
+enum mc_target_type {
+        MC_TARGET_NONE, /* not used */
+        MC_TARGET_PAGE,
+        MC_TARGET_SWAP,
+};
+
+static int is_target_pte_for_mc(struct vm_area_struct *vma,
+                unsigned long addr, pte_t ptent, union mc_target *target)
+{
+        struct page *page = NULL;
+        struct page_cgroup *pc;
+        int ret = 0;
+        swp_entry_t ent = { .val = 0 };
+        int usage_count = 0;
+        bool move_anon = test_bit(MOVE_CHARGE_TYPE_ANON,
+                                        &mc.to->move_charge_at_immigrate);
+
+        if (!pte_present(ptent)) {
+                /* TODO: handle swap of shmes/tmpfs */
+                if (pte_none(ptent) || pte_file(ptent))
+                        return 0;
+                else if (is_swap_pte(ptent)) {
+                        ent = pte_to_swp_entry(ptent);
+                        if (!move_anon || non_swap_entry(ent))
+                                return 0;
+                        usage_count = mem_cgroup_count_swap_user(ent, &page);
+                }
+        } else {
+                page = vm_normal_page(vma, addr, ptent);
+                if (!page || !page_mapped(page))
+                        return 0;
+                /*
+                 * TODO: We don't move charges of file(including shmem/tmpfs)
+                 * pages for now.
+                 */
+                if (!move_anon || !PageAnon(page))
+                        return 0;
+                if (!get_page_unless_zero(page))
+                        return 0;
+                usage_count = page_mapcount(page);
+        }
+        if (usage_count > 1) {
+                /*
+                 * TODO: We don't move charges of shared(used by multiple
+                 * processes) pages for now.
+                 */
+                if (page)
+                        put_page(page);
+                return 0;
+        }
+        if (page) {
+                pc = lookup_page_cgroup(page);
+                /*
+                 * Do only loose check w/o page_cgroup lock.
+                 * mem_cgroup_move_account() checks the pc is valid or not under
+                 * the lock.
+                 */
+                if (PageCgroupUsed(pc) && pc->mem_cgroup == mc.from) {
+                        ret = MC_TARGET_PAGE;
+                        if (target)
+                                target->page = page;
+                }
+                if (!ret || !target)
+                        put_page(page);
+        }
+        /* throught */
+        if (ent.val && do_swap_account && !ret &&
+                        css_id(&mc.from->css) == lookup_swap_cgroup(ent)) {
+                ret = MC_TARGET_SWAP;
+                if (target)
+                        target->ent = ent;
+        }
+        return ret;
+}
+
+static int mem_cgroup_count_precharge_pte_range(pmd_t *pmd,
+                                        unsigned long addr, unsigned long end,
+                                        struct mm_walk *walk)
+{
+        struct vm_area_struct *vma = walk->private;
+        pte_t *pte;
+        spinlock_t *ptl;
+
+        pte = pte_offset_map_lock(vma->vm_mm, pmd, addr, &ptl);
+        for (; addr != end; pte++, addr += PAGE_SIZE)
+                if (is_target_pte_for_mc(vma, addr, *pte, NULL))
+                        mc.precharge++; /* increment precharge temporarily */
+        pte_unmap_unlock(pte - 1, ptl);
+        cond_resched();
+
+        return 0;
+}
+
+static unsigned long mem_cgroup_count_precharge(struct mm_struct *mm)
+{
+        unsigned long precharge;
+        struct vm_area_struct *vma;
+
+        down_read(&mm->mmap_sem);
+        for (vma = mm->mmap; vma; vma = vma->vm_next) {
+                struct mm_walk mem_cgroup_count_precharge_walk = {
+                        .pmd_entry = mem_cgroup_count_precharge_pte_range,
+                        .mm = mm,
+                        .private = vma,
+                };
+                if (is_vm_hugetlb_page(vma))
+                        continue;
+                /* TODO: We don't move charges of shmem/tmpfs pages for now. */
+                if (vma->vm_flags & VM_SHARED)
+                        continue;
+                walk_page_range(vma->vm_start, vma->vm_end,
+                                        &mem_cgroup_count_precharge_walk);
+        }
+        up_read(&mm->mmap_sem);
+
+        precharge = mc.precharge;
+        mc.precharge = 0;
+
+        return precharge;
+}
+
+static int mem_cgroup_precharge_mc(struct mm_struct *mm)
+{
+        return mem_cgroup_do_precharge(mem_cgroup_count_precharge(mm));
+}
+
+static void mem_cgroup_clear_mc(void)
+{
+        /* we must uncharge all the leftover precharges from mc.to */
+        if (mc.precharge) {
+                __mem_cgroup_cancel_charge(mc.to, mc.precharge);
+                mc.precharge = 0;
+        }
         /*
-         * FIXME: It's better to move charges of this process from old
-         * memcg to new memcg. But it's just on TODO-List now.
+         * we didn't uncharge from mc.from at mem_cgroup_move_account(), so
+         * we must uncharge here.
          */
+        if (mc.moved_charge) {
+                __mem_cgroup_cancel_charge(mc.from, mc.moved_charge);
+                mc.moved_charge = 0;
+        }
+        /* we must fixup refcnts and charges */
+        if (mc.moved_swap) {
+                WARN_ON_ONCE(mc.moved_swap > INT_MAX);
+                /* uncharge swap account from the old cgroup */
+                if (!mem_cgroup_is_root(mc.from))
+                        res_counter_uncharge(&mc.from->memsw,
+                                                PAGE_SIZE * mc.moved_swap);
+                __mem_cgroup_put(mc.from, mc.moved_swap);
+
+                if (!mem_cgroup_is_root(mc.to)) {
+                        /*
+                         * we charged both to->res and to->memsw, so we should
+                         * uncharge to->res.
+                         */
+                        res_counter_uncharge(&mc.to->res,
+                                                PAGE_SIZE * mc.moved_swap);
+                        VM_BUG_ON(test_bit(CSS_ROOT, &mc.to->css.flags));
+                        __css_put(&mc.to->css, mc.moved_swap);
+                }
+                /* we've already done mem_cgroup_get(mc.to) */
+
+                mc.moved_swap = 0;
+        }
+        mc.from = NULL;
+        mc.to = NULL;
+        mc.moving_task = NULL;
+        wake_up_all(&mc.waitq);
+}
+
+static int mem_cgroup_can_attach(struct cgroup_subsys *ss,
+                                struct cgroup *cgroup,
+                                struct task_struct *p,
+                                bool threadgroup)
+{
+        int ret = 0;
+        struct mem_cgroup *mem = mem_cgroup_from_cont(cgroup);
+
+        if (mem->move_charge_at_immigrate) {
+                struct mm_struct *mm;
+                struct mem_cgroup *from = mem_cgroup_from_task(p);
+
+                VM_BUG_ON(from == mem);
+
+                mm = get_task_mm(p);
+                if (!mm)
+                        return 0;
+                /* We move charges only when we move a owner of the mm */
+                if (mm->owner == p) {
+                        VM_BUG_ON(mc.from);
+                        VM_BUG_ON(mc.to);
+                        VM_BUG_ON(mc.precharge);
+                        VM_BUG_ON(mc.moved_charge);
+                        VM_BUG_ON(mc.moved_swap);
+                        VM_BUG_ON(mc.moving_task);
+                        mc.from = from;
+                        mc.to = mem;
+                        mc.precharge = 0;
+                        mc.moved_charge = 0;
+                        mc.moved_swap = 0;
+                        mc.moving_task = current;
+
+                        ret = mem_cgroup_precharge_mc(mm);
+                        if (ret)
+                                mem_cgroup_clear_mc();
+                }
+                mmput(mm);
+        }
+        return ret;
+}
+
+static void mem_cgroup_cancel_attach(struct cgroup_subsys *ss,
+                                struct cgroup *cgroup,
+                                struct task_struct *p,
+                                bool threadgroup)
+{
+        mem_cgroup_clear_mc();
+}
+
+static int mem_cgroup_move_charge_pte_range(pmd_t *pmd,
+                                unsigned long addr, unsigned long end,
+                                struct mm_walk *walk)
+{
+        int ret = 0;
+        struct vm_area_struct *vma = walk->private;
+        pte_t *pte;
+        spinlock_t *ptl;
+
+retry:
+        pte = pte_offset_map_lock(vma->vm_mm, pmd, addr, &ptl);
+        for (; addr != end; addr += PAGE_SIZE) {
+                pte_t ptent = *(pte++);
+                union mc_target target;
+                int type;
+                struct page *page;
+                struct page_cgroup *pc;
+                swp_entry_t ent;
+
+                if (!mc.precharge)
+                        break;
+
+                type = is_target_pte_for_mc(vma, addr, ptent, &target);
+                switch (type) {
+                case MC_TARGET_PAGE:
+                        page = target.page;
+                        if (isolate_lru_page(page))
+                                goto put;
+                        pc = lookup_page_cgroup(page);
+                        if (!mem_cgroup_move_account(pc,
+                                                mc.from, mc.to, false)) {
+                                mc.precharge--;
+                                /* we uncharge from mc.from later. */
+                                mc.moved_charge++;
+                        }
+                        putback_lru_page(page);
+put:                    /* is_target_pte_for_mc() gets the page */
+                        put_page(page);
+                        break;
+                case MC_TARGET_SWAP:
+                        ent = target.ent;
+                        if (!mem_cgroup_move_swap_account(ent,
+                                                mc.from, mc.to, false)) {
+                                mc.precharge--;
+                                /* we fixup refcnts and charges later. */
+                                mc.moved_swap++;
+                        }
+                        break;
+                default:
+                        break;
+                }
+        }
+        pte_unmap_unlock(pte - 1, ptl);
+        cond_resched();
+
+        if (addr != end) {
+                /*
+                 * We have consumed all precharges we got in can_attach().
+                 * We try charge one by one, but don't do any additional
+                 * charges to mc.to if we have failed in charge once in attach()
+                 * phase.
+                 */
+                ret = mem_cgroup_do_precharge(1);
+                if (!ret)
+                        goto retry;
+        }
+
+        return ret;
+}
+
+static void mem_cgroup_move_charge(struct mm_struct *mm)
+{
+        struct vm_area_struct *vma;
+
+        lru_add_drain_all();
+        down_read(&mm->mmap_sem);
+        for (vma = mm->mmap; vma; vma = vma->vm_next) {
+                int ret;
+                struct mm_walk mem_cgroup_move_charge_walk = {
+                        .pmd_entry = mem_cgroup_move_charge_pte_range,
+                        .mm = mm,
+                        .private = vma,
+                };
+                if (is_vm_hugetlb_page(vma))
+                        continue;
+                /* TODO: We don't move charges of shmem/tmpfs pages for now. */
+                if (vma->vm_flags & VM_SHARED)
+                        continue;
+                ret = walk_page_range(vma->vm_start, vma->vm_end,
+                                                &mem_cgroup_move_charge_walk);
+                if (ret)
+                        /*
+                         * means we have consumed all precharges and failed in
+                         * doing additional charge. Just abandon here.
+                         */
+                        break;
+        }
+        up_read(&mm->mmap_sem);
+}
+
+static void mem_cgroup_move_task(struct cgroup_subsys *ss,
+                                struct cgroup *cont,
+                                struct cgroup *old_cont,
+                                struct task_struct *p,
+                                bool threadgroup)
+{
+        struct mm_struct *mm;
+
+        if (!mc.to)
+                /* no need to move charge */
+                return;
+
+        mm = get_task_mm(p);
+        if (mm) {
+                mem_cgroup_move_charge(mm);
+                mmput(mm);
+        }
+        mem_cgroup_clear_mc();
 }
 
 struct cgroup_subsys mem_cgroup_subsys = {
@@ -3400,6 +4338,8 @@ struct cgroup_subsys mem_cgroup_subsys = {
         .pre_destroy = mem_cgroup_pre_destroy,
         .destroy = mem_cgroup_destroy,
         .populate = mem_cgroup_populate,
+        .can_attach = mem_cgroup_can_attach,
+        .cancel_attach = mem_cgroup_cancel_attach,
         .attach = mem_cgroup_move_task,
         .early_init = 0,
         .use_id = 1,
diff --git a/mm/memory.c b/mm/memory.c
index d1153e37e9ba..5b7f2002e54b 100644
--- a/mm/memory.c
+++ b/mm/memory.c
@@ -190,9 +190,6 @@ static void check_sync_rss_stat(struct task_struct *task)
 {
 }
 
-void sync_mm_rss(struct task_struct *task, struct mm_struct *mm)
-{
-}
 #endif
 
 /*
@@ -512,12 +509,8 @@ static void print_bad_pte(struct vm_area_struct *vma, unsigned long addr,
                 "BUG: Bad page map in process %s  pte:%08llx pmd:%08llx\n",
                 current->comm,
                 (long long)pte_val(pte), (long long)pmd_val(*pmd));
-        if (page) {
-                printk(KERN_ALERT
-                "page:%p flags:%p count:%d mapcount:%d mapping:%p index:%lx\n",
-                page, (void *)page->flags, page_count(page),
-                page_mapcount(page), page->mapping, page->index);
-        }
+        if (page)
+                dump_page(page);
         printk(KERN_ALERT
                 "addr:%p vm_flags:%08lx anon_vma:%p mapping:%p index:%lx\n",
                 (void *)addr, vma->vm_flags, vma->anon_vma, mapping, index);
diff --git a/mm/memory_hotplug.c b/mm/memory_hotplug.c
index 78e34e63c7b8..be211a582930 100644
--- a/mm/memory_hotplug.c
+++ b/mm/memory_hotplug.c
@@ -688,9 +688,9 @@ do_migrate_range(unsigned long start_pfn, unsigned long end_pfn)
                         if (page_count(page))
                                 not_managed++;
 #ifdef CONFIG_DEBUG_VM
-                        printk(KERN_INFO "removing from LRU failed"
-                                         " %lx/%d/%lx\n",
-                                pfn, page_count(page), page->flags);
+                        printk(KERN_ALERT "removing pfn %lx from LRU failed\n",
+                               pfn);
+                        dump_page(page);
 #endif
                 }
         }
diff --git a/mm/mmap.c b/mm/mmap.c
index f1b4448626bf..75557c639ad4 100644
--- a/mm/mmap.c
+++ b/mm/mmap.c
@@ -1088,6 +1088,30 @@ out:
         return retval;
 }
 
+#ifdef __ARCH_WANT_SYS_OLD_MMAP
+struct mmap_arg_struct {
+        unsigned long addr;
+        unsigned long len;
+        unsigned long prot;
+        unsigned long flags;
+        unsigned long fd;
+        unsigned long offset;
+};
+
+SYSCALL_DEFINE1(old_mmap, struct mmap_arg_struct __user *, arg)
+{
+        struct mmap_arg_struct a;
+
+        if (copy_from_user(&a, arg, sizeof(a)))
+                return -EFAULT;
+        if (a.offset & ~PAGE_MASK)
+                return -EINVAL;
+
+        return sys_mmap_pgoff(a.addr, a.len, a.prot, a.flags, a.fd,
+                              a.offset >> PAGE_SHIFT);
+}
+#endif /* __ARCH_WANT_SYS_OLD_MMAP */
+
 /*
  * Some shared mappigns will want the pages marked read-only
  * to track write events. If so, we'll downgrade vm_page_prot
diff --git a/mm/nommu.c b/mm/nommu.c
index b9b5cceb1b68..605ace8982a8 100644
--- a/mm/nommu.c
+++ b/mm/nommu.c
@@ -1428,6 +1428,30 @@ out:
         return retval;
 }
 
+#ifdef __ARCH_WANT_SYS_OLD_MMAP
+struct mmap_arg_struct {
+        unsigned long addr;
+        unsigned long len;
+        unsigned long prot;
+        unsigned long flags;
+        unsigned long fd;
+        unsigned long offset;
+};
+
+SYSCALL_DEFINE1(old_mmap, struct mmap_arg_struct __user *, arg)
+{
+        struct mmap_arg_struct a;
+
+        if (copy_from_user(&a, arg, sizeof(a)))
+                return -EFAULT;
+        if (a.offset & ~PAGE_MASK)
+                return -EINVAL;
+
+        return sys_mmap_pgoff(a.addr, a.len, a.prot, a.flags, a.fd,
+                              a.offset >> PAGE_SHIFT);
+}
+#endif /* __ARCH_WANT_SYS_OLD_MMAP */
+
 /*
  * split a vma into two pieces at address 'addr', a new vma is allocated either
  * for the first part or the tail.
diff --git a/mm/oom_kill.c b/mm/oom_kill.c
index 35755a4156d6..9b223af6a147 100644
--- a/mm/oom_kill.c
+++ b/mm/oom_kill.c
@@ -473,6 +473,8 @@ void mem_cgroup_out_of_memory(struct mem_cgroup *mem, gfp_t gfp_mask)
         unsigned long points = 0;
         struct task_struct *p;
 
+        if (sysctl_panic_on_oom == 2)
+                panic("out of memory(memcg). panic_on_oom is selected.\n");
         read_lock(&tasklist_lock);
 retry:
         p = select_bad_process(&points, mem);
@@ -601,13 +603,6 @@ void pagefault_out_of_memory(void)
                 /* Got some memory back in the last second. */
                 return;
 
-        /*
-         * If this is from memcg, oom-killer is already invoked.
-         * and not worth to go system-wide-oom.
-         */
-        if (mem_cgroup_oom_called(current))
-                goto rest_and_return;
-
         if (sysctl_panic_on_oom)
                 panic("out of memory from page fault. panic_on_oom is selected.\n");
 
@@ -619,7 +614,6 @@ void pagefault_out_of_memory(void)
          * Give "p" a good chance of killing itself before we
          * retry to allocate memory.
          */
-rest_and_return:
         if (!test_thread_flag(TIF_MEMDIE))
                 schedule_timeout_uninterruptible(1);
 }
diff --git a/mm/page_alloc.c b/mm/page_alloc.c
index a8182c89de59..d03c946d5566 100644
--- a/mm/page_alloc.c
+++ b/mm/page_alloc.c
@@ -50,6 +50,7 @@
 #include <linux/kmemleak.h>
 #include <linux/memory.h>
 #include <trace/events/kmem.h>
+#include <linux/ftrace_event.h>
 
 #include <asm/tlbflush.h>
 #include <asm/div64.h>
@@ -288,10 +289,7 @@ static void bad_page(struct page *page)
 
         printk(KERN_ALERT "BUG: Bad page state in process %s  pfn:%05lx\n",
                 current->comm, page_to_pfn(page));
-        printk(KERN_ALERT
-                "page:%p flags:%p count:%d mapcount:%d mapping:%p index:%lx\n",
-                page, (void *)page->flags, page_count(page),
-                page_mapcount(page), page->mapping, page->index);
+        dump_page(page);
 
         dump_stack();
 out:
@@ -3224,7 +3222,7 @@ static int __zone_pcp_update(void *data)
         int cpu;
         unsigned long batch = zone_batchsize(zone), flags;
 
-        for (cpu = 0; cpu < NR_CPUS; cpu++) {
+        for_each_possible_cpu(cpu) {
                 struct per_cpu_pageset *pset;
                 struct per_cpu_pages *pcp;
 
@@ -5183,3 +5181,80 @@ bool is_free_buddy_page(struct page *page)
         return order < MAX_ORDER;
 }
 #endif
+
+static struct trace_print_flags pageflag_names[] = {
+        {1UL << PG_locked,              "locked"        },
+        {1UL << PG_error,               "error"         },
+        {1UL << PG_referenced,          "referenced"    },
+        {1UL << PG_uptodate,            "uptodate"      },
+        {1UL << PG_dirty,               "dirty"         },
+        {1UL << PG_lru,                 "lru"           },
+        {1UL << PG_active,              "active"        },
+        {1UL << PG_slab,                "slab"          },
+        {1UL << PG_owner_priv_1,        "owner_priv_1"  },
+        {1UL << PG_arch_1,              "arch_1"        },
+        {1UL << PG_reserved,            "reserved"      },
+        {1UL << PG_private,             "private"       },
+        {1UL << PG_private_2,           "private_2"     },
+        {1UL << PG_writeback,           "writeback"     },
+#ifdef CONFIG_PAGEFLAGS_EXTENDED
+        {1UL << PG_head,                "head"          },
+        {1UL << PG_tail,                "tail"          },
+#else
+        {1UL << PG_compound,            "compound"      },
+#endif
+        {1UL << PG_swapcache,           "swapcache"     },
+        {1UL << PG_mappedtodisk,        "mappedtodisk"  },
+        {1UL << PG_reclaim,             "reclaim"       },
+        {1UL << PG_buddy,               "buddy"         },
+        {1UL << PG_swapbacked,          "swapbacked"    },
+        {1UL << PG_unevictable,         "unevictable"   },
+#ifdef CONFIG_MMU
+        {1UL << PG_mlocked,             "mlocked"       },
+#endif
+#ifdef CONFIG_ARCH_USES_PG_UNCACHED
+        {1UL << PG_uncached,            "uncached"      },
+#endif
+#ifdef CONFIG_MEMORY_FAILURE
+        {1UL << PG_hwpoison,            "hwpoison"      },
+#endif
+        {-1UL,                          NULL            },
+};
+
+static void dump_page_flags(unsigned long flags)
+{
+        const char *delim = "";
+        unsigned long mask;
+        int i;
+
+        printk(KERN_ALERT "page flags: %#lx(", flags);
+
+        /* remove zone id */
+        flags &= (1UL << NR_PAGEFLAGS) - 1;
+
+        for (i = 0; pageflag_names[i].name && flags; i++) {
+
+                mask = pageflag_names[i].mask;
+                if ((flags & mask) != mask)
+                        continue;
+
+                flags &= ~mask;
+                printk("%s%s", delim, pageflag_names[i].name);
+                delim = "|";
+        }
+
+        /* check for left over flags */
+        if (flags)
+                printk("%s%#lx", delim, flags);
+
+        printk(")\n");
+}
+
+void dump_page(struct page *page)
+{
+        printk(KERN_ALERT
+               "page:%p count:%d mapcount:%d mapping:%p index:%#lx\n",
+                page, page_count(page), page_mapcount(page),
+                page->mapping, page->index);
+        dump_page_flags(page->flags);
+}
diff --git a/mm/page_cgroup.c b/mm/page_cgroup.c
index 3d535d594826..3dd88539a0e6 100644
--- a/mm/page_cgroup.c
+++ b/mm/page_cgroup.c
@@ -335,6 +335,37 @@ not_enough_page:
 }
 
 /**
+ * swap_cgroup_cmpxchg - cmpxchg mem_cgroup's id for this swp_entry.
+ * @end: swap entry to be cmpxchged
+ * @old: old id
+ * @new: new id
+ *
+ * Returns old id at success, 0 at failure.
+ * (There is no mem_cgroup useing 0 as its id)
+ */
+unsigned short swap_cgroup_cmpxchg(swp_entry_t ent,
+                                        unsigned short old, unsigned short new)
+{
+        int type = swp_type(ent);
+        unsigned long offset = swp_offset(ent);
+        unsigned long idx = offset / SC_PER_PAGE;
+        unsigned long pos = offset & SC_POS_MASK;
+        struct swap_cgroup_ctrl *ctrl;
+        struct page *mappage;
+        struct swap_cgroup *sc;
+
+        ctrl = &swap_cgroup_ctrl[type];
+
+        mappage = ctrl->map[idx];
+        sc = page_address(mappage);
+        sc += pos;
+        if (cmpxchg(&sc->id, old, new) == old)
+                return old;
+        else
+                return 0;
+}
+
+/**
  * swap_cgroup_record - record mem_cgroup for this swp_entry.
  * @ent: swap entry to be recorded into
  * @mem: mem_cgroup to be recorded
@@ -358,8 +389,7 @@ unsigned short swap_cgroup_record(swp_entry_t ent, unsigned short id)
         mappage = ctrl->map[idx];
         sc = page_address(mappage);
         sc += pos;
-        old = sc->id;
-        sc->id = id;
+        old = xchg(&sc->id, id);
 
         return old;
 }
diff --git a/mm/slub.c b/mm/slub.c
index a2b8969ba6d0..b364844a1068 100644
--- a/mm/slub.c
+++ b/mm/slub.c
@@ -2960,7 +2960,7 @@ static void slab_mem_offline_callback(void *arg)
                         /*
                          * if n->nr_slabs > 0, slabs still exist on the node
                          * that is going down. We were unable to free them,
-                         * and offline_pages() function shoudn't call this
+                         * and offline_pages() function shouldn't call this
                          * callback. So, we must fail.
                          */
                         BUG_ON(slabs_node(s, offline_node));
diff --git a/mm/swapfile.c b/mm/swapfile.c
index 84374d8cf814..6cd0a8f90dc7 100644
--- a/mm/swapfile.c
+++ b/mm/swapfile.c
@@ -723,6 +723,37 @@ int free_swap_and_cache(swp_entry_t entry)
         return p != NULL;
 }
 
+#ifdef CONFIG_CGROUP_MEM_RES_CTLR
+/**
+ * mem_cgroup_count_swap_user - count the user of a swap entry
+ * @ent: the swap entry to be checked
+ * @pagep: the pointer for the swap cache page of the entry to be stored
+ *
+ * Returns the number of the user of the swap entry. The number is valid only
+ * for swaps of anonymous pages.
+ * If the entry is found on swap cache, the page is stored to pagep with
+ * refcount of it being incremented.
+ */
+int mem_cgroup_count_swap_user(swp_entry_t ent, struct page **pagep)
+{
+        struct page *page;
+        struct swap_info_struct *p;
+        int count = 0;
+
+        page = find_get_page(&swapper_space, ent.val);
+        if (page)
+                count += page_mapcount(page);
+        p = swap_info_get(ent);
+        if (p) {
+                count += swap_count(p->swap_map[swp_offset(ent)]);
+                spin_unlock(&swap_lock);
+        }
+
+        *pagep = page;
+        return count;
+}
+#endif
+
 #ifdef CONFIG_HIBERNATION
 /*
  * Find the swap type that corresponds to given device (if any).
diff --git a/net/ipv4/tcp_timer.c b/net/ipv4/tcp_timer.c
index a17629b8912e..b2e6bbccaee1 100644
--- a/net/ipv4/tcp_timer.c
+++ b/net/ipv4/tcp_timer.c
@@ -134,7 +134,7 @@ static void tcp_mtu_probing(struct inet_connection_sock *icsk, struct sock *sk)
 }
 
 /* This function calculates a "timeout" which is equivalent to the timeout of a
- * TCP connection after "boundary" unsucessful, exponentially backed-off
+ * TCP connection after "boundary" unsuccessful, exponentially backed-off
  * retransmissions with an initial RTO of TCP_RTO_MIN.
  */
 static bool retransmits_timed_out(struct sock *sk,
diff --git a/net/mac80211/mesh_plink.c b/net/mac80211/mesh_plink.c
index bc4e20e57ff5..1a29c4a8139e 100644
--- a/net/mac80211/mesh_plink.c
+++ b/net/mac80211/mesh_plink.c
@@ -744,7 +744,7 @@ void mesh_rx_plink_frame(struct ieee80211_sub_if_data *sdata, struct ieee80211_m
                 break;
         default:
                 /* should not get here, PLINK_BLOCKED is dealt with at the
-                 * beggining of the function
+                 * beginning of the function
                  */
                 spin_unlock_bh(&sta->lock);
                 break;
diff --git a/net/netfilter/nf_conntrack_sip.c b/net/netfilter/nf_conntrack_sip.c
index 8dd75d90efc0..c6cd1b84eddd 100644
--- a/net/netfilter/nf_conntrack_sip.c
+++ b/net/netfilter/nf_conntrack_sip.c
@@ -284,7 +284,7 @@ EXPORT_SYMBOL_GPL(ct_sip_parse_request);
  * tabs, spaces and continuation lines, which are treated as a single whitespace
  * character.
  *
- * Some headers may appear multiple times. A comma seperated list of values is
+ * Some headers may appear multiple times. A comma separated list of values is
  * equivalent to multiple headers.
  */
 static const struct sip_header ct_sip_hdrs[] = {
@@ -421,7 +421,7 @@ int ct_sip_get_header(const struct nf_conn *ct, const char *dptr,
 }
 EXPORT_SYMBOL_GPL(ct_sip_get_header);
 
-/* Get next header field in a list of comma seperated values */
+/* Get next header field in a list of comma separated values */
 static int ct_sip_next_header(const struct nf_conn *ct, const char *dptr,
                               unsigned int dataoff, unsigned int datalen,
                               enum sip_header_types type,
diff --git a/net/netfilter/xt_hashlimit.c b/net/netfilter/xt_hashlimit.c
index d952806b6469..9e9c48963942 100644
--- a/net/netfilter/xt_hashlimit.c
+++ b/net/netfilter/xt_hashlimit.c
@@ -1,6 +1,6 @@
 /*
  *      xt_hashlimit - Netfilter module to limit the number of packets per time
- *      seperately for each hashbucket (sourceip/sourceport/dstip/dstport)
+ *      separately for each hashbucket (sourceip/sourceport/dstip/dstport)
  *
  *      (C) 2003-2004 by Harald Welte <laforge@netfilter.org>
  *      Copyright © CC Computer Consultants GmbH, 2007 - 2008
diff --git a/net/sctp/sm_sideeffect.c b/net/sctp/sm_sideeffect.c
index 4e4ca65cd320..500886bda9b4 100644
--- a/net/sctp/sm_sideeffect.c
+++ b/net/sctp/sm_sideeffect.c
@@ -475,7 +475,7 @@ static void sctp_do_8_2_transport_strike(struct sctp_association *asoc,
          * used to provide an upper bound to this doubling operation.
          *
          * Special Case:  the first HB doesn't trigger exponential backoff.
-         * The first unacknowleged HB triggers it.  We do this with a flag
+         * The first unacknowledged HB triggers it.  We do this with a flag
          * that indicates that we have an outstanding HB.
          */
         if (!is_hb || transport->hb_sent) {
diff --git a/scripts/gfp-translate b/scripts/gfp-translate
index 073cb6d152a0..d81b968d864e 100644
--- a/scripts/gfp-translate
+++ b/scripts/gfp-translate
@@ -19,7 +19,7 @@ usage() {
         exit 0
 }
 
-# Parse command-line arguements
+# Parse command-line arguments
 while [ $# -gt 0 ]; do
         case $1 in
                 --source)
diff --git a/scripts/kernel-doc b/scripts/kernel-doc
index 208ad3b0ca51..c7865c362d28 100755
--- a/scripts/kernel-doc
+++ b/scripts/kernel-doc
@@ -2103,7 +2103,7 @@ sub process_file($) {
                 $section = $newsection;
             } elsif (/$doc_end/) {
 
-                if ($contents ne "") {
+                if (($contents ne "") && ($contents ne "\n")) {
                     dump_section($file, $section, xml_escape($contents));
                     $section = $section_default;
                     $contents = "";
diff --git a/security/selinux/avc.c b/security/selinux/avc.c
index db0fd9f33499..989fef82563a 100644
--- a/security/selinux/avc.c
+++ b/security/selinux/avc.c
@@ -337,7 +337,7 @@ static inline struct avc_node *avc_search_node(u32 ssid, u32 tsid, u16 tclass)
  * Look up an AVC entry that is valid for the
  * (@ssid, @tsid), interpreting the permissions
  * based on @tclass.  If a valid AVC entry exists,
- * then this function return the avc_node.
+ * then this function returns the avc_node.
  * Otherwise, this function returns NULL.
  */
 static struct avc_node *avc_lookup(u32 ssid, u32 tsid, u16 tclass)
@@ -523,7 +523,7 @@ void avc_audit(u32 ssid, u32 tsid,
  * @perms: permissions
  *
  * Register a callback function for events in the set @events
- * related to the SID pair (@ssid, @tsid) and
+ * related to the SID pair (@ssid, @tsid) 
  * and the permissions @perms, interpreting
  * @perms based on @tclass.  Returns %0 on success or
  * -%ENOMEM if insufficient memory exists to add the callback.
@@ -568,7 +568,7 @@ static inline int avc_sidcmp(u32 x, u32 y)
  *
  * if a valid AVC entry doesn't exist,this function returns -ENOENT.
  * if kmalloc() called internal returns NULL, this function returns -ENOMEM.
- * otherwise, this function update the AVC entry. The original AVC-entry object
+ * otherwise, this function updates the AVC entry. The original AVC-entry object
  * will release later by RCU.
  */
 static int avc_update_node(u32 event, u32 perms, u32 ssid, u32 tsid, u16 tclass,
diff --git a/sound/arm/pxa2xx-ac97-lib.c b/sound/arm/pxa2xx-ac97-lib.c
index 6fdca97186e7..88eec3847df2 100644
--- a/sound/arm/pxa2xx-ac97-lib.c
+++ b/sound/arm/pxa2xx-ac97-lib.c
@@ -22,7 +22,6 @@
 
 #include <asm/irq.h>
 #include <mach/regs-ac97.h>
-#include <mach/pxa2xx-gpio.h>
 #include <mach/audio.h>
 
 static DEFINE_MUTEX(car_mutex);
@@ -32,6 +31,8 @@ static struct clk *ac97_clk;
 static struct clk *ac97conf_clk;
 static int reset_gpio;
 
+extern void pxa27x_assert_ac97reset(int reset_gpio, int on);
+
 /*
  * Beware PXA27x bugs:
  *
@@ -42,45 +43,6 @@ static int reset_gpio;
  * 1 jiffy timeout if interrupt never comes).
  */
 
-enum {
-        RESETGPIO_FORCE_HIGH,
-        RESETGPIO_FORCE_LOW,
-        RESETGPIO_NORMAL_ALTFUNC
-};
-
-/**
- * set_resetgpio_mode - computes and sets the AC97_RESET gpio mode on PXA
- * @mode: chosen action
- *
- * As the PXA27x CPUs suffer from a AC97 bug, a manual control of the reset line
- * must be done to insure proper work of AC97 reset line.  This function
- * computes the correct gpio_mode for further use by reset functions, and
- * applied the change through pxa_gpio_mode.
- */
-static void set_resetgpio_mode(int resetgpio_action)
-{
-        int mode = 0;
-
-        if (reset_gpio)
-                switch (resetgpio_action) {
-                case RESETGPIO_NORMAL_ALTFUNC:
-                        if (reset_gpio == 113)
-                                mode = 113 | GPIO_ALT_FN_2_OUT;
-                        if (reset_gpio == 95)
-                                mode = 95 | GPIO_ALT_FN_1_OUT;
-                        break;
-                case RESETGPIO_FORCE_LOW:
-                        mode = reset_gpio | GPIO_OUT | GPIO_DFLT_LOW;
-                        break;
-                case RESETGPIO_FORCE_HIGH:
-                        mode = reset_gpio | GPIO_OUT | GPIO_DFLT_HIGH;
-                        break;
-                };
-
-        if (mode)
-                pxa_gpio_mode(mode);
-}
-
 unsigned short pxa2xx_ac97_read(struct snd_ac97 *ac97, unsigned short reg)
 {
         unsigned short val = -1;
@@ -174,12 +136,11 @@ static inline void pxa_ac97_warm_pxa27x(void)
 {
         gsr_bits = 0;
 
-        /* warm reset broken on Bulverde,
-           so manually keep AC97 reset high */
-        set_resetgpio_mode(RESETGPIO_FORCE_HIGH);
+        /* warm reset broken on Bulverde, so manually keep AC97 reset high */
+        pxa27x_assert_ac97reset(reset_gpio, 1);
         udelay(10);
         GCR |= GCR_WARM_RST;
-        set_resetgpio_mode(RESETGPIO_NORMAL_ALTFUNC);
+        pxa27x_assert_ac97reset(reset_gpio, 0);
         udelay(500);
 }
 
@@ -345,16 +306,6 @@ EXPORT_SYMBOL_GPL(pxa2xx_ac97_hw_suspend);
 
 int pxa2xx_ac97_hw_resume(void)
 {
-        if (cpu_is_pxa25x() || cpu_is_pxa27x()) {
-                pxa_gpio_mode(GPIO31_SYNC_AC97_MD);
-                pxa_gpio_mode(GPIO30_SDATA_OUT_AC97_MD);
-                pxa_gpio_mode(GPIO28_BITCLK_AC97_MD);
-                pxa_gpio_mode(GPIO29_SDATA_IN_AC97_MD);
-        }
-        if (cpu_is_pxa27x()) {
-                /* Use GPIO 113 or 95 as AC97 Reset on Bulverde */
-                set_resetgpio_mode(RESETGPIO_NORMAL_ALTFUNC);
-        }
         clk_enable(ac97_clk);
         return 0;
 }
@@ -386,16 +337,9 @@ int __devinit pxa2xx_ac97_hw_probe(struct platform_device *dev)
                         reset_gpio = 113;
         }
 
-        if (cpu_is_pxa25x() || cpu_is_pxa27x()) {
-                pxa_gpio_mode(GPIO31_SYNC_AC97_MD);
-                pxa_gpio_mode(GPIO30_SDATA_OUT_AC97_MD);
-                pxa_gpio_mode(GPIO28_BITCLK_AC97_MD);
-                pxa_gpio_mode(GPIO29_SDATA_IN_AC97_MD);
-        }
-
         if (cpu_is_pxa27x()) {
                 /* Use GPIO 113 as AC97 Reset on Bulverde */
-                set_resetgpio_mode(RESETGPIO_NORMAL_ALTFUNC);
+                pxa27x_assert_ac97reset(reset_gpio, 0);
                 ac97conf_clk = clk_get(&dev->dev, "AC97CONFCLK");
                 if (IS_ERR(ac97conf_clk)) {
                         ret = PTR_ERR(ac97conf_clk);
diff --git a/sound/pci/rme9652/hdspm.c b/sound/pci/rme9652/hdspm.c
index 3d72c1effeef..547b713d7204 100644
--- a/sound/pci/rme9652/hdspm.c
+++ b/sound/pci/rme9652/hdspm.c
@@ -2479,7 +2479,7 @@ static int snd_hdspm_put_qs_wire(struct snd_kcontrol *kcontrol,
    on MADICARD 
   - playback mixer matrix: [channelout+64] [output] [value]
   - input(thru) mixer matrix: [channelin] [output] [value]
-  (better do 2 kontrols for seperation ?)
+  (better do 2 kontrols for separation ?)
 */
 
 #define HDSPM_MIXER(xname, xindex) \
diff --git a/sound/soc/codecs/wm8990.c b/sound/soc/codecs/wm8990.c
index a54dc77b7f34..056b787b6ee0 100644
--- a/sound/soc/codecs/wm8990.c
+++ b/sound/soc/codecs/wm8990.c
@@ -990,7 +990,7 @@ static int wm8990_set_dai_pll(struct snd_soc_dai *codec_dai, int pll_id,
                 reg = snd_soc_read(codec, WM8990_CLOCKING_2);
                 snd_soc_write(codec, WM8990_CLOCKING_2, reg | WM8990_SYSCLK_SRC);
 
-                /* set up N , fractional mode and pre-divisor if neccessary */
+                /* set up N , fractional mode and pre-divisor if necessary */
                 snd_soc_write(codec, WM8990_PLL1, pll_div.n | WM8990_SDM |
                         (pll_div.div2?WM8990_PRESCALE:0));
                 snd_soc_write(codec, WM8990_PLL2, (u8)(pll_div.k>>8));
diff --git a/sound/soc/pxa/pxa-ssp.c b/sound/soc/pxa/pxa-ssp.c
index e69397f40f72..9e95e5117c88 100644
--- a/sound/soc/pxa/pxa-ssp.c
+++ b/sound/soc/pxa/pxa-ssp.c
@@ -42,11 +42,14 @@
  * SSP audio private data
  */
 struct ssp_priv {
-        struct ssp_dev dev;
+        struct ssp_device *ssp;
         unsigned int sysclk;
         int dai_fmt;
 #ifdef CONFIG_PM
-        struct ssp_state state;
+        uint32_t        cr0;
+        uint32_t        cr1;
+        uint32_t        to;
+        uint32_t        psp;
 #endif
 };
 
@@ -61,6 +64,22 @@ static void dump_registers(struct ssp_device *ssp)
                  ssp_read_reg(ssp, SSACD));
 }
 
+static void ssp_enable(struct ssp_device *ssp)
+{
+        uint32_t sscr0;
+
+        sscr0 = __raw_readl(ssp->mmio_base + SSCR0) | SSCR0_SSE;
+        __raw_writel(sscr0, ssp->mmio_base + SSCR0);
+}
+
+static void ssp_disable(struct ssp_device *ssp)
+{
+        uint32_t sscr0;
+
+        sscr0 = __raw_readl(ssp->mmio_base + SSCR0) & ~SSCR0_SSE;
+        __raw_writel(sscr0, ssp->mmio_base + SSCR0);
+}
+
 struct pxa2xx_pcm_dma_data {
         struct pxa2xx_pcm_dma_params params;
         char name[20];
@@ -94,13 +113,12 @@ static int pxa_ssp_startup(struct snd_pcm_substream *substream,
         struct snd_soc_pcm_runtime *rtd = substream->private_data;
         struct snd_soc_dai *cpu_dai = rtd->dai->cpu_dai;
         struct ssp_priv *priv = cpu_dai->private_data;
+        struct ssp_device *ssp = priv->ssp;
         int ret = 0;
 
         if (!cpu_dai->active) {
-                priv->dev.port = cpu_dai->id + 1;
-                priv->dev.irq = NO_IRQ;
-                clk_enable(priv->dev.ssp->clk);
-                ssp_disable(&priv->dev);
+                clk_enable(ssp->clk);
+                ssp_disable(ssp);
         }
 
         if (cpu_dai->dma_data) {
@@ -116,10 +134,11 @@ static void pxa_ssp_shutdown(struct snd_pcm_substream *substream,
         struct snd_soc_pcm_runtime *rtd = substream->private_data;
         struct snd_soc_dai *cpu_dai = rtd->dai->cpu_dai;
         struct ssp_priv *priv = cpu_dai->private_data;
+        struct ssp_device *ssp = priv->ssp;
 
         if (!cpu_dai->active) {
-                ssp_disable(&priv->dev);
-                clk_disable(priv->dev.ssp->clk);
+                ssp_disable(ssp);
+                clk_disable(ssp->clk);
         }
 
         if (cpu_dai->dma_data) {
@@ -133,27 +152,39 @@ static void pxa_ssp_shutdown(struct snd_pcm_substream *substream,
 static int pxa_ssp_suspend(struct snd_soc_dai *cpu_dai)
 {
         struct ssp_priv *priv = cpu_dai->private_data;
+        struct ssp_device *ssp = priv->ssp;
 
         if (!cpu_dai->active)
-                clk_enable(priv->dev.ssp->clk);
+                clk_enable(ssp->clk);
 
-        ssp_save_state(&priv->dev, &priv->state);
-        clk_disable(priv->dev.ssp->clk);
+        priv->cr0 = __raw_readl(ssp->mmio_base + SSCR0);
+        priv->cr1 = __raw_readl(ssp->mmio_base + SSCR1);
+        priv->to  = __raw_readl(ssp->mmio_base + SSTO);
+        priv->psp = __raw_readl(ssp->mmio_base + SSPSP);
 
+        ssp_disable(ssp);
+        clk_disable(ssp->clk);
         return 0;
 }
 
 static int pxa_ssp_resume(struct snd_soc_dai *cpu_dai)
 {
         struct ssp_priv *priv = cpu_dai->private_data;
+        struct ssp_device *ssp = priv->ssp;
+        uint32_t sssr = SSSR_ROR | SSSR_TUR | SSSR_BCE;
+
+        clk_enable(ssp->clk);
 
-        clk_enable(priv->dev.ssp->clk);
-        ssp_restore_state(&priv->dev, &priv->state);
+        __raw_writel(sssr, ssp->mmio_base + SSSR);
+        __raw_writel(priv->cr0 & ~SSCR0_SSE, ssp->mmio_base + SSCR0);
+        __raw_writel(priv->cr1, ssp->mmio_base + SSCR1);
+        __raw_writel(priv->to,  ssp->mmio_base + SSTO);
+        __raw_writel(priv->psp, ssp->mmio_base + SSPSP);
 
         if (cpu_dai->active)
-                ssp_enable(&priv->dev);
+                ssp_enable(ssp);
         else
-                clk_disable(priv->dev.ssp->clk);
+                clk_disable(ssp->clk);
 
         return 0;
 }
@@ -203,7 +234,7 @@ static int pxa_ssp_set_dai_sysclk(struct snd_soc_dai *cpu_dai,
         int clk_id, unsigned int freq, int dir)
 {
         struct ssp_priv *priv = cpu_dai->private_data;
-        struct ssp_device *ssp = priv->dev.ssp;
+        struct ssp_device *ssp = priv->ssp;
         int val;
 
         u32 sscr0 = ssp_read_reg(ssp, SSCR0) &
@@ -244,11 +275,11 @@ static int pxa_ssp_set_dai_sysclk(struct snd_soc_dai *cpu_dai,
         /* The SSP clock must be disabled when changing SSP clock mode
          * on PXA2xx.  On PXA3xx it must be enabled when doing so. */
         if (!cpu_is_pxa3xx())
-                clk_disable(priv->dev.ssp->clk);
+                clk_disable(ssp->clk);
         val = ssp_read_reg(ssp, SSCR0) | sscr0;
         ssp_write_reg(ssp, SSCR0, val);
         if (!cpu_is_pxa3xx())
-                clk_enable(priv->dev.ssp->clk);
+                clk_enable(ssp->clk);
 
         return 0;
 }
@@ -260,7 +291,7 @@ static int pxa_ssp_set_dai_clkdiv(struct snd_soc_dai *cpu_dai,
         int div_id, int div)
 {
         struct ssp_priv *priv = cpu_dai->private_data;
-        struct ssp_device *ssp = priv->dev.ssp;
+        struct ssp_device *ssp = priv->ssp;
         int val;
 
         switch (div_id) {
@@ -311,7 +342,7 @@ static int pxa_ssp_set_dai_pll(struct snd_soc_dai *cpu_dai, int pll_id,
         int source, unsigned int freq_in, unsigned int freq_out)
 {
         struct ssp_priv *priv = cpu_dai->private_data;
-        struct ssp_device *ssp = priv->dev.ssp;
+        struct ssp_device *ssp = priv->ssp;
         u32 ssacd = ssp_read_reg(ssp, SSACD) & ~0x70;
 
 #if defined(CONFIG_PXA3xx)
@@ -380,7 +411,7 @@ static int pxa_ssp_set_dai_tdm_slot(struct snd_soc_dai *cpu_dai,
         unsigned int tx_mask, unsigned int rx_mask, int slots, int slot_width)
 {
         struct ssp_priv *priv = cpu_dai->private_data;
-        struct ssp_device *ssp = priv->dev.ssp;
+        struct ssp_device *ssp = priv->ssp;
         u32 sscr0;
 
         sscr0 = ssp_read_reg(ssp, SSCR0);
@@ -415,7 +446,7 @@ static int pxa_ssp_set_dai_tristate(struct snd_soc_dai *cpu_dai,
         int tristate)
 {
         struct ssp_priv *priv = cpu_dai->private_data;
-        struct ssp_device *ssp = priv->dev.ssp;
+        struct ssp_device *ssp = priv->ssp;
         u32 sscr1;
 
         sscr1 = ssp_read_reg(ssp, SSCR1);
@@ -437,7 +468,7 @@ static int pxa_ssp_set_dai_fmt(struct snd_soc_dai *cpu_dai,
                 unsigned int fmt)
 {
         struct ssp_priv *priv = cpu_dai->private_data;
-        struct ssp_device *ssp = priv->dev.ssp;
+        struct ssp_device *ssp = priv->ssp;
         u32 sscr0;
         u32 sscr1;
         u32 sspsp;
@@ -532,7 +563,7 @@ static int pxa_ssp_hw_params(struct snd_pcm_substream *substream,
         struct snd_soc_pcm_runtime *rtd = substream->private_data;
         struct snd_soc_dai *cpu_dai = rtd->dai->cpu_dai;
         struct ssp_priv *priv = cpu_dai->private_data;
-        struct ssp_device *ssp = priv->dev.ssp;
+        struct ssp_device *ssp = priv->ssp;
         int chn = params_channels(params);
         u32 sscr0;
         u32 sspsp;
@@ -642,12 +673,12 @@ static int pxa_ssp_trigger(struct snd_pcm_substream *substream, int cmd,
         struct snd_soc_dai *cpu_dai = rtd->dai->cpu_dai;
         int ret = 0;
         struct ssp_priv *priv = cpu_dai->private_data;
-        struct ssp_device *ssp = priv->dev.ssp;
+        struct ssp_device *ssp = priv->ssp;
         int val;
 
         switch (cmd) {
         case SNDRV_PCM_TRIGGER_RESUME:
-                ssp_enable(&priv->dev);
+                ssp_enable(ssp);
                 break;
         case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
                 val = ssp_read_reg(ssp, SSCR1);
@@ -666,7 +697,7 @@ static int pxa_ssp_trigger(struct snd_pcm_substream *substream, int cmd,
                 else
                         val |= SSCR1_RSRE;
                 ssp_write_reg(ssp, SSCR1, val);
-                ssp_enable(&priv->dev);
+                ssp_enable(ssp);
                 break;
         case SNDRV_PCM_TRIGGER_STOP:
                 val = ssp_read_reg(ssp, SSCR1);
@@ -677,7 +708,7 @@ static int pxa_ssp_trigger(struct snd_pcm_substream *substream, int cmd,
                 ssp_write_reg(ssp, SSCR1, val);
                 break;
         case SNDRV_PCM_TRIGGER_SUSPEND:
-                ssp_disable(&priv->dev);
+                ssp_disable(ssp);
                 break;
         case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
                 val = ssp_read_reg(ssp, SSCR1);
@@ -707,8 +738,8 @@ static int pxa_ssp_probe(struct platform_device *pdev,
         if (!priv)
                 return -ENOMEM;
 
-        priv->dev.ssp = ssp_request(dai->id + 1, "SoC audio");
-        if (priv->dev.ssp == NULL) {
+        priv->ssp = ssp_request(dai->id + 1, "SoC audio");
+        if (priv->ssp == NULL) {
                 ret = -ENODEV;
                 goto err_priv;
         }
@@ -727,7 +758,7 @@ static void pxa_ssp_remove(struct platform_device *pdev,
                               struct snd_soc_dai *dai)
 {
         struct ssp_priv *priv = dai->private_data;
-        ssp_free(priv->dev.ssp);
+        ssp_free(priv->ssp);
 }
 
 #define PXA_SSP_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |\
diff --git a/sound/soc/s3c24xx/s3c64xx-i2s.c b/sound/soc/s3c24xx/s3c64xx-i2s.c
index 93ed3aad1631..a72c251401ac 100644
--- a/sound/soc/s3c24xx/s3c64xx-i2s.c
+++ b/sound/soc/s3c24xx/s3c64xx-i2s.c
@@ -22,8 +22,8 @@
 #include <sound/soc.h>
 
 #include <plat/regs-s3c2412-iis.h>
-#include <plat/gpio-bank-d.h>
-#include <plat/gpio-bank-e.h>
+#include <mach/gpio-bank-d.h>
+#include <mach/gpio-bank-e.h>
 #include <plat/gpio-cfg.h>
 
 #include <mach/map.h>
diff --git a/tools/perf/perf.c b/tools/perf/perf.c
index 57cb107c1f13..cd32c200cdb3 100644
--- a/tools/perf/perf.c
+++ b/tools/perf/perf.c
@@ -445,7 +445,7 @@ int main(int argc, const char **argv)
 
         /*
          * We use PATH to find perf commands, but we prepend some higher
-         * precidence paths: the "--exec-path" option, the PERF_EXEC_PATH
+         * precedence paths: the "--exec-path" option, the PERF_EXEC_PATH
          * environment, and the $(perfexecdir) from the Makefile at build
          * time.
          */
diff --git a/tools/perf/util/hist.c b/tools/perf/util/hist.c
index e8daf5ca6fd2..44408c2621cf 100644
--- a/tools/perf/util/hist.c
+++ b/tools/perf/util/hist.c
@@ -321,7 +321,7 @@ static size_t __callchain__fprintf_graph(FILE *fp, struct callchain_node *self,
                         new_depth_mask &= ~(1 << (depth - 1));
 
                 /*
-                 * But we keep the older depth mask for the line seperator
+                 * But we keep the older depth mask for the line separator
                  * to keep the level link until we reach the last child
                  */
                 ret += ipchain__fprintf_graph_line(fp, depth, depth_mask,