diff options
| -rw-r--r-- | drivers/net/can/mscan/mscan.c | 15 | ||||
| -rw-r--r-- | drivers/net/can/mscan/mscan.h | 5 |
2 files changed, 15 insertions, 5 deletions
diff --git a/drivers/net/can/mscan/mscan.c b/drivers/net/can/mscan/mscan.c index 20d1991b9094..263d1a9f0880 100644 --- a/drivers/net/can/mscan/mscan.c +++ b/drivers/net/can/mscan/mscan.c | |||
| @@ -211,18 +211,23 @@ static netdev_tx_t mscan_start_xmit(struct sk_buff *skb, struct net_device *dev) | |||
| 211 | 211 | ||
| 212 | rtr = frame->can_id & CAN_RTR_FLAG; | 212 | rtr = frame->can_id & CAN_RTR_FLAG; |
| 213 | 213 | ||
| 214 | /* RTR is always the lowest bit of interest, then IDs follow */ | ||
| 214 | if (frame->can_id & CAN_EFF_FLAG) { | 215 | if (frame->can_id & CAN_EFF_FLAG) { |
| 215 | can_id = (frame->can_id & CAN_EFF_MASK) << 1; | 216 | can_id = (frame->can_id & CAN_EFF_MASK) |
| 217 | << (MSCAN_EFF_RTR_SHIFT + 1); | ||
| 216 | if (rtr) | 218 | if (rtr) |
| 217 | can_id |= 1; | 219 | can_id |= 1 << MSCAN_EFF_RTR_SHIFT; |
| 218 | out_be16(®s->tx.idr3_2, can_id); | 220 | out_be16(®s->tx.idr3_2, can_id); |
| 219 | 221 | ||
| 220 | can_id >>= 16; | 222 | can_id >>= 16; |
| 221 | can_id = (can_id & 0x7) | ((can_id << 2) & 0xffe0) | (3 << 3); | 223 | /* EFF_FLAGS are inbetween the IDs :( */ |
| 224 | can_id = (can_id & 0x7) | ((can_id << 2) & 0xffe0) | ||
| 225 | | MSCAN_EFF_FLAGS; | ||
| 222 | } else { | 226 | } else { |
| 223 | can_id = (frame->can_id & CAN_SFF_MASK) << 5; | 227 | can_id = (frame->can_id & CAN_SFF_MASK) |
| 228 | << (MSCAN_SFF_RTR_SHIFT + 1); | ||
| 224 | if (rtr) | 229 | if (rtr) |
| 225 | can_id |= 1 << 4; | 230 | can_id |= 1 << MSCAN_SFF_RTR_SHIFT; |
| 226 | } | 231 | } |
| 227 | out_be16(®s->tx.idr1_0, can_id); | 232 | out_be16(®s->tx.idr1_0, can_id); |
| 228 | 233 | ||
diff --git a/drivers/net/can/mscan/mscan.h b/drivers/net/can/mscan/mscan.h index 20180007fe3d..00fc4aaf1ed8 100644 --- a/drivers/net/can/mscan/mscan.h +++ b/drivers/net/can/mscan/mscan.h | |||
| @@ -131,6 +131,11 @@ | |||
| 131 | /* MSCAN Miscellaneous Register (CANMISC) bits */ | 131 | /* MSCAN Miscellaneous Register (CANMISC) bits */ |
| 132 | #define MSCAN_BOHOLD 0x01 | 132 | #define MSCAN_BOHOLD 0x01 |
| 133 | 133 | ||
| 134 | /* MSCAN Identifier Register (IDR) bits */ | ||
| 135 | #define MSCAN_SFF_RTR_SHIFT 4 | ||
| 136 | #define MSCAN_EFF_RTR_SHIFT 0 | ||
| 137 | #define MSCAN_EFF_FLAGS 0x18 /* IDE + SRR */ | ||
| 138 | |||
| 134 | #ifdef MSCAN_FOR_MPC5200 | 139 | #ifdef MSCAN_FOR_MPC5200 |
| 135 | #define _MSCAN_RESERVED_(n, num) u8 _res##n[num] | 140 | #define _MSCAN_RESERVED_(n, num) u8 _res##n[num] |
| 136 | #define _MSCAN_RESERVED_DSR_SIZE 2 | 141 | #define _MSCAN_RESERVED_DSR_SIZE 2 |
