diff options
-rw-r--r-- | drivers/gpu/drm/radeon/evergreen.c | 12 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/rv770.c | 10 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/rv770d.h | 1 |
3 files changed, 19 insertions, 4 deletions
diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c index e9b262fdaa2c..090f74700081 100644 --- a/drivers/gpu/drm/radeon/evergreen.c +++ b/drivers/gpu/drm/radeon/evergreen.c | |||
@@ -1940,9 +1940,15 @@ int evergreen_mc_init(struct radeon_device *rdev) | |||
1940 | rdev->mc.aper_base = pci_resource_start(rdev->pdev, 0); | 1940 | rdev->mc.aper_base = pci_resource_start(rdev->pdev, 0); |
1941 | rdev->mc.aper_size = pci_resource_len(rdev->pdev, 0); | 1941 | rdev->mc.aper_size = pci_resource_len(rdev->pdev, 0); |
1942 | /* Setup GPU memory space */ | 1942 | /* Setup GPU memory space */ |
1943 | /* size in MB on evergreen */ | 1943 | if (rdev->flags & RADEON_IS_IGP) { |
1944 | rdev->mc.mc_vram_size = RREG32(CONFIG_MEMSIZE) * 1024 * 1024; | 1944 | /* size in bytes on fusion */ |
1945 | rdev->mc.real_vram_size = RREG32(CONFIG_MEMSIZE) * 1024 * 1024; | 1945 | rdev->mc.mc_vram_size = RREG32(CONFIG_MEMSIZE); |
1946 | rdev->mc.real_vram_size = RREG32(CONFIG_MEMSIZE); | ||
1947 | } else { | ||
1948 | /* size in MB on evergreen */ | ||
1949 | rdev->mc.mc_vram_size = RREG32(CONFIG_MEMSIZE) * 1024 * 1024; | ||
1950 | rdev->mc.real_vram_size = RREG32(CONFIG_MEMSIZE) * 1024 * 1024; | ||
1951 | } | ||
1946 | rdev->mc.visible_vram_size = rdev->mc.aper_size; | 1952 | rdev->mc.visible_vram_size = rdev->mc.aper_size; |
1947 | rdev->mc.active_vram_size = rdev->mc.visible_vram_size; | 1953 | rdev->mc.active_vram_size = rdev->mc.visible_vram_size; |
1948 | r700_vram_gtt_location(rdev, &rdev->mc); | 1954 | r700_vram_gtt_location(rdev, &rdev->mc); |
diff --git a/drivers/gpu/drm/radeon/rv770.c b/drivers/gpu/drm/radeon/rv770.c index c23349a46fd2..2b66af9066b2 100644 --- a/drivers/gpu/drm/radeon/rv770.c +++ b/drivers/gpu/drm/radeon/rv770.c | |||
@@ -237,6 +237,12 @@ static void rv770_mc_program(struct radeon_device *rdev) | |||
237 | rdev->mc.vram_end >> 12); | 237 | rdev->mc.vram_end >> 12); |
238 | } | 238 | } |
239 | WREG32(MC_VM_SYSTEM_APERTURE_DEFAULT_ADDR, 0); | 239 | WREG32(MC_VM_SYSTEM_APERTURE_DEFAULT_ADDR, 0); |
240 | if (rdev->flags & RADEON_IS_IGP) { | ||
241 | tmp = RREG32(MC_FUS_VM_FB_OFFSET) & 0x000FFFFF; | ||
242 | tmp |= ((rdev->mc.vram_end >> 20) & 0xF) << 24; | ||
243 | tmp |= ((rdev->mc.vram_start >> 20) & 0xF) << 20; | ||
244 | WREG32(MC_FUS_VM_FB_OFFSET, tmp); | ||
245 | } | ||
240 | tmp = ((rdev->mc.vram_end >> 24) & 0xFFFF) << 16; | 246 | tmp = ((rdev->mc.vram_end >> 24) & 0xFFFF) << 16; |
241 | tmp |= ((rdev->mc.vram_start >> 24) & 0xFFFF); | 247 | tmp |= ((rdev->mc.vram_start >> 24) & 0xFFFF); |
242 | WREG32(MC_VM_FB_LOCATION, tmp); | 248 | WREG32(MC_VM_FB_LOCATION, tmp); |
@@ -1035,8 +1041,10 @@ void r700_vram_gtt_location(struct radeon_device *rdev, struct radeon_mc *mc) | |||
1035 | mc->vram_end, mc->real_vram_size >> 20); | 1041 | mc->vram_end, mc->real_vram_size >> 20); |
1036 | } else { | 1042 | } else { |
1037 | u64 base = 0; | 1043 | u64 base = 0; |
1038 | if (rdev->flags & RADEON_IS_IGP) | 1044 | if (rdev->flags & RADEON_IS_IGP) { |
1039 | base = (RREG32(MC_VM_FB_LOCATION) & 0xFFFF) << 24; | 1045 | base = (RREG32(MC_VM_FB_LOCATION) & 0xFFFF) << 24; |
1046 | base |= RREG32(MC_FUS_VM_FB_OFFSET) & 0x00F00000; | ||
1047 | } | ||
1040 | radeon_vram_location(rdev, &rdev->mc, base); | 1048 | radeon_vram_location(rdev, &rdev->mc, base); |
1041 | rdev->mc.gtt_base_align = 0; | 1049 | rdev->mc.gtt_base_align = 0; |
1042 | radeon_gtt_location(rdev, mc); | 1050 | radeon_gtt_location(rdev, mc); |
diff --git a/drivers/gpu/drm/radeon/rv770d.h b/drivers/gpu/drm/radeon/rv770d.h index 7b1c8f8f4074..e09a403f1c64 100644 --- a/drivers/gpu/drm/radeon/rv770d.h +++ b/drivers/gpu/drm/radeon/rv770d.h | |||
@@ -158,6 +158,7 @@ | |||
158 | #define MC_VM_AGP_BOT 0x202C | 158 | #define MC_VM_AGP_BOT 0x202C |
159 | #define MC_VM_AGP_BASE 0x2030 | 159 | #define MC_VM_AGP_BASE 0x2030 |
160 | #define MC_VM_FB_LOCATION 0x2024 | 160 | #define MC_VM_FB_LOCATION 0x2024 |
161 | #define MC_FUS_VM_FB_OFFSET 0x2898 | ||
161 | #define MC_VM_MB_L1_TLB0_CNTL 0x2234 | 162 | #define MC_VM_MB_L1_TLB0_CNTL 0x2234 |
162 | #define MC_VM_MB_L1_TLB1_CNTL 0x2238 | 163 | #define MC_VM_MB_L1_TLB1_CNTL 0x2238 |
163 | #define MC_VM_MB_L1_TLB2_CNTL 0x223C | 164 | #define MC_VM_MB_L1_TLB2_CNTL 0x223C |