3 files changed, 5 insertions, 4 deletions

diff --git a/drivers/gpu/drm/nouveau/nouveau_state.c b/drivers/gpu/drm/nouveau/nouveau_state.c
index 144f79a350ae..731acea865b5 100644
--- a/drivers/gpu/drm/nouveau/nouveau_state.c
+++ b/drivers/gpu/drm/nouveau/nouveau_state.c
@@ -371,7 +371,6 @@ static int nouveau_init_engine_ptrs(struct drm_device *dev)
                 engine->vram.flags_valid        = nv50_vram_flags_valid;
                 break;
         case 0xC0:
-        case 0xD0:
                 engine->instmem.init            = nvc0_instmem_init;
                 engine->instmem.takedown        = nvc0_instmem_takedown;
                 engine->instmem.suspend         = nvc0_instmem_suspend;
@@ -923,7 +922,6 @@ int nouveau_load(struct drm_device *dev, unsigned long flags)
                 dev_priv->card_type = NV_50;
                 break;
         case 0xc0:
-        case 0xd0:
                 dev_priv->card_type = NV_C0;
                 break;
         default:
diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c
index 12d2fdc52414..e8a5ffb0124d 100644
--- a/drivers/gpu/drm/radeon/evergreen.c
+++ b/drivers/gpu/drm/radeon/evergreen.c
@@ -2248,7 +2248,10 @@ int evergreen_mc_init(struct radeon_device *rdev)
 
         /* Get VRAM informations */
         rdev->mc.vram_is_ddr = true;
-        tmp = RREG32(MC_ARB_RAMCFG);
+        if (rdev->flags & RADEON_IS_IGP)
+                tmp = RREG32(FUS_MC_ARB_RAMCFG);
+        else
+                tmp = RREG32(MC_ARB_RAMCFG);
         if (tmp & CHANSIZE_OVERRIDE) {
                 chansize = 16;
         } else if (tmp & CHANSIZE_MASK) {
diff --git a/drivers/gpu/drm/radeon/nid.h b/drivers/gpu/drm/radeon/nid.h
index 9736746da2d6..4672869cdb26 100644
--- a/drivers/gpu/drm/radeon/nid.h
+++ b/drivers/gpu/drm/radeon/nid.h
@@ -320,7 +320,7 @@
 #define CGTS_USER_TCC_DISABLE                           0x914C
 #define         TCC_DISABLE_MASK                                0xFFFF0000
 #define         TCC_DISABLE_SHIFT                               16
-#define CGTS_SM_CTRL_REG                                0x915C
+#define CGTS_SM_CTRL_REG                                0x9150
 #define         OVERRIDE                                (1 << 21)
 
 #define TA_CNTL_AUX                                     0x9508