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-rw-r--r--Documentation/ABI/testing/procfs-diskstats22
-rw-r--r--Documentation/ABI/testing/sysfs-block28
-rw-r--r--Documentation/accounting/getdelays.c6
-rw-r--r--Documentation/aoe/mkdevs.sh2
-rw-r--r--Documentation/aoe/udev-install.sh5
-rw-r--r--Documentation/aoe/udev.txt16
-rw-r--r--Documentation/feature-removal-schedule.txt19
-rw-r--r--Documentation/filesystems/isofs.txt1
-rw-r--r--Documentation/filesystems/vfs.txt50
-rw-r--r--Documentation/iostats.txt15
-rw-r--r--Documentation/kernel-parameters.txt3
-rw-r--r--Documentation/mn10300/ABI.txt149
-rw-r--r--Documentation/mn10300/compartmentalisation.txt60
-rw-r--r--Documentation/thermal/sysfs-api.txt23
-rw-r--r--MAINTAINERS26
-rw-r--r--arch/alpha/Kconfig8
-rw-r--r--arch/alpha/kernel/osf_sys.c1
-rw-r--r--arch/alpha/kernel/process.c63
-rw-r--r--arch/alpha/kernel/setup.c3
-rw-r--r--arch/arm/Kconfig3
-rw-r--r--arch/arm/kernel/process.c30
-rw-r--r--arch/avr32/kernel/ocd.c18
-rw-r--r--arch/avr32/mach-at32ap/at32ap700x.c54
-rw-r--r--arch/blackfin/Kconfig49
-rw-r--r--arch/blackfin/Kconfig.debug2
-rw-r--r--arch/blackfin/Makefile1
-rw-r--r--arch/blackfin/configs/BF533-STAMP_defconfig16
-rw-r--r--arch/blackfin/kernel/bfin_dma_5xx.c10
-rw-r--r--arch/blackfin/kernel/bfin_gpio.c20
-rw-r--r--arch/blackfin/kernel/cplb-mpu/cplbinit.c4
-rw-r--r--arch/blackfin/kernel/init_task.c2
-rw-r--r--arch/blackfin/kernel/process.c1
-rw-r--r--arch/blackfin/kernel/setup.c585
-rw-r--r--arch/blackfin/kernel/traps.c2
-rw-r--r--arch/blackfin/kernel/vmlinux.lds.S47
-rw-r--r--arch/blackfin/mach-bf527/boards/ezkit.c19
-rw-r--r--arch/blackfin/mach-bf533/boards/ezkit.c18
-rw-r--r--arch/blackfin/mach-bf533/boards/stamp.c22
-rw-r--r--arch/blackfin/mach-bf537/boards/stamp.c16
-rw-r--r--arch/blackfin/mach-bf548/boards/ezkit.c22
-rw-r--r--arch/blackfin/mach-bf548/dma.c4
-rw-r--r--arch/blackfin/mach-bf561/boards/ezkit.c87
-rw-r--r--arch/blackfin/mach-common/Makefile4
-rw-r--r--arch/blackfin/mach-common/dpmc.S32
-rw-r--r--arch/blackfin/mach-common/entry.S12
-rw-r--r--arch/blackfin/mach-common/ints-priority-dc.c484
-rw-r--r--arch/blackfin/mach-common/ints-priority.c (renamed from arch/blackfin/mach-common/ints-priority-sc.c)271
-rw-r--r--arch/blackfin/mach-common/pm.c44
-rw-r--r--arch/blackfin/mm/init.c12
-rw-r--r--arch/cris/Kconfig542
-rw-r--r--arch/cris/Makefile139
-rw-r--r--arch/cris/arch-v10/Kconfig67
-rw-r--r--arch/cris/arch-v10/boot/Makefile24
-rw-r--r--arch/cris/arch-v10/boot/compressed/Makefile48
-rw-r--r--arch/cris/arch-v10/boot/compressed/misc.c6
-rw-r--r--arch/cris/arch-v10/boot/rescue/Makefile56
-rw-r--r--arch/cris/arch-v10/boot/rescue/head.S129
-rw-r--r--arch/cris/arch-v10/boot/rescue/kimagerescue.S58
-rw-r--r--arch/cris/arch-v10/boot/rescue/testrescue.S12
-rw-r--r--arch/cris/arch-v10/drivers/Kconfig181
-rw-r--r--arch/cris/arch-v10/drivers/Makefile12
-rw-r--r--arch/cris/arch-v10/drivers/axisflashmap.c181
-rw-r--r--arch/cris/arch-v10/drivers/ds1302.c4
-rw-r--r--arch/cris/arch-v10/drivers/eeprom.c75
-rw-r--r--arch/cris/arch-v10/drivers/gpio.c634
-rw-r--r--arch/cris/arch-v10/drivers/i2c.c81
-rw-r--r--arch/cris/arch-v10/drivers/pcf8563.c393
-rw-r--r--arch/cris/arch-v10/drivers/sync_serial.c1441
-rw-r--r--arch/cris/arch-v10/kernel/debugport.c134
-rw-r--r--arch/cris/arch-v10/kernel/dma.c3
-rw-r--r--arch/cris/arch-v10/kernel/entry.S249
-rw-r--r--arch/cris/arch-v10/kernel/fasttimer.c35
-rw-r--r--arch/cris/arch-v10/kernel/head.S221
-rw-r--r--arch/cris/arch-v10/kernel/io_interface_mux.c515
-rw-r--r--arch/cris/arch-v10/kernel/irq.c7
-rw-r--r--arch/cris/arch-v10/kernel/kgdb.c58
-rw-r--r--arch/cris/arch-v10/kernel/process.c3
-rw-r--r--arch/cris/arch-v10/kernel/ptrace.c1
-rw-r--r--arch/cris/arch-v10/kernel/shadows.c3
-rw-r--r--arch/cris/arch-v10/kernel/traps.c198
-rw-r--r--arch/cris/arch-v10/lib/checksum.S8
-rw-r--r--arch/cris/arch-v10/lib/checksumcopy.S8
-rw-r--r--arch/cris/arch-v10/lib/dram_init.S58
-rw-r--r--arch/cris/arch-v10/lib/old_checksum.c3
-rw-r--r--arch/cris/arch-v10/mm/fault.c13
-rw-r--r--arch/cris/arch-v10/mm/tlb.c58
-rw-r--r--arch/cris/arch-v32/Kconfig127
-rw-r--r--arch/cris/arch-v32/boot/Makefile23
-rw-r--r--arch/cris/arch-v32/boot/compressed/Makefile45
-rw-r--r--arch/cris/arch-v32/boot/compressed/README1
-rw-r--r--arch/cris/arch-v32/boot/compressed/head.S137
-rw-r--r--arch/cris/arch-v32/boot/compressed/misc.c72
-rw-r--r--arch/cris/arch-v32/boot/rescue/Makefile41
-rw-r--r--arch/cris/arch-v32/boot/rescue/head.S42
-rw-r--r--arch/cris/arch-v32/boot/rescue/rescue.ld37
-rw-r--r--arch/cris/arch-v32/drivers/Kconfig711
-rw-r--r--arch/cris/arch-v32/drivers/Makefile5
-rw-r--r--arch/cris/arch-v32/drivers/axisflashmap.c488
-rw-r--r--arch/cris/arch-v32/drivers/cryptocop.c104
-rw-r--r--arch/cris/arch-v32/drivers/i2c.c206
-rw-r--r--arch/cris/arch-v32/drivers/i2c.h2
-rw-r--r--arch/cris/arch-v32/drivers/iop_fw_load.c16
-rw-r--r--arch/cris/arch-v32/drivers/mach-a3/Makefile6
-rw-r--r--arch/cris/arch-v32/drivers/mach-a3/gpio.c984
-rw-r--r--arch/cris/arch-v32/drivers/mach-a3/nandflash.c180
-rw-r--r--arch/cris/arch-v32/drivers/mach-fs/Makefile6
-rw-r--r--arch/cris/arch-v32/drivers/mach-fs/gpio.c (renamed from arch/cris/arch-v32/drivers/gpio.c)612
-rw-r--r--arch/cris/arch-v32/drivers/mach-fs/nandflash.c (renamed from arch/cris/arch-v32/drivers/nandflash.c)122
-rw-r--r--arch/cris/arch-v32/drivers/pcf8563.c296
-rw-r--r--arch/cris/arch-v32/drivers/sync_serial.c938
-rw-r--r--arch/cris/arch-v32/kernel/Makefile5
-rw-r--r--arch/cris/arch-v32/kernel/arbiter.c296
-rw-r--r--arch/cris/arch-v32/kernel/crisksyms.c7
-rw-r--r--arch/cris/arch-v32/kernel/debugport.c342
-rw-r--r--arch/cris/arch-v32/kernel/entry.S83
-rw-r--r--arch/cris/arch-v32/kernel/fasttimer.c535
-rw-r--r--arch/cris/arch-v32/kernel/head.S204
-rw-r--r--arch/cris/arch-v32/kernel/io.c153
-rw-r--r--arch/cris/arch-v32/kernel/irq.c274
-rw-r--r--arch/cris/arch-v32/kernel/kgdb.c12
-rw-r--r--arch/cris/arch-v32/kernel/process.c14
-rw-r--r--arch/cris/arch-v32/kernel/ptrace.c10
-rw-r--r--arch/cris/arch-v32/kernel/signal.c144
-rw-r--r--arch/cris/arch-v32/kernel/smp.c31
-rw-r--r--arch/cris/arch-v32/kernel/time.c237
-rw-r--r--arch/cris/arch-v32/kernel/traps.c192
-rw-r--r--arch/cris/arch-v32/kernel/vcs_hook.c96
-rw-r--r--arch/cris/arch-v32/lib/Makefile3
-rw-r--r--arch/cris/arch-v32/lib/checksum.S72
-rw-r--r--arch/cris/arch-v32/lib/checksumcopy.S69
-rw-r--r--arch/cris/arch-v32/lib/delay.c28
-rw-r--r--arch/cris/arch-v32/lib/spinlock.S10
-rw-r--r--arch/cris/arch-v32/mach-a3/Kconfig110
-rw-r--r--arch/cris/arch-v32/mach-a3/Makefile11
-rw-r--r--arch/cris/arch-v32/mach-a3/arbiter.c634
-rw-r--r--arch/cris/arch-v32/mach-a3/cpufreq.c153
-rw-r--r--arch/cris/arch-v32/mach-a3/dma.c185
-rw-r--r--arch/cris/arch-v32/mach-a3/dram_init.S104
-rw-r--r--arch/cris/arch-v32/mach-a3/hw_settings.S51
-rw-r--r--arch/cris/arch-v32/mach-a3/io.c149
-rw-r--r--arch/cris/arch-v32/mach-a3/pinmux.c386
-rw-r--r--arch/cris/arch-v32/mach-a3/vcs_hook.c103
-rw-r--r--arch/cris/arch-v32/mach-a3/vcs_hook.h58
-rw-r--r--arch/cris/arch-v32/mach-fs/Kconfig216
-rw-r--r--arch/cris/arch-v32/mach-fs/Makefile11
-rw-r--r--arch/cris/arch-v32/mach-fs/arbiter.c404
-rw-r--r--arch/cris/arch-v32/mach-fs/cpufreq.c146
-rw-r--r--arch/cris/arch-v32/mach-fs/dma.c (renamed from arch/cris/arch-v32/kernel/dma.c)46
-rw-r--r--arch/cris/arch-v32/mach-fs/dram_init.S (renamed from arch/cris/arch-v32/lib/dram_init.S)23
-rw-r--r--arch/cris/arch-v32/mach-fs/hw_settings.S (renamed from arch/cris/arch-v32/lib/hw_settings.S)12
-rw-r--r--arch/cris/arch-v32/mach-fs/io.c191
-rw-r--r--arch/cris/arch-v32/mach-fs/pinmux.c309
-rw-r--r--arch/cris/arch-v32/mach-fs/vcs_hook.c100
-rw-r--r--arch/cris/arch-v32/mach-fs/vcs_hook.h (renamed from arch/cris/arch-v32/kernel/vcs_hook.h)8
-rw-r--r--arch/cris/arch-v32/mm/Makefile3
-rw-r--r--arch/cris/arch-v32/mm/init.c8
-rw-r--r--arch/cris/arch-v32/mm/intmem.c48
-rw-r--r--arch/cris/arch-v32/mm/l2cache.c29
-rw-r--r--arch/cris/arch-v32/mm/mmu.S93
-rw-r--r--arch/cris/arch-v32/mm/tlb.c56
-rw-r--r--arch/cris/arch-v32/vmlinux.lds.S74
-rw-r--r--arch/cris/artpec_3_defconfig582
-rw-r--r--arch/cris/defconfig795
-rw-r--r--arch/cris/etraxfs_defconfig585
-rw-r--r--arch/cris/kernel/module.c14
-rw-r--r--arch/cris/kernel/process.c103
-rw-r--r--arch/cris/kernel/ptrace.c58
-rw-r--r--arch/cris/kernel/semaphore.c1
-rw-r--r--arch/cris/kernel/setup.c29
-rw-r--r--arch/cris/kernel/time.c13
-rw-r--r--arch/cris/kernel/traps.c226
-rw-r--r--arch/cris/mm/fault.c169
-rw-r--r--arch/cris/mm/init.c111
-rw-r--r--arch/frv/Kconfig4
-rw-r--r--arch/frv/kernel/setup.c2
-rw-r--r--arch/frv/mm/pgalloc.c8
-rw-r--r--arch/h8300/Kconfig7
-rw-r--r--arch/h8300/kernel/setup.c2
-rw-r--r--arch/ia64/kernel/time.c14
-rw-r--r--arch/m32r/Kconfig7
-rw-r--r--arch/m32r/kernel/setup.c2
-rw-r--r--arch/m68k/Kconfig7
-rw-r--r--arch/m68k/kernel/process.c48
-rw-r--r--arch/m68k/kernel/setup.c2
-rw-r--r--arch/m68k/kernel/traps.c1
-rw-r--r--arch/m68knommu/Kconfig8
-rw-r--r--arch/m68knommu/kernel/setup.c2
-rw-r--r--arch/mips/kernel/i8259.c4
-rw-r--r--arch/mips/kernel/irixelf.c14
-rw-r--r--arch/mips/kernel/irixsig.c16
-rw-r--r--arch/mips/kernel/irq.c5
-rw-r--r--arch/mips/kernel/sysirix.c12
-rw-r--r--arch/mn10300/Kconfig381
-rw-r--r--arch/mn10300/Kconfig.debug135
-rw-r--r--arch/mn10300/Makefile135
-rw-r--r--arch/mn10300/boot/.gitignore1
-rw-r--r--arch/mn10300/boot/Makefile28
-rw-r--r--arch/mn10300/boot/compressed/Makefile22
-rw-r--r--arch/mn10300/boot/compressed/head.S86
-rw-r--r--arch/mn10300/boot/compressed/misc.c429
-rw-r--r--arch/mn10300/boot/compressed/misc.h18
-rw-r--r--arch/mn10300/boot/compressed/vmlinux.lds9
-rw-r--r--arch/mn10300/boot/install.sh67
-rw-r--r--arch/mn10300/boot/tools/build.c190
-rw-r--r--arch/mn10300/configs/asb2303_defconfig558
-rw-r--r--arch/mn10300/kernel/Makefile27
-rw-r--r--arch/mn10300/kernel/asm-offsets.c108
-rw-r--r--arch/mn10300/kernel/entry.S721
-rw-r--r--arch/mn10300/kernel/fpu-low.S197
-rw-r--r--arch/mn10300/kernel/fpu.c223
-rw-r--r--arch/mn10300/kernel/gdb-cache.S105
-rw-r--r--arch/mn10300/kernel/gdb-io-serial-low.S90
-rw-r--r--arch/mn10300/kernel/gdb-io-serial.c155
-rw-r--r--arch/mn10300/kernel/gdb-io-ttysm-low.S93
-rw-r--r--arch/mn10300/kernel/gdb-io-ttysm.c299
-rw-r--r--arch/mn10300/kernel/gdb-low.S115
-rw-r--r--arch/mn10300/kernel/gdb-stub.c1947
-rw-r--r--arch/mn10300/kernel/head.S255
-rw-r--r--arch/mn10300/kernel/init_task.c45
-rw-r--r--arch/mn10300/kernel/internal.h20
-rw-r--r--arch/mn10300/kernel/io.c30
-rw-r--r--arch/mn10300/kernel/irq.c235
-rw-r--r--arch/mn10300/kernel/kernel_execve.S37
-rw-r--r--arch/mn10300/kernel/kprobes.c653
-rw-r--r--arch/mn10300/kernel/kthread.S31
-rw-r--r--arch/mn10300/kernel/mn10300-debug.c58
-rw-r--r--arch/mn10300/kernel/mn10300-serial-low.S191
-rw-r--r--arch/mn10300/kernel/mn10300-serial.c1480
-rw-r--r--arch/mn10300/kernel/mn10300-serial.h126
-rw-r--r--arch/mn10300/kernel/mn10300-watchdog-low.S59
-rw-r--r--arch/mn10300/kernel/mn10300-watchdog.c183
-rw-r--r--arch/mn10300/kernel/mn10300_ksyms.c37
-rw-r--r--arch/mn10300/kernel/module.c206
-rw-r--r--arch/mn10300/kernel/process.c297
-rw-r--r--arch/mn10300/kernel/profile-low.S72
-rw-r--r--arch/mn10300/kernel/profile.c51
-rw-r--r--arch/mn10300/kernel/ptrace.c379
-rw-r--r--arch/mn10300/kernel/rtc.c173
-rw-r--r--arch/mn10300/kernel/semaphore.c149
-rw-r--r--arch/mn10300/kernel/setup.c298
-rw-r--r--arch/mn10300/kernel/sigframe.h33
-rw-r--r--arch/mn10300/kernel/signal.c564
-rw-r--r--arch/mn10300/kernel/switch_to.S71
-rw-r--r--arch/mn10300/kernel/sys_mn10300.c193
-rw-r--r--arch/mn10300/kernel/time.c129
-rw-r--r--arch/mn10300/kernel/traps.c619
-rw-r--r--arch/mn10300/kernel/vmlinux.lds.S159
-rw-r--r--arch/mn10300/lib/Makefile7
-rw-r--r--arch/mn10300/lib/__ashldi3.S51
-rw-r--r--arch/mn10300/lib/__ashrdi3.S52
-rw-r--r--arch/mn10300/lib/__lshrdi3.S52
-rw-r--r--arch/mn10300/lib/ashrdi3.c61
-rw-r--r--arch/mn10300/lib/bitops.c51
-rw-r--r--arch/mn10300/lib/checksum.c99
-rw-r--r--arch/mn10300/lib/delay.c50
-rw-r--r--arch/mn10300/lib/do_csum.S162
-rw-r--r--arch/mn10300/lib/internal.h15
-rw-r--r--arch/mn10300/lib/lshrdi3.c60
-rw-r--r--arch/mn10300/lib/memcpy.S135
-rw-r--r--arch/mn10300/lib/memmove.S160
-rw-r--r--arch/mn10300/lib/memset.S121
-rw-r--r--arch/mn10300/lib/negdi2.c57
-rw-r--r--arch/mn10300/lib/usercopy.c166
-rw-r--r--arch/mn10300/mm/Makefile14
-rw-r--r--arch/mn10300/mm/cache-flush-mn10300.S192
-rw-r--r--arch/mn10300/mm/cache-mn10300.S289
-rw-r--r--arch/mn10300/mm/cache.c121
-rw-r--r--arch/mn10300/mm/dma-alloc.c56
-rw-r--r--arch/mn10300/mm/extable.c26
-rw-r--r--arch/mn10300/mm/fault.c405
-rw-r--r--arch/mn10300/mm/init.c160
-rw-r--r--arch/mn10300/mm/misalignment.c661
-rw-r--r--arch/mn10300/mm/mmu-context.c80
-rw-r--r--arch/mn10300/mm/pgtable.c197
-rw-r--r--arch/mn10300/mm/tlb-mn10300.S207
-rw-r--r--arch/mn10300/oprofile/Kconfig23
-rw-r--r--arch/mn10300/oprofile/Makefile13
-rw-r--r--arch/mn10300/oprofile/op_model_null.c22
-rw-r--r--arch/mn10300/proc-mn103e010/Makefile5
-rw-r--r--arch/mn10300/proc-mn103e010/proc-init.c75
-rw-r--r--arch/mn10300/unit-asb2303/Makefile6
-rw-r--r--arch/mn10300/unit-asb2303/flash.c100
-rw-r--r--arch/mn10300/unit-asb2303/leds.c52
-rw-r--r--arch/mn10300/unit-asb2303/smc91111.c52
-rw-r--r--arch/mn10300/unit-asb2303/unit-init.c60
-rw-r--r--arch/mn10300/unit-asb2305/Makefile8
-rw-r--r--arch/mn10300/unit-asb2305/leds.c124
-rw-r--r--arch/mn10300/unit-asb2305/pci-asb2305.c303
-rw-r--r--arch/mn10300/unit-asb2305/pci-asb2305.h82
-rw-r--r--arch/mn10300/unit-asb2305/pci-iomap.c31
-rw-r--r--arch/mn10300/unit-asb2305/pci-irq.c51
-rw-r--r--arch/mn10300/unit-asb2305/pci.c545
-rw-r--r--arch/mn10300/unit-asb2305/unit-init.c61
-rw-r--r--arch/parisc/Kconfig3
-rw-r--r--arch/parisc/kernel/setup.c2
-rw-r--r--arch/powerpc/Kconfig6
-rw-r--r--arch/powerpc/mm/mem.c33
-rw-r--r--arch/powerpc/mm/pgtable_32.c14
-rw-r--r--arch/powerpc/platforms/cell/iommu.c48
-rw-r--r--arch/powerpc/platforms/cell/spufs/backing_ops.c6
-rw-r--r--arch/powerpc/platforms/cell/spufs/fault.c12
-rw-r--r--arch/powerpc/platforms/cell/spufs/file.c57
-rw-r--r--arch/powerpc/platforms/cell/spufs/inode.c3
-rw-r--r--arch/powerpc/platforms/cell/spufs/run.c21
-rw-r--r--arch/powerpc/platforms/cell/spufs/spufs.h5
-rw-r--r--arch/powerpc/platforms/powermac/feature.c11
-rw-r--r--arch/ppc/kernel/setup.c2
-rw-r--r--arch/ppc/mm/pgtable.c9
-rw-r--r--arch/s390/kernel/traps.c24
-rw-r--r--arch/s390/mm/pgtable.c2
-rw-r--r--arch/sh/Kconfig3
-rw-r--r--arch/sh/kernel/cpu/sh4/sq.c2
-rw-r--r--arch/sparc/Kconfig7
-rw-r--r--arch/sparc/kernel/process.c33
-rw-r--r--arch/sparc/kernel/setup.c1
-rw-r--r--arch/sparc/kernel/sparc_ksyms.c3
-rw-r--r--arch/sparc/mm/loadmmu.c1
-rw-r--r--arch/sparc/mm/srmmu.c11
-rw-r--r--arch/sparc/mm/sun4c.c14
-rw-r--r--arch/sparc64/Kconfig13
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-rw-r--r--arch/sparc64/kernel/binfmt_aout32.c3
-rw-r--r--arch/sparc64/kernel/binfmt_elf32.c136
-rw-r--r--arch/sparc64/kernel/irq.c2
-rw-r--r--arch/sparc64/kernel/process.c12
-rw-r--r--arch/sparc64/kernel/ptrace.c266
-rw-r--r--arch/sparc64/kernel/setup.c1
-rw-r--r--arch/sparc64/kernel/sparc64_ksyms.c1
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-rw-r--r--lib/vsprintf.c123
-rw-r--r--mm/filemap.c20
-rw-r--r--mm/filemap_xip.c3
-rw-r--r--mm/hugetlb.c10
-rw-r--r--mm/memory.c32
-rw-r--r--mm/page_alloc.c2
-rw-r--r--mm/shmem.c198
-rw-r--r--mm/vmalloc.c2
-rw-r--r--net/Kconfig2
-rw-r--r--net/can/af_can.c45
-rw-r--r--net/can/raw.c24
-rw-r--r--net/core/flow.c6
-rw-r--r--net/decnet/dn_route.c2
-rw-r--r--net/ipv4/netfilter/nf_nat_core.c6
-rw-r--r--net/ipv4/route.c2
-rw-r--r--net/iucv/af_iucv.c27
-rw-r--r--net/iucv/iucv.c4
-rw-r--r--net/netfilter/nf_conntrack_extend.c3
-rw-r--r--net/netfilter/nf_conntrack_proto_tcp.c32
-rw-r--r--net/netfilter/xt_iprange.c3
-rw-r--r--net/sched/em_meta.c10
-rw-r--r--net/tipc/addr.h5
-rw-r--r--net/tipc/bcast.h13
-rw-r--r--net/tipc/msg.h5
-rw-r--r--net/tipc/socket.c14
-rw-r--r--net/xfrm/xfrm_algo.c17
-rwxr-xr-xscripts/checkpatch.pl500
-rw-r--r--sound/oss/swarm_cs4297a.c4
-rw-r--r--sound/oss/trident.c4
-rw-r--r--virt/kvm/kvm_main.c16
1078 files changed, 75155 insertions, 16285 deletions
diff --git a/Documentation/ABI/testing/procfs-diskstats b/Documentation/ABI/testing/procfs-diskstats
new file mode 100644
index 000000000000..99233902e09e
--- /dev/null
+++ b/Documentation/ABI/testing/procfs-diskstats
@@ -0,0 +1,22 @@
1What: /proc/diskstats
2Date: February 2008
3Contact: Jerome Marchand <jmarchan@redhat.com>
4Description:
5 The /proc/diskstats file displays the I/O statistics
6 of block devices. Each line contains the following 14
7 fields:
8 1 - major number
9 2 - minor mumber
10 3 - device name
11 4 - reads completed succesfully
12 5 - reads merged
13 6 - sectors read
14 7 - time spent reading (ms)
15 8 - writes completed
16 9 - writes merged
17 10 - sectors written
18 11 - time spent writing (ms)
19 12 - I/Os currently in progress
20 13 - time spent doing I/Os (ms)
21 14 - weighted time spent doing I/Os (ms)
22 For more details refer to Documentation/iostats.txt
diff --git a/Documentation/ABI/testing/sysfs-block b/Documentation/ABI/testing/sysfs-block
new file mode 100644
index 000000000000..4bd9ea539129
--- /dev/null
+++ b/Documentation/ABI/testing/sysfs-block
@@ -0,0 +1,28 @@
1What: /sys/block/<disk>/stat
2Date: February 2008
3Contact: Jerome Marchand <jmarchan@redhat.com>
4Description:
5 The /sys/block/<disk>/stat files displays the I/O
6 statistics of disk <disk>. They contain 11 fields:
7 1 - reads completed succesfully
8 2 - reads merged
9 3 - sectors read
10 4 - time spent reading (ms)
11 5 - writes completed
12 6 - writes merged
13 7 - sectors written
14 8 - time spent writing (ms)
15 9 - I/Os currently in progress
16 10 - time spent doing I/Os (ms)
17 11 - weighted time spent doing I/Os (ms)
18 For more details refer Documentation/iostats.txt
19
20
21What: /sys/block/<disk>/<part>/stat
22Date: February 2008
23Contact: Jerome Marchand <jmarchan@redhat.com>
24Description:
25 The /sys/block/<disk>/<part>/stat files display the
26 I/O statistics of partition <part>. The format is the
27 same as the above-written /sys/block/<disk>/stat
28 format.
diff --git a/Documentation/accounting/getdelays.c b/Documentation/accounting/getdelays.c
index d6cb1a86fd61..40121b5cca14 100644
--- a/Documentation/accounting/getdelays.c
+++ b/Documentation/accounting/getdelays.c
@@ -168,7 +168,7 @@ int get_family_id(int sd)
168 char buf[256]; 168 char buf[256];
169 } ans; 169 } ans;
170 170
171 int id, rc; 171 int id = 0, rc;
172 struct nlattr *na; 172 struct nlattr *na;
173 int rep_len; 173 int rep_len;
174 174
@@ -209,7 +209,7 @@ void print_delayacct(struct taskstats *t)
209void task_context_switch_counts(struct taskstats *t) 209void task_context_switch_counts(struct taskstats *t)
210{ 210{
211 printf("\n\nTask %15s%15s\n" 211 printf("\n\nTask %15s%15s\n"
212 " %15lu%15lu\n", 212 " %15llu%15llu\n",
213 "voluntary", "nonvoluntary", 213 "voluntary", "nonvoluntary",
214 t->nvcsw, t->nivcsw); 214 t->nvcsw, t->nivcsw);
215} 215}
@@ -399,7 +399,7 @@ int main(int argc, char *argv[])
399 goto done; 399 goto done;
400 } 400 }
401 401
402 PRINTF("nlmsghdr size=%d, nlmsg_len=%d, rep_len=%d\n", 402 PRINTF("nlmsghdr size=%zu, nlmsg_len=%d, rep_len=%d\n",
403 sizeof(struct nlmsghdr), msg.n.nlmsg_len, rep_len); 403 sizeof(struct nlmsghdr), msg.n.nlmsg_len, rep_len);
404 404
405 405
diff --git a/Documentation/aoe/mkdevs.sh b/Documentation/aoe/mkdevs.sh
index 97374aacacb2..44c0ab702432 100644
--- a/Documentation/aoe/mkdevs.sh
+++ b/Documentation/aoe/mkdevs.sh
@@ -29,6 +29,8 @@ rm -f $dir/interfaces
29mknod -m 0200 $dir/interfaces c $MAJOR 4 29mknod -m 0200 $dir/interfaces c $MAJOR 4
30rm -f $dir/revalidate 30rm -f $dir/revalidate
31mknod -m 0200 $dir/revalidate c $MAJOR 5 31mknod -m 0200 $dir/revalidate c $MAJOR 5
32rm -f $dir/flush
33mknod -m 0200 $dir/flush c $MAJOR 6
32 34
33export n_partitions 35export n_partitions
34mkshelf=`echo $0 | sed 's!mkdevs!mkshelf!'` 36mkshelf=`echo $0 | sed 's!mkdevs!mkshelf!'`
diff --git a/Documentation/aoe/udev-install.sh b/Documentation/aoe/udev-install.sh
index 6449911c6a71..15e86f58c036 100644
--- a/Documentation/aoe/udev-install.sh
+++ b/Documentation/aoe/udev-install.sh
@@ -23,7 +23,10 @@ fi
23# /etc/udev/rules.d 23# /etc/udev/rules.d
24# 24#
25rules_d="`sed -n '/^udev_rules=/{ s!udev_rules=!!; s!\"!!g; p; }' $conf`" 25rules_d="`sed -n '/^udev_rules=/{ s!udev_rules=!!; s!\"!!g; p; }' $conf`"
26if test -z "$rules_d" || test ! -d "$rules_d"; then 26if test -z "$rules_d" ; then
27 rules_d=/etc/udev/rules.d
28fi
29if test ! -d "$rules_d"; then
27 echo "$me Error: cannot find udev rules directory" 1>&2 30 echo "$me Error: cannot find udev rules directory" 1>&2
28 exit 1 31 exit 1
29fi 32fi
diff --git a/Documentation/aoe/udev.txt b/Documentation/aoe/udev.txt
index a7ed1dc4f331..8686e789542e 100644
--- a/Documentation/aoe/udev.txt
+++ b/Documentation/aoe/udev.txt
@@ -1,6 +1,7 @@
1# These rules tell udev what device nodes to create for aoe support. 1# These rules tell udev what device nodes to create for aoe support.
2# They may be installed along the following lines (adjusted to what 2# They may be installed along the following lines. Check the section
3# you see on your system). 3# 8 udev manpage to see whether your udev supports SUBSYSTEM, and
4# whether it uses one or two equal signs for SUBSYSTEM and KERNEL.
4# 5#
5# ecashin@makki ~$ su 6# ecashin@makki ~$ su
6# Password: 7# Password:
@@ -15,10 +16,11 @@
15# 16#
16 17
17# aoe char devices 18# aoe char devices
18SUBSYSTEM="aoe", KERNEL="discover", NAME="etherd/%k", GROUP="disk", MODE="0220" 19SUBSYSTEM=="aoe", KERNEL=="discover", NAME="etherd/%k", GROUP="disk", MODE="0220"
19SUBSYSTEM="aoe", KERNEL="err", NAME="etherd/%k", GROUP="disk", MODE="0440" 20SUBSYSTEM=="aoe", KERNEL=="err", NAME="etherd/%k", GROUP="disk", MODE="0440"
20SUBSYSTEM="aoe", KERNEL="interfaces", NAME="etherd/%k", GROUP="disk", MODE="0220" 21SUBSYSTEM=="aoe", KERNEL=="interfaces", NAME="etherd/%k", GROUP="disk", MODE="0220"
21SUBSYSTEM="aoe", KERNEL="revalidate", NAME="etherd/%k", GROUP="disk", MODE="0220" 22SUBSYSTEM=="aoe", KERNEL=="revalidate", NAME="etherd/%k", GROUP="disk", MODE="0220"
23SUBSYSTEM=="aoe", KERNEL=="flush", NAME="etherd/%k", GROUP="disk", MODE="0220"
22 24
23# aoe block devices 25# aoe block devices
24KERNEL="etherd*", NAME="%k", GROUP="disk" 26KERNEL=="etherd*", NAME="%k", GROUP="disk"
diff --git a/Documentation/feature-removal-schedule.txt b/Documentation/feature-removal-schedule.txt
index 17b1659bd3f8..ce9503c892b5 100644
--- a/Documentation/feature-removal-schedule.txt
+++ b/Documentation/feature-removal-schedule.txt
@@ -99,17 +99,6 @@ Who: Eric Biederman <ebiederm@xmission.com>
99 99
100--------------------------- 100---------------------------
101 101
102What: a.out interpreter support for ELF executables
103When: 2.6.25
104Files: fs/binfmt_elf.c
105Why: Using a.out interpreters for ELF executables was a feature for
106 transition from a.out to ELF. But now it is unlikely to be still
107 needed anymore and removing it would simplify the hairy ELF
108 loader code.
109Who: Andi Kleen <ak@suse.de>
110
111---------------------------
112
113What: remove EXPORT_SYMBOL(kernel_thread) 102What: remove EXPORT_SYMBOL(kernel_thread)
114When: August 2006 103When: August 2006
115Files: arch/*/kernel/*_ksyms.c 104Files: arch/*/kernel/*_ksyms.c
@@ -192,14 +181,6 @@ Who: Len Brown <len.brown@intel.com>
192 181
193--------------------------- 182---------------------------
194 183
195What: 'time' kernel boot parameter
196When: January 2008
197Why: replaced by 'printk.time=<value>' so that printk timestamps can be
198 enabled or disabled as needed
199Who: Randy Dunlap <randy.dunlap@oracle.com>
200
201---------------------------
202
203What: libata spindown skipping and warning 184What: libata spindown skipping and warning
204When: Dec 2008 185When: Dec 2008
205Why: Some halt(8) implementations synchronize caches for and spin 186Why: Some halt(8) implementations synchronize caches for and spin
diff --git a/Documentation/filesystems/isofs.txt b/Documentation/filesystems/isofs.txt
index 758e50401c16..6973b980ca2a 100644
--- a/Documentation/filesystems/isofs.txt
+++ b/Documentation/filesystems/isofs.txt
@@ -24,6 +24,7 @@ Mount options unique to the isofs filesystem.
24 map=normal Map non-Rock Ridge filenames to lower case 24 map=normal Map non-Rock Ridge filenames to lower case
25 map=acorn As map=normal but also apply Acorn extensions if present 25 map=acorn As map=normal but also apply Acorn extensions if present
26 mode=xxx Sets the permissions on files to xxx 26 mode=xxx Sets the permissions on files to xxx
27 dmode=xxx Sets the permissions on directories to xxx
27 nojoliet Ignore Joliet extensions if they are present. 28 nojoliet Ignore Joliet extensions if they are present.
28 norock Ignore Rock Ridge extensions if they are present. 29 norock Ignore Rock Ridge extensions if they are present.
29 hide Completely strip hidden files from the file system. 30 hide Completely strip hidden files from the file system.
diff --git a/Documentation/filesystems/vfs.txt b/Documentation/filesystems/vfs.txt
index bd55038b56f5..81e5be6e6e35 100644
--- a/Documentation/filesystems/vfs.txt
+++ b/Documentation/filesystems/vfs.txt
@@ -151,7 +151,7 @@ The get_sb() method has the following arguments:
151 const char *dev_name: the device name we are mounting. 151 const char *dev_name: the device name we are mounting.
152 152
153 void *data: arbitrary mount options, usually comes as an ASCII 153 void *data: arbitrary mount options, usually comes as an ASCII
154 string 154 string (see "Mount Options" section)
155 155
156 struct vfsmount *mnt: a vfs-internal representation of a mount point 156 struct vfsmount *mnt: a vfs-internal representation of a mount point
157 157
@@ -182,7 +182,7 @@ A fill_super() method implementation has the following arguments:
182 must initialize this properly. 182 must initialize this properly.
183 183
184 void *data: arbitrary mount options, usually comes as an ASCII 184 void *data: arbitrary mount options, usually comes as an ASCII
185 string 185 string (see "Mount Options" section)
186 186
187 int silent: whether or not to be silent on error 187 int silent: whether or not to be silent on error
188 188
@@ -291,7 +291,8 @@ or bottom half).
291 291
292 umount_begin: called when the VFS is unmounting a filesystem. 292 umount_begin: called when the VFS is unmounting a filesystem.
293 293
294 show_options: called by the VFS to show mount options for /proc/<pid>/mounts. 294 show_options: called by the VFS to show mount options for
295 /proc/<pid>/mounts. (see "Mount Options" section)
295 296
296 quota_read: called by the VFS to read from filesystem quota file. 297 quota_read: called by the VFS to read from filesystem quota file.
297 298
@@ -969,6 +970,49 @@ manipulate dentries:
969For further information on dentry locking, please refer to the document 970For further information on dentry locking, please refer to the document
970Documentation/filesystems/dentry-locking.txt. 971Documentation/filesystems/dentry-locking.txt.
971 972
973Mount Options
974=============
975
976Parsing options
977---------------
978
979On mount and remount the filesystem is passed a string containing a
980comma separated list of mount options. The options can have either of
981these forms:
982
983 option
984 option=value
985
986The <linux/parser.h> header defines an API that helps parse these
987options. There are plenty of examples on how to use it in existing
988filesystems.
989
990Showing options
991---------------
992
993If a filesystem accepts mount options, it must define show_options()
994to show all the currently active options. The rules are:
995
996 - options MUST be shown which are not default or their values differ
997 from the default
998
999 - options MAY be shown which are enabled by default or have their
1000 default value
1001
1002Options used only internally between a mount helper and the kernel
1003(such as file descriptors), or which only have an effect during the
1004mounting (such as ones controlling the creation of a journal) are exempt
1005from the above rules.
1006
1007The underlying reason for the above rules is to make sure, that a
1008mount can be accurately replicated (e.g. umounting and mounting again)
1009based on the information found in /proc/mounts.
1010
1011A simple method of saving options at mount/remount time and showing
1012them is provided with the save_mount_options() and
1013generic_show_options() helper functions. Please note, that using
1014these may have drawbacks. For more info see header comments for these
1015functions in fs/namespace.c.
972 1016
973Resources 1017Resources
974========= 1018=========
diff --git a/Documentation/iostats.txt b/Documentation/iostats.txt
index b963c3b4afa5..5925c3cd030d 100644
--- a/Documentation/iostats.txt
+++ b/Documentation/iostats.txt
@@ -58,7 +58,7 @@ they should not wrap twice before you notice them.
58Each set of stats only applies to the indicated device; if you want 58Each set of stats only applies to the indicated device; if you want
59system-wide stats you'll have to find all the devices and sum them all up. 59system-wide stats you'll have to find all the devices and sum them all up.
60 60
61Field 1 -- # of reads issued 61Field 1 -- # of reads completed
62 This is the total number of reads completed successfully. 62 This is the total number of reads completed successfully.
63Field 2 -- # of reads merged, field 6 -- # of writes merged 63Field 2 -- # of reads merged, field 6 -- # of writes merged
64 Reads and writes which are adjacent to each other may be merged for 64 Reads and writes which are adjacent to each other may be merged for
@@ -132,6 +132,19 @@ words, the number of reads for partitions is counted slightly before time
132of queuing for partitions, and at completion for whole disks. This is 132of queuing for partitions, and at completion for whole disks. This is
133a subtle distinction that is probably uninteresting for most cases. 133a subtle distinction that is probably uninteresting for most cases.
134 134
135More significant is the error induced by counting the numbers of
136reads/writes before merges for partitions and after for disks. Since a
137typical workload usually contains a lot of successive and adjacent requests,
138the number of reads/writes issued can be several times higher than the
139number of reads/writes completed.
140
141In 2.6.25, the full statistic set is again available for partitions and
142disk and partition statistics are consistent again. Since we still don't
143keep record of the partition-relative address, an operation is attributed to
144the partition which contains the first sector of the request after the
145eventual merges. As requests can be merged across partition, this could lead
146to some (probably insignificant) innacuracy.
147
135Additional notes 148Additional notes
136---------------- 149----------------
137 150
diff --git a/Documentation/kernel-parameters.txt b/Documentation/kernel-parameters.txt
index 0dcbd266b442..a4fc7fc21439 100644
--- a/Documentation/kernel-parameters.txt
+++ b/Documentation/kernel-parameters.txt
@@ -1973,9 +1973,6 @@ and is between 256 and 4096 characters. It is defined in the file
1973 <deci-seconds>: poll all this frequency 1973 <deci-seconds>: poll all this frequency
1974 0: no polling (default) 1974 0: no polling (default)
1975 1975
1976 time Show timing data prefixed to each printk message line
1977 [deprecated, see 'printk.time']
1978
1979 tipar.timeout= [HW,PPT] 1976 tipar.timeout= [HW,PPT]
1980 Set communications timeout in tenths of a second 1977 Set communications timeout in tenths of a second
1981 (default 15). 1978 (default 15).
diff --git a/Documentation/mn10300/ABI.txt b/Documentation/mn10300/ABI.txt
new file mode 100644
index 000000000000..1fef1f06dfd2
--- /dev/null
+++ b/Documentation/mn10300/ABI.txt
@@ -0,0 +1,149 @@
1 =========================
2 MN10300 FUNCTION CALL ABI
3 =========================
4
5=======
6GENERAL
7=======
8
9The MN10300/AM33 kernel runs in little-endian mode; big-endian mode is not
10supported.
11
12The stack grows downwards, and should always be 32-bit aligned. There are
13separate stack pointer registers for userspace and the kernel.
14
15
16================
17ARGUMENT PASSING
18================
19
20The first two arguments (assuming up to 32-bits per argument) to a function are
21passed in the D0 and D1 registers respectively; all other arguments are passed
22on the stack.
23
24If 64-bit arguments are being passed, then they are never split between
25registers and the stack. If the first argument is a 64-bit value, it will be
26passed in D0:D1. If the first argument is not a 64-bit value, but the second
27is, the second will be passed entirely on the stack and D1 will be unused.
28
29Arguments smaller than 32-bits are not coelesced within a register or a stack
30word. For example, two byte-sized arguments will always be passed in separate
31registers or word-sized stack slots.
32
33
34=================
35CALLING FUNCTIONS
36=================
37
38The caller must allocate twelve bytes on the stack for the callee's use before
39it inserts a CALL instruction. The CALL instruction will write into the TOS
40word, but won't actually modify the stack pointer; similarly, the RET
41instruction reads from the TOS word of the stack, but doesn't move the stack
42pointer beyond it.
43
44
45 Stack:
46 | |
47 | |
48 |---------------| SP+20
49 | 4th Arg |
50 |---------------| SP+16
51 | 3rd Arg |
52 |---------------| SP+12
53 | D1 Save Slot |
54 |---------------| SP+8
55 | D0 Save Slot |
56 |---------------| SP+4
57 | Return Addr |
58 |---------------| SP
59 | |
60 | |
61
62
63The caller must leave space on the stack (hence an allocation of twelve bytes)
64in which the callee may store the first two arguments.
65
66
67============
68RETURN VALUE
69============
70
71The return value is passed in D0 for an integer (or D0:D1 for a 64-bit value),
72or A0 for a pointer.
73
74If the return value is a value larger than 64-bits, or is a structure or an
75array, then a hidden first argument will be passed to the callee by the caller:
76this will point to a piece of memory large enough to hold the result of the
77function. In this case, the callee will return the value in that piece of
78memory, and no value will be returned in D0 or A0.
79
80
81===================
82REGISTER CLOBBERING
83===================
84
85The values in certain registers may be clobbered by the callee, and other
86values must be saved:
87
88 Clobber: D0-D1, A0-A1, E0-E3
89 Save: D2-D3, A2-A3, E4-E7, SP
90
91All other non-supervisor-only registers are clobberable (such as MDR, MCRL,
92MCRH).
93
94
95=================
96SPECIAL REGISTERS
97=================
98
99Certain ordinary registers may carry special usage for the compiler:
100
101 A3: Frame pointer
102 E2: TLS pointer
103
104
105==========
106KERNEL ABI
107==========
108
109The kernel may use a slightly different ABI internally.
110
111 (*) E2
112
113 If CONFIG_MN10300_CURRENT_IN_E2 is defined, then the current task pointer
114 will be kept in the E2 register, and that register will be marked
115 unavailable for the compiler to use as a scratch register.
116
117 Normally the kernel uses something like:
118
119 MOV SP,An
120 AND 0xFFFFE000,An
121 MOV (An),Rm // Rm holds current
122 MOV (yyy,Rm) // Access current->yyy
123
124 To find the address of current; but since this option permits current to
125 be carried globally in an register, it can use:
126
127 MOV (yyy,E2) // Access current->yyy
128
129 instead.
130
131
132===============
133SYSTEM CALL ABI
134===============
135
136System calls are called with the following convention:
137
138 REGISTER ENTRY EXIT
139 =============== ======================= =======================
140 D0 Syscall number Return value
141 A0 1st syscall argument Saved
142 D1 2nd syscall argument Saved
143 A3 3rd syscall argument Saved
144 A2 4th syscall argument Saved
145 D3 5th syscall argument Saved
146 D2 6th syscall argument Saved
147
148All other registers are saved. The layout is a consequence of the way the MOVM
149instruction stores registers onto the stack.
diff --git a/Documentation/mn10300/compartmentalisation.txt b/Documentation/mn10300/compartmentalisation.txt
new file mode 100644
index 000000000000..8958b51dac4b
--- /dev/null
+++ b/Documentation/mn10300/compartmentalisation.txt
@@ -0,0 +1,60 @@
1 =========================================
2 PART-SPECIFIC SOURCE COMPARTMENTALISATION
3 =========================================
4
5The sources for various parts are compartmentalised at two different levels:
6
7 (1) Processor level
8
9 The "processor level" is a CPU core plus the other on-silicon
10 peripherals.
11
12 Processor-specific header files are divided among directories in a similar
13 way to the CPU level:
14
15 (*) include/asm-mn10300/proc-mn103e010/
16
17 Support for the AM33v2 CPU core.
18
19 The appropriate processor is selected by a CONFIG_MN10300_PROC_YYYY option
20 from the "Processor support" choice menu in the arch/mn10300/Kconfig file.
21
22
23 (2) Unit level
24
25 The "unit level" is a processor plus all the external peripherals
26 controlled by that processor.
27
28 Unit-specific header files are divided among directories in a similar way
29 to the CPU level; not only that, but specific sources may also be
30 segregated into separate directories under the arch directory:
31
32 (*) include/asm-mn10300/unit-asb2303/
33 (*) arch/mn10300/unit-asb2303/
34
35 Support for the ASB2303 board with an ASB2308 daughter board.
36
37 (*) include/asm-mn10300/unit-asb2305/
38 (*) arch/mn10300/unit-asb2305/
39
40 Support for the ASB2305 board.
41
42 The appropriate processor is selected by a CONFIG_MN10300_UNIT_ZZZZ option
43 from the "Unit type" choice menu in the arch/mn10300/Kconfig file.
44
45
46============
47COMPILE TIME
48============
49
50When the kernel is compiled, symbolic links will be made in the asm header file
51directory for this arch:
52
53 include/asm-mn10300/proc => include/asm-mn10300/proc-YYYY/
54 include/asm-mn10300/unit => include/asm-mn10300/unit-ZZZZ/
55
56So that the header files contained in those directories can be accessed without
57lots of #ifdef-age.
58
59The appropriate arch/mn10300/unit-ZZZZ directory will also be entered by the
60compilation process; all other unit-specific directories will be ignored.
diff --git a/Documentation/thermal/sysfs-api.txt b/Documentation/thermal/sysfs-api.txt
index 5776e090359d..ba9c2da5a8c2 100644
--- a/Documentation/thermal/sysfs-api.txt
+++ b/Documentation/thermal/sysfs-api.txt
@@ -14,7 +14,7 @@ The generic thermal sysfs provides a set of interfaces for thermal zone devices
14and thermal cooling devices (fan, processor...) to register with the thermal management 14and thermal cooling devices (fan, processor...) to register with the thermal management
15solution and to be a part of it. 15solution and to be a part of it.
16 16
17This how-to focusses on enabling new thermal zone and cooling devices to participate 17This how-to focuses on enabling new thermal zone and cooling devices to participate
18in thermal management. 18in thermal management.
19This solution is platform independent and any type of thermal zone devices and 19This solution is platform independent and any type of thermal zone devices and
20cooling devices should be able to make use of the infrastructure. 20cooling devices should be able to make use of the infrastructure.
@@ -41,9 +41,9 @@ and throttle appropriate devices.
41 name: the thermal zone name. 41 name: the thermal zone name.
42 trips: the total number of trip points this thermal zone supports. 42 trips: the total number of trip points this thermal zone supports.
43 devdata: device private data 43 devdata: device private data
44 ops: thermal zone device callbacks. 44 ops: thermal zone device call-backs.
45 .bind: bind the thermal zone device with a thermal cooling device. 45 .bind: bind the thermal zone device with a thermal cooling device.
46 .unbind: unbing the thermal zone device with a thermal cooling device. 46 .unbind: unbind the thermal zone device with a thermal cooling device.
47 .get_temp: get the current temperature of the thermal zone. 47 .get_temp: get the current temperature of the thermal zone.
48 .get_mode: get the current mode (user/kernel) of the thermal zone. 48 .get_mode: get the current mode (user/kernel) of the thermal zone.
49 "kernel" means thermal management is done in kernel. 49 "kernel" means thermal management is done in kernel.
@@ -69,7 +69,7 @@ and throttle appropriate devices.
69 It tries to bind itself to all the thermal zone devices register at the same time. 69 It tries to bind itself to all the thermal zone devices register at the same time.
70 name: the cooling device name. 70 name: the cooling device name.
71 devdata: device private data. 71 devdata: device private data.
72 ops: thermal cooling devices callbacks. 72 ops: thermal cooling devices call-backs.
73 .get_max_state: get the Maximum throttle state of the cooling device. 73 .get_max_state: get the Maximum throttle state of the cooling device.
74 .get_cur_state: get the Current throttle state of the cooling device. 74 .get_cur_state: get the Current throttle state of the cooling device.
75 .set_cur_state: set the Current throttle state of the cooling device. 75 .set_cur_state: set the Current throttle state of the cooling device.
@@ -109,7 +109,6 @@ RO read only value
109RW read/write value 109RW read/write value
110 110
111All thermal sysfs attributes will be represented under /sys/class/thermal 111All thermal sysfs attributes will be represented under /sys/class/thermal
112/sys/class/thermal/
113 112
114Thermal zone device sys I/F, created once it's registered: 113Thermal zone device sys I/F, created once it's registered:
115|thermal_zone[0-*]: 114|thermal_zone[0-*]:
@@ -129,7 +128,7 @@ Thermal cooling device sys I/F, created once it's registered:
129These two dynamic attributes are created/removed in pairs. 128These two dynamic attributes are created/removed in pairs.
130They represent the relationship between a thermal zone and its associated cooling device. 129They represent the relationship between a thermal zone and its associated cooling device.
131They are created/removed for each 130They are created/removed for each
132thermal_zone_bind_cooling_device/thermal_zone_unbind_cooling_device successful exection. 131thermal_zone_bind_cooling_device/thermal_zone_unbind_cooling_device successful execution.
133 132
134|thermal_zone[0-*] 133|thermal_zone[0-*]
135 |-----cdev[0-*]: The [0-*]th cooling device in the current thermal zone 134 |-----cdev[0-*]: The [0-*]th cooling device in the current thermal zone
@@ -147,11 +146,11 @@ type Strings which represent the thermal zone type.
147 Optional 146 Optional
148 147
149temp Current temperature as reported by thermal zone (sensor) 148temp Current temperature as reported by thermal zone (sensor)
150 Unit: degree celsius 149 Unit: degree Celsius
151 RO 150 RO
152 Required 151 Required
153 152
154mode One of the predifned values in [kernel, user] 153mode One of the predefined values in [kernel, user]
155 This file gives information about the algorithm 154 This file gives information about the algorithm
156 that is currently managing the thermal zone. 155 that is currently managing the thermal zone.
157 It can be either default kernel based algorithm 156 It can be either default kernel based algorithm
@@ -164,12 +163,12 @@ mode One of the predifned values in [kernel, user]
164 charge of the thermal management. 163 charge of the thermal management.
165 164
166trip_point_[0-*]_temp The temperature above which trip point will be fired 165trip_point_[0-*]_temp The temperature above which trip point will be fired
167 Unit: degree celsius 166 Unit: degree Celsius
168 RO 167 RO
169 Optional 168 Optional
170 169
171trip_point_[0-*]_type Strings which indicate the type of the trip point 170trip_point_[0-*]_type Strings which indicate the type of the trip point
172 Eg. it can be one of critical, hot, passive, 171 E.g. it can be one of critical, hot, passive,
173 active[0-*] for ACPI thermal zone. 172 active[0-*] for ACPI thermal zone.
174 RO 173 RO
175 Optional 174 Optional
@@ -179,7 +178,7 @@ cdev[0-*] Sysfs link to the thermal cooling device node where the sys I/F
179 RO 178 RO
180 Optional 179 Optional
181 180
182cdev[0-*]_trip_point The trip point with which cdev[0-*] is assocated in this thermal zone 181cdev[0-*]_trip_point The trip point with which cdev[0-*] is associated in this thermal zone
183 -1 means the cooling device is not associated with any trip point. 182 -1 means the cooling device is not associated with any trip point.
184 RO 183 RO
185 Optional 184 Optional
@@ -211,7 +210,7 @@ cur_state The current cooling state of this cooling device.
211 210
212ACPI thermal zone may support multiple trip points like critical/hot/passive/active. 211ACPI thermal zone may support multiple trip points like critical/hot/passive/active.
213If an ACPI thermal zone supports critical, passive, active[0] and active[1] at the same time, 212If an ACPI thermal zone supports critical, passive, active[0] and active[1] at the same time,
214it may register itself as a thermale_zone_device (thermal_zone1) with 4 trip points in all. 213it may register itself as a thermal_zone_device (thermal_zone1) with 4 trip points in all.
215It has one processor and one fan, which are both registered as thermal_cooling_device. 214It has one processor and one fan, which are both registered as thermal_cooling_device.
216If the processor is listed in _PSL method, and the fan is listed in _AL0 method, 215If the processor is listed in _PSL method, and the fan is listed in _AL0 method,
217the sys I/F structure will be built like this: 216the sys I/F structure will be built like this:
diff --git a/MAINTAINERS b/MAINTAINERS
index 2cdb591ac080..0d6f5119a6da 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -688,6 +688,12 @@ W: http://www.atmel.com/products/AT91/
688W: http://www.at91.com/ 688W: http://www.at91.com/
689S: Maintained 689S: Maintained
690 690
691ATMEL AT91 / AT32 SERIAL DRIVER
692P: Haavard Skinnemoen
693M: hskinnemoen@atmel.com
694L: linux-kernel@vger.kernel.org
695S: Supported
696
691ATMEL LCDFB DRIVER 697ATMEL LCDFB DRIVER
692P: Nicolas Ferre 698P: Nicolas Ferre
693M: nicolas.ferre@atmel.com 699M: nicolas.ferre@atmel.com
@@ -1167,6 +1173,8 @@ S: Orphan
1167CRIS PORT 1173CRIS PORT
1168P: Mikael Starvik 1174P: Mikael Starvik
1169M: starvik@axis.com 1175M: starvik@axis.com
1176P: Jesper Nilsson
1177M: jesper.nilsson@axis.com
1170L: dev-etrax@axis.com 1178L: dev-etrax@axis.com
1171W: http://developer.axis.com 1179W: http://developer.axis.com
1172S: Maintained 1180S: Maintained
@@ -2614,6 +2622,15 @@ L: linux-kernel@vger.kernel.org
2614W: http://www.linux-mm.org 2622W: http://www.linux-mm.org
2615S: Maintained 2623S: Maintained
2616 2624
2625MEI MN10300/AM33 PORT
2626P: David Howells
2627M: dhowells@redhat.com
2628P: Koichi Yasutake
2629M: yasutake.koichi@jp.panasonic.com
2630L: linux-am33-list@redhat.com
2631W: ftp://ftp.redhat.com/pub/redhat/gnupro/AM33/
2632S: Maintained
2633
2617MEMORY TECHNOLOGY DEVICES (MTD) 2634MEMORY TECHNOLOGY DEVICES (MTD)
2618P: David Woodhouse 2635P: David Woodhouse
2619M: dwmw2@infradead.org 2636M: dwmw2@infradead.org
@@ -3245,6 +3262,11 @@ W: http://rt2x00.serialmonkey.com/
3245S: Maintained 3262S: Maintained
3246F: drivers/net/wireless/rt2x00/ 3263F: drivers/net/wireless/rt2x00/
3247 3264
3265RAMDISK RAM BLOCK DEVICE DRIVER
3266P: Nick Piggin
3267M: npiggin@suse.de
3268S: Maintained
3269
3248RANDOM NUMBER DRIVER 3270RANDOM NUMBER DRIVER
3249P: Matt Mackall 3271P: Matt Mackall
3250M: mpm@selenic.com 3272M: mpm@selenic.com
@@ -3881,8 +3903,8 @@ L: linux-scsi@vger.kernel.org
3881S: Maintained 3903S: Maintained
3882 3904
3883UDF FILESYSTEM 3905UDF FILESYSTEM
3884P: Ben Fennema 3906P: Jan Kara
3885M: bfennema@falcon.csc.calpoly.edu 3907M: jack@suse.cz
3886W: http://linux-udf.sourceforge.net 3908W: http://linux-udf.sourceforge.net
3887S: Maintained 3909S: Maintained
3888 3910
diff --git a/arch/alpha/Kconfig b/arch/alpha/Kconfig
index 01b10ab588a6..5b7dcd5a0e75 100644
--- a/arch/alpha/Kconfig
+++ b/arch/alpha/Kconfig
@@ -67,6 +67,9 @@ config AUTO_IRQ_AFFINITY
67 depends on SMP 67 depends on SMP
68 default y 68 default y
69 69
70config ARCH_SUPPORTS_AOUT
71 def_bool y
72
70source "init/Kconfig" 73source "init/Kconfig"
71 74
72 75
@@ -612,6 +615,11 @@ config VERBOSE_MCHECK_ON
612 615
613 Take the default (1) unless you want more control or more info. 616 Take the default (1) unless you want more control or more info.
614 617
618config HZ
619 int
620 default 1200 if ALPHA_RAWHIDE
621 default 1024
622
615source "drivers/pci/Kconfig" 623source "drivers/pci/Kconfig"
616source "drivers/eisa/Kconfig" 624source "drivers/eisa/Kconfig"
617 625
diff --git a/arch/alpha/kernel/osf_sys.c b/arch/alpha/kernel/osf_sys.c
index 72f9a619a66d..973c5c3705e3 100644
--- a/arch/alpha/kernel/osf_sys.c
+++ b/arch/alpha/kernel/osf_sys.c
@@ -22,7 +22,6 @@
22#include <linux/ptrace.h> 22#include <linux/ptrace.h>
23#include <linux/slab.h> 23#include <linux/slab.h>
24#include <linux/user.h> 24#include <linux/user.h>
25#include <linux/a.out.h>
26#include <linux/utsname.h> 25#include <linux/utsname.h>
27#include <linux/time.h> 26#include <linux/time.h>
28#include <linux/timex.h> 27#include <linux/timex.h>
diff --git a/arch/alpha/kernel/process.c b/arch/alpha/kernel/process.c
index 92b61629fe3f..96ed82fd9eef 100644
--- a/arch/alpha/kernel/process.c
+++ b/arch/alpha/kernel/process.c
@@ -19,7 +19,6 @@
19#include <linux/ptrace.h> 19#include <linux/ptrace.h>
20#include <linux/slab.h> 20#include <linux/slab.h>
21#include <linux/user.h> 21#include <linux/user.h>
22#include <linux/a.out.h>
23#include <linux/utsname.h> 22#include <linux/utsname.h>
24#include <linux/time.h> 23#include <linux/time.h>
25#include <linux/major.h> 24#include <linux/major.h>
@@ -318,68 +317,6 @@ copy_thread(int nr, unsigned long clone_flags, unsigned long usp,
318} 317}
319 318
320/* 319/*
321 * Fill in the user structure for an ECOFF core dump.
322 */
323void
324dump_thread(struct pt_regs * pt, struct user * dump)
325{
326 /* switch stack follows right below pt_regs: */
327 struct switch_stack * sw = ((struct switch_stack *) pt) - 1;
328
329 dump->magic = CMAGIC;
330 dump->start_code = current->mm->start_code;
331 dump->start_data = current->mm->start_data;
332 dump->start_stack = rdusp() & ~(PAGE_SIZE - 1);
333 dump->u_tsize = ((current->mm->end_code - dump->start_code)
334 >> PAGE_SHIFT);
335 dump->u_dsize = ((current->mm->brk + PAGE_SIZE-1 - dump->start_data)
336 >> PAGE_SHIFT);
337 dump->u_ssize = (current->mm->start_stack - dump->start_stack
338 + PAGE_SIZE-1) >> PAGE_SHIFT;
339
340 /*
341 * We store the registers in an order/format that is
342 * compatible with DEC Unix/OSF/1 as this makes life easier
343 * for gdb.
344 */
345 dump->regs[EF_V0] = pt->r0;
346 dump->regs[EF_T0] = pt->r1;
347 dump->regs[EF_T1] = pt->r2;
348 dump->regs[EF_T2] = pt->r3;
349 dump->regs[EF_T3] = pt->r4;
350 dump->regs[EF_T4] = pt->r5;
351 dump->regs[EF_T5] = pt->r6;
352 dump->regs[EF_T6] = pt->r7;
353 dump->regs[EF_T7] = pt->r8;
354 dump->regs[EF_S0] = sw->r9;
355 dump->regs[EF_S1] = sw->r10;
356 dump->regs[EF_S2] = sw->r11;
357 dump->regs[EF_S3] = sw->r12;
358 dump->regs[EF_S4] = sw->r13;
359 dump->regs[EF_S5] = sw->r14;
360 dump->regs[EF_S6] = sw->r15;
361 dump->regs[EF_A3] = pt->r19;
362 dump->regs[EF_A4] = pt->r20;
363 dump->regs[EF_A5] = pt->r21;
364 dump->regs[EF_T8] = pt->r22;
365 dump->regs[EF_T9] = pt->r23;
366 dump->regs[EF_T10] = pt->r24;
367 dump->regs[EF_T11] = pt->r25;
368 dump->regs[EF_RA] = pt->r26;
369 dump->regs[EF_T12] = pt->r27;
370 dump->regs[EF_AT] = pt->r28;
371 dump->regs[EF_SP] = rdusp();
372 dump->regs[EF_PS] = pt->ps;
373 dump->regs[EF_PC] = pt->pc;
374 dump->regs[EF_GP] = pt->gp;
375 dump->regs[EF_A0] = pt->r16;
376 dump->regs[EF_A1] = pt->r17;
377 dump->regs[EF_A2] = pt->r18;
378 memcpy((char *)dump->regs + EF_SIZE, sw->fp, 32 * 8);
379}
380EXPORT_SYMBOL(dump_thread);
381
382/*
383 * Fill in the user structure for a ELF core dump. 320 * Fill in the user structure for a ELF core dump.
384 */ 321 */
385void 322void
diff --git a/arch/alpha/kernel/setup.c b/arch/alpha/kernel/setup.c
index 74c346625658..a449e999027c 100644
--- a/arch/alpha/kernel/setup.c
+++ b/arch/alpha/kernel/setup.c
@@ -18,7 +18,6 @@
18#include <linux/ptrace.h> 18#include <linux/ptrace.h>
19#include <linux/slab.h> 19#include <linux/slab.h>
20#include <linux/user.h> 20#include <linux/user.h>
21#include <linux/a.out.h>
22#include <linux/screen_info.h> 21#include <linux/screen_info.h>
23#include <linux/delay.h> 22#include <linux/delay.h>
24#include <linux/mc146818rtc.h> 23#include <linux/mc146818rtc.h>
@@ -1472,7 +1471,7 @@ c_stop(struct seq_file *f, void *v)
1472{ 1471{
1473} 1472}
1474 1473
1475struct seq_operations cpuinfo_op = { 1474const struct seq_operations cpuinfo_op = {
1476 .start = c_start, 1475 .start = c_start,
1477 .next = c_next, 1476 .next = c_next,
1478 .stop = c_stop, 1477 .stop = c_stop,
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index e19e7744e366..4127af93c5f3 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -126,6 +126,9 @@ config GENERIC_CALIBRATE_DELAY
126 bool 126 bool
127 default y 127 default y
128 128
129config ARCH_SUPPORTS_AOUT
130 def_bool y
131
129config ARCH_MAY_HAVE_PC_FDC 132config ARCH_MAY_HAVE_PC_FDC
130 bool 133 bool
131 134
diff --git a/arch/arm/kernel/process.c b/arch/arm/kernel/process.c
index 4f1a03124a74..46bf2ede6128 100644
--- a/arch/arm/kernel/process.c
+++ b/arch/arm/kernel/process.c
@@ -18,7 +18,6 @@
18#include <linux/unistd.h> 18#include <linux/unistd.h>
19#include <linux/slab.h> 19#include <linux/slab.h>
20#include <linux/user.h> 20#include <linux/user.h>
21#include <linux/a.out.h>
22#include <linux/delay.h> 21#include <linux/delay.h>
23#include <linux/reboot.h> 22#include <linux/reboot.h>
24#include <linux/interrupt.h> 23#include <linux/interrupt.h>
@@ -368,35 +367,6 @@ int dump_fpu (struct pt_regs *regs, struct user_fp *fp)
368EXPORT_SYMBOL(dump_fpu); 367EXPORT_SYMBOL(dump_fpu);
369 368
370/* 369/*
371 * fill in the user structure for a core dump..
372 */
373void dump_thread(struct pt_regs * regs, struct user * dump)
374{
375 struct task_struct *tsk = current;
376
377 dump->magic = CMAGIC;
378 dump->start_code = tsk->mm->start_code;
379 dump->start_stack = regs->ARM_sp & ~(PAGE_SIZE - 1);
380
381 dump->u_tsize = (tsk->mm->end_code - tsk->mm->start_code) >> PAGE_SHIFT;
382 dump->u_dsize = (tsk->mm->brk - tsk->mm->start_data + PAGE_SIZE - 1) >> PAGE_SHIFT;
383 dump->u_ssize = 0;
384
385 dump->u_debugreg[0] = tsk->thread.debug.bp[0].address;
386 dump->u_debugreg[1] = tsk->thread.debug.bp[1].address;
387 dump->u_debugreg[2] = tsk->thread.debug.bp[0].insn.arm;
388 dump->u_debugreg[3] = tsk->thread.debug.bp[1].insn.arm;
389 dump->u_debugreg[4] = tsk->thread.debug.nsaved;
390
391 if (dump->start_stack < 0x04000000)
392 dump->u_ssize = (0x04000000 - dump->start_stack) >> PAGE_SHIFT;
393
394 dump->regs = *regs;
395 dump->u_fpvalid = dump_fpu (regs, &dump->u_fp);
396}
397EXPORT_SYMBOL(dump_thread);
398
399/*
400 * Shuffle the argument into the correct register before calling the 370 * Shuffle the argument into the correct register before calling the
401 * thread function. r1 is the thread argument, r2 is the pointer to 371 * thread function. r1 is the thread argument, r2 is the pointer to
402 * the thread function, and r3 points to the exit function. 372 * the thread function, and r3 points to the exit function.
diff --git a/arch/avr32/kernel/ocd.c b/arch/avr32/kernel/ocd.c
index c4f023294d75..1b0245d4e0ca 100644
--- a/arch/avr32/kernel/ocd.c
+++ b/arch/avr32/kernel/ocd.c
@@ -90,25 +90,29 @@ static struct dentry *ocd_debugfs_DC;
90static struct dentry *ocd_debugfs_DS; 90static struct dentry *ocd_debugfs_DS;
91static struct dentry *ocd_debugfs_count; 91static struct dentry *ocd_debugfs_count;
92 92
93static u64 ocd_DC_get(void *data) 93static int ocd_DC_get(void *data, u64 *val)
94{ 94{
95 return ocd_read(DC); 95 *val = ocd_read(DC);
96 return 0;
96} 97}
97static void ocd_DC_set(void *data, u64 val) 98static int ocd_DC_set(void *data, u64 val)
98{ 99{
99 ocd_write(DC, val); 100 ocd_write(DC, val);
101 return 0;
100} 102}
101DEFINE_SIMPLE_ATTRIBUTE(fops_DC, ocd_DC_get, ocd_DC_set, "0x%08llx\n"); 103DEFINE_SIMPLE_ATTRIBUTE(fops_DC, ocd_DC_get, ocd_DC_set, "0x%08llx\n");
102 104
103static u64 ocd_DS_get(void *data) 105static int ocd_DS_get(void *data, u64 *val)
104{ 106{
105 return ocd_read(DS); 107 *val = ocd_read(DS);
108 return 0;
106} 109}
107DEFINE_SIMPLE_ATTRIBUTE(fops_DS, ocd_DS_get, NULL, "0x%08llx\n"); 110DEFINE_SIMPLE_ATTRIBUTE(fops_DS, ocd_DS_get, NULL, "0x%08llx\n");
108 111
109static u64 ocd_count_get(void *data) 112static int ocd_count_get(void *data, u64 *val)
110{ 113{
111 return ocd_count; 114 *val = ocd_count;
115 return 0;
112} 116}
113DEFINE_SIMPLE_ATTRIBUTE(fops_count, ocd_count_get, NULL, "%lld\n"); 117DEFINE_SIMPLE_ATTRIBUTE(fops_count, ocd_count_get, NULL, "%lld\n");
114 118
diff --git a/arch/avr32/mach-at32ap/at32ap700x.c b/arch/avr32/mach-at32ap/at32ap700x.c
index 14e61f05e1f6..7678fee9a885 100644
--- a/arch/avr32/mach-at32ap/at32ap700x.c
+++ b/arch/avr32/mach-at32ap/at32ap700x.c
@@ -1186,6 +1186,59 @@ err_dup_modedb:
1186#endif 1186#endif
1187 1187
1188/* -------------------------------------------------------------------- 1188/* --------------------------------------------------------------------
1189 * PWM
1190 * -------------------------------------------------------------------- */
1191static struct resource atmel_pwm0_resource[] __initdata = {
1192 PBMEM(0xfff01400),
1193 IRQ(24),
1194};
1195static struct clk atmel_pwm0_mck = {
1196 .name = "mck",
1197 .parent = &pbb_clk,
1198 .mode = pbb_clk_mode,
1199 .get_rate = pbb_clk_get_rate,
1200 .index = 5,
1201};
1202
1203struct platform_device *__init at32_add_device_pwm(u32 mask)
1204{
1205 struct platform_device *pdev;
1206
1207 if (!mask)
1208 return NULL;
1209
1210 pdev = platform_device_alloc("atmel_pwm", 0);
1211 if (!pdev)
1212 return NULL;
1213
1214 if (platform_device_add_resources(pdev, atmel_pwm0_resource,
1215 ARRAY_SIZE(atmel_pwm0_resource)))
1216 goto out_free_pdev;
1217
1218 if (platform_device_add_data(pdev, &mask, sizeof(mask)))
1219 goto out_free_pdev;
1220
1221 if (mask & (1 << 0))
1222 select_peripheral(PA(28), PERIPH_A, 0);
1223 if (mask & (1 << 1))
1224 select_peripheral(PA(29), PERIPH_A, 0);
1225 if (mask & (1 << 2))
1226 select_peripheral(PA(21), PERIPH_B, 0);
1227 if (mask & (1 << 3))
1228 select_peripheral(PA(22), PERIPH_B, 0);
1229
1230 atmel_pwm0_mck.dev = &pdev->dev;
1231
1232 platform_device_add(pdev);
1233
1234 return pdev;
1235
1236out_free_pdev:
1237 platform_device_put(pdev);
1238 return NULL;
1239}
1240
1241/* --------------------------------------------------------------------
1189 * SSC 1242 * SSC
1190 * -------------------------------------------------------------------- */ 1243 * -------------------------------------------------------------------- */
1191static struct resource ssc0_resource[] = { 1244static struct resource ssc0_resource[] = {
@@ -1646,6 +1699,7 @@ struct clk *at32_clock_list[] = {
1646 &atmel_usart1_usart, 1699 &atmel_usart1_usart,
1647 &atmel_usart2_usart, 1700 &atmel_usart2_usart,
1648 &atmel_usart3_usart, 1701 &atmel_usart3_usart,
1702 &atmel_pwm0_mck,
1649#if defined(CONFIG_CPU_AT32AP7000) 1703#if defined(CONFIG_CPU_AT32AP7000)
1650 &macb0_hclk, 1704 &macb0_hclk,
1651 &macb0_pclk, 1705 &macb0_pclk,
diff --git a/arch/blackfin/Kconfig b/arch/blackfin/Kconfig
index ba21e33b8b1f..368bc7fe167e 100644
--- a/arch/blackfin/Kconfig
+++ b/arch/blackfin/Kconfig
@@ -544,7 +544,7 @@ config EXCPT_IRQ_SYSC_L1
544 default y 544 default y
545 help 545 help
546 If enabled, the entire ASM lowlevel exception and interrupt entry code 546 If enabled, the entire ASM lowlevel exception and interrupt entry code
547 (STORE/RESTORE CONTEXT) is linked into L1 instruction memory. 547 (STORE/RESTORE CONTEXT) is linked into L1 instruction memory.
548 (less latency) 548 (less latency)
549 549
550config DO_IRQ_L1 550config DO_IRQ_L1
@@ -904,29 +904,38 @@ config ARCH_SUSPEND_POSSIBLE
904 depends on !SMP 904 depends on !SMP
905 905
906choice 906choice
907 prompt "Select PM Wakeup Event Source" 907 prompt "Default Power Saving Mode"
908 default PM_WAKEUP_GPIO_BY_SIC_IWR
909 depends on PM 908 depends on PM
910 help 909 default PM_BFIN_SLEEP_DEEPER
911 If you have a GPIO already configured as input with the corresponding PORTx_MASK 910config PM_BFIN_SLEEP_DEEPER
912 bit set - "Specify Wakeup Event by SIC_IWR value" 911 bool "Sleep Deeper"
912 help
913 Sleep "Deeper" Mode (High Power Savings) - This mode reduces dynamic
914 power dissipation by disabling the clock to the processor core (CCLK).
915 Furthermore, Standby sets the internal power supply voltage (VDDINT)
916 to 0.85 V to provide the greatest power savings, while preserving the
917 processor state.
918 The PLL and system clock (SCLK) continue to operate at a very low
919 frequency of about 3.3 MHz. To preserve data integrity in the SDRAM,
920 the SDRAM is put into Self Refresh Mode. Typically an external event
921 such as GPIO interrupt or RTC activity wakes up the processor.
922 Various Peripherals such as UART, SPORT, PPI may not function as
923 normal during Sleep Deeper, due to the reduced SCLK frequency.
924 When in the sleep mode, system DMA access to L1 memory is not supported.
925
926config PM_BFIN_SLEEP
927 bool "Sleep"
928 help
929 Sleep Mode (High Power Savings) - The sleep mode reduces power
930 dissipation by disabling the clock to the processor core (CCLK).
931 The PLL and system clock (SCLK), however, continue to operate in
932 this mode. Typically an external event or RTC activity will wake
933 up the processor. When in the sleep mode,
934 system DMA access to L1 memory is not supported.
935endchoice
913 936
914config PM_WAKEUP_GPIO_BY_SIC_IWR
915 bool "Specify Wakeup Event by SIC_IWR value"
916config PM_WAKEUP_BY_GPIO 937config PM_WAKEUP_BY_GPIO
917 bool "Cause Wakeup Event by GPIO" 938 bool "Cause Wakeup Event by GPIO"
918config PM_WAKEUP_GPIO_API
919 bool "Configure Wakeup Event by PM GPIO API"
920
921endchoice
922
923config PM_WAKEUP_SIC_IWR
924 hex "Wakeup Events (SIC_IWR)"
925 depends on PM_WAKEUP_GPIO_BY_SIC_IWR
926 default 0x8 if (BF537 || BF536 || BF534)
927 default 0x80 if (BF533 || BF532 || BF531)
928 default 0x80 if (BF54x)
929 default 0x80 if (BF52x)
930 939
931config PM_WAKEUP_GPIO_NUMBER 940config PM_WAKEUP_GPIO_NUMBER
932 int "Wakeup GPIO number" 941 int "Wakeup GPIO number"
diff --git a/arch/blackfin/Kconfig.debug b/arch/blackfin/Kconfig.debug
index 59b87a483c68..c61bdebb9974 100644
--- a/arch/blackfin/Kconfig.debug
+++ b/arch/blackfin/Kconfig.debug
@@ -164,7 +164,7 @@ config DUAL_CORE_TEST_MODULE
164config CPLB_INFO 164config CPLB_INFO
165 bool "Display the CPLB information" 165 bool "Display the CPLB information"
166 help 166 help
167 Display the CPLB information. 167 Display the CPLB information via /proc/cplbinfo.
168 168
169config ACCESS_CHECK 169config ACCESS_CHECK
170 bool "Check the user pointer address" 170 bool "Check the user pointer address"
diff --git a/arch/blackfin/Makefile b/arch/blackfin/Makefile
index 0edc402fef54..fe254f886a6e 100644
--- a/arch/blackfin/Makefile
+++ b/arch/blackfin/Makefile
@@ -119,6 +119,7 @@ archclean:
119 $(Q)$(MAKE) $(clean)=$(boot) 119 $(Q)$(MAKE) $(clean)=$(boot)
120 120
121 121
122INSTALL_PATH ?= /tftpboot
122boot := arch/$(ARCH)/boot 123boot := arch/$(ARCH)/boot
123BOOT_TARGETS = vmImage 124BOOT_TARGETS = vmImage
124PHONY += $(BOOT_TARGETS) install 125PHONY += $(BOOT_TARGETS) install
diff --git a/arch/blackfin/configs/BF533-STAMP_defconfig b/arch/blackfin/configs/BF533-STAMP_defconfig
index 9b7123cf27a3..198f4123af4b 100644
--- a/arch/blackfin/configs/BF533-STAMP_defconfig
+++ b/arch/blackfin/configs/BF533-STAMP_defconfig
@@ -216,8 +216,6 @@ CONFIG_MEM_SIZE=128
216CONFIG_MEM_ADD_WIDTH=11 216CONFIG_MEM_ADD_WIDTH=11
217CONFIG_ENET_FLASH_PIN=0 217CONFIG_ENET_FLASH_PIN=0
218CONFIG_BOOT_LOAD=0x1000 218CONFIG_BOOT_LOAD=0x1000
219
220
221CONFIG_BFIN_SCRATCH_REG_RETN=y 219CONFIG_BFIN_SCRATCH_REG_RETN=y
222# CONFIG_BFIN_SCRATCH_REG_RETE is not set 220# CONFIG_BFIN_SCRATCH_REG_RETE is not set
223# CONFIG_BFIN_SCRATCH_REG_CYCLES is not set 221# CONFIG_BFIN_SCRATCH_REG_CYCLES is not set
@@ -483,7 +481,7 @@ CONFIG_MTD=y
483# CONFIG_MTD_CONCAT is not set 481# CONFIG_MTD_CONCAT is not set
484CONFIG_MTD_PARTITIONS=y 482CONFIG_MTD_PARTITIONS=y
485# CONFIG_MTD_REDBOOT_PARTS is not set 483# CONFIG_MTD_REDBOOT_PARTS is not set
486# CONFIG_MTD_CMDLINE_PARTS is not set 484CONFIG_MTD_CMDLINE_PARTS=y
487 485
488# 486#
489# User Modules And Translation Layers 487# User Modules And Translation Layers
@@ -500,8 +498,8 @@ CONFIG_MTD_BLOCK=y
500# 498#
501# RAM/ROM/Flash chip drivers 499# RAM/ROM/Flash chip drivers
502# 500#
503# CONFIG_MTD_CFI is not set 501CONFIG_MTD_CFI=m
504CONFIG_MTD_JEDECPROBE=m 502# CONFIG_MTD_JEDECPROBE is not set
505CONFIG_MTD_GEN_PROBE=m 503CONFIG_MTD_GEN_PROBE=m
506# CONFIG_MTD_CFI_ADV_OPTIONS is not set 504# CONFIG_MTD_CFI_ADV_OPTIONS is not set
507CONFIG_MTD_MAP_BANK_WIDTH_1=y 505CONFIG_MTD_MAP_BANK_WIDTH_1=y
@@ -515,8 +513,9 @@ CONFIG_MTD_CFI_I2=y
515# CONFIG_MTD_CFI_I4 is not set 513# CONFIG_MTD_CFI_I4 is not set
516# CONFIG_MTD_CFI_I8 is not set 514# CONFIG_MTD_CFI_I8 is not set
517# CONFIG_MTD_CFI_INTELEXT is not set 515# CONFIG_MTD_CFI_INTELEXT is not set
518# CONFIG_MTD_CFI_AMDSTD is not set 516CONFIG_MTD_CFI_AMDSTD=m
519# CONFIG_MTD_CFI_STAA is not set 517# CONFIG_MTD_CFI_STAA is not set
518CONFIG_MTD_CFI_UTIL=m
520CONFIG_MTD_RAM=y 519CONFIG_MTD_RAM=y
521CONFIG_MTD_ROM=m 520CONFIG_MTD_ROM=m
522# CONFIG_MTD_ABSENT is not set 521# CONFIG_MTD_ABSENT is not set
@@ -526,6 +525,11 @@ CONFIG_MTD_ROM=m
526# 525#
527CONFIG_MTD_COMPLEX_MAPPINGS=y 526CONFIG_MTD_COMPLEX_MAPPINGS=y
528# CONFIG_MTD_PHYSMAP is not set 527# CONFIG_MTD_PHYSMAP is not set
528CONFIG_MTD_BF5xx=m
529CONFIG_BFIN_FLASH_BANK_0=0x7BB0
530CONFIG_BFIN_FLASH_BANK_1=0x7BB0
531CONFIG_BFIN_FLASH_BANK_2=0x7BB0
532CONFIG_BFIN_FLASH_BANK_3=0x7BB0
529# CONFIG_MTD_UCLINUX is not set 533# CONFIG_MTD_UCLINUX is not set
530# CONFIG_MTD_PLATRAM is not set 534# CONFIG_MTD_PLATRAM is not set
531 535
diff --git a/arch/blackfin/kernel/bfin_dma_5xx.c b/arch/blackfin/kernel/bfin_dma_5xx.c
index fa9debe8d5f4..5453bc3664fc 100644
--- a/arch/blackfin/kernel/bfin_dma_5xx.c
+++ b/arch/blackfin/kernel/bfin_dma_5xx.c
@@ -104,6 +104,16 @@ int request_dma(unsigned int channel, char *device_id)
104 104
105 mutex_unlock(&(dma_ch[channel].dmalock)); 105 mutex_unlock(&(dma_ch[channel].dmalock));
106 106
107#ifdef CONFIG_BF54x
108 if (channel >= CH_UART2_RX && channel <= CH_UART3_TX &&
109 strncmp(device_id, "BFIN_UART", 9) == 0)
110 dma_ch[channel].regs->peripheral_map |=
111 (channel - CH_UART2_RX + 0xC);
112 else
113 dma_ch[channel].regs->peripheral_map |=
114 (channel - CH_UART2_RX + 0x6);
115#endif
116
107 dma_ch[channel].device_id = device_id; 117 dma_ch[channel].device_id = device_id;
108 dma_ch[channel].irq_callback = NULL; 118 dma_ch[channel].irq_callback = NULL;
109 119
diff --git a/arch/blackfin/kernel/bfin_gpio.c b/arch/blackfin/kernel/bfin_gpio.c
index 6bbe0a2fccb8..08788f7bbfba 100644
--- a/arch/blackfin/kernel/bfin_gpio.c
+++ b/arch/blackfin/kernel/bfin_gpio.c
@@ -186,7 +186,7 @@ static struct str_ident {
186 char name[RESOURCE_LABEL_SIZE]; 186 char name[RESOURCE_LABEL_SIZE];
187} str_ident[MAX_RESOURCES]; 187} str_ident[MAX_RESOURCES];
188 188
189#ifdef CONFIG_PM 189#if defined(CONFIG_PM) && !defined(CONFIG_BF54x)
190static unsigned short wakeup_map[gpio_bank(MAX_BLACKFIN_GPIOS)]; 190static unsigned short wakeup_map[gpio_bank(MAX_BLACKFIN_GPIOS)];
191static unsigned char wakeup_flags_map[MAX_BLACKFIN_GPIOS]; 191static unsigned char wakeup_flags_map[MAX_BLACKFIN_GPIOS];
192static struct gpio_port_s gpio_bank_saved[gpio_bank(MAX_BLACKFIN_GPIOS)]; 192static struct gpio_port_s gpio_bank_saved[gpio_bank(MAX_BLACKFIN_GPIOS)];
@@ -696,9 +696,8 @@ static int bfin_gpio_wakeup_type(unsigned gpio, unsigned char type)
696 return 0; 696 return 0;
697} 697}
698 698
699u32 gpio_pm_setup(void) 699u32 bfin_pm_setup(void)
700{ 700{
701 u32 sic_iwr = 0;
702 u16 bank, mask, i, gpio; 701 u16 bank, mask, i, gpio;
703 702
704 for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) { 703 for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) {
@@ -723,7 +722,8 @@ u32 gpio_pm_setup(void)
723 gpio = i; 722 gpio = i;
724 723
725 while (mask) { 724 while (mask) {
726 if (mask & 1) { 725 if ((mask & 1) && (wakeup_flags_map[gpio] !=
726 PM_WAKE_IGNORE)) {
727 reserved_gpio_map[gpio_bank(gpio)] |= 727 reserved_gpio_map[gpio_bank(gpio)] |=
728 gpio_bit(gpio); 728 gpio_bit(gpio);
729 bfin_gpio_wakeup_type(gpio, 729 bfin_gpio_wakeup_type(gpio,
@@ -734,21 +734,17 @@ u32 gpio_pm_setup(void)
734 mask >>= 1; 734 mask >>= 1;
735 } 735 }
736 736
737 sic_iwr |= 1 << 737 bfin_internal_set_wake(sic_iwr_irqs[bank], 1);
738 (sic_iwr_irqs[bank] - (IRQ_CORETMR + 1));
739 gpio_bankb[bank]->maskb_set = wakeup_map[gpio_bank(i)]; 738 gpio_bankb[bank]->maskb_set = wakeup_map[gpio_bank(i)];
740 } 739 }
741 } 740 }
742 741
743 AWA_DUMMY_READ(maskb_set); 742 AWA_DUMMY_READ(maskb_set);
744 743
745 if (sic_iwr) 744 return 0;
746 return sic_iwr;
747 else
748 return IWR_ENABLE_ALL;
749} 745}
750 746
751void gpio_pm_restore(void) 747void bfin_pm_restore(void)
752{ 748{
753 u16 bank, mask, i; 749 u16 bank, mask, i;
754 750
@@ -768,7 +764,7 @@ void gpio_pm_restore(void)
768 764
769 reserved_gpio_map[bank] = 765 reserved_gpio_map[bank] =
770 gpio_bank_saved[bank].reserved; 766 gpio_bank_saved[bank].reserved;
771 767 bfin_internal_set_wake(sic_iwr_irqs[bank], 0);
772 } 768 }
773 769
774 gpio_bankb[bank]->maskb = gpio_bank_saved[bank].maskb; 770 gpio_bankb[bank]->maskb = gpio_bank_saved[bank].maskb;
diff --git a/arch/blackfin/kernel/cplb-mpu/cplbinit.c b/arch/blackfin/kernel/cplb-mpu/cplbinit.c
index e2e2b5079f5b..dc6e8a7a8bda 100644
--- a/arch/blackfin/kernel/cplb-mpu/cplbinit.c
+++ b/arch/blackfin/kernel/cplb-mpu/cplbinit.c
@@ -26,6 +26,10 @@
26#include <asm/cplb.h> 26#include <asm/cplb.h>
27#include <asm/cplbinit.h> 27#include <asm/cplbinit.h>
28 28
29#if ANOMALY_05000263
30# error the MPU will not function safely while Anomaly 05000263 applies
31#endif
32
29struct cplb_entry icplb_tbl[MAX_CPLBS]; 33struct cplb_entry icplb_tbl[MAX_CPLBS];
30struct cplb_entry dcplb_tbl[MAX_CPLBS]; 34struct cplb_entry dcplb_tbl[MAX_CPLBS];
31 35
diff --git a/arch/blackfin/kernel/init_task.c b/arch/blackfin/kernel/init_task.c
index 673c860ffc23..c640154030e2 100644
--- a/arch/blackfin/kernel/init_task.c
+++ b/arch/blackfin/kernel/init_task.c
@@ -57,5 +57,5 @@ EXPORT_SYMBOL(init_task);
57 * "init_task" linker map entry. 57 * "init_task" linker map entry.
58 */ 58 */
59union thread_union init_thread_union 59union thread_union init_thread_union
60 __attribute__ ((__section__(".data.init_task"))) = { 60 __attribute__ ((__section__(".init_task.data"))) = {
61INIT_THREAD_INFO(init_task)}; 61INIT_THREAD_INFO(init_task)};
diff --git a/arch/blackfin/kernel/process.c b/arch/blackfin/kernel/process.c
index 023dc80af187..6b8459c66163 100644
--- a/arch/blackfin/kernel/process.c
+++ b/arch/blackfin/kernel/process.c
@@ -31,7 +31,6 @@
31#include <linux/smp_lock.h> 31#include <linux/smp_lock.h>
32#include <linux/unistd.h> 32#include <linux/unistd.h>
33#include <linux/user.h> 33#include <linux/user.h>
34#include <linux/a.out.h>
35#include <linux/uaccess.h> 34#include <linux/uaccess.h>
36#include <linux/fs.h> 35#include <linux/fs.h>
37#include <linux/err.h> 36#include <linux/err.h>
diff --git a/arch/blackfin/kernel/setup.c b/arch/blackfin/kernel/setup.c
index 6e106b3d7729..8229b1090eb9 100644
--- a/arch/blackfin/kernel/setup.c
+++ b/arch/blackfin/kernel/setup.c
@@ -1,30 +1,11 @@
1/* 1/*
2 * File: arch/blackfin/kernel/setup.c 2 * arch/blackfin/kernel/setup.c
3 * Based on:
4 * Author:
5 * 3 *
6 * Created: 4 * Copyright 2004-2006 Analog Devices Inc.
7 * Description:
8 * 5 *
9 * Modified: 6 * Enter bugs at http://blackfin.uclinux.org/
10 * Copyright 2004-2006 Analog Devices Inc.
11 * 7 *
12 * Bugs: Enter bugs at http://blackfin.uclinux.org/ 8 * Licensed under the GPL-2 or later.
13 *
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License as published by
16 * the Free Software Foundation; either version 2 of the License, or
17 * (at your option) any later version.
18 *
19 * This program is distributed in the hope that it will be useful,
20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 * GNU General Public License for more details.
23 *
24 * You should have received a copy of the GNU General Public License
25 * along with this program; if not, see the file COPYING, or write
26 * to the Free Software Foundation, Inc.,
27 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
28 */ 9 */
29 10
30#include <linux/delay.h> 11#include <linux/delay.h>
@@ -34,6 +15,7 @@
34#include <linux/cpu.h> 15#include <linux/cpu.h>
35#include <linux/module.h> 16#include <linux/module.h>
36#include <linux/tty.h> 17#include <linux/tty.h>
18#include <linux/pfn.h>
37 19
38#include <linux/ext2_fs.h> 20#include <linux/ext2_fs.h>
39#include <linux/cramfs_fs.h> 21#include <linux/cramfs_fs.h>
@@ -47,6 +29,8 @@
47#include <asm/fixed_code.h> 29#include <asm/fixed_code.h>
48#include <asm/early_printk.h> 30#include <asm/early_printk.h>
49 31
32static DEFINE_PER_CPU(struct cpu, cpu_devices);
33
50u16 _bfin_swrst; 34u16 _bfin_swrst;
51 35
52unsigned long memory_start, memory_end, physical_mem_end; 36unsigned long memory_start, memory_end, physical_mem_end;
@@ -67,6 +51,29 @@ EXPORT_SYMBOL(mtd_size);
67 51
68char __initdata command_line[COMMAND_LINE_SIZE]; 52char __initdata command_line[COMMAND_LINE_SIZE];
69 53
54/* boot memmap, for parsing "memmap=" */
55#define BFIN_MEMMAP_MAX 128 /* number of entries in bfin_memmap */
56#define BFIN_MEMMAP_RAM 1
57#define BFIN_MEMMAP_RESERVED 2
58struct bfin_memmap {
59 int nr_map;
60 struct bfin_memmap_entry {
61 unsigned long long addr; /* start of memory segment */
62 unsigned long long size;
63 unsigned long type;
64 } map[BFIN_MEMMAP_MAX];
65} bfin_memmap __initdata;
66
67/* for memmap sanitization */
68struct change_member {
69 struct bfin_memmap_entry *pentry; /* pointer to original entry */
70 unsigned long long addr; /* address for this change point */
71};
72static struct change_member change_point_list[2*BFIN_MEMMAP_MAX] __initdata;
73static struct change_member *change_point[2*BFIN_MEMMAP_MAX] __initdata;
74static struct bfin_memmap_entry *overlap_list[BFIN_MEMMAP_MAX] __initdata;
75static struct bfin_memmap_entry new_map[BFIN_MEMMAP_MAX] __initdata;
76
70void __init bf53x_cache_init(void) 77void __init bf53x_cache_init(void)
71{ 78{
72#if defined(CONFIG_BFIN_DCACHE) || defined(CONFIG_BFIN_ICACHE) 79#if defined(CONFIG_BFIN_DCACHE) || defined(CONFIG_BFIN_ICACHE)
@@ -123,12 +130,224 @@ void __init bf53x_relocate_l1_mem(void)
123 130
124} 131}
125 132
133/* add_memory_region to memmap */
134static void __init add_memory_region(unsigned long long start,
135 unsigned long long size, int type)
136{
137 int i;
138
139 i = bfin_memmap.nr_map;
140
141 if (i == BFIN_MEMMAP_MAX) {
142 printk(KERN_ERR "Ooops! Too many entries in the memory map!\n");
143 return;
144 }
145
146 bfin_memmap.map[i].addr = start;
147 bfin_memmap.map[i].size = size;
148 bfin_memmap.map[i].type = type;
149 bfin_memmap.nr_map++;
150}
151
152/*
153 * Sanitize the boot memmap, removing overlaps.
154 */
155static int __init sanitize_memmap(struct bfin_memmap_entry *map, int *pnr_map)
156{
157 struct change_member *change_tmp;
158 unsigned long current_type, last_type;
159 unsigned long long last_addr;
160 int chgidx, still_changing;
161 int overlap_entries;
162 int new_entry;
163 int old_nr, new_nr, chg_nr;
164 int i;
165
166 /*
167 Visually we're performing the following (1,2,3,4 = memory types)
168
169 Sample memory map (w/overlaps):
170 ____22__________________
171 ______________________4_
172 ____1111________________
173 _44_____________________
174 11111111________________
175 ____________________33__
176 ___________44___________
177 __________33333_________
178 ______________22________
179 ___________________2222_
180 _________111111111______
181 _____________________11_
182 _________________4______
183
184 Sanitized equivalent (no overlap):
185 1_______________________
186 _44_____________________
187 ___1____________________
188 ____22__________________
189 ______11________________
190 _________1______________
191 __________3_____________
192 ___________44___________
193 _____________33_________
194 _______________2________
195 ________________1_______
196 _________________4______
197 ___________________2____
198 ____________________33__
199 ______________________4_
200 */
201 /* if there's only one memory region, don't bother */
202 if (*pnr_map < 2)
203 return -1;
204
205 old_nr = *pnr_map;
206
207 /* bail out if we find any unreasonable addresses in memmap */
208 for (i = 0; i < old_nr; i++)
209 if (map[i].addr + map[i].size < map[i].addr)
210 return -1;
211
212 /* create pointers for initial change-point information (for sorting) */
213 for (i = 0; i < 2*old_nr; i++)
214 change_point[i] = &change_point_list[i];
215
216 /* record all known change-points (starting and ending addresses),
217 omitting those that are for empty memory regions */
218 chgidx = 0;
219 for (i = 0; i < old_nr; i++) {
220 if (map[i].size != 0) {
221 change_point[chgidx]->addr = map[i].addr;
222 change_point[chgidx++]->pentry = &map[i];
223 change_point[chgidx]->addr = map[i].addr + map[i].size;
224 change_point[chgidx++]->pentry = &map[i];
225 }
226 }
227 chg_nr = chgidx; /* true number of change-points */
228
229 /* sort change-point list by memory addresses (low -> high) */
230 still_changing = 1;
231 while (still_changing) {
232 still_changing = 0;
233 for (i = 1; i < chg_nr; i++) {
234 /* if <current_addr> > <last_addr>, swap */
235 /* or, if current=<start_addr> & last=<end_addr>, swap */
236 if ((change_point[i]->addr < change_point[i-1]->addr) ||
237 ((change_point[i]->addr == change_point[i-1]->addr) &&
238 (change_point[i]->addr == change_point[i]->pentry->addr) &&
239 (change_point[i-1]->addr != change_point[i-1]->pentry->addr))
240 ) {
241 change_tmp = change_point[i];
242 change_point[i] = change_point[i-1];
243 change_point[i-1] = change_tmp;
244 still_changing = 1;
245 }
246 }
247 }
248
249 /* create a new memmap, removing overlaps */
250 overlap_entries = 0; /* number of entries in the overlap table */
251 new_entry = 0; /* index for creating new memmap entries */
252 last_type = 0; /* start with undefined memory type */
253 last_addr = 0; /* start with 0 as last starting address */
254 /* loop through change-points, determining affect on the new memmap */
255 for (chgidx = 0; chgidx < chg_nr; chgidx++) {
256 /* keep track of all overlapping memmap entries */
257 if (change_point[chgidx]->addr == change_point[chgidx]->pentry->addr) {
258 /* add map entry to overlap list (> 1 entry implies an overlap) */
259 overlap_list[overlap_entries++] = change_point[chgidx]->pentry;
260 } else {
261 /* remove entry from list (order independent, so swap with last) */
262 for (i = 0; i < overlap_entries; i++) {
263 if (overlap_list[i] == change_point[chgidx]->pentry)
264 overlap_list[i] = overlap_list[overlap_entries-1];
265 }
266 overlap_entries--;
267 }
268 /* if there are overlapping entries, decide which "type" to use */
269 /* (larger value takes precedence -- 1=usable, 2,3,4,4+=unusable) */
270 current_type = 0;
271 for (i = 0; i < overlap_entries; i++)
272 if (overlap_list[i]->type > current_type)
273 current_type = overlap_list[i]->type;
274 /* continue building up new memmap based on this information */
275 if (current_type != last_type) {
276 if (last_type != 0) {
277 new_map[new_entry].size =
278 change_point[chgidx]->addr - last_addr;
279 /* move forward only if the new size was non-zero */
280 if (new_map[new_entry].size != 0)
281 if (++new_entry >= BFIN_MEMMAP_MAX)
282 break; /* no more space left for new entries */
283 }
284 if (current_type != 0) {
285 new_map[new_entry].addr = change_point[chgidx]->addr;
286 new_map[new_entry].type = current_type;
287 last_addr = change_point[chgidx]->addr;
288 }
289 last_type = current_type;
290 }
291 }
292 new_nr = new_entry; /* retain count for new entries */
293
294 /* copy new mapping into original location */
295 memcpy(map, new_map, new_nr*sizeof(struct bfin_memmap_entry));
296 *pnr_map = new_nr;
297
298 return 0;
299}
300
301static void __init print_memory_map(char *who)
302{
303 int i;
304
305 for (i = 0; i < bfin_memmap.nr_map; i++) {
306 printk(KERN_DEBUG " %s: %016Lx - %016Lx ", who,
307 bfin_memmap.map[i].addr,
308 bfin_memmap.map[i].addr + bfin_memmap.map[i].size);
309 switch (bfin_memmap.map[i].type) {
310 case BFIN_MEMMAP_RAM:
311 printk("(usable)\n");
312 break;
313 case BFIN_MEMMAP_RESERVED:
314 printk("(reserved)\n");
315 break;
316 default: printk("type %lu\n", bfin_memmap.map[i].type);
317 break;
318 }
319 }
320}
321
322static __init int parse_memmap(char *arg)
323{
324 unsigned long long start_at, mem_size;
325
326 if (!arg)
327 return -EINVAL;
328
329 mem_size = memparse(arg, &arg);
330 if (*arg == '@') {
331 start_at = memparse(arg+1, &arg);
332 add_memory_region(start_at, mem_size, BFIN_MEMMAP_RAM);
333 } else if (*arg == '$') {
334 start_at = memparse(arg+1, &arg);
335 add_memory_region(start_at, mem_size, BFIN_MEMMAP_RESERVED);
336 }
337
338 return 0;
339}
340
126/* 341/*
127 * Initial parsing of the command line. Currently, we support: 342 * Initial parsing of the command line. Currently, we support:
128 * - Controlling the linux memory size: mem=xxx[KMG] 343 * - Controlling the linux memory size: mem=xxx[KMG]
129 * - Controlling the physical memory size: max_mem=xxx[KMG][$][#] 344 * - Controlling the physical memory size: max_mem=xxx[KMG][$][#]
130 * $ -> reserved memory is dcacheable 345 * $ -> reserved memory is dcacheable
131 * # -> reserved memory is icacheable 346 * # -> reserved memory is icacheable
347 * - "memmap=XXX[KkmM][@][$]XXX[KkmM]" defines a memory region
348 * @ from <start> to <start>+<mem>, type RAM
349 * $ from <start> to <start>+<mem>, type RESERVED
350 *
132 */ 351 */
133static __init void parse_cmdline_early(char *cmdline_p) 352static __init void parse_cmdline_early(char *cmdline_p)
134{ 353{
@@ -136,7 +355,6 @@ static __init void parse_cmdline_early(char *cmdline_p)
136 unsigned int memsize; 355 unsigned int memsize;
137 for (;;) { 356 for (;;) {
138 if (c == ' ') { 357 if (c == ' ') {
139
140 if (!memcmp(to, "mem=", 4)) { 358 if (!memcmp(to, "mem=", 4)) {
141 to += 4; 359 to += 4;
142 memsize = memparse(to, &to); 360 memsize = memparse(to, &to);
@@ -162,6 +380,9 @@ static __init void parse_cmdline_early(char *cmdline_p)
162 } else if (!memcmp(to, "earlyprintk=", 12)) { 380 } else if (!memcmp(to, "earlyprintk=", 12)) {
163 to += 12; 381 to += 12;
164 setup_early_printk(to); 382 setup_early_printk(to);
383 } else if (!memcmp(to, "memmap=", 7)) {
384 to += 7;
385 parse_memmap(to);
165 } 386 }
166 } 387 }
167 c = *(to++); 388 c = *(to++);
@@ -170,75 +391,36 @@ static __init void parse_cmdline_early(char *cmdline_p)
170 } 391 }
171} 392}
172 393
173void __init setup_arch(char **cmdline_p) 394/*
395 * Setup memory defaults from user config.
396 * The physical memory layout looks like:
397 *
398 * [_rambase, _ramstart]: kernel image
399 * [memory_start, memory_end]: dynamic memory managed by kernel
400 * [memory_end, _ramend]: reserved memory
401 * [meory_mtd_start(memory_end),
402 * memory_mtd_start + mtd_size]: rootfs (if any)
403 * [_ramend - DMA_UNCACHED_REGION,
404 * _ramend]: uncached DMA region
405 * [_ramend, physical_mem_end]: memory not managed by kernel
406 *
407 */
408static __init void memory_setup(void)
174{ 409{
175 int bootmap_size;
176 unsigned long l1_length, sclk, cclk;
177#ifdef CONFIG_MTD_UCLINUX 410#ifdef CONFIG_MTD_UCLINUX
178 unsigned long mtd_phys = 0; 411 unsigned long mtd_phys = 0;
179#endif 412#endif
180 413
181#ifdef CONFIG_DUMMY_CONSOLE 414 _rambase = (unsigned long)_stext;
182 conswitchp = &dummy_con; 415 _ramstart = (unsigned long)_end;
183#endif
184
185#if defined(CONFIG_CMDLINE_BOOL)
186 strncpy(&command_line[0], CONFIG_CMDLINE, sizeof(command_line));
187 command_line[sizeof(command_line) - 1] = 0;
188#endif
189
190 /* Keep a copy of command line */
191 *cmdline_p = &command_line[0];
192 memcpy(boot_command_line, command_line, COMMAND_LINE_SIZE);
193 boot_command_line[COMMAND_LINE_SIZE - 1] = '\0';
194
195 /* setup memory defaults from the user config */
196 physical_mem_end = 0;
197 _ramend = CONFIG_MEM_SIZE * 1024 * 1024;
198
199 parse_cmdline_early(&command_line[0]);
200
201 cclk = get_cclk();
202 sclk = get_sclk();
203
204#if !defined(CONFIG_BFIN_KERNEL_CLOCK)
205 if (ANOMALY_05000273 && cclk == sclk)
206 panic("ANOMALY 05000273, SCLK can not be same as CCLK");
207#endif
208 416
209#ifdef BF561_FAMILY 417 if (DMA_UNCACHED_REGION > (_ramend - _ramstart)) {
210 if (ANOMALY_05000266) { 418 console_init();
211 bfin_read_IMDMA_D0_IRQ_STATUS(); 419 panic("DMA region exceeds memory limit: %lu.\n",
212 bfin_read_IMDMA_D1_IRQ_STATUS(); 420 _ramend - _ramstart);
213 } 421 }
214#endif
215
216 printk(KERN_INFO "Hardware Trace ");
217 if (bfin_read_TBUFCTL() & 0x1 )
218 printk("Active ");
219 else
220 printk("Off ");
221 if (bfin_read_TBUFCTL() & 0x2)
222 printk("and Enabled\n");
223 else
224 printk("and Disabled\n");
225
226
227#if defined(CONFIG_CHR_DEV_FLASH) || defined(CONFIG_BLK_DEV_FLASH)
228 /* we need to initialize the Flashrom device here since we might
229 * do things with flash early on in the boot
230 */
231 flash_probe();
232#endif
233
234 if (physical_mem_end == 0)
235 physical_mem_end = _ramend;
236
237 /* by now the stack is part of the init task */
238 memory_end = _ramend - DMA_UNCACHED_REGION; 422 memory_end = _ramend - DMA_UNCACHED_REGION;
239 423
240 _ramstart = (unsigned long)__bss_stop;
241 _rambase = (unsigned long)_stext;
242#ifdef CONFIG_MPU 424#ifdef CONFIG_MPU
243 /* Round up to multiple of 4MB. */ 425 /* Round up to multiple of 4MB. */
244 memory_start = (_ramstart + 0x3fffff) & ~0x3fffff; 426 memory_start = (_ramstart + 0x3fffff) & ~0x3fffff;
@@ -292,7 +474,7 @@ void __init setup_arch(char **cmdline_p)
292 } 474 }
293 475
294 /* Relocate MTD image to the top of memory after the uncached memory area */ 476 /* Relocate MTD image to the top of memory after the uncached memory area */
295 dma_memcpy((char *)memory_end, __bss_stop, mtd_size); 477 dma_memcpy((char *)memory_end, _end, mtd_size);
296 478
297 memory_mtd_start = memory_end; 479 memory_mtd_start = memory_end;
298 _ebss = memory_mtd_start; /* define _ebss for compatible */ 480 _ebss = memory_mtd_start; /* define _ebss for compatible */
@@ -319,13 +501,175 @@ void __init setup_arch(char **cmdline_p)
319#endif 501#endif
320 502
321#if !defined(CONFIG_MTD_UCLINUX) 503#if !defined(CONFIG_MTD_UCLINUX)
322 memory_end -= SIZE_4K; /*In case there is no valid CPLB behind memory_end make sure we don't get to close*/ 504 /*In case there is no valid CPLB behind memory_end make sure we don't get to close*/
505 memory_end -= SIZE_4K;
323#endif 506#endif
507
324 init_mm.start_code = (unsigned long)_stext; 508 init_mm.start_code = (unsigned long)_stext;
325 init_mm.end_code = (unsigned long)_etext; 509 init_mm.end_code = (unsigned long)_etext;
326 init_mm.end_data = (unsigned long)_edata; 510 init_mm.end_data = (unsigned long)_edata;
327 init_mm.brk = (unsigned long)0; 511 init_mm.brk = (unsigned long)0;
328 512
513 printk(KERN_INFO "Board Memory: %ldMB\n", physical_mem_end >> 20);
514 printk(KERN_INFO "Kernel Managed Memory: %ldMB\n", _ramend >> 20);
515
516 printk(KERN_INFO "Memory map:\n"
517 KERN_INFO " text = 0x%p-0x%p\n"
518 KERN_INFO " rodata = 0x%p-0x%p\n"
519 KERN_INFO " bss = 0x%p-0x%p\n"
520 KERN_INFO " data = 0x%p-0x%p\n"
521 KERN_INFO " stack = 0x%p-0x%p\n"
522 KERN_INFO " init = 0x%p-0x%p\n"
523 KERN_INFO " available = 0x%p-0x%p\n"
524#ifdef CONFIG_MTD_UCLINUX
525 KERN_INFO " rootfs = 0x%p-0x%p\n"
526#endif
527#if DMA_UNCACHED_REGION > 0
528 KERN_INFO " DMA Zone = 0x%p-0x%p\n"
529#endif
530 , _stext, _etext,
531 __start_rodata, __end_rodata,
532 __bss_start, __bss_stop,
533 _sdata, _edata,
534 (void *)&init_thread_union,
535 (void *)((int)(&init_thread_union) + 0x2000),
536 __init_begin, __init_end,
537 (void *)_ramstart, (void *)memory_end
538#ifdef CONFIG_MTD_UCLINUX
539 , (void *)memory_mtd_start, (void *)(memory_mtd_start + mtd_size)
540#endif
541#if DMA_UNCACHED_REGION > 0
542 , (void *)(_ramend - DMA_UNCACHED_REGION), (void *)(_ramend)
543#endif
544 );
545}
546
547static __init void setup_bootmem_allocator(void)
548{
549 int bootmap_size;
550 int i;
551 unsigned long min_pfn, max_pfn;
552 unsigned long curr_pfn, last_pfn, size;
553
554 /* mark memory between memory_start and memory_end usable */
555 add_memory_region(memory_start,
556 memory_end - memory_start, BFIN_MEMMAP_RAM);
557 /* sanity check for overlap */
558 sanitize_memmap(bfin_memmap.map, &bfin_memmap.nr_map);
559 print_memory_map("boot memmap");
560
561 min_pfn = PAGE_OFFSET >> PAGE_SHIFT;
562 max_pfn = memory_end >> PAGE_SHIFT;
563
564 /*
565 * give all the memory to the bootmap allocator, tell it to put the
566 * boot mem_map at the start of memory.
567 */
568 bootmap_size = init_bootmem_node(NODE_DATA(0),
569 memory_start >> PAGE_SHIFT, /* map goes here */
570 min_pfn, max_pfn);
571
572 /* register the memmap regions with the bootmem allocator */
573 for (i = 0; i < bfin_memmap.nr_map; i++) {
574 /*
575 * Reserve usable memory
576 */
577 if (bfin_memmap.map[i].type != BFIN_MEMMAP_RAM)
578 continue;
579 /*
580 * We are rounding up the start address of usable memory:
581 */
582 curr_pfn = PFN_UP(bfin_memmap.map[i].addr);
583 if (curr_pfn >= max_pfn)
584 continue;
585 /*
586 * ... and at the end of the usable range downwards:
587 */
588 last_pfn = PFN_DOWN(bfin_memmap.map[i].addr +
589 bfin_memmap.map[i].size);
590
591 if (last_pfn > max_pfn)
592 last_pfn = max_pfn;
593
594 /*
595 * .. finally, did all the rounding and playing
596 * around just make the area go away?
597 */
598 if (last_pfn <= curr_pfn)
599 continue;
600
601 size = last_pfn - curr_pfn;
602 free_bootmem(PFN_PHYS(curr_pfn), PFN_PHYS(size));
603 }
604
605 /* reserve memory before memory_start, including bootmap */
606 reserve_bootmem(PAGE_OFFSET,
607 memory_start + bootmap_size + PAGE_SIZE - 1 - PAGE_OFFSET,
608 BOOTMEM_DEFAULT);
609}
610
611void __init setup_arch(char **cmdline_p)
612{
613 unsigned long l1_length, sclk, cclk;
614
615#ifdef CONFIG_DUMMY_CONSOLE
616 conswitchp = &dummy_con;
617#endif
618
619#if defined(CONFIG_CMDLINE_BOOL)
620 strncpy(&command_line[0], CONFIG_CMDLINE, sizeof(command_line));
621 command_line[sizeof(command_line) - 1] = 0;
622#endif
623
624 /* Keep a copy of command line */
625 *cmdline_p = &command_line[0];
626 memcpy(boot_command_line, command_line, COMMAND_LINE_SIZE);
627 boot_command_line[COMMAND_LINE_SIZE - 1] = '\0';
628
629 /* setup memory defaults from the user config */
630 physical_mem_end = 0;
631 _ramend = CONFIG_MEM_SIZE * 1024 * 1024;
632
633 memset(&bfin_memmap, 0, sizeof(bfin_memmap));
634
635 parse_cmdline_early(&command_line[0]);
636
637 if (physical_mem_end == 0)
638 physical_mem_end = _ramend;
639
640 memory_setup();
641
642 cclk = get_cclk();
643 sclk = get_sclk();
644
645#if !defined(CONFIG_BFIN_KERNEL_CLOCK)
646 if (ANOMALY_05000273 && cclk == sclk)
647 panic("ANOMALY 05000273, SCLK can not be same as CCLK");
648#endif
649
650#ifdef BF561_FAMILY
651 if (ANOMALY_05000266) {
652 bfin_read_IMDMA_D0_IRQ_STATUS();
653 bfin_read_IMDMA_D1_IRQ_STATUS();
654 }
655#endif
656 printk(KERN_INFO "Hardware Trace ");
657 if (bfin_read_TBUFCTL() & 0x1)
658 printk("Active ");
659 else
660 printk("Off ");
661 if (bfin_read_TBUFCTL() & 0x2)
662 printk("and Enabled\n");
663 else
664 printk("and Disabled\n");
665
666#if defined(CONFIG_CHR_DEV_FLASH) || defined(CONFIG_BLK_DEV_FLASH)
667 /* we need to initialize the Flashrom device here since we might
668 * do things with flash early on in the boot
669 */
670 flash_probe();
671#endif
672
329 _bfin_swrst = bfin_read_SWRST(); 673 _bfin_swrst = bfin_read_SWRST();
330 674
331 if (_bfin_swrst & RESET_DOUBLE) 675 if (_bfin_swrst & RESET_DOUBLE)
@@ -335,7 +679,7 @@ void __init setup_arch(char **cmdline_p)
335 else if (_bfin_swrst & RESET_SOFTWARE) 679 else if (_bfin_swrst & RESET_SOFTWARE)
336 printk(KERN_NOTICE "Reset caused by Software reset\n"); 680 printk(KERN_NOTICE "Reset caused by Software reset\n");
337 681
338 printk(KERN_INFO "Blackfin support (C) 2004-2007 Analog Devices, Inc.\n"); 682 printk(KERN_INFO "Blackfin support (C) 2004-2008 Analog Devices, Inc.\n");
339 if (bfin_compiled_revid() == 0xffff) 683 if (bfin_compiled_revid() == 0xffff)
340 printk(KERN_INFO "Compiled for ADSP-%s Rev any\n", CPU); 684 printk(KERN_INFO "Compiled for ADSP-%s Rev any\n", CPU);
341 else if (bfin_compiled_revid() == -1) 685 else if (bfin_compiled_revid() == -1)
@@ -361,55 +705,8 @@ void __init setup_arch(char **cmdline_p)
361 if (ANOMALY_05000273 && (cclk >> 1) <= sclk) 705 if (ANOMALY_05000273 && (cclk >> 1) <= sclk)
362 printk("\n\n\nANOMALY_05000273: CCLK must be >= 2*SCLK !!!\n\n\n"); 706 printk("\n\n\nANOMALY_05000273: CCLK must be >= 2*SCLK !!!\n\n\n");
363 707
364 printk(KERN_INFO "Board Memory: %ldMB\n", physical_mem_end >> 20); 708 setup_bootmem_allocator();
365 printk(KERN_INFO "Kernel Managed Memory: %ldMB\n", _ramend >> 20);
366
367 printk(KERN_INFO "Memory map:\n"
368 KERN_INFO " text = 0x%p-0x%p\n"
369 KERN_INFO " rodata = 0x%p-0x%p\n"
370 KERN_INFO " data = 0x%p-0x%p\n"
371 KERN_INFO " stack = 0x%p-0x%p\n"
372 KERN_INFO " init = 0x%p-0x%p\n"
373 KERN_INFO " bss = 0x%p-0x%p\n"
374 KERN_INFO " available = 0x%p-0x%p\n"
375#ifdef CONFIG_MTD_UCLINUX
376 KERN_INFO " rootfs = 0x%p-0x%p\n"
377#endif
378#if DMA_UNCACHED_REGION > 0
379 KERN_INFO " DMA Zone = 0x%p-0x%p\n"
380#endif
381 , _stext, _etext,
382 __start_rodata, __end_rodata,
383 _sdata, _edata,
384 (void *)&init_thread_union, (void *)((int)(&init_thread_union) + 0x2000),
385 __init_begin, __init_end,
386 __bss_start, __bss_stop,
387 (void *)_ramstart, (void *)memory_end
388#ifdef CONFIG_MTD_UCLINUX
389 , (void *)memory_mtd_start, (void *)(memory_mtd_start + mtd_size)
390#endif
391#if DMA_UNCACHED_REGION > 0
392 , (void *)(_ramend - DMA_UNCACHED_REGION), (void *)(_ramend)
393#endif
394 );
395 709
396 /*
397 * give all the memory to the bootmap allocator, tell it to put the
398 * boot mem_map at the start of memory
399 */
400 bootmap_size = init_bootmem_node(NODE_DATA(0), memory_start >> PAGE_SHIFT, /* map goes here */
401 PAGE_OFFSET >> PAGE_SHIFT,
402 memory_end >> PAGE_SHIFT);
403 /*
404 * free the usable memory, we have to make sure we do not free
405 * the bootmem bitmap so we then reserve it after freeing it :-)
406 */
407 free_bootmem(memory_start, memory_end - memory_start);
408
409 reserve_bootmem(memory_start, bootmap_size, BOOTMEM_DEFAULT);
410 /*
411 * get kmalloc into gear
412 */
413 paging_init(); 710 paging_init();
414 711
415 /* check the size of the l1 area */ 712 /* check the size of the l1 area */
@@ -450,15 +747,15 @@ void __init setup_arch(char **cmdline_p)
450 747
451static int __init topology_init(void) 748static int __init topology_init(void)
452{ 749{
453#if defined (CONFIG_BF561) 750 int cpu;
454 static struct cpu cpu[2]; 751
455 register_cpu(&cpu[0], 0); 752 for_each_possible_cpu(cpu) {
456 register_cpu(&cpu[1], 1); 753 struct cpu *c = &per_cpu(cpu_devices, cpu);
754
755 register_cpu(c, cpu);
756 }
757
457 return 0; 758 return 0;
458#else
459 static struct cpu cpu[1];
460 return register_cpu(cpu, 0);
461#endif
462} 759}
463 760
464subsys_initcall(topology_init); 761subsys_initcall(topology_init);
@@ -700,7 +997,7 @@ static void c_stop(struct seq_file *m, void *v)
700{ 997{
701} 998}
702 999
703struct seq_operations cpuinfo_op = { 1000const struct seq_operations cpuinfo_op = {
704 .start = c_start, 1001 .start = c_start,
705 .next = c_next, 1002 .next = c_next,
706 .stop = c_stop, 1003 .stop = c_stop,
diff --git a/arch/blackfin/kernel/traps.c b/arch/blackfin/kernel/traps.c
index 66b5f3e3ae2a..58717cb19707 100644
--- a/arch/blackfin/kernel/traps.c
+++ b/arch/blackfin/kernel/traps.c
@@ -649,7 +649,7 @@ void dump_bfin_process(struct pt_regs *fp)
649 if (context & 0x0020 && (fp->seqstat & SEQSTAT_EXCAUSE) == VEC_HWERR) 649 if (context & 0x0020 && (fp->seqstat & SEQSTAT_EXCAUSE) == VEC_HWERR)
650 printk(KERN_NOTICE "HW Error context\n"); 650 printk(KERN_NOTICE "HW Error context\n");
651 else if (context & 0x0020) 651 else if (context & 0x0020)
652 printk(KERN_NOTICE "Defered Exception context\n"); 652 printk(KERN_NOTICE "Deferred Exception context\n");
653 else if (context & 0x3FC0) 653 else if (context & 0x3FC0)
654 printk(KERN_NOTICE "Interrupt context\n"); 654 printk(KERN_NOTICE "Interrupt context\n");
655 else if (context & 0x4000) 655 else if (context & 0x4000)
diff --git a/arch/blackfin/kernel/vmlinux.lds.S b/arch/blackfin/kernel/vmlinux.lds.S
index 858722421b40..aed832540b3b 100644
--- a/arch/blackfin/kernel/vmlinux.lds.S
+++ b/arch/blackfin/kernel/vmlinux.lds.S
@@ -41,6 +41,9 @@ _jiffies = _jiffies_64;
41SECTIONS 41SECTIONS
42{ 42{
43 . = CONFIG_BOOT_LOAD; 43 . = CONFIG_BOOT_LOAD;
44 /* Neither the text, ro_data or bss section need to be aligned
45 * So pack them back to back
46 */
44 .text : 47 .text :
45 { 48 {
46 __text = .; 49 __text = .;
@@ -58,22 +61,25 @@ SECTIONS
58 *(__ex_table) 61 *(__ex_table)
59 ___stop___ex_table = .; 62 ___stop___ex_table = .;
60 63
61 . = ALIGN(4);
62 __etext = .; 64 __etext = .;
63 } 65 }
64 66
65 RO_DATA(PAGE_SIZE) 67 /* Just in case the first read only is a 32-bit access */
68 RO_DATA(4)
69
70 .bss :
71 {
72 . = ALIGN(4);
73 ___bss_start = .;
74 *(.bss .bss.*)
75 *(COMMON)
76 ___bss_stop = .;
77 }
66 78
67 .data : 79 .data :
68 { 80 {
69 /* make sure the init_task is aligned to the
70 * kernel thread size so we can locate the kernel
71 * stack properly and quickly.
72 */
73 __sdata = .; 81 __sdata = .;
74 . = ALIGN(THREAD_SIZE); 82 /* This gets done first, so the glob doesn't suck it in */
75 *(.data.init_task)
76
77 . = ALIGN(32); 83 . = ALIGN(32);
78 *(.data.cacheline_aligned) 84 *(.data.cacheline_aligned)
79 85
@@ -81,10 +87,22 @@ SECTIONS
81 *(.data.*) 87 *(.data.*)
82 CONSTRUCTORS 88 CONSTRUCTORS
83 89
90 /* make sure the init_task is aligned to the
91 * kernel thread size so we can locate the kernel
92 * stack properly and quickly.
93 */
84 . = ALIGN(THREAD_SIZE); 94 . = ALIGN(THREAD_SIZE);
95 *(.init_task.data)
96
85 __edata = .; 97 __edata = .;
86 } 98 }
87 99
100 /* The init section should be last, so when we free it, it goes into
101 * the general memory pool, and (hopefully) will decrease fragmentation
102 * a tiny bit. The init section has a _requirement_ that it be
103 * PAGE_SIZE aligned
104 */
105 . = ALIGN(PAGE_SIZE);
88 ___init_begin = .; 106 ___init_begin = .;
89 107
90 .init.text : 108 .init.text :
@@ -179,16 +197,7 @@ SECTIONS
179 . = ALIGN(PAGE_SIZE); 197 . = ALIGN(PAGE_SIZE);
180 ___init_end = .; 198 ___init_end = .;
181 199
182 .bss : 200 __end =.;
183 {
184 . = ALIGN(4);
185 ___bss_start = .;
186 *(.bss .bss.*)
187 *(COMMON)
188 . = ALIGN(4);
189 ___bss_stop = .;
190 __end = .;
191 }
192 201
193 STABS_DEBUG 202 STABS_DEBUG
194 203
diff --git a/arch/blackfin/mach-bf527/boards/ezkit.c b/arch/blackfin/mach-bf527/boards/ezkit.c
index 1795aab79064..337515fba612 100644
--- a/arch/blackfin/mach-bf527/boards/ezkit.c
+++ b/arch/blackfin/mach-bf527/boards/ezkit.c
@@ -41,7 +41,9 @@
41#include <linux/irq.h> 41#include <linux/irq.h>
42#include <linux/interrupt.h> 42#include <linux/interrupt.h>
43#include <linux/usb/sl811.h> 43#include <linux/usb/sl811.h>
44#if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
44#include <linux/usb/musb.h> 45#include <linux/usb/musb.h>
46#endif
45#include <asm/cplb.h> 47#include <asm/cplb.h>
46#include <asm/dma.h> 48#include <asm/dma.h>
47#include <asm/bfin5xx_spi.h> 49#include <asm/bfin5xx_spi.h>
@@ -517,6 +519,14 @@ static struct bfin5xx_spi_chip spi_wm8731_chip_info = {
517 .bits_per_word = 16, 519 .bits_per_word = 16,
518}; 520};
519#endif 521#endif
522
523#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
524static struct bfin5xx_spi_chip spidev_chip_info = {
525 .enable_dma = 0,
526 .bits_per_word = 8,
527};
528#endif
529
520static struct spi_board_info bfin_spi_board_info[] __initdata = { 530static struct spi_board_info bfin_spi_board_info[] __initdata = {
521#if defined(CONFIG_MTD_M25P80) \ 531#if defined(CONFIG_MTD_M25P80) \
522 || defined(CONFIG_MTD_M25P80_MODULE) 532 || defined(CONFIG_MTD_M25P80_MODULE)
@@ -634,6 +644,15 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
634 .mode = SPI_MODE_0, 644 .mode = SPI_MODE_0,
635 }, 645 },
636#endif 646#endif
647#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
648 {
649 .modalias = "spidev",
650 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
651 .bus_num = 0,
652 .chip_select = 1,
653 .controller_data = &spidev_chip_info,
654 },
655#endif
637}; 656};
638 657
639/* SPI controller data */ 658/* SPI controller data */
diff --git a/arch/blackfin/mach-bf533/boards/ezkit.c b/arch/blackfin/mach-bf533/boards/ezkit.c
index 4026c2f3ab4e..2b09aa39f565 100644
--- a/arch/blackfin/mach-bf533/boards/ezkit.c
+++ b/arch/blackfin/mach-bf533/boards/ezkit.c
@@ -34,7 +34,9 @@
34#include <linux/mtd/partitions.h> 34#include <linux/mtd/partitions.h>
35#include <linux/spi/spi.h> 35#include <linux/spi/spi.h>
36#include <linux/spi/flash.h> 36#include <linux/spi/flash.h>
37#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
37#include <linux/usb/isp1362.h> 38#include <linux/usb/isp1362.h>
39#endif
38#include <linux/ata_platform.h> 40#include <linux/ata_platform.h>
39#include <linux/irq.h> 41#include <linux/irq.h>
40#include <asm/dma.h> 42#include <asm/dma.h>
@@ -134,6 +136,13 @@ static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
134}; 136};
135#endif 137#endif
136 138
139#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
140static struct bfin5xx_spi_chip spidev_chip_info = {
141 .enable_dma = 0,
142 .bits_per_word = 8,
143};
144#endif
145
137static struct spi_board_info bfin_spi_board_info[] __initdata = { 146static struct spi_board_info bfin_spi_board_info[] __initdata = {
138#if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE) 147#if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
139 { 148 {
@@ -168,6 +177,15 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
168 .controller_data = &ad1836_spi_chip_info, 177 .controller_data = &ad1836_spi_chip_info,
169 }, 178 },
170#endif 179#endif
180#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
181 {
182 .modalias = "spidev",
183 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
184 .bus_num = 0,
185 .chip_select = 1,
186 .controller_data = &spidev_chip_info,
187 },
188#endif
171}; 189};
172 190
173/* SPI (0) */ 191/* SPI (0) */
diff --git a/arch/blackfin/mach-bf533/boards/stamp.c b/arch/blackfin/mach-bf533/boards/stamp.c
index 0185350feacc..a645f6fd091b 100644
--- a/arch/blackfin/mach-bf533/boards/stamp.c
+++ b/arch/blackfin/mach-bf533/boards/stamp.c
@@ -226,6 +226,13 @@ static struct bfin5xx_spi_chip spi_mmc_chip_info = {
226}; 226};
227#endif 227#endif
228 228
229#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
230static struct bfin5xx_spi_chip spidev_chip_info = {
231 .enable_dma = 0,
232 .bits_per_word = 8,
233};
234#endif
235
229static struct spi_board_info bfin_spi_board_info[] __initdata = { 236static struct spi_board_info bfin_spi_board_info[] __initdata = {
230#if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE) 237#if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
231 { 238 {
@@ -312,6 +319,15 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
312 .mode = SPI_MODE_2, 319 .mode = SPI_MODE_2,
313 }, 320 },
314#endif 321#endif
322#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
323 {
324 .modalias = "spidev",
325 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
326 .bus_num = 0,
327 .chip_select = 1,
328 .controller_data = &spidev_chip_info,
329 },
330#endif
315}; 331};
316 332
317/* SPI (0) */ 333/* SPI (0) */
@@ -423,9 +439,9 @@ static struct platform_device bfin_pata_device = {
423#include <linux/gpio_keys.h> 439#include <linux/gpio_keys.h>
424 440
425static struct gpio_keys_button bfin_gpio_keys_table[] = { 441static struct gpio_keys_button bfin_gpio_keys_table[] = {
426 {BTN_0, GPIO_PF5, 1, "gpio-keys: BTN0"}, 442 {BTN_0, GPIO_PF5, 0, "gpio-keys: BTN0"},
427 {BTN_1, GPIO_PF6, 1, "gpio-keys: BTN1"}, 443 {BTN_1, GPIO_PF6, 0, "gpio-keys: BTN1"},
428 {BTN_2, GPIO_PF8, 1, "gpio-keys: BTN2"}, 444 {BTN_2, GPIO_PF8, 0, "gpio-keys: BTN2"},
429}; 445};
430 446
431static struct gpio_keys_platform_data bfin_gpio_keys_data = { 447static struct gpio_keys_platform_data bfin_gpio_keys_data = {
diff --git a/arch/blackfin/mach-bf537/boards/stamp.c b/arch/blackfin/mach-bf537/boards/stamp.c
index 119e6ea83384..9e2277e0d25c 100644
--- a/arch/blackfin/mach-bf537/boards/stamp.c
+++ b/arch/blackfin/mach-bf537/boards/stamp.c
@@ -487,6 +487,13 @@ static const struct ad7877_platform_data bfin_ad7877_ts_info = {
487}; 487};
488#endif 488#endif
489 489
490#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
491static struct bfin5xx_spi_chip spidev_chip_info = {
492 .enable_dma = 0,
493 .bits_per_word = 8,
494};
495#endif
496
490static struct spi_board_info bfin_spi_board_info[] __initdata = { 497static struct spi_board_info bfin_spi_board_info[] __initdata = {
491#if defined(CONFIG_MTD_M25P80) \ 498#if defined(CONFIG_MTD_M25P80) \
492 || defined(CONFIG_MTD_M25P80_MODULE) 499 || defined(CONFIG_MTD_M25P80_MODULE)
@@ -593,6 +600,15 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
593 .controller_data = &spi_ad7877_chip_info, 600 .controller_data = &spi_ad7877_chip_info,
594 }, 601 },
595#endif 602#endif
603#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
604 {
605 .modalias = "spidev",
606 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
607 .bus_num = 0,
608 .chip_select = 1,
609 .controller_data = &spidev_chip_info,
610 },
611#endif
596}; 612};
597 613
598/* SPI controller data */ 614/* SPI controller data */
diff --git a/arch/blackfin/mach-bf548/boards/ezkit.c b/arch/blackfin/mach-bf548/boards/ezkit.c
index 14860f04d1bd..916e963e83ba 100644
--- a/arch/blackfin/mach-bf548/boards/ezkit.c
+++ b/arch/blackfin/mach-bf548/boards/ezkit.c
@@ -37,7 +37,9 @@
37#include <linux/spi/flash.h> 37#include <linux/spi/flash.h>
38#include <linux/irq.h> 38#include <linux/irq.h>
39#include <linux/interrupt.h> 39#include <linux/interrupt.h>
40#if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
40#include <linux/usb/musb.h> 41#include <linux/usb/musb.h>
42#endif
41#include <asm/bfin5xx_spi.h> 43#include <asm/bfin5xx_spi.h>
42#include <asm/cplb.h> 44#include <asm/cplb.h>
43#include <asm/dma.h> 45#include <asm/dma.h>
@@ -420,6 +422,13 @@ static const struct ad7877_platform_data bfin_ad7877_ts_info = {
420}; 422};
421#endif 423#endif
422 424
425#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
426static struct bfin5xx_spi_chip spidev_chip_info = {
427 .enable_dma = 0,
428 .bits_per_word = 8,
429};
430#endif
431
423static struct spi_board_info bf54x_spi_board_info[] __initdata = { 432static struct spi_board_info bf54x_spi_board_info[] __initdata = {
424#if defined(CONFIG_MTD_M25P80) \ 433#if defined(CONFIG_MTD_M25P80) \
425 || defined(CONFIG_MTD_M25P80_MODULE) 434 || defined(CONFIG_MTD_M25P80_MODULE)
@@ -445,6 +454,15 @@ static struct spi_board_info bf54x_spi_board_info[] __initdata = {
445 .controller_data = &spi_ad7877_chip_info, 454 .controller_data = &spi_ad7877_chip_info,
446}, 455},
447#endif 456#endif
457#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
458 {
459 .modalias = "spidev",
460 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
461 .bus_num = 0,
462 .chip_select = 1,
463 .controller_data = &spidev_chip_info,
464 },
465#endif
448}; 466};
449 467
450/* SPI (0) */ 468/* SPI (0) */
@@ -631,7 +649,7 @@ static struct platform_device *ezkit_devices[] __initdata = {
631 &ezkit_flash_device, 649 &ezkit_flash_device,
632}; 650};
633 651
634static int __init stamp_init(void) 652static int __init ezkit_init(void)
635{ 653{
636 printk(KERN_INFO "%s(): registering device resources\n", __FUNCTION__); 654 printk(KERN_INFO "%s(): registering device resources\n", __FUNCTION__);
637 platform_add_devices(ezkit_devices, ARRAY_SIZE(ezkit_devices)); 655 platform_add_devices(ezkit_devices, ARRAY_SIZE(ezkit_devices));
@@ -644,4 +662,4 @@ static int __init stamp_init(void)
644 return 0; 662 return 0;
645} 663}
646 664
647arch_initcall(stamp_init); 665arch_initcall(ezkit_init);
diff --git a/arch/blackfin/mach-bf548/dma.c b/arch/blackfin/mach-bf548/dma.c
index 957bf1366eff..374803a8d2e8 100644
--- a/arch/blackfin/mach-bf548/dma.c
+++ b/arch/blackfin/mach-bf548/dma.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * File: arch/blackfin/mach-bf561/dma.c 2 * File: arch/blackfin/mach-bf548/dma.c
3 * Based on: 3 * Based on:
4 * Author: 4 * Author:
5 * 5 *
@@ -7,7 +7,7 @@
7 * Description: This file contains the simple DMA Implementation for Blackfin 7 * Description: This file contains the simple DMA Implementation for Blackfin
8 * 8 *
9 * Modified: 9 * Modified:
10 * Copyright 2004-2007 Analog Devices Inc. 10 * Copyright 2004-2008 Analog Devices Inc.
11 * 11 *
12 * Bugs: Enter bugs at http://blackfin.uclinux.org/ 12 * Bugs: Enter bugs at http://blackfin.uclinux.org/
13 * 13 *
diff --git a/arch/blackfin/mach-bf561/boards/ezkit.c b/arch/blackfin/mach-bf561/boards/ezkit.c
index ed863ce9a2d8..43c1b0982819 100644
--- a/arch/blackfin/mach-bf561/boards/ezkit.c
+++ b/arch/blackfin/mach-bf561/boards/ezkit.c
@@ -92,6 +92,68 @@ void __exit bfin_isp1761_exit(void)
92arch_initcall(bfin_isp1761_init); 92arch_initcall(bfin_isp1761_init);
93#endif 93#endif
94 94
95#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
96#include <linux/usb/isp1362.h>
97
98static struct resource isp1362_hcd_resources[] = {
99 {
100 .start = 0x2c060000,
101 .end = 0x2c060000,
102 .flags = IORESOURCE_MEM,
103 }, {
104 .start = 0x2c060004,
105 .end = 0x2c060004,
106 .flags = IORESOURCE_MEM,
107 }, {
108 .start = IRQ_PF8,
109 .end = IRQ_PF8,
110 .flags = IORESOURCE_IRQ,
111 },
112};
113
114static struct isp1362_platform_data isp1362_priv = {
115 .sel15Kres = 1,
116 .clknotstop = 0,
117 .oc_enable = 0,
118 .int_act_high = 0,
119 .int_edge_triggered = 0,
120 .remote_wakeup_connected = 0,
121 .no_power_switching = 1,
122 .power_switching_mode = 0,
123};
124
125static struct platform_device isp1362_hcd_device = {
126 .name = "isp1362-hcd",
127 .id = 0,
128 .dev = {
129 .platform_data = &isp1362_priv,
130 },
131 .num_resources = ARRAY_SIZE(isp1362_hcd_resources),
132 .resource = isp1362_hcd_resources,
133};
134#endif
135
136#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
137static struct resource net2272_bfin_resources[] = {
138 {
139 .start = 0x2C000000,
140 .end = 0x2C000000 + 0x7F,
141 .flags = IORESOURCE_MEM,
142 }, {
143 .start = IRQ_PF10,
144 .end = IRQ_PF10,
145 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
146 },
147};
148
149static struct platform_device net2272_bfin_device = {
150 .name = "net2272",
151 .id = -1,
152 .num_resources = ARRAY_SIZE(net2272_bfin_resources),
153 .resource = net2272_bfin_resources,
154};
155#endif
156
95/* 157/*
96 * USB-LAN EzExtender board 158 * USB-LAN EzExtender board
97 * Driver needs to know address, irq and flag pin. 159 * Driver needs to know address, irq and flag pin.
@@ -204,6 +266,13 @@ static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
204 .bits_per_word = 16, 266 .bits_per_word = 16,
205}; 267};
206#endif 268#endif
269
270#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
271static struct bfin5xx_spi_chip spidev_chip_info = {
272 .enable_dma = 0,
273 .bits_per_word = 8,
274};
275#endif
207#endif 276#endif
208 277
209/* SPI (0) */ 278/* SPI (0) */
@@ -248,6 +317,15 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
248 .controller_data = &ad1836_spi_chip_info, 317 .controller_data = &ad1836_spi_chip_info,
249 }, 318 },
250#endif 319#endif
320#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
321 {
322 .modalias = "spidev",
323 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
324 .bus_num = 0,
325 .chip_select = 1,
326 .controller_data = &spidev_chip_info,
327 },
328#endif
251}; 329};
252 330
253#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE) 331#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
@@ -340,6 +418,10 @@ static struct platform_device *ezkit_devices[] __initdata = {
340 &ax88180_device, 418 &ax88180_device,
341#endif 419#endif
342 420
421#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
422 &net2272_bfin_device,
423#endif
424
343#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) 425#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
344 &bfin_spi0_device, 426 &bfin_spi0_device,
345#endif 427#endif
@@ -359,6 +441,11 @@ static struct platform_device *ezkit_devices[] __initdata = {
359#if defined(CONFIG_I2C_GPIO) || defined(CONFIG_I2C_GPIO_MODULE) 441#if defined(CONFIG_I2C_GPIO) || defined(CONFIG_I2C_GPIO_MODULE)
360 &i2c_gpio_device, 442 &i2c_gpio_device,
361#endif 443#endif
444
445#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
446 &isp1362_hcd_device,
447#endif
448
362 &ezkit_flash_device, 449 &ezkit_flash_device,
363}; 450};
364 451
diff --git a/arch/blackfin/mach-common/Makefile b/arch/blackfin/mach-common/Makefile
index 8636d4284bdb..15e33ca1ce80 100644
--- a/arch/blackfin/mach-common/Makefile
+++ b/arch/blackfin/mach-common/Makefile
@@ -4,8 +4,6 @@
4 4
5obj-y := \ 5obj-y := \
6 cache.o cacheinit.o entry.o \ 6 cache.o cacheinit.o entry.o \
7 interrupt.o lock.o irqpanic.o arch_checks.o 7 interrupt.o lock.o irqpanic.o arch_checks.o ints-priority.o
8 8
9obj-$(CONFIG_BFIN_SINGLE_CORE) += ints-priority-sc.o
10obj-$(CONFIG_BFIN_DUAL_CORE) += ints-priority-dc.o
11obj-$(CONFIG_PM) += pm.o dpmc.o 9obj-$(CONFIG_PM) += pm.o dpmc.o
diff --git a/arch/blackfin/mach-common/dpmc.S b/arch/blackfin/mach-common/dpmc.S
index b82c096e1980..b80ddd8b232d 100644
--- a/arch/blackfin/mach-common/dpmc.S
+++ b/arch/blackfin/mach-common/dpmc.S
@@ -191,6 +191,9 @@ ENTRY(_sleep_mode)
191 call _test_pll_locked; 191 call _test_pll_locked;
192 192
193 R0 = IWR_ENABLE(0); 193 R0 = IWR_ENABLE(0);
194 R1 = IWR_DISABLE_ALL;
195 R2 = IWR_DISABLE_ALL;
196
194 call _set_sic_iwr; 197 call _set_sic_iwr;
195 198
196 P0.H = hi(PLL_CTL); 199 P0.H = hi(PLL_CTL);
@@ -237,6 +240,10 @@ ENTRY(_deep_sleep)
237 240
238 CLI R4; 241 CLI R4;
239 242
243 R0 = IWR_ENABLE(0);
244 R1 = IWR_DISABLE_ALL;
245 R2 = IWR_DISABLE_ALL;
246
240 call _set_sic_iwr; 247 call _set_sic_iwr;
241 248
242 call _set_dram_srfs; 249 call _set_dram_srfs;
@@ -261,6 +268,9 @@ ENTRY(_deep_sleep)
261 call _test_pll_locked; 268 call _test_pll_locked;
262 269
263 R0 = IWR_ENABLE(0); 270 R0 = IWR_ENABLE(0);
271 R1 = IWR_DISABLE_ALL;
272 R2 = IWR_DISABLE_ALL;
273
264 call _set_sic_iwr; 274 call _set_sic_iwr;
265 275
266 P0.H = hi(PLL_CTL); 276 P0.H = hi(PLL_CTL);
@@ -286,7 +296,13 @@ ENTRY(_sleep_deeper)
286 CLI R4; 296 CLI R4;
287 297
288 P3 = R0; 298 P3 = R0;
299 P4 = R1;
300 P5 = R2;
301
289 R0 = IWR_ENABLE(0); 302 R0 = IWR_ENABLE(0);
303 R1 = IWR_DISABLE_ALL;
304 R2 = IWR_DISABLE_ALL;
305
290 call _set_sic_iwr; 306 call _set_sic_iwr;
291 call _set_dram_srfs; /* Set SDRAM Self Refresh */ 307 call _set_dram_srfs; /* Set SDRAM Self Refresh */
292 308
@@ -327,6 +343,8 @@ ENTRY(_sleep_deeper)
327 call _test_pll_locked; 343 call _test_pll_locked;
328 344
329 R0 = P3; 345 R0 = P3;
346 R1 = P4;
347 R3 = P5;
330 call _set_sic_iwr; /* Set Awake from IDLE */ 348 call _set_sic_iwr; /* Set Awake from IDLE */
331 349
332 P0.H = hi(PLL_CTL); 350 P0.H = hi(PLL_CTL);
@@ -340,6 +358,9 @@ ENTRY(_sleep_deeper)
340 call _test_pll_locked; 358 call _test_pll_locked;
341 359
342 R0 = IWR_ENABLE(0); 360 R0 = IWR_ENABLE(0);
361 R1 = IWR_DISABLE_ALL;
362 R2 = IWR_DISABLE_ALL;
363
343 call _set_sic_iwr; /* Set Awake from IDLE PLL */ 364 call _set_sic_iwr; /* Set Awake from IDLE PLL */
344 365
345 P0.H = hi(VR_CTL); 366 P0.H = hi(VR_CTL);
@@ -417,14 +438,23 @@ ENTRY(_unset_dram_srfs)
417 RTS; 438 RTS;
418 439
419ENTRY(_set_sic_iwr) 440ENTRY(_set_sic_iwr)
420#if defined(CONFIG_BF54x) || defined(CONFIG_BF52x) 441#if defined(CONFIG_BF54x) || defined(CONFIG_BF52x) || defined(CONFIG_BF561)
421 P0.H = hi(SIC_IWR0); 442 P0.H = hi(SIC_IWR0);
422 P0.L = lo(SIC_IWR0); 443 P0.L = lo(SIC_IWR0);
444 P1.H = hi(SIC_IWR1);
445 P1.L = lo(SIC_IWR1);
446 [P1] = R1;
447#if defined(CONFIG_BF54x)
448 P1.H = hi(SIC_IWR2);
449 P1.L = lo(SIC_IWR2);
450 [P1] = R2;
451#endif
423#else 452#else
424 P0.H = hi(SIC_IWR); 453 P0.H = hi(SIC_IWR);
425 P0.L = lo(SIC_IWR); 454 P0.L = lo(SIC_IWR);
426#endif 455#endif
427 [P0] = R0; 456 [P0] = R0;
457
428 SSYNC; 458 SSYNC;
429 RTS; 459 RTS;
430 460
diff --git a/arch/blackfin/mach-common/entry.S b/arch/blackfin/mach-common/entry.S
index fdd9bf43361e..2cbb7a0bc38e 100644
--- a/arch/blackfin/mach-common/entry.S
+++ b/arch/blackfin/mach-common/entry.S
@@ -121,6 +121,7 @@ ENTRY(_ex_icplb_miss)
121 (R7:6,P5:4) = [sp++]; 121 (R7:6,P5:4) = [sp++];
122 ASTAT = [sp++]; 122 ASTAT = [sp++];
123 SAVE_ALL_SYS 123 SAVE_ALL_SYS
124 DEBUG_HWTRACE_SAVE(p5, r7)
124#ifdef CONFIG_MPU 125#ifdef CONFIG_MPU
125 R0 = SEQSTAT; 126 R0 = SEQSTAT;
126 R1 = SP; 127 R1 = SP;
@@ -132,14 +133,13 @@ ENTRY(_ex_icplb_miss)
132#else 133#else
133 call __cplb_hdr; 134 call __cplb_hdr;
134#endif 135#endif
135 DEBUG_START_HWTRACE(p5, r7) 136 DEBUG_HWTRACE_RESTORE(p5, r7)
136 RESTORE_ALL_SYS 137 RESTORE_ALL_SYS
137 SP = EX_SCRATCH_REG; 138 SP = EX_SCRATCH_REG;
138 rtx; 139 rtx;
139ENDPROC(_ex_icplb_miss) 140ENDPROC(_ex_icplb_miss)
140 141
141ENTRY(_ex_syscall) 142ENTRY(_ex_syscall)
142 DEBUG_START_HWTRACE(p5, r7)
143 (R7:6,P5:4) = [sp++]; 143 (R7:6,P5:4) = [sp++];
144 ASTAT = [sp++]; 144 ASTAT = [sp++];
145 raise 15; /* invoked by TRAP #0, for sys call */ 145 raise 15; /* invoked by TRAP #0, for sys call */
@@ -178,7 +178,6 @@ ENTRY(_ex_single_step)
178ENDPROC(_ex_single_step) 178ENDPROC(_ex_single_step)
179 179
180ENTRY(_bfin_return_from_exception) 180ENTRY(_bfin_return_from_exception)
181 DEBUG_START_HWTRACE(p5, r7)
182#if ANOMALY_05000257 181#if ANOMALY_05000257
183 R7=LC0; 182 R7=LC0;
184 LC0=R7; 183 LC0=R7;
@@ -200,10 +199,9 @@ ENTRY(_handle_bad_cplb)
200 * need to make a CPLB exception look like a normal exception 199 * need to make a CPLB exception look like a normal exception
201 */ 200 */
202 201
203 DEBUG_START_HWTRACE(p5, r7)
204 RESTORE_ALL_SYS 202 RESTORE_ALL_SYS
205 [--sp] = ASTAT; 203 [--sp] = ASTAT;
206 [--sp] = (R7:6, P5:4); 204 [--sp] = (R7:6,P5:4);
207 205
208ENTRY(_ex_replaceable) 206ENTRY(_ex_replaceable)
209 nop; 207 nop;
@@ -253,7 +251,6 @@ ENTRY(_ex_trap_c)
253 R6 = SEQSTAT; 251 R6 = SEQSTAT;
254 [P5] = R6; 252 [P5] = R6;
255 253
256 DEBUG_START_HWTRACE(p5, r7)
257 (R7:6,P5:4) = [sp++]; 254 (R7:6,P5:4) = [sp++];
258 ASTAT = [sp++]; 255 ASTAT = [sp++];
259 SP = EX_SCRATCH_REG; 256 SP = EX_SCRATCH_REG;
@@ -382,8 +379,7 @@ ENTRY(_trap) /* Exception: 4th entry into system event table(supervisor mode)*/
382 sp.h = _exception_stack_top; 379 sp.h = _exception_stack_top;
383 /* Try to deal with syscalls quickly. */ 380 /* Try to deal with syscalls quickly. */
384 [--sp] = ASTAT; 381 [--sp] = ASTAT;
385 [--sp] = (R7:6, P5:4); 382 [--sp] = (R7:6,P5:4);
386 DEBUG_STOP_HWTRACE(p5, r7)
387 r7 = SEQSTAT; /* reason code is in bit 5:0 */ 383 r7 = SEQSTAT; /* reason code is in bit 5:0 */
388 r6.l = lo(SEQSTAT_EXCAUSE); 384 r6.l = lo(SEQSTAT_EXCAUSE);
389 r6.h = hi(SEQSTAT_EXCAUSE); 385 r6.h = hi(SEQSTAT_EXCAUSE);
diff --git a/arch/blackfin/mach-common/ints-priority-dc.c b/arch/blackfin/mach-common/ints-priority-dc.c
deleted file mode 100644
index 8d18d6b163bb..000000000000
--- a/arch/blackfin/mach-common/ints-priority-dc.c
+++ /dev/null
@@ -1,484 +0,0 @@
1/*
2 * File: arch/blackfin/mach-common/ints-priority-dc.c
3 * Based on:
4 * Author:
5 *
6 * Created: ?
7 * Description: Set up the interrupt priorities
8 *
9 * Modified:
10 * 1996 Roman Zippel
11 * 1999 D. Jeff Dionne <jeff@uclinux.org>
12 * 2000-2001 Lineo, Inc. D. Jefff Dionne <jeff@lineo.ca>
13 * 2002 Arcturus Networks Inc. MaTed <mated@sympatico.ca>
14 * 2003 Metrowerks/Motorola
15 * 2003 Bas Vermeulen <bas@buyways.nl>
16 * Copyright 2004-2006 Analog Devices Inc.
17 *
18 * Bugs: Enter bugs at http://blackfin.uclinux.org/
19 *
20 * This program is free software; you can redistribute it and/or modify
21 * it under the terms of the GNU General Public License as published by
22 * the Free Software Foundation; either version 2 of the License, or
23 * (at your option) any later version.
24 *
25 * This program is distributed in the hope that it will be useful,
26 * but WITHOUT ANY WARRANTY; without even the implied warranty of
27 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
28 * GNU General Public License for more details.
29 *
30 * You should have received a copy of the GNU General Public License
31 * along with this program; if not, see the file COPYING, or write
32 * to the Free Software Foundation, Inc.,
33 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
34 */
35
36#include <linux/module.h>
37#include <linux/kernel_stat.h>
38#include <linux/seq_file.h>
39#include <linux/irq.h>
40#ifdef CONFIG_KGDB
41#include <linux/kgdb.h>
42#endif
43#include <asm/traps.h>
44#include <asm/blackfin.h>
45#include <asm/gpio.h>
46#include <asm/irq_handler.h>
47
48/*
49 * NOTES:
50 * - we have separated the physical Hardware interrupt from the
51 * levels that the LINUX kernel sees (see the description in irq.h)
52 * -
53 */
54
55/* Initialize this to an actual value to force it into the .data
56 * section so that we know it is properly initialized at entry into
57 * the kernel but before bss is initialized to zero (which is where
58 * it would live otherwise). The 0x1f magic represents the IRQs we
59 * cannot actually mask out in hardware.
60 */
61unsigned long irq_flags = 0x1f;
62
63/* The number of spurious interrupts */
64atomic_t num_spurious;
65
66struct ivgx {
67 /* irq number for request_irq, available in mach-bf561/irq.h */
68 int irqno;
69 /* corresponding bit in the SICA_ISR0 register */
70 int isrflag0;
71 /* corresponding bit in the SICA_ISR1 register */
72 int isrflag1;
73} ivg_table[NR_PERI_INTS];
74
75struct ivg_slice {
76 /* position of first irq in ivg_table for given ivg */
77 struct ivgx *ifirst;
78 struct ivgx *istop;
79} ivg7_13[IVG13 - IVG7 + 1];
80
81static void search_IAR(void);
82
83/*
84 * Search SIC_IAR and fill tables with the irqvalues
85 * and their positions in the SIC_ISR register.
86 */
87static void __init search_IAR(void)
88{
89 unsigned ivg, irq_pos = 0;
90 for (ivg = 0; ivg <= IVG13 - IVG7; ivg++) {
91 int irqn;
92
93 ivg7_13[ivg].istop = ivg7_13[ivg].ifirst = &ivg_table[irq_pos];
94
95 for (irqn = 0; irqn < NR_PERI_INTS; irqn++) {
96 int iar_shift = (irqn & 7) * 4;
97 if (ivg ==
98 (0xf &
99 bfin_read32((unsigned long *)SICA_IAR0 +
100 (irqn >> 3)) >> iar_shift)) {
101 ivg_table[irq_pos].irqno = IVG7 + irqn;
102 ivg_table[irq_pos].isrflag0 =
103 (irqn < 32 ? (1 << irqn) : 0);
104 ivg_table[irq_pos].isrflag1 =
105 (irqn < 32 ? 0 : (1 << (irqn - 32)));
106 ivg7_13[ivg].istop++;
107 irq_pos++;
108 }
109 }
110 }
111}
112
113/*
114 * This is for BF561 internal IRQs
115 */
116
117static void ack_noop(unsigned int irq)
118{
119 /* Dummy function. */
120}
121
122static void bf561_core_mask_irq(unsigned int irq)
123{
124 irq_flags &= ~(1 << irq);
125 if (!irqs_disabled())
126 local_irq_enable();
127}
128
129static void bf561_core_unmask_irq(unsigned int irq)
130{
131 irq_flags |= 1 << irq;
132 /*
133 * If interrupts are enabled, IMASK must contain the same value
134 * as irq_flags. Make sure that invariant holds. If interrupts
135 * are currently disabled we need not do anything; one of the
136 * callers will take care of setting IMASK to the proper value
137 * when reenabling interrupts.
138 * local_irq_enable just does "STI irq_flags", so it's exactly
139 * what we need.
140 */
141 if (!irqs_disabled())
142 local_irq_enable();
143 return;
144}
145
146static void bf561_internal_mask_irq(unsigned int irq)
147{
148 unsigned long irq_mask;
149 if ((irq - (IRQ_CORETMR + 1)) < 32) {
150 irq_mask = (1 << (irq - (IRQ_CORETMR + 1)));
151 bfin_write_SICA_IMASK0(bfin_read_SICA_IMASK0() & ~irq_mask);
152 } else {
153 irq_mask = (1 << (irq - (IRQ_CORETMR + 1) - 32));
154 bfin_write_SICA_IMASK1(bfin_read_SICA_IMASK1() & ~irq_mask);
155 }
156}
157
158static void bf561_internal_unmask_irq(unsigned int irq)
159{
160 unsigned long irq_mask;
161
162 if ((irq - (IRQ_CORETMR + 1)) < 32) {
163 irq_mask = (1 << (irq - (IRQ_CORETMR + 1)));
164 bfin_write_SICA_IMASK0(bfin_read_SICA_IMASK0() | irq_mask);
165 } else {
166 irq_mask = (1 << (irq - (IRQ_CORETMR + 1) - 32));
167 bfin_write_SICA_IMASK1(bfin_read_SICA_IMASK1() | irq_mask);
168 }
169 SSYNC();
170}
171
172static struct irq_chip bf561_core_irqchip = {
173 .ack = ack_noop,
174 .mask = bf561_core_mask_irq,
175 .unmask = bf561_core_unmask_irq,
176};
177
178static struct irq_chip bf561_internal_irqchip = {
179 .ack = ack_noop,
180 .mask = bf561_internal_mask_irq,
181 .unmask = bf561_internal_unmask_irq,
182};
183
184static unsigned short gpio_enabled[gpio_bank(MAX_BLACKFIN_GPIOS)];
185static unsigned short gpio_edge_triggered[gpio_bank(MAX_BLACKFIN_GPIOS)];
186
187static void bf561_gpio_ack_irq(unsigned int irq)
188{
189 u16 gpionr = irq - IRQ_PF0;
190
191 if (gpio_edge_triggered[gpio_bank(gpionr)] & gpio_bit(gpionr)) {
192 set_gpio_data(gpionr, 0);
193 SSYNC();
194 }
195}
196
197static void bf561_gpio_mask_ack_irq(unsigned int irq)
198{
199 u16 gpionr = irq - IRQ_PF0;
200
201 if (gpio_edge_triggered[gpio_bank(gpionr)] & gpio_bit(gpionr)) {
202 set_gpio_data(gpionr, 0);
203 SSYNC();
204 }
205
206 set_gpio_maska(gpionr, 0);
207 SSYNC();
208}
209
210static void bf561_gpio_mask_irq(unsigned int irq)
211{
212 set_gpio_maska(irq - IRQ_PF0, 0);
213 SSYNC();
214}
215
216static void bf561_gpio_unmask_irq(unsigned int irq)
217{
218 set_gpio_maska(irq - IRQ_PF0, 1);
219 SSYNC();
220}
221
222static unsigned int bf561_gpio_irq_startup(unsigned int irq)
223{
224 unsigned int ret;
225 char buf[8];
226 u16 gpionr = irq - IRQ_PF0;
227
228 if (!(gpio_enabled[gpio_bank(gpionr)] & gpio_bit(gpionr))) {
229 snprintf(buf, sizeof buf, "IRQ %d", irq);
230 ret = gpio_request(gpionr, buf);
231 if (ret)
232 return ret;
233
234 }
235
236 gpio_enabled[gpio_bank(gpionr)] |= gpio_bit(gpionr);
237 bf561_gpio_unmask_irq(irq);
238
239 return ret;
240
241}
242
243static void bf561_gpio_irq_shutdown(unsigned int irq)
244{
245 bf561_gpio_mask_irq(irq);
246 gpio_free(irq - IRQ_PF0);
247 gpio_enabled[gpio_bank(irq - IRQ_PF0)] &= ~gpio_bit(irq - IRQ_PF0);
248}
249
250static int bf561_gpio_irq_type(unsigned int irq, unsigned int type)
251{
252
253 unsigned int ret;
254 char buf[8];
255 u16 gpionr = irq - IRQ_PF0;
256
257
258 if (type == IRQ_TYPE_PROBE) {
259 /* only probe unenabled GPIO interrupt lines */
260 if (gpio_enabled[gpio_bank(gpionr)] & gpio_bit(gpionr))
261 return 0;
262 type = IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING;
263
264 }
265
266 if (type & (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING |
267 IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_LEVEL_LOW)) {
268
269 if (!(gpio_enabled[gpio_bank(gpionr)] & gpio_bit(gpionr))) {
270 snprintf(buf, sizeof buf, "IRQ %d", irq);
271 ret = gpio_request(gpionr, buf);
272 if (ret)
273 return ret;
274
275 }
276
277 gpio_enabled[gpio_bank(gpionr)] |= gpio_bit(gpionr);
278 } else {
279 gpio_enabled[gpio_bank(gpionr)] &= ~gpio_bit(gpionr);
280 return 0;
281 }
282
283
284 set_gpio_dir(gpionr, 0);
285 set_gpio_inen(gpionr, 1);
286
287
288 if (type & (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING)) {
289 gpio_edge_triggered[gpio_bank(gpionr)] |= gpio_bit(gpionr);
290 set_gpio_edge(gpionr, 1);
291 } else {
292 set_gpio_edge(gpionr, 0);
293 gpio_edge_triggered[gpio_bank(gpionr)] &= ~gpio_bit(gpionr);
294 }
295
296 if ((type & (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING))
297 == (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING))
298 set_gpio_both(gpionr, 1);
299 else
300 set_gpio_both(gpionr, 0);
301
302 if ((type & (IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_LEVEL_LOW)))
303 set_gpio_polar(gpionr, 1); /* low or falling edge denoted by one */
304 else
305 set_gpio_polar(gpionr, 0); /* high or rising edge denoted by zero */
306
307 SSYNC();
308
309 if (type & (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING))
310 set_irq_handler(irq, handle_edge_irq);
311 else
312 set_irq_handler(irq, handle_level_irq);
313
314 return 0;
315}
316
317static struct irq_chip bf561_gpio_irqchip = {
318 .ack = bf561_gpio_ack_irq,
319 .mask = bf561_gpio_mask_irq,
320 .mask_ack = bf561_gpio_mask_ack_irq,
321 .unmask = bf561_gpio_unmask_irq,
322 .set_type = bf561_gpio_irq_type,
323 .startup = bf561_gpio_irq_startup,
324 .shutdown = bf561_gpio_irq_shutdown
325};
326
327static void bf561_demux_gpio_irq(unsigned int inta_irq,
328 struct irq_desc *intb_desc)
329{
330 int irq, flag_d, mask;
331 u16 gpio;
332
333 switch (inta_irq) {
334 case IRQ_PROG0_INTA:
335 irq = IRQ_PF0;
336 break;
337 case IRQ_PROG1_INTA:
338 irq = IRQ_PF16;
339 break;
340 case IRQ_PROG2_INTA:
341 irq = IRQ_PF32;
342 break;
343 default:
344 dump_stack();
345 return;
346 }
347
348 gpio = irq - IRQ_PF0;
349
350 flag_d = get_gpiop_data(gpio);
351 mask = flag_d & (gpio_enabled[gpio_bank(gpio)] &
352 get_gpiop_maska(gpio));
353
354 do {
355 if (mask & 1) {
356 struct irq_desc *desc = irq_desc + irq;
357 desc->handle_irq(irq, desc);
358 }
359 irq++;
360 mask >>= 1;
361 } while (mask);
362
363
364}
365
366void __init init_exception_vectors(void)
367{
368 SSYNC();
369
370 /* cannot program in software:
371 * evt0 - emulation (jtag)
372 * evt1 - reset
373 */
374 bfin_write_EVT2(evt_nmi);
375 bfin_write_EVT3(trap);
376 bfin_write_EVT5(evt_ivhw);
377 bfin_write_EVT6(evt_timer);
378 bfin_write_EVT7(evt_evt7);
379 bfin_write_EVT8(evt_evt8);
380 bfin_write_EVT9(evt_evt9);
381 bfin_write_EVT10(evt_evt10);
382 bfin_write_EVT11(evt_evt11);
383 bfin_write_EVT12(evt_evt12);
384 bfin_write_EVT13(evt_evt13);
385 bfin_write_EVT14(evt14_softirq);
386 bfin_write_EVT15(evt_system_call);
387 CSYNC();
388}
389
390/*
391 * This function should be called during kernel startup to initialize
392 * the BFin IRQ handling routines.
393 */
394int __init init_arch_irq(void)
395{
396 int irq;
397 unsigned long ilat = 0;
398 /* Disable all the peripheral intrs - page 4-29 HW Ref manual */
399 bfin_write_SICA_IMASK0(SIC_UNMASK_ALL);
400 bfin_write_SICA_IMASK1(SIC_UNMASK_ALL);
401 SSYNC();
402
403 bfin_write_SICA_IWR0(IWR_ENABLE_ALL);
404 bfin_write_SICA_IWR1(IWR_ENABLE_ALL);
405
406 local_irq_disable();
407
408 init_exception_buff();
409
410 for (irq = 0; irq <= SYS_IRQS; irq++) {
411 if (irq <= IRQ_CORETMR)
412 set_irq_chip(irq, &bf561_core_irqchip);
413 else
414 set_irq_chip(irq, &bf561_internal_irqchip);
415
416 if ((irq != IRQ_PROG0_INTA) &&
417 (irq != IRQ_PROG1_INTA) &&
418 (irq != IRQ_PROG2_INTA))
419 set_irq_handler(irq, handle_simple_irq);
420 else
421 set_irq_chained_handler(irq, bf561_demux_gpio_irq);
422 }
423
424 for (irq = IRQ_PF0; irq <= IRQ_PF47; irq++) {
425 set_irq_chip(irq, &bf561_gpio_irqchip);
426 /* if configured as edge, then will be changed to do_edge_IRQ */
427 set_irq_handler(irq, handle_level_irq);
428 }
429
430 bfin_write_IMASK(0);
431 CSYNC();
432 ilat = bfin_read_ILAT();
433 CSYNC();
434 bfin_write_ILAT(ilat);
435 CSYNC();
436
437 printk(KERN_INFO "Configuring Blackfin Priority Driven Interrupts\n");
438 /* IMASK=xxx is equivalent to STI xx or irq_flags=xx,
439 * local_irq_enable()
440 */
441 program_IAR();
442 /* Therefore it's better to setup IARs before interrupts enabled */
443 search_IAR();
444
445 /* Enable interrupts IVG7-15 */
446 irq_flags = irq_flags | IMASK_IVG15 |
447 IMASK_IVG14 | IMASK_IVG13 | IMASK_IVG12 | IMASK_IVG11 |
448 IMASK_IVG10 | IMASK_IVG9 | IMASK_IVG8 | IMASK_IVG7 | IMASK_IVGHW;
449
450 return 0;
451}
452
453#ifdef CONFIG_DO_IRQ_L1
454__attribute__((l1_text))
455#endif
456void do_irq(int vec, struct pt_regs *fp)
457{
458 if (vec == EVT_IVTMR_P) {
459 vec = IRQ_CORETMR;
460 } else {
461 struct ivgx *ivg = ivg7_13[vec - IVG7].ifirst;
462 struct ivgx *ivg_stop = ivg7_13[vec - IVG7].istop;
463 unsigned long sic_status0, sic_status1;
464
465 SSYNC();
466 sic_status0 = bfin_read_SICA_IMASK0() & bfin_read_SICA_ISR0();
467 sic_status1 = bfin_read_SICA_IMASK1() & bfin_read_SICA_ISR1();
468
469 for (;; ivg++) {
470 if (ivg >= ivg_stop) {
471 atomic_inc(&num_spurious);
472 return;
473 } else if ((sic_status0 & ivg->isrflag0) ||
474 (sic_status1 & ivg->isrflag1))
475 break;
476 }
477 vec = ivg->irqno;
478 }
479 asm_do_IRQ(vec, fp);
480
481#ifdef CONFIG_KGDB
482 kgdb_process_breakpoint();
483#endif
484}
diff --git a/arch/blackfin/mach-common/ints-priority-sc.c b/arch/blackfin/mach-common/ints-priority.c
index dec42acb5de0..880595afe98d 100644
--- a/arch/blackfin/mach-common/ints-priority-sc.c
+++ b/arch/blackfin/mach-common/ints-priority.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * File: arch/blackfin/mach-common/ints-priority-sc.c 2 * File: arch/blackfin/mach-common/ints-priority.c
3 * Based on: 3 * Based on:
4 * Author: 4 * Author:
5 * 5 *
@@ -13,7 +13,7 @@
13 * 2002 Arcturus Networks Inc. MaTed <mated@sympatico.ca> 13 * 2002 Arcturus Networks Inc. MaTed <mated@sympatico.ca>
14 * 2003 Metrowerks/Motorola 14 * 2003 Metrowerks/Motorola
15 * 2003 Bas Vermeulen <bas@buyways.nl> 15 * 2003 Bas Vermeulen <bas@buyways.nl>
16 * Copyright 2004-2007 Analog Devices Inc. 16 * Copyright 2004-2008 Analog Devices Inc.
17 * 17 *
18 * Bugs: Enter bugs at http://blackfin.uclinux.org/ 18 * Bugs: Enter bugs at http://blackfin.uclinux.org/
19 * 19 *
@@ -69,6 +69,10 @@ unsigned long irq_flags = 0x1f;
69/* The number of spurious interrupts */ 69/* The number of spurious interrupts */
70atomic_t num_spurious; 70atomic_t num_spurious;
71 71
72#ifdef CONFIG_PM
73unsigned long bfin_sic_iwr[3]; /* Up to 3 SIC_IWRx registers */
74#endif
75
72struct ivgx { 76struct ivgx {
73 /* irq number for request_irq, available in mach-bf533/irq.h */ 77 /* irq number for request_irq, available in mach-bf533/irq.h */
74 unsigned int irqno; 78 unsigned int irqno;
@@ -98,8 +102,7 @@ static void __init search_IAR(void)
98 102
99 for (irqn = 0; irqn < NR_PERI_INTS; irqn++) { 103 for (irqn = 0; irqn < NR_PERI_INTS; irqn++) {
100 int iar_shift = (irqn & 7) * 4; 104 int iar_shift = (irqn & 7) * 4;
101 if (ivg == 105 if (ivg == (0xf &
102 (0xf &
103#ifndef CONFIG_BF52x 106#ifndef CONFIG_BF52x
104 bfin_read32((unsigned long *)SIC_IAR0 + 107 bfin_read32((unsigned long *)SIC_IAR0 +
105 (irqn >> 3)) >> iar_shift)) { 108 (irqn >> 3)) >> iar_shift)) {
@@ -179,6 +182,27 @@ static void bfin_internal_unmask_irq(unsigned int irq)
179 SSYNC(); 182 SSYNC();
180} 183}
181 184
185#ifdef CONFIG_PM
186int bfin_internal_set_wake(unsigned int irq, unsigned int state)
187{
188 unsigned bank, bit;
189 unsigned long flags;
190 bank = (irq - (IRQ_CORETMR + 1)) / 32;
191 bit = (irq - (IRQ_CORETMR + 1)) % 32;
192
193 local_irq_save(flags);
194
195 if (state)
196 bfin_sic_iwr[bank] |= (1 << bit);
197 else
198 bfin_sic_iwr[bank] &= ~(1 << bit);
199
200 local_irq_restore(flags);
201
202 return 0;
203}
204#endif
205
182static struct irq_chip bfin_core_irqchip = { 206static struct irq_chip bfin_core_irqchip = {
183 .ack = ack_noop, 207 .ack = ack_noop,
184 .mask = bfin_core_mask_irq, 208 .mask = bfin_core_mask_irq,
@@ -189,6 +213,9 @@ static struct irq_chip bfin_internal_irqchip = {
189 .ack = ack_noop, 213 .ack = ack_noop,
190 .mask = bfin_internal_mask_irq, 214 .mask = bfin_internal_mask_irq,
191 .unmask = bfin_internal_unmask_irq, 215 .unmask = bfin_internal_unmask_irq,
216#ifdef CONFIG_PM
217 .set_wake = bfin_internal_set_wake,
218#endif
192}; 219};
193 220
194#ifdef BF537_GENERIC_ERROR_INT_DEMUX 221#ifdef BF537_GENERIC_ERROR_INT_DEMUX
@@ -206,8 +233,7 @@ static void bfin_generic_error_mask_irq(unsigned int irq)
206 if (!error_int_mask) { 233 if (!error_int_mask) {
207 local_irq_disable(); 234 local_irq_disable();
208 bfin_write_SIC_IMASK(bfin_read_SIC_IMASK() & 235 bfin_write_SIC_IMASK(bfin_read_SIC_IMASK() &
209 ~(1 << 236 ~(1 << (IRQ_GENERIC_ERROR -
210 (IRQ_GENERIC_ERROR -
211 (IRQ_CORETMR + 1)))); 237 (IRQ_CORETMR + 1))));
212 SSYNC(); 238 SSYNC();
213 local_irq_enable(); 239 local_irq_enable();
@@ -232,7 +258,7 @@ static struct irq_chip bfin_generic_error_irqchip = {
232}; 258};
233 259
234static void bfin_demux_error_irq(unsigned int int_err_irq, 260static void bfin_demux_error_irq(unsigned int int_err_irq,
235 struct irq_desc *intb_desc) 261 struct irq_desc *inta_desc)
236{ 262{
237 int irq = 0; 263 int irq = 0;
238 264
@@ -404,16 +430,8 @@ static int bfin_gpio_irq_type(unsigned int irq, unsigned int type)
404 return 0; 430 return 0;
405 } 431 }
406 432
433 set_gpio_inen(gpionr, 0);
407 set_gpio_dir(gpionr, 0); 434 set_gpio_dir(gpionr, 0);
408 set_gpio_inen(gpionr, 1);
409
410 if (type & (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING)) {
411 gpio_edge_triggered[gpio_bank(gpionr)] |= gpio_bit(gpionr);
412 set_gpio_edge(gpionr, 1);
413 } else {
414 set_gpio_edge(gpionr, 0);
415 gpio_edge_triggered[gpio_bank(gpionr)] &= ~gpio_bit(gpionr);
416 }
417 435
418 if ((type & (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING)) 436 if ((type & (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING))
419 == (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING)) 437 == (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING))
@@ -426,6 +444,18 @@ static int bfin_gpio_irq_type(unsigned int irq, unsigned int type)
426 else 444 else
427 set_gpio_polar(gpionr, 0); /* high or rising edge denoted by zero */ 445 set_gpio_polar(gpionr, 0); /* high or rising edge denoted by zero */
428 446
447 if (type & (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING)) {
448 set_gpio_edge(gpionr, 1);
449 set_gpio_inen(gpionr, 1);
450 gpio_edge_triggered[gpio_bank(gpionr)] |= gpio_bit(gpionr);
451 set_gpio_data(gpionr, 0);
452
453 } else {
454 set_gpio_edge(gpionr, 0);
455 gpio_edge_triggered[gpio_bank(gpionr)] &= ~gpio_bit(gpionr);
456 set_gpio_inen(gpionr, 1);
457 }
458
429 SSYNC(); 459 SSYNC();
430 460
431 if (type & (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING)) 461 if (type & (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING))
@@ -436,6 +466,20 @@ static int bfin_gpio_irq_type(unsigned int irq, unsigned int type)
436 return 0; 466 return 0;
437} 467}
438 468
469#ifdef CONFIG_PM
470int bfin_gpio_set_wake(unsigned int irq, unsigned int state)
471{
472 unsigned gpio = irq_to_gpio(irq);
473
474 if (state)
475 gpio_pm_wakeup_request(gpio, PM_WAKE_IGNORE);
476 else
477 gpio_pm_wakeup_free(gpio);
478
479 return 0;
480}
481#endif
482
439static struct irq_chip bfin_gpio_irqchip = { 483static struct irq_chip bfin_gpio_irqchip = {
440 .ack = bfin_gpio_ack_irq, 484 .ack = bfin_gpio_ack_irq,
441 .mask = bfin_gpio_mask_irq, 485 .mask = bfin_gpio_mask_irq,
@@ -443,30 +487,87 @@ static struct irq_chip bfin_gpio_irqchip = {
443 .unmask = bfin_gpio_unmask_irq, 487 .unmask = bfin_gpio_unmask_irq,
444 .set_type = bfin_gpio_irq_type, 488 .set_type = bfin_gpio_irq_type,
445 .startup = bfin_gpio_irq_startup, 489 .startup = bfin_gpio_irq_startup,
446 .shutdown = bfin_gpio_irq_shutdown 490 .shutdown = bfin_gpio_irq_shutdown,
491#ifdef CONFIG_PM
492 .set_wake = bfin_gpio_set_wake,
493#endif
447}; 494};
448 495
449static void bfin_demux_gpio_irq(unsigned int intb_irq, 496static void bfin_demux_gpio_irq(unsigned int inta_irq,
450 struct irq_desc *intb_desc) 497 struct irq_desc *desc)
451{ 498{
452 u16 i; 499 unsigned int i, gpio, mask, irq, search = 0;
453 struct irq_desc *desc;
454 500
455 for (i = 0; i < MAX_BLACKFIN_GPIOS; i += 16) { 501 switch (inta_irq) {
456 int irq = IRQ_PF0 + i; 502#if defined(CONFIG_BF53x)
457 int flag_d = get_gpiop_data(i); 503 case IRQ_PROG_INTA:
458 int mask = 504 irq = IRQ_PF0;
459 flag_d & (gpio_enabled[gpio_bank(i)] & get_gpiop_maska(i)); 505 search = 1;
506 break;
507# if defined(BF537_FAMILY) && !(defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE))
508 case IRQ_MAC_RX:
509 irq = IRQ_PH0;
510 break;
511# endif
512#elif defined(CONFIG_BF52x)
513 case IRQ_PORTF_INTA:
514 irq = IRQ_PF0;
515 break;
516 case IRQ_PORTG_INTA:
517 irq = IRQ_PG0;
518 break;
519 case IRQ_PORTH_INTA:
520 irq = IRQ_PH0;
521 break;
522#elif defined(CONFIG_BF561)
523 case IRQ_PROG0_INTA:
524 irq = IRQ_PF0;
525 break;
526 case IRQ_PROG1_INTA:
527 irq = IRQ_PF16;
528 break;
529 case IRQ_PROG2_INTA:
530 irq = IRQ_PF32;
531 break;
532#endif
533 default:
534 BUG();
535 return;
536 }
460 537
461 while (mask) { 538 if (search) {
462 if (mask & 1) { 539 for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) {
463 desc = irq_desc + irq; 540 irq += i;
464 desc->handle_irq(irq, desc); 541
542 mask = get_gpiop_data(i) &
543 (gpio_enabled[gpio_bank(i)] &
544 get_gpiop_maska(i));
545
546 while (mask) {
547 if (mask & 1) {
548 desc = irq_desc + irq;
549 desc->handle_irq(irq, desc);
550 }
551 irq++;
552 mask >>= 1;
465 } 553 }
466 irq++;
467 mask >>= 1;
468 } 554 }
555 } else {
556 gpio = irq_to_gpio(irq);
557 mask = get_gpiop_data(gpio) &
558 (gpio_enabled[gpio_bank(gpio)] &
559 get_gpiop_maska(gpio));
560
561 do {
562 if (mask & 1) {
563 desc = irq_desc + irq;
564 desc->handle_irq(irq, desc);
565 }
566 irq++;
567 mask >>= 1;
568 } while (mask);
469 } 569 }
570
470} 571}
471 572
472#else /* CONFIG_BF54x */ 573#else /* CONFIG_BF54x */
@@ -711,6 +812,74 @@ static int bfin_gpio_irq_type(unsigned int irq, unsigned int type)
711 return 0; 812 return 0;
712} 813}
713 814
815#ifdef CONFIG_PM
816u32 pint_saved_masks[NR_PINT_SYS_IRQS];
817u32 pint_wakeup_masks[NR_PINT_SYS_IRQS];
818
819int bfin_gpio_set_wake(unsigned int irq, unsigned int state)
820{
821 u32 pint_irq;
822 u8 pint_val = irq2pint_lut[irq - SYS_IRQS];
823 u32 bank = PINT_2_BANK(pint_val);
824 u32 pintbit = PINT_BIT(pint_val);
825
826 switch (bank) {
827 case 0:
828 pint_irq = IRQ_PINT0;
829 break;
830 case 2:
831 pint_irq = IRQ_PINT2;
832 break;
833 case 3:
834 pint_irq = IRQ_PINT3;
835 break;
836 case 1:
837 pint_irq = IRQ_PINT1;
838 break;
839 default:
840 return -EINVAL;
841 }
842
843 bfin_internal_set_wake(pint_irq, state);
844
845 if (state)
846 pint_wakeup_masks[bank] |= pintbit;
847 else
848 pint_wakeup_masks[bank] &= ~pintbit;
849
850 return 0;
851}
852
853u32 bfin_pm_setup(void)
854{
855 u32 val, i;
856
857 for (i = 0; i < NR_PINT_SYS_IRQS; i++) {
858 val = pint[i]->mask_clear;
859 pint_saved_masks[i] = val;
860 if (val ^ pint_wakeup_masks[i]) {
861 pint[i]->mask_clear = val;
862 pint[i]->mask_set = pint_wakeup_masks[i];
863 }
864 }
865
866 return 0;
867}
868
869void bfin_pm_restore(void)
870{
871 u32 i, val;
872
873 for (i = 0; i < NR_PINT_SYS_IRQS; i++) {
874 val = pint_saved_masks[i];
875 if (val ^ pint_wakeup_masks[i]) {
876 pint[i]->mask_clear = pint[i]->mask_clear;
877 pint[i]->mask_set = val;
878 }
879 }
880}
881#endif
882
714static struct irq_chip bfin_gpio_irqchip = { 883static struct irq_chip bfin_gpio_irqchip = {
715 .ack = bfin_gpio_ack_irq, 884 .ack = bfin_gpio_ack_irq,
716 .mask = bfin_gpio_mask_irq, 885 .mask = bfin_gpio_mask_irq,
@@ -718,17 +887,19 @@ static struct irq_chip bfin_gpio_irqchip = {
718 .unmask = bfin_gpio_unmask_irq, 887 .unmask = bfin_gpio_unmask_irq,
719 .set_type = bfin_gpio_irq_type, 888 .set_type = bfin_gpio_irq_type,
720 .startup = bfin_gpio_irq_startup, 889 .startup = bfin_gpio_irq_startup,
721 .shutdown = bfin_gpio_irq_shutdown 890 .shutdown = bfin_gpio_irq_shutdown,
891#ifdef CONFIG_PM
892 .set_wake = bfin_gpio_set_wake,
893#endif
722}; 894};
723 895
724static void bfin_demux_gpio_irq(unsigned int intb_irq, 896static void bfin_demux_gpio_irq(unsigned int inta_irq,
725 struct irq_desc *intb_desc) 897 struct irq_desc *desc)
726{ 898{
727 u8 bank, pint_val; 899 u8 bank, pint_val;
728 u32 request, irq; 900 u32 request, irq;
729 struct irq_desc *desc;
730 901
731 switch (intb_irq) { 902 switch (inta_irq) {
732 case IRQ_PINT0: 903 case IRQ_PINT0:
733 bank = 0; 904 bank = 0;
734 break; 905 break;
@@ -795,7 +966,7 @@ int __init init_arch_irq(void)
795 int irq; 966 int irq;
796 unsigned long ilat = 0; 967 unsigned long ilat = 0;
797 /* Disable all the peripheral intrs - page 4-29 HW Ref manual */ 968 /* Disable all the peripheral intrs - page 4-29 HW Ref manual */
798#if defined(CONFIG_BF54x) || defined(CONFIG_BF52x) 969#if defined(CONFIG_BF54x) || defined(CONFIG_BF52x) || defined(CONFIG_BF561)
799 bfin_write_SIC_IMASK0(SIC_UNMASK_ALL); 970 bfin_write_SIC_IMASK0(SIC_UNMASK_ALL);
800 bfin_write_SIC_IMASK1(SIC_UNMASK_ALL); 971 bfin_write_SIC_IMASK1(SIC_UNMASK_ALL);
801 bfin_write_SIC_IWR0(IWR_ENABLE_ALL); 972 bfin_write_SIC_IWR0(IWR_ENABLE_ALL);
@@ -812,6 +983,8 @@ int __init init_arch_irq(void)
812 983
813 local_irq_disable(); 984 local_irq_disable();
814 985
986 init_exception_buff();
987
815#ifdef CONFIG_BF54x 988#ifdef CONFIG_BF54x
816# ifdef CONFIG_PINTx_REASSIGN 989# ifdef CONFIG_PINTx_REASSIGN
817 pint[0]->assign = CONFIG_PINT0_ASSIGN; 990 pint[0]->assign = CONFIG_PINT0_ASSIGN;
@@ -874,6 +1047,19 @@ int __init init_arch_irq(void)
874 set_irq_chained_handler(irq, 1047 set_irq_chained_handler(irq,
875 bfin_demux_gpio_irq); 1048 bfin_demux_gpio_irq);
876 break; 1049 break;
1050#elif defined(CONFIG_BF561)
1051 case IRQ_PROG0_INTA:
1052 set_irq_chained_handler(irq,
1053 bfin_demux_gpio_irq);
1054 break;
1055 case IRQ_PROG1_INTA:
1056 set_irq_chained_handler(irq,
1057 bfin_demux_gpio_irq);
1058 break;
1059 case IRQ_PROG2_INTA:
1060 set_irq_chained_handler(irq,
1061 bfin_demux_gpio_irq);
1062 break;
877#endif 1063#endif
878 default: 1064 default:
879 set_irq_handler(irq, handle_simple_irq); 1065 set_irq_handler(irq, handle_simple_irq);
@@ -893,11 +1079,8 @@ int __init init_arch_irq(void)
893 } 1079 }
894#endif 1080#endif
895 1081
896#ifndef CONFIG_BF54x 1082 for (irq = GPIO_IRQ_BASE; irq < NR_IRQS; irq++) {
897 for (irq = IRQ_PF0; irq < NR_IRQS; irq++) { 1083
898#else
899 for (irq = IRQ_PA0; irq < NR_IRQS; irq++) {
900#endif
901 set_irq_chip(irq, &bfin_gpio_irqchip); 1084 set_irq_chip(irq, &bfin_gpio_irqchip);
902 /* if configured as edge, then will be changed to do_edge_IRQ */ 1085 /* if configured as edge, then will be changed to do_edge_IRQ */
903 set_irq_handler(irq, handle_level_irq); 1086 set_irq_handler(irq, handle_level_irq);
@@ -936,7 +1119,7 @@ void do_irq(int vec, struct pt_regs *fp)
936 } else { 1119 } else {
937 struct ivgx *ivg = ivg7_13[vec - IVG7].ifirst; 1120 struct ivgx *ivg = ivg7_13[vec - IVG7].ifirst;
938 struct ivgx *ivg_stop = ivg7_13[vec - IVG7].istop; 1121 struct ivgx *ivg_stop = ivg7_13[vec - IVG7].istop;
939#if defined(CONFIG_BF54x) || defined(CONFIG_BF52x) 1122#if defined(CONFIG_BF54x) || defined(CONFIG_BF52x) || defined(CONFIG_BF561)
940 unsigned long sic_status[3]; 1123 unsigned long sic_status[3];
941 1124
942 SSYNC(); 1125 SSYNC();
diff --git a/arch/blackfin/mach-common/pm.c b/arch/blackfin/mach-common/pm.c
index 81930f7d06f1..0be805ca423f 100644
--- a/arch/blackfin/mach-common/pm.c
+++ b/arch/blackfin/mach-common/pm.c
@@ -4,7 +4,7 @@
4 * Author: Cliff Brake <cbrake@accelent.com> Copyright (c) 2001 4 * Author: Cliff Brake <cbrake@accelent.com> Copyright (c) 2001
5 * 5 *
6 * Created: 2001 6 * Created: 2001
7 * Description: Power management for the bfin 7 * Description: Blackfin power management
8 * 8 *
9 * Modified: Nicolas Pitre - PXA250 support 9 * Modified: Nicolas Pitre - PXA250 support
10 * Copyright (c) 2002 Monta Vista Software, Inc. 10 * Copyright (c) 2002 Monta Vista Software, Inc.
@@ -12,7 +12,7 @@
12 * Copyright (c) 2002 Monta Vista Software, Inc. 12 * Copyright (c) 2002 Monta Vista Software, Inc.
13 * Dirk Behme <dirk.behme@de.bosch.com> - OMAP1510/1610 13 * Dirk Behme <dirk.behme@de.bosch.com> - OMAP1510/1610
14 * Copyright 2004 14 * Copyright 2004
15 * Copyright 2004-2006 Analog Devices Inc. 15 * Copyright 2004-2008 Analog Devices Inc.
16 * 16 *
17 * Bugs: Enter bugs at http://blackfin.uclinux.org/ 17 * Bugs: Enter bugs at http://blackfin.uclinux.org/
18 * 18 *
@@ -67,42 +67,30 @@ void bfin_pm_suspend_standby_enter(void)
67 gpio_pm_wakeup_request(CONFIG_PM_WAKEUP_GPIO_NUMBER, WAKEUP_TYPE); 67 gpio_pm_wakeup_request(CONFIG_PM_WAKEUP_GPIO_NUMBER, WAKEUP_TYPE);
68#endif 68#endif
69 69
70#if defined(CONFIG_PM_WAKEUP_BY_GPIO) || defined(CONFIG_PM_WAKEUP_GPIO_API) 70 u32 flags;
71 {
72 u32 flags;
73 71
74 local_irq_save(flags); 72 local_irq_save(flags);
73 bfin_pm_setup();
75 74
76 sleep_deeper(gpio_pm_setup()); /*Goto Sleep*/ 75#ifdef CONFIG_PM_BFIN_SLEEP_DEEPER
77 76 sleep_deeper(bfin_sic_iwr[0], bfin_sic_iwr[1], bfin_sic_iwr[2]);
78 gpio_pm_restore();
79
80#if defined(CONFIG_BF54x) || defined(CONFIG_BF52x)
81 bfin_write_SIC_IWR0(IWR_ENABLE_ALL);
82 bfin_write_SIC_IWR1(IWR_ENABLE_ALL);
83# ifdef CONFIG_BF54x
84 bfin_write_SIC_IWR2(IWR_ENABLE_ALL);
85# endif
86#else 77#else
87 bfin_write_SIC_IWR(IWR_ENABLE_ALL); 78 sleep_mode(bfin_sic_iwr[0], bfin_sic_iwr[1], bfin_sic_iwr[2]);
88#endif 79#endif
89 80
90 local_irq_restore(flags); 81 bfin_pm_restore();
91 }
92#endif
93 82
94#if defined(CONFIG_PM_WAKEUP_GPIO_BY_SIC_IWR) 83#if defined(CONFIG_BF54x) || defined(CONFIG_BF52x) || defined(CONFIG_BF561)
95 sleep_deeper(CONFIG_PM_WAKEUP_SIC_IWR);
96# if defined(CONFIG_BF54x) || defined(CONFIG_BF52x)
97 bfin_write_SIC_IWR0(IWR_ENABLE_ALL); 84 bfin_write_SIC_IWR0(IWR_ENABLE_ALL);
98 bfin_write_SIC_IWR1(IWR_ENABLE_ALL); 85 bfin_write_SIC_IWR1(IWR_ENABLE_ALL);
99# ifdef CONFIG_BF54x 86# ifdef CONFIG_BF54x
100 bfin_write_SIC_IWR2(IWR_ENABLE_ALL); 87 bfin_write_SIC_IWR2(IWR_ENABLE_ALL);
101# endif
102# else
103 bfin_write_SIC_IWR(IWR_ENABLE_ALL);
104# endif 88# endif
105#endif /* CONFIG_PM_WAKEUP_GPIO_BY_SIC_IWR */ 89#else
90 bfin_write_SIC_IWR(IWR_ENABLE_ALL);
91#endif
92
93 local_irq_restore(flags);
106} 94}
107 95
108/* 96/*
diff --git a/arch/blackfin/mm/init.c b/arch/blackfin/mm/init.c
index eb1a12ac9e33..1f516c55bde6 100644
--- a/arch/blackfin/mm/init.c
+++ b/arch/blackfin/mm/init.c
@@ -138,8 +138,7 @@ void __init mem_init(void)
138 138
139 start_mem = PAGE_ALIGN(start_mem); 139 start_mem = PAGE_ALIGN(start_mem);
140 max_mapnr = num_physpages = MAP_NR(high_memory); 140 max_mapnr = num_physpages = MAP_NR(high_memory);
141 printk(KERN_INFO "Kernel managed physical pages: %lu\n", 141 printk(KERN_DEBUG "Kernel managed physical pages: %lu\n", num_physpages);
142 num_physpages);
143 142
144 /* This will put all memory onto the freelists. */ 143 /* This will put all memory onto the freelists. */
145 totalram_pages = free_all_bootmem(); 144 totalram_pages = free_all_bootmem();
@@ -153,8 +152,7 @@ void __init mem_init(void)
153 /* do not count in kernel image between _rambase and _ramstart */ 152 /* do not count in kernel image between _rambase and _ramstart */
154 reservedpages -= (_ramstart - _rambase) >> PAGE_SHIFT; 153 reservedpages -= (_ramstart - _rambase) >> PAGE_SHIFT;
155#if (defined(CONFIG_BFIN_ICACHE) && ANOMALY_05000263) 154#if (defined(CONFIG_BFIN_ICACHE) && ANOMALY_05000263)
156 reservedpages += (_ramend - memory_end - DMA_UNCACHED_REGION) >> 155 reservedpages += (_ramend - memory_end - DMA_UNCACHED_REGION) >> PAGE_SHIFT;
157 PAGE_SHIFT;
158#endif 156#endif
159 157
160 codek = (_etext - _stext) >> 10; 158 codek = (_etext - _stext) >> 10;
@@ -163,11 +161,9 @@ void __init mem_init(void)
163 161
164 printk(KERN_INFO 162 printk(KERN_INFO
165 "Memory available: %luk/%luk RAM, " 163 "Memory available: %luk/%luk RAM, "
166 "(%uk init code, %uk kernel code, " 164 "(%uk init code, %uk kernel code, %uk data, %uk dma, %uk reserved)\n",
167 "%uk data, %uk dma, %uk reserved)\n",
168 (unsigned long) freepages << (PAGE_SHIFT-10), _ramend >> 10, 165 (unsigned long) freepages << (PAGE_SHIFT-10), _ramend >> 10,
169 initk, codek, datak, DMA_UNCACHED_REGION >> 10, 166 initk, codek, datak, DMA_UNCACHED_REGION >> 10, (reservedpages << (PAGE_SHIFT-10)));
170 (reservedpages << (PAGE_SHIFT-10)));
171 167
172 /* Initialize the blackfin L1 Memory. */ 168 /* Initialize the blackfin L1 Memory. */
173 l1sram_init(); 169 l1sram_init();
diff --git a/arch/cris/Kconfig b/arch/cris/Kconfig
index 27b082ac7f11..8456bc8efb7c 100644
--- a/arch/cris/Kconfig
+++ b/arch/cris/Kconfig
@@ -13,10 +13,6 @@ config ZONE_DMA
13 bool 13 bool
14 default y 14 default y
15 15
16config NO_DMA
17 bool
18 default y
19
20config RWSEM_GENERIC_SPINLOCK 16config RWSEM_GENERIC_SPINLOCK
21 bool 17 bool
22 default y 18 default y
@@ -24,6 +20,10 @@ config RWSEM_GENERIC_SPINLOCK
24config RWSEM_XCHGADD_ALGORITHM 20config RWSEM_XCHGADD_ALGORITHM
25 bool 21 bool
26 22
23config GENERIC_IOMAP
24 bool
25 default y
26
27config ARCH_HAS_ILOG2_U32 27config ARCH_HAS_ILOG2_U32
28 bool 28 bool
29 default n 29 default n
@@ -44,17 +44,21 @@ config GENERIC_CALIBRATE_DELAY
44 bool 44 bool
45 default y 45 default y
46 46
47config IRQ_PER_CPU
48 bool
49 default y
50
51config NO_IOPORT 47config NO_IOPORT
52 def_bool y 48 def_bool y
53 49
50config FORCE_MAX_ZONEORDER
51 int
52 default 6
53
54config CRIS 54config CRIS
55 bool 55 bool
56 default y 56 default y
57 57
58config HZ
59 int
60 default 100
61
58source "init/Kconfig" 62source "init/Kconfig"
59 63
60menu "General setup" 64menu "General setup"
@@ -93,17 +97,15 @@ config ETRAX_FAST_TIMER
93 timers). 97 timers).
94 This is needed if CONFIG_ETRAX_SERIAL_FAST_TIMER is enabled. 98 This is needed if CONFIG_ETRAX_SERIAL_FAST_TIMER is enabled.
95 99
96config PREEMPT 100config ETRAX_KMALLOCED_MODULES
97 bool "Preemptible Kernel" 101 bool "Enable module allocation with kmalloc"
98 help 102 help
99 This option reduces the latency of the kernel when reacting to 103 Enable module allocation with kmalloc instead of vmalloc.
100 real-time or interactive events by allowing a low priority process to 104
101 be preempted even if it is in kernel mode executing a system call. 105config OOM_REBOOT
102 This allows applications to run more reliably even when the system is 106 bool "Enable reboot at out of memory"
103 under load.
104 107
105 Say Y here if you are building a kernel for a desktop, embedded 108source "kernel/Kconfig.preempt"
106 or real-time system. Say N if you are unsure.
107 109
108source mm/Kconfig 110source mm/Kconfig
109 111
@@ -130,24 +132,124 @@ config SVINTO_SIM
130 help 132 help
131 Support the xsim ETRAX Simulator. 133 Support the xsim ETRAX Simulator.
132 134
135config ETRAXFS
136 bool "ETRAX-FS-V32"
137 help
138 Support CRIS V32.
139
140config CRIS_MACH_ARTPEC3
141 bool "ARTPEC-3"
142 help
143 Support Axis ARTPEC-3.
144
133endchoice 145endchoice
134 146
147config ETRAX_VCS_SIM
148 bool "VCS Simulator"
149 help
150 Setup hardware to be run in the VCS simulator.
151
135config ETRAX_ARCH_V10 152config ETRAX_ARCH_V10
136 bool 153 bool
137 default y if ETRAX100LX || ETRAX100LX_V2 154 default y if ETRAX100LX || ETRAX100LX_V2
138 default n if !(ETRAX100LX || ETRAX100LX_V2) 155 default n if !(ETRAX100LX || ETRAX100LX_V2)
139 156
157config ETRAX_ARCH_V32
158 bool
159 default y if (ETRAXFS || CRIS_MACH_ARTPEC3)
160 default n if !(ETRAXFS || CRIS_MACH_ARTPEC3)
161
140config ETRAX_DRAM_SIZE 162config ETRAX_DRAM_SIZE
141 int "DRAM size (dec, in MB)" 163 int "DRAM size (dec, in MB)"
142 default "8" 164 default "8"
143 help 165 help
144 Size of DRAM (decimal in MB) typically 2, 8 or 16. 166 Size of DRAM (decimal in MB) typically 2, 8 or 16.
145 167
168config ETRAX_VMEM_SIZE
169 int "Video memory size (dec, in MB)"
170 depends on ETRAX_ARCH_V32 && !ETRAXFS
171 default 8 if !ETRAXFS
172 help
173 Size of Video accessible memory (decimal, in MB).
174
146config ETRAX_FLASH_BUSWIDTH 175config ETRAX_FLASH_BUSWIDTH
147 int "Buswidth of flash in bytes" 176 int "Buswidth of NOR flash in bytes"
148 default "2" 177 default "2"
149 help 178 help
150 Width in bytes of the Flash bus (1, 2 or 4). Is usually 2. 179 Width in bytes of the NOR Flash bus (1, 2 or 4). Is usually 2.
180
181config ETRAX_NANDFLASH_BUSWIDTH
182 int "Buswidth of NAND flash in bytes"
183 default "1"
184 help
185 Width in bytes of the NAND flash (1 or 2).
186
187config ETRAX_FLASH1_SIZE
188 int "FLASH1 size (dec, in MB. 0 = Unknown)"
189 default "0"
190
191choice
192 prompt "Product debug-port"
193 default ETRAX_DEBUG_PORT0
194
195config ETRAX_DEBUG_PORT0
196 bool "Serial-0"
197 help
198 Choose a serial port for the ETRAX debug console. Default to
199 port 0.
200
201config ETRAX_DEBUG_PORT1
202 bool "Serial-1"
203 help
204 Use serial port 1 for the console.
205
206config ETRAX_DEBUG_PORT2
207 bool "Serial-2"
208 help
209 Use serial port 2 for the console.
210
211config ETRAX_DEBUG_PORT3
212 bool "Serial-3"
213 help
214 Use serial port 3 for the console.
215
216config ETRAX_DEBUG_PORT_NULL
217 bool "disabled"
218 help
219 Disable serial-port debugging.
220
221endchoice
222
223choice
224 prompt "Kernel GDB port"
225 depends on ETRAX_KGDB
226 default ETRAX_KGDB_PORT0
227 help
228 Choose a serial port for kernel debugging. NOTE: This port should
229 not be enabled under Drivers for built-in interfaces (as it has its
230 own initialization code) and should not be the same as the debug port.
231
232config ETRAX_KGDB_PORT0
233 bool "Serial-0"
234 help
235 Use serial port 0 for kernel debugging.
236
237config ETRAX_KGDB_PORT1
238 bool "Serial-1"
239 help
240 Use serial port 1 for kernel debugging.
241
242config ETRAX_KGDB_PORT2
243 bool "Serial-2"
244 help
245 Use serial port 2 for kernel debugging.
246
247config ETRAX_KGDB_PORT3
248 bool "Serial-3"
249 help
250 Use serial port 3 for kernel debugging.
251
252endchoice
151 253
152source arch/cris/arch-v10/Kconfig 254source arch/cris/arch-v10/Kconfig
153source arch/cris/arch-v32/Kconfig 255source arch/cris/arch-v32/Kconfig
@@ -161,6 +263,387 @@ menu "Drivers for built-in interfaces"
161source arch/cris/arch-v10/drivers/Kconfig 263source arch/cris/arch-v10/drivers/Kconfig
162source arch/cris/arch-v32/drivers/Kconfig 264source arch/cris/arch-v32/drivers/Kconfig
163 265
266config ETRAX_AXISFLASHMAP
267 bool "Axis flash-map support"
268 select MTD
269 select MTD_CFI
270 select MTD_CFI_AMDSTD
271 select MTD_JEDECPROBE if ETRAX_ARCH_V32
272 select MTD_CHAR
273 select MTD_BLOCK
274 select MTD_PARTITIONS
275 select MTD_CONCAT
276 select MTD_COMPLEX_MAPPINGS
277 help
278 This option enables MTD mapping of flash devices. Needed to use
279 flash memories. If unsure, say Y.
280
281config ETRAX_RTC
282 bool "Real Time Clock support"
283 depends on ETRAX_I2C
284 help
285 Enables drivers for the Real-Time Clock battery-backed chips on
286 some products. The kernel reads the time when booting, and
287 the date can be set using ioctl(fd, RTC_SET_TIME, &rt) with rt a
288 rtc_time struct (see <file:include/asm-cris/rtc.h>) on the /dev/rtc
289 device. You can check the time with cat /proc/rtc, but
290 normal time reading should be done using libc function time and
291 friends.
292
293choice
294 prompt "RTC chip"
295 depends on ETRAX_RTC
296 default ETRAX_PCF8563 if ETRAX_ARCH_V32
297 default ETRAX_DS1302 if ETRAX_ARCH_V10
298
299config ETRAX_DS1302
300 depends on ETRAX_ARCH_V10
301 bool "DS1302"
302 help
303 Enables the driver for the DS1302 Real-Time Clock battery-backed
304 chip on some products.
305
306config ETRAX_PCF8563
307 bool "PCF8563"
308 help
309 Enables the driver for the PCF8563 Real-Time Clock battery-backed
310 chip on some products.
311
312endchoice
313
314config ETRAX_SYNCHRONOUS_SERIAL
315 bool "Synchronous serial-port support"
316 help
317 Select this to enable the synchronous serial port driver.
318
319config ETRAX_SYNCHRONOUS_SERIAL_PORT0
320 bool "Synchronous serial port 0 enabled"
321 depends on ETRAX_SYNCHRONOUS_SERIAL
322 help
323 Enabled synchronous serial port 0.
324
325config ETRAX_SYNCHRONOUS_SERIAL0_DMA
326 bool "Enable DMA on synchronous serial port 0."
327 depends on ETRAX_SYNCHRONOUS_SERIAL_PORT0
328 help
329 A synchronous serial port can run in manual or DMA mode.
330 Selecting this option will make it run in DMA mode.
331
332config ETRAX_SYNCHRONOUS_SERIAL_PORT1
333 bool "Synchronous serial port 1 enabled"
334 depends on ETRAX_SYNCHRONOUS_SERIAL && (ETRAXFS || ETRAX_ARCH_V10)
335 help
336 Enabled synchronous serial port 1.
337
338config ETRAX_SYNCHRONOUS_SERIAL1_DMA
339 bool "Enable DMA on synchronous serial port 1."
340 depends on ETRAX_SYNCHRONOUS_SERIAL_PORT1
341 help
342 A synchronous serial port can run in manual or DMA mode.
343 Selecting this option will make it run in DMA mode.
344
345choice
346 prompt "Network LED behavior"
347 depends on ETRAX_ETHERNET
348 default ETRAX_NETWORK_LED_ON_WHEN_ACTIVITY
349
350config ETRAX_NETWORK_LED_ON_WHEN_LINK
351 bool "LED_on_when_link"
352 help
353 Selecting LED_on_when_link will light the LED when there is a
354 connection and will flash off when there is activity.
355
356 Selecting LED_on_when_activity will light the LED only when
357 there is activity.
358
359 This setting will also affect the behaviour of other activity LEDs
360 e.g. Bluetooth.
361
362config ETRAX_NETWORK_LED_ON_WHEN_ACTIVITY
363 bool "LED_on_when_activity"
364 help
365 Selecting LED_on_when_link will light the LED when there is a
366 connection and will flash off when there is activity.
367
368 Selecting LED_on_when_activity will light the LED only when
369 there is activity.
370
371 This setting will also affect the behaviour of other activity LEDs
372 e.g. Bluetooth.
373
374endchoice
375
376choice
377 prompt "Ser0 DMA out channel"
378 depends on ETRAX_SERIAL_PORT0
379 default ETRAX_SERIAL_PORT0_DMA6_OUT if ETRAX_ARCH_V32
380 default ETRAX_SERIAL_PORT0_NO_DMA_OUT if ETRAX_ARCH_V10
381
382config ETRAX_SERIAL_PORT0_NO_DMA_OUT
383 bool "Ser0 uses no DMA for output"
384 help
385 Do not use DMA for ser0 output.
386
387config ETRAX_SERIAL_PORT0_DMA6_OUT
388 bool "Ser0 uses DMA6 for output"
389 depends on ETRAXFS
390 help
391 Enables the DMA6 output channel for ser0 (ttyS0).
392 If you do not enable DMA, an interrupt for each character will be
393 used when transmitting data.
394 Normally you want to use DMA, unless you use the DMA channel for
395 something else.
396
397config ETRAX_SERIAL_PORT0_DMA0_OUT
398 bool "Ser0 uses DMA0 for output"
399 depends on CRIS_MACH_ARTPEC3
400 help
401 Enables the DMA0 output channel for ser0 (ttyS0).
402 If you do not enable DMA, an interrupt for each character will be
403 used when transmitting data.
404 Normally you want to use DMA, unless you use the DMA channel for
405 something else.
406
407endchoice
408
409choice
410 prompt "Ser0 DMA in channel "
411 depends on ETRAX_SERIAL_PORT0
412 default ETRAX_SERIAL_PORT0_NO_DMA_IN if ETRAX_ARCH_V32
413 default ETRAX_SERIAL_PORT0_DMA7_IN if ETRAX_ARCH_V10
414 help
415 What DMA channel to use for ser0.
416
417config ETRAX_SERIAL_PORT0_NO_DMA_IN
418 bool "Ser0 uses no DMA for input"
419 help
420 Do not use DMA for ser0 input.
421
422config ETRAX_SERIAL_PORT0_DMA7_IN
423 bool "Ser0 uses DMA7 for input"
424 depends on ETRAXFS
425 help
426 Enables the DMA7 input channel for ser0 (ttyS0).
427 If you do not enable DMA, an interrupt for each character will be
428 used when receiving data.
429 Normally you want to use DMA, unless you use the DMA channel for
430 something else.
431
432config ETRAX_SERIAL_PORT0_DMA1_IN
433 bool "Ser0 uses DMA1 for input"
434 depends on CRIS_MACH_ARTPEC3
435 help
436 Enables the DMA1 input channel for ser0 (ttyS0).
437 If you do not enable DMA, an interrupt for each character will be
438 used when receiveing data.
439 Normally you want to use DMA, unless you use the DMA channel for
440 something else.
441
442endchoice
443
444choice
445 prompt "Ser1 DMA in channel "
446 depends on ETRAX_SERIAL_PORT1
447 default ETRAX_SERIAL_PORT1_NO_DMA_IN if ETRAX_ARCH_V32
448 default ETRAX_SERIAL_PORT1_DMA9_IN if ETRAX_ARCH_V10
449 help
450 What DMA channel to use for ser1.
451
452config ETRAX_SERIAL_PORT1_NO_DMA_IN
453 bool "Ser1 uses no DMA for input"
454 help
455 Do not use DMA for ser1 input.
456
457config ETRAX_SERIAL_PORT1_DMA5_IN
458 bool "Ser1 uses DMA5 for input"
459 depends on ETRAX_ARCH_V32
460 help
461 Enables the DMA5 input channel for ser1 (ttyS1).
462 If you do not enable DMA, an interrupt for each character will be
463 used when receiving data.
464 Normally you want this on, unless you use the DMA channel for
465 something else.
466
467config ETRAX_SERIAL_PORT1_DMA9_IN
468 depends on ETRAX_ARCH_V10
469 bool "Ser1 uses DMA9 for input"
470
471endchoice
472
473
474choice
475 prompt "Ser1 DMA out channel"
476 depends on ETRAX_SERIAL_PORT1
477 default ETRAX_SERIAL_PORT1_NO_DMA_OUT if ETRAX_ARCH_V32
478 default ETRAX_SERIAL_PORT1_DMA8_OUT if ETRAX_ARCH_V10
479 help
480 What DMA channel to use for ser1.
481
482config ETRAX_SERIAL_PORT1_NO_DMA_OUT
483 bool "Ser1 uses no DMA for output"
484 help
485 Do not use DMA for ser1 output.
486
487config ETRAX_SERIAL_PORT1_DMA8_OUT
488 depends on ETRAX_ARCH_V10
489 bool "Ser1 uses DMA8 for output"
490
491config ETRAX_SERIAL_PORT1_DMA4_OUT
492 depends on ETRAX_ARCH_V32
493 bool "Ser1 uses DMA4 for output"
494 help
495 Enables the DMA4 output channel for ser1 (ttyS1).
496 If you do not enable DMA, an interrupt for each character will be
497 used when transmitting data.
498 Normally you want this on, unless you use the DMA channel for
499 something else.
500
501endchoice
502
503choice
504 prompt "Ser2 DMA out channel"
505 depends on ETRAX_SERIAL_PORT2
506 default ETRAX_SERIAL_PORT2_NO_DMA_OUT if ETRAX_ARCH_V32
507 default ETRAX_SERIAL_PORT2_DMA2_OUT if ETRAX_ARCH_V10
508
509config ETRAX_SERIAL_PORT2_NO_DMA_OUT
510 bool "Ser2 uses no DMA for output"
511 help
512 Do not use DMA for ser2 output.
513
514config ETRAX_SERIAL_PORT2_DMA2_OUT
515 bool "Ser2 uses DMA2 for output"
516 depends on ETRAXFS || ETRAX_ARCH_V10
517 help
518 Enables the DMA2 output channel for ser2 (ttyS2).
519 If you do not enable DMA, an interrupt for each character will be
520 used when transmitting data.
521 Normally you want to use DMA, unless you use the DMA channel for
522 something else.
523
524config ETRAX_SERIAL_PORT2_DMA6_OUT
525 bool "Ser2 uses DMA6 for output"
526 depends on CRIS_MACH_ARTPEC3
527 help
528 Enables the DMA6 output channel for ser2 (ttyS2).
529 If you do not enable DMA, an interrupt for each character will be
530 used when transmitting data.
531 Normally you want to use DMA, unless you use the DMA channel for
532 something else.
533
534endchoice
535
536choice
537 prompt "Ser2 DMA in channel"
538 depends on ETRAX_SERIAL_PORT2
539 default ETRAX_SERIAL_PORT2_NO_DMA_IN if ETRAX_ARCH_V32
540 default ETRAX_SERIAL_PORT2_DMA3_IN if ETRAX_ARCH_V10
541 help
542 What DMA channel to use for ser2.
543
544config ETRAX_SERIAL_PORT2_NO_DMA_IN
545 bool "Ser2 uses no DMA for input"
546 help
547 Do not use DMA for ser2 input.
548
549config ETRAX_SERIAL_PORT2_DMA3_IN
550 bool "Ser2 uses DMA3 for input"
551 depends on ETRAXFS || ETRAX_ARCH_V10
552 help
553 Enables the DMA3 input channel for ser2 (ttyS2).
554 If you do not enable DMA, an interrupt for each character will be
555 used when receiving data.
556 Normally you want to use DMA, unless you use the DMA channel for
557 something else.
558
559config ETRAX_SERIAL_PORT2_DMA7_IN
560 bool "Ser2 uses DMA7 for input"
561 depends on CRIS_MACH_ARTPEC3
562 help
563 Enables the DMA7 input channel for ser2 (ttyS2).
564 If you do not enable DMA, an interrupt for each character will be
565 used when receiveing data.
566 Normally you want to use DMA, unless you use the DMA channel for
567 something else.
568
569endchoice
570
571choice
572 prompt "Ser3 DMA in channel"
573 depends on ETRAX_SERIAL_PORT3
574 default ETRAX_SERIAL_PORT3_NO_DMA_IN if ETRAX_ARCH_V32
575 default ETRAX_SERIAL_PORT3_DMA5_IN if ETRAX_ARCH_V10
576 help
577 What DMA channel to use for ser3.
578
579config ETRAX_SERIAL_PORT3_NO_DMA_IN
580 bool "Ser3 uses no DMA for input"
581 help
582 Do not use DMA for ser3 input.
583
584config ETRAX_SERIAL_PORT3_DMA5_IN
585 depends on ETRAX_ARCH_V10
586 bool "DMA 5"
587
588config ETRAX_SERIAL_PORT3_DMA9_IN
589 bool "Ser3 uses DMA9 for input"
590 depends on ETRAXFS
591 help
592 Enables the DMA9 input channel for ser3 (ttyS3).
593 If you do not enable DMA, an interrupt for each character will be
594 used when receiving data.
595 Normally you want to use DMA, unless you use the DMA channel for
596 something else.
597
598config ETRAX_SERIAL_PORT3_DMA3_IN
599 bool "Ser3 uses DMA3 for input"
600 depends on CRIS_MACH_ARTPEC3
601 help
602 Enables the DMA3 input channel for ser3 (ttyS3).
603 If you do not enable DMA, an interrupt for each character will be
604 used when receiveing data.
605 Normally you want to use DMA, unless you use the DMA channel for
606 something else.
607
608endchoice
609
610choice
611 prompt "Ser3 DMA out channel"
612 depends on ETRAX_SERIAL_PORT3
613 default ETRAX_SERIAL_PORT3_NO_DMA_OUT if ETRAX_ARCH_V32
614 default ETRAX_SERIAL_PORT3_DMA4_OUT if ETRAX_ARCH_V10
615
616config ETRAX_SERIAL_PORT3_NO_DMA_OUT
617 bool "Ser3 uses no DMA for output"
618 help
619 Do not use DMA for ser3 output.
620
621config ETRAX_SERIAL_PORT3_DMA4_OUT
622 depends on ETRAX_ARCH_V10
623 bool "DMA 4"
624
625config ETRAX_SERIAL_PORT3_DMA8_OUT
626 bool "Ser3 uses DMA8 for output"
627 depends on ETRAXFS
628 help
629 Enables the DMA8 output channel for ser3 (ttyS3).
630 If you do not enable DMA, an interrupt for each character will be
631 used when transmitting data.
632 Normally you want to use DMA, unless you use the DMA channel for
633 something else.
634
635config ETRAX_SERIAL_PORT3_DMA2_OUT
636 bool "Ser3 uses DMA2 for output"
637 depends on CRIS_MACH_ARTPEC3
638 help
639 Enables the DMA2 output channel for ser3 (ttyS3).
640 If you do not enable DMA, an interrupt for each character will be
641 used when transmitting data.
642 Normally you want to use DMA, unless you use the DMA channel for
643 something else.
644
645endchoice
646
164endmenu 647endmenu
165 648
166source "drivers/base/Kconfig" 649source "drivers/base/Kconfig"
@@ -174,22 +657,10 @@ source "drivers/pnp/Kconfig"
174 657
175source "drivers/block/Kconfig" 658source "drivers/block/Kconfig"
176 659
177source "drivers/md/Kconfig"
178
179source "drivers/ide/Kconfig" 660source "drivers/ide/Kconfig"
180 661
181source "drivers/scsi/Kconfig"
182
183source "drivers/ieee1394/Kconfig"
184
185source "drivers/message/i2o/Kconfig"
186
187source "drivers/net/Kconfig" 662source "drivers/net/Kconfig"
188 663
189source "drivers/isdn/Kconfig"
190
191source "drivers/telephony/Kconfig"
192
193source "drivers/i2c/Kconfig" 664source "drivers/i2c/Kconfig"
194 665
195source "drivers/rtc/Kconfig" 666source "drivers/rtc/Kconfig"
@@ -201,17 +672,8 @@ source "drivers/input/Kconfig"
201 672
202source "drivers/char/Kconfig" 673source "drivers/char/Kconfig"
203 674
204#source drivers/misc/Config.in
205source "drivers/media/Kconfig"
206
207source "fs/Kconfig" 675source "fs/Kconfig"
208 676
209source "sound/Kconfig"
210
211source "drivers/pcmcia/Kconfig"
212
213source "drivers/pci/Kconfig"
214
215source "drivers/usb/Kconfig" 677source "drivers/usb/Kconfig"
216 678
217source "arch/cris/Kconfig.debug" 679source "arch/cris/Kconfig.debug"
diff --git a/arch/cris/Makefile b/arch/cris/Makefile
index e6bf00c262e0..838cd2ae03ae 100644
--- a/arch/cris/Makefile
+++ b/arch/cris/Makefile
@@ -1,4 +1,4 @@
1# $Id: Makefile,v 1.28 2005/03/17 10:44:37 larsv Exp $ 1#
2# cris/Makefile 2# cris/Makefile
3# 3#
4# This file is included by the global makefile so that you can add your own 4# This file is included by the global makefile so that you can add your own
@@ -10,28 +10,36 @@
10# License. See the file "COPYING" in the main directory of this archive 10# License. See the file "COPYING" in the main directory of this archive
11# for more details. 11# for more details.
12 12
13# A bug in ld prevents us from having a (constant-value) symbol in a
14# "ORIGIN =" or "LENGTH =" expression.
15
16arch-y := v10 13arch-y := v10
17arch-$(CONFIG_ETRAX_ARCH_V10) := v10 14arch-$(CONFIG_ETRAX_ARCH_V10) := v10
18arch-$(CONFIG_ETRAX_ARCH_V32) := v32 15arch-$(CONFIG_ETRAX_ARCH_V32) := v32
19 16
20# No config avaiable for make clean etc 17# No config available for make clean etc
18mach-y := fs
19mach-$(CONFIG_CRIS_MACH_ARTPEC3) := a3
20mach-$(CONFIG_ETRAXFS) := fs
21
21ifneq ($(arch-y),) 22ifneq ($(arch-y),)
22SARCH := arch-$(arch-y) 23SARCH := arch-$(arch-y)
23else 24else
24SARCH := 25SARCH :=
25endif 26endif
26 27
28ifneq ($(mach-y),)
29MACH := mach-$(mach-y)
30else
31MACH :=
32endif
33
27LD = $(CROSS_COMPILE)ld -mcrislinux 34LD = $(CROSS_COMPILE)ld -mcrislinux
28 35
29OBJCOPYFLAGS := -O binary -R .note -R .comment -S 36OBJCOPYFLAGS := -O binary -R .note -R .comment -S
30 37
31CPPFLAGS_vmlinux.lds = -DDRAM_VIRTUAL_BASE=0x$(CONFIG_ETRAX_DRAM_VIRTUAL_BASE) 38CPPFLAGS_vmlinux.lds = -DDRAM_VIRTUAL_BASE=0x$(CONFIG_ETRAX_DRAM_VIRTUAL_BASE)
32KBUILD_AFLAGS += -mlinux
33 39
34KBUILD_CFLAGS += -mlinux -march=$(arch-y) -pipe 40KBUILD_AFLAGS += -mlinux -march=$(arch-y) -Iinclude/asm/arch/mach -Iinclude/asm/arch
41
42KBUILD_CFLAGS += -mlinux -march=$(arch-y) -pipe -Iinclude/asm/arch/mach -Iinclude/asm/arch
35 43
36ifdef CONFIG_FRAME_POINTER 44ifdef CONFIG_FRAME_POINTER
37KBUILD_CFLAGS := $(subst -fomit-frame-pointer,,$(KBUILD_CFLAGS)) -g 45KBUILD_CFLAGS := $(subst -fomit-frame-pointer,,$(KBUILD_CFLAGS)) -g
@@ -44,6 +52,9 @@ LIBGCC = $(shell $(CC) $(KBUILD_CFLAGS) -print-file-name=libgcc.a)
44 52
45core-y += arch/$(ARCH)/kernel/ arch/$(ARCH)/mm/ 53core-y += arch/$(ARCH)/kernel/ arch/$(ARCH)/mm/
46core-y += arch/$(ARCH)/$(SARCH)/kernel/ arch/$(ARCH)/$(SARCH)/mm/ 54core-y += arch/$(ARCH)/$(SARCH)/kernel/ arch/$(ARCH)/$(SARCH)/mm/
55ifdef CONFIG_ETRAX_ARCH_V32
56core-y += arch/$(ARCH)/$(SARCH)/$(MACH)/
57endif
47drivers-y += arch/$(ARCH)/$(SARCH)/drivers/ 58drivers-y += arch/$(ARCH)/$(SARCH)/drivers/
48libs-y += arch/$(ARCH)/$(SARCH)/lib/ $(LIBGCC) 59libs-y += arch/$(ARCH)/$(SARCH)/lib/ $(LIBGCC)
49 60
@@ -52,79 +63,69 @@ SRC_ARCH = $(srctree)/arch/$(ARCH)
52# cris object files path 63# cris object files path
53OBJ_ARCH = $(objtree)/arch/$(ARCH) 64OBJ_ARCH = $(objtree)/arch/$(ARCH)
54 65
55target_boot_arch_dir = $(OBJ_ARCH)/$(SARCH)/boot 66boot := arch/$(ARCH)/boot
56target_boot_dir = $(OBJ_ARCH)/boot 67MACHINE := arch/$(ARCH)/$(SARCH)
57src_boot_dir = $(SRC_ARCH)/boot
58target_compressed_dir = $(OBJ_ARCH)/boot/compressed
59src_compressed_dir = $(SRC_ARCH)/boot/compressed
60target_rescue_dir = $(OBJ_ARCH)/boot/rescue
61src_rescue_dir = $(SRC_ARCH)/boot/rescue
62
63export target_boot_arch_dir target_boot_dir src_boot_dir target_compressed_dir src_compressed_dir target_rescue_dir src_rescue_dir
64
65vmlinux.bin: vmlinux
66 $(OBJCOPY) $(OBJCOPYFLAGS) vmlinux vmlinux.bin
67
68timage: vmlinux.bin
69 cat vmlinux.bin cramfs.img >timage
70
71simimage: timage
72 cp vmlinux.bin simvmlinux.bin
73
74# the following will remake timage without compiling the kernel
75# it does of course require that all object files exist...
76
77cramfs:
78## cramfs - Creates a cramfs image
79 mkcramfs -b 8192 -m romfs_meta.txt root cramfs.img
80 cat vmlinux.bin cramfs.img >timage
81 68
82clinux: vmlinux.bin decompress.bin rescue.bin 69all: zImage
83 70
84decompress.bin: $(target_boot_dir) 71zImage Image: vmlinux
85 @$(MAKE) -f $(src_compressed_dir)/Makefile $(target_compressed_dir)/decompress.bin 72 $(Q)$(MAKE) $(build)=$(boot) MACHINE=$(MACHINE) $(boot)/$@
86 73
87$(target_rescue_dir)/rescue.bin: $(target_boot_dir) 74archprepare: $(SRC_ARCH)/.links $(srctree)/include/asm-$(ARCH)/.arch FORCE
88 @$(MAKE) -f $(src_rescue_dir)/Makefile $(target_rescue_dir)/rescue.bin
89
90zImage: $(target_boot_dir) vmlinux.bin $(target_rescue_dir)/rescue.bin
91## zImage - Compressed kernel (gzip)
92 @$(MAKE) -f $(src_boot_dir)/Makefile zImage
93
94$(target_boot_dir): $(target_boot_arch_dir)
95 ln -sfn $< $@
96
97$(target_boot_arch_dir):
98 mkdir -p $@
99
100compressed: zImage
101
102archmrproper:
103archclean:
104 @if [ -d arch/$(ARCH)/boot ]; then \
105 $(MAKE) $(clean)=arch/$(ARCH)/boot ; \
106 fi
107 rm -f timage vmlinux.bin decompress.bin rescue.bin cramfs.img
108 rm -rf $(LD_SCRIPT).tmp
109
110archprepare: $(SRC_ARCH)/.links $(srctree)/include/asm-$(ARCH)/.arch
111 75
112# Create some links to make all tools happy 76# Create some links to make all tools happy
113$(SRC_ARCH)/.links: 77$(SRC_ARCH)/.links:
114 @rm -rf $(SRC_ARCH)/drivers 78 @rm -rf $(SRC_ARCH)/drivers
115 @ln -sfn $(SRC_ARCH)/$(SARCH)/drivers $(SRC_ARCH)/drivers 79 @ln -sfn $(SARCH)/drivers $(SRC_ARCH)/drivers
116 @rm -rf $(SRC_ARCH)/boot 80 @rm -rf $(SRC_ARCH)/boot
117 @ln -sfn $(SRC_ARCH)/$(SARCH)/boot $(SRC_ARCH)/boot 81 @ln -sfn $(SARCH)/boot $(SRC_ARCH)/boot
118 @rm -rf $(SRC_ARCH)/lib 82 @rm -rf $(SRC_ARCH)/lib
119 @ln -sfn $(SRC_ARCH)/$(SARCH)/lib $(SRC_ARCH)/lib 83 @ln -sfn $(SARCH)/lib $(SRC_ARCH)/lib
120 @ln -sfn $(SRC_ARCH)/$(SARCH) $(SRC_ARCH)/arch 84 @rm -f $(SRC_ARCH)/arch/mach
121 @ln -sfn $(SRC_ARCH)/$(SARCH)/vmlinux.lds.S $(SRC_ARCH)/kernel/vmlinux.lds.S 85 @rm -rf $(SRC_ARCH)/arch
122 @ln -sfn $(SRC_ARCH)/$(SARCH)/kernel/asm-offsets.c $(SRC_ARCH)/kernel/asm-offsets.c 86 @ln -sfn $(SARCH) $(SRC_ARCH)/arch
87ifdef CONFIG_ETRAX_ARCH_V32
88 @ln -sfn ../$(SARCH)/$(MACH) $(SRC_ARCH)/arch/mach
89endif
90 @rm -rf $(SRC_ARCH)/kernel/vmlinux.lds.S
91 @ln -sfn ../$(SARCH)/vmlinux.lds.S $(SRC_ARCH)/kernel/vmlinux.lds.S
92 @rm -rf $(SRC_ARCH)/kernel/asm-offsets.c
93 @ln -sfn ../$(SARCH)/kernel/asm-offsets.c $(SRC_ARCH)/kernel/asm-offsets.c
123 @touch $@ 94 @touch $@
124 95
125# Create link to sub arch includes 96# Create link to sub arch includes
126$(srctree)/include/asm-$(ARCH)/.arch: $(wildcard include/config/arch/*.h) 97$(srctree)/include/asm-$(ARCH)/.arch: $(wildcard include/config/arch/*.h)
127 @echo ' Making $(srctree)/include/asm-$(ARCH)/arch -> $(srctree)/include/asm-$(ARCH)/$(SARCH) symlink' 98 @echo ' SYMLINK include/asm-$(ARCH)/arch -> include/asm-$(ARCH)/$(SARCH)'
128 @rm -f include/asm-$(ARCH)/arch 99 @rm -f $(srctree)/include/asm-$(ARCH)/arch/mach
129 @ln -sf $(srctree)/include/asm-$(ARCH)/$(SARCH) $(srctree)/include/asm-$(ARCH)/arch 100 @rm -f $(srctree)/include/asm-$(ARCH)/arch
101 @ln -sf $(SARCH) $(srctree)/include/asm-$(ARCH)/arch
102ifdef CONFIG_ETRAX_ARCH_V32
103 @ln -sf $(MACH) $(srctree)/include/asm-$(ARCH)/arch/mach
104endif
130 @touch $@ 105 @touch $@
106
107archclean:
108 $(Q)if [ -e arch/$(ARCH)/boot ]; then \
109 $(MAKE) $(clean)=arch/$(ARCH)/boot; \
110 fi
111
112CLEAN_FILES += \
113 $(MACHINE)/boot/zImage \
114 $(MACHINE)/boot/compressed/decompress.bin \
115 $(MACHINE)/boot/compressed/piggy.gz \
116 $(MACHINE)/boot/rescue/rescue.bin \
117 $(SRC_ARCH)/.links \
118 $(srctree)/include/asm-$(ARCH)/.arch
119
120MRPROPER_FILES += \
121 $(SRC_ARCH)/drivers \
122 $(SRC_ARCH)/boot \
123 $(SRC_ARCH)/lib \
124 $(SRC_ARCH)/arch \
125 $(SRC_ARCH)/kernel/vmlinux.lds.S \
126 $(SRC_ARCH)/kernel/asm-offsets.c
127
128define archhelp
129 echo '* zImage - Compressed kernel image (arch/$(ARCH)/boot/zImage)'
130 echo '* Image - Uncompressed kernel image (arch/$(ARCH)/boot/Image)'
131endef
diff --git a/arch/cris/arch-v10/Kconfig b/arch/cris/arch-v10/Kconfig
index 1d61faec77cd..adc164e99339 100644
--- a/arch/cris/arch-v10/Kconfig
+++ b/arch/cris/arch-v10/Kconfig
@@ -1,5 +1,7 @@
1if ETRAX_ARCH_V10 1if ETRAX_ARCH_V10
2 2
3menu "CRIS v10 options"
4
3# ETRAX 100LX v1 has a MMU "feature" requiring a low mapping 5# ETRAX 100LX v1 has a MMU "feature" requiring a low mapping
4config CRIS_LOW_MAP 6config CRIS_LOW_MAP
5 bool 7 bool
@@ -228,69 +230,6 @@ config ETRAX_LED12R
228 For products with only one or two controllable LEDs, 230 For products with only one or two controllable LEDs,
229 set this to same as CONFIG_ETRAX_LED1G (normally 2). 231 set this to same as CONFIG_ETRAX_LED1G (normally 2).
230 232
231choice
232 prompt "Product debug-port"
233 depends on ETRAX_ARCH_V10
234 default ETRAX_DEBUG_PORT0
235
236config ETRAX_DEBUG_PORT0
237 bool "Serial-0"
238 help
239 Choose a serial port for the ETRAX debug console. Default to
240 port 0.
241
242config ETRAX_DEBUG_PORT1
243 bool "Serial-1"
244 help
245 Use serial port 1 for the console.
246
247config ETRAX_DEBUG_PORT2
248 bool "Serial-2"
249 help
250 Use serial port 2 for the console.
251
252config ETRAX_DEBUG_PORT3
253 bool "Serial-3"
254 help
255 Use serial port 3 for the console.
256
257config ETRAX_DEBUG_PORT_NULL
258 bool "disabled"
259 help
260 Disable serial-port debugging.
261
262endchoice
263
264choice
265 prompt "Kernel GDB port"
266 depends on ETRAX_KGDB
267 default ETRAX_KGDB_PORT0
268 help
269 Choose a serial port for kernel debugging. NOTE: This port should
270 not be enabled under Drivers for built-in interfaces (as it has its
271 own initialization code) and should not be the same as the debug port.
272
273config ETRAX_KGDB_PORT0
274 bool "Serial-0"
275 help
276 Use serial port 0 for kernel debugging.
277
278config ETRAX_KGDB_PORT1
279 bool "Serial-1"
280 help
281 Use serial port 1 for kernel debugging.
282
283config ETRAX_KGDB_PORT2
284 bool "Serial-2"
285 help
286 Use serial port 2 for kernel debugging.
287
288config ETRAX_KGDB_PORT3
289 bool "Serial-3"
290 help
291 Use serial port 3 for kernel debugging.
292
293endchoice
294 233
295choice 234choice
296 prompt "Product rescue-port" 235 prompt "Product rescue-port"
@@ -454,4 +393,6 @@ config ETRAX_POWERBUTTON_BIT
454 help 393 help
455 Configure where power button is connected. 394 Configure where power button is connected.
456 395
396endmenu
397
457endif 398endif
diff --git a/arch/cris/arch-v10/boot/Makefile b/arch/cris/arch-v10/boot/Makefile
index e5b105851108..20c83a53caf3 100644
--- a/arch/cris/arch-v10/boot/Makefile
+++ b/arch/cris/arch-v10/boot/Makefile
@@ -1,13 +1,21 @@
1# 1#
2# arch/cris/boot/Makefile 2# arch/cris/arch-v10/boot/Makefile
3# 3#
4target = $(target_boot_dir)
5src = $(src_boot_dir)
6 4
7zImage: compressed/vmlinuz 5OBJCOPY = objcopy-cris
6OBJCOPYFLAGS = -O binary --remove-section=.bss
8 7
9compressed/vmlinuz: 8subdir- := compressed rescue
10 @$(MAKE) -f $(src)/compressed/Makefile $(target_compressed_dir)/vmlinuz 9targets := Image
11 10
12clean: 11$(obj)/Image: vmlinux FORCE
13 @$(MAKE) -f $(src)/compressed/Makefile clean 12 $(call if_changed,objcopy)
13 @echo ' Kernel: $@ is ready'
14
15$(obj)/compressed/vmlinux: $(obj)/Image FORCE
16 $(Q)$(MAKE) $(build)=$(obj)/compressed $@
17 $(Q)$(MAKE) $(build)=$(obj)/rescue $(obj)/rescue/rescue.bin
18
19$(obj)/zImage: $(obj)/compressed/vmlinux
20 @cp $< $@
21 @echo ' Kernel: $@ is ready'
diff --git a/arch/cris/arch-v10/boot/compressed/Makefile b/arch/cris/arch-v10/boot/compressed/Makefile
index 6584a44820f4..4a031cb27eb9 100644
--- a/arch/cris/arch-v10/boot/compressed/Makefile
+++ b/arch/cris/arch-v10/boot/compressed/Makefile
@@ -1,45 +1,35 @@
1# 1#
2# create a compressed vmlinuz image from the binary vmlinux.bin file 2# arch/cris/arch-v10/boot/compressed/Makefile
3# 3#
4target = $(target_compressed_dir)
5src = $(src_compressed_dir)
6 4
7CC = gcc-cris -melf $(LINUXINCLUDE) 5CC = gcc-cris -melf $(LINUXINCLUDE)
8CFLAGS = -O2 6ccflags-y += -O2
9LD = ld-cris 7LD = ld-cris
8ldflags-y += -T $(obj)/decompress.ld
9OBJECTS = $(obj)/head.o $(obj)/misc.o
10OBJCOPY = objcopy-cris 10OBJCOPY = objcopy-cris
11OBJCOPYFLAGS = -O binary --remove-section=.bss 11OBJCOPYFLAGS = -O binary --remove-section=.bss
12OBJECTS = $(target)/head.o $(target)/misc.o
13 12
14# files to compress 13quiet_cmd_image = BUILD $@
15SYSTEM = $(objtree)/vmlinux.bin 14cmd_image = cat $(obj)/decompress.bin $(obj)/piggy.gz > $@
16 15
17all: $(target_compressed_dir)/vmlinuz 16targets := vmlinux piggy.gz decompress.o decompress.bin
18 17
19$(target)/decompress.bin: $(OBJECTS) 18$(obj)/decompress.o: $(OBJECTS) FORCE
20 $(LD) -T $(src)/decompress.ld -o $(target)/decompress.o $(OBJECTS) 19 $(call if_changed,ld)
21 $(OBJCOPY) $(OBJCOPYFLAGS) $(target)/decompress.o $(target)/decompress.bin
22 20
23# Create vmlinuz image in top-level build directory 21$(obj)/decompress.bin: $(obj)/decompress.o FORCE
24$(target_compressed_dir)/vmlinuz: $(target) piggy.img $(target)/decompress.bin 22 $(call if_changed,objcopy)
25 @echo " COMPR vmlinux.bin --> vmlinuz"
26 @cat $(target)/decompress.bin piggy.img > $(target_compressed_dir)/vmlinuz
27 @rm -f piggy.img
28 23
29$(target)/head.o: $(src)/head.S 24$(obj)/head.o: $(obj)/head.S .config
30 $(CC) -D__ASSEMBLY__ -traditional -c $< -o $@ 25 @$(CC) -D__ASSEMBLY__ -traditional -c $< -o $@
31 26
32$(target)/misc.o: $(src)/misc.c 27$(obj)/misc.o: $(obj)/misc.c .config
33 $(CC) -D__KERNEL__ -c $< -o $@ 28 @$(CC) -D__KERNEL__ -c $< -o $@
34 29
35# gzip the kernel image 30$(obj)/vmlinux: $(obj)/piggy.gz $(obj)/decompress.bin FORCE
31 $(call if_changed,image)
36 32
37piggy.img: $(SYSTEM) 33$(obj)/piggy.gz: $(obj)/../Image FORCE
38 @cat $(SYSTEM) | gzip -f -9 > piggy.img 34 $(call if_changed,gzip)
39
40$(target):
41 mkdir -p $(target)
42
43clean:
44 rm -f piggy.img $(objtree)/vmlinuz
45 35
diff --git a/arch/cris/arch-v10/boot/compressed/misc.c b/arch/cris/arch-v10/boot/compressed/misc.c
index e205d2e7e089..9a43ab19391e 100644
--- a/arch/cris/arch-v10/boot/compressed/misc.c
+++ b/arch/cris/arch-v10/boot/compressed/misc.c
@@ -1,15 +1,13 @@
1/* 1/*
2 * misc.c 2 * misc.c
3 * 3 *
4 * $Id: misc.c,v 1.6 2003/10/27 08:04:31 starvik Exp $ 4 * This is a collection of several routines from gzip-1.0.3
5 *
6 * This is a collection of several routines from gzip-1.0.3
7 * adapted for Linux. 5 * adapted for Linux.
8 * 6 *
9 * malloc by Hannu Savolainen 1993 and Matthias Urlichs 1994 7 * malloc by Hannu Savolainen 1993 and Matthias Urlichs 1994
10 * puts by Nick Holloway 1993, better puts by Martin Mares 1995 8 * puts by Nick Holloway 1993, better puts by Martin Mares 1995
11 * adaptation for Linux/CRIS Axis Communications AB, 1999 9 * adaptation for Linux/CRIS Axis Communications AB, 1999
12 * 10 *
13 */ 11 */
14 12
15/* where the piggybacked kernel image expects itself to live. 13/* where the piggybacked kernel image expects itself to live.
diff --git a/arch/cris/arch-v10/boot/rescue/Makefile b/arch/cris/arch-v10/boot/rescue/Makefile
index 8be9b3130312..2e5045b9e19c 100644
--- a/arch/cris/arch-v10/boot/rescue/Makefile
+++ b/arch/cris/arch-v10/boot/rescue/Makefile
@@ -1,56 +1,38 @@
1# 1#
2# Makefile for rescue code 2# Makefile for rescue (bootstrap) code
3# 3#
4target = $(target_rescue_dir)
5src = $(src_rescue_dir)
6 4
7CC = gcc-cris -mlinux $(LINUXINCLUDE) 5CC = gcc-cris -mlinux $(LINUXINCLUDE)
8CFLAGS = -O2 6ccflags-y += -O2
7asflags-y += -traditional
9LD = gcc-cris -mlinux -nostdlib 8LD = gcc-cris -mlinux -nostdlib
9ldflags-y += -T $(obj)/rescue.ld
10OBJCOPY = objcopy-cris 10OBJCOPY = objcopy-cris
11OBJCOPYFLAGS = -O binary --remove-section=.bss 11OBJCOPYFLAGS = -O binary --remove-section=.bss
12obj-$(CONFIG_ETRAX_AXISFLASHMAP) = head.o
13OBJECT := $(obj)/head.o
12 14
13all: $(target)/rescue.bin $(target)/testrescue.bin $(target)/kimagerescue.bin 15targets := rescue.o rescue.bin
14 16
15$(target)/rescue.bin: $(target) $(target)/head.o 17$(obj)/rescue.o: $(OBJECT) FORCE
16 $(LD) -T $(src)/rescue.ld -o $(target)/rescue.o $(target)/head.o 18 $(call if_changed,ld)
17 $(OBJCOPY) $(OBJCOPYFLAGS) $(target)/rescue.o $(target)/rescue.bin
18# Place a copy in top-level build directory
19 cp -p $(target)/rescue.bin $(objtree)
20 19
21$(target)/testrescue.bin: $(target) $(target)/testrescue.o 20$(obj)/rescue.bin: $(obj)/rescue.o FORCE
22 $(OBJCOPY) $(OBJCOPYFLAGS) $(target)/testrescue.o tr.bin 21 $(call if_changed,objcopy)
22 cp -p $(obj)/rescue.bin $(objtree)
23
24$(obj)/testrescue.bin: $(obj)/testrescue.o
25 $(OBJCOPY) $(OBJCOPYFLAGS) $(obj)/testrescue.o tr.bin
23# Pad it to 784 bytes 26# Pad it to 784 bytes
24 dd if=/dev/zero of=tmp2423 bs=1 count=784 27 dd if=/dev/zero of=tmp2423 bs=1 count=784
25 cat tr.bin tmp2423 >testrescue_tmp.bin 28 cat tr.bin tmp2423 >testrescue_tmp.bin
26 dd if=testrescue_tmp.bin of=$(target)/testrescue.bin bs=1 count=784 29 dd if=testrescue_tmp.bin of=$(obj)/testrescue.bin bs=1 count=784
27 rm tr.bin tmp2423 testrescue_tmp.bin 30 rm tr.bin tmp2423 testrescue_tmp.bin
28 31
29$(target)/kimagerescue.bin: $(target) $(target)/kimagerescue.o 32$(obj)/kimagerescue.bin: $(obj)/kimagerescue.o
30 $(OBJCOPY) $(OBJCOPYFLAGS) $(target)/kimagerescue.o ktr.bin 33 $(OBJCOPY) $(OBJCOPYFLAGS) $(obj)/kimagerescue.o ktr.bin
31# Pad it to 784 bytes, that's what the rescue loader expects 34# Pad it to 784 bytes, that's what the rescue loader expects
32 dd if=/dev/zero of=tmp2423 bs=1 count=784 35 dd if=/dev/zero of=tmp2423 bs=1 count=784
33 cat ktr.bin tmp2423 >kimagerescue_tmp.bin 36 cat ktr.bin tmp2423 >kimagerescue_tmp.bin
34 dd if=kimagerescue_tmp.bin of=$(target)/kimagerescue.bin bs=1 count=784 37 dd if=kimagerescue_tmp.bin of=$(obj)/kimagerescue.bin bs=1 count=784
35 rm ktr.bin tmp2423 kimagerescue_tmp.bin 38 rm ktr.bin tmp2423 kimagerescue_tmp.bin
36
37$(target):
38 mkdir -p $(target)
39
40$(target)/head.o: $(src)/head.S
41 $(CC) -D__ASSEMBLY__ -traditional -c $< -o $*.o
42
43$(target)/testrescue.o: $(src)/testrescue.S
44 $(CC) -D__ASSEMBLY__ -traditional -c $< -o $*.o
45
46$(target)/kimagerescue.o: $(src)/kimagerescue.S
47 $(CC) -D__ASSEMBLY__ -traditional -c $< -o $*.o
48
49clean:
50 rm -f $(target)/*.o $(target)/*.bin
51
52fastdep:
53
54modules:
55
56modules-install:
diff --git a/arch/cris/arch-v10/boot/rescue/head.S b/arch/cris/arch-v10/boot/rescue/head.S
index f223cc0c00bb..6ba7be8ac4a0 100644
--- a/arch/cris/arch-v10/boot/rescue/head.S
+++ b/arch/cris/arch-v10/boot/rescue/head.S
@@ -1,5 +1,4 @@
1/* $Id: head.S,v 1.7 2005/03/07 12:11:06 starvik Exp $ 1/*
2 *
3 * Rescue code, made to reside at the beginning of the 2 * Rescue code, made to reside at the beginning of the
4 * flash-memory. when it starts, it checks a partition 3 * flash-memory. when it starts, it checks a partition
5 * table at the first sector after the rescue sector. 4 * table at the first sector after the rescue sector.
@@ -23,20 +22,20 @@
23 * Partition table format: 22 * Partition table format:
24 * 23 *
25 * Code transparency: 24 * Code transparency:
26 * 25 *
27 * 2 bytes [opcode 'nop'] 26 * 2 bytes [opcode 'nop']
28 * 2 bytes [opcode 'di'] 27 * 2 bytes [opcode 'di']
29 * 4 bytes [opcode 'ba <offset>', 8-bit or 16-bit version] 28 * 4 bytes [opcode 'ba <offset>', 8-bit or 16-bit version]
30 * 2 bytes [opcode 'nop', delay slot] 29 * 2 bytes [opcode 'nop', delay slot]
31 * 30 *
32 * Table validation (at +10): 31 * Table validation (at +10):
33 * 32 *
34 * 2 bytes [magic/version word for partitiontable - 0xef, 0xbe] 33 * 2 bytes [magic/version word for partitiontable - 0xef, 0xbe]
35 * 2 bytes [length of all entries plus the end marker] 34 * 2 bytes [length of all entries plus the end marker]
36 * 4 bytes [checksum for the partitiontable itself] 35 * 4 bytes [checksum for the partitiontable itself]
37 * 36 *
38 * Entries, each with the following format, last has offset -1: 37 * Entries, each with the following format, last has offset -1:
39 * 38 *
40 * 4 bytes [offset in bytes, from start of flash] 39 * 4 bytes [offset in bytes, from start of flash]
41 * 4 bytes [length in bytes of partition] 40 * 4 bytes [length in bytes of partition]
42 * 4 bytes [checksum, simple longword sum] 41 * 4 bytes [checksum, simple longword sum]
@@ -47,9 +46,9 @@
47 * End marker 46 * End marker
48 * 47 *
49 * 4 bytes [-1] 48 * 4 bytes [-1]
50 * 49 *
51 * 10 bytes [0, padding] 50 * 10 bytes [0, padding]
52 * 51 *
53 * Bit 0 in flags signifies RW or RO. The rescue code only bothers 52 * Bit 0 in flags signifies RW or RO. The rescue code only bothers
54 * to check the checksum for RO partitions, since the others will 53 * to check the checksum for RO partitions, since the others will
55 * change their data without updating the checksums. A 1 in bit 0 54 * change their data without updating the checksums. A 1 in bit 0
@@ -59,26 +58,29 @@
59 * 58 *
60 * During the wait for serial input, the status LED will flash so the 59 * During the wait for serial input, the status LED will flash so the
61 * user knows something went wrong. 60 * user knows something went wrong.
62 * 61 *
63 * Copyright (C) 1999, 2000, 2001, 2002, 2003 Axis Communications AB 62 * Copyright (C) 1999-2007 Axis Communications AB
64 */ 63 */
65 64
65#ifdef CONFIG_ETRAX_AXISFLASHMAP
66
66#define ASSEMBLER_MACROS_ONLY 67#define ASSEMBLER_MACROS_ONLY
67#include <asm/arch/sv_addr_ag.h> 68#include <asm/arch/sv_addr_ag.h>
68 69
69 ;; The partitiontable is looked for at the first sector after the boot 70 ;; The partitiontable is looked for at the first sector after the boot
70 ;; sector. Sector size is 65536 bytes in all flashes we use. 71 ;; sector. Sector size is 65536 bytes in all flashes we use.
71 72
72#define PTABLE_START CONFIG_ETRAX_PTABLE_SECTOR 73#define PTABLE_START CONFIG_ETRAX_PTABLE_SECTOR
73#define PTABLE_MAGIC 0xbeef 74#define PTABLE_MAGIC 0xbeef
74 75
75 ;; The normal Etrax100 on-chip boot ROM does serial boot at 0x380000f0. 76 ;; The normal Etrax100 on-chip boot ROM does serial boot at 0x380000f0.
76 ;; That is not where we put our downloaded serial boot-code. The length is 77 ;; That is not where we put our downloaded serial boot-code.
77 ;; enough for downloading code that loads the rest of itself (after 78 ;; The length is enough for downloading code that loads the rest
78 ;; having setup the DRAM etc). It is the same length as the on-chip 79 ;; of itself (after having setup the DRAM etc).
79 ;; ROM loads, so the same host loader can be used to load a rescued 80 ;; It is the same length as the on-chip ROM loads, so the same
80 ;; product as well as one booted through the Etrax serial boot code. 81 ;; host loader can be used to load a rescued product as well as
81 82 ;; one booted through the Etrax serial boot code.
83
82#define CODE_START 0x40000000 84#define CODE_START 0x40000000
83#define CODE_LENGTH 784 85#define CODE_LENGTH 784
84 86
@@ -102,7 +104,7 @@
102#define SERRECC R_SERIAL2_REC_CTRL 104#define SERRECC R_SERIAL2_REC_CTRL
103#define SERRDAT R_SERIAL2_REC_DATA 105#define SERRDAT R_SERIAL2_REC_DATA
104#define SERSTAT R_SERIAL2_STATUS 106#define SERSTAT R_SERIAL2_STATUS
105#endif 107#endif
106#ifdef CONFIG_ETRAX_RESCUE_SER3 108#ifdef CONFIG_ETRAX_RESCUE_SER3
107#define SERXOFF R_SERIAL3_XOFF 109#define SERXOFF R_SERIAL3_XOFF
108#define SERBAUD R_SERIAL3_BAUD 110#define SERBAUD R_SERIAL3_BAUD
@@ -115,60 +117,61 @@
115#define RAM_INIT_MAGIC 0x56902387 117#define RAM_INIT_MAGIC 0x56902387
116 118
117 .text 119 .text
118 120
119 ;; This is the entry point of the rescue code 121 ;; This is the entry point of the rescue code
120 ;; 0x80000000 if loaded in flash (as it should be) 122 ;; 0x80000000 if loaded in flash (as it should be)
121 ;; since etrax actually starts at address 2 when booting from flash, we 123 ;; Since etrax actually starts at address 2 when booting from flash, we
122 ;; put a nop (2 bytes) here first so we dont accidentally skip the di 124 ;; put a nop (2 bytes) here first so we dont accidentally skip the di
123 125
124 nop 126 nop
125 di 127 di
126 128
127 jump in_cache ; enter cached area instead 129 jump in_cache ; enter cached area instead
128in_cache: 130in_cache:
129 131
130 132
131 ;; first put a jump test to give a possibility of upgrading the rescue code 133 ;; First put a jump test to give a possibility of upgrading the
132 ;; without erasing/reflashing the sector. we put a longword of -1 here and if 134 ;; rescue code without erasing/reflashing the sector.
133 ;; it is not -1, we jump using the value as jump target. since we can always 135 ;; We put a longword of -1 here and if it is not -1, we jump using
134 ;; change 1's to 0's without erasing the sector, it is possible to add new 136 ;; the value as jump target. Since we can always change 1's to 0's
137 ;; without erasing the sector, it is possible to add new
135 ;; code after this and altering the jumptarget in an upgrade. 138 ;; code after this and altering the jumptarget in an upgrade.
136 139
137jtcd: move.d [jumptarget], $r0 140jtcd: move.d [jumptarget], $r0
138 cmp.d 0xffffffff, $r0 141 cmp.d 0xffffffff, $r0
139 beq no_newjump 142 beq no_newjump
140 nop 143 nop
141 144
142 jump [$r0] 145 jump [$r0]
143 146
144jumptarget: 147jumptarget:
145 .dword 0xffffffff ; can be overwritten later to insert new code 148 .dword 0xffffffff ; can be overwritten later to insert new code
146 149
147no_newjump: 150no_newjump:
148#ifdef CONFIG_ETRAX_ETHERNET 151#ifdef CONFIG_ETRAX_ETHERNET
149 ;; Start MII clock to make sure it is running when tranceiver is reset 152 ;; Start MII clock to make sure it is running when tranceiver is reset
150 move.d 0x3, $r0 ; enable = on, phy = mii_clk 153 move.d 0x3, $r0 ; enable = on, phy = mii_clk
151 move.d $r0, [R_NETWORK_GEN_CONFIG] 154 move.d $r0, [R_NETWORK_GEN_CONFIG]
152#endif 155#endif
153 156
154 ;; We need to setup the bus registers before we start using the DRAM 157 ;; We need to setup the bus registers before we start using the DRAM
155#include "../../lib/dram_init.S" 158#include "../../lib/dram_init.S"
156 159
157 ;; we now should go through the checksum-table and check the listed 160 ;; we now should go through the checksum-table and check the listed
158 ;; partitions for errors. 161 ;; partitions for errors.
159 162
160 move.d PTABLE_START, $r3 163 move.d PTABLE_START, $r3
161 move.d [$r3], $r0 164 move.d [$r3], $r0
162 cmp.d NOP_DI, $r0 ; make sure the nop/di is there... 165 cmp.d NOP_DI, $r0 ; make sure the nop/di is there...
163 bne do_rescue 166 bne do_rescue
164 nop 167 nop
165 168
166 ;; skip the code transparency block (10 bytes). 169 ;; skip the code transparency block (10 bytes).
167 170
168 addq 10, $r3 171 addq 10, $r3
169 172
170 ;; check for correct magic 173 ;; check for correct magic
171 174
172 move.w [$r3+], $r0 175 move.w [$r3+], $r0
173 cmp.w PTABLE_MAGIC, $r0 176 cmp.w PTABLE_MAGIC, $r0
174 bne do_rescue ; didn't recognize - trig rescue 177 bne do_rescue ; didn't recognize - trig rescue
@@ -186,11 +189,11 @@ no_newjump:
186 cmp.d $r0, $r4 189 cmp.d $r0, $r4
187 bne do_rescue ; didn't match - trig rescue 190 bne do_rescue ; didn't match - trig rescue
188 nop 191 nop
189 192
190 ;; ptable is ok. validate each entry. 193 ;; ptable is ok. validate each entry.
191 194
192 moveq -1, $r7 195 moveq -1, $r7
193 196
194ploop: move.d [$r3+], $r1 ; partition offset (from ptable start) 197ploop: move.d [$r3+], $r1 ; partition offset (from ptable start)
195 bne notfirst ; check if it is the partition containing ptable 198 bne notfirst ; check if it is the partition containing ptable
196 nop ; yes.. 199 nop ; yes..
@@ -199,7 +202,7 @@ ploop: move.d [$r3+], $r1 ; partition offset (from ptable start)
199 sub.d $r8, $r2 ; minus the ptable length 202 sub.d $r8, $r2 ; minus the ptable length
200 ba bosse 203 ba bosse
201 nop 204 nop
202notfirst: 205notfirst:
203 cmp.d -1, $r1 ; the end of the ptable ? 206 cmp.d -1, $r1 ; the end of the ptable ?
204 beq flash_ok ; if so, the flash is validated 207 beq flash_ok ; if so, the flash is validated
205 move.d [$r3+], $r2 ; partition length 208 move.d [$r3+], $r2 ; partition length
@@ -213,47 +216,46 @@ bosse: move.d [$r3+], $r5 ; checksum
213 bpl 1f 216 bpl 1f
214 nop 217 nop
215 move.d $r1, $r7 ; remember boot partition offset 218 move.d $r1, $r7 ; remember boot partition offset
2161: 2191:
217
218 add.d PTABLE_START, $r1 220 add.d PTABLE_START, $r1
219 221
220 jsr checksum ; checksum the partition 222 jsr checksum ; checksum the partition
221 223
222 cmp.d $r0, $r5 224 cmp.d $r0, $r5
223 beq ploop ; checksums matched, go to next entry 225 beq ploop ; checksums matched, go to next entry
224 nop 226 nop
225 227
226 ;; otherwise fall through to the rescue code. 228 ;; otherwise fall through to the rescue code.
227 229
228do_rescue: 230do_rescue:
229 ;; setup port PA and PB default initial directions and data 231 ;; setup port PA and PB default initial directions and data
230 ;; (so we can flash LEDs, and so that DTR and others are set) 232 ;; (so we can flash LEDs, and so that DTR and others are set)
231 233
232 move.b CONFIG_ETRAX_DEF_R_PORT_PA_DIR, $r0 234 move.b CONFIG_ETRAX_DEF_R_PORT_PA_DIR, $r0
233 move.b $r0, [R_PORT_PA_DIR] 235 move.b $r0, [R_PORT_PA_DIR]
234 move.b CONFIG_ETRAX_DEF_R_PORT_PA_DATA, $r0 236 move.b CONFIG_ETRAX_DEF_R_PORT_PA_DATA, $r0
235 move.b $r0, [R_PORT_PA_DATA] 237 move.b $r0, [R_PORT_PA_DATA]
236 238
237 move.b CONFIG_ETRAX_DEF_R_PORT_PB_DIR, $r0 239 move.b CONFIG_ETRAX_DEF_R_PORT_PB_DIR, $r0
238 move.b $r0, [R_PORT_PB_DIR] 240 move.b $r0, [R_PORT_PB_DIR]
239 move.b CONFIG_ETRAX_DEF_R_PORT_PB_DATA, $r0 241 move.b CONFIG_ETRAX_DEF_R_PORT_PB_DATA, $r0
240 move.b $r0, [R_PORT_PB_DATA] 242 move.b $r0, [R_PORT_PB_DATA]
241 243
242 ;; setup the serial port at 115200 baud 244 ;; setup the serial port at 115200 baud
243 245
244 moveq 0, $r0 246 moveq 0, $r0
245 move.d $r0, [SERXOFF] 247 move.d $r0, [SERXOFF]
246 248
247 move.b 0x99, $r0 249 move.b 0x99, $r0
248 move.b $r0, [SERBAUD] ; 115.2kbaud for both transmit and receive 250 move.b $r0, [SERBAUD] ; 115.2kbaud for both transmit and receive
249 251
250 move.b 0x40, $r0 ; rec enable 252 move.b 0x40, $r0 ; rec enable
251 move.b $r0, [SERRECC] 253 move.b $r0, [SERRECC]
252 254
253 moveq 0, $r1 ; "timer" to clock out a LED red flash 255 moveq 0, $r1 ; "timer" to clock out a LED red flash
254 move.d CODE_START, $r3 ; destination counter 256 move.d CODE_START, $r3 ; destination counter
255 movu.w CODE_LENGTH, $r4; length 257 movu.w CODE_LENGTH, $r4; length
256 258
257wait_ser: 259wait_ser:
258 addq 1, $r1 260 addq 1, $r1
259#ifndef CONFIG_ETRAX_NO_LEDS 261#ifndef CONFIG_ETRAX_NO_LEDS
@@ -272,20 +274,20 @@ wait_ser:
272 nop 274 nop
2731: not $r0 ; clear bit 2751: not $r0 ; clear bit
274 and.d $r0, $r2 276 and.d $r0, $r2
2752: 2772:
276#ifdef CONFIG_ETRAX_PA_LEDS 278#ifdef CONFIG_ETRAX_PA_LEDS
277 move.b $r2, [R_PORT_PA_DATA] 279 move.b $r2, [R_PORT_PA_DATA]
278#endif 280#endif
279#ifdef CONFIG_ETRAX_PB_LEDS 281#ifdef CONFIG_ETRAX_PB_LEDS
280 move.b $r2, [R_PORT_PB_DATA] 282 move.b $r2, [R_PORT_PB_DATA]
281#endif 283#endif
282#ifdef CONFIG_ETRAX_90000000_LEDS 284#ifdef CONFIG_ETRAX_90000000_LEDS
283 move.b $r2, [0x90000000] 285 move.b $r2, [0x90000000]
284#endif 286#endif
285#endif 287#endif
286 288
287 ;; check if we got something on the serial port 289 ;; check if we got something on the serial port
288 290
289 move.b [SERSTAT], $r0 291 move.b [SERSTAT], $r0
290 btstq 0, $r0 ; data_avail 292 btstq 0, $r0 ; data_avail
291 bpl wait_ser 293 bpl wait_ser
@@ -295,14 +297,15 @@ wait_ser:
295 297
296 move.b [SERRDAT], $r0 298 move.b [SERRDAT], $r0
297 move.b $r0, [$r3+] 299 move.b $r0, [$r3+]
298 300
299 subq 1, $r4 ; decrease length 301 subq 1, $r4 ; decrease length
300 bne wait_ser 302 bne wait_ser
301 nop 303 nop
302 304
303 ;; jump into downloaded code 305 ;; jump into downloaded code
304 306
305 move.d RAM_INIT_MAGIC, $r8 ; Tell next product that DRAM is initialized 307 move.d RAM_INIT_MAGIC, $r8 ; Tell next product that DRAM is
308 ; initialized
306 jump CODE_START 309 jump CODE_START
307 310
308flash_ok: 311flash_ok:
@@ -313,7 +316,8 @@ flash_ok:
313 nop 316 nop
314 move.d PTABLE_START, $r7; otherwise use the ptable start 317 move.d PTABLE_START, $r7; otherwise use the ptable start
3151: 3181:
316 move.d RAM_INIT_MAGIC, $r8 ; Tell next product that DRAM is initialized 319 move.d RAM_INIT_MAGIC, $r8 ; Tell next product that DRAM is
320 ; initialized
317 jump $r7 ; boot! 321 jump $r7 ; boot!
318 322
319 323
@@ -327,7 +331,8 @@ checksum:
327 moveq 0, $r0 331 moveq 0, $r0
328 moveq CONFIG_ETRAX_FLASH1_SIZE, $r6 332 moveq CONFIG_ETRAX_FLASH1_SIZE, $r6
329 333
330 ;; If the first physical flash memory is exceeded wrap to the second one. 334 ;; If the first physical flash memory is exceeded wrap to the
335 ;; second one
331 btstq 26, $r1 ; Are we addressing first flash? 336 btstq 26, $r1 ; Are we addressing first flash?
332 bpl 1f 337 bpl 1f
333 nop 338 nop
@@ -351,3 +356,5 @@ checksum:
3513: move.d MEM_CSE1_START, $r1 ; wrap to second flash 3563: move.d MEM_CSE1_START, $r1 ; wrap to second flash
352 ba 2b 357 ba 2b
353 nop 358 nop
359
360#endif
diff --git a/arch/cris/arch-v10/boot/rescue/kimagerescue.S b/arch/cris/arch-v10/boot/rescue/kimagerescue.S
index cbccd6316d39..55eeff8bb08e 100644
--- a/arch/cris/arch-v10/boot/rescue/kimagerescue.S
+++ b/arch/cris/arch-v10/boot/rescue/kimagerescue.S
@@ -1,5 +1,4 @@
1/* $Id: kimagerescue.S,v 1.1 2001/12/17 13:59:27 bjornw Exp $ 1/*
2 *
3 * Rescue code to be prepended on a kimage and copied to the 2 * Rescue code to be prepended on a kimage and copied to the
4 * rescue serial port. 3 * rescue serial port.
5 * This is called from the rescue code, it will copy received data to 4 * This is called from the rescue code, it will copy received data to
@@ -7,13 +6,13 @@
7 */ 6 */
8 7
9#define ASSEMBLER_MACROS_ONLY 8#define ASSEMBLER_MACROS_ONLY
10#include <asm/sv_addr_ag.h> 9#include <asm/arch/sv_addr_ag.h>
11 10
12#define CODE_START 0x40004000 11#define CODE_START 0x40004000
13#define CODE_LENGTH 784 12#define CODE_LENGTH 784
14#define TIMEOUT_VALUE 1000 13#define TIMEOUT_VALUE 1000
15 14
16 15
17#ifdef CONFIG_ETRAX_RESCUE_SER0 16#ifdef CONFIG_ETRAX_RESCUE_SER0
18#define SERXOFF R_SERIAL0_XOFF 17#define SERXOFF R_SERIAL0_XOFF
19#define SERBAUD R_SERIAL0_BAUD 18#define SERBAUD R_SERIAL0_BAUD
@@ -34,7 +33,7 @@
34#define SERRECC R_SERIAL2_REC_CTRL 33#define SERRECC R_SERIAL2_REC_CTRL
35#define SERRDAT R_SERIAL2_REC_DATA 34#define SERRDAT R_SERIAL2_REC_DATA
36#define SERSTAT R_SERIAL2_STATUS 35#define SERSTAT R_SERIAL2_STATUS
37#endif 36#endif
38#ifdef CONFIG_ETRAX_RESCUE_SER3 37#ifdef CONFIG_ETRAX_RESCUE_SER3
39#define SERXOFF R_SERIAL3_XOFF 38#define SERXOFF R_SERIAL3_XOFF
40#define SERBAUD R_SERIAL3_BAUD 39#define SERBAUD R_SERIAL3_BAUD
@@ -48,54 +47,55 @@
48 ;; 0x80000000 if loaded in flash (as it should be) 47 ;; 0x80000000 if loaded in flash (as it should be)
49 ;; since etrax actually starts at address 2 when booting from flash, we 48 ;; since etrax actually starts at address 2 when booting from flash, we
50 ;; put a nop (2 bytes) here first so we dont accidentally skip the di 49 ;; put a nop (2 bytes) here first so we dont accidentally skip the di
51 50
52 nop 51 nop
53 di 52 di
54#ifndef CONFIG_SVINTO_SIM 53#ifndef CONFIG_SVINTO_SIM
55 ;; setup port PA and PB default initial directions and data 54 ;; setup port PA and PB default initial directions and data
56 ;; (so we can flash LEDs, and so that DTR and others are set) 55 ;; (so we can flash LEDs, and so that DTR and others are set)
57 56
58 move.b CONFIG_ETRAX_DEF_R_PORT_PA_DIR, $r0 57 move.b CONFIG_ETRAX_DEF_R_PORT_PA_DIR, $r0
59 move.b $r0, [R_PORT_PA_DIR] 58 move.b $r0, [R_PORT_PA_DIR]
60 move.b CONFIG_ETRAX_DEF_R_PORT_PA_DATA, $r0 59 move.b CONFIG_ETRAX_DEF_R_PORT_PA_DATA, $r0
61 move.b $r0, [R_PORT_PA_DATA] 60 move.b $r0, [R_PORT_PA_DATA]
62 61
63 move.b CONFIG_ETRAX_DEF_R_PORT_PB_DIR, $r0 62 move.b CONFIG_ETRAX_DEF_R_PORT_PB_DIR, $r0
64 move.b $r0, [R_PORT_PB_DIR] 63 move.b $r0, [R_PORT_PB_DIR]
65 move.b CONFIG_ETRAX_DEF_R_PORT_PB_DATA, $r0 64 move.b CONFIG_ETRAX_DEF_R_PORT_PB_DATA, $r0
66 move.b $r0, [R_PORT_PB_DATA] 65 move.b $r0, [R_PORT_PB_DATA]
67 66
68 ;; We need to setup the bus registers before we start using the DRAM 67 ;; We need to setup the bus registers before we start using the DRAM
69#include "../../lib/dram_init.S" 68#include "../../lib/dram_init.S"
70 69
71#endif 70#endif
72 ;; Setup the stack to a suitably high address. 71 ;; Setup the stack to a suitably high address.
73 ;; We assume 8 MB is the minimum DRAM in an eLinux 72 ;; We assume 8 MB is the minimum DRAM in an eLinux
74 ;; product and put the sp at the top for now. 73 ;; product and put the sp at the top for now.
75 74
76 move.d 0x40800000, $sp 75 move.d 0x40800000, $sp
77 76
78 ;; setup the serial port at 115200 baud 77 ;; setup the serial port at 115200 baud
79 78
80 moveq 0, $r0 79 moveq 0, $r0
81 move.d $r0, [SERXOFF] 80 move.d $r0, [SERXOFF]
82 81
83 move.b 0x99, $r0 82 move.b 0x99, $r0
84 move.b $r0, [SERBAUD] ; 115.2kbaud for both transmit and receive 83 move.b $r0, [SERBAUD] ; 115.2kbaud for both transmit
84 ; and receive
85 85
86 move.b 0x40, $r0 ; rec enable 86 move.b 0x40, $r0 ; rec enable
87 move.b $r0, [SERRECC] 87 move.b $r0, [SERRECC]
88 88
89 89
90 moveq 0, $r1 ; "timer" to clock out a LED red flash 90 moveq 0, $r1 ; "timer" to clock out a LED red flash
91 move.d CODE_START, $r3 ; destination counter 91 move.d CODE_START, $r3 ; destination counter
92 move.d CODE_LENGTH, $r4 ; length 92 move.d CODE_LENGTH, $r4 ; length
93 move.d TIMEOUT_VALUE, $r5 ; "timeout" until jump 93 move.d TIMEOUT_VALUE, $r5 ; "timeout" until jump
94 94
95wait_ser: 95wait_ser:
96 addq 1, $r1 96 addq 1, $r1
97 subq 1, $r5 ; decrease timeout 97 subq 1, $r5 ; decrease timeout
98 beq jump_start ; timed out 98 beq jump_start ; timed out
99 nop 99 nop
100#ifndef CONFIG_ETRAX_NO_LEDS 100#ifndef CONFIG_ETRAX_NO_LEDS
101#ifdef CONFIG_ETRAX_PA_LEDS 101#ifdef CONFIG_ETRAX_PA_LEDS
@@ -111,21 +111,21 @@ wait_ser:
111 or.d $r0, $r2 ; set bit 111 or.d $r0, $r2 ; set bit
112 ba 2f 112 ba 2f
113 nop 113 nop
1141: not $r0 ; clear bit 1141: not $r0 ; clear bit
115 and.d $r0, $r2 115 and.d $r0, $r2
1162: 1162:
117#ifdef CONFIG_ETRAX_PA_LEDS 117#ifdef CONFIG_ETRAX_PA_LEDS
118 move.b $r2, [R_PORT_PA_DATA] 118 move.b $r2, [R_PORT_PA_DATA]
119#endif 119#endif
120#ifdef CONFIG_ETRAX_PB_LEDS 120#ifdef CONFIG_ETRAX_PB_LEDS
121 move.b $r2, [R_PORT_PB_DATA] 121 move.b $r2, [R_PORT_PB_DATA]
122#endif 122#endif
123#endif 123#endif
124 124
125 ;; check if we got something on the serial port 125 ;; check if we got something on the serial port
126 126
127 move.b [SERSTAT], $r0 127 move.b [SERSTAT], $r0
128 btstq 0, $r0 ; data_avail 128 btstq 0, $r0 ; data_avail
129 bpl wait_ser 129 bpl wait_ser
130 nop 130 nop
131 131
@@ -134,7 +134,7 @@ wait_ser:
134 move.b [SERRDAT], $r0 134 move.b [SERRDAT], $r0
135 move.b $r0, [$r3+] 135 move.b $r0, [$r3+]
136 move.d TIMEOUT_VALUE, $r5 ; reset "timeout" 136 move.d TIMEOUT_VALUE, $r5 ; reset "timeout"
137 subq 1, $r4 ; decrease length 137 subq 1, $r4 ; decrease length
138 bne wait_ser 138 bne wait_ser
139 nop 139 nop
140jump_start: 140jump_start:
diff --git a/arch/cris/arch-v10/boot/rescue/testrescue.S b/arch/cris/arch-v10/boot/rescue/testrescue.S
index 566a9f341254..2d937f9afe23 100644
--- a/arch/cris/arch-v10/boot/rescue/testrescue.S
+++ b/arch/cris/arch-v10/boot/rescue/testrescue.S
@@ -1,13 +1,12 @@
1/* $Id: testrescue.S,v 1.1 2001/12/17 13:59:27 bjornw Exp $ 1/*
2 *
3 * Simple testcode to download by the rescue block. 2 * Simple testcode to download by the rescue block.
4 * Just lits some LEDs to show it was downloaded correctly. 3 * Just lights some LEDs to show it was downloaded correctly.
5 * 4 *
6 * Copyright (C) 1999 Axis Communications AB 5 * Copyright (C) 1999 Axis Communications AB
7 */ 6 */
8 7
9#define ASSEMBLER_MACROS_ONLY 8#define ASSEMBLER_MACROS_ONLY
10#include <asm/sv_addr_ag.h> 9#include <asm/arch/sv_addr_ag.h>
11 10
12 .text 11 .text
13 12
@@ -16,11 +15,10 @@
16 moveq -1, $r2 15 moveq -1, $r2
17 move.b $r2, [R_PORT_PA_DIR] 16 move.b $r2, [R_PORT_PA_DIR]
18 moveq 0, $r2 17 moveq 0, $r2
19 move.b $r2, [R_PORT_PA_DATA] 18 move.b $r2, [R_PORT_PA_DATA]
20 19
21endless: 20endless:
22 nop 21 nop
23 ba endless 22 ba endless
24 nop 23 nop
25 24
26
diff --git a/arch/cris/arch-v10/drivers/Kconfig b/arch/cris/arch-v10/drivers/Kconfig
index 96740ef497d4..58f5864a6680 100644
--- a/arch/cris/arch-v10/drivers/Kconfig
+++ b/arch/cris/arch-v10/drivers/Kconfig
@@ -9,37 +9,6 @@ config ETRAX_ETHERNET
9 This option enables the ETRAX 100LX built-in 10/100Mbit Ethernet 9 This option enables the ETRAX 100LX built-in 10/100Mbit Ethernet
10 controller. 10 controller.
11 11
12choice
13 prompt "Network LED behavior"
14 depends on ETRAX_ETHERNET
15 default ETRAX_NETWORK_LED_ON_WHEN_ACTIVITY
16
17config ETRAX_NETWORK_LED_ON_WHEN_LINK
18 bool "LED_on_when_link"
19 help
20 Selecting LED_on_when_link will light the LED when there is a
21 connection and will flash off when there is activity.
22
23 Selecting LED_on_when_activity will light the LED only when
24 there is activity.
25
26 This setting will also affect the behaviour of other activity LEDs
27 e.g. Bluetooth.
28
29config ETRAX_NETWORK_LED_ON_WHEN_ACTIVITY
30 bool "LED_on_when_activity"
31 help
32 Selecting LED_on_when_link will light the LED when there is a
33 connection and will flash off when there is activity.
34
35 Selecting LED_on_when_activity will light the LED only when
36 there is activity.
37
38 This setting will also affect the behaviour of other activity LEDs
39 e.g. Bluetooth.
40
41endchoice
42
43config ETRAX_SERIAL 12config ETRAX_SERIAL
44 bool "Serial-port support" 13 bool "Serial-port support"
45 depends on ETRAX_ARCH_V10 14 depends on ETRAX_ARCH_V10
@@ -84,32 +53,6 @@ config ETRAX_SERIAL_PORT0
84 the same DMA channels. 53 the same DMA channels.
85 54
86choice 55choice
87 prompt "Ser0 DMA out assignment"
88 depends on ETRAX_SERIAL_PORT0
89 default ETRAX_SERIAL_PORT0_DMA6_OUT
90
91config ETRAX_SERIAL_PORT0_NO_DMA_OUT
92 bool "No DMA out"
93
94config ETRAX_SERIAL_PORT0_DMA6_OUT
95 bool "DMA 6"
96
97endchoice
98
99choice
100 prompt "Ser0 DMA in assignment"
101 depends on ETRAX_SERIAL_PORT0
102 default ETRAX_SERIAL_PORT0_DMA7_IN
103
104config ETRAX_SERIAL_PORT0_NO_DMA_IN
105 bool "No DMA in"
106
107config ETRAX_SERIAL_PORT0_DMA7_IN
108 bool "DMA 7"
109
110endchoice
111
112choice
113 prompt "Ser0 DTR, RI, DSR and CD assignment" 56 prompt "Ser0 DTR, RI, DSR and CD assignment"
114 depends on ETRAX_SERIAL_PORT0 57 depends on ETRAX_SERIAL_PORT0
115 default ETRAX_SER0_DTR_RI_DSR_CD_ON_NONE 58 default ETRAX_SER0_DTR_RI_DSR_CD_ON_NONE
@@ -198,32 +141,6 @@ config ETRAX_SERIAL_PORT1
198 Enables the ETRAX 100 serial driver for ser1 (ttyS1). 141 Enables the ETRAX 100 serial driver for ser1 (ttyS1).
199 142
200choice 143choice
201 prompt "Ser1 DMA out assignment"
202 depends on ETRAX_SERIAL_PORT1
203 default ETRAX_SERIAL_PORT1_DMA8_OUT
204
205config ETRAX_SERIAL_PORT1_NO_DMA_OUT
206 bool "No DMA out"
207
208config ETRAX_SERIAL_PORT1_DMA8_OUT
209 bool "DMA 8"
210
211endchoice
212
213choice
214 prompt "Ser1 DMA in assignment"
215 depends on ETRAX_SERIAL_PORT1
216 default ETRAX_SERIAL_PORT1_DMA9_IN
217
218config ETRAX_SERIAL_PORT1_NO_DMA_IN
219 bool "No DMA in"
220
221config ETRAX_SERIAL_PORT1_DMA9_IN
222 bool "DMA 9"
223
224endchoice
225
226choice
227 prompt "Ser1 DTR, RI, DSR and CD assignment" 144 prompt "Ser1 DTR, RI, DSR and CD assignment"
228 depends on ETRAX_SERIAL_PORT1 145 depends on ETRAX_SERIAL_PORT1
229 default ETRAX_SER1_DTR_RI_DSR_CD_ON_NONE 146 default ETRAX_SER1_DTR_RI_DSR_CD_ON_NONE
@@ -315,32 +232,6 @@ config ETRAX_SERIAL_PORT2
315 Enables the ETRAX 100 serial driver for ser2 (ttyS2). 232 Enables the ETRAX 100 serial driver for ser2 (ttyS2).
316 233
317choice 234choice
318 prompt "Ser2 DMA out assignment"
319 depends on ETRAX_SERIAL_PORT2
320 default ETRAX_SERIAL_PORT2_DMA2_OUT
321
322config ETRAX_SERIAL_PORT2_NO_DMA_OUT
323 bool "No DMA out"
324
325config ETRAX_SERIAL_PORT2_DMA2_OUT
326 bool "DMA 2"
327
328endchoice
329
330choice
331 prompt "Ser2 DMA in assignment"
332 depends on ETRAX_SERIAL_PORT2
333 default ETRAX_SERIAL_PORT2_DMA3_IN
334
335config ETRAX_SERIAL_PORT2_NO_DMA_IN
336 bool "No DMA in"
337
338config ETRAX_SERIAL_PORT2_DMA3_IN
339 bool "DMA 3"
340
341endchoice
342
343choice
344 prompt "Ser2 DTR, RI, DSR and CD assignment" 235 prompt "Ser2 DTR, RI, DSR and CD assignment"
345 depends on ETRAX_SERIAL_PORT2 236 depends on ETRAX_SERIAL_PORT2
346 default ETRAX_SER2_DTR_RI_DSR_CD_ON_NONE 237 default ETRAX_SER2_DTR_RI_DSR_CD_ON_NONE
@@ -429,32 +320,6 @@ config ETRAX_SERIAL_PORT3
429 Enables the ETRAX 100 serial driver for ser3 (ttyS3). 320 Enables the ETRAX 100 serial driver for ser3 (ttyS3).
430 321
431choice 322choice
432 prompt "Ser3 DMA out assignment"
433 depends on ETRAX_SERIAL_PORT3
434 default ETRAX_SERIAL_PORT3_DMA4_OUT
435
436config ETRAX_SERIAL_PORT3_NO_DMA_OUT
437 bool "No DMA out"
438
439config ETRAX_SERIAL_PORT3_DMA4_OUT
440 bool "DMA 4"
441
442endchoice
443
444choice
445 prompt "Ser3 DMA in assignment"
446 depends on ETRAX_SERIAL_PORT3
447 default ETRAX_SERIAL_PORT3_DMA5_IN
448
449config ETRAX_SERIAL_PORT3_NO_DMA_IN
450 bool "No DMA in"
451
452config ETRAX_SERIAL_PORT3_DMA5_IN
453 bool "DMA 5"
454
455endchoice
456
457choice
458 prompt "Ser3 DTR, RI, DSR and CD assignment" 323 prompt "Ser3 DTR, RI, DSR and CD assignment"
459 depends on ETRAX_SERIAL_PORT3 324 depends on ETRAX_SERIAL_PORT3
460 default ETRAX_SER3_DTR_RI_DSR_CD_ON_NONE 325 default ETRAX_SER3_DTR_RI_DSR_CD_ON_NONE
@@ -563,21 +428,6 @@ config ETRAX_USB_HOST_PORT2
563 depends on ETRAX_USB_HOST 428 depends on ETRAX_USB_HOST
564 default n 429 default n
565 430
566config ETRAX_AXISFLASHMAP
567 bool "Axis flash-map support"
568 depends on ETRAX_ARCH_V10
569 select MTD
570 select MTD_CFI
571 select MTD_CFI_AMDSTD
572 select MTD_CHAR
573 select MTD_BLOCK
574 select MTD_PARTITIONS
575 select MTD_CONCAT
576 select MTD_COMPLEX_MAPPINGS
577 help
578 This option enables MTD mapping of flash devices. Needed to use
579 flash memories. If unsure, say Y.
580
581config ETRAX_PTABLE_SECTOR 431config ETRAX_PTABLE_SECTOR
582 int "Byte-offset of partition table sector" 432 int "Byte-offset of partition table sector"
583 depends on ETRAX_AXISFLASHMAP 433 depends on ETRAX_AXISFLASHMAP
@@ -731,37 +581,6 @@ config ETRAX_PB_CHANGEABLE_BITS
731 Bit set = changeable. 581 Bit set = changeable.
732 You probably want 00 here. 582 You probably want 00 here.
733 583
734config ETRAX_RTC
735 bool "Real Time Clock support"
736 depends on ETRAX_ARCH_V10
737 help
738 Enables drivers for the Real-Time Clock battery-backed chips on
739 some products. The kernel reads the time when booting, and
740 the date can be set using ioctl(fd, RTC_SET_TIME, &rt) with rt a
741 rtc_time struct (see <file:include/asm-cris/rtc.h>) on the /dev/rtc
742 device, major 121. You can check the time with cat /proc/rtc, but
743 normal time reading should be done using libc function time and
744 friends.
745
746choice
747 prompt "RTC chip"
748 depends on ETRAX_RTC
749 default ETRAX_DS1302
750
751config ETRAX_DS1302
752 bool "DS1302"
753 help
754 Enables the driver for the DS1302 Real-Time Clock battery-backed
755 chip on some products.
756
757config ETRAX_PCF8563
758 bool "PCF8563"
759 help
760 Enables the driver for the PCF8563 Real-Time Clock battery-backed
761 chip on some products.
762
763endchoice
764
765config ETRAX_DS1302_RST_ON_GENERIC_PORT 584config ETRAX_DS1302_RST_ON_GENERIC_PORT
766 bool "DS1302 RST on Generic Port" 585 bool "DS1302 RST on Generic Port"
767 depends on ETRAX_DS1302 586 depends on ETRAX_DS1302
diff --git a/arch/cris/arch-v10/drivers/Makefile b/arch/cris/arch-v10/drivers/Makefile
index 20258e36f384..44bf2e88c26e 100644
--- a/arch/cris/arch-v10/drivers/Makefile
+++ b/arch/cris/arch-v10/drivers/Makefile
@@ -2,11 +2,11 @@
2# Makefile for Etrax-specific drivers 2# Makefile for Etrax-specific drivers
3# 3#
4 4
5obj-$(CONFIG_ETRAX_AXISFLASHMAP) += axisflashmap.o 5obj-$(CONFIG_ETRAX_AXISFLASHMAP) += axisflashmap.o
6obj-$(CONFIG_ETRAX_I2C) += i2c.o 6obj-$(CONFIG_ETRAX_I2C) += i2c.o
7obj-$(CONFIG_ETRAX_I2C_EEPROM) += eeprom.o 7obj-$(CONFIG_ETRAX_I2C_EEPROM) += eeprom.o
8obj-$(CONFIG_ETRAX_GPIO) += gpio.o 8obj-$(CONFIG_ETRAX_GPIO) += gpio.o
9obj-$(CONFIG_ETRAX_DS1302) += ds1302.o 9obj-$(CONFIG_ETRAX_DS1302) += ds1302.o
10obj-$(CONFIG_ETRAX_PCF8563) += pcf8563.o 10obj-$(CONFIG_ETRAX_PCF8563) += pcf8563.o
11 11obj-$(CONFIG_ETRAX_SYNCHRONOUS_SERIAL) += sync_serial.o
12 12
diff --git a/arch/cris/arch-v10/drivers/axisflashmap.c b/arch/cris/arch-v10/drivers/axisflashmap.c
index ea3cf2e39a14..b3bdda93ffef 100644
--- a/arch/cris/arch-v10/drivers/axisflashmap.c
+++ b/arch/cris/arch-v10/drivers/axisflashmap.c
@@ -10,129 +10,6 @@
10 * tells us what other partitions to define. If there isn't, we use a default 10 * tells us what other partitions to define. If there isn't, we use a default
11 * partition split defined below. 11 * partition split defined below.
12 * 12 *
13 * $Log: axisflashmap.c,v $
14 * Revision 1.11 2004/11/15 10:27:14 starvik
15 * Corrected typo (Thanks to Milton Miller <miltonm@bga.com>).
16 *
17 * Revision 1.10 2004/08/16 12:37:22 starvik
18 * Merge of Linux 2.6.8
19 *
20 * Revision 1.8 2004/05/14 07:58:03 starvik
21 * Merge of changes from 2.4
22 *
23 * Revision 1.6 2003/07/04 08:27:37 starvik
24 * Merge of Linux 2.5.74
25 *
26 * Revision 1.5 2002/12/11 13:13:57 starvik
27 * Added arch/ to v10 specific includes
28 * Added fix from Linux 2.4 in serial.c (flush_to_flip_buffer)
29 *
30 * Revision 1.4 2002/11/20 11:56:10 starvik
31 * Merge of Linux 2.5.48
32 *
33 * Revision 1.3 2002/11/13 14:54:13 starvik
34 * Copied from linux 2.4
35 *
36 * Revision 1.28 2002/10/01 08:08:43 jonashg
37 * The first partition ends at the start of the partition table.
38 *
39 * Revision 1.27 2002/08/21 09:23:13 jonashg
40 * Speling.
41 *
42 * Revision 1.26 2002/08/21 08:35:20 jonashg
43 * Cosmetic change to printouts.
44 *
45 * Revision 1.25 2002/08/21 08:15:42 jonashg
46 * Made it compile even without CONFIG_MTD_CONCAT defined.
47 *
48 * Revision 1.24 2002/08/20 13:12:35 jonashg
49 * * New approach to probing. Probe cse0 and cse1 separately and (mtd)concat
50 * the results.
51 * * Removed compile time tests concerning how the mtdram driver has been
52 * configured. The user will know about the misconfiguration at runtime
53 * instead. (The old approach made it impossible to use mtdram for anything
54 * else than RAM boot).
55 *
56 * Revision 1.23 2002/05/13 12:12:28 johana
57 * Allow compile without CONFIG_MTD_MTDRAM but warn at compiletime and
58 * be informative at runtime.
59 *
60 * Revision 1.22 2002/05/13 10:24:44 johana
61 * Added #if checks on MTDRAM CONFIG
62 *
63 * Revision 1.21 2002/05/06 16:05:20 johana
64 * Removed debug printout.
65 *
66 * Revision 1.20 2002/05/06 16:03:00 johana
67 * No more cramfs as root hack in generic code.
68 * It's handled by axisflashmap using mtdram.
69 *
70 * Revision 1.19 2002/03/15 17:10:28 bjornw
71 * Changed comment about cached access since we changed this before
72 *
73 * Revision 1.18 2002/03/05 17:06:15 jonashg
74 * Try amd_flash probe before cfi_probe since amd_flash driver can handle two
75 * (or more) flash chips of different model and the cfi driver cannot.
76 *
77 * Revision 1.17 2001/11/12 19:42:38 pkj
78 * Fixed compiler warnings.
79 *
80 * Revision 1.16 2001/11/08 11:18:58 jonashg
81 * Always read from uncached address to avoid problems with flushing
82 * cachelines after write and MTD-erase. No performance loss have been
83 * seen yet.
84 *
85 * Revision 1.15 2001/10/19 12:41:04 jonashg
86 * Name of probe has changed in MTD.
87 *
88 * Revision 1.14 2001/09/21 07:14:10 jonashg
89 * Made root filesystem (cramfs) use mtdblock driver when booting from flash.
90 *
91 * Revision 1.13 2001/08/15 13:57:35 jonashg
92 * Entire MTD updated to the linux 2.4.7 version.
93 *
94 * Revision 1.12 2001/06/11 09:50:30 jonashg
95 * Oops, 2MB is 0x200000 bytes.
96 *
97 * Revision 1.11 2001/06/08 11:39:44 jonashg
98 * Changed sizes and offsets in axis_default_partitions to use
99 * CONFIG_ETRAX_PTABLE_SECTOR.
100 *
101 * Revision 1.10 2001/05/29 09:42:03 jonashg
102 * Use macro for end marker length instead of sizeof.
103 *
104 * Revision 1.9 2001/05/29 08:52:52 jonashg
105 * Gave names to the magic fours (size of the ptable end marker).
106 *
107 * Revision 1.8 2001/05/28 15:36:20 jonashg
108 * * Removed old comment about ptable location in flash (it's a CONFIG_ option).
109 * * Variable ptable was initialized twice to the same value.
110 *
111 * Revision 1.7 2001/04/05 13:41:46 markusl
112 * Updated according to review remarks
113 *
114 * Revision 1.6 2001/03/07 09:21:21 bjornw
115 * No need to waste .data
116 *
117 * Revision 1.5 2001/03/06 16:27:01 jonashg
118 * Probe the entire flash area for flash devices.
119 *
120 * Revision 1.4 2001/02/23 12:47:15 bjornw
121 * Uncached flash in LOW_MAP moved from 0xe to 0x8
122 *
123 * Revision 1.3 2001/02/16 12:11:45 jonashg
124 * MTD driver amd_flash is now included in MTD CVS repository.
125 * (It's now in drivers/mtd).
126 *
127 * Revision 1.2 2001/02/09 11:12:22 jonashg
128 * Support for AMD compatible non-CFI flash chips.
129 * Only tested with Toshiba TC58FVT160 so far.
130 *
131 * Revision 1.1 2001/01/12 17:01:18 bjornw
132 * * Added axisflashmap.c, a physical mapping for MTD that reads and understands
133 * Axis partition-table format.
134 *
135 *
136 */ 13 */
137 14
138#include <linux/module.h> 15#include <linux/module.h>
@@ -235,7 +112,7 @@ static struct map_info map_cse1 = {
235}; 112};
236 113
237/* If no partition-table was found, we use this default-set. */ 114/* If no partition-table was found, we use this default-set. */
238#define MAX_PARTITIONS 7 115#define MAX_PARTITIONS 7
239#define NUM_DEFAULT_PARTITIONS 3 116#define NUM_DEFAULT_PARTITIONS 3
240 117
241/* 118/*
@@ -300,6 +177,15 @@ static struct mtd_partition axis_partitions[MAX_PARTITIONS] = {
300 }, 177 },
301}; 178};
302 179
180#ifdef CONFIG_ETRAX_AXISFLASHMAP_MTD0WHOLE
181/* Main flash device */
182static struct mtd_partition main_partition = {
183 .name = "main",
184 .size = 0,
185 .offset = 0
186};
187#endif
188
303/* 189/*
304 * Probe a chip select for AMD-compatible (JEDEC) or CFI-compatible flash 190 * Probe a chip select for AMD-compatible (JEDEC) or CFI-compatible flash
305 * chips in that order (because the amd_flash-driver is faster). 191 * chips in that order (because the amd_flash-driver is faster).
@@ -316,15 +202,14 @@ static struct mtd_info *probe_cs(struct map_info *map_cs)
316 mtd_cs = do_map_probe("cfi_probe", map_cs); 202 mtd_cs = do_map_probe("cfi_probe", map_cs);
317#endif 203#endif
318#ifdef CONFIG_MTD_JEDECPROBE 204#ifdef CONFIG_MTD_JEDECPROBE
319 if (!mtd_cs) { 205 if (!mtd_cs)
320 mtd_cs = do_map_probe("jedec_probe", map_cs); 206 mtd_cs = do_map_probe("jedec_probe", map_cs);
321 }
322#endif 207#endif
323 208
324 return mtd_cs; 209 return mtd_cs;
325} 210}
326 211
327/* 212/*
328 * Probe each chip select individually for flash chips. If there are chips on 213 * Probe each chip select individually for flash chips. If there are chips on
329 * both cse0 and cse1, the mtd_info structs will be concatenated to one struct 214 * both cse0 and cse1, the mtd_info structs will be concatenated to one struct
330 * so that MTD partitions can cross chip boundries. 215 * so that MTD partitions can cross chip boundries.
@@ -351,7 +236,7 @@ static struct mtd_info *flash_probe(void)
351 if (mtd_cse0 && mtd_cse1) { 236 if (mtd_cse0 && mtd_cse1) {
352#ifdef CONFIG_MTD_CONCAT 237#ifdef CONFIG_MTD_CONCAT
353 struct mtd_info *mtds[] = { mtd_cse0, mtd_cse1 }; 238 struct mtd_info *mtds[] = { mtd_cse0, mtd_cse1 };
354 239
355 /* Since the concatenation layer adds a small overhead we 240 /* Since the concatenation layer adds a small overhead we
356 * could try to figure out if the chips in cse0 and cse1 are 241 * could try to figure out if the chips in cse0 and cse1 are
357 * identical and reprobe the whole cse0+cse1 window. But since 242 * identical and reprobe the whole cse0+cse1 window. But since
@@ -372,7 +257,7 @@ static struct mtd_info *flash_probe(void)
372 257
373 /* The best we can do now is to only use what we found 258 /* The best we can do now is to only use what we found
374 * at cse0. 259 * at cse0.
375 */ 260 */
376 mtd_cse = mtd_cse0; 261 mtd_cse = mtd_cse0;
377 map_destroy(mtd_cse1); 262 map_destroy(mtd_cse1);
378 } 263 }
@@ -395,7 +280,7 @@ static int __init init_axis_flash(void)
395 struct partitiontable_head *ptable_head = NULL; 280 struct partitiontable_head *ptable_head = NULL;
396 struct partitiontable_entry *ptable; 281 struct partitiontable_entry *ptable;
397 int use_default_ptable = 1; /* Until proven otherwise. */ 282 int use_default_ptable = 1; /* Until proven otherwise. */
398 const char *pmsg = " /dev/flash%d at 0x%08x, size 0x%08x\n"; 283 const char pmsg[] = " /dev/flash%d at 0x%08x, size 0x%08x\n";
399 284
400 if (!(mymtd = flash_probe())) { 285 if (!(mymtd = flash_probe())) {
401 /* There's no reason to use this module if no flash chip can 286 /* There's no reason to use this module if no flash chip can
@@ -435,7 +320,7 @@ static int __init init_axis_flash(void)
435 unsigned long offset = CONFIG_ETRAX_PTABLE_SECTOR; 320 unsigned long offset = CONFIG_ETRAX_PTABLE_SECTOR;
436 unsigned char *p; 321 unsigned char *p;
437 unsigned long csum = 0; 322 unsigned long csum = 0;
438 323
439 ptable = (struct partitiontable_entry *) 324 ptable = (struct partitiontable_entry *)
440 ((unsigned long)ptable_head + sizeof(*ptable_head)); 325 ((unsigned long)ptable_head + sizeof(*ptable_head));
441 326
@@ -490,6 +375,16 @@ static int __init init_axis_flash(void)
490 pidx++; 375 pidx++;
491 } 376 }
492 377
378#ifdef CONFIG_ETRAX_AXISFLASHMAP_MTD0WHOLE
379 if (mymtd) {
380 main_partition.size = mymtd->size;
381 err = add_mtd_partitions(mymtd, &main_partition, 1);
382 if (err)
383 panic("axisflashmap: Could not initialize "
384 "partition for whole main mtd device!\n");
385 }
386#endif
387
493 if (mymtd) { 388 if (mymtd) {
494 if (use_default_ptable) { 389 if (use_default_ptable) {
495 printk(KERN_INFO " Using default partition table.\n"); 390 printk(KERN_INFO " Using default partition table.\n");
@@ -499,9 +394,8 @@ static int __init init_axis_flash(void)
499 err = add_mtd_partitions(mymtd, axis_partitions, pidx); 394 err = add_mtd_partitions(mymtd, axis_partitions, pidx);
500 } 395 }
501 396
502 if (err) { 397 if (err)
503 panic("axisflashmap could not add MTD partitions!\n"); 398 panic("axisflashmap could not add MTD partitions!\n");
504 }
505 } 399 }
506 400
507 if (!romfs_in_flash) { 401 if (!romfs_in_flash) {
@@ -515,25 +409,24 @@ static int __init init_axis_flash(void)
515#else 409#else
516 struct mtd_info *mtd_ram; 410 struct mtd_info *mtd_ram;
517 411
518 mtd_ram = kmalloc(sizeof(struct mtd_info), 412 mtd_ram = kmalloc(sizeof(struct mtd_info), GFP_KERNEL);
519 GFP_KERNEL); 413 if (!mtd_ram)
520 if (!mtd_ram) {
521 panic("axisflashmap couldn't allocate memory for " 414 panic("axisflashmap couldn't allocate memory for "
522 "mtd_info!\n"); 415 "mtd_info!\n");
523 }
524 416
525 printk(KERN_INFO " Adding RAM partition for romfs image:\n"); 417 printk(KERN_INFO " Adding RAM partition for romfs image:\n");
526 printk(pmsg, pidx, romfs_start, romfs_length); 418 printk(pmsg, pidx, (unsigned)romfs_start,
527 419 (unsigned)romfs_length);
528 err = mtdram_init_device(mtd_ram, (void*)romfs_start, 420
529 romfs_length, "romfs"); 421 err = mtdram_init_device(mtd_ram,
530 if (err) { 422 (void *)romfs_start,
423 romfs_length,
424 "romfs");
425 if (err)
531 panic("axisflashmap could not initialize MTD RAM " 426 panic("axisflashmap could not initialize MTD RAM "
532 "device!\n"); 427 "device!\n");
533 }
534#endif 428#endif
535 } 429 }
536
537 return err; 430 return err;
538} 431}
539 432
diff --git a/arch/cris/arch-v10/drivers/ds1302.c b/arch/cris/arch-v10/drivers/ds1302.c
index 1d1936a18133..c9aa3904be05 100644
--- a/arch/cris/arch-v10/drivers/ds1302.c
+++ b/arch/cris/arch-v10/drivers/ds1302.c
@@ -333,7 +333,7 @@ rtc_ioctl(struct inode *inode, struct file *file, unsigned int cmd,
333 ds1302_writereg(RTC_TRICKLECHARGER, tcs_val); 333 ds1302_writereg(RTC_TRICKLECHARGER, tcs_val);
334 return 0; 334 return 0;
335 } 335 }
336 case RTC_VLOW_RD: 336 case RTC_VL_READ:
337 { 337 {
338 /* TODO: 338 /* TODO:
339 * Implement voltage low detection support 339 * Implement voltage low detection support
@@ -342,7 +342,7 @@ rtc_ioctl(struct inode *inode, struct file *file, unsigned int cmd,
342 " is not supported\n"); 342 " is not supported\n");
343 return 0; 343 return 0;
344 } 344 }
345 case RTC_VLOW_SET: 345 case RTC_VL_CLR:
346 { 346 {
347 /* TODO: 347 /* TODO:
348 * Nothing to do since Voltage Low detection is not supported 348 * Nothing to do since Voltage Low detection is not supported
diff --git a/arch/cris/arch-v10/drivers/eeprom.c b/arch/cris/arch-v10/drivers/eeprom.c
index be35a70798aa..f1cac9dc75b8 100644
--- a/arch/cris/arch-v10/drivers/eeprom.c
+++ b/arch/cris/arch-v10/drivers/eeprom.c
@@ -19,77 +19,6 @@
19*! Sep 03 1999 Edgar Iglesias Added bail-out stuff if we get interrupted 19*! Sep 03 1999 Edgar Iglesias Added bail-out stuff if we get interrupted
20*! in the spin-lock. 20*! in the spin-lock.
21*! 21*!
22*! $Log: eeprom.c,v $
23*! Revision 1.12 2005/06/19 17:06:46 starvik
24*! Merge of Linux 2.6.12.
25*!
26*! Revision 1.11 2005/01/26 07:14:46 starvik
27*! Applied diff from kernel janitors (Nish Aravamudan).
28*!
29*! Revision 1.10 2003/09/11 07:29:48 starvik
30*! Merge of Linux 2.6.0-test5
31*!
32*! Revision 1.9 2003/07/04 08:27:37 starvik
33*! Merge of Linux 2.5.74
34*!
35*! Revision 1.8 2003/04/09 05:20:47 starvik
36*! Merge of Linux 2.5.67
37*!
38*! Revision 1.6 2003/02/10 07:19:28 starvik
39*! Removed misplaced ;
40*!
41*! Revision 1.5 2002/12/11 13:13:57 starvik
42*! Added arch/ to v10 specific includes
43*! Added fix from Linux 2.4 in serial.c (flush_to_flip_buffer)
44*!
45*! Revision 1.4 2002/11/20 11:56:10 starvik
46*! Merge of Linux 2.5.48
47*!
48*! Revision 1.3 2002/11/18 13:16:06 starvik
49*! Linux 2.5 port of latest 2.4 drivers
50*!
51*! Revision 1.8 2001/06/15 13:24:29 jonashg
52*! * Added verification of pointers from userspace in read and write.
53*! * Made busy counter volatile.
54*! * Added define for initial write delay.
55*! * Removed warnings by using loff_t instead of unsigned long.
56*!
57*! Revision 1.7 2001/06/14 15:26:54 jonashg
58*! Removed test because condition is always true.
59*!
60*! Revision 1.6 2001/06/14 15:18:20 jonashg
61*! Kb -> kB (makes quite a difference if you don't know if you have 2k or 16k).
62*!
63*! Revision 1.5 2001/06/14 14:39:51 jonashg
64*! Forgot to use name when registering the driver.
65*!
66*! Revision 1.4 2001/06/14 14:35:47 jonashg
67*! * Gave driver a name and used it in printk's.
68*! * Cleanup.
69*!
70*! Revision 1.3 2001/03/19 16:04:46 markusl
71*! Fixed init of fops struct
72*!
73*! Revision 1.2 2001/03/19 10:35:07 markusl
74*! 2.4 port of eeprom driver
75*!
76*! Revision 1.8 2000/05/18 10:42:25 edgar
77*! Make sure to end write cycle on _every_ write
78*!
79*! Revision 1.7 2000/01/17 17:41:01 johana
80*! Adjusted probing and return -ENOSPC when writing outside EEPROM
81*!
82*! Revision 1.6 2000/01/17 15:50:36 johana
83*! Added adaptive timing adjustments and fixed autoprobing for 2k and 16k(?)
84*! EEPROMs
85*!
86*! Revision 1.5 1999/09/03 15:07:37 edgar
87*! Added bail-out check to the spinlock
88*!
89*! Revision 1.4 1999/09/03 12:11:17 bjornw
90*! Proper atomicity (need to use spinlocks, not if's). users -> busy.
91*!
92*!
93*! (c) 1999 Axis Communications AB, Lund, Sweden 22*! (c) 1999 Axis Communications AB, Lund, Sweden
94*!*****************************************************************************/ 23*!*****************************************************************************/
95 24
@@ -103,10 +32,10 @@
103#include <asm/uaccess.h> 32#include <asm/uaccess.h>
104#include "i2c.h" 33#include "i2c.h"
105 34
106#define D(x) 35#define D(x)
107 36
108/* If we should use adaptive timing or not: */ 37/* If we should use adaptive timing or not: */
109//#define EEPROM_ADAPTIVE_TIMING 38/* #define EEPROM_ADAPTIVE_TIMING */
110 39
111#define EEPROM_MAJOR_NR 122 /* use a LOCAL/EXPERIMENTAL major for now */ 40#define EEPROM_MAJOR_NR 122 /* use a LOCAL/EXPERIMENTAL major for now */
112#define EEPROM_MINOR_NR 0 41#define EEPROM_MINOR_NR 0
diff --git a/arch/cris/arch-v10/drivers/gpio.c b/arch/cris/arch-v10/drivers/gpio.c
index 0d347a705835..68a998bd1069 100644
--- a/arch/cris/arch-v10/drivers/gpio.c
+++ b/arch/cris/arch-v10/drivers/gpio.c
@@ -1,138 +1,11 @@
1/* $Id: gpio.c,v 1.17 2005/06/19 17:06:46 starvik Exp $ 1/*
2 *
3 * Etrax general port I/O device 2 * Etrax general port I/O device
4 * 3 *
5 * Copyright (c) 1999, 2000, 2001, 2002 Axis Communications AB 4 * Copyright (c) 1999-2007 Axis Communications AB
6 * 5 *
7 * Authors: Bjorn Wesen (initial version) 6 * Authors: Bjorn Wesen (initial version)
8 * Ola Knutsson (LED handling) 7 * Ola Knutsson (LED handling)
9 * Johan Adolfsson (read/set directions, write, port G) 8 * Johan Adolfsson (read/set directions, write, port G)
10 *
11 * $Log: gpio.c,v $
12 * Revision 1.17 2005/06/19 17:06:46 starvik
13 * Merge of Linux 2.6.12.
14 *
15 * Revision 1.16 2005/03/07 13:02:29 starvik
16 * Protect driver global states with spinlock
17 *
18 * Revision 1.15 2005/01/05 06:08:55 starvik
19 * No need to do local_irq_disable after local_irq_save.
20 *
21 * Revision 1.14 2004/12/13 12:21:52 starvik
22 * Added I/O and DMA allocators from Linux 2.4
23 *
24 * Revision 1.12 2004/08/24 07:19:59 starvik
25 * Whitespace cleanup
26 *
27 * Revision 1.11 2004/05/14 07:58:03 starvik
28 * Merge of changes from 2.4
29 *
30 * Revision 1.9 2003/09/11 07:29:48 starvik
31 * Merge of Linux 2.6.0-test5
32 *
33 * Revision 1.8 2003/07/04 08:27:37 starvik
34 * Merge of Linux 2.5.74
35 *
36 * Revision 1.7 2003/01/10 07:44:07 starvik
37 * init_ioremap is now called by kernel before drivers are initialized
38 *
39 * Revision 1.6 2002/12/11 13:13:57 starvik
40 * Added arch/ to v10 specific includes
41 * Added fix from Linux 2.4 in serial.c (flush_to_flip_buffer)
42 *
43 * Revision 1.5 2002/11/20 11:56:11 starvik
44 * Merge of Linux 2.5.48
45 *
46 * Revision 1.4 2002/11/18 10:10:05 starvik
47 * Linux 2.5 port of latest gpio.c from Linux 2.4
48 *
49 * Revision 1.20 2002/10/16 21:16:24 johana
50 * Added support for PA high level interrupt.
51 * That gives 2ms response time with iodtest for high levels and 2-12 ms
52 * response time on low levels if the check is not made in
53 * process.c:cpu_idle() as well.
54 *
55 * Revision 1.19 2002/10/14 18:27:33 johana
56 * Implemented alarm handling so select() now works.
57 * Latency is around 6-9 ms with a etrax_gpio_wake_up_check() in
58 * cpu_idle().
59 * Otherwise I get 15-18 ms (same as doing the poll in userspace -
60 * but less overhead).
61 * TODO? Perhaps we should add the check in IMMEDIATE_BH (or whatever it
62 * is in 2.4) as well?
63 * TODO? Perhaps call request_irq()/free_irq() only when needed?
64 * Increased version to 2.5
65 *
66 * Revision 1.18 2002/10/11 15:02:00 johana
67 * Mask inverted 8 bit value in setget_input().
68 *
69 * Revision 1.17 2002/06/17 15:53:01 johana
70 * Added IO_READ_INBITS, IO_READ_OUTBITS, IO_SETGET_INPUT and IO_SETGET_OUTPUT
71 * that take a pointer as argument and thus can handle 32 bit ports (G)
72 * correctly.
73 * These should be used instead of IO_READBITS, IO_SETINPUT and IO_SETOUTPUT.
74 * (especially if Port G bit 31 is used)
75 *
76 * Revision 1.16 2002/06/17 09:59:51 johana
77 * Returning 32 bit values in the ioctl return value doesn't work if bit
78 * 31 is set (could happen for port G), so mask it of with 0x7FFFFFFF.
79 * A new set of ioctl's will be added.
80 *
81 * Revision 1.15 2002/05/06 13:19:13 johana
82 * IO_SETINPUT returns mask with bit set = inputs for PA and PB as well.
83 *
84 * Revision 1.14 2002/04/12 12:01:53 johana
85 * Use global r_port_g_data_shadow.
86 * Moved gpio_init_port_g() closer to gpio_init() and marked it __init.
87 *
88 * Revision 1.13 2002/04/10 12:03:55 johana
89 * Added support for port G /dev/gpiog (minor 3).
90 * Changed indentation on switch cases.
91 * Fixed other spaces to tabs.
92 *
93 * Revision 1.12 2001/11/12 19:42:15 pkj
94 * * Corrected return values from gpio_leds_ioctl().
95 * * Fixed compiler warnings.
96 *
97 * Revision 1.11 2001/10/30 14:39:12 johana
98 * Added D() around gpio_write printk.
99 *
100 * Revision 1.10 2001/10/25 10:24:42 johana
101 * Added IO_CFG_WRITE_MODE ioctl and write method that can do fast
102 * bittoggling in the kernel. (This speeds up programming an FPGA with 450kB
103 * from ~60 seconds to 4 seconds).
104 * Added save_flags/cli/restore_flags in ioctl.
105 *
106 * Revision 1.9 2001/05/04 14:16:07 matsfg
107 * Corrected spelling error
108 *
109 * Revision 1.8 2001/04/27 13:55:26 matsfg
110 * Moved initioremap.
111 * Turns off all LEDS on init.
112 * Added support for shutdown and powerbutton.
113 *
114 * Revision 1.7 2001/04/04 13:30:08 matsfg
115 * Added bitset and bitclear for leds. Calls init_ioremap to set up memmapping
116 *
117 * Revision 1.6 2001/03/26 16:03:06 bjornw
118 * Needs linux/config.h
119 *
120 * Revision 1.5 2001/03/26 14:22:03 bjornw
121 * Namechange of some config options
122 *
123 * Revision 1.4 2001/02/27 13:52:48 bjornw
124 * malloc.h -> slab.h
125 *
126 * Revision 1.3 2001/01/24 15:06:48 bjornw
127 * gpio_wq correct type
128 *
129 * Revision 1.2 2001/01/18 16:07:30 bjornw
130 * 2.4 port
131 *
132 * Revision 1.1 2001/01/18 15:55:16 bjornw
133 * Verbatim copy of etraxgpio.c from elinux 2.0 added
134 *
135 *
136 */ 9 */
137 10
138 11
@@ -165,7 +38,7 @@ static int dp_cnt;
165#else 38#else
166#define DP(x) 39#define DP(x)
167#endif 40#endif
168 41
169static char gpio_name[] = "etrax gpio"; 42static char gpio_name[] = "etrax gpio";
170 43
171#if 0 44#if 0
@@ -173,9 +46,9 @@ static wait_queue_head_t *gpio_wq;
173#endif 46#endif
174 47
175static int gpio_ioctl(struct inode *inode, struct file *file, 48static int gpio_ioctl(struct inode *inode, struct file *file,
176 unsigned int cmd, unsigned long arg); 49 unsigned int cmd, unsigned long arg);
177static ssize_t gpio_write(struct file * file, const char * buf, size_t count, 50static ssize_t gpio_write(struct file *file, const char __user *buf,
178 loff_t *off); 51 size_t count, loff_t *off);
179static int gpio_open(struct inode *inode, struct file *filp); 52static int gpio_open(struct inode *inode, struct file *filp);
180static int gpio_release(struct inode *inode, struct file *filp); 53static int gpio_release(struct inode *inode, struct file *filp);
181static unsigned int gpio_poll(struct file *filp, struct poll_table_struct *wait); 54static unsigned int gpio_poll(struct file *filp, struct poll_table_struct *wait);
@@ -201,22 +74,22 @@ struct gpio_private {
201 74
202/* linked list of alarms to check for */ 75/* linked list of alarms to check for */
203 76
204static struct gpio_private *alarmlist = 0; 77static struct gpio_private *alarmlist;
205 78
206static int gpio_some_alarms = 0; /* Set if someone uses alarm */ 79static int gpio_some_alarms; /* Set if someone uses alarm */
207static unsigned long gpio_pa_irq_enabled_mask = 0; 80static unsigned long gpio_pa_irq_enabled_mask;
208 81
209static DEFINE_SPINLOCK(gpio_lock); /* Protect directions etc */ 82static DEFINE_SPINLOCK(gpio_lock); /* Protect directions etc */
210 83
211/* Port A and B use 8 bit access, but Port G is 32 bit */ 84/* Port A and B use 8 bit access, but Port G is 32 bit */
212#define NUM_PORTS (GPIO_MINOR_B+1) 85#define NUM_PORTS (GPIO_MINOR_B+1)
213 86
214static volatile unsigned char *ports[NUM_PORTS] = { 87static volatile unsigned char *ports[NUM_PORTS] = {
215 R_PORT_PA_DATA, 88 R_PORT_PA_DATA,
216 R_PORT_PB_DATA, 89 R_PORT_PB_DATA,
217}; 90};
218static volatile unsigned char *shads[NUM_PORTS] = { 91static volatile unsigned char *shads[NUM_PORTS] = {
219 &port_pa_data_shadow, 92 &port_pa_data_shadow,
220 &port_pb_data_shadow 93 &port_pb_data_shadow
221}; 94};
222 95
@@ -236,29 +109,29 @@ static volatile unsigned char *shads[NUM_PORTS] = {
236#endif 109#endif
237 110
238 111
239static unsigned char changeable_dir[NUM_PORTS] = { 112static unsigned char changeable_dir[NUM_PORTS] = {
240 CONFIG_ETRAX_PA_CHANGEABLE_DIR, 113 CONFIG_ETRAX_PA_CHANGEABLE_DIR,
241 CONFIG_ETRAX_PB_CHANGEABLE_DIR 114 CONFIG_ETRAX_PB_CHANGEABLE_DIR
242}; 115};
243static unsigned char changeable_bits[NUM_PORTS] = { 116static unsigned char changeable_bits[NUM_PORTS] = {
244 CONFIG_ETRAX_PA_CHANGEABLE_BITS, 117 CONFIG_ETRAX_PA_CHANGEABLE_BITS,
245 CONFIG_ETRAX_PB_CHANGEABLE_BITS 118 CONFIG_ETRAX_PB_CHANGEABLE_BITS
246}; 119};
247 120
248static volatile unsigned char *dir[NUM_PORTS] = { 121static volatile unsigned char *dir[NUM_PORTS] = {
249 R_PORT_PA_DIR, 122 R_PORT_PA_DIR,
250 R_PORT_PB_DIR 123 R_PORT_PB_DIR
251}; 124};
252 125
253static volatile unsigned char *dir_shadow[NUM_PORTS] = { 126static volatile unsigned char *dir_shadow[NUM_PORTS] = {
254 &port_pa_dir_shadow, 127 &port_pa_dir_shadow,
255 &port_pb_dir_shadow 128 &port_pb_dir_shadow
256}; 129};
257 130
258/* All bits in port g that can change dir. */ 131/* All bits in port g that can change dir. */
259static const unsigned long int changeable_dir_g_mask = 0x01FFFF01; 132static const unsigned long int changeable_dir_g_mask = 0x01FFFF01;
260 133
261/* Port G is 32 bit, handle it special, some bits are both inputs 134/* Port G is 32 bit, handle it special, some bits are both inputs
262 and outputs at the same time, only some of the bits can change direction 135 and outputs at the same time, only some of the bits can change direction
263 and some of them in groups of 8 bit. */ 136 and some of them in groups of 8 bit. */
264static unsigned long changeable_dir_g; 137static unsigned long changeable_dir_g;
@@ -269,18 +142,17 @@ static unsigned long dir_g_shadow; /* 1=output */
269#define USE_PORTS(priv) ((priv)->minor <= GPIO_MINOR_B) 142#define USE_PORTS(priv) ((priv)->minor <= GPIO_MINOR_B)
270 143
271 144
272 145static unsigned int gpio_poll(struct file *file, poll_table *wait)
273static unsigned int
274gpio_poll(struct file *file,
275 poll_table *wait)
276{ 146{
277 unsigned int mask = 0; 147 unsigned int mask = 0;
278 struct gpio_private *priv = (struct gpio_private *)file->private_data; 148 struct gpio_private *priv = file->private_data;
279 unsigned long data; 149 unsigned long data;
280 spin_lock(&gpio_lock); 150 unsigned long flags;
151
152 spin_lock_irqsave(&gpio_lock, flags);
153
281 poll_wait(file, &priv->alarm_wq, wait); 154 poll_wait(file, &priv->alarm_wq, wait);
282 if (priv->minor == GPIO_MINOR_A) { 155 if (priv->minor == GPIO_MINOR_A) {
283 unsigned long flags;
284 unsigned long tmp; 156 unsigned long tmp;
285 data = *R_PORT_PA_DATA; 157 data = *R_PORT_PA_DATA;
286 /* PA has support for high level interrupt - 158 /* PA has support for high level interrupt -
@@ -288,27 +160,25 @@ gpio_poll(struct file *file,
288 */ 160 */
289 tmp = ~data & priv->highalarm & 0xFF; 161 tmp = ~data & priv->highalarm & 0xFF;
290 tmp = (tmp << R_IRQ_MASK1_SET__pa0__BITNR); 162 tmp = (tmp << R_IRQ_MASK1_SET__pa0__BITNR);
291 local_irq_save(flags); 163
292 gpio_pa_irq_enabled_mask |= tmp; 164 gpio_pa_irq_enabled_mask |= tmp;
293 *R_IRQ_MASK1_SET = tmp; 165 *R_IRQ_MASK1_SET = tmp;
294 local_irq_restore(flags);
295
296 } else if (priv->minor == GPIO_MINOR_B) 166 } else if (priv->minor == GPIO_MINOR_B)
297 data = *R_PORT_PB_DATA; 167 data = *R_PORT_PB_DATA;
298 else if (priv->minor == GPIO_MINOR_G) 168 else if (priv->minor == GPIO_MINOR_G)
299 data = *R_PORT_G_DATA; 169 data = *R_PORT_G_DATA;
300 else { 170 else {
301 spin_unlock(&gpio_lock); 171 mask = 0;
302 return 0; 172 goto out;
303 } 173 }
304 174
305 if ((data & priv->highalarm) || 175 if ((data & priv->highalarm) ||
306 (~data & priv->lowalarm)) { 176 (~data & priv->lowalarm)) {
307 mask = POLLIN|POLLRDNORM; 177 mask = POLLIN|POLLRDNORM;
308 } 178 }
309 179
310 spin_unlock(&gpio_lock); 180out:
311 181 spin_unlock_irqrestore(&gpio_lock, flags);
312 DP(printk("gpio_poll ready: mask 0x%08X\n", mask)); 182 DP(printk("gpio_poll ready: mask 0x%08X\n", mask));
313 183
314 return mask; 184 return mask;
@@ -316,16 +186,19 @@ gpio_poll(struct file *file,
316 186
317int etrax_gpio_wake_up_check(void) 187int etrax_gpio_wake_up_check(void)
318{ 188{
319 struct gpio_private *priv = alarmlist; 189 struct gpio_private *priv;
320 unsigned long data = 0; 190 unsigned long data = 0;
321 int ret = 0; 191 int ret = 0;
322 spin_lock(&gpio_lock); 192 unsigned long flags;
193
194 spin_lock_irqsave(&gpio_lock, flags);
195 priv = alarmlist;
323 while (priv) { 196 while (priv) {
324 if (USE_PORTS(priv)) { 197 if (USE_PORTS(priv))
325 data = *priv->port; 198 data = *priv->port;
326 } else if (priv->minor == GPIO_MINOR_G) { 199 else if (priv->minor == GPIO_MINOR_G)
327 data = *R_PORT_G_DATA; 200 data = *R_PORT_G_DATA;
328 } 201
329 if ((data & priv->highalarm) || 202 if ((data & priv->highalarm) ||
330 (~data & priv->lowalarm)) { 203 (~data & priv->lowalarm)) {
331 DP(printk("etrax_gpio_wake_up_check %i\n",priv->minor)); 204 DP(printk("etrax_gpio_wake_up_check %i\n",priv->minor));
@@ -334,12 +207,12 @@ int etrax_gpio_wake_up_check(void)
334 } 207 }
335 priv = priv->next; 208 priv = priv->next;
336 } 209 }
337 spin_unlock(&gpio_lock); 210 spin_unlock_irqrestore(&gpio_lock, flags);
338 return ret; 211 return ret;
339} 212}
340 213
341static irqreturn_t 214static irqreturn_t
342gpio_poll_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs) 215gpio_poll_timer_interrupt(int irq, void *dev_id)
343{ 216{
344 if (gpio_some_alarms) { 217 if (gpio_some_alarms) {
345 etrax_gpio_wake_up_check(); 218 etrax_gpio_wake_up_check();
@@ -349,10 +222,13 @@ gpio_poll_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
349} 222}
350 223
351static irqreturn_t 224static irqreturn_t
352gpio_pa_interrupt(int irq, void *dev_id, struct pt_regs *regs) 225gpio_interrupt(int irq, void *dev_id)
353{ 226{
354 unsigned long tmp; 227 unsigned long tmp;
355 spin_lock(&gpio_lock); 228 unsigned long flags;
229
230 spin_lock_irqsave(&gpio_lock, flags);
231
356 /* Find what PA interrupts are active */ 232 /* Find what PA interrupts are active */
357 tmp = (*R_IRQ_READ1); 233 tmp = (*R_IRQ_READ1);
358 234
@@ -363,75 +239,70 @@ gpio_pa_interrupt(int irq, void *dev_id, struct pt_regs *regs)
363 *R_IRQ_MASK1_CLR = tmp; 239 *R_IRQ_MASK1_CLR = tmp;
364 gpio_pa_irq_enabled_mask &= ~tmp; 240 gpio_pa_irq_enabled_mask &= ~tmp;
365 241
366 spin_unlock(&gpio_lock); 242 spin_unlock_irqrestore(&gpio_lock, flags);
367 243
368 if (gpio_some_alarms) { 244 if (gpio_some_alarms)
369 return IRQ_RETVAL(etrax_gpio_wake_up_check()); 245 return IRQ_RETVAL(etrax_gpio_wake_up_check());
370 } 246
371 return IRQ_NONE; 247 return IRQ_NONE;
372} 248}
373 249
250static void gpio_write_bit(struct gpio_private *priv,
251 unsigned char data, int bit)
252{
253 *priv->port = *priv->shadow &= ~(priv->clk_mask);
254 if (data & 1 << bit)
255 *priv->port = *priv->shadow |= priv->data_mask;
256 else
257 *priv->port = *priv->shadow &= ~(priv->data_mask);
258
259 /* For FPGA: min 5.0ns (DCC) before CCLK high */
260 *priv->port = *priv->shadow |= priv->clk_mask;
261}
374 262
375static ssize_t gpio_write(struct file * file, const char * buf, size_t count, 263static void gpio_write_byte(struct gpio_private *priv, unsigned char data)
376 loff_t *off)
377{ 264{
378 struct gpio_private *priv = (struct gpio_private *)file->private_data; 265 int i;
379 unsigned char data, clk_mask, data_mask, write_msb;
380 unsigned long flags;
381 266
382 spin_lock(&gpio_lock); 267 if (priv->write_msb)
268 for (i = 7; i >= 0; i--)
269 gpio_write_bit(priv, data, i);
270 else
271 for (i = 0; i <= 7; i++)
272 gpio_write_bit(priv, data, i);
273}
383 274
275static ssize_t gpio_write(struct file *file, const char __user *buf,
276 size_t count, loff_t *off)
277{
278 struct gpio_private *priv = file->private_data;
279 unsigned long flags;
384 ssize_t retval = count; 280 ssize_t retval = count;
385 if (priv->minor !=GPIO_MINOR_A && priv->minor != GPIO_MINOR_B) { 281
386 retval = -EFAULT; 282 if (priv->minor != GPIO_MINOR_A && priv->minor != GPIO_MINOR_B)
387 goto out; 283 return -EFAULT;
388 } 284
389 285 if (!access_ok(VERIFY_READ, buf, count))
390 if (!access_ok(VERIFY_READ, buf, count)) { 286 return -EFAULT;
391 retval = -EFAULT; 287
392 goto out; 288 spin_lock_irqsave(&gpio_lock, flags);
393 } 289
394 clk_mask = priv->clk_mask;
395 data_mask = priv->data_mask;
396 /* It must have been configured using the IO_CFG_WRITE_MODE */ 290 /* It must have been configured using the IO_CFG_WRITE_MODE */
397 /* Perhaps a better error code? */ 291 /* Perhaps a better error code? */
398 if (clk_mask == 0 || data_mask == 0) { 292 if (priv->clk_mask == 0 || priv->data_mask == 0) {
399 retval = -EPERM; 293 retval = -EPERM;
400 goto out; 294 goto out;
401 } 295 }
402 write_msb = priv->write_msb; 296
403 D(printk("gpio_write: %lu to data 0x%02X clk 0x%02X msb: %i\n",count, data_mask, clk_mask, write_msb)); 297 D(printk(KERN_DEBUG "gpio_write: %02X to data 0x%02X "
404 while (count--) { 298 "clk 0x%02X msb: %i\n",
405 int i; 299 count, priv->data_mask, priv->clk_mask, priv->write_msb));
406 data = *buf++; 300
407 if (priv->write_msb) { 301 while (count--)
408 for (i = 7; i >= 0;i--) { 302 gpio_write_byte(priv, *buf++);
409 local_irq_save(flags); 303
410 *priv->port = *priv->shadow &= ~clk_mask;
411 if (data & 1<<i)
412 *priv->port = *priv->shadow |= data_mask;
413 else
414 *priv->port = *priv->shadow &= ~data_mask;
415 /* For FPGA: min 5.0ns (DCC) before CCLK high */
416 *priv->port = *priv->shadow |= clk_mask;
417 local_irq_restore(flags);
418 }
419 } else {
420 for (i = 0; i <= 7;i++) {
421 local_irq_save(flags);
422 *priv->port = *priv->shadow &= ~clk_mask;
423 if (data & 1<<i)
424 *priv->port = *priv->shadow |= data_mask;
425 else
426 *priv->port = *priv->shadow &= ~data_mask;
427 /* For FPGA: min 5.0ns (DCC) before CCLK high */
428 *priv->port = *priv->shadow |= clk_mask;
429 local_irq_restore(flags);
430 }
431 }
432 }
433out: 304out:
434 spin_unlock(&gpio_lock); 305 spin_unlock_irqrestore(&gpio_lock, flags);
435 return retval; 306 return retval;
436} 307}
437 308
@@ -442,22 +313,20 @@ gpio_open(struct inode *inode, struct file *filp)
442{ 313{
443 struct gpio_private *priv; 314 struct gpio_private *priv;
444 int p = iminor(inode); 315 int p = iminor(inode);
316 unsigned long flags;
445 317
446 if (p > GPIO_MINOR_LAST) 318 if (p > GPIO_MINOR_LAST)
447 return -EINVAL; 319 return -EINVAL;
448 320
449 priv = kmalloc(sizeof(struct gpio_private), 321 priv = kzalloc(sizeof(struct gpio_private), GFP_KERNEL);
450 GFP_KERNEL);
451 322
452 if (!priv) 323 if (!priv)
453 return -ENOMEM; 324 return -ENOMEM;
454 325
455 priv->minor = p; 326 priv->minor = p;
456 327
457 /* initialize the io/alarm struct and link it into our alarmlist */ 328 /* initialize the io/alarm struct */
458 329
459 priv->next = alarmlist;
460 alarmlist = priv;
461 if (USE_PORTS(priv)) { /* A and B */ 330 if (USE_PORTS(priv)) { /* A and B */
462 priv->port = ports[p]; 331 priv->port = ports[p];
463 priv->shadow = shads[p]; 332 priv->shadow = shads[p];
@@ -480,7 +349,13 @@ gpio_open(struct inode *inode, struct file *filp)
480 priv->data_mask = 0; 349 priv->data_mask = 0;
481 init_waitqueue_head(&priv->alarm_wq); 350 init_waitqueue_head(&priv->alarm_wq);
482 351
483 filp->private_data = (void *)priv; 352 filp->private_data = priv;
353
354 /* link it into our alarmlist */
355 spin_lock_irqsave(&gpio_lock, flags);
356 priv->next = alarmlist;
357 alarmlist = priv;
358 spin_unlock_irqrestore(&gpio_lock, flags);
484 359
485 return 0; 360 return 0;
486} 361}
@@ -490,11 +365,12 @@ gpio_release(struct inode *inode, struct file *filp)
490{ 365{
491 struct gpio_private *p; 366 struct gpio_private *p;
492 struct gpio_private *todel; 367 struct gpio_private *todel;
368 unsigned long flags;
493 369
494 spin_lock(&gpio_lock); 370 spin_lock_irqsave(&gpio_lock, flags);
495 371
496 p = alarmlist; 372 p = alarmlist;
497 todel = (struct gpio_private *)filp->private_data; 373 todel = filp->private_data;
498 374
499 /* unlink from alarmlist and free the private structure */ 375 /* unlink from alarmlist and free the private structure */
500 376
@@ -512,123 +388,114 @@ gpio_release(struct inode *inode, struct file *filp)
512 while (p) { 388 while (p) {
513 if (p->highalarm | p->lowalarm) { 389 if (p->highalarm | p->lowalarm) {
514 gpio_some_alarms = 1; 390 gpio_some_alarms = 1;
515 spin_unlock(&gpio_lock); 391 goto out;
516 return 0;
517 } 392 }
518 p = p->next; 393 p = p->next;
519 } 394 }
520 gpio_some_alarms = 0; 395 gpio_some_alarms = 0;
521 spin_unlock(&gpio_lock); 396out:
397 spin_unlock_irqrestore(&gpio_lock, flags);
522 return 0; 398 return 0;
523} 399}
524 400
525/* Main device API. ioctl's to read/set/clear bits, as well as to 401/* Main device API. ioctl's to read/set/clear bits, as well as to
526 * set alarms to wait for using a subsequent select(). 402 * set alarms to wait for using a subsequent select().
527 */ 403 */
528
529unsigned long inline setget_input(struct gpio_private *priv, unsigned long arg) 404unsigned long inline setget_input(struct gpio_private *priv, unsigned long arg)
530{ 405{
531 /* Set direction 0=unchanged 1=input, 406 /* Set direction 0=unchanged 1=input,
532 * return mask with 1=input 407 * return mask with 1=input */
533 */
534 unsigned long flags;
535 if (USE_PORTS(priv)) { 408 if (USE_PORTS(priv)) {
536 local_irq_save(flags); 409 *priv->dir = *priv->dir_shadow &=
537 *priv->dir = *priv->dir_shadow &=
538 ~((unsigned char)arg & priv->changeable_dir); 410 ~((unsigned char)arg & priv->changeable_dir);
539 local_irq_restore(flags);
540 return ~(*priv->dir_shadow) & 0xFF; /* Only 8 bits */ 411 return ~(*priv->dir_shadow) & 0xFF; /* Only 8 bits */
541 } else if (priv->minor == GPIO_MINOR_G) { 412 }
542 /* We must fiddle with R_GEN_CONFIG to change dir */ 413
543 local_irq_save(flags); 414 if (priv->minor != GPIO_MINOR_G)
544 if (((arg & dir_g_in_bits) != arg) && 415 return 0;
545 (arg & changeable_dir_g)) { 416
546 arg &= changeable_dir_g; 417 /* We must fiddle with R_GEN_CONFIG to change dir */
547 /* Clear bits in genconfig to set to input */ 418 if (((arg & dir_g_in_bits) != arg) &&
548 if (arg & (1<<0)) { 419 (arg & changeable_dir_g)) {
549 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG,g0dir); 420 arg &= changeable_dir_g;
550 dir_g_in_bits |= (1<<0); 421 /* Clear bits in genconfig to set to input */
551 dir_g_out_bits &= ~(1<<0); 422 if (arg & (1<<0)) {
552 } 423 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, g0dir);
553 if ((arg & 0x0000FF00) == 0x0000FF00) { 424 dir_g_in_bits |= (1<<0);
554 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG,g8_15dir); 425 dir_g_out_bits &= ~(1<<0);
555 dir_g_in_bits |= 0x0000FF00;
556 dir_g_out_bits &= ~0x0000FF00;
557 }
558 if ((arg & 0x00FF0000) == 0x00FF0000) {
559 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG,g16_23dir);
560 dir_g_in_bits |= 0x00FF0000;
561 dir_g_out_bits &= ~0x00FF0000;
562 }
563 if (arg & (1<<24)) {
564 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG,g24dir);
565 dir_g_in_bits |= (1<<24);
566 dir_g_out_bits &= ~(1<<24);
567 }
568 D(printk(KERN_INFO "gpio: SETINPUT on port G set "
569 "genconfig to 0x%08lX "
570 "in_bits: 0x%08lX "
571 "out_bits: 0x%08lX\n",
572 (unsigned long)genconfig_shadow,
573 dir_g_in_bits, dir_g_out_bits));
574 *R_GEN_CONFIG = genconfig_shadow;
575 /* Must be a >120 ns delay before writing this again */
576
577 } 426 }
578 local_irq_restore(flags); 427 if ((arg & 0x0000FF00) == 0x0000FF00) {
579 return dir_g_in_bits; 428 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, g8_15dir);
429 dir_g_in_bits |= 0x0000FF00;
430 dir_g_out_bits &= ~0x0000FF00;
431 }
432 if ((arg & 0x00FF0000) == 0x00FF0000) {
433 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, g16_23dir);
434 dir_g_in_bits |= 0x00FF0000;
435 dir_g_out_bits &= ~0x00FF0000;
436 }
437 if (arg & (1<<24)) {
438 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, g24dir);
439 dir_g_in_bits |= (1<<24);
440 dir_g_out_bits &= ~(1<<24);
441 }
442 D(printk(KERN_DEBUG "gpio: SETINPUT on port G set "
443 "genconfig to 0x%08lX "
444 "in_bits: 0x%08lX "
445 "out_bits: 0x%08lX\n",
446 (unsigned long)genconfig_shadow,
447 dir_g_in_bits, dir_g_out_bits));
448 *R_GEN_CONFIG = genconfig_shadow;
449 /* Must be a >120 ns delay before writing this again */
450
580 } 451 }
581 return 0; 452 return dir_g_in_bits;
582} /* setget_input */ 453} /* setget_input */
583 454
584unsigned long inline setget_output(struct gpio_private *priv, unsigned long arg) 455unsigned long inline setget_output(struct gpio_private *priv, unsigned long arg)
585{ 456{
586 unsigned long flags;
587 if (USE_PORTS(priv)) { 457 if (USE_PORTS(priv)) {
588 local_irq_save(flags); 458 *priv->dir = *priv->dir_shadow |=
589 *priv->dir = *priv->dir_shadow |= 459 ((unsigned char)arg & priv->changeable_dir);
590 ((unsigned char)arg & priv->changeable_dir);
591 local_irq_restore(flags);
592 return *priv->dir_shadow; 460 return *priv->dir_shadow;
593 } else if (priv->minor == GPIO_MINOR_G) { 461 }
594 /* We must fiddle with R_GEN_CONFIG to change dir */ 462 if (priv->minor != GPIO_MINOR_G)
595 local_irq_save(flags); 463 return 0;
596 if (((arg & dir_g_out_bits) != arg) && 464
597 (arg & changeable_dir_g)) { 465 /* We must fiddle with R_GEN_CONFIG to change dir */
598 /* Set bits in genconfig to set to output */ 466 if (((arg & dir_g_out_bits) != arg) &&
599 if (arg & (1<<0)) { 467 (arg & changeable_dir_g)) {
600 genconfig_shadow |= IO_MASK(R_GEN_CONFIG,g0dir); 468 /* Set bits in genconfig to set to output */
601 dir_g_out_bits |= (1<<0); 469 if (arg & (1<<0)) {
602 dir_g_in_bits &= ~(1<<0); 470 genconfig_shadow |= IO_MASK(R_GEN_CONFIG, g0dir);
603 } 471 dir_g_out_bits |= (1<<0);
604 if ((arg & 0x0000FF00) == 0x0000FF00) { 472 dir_g_in_bits &= ~(1<<0);
605 genconfig_shadow |= IO_MASK(R_GEN_CONFIG,g8_15dir);
606 dir_g_out_bits |= 0x0000FF00;
607 dir_g_in_bits &= ~0x0000FF00;
608 }
609 if ((arg & 0x00FF0000) == 0x00FF0000) {
610 genconfig_shadow |= IO_MASK(R_GEN_CONFIG,g16_23dir);
611 dir_g_out_bits |= 0x00FF0000;
612 dir_g_in_bits &= ~0x00FF0000;
613 }
614 if (arg & (1<<24)) {
615 genconfig_shadow |= IO_MASK(R_GEN_CONFIG,g24dir);
616 dir_g_out_bits |= (1<<24);
617 dir_g_in_bits &= ~(1<<24);
618 }
619 D(printk(KERN_INFO "gpio: SETOUTPUT on port G set "
620 "genconfig to 0x%08lX "
621 "in_bits: 0x%08lX "
622 "out_bits: 0x%08lX\n",
623 (unsigned long)genconfig_shadow,
624 dir_g_in_bits, dir_g_out_bits));
625 *R_GEN_CONFIG = genconfig_shadow;
626 /* Must be a >120 ns delay before writing this again */
627 } 473 }
628 local_irq_restore(flags); 474 if ((arg & 0x0000FF00) == 0x0000FF00) {
629 return dir_g_out_bits & 0x7FFFFFFF; 475 genconfig_shadow |= IO_MASK(R_GEN_CONFIG, g8_15dir);
476 dir_g_out_bits |= 0x0000FF00;
477 dir_g_in_bits &= ~0x0000FF00;
478 }
479 if ((arg & 0x00FF0000) == 0x00FF0000) {
480 genconfig_shadow |= IO_MASK(R_GEN_CONFIG, g16_23dir);
481 dir_g_out_bits |= 0x00FF0000;
482 dir_g_in_bits &= ~0x00FF0000;
483 }
484 if (arg & (1<<24)) {
485 genconfig_shadow |= IO_MASK(R_GEN_CONFIG, g24dir);
486 dir_g_out_bits |= (1<<24);
487 dir_g_in_bits &= ~(1<<24);
488 }
489 D(printk(KERN_INFO "gpio: SETOUTPUT on port G set "
490 "genconfig to 0x%08lX "
491 "in_bits: 0x%08lX "
492 "out_bits: 0x%08lX\n",
493 (unsigned long)genconfig_shadow,
494 dir_g_in_bits, dir_g_out_bits));
495 *R_GEN_CONFIG = genconfig_shadow;
496 /* Must be a >120 ns delay before writing this again */
630 } 497 }
631 return 0; 498 return dir_g_out_bits & 0x7FFFFFFF;
632} /* setget_output */ 499} /* setget_output */
633 500
634static int 501static int
@@ -642,12 +509,11 @@ gpio_ioctl(struct inode *inode, struct file *file,
642 unsigned long val; 509 unsigned long val;
643 int ret = 0; 510 int ret = 0;
644 511
645 struct gpio_private *priv = (struct gpio_private *)file->private_data; 512 struct gpio_private *priv = file->private_data;
646 if (_IOC_TYPE(cmd) != ETRAXGPIO_IOCTYPE) { 513 if (_IOC_TYPE(cmd) != ETRAXGPIO_IOCTYPE)
647 return -EINVAL; 514 return -EINVAL;
648 }
649 515
650 spin_lock(&gpio_lock); 516 spin_lock_irqsave(&gpio_lock, flags);
651 517
652 switch (_IOC_NR(cmd)) { 518 switch (_IOC_NR(cmd)) {
653 case IO_READBITS: /* Use IO_READ_INBITS and IO_READ_OUTBITS instead */ 519 case IO_READBITS: /* Use IO_READ_INBITS and IO_READ_OUTBITS instead */
@@ -659,7 +525,6 @@ gpio_ioctl(struct inode *inode, struct file *file,
659 } 525 }
660 break; 526 break;
661 case IO_SETBITS: 527 case IO_SETBITS:
662 local_irq_save(flags);
663 // set changeable bits with a 1 in arg 528 // set changeable bits with a 1 in arg
664 if (USE_PORTS(priv)) { 529 if (USE_PORTS(priv)) {
665 *priv->port = *priv->shadow |= 530 *priv->port = *priv->shadow |=
@@ -667,10 +532,8 @@ gpio_ioctl(struct inode *inode, struct file *file,
667 } else if (priv->minor == GPIO_MINOR_G) { 532 } else if (priv->minor == GPIO_MINOR_G) {
668 *R_PORT_G_DATA = port_g_data_shadow |= (arg & dir_g_out_bits); 533 *R_PORT_G_DATA = port_g_data_shadow |= (arg & dir_g_out_bits);
669 } 534 }
670 local_irq_restore(flags);
671 break; 535 break;
672 case IO_CLRBITS: 536 case IO_CLRBITS:
673 local_irq_save(flags);
674 // clear changeable bits with a 1 in arg 537 // clear changeable bits with a 1 in arg
675 if (USE_PORTS(priv)) { 538 if (USE_PORTS(priv)) {
676 *priv->port = *priv->shadow &= 539 *priv->port = *priv->shadow &=
@@ -678,7 +541,6 @@ gpio_ioctl(struct inode *inode, struct file *file,
678 } else if (priv->minor == GPIO_MINOR_G) { 541 } else if (priv->minor == GPIO_MINOR_G) {
679 *R_PORT_G_DATA = port_g_data_shadow &= ~((unsigned long)arg & dir_g_out_bits); 542 *R_PORT_G_DATA = port_g_data_shadow &= ~((unsigned long)arg & dir_g_out_bits);
680 } 543 }
681 local_irq_restore(flags);
682 break; 544 break;
683 case IO_HIGHALARM: 545 case IO_HIGHALARM:
684 // set alarm when bits with 1 in arg go high 546 // set alarm when bits with 1 in arg go high
@@ -698,6 +560,8 @@ gpio_ioctl(struct inode *inode, struct file *file,
698 /* Must update gpio_some_alarms */ 560 /* Must update gpio_some_alarms */
699 struct gpio_private *p = alarmlist; 561 struct gpio_private *p = alarmlist;
700 int some_alarms; 562 int some_alarms;
563 spin_lock_irq(&gpio_lock);
564 p = alarmlist;
701 some_alarms = 0; 565 some_alarms = 0;
702 while (p) { 566 while (p) {
703 if (p->highalarm | p->lowalarm) { 567 if (p->highalarm | p->lowalarm) {
@@ -707,6 +571,7 @@ gpio_ioctl(struct inode *inode, struct file *file,
707 p = p->next; 571 p = p->next;
708 } 572 }
709 gpio_some_alarms = some_alarms; 573 gpio_some_alarms = some_alarms;
574 spin_unlock_irq(&gpio_lock);
710 } 575 }
711 break; 576 break;
712 case IO_READDIR: /* Use IO_SETGET_INPUT/OUTPUT instead! */ 577 case IO_READDIR: /* Use IO_SETGET_INPUT/OUTPUT instead! */
@@ -766,7 +631,7 @@ gpio_ioctl(struct inode *inode, struct file *file,
766 } else if (priv->minor == GPIO_MINOR_G) { 631 } else if (priv->minor == GPIO_MINOR_G) {
767 val = *R_PORT_G_DATA; 632 val = *R_PORT_G_DATA;
768 } 633 }
769 if (copy_to_user((unsigned long*)arg, &val, sizeof(val))) 634 if (copy_to_user((void __user *)arg, &val, sizeof(val)))
770 ret = -EFAULT; 635 ret = -EFAULT;
771 break; 636 break;
772 case IO_READ_OUTBITS: 637 case IO_READ_OUTBITS:
@@ -776,33 +641,32 @@ gpio_ioctl(struct inode *inode, struct file *file,
776 } else if (priv->minor == GPIO_MINOR_G) { 641 } else if (priv->minor == GPIO_MINOR_G) {
777 val = port_g_data_shadow; 642 val = port_g_data_shadow;
778 } 643 }
779 if (copy_to_user((unsigned long*)arg, &val, sizeof(val))) 644 if (copy_to_user((void __user *)arg, &val, sizeof(val)))
780 ret = -EFAULT; 645 ret = -EFAULT;
781 break; 646 break;
782 case IO_SETGET_INPUT: 647 case IO_SETGET_INPUT:
783 /* bits set in *arg is set to input, 648 /* bits set in *arg is set to input,
784 * *arg updated with current input pins. 649 * *arg updated with current input pins.
785 */ 650 */
786 if (copy_from_user(&val, (unsigned long*)arg, sizeof(val))) 651 if (copy_from_user(&val, (void __user *)arg, sizeof(val)))
787 { 652 {
788 ret = -EFAULT; 653 ret = -EFAULT;
789 break; 654 break;
790 } 655 }
791 val = setget_input(priv, val); 656 val = setget_input(priv, val);
792 if (copy_to_user((unsigned long*)arg, &val, sizeof(val))) 657 if (copy_to_user((void __user *)arg, &val, sizeof(val)))
793 ret = -EFAULT; 658 ret = -EFAULT;
794 break; 659 break;
795 case IO_SETGET_OUTPUT: 660 case IO_SETGET_OUTPUT:
796 /* bits set in *arg is set to output, 661 /* bits set in *arg is set to output,
797 * *arg updated with current output pins. 662 * *arg updated with current output pins.
798 */ 663 */
799 if (copy_from_user(&val, (unsigned long*)arg, sizeof(val))) 664 if (copy_from_user(&val, (void __user *)arg, sizeof(val))) {
800 {
801 ret = -EFAULT; 665 ret = -EFAULT;
802 break; 666 break;
803 } 667 }
804 val = setget_output(priv, val); 668 val = setget_output(priv, val);
805 if (copy_to_user((unsigned long*)arg, &val, sizeof(val))) 669 if (copy_to_user((void __user *)arg, &val, sizeof(val)))
806 ret = -EFAULT; 670 ret = -EFAULT;
807 break; 671 break;
808 default: 672 default:
@@ -812,7 +676,7 @@ gpio_ioctl(struct inode *inode, struct file *file,
812 ret = -EINVAL; 676 ret = -EINVAL;
813 } /* switch */ 677 } /* switch */
814 678
815 spin_unlock(&gpio_lock); 679 spin_unlock_irqrestore(&gpio_lock, flags);
816 return ret; 680 return ret;
817} 681}
818 682
@@ -824,18 +688,18 @@ gpio_leds_ioctl(unsigned int cmd, unsigned long arg)
824 688
825 switch (_IOC_NR(cmd)) { 689 switch (_IOC_NR(cmd)) {
826 case IO_LEDACTIVE_SET: 690 case IO_LEDACTIVE_SET:
827 green = ((unsigned char) arg) & 1; 691 green = ((unsigned char)arg) & 1;
828 red = (((unsigned char) arg) >> 1) & 1; 692 red = (((unsigned char)arg) >> 1) & 1;
829 LED_ACTIVE_SET_G(green); 693 CRIS_LED_ACTIVE_SET_G(green);
830 LED_ACTIVE_SET_R(red); 694 CRIS_LED_ACTIVE_SET_R(red);
831 break; 695 break;
832 696
833 case IO_LED_SETBIT: 697 case IO_LED_SETBIT:
834 LED_BIT_SET(arg); 698 CRIS_LED_BIT_SET(arg);
835 break; 699 break;
836 700
837 case IO_LED_CLRBIT: 701 case IO_LED_CLRBIT:
838 LED_BIT_CLR(arg); 702 CRIS_LED_BIT_CLR(arg);
839 break; 703 break;
840 704
841 default: 705 default:
@@ -845,7 +709,7 @@ gpio_leds_ioctl(unsigned int cmd, unsigned long arg)
845 return 0; 709 return 0;
846} 710}
847 711
848const struct file_operations gpio_fops = { 712static const struct file_operations gpio_fops = {
849 .owner = THIS_MODULE, 713 .owner = THIS_MODULE,
850 .poll = gpio_poll, 714 .poll = gpio_poll,
851 .ioctl = gpio_ioctl, 715 .ioctl = gpio_ioctl,
@@ -854,16 +718,18 @@ const struct file_operations gpio_fops = {
854 .release = gpio_release, 718 .release = gpio_release,
855}; 719};
856 720
857 721static void ioif_watcher(const unsigned int gpio_in_available,
858void ioif_watcher(const unsigned int gpio_in_available, 722 const unsigned int gpio_out_available,
859 const unsigned int gpio_out_available, 723 const unsigned char pa_available,
860 const unsigned char pa_available, 724 const unsigned char pb_available)
861 const unsigned char pb_available)
862{ 725{
863 unsigned long int flags; 726 unsigned long int flags;
864 D(printk("gpio.c: ioif_watcher called\n")); 727
865 D(printk("gpio.c: G in: 0x%08x G out: 0x%08x PA: 0x%02x PB: 0x%02x\n", 728 D(printk(KERN_DEBUG "gpio.c: ioif_watcher called\n"));
866 gpio_in_available, gpio_out_available, pa_available, pb_available)); 729 D(printk(KERN_DEBUG "gpio.c: G in: 0x%08x G out: 0x%08x "
730 "PA: 0x%02x PB: 0x%02x\n",
731 gpio_in_available, gpio_out_available,
732 pa_available, pb_available));
867 733
868 spin_lock_irqsave(&gpio_lock, flags); 734 spin_lock_irqsave(&gpio_lock, flags);
869 735
@@ -872,7 +738,7 @@ void ioif_watcher(const unsigned int gpio_in_available,
872 738
873 /* Initialise the dir_g_shadow etc. depending on genconfig */ 739 /* Initialise the dir_g_shadow etc. depending on genconfig */
874 /* 0=input 1=output */ 740 /* 0=input 1=output */
875 if (genconfig_shadow & IO_STATE(R_GEN_CONFIG, g0dir, out)) 741 if (genconfig_shadow & IO_STATE(R_GEN_CONFIG, g0dir, out))
876 dir_g_shadow |= (1 << 0); 742 dir_g_shadow |= (1 << 0);
877 if (genconfig_shadow & IO_STATE(R_GEN_CONFIG, g8_15dir, out)) 743 if (genconfig_shadow & IO_STATE(R_GEN_CONFIG, g8_15dir, out))
878 dir_g_shadow |= 0x0000FF00; 744 dir_g_shadow |= 0x0000FF00;
@@ -884,7 +750,8 @@ void ioif_watcher(const unsigned int gpio_in_available,
884 changeable_dir_g = changeable_dir_g_mask; 750 changeable_dir_g = changeable_dir_g_mask;
885 changeable_dir_g &= dir_g_out_bits; 751 changeable_dir_g &= dir_g_out_bits;
886 changeable_dir_g &= dir_g_in_bits; 752 changeable_dir_g &= dir_g_in_bits;
887 /* Correct the bits that can change direction */ 753
754 /* Correct the bits that can change direction */
888 dir_g_out_bits &= ~changeable_dir_g; 755 dir_g_out_bits &= ~changeable_dir_g;
889 dir_g_out_bits |= dir_g_shadow; 756 dir_g_out_bits |= dir_g_shadow;
890 dir_g_in_bits &= ~changeable_dir_g; 757 dir_g_in_bits &= ~changeable_dir_g;
@@ -892,7 +759,8 @@ void ioif_watcher(const unsigned int gpio_in_available,
892 759
893 spin_unlock_irqrestore(&gpio_lock, flags); 760 spin_unlock_irqrestore(&gpio_lock, flags);
894 761
895 printk(KERN_INFO "GPIO port G: in_bits: 0x%08lX out_bits: 0x%08lX val: %08lX\n", 762 printk(KERN_INFO "GPIO port G: in_bits: 0x%08lX out_bits: 0x%08lX "
763 "val: %08lX\n",
896 dir_g_in_bits, dir_g_out_bits, (unsigned long)*R_PORT_G_DATA); 764 dir_g_in_bits, dir_g_out_bits, (unsigned long)*R_PORT_G_DATA);
897 printk(KERN_INFO "GPIO port G: dir: %08lX changeable: %08lX\n", 765 printk(KERN_INFO "GPIO port G: dir: %08lX changeable: %08lX\n",
898 dir_g_shadow, changeable_dir_g); 766 dir_g_shadow, changeable_dir_g);
@@ -900,16 +768,12 @@ void ioif_watcher(const unsigned int gpio_in_available,
900 768
901/* main driver initialization routine, called from mem.c */ 769/* main driver initialization routine, called from mem.c */
902 770
903static __init int 771static int __init gpio_init(void)
904gpio_init(void)
905{ 772{
906 int res; 773 int res;
907#if defined (CONFIG_ETRAX_CSP0_LEDS) 774#if defined (CONFIG_ETRAX_CSP0_LEDS)
908 int i; 775 int i;
909#endif 776#endif
910 printk("gpio init\n");
911
912 /* do the formalities */
913 777
914 res = register_chrdev(GPIO_MAJOR, gpio_name, &gpio_fops); 778 res = register_chrdev(GPIO_MAJOR, gpio_name, &gpio_fops);
915 if (res < 0) { 779 if (res < 0) {
@@ -919,43 +783,45 @@ gpio_init(void)
919 783
920 /* Clear all leds */ 784 /* Clear all leds */
921#if defined (CONFIG_ETRAX_CSP0_LEDS) || defined (CONFIG_ETRAX_PA_LEDS) || defined (CONFIG_ETRAX_PB_LEDS) 785#if defined (CONFIG_ETRAX_CSP0_LEDS) || defined (CONFIG_ETRAX_PA_LEDS) || defined (CONFIG_ETRAX_PB_LEDS)
922 LED_NETWORK_SET(0); 786 CRIS_LED_NETWORK_SET(0);
923 LED_ACTIVE_SET(0); 787 CRIS_LED_ACTIVE_SET(0);
924 LED_DISK_READ(0); 788 CRIS_LED_DISK_READ(0);
925 LED_DISK_WRITE(0); 789 CRIS_LED_DISK_WRITE(0);
926 790
927#if defined (CONFIG_ETRAX_CSP0_LEDS) 791#if defined (CONFIG_ETRAX_CSP0_LEDS)
928 for (i = 0; i < 32; i++) { 792 for (i = 0; i < 32; i++)
929 LED_BIT_SET(i); 793 CRIS_LED_BIT_SET(i);
930 }
931#endif 794#endif
932 795
933#endif 796#endif
934 /* The I/O interface allocation watcher will be called when 797 /* The I/O interface allocation watcher will be called when
935 * registering it. */ 798 * registering it. */
936 if (cris_io_interface_register_watcher(ioif_watcher)){ 799 if (cris_io_interface_register_watcher(ioif_watcher)){
937 printk(KERN_WARNING "gpio_init: Failed to install IO if allocator watcher\n"); 800 printk(KERN_WARNING "gpio_init: Failed to install IO "
801 "if allocator watcher\n");
938 } 802 }
939 803
940 printk(KERN_INFO "ETRAX 100LX GPIO driver v2.5, (c) 2001, 2002, 2003, 2004 Axis Communications AB\n"); 804 printk(KERN_INFO "ETRAX 100LX GPIO driver v2.5, (c) 2001-2008 "
805 "Axis Communications AB\n");
941 /* We call etrax_gpio_wake_up_check() from timer interrupt and 806 /* We call etrax_gpio_wake_up_check() from timer interrupt and
942 * from cpu_idle() in kernel/process.c 807 * from cpu_idle() in kernel/process.c
943 * The check in cpu_idle() reduces latency from ~15 ms to ~6 ms 808 * The check in cpu_idle() reduces latency from ~15 ms to ~6 ms
944 * in some tests. 809 * in some tests.
945 */ 810 */
946 if (request_irq(TIMER0_IRQ_NBR, gpio_poll_timer_interrupt, 811 res = request_irq(TIMER0_IRQ_NBR, gpio_poll_timer_interrupt,
947 IRQF_SHARED | IRQF_DISABLED,"gpio poll", NULL)) { 812 IRQF_SHARED | IRQF_DISABLED, "gpio poll", gpio_name);
813 if (res) {
948 printk(KERN_CRIT "err: timer0 irq for gpio\n"); 814 printk(KERN_CRIT "err: timer0 irq for gpio\n");
815 return res;
949 } 816 }
950 if (request_irq(PA_IRQ_NBR, gpio_pa_interrupt, 817 res = request_irq(PA_IRQ_NBR, gpio_interrupt,
951 IRQF_SHARED | IRQF_DISABLED,"gpio PA", NULL)) { 818 IRQF_SHARED | IRQF_DISABLED, "gpio PA", gpio_name);
819 if (res)
952 printk(KERN_CRIT "err: PA irq for gpio\n"); 820 printk(KERN_CRIT "err: PA irq for gpio\n");
953 }
954
955 821
956 return res; 822 return res;
957} 823}
958 824
959/* this makes sure that gpio_init is called during kernel boot */ 825/* this makes sure that gpio_init is called during kernel boot */
960
961module_init(gpio_init); 826module_init(gpio_init);
827
diff --git a/arch/cris/arch-v10/drivers/i2c.c b/arch/cris/arch-v10/drivers/i2c.c
index aca81ddaf60f..d6d22067d0c8 100644
--- a/arch/cris/arch-v10/drivers/i2c.c
+++ b/arch/cris/arch-v10/drivers/i2c.c
@@ -6,85 +6,9 @@
6*! kernel modules (i2c_writereg/readreg) and from userspace using 6*! kernel modules (i2c_writereg/readreg) and from userspace using
7*! ioctl()'s 7*! ioctl()'s
8*! 8*!
9*! Nov 30 1998 Torbjorn Eliasson Initial version. 9*! (C) Copyright 1999-2007 Axis Communications AB, LUND, SWEDEN
10*! Bjorn Wesen Elinux kernel version.
11*! Jan 14 2000 Johan Adolfsson Fixed PB shadow register stuff -
12*! don't use PB_I2C if DS1302 uses same bits,
13*! use PB.
14*! $Log: i2c.c,v $
15*! Revision 1.13 2005/03/07 13:13:07 starvik
16*! Added spinlocks to protect states etc
17*!
18*! Revision 1.12 2005/01/05 06:11:22 starvik
19*! No need to do local_irq_disable after local_irq_save.
20*!
21*! Revision 1.11 2004/12/13 12:21:52 starvik
22*! Added I/O and DMA allocators from Linux 2.4
23*!
24*! Revision 1.9 2004/08/24 06:49:14 starvik
25*! Whitespace cleanup
26*!
27*! Revision 1.8 2004/06/08 08:48:26 starvik
28*! Removed unused code
29*!
30*! Revision 1.7 2004/05/28 09:26:59 starvik
31*! Modified I2C initialization to work in 2.6.
32*!
33*! Revision 1.6 2004/05/14 07:58:03 starvik
34*! Merge of changes from 2.4
35*!
36*! Revision 1.4 2002/12/11 13:13:57 starvik
37*! Added arch/ to v10 specific includes
38*! Added fix from Linux 2.4 in serial.c (flush_to_flip_buffer)
39*!
40*! Revision 1.3 2002/11/20 11:56:11 starvik
41*! Merge of Linux 2.5.48
42*!
43*! Revision 1.2 2002/11/18 13:16:06 starvik
44*! Linux 2.5 port of latest 2.4 drivers
45*!
46*! Revision 1.9 2002/10/31 15:32:26 starvik
47*! Update Port B register and shadow even when running with hardware support
48*! to avoid glitches when reading bits
49*! Never set direction to out in i2c_inbyte
50*! Removed incorrect clock toggling at end of i2c_inbyte
51*!
52*! Revision 1.8 2002/08/13 06:31:53 starvik
53*! Made SDA and SCL line configurable
54*! Modified i2c_inbyte to work with PCF8563
55*!
56*! Revision 1.7 2001/04/04 13:11:36 markusl
57*! Updated according to review remarks
58*!
59*! Revision 1.6 2001/03/19 12:43:00 markusl
60*! Made some symbols unstatic (used by the eeprom driver)
61*!
62*! Revision 1.5 2001/02/27 13:52:48 bjornw
63*! malloc.h -> slab.h
64*!
65*! Revision 1.4 2001/02/15 07:17:40 starvik
66*! Corrected usage if port_pb_i2c_shadow
67*!
68*! Revision 1.3 2001/01/26 17:55:13 bjornw
69*! * Made I2C_USES_PB_NOT_PB_I2C a CONFIG option instead of assigning it
70*! magically. Config.in needs to set it for the options that need it, like
71*! Dallas 1302 support. Actually, it should be default since it screws up
72*! the PB bits even if you don't use I2C..
73*! * Include linux/config.h to get the above
74*!
75*! Revision 1.2 2001/01/18 15:49:30 bjornw
76*! 2.4 port of I2C including some cleanups (untested of course)
77*!
78*! Revision 1.1 2001/01/18 15:35:25 bjornw
79*! Verbatim copy of the Etrax i2c driver, 2.0 elinux version
80*!
81*!
82*! ---------------------------------------------------------------------------
83*!
84*! (C) Copyright 1999-2002 Axis Communications AB, LUND, SWEDEN
85*! 10*!
86*!***************************************************************************/ 11*!***************************************************************************/
87/* $Id: i2c.c,v 1.13 2005/03/07 13:13:07 starvik Exp $ */
88 12
89/****************** INCLUDE FILES SECTION ***********************************/ 13/****************** INCLUDE FILES SECTION ***********************************/
90 14
@@ -622,7 +546,7 @@ i2c_readreg(unsigned char theSlave, unsigned char theReg)
622 * last received byte needs to be nacked 546 * last received byte needs to be nacked
623 * instead of acked 547 * instead of acked
624 */ 548 */
625 i2c_sendack(); 549 i2c_sendnack();
626 /* 550 /*
627 * end sequence 551 * end sequence
628 */ 552 */
@@ -708,6 +632,7 @@ i2c_init(void)
708 if (!first) { 632 if (!first) {
709 return res; 633 return res;
710 } 634 }
635 first = 0;
711 636
712 /* Setup and enable the Port B I2C interface */ 637 /* Setup and enable the Port B I2C interface */
713 638
diff --git a/arch/cris/arch-v10/drivers/pcf8563.c b/arch/cris/arch-v10/drivers/pcf8563.c
index c263b8232dbc..52103d16dc6c 100644
--- a/arch/cris/arch-v10/drivers/pcf8563.c
+++ b/arch/cris/arch-v10/drivers/pcf8563.c
@@ -8,14 +8,13 @@
8 * low detector are also provided. All address and data are transferred 8 * low detector are also provided. All address and data are transferred
9 * serially via two-line bidirectional I2C-bus. Maximum bus speed is 9 * serially via two-line bidirectional I2C-bus. Maximum bus speed is
10 * 400 kbits/s. The built-in word address register is incremented 10 * 400 kbits/s. The built-in word address register is incremented
11 * automatically after each written or read bute. 11 * automatically after each written or read byte.
12 * 12 *
13 * Copyright (c) 2002, Axis Communications AB 13 * Copyright (c) 2002-2007, Axis Communications AB
14 * All rights reserved. 14 * All rights reserved.
15 * 15 *
16 * Author: Tobias Anderberg <tobiasa@axis.com>. 16 * Author: Tobias Anderberg <tobiasa@axis.com>.
17 * 17 *
18 * $Id: pcf8563.c,v 1.11 2005/03/07 13:13:07 starvik Exp $
19 */ 18 */
20 19
21#include <linux/module.h> 20#include <linux/module.h>
@@ -27,19 +26,19 @@
27#include <linux/ioctl.h> 26#include <linux/ioctl.h>
28#include <linux/delay.h> 27#include <linux/delay.h>
29#include <linux/bcd.h> 28#include <linux/bcd.h>
30#include <linux/capability.h> 29#include <linux/mutex.h>
31 30
32#include <asm/uaccess.h> 31#include <asm/uaccess.h>
33#include <asm/system.h> 32#include <asm/system.h>
34#include <asm/io.h> 33#include <asm/io.h>
35#include <asm/arch/svinto.h>
36#include <asm/rtc.h> 34#include <asm/rtc.h>
35
37#include "i2c.h" 36#include "i2c.h"
38 37
39#define PCF8563_MAJOR 121 /* Local major number. */ 38#define PCF8563_MAJOR 121 /* Local major number. */
40#define DEVICE_NAME "rtc" /* Name which is registered in /proc/devices. */ 39#define DEVICE_NAME "rtc" /* Name which is registered in /proc/devices. */
41#define PCF8563_NAME "PCF8563" 40#define PCF8563_NAME "PCF8563"
42#define DRIVER_VERSION "$Revision: 1.11 $" 41#define DRIVER_VERSION "$Revision: 1.24 $"
43 42
44/* I2C bus slave registers. */ 43/* I2C bus slave registers. */
45#define RTC_I2C_READ 0xa3 44#define RTC_I2C_READ 0xa3
@@ -49,71 +48,88 @@
49#define rtc_read(x) i2c_readreg(RTC_I2C_READ, x) 48#define rtc_read(x) i2c_readreg(RTC_I2C_READ, x)
50#define rtc_write(x,y) i2c_writereg(RTC_I2C_WRITE, x, y) 49#define rtc_write(x,y) i2c_writereg(RTC_I2C_WRITE, x, y)
51 50
52static DEFINE_SPINLOCK(rtc_lock); /* Protect state etc */ 51static DEFINE_MUTEX(rtc_lock); /* Protect state etc */
53 52
54static const unsigned char days_in_month[] = 53static const unsigned char days_in_month[] =
55 { 0, 31, 28, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31 }; 54 { 0, 31, 28, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31 };
56 55
57int pcf8563_ioctl(struct inode *, struct file *, unsigned int, unsigned long); 56int pcf8563_ioctl(struct inode *, struct file *, unsigned int, unsigned long);
58 57
58/* Cache VL bit value read at driver init since writing the RTC_SECOND
59 * register clears the VL status.
60 */
61static int voltage_low;
62
59static const struct file_operations pcf8563_fops = { 63static const struct file_operations pcf8563_fops = {
60 .owner = THIS_MODULE, 64 .owner = THIS_MODULE,
61 .ioctl = pcf8563_ioctl, 65 .ioctl = pcf8563_ioctl,
62}; 66};
63 67
64unsigned char 68unsigned char
65pcf8563_readreg(int reg) 69pcf8563_readreg(int reg)
66{ 70{
67 unsigned char res = i2c_readreg(RTC_I2C_READ, reg); 71 unsigned char res = rtc_read(reg);
68 72
69 /* The PCF8563 does not return 0 for unimplemented bits */ 73 /* The PCF8563 does not return 0 for unimplemented bits. */
70 switch(reg) 74 switch (reg) {
71 { 75 case RTC_SECONDS:
72 case RTC_SECONDS: 76 case RTC_MINUTES:
73 case RTC_MINUTES: 77 res &= 0x7F;
74 res &= 0x7f; 78 break;
75 break; 79 case RTC_HOURS:
76 case RTC_HOURS: 80 case RTC_DAY_OF_MONTH:
77 case RTC_DAY_OF_MONTH: 81 res &= 0x3F;
78 res &= 0x3f; 82 break;
79 break; 83 case RTC_WEEKDAY:
80 case RTC_MONTH: 84 res &= 0x07;
81 res = (res & 0x1f) - 1; /* PCF8563 returns month in range 1-12 */ 85 break;
82 break; 86 case RTC_MONTH:
87 res &= 0x1F;
88 break;
89 case RTC_CONTROL1:
90 res &= 0xA8;
91 break;
92 case RTC_CONTROL2:
93 res &= 0x1F;
94 break;
95 case RTC_CLOCKOUT_FREQ:
96 case RTC_TIMER_CONTROL:
97 res &= 0x83;
98 break;
83 } 99 }
84 return res; 100 return res;
85} 101}
86 102
87void 103void
88pcf8563_writereg(int reg, unsigned char val) 104pcf8563_writereg(int reg, unsigned char val)
89{ 105{
90#ifdef CONFIG_ETRAX_RTC_READONLY
91 if (reg == RTC_CONTROL1 || (reg >= RTC_SECONDS && reg <= RTC_YEAR))
92 return;
93#endif
94
95 rtc_write(reg, val); 106 rtc_write(reg, val);
96} 107}
97 108
98void 109void
99get_rtc_time(struct rtc_time *tm) 110get_rtc_time(struct rtc_time *tm)
100{ 111{
101 tm->tm_sec = rtc_read(RTC_SECONDS); 112 tm->tm_sec = rtc_read(RTC_SECONDS);
102 tm->tm_min = rtc_read(RTC_MINUTES); 113 tm->tm_min = rtc_read(RTC_MINUTES);
103 tm->tm_hour = rtc_read(RTC_HOURS); 114 tm->tm_hour = rtc_read(RTC_HOURS);
104 tm->tm_mday = rtc_read(RTC_DAY_OF_MONTH); 115 tm->tm_mday = rtc_read(RTC_DAY_OF_MONTH);
105 tm->tm_mon = rtc_read(RTC_MONTH); 116 tm->tm_wday = rtc_read(RTC_WEEKDAY);
117 tm->tm_mon = rtc_read(RTC_MONTH);
106 tm->tm_year = rtc_read(RTC_YEAR); 118 tm->tm_year = rtc_read(RTC_YEAR);
107 119
108 if (tm->tm_sec & 0x80) 120 if (tm->tm_sec & 0x80) {
109 printk(KERN_WARNING "%s: RTC Low Voltage - date/time is not reliable!\n", PCF8563_NAME); 121 printk(KERN_ERR "%s: RTC Voltage Low - reliable date/time "
122 "information is no longer guaranteed!\n", PCF8563_NAME);
123 }
110 124
111 tm->tm_year = BCD_TO_BIN(tm->tm_year) + ((tm->tm_mon & 0x80) ? 100 : 0); 125 tm->tm_year = BCD_TO_BIN(tm->tm_year) +
112 tm->tm_sec &= 0x7f; 126 ((tm->tm_mon & 0x80) ? 100 : 0);
113 tm->tm_min &= 0x7f; 127 tm->tm_sec &= 0x7F;
114 tm->tm_hour &= 0x3f; 128 tm->tm_min &= 0x7F;
115 tm->tm_mday &= 0x3f; 129 tm->tm_hour &= 0x3F;
116 tm->tm_mon &= 0x1f; 130 tm->tm_mday &= 0x3F;
131 tm->tm_wday &= 0x07; /* Not coded in BCD. */
132 tm->tm_mon &= 0x1F;
117 133
118 BCD_TO_BIN(tm->tm_sec); 134 BCD_TO_BIN(tm->tm_sec);
119 BCD_TO_BIN(tm->tm_min); 135 BCD_TO_BIN(tm->tm_min);
@@ -126,17 +142,24 @@ get_rtc_time(struct rtc_time *tm)
126int __init 142int __init
127pcf8563_init(void) 143pcf8563_init(void)
128{ 144{
129 int ret; 145 static int res;
130 146 static int first = 1;
131 if ((ret = i2c_init())) { 147
132 printk(KERN_CRIT "pcf8563_init: failed to init i2c\n"); 148 if (!first)
133 return ret; 149 return res;
150 first = 0;
151
152 /* Initiate the i2c protocol. */
153 res = i2c_init();
154 if (res < 0) {
155 printk(KERN_CRIT "pcf8563_init: Failed to init i2c.\n");
156 return res;
134 } 157 }
135 158
136 /* 159 /*
137 * First of all we need to reset the chip. This is done by 160 * First of all we need to reset the chip. This is done by
138 * clearing control1, control2 and clk freq, clear the 161 * clearing control1, control2 and clk freq and resetting
139 * Voltage Low bit, and resetting all alarms. 162 * all alarms.
140 */ 163 */
141 if (rtc_write(RTC_CONTROL1, 0x00) < 0) 164 if (rtc_write(RTC_CONTROL1, 0x00) < 0)
142 goto err; 165 goto err;
@@ -147,34 +170,36 @@ pcf8563_init(void)
147 if (rtc_write(RTC_CLOCKOUT_FREQ, 0x00) < 0) 170 if (rtc_write(RTC_CLOCKOUT_FREQ, 0x00) < 0)
148 goto err; 171 goto err;
149 172
150 /* Clear the VL bit in the seconds register. */ 173 if (rtc_write(RTC_TIMER_CONTROL, 0x03) < 0)
151 ret = rtc_read(RTC_SECONDS);
152
153 if (rtc_write(RTC_SECONDS, (ret & 0x7f)) < 0)
154 goto err; 174 goto err;
155 175
156 /* Reset the alarms. */ 176 /* Reset the alarms. */
157 if (rtc_write(RTC_MINUTE_ALARM, 0x00) < 0) 177 if (rtc_write(RTC_MINUTE_ALARM, 0x80) < 0)
158 goto err; 178 goto err;
159 179
160 if (rtc_write(RTC_HOUR_ALARM, 0x00) < 0) 180 if (rtc_write(RTC_HOUR_ALARM, 0x80) < 0)
161 goto err; 181 goto err;
162 182
163 if (rtc_write(RTC_DAY_ALARM, 0x00) < 0) 183 if (rtc_write(RTC_DAY_ALARM, 0x80) < 0)
164 goto err; 184 goto err;
165 185
166 if (rtc_write(RTC_WEEKDAY_ALARM, 0x00) < 0) 186 if (rtc_write(RTC_WEEKDAY_ALARM, 0x80) < 0)
167 goto err; 187 goto err;
168 188
169 /* Check for low voltage, and warn about it.. */ 189 /* Check for low voltage, and warn about it. */
170 if (rtc_read(RTC_SECONDS) & 0x80) 190 if (rtc_read(RTC_SECONDS) & 0x80) {
171 printk(KERN_WARNING "%s: RTC Low Voltage - date/time is not reliable!\n", PCF8563_NAME); 191 voltage_low = 1;
172 192 printk(KERN_WARNING "%s: RTC Voltage Low - reliable "
173 return 0; 193 "date/time information is no longer guaranteed!\n",
194 PCF8563_NAME);
195 }
196
197 return res;
174 198
175err: 199err:
176 printk(KERN_INFO "%s: Error initializing chip.\n", PCF8563_NAME); 200 printk(KERN_INFO "%s: Error initializing chip.\n", PCF8563_NAME);
177 return -1; 201 res = -1;
202 return res;
178} 203}
179 204
180void __exit 205void __exit
@@ -187,8 +212,8 @@ pcf8563_exit(void)
187 * ioctl calls for this driver. Why return -ENOTTY upon error? Because 212 * ioctl calls for this driver. Why return -ENOTTY upon error? Because
188 * POSIX says so! 213 * POSIX says so!
189 */ 214 */
190int 215int pcf8563_ioctl(struct inode *inode, struct file *filp, unsigned int cmd,
191pcf8563_ioctl(struct inode *inode, struct file *filp, unsigned int cmd, unsigned long arg) 216 unsigned long arg)
192{ 217{
193 /* Some sanity checks. */ 218 /* Some sanity checks. */
194 if (_IOC_TYPE(cmd) != RTC_MAGIC) 219 if (_IOC_TYPE(cmd) != RTC_MAGIC)
@@ -198,124 +223,146 @@ pcf8563_ioctl(struct inode *inode, struct file *filp, unsigned int cmd, unsigned
198 return -ENOTTY; 223 return -ENOTTY;
199 224
200 switch (cmd) { 225 switch (cmd) {
201 case RTC_RD_TIME: 226 case RTC_RD_TIME:
202 { 227 {
203 struct rtc_time tm; 228 struct rtc_time tm;
204
205 spin_lock(&rtc_lock);
206 get_rtc_time(&tm);
207
208 if (copy_to_user((struct rtc_time *) arg, &tm, sizeof(struct rtc_time))) {
209 spin_unlock(&rtc_lock);
210 return -EFAULT;
211 }
212
213 spin_unlock(&rtc_lock);
214 return 0;
215 }
216 break;
217 case RTC_SET_TIME:
218 {
219#ifdef CONFIG_ETRAX_RTC_READONLY
220 return -EPERM;
221#else
222 int leap;
223 int century;
224 struct rtc_time tm;
225
226 memset(&tm, 0, sizeof (struct rtc_time));
227 if (!capable(CAP_SYS_TIME))
228 return -EPERM;
229
230 if (copy_from_user(&tm, (struct rtc_time *) arg, sizeof(struct rtc_time)))
231 return -EFAULT;
232
233 /* Convert from struct tm to struct rtc_time. */
234 tm.tm_year += 1900;
235 tm.tm_mon += 1;
236
237 leap = ((tm.tm_mon == 2) && ((tm.tm_year % 4) == 0)) ? 1 : 0;
238
239 /* Perform some sanity checks. */
240 if ((tm.tm_year < 1970) ||
241 (tm.tm_mon > 12) ||
242 (tm.tm_mday == 0) ||
243 (tm.tm_mday > days_in_month[tm.tm_mon] + leap) ||
244 (tm.tm_hour >= 24) ||
245 (tm.tm_min >= 60) ||
246 (tm.tm_sec >= 60))
247 return -EINVAL;
248
249 century = (tm.tm_year >= 2000) ? 0x80 : 0;
250 tm.tm_year = tm.tm_year % 100;
251
252 BIN_TO_BCD(tm.tm_year);
253 BIN_TO_BCD(tm.tm_mday);
254 BIN_TO_BCD(tm.tm_hour);
255 BIN_TO_BCD(tm.tm_min);
256 BIN_TO_BCD(tm.tm_sec);
257 tm.tm_mon |= century;
258
259 spin_lock(&rtc_lock);
260
261 rtc_write(RTC_YEAR, tm.tm_year);
262 rtc_write(RTC_MONTH, tm.tm_mon);
263 rtc_write(RTC_DAY_OF_MONTH, tm.tm_mday);
264 rtc_write(RTC_HOURS, tm.tm_hour);
265 rtc_write(RTC_MINUTES, tm.tm_min);
266 rtc_write(RTC_SECONDS, tm.tm_sec);
267
268 spin_unlock(&rtc_lock);
269
270 return 0;
271#endif /* !CONFIG_ETRAX_RTC_READONLY */
272 }
273
274 case RTC_VLOW_RD:
275 {
276 int vl_bit = 0;
277
278 if (rtc_read(RTC_SECONDS) & 0x80) {
279 vl_bit = 1;
280 printk(KERN_WARNING "%s: RTC Voltage Low - reliable "
281 "date/time information is no longer guaranteed!\n",
282 PCF8563_NAME);
283 }
284 if (copy_to_user((int *) arg, &vl_bit, sizeof(int)))
285 return -EFAULT;
286
287 return 0;
288 }
289 229
290 case RTC_VLOW_SET: 230 mutex_lock(&rtc_lock);
291 { 231 memset(&tm, 0, sizeof tm);
292 /* Clear the VL bit in the seconds register */ 232 get_rtc_time(&tm);
293 int ret = rtc_read(RTC_SECONDS);
294 233
295 rtc_write(RTC_SECONDS, (ret & 0x7F)); 234 if (copy_to_user((struct rtc_time *) arg, &tm,
235 sizeof tm)) {
236 spin_unlock(&rtc_lock);
237 return -EFAULT;
238 }
239
240 mutex_unlock(&rtc_lock);
296 241
297 return 0; 242 return 0;
243 }
244 case RTC_SET_TIME:
245 {
246 int leap;
247 int year;
248 int century;
249 struct rtc_time tm;
250
251 memset(&tm, 0, sizeof tm);
252 if (!capable(CAP_SYS_TIME))
253 return -EPERM;
254
255 if (copy_from_user(&tm, (struct rtc_time *) arg, sizeof tm))
256 return -EFAULT;
257
258 /* Convert from struct tm to struct rtc_time. */
259 tm.tm_year += 1900;
260 tm.tm_mon += 1;
261
262 /*
263 * Check if tm.tm_year is a leap year. A year is a leap
264 * year if it is divisible by 4 but not 100, except
265 * that years divisible by 400 _are_ leap years.
266 */
267 year = tm.tm_year;
268 leap = (tm.tm_mon == 2) &&
269 ((year % 4 == 0 && year % 100 != 0) || year % 400 == 0);
270
271 /* Perform some sanity checks. */
272 if ((tm.tm_year < 1970) ||
273 (tm.tm_mon > 12) ||
274 (tm.tm_mday == 0) ||
275 (tm.tm_mday > days_in_month[tm.tm_mon] + leap) ||
276 (tm.tm_wday >= 7) ||
277 (tm.tm_hour >= 24) ||
278 (tm.tm_min >= 60) ||
279 (tm.tm_sec >= 60))
280 return -EINVAL;
281
282 century = (tm.tm_year >= 2000) ? 0x80 : 0;
283 tm.tm_year = tm.tm_year % 100;
284
285 BIN_TO_BCD(tm.tm_year);
286 BIN_TO_BCD(tm.tm_mon);
287 BIN_TO_BCD(tm.tm_mday);
288 BIN_TO_BCD(tm.tm_hour);
289 BIN_TO_BCD(tm.tm_min);
290 BIN_TO_BCD(tm.tm_sec);
291 tm.tm_mon |= century;
292
293 mutex_lock(&rtc_lock);
294
295 rtc_write(RTC_YEAR, tm.tm_year);
296 rtc_write(RTC_MONTH, tm.tm_mon);
297 rtc_write(RTC_WEEKDAY, tm.tm_wday); /* Not coded in BCD. */
298 rtc_write(RTC_DAY_OF_MONTH, tm.tm_mday);
299 rtc_write(RTC_HOURS, tm.tm_hour);
300 rtc_write(RTC_MINUTES, tm.tm_min);
301 rtc_write(RTC_SECONDS, tm.tm_sec);
302
303 mutex_unlock(&rtc_lock);
304
305 return 0;
306 }
307 case RTC_VL_READ:
308 if (voltage_low) {
309 printk(KERN_ERR "%s: RTC Voltage Low - "
310 "reliable date/time information is no "
311 "longer guaranteed!\n", PCF8563_NAME);
298 } 312 }
299 313
300 default: 314 if (copy_to_user((int *) arg, &voltage_low, sizeof(int)))
301 return -ENOTTY; 315 return -EFAULT;
316 return 0;
317
318 case RTC_VL_CLR:
319 {
320 /* Clear the VL bit in the seconds register in case
321 * the time has not been set already (which would
322 * have cleared it). This does not really matter
323 * because of the cached voltage_low value but do it
324 * anyway for consistency. */
325
326 int ret = rtc_read(RTC_SECONDS);
327
328 rtc_write(RTC_SECONDS, (ret & 0x7F));
329
330 /* Clear the cached value. */
331 voltage_low = 0;
332
333 return 0;
334 }
335 default:
336 return -ENOTTY;
302 } 337 }
303 338
304 return 0; 339 return 0;
305} 340}
306 341
307static int __init 342static int __init pcf8563_register(void)
308pcf8563_register(void)
309{ 343{
310 pcf8563_init(); 344 if (pcf8563_init() < 0) {
345 printk(KERN_INFO "%s: Unable to initialize Real-Time Clock "
346 "Driver, %s\n", PCF8563_NAME, DRIVER_VERSION);
347 return -1;
348 }
349
311 if (register_chrdev(PCF8563_MAJOR, DEVICE_NAME, &pcf8563_fops) < 0) { 350 if (register_chrdev(PCF8563_MAJOR, DEVICE_NAME, &pcf8563_fops) < 0) {
312 printk(KERN_INFO "%s: Unable to get major number %d for RTC device.\n", 351 printk(KERN_INFO "%s: Unable to get major number %d for RTC device.\n",
313 PCF8563_NAME, PCF8563_MAJOR); 352 PCF8563_NAME, PCF8563_MAJOR);
314 return -1; 353 return -1;
315 } 354 }
316 355
317 printk(KERN_INFO "%s Real-Time Clock Driver, %s\n", PCF8563_NAME, DRIVER_VERSION); 356 printk(KERN_INFO "%s Real-Time Clock Driver, %s\n", PCF8563_NAME,
318 return 0; 357 DRIVER_VERSION);
358
359 /* Check for low voltage, and warn about it. */
360 if (voltage_low) {
361 printk(KERN_WARNING "%s: RTC Voltage Low - reliable date/time "
362 "information is no longer guaranteed!\n", PCF8563_NAME);
363 }
364
365 return 0;
319} 366}
320 367
321module_init(pcf8563_register); 368module_init(pcf8563_register);
diff --git a/arch/cris/arch-v10/drivers/sync_serial.c b/arch/cris/arch-v10/drivers/sync_serial.c
new file mode 100644
index 000000000000..069546e342c5
--- /dev/null
+++ b/arch/cris/arch-v10/drivers/sync_serial.c
@@ -0,0 +1,1441 @@
1/*
2 * Simple synchronous serial port driver for ETRAX 100LX.
3 *
4 * Synchronous serial ports are used for continuous streamed data like audio.
5 * The default setting for this driver is compatible with the STA 013 MP3
6 * decoder. The driver can easily be tuned to fit other audio encoder/decoders
7 * and SPI
8 *
9 * Copyright (c) 2001-2008 Axis Communications AB
10 *
11 * Author: Mikael Starvik, Johan Adolfsson
12 *
13 */
14#include <linux/module.h>
15#include <linux/kernel.h>
16#include <linux/types.h>
17#include <linux/errno.h>
18#include <linux/major.h>
19#include <linux/sched.h>
20#include <linux/slab.h>
21#include <linux/interrupt.h>
22#include <linux/poll.h>
23#include <linux/init.h>
24#include <linux/timer.h>
25#include <asm/irq.h>
26#include <asm/dma.h>
27#include <asm/io.h>
28#include <asm/arch/svinto.h>
29#include <asm/uaccess.h>
30#include <asm/system.h>
31#include <asm/sync_serial.h>
32#include <asm/arch/io_interface_mux.h>
33
34/* The receiver is a bit tricky beacuse of the continuous stream of data.*/
35/* */
36/* Three DMA descriptors are linked together. Each DMA descriptor is */
37/* responsible for port->bufchunk of a common buffer. */
38/* */
39/* +---------------------------------------------+ */
40/* | +----------+ +----------+ +----------+ | */
41/* +-> | Descr[0] |-->| Descr[1] |-->| Descr[2] |-+ */
42/* +----------+ +----------+ +----------+ */
43/* | | | */
44/* v v v */
45/* +-------------------------------------+ */
46/* | BUFFER | */
47/* +-------------------------------------+ */
48/* |<- data_avail ->| */
49/* readp writep */
50/* */
51/* If the application keeps up the pace readp will be right after writep.*/
52/* If the application can't keep the pace we have to throw away data. */
53/* The idea is that readp should be ready with the data pointed out by */
54/* Descr[i] when the DMA has filled in Descr[i+1]. */
55/* Otherwise we will discard */
56/* the rest of the data pointed out by Descr1 and set readp to the start */
57/* of Descr2 */
58
59#define SYNC_SERIAL_MAJOR 125
60
61/* IN_BUFFER_SIZE should be a multiple of 6 to make sure that 24 bit */
62/* words can be handled */
63#define IN_BUFFER_SIZE 12288
64#define IN_DESCR_SIZE 256
65#define NUM_IN_DESCR (IN_BUFFER_SIZE/IN_DESCR_SIZE)
66#define OUT_BUFFER_SIZE 4096
67
68#define DEFAULT_FRAME_RATE 0
69#define DEFAULT_WORD_RATE 7
70
71/* NOTE: Enabling some debug will likely cause overrun or underrun,
72 * especially if manual mode is use.
73 */
74#define DEBUG(x)
75#define DEBUGREAD(x)
76#define DEBUGWRITE(x)
77#define DEBUGPOLL(x)
78#define DEBUGRXINT(x)
79#define DEBUGTXINT(x)
80
81/* Define some macros to access ETRAX 100 registers */
82#define SETF(var, reg, field, val) \
83 do { \
84 var = (var & ~IO_MASK_(reg##_, field##_)) | \
85 IO_FIELD_(reg##_, field##_, val); \
86 } while (0)
87
88#define SETS(var, reg, field, val) \
89 do { \
90 var = (var & ~IO_MASK_(reg##_, field##_)) | \
91 IO_STATE_(reg##_, field##_, _##val); \
92 } while (0)
93
94struct sync_port {
95 /* Etrax registers and bits*/
96 const volatile unsigned *const status;
97 volatile unsigned *const ctrl_data;
98 volatile unsigned *const output_dma_first;
99 volatile unsigned char *const output_dma_cmd;
100 volatile unsigned char *const output_dma_clr_irq;
101 volatile unsigned *const input_dma_first;
102 volatile unsigned char *const input_dma_cmd;
103 volatile unsigned *const input_dma_descr;
104 /* 8*4 */
105 volatile unsigned char *const input_dma_clr_irq;
106 volatile unsigned *const data_out;
107 const volatile unsigned *const data_in;
108 char data_avail_bit; /* In R_IRQ_MASK1_RD/SET/CLR */
109 char transmitter_ready_bit; /* In R_IRQ_MASK1_RD/SET/CLR */
110 char input_dma_descr_bit; /* In R_IRQ_MASK2_RD */
111
112 char output_dma_bit; /* In R_IRQ_MASK2_RD */
113 /* End of fields initialised in array */
114 char started; /* 1 if port has been started */
115 char port_nbr; /* Port 0 or 1 */
116 char busy; /* 1 if port is busy */
117
118 char enabled; /* 1 if port is enabled */
119 char use_dma; /* 1 if port uses dma */
120 char tr_running;
121
122 char init_irqs;
123
124 /* Register shadow */
125 unsigned int ctrl_data_shadow;
126 /* Remaining bytes for current transfer */
127 volatile unsigned int out_count;
128 /* Current position in out_buffer */
129 unsigned char *outp;
130 /* 16*4 */
131 /* Next byte to be read by application */
132 volatile unsigned char *volatile readp;
133 /* Next byte to be written by etrax */
134 volatile unsigned char *volatile writep;
135
136 unsigned int in_buffer_size;
137 unsigned int inbufchunk;
138 struct etrax_dma_descr out_descr __attribute__ ((aligned(32)));
139 struct etrax_dma_descr in_descr[NUM_IN_DESCR] __attribute__ ((aligned(32)));
140 unsigned char out_buffer[OUT_BUFFER_SIZE] __attribute__ ((aligned(32)));
141 unsigned char in_buffer[IN_BUFFER_SIZE]__attribute__ ((aligned(32)));
142 unsigned char flip[IN_BUFFER_SIZE] __attribute__ ((aligned(32)));
143 struct etrax_dma_descr *next_rx_desc;
144 struct etrax_dma_descr *prev_rx_desc;
145 int full;
146
147 wait_queue_head_t out_wait_q;
148 wait_queue_head_t in_wait_q;
149};
150
151
152static int etrax_sync_serial_init(void);
153static void initialize_port(int portnbr);
154static inline int sync_data_avail(struct sync_port *port);
155
156static int sync_serial_open(struct inode *inode, struct file *file);
157static int sync_serial_release(struct inode *inode, struct file *file);
158static unsigned int sync_serial_poll(struct file *filp, poll_table *wait);
159
160static int sync_serial_ioctl(struct inode *inode, struct file *file,
161 unsigned int cmd, unsigned long arg);
162static ssize_t sync_serial_write(struct file *file, const char *buf,
163 size_t count, loff_t *ppos);
164static ssize_t sync_serial_read(struct file *file, char *buf,
165 size_t count, loff_t *ppos);
166
167#if ((defined(CONFIG_ETRAX_SYNCHRONOUS_SERIAL_PORT0) && \
168 defined(CONFIG_ETRAX_SYNCHRONOUS_SERIAL0_DMA)) || \
169 (defined(CONFIG_ETRAX_SYNCHRONOUS_SERIAL_PORT1) && \
170 defined(CONFIG_ETRAX_SYNCHRONOUS_SERIAL1_DMA)))
171#define SYNC_SER_DMA
172#endif
173
174static void send_word(struct sync_port *port);
175static void start_dma(struct sync_port *port, const char *data, int count);
176static void start_dma_in(struct sync_port *port);
177#ifdef SYNC_SER_DMA
178static irqreturn_t tr_interrupt(int irq, void *dev_id);
179static irqreturn_t rx_interrupt(int irq, void *dev_id);
180#endif
181#if ((defined(CONFIG_ETRAX_SYNCHRONOUS_SERIAL_PORT0) && \
182 !defined(CONFIG_ETRAX_SYNCHRONOUS_SERIAL0_DMA)) || \
183 (defined(CONFIG_ETRAX_SYNCHRONOUS_SERIAL_PORT1) && \
184 !defined(CONFIG_ETRAX_SYNCHRONOUS_SERIAL1_DMA)))
185#define SYNC_SER_MANUAL
186#endif
187#ifdef SYNC_SER_MANUAL
188static irqreturn_t manual_interrupt(int irq, void *dev_id);
189#endif
190
191/* The ports */
192static struct sync_port ports[] = {
193 {
194 .status = R_SYNC_SERIAL1_STATUS,
195 .ctrl_data = R_SYNC_SERIAL1_CTRL,
196 .output_dma_first = R_DMA_CH8_FIRST,
197 .output_dma_cmd = R_DMA_CH8_CMD,
198 .output_dma_clr_irq = R_DMA_CH8_CLR_INTR,
199 .input_dma_first = R_DMA_CH9_FIRST,
200 .input_dma_cmd = R_DMA_CH9_CMD,
201 .input_dma_descr = R_DMA_CH9_DESCR,
202 .input_dma_clr_irq = R_DMA_CH9_CLR_INTR,
203 .data_out = R_SYNC_SERIAL1_TR_DATA,
204 .data_in = R_SYNC_SERIAL1_REC_DATA,
205 .data_avail_bit = IO_BITNR(R_IRQ_MASK1_RD, ser1_data),
206 .transmitter_ready_bit = IO_BITNR(R_IRQ_MASK1_RD, ser1_ready),
207 .input_dma_descr_bit = IO_BITNR(R_IRQ_MASK2_RD, dma9_descr),
208 .output_dma_bit = IO_BITNR(R_IRQ_MASK2_RD, dma8_eop),
209 .init_irqs = 1,
210#if defined(CONFIG_ETRAX_SYNCHRONOUS_SERIAL0_DMA)
211 .use_dma = 1,
212#else
213 .use_dma = 0,
214#endif
215 },
216 {
217 .status = R_SYNC_SERIAL3_STATUS,
218 .ctrl_data = R_SYNC_SERIAL3_CTRL,
219 .output_dma_first = R_DMA_CH4_FIRST,
220 .output_dma_cmd = R_DMA_CH4_CMD,
221 .output_dma_clr_irq = R_DMA_CH4_CLR_INTR,
222 .input_dma_first = R_DMA_CH5_FIRST,
223 .input_dma_cmd = R_DMA_CH5_CMD,
224 .input_dma_descr = R_DMA_CH5_DESCR,
225 .input_dma_clr_irq = R_DMA_CH5_CLR_INTR,
226 .data_out = R_SYNC_SERIAL3_TR_DATA,
227 .data_in = R_SYNC_SERIAL3_REC_DATA,
228 .data_avail_bit = IO_BITNR(R_IRQ_MASK1_RD, ser3_data),
229 .transmitter_ready_bit = IO_BITNR(R_IRQ_MASK1_RD, ser3_ready),
230 .input_dma_descr_bit = IO_BITNR(R_IRQ_MASK2_RD, dma5_descr),
231 .output_dma_bit = IO_BITNR(R_IRQ_MASK2_RD, dma4_eop),
232 .init_irqs = 1,
233#if defined(CONFIG_ETRAX_SYNCHRONOUS_SERIAL1_DMA)
234 .use_dma = 1,
235#else
236 .use_dma = 0,
237#endif
238 }
239};
240
241/* Register shadows */
242static unsigned sync_serial_prescale_shadow;
243
244#define NUMBER_OF_PORTS 2
245
246static struct file_operations sync_serial_fops = {
247 .owner = THIS_MODULE,
248 .write = sync_serial_write,
249 .read = sync_serial_read,
250 .poll = sync_serial_poll,
251 .ioctl = sync_serial_ioctl,
252 .open = sync_serial_open,
253 .release = sync_serial_release
254};
255
256static int __init etrax_sync_serial_init(void)
257{
258 ports[0].enabled = 0;
259 ports[1].enabled = 0;
260
261#if defined(CONFIG_ETRAX_SYNCHRONOUS_SERIAL_PORT0)
262 if (cris_request_io_interface(if_sync_serial_1, "sync_ser1")) {
263 printk(KERN_CRIT "ETRAX100LX sync_serial: "
264 "Could not allocate IO group for port %d\n", 0);
265 return -EBUSY;
266 }
267#endif
268#if defined(CONFIG_ETRAX_SYNCHRONOUS_SERIAL_PORT1)
269 if (cris_request_io_interface(if_sync_serial_3, "sync_ser3")) {
270#if defined(CONFIG_ETRAX_SYNCHRONOUS_SERIAL_PORT0)
271 cris_free_io_interface(if_sync_serial_1);
272#endif
273 printk(KERN_CRIT "ETRAX100LX sync_serial: "
274 "Could not allocate IO group for port %d\n", 1);
275 return -EBUSY;
276 }
277#endif
278
279 if (register_chrdev(SYNC_SERIAL_MAJOR, "sync serial",
280 &sync_serial_fops) < 0) {
281#if defined(CONFIG_ETRAX_SYNCHRONOUS_SERIAL_PORT1)
282 cris_free_io_interface(if_sync_serial_3);
283#endif
284#if defined(CONFIG_ETRAX_SYNCHRONOUS_SERIAL_PORT0)
285 cris_free_io_interface(if_sync_serial_1);
286#endif
287 printk("unable to get major for synchronous serial port\n");
288 return -EBUSY;
289 }
290
291 /* Deselect synchronous serial ports while configuring. */
292 SETS(gen_config_ii_shadow, R_GEN_CONFIG_II, sermode1, async);
293 SETS(gen_config_ii_shadow, R_GEN_CONFIG_II, sermode3, async);
294 *R_GEN_CONFIG_II = gen_config_ii_shadow;
295
296 /* Initialize Ports */
297#if defined(CONFIG_ETRAX_SYNCHRONOUS_SERIAL_PORT0)
298 ports[0].enabled = 1;
299 SETS(port_pb_i2c_shadow, R_PORT_PB_I2C, syncser1, ss1extra);
300 SETS(gen_config_ii_shadow, R_GEN_CONFIG_II, sermode1, sync);
301#if defined(CONFIG_ETRAX_SYNCHRONOUS_SERIAL0_DMA)
302 ports[0].use_dma = 1;
303#else
304 ports[0].use_dma = 0;
305#endif
306 initialize_port(0);
307#endif
308
309#if defined(CONFIG_ETRAX_SYNCHRONOUS_SERIAL_PORT1)
310 ports[1].enabled = 1;
311 SETS(port_pb_i2c_shadow, R_PORT_PB_I2C, syncser3, ss3extra);
312 SETS(gen_config_ii_shadow, R_GEN_CONFIG_II, sermode3, sync);
313#if defined(CONFIG_ETRAX_SYNCHRONOUS_SERIAL1_DMA)
314 ports[1].use_dma = 1;
315#else
316 ports[1].use_dma = 0;
317#endif
318 initialize_port(1);
319#endif
320
321 *R_PORT_PB_I2C = port_pb_i2c_shadow; /* Use PB4/PB7 */
322
323 /* Set up timing */
324 *R_SYNC_SERIAL_PRESCALE = sync_serial_prescale_shadow = (
325 IO_STATE(R_SYNC_SERIAL_PRESCALE, clk_sel_u1, codec) |
326 IO_STATE(R_SYNC_SERIAL_PRESCALE, word_stb_sel_u1, external) |
327 IO_STATE(R_SYNC_SERIAL_PRESCALE, clk_sel_u3, codec) |
328 IO_STATE(R_SYNC_SERIAL_PRESCALE, word_stb_sel_u3, external) |
329 IO_STATE(R_SYNC_SERIAL_PRESCALE, prescaler, div4) |
330 IO_FIELD(R_SYNC_SERIAL_PRESCALE, frame_rate,
331 DEFAULT_FRAME_RATE) |
332 IO_FIELD(R_SYNC_SERIAL_PRESCALE, word_rate, DEFAULT_WORD_RATE) |
333 IO_STATE(R_SYNC_SERIAL_PRESCALE, warp_mode, normal));
334
335 /* Select synchronous ports */
336 *R_GEN_CONFIG_II = gen_config_ii_shadow;
337
338 printk(KERN_INFO "ETRAX 100LX synchronous serial port driver\n");
339 return 0;
340}
341
342static void __init initialize_port(int portnbr)
343{
344 struct sync_port *port = &ports[portnbr];
345
346 DEBUG(printk(KERN_DEBUG "Init sync serial port %d\n", portnbr));
347
348 port->started = 0;
349 port->port_nbr = portnbr;
350 port->busy = 0;
351 port->tr_running = 0;
352
353 port->out_count = 0;
354 port->outp = port->out_buffer;
355
356 port->readp = port->flip;
357 port->writep = port->flip;
358 port->in_buffer_size = IN_BUFFER_SIZE;
359 port->inbufchunk = IN_DESCR_SIZE;
360 port->next_rx_desc = &port->in_descr[0];
361 port->prev_rx_desc = &port->in_descr[NUM_IN_DESCR-1];
362 port->prev_rx_desc->ctrl = d_eol;
363
364 init_waitqueue_head(&port->out_wait_q);
365 init_waitqueue_head(&port->in_wait_q);
366
367 port->ctrl_data_shadow =
368 IO_STATE(R_SYNC_SERIAL1_CTRL, tr_baud, c115k2Hz) |
369 IO_STATE(R_SYNC_SERIAL1_CTRL, mode, master_output) |
370 IO_STATE(R_SYNC_SERIAL1_CTRL, error, ignore) |
371 IO_STATE(R_SYNC_SERIAL1_CTRL, rec_enable, disable) |
372 IO_STATE(R_SYNC_SERIAL1_CTRL, f_synctype, normal) |
373 IO_STATE(R_SYNC_SERIAL1_CTRL, f_syncsize, word) |
374 IO_STATE(R_SYNC_SERIAL1_CTRL, f_sync, on) |
375 IO_STATE(R_SYNC_SERIAL1_CTRL, clk_mode, normal) |
376 IO_STATE(R_SYNC_SERIAL1_CTRL, clk_halt, stopped) |
377 IO_STATE(R_SYNC_SERIAL1_CTRL, bitorder, msb) |
378 IO_STATE(R_SYNC_SERIAL1_CTRL, tr_enable, disable) |
379 IO_STATE(R_SYNC_SERIAL1_CTRL, wordsize, size8bit) |
380 IO_STATE(R_SYNC_SERIAL1_CTRL, buf_empty, lmt_8) |
381 IO_STATE(R_SYNC_SERIAL1_CTRL, buf_full, lmt_8) |
382 IO_STATE(R_SYNC_SERIAL1_CTRL, flow_ctrl, enabled) |
383 IO_STATE(R_SYNC_SERIAL1_CTRL, clk_polarity, neg) |
384 IO_STATE(R_SYNC_SERIAL1_CTRL, frame_polarity, normal)|
385 IO_STATE(R_SYNC_SERIAL1_CTRL, status_polarity, inverted)|
386 IO_STATE(R_SYNC_SERIAL1_CTRL, clk_driver, normal) |
387 IO_STATE(R_SYNC_SERIAL1_CTRL, frame_driver, normal) |
388 IO_STATE(R_SYNC_SERIAL1_CTRL, status_driver, normal)|
389 IO_STATE(R_SYNC_SERIAL1_CTRL, def_out0, high);
390
391 if (port->use_dma)
392 port->ctrl_data_shadow |= IO_STATE(R_SYNC_SERIAL1_CTRL,
393 dma_enable, on);
394 else
395 port->ctrl_data_shadow |= IO_STATE(R_SYNC_SERIAL1_CTRL,
396 dma_enable, off);
397
398 *port->ctrl_data = port->ctrl_data_shadow;
399}
400
401static inline int sync_data_avail(struct sync_port *port)
402{
403 int avail;
404 unsigned char *start;
405 unsigned char *end;
406
407 start = (unsigned char *)port->readp; /* cast away volatile */
408 end = (unsigned char *)port->writep; /* cast away volatile */
409 /* 0123456789 0123456789
410 * ----- - -----
411 * ^rp ^wp ^wp ^rp
412 */
413 if (end >= start)
414 avail = end - start;
415 else
416 avail = port->in_buffer_size - (start - end);
417 return avail;
418}
419
420static inline int sync_data_avail_to_end(struct sync_port *port)
421{
422 int avail;
423 unsigned char *start;
424 unsigned char *end;
425
426 start = (unsigned char *)port->readp; /* cast away volatile */
427 end = (unsigned char *)port->writep; /* cast away volatile */
428 /* 0123456789 0123456789
429 * ----- -----
430 * ^rp ^wp ^wp ^rp
431 */
432
433 if (end >= start)
434 avail = end - start;
435 else
436 avail = port->flip + port->in_buffer_size - start;
437 return avail;
438}
439
440
441static int sync_serial_open(struct inode *inode, struct file *file)
442{
443 int dev = MINOR(inode->i_rdev);
444 struct sync_port *port;
445 int mode;
446
447 DEBUG(printk(KERN_DEBUG "Open sync serial port %d\n", dev));
448
449 if (dev < 0 || dev >= NUMBER_OF_PORTS || !ports[dev].enabled) {
450 DEBUG(printk(KERN_DEBUG "Invalid minor %d\n", dev));
451 return -ENODEV;
452 }
453 port = &ports[dev];
454 /* Allow open this device twice (assuming one reader and one writer) */
455 if (port->busy == 2) {
456 DEBUG(printk(KERN_DEBUG "Device is busy.. \n"));
457 return -EBUSY;
458 }
459 if (port->init_irqs) {
460 if (port->use_dma) {
461 if (port == &ports[0]) {
462#ifdef SYNC_SER_DMA
463 if (request_irq(24, tr_interrupt, 0,
464 "synchronous serial 1 dma tr",
465 &ports[0])) {
466 printk(KERN_CRIT "Can't alloc "
467 "sync serial port 1 IRQ");
468 return -EBUSY;
469 } else if (request_irq(25, rx_interrupt, 0,
470 "synchronous serial 1 dma rx",
471 &ports[0])) {
472 free_irq(24, &port[0]);
473 printk(KERN_CRIT "Can't alloc "
474 "sync serial port 1 IRQ");
475 return -EBUSY;
476 } else if (cris_request_dma(8,
477 "synchronous serial 1 dma tr",
478 DMA_VERBOSE_ON_ERROR,
479 dma_ser1)) {
480 free_irq(24, &port[0]);
481 free_irq(25, &port[0]);
482 printk(KERN_CRIT "Can't alloc "
483 "sync serial port 1 "
484 "TX DMA channel");
485 return -EBUSY;
486 } else if (cris_request_dma(9,
487 "synchronous serial 1 dma rec",
488 DMA_VERBOSE_ON_ERROR,
489 dma_ser1)) {
490 cris_free_dma(8, NULL);
491 free_irq(24, &port[0]);
492 free_irq(25, &port[0]);
493 printk(KERN_CRIT "Can't alloc "
494 "sync serial port 1 "
495 "RX DMA channel");
496 return -EBUSY;
497 }
498#endif
499 RESET_DMA(8); WAIT_DMA(8);
500 RESET_DMA(9); WAIT_DMA(9);
501 *R_DMA_CH8_CLR_INTR =
502 IO_STATE(R_DMA_CH8_CLR_INTR, clr_eop,
503 do) |
504 IO_STATE(R_DMA_CH8_CLR_INTR, clr_descr,
505 do);
506 *R_DMA_CH9_CLR_INTR =
507 IO_STATE(R_DMA_CH9_CLR_INTR, clr_eop,
508 do) |
509 IO_STATE(R_DMA_CH9_CLR_INTR, clr_descr,
510 do);
511 *R_IRQ_MASK2_SET =
512 IO_STATE(R_IRQ_MASK2_SET, dma8_eop,
513 set) |
514 IO_STATE(R_IRQ_MASK2_SET, dma9_descr,
515 set);
516 } else if (port == &ports[1]) {
517#ifdef SYNC_SER_DMA
518 if (request_irq(20, tr_interrupt, 0,
519 "synchronous serial 3 dma tr",
520 &ports[1])) {
521 printk(KERN_CRIT "Can't alloc "
522 "sync serial port 3 IRQ");
523 return -EBUSY;
524 } else if (request_irq(21, rx_interrupt, 0,
525 "synchronous serial 3 dma rx",
526 &ports[1])) {
527 free_irq(20, &ports[1]);
528 printk(KERN_CRIT "Can't alloc "
529 "sync serial port 3 IRQ");
530 return -EBUSY;
531 } else if (cris_request_dma(4,
532 "synchronous serial 3 dma tr",
533 DMA_VERBOSE_ON_ERROR,
534 dma_ser3)) {
535 free_irq(21, &ports[1]);
536 free_irq(20, &ports[1]);
537 printk(KERN_CRIT "Can't alloc "
538 "sync serial port 3 "
539 "TX DMA channel");
540 return -EBUSY;
541 } else if (cris_request_dma(5,
542 "synchronous serial 3 dma rec",
543 DMA_VERBOSE_ON_ERROR,
544 dma_ser3)) {
545 cris_free_dma(4, NULL);
546 free_irq(21, &ports[1]);
547 free_irq(20, &ports[1]);
548 printk(KERN_CRIT "Can't alloc "
549 "sync serial port 3 "
550 "RX DMA channel");
551 return -EBUSY;
552 }
553#endif
554 RESET_DMA(4); WAIT_DMA(4);
555 RESET_DMA(5); WAIT_DMA(5);
556 *R_DMA_CH4_CLR_INTR =
557 IO_STATE(R_DMA_CH4_CLR_INTR, clr_eop,
558 do) |
559 IO_STATE(R_DMA_CH4_CLR_INTR, clr_descr,
560 do);
561 *R_DMA_CH5_CLR_INTR =
562 IO_STATE(R_DMA_CH5_CLR_INTR, clr_eop,
563 do) |
564 IO_STATE(R_DMA_CH5_CLR_INTR, clr_descr,
565 do);
566 *R_IRQ_MASK2_SET =
567 IO_STATE(R_IRQ_MASK2_SET, dma4_eop,
568 set) |
569 IO_STATE(R_IRQ_MASK2_SET, dma5_descr,
570 set);
571 }
572 start_dma_in(port);
573 port->init_irqs = 0;
574 } else { /* !port->use_dma */
575#ifdef SYNC_SER_MANUAL
576 if (port == &ports[0]) {
577 if (request_irq(8,
578 manual_interrupt,
579 IRQF_SHARED | IRQF_DISABLED,
580 "synchronous serial manual irq",
581 &ports[0])) {
582 printk(KERN_CRIT "Can't alloc "
583 "sync serial manual irq");
584 return -EBUSY;
585 }
586 } else if (port == &ports[1]) {
587 if (request_irq(8,
588 manual_interrupt,
589 IRQF_SHARED | IRQF_DISABLED,
590 "synchronous serial manual irq",
591 &ports[1])) {
592 printk(KERN_CRIT "Can't alloc "
593 "sync serial manual irq");
594 return -EBUSY;
595 }
596 }
597 port->init_irqs = 0;
598#else
599 panic("sync_serial: Manual mode not supported.\n");
600#endif /* SYNC_SER_MANUAL */
601 }
602 } /* port->init_irqs */
603
604 port->busy++;
605 /* Start port if we use it as input */
606 mode = IO_EXTRACT(R_SYNC_SERIAL1_CTRL, mode, port->ctrl_data_shadow);
607 if (mode == IO_STATE_VALUE(R_SYNC_SERIAL1_CTRL, mode, master_input) ||
608 mode == IO_STATE_VALUE(R_SYNC_SERIAL1_CTRL, mode, slave_input) ||
609 mode == IO_STATE_VALUE(R_SYNC_SERIAL1_CTRL, mode, master_bidir) ||
610 mode == IO_STATE_VALUE(R_SYNC_SERIAL1_CTRL, mode, slave_bidir)) {
611 SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL, clk_halt,
612 running);
613 SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL, tr_enable,
614 enable);
615 SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL, rec_enable,
616 enable);
617 port->started = 1;
618 *port->ctrl_data = port->ctrl_data_shadow;
619 if (!port->use_dma)
620 *R_IRQ_MASK1_SET = 1 << port->data_avail_bit;
621 DEBUG(printk(KERN_DEBUG "sser%d rec started\n", dev));
622 }
623 return 0;
624}
625
626static int sync_serial_release(struct inode *inode, struct file *file)
627{
628 int dev = MINOR(inode->i_rdev);
629 struct sync_port *port;
630
631 if (dev < 0 || dev >= NUMBER_OF_PORTS || !ports[dev].enabled) {
632 DEBUG(printk(KERN_DEBUG "Invalid minor %d\n", dev));
633 return -ENODEV;
634 }
635 port = &ports[dev];
636 if (port->busy)
637 port->busy--;
638 if (!port->busy)
639 *R_IRQ_MASK1_CLR = ((1 << port->data_avail_bit) |
640 (1 << port->transmitter_ready_bit));
641
642 return 0;
643}
644
645
646
647static unsigned int sync_serial_poll(struct file *file, poll_table *wait)
648{
649 int dev = MINOR(file->f_dentry->d_inode->i_rdev);
650 unsigned int mask = 0;
651 struct sync_port *port;
652 DEBUGPOLL(static unsigned int prev_mask = 0);
653
654 port = &ports[dev];
655 poll_wait(file, &port->out_wait_q, wait);
656 poll_wait(file, &port->in_wait_q, wait);
657 /* Some room to write */
658 if (port->out_count < OUT_BUFFER_SIZE)
659 mask |= POLLOUT | POLLWRNORM;
660 /* At least an inbufchunk of data */
661 if (sync_data_avail(port) >= port->inbufchunk)
662 mask |= POLLIN | POLLRDNORM;
663
664 DEBUGPOLL(if (mask != prev_mask)
665 printk(KERN_DEBUG "sync_serial_poll: mask 0x%08X %s %s\n",
666 mask,
667 mask & POLLOUT ? "POLLOUT" : "",
668 mask & POLLIN ? "POLLIN" : "");
669 prev_mask = mask;
670 );
671 return mask;
672}
673
674static int sync_serial_ioctl(struct inode *inode, struct file *file,
675 unsigned int cmd, unsigned long arg)
676{
677 int return_val = 0;
678 unsigned long flags;
679
680 int dev = MINOR(file->f_dentry->d_inode->i_rdev);
681 struct sync_port *port;
682
683 if (dev < 0 || dev >= NUMBER_OF_PORTS || !ports[dev].enabled) {
684 DEBUG(printk(KERN_DEBUG "Invalid minor %d\n", dev));
685 return -1;
686 }
687 port = &ports[dev];
688
689 local_irq_save(flags);
690 /* Disable port while changing config */
691 if (dev) {
692 if (port->use_dma) {
693 RESET_DMA(4); WAIT_DMA(4);
694 port->tr_running = 0;
695 port->out_count = 0;
696 port->outp = port->out_buffer;
697 *R_DMA_CH4_CLR_INTR =
698 IO_STATE(R_DMA_CH4_CLR_INTR, clr_eop, do) |
699 IO_STATE(R_DMA_CH4_CLR_INTR, clr_descr, do);
700 }
701 SETS(gen_config_ii_shadow, R_GEN_CONFIG_II, sermode3, async);
702 } else {
703 if (port->use_dma) {
704 RESET_DMA(8); WAIT_DMA(8);
705 port->tr_running = 0;
706 port->out_count = 0;
707 port->outp = port->out_buffer;
708 *R_DMA_CH8_CLR_INTR =
709 IO_STATE(R_DMA_CH8_CLR_INTR, clr_eop, do) |
710 IO_STATE(R_DMA_CH8_CLR_INTR, clr_descr, do);
711 }
712 SETS(gen_config_ii_shadow, R_GEN_CONFIG_II, sermode1, async);
713 }
714 *R_GEN_CONFIG_II = gen_config_ii_shadow;
715 local_irq_restore(flags);
716
717 switch (cmd) {
718 case SSP_SPEED:
719 if (GET_SPEED(arg) == CODEC) {
720 if (dev)
721 SETS(sync_serial_prescale_shadow,
722 R_SYNC_SERIAL_PRESCALE, clk_sel_u3,
723 codec);
724 else
725 SETS(sync_serial_prescale_shadow,
726 R_SYNC_SERIAL_PRESCALE, clk_sel_u1,
727 codec);
728
729 SETF(sync_serial_prescale_shadow,
730 R_SYNC_SERIAL_PRESCALE, prescaler,
731 GET_FREQ(arg));
732 SETF(sync_serial_prescale_shadow,
733 R_SYNC_SERIAL_PRESCALE, frame_rate,
734 GET_FRAME_RATE(arg));
735 SETF(sync_serial_prescale_shadow,
736 R_SYNC_SERIAL_PRESCALE, word_rate,
737 GET_WORD_RATE(arg));
738 } else {
739 SETF(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL,
740 tr_baud, GET_SPEED(arg));
741 if (dev)
742 SETS(sync_serial_prescale_shadow,
743 R_SYNC_SERIAL_PRESCALE, clk_sel_u3,
744 baudrate);
745 else
746 SETS(sync_serial_prescale_shadow,
747 R_SYNC_SERIAL_PRESCALE, clk_sel_u1,
748 baudrate);
749 }
750 break;
751 case SSP_MODE:
752 if (arg > 5)
753 return -EINVAL;
754 if (arg == MASTER_OUTPUT || arg == SLAVE_OUTPUT)
755 *R_IRQ_MASK1_CLR = 1 << port->data_avail_bit;
756 else if (!port->use_dma)
757 *R_IRQ_MASK1_SET = 1 << port->data_avail_bit;
758 SETF(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL, mode, arg);
759 break;
760 case SSP_FRAME_SYNC:
761 if (arg & NORMAL_SYNC)
762 SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL,
763 f_synctype, normal);
764 else if (arg & EARLY_SYNC)
765 SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL,
766 f_synctype, early);
767
768 if (arg & BIT_SYNC)
769 SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL,
770 f_syncsize, bit);
771 else if (arg & WORD_SYNC)
772 SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL,
773 f_syncsize, word);
774 else if (arg & EXTENDED_SYNC)
775 SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL,
776 f_syncsize, extended);
777
778 if (arg & SYNC_ON)
779 SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL,
780 f_sync, on);
781 else if (arg & SYNC_OFF)
782 SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL,
783 f_sync, off);
784
785 if (arg & WORD_SIZE_8)
786 SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL,
787 wordsize, size8bit);
788 else if (arg & WORD_SIZE_12)
789 SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL,
790 wordsize, size12bit);
791 else if (arg & WORD_SIZE_16)
792 SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL,
793 wordsize, size16bit);
794 else if (arg & WORD_SIZE_24)
795 SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL,
796 wordsize, size24bit);
797 else if (arg & WORD_SIZE_32)
798 SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL,
799 wordsize, size32bit);
800
801 if (arg & BIT_ORDER_MSB)
802 SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL,
803 bitorder, msb);
804 else if (arg & BIT_ORDER_LSB)
805 SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL,
806 bitorder, lsb);
807
808 if (arg & FLOW_CONTROL_ENABLE)
809 SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL,
810 flow_ctrl, enabled);
811 else if (arg & FLOW_CONTROL_DISABLE)
812 SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL,
813 flow_ctrl, disabled);
814
815 if (arg & CLOCK_NOT_GATED)
816 SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL,
817 clk_mode, normal);
818 else if (arg & CLOCK_GATED)
819 SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL,
820 clk_mode, gated);
821
822 break;
823 case SSP_IPOLARITY:
824 /* NOTE!! negedge is considered NORMAL */
825 if (arg & CLOCK_NORMAL)
826 SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL,
827 clk_polarity, neg);
828 else if (arg & CLOCK_INVERT)
829 SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL,
830 clk_polarity, pos);
831
832 if (arg & FRAME_NORMAL)
833 SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL,
834 frame_polarity, normal);
835 else if (arg & FRAME_INVERT)
836 SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL,
837 frame_polarity, inverted);
838
839 if (arg & STATUS_NORMAL)
840 SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL,
841 status_polarity, normal);
842 else if (arg & STATUS_INVERT)
843 SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL,
844 status_polarity, inverted);
845 break;
846 case SSP_OPOLARITY:
847 if (arg & CLOCK_NORMAL)
848 SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL,
849 clk_driver, normal);
850 else if (arg & CLOCK_INVERT)
851 SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL,
852 clk_driver, inverted);
853
854 if (arg & FRAME_NORMAL)
855 SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL,
856 frame_driver, normal);
857 else if (arg & FRAME_INVERT)
858 SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL,
859 frame_driver, inverted);
860
861 if (arg & STATUS_NORMAL)
862 SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL,
863 status_driver, normal);
864 else if (arg & STATUS_INVERT)
865 SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL,
866 status_driver, inverted);
867 break;
868 case SSP_SPI:
869 SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL, flow_ctrl,
870 disabled);
871 SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL, bitorder,
872 msb);
873 SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL, wordsize,
874 size8bit);
875 SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL, f_sync, on);
876 SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL, f_syncsize,
877 word);
878 SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL, f_synctype,
879 normal);
880 if (arg & SPI_SLAVE) {
881 SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL,
882 frame_polarity, inverted);
883 SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL,
884 clk_polarity, neg);
885 SETF(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL,
886 mode, SLAVE_INPUT);
887 } else {
888 SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL,
889 frame_driver, inverted);
890 SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL,
891 clk_driver, inverted);
892 SETF(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL,
893 mode, MASTER_OUTPUT);
894 }
895 break;
896 case SSP_INBUFCHUNK:
897#if 0
898 if (arg > port->in_buffer_size/NUM_IN_DESCR)
899 return -EINVAL;
900 port->inbufchunk = arg;
901 /* Make sure in_buffer_size is a multiple of inbufchunk */
902 port->in_buffer_size =
903 (port->in_buffer_size/port->inbufchunk) *
904 port->inbufchunk;
905 DEBUG(printk(KERN_DEBUG "inbufchunk %i in_buffer_size: %i\n",
906 port->inbufchunk, port->in_buffer_size));
907 if (port->use_dma) {
908 if (port->port_nbr == 0) {
909 RESET_DMA(9);
910 WAIT_DMA(9);
911 } else {
912 RESET_DMA(5);
913 WAIT_DMA(5);
914 }
915 start_dma_in(port);
916 }
917#endif
918 break;
919 default:
920 return_val = -1;
921 }
922 /* Make sure we write the config without interruption */
923 local_irq_save(flags);
924 /* Set config and enable port */
925 *port->ctrl_data = port->ctrl_data_shadow;
926 nop(); nop(); nop(); nop();
927 *R_SYNC_SERIAL_PRESCALE = sync_serial_prescale_shadow;
928 nop(); nop(); nop(); nop();
929 if (dev)
930 SETS(gen_config_ii_shadow, R_GEN_CONFIG_II, sermode3, sync);
931 else
932 SETS(gen_config_ii_shadow, R_GEN_CONFIG_II, sermode1, sync);
933
934 *R_GEN_CONFIG_II = gen_config_ii_shadow;
935 /* Reset DMA. At readout from serial port the data could be shifted
936 * one byte if not resetting DMA.
937 */
938 if (port->use_dma) {
939 if (port->port_nbr == 0) {
940 RESET_DMA(9);
941 WAIT_DMA(9);
942 } else {
943 RESET_DMA(5);
944 WAIT_DMA(5);
945 }
946 start_dma_in(port);
947 }
948 local_irq_restore(flags);
949 return return_val;
950}
951
952
953static ssize_t sync_serial_write(struct file *file, const char *buf,
954 size_t count, loff_t *ppos)
955{
956 int dev = MINOR(file->f_dentry->d_inode->i_rdev);
957 DECLARE_WAITQUEUE(wait, current);
958 struct sync_port *port;
959 unsigned long flags;
960 unsigned long c, c1;
961 unsigned long free_outp;
962 unsigned long outp;
963 unsigned long out_buffer;
964
965 if (dev < 0 || dev >= NUMBER_OF_PORTS || !ports[dev].enabled) {
966 DEBUG(printk(KERN_DEBUG "Invalid minor %d\n", dev));
967 return -ENODEV;
968 }
969 port = &ports[dev];
970
971 DEBUGWRITE(printk(KERN_DEBUG "W d%d c %lu (%d/%d)\n",
972 port->port_nbr, count, port->out_count, OUT_BUFFER_SIZE));
973 /* Space to end of buffer */
974 /*
975 * out_buffer <c1>012345<- c ->OUT_BUFFER_SIZE
976 * outp^ +out_count
977 * ^free_outp
978 * out_buffer 45<- c ->0123OUT_BUFFER_SIZE
979 * +out_count outp^
980 * free_outp
981 *
982 */
983
984 /* Read variables that may be updated by interrupts */
985 local_irq_save(flags);
986 if (count > OUT_BUFFER_SIZE - port->out_count)
987 count = OUT_BUFFER_SIZE - port->out_count;
988
989 outp = (unsigned long)port->outp;
990 free_outp = outp + port->out_count;
991 local_irq_restore(flags);
992 out_buffer = (unsigned long)port->out_buffer;
993
994 /* Find out where and how much to write */
995 if (free_outp >= out_buffer + OUT_BUFFER_SIZE)
996 free_outp -= OUT_BUFFER_SIZE;
997 if (free_outp >= outp)
998 c = out_buffer + OUT_BUFFER_SIZE - free_outp;
999 else
1000 c = outp - free_outp;
1001 if (c > count)
1002 c = count;
1003
1004 DEBUGWRITE(printk(KERN_DEBUG "w op %08lX fop %08lX c %lu\n",
1005 outp, free_outp, c));
1006 if (copy_from_user((void *)free_outp, buf, c))
1007 return -EFAULT;
1008
1009 if (c != count) {
1010 buf += c;
1011 c1 = count - c;
1012 DEBUGWRITE(printk(KERN_DEBUG "w2 fi %lu c %lu c1 %lu\n",
1013 free_outp-out_buffer, c, c1));
1014 if (copy_from_user((void *)out_buffer, buf, c1))
1015 return -EFAULT;
1016 }
1017 local_irq_save(flags);
1018 port->out_count += count;
1019 local_irq_restore(flags);
1020
1021 /* Make sure transmitter/receiver is running */
1022 if (!port->started) {
1023 SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL, clk_halt,
1024 running);
1025 SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL, tr_enable,
1026 enable);
1027 SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL, rec_enable,
1028 enable);
1029 port->started = 1;
1030 }
1031
1032 *port->ctrl_data = port->ctrl_data_shadow;
1033
1034 if (file->f_flags & O_NONBLOCK) {
1035 local_irq_save(flags);
1036 if (!port->tr_running) {
1037 if (!port->use_dma) {
1038 /* Start sender by writing data */
1039 send_word(port);
1040 /* and enable transmitter ready IRQ */
1041 *R_IRQ_MASK1_SET = 1 <<
1042 port->transmitter_ready_bit;
1043 } else
1044 start_dma(port,
1045 (unsigned char *volatile)port->outp, c);
1046 }
1047 local_irq_restore(flags);
1048 DEBUGWRITE(printk(KERN_DEBUG "w d%d c %lu NB\n",
1049 port->port_nbr, count));
1050 return count;
1051 }
1052
1053 /* Sleep until all sent */
1054 add_wait_queue(&port->out_wait_q, &wait);
1055 set_current_state(TASK_INTERRUPTIBLE);
1056 local_irq_save(flags);
1057 if (!port->tr_running) {
1058 if (!port->use_dma) {
1059 /* Start sender by writing data */
1060 send_word(port);
1061 /* and enable transmitter ready IRQ */
1062 *R_IRQ_MASK1_SET = 1 << port->transmitter_ready_bit;
1063 } else
1064 start_dma(port, port->outp, c);
1065 }
1066 local_irq_restore(flags);
1067 schedule();
1068 set_current_state(TASK_RUNNING);
1069 remove_wait_queue(&port->out_wait_q, &wait);
1070 if (signal_pending(current))
1071 return -EINTR;
1072
1073 DEBUGWRITE(printk(KERN_DEBUG "w d%d c %lu\n", port->port_nbr, count));
1074 return count;
1075}
1076
1077static ssize_t sync_serial_read(struct file *file, char *buf,
1078 size_t count, loff_t *ppos)
1079{
1080 int dev = MINOR(file->f_dentry->d_inode->i_rdev);
1081 int avail;
1082 struct sync_port *port;
1083 unsigned char *start;
1084 unsigned char *end;
1085 unsigned long flags;
1086
1087 if (dev < 0 || dev >= NUMBER_OF_PORTS || !ports[dev].enabled) {
1088 DEBUG(printk(KERN_DEBUG "Invalid minor %d\n", dev));
1089 return -ENODEV;
1090 }
1091 port = &ports[dev];
1092
1093 DEBUGREAD(printk(KERN_DEBUG "R%d c %d ri %lu wi %lu /%lu\n",
1094 dev, count, port->readp - port->flip,
1095 port->writep - port->flip, port->in_buffer_size));
1096
1097 if (!port->started) {
1098 SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL, clk_halt,
1099 running);
1100 SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL, tr_enable,
1101 enable);
1102 SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL, rec_enable,
1103 enable);
1104 port->started = 1;
1105 }
1106 *port->ctrl_data = port->ctrl_data_shadow;
1107
1108 /* Calculate number of available bytes */
1109 /* Save pointers to avoid that they are modified by interrupt */
1110 local_irq_save(flags);
1111 start = (unsigned char *)port->readp; /* cast away volatile */
1112 end = (unsigned char *)port->writep; /* cast away volatile */
1113 local_irq_restore(flags);
1114 while (start == end && !port->full) {
1115 /* No data */
1116 if (file->f_flags & O_NONBLOCK)
1117 return -EAGAIN;
1118
1119 interruptible_sleep_on(&port->in_wait_q);
1120 if (signal_pending(current))
1121 return -EINTR;
1122
1123 local_irq_save(flags);
1124 start = (unsigned char *)port->readp; /* cast away volatile */
1125 end = (unsigned char *)port->writep; /* cast away volatile */
1126 local_irq_restore(flags);
1127 }
1128
1129 /* Lazy read, never return wrapped data. */
1130 if (port->full)
1131 avail = port->in_buffer_size;
1132 else if (end > start)
1133 avail = end - start;
1134 else
1135 avail = port->flip + port->in_buffer_size - start;
1136
1137 count = count > avail ? avail : count;
1138 if (copy_to_user(buf, start, count))
1139 return -EFAULT;
1140 /* Disable interrupts while updating readp */
1141 local_irq_save(flags);
1142 port->readp += count;
1143 if (port->readp >= port->flip + port->in_buffer_size) /* Wrap? */
1144 port->readp = port->flip;
1145 port->full = 0;
1146 local_irq_restore(flags);
1147 DEBUGREAD(printk(KERN_DEBUG "r %d\n", count));
1148 return count;
1149}
1150
1151static void send_word(struct sync_port *port)
1152{
1153 switch (IO_EXTRACT(R_SYNC_SERIAL1_CTRL, wordsize,
1154 port->ctrl_data_shadow)) {
1155 case IO_STATE_VALUE(R_SYNC_SERIAL1_CTRL, wordsize, size8bit):
1156 port->out_count--;
1157 *port->data_out = *port->outp++;
1158 if (port->outp >= port->out_buffer + OUT_BUFFER_SIZE)
1159 port->outp = port->out_buffer;
1160 break;
1161 case IO_STATE_VALUE(R_SYNC_SERIAL1_CTRL, wordsize, size12bit):
1162 {
1163 int data = (*port->outp++) << 8;
1164 data |= *port->outp++;
1165 port->out_count -= 2;
1166 *port->data_out = data;
1167 if (port->outp >= port->out_buffer + OUT_BUFFER_SIZE)
1168 port->outp = port->out_buffer;
1169 break;
1170 }
1171 case IO_STATE_VALUE(R_SYNC_SERIAL1_CTRL, wordsize, size16bit):
1172 port->out_count -= 2;
1173 *port->data_out = *(unsigned short *)port->outp;
1174 port->outp += 2;
1175 if (port->outp >= port->out_buffer + OUT_BUFFER_SIZE)
1176 port->outp = port->out_buffer;
1177 break;
1178 case IO_STATE_VALUE(R_SYNC_SERIAL1_CTRL, wordsize, size24bit):
1179 port->out_count -= 3;
1180 *port->data_out = *(unsigned int *)port->outp;
1181 port->outp += 3;
1182 if (port->outp >= port->out_buffer + OUT_BUFFER_SIZE)
1183 port->outp = port->out_buffer;
1184 break;
1185 case IO_STATE_VALUE(R_SYNC_SERIAL1_CTRL, wordsize, size32bit):
1186 port->out_count -= 4;
1187 *port->data_out = *(unsigned int *)port->outp;
1188 port->outp += 4;
1189 if (port->outp >= port->out_buffer + OUT_BUFFER_SIZE)
1190 port->outp = port->out_buffer;
1191 break;
1192 }
1193}
1194
1195
1196static void start_dma(struct sync_port *port, const char *data, int count)
1197{
1198 port->tr_running = 1;
1199 port->out_descr.hw_len = 0;
1200 port->out_descr.next = 0;
1201 port->out_descr.ctrl = d_eol | d_eop; /* No d_wait to avoid glitches */
1202 port->out_descr.sw_len = count;
1203 port->out_descr.buf = virt_to_phys(data);
1204 port->out_descr.status = 0;
1205
1206 *port->output_dma_first = virt_to_phys(&port->out_descr);
1207 *port->output_dma_cmd = IO_STATE(R_DMA_CH0_CMD, cmd, start);
1208 DEBUGTXINT(printk(KERN_DEBUG "dma %08lX c %d\n",
1209 (unsigned long)data, count));
1210}
1211
1212static void start_dma_in(struct sync_port *port)
1213{
1214 int i;
1215 unsigned long buf;
1216 port->writep = port->flip;
1217
1218 if (port->writep > port->flip + port->in_buffer_size) {
1219 panic("Offset too large in sync serial driver\n");
1220 return;
1221 }
1222 buf = virt_to_phys(port->in_buffer);
1223 for (i = 0; i < NUM_IN_DESCR; i++) {
1224 port->in_descr[i].sw_len = port->inbufchunk;
1225 port->in_descr[i].ctrl = d_int;
1226 port->in_descr[i].next = virt_to_phys(&port->in_descr[i+1]);
1227 port->in_descr[i].buf = buf;
1228 port->in_descr[i].hw_len = 0;
1229 port->in_descr[i].status = 0;
1230 port->in_descr[i].fifo_len = 0;
1231 buf += port->inbufchunk;
1232 prepare_rx_descriptor(&port->in_descr[i]);
1233 }
1234 /* Link the last descriptor to the first */
1235 port->in_descr[i-1].next = virt_to_phys(&port->in_descr[0]);
1236 port->in_descr[i-1].ctrl |= d_eol;
1237 port->next_rx_desc = &port->in_descr[0];
1238 port->prev_rx_desc = &port->in_descr[NUM_IN_DESCR - 1];
1239 *port->input_dma_first = virt_to_phys(port->next_rx_desc);
1240 *port->input_dma_cmd = IO_STATE(R_DMA_CH0_CMD, cmd, start);
1241}
1242
1243#ifdef SYNC_SER_DMA
1244static irqreturn_t tr_interrupt(int irq, void *dev_id)
1245{
1246 unsigned long ireg = *R_IRQ_MASK2_RD;
1247 struct etrax_dma_descr *descr;
1248 unsigned int sentl;
1249 int handled = 0;
1250 int i;
1251
1252 for (i = 0; i < NUMBER_OF_PORTS; i++) {
1253 struct sync_port *port = &ports[i];
1254 if (!port->enabled || !port->use_dma)
1255 continue;
1256
1257 /* IRQ active for the port? */
1258 if (!(ireg & (1 << port->output_dma_bit)))
1259 continue;
1260
1261 handled = 1;
1262
1263 /* Clear IRQ */
1264 *port->output_dma_clr_irq =
1265 IO_STATE(R_DMA_CH0_CLR_INTR, clr_eop, do) |
1266 IO_STATE(R_DMA_CH0_CLR_INTR, clr_descr, do);
1267
1268 descr = &port->out_descr;
1269 if (!(descr->status & d_stop))
1270 sentl = descr->sw_len;
1271 else
1272 /* Otherwise find amount of data sent here */
1273 sentl = descr->hw_len;
1274
1275 port->out_count -= sentl;
1276 port->outp += sentl;
1277 if (port->outp >= port->out_buffer + OUT_BUFFER_SIZE)
1278 port->outp = port->out_buffer;
1279 if (port->out_count) {
1280 int c = port->out_buffer + OUT_BUFFER_SIZE - port->outp;
1281 if (c > port->out_count)
1282 c = port->out_count;
1283 DEBUGTXINT(printk(KERN_DEBUG
1284 "tx_int DMAWRITE %i %i\n", sentl, c));
1285 start_dma(port, port->outp, c);
1286 } else {
1287 DEBUGTXINT(printk(KERN_DEBUG
1288 "tx_int DMA stop %i\n", sentl));
1289 port->tr_running = 0;
1290 }
1291 /* wake up the waiting process */
1292 wake_up_interruptible(&port->out_wait_q);
1293 }
1294 return IRQ_RETVAL(handled);
1295} /* tr_interrupt */
1296
1297static irqreturn_t rx_interrupt(int irq, void *dev_id)
1298{
1299 unsigned long ireg = *R_IRQ_MASK2_RD;
1300 int i;
1301 int handled = 0;
1302
1303 for (i = 0; i < NUMBER_OF_PORTS; i++) {
1304 struct sync_port *port = &ports[i];
1305
1306 if (!port->enabled || !port->use_dma)
1307 continue;
1308
1309 if (!(ireg & (1 << port->input_dma_descr_bit)))
1310 continue;
1311
1312 /* Descriptor interrupt */
1313 handled = 1;
1314 while (*port->input_dma_descr !=
1315 virt_to_phys(port->next_rx_desc)) {
1316 if (port->writep + port->inbufchunk > port->flip +
1317 port->in_buffer_size) {
1318 int first_size = port->flip +
1319 port->in_buffer_size - port->writep;
1320 memcpy(port->writep,
1321 phys_to_virt(port->next_rx_desc->buf),
1322 first_size);
1323 memcpy(port->flip,
1324 phys_to_virt(port->next_rx_desc->buf +
1325 first_size),
1326 port->inbufchunk - first_size);
1327 port->writep = port->flip +
1328 port->inbufchunk - first_size;
1329 } else {
1330 memcpy(port->writep,
1331 phys_to_virt(port->next_rx_desc->buf),
1332 port->inbufchunk);
1333 port->writep += port->inbufchunk;
1334 if (port->writep >= port->flip
1335 + port->in_buffer_size)
1336 port->writep = port->flip;
1337 }
1338 if (port->writep == port->readp)
1339 port->full = 1;
1340 prepare_rx_descriptor(port->next_rx_desc);
1341 port->next_rx_desc->ctrl |= d_eol;
1342 port->prev_rx_desc->ctrl &= ~d_eol;
1343 port->prev_rx_desc = phys_to_virt((unsigned)
1344 port->next_rx_desc);
1345 port->next_rx_desc = phys_to_virt((unsigned)
1346 port->next_rx_desc->next);
1347 /* Wake up the waiting process */
1348 wake_up_interruptible(&port->in_wait_q);
1349 *port->input_dma_cmd = IO_STATE(R_DMA_CH1_CMD,
1350 cmd, restart);
1351 /* DMA has reached end of descriptor */
1352 *port->input_dma_clr_irq = IO_STATE(R_DMA_CH0_CLR_INTR,
1353 clr_descr, do);
1354 }
1355 }
1356 return IRQ_RETVAL(handled);
1357} /* rx_interrupt */
1358#endif /* SYNC_SER_DMA */
1359
1360#ifdef SYNC_SER_MANUAL
1361static irqreturn_t manual_interrupt(int irq, void *dev_id)
1362{
1363 int i;
1364 int handled = 0;
1365
1366 for (i = 0; i < NUMBER_OF_PORTS; i++) {
1367 struct sync_port *port = &ports[i];
1368
1369 if (!port->enabled || port->use_dma)
1370 continue;
1371
1372 /* Data received? */
1373 if (*R_IRQ_MASK1_RD & (1 << port->data_avail_bit)) {
1374 handled = 1;
1375 /* Read data */
1376 switch (port->ctrl_data_shadow &
1377 IO_MASK(R_SYNC_SERIAL1_CTRL, wordsize)) {
1378 case IO_STATE(R_SYNC_SERIAL1_CTRL, wordsize, size8bit):
1379 *port->writep++ =
1380 *(volatile char *)port->data_in;
1381 break;
1382 case IO_STATE(R_SYNC_SERIAL1_CTRL, wordsize, size12bit):
1383 {
1384 int data = *(unsigned short *)port->data_in;
1385 *port->writep = (data & 0x0ff0) >> 4;
1386 *(port->writep + 1) = data & 0x0f;
1387 port->writep += 2;
1388 break;
1389 }
1390 case IO_STATE(R_SYNC_SERIAL1_CTRL, wordsize, size16bit):
1391 *(unsigned short *)port->writep =
1392 *(volatile unsigned short *)port->data_in;
1393 port->writep += 2;
1394 break;
1395 case IO_STATE(R_SYNC_SERIAL1_CTRL, wordsize, size24bit):
1396 *(unsigned int *)port->writep = *port->data_in;
1397 port->writep += 3;
1398 break;
1399 case IO_STATE(R_SYNC_SERIAL1_CTRL, wordsize, size32bit):
1400 *(unsigned int *)port->writep = *port->data_in;
1401 port->writep += 4;
1402 break;
1403 }
1404
1405 /* Wrap? */
1406 if (port->writep >= port->flip + port->in_buffer_size)
1407 port->writep = port->flip;
1408 if (port->writep == port->readp) {
1409 /* Receive buffer overrun, discard oldest */
1410 port->readp++;
1411 /* Wrap? */
1412 if (port->readp >= port->flip +
1413 port->in_buffer_size)
1414 port->readp = port->flip;
1415 }
1416 if (sync_data_avail(port) >= port->inbufchunk) {
1417 /* Wake up application */
1418 wake_up_interruptible(&port->in_wait_q);
1419 }
1420 }
1421
1422 /* Transmitter ready? */
1423 if (*R_IRQ_MASK1_RD & (1 << port->transmitter_ready_bit)) {
1424 if (port->out_count > 0) {
1425 /* More data to send */
1426 send_word(port);
1427 } else {
1428 /* Transmission finished */
1429 /* Turn off IRQ */
1430 *R_IRQ_MASK1_CLR = 1 <<
1431 port->transmitter_ready_bit;
1432 /* Wake up application */
1433 wake_up_interruptible(&port->out_wait_q);
1434 }
1435 }
1436 }
1437 return IRQ_RETVAL(handled);
1438}
1439#endif
1440
1441module_init(etrax_sync_serial_init);
diff --git a/arch/cris/arch-v10/kernel/debugport.c b/arch/cris/arch-v10/kernel/debugport.c
index 93679a48c791..04d5eee2c90c 100644
--- a/arch/cris/arch-v10/kernel/debugport.c
+++ b/arch/cris/arch-v10/kernel/debugport.c
@@ -1,6 +1,6 @@
1/* Serialport functions for debugging 1/* Serialport functions for debugging
2 * 2 *
3 * Copyright (c) 2000 Axis Communications AB 3 * Copyright (c) 2000-2007 Axis Communications AB
4 * 4 *
5 * Authors: Bjorn Wesen 5 * Authors: Bjorn Wesen
6 * 6 *
@@ -11,96 +11,6 @@
11 * enableDebugIRQ() 11 * enableDebugIRQ()
12 * init_etrax_debug() 12 * init_etrax_debug()
13 * 13 *
14 * $Log: debugport.c,v $
15 * Revision 1.27 2005/06/10 10:34:14 starvik
16 * Real console support
17 *
18 * Revision 1.26 2005/06/07 07:06:07 starvik
19 * Added LF->CR translation to make ETRAX customers happy.
20 *
21 * Revision 1.25 2005/03/08 08:56:47 mikaelam
22 * Do only set index as port->index if port is defined, otherwise use the index from the command line
23 *
24 * Revision 1.24 2005/01/19 10:26:33 mikaelam
25 * Return the cris serial driver in console device driver callback function
26 *
27 * Revision 1.23 2005/01/14 10:12:17 starvik
28 * KGDB on separate port.
29 * Console fixes from 2.4.
30 *
31 * Revision 1.22 2005/01/11 16:06:13 starvik
32 * typo
33 *
34 * Revision 1.21 2005/01/11 13:49:14 starvik
35 * Added raw_printk to be used where we don't trust the console.
36 *
37 * Revision 1.20 2004/12/27 11:18:32 starvik
38 * Merge of Linux 2.6.10 (not functional yet).
39 *
40 * Revision 1.19 2004/10/21 07:26:16 starvik
41 * Made it possible to specify console settings on kernel command line.
42 *
43 * Revision 1.18 2004/10/19 13:07:37 starvik
44 * Merge of Linux 2.6.9
45 *
46 * Revision 1.17 2004/09/29 10:33:46 starvik
47 * Resolved a dealock when printing debug from kernel.
48 *
49 * Revision 1.16 2004/08/24 06:12:19 starvik
50 * Whitespace cleanup
51 *
52 * Revision 1.15 2004/08/16 12:37:19 starvik
53 * Merge of Linux 2.6.8
54 *
55 * Revision 1.14 2004/05/17 13:11:29 starvik
56 * Disable DMA until real serial driver is up
57 *
58 * Revision 1.13 2004/05/14 07:58:01 starvik
59 * Merge of changes from 2.4
60 *
61 * Revision 1.12 2003/09/11 07:29:49 starvik
62 * Merge of Linux 2.6.0-test5
63 *
64 * Revision 1.11 2003/07/07 09:53:36 starvik
65 * Revert all the 2.5.74 merge changes to make the console work again
66 *
67 * Revision 1.9 2003/02/17 17:07:23 starvik
68 * Solved the problem with corrupted debug output (from Linux 2.4)
69 * * Wait until DMA, FIFO and pipe is empty before and after transmissions
70 * * Buffer data until a FIFO flush can be triggered.
71 *
72 * Revision 1.8 2003/01/22 06:48:36 starvik
73 * Fixed warnings issued by GCC 3.2.1
74 *
75 * Revision 1.7 2002/12/12 08:26:32 starvik
76 * Don't use C-comments inside CVS comments
77 *
78 * Revision 1.6 2002/12/11 15:42:02 starvik
79 * Extracted v10 (ETRAX 100LX) specific stuff from arch/cris/kernel/
80 *
81 * Revision 1.5 2002/11/20 06:58:03 starvik
82 * Compiles with kgdb
83 *
84 * Revision 1.4 2002/11/19 14:35:24 starvik
85 * Changes from linux 2.4
86 * Changed struct initializer syntax to the currently preferred notation
87 *
88 * Revision 1.3 2002/11/06 09:47:03 starvik
89 * Modified for new interrupt macros
90 *
91 * Revision 1.2 2002/01/21 15:21:50 bjornw
92 * Update for kdev_t changes
93 *
94 * Revision 1.6 2001/04/17 13:58:39 orjanf
95 * * Renamed CONFIG_KGDB to CONFIG_ETRAX_KGDB.
96 *
97 * Revision 1.5 2001/03/26 14:22:05 bjornw
98 * Namechange of some config options
99 *
100 * Revision 1.4 2000/10/06 12:37:26 bjornw
101 * Use physical addresses when talking to DMA
102 *
103 *
104 */ 14 */
105 15
106#include <linux/console.h> 16#include <linux/console.h>
@@ -112,6 +22,8 @@
112#include <asm/arch/svinto.h> 22#include <asm/arch/svinto.h>
113#include <asm/io.h> /* Get SIMCOUT. */ 23#include <asm/io.h> /* Get SIMCOUT. */
114 24
25extern void reset_watchdog(void);
26
115struct dbg_port 27struct dbg_port
116{ 28{
117 unsigned int index; 29 unsigned int index;
@@ -188,7 +100,9 @@ struct dbg_port ports[]=
188 } 100 }
189}; 101};
190 102
103#ifdef CONFIG_ETRAX_SERIAL
191extern struct tty_driver *serial_driver; 104extern struct tty_driver *serial_driver;
105#endif
192 106
193struct dbg_port* port = 107struct dbg_port* port =
194#if defined(CONFIG_ETRAX_DEBUG_PORT0) 108#if defined(CONFIG_ETRAX_DEBUG_PORT0)
@@ -368,11 +282,12 @@ console_write_direct(struct console *co, const char *buf, unsigned int len)
368{ 282{
369 int i; 283 int i;
370 unsigned long flags; 284 unsigned long flags;
371 local_irq_save(flags);
372 285
373 if (!port) 286 if (!port)
374 return; 287 return;
375 288
289 local_irq_save(flags);
290
376 /* Send data */ 291 /* Send data */
377 for (i = 0; i < len; i++) { 292 for (i = 0; i < len; i++) {
378 /* LF -> CRLF */ 293 /* LF -> CRLF */
@@ -386,26 +301,16 @@ console_write_direct(struct console *co, const char *buf, unsigned int len)
386 ; 301 ;
387 *port->write = buf[i]; 302 *port->write = buf[i];
388 } 303 }
389 local_irq_restore(flags);
390}
391 304
392int raw_printk(const char *fmt, ...) 305 /*
393{ 306 * Feed the watchdog, otherwise it will reset the chip during boot.
394 static char buf[1024]; 307 * The time to send an ordinary boot message line (10-90 chars)
395 int printed_len; 308 * varies between 1-8ms at 115200. What makes up for the additional
396 static int first = 1; 309 * 90ms that allows the watchdog to bite?
397 if (first) { 310 */
398 /* Force reinitialization of the port to get manual mode. */ 311 reset_watchdog();
399 port->started = 0; 312
400 start_port(port); 313 local_irq_restore(flags);
401 first = 0;
402 }
403 va_list args;
404 va_start(args, fmt);
405 printed_len = vsnprintf(buf, sizeof(buf), fmt, args);
406 va_end(args);
407 console_write_direct(NULL, buf, strlen(buf));
408 return printed_len;
409} 314}
410 315
411static void 316static void
@@ -500,6 +405,7 @@ console_setup(struct console *co, char *options)
500 return 0; 405 return 0;
501} 406}
502 407
408
503/* This is a dummy serial device that throws away anything written to it. 409/* This is a dummy serial device that throws away anything written to it.
504 * This is used when no debug output is wanted. 410 * This is used when no debug output is wanted.
505 */ 411 */
@@ -555,7 +461,13 @@ etrax_console_device(struct console* co, int *index)
555{ 461{
556 if (port) 462 if (port)
557 *index = port->index; 463 *index = port->index;
464 else
465 *index = 0;
466#ifdef CONFIG_ETRAX_SERIAL
558 return port ? serial_driver : &dummy_driver; 467 return port ? serial_driver : &dummy_driver;
468#else
469 return &dummy_driver;
470#endif
559} 471}
560 472
561static struct console sercons = { 473static struct console sercons = {
diff --git a/arch/cris/arch-v10/kernel/dma.c b/arch/cris/arch-v10/kernel/dma.c
index e9a0311b141d..eb1fa0d2b49f 100644
--- a/arch/cris/arch-v10/kernel/dma.c
+++ b/arch/cris/arch-v10/kernel/dma.c
@@ -1,6 +1,5 @@
1/* Wrapper for DMA channel allocator that updates DMA client muxing. 1/* Wrapper for DMA channel allocator that updates DMA client muxing.
2 * Copyright 2004, Axis Communications AB 2 * Copyright 2004-2007, Axis Communications AB
3 * $Id: dma.c,v 1.1 2004/12/13 12:21:51 starvik Exp $
4 */ 3 */
5 4
6#include <linux/kernel.h> 5#include <linux/kernel.h>
diff --git a/arch/cris/arch-v10/kernel/entry.S b/arch/cris/arch-v10/kernel/entry.S
index d1361dc119e2..3a65f322ae07 100644
--- a/arch/cris/arch-v10/kernel/entry.S
+++ b/arch/cris/arch-v10/kernel/entry.S
@@ -1,252 +1,9 @@
1/* $Id: entry.S,v 1.28 2005/06/20 05:06:30 starvik Exp $ 1/*
2 *
3 * linux/arch/cris/entry.S 2 * linux/arch/cris/entry.S
4 * 3 *
5 * Copyright (C) 2000, 2001, 2002 Axis Communications AB 4 * Copyright (C) 2000, 2001, 2002 Axis Communications AB
6 * 5 *
7 * Authors: Bjorn Wesen (bjornw@axis.com) 6 * Authors: Bjorn Wesen (bjornw@axis.com)
8 *
9 * $Log: entry.S,v $
10 * Revision 1.28 2005/06/20 05:06:30 starvik
11 * Remove unnecessary diff to kernel.org tree
12 *
13 * Revision 1.27 2005/03/04 08:16:16 starvik
14 * Merge of Linux 2.6.11.
15 *
16 * Revision 1.26 2005/01/11 13:49:47 starvik
17 * Added NMI handler.
18 *
19 * Revision 1.25 2004/12/27 11:18:32 starvik
20 * Merge of Linux 2.6.10 (not functional yet).
21 *
22 * Revision 1.24 2004/12/22 10:41:23 starvik
23 * Updates to make v10 compile with the latest SMP aware generic code (even
24 * though v10 will never have SMP).
25 *
26 * Revision 1.23 2004/10/19 13:07:37 starvik
27 * Merge of Linux 2.6.9
28 *
29 * Revision 1.22 2004/06/21 10:29:55 starvik
30 * Merge of Linux 2.6.7
31 *
32 * Revision 1.21 2004/06/09 05:30:27 starvik
33 * Clean up multiple interrupt handling.
34 * Prevent interrupts from interrupting each other.
35 * Handle all active interrupts.
36 *
37 * Revision 1.20 2004/06/08 08:55:32 starvik
38 * Removed unused code
39 *
40 * Revision 1.19 2004/06/04 11:56:15 starvik
41 * Implemented page table lookup for refills in assembler for improved performance.
42 *
43 * Revision 1.18 2004/05/11 12:28:25 starvik
44 * Merge of Linux 2.6.6
45 *
46 * Revision 1.17 2003/09/11 07:29:49 starvik
47 * Merge of Linux 2.6.0-test5
48 *
49 * Revision 1.16 2003/07/04 08:27:41 starvik
50 * Merge of Linux 2.5.74
51 *
52 * Revision 1.15 2003/04/09 07:32:55 starvik
53 * resume should return task_struct, not thread_info
54 *
55 * Revision 1.14 2003/04/09 05:20:44 starvik
56 * Merge of Linux 2.5.67
57 *
58 * Revision 1.13 2002/12/11 15:42:02 starvik
59 * Extracted v10 (ETRAX 100LX) specific stuff from arch/cris/kernel/*.c
60 *
61 * Revision 1.12 2002/12/10 09:00:10 starvik
62 * Merge of Linux 2.5.51
63 *
64 * Revision 1.11 2002/12/05 07:53:10 starvik
65 * Corrected constants used with btstq
66 *
67 * Revision 1.10 2002/11/27 08:45:10 starvik
68 * pid is in task_struct, not thread_info
69 *
70 * Revision 1.9 2002/11/26 09:52:05 starvik
71 * Added preemptive kernel scheduling (if CONFIG_PREEMPT)
72 *
73 * Revision 1.8 2002/11/20 11:56:11 starvik
74 * Merge of Linux 2.5.48
75 *
76 * Revision 1.7 2002/11/18 13:02:42 starvik
77 * Added fourth parameter to do_notify_resume
78 * Minor cleanup
79 *
80 * Revision 1.6 2002/11/11 10:37:50 starvik
81 * Use new asm-offset defines
82 * Modified for new location of current->work etc
83 * Removed SYMBOL_NAME from syscalls
84 * Added some new syscalls
85 *
86 * Revision 1.5 2002/11/05 06:45:11 starvik
87 * Merge of Linux 2.5.45
88 *
89 * Revision 1.4 2002/02/05 15:41:31 bjornw
90 * Rewritten to conform better to current 2.5 code (similar to arch/i386)
91 *
92 * Revision 1.3 2002/01/21 15:22:20 bjornw
93 * NICE_DOGGY fix from 2.4 arch/cris
94 *
95 * Revision 1.37 2001/12/07 17:03:55 bjornw
96 * Call a c-hook called watchdog_bite_hook instead of show_registers directly
97 *
98 * Revision 1.36 2001/11/22 13:36:36 bjornw
99 * * In ret_from_intr, check regs->dccr for usermode reentrance instead of
100 * DCCR explicitly (because the latter might not reflect current reality)
101 * * In mmu_bus_fault, set $r9 _after_ calling the C-code instead of before
102 * since $r9 is call-clobbered and is potentially needed afterwards
103 *
104 * Revision 1.35 2001/10/30 17:10:15 bjornw
105 * Add some syscalls
106 *
107 * Revision 1.34 2001/10/01 14:45:03 bjornw
108 * Removed underscores and added register prefixes
109 *
110 * Revision 1.33 2001/08/21 13:48:01 jonashg
111 * Added fix by HP to avoid oops when doing a hard_reset_now.
112 *
113 * Revision 1.32 2001/08/14 04:32:02 hp
114 * In _resume, add comment why R9 is saved; don't sound like it's call-saved.
115 *
116 * Revision 1.31 2001/07/25 16:07:42 bjornw
117 * softirq_active/mask -> softirq_pending only
118 *
119 * Revision 1.30 2001/07/05 01:03:32 hp
120 * - include asm/errno.h to get ENOSYS.
121 * - Use ENOSYS, not local constant LENOSYS; tweak comments.
122 * - Explain why .include, not #include is used.
123 * - Make oops-register-dump if watchdog bits and it's not expected.
124 * - Don't jsr, use jump _hard_reset_now, and skip spurious nop.
125 * - Use correct section attribute for section .rodata.
126 * - Adjust sys_ni_syscall fill number.
127 *
128 * Revision 1.29 2001/06/25 14:07:00 hp
129 * Fix review comment.
130 * * head.S: Use IO_STATE, IO_FIELD and IO_MASK constructs instead of
131 * magic numbers. Add comment that -traditional must not be used.
132 * * entry.S (SYMBOL_NAME): Change redefinition to use ## concatenation.
133 * Correct and update comment.
134 * * Makefile (.S.o): Don't use -traditional. Add comment why the
135 * toplevel rule can't be used (now that there's a reason).
136 *
137 * Revision 1.28 2001/06/21 02:00:40 hp
138 * * entry.S: Include asm/unistd.h.
139 * (_sys_call_table): Use section .rodata, not .data.
140 * (_kernel_thread): Move from...
141 * * process.c: ... here.
142 * * entryoffsets.c (VAL): Break out from...
143 * (OF): Use VAL.
144 * (LCLONE_VM): New asmified value from CLONE_VM.
145 *
146 * Revision 1.27 2001/05/29 11:25:27 markusl
147 * In case of "spurious_interrupt", do hard_reset instead of hanging system in a loop...
148 *
149 * Revision 1.26 2001/05/15 15:46:03 bjornw
150 * Include config.h now that we use some CONFIG_ options
151 *
152 * Revision 1.25 2001/05/15 05:38:47 hp
153 * Tweaked code in _ret_from_sys_call
154 *
155 * Revision 1.24 2001/05/15 05:27:49 hp
156 * Save r9 in r1 over function call rather than on stack.
157 *
158 * Revision 1.23 2001/05/15 05:10:00 hp
159 * Generate entry.S structure offsets from C
160 *
161 * Revision 1.22 2001/04/17 13:58:39 orjanf
162 * * Renamed CONFIG_KGDB to CONFIG_ETRAX_KGDB.
163 *
164 * Revision 1.21 2001/04/17 11:33:29 orjanf
165 * Updated according to review:
166 * * Included asm/sv_addr_ag.h to get macro for internal register.
167 * * Corrected comment regarding system call argument passing.
168 * * Removed comment about instruction being in a delay slot.
169 * * Added comment about SYMBOL_NAME macro.
170 *
171 * Revision 1.20 2001/04/12 08:51:07 hp
172 * - Add entry for sys_fcntl64. In fact copy last piece from i386 including ...
173 * - .rept to fill table to safe state with sys_ni_syscall.
174 *
175 * Revision 1.19 2001/04/04 09:43:32 orjanf
176 * * Moved do_sigtrap from traps.c to entry.S.
177 * * LTASK_PID need not be global anymore.
178 *
179 * Revision 1.18 2001/03/26 09:25:02 markusl
180 * Updated after review, should now handle USB interrupts correctly.
181 *
182 * Revision 1.17 2001/03/21 16:12:55 bjornw
183 * * Always make room for the cpu status record in the frame, in order to
184 * use the same framelength and layout for both mmu busfaults and normal
185 * irqs. No need to check for the explicit CRIS_FRAME_FIXUP type anymore.
186 * * Fixed bug with using addq for popping the stack in the epilogue - it
187 * destroyed the flag register. Use instructions that don't affect the
188 * flag register instead.
189 * * Removed write to R_PORT_PA_DATA during spurious_interrupt
190 *
191 * Revision 1.16 2001/03/20 19:43:02 bjornw
192 * * Get rid of esp0 setting
193 * * Give a 7th argument to a systemcall - the stackframe
194 *
195 * Revision 1.15 2001/03/05 13:14:30 bjornw
196 * Spelling fix
197 *
198 * Revision 1.14 2001/02/23 08:36:36 perf
199 * New ABI; syscallnr=r9, arg5=mof, arg6=srp.
200 * Corrected tracesys call check.
201 *
202 * Revision 1.13 2001/02/15 08:40:55 perf
203 * H-P by way of perf;
204 * - (_system_call): Don't read system call function address into r1.
205 * - (RBFExit): There is no such thing as a null pop. Adjust sp by addq.
206 * - (_system_call): Don't use r10 and don't save and restore it.
207 * - (THREAD_ESP0): New constant.
208 * - (_system_call): Inline set_esp0.
209 *
210 * Revision 1.12 2001/01/31 17:56:25 orjanf
211 * Added definition of LTASK_PID and made it global.
212 *
213 * Revision 1.11 2001/01/10 21:13:29 bjornw
214 * SYMBOL_NAME is defined incorrectly for the compiler options we currently use
215 *
216 * Revision 1.10 2000/12/18 23:47:56 bjornw
217 * * Added syscall trace support (ptrace), completely untested of course
218 * * Removed redundant check for NULL entries in syscall_table
219 *
220 * Revision 1.9 2000/11/21 16:40:51 bjornw
221 * * New frame type used when an SBFS frame needs to be popped without
222 * actually restarting the instruction
223 * * Enable interrupts in signal_return (they did so in x86, I hope it's a good
224 * idea)
225 *
226 * Revision 1.8 2000/11/17 16:53:35 bjornw
227 * Added detection of frame-type in Rexit, so that mmu_bus_fault can
228 * use ret_from_intr in the return-path to check for signals (like SEGV)
229 * and other foul things that might have occurred during the fault.
230 *
231 * Revision 1.7 2000/10/06 15:04:28 bjornw
232 * Include mof in register savings
233 *
234 * Revision 1.6 2000/09/12 16:02:44 bjornw
235 * Linux-2.4.0-test7 derived updates
236 *
237 * Revision 1.5 2000/08/17 15:35:15 bjornw
238 * 2.4.0-test6 changed local_irq_count and friends API
239 *
240 * Revision 1.4 2000/08/02 13:59:30 bjornw
241 * Removed olduname and uname from the syscall list
242 *
243 * Revision 1.3 2000/07/31 13:32:58 bjornw
244 * * Export ret_from_intr
245 * * _resume updated (prev/last tjohejsan)
246 * * timer_interrupt obsolete
247 * * SIGSEGV detection in mmu_bus_fault temporarily disabled
248 *
249 *
250 */ 7 */
251 8
252/* 9/*
@@ -1167,9 +924,11 @@ sys_call_table:
1167 .long sys_epoll_pwait 924 .long sys_epoll_pwait
1168 .long sys_utimensat /* 320 */ 925 .long sys_utimensat /* 320 */
1169 .long sys_signalfd 926 .long sys_signalfd
1170 .long sys_ni_syscall 927 .long sys_timerfd_create
1171 .long sys_eventfd 928 .long sys_eventfd
1172 .long sys_fallocate 929 .long sys_fallocate
930 .long sys_timerfd_settime /* 325 */
931 .long sys_timerfd_gettime
1173 932
1174 /* 933 /*
1175 * NOTE!! This doesn't have to be exact - we just have 934 * NOTE!! This doesn't have to be exact - we just have
diff --git a/arch/cris/arch-v10/kernel/fasttimer.c b/arch/cris/arch-v10/kernel/fasttimer.c
index c1a3a2100ee7..31ff35cff02c 100644
--- a/arch/cris/arch-v10/kernel/fasttimer.c
+++ b/arch/cris/arch-v10/kernel/fasttimer.c
@@ -31,15 +31,12 @@
31 31
32#define DEBUG_LOG_INCLUDED 32#define DEBUG_LOG_INCLUDED
33#define FAST_TIMER_LOG 33#define FAST_TIMER_LOG
34//#define FAST_TIMER_TEST 34/* #define FAST_TIMER_TEST */
35 35
36#define FAST_TIMER_SANITY_CHECKS 36#define FAST_TIMER_SANITY_CHECKS
37 37
38#ifdef FAST_TIMER_SANITY_CHECKS 38#ifdef FAST_TIMER_SANITY_CHECKS
39#define SANITYCHECK(x) x
40static int sanity_failed; 39static int sanity_failed;
41#else
42#define SANITYCHECK(x)
43#endif 40#endif
44 41
45#define D1(x) 42#define D1(x)
@@ -226,23 +223,19 @@ void start_one_shot_timer(struct fast_timer *t,
226 do_gettimeofday_fast(&t->tv_set); 223 do_gettimeofday_fast(&t->tv_set);
227 tmp = fast_timer_list; 224 tmp = fast_timer_list;
228 225
229 SANITYCHECK({ /* Check so this is not in the list already... */ 226#ifdef FAST_TIMER_SANITY_CHECKS
230 while (tmp != NULL) 227 /* Check so this is not in the list already... */
231 { 228 while (tmp != NULL) {
232 if (tmp == t) 229 if (tmp == t) {
233 { 230 printk(KERN_WARNING "timer name: %s data: "
234 printk(KERN_WARNING 231 "0x%08lX already in list!\n", name, data);
235 "timer name: %s data: 0x%08lX already in list!\n", name, data); 232 sanity_failed++;
236 sanity_failed++; 233 goto done;
237 goto done; 234 } else
238 } 235 tmp = tmp->next;
239 else 236 }
240 { 237 tmp = fast_timer_list;
241 tmp = tmp->next; 238#endif
242 }
243 }
244 tmp = fast_timer_list;
245 });
246 239
247 t->delay_us = delay_us; 240 t->delay_us = delay_us;
248 t->function = function; 241 t->function = function;
diff --git a/arch/cris/arch-v10/kernel/head.S b/arch/cris/arch-v10/kernel/head.S
index d946d8b8d277..96344afc4ebc 100644
--- a/arch/cris/arch-v10/kernel/head.S
+++ b/arch/cris/arch-v10/kernel/head.S
@@ -1,186 +1,10 @@
1/* $Id: head.S,v 1.10 2005/06/20 05:12:54 starvik Exp $ 1/*
2 *
3 * Head of the kernel - alter with care 2 * Head of the kernel - alter with care
4 * 3 *
5 * Copyright (C) 2000, 2001 Axis Communications AB 4 * Copyright (C) 2000, 2001 Axis Communications AB
6 * 5 *
7 * Authors: Bjorn Wesen (bjornw@axis.com) 6 * Authors: Bjorn Wesen (bjornw@axis.com)
8 * 7 *
9 * $Log: head.S,v $
10 * Revision 1.10 2005/06/20 05:12:54 starvik
11 * Remove unnecessary diff to kernel.org tree
12 *
13 * Revision 1.9 2004/12/13 12:21:51 starvik
14 * Added I/O and DMA allocators from Linux 2.4
15 *
16 * Revision 1.8 2004/11/22 11:41:14 starvik
17 * Kernel command line may be supplied to kernel. Not used by Axis but may
18 * be used by customers.
19 *
20 * Revision 1.7 2004/05/14 07:58:01 starvik
21 * Merge of changes from 2.4
22 *
23 * Revision 1.6 2003/04/28 05:31:46 starvik
24 * Added section attributes
25 *
26 * Revision 1.5 2002/12/11 15:42:02 starvik
27 * Extracted v10 (ETRAX 100LX) specific stuff from arch/cris/kernel/*.c
28 *
29 * Revision 1.4 2002/11/07 09:00:44 starvik
30 * Names changed for init sections
31 * init_task_union -> init_thread_union
32 *
33 * Revision 1.3 2002/02/05 15:38:23 bjornw
34 * Oops.. non-CRAMFS_MAGIC should jump over the copying, not into it...
35 *
36 * Revision 1.2 2001/12/18 13:35:19 bjornw
37 * Applied the 2.4.13->2.4.16 CRIS patch to 2.5.1 (is a copy of 2.4.15).
38 *
39 * Revision 1.43 2001/11/08 15:09:43 starvik
40 * Only start MII clock if Ethernet is configured
41 *
42 * Revision 1.42 2001/11/08 14:37:34 starvik
43 * Start MII clock early to make sure that it is running at tranceiver reset
44 *
45 * Revision 1.41 2001/10/29 14:55:58 pkj
46 * Corrected pa$r0 to par0.
47 *
48 * Revision 1.40 2001/10/03 14:59:57 pkj
49 * Added support for resetting the Bluetooth hardware.
50 *
51 * Revision 1.39 2001/10/01 14:45:03 bjornw
52 * Removed underscores and added register prefixes
53 *
54 * Revision 1.38 2001/09/21 07:14:11 jonashg
55 * Made root filesystem (cramfs) use mtdblock driver when booting from flash.
56 *
57 * Revision 1.37 2001/09/11 13:44:29 orjanf
58 * Decouple usage of serial ports for debug and kgdb.
59 *
60 * Revision 1.36 2001/06/29 12:39:31 pkj
61 * Added support for mirroring the first flash to just below the
62 * second one, to make them look consecutive to cramfs.
63 *
64 * Revision 1.35 2001/06/25 14:07:00 hp
65 * Fix review comment.
66 * * head.S: Use IO_STATE, IO_FIELD and IO_MASK constructs instead of
67 * magic numbers. Add comment that -traditional must not be used.
68 * * entry.S (SYMBOL_NAME): Change redefinition to use ## concatenation.
69 * Correct and update comment.
70 * * Makefile (.S.o): Don't use -traditional. Add comment why the
71 * toplevel rule can't be used (now that there's a reason).
72 *
73 * Revision 1.34 2001/05/15 07:08:14 hp
74 * Tweak "notice" to reflect that both r8 r9 are used
75 *
76 * Revision 1.33 2001/05/15 06:40:05 hp
77 * Put bulk of code in .text.init, data in .data.init
78 *
79 * Revision 1.32 2001/05/15 06:18:56 hp
80 * Execute review comment: s/bcc/bhs/g; s/bcs/blo/g
81 *
82 * Revision 1.31 2001/05/15 06:08:40 hp
83 * Add sentence about autodetecting the bit31-MMU-bug
84 *
85 * Revision 1.30 2001/05/15 06:00:05 hp
86 * Update comment: LOW_MAP is not forced on xsim anymore.
87 *
88 * Revision 1.29 2001/04/18 12:51:59 orjanf
89 * * Reverted review change regarding the use of bcs/bcc.
90 * * Removed non-working LED-clearing code.
91 *
92 * Revision 1.28 2001/04/17 13:58:39 orjanf
93 * * Renamed CONFIG_KGDB to CONFIG_ETRAX_KGDB.
94 *
95 * Revision 1.27 2001/04/17 11:42:35 orjanf
96 * Changed according to review:
97 * * Added comment explaining memory map bug.
98 * * Changed bcs and bcc to blo and bhs, respectively.
99 * * Removed mentioning of Stallone and Olga boards.
100 *
101 * Revision 1.26 2001/04/06 12:31:07 jonashg
102 * Check for cramfs in flash before RAM instead of RAM before flash.
103 *
104 * Revision 1.25 2001/04/04 06:23:53 starvik
105 * Initialize DRAM if not already initialized
106 *
107 * Revision 1.24 2001/04/03 11:12:00 starvik
108 * Removed dram init (done by rescue or etrax100boot
109 * Corrected include
110 *
111 * Revision 1.23 2001/04/03 09:53:03 starvik
112 * Include hw_settings.S
113 *
114 * Revision 1.22 2001/03/26 14:23:26 bjornw
115 * Namechange of some config options
116 *
117 * Revision 1.21 2001/03/08 12:14:41 bjornw
118 * * Config name for ETRAX IDE was renamed
119 * * Removed G27 auto-setting when JULIETTE is chosen (need to make this
120 * a new config option later)
121 *
122 * Revision 1.20 2001/02/23 12:47:56 bjornw
123 * MMU regs during LOW_MAP updated to reflect a newer reality
124 *
125 * Revision 1.19 2001/02/19 11:12:07 bjornw
126 * Changed comment header format
127 *
128 * Revision 1.18 2001/02/15 07:25:38 starvik
129 * Added support for synchronous serial ports
130 *
131 * Revision 1.17 2001/02/08 15:53:13 starvik
132 * Last commit removed some important ifdefs
133 *
134 * Revision 1.16 2001/02/08 15:20:38 starvik
135 * Include dram_init.S as inline
136 *
137 * Revision 1.15 2001/01/29 18:12:01 bjornw
138 * Corrected some comments
139 *
140 * Revision 1.14 2001/01/29 13:11:29 starvik
141 * Include dram_init.S (with DRAM/SDRAM initialization)
142 *
143 * Revision 1.13 2001/01/23 14:54:57 markusl
144 * Updated for USB
145 * i.e. added r_gen_config settings
146 *
147 * Revision 1.12 2001/01/19 16:16:29 perf
148 * Added temporary mapping of 0x0c->0x0c to avoid flash loading confusion.
149 * Renamed serial options from ETRAX100 to ETRAX.
150 *
151 * Revision 1.11 2001/01/16 16:31:38 bjornw
152 * * Changed name and semantics of running_from_flash to romfs_in_flash,
153 * set by head.S to indicate to setup.c whether there is a cramfs image
154 * after the kernels BSS or not. Should work for all three boot-cases
155 * (DRAM with cramfs in DRAM, DRAM with cramfs in flash (compressed boot),
156 * and flash with cramfs in flash)
157 *
158 * Revision 1.10 2001/01/16 14:12:21 bjornw
159 * * Check for cramfs start passed in r9 from the decompressor, if all other
160 * cramfs options fail (if we boot from DRAM but don't find a cramfs image
161 * after the kernel in DRAM, it is probably still in the flash)
162 * * Check magic in cramfs detection when booting from flash directly
163 *
164 * Revision 1.9 2001/01/15 17:17:02 bjornw
165 * * Corrected the code that detects the cramfs lengths
166 * * Added a comment saying that the above does not work due to other
167 * reasons..
168 *
169 * Revision 1.8 2001/01/15 16:27:51 jonashg
170 * Made boot after flashing work.
171 * * end destination is __vmlinux_end in RAM.
172 * * _romfs_start moved because of virtual memory.
173 *
174 * Revision 1.7 2000/11/21 13:55:29 bjornw
175 * Use CONFIG_CRIS_LOW_MAP for the low VM map instead of explicit CPU type
176 *
177 * Revision 1.6 2000/10/06 12:36:55 bjornw
178 * Forgot swapper_pg_dir when changing memory map..
179 *
180 * Revision 1.5 2000/10/04 16:49:30 bjornw
181 * * Fixed memory mapping in LX
182 * * Check for cramfs instead of romfs
183 *
184 */ 8 */
185 9
186#define ASSEMBLER_MACROS_ONLY 10#define ASSEMBLER_MACROS_ONLY
@@ -595,11 +419,17 @@ no_command_line:
595 419
596 moveq 0,$r0 420 moveq 0,$r0
597 421
422 ;; Select or disable serial port 2
423#ifdef CONFIG_ETRAX_SERIAL_PORT2
424 or.d IO_STATE (R_GEN_CONFIG, ser2, select),$r0
425#else
426 or.d IO_STATE (R_GEN_CONFIG, ser2, disable),$r0
427#endif
428
598 ;; Init interfaces (disable them). 429 ;; Init interfaces (disable them).
599 or.d IO_STATE (R_GEN_CONFIG, scsi0, disable) \ 430 or.d IO_STATE (R_GEN_CONFIG, scsi0, disable) \
600 | IO_STATE (R_GEN_CONFIG, ata, disable) \ 431 | IO_STATE (R_GEN_CONFIG, ata, disable) \
601 | IO_STATE (R_GEN_CONFIG, par0, disable) \ 432 | IO_STATE (R_GEN_CONFIG, par0, disable) \
602 | IO_STATE (R_GEN_CONFIG, ser2, disable) \
603 | IO_STATE (R_GEN_CONFIG, mio, disable) \ 433 | IO_STATE (R_GEN_CONFIG, mio, disable) \
604 | IO_STATE (R_GEN_CONFIG, scsi1, disable) \ 434 | IO_STATE (R_GEN_CONFIG, scsi1, disable) \
605 | IO_STATE (R_GEN_CONFIG, scsi0w, disable) \ 435 | IO_STATE (R_GEN_CONFIG, scsi0w, disable) \
@@ -801,6 +631,41 @@ no_command_line:
801 | IO_STATE (R_SERIAL1_TR_CTRL, tr_bitnr, tr_8bit),$r0 631 | IO_STATE (R_SERIAL1_TR_CTRL, tr_bitnr, tr_8bit),$r0
802 move.b $r0,[R_SERIAL1_TR_CTRL] 632 move.b $r0,[R_SERIAL1_TR_CTRL]
803 633
634#ifdef CONFIG_ETRAX_SERIAL_PORT2
635 ;; setup the serial port 2 at 115200 baud for debug purposes
636
637 moveq IO_STATE (R_SERIAL2_XOFF, tx_stop, enable) \
638 | IO_STATE (R_SERIAL2_XOFF, auto_xoff, disable) \
639 | IO_FIELD (R_SERIAL2_XOFF, xoff_char, 0),$r0
640 move.d $r0,[R_SERIAL2_XOFF]
641
642 ; 115.2kbaud for both transmit and receive
643 move.b IO_STATE (R_SERIAL2_BAUD, tr_baud, c115k2Hz) \
644 | IO_STATE (R_SERIAL2_BAUD, rec_baud, c115k2Hz),$r0
645 move.b $r0,[R_SERIAL2_BAUD]
646
647 ; Set up and enable the serial2 receiver.
648 move.b IO_STATE (R_SERIAL2_REC_CTRL, dma_err, stop) \
649 | IO_STATE (R_SERIAL2_REC_CTRL, rec_enable, enable) \
650 | IO_STATE (R_SERIAL2_REC_CTRL, rts_, active) \
651 | IO_STATE (R_SERIAL2_REC_CTRL, sampling, middle) \
652 | IO_STATE (R_SERIAL2_REC_CTRL, rec_stick_par, normal) \
653 | IO_STATE (R_SERIAL2_REC_CTRL, rec_par, even) \
654 | IO_STATE (R_SERIAL2_REC_CTRL, rec_par_en, disable) \
655 | IO_STATE (R_SERIAL2_REC_CTRL, rec_bitnr, rec_8bit),$r0
656 move.b $r0,[R_SERIAL2_REC_CTRL]
657
658 ; Set up and enable the serial2 transmitter.
659 move.b IO_FIELD (R_SERIAL2_TR_CTRL, txd, 0) \
660 | IO_STATE (R_SERIAL2_TR_CTRL, tr_enable, enable) \
661 | IO_STATE (R_SERIAL2_TR_CTRL, auto_cts, disabled) \
662 | IO_STATE (R_SERIAL2_TR_CTRL, stop_bits, one_bit) \
663 | IO_STATE (R_SERIAL2_TR_CTRL, tr_stick_par, normal) \
664 | IO_STATE (R_SERIAL2_TR_CTRL, tr_par, even) \
665 | IO_STATE (R_SERIAL2_TR_CTRL, tr_par_en, disable) \
666 | IO_STATE (R_SERIAL2_TR_CTRL, tr_bitnr, tr_8bit),$r0
667 move.b $r0,[R_SERIAL2_TR_CTRL]
668#endif
804 669
805#ifdef CONFIG_ETRAX_SERIAL_PORT3 670#ifdef CONFIG_ETRAX_SERIAL_PORT3
806 ;; setup the serial port 3 at 115200 baud for debug purposes 671 ;; setup the serial port 3 at 115200 baud for debug purposes
diff --git a/arch/cris/arch-v10/kernel/io_interface_mux.c b/arch/cris/arch-v10/kernel/io_interface_mux.c
index f3b327d4ed9c..add98e0941b5 100644
--- a/arch/cris/arch-v10/kernel/io_interface_mux.c
+++ b/arch/cris/arch-v10/kernel/io_interface_mux.c
@@ -1,10 +1,9 @@
1/* IO interface mux allocator for ETRAX100LX. 1/* IO interface mux allocator for ETRAX100LX.
2 * Copyright 2004, Axis Communications AB 2 * Copyright 2004-2007, Axis Communications AB
3 * $Id: io_interface_mux.c,v 1.2 2004/12/21 12:08:38 starvik Exp $
4 */ 3 */
5 4
6 5
7/* C.f. ETRAX100LX Designer's Reference 20.9 */ 6/* C.f. ETRAX100LX Designer's Reference chapter 19.9 */
8 7
9#include <linux/kernel.h> 8#include <linux/kernel.h>
10#include <linux/slab.h> 9#include <linux/slab.h>
@@ -45,17 +44,39 @@ struct watcher
45struct if_group 44struct if_group
46{ 45{
47 enum io_if_group group; 46 enum io_if_group group;
48 unsigned char used; 47 /* name - the name of the group 'A' to 'F' */
49 enum cris_io_interface owner; 48 char *name;
49 /* used - a bit mask of all pins in the group in the order listed
50 * in the tables in 19.9.1 to 19.9.6. Note that no
51 * distinction is made between in, out and in/out pins. */
52 unsigned int used;
50}; 53};
51 54
52 55
53struct interface 56struct interface
54{ 57{
55 enum cris_io_interface ioif; 58 enum cris_io_interface ioif;
59 /* name - the name of the interface */
60 char *name;
61 /* groups - OR'ed together io_if_group flags describing what pin groups
62 * the interface uses pins in. */
56 unsigned char groups; 63 unsigned char groups;
64 /* used - set when the interface is allocated. */
57 unsigned char used; 65 unsigned char used;
58 char *owner; 66 char *owner;
67 /* group_a through group_f - bit masks describing what pins in the
68 * pin groups the interface uses. */
69 unsigned int group_a;
70 unsigned int group_b;
71 unsigned int group_c;
72 unsigned int group_d;
73 unsigned int group_e;
74 unsigned int group_f;
75
76 /* gpio_g_in, gpio_g_out, gpio_b - bit masks telling what pins in the
77 * GPIO ports the interface uses. This could be reconstucted using
78 * the group_X masks and a table of what pins the GPIO ports use,
79 * but that would be messy. */
59 unsigned int gpio_g_in; 80 unsigned int gpio_g_in;
60 unsigned int gpio_g_out; 81 unsigned int gpio_g_out;
61 unsigned char gpio_b; 82 unsigned char gpio_b;
@@ -64,26 +85,32 @@ struct interface
64static struct if_group if_groups[6] = { 85static struct if_group if_groups[6] = {
65 { 86 {
66 .group = group_a, 87 .group = group_a,
88 .name = "A",
67 .used = 0, 89 .used = 0,
68 }, 90 },
69 { 91 {
70 .group = group_b, 92 .group = group_b,
93 .name = "B",
71 .used = 0, 94 .used = 0,
72 }, 95 },
73 { 96 {
74 .group = group_c, 97 .group = group_c,
98 .name = "C",
75 .used = 0, 99 .used = 0,
76 }, 100 },
77 { 101 {
78 .group = group_d, 102 .group = group_d,
103 .name = "D",
79 .used = 0, 104 .used = 0,
80 }, 105 },
81 { 106 {
82 .group = group_e, 107 .group = group_e,
108 .name = "E",
83 .used = 0, 109 .used = 0,
84 }, 110 },
85 { 111 {
86 .group = group_f, 112 .group = group_f,
113 .name = "F",
87 .used = 0, 114 .used = 0,
88 } 115 }
89}; 116};
@@ -94,14 +121,32 @@ static struct interface interfaces[] = {
94 /* Begin Non-multiplexed interfaces */ 121 /* Begin Non-multiplexed interfaces */
95 { 122 {
96 .ioif = if_eth, 123 .ioif = if_eth,
124 .name = "ethernet",
97 .groups = 0, 125 .groups = 0,
126
127 .group_a = 0,
128 .group_b = 0,
129 .group_c = 0,
130 .group_d = 0,
131 .group_e = 0,
132 .group_f = 0,
133
98 .gpio_g_in = 0, 134 .gpio_g_in = 0,
99 .gpio_g_out = 0, 135 .gpio_g_out = 0,
100 .gpio_b = 0 136 .gpio_b = 0
101 }, 137 },
102 { 138 {
103 .ioif = if_serial_0, 139 .ioif = if_serial_0,
140 .name = "serial_0",
104 .groups = 0, 141 .groups = 0,
142
143 .group_a = 0,
144 .group_b = 0,
145 .group_c = 0,
146 .group_d = 0,
147 .group_e = 0,
148 .group_f = 0,
149
105 .gpio_g_in = 0, 150 .gpio_g_in = 0,
106 .gpio_g_out = 0, 151 .gpio_g_out = 0,
107 .gpio_b = 0 152 .gpio_b = 0
@@ -109,172 +154,385 @@ static struct interface interfaces[] = {
109 /* End Non-multiplexed interfaces */ 154 /* End Non-multiplexed interfaces */
110 { 155 {
111 .ioif = if_serial_1, 156 .ioif = if_serial_1,
157 .name = "serial_1",
112 .groups = group_e, 158 .groups = group_e,
159
160 .group_a = 0,
161 .group_b = 0,
162 .group_c = 0,
163 .group_d = 0,
164 .group_e = 0x0f,
165 .group_f = 0,
166
113 .gpio_g_in = 0x00000000, 167 .gpio_g_in = 0x00000000,
114 .gpio_g_out = 0x00000000, 168 .gpio_g_out = 0x00000000,
115 .gpio_b = 0x00 169 .gpio_b = 0x00
116 }, 170 },
117 { 171 {
118 .ioif = if_serial_2, 172 .ioif = if_serial_2,
173 .name = "serial_2",
119 .groups = group_b, 174 .groups = group_b,
175
176 .group_a = 0,
177 .group_b = 0x0f,
178 .group_c = 0,
179 .group_d = 0,
180 .group_e = 0,
181 .group_f = 0,
182
120 .gpio_g_in = 0x000000c0, 183 .gpio_g_in = 0x000000c0,
121 .gpio_g_out = 0x000000c0, 184 .gpio_g_out = 0x000000c0,
122 .gpio_b = 0x00 185 .gpio_b = 0x00
123 }, 186 },
124 { 187 {
125 .ioif = if_serial_3, 188 .ioif = if_serial_3,
189 .name = "serial_3",
126 .groups = group_c, 190 .groups = group_c,
191
192 .group_a = 0,
193 .group_b = 0,
194 .group_c = 0x0f,
195 .group_d = 0,
196 .group_e = 0,
197 .group_f = 0,
198
127 .gpio_g_in = 0xc0000000, 199 .gpio_g_in = 0xc0000000,
128 .gpio_g_out = 0xc0000000, 200 .gpio_g_out = 0xc0000000,
129 .gpio_b = 0x00 201 .gpio_b = 0x00
130 }, 202 },
131 { 203 {
132 .ioif = if_sync_serial_1, 204 .ioif = if_sync_serial_1,
133 .groups = group_e | group_f, /* if_sync_serial_1 and if_sync_serial_3 205 .name = "sync_serial_1",
134 can be used simultaneously */ 206 .groups = group_e | group_f,
207
208 .group_a = 0,
209 .group_b = 0,
210 .group_c = 0,
211 .group_d = 0,
212 .group_e = 0x0f,
213 .group_f = 0x10,
214
135 .gpio_g_in = 0x00000000, 215 .gpio_g_in = 0x00000000,
136 .gpio_g_out = 0x00000000, 216 .gpio_g_out = 0x00000000,
137 .gpio_b = 0x10 217 .gpio_b = 0x10
138 }, 218 },
139 { 219 {
140 .ioif = if_sync_serial_3, 220 .ioif = if_sync_serial_3,
221 .name = "sync_serial_3",
141 .groups = group_c | group_f, 222 .groups = group_c | group_f,
223
224 .group_a = 0,
225 .group_b = 0,
226 .group_c = 0x0f,
227 .group_d = 0,
228 .group_e = 0,
229 .group_f = 0x80,
230
142 .gpio_g_in = 0xc0000000, 231 .gpio_g_in = 0xc0000000,
143 .gpio_g_out = 0xc0000000, 232 .gpio_g_out = 0xc0000000,
144 .gpio_b = 0x80 233 .gpio_b = 0x80
145 }, 234 },
146 { 235 {
147 .ioif = if_shared_ram, 236 .ioif = if_shared_ram,
237 .name = "shared_ram",
148 .groups = group_a, 238 .groups = group_a,
239
240 .group_a = 0x7f8ff,
241 .group_b = 0,
242 .group_c = 0,
243 .group_d = 0,
244 .group_e = 0,
245 .group_f = 0,
246
149 .gpio_g_in = 0x0000ff3e, 247 .gpio_g_in = 0x0000ff3e,
150 .gpio_g_out = 0x0000ff38, 248 .gpio_g_out = 0x0000ff38,
151 .gpio_b = 0x00 249 .gpio_b = 0x00
152 }, 250 },
153 { 251 {
154 .ioif = if_shared_ram_w, 252 .ioif = if_shared_ram_w,
253 .name = "shared_ram_w",
155 .groups = group_a | group_d, 254 .groups = group_a | group_d,
255
256 .group_a = 0x7f8ff,
257 .group_b = 0,
258 .group_c = 0,
259 .group_d = 0xff,
260 .group_e = 0,
261 .group_f = 0,
262
156 .gpio_g_in = 0x00ffff3e, 263 .gpio_g_in = 0x00ffff3e,
157 .gpio_g_out = 0x00ffff38, 264 .gpio_g_out = 0x00ffff38,
158 .gpio_b = 0x00 265 .gpio_b = 0x00
159 }, 266 },
160 { 267 {
161 .ioif = if_par_0, 268 .ioif = if_par_0,
269 .name = "par_0",
162 .groups = group_a, 270 .groups = group_a,
271
272 .group_a = 0x7fbff,
273 .group_b = 0,
274 .group_c = 0,
275 .group_d = 0,
276 .group_e = 0,
277 .group_f = 0,
278
163 .gpio_g_in = 0x0000ff3e, 279 .gpio_g_in = 0x0000ff3e,
164 .gpio_g_out = 0x0000ff3e, 280 .gpio_g_out = 0x0000ff3e,
165 .gpio_b = 0x00 281 .gpio_b = 0x00
166 }, 282 },
167 { 283 {
168 .ioif = if_par_1, 284 .ioif = if_par_1,
285 .name = "par_1",
169 .groups = group_d, 286 .groups = group_d,
287
288 .group_a = 0,
289 .group_b = 0,
290 .group_c = 0,
291 .group_d = 0x7feff,
292 .group_e = 0,
293 .group_f = 0,
294
170 .gpio_g_in = 0x3eff0000, 295 .gpio_g_in = 0x3eff0000,
171 .gpio_g_out = 0x3eff0000, 296 .gpio_g_out = 0x3eff0000,
172 .gpio_b = 0x00 297 .gpio_b = 0x00
173 }, 298 },
174 { 299 {
175 .ioif = if_par_w, 300 .ioif = if_par_w,
301 .name = "par_w",
176 .groups = group_a | group_d, 302 .groups = group_a | group_d,
303
304 .group_a = 0x7fbff,
305 .group_b = 0,
306 .group_c = 0,
307 .group_d = 0xff,
308 .group_e = 0,
309 .group_f = 0,
310
177 .gpio_g_in = 0x00ffff3e, 311 .gpio_g_in = 0x00ffff3e,
178 .gpio_g_out = 0x00ffff3e, 312 .gpio_g_out = 0x00ffff3e,
179 .gpio_b = 0x00 313 .gpio_b = 0x00
180 }, 314 },
181 { 315 {
182 .ioif = if_scsi8_0, 316 .ioif = if_scsi8_0,
183 .groups = group_a | group_b | group_f, /* if_scsi8_0 and if_scsi8_1 317 .name = "scsi8_0",
184 can be used simultaneously */ 318 .groups = group_a | group_b | group_f,
319
320 .group_a = 0x7ffff,
321 .group_b = 0x0f,
322 .group_c = 0,
323 .group_d = 0,
324 .group_e = 0,
325 .group_f = 0x10,
326
185 .gpio_g_in = 0x0000ffff, 327 .gpio_g_in = 0x0000ffff,
186 .gpio_g_out = 0x0000ffff, 328 .gpio_g_out = 0x0000ffff,
187 .gpio_b = 0x10 329 .gpio_b = 0x10
188 }, 330 },
189 { 331 {
190 .ioif = if_scsi8_1, 332 .ioif = if_scsi8_1,
191 .groups = group_c | group_d | group_f, /* if_scsi8_0 and if_scsi8_1 333 .name = "scsi8_1",
192 can be used simultaneously */ 334 .groups = group_c | group_d | group_f,
335
336 .group_a = 0,
337 .group_b = 0,
338 .group_c = 0x0f,
339 .group_d = 0x7ffff,
340 .group_e = 0,
341 .group_f = 0x80,
342
193 .gpio_g_in = 0xffff0000, 343 .gpio_g_in = 0xffff0000,
194 .gpio_g_out = 0xffff0000, 344 .gpio_g_out = 0xffff0000,
195 .gpio_b = 0x80 345 .gpio_b = 0x80
196 }, 346 },
197 { 347 {
198 .ioif = if_scsi_w, 348 .ioif = if_scsi_w,
349 .name = "scsi_w",
199 .groups = group_a | group_b | group_d | group_f, 350 .groups = group_a | group_b | group_d | group_f,
351
352 .group_a = 0x7ffff,
353 .group_b = 0x0f,
354 .group_c = 0,
355 .group_d = 0x601ff,
356 .group_e = 0,
357 .group_f = 0x90,
358
200 .gpio_g_in = 0x01ffffff, 359 .gpio_g_in = 0x01ffffff,
201 .gpio_g_out = 0x07ffffff, 360 .gpio_g_out = 0x07ffffff,
202 .gpio_b = 0x80 361 .gpio_b = 0x80
203 }, 362 },
204 { 363 {
205 .ioif = if_ata, 364 .ioif = if_ata,
365 .name = "ata",
206 .groups = group_a | group_b | group_c | group_d, 366 .groups = group_a | group_b | group_c | group_d,
367
368 .group_a = 0x7ffff,
369 .group_b = 0x0f,
370 .group_c = 0x0f,
371 .group_d = 0x7cfff,
372 .group_e = 0,
373 .group_f = 0,
374
207 .gpio_g_in = 0xf9ffffff, 375 .gpio_g_in = 0xf9ffffff,
208 .gpio_g_out = 0xffffffff, 376 .gpio_g_out = 0xffffffff,
209 .gpio_b = 0x80 377 .gpio_b = 0x80
210 }, 378 },
211 { 379 {
212 .ioif = if_csp, 380 .ioif = if_csp,
213 .groups = group_f, /* if_csp and if_i2c can be used simultaneously */ 381 .name = "csp",
382 .groups = group_f,
383
384 .group_a = 0,
385 .group_b = 0,
386 .group_c = 0,
387 .group_d = 0,
388 .group_e = 0,
389 .group_f = 0xfc,
390
214 .gpio_g_in = 0x00000000, 391 .gpio_g_in = 0x00000000,
215 .gpio_g_out = 0x00000000, 392 .gpio_g_out = 0x00000000,
216 .gpio_b = 0xfc 393 .gpio_b = 0xfc
217 }, 394 },
218 { 395 {
219 .ioif = if_i2c, 396 .ioif = if_i2c,
220 .groups = group_f, /* if_csp and if_i2c can be used simultaneously */ 397 .name = "i2c",
398 .groups = group_f,
399
400 .group_a = 0,
401 .group_b = 0,
402 .group_c = 0,
403 .group_d = 0,
404 .group_e = 0,
405 .group_f = 0x03,
406
221 .gpio_g_in = 0x00000000, 407 .gpio_g_in = 0x00000000,
222 .gpio_g_out = 0x00000000, 408 .gpio_g_out = 0x00000000,
223 .gpio_b = 0x03 409 .gpio_b = 0x03
224 }, 410 },
225 { 411 {
226 .ioif = if_usb_1, 412 .ioif = if_usb_1,
413 .name = "usb_1",
227 .groups = group_e | group_f, 414 .groups = group_e | group_f,
415
416 .group_a = 0,
417 .group_b = 0,
418 .group_c = 0,
419 .group_d = 0,
420 .group_e = 0x0f,
421 .group_f = 0x2c,
422
228 .gpio_g_in = 0x00000000, 423 .gpio_g_in = 0x00000000,
229 .gpio_g_out = 0x00000000, 424 .gpio_g_out = 0x00000000,
230 .gpio_b = 0x2c 425 .gpio_b = 0x2c
231 }, 426 },
232 { 427 {
233 .ioif = if_usb_2, 428 .ioif = if_usb_2,
429 .name = "usb_2",
234 .groups = group_d, 430 .groups = group_d,
235 .gpio_g_in = 0x0e000000, 431
236 .gpio_g_out = 0x3c000000, 432 .group_a = 0,
433 .group_b = 0,
434 .group_c = 0,
435 .group_d = 0,
436 .group_e = 0x33e00,
437 .group_f = 0,
438
439 .gpio_g_in = 0x3e000000,
440 .gpio_g_out = 0x0c000000,
237 .gpio_b = 0x00 441 .gpio_b = 0x00
238 }, 442 },
239 /* GPIO pins */ 443 /* GPIO pins */
240 { 444 {
241 .ioif = if_gpio_grp_a, 445 .ioif = if_gpio_grp_a,
446 .name = "gpio_a",
242 .groups = group_a, 447 .groups = group_a,
448
449 .group_a = 0,
450 .group_b = 0,
451 .group_c = 0,
452 .group_d = 0,
453 .group_e = 0,
454 .group_f = 0,
455
243 .gpio_g_in = 0x0000ff3f, 456 .gpio_g_in = 0x0000ff3f,
244 .gpio_g_out = 0x0000ff3f, 457 .gpio_g_out = 0x0000ff3f,
245 .gpio_b = 0x00 458 .gpio_b = 0x00
246 }, 459 },
247 { 460 {
248 .ioif = if_gpio_grp_b, 461 .ioif = if_gpio_grp_b,
462 .name = "gpio_b",
249 .groups = group_b, 463 .groups = group_b,
464
465 .group_a = 0,
466 .group_b = 0,
467 .group_c = 0,
468 .group_d = 0,
469 .group_e = 0,
470 .group_f = 0,
471
250 .gpio_g_in = 0x000000c0, 472 .gpio_g_in = 0x000000c0,
251 .gpio_g_out = 0x000000c0, 473 .gpio_g_out = 0x000000c0,
252 .gpio_b = 0x00 474 .gpio_b = 0x00
253 }, 475 },
254 { 476 {
255 .ioif = if_gpio_grp_c, 477 .ioif = if_gpio_grp_c,
478 .name = "gpio_c",
256 .groups = group_c, 479 .groups = group_c,
480
481 .group_a = 0,
482 .group_b = 0,
483 .group_c = 0,
484 .group_d = 0,
485 .group_e = 0,
486 .group_f = 0,
487
257 .gpio_g_in = 0xc0000000, 488 .gpio_g_in = 0xc0000000,
258 .gpio_g_out = 0xc0000000, 489 .gpio_g_out = 0xc0000000,
259 .gpio_b = 0x00 490 .gpio_b = 0x00
260 }, 491 },
261 { 492 {
262 .ioif = if_gpio_grp_d, 493 .ioif = if_gpio_grp_d,
494 .name = "gpio_d",
263 .groups = group_d, 495 .groups = group_d,
496
497 .group_a = 0,
498 .group_b = 0,
499 .group_c = 0,
500 .group_d = 0,
501 .group_e = 0,
502 .group_f = 0,
503
264 .gpio_g_in = 0x3fff0000, 504 .gpio_g_in = 0x3fff0000,
265 .gpio_g_out = 0x3fff0000, 505 .gpio_g_out = 0x3fff0000,
266 .gpio_b = 0x00 506 .gpio_b = 0x00
267 }, 507 },
268 { 508 {
269 .ioif = if_gpio_grp_e, 509 .ioif = if_gpio_grp_e,
510 .name = "gpio_e",
270 .groups = group_e, 511 .groups = group_e,
512
513 .group_a = 0,
514 .group_b = 0,
515 .group_c = 0,
516 .group_d = 0,
517 .group_e = 0,
518 .group_f = 0,
519
271 .gpio_g_in = 0x00000000, 520 .gpio_g_in = 0x00000000,
272 .gpio_g_out = 0x00000000, 521 .gpio_g_out = 0x00000000,
273 .gpio_b = 0x00 522 .gpio_b = 0x00
274 }, 523 },
275 { 524 {
276 .ioif = if_gpio_grp_f, 525 .ioif = if_gpio_grp_f,
526 .name = "gpio_f",
277 .groups = group_f, 527 .groups = group_f,
528
529 .group_a = 0,
530 .group_b = 0,
531 .group_c = 0,
532 .group_d = 0,
533 .group_e = 0,
534 .group_f = 0,
535
278 .gpio_g_in = 0x00000000, 536 .gpio_g_in = 0x00000000,
279 .gpio_g_out = 0x00000000, 537 .gpio_g_out = 0x00000000,
280 .gpio_b = 0xff 538 .gpio_b = 0xff
@@ -284,11 +542,13 @@ static struct interface interfaces[] = {
284 542
285static struct watcher *watchers = NULL; 543static struct watcher *watchers = NULL;
286 544
545/* The pins that are free to use in the GPIO ports. */
287static unsigned int gpio_in_pins = 0xffffffff; 546static unsigned int gpio_in_pins = 0xffffffff;
288static unsigned int gpio_out_pins = 0xffffffff; 547static unsigned int gpio_out_pins = 0xffffffff;
289static unsigned char gpio_pb_pins = 0xff; 548static unsigned char gpio_pb_pins = 0xff;
290static unsigned char gpio_pa_pins = 0xff; 549static unsigned char gpio_pa_pins = 0xff;
291 550
551/* Identifiers for the owners of the GPIO pins. */
292static enum cris_io_interface gpio_pa_owners[8]; 552static enum cris_io_interface gpio_pa_owners[8];
293static enum cris_io_interface gpio_pb_owners[8]; 553static enum cris_io_interface gpio_pb_owners[8];
294static enum cris_io_interface gpio_pg_owners[32]; 554static enum cris_io_interface gpio_pg_owners[32];
@@ -338,13 +598,15 @@ int cris_request_io_interface(enum cris_io_interface ioif, const char *device_id
338 struct if_group *grp; 598 struct if_group *grp;
339 unsigned char group_set; 599 unsigned char group_set;
340 unsigned long flags; 600 unsigned long flags;
601 int res = 0;
341 602
342 (void)cris_io_interface_init(); 603 (void)cris_io_interface_init();
343 604
344 DBG(printk("cris_request_io_interface(%d, \"%s\")\n", ioif, device_id)); 605 DBG(printk("cris_request_io_interface(%d, \"%s\")\n", ioif, device_id));
345 606
346 if ((ioif >= if_max_interfaces) || (ioif < 0)) { 607 if ((ioif >= if_max_interfaces) || (ioif < 0)) {
347 printk(KERN_CRIT "cris_request_io_interface: Bad interface %u submitted for %s\n", 608 printk(KERN_CRIT "cris_request_io_interface: Bad interface "
609 "%u submitted for %s\n",
348 ioif, 610 ioif,
349 device_id); 611 device_id);
350 return -EINVAL; 612 return -EINVAL;
@@ -353,59 +615,69 @@ int cris_request_io_interface(enum cris_io_interface ioif, const char *device_id
353 local_irq_save(flags); 615 local_irq_save(flags);
354 616
355 if (interfaces[ioif].used) { 617 if (interfaces[ioif].used) {
356 local_irq_restore(flags); 618 printk(KERN_CRIT "cris_io_interface: Cannot allocate interface "
357 printk(KERN_CRIT "cris_io_interface: Cannot allocate interface for %s, in use by %s\n", 619 "%s for %s, in use by %s\n",
620 interfaces[ioif].name,
358 device_id, 621 device_id,
359 interfaces[ioif].owner); 622 interfaces[ioif].owner);
360 return -EBUSY; 623 res = -EBUSY;
624 goto exit;
361 } 625 }
362 626
363 /* Check that all required groups are free before allocating, */ 627 /* Check that all required pins in the used groups are free
628 * before allocating. */
364 group_set = interfaces[ioif].groups; 629 group_set = interfaces[ioif].groups;
365 while (NULL != (grp = get_group(group_set))) { 630 while (NULL != (grp = get_group(group_set))) {
366 if (grp->used) { 631 unsigned int if_group_use = 0;
367 if (grp->group == group_f) { 632
368 if ((if_sync_serial_1 == ioif) || 633 switch (grp->group) {
369 (if_sync_serial_3 == ioif)) { 634 case group_a:
370 if ((grp->owner != if_sync_serial_1) && 635 if_group_use = interfaces[ioif].group_a;
371 (grp->owner != if_sync_serial_3)) { 636 break;
372 local_irq_restore(flags); 637 case group_b:
373 return -EBUSY; 638 if_group_use = interfaces[ioif].group_b;
374 } 639 break;
375 } else if ((if_scsi8_0 == ioif) || 640 case group_c:
376 (if_scsi8_1 == ioif)) { 641 if_group_use = interfaces[ioif].group_c;
377 if ((grp->owner != if_scsi8_0) && 642 break;
378 (grp->owner != if_scsi8_1)) { 643 case group_d:
379 local_irq_restore(flags); 644 if_group_use = interfaces[ioif].group_d;
380 return -EBUSY; 645 break;
381 } 646 case group_e:
382 } 647 if_group_use = interfaces[ioif].group_e;
383 } else { 648 break;
384 local_irq_restore(flags); 649 case group_f:
385 return -EBUSY; 650 if_group_use = interfaces[ioif].group_f;
386 } 651 break;
652 default:
653 BUG_ON(1);
387 } 654 }
655
656 if (if_group_use & grp->used) {
657 printk(KERN_INFO "cris_request_io_interface: group "
658 "%s needed by %s not available\n",
659 grp->name, interfaces[ioif].name);
660 res = -EBUSY;
661 goto exit;
662 }
663
388 group_set = clear_group_from_set(group_set, grp); 664 group_set = clear_group_from_set(group_set, grp);
389 } 665 }
390 666
391 /* Are the required GPIO pins available too? */ 667 /* Are the required GPIO pins available too? */
392 if (((interfaces[ioif].gpio_g_in & gpio_in_pins) != interfaces[ioif].gpio_g_in) || 668 if (((interfaces[ioif].gpio_g_in & gpio_in_pins) !=
393 ((interfaces[ioif].gpio_g_out & gpio_out_pins) != interfaces[ioif].gpio_g_out) || 669 interfaces[ioif].gpio_g_in) ||
394 ((interfaces[ioif].gpio_b & gpio_pb_pins) != interfaces[ioif].gpio_b)) { 670 ((interfaces[ioif].gpio_g_out & gpio_out_pins) !=
395 local_irq_restore(flags); 671 interfaces[ioif].gpio_g_out) ||
396 printk(KERN_CRIT "cris_request_io_interface: Could not get required pins for interface %u\n", 672 ((interfaces[ioif].gpio_b & gpio_pb_pins) !=
397 ioif); 673 interfaces[ioif].gpio_b)) {
398 return -EBUSY; 674 printk(KERN_CRIT "cris_request_io_interface: Could not get "
399 } 675 "required pins for interface %u\n", ioif);
400 676 res = -EBUSY;
401 /* All needed I/O pins and pin groups are free, allocate. */ 677 goto exit;
402 group_set = interfaces[ioif].groups;
403 while (NULL != (grp = get_group(group_set))) {
404 grp->used = 1;
405 grp->owner = ioif;
406 group_set = clear_group_from_set(group_set, grp);
407 } 678 }
408 679
680 /* Check which registers need to be reconfigured. */
409 gens = genconfig_shadow; 681 gens = genconfig_shadow;
410 gens_ii = gen_config_ii_shadow; 682 gens_ii = gen_config_ii_shadow;
411 683
@@ -495,9 +767,43 @@ int cris_request_io_interface(enum cris_io_interface ioif, const char *device_id
495 set_gen_config = 0; 767 set_gen_config = 0;
496 break; 768 break;
497 default: 769 default:
498 panic("cris_request_io_interface: Bad interface %u submitted for %s\n", 770 printk(KERN_INFO "cris_request_io_interface: Bad interface "
499 ioif, 771 "%u submitted for %s\n",
500 device_id); 772 ioif, device_id);
773 res = -EBUSY;
774 goto exit;
775 }
776
777 /* All needed I/O pins and pin groups are free, allocate. */
778 group_set = interfaces[ioif].groups;
779 while (NULL != (grp = get_group(group_set))) {
780 unsigned int if_group_use = 0;
781
782 switch (grp->group) {
783 case group_a:
784 if_group_use = interfaces[ioif].group_a;
785 break;
786 case group_b:
787 if_group_use = interfaces[ioif].group_b;
788 break;
789 case group_c:
790 if_group_use = interfaces[ioif].group_c;
791 break;
792 case group_d:
793 if_group_use = interfaces[ioif].group_d;
794 break;
795 case group_e:
796 if_group_use = interfaces[ioif].group_e;
797 break;
798 case group_f:
799 if_group_use = interfaces[ioif].group_f;
800 break;
801 default:
802 BUG_ON(1);
803 }
804 grp->used |= if_group_use;
805
806 group_set = clear_group_from_set(group_set, grp);
501 } 807 }
502 808
503 interfaces[ioif].used = 1; 809 interfaces[ioif].used = 1;
@@ -516,25 +822,28 @@ int cris_request_io_interface(enum cris_io_interface ioif, const char *device_id
516 *R_GEN_CONFIG_II = gen_config_ii_shadow; 822 *R_GEN_CONFIG_II = gen_config_ii_shadow;
517 } 823 }
518 824
519 DBG(printk("GPIO pins: available before: g_in=0x%08x g_out=0x%08x pb=0x%02x\n", 825 DBG(printk(KERN_DEBUG "GPIO pins: available before: "
520 gpio_in_pins, gpio_out_pins, gpio_pb_pins)); 826 "g_in=0x%08x g_out=0x%08x pb=0x%02x\n",
521 DBG(printk("grabbing pins: g_in=0x%08x g_out=0x%08x pb=0x%02x\n", 827 gpio_in_pins, gpio_out_pins, gpio_pb_pins));
522 interfaces[ioif].gpio_g_in, 828 DBG(printk(KERN_DEBUG
523 interfaces[ioif].gpio_g_out, 829 "grabbing pins: g_in=0x%08x g_out=0x%08x pb=0x%02x\n",
524 interfaces[ioif].gpio_b)); 830 interfaces[ioif].gpio_g_in,
831 interfaces[ioif].gpio_g_out,
832 interfaces[ioif].gpio_b));
525 833
526 gpio_in_pins &= ~interfaces[ioif].gpio_g_in; 834 gpio_in_pins &= ~interfaces[ioif].gpio_g_in;
527 gpio_out_pins &= ~interfaces[ioif].gpio_g_out; 835 gpio_out_pins &= ~interfaces[ioif].gpio_g_out;
528 gpio_pb_pins &= ~interfaces[ioif].gpio_b; 836 gpio_pb_pins &= ~interfaces[ioif].gpio_b;
529 837
530 DBG(printk("GPIO pins: available after: g_in=0x%08x g_out=0x%08x pb=0x%02x\n", 838 DBG(printk(KERN_DEBUG "GPIO pins: available after: "
531 gpio_in_pins, gpio_out_pins, gpio_pb_pins)); 839 "g_in=0x%08x g_out=0x%08x pb=0x%02x\n",
840 gpio_in_pins, gpio_out_pins, gpio_pb_pins));
532 841
842exit:
533 local_irq_restore(flags); 843 local_irq_restore(flags);
534 844 if (res == 0)
535 notify_watchers(); 845 notify_watchers();
536 846 return res;
537 return 0;
538} 847}
539 848
540 849
@@ -560,43 +869,35 @@ void cris_free_io_interface(enum cris_io_interface ioif)
560 } 869 }
561 group_set = interfaces[ioif].groups; 870 group_set = interfaces[ioif].groups;
562 while (NULL != (grp = get_group(group_set))) { 871 while (NULL != (grp = get_group(group_set))) {
563 if (grp->group == group_f) { 872 unsigned int if_group_use = 0;
564 switch (ioif) 873
565 { 874 switch (grp->group) {
566 case if_sync_serial_1: 875 case group_a:
567 if ((grp->owner == if_sync_serial_1) && 876 if_group_use = interfaces[ioif].group_a;
568 interfaces[if_sync_serial_3].used) { 877 break;
569 grp->owner = if_sync_serial_3; 878 case group_b:
570 } else 879 if_group_use = interfaces[ioif].group_b;
571 grp->used = 0; 880 break;
572 break; 881 case group_c:
573 case if_sync_serial_3: 882 if_group_use = interfaces[ioif].group_c;
574 if ((grp->owner == if_sync_serial_3) && 883 break;
575 interfaces[if_sync_serial_1].used) { 884 case group_d:
576 grp->owner = if_sync_serial_1; 885 if_group_use = interfaces[ioif].group_d;
577 } else 886 break;
578 grp->used = 0; 887 case group_e:
579 break; 888 if_group_use = interfaces[ioif].group_e;
580 case if_scsi8_0: 889 break;
581 if ((grp->owner == if_scsi8_0) && 890 case group_f:
582 interfaces[if_scsi8_1].used) { 891 if_group_use = interfaces[ioif].group_f;
583 grp->owner = if_scsi8_1; 892 break;
584 } else 893 default:
585 grp->used = 0; 894 BUG_ON(1);
586 break;
587 case if_scsi8_1:
588 if ((grp->owner == if_scsi8_1) &&
589 interfaces[if_scsi8_0].used) {
590 grp->owner = if_scsi8_0;
591 } else
592 grp->used = 0;
593 break;
594 default:
595 grp->used = 0;
596 }
597 } else {
598 grp->used = 0;
599 } 895 }
896
897 if ((grp->used & if_group_use) != if_group_use)
898 BUG_ON(1);
899 grp->used = grp->used & ~if_group_use;
900
600 group_set = clear_group_from_set(group_set, grp); 901 group_set = clear_group_from_set(group_set, grp);
601 } 902 }
602 interfaces[ioif].used = 0; 903 interfaces[ioif].used = 0;
diff --git a/arch/cris/arch-v10/kernel/irq.c b/arch/cris/arch-v10/kernel/irq.c
index e06ab0050d37..65ed803dae6f 100644
--- a/arch/cris/arch-v10/kernel/irq.c
+++ b/arch/cris/arch-v10/kernel/irq.c
@@ -1,5 +1,4 @@
1/* $Id: irq.c,v 1.4 2005/01/04 12:22:28 starvik Exp $ 1/*
2 *
3 * linux/arch/cris/kernel/irq.c 2 * linux/arch/cris/kernel/irq.c
4 * 3 *
5 * Copyright (c) 2000-2002 Axis Communications AB 4 * Copyright (c) 2000-2002 Axis Communications AB
@@ -18,10 +17,6 @@
18#include <linux/kernel.h> 17#include <linux/kernel.h>
19#include <linux/init.h> 18#include <linux/init.h>
20 19
21/* From kgdb.c. */
22extern void kgdb_init(void);
23extern void breakpoint(void);
24
25#define mask_irq(irq_nr) (*R_VECT_MASK_CLR = 1 << (irq_nr)); 20#define mask_irq(irq_nr) (*R_VECT_MASK_CLR = 1 << (irq_nr));
26#define unmask_irq(irq_nr) (*R_VECT_MASK_SET = 1 << (irq_nr)); 21#define unmask_irq(irq_nr) (*R_VECT_MASK_SET = 1 << (irq_nr));
27 22
diff --git a/arch/cris/arch-v10/kernel/kgdb.c b/arch/cris/arch-v10/kernel/kgdb.c
index 77f4b1423725..a3ca55150745 100644
--- a/arch/cris/arch-v10/kernel/kgdb.c
+++ b/arch/cris/arch-v10/kernel/kgdb.c
@@ -17,66 +17,8 @@
17*! Jun 17 1999 Hendrik Ruijter Added gdb 4.18 support. 'X', 'qC' and 'qL'. 17*! Jun 17 1999 Hendrik Ruijter Added gdb 4.18 support. 'X', 'qC' and 'qL'.
18*! Jul 21 1999 Bjorn Wesen eLinux port 18*! Jul 21 1999 Bjorn Wesen eLinux port
19*! 19*!
20*! $Log: kgdb.c,v $
21*! Revision 1.6 2005/01/14 10:12:17 starvik
22*! KGDB on separate port.
23*! Console fixes from 2.4.
24*!
25*! Revision 1.5 2004/10/07 13:59:08 starvik
26*! Corrected call to set_int_vector
27*!
28*! Revision 1.4 2003/04/09 05:20:44 starvik
29*! Merge of Linux 2.5.67
30*!
31*! Revision 1.3 2003/01/21 19:11:08 starvik
32*! Modified include path for new dir layout
33*!
34*! Revision 1.2 2002/11/19 14:35:24 starvik
35*! Changes from linux 2.4
36*! Changed struct initializer syntax to the currently preferred notation
37*!
38*! Revision 1.1 2001/12/17 13:59:27 bjornw
39*! Initial revision
40*!
41*! Revision 1.6 2001/10/09 13:10:03 matsfg
42*! Added $ on registers and removed some underscores
43*!
44*! Revision 1.5 2001/04/17 13:58:39 orjanf
45*! * Renamed CONFIG_KGDB to CONFIG_ETRAX_KGDB.
46*!
47*! Revision 1.4 2001/02/23 13:45:19 bjornw
48*! config.h check
49*!
50*! Revision 1.3 2001/01/31 18:08:23 orjanf
51*! Removed kgdb_handle_breakpoint from being the break 8 handler.
52*!
53*! Revision 1.2 2001/01/12 14:22:25 orjanf
54*! Updated kernel debugging support to work with ETRAX 100LX.
55*!
56*! Revision 1.1 2000/07/10 16:25:21 bjornw
57*! Initial revision
58*!
59*! Revision 1.1.1.1 1999/12/03 14:57:31 bjornw
60*! * Initial version of arch/cris, the latest CRIS architecture with an MMU.
61*! Mostly copied from arch/etrax100 with appropriate renames of files.
62*! The mm/ subdir is copied from arch/i386.
63*! This does not compile yet at all.
64*!
65*!
66*! Revision 1.4 1999/07/22 17:25:25 bjornw
67*! Dont wait for + in putpacket if we havent hit the initial breakpoint yet. Added a kgdb_init function which sets up the break and irq vectors.
68*!
69*! Revision 1.3 1999/07/21 19:51:18 bjornw
70*! Check if the interrupting char is a ctrl-C, ignore otherwise.
71*!
72*! Revision 1.2 1999/07/21 18:09:39 bjornw
73*! Ported to eLinux architecture, and added some kgdb documentation.
74*!
75*!
76*!--------------------------------------------------------------------------- 20*!---------------------------------------------------------------------------
77*! 21*!
78*! $Id: kgdb.c,v 1.6 2005/01/14 10:12:17 starvik Exp $
79*!
80*! (C) Copyright 1999, Axis Communications AB, LUND, SWEDEN 22*! (C) Copyright 1999, Axis Communications AB, LUND, SWEDEN
81*! 23*!
82*!**************************************************************************/ 24*!**************************************************************************/
diff --git a/arch/cris/arch-v10/kernel/process.c b/arch/cris/arch-v10/kernel/process.c
index 1a3760c94f85..53117f07cc1a 100644
--- a/arch/cris/arch-v10/kernel/process.c
+++ b/arch/cris/arch-v10/kernel/process.c
@@ -1,5 +1,4 @@
1/* $Id: process.c,v 1.12 2004/12/27 11:18:32 starvik Exp $ 1/*
2 *
3 * linux/arch/cris/kernel/process.c 2 * linux/arch/cris/kernel/process.c
4 * 3 *
5 * Copyright (C) 1995 Linus Torvalds 4 * Copyright (C) 1995 Linus Torvalds
diff --git a/arch/cris/arch-v10/kernel/ptrace.c b/arch/cris/arch-v10/kernel/ptrace.c
index b570ae9b6cad..ee505b2eb4db 100644
--- a/arch/cris/arch-v10/kernel/ptrace.c
+++ b/arch/cris/arch-v10/kernel/ptrace.c
@@ -65,6 +65,7 @@ void
65ptrace_disable(struct task_struct *child) 65ptrace_disable(struct task_struct *child)
66{ 66{
67 /* Todo - pending singlesteps? */ 67 /* Todo - pending singlesteps? */
68 clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
68} 69}
69 70
70/* 71/*
diff --git a/arch/cris/arch-v10/kernel/shadows.c b/arch/cris/arch-v10/kernel/shadows.c
index 326178aef6ee..2454a0b02f54 100644
--- a/arch/cris/arch-v10/kernel/shadows.c
+++ b/arch/cris/arch-v10/kernel/shadows.c
@@ -1,5 +1,4 @@
1/* $Id: shadows.c,v 1.2 2004/12/13 12:21:51 starvik Exp $ 1/*
2 *
3 * Various shadow registers. Defines for these are in include/asm-etrax100/io.h 2 * Various shadow registers. Defines for these are in include/asm-etrax100/io.h
4 */ 3 */
5 4
diff --git a/arch/cris/arch-v10/kernel/traps.c b/arch/cris/arch-v10/kernel/traps.c
index 4becc1bcced9..9eada5d8893b 100644
--- a/arch/cris/arch-v10/kernel/traps.c
+++ b/arch/cris/arch-v10/kernel/traps.c
@@ -1,13 +1,10 @@
1/* $Id: traps.c,v 1.4 2005/04/24 18:47:55 starvik Exp $ 1/*
2 * Helper functions for trap handlers
2 * 3 *
3 * linux/arch/cris/arch-v10/traps.c 4 * Copyright (C) 2000-2007, Axis Communications AB.
4 * 5 *
5 * Heler functions for trap handlers 6 * Authors: Bjorn Wesen
6 * 7 * Hans-Peter Nilsson
7 * Copyright (C) 2000-2002 Axis Communications AB
8 *
9 * Authors: Bjorn Wesen
10 * Hans-Peter Nilsson
11 * 8 *
12 */ 9 */
13 10
@@ -15,124 +12,119 @@
15#include <asm/uaccess.h> 12#include <asm/uaccess.h>
16#include <asm/arch/sv_addr_ag.h> 13#include <asm/arch/sv_addr_ag.h>
17 14
18extern int raw_printk(const char *fmt, ...); 15void
19 16show_registers(struct pt_regs *regs)
20void
21show_registers(struct pt_regs * regs)
22{ 17{
23 /* We either use rdusp() - the USP register, which might not 18 /*
24 correspond to the current process for all cases we're called, 19 * It's possible to use either the USP register or current->thread.usp.
25 or we use the current->thread.usp, which is not up to date for 20 * USP might not correspond to the current process for all cases this
26 the current process. Experience shows we want the USP 21 * function is called, and current->thread.usp isn't up to date for the
27 register. */ 22 * current process. Experience shows that using USP is the way to go.
23 */
28 unsigned long usp = rdusp(); 24 unsigned long usp = rdusp();
29 25
30 raw_printk("IRP: %08lx SRP: %08lx DCCR: %08lx USP: %08lx MOF: %08lx\n", 26 printk("IRP: %08lx SRP: %08lx DCCR: %08lx USP: %08lx MOF: %08lx\n",
31 regs->irp, regs->srp, regs->dccr, usp, regs->mof ); 27 regs->irp, regs->srp, regs->dccr, usp, regs->mof);
32 raw_printk(" r0: %08lx r1: %08lx r2: %08lx r3: %08lx\n", 28
29 printk(" r0: %08lx r1: %08lx r2: %08lx r3: %08lx\n",
33 regs->r0, regs->r1, regs->r2, regs->r3); 30 regs->r0, regs->r1, regs->r2, regs->r3);
34 raw_printk(" r4: %08lx r5: %08lx r6: %08lx r7: %08lx\n", 31
32 printk(" r4: %08lx r5: %08lx r6: %08lx r7: %08lx\n",
35 regs->r4, regs->r5, regs->r6, regs->r7); 33 regs->r4, regs->r5, regs->r6, regs->r7);
36 raw_printk(" r8: %08lx r9: %08lx r10: %08lx r11: %08lx\n", 34
35 printk(" r8: %08lx r9: %08lx r10: %08lx r11: %08lx\n",
37 regs->r8, regs->r9, regs->r10, regs->r11); 36 regs->r8, regs->r9, regs->r10, regs->r11);
38 raw_printk("r12: %08lx r13: %08lx oR10: %08lx sp: %08lx\n", 37
39 regs->r12, regs->r13, regs->orig_r10, regs); 38 printk("r12: %08lx r13: %08lx oR10: %08lx sp: %08lx\n",
40 raw_printk("R_MMU_CAUSE: %08lx\n", (unsigned long)*R_MMU_CAUSE); 39 regs->r12, regs->r13, regs->orig_r10, (long unsigned)regs);
41 raw_printk("Process %s (pid: %d, stackpage=%08lx)\n", 40
41 printk("R_MMU_CAUSE: %08lx\n", (unsigned long)*R_MMU_CAUSE);
42
43 printk("Process %s (pid: %d, stackpage=%08lx)\n",
42 current->comm, current->pid, (unsigned long)current); 44 current->comm, current->pid, (unsigned long)current);
43 45
44 /* 46 /*
45 * When in-kernel, we also print out the stack and code at the 47 * When in-kernel, we also print out the stack and code at the
46 * time of the fault.. 48 * time of the fault..
47 */ 49 */
48 if (! user_mode(regs)) { 50 if (!user_mode(regs)) {
49 int i; 51 int i;
50 52
51 show_stack(NULL, (unsigned long*)usp); 53 show_stack(NULL, (unsigned long *)usp);
52 54
53 /* Dump kernel stack if the previous dump wasn't one. */ 55 /*
56 * If the previous stack-dump wasn't a kernel one, dump the
57 * kernel stack now.
58 */
54 if (usp != 0) 59 if (usp != 0)
55 show_stack (NULL, NULL); 60 show_stack(NULL, NULL);
56 61
57 raw_printk("\nCode: "); 62 printk("\nCode: ");
58 if(regs->irp < PAGE_OFFSET) 63
59 goto bad; 64 if (regs->irp < PAGE_OFFSET)
60 65 goto bad_value;
61 /* Often enough the value at regs->irp does not point to 66
62 the interesting instruction, which is most often the 67 /*
63 _previous_ instruction. So we dump at an offset large 68 * Quite often the value at regs->irp doesn't point to the
64 enough that instruction decoding should be in sync at 69 * interesting instruction, which often is the previous
65 the interesting point, but small enough to fit on a row 70 * instruction. So dump at an offset large enough that the
66 (sort of). We point out the regs->irp location in a 71 * instruction decoding should be in sync at the interesting
67 ksymoops-friendly way by wrapping the byte for that 72 * point, but small enough to fit on a row. The regs->irp
68 address in parentheses. */ 73 * location is pointed out in a ksymoops-friendly way by
69 for(i = -12; i < 12; i++) 74 * wrapping the byte for that address in parenthesises.
70 { 75 */
71 unsigned char c; 76 for (i = -12; i < 12; i++) {
72 if(__get_user(c, &((unsigned char*)regs->irp)[i])) { 77 unsigned char c;
73bad: 78
74 raw_printk(" Bad IP value."); 79 if (__get_user(c, &((unsigned char *)regs->irp)[i])) {
75 break; 80bad_value:
76 } 81 printk(" Bad IP value.");
82 break;
83 }
77 84
78 if (i == 0) 85 if (i == 0)
79 raw_printk("(%02x) ", c); 86 printk("(%02x) ", c);
80 else 87 else
81 raw_printk("%02x ", c); 88 printk("%02x ", c);
82 } 89 }
83 raw_printk("\n"); 90 printk("\n");
84 } 91 }
85} 92}
86 93
87/* Called from entry.S when the watchdog has bitten
88 * We print out something resembling an oops dump, and if
89 * we have the nice doggy development flag set, we halt here
90 * instead of rebooting.
91 */
92
93extern void reset_watchdog(void);
94extern void stop_watchdog(void);
95
96
97void 94void
98watchdog_bite_hook(struct pt_regs *regs) 95arch_enable_nmi(void)
99{ 96{
100#ifdef CONFIG_ETRAX_WATCHDOG_NICE_DOGGY 97 asm volatile ("setf m");
101 local_irq_disable();
102 stop_watchdog();
103 show_registers(regs);
104 while(1) /* nothing */;
105#else
106 show_registers(regs);
107#endif
108} 98}
109 99
110/* This is normally the 'Oops' routine */ 100extern void (*nmi_handler)(struct pt_regs *);
111void 101void handle_nmi(struct pt_regs *regs)
112die_if_kernel(const char * str, struct pt_regs * regs, long err)
113{ 102{
114 if(user_mode(regs)) 103 if (nmi_handler)
115 return; 104 nmi_handler(regs);
116 105
117#ifdef CONFIG_ETRAX_WATCHDOG_NICE_DOGGY 106 /* Wait until nmi is no longer active. (We enable NMI immediately after
118 /* This printout might take too long and trigger the 107 returning from this function, and we don't want it happening while
119 * watchdog normally. If we're in the nice doggy 108 exiting from the NMI interrupt handler.) */
120 * development mode, stop the watchdog during printout. 109 while (*R_IRQ_MASK0_RD & IO_STATE(R_IRQ_MASK0_RD, nmi_pin, active))
121 */ 110 ;
122 stop_watchdog();
123#endif
124
125 raw_printk("%s: %04lx\n", str, err & 0xffff);
126
127 show_registers(regs);
128
129#ifdef CONFIG_ETRAX_WATCHDOG_NICE_DOGGY
130 reset_watchdog();
131#endif
132 do_exit(SIGSEGV);
133} 111}
134 112
135void arch_enable_nmi(void) 113#ifdef CONFIG_DEBUG_BUGVERBOSE
114void
115handle_BUG(struct pt_regs *regs)
136{ 116{
137 asm volatile("setf m"); 117 struct bug_frame f;
118 unsigned char c;
119 unsigned long irp = regs->irp;
120
121 if (__copy_from_user(&f, (const void __user *)(irp - 8), sizeof f))
122 return;
123 if (f.prefix != BUG_PREFIX || f.magic != BUG_MAGIC)
124 return;
125 if (__get_user(c, f.filename))
126 f.filename = "<bad filename>";
127
128 printk("kernel BUG at %s:%d!\n", f.filename, f.line);
138} 129}
130#endif
diff --git a/arch/cris/arch-v10/lib/checksum.S b/arch/cris/arch-v10/lib/checksum.S
index 85c48f0a9ec2..7d552f4bd5ae 100644
--- a/arch/cris/arch-v10/lib/checksum.S
+++ b/arch/cris/arch-v10/lib/checksum.S
@@ -1,4 +1,4 @@
1/* $Id: checksum.S,v 1.1 2001/12/17 13:59:27 bjornw Exp $ 1/*
2 * A fast checksum routine using movem 2 * A fast checksum routine using movem
3 * Copyright (c) 1998-2001 Axis Communications AB 3 * Copyright (c) 1998-2001 Axis Communications AB
4 * 4 *
@@ -61,8 +61,6 @@ _mloop: movem [$r10+],$r9 ; read 10 longwords
61 61
62 ax 62 ax
63 addq 0,$r12 63 addq 0,$r12
64 ax ; do it again, since we might have generated a carry
65 addq 0,$r12
66 64
67 subq 10*4,$r11 65 subq 10*4,$r11
68 bge _mloop 66 bge _mloop
@@ -88,10 +86,6 @@ _word_loop:
88 lsrq 16,$r13 ; r13 = checksum >> 16 86 lsrq 16,$r13 ; r13 = checksum >> 16
89 and.d $r9,$r12 ; checksum = checksum & 0xffff 87 and.d $r9,$r12 ; checksum = checksum & 0xffff
90 add.d $r13,$r12 ; checksum += r13 88 add.d $r13,$r12 ; checksum += r13
91 move.d $r12,$r13 ; do the same again, maybe we got a carry last add
92 lsrq 16,$r13
93 and.d $r9,$r12
94 add.d $r13,$r12
95 89
96_no_fold: 90_no_fold:
97 cmpq 2,$r11 91 cmpq 2,$r11
diff --git a/arch/cris/arch-v10/lib/checksumcopy.S b/arch/cris/arch-v10/lib/checksumcopy.S
index 35cbffb306fd..540db8a5f849 100644
--- a/arch/cris/arch-v10/lib/checksumcopy.S
+++ b/arch/cris/arch-v10/lib/checksumcopy.S
@@ -1,4 +1,4 @@
1/* $Id: checksumcopy.S,v 1.1 2001/12/17 13:59:27 bjornw Exp $ 1/*
2 * A fast checksum+copy routine using movem 2 * A fast checksum+copy routine using movem
3 * Copyright (c) 1998, 2001 Axis Communications AB 3 * Copyright (c) 1998, 2001 Axis Communications AB
4 * 4 *
@@ -67,8 +67,6 @@ _mloop: movem [$r10+],$r9 ; read 10 longwords
67 67
68 ax 68 ax
69 addq 0,$r13 69 addq 0,$r13
70 ax ; do it again, since we might have generated a carry
71 addq 0,$r13
72 70
73 subq 10*4,$r12 71 subq 10*4,$r12
74 bge _mloop 72 bge _mloop
@@ -91,10 +89,6 @@ _word_loop:
91 lsrq 16,$r9 ; r0 = checksum >> 16 89 lsrq 16,$r9 ; r0 = checksum >> 16
92 and.d 0xffff,$r13 ; checksum = checksum & 0xffff 90 and.d 0xffff,$r13 ; checksum = checksum & 0xffff
93 add.d $r9,$r13 ; checksum += r0 91 add.d $r9,$r13 ; checksum += r0
94 move.d $r13,$r9 ; do the same again, maybe we got a carry last add
95 lsrq 16,$r9
96 and.d 0xffff,$r13
97 add.d $r9,$r13
98 92
99_no_fold: 93_no_fold:
100 cmpq 2,$r12 94 cmpq 2,$r12
diff --git a/arch/cris/arch-v10/lib/dram_init.S b/arch/cris/arch-v10/lib/dram_init.S
index 6a6bdfd6984d..b9190ff7d0a4 100644
--- a/arch/cris/arch-v10/lib/dram_init.S
+++ b/arch/cris/arch-v10/lib/dram_init.S
@@ -1,5 +1,4 @@
1/* $Id: dram_init.S,v 1.4 2003/09/22 09:21:59 starvik Exp $ 1/*
2 *
3 * DRAM/SDRAM initialization - alter with care 2 * DRAM/SDRAM initialization - alter with care
4 * This file is intended to be included from other assembler files 3 * This file is intended to be included from other assembler files
5 * 4 *
@@ -8,60 +7,7 @@
8 * 7 *
9 * Copyright (C) 2000, 2001 Axis Communications AB 8 * Copyright (C) 2000, 2001 Axis Communications AB
10 * 9 *
11 * Authors: Mikael Starvik (starvik@axis.com) 10 * Authors: Mikael Starvik (starvik@axis.com)
12 *
13 * $Log: dram_init.S,v $
14 * Revision 1.4 2003/09/22 09:21:59 starvik
15 * Decompresser is linked to 0x407xxxxx and sdram commands are at 0x000xxxxx
16 * so we need to mask off 12 bits.
17 *
18 * Revision 1.3 2003/03/31 09:38:37 starvik
19 * Corrected calculation of end of sdram init commands
20 *
21 * Revision 1.2 2002/11/19 13:33:29 starvik
22 * Changes from Linux 2.4
23 *
24 * Revision 1.13 2002/10/30 07:42:28 starvik
25 * Always read SDRAM command sequence from flash
26 *
27 * Revision 1.12 2002/08/09 11:37:37 orjanf
28 * Added double initialization work-around for Samsung SDRAMs.
29 *
30 * Revision 1.11 2002/06/04 11:43:21 starvik
31 * Check if mrs_data is specified in kernelconfig (necessary for MCM)
32 *
33 * Revision 1.10 2001/10/04 12:00:21 martinnn
34 * Added missing underscores.
35 *
36 * Revision 1.9 2001/10/01 14:47:35 bjornw
37 * Added register prefixes and removed underscores
38 *
39 * Revision 1.8 2001/05/15 07:12:45 hp
40 * Copy warning from head.S about r8 and r9
41 *
42 * Revision 1.7 2001/04/18 12:05:39 bjornw
43 * Fixed comments, and explicitly include config.h to be sure its there
44 *
45 * Revision 1.6 2001/04/10 06:20:16 starvik
46 * Delay should be 200us, not 200ns
47 *
48 * Revision 1.5 2001/04/09 06:01:13 starvik
49 * Added support for 100 MHz SDRAMs
50 *
51 * Revision 1.4 2001/03/26 14:24:01 bjornw
52 * Namechange of some config options
53 *
54 * Revision 1.3 2001/03/23 08:29:41 starvik
55 * Corrected calculation of mrs_data
56 *
57 * Revision 1.2 2001/02/08 15:20:00 starvik
58 * Corrected SDRAM initialization
59 * Should now be included as inline
60 *
61 * Revision 1.1 2001/01/29 13:08:02 starvik
62 * Initial version
63 * This file should be included from all assembler files that needs to
64 * initialize DRAM/SDRAM.
65 * 11 *
66 */ 12 */
67 13
diff --git a/arch/cris/arch-v10/lib/old_checksum.c b/arch/cris/arch-v10/lib/old_checksum.c
index 497634a64829..1734b467efa6 100644
--- a/arch/cris/arch-v10/lib/old_checksum.c
+++ b/arch/cris/arch-v10/lib/old_checksum.c
@@ -1,5 +1,4 @@
1/* $Id: old_checksum.c,v 1.3 2003/10/27 08:04:32 starvik Exp $ 1/*
2 *
3 * INET An implementation of the TCP/IP protocol suite for the LINUX 2 * INET An implementation of the TCP/IP protocol suite for the LINUX
4 * operating system. INET is implemented using the BSD Socket 3 * operating system. INET is implemented using the BSD Socket
5 * interface as the means of communication with the user level. 4 * interface as the means of communication with the user level.
diff --git a/arch/cris/arch-v10/mm/fault.c b/arch/cris/arch-v10/mm/fault.c
index fe2615022b97..65504fd80928 100644
--- a/arch/cris/arch-v10/mm/fault.c
+++ b/arch/cris/arch-v10/mm/fault.c
@@ -4,10 +4,10 @@
4 * Low level bus fault handler 4 * Low level bus fault handler
5 * 5 *
6 * 6 *
7 * Copyright (C) 2000, 2001 Axis Communications AB 7 * Copyright (C) 2000-2007 Axis Communications AB
8 *
9 * Authors: Bjorn Wesen
8 * 10 *
9 * Authors: Bjorn Wesen
10 *
11 */ 11 */
12 12
13#include <linux/mm.h> 13#include <linux/mm.h>
@@ -60,7 +60,7 @@ handle_mmu_bus_fault(struct pt_regs *regs)
60#ifdef DEBUG 60#ifdef DEBUG
61 page_id = IO_EXTRACT(R_MMU_CAUSE, page_id, cause); 61 page_id = IO_EXTRACT(R_MMU_CAUSE, page_id, cause);
62 acc = IO_EXTRACT(R_MMU_CAUSE, acc_excp, cause); 62 acc = IO_EXTRACT(R_MMU_CAUSE, acc_excp, cause);
63 inv = IO_EXTRACT(R_MMU_CAUSE, inv_excp, cause); 63 inv = IO_EXTRACT(R_MMU_CAUSE, inv_excp, cause);
64 index = IO_EXTRACT(R_TLB_SELECT, index, select); 64 index = IO_EXTRACT(R_TLB_SELECT, index, select);
65#endif 65#endif
66 miss = IO_EXTRACT(R_MMU_CAUSE, miss_excp, cause); 66 miss = IO_EXTRACT(R_MMU_CAUSE, miss_excp, cause);
@@ -84,12 +84,13 @@ handle_mmu_bus_fault(struct pt_regs *regs)
84 local_irq_disable(); 84 local_irq_disable();
85 pmd = (pmd_t *)(pgd + pgd_index(address)); 85 pmd = (pmd_t *)(pgd + pgd_index(address));
86 if (pmd_none(*pmd)) 86 if (pmd_none(*pmd))
87 return; 87 goto exit;
88 pte = *pte_offset_kernel(pmd, address); 88 pte = *pte_offset_kernel(pmd, address);
89 if (!pte_present(pte)) 89 if (!pte_present(pte))
90 return; 90 goto exit;
91 *R_TLB_SELECT = select; 91 *R_TLB_SELECT = select;
92 *R_TLB_HI = cause; 92 *R_TLB_HI = cause;
93 *R_TLB_LO = pte_val(pte); 93 *R_TLB_LO = pte_val(pte);
94exit:
94 local_irq_restore(flags); 95 local_irq_restore(flags);
95} 96}
diff --git a/arch/cris/arch-v10/mm/tlb.c b/arch/cris/arch-v10/mm/tlb.c
index 7d9fec88dee5..6baf5bd209e7 100644
--- a/arch/cris/arch-v10/mm/tlb.c
+++ b/arch/cris/arch-v10/mm/tlb.c
@@ -4,8 +4,8 @@
4 * Low level TLB handling 4 * Low level TLB handling
5 * 5 *
6 * 6 *
7 * Copyright (C) 2000-2002 Axis Communications AB 7 * Copyright (C) 2000-2007 Axis Communications AB
8 * 8 *
9 * Authors: Bjorn Wesen (bjornw@axis.com) 9 * Authors: Bjorn Wesen (bjornw@axis.com)
10 * 10 *
11 */ 11 */
@@ -39,7 +39,7 @@ flush_tlb_all(void)
39 unsigned long flags; 39 unsigned long flags;
40 40
41 /* the vpn of i & 0xf is so we dont write similar TLB entries 41 /* the vpn of i & 0xf is so we dont write similar TLB entries
42 * in the same 4-way entry group. details.. 42 * in the same 4-way entry group. details...
43 */ 43 */
44 44
45 local_irq_save(flags); 45 local_irq_save(flags);
@@ -47,7 +47,7 @@ flush_tlb_all(void)
47 *R_TLB_SELECT = ( IO_FIELD(R_TLB_SELECT, index, i) ); 47 *R_TLB_SELECT = ( IO_FIELD(R_TLB_SELECT, index, i) );
48 *R_TLB_HI = ( IO_FIELD(R_TLB_HI, page_id, INVALID_PAGEID ) | 48 *R_TLB_HI = ( IO_FIELD(R_TLB_HI, page_id, INVALID_PAGEID ) |
49 IO_FIELD(R_TLB_HI, vpn, i & 0xf ) ); 49 IO_FIELD(R_TLB_HI, vpn, i & 0xf ) );
50 50
51 *R_TLB_LO = ( IO_STATE(R_TLB_LO, global,no ) | 51 *R_TLB_LO = ( IO_STATE(R_TLB_LO, global,no ) |
52 IO_STATE(R_TLB_LO, valid, no ) | 52 IO_STATE(R_TLB_LO, valid, no ) |
53 IO_STATE(R_TLB_LO, kernel,no ) | 53 IO_STATE(R_TLB_LO, kernel,no ) |
@@ -71,10 +71,10 @@ flush_tlb_mm(struct mm_struct *mm)
71 71
72 if(page_id == NO_CONTEXT) 72 if(page_id == NO_CONTEXT)
73 return; 73 return;
74 74
75 /* mark the TLB entries that match the page_id as invalid. 75 /* mark the TLB entries that match the page_id as invalid.
76 * here we could also check the _PAGE_GLOBAL bit and NOT flush 76 * here we could also check the _PAGE_GLOBAL bit and NOT flush
77 * global pages. is it worth the extra I/O ? 77 * global pages. is it worth the extra I/O ?
78 */ 78 */
79 79
80 local_irq_save(flags); 80 local_irq_save(flags);
@@ -83,7 +83,7 @@ flush_tlb_mm(struct mm_struct *mm)
83 if (IO_EXTRACT(R_TLB_HI, page_id, *R_TLB_HI) == page_id) { 83 if (IO_EXTRACT(R_TLB_HI, page_id, *R_TLB_HI) == page_id) {
84 *R_TLB_HI = ( IO_FIELD(R_TLB_HI, page_id, INVALID_PAGEID ) | 84 *R_TLB_HI = ( IO_FIELD(R_TLB_HI, page_id, INVALID_PAGEID ) |
85 IO_FIELD(R_TLB_HI, vpn, i & 0xf ) ); 85 IO_FIELD(R_TLB_HI, vpn, i & 0xf ) );
86 86
87 *R_TLB_LO = ( IO_STATE(R_TLB_LO, global,no ) | 87 *R_TLB_LO = ( IO_STATE(R_TLB_LO, global,no ) |
88 IO_STATE(R_TLB_LO, valid, no ) | 88 IO_STATE(R_TLB_LO, valid, no ) |
89 IO_STATE(R_TLB_LO, kernel,no ) | 89 IO_STATE(R_TLB_LO, kernel,no ) |
@@ -96,9 +96,7 @@ flush_tlb_mm(struct mm_struct *mm)
96 96
97/* invalidate a single page */ 97/* invalidate a single page */
98 98
99void 99void flush_tlb_page(struct vm_area_struct *vma, unsigned long addr)
100flush_tlb_page(struct vm_area_struct *vma,
101 unsigned long addr)
102{ 100{
103 struct mm_struct *mm = vma->vm_mm; 101 struct mm_struct *mm = vma->vm_mm;
104 int page_id = mm->context.page_id; 102 int page_id = mm->context.page_id;
@@ -113,7 +111,7 @@ flush_tlb_page(struct vm_area_struct *vma,
113 addr &= PAGE_MASK; /* perhaps not necessary */ 111 addr &= PAGE_MASK; /* perhaps not necessary */
114 112
115 /* invalidate those TLB entries that match both the mm context 113 /* invalidate those TLB entries that match both the mm context
116 * and the virtual address requested 114 * and the virtual address requested
117 */ 115 */
118 116
119 local_irq_save(flags); 117 local_irq_save(flags);
@@ -125,7 +123,7 @@ flush_tlb_page(struct vm_area_struct *vma,
125 (tlb_hi & PAGE_MASK) == addr) { 123 (tlb_hi & PAGE_MASK) == addr) {
126 *R_TLB_HI = IO_FIELD(R_TLB_HI, page_id, INVALID_PAGEID ) | 124 *R_TLB_HI = IO_FIELD(R_TLB_HI, page_id, INVALID_PAGEID ) |
127 addr; /* same addr as before works. */ 125 addr; /* same addr as before works. */
128 126
129 *R_TLB_LO = ( IO_STATE(R_TLB_LO, global,no ) | 127 *R_TLB_LO = ( IO_STATE(R_TLB_LO, global,no ) |
130 IO_STATE(R_TLB_LO, valid, no ) | 128 IO_STATE(R_TLB_LO, valid, no ) |
131 IO_STATE(R_TLB_LO, kernel,no ) | 129 IO_STATE(R_TLB_LO, kernel,no ) |
@@ -144,7 +142,7 @@ dump_tlb_all(void)
144{ 142{
145 int i; 143 int i;
146 unsigned long flags; 144 unsigned long flags;
147 145
148 printk("TLB dump. LO is: pfn | reserved | global | valid | kernel | we |\n"); 146 printk("TLB dump. LO is: pfn | reserved | global | valid | kernel | we |\n");
149 147
150 local_save_flags(flags); 148 local_save_flags(flags);
@@ -172,27 +170,29 @@ init_new_context(struct task_struct *tsk, struct mm_struct *mm)
172 170
173/* called in schedule() just before actually doing the switch_to */ 171/* called in schedule() just before actually doing the switch_to */
174 172
175void 173void switch_mm(struct mm_struct *prev, struct mm_struct *next,
176switch_mm(struct mm_struct *prev, struct mm_struct *next, 174 struct task_struct *tsk)
177 struct task_struct *tsk)
178{ 175{
179 /* make sure we have a context */ 176 if (prev != next) {
177 /* make sure we have a context */
178 get_mmu_context(next);
180 179
181 get_mmu_context(next); 180 /* remember the pgd for the fault handlers
181 * this is similar to the pgd register in some other CPU's.
182 * we need our own copy of it because current and active_mm
183 * might be invalid at points where we still need to derefer
184 * the pgd.
185 */
182 186
183 /* remember the pgd for the fault handlers 187 per_cpu(current_pgd, smp_processor_id()) = next->pgd;
184 * this is similar to the pgd register in some other CPU's.
185 * we need our own copy of it because current and active_mm
186 * might be invalid at points where we still need to derefer
187 * the pgd.
188 */
189 188
190 per_cpu(current_pgd, smp_processor_id()) = next->pgd; 189 /* switch context in the MMU */
191 190
192 /* switch context in the MMU */ 191 D(printk(KERN_DEBUG "switching mmu_context to %d (%p)\n",
193 192 next->context, next));
194 D(printk("switching mmu_context to %d (%p)\n", next->context, next));
195 193
196 *R_MMU_CONTEXT = IO_FIELD(R_MMU_CONTEXT, page_id, next->context.page_id); 194 *R_MMU_CONTEXT = IO_FIELD(R_MMU_CONTEXT,
195 page_id, next->context.page_id);
196 }
197} 197}
198 198
diff --git a/arch/cris/arch-v32/Kconfig b/arch/cris/arch-v32/Kconfig
index d8acaa920e1c..005ed2b3f7f4 100644
--- a/arch/cris/arch-v32/Kconfig
+++ b/arch/cris/arch-v32/Kconfig
@@ -1,27 +1,73 @@
1if ETRAX_ARCH_V32 1if ETRAX_ARCH_V32
2 2
3source arch/cris/arch-v32/mach-fs/Kconfig
4source arch/cris/arch-v32/mach-a3/Kconfig
5
6source drivers/cpufreq/Kconfig
7
3config ETRAX_DRAM_VIRTUAL_BASE 8config ETRAX_DRAM_VIRTUAL_BASE
4 hex 9 hex
5 depends on ETRAX_ARCH_V32 10 depends on ETRAX_ARCH_V32
6 default "c0000000" 11 default "c0000000"
7 12
8config ETRAX_LED1G 13choice
9 string "First green LED bit" 14 prompt "Nbr of Ethernet LED groups"
10 depends on ETRAX_ARCH_V32 15 depends on ETRAX_ARCH_V32
16 default ETRAX_NBR_LED_GRP_ONE
17 help
18 Select how many Ethernet LED groups that can be used. Usually one per Ethernet
19 interface is a good choice.
20
21config ETRAX_NBR_LED_GRP_ZERO
22 bool "Use zero LED groups"
23 help
24 Select this if you do not want any Ethernet LEDs.
25
26config ETRAX_NBR_LED_GRP_ONE
27 bool "Use one LED group"
28 help
29 Select this if you want one Ethernet LED group. This LED group
30 can be used for one or more Ethernet interfaces. However, it is
31 recomended that each Ethernet interface use a dedicated LED group.
32
33config ETRAX_NBR_LED_GRP_TWO
34 bool "Use two LED groups"
35 help
36 Select this if you want two Ethernet LED groups. This is the
37 best choice if you have more than one Ethernet interface and
38 would like to have separate LEDs for the interfaces.
39
40endchoice
41
42config ETRAX_LED_G_NET0
43 string "Ethernet LED group 0 green LED bit"
44 depends on ETRAX_ARCH_V32 && (ETRAX_NBR_LED_GRP_ONE || ETRAX_NBR_LED_GRP_TWO)
11 default "PA3" 45 default "PA3"
12 help 46 help
13 Bit to use for the first green LED (network LED). 47 Bit to use for the green LED in Ethernet LED group 0.
14 Most Axis products use bit A3 here.
15 48
16config ETRAX_LED1R 49config ETRAX_LED_R_NET0
17 string "First red LED bit" 50 string "Ethernet LED group 0 red LED bit"
18 depends on ETRAX_ARCH_V32 51 depends on ETRAX_ARCH_V32 && (ETRAX_NBR_LED_GRP_ONE || ETRAX_NBR_LED_GRP_TWO)
19 default "PA4" 52 default "PA4"
20 help 53 help
21 Bit to use for the first red LED (network LED). 54 Bit to use for the red LED in Ethernet LED group 0.
22 Most Axis products use bit A4 here.
23 55
24config ETRAX_LED2G 56config ETRAX_LED_G_NET1
57 string "Ethernet group 1 green LED bit"
58 depends on ETRAX_ARCH_V32 && ETRAX_NBR_LED_GRP_TWO
59 default ""
60 help
61 Bit to use for the green LED in Ethernet LED group 1.
62
63config ETRAX_LED_R_NET1
64 string "Ethernet group 1 red LED bit"
65 depends on ETRAX_ARCH_V32 && ETRAX_NBR_LED_GRP_TWO
66 default ""
67 help
68 Bit to use for the red LED in Ethernet LED group 1.
69
70config ETRAX_V32_LED2G
25 string "Second green LED bit" 71 string "Second green LED bit"
26 depends on ETRAX_ARCH_V32 72 depends on ETRAX_ARCH_V32
27 default "PA5" 73 default "PA5"
@@ -29,7 +75,7 @@ config ETRAX_LED2G
29 Bit to use for the first green LED (status LED). 75 Bit to use for the first green LED (status LED).
30 Most Axis products use bit A5 here. 76 Most Axis products use bit A5 here.
31 77
32config ETRAX_LED2R 78config ETRAX_V32_LED2R
33 string "Second red LED bit" 79 string "Second red LED bit"
34 depends on ETRAX_ARCH_V32 80 depends on ETRAX_ARCH_V32
35 default "PA6" 81 default "PA6"
@@ -37,7 +83,7 @@ config ETRAX_LED2R
37 Bit to use for the first red LED (network LED). 83 Bit to use for the first red LED (network LED).
38 Most Axis products use bit A6 here. 84 Most Axis products use bit A6 here.
39 85
40config ETRAX_LED3G 86config ETRAX_V32_LED3G
41 string "Third green LED bit" 87 string "Third green LED bit"
42 depends on ETRAX_ARCH_V32 88 depends on ETRAX_ARCH_V32
43 default "PA7" 89 default "PA7"
@@ -45,7 +91,7 @@ config ETRAX_LED3G
45 Bit to use for the first green LED (drive/power LED). 91 Bit to use for the first green LED (drive/power LED).
46 Most Axis products use bit A7 here. 92 Most Axis products use bit A7 here.
47 93
48config ETRAX_LED3R 94config ETRAX_V32_LED3R
49 string "Third red LED bit" 95 string "Third red LED bit"
50 depends on ETRAX_ARCH_V32 96 depends on ETRAX_ARCH_V32
51 default "PA7" 97 default "PA7"
@@ -54,39 +100,6 @@ config ETRAX_LED3R
54 Most Axis products use bit A7 here. 100 Most Axis products use bit A7 here.
55 101
56choice 102choice
57 prompt "Product debug-port"
58 depends on ETRAX_ARCH_V32
59 default ETRAX_DEBUG_PORT0
60
61config ETRAX_DEBUG_PORT0
62 bool "Serial-0"
63 help
64 Choose a serial port for the ETRAX debug console. Default to
65 port 0.
66
67config ETRAX_DEBUG_PORT1
68 bool "Serial-1"
69 help
70 Use serial port 1 for the console.
71
72config ETRAX_DEBUG_PORT2
73 bool "Serial-2"
74 help
75 Use serial port 2 for the console.
76
77config ETRAX_DEBUG_PORT3
78 bool "Serial-3"
79 help
80 Use serial port 3 for the console.
81
82config ETRAX_DEBUG_PORT_NULL
83 bool "disabled"
84 help
85 Disable serial-port debugging.
86
87endchoice
88
89choice
90 prompt "Kernel GDB port" 103 prompt "Kernel GDB port"
91 depends on ETRAX_KGDB 104 depends on ETRAX_KGDB
92 default ETRAX_KGDB_PORT0 105 default ETRAX_KGDB_PORT0
@@ -95,25 +108,11 @@ choice
95 not be enabled under Drivers for built-in interfaces (as it has its 108 not be enabled under Drivers for built-in interfaces (as it has its
96 own initialization code) and should not be the same as the debug port. 109 own initialization code) and should not be the same as the debug port.
97 110
98config ETRAX_KGDB_PORT0 111config ETRAX_KGDB_PORT4
99 bool "Serial-0" 112 bool "Serial-4"
100 help 113 depends on ETRAX_SERIAL_PORTS = 5
101 Use serial port 0 for kernel debugging.
102
103config ETRAX_KGDB_PORT1
104 bool "Serial-1"
105 help
106 Use serial port 1 for kernel debugging.
107
108config ETRAX_KGDB_PORT2
109 bool "Serial-2"
110 help
111 Use serial port 2 for kernel debugging.
112
113config ETRAX_KGDB_PORT3
114 bool "Serial-3"
115 help 114 help
116 Use serial port 3 for kernel debugging. 115 Use serial port 4 for kernel debugging.
117 116
118endchoice 117endchoice
119 118
diff --git a/arch/cris/arch-v32/boot/Makefile b/arch/cris/arch-v32/boot/Makefile
index 26f293ab9617..3f91349c5f12 100644
--- a/arch/cris/arch-v32/boot/Makefile
+++ b/arch/cris/arch-v32/boot/Makefile
@@ -1,14 +1,21 @@
1# 1#
2# arch/cris/arch-v32/boot/Makefile 2# arch/cris/arch-v32/boot/Makefile
3# 3#
4target = $(target_boot_dir)
5src = $(src_boot_dir)
6 4
7zImage: compressed/vmlinuz 5OBJCOPY = objcopy-cris
6OBJCOPYFLAGS = -O binary -R .note -R .comment
8 7
9compressed/vmlinuz: $(objtree)/vmlinux 8subdir- := compressed rescue
10 @$(MAKE) -f $(src)/compressed/Makefile $(objtree)/vmlinuz 9targets := Image
11 10
12clean: 11$(obj)/Image: vmlinux FORCE
13 rm -f zImage tools/build compressed/vmlinux.out 12 $(call if_changed,objcopy)
14 @$(MAKE) -f $(src)/compressed/Makefile clean 13 @echo ' Kernel: $@ is ready'
14
15$(obj)/compressed/vmlinux: $(obj)/Image FORCE
16 $(Q)$(MAKE) $(build)=$(obj)/compressed $@
17 $(Q)$(MAKE) $(build)=$(obj)/rescue $(obj)/rescue/rescue.bin
18
19$(obj)/zImage: $(obj)/compressed/vmlinux
20 @cp $< $@
21 @echo ' Kernel: $@ is ready'
diff --git a/arch/cris/arch-v32/boot/compressed/Makefile b/arch/cris/arch-v32/boot/compressed/Makefile
index 609692f9d5eb..2c8c2c3039c5 100644
--- a/arch/cris/arch-v32/boot/compressed/Makefile
+++ b/arch/cris/arch-v32/boot/compressed/Makefile
@@ -1,41 +1,30 @@
1# 1#
2# lx25/arch/cris/arch-v32/boot/compressed/Makefile 2# arch/cris/arch-v32/boot/compressed/Makefile
3# 3#
4# create a compressed vmlinux image from the original vmlinux files and romfs
5#
6
7target = $(target_compressed_dir)
8src = $(src_compressed_dir)
9 4
10CC = gcc-cris -mlinux -march=v32 $(LINUXINCLUDE) 5CC = gcc-cris -mlinux -march=v32 $(LINUXINCLUDE)
11CFLAGS = -O2 6asflags-y += -I $(srctree)/include/asm/mach/ -I $(srctree)/include/asm/arch
7ccflags-y += -O2 -I $(srctree)/include/asm/mach/ -I $(srctree)/include/asm/arch
12LD = gcc-cris -mlinux -march=v32 -nostdlib 8LD = gcc-cris -mlinux -march=v32 -nostdlib
9ldflags-y += -T $(obj)/decompress.ld
10obj-y = head.o misc.o
11OBJECTS = $(obj)/head.o $(obj)/misc.o
13OBJCOPY = objcopy-cris 12OBJCOPY = objcopy-cris
14OBJCOPYFLAGS = -O binary --remove-section=.bss 13OBJCOPYFLAGS = -O binary --remove-section=.bss
15OBJECTS = $(target)/head.o $(target)/misc.o
16
17# files to compress
18SYSTEM = $(objtree)/vmlinux.bin
19
20all: vmlinuz
21
22$(target)/decompress.bin: $(OBJECTS)
23 $(LD) -T $(src)/decompress.ld -o $(target)/decompress.o $(OBJECTS)
24 $(OBJCOPY) $(OBJCOPYFLAGS) $(target)/decompress.o $(target)/decompress.bin
25 14
26$(objtree)/vmlinuz: $(target) piggy.img $(target)/decompress.bin 15quiet_cmd_image = BUILD $@
27 cat $(target)/decompress.bin piggy.img > $(objtree)/vmlinuz 16cmd_image = cat $(obj)/decompress.bin $(obj)/piggy.gz > $@
28 rm -f piggy.img
29 cp $(objtree)/vmlinuz $(src)
30 17
31$(target)/head.o: $(src)/head.S 18targets := vmlinux piggy.gz decompress.o decompress.bin
32 $(CC) -D__ASSEMBLY__ -c $< -o $@
33 19
34# gzip the kernel image 20$(obj)/decompress.o: $(OBJECTS) FORCE
21 $(call if_changed,ld)
35 22
36piggy.img: $(SYSTEM) 23$(obj)/decompress.bin: $(obj)/decompress.o FORCE
37 cat $(SYSTEM) | gzip -f -9 > piggy.img 24 $(call if_changed,objcopy)
38 25
39clean: 26$(obj)/vmlinux: $(obj)/piggy.gz $(obj)/decompress.bin FORCE
40 rm -f piggy.img $(objtree)/vmlinuz vmlinuz.o decompress.o decompress.bin $(OBJECTS) 27 $(call if_changed,image)
41 28
29$(obj)/piggy.gz: $(obj)/../Image FORCE
30 $(call if_changed,gzip)
diff --git a/arch/cris/arch-v32/boot/compressed/README b/arch/cris/arch-v32/boot/compressed/README
index e33691d15c57..182c5d75784b 100644
--- a/arch/cris/arch-v32/boot/compressed/README
+++ b/arch/cris/arch-v32/boot/compressed/README
@@ -1,6 +1,5 @@
1Creation of the self-extracting compressed kernel image (vmlinuz) 1Creation of the self-extracting compressed kernel image (vmlinuz)
2----------------------------------------------------------------- 2-----------------------------------------------------------------
3$Id: README,v 1.1 2003/08/21 09:37:03 johana Exp $
4 3
5This can be slightly confusing because it's a process with many steps. 4This can be slightly confusing because it's a process with many steps.
6 5
diff --git a/arch/cris/arch-v32/boot/compressed/head.S b/arch/cris/arch-v32/boot/compressed/head.S
index 34cea10a8998..f86208caf32d 100644
--- a/arch/cris/arch-v32/boot/compressed/head.S
+++ b/arch/cris/arch-v32/boot/compressed/head.S
@@ -2,13 +2,12 @@
2 * Code that sets up the DRAM registers, calls the 2 * Code that sets up the DRAM registers, calls the
3 * decompressor to unpack the piggybacked kernel, and jumps. 3 * decompressor to unpack the piggybacked kernel, and jumps.
4 * 4 *
5 * Copyright (C) 1999 - 2003, Axis Communications AB 5 * Copyright (C) 1999 - 2006, Axis Communications AB
6 */ 6 */
7 7
8#define ASSEMBLER_MACROS_ONLY 8#define ASSEMBLER_MACROS_ONLY
9#include <asm/arch/hwregs/asm/reg_map_asm.h> 9#include <hwregs/asm/reg_map_asm.h>
10#include <asm/arch/hwregs/asm/gio_defs_asm.h> 10#include <asm/arch/mach/startup.inc>
11#include <asm/arch/hwregs/asm/config_defs_asm.h>
12 11
13#define RAM_INIT_MAGIC 0x56902387 12#define RAM_INIT_MAGIC 0x56902387
14#define COMMAND_LINE_MAGIC 0x87109563 13#define COMMAND_LINE_MAGIC 0x87109563
@@ -22,114 +21,49 @@ start:
22 di 21 di
23 22
24 ;; Start clocks for used blocks. 23 ;; Start clocks for used blocks.
25 move.d REG_ADDR(config, regi_config, rw_clk_ctrl), $r1 24 START_CLOCKS
26 move.d [$r1], $r0 25
27 or.d REG_STATE(config, rw_clk_ctrl, cpu, yes) | \ 26 ;; Initialize the DRAM registers.
28 REG_STATE(config, rw_clk_ctrl, bif, yes) | \
29 REG_STATE(config, rw_clk_ctrl, fix_io, yes), $r0
30 move.d $r0, [$r1]
31
32 ;; If booting from NAND flash we first have to copy some
33 ;; data from NAND flash to internal RAM to get the code
34 ;; that initializes the SDRAM. Lets copy 20 KB. This
35 ;; code executes at 0x38010000 if booting from NAND and
36 ;; we are guaranted that at least 0x200 bytes are good so
37 ;; lets start from there. The first 8192 bytes in the nand
38 ;; flash is spliced with zeroes and is thus 16384 bytes.
39 move.d 0x38010200, $r10
40 move.d 0x14200, $r11 ; Start offset in NAND flash 0x10200 + 16384
41 move.d 0x5000, $r12 ; Length of copy
42
43 ;; Before this code the tools add a partitiontable so the PC
44 ;; has an offset from the linked address.
45offset1:
46 lapcq ., $r13 ; get PC
47 add.d first_copy_complete-offset1, $r13
48
49#include "../../lib/nand_init.S"
50
51first_copy_complete:
52 ;; Initialze the DRAM registers.
53 cmp.d RAM_INIT_MAGIC, $r8 ; Already initialized? 27 cmp.d RAM_INIT_MAGIC, $r8 ; Already initialized?
54 beq dram_init_finished 28 beq dram_init_finished
55 nop 29 nop
56 30
57#include "../../lib/dram_init.S" 31#include "../../mach/dram_init.S"
58 32
59dram_init_finished: 33dram_init_finished:
60 lapcq ., $r13 ; get PC
61 add.d second_copy_complete-dram_init_finished, $r13
62
63 move.d REG_ADDR(config, regi_config, r_bootsel), $r0
64 move.d [$r0], $r0
65 and.d REG_MASK(config, r_bootsel, boot_mode), $r0
66 cmp.d REG_STATE(config, r_bootsel, boot_mode, nand), $r0
67 bne second_copy_complete ; No NAND boot
68 nop
69
70 ;; Copy 2MB from NAND flash to SDRAM (at 2-4MB into the SDRAM)
71 move.d 0x40204000, $r10
72 move.d 0x8000, $r11
73 move.d 0x200000, $r12
74 ba copy_nand_to_ram
75 nop
76second_copy_complete:
77
78 ;; Initiate the PA port.
79 move.d CONFIG_ETRAX_DEF_GIO_PA_OUT, $r0
80 move.d REG_ADDR(gio, regi_gio, rw_pa_dout), $r1
81 move.d $r0, [$r1]
82
83 move.d CONFIG_ETRAX_DEF_GIO_PA_OE, $r0
84 move.d REG_ADDR(gio, regi_gio, rw_pa_oe), $r1
85 move.d $r0, [$r1]
86 34
35 GIO_INIT
87 ;; Setup the stack to a suitably high address. 36 ;; Setup the stack to a suitably high address.
88 ;; We assume 8 MB is the minimum DRAM and put 37 ;; We assume 8 MB is the minimum DRAM and put
89 ;; the SP at the top for now. 38 ;; the SP at the top for now.
90 39
91 move.d 0x40800000, $sp 40 move.d 0x40800000, $sp
92 41
93 ;; Figure out where the compressed piggyback image is 42 ;; Figure out where the compressed piggyback image is.
94 ;; in the flash (since we wont try to copy it to DRAM 43 ;; It is either in [NOR] flash (we don't want to copy it
95 ;; before unpacking). It is at _edata, but in flash. 44 ;; to DRAM before unpacking), or copied to DRAM
45 ;; by the [NAND] flash boot loader.
46 ;; The piggyback image is at _edata, but relative to where the
47 ;; image is actually located in memory, not where it is linked
48 ;; (the decompressor is linked at 0x40700000+ and runs there).
96 ;; Use (_edata - herami) as offset to the current PC. 49 ;; Use (_edata - herami) as offset to the current PC.
97 50
98 move.d REG_ADDR(config, regi_config, r_bootsel), $r0
99 move.d [$r0], $r0
100 and.d REG_MASK(config, r_bootsel, boot_mode), $r0
101 cmp.d REG_STATE(config, r_bootsel, boot_mode, nand), $r0
102 beq hereami2
103 nop
104hereami: 51hereami:
105 lapcq ., $r5 ; get PC 52 lapcq ., $r5 ; get PC
106 and.d 0x7fffffff, $r5 ; strip any non-cache bit 53 and.d 0x7fffffff, $r5 ; strip any non-cache bit
107 move.d $r5, $r0 ; save for later - flash address of 'herami' 54 move.d $r5, $r0 ; source address of 'herami'
108 add.d _edata, $r5 55 add.d _edata, $r5
109 sub.d hereami, $r5 ; r5 = flash address of '_edata' 56 sub.d hereami, $r5 ; r5 = flash address of '_edata'
110 move.d hereami, $r1 ; destination 57 move.d hereami, $r1 ; destination
111 ba 2f 58
112 nop
113hereami2:
114 lapcq ., $r5 ; get PC
115 and.d 0x00ffffff, $r5 ; strip any non-cache bit
116 move.d $r5, $r6
117 or.d 0x40200000, $r6
118 move.d $r6, $r0 ; save for later - flash address of 'herami'
119 add.d _edata, $r5
120 sub.d hereami2, $r5 ; r5 = flash address of '_edata'
121 add.d 0x40200000, $r5
122 move.d hereami2, $r1 ; destination
1232:
124 ;; Copy text+data to DRAM 59 ;; Copy text+data to DRAM
125 60
126 move.d _edata, $r2 ; end destination 61 move.d _edata, $r2 ; end destination
1271: move.w [$r0+], $r3 621: move.w [$r0+], $r3 ; from herami+ source
128 move.w $r3, [$r1+] 63 move.w $r3, [$r1+] ; to hereami+ destination (linked address)
129 cmp.d $r2, $r1 64 cmp.d $r2, $r1 ; finish when destination == _edata
130 bcs 1b 65 bcs 1b
131 nop 66 nop
132
133 move.d input_data, $r0 ; for the decompressor 67 move.d input_data, $r0 ; for the decompressor
134 move.d $r5, [$r0] ; for the decompressor 68 move.d $r5, [$r0] ; for the decompressor
135 69
@@ -144,16 +78,24 @@ hereami2:
144 nop 78 nop
145 79
146 ;; Save command line magic and address. 80 ;; Save command line magic and address.
147 move.d _cmd_line_magic, $r12 81 move.d _cmd_line_magic, $r0
148 move.d $r10, [$r12] 82 move.d $r10, [$r0]
149 move.d _cmd_line_addr, $r12 83 move.d _cmd_line_addr, $r0
150 move.d $r11, [$r12] 84 move.d $r11, [$r0]
85
86 ;; Save boot source indicator
87 move.d _boot_source, $r0
88 move.d $r12, [$r0]
151 89
152 ;; Do the decompression and save compressed size in _inptr 90 ;; Do the decompression and save compressed size in _inptr
153 91
154 jsr decompress_kernel 92 jsr decompress_kernel
155 nop 93 nop
156 94
95 ;; Restore boot source indicator
96 move.d _boot_source, $r12
97 move.d [$r12], $r12
98
157 ;; Restore command line magic and address. 99 ;; Restore command line magic and address.
158 move.d _cmd_line_magic, $r10 100 move.d _cmd_line_magic, $r10
159 move.d [$r10], $r10 101 move.d [$r10], $r10
@@ -166,11 +108,10 @@ hereami2:
166 move.d [$r0], $r9 ; flash address of compressed kernel 108 move.d [$r0], $r9 ; flash address of compressed kernel
167 move.d inptr, $r0 109 move.d inptr, $r0
168 add.d [$r0], $r9 ; size of compressed kernel 110 add.d [$r0], $r9 ; size of compressed kernel
169 cmp.d 0x40200000, $r9 111 cmp.d 0x40000000, $r9 ; image in DRAM ?
170 blo enter_kernel 112 blo enter_kernel ; no, must be [NOR] flash, jump
171 nop 113 nop ; delay slot
172 sub.d 0x40200000, $r9 114 and.d 0x001fffff, $r9 ; assume compressed kernel was < 2M
173 add.d 0x4000, $r9
174 115
175enter_kernel: 116enter_kernel:
176 ;; Enter the decompressed kernel 117 ;; Enter the decompressed kernel
@@ -186,7 +127,7 @@ _cmd_line_magic:
186 .dword 0 127 .dword 0
187_cmd_line_addr: 128_cmd_line_addr:
188 .dword 0 129 .dword 0
189is_nand_boot: 130_boot_source:
190 .dword 0 131 .dword 0
191 132
192#include "../../lib/hw_settings.S" 133#include "../../mach/hw_settings.S"
diff --git a/arch/cris/arch-v32/boot/compressed/misc.c b/arch/cris/arch-v32/boot/compressed/misc.c
index 0169ba1ca9c9..55b2695c5d70 100644
--- a/arch/cris/arch-v32/boot/compressed/misc.c
+++ b/arch/cris/arch-v32/boot/compressed/misc.c
@@ -1,8 +1,6 @@
1/* 1/*
2 * misc.c 2 * misc.c
3 * 3 *
4 * $Id: misc.c,v 1.8 2005/04/24 18:34:29 starvik Exp $
5 *
6 * This is a collection of several routines from gzip-1.0.3 4 * This is a collection of several routines from gzip-1.0.3
7 * adapted for Linux. 5 * adapted for Linux.
8 * 6 *
@@ -22,9 +20,13 @@
22 20
23 21
24#include <linux/types.h> 22#include <linux/types.h>
25#include <asm/arch/hwregs/reg_rdwr.h> 23#include <hwregs/reg_rdwr.h>
26#include <asm/arch/hwregs/reg_map.h> 24#include <hwregs/reg_map.h>
27#include <asm/arch/hwregs/ser_defs.h> 25#include <hwregs/ser_defs.h>
26#include <hwregs/pinmux_defs.h>
27#ifdef CONFIG_CRIS_MACH_ARTPEC3
28#include <hwregs/clkgen_defs.h>
29#endif
28 30
29/* 31/*
30 * gzip declarations 32 * gzip declarations
@@ -85,7 +87,6 @@ static unsigned outcnt = 0; /* bytes in output buffer */
85# define Tracecv(c,x) 87# define Tracecv(c,x)
86#endif 88#endif
87 89
88static int fill_inbuf(void);
89static void flush_window(void); 90static void flush_window(void);
90static void error(char *m); 91static void error(char *m);
91static void gzip_mark(void **); 92static void gzip_mark(void **);
@@ -186,6 +187,8 @@ memset(void* s, int c, size_t n)
186 char *ss = (char*)s; 187 char *ss = (char*)s;
187 188
188 for (i=0;i<n;i++) ss[i] = c; 189 for (i=0;i<n;i++) ss[i] = c;
190
191 return s;
189} 192}
190 193
191void* 194void*
@@ -196,6 +199,8 @@ memcpy(void* __dest, __const void* __src,
196 char *d = (char *)__dest, *s = (char *)__src; 199 char *d = (char *)__dest, *s = (char *)__src;
197 200
198 for (i=0;i<__n;i++) d[i] = s[i]; 201 for (i=0;i<__n;i++) d[i] = s[i];
202
203 return __dest;
199} 204}
200 205
201/* =========================================================================== 206/* ===========================================================================
@@ -225,15 +230,15 @@ flush_window()
225static void 230static void
226error(char *x) 231error(char *x)
227{ 232{
228 puts("\n\n"); 233 puts("\r\n\n");
229 puts(x); 234 puts(x);
230 puts("\n\n -- System halted\n"); 235 puts("\r\n\n -- System halted\n");
231 236
232 while(1); /* Halt */ 237 while(1); /* Halt */
233} 238}
234 239
235void 240void
236setup_normal_output_buffer() 241setup_normal_output_buffer(void)
237{ 242{
238 output_data = (char *)KERNEL_LOAD_ADR; 243 output_data = (char *)KERNEL_LOAD_ADR;
239} 244}
@@ -262,15 +267,17 @@ serial_setup(reg_scope_instances regi_ser)
262 rec_baud = REG_RD(ser, regi_ser, rw_rec_baud_div); 267 rec_baud = REG_RD(ser, regi_ser, rw_rec_baud_div);
263 268
264 tr_ctrl.stop_bits = 1; /* 2 stop bits. */ 269 tr_ctrl.stop_bits = 1; /* 2 stop bits. */
270 tr_ctrl.en = 1; /* enable transmitter */
271 rec_ctrl.en = 1; /* enabler receiver */
265 272
266 /* 273 /*
267 * The baudrate setup is a bit fishy, but in the end the transceiver is 274 * The baudrate setup used to be a bit fishy, but now transmitter and
268 * set to 4800 and the receiver to 115200. The magic value is 275 * receiver are both set to the intended baud rate, 115200.
269 * 29.493 MHz. 276 * The magic value is 29.493 MHz.
270 */ 277 */
271 tr_ctrl.base_freq = regk_ser_f29_493; 278 tr_ctrl.base_freq = regk_ser_f29_493;
272 rec_ctrl.base_freq = regk_ser_f29_493; 279 rec_ctrl.base_freq = regk_ser_f29_493;
273 tr_baud.div = (29493000 / 8) / 4800; 280 tr_baud.div = (29493000 / 8) / 115200;
274 rec_baud.div = (29493000 / 8) / 115200; 281 rec_baud.div = (29493000 / 8) / 115200;
275 282
276 REG_WR(ser, regi_ser, rw_tr_ctrl, tr_ctrl); 283 REG_WR(ser, regi_ser, rw_tr_ctrl, tr_ctrl);
@@ -280,25 +287,52 @@ serial_setup(reg_scope_instances regi_ser)
280} 287}
281 288
282void 289void
283decompress_kernel() 290decompress_kernel(void)
284{ 291{
285 char revision; 292 char revision;
286 293
287 /* input_data is set in head.S */ 294#if defined(CONFIG_ETRAX_DEBUG_PORT1) || \
288 inbuf = input_data; 295 defined(CONFIG_ETRAX_DEBUG_PORT2) || \
296 defined(CONFIG_ETRAX_DEBUG_PORT3)
297 reg_pinmux_rw_hwprot hwprot;
298
299#ifdef CONFIG_CRIS_MACH_ARTPEC3
300 reg_clkgen_rw_clk_ctrl clk_ctrl;
301
302 /* Enable corresponding clock region when serial 1..3 selected */
303
304 clk_ctrl = REG_RD(clkgen, regi_clkgen, rw_clk_ctrl);
305 clk_ctrl.sser_ser_dma6_7 = regk_clkgen_yes;
306 REG_WR(clkgen, regi_clkgen, rw_clk_ctrl, clk_ctrl);
307#endif
308
309 /* pinmux setup for ports 1..3 */
310 hwprot = REG_RD(pinmux, regi_pinmux, rw_hwprot);
311#endif
289 312
290#ifdef CONFIG_ETRAX_DEBUG_PORT0 313#ifdef CONFIG_ETRAX_DEBUG_PORT0
291 serial_setup(regi_ser0); 314 serial_setup(regi_ser0);
292#endif 315#endif
293#ifdef CONFIG_ETRAX_DEBUG_PORT1 316#ifdef CONFIG_ETRAX_DEBUG_PORT1
317 hwprot.ser1 = regk_pinmux_yes;
294 serial_setup(regi_ser1); 318 serial_setup(regi_ser1);
295#endif 319#endif
296#ifdef CONFIG_ETRAX_DEBUG_PORT2 320#ifdef CONFIG_ETRAX_DEBUG_PORT2
321 hwprot.ser2 = regk_pinmux_yes;
297 serial_setup(regi_ser2); 322 serial_setup(regi_ser2);
298#endif 323#endif
299#ifdef CONFIG_ETRAX_DEBUG_PORT3 324#ifdef CONFIG_ETRAX_DEBUG_PORT3
325 hwprot.ser3 = regk_pinmux_yes;
300 serial_setup(regi_ser3); 326 serial_setup(regi_ser3);
301#endif 327#endif
328#if defined(CONFIG_ETRAX_DEBUG_PORT1) || \
329 defined(CONFIG_ETRAX_DEBUG_PORT2) || \
330 defined(CONFIG_ETRAX_DEBUG_PORT3)
331 REG_WR(pinmux, regi_pinmux, rw_hwprot, hwprot);
332#endif
333
334 /* input_data is set in head.S */
335 inbuf = input_data;
302 336
303 setup_normal_output_buffer(); 337 setup_normal_output_buffer();
304 338
@@ -307,11 +341,11 @@ decompress_kernel()
307 __asm__ volatile ("move $vr,%0" : "=rm" (revision)); 341 __asm__ volatile ("move $vr,%0" : "=rm" (revision));
308 if (revision < 32) 342 if (revision < 32)
309 { 343 {
310 puts("You need an ETRAX FS to run Linux 2.6/crisv32.\n"); 344 puts("You need an ETRAX FS to run Linux 2.6/crisv32.\r\n");
311 while(1); 345 while(1);
312 } 346 }
313 347
314 puts("Uncompressing Linux...\n"); 348 puts("Uncompressing Linux...\r\n");
315 gunzip(); 349 gunzip();
316 puts("Done. Now booting the kernel.\n"); 350 puts("Done. Now booting the kernel.\r\n");
317} 351}
diff --git a/arch/cris/arch-v32/boot/rescue/Makefile b/arch/cris/arch-v32/boot/rescue/Makefile
index f668a8198724..c0987795dcb7 100644
--- a/arch/cris/arch-v32/boot/rescue/Makefile
+++ b/arch/cris/arch-v32/boot/rescue/Makefile
@@ -1,36 +1,27 @@
1# 1#
2# Makefile for rescue code 2# Makefile for rescue (bootstrap) code
3# 3#
4target = $(target_rescue_dir)
5src = $(src_rescue_dir)
6 4
7CC = gcc-cris -mlinux -march=v32 $(LINUXINCLUDE) 5CC = gcc-cris -mlinux -march=v32 $(LINUXINCLUDE)
8CFLAGS = -O2 6ccflags-y += -O2 -I $(srctree)/include/asm/arch/mach/ \
7 -I $(srctree)/include/asm/arch
8asflags-y += -I $(srctree)/include/asm/arch/mach/ -I $(srctree)/include/asm/arch
9LD = gcc-cris -mlinux -march=v32 -nostdlib 9LD = gcc-cris -mlinux -march=v32 -nostdlib
10ldflags-y += -T $(obj)/rescue.ld
11LDPOSTFLAGS = -lgcc
10OBJCOPY = objcopy-cris 12OBJCOPY = objcopy-cris
11OBJCOPYFLAGS = -O binary --remove-section=.bss 13OBJCOPYFLAGS = -O binary --remove-section=.bss
14obj-$(CONFIG_ETRAX_AXISFLASHMAP) = head.o
15OBJECT := $(obj)/head.o
12 16
13all: $(target)/rescue.bin 17targets := rescue.o rescue.bin
14 18
15rescue: rescue.bin 19quiet_cmd_ldlibgcc = LD $@
16 # do nothing 20cmd_ldlibgcc = $(LD) $(LDFLAGS) $(filter-out FORCE,$^) $(LDPOSTFLAGS) -o $@
17 21
18$(target)/rescue.bin: $(target) $(target)/head.o 22$(obj)/rescue.o: $(OBJECTS) FORCE
19 $(LD) -T $(src)/rescue.ld -o $(target)/rescue.o $(target)/head.o 23 $(call if_changed,ldlibgcc)
20 $(OBJCOPY) $(OBJCOPYFLAGS) $(target)/rescue.o $(target)/rescue.bin
21 cp -p $(target)/rescue.bin $(objtree)
22 24
23$(target): 25$(obj)/rescue.bin: $(obj)/rescue.o FORCE
24 mkdir -p $(target) 26 $(call if_changed,objcopy)
25 27 cp -p $(obj)/rescue.bin $(objtree)
26$(target)/head.o: $(src)/head.S
27 $(CC) -D__ASSEMBLY__ -c $< -o $*.o
28
29clean:
30 rm -f $(target)/*.o $(target)/*.bin
31
32fastdep:
33
34modules:
35
36modules-install:
diff --git a/arch/cris/arch-v32/boot/rescue/head.S b/arch/cris/arch-v32/boot/rescue/head.S
index 8cdb4011bc16..5f846b7700a3 100644
--- a/arch/cris/arch-v32/boot/rescue/head.S
+++ b/arch/cris/arch-v32/boot/rescue/head.S
@@ -1,38 +1,26 @@
1/* $Id: head.S,v 1.4 2004/11/01 16:10:28 starvik Exp $ 1/*
2 * Just get started by jumping to CONFIG_ETRAX_PTABLE_SECTOR to start
3 * kernel decompressor.
4 *
5 * In practice, this only works for NOR flash (or some convoluted RAM boot)
6 * and hence is not really useful for Artpec-3, so it's Etrax FS / NOR only.
2 * 7 *
3 * This used to be the rescue code but now that is handled by the
4 * RedBoot based RFL instead. Nothing to see here, move along.
5 */ 8 */
6 9
7#include <asm/arch/hwregs/reg_map_asm.h> 10#include <mach/startup.inc>
8#include <asm/arch/hwregs/config_defs_asm.h>
9 11
10 .text 12#ifdef CONFIG_ETRAX_AXISFLASHMAP
11 13
12 ;; Start clocks for used blocks. 14;; Code
13 move.d REG_ADDR(config, regi_config, rw_clk_ctrl), $r1
14 move.d [$r1], $r0
15 or.d REG_STATE(config, rw_clk_ctrl, cpu, yes) | \
16 REG_STATE(config, rw_clk_ctrl, bif, yes) | \
17 REG_STATE(config, rw_clk_ctrl, fix_io, yes), $r0
18 move.d $r0, [$r1]
19 15
20 ;; Copy 68KB NAND flash to Internal RAM (if NAND boot) 16 .text
21 move.d 0x38004000, $r10 17start:
22 move.d 0x8000, $r11
23 move.d 0x11000, $r12
24 move.d copy_complete, $r13
25 and.d 0x000fffff, $r13
26 or.d 0x38000000, $r13
27 18
28#include "../../lib/nand_init.S" 19 ;; Start clocks for used blocks.
20 START_CLOCKS
29 21
30 ;; No NAND found
31 move.d CONFIG_ETRAX_PTABLE_SECTOR, $r10 22 move.d CONFIG_ETRAX_PTABLE_SECTOR, $r10
32 jump $r10 ; Jump to decompresser 23 jump $r10 ; Jump to decompressor
33 nop 24 nop
34 25
35copy_complete: 26#endif
36 move.d 0x38000000 + CONFIG_ETRAX_PTABLE_SECTOR, $r10
37 jump $r10 ; Jump to decompresser
38 nop
diff --git a/arch/cris/arch-v32/boot/rescue/rescue.ld b/arch/cris/arch-v32/boot/rescue/rescue.ld
index 42b11aa122b2..8ac646bc1a2b 100644
--- a/arch/cris/arch-v32/boot/rescue/rescue.ld
+++ b/arch/cris/arch-v32/boot/rescue/rescue.ld
@@ -1,20 +1,43 @@
1/*#OUTPUT_FORMAT(elf32-us-cris) */
2OUTPUT_ARCH (crisv32)
3/* Now that NAND support has been stripped, this file could be simplified,
4 * but it doesn't do any harm on the other hand so why bother. */
5
1MEMORY 6MEMORY
2 { 7 {
3 flash : ORIGIN = 0x00000000, 8 bootblk : ORIGIN = 0x38000000,
4 LENGTH = 0x00100000 9 LENGTH = 0x00004000
10 intmem : ORIGIN = 0x38004000,
11 LENGTH = 0x00005000
5 } 12 }
6 13
7SECTIONS 14SECTIONS
8{ 15{
9 .text : 16 .text :
10 { 17 {
11 stext = . ; 18 _stext = . ;
12 *(.text) 19 *(.text)
13 etext = . ; 20 *(.init.text)
14 } > flash 21 *(.rodata)
22 *(.rodata.*)
23 _etext = . ;
24 } > bootblk
15 .data : 25 .data :
16 { 26 {
17 *(.data) 27 *(.data)
18 edata = . ; 28 _edata = . ;
19 } > flash 29 } > bootblk
30 .bss :
31 {
32 _bss = . ;
33 *(.bss)
34 _end = ALIGN( 0x10 ) ;
35 } > intmem
36
37 /* Get rid of stuff from EXPORT_SYMBOL(foo). */
38 /DISCARD/ :
39 {
40 *(__ksymtab_strings)
41 *(__ksymtab)
42 }
20} 43}
diff --git a/arch/cris/arch-v32/drivers/Kconfig b/arch/cris/arch-v32/drivers/Kconfig
index c329cce2a0c3..2a92cb1886ca 100644
--- a/arch/cris/arch-v32/drivers/Kconfig
+++ b/arch/cris/arch-v32/drivers/Kconfig
@@ -4,64 +4,102 @@ config ETRAX_ETHERNET
4 bool "Ethernet support" 4 bool "Ethernet support"
5 depends on ETRAX_ARCH_V32 5 depends on ETRAX_ARCH_V32
6 select NET_ETHERNET 6 select NET_ETHERNET
7 select MII
7 help 8 help
8 This option enables the ETRAX FS built-in 10/100Mbit Ethernet 9 This option enables the ETRAX FS built-in 10/100Mbit Ethernet
9 controller. 10 controller.
10 11
11config ETRAX_ETHERNET_HW_CSUM 12config ETRAX_NO_PHY
12 bool "Hardware accelerated ethernet checksum and scatter/gather" 13 bool "PHY not present"
13 depends on ETRAX_ETHERNET 14 depends on ETRAX_ETHERNET
14 depends on ETRAX_STREAMCOPROC 15 default N
15 default y
16 help 16 help
17 Hardware acceleration of checksumming and scatter/gather 17 This option disables all MDIO communication with an ethernet
18 transceiver connected to the MII interface. This option shall
19 typically be enabled if the MII interface is connected to a
20 switch. This option should normally be disabled. If enabled,
21 speed and duplex will be locked to 100 Mbit and full duplex.
18 22
19config ETRAX_ETHERNET_IFACE0 23config ETRAX_ETHERNET_IFACE0
20 depends on ETRAX_ETHERNET 24 depends on ETRAX_ETHERNET
21 bool "Enable network interface 0" 25 bool "Enable network interface 0"
22 26
23config ETRAX_ETHERNET_IFACE1 27config ETRAX_ETHERNET_IFACE1
24 depends on ETRAX_ETHERNET 28 depends on (ETRAX_ETHERNET && ETRAXFS)
25 bool "Enable network interface 1 (uses DMA6 and DMA7)" 29 bool "Enable network interface 1 (uses DMA6 and DMA7)"
26 30
31config ETRAX_ETHERNET_GBIT
32 depends on (ETRAX_ETHERNET && CRIS_MACH_ARTPEC3)
33 bool "Enable gigabit Ethernet support"
34
27choice 35choice
28 prompt "Network LED behavior" 36 prompt "Eth0 led group"
29 depends on ETRAX_ETHERNET 37 depends on ETRAX_ETHERNET_IFACE0
30 default ETRAX_NETWORK_LED_ON_WHEN_ACTIVITY 38 default ETRAX_ETH0_USE_LEDGRP0
31 39
32config ETRAX_NETWORK_LED_ON_WHEN_LINK 40config ETRAX_ETH0_USE_LEDGRP0
33 bool "LED_on_when_link" 41 bool "Use LED grp 0"
42 depends on ETRAX_NBR_LED_GRP_ONE || ETRAX_NBR_LED_GRP_TWO
34 help 43 help
35 Selecting LED_on_when_link will light the LED when there is a 44 Use LED grp 0 for eth0
36 connection and will flash off when there is activity.
37 45
38 Selecting LED_on_when_activity will light the LED only when 46config ETRAX_ETH0_USE_LEDGRP1
39 there is activity. 47 bool "Use LED grp 1"
40 48 depends on ETRAX_NBR_LED_GRP_TWO
41 This setting will also affect the behaviour of other activity LEDs 49 help
42 e.g. Bluetooth. 50 Use LED grp 1 for eth0
43 51
44config ETRAX_NETWORK_LED_ON_WHEN_ACTIVITY 52config ETRAX_ETH0_USE_LEDGRPNULL
45 bool "LED_on_when_activity" 53 bool "Use no LEDs for eth0"
46 help 54 help
47 Selecting LED_on_when_link will light the LED when there is a 55 Use no LEDs for eth0
48 connection and will flash off when there is activity. 56endchoice
49 57
50 Selecting LED_on_when_activity will light the LED only when 58choice
51 there is activity. 59 prompt "Eth1 led group"
60 depends on ETRAX_ETHERNET_IFACE1
61 default ETRAX_ETH1_USE_LEDGRP1
62
63config ETRAX_ETH1_USE_LEDGRP0
64 bool "Use LED grp 0"
65 depends on ETRAX_NBR_LED_GRP_ONE || ETRAX_NBR_LED_GRP_TWO
66 help
67 Use LED grp 0 for eth1
52 68
53 This setting will also affect the behaviour of other activity LEDs 69config ETRAX_ETH1_USE_LEDGRP1
54 e.g. Bluetooth. 70 bool "Use LED grp 1"
71 depends on ETRAX_NBR_LED_GRP_TWO
72 help
73 Use LED grp 1 for eth1
55 74
75config ETRAX_ETH1_USE_LEDGRPNULL
76 bool "Use no LEDs for eth1"
77 help
78 Use no LEDs for eth1
56endchoice 79endchoice
57 80
58config ETRAXFS_SERIAL 81config ETRAXFS_SERIAL
59 bool "Serial-port support" 82 bool "Serial-port support"
60 depends on ETRAX_ARCH_V32 83 depends on ETRAX_ARCH_V32
84 select SERIAL_CORE
85 select SERIAL_CORE_CONSOLE
61 help 86 help
62 Enables the ETRAX FS serial driver for ser0 (ttyS0) 87 Enables the ETRAX FS serial driver for ser0 (ttyS0)
63 You probably want this enabled. 88 You probably want this enabled.
64 89
90config ETRAX_RS485
91 bool "RS-485 support"
92 depends on ETRAXFS_SERIAL
93 help
94 Enables support for RS-485 serial communication.
95
96config ETRAX_RS485_DISABLE_RECEIVER
97 bool "Disable serial receiver"
98 depends on ETRAX_RS485
99 help
100 It is necessary to disable the serial receiver to avoid serial
101 loopback. Not all products are able to do this in software only.
102
65config ETRAX_SERIAL_PORT0 103config ETRAX_SERIAL_PORT0
66 bool "Serial port 0 enabled" 104 bool "Serial port 0 enabled"
67 depends on ETRAXFS_SERIAL 105 depends on ETRAXFS_SERIAL
@@ -72,50 +110,28 @@ config ETRAX_SERIAL_PORT0
72 ser0 can use dma4 or dma6 for output and dma5 or dma7 for input. 110 ser0 can use dma4 or dma6 for output and dma5 or dma7 for input.
73 111
74choice 112choice
75 prompt "Ser0 DMA in channel " 113 prompt "Ser0 default port type "
76 depends on ETRAX_SERIAL_PORT0 114 depends on ETRAX_SERIAL_PORT0
77 default ETRAX_SERIAL_PORT0_NO_DMA_IN 115 default ETRAX_SERIAL_PORT0_TYPE_232
78 help 116 help
79 What DMA channel to use for ser0. 117 Type of serial port.
80
81 118
82config ETRAX_SERIAL_PORT0_NO_DMA_IN 119config ETRAX_SERIAL_PORT0_TYPE_232
83 bool "Ser0 uses no DMA for input" 120 bool "Ser0 is a RS-232 port"
84 help 121 help
85 Do not use DMA for ser0 input. 122 Configure serial port 0 to be a RS-232 port.
86 123
87config ETRAX_SERIAL_PORT0_DMA7_IN 124config ETRAX_SERIAL_PORT0_TYPE_485HD
88 bool "Ser0 uses DMA7 for input" 125 bool "Ser0 is a half duplex RS-485 port"
89 depends on ETRAX_SERIAL_PORT0 126 depends on ETRAX_RS485
90 help
91 Enables the DMA7 input channel for ser0 (ttyS0).
92 If you do not enable DMA, an interrupt for each character will be
93 used when receiving data.
94 Normally you want to use DMA, unless you use the DMA channel for
95 something else.
96
97endchoice
98
99choice
100 prompt "Ser0 DMA out channel"
101 depends on ETRAX_SERIAL_PORT0
102 default ETRAX_SERIAL_PORT0_NO_DMA_OUT
103
104config ETRAX_SERIAL_PORT0_NO_DMA_OUT
105 bool "Ser0 uses no DMA for output"
106 help 127 help
107 Do not use DMA for ser0 output. 128 Configure serial port 0 to be a half duplex (two wires) RS-485 port.
108 129
109config ETRAX_SERIAL_PORT0_DMA6_OUT 130config ETRAX_SERIAL_PORT0_TYPE_485FD
110 bool "Ser0 uses DMA6 for output" 131 bool "Ser0 is a full duplex RS-485 port"
111 depends on ETRAX_SERIAL_PORT0 132 depends on ETRAX_RS485
112 help 133 help
113 Enables the DMA6 output channel for ser0 (ttyS0). 134 Configure serial port 0 to be a full duplex (four wires) RS-485 port.
114 If you do not enable DMA, an interrupt for each character will be
115 used when transmitting data.
116 Normally you want to use DMA, unless you use the DMA channel for
117 something else.
118
119endchoice 135endchoice
120 136
121config ETRAX_SER0_DTR_BIT 137config ETRAX_SER0_DTR_BIT
@@ -141,52 +157,28 @@ config ETRAX_SERIAL_PORT1
141 Enables the ETRAX FS serial driver for ser1 (ttyS1). 157 Enables the ETRAX FS serial driver for ser1 (ttyS1).
142 158
143choice 159choice
144 prompt "Ser1 DMA in channel " 160 prompt "Ser1 default port type"
145 depends on ETRAX_SERIAL_PORT1 161 depends on ETRAX_SERIAL_PORT1
146 default ETRAX_SERIAL_PORT1_NO_DMA_IN 162 default ETRAX_SERIAL_PORT1_TYPE_232
147 help
148 What DMA channel to use for ser1.
149
150
151config ETRAX_SERIAL_PORT1_NO_DMA_IN
152 bool "Ser1 uses no DMA for input"
153 help 163 help
154 Do not use DMA for ser1 input. 164 Type of serial port.
155 165
156config ETRAX_SERIAL_PORT1_DMA5_IN 166config ETRAX_SERIAL_PORT1_TYPE_232
157 bool "Ser1 uses DMA5 for input" 167 bool "Ser1 is a RS-232 port"
158 depends on ETRAX_SERIAL_PORT1
159 help 168 help
160 Enables the DMA5 input channel for ser1 (ttyS1). 169 Configure serial port 1 to be a RS-232 port.
161 If you do not enable DMA, an interrupt for each character will be
162 used when receiving data.
163 Normally you want this on, unless you use the DMA channel for
164 something else.
165
166endchoice
167 170
168choice 171config ETRAX_SERIAL_PORT1_TYPE_485HD
169 prompt "Ser1 DMA out channel " 172 bool "Ser1 is a half duplex RS-485 port"
170 depends on ETRAX_SERIAL_PORT1 173 depends on ETRAX_RS485
171 default ETRAX_SERIAL_PORT1_NO_DMA_OUT
172 help
173 What DMA channel to use for ser1.
174
175config ETRAX_SERIAL_PORT1_NO_DMA_OUT
176 bool "Ser1 uses no DMA for output"
177 help 174 help
178 Do not use DMA for ser1 output. 175 Configure serial port 1 to be a half duplex (two wires) RS-485 port.
179 176
180config ETRAX_SERIAL_PORT1_DMA4_OUT 177config ETRAX_SERIAL_PORT1_TYPE_485FD
181 bool "Ser1 uses DMA4 for output" 178 bool "Ser1 is a full duplex RS-485 port"
182 depends on ETRAX_SERIAL_PORT1 179 depends on ETRAX_RS485
183 help 180 help
184 Enables the DMA4 output channel for ser1 (ttyS1). 181 Configure serial port 1 to be a full duplex (four wires) RS-485 port.
185 If you do not enable DMA, an interrupt for each character will be
186 used when transmitting data.
187 Normally you want this on, unless you use the DMA channel for
188 something else.
189
190endchoice 182endchoice
191 183
192config ETRAX_SER1_DTR_BIT 184config ETRAX_SER1_DTR_BIT
@@ -212,52 +204,31 @@ config ETRAX_SERIAL_PORT2
212 Enables the ETRAX FS serial driver for ser2 (ttyS2). 204 Enables the ETRAX FS serial driver for ser2 (ttyS2).
213 205
214choice 206choice
215 prompt "Ser2 DMA in channel " 207 prompt "Ser2 default port type"
216 depends on ETRAX_SERIAL_PORT2 208 depends on ETRAX_SERIAL_PORT2
217 default ETRAX_SERIAL_PORT2_NO_DMA_IN 209 default ETRAX_SERIAL_PORT2_TYPE_232
218 help 210 help
219 What DMA channel to use for ser2. 211 What DMA channel to use for ser2
220 212
221 213config ETRAX_SERIAL_PORT2_TYPE_232
222config ETRAX_SERIAL_PORT2_NO_DMA_IN 214 bool "Ser2 is a RS-232 port"
223 bool "Ser2 uses no DMA for input"
224 help 215 help
225 Do not use DMA for ser2 input. 216 Configure serial port 2 to be a RS-232 port.
226 217
227config ETRAX_SERIAL_PORT2_DMA3_IN 218config ETRAX_SERIAL_PORT2_TYPE_485HD
228 bool "Ser2 uses DMA3 for input" 219 bool "Ser2 is a half duplex RS-485 port"
229 depends on ETRAX_SERIAL_PORT2 220 depends on ETRAX_RS485
230 help
231 Enables the DMA3 input channel for ser2 (ttyS2).
232 If you do not enable DMA, an interrupt for each character will be
233 used when receiving data.
234 Normally you want to use DMA, unless you use the DMA channel for
235 something else.
236
237endchoice
238
239choice
240 prompt "Ser2 DMA out channel"
241 depends on ETRAX_SERIAL_PORT2
242 default ETRAX_SERIAL_PORT2_NO_DMA_OUT
243
244config ETRAX_SERIAL_PORT2_NO_DMA_OUT
245 bool "Ser2 uses no DMA for output"
246 help 221 help
247 Do not use DMA for ser2 output. 222 Configure serial port 2 to be a half duplex (two wires) RS-485 port.
248 223
249config ETRAX_SERIAL_PORT2_DMA2_OUT 224config ETRAX_SERIAL_PORT2_TYPE_485FD
250 bool "Ser2 uses DMA2 for output" 225 bool "Ser2 is a full duplex RS-485 port"
251 depends on ETRAX_SERIAL_PORT2 226 depends on ETRAX_RS485
252 help 227 help
253 Enables the DMA2 output channel for ser2 (ttyS2). 228 Configure serial port 2 to be a full duplex (four wires) RS-485 port.
254 If you do not enable DMA, an interrupt for each character will be
255 used when transmitting data.
256 Normally you want to use DMA, unless you use the DMA channel for
257 something else.
258
259endchoice 229endchoice
260 230
231
261config ETRAX_SER2_DTR_BIT 232config ETRAX_SER2_DTR_BIT
262 string "Ser 2 DTR bit (empty = not used)" 233 string "Ser 2 DTR bit (empty = not used)"
263 depends on ETRAX_SERIAL_PORT2 234 depends on ETRAX_SERIAL_PORT2
@@ -281,71 +252,121 @@ config ETRAX_SERIAL_PORT3
281 Enables the ETRAX FS serial driver for ser3 (ttyS3). 252 Enables the ETRAX FS serial driver for ser3 (ttyS3).
282 253
283choice 254choice
284 prompt "Ser3 DMA in channel " 255 prompt "Ser3 default port type"
285 depends on ETRAX_SERIAL_PORT3 256 depends on ETRAX_SERIAL_PORT3
286 default ETRAX_SERIAL_PORT3_NO_DMA_IN 257 default ETRAX_SERIAL_PORT3_TYPE_232
287 help 258 help
288 What DMA channel to use for ser3. 259 What DMA channel to use for ser3.
289 260
261config ETRAX_SERIAL_PORT3_TYPE_232
262 bool "Ser3 is a RS-232 port"
263 help
264 Configure serial port 3 to be a RS-232 port.
290 265
291config ETRAX_SERIAL_PORT3_NO_DMA_IN 266config ETRAX_SERIAL_PORT3_TYPE_485HD
292 bool "Ser3 uses no DMA for input" 267 bool "Ser3 is a half duplex RS-485 port"
268 depends on ETRAX_RS485
293 help 269 help
294 Do not use DMA for ser3 input. 270 Configure serial port 3 to be a half duplex (two wires) RS-485 port.
295 271
296config ETRAX_SERIAL_PORT3_DMA9_IN 272config ETRAX_SERIAL_PORT3_TYPE_485FD
297 bool "Ser3 uses DMA9 for input" 273 bool "Ser3 is a full duplex RS-485 port"
274 depends on ETRAX_RS485
275 help
276 Configure serial port 3 to be a full duplex (four wires) RS-485 port.
277endchoice
278
279config ETRAX_SER3_DTR_BIT
280 string "Ser 3 DTR bit (empty = not used)"
281 depends on ETRAX_SERIAL_PORT3
282
283config ETRAX_SER3_RI_BIT
284 string "Ser 3 RI bit (empty = not used)"
285 depends on ETRAX_SERIAL_PORT3
286
287config ETRAX_SER3_DSR_BIT
288 string "Ser 3 DSR bit (empty = not used)"
289 depends on ETRAX_SERIAL_PORT3
290
291config ETRAX_SER3_CD_BIT
292 string "Ser 3 CD bit (empty = not used)"
298 depends on ETRAX_SERIAL_PORT3 293 depends on ETRAX_SERIAL_PORT3
294
295config ETRAX_SERIAL_PORT4
296 bool "Serial port 4 enabled"
297 depends on ETRAXFS_SERIAL && CRIS_MACH_ARTPEC3
299 help 298 help
300 Enables the DMA9 input channel for ser3 (ttyS3). 299 Enables the ETRAX FS serial driver for ser4 (ttyS4).
301 If you do not enable DMA, an interrupt for each character will be 300
302 used when receiving data. 301choice
303 Normally you want to use DMA, unless you use the DMA channel for 302 prompt "Ser4 default port type"
304 something else. 303 depends on ETRAX_SERIAL_PORT4
304 default ETRAX_SERIAL_PORT4_TYPE_232
305 help
306 What DMA channel to use for ser4.
305 307
308config ETRAX_SERIAL_PORT4_TYPE_232
309 bool "Ser4 is a RS-232 port"
310 help
311 Configure serial port 4 to be a RS-232 port.
312
313config ETRAX_SERIAL_PORT4_TYPE_485HD
314 bool "Ser4 is a half duplex RS-485 port"
315 depends on ETRAX_RS485
316 help
317 Configure serial port 4 to be a half duplex (two wires) RS-485 port.
318
319config ETRAX_SERIAL_PORT4_TYPE_485FD
320 bool "Ser4 is a full duplex RS-485 port"
321 depends on ETRAX_RS485
322 help
323 Configure serial port 4 to be a full duplex (four wires) RS-485 port.
306endchoice 324endchoice
307 325
308choice 326choice
309 prompt "Ser3 DMA out channel" 327 prompt "Ser4 DMA in channel "
310 depends on ETRAX_SERIAL_PORT3 328 depends on ETRAX_SERIAL_PORT4
311 default ETRAX_SERIAL_PORT3_NO_DMA_OUT 329 default ETRAX_SERIAL_PORT4_NO_DMA_IN
330 help
331 What DMA channel to use for ser4.
332
312 333
313config ETRAX_SERIAL_PORT3_NO_DMA_OUT 334config ETRAX_SERIAL_PORT4_NO_DMA_IN
314 bool "Ser3 uses no DMA for output" 335 bool "Ser4 uses no DMA for input"
315 help 336 help
316 Do not use DMA for ser3 output. 337 Do not use DMA for ser4 input.
317 338
318config ETRAX_SERIAL_PORT3_DMA8_OUT 339config ETRAX_SERIAL_PORT4_DMA9_IN
319 bool "Ser3 uses DMA8 for output" 340 bool "Ser4 uses DMA9 for input"
320 depends on ETRAX_SERIAL_PORT3 341 depends on ETRAX_SERIAL_PORT4
321 help 342 help
322 Enables the DMA8 output channel for ser3 (ttyS3). 343 Enables the DMA9 input channel for ser4 (ttyS4).
323 If you do not enable DMA, an interrupt for each character will be 344 If you do not enable DMA, an interrupt for each character will be
324 used when transmitting data. 345 used when receiveing data.
325 Normally you want to use DMA, unless you use the DMA channel for 346 Normally you want to use DMA, unless you use the DMA channel for
326 something else. 347 something else.
327 348
328endchoice 349endchoice
329 350
330config ETRAX_SER3_DTR_BIT 351config ETRAX_SER4_DTR_BIT
331 string "Ser 3 DTR bit (empty = not used)" 352 string "Ser 4 DTR bit (empty = not used)"
332 depends on ETRAX_SERIAL_PORT3 353 depends on ETRAX_SERIAL_PORT4
333 354
334config ETRAX_SER3_RI_BIT 355config ETRAX_SER4_RI_BIT
335 string "Ser 3 RI bit (empty = not used)" 356 string "Ser 4 RI bit (empty = not used)"
336 depends on ETRAX_SERIAL_PORT3 357 depends on ETRAX_SERIAL_PORT4
337 358
338config ETRAX_SER3_DSR_BIT 359config ETRAX_SER4_DSR_BIT
339 string "Ser 3 DSR bit (empty = not used)" 360 string "Ser 4 DSR bit (empty = not used)"
340 depends on ETRAX_SERIAL_PORT3 361 depends on ETRAX_SERIAL_PORT4
341 362
342config ETRAX_SER3_CD_BIT 363config ETRAX_SER3_CD_BIT
343 string "Ser 3 CD bit (empty = not used)" 364 string "Ser 4 CD bit (empty = not used)"
344 depends on ETRAX_SERIAL_PORT3 365 depends on ETRAX_SERIAL_PORT4
345 366
346config ETRAX_RS485 367config ETRAX_RS485
347 bool "RS-485 support" 368 bool "RS-485 support"
348 depends on ETRAX_SERIAL 369 depends on ETRAXFS_SERIAL
349 help 370 help
350 Enables support for RS-485 serial communication. For a primer on 371 Enables support for RS-485 serial communication. For a primer on
351 RS-485, see <http://www.hw.cz/english/docs/rs485/rs485.html>. 372 RS-485, see <http://www.hw.cz/english/docs/rs485/rs485.html>.
@@ -356,22 +377,6 @@ config ETRAX_RS485_DISABLE_RECEIVER
356 help 377 help
357 It is necessary to disable the serial receiver to avoid serial 378 It is necessary to disable the serial receiver to avoid serial
358 loopback. Not all products are able to do this in software only. 379 loopback. Not all products are able to do this in software only.
359 Axis 2400/2401 must disable receiver.
360
361config ETRAX_AXISFLASHMAP
362 bool "Axis flash-map support"
363 depends on ETRAX_ARCH_V32
364 select MTD
365 select MTD_CFI
366 select MTD_CFI_AMDSTD
367 select MTD_CHAR
368 select MTD_BLOCK
369 select MTD_PARTITIONS
370 select MTD_CONCAT
371 select MTD_COMPLEX_MAPPINGS
372 help
373 This option enables MTD mapping of flash devices. Needed to use
374 flash memories. If unsure, say Y.
375 380
376config ETRAX_SYNCHRONOUS_SERIAL 381config ETRAX_SYNCHRONOUS_SERIAL
377 bool "Synchronous serial-port support" 382 bool "Synchronous serial-port support"
@@ -394,7 +399,7 @@ config ETRAX_SYNCHRONOUS_SERIAL0_DMA
394 399
395config ETRAX_SYNCHRONOUS_SERIAL_PORT1 400config ETRAX_SYNCHRONOUS_SERIAL_PORT1
396 bool "Synchronous serial port 1 enabled" 401 bool "Synchronous serial port 1 enabled"
397 depends on ETRAX_SYNCHRONOUS_SERIAL 402 depends on ETRAX_SYNCHRONOUS_SERIAL && ETRAXFS
398 help 403 help
399 Enabled synchronous serial port 1. 404 Enabled synchronous serial port 1.
400 405
@@ -405,6 +410,31 @@ config ETRAX_SYNCHRONOUS_SERIAL1_DMA
405 A synchronous serial port can run in manual or DMA mode. 410 A synchronous serial port can run in manual or DMA mode.
406 Selecting this option will make it run in DMA mode. 411 Selecting this option will make it run in DMA mode.
407 412
413config ETRAX_AXISFLASHMAP
414 bool "Axis flash-map support"
415 depends on ETRAX_ARCH_V32
416 select MTD
417 select MTD_CFI
418 select MTD_CFI_AMDSTD
419 select MTD_JEDECPROBE
420 select MTD_CHAR
421 select MTD_BLOCK
422 select MTD_PARTITIONS
423 select MTD_CONCAT
424 select MTD_COMPLEX_MAPPINGS
425 help
426 This option enables MTD mapping of flash devices. Needed to use
427 flash memories. If unsure, say Y.
428
429config ETRAX_AXISFLASHMAP_MTD0WHOLE
430 bool "MTD0 is whole boot flash device"
431 depends on ETRAX_AXISFLASHMAP
432 default N
433 help
434 When this option is not set, mtd0 refers to the first partition
435 on the boot flash device. When set, mtd0 refers to the whole
436 device, with mtd1 referring to the first partition etc.
437
408config ETRAX_PTABLE_SECTOR 438config ETRAX_PTABLE_SECTOR
409 int "Byte-offset of partition table sector" 439 int "Byte-offset of partition table sector"
410 depends on ETRAX_AXISFLASHMAP 440 depends on ETRAX_AXISFLASHMAP
@@ -425,42 +455,32 @@ config ETRAX_NANDFLASH
425 This option enables MTD mapping of NAND flash devices. Needed to use 455 This option enables MTD mapping of NAND flash devices. Needed to use
426 NAND flash memories. If unsure, say Y. 456 NAND flash memories. If unsure, say Y.
427 457
458config ETRAX_NANDBOOT
459 bool "Boot from NAND flash"
460 depends on ETRAX_NANDFLASH
461 help
462 This options enables booting from NAND flash devices.
463 Say Y if your boot code, kernel and root file system is in
464 NAND flash. Say N if they are in NOR flash.
465
428config ETRAX_I2C 466config ETRAX_I2C
429 bool "I2C driver" 467 bool "I2C driver"
430 depends on ETRAX_ARCH_V32 468 depends on ETRAX_ARCH_V32
431 help 469 help
432 This option enabled the I2C driver used by e.g. the RTC driver. 470 This option enables the I2C driver used by e.g. the RTC driver.
433 471
434config ETRAX_I2C_DATA_PORT 472config ETRAX_V32_I2C_DATA_PORT
435 string "I2C data pin" 473 string "I2C data pin"
436 depends on ETRAX_I2C 474 depends on ETRAX_I2C
437 help 475 help
438 The pin to use for I2C data. 476 The pin to use for I2C data.
439 477
440config ETRAX_I2C_CLK_PORT 478config ETRAX_V32_I2C_CLK_PORT
441 string "I2C clock pin" 479 string "I2C clock pin"
442 depends on ETRAX_I2C 480 depends on ETRAX_I2C
443 help 481 help
444 The pin to use for I2C clock. 482 The pin to use for I2C clock.
445 483
446config ETRAX_RTC
447 bool "Real Time Clock support"
448 depends on ETRAX_ARCH_V32
449 help
450 Enabled RTC support.
451
452choice
453 prompt "RTC chip"
454 depends on ETRAX_RTC
455 default ETRAX_PCF8563
456
457config ETRAX_PCF8563
458 bool "PCF8563"
459 help
460 Philips PCF8563 RTC
461
462endchoice
463
464config ETRAX_GPIO 484config ETRAX_GPIO
465 bool "GPIO support" 485 bool "GPIO support"
466 depends on ETRAX_ARCH_V32 486 depends on ETRAX_ARCH_V32
@@ -476,33 +496,36 @@ config ETRAX_GPIO
476 Remember that you need to setup the port directions appropriately in 496 Remember that you need to setup the port directions appropriately in
477 the General configuration. 497 the General configuration.
478 498
479config ETRAX_PA_BUTTON_BITMASK 499config ETRAX_VIRTUAL_GPIO
480 hex "PA-buttons bitmask" 500 bool "Virtual GPIO support"
481 depends on ETRAX_GPIO 501 depends on ETRAX_GPIO
482 default "0x02"
483 help 502 help
484 This is a bitmask (8 bits) with information about what bits on PA 503 Enables the virtual Etrax general port device (major 120, minor 6).
485 that are used for buttons. 504 It uses an I/O expander for the I2C-bus.
486 Most products has a so called TEST button on PA1, if that is true 505
487 use 0x02 here. 506config ETRAX_VIRTUAL_GPIO_INTERRUPT_PA_PIN
488 Use 00 if there are no buttons on PA. 507 int "Virtual GPIO interrupt pin on PA pin"
489 If the bitmask is <> 00 a button driver will be included in the gpio 508 range 0 7
490 driver. ETRAX general I/O support must be enabled. 509 depends on ETRAX_VIRTUAL_GPIO
510 help
511 The pin to use on PA for virtual gpio interrupt.
491 512
492config ETRAX_PA_CHANGEABLE_DIR 513config ETRAX_PA_CHANGEABLE_DIR
493 hex "PA user changeable dir mask" 514 hex "PA user changeable dir mask"
494 depends on ETRAX_GPIO 515 depends on ETRAX_GPIO
495 default "0x00" 516 default "0x00" if ETRAXFS
517 default "0x00000000" if !ETRAXFS
496 help 518 help
497 This is a bitmask (8 bits) with information of what bits in PA that a 519 This is a bitmask (8 bits) with information of what bits in PA that a
498 user can change direction on using ioctl's. 520 user can change direction on using ioctl's.
499 Bit set = changeable. 521 Bit set = changeable.
500 You probably want 0x00 here, but it depends on your hardware. 522 You probably want 0 here, but it depends on your hardware.
501 523
502config ETRAX_PA_CHANGEABLE_BITS 524config ETRAX_PA_CHANGEABLE_BITS
503 hex "PA user changeable bits mask" 525 hex "PA user changeable bits mask"
504 depends on ETRAX_GPIO 526 depends on ETRAX_GPIO
505 default "0x00" 527 default "0x00" if ETRAXFS
528 default "0x00000000" if !ETRAXFS
506 help 529 help
507 This is a bitmask (8 bits) with information of what bits in PA 530 This is a bitmask (8 bits) with information of what bits in PA
508 that a user can change the value on using ioctl's. 531 that a user can change the value on using ioctl's.
@@ -511,17 +534,19 @@ config ETRAX_PA_CHANGEABLE_BITS
511config ETRAX_PB_CHANGEABLE_DIR 534config ETRAX_PB_CHANGEABLE_DIR
512 hex "PB user changeable dir mask" 535 hex "PB user changeable dir mask"
513 depends on ETRAX_GPIO 536 depends on ETRAX_GPIO
514 default "0x00000" 537 default "0x00000" if ETRAXFS
538 default "0x00000000" if !ETRAXFS
515 help 539 help
516 This is a bitmask (18 bits) with information of what bits in PB 540 This is a bitmask (18 bits) with information of what bits in PB
517 that a user can change direction on using ioctl's. 541 that a user can change direction on using ioctl's.
518 Bit set = changeable. 542 Bit set = changeable.
519 You probably want 0x00000 here, but it depends on your hardware. 543 You probably want 0 here, but it depends on your hardware.
520 544
521config ETRAX_PB_CHANGEABLE_BITS 545config ETRAX_PB_CHANGEABLE_BITS
522 hex "PB user changeable bits mask" 546 hex "PB user changeable bits mask"
523 depends on ETRAX_GPIO 547 depends on ETRAX_GPIO
524 default "0x00000" 548 default "0x00000" if ETRAXFS
549 default "0x00000000" if !ETRAXFS
525 help 550 help
526 This is a bitmask (18 bits) with information of what bits in PB 551 This is a bitmask (18 bits) with information of what bits in PB
527 that a user can change the value on using ioctl's. 552 that a user can change the value on using ioctl's.
@@ -530,17 +555,19 @@ config ETRAX_PB_CHANGEABLE_BITS
530config ETRAX_PC_CHANGEABLE_DIR 555config ETRAX_PC_CHANGEABLE_DIR
531 hex "PC user changeable dir mask" 556 hex "PC user changeable dir mask"
532 depends on ETRAX_GPIO 557 depends on ETRAX_GPIO
533 default "0x00000" 558 default "0x00000" if ETRAXFS
559 default "0x00000000" if !ETRAXFS
534 help 560 help
535 This is a bitmask (18 bits) with information of what bits in PC 561 This is a bitmask (18 bits) with information of what bits in PC
536 that a user can change direction on using ioctl's. 562 that a user can change direction on using ioctl's.
537 Bit set = changeable. 563 Bit set = changeable.
538 You probably want 0x00000 here, but it depends on your hardware. 564 You probably want 0 here, but it depends on your hardware.
539 565
540config ETRAX_PC_CHANGEABLE_BITS 566config ETRAX_PC_CHANGEABLE_BITS
541 hex "PC user changeable bits mask" 567 hex "PC user changeable bits mask"
542 depends on ETRAX_GPIO 568 depends on ETRAX_GPIO
543 default "0x00000" 569 default "0x00000" if ETRAXFS
570 default "0x00000000" if ETRAXFS
544 help 571 help
545 This is a bitmask (18 bits) with information of what bits in PC 572 This is a bitmask (18 bits) with information of what bits in PC
546 that a user can change the value on using ioctl's. 573 that a user can change the value on using ioctl's.
@@ -548,7 +575,7 @@ config ETRAX_PC_CHANGEABLE_BITS
548 575
549config ETRAX_PD_CHANGEABLE_DIR 576config ETRAX_PD_CHANGEABLE_DIR
550 hex "PD user changeable dir mask" 577 hex "PD user changeable dir mask"
551 depends on ETRAX_GPIO 578 depends on ETRAX_GPIO && ETRAXFS
552 default "0x00000" 579 default "0x00000"
553 help 580 help
554 This is a bitmask (18 bits) with information of what bits in PD 581 This is a bitmask (18 bits) with information of what bits in PD
@@ -558,7 +585,7 @@ config ETRAX_PD_CHANGEABLE_DIR
558 585
559config ETRAX_PD_CHANGEABLE_BITS 586config ETRAX_PD_CHANGEABLE_BITS
560 hex "PD user changeable bits mask" 587 hex "PD user changeable bits mask"
561 depends on ETRAX_GPIO 588 depends on ETRAX_GPIO && ETRAXFS
562 default "0x00000" 589 default "0x00000"
563 help 590 help
564 This is a bitmask (18 bits) with information of what bits in PD 591 This is a bitmask (18 bits) with information of what bits in PD
@@ -567,7 +594,7 @@ config ETRAX_PD_CHANGEABLE_BITS
567 594
568config ETRAX_PE_CHANGEABLE_DIR 595config ETRAX_PE_CHANGEABLE_DIR
569 hex "PE user changeable dir mask" 596 hex "PE user changeable dir mask"
570 depends on ETRAX_GPIO 597 depends on ETRAX_GPIO && ETRAXFS
571 default "0x00000" 598 default "0x00000"
572 help 599 help
573 This is a bitmask (18 bits) with information of what bits in PE 600 This is a bitmask (18 bits) with information of what bits in PE
@@ -577,20 +604,36 @@ config ETRAX_PE_CHANGEABLE_DIR
577 604
578config ETRAX_PE_CHANGEABLE_BITS 605config ETRAX_PE_CHANGEABLE_BITS
579 hex "PE user changeable bits mask" 606 hex "PE user changeable bits mask"
580 depends on ETRAX_GPIO 607 depends on ETRAX_GPIO && ETRAXFS
581 default "0x00000" 608 default "0x00000"
582 help 609 help
583 This is a bitmask (18 bits) with information of what bits in PE 610 This is a bitmask (18 bits) with information of what bits in PE
584 that a user can change the value on using ioctl's. 611 that a user can change the value on using ioctl's.
585 Bit set = changeable. 612 Bit set = changeable.
586 613
614config ETRAX_PV_CHANGEABLE_DIR
615 hex "PV user changeable dir mask"
616 depends on ETRAX_VIRTUAL_GPIO
617 default "0x0000"
618 help
619 This is a bitmask (16 bits) with information of what bits in PV
620 that a user can change direction on using ioctl's.
621 Bit set = changeable.
622 You probably want 0x0000 here, but it depends on your hardware.
623
624config ETRAX_PV_CHANGEABLE_BITS
625 hex "PV user changeable bits mask"
626 depends on ETRAX_VIRTUAL_GPIO
627 default "0x0000"
628 help
629 This is a bitmask (16 bits) with information of what bits in PV
630 that a user can change the value on using ioctl's.
631 Bit set = changeable.
632
587config ETRAX_CARDBUS 633config ETRAX_CARDBUS
588 bool "Cardbus support" 634 bool "Cardbus support"
589 depends on ETRAX_ARCH_V32 635 depends on ETRAX_ARCH_V32
590 select PCCARD
591 select CARDBUS
592 select HOTPLUG 636 select HOTPLUG
593 select PCCARD_NONSTATIC
594 help 637 help
595 Enabled the ETRAX Cardbus driver. 638 Enabled the ETRAX Cardbus driver.
596 639
@@ -613,4 +656,202 @@ config ETRAX_STREAMCOPROC
613 This option enables a driver for the stream co-processor 656 This option enables a driver for the stream co-processor
614 for cryptographic operations. 657 for cryptographic operations.
615 658
659source drivers/mmc/Kconfig
660
661config ETRAX_MMC_IOP
662 tristate "MMC/SD host driver using IO-processor"
663 depends on ETRAX_ARCH_V32 && MMC
664 help
665 This option enables the SD/MMC host controller interface.
666 The host controller is implemented using the built in
667 IO-Processor. Only the SPU is used in this implementation.
668
669config ETRAX_SPI_MMC
670# Make this one of several "choices" (possible simultaneously but
671# suggested uniquely) when an IOP driver emerges for "real" MMC/SD
672# protocol support.
673 tristate
674 depends on !ETRAX_MMC_IOP
675 default MMC
676 select SPI
677 select MMC_SPI
678 select ETRAX_SPI_MMC_BOARD
679
680# For the parts that can't be a module (due to restrictions in
681# framework elsewhere).
682config ETRAX_SPI_MMC_BOARD
683 boolean
684 default n
685
686# While the board info is MMC_SPI only, the drivers are written to be
687# independent of MMC_SPI, so we'll keep SPI non-dependent on the
688# MMC_SPI config choices (well, except for a single depends-on-line
689# for the board-info file until a separate non-MMC SPI board file
690# emerges).
691# FIXME: When that happens, we'll need to be able to ask for and
692# configure non-MMC SPI ports together with MMC_SPI ports (if multiple
693# SPI ports are enabled).
694
695config SPI_ETRAX_SSER
696 tristate
697 depends on SPI_MASTER && ETRAX_ARCH_V32 && EXPERIMENTAL
698 select SPI_BITBANG
699 help
700 This enables using an synchronous serial (sser) port as a
701 SPI master controller on Axis ETRAX FS and later. The
702 driver can be configured to use any sser port.
703
704config SPI_ETRAX_GPIO
705 tristate
706 depends on SPI_MASTER && ETRAX_ARCH_V32 && EXPERIMENTAL
707 select SPI_BITBANG
708 help
709 This enables using GPIO pins port as a SPI master controller
710 on Axis ETRAX FS and later. The driver can be configured to
711 use any GPIO pins.
712
713config ETRAX_SPI_SSER0
714 tristate "SPI using synchronous serial port 0 (sser0)"
715 depends on ETRAX_SPI_MMC
716 default m if MMC_SPI=m
717 default y if MMC_SPI=y
718 default y if MMC_SPI=n
719 select SPI_ETRAX_SSER
720 help
721 Say Y for an MMC/SD socket connected to synchronous serial port 0,
722 or for devices using the SPI protocol on that port. Say m if you
723 want to build it as a module, which will be named spi_crisv32_sser.
724 (You need to select MMC separately.)
725
726config ETRAX_SPI_SSER0_DMA
727 bool "DMA for SPI on sser0 enabled"
728 depends on ETRAX_SPI_SSER0
729 depends on !ETRAX_SERIAL_PORT1_DMA4_OUT && !ETRAX_SERIAL_PORT1_DMA5_IN
730 default y
731 help
732 Say Y if using DMA (dma4/dma5) for SPI on synchronous serial port 0.
733
734config ETRAX_SPI_MMC_CD_SSER0_PIN
735 string "MMC/SD card detect pin for SPI on sser0"
736 depends on ETRAX_SPI_SSER0 && MMC_SPI
737 default "pd11"
738 help
739 The pin to use for SD/MMC card detect. This pin should be pulled up
740 and grounded when a card is present. If defined as " " (space), no
741 pin is selected. A card must then always be inserted for proper
742 action.
743
744config ETRAX_SPI_MMC_WP_SSER0_PIN
745 string "MMC/SD card write-protect pin for SPI on sser0"
746 depends on ETRAX_SPI_SSER0 && MMC_SPI
747 default "pd10"
748 help
749 The pin to use for the SD/MMC write-protect signal for a memory
750 card. If defined as " " (space), the card is considered writable.
751
752config ETRAX_SPI_SSER1
753 tristate "SPI using synchronous serial port 1 (sser1)"
754 depends on ETRAX_SPI_MMC
755 default m if MMC_SPI=m && ETRAX_SPI_SSER0=n
756 default y if MMC_SPI=y && ETRAX_SPI_SSER0=n
757 default y if MMC_SPI=n && ETRAX_SPI_SSER0=n
758 select SPI_ETRAX_SSER
759 help
760 Say Y for an MMC/SD socket connected to synchronous serial port 1,
761 or for devices using the SPI protocol on that port. Say m if you
762 want to build it as a module, which will be named spi_crisv32_sser.
763 (You need to select MMC separately.)
764
765config ETRAX_SPI_SSER1_DMA
766 bool "DMA for SPI on sser1 enabled"
767 depends on ETRAX_SPI_SSER1 && !ETRAX_ETHERNET_IFACE1
768 depends on !ETRAX_SERIAL_PORT0_DMA6_OUT && !ETRAX_SERIAL_PORT0_DMA7_IN
769 default y
770 help
771 Say Y if using DMA (dma6/dma7) for SPI on synchronous serial port 1.
772
773config ETRAX_SPI_MMC_CD_SSER1_PIN
774 string "MMC/SD card detect pin for SPI on sser1"
775 depends on ETRAX_SPI_SSER1 && MMC_SPI
776 default "pd12"
777 help
778 The pin to use for SD/MMC card detect. This pin should be pulled up
779 and grounded when a card is present. If defined as " " (space), no
780 pin is selected. A card must then always be inserted for proper
781 action.
782
783config ETRAX_SPI_MMC_WP_SSER1_PIN
784 string "MMC/SD card write-protect pin for SPI on sser1"
785 depends on ETRAX_SPI_SSER1 && MMC_SPI
786 default "pd9"
787 help
788 The pin to use for the SD/MMC write-protect signal for a memory
789 card. If defined as " " (space), the card is considered writable.
790
791config ETRAX_SPI_GPIO
792 tristate "Bitbanged SPI using gpio pins"
793 depends on ETRAX_SPI_MMC
794 select SPI_ETRAX_GPIO
795 default m if MMC_SPI=m && ETRAX_SPI_SSER0=n && ETRAX_SPI_SSER1=n
796 default y if MMC_SPI=y && ETRAX_SPI_SSER0=n && ETRAX_SPI_SSER1=n
797 default y if MMC_SPI=n && ETRAX_SPI_SSER0=n && ETRAX_SPI_SSER1=n
798 help
799 Say Y for an MMC/SD socket connected to general I/O pins (but not
800 a complete synchronous serial ports), or for devices using the SPI
801 protocol on general I/O pins. Slow and slows down the system.
802 Say m to build it as a module, which will be called spi_crisv32_gpio.
803 (You need to select MMC separately.)
804
805# The default match that of sser0, only because that's how it was tested.
806config ETRAX_SPI_CS_PIN
807 string "SPI chip select pin"
808 depends on ETRAX_SPI_GPIO
809 default "pc3"
810 help
811 The pin to use for SPI chip select.
812
813config ETRAX_SPI_CLK_PIN
814 string "SPI clock pin"
815 depends on ETRAX_SPI_GPIO
816 default "pc1"
817 help
818 The pin to use for the SPI clock.
819
820config ETRAX_SPI_DATAIN_PIN
821 string "SPI MISO (data in) pin"
822 depends on ETRAX_SPI_GPIO
823 default "pc16"
824 help
825 The pin to use for SPI data in from the device.
826
827config ETRAX_SPI_DATAOUT_PIN
828 string "SPI MOSI (data out) pin"
829 depends on ETRAX_SPI_GPIO
830 default "pc0"
831 help
832 The pin to use for SPI data out to the device.
833
834config ETRAX_SPI_MMC_CD_GPIO_PIN
835 string "MMC/SD card detect pin for SPI using gpio (space for none)"
836 depends on ETRAX_SPI_GPIO && MMC_SPI
837 default "pd11"
838 help
839 The pin to use for SD/MMC card detect. This pin should be pulled up
840 and grounded when a card is present. If defined as " " (space), no
841 pin is selected. A card must then always be inserted for proper
842 action.
843
844config ETRAX_SPI_MMC_WP_GPIO_PIN
845 string "MMC/SD card write-protect pin for SPI using gpio (space for none)"
846 depends on ETRAX_SPI_GPIO && MMC_SPI
847 default "pd10"
848 help
849 The pin to use for the SD/MMC write-protect signal for a memory
850 card. If defined as " " (space), the card is considered writable.
851
852# Avoid choices causing non-working configs by conditionalizing the inclusion.
853if ETRAX_SPI_MMC
854source drivers/spi/Kconfig
855endif
856
616endif 857endif
diff --git a/arch/cris/arch-v32/drivers/Makefile b/arch/cris/arch-v32/drivers/Makefile
index a359cd20ae75..e8c02437edaf 100644
--- a/arch/cris/arch-v32/drivers/Makefile
+++ b/arch/cris/arch-v32/drivers/Makefile
@@ -4,10 +4,11 @@
4 4
5obj-$(CONFIG_ETRAX_STREAMCOPROC) += cryptocop.o 5obj-$(CONFIG_ETRAX_STREAMCOPROC) += cryptocop.o
6obj-$(CONFIG_ETRAX_AXISFLASHMAP) += axisflashmap.o 6obj-$(CONFIG_ETRAX_AXISFLASHMAP) += axisflashmap.o
7obj-$(CONFIG_ETRAX_NANDFLASH) += nandflash.o 7obj-$(CONFIG_ETRAXFS) += mach-fs/
8obj-$(CONFIG_ETRAX_GPIO) += gpio.o 8obj-$(CONFIG_CRIS_MACH_ARTPEC3) += mach-a3/
9obj-$(CONFIG_ETRAX_IOP_FW_LOAD) += iop_fw_load.o 9obj-$(CONFIG_ETRAX_IOP_FW_LOAD) += iop_fw_load.o
10obj-$(CONFIG_ETRAX_PCF8563) += pcf8563.o 10obj-$(CONFIG_ETRAX_PCF8563) += pcf8563.o
11obj-$(CONFIG_ETRAX_I2C) += i2c.o 11obj-$(CONFIG_ETRAX_I2C) += i2c.o
12obj-$(CONFIG_ETRAX_SYNCHRONOUS_SERIAL) += sync_serial.o 12obj-$(CONFIG_ETRAX_SYNCHRONOUS_SERIAL) += sync_serial.o
13obj-$(CONFIG_PCI) += pci/ 13obj-$(CONFIG_PCI) += pci/
14obj-$(CONFIG_ETRAX_SPI_MMC_BOARD) += board_mmcspi.o
diff --git a/arch/cris/arch-v32/drivers/axisflashmap.c b/arch/cris/arch-v32/drivers/axisflashmap.c
index c5ff95e18269..51e1e85df96d 100644
--- a/arch/cris/arch-v32/drivers/axisflashmap.c
+++ b/arch/cris/arch-v32/drivers/axisflashmap.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * Physical mapping layer for MTD using the Axis partitiontable format 2 * Physical mapping layer for MTD using the Axis partitiontable format
3 * 3 *
4 * Copyright (c) 2001, 2002, 2003 Axis Communications AB 4 * Copyright (c) 2001-2007 Axis Communications AB
5 * 5 *
6 * This file is under the GPL. 6 * This file is under the GPL.
7 * 7 *
@@ -10,9 +10,6 @@
10 * tells us what other partitions to define. If there isn't, we use a default 10 * tells us what other partitions to define. If there isn't, we use a default
11 * partition split defined below. 11 * partition split defined below.
12 * 12 *
13 * Copy of os/lx25/arch/cris/arch-v10/drivers/axisflashmap.c 1.5
14 * with minor changes.
15 *
16 */ 13 */
17 14
18#include <linux/module.h> 15#include <linux/module.h>
@@ -27,7 +24,8 @@
27#include <linux/mtd/mtdram.h> 24#include <linux/mtd/mtdram.h>
28#include <linux/mtd/partitions.h> 25#include <linux/mtd/partitions.h>
29 26
30#include <asm/arch/hwregs/config_defs.h> 27#include <linux/cramfs_fs.h>
28
31#include <asm/axisflashmap.h> 29#include <asm/axisflashmap.h>
32#include <asm/mmu.h> 30#include <asm/mmu.h>
33 31
@@ -37,16 +35,24 @@
37#define FLASH_UNCACHED_ADDR KSEG_E 35#define FLASH_UNCACHED_ADDR KSEG_E
38#define FLASH_CACHED_ADDR KSEG_F 36#define FLASH_CACHED_ADDR KSEG_F
39 37
38#define PAGESIZE (512)
39
40#if CONFIG_ETRAX_FLASH_BUSWIDTH==1 40#if CONFIG_ETRAX_FLASH_BUSWIDTH==1
41#define flash_data __u8 41#define flash_data __u8
42#elif CONFIG_ETRAX_FLASH_BUSWIDTH==2 42#elif CONFIG_ETRAX_FLASH_BUSWIDTH==2
43#define flash_data __u16 43#define flash_data __u16
44#elif CONFIG_ETRAX_FLASH_BUSWIDTH==4 44#elif CONFIG_ETRAX_FLASH_BUSWIDTH==4
45#define flash_data __u16 45#define flash_data __u32
46#endif 46#endif
47 47
48/* From head.S */ 48/* From head.S */
49extern unsigned long romfs_start, romfs_length, romfs_in_flash; 49extern unsigned long romfs_in_flash; /* 1 when romfs_start, _length in flash */
50extern unsigned long romfs_start, romfs_length;
51extern unsigned long nand_boot; /* 1 when booted from nand flash */
52
53struct partition_name {
54 char name[6];
55};
50 56
51/* The master mtd for the entire flash. */ 57/* The master mtd for the entire flash. */
52struct mtd_info* axisflash_mtd = NULL; 58struct mtd_info* axisflash_mtd = NULL;
@@ -112,32 +118,20 @@ static struct map_info map_cse1 = {
112 .map_priv_1 = FLASH_UNCACHED_ADDR + MEM_CSE0_SIZE 118 .map_priv_1 = FLASH_UNCACHED_ADDR + MEM_CSE0_SIZE
113}; 119};
114 120
115/* If no partition-table was found, we use this default-set. */ 121#define MAX_PARTITIONS 7
116#define MAX_PARTITIONS 7 122#ifdef CONFIG_ETRAX_NANDBOOT
117#define NUM_DEFAULT_PARTITIONS 3 123#define NUM_DEFAULT_PARTITIONS 4
124#define DEFAULT_ROOTFS_PARTITION_NO 2
125#define DEFAULT_MEDIA_SIZE 0x2000000 /* 32 megs */
126#else
127#define NUM_DEFAULT_PARTITIONS 3
128#define DEFAULT_ROOTFS_PARTITION_NO (-1)
129#define DEFAULT_MEDIA_SIZE 0x800000 /* 8 megs */
130#endif
118 131
119/* 132#if (MAX_PARTITIONS < NUM_DEFAULT_PARTITIONS)
120 * Default flash size is 2MB. CONFIG_ETRAX_PTABLE_SECTOR is most likely the 133#error MAX_PARTITIONS must be >= than NUM_DEFAULT_PARTITIONS
121 * size of one flash block and "filesystem"-partition needs 5 blocks to be able 134#endif
122 * to use JFFS.
123 */
124static struct mtd_partition axis_default_partitions[NUM_DEFAULT_PARTITIONS] = {
125 {
126 .name = "boot firmware",
127 .size = CONFIG_ETRAX_PTABLE_SECTOR,
128 .offset = 0
129 },
130 {
131 .name = "kernel",
132 .size = 0x200000 - (6 * CONFIG_ETRAX_PTABLE_SECTOR),
133 .offset = CONFIG_ETRAX_PTABLE_SECTOR
134 },
135 {
136 .name = "filesystem",
137 .size = 5 * CONFIG_ETRAX_PTABLE_SECTOR,
138 .offset = 0x200000 - (5 * CONFIG_ETRAX_PTABLE_SECTOR)
139 }
140};
141 135
142/* Initialize the ones normally used. */ 136/* Initialize the ones normally used. */
143static struct mtd_partition axis_partitions[MAX_PARTITIONS] = { 137static struct mtd_partition axis_partitions[MAX_PARTITIONS] = {
@@ -178,6 +172,56 @@ static struct mtd_partition axis_partitions[MAX_PARTITIONS] = {
178 }, 172 },
179}; 173};
180 174
175
176/* If no partition-table was found, we use this default-set.
177 * Default flash size is 8MB (NOR). CONFIG_ETRAX_PTABLE_SECTOR is most
178 * likely the size of one flash block and "filesystem"-partition needs
179 * to be >=5 blocks to be able to use JFFS.
180 */
181static struct mtd_partition axis_default_partitions[NUM_DEFAULT_PARTITIONS] = {
182 {
183 .name = "boot firmware",
184 .size = CONFIG_ETRAX_PTABLE_SECTOR,
185 .offset = 0
186 },
187 {
188 .name = "kernel",
189 .size = 10 * CONFIG_ETRAX_PTABLE_SECTOR,
190 .offset = CONFIG_ETRAX_PTABLE_SECTOR
191 },
192#define FILESYSTEM_SECTOR (11 * CONFIG_ETRAX_PTABLE_SECTOR)
193#ifdef CONFIG_ETRAX_NANDBOOT
194 {
195 .name = "rootfs",
196 .size = 10 * CONFIG_ETRAX_PTABLE_SECTOR,
197 .offset = FILESYSTEM_SECTOR
198 },
199#undef FILESYSTEM_SECTOR
200#define FILESYSTEM_SECTOR (21 * CONFIG_ETRAX_PTABLE_SECTOR)
201#endif
202 {
203 .name = "rwfs",
204 .size = DEFAULT_MEDIA_SIZE - FILESYSTEM_SECTOR,
205 .offset = FILESYSTEM_SECTOR
206 }
207};
208
209#ifdef CONFIG_ETRAX_AXISFLASHMAP_MTD0WHOLE
210/* Main flash device */
211static struct mtd_partition main_partition = {
212 .name = "main",
213 .size = 0,
214 .offset = 0
215};
216#endif
217
218/* Auxilliary partition if we find another flash */
219static struct mtd_partition aux_partition = {
220 .name = "aux",
221 .size = 0,
222 .offset = 0
223};
224
181/* 225/*
182 * Probe a chip select for AMD-compatible (JEDEC) or CFI-compatible flash 226 * Probe a chip select for AMD-compatible (JEDEC) or CFI-compatible flash
183 * chips in that order (because the amd_flash-driver is faster). 227 * chips in that order (because the amd_flash-driver is faster).
@@ -191,7 +235,7 @@ static struct mtd_info *probe_cs(struct map_info *map_cs)
191 map_cs->name, map_cs->size, map_cs->map_priv_1); 235 map_cs->name, map_cs->size, map_cs->map_priv_1);
192 236
193#ifdef CONFIG_MTD_CFI 237#ifdef CONFIG_MTD_CFI
194 mtd_cs = do_map_probe("cfi_probe", map_cs); 238 mtd_cs = do_map_probe("cfi_probe", map_cs);
195#endif 239#endif
196#ifdef CONFIG_MTD_JEDECPROBE 240#ifdef CONFIG_MTD_JEDECPROBE
197 if (!mtd_cs) 241 if (!mtd_cs)
@@ -204,7 +248,7 @@ static struct mtd_info *probe_cs(struct map_info *map_cs)
204/* 248/*
205 * Probe each chip select individually for flash chips. If there are chips on 249 * Probe each chip select individually for flash chips. If there are chips on
206 * both cse0 and cse1, the mtd_info structs will be concatenated to one struct 250 * both cse0 and cse1, the mtd_info structs will be concatenated to one struct
207 * so that MTD partitions can cross chip boundaries. 251 * so that MTD partitions can cross chip boundries.
208 * 252 *
209 * The only known restriction to how you can mount your chips is that each 253 * The only known restriction to how you can mount your chips is that each
210 * chip select must hold similar flash chips. But you need external hardware 254 * chip select must hold similar flash chips. But you need external hardware
@@ -216,9 +260,8 @@ static struct mtd_info *flash_probe(void)
216{ 260{
217 struct mtd_info *mtd_cse0; 261 struct mtd_info *mtd_cse0;
218 struct mtd_info *mtd_cse1; 262 struct mtd_info *mtd_cse1;
219 struct mtd_info *mtd_nand = NULL;
220 struct mtd_info *mtd_total; 263 struct mtd_info *mtd_total;
221 struct mtd_info *mtds[3]; 264 struct mtd_info *mtds[2];
222 int count = 0; 265 int count = 0;
223 266
224 if ((mtd_cse0 = probe_cs(&map_cse0)) != NULL) 267 if ((mtd_cse0 = probe_cs(&map_cse0)) != NULL)
@@ -226,12 +269,7 @@ static struct mtd_info *flash_probe(void)
226 if ((mtd_cse1 = probe_cs(&map_cse1)) != NULL) 269 if ((mtd_cse1 = probe_cs(&map_cse1)) != NULL)
227 mtds[count++] = mtd_cse1; 270 mtds[count++] = mtd_cse1;
228 271
229#ifdef CONFIG_ETRAX_NANDFLASH 272 if (!mtd_cse0 && !mtd_cse1) {
230 if ((mtd_nand = crisv32_nand_flash_probe()) != NULL)
231 mtds[count++] = mtd_nand;
232#endif
233
234 if (!mtd_cse0 && !mtd_cse1 && !mtd_nand) {
235 /* No chip found. */ 273 /* No chip found. */
236 return NULL; 274 return NULL;
237 } 275 }
@@ -245,9 +283,7 @@ static struct mtd_info *flash_probe(void)
245 * So we use the MTD concatenation layer instead of further 283 * So we use the MTD concatenation layer instead of further
246 * complicating the probing procedure. 284 * complicating the probing procedure.
247 */ 285 */
248 mtd_total = mtd_concat_create(mtds, 286 mtd_total = mtd_concat_create(mtds, count, "cse0+cse1");
249 count,
250 "cse0+cse1+nand");
251#else 287#else
252 printk(KERN_ERR "%s and %s: Cannot concatenate due to kernel " 288 printk(KERN_ERR "%s and %s: Cannot concatenate due to kernel "
253 "(mis)configuration!\n", map_cse0.name, map_cse1.name); 289 "(mis)configuration!\n", map_cse0.name, map_cse1.name);
@@ -255,61 +291,162 @@ static struct mtd_info *flash_probe(void)
255#endif 291#endif
256 if (!mtd_total) { 292 if (!mtd_total) {
257 printk(KERN_ERR "%s and %s: Concatenation failed!\n", 293 printk(KERN_ERR "%s and %s: Concatenation failed!\n",
258 map_cse0.name, map_cse1.name); 294 map_cse0.name, map_cse1.name);
259 295
260 /* The best we can do now is to only use what we found 296 /* The best we can do now is to only use what we found
261 * at cse0. 297 * at cse0. */
262 */
263 mtd_total = mtd_cse0; 298 mtd_total = mtd_cse0;
264 map_destroy(mtd_cse1); 299 map_destroy(mtd_cse1);
265 } 300 }
266 } else { 301 } else
267 mtd_total = mtd_cse0? mtd_cse0 : mtd_cse1 ? mtd_cse1 : mtd_nand; 302 mtd_total = mtd_cse0 ? mtd_cse0 : mtd_cse1;
268
269 }
270 303
271 return mtd_total; 304 return mtd_total;
272} 305}
273 306
274extern unsigned long crisv32_nand_boot;
275extern unsigned long crisv32_nand_cramfs_offset;
276
277/* 307/*
278 * Probe the flash chip(s) and, if it succeeds, read the partition-table 308 * Probe the flash chip(s) and, if it succeeds, read the partition-table
279 * and register the partitions with MTD. 309 * and register the partitions with MTD.
280 */ 310 */
281static int __init init_axis_flash(void) 311static int __init init_axis_flash(void)
282{ 312{
283 struct mtd_info *mymtd; 313 struct mtd_info *main_mtd;
314 struct mtd_info *aux_mtd = NULL;
284 int err = 0; 315 int err = 0;
285 int pidx = 0; 316 int pidx = 0;
286 struct partitiontable_head *ptable_head = NULL; 317 struct partitiontable_head *ptable_head = NULL;
287 struct partitiontable_entry *ptable; 318 struct partitiontable_entry *ptable;
288 int use_default_ptable = 1; /* Until proven otherwise. */ 319 int ptable_ok = 0;
289 const char *pmsg = KERN_INFO " /dev/flash%d at 0x%08x, size 0x%08x\n"; 320 static char page[PAGESIZE];
290 static char page[512];
291 size_t len; 321 size_t len;
322 int ram_rootfs_partition = -1; /* -1 => no RAM rootfs partition */
323 int part;
324
325 /* We need a root fs. If it resides in RAM, we need to use an
326 * MTDRAM device, so it must be enabled in the kernel config,
327 * but its size must be configured as 0 so as not to conflict
328 * with our usage.
329 */
330#if !defined(CONFIG_MTD_MTDRAM) || (CONFIG_MTDRAM_TOTAL_SIZE != 0) || (CONFIG_MTDRAM_ABS_POS != 0)
331 if (!romfs_in_flash && !nand_boot) {
332 printk(KERN_EMERG "axisflashmap: Cannot create an MTD RAM "
333 "device; configure CONFIG_MTD_MTDRAM with size = 0!\n");
334 panic("This kernel cannot boot from RAM!\n");
335 }
336#endif
337
338#ifndef CONFIG_ETRAX_VCS_SIM
339 main_mtd = flash_probe();
340 if (main_mtd)
341 printk(KERN_INFO "%s: 0x%08x bytes of NOR flash memory.\n",
342 main_mtd->name, main_mtd->size);
343
344#ifdef CONFIG_ETRAX_NANDFLASH
345 aux_mtd = crisv32_nand_flash_probe();
346 if (aux_mtd)
347 printk(KERN_INFO "%s: 0x%08x bytes of NAND flash memory.\n",
348 aux_mtd->name, aux_mtd->size);
349
350#ifdef CONFIG_ETRAX_NANDBOOT
351 {
352 struct mtd_info *tmp_mtd;
292 353
293#ifndef CONFIG_ETRAXFS_SIM 354 printk(KERN_INFO "axisflashmap: Set to boot from NAND flash, "
294 mymtd = flash_probe(); 355 "making NAND flash primary device.\n");
295 mymtd->read(mymtd, CONFIG_ETRAX_PTABLE_SECTOR, 512, &len, page); 356 tmp_mtd = main_mtd;
296 ptable_head = (struct partitiontable_head *)(page + PARTITION_TABLE_OFFSET); 357 main_mtd = aux_mtd;
358 aux_mtd = tmp_mtd;
359 }
360#endif /* CONFIG_ETRAX_NANDBOOT */
361#endif /* CONFIG_ETRAX_NANDFLASH */
297 362
298 if (!mymtd) { 363 if (!main_mtd && !aux_mtd) {
299 /* There's no reason to use this module if no flash chip can 364 /* There's no reason to use this module if no flash chip can
300 * be identified. Make sure that's understood. 365 * be identified. Make sure that's understood.
301 */ 366 */
302 printk(KERN_INFO "axisflashmap: Found no flash chip.\n"); 367 printk(KERN_INFO "axisflashmap: Found no flash chip.\n");
303 } else {
304 printk(KERN_INFO "%s: 0x%08x bytes of flash memory.\n",
305 mymtd->name, mymtd->size);
306 axisflash_mtd = mymtd;
307 } 368 }
308 369
309 if (mymtd) { 370#if 0 /* Dump flash memory so we can see what is going on */
310 mymtd->owner = THIS_MODULE; 371 if (main_mtd) {
372 int sectoraddr, i;
373 for (sectoraddr = 0; sectoraddr < 2*65536+4096;
374 sectoraddr += PAGESIZE) {
375 main_mtd->read(main_mtd, sectoraddr, PAGESIZE, &len,
376 page);
377 printk(KERN_INFO
378 "Sector at %d (length %d):\n",
379 sectoraddr, len);
380 for (i = 0; i < PAGESIZE; i += 16) {
381 printk(KERN_INFO
382 "%02x %02x %02x %02x "
383 "%02x %02x %02x %02x "
384 "%02x %02x %02x %02x "
385 "%02x %02x %02x %02x\n",
386 page[i] & 255, page[i+1] & 255,
387 page[i+2] & 255, page[i+3] & 255,
388 page[i+4] & 255, page[i+5] & 255,
389 page[i+6] & 255, page[i+7] & 255,
390 page[i+8] & 255, page[i+9] & 255,
391 page[i+10] & 255, page[i+11] & 255,
392 page[i+12] & 255, page[i+13] & 255,
393 page[i+14] & 255, page[i+15] & 255);
394 }
395 }
396 }
397#endif
398
399 if (main_mtd) {
400 main_mtd->owner = THIS_MODULE;
401 axisflash_mtd = main_mtd;
402
403 loff_t ptable_sector = CONFIG_ETRAX_PTABLE_SECTOR;
404
405 /* First partition (rescue) is always set to the default. */
406 pidx++;
407#ifdef CONFIG_ETRAX_NANDBOOT
408 /* We know where the partition table should be located,
409 * it will be in first good block after that.
410 */
411 int blockstat;
412 do {
413 blockstat = main_mtd->block_isbad(main_mtd,
414 ptable_sector);
415 if (blockstat < 0)
416 ptable_sector = 0; /* read error */
417 else if (blockstat)
418 ptable_sector += main_mtd->erasesize;
419 } while (blockstat && ptable_sector);
420#endif
421 if (ptable_sector) {
422 main_mtd->read(main_mtd, ptable_sector, PAGESIZE,
423 &len, page);
424 ptable_head = &((struct partitiontable *) page)->head;
425 }
426
427#if 0 /* Dump partition table so we can see what is going on */
428 printk(KERN_INFO
429 "axisflashmap: flash read %d bytes at 0x%08x, data: "
430 "%02x %02x %02x %02x %02x %02x %02x %02x\n",
431 len, CONFIG_ETRAX_PTABLE_SECTOR,
432 page[0] & 255, page[1] & 255,
433 page[2] & 255, page[3] & 255,
434 page[4] & 255, page[5] & 255,
435 page[6] & 255, page[7] & 255);
436 printk(KERN_INFO
437 "axisflashmap: partition table offset %d, data: "
438 "%02x %02x %02x %02x %02x %02x %02x %02x\n",
439 PARTITION_TABLE_OFFSET,
440 page[PARTITION_TABLE_OFFSET+0] & 255,
441 page[PARTITION_TABLE_OFFSET+1] & 255,
442 page[PARTITION_TABLE_OFFSET+2] & 255,
443 page[PARTITION_TABLE_OFFSET+3] & 255,
444 page[PARTITION_TABLE_OFFSET+4] & 255,
445 page[PARTITION_TABLE_OFFSET+5] & 255,
446 page[PARTITION_TABLE_OFFSET+6] & 255,
447 page[PARTITION_TABLE_OFFSET+7] & 255);
448#endif
311 } 449 }
312 pidx++; /* First partition is always set to the default. */
313 450
314 if (ptable_head && (ptable_head->magic == PARTITION_TABLE_MAGIC) 451 if (ptable_head && (ptable_head->magic == PARTITION_TABLE_MAGIC)
315 && (ptable_head->size < 452 && (ptable_head->size <
@@ -322,7 +459,6 @@ static int __init init_axis_flash(void)
322 /* Looks like a start, sane length and end of a 459 /* Looks like a start, sane length and end of a
323 * partition table, lets check csum etc. 460 * partition table, lets check csum etc.
324 */ 461 */
325 int ptable_ok = 0;
326 struct partitiontable_entry *max_addr = 462 struct partitiontable_entry *max_addr =
327 (struct partitiontable_entry *) 463 (struct partitiontable_entry *)
328 ((unsigned long)ptable_head + sizeof(*ptable_head) + 464 ((unsigned long)ptable_head + sizeof(*ptable_head) +
@@ -346,104 +482,170 @@ static int __init init_axis_flash(void)
346 ptable_ok = (csum == ptable_head->checksum); 482 ptable_ok = (csum == ptable_head->checksum);
347 483
348 /* Read the entries and use/show the info. */ 484 /* Read the entries and use/show the info. */
349 printk(KERN_INFO " Found a%s partition table at 0x%p-0x%p.\n", 485 printk(KERN_INFO "axisflashmap: "
486 "Found a%s partition table at 0x%p-0x%p.\n",
350 (ptable_ok ? " valid" : "n invalid"), ptable_head, 487 (ptable_ok ? " valid" : "n invalid"), ptable_head,
351 max_addr); 488 max_addr);
352 489
353 /* We have found a working bootblock. Now read the 490 /* We have found a working bootblock. Now read the
354 * partition table. Scan the table. It ends when 491 * partition table. Scan the table. It ends with 0xffffffff.
355 * there is 0xffffffff, that is, empty flash.
356 */ 492 */
357 while (ptable_ok 493 while (ptable_ok
358 && ptable->offset != 0xffffffff 494 && ptable->offset != PARTITIONTABLE_END_MARKER
359 && ptable < max_addr 495 && ptable < max_addr
360 && pidx < MAX_PARTITIONS) { 496 && pidx < MAX_PARTITIONS - 1) {
361 497
362 axis_partitions[pidx].offset = offset + ptable->offset + (crisv32_nand_boot ? 16384 : 0); 498 axis_partitions[pidx].offset = offset + ptable->offset;
363 axis_partitions[pidx].size = ptable->size; 499#ifdef CONFIG_ETRAX_NANDFLASH
364 500 if (main_mtd->type == MTD_NANDFLASH) {
365 printk(pmsg, pidx, axis_partitions[pidx].offset, 501 axis_partitions[pidx].size =
366 axis_partitions[pidx].size); 502 (((ptable+1)->offset ==
503 PARTITIONTABLE_END_MARKER) ?
504 main_mtd->size :
505 ((ptable+1)->offset + offset)) -
506 (ptable->offset + offset);
507
508 } else
509#endif /* CONFIG_ETRAX_NANDFLASH */
510 axis_partitions[pidx].size = ptable->size;
511#ifdef CONFIG_ETRAX_NANDBOOT
512 /* Save partition number of jffs2 ro partition.
513 * Needed if RAM booting or root file system in RAM.
514 */
515 if (!nand_boot &&
516 ram_rootfs_partition < 0 && /* not already set */
517 ptable->type == PARTITION_TYPE_JFFS2 &&
518 (ptable->flags & PARTITION_FLAGS_READONLY_MASK) ==
519 PARTITION_FLAGS_READONLY)
520 ram_rootfs_partition = pidx;
521#endif /* CONFIG_ETRAX_NANDBOOT */
367 pidx++; 522 pidx++;
368 ptable++; 523 ptable++;
369 } 524 }
370 use_default_ptable = !ptable_ok;
371 } 525 }
372 526
373 if (romfs_in_flash) { 527 /* Decide whether to use default partition table. */
374 /* Add an overlapping device for the root partition (romfs). */ 528 /* Only use default table if we actually have a device (main_mtd) */
375 529
376 axis_partitions[pidx].name = "romfs"; 530 struct mtd_partition *partition = &axis_partitions[0];
377 if (crisv32_nand_boot) { 531 if (main_mtd && !ptable_ok) {
378 char* data = kmalloc(1024, GFP_KERNEL); 532 memcpy(axis_partitions, axis_default_partitions,
379 int len; 533 sizeof(axis_default_partitions));
380 int offset = crisv32_nand_cramfs_offset & ~(1024-1); 534 pidx = NUM_DEFAULT_PARTITIONS;
381 char* tmp; 535 ram_rootfs_partition = DEFAULT_ROOTFS_PARTITION_NO;
382 536 }
383 mymtd->read(mymtd, offset, 1024, &len, data);
384 tmp = &data[crisv32_nand_cramfs_offset % 512];
385 axis_partitions[pidx].size = *(unsigned*)(tmp + 4);
386 axis_partitions[pidx].offset = crisv32_nand_cramfs_offset;
387 kfree(data);
388 } else {
389 axis_partitions[pidx].size = romfs_length;
390 axis_partitions[pidx].offset = romfs_start - FLASH_CACHED_ADDR;
391 }
392 537
538 /* Add artificial partitions for rootfs if necessary */
539 if (romfs_in_flash) {
540 /* rootfs is in directly accessible flash memory = NOR flash.
541 Add an overlapping device for the rootfs partition. */
542 printk(KERN_INFO "axisflashmap: Adding partition for "
543 "overlapping root file system image\n");
544 axis_partitions[pidx].size = romfs_length;
545 axis_partitions[pidx].offset = romfs_start - FLASH_CACHED_ADDR;
546 axis_partitions[pidx].name = "romfs";
393 axis_partitions[pidx].mask_flags |= MTD_WRITEABLE; 547 axis_partitions[pidx].mask_flags |= MTD_WRITEABLE;
394 548 ram_rootfs_partition = -1;
395 printk(KERN_INFO
396 " Adding readonly flash partition for romfs image:\n");
397 printk(pmsg, pidx, axis_partitions[pidx].offset,
398 axis_partitions[pidx].size);
399 pidx++; 549 pidx++;
400 } 550 } else if (romfs_length && !nand_boot) {
401 551 /* romfs exists in memory, but not in flash, so must be in RAM.
402 if (mymtd) { 552 * Configure an MTDRAM partition. */
403 if (use_default_ptable) { 553 if (ram_rootfs_partition < 0) {
404 printk(KERN_INFO " Using default partition table.\n"); 554 /* None set yet, put it at the end */
405 err = add_mtd_partitions(mymtd, axis_default_partitions, 555 ram_rootfs_partition = pidx;
406 NUM_DEFAULT_PARTITIONS); 556 pidx++;
407 } else {
408 err = add_mtd_partitions(mymtd, axis_partitions, pidx);
409 } 557 }
558 printk(KERN_INFO "axisflashmap: Adding partition for "
559 "root file system image in RAM\n");
560 axis_partitions[ram_rootfs_partition].size = romfs_length;
561 axis_partitions[ram_rootfs_partition].offset = romfs_start;
562 axis_partitions[ram_rootfs_partition].name = "romfs";
563 axis_partitions[ram_rootfs_partition].mask_flags |=
564 MTD_WRITEABLE;
565 }
410 566
411 if (err) { 567#ifdef CONFIG_ETRAX_AXISFLASHMAP_MTD0WHOLE
412 panic("axisflashmap could not add MTD partitions!\n"); 568 if (main_mtd) {
413 } 569 main_partition.size = main_mtd->size;
570 err = add_mtd_partitions(main_mtd, &main_partition, 1);
571 if (err)
572 panic("axisflashmap: Could not initialize "
573 "partition for whole main mtd device!\n");
414 } 574 }
415/* CONFIG_EXTRAXFS_SIM */
416#endif 575#endif
417 576
418 if (!romfs_in_flash) { 577 /* Now, register all partitions with mtd.
419 /* Create an RAM device for the root partition (romfs). */ 578 * We do this one at a time so we can slip in an MTDRAM device
579 * in the proper place if required. */
580
581 for (part = 0; part < pidx; part++) {
582 if (part == ram_rootfs_partition) {
583 /* add MTDRAM partition here */
584 struct mtd_info *mtd_ram;
585
586 mtd_ram = kmalloc(sizeof(struct mtd_info), GFP_KERNEL);
587 if (!mtd_ram)
588 panic("axisflashmap: Couldn't allocate memory "
589 "for mtd_info!\n");
590 printk(KERN_INFO "axisflashmap: Adding RAM partition "
591 "for rootfs image.\n");
592 err = mtdram_init_device(mtd_ram,
593 (void *)partition[part].offset,
594 partition[part].size,
595 partition[part].name);
596 if (err)
597 panic("axisflashmap: Could not initialize "
598 "MTD RAM device!\n");
599 /* JFFS2 likes to have an erasesize. Keep potential
600 * JFFS2 rootfs happy by providing one. Since image
601 * was most likely created for main mtd, use that
602 * erasesize, if available. Otherwise, make a guess. */
603 mtd_ram->erasesize = (main_mtd ? main_mtd->erasesize :
604 CONFIG_ETRAX_PTABLE_SECTOR);
605 } else {
606 err = add_mtd_partitions(main_mtd, &partition[part], 1);
607 if (err)
608 panic("axisflashmap: Could not add mtd "
609 "partition %d\n", part);
610 }
611 }
612#endif /* CONFIG_EXTRAX_VCS_SIM */
613
614#ifdef CONFIG_ETRAX_VCS_SIM
615 /* For simulator, always use a RAM partition.
616 * The rootfs will be found after the kernel in RAM,
617 * with romfs_start and romfs_end indicating location and size.
618 */
619 struct mtd_info *mtd_ram;
620
621 mtd_ram = kmalloc(sizeof(struct mtd_info), GFP_KERNEL);
622 if (!mtd_ram) {
623 panic("axisflashmap: Couldn't allocate memory for "
624 "mtd_info!\n");
625 }
420 626
421#if !defined(CONFIG_MTD_MTDRAM) || (CONFIG_MTDRAM_TOTAL_SIZE != 0) || (CONFIG_MTDRAM_ABS_POS != 0) 627 printk(KERN_INFO "axisflashmap: Adding RAM partition for romfs, "
422 /* No use trying to boot this kernel from RAM. Panic! */ 628 "at %u, size %u\n",
423 printk(KERN_EMERG "axisflashmap: Cannot create an MTD RAM " 629 (unsigned) romfs_start, (unsigned) romfs_length);
424 "device due to kernel (mis)configuration!\n");
425 panic("This kernel cannot boot from RAM!\n");
426#else
427 struct mtd_info *mtd_ram;
428 630
429 mtd_ram = kmalloc(sizeof(struct mtd_info), 631 err = mtdram_init_device(mtd_ram, (void *)romfs_start,
430 GFP_KERNEL); 632 romfs_length, "romfs");
431 if (!mtd_ram) { 633 if (err) {
432 panic("axisflashmap couldn't allocate memory for " 634 panic("axisflashmap: Could not initialize MTD RAM "
433 "mtd_info!\n"); 635 "device!\n");
434 } 636 }
637#endif /* CONFIG_EXTRAX_VCS_SIM */
435 638
436 printk(KERN_INFO " Adding RAM partition for romfs image:\n"); 639#ifndef CONFIG_ETRAX_VCS_SIM
437 printk(pmsg, pidx, romfs_start, romfs_length); 640 if (aux_mtd) {
641 aux_partition.size = aux_mtd->size;
642 err = add_mtd_partitions(aux_mtd, &aux_partition, 1);
643 if (err)
644 panic("axisflashmap: Could not initialize "
645 "aux mtd device!\n");
438 646
439 err = mtdram_init_device(mtd_ram, (void*)romfs_start,
440 romfs_length, "romfs");
441 if (err) {
442 panic("axisflashmap could not initialize MTD RAM "
443 "device!\n");
444 }
445#endif
446 } 647 }
648#endif /* CONFIG_EXTRAX_VCS_SIM */
447 649
448 return err; 650 return err;
449} 651}
diff --git a/arch/cris/arch-v32/drivers/cryptocop.c b/arch/cris/arch-v32/drivers/cryptocop.c
index e8914d401696..9fb58202be99 100644
--- a/arch/cris/arch-v32/drivers/cryptocop.c
+++ b/arch/cris/arch-v32/drivers/cryptocop.c
@@ -1,8 +1,7 @@
1/* $Id: cryptocop.c,v 1.13 2005/04/21 17:27:55 henriken Exp $ 1/*
2 *
3 * Stream co-processor driver for the ETRAX FS 2 * Stream co-processor driver for the ETRAX FS
4 * 3 *
5 * Copyright (C) 2003-2005 Axis Communications AB 4 * Copyright (C) 2003-2007 Axis Communications AB
6 */ 5 */
7 6
8#include <linux/init.h> 7#include <linux/init.h>
@@ -25,17 +24,29 @@
25#include <asm/signal.h> 24#include <asm/signal.h>
26#include <asm/irq.h> 25#include <asm/irq.h>
27 26
28#include <asm/arch/dma.h> 27#include <dma.h>
29#include <asm/arch/hwregs/dma.h> 28#include <hwregs/dma.h>
30#include <asm/arch/hwregs/reg_map.h> 29#include <hwregs/reg_map.h>
31#include <asm/arch/hwregs/reg_rdwr.h> 30#include <hwregs/reg_rdwr.h>
32#include <asm/arch/hwregs/intr_vect_defs.h> 31#include <hwregs/intr_vect_defs.h>
33 32
34#include <asm/arch/hwregs/strcop.h> 33#include <hwregs/strcop.h>
35#include <asm/arch/hwregs/strcop_defs.h> 34#include <hwregs/strcop_defs.h>
36#include <asm/arch/cryptocop.h> 35#include <cryptocop.h>
37 36
38 37#ifdef CONFIG_ETRAXFS
38#define IN_DMA 9
39#define OUT_DMA 8
40#define IN_DMA_INST regi_dma9
41#define OUT_DMA_INST regi_dma8
42#define DMA_IRQ DMA9_INTR_VECT
43#else
44#define IN_DMA 3
45#define OUT_DMA 2
46#define IN_DMA_INST regi_dma3
47#define OUT_DMA_INST regi_dma2
48#define DMA_IRQ DMA3_INTR_VECT
49#endif
39 50
40#define DESCR_ALLOC_PAD (31) 51#define DESCR_ALLOC_PAD (31)
41 52
@@ -1886,14 +1897,14 @@ static void cryptocop_do_tasklet(unsigned long unused)
1886} 1897}
1887 1898
1888static irqreturn_t 1899static irqreturn_t
1889dma_done_interrupt(int irq, void *dev_id, struct pt_regs * regs) 1900dma_done_interrupt(int irq, void *dev_id)
1890{ 1901{
1891 struct cryptocop_prio_job *done_job; 1902 struct cryptocop_prio_job *done_job;
1892 reg_dma_rw_ack_intr ack_intr = { 1903 reg_dma_rw_ack_intr ack_intr = {
1893 .data = 1, 1904 .data = 1,
1894 }; 1905 };
1895 1906
1896 REG_WR (dma, regi_dma9, rw_ack_intr, ack_intr); 1907 REG_WR(dma, IN_DMA_INST, rw_ack_intr, ack_intr);
1897 1908
1898 DEBUG(printk("cryptocop DMA done\n")); 1909 DEBUG(printk("cryptocop DMA done\n"));
1899 1910
@@ -1937,7 +1948,6 @@ dma_done_interrupt(int irq, void *dev_id, struct pt_regs * regs)
1937static int init_cryptocop(void) 1948static int init_cryptocop(void)
1938{ 1949{
1939 unsigned long flags; 1950 unsigned long flags;
1940 reg_intr_vect_rw_mask intr_mask;
1941 reg_dma_rw_cfg dma_cfg = {.en = 1}; 1951 reg_dma_rw_cfg dma_cfg = {.en = 1};
1942 reg_dma_rw_intr_mask intr_mask_in = {.data = regk_dma_yes}; /* Only want descriptor interrupts from the DMA in channel. */ 1952 reg_dma_rw_intr_mask intr_mask_in = {.data = regk_dma_yes}; /* Only want descriptor interrupts from the DMA in channel. */
1943 reg_dma_rw_ack_intr ack_intr = {.data = 1,.in_eop = 1 }; 1953 reg_dma_rw_ack_intr ack_intr = {.data = 1,.in_eop = 1 };
@@ -1950,10 +1960,14 @@ static int init_cryptocop(void)
1950 .en = 1 1960 .en = 1
1951 }; 1961 };
1952 1962
1953 if (request_irq(DMA9_INTR_VECT, dma_done_interrupt, 0, "stream co-processor DMA", NULL)) panic("request_irq stream co-processor irq dma9"); 1963 if (request_irq(DMA_IRQ, dma_done_interrupt, 0,
1964 "stream co-processor DMA", NULL))
1965 panic("request_irq stream co-processor irq dma9");
1954 1966
1955 (void)crisv32_request_dma(8, "strcop", DMA_PANIC_ON_ERROR, 0, dma_strp); 1967 (void)crisv32_request_dma(OUT_DMA, "strcop", DMA_PANIC_ON_ERROR,
1956 (void)crisv32_request_dma(9, "strcop", DMA_PANIC_ON_ERROR, 0, dma_strp); 1968 0, dma_strp);
1969 (void)crisv32_request_dma(IN_DMA, "strcop", DMA_PANIC_ON_ERROR,
1970 0, dma_strp);
1957 1971
1958 local_irq_save(flags); 1972 local_irq_save(flags);
1959 1973
@@ -1963,24 +1977,19 @@ static int init_cryptocop(void)
1963 strcop_cfg.en = 1; 1977 strcop_cfg.en = 1;
1964 REG_WR(strcop, regi_strcop, rw_cfg, strcop_cfg); 1978 REG_WR(strcop, regi_strcop, rw_cfg, strcop_cfg);
1965 1979
1966 /* Enable DMA9 interrupt */
1967 intr_mask = REG_RD(intr_vect, regi_irq, rw_mask);
1968 intr_mask.dma9 = 1;
1969 REG_WR(intr_vect, regi_irq, rw_mask, intr_mask);
1970
1971 /* Enable DMAs. */ 1980 /* Enable DMAs. */
1972 REG_WR(dma, regi_dma9, rw_cfg, dma_cfg); /* input DMA */ 1981 REG_WR(dma, IN_DMA_INST, rw_cfg, dma_cfg); /* input DMA */
1973 REG_WR(dma, regi_dma8, rw_cfg, dma_cfg); /* output DMA */ 1982 REG_WR(dma, OUT_DMA_INST, rw_cfg, dma_cfg); /* output DMA */
1974 1983
1975 /* Set up wordsize = 4 for DMAs. */ 1984 /* Set up wordsize = 4 for DMAs. */
1976 DMA_WR_CMD (regi_dma8, regk_dma_set_w_size4); 1985 DMA_WR_CMD(OUT_DMA_INST, regk_dma_set_w_size4);
1977 DMA_WR_CMD (regi_dma9, regk_dma_set_w_size4); 1986 DMA_WR_CMD(IN_DMA_INST, regk_dma_set_w_size4);
1978 1987
1979 /* Enable interrupts. */ 1988 /* Enable interrupts. */
1980 REG_WR(dma, regi_dma9, rw_intr_mask, intr_mask_in); 1989 REG_WR(dma, IN_DMA_INST, rw_intr_mask, intr_mask_in);
1981 1990
1982 /* Clear intr ack. */ 1991 /* Clear intr ack. */
1983 REG_WR(dma, regi_dma9, rw_ack_intr, ack_intr); 1992 REG_WR(dma, IN_DMA_INST, rw_ack_intr, ack_intr);
1984 1993
1985 local_irq_restore(flags); 1994 local_irq_restore(flags);
1986 1995
@@ -1991,7 +2000,6 @@ static int init_cryptocop(void)
1991static void release_cryptocop(void) 2000static void release_cryptocop(void)
1992{ 2001{
1993 unsigned long flags; 2002 unsigned long flags;
1994 reg_intr_vect_rw_mask intr_mask;
1995 reg_dma_rw_cfg dma_cfg = {.en = 0}; 2003 reg_dma_rw_cfg dma_cfg = {.en = 0};
1996 reg_dma_rw_intr_mask intr_mask_in = {0}; 2004 reg_dma_rw_intr_mask intr_mask_in = {0};
1997 reg_dma_rw_ack_intr ack_intr = {.data = 1,.in_eop = 1 }; 2005 reg_dma_rw_ack_intr ack_intr = {.data = 1,.in_eop = 1 };
@@ -1999,26 +2007,21 @@ static void release_cryptocop(void)
1999 local_irq_save(flags); 2007 local_irq_save(flags);
2000 2008
2001 /* Clear intr ack. */ 2009 /* Clear intr ack. */
2002 REG_WR(dma, regi_dma9, rw_ack_intr, ack_intr); 2010 REG_WR(dma, IN_DMA_INST, rw_ack_intr, ack_intr);
2003
2004 /* Disable DMA9 interrupt */
2005 intr_mask = REG_RD(intr_vect, regi_irq, rw_mask);
2006 intr_mask.dma9 = 0;
2007 REG_WR(intr_vect, regi_irq, rw_mask, intr_mask);
2008 2011
2009 /* Disable DMAs. */ 2012 /* Disable DMAs. */
2010 REG_WR(dma, regi_dma9, rw_cfg, dma_cfg); /* input DMA */ 2013 REG_WR(dma, IN_DMA_INST, rw_cfg, dma_cfg); /* input DMA */
2011 REG_WR(dma, regi_dma8, rw_cfg, dma_cfg); /* output DMA */ 2014 REG_WR(dma, OUT_DMA_INST, rw_cfg, dma_cfg); /* output DMA */
2012 2015
2013 /* Disable interrupts. */ 2016 /* Disable interrupts. */
2014 REG_WR(dma, regi_dma9, rw_intr_mask, intr_mask_in); 2017 REG_WR(dma, IN_DMA_INST, rw_intr_mask, intr_mask_in);
2015 2018
2016 local_irq_restore(flags); 2019 local_irq_restore(flags);
2017 2020
2018 free_irq(DMA9_INTR_VECT, NULL); 2021 free_irq(DMA_IRQ, NULL);
2019 2022
2020 (void)crisv32_free_dma(8); 2023 (void)crisv32_free_dma(OUT_DMA);
2021 (void)crisv32_free_dma(9); 2024 (void)crisv32_free_dma(IN_DMA);
2022} 2025}
2023 2026
2024 2027
@@ -2076,13 +2079,13 @@ static void cryptocop_job_queue_close(void)
2076 reg_dma_rw_cfg dma_out_cfg, dma_in_cfg; 2079 reg_dma_rw_cfg dma_out_cfg, dma_in_cfg;
2077 2080
2078 /* Stop DMA. */ 2081 /* Stop DMA. */
2079 dma_out_cfg = REG_RD(dma, regi_dma8, rw_cfg); 2082 dma_out_cfg = REG_RD(dma, OUT_DMA_INST, rw_cfg);
2080 dma_out_cfg.en = regk_dma_no; 2083 dma_out_cfg.en = regk_dma_no;
2081 REG_WR(dma, regi_dma8, rw_cfg, dma_out_cfg); 2084 REG_WR(dma, OUT_DMA_INST, rw_cfg, dma_out_cfg);
2082 2085
2083 dma_in_cfg = REG_RD(dma, regi_dma9, rw_cfg); 2086 dma_in_cfg = REG_RD(dma, IN_DMA_INST, rw_cfg);
2084 dma_in_cfg.en = regk_dma_no; 2087 dma_in_cfg.en = regk_dma_no;
2085 REG_WR(dma, regi_dma9, rw_cfg, dma_in_cfg); 2088 REG_WR(dma, IN_DMA_INST, rw_cfg, dma_in_cfg);
2086 2089
2087 /* Disble the cryptocop. */ 2090 /* Disble the cryptocop. */
2088 rw_cfg = REG_RD(strcop, regi_strcop, rw_cfg); 2091 rw_cfg = REG_RD(strcop, regi_strcop, rw_cfg);
@@ -2226,10 +2229,11 @@ static void cryptocop_start_job(void)
2226 &pj->iop->ctx_out, (char*)virt_to_phys(&pj->iop->ctx_out))); 2229 &pj->iop->ctx_out, (char*)virt_to_phys(&pj->iop->ctx_out)));
2227 2230
2228 /* Start input DMA. */ 2231 /* Start input DMA. */
2229 DMA_START_CONTEXT(regi_dma9, virt_to_phys(&pj->iop->ctx_in)); 2232 flush_dma_context(&pj->iop->ctx_in);
2233 DMA_START_CONTEXT(IN_DMA_INST, virt_to_phys(&pj->iop->ctx_in));
2230 2234
2231 /* Start output DMA. */ 2235 /* Start output DMA. */
2232 DMA_START_CONTEXT(regi_dma8, virt_to_phys(&pj->iop->ctx_out)); 2236 DMA_START_CONTEXT(OUT_DMA_INST, virt_to_phys(&pj->iop->ctx_out));
2233 2237
2234 spin_unlock_irqrestore(&running_job_lock, running_job_flags); 2238 spin_unlock_irqrestore(&running_job_lock, running_job_flags);
2235 DEBUG(printk("cryptocop_start_job: exiting\n")); 2239 DEBUG(printk("cryptocop_start_job: exiting\n"));
diff --git a/arch/cris/arch-v32/drivers/i2c.c b/arch/cris/arch-v32/drivers/i2c.c
index f1edd2e359b2..c2fb7a5c1396 100644
--- a/arch/cris/arch-v32/drivers/i2c.c
+++ b/arch/cris/arch-v32/drivers/i2c.c
@@ -19,10 +19,10 @@
19*! 19*!
20*! --------------------------------------------------------------------------- 20*! ---------------------------------------------------------------------------
21*! 21*!
22*! (C) Copyright 1999-2002 Axis Communications AB, LUND, SWEDEN 22*! (C) Copyright 1999-2007 Axis Communications AB, LUND, SWEDEN
23*! 23*!
24*!***************************************************************************/ 24*!***************************************************************************/
25/* $Id: i2c.c,v 1.2 2005/05/09 15:29:49 starvik Exp $ */ 25
26/****************** INCLUDE FILES SECTION ***********************************/ 26/****************** INCLUDE FILES SECTION ***********************************/
27 27
28#include <linux/module.h> 28#include <linux/module.h>
@@ -79,6 +79,8 @@ static const char i2c_name[] = "i2c";
79 79
80#define i2c_delay(usecs) udelay(usecs) 80#define i2c_delay(usecs) udelay(usecs)
81 81
82static DEFINE_SPINLOCK(i2c_lock); /* Protect directions etc */
83
82/****************** VARIABLE SECTION ************************************/ 84/****************** VARIABLE SECTION ************************************/
83 85
84static struct crisv32_iopin cris_i2c_clk; 86static struct crisv32_iopin cris_i2c_clk;
@@ -252,6 +254,7 @@ i2c_getack(void)
252 * generate ACK clock pulse 254 * generate ACK clock pulse
253 */ 255 */
254 i2c_clk(I2C_CLOCK_HIGH); 256 i2c_clk(I2C_CLOCK_HIGH);
257#if 0
255 /* 258 /*
256 * Use PORT PB instead of I2C 259 * Use PORT PB instead of I2C
257 * for input. (I2C not working) 260 * for input. (I2C not working)
@@ -264,6 +267,8 @@ i2c_getack(void)
264 i2c_data(1); 267 i2c_data(1);
265 i2c_disable(); 268 i2c_disable();
266 i2c_dir_in(); 269 i2c_dir_in();
270#endif
271
267 /* 272 /*
268 * now wait for ack 273 * now wait for ack
269 */ 274 */
@@ -271,11 +276,11 @@ i2c_getack(void)
271 /* 276 /*
272 * check for ack 277 * check for ack
273 */ 278 */
274 if(i2c_getbit()) 279 if (i2c_getbit())
275 ack = 0; 280 ack = 0;
276 i2c_delay(CLOCK_HIGH_TIME/2); 281 i2c_delay(CLOCK_HIGH_TIME/2);
277 if(!ack){ 282 if (!ack) {
278 if(!i2c_getbit()) /* receiver pulled SDA low */ 283 if (!i2c_getbit()) /* receiver pulld SDA low */
279 ack = 1; 284 ack = 1;
280 i2c_delay(CLOCK_HIGH_TIME/2); 285 i2c_delay(CLOCK_HIGH_TIME/2);
281 } 286 }
@@ -285,6 +290,7 @@ i2c_getack(void)
285 * before we enable our output. If we keep data high 290 * before we enable our output. If we keep data high
286 * and enable output, we would generate a stop condition. 291 * and enable output, we would generate a stop condition.
287 */ 292 */
293#if 0
288 i2c_data(I2C_DATA_LOW); 294 i2c_data(I2C_DATA_LOW);
289 295
290 /* 296 /*
@@ -292,6 +298,7 @@ i2c_getack(void)
292 */ 298 */
293 i2c_enable(); 299 i2c_enable();
294 i2c_dir_out(); 300 i2c_dir_out();
301#endif
295 i2c_clk(I2C_CLOCK_LOW); 302 i2c_clk(I2C_CLOCK_LOW);
296 i2c_delay(CLOCK_HIGH_TIME/4); 303 i2c_delay(CLOCK_HIGH_TIME/4);
297 /* 304 /*
@@ -375,6 +382,121 @@ i2c_sendnack(void)
375 382
376/*#--------------------------------------------------------------------------- 383/*#---------------------------------------------------------------------------
377*# 384*#
385*# FUNCTION NAME: i2c_write
386*#
387*# DESCRIPTION : Writes a value to an I2C device
388*#
389*#--------------------------------------------------------------------------*/
390int
391i2c_write(unsigned char theSlave, void *data, size_t nbytes)
392{
393 int error, cntr = 3;
394 unsigned char bytes_wrote = 0;
395 unsigned char value;
396 unsigned long flags;
397
398 spin_lock_irqsave(&i2c_lock, flags);
399
400 do {
401 error = 0;
402
403 i2c_start();
404 /*
405 * send slave address
406 */
407 i2c_outbyte((theSlave & 0xfe));
408 /*
409 * wait for ack
410 */
411 if (!i2c_getack())
412 error = 1;
413 /*
414 * send data
415 */
416 for (bytes_wrote = 0; bytes_wrote < nbytes; bytes_wrote++) {
417 memcpy(&value, data + bytes_wrote, sizeof value);
418 i2c_outbyte(value);
419 /*
420 * now it's time to wait for ack
421 */
422 if (!i2c_getack())
423 error |= 4;
424 }
425 /*
426 * end byte stream
427 */
428 i2c_stop();
429
430 } while (error && cntr--);
431
432 i2c_delay(CLOCK_LOW_TIME);
433
434 spin_unlock_irqrestore(&i2c_lock, flags);
435
436 return -error;
437}
438
439/*#---------------------------------------------------------------------------
440*#
441*# FUNCTION NAME: i2c_read
442*#
443*# DESCRIPTION : Reads a value from an I2C device
444*#
445*#--------------------------------------------------------------------------*/
446int
447i2c_read(unsigned char theSlave, void *data, size_t nbytes)
448{
449 unsigned char b = 0;
450 unsigned char bytes_read = 0;
451 int error, cntr = 3;
452 unsigned long flags;
453
454 spin_lock_irqsave(&i2c_lock, flags);
455
456 do {
457 error = 0;
458 memset(data, 0, nbytes);
459 /*
460 * generate start condition
461 */
462 i2c_start();
463 /*
464 * send slave address
465 */
466 i2c_outbyte((theSlave | 0x01));
467 /*
468 * wait for ack
469 */
470 if (!i2c_getack())
471 error = 1;
472 /*
473 * fetch data
474 */
475 for (bytes_read = 0; bytes_read < nbytes; bytes_read++) {
476 b = i2c_inbyte();
477 memcpy(data + bytes_read, &b, sizeof b);
478
479 if (bytes_read < (nbytes - 1))
480 i2c_sendack();
481 }
482 /*
483 * last received byte needs to be nacked
484 * instead of acked
485 */
486 i2c_sendnack();
487 /*
488 * end sequence
489 */
490 i2c_stop();
491 } while (error && cntr--);
492
493 spin_unlock_irqrestore(&i2c_lock, flags);
494
495 return -error;
496}
497
498/*#---------------------------------------------------------------------------
499*#
378*# FUNCTION NAME: i2c_writereg 500*# FUNCTION NAME: i2c_writereg
379*# 501*#
380*# DESCRIPTION : Writes a value to an I2C device 502*# DESCRIPTION : Writes a value to an I2C device
@@ -387,12 +509,10 @@ i2c_writereg(unsigned char theSlave, unsigned char theReg,
387 int error, cntr = 3; 509 int error, cntr = 3;
388 unsigned long flags; 510 unsigned long flags;
389 511
512 spin_lock_irqsave(&i2c_lock, flags);
513
390 do { 514 do {
391 error = 0; 515 error = 0;
392 /*
393 * we don't like to be interrupted
394 */
395 local_irq_save(flags);
396 516
397 i2c_start(); 517 i2c_start();
398 /* 518 /*
@@ -427,15 +547,12 @@ i2c_writereg(unsigned char theSlave, unsigned char theReg,
427 * end byte stream 547 * end byte stream
428 */ 548 */
429 i2c_stop(); 549 i2c_stop();
430 /*
431 * enable interrupt again
432 */
433 local_irq_restore(flags);
434
435 } while(error && cntr--); 550 } while(error && cntr--);
436 551
437 i2c_delay(CLOCK_LOW_TIME); 552 i2c_delay(CLOCK_LOW_TIME);
438 553
554 spin_unlock_irqrestore(&i2c_lock, flags);
555
439 return -error; 556 return -error;
440} 557}
441 558
@@ -453,13 +570,11 @@ i2c_readreg(unsigned char theSlave, unsigned char theReg)
453 int error, cntr = 3; 570 int error, cntr = 3;
454 unsigned long flags; 571 unsigned long flags;
455 572
573 spin_lock_irqsave(&i2c_lock, flags);
574
456 do { 575 do {
457 error = 0; 576 error = 0;
458 /* 577 /*
459 * we don't like to be interrupted
460 */
461 local_irq_save(flags);
462 /*
463 * generate start condition 578 * generate start condition
464 */ 579 */
465 i2c_start(); 580 i2c_start();
@@ -482,7 +597,7 @@ i2c_readreg(unsigned char theSlave, unsigned char theReg)
482 * now it's time to wait for ack 597 * now it's time to wait for ack
483 */ 598 */
484 if(!i2c_getack()) 599 if(!i2c_getack())
485 error = 1; 600 error |= 2;
486 /* 601 /*
487 * repeat start condition 602 * repeat start condition
488 */ 603 */
@@ -496,7 +611,7 @@ i2c_readreg(unsigned char theSlave, unsigned char theReg)
496 * wait for ack 611 * wait for ack
497 */ 612 */
498 if(!i2c_getack()) 613 if(!i2c_getack())
499 error = 1; 614 error |= 4;
500 /* 615 /*
501 * fetch register 616 * fetch register
502 */ 617 */
@@ -510,13 +625,11 @@ i2c_readreg(unsigned char theSlave, unsigned char theReg)
510 * end sequence 625 * end sequence
511 */ 626 */
512 i2c_stop(); 627 i2c_stop();
513 /*
514 * enable interrupt again
515 */
516 local_irq_restore(flags);
517 628
518 } while(error && cntr--); 629 } while(error && cntr--);
519 630
631 spin_unlock_irqrestore(&i2c_lock, flags);
632
520 return b; 633 return b;
521} 634}
522 635
@@ -540,7 +653,7 @@ i2c_ioctl(struct inode *inode, struct file *file,
540 unsigned int cmd, unsigned long arg) 653 unsigned int cmd, unsigned long arg)
541{ 654{
542 if(_IOC_TYPE(cmd) != ETRAXI2C_IOCTYPE) { 655 if(_IOC_TYPE(cmd) != ETRAXI2C_IOCTYPE) {
543 return -EINVAL; 656 return -ENOTTY;
544 } 657 }
545 658
546 switch (_IOC_NR(cmd)) { 659 switch (_IOC_NR(cmd)) {
@@ -580,31 +693,52 @@ static const struct file_operations i2c_fops = {
580 .release = i2c_release, 693 .release = i2c_release,
581}; 694};
582 695
583int __init 696static int __init i2c_init(void)
584i2c_init(void)
585{ 697{
586 int res; 698 static int res;
699 static int first = 1;
587 700
588 /* Setup and enable the Port B I2C interface */ 701 if (!first)
702 return res;
589 703
590 crisv32_io_get_name(&cris_i2c_data, CONFIG_ETRAX_I2C_DATA_PORT); 704 first = 0;
591 crisv32_io_get_name(&cris_i2c_clk, CONFIG_ETRAX_I2C_CLK_PORT); 705
706 /* Setup and enable the DATA and CLK pins */
707
708 res = crisv32_io_get_name(&cris_i2c_data,
709 CONFIG_ETRAX_V32_I2C_DATA_PORT);
710 if (res < 0)
711 return res;
712
713 res = crisv32_io_get_name(&cris_i2c_clk, CONFIG_ETRAX_V32_I2C_CLK_PORT);
714 crisv32_io_set_dir(&cris_i2c_clk, crisv32_io_dir_out);
715
716 return res;
717}
718
719
720static int __init i2c_register(void)
721{
722 int res;
723
724 res = i2c_init();
725 if (res < 0)
726 return res;
592 727
593 /* register char device */ 728 /* register char device */
594 729
595 res = register_chrdev(I2C_MAJOR, i2c_name, &i2c_fops); 730 res = register_chrdev(I2C_MAJOR, i2c_name, &i2c_fops);
596 if(res < 0) { 731 if (res < 0) {
597 printk(KERN_ERR "i2c: couldn't get a major number.\n"); 732 printk(KERN_ERR "i2c: couldn't get a major number.\n");
598 return res; 733 return res;
599 } 734 }
600 735
601 printk(KERN_INFO "I2C driver v2.2, (c) 1999-2001 Axis Communications AB\n"); 736 printk(KERN_INFO
737 "I2C driver v2.2, (c) 1999-2007 Axis Communications AB\n");
602 738
603 return 0; 739 return 0;
604} 740}
605
606/* this makes sure that i2c_init is called during boot */ 741/* this makes sure that i2c_init is called during boot */
607 742module_init(i2c_register);
608module_init(i2c_init);
609 743
610/****************** END OF FILE i2c.c ********************************/ 744/****************** END OF FILE i2c.c ********************************/
diff --git a/arch/cris/arch-v32/drivers/i2c.h b/arch/cris/arch-v32/drivers/i2c.h
index bfe1a13f9f35..c073cf4ba016 100644
--- a/arch/cris/arch-v32/drivers/i2c.h
+++ b/arch/cris/arch-v32/drivers/i2c.h
@@ -3,6 +3,8 @@
3 3
4/* High level I2C actions */ 4/* High level I2C actions */
5int __init i2c_init(void); 5int __init i2c_init(void);
6int i2c_write(unsigned char theSlave, void *data, size_t nbytes);
7int i2c_read(unsigned char theSlave, void *data, size_t nbytes);
6int i2c_writereg(unsigned char theSlave, unsigned char theReg, unsigned char theValue); 8int i2c_writereg(unsigned char theSlave, unsigned char theReg, unsigned char theValue);
7unsigned char i2c_readreg(unsigned char theSlave, unsigned char theReg); 9unsigned char i2c_readreg(unsigned char theSlave, unsigned char theReg);
8 10
diff --git a/arch/cris/arch-v32/drivers/iop_fw_load.c b/arch/cris/arch-v32/drivers/iop_fw_load.c
index f4bdc1dfa320..3b3857ec1f15 100644
--- a/arch/cris/arch-v32/drivers/iop_fw_load.c
+++ b/arch/cris/arch-v32/drivers/iop_fw_load.c
@@ -1,5 +1,4 @@
1/* $Id: iop_fw_load.c,v 1.4 2005/04/07 09:27:46 larsv Exp $ 1/*
2 *
3 * Firmware loader for ETRAX FS IO-Processor 2 * Firmware loader for ETRAX FS IO-Processor
4 * 3 *
5 * Copyright (C) 2004 Axis Communications AB 4 * Copyright (C) 2004 Axis Communications AB
@@ -11,12 +10,13 @@
11#include <linux/device.h> 10#include <linux/device.h>
12#include <linux/firmware.h> 11#include <linux/firmware.h>
13 12
14#include <asm/arch/hwregs/reg_map.h> 13#include <hwregs/reg_rdwr.h>
15#include <asm/arch/hwregs/iop/iop_reg_space.h> 14#include <hwregs/reg_map.h>
16#include <asm/arch/hwregs/iop/iop_mpu_macros.h> 15#include <hwregs/iop/iop_reg_space.h>
17#include <asm/arch/hwregs/iop/iop_mpu_defs.h> 16#include <hwregs/iop/iop_mpu_macros.h>
18#include <asm/arch/hwregs/iop/iop_spu_defs.h> 17#include <hwregs/iop/iop_mpu_defs.h>
19#include <asm/arch/hwregs/iop/iop_sw_cpu_defs.h> 18#include <hwregs/iop/iop_spu_defs.h>
19#include <hwregs/iop/iop_sw_cpu_defs.h>
20 20
21#define IOP_TIMEOUT 100 21#define IOP_TIMEOUT 100
22 22
diff --git a/arch/cris/arch-v32/drivers/mach-a3/Makefile b/arch/cris/arch-v32/drivers/mach-a3/Makefile
new file mode 100644
index 000000000000..5c6d2a2a080e
--- /dev/null
+++ b/arch/cris/arch-v32/drivers/mach-a3/Makefile
@@ -0,0 +1,6 @@
1#
2# Makefile for Etrax-specific drivers
3#
4
5obj-$(CONFIG_ETRAX_NANDFLASH) += nandflash.o
6obj-$(CONFIG_ETRAX_GPIO) += gpio.o
diff --git a/arch/cris/arch-v32/drivers/mach-a3/gpio.c b/arch/cris/arch-v32/drivers/mach-a3/gpio.c
new file mode 100644
index 000000000000..de107dad9f4f
--- /dev/null
+++ b/arch/cris/arch-v32/drivers/mach-a3/gpio.c
@@ -0,0 +1,984 @@
1/*
2 * Artec-3 general port I/O device
3 *
4 * Copyright (c) 2007 Axis Communications AB
5 *
6 * Authors: Bjorn Wesen (initial version)
7 * Ola Knutsson (LED handling)
8 * Johan Adolfsson (read/set directions, write, port G,
9 * port to ETRAX FS.
10 * Ricard Wanderlof (PWM for Artpec-3)
11 *
12 */
13
14#include <linux/module.h>
15#include <linux/sched.h>
16#include <linux/slab.h>
17#include <linux/ioport.h>
18#include <linux/errno.h>
19#include <linux/kernel.h>
20#include <linux/fs.h>
21#include <linux/string.h>
22#include <linux/poll.h>
23#include <linux/init.h>
24#include <linux/interrupt.h>
25#include <linux/spinlock.h>
26
27#include <asm/etraxgpio.h>
28#include <hwregs/reg_map.h>
29#include <hwregs/reg_rdwr.h>
30#include <hwregs/gio_defs.h>
31#include <hwregs/intr_vect_defs.h>
32#include <asm/io.h>
33#include <asm/system.h>
34#include <asm/irq.h>
35#include <asm/arch/mach/pinmux.h>
36
37#ifdef CONFIG_ETRAX_VIRTUAL_GPIO
38#include "../i2c.h"
39
40#define VIRT_I2C_ADDR 0x40
41#endif
42
43/* The following gio ports on ARTPEC-3 is available:
44 * pa 32 bits
45 * pb 32 bits
46 * pc 16 bits
47 * each port has a rw_px_dout, r_px_din and rw_px_oe register.
48 */
49
50#define GPIO_MAJOR 120 /* experimental MAJOR number */
51
52#define I2C_INTERRUPT_BITS 0x300 /* i2c0_done and i2c1_done bits */
53
54#define D(x)
55
56#if 0
57static int dp_cnt;
58#define DP(x) \
59 do { \
60 dp_cnt++; \
61 if (dp_cnt % 1000 == 0) \
62 x; \
63 } while (0)
64#else
65#define DP(x)
66#endif
67
68static char gpio_name[] = "etrax gpio";
69
70#ifdef CONFIG_ETRAX_VIRTUAL_GPIO
71static int virtual_gpio_ioctl(struct file *file, unsigned int cmd,
72 unsigned long arg);
73#endif
74static int gpio_ioctl(struct inode *inode, struct file *file,
75 unsigned int cmd, unsigned long arg);
76static ssize_t gpio_write(struct file *file, const char __user *buf,
77 size_t count, loff_t *off);
78static int gpio_open(struct inode *inode, struct file *filp);
79static int gpio_release(struct inode *inode, struct file *filp);
80static unsigned int gpio_poll(struct file *filp,
81 struct poll_table_struct *wait);
82
83/* private data per open() of this driver */
84
85struct gpio_private {
86 struct gpio_private *next;
87 /* The IO_CFG_WRITE_MODE_VALUE only support 8 bits: */
88 unsigned char clk_mask;
89 unsigned char data_mask;
90 unsigned char write_msb;
91 unsigned char pad1;
92 /* These fields are generic */
93 unsigned long highalarm, lowalarm;
94 wait_queue_head_t alarm_wq;
95 int minor;
96};
97
98static void gpio_set_alarm(struct gpio_private *priv);
99static int gpio_leds_ioctl(unsigned int cmd, unsigned long arg);
100static int gpio_pwm_ioctl(struct gpio_private *priv, unsigned int cmd,
101 unsigned long arg);
102
103
104/* linked list of alarms to check for */
105
106static struct gpio_private *alarmlist;
107
108static int wanted_interrupts;
109
110static DEFINE_SPINLOCK(gpio_lock);
111
112#define NUM_PORTS (GPIO_MINOR_LAST+1)
113#define GIO_REG_RD_ADDR(reg) \
114 (unsigned long *)(regi_gio + REG_RD_ADDR_gio_##reg)
115#define GIO_REG_WR_ADDR(reg) \
116 (unsigned long *)(regi_gio + REG_WR_ADDR_gio_##reg)
117static unsigned long led_dummy;
118static unsigned long port_d_dummy; /* Only input on Artpec-3 */
119#ifdef CONFIG_ETRAX_VIRTUAL_GPIO
120static unsigned long port_e_dummy; /* Non existent on Artpec-3 */
121static unsigned long virtual_dummy;
122static unsigned long virtual_rw_pv_oe = CONFIG_ETRAX_DEF_GIO_PV_OE;
123static unsigned short cached_virtual_gpio_read;
124#endif
125
126static unsigned long *data_out[NUM_PORTS] = {
127 GIO_REG_WR_ADDR(rw_pa_dout),
128 GIO_REG_WR_ADDR(rw_pb_dout),
129 &led_dummy,
130 GIO_REG_WR_ADDR(rw_pc_dout),
131 &port_d_dummy,
132#ifdef CONFIG_ETRAX_VIRTUAL_GPIO
133 &port_e_dummy,
134 &virtual_dummy,
135#endif
136};
137
138static unsigned long *data_in[NUM_PORTS] = {
139 GIO_REG_RD_ADDR(r_pa_din),
140 GIO_REG_RD_ADDR(r_pb_din),
141 &led_dummy,
142 GIO_REG_RD_ADDR(r_pc_din),
143 GIO_REG_RD_ADDR(r_pd_din),
144#ifdef CONFIG_ETRAX_VIRTUAL_GPIO
145 &port_e_dummy,
146 &virtual_dummy,
147#endif
148};
149
150static unsigned long changeable_dir[NUM_PORTS] = {
151 CONFIG_ETRAX_PA_CHANGEABLE_DIR,
152 CONFIG_ETRAX_PB_CHANGEABLE_DIR,
153 0,
154 CONFIG_ETRAX_PC_CHANGEABLE_DIR,
155 0,
156#ifdef CONFIG_ETRAX_VIRTUAL_GPIO
157 0,
158 CONFIG_ETRAX_PV_CHANGEABLE_DIR,
159#endif
160};
161
162static unsigned long changeable_bits[NUM_PORTS] = {
163 CONFIG_ETRAX_PA_CHANGEABLE_BITS,
164 CONFIG_ETRAX_PB_CHANGEABLE_BITS,
165 0,
166 CONFIG_ETRAX_PC_CHANGEABLE_BITS,
167 0,
168#ifdef CONFIG_ETRAX_VIRTUAL_GPIO
169 0,
170 CONFIG_ETRAX_PV_CHANGEABLE_BITS,
171#endif
172};
173
174static unsigned long *dir_oe[NUM_PORTS] = {
175 GIO_REG_WR_ADDR(rw_pa_oe),
176 GIO_REG_WR_ADDR(rw_pb_oe),
177 &led_dummy,
178 GIO_REG_WR_ADDR(rw_pc_oe),
179 &port_d_dummy,
180#ifdef CONFIG_ETRAX_VIRTUAL_GPIO
181 &port_e_dummy,
182 &virtual_rw_pv_oe,
183#endif
184};
185
186static void gpio_set_alarm(struct gpio_private *priv)
187{
188 int bit;
189 int intr_cfg;
190 int mask;
191 int pins;
192 unsigned long flags;
193
194 spin_lock_irqsave(&gpio_lock, flags);
195 intr_cfg = REG_RD_INT(gio, regi_gio, rw_intr_cfg);
196 pins = REG_RD_INT(gio, regi_gio, rw_intr_pins);
197 mask = REG_RD_INT(gio, regi_gio, rw_intr_mask) & I2C_INTERRUPT_BITS;
198
199 for (bit = 0; bit < 32; bit++) {
200 int intr = bit % 8;
201 int pin = bit / 8;
202 if (priv->minor < GPIO_MINOR_LEDS)
203 pin += priv->minor * 4;
204 else
205 pin += (priv->minor - 1) * 4;
206
207 if (priv->highalarm & (1<<bit)) {
208 intr_cfg |= (regk_gio_hi << (intr * 3));
209 mask |= 1 << intr;
210 wanted_interrupts = mask & 0xff;
211 pins |= pin << (intr * 4);
212 } else if (priv->lowalarm & (1<<bit)) {
213 intr_cfg |= (regk_gio_lo << (intr * 3));
214 mask |= 1 << intr;
215 wanted_interrupts = mask & 0xff;
216 pins |= pin << (intr * 4);
217 }
218 }
219
220 REG_WR_INT(gio, regi_gio, rw_intr_cfg, intr_cfg);
221 REG_WR_INT(gio, regi_gio, rw_intr_pins, pins);
222 REG_WR_INT(gio, regi_gio, rw_intr_mask, mask);
223
224 spin_unlock_irqrestore(&gpio_lock, flags);
225}
226
227static unsigned int gpio_poll(struct file *file, struct poll_table_struct *wait)
228{
229 unsigned int mask = 0;
230 struct gpio_private *priv = file->private_data;
231 unsigned long data;
232 unsigned long tmp;
233
234 if (priv->minor >= GPIO_MINOR_PWM0 &&
235 priv->minor <= GPIO_MINOR_LAST_PWM)
236 return 0;
237
238 poll_wait(file, &priv->alarm_wq, wait);
239 if (priv->minor <= GPIO_MINOR_D) {
240 data = readl(data_in[priv->minor]);
241 REG_WR_INT(gio, regi_gio, rw_ack_intr, wanted_interrupts);
242 tmp = REG_RD_INT(gio, regi_gio, rw_intr_mask);
243 tmp &= I2C_INTERRUPT_BITS;
244 tmp |= wanted_interrupts;
245 REG_WR_INT(gio, regi_gio, rw_intr_mask, tmp);
246 } else
247 return 0;
248
249 if ((data & priv->highalarm) || (~data & priv->lowalarm))
250 mask = POLLIN|POLLRDNORM;
251
252 DP(printk(KERN_DEBUG "gpio_poll ready: mask 0x%08X\n", mask));
253 return mask;
254}
255
256static irqreturn_t gpio_interrupt(int irq, void *dev_id)
257{
258 reg_gio_rw_intr_mask intr_mask;
259 reg_gio_r_masked_intr masked_intr;
260 reg_gio_rw_ack_intr ack_intr;
261 unsigned long flags;
262 unsigned long tmp;
263 unsigned long tmp2;
264#ifdef CONFIG_ETRAX_VIRTUAL_GPIO
265 unsigned char enable_gpiov_ack = 0;
266#endif
267
268 /* Find what PA interrupts are active */
269 masked_intr = REG_RD(gio, regi_gio, r_masked_intr);
270 tmp = REG_TYPE_CONV(unsigned long, reg_gio_r_masked_intr, masked_intr);
271
272 /* Find those that we have enabled */
273 spin_lock_irqsave(&gpio_lock, flags);
274 tmp &= wanted_interrupts;
275 spin_unlock_irqrestore(&gpio_lock, flags);
276
277#ifdef CONFIG_ETRAX_VIRTUAL_GPIO
278 /* Something changed on virtual GPIO. Interrupt is acked by
279 * reading the device.
280 */
281 if (tmp & (1 << CONFIG_ETRAX_VIRTUAL_GPIO_INTERRUPT_PA_PIN)) {
282 i2c_read(VIRT_I2C_ADDR, (void *)&cached_virtual_gpio_read,
283 sizeof(cached_virtual_gpio_read));
284 enable_gpiov_ack = 1;
285 }
286#endif
287
288 /* Ack them */
289 ack_intr = REG_TYPE_CONV(reg_gio_rw_ack_intr, unsigned long, tmp);
290 REG_WR(gio, regi_gio, rw_ack_intr, ack_intr);
291
292 /* Disable those interrupts.. */
293 intr_mask = REG_RD(gio, regi_gio, rw_intr_mask);
294 tmp2 = REG_TYPE_CONV(unsigned long, reg_gio_rw_intr_mask, intr_mask);
295 tmp2 &= ~tmp;
296#ifdef CONFIG_ETRAX_VIRTUAL_GPIO
297 /* Do not disable interrupt on virtual GPIO. Changes on virtual
298 * pins are only noticed by an interrupt.
299 */
300 if (enable_gpiov_ack)
301 tmp2 |= (1 << CONFIG_ETRAX_VIRTUAL_GPIO_INTERRUPT_PA_PIN);
302#endif
303 intr_mask = REG_TYPE_CONV(reg_gio_rw_intr_mask, unsigned long, tmp2);
304 REG_WR(gio, regi_gio, rw_intr_mask, intr_mask);
305
306 return IRQ_RETVAL(tmp);
307}
308
309static void gpio_write_bit(unsigned long *port, unsigned char data, int bit,
310 unsigned char clk_mask, unsigned char data_mask)
311{
312 unsigned long shadow = readl(port) & ~clk_mask;
313 writel(shadow, port);
314 if (data & 1 << bit)
315 shadow |= data_mask;
316 else
317 shadow &= ~data_mask;
318 writel(shadow, port);
319 /* For FPGA: min 5.0ns (DCC) before CCLK high */
320 shadow |= clk_mask;
321 writel(shadow, port);
322}
323
324static void gpio_write_byte(struct gpio_private *priv, unsigned long *port,
325 unsigned char data)
326{
327 int i;
328
329 if (priv->write_msb)
330 for (i = 7; i >= 0; i--)
331 gpio_write_bit(port, data, i, priv->clk_mask,
332 priv->data_mask);
333 else
334 for (i = 0; i <= 7; i++)
335 gpio_write_bit(port, data, i, priv->clk_mask,
336 priv->data_mask);
337}
338
339
340static ssize_t gpio_write(struct file *file, const char __user *buf,
341 size_t count, loff_t *off)
342{
343 struct gpio_private *priv = file->private_data;
344 unsigned long flags;
345 ssize_t retval = count;
346 /* Only bits 0-7 may be used for write operations but allow all
347 devices except leds... */
348#ifdef CONFIG_ETRAX_VIRTUAL_GPIO
349 if (priv->minor == GPIO_MINOR_V)
350 return -EFAULT;
351#endif
352 if (priv->minor == GPIO_MINOR_LEDS)
353 return -EFAULT;
354
355 if (priv->minor >= GPIO_MINOR_PWM0 &&
356 priv->minor <= GPIO_MINOR_LAST_PWM)
357 return -EFAULT;
358
359 if (!access_ok(VERIFY_READ, buf, count))
360 return -EFAULT;
361
362 /* It must have been configured using the IO_CFG_WRITE_MODE */
363 /* Perhaps a better error code? */
364 if (priv->clk_mask == 0 || priv->data_mask == 0)
365 return -EPERM;
366
367 D(printk(KERN_DEBUG "gpio_write: %lu to data 0x%02X clk 0x%02X "
368 "msb: %i\n",
369 count, priv->data_mask, priv->clk_mask, priv->write_msb));
370
371 spin_lock_irqsave(&gpio_lock, flags);
372
373 while (count--)
374 gpio_write_byte(priv, data_out[priv->minor], *buf++);
375
376 spin_unlock_irqrestore(&gpio_lock, flags);
377 return retval;
378}
379
380static int gpio_open(struct inode *inode, struct file *filp)
381{
382 struct gpio_private *priv;
383 int p = iminor(inode);
384
385 if (p > GPIO_MINOR_LAST_PWM ||
386 (p > GPIO_MINOR_LAST && p < GPIO_MINOR_PWM0))
387 return -EINVAL;
388
389 priv = kmalloc(sizeof(struct gpio_private), GFP_KERNEL);
390
391 if (!priv)
392 return -ENOMEM;
393 memset(priv, 0, sizeof(*priv));
394
395 priv->minor = p;
396 filp->private_data = priv;
397
398 /* initialize the io/alarm struct, not for PWM ports though */
399 if (p <= GPIO_MINOR_LAST) {
400
401 priv->clk_mask = 0;
402 priv->data_mask = 0;
403 priv->highalarm = 0;
404 priv->lowalarm = 0;
405
406 init_waitqueue_head(&priv->alarm_wq);
407
408 /* link it into our alarmlist */
409 spin_lock_irq(&gpio_lock);
410 priv->next = alarmlist;
411 alarmlist = priv;
412 spin_unlock_irq(&gpio_lock);
413 }
414
415 return 0;
416}
417
418static int gpio_release(struct inode *inode, struct file *filp)
419{
420 struct gpio_private *p;
421 struct gpio_private *todel;
422 /* local copies while updating them: */
423 unsigned long a_high, a_low;
424
425 /* prepare to free private structure */
426 todel = filp->private_data;
427
428 /* unlink from alarmlist - only for non-PWM ports though */
429 if (todel->minor <= GPIO_MINOR_LAST) {
430 spin_lock_irq(&gpio_lock);
431 p = alarmlist;
432
433 if (p == todel)
434 alarmlist = todel->next;
435 else {
436 while (p->next != todel)
437 p = p->next;
438 p->next = todel->next;
439 }
440
441 /* Check if there are still any alarms set */
442 p = alarmlist;
443 a_high = 0;
444 a_low = 0;
445 while (p) {
446 if (p->minor == GPIO_MINOR_A) {
447#ifdef CONFIG_ETRAX_VIRTUAL_GPIO
448 p->lowalarm |= (1 << CONFIG_ETRAX_VIRTUAL_GPIO_INTERRUPT_PA_PIN);
449#endif
450 a_high |= p->highalarm;
451 a_low |= p->lowalarm;
452 }
453
454 p = p->next;
455 }
456
457#ifdef CONFIG_ETRAX_VIRTUAL_GPIO
458 /* Variable 'a_low' needs to be set here again
459 * to ensure that interrupt for virtual GPIO is handled.
460 */
461 a_low |= (1 << CONFIG_ETRAX_VIRTUAL_GPIO_INTERRUPT_PA_PIN);
462#endif
463
464 spin_unlock_irq(&gpio_lock);
465 }
466 kfree(todel);
467
468 return 0;
469}
470
471/* Main device API. ioctl's to read/set/clear bits, as well as to
472 * set alarms to wait for using a subsequent select().
473 */
474
475inline unsigned long setget_input(struct gpio_private *priv, unsigned long arg)
476{
477 /* Set direction 0=unchanged 1=input,
478 * return mask with 1=input
479 */
480 unsigned long flags;
481 unsigned long dir_shadow;
482
483 spin_lock_irqsave(&gpio_lock, flags);
484
485 dir_shadow = readl(dir_oe[priv->minor]) &
486 ~(arg & changeable_dir[priv->minor]);
487 writel(dir_shadow, dir_oe[priv->minor]);
488
489 spin_unlock_irqrestore(&gpio_lock, flags);
490
491 if (priv->minor == GPIO_MINOR_C)
492 dir_shadow ^= 0xFFFF; /* Only 16 bits */
493#ifdef CONFIG_ETRAX_VIRTUAL_GPIO
494 else if (priv->minor == GPIO_MINOR_V)
495 dir_shadow ^= 0xFFFF; /* Only 16 bits */
496#endif
497 else
498 dir_shadow ^= 0xFFFFFFFF; /* PA, PB and PD 32 bits */
499
500 return dir_shadow;
501
502} /* setget_input */
503
504static inline unsigned long setget_output(struct gpio_private *priv,
505 unsigned long arg)
506{
507 unsigned long flags;
508 unsigned long dir_shadow;
509
510 spin_lock_irqsave(&gpio_lock, flags);
511
512 dir_shadow = readl(dir_oe[priv->minor]) |
513 (arg & changeable_dir[priv->minor]);
514 writel(dir_shadow, dir_oe[priv->minor]);
515
516 spin_unlock_irqrestore(&gpio_lock, flags);
517 return dir_shadow;
518} /* setget_output */
519
520static int gpio_ioctl(struct inode *inode, struct file *file,
521 unsigned int cmd, unsigned long arg)
522{
523 unsigned long flags;
524 unsigned long val;
525 unsigned long shadow;
526 struct gpio_private *priv = file->private_data;
527
528 if (_IOC_TYPE(cmd) != ETRAXGPIO_IOCTYPE)
529 return -ENOTTY;
530
531 /* Check for special ioctl handlers first */
532
533#ifdef CONFIG_ETRAX_VIRTUAL_GPIO
534 if (priv->minor == GPIO_MINOR_V)
535 return virtual_gpio_ioctl(file, cmd, arg);
536#endif
537
538 if (priv->minor == GPIO_MINOR_LEDS)
539 return gpio_leds_ioctl(cmd, arg);
540
541 if (priv->minor >= GPIO_MINOR_PWM0 &&
542 priv->minor <= GPIO_MINOR_LAST_PWM)
543 return gpio_pwm_ioctl(priv, cmd, arg);
544
545 switch (_IOC_NR(cmd)) {
546 case IO_READBITS: /* Use IO_READ_INBITS and IO_READ_OUTBITS instead */
547 /* Read the port. */
548 return readl(data_in[priv->minor]);
549 case IO_SETBITS:
550 spin_lock_irqsave(&gpio_lock, flags);
551 /* Set changeable bits with a 1 in arg. */
552 shadow = readl(data_out[priv->minor]) |
553 (arg & changeable_bits[priv->minor]);
554 writel(shadow, data_out[priv->minor]);
555 spin_unlock_irqrestore(&gpio_lock, flags);
556 break;
557 case IO_CLRBITS:
558 spin_lock_irqsave(&gpio_lock, flags);
559 /* Clear changeable bits with a 1 in arg. */
560 shadow = readl(data_out[priv->minor]) &
561 ~(arg & changeable_bits[priv->minor]);
562 writel(shadow, data_out[priv->minor]);
563 spin_unlock_irqrestore(&gpio_lock, flags);
564 break;
565 case IO_HIGHALARM:
566 /* Set alarm when bits with 1 in arg go high. */
567 priv->highalarm |= arg;
568 gpio_set_alarm(priv);
569 break;
570 case IO_LOWALARM:
571 /* Set alarm when bits with 1 in arg go low. */
572 priv->lowalarm |= arg;
573 gpio_set_alarm(priv);
574 break;
575 case IO_CLRALARM:
576 /* Clear alarm for bits with 1 in arg. */
577 priv->highalarm &= ~arg;
578 priv->lowalarm &= ~arg;
579 gpio_set_alarm(priv);
580 break;
581 case IO_READDIR: /* Use IO_SETGET_INPUT/OUTPUT instead! */
582 /* Read direction 0=input 1=output */
583 return readl(dir_oe[priv->minor]);
584
585 case IO_SETINPUT: /* Use IO_SETGET_INPUT instead! */
586 /* Set direction 0=unchanged 1=input,
587 * return mask with 1=input
588 */
589 return setget_input(priv, arg);
590
591 case IO_SETOUTPUT: /* Use IO_SETGET_OUTPUT instead! */
592 /* Set direction 0=unchanged 1=output,
593 * return mask with 1=output
594 */
595 return setget_output(priv, arg);
596
597 case IO_CFG_WRITE_MODE:
598 {
599 int res = -EPERM;
600 unsigned long dir_shadow, clk_mask, data_mask, write_msb;
601
602 clk_mask = arg & 0xFF;
603 data_mask = (arg >> 8) & 0xFF;
604 write_msb = (arg >> 16) & 0x01;
605
606 /* Check if we're allowed to change the bits and
607 * the direction is correct
608 */
609 spin_lock_irqsave(&gpio_lock, flags);
610 dir_shadow = readl(dir_oe[priv->minor]);
611 if ((clk_mask & changeable_bits[priv->minor]) &&
612 (data_mask & changeable_bits[priv->minor]) &&
613 (clk_mask & dir_shadow) &&
614 (data_mask & dir_shadow)) {
615 priv->clk_mask = clk_mask;
616 priv->data_mask = data_mask;
617 priv->write_msb = write_msb;
618 res = 0;
619 }
620 spin_unlock_irqrestore(&gpio_lock, flags);
621
622 return res;
623 }
624 case IO_READ_INBITS:
625 /* *arg is result of reading the input pins */
626 val = readl(data_in[priv->minor]);
627 if (copy_to_user((void __user *)arg, &val, sizeof(val)))
628 return -EFAULT;
629 return 0;
630 case IO_READ_OUTBITS:
631 /* *arg is result of reading the output shadow */
632 val = *data_out[priv->minor];
633 if (copy_to_user((void __user *)arg, &val, sizeof(val)))
634 return -EFAULT;
635 break;
636 case IO_SETGET_INPUT:
637 /* bits set in *arg is set to input,
638 * *arg updated with current input pins.
639 */
640 if (copy_from_user(&val, (void __user *)arg, sizeof(val)))
641 return -EFAULT;
642 val = setget_input(priv, val);
643 if (copy_to_user((void __user *)arg, &val, sizeof(val)))
644 return -EFAULT;
645 break;
646 case IO_SETGET_OUTPUT:
647 /* bits set in *arg is set to output,
648 * *arg updated with current output pins.
649 */
650 if (copy_from_user(&val, (void __user *)arg, sizeof(val)))
651 return -EFAULT;
652 val = setget_output(priv, val);
653 if (copy_to_user((void __user *)arg, &val, sizeof(val)))
654 return -EFAULT;
655 break;
656 default:
657 return -EINVAL;
658 } /* switch */
659
660 return 0;
661}
662
663#ifdef CONFIG_ETRAX_VIRTUAL_GPIO
664static int virtual_gpio_ioctl(struct file *file, unsigned int cmd,
665 unsigned long arg)
666{
667 unsigned long flags;
668 unsigned short val;
669 unsigned short shadow;
670 struct gpio_private *priv = file->private_data;
671
672 switch (_IOC_NR(cmd)) {
673 case IO_SETBITS:
674 spin_lock_irqsave(&gpio_lock, flags);
675 /* Set changeable bits with a 1 in arg. */
676 i2c_read(VIRT_I2C_ADDR, (void *)&shadow, sizeof(shadow));
677 shadow |= ~readl(dir_oe[priv->minor]) |
678 (arg & changeable_bits[priv->minor]);
679 i2c_write(VIRT_I2C_ADDR, (void *)&shadow, sizeof(shadow));
680 spin_lock_irqrestore(&gpio_lock, flags);
681 break;
682 case IO_CLRBITS:
683 spin_lock_irqsave(&gpio_lock, flags);
684 /* Clear changeable bits with a 1 in arg. */
685 i2c_read(VIRT_I2C_ADDR, (void *)&shadow, sizeof(shadow));
686 shadow |= ~readl(dir_oe[priv->minor]) &
687 ~(arg & changeable_bits[priv->minor]);
688 i2c_write(VIRT_I2C_ADDR, (void *)&shadow, sizeof(shadow));
689 spin_lock_irqrestore(&gpio_lock, flags);
690 break;
691 case IO_HIGHALARM:
692 /* Set alarm when bits with 1 in arg go high. */
693 priv->highalarm |= arg;
694 break;
695 case IO_LOWALARM:
696 /* Set alarm when bits with 1 in arg go low. */
697 priv->lowalarm |= arg;
698 break;
699 case IO_CLRALARM:
700 /* Clear alarm for bits with 1 in arg. */
701 priv->highalarm &= ~arg;
702 priv->lowalarm &= ~arg;
703 break;
704 case IO_CFG_WRITE_MODE:
705 {
706 unsigned long dir_shadow;
707 dir_shadow = readl(dir_oe[priv->minor]);
708
709 priv->clk_mask = arg & 0xFF;
710 priv->data_mask = (arg >> 8) & 0xFF;
711 priv->write_msb = (arg >> 16) & 0x01;
712 /* Check if we're allowed to change the bits and
713 * the direction is correct
714 */
715 if (!((priv->clk_mask & changeable_bits[priv->minor]) &&
716 (priv->data_mask & changeable_bits[priv->minor]) &&
717 (priv->clk_mask & dir_shadow) &&
718 (priv->data_mask & dir_shadow))) {
719 priv->clk_mask = 0;
720 priv->data_mask = 0;
721 return -EPERM;
722 }
723 break;
724 }
725 case IO_READ_INBITS:
726 /* *arg is result of reading the input pins */
727 val = cached_virtual_gpio_read & ~readl(dir_oe[priv->minor]);
728 if (copy_to_user((void __user *)arg, &val, sizeof(val)))
729 return -EFAULT;
730 return 0;
731
732 case IO_READ_OUTBITS:
733 /* *arg is result of reading the output shadow */
734 i2c_read(VIRT_I2C_ADDR, (void *)&val, sizeof(val));
735 val &= readl(dir_oe[priv->minor]);
736 if (copy_to_user((void __user *)arg, &val, sizeof(val)))
737 return -EFAULT;
738 break;
739 case IO_SETGET_INPUT:
740 {
741 /* bits set in *arg is set to input,
742 * *arg updated with current input pins.
743 */
744 unsigned short input_mask = ~readl(dir_oe[priv->minor]);
745 if (copy_from_user(&val, (void __user *)arg, sizeof(val)))
746 return -EFAULT;
747 val = setget_input(priv, val);
748 if (copy_to_user((void __user *)arg, &val, sizeof(val)))
749 return -EFAULT;
750 if ((input_mask & val) != input_mask) {
751 /* Input pins changed. All ports desired as input
752 * should be set to logic 1.
753 */
754 unsigned short change = input_mask ^ val;
755 i2c_read(VIRT_I2C_ADDR, (void *)&shadow,
756 sizeof(shadow));
757 shadow &= ~change;
758 shadow |= val;
759 i2c_write(VIRT_I2C_ADDR, (void *)&shadow,
760 sizeof(shadow));
761 }
762 break;
763 }
764 case IO_SETGET_OUTPUT:
765 /* bits set in *arg is set to output,
766 * *arg updated with current output pins.
767 */
768 if (copy_from_user(&val, (void __user *)arg, sizeof(val)))
769 return -EFAULT;
770 val = setget_output(priv, val);
771 if (copy_to_user((void __user *)arg, &val, sizeof(val)))
772 return -EFAULT;
773 break;
774 default:
775 return -EINVAL;
776 } /* switch */
777 return 0;
778}
779#endif /* CONFIG_ETRAX_VIRTUAL_GPIO */
780
781static int gpio_leds_ioctl(unsigned int cmd, unsigned long arg)
782{
783 unsigned char green;
784 unsigned char red;
785
786 switch (_IOC_NR(cmd)) {
787 case IO_LEDACTIVE_SET:
788 green = ((unsigned char) arg) & 1;
789 red = (((unsigned char) arg) >> 1) & 1;
790 CRIS_LED_ACTIVE_SET_G(green);
791 CRIS_LED_ACTIVE_SET_R(red);
792 break;
793
794 default:
795 return -EINVAL;
796 } /* switch */
797
798 return 0;
799}
800
801static int gpio_pwm_set_mode(unsigned long arg, int pwm_port)
802{
803 int pinmux_pwm = pinmux_pwm0 + pwm_port;
804 int mode;
805 reg_gio_rw_pwm0_ctrl rw_pwm_ctrl = {
806 .ccd_val = 0,
807 .ccd_override = regk_gio_no,
808 .mode = regk_gio_no
809 };
810 int allocstatus;
811
812 if (get_user(mode, &((struct io_pwm_set_mode *) arg)->mode))
813 return -EFAULT;
814 rw_pwm_ctrl.mode = mode;
815 if (mode != PWM_OFF)
816 allocstatus = crisv32_pinmux_alloc_fixed(pinmux_pwm);
817 else
818 allocstatus = crisv32_pinmux_dealloc_fixed(pinmux_pwm);
819 if (allocstatus)
820 return allocstatus;
821 REG_WRITE(reg_gio_rw_pwm0_ctrl, REG_ADDR(gio, regi_gio, rw_pwm0_ctrl) +
822 12 * pwm_port, rw_pwm_ctrl);
823 return 0;
824}
825
826static int gpio_pwm_set_period(unsigned long arg, int pwm_port)
827{
828 struct io_pwm_set_period periods;
829 reg_gio_rw_pwm0_var rw_pwm_widths;
830
831 if (copy_from_user(&periods, (void __user *)arg, sizeof(periods)))
832 return -EFAULT;
833 if (periods.lo > 8191 || periods.hi > 8191)
834 return -EINVAL;
835 rw_pwm_widths.lo = periods.lo;
836 rw_pwm_widths.hi = periods.hi;
837 REG_WRITE(reg_gio_rw_pwm0_var, REG_ADDR(gio, regi_gio, rw_pwm0_var) +
838 12 * pwm_port, rw_pwm_widths);
839 return 0;
840}
841
842static int gpio_pwm_set_duty(unsigned long arg, int pwm_port)
843{
844 unsigned int duty;
845 reg_gio_rw_pwm0_data rw_pwm_duty;
846
847 if (get_user(duty, &((struct io_pwm_set_duty *) arg)->duty))
848 return -EFAULT;
849 if (duty > 255)
850 return -EINVAL;
851 rw_pwm_duty.data = duty;
852 REG_WRITE(reg_gio_rw_pwm0_data, REG_ADDR(gio, regi_gio, rw_pwm0_data) +
853 12 * pwm_port, rw_pwm_duty);
854 return 0;
855}
856
857static int gpio_pwm_ioctl(struct gpio_private *priv, unsigned int cmd,
858 unsigned long arg)
859{
860 int pwm_port = priv->minor - GPIO_MINOR_PWM0;
861
862 switch (_IOC_NR(cmd)) {
863 case IO_PWM_SET_MODE:
864 return gpio_pwm_set_mode(arg, pwm_port);
865 case IO_PWM_SET_PERIOD:
866 return gpio_pwm_set_period(arg, pwm_port);
867 case IO_PWM_SET_DUTY:
868 return gpio_pwm_set_duty(arg, pwm_port);
869 default:
870 return -EINVAL;
871 }
872 return 0;
873}
874
875static const struct file_operations gpio_fops = {
876 .owner = THIS_MODULE,
877 .poll = gpio_poll,
878 .ioctl = gpio_ioctl,
879 .write = gpio_write,
880 .open = gpio_open,
881 .release = gpio_release,
882};
883
884#ifdef CONFIG_ETRAX_VIRTUAL_GPIO
885static void __init virtual_gpio_init(void)
886{
887 reg_gio_rw_intr_cfg intr_cfg;
888 reg_gio_rw_intr_mask intr_mask;
889 unsigned short shadow;
890
891 shadow = ~virtual_rw_pv_oe; /* Input ports should be set to logic 1 */
892 shadow |= CONFIG_ETRAX_DEF_GIO_PV_OUT;
893 i2c_write(VIRT_I2C_ADDR, (void *)&shadow, sizeof(shadow));
894
895 /* Set interrupt mask and on what state the interrupt shall trigger.
896 * For virtual gpio the interrupt shall trigger on logic '0'.
897 */
898 intr_cfg = REG_RD(gio, regi_gio, rw_intr_cfg);
899 intr_mask = REG_RD(gio, regi_gio, rw_intr_mask);
900
901 switch (CONFIG_ETRAX_VIRTUAL_GPIO_INTERRUPT_PA_PIN) {
902 case 0:
903 intr_cfg.pa0 = regk_gio_lo;
904 intr_mask.pa0 = regk_gio_yes;
905 break;
906 case 1:
907 intr_cfg.pa1 = regk_gio_lo;
908 intr_mask.pa1 = regk_gio_yes;
909 break;
910 case 2:
911 intr_cfg.pa2 = regk_gio_lo;
912 intr_mask.pa2 = regk_gio_yes;
913 break;
914 case 3:
915 intr_cfg.pa3 = regk_gio_lo;
916 intr_mask.pa3 = regk_gio_yes;
917 break;
918 case 4:
919 intr_cfg.pa4 = regk_gio_lo;
920 intr_mask.pa4 = regk_gio_yes;
921 break;
922 case 5:
923 intr_cfg.pa5 = regk_gio_lo;
924 intr_mask.pa5 = regk_gio_yes;
925 break;
926 case 6:
927 intr_cfg.pa6 = regk_gio_lo;
928 intr_mask.pa6 = regk_gio_yes;
929 break;
930 case 7:
931 intr_cfg.pa7 = regk_gio_lo;
932 intr_mask.pa7 = regk_gio_yes;
933 break;
934 }
935
936 REG_WR(gio, regi_gio, rw_intr_cfg, intr_cfg);
937 REG_WR(gio, regi_gio, rw_intr_mask, intr_mask);
938}
939#endif
940
941/* main driver initialization routine, called from mem.c */
942
943static int __init gpio_init(void)
944{
945 int res;
946
947 printk(KERN_INFO "ETRAX FS GPIO driver v2.7, (c) 2003-2008 "
948 "Axis Communications AB\n");
949
950 /* do the formalities */
951
952 res = register_chrdev(GPIO_MAJOR, gpio_name, &gpio_fops);
953 if (res < 0) {
954 printk(KERN_ERR "gpio: couldn't get a major number.\n");
955 return res;
956 }
957
958 /* Clear all leds */
959 CRIS_LED_NETWORK_GRP0_SET(0);
960 CRIS_LED_NETWORK_GRP1_SET(0);
961 CRIS_LED_ACTIVE_SET(0);
962 CRIS_LED_DISK_READ(0);
963 CRIS_LED_DISK_WRITE(0);
964
965 int res2 = request_irq(GIO_INTR_VECT, gpio_interrupt,
966 IRQF_SHARED | IRQF_DISABLED, "gpio", &alarmlist);
967 if (res2) {
968 printk(KERN_ERR "err: irq for gpio\n");
969 return res2;
970 }
971
972 /* No IRQs by default. */
973 REG_WR_INT(gio, regi_gio, rw_intr_pins, 0);
974
975#ifdef CONFIG_ETRAX_VIRTUAL_GPIO
976 virtual_gpio_init();
977#endif
978
979 return res;
980}
981
982/* this makes sure that gpio_init is called during kernel boot */
983
984module_init(gpio_init);
diff --git a/arch/cris/arch-v32/drivers/mach-a3/nandflash.c b/arch/cris/arch-v32/drivers/mach-a3/nandflash.c
new file mode 100644
index 000000000000..01ed0be2d0d1
--- /dev/null
+++ b/arch/cris/arch-v32/drivers/mach-a3/nandflash.c
@@ -0,0 +1,180 @@
1/*
2 * arch/cris/arch-v32/drivers/nandflash.c
3 *
4 * Copyright (c) 2007
5 *
6 * Derived from drivers/mtd/nand/spia.c
7 * Copyright (C) 2000 Steven J. Hill (sjhill@realitydiluted.com)
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 *
13 */
14
15#include <linux/slab.h>
16#include <linux/init.h>
17#include <linux/module.h>
18#include <linux/mtd/mtd.h>
19#include <linux/mtd/nand.h>
20#include <linux/mtd/partitions.h>
21#include <asm/arch/memmap.h>
22#include <hwregs/reg_map.h>
23#include <hwregs/reg_rdwr.h>
24#include <hwregs/pio_defs.h>
25#include <pinmux.h>
26#include <asm/io.h>
27
28#define MANUAL_ALE_CLE_CONTROL 1
29
30#define regf_ALE a0
31#define regf_CLE a1
32#define regf_NCE ce0_n
33
34#define CLE_BIT 10
35#define ALE_BIT 11
36#define CE_BIT 12
37
38struct mtd_info_wrapper {
39 struct mtd_info info;
40 struct nand_chip chip;
41};
42
43/* Bitmask for control pins */
44#define PIN_BITMASK ((1 << CE_BIT) | (1 << CLE_BIT) | (1 << ALE_BIT))
45
46static struct mtd_info *crisv32_mtd;
47/*
48 * hardware specific access to control-lines
49 */
50static void crisv32_hwcontrol(struct mtd_info *mtd, int cmd,
51 unsigned int ctrl)
52{
53 unsigned long flags;
54 reg_pio_rw_dout dout;
55 struct nand_chip *this = mtd->priv;
56
57 local_irq_save(flags);
58
59 /* control bits change */
60 if (ctrl & NAND_CTRL_CHANGE) {
61 dout = REG_RD(pio, regi_pio, rw_dout);
62 dout.regf_NCE = (ctrl & NAND_NCE) ? 0 : 1;
63
64#if !MANUAL_ALE_CLE_CONTROL
65 if (ctrl & NAND_ALE) {
66 /* A0 = ALE high */
67 this->IO_ADDR_W = (void __iomem *)REG_ADDR(pio,
68 regi_pio, rw_io_access1);
69 } else if (ctrl & NAND_CLE) {
70 /* A1 = CLE high */
71 this->IO_ADDR_W = (void __iomem *)REG_ADDR(pio,
72 regi_pio, rw_io_access2);
73 } else {
74 /* A1 = CLE and A0 = ALE low */
75 this->IO_ADDR_W = (void __iomem *)REG_ADDR(pio,
76 regi_pio, rw_io_access0);
77 }
78#else
79
80 dout.regf_CLE = (ctrl & NAND_CLE) ? 1 : 0;
81 dout.regf_ALE = (ctrl & NAND_ALE) ? 1 : 0;
82#endif
83 REG_WR(pio, regi_pio, rw_dout, dout);
84 }
85
86 /* command to chip */
87 if (cmd != NAND_CMD_NONE)
88 writeb(cmd, this->IO_ADDR_W);
89
90 local_irq_restore(flags);
91}
92
93/*
94* read device ready pin
95*/
96static int crisv32_device_ready(struct mtd_info *mtd)
97{
98 reg_pio_r_din din = REG_RD(pio, regi_pio, r_din);
99 return din.rdy;
100}
101
102/*
103 * Main initialization routine
104 */
105struct mtd_info *__init crisv32_nand_flash_probe(void)
106{
107 void __iomem *read_cs;
108 void __iomem *write_cs;
109
110 struct mtd_info_wrapper *wrapper;
111 struct nand_chip *this;
112 int err = 0;
113
114 reg_pio_rw_man_ctrl man_ctrl = {
115 .regf_NCE = regk_pio_yes,
116#if MANUAL_ALE_CLE_CONTROL
117 .regf_ALE = regk_pio_yes,
118 .regf_CLE = regk_pio_yes
119#endif
120 };
121 reg_pio_rw_oe oe = {
122 .regf_NCE = regk_pio_yes,
123#if MANUAL_ALE_CLE_CONTROL
124 .regf_ALE = regk_pio_yes,
125 .regf_CLE = regk_pio_yes
126#endif
127 };
128 reg_pio_rw_dout dout = { .regf_NCE = 1 };
129
130 /* Allocate pio pins to pio */
131 crisv32_pinmux_alloc_fixed(pinmux_pio);
132 /* Set up CE, ALE, CLE (ce0_n, a0, a1) for manual control and output */
133 REG_WR(pio, regi_pio, rw_man_ctrl, man_ctrl);
134 REG_WR(pio, regi_pio, rw_dout, dout);
135 REG_WR(pio, regi_pio, rw_oe, oe);
136
137 /* Allocate memory for MTD device structure and private data */
138 wrapper = kzalloc(sizeof(struct mtd_info_wrapper), GFP_KERNEL);
139 if (!wrapper) {
140 printk(KERN_ERR "Unable to allocate CRISv32 NAND MTD "
141 "device structure.\n");
142 err = -ENOMEM;
143 return NULL;
144 }
145
146 read_cs = write_cs = (void __iomem *)REG_ADDR(pio, regi_pio,
147 rw_io_access0);
148
149 /* Get pointer to private data */
150 this = &wrapper->chip;
151 crisv32_mtd = &wrapper->info;
152
153 /* Link the private data with the MTD structure */
154 crisv32_mtd->priv = this;
155
156 /* Set address of NAND IO lines */
157 this->IO_ADDR_R = read_cs;
158 this->IO_ADDR_W = write_cs;
159 this->cmd_ctrl = crisv32_hwcontrol;
160 this->dev_ready = crisv32_device_ready;
161 /* 20 us command delay time */
162 this->chip_delay = 20;
163 this->ecc.mode = NAND_ECC_SOFT;
164
165 /* Enable the following for a flash based bad block table */
166 /* this->options = NAND_USE_FLASH_BBT; */
167
168 /* Scan to find existance of the device */
169 if (nand_scan(crisv32_mtd, 1)) {
170 err = -ENXIO;
171 goto out_mtd;
172 }
173
174 return crisv32_mtd;
175
176out_mtd:
177 kfree(wrapper);
178 return NULL;
179}
180
diff --git a/arch/cris/arch-v32/drivers/mach-fs/Makefile b/arch/cris/arch-v32/drivers/mach-fs/Makefile
new file mode 100644
index 000000000000..5c6d2a2a080e
--- /dev/null
+++ b/arch/cris/arch-v32/drivers/mach-fs/Makefile
@@ -0,0 +1,6 @@
1#
2# Makefile for Etrax-specific drivers
3#
4
5obj-$(CONFIG_ETRAX_NANDFLASH) += nandflash.o
6obj-$(CONFIG_ETRAX_GPIO) += gpio.o
diff --git a/arch/cris/arch-v32/drivers/gpio.c b/arch/cris/arch-v32/drivers/mach-fs/gpio.c
index d82c5c561135..7863fd4efc2b 100644
--- a/arch/cris/arch-v32/drivers/gpio.c
+++ b/arch/cris/arch-v32/drivers/mach-fs/gpio.c
@@ -1,68 +1,15 @@
1/* $Id: gpio.c,v 1.16 2005/06/19 17:06:49 starvik Exp $ 1/*
2 *
3 * ETRAX CRISv32 general port I/O device 2 * ETRAX CRISv32 general port I/O device
4 * 3 *
5 * Copyright (c) 1999, 2000, 2001, 2002, 2003 Axis Communications AB 4 * Copyright (c) 1999-2006 Axis Communications AB
6 * 5 *
7 * Authors: Bjorn Wesen (initial version) 6 * Authors: Bjorn Wesen (initial version)
8 * Ola Knutsson (LED handling) 7 * Ola Knutsson (LED handling)
9 * Johan Adolfsson (read/set directions, write, port G, 8 * Johan Adolfsson (read/set directions, write, port G,
10 * port to ETRAX FS. 9 * port to ETRAX FS.
11 * 10 *
12 * $Log: gpio.c,v $
13 * Revision 1.16 2005/06/19 17:06:49 starvik
14 * Merge of Linux 2.6.12.
15 *
16 * Revision 1.15 2005/05/25 08:22:20 starvik
17 * Changed GPIO port order to fit packages/devices/axis-2.4.
18 *
19 * Revision 1.14 2005/04/24 18:35:08 starvik
20 * Updated with final register headers.
21 *
22 * Revision 1.13 2005/03/15 15:43:00 starvik
23 * dev_id needs to be supplied for shared IRQs.
24 *
25 * Revision 1.12 2005/03/10 17:12:00 starvik
26 * Protect alarm list with spinlock.
27 *
28 * Revision 1.11 2005/01/05 06:08:59 starvik
29 * No need to do local_irq_disable after local_irq_save.
30 *
31 * Revision 1.10 2004/11/19 08:38:31 starvik
32 * Removed old crap.
33 *
34 * Revision 1.9 2004/05/14 07:58:02 starvik
35 * Merge of changes from 2.4
36 *
37 * Revision 1.8 2003/09/11 07:29:50 starvik
38 * Merge of Linux 2.6.0-test5
39 *
40 * Revision 1.7 2003/07/10 13:25:46 starvik
41 * Compiles for 2.5.74
42 * Lindented ethernet.c
43 *
44 * Revision 1.6 2003/07/04 08:27:46 starvik
45 * Merge of Linux 2.5.74
46 *
47 * Revision 1.5 2003/06/10 08:26:37 johana
48 * Etrax -> ETRAX CRISv32
49 *
50 * Revision 1.4 2003/06/05 14:22:48 johana
51 * Initialise some_alarms.
52 *
53 * Revision 1.3 2003/06/05 10:15:46 johana
54 * New INTR_VECT macros.
55 * Enable interrupts in global config.
56 *
57 * Revision 1.2 2003/06/03 15:52:50 johana
58 * Initial CRIS v32 version.
59 *
60 * Revision 1.1 2003/06/03 08:53:15 johana
61 * Copy of os/lx25/arch/cris/arch-v10/drivers/gpio.c version 1.7.
62 *
63 */ 11 */
64 12
65
66#include <linux/module.h> 13#include <linux/module.h>
67#include <linux/sched.h> 14#include <linux/sched.h>
68#include <linux/slab.h> 15#include <linux/slab.h>
@@ -77,14 +24,20 @@
77#include <linux/spinlock.h> 24#include <linux/spinlock.h>
78 25
79#include <asm/etraxgpio.h> 26#include <asm/etraxgpio.h>
80#include <asm/arch/hwregs/reg_map.h> 27#include <hwregs/reg_map.h>
81#include <asm/arch/hwregs/reg_rdwr.h> 28#include <hwregs/reg_rdwr.h>
82#include <asm/arch/hwregs/gio_defs.h> 29#include <hwregs/gio_defs.h>
83#include <asm/arch/hwregs/intr_vect_defs.h> 30#include <hwregs/intr_vect_defs.h>
84#include <asm/io.h> 31#include <asm/io.h>
85#include <asm/system.h> 32#include <asm/system.h>
86#include <asm/irq.h> 33#include <asm/irq.h>
87 34
35#ifdef CONFIG_ETRAX_VIRTUAL_GPIO
36#include "../i2c.h"
37
38#define VIRT_I2C_ADDR 0x40
39#endif
40
88/* The following gio ports on ETRAX FS is available: 41/* The following gio ports on ETRAX FS is available:
89 * pa 8 bits, supports interrupts off, hi, low, set, posedge, negedge anyedge 42 * pa 8 bits, supports interrupts off, hi, low, set, posedge, negedge anyedge
90 * pb 18 bits 43 * pb 18 bits
@@ -100,7 +53,12 @@
100 53
101#if 0 54#if 0
102static int dp_cnt; 55static int dp_cnt;
103#define DP(x) do { dp_cnt++; if (dp_cnt % 1000 == 0) x; }while(0) 56#define DP(x) \
57 do { \
58 dp_cnt++; \
59 if (dp_cnt % 1000 == 0) \
60 x; \
61 } while (0)
104#else 62#else
105#define DP(x) 63#define DP(x)
106#endif 64#endif
@@ -111,13 +69,18 @@ static char gpio_name[] = "etrax gpio";
111static wait_queue_head_t *gpio_wq; 69static wait_queue_head_t *gpio_wq;
112#endif 70#endif
113 71
72#ifdef CONFIG_ETRAX_VIRTUAL_GPIO
73static int virtual_gpio_ioctl(struct file *file, unsigned int cmd,
74 unsigned long arg);
75#endif
114static int gpio_ioctl(struct inode *inode, struct file *file, 76static int gpio_ioctl(struct inode *inode, struct file *file,
115 unsigned int cmd, unsigned long arg); 77 unsigned int cmd, unsigned long arg);
116static ssize_t gpio_write(struct file * file, const char * buf, size_t count, 78static ssize_t gpio_write(struct file *file, const char *buf, size_t count,
117 loff_t *off); 79 loff_t *off);
118static int gpio_open(struct inode *inode, struct file *filp); 80static int gpio_open(struct inode *inode, struct file *filp);
119static int gpio_release(struct inode *inode, struct file *filp); 81static int gpio_release(struct inode *inode, struct file *filp);
120static unsigned int gpio_poll(struct file *filp, struct poll_table_struct *wait); 82static unsigned int gpio_poll(struct file *filp,
83 struct poll_table_struct *wait);
121 84
122/* private data per open() of this driver */ 85/* private data per open() of this driver */
123 86
@@ -136,18 +99,25 @@ struct gpio_private {
136 99
137/* linked list of alarms to check for */ 100/* linked list of alarms to check for */
138 101
139static struct gpio_private *alarmlist = 0; 102static struct gpio_private *alarmlist;
140 103
141static int gpio_some_alarms = 0; /* Set if someone uses alarm */ 104static int gpio_some_alarms; /* Set if someone uses alarm */
142static unsigned long gpio_pa_high_alarms = 0; 105static unsigned long gpio_pa_high_alarms;
143static unsigned long gpio_pa_low_alarms = 0; 106static unsigned long gpio_pa_low_alarms;
144 107
145static DEFINE_SPINLOCK(alarm_lock); 108static DEFINE_SPINLOCK(alarm_lock);
146 109
147#define NUM_PORTS (GPIO_MINOR_LAST+1) 110#define NUM_PORTS (GPIO_MINOR_LAST+1)
148#define GIO_REG_RD_ADDR(reg) (volatile unsigned long*) (regi_gio + REG_RD_ADDR_gio_##reg ) 111#define GIO_REG_RD_ADDR(reg) \
149#define GIO_REG_WR_ADDR(reg) (volatile unsigned long*) (regi_gio + REG_RD_ADDR_gio_##reg ) 112 (volatile unsigned long *)(regi_gio + REG_RD_ADDR_gio_##reg)
113#define GIO_REG_WR_ADDR(reg) \
114 (volatile unsigned long *)(regi_gio + REG_RD_ADDR_gio_##reg)
150unsigned long led_dummy; 115unsigned long led_dummy;
116#ifdef CONFIG_ETRAX_VIRTUAL_GPIO
117static unsigned long virtual_dummy;
118static unsigned long virtual_rw_pv_oe = CONFIG_ETRAX_DEF_GIO_PV_OE;
119static unsigned short cached_virtual_gpio_read;
120#endif
151 121
152static volatile unsigned long *data_out[NUM_PORTS] = { 122static volatile unsigned long *data_out[NUM_PORTS] = {
153 GIO_REG_WR_ADDR(rw_pa_dout), 123 GIO_REG_WR_ADDR(rw_pa_dout),
@@ -156,6 +126,9 @@ static volatile unsigned long *data_out[NUM_PORTS] = {
156 GIO_REG_WR_ADDR(rw_pc_dout), 126 GIO_REG_WR_ADDR(rw_pc_dout),
157 GIO_REG_WR_ADDR(rw_pd_dout), 127 GIO_REG_WR_ADDR(rw_pd_dout),
158 GIO_REG_WR_ADDR(rw_pe_dout), 128 GIO_REG_WR_ADDR(rw_pe_dout),
129#ifdef CONFIG_ETRAX_VIRTUAL_GPIO
130 &virtual_dummy,
131#endif
159}; 132};
160 133
161static volatile unsigned long *data_in[NUM_PORTS] = { 134static volatile unsigned long *data_in[NUM_PORTS] = {
@@ -165,6 +138,9 @@ static volatile unsigned long *data_in[NUM_PORTS] = {
165 GIO_REG_RD_ADDR(r_pc_din), 138 GIO_REG_RD_ADDR(r_pc_din),
166 GIO_REG_RD_ADDR(r_pd_din), 139 GIO_REG_RD_ADDR(r_pd_din),
167 GIO_REG_RD_ADDR(r_pe_din), 140 GIO_REG_RD_ADDR(r_pe_din),
141#ifdef CONFIG_ETRAX_VIRTUAL_GPIO
142 &virtual_dummy,
143#endif
168}; 144};
169 145
170static unsigned long changeable_dir[NUM_PORTS] = { 146static unsigned long changeable_dir[NUM_PORTS] = {
@@ -174,6 +150,9 @@ static unsigned long changeable_dir[NUM_PORTS] = {
174 CONFIG_ETRAX_PC_CHANGEABLE_DIR, 150 CONFIG_ETRAX_PC_CHANGEABLE_DIR,
175 CONFIG_ETRAX_PD_CHANGEABLE_DIR, 151 CONFIG_ETRAX_PD_CHANGEABLE_DIR,
176 CONFIG_ETRAX_PE_CHANGEABLE_DIR, 152 CONFIG_ETRAX_PE_CHANGEABLE_DIR,
153#ifdef CONFIG_ETRAX_VIRTUAL_GPIO
154 CONFIG_ETRAX_PV_CHANGEABLE_DIR,
155#endif
177}; 156};
178 157
179static unsigned long changeable_bits[NUM_PORTS] = { 158static unsigned long changeable_bits[NUM_PORTS] = {
@@ -183,6 +162,9 @@ static unsigned long changeable_bits[NUM_PORTS] = {
183 CONFIG_ETRAX_PC_CHANGEABLE_BITS, 162 CONFIG_ETRAX_PC_CHANGEABLE_BITS,
184 CONFIG_ETRAX_PD_CHANGEABLE_BITS, 163 CONFIG_ETRAX_PD_CHANGEABLE_BITS,
185 CONFIG_ETRAX_PE_CHANGEABLE_BITS, 164 CONFIG_ETRAX_PE_CHANGEABLE_BITS,
165#ifdef CONFIG_ETRAX_VIRTUAL_GPIO
166 CONFIG_ETRAX_PV_CHANGEABLE_BITS,
167#endif
186}; 168};
187 169
188static volatile unsigned long *dir_oe[NUM_PORTS] = { 170static volatile unsigned long *dir_oe[NUM_PORTS] = {
@@ -192,13 +174,14 @@ static volatile unsigned long *dir_oe[NUM_PORTS] = {
192 GIO_REG_WR_ADDR(rw_pc_oe), 174 GIO_REG_WR_ADDR(rw_pc_oe),
193 GIO_REG_WR_ADDR(rw_pd_oe), 175 GIO_REG_WR_ADDR(rw_pd_oe),
194 GIO_REG_WR_ADDR(rw_pe_oe), 176 GIO_REG_WR_ADDR(rw_pe_oe),
177#ifdef CONFIG_ETRAX_VIRTUAL_GPIO
178 &virtual_rw_pv_oe,
179#endif
195}; 180};
196 181
197 182
198 183
199static unsigned int 184static unsigned int gpio_poll(struct file *file, struct poll_table_struct *wait)
200gpio_poll(struct file *file,
201 poll_table *wait)
202{ 185{
203 unsigned int mask = 0; 186 unsigned int mask = 0;
204 struct gpio_private *priv = (struct gpio_private *)file->private_data; 187 struct gpio_private *priv = (struct gpio_private *)file->private_data;
@@ -210,65 +193,50 @@ gpio_poll(struct file *file,
210 unsigned long flags; 193 unsigned long flags;
211 194
212 local_irq_save(flags); 195 local_irq_save(flags);
213 data = REG_TYPE_CONV(unsigned long, reg_gio_r_pa_din, REG_RD(gio, regi_gio, r_pa_din)); 196 data = REG_TYPE_CONV(unsigned long, reg_gio_r_pa_din,
197 REG_RD(gio, regi_gio, r_pa_din));
214 /* PA has support for interrupt 198 /* PA has support for interrupt
215 * lets activate high for those low and with highalarm set 199 * lets activate high for those low and with highalarm set
216 */ 200 */
217 intr_cfg = REG_RD(gio, regi_gio, rw_intr_cfg); 201 intr_cfg = REG_RD(gio, regi_gio, rw_intr_cfg);
218 202
219 tmp = ~data & priv->highalarm & 0xFF; 203 tmp = ~data & priv->highalarm & 0xFF;
220 if (tmp & (1 << 0)) { 204 if (tmp & (1 << 0))
221 intr_cfg.pa0 = regk_gio_hi; 205 intr_cfg.pa0 = regk_gio_hi;
222 } 206 if (tmp & (1 << 1))
223 if (tmp & (1 << 1)) {
224 intr_cfg.pa1 = regk_gio_hi; 207 intr_cfg.pa1 = regk_gio_hi;
225 } 208 if (tmp & (1 << 2))
226 if (tmp & (1 << 2)) {
227 intr_cfg.pa2 = regk_gio_hi; 209 intr_cfg.pa2 = regk_gio_hi;
228 } 210 if (tmp & (1 << 3))
229 if (tmp & (1 << 3)) {
230 intr_cfg.pa3 = regk_gio_hi; 211 intr_cfg.pa3 = regk_gio_hi;
231 } 212 if (tmp & (1 << 4))
232 if (tmp & (1 << 4)) {
233 intr_cfg.pa4 = regk_gio_hi; 213 intr_cfg.pa4 = regk_gio_hi;
234 } 214 if (tmp & (1 << 5))
235 if (tmp & (1 << 5)) {
236 intr_cfg.pa5 = regk_gio_hi; 215 intr_cfg.pa5 = regk_gio_hi;
237 } 216 if (tmp & (1 << 6))
238 if (tmp & (1 << 6)) {
239 intr_cfg.pa6 = regk_gio_hi; 217 intr_cfg.pa6 = regk_gio_hi;
240 } 218 if (tmp & (1 << 7))
241 if (tmp & (1 << 7)) {
242 intr_cfg.pa7 = regk_gio_hi; 219 intr_cfg.pa7 = regk_gio_hi;
243 }
244 /* 220 /*
245 * lets activate low for those high and with lowalarm set 221 * lets activate low for those high and with lowalarm set
246 */ 222 */
247 tmp = data & priv->lowalarm & 0xFF; 223 tmp = data & priv->lowalarm & 0xFF;
248 if (tmp & (1 << 0)) { 224 if (tmp & (1 << 0))
249 intr_cfg.pa0 = regk_gio_lo; 225 intr_cfg.pa0 = regk_gio_lo;
250 } 226 if (tmp & (1 << 1))
251 if (tmp & (1 << 1)) {
252 intr_cfg.pa1 = regk_gio_lo; 227 intr_cfg.pa1 = regk_gio_lo;
253 } 228 if (tmp & (1 << 2))
254 if (tmp & (1 << 2)) {
255 intr_cfg.pa2 = regk_gio_lo; 229 intr_cfg.pa2 = regk_gio_lo;
256 } 230 if (tmp & (1 << 3))
257 if (tmp & (1 << 3)) {
258 intr_cfg.pa3 = regk_gio_lo; 231 intr_cfg.pa3 = regk_gio_lo;
259 } 232 if (tmp & (1 << 4))
260 if (tmp & (1 << 4)) {
261 intr_cfg.pa4 = regk_gio_lo; 233 intr_cfg.pa4 = regk_gio_lo;
262 } 234 if (tmp & (1 << 5))
263 if (tmp & (1 << 5)) {
264 intr_cfg.pa5 = regk_gio_lo; 235 intr_cfg.pa5 = regk_gio_lo;
265 } 236 if (tmp & (1 << 6))
266 if (tmp & (1 << 6)) {
267 intr_cfg.pa6 = regk_gio_lo; 237 intr_cfg.pa6 = regk_gio_lo;
268 } 238 if (tmp & (1 << 7))
269 if (tmp & (1 << 7)) {
270 intr_cfg.pa7 = regk_gio_lo; 239 intr_cfg.pa7 = regk_gio_lo;
271 }
272 240
273 REG_WR(gio, regi_gio, rw_intr_cfg, intr_cfg); 241 REG_WR(gio, regi_gio, rw_intr_cfg, intr_cfg);
274 local_irq_restore(flags); 242 local_irq_restore(flags);
@@ -277,50 +245,65 @@ gpio_poll(struct file *file,
277 else 245 else
278 return 0; 246 return 0;
279 247
280 if ((data & priv->highalarm) || 248 if ((data & priv->highalarm) || (~data & priv->lowalarm))
281 (~data & priv->lowalarm)) {
282 mask = POLLIN|POLLRDNORM; 249 mask = POLLIN|POLLRDNORM;
283 }
284 250
285 DP(printk("gpio_poll ready: mask 0x%08X\n", mask)); 251 DP(printk(KERN_DEBUG "gpio_poll ready: mask 0x%08X\n", mask));
286 return mask; 252 return mask;
287} 253}
288 254
289int etrax_gpio_wake_up_check(void) 255int etrax_gpio_wake_up_check(void)
290{ 256{
291 struct gpio_private *priv = alarmlist; 257 struct gpio_private *priv;
292 unsigned long data = 0; 258 unsigned long data = 0;
293 int ret = 0; 259 unsigned long flags;
260 int ret = 0;
261 spin_lock_irqsave(&alarm_lock, flags);
262 priv = alarmlist;
294 while (priv) { 263 while (priv) {
264#ifdef CONFIG_ETRAX_VIRTUAL_GPIO
265 if (priv->minor == GPIO_MINOR_V)
266 data = (unsigned long)cached_virtual_gpio_read;
267 else {
268 data = *data_in[priv->minor];
269 if (priv->minor == GPIO_MINOR_A)
270 priv->lowalarm |= (1 << CONFIG_ETRAX_VIRTUAL_GPIO_INTERRUPT_PA_PIN);
271 }
272#else
295 data = *data_in[priv->minor]; 273 data = *data_in[priv->minor];
274#endif
296 if ((data & priv->highalarm) || 275 if ((data & priv->highalarm) ||
297 (~data & priv->lowalarm)) { 276 (~data & priv->lowalarm)) {
298 DP(printk("etrax_gpio_wake_up_check %i\n",priv->minor)); 277 DP(printk(KERN_DEBUG
278 "etrax_gpio_wake_up_check %i\n", priv->minor));
299 wake_up_interruptible(&priv->alarm_wq); 279 wake_up_interruptible(&priv->alarm_wq);
300 ret = 1; 280 ret = 1;
301 } 281 }
302 priv = priv->next; 282 priv = priv->next;
303 } 283 }
304 return ret; 284 spin_unlock_irqrestore(&alarm_lock, flags);
285 return ret;
305} 286}
306 287
307static irqreturn_t 288static irqreturn_t
308gpio_poll_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs) 289gpio_poll_timer_interrupt(int irq, void *dev_id)
309{ 290{
310 if (gpio_some_alarms) { 291 if (gpio_some_alarms)
311 return IRQ_RETVAL(etrax_gpio_wake_up_check()); 292 return IRQ_RETVAL(etrax_gpio_wake_up_check());
312 } 293 return IRQ_NONE;
313 return IRQ_NONE;
314} 294}
315 295
316static irqreturn_t 296static irqreturn_t
317gpio_pa_interrupt(int irq, void *dev_id, struct pt_regs *regs) 297gpio_pa_interrupt(int irq, void *dev_id)
318{ 298{
319 reg_gio_rw_intr_mask intr_mask; 299 reg_gio_rw_intr_mask intr_mask;
320 reg_gio_r_masked_intr masked_intr; 300 reg_gio_r_masked_intr masked_intr;
321 reg_gio_rw_ack_intr ack_intr; 301 reg_gio_rw_ack_intr ack_intr;
322 unsigned long tmp; 302 unsigned long tmp;
323 unsigned long tmp2; 303 unsigned long tmp2;
304#ifdef CONFIG_ETRAX_VIRTUAL_GPIO
305 unsigned char enable_gpiov_ack = 0;
306#endif
324 307
325 /* Find what PA interrupts are active */ 308 /* Find what PA interrupts are active */
326 masked_intr = REG_RD(gio, regi_gio, r_masked_intr); 309 masked_intr = REG_RD(gio, regi_gio, r_masked_intr);
@@ -331,6 +314,17 @@ gpio_pa_interrupt(int irq, void *dev_id, struct pt_regs *regs)
331 tmp &= (gpio_pa_high_alarms | gpio_pa_low_alarms); 314 tmp &= (gpio_pa_high_alarms | gpio_pa_low_alarms);
332 spin_unlock(&alarm_lock); 315 spin_unlock(&alarm_lock);
333 316
317#ifdef CONFIG_ETRAX_VIRTUAL_GPIO
318 /* Something changed on virtual GPIO. Interrupt is acked by
319 * reading the device.
320 */
321 if (tmp & (1 << CONFIG_ETRAX_VIRTUAL_GPIO_INTERRUPT_PA_PIN)) {
322 i2c_read(VIRT_I2C_ADDR, (void *)&cached_virtual_gpio_read,
323 sizeof(cached_virtual_gpio_read));
324 enable_gpiov_ack = 1;
325 }
326#endif
327
334 /* Ack them */ 328 /* Ack them */
335 ack_intr = REG_TYPE_CONV(reg_gio_rw_ack_intr, unsigned long, tmp); 329 ack_intr = REG_TYPE_CONV(reg_gio_rw_ack_intr, unsigned long, tmp);
336 REG_WR(gio, regi_gio, rw_ack_intr, ack_intr); 330 REG_WR(gio, regi_gio, rw_ack_intr, ack_intr);
@@ -339,18 +333,24 @@ gpio_pa_interrupt(int irq, void *dev_id, struct pt_regs *regs)
339 intr_mask = REG_RD(gio, regi_gio, rw_intr_mask); 333 intr_mask = REG_RD(gio, regi_gio, rw_intr_mask);
340 tmp2 = REG_TYPE_CONV(unsigned long, reg_gio_rw_intr_mask, intr_mask); 334 tmp2 = REG_TYPE_CONV(unsigned long, reg_gio_rw_intr_mask, intr_mask);
341 tmp2 &= ~tmp; 335 tmp2 &= ~tmp;
336#ifdef CONFIG_ETRAX_VIRTUAL_GPIO
337 /* Do not disable interrupt on virtual GPIO. Changes on virtual
338 * pins are only noticed by an interrupt.
339 */
340 if (enable_gpiov_ack)
341 tmp2 |= (1 << CONFIG_ETRAX_VIRTUAL_GPIO_INTERRUPT_PA_PIN);
342#endif
342 intr_mask = REG_TYPE_CONV(reg_gio_rw_intr_mask, unsigned long, tmp2); 343 intr_mask = REG_TYPE_CONV(reg_gio_rw_intr_mask, unsigned long, tmp2);
343 REG_WR(gio, regi_gio, rw_intr_mask, intr_mask); 344 REG_WR(gio, regi_gio, rw_intr_mask, intr_mask);
344 345
345 if (gpio_some_alarms) { 346 if (gpio_some_alarms)
346 return IRQ_RETVAL(etrax_gpio_wake_up_check()); 347 return IRQ_RETVAL(etrax_gpio_wake_up_check());
347 } 348 return IRQ_NONE;
348 return IRQ_NONE;
349} 349}
350 350
351 351
352static ssize_t gpio_write(struct file * file, const char * buf, size_t count, 352static ssize_t gpio_write(struct file *file, const char *buf, size_t count,
353 loff_t *off) 353 loff_t *off)
354{ 354{
355 struct gpio_private *priv = (struct gpio_private *)file->private_data; 355 struct gpio_private *priv = (struct gpio_private *)file->private_data;
356 unsigned char data, clk_mask, data_mask, write_msb; 356 unsigned char data, clk_mask, data_mask, write_msb;
@@ -360,29 +360,31 @@ static ssize_t gpio_write(struct file * file, const char * buf, size_t count,
360 ssize_t retval = count; 360 ssize_t retval = count;
361 /* Only bits 0-7 may be used for write operations but allow all 361 /* Only bits 0-7 may be used for write operations but allow all
362 devices except leds... */ 362 devices except leds... */
363 if (priv->minor == GPIO_MINOR_LEDS) { 363#ifdef CONFIG_ETRAX_VIRTUAL_GPIO
364 if (priv->minor == GPIO_MINOR_V)
365 return -EFAULT;
366#endif
367 if (priv->minor == GPIO_MINOR_LEDS)
364 return -EFAULT; 368 return -EFAULT;
365 }
366 369
367 if (!access_ok(VERIFY_READ, buf, count)) { 370 if (!access_ok(VERIFY_READ, buf, count))
368 return -EFAULT; 371 return -EFAULT;
369 }
370 clk_mask = priv->clk_mask; 372 clk_mask = priv->clk_mask;
371 data_mask = priv->data_mask; 373 data_mask = priv->data_mask;
372 /* It must have been configured using the IO_CFG_WRITE_MODE */ 374 /* It must have been configured using the IO_CFG_WRITE_MODE */
373 /* Perhaps a better error code? */ 375 /* Perhaps a better error code? */
374 if (clk_mask == 0 || data_mask == 0) { 376 if (clk_mask == 0 || data_mask == 0)
375 return -EPERM; 377 return -EPERM;
376 }
377 write_msb = priv->write_msb; 378 write_msb = priv->write_msb;
378 D(printk("gpio_write: %lu to data 0x%02X clk 0x%02X msb: %i\n",count, data_mask, clk_mask, write_msb)); 379 D(printk(KERN_DEBUG "gpio_write: %lu to data 0x%02X clk 0x%02X "
380 "msb: %i\n", count, data_mask, clk_mask, write_msb));
379 port = data_out[priv->minor]; 381 port = data_out[priv->minor];
380 382
381 while (count--) { 383 while (count--) {
382 int i; 384 int i;
383 data = *buf++; 385 data = *buf++;
384 if (priv->write_msb) { 386 if (priv->write_msb) {
385 for (i = 7; i >= 0;i--) { 387 for (i = 7; i >= 0; i--) {
386 local_irq_save(flags); 388 local_irq_save(flags);
387 shadow = *port; 389 shadow = *port;
388 *port = shadow &= ~clk_mask; 390 *port = shadow &= ~clk_mask;
@@ -395,7 +397,7 @@ static ssize_t gpio_write(struct file * file, const char * buf, size_t count,
395 local_irq_restore(flags); 397 local_irq_restore(flags);
396 } 398 }
397 } else { 399 } else {
398 for (i = 0; i <= 7;i++) { 400 for (i = 0; i <= 7; i++) {
399 local_irq_save(flags); 401 local_irq_save(flags);
400 shadow = *port; 402 shadow = *port;
401 *port = shadow &= ~clk_mask; 403 *port = shadow &= ~clk_mask;
@@ -423,18 +425,16 @@ gpio_open(struct inode *inode, struct file *filp)
423 if (p > GPIO_MINOR_LAST) 425 if (p > GPIO_MINOR_LAST)
424 return -EINVAL; 426 return -EINVAL;
425 427
426 priv = kmalloc(sizeof(struct gpio_private), 428 priv = kmalloc(sizeof(struct gpio_private), GFP_KERNEL);
427 GFP_KERNEL);
428 429
429 if (!priv) 430 if (!priv)
430 return -ENOMEM; 431 return -ENOMEM;
432 memset(priv, 0, sizeof(*priv));
431 433
432 priv->minor = p; 434 priv->minor = p;
433 435
434 /* initialize the io/alarm struct and link it into our alarmlist */ 436 /* initialize the io/alarm struct */
435 437
436 priv->next = alarmlist;
437 alarmlist = priv;
438 priv->clk_mask = 0; 438 priv->clk_mask = 0;
439 priv->data_mask = 0; 439 priv->data_mask = 0;
440 priv->highalarm = 0; 440 priv->highalarm = 0;
@@ -443,20 +443,30 @@ gpio_open(struct inode *inode, struct file *filp)
443 443
444 filp->private_data = (void *)priv; 444 filp->private_data = (void *)priv;
445 445
446 /* link it into our alarmlist */
447 spin_lock_irq(&alarm_lock);
448 priv->next = alarmlist;
449 alarmlist = priv;
450 spin_unlock_irq(&alarm_lock);
451
446 return 0; 452 return 0;
447} 453}
448 454
449static int 455static int
450gpio_release(struct inode *inode, struct file *filp) 456gpio_release(struct inode *inode, struct file *filp)
451{ 457{
452 struct gpio_private *p = alarmlist; 458 struct gpio_private *p;
453 struct gpio_private *todel = (struct gpio_private *)filp->private_data; 459 struct gpio_private *todel;
454 /* local copies while updating them: */ 460 /* local copies while updating them: */
455 unsigned long a_high, a_low; 461 unsigned long a_high, a_low;
456 unsigned long some_alarms; 462 unsigned long some_alarms;
457 463
458 /* unlink from alarmlist and free the private structure */ 464 /* unlink from alarmlist and free the private structure */
459 465
466 spin_lock_irq(&alarm_lock);
467 p = alarmlist;
468 todel = (struct gpio_private *)filp->private_data;
469
460 if (p == todel) { 470 if (p == todel) {
461 alarmlist = todel->next; 471 alarmlist = todel->next;
462 } else { 472 } else {
@@ -468,26 +478,35 @@ gpio_release(struct inode *inode, struct file *filp)
468 kfree(todel); 478 kfree(todel);
469 /* Check if there are still any alarms set */ 479 /* Check if there are still any alarms set */
470 p = alarmlist; 480 p = alarmlist;
471 some_alarms = 0; 481 some_alarms = 0;
472 a_high = 0; 482 a_high = 0;
473 a_low = 0; 483 a_low = 0;
474 while (p) { 484 while (p) {
475 if (p->minor == GPIO_MINOR_A) { 485 if (p->minor == GPIO_MINOR_A) {
486#ifdef CONFIG_ETRAX_VIRTUAL_GPIO
487 p->lowalarm |= (1 << CONFIG_ETRAX_VIRTUAL_GPIO_INTERRUPT_PA_PIN);
488#endif
476 a_high |= p->highalarm; 489 a_high |= p->highalarm;
477 a_low |= p->lowalarm; 490 a_low |= p->lowalarm;
478 } 491 }
479 492
480 if (p->highalarm | p->lowalarm) { 493 if (p->highalarm | p->lowalarm)
481 some_alarms = 1; 494 some_alarms = 1;
482 }
483 p = p->next; 495 p = p->next;
484 } 496 }
485 497
486 spin_lock(&alarm_lock); 498#ifdef CONFIG_ETRAX_VIRTUAL_GPIO
499 /* Variables 'some_alarms' and 'a_low' needs to be set here again
500 * to ensure that interrupt for virtual GPIO is handled.
501 */
502 some_alarms = 1;
503 a_low |= (1 << CONFIG_ETRAX_VIRTUAL_GPIO_INTERRUPT_PA_PIN);
504#endif
505
487 gpio_some_alarms = some_alarms; 506 gpio_some_alarms = some_alarms;
488 gpio_pa_high_alarms = a_high; 507 gpio_pa_high_alarms = a_high;
489 gpio_pa_low_alarms = a_low; 508 gpio_pa_low_alarms = a_low;
490 spin_unlock(&alarm_lock); 509 spin_unlock_irq(&alarm_lock);
491 510
492 return 0; 511 return 0;
493} 512}
@@ -496,7 +515,7 @@ gpio_release(struct inode *inode, struct file *filp)
496 * set alarms to wait for using a subsequent select(). 515 * set alarms to wait for using a subsequent select().
497 */ 516 */
498 517
499unsigned long inline setget_input(struct gpio_private *priv, unsigned long arg) 518inline unsigned long setget_input(struct gpio_private *priv, unsigned long arg)
500{ 519{
501 /* Set direction 0=unchanged 1=input, 520 /* Set direction 0=unchanged 1=input,
502 * return mask with 1=input 521 * return mask with 1=input
@@ -512,13 +531,17 @@ unsigned long inline setget_input(struct gpio_private *priv, unsigned long arg)
512 531
513 if (priv->minor == GPIO_MINOR_A) 532 if (priv->minor == GPIO_MINOR_A)
514 dir_shadow ^= 0xFF; /* Only 8 bits */ 533 dir_shadow ^= 0xFF; /* Only 8 bits */
534#ifdef CONFIG_ETRAX_VIRTUAL_GPIO
535 else if (priv->minor == GPIO_MINOR_V)
536 dir_shadow ^= 0xFFFF; /* Only 16 bits */
537#endif
515 else 538 else
516 dir_shadow ^= 0x3FFFF; /* Only 18 bits */ 539 dir_shadow ^= 0x3FFFF; /* Only 18 bits */
517 return dir_shadow; 540 return dir_shadow;
518 541
519} /* setget_input */ 542} /* setget_input */
520 543
521unsigned long inline setget_output(struct gpio_private *priv, unsigned long arg) 544inline unsigned long setget_output(struct gpio_private *priv, unsigned long arg)
522{ 545{
523 unsigned long flags; 546 unsigned long flags;
524 unsigned long dir_shadow; 547 unsigned long dir_shadow;
@@ -542,20 +565,22 @@ gpio_ioctl(struct inode *inode, struct file *file,
542 unsigned long val; 565 unsigned long val;
543 unsigned long shadow; 566 unsigned long shadow;
544 struct gpio_private *priv = (struct gpio_private *)file->private_data; 567 struct gpio_private *priv = (struct gpio_private *)file->private_data;
545 if (_IOC_TYPE(cmd) != ETRAXGPIO_IOCTYPE) { 568 if (_IOC_TYPE(cmd) != ETRAXGPIO_IOCTYPE)
546 return -EINVAL; 569 return -EINVAL;
547 } 570
571#ifdef CONFIG_ETRAX_VIRTUAL_GPIO
572 if (priv->minor == GPIO_MINOR_V)
573 return virtual_gpio_ioctl(file, cmd, arg);
574#endif
548 575
549 switch (_IOC_NR(cmd)) { 576 switch (_IOC_NR(cmd)) {
550 case IO_READBITS: /* Use IO_READ_INBITS and IO_READ_OUTBITS instead */ 577 case IO_READBITS: /* Use IO_READ_INBITS and IO_READ_OUTBITS instead */
551 // read the port 578 /* Read the port. */
552 return *data_in[priv->minor]; 579 return *data_in[priv->minor];
553 break; 580 break;
554 case IO_SETBITS: 581 case IO_SETBITS:
555 local_irq_save(flags); 582 local_irq_save(flags);
556 if (arg & 0x04) 583 /* Set changeable bits with a 1 in arg. */
557 printk("GPIO SET 2\n");
558 // set changeable bits with a 1 in arg
559 shadow = *data_out[priv->minor]; 584 shadow = *data_out[priv->minor];
560 shadow |= (arg & changeable_bits[priv->minor]); 585 shadow |= (arg & changeable_bits[priv->minor]);
561 *data_out[priv->minor] = shadow; 586 *data_out[priv->minor] = shadow;
@@ -563,46 +588,42 @@ gpio_ioctl(struct inode *inode, struct file *file,
563 break; 588 break;
564 case IO_CLRBITS: 589 case IO_CLRBITS:
565 local_irq_save(flags); 590 local_irq_save(flags);
566 if (arg & 0x04) 591 /* Clear changeable bits with a 1 in arg. */
567 printk("GPIO CLR 2\n");
568 // clear changeable bits with a 1 in arg
569 shadow = *data_out[priv->minor]; 592 shadow = *data_out[priv->minor];
570 shadow &= ~(arg & changeable_bits[priv->minor]); 593 shadow &= ~(arg & changeable_bits[priv->minor]);
571 *data_out[priv->minor] = shadow; 594 *data_out[priv->minor] = shadow;
572 local_irq_restore(flags); 595 local_irq_restore(flags);
573 break; 596 break;
574 case IO_HIGHALARM: 597 case IO_HIGHALARM:
575 // set alarm when bits with 1 in arg go high 598 /* Set alarm when bits with 1 in arg go high. */
576 priv->highalarm |= arg; 599 priv->highalarm |= arg;
577 spin_lock(&alarm_lock); 600 spin_lock_irqsave(&alarm_lock, flags);
578 gpio_some_alarms = 1; 601 gpio_some_alarms = 1;
579 if (priv->minor == GPIO_MINOR_A) { 602 if (priv->minor == GPIO_MINOR_A)
580 gpio_pa_high_alarms |= arg; 603 gpio_pa_high_alarms |= arg;
581 } 604 spin_unlock_irqrestore(&alarm_lock, flags);
582 spin_unlock(&alarm_lock);
583 break; 605 break;
584 case IO_LOWALARM: 606 case IO_LOWALARM:
585 // set alarm when bits with 1 in arg go low 607 /* Set alarm when bits with 1 in arg go low. */
586 priv->lowalarm |= arg; 608 priv->lowalarm |= arg;
587 spin_lock(&alarm_lock); 609 spin_lock_irqsave(&alarm_lock, flags);
588 gpio_some_alarms = 1; 610 gpio_some_alarms = 1;
589 if (priv->minor == GPIO_MINOR_A) { 611 if (priv->minor == GPIO_MINOR_A)
590 gpio_pa_low_alarms |= arg; 612 gpio_pa_low_alarms |= arg;
591 } 613 spin_unlock_irqrestore(&alarm_lock, flags);
592 spin_unlock(&alarm_lock);
593 break; 614 break;
594 case IO_CLRALARM: 615 case IO_CLRALARM:
595 // clear alarm for bits with 1 in arg 616 /* Clear alarm for bits with 1 in arg. */
596 priv->highalarm &= ~arg; 617 priv->highalarm &= ~arg;
597 priv->lowalarm &= ~arg; 618 priv->lowalarm &= ~arg;
598 spin_lock(&alarm_lock); 619 spin_lock_irqsave(&alarm_lock, flags);
599 if (priv->minor == GPIO_MINOR_A) { 620 if (priv->minor == GPIO_MINOR_A) {
600 if (gpio_pa_high_alarms & arg || 621 if (gpio_pa_high_alarms & arg ||
601 gpio_pa_low_alarms & arg) { 622 gpio_pa_low_alarms & arg)
602 /* Must update the gpio_pa_*alarms masks */ 623 /* Must update the gpio_pa_*alarms masks */
603 } 624 ;
604 } 625 }
605 spin_unlock(&alarm_lock); 626 spin_unlock_irqrestore(&alarm_lock, flags);
606 break; 627 break;
607 case IO_READDIR: /* Use IO_SETGET_INPUT/OUTPUT instead! */ 628 case IO_READDIR: /* Use IO_SETGET_INPUT/OUTPUT instead! */
608 /* Read direction 0=input 1=output */ 629 /* Read direction 0=input 1=output */
@@ -633,8 +654,7 @@ gpio_ioctl(struct inode *inode, struct file *file,
633 if (!((priv->clk_mask & changeable_bits[priv->minor]) && 654 if (!((priv->clk_mask & changeable_bits[priv->minor]) &&
634 (priv->data_mask & changeable_bits[priv->minor]) && 655 (priv->data_mask & changeable_bits[priv->minor]) &&
635 (priv->clk_mask & dir_shadow) && 656 (priv->clk_mask & dir_shadow) &&
636 (priv->data_mask & dir_shadow))) 657 (priv->data_mask & dir_shadow))) {
637 {
638 priv->clk_mask = 0; 658 priv->clk_mask = 0;
639 priv->data_mask = 0; 659 priv->data_mask = 0;
640 return -EPERM; 660 return -EPERM;
@@ -644,34 +664,34 @@ gpio_ioctl(struct inode *inode, struct file *file,
644 case IO_READ_INBITS: 664 case IO_READ_INBITS:
645 /* *arg is result of reading the input pins */ 665 /* *arg is result of reading the input pins */
646 val = *data_in[priv->minor]; 666 val = *data_in[priv->minor];
647 if (copy_to_user((unsigned long*)arg, &val, sizeof(val))) 667 if (copy_to_user((unsigned long *)arg, &val, sizeof(val)))
648 return -EFAULT; 668 return -EFAULT;
649 return 0; 669 return 0;
650 break; 670 break;
651 case IO_READ_OUTBITS: 671 case IO_READ_OUTBITS:
652 /* *arg is result of reading the output shadow */ 672 /* *arg is result of reading the output shadow */
653 val = *data_out[priv->minor]; 673 val = *data_out[priv->minor];
654 if (copy_to_user((unsigned long*)arg, &val, sizeof(val))) 674 if (copy_to_user((unsigned long *)arg, &val, sizeof(val)))
655 return -EFAULT; 675 return -EFAULT;
656 break; 676 break;
657 case IO_SETGET_INPUT: 677 case IO_SETGET_INPUT:
658 /* bits set in *arg is set to input, 678 /* bits set in *arg is set to input,
659 * *arg updated with current input pins. 679 * *arg updated with current input pins.
660 */ 680 */
661 if (copy_from_user(&val, (unsigned long*)arg, sizeof(val))) 681 if (copy_from_user(&val, (unsigned long *)arg, sizeof(val)))
662 return -EFAULT; 682 return -EFAULT;
663 val = setget_input(priv, val); 683 val = setget_input(priv, val);
664 if (copy_to_user((unsigned long*)arg, &val, sizeof(val))) 684 if (copy_to_user((unsigned long *)arg, &val, sizeof(val)))
665 return -EFAULT; 685 return -EFAULT;
666 break; 686 break;
667 case IO_SETGET_OUTPUT: 687 case IO_SETGET_OUTPUT:
668 /* bits set in *arg is set to output, 688 /* bits set in *arg is set to output,
669 * *arg updated with current output pins. 689 * *arg updated with current output pins.
670 */ 690 */
671 if (copy_from_user(&val, (unsigned long*)arg, sizeof(val))) 691 if (copy_from_user(&val, (unsigned long *)arg, sizeof(val)))
672 return -EFAULT; 692 return -EFAULT;
673 val = setget_output(priv, val); 693 val = setget_output(priv, val);
674 if (copy_to_user((unsigned long*)arg, &val, sizeof(val))) 694 if (copy_to_user((unsigned long *)arg, &val, sizeof(val)))
675 return -EFAULT; 695 return -EFAULT;
676 break; 696 break;
677 default: 697 default:
@@ -684,6 +704,133 @@ gpio_ioctl(struct inode *inode, struct file *file,
684 return 0; 704 return 0;
685} 705}
686 706
707#ifdef CONFIG_ETRAX_VIRTUAL_GPIO
708static int
709virtual_gpio_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
710{
711 unsigned long flags;
712 unsigned short val;
713 unsigned short shadow;
714 struct gpio_private *priv = (struct gpio_private *)file->private_data;
715
716 switch (_IOC_NR(cmd)) {
717 case IO_SETBITS:
718 local_irq_save(flags);
719 /* Set changeable bits with a 1 in arg. */
720 i2c_read(VIRT_I2C_ADDR, (void *)&shadow, sizeof(shadow));
721 shadow |= ~*dir_oe[priv->minor];
722 shadow |= (arg & changeable_bits[priv->minor]);
723 i2c_write(VIRT_I2C_ADDR, (void *)&shadow, sizeof(shadow));
724 local_irq_restore(flags);
725 break;
726 case IO_CLRBITS:
727 local_irq_save(flags);
728 /* Clear changeable bits with a 1 in arg. */
729 i2c_read(VIRT_I2C_ADDR, (void *)&shadow, sizeof(shadow));
730 shadow |= ~*dir_oe[priv->minor];
731 shadow &= ~(arg & changeable_bits[priv->minor]);
732 i2c_write(VIRT_I2C_ADDR, (void *)&shadow, sizeof(shadow));
733 local_irq_restore(flags);
734 break;
735 case IO_HIGHALARM:
736 /* Set alarm when bits with 1 in arg go high. */
737 priv->highalarm |= arg;
738 spin_lock(&alarm_lock);
739 gpio_some_alarms = 1;
740 spin_unlock(&alarm_lock);
741 break;
742 case IO_LOWALARM:
743 /* Set alarm when bits with 1 in arg go low. */
744 priv->lowalarm |= arg;
745 spin_lock(&alarm_lock);
746 gpio_some_alarms = 1;
747 spin_unlock(&alarm_lock);
748 break;
749 case IO_CLRALARM:
750 /* Clear alarm for bits with 1 in arg. */
751 priv->highalarm &= ~arg;
752 priv->lowalarm &= ~arg;
753 spin_lock(&alarm_lock);
754 spin_unlock(&alarm_lock);
755 break;
756 case IO_CFG_WRITE_MODE:
757 {
758 unsigned long dir_shadow;
759 dir_shadow = *dir_oe[priv->minor];
760
761 priv->clk_mask = arg & 0xFF;
762 priv->data_mask = (arg >> 8) & 0xFF;
763 priv->write_msb = (arg >> 16) & 0x01;
764 /* Check if we're allowed to change the bits and
765 * the direction is correct
766 */
767 if (!((priv->clk_mask & changeable_bits[priv->minor]) &&
768 (priv->data_mask & changeable_bits[priv->minor]) &&
769 (priv->clk_mask & dir_shadow) &&
770 (priv->data_mask & dir_shadow))) {
771 priv->clk_mask = 0;
772 priv->data_mask = 0;
773 return -EPERM;
774 }
775 break;
776 }
777 case IO_READ_INBITS:
778 /* *arg is result of reading the input pins */
779 val = cached_virtual_gpio_read;
780 val &= ~*dir_oe[priv->minor];
781 if (copy_to_user((unsigned long *)arg, &val, sizeof(val)))
782 return -EFAULT;
783 return 0;
784 break;
785 case IO_READ_OUTBITS:
786 /* *arg is result of reading the output shadow */
787 i2c_read(VIRT_I2C_ADDR, (void *)&val, sizeof(val));
788 val &= *dir_oe[priv->minor];
789 if (copy_to_user((unsigned long *)arg, &val, sizeof(val)))
790 return -EFAULT;
791 break;
792 case IO_SETGET_INPUT:
793 {
794 /* bits set in *arg is set to input,
795 * *arg updated with current input pins.
796 */
797 unsigned short input_mask = ~*dir_oe[priv->minor];
798 if (copy_from_user(&val, (unsigned long *)arg, sizeof(val)))
799 return -EFAULT;
800 val = setget_input(priv, val);
801 if (copy_to_user((unsigned long *)arg, &val, sizeof(val)))
802 return -EFAULT;
803 if ((input_mask & val) != input_mask) {
804 /* Input pins changed. All ports desired as input
805 * should be set to logic 1.
806 */
807 unsigned short change = input_mask ^ val;
808 i2c_read(VIRT_I2C_ADDR, (void *)&shadow,
809 sizeof(shadow));
810 shadow &= ~change;
811 shadow |= val;
812 i2c_write(VIRT_I2C_ADDR, (void *)&shadow,
813 sizeof(shadow));
814 }
815 break;
816 }
817 case IO_SETGET_OUTPUT:
818 /* bits set in *arg is set to output,
819 * *arg updated with current output pins.
820 */
821 if (copy_from_user(&val, (unsigned long *)arg, sizeof(val)))
822 return -EFAULT;
823 val = setget_output(priv, val);
824 if (copy_to_user((unsigned long *)arg, &val, sizeof(val)))
825 return -EFAULT;
826 break;
827 default:
828 return -EINVAL;
829 } /* switch */
830 return 0;
831}
832#endif /* CONFIG_ETRAX_VIRTUAL_GPIO */
833
687static int 834static int
688gpio_leds_ioctl(unsigned int cmd, unsigned long arg) 835gpio_leds_ioctl(unsigned int cmd, unsigned long arg)
689{ 836{
@@ -694,8 +841,8 @@ gpio_leds_ioctl(unsigned int cmd, unsigned long arg)
694 case IO_LEDACTIVE_SET: 841 case IO_LEDACTIVE_SET:
695 green = ((unsigned char) arg) & 1; 842 green = ((unsigned char) arg) & 1;
696 red = (((unsigned char) arg) >> 1) & 1; 843 red = (((unsigned char) arg) >> 1) & 1;
697 LED_ACTIVE_SET_G(green); 844 CRIS_LED_ACTIVE_SET_G(green);
698 LED_ACTIVE_SET_R(red); 845 CRIS_LED_ACTIVE_SET_R(red);
699 break; 846 break;
700 847
701 default: 848 default:
@@ -705,7 +852,7 @@ gpio_leds_ioctl(unsigned int cmd, unsigned long arg)
705 return 0; 852 return 0;
706} 853}
707 854
708const struct file_operations gpio_fops = { 855struct file_operations gpio_fops = {
709 .owner = THIS_MODULE, 856 .owner = THIS_MODULE,
710 .poll = gpio_poll, 857 .poll = gpio_poll,
711 .ioctl = gpio_ioctl, 858 .ioctl = gpio_ioctl,
@@ -714,6 +861,66 @@ const struct file_operations gpio_fops = {
714 .release = gpio_release, 861 .release = gpio_release,
715}; 862};
716 863
864#ifdef CONFIG_ETRAX_VIRTUAL_GPIO
865static void
866virtual_gpio_init(void)
867{
868 reg_gio_rw_intr_cfg intr_cfg;
869 reg_gio_rw_intr_mask intr_mask;
870 unsigned short shadow;
871
872 shadow = ~virtual_rw_pv_oe; /* Input ports should be set to logic 1 */
873 shadow |= CONFIG_ETRAX_DEF_GIO_PV_OUT;
874 i2c_write(VIRT_I2C_ADDR, (void *)&shadow, sizeof(shadow));
875
876 /* Set interrupt mask and on what state the interrupt shall trigger.
877 * For virtual gpio the interrupt shall trigger on logic '0'.
878 */
879 intr_cfg = REG_RD(gio, regi_gio, rw_intr_cfg);
880 intr_mask = REG_RD(gio, regi_gio, rw_intr_mask);
881
882 switch (CONFIG_ETRAX_VIRTUAL_GPIO_INTERRUPT_PA_PIN) {
883 case 0:
884 intr_cfg.pa0 = regk_gio_lo;
885 intr_mask.pa0 = regk_gio_yes;
886 break;
887 case 1:
888 intr_cfg.pa1 = regk_gio_lo;
889 intr_mask.pa1 = regk_gio_yes;
890 break;
891 case 2:
892 intr_cfg.pa2 = regk_gio_lo;
893 intr_mask.pa2 = regk_gio_yes;
894 break;
895 case 3:
896 intr_cfg.pa3 = regk_gio_lo;
897 intr_mask.pa3 = regk_gio_yes;
898 break;
899 case 4:
900 intr_cfg.pa4 = regk_gio_lo;
901 intr_mask.pa4 = regk_gio_yes;
902 break;
903 case 5:
904 intr_cfg.pa5 = regk_gio_lo;
905 intr_mask.pa5 = regk_gio_yes;
906 break;
907 case 6:
908 intr_cfg.pa6 = regk_gio_lo;
909 intr_mask.pa6 = regk_gio_yes;
910 break;
911 case 7:
912 intr_cfg.pa7 = regk_gio_lo;
913 intr_mask.pa7 = regk_gio_yes;
914 break;
915 }
916
917 REG_WR(gio, regi_gio, rw_intr_cfg, intr_cfg);
918 REG_WR(gio, regi_gio, rw_intr_mask, intr_mask);
919
920 gpio_pa_low_alarms |= (1 << CONFIG_ETRAX_VIRTUAL_GPIO_INTERRUPT_PA_PIN);
921 gpio_some_alarms = 1;
922}
923#endif
717 924
718/* main driver initialization routine, called from mem.c */ 925/* main driver initialization routine, called from mem.c */
719 926
@@ -721,7 +928,6 @@ static __init int
721gpio_init(void) 928gpio_init(void)
722{ 929{
723 int res; 930 int res;
724 reg_intr_vect_rw_mask intr_mask;
725 931
726 /* do the formalities */ 932 /* do the formalities */
727 933
@@ -732,30 +938,30 @@ gpio_init(void)
732 } 938 }
733 939
734 /* Clear all leds */ 940 /* Clear all leds */
735 LED_NETWORK_SET(0); 941 CRIS_LED_NETWORK_GRP0_SET(0);
736 LED_ACTIVE_SET(0); 942 CRIS_LED_NETWORK_GRP1_SET(0);
737 LED_DISK_READ(0); 943 CRIS_LED_ACTIVE_SET(0);
738 LED_DISK_WRITE(0); 944 CRIS_LED_DISK_READ(0);
739 945 CRIS_LED_DISK_WRITE(0);
740 printk("ETRAX FS GPIO driver v2.5, (c) 2003-2005 Axis Communications AB\n"); 946
947 printk(KERN_INFO "ETRAX FS GPIO driver v2.5, (c) 2003-2007 "
948 "Axis Communications AB\n");
741 /* We call etrax_gpio_wake_up_check() from timer interrupt and 949 /* We call etrax_gpio_wake_up_check() from timer interrupt and
742 * from cpu_idle() in kernel/process.c 950 * from cpu_idle() in kernel/process.c
743 * The check in cpu_idle() reduces latency from ~15 ms to ~6 ms 951 * The check in cpu_idle() reduces latency from ~15 ms to ~6 ms
744 * in some tests. 952 * in some tests.
745 */ 953 */
746 if (request_irq(TIMER_INTR_VECT, gpio_poll_timer_interrupt, 954 if (request_irq(TIMER0_INTR_VECT, gpio_poll_timer_interrupt,
747 IRQF_SHARED | IRQF_DISABLED,"gpio poll", &alarmlist)) { 955 IRQF_SHARED | IRQF_DISABLED, "gpio poll", &alarmlist))
748 printk("err: timer0 irq for gpio\n"); 956 printk(KERN_ERR "timer0 irq for gpio\n");
749 } 957
750 if (request_irq(GEN_IO_INTR_VECT, gpio_pa_interrupt, 958 if (request_irq(GIO_INTR_VECT, gpio_pa_interrupt,
751 IRQF_SHARED | IRQF_DISABLED,"gpio PA", &alarmlist)) { 959 IRQF_SHARED | IRQF_DISABLED, "gpio PA", &alarmlist))
752 printk("err: PA irq for gpio\n"); 960 printk(KERN_ERR "PA irq for gpio\n");
753 } 961
754 /* enable the gio and timer irq in global config */ 962#ifdef CONFIG_ETRAX_VIRTUAL_GPIO
755 intr_mask = REG_RD(intr_vect, regi_irq, rw_mask); 963 virtual_gpio_init();
756 intr_mask.timer = 1; 964#endif
757 intr_mask.gen_io = 1;
758 REG_WR(intr_vect, regi_irq, rw_mask, intr_mask);
759 965
760 return res; 966 return res;
761} 967}
diff --git a/arch/cris/arch-v32/drivers/nandflash.c b/arch/cris/arch-v32/drivers/mach-fs/nandflash.c
index 5ce015c6bb0d..aa01b134458a 100644
--- a/arch/cris/arch-v32/drivers/nandflash.c
+++ b/arch/cris/arch-v32/drivers/mach-fs/nandflash.c
@@ -4,9 +4,7 @@
4 * Copyright (c) 2004 4 * Copyright (c) 2004
5 * 5 *
6 * Derived from drivers/mtd/nand/spia.c 6 * Derived from drivers/mtd/nand/spia.c
7 * Copyright (C) 2000 Steven J. Hill (sjhill@realitydiluted.com) 7 * Copyright (C) 2000 Steven J. Hill (sjhill@realitydiluted.com)
8 *
9 * $Id: nandflash.c,v 1.3 2005/06/01 10:57:12 starvik Exp $
10 * 8 *
11 * This program is free software; you can redistribute it and/or modify 9 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as 10 * it under the terms of the GNU General Public License version 2 as
@@ -21,10 +19,10 @@
21#include <linux/mtd/nand.h> 19#include <linux/mtd/nand.h>
22#include <linux/mtd/partitions.h> 20#include <linux/mtd/partitions.h>
23#include <asm/arch/memmap.h> 21#include <asm/arch/memmap.h>
24#include <asm/arch/hwregs/reg_map.h> 22#include <hwregs/reg_map.h>
25#include <asm/arch/hwregs/reg_rdwr.h> 23#include <hwregs/reg_rdwr.h>
26#include <asm/arch/hwregs/gio_defs.h> 24#include <hwregs/gio_defs.h>
27#include <asm/arch/hwregs/bif_core_defs.h> 25#include <hwregs/bif_core_defs.h>
28#include <asm/io.h> 26#include <asm/io.h>
29 27
30#define CE_BIT 4 28#define CE_BIT 4
@@ -32,44 +30,65 @@
32#define ALE_BIT 6 30#define ALE_BIT 6
33#define BY_BIT 7 31#define BY_BIT 7
34 32
35static struct mtd_info *crisv32_mtd = NULL; 33struct mtd_info_wrapper {
34 struct mtd_info info;
35 struct nand_chip chip;
36};
37
38/* Bitmask for control pins */
39#define PIN_BITMASK ((1 << CE_BIT) | (1 << CLE_BIT) | (1 << ALE_BIT))
40
41/* Bitmask for mtd nand control bits */
42#define CTRL_BITMASK (NAND_NCE | NAND_CLE | NAND_ALE)
43
44
45static struct mtd_info *crisv32_mtd;
36/* 46/*
37 * hardware specific access to control-lines 47 * hardware specific access to control-lines
38*/ 48 */
39static void crisv32_hwcontrol(struct mtd_info *mtd, int cmd) 49static void crisv32_hwcontrol(struct mtd_info *mtd, int cmd,
50 unsigned int ctrl)
40{ 51{
41 unsigned long flags; 52 unsigned long flags;
42 reg_gio_rw_pa_dout dout = REG_RD(gio, regi_gio, rw_pa_dout); 53 reg_gio_rw_pa_dout dout;
54 struct nand_chip *this = mtd->priv;
43 55
44 local_irq_save(flags); 56 local_irq_save(flags);
45 switch(cmd){ 57
46 case NAND_CTL_SETCLE: 58 /* control bits change */
47 dout.data |= (1<<CLE_BIT); 59 if (ctrl & NAND_CTRL_CHANGE) {
48 break; 60 dout = REG_RD(gio, regi_gio, rw_pa_dout);
49 case NAND_CTL_CLRCLE: 61 dout.data &= ~PIN_BITMASK;
50 dout.data &= ~(1<<CLE_BIT); 62
51 break; 63#if (CE_BIT == 4 && NAND_NCE == 1 && \
52 case NAND_CTL_SETALE: 64 CLE_BIT == 5 && NAND_CLE == 2 && \
53 dout.data |= (1<<ALE_BIT); 65 ALE_BIT == 6 && NAND_ALE == 4)
54 break; 66 /* Pins in same order as control bits, but shifted.
55 case NAND_CTL_CLRALE: 67 * Optimize for this case; works for 2.6.18 */
56 dout.data &= ~(1<<ALE_BIT); 68 dout.data |= ((ctrl & CTRL_BITMASK) ^ NAND_NCE) << CE_BIT;
57 break; 69#else
58 case NAND_CTL_SETNCE: 70 /* the slow way */
59 dout.data |= (1<<CE_BIT); 71 if (!(ctrl & NAND_NCE))
60 break; 72 dout.data |= (1 << CE_BIT);
61 case NAND_CTL_CLRNCE: 73 if (ctrl & NAND_CLE)
62 dout.data &= ~(1<<CE_BIT); 74 dout.data |= (1 << CLE_BIT);
63 break; 75 if (ctrl & NAND_ALE)
76 dout.data |= (1 << ALE_BIT);
77#endif
78 REG_WR(gio, regi_gio, rw_pa_dout, dout);
64 } 79 }
65 REG_WR(gio, regi_gio, rw_pa_dout, dout); 80
81 /* command to chip */
82 if (cmd != NAND_CMD_NONE)
83 writeb(cmd, this->IO_ADDR_W);
84
66 local_irq_restore(flags); 85 local_irq_restore(flags);
67} 86}
68 87
69/* 88/*
70* read device ready pin 89* read device ready pin
71*/ 90*/
72int crisv32_device_ready(struct mtd_info *mtd) 91static int crisv32_device_ready(struct mtd_info *mtd)
73{ 92{
74 reg_gio_r_pa_din din = REG_RD(gio, regi_gio, r_pa_din); 93 reg_gio_r_pa_din din = REG_RD(gio, regi_gio, r_pa_din);
75 return ((din.data & (1 << BY_BIT)) >> BY_BIT); 94 return ((din.data & (1 << BY_BIT)) >> BY_BIT);
@@ -78,21 +97,23 @@ int crisv32_device_ready(struct mtd_info *mtd)
78/* 97/*
79 * Main initialization routine 98 * Main initialization routine
80 */ 99 */
81struct mtd_info* __init crisv32_nand_flash_probe (void) 100struct mtd_info *__init crisv32_nand_flash_probe(void)
82{ 101{
83 void __iomem *read_cs; 102 void __iomem *read_cs;
84 void __iomem *write_cs; 103 void __iomem *write_cs;
85 104
86 reg_bif_core_rw_grp3_cfg bif_cfg = REG_RD(bif_core, regi_bif_core, rw_grp3_cfg); 105 reg_bif_core_rw_grp3_cfg bif_cfg = REG_RD(bif_core, regi_bif_core,
106 rw_grp3_cfg);
87 reg_gio_rw_pa_oe pa_oe = REG_RD(gio, regi_gio, rw_pa_oe); 107 reg_gio_rw_pa_oe pa_oe = REG_RD(gio, regi_gio, rw_pa_oe);
108 struct mtd_info_wrapper *wrapper;
88 struct nand_chip *this; 109 struct nand_chip *this;
89 int err = 0; 110 int err = 0;
90 111
91 /* Allocate memory for MTD device structure and private data */ 112 /* Allocate memory for MTD device structure and private data */
92 crisv32_mtd = kmalloc (sizeof(struct mtd_info) + sizeof (struct nand_chip), 113 wrapper = kzalloc(sizeof(struct mtd_info_wrapper), GFP_KERNEL);
93 GFP_KERNEL); 114 if (!wrapper) {
94 if (!crisv32_mtd) { 115 printk(KERN_ERR "Unable to allocate CRISv32 NAND MTD "
95 printk ("Unable to allocate CRISv32 NAND MTD device structure.\n"); 116 "device structure.\n");
96 err = -ENOMEM; 117 err = -ENOMEM;
97 return NULL; 118 return NULL;
98 } 119 }
@@ -101,45 +122,42 @@ struct mtd_info* __init crisv32_nand_flash_probe (void)
101 write_cs = ioremap(MEM_CSP1_START | MEM_NON_CACHEABLE, 8192); 122 write_cs = ioremap(MEM_CSP1_START | MEM_NON_CACHEABLE, 8192);
102 123
103 if (!read_cs || !write_cs) { 124 if (!read_cs || !write_cs) {
104 printk("CRISv32 NAND ioremap failed\n"); 125 printk(KERN_ERR "CRISv32 NAND ioremap failed\n");
105 err = -EIO; 126 err = -EIO;
106 goto out_mtd; 127 goto out_mtd;
107 } 128 }
108 129
109 /* Get pointer to private data */ 130 /* Get pointer to private data */
110 this = (struct nand_chip *) (&crisv32_mtd[1]); 131 this = &wrapper->chip;
132 crisv32_mtd = &wrapper->info;
111 133
112 pa_oe.oe |= 1 << CE_BIT; 134 pa_oe.oe |= 1 << CE_BIT;
113 pa_oe.oe |= 1 << ALE_BIT; 135 pa_oe.oe |= 1 << ALE_BIT;
114 pa_oe.oe |= 1 << CLE_BIT; 136 pa_oe.oe |= 1 << CLE_BIT;
115 pa_oe.oe &= ~ (1 << BY_BIT); 137 pa_oe.oe &= ~(1 << BY_BIT);
116 REG_WR(gio, regi_gio, rw_pa_oe, pa_oe); 138 REG_WR(gio, regi_gio, rw_pa_oe, pa_oe);
117 139
118 bif_cfg.gated_csp0 = regk_bif_core_rd; 140 bif_cfg.gated_csp0 = regk_bif_core_rd;
119 bif_cfg.gated_csp1 = regk_bif_core_wr; 141 bif_cfg.gated_csp1 = regk_bif_core_wr;
120 REG_WR(bif_core, regi_bif_core, rw_grp3_cfg, bif_cfg); 142 REG_WR(bif_core, regi_bif_core, rw_grp3_cfg, bif_cfg);
121 143
122 /* Initialize structures */
123 memset((char *) crisv32_mtd, 0, sizeof(struct mtd_info));
124 memset((char *) this, 0, sizeof(struct nand_chip));
125
126 /* Link the private data with the MTD structure */ 144 /* Link the private data with the MTD structure */
127 crisv32_mtd->priv = this; 145 crisv32_mtd->priv = this;
128 146
129 /* Set address of NAND IO lines */ 147 /* Set address of NAND IO lines */
130 this->IO_ADDR_R = read_cs; 148 this->IO_ADDR_R = read_cs;
131 this->IO_ADDR_W = write_cs; 149 this->IO_ADDR_W = write_cs;
132 this->hwcontrol = crisv32_hwcontrol; 150 this->cmd_ctrl = crisv32_hwcontrol;
133 this->dev_ready = crisv32_device_ready; 151 this->dev_ready = crisv32_device_ready;
134 /* 20 us command delay time */ 152 /* 20 us command delay time */
135 this->chip_delay = 20; 153 this->chip_delay = 20;
136 this->eccmode = NAND_ECC_SOFT; 154 this->ecc.mode = NAND_ECC_SOFT;
137 155
138 /* Enable the following for a flash based bad block table */ 156 /* Enable the following for a flash based bad block table */
139 this->options = NAND_USE_FLASH_BBT; 157 /* this->options = NAND_USE_FLASH_BBT; */
140 158
141 /* Scan to find existence of the device */ 159 /* Scan to find existance of the device */
142 if (nand_scan (crisv32_mtd, 1)) { 160 if (nand_scan(crisv32_mtd, 1)) {
143 err = -ENXIO; 161 err = -ENXIO;
144 goto out_ior; 162 goto out_ior;
145 } 163 }
@@ -150,7 +168,7 @@ out_ior:
150 iounmap((void *)read_cs); 168 iounmap((void *)read_cs);
151 iounmap((void *)write_cs); 169 iounmap((void *)write_cs);
152out_mtd: 170out_mtd:
153 kfree (crisv32_mtd); 171 kfree(wrapper);
154 return NULL; 172 return NULL;
155} 173}
156 174
diff --git a/arch/cris/arch-v32/drivers/pcf8563.c b/arch/cris/arch-v32/drivers/pcf8563.c
index 6dbd700d3d66..53db3870ba04 100644
--- a/arch/cris/arch-v32/drivers/pcf8563.c
+++ b/arch/cris/arch-v32/drivers/pcf8563.c
@@ -10,7 +10,7 @@
10 * 400 kbits/s. The built-in word address register is incremented 10 * 400 kbits/s. The built-in word address register is incremented
11 * automatically after each written or read byte. 11 * automatically after each written or read byte.
12 * 12 *
13 * Copyright (c) 2002-2003, Axis Communications AB 13 * Copyright (c) 2002-2007, Axis Communications AB
14 * All rights reserved. 14 * All rights reserved.
15 * 15 *
16 * Author: Tobias Anderberg <tobiasa@axis.com>. 16 * Author: Tobias Anderberg <tobiasa@axis.com>.
@@ -26,6 +26,7 @@
26#include <linux/ioctl.h> 26#include <linux/ioctl.h>
27#include <linux/delay.h> 27#include <linux/delay.h>
28#include <linux/bcd.h> 28#include <linux/bcd.h>
29#include <linux/mutex.h>
29 30
30#include <asm/uaccess.h> 31#include <asm/uaccess.h>
31#include <asm/system.h> 32#include <asm/system.h>
@@ -37,24 +38,27 @@
37#define PCF8563_MAJOR 121 /* Local major number. */ 38#define PCF8563_MAJOR 121 /* Local major number. */
38#define DEVICE_NAME "rtc" /* Name which is registered in /proc/devices. */ 39#define DEVICE_NAME "rtc" /* Name which is registered in /proc/devices. */
39#define PCF8563_NAME "PCF8563" 40#define PCF8563_NAME "PCF8563"
40#define DRIVER_VERSION "$Revision: 1.1 $" 41#define DRIVER_VERSION "$Revision: 1.17 $"
41 42
42/* Two simple wrapper macros, saves a few keystrokes. */ 43/* Two simple wrapper macros, saves a few keystrokes. */
43#define rtc_read(x) i2c_readreg(RTC_I2C_READ, x) 44#define rtc_read(x) i2c_readreg(RTC_I2C_READ, x)
44#define rtc_write(x,y) i2c_writereg(RTC_I2C_WRITE, x, y) 45#define rtc_write(x,y) i2c_writereg(RTC_I2C_WRITE, x, y)
45 46
47static DEFINE_MUTEX(rtc_lock); /* Protect state etc */
48
46static const unsigned char days_in_month[] = 49static const unsigned char days_in_month[] =
47 { 0, 31, 28, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31 }; 50 { 0, 31, 28, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31 };
48 51
49int pcf8563_ioctl(struct inode *, struct file *, unsigned int, unsigned long); 52int pcf8563_ioctl(struct inode *, struct file *, unsigned int, unsigned long);
50int pcf8563_open(struct inode *, struct file *); 53
51int pcf8563_release(struct inode *, struct file *); 54/* Cache VL bit value read at driver init since writing the RTC_SECOND
55 * register clears the VL status.
56 */
57static int voltage_low;
52 58
53static const struct file_operations pcf8563_fops = { 59static const struct file_operations pcf8563_fops = {
54 .owner = THIS_MODULE, 60 .owner = THIS_MODULE,
55 .ioctl = pcf8563_ioctl, 61 .ioctl = pcf8563_ioctl
56 .open = pcf8563_open,
57 .release = pcf8563_release,
58}; 62};
59 63
60unsigned char 64unsigned char
@@ -62,7 +66,7 @@ pcf8563_readreg(int reg)
62{ 66{
63 unsigned char res = rtc_read(reg); 67 unsigned char res = rtc_read(reg);
64 68
65 /* The PCF8563 does not return 0 for unimplemented bits */ 69 /* The PCF8563 does not return 0 for unimplemented bits. */
66 switch (reg) { 70 switch (reg) {
67 case RTC_SECONDS: 71 case RTC_SECONDS:
68 case RTC_MINUTES: 72 case RTC_MINUTES:
@@ -95,11 +99,6 @@ pcf8563_readreg(int reg)
95void 99void
96pcf8563_writereg(int reg, unsigned char val) 100pcf8563_writereg(int reg, unsigned char val)
97{ 101{
98#ifdef CONFIG_ETRAX_RTC_READONLY
99 if (reg == RTC_CONTROL1 || (reg >= RTC_SECONDS && reg <= RTC_YEAR))
100 return;
101#endif
102
103 rtc_write(reg, val); 102 rtc_write(reg, val);
104} 103}
105 104
@@ -114,11 +113,13 @@ get_rtc_time(struct rtc_time *tm)
114 tm->tm_mon = rtc_read(RTC_MONTH); 113 tm->tm_mon = rtc_read(RTC_MONTH);
115 tm->tm_year = rtc_read(RTC_YEAR); 114 tm->tm_year = rtc_read(RTC_YEAR);
116 115
117 if (tm->tm_sec & 0x80) 116 if (tm->tm_sec & 0x80) {
118 printk(KERN_WARNING "%s: RTC Voltage Low - reliable date/time " 117 printk(KERN_ERR "%s: RTC Voltage Low - reliable date/time "
119 "information is no longer guaranteed!\n", PCF8563_NAME); 118 "information is no longer guaranteed!\n", PCF8563_NAME);
119 }
120 120
121 tm->tm_year = BCD_TO_BIN(tm->tm_year) + ((tm->tm_mon & 0x80) ? 100 : 0); 121 tm->tm_year = BCD_TO_BIN(tm->tm_year) +
122 ((tm->tm_mon & 0x80) ? 100 : 0);
122 tm->tm_sec &= 0x7F; 123 tm->tm_sec &= 0x7F;
123 tm->tm_min &= 0x7F; 124 tm->tm_min &= 0x7F;
124 tm->tm_hour &= 0x3F; 125 tm->tm_hour &= 0x3F;
@@ -137,8 +138,19 @@ get_rtc_time(struct rtc_time *tm)
137int __init 138int __init
138pcf8563_init(void) 139pcf8563_init(void)
139{ 140{
141 static int res;
142 static int first = 1;
143
144 if (!first)
145 return res;
146 first = 0;
147
140 /* Initiate the i2c protocol. */ 148 /* Initiate the i2c protocol. */
141 i2c_init(); 149 res = i2c_init();
150 if (res < 0) {
151 printk(KERN_CRIT "pcf8563_init: Failed to init i2c.\n");
152 return res;
153 }
142 154
143 /* 155 /*
144 * First of all we need to reset the chip. This is done by 156 * First of all we need to reset the chip. This is done by
@@ -170,24 +182,20 @@ pcf8563_init(void)
170 if (rtc_write(RTC_WEEKDAY_ALARM, 0x80) < 0) 182 if (rtc_write(RTC_WEEKDAY_ALARM, 0x80) < 0)
171 goto err; 183 goto err;
172 184
173 if (register_chrdev(PCF8563_MAJOR, DEVICE_NAME, &pcf8563_fops) < 0) { 185 /* Check for low voltage, and warn about it. */
174 printk(KERN_INFO "%s: Unable to get major number %d for RTC device.\n", 186 if (rtc_read(RTC_SECONDS) & 0x80) {
175 PCF8563_NAME, PCF8563_MAJOR); 187 voltage_low = 1;
176 return -1; 188 printk(KERN_WARNING "%s: RTC Voltage Low - reliable "
189 "date/time information is no longer guaranteed!\n",
190 PCF8563_NAME);
177 } 191 }
178 192
179 printk(KERN_INFO "%s Real-Time Clock Driver, %s\n", PCF8563_NAME, DRIVER_VERSION); 193 return res;
180
181 /* Check for low voltage, and warn about it.. */
182 if (rtc_read(RTC_SECONDS) & 0x80)
183 printk(KERN_WARNING "%s: RTC Voltage Low - reliable date/time "
184 "information is no longer guaranteed!\n", PCF8563_NAME);
185
186 return 0;
187 194
188err: 195err:
189 printk(KERN_INFO "%s: Error initializing chip.\n", PCF8563_NAME); 196 printk(KERN_INFO "%s: Error initializing chip.\n", PCF8563_NAME);
190 return -1; 197 res = -1;
198 return res;
191} 199}
192 200
193void __exit 201void __exit
@@ -200,8 +208,8 @@ pcf8563_exit(void)
200 * ioctl calls for this driver. Why return -ENOTTY upon error? Because 208 * ioctl calls for this driver. Why return -ENOTTY upon error? Because
201 * POSIX says so! 209 * POSIX says so!
202 */ 210 */
203int 211int pcf8563_ioctl(struct inode *inode, struct file *filp, unsigned int cmd,
204pcf8563_ioctl(struct inode *inode, struct file *filp, unsigned int cmd, unsigned long arg) 212 unsigned long arg)
205{ 213{
206 /* Some sanity checks. */ 214 /* Some sanity checks. */
207 if (_IOC_TYPE(cmd) != RTC_MAGIC) 215 if (_IOC_TYPE(cmd) != RTC_MAGIC)
@@ -211,125 +219,147 @@ pcf8563_ioctl(struct inode *inode, struct file *filp, unsigned int cmd, unsigned
211 return -ENOTTY; 219 return -ENOTTY;
212 220
213 switch (cmd) { 221 switch (cmd) {
214 case RTC_RD_TIME: 222 case RTC_RD_TIME:
215 { 223 {
216 struct rtc_time tm; 224 struct rtc_time tm;
217 225
218 memset(&tm, 0, sizeof (struct rtc_time)); 226 mutex_lock(&rtc_lock);
219 get_rtc_time(&tm); 227 memset(&tm, 0, sizeof tm);
220 228 get_rtc_time(&tm);
221 if (copy_to_user((struct rtc_time *) arg, &tm, sizeof tm)) { 229
222 return -EFAULT; 230 if (copy_to_user((struct rtc_time *) arg, &tm,
223 } 231 sizeof tm)) {
224 232 spin_unlock(&rtc_lock);
225 return 0; 233 return -EFAULT;
226 } 234 }
227 235
228 case RTC_SET_TIME: 236 mutex_unlock(&rtc_lock);
229 { 237
230#ifdef CONFIG_ETRAX_RTC_READONLY 238 return 0;
239 }
240 case RTC_SET_TIME:
241 {
242 int leap;
243 int year;
244 int century;
245 struct rtc_time tm;
246
247 memset(&tm, 0, sizeof tm);
248 if (!capable(CAP_SYS_TIME))
231 return -EPERM; 249 return -EPERM;
232#else
233 int leap;
234 int year;
235 int century;
236 struct rtc_time tm;
237
238 if (!capable(CAP_SYS_TIME))
239 return -EPERM;
240
241 if (copy_from_user(&tm, (struct rtc_time *) arg, sizeof tm))
242 return -EFAULT;
243
244 /* Convert from struct tm to struct rtc_time. */
245 tm.tm_year += 1900;
246 tm.tm_mon += 1;
247
248 /*
249 * Check if tm.tm_year is a leap year. A year is a leap
250 * year if it is divisible by 4 but not 100, except
251 * that years divisible by 400 _are_ leap years.
252 */
253 year = tm.tm_year;
254 leap = (tm.tm_mon == 2) && ((year % 4 == 0 && year % 100 != 0) || year % 400 == 0);
255
256 /* Perform some sanity checks. */
257 if ((tm.tm_year < 1970) ||
258 (tm.tm_mon > 12) ||
259 (tm.tm_mday == 0) ||
260 (tm.tm_mday > days_in_month[tm.tm_mon] + leap) ||
261 (tm.tm_wday >= 7) ||
262 (tm.tm_hour >= 24) ||
263 (tm.tm_min >= 60) ||
264 (tm.tm_sec >= 60))
265 return -EINVAL;
266
267 century = (tm.tm_year >= 2000) ? 0x80 : 0;
268 tm.tm_year = tm.tm_year % 100;
269
270 BIN_TO_BCD(tm.tm_year);
271 BIN_TO_BCD(tm.tm_mday);
272 BIN_TO_BCD(tm.tm_hour);
273 BIN_TO_BCD(tm.tm_min);
274 BIN_TO_BCD(tm.tm_sec);
275 tm.tm_mon |= century;
276
277 rtc_write(RTC_YEAR, tm.tm_year);
278 rtc_write(RTC_MONTH, tm.tm_mon);
279 rtc_write(RTC_WEEKDAY, tm.tm_wday); /* Not coded in BCD. */
280 rtc_write(RTC_DAY_OF_MONTH, tm.tm_mday);
281 rtc_write(RTC_HOURS, tm.tm_hour);
282 rtc_write(RTC_MINUTES, tm.tm_min);
283 rtc_write(RTC_SECONDS, tm.tm_sec);
284
285 return 0;
286#endif /* !CONFIG_ETRAX_RTC_READONLY */
287 }
288 250
289 case RTC_VLOW_RD: 251 if (copy_from_user(&tm, (struct rtc_time *) arg,
290 { 252 sizeof tm))
291 int vl_bit = 0; 253 return -EFAULT;
254
255 /* Convert from struct tm to struct rtc_time. */
256 tm.tm_year += 1900;
257 tm.tm_mon += 1;
258
259 /*
260 * Check if tm.tm_year is a leap year. A year is a leap
261 * year if it is divisible by 4 but not 100, except
262 * that years divisible by 400 _are_ leap years.
263 */
264 year = tm.tm_year;
265 leap = (tm.tm_mon == 2) &&
266 ((year % 4 == 0 && year % 100 != 0) || year % 400 == 0);
267
268 /* Perform some sanity checks. */
269 if ((tm.tm_year < 1970) ||
270 (tm.tm_mon > 12) ||
271 (tm.tm_mday == 0) ||
272 (tm.tm_mday > days_in_month[tm.tm_mon] + leap) ||
273 (tm.tm_wday >= 7) ||
274 (tm.tm_hour >= 24) ||
275 (tm.tm_min >= 60) ||
276 (tm.tm_sec >= 60))
277 return -EINVAL;
278
279 century = (tm.tm_year >= 2000) ? 0x80 : 0;
280 tm.tm_year = tm.tm_year % 100;
281
282 BIN_TO_BCD(tm.tm_year);
283 BIN_TO_BCD(tm.tm_mon);
284 BIN_TO_BCD(tm.tm_mday);
285 BIN_TO_BCD(tm.tm_hour);
286 BIN_TO_BCD(tm.tm_min);
287 BIN_TO_BCD(tm.tm_sec);
288 tm.tm_mon |= century;
289
290 mutex_lock(&rtc_lock);
291
292 rtc_write(RTC_YEAR, tm.tm_year);
293 rtc_write(RTC_MONTH, tm.tm_mon);
294 rtc_write(RTC_WEEKDAY, tm.tm_wday); /* Not coded in BCD. */
295 rtc_write(RTC_DAY_OF_MONTH, tm.tm_mday);
296 rtc_write(RTC_HOURS, tm.tm_hour);
297 rtc_write(RTC_MINUTES, tm.tm_min);
298 rtc_write(RTC_SECONDS, tm.tm_sec);
299
300 mutex_unlock(&rtc_lock);
301
302 return 0;
303 }
304 case RTC_VL_READ:
305 if (voltage_low)
306 printk(KERN_ERR "%s: RTC Voltage Low - "
307 "reliable date/time information is no "
308 "longer guaranteed!\n", PCF8563_NAME);
292 309
293 if (rtc_read(RTC_SECONDS) & 0x80) { 310 if (copy_to_user((int *) arg, &voltage_low, sizeof(int)))
294 vl_bit = 1; 311 return -EFAULT;
295 printk(KERN_WARNING "%s: RTC Voltage Low - reliable " 312 return 0;
296 "date/time information is no longer guaranteed!\n",
297 PCF8563_NAME);
298 }
299 if (copy_to_user((int *) arg, &vl_bit, sizeof(int)))
300 return -EFAULT;
301 313
302 return 0; 314 case RTC_VL_CLR:
303 } 315 {
316 /* Clear the VL bit in the seconds register in case
317 * the time has not been set already (which would
318 * have cleared it). This does not really matter
319 * because of the cached voltage_low value but do it
320 * anyway for consistency. */
304 321
305 case RTC_VLOW_SET: 322 int ret = rtc_read(RTC_SECONDS);
306 {
307 /* Clear the VL bit in the seconds register */
308 int ret = rtc_read(RTC_SECONDS);
309 323
310 rtc_write(RTC_SECONDS, (ret & 0x7F)); 324 rtc_write(RTC_SECONDS, (ret & 0x7F));
311 325
312 return 0; 326 /* Clear the cached value. */
313 } 327 voltage_low = 0;
314 328
315 default: 329 return 0;
316 return -ENOTTY; 330 }
331 default:
332 return -ENOTTY;
317 } 333 }
318 334
319 return 0; 335 return 0;
320} 336}
321 337
322int 338static int __init pcf8563_register(void)
323pcf8563_open(struct inode *inode, struct file *filp)
324{ 339{
325 return 0; 340 if (pcf8563_init() < 0) {
326} 341 printk(KERN_INFO "%s: Unable to initialize Real-Time Clock "
342 "Driver, %s\n", PCF8563_NAME, DRIVER_VERSION);
343 return -1;
344 }
345
346 if (register_chrdev(PCF8563_MAJOR, DEVICE_NAME, &pcf8563_fops) < 0) {
347 printk(KERN_INFO "%s: Unable to get major numer %d for RTC "
348 "device.\n", PCF8563_NAME, PCF8563_MAJOR);
349 return -1;
350 }
351
352 printk(KERN_INFO "%s Real-Time Clock Driver, %s\n", PCF8563_NAME,
353 DRIVER_VERSION);
354
355 /* Check for low voltage, and warn about it. */
356 if (voltage_low) {
357 printk(KERN_WARNING "%s: RTC Voltage Low - reliable date/time "
358 "information is no longer guaranteed!\n", PCF8563_NAME);
359 }
327 360
328int
329pcf8563_release(struct inode *inode, struct file *filp)
330{
331 return 0; 361 return 0;
332} 362}
333 363
334module_init(pcf8563_init); 364module_init(pcf8563_register);
335module_exit(pcf8563_exit); 365module_exit(pcf8563_exit);
diff --git a/arch/cris/arch-v32/drivers/sync_serial.c b/arch/cris/arch-v32/drivers/sync_serial.c
index d581b0a92a3f..47c377df6fb3 100644
--- a/arch/cris/arch-v32/drivers/sync_serial.c
+++ b/arch/cris/arch-v32/drivers/sync_serial.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * Simple synchronous serial port driver for ETRAX FS. 2 * Simple synchronous serial port driver for ETRAX FS and Artpec-3.
3 * 3 *
4 * Copyright (c) 2005 Axis Communications AB 4 * Copyright (c) 2005 Axis Communications AB
5 * 5 *
@@ -21,17 +21,18 @@
21#include <linux/spinlock.h> 21#include <linux/spinlock.h>
22 22
23#include <asm/io.h> 23#include <asm/io.h>
24#include <asm/arch/dma.h> 24#include <dma.h>
25#include <asm/arch/pinmux.h> 25#include <pinmux.h>
26#include <asm/arch/hwregs/reg_rdwr.h> 26#include <hwregs/reg_rdwr.h>
27#include <asm/arch/hwregs/sser_defs.h> 27#include <hwregs/sser_defs.h>
28#include <asm/arch/hwregs/dma_defs.h> 28#include <hwregs/dma_defs.h>
29#include <asm/arch/hwregs/dma.h> 29#include <hwregs/dma.h>
30#include <asm/arch/hwregs/intr_vect_defs.h> 30#include <hwregs/intr_vect_defs.h>
31#include <asm/arch/hwregs/intr_vect.h> 31#include <hwregs/intr_vect.h>
32#include <asm/arch/hwregs/reg_map.h> 32#include <hwregs/reg_map.h>
33#include <asm/sync_serial.h> 33#include <asm/sync_serial.h>
34 34
35
35/* The receiver is a bit tricky beacuse of the continuous stream of data.*/ 36/* The receiver is a bit tricky beacuse of the continuous stream of data.*/
36/* */ 37/* */
37/* Three DMA descriptors are linked together. Each DMA descriptor is */ 38/* Three DMA descriptors are linked together. Each DMA descriptor is */
@@ -63,8 +64,10 @@
63/* words can be handled */ 64/* words can be handled */
64#define IN_BUFFER_SIZE 12288 65#define IN_BUFFER_SIZE 12288
65#define IN_DESCR_SIZE 256 66#define IN_DESCR_SIZE 256
66#define NUM_IN_DESCR (IN_BUFFER_SIZE/IN_DESCR_SIZE) 67#define NBR_IN_DESCR (IN_BUFFER_SIZE/IN_DESCR_SIZE)
67#define OUT_BUFFER_SIZE 4096 68
69#define OUT_BUFFER_SIZE 1024*8
70#define NBR_OUT_DESCR 8
68 71
69#define DEFAULT_FRAME_RATE 0 72#define DEFAULT_FRAME_RATE 0
70#define DEFAULT_WORD_RATE 7 73#define DEFAULT_WORD_RATE 7
@@ -78,6 +81,8 @@
78#define DEBUGPOLL(x) 81#define DEBUGPOLL(x)
79#define DEBUGRXINT(x) 82#define DEBUGRXINT(x)
80#define DEBUGTXINT(x) 83#define DEBUGTXINT(x)
84#define DEBUGTRDMA(x)
85#define DEBUGOUTBUF(x)
81 86
82typedef struct sync_port 87typedef struct sync_port
83{ 88{
@@ -97,10 +102,11 @@ typedef struct sync_port
97 int output; 102 int output;
98 int input; 103 int input;
99 104
100 volatile unsigned int out_count; /* Remaining bytes for current transfer */ 105 /* Next byte to be read by application */
101 unsigned char* outp; /* Current position in out_buffer */ 106 volatile unsigned char *volatile readp;
102 volatile unsigned char* volatile readp; /* Next byte to be read by application */ 107 /* Next byte to be written by etrax */
103 volatile unsigned char* volatile writep; /* Next byte to be written by etrax */ 108 volatile unsigned char *volatile writep;
109
104 unsigned int in_buffer_size; 110 unsigned int in_buffer_size;
105 unsigned int inbufchunk; 111 unsigned int inbufchunk;
106 unsigned char out_buffer[OUT_BUFFER_SIZE] __attribute__ ((aligned(32))); 112 unsigned char out_buffer[OUT_BUFFER_SIZE] __attribute__ ((aligned(32)));
@@ -108,11 +114,30 @@ typedef struct sync_port
108 unsigned char flip[IN_BUFFER_SIZE] __attribute__ ((aligned(32))); 114 unsigned char flip[IN_BUFFER_SIZE] __attribute__ ((aligned(32)));
109 struct dma_descr_data* next_rx_desc; 115 struct dma_descr_data* next_rx_desc;
110 struct dma_descr_data* prev_rx_desc; 116 struct dma_descr_data* prev_rx_desc;
117
118 /* Pointer to the first available descriptor in the ring,
119 * unless active_tr_descr == catch_tr_descr and a dma
120 * transfer is active */
121 struct dma_descr_data *active_tr_descr;
122
123 /* Pointer to the first allocated descriptor in the ring */
124 struct dma_descr_data *catch_tr_descr;
125
126 /* Pointer to the descriptor with the current end-of-list */
127 struct dma_descr_data *prev_tr_descr;
111 int full; 128 int full;
112 129
113 dma_descr_data in_descr[NUM_IN_DESCR] __attribute__ ((__aligned__(16))); 130 /* Pointer to the first byte being read by DMA
131 * or current position in out_buffer if not using DMA. */
132 unsigned char *out_rd_ptr;
133
134 /* Number of bytes currently locked for being read by DMA */
135 int out_buf_count;
136
137 dma_descr_data in_descr[NBR_IN_DESCR] __attribute__ ((__aligned__(16)));
114 dma_descr_context in_context __attribute__ ((__aligned__(32))); 138 dma_descr_context in_context __attribute__ ((__aligned__(32)));
115 dma_descr_data out_descr __attribute__ ((__aligned__(16))); 139 dma_descr_data out_descr[NBR_OUT_DESCR]
140 __attribute__ ((__aligned__(16)));
116 dma_descr_context out_context __attribute__ ((__aligned__(32))); 141 dma_descr_context out_context __attribute__ ((__aligned__(32)));
117 wait_queue_head_t out_wait_q; 142 wait_queue_head_t out_wait_q;
118 wait_queue_head_t in_wait_q; 143 wait_queue_head_t in_wait_q;
@@ -143,11 +168,11 @@ static ssize_t sync_serial_read(struct file *file, char *buf,
143#endif 168#endif
144 169
145static void send_word(sync_port* port); 170static void send_word(sync_port* port);
146static void start_dma(struct sync_port *port, const char* data, int count); 171static void start_dma_out(struct sync_port *port, const char *data, int count);
147static void start_dma_in(sync_port* port); 172static void start_dma_in(sync_port* port);
148#ifdef SYNC_SER_DMA 173#ifdef SYNC_SER_DMA
149static irqreturn_t tr_interrupt(int irq, void *dev_id, struct pt_regs * regs); 174static irqreturn_t tr_interrupt(int irq, void *dev_id);
150static irqreturn_t rx_interrupt(int irq, void *dev_id, struct pt_regs * regs); 175static irqreturn_t rx_interrupt(int irq, void *dev_id);
151#endif 176#endif
152 177
153#if (defined(CONFIG_ETRAX_SYNCHRONOUS_SERIAL_PORT0) && \ 178#if (defined(CONFIG_ETRAX_SYNCHRONOUS_SERIAL_PORT0) && \
@@ -157,22 +182,49 @@ static irqreturn_t rx_interrupt(int irq, void *dev_id, struct pt_regs * regs);
157#define SYNC_SER_MANUAL 182#define SYNC_SER_MANUAL
158#endif 183#endif
159#ifdef SYNC_SER_MANUAL 184#ifdef SYNC_SER_MANUAL
160static irqreturn_t manual_interrupt(int irq, void *dev_id, struct pt_regs * regs); 185static irqreturn_t manual_interrupt(int irq, void *dev_id);
186#endif
187
188#ifdef CONFIG_ETRAXFS /* ETRAX FS */
189#define OUT_DMA_NBR 4
190#define IN_DMA_NBR 5
191#define PINMUX_SSER pinmux_sser0
192#define SYNCSER_INST regi_sser0
193#define SYNCSER_INTR_VECT SSER0_INTR_VECT
194#define OUT_DMA_INST regi_dma4
195#define IN_DMA_INST regi_dma5
196#define DMA_OUT_INTR_VECT DMA4_INTR_VECT
197#define DMA_IN_INTR_VECT DMA5_INTR_VECT
198#define REQ_DMA_SYNCSER dma_sser0
199#else /* Artpec-3 */
200#define OUT_DMA_NBR 6
201#define IN_DMA_NBR 7
202#define PINMUX_SSER pinmux_sser
203#define SYNCSER_INST regi_sser
204#define SYNCSER_INTR_VECT SSER_INTR_VECT
205#define OUT_DMA_INST regi_dma6
206#define IN_DMA_INST regi_dma7
207#define DMA_OUT_INTR_VECT DMA6_INTR_VECT
208#define DMA_IN_INTR_VECT DMA7_INTR_VECT
209#define REQ_DMA_SYNCSER dma_sser
161#endif 210#endif
162 211
163/* The ports */ 212/* The ports */
164static struct sync_port ports[]= 213static struct sync_port ports[]=
165{ 214{
166 { 215 {
167 .regi_sser = regi_sser0, 216 .regi_sser = SYNCSER_INST,
168 .regi_dmaout = regi_dma4, 217 .regi_dmaout = OUT_DMA_INST,
169 .regi_dmain = regi_dma5, 218 .regi_dmain = IN_DMA_INST,
170#if defined(CONFIG_ETRAX_SYNCHRONOUS_SERIAL0_DMA) 219#if defined(CONFIG_ETRAX_SYNCHRONOUS_SERIAL0_DMA)
171 .use_dma = 1, 220 .use_dma = 1,
172#else 221#else
173 .use_dma = 0, 222 .use_dma = 0,
174#endif 223#endif
175 }, 224 }
225#ifdef CONFIG_ETRAXFS
226 ,
227
176 { 228 {
177 .regi_sser = regi_sser1, 229 .regi_sser = regi_sser1,
178 .regi_dmaout = regi_dma6, 230 .regi_dmaout = regi_dma6,
@@ -183,9 +235,10 @@ static struct sync_port ports[]=
183 .use_dma = 0, 235 .use_dma = 0,
184#endif 236#endif
185 } 237 }
238#endif
186}; 239};
187 240
188#define NUMBER_OF_PORTS ARRAY_SIZE(ports) 241#define NBR_PORTS ARRAY_SIZE(ports)
189 242
190static const struct file_operations sync_serial_fops = { 243static const struct file_operations sync_serial_fops = {
191 .owner = THIS_MODULE, 244 .owner = THIS_MODULE,
@@ -200,19 +253,21 @@ static const struct file_operations sync_serial_fops = {
200static int __init etrax_sync_serial_init(void) 253static int __init etrax_sync_serial_init(void)
201{ 254{
202 ports[0].enabled = 0; 255 ports[0].enabled = 0;
256#ifdef CONFIG_ETRAXFS
203 ports[1].enabled = 0; 257 ports[1].enabled = 0;
204 258#endif
205 if (register_chrdev(SYNC_SERIAL_MAJOR,"sync serial", &sync_serial_fops) <0 ) 259 if (register_chrdev(SYNC_SERIAL_MAJOR, "sync serial",
206 { 260 &sync_serial_fops) < 0) {
207 printk("unable to get major for synchronous serial port\n"); 261 printk(KERN_WARNING
262 "Unable to get major for synchronous serial port\n");
208 return -EBUSY; 263 return -EBUSY;
209 } 264 }
210 265
211 /* Initialize Ports */ 266 /* Initialize Ports */
212#if defined(CONFIG_ETRAX_SYNCHRONOUS_SERIAL_PORT0) 267#if defined(CONFIG_ETRAX_SYNCHRONOUS_SERIAL_PORT0)
213 if (crisv32_pinmux_alloc_fixed(pinmux_sser0)) 268 if (crisv32_pinmux_alloc_fixed(PINMUX_SSER)) {
214 { 269 printk(KERN_WARNING
215 printk("Unable to allocate pins for syncrhronous serial port 0\n"); 270 "Unable to alloc pins for synchronous serial port 0\n");
216 return -EIO; 271 return -EIO;
217 } 272 }
218 ports[0].enabled = 1; 273 ports[0].enabled = 1;
@@ -220,33 +275,40 @@ static int __init etrax_sync_serial_init(void)
220#endif 275#endif
221 276
222#if defined(CONFIG_ETRAX_SYNCHRONOUS_SERIAL_PORT1) 277#if defined(CONFIG_ETRAX_SYNCHRONOUS_SERIAL_PORT1)
223 if (crisv32_pinmux_alloc_fixed(pinmux_sser1)) 278 if (crisv32_pinmux_alloc_fixed(pinmux_sser1)) {
224 { 279 printk(KERN_WARNING
225 printk("Unable to allocate pins for syncrhronous serial port 0\n"); 280 "Unable to alloc pins for synchronous serial port 0\n");
226 return -EIO; 281 return -EIO;
227 } 282 }
228 ports[1].enabled = 1; 283 ports[1].enabled = 1;
229 initialize_port(1); 284 initialize_port(1);
230#endif 285#endif
231 286
232 printk("ETRAX FS synchronous serial port driver\n"); 287#ifdef CONFIG_ETRAXFS
288 printk(KERN_INFO "ETRAX FS synchronous serial port driver\n");
289#else
290 printk(KERN_INFO "Artpec-3 synchronous serial port driver\n");
291#endif
233 return 0; 292 return 0;
234} 293}
235 294
236static void __init initialize_port(int portnbr) 295static void __init initialize_port(int portnbr)
237{ 296{
238 struct sync_port* port = &ports[portnbr]; 297 int __attribute__((unused)) i;
298 struct sync_port *port = &ports[portnbr];
239 reg_sser_rw_cfg cfg = {0}; 299 reg_sser_rw_cfg cfg = {0};
240 reg_sser_rw_frm_cfg frm_cfg = {0}; 300 reg_sser_rw_frm_cfg frm_cfg = {0};
241 reg_sser_rw_tr_cfg tr_cfg = {0}; 301 reg_sser_rw_tr_cfg tr_cfg = {0};
242 reg_sser_rw_rec_cfg rec_cfg = {0}; 302 reg_sser_rw_rec_cfg rec_cfg = {0};
243 303
244 DEBUG(printk("Init sync serial port %d\n", portnbr)); 304 DEBUG(printk(KERN_DEBUG "Init sync serial port %d\n", portnbr));
245 305
246 port->port_nbr = portnbr; 306 port->port_nbr = portnbr;
247 port->init_irqs = 1; 307 port->init_irqs = 1;
248 308
249 port->outp = port->out_buffer; 309 port->out_rd_ptr = port->out_buffer;
310 port->out_buf_count = 0;
311
250 port->output = 1; 312 port->output = 1;
251 port->input = 0; 313 port->input = 0;
252 314
@@ -255,7 +317,7 @@ static void __init initialize_port(int portnbr)
255 port->in_buffer_size = IN_BUFFER_SIZE; 317 port->in_buffer_size = IN_BUFFER_SIZE;
256 port->inbufchunk = IN_DESCR_SIZE; 318 port->inbufchunk = IN_DESCR_SIZE;
257 port->next_rx_desc = &port->in_descr[0]; 319 port->next_rx_desc = &port->in_descr[0];
258 port->prev_rx_desc = &port->in_descr[NUM_IN_DESCR-1]; 320 port->prev_rx_desc = &port->in_descr[NBR_IN_DESCR-1];
259 port->prev_rx_desc->eol = 1; 321 port->prev_rx_desc->eol = 1;
260 322
261 init_waitqueue_head(&port->out_wait_q); 323 init_waitqueue_head(&port->out_wait_q);
@@ -286,8 +348,13 @@ static void __init initialize_port(int portnbr)
286 tr_cfg.sample_size = 7; 348 tr_cfg.sample_size = 7;
287 tr_cfg.sh_dir = regk_sser_msbfirst; 349 tr_cfg.sh_dir = regk_sser_msbfirst;
288 tr_cfg.use_dma = port->use_dma ? regk_sser_yes : regk_sser_no; 350 tr_cfg.use_dma = port->use_dma ? regk_sser_yes : regk_sser_no;
351#if 0
289 tr_cfg.rate_ctrl = regk_sser_bulk; 352 tr_cfg.rate_ctrl = regk_sser_bulk;
290 tr_cfg.data_pin_use = regk_sser_dout; 353 tr_cfg.data_pin_use = regk_sser_dout;
354#else
355 tr_cfg.rate_ctrl = regk_sser_iso;
356 tr_cfg.data_pin_use = regk_sser_dout;
357#endif
291 tr_cfg.bulk_wspace = 1; 358 tr_cfg.bulk_wspace = 1;
292 REG_WR(sser, port->regi_sser, rw_tr_cfg, tr_cfg); 359 REG_WR(sser, port->regi_sser, rw_tr_cfg, tr_cfg);
293 360
@@ -296,6 +363,27 @@ static void __init initialize_port(int portnbr)
296 rec_cfg.use_dma = port->use_dma ? regk_sser_yes : regk_sser_no; 363 rec_cfg.use_dma = port->use_dma ? regk_sser_yes : regk_sser_no;
297 rec_cfg.fifo_thr = regk_sser_inf; 364 rec_cfg.fifo_thr = regk_sser_inf;
298 REG_WR(sser, port->regi_sser, rw_rec_cfg, rec_cfg); 365 REG_WR(sser, port->regi_sser, rw_rec_cfg, rec_cfg);
366
367#ifdef SYNC_SER_DMA
368 /* Setup the descriptor ring for dma out/transmit. */
369 for (i = 0; i < NBR_OUT_DESCR; i++) {
370 port->out_descr[i].wait = 0;
371 port->out_descr[i].intr = 1;
372 port->out_descr[i].eol = 0;
373 port->out_descr[i].out_eop = 0;
374 port->out_descr[i].next =
375 (dma_descr_data *)virt_to_phys(&port->out_descr[i+1]);
376 }
377
378 /* Create a ring from the list. */
379 port->out_descr[NBR_OUT_DESCR-1].next =
380 (dma_descr_data *)virt_to_phys(&port->out_descr[0]);
381
382 /* Setup context for traversing the ring. */
383 port->active_tr_descr = &port->out_descr[0];
384 port->prev_tr_descr = &port->out_descr[NBR_OUT_DESCR-1];
385 port->catch_tr_descr = &port->out_descr[0];
386#endif
299} 387}
300 388
301static inline int sync_data_avail(struct sync_port *port) 389static inline int sync_data_avail(struct sync_port *port)
@@ -311,7 +399,7 @@ static inline int sync_data_avail(struct sync_port *port)
311 * ^rp ^wp ^wp ^rp 399 * ^rp ^wp ^wp ^rp
312 */ 400 */
313 401
314 if (end >= start) 402 if (end >= start)
315 avail = end - start; 403 avail = end - start;
316 else 404 else
317 avail = port->in_buffer_size - (start - end); 405 avail = port->in_buffer_size - (start - end);
@@ -331,7 +419,7 @@ static inline int sync_data_avail_to_end(struct sync_port *port)
331 * ^rp ^wp ^wp ^rp 419 * ^rp ^wp ^wp ^rp
332 */ 420 */
333 421
334 if (end >= start) 422 if (end >= start)
335 avail = end - start; 423 avail = end - start;
336 else 424 else
337 avail = port->flip + port->in_buffer_size - start; 425 avail = port->flip + port->in_buffer_size - start;
@@ -341,66 +429,69 @@ static inline int sync_data_avail_to_end(struct sync_port *port)
341static int sync_serial_open(struct inode *inode, struct file *file) 429static int sync_serial_open(struct inode *inode, struct file *file)
342{ 430{
343 int dev = iminor(inode); 431 int dev = iminor(inode);
344 sync_port* port; 432 sync_port *port;
345 reg_dma_rw_cfg cfg = {.en = regk_dma_yes}; 433 reg_dma_rw_cfg cfg = {.en = regk_dma_yes};
346 reg_dma_rw_intr_mask intr_mask = {.data = regk_dma_yes}; 434 reg_dma_rw_intr_mask intr_mask = {.data = regk_dma_yes};
347 435
348 DEBUG(printk("Open sync serial port %d\n", dev)); 436 DEBUG(printk(KERN_DEBUG "Open sync serial port %d\n", dev));
349 437
350 if (dev < 0 || dev >= NUMBER_OF_PORTS || !ports[dev].enabled) 438 if (dev < 0 || dev >= NBR_PORTS || !ports[dev].enabled)
351 { 439 {
352 DEBUG(printk("Invalid minor %d\n", dev)); 440 DEBUG(printk(KERN_DEBUG "Invalid minor %d\n", dev));
353 return -ENODEV; 441 return -ENODEV;
354 } 442 }
355 port = &ports[dev]; 443 port = &ports[dev];
356 /* Allow open this device twice (assuming one reader and one writer) */ 444 /* Allow open this device twice (assuming one reader and one writer) */
357 if (port->busy == 2) 445 if (port->busy == 2)
358 { 446 {
359 DEBUG(printk("Device is busy.. \n")); 447 DEBUG(printk(KERN_DEBUG "Device is busy.. \n"));
360 return -EBUSY; 448 return -EBUSY;
361 } 449 }
450
451
362 if (port->init_irqs) { 452 if (port->init_irqs) {
363 if (port->use_dma) { 453 if (port->use_dma) {
364 if (port == &ports[0]){ 454 if (port == &ports[0]) {
365#ifdef SYNC_SER_DMA 455#ifdef SYNC_SER_DMA
366 if(request_irq(DMA4_INTR_VECT, 456 if (request_irq(DMA_OUT_INTR_VECT,
367 tr_interrupt, 457 tr_interrupt,
368 0, 458 0,
369 "synchronous serial 0 dma tr", 459 "synchronous serial 0 dma tr",
370 &ports[0])) { 460 &ports[0])) {
371 printk(KERN_CRIT "Can't allocate sync serial port 0 IRQ"); 461 printk(KERN_CRIT "Can't allocate sync serial port 0 IRQ");
372 return -EBUSY; 462 return -EBUSY;
373 } else if(request_irq(DMA5_INTR_VECT, 463 } else if (request_irq(DMA_IN_INTR_VECT,
374 rx_interrupt, 464 rx_interrupt,
375 0, 465 0,
376 "synchronous serial 1 dma rx", 466 "synchronous serial 1 dma rx",
377 &ports[0])) { 467 &ports[0])) {
378 free_irq(DMA4_INTR_VECT, &port[0]); 468 free_irq(DMA_OUT_INTR_VECT, &port[0]);
379 printk(KERN_CRIT "Can't allocate sync serial port 0 IRQ"); 469 printk(KERN_CRIT "Can't allocate sync serial port 0 IRQ");
380 return -EBUSY; 470 return -EBUSY;
381 } else if (crisv32_request_dma(SYNC_SER0_TX_DMA_NBR, 471 } else if (crisv32_request_dma(OUT_DMA_NBR,
382 "synchronous serial 0 dma tr", 472 "synchronous serial 0 dma tr",
383 DMA_VERBOSE_ON_ERROR, 473 DMA_VERBOSE_ON_ERROR,
384 0, 474 0,
385 dma_sser0)) { 475 REQ_DMA_SYNCSER)) {
386 free_irq(DMA4_INTR_VECT, &port[0]); 476 free_irq(DMA_OUT_INTR_VECT, &port[0]);
387 free_irq(DMA5_INTR_VECT, &port[0]); 477 free_irq(DMA_IN_INTR_VECT, &port[0]);
388 printk(KERN_CRIT "Can't allocate sync serial port 0 TX DMA channel"); 478 printk(KERN_CRIT "Can't allocate sync serial port 0 TX DMA channel");
389 return -EBUSY; 479 return -EBUSY;
390 } else if (crisv32_request_dma(SYNC_SER0_RX_DMA_NBR, 480 } else if (crisv32_request_dma(IN_DMA_NBR,
391 "synchronous serial 0 dma rec", 481 "synchronous serial 0 dma rec",
392 DMA_VERBOSE_ON_ERROR, 482 DMA_VERBOSE_ON_ERROR,
393 0, 483 0,
394 dma_sser0)) { 484 REQ_DMA_SYNCSER)) {
395 crisv32_free_dma(SYNC_SER0_TX_DMA_NBR); 485 crisv32_free_dma(OUT_DMA_NBR);
396 free_irq(DMA4_INTR_VECT, &port[0]); 486 free_irq(DMA_OUT_INTR_VECT, &port[0]);
397 free_irq(DMA5_INTR_VECT, &port[0]); 487 free_irq(DMA_IN_INTR_VECT, &port[0]);
398 printk(KERN_CRIT "Can't allocate sync serial port 1 RX DMA channel"); 488 printk(KERN_CRIT "Can't allocate sync serial port 1 RX DMA channel");
399 return -EBUSY; 489 return -EBUSY;
400 } 490 }
401#endif 491#endif
402 } 492 }
403 else if (port == &ports[1]){ 493#ifdef CONFIG_ETRAXFS
494 else if (port == &ports[1]) {
404#ifdef SYNC_SER_DMA 495#ifdef SYNC_SER_DMA
405 if (request_irq(DMA6_INTR_VECT, 496 if (request_irq(DMA6_INTR_VECT,
406 tr_interrupt, 497 tr_interrupt,
@@ -417,20 +508,22 @@ static int sync_serial_open(struct inode *inode, struct file *file)
417 free_irq(DMA6_INTR_VECT, &ports[1]); 508 free_irq(DMA6_INTR_VECT, &ports[1]);
418 printk(KERN_CRIT "Can't allocate sync serial port 3 IRQ"); 509 printk(KERN_CRIT "Can't allocate sync serial port 3 IRQ");
419 return -EBUSY; 510 return -EBUSY;
420 } else if (crisv32_request_dma(SYNC_SER1_TX_DMA_NBR, 511 } else if (crisv32_request_dma(
421 "synchronous serial 1 dma tr", 512 SYNC_SER1_TX_DMA_NBR,
422 DMA_VERBOSE_ON_ERROR, 513 "synchronous serial 1 dma tr",
423 0, 514 DMA_VERBOSE_ON_ERROR,
424 dma_sser1)) { 515 0,
425 free_irq(21, &ports[1]); 516 dma_sser1)) {
426 free_irq(20, &ports[1]); 517 free_irq(DMA6_INTR_VECT, &ports[1]);
518 free_irq(DMA7_INTR_VECT, &ports[1]);
427 printk(KERN_CRIT "Can't allocate sync serial port 3 TX DMA channel"); 519 printk(KERN_CRIT "Can't allocate sync serial port 3 TX DMA channel");
428 return -EBUSY; 520 return -EBUSY;
429 } else if (crisv32_request_dma(SYNC_SER1_RX_DMA_NBR, 521 } else if (crisv32_request_dma(
430 "synchronous serial 3 dma rec", 522 SYNC_SER1_RX_DMA_NBR,
431 DMA_VERBOSE_ON_ERROR, 523 "synchronous serial 3 dma rec",
432 0, 524 DMA_VERBOSE_ON_ERROR,
433 dma_sser1)) { 525 0,
526 dma_sser1)) {
434 crisv32_free_dma(SYNC_SER1_TX_DMA_NBR); 527 crisv32_free_dma(SYNC_SER1_TX_DMA_NBR);
435 free_irq(DMA6_INTR_VECT, &ports[1]); 528 free_irq(DMA6_INTR_VECT, &ports[1]);
436 free_irq(DMA7_INTR_VECT, &ports[1]); 529 free_irq(DMA7_INTR_VECT, &ports[1]);
@@ -439,14 +532,14 @@ static int sync_serial_open(struct inode *inode, struct file *file)
439 } 532 }
440#endif 533#endif
441 } 534 }
442 535#endif
443 /* Enable DMAs */ 536 /* Enable DMAs */
444 REG_WR(dma, port->regi_dmain, rw_cfg, cfg); 537 REG_WR(dma, port->regi_dmain, rw_cfg, cfg);
445 REG_WR(dma, port->regi_dmaout, rw_cfg, cfg); 538 REG_WR(dma, port->regi_dmaout, rw_cfg, cfg);
446 /* Enable DMA IRQs */ 539 /* Enable DMA IRQs */
447 REG_WR(dma, port->regi_dmain, rw_intr_mask, intr_mask); 540 REG_WR(dma, port->regi_dmain, rw_intr_mask, intr_mask);
448 REG_WR(dma, port->regi_dmaout, rw_intr_mask, intr_mask); 541 REG_WR(dma, port->regi_dmaout, rw_intr_mask, intr_mask);
449 /* Set up wordsize = 2 for DMAs. */ 542 /* Set up wordsize = 1 for DMAs. */
450 DMA_WR_CMD (port->regi_dmain, regk_dma_set_w_size1); 543 DMA_WR_CMD (port->regi_dmain, regk_dma_set_w_size1);
451 DMA_WR_CMD (port->regi_dmaout, regk_dma_set_w_size1); 544 DMA_WR_CMD (port->regi_dmaout, regk_dma_set_w_size1);
452 545
@@ -455,7 +548,7 @@ static int sync_serial_open(struct inode *inode, struct file *file)
455 } else { /* !port->use_dma */ 548 } else { /* !port->use_dma */
456#ifdef SYNC_SER_MANUAL 549#ifdef SYNC_SER_MANUAL
457 if (port == &ports[0]) { 550 if (port == &ports[0]) {
458 if (request_irq(SSER0_INTR_VECT, 551 if (request_irq(SYNCSER_INTR_VECT,
459 manual_interrupt, 552 manual_interrupt,
460 0, 553 0,
461 "synchronous serial manual irq", 554 "synchronous serial manual irq",
@@ -463,7 +556,9 @@ static int sync_serial_open(struct inode *inode, struct file *file)
463 printk("Can't allocate sync serial manual irq"); 556 printk("Can't allocate sync serial manual irq");
464 return -EBUSY; 557 return -EBUSY;
465 } 558 }
466 } else if (port == &ports[1]) { 559 }
560#ifdef CONFIG_ETRAXFS
561 else if (port == &ports[1]) {
467 if (request_irq(SSER1_INTR_VECT, 562 if (request_irq(SSER1_INTR_VECT,
468 manual_interrupt, 563 manual_interrupt,
469 0, 564 0,
@@ -473,11 +568,13 @@ static int sync_serial_open(struct inode *inode, struct file *file)
473 return -EBUSY; 568 return -EBUSY;
474 } 569 }
475 } 570 }
571#endif
476 port->init_irqs = 0; 572 port->init_irqs = 0;
477#else 573#else
478 panic("sync_serial: Manual mode not supported.\n"); 574 panic("sync_serial: Manual mode not supported.\n");
479#endif /* SYNC_SER_MANUAL */ 575#endif /* SYNC_SER_MANUAL */
480 } 576 }
577
481 } /* port->init_irqs */ 578 } /* port->init_irqs */
482 579
483 port->busy++; 580 port->busy++;
@@ -487,9 +584,9 @@ static int sync_serial_open(struct inode *inode, struct file *file)
487static int sync_serial_release(struct inode *inode, struct file *file) 584static int sync_serial_release(struct inode *inode, struct file *file)
488{ 585{
489 int dev = iminor(inode); 586 int dev = iminor(inode);
490 sync_port* port; 587 sync_port *port;
491 588
492 if (dev < 0 || dev >= NUMBER_OF_PORTS || !ports[dev].enabled) 589 if (dev < 0 || dev >= NBR_PORTS || !ports[dev].enabled)
493 { 590 {
494 DEBUG(printk("Invalid minor %d\n", dev)); 591 DEBUG(printk("Invalid minor %d\n", dev));
495 return -ENODEV; 592 return -ENODEV;
@@ -506,17 +603,37 @@ static unsigned int sync_serial_poll(struct file *file, poll_table *wait)
506{ 603{
507 int dev = iminor(file->f_path.dentry->d_inode); 604 int dev = iminor(file->f_path.dentry->d_inode);
508 unsigned int mask = 0; 605 unsigned int mask = 0;
509 sync_port* port; 606 sync_port *port;
510 DEBUGPOLL( static unsigned int prev_mask = 0; ); 607 DEBUGPOLL( static unsigned int prev_mask = 0; );
511 608
512 port = &ports[dev]; 609 port = &ports[dev];
610
611 if (!port->started) {
612 reg_sser_rw_cfg cfg = REG_RD(sser, port->regi_sser, rw_cfg);
613 reg_sser_rw_rec_cfg rec_cfg =
614 REG_RD(sser, port->regi_sser, rw_rec_cfg);
615 cfg.en = regk_sser_yes;
616 rec_cfg.rec_en = port->input;
617 REG_WR(sser, port->regi_sser, rw_cfg, cfg);
618 REG_WR(sser, port->regi_sser, rw_rec_cfg, rec_cfg);
619 port->started = 1;
620 }
621
513 poll_wait(file, &port->out_wait_q, wait); 622 poll_wait(file, &port->out_wait_q, wait);
514 poll_wait(file, &port->in_wait_q, wait); 623 poll_wait(file, &port->in_wait_q, wait);
515 /* Some room to write */ 624
516 if (port->out_count < OUT_BUFFER_SIZE) 625 /* No active transfer, descriptors are available */
626 if (port->output && !port->tr_running)
627 mask |= POLLOUT | POLLWRNORM;
628
629 /* Descriptor and buffer space available. */
630 if (port->output &&
631 port->active_tr_descr != port->catch_tr_descr &&
632 port->out_buf_count < OUT_BUFFER_SIZE)
517 mask |= POLLOUT | POLLWRNORM; 633 mask |= POLLOUT | POLLWRNORM;
634
518 /* At least an inbufchunk of data */ 635 /* At least an inbufchunk of data */
519 if (sync_data_avail(port) >= port->inbufchunk) 636 if (port->input && sync_data_avail(port) >= port->inbufchunk)
520 mask |= POLLIN | POLLRDNORM; 637 mask |= POLLIN | POLLRDNORM;
521 638
522 DEBUGPOLL(if (mask != prev_mask) 639 DEBUGPOLL(if (mask != prev_mask)
@@ -531,15 +648,16 @@ static int sync_serial_ioctl(struct inode *inode, struct file *file,
531 unsigned int cmd, unsigned long arg) 648 unsigned int cmd, unsigned long arg)
532{ 649{
533 int return_val = 0; 650 int return_val = 0;
651 int dma_w_size = regk_dma_set_w_size1;
534 int dev = iminor(file->f_path.dentry->d_inode); 652 int dev = iminor(file->f_path.dentry->d_inode);
535 sync_port* port; 653 sync_port *port;
536 reg_sser_rw_tr_cfg tr_cfg; 654 reg_sser_rw_tr_cfg tr_cfg;
537 reg_sser_rw_rec_cfg rec_cfg; 655 reg_sser_rw_rec_cfg rec_cfg;
538 reg_sser_rw_frm_cfg frm_cfg; 656 reg_sser_rw_frm_cfg frm_cfg;
539 reg_sser_rw_cfg gen_cfg; 657 reg_sser_rw_cfg gen_cfg;
540 reg_sser_rw_intr_mask intr_mask; 658 reg_sser_rw_intr_mask intr_mask;
541 659
542 if (dev < 0 || dev >= NUMBER_OF_PORTS || !ports[dev].enabled) 660 if (dev < 0 || dev >= NBR_PORTS || !ports[dev].enabled)
543 { 661 {
544 DEBUG(printk("Invalid minor %d\n", dev)); 662 DEBUG(printk("Invalid minor %d\n", dev));
545 return -1; 663 return -1;
@@ -558,61 +676,81 @@ static int sync_serial_ioctl(struct inode *inode, struct file *file,
558 case SSP_SPEED: 676 case SSP_SPEED:
559 if (GET_SPEED(arg) == CODEC) 677 if (GET_SPEED(arg) == CODEC)
560 { 678 {
679 unsigned int freq;
680
561 gen_cfg.base_freq = regk_sser_f32; 681 gen_cfg.base_freq = regk_sser_f32;
562 /* FREQ = 0 => 4 MHz => clk_div = 7*/ 682
563 gen_cfg.clk_div = 6 + (1 << GET_FREQ(arg)); 683 /* Clock divider will internally be
564 } 684 * gen_cfg.clk_div + 1.
565 else 685 */
566 { 686
687 freq = GET_FREQ(arg);
688 switch (freq) {
689 case FREQ_32kHz:
690 case FREQ_64kHz:
691 case FREQ_128kHz:
692 case FREQ_256kHz:
693 gen_cfg.clk_div = 125 *
694 (1 << (freq - FREQ_256kHz)) - 1;
695 break;
696 case FREQ_512kHz:
697 gen_cfg.clk_div = 62;
698 break;
699 case FREQ_1MHz:
700 case FREQ_2MHz:
701 case FREQ_4MHz:
702 gen_cfg.clk_div = 8 * (1 << freq) - 1;
703 break;
704 }
705 } else {
567 gen_cfg.base_freq = regk_sser_f29_493; 706 gen_cfg.base_freq = regk_sser_f29_493;
568 switch (GET_SPEED(arg)) 707 switch (GET_SPEED(arg)) {
569 { 708 case SSP150:
570 case SSP150: 709 gen_cfg.clk_div = 29493000 / (150 * 8) - 1;
571 gen_cfg.clk_div = 29493000 / (150 * 8) - 1; 710 break;
572 break; 711 case SSP300:
573 case SSP300: 712 gen_cfg.clk_div = 29493000 / (300 * 8) - 1;
574 gen_cfg.clk_div = 29493000 / (300 * 8) - 1; 713 break;
575 break; 714 case SSP600:
576 case SSP600: 715 gen_cfg.clk_div = 29493000 / (600 * 8) - 1;
577 gen_cfg.clk_div = 29493000 / (600 * 8) - 1; 716 break;
578 break; 717 case SSP1200:
579 case SSP1200: 718 gen_cfg.clk_div = 29493000 / (1200 * 8) - 1;
580 gen_cfg.clk_div = 29493000 / (1200 * 8) - 1; 719 break;
581 break; 720 case SSP2400:
582 case SSP2400: 721 gen_cfg.clk_div = 29493000 / (2400 * 8) - 1;
583 gen_cfg.clk_div = 29493000 / (2400 * 8) - 1; 722 break;
584 break; 723 case SSP4800:
585 case SSP4800: 724 gen_cfg.clk_div = 29493000 / (4800 * 8) - 1;
586 gen_cfg.clk_div = 29493000 / (4800 * 8) - 1; 725 break;
587 break; 726 case SSP9600:
588 case SSP9600: 727 gen_cfg.clk_div = 29493000 / (9600 * 8) - 1;
589 gen_cfg.clk_div = 29493000 / (9600 * 8) - 1; 728 break;
590 break; 729 case SSP19200:
591 case SSP19200: 730 gen_cfg.clk_div = 29493000 / (19200 * 8) - 1;
592 gen_cfg.clk_div = 29493000 / (19200 * 8) - 1; 731 break;
593 break; 732 case SSP28800:
594 case SSP28800: 733 gen_cfg.clk_div = 29493000 / (28800 * 8) - 1;
595 gen_cfg.clk_div = 29493000 / (28800 * 8) - 1; 734 break;
596 break; 735 case SSP57600:
597 case SSP57600: 736 gen_cfg.clk_div = 29493000 / (57600 * 8) - 1;
598 gen_cfg.clk_div = 29493000 / (57600 * 8) - 1; 737 break;
599 break; 738 case SSP115200:
600 case SSP115200: 739 gen_cfg.clk_div = 29493000 / (115200 * 8) - 1;
601 gen_cfg.clk_div = 29493000 / (115200 * 8) - 1; 740 break;
602 break; 741 case SSP230400:
603 case SSP230400: 742 gen_cfg.clk_div = 29493000 / (230400 * 8) - 1;
604 gen_cfg.clk_div = 29493000 / (230400 * 8) - 1; 743 break;
605 break; 744 case SSP460800:
606 case SSP460800: 745 gen_cfg.clk_div = 29493000 / (460800 * 8) - 1;
607 gen_cfg.clk_div = 29493000 / (460800 * 8) - 1; 746 break;
608 break; 747 case SSP921600:
609 case SSP921600: 748 gen_cfg.clk_div = 29493000 / (921600 * 8) - 1;
610 gen_cfg.clk_div = 29493000 / (921600 * 8) - 1; 749 break;
611 break; 750 case SSP3125000:
612 case SSP3125000: 751 gen_cfg.base_freq = regk_sser_f100;
613 gen_cfg.base_freq = regk_sser_f100; 752 gen_cfg.clk_div = 100000000 / (3125000 * 8) - 1;
614 gen_cfg.clk_div = 100000000 / (3125000 * 8) - 1; 753 break;
615 break;
616 754
617 } 755 }
618 } 756 }
@@ -625,46 +763,60 @@ static int sync_serial_ioctl(struct inode *inode, struct file *file,
625 case MASTER_OUTPUT: 763 case MASTER_OUTPUT:
626 port->output = 1; 764 port->output = 1;
627 port->input = 0; 765 port->input = 0;
766 frm_cfg.out_on = regk_sser_tr;
767 frm_cfg.frame_pin_dir = regk_sser_out;
628 gen_cfg.clk_dir = regk_sser_out; 768 gen_cfg.clk_dir = regk_sser_out;
629 break; 769 break;
630 case SLAVE_OUTPUT: 770 case SLAVE_OUTPUT:
631 port->output = 1; 771 port->output = 1;
632 port->input = 0; 772 port->input = 0;
773 frm_cfg.frame_pin_dir = regk_sser_in;
633 gen_cfg.clk_dir = regk_sser_in; 774 gen_cfg.clk_dir = regk_sser_in;
634 break; 775 break;
635 case MASTER_INPUT: 776 case MASTER_INPUT:
636 port->output = 0; 777 port->output = 0;
637 port->input = 1; 778 port->input = 1;
779 frm_cfg.frame_pin_dir = regk_sser_out;
780 frm_cfg.out_on = regk_sser_intern_tb;
638 gen_cfg.clk_dir = regk_sser_out; 781 gen_cfg.clk_dir = regk_sser_out;
639 break; 782 break;
640 case SLAVE_INPUT: 783 case SLAVE_INPUT:
641 port->output = 0; 784 port->output = 0;
642 port->input = 1; 785 port->input = 1;
786 frm_cfg.frame_pin_dir = regk_sser_in;
643 gen_cfg.clk_dir = regk_sser_in; 787 gen_cfg.clk_dir = regk_sser_in;
644 break; 788 break;
645 case MASTER_BIDIR: 789 case MASTER_BIDIR:
646 port->output = 1; 790 port->output = 1;
647 port->input = 1; 791 port->input = 1;
792 frm_cfg.frame_pin_dir = regk_sser_out;
793 frm_cfg.out_on = regk_sser_intern_tb;
648 gen_cfg.clk_dir = regk_sser_out; 794 gen_cfg.clk_dir = regk_sser_out;
649 break; 795 break;
650 case SLAVE_BIDIR: 796 case SLAVE_BIDIR:
651 port->output = 1; 797 port->output = 1;
652 port->input = 1; 798 port->input = 1;
799 frm_cfg.frame_pin_dir = regk_sser_in;
653 gen_cfg.clk_dir = regk_sser_in; 800 gen_cfg.clk_dir = regk_sser_in;
654 break; 801 break;
655 default: 802 default:
656 spin_unlock_irq(&port->lock); 803 spin_unlock_irq(&port->lock);
657 return -EINVAL; 804 return -EINVAL;
658
659 } 805 }
660 if (!port->use_dma || (arg == MASTER_OUTPUT || arg == SLAVE_OUTPUT)) 806 if (!port->use_dma || (arg == MASTER_OUTPUT || arg == SLAVE_OUTPUT))
661 intr_mask.rdav = regk_sser_yes; 807 intr_mask.rdav = regk_sser_yes;
662 break; 808 break;
663 case SSP_FRAME_SYNC: 809 case SSP_FRAME_SYNC:
664 if (arg & NORMAL_SYNC) 810 if (arg & NORMAL_SYNC) {
811 frm_cfg.rec_delay = 1;
665 frm_cfg.tr_delay = 1; 812 frm_cfg.tr_delay = 1;
813 }
666 else if (arg & EARLY_SYNC) 814 else if (arg & EARLY_SYNC)
667 frm_cfg.tr_delay = 0; 815 frm_cfg.rec_delay = frm_cfg.tr_delay = 0;
816 else if (arg & SECOND_WORD_SYNC) {
817 frm_cfg.rec_delay = 7;
818 frm_cfg.tr_delay = 1;
819 }
668 820
669 tr_cfg.bulk_wspace = frm_cfg.tr_delay; 821 tr_cfg.bulk_wspace = frm_cfg.tr_delay;
670 frm_cfg.early_wend = regk_sser_yes; 822 frm_cfg.early_wend = regk_sser_yes;
@@ -680,9 +832,11 @@ static int sync_serial_ioctl(struct inode *inode, struct file *file,
680 else if (arg & SYNC_OFF) 832 else if (arg & SYNC_OFF)
681 frm_cfg.frame_pin_use = regk_sser_gio0; 833 frm_cfg.frame_pin_use = regk_sser_gio0;
682 834
683 if (arg & WORD_SIZE_8) 835 dma_w_size = regk_dma_set_w_size2;
836 if (arg & WORD_SIZE_8) {
684 rec_cfg.sample_size = tr_cfg.sample_size = 7; 837 rec_cfg.sample_size = tr_cfg.sample_size = 7;
685 else if (arg & WORD_SIZE_12) 838 dma_w_size = regk_dma_set_w_size1;
839 } else if (arg & WORD_SIZE_12)
686 rec_cfg.sample_size = tr_cfg.sample_size = 11; 840 rec_cfg.sample_size = tr_cfg.sample_size = 11;
687 else if (arg & WORD_SIZE_16) 841 else if (arg & WORD_SIZE_16)
688 rec_cfg.sample_size = tr_cfg.sample_size = 15; 842 rec_cfg.sample_size = tr_cfg.sample_size = 15;
@@ -696,10 +850,13 @@ static int sync_serial_ioctl(struct inode *inode, struct file *file,
696 else if (arg & BIT_ORDER_LSB) 850 else if (arg & BIT_ORDER_LSB)
697 rec_cfg.sh_dir = tr_cfg.sh_dir = regk_sser_lsbfirst; 851 rec_cfg.sh_dir = tr_cfg.sh_dir = regk_sser_lsbfirst;
698 852
699 if (arg & FLOW_CONTROL_ENABLE) 853 if (arg & FLOW_CONTROL_ENABLE) {
854 frm_cfg.status_pin_use = regk_sser_frm;
700 rec_cfg.fifo_thr = regk_sser_thr16; 855 rec_cfg.fifo_thr = regk_sser_thr16;
701 else if (arg & FLOW_CONTROL_DISABLE) 856 } else if (arg & FLOW_CONTROL_DISABLE) {
857 frm_cfg.status_pin_use = regk_sser_gio0;
702 rec_cfg.fifo_thr = regk_sser_inf; 858 rec_cfg.fifo_thr = regk_sser_inf;
859 }
703 860
704 if (arg & CLOCK_NOT_GATED) 861 if (arg & CLOCK_NOT_GATED)
705 gen_cfg.gate_clk = regk_sser_no; 862 gen_cfg.gate_clk = regk_sser_no;
@@ -726,9 +883,9 @@ static int sync_serial_ioctl(struct inode *inode, struct file *file,
726 break; 883 break;
727 case SSP_OPOLARITY: 884 case SSP_OPOLARITY:
728 if (arg & CLOCK_NORMAL) 885 if (arg & CLOCK_NORMAL)
729 gen_cfg.out_clk_pol = regk_sser_neg;
730 else if (arg & CLOCK_INVERT)
731 gen_cfg.out_clk_pol = regk_sser_pos; 886 gen_cfg.out_clk_pol = regk_sser_pos;
887 else if (arg & CLOCK_INVERT)
888 gen_cfg.out_clk_pol = regk_sser_neg;
732 889
733 if (arg & FRAME_NORMAL) 890 if (arg & FRAME_NORMAL)
734 frm_cfg.level = regk_sser_pos_hi; 891 frm_cfg.level = regk_sser_pos_hi;
@@ -770,10 +927,9 @@ static int sync_serial_ioctl(struct inode *inode, struct file *file,
770 } 927 }
771 928
772 929
773 if (port->started) 930 if (port->started) {
774 {
775 tr_cfg.tr_en = port->output;
776 rec_cfg.rec_en = port->input; 931 rec_cfg.rec_en = port->input;
932 gen_cfg.en = (port->output | port->input);
777 } 933 }
778 934
779 REG_WR(sser, port->regi_sser, rw_tr_cfg, tr_cfg); 935 REG_WR(sser, port->regi_sser, rw_tr_cfg, tr_cfg);
@@ -782,138 +938,145 @@ static int sync_serial_ioctl(struct inode *inode, struct file *file,
782 REG_WR(sser, port->regi_sser, rw_intr_mask, intr_mask); 938 REG_WR(sser, port->regi_sser, rw_intr_mask, intr_mask);
783 REG_WR(sser, port->regi_sser, rw_cfg, gen_cfg); 939 REG_WR(sser, port->regi_sser, rw_cfg, gen_cfg);
784 940
941
942 if (cmd == SSP_FRAME_SYNC && (arg & (WORD_SIZE_8 | WORD_SIZE_12 |
943 WORD_SIZE_16 | WORD_SIZE_24 | WORD_SIZE_32))) {
944 int en = gen_cfg.en;
945 gen_cfg.en = 0;
946 REG_WR(sser, port->regi_sser, rw_cfg, gen_cfg);
947 /* ##### Should DMA be stoped before we change dma size? */
948 DMA_WR_CMD(port->regi_dmain, dma_w_size);
949 DMA_WR_CMD(port->regi_dmaout, dma_w_size);
950 gen_cfg.en = en;
951 REG_WR(sser, port->regi_sser, rw_cfg, gen_cfg);
952 }
953
785 spin_unlock_irq(&port->lock); 954 spin_unlock_irq(&port->lock);
786 return return_val; 955 return return_val;
787} 956}
788 957
789static ssize_t sync_serial_write(struct file * file, const char * buf, 958/* NOTE: sync_serial_write does not support concurrency */
790 size_t count, loff_t *ppos) 959static ssize_t sync_serial_write(struct file *file, const char *buf,
960 size_t count, loff_t *ppos)
791{ 961{
792 int dev = iminor(file->f_path.dentry->d_inode); 962 int dev = iminor(file->f_path.dentry->d_inode);
793 DECLARE_WAITQUEUE(wait, current); 963 DECLARE_WAITQUEUE(wait, current);
794 sync_port *port; 964 struct sync_port *port;
795 unsigned long c, c1; 965 int trunc_count;
796 unsigned long free_outp;
797 unsigned long outp;
798 unsigned long out_buffer;
799 unsigned long flags; 966 unsigned long flags;
967 int bytes_free;
968 int out_buf_count;
800 969
801 if (dev < 0 || dev >= NUMBER_OF_PORTS || !ports[dev].enabled) 970 unsigned char *rd_ptr; /* First allocated byte in the buffer */
802 { 971 unsigned char *wr_ptr; /* First free byte in the buffer */
972 unsigned char *buf_stop_ptr; /* Last byte + 1 */
973
974 if (dev < 0 || dev >= NBR_PORTS || !ports[dev].enabled) {
803 DEBUG(printk("Invalid minor %d\n", dev)); 975 DEBUG(printk("Invalid minor %d\n", dev));
804 return -ENODEV; 976 return -ENODEV;
805 } 977 }
806 port = &ports[dev]; 978 port = &ports[dev];
807 979
808 DEBUGWRITE(printk("W d%d c %lu (%d/%d)\n", port->port_nbr, count, port->out_count, OUT_BUFFER_SIZE)); 980 /* |<- OUT_BUFFER_SIZE ->|
809 /* Space to end of buffer */ 981 * |<- out_buf_count ->|
810 /* 982 * |<- trunc_count ->| ...->|
811 * out_buffer <c1>012345<- c ->OUT_BUFFER_SIZE 983 * ______________________________________________________
812 * outp^ +out_count 984 * | free | data | free |
813 ^free_outp 985 * |_________|___________________|________________________|
814 * out_buffer 45<- c ->0123OUT_BUFFER_SIZE 986 * ^ rd_ptr ^ wr_ptr
815 * +out_count outp^
816 * free_outp
817 *
818 */ 987 */
988 DEBUGWRITE(printk(KERN_DEBUG "W d%d c %lu a: %p c: %p\n",
989 port->port_nbr, count, port->active_tr_descr,
990 port->catch_tr_descr));
819 991
820 /* Read variables that may be updated by interrupts */ 992 /* Read variables that may be updated by interrupts */
821 spin_lock_irqsave(&port->lock, flags); 993 spin_lock_irqsave(&port->lock, flags);
822 count = count > OUT_BUFFER_SIZE - port->out_count ? OUT_BUFFER_SIZE - port->out_count : count; 994 rd_ptr = port->out_rd_ptr;
823 outp = (unsigned long)port->outp; 995 out_buf_count = port->out_buf_count;
824 free_outp = outp + port->out_count;
825 spin_unlock_irqrestore(&port->lock, flags); 996 spin_unlock_irqrestore(&port->lock, flags);
826 out_buffer = (unsigned long)port->out_buffer;
827 997
828 /* Find out where and how much to write */ 998 /* Check if resources are available */
829 if (free_outp >= out_buffer + OUT_BUFFER_SIZE) 999 if (port->tr_running &&
830 free_outp -= OUT_BUFFER_SIZE; 1000 ((port->use_dma && port->active_tr_descr == port->catch_tr_descr) ||
831 if (free_outp >= outp) 1001 out_buf_count >= OUT_BUFFER_SIZE)) {
832 c = out_buffer + OUT_BUFFER_SIZE - free_outp; 1002 DEBUGWRITE(printk(KERN_DEBUG "sser%d full\n", dev));
833 else 1003 return -EAGAIN;
834 c = outp - free_outp; 1004 }
835 if (c > count) 1005
836 c = count; 1006 buf_stop_ptr = port->out_buffer + OUT_BUFFER_SIZE;
1007
1008 /* Determine pointer to the first free byte, before copying. */
1009 wr_ptr = rd_ptr + out_buf_count;
1010 if (wr_ptr >= buf_stop_ptr)
1011 wr_ptr -= OUT_BUFFER_SIZE;
837 1012
838// DEBUGWRITE(printk("w op %08lX fop %08lX c %lu\n", outp, free_outp, c)); 1013 /* If we wrap the ring buffer, let the user space program handle it by
839 if (copy_from_user((void*)free_outp, buf, c)) 1014 * truncating the data. This could be more elegant, small buffer
1015 * fragments may occur.
1016 */
1017 bytes_free = OUT_BUFFER_SIZE - out_buf_count;
1018 if (wr_ptr + bytes_free > buf_stop_ptr)
1019 bytes_free = buf_stop_ptr - wr_ptr;
1020 trunc_count = (count < bytes_free) ? count : bytes_free;
1021
1022 if (copy_from_user(wr_ptr, buf, trunc_count))
840 return -EFAULT; 1023 return -EFAULT;
841 1024
842 if (c != count) { 1025 DEBUGOUTBUF(printk(KERN_DEBUG "%-4d + %-4d = %-4d %p %p %p\n",
843 buf += c; 1026 out_buf_count, trunc_count,
844 c1 = count - c; 1027 port->out_buf_count, port->out_buffer,
845 DEBUGWRITE(printk("w2 fi %lu c %lu c1 %lu\n", free_outp-out_buffer, c, c1)); 1028 wr_ptr, buf_stop_ptr));
846 if (copy_from_user((void*)out_buffer, buf, c1))
847 return -EFAULT;
848 }
849 spin_lock_irqsave(&port->lock, flags);
850 port->out_count += count;
851 spin_unlock_irqrestore(&port->lock, flags);
852 1029
853 /* Make sure transmitter/receiver is running */ 1030 /* Make sure transmitter/receiver is running */
854 if (!port->started) 1031 if (!port->started) {
855 {
856 reg_sser_rw_cfg cfg = REG_RD(sser, port->regi_sser, rw_cfg); 1032 reg_sser_rw_cfg cfg = REG_RD(sser, port->regi_sser, rw_cfg);
857 reg_sser_rw_tr_cfg tr_cfg = REG_RD(sser, port->regi_sser, rw_tr_cfg);
858 reg_sser_rw_rec_cfg rec_cfg = REG_RD(sser, port->regi_sser, rw_rec_cfg); 1033 reg_sser_rw_rec_cfg rec_cfg = REG_RD(sser, port->regi_sser, rw_rec_cfg);
859 cfg.en = regk_sser_yes; 1034 cfg.en = regk_sser_yes;
860 tr_cfg.tr_en = port->output;
861 rec_cfg.rec_en = port->input; 1035 rec_cfg.rec_en = port->input;
862 REG_WR(sser, port->regi_sser, rw_cfg, cfg); 1036 REG_WR(sser, port->regi_sser, rw_cfg, cfg);
863 REG_WR(sser, port->regi_sser, rw_tr_cfg, tr_cfg);
864 REG_WR(sser, port->regi_sser, rw_rec_cfg, rec_cfg); 1037 REG_WR(sser, port->regi_sser, rw_rec_cfg, rec_cfg);
865 port->started = 1; 1038 port->started = 1;
866 } 1039 }
867 1040
868 if (file->f_flags & O_NONBLOCK) { 1041 /* Setup wait if blocking */
869 spin_lock_irqsave(&port->lock, flags); 1042 if (!(file->f_flags & O_NONBLOCK)) {
870 if (!port->tr_running) { 1043 add_wait_queue(&port->out_wait_q, &wait);
871 if (!port->use_dma) { 1044 set_current_state(TASK_INTERRUPTIBLE);
872 reg_sser_rw_intr_mask intr_mask;
873 intr_mask = REG_RD(sser, port->regi_sser, rw_intr_mask);
874 /* Start sender by writing data */
875 send_word(port);
876 /* and enable transmitter ready IRQ */
877 intr_mask.trdy = 1;
878 REG_WR(sser, port->regi_sser, rw_intr_mask, intr_mask);
879 } else {
880 start_dma(port, (unsigned char* volatile )port->outp, c);
881 }
882 }
883 spin_unlock_irqrestore(&port->lock, flags);
884 DEBUGWRITE(printk("w d%d c %lu NB\n",
885 port->port_nbr, count));
886 return count;
887 } 1045 }
888 1046
889 /* Sleep until all sent */
890
891 add_wait_queue(&port->out_wait_q, &wait);
892 set_current_state(TASK_INTERRUPTIBLE);
893 spin_lock_irqsave(&port->lock, flags); 1047 spin_lock_irqsave(&port->lock, flags);
894 if (!port->tr_running) { 1048 port->out_buf_count += trunc_count;
895 if (!port->use_dma) { 1049 if (port->use_dma) {
896 reg_sser_rw_intr_mask intr_mask; 1050 start_dma_out(port, wr_ptr, trunc_count);
897 intr_mask = REG_RD(sser, port->regi_sser, rw_intr_mask); 1051 } else if (!port->tr_running) {
898 /* Start sender by writing data */ 1052 reg_sser_rw_intr_mask intr_mask;
899 send_word(port); 1053 intr_mask = REG_RD(sser, port->regi_sser, rw_intr_mask);
900 /* and enable transmitter ready IRQ */ 1054 /* Start sender by writing data */
901 intr_mask.trdy = 1; 1055 send_word(port);
902 REG_WR(sser, port->regi_sser, rw_intr_mask, intr_mask); 1056 /* and enable transmitter ready IRQ */
903 } else { 1057 intr_mask.trdy = 1;
904 start_dma(port, port->outp, c); 1058 REG_WR(sser, port->regi_sser, rw_intr_mask, intr_mask);
905 }
906 } 1059 }
907 spin_unlock_irqrestore(&port->lock, flags); 1060 spin_unlock_irqrestore(&port->lock, flags);
1061
1062 /* Exit if non blocking */
1063 if (file->f_flags & O_NONBLOCK) {
1064 DEBUGWRITE(printk(KERN_DEBUG "w d%d c %lu %08x\n",
1065 port->port_nbr, trunc_count,
1066 REG_RD_INT(dma, port->regi_dmaout, r_intr)));
1067 return trunc_count;
1068 }
1069
908 schedule(); 1070 schedule();
909 set_current_state(TASK_RUNNING); 1071 set_current_state(TASK_RUNNING);
910 remove_wait_queue(&port->out_wait_q, &wait); 1072 remove_wait_queue(&port->out_wait_q, &wait);
1073
911 if (signal_pending(current)) 1074 if (signal_pending(current))
912 {
913 return -EINTR; 1075 return -EINTR;
914 } 1076
915 DEBUGWRITE(printk("w d%d c %lu\n", port->port_nbr, count)); 1077 DEBUGWRITE(printk(KERN_DEBUG "w d%d c %lu\n",
916 return count; 1078 port->port_nbr, trunc_count));
1079 return trunc_count;
917} 1080}
918 1081
919static ssize_t sync_serial_read(struct file * file, char * buf, 1082static ssize_t sync_serial_read(struct file * file, char * buf,
@@ -926,7 +1089,7 @@ static ssize_t sync_serial_read(struct file * file, char * buf,
926 unsigned char* end; 1089 unsigned char* end;
927 unsigned long flags; 1090 unsigned long flags;
928 1091
929 if (dev < 0 || dev >= NUMBER_OF_PORTS || !ports[dev].enabled) 1092 if (dev < 0 || dev >= NBR_PORTS || !ports[dev].enabled)
930 { 1093 {
931 DEBUG(printk("Invalid minor %d\n", dev)); 1094 DEBUG(printk("Invalid minor %d\n", dev));
932 return -ENODEV; 1095 return -ENODEV;
@@ -949,7 +1112,6 @@ static ssize_t sync_serial_read(struct file * file, char * buf,
949 port->started = 1; 1112 port->started = 1;
950 } 1113 }
951 1114
952
953 /* Calculate number of available bytes */ 1115 /* Calculate number of available bytes */
954 /* Save pointers to avoid that they are modified by interrupt */ 1116 /* Save pointers to avoid that they are modified by interrupt */
955 spin_lock_irqsave(&port->lock, flags); 1117 spin_lock_irqsave(&port->lock, flags);
@@ -958,16 +1120,14 @@ static ssize_t sync_serial_read(struct file * file, char * buf,
958 spin_unlock_irqrestore(&port->lock, flags); 1120 spin_unlock_irqrestore(&port->lock, flags);
959 while ((start == end) && !port->full) /* No data */ 1121 while ((start == end) && !port->full) /* No data */
960 { 1122 {
1123 DEBUGREAD(printk(KERN_DEBUG "&"));
961 if (file->f_flags & O_NONBLOCK) 1124 if (file->f_flags & O_NONBLOCK)
962 {
963 return -EAGAIN; 1125 return -EAGAIN;
964 }
965 1126
966 interruptible_sleep_on(&port->in_wait_q); 1127 interruptible_sleep_on(&port->in_wait_q);
967 if (signal_pending(current)) 1128 if (signal_pending(current))
968 {
969 return -EINTR; 1129 return -EINTR;
970 } 1130
971 spin_lock_irqsave(&port->lock, flags); 1131 spin_lock_irqsave(&port->lock, flags);
972 start = (unsigned char*)port->readp; /* cast away volatile */ 1132 start = (unsigned char*)port->readp; /* cast away volatile */
973 end = (unsigned char*)port->writep; /* cast away volatile */ 1133 end = (unsigned char*)port->writep; /* cast away volatile */
@@ -1004,83 +1164,105 @@ static void send_word(sync_port* port)
1004 switch(tr_cfg.sample_size) 1164 switch(tr_cfg.sample_size)
1005 { 1165 {
1006 case 8: 1166 case 8:
1007 port->out_count--; 1167 port->out_buf_count--;
1008 tr_data.data = *port->outp++; 1168 tr_data.data = *port->out_rd_ptr++;
1009 REG_WR(sser, port->regi_sser, rw_tr_data, tr_data); 1169 REG_WR(sser, port->regi_sser, rw_tr_data, tr_data);
1010 if (port->outp >= port->out_buffer + OUT_BUFFER_SIZE) 1170 if (port->out_rd_ptr >= port->out_buffer + OUT_BUFFER_SIZE)
1011 port->outp = port->out_buffer; 1171 port->out_rd_ptr = port->out_buffer;
1012 break; 1172 break;
1013 case 12: 1173 case 12:
1014 { 1174 {
1015 int data = (*port->outp++) << 8; 1175 int data = (*port->out_rd_ptr++) << 8;
1016 data |= *port->outp++; 1176 data |= *port->out_rd_ptr++;
1017 port->out_count-=2; 1177 port->out_buf_count -= 2;
1018 tr_data.data = data; 1178 tr_data.data = data;
1019 REG_WR(sser, port->regi_sser, rw_tr_data, tr_data); 1179 REG_WR(sser, port->regi_sser, rw_tr_data, tr_data);
1020 if (port->outp >= port->out_buffer + OUT_BUFFER_SIZE) 1180 if (port->out_rd_ptr >= port->out_buffer + OUT_BUFFER_SIZE)
1021 port->outp = port->out_buffer; 1181 port->out_rd_ptr = port->out_buffer;
1022 } 1182 }
1023 break; 1183 break;
1024 case 16: 1184 case 16:
1025 port->out_count-=2; 1185 port->out_buf_count -= 2;
1026 tr_data.data = *(unsigned short *)port->outp; 1186 tr_data.data = *(unsigned short *)port->out_rd_ptr;
1027 REG_WR(sser, port->regi_sser, rw_tr_data, tr_data); 1187 REG_WR(sser, port->regi_sser, rw_tr_data, tr_data);
1028 port->outp+=2; 1188 port->out_rd_ptr += 2;
1029 if (port->outp >= port->out_buffer + OUT_BUFFER_SIZE) 1189 if (port->out_rd_ptr >= port->out_buffer + OUT_BUFFER_SIZE)
1030 port->outp = port->out_buffer; 1190 port->out_rd_ptr = port->out_buffer;
1031 break; 1191 break;
1032 case 24: 1192 case 24:
1033 port->out_count-=3; 1193 port->out_buf_count -= 3;
1034 tr_data.data = *(unsigned short *)port->outp; 1194 tr_data.data = *(unsigned short *)port->out_rd_ptr;
1035 REG_WR(sser, port->regi_sser, rw_tr_data, tr_data); 1195 REG_WR(sser, port->regi_sser, rw_tr_data, tr_data);
1036 port->outp+=2; 1196 port->out_rd_ptr += 2;
1037 tr_data.data = *port->outp++; 1197 tr_data.data = *port->out_rd_ptr++;
1038 REG_WR(sser, port->regi_sser, rw_tr_data, tr_data); 1198 REG_WR(sser, port->regi_sser, rw_tr_data, tr_data);
1039 if (port->outp >= port->out_buffer + OUT_BUFFER_SIZE) 1199 if (port->out_rd_ptr >= port->out_buffer + OUT_BUFFER_SIZE)
1040 port->outp = port->out_buffer; 1200 port->out_rd_ptr = port->out_buffer;
1041 break; 1201 break;
1042 case 32: 1202 case 32:
1043 port->out_count-=4; 1203 port->out_buf_count -= 4;
1044 tr_data.data = *(unsigned short *)port->outp; 1204 tr_data.data = *(unsigned short *)port->out_rd_ptr;
1045 REG_WR(sser, port->regi_sser, rw_tr_data, tr_data); 1205 REG_WR(sser, port->regi_sser, rw_tr_data, tr_data);
1046 port->outp+=2; 1206 port->out_rd_ptr += 2;
1047 tr_data.data = *(unsigned short *)port->outp; 1207 tr_data.data = *(unsigned short *)port->out_rd_ptr;
1048 REG_WR(sser, port->regi_sser, rw_tr_data, tr_data); 1208 REG_WR(sser, port->regi_sser, rw_tr_data, tr_data);
1049 port->outp+=2; 1209 port->out_rd_ptr += 2;
1050 if (port->outp >= port->out_buffer + OUT_BUFFER_SIZE) 1210 if (port->out_rd_ptr >= port->out_buffer + OUT_BUFFER_SIZE)
1051 port->outp = port->out_buffer; 1211 port->out_rd_ptr = port->out_buffer;
1052 break; 1212 break;
1053 } 1213 }
1054} 1214}
1055 1215
1056 1216static void start_dma_out(struct sync_port *port,
1057static void start_dma(struct sync_port* port, const char* data, int count) 1217 const char *data, int count)
1058{ 1218{
1059 port->tr_running = 1; 1219 port->active_tr_descr->buf = (char *) virt_to_phys((char *) data);
1060 port->out_descr.buf = (char*)virt_to_phys((char*)data); 1220 port->active_tr_descr->after = port->active_tr_descr->buf + count;
1061 port->out_descr.after = port->out_descr.buf + count; 1221 port->active_tr_descr->intr = 1;
1062 port->out_descr.eol = port->out_descr.intr = 1; 1222
1223 port->active_tr_descr->eol = 1;
1224 port->prev_tr_descr->eol = 0;
1225
1226 DEBUGTRDMA(printk(KERN_DEBUG "Inserting eolr:%p eol@:%p\n",
1227 port->prev_tr_descr, port->active_tr_descr));
1228 port->prev_tr_descr = port->active_tr_descr;
1229 port->active_tr_descr = phys_to_virt((int) port->active_tr_descr->next);
1230
1231 if (!port->tr_running) {
1232 reg_sser_rw_tr_cfg tr_cfg = REG_RD(sser, port->regi_sser,
1233 rw_tr_cfg);
1063 1234
1064 port->out_context.saved_data = (dma_descr_data*)virt_to_phys(&port->out_descr); 1235 port->out_context.next = 0;
1065 port->out_context.saved_data_buf = port->out_descr.buf; 1236 port->out_context.saved_data =
1237 (dma_descr_data *)virt_to_phys(port->prev_tr_descr);
1238 port->out_context.saved_data_buf = port->prev_tr_descr->buf;
1239
1240 DMA_START_CONTEXT(port->regi_dmaout,
1241 virt_to_phys((char *)&port->out_context));
1242
1243 tr_cfg.tr_en = regk_sser_yes;
1244 REG_WR(sser, port->regi_sser, rw_tr_cfg, tr_cfg);
1245 DEBUGTRDMA(printk(KERN_DEBUG "dma s\n"););
1246 } else {
1247 DMA_CONTINUE_DATA(port->regi_dmaout);
1248 DEBUGTRDMA(printk(KERN_DEBUG "dma c\n"););
1249 }
1066 1250
1067 DMA_START_CONTEXT(port->regi_dmaout, virt_to_phys((char*)&port->out_context)); 1251 port->tr_running = 1;
1068 DEBUGTXINT(printk("dma %08lX c %d\n", (unsigned long)data, count));
1069} 1252}
1070 1253
1071static void start_dma_in(sync_port* port) 1254static void start_dma_in(sync_port *port)
1072{ 1255{
1073 int i; 1256 int i;
1074 char* buf; 1257 char *buf;
1075 port->writep = port->flip; 1258 port->writep = port->flip;
1076 1259
1077 if (port->writep > port->flip + port->in_buffer_size) 1260 if (port->writep > port->flip + port->in_buffer_size) {
1078 {
1079 panic("Offset too large in sync serial driver\n"); 1261 panic("Offset too large in sync serial driver\n");
1080 return; 1262 return;
1081 } 1263 }
1082 buf = (char*)virt_to_phys(port->in_buffer); 1264 buf = (char*)virt_to_phys(port->in_buffer);
1083 for (i = 0; i < NUM_IN_DESCR; i++) { 1265 for (i = 0; i < NBR_IN_DESCR; i++) {
1084 port->in_descr[i].buf = buf; 1266 port->in_descr[i].buf = buf;
1085 port->in_descr[i].after = buf + port->inbufchunk; 1267 port->in_descr[i].after = buf + port->inbufchunk;
1086 port->in_descr[i].intr = 1; 1268 port->in_descr[i].intr = 1;
@@ -1092,59 +1274,126 @@ static void start_dma_in(sync_port* port)
1092 port->in_descr[i-1].next = (dma_descr_data*)virt_to_phys(&port->in_descr[0]); 1274 port->in_descr[i-1].next = (dma_descr_data*)virt_to_phys(&port->in_descr[0]);
1093 port->in_descr[i-1].eol = regk_sser_yes; 1275 port->in_descr[i-1].eol = regk_sser_yes;
1094 port->next_rx_desc = &port->in_descr[0]; 1276 port->next_rx_desc = &port->in_descr[0];
1095 port->prev_rx_desc = &port->in_descr[NUM_IN_DESCR - 1]; 1277 port->prev_rx_desc = &port->in_descr[NBR_IN_DESCR - 1];
1096 port->in_context.saved_data = (dma_descr_data*)virt_to_phys(&port->in_descr[0]); 1278 port->in_context.saved_data = (dma_descr_data*)virt_to_phys(&port->in_descr[0]);
1097 port->in_context.saved_data_buf = port->in_descr[0].buf; 1279 port->in_context.saved_data_buf = port->in_descr[0].buf;
1098 DMA_START_CONTEXT(port->regi_dmain, virt_to_phys(&port->in_context)); 1280 DMA_START_CONTEXT(port->regi_dmain, virt_to_phys(&port->in_context));
1099} 1281}
1100 1282
1101#ifdef SYNC_SER_DMA 1283#ifdef SYNC_SER_DMA
1102static irqreturn_t tr_interrupt(int irq, void *dev_id, struct pt_regs * regs) 1284static irqreturn_t tr_interrupt(int irq, void *dev_id)
1103{ 1285{
1104 reg_dma_r_masked_intr masked; 1286 reg_dma_r_masked_intr masked;
1105 reg_dma_rw_ack_intr ack_intr = {.data = regk_dma_yes}; 1287 reg_dma_rw_ack_intr ack_intr = {.data = regk_dma_yes};
1288 reg_dma_rw_stat stat;
1106 int i; 1289 int i;
1107 struct dma_descr_data *descr;
1108 unsigned int sentl;
1109 int found = 0; 1290 int found = 0;
1291 int stop_sser = 0;
1110 1292
1111 for (i = 0; i < NUMBER_OF_PORTS; i++) 1293 for (i = 0; i < NBR_PORTS; i++) {
1112 {
1113 sync_port *port = &ports[i]; 1294 sync_port *port = &ports[i];
1114 if (!port->enabled || !port->use_dma ) 1295 if (!port->enabled || !port->use_dma)
1115 continue; 1296 continue;
1116 1297
1298 /* IRQ active for the port? */
1117 masked = REG_RD(dma, port->regi_dmaout, r_masked_intr); 1299 masked = REG_RD(dma, port->regi_dmaout, r_masked_intr);
1300 if (!masked.data)
1301 continue;
1118 1302
1119 if (masked.data) /* IRQ active for the port? */ 1303 found = 1;
1120 { 1304
1121 found = 1; 1305 /* Check if we should stop the DMA transfer */
1122 /* Clear IRQ */ 1306 stat = REG_RD(dma, port->regi_dmaout, rw_stat);
1123 REG_WR(dma, port->regi_dmaout, rw_ack_intr, ack_intr); 1307 if (stat.list_state == regk_dma_data_at_eol)
1124 descr = &port->out_descr; 1308 stop_sser = 1;
1125 sentl = descr->after - descr->buf; 1309
1126 port->out_count -= sentl; 1310 /* Clear IRQ */
1127 port->outp += sentl; 1311 REG_WR(dma, port->regi_dmaout, rw_ack_intr, ack_intr);
1128 if (port->outp >= port->out_buffer + OUT_BUFFER_SIZE) 1312
1129 port->outp = port->out_buffer; 1313 if (!stop_sser) {
1130 if (port->out_count) { 1314 /* The DMA has completed a descriptor, EOL was not
1131 int c; 1315 * encountered, so step relevant descriptor and
1132 c = port->out_buffer + OUT_BUFFER_SIZE - port->outp; 1316 * datapointers forward. */
1133 if (c > port->out_count) 1317 int sent;
1134 c = port->out_count; 1318 sent = port->catch_tr_descr->after -
1135 DEBUGTXINT(printk("tx_int DMAWRITE %i %i\n", sentl, c)); 1319 port->catch_tr_descr->buf;
1136 start_dma(port, port->outp, c); 1320 DEBUGTXINT(printk(KERN_DEBUG "%-4d - %-4d = %-4d\t"
1137 } else { 1321 "in descr %p (ac: %p)\n",
1138 DEBUGTXINT(printk("tx_int DMA stop %i\n", sentl)); 1322 port->out_buf_count, sent,
1139 port->tr_running = 0; 1323 port->out_buf_count - sent,
1324 port->catch_tr_descr,
1325 port->active_tr_descr););
1326 port->out_buf_count -= sent;
1327 port->catch_tr_descr =
1328 phys_to_virt((int) port->catch_tr_descr->next);
1329 port->out_rd_ptr =
1330 phys_to_virt((int) port->catch_tr_descr->buf);
1331 } else {
1332 int i, sent;
1333 /* EOL handler.
1334 * Note that if an EOL was encountered during the irq
1335 * locked section of sync_ser_write the DMA will be
1336 * restarted and the eol flag will be cleared.
1337 * The remaining descriptors will be traversed by
1338 * the descriptor interrupts as usual.
1339 */
1340 i = 0;
1341 while (!port->catch_tr_descr->eol) {
1342 sent = port->catch_tr_descr->after -
1343 port->catch_tr_descr->buf;
1344 DEBUGOUTBUF(printk(KERN_DEBUG
1345 "traversing descr %p -%d (%d)\n",
1346 port->catch_tr_descr,
1347 sent,
1348 port->out_buf_count));
1349 port->out_buf_count -= sent;
1350 port->catch_tr_descr = phys_to_virt(
1351 (int)port->catch_tr_descr->next);
1352 i++;
1353 if (i >= NBR_OUT_DESCR) {
1354 /* TODO: Reset and recover */
1355 panic("sync_serial: missing eol");
1356 }
1140 } 1357 }
1141 wake_up_interruptible(&port->out_wait_q); /* wake up the waiting process */ 1358 sent = port->catch_tr_descr->after -
1359 port->catch_tr_descr->buf;
1360 DEBUGOUTBUF(printk(KERN_DEBUG
1361 "eol at descr %p -%d (%d)\n",
1362 port->catch_tr_descr,
1363 sent,
1364 port->out_buf_count));
1365
1366 port->out_buf_count -= sent;
1367
1368 /* Update read pointer to first free byte, we
1369 * may already be writing data there. */
1370 port->out_rd_ptr =
1371 phys_to_virt((int) port->catch_tr_descr->after);
1372 if (port->out_rd_ptr > port->out_buffer +
1373 OUT_BUFFER_SIZE)
1374 port->out_rd_ptr = port->out_buffer;
1375
1376 reg_sser_rw_tr_cfg tr_cfg =
1377 REG_RD(sser, port->regi_sser, rw_tr_cfg);
1378 DEBUGTXINT(printk(KERN_DEBUG
1379 "tr_int DMA stop %d, set catch @ %p\n",
1380 port->out_buf_count,
1381 port->active_tr_descr));
1382 if (port->out_buf_count != 0)
1383 printk(KERN_CRIT "sync_ser: buffer not "
1384 "empty after eol.\n");
1385 port->catch_tr_descr = port->active_tr_descr;
1386 port->tr_running = 0;
1387 tr_cfg.tr_en = regk_sser_no;
1388 REG_WR(sser, port->regi_sser, rw_tr_cfg, tr_cfg);
1142 } 1389 }
1390 /* wake up the waiting process */
1391 wake_up_interruptible(&port->out_wait_q);
1143 } 1392 }
1144 return IRQ_RETVAL(found); 1393 return IRQ_RETVAL(found);
1145} /* tr_interrupt */ 1394} /* tr_interrupt */
1146 1395
1147static irqreturn_t rx_interrupt(int irq, void *dev_id, struct pt_regs * regs) 1396static irqreturn_t rx_interrupt(int irq, void *dev_id)
1148{ 1397{
1149 reg_dma_r_masked_intr masked; 1398 reg_dma_r_masked_intr masked;
1150 reg_dma_rw_ack_intr ack_intr = {.data = regk_dma_yes}; 1399 reg_dma_rw_ack_intr ack_intr = {.data = regk_dma_yes};
@@ -1152,7 +1401,7 @@ static irqreturn_t rx_interrupt(int irq, void *dev_id, struct pt_regs * regs)
1152 int i; 1401 int i;
1153 int found = 0; 1402 int found = 0;
1154 1403
1155 for (i = 0; i < NUMBER_OF_PORTS; i++) 1404 for (i = 0; i < NBR_PORTS; i++)
1156 { 1405 {
1157 sync_port *port = &ports[i]; 1406 sync_port *port = &ports[i];
1158 1407
@@ -1166,7 +1415,7 @@ static irqreturn_t rx_interrupt(int irq, void *dev_id, struct pt_regs * regs)
1166 found = 1; 1415 found = 1;
1167 while (REG_RD(dma, port->regi_dmain, rw_data) != 1416 while (REG_RD(dma, port->regi_dmain, rw_data) !=
1168 virt_to_phys(port->next_rx_desc)) { 1417 virt_to_phys(port->next_rx_desc)) {
1169 1418 DEBUGRXINT(printk(KERN_DEBUG "!"));
1170 if (port->writep + port->inbufchunk > port->flip + port->in_buffer_size) { 1419 if (port->writep + port->inbufchunk > port->flip + port->in_buffer_size) {
1171 int first_size = port->flip + port->in_buffer_size - port->writep; 1420 int first_size = port->flip + port->in_buffer_size - port->writep;
1172 memcpy((char*)port->writep, phys_to_virt((unsigned)port->next_rx_desc->buf), first_size); 1421 memcpy((char*)port->writep, phys_to_virt((unsigned)port->next_rx_desc->buf), first_size);
@@ -1185,11 +1434,16 @@ static irqreturn_t rx_interrupt(int irq, void *dev_id, struct pt_regs * regs)
1185 port->full = 1; 1434 port->full = 1;
1186 } 1435 }
1187 1436
1188 port->next_rx_desc->eol = 0; 1437 port->next_rx_desc->eol = 1;
1189 port->prev_rx_desc->eol = 1; 1438 port->prev_rx_desc->eol = 0;
1190 port->prev_rx_desc = phys_to_virt((unsigned)port->next_rx_desc); 1439 /* Cache bug workaround */
1440 flush_dma_descr(port->prev_rx_desc, 0);
1441 port->prev_rx_desc = port->next_rx_desc;
1191 port->next_rx_desc = phys_to_virt((unsigned)port->next_rx_desc->next); 1442 port->next_rx_desc = phys_to_virt((unsigned)port->next_rx_desc->next);
1192 wake_up_interruptible(&port->in_wait_q); /* wake up the waiting process */ 1443 /* Cache bug workaround */
1444 flush_dma_descr(port->prev_rx_desc, 1);
1445 /* wake up the waiting process */
1446 wake_up_interruptible(&port->in_wait_q);
1193 DMA_CONTINUE(port->regi_dmain); 1447 DMA_CONTINUE(port->regi_dmain);
1194 REG_WR(dma, port->regi_dmain, rw_ack_intr, ack_intr); 1448 REG_WR(dma, port->regi_dmain, rw_ack_intr, ack_intr);
1195 1449
@@ -1201,15 +1455,15 @@ static irqreturn_t rx_interrupt(int irq, void *dev_id, struct pt_regs * regs)
1201#endif /* SYNC_SER_DMA */ 1455#endif /* SYNC_SER_DMA */
1202 1456
1203#ifdef SYNC_SER_MANUAL 1457#ifdef SYNC_SER_MANUAL
1204static irqreturn_t manual_interrupt(int irq, void *dev_id, struct pt_regs * regs) 1458static irqreturn_t manual_interrupt(int irq, void *dev_id)
1205{ 1459{
1206 int i; 1460 int i;
1207 int found = 0; 1461 int found = 0;
1208 reg_sser_r_masked_intr masked; 1462 reg_sser_r_masked_intr masked;
1209 1463
1210 for (i = 0; i < NUMBER_OF_PORTS; i++) 1464 for (i = 0; i < NBR_PORTS; i++)
1211 { 1465 {
1212 sync_port* port = &ports[i]; 1466 sync_port *port = &ports[i];
1213 1467
1214 if (!port->enabled || port->use_dma) 1468 if (!port->enabled || port->use_dma)
1215 { 1469 {
@@ -1263,7 +1517,7 @@ static irqreturn_t manual_interrupt(int irq, void *dev_id, struct pt_regs * regs
1263 if (masked.trdy) /* Transmitter ready? */ 1517 if (masked.trdy) /* Transmitter ready? */
1264 { 1518 {
1265 found = 1; 1519 found = 1;
1266 if (port->out_count > 0) /* More data to send */ 1520 if (port->out_buf_count > 0) /* More data to send */
1267 send_word(port); 1521 send_word(port);
1268 else /* transmission finished */ 1522 else /* transmission finished */
1269 { 1523 {
diff --git a/arch/cris/arch-v32/kernel/Makefile b/arch/cris/arch-v32/kernel/Makefile
index 5d5b613cde8c..993d987b0078 100644
--- a/arch/cris/arch-v32/kernel/Makefile
+++ b/arch/cris/arch-v32/kernel/Makefile
@@ -1,4 +1,3 @@
1# $Id: Makefile,v 1.11 2004/12/17 10:16:13 starvik Exp $
2# 1#
3# Makefile for the linux kernel. 2# Makefile for the linux kernel.
4# 3#
@@ -6,9 +5,9 @@
6extra-y := head.o 5extra-y := head.o
7 6
8 7
9obj-y := entry.o traps.o irq.o debugport.o dma.o pinmux.o \ 8obj-y := entry.o traps.o irq.o debugport.o \
10 process.o ptrace.o setup.o signal.o traps.o time.o \ 9 process.o ptrace.o setup.o signal.o traps.o time.o \
11 arbiter.o io.o 10 cache.o cacheflush.o
12 11
13obj-$(CONFIG_ETRAXFS_SIM) += vcs_hook.o 12obj-$(CONFIG_ETRAXFS_SIM) += vcs_hook.o
14 13
diff --git a/arch/cris/arch-v32/kernel/arbiter.c b/arch/cris/arch-v32/kernel/arbiter.c
deleted file mode 100644
index 420a5312ed03..000000000000
--- a/arch/cris/arch-v32/kernel/arbiter.c
+++ /dev/null
@@ -1,296 +0,0 @@
1/*
2 * Memory arbiter functions. Allocates bandwidth through the
3 * arbiter and sets up arbiter breakpoints.
4 *
5 * The algorithm first assigns slots to the clients that has specified
6 * bandwidth (e.g. ethernet) and then the remaining slots are divided
7 * on all the active clients.
8 *
9 * Copyright (c) 2004, 2005 Axis Communications AB.
10 */
11
12#include <asm/arch/hwregs/reg_map.h>
13#include <asm/arch/hwregs/reg_rdwr.h>
14#include <asm/arch/hwregs/marb_defs.h>
15#include <asm/arch/arbiter.h>
16#include <asm/arch/hwregs/intr_vect.h>
17#include <linux/interrupt.h>
18#include <linux/signal.h>
19#include <linux/errno.h>
20#include <linux/spinlock.h>
21#include <asm/io.h>
22
23struct crisv32_watch_entry
24{
25 unsigned long instance;
26 watch_callback* cb;
27 unsigned long start;
28 unsigned long end;
29 int used;
30};
31
32#define NUMBER_OF_BP 4
33#define NBR_OF_CLIENTS 14
34#define NBR_OF_SLOTS 64
35#define SDRAM_BANDWIDTH 100000000 /* Some kind of expected value */
36#define INTMEM_BANDWIDTH 400000000
37#define NBR_OF_REGIONS 2
38
39static struct crisv32_watch_entry watches[NUMBER_OF_BP] =
40{
41 {regi_marb_bp0},
42 {regi_marb_bp1},
43 {regi_marb_bp2},
44 {regi_marb_bp3}
45};
46
47static int requested_slots[NBR_OF_REGIONS][NBR_OF_CLIENTS];
48static int active_clients[NBR_OF_REGIONS][NBR_OF_CLIENTS];
49static int max_bandwidth[NBR_OF_REGIONS] = {SDRAM_BANDWIDTH, INTMEM_BANDWIDTH};
50
51DEFINE_SPINLOCK(arbiter_lock);
52
53static irqreturn_t
54crisv32_arbiter_irq(int irq, void* dev_id, struct pt_regs* regs);
55
56static void crisv32_arbiter_config(int region)
57{
58 int slot;
59 int client;
60 int interval = 0;
61 int val[NBR_OF_SLOTS];
62
63 for (slot = 0; slot < NBR_OF_SLOTS; slot++)
64 val[slot] = NBR_OF_CLIENTS + 1;
65
66 for (client = 0; client < NBR_OF_CLIENTS; client++)
67 {
68 int pos;
69 if (!requested_slots[region][client])
70 continue;
71 interval = NBR_OF_SLOTS / requested_slots[region][client];
72 pos = 0;
73 while (pos < NBR_OF_SLOTS)
74 {
75 if (val[pos] != NBR_OF_CLIENTS + 1)
76 pos++;
77 else
78 {
79 val[pos] = client;
80 pos += interval;
81 }
82 }
83 }
84
85 client = 0;
86 for (slot = 0; slot < NBR_OF_SLOTS; slot++)
87 {
88 if (val[slot] == NBR_OF_CLIENTS + 1)
89 {
90 int first = client;
91 while(!active_clients[region][client]) {
92 client = (client + 1) % NBR_OF_CLIENTS;
93 if (client == first)
94 break;
95 }
96 val[slot] = client;
97 client = (client + 1) % NBR_OF_CLIENTS;
98 }
99 if (region == EXT_REGION)
100 REG_WR_INT_VECT(marb, regi_marb, rw_ext_slots, slot, val[slot]);
101 else if (region == INT_REGION)
102 REG_WR_INT_VECT(marb, regi_marb, rw_int_slots, slot, val[slot]);
103 }
104}
105
106extern char _stext, _etext;
107
108static void crisv32_arbiter_init(void)
109{
110 static int initialized = 0;
111
112 if (initialized)
113 return;
114
115 initialized = 1;
116
117 /* CPU caches are active. */
118 active_clients[EXT_REGION][10] = active_clients[EXT_REGION][11] = 1;
119 crisv32_arbiter_config(EXT_REGION);
120 crisv32_arbiter_config(INT_REGION);
121
122 if (request_irq(MEMARB_INTR_VECT, crisv32_arbiter_irq, IRQF_DISABLED,
123 "arbiter", NULL))
124 printk(KERN_ERR "Couldn't allocate arbiter IRQ\n");
125
126#ifndef CONFIG_ETRAX_KGDB
127 /* Global watch for writes to kernel text segment. */
128 crisv32_arbiter_watch(virt_to_phys(&_stext), &_etext - &_stext,
129 arbiter_all_clients, arbiter_all_write, NULL);
130#endif
131}
132
133
134
135int crisv32_arbiter_allocate_bandwidth(int client, int region,
136 unsigned long bandwidth)
137{
138 int i;
139 int total_assigned = 0;
140 int total_clients = 0;
141 int req;
142
143 crisv32_arbiter_init();
144
145 for (i = 0; i < NBR_OF_CLIENTS; i++)
146 {
147 total_assigned += requested_slots[region][i];
148 total_clients += active_clients[region][i];
149 }
150 req = NBR_OF_SLOTS / (max_bandwidth[region] / bandwidth);
151
152 if (total_assigned + total_clients + req + 1 > NBR_OF_SLOTS)
153 return -ENOMEM;
154
155 active_clients[region][client] = 1;
156 requested_slots[region][client] = req;
157 crisv32_arbiter_config(region);
158
159 return 0;
160}
161
162int crisv32_arbiter_watch(unsigned long start, unsigned long size,
163 unsigned long clients, unsigned long accesses,
164 watch_callback* cb)
165{
166 int i;
167
168 crisv32_arbiter_init();
169
170 if (start > 0x80000000) {
171 printk("Arbiter: %lX doesn't look like a physical address", start);
172 return -EFAULT;
173 }
174
175 spin_lock(&arbiter_lock);
176
177 for (i = 0; i < NUMBER_OF_BP; i++) {
178 if (!watches[i].used) {
179 reg_marb_rw_intr_mask intr_mask = REG_RD(marb, regi_marb, rw_intr_mask);
180
181 watches[i].used = 1;
182 watches[i].start = start;
183 watches[i].end = start + size;
184 watches[i].cb = cb;
185
186 REG_WR_INT(marb_bp, watches[i].instance, rw_first_addr, watches[i].start);
187 REG_WR_INT(marb_bp, watches[i].instance, rw_last_addr, watches[i].end);
188 REG_WR_INT(marb_bp, watches[i].instance, rw_op, accesses);
189 REG_WR_INT(marb_bp, watches[i].instance, rw_clients, clients);
190
191 if (i == 0)
192 intr_mask.bp0 = regk_marb_yes;
193 else if (i == 1)
194 intr_mask.bp1 = regk_marb_yes;
195 else if (i == 2)
196 intr_mask.bp2 = regk_marb_yes;
197 else if (i == 3)
198 intr_mask.bp3 = regk_marb_yes;
199
200 REG_WR(marb, regi_marb, rw_intr_mask, intr_mask);
201 spin_unlock(&arbiter_lock);
202
203 return i;
204 }
205 }
206 spin_unlock(&arbiter_lock);
207 return -ENOMEM;
208}
209
210int crisv32_arbiter_unwatch(int id)
211{
212 reg_marb_rw_intr_mask intr_mask = REG_RD(marb, regi_marb, rw_intr_mask);
213
214 crisv32_arbiter_init();
215
216 spin_lock(&arbiter_lock);
217
218 if ((id < 0) || (id >= NUMBER_OF_BP) || (!watches[id].used)) {
219 spin_unlock(&arbiter_lock);
220 return -EINVAL;
221 }
222
223 memset(&watches[id], 0, sizeof(struct crisv32_watch_entry));
224
225 if (id == 0)
226 intr_mask.bp0 = regk_marb_no;
227 else if (id == 1)
228 intr_mask.bp2 = regk_marb_no;
229 else if (id == 2)
230 intr_mask.bp2 = regk_marb_no;
231 else if (id == 3)
232 intr_mask.bp3 = regk_marb_no;
233
234 REG_WR(marb, regi_marb, rw_intr_mask, intr_mask);
235
236 spin_unlock(&arbiter_lock);
237 return 0;
238}
239
240extern void show_registers(struct pt_regs *regs);
241
242static irqreturn_t
243crisv32_arbiter_irq(int irq, void* dev_id, struct pt_regs* regs)
244{
245 reg_marb_r_masked_intr masked_intr = REG_RD(marb, regi_marb, r_masked_intr);
246 reg_marb_bp_r_brk_clients r_clients;
247 reg_marb_bp_r_brk_addr r_addr;
248 reg_marb_bp_r_brk_op r_op;
249 reg_marb_bp_r_brk_first_client r_first;
250 reg_marb_bp_r_brk_size r_size;
251 reg_marb_bp_rw_ack ack = {0};
252 reg_marb_rw_ack_intr ack_intr = {.bp0=1,.bp1=1,.bp2=1,.bp3=1};
253 struct crisv32_watch_entry* watch;
254
255 if (masked_intr.bp0) {
256 watch = &watches[0];
257 ack_intr.bp0 = regk_marb_yes;
258 } else if (masked_intr.bp1) {
259 watch = &watches[1];
260 ack_intr.bp1 = regk_marb_yes;
261 } else if (masked_intr.bp2) {
262 watch = &watches[2];
263 ack_intr.bp2 = regk_marb_yes;
264 } else if (masked_intr.bp3) {
265 watch = &watches[3];
266 ack_intr.bp3 = regk_marb_yes;
267 } else {
268 return IRQ_NONE;
269 }
270
271 /* Retrieve all useful information and print it. */
272 r_clients = REG_RD(marb_bp, watch->instance, r_brk_clients);
273 r_addr = REG_RD(marb_bp, watch->instance, r_brk_addr);
274 r_op = REG_RD(marb_bp, watch->instance, r_brk_op);
275 r_first = REG_RD(marb_bp, watch->instance, r_brk_first_client);
276 r_size = REG_RD(marb_bp, watch->instance, r_brk_size);
277
278 printk("Arbiter IRQ\n");
279 printk("Clients %X addr %X op %X first %X size %X\n",
280 REG_TYPE_CONV(int, reg_marb_bp_r_brk_clients, r_clients),
281 REG_TYPE_CONV(int, reg_marb_bp_r_brk_addr, r_addr),
282 REG_TYPE_CONV(int, reg_marb_bp_r_brk_op, r_op),
283 REG_TYPE_CONV(int, reg_marb_bp_r_brk_first_client, r_first),
284 REG_TYPE_CONV(int, reg_marb_bp_r_brk_size, r_size));
285
286 REG_WR(marb_bp, watch->instance, rw_ack, ack);
287 REG_WR(marb, regi_marb, rw_ack_intr, ack_intr);
288
289 printk("IRQ occured at %lX\n", regs->erp);
290
291 if (watch->cb)
292 watch->cb();
293
294
295 return IRQ_HANDLED;
296}
diff --git a/arch/cris/arch-v32/kernel/crisksyms.c b/arch/cris/arch-v32/kernel/crisksyms.c
index e513da711245..77d02c15a7fc 100644
--- a/arch/cris/arch-v32/kernel/crisksyms.c
+++ b/arch/cris/arch-v32/kernel/crisksyms.c
@@ -2,7 +2,8 @@
2#include <linux/irq.h> 2#include <linux/irq.h>
3#include <asm/arch/dma.h> 3#include <asm/arch/dma.h>
4#include <asm/arch/intmem.h> 4#include <asm/arch/intmem.h>
5#include <asm/arch/pinmux.h> 5#include <asm/arch/mach/pinmux.h>
6#include <asm/arch/io.h>
6 7
7/* Functions for allocating DMA channels */ 8/* Functions for allocating DMA channels */
8EXPORT_SYMBOL(crisv32_request_dma); 9EXPORT_SYMBOL(crisv32_request_dma);
@@ -16,7 +17,11 @@ EXPORT_SYMBOL(crisv32_intmem_virt_to_phys);
16 17
17/* Functions for handling pinmux */ 18/* Functions for handling pinmux */
18EXPORT_SYMBOL(crisv32_pinmux_alloc); 19EXPORT_SYMBOL(crisv32_pinmux_alloc);
20EXPORT_SYMBOL(crisv32_pinmux_alloc_fixed);
19EXPORT_SYMBOL(crisv32_pinmux_dealloc); 21EXPORT_SYMBOL(crisv32_pinmux_dealloc);
22EXPORT_SYMBOL(crisv32_pinmux_dealloc_fixed);
23EXPORT_SYMBOL(crisv32_io_get_name);
24EXPORT_SYMBOL(crisv32_io_get);
20 25
21/* Functions masking/unmasking interrupts */ 26/* Functions masking/unmasking interrupts */
22EXPORT_SYMBOL(mask_irq); 27EXPORT_SYMBOL(mask_irq);
diff --git a/arch/cris/arch-v32/kernel/debugport.c b/arch/cris/arch-v32/kernel/debugport.c
index d1272ad92153..15af4c293157 100644
--- a/arch/cris/arch-v32/kernel/debugport.c
+++ b/arch/cris/arch-v32/kernel/debugport.c
@@ -4,17 +4,12 @@
4 4
5#include <linux/console.h> 5#include <linux/console.h>
6#include <linux/init.h> 6#include <linux/init.h>
7#include <linux/major.h>
8#include <linux/delay.h>
9#include <linux/tty.h>
10#include <asm/system.h> 7#include <asm/system.h>
11#include <asm/io.h> 8#include <hwregs/reg_rdwr.h>
12#include <asm/arch/hwregs/ser_defs.h> 9#include <hwregs/reg_map.h>
13#include <asm/arch/hwregs/dma_defs.h> 10#include <hwregs/ser_defs.h>
14#include <asm/arch/pinmux.h> 11#include <hwregs/dma_defs.h>
15 12#include <asm/arch/mach/pinmux.h>
16#include <asm/irq.h>
17#include <asm/arch/hwregs/intr_vect_defs.h>
18 13
19struct dbg_port 14struct dbg_port
20{ 15{
@@ -59,45 +54,50 @@ struct dbg_port ports[] =
59 115200, 54 115200,
60 'N', 55 'N',
61 8 56 8
62 } 57 },
58#if CONFIG_ETRAX_SERIAL_PORTS == 5
59 {
60 4,
61 regi_ser4,
62 0,
63 115200,
64 'N',
65 8
66 },
67#endif
63}; 68};
64static struct dbg_port *port = 69static struct dbg_port *port =
65#if defined(CONFIG_ETRAX_DEBUG_PORT0) 70#if defined(CONFIG_ETRAX_DEBUG_PORT0)
66&ports[0]; 71 &ports[0];
67#elif defined(CONFIG_ETRAX_DEBUG_PORT1) 72#elif defined(CONFIG_ETRAX_DEBUG_PORT1)
68&ports[1]; 73 &ports[1];
69#elif defined(CONFIG_ETRAX_DEBUG_PORT2) 74#elif defined(CONFIG_ETRAX_DEBUG_PORT2)
70&ports[2]; 75 &ports[2];
71#elif defined(CONFIG_ETRAX_DEBUG_PORT3) 76#elif defined(CONFIG_ETRAX_DEBUG_PORT3)
72&ports[3]; 77 &ports[3];
78#elif defined(CONFIG_ETRAX_DEBUG_PORT4)
79 &ports[4];
73#else 80#else
74NULL; 81 NULL;
75#endif 82#endif
76 83
77#ifdef CONFIG_ETRAX_KGDB 84#ifdef CONFIG_ETRAX_KGDB
78static struct dbg_port *kgdb_port = 85static struct dbg_port *kgdb_port =
79#if defined(CONFIG_ETRAX_KGDB_PORT0) 86#if defined(CONFIG_ETRAX_KGDB_PORT0)
80&ports[0]; 87 &ports[0];
81#elif defined(CONFIG_ETRAX_KGDB_PORT1) 88#elif defined(CONFIG_ETRAX_KGDB_PORT1)
82&ports[1]; 89 &ports[1];
83#elif defined(CONFIG_ETRAX_KGDB_PORT2) 90#elif defined(CONFIG_ETRAX_KGDB_PORT2)
84&ports[2]; 91 &ports[2];
85#elif defined(CONFIG_ETRAX_KGDB_PORT3) 92#elif defined(CONFIG_ETRAX_KGDB_PORT3)
86&ports[3]; 93 &ports[3];
94#elif defined(CONFIG_ETRAX_KGDB_PORT4)
95 &ports[4];
87#else 96#else
88NULL; 97 NULL;
89#endif 98#endif
90#endif 99#endif
91 100
92#ifdef CONFIG_ETRAXFS_SIM
93extern void print_str( const char *str );
94static char buffer[1024];
95static char msg[] = "Debug: ";
96static int buffer_pos = sizeof(msg) - 1;
97#endif
98
99extern struct tty_driver *serial_driver;
100
101static void 101static void
102start_port(struct dbg_port* p) 102start_port(struct dbg_port* p)
103{ 103{
@@ -114,6 +114,10 @@ start_port(struct dbg_port* p)
114 crisv32_pinmux_alloc_fixed(pinmux_ser2); 114 crisv32_pinmux_alloc_fixed(pinmux_ser2);
115 else if (p->nbr == 3) 115 else if (p->nbr == 3)
116 crisv32_pinmux_alloc_fixed(pinmux_ser3); 116 crisv32_pinmux_alloc_fixed(pinmux_ser3);
117#if CONFIG_ETRAX_SERIAL_PORTS == 5
118 else if (p->nbr == 4)
119 crisv32_pinmux_alloc_fixed(pinmux_ser4);
120#endif
117 121
118 /* Set up serial port registers */ 122 /* Set up serial port registers */
119 reg_ser_rw_tr_ctrl tr_ctrl = {0}; 123 reg_ser_rw_tr_ctrl tr_ctrl = {0};
@@ -156,124 +160,21 @@ start_port(struct dbg_port* p)
156 REG_WR (ser, p->instance, rw_rec_ctrl, rec_ctrl); 160 REG_WR (ser, p->instance, rw_rec_ctrl, rec_ctrl);
157} 161}
158 162
159/* No debug */
160#ifdef CONFIG_ETRAX_DEBUG_PORT_NULL
161
162static void
163console_write(struct console *co, const char *buf, unsigned int len)
164{
165 return;
166}
167
168/* Target debug */
169#elif !defined(CONFIG_ETRAXFS_SIM)
170
171static void
172console_write_direct(struct console *co, const char *buf, unsigned int len)
173{
174 int i;
175 reg_ser_r_stat_din stat;
176 reg_ser_rw_tr_dma_en tr_dma_en, old;
177
178 /* Switch to manual mode */
179 tr_dma_en = old = REG_RD (ser, port->instance, rw_tr_dma_en);
180 if (tr_dma_en.en == regk_ser_yes) {
181 tr_dma_en.en = regk_ser_no;
182 REG_WR(ser, port->instance, rw_tr_dma_en, tr_dma_en);
183 }
184
185 /* Send data */
186 for (i = 0; i < len; i++) {
187 /* LF -> CRLF */
188 if (buf[i] == '\n') {
189 do {
190 stat = REG_RD (ser, port->instance, r_stat_din);
191 } while (!stat.tr_rdy);
192 REG_WR_INT (ser, port->instance, rw_dout, '\r');
193 }
194 /* Wait until transmitter is ready and send.*/
195 do {
196 stat = REG_RD (ser, port->instance, r_stat_din);
197 } while (!stat.tr_rdy);
198 REG_WR_INT (ser, port->instance, rw_dout, buf[i]);
199 }
200
201 /* Restore mode */
202 if (tr_dma_en.en != old.en)
203 REG_WR(ser, port->instance, rw_tr_dma_en, old);
204}
205
206static void
207console_write(struct console *co, const char *buf, unsigned int len)
208{
209 if (!port)
210 return;
211 console_write_direct(co, buf, len);
212}
213
214
215
216#else
217
218/* VCS debug */
219
220static void
221console_write(struct console *co, const char *buf, unsigned int len)
222{
223 char* pos;
224 pos = memchr(buf, '\n', len);
225 if (pos) {
226 int l = ++pos - buf;
227 memcpy(buffer + buffer_pos, buf, l);
228 memcpy(buffer, msg, sizeof(msg) - 1);
229 buffer[buffer_pos + l] = '\0';
230 print_str(buffer);
231 buffer_pos = sizeof(msg) - 1;
232 if (pos - buf != len) {
233 memcpy(buffer + buffer_pos, pos, len - l);
234 buffer_pos += len - l;
235 }
236 } else {
237 memcpy(buffer + buffer_pos, buf, len);
238 buffer_pos += len;
239 }
240}
241
242#endif
243
244int raw_printk(const char *fmt, ...)
245{
246 static char buf[1024];
247 int printed_len;
248 va_list args;
249 va_start(args, fmt);
250 printed_len = vsnprintf(buf, sizeof(buf), fmt, args);
251 va_end(args);
252 console_write(NULL, buf, strlen(buf));
253 return printed_len;
254}
255
256void
257stupid_debug(char* buf)
258{
259 console_write(NULL, buf, strlen(buf));
260}
261
262#ifdef CONFIG_ETRAX_KGDB 163#ifdef CONFIG_ETRAX_KGDB
263/* Use polling to get a single character from the kernel debug port */ 164/* Use polling to get a single character from the kernel debug port */
264int 165int
265getDebugChar(void) 166getDebugChar(void)
266{ 167{
267 reg_ser_rs_status_data stat; 168 reg_ser_rs_stat_din stat;
268 reg_ser_rw_ack_intr ack_intr = { 0 }; 169 reg_ser_rw_ack_intr ack_intr = { 0 };
269 170
270 do { 171 do {
271 stat = REG_RD(ser, kgdb_instance, rs_status_data); 172 stat = REG_RD(ser, kgdb_port->instance, rs_stat_din);
272 } while (!stat.data_avail); 173 } while (!stat.dav);
273 174
274 /* Ack the data_avail interrupt. */ 175 /* Ack the data_avail interrupt. */
275 ack_intr.data_avail = 1; 176 ack_intr.dav = 1;
276 REG_WR(ser, kgdb_instance, rw_ack_intr, ack_intr); 177 REG_WR(ser, kgdb_port->instance, rw_ack_intr, ack_intr);
277 178
278 return stat.data; 179 return stat.data;
279} 180}
@@ -282,173 +183,18 @@ getDebugChar(void)
282void 183void
283putDebugChar(int val) 184putDebugChar(int val)
284{ 185{
285 reg_ser_r_status_data stat; 186 reg_ser_r_stat_din stat;
286 do { 187 do {
287 stat = REG_RD (ser, kgdb_instance, r_status_data); 188 stat = REG_RD(ser, kgdb_port->instance, r_stat_din);
288 } while (!stat.tr_ready); 189 } while (!stat.tr_rdy);
289 REG_WR (ser, kgdb_instance, rw_data_out, REG_TYPE_CONV(reg_ser_rw_data_out, int, val)); 190 REG_WR_INT(ser, kgdb_port->instance, rw_dout, val);
290} 191}
291#endif /* CONFIG_ETRAX_KGDB */ 192#endif /* CONFIG_ETRAX_KGDB */
292 193
293static int __init
294console_setup(struct console *co, char *options)
295{
296 char* s;
297
298 if (options) {
299 port = &ports[co->index];
300 port->baudrate = 115200;
301 port->parity = 'N';
302 port->bits = 8;
303 port->baudrate = simple_strtoul(options, NULL, 10);
304 s = options;
305 while(*s >= '0' && *s <= '9')
306 s++;
307 if (*s) port->parity = *s++;
308 if (*s) port->bits = *s++ - '0';
309 port->started = 0;
310 start_port(port);
311 }
312 return 0;
313}
314
315/* This is a dummy serial device that throws away anything written to it.
316 * This is used when no debug output is wanted.
317 */
318static struct tty_driver dummy_driver;
319
320static int dummy_open(struct tty_struct *tty, struct file * filp)
321{
322 return 0;
323}
324
325static void dummy_close(struct tty_struct *tty, struct file * filp)
326{
327}
328
329static int dummy_write(struct tty_struct * tty,
330 const unsigned char *buf, int count)
331{
332 return count;
333}
334
335static int
336dummy_write_room(struct tty_struct *tty)
337{
338 return 8192;
339}
340
341void __init
342init_dummy_console(void)
343{
344 memset(&dummy_driver, 0, sizeof(struct tty_driver));
345 dummy_driver.driver_name = "serial";
346 dummy_driver.name = "ttyS";
347 dummy_driver.major = TTY_MAJOR;
348 dummy_driver.minor_start = 68;
349 dummy_driver.num = 1; /* etrax100 has 4 serial ports */
350 dummy_driver.type = TTY_DRIVER_TYPE_SERIAL;
351 dummy_driver.subtype = SERIAL_TYPE_NORMAL;
352 dummy_driver.init_termios = tty_std_termios;
353 dummy_driver.init_termios.c_cflag =
354 B115200 | CS8 | CREAD | HUPCL | CLOCAL; /* is normally B9600 default... */
355 dummy_driver.flags = TTY_DRIVER_REAL_RAW | TTY_DRIVER_DYNAMIC_DEV;
356
357 dummy_driver.open = dummy_open;
358 dummy_driver.close = dummy_close;
359 dummy_driver.write = dummy_write;
360 dummy_driver.write_room = dummy_write_room;
361 if (tty_register_driver(&dummy_driver))
362 panic("Couldn't register dummy serial driver\n");
363}
364
365static struct tty_driver*
366crisv32_console_device(struct console* co, int *index)
367{
368 if (port)
369 *index = port->nbr;
370 return port ? serial_driver : &dummy_driver;
371}
372
373static struct console sercons = {
374 name : "ttyS",
375 write: console_write,
376 read : NULL,
377 device : crisv32_console_device,
378 unblank : NULL,
379 setup : console_setup,
380 flags : CON_PRINTBUFFER,
381 index : -1,
382 cflag : 0,
383 next : NULL
384};
385static struct console sercons0 = {
386 name : "ttyS",
387 write: console_write,
388 read : NULL,
389 device : crisv32_console_device,
390 unblank : NULL,
391 setup : console_setup,
392 flags : CON_PRINTBUFFER,
393 index : 0,
394 cflag : 0,
395 next : NULL
396};
397
398static struct console sercons1 = {
399 name : "ttyS",
400 write: console_write,
401 read : NULL,
402 device : crisv32_console_device,
403 unblank : NULL,
404 setup : console_setup,
405 flags : CON_PRINTBUFFER,
406 index : 1,
407 cflag : 0,
408 next : NULL
409};
410static struct console sercons2 = {
411 name : "ttyS",
412 write: console_write,
413 read : NULL,
414 device : crisv32_console_device,
415 unblank : NULL,
416 setup : console_setup,
417 flags : CON_PRINTBUFFER,
418 index : 2,
419 cflag : 0,
420 next : NULL
421};
422static struct console sercons3 = {
423 name : "ttyS",
424 write: console_write,
425 read : NULL,
426 device : crisv32_console_device,
427 unblank : NULL,
428 setup : console_setup,
429 flags : CON_PRINTBUFFER,
430 index : 3,
431 cflag : 0,
432 next : NULL
433};
434
435/* Register console for printk's, etc. */ 194/* Register console for printk's, etc. */
436int __init 195int __init
437init_etrax_debug(void) 196init_etrax_debug(void)
438{ 197{
439 static int first = 1;
440
441 if (!first) {
442 unregister_console(&sercons);
443 register_console(&sercons0);
444 register_console(&sercons1);
445 register_console(&sercons2);
446 register_console(&sercons3);
447 init_dummy_console();
448 return 0;
449 }
450 first = 0;
451 register_console(&sercons);
452 start_port(port); 198 start_port(port);
453 199
454#ifdef CONFIG_ETRAX_KGDB 200#ifdef CONFIG_ETRAX_KGDB
@@ -456,5 +202,3 @@ init_etrax_debug(void)
456#endif /* CONFIG_ETRAX_KGDB */ 202#endif /* CONFIG_ETRAX_KGDB */
457 return 0; 203 return 0;
458} 204}
459
460__initcall(init_etrax_debug);
diff --git a/arch/cris/arch-v32/kernel/entry.S b/arch/cris/arch-v32/kernel/entry.S
index f9d27807b914..eebbaba45430 100644
--- a/arch/cris/arch-v32/kernel/entry.S
+++ b/arch/cris/arch-v32/kernel/entry.S
@@ -10,7 +10,7 @@
10 * after a timer-interrupt and after each system call. 10 * after a timer-interrupt and after each system call.
11 * 11 *
12 * Stack layout in 'ret_from_system_call': 12 * Stack layout in 'ret_from_system_call':
13 * ptrace needs to have all regs on the stack. 13 * ptrace needs to have all regs on the stack.
14 * if the order here is changed, it needs to be 14 * if the order here is changed, it needs to be
15 * updated in fork.c:copy_process, signal.c:do_signal, 15 * updated in fork.c:copy_process, signal.c:do_signal,
16 * ptrace.c and ptrace.h 16 * ptrace.c and ptrace.h
@@ -281,12 +281,10 @@ _work_notifysig:
281 ;; Deal with pending signals and notify-resume requests. 281 ;; Deal with pending signals and notify-resume requests.
282 282
283 addoq +TI_flags, $r0, $acr 283 addoq +TI_flags, $r0, $acr
284 move.d [$acr], $r13 ; The thread_info_flags parameter. 284 move.d [$acr], $r12 ; The thread_info_flags parameter.
285 move.d $r9, $r10 ; do_notify_resume syscall/irq param. 285 move.d $sp, $r11 ; The regs param.
286 moveq 0, $r11 ; oldset param - 0 in this case.
287 move.d $sp, $r12 ; The regs param.
288 jsr do_notify_resume 286 jsr do_notify_resume
289 nop 287 move.d $r9, $r10 ; do_notify_resume syscall/irq param.
290 288
291 ba _Rexit 289 ba _Rexit
292 nop 290 nop
@@ -396,7 +394,7 @@ nmi_interrupt:
396 btstq REG_BIT(intr_vect, r_nmi, watchdog), $r0 394 btstq REG_BIT(intr_vect, r_nmi, watchdog), $r0
397 bpl 1f 395 bpl 1f
398 nop 396 nop
399 jsr handle_watchdog_bite ; In time.c. 397 jsr handle_watchdog_bite ; In time.c.
400 move.d $sp, $r10 ; Pointer to registers 398 move.d $sp, $r10 ; Pointer to registers
4011: btstq REG_BIT(intr_vect, r_nmi, ext), $r0 3991: btstq REG_BIT(intr_vect, r_nmi, ext), $r0
402 bpl 1f 400 bpl 1f
@@ -515,6 +513,13 @@ _ugdb_handle_exception:
515 ba do_sigtrap ; SIGTRAP the offending process. 513 ba do_sigtrap ; SIGTRAP the offending process.
516 move.d [$sp+], $r0 ; Restore R0 in delay slot. 514 move.d [$sp+], $r0 ; Restore R0 in delay slot.
517 515
516 .global kernel_execve
517kernel_execve:
518 move.d __NR_execve, $r9
519 break 13
520 ret
521 nop
522
518 .data 523 .data
519 524
520 .section .rodata,"a" 525 .section .rodata,"a"
@@ -778,21 +783,21 @@ sys_call_table:
778 .long sys_epoll_ctl /* 255 */ 783 .long sys_epoll_ctl /* 255 */
779 .long sys_epoll_wait 784 .long sys_epoll_wait
780 .long sys_remap_file_pages 785 .long sys_remap_file_pages
781 .long sys_set_tid_address 786 .long sys_set_tid_address
782 .long sys_timer_create 787 .long sys_timer_create
783 .long sys_timer_settime /* 260 */ 788 .long sys_timer_settime /* 260 */
784 .long sys_timer_gettime 789 .long sys_timer_gettime
785 .long sys_timer_getoverrun 790 .long sys_timer_getoverrun
786 .long sys_timer_delete 791 .long sys_timer_delete
787 .long sys_clock_settime 792 .long sys_clock_settime
788 .long sys_clock_gettime /* 265 */ 793 .long sys_clock_gettime /* 265 */
789 .long sys_clock_getres 794 .long sys_clock_getres
790 .long sys_clock_nanosleep 795 .long sys_clock_nanosleep
791 .long sys_statfs64 796 .long sys_statfs64
792 .long sys_fstatfs64 797 .long sys_fstatfs64
793 .long sys_tgkill /* 270 */ 798 .long sys_tgkill /* 270 */
794 .long sys_utimes 799 .long sys_utimes
795 .long sys_fadvise64_64 800 .long sys_fadvise64_64
796 .long sys_ni_syscall /* sys_vserver */ 801 .long sys_ni_syscall /* sys_vserver */
797 .long sys_ni_syscall /* sys_mbind */ 802 .long sys_ni_syscall /* sys_mbind */
798 .long sys_ni_syscall /* 275 sys_get_mempolicy */ 803 .long sys_ni_syscall /* 275 sys_get_mempolicy */
@@ -805,6 +810,48 @@ sys_call_table:
805 .long sys_mq_getsetattr 810 .long sys_mq_getsetattr
806 .long sys_ni_syscall /* reserved for kexec */ 811 .long sys_ni_syscall /* reserved for kexec */
807 .long sys_waitid 812 .long sys_waitid
813 .long sys_ni_syscall /* 285 */ /* available */
814 .long sys_add_key
815 .long sys_request_key
816 .long sys_keyctl
817 .long sys_ioprio_set
818 .long sys_ioprio_get /* 290 */
819 .long sys_inotify_init
820 .long sys_inotify_add_watch
821 .long sys_inotify_rm_watch
822 .long sys_migrate_pages
823 .long sys_openat /* 295 */
824 .long sys_mkdirat
825 .long sys_mknodat
826 .long sys_fchownat
827 .long sys_futimesat
828 .long sys_fstatat64 /* 300 */
829 .long sys_unlinkat
830 .long sys_renameat
831 .long sys_linkat
832 .long sys_symlinkat
833 .long sys_readlinkat /* 305 */
834 .long sys_fchmodat
835 .long sys_faccessat
836 .long sys_pselect6
837 .long sys_ppoll
838 .long sys_unshare /* 310 */
839 .long sys_set_robust_list
840 .long sys_get_robust_list
841 .long sys_splice
842 .long sys_sync_file_range
843 .long sys_tee /* 315 */
844 .long sys_vmsplice
845 .long sys_move_pages
846 .long sys_getcpu
847 .long sys_epoll_pwait
848 .long sys_utimensat /* 320 */
849 .long sys_signalfd
850 .long sys_timerfd_create
851 .long sys_eventfd
852 .long sys_fallocate
853 .long sys_timerfd_settime /* 325 */
854 .long sys_timerfd_gettime
808 855
809 /* 856 /*
810 * NOTE!! This doesn't have to be exact - we just have 857 * NOTE!! This doesn't have to be exact - we just have
diff --git a/arch/cris/arch-v32/kernel/fasttimer.c b/arch/cris/arch-v32/kernel/fasttimer.c
index b40551f9f40d..2de9d5849ef0 100644
--- a/arch/cris/arch-v32/kernel/fasttimer.c
+++ b/arch/cris/arch-v32/kernel/fasttimer.c
@@ -1,110 +1,9 @@
1/* $Id: fasttimer.c,v 1.11 2005/01/04 11:15:46 starvik Exp $ 1/*
2 * linux/arch/cris/kernel/fasttimer.c 2 * linux/arch/cris/kernel/fasttimer.c
3 * 3 *
4 * Fast timers for ETRAX FS 4 * Fast timers for ETRAX FS
5 * This may be useful in other OS than Linux so use 2 space indentation...
6 *
7 * $Log: fasttimer.c,v $
8 * Revision 1.11 2005/01/04 11:15:46 starvik
9 * Don't share timer IRQ.
10 *
11 * Revision 1.10 2004/12/07 09:19:38 starvik
12 * Corrected includes.
13 * Use correct interrupt macros.
14 *
15 * Revision 1.9 2004/05/14 10:18:58 starvik
16 * Export fast_timer_list
17 *
18 * Revision 1.8 2004/05/14 07:58:03 starvik
19 * Merge of changes from 2.4
20 *
21 * Revision 1.7 2003/07/10 12:06:14 starvik
22 * Return IRQ_NONE if irq wasn't handled
23 *
24 * Revision 1.6 2003/07/04 08:27:49 starvik
25 * Merge of Linux 2.5.74
26 *
27 * Revision 1.5 2003/06/05 10:16:22 johana
28 * New INTR_VECT macros.
29 *
30 * Revision 1.4 2003/06/03 08:49:45 johana
31 * Fixed typo.
32 *
33 * Revision 1.3 2003/06/02 12:51:27 johana
34 * Now compiles.
35 * Commented some include files that probably can be removed.
36 *
37 * Revision 1.2 2003/06/02 12:09:41 johana
38 * Ported to ETRAX FS using the trig interrupt instead of timer1.
39 *
40 * Revision 1.3 2002/12/12 08:26:32 starvik
41 * Don't use C-comments inside CVS comments
42 *
43 * Revision 1.2 2002/12/11 15:42:02 starvik
44 * Extracted v10 (ETRAX 100LX) specific stuff from arch/cris/kernel/
45 *
46 * Revision 1.1 2002/11/18 07:58:06 starvik
47 * Fast timers (from Linux 2.4)
48 *
49 * Revision 1.5 2002/10/15 06:21:39 starvik
50 * Added call to init_waitqueue_head
51 * 5 *
52 * Revision 1.4 2002/05/28 17:47:59 johana 6 * Copyright (C) 2000-2006 Axis Communications AB, Lund, Sweden
53 * Added del_fast_timer()
54 *
55 * Revision 1.3 2002/05/28 16:16:07 johana
56 * Handle empty fast_timer_list
57 *
58 * Revision 1.2 2002/05/27 15:38:42 johana
59 * Made it compile without warnings on Linux 2.4.
60 * (includes, wait_queue, PROC_FS and snprintf)
61 *
62 * Revision 1.1 2002/05/27 15:32:25 johana
63 * arch/etrax100/kernel/fasttimer.c v1.8 from the elinux tree.
64 *
65 * Revision 1.8 2001/11/27 13:50:40 pkj
66 * Disable interrupts while stopping the timer and while modifying the
67 * list of active timers in timer1_handler() as it may be interrupted
68 * by other interrupts (e.g., the serial interrupt) which may add fast
69 * timers.
70 *
71 * Revision 1.7 2001/11/22 11:50:32 pkj
72 * * Only store information about the last 16 timers.
73 * * proc_fasttimer_read() now uses an allocated buffer, since it
74 * requires more space than just a page even for only writing the
75 * last 16 timers. The buffer is only allocated on request, so
76 * unless /proc/fasttimer is read, it is never allocated.
77 * * Renamed fast_timer_started to fast_timers_started to match
78 * fast_timers_added and fast_timers_expired.
79 * * Some clean-up.
80 *
81 * Revision 1.6 2000/12/13 14:02:08 johana
82 * Removed volatile for fast_timer_list
83 *
84 * Revision 1.5 2000/12/13 13:55:35 johana
85 * Added DEBUG_LOG, added som cli() and cleanup
86 *
87 * Revision 1.4 2000/12/05 13:48:50 johana
88 * Added range check when writing proc file, modified timer int handling
89 *
90 * Revision 1.3 2000/11/23 10:10:20 johana
91 * More debug/logging possibilities.
92 * Moved GET_JIFFIES_USEC() to timex.h and time.c
93 *
94 * Revision 1.2 2000/11/01 13:41:04 johana
95 * Clean up and bugfixes.
96 * Created new do_gettimeofday_fast() that gets a timeval struct
97 * with time based on jiffies and *R_TIMER0_DATA, uses a table
98 * for fast conversion of timer value to microseconds.
99 * (Much faster the standard do_gettimeofday() and we don't really
100 * want to use the true time - we want the "uptime" so timers don't screw up
101 * when we change the time.
102 * TODO: Add efficient support for continuous timers as well.
103 *
104 * Revision 1.1 2000/10/26 15:49:16 johana
105 * Added fasttimer, highresolution timers.
106 *
107 * Copyright (C) 2000,2001 2002, 2003 Axis Communications AB, Lund, Sweden
108 */ 7 */
109 8
110#include <linux/errno.h> 9#include <linux/errno.h>
@@ -122,9 +21,9 @@
122 21
123#include <linux/version.h> 22#include <linux/version.h>
124 23
125#include <asm/arch/hwregs/reg_map.h> 24#include <hwregs/reg_map.h>
126#include <asm/arch/hwregs/reg_rdwr.h> 25#include <hwregs/reg_rdwr.h>
127#include <asm/arch/hwregs/timer_defs.h> 26#include <hwregs/timer_defs.h>
128#include <asm/fasttimer.h> 27#include <asm/fasttimer.h>
129#include <linux/proc_fs.h> 28#include <linux/proc_fs.h>
130 29
@@ -140,30 +39,25 @@
140 39
141#define DEBUG_LOG_INCLUDED 40#define DEBUG_LOG_INCLUDED
142#define FAST_TIMER_LOG 41#define FAST_TIMER_LOG
143//#define FAST_TIMER_TEST 42/* #define FAST_TIMER_TEST */
144 43
145#define FAST_TIMER_SANITY_CHECKS 44#define FAST_TIMER_SANITY_CHECKS
146 45
147#ifdef FAST_TIMER_SANITY_CHECKS 46#ifdef FAST_TIMER_SANITY_CHECKS
148#define SANITYCHECK(x) x 47static int sanity_failed;
149static int sanity_failed = 0;
150#else
151#define SANITYCHECK(x)
152#endif 48#endif
153 49
154#define D1(x) 50#define D1(x)
155#define D2(x) 51#define D2(x)
156#define DP(x) 52#define DP(x)
157 53
158#define __INLINE__ inline 54static unsigned int fast_timer_running;
159 55static unsigned int fast_timers_added;
160static int fast_timer_running = 0; 56static unsigned int fast_timers_started;
161static int fast_timers_added = 0; 57static unsigned int fast_timers_expired;
162static int fast_timers_started = 0; 58static unsigned int fast_timers_deleted;
163static int fast_timers_expired = 0; 59static unsigned int fast_timer_is_init;
164static int fast_timers_deleted = 0; 60static unsigned int fast_timer_ints;
165static int fast_timer_is_init = 0;
166static int fast_timer_ints = 0;
167 61
168struct fast_timer *fast_timer_list = NULL; 62struct fast_timer *fast_timer_list = NULL;
169 63
@@ -171,8 +65,8 @@ struct fast_timer *fast_timer_list = NULL;
171#define DEBUG_LOG_MAX 128 65#define DEBUG_LOG_MAX 128
172static const char * debug_log_string[DEBUG_LOG_MAX]; 66static const char * debug_log_string[DEBUG_LOG_MAX];
173static unsigned long debug_log_value[DEBUG_LOG_MAX]; 67static unsigned long debug_log_value[DEBUG_LOG_MAX];
174static int debug_log_cnt = 0; 68static unsigned int debug_log_cnt;
175static int debug_log_cnt_wrapped = 0; 69static unsigned int debug_log_cnt_wrapped;
176 70
177#define DEBUG_LOG(string, value) \ 71#define DEBUG_LOG(string, value) \
178{ \ 72{ \
@@ -202,103 +96,92 @@ struct fast_timer timer_expired_log[NUM_TIMER_STATS];
202int timer_div_settings[NUM_TIMER_STATS]; 96int timer_div_settings[NUM_TIMER_STATS];
203int timer_delay_settings[NUM_TIMER_STATS]; 97int timer_delay_settings[NUM_TIMER_STATS];
204 98
99struct work_struct fast_work;
205 100
206static void 101static void
207timer_trig_handler(void); 102timer_trig_handler(struct work_struct *work);
208 103
209 104
210 105
211/* Not true gettimeofday, only checks the jiffies (uptime) + useconds */ 106/* Not true gettimeofday, only checks the jiffies (uptime) + useconds */
212void __INLINE__ do_gettimeofday_fast(struct timeval *tv) 107inline void do_gettimeofday_fast(struct fasttime_t *tv)
213{ 108{
214 unsigned long sec = jiffies; 109 tv->tv_jiff = jiffies;
215 unsigned long usec = GET_JIFFIES_USEC(); 110 tv->tv_usec = GET_JIFFIES_USEC();
216
217 usec += (sec % HZ) * (1000000 / HZ);
218 sec = sec / HZ;
219
220 if (usec > 1000000)
221 {
222 usec -= 1000000;
223 sec++;
224 }
225 tv->tv_sec = sec;
226 tv->tv_usec = usec;
227} 111}
228 112
229int __INLINE__ timeval_cmp(struct timeval *t0, struct timeval *t1) 113inline int fasttime_cmp(struct fasttime_t *t0, struct fasttime_t *t1)
230{ 114{
231 if (t0->tv_sec < t1->tv_sec) 115 /* Compare jiffies. Takes care of wrapping */
232 { 116 if (time_before(t0->tv_jiff, t1->tv_jiff))
233 return -1; 117 return -1;
234 } 118 else if (time_after(t0->tv_jiff, t1->tv_jiff))
235 else if (t0->tv_sec > t1->tv_sec) 119 return 1;
236 { 120
237 return 1; 121 /* Compare us */
238 } 122 if (t0->tv_usec < t1->tv_usec)
239 if (t0->tv_usec < t1->tv_usec) 123 return -1;
240 { 124 else if (t0->tv_usec > t1->tv_usec)
241 return -1; 125 return 1;
242 } 126 return 0;
243 else if (t0->tv_usec > t1->tv_usec)
244 {
245 return 1;
246 }
247 return 0;
248} 127}
249 128
250/* Called with ints off */ 129/* Called with ints off */
251void __INLINE__ start_timer_trig(unsigned long delay_us) 130inline void start_timer_trig(unsigned long delay_us)
252{ 131{
253 reg_timer_rw_ack_intr ack_intr = { 0 }; 132 reg_timer_rw_ack_intr ack_intr = { 0 };
254 reg_timer_rw_intr_mask intr_mask; 133 reg_timer_rw_intr_mask intr_mask;
255 reg_timer_rw_trig trig; 134 reg_timer_rw_trig trig;
256 reg_timer_rw_trig_cfg trig_cfg = { 0 }; 135 reg_timer_rw_trig_cfg trig_cfg = { 0 };
257 reg_timer_r_time r_time; 136 reg_timer_r_time r_time0;
137 reg_timer_r_time r_time1;
138 unsigned char trig_wrap;
139 unsigned char time_wrap;
258 140
259 r_time = REG_RD(timer, regi_timer, r_time); 141 r_time0 = REG_RD(timer, regi_timer0, r_time);
260 142
261 D1(printk("start_timer_trig : %d us freq: %i div: %i\n", 143 D1(printk("start_timer_trig : %d us freq: %i div: %i\n",
262 delay_us, freq_index, div)); 144 delay_us, freq_index, div));
263 /* Clear trig irq */ 145 /* Clear trig irq */
264 intr_mask = REG_RD(timer, regi_timer, rw_intr_mask); 146 intr_mask = REG_RD(timer, regi_timer0, rw_intr_mask);
265 intr_mask.trig = 0; 147 intr_mask.trig = 0;
266 REG_WR(timer, regi_timer, rw_intr_mask, intr_mask); 148 REG_WR(timer, regi_timer0, rw_intr_mask, intr_mask);
267 149
268 /* Set timer values */ 150 /* Set timer values and check if trigger wraps. */
269 /* r_time is 100MHz (10 ns resolution) */ 151 /* r_time is 100MHz (10 ns resolution) */
270 trig = r_time + delay_us*(1000/10); 152 trig_wrap = (trig = r_time0 + delay_us*(1000/10)) < r_time0;
271 153
272 timer_div_settings[fast_timers_started % NUM_TIMER_STATS] = trig; 154 timer_div_settings[fast_timers_started % NUM_TIMER_STATS] = trig;
273 timer_delay_settings[fast_timers_started % NUM_TIMER_STATS] = delay_us; 155 timer_delay_settings[fast_timers_started % NUM_TIMER_STATS] = delay_us;
274 156
275 /* Ack interrupt */ 157 /* Ack interrupt */
276 ack_intr.trig = 1; 158 ack_intr.trig = 1;
277 REG_WR(timer, regi_timer, rw_ack_intr, ack_intr); 159 REG_WR(timer, regi_timer0, rw_ack_intr, ack_intr);
278 160
279 /* Start timer */ 161 /* Start timer */
280 REG_WR(timer, regi_timer, rw_trig, trig); 162 REG_WR(timer, regi_timer0, rw_trig, trig);
281 trig_cfg.tmr = regk_timer_time; 163 trig_cfg.tmr = regk_timer_time;
282 REG_WR(timer, regi_timer, rw_trig_cfg, trig_cfg); 164 REG_WR(timer, regi_timer0, rw_trig_cfg, trig_cfg);
283 165
284 /* Check if we have already passed the trig time */ 166 /* Check if we have already passed the trig time */
285 r_time = REG_RD(timer, regi_timer, r_time); 167 r_time1 = REG_RD(timer, regi_timer0, r_time);
286 if (r_time < trig) { 168 time_wrap = r_time1 < r_time0;
169
170 if ((trig_wrap && !time_wrap) || (r_time1 < trig)) {
287 /* No, Enable trig irq */ 171 /* No, Enable trig irq */
288 intr_mask = REG_RD(timer, regi_timer, rw_intr_mask); 172 intr_mask = REG_RD(timer, regi_timer0, rw_intr_mask);
289 intr_mask.trig = 1; 173 intr_mask.trig = 1;
290 REG_WR(timer, regi_timer, rw_intr_mask, intr_mask); 174 REG_WR(timer, regi_timer0, rw_intr_mask, intr_mask);
291 fast_timers_started++; 175 fast_timers_started++;
292 fast_timer_running = 1; 176 fast_timer_running = 1;
293 } 177 } else {
294 else
295 {
296 /* We have passed the time, disable trig point, ack intr */ 178 /* We have passed the time, disable trig point, ack intr */
297 trig_cfg.tmr = regk_timer_off; 179 trig_cfg.tmr = regk_timer_off;
298 REG_WR(timer, regi_timer, rw_trig_cfg, trig_cfg); 180 REG_WR(timer, regi_timer0, rw_trig_cfg, trig_cfg);
299 REG_WR(timer, regi_timer, rw_ack_intr, ack_intr); 181 REG_WR(timer, regi_timer0, rw_ack_intr, ack_intr);
300 /* call the int routine directly */ 182 /* call the int routine */
301 timer_trig_handler(); 183 INIT_WORK(&fast_work, timer_trig_handler);
184 schedule_work(&fast_work);
302 } 185 }
303 186
304} 187}
@@ -320,22 +203,20 @@ void start_one_shot_timer(struct fast_timer *t,
320 do_gettimeofday_fast(&t->tv_set); 203 do_gettimeofday_fast(&t->tv_set);
321 tmp = fast_timer_list; 204 tmp = fast_timer_list;
322 205
323 SANITYCHECK({ /* Check so this is not in the list already... */ 206#ifdef FAST_TIMER_SANITY_CHECKS
324 while (tmp != NULL) 207 /* Check so this is not in the list already... */
325 { 208 while (tmp != NULL) {
326 if (tmp == t) 209 if (tmp == t) {
327 { 210 printk(KERN_DEBUG
328 printk("timer name: %s data: 0x%08lX already in list!\n", name, data); 211 "timer name: %s data: 0x%08lX already "
329 sanity_failed++; 212 "in list!\n", name, data);
330 return; 213 sanity_failed++;
331 } 214 goto done;
332 else 215 } else
333 { 216 tmp = tmp->next;
334 tmp = tmp->next; 217 }
335 } 218 tmp = fast_timer_list;
336 } 219#endif
337 tmp = fast_timer_list;
338 });
339 220
340 t->delay_us = delay_us; 221 t->delay_us = delay_us;
341 t->function = function; 222 t->function = function;
@@ -343,11 +224,10 @@ void start_one_shot_timer(struct fast_timer *t,
343 t->name = name; 224 t->name = name;
344 225
345 t->tv_expires.tv_usec = t->tv_set.tv_usec + delay_us % 1000000; 226 t->tv_expires.tv_usec = t->tv_set.tv_usec + delay_us % 1000000;
346 t->tv_expires.tv_sec = t->tv_set.tv_sec + delay_us / 1000000; 227 t->tv_expires.tv_jiff = t->tv_set.tv_jiff + delay_us / 1000000 / HZ;
347 if (t->tv_expires.tv_usec > 1000000) 228 if (t->tv_expires.tv_usec > 1000000) {
348 {
349 t->tv_expires.tv_usec -= 1000000; 229 t->tv_expires.tv_usec -= 1000000;
350 t->tv_expires.tv_sec++; 230 t->tv_expires.tv_jiff += HZ;
351 } 231 }
352#ifdef FAST_TIMER_LOG 232#ifdef FAST_TIMER_LOG
353 timer_added_log[fast_timers_added % NUM_TIMER_STATS] = *t; 233 timer_added_log[fast_timers_added % NUM_TIMER_STATS] = *t;
@@ -355,15 +235,12 @@ void start_one_shot_timer(struct fast_timer *t,
355 fast_timers_added++; 235 fast_timers_added++;
356 236
357 /* Check if this should timeout before anything else */ 237 /* Check if this should timeout before anything else */
358 if (tmp == NULL || timeval_cmp(&t->tv_expires, &tmp->tv_expires) < 0) 238 if (tmp == NULL || fasttime_cmp(&t->tv_expires, &tmp->tv_expires) < 0) {
359 {
360 /* Put first in list and modify the timer value */ 239 /* Put first in list and modify the timer value */
361 t->prev = NULL; 240 t->prev = NULL;
362 t->next = fast_timer_list; 241 t->next = fast_timer_list;
363 if (fast_timer_list) 242 if (fast_timer_list)
364 {
365 fast_timer_list->prev = t; 243 fast_timer_list->prev = t;
366 }
367 fast_timer_list = t; 244 fast_timer_list = t;
368#ifdef FAST_TIMER_LOG 245#ifdef FAST_TIMER_LOG
369 timer_started_log[fast_timers_started % NUM_TIMER_STATS] = *t; 246 timer_started_log[fast_timers_started % NUM_TIMER_STATS] = *t;
@@ -372,10 +249,8 @@ void start_one_shot_timer(struct fast_timer *t,
372 } else { 249 } else {
373 /* Put in correct place in list */ 250 /* Put in correct place in list */
374 while (tmp->next && 251 while (tmp->next &&
375 timeval_cmp(&t->tv_expires, &tmp->next->tv_expires) > 0) 252 fasttime_cmp(&t->tv_expires, &tmp->next->tv_expires) > 0)
376 {
377 tmp = tmp->next; 253 tmp = tmp->next;
378 }
379 /* Insert t after tmp */ 254 /* Insert t after tmp */
380 t->prev = tmp; 255 t->prev = tmp;
381 t->next = tmp->next; 256 t->next = tmp->next;
@@ -388,6 +263,7 @@ void start_one_shot_timer(struct fast_timer *t,
388 263
389 D2(printk("start_one_shot_timer: %d us done\n", delay_us)); 264 D2(printk("start_one_shot_timer: %d us done\n", delay_us));
390 265
266done:
391 local_irq_restore(flags); 267 local_irq_restore(flags);
392} /* start_one_shot_timer */ 268} /* start_one_shot_timer */
393 269
@@ -431,19 +307,18 @@ int del_fast_timer(struct fast_timer * t)
431/* Timer interrupt handler for trig interrupts */ 307/* Timer interrupt handler for trig interrupts */
432 308
433static irqreturn_t 309static irqreturn_t
434timer_trig_interrupt(int irq, void *dev_id, struct pt_regs *regs) 310timer_trig_interrupt(int irq, void *dev_id)
435{ 311{
436 reg_timer_r_masked_intr masked_intr; 312 reg_timer_r_masked_intr masked_intr;
437
438 /* Check if the timer interrupt is for us (a trig int) */ 313 /* Check if the timer interrupt is for us (a trig int) */
439 masked_intr = REG_RD(timer, regi_timer, r_masked_intr); 314 masked_intr = REG_RD(timer, regi_timer0, r_masked_intr);
440 if (!masked_intr.trig) 315 if (!masked_intr.trig)
441 return IRQ_NONE; 316 return IRQ_NONE;
442 timer_trig_handler(); 317 timer_trig_handler(NULL);
443 return IRQ_HANDLED; 318 return IRQ_HANDLED;
444} 319}
445 320
446static void timer_trig_handler(void) 321static void timer_trig_handler(struct work_struct *work)
447{ 322{
448 reg_timer_rw_ack_intr ack_intr = { 0 }; 323 reg_timer_rw_ack_intr ack_intr = { 0 };
449 reg_timer_rw_intr_mask intr_mask; 324 reg_timer_rw_intr_mask intr_mask;
@@ -451,38 +326,45 @@ static void timer_trig_handler(void)
451 struct fast_timer *t; 326 struct fast_timer *t;
452 unsigned long flags; 327 unsigned long flags;
453 328
329 /* We keep interrupts disabled not only when we modify the
330 * fast timer list, but any time we hold a reference to a
331 * timer in the list, since del_fast_timer may be called
332 * from (another) interrupt context. Thus, the only time
333 * when interrupts are enabled is when calling the timer
334 * callback function.
335 */
454 local_irq_save(flags); 336 local_irq_save(flags);
455 337
456 /* Clear timer trig interrupt */ 338 /* Clear timer trig interrupt */
457 intr_mask = REG_RD(timer, regi_timer, rw_intr_mask); 339 intr_mask = REG_RD(timer, regi_timer0, rw_intr_mask);
458 intr_mask.trig = 0; 340 intr_mask.trig = 0;
459 REG_WR(timer, regi_timer, rw_intr_mask, intr_mask); 341 REG_WR(timer, regi_timer0, rw_intr_mask, intr_mask);
460 342
461 /* First stop timer, then ack interrupt */ 343 /* First stop timer, then ack interrupt */
462 /* Stop timer */ 344 /* Stop timer */
463 trig_cfg.tmr = regk_timer_off; 345 trig_cfg.tmr = regk_timer_off;
464 REG_WR(timer, regi_timer, rw_trig_cfg, trig_cfg); 346 REG_WR(timer, regi_timer0, rw_trig_cfg, trig_cfg);
465 347
466 /* Ack interrupt */ 348 /* Ack interrupt */
467 ack_intr.trig = 1; 349 ack_intr.trig = 1;
468 REG_WR(timer, regi_timer, rw_ack_intr, ack_intr); 350 REG_WR(timer, regi_timer0, rw_ack_intr, ack_intr);
469 351
470 fast_timer_running = 0; 352 fast_timer_running = 0;
471 fast_timer_ints++; 353 fast_timer_ints++;
472 354
473 local_irq_restore(flags); 355 fast_timer_function_type *f;
356 unsigned long d;
474 357
475 t = fast_timer_list; 358 t = fast_timer_list;
476 while (t) 359 while (t) {
477 { 360 struct fasttime_t tv;
478 struct timeval tv;
479 361
480 /* Has it really expired? */ 362 /* Has it really expired? */
481 do_gettimeofday_fast(&tv); 363 do_gettimeofday_fast(&tv);
482 D1(printk("t: %is %06ius\n", tv.tv_sec, tv.tv_usec)); 364 D1(printk(KERN_DEBUG
365 "t: %is %06ius\n", tv.tv_jiff, tv.tv_usec));
483 366
484 if (timeval_cmp(&t->tv_expires, &tv) <= 0) 367 if (fasttime_cmp(&t->tv_expires, &tv) <= 0) {
485 {
486 /* Yes it has expired */ 368 /* Yes it has expired */
487#ifdef FAST_TIMER_LOG 369#ifdef FAST_TIMER_LOG
488 timer_expired_log[fast_timers_expired % NUM_TIMER_STATS] = *t; 370 timer_expired_log[fast_timers_expired % NUM_TIMER_STATS] = *t;
@@ -490,84 +372,77 @@ static void timer_trig_handler(void)
490 fast_timers_expired++; 372 fast_timers_expired++;
491 373
492 /* Remove this timer before call, since it may reuse the timer */ 374 /* Remove this timer before call, since it may reuse the timer */
493 local_irq_save(flags);
494 if (t->prev) 375 if (t->prev)
495 {
496 t->prev->next = t->next; 376 t->prev->next = t->next;
497 }
498 else 377 else
499 {
500 fast_timer_list = t->next; 378 fast_timer_list = t->next;
501 }
502 if (t->next) 379 if (t->next)
503 {
504 t->next->prev = t->prev; 380 t->next->prev = t->prev;
505 }
506 t->prev = NULL; 381 t->prev = NULL;
507 t->next = NULL; 382 t->next = NULL;
508 local_irq_restore(flags);
509 383
510 if (t->function != NULL) 384 /* Save function callback data before enabling
511 { 385 * interrupts, since the timer may be removed and we
512 t->function(t->data); 386 * don't know how it was allocated (e.g. ->function
513 } 387 * and ->data may become overwritten after deletion
514 else 388 * if the timer was stack-allocated).
515 { 389 */
390 f = t->function;
391 d = t->data;
392
393 if (f != NULL) {
394 /* Run the callback function with interrupts
395 * enabled. */
396 local_irq_restore(flags);
397 f(d);
398 local_irq_save(flags);
399 } else
516 DEBUG_LOG("!trimertrig %i function==NULL!\n", fast_timer_ints); 400 DEBUG_LOG("!trimertrig %i function==NULL!\n", fast_timer_ints);
517 } 401 } else {
518 }
519 else
520 {
521 /* Timer is to early, let's set it again using the normal routines */ 402 /* Timer is to early, let's set it again using the normal routines */
522 D1(printk(".\n")); 403 D1(printk(".\n"));
523 } 404 }
524 405
525 local_irq_save(flags); 406 t = fast_timer_list;
526 if ((t = fast_timer_list) != NULL) 407 if (t != NULL) {
527 {
528 /* Start next timer.. */ 408 /* Start next timer.. */
529 long us; 409 long us = 0;
530 struct timeval tv; 410 struct fasttime_t tv;
531 411
532 do_gettimeofday_fast(&tv); 412 do_gettimeofday_fast(&tv);
533 us = ((t->tv_expires.tv_sec - tv.tv_sec) * 1000000 + 413
534 t->tv_expires.tv_usec - tv.tv_usec); 414 /* time_after_eq takes care of wrapping */
535 if (us > 0) 415 if (time_after_eq(t->tv_expires.tv_jiff, tv.tv_jiff))
536 { 416 us = ((t->tv_expires.tv_jiff - tv.tv_jiff) *
537 if (!fast_timer_running) 417 1000000 / HZ + t->tv_expires.tv_usec -
538 { 418 tv.tv_usec);
419
420 if (us > 0) {
421 if (!fast_timer_running) {
539#ifdef FAST_TIMER_LOG 422#ifdef FAST_TIMER_LOG
540 timer_started_log[fast_timers_started % NUM_TIMER_STATS] = *t; 423 timer_started_log[fast_timers_started % NUM_TIMER_STATS] = *t;
541#endif 424#endif
542 start_timer_trig(us); 425 start_timer_trig(us);
543 } 426 }
544 local_irq_restore(flags);
545 break; 427 break;
546 } 428 } else {
547 else
548 {
549 /* Timer already expired, let's handle it better late than never. 429 /* Timer already expired, let's handle it better late than never.
550 * The normal loop handles it 430 * The normal loop handles it
551 */ 431 */
552 D1(printk("e! %d\n", us)); 432 D1(printk("e! %d\n", us));
553 } 433 }
554 } 434 }
555 local_irq_restore(flags);
556 } 435 }
557 436
558 if (!t) 437 local_irq_restore(flags);
559 { 438
439 if (!t)
560 D1(printk("ttrig stop!\n")); 440 D1(printk("ttrig stop!\n"));
561 }
562} 441}
563 442
564static void wake_up_func(unsigned long data) 443static void wake_up_func(unsigned long data)
565{ 444{
566#ifdef DECLARE_WAITQUEUE
567 wait_queue_head_t *sleep_wait_p = (wait_queue_head_t*)data; 445 wait_queue_head_t *sleep_wait_p = (wait_queue_head_t*)data;
568#else
569 struct wait_queue **sleep_wait_p = (struct wait_queue **)data;
570#endif
571 wake_up(sleep_wait_p); 446 wake_up(sleep_wait_p);
572} 447}
573 448
@@ -577,28 +452,17 @@ static void wake_up_func(unsigned long data)
577void schedule_usleep(unsigned long us) 452void schedule_usleep(unsigned long us)
578{ 453{
579 struct fast_timer t; 454 struct fast_timer t;
580#ifdef DECLARE_WAITQUEUE
581 wait_queue_head_t sleep_wait; 455 wait_queue_head_t sleep_wait;
582 init_waitqueue_head(&sleep_wait); 456 init_waitqueue_head(&sleep_wait);
583 {
584 DECLARE_WAITQUEUE(wait, current);
585#else
586 struct wait_queue *sleep_wait = NULL;
587 struct wait_queue wait = { current, NULL };
588#endif
589 457
590 D1(printk("schedule_usleep(%d)\n", us)); 458 D1(printk("schedule_usleep(%d)\n", us));
591 add_wait_queue(&sleep_wait, &wait);
592 set_current_state(TASK_INTERRUPTIBLE);
593 start_one_shot_timer(&t, wake_up_func, (unsigned long)&sleep_wait, us, 459 start_one_shot_timer(&t, wake_up_func, (unsigned long)&sleep_wait, us,
594 "usleep"); 460 "usleep");
595 schedule(); 461 /* Uninterruptible sleep on the fast timer. (The condition is
596 set_current_state(TASK_RUNNING); 462 * somewhat redundant since the timer is what wakes us up.) */
597 remove_wait_queue(&sleep_wait, &wait); 463 wait_event(sleep_wait, !fast_timer_pending(&t));
464
598 D1(printk("done schedule_usleep(%d)\n", us)); 465 D1(printk("done schedule_usleep(%d)\n", us));
599#ifdef DECLARE_WAITQUEUE
600 }
601#endif
602} 466}
603 467
604#ifdef CONFIG_PROC_FS 468#ifdef CONFIG_PROC_FS
@@ -618,20 +482,22 @@ static int proc_fasttimer_read(char *buf, char **start, off_t offset, int len
618 unsigned long flags; 482 unsigned long flags;
619 int i = 0; 483 int i = 0;
620 int num_to_show; 484 int num_to_show;
621 struct timeval tv; 485 struct fasttime_t tv;
622 struct fast_timer *t, *nextt; 486 struct fast_timer *t, *nextt;
623 static char *bigbuf = NULL; 487 static char *bigbuf = NULL;
624 static unsigned long used; 488 static unsigned long used;
625 489
626 if (!bigbuf && !(bigbuf = vmalloc(BIG_BUF_SIZE))) 490 if (!bigbuf) {
627 { 491 bigbuf = vmalloc(BIG_BUF_SIZE);
628 used = 0; 492 if (!bigbuf) {
629 bigbuf[0] = '\0'; 493 used = 0;
630 return 0; 494 if (buf)
631 } 495 buf[0] = '\0';
632 496 return 0;
633 if (!offset || !used) 497 }
634 { 498 }
499
500 if (!offset || !used) {
635 do_gettimeofday_fast(&tv); 501 do_gettimeofday_fast(&tv);
636 502
637 used = 0; 503 used = 0;
@@ -648,7 +514,7 @@ static int proc_fasttimer_read(char *buf, char **start, off_t offset, int len
648 used += sprintf(bigbuf + used, "Fast timer running: %s\n", 514 used += sprintf(bigbuf + used, "Fast timer running: %s\n",
649 fast_timer_running ? "yes" : "no"); 515 fast_timer_running ? "yes" : "no");
650 used += sprintf(bigbuf + used, "Current time: %lu.%06lu\n", 516 used += sprintf(bigbuf + used, "Current time: %lu.%06lu\n",
651 (unsigned long)tv.tv_sec, 517 (unsigned long)tv.tv_jiff,
652 (unsigned long)tv.tv_usec); 518 (unsigned long)tv.tv_usec);
653#ifdef FAST_TIMER_SANITY_CHECKS 519#ifdef FAST_TIMER_SANITY_CHECKS
654 used += sprintf(bigbuf + used, "Sanity failed: %i\n", 520 used += sprintf(bigbuf + used, "Sanity failed: %i\n",
@@ -661,10 +527,8 @@ static int proc_fasttimer_read(char *buf, char **start, off_t offset, int len
661 int end_i = debug_log_cnt; 527 int end_i = debug_log_cnt;
662 i = 0; 528 i = 0;
663 529
664 if (debug_log_cnt_wrapped) 530 if (debug_log_cnt_wrapped)
665 {
666 i = debug_log_cnt; 531 i = debug_log_cnt;
667 }
668 532
669 while ((i != end_i || (debug_log_cnt_wrapped && !used)) && 533 while ((i != end_i || (debug_log_cnt_wrapped && !used)) &&
670 used+100 < BIG_BUF_SIZE) 534 used+100 < BIG_BUF_SIZE)
@@ -697,9 +561,9 @@ static int proc_fasttimer_read(char *buf, char **start, off_t offset, int len
697 "d: %6li us data: 0x%08lX" 561 "d: %6li us data: 0x%08lX"
698 "\n", 562 "\n",
699 t->name, 563 t->name,
700 (unsigned long)t->tv_set.tv_sec, 564 (unsigned long)t->tv_set.tv_jiff,
701 (unsigned long)t->tv_set.tv_usec, 565 (unsigned long)t->tv_set.tv_usec,
702 (unsigned long)t->tv_expires.tv_sec, 566 (unsigned long)t->tv_expires.tv_jiff,
703 (unsigned long)t->tv_expires.tv_usec, 567 (unsigned long)t->tv_expires.tv_usec,
704 t->delay_us, 568 t->delay_us,
705 t->data 569 t->data
@@ -719,9 +583,9 @@ static int proc_fasttimer_read(char *buf, char **start, off_t offset, int len
719 "d: %6li us data: 0x%08lX" 583 "d: %6li us data: 0x%08lX"
720 "\n", 584 "\n",
721 t->name, 585 t->name,
722 (unsigned long)t->tv_set.tv_sec, 586 (unsigned long)t->tv_set.tv_jiff,
723 (unsigned long)t->tv_set.tv_usec, 587 (unsigned long)t->tv_set.tv_usec,
724 (unsigned long)t->tv_expires.tv_sec, 588 (unsigned long)t->tv_expires.tv_jiff,
725 (unsigned long)t->tv_expires.tv_usec, 589 (unsigned long)t->tv_expires.tv_usec,
726 t->delay_us, 590 t->delay_us,
727 t->data 591 t->data
@@ -739,9 +603,9 @@ static int proc_fasttimer_read(char *buf, char **start, off_t offset, int len
739 "d: %6li us data: 0x%08lX" 603 "d: %6li us data: 0x%08lX"
740 "\n", 604 "\n",
741 t->name, 605 t->name,
742 (unsigned long)t->tv_set.tv_sec, 606 (unsigned long)t->tv_set.tv_jiff,
743 (unsigned long)t->tv_set.tv_usec, 607 (unsigned long)t->tv_set.tv_usec,
744 (unsigned long)t->tv_expires.tv_sec, 608 (unsigned long)t->tv_expires.tv_jiff,
745 (unsigned long)t->tv_expires.tv_usec, 609 (unsigned long)t->tv_expires.tv_usec,
746 t->delay_us, 610 t->delay_us,
747 t->data 611 t->data
@@ -752,26 +616,25 @@ static int proc_fasttimer_read(char *buf, char **start, off_t offset, int len
752 616
753 used += sprintf(bigbuf + used, "Active timers:\n"); 617 used += sprintf(bigbuf + used, "Active timers:\n");
754 local_irq_save(flags); 618 local_irq_save(flags);
755 local_irq_save(flags);
756 t = fast_timer_list; 619 t = fast_timer_list;
757 while (t != NULL && (used+100 < BIG_BUF_SIZE)) 620 while (t != NULL && (used+100 < BIG_BUF_SIZE))
758 { 621 {
759 nextt = t->next; 622 nextt = t->next;
760 local_irq_restore(flags); 623 local_irq_restore(flags);
761 used += sprintf(bigbuf + used, "%-14s s: %6lu.%06lu e: %6lu.%06lu " 624 used += sprintf(bigbuf + used, "%-14s s: %6lu.%06lu e: %6lu.%06lu "
762 "d: %6li us data: 0x%08lX" 625 "d: %6li us data: 0x%08lX"
763/* " func: 0x%08lX" */ 626/* " func: 0x%08lX" */
764 "\n", 627 "\n",
765 t->name, 628 t->name,
766 (unsigned long)t->tv_set.tv_sec, 629 (unsigned long)t->tv_set.tv_jiff,
767 (unsigned long)t->tv_set.tv_usec, 630 (unsigned long)t->tv_set.tv_usec,
768 (unsigned long)t->tv_expires.tv_sec, 631 (unsigned long)t->tv_expires.tv_jiff,
769 (unsigned long)t->tv_expires.tv_usec, 632 (unsigned long)t->tv_expires.tv_usec,
770 t->delay_us, 633 t->delay_us,
771 t->data 634 t->data
772/* , t->function */ 635/* , t->function */
773 ); 636 );
774 local_irq_disable(); 637 local_irq_save(flags);
775 if (t->next != nextt) 638 if (t->next != nextt)
776 { 639 {
777 printk("timer removed!\n"); 640 printk("timer removed!\n");
@@ -800,7 +663,7 @@ static volatile int num_test_timeout = 0;
800static struct fast_timer tr[10]; 663static struct fast_timer tr[10];
801static int exp_num[10]; 664static int exp_num[10];
802 665
803static struct timeval tv_exp[100]; 666static struct fasttime_t tv_exp[100];
804 667
805static void test_timeout(unsigned long data) 668static void test_timeout(unsigned long data)
806{ 669{
@@ -838,7 +701,7 @@ static void fast_timer_test(void)
838 int prev_num; 701 int prev_num;
839 int j; 702 int j;
840 703
841 struct timeval tv, tv0, tv1, tv2; 704 struct fasttime_t tv, tv0, tv1, tv2;
842 705
843 printk("fast_timer_test() start\n"); 706 printk("fast_timer_test() start\n");
844 do_gettimeofday_fast(&tv); 707 do_gettimeofday_fast(&tv);
@@ -851,21 +714,22 @@ static void fast_timer_test(void)
851 { 714 {
852 do_gettimeofday_fast(&tv_exp[j]); 715 do_gettimeofday_fast(&tv_exp[j]);
853 } 716 }
854 printk("fast_timer_test() %is %06i\n", tv.tv_sec, tv.tv_usec); 717 printk(KERN_DEBUG "fast_timer_test() %is %06i\n", tv.tv_jiff, tv.tv_usec);
855 718
856 for (j = 0; j < 1000; j++) 719 for (j = 0; j < 1000; j++)
857 { 720 {
858 printk("%i %i %i %i %i\n",j_u[j], j_u[j+1], j_u[j+2], j_u[j+3], j_u[j+4]); 721 printk(KERN_DEBUG "%i %i %i %i %i\n",
722 j_u[j], j_u[j+1], j_u[j+2], j_u[j+3], j_u[j+4]);
859 j += 4; 723 j += 4;
860 } 724 }
861 for (j = 0; j < 100; j++) 725 for (j = 0; j < 100; j++)
862 { 726 {
863 printk("%i.%i %i.%i %i.%i %i.%i %i.%i\n", 727 printk(KERN_DEBUG "%i.%i %i.%i %i.%i %i.%i %i.%i\n",
864 tv_exp[j].tv_sec,tv_exp[j].tv_usec, 728 tv_exp[j].tv_jiff, tv_exp[j].tv_usec,
865 tv_exp[j+1].tv_sec,tv_exp[j+1].tv_usec, 729 tv_exp[j+1].tv_jiff, tv_exp[j+1].tv_usec,
866 tv_exp[j+2].tv_sec,tv_exp[j+2].tv_usec, 730 tv_exp[j+2].tv_jiff, tv_exp[j+2].tv_usec,
867 tv_exp[j+3].tv_sec,tv_exp[j+3].tv_usec, 731 tv_exp[j+3].tv_jiff, tv_exp[j+3].tv_usec,
868 tv_exp[j+4].tv_sec,tv_exp[j+4].tv_usec); 732 tv_exp[j+4].tv_jiff, tv_exp[j+4].tv_usec);
869 j += 4; 733 j += 4;
870 } 734 }
871 do_gettimeofday_fast(&tv0); 735 do_gettimeofday_fast(&tv0);
@@ -892,14 +756,15 @@ static void fast_timer_test(void)
892 while (num_test_timeout < i) 756 while (num_test_timeout < i)
893 { 757 {
894 if (num_test_timeout != prev_num) 758 if (num_test_timeout != prev_num)
895 {
896 prev_num = num_test_timeout; 759 prev_num = num_test_timeout;
897 }
898 } 760 }
899 do_gettimeofday_fast(&tv2); 761 do_gettimeofday_fast(&tv2);
900 printk("Timers started %is %06i\n", tv0.tv_sec, tv0.tv_usec); 762 printk(KERN_INFO "Timers started %is %06i\n",
901 printk("Timers started at %is %06i\n", tv1.tv_sec, tv1.tv_usec); 763 tv0.tv_jiff, tv0.tv_usec);
902 printk("Timers done %is %06i\n", tv2.tv_sec, tv2.tv_usec); 764 printk(KERN_INFO "Timers started at %is %06i\n",
765 tv1.tv_jiff, tv1.tv_usec);
766 printk(KERN_INFO "Timers done %is %06i\n",
767 tv2.tv_jiff, tv2.tv_usec);
903 DP(printk("buf0:\n"); 768 DP(printk("buf0:\n");
904 printk(buf0); 769 printk(buf0);
905 printk("buf1:\n"); 770 printk("buf1:\n");
@@ -921,9 +786,9 @@ static void fast_timer_test(void)
921 printk("%-10s set: %6is %06ius exp: %6is %06ius " 786 printk("%-10s set: %6is %06ius exp: %6is %06ius "
922 "data: 0x%08X func: 0x%08X\n", 787 "data: 0x%08X func: 0x%08X\n",
923 t->name, 788 t->name,
924 t->tv_set.tv_sec, 789 t->tv_set.tv_jiff,
925 t->tv_set.tv_usec, 790 t->tv_set.tv_usec,
926 t->tv_expires.tv_sec, 791 t->tv_expires.tv_jiff,
927 t->tv_expires.tv_usec, 792 t->tv_expires.tv_usec,
928 t->data, 793 t->data,
929 t->function 794 t->function
@@ -931,10 +796,12 @@ static void fast_timer_test(void)
931 796
932 printk(" del: %6ius did exp: %6is %06ius as #%i error: %6li\n", 797 printk(" del: %6ius did exp: %6is %06ius as #%i error: %6li\n",
933 t->delay_us, 798 t->delay_us,
934 tv_exp[j].tv_sec, 799 tv_exp[j].tv_jiff,
935 tv_exp[j].tv_usec, 800 tv_exp[j].tv_usec,
936 exp_num[j], 801 exp_num[j],
937 (tv_exp[j].tv_sec - t->tv_expires.tv_sec)*1000000 + tv_exp[j].tv_usec - t->tv_expires.tv_usec); 802 (tv_exp[j].tv_jiff - t->tv_expires.tv_jiff) *
803 1000000 + tv_exp[j].tv_usec -
804 t->tv_expires.tv_usec);
938 } 805 }
939 proc_fasttimer_read(buf5, NULL, 0, 0, 0); 806 proc_fasttimer_read(buf5, NULL, 0, 0, 0);
940 printk("buf5 after all done:\n"); 807 printk("buf5 after all done:\n");
@@ -944,7 +811,7 @@ static void fast_timer_test(void)
944#endif 811#endif
945 812
946 813
947void fast_timer_init(void) 814int fast_timer_init(void)
948{ 815{
949 /* For some reason, request_irq() hangs when called froom time_init() */ 816 /* For some reason, request_irq() hangs when called froom time_init() */
950 if (!fast_timer_is_init) 817 if (!fast_timer_is_init)
@@ -952,18 +819,20 @@ void fast_timer_init(void)
952 printk("fast_timer_init()\n"); 819 printk("fast_timer_init()\n");
953 820
954#ifdef CONFIG_PROC_FS 821#ifdef CONFIG_PROC_FS
955 if ((fasttimer_proc_entry = create_proc_entry( "fasttimer", 0, 0 ))) 822 fasttimer_proc_entry = create_proc_entry("fasttimer", 0, 0);
956 fasttimer_proc_entry->read_proc = proc_fasttimer_read; 823 if (fasttimer_proc_entry)
824 fasttimer_proc_entry->read_proc = proc_fasttimer_read;
957#endif /* PROC_FS */ 825#endif /* PROC_FS */
958 if(request_irq(TIMER_INTR_VECT, timer_trig_interrupt, IRQF_DISABLED, 826 if (request_irq(TIMER0_INTR_VECT, timer_trig_interrupt,
959 "fast timer int", NULL)) 827 IRQF_SHARED | IRQF_DISABLED,
960 { 828 "fast timer int", &fast_timer_list))
961 printk("err: timer1 irq\n"); 829 printk(KERN_ERR "err: fasttimer irq\n");
962 }
963 fast_timer_is_init = 1; 830 fast_timer_is_init = 1;
964#ifdef FAST_TIMER_TEST 831#ifdef FAST_TIMER_TEST
965 printk("do test\n"); 832 printk("do test\n");
966 fast_timer_test(); 833 fast_timer_test();
967#endif 834#endif
968 } 835 }
836 return 0;
969} 837}
838__initcall(fast_timer_init);
diff --git a/arch/cris/arch-v32/kernel/head.S b/arch/cris/arch-v32/kernel/head.S
index 20bd80a84e48..2d66a7c320e1 100644
--- a/arch/cris/arch-v32/kernel/head.S
+++ b/arch/cris/arch-v32/kernel/head.S
@@ -4,22 +4,25 @@
4 * Copyright (C) 2003, Axis Communications AB 4 * Copyright (C) 2003, Axis Communications AB
5 */ 5 */
6 6
7
8#define ASSEMBLER_MACROS_ONLY 7#define ASSEMBLER_MACROS_ONLY
9 8
10/* 9/*
11 * The macros found in mmu_defs_asm.h uses the ## concatenation operator, so 10 * The macros found in mmu_defs_asm.h uses the ## concatenation operator, so
12 * -traditional must not be used when assembling this file. 11 * -traditional must not be used when assembling this file.
13 */ 12 */
14#include <asm/arch/hwregs/reg_rdwr.h> 13#include <hwregs/reg_rdwr.h>
15#include <asm/arch/hwregs/asm/mmu_defs_asm.h> 14#include <asm/arch/memmap.h>
16#include <asm/arch/hwregs/asm/reg_map_asm.h> 15#include <hwregs/intr_vect.h>
17#include <asm/arch/hwregs/asm/config_defs_asm.h> 16#include <hwregs/asm/mmu_defs_asm.h>
18#include <asm/arch/hwregs/asm/bif_core_defs_asm.h> 17#include <hwregs/asm/reg_map_asm.h>
18#include <asm/arch/mach/startup.inc>
19 19
20#define CRAMFS_MAGIC 0x28cd3d45 20#define CRAMFS_MAGIC 0x28cd3d45
21#define JHEAD_MAGIC 0x1FF528A6
22#define JHEAD_SIZE 8
21#define RAM_INIT_MAGIC 0x56902387 23#define RAM_INIT_MAGIC 0x56902387
22#define COMMAND_LINE_MAGIC 0x87109563 24#define COMMAND_LINE_MAGIC 0x87109563
25#define NAND_BOOT_MAGIC 0x9a9db001
23 26
24 ;; NOTE: R8 and R9 carry information from the decompressor (if the 27 ;; NOTE: R8 and R9 carry information from the decompressor (if the
25 ;; kernel was compressed). They must not be used in the code below 28 ;; kernel was compressed). They must not be used in the code below
@@ -30,12 +33,11 @@
30 .global romfs_start 33 .global romfs_start
31 .global romfs_length 34 .global romfs_length
32 .global romfs_in_flash 35 .global romfs_in_flash
36 .global nand_boot
33 .global swapper_pg_dir 37 .global swapper_pg_dir
34 .global crisv32_nand_boot
35 .global crisv32_nand_cramfs_offset
36 38
37 ;; Dummy section to make it bootable with current VCS simulator 39 ;; Dummy section to make it bootable with current VCS simulator
38#ifdef CONFIG_ETRAXFS_SIM 40#ifdef CONFIG_ETRAX_VCS_SIM
39 .section ".boot", "ax" 41 .section ".boot", "ax"
40 ba tstart 42 ba tstart
41 nop 43 nop
@@ -51,33 +53,15 @@ tstart:
51 ;; 53 ;;
52 di 54 di
53 55
54 ;; Start clocks for used blocks. 56 START_CLOCKS
55 move.d REG_ADDR(config, regi_config, rw_clk_ctrl), $r1 57
56 move.d [$r1], $r0 58 SETUP_WAIT_STATES
57 or.d REG_STATE(config, rw_clk_ctrl, cpu, yes) | \ 59
58 REG_STATE(config, rw_clk_ctrl, bif, yes) | \ 60 GIO_INIT
59 REG_STATE(config, rw_clk_ctrl, fix_io, yes), $r0 61
60 move.d $r0, [$r1] 62#ifdef CONFIG_SMP
61 63secondary_cpu_entry: /* Entry point for secondary CPUs */
62 ;; Set up waitstates etc 64 di
63 move.d REG_ADDR(bif_core, regi_bif_core, rw_grp1_cfg), $r0
64 move.d CONFIG_ETRAX_MEM_GRP1_CONFIG, $r1
65 move.d $r1, [$r0]
66 move.d REG_ADDR(bif_core, regi_bif_core, rw_grp2_cfg), $r0
67 move.d CONFIG_ETRAX_MEM_GRP2_CONFIG, $r1
68 move.d $r1, [$r0]
69 move.d REG_ADDR(bif_core, regi_bif_core, rw_grp3_cfg), $r0
70 move.d CONFIG_ETRAX_MEM_GRP3_CONFIG, $r1
71 move.d $r1, [$r0]
72 move.d REG_ADDR(bif_core, regi_bif_core, rw_grp4_cfg), $r0
73 move.d CONFIG_ETRAX_MEM_GRP4_CONFIG, $r1
74 move.d $r1, [$r0]
75
76#ifdef CONFIG_ETRAXFS_SIM
77 ;; Set up minimal flash waitstates
78 move.d 0, $r10
79 move.d REG_ADDR(bif_core, regi_bif_core, rw_grp1_cfg), $r11
80 move.d $r10, [$r11]
81#endif 65#endif
82 66
83 ;; Setup and enable the MMU. Use same configuration for both the data 67 ;; Setup and enable the MMU. Use same configuration for both the data
@@ -85,7 +69,7 @@ tstart:
85 ;; 69 ;;
86 ;; Note; 3 cycles is needed for a bank-select to take effect. Further; 70 ;; Note; 3 cycles is needed for a bank-select to take effect. Further;
87 ;; bank 1 is the instruction MMU, bank 2 is the data MMU. 71 ;; bank 1 is the instruction MMU, bank 2 is the data MMU.
88#ifndef CONFIG_ETRAXFS_SIM 72#ifndef CONFIG_ETRAX_VCS_SIM
89 move.d REG_FIELD(mmu, rw_mm_kbase_hi, base_e, 8) \ 73 move.d REG_FIELD(mmu, rw_mm_kbase_hi, base_e, 8) \
90 | REG_FIELD(mmu, rw_mm_kbase_hi, base_c, 4) \ 74 | REG_FIELD(mmu, rw_mm_kbase_hi, base_c, 4) \
91 | REG_FIELD(mmu, rw_mm_kbase_hi, base_b, 0xb), $r0 75 | REG_FIELD(mmu, rw_mm_kbase_hi, base_b, 0xb), $r0
@@ -93,7 +77,7 @@ tstart:
93 ;; Map the virtual DRAM to the RW eprom area at address 0. 77 ;; Map the virtual DRAM to the RW eprom area at address 0.
94 ;; Also map 0xa for the hook calls, 78 ;; Also map 0xa for the hook calls,
95 move.d REG_FIELD(mmu, rw_mm_kbase_hi, base_e, 8) \ 79 move.d REG_FIELD(mmu, rw_mm_kbase_hi, base_e, 8) \
96 | REG_FIELD(mmu, rw_mm_kbase_hi, base_c, 0) \ 80 | REG_FIELD(mmu, rw_mm_kbase_hi, base_c, 4) \
97 | REG_FIELD(mmu, rw_mm_kbase_hi, base_b, 0xb) \ 81 | REG_FIELD(mmu, rw_mm_kbase_hi, base_b, 0xb) \
98 | REG_FIELD(mmu, rw_mm_kbase_hi, base_a, 0xa), $r0 82 | REG_FIELD(mmu, rw_mm_kbase_hi, base_a, 0xa), $r0
99#endif 83#endif
@@ -104,7 +88,7 @@ tstart:
104 88
105 ;; Enable certain page protections and setup linear mapping 89 ;; Enable certain page protections and setup linear mapping
106 ;; for f,e,c,b,4,0. 90 ;; for f,e,c,b,4,0.
107#ifndef CONFIG_ETRAXFS_SIM 91#ifndef CONFIG_ETRAX_VCS_SIM
108 move.d REG_STATE(mmu, rw_mm_cfg, we, on) \ 92 move.d REG_STATE(mmu, rw_mm_cfg, we, on) \
109 | REG_STATE(mmu, rw_mm_cfg, acc, on) \ 93 | REG_STATE(mmu, rw_mm_cfg, acc, on) \
110 | REG_STATE(mmu, rw_mm_cfg, ex, on) \ 94 | REG_STATE(mmu, rw_mm_cfg, ex, on) \
@@ -183,17 +167,11 @@ tstart:
183 nop 167 nop
184 nop 168 nop
185 nop 169 nop
186 move $s10, $r0 170 move $s12, $r0
187 cmpq 0, $r0 171 cmpq 0, $r0
188 beq master_cpu 172 beq master_cpu
189 nop 173 nop
190slave_cpu: 174slave_cpu:
191 ; A slave waits for cpu_now_booting to be equal to CPU ID.
192 move.d cpu_now_booting, $r1
193slave_wait:
194 cmp.d [$r1], $r0
195 bne slave_wait
196 nop
197 ; Time to boot-up. Get stack location provided by master CPU. 175 ; Time to boot-up. Get stack location provided by master CPU.
198 move.d smp_init_current_idle_thread, $r1 176 move.d smp_init_current_idle_thread, $r1
199 move.d [$r1], $sp 177 move.d [$r1], $sp
@@ -203,9 +181,16 @@ slave_wait:
203 jsr smp_callin 181 jsr smp_callin
204 nop 182 nop
205master_cpu: 183master_cpu:
184 /* Set up entry point for secondary CPUs. The boot ROM has set up
185 * EBP at start of internal memory. The CPU will get there
186 * later when we issue an IPI to them... */
187 move.d MEM_INTMEM_START + IPI_INTR_VECT * 4, $r0
188 move.d secondary_cpu_entry, $r1
189 move.d $r1, [$r0]
206#endif 190#endif
207#ifndef CONFIG_ETRAXFS_SIM 191#ifndef CONFIG_ETRAX_VCS_SIM
208 ;; Check if starting from DRAM or flash. 192 ; Check if starting from DRAM (network->RAM boot or unpacked
193 ; compressed kernel), or directly from flash.
209 lapcq ., $r0 194 lapcq ., $r0
210 and.d 0x7fffffff, $r0 ; Mask off the non-cache bit. 195 and.d 0x7fffffff, $r0 ; Mask off the non-cache bit.
211 cmp.d 0x10000, $r0 ; Arbitrary, something above this code. 196 cmp.d 0x10000, $r0 ; Arbitrary, something above this code.
@@ -232,12 +217,13 @@ _inflash:
232 beq _dram_initialized 217 beq _dram_initialized
233 nop 218 nop
234 219
235#include "../lib/dram_init.S" 220#include "../mach/dram_init.S"
236 221
237_dram_initialized: 222_dram_initialized:
238 ;; Copy the text and data section to DRAM. This depends on that the 223 ;; Copy the text and data section to DRAM. This depends on that the
239 ;; variables used below are correctly set up by the linker script. 224 ;; variables used below are correctly set up by the linker script.
240 ;; The calculated value stored in R4 is used below. 225 ;; The calculated value stored in R4 is used below.
226 ;; Leave the cramfs file system (piggybacked after the kernel) in flash.
241 moveq 0, $r0 ; Source. 227 moveq 0, $r0 ; Source.
242 move.d text_start, $r1 ; Destination. 228 move.d text_start, $r1 ; Destination.
243 move.d __vmlinux_end, $r2 229 move.d __vmlinux_end, $r2
@@ -249,7 +235,7 @@ _dram_initialized:
249 blo 1b 235 blo 1b
250 nop 236 nop
251 237
252 ;; Keep CRAMFS in flash. 238 ;; Check for cramfs.
253 moveq 0, $r0 239 moveq 0, $r0
254 move.d romfs_length, $r1 240 move.d romfs_length, $r1
255 move.d $r0, [$r1] 241 move.d $r0, [$r1]
@@ -258,6 +244,7 @@ _dram_initialized:
258 bne 1f 244 bne 1f
259 nop 245 nop
260 246
247 ;; Set length and start of cramfs, set romfs_in_flash flag
261 addoq +4, $r4, $acr 248 addoq +4, $r4, $acr
262 move.d [$acr], $r0 249 move.d [$acr], $r0
263 move.d romfs_length, $r1 250 move.d romfs_length, $r1
@@ -273,35 +260,32 @@ _dram_initialized:
273 nop 260 nop
274 261
275_inram: 262_inram:
276 ;; Check if booting from NAND flash (in that case we just remember the offset 263 ;; Check if booting from NAND flash; if so, set appropriate flags
277 ;; into the flash where cramfs should be). 264 ;; and move on.
278 move.d REG_ADDR(config, regi_config, r_bootsel), $r0 265 cmp.d NAND_BOOT_MAGIC, $r12
279 move.d [$r0], $r0 266 bne move_cramfs ; not nand, jump
280 and.d REG_MASK(config, r_bootsel, boot_mode), $r0
281 cmp.d REG_STATE(config, r_bootsel, boot_mode, nand), $r0
282 bne move_cramfs
283 moveq 1,$r0
284 move.d crisv32_nand_boot, $r1
285 move.d $r0, [$r1]
286 move.d crisv32_nand_cramfs_offset, $r1
287 move.d $r9, [$r1]
288 moveq 1, $r0 267 moveq 1, $r0
289 move.d romfs_in_flash, $r1 268 move.d nand_boot, $r1 ; tell axisflashmap we're booting from NAND
269 move.d $r0, [$r1]
270 moveq 0, $r0 ; tell axisflashmap romfs is not in
271 move.d romfs_in_flash, $r1 ; (directly accessed) flash
290 move.d $r0, [$r1] 272 move.d $r0, [$r1]
291 jump _start_it 273 jump _start_it ; continue with boot
292 nop 274 nop
293 275
294move_cramfs: 276move_cramfs:
295 ;; Move the cramfs after BSS. 277 ;; kernel is in DRAM.
278 ;; Must figure out if there is a piggybacked rootfs image or not.
279 ;; Set romfs_length to 0 => no rootfs image available by default.
296 moveq 0, $r0 280 moveq 0, $r0
297 move.d romfs_length, $r1 281 move.d romfs_length, $r1
298 move.d $r0, [$r1] 282 move.d $r0, [$r1]
299 283
300#ifndef CONFIG_ETRAXFS_SIM 284#ifndef CONFIG_ETRAX_VCS_SIM
301 ;; The kernel could have been unpacked to DRAM by the loader, but 285 ;; The kernel could have been unpacked to DRAM by the loader, but
302 ;; the cramfs image could still be inte the flash immediately 286 ;; the cramfs image could still be in the flash immediately
303 ;; following the compressed kernel image. The loaded passes the address 287 ;; following the compressed kernel image. The loader passes the address
304 ;; of the bute succeeding the last compressed byte in the flash in 288 ;; of the byte succeeding the last compressed byte in the flash in
305 ;; register R9 when starting the kernel. 289 ;; register R9 when starting the kernel.
306 cmp.d 0x0ffffff8, $r9 290 cmp.d 0x0ffffff8, $r9
307 bhs _no_romfs_in_flash ; R9 points outside the flash area. 291 bhs _no_romfs_in_flash ; R9 points outside the flash area.
@@ -310,11 +294,13 @@ move_cramfs:
310 ba _no_romfs_in_flash 294 ba _no_romfs_in_flash
311 nop 295 nop
312#endif 296#endif
297 ;; cramfs rootfs might to be in flash. Check for it.
313 move.d [$r9], $r0 ; cramfs_super.magic 298 move.d [$r9], $r0 ; cramfs_super.magic
314 cmp.d CRAMFS_MAGIC, $r0 299 cmp.d CRAMFS_MAGIC, $r0
315 bne _no_romfs_in_flash 300 bne _no_romfs_in_flash
316 nop 301 nop
317 302
303 ;; found cramfs in flash. set address and size, and romfs_in_flash flag.
318 addoq +4, $r9, $acr 304 addoq +4, $r9, $acr
319 move.d [$acr], $r0 305 move.d [$acr], $r0
320 move.d romfs_length, $r1 306 move.d romfs_length, $r1
@@ -330,27 +316,43 @@ move_cramfs:
330 nop 316 nop
331 317
332_no_romfs_in_flash: 318_no_romfs_in_flash:
333 ;; Look for cramfs. 319 ;; No romfs in flash, so look for cramfs, or jffs2 with jhead,
320 ;; after kernel in RAM, as is the case with network->RAM boot.
321 ;; For cramfs, partition starts with magic and length.
322 ;; For jffs2, a jhead is prepended which contains with magic and length.
323 ;; The jhead is not part of the jffs2 partition however.
334#ifndef CONFIG_ETRAXFS_SIM 324#ifndef CONFIG_ETRAXFS_SIM
335 move.d __vmlinux_end, $r0 325 move.d __vmlinux_end, $r0
336#else 326#else
337 move.d __end, $r0 327 move.d __end, $r0
338#endif 328#endif
339 move.d [$r0], $r1 329 move.d [$r0], $r1
340 cmp.d CRAMFS_MAGIC, $r1 330 cmp.d CRAMFS_MAGIC, $r1 ; cramfs magic?
341 bne 2f 331 beq 2f ; yes, jump
332 nop
333 cmp.d JHEAD_MAGIC, $r1 ; jffs2 (jhead) magic?
334 bne 4f ; no, skip copy
342 nop 335 nop
336 addq 4, $r0 ; location of jffs2 size
337 move.d [$r0+], $r2 ; fetch jffs2 size -> r2
338 ; r0 now points to start of jffs2
339 ba 3f
340 nop
3412:
342 addoq +4, $r0, $acr ; location of cramfs size
343 move.d [$acr], $r2 ; fetch cramfs size -> r2
344 ; r0 still points to start of cramfs
3453:
346 ;; Now, move the root fs to after kernel's BSS
343 347
344 addoq +4, $r0, $acr 348 move.d _end, $r1 ; start of cramfs -> r1
345 move.d [$acr], $r2
346 move.d _end, $r1
347 move.d romfs_start, $r3 349 move.d romfs_start, $r3
348 move.d $r1, [$r3] 350 move.d $r1, [$r3] ; store at romfs_start (for axisflashmap)
349 move.d romfs_length, $r3 351 move.d romfs_length, $r3
350 move.d $r2, [$r3] 352 move.d $r2, [$r3] ; store size at romfs_length
351 353
352#ifndef CONFIG_ETRAXFS_SIM 354#ifndef CONFIG_ETRAX_VCS_SIM
353 add.d $r2, $r0 355 add.d $r2, $r0 ; copy from end and downwards
354 add.d $r2, $r1 356 add.d $r2, $r1
355 357
356 lsrq 1, $r2 ; Size is in bytes, we copy words. 358 lsrq 1, $r2 ; Size is in bytes, we copy words.
@@ -365,10 +367,17 @@ _no_romfs_in_flash:
365 nop 367 nop
366#endif 368#endif
367 369
3682: 3704:
371 ;; BSS move done.
372 ;; Clear romfs_in_flash flag, as we now know romfs is in DRAM
373 ;; Also clear nand_boot flag; if we got here, we know we've not
374 ;; booted from NAND flash.
369 moveq 0, $r0 375 moveq 0, $r0
370 move.d romfs_in_flash, $r1 376 move.d romfs_in_flash, $r1
371 move.d $r0, [$r1] 377 move.d $r0, [$r1]
378 moveq 0, $r0
379 move.d nand_boot, $r1
380 move.d $r0, [$r1]
372 381
373 jump _start_it ; Jump to cached code. 382 jump _start_it ; Jump to cached code.
374 nop 383 nop
@@ -384,8 +393,8 @@ _start_it:
384 move.d cris_command_line, $r10 393 move.d cris_command_line, $r10
385 or.d 0x80000000, $r11 ; Make it virtual 394 or.d 0x80000000, $r11 ; Make it virtual
3861: 3951:
387 move.b [$r11+], $r12 396 move.b [$r11+], $r1
388 move.b $r12, [$r10+] 397 move.b $r1, [$r10+]
389 subq 1, $r13 398 subq 1, $r13
390 bne 1b 399 bne 1b
391 nop 400 nop
@@ -401,7 +410,7 @@ no_command_line:
401 move.d etrax_irv, $r1 ; Set the exception base register and pointer. 410 move.d etrax_irv, $r1 ; Set the exception base register and pointer.
402 move.d $r0, [$r1] 411 move.d $r0, [$r1]
403 412
404#ifndef CONFIG_ETRAXFS_SIM 413#ifndef CONFIG_ETRAX_VCS_SIM
405 ;; Clear the BSS region from _bss_start to _end. 414 ;; Clear the BSS region from _bss_start to _end.
406 move.d __bss_start, $r0 415 move.d __bss_start, $r0
407 move.d _end, $r1 416 move.d _end, $r1
@@ -411,7 +420,7 @@ no_command_line:
411 nop 420 nop
412#endif 421#endif
413 422
414#ifdef CONFIG_ETRAXFS_SIM 423#ifdef CONFIG_ETRAX_VCS_SIM
415 /* Set the watchdog timeout to something big. Will be removed when */ 424 /* Set the watchdog timeout to something big. Will be removed when */
416 /* watchdog can be disabled with command line option */ 425 /* watchdog can be disabled with command line option */
417 move.d 0x7fffffff, $r10 426 move.d 0x7fffffff, $r10
@@ -423,25 +432,44 @@ no_command_line:
423 move.d __bss_start, $r0 432 move.d __bss_start, $r0
424 movem [$r0], $r13 433 movem [$r0], $r13
425 434
435#ifdef CONFIG_ETRAX_L2CACHE
436 jsr l2cache_init
437 nop
438#endif
439
426 jump start_kernel ; Jump to start_kernel() in init/main.c. 440 jump start_kernel ; Jump to start_kernel() in init/main.c.
427 nop 441 nop
428 442
429 .data 443 .data
430etrax_irv: 444etrax_irv:
431 .dword 0 445 .dword 0
446
447; Variables for communication with the Axis flash map driver (axisflashmap),
448; and for setting up memory in arch/cris/kernel/setup.c .
449
450; romfs_start is set to the start of the root file system, if it exists
451; in directly accessible memory (i.e. NOR Flash when booting from Flash,
452; or RAM when booting directly from a network-downloaded RAM image)
432romfs_start: 453romfs_start:
433 .dword 0 454 .dword 0
455
456; romfs_length is set to the size of the root file system image, if it exists
457; in directly accessible memory (see romfs_start). Otherwise it is set to 0.
434romfs_length: 458romfs_length:
435 .dword 0 459 .dword 0
460
461; romfs_in_flash is set to 1 if the root file system resides in directly
462; accessible flash memory (i.e. NOR flash). It is set to 0 for RAM boot
463; or NAND flash boot.
436romfs_in_flash: 464romfs_in_flash:
437 .dword 0 465 .dword 0
438crisv32_nand_boot: 466
439 .dword 0 467; nand_boot is set to 1 when the kernel has been booted from NAND flash
440crisv32_nand_cramfs_offset: 468nand_boot:
441 .dword 0 469 .dword 0
442 470
443swapper_pg_dir = 0xc0002000 471swapper_pg_dir = 0xc0002000
444 472
445 .section ".init.data", "aw" 473 .section ".init.data", "aw"
446 474
447#include "../lib/hw_settings.S" 475#include "../mach/hw_settings.S"
diff --git a/arch/cris/arch-v32/kernel/io.c b/arch/cris/arch-v32/kernel/io.c
deleted file mode 100644
index a22a9e02e093..000000000000
--- a/arch/cris/arch-v32/kernel/io.c
+++ /dev/null
@@ -1,153 +0,0 @@
1/*
2 * Helper functions for I/O pins.
3 *
4 * Copyright (c) 2004 Axis Communications AB.
5 */
6
7#include <linux/types.h>
8#include <linux/errno.h>
9#include <linux/init.h>
10#include <linux/string.h>
11#include <linux/ctype.h>
12#include <linux/kernel.h>
13#include <linux/module.h>
14#include <asm/io.h>
15#include <asm/arch/pinmux.h>
16#include <asm/arch/hwregs/gio_defs.h>
17
18struct crisv32_ioport crisv32_ioports[] =
19{
20 {
21 (unsigned long*)REG_ADDR(gio, regi_gio, rw_pa_oe),
22 (unsigned long*)REG_ADDR(gio, regi_gio, rw_pa_dout),
23 (unsigned long*)REG_ADDR(gio, regi_gio, r_pa_din),
24 8
25 },
26 {
27 (unsigned long*)REG_ADDR(gio, regi_gio, rw_pb_oe),
28 (unsigned long*)REG_ADDR(gio, regi_gio, rw_pb_dout),
29 (unsigned long*)REG_ADDR(gio, regi_gio, r_pb_din),
30 18
31 },
32 {
33 (unsigned long*)REG_ADDR(gio, regi_gio, rw_pc_oe),
34 (unsigned long*)REG_ADDR(gio, regi_gio, rw_pc_dout),
35 (unsigned long*)REG_ADDR(gio, regi_gio, r_pc_din),
36 18
37 },
38 {
39 (unsigned long*)REG_ADDR(gio, regi_gio, rw_pd_oe),
40 (unsigned long*)REG_ADDR(gio, regi_gio, rw_pd_dout),
41 (unsigned long*)REG_ADDR(gio, regi_gio, r_pd_din),
42 18
43 },
44 {
45 (unsigned long*)REG_ADDR(gio, regi_gio, rw_pe_oe),
46 (unsigned long*)REG_ADDR(gio, regi_gio, rw_pe_dout),
47 (unsigned long*)REG_ADDR(gio, regi_gio, r_pe_din),
48 18
49 }
50};
51
52#define NBR_OF_PORTS ARRAY_SIZE(crisv32_ioports)
53
54struct crisv32_iopin crisv32_led1_green;
55struct crisv32_iopin crisv32_led1_red;
56struct crisv32_iopin crisv32_led2_green;
57struct crisv32_iopin crisv32_led2_red;
58struct crisv32_iopin crisv32_led3_green;
59struct crisv32_iopin crisv32_led3_red;
60
61/* Dummy port used when green LED and red LED is on the same bit */
62static unsigned long io_dummy;
63static struct crisv32_ioport dummy_port =
64{
65 &io_dummy,
66 &io_dummy,
67 &io_dummy,
68 18
69};
70static struct crisv32_iopin dummy_led =
71{
72 &dummy_port,
73 0
74};
75
76static int __init crisv32_io_init(void)
77{
78 int ret = 0;
79 /* Initialize LEDs */
80 ret += crisv32_io_get_name(&crisv32_led1_green, CONFIG_ETRAX_LED1G);
81 ret += crisv32_io_get_name(&crisv32_led1_red, CONFIG_ETRAX_LED1R);
82 ret += crisv32_io_get_name(&crisv32_led2_green, CONFIG_ETRAX_LED2G);
83 ret += crisv32_io_get_name(&crisv32_led2_red, CONFIG_ETRAX_LED2R);
84 ret += crisv32_io_get_name(&crisv32_led3_green, CONFIG_ETRAX_LED3G);
85 ret += crisv32_io_get_name(&crisv32_led3_red, CONFIG_ETRAX_LED3R);
86 crisv32_io_set_dir(&crisv32_led1_green, crisv32_io_dir_out);
87 crisv32_io_set_dir(&crisv32_led1_red, crisv32_io_dir_out);
88 crisv32_io_set_dir(&crisv32_led2_green, crisv32_io_dir_out);
89 crisv32_io_set_dir(&crisv32_led2_red, crisv32_io_dir_out);
90 crisv32_io_set_dir(&crisv32_led3_green, crisv32_io_dir_out);
91 crisv32_io_set_dir(&crisv32_led3_red, crisv32_io_dir_out);
92
93 if (!strcmp(CONFIG_ETRAX_LED1G, CONFIG_ETRAX_LED1R))
94 crisv32_led1_red = dummy_led;
95 if (!strcmp(CONFIG_ETRAX_LED2G, CONFIG_ETRAX_LED2R))
96 crisv32_led2_red = dummy_led;
97
98 return ret;
99}
100
101__initcall(crisv32_io_init);
102
103int crisv32_io_get(struct crisv32_iopin* iopin,
104 unsigned int port, unsigned int pin)
105{
106 if (port > NBR_OF_PORTS)
107 return -EINVAL;
108 if (port > crisv32_ioports[port].pin_count)
109 return -EINVAL;
110
111 iopin->bit = 1 << pin;
112 iopin->port = &crisv32_ioports[port];
113
114 if (crisv32_pinmux_alloc(port, pin, pin, pinmux_gpio))
115 return -EIO;
116
117 return 0;
118}
119
120int crisv32_io_get_name(struct crisv32_iopin* iopin,
121 char* name)
122{
123 int port;
124 int pin;
125
126 if (toupper(*name) == 'P')
127 name++;
128
129 if (toupper(*name) < 'A' || toupper(*name) > 'E')
130 return -EINVAL;
131
132 port = toupper(*name) - 'A';
133 name++;
134 pin = simple_strtoul(name, NULL, 10);
135
136 if (pin < 0 || pin > crisv32_ioports[port].pin_count)
137 return -EINVAL;
138
139 iopin->bit = 1 << pin;
140 iopin->port = &crisv32_ioports[port];
141
142 if (crisv32_pinmux_alloc(port, pin, pin, pinmux_gpio))
143 return -EIO;
144
145 return 0;
146}
147
148#ifdef CONFIG_PCI
149/* PCI I/O access stuff */
150struct cris_io_operations* cris_iops = NULL;
151EXPORT_SYMBOL(cris_iops);
152#endif
153
diff --git a/arch/cris/arch-v32/kernel/irq.c b/arch/cris/arch-v32/kernel/irq.c
index a9acaa270243..173c141ac9ba 100644
--- a/arch/cris/arch-v32/kernel/irq.c
+++ b/arch/cris/arch-v32/kernel/irq.c
@@ -15,15 +15,21 @@
15#include <linux/threads.h> 15#include <linux/threads.h>
16#include <linux/spinlock.h> 16#include <linux/spinlock.h>
17#include <linux/kernel_stat.h> 17#include <linux/kernel_stat.h>
18#include <asm/arch/hwregs/reg_map.h> 18#include <hwregs/reg_map.h>
19#include <asm/arch/hwregs/reg_rdwr.h> 19#include <hwregs/reg_rdwr.h>
20#include <asm/arch/hwregs/intr_vect.h> 20#include <hwregs/intr_vect.h>
21#include <asm/arch/hwregs/intr_vect_defs.h> 21#include <hwregs/intr_vect_defs.h>
22 22
23#define CPU_FIXED -1 23#define CPU_FIXED -1
24 24
25/* IRQ masks (refer to comment for crisv32_do_multiple) */ 25/* IRQ masks (refer to comment for crisv32_do_multiple) */
26#define TIMER_MASK (1 << (TIMER_INTR_VECT - FIRST_IRQ)) 26#if TIMER0_INTR_VECT - FIRST_IRQ < 32
27#define TIMER_MASK (1 << (TIMER0_INTR_VECT - FIRST_IRQ))
28#undef TIMER_VECT1
29#else
30#define TIMER_MASK (1 << (TIMER0_INTR_VECT - FIRST_IRQ - 32))
31#define TIMER_VECT1
32#endif
27#ifdef CONFIG_ETRAX_KGDB 33#ifdef CONFIG_ETRAX_KGDB
28#if defined(CONFIG_ETRAX_KGDB_PORT0) 34#if defined(CONFIG_ETRAX_KGDB_PORT0)
29#define IGNOREMASK (1 << (SER0_INTR_VECT - FIRST_IRQ)) 35#define IGNOREMASK (1 << (SER0_INTR_VECT - FIRST_IRQ))
@@ -44,8 +50,8 @@ struct cris_irq_allocation
44 cpumask_t mask; /* The CPUs to which the IRQ may be allocated. */ 50 cpumask_t mask; /* The CPUs to which the IRQ may be allocated. */
45}; 51};
46 52
47struct cris_irq_allocation irq_allocations[NR_IRQS] = 53struct cris_irq_allocation irq_allocations[NR_REAL_IRQS] =
48 {[0 ... NR_IRQS - 1] = {0, CPU_MASK_ALL}}; 54 { [0 ... NR_REAL_IRQS - 1] = {0, CPU_MASK_ALL} };
49 55
50static unsigned long irq_regs[NR_CPUS] = 56static unsigned long irq_regs[NR_CPUS] =
51{ 57{
@@ -55,6 +61,12 @@ static unsigned long irq_regs[NR_CPUS] =
55#endif 61#endif
56}; 62};
57 63
64#if NR_REAL_IRQS > 32
65#define NBR_REGS 2
66#else
67#define NBR_REGS 1
68#endif
69
58unsigned long cpu_irq_counters[NR_CPUS]; 70unsigned long cpu_irq_counters[NR_CPUS];
59unsigned long irq_counters[NR_REAL_IRQS]; 71unsigned long irq_counters[NR_REAL_IRQS];
60 72
@@ -79,45 +91,81 @@ extern void d_mmu_write(void);
79extern void kgdb_init(void); 91extern void kgdb_init(void);
80extern void breakpoint(void); 92extern void breakpoint(void);
81 93
94/* From traps.c. */
95extern void breakh_BUG(void);
96
82/* 97/*
83 * Build the IRQ handler stubs using macros from irq.h. First argument is the 98 * Build the IRQ handler stubs using macros from irq.h.
84 * IRQ number, the second argument is the corresponding bit in
85 * intr_rw_vect_mask found in asm/arch/hwregs/intr_vect_defs.h.
86 */ 99 */
87BUILD_IRQ(0x31, (1 << 0)) /* memarb */ 100BUILD_IRQ(0x31)
88BUILD_IRQ(0x32, (1 << 1)) /* gen_io */ 101BUILD_IRQ(0x32)
89BUILD_IRQ(0x33, (1 << 2)) /* iop0 */ 102BUILD_IRQ(0x33)
90BUILD_IRQ(0x34, (1 << 3)) /* iop1 */ 103BUILD_IRQ(0x34)
91BUILD_IRQ(0x35, (1 << 4)) /* iop2 */ 104BUILD_IRQ(0x35)
92BUILD_IRQ(0x36, (1 << 5)) /* iop3 */ 105BUILD_IRQ(0x36)
93BUILD_IRQ(0x37, (1 << 6)) /* dma0 */ 106BUILD_IRQ(0x37)
94BUILD_IRQ(0x38, (1 << 7)) /* dma1 */ 107BUILD_IRQ(0x38)
95BUILD_IRQ(0x39, (1 << 8)) /* dma2 */ 108BUILD_IRQ(0x39)
96BUILD_IRQ(0x3a, (1 << 9)) /* dma3 */ 109BUILD_IRQ(0x3a)
97BUILD_IRQ(0x3b, (1 << 10)) /* dma4 */ 110BUILD_IRQ(0x3b)
98BUILD_IRQ(0x3c, (1 << 11)) /* dma5 */ 111BUILD_IRQ(0x3c)
99BUILD_IRQ(0x3d, (1 << 12)) /* dma6 */ 112BUILD_IRQ(0x3d)
100BUILD_IRQ(0x3e, (1 << 13)) /* dma7 */ 113BUILD_IRQ(0x3e)
101BUILD_IRQ(0x3f, (1 << 14)) /* dma8 */ 114BUILD_IRQ(0x3f)
102BUILD_IRQ(0x40, (1 << 15)) /* dma9 */ 115BUILD_IRQ(0x40)
103BUILD_IRQ(0x41, (1 << 16)) /* ata */ 116BUILD_IRQ(0x41)
104BUILD_IRQ(0x42, (1 << 17)) /* sser0 */ 117BUILD_IRQ(0x42)
105BUILD_IRQ(0x43, (1 << 18)) /* sser1 */ 118BUILD_IRQ(0x43)
106BUILD_IRQ(0x44, (1 << 19)) /* ser0 */ 119BUILD_IRQ(0x44)
107BUILD_IRQ(0x45, (1 << 20)) /* ser1 */ 120BUILD_IRQ(0x45)
108BUILD_IRQ(0x46, (1 << 21)) /* ser2 */ 121BUILD_IRQ(0x46)
109BUILD_IRQ(0x47, (1 << 22)) /* ser3 */ 122BUILD_IRQ(0x47)
110BUILD_IRQ(0x48, (1 << 23)) 123BUILD_IRQ(0x48)
111BUILD_IRQ(0x49, (1 << 24)) /* eth0 */ 124BUILD_IRQ(0x49)
112BUILD_IRQ(0x4a, (1 << 25)) /* eth1 */ 125BUILD_IRQ(0x4a)
113BUILD_TIMER_IRQ(0x4b, (1 << 26))/* timer */ 126BUILD_IRQ(0x4b)
114BUILD_IRQ(0x4c, (1 << 27)) /* bif_arb */ 127BUILD_IRQ(0x4c)
115BUILD_IRQ(0x4d, (1 << 28)) /* bif_dma */ 128BUILD_IRQ(0x4d)
116BUILD_IRQ(0x4e, (1 << 29)) /* ext */ 129BUILD_IRQ(0x4e)
117BUILD_IRQ(0x4f, (1 << 29)) /* ipi */ 130BUILD_IRQ(0x4f)
131BUILD_IRQ(0x50)
132#if MACH_IRQS > 32
133BUILD_IRQ(0x51)
134BUILD_IRQ(0x52)
135BUILD_IRQ(0x53)
136BUILD_IRQ(0x54)
137BUILD_IRQ(0x55)
138BUILD_IRQ(0x56)
139BUILD_IRQ(0x57)
140BUILD_IRQ(0x58)
141BUILD_IRQ(0x59)
142BUILD_IRQ(0x5a)
143BUILD_IRQ(0x5b)
144BUILD_IRQ(0x5c)
145BUILD_IRQ(0x5d)
146BUILD_IRQ(0x5e)
147BUILD_IRQ(0x5f)
148BUILD_IRQ(0x60)
149BUILD_IRQ(0x61)
150BUILD_IRQ(0x62)
151BUILD_IRQ(0x63)
152BUILD_IRQ(0x64)
153BUILD_IRQ(0x65)
154BUILD_IRQ(0x66)
155BUILD_IRQ(0x67)
156BUILD_IRQ(0x68)
157BUILD_IRQ(0x69)
158BUILD_IRQ(0x6a)
159BUILD_IRQ(0x6b)
160BUILD_IRQ(0x6c)
161BUILD_IRQ(0x6d)
162BUILD_IRQ(0x6e)
163BUILD_IRQ(0x6f)
164BUILD_IRQ(0x70)
165#endif
118 166
119/* Pointers to the low-level handlers. */ 167/* Pointers to the low-level handlers. */
120static void (*interrupt[NR_IRQS])(void) = { 168static void (*interrupt[MACH_IRQS])(void) = {
121 IRQ0x31_interrupt, IRQ0x32_interrupt, IRQ0x33_interrupt, 169 IRQ0x31_interrupt, IRQ0x32_interrupt, IRQ0x33_interrupt,
122 IRQ0x34_interrupt, IRQ0x35_interrupt, IRQ0x36_interrupt, 170 IRQ0x34_interrupt, IRQ0x35_interrupt, IRQ0x36_interrupt,
123 IRQ0x37_interrupt, IRQ0x38_interrupt, IRQ0x39_interrupt, 171 IRQ0x37_interrupt, IRQ0x38_interrupt, IRQ0x39_interrupt,
@@ -128,7 +176,20 @@ static void (*interrupt[NR_IRQS])(void) = {
128 IRQ0x46_interrupt, IRQ0x47_interrupt, IRQ0x48_interrupt, 176 IRQ0x46_interrupt, IRQ0x47_interrupt, IRQ0x48_interrupt,
129 IRQ0x49_interrupt, IRQ0x4a_interrupt, IRQ0x4b_interrupt, 177 IRQ0x49_interrupt, IRQ0x4a_interrupt, IRQ0x4b_interrupt,
130 IRQ0x4c_interrupt, IRQ0x4d_interrupt, IRQ0x4e_interrupt, 178 IRQ0x4c_interrupt, IRQ0x4d_interrupt, IRQ0x4e_interrupt,
131 IRQ0x4f_interrupt 179 IRQ0x4f_interrupt, IRQ0x50_interrupt,
180#if MACH_IRQS > 32
181 IRQ0x51_interrupt, IRQ0x52_interrupt, IRQ0x53_interrupt,
182 IRQ0x54_interrupt, IRQ0x55_interrupt, IRQ0x56_interrupt,
183 IRQ0x57_interrupt, IRQ0x58_interrupt, IRQ0x59_interrupt,
184 IRQ0x5a_interrupt, IRQ0x5b_interrupt, IRQ0x5c_interrupt,
185 IRQ0x5d_interrupt, IRQ0x5e_interrupt, IRQ0x5f_interrupt,
186 IRQ0x60_interrupt, IRQ0x61_interrupt, IRQ0x62_interrupt,
187 IRQ0x63_interrupt, IRQ0x64_interrupt, IRQ0x65_interrupt,
188 IRQ0x66_interrupt, IRQ0x67_interrupt, IRQ0x68_interrupt,
189 IRQ0x69_interrupt, IRQ0x6a_interrupt, IRQ0x6b_interrupt,
190 IRQ0x6c_interrupt, IRQ0x6d_interrupt, IRQ0x6e_interrupt,
191 IRQ0x6f_interrupt, IRQ0x70_interrupt,
192#endif
132}; 193};
133 194
134void 195void
@@ -137,13 +198,26 @@ block_irq(int irq, int cpu)
137 int intr_mask; 198 int intr_mask;
138 unsigned long flags; 199 unsigned long flags;
139 200
140 spin_lock_irqsave(&irq_lock, flags); 201 spin_lock_irqsave(&irq_lock, flags);
141 intr_mask = REG_RD_INT(intr_vect, irq_regs[cpu], rw_mask); 202 if (irq - FIRST_IRQ < 32)
142 203 intr_mask = REG_RD_INT_VECT(intr_vect, irq_regs[cpu],
143 /* Remember; 1 let through, 0 block. */ 204 rw_mask, 0);
144 intr_mask &= ~(1 << (irq - FIRST_IRQ)); 205 else
145 206 intr_mask = REG_RD_INT_VECT(intr_vect, irq_regs[cpu],
146 REG_WR_INT(intr_vect, irq_regs[cpu], rw_mask, intr_mask); 207 rw_mask, 1);
208
209 /* Remember; 1 let thru, 0 block. */
210 if (irq - FIRST_IRQ < 32)
211 intr_mask &= ~(1 << (irq - FIRST_IRQ));
212 else
213 intr_mask &= ~(1 << (irq - FIRST_IRQ - 32));
214
215 if (irq - FIRST_IRQ < 32)
216 REG_WR_INT_VECT(intr_vect, irq_regs[cpu], rw_mask,
217 0, intr_mask);
218 else
219 REG_WR_INT_VECT(intr_vect, irq_regs[cpu], rw_mask,
220 1, intr_mask);
147 spin_unlock_irqrestore(&irq_lock, flags); 221 spin_unlock_irqrestore(&irq_lock, flags);
148} 222}
149 223
@@ -154,12 +228,26 @@ unblock_irq(int irq, int cpu)
154 unsigned long flags; 228 unsigned long flags;
155 229
156 spin_lock_irqsave(&irq_lock, flags); 230 spin_lock_irqsave(&irq_lock, flags);
157 intr_mask = REG_RD_INT(intr_vect, irq_regs[cpu], rw_mask); 231 if (irq - FIRST_IRQ < 32)
158 232 intr_mask = REG_RD_INT_VECT(intr_vect, irq_regs[cpu],
159 /* Remember; 1 let through, 0 block. */ 233 rw_mask, 0);
160 intr_mask |= (1 << (irq - FIRST_IRQ)); 234 else
235 intr_mask = REG_RD_INT_VECT(intr_vect, irq_regs[cpu],
236 rw_mask, 1);
237
238 /* Remember; 1 let thru, 0 block. */
239 if (irq - FIRST_IRQ < 32)
240 intr_mask |= (1 << (irq - FIRST_IRQ));
241 else
242 intr_mask |= (1 << (irq - FIRST_IRQ - 32));
243
244 if (irq - FIRST_IRQ < 32)
245 REG_WR_INT_VECT(intr_vect, irq_regs[cpu], rw_mask,
246 0, intr_mask);
247 else
248 REG_WR_INT_VECT(intr_vect, irq_regs[cpu], rw_mask,
249 1, intr_mask);
161 250
162 REG_WR_INT(intr_vect, irq_regs[cpu], rw_mask, intr_mask);
163 spin_unlock_irqrestore(&irq_lock, flags); 251 spin_unlock_irqrestore(&irq_lock, flags);
164} 252}
165 253
@@ -298,8 +386,9 @@ crisv32_do_multiple(struct pt_regs* regs)
298{ 386{
299 int cpu; 387 int cpu;
300 int mask; 388 int mask;
301 int masked; 389 int masked[NBR_REGS];
302 int bit; 390 int bit;
391 int i;
303 392
304 cpu = smp_processor_id(); 393 cpu = smp_processor_id();
305 394
@@ -308,42 +397,59 @@ crisv32_do_multiple(struct pt_regs* regs)
308 */ 397 */
309 irq_enter(); 398 irq_enter();
310 399
311 /* Get which IRQs that happened. */ 400 for (i = 0; i < NBR_REGS; i++) {
312 masked = REG_RD_INT(intr_vect, irq_regs[cpu], r_masked_vect); 401 /* Get which IRQs that happend. */
402 masked[i] = REG_RD_INT_VECT(intr_vect, irq_regs[cpu],
403 r_masked_vect, i);
313 404
314 /* Calculate new IRQ mask with these IRQs disabled. */ 405 /* Calculate new IRQ mask with these IRQs disabled. */
315 mask = REG_RD_INT(intr_vect, irq_regs[cpu], rw_mask); 406 mask = REG_RD_INT_VECT(intr_vect, irq_regs[cpu], rw_mask, i);
316 mask &= ~masked; 407 mask &= ~masked[i];
317 408
318 /* Timer IRQ is never masked */ 409 /* Timer IRQ is never masked */
319 if (masked & TIMER_MASK) 410#ifdef TIMER_VECT1
320 mask |= TIMER_MASK; 411 if ((i == 1) && (masked[0] & TIMER_MASK))
321 412 mask |= TIMER_MASK;
322 /* Block all the IRQs */ 413#else
323 REG_WR_INT(intr_vect, irq_regs[cpu], rw_mask, mask); 414 if ((i == 0) && (masked[0] & TIMER_MASK))
415 mask |= TIMER_MASK;
416#endif
417 /* Block all the IRQs */
418 REG_WR_INT_VECT(intr_vect, irq_regs[cpu], rw_mask, i, mask);
324 419
325 /* Check for timer IRQ and handle it special. */ 420 /* Check for timer IRQ and handle it special. */
326 if (masked & TIMER_MASK) { 421#ifdef TIMER_VECT1
327 masked &= ~TIMER_MASK; 422 if ((i == 1) && (masked[i] & TIMER_MASK)) {
328 do_IRQ(TIMER_INTR_VECT, regs); 423 masked[i] &= ~TIMER_MASK;
424 do_IRQ(TIMER0_INTR_VECT, regs);
425 }
426#else
427 if ((i == 0) && (masked[i] & TIMER_MASK)) {
428 masked[i] &= ~TIMER_MASK;
429 do_IRQ(TIMER0_INTR_VECT, regs);
430 }
329 } 431 }
432#endif
330 433
331#ifdef IGNORE_MASK 434#ifdef IGNORE_MASK
332 /* Remove IRQs that can't be handled as multiple. */ 435 /* Remove IRQs that can't be handled as multiple. */
333 masked &= ~IGNORE_MASK; 436 masked[0] &= ~IGNORE_MASK;
334#endif 437#endif
335 438
336 /* Handle the rest of the IRQs. */ 439 /* Handle the rest of the IRQs. */
337 for (bit = 0; bit < 32; bit++) 440 for (i = 0; i < NBR_REGS; i++) {
338 { 441 for (bit = 0; bit < 32; bit++) {
339 if (masked & (1 << bit)) 442 if (masked[i] & (1 << bit))
340 do_IRQ(bit + FIRST_IRQ, regs); 443 do_IRQ(bit + FIRST_IRQ + i*32, regs);
444 }
341 } 445 }
342 446
343 /* Unblock all the IRQs. */ 447 /* Unblock all the IRQs. */
344 mask = REG_RD_INT(intr_vect, irq_regs[cpu], rw_mask); 448 for (i = 0; i < NBR_REGS; i++) {
345 mask |= masked; 449 mask = REG_RD_INT_VECT(intr_vect, irq_regs[cpu], rw_mask, i);
346 REG_WR_INT(intr_vect, irq_regs[cpu], rw_mask, mask); 450 mask |= masked[i];
451 REG_WR_INT_VECT(intr_vect, irq_regs[cpu], rw_mask, i, mask);
452 }
347 453
348 /* This irq_exit() will trigger the soft IRQs. */ 454 /* This irq_exit() will trigger the soft IRQs. */
349 irq_exit(); 455 irq_exit();
@@ -361,20 +467,21 @@ init_IRQ(void)
361 reg_intr_vect_rw_mask vect_mask = {0}; 467 reg_intr_vect_rw_mask vect_mask = {0};
362 468
363 /* Clear all interrupts masks. */ 469 /* Clear all interrupts masks. */
364 REG_WR(intr_vect, regi_irq, rw_mask, vect_mask); 470 for (i = 0; i < NBR_REGS; i++)
471 REG_WR_VECT(intr_vect, regi_irq, rw_mask, i, vect_mask);
365 472
366 for (i = 0; i < 256; i++) 473 for (i = 0; i < 256; i++)
367 etrax_irv->v[i] = weird_irq; 474 etrax_irv->v[i] = weird_irq;
368 475
369 /* Point all IRQs to bad handlers. */ 476 /* Point all IRQ's to bad handlers. */
370 for (i = FIRST_IRQ, j = 0; j < NR_IRQS; i++, j++) { 477 for (i = FIRST_IRQ, j = 0; j < NR_IRQS; i++, j++) {
371 irq_desc[j].chip = &crisv32_irq_type; 478 irq_desc[j].chip = &crisv32_irq_type;
372 set_exception_vector(i, interrupt[j]); 479 set_exception_vector(i, interrupt[j]);
373 } 480 }
374 481
375 /* Mark Timer and IPI IRQs as CPU local */ 482 /* Mark Timer and IPI IRQs as CPU local */
376 irq_allocations[TIMER_INTR_VECT - FIRST_IRQ].cpu = CPU_FIXED; 483 irq_allocations[TIMER0_INTR_VECT - FIRST_IRQ].cpu = CPU_FIXED;
377 irq_desc[TIMER_INTR_VECT].status |= IRQ_PER_CPU; 484 irq_desc[TIMER0_INTR_VECT].status |= IRQ_PER_CPU;
378 irq_allocations[IPI_INTR_VECT - FIRST_IRQ].cpu = CPU_FIXED; 485 irq_allocations[IPI_INTR_VECT - FIRST_IRQ].cpu = CPU_FIXED;
379 irq_desc[IPI_INTR_VECT].status |= IRQ_PER_CPU; 486 irq_desc[IPI_INTR_VECT].status |= IRQ_PER_CPU;
380 487
@@ -391,6 +498,11 @@ init_IRQ(void)
391 set_exception_vector(0x0a, d_mmu_access); 498 set_exception_vector(0x0a, d_mmu_access);
392 set_exception_vector(0x0b, d_mmu_write); 499 set_exception_vector(0x0b, d_mmu_write);
393 500
501#ifdef CONFIG_BUG
502 /* Break 14 handler, used to implement cheap BUG(). */
503 set_exception_vector(0x1e, breakh_BUG);
504#endif
505
394 /* The system-call trap is reached by "break 13". */ 506 /* The system-call trap is reached by "break 13". */
395 set_exception_vector(0x1d, system_call); 507 set_exception_vector(0x1d, system_call);
396 508
diff --git a/arch/cris/arch-v32/kernel/kgdb.c b/arch/cris/arch-v32/kernel/kgdb.c
index 480e56348be2..4e2e2e271efb 100644
--- a/arch/cris/arch-v32/kernel/kgdb.c
+++ b/arch/cris/arch-v32/kernel/kgdb.c
@@ -381,7 +381,7 @@ static int read_register(char regno, unsigned int *valptr);
381/* Serial port, reads one character. ETRAX 100 specific. from debugport.c */ 381/* Serial port, reads one character. ETRAX 100 specific. from debugport.c */
382int getDebugChar(void); 382int getDebugChar(void);
383 383
384#ifdef CONFIG_ETRAXFS_SIM 384#ifdef CONFIG_ETRAX_VCS_SIM
385int getDebugChar(void) 385int getDebugChar(void)
386{ 386{
387 return socketread(); 387 return socketread();
@@ -391,7 +391,7 @@ int getDebugChar(void)
391/* Serial port, writes one character. ETRAX 100 specific. from debugport.c */ 391/* Serial port, writes one character. ETRAX 100 specific. from debugport.c */
392void putDebugChar(int val); 392void putDebugChar(int val);
393 393
394#ifdef CONFIG_ETRAXFS_SIM 394#ifdef CONFIG_ETRAX_VCS_SIM
395void putDebugChar(int val) 395void putDebugChar(int val)
396{ 396{
397 socketwrite((char *)&val, 1); 397 socketwrite((char *)&val, 1);
@@ -1599,7 +1599,7 @@ kgdb_init(void)
1599 REG_WR(intr_vect, regi_irq, rw_mask, intr_mask); 1599 REG_WR(intr_vect, regi_irq, rw_mask, intr_mask);
1600 1600
1601 ser_intr_mask = REG_RD(ser, regi_ser0, rw_intr_mask); 1601 ser_intr_mask = REG_RD(ser, regi_ser0, rw_intr_mask);
1602 ser_intr_mask.data_avail = regk_ser_yes; 1602 ser_intr_mask.dav = regk_ser_yes;
1603 REG_WR(ser, regi_ser0, rw_intr_mask, ser_intr_mask); 1603 REG_WR(ser, regi_ser0, rw_intr_mask, ser_intr_mask);
1604#elif defined(CONFIG_ETRAX_KGDB_PORT1) 1604#elif defined(CONFIG_ETRAX_KGDB_PORT1)
1605 /* Note: no shortcut registered (not handled by multiple_interrupt). 1605 /* Note: no shortcut registered (not handled by multiple_interrupt).
@@ -1611,7 +1611,7 @@ kgdb_init(void)
1611 REG_WR(intr_vect, regi_irq, rw_mask, intr_mask); 1611 REG_WR(intr_vect, regi_irq, rw_mask, intr_mask);
1612 1612
1613 ser_intr_mask = REG_RD(ser, regi_ser1, rw_intr_mask); 1613 ser_intr_mask = REG_RD(ser, regi_ser1, rw_intr_mask);
1614 ser_intr_mask.data_avail = regk_ser_yes; 1614 ser_intr_mask.dav = regk_ser_yes;
1615 REG_WR(ser, regi_ser1, rw_intr_mask, ser_intr_mask); 1615 REG_WR(ser, regi_ser1, rw_intr_mask, ser_intr_mask);
1616#elif defined(CONFIG_ETRAX_KGDB_PORT2) 1616#elif defined(CONFIG_ETRAX_KGDB_PORT2)
1617 /* Note: no shortcut registered (not handled by multiple_interrupt). 1617 /* Note: no shortcut registered (not handled by multiple_interrupt).
@@ -1623,7 +1623,7 @@ kgdb_init(void)
1623 REG_WR(intr_vect, regi_irq, rw_mask, intr_mask); 1623 REG_WR(intr_vect, regi_irq, rw_mask, intr_mask);
1624 1624
1625 ser_intr_mask = REG_RD(ser, regi_ser2, rw_intr_mask); 1625 ser_intr_mask = REG_RD(ser, regi_ser2, rw_intr_mask);
1626 ser_intr_mask.data_avail = regk_ser_yes; 1626 ser_intr_mask.dav = regk_ser_yes;
1627 REG_WR(ser, regi_ser2, rw_intr_mask, ser_intr_mask); 1627 REG_WR(ser, regi_ser2, rw_intr_mask, ser_intr_mask);
1628#elif defined(CONFIG_ETRAX_KGDB_PORT3) 1628#elif defined(CONFIG_ETRAX_KGDB_PORT3)
1629 /* Note: no shortcut registered (not handled by multiple_interrupt). 1629 /* Note: no shortcut registered (not handled by multiple_interrupt).
@@ -1635,7 +1635,7 @@ kgdb_init(void)
1635 REG_WR(intr_vect, regi_irq, rw_mask, intr_mask); 1635 REG_WR(intr_vect, regi_irq, rw_mask, intr_mask);
1636 1636
1637 ser_intr_mask = REG_RD(ser, regi_ser3, rw_intr_mask); 1637 ser_intr_mask = REG_RD(ser, regi_ser3, rw_intr_mask);
1638 ser_intr_mask.data_avail = regk_ser_yes; 1638 ser_intr_mask.dav = regk_ser_yes;
1639 REG_WR(ser, regi_ser3, rw_intr_mask, ser_intr_mask); 1639 REG_WR(ser, regi_ser3, rw_intr_mask, ser_intr_mask);
1640#endif 1640#endif
1641 1641
diff --git a/arch/cris/arch-v32/kernel/process.c b/arch/cris/arch-v32/kernel/process.c
index b72a15580dc7..ced5b725d9bd 100644
--- a/arch/cris/arch-v32/kernel/process.c
+++ b/arch/cris/arch-v32/kernel/process.c
@@ -12,17 +12,13 @@
12#include <linux/err.h> 12#include <linux/err.h>
13#include <linux/fs.h> 13#include <linux/fs.h>
14#include <linux/slab.h> 14#include <linux/slab.h>
15#include <asm/arch/hwregs/reg_rdwr.h> 15#include <hwregs/reg_rdwr.h>
16#include <asm/arch/hwregs/reg_map.h> 16#include <hwregs/reg_map.h>
17#include <asm/arch/hwregs/timer_defs.h> 17#include <hwregs/timer_defs.h>
18#include <asm/arch/hwregs/intr_vect_defs.h> 18#include <hwregs/intr_vect_defs.h>
19 19
20extern void stop_watchdog(void); 20extern void stop_watchdog(void);
21 21
22#ifdef CONFIG_ETRAX_GPIO
23extern void etrax_gpio_wake_up_check(void); /* Defined in drivers/gpio.c. */
24#endif
25
26extern int cris_hlt_counter; 22extern int cris_hlt_counter;
27 23
28/* We use this if we don't have any better idle routine. */ 24/* We use this if we don't have any better idle routine. */
@@ -82,7 +78,7 @@ hard_reset_now(void)
82 wd_ctrl.cmd = regk_timer_start; 78 wd_ctrl.cmd = regk_timer_start;
83 79
84 arch_enable_nmi(); 80 arch_enable_nmi();
85 REG_WR(timer, regi_timer, rw_wd_ctrl, wd_ctrl); 81 REG_WR(timer, regi_timer0, rw_wd_ctrl, wd_ctrl);
86} 82}
87#endif 83#endif
88 84
diff --git a/arch/cris/arch-v32/kernel/ptrace.c b/arch/cris/arch-v32/kernel/ptrace.c
index 2df60529a8af..e27f4670e88e 100644
--- a/arch/cris/arch-v32/kernel/ptrace.c
+++ b/arch/cris/arch-v32/kernel/ptrace.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * Copyright (C) 2000-2003, Axis Communications AB. 2 * Copyright (C) 2000-2007, Axis Communications AB.
3 */ 3 */
4 4
5#include <linux/kernel.h> 5#include <linux/kernel.h>
@@ -149,7 +149,7 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
149 ret = generic_ptrace_pokedata(child, addr, data); 149 ret = generic_ptrace_pokedata(child, addr, data);
150 break; 150 break;
151 151
152 /* Write the word at location address in the USER area. */ 152 /* Write the word at location address in the USER area. */
153 case PTRACE_POKEUSR: 153 case PTRACE_POKEUSR:
154 ret = -EIO; 154 ret = -EIO;
155 if ((addr & 3) || addr < 0 || addr > PT_MAX << 2) 155 if ((addr & 3) || addr < 0 || addr > PT_MAX << 2)
@@ -201,7 +201,7 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
201 201
202 break; 202 break;
203 203
204 /* Make the child exit by sending it a sigkill. */ 204 /* Make the child exit by sending it a sigkill. */
205 case PTRACE_KILL: 205 case PTRACE_KILL:
206 ret = 0; 206 ret = 0;
207 207
@@ -245,9 +245,10 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
245 break; 245 break;
246 246
247 } 247 }
248
248 /* Get all GP registers from the child. */ 249 /* Get all GP registers from the child. */
249 case PTRACE_GETREGS: { 250 case PTRACE_GETREGS: {
250 int i; 251 int i;
251 unsigned long tmp; 252 unsigned long tmp;
252 253
253 for (i = 0; i <= PT_MAX; i++) { 254 for (i = 0; i <= PT_MAX; i++) {
@@ -294,6 +295,7 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
294 break; 295 break;
295 } 296 }
296 297
298out_tsk:
297 return ret; 299 return ret;
298} 300}
299 301
diff --git a/arch/cris/arch-v32/kernel/signal.c b/arch/cris/arch-v32/kernel/signal.c
index 024cc6901974..58c1866804e3 100644
--- a/arch/cris/arch-v32/kernel/signal.c
+++ b/arch/cris/arch-v32/kernel/signal.c
@@ -50,7 +50,7 @@ struct rt_signal_frame {
50 unsigned char retcode[8]; /* Trampoline code. */ 50 unsigned char retcode[8]; /* Trampoline code. */
51}; 51};
52 52
53int do_signal(int restart, sigset_t *oldset, struct pt_regs *regs); 53void do_signal(int restart, struct pt_regs *regs);
54void keep_debug_flags(unsigned long oldccs, unsigned long oldspc, 54void keep_debug_flags(unsigned long oldccs, unsigned long oldspc,
55 struct pt_regs *regs); 55 struct pt_regs *regs);
56/* 56/*
@@ -61,74 +61,16 @@ int
61sys_sigsuspend(old_sigset_t mask, long r11, long r12, long r13, long mof, 61sys_sigsuspend(old_sigset_t mask, long r11, long r12, long r13, long mof,
62 long srp, struct pt_regs *regs) 62 long srp, struct pt_regs *regs)
63{ 63{
64 sigset_t saveset;
65
66 mask &= _BLOCKABLE; 64 mask &= _BLOCKABLE;
67
68 spin_lock_irq(&current->sighand->siglock); 65 spin_lock_irq(&current->sighand->siglock);
69 66 current->saved_sigmask = current->blocked;
70 saveset = current->blocked;
71
72 siginitset(&current->blocked, mask); 67 siginitset(&current->blocked, mask);
73
74 recalc_sigpending();
75 spin_unlock_irq(&current->sighand->siglock);
76
77 regs->r10 = -EINTR;
78
79 while (1) {
80 current->state = TASK_INTERRUPTIBLE;
81 schedule();
82
83 if (do_signal(0, &saveset, regs)) {
84 /*
85 * This point is reached twice: once to call
86 * the signal handler, then again to return
87 * from the sigsuspend system call. When
88 * calling the signal handler, R10 hold the
89 * signal number as set by do_signal(). The
90 * sigsuspend call will always return with
91 * the restored value above; -EINTR.
92 */
93 return regs->r10;
94 }
95 }
96}
97
98/* Define some dummy arguments to be able to reach the regs argument. */
99int
100sys_rt_sigsuspend(sigset_t *unewset, size_t sigsetsize, long r12, long r13,
101 long mof, long srp, struct pt_regs *regs)
102{
103 sigset_t saveset;
104 sigset_t newset;
105
106 if (sigsetsize != sizeof(sigset_t))
107 return -EINVAL;
108
109 if (copy_from_user(&newset, unewset, sizeof(newset)))
110 return -EFAULT;
111
112 sigdelsetmask(&newset, ~_BLOCKABLE);
113 spin_lock_irq(&current->sighand->siglock);
114
115 saveset = current->blocked;
116 current->blocked = newset;
117
118 recalc_sigpending(); 68 recalc_sigpending();
119 spin_unlock_irq(&current->sighand->siglock); 69 spin_unlock_irq(&current->sighand->siglock);
120 70 current->state = TASK_INTERRUPTIBLE;
121 regs->r10 = -EINTR; 71 schedule();
122 72 set_thread_flag(TIF_RESTORE_SIGMASK);
123 while (1) { 73 return -ERESTARTNOHAND;
124 current->state = TASK_INTERRUPTIBLE;
125 schedule();
126
127 if (do_signal(0, &saveset, regs)) {
128 /* See comment in function above. */
129 return regs->r10;
130 }
131 }
132} 74}
133 75
134int 76int
@@ -290,7 +232,7 @@ sys_rt_sigreturn(long r10, long r11, long r12, long r13, long mof, long srp,
290 goto badframe; 232 goto badframe;
291 233
292 if (do_sigaltstack(&frame->uc.uc_stack, NULL, rdusp()) == -EFAULT) 234 if (do_sigaltstack(&frame->uc.uc_stack, NULL, rdusp()) == -EFAULT)
293 goto badframe; 235 goto badframe;
294 236
295 keep_debug_flags(oldccs, oldspc, regs); 237 keep_debug_flags(oldccs, oldspc, regs);
296 238
@@ -347,11 +289,11 @@ get_sigframe(struct k_sigaction *ka, struct pt_regs * regs, size_t frame_size)
347/* Grab and setup a signal frame. 289/* Grab and setup a signal frame.
348 * 290 *
349 * Basically a lot of state-info is stacked, and arranged for the 291 * Basically a lot of state-info is stacked, and arranged for the
350 * user-mode program to return to the kernel using either a trampoline 292 * user-mode program to return to the kernel using either a trampiline
351 * which performs the syscall sigreturn(), or a provided user-mode 293 * which performs the syscall sigreturn(), or a provided user-mode
352 * trampoline. 294 * trampoline.
353 */ 295 */
354static void 296static int
355setup_frame(int sig, struct k_sigaction *ka, sigset_t *set, 297setup_frame(int sig, struct k_sigaction *ka, sigset_t *set,
356 struct pt_regs * regs) 298 struct pt_regs * regs)
357{ 299{
@@ -417,16 +359,17 @@ setup_frame(int sig, struct k_sigaction *ka, sigset_t *set,
417 /* Actually move the USP to reflect the stacked frame. */ 359 /* Actually move the USP to reflect the stacked frame. */
418 wrusp((unsigned long)frame); 360 wrusp((unsigned long)frame);
419 361
420 return; 362 return 0;
421 363
422give_sigsegv: 364give_sigsegv:
423 if (sig == SIGSEGV) 365 if (sig == SIGSEGV)
424 ka->sa.sa_handler = SIG_DFL; 366 ka->sa.sa_handler = SIG_DFL;
425 367
426 force_sig(SIGSEGV, current); 368 force_sig(SIGSEGV, current);
369 return -EFAULT;
427} 370}
428 371
429static void 372static int
430setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info, 373setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info,
431 sigset_t *set, struct pt_regs * regs) 374 sigset_t *set, struct pt_regs * regs)
432{ 375{
@@ -503,21 +446,24 @@ setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info,
503 /* Actually move the usp to reflect the stacked frame. */ 446 /* Actually move the usp to reflect the stacked frame. */
504 wrusp((unsigned long)frame); 447 wrusp((unsigned long)frame);
505 448
506 return; 449 return 0;
507 450
508give_sigsegv: 451give_sigsegv:
509 if (sig == SIGSEGV) 452 if (sig == SIGSEGV)
510 ka->sa.sa_handler = SIG_DFL; 453 ka->sa.sa_handler = SIG_DFL;
511 454
512 force_sig(SIGSEGV, current); 455 force_sig(SIGSEGV, current);
456 return -EFAULT;
513} 457}
514 458
515/* Invoke a singal handler to, well, handle the signal. */ 459/* Invoke a singal handler to, well, handle the signal. */
516static inline void 460static inline int
517handle_signal(int canrestart, unsigned long sig, 461handle_signal(int canrestart, unsigned long sig,
518 siginfo_t *info, struct k_sigaction *ka, 462 siginfo_t *info, struct k_sigaction *ka,
519 sigset_t *oldset, struct pt_regs * regs) 463 sigset_t *oldset, struct pt_regs * regs)
520{ 464{
465 int ret;
466
521 /* Check if this got called from a system call. */ 467 /* Check if this got called from a system call. */
522 if (canrestart) { 468 if (canrestart) {
523 /* If so, check system call restarting. */ 469 /* If so, check system call restarting. */
@@ -561,19 +507,24 @@ handle_signal(int canrestart, unsigned long sig,
561 507
562 /* Set up the stack frame. */ 508 /* Set up the stack frame. */
563 if (ka->sa.sa_flags & SA_SIGINFO) 509 if (ka->sa.sa_flags & SA_SIGINFO)
564 setup_rt_frame(sig, ka, info, oldset, regs); 510 ret = setup_rt_frame(sig, ka, info, oldset, regs);
565 else 511 else
566 setup_frame(sig, ka, oldset, regs); 512 ret = setup_frame(sig, ka, oldset, regs);
567 513
568 if (ka->sa.sa_flags & SA_ONESHOT) 514 if (ka->sa.sa_flags & SA_ONESHOT)
569 ka->sa.sa_handler = SIG_DFL; 515 ka->sa.sa_handler = SIG_DFL;
570 516
571 spin_lock_irq(&current->sighand->siglock); 517 if (ret == 0) {
572 sigorsets(&current->blocked,&current->blocked,&ka->sa.sa_mask); 518 spin_lock_irq(&current->sighand->siglock);
573 if (!(ka->sa.sa_flags & SA_NODEFER)) 519 sigorsets(&current->blocked, &current->blocked,
574 sigaddset(&current->blocked,sig); 520 &ka->sa.sa_mask);
575 recalc_sigpending(); 521 if (!(ka->sa.sa_flags & SA_NODEFER))
576 spin_unlock_irq(&current->sighand->siglock); 522 sigaddset(&current->blocked, sig);
523 recalc_sigpending();
524 spin_unlock_irq(&current->sighand->siglock);
525 }
526
527 return ret;
577} 528}
578 529
579/* 530/*
@@ -587,12 +538,13 @@ handle_signal(int canrestart, unsigned long sig,
587 * we can use user_mode(regs) to see if we came directly from kernel or user 538 * we can use user_mode(regs) to see if we came directly from kernel or user
588 * mode below. 539 * mode below.
589 */ 540 */
590int 541void
591do_signal(int canrestart, sigset_t *oldset, struct pt_regs *regs) 542do_signal(int canrestart, struct pt_regs *regs)
592{ 543{
593 int signr; 544 int signr;
594 siginfo_t info; 545 siginfo_t info;
595 struct k_sigaction ka; 546 struct k_sigaction ka;
547 sigset_t *oldset;
596 548
597 /* 549 /*
598 * The common case should go fast, which is why this point is 550 * The common case should go fast, which is why this point is
@@ -600,17 +552,28 @@ do_signal(int canrestart, sigset_t *oldset, struct pt_regs *regs)
600 * without doing anything. 552 * without doing anything.
601 */ 553 */
602 if (!user_mode(regs)) 554 if (!user_mode(regs))
603 return 1; 555 return;
604 556
605 if (!oldset) 557 if (test_thread_flag(TIF_RESTORE_SIGMASK))
558 oldset = &current->saved_sigmask;
559 else
606 oldset = &current->blocked; 560 oldset = &current->blocked;
607 561
608 signr = get_signal_to_deliver(&info, &ka, regs, NULL); 562 signr = get_signal_to_deliver(&info, &ka, regs, NULL);
609 563
610 if (signr > 0) { 564 if (signr > 0) {
611 /* Deliver the signal. */ 565 /* Whee! Actually deliver the signal. */
612 handle_signal(canrestart, signr, &info, &ka, oldset, regs); 566 if (handle_signal(canrestart, signr, &info, &ka,
613 return 1; 567 oldset, regs)) {
568 /* a signal was successfully delivered; the saved
569 * sigmask will have been stored in the signal frame,
570 * and will be restored by sigreturn, so we can simply
571 * clear the TIF_RESTORE_SIGMASK flag */
572 if (test_thread_flag(TIF_RESTORE_SIGMASK))
573 clear_thread_flag(TIF_RESTORE_SIGMASK);
574 }
575
576 return;
614 } 577 }
615 578
616 /* Got here from a system call? */ 579 /* Got here from a system call? */
@@ -628,7 +591,12 @@ do_signal(int canrestart, sigset_t *oldset, struct pt_regs *regs)
628 } 591 }
629 } 592 }
630 593
631 return 0; 594 /* if there's no signal to deliver, we just put the saved sigmask
595 * back */
596 if (test_thread_flag(TIF_RESTORE_SIGMASK)) {
597 clear_thread_flag(TIF_RESTORE_SIGMASK);
598 sigprocmask(SIG_SETMASK, &current->saved_sigmask, NULL);
599 }
632} 600}
633 601
634asmlinkage void 602asmlinkage void
@@ -641,7 +609,7 @@ ugdb_trap_user(struct thread_info *ti, int sig)
641 user_regs(ti)->spc = 0; 609 user_regs(ti)->spc = 0;
642 } 610 }
643 /* FIXME: Filter out false h/w breakpoint hits (i.e. EDA 611 /* FIXME: Filter out false h/w breakpoint hits (i.e. EDA
644 not within any configured h/w breakpoint range). Synchronize with 612 not withing any configured h/w breakpoint range). Synchronize with
645 what already exists for kernel debugging. */ 613 what already exists for kernel debugging. */
646 if (((user_regs(ti)->exs & 0xff00) >> 8) == BREAK_8_INTR_VECT) { 614 if (((user_regs(ti)->exs & 0xff00) >> 8) == BREAK_8_INTR_VECT) {
647 /* Break 8: subtract 2 from ERP unless in a delay slot. */ 615 /* Break 8: subtract 2 from ERP unless in a delay slot. */
diff --git a/arch/cris/arch-v32/kernel/smp.c b/arch/cris/arch-v32/kernel/smp.c
index 171c96e0a5d3..a9c3334e46c9 100644
--- a/arch/cris/arch-v32/kernel/smp.c
+++ b/arch/cris/arch-v32/kernel/smp.c
@@ -1,11 +1,12 @@
1#include <linux/types.h>
1#include <asm/delay.h> 2#include <asm/delay.h>
2#include <asm/arch/irq.h> 3#include <irq.h>
3#include <asm/arch/hwregs/intr_vect.h> 4#include <hwregs/intr_vect.h>
4#include <asm/arch/hwregs/intr_vect_defs.h> 5#include <hwregs/intr_vect_defs.h>
5#include <asm/tlbflush.h> 6#include <asm/tlbflush.h>
6#include <asm/mmu_context.h> 7#include <asm/mmu_context.h>
7#include <asm/arch/hwregs/mmu_defs_asm.h> 8#include <hwregs/asm/mmu_defs_asm.h>
8#include <asm/arch/hwregs/supp_reg.h> 9#include <hwregs/supp_reg.h>
9#include <asm/atomic.h> 10#include <asm/atomic.h>
10 11
11#include <linux/err.h> 12#include <linux/err.h>
@@ -20,6 +21,7 @@
20#define IPI_SCHEDULE 1 21#define IPI_SCHEDULE 1
21#define IPI_CALL 2 22#define IPI_CALL 2
22#define IPI_FLUSH_TLB 4 23#define IPI_FLUSH_TLB 4
24#define IPI_BOOT 8
23 25
24#define FLUSH_ALL (void*)0xffffffff 26#define FLUSH_ALL (void*)0xffffffff
25 27
@@ -30,6 +32,8 @@ spinlock_t cris_atomic_locks[] = { [0 ... LOCK_COUNT - 1] = SPIN_LOCK_UNLOCKED};
30cpumask_t cpu_online_map = CPU_MASK_NONE; 32cpumask_t cpu_online_map = CPU_MASK_NONE;
31EXPORT_SYMBOL(cpu_online_map); 33EXPORT_SYMBOL(cpu_online_map);
32cpumask_t phys_cpu_present_map = CPU_MASK_NONE; 34cpumask_t phys_cpu_present_map = CPU_MASK_NONE;
35cpumask_t cpu_possible_map;
36EXPORT_SYMBOL(cpu_possible_map);
33EXPORT_SYMBOL(phys_cpu_present_map); 37EXPORT_SYMBOL(phys_cpu_present_map);
34 38
35/* Variables used during SMP boot */ 39/* Variables used during SMP boot */
@@ -55,13 +59,12 @@ static unsigned long flush_addr;
55extern int setup_irq(int, struct irqaction *); 59extern int setup_irq(int, struct irqaction *);
56 60
57/* Mode registers */ 61/* Mode registers */
58static unsigned long irq_regs[NR_CPUS] = 62static unsigned long irq_regs[NR_CPUS] = {
59{
60 regi_irq, 63 regi_irq,
61 regi_irq2 64 regi_irq2
62}; 65};
63 66
64static irqreturn_t crisv32_ipi_interrupt(int irq, void *dev_id, struct pt_regs *regs); 67static irqreturn_t crisv32_ipi_interrupt(int irq, void *dev_id);
65static int send_ipi(int vector, int wait, cpumask_t cpu_mask); 68static int send_ipi(int vector, int wait, cpumask_t cpu_mask);
66static struct irqaction irq_ipi = { 69static struct irqaction irq_ipi = {
67 .handler = crisv32_ipi_interrupt, 70 .handler = crisv32_ipi_interrupt,
@@ -101,6 +104,7 @@ void __devinit smp_prepare_boot_cpu(void)
101 104
102 cpu_set(0, cpu_online_map); 105 cpu_set(0, cpu_online_map);
103 cpu_set(0, phys_cpu_present_map); 106 cpu_set(0, phys_cpu_present_map);
107 cpu_set(0, cpu_possible_map);
104} 108}
105 109
106void __init smp_cpus_done(unsigned int max_cpus) 110void __init smp_cpus_done(unsigned int max_cpus)
@@ -113,6 +117,7 @@ smp_boot_one_cpu(int cpuid)
113{ 117{
114 unsigned timeout; 118 unsigned timeout;
115 struct task_struct *idle; 119 struct task_struct *idle;
120 cpumask_t cpu_mask = CPU_MASK_NONE;
116 121
117 idle = fork_idle(cpuid); 122 idle = fork_idle(cpuid);
118 if (IS_ERR(idle)) 123 if (IS_ERR(idle))
@@ -124,6 +129,12 @@ smp_boot_one_cpu(int cpuid)
124 smp_init_current_idle_thread = task_thread_info(idle); 129 smp_init_current_idle_thread = task_thread_info(idle);
125 cpu_now_booting = cpuid; 130 cpu_now_booting = cpuid;
126 131
132 /* Kick it */
133 cpu_set(cpuid, cpu_online_map);
134 cpu_set(cpuid, cpu_mask);
135 send_ipi(IPI_BOOT, 0, cpu_mask);
136 cpu_clear(cpuid, cpu_online_map);
137
127 /* Wait for CPU to come online */ 138 /* Wait for CPU to come online */
128 for (timeout = 0; timeout < 10000; timeout++) { 139 for (timeout = 0; timeout < 10000; timeout++) {
129 if(cpu_online(cpuid)) { 140 if(cpu_online(cpuid)) {
@@ -165,7 +176,7 @@ void __init smp_callin(void)
165 /* Enable IRQ and idle */ 176 /* Enable IRQ and idle */
166 REG_WR(intr_vect, irq_regs[cpu], rw_mask, vect_mask); 177 REG_WR(intr_vect, irq_regs[cpu], rw_mask, vect_mask);
167 unmask_irq(IPI_INTR_VECT); 178 unmask_irq(IPI_INTR_VECT);
168 unmask_irq(TIMER_INTR_VECT); 179 unmask_irq(TIMER0_INTR_VECT);
169 preempt_disable(); 180 preempt_disable();
170 local_irq_enable(); 181 local_irq_enable();
171 182
@@ -328,7 +339,7 @@ int smp_call_function(void (*func)(void *info), void *info,
328 return ret; 339 return ret;
329} 340}
330 341
331irqreturn_t crisv32_ipi_interrupt(int irq, void *dev_id, struct pt_regs *regs) 342irqreturn_t crisv32_ipi_interrupt(int irq, void *dev_id)
332{ 343{
333 void (*func) (void *info) = call_data->func; 344 void (*func) (void *info) = call_data->func;
334 void *info = call_data->info; 345 void *info = call_data->info;
diff --git a/arch/cris/arch-v32/kernel/time.c b/arch/cris/arch-v32/kernel/time.c
index 2f7e8e200f2c..3a13dd6e0a9a 100644
--- a/arch/cris/arch-v32/kernel/time.c
+++ b/arch/cris/arch-v32/kernel/time.c
@@ -1,8 +1,7 @@
1/* $Id: time.c,v 1.19 2005/04/29 05:40:09 starvik Exp $ 1/*
2 *
3 * linux/arch/cris/arch-v32/kernel/time.c 2 * linux/arch/cris/arch-v32/kernel/time.c
4 * 3 *
5 * Copyright (C) 2003 Axis Communications AB 4 * Copyright (C) 2003-2007 Axis Communications AB
6 * 5 *
7 */ 6 */
8 7
@@ -14,28 +13,34 @@
14#include <linux/sched.h> 13#include <linux/sched.h>
15#include <linux/init.h> 14#include <linux/init.h>
16#include <linux/threads.h> 15#include <linux/threads.h>
16#include <linux/cpufreq.h>
17#include <asm/types.h> 17#include <asm/types.h>
18#include <asm/signal.h> 18#include <asm/signal.h>
19#include <asm/io.h> 19#include <asm/io.h>
20#include <asm/delay.h> 20#include <asm/delay.h>
21#include <asm/rtc.h> 21#include <asm/rtc.h>
22#include <asm/irq.h> 22#include <asm/irq.h>
23 23#include <asm/irq_regs.h>
24#include <asm/arch/hwregs/reg_map.h> 24
25#include <asm/arch/hwregs/reg_rdwr.h> 25#include <hwregs/reg_map.h>
26#include <asm/arch/hwregs/timer_defs.h> 26#include <hwregs/reg_rdwr.h>
27#include <asm/arch/hwregs/intr_vect_defs.h> 27#include <hwregs/timer_defs.h>
28#include <hwregs/intr_vect_defs.h>
29#ifdef CONFIG_CRIS_MACH_ARTPEC3
30#include <hwregs/clkgen_defs.h>
31#endif
28 32
29/* Watchdog defines */ 33/* Watchdog defines */
30#define ETRAX_WD_KEY_MASK 0x7F /* key is 7 bit */ 34#define ETRAX_WD_KEY_MASK 0x7F /* key is 7 bit */
31#define ETRAX_WD_HZ 763 /* watchdog counts at 763 Hz */ 35#define ETRAX_WD_HZ 763 /* watchdog counts at 763 Hz */
32#define ETRAX_WD_CNT ((2*ETRAX_WD_HZ)/HZ + 1) /* Number of 763 counts before watchdog bites */ 36/* Number of 763 counts before watchdog bites */
37#define ETRAX_WD_CNT ((2*ETRAX_WD_HZ)/HZ + 1)
33 38
34unsigned long timer_regs[NR_CPUS] = 39unsigned long timer_regs[NR_CPUS] =
35{ 40{
36 regi_timer, 41 regi_timer0,
37#ifdef CONFIG_SMP 42#ifdef CONFIG_SMP
38 regi_timer2 43 regi_timer2
39#endif 44#endif
40}; 45};
41 46
@@ -44,12 +49,22 @@ extern int set_rtc_mmss(unsigned long nowtime);
44extern int setup_irq(int, struct irqaction *); 49extern int setup_irq(int, struct irqaction *);
45extern int have_rtc; 50extern int have_rtc;
46 51
52#ifdef CONFIG_CPU_FREQ
53static int
54cris_time_freq_notifier(struct notifier_block *nb, unsigned long val,
55 void *data);
56
57static struct notifier_block cris_time_freq_notifier_block = {
58 .notifier_call = cris_time_freq_notifier,
59};
60#endif
61
47unsigned long get_ns_in_jiffie(void) 62unsigned long get_ns_in_jiffie(void)
48{ 63{
49 reg_timer_r_tmr0_data data; 64 reg_timer_r_tmr0_data data;
50 unsigned long ns; 65 unsigned long ns;
51 66
52 data = REG_RD(timer, regi_timer, r_tmr0_data); 67 data = REG_RD(timer, regi_timer0, r_tmr0_data);
53 ns = (TIMER0_DIV - data) * 10; 68 ns = (TIMER0_DIV - data) * 10;
54 return ns; 69 return ns;
55} 70}
@@ -59,31 +74,27 @@ unsigned long do_slow_gettimeoffset(void)
59 unsigned long count; 74 unsigned long count;
60 unsigned long usec_count = 0; 75 unsigned long usec_count = 0;
61 76
62 static unsigned long count_p = TIMER0_DIV;/* for the first call after boot */ 77 /* For the first call after boot */
78 static unsigned long count_p = TIMER0_DIV;
63 static unsigned long jiffies_p = 0; 79 static unsigned long jiffies_p = 0;
64 80
65 /* 81 /* Cache volatile jiffies temporarily; we have IRQs turned off. */
66 * cache volatile jiffies temporarily; we have IRQs turned off.
67 */
68 unsigned long jiffies_t; 82 unsigned long jiffies_t;
69 83
70 /* The timer interrupt comes from Etrax timer 0. In order to get 84 /* The timer interrupt comes from Etrax timer 0. In order to get
71 * better precision, we check the current value. It might have 85 * better precision, we check the current value. It might have
72 * underflowed already though. 86 * underflowed already though. */
73 */ 87 count = REG_RD(timer, regi_timer0, r_tmr0_data);
88 jiffies_t = jiffies;
74 89
75 count = REG_RD(timer, regi_timer, r_tmr0_data); 90 /* Avoiding timer inconsistencies (they are rare, but they happen)
76 jiffies_t = jiffies; 91 * There is one problem that must be avoided here:
77 92 * 1. the timer counter underflows
78 /*
79 * avoiding timer inconsistencies (they are rare, but they happen)...
80 * there are one problem that must be avoided here:
81 * 1. the timer counter underflows
82 */ 93 */
83 if( jiffies_t == jiffies_p ) { 94 if( jiffies_t == jiffies_p ) {
84 if( count > count_p ) { 95 if( count > count_p ) {
85 /* Timer wrapped, use new count and prescale 96 /* Timer wrapped, use new count and prescale.
86 * increase the time corresponding to one jiffie 97 * Increase the time corresponding to one jiffy.
87 */ 98 */
88 usec_count = 1000000/HZ; 99 usec_count = 1000000/HZ;
89 } 100 }
@@ -106,17 +117,15 @@ unsigned long do_slow_gettimeoffset(void)
106 */ 117 */
107/* This gives us 1.3 ms to do something useful when the NMI comes */ 118/* This gives us 1.3 ms to do something useful when the NMI comes */
108 119
109/* right now, starting the watchdog is the same as resetting it */ 120/* Right now, starting the watchdog is the same as resetting it */
110#define start_watchdog reset_watchdog 121#define start_watchdog reset_watchdog
111 122
112#if defined(CONFIG_ETRAX_WATCHDOG) 123#if defined(CONFIG_ETRAX_WATCHDOG)
113static short int watchdog_key = 42; /* arbitrary 7 bit number */ 124static short int watchdog_key = 42; /* arbitrary 7 bit number */
114#endif 125#endif
115 126
116/* number of pages to consider "out of memory". it is normal that the memory 127/* Number of pages to consider "out of memory". It is normal that the memory
117 * is used though, so put this really low. 128 * is used though, so set this really low. */
118 */
119
120#define WATCHDOG_MIN_FREE_PAGES 8 129#define WATCHDOG_MIN_FREE_PAGES 8
121 130
122void 131void
@@ -125,14 +134,15 @@ reset_watchdog(void)
125#if defined(CONFIG_ETRAX_WATCHDOG) 134#if defined(CONFIG_ETRAX_WATCHDOG)
126 reg_timer_rw_wd_ctrl wd_ctrl = { 0 }; 135 reg_timer_rw_wd_ctrl wd_ctrl = { 0 };
127 136
128 /* only keep watchdog happy as long as we have memory left! */ 137 /* Only keep watchdog happy as long as we have memory left! */
129 if(nr_free_pages() > WATCHDOG_MIN_FREE_PAGES) { 138 if(nr_free_pages() > WATCHDOG_MIN_FREE_PAGES) {
130 /* reset the watchdog with the inverse of the old key */ 139 /* Reset the watchdog with the inverse of the old key */
131 watchdog_key ^= ETRAX_WD_KEY_MASK; /* invert key, which is 7 bits */ 140 /* Invert key, which is 7 bits */
141 watchdog_key ^= ETRAX_WD_KEY_MASK;
132 wd_ctrl.cnt = ETRAX_WD_CNT; 142 wd_ctrl.cnt = ETRAX_WD_CNT;
133 wd_ctrl.cmd = regk_timer_start; 143 wd_ctrl.cmd = regk_timer_start;
134 wd_ctrl.key = watchdog_key; 144 wd_ctrl.key = watchdog_key;
135 REG_WR(timer, regi_timer, rw_wd_ctrl, wd_ctrl); 145 REG_WR(timer, regi_timer0, rw_wd_ctrl, wd_ctrl);
136 } 146 }
137#endif 147#endif
138} 148}
@@ -148,7 +158,7 @@ stop_watchdog(void)
148 wd_ctrl.cnt = ETRAX_WD_CNT; 158 wd_ctrl.cnt = ETRAX_WD_CNT;
149 wd_ctrl.cmd = regk_timer_stop; 159 wd_ctrl.cmd = regk_timer_stop;
150 wd_ctrl.key = watchdog_key; 160 wd_ctrl.key = watchdog_key;
151 REG_WR(timer, regi_timer, rw_wd_ctrl, wd_ctrl); 161 REG_WR(timer, regi_timer0, rw_wd_ctrl, wd_ctrl);
152#endif 162#endif
153} 163}
154 164
@@ -160,17 +170,28 @@ handle_watchdog_bite(struct pt_regs* regs)
160#if defined(CONFIG_ETRAX_WATCHDOG) 170#if defined(CONFIG_ETRAX_WATCHDOG)
161 extern int cause_of_death; 171 extern int cause_of_death;
162 172
163 raw_printk("Watchdog bite\n"); 173 oops_in_progress = 1;
174 printk(KERN_WARNING "Watchdog bite\n");
164 175
165 /* Check if forced restart or unexpected watchdog */ 176 /* Check if forced restart or unexpected watchdog */
166 if (cause_of_death == 0xbedead) { 177 if (cause_of_death == 0xbedead) {
178#ifdef CONFIG_CRIS_MACH_ARTPEC3
179 /* There is a bug in Artpec-3 (voodoo TR 78) that requires
180 * us to go to lower frequency for the reset to be reliable
181 */
182 reg_clkgen_rw_clk_ctrl ctrl =
183 REG_RD(clkgen, regi_clkgen, rw_clk_ctrl);
184 ctrl.pll = 0;
185 REG_WR(clkgen, regi_clkgen, rw_clk_ctrl, ctrl);
186#endif
167 while(1); 187 while(1);
168 } 188 }
169 189
170 /* Unexpected watchdog, stop the watchdog and dump registers*/ 190 /* Unexpected watchdog, stop the watchdog and dump registers. */
171 stop_watchdog(); 191 stop_watchdog();
172 raw_printk("Oops: bitten by watchdog\n"); 192 printk(KERN_WARNING "Oops: bitten by watchdog\n");
173 show_registers(regs); 193 show_registers(regs);
194 oops_in_progress = 0;
174#ifndef CONFIG_ETRAX_WATCHDOG_NICE_DOGGY 195#ifndef CONFIG_ETRAX_WATCHDOG_NICE_DOGGY
175 reset_watchdog(); 196 reset_watchdog();
176#endif 197#endif
@@ -178,21 +199,19 @@ handle_watchdog_bite(struct pt_regs* regs)
178#endif 199#endif
179} 200}
180 201
181/* last time the cmos clock got updated */ 202/* Last time the cmos clock got updated. */
182static long last_rtc_update = 0; 203static long last_rtc_update = 0;
183 204
184/* 205/*
185 * timer_interrupt() needs to keep up the real-time clock, 206 * timer_interrupt() needs to keep up the real-time clock,
186 * as well as call the "do_timer()" routine every clocktick 207 * as well as call the "do_timer()" routine every clocktick.
187 */ 208 */
188
189//static unsigned short myjiff; /* used by our debug routine print_timestamp */
190
191extern void cris_do_profile(struct pt_regs *regs); 209extern void cris_do_profile(struct pt_regs *regs);
192 210
193static inline irqreturn_t 211static inline irqreturn_t
194timer_interrupt(int irq, void *dev_id, struct pt_regs *regs) 212timer_interrupt(int irq, void *dev_id)
195{ 213{
214 struct pt_regs *regs = get_irq_regs();
196 int cpu = smp_processor_id(); 215 int cpu = smp_processor_id();
197 reg_timer_r_masked_intr masked_intr; 216 reg_timer_r_masked_intr masked_intr;
198 reg_timer_rw_ack_intr ack_intr = { 0 }; 217 reg_timer_rw_ack_intr ack_intr = { 0 };
@@ -202,11 +221,11 @@ timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
202 if (!masked_intr.tmr0) 221 if (!masked_intr.tmr0)
203 return IRQ_NONE; 222 return IRQ_NONE;
204 223
205 /* acknowledge the timer irq */ 224 /* Acknowledge the timer irq. */
206 ack_intr.tmr0 = 1; 225 ack_intr.tmr0 = 1;
207 REG_WR(timer, timer_regs[cpu], rw_ack_intr, ack_intr); 226 REG_WR(timer, timer_regs[cpu], rw_ack_intr, ack_intr);
208 227
209 /* reset watchdog otherwise it resets us! */ 228 /* Reset watchdog otherwise it resets us! */
210 reset_watchdog(); 229 reset_watchdog();
211 230
212 /* Update statistics. */ 231 /* Update statistics. */
@@ -218,7 +237,7 @@ timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
218 if (cpu != 0) 237 if (cpu != 0)
219 return IRQ_HANDLED; 238 return IRQ_HANDLED;
220 239
221 /* call the real timer interrupt handler */ 240 /* Call the real timer interrupt handler */
222 do_timer(1); 241 do_timer(1);
223 242
224 /* 243 /*
@@ -236,17 +255,17 @@ timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
236 if (set_rtc_mmss(xtime.tv_sec) == 0) 255 if (set_rtc_mmss(xtime.tv_sec) == 0)
237 last_rtc_update = xtime.tv_sec; 256 last_rtc_update = xtime.tv_sec;
238 else 257 else
239 last_rtc_update = xtime.tv_sec - 600; /* do it again in 60 s */ 258 /* Do it again in 60 s */
259 last_rtc_update = xtime.tv_sec - 600;
240 } 260 }
241 return IRQ_HANDLED; 261 return IRQ_HANDLED;
242} 262}
243 263
244/* timer is IRQF_SHARED so drivers can add stuff to the timer irq chain 264/* Timer is IRQF_SHARED so drivers can add stuff to the timer irq chain.
245 * it needs to be IRQF_DISABLED to make the jiffies update work properly 265 * It needs to be IRQF_DISABLED to make the jiffies update work properly.
246 */ 266 */
247 267static struct irqaction irq_timer = {
248static struct irqaction irq_timer = { 268 .handler = timer_interrupt,
249 .mask = timer_interrupt,
250 .flags = IRQF_SHARED | IRQF_DISABLED, 269 .flags = IRQF_SHARED | IRQF_DISABLED,
251 .mask = CPU_MASK_NONE, 270 .mask = CPU_MASK_NONE,
252 .name = "timer" 271 .name = "timer"
@@ -256,27 +275,27 @@ void __init
256cris_timer_init(void) 275cris_timer_init(void)
257{ 276{
258 int cpu = smp_processor_id(); 277 int cpu = smp_processor_id();
259 reg_timer_rw_tmr0_ctrl tmr0_ctrl = { 0 }; 278 reg_timer_rw_tmr0_ctrl tmr0_ctrl = { 0 };
260 reg_timer_rw_tmr0_div tmr0_div = TIMER0_DIV; 279 reg_timer_rw_tmr0_div tmr0_div = TIMER0_DIV;
261 reg_timer_rw_intr_mask timer_intr_mask; 280 reg_timer_rw_intr_mask timer_intr_mask;
262 281
263 /* Setup the etrax timers 282 /* Setup the etrax timers.
264 * Base frequency is 100MHz, divider 1000000 -> 100 HZ 283 * Base frequency is 100MHz, divider 1000000 -> 100 HZ
265 * We use timer0, so timer1 is free. 284 * We use timer0, so timer1 is free.
266 * The trig timer is used by the fasttimer API if enabled. 285 * The trig timer is used by the fasttimer API if enabled.
267 */ 286 */
268 287
269 tmr0_ctrl.op = regk_timer_ld; 288 tmr0_ctrl.op = regk_timer_ld;
270 tmr0_ctrl.freq = regk_timer_f100; 289 tmr0_ctrl.freq = regk_timer_f100;
271 REG_WR(timer, timer_regs[cpu], rw_tmr0_div, tmr0_div); 290 REG_WR(timer, timer_regs[cpu], rw_tmr0_div, tmr0_div);
272 REG_WR(timer, timer_regs[cpu], rw_tmr0_ctrl, tmr0_ctrl); /* Load */ 291 REG_WR(timer, timer_regs[cpu], rw_tmr0_ctrl, tmr0_ctrl); /* Load */
273 tmr0_ctrl.op = regk_timer_run; 292 tmr0_ctrl.op = regk_timer_run;
274 REG_WR(timer, timer_regs[cpu], rw_tmr0_ctrl, tmr0_ctrl); /* Start */ 293 REG_WR(timer, timer_regs[cpu], rw_tmr0_ctrl, tmr0_ctrl); /* Start */
275 294
276 /* enable the timer irq */ 295 /* Enable the timer irq. */
277 timer_intr_mask = REG_RD(timer, timer_regs[cpu], rw_intr_mask); 296 timer_intr_mask = REG_RD(timer, timer_regs[cpu], rw_intr_mask);
278 timer_intr_mask.tmr0 = 1; 297 timer_intr_mask.tmr0 = 1;
279 REG_WR(timer, timer_regs[cpu], rw_intr_mask, timer_intr_mask); 298 REG_WR(timer, timer_regs[cpu], rw_intr_mask, timer_intr_mask);
280} 299}
281 300
282void __init 301void __init
@@ -284,7 +303,7 @@ time_init(void)
284{ 303{
285 reg_intr_vect_rw_mask intr_mask; 304 reg_intr_vect_rw_mask intr_mask;
286 305
287 /* probe for the RTC and read it if it exists 306 /* Probe for the RTC and read it if it exists.
288 * Before the RTC can be probed the loops_per_usec variable needs 307 * Before the RTC can be probed the loops_per_usec variable needs
289 * to be initialized to make usleep work. A better value for 308 * to be initialized to make usleep work. A better value for
290 * loops_per_usec is calculated by the kernel later once the 309 * loops_per_usec is calculated by the kernel later once the
@@ -293,52 +312,74 @@ time_init(void)
293 loops_per_usec = 50; 312 loops_per_usec = 50;
294 313
295 if(RTC_INIT() < 0) { 314 if(RTC_INIT() < 0) {
296 /* no RTC, start at 1980 */ 315 /* No RTC, start at 1980 */
297 xtime.tv_sec = 0; 316 xtime.tv_sec = 0;
298 xtime.tv_nsec = 0; 317 xtime.tv_nsec = 0;
299 have_rtc = 0; 318 have_rtc = 0;
300 } else { 319 } else {
301 /* get the current time */ 320 /* Get the current time */
302 have_rtc = 1; 321 have_rtc = 1;
303 update_xtime_from_cmos(); 322 update_xtime_from_cmos();
304 } 323 }
305 324
306 /* 325 /*
307 * Initialize wall_to_monotonic such that adding it to xtime will yield zero, the 326 * Initialize wall_to_monotonic such that adding it to
308 * tv_nsec field must be normalized (i.e., 0 <= nsec < NSEC_PER_SEC). 327 * xtime will yield zero, the tv_nsec field must be normalized
328 * (i.e., 0 <= nsec < NSEC_PER_SEC).
309 */ 329 */
310 set_normalized_timespec(&wall_to_monotonic, -xtime.tv_sec, -xtime.tv_nsec); 330 set_normalized_timespec(&wall_to_monotonic, -xtime.tv_sec, -xtime.tv_nsec);
311 331
312 /* Start CPU local timer */ 332 /* Start CPU local timer. */
313 cris_timer_init(); 333 cris_timer_init();
314 334
315 /* enable the timer irq in global config */ 335 /* Enable the timer irq in global config. */
316 intr_mask = REG_RD(intr_vect, regi_irq, rw_mask); 336 intr_mask = REG_RD_VECT(intr_vect, regi_irq, rw_mask, 1);
317 intr_mask.timer = 1; 337 intr_mask.timer0 = 1;
318 REG_WR(intr_vect, regi_irq, rw_mask, intr_mask); 338 REG_WR_VECT(intr_vect, regi_irq, rw_mask, 1, intr_mask);
319
320 /* now actually register the timer irq handler that calls timer_interrupt() */
321 339
322 setup_irq(TIMER_INTR_VECT, &irq_timer); 340 /* Now actually register the timer irq handler that calls
341 * timer_interrupt(). */
342 setup_irq(TIMER0_INTR_VECT, &irq_timer);
323 343
324 /* enable watchdog if we should use one */ 344 /* Enable watchdog if we should use one. */
325 345
326#if defined(CONFIG_ETRAX_WATCHDOG) 346#if defined(CONFIG_ETRAX_WATCHDOG)
327 printk("Enabling watchdog...\n"); 347 printk(KERN_INFO "Enabling watchdog...\n");
328 start_watchdog(); 348 start_watchdog();
329 349
330 /* If we use the hardware watchdog, we want to trap it as an NMI 350 /* If we use the hardware watchdog, we want to trap it as an NMI
331 and dump registers before it resets us. For this to happen, we 351 * and dump registers before it resets us. For this to happen, we
332 must set the "m" NMI enable flag (which once set, is unset only 352 * must set the "m" NMI enable flag (which once set, is unset only
333 when an NMI is taken). 353 * when an NMI is taken). */
334 354 {
335 The same goes for the external NMI, but that doesn't have any 355 unsigned long flags;
336 driver or infrastructure support yet. */ 356 local_save_flags(flags);
337 { 357 flags |= (1<<30); /* NMI M flag is at bit 30 */
338 unsigned long flags; 358 local_irq_restore(flags);
339 local_save_flags(flags); 359 }
340 flags |= (1<<30); /* NMI M flag is at bit 30 */ 360#endif
341 local_irq_restore(flags); 361
342 } 362#ifdef CONFIG_CPU_FREQ
363 cpufreq_register_notifier(&cris_time_freq_notifier_block,
364 CPUFREQ_TRANSITION_NOTIFIER);
343#endif 365#endif
344} 366}
367
368#ifdef CONFIG_CPU_FREQ
369static int
370cris_time_freq_notifier(struct notifier_block *nb, unsigned long val,
371 void *data)
372{
373 struct cpufreq_freqs *freqs = data;
374 if (val == CPUFREQ_POSTCHANGE) {
375 reg_timer_r_tmr0_data data;
376 reg_timer_rw_tmr0_div div = (freqs->new * 500) / HZ;
377 do {
378 data = REG_RD(timer, timer_regs[freqs->cpu],
379 r_tmr0_data);
380 } while (data > 20);
381 REG_WR(timer, timer_regs[freqs->cpu], rw_tmr0_div, div);
382 }
383 return 0;
384}
385#endif
diff --git a/arch/cris/arch-v32/kernel/traps.c b/arch/cris/arch-v32/kernel/traps.c
index 17fd3dbd1c80..9003e382cada 100644
--- a/arch/cris/arch-v32/kernel/traps.c
+++ b/arch/cris/arch-v32/kernel/traps.c
@@ -1,50 +1,45 @@
1/* 1/*
2 * Copyright (C) 2003, Axis Communications AB. 2 * Copyright (C) 2003-2006, Axis Communications AB.
3 */ 3 */
4 4
5#include <linux/ptrace.h> 5#include <linux/ptrace.h>
6#include <linux/module.h>
6#include <asm/uaccess.h> 7#include <asm/uaccess.h>
7 8#include <hwregs/supp_reg.h>
8#include <asm/arch/hwregs/supp_reg.h> 9#include <hwregs/intr_vect_defs.h>
9 10#include <asm/irq.h>
10extern void reset_watchdog(void);
11extern void stop_watchdog(void);
12
13extern int raw_printk(const char *fmt, ...);
14 11
15void 12void
16show_registers(struct pt_regs *regs) 13show_registers(struct pt_regs *regs)
17{ 14{
18 /* 15 /*
19 * It's possible to use either the USP register or current->thread.usp. 16 * It's possible to use either the USP register or current->thread.usp.
20 * USP might not correspond to the current proccess for all cases this 17 * USP might not correspond to the current process for all cases this
21 * function is called, and current->thread.usp isn't up to date for the 18 * function is called, and current->thread.usp isn't up to date for the
22 * current proccess. Experience shows that using USP is the way to go. 19 * current process. Experience shows that using USP is the way to go.
23 */ 20 */
24 unsigned long usp; 21 unsigned long usp = rdusp();
25 unsigned long d_mmu_cause; 22 unsigned long d_mmu_cause;
26 unsigned long i_mmu_cause; 23 unsigned long i_mmu_cause;
27 24
28 usp = rdusp(); 25 printk("CPU: %d\n", smp_processor_id());
29 26
30 raw_printk("CPU: %d\n", smp_processor_id()); 27 printk("ERP: %08lx SRP: %08lx CCS: %08lx USP: %08lx MOF: %08lx\n",
28 regs->erp, regs->srp, regs->ccs, usp, regs->mof);
31 29
32 raw_printk("ERP: %08lx SRP: %08lx CCS: %08lx USP: %08lx MOF: %08lx\n", 30 printk(" r0: %08lx r1: %08lx r2: %08lx r3: %08lx\n",
33 regs->erp, regs->srp, regs->ccs, usp, regs->mof); 31 regs->r0, regs->r1, regs->r2, regs->r3);
34 32
35 raw_printk(" r0: %08lx r1: %08lx r2: %08lx r3: %08lx\n", 33 printk(" r4: %08lx r5: %08lx r6: %08lx r7: %08lx\n",
36 regs->r0, regs->r1, regs->r2, regs->r3); 34 regs->r4, regs->r5, regs->r6, regs->r7);
37 35
38 raw_printk(" r4: %08lx r5: %08lx r6: %08lx r7: %08lx\n", 36 printk(" r8: %08lx r9: %08lx r10: %08lx r11: %08lx\n",
39 regs->r4, regs->r5, regs->r6, regs->r7); 37 regs->r8, regs->r9, regs->r10, regs->r11);
40 38
41 raw_printk(" r8: %08lx r9: %08lx r10: %08lx r11: %08lx\n", 39 printk("r12: %08lx r13: %08lx oR10: %08lx acr: %08lx\n",
42 regs->r8, regs->r9, regs->r10, regs->r11); 40 regs->r12, regs->r13, regs->orig_r10, regs->acr);
43 41
44 raw_printk("r12: %08lx r13: %08lx oR10: %08lx acr: %08lx\n", 42 printk(" sp: %08lx\n", (unsigned long)regs);
45 regs->r12, regs->r13, regs->orig_r10, regs->acr);
46
47 raw_printk("sp: %08lx\n", regs);
48 43
49 SUPP_BANK_SEL(BANK_IM); 44 SUPP_BANK_SEL(BANK_IM);
50 SUPP_REG_RD(RW_MM_CAUSE, i_mmu_cause); 45 SUPP_REG_RD(RW_MM_CAUSE, i_mmu_cause);
@@ -52,18 +47,20 @@ show_registers(struct pt_regs *regs)
52 SUPP_BANK_SEL(BANK_DM); 47 SUPP_BANK_SEL(BANK_DM);
53 SUPP_REG_RD(RW_MM_CAUSE, d_mmu_cause); 48 SUPP_REG_RD(RW_MM_CAUSE, d_mmu_cause);
54 49
55 raw_printk(" Data MMU Cause: %08lx\n", d_mmu_cause); 50 printk(" Data MMU Cause: %08lx\n", d_mmu_cause);
56 raw_printk("Instruction MMU Cause: %08lx\n", i_mmu_cause); 51 printk("Instruction MMU Cause: %08lx\n", i_mmu_cause);
57 52
58 raw_printk("Process %s (pid: %d, stackpage: %08lx)\n", 53 printk("Process %s (pid: %d, stackpage=%08lx)\n",
59 current->comm, current->pid, (unsigned long) current); 54 current->comm, current->pid, (unsigned long)current);
60 55
61 /* Show additional info if in kernel-mode. */ 56 /*
57 * When in-kernel, we also print out the stack and code at the
58 * time of the fault..
59 */
62 if (!user_mode(regs)) { 60 if (!user_mode(regs)) {
63 int i; 61 int i;
64 unsigned char c;
65 62
66 show_stack(NULL, (unsigned long *) usp); 63 show_stack(NULL, (unsigned long *)usp);
67 64
68 /* 65 /*
69 * If the previous stack-dump wasn't a kernel one, dump the 66 * If the previous stack-dump wasn't a kernel one, dump the
@@ -72,7 +69,7 @@ show_registers(struct pt_regs *regs)
72 if (usp != 0) 69 if (usp != 0)
73 show_stack(NULL, NULL); 70 show_stack(NULL, NULL);
74 71
75 raw_printk("\nCode: "); 72 printk("\nCode: ");
76 73
77 if (regs->erp < PAGE_OFFSET) 74 if (regs->erp < PAGE_OFFSET)
78 goto bad_value; 75 goto bad_value;
@@ -84,76 +81,115 @@ show_registers(struct pt_regs *regs)
84 * instruction decoding should be in sync at the interesting 81 * instruction decoding should be in sync at the interesting
85 * point, but small enough to fit on a row. The regs->erp 82 * point, but small enough to fit on a row. The regs->erp
86 * location is pointed out in a ksymoops-friendly way by 83 * location is pointed out in a ksymoops-friendly way by
87 * wrapping the byte for that address in parenthesis. 84 * wrapping the byte for that address in parenthesises.
88 */ 85 */
89 for (i = -12; i < 12; i++) { 86 for (i = -12; i < 12; i++) {
90 if (__get_user(c, &((unsigned char *) regs->erp)[i])) { 87 unsigned char c;
88
89 if (__get_user(c, &((unsigned char *)regs->erp)[i])) {
91bad_value: 90bad_value:
92 raw_printk(" Bad IP value."); 91 printk(" Bad IP value.");
93 break; 92 break;
94 } 93 }
95 94
96 if (i == 0) 95 if (i == 0)
97 raw_printk("(%02x) ", c); 96 printk("(%02x) ", c);
98 else 97 else
99 raw_printk("%02x ", c); 98 printk("%02x ", c);
100 } 99 }
101 100 printk("\n");
102 raw_printk("\n");
103 } 101 }
104} 102}
105 103
106/*
107 * This gets called from entry.S when the watchdog has bitten. Show something
108 * similar to an Oops dump, and if the kernel is configured to be a nice doggy;
109 * halt instead of reboot.
110 */
111void 104void
112watchdog_bite_hook(struct pt_regs *regs) 105arch_enable_nmi(void)
113{ 106{
114#ifdef CONFIG_ETRAX_WATCHDOG_NICE_DOGGY 107 unsigned long flags;
115 local_irq_disable();
116 stop_watchdog();
117 show_registers(regs);
118 108
119 while (1) 109 local_save_flags(flags);
120 ; /* Do nothing. */ 110 flags |= (1 << 30); /* NMI M flag is at bit 30 */
121#else 111 local_irq_restore(flags);
122 show_registers(regs);
123#endif
124} 112}
125 113
126/* This is normally the Oops function. */ 114extern void (*nmi_handler)(struct pt_regs *);
127void 115void handle_nmi(struct pt_regs *regs)
128die_if_kernel(const char *str, struct pt_regs *regs, long err)
129{ 116{
130 if (user_mode(regs)) 117#ifdef CONFIG_ETRAXFS
131 return; 118 reg_intr_vect_r_nmi r;
119#endif
132 120
133#ifdef CONFIG_ETRAX_WATCHDOG_NICE_DOGGY 121 if (nmi_handler)
134 /* 122 nmi_handler(regs);
135 * This printout might take too long and could trigger 123
136 * the watchdog normally. If NICE_DOGGY is set, simply 124#ifdef CONFIG_ETRAXFS
137 * stop the watchdog during the printout. 125 /* Wait until nmi is no longer active. */
138 */ 126 do {
139 stop_watchdog(); 127 r = REG_RD(intr_vect, regi_irq, r_nmi);
128 } while (r.ext == regk_intr_vect_on);
140#endif 129#endif
130}
141 131
142 raw_printk("%s: %04lx\n", str, err & 0xffff);
143 132
144 show_registers(regs); 133#ifdef CONFIG_BUG
134extern void die_if_kernel(const char *str, struct pt_regs *regs, long err);
145 135
146#ifdef CONFIG_ETRAX_WATCHDOG_NICE_DOGGY 136/* Copy of the regs at BUG() time. */
147 reset_watchdog(); 137struct pt_regs BUG_regs;
148#endif
149 138
150 do_exit(SIGSEGV); 139void do_BUG(char *file, unsigned int line)
140{
141 printk("kernel BUG at %s:%d!\n", file, line);
142 die_if_kernel("Oops", &BUG_regs, 0);
151} 143}
144EXPORT_SYMBOL(do_BUG);
152 145
153void arch_enable_nmi(void) 146void fixup_BUG(struct pt_regs *regs)
154{ 147{
155 unsigned long flags; 148 BUG_regs = *regs;
156 local_save_flags(flags); 149
157 flags |= (1<<30); /* NMI M flag is at bit 30 */ 150#ifdef CONFIG_DEBUG_BUGVERBOSE
158 local_irq_restore(flags); 151 /*
152 * Fixup the BUG arguments through exception handlers.
153 */
154 {
155 const struct exception_table_entry *fixup;
156
157 /*
158 * ERP points at the "break 14" + 2, compensate for the 2
159 * bytes.
160 */
161 fixup = search_exception_tables(instruction_pointer(regs) - 2);
162 if (fixup) {
163 /* Adjust the instruction pointer in the stackframe. */
164 instruction_pointer(regs) = fixup->fixup;
165 arch_fixup(regs);
166 }
167 }
168#else
169 /* Dont try to lookup the filename + line, just dump regs. */
170 do_BUG("unknown", 0);
171#endif
159} 172}
173
174/*
175 * Break 14 handler. Save regs and jump into the fixup_BUG.
176 */
177__asm__ ( ".text\n\t"
178 ".global breakh_BUG\n\t"
179 "breakh_BUG:\n\t"
180 SAVE_ALL
181 KGDB_FIXUP
182 "move.d $sp, $r10\n\t"
183 "jsr fixup_BUG\n\t"
184 "nop\n\t"
185 "jump ret_from_intr\n\t"
186 "nop\n\t");
187
188
189#ifdef CONFIG_DEBUG_BUGVERBOSE
190void
191handle_BUG(struct pt_regs *regs)
192{
193}
194#endif
195#endif
diff --git a/arch/cris/arch-v32/kernel/vcs_hook.c b/arch/cris/arch-v32/kernel/vcs_hook.c
deleted file mode 100644
index 64d71c54c22c..000000000000
--- a/arch/cris/arch-v32/kernel/vcs_hook.c
+++ /dev/null
@@ -1,96 +0,0 @@
1// $Id: vcs_hook.c,v 1.2 2003/08/12 12:01:06 starvik Exp $
2//
3// Call simulator hook. This is the part running in the
4// simulated program.
5//
6
7#include "vcs_hook.h"
8#include <stdarg.h>
9#include <asm/arch-v32/hwregs/reg_map.h>
10#include <asm/arch-v32/hwregs/intr_vect_defs.h>
11
12#define HOOK_TRIG_ADDR 0xb7000000 /* hook cvlog model reg address */
13#define HOOK_MEM_BASE_ADDR 0xa0000000 /* csp4 (shared mem) base addr */
14
15#define HOOK_DATA(offset) ((unsigned*) HOOK_MEM_BASE_ADDR)[offset]
16#define VHOOK_DATA(offset) ((volatile unsigned*) HOOK_MEM_BASE_ADDR)[offset]
17#define HOOK_TRIG(funcid) do { *((unsigned *) HOOK_TRIG_ADDR) = funcid; } while(0)
18#define HOOK_DATA_BYTE(offset) ((unsigned char*) HOOK_MEM_BASE_ADDR)[offset]
19
20
21// ------------------------------------------------------------------ hook_call
22int hook_call( unsigned id, unsigned pcnt, ...) {
23 va_list ap;
24 unsigned i;
25 unsigned ret;
26#ifdef USING_SOS
27 PREEMPT_OFF_SAVE();
28#endif
29
30 // pass parameters
31 HOOK_DATA(0) = id;
32
33 /* Have to make hook_print_str a special case since we call with a
34 parameter of byte type. Should perhaps be a separate
35 hook_call. */
36
37 if (id == hook_print_str) {
38 int i;
39 char *str;
40
41 HOOK_DATA(1) = pcnt;
42
43 va_start(ap, pcnt);
44 str = (char*)va_arg(ap,unsigned);
45
46 for (i=0; i!=pcnt; i++) {
47 HOOK_DATA_BYTE(8+i) = str[i];
48 }
49 HOOK_DATA_BYTE(8+i) = 0; /* null byte */
50 }
51 else {
52 va_start(ap, pcnt);
53 for( i = 1; i <= pcnt; i++ ) HOOK_DATA(i) = va_arg(ap,unsigned);
54 va_end(ap);
55 }
56
57 // read from mem to make sure data has propagated to memory before trigging
58 *((volatile unsigned*) HOOK_MEM_BASE_ADDR);
59
60 // trigger hook
61 HOOK_TRIG(id);
62
63 // wait for call to finish
64 while( VHOOK_DATA(0) > 0 ) {}
65
66 // extract return value
67
68 ret = VHOOK_DATA(1);
69
70#ifdef USING_SOS
71 PREEMPT_RESTORE();
72#endif
73 return ret;
74}
75
76unsigned
77hook_buf(unsigned i)
78{
79 return (HOOK_DATA(i));
80}
81
82void print_str( const char *str ) {
83 int i;
84 for (i=1; str[i]; i++); /* find null at end of string */
85 hook_call(hook_print_str, i, str);
86}
87
88// --------------------------------------------------------------- CPU_KICK_DOG
89void CPU_KICK_DOG(void) {
90 (void) hook_call( hook_kick_dog, 0 );
91}
92
93// ------------------------------------------------------- CPU_WATCHDOG_TIMEOUT
94void CPU_WATCHDOG_TIMEOUT( unsigned t ) {
95 (void) hook_call( hook_dog_timeout, 1, t );
96}
diff --git a/arch/cris/arch-v32/lib/Makefile b/arch/cris/arch-v32/lib/Makefile
index 05b3ec6978d6..eb4aad1f1158 100644
--- a/arch/cris/arch-v32/lib/Makefile
+++ b/arch/cris/arch-v32/lib/Makefile
@@ -2,5 +2,6 @@
2# Makefile for Etrax-specific library files.. 2# Makefile for Etrax-specific library files..
3# 3#
4 4
5lib-y = checksum.o checksumcopy.o string.o usercopy.o memset.o csumcpfruser.o spinlock.o 5lib-y = checksum.o checksumcopy.o string.o usercopy.o memset.o \
6 csumcpfruser.o spinlock.o delay.o
6 7
diff --git a/arch/cris/arch-v32/lib/checksum.S b/arch/cris/arch-v32/lib/checksum.S
index 32e66181b826..87f3fd71ab10 100644
--- a/arch/cris/arch-v32/lib/checksum.S
+++ b/arch/cris/arch-v32/lib/checksum.S
@@ -1,6 +1,6 @@
1/* 1/*
2 * A fast checksum routine using movem 2 * A fast checksum routine using movem
3 * Copyright (c) 1998-2001, 2003 Axis Communications AB 3 * Copyright (c) 1998-2007 Axis Communications AB
4 * 4 *
5 * csum_partial(const unsigned char * buff, int len, unsigned int sum) 5 * csum_partial(const unsigned char * buff, int len, unsigned int sum)
6 */ 6 */
@@ -12,30 +12,23 @@ csum_partial:
12 ;; r11 - length 12 ;; r11 - length
13 ;; r12 - checksum 13 ;; r12 - checksum
14 14
15 ;; check for breakeven length between movem and normal word looping versions 15 ;; Optimized for large packets
16 ;; we also do _NOT_ want to compute a checksum over more than the 16 subq 10*4, $r11
17 ;; actual length when length < 40 17 blt _word_loop
18 18 move.d $r11, $acr
19 cmpu.w 80,$r11
20 blo _word_loop
21 nop
22
23 ;; need to save the registers we use below in the movem loop
24 ;; this overhead is why we have a check above for breakeven length
25 ;; only r0 - r8 have to be saved, the other ones are clobber-able
26 ;; according to the ABI
27 19
28 subq 9*4,$sp 20 subq 9*4,$sp
29 subq 10*4,$r11 ; update length for the first loop 21 clearf c
30 movem $r8,[$sp] 22 movem $r8,[$sp]
31 23
32 ;; do a movem checksum 24 ;; do a movem checksum
33 25
34_mloop: movem [$r10+],$r9 ; read 10 longwords 26_mloop: movem [$r10+],$r9 ; read 10 longwords
35 27 ;; Loop count without touching the c flag.
28 addoq -10*4, $acr, $acr
36 ;; perform dword checksumming on the 10 longwords 29 ;; perform dword checksumming on the 10 longwords
37 30
38 add.d $r0,$r12 31 addc $r0,$r12
39 addc $r1,$r12 32 addc $r1,$r12
40 addc $r2,$r12 33 addc $r2,$r12
41 addc $r3,$r12 34 addc $r3,$r12
@@ -46,60 +39,41 @@ _mloop: movem [$r10+],$r9 ; read 10 longwords
46 addc $r8,$r12 39 addc $r8,$r12
47 addc $r9,$r12 40 addc $r9,$r12
48 41
49 ;; fold the carry into the checksum, to avoid having to loop the carry 42 ;; test $acr without trashing carry.
50 ;; back into the top 43 move.d $acr, $acr
51 44 bpl _mloop
52 addc 0,$r12 45 ;; r11 <= acr is not really needed in the mloop, just using the dslot
53 addc 0,$r12 ; do it again, since we might have generated a carry 46 ;; to prepare for what is needed after mloop.
54 47 move.d $acr, $r11
55 subq 10*4,$r11
56 bge _mloop
57 nop
58
59 addq 10*4,$r11 ; compensate for last loop underflowing length
60 48
49 ;; fold the last carry into r13
50 addc 0, $r12
61 movem [$sp+],$r8 ; restore regs 51 movem [$sp+],$r8 ; restore regs
62 52
63_word_loop: 53_word_loop:
64 ;; only fold if there is anything to fold. 54 addq 10*4,$r11 ; compensate for last loop underflowing length
65
66 cmpq 0,$r12
67 beq _no_fold
68
69 ;; fold 32-bit checksum into a 16-bit checksum, to avoid carries below.
70 ;; r9 and r13 can be used as temporaries.
71 55
72 moveq -1,$r9 ; put 0xffff in r9, faster than move.d 0xffff,r9 56 moveq -1,$r9 ; put 0xffff in r9, faster than move.d 0xffff,r9
73 lsrq 16,$r9 57 lsrq 16,$r9
74 58
75 move.d $r12,$r13 59 move.d $r12,$r13
76 lsrq 16,$r13 ; r13 = checksum >> 16 60 lsrq 16,$r13 ; r13 = checksum >> 16
77 and.d $r9,$r12 ; checksum = checksum & 0xffff 61 and.d $r9,$r12 ; checksum = checksum & 0xffff
78 add.d $r13,$r12 ; checksum += r13
79 move.d $r12,$r13 ; do the same again, maybe we got a carry last add
80 lsrq 16,$r13
81 and.d $r9,$r12
82 add.d $r13,$r12
83 62
84_no_fold: 63_no_fold:
85 cmpq 2,$r11 64 subq 2,$r11
86 blt _no_words 65 blt _no_words
87 nop 66 add.d $r13,$r12 ; checksum += r13
88 67
89 ;; checksum the rest of the words 68 ;; checksum the rest of the words
90
91 subq 2,$r11
92
93_wloop: subq 2,$r11 69_wloop: subq 2,$r11
94 bge _wloop 70 bge _wloop
95 addu.w [$r10+],$r12 71 addu.w [$r10+],$r12
96 72
97 addq 2,$r11
98
99_no_words: 73_no_words:
74 addq 2,$r11
100 ;; see if we have one odd byte more 75 ;; see if we have one odd byte more
101 cmpq 1,$r11 76 bne _do_byte
102 beq _do_byte
103 nop 77 nop
104 ret 78 ret
105 move.d $r12,$r10 79 move.d $r12,$r10
diff --git a/arch/cris/arch-v32/lib/checksumcopy.S b/arch/cris/arch-v32/lib/checksumcopy.S
index 9303ccbadc6d..21aabe91489b 100644
--- a/arch/cris/arch-v32/lib/checksumcopy.S
+++ b/arch/cris/arch-v32/lib/checksumcopy.S
@@ -1,6 +1,6 @@
1/* 1/*
2 * A fast checksum+copy routine using movem 2 * A fast checksum+copy routine using movem
3 * Copyright (c) 1998, 2001, 2003 Axis Communications AB 3 * Copyright (c) 1998-2007 Axis Communications AB
4 * 4 *
5 * Authors: Bjorn Wesen 5 * Authors: Bjorn Wesen
6 * 6 *
@@ -16,32 +16,23 @@ csum_partial_copy_nocheck:
16 ;; r12 - length 16 ;; r12 - length
17 ;; r13 - checksum 17 ;; r13 - checksum
18 18
19 ;; check for breakeven length between movem and normal word looping versions 19 ;; Optimized for large packets
20 ;; we also do _NOT_ want to compute a checksum over more than the 20 subq 10*4, $r12
21 ;; actual length when length < 40 21 blt _word_loop
22 22 move.d $r12, $acr
23 cmpu.w 80,$r12
24 blo _word_loop
25 nop
26
27 ;; need to save the registers we use below in the movem loop
28 ;; this overhead is why we have a check above for breakeven length
29 ;; only r0 - r8 have to be saved, the other ones are clobber-able
30 ;; according to the ABI
31 23
32 subq 9*4,$sp 24 subq 9*4,$sp
33 subq 10*4,$r12 ; update length for the first loop 25 clearf c
34 movem $r8,[$sp] 26 movem $r8,[$sp]
35 27
36 ;; do a movem copy and checksum 28 ;; do a movem copy and checksum
37
381: ;; A failing userspace access (the read) will have this as PC. 291: ;; A failing userspace access (the read) will have this as PC.
39_mloop: movem [$r10+],$r9 ; read 10 longwords 30_mloop: movem [$r10+],$r9 ; read 10 longwords
31 addoq -10*4, $acr, $acr ; loop counter in latency cycle
40 movem $r9,[$r11+] ; write 10 longwords 32 movem $r9,[$r11+] ; write 10 longwords
41 33
42 ;; perform dword checksumming on the 10 longwords 34 ;; perform dword checksumming on the 10 longwords
43 35 addc $r0,$r13
44 add.d $r0,$r13
45 addc $r1,$r13 36 addc $r1,$r13
46 addc $r2,$r13 37 addc $r2,$r13
47 addc $r3,$r13 38 addc $r3,$r13
@@ -52,47 +43,30 @@ _mloop: movem [$r10+],$r9 ; read 10 longwords
52 addc $r8,$r13 43 addc $r8,$r13
53 addc $r9,$r13 44 addc $r9,$r13
54 45
55 ;; fold the carry into the checksum, to avoid having to loop the carry 46 ;; test $acr, without trashing carry.
56 ;; back into the top 47 move.d $acr, $acr
57 48 bpl _mloop
58 addc 0,$r13 49 ;; r12 <= acr is needed after mloop and in the exception handlers.
59 addc 0,$r13 ; do it again, since we might have generated a carry 50 move.d $acr, $r12
60
61 subq 10*4,$r12
62 bge _mloop
63 nop
64
65 addq 10*4,$r12 ; compensate for last loop underflowing length
66 51
52 ;; fold the last carry into r13
53 addc 0, $r13
67 movem [$sp+],$r8 ; restore regs 54 movem [$sp+],$r8 ; restore regs
68 55
69_word_loop: 56_word_loop:
70 ;; only fold if there is anything to fold. 57 addq 10*4,$r12 ; compensate for last loop underflowing length
71
72 cmpq 0,$r13
73 beq _no_fold
74 58
75 ;; fold 32-bit checksum into a 16-bit checksum, to avoid carries below 59 ;; fold 32-bit checksum into a 16-bit checksum, to avoid carries below
76 ;; r9 can be used as temporary. 60 ;; r9 can be used as temporary.
77
78 move.d $r13,$r9 61 move.d $r13,$r9
79 lsrq 16,$r9 ; r0 = checksum >> 16 62 lsrq 16,$r9 ; r0 = checksum >> 16
80 and.d 0xffff,$r13 ; checksum = checksum & 0xffff 63 and.d 0xffff,$r13 ; checksum = checksum & 0xffff
81 add.d $r9,$r13 ; checksum += r0
82 move.d $r13,$r9 ; do the same again, maybe we got a carry last add
83 lsrq 16,$r9
84 and.d 0xffff,$r13
85 add.d $r9,$r13
86 64
87_no_fold: 65 subq 2, $r12
88 cmpq 2,$r12
89 blt _no_words 66 blt _no_words
90 nop 67 add.d $r9,$r13 ; checksum += r0
91 68
92 ;; copy and checksum the rest of the words 69 ;; copy and checksum the rest of the words
93
94 subq 2,$r12
95
962: ;; A failing userspace access for the read below will have this as PC. 702: ;; A failing userspace access for the read below will have this as PC.
97_wloop: move.w [$r10+],$r9 71_wloop: move.w [$r10+],$r9
98 addu.w $r9,$r13 72 addu.w $r9,$r13
@@ -100,12 +74,9 @@ _wloop: move.w [$r10+],$r9
100 bge _wloop 74 bge _wloop
101 move.w $r9,[$r11+] 75 move.w $r9,[$r11+]
102 76
103 addq 2,$r12
104
105_no_words: 77_no_words:
106 ;; see if we have one odd byte more 78 addq 2,$r12
107 cmpq 1,$r12 79 bne _do_byte
108 beq _do_byte
109 nop 80 nop
110 ret 81 ret
111 move.d $r13,$r10 82 move.d $r13,$r10
diff --git a/arch/cris/arch-v32/lib/delay.c b/arch/cris/arch-v32/lib/delay.c
new file mode 100644
index 000000000000..39f1ac9995b4
--- /dev/null
+++ b/arch/cris/arch-v32/lib/delay.c
@@ -0,0 +1,28 @@
1/*
2 * Precise Delay Loops for ETRAX FS
3 *
4 * Copyright (C) 2006 Axis Communications AB.
5 *
6 */
7
8#include <hwregs/reg_map.h>
9#include <hwregs/reg_rdwr.h>
10#include <hwregs/timer_defs.h>
11#include <linux/types.h>
12#include <linux/delay.h>
13#include <linux/module.h>
14
15/*
16 * On ETRAX FS, we can check the free-running read-only 100MHz timer
17 * getting 32-bit 10ns precision, theoretically good for 42.94967295
18 * seconds. Unsigned arithmetic and careful expression handles
19 * wrapping.
20 */
21
22void cris_delay10ns(u32 n10ns)
23{
24 u32 t0 = REG_RD(timer, regi_timer0, r_time);
25 while (REG_RD(timer, regi_timer0, r_time) - t0 < n10ns)
26 ;
27}
28EXPORT_SYMBOL(cris_delay10ns);
diff --git a/arch/cris/arch-v32/lib/spinlock.S b/arch/cris/arch-v32/lib/spinlock.S
index 2437ae7f6ed2..79087ef59a1c 100644
--- a/arch/cris/arch-v32/lib/spinlock.S
+++ b/arch/cris/arch-v32/lib/spinlock.S
@@ -12,11 +12,11 @@
12 12
13cris_spin_lock: 13cris_spin_lock:
14 clearf p 14 clearf p
151: test.d [$r10] 151: test.b [$r10]
16 beq 1b 16 beq 1b
17 clearf p 17 clearf p
18 ax 18 ax
19 clear.d [$r10] 19 clear.b [$r10]
20 bcs 1b 20 bcs 1b
21 clearf p 21 clearf p
22 ret 22 ret
@@ -24,10 +24,10 @@ cris_spin_lock:
24 24
25cris_spin_trylock: 25cris_spin_trylock:
26 clearf p 26 clearf p
271: move.d [$r10], $r11 271: move.b [$r10], $r11
28 ax 28 ax
29 clear.d [$r10] 29 clear.b [$r10]
30 bcs 1b 30 bcs 1b
31 clearf p 31 clearf p
32 ret 32 ret
33 move.d $r11,$r10 33 movu.b $r11,$r10
diff --git a/arch/cris/arch-v32/mach-a3/Kconfig b/arch/cris/arch-v32/mach-a3/Kconfig
new file mode 100644
index 000000000000..a4df06d5997a
--- /dev/null
+++ b/arch/cris/arch-v32/mach-a3/Kconfig
@@ -0,0 +1,110 @@
1if CRIS_MACH_ARTPEC3
2
3menu "Artpec-3 options"
4 depends on CRIS_MACH_ARTPEC3
5
6config ETRAX_DRAM_VIRTUAL_BASE
7 hex
8 default "c0000000"
9
10config ETRAX_L2CACHE
11 bool
12 default y
13
14config ETRAX_SERIAL_PORTS
15 int
16 default 5
17
18config ETRAX_DDR
19 bool
20 default y
21
22config ETRAX_DDR2_MRS
23 hex "DDR2 MRS"
24 default "0"
25
26config ETRAX_DDR2_TIMING
27 hex "DDR2 SDRAM timing"
28 default "0"
29 help
30 SDRAM timing parameters.
31
32config ETRAX_DDR2_CONFIG
33 hex "DDR2 config"
34 default "0"
35
36config ETRAX_PIO_CE0_CFG
37 hex "PIO CE0 configuration"
38 default "0"
39
40config ETRAX_PIO_CE1_CFG
41 hex "PIO CE1 configuration"
42 default "0"
43
44config ETRAX_PIO_CE2_CFG
45 hex "PIO CE2 configuration"
46 default "0"
47
48config ETRAX_DEF_GIO_PA_OE
49 hex "GIO_PA_OE"
50 default "00000000"
51 help
52 Configures the direction of general port A bits. 1 is out, 0 is in.
53 This is often totally different depending on the product used.
54 There are some guidelines though - if you know that only LED's are
55 connected to port PA, then they are usually connected to bits 2-4
56 and you can therefore use 1c. On other boards which don't have the
57 LED's at the general ports, these bits are used for all kinds of
58 stuff. If you don't know what to use, it is always safe to put all
59 as inputs, although floating inputs isn't good.
60
61config ETRAX_DEF_GIO_PA_OUT
62 hex "GIO_PA_OUT"
63 default "00000000"
64 help
65 Configures the initial data for the general port A bits. Most
66 products should use 00 here.
67
68config ETRAX_DEF_GIO_PB_OE
69 hex "GIO_PB_OE"
70 default "000000000"
71 help
72 Configures the direction of general port B bits. 1 is out, 0 is in.
73 This is often totally different depending on the product used.
74 There are some guidelines though - if you know that only LED's are
75 connected to port PA, then they are usually connected to bits 2-4
76 and you can therefore use 1c. On other boards which don't have the
77 LED's at the general ports, these bits are used for all kinds of
78 stuff. If you don't know what to use, it is always safe to put all
79 as inputs, although floating inputs isn't good.
80
81config ETRAX_DEF_GIO_PB_OUT
82 hex "GIO_PB_OUT"
83 default "000000000"
84 help
85 Configures the initial data for the general port B bits. Most
86 products should use 00000 here.
87
88config ETRAX_DEF_GIO_PC_OE
89 hex "GIO_PC_OE"
90 default "00000"
91 help
92 Configures the direction of general port C bits. 1 is out, 0 is in.
93 This is often totally different depending on the product used.
94 There are some guidelines though - if you know that only LED's are
95 connected to port PA, then they are usually connected to bits 2-4
96 and you can therefore use 1c. On other boards which don't have the
97 LED's at the general ports, these bits are used for all kinds of
98 stuff. If you don't know what to use, it is always safe to put all
99 as inputs, although floating inputs isn't good.
100
101config ETRAX_DEF_GIO_PC_OUT
102 hex "GIO_PC_OUT"
103 default "00000"
104 help
105 Configures the initial data for the general port C bits. Most
106 products should use 00000 here.
107
108endmenu
109
110endif
diff --git a/arch/cris/arch-v32/mach-a3/Makefile b/arch/cris/arch-v32/mach-a3/Makefile
new file mode 100644
index 000000000000..41fa6a6893a9
--- /dev/null
+++ b/arch/cris/arch-v32/mach-a3/Makefile
@@ -0,0 +1,11 @@
1# $Id: Makefile,v 1.3 2007/03/13 11:57:46 starvik Exp $
2#
3# Makefile for the linux kernel.
4#
5
6obj-y := dma.o pinmux.o io.o arbiter.o
7obj-$(CONFIG_ETRAX_VCS_SIM) += vcs_hook.o
8obj-$(CONFIG_CPU_FREQ) += cpufreq.o
9
10clean:
11
diff --git a/arch/cris/arch-v32/mach-a3/arbiter.c b/arch/cris/arch-v32/mach-a3/arbiter.c
new file mode 100644
index 000000000000..8b924db71c9a
--- /dev/null
+++ b/arch/cris/arch-v32/mach-a3/arbiter.c
@@ -0,0 +1,634 @@
1/*
2 * Memory arbiter functions. Allocates bandwidth through the
3 * arbiter and sets up arbiter breakpoints.
4 *
5 * The algorithm first assigns slots to the clients that has specified
6 * bandwidth (e.g. ethernet) and then the remaining slots are divided
7 * on all the active clients.
8 *
9 * Copyright (c) 2004-2007 Axis Communications AB.
10 *
11 * The artpec-3 has two arbiters. The memory hierarchy looks like this:
12 *
13 *
14 * CPU DMAs
15 * | |
16 * | |
17 * -------------- ------------------
18 * | foo arbiter|----| Internal memory|
19 * -------------- ------------------
20 * |
21 * --------------
22 * | L2 cache |
23 * --------------
24 * |
25 * h264 etc |
26 * | |
27 * | |
28 * --------------
29 * | bar arbiter|
30 * --------------
31 * |
32 * ---------
33 * | SDRAM |
34 * ---------
35 *
36 */
37
38#include <hwregs/reg_map.h>
39#include <hwregs/reg_rdwr.h>
40#include <hwregs/marb_foo_defs.h>
41#include <hwregs/marb_bar_defs.h>
42#include <arbiter.h>
43#include <hwregs/intr_vect.h>
44#include <linux/interrupt.h>
45#include <linux/irq.h>
46#include <linux/signal.h>
47#include <linux/errno.h>
48#include <linux/spinlock.h>
49#include <asm/io.h>
50#include <asm/irq_regs.h>
51
52#define D(x)
53
54struct crisv32_watch_entry {
55 unsigned long instance;
56 watch_callback *cb;
57 unsigned long start;
58 unsigned long end;
59 int used;
60};
61
62#define NUMBER_OF_BP 4
63#define SDRAM_BANDWIDTH 400000000
64#define INTMEM_BANDWIDTH 400000000
65#define NBR_OF_SLOTS 64
66#define NBR_OF_REGIONS 2
67#define NBR_OF_CLIENTS 15
68#define ARBITERS 2
69#define UNASSIGNED 100
70
71struct arbiter {
72 unsigned long instance;
73 int nbr_regions;
74 int nbr_clients;
75 int requested_slots[NBR_OF_REGIONS][NBR_OF_CLIENTS];
76 int active_clients[NBR_OF_REGIONS][NBR_OF_CLIENTS];
77};
78
79static struct crisv32_watch_entry watches[ARBITERS][NUMBER_OF_BP] =
80{
81 {
82 {regi_marb_foo_bp0},
83 {regi_marb_foo_bp1},
84 {regi_marb_foo_bp2},
85 {regi_marb_foo_bp3}
86 },
87 {
88 {regi_marb_bar_bp0},
89 {regi_marb_bar_bp1},
90 {regi_marb_bar_bp2},
91 {regi_marb_bar_bp3}
92 }
93};
94
95struct arbiter arbiters[ARBITERS] =
96{
97 { /* L2 cache arbiter */
98 .instance = regi_marb_foo,
99 .nbr_regions = 2,
100 .nbr_clients = 15
101 },
102 { /* DDR2 arbiter */
103 .instance = regi_marb_bar,
104 .nbr_regions = 1,
105 .nbr_clients = 9
106 }
107};
108
109static int max_bandwidth[NBR_OF_REGIONS] = {SDRAM_BANDWIDTH, INTMEM_BANDWIDTH};
110
111DEFINE_SPINLOCK(arbiter_lock);
112
113static irqreturn_t
114crisv32_foo_arbiter_irq(int irq, void *dev_id);
115static irqreturn_t
116crisv32_bar_arbiter_irq(int irq, void *dev_id);
117
118/*
119 * "I'm the arbiter, I know the score.
120 * From square one I'll be watching all 64."
121 * (memory arbiter slots, that is)
122 *
123 * Or in other words:
124 * Program the memory arbiter slots for "region" according to what's
125 * in requested_slots[] and active_clients[], while minimizing
126 * latency. A caller may pass a non-zero positive amount for
127 * "unused_slots", which must then be the unallocated, remaining
128 * number of slots, free to hand out to any client.
129 */
130
131static void crisv32_arbiter_config(int arbiter, int region, int unused_slots)
132{
133 int slot;
134 int client;
135 int interval = 0;
136
137 /*
138 * This vector corresponds to the hardware arbiter slots (see
139 * the hardware documentation for semantics). We initialize
140 * each slot with a suitable sentinel value outside the valid
141 * range {0 .. NBR_OF_CLIENTS - 1} and replace them with
142 * client indexes. Then it's fed to the hardware.
143 */
144 s8 val[NBR_OF_SLOTS];
145
146 for (slot = 0; slot < NBR_OF_SLOTS; slot++)
147 val[slot] = -1;
148
149 for (client = 0; client < arbiters[arbiter].nbr_clients; client++) {
150 int pos;
151 /* Allocate the requested non-zero number of slots, but
152 * also give clients with zero-requests one slot each
153 * while stocks last. We do the latter here, in client
154 * order. This makes sure zero-request clients are the
155 * first to get to any spare slots, else those slots
156 * could, when bandwidth is allocated close to the limit,
157 * all be allocated to low-index non-zero-request clients
158 * in the default-fill loop below. Another positive but
159 * secondary effect is a somewhat better spread of the
160 * zero-bandwidth clients in the vector, avoiding some of
161 * the latency that could otherwise be caused by the
162 * partitioning of non-zero-bandwidth clients at low
163 * indexes and zero-bandwidth clients at high
164 * indexes. (Note that this spreading can only affect the
165 * unallocated bandwidth.) All the above only matters for
166 * memory-intensive situations, of course.
167 */
168 if (!arbiters[arbiter].requested_slots[region][client]) {
169 /*
170 * Skip inactive clients. Also skip zero-slot
171 * allocations in this pass when there are no known
172 * free slots.
173 */
174 if (!arbiters[arbiter].active_clients[region][client] ||
175 unused_slots <= 0)
176 continue;
177
178 unused_slots--;
179
180 /* Only allocate one slot for this client. */
181 interval = NBR_OF_SLOTS;
182 } else
183 interval = NBR_OF_SLOTS /
184 arbiters[arbiter].requested_slots[region][client];
185
186 pos = 0;
187 while (pos < NBR_OF_SLOTS) {
188 if (val[pos] >= 0)
189 pos++;
190 else {
191 val[pos] = client;
192 pos += interval;
193 }
194 }
195 }
196
197 client = 0;
198 for (slot = 0; slot < NBR_OF_SLOTS; slot++) {
199 /*
200 * Allocate remaining slots in round-robin
201 * client-number order for active clients. For this
202 * pass, we ignore requested bandwidth and previous
203 * allocations.
204 */
205 if (val[slot] < 0) {
206 int first = client;
207 while (!arbiters[arbiter].active_clients[region][client]) {
208 client = (client + 1) %
209 arbiters[arbiter].nbr_clients;
210 if (client == first)
211 break;
212 }
213 val[slot] = client;
214 client = (client + 1) % arbiters[arbiter].nbr_clients;
215 }
216 if (arbiter == 0) {
217 if (region == EXT_REGION)
218 REG_WR_INT_VECT(marb_foo, regi_marb_foo,
219 rw_l2_slots, slot, val[slot]);
220 else if (region == INT_REGION)
221 REG_WR_INT_VECT(marb_foo, regi_marb_foo,
222 rw_intm_slots, slot, val[slot]);
223 } else {
224 REG_WR_INT_VECT(marb_bar, regi_marb_bar,
225 rw_ddr2_slots, slot, val[slot]);
226 }
227 }
228}
229
230extern char _stext, _etext;
231
232static void crisv32_arbiter_init(void)
233{
234 static int initialized;
235
236 if (initialized)
237 return;
238
239 initialized = 1;
240
241 /*
242 * CPU caches are always set to active, but with zero
243 * bandwidth allocated. It should be ok to allocate zero
244 * bandwidth for the caches, because DMA for other channels
245 * will supposedly finish, once their programmed amount is
246 * done, and then the caches will get access according to the
247 * "fixed scheme" for unclaimed slots. Though, if for some
248 * use-case somewhere, there's a maximum CPU latency for
249 * e.g. some interrupt, we have to start allocating specific
250 * bandwidth for the CPU caches too.
251 */
252 arbiters[0].active_clients[EXT_REGION][11] = 1;
253 arbiters[0].active_clients[EXT_REGION][12] = 1;
254 crisv32_arbiter_config(0, EXT_REGION, 0);
255 crisv32_arbiter_config(0, INT_REGION, 0);
256 crisv32_arbiter_config(1, EXT_REGION, 0);
257
258 if (request_irq(MEMARB_FOO_INTR_VECT, crisv32_foo_arbiter_irq,
259 IRQF_DISABLED, "arbiter", NULL))
260 printk(KERN_ERR "Couldn't allocate arbiter IRQ\n");
261
262 if (request_irq(MEMARB_BAR_INTR_VECT, crisv32_bar_arbiter_irq,
263 IRQF_DISABLED, "arbiter", NULL))
264 printk(KERN_ERR "Couldn't allocate arbiter IRQ\n");
265
266#ifndef CONFIG_ETRAX_KGDB
267 /* Global watch for writes to kernel text segment. */
268 crisv32_arbiter_watch(virt_to_phys(&_stext), &_etext - &_stext,
269 MARB_CLIENTS(arbiter_all_clients, arbiter_bar_all_clients),
270 arbiter_all_write, NULL);
271#endif
272
273 /* Set up max burst sizes by default */
274 REG_WR_INT(marb_bar, regi_marb_bar, rw_h264_rd_burst, 3);
275 REG_WR_INT(marb_bar, regi_marb_bar, rw_h264_wr_burst, 3);
276 REG_WR_INT(marb_bar, regi_marb_bar, rw_ccd_burst, 3);
277 REG_WR_INT(marb_bar, regi_marb_bar, rw_vin_wr_burst, 3);
278 REG_WR_INT(marb_bar, regi_marb_bar, rw_vin_rd_burst, 3);
279 REG_WR_INT(marb_bar, regi_marb_bar, rw_sclr_rd_burst, 3);
280 REG_WR_INT(marb_bar, regi_marb_bar, rw_vout_burst, 3);
281 REG_WR_INT(marb_bar, regi_marb_bar, rw_sclr_fifo_burst, 3);
282 REG_WR_INT(marb_bar, regi_marb_bar, rw_l2cache_burst, 3);
283}
284
285int crisv32_arbiter_allocate_bandwidth(int client, int region,
286 unsigned long bandwidth)
287{
288 int i;
289 int total_assigned = 0;
290 int total_clients = 0;
291 int req;
292 int arbiter = 0;
293
294 crisv32_arbiter_init();
295
296 if (client & 0xffff0000) {
297 arbiter = 1;
298 client >>= 16;
299 }
300
301 for (i = 0; i < arbiters[arbiter].nbr_clients; i++) {
302 total_assigned += arbiters[arbiter].requested_slots[region][i];
303 total_clients += arbiters[arbiter].active_clients[region][i];
304 }
305
306 /* Avoid division by 0 for 0-bandwidth requests. */
307 req = bandwidth == 0
308 ? 0 : NBR_OF_SLOTS / (max_bandwidth[region] / bandwidth);
309
310 /*
311 * We make sure that there are enough slots only for non-zero
312 * requests. Requesting 0 bandwidth *may* allocate slots,
313 * though if all bandwidth is allocated, such a client won't
314 * get any and will have to rely on getting memory access
315 * according to the fixed scheme that's the default when one
316 * of the slot-allocated clients doesn't claim their slot.
317 */
318 if (total_assigned + req > NBR_OF_SLOTS)
319 return -ENOMEM;
320
321 arbiters[arbiter].active_clients[region][client] = 1;
322 arbiters[arbiter].requested_slots[region][client] = req;
323 crisv32_arbiter_config(arbiter, region, NBR_OF_SLOTS - total_assigned);
324
325 /* Propagate allocation from foo to bar */
326 if (arbiter == 0)
327 crisv32_arbiter_allocate_bandwidth(8 << 16,
328 EXT_REGION, bandwidth);
329 return 0;
330}
331
332/*
333 * Main entry for bandwidth deallocation.
334 *
335 * Strictly speaking, for a somewhat constant set of clients where
336 * each client gets a constant bandwidth and is just enabled or
337 * disabled (somewhat dynamically), no action is necessary here to
338 * avoid starvation for non-zero-allocation clients, as the allocated
339 * slots will just be unused. However, handing out those unused slots
340 * to active clients avoids needless latency if the "fixed scheme"
341 * would give unclaimed slots to an eager low-index client.
342 */
343
344void crisv32_arbiter_deallocate_bandwidth(int client, int region)
345{
346 int i;
347 int total_assigned = 0;
348 int arbiter = 0;
349
350 if (client & 0xffff0000)
351 arbiter = 1;
352
353 arbiters[arbiter].requested_slots[region][client] = 0;
354 arbiters[arbiter].active_clients[region][client] = 0;
355
356 for (i = 0; i < arbiters[arbiter].nbr_clients; i++)
357 total_assigned += arbiters[arbiter].requested_slots[region][i];
358
359 crisv32_arbiter_config(arbiter, region, NBR_OF_SLOTS - total_assigned);
360}
361
362int crisv32_arbiter_watch(unsigned long start, unsigned long size,
363 unsigned long clients, unsigned long accesses,
364 watch_callback *cb)
365{
366 int i;
367 int arbiter;
368 int used[2];
369 int ret = 0;
370
371 crisv32_arbiter_init();
372
373 if (start > 0x80000000) {
374 printk(KERN_ERR "Arbiter: %lX doesn't look like a "
375 "physical address", start);
376 return -EFAULT;
377 }
378
379 spin_lock(&arbiter_lock);
380
381 if (clients & 0xffff)
382 used[0] = 1;
383 if (clients & 0xffff0000)
384 used[1] = 1;
385
386 for (arbiter = 0; arbiter < ARBITERS; arbiter++) {
387 if (!used[arbiter])
388 continue;
389
390 for (i = 0; i < NUMBER_OF_BP; i++) {
391 if (!watches[arbiter][i].used) {
392 unsigned intr_mask;
393 if (arbiter)
394 intr_mask = REG_RD_INT(marb_bar,
395 regi_marb_bar, rw_intr_mask);
396 else
397 intr_mask = REG_RD_INT(marb_foo,
398 regi_marb_foo, rw_intr_mask);
399
400 watches[arbiter][i].used = 1;
401 watches[arbiter][i].start = start;
402 watches[arbiter][i].end = start + size;
403 watches[arbiter][i].cb = cb;
404
405 ret |= (i + 1) << (arbiter + 8);
406 if (arbiter) {
407 REG_WR_INT(marb_bar_bp,
408 watches[arbiter][i].instance,
409 rw_first_addr,
410 watches[arbiter][i].start);
411 REG_WR_INT(marb_bar_bp,
412 watches[arbiter][i].instance,
413 rw_last_addr,
414 watches[arbiter][i].end);
415 REG_WR_INT(marb_bar_bp,
416 watches[arbiter][i].instance,
417 rw_op, accesses);
418 REG_WR_INT(marb_bar_bp,
419 watches[arbiter][i].instance,
420 rw_clients,
421 clients & 0xffff);
422 } else {
423 REG_WR_INT(marb_foo_bp,
424 watches[arbiter][i].instance,
425 rw_first_addr,
426 watches[arbiter][i].start);
427 REG_WR_INT(marb_foo_bp,
428 watches[arbiter][i].instance,
429 rw_last_addr,
430 watches[arbiter][i].end);
431 REG_WR_INT(marb_foo_bp,
432 watches[arbiter][i].instance,
433 rw_op, accesses);
434 REG_WR_INT(marb_foo_bp,
435 watches[arbiter][i].instance,
436 rw_clients, clients >> 16);
437 }
438
439 if (i == 0)
440 intr_mask |= 1;
441 else if (i == 1)
442 intr_mask |= 2;
443 else if (i == 2)
444 intr_mask |= 4;
445 else if (i == 3)
446 intr_mask |= 8;
447
448 if (arbiter)
449 REG_WR_INT(marb_bar, regi_marb_bar,
450 rw_intr_mask, intr_mask);
451 else
452 REG_WR_INT(marb_foo, regi_marb_foo,
453 rw_intr_mask, intr_mask);
454
455 spin_unlock(&arbiter_lock);
456
457 break;
458 }
459 }
460 }
461 spin_unlock(&arbiter_lock);
462 if (ret)
463 return ret;
464 else
465 return -ENOMEM;
466}
467
468int crisv32_arbiter_unwatch(int id)
469{
470 int arbiter;
471 int intr_mask;
472
473 crisv32_arbiter_init();
474
475 spin_lock(&arbiter_lock);
476
477 for (arbiter = 0; arbiter < ARBITERS; arbiter++) {
478 int id2;
479
480 if (arbiter)
481 intr_mask = REG_RD_INT(marb_bar, regi_marb_bar,
482 rw_intr_mask);
483 else
484 intr_mask = REG_RD_INT(marb_foo, regi_marb_foo,
485 rw_intr_mask);
486
487 id2 = (id & (0xff << (arbiter + 8))) >> (arbiter + 8);
488 if (id2 == 0)
489 continue;
490 id2--;
491 if ((id2 >= NUMBER_OF_BP) || (!watches[arbiter][id2].used)) {
492 spin_unlock(&arbiter_lock);
493 return -EINVAL;
494 }
495
496 memset(&watches[arbiter][id2], 0,
497 sizeof(struct crisv32_watch_entry));
498
499 if (id2 == 0)
500 intr_mask &= ~1;
501 else if (id2 == 1)
502 intr_mask &= ~2;
503 else if (id2 == 2)
504 intr_mask &= ~4;
505 else if (id2 == 3)
506 intr_mask &= ~8;
507
508 if (arbiter)
509 REG_WR_INT(marb_bar, regi_marb_bar, rw_intr_mask,
510 intr_mask);
511 else
512 REG_WR_INT(marb_foo, regi_marb_foo, rw_intr_mask,
513 intr_mask);
514 }
515
516 spin_unlock(&arbiter_lock);
517 return 0;
518}
519
520extern void show_registers(struct pt_regs *regs);
521
522
523static irqreturn_t
524crisv32_foo_arbiter_irq(int irq, void *dev_id)
525{
526 reg_marb_foo_r_masked_intr masked_intr =
527 REG_RD(marb_foo, regi_marb_foo, r_masked_intr);
528 reg_marb_foo_bp_r_brk_clients r_clients;
529 reg_marb_foo_bp_r_brk_addr r_addr;
530 reg_marb_foo_bp_r_brk_op r_op;
531 reg_marb_foo_bp_r_brk_first_client r_first;
532 reg_marb_foo_bp_r_brk_size r_size;
533 reg_marb_foo_bp_rw_ack ack = {0};
534 reg_marb_foo_rw_ack_intr ack_intr = {
535 .bp0 = 1, .bp1 = 1, .bp2 = 1, .bp3 = 1
536 };
537 struct crisv32_watch_entry *watch;
538 unsigned arbiter = (unsigned)dev_id;
539
540 masked_intr = REG_RD(marb_foo, regi_marb_foo, r_masked_intr);
541
542 if (masked_intr.bp0)
543 watch = &watches[arbiter][0];
544 else if (masked_intr.bp1)
545 watch = &watches[arbiter][1];
546 else if (masked_intr.bp2)
547 watch = &watches[arbiter][2];
548 else if (masked_intr.bp3)
549 watch = &watches[arbiter][3];
550 else
551 return IRQ_NONE;
552
553 /* Retrieve all useful information and print it. */
554 r_clients = REG_RD(marb_foo_bp, watch->instance, r_brk_clients);
555 r_addr = REG_RD(marb_foo_bp, watch->instance, r_brk_addr);
556 r_op = REG_RD(marb_foo_bp, watch->instance, r_brk_op);
557 r_first = REG_RD(marb_foo_bp, watch->instance, r_brk_first_client);
558 r_size = REG_RD(marb_foo_bp, watch->instance, r_brk_size);
559
560 printk(KERN_DEBUG "Arbiter IRQ\n");
561 printk(KERN_DEBUG "Clients %X addr %X op %X first %X size %X\n",
562 REG_TYPE_CONV(int, reg_marb_foo_bp_r_brk_clients, r_clients),
563 REG_TYPE_CONV(int, reg_marb_foo_bp_r_brk_addr, r_addr),
564 REG_TYPE_CONV(int, reg_marb_foo_bp_r_brk_op, r_op),
565 REG_TYPE_CONV(int, reg_marb_foo_bp_r_brk_first_client, r_first),
566 REG_TYPE_CONV(int, reg_marb_foo_bp_r_brk_size, r_size));
567
568 REG_WR(marb_foo_bp, watch->instance, rw_ack, ack);
569 REG_WR(marb_foo, regi_marb_foo, rw_ack_intr, ack_intr);
570
571 printk(KERN_DEBUG "IRQ occured at %X\n", (unsigned)get_irq_regs());
572
573 if (watch->cb)
574 watch->cb();
575
576 return IRQ_HANDLED;
577}
578
579static irqreturn_t
580crisv32_bar_arbiter_irq(int irq, void *dev_id)
581{
582 reg_marb_bar_r_masked_intr masked_intr =
583 REG_RD(marb_bar, regi_marb_bar, r_masked_intr);
584 reg_marb_bar_bp_r_brk_clients r_clients;
585 reg_marb_bar_bp_r_brk_addr r_addr;
586 reg_marb_bar_bp_r_brk_op r_op;
587 reg_marb_bar_bp_r_brk_first_client r_first;
588 reg_marb_bar_bp_r_brk_size r_size;
589 reg_marb_bar_bp_rw_ack ack = {0};
590 reg_marb_bar_rw_ack_intr ack_intr = {
591 .bp0 = 1, .bp1 = 1, .bp2 = 1, .bp3 = 1
592 };
593 struct crisv32_watch_entry *watch;
594 unsigned arbiter = (unsigned)dev_id;
595
596 masked_intr = REG_RD(marb_bar, regi_marb_bar, r_masked_intr);
597
598 if (masked_intr.bp0)
599 watch = &watches[arbiter][0];
600 else if (masked_intr.bp1)
601 watch = &watches[arbiter][1];
602 else if (masked_intr.bp2)
603 watch = &watches[arbiter][2];
604 else if (masked_intr.bp3)
605 watch = &watches[arbiter][3];
606 else
607 return IRQ_NONE;
608
609 /* Retrieve all useful information and print it. */
610 r_clients = REG_RD(marb_bar_bp, watch->instance, r_brk_clients);
611 r_addr = REG_RD(marb_bar_bp, watch->instance, r_brk_addr);
612 r_op = REG_RD(marb_bar_bp, watch->instance, r_brk_op);
613 r_first = REG_RD(marb_bar_bp, watch->instance, r_brk_first_client);
614 r_size = REG_RD(marb_bar_bp, watch->instance, r_brk_size);
615
616 printk(KERN_DEBUG "Arbiter IRQ\n");
617 printk(KERN_DEBUG "Clients %X addr %X op %X first %X size %X\n",
618 REG_TYPE_CONV(int, reg_marb_bar_bp_r_brk_clients, r_clients),
619 REG_TYPE_CONV(int, reg_marb_bar_bp_r_brk_addr, r_addr),
620 REG_TYPE_CONV(int, reg_marb_bar_bp_r_brk_op, r_op),
621 REG_TYPE_CONV(int, reg_marb_bar_bp_r_brk_first_client, r_first),
622 REG_TYPE_CONV(int, reg_marb_bar_bp_r_brk_size, r_size));
623
624 REG_WR(marb_bar_bp, watch->instance, rw_ack, ack);
625 REG_WR(marb_bar, regi_marb_bar, rw_ack_intr, ack_intr);
626
627 printk(KERN_DEBUG "IRQ occured at %X\n", (unsigned)get_irq_regs()->erp);
628
629 if (watch->cb)
630 watch->cb();
631
632 return IRQ_HANDLED;
633}
634
diff --git a/arch/cris/arch-v32/mach-a3/cpufreq.c b/arch/cris/arch-v32/mach-a3/cpufreq.c
new file mode 100644
index 000000000000..8e5a3cab8ad7
--- /dev/null
+++ b/arch/cris/arch-v32/mach-a3/cpufreq.c
@@ -0,0 +1,153 @@
1#include <linux/init.h>
2#include <linux/module.h>
3#include <linux/cpufreq.h>
4#include <hwregs/reg_map.h>
5#include <hwregs/reg_rdwr.h>
6#include <hwregs/clkgen_defs.h>
7#include <hwregs/ddr2_defs.h>
8
9static int
10cris_sdram_freq_notifier(struct notifier_block *nb, unsigned long val,
11 void *data);
12
13static struct notifier_block cris_sdram_freq_notifier_block = {
14 .notifier_call = cris_sdram_freq_notifier
15};
16
17static struct cpufreq_frequency_table cris_freq_table[] = {
18 {0x01, 6000},
19 {0x02, 200000},
20 {0, CPUFREQ_TABLE_END},
21};
22
23static unsigned int cris_freq_get_cpu_frequency(unsigned int cpu)
24{
25 reg_clkgen_rw_clk_ctrl clk_ctrl;
26 clk_ctrl = REG_RD(clkgen, regi_clkgen, rw_clk_ctrl);
27 return clk_ctrl.pll ? 200000 : 6000;
28}
29
30static void cris_freq_set_cpu_state(unsigned int state)
31{
32 int i = 0;
33 struct cpufreq_freqs freqs;
34 reg_clkgen_rw_clk_ctrl clk_ctrl;
35 clk_ctrl = REG_RD(clkgen, regi_clkgen, rw_clk_ctrl);
36
37#ifdef CONFIG_SMP
38 for_each_present_cpu(i)
39#endif
40 {
41 freqs.old = cris_freq_get_cpu_frequency(i);
42 freqs.new = cris_freq_table[state].frequency;
43 freqs.cpu = i;
44 }
45
46 cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
47
48 local_irq_disable();
49
50 /* Even though we may be SMP they will share the same clock
51 * so all settings are made on CPU0. */
52 if (cris_freq_table[state].frequency == 200000)
53 clk_ctrl.pll = 1;
54 else
55 clk_ctrl.pll = 0;
56 REG_WR(clkgen, regi_clkgen, rw_clk_ctrl, clk_ctrl);
57
58 local_irq_enable();
59
60 cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
61};
62
63static int cris_freq_verify(struct cpufreq_policy *policy)
64{
65 return cpufreq_frequency_table_verify(policy, &cris_freq_table[0]);
66}
67
68static int cris_freq_target(struct cpufreq_policy *policy,
69 unsigned int target_freq,
70 unsigned int relation)
71{
72 unsigned int newstate = 0;
73
74 if (cpufreq_frequency_table_target(policy, cris_freq_table,
75 target_freq, relation, &newstate))
76 return -EINVAL;
77
78 cris_freq_set_cpu_state(newstate);
79
80 return 0;
81}
82
83static int cris_freq_cpu_init(struct cpufreq_policy *policy)
84{
85 int result;
86
87 /* cpuinfo and default policy values */
88 policy->governor = CPUFREQ_DEFAULT_GOVERNOR;
89 policy->cpuinfo.transition_latency = 1000000; /* 1ms */
90 policy->cur = cris_freq_get_cpu_frequency(0);
91
92 result = cpufreq_frequency_table_cpuinfo(policy, cris_freq_table);
93 if (result)
94 return (result);
95
96 cpufreq_frequency_table_get_attr(cris_freq_table, policy->cpu);
97
98 return 0;
99}
100
101
102static int cris_freq_cpu_exit(struct cpufreq_policy *policy)
103{
104 cpufreq_frequency_table_put_attr(policy->cpu);
105 return 0;
106}
107
108
109static struct freq_attr *cris_freq_attr[] = {
110 &cpufreq_freq_attr_scaling_available_freqs,
111 NULL,
112};
113
114static struct cpufreq_driver cris_freq_driver = {
115 .get = cris_freq_get_cpu_frequency,
116 .verify = cris_freq_verify,
117 .target = cris_freq_target,
118 .init = cris_freq_cpu_init,
119 .exit = cris_freq_cpu_exit,
120 .name = "cris_freq",
121 .owner = THIS_MODULE,
122 .attr = cris_freq_attr,
123};
124
125static int __init cris_freq_init(void)
126{
127 int ret;
128 ret = cpufreq_register_driver(&cris_freq_driver);
129 cpufreq_register_notifier(&cris_sdram_freq_notifier_block,
130 CPUFREQ_TRANSITION_NOTIFIER);
131 return ret;
132}
133
134static int
135cris_sdram_freq_notifier(struct notifier_block *nb, unsigned long val,
136 void *data)
137{
138 int i;
139 struct cpufreq_freqs *freqs = data;
140 if (val == CPUFREQ_PRECHANGE) {
141 reg_ddr2_rw_cfg cfg =
142 REG_RD(ddr2, regi_ddr2_ctrl, rw_cfg);
143 cfg.ref_interval = (freqs->new == 200000 ? 1560 : 46);
144
145 if (freqs->new == 200000)
146 for (i = 0; i < 50000; i++);
147 REG_WR(bif_core, regi_bif_core, rw_sdram_timing, timing);
148 }
149 return 0;
150}
151
152
153module_init(cris_freq_init);
diff --git a/arch/cris/arch-v32/mach-a3/dma.c b/arch/cris/arch-v32/mach-a3/dma.c
new file mode 100644
index 000000000000..25f236ef0b81
--- /dev/null
+++ b/arch/cris/arch-v32/mach-a3/dma.c
@@ -0,0 +1,185 @@
1/* Wrapper for DMA channel allocator that starts clocks etc */
2
3#include <linux/kernel.h>
4#include <linux/spinlock.h>
5#include <asm/arch/mach/dma.h>
6#include <hwregs/reg_map.h>
7#include <hwregs/reg_rdwr.h>
8#include <hwregs/marb_defs.h>
9#include <hwregs/clkgen_defs.h>
10#include <hwregs/strmux_defs.h>
11#include <linux/errno.h>
12#include <asm/system.h>
13#include <arbiter.h>
14
15static char used_dma_channels[MAX_DMA_CHANNELS];
16static const char *used_dma_channels_users[MAX_DMA_CHANNELS];
17
18static DEFINE_SPINLOCK(dma_lock);
19
20int crisv32_request_dma(unsigned int dmanr, const char *device_id,
21 unsigned options, unsigned int bandwidth, enum dma_owner owner)
22{
23 unsigned long flags;
24 reg_clkgen_rw_clk_ctrl clk_ctrl;
25 reg_strmux_rw_cfg strmux_cfg;
26
27 if (crisv32_arbiter_allocate_bandwidth(dmanr,
28 options & DMA_INT_MEM ? INT_REGION : EXT_REGION,
29 bandwidth))
30 return -ENOMEM;
31
32 spin_lock_irqsave(&dma_lock, flags);
33
34 if (used_dma_channels[dmanr]) {
35 spin_unlock_irqrestore(&dma_lock, flags);
36 if (options & DMA_VERBOSE_ON_ERROR)
37 printk(KERN_ERR "Failed to request DMA %i for %s, "
38 "already allocated by %s\n",
39 dmanr,
40 device_id,
41 used_dma_channels_users[dmanr]);
42
43 if (options & DMA_PANIC_ON_ERROR)
44 panic("request_dma error!");
45 spin_unlock_irqrestore(&dma_lock, flags);
46 return -EBUSY;
47 }
48 clk_ctrl = REG_RD(clkgen, regi_clkgen, rw_clk_ctrl);
49 strmux_cfg = REG_RD(strmux, regi_strmux, rw_cfg);
50
51 switch (dmanr) {
52 case 0:
53 case 1:
54 clk_ctrl.dma0_1_eth = 1;
55 break;
56 case 2:
57 case 3:
58 clk_ctrl.dma2_3_strcop = 1;
59 break;
60 case 4:
61 case 5:
62 clk_ctrl.dma4_5_iop = 1;
63 break;
64 case 6:
65 case 7:
66 clk_ctrl.sser_ser_dma6_7 = 1;
67 break;
68 case 9:
69 case 11:
70 clk_ctrl.dma9_11 = 1;
71 break;
72#if MAX_DMA_CHANNELS-1 != 11
73#error Check dma.c
74#endif
75 default:
76 spin_unlock_irqrestore(&dma_lock, flags);
77 if (options & DMA_VERBOSE_ON_ERROR)
78 printk(KERN_ERR "Failed to request DMA %i for %s, "
79 "only 0-%i valid)\n",
80 dmanr, device_id, MAX_DMA_CHANNELS-1);
81
82 if (options & DMA_PANIC_ON_ERROR)
83 panic("request_dma error!");
84 return -EINVAL;
85 }
86
87 switch (owner) {
88 case dma_eth:
89 if (dmanr == 0)
90 strmux_cfg.dma0 = regk_strmux_eth;
91 else if (dmanr == 1)
92 strmux_cfg.dma1 = regk_strmux_eth;
93 else
94 panic("Invalid DMA channel for eth\n");
95 break;
96 case dma_ser0:
97 if (dmanr == 0)
98 strmux_cfg.dma0 = regk_strmux_ser0;
99 else if (dmanr == 1)
100 strmux_cfg.dma1 = regk_strmux_ser0;
101 else
102 panic("Invalid DMA channel for ser0\n");
103 break;
104 case dma_ser3:
105 if (dmanr == 2)
106 strmux_cfg.dma2 = regk_strmux_ser3;
107 else if (dmanr == 3)
108 strmux_cfg.dma3 = regk_strmux_ser3;
109 else
110 panic("Invalid DMA channel for ser3\n");
111 break;
112 case dma_strp:
113 if (dmanr == 2)
114 strmux_cfg.dma2 = regk_strmux_strcop;
115 else if (dmanr == 3)
116 strmux_cfg.dma3 = regk_strmux_strcop;
117 else
118 panic("Invalid DMA channel for strp\n");
119 break;
120 case dma_ser1:
121 if (dmanr == 4)
122 strmux_cfg.dma4 = regk_strmux_ser1;
123 else if (dmanr == 5)
124 strmux_cfg.dma5 = regk_strmux_ser1;
125 else
126 panic("Invalid DMA channel for ser1\n");
127 break;
128 case dma_iop:
129 if (dmanr == 4)
130 strmux_cfg.dma4 = regk_strmux_iop;
131 else if (dmanr == 5)
132 strmux_cfg.dma5 = regk_strmux_iop;
133 else
134 panic("Invalid DMA channel for iop\n");
135 break;
136 case dma_ser2:
137 if (dmanr == 6)
138 strmux_cfg.dma6 = regk_strmux_ser2;
139 else if (dmanr == 7)
140 strmux_cfg.dma7 = regk_strmux_ser2;
141 else
142 panic("Invalid DMA channel for ser2\n");
143 break;
144 case dma_sser:
145 if (dmanr == 6)
146 strmux_cfg.dma6 = regk_strmux_sser;
147 else if (dmanr == 7)
148 strmux_cfg.dma7 = regk_strmux_sser;
149 else
150 panic("Invalid DMA channel for sser\n");
151 break;
152 case dma_ser4:
153 if (dmanr == 9)
154 strmux_cfg.dma9 = regk_strmux_ser4;
155 else
156 panic("Invalid DMA channel for ser4\n");
157 break;
158 case dma_jpeg:
159 if (dmanr == 9)
160 strmux_cfg.dma9 = regk_strmux_jpeg;
161 else
162 panic("Invalid DMA channel for JPEG\n");
163 break;
164 case dma_h264:
165 if (dmanr == 11)
166 strmux_cfg.dma11 = regk_strmux_h264;
167 else
168 panic("Invalid DMA channel for H264\n");
169 break;
170 }
171
172 used_dma_channels[dmanr] = 1;
173 used_dma_channels_users[dmanr] = device_id;
174 REG_WR(clkgen, regi_clkgen, rw_clk_ctrl, clk_ctrl);
175 REG_WR(strmux, regi_strmux, rw_cfg, strmux_cfg);
176 spin_unlock_irqrestore(&dma_lock, flags);
177 return 0;
178}
179
180void crisv32_free_dma(unsigned int dmanr)
181{
182 spin_lock(&dma_lock);
183 used_dma_channels[dmanr] = 0;
184 spin_unlock(&dma_lock);
185}
diff --git a/arch/cris/arch-v32/mach-a3/dram_init.S b/arch/cris/arch-v32/mach-a3/dram_init.S
new file mode 100644
index 000000000000..94d6b41cb299
--- /dev/null
+++ b/arch/cris/arch-v32/mach-a3/dram_init.S
@@ -0,0 +1,104 @@
1/*
2 * DDR SDRAM initialization - alter with care
3 * This file is intended to be included from other assembler files
4 *
5 * Note: This file may not modify r8 or r9 because they are used to
6 * carry information from the decompresser to the kernel
7 *
8 * Copyright (C) 2005-2007 Axis Communications AB
9 *
10 * Authors: Mikael Starvik <starvik@axis.com>
11 */
12
13/* Just to be certain the config file is included, we include it here
14 * explicitely instead of depending on it being included in the file that
15 * uses this code.
16 */
17
18#include <hwregs/asm/reg_map_asm.h>
19#include <hwregs/asm/ddr2_defs_asm.h>
20
21 ;; WARNING! The registers r8 and r9 are used as parameters carrying
22 ;; information from the decompressor (if the kernel was compressed).
23 ;; They should not be used in the code below.
24
25 ;; Refer to ddr2 MDS for initialization sequence
26
27 ; Start clock
28 move.d REG_ADDR(ddr2, regi_ddr2_ctrl, rw_phy_cfg), $r0
29 move.d REG_STATE(ddr2, rw_phy_cfg, en, yes), $r1
30 move.d $r1, [$r0]
31
32 ; Reset phy and start calibration
33 move.d REG_ADDR(ddr2, regi_ddr2_ctrl, rw_phy_ctrl), $r0
34 move.d REG_STATE(ddr2, rw_phy_ctrl, rst, yes) | \
35 REG_STATE(ddr2, rw_phy_ctrl, cal_rst, yes), $r1
36 move.d $r1, [$r0]
37 move.d REG_STATE(ddr2, rw_phy_ctrl, cal_start, yes), $r1
38 move.d $r1, [$r0]
39
40 ; 2. Wait 200us
41 move.d 10000, $r2
421: bne 1b
43 subq 1, $r2
44
45 ; Issue commands
46 move.d REG_ADDR(ddr2, regi_ddr2_ctrl, rw_ctrl), $r0
47 move.d sdram_commands_start, $r2
48command_loop:
49 movu.b [$r2+], $r1
50 movu.w [$r2+], $r3
51do_cmd:
52 lslq 16, $r1
53 or.d $r3, $r1
54 move.d $r1, [$r0]
55 cmp.d sdram_commands_end, $r2
56 blo command_loop
57 nop
58
59 ; Set timing
60 move.d REG_ADDR(ddr2, regi_ddr2_ctrl, rw_timing), $r0
61 move.d CONFIG_ETRAX_DDR2_TIMING, $r1
62 move.d $r1, [$r0]
63
64 ; Set latency
65 move.d REG_ADDR(ddr2, regi_ddr2_ctrl, rw_latency), $r0
66 move.d 0x13, $r1
67 move.d $r1, [$r0]
68
69 ; Set configuration
70 move.d REG_ADDR(ddr2, regi_ddr2_ctrl, rw_cfg), $r0
71 move.d CONFIG_ETRAX_DDR2_CONFIG, $r1
72 move.d $r1, [$r0]
73
74 ba after_sdram_commands
75 nop
76
77sdram_commands_start:
78 .byte regk_ddr2_deselect
79 .word 0
80 .byte regk_ddr2_pre
81 .word regk_ddr2_pre_all
82 .byte regk_ddr2_emrs2
83 .word 0
84 .byte regk_ddr2_emrs3
85 .word 0
86 .byte regk_ddr2_emrs
87 .word regk_ddr2_dll_en
88 .byte regk_ddr2_mrs
89 .word regk_ddr2_dll_rst
90 .byte regk_ddr2_pre
91 .word regk_ddr2_pre_all
92 .byte regk_ddr2_ref
93 .word 0
94 .byte regk_ddr2_ref
95 .word 0
96 .byte regk_ddr2_mrs
97 .word CONFIG_ETRAX_DDR2_MRS & 0xffff
98 .byte regk_ddr2_emrs
99 .word regk_ddr2_ocd_default | regk_ddr2_dll_en
100 .byte regk_ddr2_emrs
101 .word regk_ddr2_ocd_exit | regk_ddr2_dll_en | (CONFIG_ETRAX_DDR2_MRS >> 16)
102sdram_commands_end:
103 .align 1
104after_sdram_commands:
diff --git a/arch/cris/arch-v32/mach-a3/hw_settings.S b/arch/cris/arch-v32/mach-a3/hw_settings.S
new file mode 100644
index 000000000000..258a6329cd4a
--- /dev/null
+++ b/arch/cris/arch-v32/mach-a3/hw_settings.S
@@ -0,0 +1,51 @@
1/*
2 * This table is used by some tools to extract hardware parameters.
3 * The table should be included in the kernel and the decompressor.
4 * Don't forget to update the tools if you change this table.
5 *
6 * Copyright (C) 2001-2007 Axis Communications AB
7 *
8 * Authors: Mikael Starvik <starvik@axis.com>
9 */
10
11#include <hwregs/asm/reg_map_asm.h>
12#include <hwregs/asm/ddr2_defs_asm.h>
13#include <hwregs/asm/gio_defs_asm.h>
14
15 .ascii "HW_PARAM_MAGIC" ; Magic number
16 .dword 0xc0004000 ; Kernel start address
17
18 ; Debug port
19#ifdef CONFIG_ETRAX_DEBUG_PORT0
20 .dword 0
21#elif defined(CONFIG_ETRAX_DEBUG_PORT1)
22 .dword 1
23#elif defined(CONFIG_ETRAX_DEBUG_PORT2)
24 .dword 2
25#elif defined(CONFIG_ETRAX_DEBUG_PORT3)
26 .dword 3
27#else
28 .dword 4 ; No debug
29#endif
30
31 ; Register values
32 .dword REG_ADDR(ddr2, regi_ddr2_ctrl, rw_cfg)
33 .dword CONFIG_ETRAX_DDR2_CONFIG
34 .dword REG_ADDR(ddr2, regi_ddr2_ctrl, rw_timing)
35 .dword CONFIG_ETRAX_DDR2_TIMING
36 .dword CONFIG_ETRAX_DDR2_MRS
37
38 .dword REG_ADDR(gio, regi_gio, rw_pa_dout)
39 .dword CONFIG_ETRAX_DEF_GIO_PA_OUT
40 .dword REG_ADDR(gio, regi_gio, rw_pa_oe)
41 .dword CONFIG_ETRAX_DEF_GIO_PA_OE
42 .dword REG_ADDR(gio, regi_gio, rw_pb_dout)
43 .dword CONFIG_ETRAX_DEF_GIO_PB_OUT
44 .dword REG_ADDR(gio, regi_gio, rw_pb_oe)
45 .dword CONFIG_ETRAX_DEF_GIO_PB_OE
46 .dword REG_ADDR(gio, regi_gio, rw_pc_dout)
47 .dword CONFIG_ETRAX_DEF_GIO_PC_OUT
48 .dword REG_ADDR(gio, regi_gio, rw_pc_oe)
49 .dword CONFIG_ETRAX_DEF_GIO_PC_OE
50
51 .dword 0 ; No more register values
diff --git a/arch/cris/arch-v32/mach-a3/io.c b/arch/cris/arch-v32/mach-a3/io.c
new file mode 100644
index 000000000000..9eeaf3eca474
--- /dev/null
+++ b/arch/cris/arch-v32/mach-a3/io.c
@@ -0,0 +1,149 @@
1/*
2 * Helper functions for I/O pins.
3 *
4 * Copyright (c) 2005-2007 Axis Communications AB.
5 */
6
7#include <linux/types.h>
8#include <linux/errno.h>
9#include <linux/init.h>
10#include <linux/string.h>
11#include <linux/ctype.h>
12#include <linux/kernel.h>
13#include <linux/module.h>
14#include <asm/io.h>
15#include <asm/arch/mach/pinmux.h>
16#include <hwregs/gio_defs.h>
17
18struct crisv32_ioport crisv32_ioports[] = {
19 {
20 (unsigned long *)REG_ADDR(gio, regi_gio, rw_pa_oe),
21 (unsigned long *)REG_ADDR(gio, regi_gio, rw_pa_dout),
22 (unsigned long *)REG_ADDR(gio, regi_gio, r_pa_din),
23 32
24 },
25 {
26 (unsigned long *)REG_ADDR(gio, regi_gio, rw_pb_oe),
27 (unsigned long *)REG_ADDR(gio, regi_gio, rw_pb_dout),
28 (unsigned long *)REG_ADDR(gio, regi_gio, r_pb_din),
29 32
30 },
31 {
32 (unsigned long *)REG_ADDR(gio, regi_gio, rw_pc_oe),
33 (unsigned long *)REG_ADDR(gio, regi_gio, rw_pc_dout),
34 (unsigned long *)REG_ADDR(gio, regi_gio, r_pc_din),
35 16
36 },
37};
38
39#define NBR_OF_PORTS sizeof(crisv32_ioports)/sizeof(struct crisv32_ioport)
40
41struct crisv32_iopin crisv32_led_net0_green;
42struct crisv32_iopin crisv32_led_net0_red;
43struct crisv32_iopin crisv32_led2_green;
44struct crisv32_iopin crisv32_led2_red;
45struct crisv32_iopin crisv32_led3_green;
46struct crisv32_iopin crisv32_led3_red;
47
48/* Dummy port used when green LED and red LED is on the same bit */
49static unsigned long io_dummy;
50static struct crisv32_ioport dummy_port = {
51 &io_dummy,
52 &io_dummy,
53 &io_dummy,
54 32
55};
56static struct crisv32_iopin dummy_led = {
57 &dummy_port,
58 0
59};
60
61static int __init crisv32_io_init(void)
62{
63 int ret = 0;
64
65 u32 i;
66
67 /* Locks *should* be dynamically initialized. */
68 for (i = 0; i < ARRAY_SIZE(crisv32_ioports); i++)
69 spin_lock_init(&crisv32_ioports[i].lock);
70 spin_lock_init(&dummy_port.lock);
71
72 /* Initialize LEDs */
73#if (defined(CONFIG_ETRAX_NBR_LED_GRP_ONE) || defined(CONFIG_ETRAX_NBR_LED_GRP_TWO))
74 ret += crisv32_io_get_name(&crisv32_led_net0_green,
75 CONFIG_ETRAX_LED_G_NET0);
76 crisv32_io_set_dir(&crisv32_led_net0_green, crisv32_io_dir_out);
77 if (strcmp(CONFIG_ETRAX_LED_G_NET0, CONFIG_ETRAX_LED_R_NET0)) {
78 ret += crisv32_io_get_name(&crisv32_led_net0_red,
79 CONFIG_ETRAX_LED_R_NET0);
80 crisv32_io_set_dir(&crisv32_led_net0_red, crisv32_io_dir_out);
81 } else
82 crisv32_led_net0_red = dummy_led;
83#endif
84
85 ret += crisv32_io_get_name(&crisv32_led2_green, CONFIG_ETRAX_V32_LED2G);
86 ret += crisv32_io_get_name(&crisv32_led2_red, CONFIG_ETRAX_V32_LED2R);
87 ret += crisv32_io_get_name(&crisv32_led3_green, CONFIG_ETRAX_V32_LED3G);
88 ret += crisv32_io_get_name(&crisv32_led3_red, CONFIG_ETRAX_V32_LED3R);
89
90 crisv32_io_set_dir(&crisv32_led2_green, crisv32_io_dir_out);
91 crisv32_io_set_dir(&crisv32_led2_red, crisv32_io_dir_out);
92 crisv32_io_set_dir(&crisv32_led3_green, crisv32_io_dir_out);
93 crisv32_io_set_dir(&crisv32_led3_red, crisv32_io_dir_out);
94
95 return ret;
96}
97
98__initcall(crisv32_io_init);
99
100int crisv32_io_get(struct crisv32_iopin *iopin,
101 unsigned int port, unsigned int pin)
102{
103 if (port > NBR_OF_PORTS)
104 return -EINVAL;
105 if (port > crisv32_ioports[port].pin_count)
106 return -EINVAL;
107
108 iopin->bit = 1 << pin;
109 iopin->port = &crisv32_ioports[port];
110
111 if (crisv32_pinmux_alloc(port, pin, pin, pinmux_gpio))
112 return -EIO;
113
114 return 0;
115}
116
117int crisv32_io_get_name(struct crisv32_iopin *iopin, const char *name)
118{
119 int port;
120 int pin;
121
122 if (toupper(*name) == 'P')
123 name++;
124
125 if (toupper(*name) < 'A' || toupper(*name) > 'E')
126 return -EINVAL;
127
128 port = toupper(*name) - 'A';
129 name++;
130 pin = simple_strtoul(name, NULL, 10);
131
132 if (pin < 0 || pin > crisv32_ioports[port].pin_count)
133 return -EINVAL;
134
135 iopin->bit = 1 << pin;
136 iopin->port = &crisv32_ioports[port];
137
138 if (crisv32_pinmux_alloc(port, pin, pin, pinmux_gpio))
139 return -EIO;
140
141 return 0;
142}
143
144#ifdef CONFIG_PCI
145/* PCI I/O access stuff */
146struct cris_io_operations *cris_iops = NULL;
147EXPORT_SYMBOL(cris_iops);
148#endif
149
diff --git a/arch/cris/arch-v32/mach-a3/pinmux.c b/arch/cris/arch-v32/mach-a3/pinmux.c
new file mode 100644
index 000000000000..0a28c9bedfb7
--- /dev/null
+++ b/arch/cris/arch-v32/mach-a3/pinmux.c
@@ -0,0 +1,386 @@
1/*
2 * Allocator for I/O pins. All pins are allocated to GPIO at bootup.
3 * Unassigned pins and GPIO pins can be allocated to a fixed interface
4 * or the I/O processor instead.
5 *
6 * Copyright (c) 2005-2007 Axis Communications AB.
7 */
8
9#include <linux/init.h>
10#include <linux/errno.h>
11#include <linux/kernel.h>
12#include <linux/string.h>
13#include <linux/spinlock.h>
14#include <hwregs/reg_map.h>
15#include <hwregs/reg_rdwr.h>
16#include <pinmux.h>
17#include <hwregs/pinmux_defs.h>
18#include <hwregs/clkgen_defs.h>
19
20#undef DEBUG
21
22#define PINS 80
23#define PORT_PINS 32
24#define PORTS 3
25
26static char pins[PINS];
27static DEFINE_SPINLOCK(pinmux_lock);
28
29static void crisv32_pinmux_set(int port);
30
31int
32crisv32_pinmux_init(void)
33{
34 static int initialized;
35
36 if (!initialized) {
37 initialized = 1;
38 REG_WR_INT(pinmux, regi_pinmux, rw_hwprot, 0);
39 crisv32_pinmux_alloc(PORT_A, 0, 31, pinmux_gpio);
40 crisv32_pinmux_alloc(PORT_B, 0, 31, pinmux_gpio);
41 crisv32_pinmux_alloc(PORT_C, 0, 15, pinmux_gpio);
42 }
43
44 return 0;
45}
46
47int
48crisv32_pinmux_alloc(int port, int first_pin, int last_pin, enum pin_mode mode)
49{
50 int i;
51 unsigned long flags;
52
53 crisv32_pinmux_init();
54
55 if (port >= PORTS)
56 return -EINVAL;
57
58 spin_lock_irqsave(&pinmux_lock, flags);
59
60 for (i = first_pin; i <= last_pin; i++) {
61 if ((pins[port * PORT_PINS + i] != pinmux_none) &&
62 (pins[port * PORT_PINS + i] != pinmux_gpio) &&
63 (pins[port * PORT_PINS + i] != mode)) {
64 spin_unlock_irqrestore(&pinmux_lock, flags);
65#ifdef DEBUG
66 panic("Pinmux alloc failed!\n");
67#endif
68 return -EPERM;
69 }
70 }
71
72 for (i = first_pin; i <= last_pin; i++)
73 pins[port * PORT_PINS + i] = mode;
74
75 crisv32_pinmux_set(port);
76
77 spin_unlock_irqrestore(&pinmux_lock, flags);
78
79 return 0;
80}
81
82int
83crisv32_pinmux_alloc_fixed(enum fixed_function function)
84{
85 int ret = -EINVAL;
86 char saved[sizeof pins];
87 unsigned long flags;
88
89 spin_lock_irqsave(&pinmux_lock, flags);
90
91 /* Save internal data for recovery */
92 memcpy(saved, pins, sizeof pins);
93
94 crisv32_pinmux_init(); /* must be done before we read rw_hwprot */
95
96 reg_pinmux_rw_hwprot hwprot = REG_RD(pinmux, regi_pinmux, rw_hwprot);
97 reg_clkgen_rw_clk_ctrl clk_ctrl = REG_RD(clkgen, regi_clkgen,
98 rw_clk_ctrl);
99
100 switch (function) {
101 case pinmux_eth:
102 clk_ctrl.eth = regk_clkgen_yes;
103 clk_ctrl.dma0_1_eth = regk_clkgen_yes;
104 ret = crisv32_pinmux_alloc(PORT_B, 8, 23, pinmux_fixed);
105 ret |= crisv32_pinmux_alloc(PORT_B, 24, 25, pinmux_fixed);
106 hwprot.eth = hwprot.eth_mdio = regk_pinmux_yes;
107 break;
108 case pinmux_geth:
109 ret = crisv32_pinmux_alloc(PORT_B, 0, 7, pinmux_fixed);
110 hwprot.geth = regk_pinmux_yes;
111 break;
112 case pinmux_tg_cmos:
113 clk_ctrl.ccd_tg_100 = clk_ctrl.ccd_tg_200 = regk_clkgen_yes;
114 ret = crisv32_pinmux_alloc(PORT_B, 27, 29, pinmux_fixed);
115 hwprot.tg_clk = regk_pinmux_yes;
116 break;
117 case pinmux_tg_ccd:
118 clk_ctrl.ccd_tg_100 = clk_ctrl.ccd_tg_200 = regk_clkgen_yes;
119 ret = crisv32_pinmux_alloc(PORT_B, 27, 31, pinmux_fixed);
120 ret |= crisv32_pinmux_alloc(PORT_C, 0, 15, pinmux_fixed);
121 hwprot.tg = hwprot.tg_clk = regk_pinmux_yes;
122 break;
123 case pinmux_vout:
124 clk_ctrl.strdma0_2_video = regk_clkgen_yes;
125 ret = crisv32_pinmux_alloc(PORT_A, 8, 18, pinmux_fixed);
126 hwprot.vout = hwprot.vout_sync = regk_pinmux_yes;
127 break;
128 case pinmux_ser1:
129 clk_ctrl.sser_ser_dma6_7 = regk_clkgen_yes;
130 ret = crisv32_pinmux_alloc(PORT_A, 24, 25, pinmux_fixed);
131 hwprot.ser1 = regk_pinmux_yes;
132 break;
133 case pinmux_ser2:
134 clk_ctrl.sser_ser_dma6_7 = regk_clkgen_yes;
135 ret = crisv32_pinmux_alloc(PORT_A, 26, 27, pinmux_fixed);
136 hwprot.ser2 = regk_pinmux_yes;
137 break;
138 case pinmux_ser3:
139 clk_ctrl.sser_ser_dma6_7 = regk_clkgen_yes;
140 ret = crisv32_pinmux_alloc(PORT_A, 28, 29, pinmux_fixed);
141 hwprot.ser3 = regk_pinmux_yes;
142 break;
143 case pinmux_ser4:
144 clk_ctrl.sser_ser_dma6_7 = regk_clkgen_yes;
145 ret = crisv32_pinmux_alloc(PORT_A, 30, 31, pinmux_fixed);
146 hwprot.ser4 = regk_pinmux_yes;
147 break;
148 case pinmux_sser:
149 clk_ctrl.sser_ser_dma6_7 = regk_clkgen_yes;
150 ret = crisv32_pinmux_alloc(PORT_A, 19, 23, pinmux_fixed);
151 hwprot.sser = regk_pinmux_yes;
152 break;
153 case pinmux_pio:
154 hwprot.pio = regk_pinmux_yes;
155 ret = 0;
156 break;
157 case pinmux_pwm0:
158 ret = crisv32_pinmux_alloc(PORT_A, 30, 30, pinmux_fixed);
159 hwprot.pwm0 = regk_pinmux_yes;
160 break;
161 case pinmux_pwm1:
162 ret = crisv32_pinmux_alloc(PORT_A, 31, 31, pinmux_fixed);
163 hwprot.pwm1 = regk_pinmux_yes;
164 break;
165 case pinmux_pwm2:
166 ret = crisv32_pinmux_alloc(PORT_B, 26, 26, pinmux_fixed);
167 hwprot.pwm2 = regk_pinmux_yes;
168 break;
169 case pinmux_i2c0:
170 ret = crisv32_pinmux_alloc(PORT_A, 0, 1, pinmux_fixed);
171 hwprot.i2c0 = regk_pinmux_yes;
172 break;
173 case pinmux_i2c1:
174 ret = crisv32_pinmux_alloc(PORT_A, 2, 3, pinmux_fixed);
175 hwprot.i2c1 = regk_pinmux_yes;
176 break;
177 case pinmux_i2c1_3wire:
178 ret = crisv32_pinmux_alloc(PORT_A, 2, 3, pinmux_fixed);
179 ret |= crisv32_pinmux_alloc(PORT_A, 7, 7, pinmux_fixed);
180 hwprot.i2c1 = hwprot.i2c1_sen = regk_pinmux_yes;
181 break;
182 case pinmux_i2c1_sda1:
183 ret = crisv32_pinmux_alloc(PORT_A, 2, 4, pinmux_fixed);
184 hwprot.i2c1 = hwprot.i2c1_sda1 = regk_pinmux_yes;
185 break;
186 case pinmux_i2c1_sda2:
187 ret = crisv32_pinmux_alloc(PORT_A, 2, 3, pinmux_fixed);
188 ret |= crisv32_pinmux_alloc(PORT_A, 5, 5, pinmux_fixed);
189 hwprot.i2c1 = hwprot.i2c1_sda2 = regk_pinmux_yes;
190 break;
191 case pinmux_i2c1_sda3:
192 ret = crisv32_pinmux_alloc(PORT_A, 2, 3, pinmux_fixed);
193 ret |= crisv32_pinmux_alloc(PORT_A, 6, 6, pinmux_fixed);
194 hwprot.i2c1 = hwprot.i2c1_sda3 = regk_pinmux_yes;
195 break;
196 default:
197 ret = -EINVAL;
198 break;
199 }
200
201 if (!ret) {
202 REG_WR(pinmux, regi_pinmux, rw_hwprot, hwprot);
203 REG_WR(clkgen, regi_clkgen, rw_clk_ctrl, clk_ctrl);
204 } else
205 memcpy(pins, saved, sizeof pins);
206
207 spin_unlock_irqrestore(&pinmux_lock, flags);
208
209 return ret;
210}
211
212void
213crisv32_pinmux_set(int port)
214{
215 int i;
216 int gpio_val = 0;
217 int iop_val = 0;
218 int pin = port * PORT_PINS;
219
220 for (i = 0; (i < PORT_PINS) && (pin < PINS); i++, pin++) {
221 if (pins[pin] == pinmux_gpio)
222 gpio_val |= (1 << i);
223 else if (pins[pin] == pinmux_iop)
224 iop_val |= (1 << i);
225 }
226
227 REG_WRITE(int, regi_pinmux + REG_RD_ADDR_pinmux_rw_gio_pa + 4 * port,
228 gpio_val);
229 REG_WRITE(int, regi_pinmux + REG_RD_ADDR_pinmux_rw_iop_pa + 4 * port,
230 iop_val);
231
232#ifdef DEBUG
233 crisv32_pinmux_dump();
234#endif
235}
236
237int
238crisv32_pinmux_dealloc(int port, int first_pin, int last_pin)
239{
240 int i;
241 unsigned long flags;
242
243 crisv32_pinmux_init();
244
245 if (port > PORTS)
246 return -EINVAL;
247
248 spin_lock_irqsave(&pinmux_lock, flags);
249
250 for (i = first_pin; i <= last_pin; i++)
251 pins[port * PORT_PINS + i] = pinmux_none;
252
253 crisv32_pinmux_set(port);
254 spin_unlock_irqrestore(&pinmux_lock, flags);
255
256 return 0;
257}
258
259int
260crisv32_pinmux_dealloc_fixed(enum fixed_function function)
261{
262 int ret = -EINVAL;
263 char saved[sizeof pins];
264 unsigned long flags;
265
266 spin_lock_irqsave(&pinmux_lock, flags);
267
268 /* Save internal data for recovery */
269 memcpy(saved, pins, sizeof pins);
270
271 crisv32_pinmux_init(); /* must be done before we read rw_hwprot */
272
273 reg_pinmux_rw_hwprot hwprot = REG_RD(pinmux, regi_pinmux, rw_hwprot);
274
275 switch (function) {
276 case pinmux_eth:
277 ret = crisv32_pinmux_dealloc(PORT_B, 8, 23);
278 ret |= crisv32_pinmux_dealloc(PORT_B, 24, 25);
279 ret |= crisv32_pinmux_dealloc(PORT_B, 0, 7);
280 hwprot.eth = hwprot.eth_mdio = hwprot.geth = regk_pinmux_no;
281 break;
282 case pinmux_tg_cmos:
283 ret = crisv32_pinmux_dealloc(PORT_B, 27, 29);
284 hwprot.tg_clk = regk_pinmux_no;
285 break;
286 case pinmux_tg_ccd:
287 ret = crisv32_pinmux_dealloc(PORT_B, 27, 31);
288 ret |= crisv32_pinmux_dealloc(PORT_C, 0, 15);
289 hwprot.tg = hwprot.tg_clk = regk_pinmux_no;
290 break;
291 case pinmux_vout:
292 ret = crisv32_pinmux_dealloc(PORT_A, 8, 18);
293 hwprot.vout = hwprot.vout_sync = regk_pinmux_no;
294 break;
295 case pinmux_ser1:
296 ret = crisv32_pinmux_dealloc(PORT_A, 24, 25);
297 hwprot.ser1 = regk_pinmux_no;
298 break;
299 case pinmux_ser2:
300 ret = crisv32_pinmux_dealloc(PORT_A, 26, 27);
301 hwprot.ser2 = regk_pinmux_no;
302 break;
303 case pinmux_ser3:
304 ret = crisv32_pinmux_dealloc(PORT_A, 28, 29);
305 hwprot.ser3 = regk_pinmux_no;
306 break;
307 case pinmux_ser4:
308 ret = crisv32_pinmux_dealloc(PORT_A, 30, 31);
309 hwprot.ser4 = regk_pinmux_no;
310 break;
311 case pinmux_sser:
312 ret = crisv32_pinmux_dealloc(PORT_A, 19, 23);
313 hwprot.sser = regk_pinmux_no;
314 break;
315 case pinmux_pwm0:
316 ret = crisv32_pinmux_dealloc(PORT_A, 30, 30);
317 hwprot.pwm0 = regk_pinmux_no;
318 break;
319 case pinmux_pwm1:
320 ret = crisv32_pinmux_dealloc(PORT_A, 31, 31);
321 hwprot.pwm1 = regk_pinmux_no;
322 break;
323 case pinmux_pwm2:
324 ret = crisv32_pinmux_dealloc(PORT_B, 26, 26);
325 hwprot.pwm2 = regk_pinmux_no;
326 break;
327 case pinmux_i2c0:
328 ret = crisv32_pinmux_dealloc(PORT_A, 0, 1);
329 hwprot.i2c0 = regk_pinmux_no;
330 break;
331 case pinmux_i2c1:
332 ret = crisv32_pinmux_dealloc(PORT_A, 2, 3);
333 hwprot.i2c1 = regk_pinmux_no;
334 break;
335 case pinmux_i2c1_3wire:
336 ret = crisv32_pinmux_dealloc(PORT_A, 2, 3);
337 ret |= crisv32_pinmux_dealloc(PORT_A, 7, 7);
338 hwprot.i2c1 = hwprot.i2c1_sen = regk_pinmux_no;
339 break;
340 case pinmux_i2c1_sda1:
341 ret = crisv32_pinmux_dealloc(PORT_A, 2, 4);
342 hwprot.i2c1_sda1 = regk_pinmux_no;
343 break;
344 case pinmux_i2c1_sda2:
345 ret = crisv32_pinmux_dealloc(PORT_A, 2, 3);
346 ret |= crisv32_pinmux_dealloc(PORT_A, 5, 5);
347 hwprot.i2c1_sda2 = regk_pinmux_no;
348 break;
349 case pinmux_i2c1_sda3:
350 ret = crisv32_pinmux_dealloc(PORT_A, 2, 3);
351 ret |= crisv32_pinmux_dealloc(PORT_A, 6, 6);
352 hwprot.i2c1_sda3 = regk_pinmux_no;
353 break;
354 default:
355 ret = -EINVAL;
356 break;
357 }
358
359 if (!ret)
360 REG_WR(pinmux, regi_pinmux, rw_hwprot, hwprot);
361 else
362 memcpy(pins, saved, sizeof pins);
363
364 spin_unlock_irqrestore(&pinmux_lock, flags);
365
366 return ret;
367}
368
369void
370crisv32_pinmux_dump(void)
371{
372 int i, j;
373 int pin = 0;
374
375 crisv32_pinmux_init();
376
377 for (i = 0; i < PORTS; i++) {
378 pin++;
379 printk(KERN_DEBUG "Port %c\n", 'A'+i);
380 for (j = 0; (j < PORT_PINS) && (pin < PINS); j++, pin++)
381 printk(KERN_DEBUG
382 " Pin %d = %d\n", j, pins[i * PORT_PINS + j]);
383 }
384}
385
386__initcall(crisv32_pinmux_init);
diff --git a/arch/cris/arch-v32/mach-a3/vcs_hook.c b/arch/cris/arch-v32/mach-a3/vcs_hook.c
new file mode 100644
index 000000000000..58b1a5469fd7
--- /dev/null
+++ b/arch/cris/arch-v32/mach-a3/vcs_hook.c
@@ -0,0 +1,103 @@
1/*
2 * Simulator hook mechanism
3 */
4
5#include "vcs_hook.h"
6#include <asm/io.h>
7#include <stdarg.h>
8
9#define HOOK_TRIG_ADDR 0xb7000000
10#define HOOK_MEM_BASE_ADDR 0xce000000
11
12static volatile unsigned *hook_base;
13
14#define HOOK_DATA(offset) hook_base[offset]
15#define VHOOK_DATA(offset) hook_base[offset]
16#define HOOK_TRIG(funcid) \
17 do { \
18 *((unsigned *) HOOK_TRIG_ADDR) = funcid; \
19 } while (0)
20#define HOOK_DATA_BYTE(offset) ((unsigned char *)hook_base)[offset]
21
22static void hook_init(void)
23{
24 static int first = 1;
25 if (first) {
26 first = 0;
27 hook_base = ioremap(HOOK_MEM_BASE_ADDR, 8192);
28 }
29}
30
31static unsigned hook_trig(unsigned id)
32{
33 unsigned ret;
34
35 /* preempt_disable(); */
36
37 /* Dummy read from mem to make sure data has propagated to memory
38 * before trigging */
39 ret = *hook_base;
40
41 /* trigger hook */
42 HOOK_TRIG(id);
43
44 /* wait for call to finish */
45 while (VHOOK_DATA(0) > 0) ;
46
47 /* extract return value */
48
49 ret = VHOOK_DATA(1);
50
51 return ret;
52}
53
54int hook_call(unsigned id, unsigned pcnt, ...)
55{
56 va_list ap;
57 int i;
58 unsigned ret;
59
60 hook_init();
61
62 HOOK_DATA(0) = id;
63
64 va_start(ap, pcnt);
65 for (i = 1; i <= pcnt; i++)
66 HOOK_DATA(i) = va_arg(ap, unsigned);
67 va_end(ap);
68
69 ret = hook_trig(id);
70
71 return ret;
72}
73
74int hook_call_str(unsigned id, unsigned size, const char *str)
75{
76 int i;
77 unsigned ret;
78
79 hook_init();
80
81 HOOK_DATA(0) = id;
82 HOOK_DATA(1) = size;
83
84 for (i = 0; i < size; i++)
85 HOOK_DATA_BYTE(8 + i) = str[i];
86 HOOK_DATA_BYTE(8 + i) = 0;
87
88 ret = hook_trig(id);
89
90 return ret;
91}
92
93void print_str(const char *str)
94{
95 int i;
96 /* find null at end of string */
97 for (i = 1; str[i]; i++) ;
98 hook_call(hook_print_str, i, str);
99}
100
101void CPU_WATCHDOG_TIMEOUT(unsigned t)
102{
103}
diff --git a/arch/cris/arch-v32/mach-a3/vcs_hook.h b/arch/cris/arch-v32/mach-a3/vcs_hook.h
new file mode 100644
index 000000000000..8b73d0e8392d
--- /dev/null
+++ b/arch/cris/arch-v32/mach-a3/vcs_hook.h
@@ -0,0 +1,58 @@
1/*
2 * Simulator hook call mechanism
3 */
4
5#ifndef __hook_h__
6#define __hook_h__
7
8int hook_call(unsigned id, unsigned pcnt, ...);
9int hook_call_str(unsigned id, unsigned size, const char *str);
10
11enum hook_ids {
12 hook_debug_on = 1,
13 hook_debug_off,
14 hook_stop_sim_ok,
15 hook_stop_sim_fail,
16 hook_alloc_shared,
17 hook_ptr_shared,
18 hook_free_shared,
19 hook_file2shared,
20 hook_cmp_shared,
21 hook_print_params,
22 hook_sim_time,
23 hook_stop_sim,
24 hook_kick_dog,
25 hook_dog_timeout,
26 hook_rand,
27 hook_srand,
28 hook_rand_range,
29 hook_print_str,
30 hook_print_hex,
31 hook_cmp_offset_shared,
32 hook_fill_random_shared,
33 hook_alloc_random_data,
34 hook_calloc_random_data,
35 hook_print_int,
36 hook_print_uint,
37 hook_fputc,
38 hook_init_fd,
39 hook_sbrk,
40 hook_print_context_descr,
41 hook_print_data_descr,
42 hook_print_group_descr,
43 hook_fill_shared,
44 hook_sl_srand,
45 hook_sl_rand_irange,
46 hook_sl_rand_urange,
47 hook_sl_sh_malloc_aligned,
48 hook_sl_sh_calloc_aligned,
49 hook_sl_sh_alloc_random_data,
50 hook_sl_sh_file2mem,
51 hook_sl_vera_mbox_handle,
52 hook_sl_vera_mbox_put,
53 hook_sl_vera_mbox_get,
54 hook_sl_system,
55 hook_sl_sh_hexdump
56};
57
58#endif
diff --git a/arch/cris/arch-v32/mach-fs/Kconfig b/arch/cris/arch-v32/mach-fs/Kconfig
new file mode 100644
index 000000000000..f6d74475f1c6
--- /dev/null
+++ b/arch/cris/arch-v32/mach-fs/Kconfig
@@ -0,0 +1,216 @@
1if ETRAXFS
2
3menu "ETRAX FS options"
4 depends on ETRAXFS
5
6config ETRAX_DRAM_VIRTUAL_BASE
7 hex
8 depends on ETRAX_ARCH_V32
9 default "c0000000"
10
11config ETRAX_SERIAL_PORTS
12 int
13 default 4
14
15config ETRAX_MEM_GRP1_CONFIG
16 hex "MEM_GRP1_CONFIG"
17 depends on ETRAX_ARCH_V32
18 default "4044a"
19 help
20 Waitstates for flash. The default value is suitable for the
21 standard flashes used in axis products (120 ns).
22
23config ETRAX_MEM_GRP2_CONFIG
24 hex "MEM_GRP2_CONFIG"
25 depends on ETRAX_ARCH_V32
26 default "0"
27 help
28 Waitstates for SRAM. 0 is a good choice for most Axis products.
29
30config ETRAX_MEM_GRP3_CONFIG
31 hex "MEM_GRP3_CONFIG"
32 depends on ETRAX_ARCH_V32
33 default "0"
34 help
35 Waitstates for CSP0-3. 0 is a good choice for most Axis products.
36 It may need to be changed if external devices such as extra
37 register-mapped LEDs are used.
38
39config ETRAX_MEM_GRP4_CONFIG
40 hex "MEM_GRP4_CONFIG"
41 depends on ETRAX_ARCH_V32
42 default "0"
43 help
44 Waitstates for CSP4-6. 0 is a good choice for most Axis products.
45
46config ETRAX_SDRAM_GRP0_CONFIG
47 hex "SDRAM_GRP0_CONFIG"
48 depends on ETRAX_ARCH_V32
49 default "336"
50 help
51 SDRAM configuration for group 0. The value depends on the
52 hardware configuration. The default value is suitable
53 for 32 MB organized as two 16 bits chips (e.g. Axis
54 part number 18550) connected as one 32 bit device (i.e. in
55 the same group).
56
57config ETRAX_SDRAM_GRP1_CONFIG
58 hex "SDRAM_GRP1_CONFIG"
59 depends on ETRAX_ARCH_V32
60 default "0"
61 help
62 SDRAM configuration for group 1. The defult value is 0
63 because group 1 is not used in the default configuration,
64 described in the help for SDRAM_GRP0_CONFIG.
65
66config ETRAX_SDRAM_TIMING
67 hex "SDRAM_TIMING"
68 depends on ETRAX_ARCH_V32
69 default "104a"
70 help
71 SDRAM timing parameters. The default value is ok for
72 most hardwares but large SDRAMs may require a faster
73 refresh (a.k.a 8K refresh). The default value implies
74 100MHz clock and SDR mode.
75
76config ETRAX_SDRAM_COMMAND
77 hex "SDRAM_COMMAND"
78 depends on ETRAX_ARCH_V32
79 default "0"
80 help
81 SDRAM command. Should be 0 unless you really know what
82 you are doing (may be != 0 for unusual address line
83 mappings such as in a MCM)..
84
85config ETRAX_DEF_GIO_PA_OE
86 hex "GIO_PA_OE"
87 depends on ETRAX_ARCH_V32
88 default "1c"
89 help
90 Configures the direction of general port A bits. 1 is out, 0 is in.
91 This is often totally different depending on the product used.
92 There are some guidelines though - if you know that only LED's are
93 connected to port PA, then they are usually connected to bits 2-4
94 and you can therefore use 1c. On other boards which don't have the
95 LED's at the general ports, these bits are used for all kinds of
96 stuff. If you don't know what to use, it is always safe to put all
97 as inputs, although floating inputs isn't good.
98
99config ETRAX_DEF_GIO_PA_OUT
100 hex "GIO_PA_OUT"
101 depends on ETRAX_ARCH_V32
102 default "00"
103 help
104 Configures the initial data for the general port A bits. Most
105 products should use 00 here.
106
107config ETRAX_DEF_GIO_PB_OE
108 hex "GIO_PB_OE"
109 depends on ETRAX_ARCH_V32
110 default "00000"
111 help
112 Configures the direction of general port B bits. 1 is out, 0 is in.
113 This is often totally different depending on the product used.
114 There are some guidelines though - if you know that only LED's are
115 connected to port PA, then they are usually connected to bits 2-4
116 and you can therefore use 1c. On other boards which don't have the
117 LED's at the general ports, these bits are used for all kinds of
118 stuff. If you don't know what to use, it is always safe to put all
119 as inputs, although floating inputs isn't good.
120
121config ETRAX_DEF_GIO_PB_OUT
122 hex "GIO_PB_OUT"
123 depends on ETRAX_ARCH_V32
124 default "00000"
125 help
126 Configures the initial data for the general port B bits. Most
127 products should use 00000 here.
128
129config ETRAX_DEF_GIO_PC_OE
130 hex "GIO_PC_OE"
131 depends on ETRAX_ARCH_V32
132 default "00000"
133 help
134 Configures the direction of general port C bits. 1 is out, 0 is in.
135 This is often totally different depending on the product used.
136 There are some guidelines though - if you know that only LED's are
137 connected to port PA, then they are usually connected to bits 2-4
138 and you can therefore use 1c. On other boards which don't have the
139 LED's at the general ports, these bits are used for all kinds of
140 stuff. If you don't know what to use, it is always safe to put all
141 as inputs, although floating inputs isn't good.
142
143config ETRAX_DEF_GIO_PC_OUT
144 hex "GIO_PC_OUT"
145 depends on ETRAX_ARCH_V32
146 default "00000"
147 help
148 Configures the initial data for the general port C bits. Most
149 products should use 00000 here.
150
151config ETRAX_DEF_GIO_PD_OE
152 hex "GIO_PD_OE"
153 depends on ETRAX_ARCH_V32
154 default "00000"
155 help
156 Configures the direction of general port D bits. 1 is out, 0 is in.
157 This is often totally different depending on the product used.
158 There are some guidelines though - if you know that only LED's are
159 connected to port PA, then they are usually connected to bits 2-4
160 and you can therefore use 1c. On other boards which don't have the
161 LED's at the general ports, these bits are used for all kinds of
162 stuff. If you don't know what to use, it is always safe to put all
163 as inputs, although floating inputs isn't good.
164
165config ETRAX_DEF_GIO_PD_OUT
166 hex "GIO_PD_OUT"
167 depends on ETRAX_ARCH_V32
168 default "00000"
169 help
170 Configures the initial data for the general port D bits. Most
171 products should use 00000 here.
172
173config ETRAX_DEF_GIO_PE_OE
174 hex "GIO_PE_OE"
175 depends on ETRAX_ARCH_V32
176 default "00000"
177 help
178 Configures the direction of general port E bits. 1 is out, 0 is in.
179 This is often totally different depending on the product used.
180 There are some guidelines though - if you know that only LED's are
181 connected to port PA, then they are usually connected to bits 2-4
182 and you can therefore use 1c. On other boards which don't have the
183 LED's at the general ports, these bits are used for all kinds of
184 stuff. If you don't know what to use, it is always safe to put all
185 as inputs, although floating inputs isn't good.
186
187config ETRAX_DEF_GIO_PE_OUT
188 hex "GIO_PE_OUT"
189 depends on ETRAX_ARCH_V32
190 default "00000"
191 help
192 Configures the initial data for the general port E bits. Most
193 products should use 00000 here.
194
195config ETRAX_DEF_GIO_PV_OE
196 hex "GIO_PV_OE"
197 depends on ETRAX_VIRTUAL_GPIO
198 default "0000"
199 help
200 Configures the direction of virtual general port V bits. 1 is out,
201 0 is in. This is often totally different depending on the product
202 used. These bits are used for all kinds of stuff. If you don't know
203 what to use, it is always safe to put all as inputs, although
204 floating inputs isn't good.
205
206config ETRAX_DEF_GIO_PV_OUT
207 hex "GIO_PV_OUT"
208 depends on ETRAX_VIRTUAL_GPIO
209 default "0000"
210 help
211 Configures the initial data for the virtual general port V bits.
212 Most products should use 0000 here.
213
214endmenu
215
216endif
diff --git a/arch/cris/arch-v32/mach-fs/Makefile b/arch/cris/arch-v32/mach-fs/Makefile
new file mode 100644
index 000000000000..4ff407a1b931
--- /dev/null
+++ b/arch/cris/arch-v32/mach-fs/Makefile
@@ -0,0 +1,11 @@
1# $Id: Makefile,v 1.3 2007/03/13 11:57:46 starvik Exp $
2#
3# Makefile for the linux kernel.
4#
5
6obj-y := dma.o pinmux.o io.o arbiter.o
7bj-$(CONFIG_ETRAX_VCS_SIM) += vcs_hook.o
8obj-$(CONFIG_CPU_FREQ) += cpufreq.o
9
10clean:
11
diff --git a/arch/cris/arch-v32/mach-fs/arbiter.c b/arch/cris/arch-v32/mach-fs/arbiter.c
new file mode 100644
index 000000000000..84d31bd7b692
--- /dev/null
+++ b/arch/cris/arch-v32/mach-fs/arbiter.c
@@ -0,0 +1,404 @@
1/*
2 * Memory arbiter functions. Allocates bandwidth through the
3 * arbiter and sets up arbiter breakpoints.
4 *
5 * The algorithm first assigns slots to the clients that has specified
6 * bandwidth (e.g. ethernet) and then the remaining slots are divided
7 * on all the active clients.
8 *
9 * Copyright (c) 2004-2007 Axis Communications AB.
10 */
11
12#include <hwregs/reg_map.h>
13#include <hwregs/reg_rdwr.h>
14#include <hwregs/marb_defs.h>
15#include <arbiter.h>
16#include <hwregs/intr_vect.h>
17#include <linux/interrupt.h>
18#include <linux/signal.h>
19#include <linux/errno.h>
20#include <linux/spinlock.h>
21#include <asm/io.h>
22#include <asm/irq_regs.h>
23
24struct crisv32_watch_entry {
25 unsigned long instance;
26 watch_callback *cb;
27 unsigned long start;
28 unsigned long end;
29 int used;
30};
31
32#define NUMBER_OF_BP 4
33#define NBR_OF_CLIENTS 14
34#define NBR_OF_SLOTS 64
35#define SDRAM_BANDWIDTH 100000000 /* Some kind of expected value */
36#define INTMEM_BANDWIDTH 400000000
37#define NBR_OF_REGIONS 2
38
39static struct crisv32_watch_entry watches[NUMBER_OF_BP] = {
40 {regi_marb_bp0},
41 {regi_marb_bp1},
42 {regi_marb_bp2},
43 {regi_marb_bp3}
44};
45
46static u8 requested_slots[NBR_OF_REGIONS][NBR_OF_CLIENTS];
47static u8 active_clients[NBR_OF_REGIONS][NBR_OF_CLIENTS];
48static int max_bandwidth[NBR_OF_REGIONS] =
49 { SDRAM_BANDWIDTH, INTMEM_BANDWIDTH };
50
51DEFINE_SPINLOCK(arbiter_lock);
52
53static irqreturn_t crisv32_arbiter_irq(int irq, void *dev_id);
54
55/*
56 * "I'm the arbiter, I know the score.
57 * From square one I'll be watching all 64."
58 * (memory arbiter slots, that is)
59 *
60 * Or in other words:
61 * Program the memory arbiter slots for "region" according to what's
62 * in requested_slots[] and active_clients[], while minimizing
63 * latency. A caller may pass a non-zero positive amount for
64 * "unused_slots", which must then be the unallocated, remaining
65 * number of slots, free to hand out to any client.
66 */
67
68static void crisv32_arbiter_config(int region, int unused_slots)
69{
70 int slot;
71 int client;
72 int interval = 0;
73
74 /*
75 * This vector corresponds to the hardware arbiter slots (see
76 * the hardware documentation for semantics). We initialize
77 * each slot with a suitable sentinel value outside the valid
78 * range {0 .. NBR_OF_CLIENTS - 1} and replace them with
79 * client indexes. Then it's fed to the hardware.
80 */
81 s8 val[NBR_OF_SLOTS];
82
83 for (slot = 0; slot < NBR_OF_SLOTS; slot++)
84 val[slot] = -1;
85
86 for (client = 0; client < NBR_OF_CLIENTS; client++) {
87 int pos;
88 /* Allocate the requested non-zero number of slots, but
89 * also give clients with zero-requests one slot each
90 * while stocks last. We do the latter here, in client
91 * order. This makes sure zero-request clients are the
92 * first to get to any spare slots, else those slots
93 * could, when bandwidth is allocated close to the limit,
94 * all be allocated to low-index non-zero-request clients
95 * in the default-fill loop below. Another positive but
96 * secondary effect is a somewhat better spread of the
97 * zero-bandwidth clients in the vector, avoiding some of
98 * the latency that could otherwise be caused by the
99 * partitioning of non-zero-bandwidth clients at low
100 * indexes and zero-bandwidth clients at high
101 * indexes. (Note that this spreading can only affect the
102 * unallocated bandwidth.) All the above only matters for
103 * memory-intensive situations, of course.
104 */
105 if (!requested_slots[region][client]) {
106 /*
107 * Skip inactive clients. Also skip zero-slot
108 * allocations in this pass when there are no known
109 * free slots.
110 */
111 if (!active_clients[region][client]
112 || unused_slots <= 0)
113 continue;
114
115 unused_slots--;
116
117 /* Only allocate one slot for this client. */
118 interval = NBR_OF_SLOTS;
119 } else
120 interval =
121 NBR_OF_SLOTS / requested_slots[region][client];
122
123 pos = 0;
124 while (pos < NBR_OF_SLOTS) {
125 if (val[pos] >= 0)
126 pos++;
127 else {
128 val[pos] = client;
129 pos += interval;
130 }
131 }
132 }
133
134 client = 0;
135 for (slot = 0; slot < NBR_OF_SLOTS; slot++) {
136 /*
137 * Allocate remaining slots in round-robin
138 * client-number order for active clients. For this
139 * pass, we ignore requested bandwidth and previous
140 * allocations.
141 */
142 if (val[slot] < 0) {
143 int first = client;
144 while (!active_clients[region][client]) {
145 client = (client + 1) % NBR_OF_CLIENTS;
146 if (client == first)
147 break;
148 }
149 val[slot] = client;
150 client = (client + 1) % NBR_OF_CLIENTS;
151 }
152 if (region == EXT_REGION)
153 REG_WR_INT_VECT(marb, regi_marb, rw_ext_slots, slot,
154 val[slot]);
155 else if (region == INT_REGION)
156 REG_WR_INT_VECT(marb, regi_marb, rw_int_slots, slot,
157 val[slot]);
158 }
159}
160
161extern char _stext, _etext;
162
163static void crisv32_arbiter_init(void)
164{
165 static int initialized;
166
167 if (initialized)
168 return;
169
170 initialized = 1;
171
172 /*
173 * CPU caches are always set to active, but with zero
174 * bandwidth allocated. It should be ok to allocate zero
175 * bandwidth for the caches, because DMA for other channels
176 * will supposedly finish, once their programmed amount is
177 * done, and then the caches will get access according to the
178 * "fixed scheme" for unclaimed slots. Though, if for some
179 * use-case somewhere, there's a maximum CPU latency for
180 * e.g. some interrupt, we have to start allocating specific
181 * bandwidth for the CPU caches too.
182 */
183 active_clients[EXT_REGION][10] = active_clients[EXT_REGION][11] = 1;
184 crisv32_arbiter_config(EXT_REGION, 0);
185 crisv32_arbiter_config(INT_REGION, 0);
186
187 if (request_irq(MEMARB_INTR_VECT, crisv32_arbiter_irq, IRQF_DISABLED,
188 "arbiter", NULL))
189 printk(KERN_ERR "Couldn't allocate arbiter IRQ\n");
190
191#ifndef CONFIG_ETRAX_KGDB
192 /* Global watch for writes to kernel text segment. */
193 crisv32_arbiter_watch(virt_to_phys(&_stext), &_etext - &_stext,
194 arbiter_all_clients, arbiter_all_write, NULL);
195#endif
196}
197
198/* Main entry for bandwidth allocation. */
199
200int crisv32_arbiter_allocate_bandwidth(int client, int region,
201 unsigned long bandwidth)
202{
203 int i;
204 int total_assigned = 0;
205 int total_clients = 0;
206 int req;
207
208 crisv32_arbiter_init();
209
210 for (i = 0; i < NBR_OF_CLIENTS; i++) {
211 total_assigned += requested_slots[region][i];
212 total_clients += active_clients[region][i];
213 }
214
215 /* Avoid division by 0 for 0-bandwidth requests. */
216 req = bandwidth == 0
217 ? 0 : NBR_OF_SLOTS / (max_bandwidth[region] / bandwidth);
218
219 /*
220 * We make sure that there are enough slots only for non-zero
221 * requests. Requesting 0 bandwidth *may* allocate slots,
222 * though if all bandwidth is allocated, such a client won't
223 * get any and will have to rely on getting memory access
224 * according to the fixed scheme that's the default when one
225 * of the slot-allocated clients doesn't claim their slot.
226 */
227 if (total_assigned + req > NBR_OF_SLOTS)
228 return -ENOMEM;
229
230 active_clients[region][client] = 1;
231 requested_slots[region][client] = req;
232 crisv32_arbiter_config(region, NBR_OF_SLOTS - total_assigned);
233
234 return 0;
235}
236
237/*
238 * Main entry for bandwidth deallocation.
239 *
240 * Strictly speaking, for a somewhat constant set of clients where
241 * each client gets a constant bandwidth and is just enabled or
242 * disabled (somewhat dynamically), no action is necessary here to
243 * avoid starvation for non-zero-allocation clients, as the allocated
244 * slots will just be unused. However, handing out those unused slots
245 * to active clients avoids needless latency if the "fixed scheme"
246 * would give unclaimed slots to an eager low-index client.
247 */
248
249void crisv32_arbiter_deallocate_bandwidth(int client, int region)
250{
251 int i;
252 int total_assigned = 0;
253
254 requested_slots[region][client] = 0;
255 active_clients[region][client] = 0;
256
257 for (i = 0; i < NBR_OF_CLIENTS; i++)
258 total_assigned += requested_slots[region][i];
259
260 crisv32_arbiter_config(region, NBR_OF_SLOTS - total_assigned);
261}
262
263int crisv32_arbiter_watch(unsigned long start, unsigned long size,
264 unsigned long clients, unsigned long accesses,
265 watch_callback *cb)
266{
267 int i;
268
269 crisv32_arbiter_init();
270
271 if (start > 0x80000000) {
272 printk(KERN_ERR "Arbiter: %lX doesn't look like a "
273 "physical address", start);
274 return -EFAULT;
275 }
276
277 spin_lock(&arbiter_lock);
278
279 for (i = 0; i < NUMBER_OF_BP; i++) {
280 if (!watches[i].used) {
281 reg_marb_rw_intr_mask intr_mask =
282 REG_RD(marb, regi_marb, rw_intr_mask);
283
284 watches[i].used = 1;
285 watches[i].start = start;
286 watches[i].end = start + size;
287 watches[i].cb = cb;
288
289 REG_WR_INT(marb_bp, watches[i].instance, rw_first_addr,
290 watches[i].start);
291 REG_WR_INT(marb_bp, watches[i].instance, rw_last_addr,
292 watches[i].end);
293 REG_WR_INT(marb_bp, watches[i].instance, rw_op,
294 accesses);
295 REG_WR_INT(marb_bp, watches[i].instance, rw_clients,
296 clients);
297
298 if (i == 0)
299 intr_mask.bp0 = regk_marb_yes;
300 else if (i == 1)
301 intr_mask.bp1 = regk_marb_yes;
302 else if (i == 2)
303 intr_mask.bp2 = regk_marb_yes;
304 else if (i == 3)
305 intr_mask.bp3 = regk_marb_yes;
306
307 REG_WR(marb, regi_marb, rw_intr_mask, intr_mask);
308 spin_unlock(&arbiter_lock);
309
310 return i;
311 }
312 }
313 spin_unlock(&arbiter_lock);
314 return -ENOMEM;
315}
316
317int crisv32_arbiter_unwatch(int id)
318{
319 reg_marb_rw_intr_mask intr_mask = REG_RD(marb, regi_marb, rw_intr_mask);
320
321 crisv32_arbiter_init();
322
323 spin_lock(&arbiter_lock);
324
325 if ((id < 0) || (id >= NUMBER_OF_BP) || (!watches[id].used)) {
326 spin_unlock(&arbiter_lock);
327 return -EINVAL;
328 }
329
330 memset(&watches[id], 0, sizeof(struct crisv32_watch_entry));
331
332 if (id == 0)
333 intr_mask.bp0 = regk_marb_no;
334 else if (id == 1)
335 intr_mask.bp2 = regk_marb_no;
336 else if (id == 2)
337 intr_mask.bp2 = regk_marb_no;
338 else if (id == 3)
339 intr_mask.bp3 = regk_marb_no;
340
341 REG_WR(marb, regi_marb, rw_intr_mask, intr_mask);
342
343 spin_unlock(&arbiter_lock);
344 return 0;
345}
346
347extern void show_registers(struct pt_regs *regs);
348
349static irqreturn_t crisv32_arbiter_irq(int irq, void *dev_id)
350{
351 reg_marb_r_masked_intr masked_intr =
352 REG_RD(marb, regi_marb, r_masked_intr);
353 reg_marb_bp_r_brk_clients r_clients;
354 reg_marb_bp_r_brk_addr r_addr;
355 reg_marb_bp_r_brk_op r_op;
356 reg_marb_bp_r_brk_first_client r_first;
357 reg_marb_bp_r_brk_size r_size;
358 reg_marb_bp_rw_ack ack = { 0 };
359 reg_marb_rw_ack_intr ack_intr = {
360 .bp0 = 1, .bp1 = 1, .bp2 = 1, .bp3 = 1
361 };
362 struct crisv32_watch_entry *watch;
363
364 if (masked_intr.bp0) {
365 watch = &watches[0];
366 ack_intr.bp0 = regk_marb_yes;
367 } else if (masked_intr.bp1) {
368 watch = &watches[1];
369 ack_intr.bp1 = regk_marb_yes;
370 } else if (masked_intr.bp2) {
371 watch = &watches[2];
372 ack_intr.bp2 = regk_marb_yes;
373 } else if (masked_intr.bp3) {
374 watch = &watches[3];
375 ack_intr.bp3 = regk_marb_yes;
376 } else {
377 return IRQ_NONE;
378 }
379
380 /* Retrieve all useful information and print it. */
381 r_clients = REG_RD(marb_bp, watch->instance, r_brk_clients);
382 r_addr = REG_RD(marb_bp, watch->instance, r_brk_addr);
383 r_op = REG_RD(marb_bp, watch->instance, r_brk_op);
384 r_first = REG_RD(marb_bp, watch->instance, r_brk_first_client);
385 r_size = REG_RD(marb_bp, watch->instance, r_brk_size);
386
387 printk(KERN_INFO "Arbiter IRQ\n");
388 printk(KERN_INFO "Clients %X addr %X op %X first %X size %X\n",
389 REG_TYPE_CONV(int, reg_marb_bp_r_brk_clients, r_clients),
390 REG_TYPE_CONV(int, reg_marb_bp_r_brk_addr, r_addr),
391 REG_TYPE_CONV(int, reg_marb_bp_r_brk_op, r_op),
392 REG_TYPE_CONV(int, reg_marb_bp_r_brk_first_client, r_first),
393 REG_TYPE_CONV(int, reg_marb_bp_r_brk_size, r_size));
394
395 REG_WR(marb_bp, watch->instance, rw_ack, ack);
396 REG_WR(marb, regi_marb, rw_ack_intr, ack_intr);
397
398 printk(KERN_INFO "IRQ occured at %lX\n", get_irq_regs()->erp);
399
400 if (watch->cb)
401 watch->cb();
402
403 return IRQ_HANDLED;
404}
diff --git a/arch/cris/arch-v32/mach-fs/cpufreq.c b/arch/cris/arch-v32/mach-fs/cpufreq.c
new file mode 100644
index 000000000000..d57631c0d8d1
--- /dev/null
+++ b/arch/cris/arch-v32/mach-fs/cpufreq.c
@@ -0,0 +1,146 @@
1#include <linux/init.h>
2#include <linux/module.h>
3#include <linux/cpufreq.h>
4#include <hwregs/reg_map.h>
5#include <asm/arch/hwregs/reg_rdwr.h>
6#include <asm/arch/hwregs/config_defs.h>
7#include <asm/arch/hwregs/bif_core_defs.h>
8
9static int
10cris_sdram_freq_notifier(struct notifier_block *nb, unsigned long val,
11 void *data);
12
13static struct notifier_block cris_sdram_freq_notifier_block = {
14 .notifier_call = cris_sdram_freq_notifier
15};
16
17static struct cpufreq_frequency_table cris_freq_table[] = {
18 {0x01, 6000},
19 {0x02, 200000},
20 {0, CPUFREQ_TABLE_END},
21};
22
23static unsigned int cris_freq_get_cpu_frequency(unsigned int cpu)
24{
25 reg_config_rw_clk_ctrl clk_ctrl;
26 clk_ctrl = REG_RD(config, regi_config, rw_clk_ctrl);
27 return clk_ctrl.pll ? 200000 : 6000;
28}
29
30static void cris_freq_set_cpu_state(unsigned int state)
31{
32 int i;
33 struct cpufreq_freqs freqs;
34 reg_config_rw_clk_ctrl clk_ctrl;
35 clk_ctrl = REG_RD(config, regi_config, rw_clk_ctrl);
36
37 for_each_possible_cpu(i) {
38 freqs.old = cris_freq_get_cpu_frequency(i);
39 freqs.new = cris_freq_table[state].frequency;
40 freqs.cpu = i;
41 }
42
43 cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
44
45 local_irq_disable();
46
47 /* Even though we may be SMP they will share the same clock
48 * so all settings are made on CPU0. */
49 if (cris_freq_table[state].frequency == 200000)
50 clk_ctrl.pll = 1;
51 else
52 clk_ctrl.pll = 0;
53 REG_WR(config, regi_config, rw_clk_ctrl, clk_ctrl);
54
55 local_irq_enable();
56
57 cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
58};
59
60static int cris_freq_verify(struct cpufreq_policy *policy)
61{
62 return cpufreq_frequency_table_verify(policy, &cris_freq_table[0]);
63}
64
65static int cris_freq_target(struct cpufreq_policy *policy,
66 unsigned int target_freq, unsigned int relation)
67{
68 unsigned int newstate = 0;
69
70 if (cpufreq_frequency_table_target
71 (policy, cris_freq_table, target_freq, relation, &newstate))
72 return -EINVAL;
73
74 cris_freq_set_cpu_state(newstate);
75
76 return 0;
77}
78
79static int cris_freq_cpu_init(struct cpufreq_policy *policy)
80{
81 int result;
82
83 /* cpuinfo and default policy values */
84 policy->governor = CPUFREQ_DEFAULT_GOVERNOR;
85 policy->cpuinfo.transition_latency = 1000000; /* 1ms */
86 policy->cur = cris_freq_get_cpu_frequency(0);
87
88 result = cpufreq_frequency_table_cpuinfo(policy, cris_freq_table);
89 if (result)
90 return (result);
91
92 cpufreq_frequency_table_get_attr(cris_freq_table, policy->cpu);
93
94 return 0;
95}
96
97static int cris_freq_cpu_exit(struct cpufreq_policy *policy)
98{
99 cpufreq_frequency_table_put_attr(policy->cpu);
100 return 0;
101}
102
103static struct freq_attr *cris_freq_attr[] = {
104 &cpufreq_freq_attr_scaling_available_freqs,
105 NULL,
106};
107
108static struct cpufreq_driver cris_freq_driver = {
109 .get = cris_freq_get_cpu_frequency,
110 .verify = cris_freq_verify,
111 .target = cris_freq_target,
112 .init = cris_freq_cpu_init,
113 .exit = cris_freq_cpu_exit,
114 .name = "cris_freq",
115 .owner = THIS_MODULE,
116 .attr = cris_freq_attr,
117};
118
119static int __init cris_freq_init(void)
120{
121 int ret;
122 ret = cpufreq_register_driver(&cris_freq_driver);
123 cpufreq_register_notifier(&cris_sdram_freq_notifier_block,
124 CPUFREQ_TRANSITION_NOTIFIER);
125 return ret;
126}
127
128static int
129cris_sdram_freq_notifier(struct notifier_block *nb, unsigned long val,
130 void *data)
131{
132 int i;
133 struct cpufreq_freqs *freqs = data;
134 if (val == CPUFREQ_PRECHANGE) {
135 reg_bif_core_rw_sdram_timing timing =
136 REG_RD(bif_core, regi_bif_core, rw_sdram_timing);
137 timing.cpd = (freqs->new == 200000 ? 0 : 1);
138
139 if (freqs->new == 200000)
140 for (i = 0; i < 50000; i++) ;
141 REG_WR(bif_core, regi_bif_core, rw_sdram_timing, timing);
142 }
143 return 0;
144}
145
146module_init(cris_freq_init);
diff --git a/arch/cris/arch-v32/kernel/dma.c b/arch/cris/arch-v32/mach-fs/dma.c
index 570e19128ffd..a6acf4e6345c 100644
--- a/arch/cris/arch-v32/kernel/dma.c
+++ b/arch/cris/arch-v32/mach-fs/dma.c
@@ -3,49 +3,54 @@
3#include <linux/kernel.h> 3#include <linux/kernel.h>
4#include <linux/spinlock.h> 4#include <linux/spinlock.h>
5#include <asm/dma.h> 5#include <asm/dma.h>
6#include <asm/arch/hwregs/reg_map.h> 6#include <hwregs/reg_map.h>
7#include <asm/arch/hwregs/reg_rdwr.h> 7#include <hwregs/reg_rdwr.h>
8#include <asm/arch/hwregs/marb_defs.h> 8#include <hwregs/marb_defs.h>
9#include <asm/arch/hwregs/config_defs.h> 9#include <hwregs/config_defs.h>
10#include <asm/arch/hwregs/strmux_defs.h> 10#include <hwregs/strmux_defs.h>
11#include <linux/errno.h> 11#include <linux/errno.h>
12#include <asm/system.h> 12#include <asm/system.h>
13#include <asm/arch/arbiter.h> 13#include <asm/arch/mach/arbiter.h>
14 14
15static char used_dma_channels[MAX_DMA_CHANNELS]; 15static char used_dma_channels[MAX_DMA_CHANNELS];
16static const char * used_dma_channels_users[MAX_DMA_CHANNELS]; 16static const char *used_dma_channels_users[MAX_DMA_CHANNELS];
17 17
18static DEFINE_SPINLOCK(dma_lock); 18static DEFINE_SPINLOCK(dma_lock);
19 19
20int crisv32_request_dma(unsigned int dmanr, const char * device_id, 20int crisv32_request_dma(unsigned int dmanr, const char *device_id,
21 unsigned options, unsigned int bandwidth, 21 unsigned options, unsigned int bandwidth,
22 enum dma_owner owner) 22 enum dma_owner owner)
23{ 23{
24 unsigned long flags; 24 unsigned long flags;
25 reg_config_rw_clk_ctrl clk_ctrl; 25 reg_config_rw_clk_ctrl clk_ctrl;
26 reg_strmux_rw_cfg strmux_cfg; 26 reg_strmux_rw_cfg strmux_cfg;
27 27
28 if (crisv32_arbiter_allocate_bandwidth(dmanr, 28 if (crisv32_arbiter_allocate_bandwidth(dmanr,
29 options & DMA_INT_MEM ? INT_REGION : EXT_REGION, 29 options & DMA_INT_MEM ?
30 bandwidth)) 30 INT_REGION : EXT_REGION,
31 return -ENOMEM; 31 bandwidth))
32 return -ENOMEM;
32 33
33 spin_lock_irqsave(&dma_lock, flags); 34 spin_lock_irqsave(&dma_lock, flags);
34 35
35 if (used_dma_channels[dmanr]) { 36 if (used_dma_channels[dmanr]) {
36 spin_unlock_irqrestore(&dma_lock, flags); 37 spin_unlock_irqrestore(&dma_lock, flags);
37 if (options & DMA_VERBOSE_ON_ERROR) { 38 if (options & DMA_VERBOSE_ON_ERROR) {
38 printk("Failed to request DMA %i for %s, already allocated by %s\n", dmanr, device_id, used_dma_channels_users[dmanr]); 39 printk(KERN_ERR "Failed to request DMA %i for %s, "
40 "already allocated by %s\n",
41 dmanr,
42 device_id,
43 used_dma_channels_users[dmanr]);
39 } 44 }
40 if (options & DMA_PANIC_ON_ERROR) 45 if (options & DMA_PANIC_ON_ERROR)
41 panic("request_dma error!"); 46 panic("request_dma error!");
47 spin_unlock_irqrestore(&dma_lock, flags);
42 return -EBUSY; 48 return -EBUSY;
43 } 49 }
44 clk_ctrl = REG_RD(config, regi_config, rw_clk_ctrl); 50 clk_ctrl = REG_RD(config, regi_config, rw_clk_ctrl);
45 strmux_cfg = REG_RD(strmux, regi_strmux, rw_cfg); 51 strmux_cfg = REG_RD(strmux, regi_strmux, rw_cfg);
46 52
47 switch(dmanr) 53 switch (dmanr) {
48 {
49 case 0: 54 case 0:
50 case 1: 55 case 1:
51 clk_ctrl.dma01_eth0 = 1; 56 clk_ctrl.dma01_eth0 = 1;
@@ -72,7 +77,9 @@ int crisv32_request_dma(unsigned int dmanr, const char * device_id,
72 default: 77 default:
73 spin_unlock_irqrestore(&dma_lock, flags); 78 spin_unlock_irqrestore(&dma_lock, flags);
74 if (options & DMA_VERBOSE_ON_ERROR) { 79 if (options & DMA_VERBOSE_ON_ERROR) {
75 printk("Failed to request DMA %i for %s, only 0-%i valid)\n", dmanr, device_id, MAX_DMA_CHANNELS-1); 80 printk(KERN_ERR "Failed to request DMA %i for %s, "
81 "only 0-%i valid)\n",
82 dmanr, device_id, MAX_DMA_CHANNELS - 1);
76 } 83 }
77 84
78 if (options & DMA_PANIC_ON_ERROR) 85 if (options & DMA_PANIC_ON_ERROR)
@@ -80,8 +87,7 @@ int crisv32_request_dma(unsigned int dmanr, const char * device_id,
80 return -EINVAL; 87 return -EINVAL;
81 } 88 }
82 89
83 switch(owner) 90 switch (owner) {
84 {
85 case dma_eth0: 91 case dma_eth0:
86 if (dmanr == 0) 92 if (dmanr == 0)
87 strmux_cfg.dma0 = regk_strmux_eth0; 93 strmux_cfg.dma0 = regk_strmux_eth0;
@@ -212,7 +218,7 @@ int crisv32_request_dma(unsigned int dmanr, const char * device_id,
212 used_dma_channels_users[dmanr] = device_id; 218 used_dma_channels_users[dmanr] = device_id;
213 REG_WR(config, regi_config, rw_clk_ctrl, clk_ctrl); 219 REG_WR(config, regi_config, rw_clk_ctrl, clk_ctrl);
214 REG_WR(strmux, regi_strmux, rw_cfg, strmux_cfg); 220 REG_WR(strmux, regi_strmux, rw_cfg, strmux_cfg);
215 spin_unlock_irqrestore(&dma_lock,flags); 221 spin_unlock_irqrestore(&dma_lock, flags);
216 return 0; 222 return 0;
217} 223}
218 224
diff --git a/arch/cris/arch-v32/lib/dram_init.S b/arch/cris/arch-v32/mach-fs/dram_init.S
index 218fbe259ee5..6fbad336527b 100644
--- a/arch/cris/arch-v32/lib/dram_init.S
+++ b/arch/cris/arch-v32/mach-fs/dram_init.S
@@ -1,23 +1,22 @@
1/* $Id: dram_init.S,v 1.4 2005/04/24 18:48:32 starvik Exp $ 1/*
2 *
3 * DRAM/SDRAM initialization - alter with care 2 * DRAM/SDRAM initialization - alter with care
4 * This file is intended to be included from other assembler files 3 * This file is intended to be included from other assembler files
5 * 4 *
6 * Note: This file may not modify r8 or r9 because they are used to 5 * Note: This file may not modify r8 or r9 because they are used to
7 * carry information from the decompresser to the kernel 6 * carry information from the decompresser to the kernel
8 * 7 *
9 * Copyright (C) 2000-2003 Axis Communications AB 8 * Copyright (C) 2000-2007 Axis Communications AB
10 * 9 *
11 * Authors: Mikael Starvik (starvik@axis.com) 10 * Authors: Mikael Starvik <starvik@axis.com>
12 */ 11 */
13 12
14/* Just to be certain the config file is included, we include it here 13/* Just to be certain the config file is included, we include it here
15 * explicitly instead of depending on it being included in the file that 14 * explicitely instead of depending on it being included in the file that
16 * uses this code. 15 * uses this code.
17 */ 16 */
18 17
19#include <asm/arch/hwregs/asm/reg_map_asm.h> 18#include <hwregs/asm/reg_map_asm.h>
20#include <asm/arch/hwregs/asm/bif_core_defs_asm.h> 19#include <hwregs/asm/bif_core_defs_asm.h>
21 20
22 ;; WARNING! The registers r8 and r9 are used as parameters carrying 21 ;; WARNING! The registers r8 and r9 are used as parameters carrying
23 ;; information from the decompressor (if the kernel was compressed). 22 ;; information from the decompressor (if the kernel was compressed).
@@ -46,7 +45,7 @@
46 45
47 move.d 0x40, $r4 ; Assume 32 bits and CAS latency = 2 46 move.d 0x40, $r4 ; Assume 32 bits and CAS latency = 2
48 move.d CONFIG_ETRAX_SDRAM_TIMING, $r1 47 move.d CONFIG_ETRAX_SDRAM_TIMING, $r1
49 and.d 0x07, $r1 ; Get CAS latency 48 and.d 0x07, $r1 ; Get CAS latency
50 cmpq 2, $r1 ; CL = 2 ? 49 cmpq 2, $r1 ; CL = 2 ?
51 beq _bw_check 50 beq _bw_check
52 nop 51 nop
@@ -80,12 +79,10 @@ _set_timing:
80 subq 1, $r2 79 subq 1, $r2
81 80
82 ; Issue initialization command sequence 81 ; Issue initialization command sequence
83 move.d _sdram_commands_start, $r2 82 lapc _sdram_commands_start, $r2
84 and.d 0x000fffff, $r2 ; Make sure commands are read from flash 83 lapc _sdram_commands_end, $r3
85 move.d _sdram_commands_end, $r3
86 and.d 0x000fffff, $r3
871: clear.d $r6 841: clear.d $r6
88 move.b [$r2+], $r6 ; Load command 85 move.b [$r2+], $r6 ; Load command
89 or.d $r4, $r6 ; Add calculated mrs 86 or.d $r4, $r6 ; Add calculated mrs
90 move.d $r6, [$r5] ; Write rw_sdram_cmd 87 move.d $r6, [$r5] ; Write rw_sdram_cmd
91 ; Wait 80 ns between each command 88 ; Wait 80 ns between each command
diff --git a/arch/cris/arch-v32/lib/hw_settings.S b/arch/cris/arch-v32/mach-fs/hw_settings.S
index fff9443513d1..8bde93c36214 100644
--- a/arch/cris/arch-v32/lib/hw_settings.S
+++ b/arch/cris/arch-v32/mach-fs/hw_settings.S
@@ -1,18 +1,16 @@
1/* 1/*
2 * $Id: hw_settings.S,v 1.3 2005/04/24 18:36:57 starvik Exp $
3 *
4 * This table is used by some tools to extract hardware parameters. 2 * This table is used by some tools to extract hardware parameters.
5 * The table should be included in the kernel and the decompressor. 3 * The table should be included in the kernel and the decompressor.
6 * Don't forget to update the tools if you change this table. 4 * Don't forget to update the tools if you change this table.
7 * 5 *
8 * Copyright (C) 2001 Axis Communications AB 6 * Copyright (C) 2001-2007 Axis Communications AB
9 * 7 *
10 * Authors: Mikael Starvik (starvik@axis.com) 8 * Authors: Mikael Starvik <starvik@axis.com>
11 */ 9 */
12 10
13#include <asm/arch/hwregs/asm/reg_map_asm.h> 11#include <hwregs/asm/reg_map_asm.h>
14#include <asm/arch/hwregs/asm/bif_core_defs_asm.h> 12#include <hwregs/asm/bif_core_defs_asm.h>
15#include <asm/arch/hwregs/asm/gio_defs_asm.h> 13#include <hwregs/asm/gio_defs_asm.h>
16 14
17 .ascii "HW_PARAM_MAGIC" ; Magic number 15 .ascii "HW_PARAM_MAGIC" ; Magic number
18 .dword 0xc0004000 ; Kernel start address 16 .dword 0xc0004000 ; Kernel start address
diff --git a/arch/cris/arch-v32/mach-fs/io.c b/arch/cris/arch-v32/mach-fs/io.c
new file mode 100644
index 000000000000..a03a3ad3a188
--- /dev/null
+++ b/arch/cris/arch-v32/mach-fs/io.c
@@ -0,0 +1,191 @@
1/*
2 * Helper functions for I/O pins.
3 *
4 * Copyright (c) 2004-2007 Axis Communications AB.
5 */
6
7#include <linux/types.h>
8#include <linux/errno.h>
9#include <linux/init.h>
10#include <linux/string.h>
11#include <linux/ctype.h>
12#include <linux/kernel.h>
13#include <linux/module.h>
14#include <asm/io.h>
15#include <asm/arch/pinmux.h>
16#include <asm/arch/hwregs/gio_defs.h>
17
18#ifndef DEBUG
19#define DEBUG(x)
20#endif
21
22struct crisv32_ioport crisv32_ioports[] = {
23 {
24 (unsigned long *)REG_ADDR(gio, regi_gio, rw_pa_oe),
25 (unsigned long *)REG_ADDR(gio, regi_gio, rw_pa_dout),
26 (unsigned long *)REG_ADDR(gio, regi_gio, r_pa_din),
27 8
28 },
29 {
30 (unsigned long *)REG_ADDR(gio, regi_gio, rw_pb_oe),
31 (unsigned long *)REG_ADDR(gio, regi_gio, rw_pb_dout),
32 (unsigned long *)REG_ADDR(gio, regi_gio, r_pb_din),
33 18
34 },
35 {
36 (unsigned long *)REG_ADDR(gio, regi_gio, rw_pc_oe),
37 (unsigned long *)REG_ADDR(gio, regi_gio, rw_pc_dout),
38 (unsigned long *)REG_ADDR(gio, regi_gio, r_pc_din),
39 18
40 },
41 {
42 (unsigned long *)REG_ADDR(gio, regi_gio, rw_pd_oe),
43 (unsigned long *)REG_ADDR(gio, regi_gio, rw_pd_dout),
44 (unsigned long *)REG_ADDR(gio, regi_gio, r_pd_din),
45 18
46 },
47 {
48 (unsigned long *)REG_ADDR(gio, regi_gio, rw_pe_oe),
49 (unsigned long *)REG_ADDR(gio, regi_gio, rw_pe_dout),
50 (unsigned long *)REG_ADDR(gio, regi_gio, r_pe_din),
51 18
52 }
53};
54
55#define NBR_OF_PORTS sizeof(crisv32_ioports)/sizeof(struct crisv32_ioport)
56
57struct crisv32_iopin crisv32_led_net0_green;
58struct crisv32_iopin crisv32_led_net0_red;
59struct crisv32_iopin crisv32_led_net1_green;
60struct crisv32_iopin crisv32_led_net1_red;
61struct crisv32_iopin crisv32_led2_green;
62struct crisv32_iopin crisv32_led2_red;
63struct crisv32_iopin crisv32_led3_green;
64struct crisv32_iopin crisv32_led3_red;
65
66/* Dummy port used when green LED and red LED is on the same bit */
67static unsigned long io_dummy;
68static struct crisv32_ioport dummy_port = {
69 &io_dummy,
70 &io_dummy,
71 &io_dummy,
72 18
73};
74static struct crisv32_iopin dummy_led = {
75 &dummy_port,
76 0
77};
78
79static int __init crisv32_io_init(void)
80{
81 int ret = 0;
82
83 u32 i;
84
85 /* Locks *should* be dynamically initialized. */
86 for (i = 0; i < ARRAY_SIZE(crisv32_ioports); i++)
87 spin_lock_init(&crisv32_ioports[i].lock);
88 spin_lock_init(&dummy_port.lock);
89
90 /* Initialize LEDs */
91#if (defined(CONFIG_ETRAX_NBR_LED_GRP_ONE) || defined(CONFIG_ETRAX_NBR_LED_GRP_TWO))
92 ret +=
93 crisv32_io_get_name(&crisv32_led_net0_green,
94 CONFIG_ETRAX_LED_G_NET0);
95 crisv32_io_set_dir(&crisv32_led_net0_green, crisv32_io_dir_out);
96 if (strcmp(CONFIG_ETRAX_LED_G_NET0, CONFIG_ETRAX_LED_R_NET0)) {
97 ret +=
98 crisv32_io_get_name(&crisv32_led_net0_red,
99 CONFIG_ETRAX_LED_R_NET0);
100 crisv32_io_set_dir(&crisv32_led_net0_red, crisv32_io_dir_out);
101 } else
102 crisv32_led_net0_red = dummy_led;
103#endif
104
105#ifdef CONFIG_ETRAX_NBR_LED_GRP_TWO
106 ret +=
107 crisv32_io_get_name(&crisv32_led_net1_green,
108 CONFIG_ETRAX_LED_G_NET1);
109 crisv32_io_set_dir(&crisv32_led_net1_green, crisv32_io_dir_out);
110 if (strcmp(CONFIG_ETRAX_LED_G_NET1, CONFIG_ETRAX_LED_R_NET1)) {
111 crisv32_io_get_name(&crisv32_led_net1_red,
112 CONFIG_ETRAX_LED_R_NET1);
113 crisv32_io_set_dir(&crisv32_led_net1_red, crisv32_io_dir_out);
114 } else
115 crisv32_led_net1_red = dummy_led;
116#endif
117
118 ret += crisv32_io_get_name(&crisv32_led2_green, CONFIG_ETRAX_V32_LED2G);
119 ret += crisv32_io_get_name(&crisv32_led2_red, CONFIG_ETRAX_V32_LED2R);
120 ret += crisv32_io_get_name(&crisv32_led3_green, CONFIG_ETRAX_V32_LED3G);
121 ret += crisv32_io_get_name(&crisv32_led3_red, CONFIG_ETRAX_V32_LED3R);
122
123 crisv32_io_set_dir(&crisv32_led2_green, crisv32_io_dir_out);
124 crisv32_io_set_dir(&crisv32_led2_red, crisv32_io_dir_out);
125 crisv32_io_set_dir(&crisv32_led3_green, crisv32_io_dir_out);
126 crisv32_io_set_dir(&crisv32_led3_red, crisv32_io_dir_out);
127
128 return ret;
129}
130
131__initcall(crisv32_io_init);
132
133int crisv32_io_get(struct crisv32_iopin *iopin,
134 unsigned int port, unsigned int pin)
135{
136 if (port > NBR_OF_PORTS)
137 return -EINVAL;
138 if (port > crisv32_ioports[port].pin_count)
139 return -EINVAL;
140
141 iopin->bit = 1 << pin;
142 iopin->port = &crisv32_ioports[port];
143
144 /* Only allocate pinmux gpiopins if port != PORT_A (port 0) */
145 /* NOTE! crisv32_pinmux_alloc thinks PORT_B is port 0 */
146 if (port != 0 && crisv32_pinmux_alloc(port - 1, pin, pin, pinmux_gpio))
147 return -EIO;
148 DEBUG(printk(KERN_DEBUG "crisv32_io_get: Allocated pin %d on port %d\n",
149 pin, port));
150
151 return 0;
152}
153
154int crisv32_io_get_name(struct crisv32_iopin *iopin, const char *name)
155{
156 int port;
157 int pin;
158
159 if (toupper(*name) == 'P')
160 name++;
161
162 if (toupper(*name) < 'A' || toupper(*name) > 'E')
163 return -EINVAL;
164
165 port = toupper(*name) - 'A';
166 name++;
167 pin = simple_strtoul(name, NULL, 10);
168
169 if (pin < 0 || pin > crisv32_ioports[port].pin_count)
170 return -EINVAL;
171
172 iopin->bit = 1 << pin;
173 iopin->port = &crisv32_ioports[port];
174
175 /* Only allocate pinmux gpiopins if port != PORT_A (port 0) */
176 /* NOTE! crisv32_pinmux_alloc thinks PORT_B is port 0 */
177 if (port != 0 && crisv32_pinmux_alloc(port - 1, pin, pin, pinmux_gpio))
178 return -EIO;
179
180 DEBUG(printk(KERN_DEBUG
181 "crisv32_io_get_name: Allocated pin %d on port %d\n",
182 pin, port));
183
184 return 0;
185}
186
187#ifdef CONFIG_PCI
188/* PCI I/O access stuff */
189struct cris_io_operations *cris_iops = NULL;
190EXPORT_SYMBOL(cris_iops);
191#endif
diff --git a/arch/cris/arch-v32/mach-fs/pinmux.c b/arch/cris/arch-v32/mach-fs/pinmux.c
new file mode 100644
index 000000000000..d722ad9ae626
--- /dev/null
+++ b/arch/cris/arch-v32/mach-fs/pinmux.c
@@ -0,0 +1,309 @@
1/*
2 * Allocator for I/O pins. All pins are allocated to GPIO at bootup.
3 * Unassigned pins and GPIO pins can be allocated to a fixed interface
4 * or the I/O processor instead.
5 *
6 * Copyright (c) 2004-2007 Axis Communications AB.
7 */
8
9#include <linux/init.h>
10#include <linux/errno.h>
11#include <linux/kernel.h>
12#include <linux/string.h>
13#include <linux/spinlock.h>
14#include <hwregs/reg_map.h>
15#include <hwregs/reg_rdwr.h>
16#include <pinmux.h>
17#include <hwregs/pinmux_defs.h>
18
19#undef DEBUG
20
21#define PORT_PINS 18
22#define PORTS 4
23
24static char pins[PORTS][PORT_PINS];
25static DEFINE_SPINLOCK(pinmux_lock);
26
27static void crisv32_pinmux_set(int port);
28
29int crisv32_pinmux_init(void)
30{
31 static int initialized;
32
33 if (!initialized) {
34 reg_pinmux_rw_pa pa = REG_RD(pinmux, regi_pinmux, rw_pa);
35 initialized = 1;
36 REG_WR_INT(pinmux, regi_pinmux, rw_hwprot, 0);
37 pa.pa0 = pa.pa1 = pa.pa2 = pa.pa3 =
38 pa.pa4 = pa.pa5 = pa.pa6 = pa.pa7 = regk_pinmux_yes;
39 REG_WR(pinmux, regi_pinmux, rw_pa, pa);
40 crisv32_pinmux_alloc(PORT_B, 0, PORT_PINS - 1, pinmux_gpio);
41 crisv32_pinmux_alloc(PORT_C, 0, PORT_PINS - 1, pinmux_gpio);
42 crisv32_pinmux_alloc(PORT_D, 0, PORT_PINS - 1, pinmux_gpio);
43 crisv32_pinmux_alloc(PORT_E, 0, PORT_PINS - 1, pinmux_gpio);
44 }
45
46 return 0;
47}
48
49int
50crisv32_pinmux_alloc(int port, int first_pin, int last_pin, enum pin_mode mode)
51{
52 int i;
53 unsigned long flags;
54
55 crisv32_pinmux_init();
56
57 if (port > PORTS)
58 return -EINVAL;
59
60 spin_lock_irqsave(&pinmux_lock, flags);
61
62 for (i = first_pin; i <= last_pin; i++) {
63 if ((pins[port][i] != pinmux_none)
64 && (pins[port][i] != pinmux_gpio)
65 && (pins[port][i] != mode)) {
66 spin_unlock_irqrestore(&pinmux_lock, flags);
67#ifdef DEBUG
68 panic("Pinmux alloc failed!\n");
69#endif
70 return -EPERM;
71 }
72 }
73
74 for (i = first_pin; i <= last_pin; i++)
75 pins[port][i] = mode;
76
77 crisv32_pinmux_set(port);
78
79 spin_unlock_irqrestore(&pinmux_lock, flags);
80
81 return 0;
82}
83
84int crisv32_pinmux_alloc_fixed(enum fixed_function function)
85{
86 int ret = -EINVAL;
87 char saved[sizeof pins];
88 unsigned long flags;
89
90 spin_lock_irqsave(&pinmux_lock, flags);
91
92 /* Save internal data for recovery */
93 memcpy(saved, pins, sizeof pins);
94
95 crisv32_pinmux_init(); /* Must be done before we read rw_hwprot */
96
97 reg_pinmux_rw_hwprot hwprot = REG_RD(pinmux, regi_pinmux, rw_hwprot);
98
99 switch (function) {
100 case pinmux_ser1:
101 ret = crisv32_pinmux_alloc(PORT_C, 4, 7, pinmux_fixed);
102 hwprot.ser1 = regk_pinmux_yes;
103 break;
104 case pinmux_ser2:
105 ret = crisv32_pinmux_alloc(PORT_C, 8, 11, pinmux_fixed);
106 hwprot.ser2 = regk_pinmux_yes;
107 break;
108 case pinmux_ser3:
109 ret = crisv32_pinmux_alloc(PORT_C, 12, 15, pinmux_fixed);
110 hwprot.ser3 = regk_pinmux_yes;
111 break;
112 case pinmux_sser0:
113 ret = crisv32_pinmux_alloc(PORT_C, 0, 3, pinmux_fixed);
114 ret |= crisv32_pinmux_alloc(PORT_C, 16, 16, pinmux_fixed);
115 hwprot.sser0 = regk_pinmux_yes;
116 break;
117 case pinmux_sser1:
118 ret = crisv32_pinmux_alloc(PORT_D, 0, 4, pinmux_fixed);
119 hwprot.sser1 = regk_pinmux_yes;
120 break;
121 case pinmux_ata0:
122 ret = crisv32_pinmux_alloc(PORT_D, 5, 7, pinmux_fixed);
123 ret |= crisv32_pinmux_alloc(PORT_D, 15, 17, pinmux_fixed);
124 hwprot.ata0 = regk_pinmux_yes;
125 break;
126 case pinmux_ata1:
127 ret = crisv32_pinmux_alloc(PORT_D, 0, 4, pinmux_fixed);
128 ret |= crisv32_pinmux_alloc(PORT_E, 17, 17, pinmux_fixed);
129 hwprot.ata1 = regk_pinmux_yes;
130 break;
131 case pinmux_ata2:
132 ret = crisv32_pinmux_alloc(PORT_C, 11, 15, pinmux_fixed);
133 ret |= crisv32_pinmux_alloc(PORT_E, 3, 3, pinmux_fixed);
134 hwprot.ata2 = regk_pinmux_yes;
135 break;
136 case pinmux_ata3:
137 ret = crisv32_pinmux_alloc(PORT_C, 8, 10, pinmux_fixed);
138 ret |= crisv32_pinmux_alloc(PORT_C, 0, 2, pinmux_fixed);
139 hwprot.ata2 = regk_pinmux_yes;
140 break;
141 case pinmux_ata:
142 ret = crisv32_pinmux_alloc(PORT_B, 0, 15, pinmux_fixed);
143 ret |= crisv32_pinmux_alloc(PORT_D, 8, 15, pinmux_fixed);
144 hwprot.ata = regk_pinmux_yes;
145 break;
146 case pinmux_eth1:
147 ret = crisv32_pinmux_alloc(PORT_E, 0, 17, pinmux_fixed);
148 hwprot.eth1 = regk_pinmux_yes;
149 hwprot.eth1_mgm = regk_pinmux_yes;
150 break;
151 case pinmux_timer:
152 ret = crisv32_pinmux_alloc(PORT_C, 16, 16, pinmux_fixed);
153 hwprot.timer = regk_pinmux_yes;
154 spin_unlock_irqrestore(&pinmux_lock, flags);
155 return ret;
156 }
157
158 if (!ret)
159 REG_WR(pinmux, regi_pinmux, rw_hwprot, hwprot);
160 else
161 memcpy(pins, saved, sizeof pins);
162
163 spin_unlock_irqrestore(&pinmux_lock, flags);
164
165 return ret;
166}
167
168void crisv32_pinmux_set(int port)
169{
170 int i;
171 int gpio_val = 0;
172 int iop_val = 0;
173
174 for (i = 0; i < PORT_PINS; i++) {
175 if (pins[port][i] == pinmux_gpio)
176 gpio_val |= (1 << i);
177 else if (pins[port][i] == pinmux_iop)
178 iop_val |= (1 << i);
179 }
180
181 REG_WRITE(int, regi_pinmux + REG_RD_ADDR_pinmux_rw_pb_gio + 8 * port,
182 gpio_val);
183 REG_WRITE(int, regi_pinmux + REG_RD_ADDR_pinmux_rw_pb_iop + 8 * port,
184 iop_val);
185
186#ifdef DEBUG
187 crisv32_pinmux_dump();
188#endif
189}
190
191int crisv32_pinmux_dealloc(int port, int first_pin, int last_pin)
192{
193 int i;
194 unsigned long flags;
195
196 crisv32_pinmux_init();
197
198 if (port > PORTS)
199 return -EINVAL;
200
201 spin_lock_irqsave(&pinmux_lock, flags);
202
203 for (i = first_pin; i <= last_pin; i++)
204 pins[port][i] = pinmux_none;
205
206 crisv32_pinmux_set(port);
207 spin_unlock_irqrestore(&pinmux_lock, flags);
208
209 return 0;
210}
211
212int crisv32_pinmux_dealloc_fixed(enum fixed_function function)
213{
214 int ret = -EINVAL;
215 char saved[sizeof pins];
216 unsigned long flags;
217
218 spin_lock_irqsave(&pinmux_lock, flags);
219
220 /* Save internal data for recovery */
221 memcpy(saved, pins, sizeof pins);
222
223 crisv32_pinmux_init(); /* Must be done before we read rw_hwprot */
224
225 reg_pinmux_rw_hwprot hwprot = REG_RD(pinmux, regi_pinmux, rw_hwprot);
226
227 switch (function) {
228 case pinmux_ser1:
229 ret = crisv32_pinmux_dealloc(PORT_C, 4, 7);
230 hwprot.ser1 = regk_pinmux_no;
231 break;
232 case pinmux_ser2:
233 ret = crisv32_pinmux_dealloc(PORT_C, 8, 11);
234 hwprot.ser2 = regk_pinmux_no;
235 break;
236 case pinmux_ser3:
237 ret = crisv32_pinmux_dealloc(PORT_C, 12, 15);
238 hwprot.ser3 = regk_pinmux_no;
239 break;
240 case pinmux_sser0:
241 ret = crisv32_pinmux_dealloc(PORT_C, 0, 3);
242 ret |= crisv32_pinmux_dealloc(PORT_C, 16, 16);
243 hwprot.sser0 = regk_pinmux_no;
244 break;
245 case pinmux_sser1:
246 ret = crisv32_pinmux_dealloc(PORT_D, 0, 4);
247 hwprot.sser1 = regk_pinmux_no;
248 break;
249 case pinmux_ata0:
250 ret = crisv32_pinmux_dealloc(PORT_D, 5, 7);
251 ret |= crisv32_pinmux_dealloc(PORT_D, 15, 17);
252 hwprot.ata0 = regk_pinmux_no;
253 break;
254 case pinmux_ata1:
255 ret = crisv32_pinmux_dealloc(PORT_D, 0, 4);
256 ret |= crisv32_pinmux_dealloc(PORT_E, 17, 17);
257 hwprot.ata1 = regk_pinmux_no;
258 break;
259 case pinmux_ata2:
260 ret = crisv32_pinmux_dealloc(PORT_C, 11, 15);
261 ret |= crisv32_pinmux_dealloc(PORT_E, 3, 3);
262 hwprot.ata2 = regk_pinmux_no;
263 break;
264 case pinmux_ata3:
265 ret = crisv32_pinmux_dealloc(PORT_C, 8, 10);
266 ret |= crisv32_pinmux_dealloc(PORT_C, 0, 2);
267 hwprot.ata2 = regk_pinmux_no;
268 break;
269 case pinmux_ata:
270 ret = crisv32_pinmux_dealloc(PORT_B, 0, 15);
271 ret |= crisv32_pinmux_dealloc(PORT_D, 8, 15);
272 hwprot.ata = regk_pinmux_no;
273 break;
274 case pinmux_eth1:
275 ret = crisv32_pinmux_dealloc(PORT_E, 0, 17);
276 hwprot.eth1 = regk_pinmux_no;
277 hwprot.eth1_mgm = regk_pinmux_no;
278 break;
279 case pinmux_timer:
280 ret = crisv32_pinmux_dealloc(PORT_C, 16, 16);
281 hwprot.timer = regk_pinmux_no;
282 spin_unlock_irqrestore(&pinmux_lock, flags);
283 return ret;
284 }
285
286 if (!ret)
287 REG_WR(pinmux, regi_pinmux, rw_hwprot, hwprot);
288 else
289 memcpy(pins, saved, sizeof pins);
290
291 spin_unlock_irqrestore(&pinmux_lock, flags);
292
293 return ret;
294}
295
296void crisv32_pinmux_dump(void)
297{
298 int i, j;
299
300 crisv32_pinmux_init();
301
302 for (i = 0; i < PORTS; i++) {
303 printk(KERN_DEBUG "Port %c\n", 'B' + i);
304 for (j = 0; j < PORT_PINS; j++)
305 printk(KERN_DEBUG " Pin %d = %d\n", j, pins[i][j]);
306 }
307}
308
309__initcall(crisv32_pinmux_init);
diff --git a/arch/cris/arch-v32/mach-fs/vcs_hook.c b/arch/cris/arch-v32/mach-fs/vcs_hook.c
new file mode 100644
index 000000000000..593b10f07ef1
--- /dev/null
+++ b/arch/cris/arch-v32/mach-fs/vcs_hook.c
@@ -0,0 +1,100 @@
1/*
2 * Call simulator hook. This is the part running in the
3 * simulated program.
4 */
5
6#include "vcs_hook.h"
7#include <stdarg.h>
8#include <asm/arch-v32/hwregs/reg_map.h>
9#include <asm/arch-v32/hwregs/intr_vect_defs.h>
10
11#define HOOK_TRIG_ADDR 0xb7000000 /* hook cvlog model reg address */
12#define HOOK_MEM_BASE_ADDR 0xa0000000 /* csp4 (shared mem) base addr */
13
14#define HOOK_DATA(offset) ((unsigned *)HOOK_MEM_BASE_ADDR)[offset]
15#define VHOOK_DATA(offset) ((volatile unsigned *)HOOK_MEM_BASE_ADDR)[offset]
16#define HOOK_TRIG(funcid) \
17 do { \
18 *((unsigned *) HOOK_TRIG_ADDR) = funcid; \
19 } while (0)
20#define HOOK_DATA_BYTE(offset) ((unsigned char *)HOOK_MEM_BASE_ADDR)[offset]
21
22int hook_call(unsigned id, unsigned pcnt, ...)
23{
24 va_list ap;
25 unsigned i;
26 unsigned ret;
27#ifdef USING_SOS
28 PREEMPT_OFF_SAVE();
29#endif
30
31 /* pass parameters */
32 HOOK_DATA(0) = id;
33
34 /* Have to make hook_print_str a special case since we call with a
35 * parameter of byte type. Should perhaps be a separate
36 * hook_call. */
37
38 if (id == hook_print_str) {
39 int i;
40 char *str;
41
42 HOOK_DATA(1) = pcnt;
43
44 va_start(ap, pcnt);
45 str = (char *)va_arg(ap, unsigned);
46
47 for (i = 0; i != pcnt; i++)
48 HOOK_DATA_BYTE(8 + i) = str[i];
49
50 HOOK_DATA_BYTE(8 + i) = 0; /* null byte */
51 } else {
52 va_start(ap, pcnt);
53 for (i = 1; i <= pcnt; i++)
54 HOOK_DATA(i) = va_arg(ap, unsigned);
55 va_end(ap);
56 }
57
58 /* read from mem to make sure data has propagated to memory before
59 * trigging */
60 ret = *((volatile unsigned *)HOOK_MEM_BASE_ADDR);
61
62 /* trigger hook */
63 HOOK_TRIG(id);
64
65 /* wait for call to finish */
66 while (VHOOK_DATA(0) > 0) ;
67
68 /* extract return value */
69
70 ret = VHOOK_DATA(1);
71
72#ifdef USING_SOS
73 PREEMPT_RESTORE();
74#endif
75 return ret;
76}
77
78unsigned hook_buf(unsigned i)
79{
80 return (HOOK_DATA(i));
81}
82
83void print_str(const char *str)
84{
85 int i;
86 /* find null at end of string */
87 for (i = 1; str[i]; i++) ;
88 hook_call(hook_print_str, i, str);
89}
90
91void CPU_KICK_DOG(void)
92{
93 (void)hook_call(hook_kick_dog, 0);
94}
95
96void CPU_WATCHDOG_TIMEOUT(unsigned t)
97{
98 (void)hook_call(hook_dog_timeout, 1, t);
99}
100
diff --git a/arch/cris/arch-v32/kernel/vcs_hook.h b/arch/cris/arch-v32/mach-fs/vcs_hook.h
index 7d73709e3cc6..c000b9fece41 100644
--- a/arch/cris/arch-v32/kernel/vcs_hook.h
+++ b/arch/cris/arch-v32/mach-fs/vcs_hook.h
@@ -1,11 +1,11 @@
1// $Id: vcs_hook.h,v 1.1 2003/08/12 12:01:06 starvik Exp $ 1/*
2// 2 * Call simulator hook functions
3// Call simulator hook functions 3 */
4 4
5#ifndef HOOK_H 5#ifndef HOOK_H
6#define HOOK_H 6#define HOOK_H
7 7
8int hook_call( unsigned id, unsigned pcnt, ...); 8int hook_call(unsigned id, unsigned pcnt, ...);
9 9
10enum hook_ids { 10enum hook_ids {
11 hook_debug_on = 1, 11 hook_debug_on = 1,
diff --git a/arch/cris/arch-v32/mm/Makefile b/arch/cris/arch-v32/mm/Makefile
index 9146f88484b1..0b801f2964ac 100644
--- a/arch/cris/arch-v32/mm/Makefile
+++ b/arch/cris/arch-v32/mm/Makefile
@@ -1,3 +1,4 @@
1# Makefile for the Linux/cris parts of the memory manager. 1# Makefile for the Linux/cris parts of the memory manager.
2 2
3obj-y := mmu.o init.o tlb.o intmem.o 3obj-y += mmu.o init.o tlb.o intmem.o
4obj-$(CONFIG_ETRAX_L2CACHE) += l2cache.o
diff --git a/arch/cris/arch-v32/mm/init.c b/arch/cris/arch-v32/mm/init.c
index a84ba7ff22d2..5a9ac5834647 100644
--- a/arch/cris/arch-v32/mm/init.c
+++ b/arch/cris/arch-v32/mm/init.c
@@ -65,7 +65,7 @@ cris_mmu_init(void)
65 REG_STATE(mmu, rw_mm_cfg, seg_d, page) | 65 REG_STATE(mmu, rw_mm_cfg, seg_d, page) |
66 REG_STATE(mmu, rw_mm_cfg, seg_c, linear) | 66 REG_STATE(mmu, rw_mm_cfg, seg_c, linear) |
67 REG_STATE(mmu, rw_mm_cfg, seg_b, linear) | 67 REG_STATE(mmu, rw_mm_cfg, seg_b, linear) |
68#ifndef CONFIG_ETRAXFS_SIM 68#ifndef CONFIG_ETRAX_VCS_SIM
69 REG_STATE(mmu, rw_mm_cfg, seg_a, page) | 69 REG_STATE(mmu, rw_mm_cfg, seg_a, page) |
70#else 70#else
71 REG_STATE(mmu, rw_mm_cfg, seg_a, linear) | 71 REG_STATE(mmu, rw_mm_cfg, seg_a, linear) |
@@ -84,13 +84,9 @@ cris_mmu_init(void)
84 mmu_kbase_hi = ( REG_FIELD(mmu, rw_mm_kbase_hi, base_f, 0x0) | 84 mmu_kbase_hi = ( REG_FIELD(mmu, rw_mm_kbase_hi, base_f, 0x0) |
85 REG_FIELD(mmu, rw_mm_kbase_hi, base_e, 0x8) | 85 REG_FIELD(mmu, rw_mm_kbase_hi, base_e, 0x8) |
86 REG_FIELD(mmu, rw_mm_kbase_hi, base_d, 0x0) | 86 REG_FIELD(mmu, rw_mm_kbase_hi, base_d, 0x0) |
87#ifndef CONFIG_ETRAXFS_SIM
88 REG_FIELD(mmu, rw_mm_kbase_hi, base_c, 0x4) | 87 REG_FIELD(mmu, rw_mm_kbase_hi, base_c, 0x4) |
89#else
90 REG_FIELD(mmu, rw_mm_kbase_hi, base_c, 0x0) |
91#endif
92 REG_FIELD(mmu, rw_mm_kbase_hi, base_b, 0xb) | 88 REG_FIELD(mmu, rw_mm_kbase_hi, base_b, 0xb) |
93#ifndef CONFIG_ETRAXFS_SIM 89#ifndef CONFIG_ETRAX_VCS_SIM
94 REG_FIELD(mmu, rw_mm_kbase_hi, base_a, 0x0) | 90 REG_FIELD(mmu, rw_mm_kbase_hi, base_a, 0x0) |
95#else 91#else
96 REG_FIELD(mmu, rw_mm_kbase_hi, base_a, 0xa) | 92 REG_FIELD(mmu, rw_mm_kbase_hi, base_a, 0xa) |
diff --git a/arch/cris/arch-v32/mm/intmem.c b/arch/cris/arch-v32/mm/intmem.c
index 41ee7f7997fd..9e8b69cdf19e 100644
--- a/arch/cris/arch-v32/mm/intmem.c
+++ b/arch/cris/arch-v32/mm/intmem.c
@@ -7,11 +7,17 @@
7#include <linux/list.h> 7#include <linux/list.h>
8#include <linux/slab.h> 8#include <linux/slab.h>
9#include <asm/io.h> 9#include <asm/io.h>
10#include <asm/arch/memmap.h> 10#include <memmap.h>
11 11
12#define STATUS_FREE 0 12#define STATUS_FREE 0
13#define STATUS_ALLOCATED 1 13#define STATUS_ALLOCATED 1
14 14
15#ifdef CONFIG_ETRAX_L2CACHE
16#define RESERVED_SIZE 66*1024
17#else
18#define RESERVED_SIZE 0
19#endif
20
15struct intmem_allocation { 21struct intmem_allocation {
16 struct list_head entry; 22 struct list_head entry;
17 unsigned int size; 23 unsigned int size;
@@ -30,9 +36,10 @@ static void crisv32_intmem_init(void)
30 struct intmem_allocation* alloc = 36 struct intmem_allocation* alloc =
31 (struct intmem_allocation*)kmalloc(sizeof *alloc, GFP_KERNEL); 37 (struct intmem_allocation*)kmalloc(sizeof *alloc, GFP_KERNEL);
32 INIT_LIST_HEAD(&intmem_allocations); 38 INIT_LIST_HEAD(&intmem_allocations);
33 intmem_virtual = ioremap(MEM_INTMEM_START, MEM_INTMEM_SIZE); 39 intmem_virtual = ioremap(MEM_INTMEM_START + RESERVED_SIZE,
40 MEM_INTMEM_SIZE - RESERVED_SIZE);
34 initiated = 1; 41 initiated = 1;
35 alloc->size = MEM_INTMEM_SIZE; 42 alloc->size = MEM_INTMEM_SIZE - RESERVED_SIZE;
36 alloc->offset = 0; 43 alloc->offset = 0;
37 alloc->status = STATUS_FREE; 44 alloc->status = STATUS_FREE;
38 list_add_tail(&alloc->entry, &intmem_allocations); 45 list_add_tail(&alloc->entry, &intmem_allocations);
@@ -59,19 +66,23 @@ void* crisv32_intmem_alloc(unsigned size, unsigned align)
59 (struct intmem_allocation*) 66 (struct intmem_allocation*)
60 kmalloc(sizeof *alloc, GFP_ATOMIC); 67 kmalloc(sizeof *alloc, GFP_ATOMIC);
61 alloc->status = STATUS_FREE; 68 alloc->status = STATUS_FREE;
62 alloc->size = allocation->size - size - alignment; 69 alloc->size = allocation->size - size -
63 alloc->offset = allocation->offset + size; 70 alignment;
71 alloc->offset = allocation->offset + size +
72 alignment;
64 list_add(&alloc->entry, &allocation->entry); 73 list_add(&alloc->entry, &allocation->entry);
65 74
66 if (alignment) { 75 if (alignment) {
67 struct intmem_allocation* tmp; 76 struct intmem_allocation *tmp;
68 tmp = (struct intmem_allocation*) 77 tmp = (struct intmem_allocation *)
69 kmalloc(sizeof *tmp, GFP_ATOMIC); 78 kmalloc(sizeof *tmp,
79 GFP_ATOMIC);
70 tmp->offset = allocation->offset; 80 tmp->offset = allocation->offset;
71 tmp->size = alignment; 81 tmp->size = alignment;
72 tmp->status = STATUS_FREE; 82 tmp->status = STATUS_FREE;
73 allocation->offset += alignment; 83 allocation->offset += alignment;
74 list_add_tail(&tmp->entry, &allocation->entry); 84 list_add_tail(&tmp->entry,
85 &allocation->entry);
75 } 86 }
76 } 87 }
77 allocation->status = STATUS_ALLOCATED; 88 allocation->status = STATUS_ALLOCATED;
@@ -96,22 +107,24 @@ void crisv32_intmem_free(void* addr)
96 107
97 list_for_each_entry_safe(allocation, tmp, &intmem_allocations, entry) { 108 list_for_each_entry_safe(allocation, tmp, &intmem_allocations, entry) {
98 if (allocation->offset == (int)(addr - intmem_virtual)) { 109 if (allocation->offset == (int)(addr - intmem_virtual)) {
99 struct intmem_allocation* prev = 110 struct intmem_allocation *prev =
100 list_entry(allocation->entry.prev, 111 list_entry(allocation->entry.prev,
101 struct intmem_allocation, entry); 112 struct intmem_allocation, entry);
102 struct intmem_allocation* next = 113 struct intmem_allocation *next =
103 list_entry(allocation->entry.next, 114 list_entry(allocation->entry.next,
104 struct intmem_allocation, entry); 115 struct intmem_allocation, entry);
105 116
106 allocation->status = STATUS_FREE; 117 allocation->status = STATUS_FREE;
107 /* Join with prev and/or next if also free */ 118 /* Join with prev and/or next if also free */
108 if (prev->status == STATUS_FREE) { 119 if ((prev != &intmem_allocations) &&
120 (prev->status == STATUS_FREE)) {
109 prev->size += allocation->size; 121 prev->size += allocation->size;
110 list_del(&allocation->entry); 122 list_del(&allocation->entry);
111 kfree(allocation); 123 kfree(allocation);
112 allocation = prev; 124 allocation = prev;
113 } 125 }
114 if (next->status == STATUS_FREE) { 126 if ((next != &intmem_allocations) &&
127 (next->status == STATUS_FREE)) {
115 allocation->size += next->size; 128 allocation->size += next->size;
116 list_del(&next->entry); 129 list_del(&next->entry);
117 kfree(next); 130 kfree(next);
@@ -125,15 +138,16 @@ void crisv32_intmem_free(void* addr)
125 138
126void* crisv32_intmem_phys_to_virt(unsigned long addr) 139void* crisv32_intmem_phys_to_virt(unsigned long addr)
127{ 140{
128 return (void*)(addr - MEM_INTMEM_START+ 141 return (void *)(addr - (MEM_INTMEM_START + RESERVED_SIZE) +
129 (unsigned long)intmem_virtual); 142 (unsigned long)intmem_virtual);
130} 143}
131 144
132unsigned long crisv32_intmem_virt_to_phys(void* addr) 145unsigned long crisv32_intmem_virt_to_phys(void* addr)
133{ 146{
134 return (unsigned long)((unsigned long )addr - 147 return (unsigned long)((unsigned long )addr -
135 (unsigned long)intmem_virtual + MEM_INTMEM_START); 148 (unsigned long)intmem_virtual + MEM_INTMEM_START +
149 RESERVED_SIZE);
136} 150}
137 151
138 152module_init(crisv32_intmem_init);
139 153
diff --git a/arch/cris/arch-v32/mm/l2cache.c b/arch/cris/arch-v32/mm/l2cache.c
new file mode 100644
index 000000000000..332ff10dcc6b
--- /dev/null
+++ b/arch/cris/arch-v32/mm/l2cache.c
@@ -0,0 +1,29 @@
1#include <linux/init.h>
2#include <linux/kernel.h>
3#include <linux/string.h>
4#include <memmap.h>
5#include <hwregs/reg_map.h>
6#include <hwregs/reg_rdwr.h>
7#include <hwregs/l2cache_defs.h>
8#include <asm/io.h>
9
10#define L2CACHE_SIZE 64
11
12int __init l2cache_init(void)
13{
14 reg_l2cache_rw_ctrl ctrl = {0};
15 reg_l2cache_rw_cfg cfg = {.en = regk_l2cache_yes};
16
17 ctrl.csize = L2CACHE_SIZE;
18 ctrl.cbase = L2CACHE_SIZE / 4 + (L2CACHE_SIZE % 4 ? 1 : 0);
19 REG_WR(l2cache, regi_l2cache, rw_ctrl, ctrl);
20
21 /* Flush the tag memory */
22 memset((void *)(MEM_INTMEM_START | MEM_NON_CACHEABLE), 0, 2*1024);
23
24 /* Enable the cache */
25 REG_WR(l2cache, regi_l2cache, rw_cfg, cfg);
26
27 return 0;
28}
29
diff --git a/arch/cris/arch-v32/mm/mmu.S b/arch/cris/arch-v32/mm/mmu.S
index 27b70e5006af..2238d154bde3 100644
--- a/arch/cris/arch-v32/mm/mmu.S
+++ b/arch/cris/arch-v32/mm/mmu.S
@@ -1,3 +1,5 @@
1; WARNING : The refill handler has been modified, see below !!!
2
1/* 3/*
2 * Copyright (C) 2003 Axis Communications AB 4 * Copyright (C) 2003 Axis Communications AB
3 * 5 *
@@ -61,6 +63,14 @@
61; Note that the code is optimized to minimize stalls (makes the code harder 63; Note that the code is optimized to minimize stalls (makes the code harder
62; to read). 64; to read).
63; 65;
66; WARNING !!!
67; Modified by Mikael Asker 060725: added a workaround for strange TLB
68; behavior. If the same PTE is present in more than one set, the TLB
69; doesn't recognize it and we get stuck in a loop of refill exceptions.
70; The workaround detects such loops and exits them by flushing
71; the TLB contents. The problem and workaround were verified
72; in VCS by Mikael Starvik.
73;
64; Each page is 8 KB. Each PMD holds 8192/4 PTEs (each PTE is 4 bytes) so each 74; Each page is 8 KB. Each PMD holds 8192/4 PTEs (each PTE is 4 bytes) so each
65; PMD holds 16 MB of virtual memory. 75; PMD holds 16 MB of virtual memory.
66; Bits 0-12 : Offset within a page 76; Bits 0-12 : Offset within a page
@@ -68,6 +78,11 @@
68; Bits 24-31 : PMD offset within the PGD 78; Bits 24-31 : PMD offset within the PGD
69 79
70.macro MMU_REFILL_HANDLER handler, mmu 80.macro MMU_REFILL_HANDLER handler, mmu
81 .data
821: .dword 0 ; refill_count
83 ; == 0 <=> last_refill_cause is invalid
842: .dword 0 ; last_refill_cause
85 .text
71 .globl \handler 86 .globl \handler
72\handler: 87\handler:
73 subq 4, $sp 88 subq 4, $sp
@@ -76,42 +91,96 @@
76 subq 4, $sp 91 subq 4, $sp
77 move \mmu, $srs ; Select MMU support register bank 92 move \mmu, $srs ; Select MMU support register bank
78 move.d $acr, [$sp] 93 move.d $acr, [$sp]
79 subq 4, $sp 94 subq 12, $sp
80 move.d $r0, [$sp] 95 move.d 1b, $acr ; Point to refill_count
96 movem $r2, [$sp]
97
98 test.d [$acr] ; refill_count == 0 ?
99 beq 5f ; yes, last_refill_cause is invalid
100 move.d $acr, $r1
101
102 ; last_refill_cause is valid, investigate cause
103 addq 4, $r1 ; Point to last_refill_cause
104 move $s3, $r0 ; Get rw_mm_cause
105 move.d [$r1], $r2 ; Get last_refill_cause
106 cmp.d $r0, $r2 ; rw_mm_cause == last_refill_cause ?
107 beq 6f ; yes, increment count
108 moveq 1, $r2
109
110 ; rw_mm_cause != last_refill_cause
111 move.d $r2, [$acr] ; refill_count = 1
112 move.d $r0, [$r1] ; last_refill_cause = rw_mm_cause
113
1143: ; Probably not in a loop, continue normal processing
81#ifdef CONFIG_SMP 115#ifdef CONFIG_SMP
82 move $s7, $acr ; PGD 116 move $s7, $acr ; PGD
83#else 117#else
84 move.d per_cpu__current_pgd, $acr ; PGD 118 move.d per_cpu__current_pgd, $acr ; PGD
85#endif 119#endif
86 ; Look up PMD in PGD 120 ; Look up PMD in PGD
87 move $s3, $r0 ; rw_mm_cause
88 lsrq 24, $r0 ; Get PMD index into PGD (bit 24-31) 121 lsrq 24, $r0 ; Get PMD index into PGD (bit 24-31)
89 move.d [$acr], $acr ; PGD for the current process 122 move.d [$acr], $acr ; PGD for the current process
90 addi $r0.d, $acr, $acr 123 addi $r0.d, $acr, $acr
91 move $s3, $r0 ; rw_mm_cause 124 move $s3, $r0 ; rw_mm_cause
92 move.d [$acr], $acr ; Get PMD 125 move.d [$acr], $acr ; Get PMD
93 beq 1f 126 beq 8f
94 ; Look up PTE in PMD 127 ; Look up PTE in PMD
95 lsrq PAGE_SHIFT, $r0 128 lsrq PAGE_SHIFT, $r0
96 and.w PAGE_MASK, $acr ; Remove PMD flags 129 and.w PAGE_MASK, $acr ; Remove PMD flags
97 and.d 0x7ff, $r0 ; Get PTE index into PMD (bit 13-23) 130 and.d 0x7ff, $r0 ; Get PTE index into PMD (bit 13-23)
98 addi $r0.d, $acr, $acr 131 addi $r0.d, $acr, $acr
99 move.d [$acr], $acr ; Get PTE 132 move.d [$acr], $acr ; Get PTE
100 beq 2f 133 beq 9f
101 move.d [$sp+], $r0 ; Pop r0 in delayslot 134 movem [$sp], $r2 ; Restore r0-r2 in delay slot
135 addq 12, $sp
102 ; Store in TLB 136 ; Store in TLB
103 move $acr, $s5 137 move $acr, $s5
104 ; Return 1384: ; Return
105 move.d [$sp+], $acr 139 move.d [$sp+], $acr
106 move [$sp], $srs 140 move [$sp], $srs
107 addq 4, $sp 141 addq 4, $sp
108 rete 142 rete
109 rfe 143 rfe
1101: ; PMD missing, let the mm subsystem fix it up. 144
111 move.d [$sp+], $r0 ; Pop r0 1455: ; last_refill_cause is invalid
1122: ; PTE missing, let the mm subsystem fix it up. 146 moveq 1, $r2
147 addq 4, $r1 ; Point to last_refill_cause
148 move.d $r2, [$acr] ; refill_count = 1
149 move $s3, $r0 ; Get rw_mm_cause
150 ba 3b ; Continue normal processing
151 move.d $r0,[$r1] ; last_refill_cause = rw_mm_cause
152
1536: ; rw_mm_cause == last_refill_cause
154 move.d [$acr], $r2 ; Get refill_count
155 cmpq 4, $r2 ; refill_count > 4 ?
156 bhi 7f ; yes
157 addq 1, $r2 ; refill_count++
158 ba 3b ; Continue normal processing
159 move.d $r2, [$acr]
160
1617: ; refill_count > 4, error
162 move.d $acr, $r0 ; Save pointer to refill_count
163 clear.d [$r0] ; refill_count = 0
164
165 ;; rewind the short stack
166 movem [$sp], $r2 ; Restore r0-r2
167 addq 12, $sp
168 move.d [$sp+], $acr
169 move [$sp], $srs
170 addq 4, $sp
171 ;; Keep it simple (slow), save all the regs.
172 SAVE_ALL
173 jsr __flush_tlb_all
174 nop
175 ba ret_from_intr ; Return
176 nop
177
1788: ; PMD missing, let the mm subsystem fix it up.
179 movem [$sp], $r2 ; Restore r0-r2
1809: ; PTE missing, let the mm subsystem fix it up.
181 addq 12, $sp
113 move.d [$sp+], $acr 182 move.d [$sp+], $acr
114 move [$sp], $srs 183 move [$sp], $srs
115 addq 4, $sp 184 addq 4, $sp
116 SAVE_ALL 185 SAVE_ALL
117 move \mmu, $srs 186 move \mmu, $srs
diff --git a/arch/cris/arch-v32/mm/tlb.c b/arch/cris/arch-v32/mm/tlb.c
index a076ef6e9389..eda5ebcaea54 100644
--- a/arch/cris/arch-v32/mm/tlb.c
+++ b/arch/cris/arch-v32/mm/tlb.c
@@ -13,8 +13,8 @@
13#include <asm/arch/hwregs/supp_reg.h> 13#include <asm/arch/hwregs/supp_reg.h>
14 14
15#define UPDATE_TLB_SEL_IDX(val) \ 15#define UPDATE_TLB_SEL_IDX(val) \
16do { \ 16do { \
17 unsigned long tlb_sel; \ 17 unsigned long tlb_sel; \
18 \ 18 \
19 tlb_sel = REG_FIELD(mmu, rw_mm_tlb_sel, idx, val); \ 19 tlb_sel = REG_FIELD(mmu, rw_mm_tlb_sel, idx, val); \
20 SUPP_REG_WR(RW_MM_TLB_SEL, tlb_sel); \ 20 SUPP_REG_WR(RW_MM_TLB_SEL, tlb_sel); \
@@ -30,8 +30,8 @@ do { \
30 * The TLB can host up to 256 different mm contexts at the same time. The running 30 * The TLB can host up to 256 different mm contexts at the same time. The running
31 * context is found in the PID register. Each TLB entry contains a page_id that 31 * context is found in the PID register. Each TLB entry contains a page_id that
32 * has to match the PID register to give a hit. page_id_map keeps track of which 32 * has to match the PID register to give a hit. page_id_map keeps track of which
33 * mm is assigned to which page_id, making sure it's known when to invalidate TLB 33 * mm's is assigned to which page_id's, making sure it's known when to
34 * entries. 34 * invalidate TLB entries.
35 * 35 *
36 * The last page_id is never running, it is used as an invalid page_id so that 36 * The last page_id is never running, it is used as an invalid page_id so that
37 * it's possible to make TLB entries that will nerver match. 37 * it's possible to make TLB entries that will nerver match.
@@ -179,29 +179,29 @@ void
179switch_mm(struct mm_struct *prev, struct mm_struct *next, 179switch_mm(struct mm_struct *prev, struct mm_struct *next,
180 struct task_struct *tsk) 180 struct task_struct *tsk)
181{ 181{
182 int cpu = smp_processor_id(); 182 if (prev != next) {
183 183 int cpu = smp_processor_id();
184 /* Make sure there is a MMU context. */ 184
185 spin_lock(&mmu_context_lock); 185 /* Make sure there is a MMU context. */
186 get_mmu_context(next); 186 spin_lock(&mmu_context_lock);
187 cpu_set(cpu, next->cpu_vm_mask); 187 get_mmu_context(next);
188 spin_unlock(&mmu_context_lock); 188 cpu_set(cpu, next->cpu_vm_mask);
189 189 spin_unlock(&mmu_context_lock);
190 /* 190
191 * Remember the pgd for the fault handlers. Keep a separate copy of it 191 /*
192 * because current and active_mm might be invalid at points where 192 * Remember the pgd for the fault handlers. Keep a seperate
193 * there's still a need to derefer the pgd. 193 * copy of it because current and active_mm might be invalid
194 */ 194 * at points where * there's still a need to derefer the pgd.
195 per_cpu(current_pgd, cpu) = next->pgd; 195 */
196 196 per_cpu(current_pgd, cpu) = next->pgd;
197 /* Switch context in the MMU. */ 197
198 if (tsk && task_thread_info(tsk)) 198 /* Switch context in the MMU. */
199 { 199 if (tsk && task_thread_info(tsk)) {
200 SPEC_REG_WR(SPEC_REG_PID, next->context.page_id | task_thread_info(tsk)->tls); 200 SPEC_REG_WR(SPEC_REG_PID, next->context.page_id |
201 } 201 task_thread_info(tsk)->tls);
202 else 202 } else {
203 { 203 SPEC_REG_WR(SPEC_REG_PID, next->context.page_id);
204 SPEC_REG_WR(SPEC_REG_PID, next->context.page_id); 204 }
205 } 205 }
206} 206}
207 207
diff --git a/arch/cris/arch-v32/vmlinux.lds.S b/arch/cris/arch-v32/vmlinux.lds.S
index fead8c59ea63..d5f28e40717c 100644
--- a/arch/cris/arch-v32/vmlinux.lds.S
+++ b/arch/cris/arch-v32/vmlinux.lds.S
@@ -9,6 +9,13 @@
9 */ 9 */
10 10
11#include <asm-generic/vmlinux.lds.h> 11#include <asm-generic/vmlinux.lds.h>
12#include <asm/page.h>
13
14#ifdef CONFIG_ETRAX_VMEM_SIZE
15#define __CONFIG_ETRAX_VMEM_SIZE CONFIG_ETRAX_VMEM_SIZE
16#else
17#define __CONFIG_ETRAX_VMEM_SIZE 0
18#endif
12 19
13jiffies = jiffies_64; 20jiffies = jiffies_64;
14SECTIONS 21SECTIONS
@@ -17,18 +24,19 @@ SECTIONS
17 dram_start = .; 24 dram_start = .;
18 ebp_start = .; 25 ebp_start = .;
19 26
20 /* The boot section is only necessary until the VCS top level testbench */ 27 /* The boot section is only necessary until the VCS top */
21 /* includes both flash and DRAM. */ 28 /* level testbench includes both flash and DRAM. */
22 .boot : { *(.boot) } 29 .boot : { *(.boot) }
23 30
24 . = DRAM_VIRTUAL_BASE + 0x4000; /* See head.S and pages reserved at the start. */ 31 /* See head.S and pages reserved at the start. */
32 . = DRAM_VIRTUAL_BASE + 0x4000;
25 33
26 _text = .; /* Text and read-only data. */ 34 _text = .; /* Text and read-only data. */
27 text_start = .; /* Lots of aliases. */ 35 text_start = .; /* Lots of aliases. */
28 _stext = .; 36 _stext = .;
29 __stext = .; 37 __stext = .;
30 .text : { 38 .text : {
31 *(.text) 39 TEXT_TEXT
32 SCHED_TEXT 40 SCHED_TEXT
33 LOCK_TEXT 41 LOCK_TEXT
34 *(.fixup) 42 *(.fixup)
@@ -39,9 +47,9 @@ SECTIONS
39 __etext = .; 47 __etext = .;
40 48
41 . = ALIGN(4); /* Exception table. */ 49 . = ALIGN(4); /* Exception table. */
42 __start___ex_table = .; 50 __start___ex_table = .;
43 __ex_table : { *(__ex_table) } 51 __ex_table : { *(__ex_table) }
44 __stop___ex_table = .; 52 __stop___ex_table = .;
45 53
46 RODATA 54 RODATA
47 55
@@ -54,33 +62,27 @@ SECTIONS
54 __edata = . ; /* End of data section. */ 62 __edata = . ; /* End of data section. */
55 _edata = . ; 63 _edata = . ;
56 64
57 . = ALIGN(8192); /* init_task and stack, must be aligned. */ 65 . = ALIGN(PAGE_SIZE); /* init_task and stack, must be aligned. */
58 .data.init_task : { *(.data.init_task) } 66 .data.init_task : { *(.data.init_task) }
59 67
60 . = ALIGN(8192); /* Init code and data. */ 68 . = ALIGN(PAGE_SIZE); /* Init code and data. */
61 __init_begin = .; 69 __init_begin = .;
62 .init.text : { 70 .init.text : {
63 _sinittext = .; 71 _sinittext = .;
64 INIT_TEXT 72 INIT_TEXT
65 _einittext = .; 73 _einittext = .;
66 } 74 }
67 .init.data : { INIT_DATA } 75 .init.data : { INIT_DATA }
68 . = ALIGN(16); 76 . = ALIGN(16);
69 __setup_start = .; 77 __setup_start = .;
70 .init.setup : { *(.init.setup) } 78 .init.setup : { *(.init.setup) }
71 __setup_end = .; 79 __setup_end = .;
72 __start___param = .; 80 __start___param = .;
73 __param : { *(__param) } 81 __param : { *(__param) }
74 __stop___param = .; 82 __stop___param = .;
75 .initcall.init : { 83 .initcall.init : {
76 __initcall_start = .; 84 __initcall_start = .;
77 *(.initcall1.init); 85 INITCALLS
78 *(.initcall2.init);
79 *(.initcall3.init);
80 *(.initcall4.init);
81 *(.initcall5.init);
82 *(.initcall6.init);
83 *(.initcall7.init);
84 __initcall_end = .; 86 __initcall_end = .;
85 } 87 }
86 88
@@ -91,25 +93,23 @@ SECTIONS
91 } 93 }
92 SECURITY_INIT 94 SECURITY_INIT
93 95
94 PERCPU(8192) 96 __vmlinux_end = .; /* Last address of the physical file. */
97 PERCPU(PAGE_SIZE)
95 98
96#ifdef CONFIG_BLK_DEV_INITRD
97 .init.ramfs : { 99 .init.ramfs : {
98 __initramfs_start = .; 100 __initramfs_start = .;
99 *(.init.ramfs) 101 *(.init.ramfs)
100 __initramfs_end = .; 102 __initramfs_end = .;
101 /*
102 * We fill to the next page, so we can discard all init
103 * pages without needing to consider what payload might be
104 * appended to the kernel image.
105 */
106 FILL (0);
107 . = ALIGN (8192);
108 } 103 }
109#endif
110 104
111 __vmlinux_end = .; /* Last address of the physical file. */ 105 /*
112 __init_end = .; 106 * We fill to the next page, so we can discard all init
107 * pages without needing to consider what payload might be
108 * appended to the kernel image.
109 */
110 . = ALIGN (PAGE_SIZE);
111
112 __init_end = .;
113 113
114 __data_end = . ; /* Move to _edata? */ 114 __data_end = . ; /* Move to _edata? */
115 __bss_start = .; /* BSS. */ 115 __bss_start = .; /* BSS. */
@@ -123,11 +123,11 @@ SECTIONS
123 __end = .; 123 __end = .;
124 124
125 /* Sections to be discarded */ 125 /* Sections to be discarded */
126 /DISCARD/ : { 126 /DISCARD/ : {
127 EXIT_TEXT 127 EXIT_TEXT
128 EXIT_DATA 128 EXIT_DATA
129 *(.exitcall.exit) 129 *(.exitcall.exit)
130 } 130 }
131 131
132 dram_end = dram_start + CONFIG_ETRAX_DRAM_SIZE*1024*1024; 132 dram_end = dram_start + (CONFIG_ETRAX_DRAM_SIZE - __CONFIG_ETRAX_VMEM_SIZE)*1024*1024;
133} 133}
diff --git a/arch/cris/artpec_3_defconfig b/arch/cris/artpec_3_defconfig
new file mode 100644
index 000000000000..41fe67409aab
--- /dev/null
+++ b/arch/cris/artpec_3_defconfig
@@ -0,0 +1,582 @@
1#
2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.24-rc3
4# Mon Dec 3 11:18:54 2007
5#
6CONFIG_MMU=y
7CONFIG_ZONE_DMA=y
8CONFIG_RWSEM_GENERIC_SPINLOCK=y
9CONFIG_GENERIC_IOMAP=y
10# CONFIG_ARCH_HAS_ILOG2_U32 is not set
11# CONFIG_ARCH_HAS_ILOG2_U64 is not set
12CONFIG_GENERIC_FIND_NEXT_BIT=y
13CONFIG_GENERIC_HWEIGHT=y
14CONFIG_GENERIC_CALIBRATE_DELAY=y
15CONFIG_NO_IOPORT=y
16CONFIG_FORCE_MAX_ZONEORDER=6
17CONFIG_CRIS=y
18CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
19
20#
21# General setup
22#
23CONFIG_EXPERIMENTAL=y
24CONFIG_BROKEN_ON_SMP=y
25CONFIG_INIT_ENV_ARG_LIMIT=32
26CONFIG_LOCALVERSION=""
27CONFIG_LOCALVERSION_AUTO=y
28# CONFIG_SWAP is not set
29# CONFIG_SYSVIPC is not set
30# CONFIG_POSIX_MQUEUE is not set
31# CONFIG_BSD_PROCESS_ACCT is not set
32# CONFIG_TASKSTATS is not set
33# CONFIG_USER_NS is not set
34# CONFIG_PID_NS is not set
35# CONFIG_AUDIT is not set
36# CONFIG_IKCONFIG is not set
37CONFIG_LOG_BUF_SHIFT=14
38# CONFIG_CGROUPS is not set
39CONFIG_FAIR_GROUP_SCHED=y
40CONFIG_FAIR_USER_SCHED=y
41# CONFIG_FAIR_CGROUP_SCHED is not set
42CONFIG_SYSFS_DEPRECATED=y
43# CONFIG_RELAY is not set
44# CONFIG_BLK_DEV_INITRD is not set
45# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
46CONFIG_SYSCTL=y
47CONFIG_EMBEDDED=y
48CONFIG_UID16=y
49CONFIG_SYSCTL_SYSCALL=y
50# CONFIG_KALLSYMS is not set
51# CONFIG_HOTPLUG is not set
52CONFIG_PRINTK=y
53CONFIG_BUG=y
54CONFIG_ELF_CORE=y
55CONFIG_BASE_FULL=y
56CONFIG_FUTEX=y
57CONFIG_ANON_INODES=y
58CONFIG_EPOLL=y
59CONFIG_SIGNALFD=y
60CONFIG_EVENTFD=y
61CONFIG_SHMEM=y
62CONFIG_VM_EVENT_COUNTERS=y
63CONFIG_SLUB_DEBUG=y
64# CONFIG_SLAB is not set
65CONFIG_SLUB=y
66# CONFIG_SLOB is not set
67CONFIG_RT_MUTEXES=y
68# CONFIG_TINY_SHMEM is not set
69CONFIG_BASE_SMALL=0
70# CONFIG_MODULES is not set
71CONFIG_BLOCK=y
72# CONFIG_LBD is not set
73# CONFIG_BLK_DEV_IO_TRACE is not set
74# CONFIG_LSF is not set
75# CONFIG_BLK_DEV_BSG is not set
76
77#
78# IO Schedulers
79#
80CONFIG_IOSCHED_NOOP=y
81# CONFIG_IOSCHED_AS is not set
82# CONFIG_IOSCHED_DEADLINE is not set
83CONFIG_IOSCHED_CFQ=y
84# CONFIG_DEFAULT_AS is not set
85# CONFIG_DEFAULT_DEADLINE is not set
86CONFIG_DEFAULT_CFQ=y
87# CONFIG_DEFAULT_NOOP is not set
88CONFIG_DEFAULT_IOSCHED="cfq"
89
90#
91# General setup
92#
93CONFIG_BINFMT_ELF=y
94# CONFIG_BINFMT_MISC is not set
95CONFIG_GENERIC_HARDIRQS=y
96CONFIG_ETRAX_CMDLINE="root=/dev/mtdblock3 init=/linuxrc"
97# CONFIG_ETRAX_WATCHDOG is not set
98CONFIG_ETRAX_FAST_TIMER=y
99# CONFIG_ETRAX_KMALLOCED_MODULES is not set
100# CONFIG_OOM_REBOOT is not set
101CONFIG_PREEMPT_NONE=y
102# CONFIG_PREEMPT_VOLUNTARY is not set
103# CONFIG_PREEMPT is not set
104CONFIG_SELECT_MEMORY_MODEL=y
105CONFIG_FLATMEM_MANUAL=y
106# CONFIG_DISCONTIGMEM_MANUAL is not set
107# CONFIG_SPARSEMEM_MANUAL is not set
108CONFIG_FLATMEM=y
109CONFIG_FLAT_NODE_MEM_MAP=y
110# CONFIG_SPARSEMEM_STATIC is not set
111# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
112CONFIG_SPLIT_PTLOCK_CPUS=4
113# CONFIG_RESOURCES_64BIT is not set
114CONFIG_ZONE_DMA_FLAG=1
115CONFIG_BOUNCE=y
116CONFIG_VIRT_TO_BUS=y
117
118#
119# Hardware setup
120#
121# CONFIG_ETRAX100LX is not set
122# CONFIG_ETRAX100LX_V2 is not set
123# CONFIG_SVINTO_SIM is not set
124# CONFIG_ETRAXFS is not set
125CONFIG_CRIS_MACH_ARTPEC3=y
126# CONFIG_ETRAX_VCS_SIM is not set
127# CONFIG_ETRAX_ARCH_V10 is not set
128CONFIG_ETRAX_ARCH_V32=y
129CONFIG_ETRAX_DRAM_SIZE=32
130CONFIG_ETRAX_VMEM_SIZE=8
131CONFIG_ETRAX_FLASH_BUSWIDTH=2
132CONFIG_ETRAX_NANDFLASH_BUSWIDTH=1
133CONFIG_ETRAX_FLASH1_SIZE=4
134CONFIG_ETRAX_DEBUG_PORT0=y
135# CONFIG_ETRAX_DEBUG_PORT1 is not set
136# CONFIG_ETRAX_DEBUG_PORT2 is not set
137# CONFIG_ETRAX_DEBUG_PORT3 is not set
138# CONFIG_ETRAX_DEBUG_PORT_NULL is not set
139CONFIG_ETRAX_DRAM_VIRTUAL_BASE=c0000000
140CONFIG_ETRAX_SERIAL_PORTS=5
141CONFIG_ETRAX_DEF_GIO_PA_OE=1c
142CONFIG_ETRAX_DEF_GIO_PA_OUT=00
143CONFIG_ETRAX_DEF_GIO_PB_OE=00000
144CONFIG_ETRAX_DEF_GIO_PB_OUT=00000
145CONFIG_ETRAX_DEF_GIO_PC_OE=00000
146CONFIG_ETRAX_DEF_GIO_PC_OUT=00000
147
148#
149# Artpec-3 options
150#
151CONFIG_ETRAX_L2CACHE=y
152CONFIG_ETRAX_DDR=y
153CONFIG_ETRAX_DDR2_MRS=0
154CONFIG_ETRAX_DDR2_TIMING=0
155CONFIG_ETRAX_DDR2_CONFIG=0
156CONFIG_ETRAX_PIO_CE0_CFG=0
157CONFIG_ETRAX_PIO_CE1_CFG=0
158CONFIG_ETRAX_PIO_CE2_CFG=0
159# CONFIG_CPU_FREQ is not set
160# CONFIG_ETRAX_NBR_LED_GRP_ZERO is not set
161CONFIG_ETRAX_NBR_LED_GRP_ONE=y
162# CONFIG_ETRAX_NBR_LED_GRP_TWO is not set
163CONFIG_ETRAX_LED_G_NET0="PA3"
164CONFIG_ETRAX_LED_R_NET0="PA4"
165CONFIG_ETRAX_V32_LED2G="PA5"
166CONFIG_ETRAX_V32_LED2R="PA6"
167CONFIG_ETRAX_V32_LED3G="PA7"
168CONFIG_ETRAX_V32_LED3R="PA7"
169
170#
171# Networking
172#
173CONFIG_NET=y
174
175#
176# Networking options
177#
178CONFIG_PACKET=y
179# CONFIG_PACKET_MMAP is not set
180CONFIG_UNIX=y
181CONFIG_XFRM=y
182# CONFIG_XFRM_USER is not set
183# CONFIG_XFRM_SUB_POLICY is not set
184# CONFIG_XFRM_MIGRATE is not set
185# CONFIG_NET_KEY is not set
186CONFIG_INET=y
187# CONFIG_IP_MULTICAST is not set
188# CONFIG_IP_ADVANCED_ROUTER is not set
189CONFIG_IP_FIB_HASH=y
190# CONFIG_IP_PNP is not set
191# CONFIG_NET_IPIP is not set
192# CONFIG_NET_IPGRE is not set
193# CONFIG_ARPD is not set
194# CONFIG_SYN_COOKIES is not set
195# CONFIG_INET_AH is not set
196# CONFIG_INET_ESP is not set
197# CONFIG_INET_IPCOMP is not set
198# CONFIG_INET_XFRM_TUNNEL is not set
199# CONFIG_INET_TUNNEL is not set
200CONFIG_INET_XFRM_MODE_TRANSPORT=y
201CONFIG_INET_XFRM_MODE_TUNNEL=y
202CONFIG_INET_XFRM_MODE_BEET=y
203# CONFIG_INET_LRO is not set
204CONFIG_INET_DIAG=y
205CONFIG_INET_TCP_DIAG=y
206# CONFIG_TCP_CONG_ADVANCED is not set
207CONFIG_TCP_CONG_CUBIC=y
208CONFIG_DEFAULT_TCP_CONG="cubic"
209# CONFIG_TCP_MD5SIG is not set
210# CONFIG_IP_VS is not set
211# CONFIG_IPV6 is not set
212# CONFIG_INET6_XFRM_TUNNEL is not set
213# CONFIG_INET6_TUNNEL is not set
214# CONFIG_NETWORK_SECMARK is not set
215CONFIG_NETFILTER=y
216# CONFIG_NETFILTER_DEBUG is not set
217
218#
219# Core Netfilter Configuration
220#
221# CONFIG_NETFILTER_NETLINK is not set
222# CONFIG_NF_CONNTRACK_ENABLED is not set
223# CONFIG_NF_CONNTRACK is not set
224# CONFIG_NETFILTER_XTABLES is not set
225
226#
227# IP: Netfilter Configuration
228#
229# CONFIG_IP_NF_QUEUE is not set
230# CONFIG_IP_NF_IPTABLES is not set
231# CONFIG_IP_NF_ARPTABLES is not set
232# CONFIG_IP_DCCP is not set
233# CONFIG_IP_SCTP is not set
234# CONFIG_TIPC is not set
235# CONFIG_ATM is not set
236# CONFIG_BRIDGE is not set
237# CONFIG_VLAN_8021Q is not set
238# CONFIG_DECNET is not set
239# CONFIG_LLC2 is not set
240# CONFIG_IPX is not set
241# CONFIG_ATALK is not set
242# CONFIG_X25 is not set
243# CONFIG_LAPB is not set
244# CONFIG_ECONET is not set
245# CONFIG_WAN_ROUTER is not set
246# CONFIG_NET_SCHED is not set
247
248#
249# Network testing
250#
251# CONFIG_NET_PKTGEN is not set
252# CONFIG_HAMRADIO is not set
253# CONFIG_IRDA is not set
254# CONFIG_BT is not set
255# CONFIG_AF_RXRPC is not set
256
257#
258# Wireless
259#
260# CONFIG_CFG80211 is not set
261# CONFIG_WIRELESS_EXT is not set
262# CONFIG_MAC80211 is not set
263# CONFIG_IEEE80211 is not set
264# CONFIG_RFKILL is not set
265# CONFIG_NET_9P is not set
266
267#
268# Drivers for built-in interfaces
269#
270CONFIG_ETRAX_ETHERNET=y
271# CONFIG_ETRAX_IDE is not set
272CONFIG_ETRAX_AXISFLASHMAP=y
273CONFIG_ETRAX_PTABLE_SECTOR=65536
274# CONFIG_ETRAX_I2C is not set
275# CONFIG_ETRAX_GPIO is not set
276# CONFIG_ETRAX_NO_PHY is not set
277# CONFIG_ETRAX_ETHERNET_IFACE0 is not set
278# CONFIG_ETRAX_ETHERNET_GBIT is not set
279# CONFIG_ETRAXFS_SERIAL is not set
280# CONFIG_ETRAX_SYNCHRONOUS_SERIAL is not set
281# CONFIG_ETRAX_AXISFLASHMAP_MTD0WHOLE is not set
282# CONFIG_ETRAX_NANDFLASH is not set
283# CONFIG_ETRAX_CARDBUS is not set
284# CONFIG_ETRAX_IOP_FW_LOAD is not set
285# CONFIG_ETRAX_STREAMCOPROC is not set
286# CONFIG_ETRAX_SPI_MMC is not set
287# CONFIG_ETRAX_SPI_MMC_BOARD is not set
288# CONFIG_ETRAX_NETWORK_LED_ON_WHEN_LINK is not set
289CONFIG_ETRAX_NETWORK_LED_ON_WHEN_ACTIVITY=y
290
291#
292# Generic Driver Options
293#
294CONFIG_STANDALONE=y
295CONFIG_PREVENT_FIRMWARE_BUILD=y
296# CONFIG_SYS_HYPERVISOR is not set
297CONFIG_MTD=y
298# CONFIG_MTD_DEBUG is not set
299CONFIG_MTD_CONCAT=y
300CONFIG_MTD_PARTITIONS=y
301# CONFIG_MTD_REDBOOT_PARTS is not set
302# CONFIG_MTD_CMDLINE_PARTS is not set
303
304#
305# User Modules And Translation Layers
306#
307CONFIG_MTD_CHAR=y
308CONFIG_MTD_BLKDEVS=y
309CONFIG_MTD_BLOCK=y
310# CONFIG_FTL is not set
311# CONFIG_NFTL is not set
312# CONFIG_INFTL is not set
313# CONFIG_RFD_FTL is not set
314# CONFIG_SSFDC is not set
315# CONFIG_MTD_OOPS is not set
316
317#
318# RAM/ROM/Flash chip drivers
319#
320CONFIG_MTD_CFI=y
321CONFIG_MTD_JEDECPROBE=y
322CONFIG_MTD_GEN_PROBE=y
323# CONFIG_MTD_CFI_ADV_OPTIONS is not set
324CONFIG_MTD_MAP_BANK_WIDTH_1=y
325CONFIG_MTD_MAP_BANK_WIDTH_2=y
326CONFIG_MTD_MAP_BANK_WIDTH_4=y
327# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
328# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
329# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
330CONFIG_MTD_CFI_I1=y
331CONFIG_MTD_CFI_I2=y
332# CONFIG_MTD_CFI_I4 is not set
333# CONFIG_MTD_CFI_I8 is not set
334# CONFIG_MTD_CFI_INTELEXT is not set
335CONFIG_MTD_CFI_AMDSTD=y
336# CONFIG_MTD_CFI_STAA is not set
337CONFIG_MTD_CFI_UTIL=y
338CONFIG_MTD_RAM=y
339# CONFIG_MTD_ROM is not set
340# CONFIG_MTD_ABSENT is not set
341
342#
343# Mapping drivers for chip access
344#
345CONFIG_MTD_COMPLEX_MAPPINGS=y
346# CONFIG_MTD_PHYSMAP is not set
347# CONFIG_MTD_PLATRAM is not set
348
349#
350# Self-contained MTD device drivers
351#
352# CONFIG_MTD_SLRAM is not set
353# CONFIG_MTD_PHRAM is not set
354CONFIG_MTD_MTDRAM=y
355CONFIG_MTDRAM_TOTAL_SIZE=0
356CONFIG_MTDRAM_ERASE_SIZE=64
357CONFIG_MTDRAM_ABS_POS=0x0
358# CONFIG_MTD_BLOCK2MTD is not set
359
360#
361# Disk-On-Chip Device Drivers
362#
363# CONFIG_MTD_DOC2000 is not set
364# CONFIG_MTD_DOC2001 is not set
365# CONFIG_MTD_DOC2001PLUS is not set
366# CONFIG_MTD_NAND is not set
367# CONFIG_MTD_ONENAND is not set
368
369#
370# UBI - Unsorted block images
371#
372# CONFIG_MTD_UBI is not set
373CONFIG_BLK_DEV=y
374# CONFIG_BLK_DEV_COW_COMMON is not set
375# CONFIG_BLK_DEV_LOOP is not set
376# CONFIG_BLK_DEV_NBD is not set
377CONFIG_BLK_DEV_RAM=y
378CONFIG_BLK_DEV_RAM_COUNT=16
379CONFIG_BLK_DEV_RAM_SIZE=4096
380CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
381# CONFIG_CDROM_PKTCDVD is not set
382# CONFIG_ATA_OVER_ETH is not set
383CONFIG_NETDEVICES=y
384# CONFIG_NETDEVICES_MULTIQUEUE is not set
385# CONFIG_DUMMY is not set
386# CONFIG_BONDING is not set
387# CONFIG_MACVLAN is not set
388# CONFIG_EQUALIZER is not set
389# CONFIG_TUN is not set
390# CONFIG_VETH is not set
391# CONFIG_PHYLIB is not set
392CONFIG_NET_ETHERNET=y
393CONFIG_MII=y
394# CONFIG_IBM_NEW_EMAC_ZMII is not set
395# CONFIG_IBM_NEW_EMAC_RGMII is not set
396# CONFIG_IBM_NEW_EMAC_TAH is not set
397# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
398CONFIG_NETDEV_1000=y
399CONFIG_NETDEV_10000=y
400
401#
402# Wireless LAN
403#
404# CONFIG_WLAN_PRE80211 is not set
405# CONFIG_WLAN_80211 is not set
406# CONFIG_WAN is not set
407# CONFIG_PPP is not set
408# CONFIG_SLIP is not set
409# CONFIG_SHAPER is not set
410# CONFIG_NETCONSOLE is not set
411# CONFIG_NETPOLL is not set
412# CONFIG_NET_POLL_CONTROLLER is not set
413# CONFIG_RTC_CLASS is not set
414
415#
416# Input device support
417#
418# CONFIG_INPUT is not set
419
420#
421# Hardware I/O ports
422#
423CONFIG_SERIO=y
424# CONFIG_SERIO_I8042 is not set
425# CONFIG_SERIO_SERPORT is not set
426# CONFIG_SERIO_LIBPS2 is not set
427# CONFIG_SERIO_RAW is not set
428# CONFIG_GAMEPORT is not set
429
430#
431# Character devices
432#
433# CONFIG_VT is not set
434CONFIG_UNIX98_PTYS=y
435CONFIG_LEGACY_PTYS=y
436CONFIG_LEGACY_PTY_COUNT=256
437CONFIG_HW_RANDOM=y
438# CONFIG_RTC is not set
439# CONFIG_GEN_RTC is not set
440# CONFIG_R3964 is not set
441# CONFIG_RAW_DRIVER is not set
442
443#
444# File systems
445#
446# CONFIG_EXT2_FS is not set
447# CONFIG_EXT3_FS is not set
448# CONFIG_EXT4DEV_FS is not set
449# CONFIG_REISERFS_FS is not set
450# CONFIG_JFS_FS is not set
451# CONFIG_FS_POSIX_ACL is not set
452# CONFIG_XFS_FS is not set
453# CONFIG_GFS2_FS is not set
454# CONFIG_OCFS2_FS is not set
455# CONFIG_MINIX_FS is not set
456# CONFIG_ROMFS_FS is not set
457CONFIG_INOTIFY=y
458CONFIG_INOTIFY_USER=y
459# CONFIG_QUOTA is not set
460CONFIG_DNOTIFY=y
461# CONFIG_AUTOFS_FS is not set
462# CONFIG_AUTOFS4_FS is not set
463# CONFIG_FUSE_FS is not set
464
465#
466# CD-ROM/DVD Filesystems
467#
468# CONFIG_ISO9660_FS is not set
469# CONFIG_UDF_FS is not set
470
471#
472# DOS/FAT/NT Filesystems
473#
474# CONFIG_MSDOS_FS is not set
475# CONFIG_VFAT_FS is not set
476# CONFIG_NTFS_FS is not set
477
478#
479# Pseudo filesystems
480#
481CONFIG_PROC_FS=y
482CONFIG_PROC_KCORE=y
483CONFIG_PROC_SYSCTL=y
484CONFIG_SYSFS=y
485CONFIG_TMPFS=y
486# CONFIG_TMPFS_POSIX_ACL is not set
487# CONFIG_HUGETLB_PAGE is not set
488# CONFIG_CONFIGFS_FS is not set
489
490#
491# Miscellaneous filesystems
492#
493# CONFIG_ADFS_FS is not set
494# CONFIG_AFFS_FS is not set
495# CONFIG_HFS_FS is not set
496# CONFIG_HFSPLUS_FS is not set
497# CONFIG_BEFS_FS is not set
498# CONFIG_BFS_FS is not set
499# CONFIG_EFS_FS is not set
500CONFIG_JFFS2_FS=y
501CONFIG_JFFS2_FS_DEBUG=0
502CONFIG_JFFS2_FS_WRITEBUFFER=y
503# CONFIG_JFFS2_FS_WBUF_VERIFY is not set
504# CONFIG_JFFS2_SUMMARY is not set
505# CONFIG_JFFS2_FS_XATTR is not set
506# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
507CONFIG_JFFS2_ZLIB=y
508# CONFIG_JFFS2_LZO is not set
509CONFIG_JFFS2_RTIME=y
510# CONFIG_JFFS2_RUBIN is not set
511CONFIG_CRAMFS=y
512# CONFIG_VXFS_FS is not set
513# CONFIG_HPFS_FS is not set
514# CONFIG_QNX4FS_FS is not set
515# CONFIG_SYSV_FS is not set
516# CONFIG_UFS_FS is not set
517CONFIG_NETWORK_FILESYSTEMS=y
518CONFIG_NFS_FS=y
519CONFIG_NFS_V3=y
520# CONFIG_NFS_V3_ACL is not set
521# CONFIG_NFS_V4 is not set
522# CONFIG_NFS_DIRECTIO is not set
523# CONFIG_NFSD is not set
524CONFIG_LOCKD=y
525CONFIG_LOCKD_V4=y
526CONFIG_NFS_COMMON=y
527CONFIG_SUNRPC=y
528# CONFIG_SUNRPC_BIND34 is not set
529# CONFIG_RPCSEC_GSS_KRB5 is not set
530# CONFIG_RPCSEC_GSS_SPKM3 is not set
531# CONFIG_SMB_FS is not set
532# CONFIG_CIFS is not set
533# CONFIG_NCP_FS is not set
534# CONFIG_CODA_FS is not set
535# CONFIG_AFS_FS is not set
536
537#
538# Partition Types
539#
540# CONFIG_PARTITION_ADVANCED is not set
541CONFIG_MSDOS_PARTITION=y
542# CONFIG_NLS is not set
543# CONFIG_DLM is not set
544
545#
546# Kernel hacking
547#
548# CONFIG_PROFILING is not set
549# CONFIG_SYSTEM_PROFILER is not set
550# CONFIG_PRINTK_TIME is not set
551CONFIG_ENABLE_WARN_DEPRECATED=y
552CONFIG_ENABLE_MUST_CHECK=y
553# CONFIG_MAGIC_SYSRQ is not set
554# CONFIG_UNUSED_SYMBOLS is not set
555# CONFIG_DEBUG_FS is not set
556# CONFIG_HEADERS_CHECK is not set
557# CONFIG_DEBUG_KERNEL is not set
558# CONFIG_SLUB_DEBUG_ON is not set
559# CONFIG_SAMPLES is not set
560
561#
562# Security options
563#
564# CONFIG_KEYS is not set
565# CONFIG_SECURITY is not set
566# CONFIG_SECURITY_FILE_CAPABILITIES is not set
567# CONFIG_CRYPTO is not set
568
569#
570# Library routines
571#
572CONFIG_BITREVERSE=y
573# CONFIG_CRC_CCITT is not set
574# CONFIG_CRC16 is not set
575# CONFIG_CRC_ITU_T is not set
576CONFIG_CRC32=y
577# CONFIG_CRC7 is not set
578# CONFIG_LIBCRC32C is not set
579CONFIG_ZLIB_INFLATE=y
580CONFIG_ZLIB_DEFLATE=y
581CONFIG_PLIST=y
582CONFIG_HAS_DMA=y
diff --git a/arch/cris/defconfig b/arch/cris/defconfig
index 9c33ae659934..59f36a58f842 100644
--- a/arch/cris/defconfig
+++ b/arch/cris/defconfig
@@ -1,52 +1,91 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.11 3# Linux kernel version: 2.6.24-rc3
4# Mon Jun 20 13:42:02 2005 4# Mon Dec 3 11:34:27 2007
5# 5#
6CONFIG_MMU=y 6CONFIG_MMU=y
7CONFIG_UID16=y 7CONFIG_ZONE_DMA=y
8CONFIG_RWSEM_GENERIC_SPINLOCK=y 8CONFIG_RWSEM_GENERIC_SPINLOCK=y
9CONFIG_GENERIC_IOMAP=y 9CONFIG_GENERIC_IOMAP=y
10# CONFIG_ARCH_HAS_ILOG2_U32 is not set
11# CONFIG_ARCH_HAS_ILOG2_U64 is not set
12CONFIG_GENERIC_FIND_NEXT_BIT=y
13CONFIG_GENERIC_HWEIGHT=y
10CONFIG_GENERIC_CALIBRATE_DELAY=y 14CONFIG_GENERIC_CALIBRATE_DELAY=y
15CONFIG_NO_IOPORT=y
16CONFIG_FORCE_MAX_ZONEORDER=6
11CONFIG_CRIS=y 17CONFIG_CRIS=y
18CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
12 19
13# 20#
14# Code maturity level options 21# General setup
15# 22#
16CONFIG_EXPERIMENTAL=y 23CONFIG_EXPERIMENTAL=y
17CONFIG_CLEAN_COMPILE=y
18CONFIG_BROKEN_ON_SMP=y 24CONFIG_BROKEN_ON_SMP=y
19 25CONFIG_INIT_ENV_ARG_LIMIT=32
20#
21# General setup
22#
23CONFIG_LOCALVERSION="" 26CONFIG_LOCALVERSION=""
27CONFIG_LOCALVERSION_AUTO=y
24# CONFIG_SWAP is not set 28# CONFIG_SWAP is not set
25# CONFIG_SYSVIPC is not set 29# CONFIG_SYSVIPC is not set
26# CONFIG_POSIX_MQUEUE is not set 30# CONFIG_POSIX_MQUEUE is not set
27# CONFIG_BSD_PROCESS_ACCT is not set 31# CONFIG_BSD_PROCESS_ACCT is not set
28CONFIG_SYSCTL=y 32# CONFIG_TASKSTATS is not set
33# CONFIG_USER_NS is not set
34# CONFIG_PID_NS is not set
29# CONFIG_AUDIT is not set 35# CONFIG_AUDIT is not set
30CONFIG_LOG_BUF_SHIFT=14
31# CONFIG_HOTPLUG is not set
32CONFIG_KOBJECT_UEVENT=y
33# CONFIG_IKCONFIG is not set 36# CONFIG_IKCONFIG is not set
37CONFIG_LOG_BUF_SHIFT=14
38# CONFIG_CGROUPS is not set
39CONFIG_FAIR_GROUP_SCHED=y
40CONFIG_FAIR_USER_SCHED=y
41# CONFIG_FAIR_CGROUP_SCHED is not set
42CONFIG_SYSFS_DEPRECATED=y
43# CONFIG_RELAY is not set
44# CONFIG_BLK_DEV_INITRD is not set
45# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
46CONFIG_SYSCTL=y
34CONFIG_EMBEDDED=y 47CONFIG_EMBEDDED=y
48CONFIG_UID16=y
49CONFIG_SYSCTL_SYSCALL=y
35# CONFIG_KALLSYMS is not set 50# CONFIG_KALLSYMS is not set
51# CONFIG_HOTPLUG is not set
52CONFIG_PRINTK=y
53CONFIG_BUG=y
54CONFIG_ELF_CORE=y
55CONFIG_BASE_FULL=y
36CONFIG_FUTEX=y 56CONFIG_FUTEX=y
57CONFIG_ANON_INODES=y
37CONFIG_EPOLL=y 58CONFIG_EPOLL=y
38# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set 59CONFIG_SIGNALFD=y
60CONFIG_EVENTFD=y
39CONFIG_SHMEM=y 61CONFIG_SHMEM=y
40CONFIG_CC_ALIGN_FUNCTIONS=0 62CONFIG_VM_EVENT_COUNTERS=y
41CONFIG_CC_ALIGN_LABELS=0 63CONFIG_SLUB_DEBUG=y
42CONFIG_CC_ALIGN_LOOPS=0 64# CONFIG_SLAB is not set
43CONFIG_CC_ALIGN_JUMPS=0 65CONFIG_SLUB=y
66# CONFIG_SLOB is not set
67CONFIG_RT_MUTEXES=y
44# CONFIG_TINY_SHMEM is not set 68# CONFIG_TINY_SHMEM is not set
69CONFIG_BASE_SMALL=0
70# CONFIG_MODULES is not set
71CONFIG_BLOCK=y
72# CONFIG_LBD is not set
73# CONFIG_BLK_DEV_IO_TRACE is not set
74# CONFIG_LSF is not set
75# CONFIG_BLK_DEV_BSG is not set
45 76
46# 77#
47# Loadable module support 78# IO Schedulers
48# 79#
49# CONFIG_MODULES is not set 80CONFIG_IOSCHED_NOOP=y
81# CONFIG_IOSCHED_AS is not set
82# CONFIG_IOSCHED_DEADLINE is not set
83CONFIG_IOSCHED_CFQ=y
84# CONFIG_DEFAULT_AS is not set
85# CONFIG_DEFAULT_DEADLINE is not set
86CONFIG_DEFAULT_CFQ=y
87# CONFIG_DEFAULT_NOOP is not set
88CONFIG_DEFAULT_IOSCHED="cfq"
50 89
51# 90#
52# General setup 91# General setup
@@ -54,12 +93,27 @@ CONFIG_CC_ALIGN_JUMPS=0
54CONFIG_BINFMT_ELF=y 93CONFIG_BINFMT_ELF=y
55# CONFIG_BINFMT_MISC is not set 94# CONFIG_BINFMT_MISC is not set
56CONFIG_GENERIC_HARDIRQS=y 95CONFIG_GENERIC_HARDIRQS=y
57# CONFIG_SMP is not set
58CONFIG_ETRAX_CMDLINE="root=/dev/mtdblock3 init=/linuxrc" 96CONFIG_ETRAX_CMDLINE="root=/dev/mtdblock3 init=/linuxrc"
59# CONFIG_ETRAX_WATCHDOG is not set 97# CONFIG_ETRAX_WATCHDOG is not set
60CONFIG_ETRAX_FAST_TIMER=y 98CONFIG_ETRAX_FAST_TIMER=y
61# CONFIG_PREEMPT is not set 99# CONFIG_ETRAX_KMALLOCED_MODULES is not set
62# CONFIG_OOM_REBOOT is not set 100# CONFIG_OOM_REBOOT is not set
101CONFIG_PREEMPT_NONE=y
102# CONFIG_PREEMPT_VOLUNTARY is not set
103# CONFIG_PREEMPT is not set
104CONFIG_SELECT_MEMORY_MODEL=y
105CONFIG_FLATMEM_MANUAL=y
106# CONFIG_DISCONTIGMEM_MANUAL is not set
107# CONFIG_SPARSEMEM_MANUAL is not set
108CONFIG_FLATMEM=y
109CONFIG_FLAT_NODE_MEM_MAP=y
110# CONFIG_SPARSEMEM_STATIC is not set
111# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
112CONFIG_SPLIT_PTLOCK_CPUS=4
113# CONFIG_RESOURCES_64BIT is not set
114CONFIG_ZONE_DMA_FLAG=1
115CONFIG_BOUNCE=y
116CONFIG_VIRT_TO_BUS=y
63 117
64# 118#
65# Hardware setup 119# Hardware setup
@@ -68,127 +122,180 @@ CONFIG_ETRAX_FAST_TIMER=y
68CONFIG_ETRAX100LX_V2=y 122CONFIG_ETRAX100LX_V2=y
69# CONFIG_SVINTO_SIM is not set 123# CONFIG_SVINTO_SIM is not set
70# CONFIG_ETRAXFS is not set 124# CONFIG_ETRAXFS is not set
71# CONFIG_ETRAXFS_SIM is not set 125# CONFIG_CRIS_MACH_ARTPEC3 is not set
126# CONFIG_ETRAX_VCS_SIM is not set
72CONFIG_ETRAX_ARCH_V10=y 127CONFIG_ETRAX_ARCH_V10=y
73# CONFIG_ETRAX_ARCH_V32 is not set 128# CONFIG_ETRAX_ARCH_V32 is not set
74CONFIG_ETRAX_DRAM_SIZE=32 129CONFIG_ETRAX_DRAM_SIZE=32
75CONFIG_ETRAX_FLASH_BUSWIDTH=2 130CONFIG_ETRAX_FLASH_BUSWIDTH=2
131CONFIG_ETRAX_NANDFLASH_BUSWIDTH=1
76CONFIG_ETRAX_FLASH1_SIZE=4 132CONFIG_ETRAX_FLASH1_SIZE=4
133# CONFIG_ETRAX_DEBUG_PORT0 is not set
134# CONFIG_ETRAX_DEBUG_PORT1 is not set
135# CONFIG_ETRAX_DEBUG_PORT2 is not set
136# CONFIG_ETRAX_DEBUG_PORT3 is not set
137CONFIG_ETRAX_DEBUG_PORT_NULL=y
138
139#
140# CRIS v10 options
141#
77CONFIG_ETRAX_DRAM_VIRTUAL_BASE=c0000000 142CONFIG_ETRAX_DRAM_VIRTUAL_BASE=c0000000
78CONFIG_ETRAX_PA_LEDS=y 143CONFIG_ETRAX_PA_LEDS=y
79# CONFIG_ETRAX_PB_LEDS is not set 144# CONFIG_ETRAX_PB_LEDS is not set
80# CONFIG_ETRAX_CSP0_LEDS is not set 145# CONFIG_ETRAX_CSP0_LEDS is not set
81# CONFIG_ETRAX_NO_LEDS is not set 146# CONFIG_ETRAX_NO_LEDS is not set
82CONFIG_ETRAX_LED1G=2 147CONFIG_ETRAX_LED1G=2
83CONFIG_ETRAX_LED1R=2 148CONFIG_ETRAX_LED1R=3
84CONFIG_ETRAX_LED2G=3 149CONFIG_ETRAX_LED2G=4
85CONFIG_ETRAX_LED2R=3 150CONFIG_ETRAX_LED2R=5
86CONFIG_ETRAX_LED3G=2 151CONFIG_ETRAX_LED3G=2
87CONFIG_ETRAX_LED3R=2 152CONFIG_ETRAX_LED3R=2
88CONFIG_ETRAX_DEBUG_PORT0=y
89# CONFIG_ETRAX_DEBUG_PORT1 is not set
90# CONFIG_ETRAX_DEBUG_PORT2 is not set
91# CONFIG_ETRAX_DEBUG_PORT3 is not set
92# CONFIG_ETRAX_DEBUG_PORT_NULL is not set
93CONFIG_ETRAX_RESCUE_SER0=y 153CONFIG_ETRAX_RESCUE_SER0=y
94# CONFIG_ETRAX_RESCUE_SER1 is not set 154# CONFIG_ETRAX_RESCUE_SER1 is not set
95# CONFIG_ETRAX_RESCUE_SER2 is not set 155# CONFIG_ETRAX_RESCUE_SER2 is not set
96# CONFIG_ETRAX_RESCUE_SER3 is not set 156# CONFIG_ETRAX_RESCUE_SER3 is not set
97CONFIG_ETRAX_DEF_R_WAITSTATES=0x95a6 157CONFIG_ETRAX_DEF_R_WAITSTATES=95a6
98CONFIG_ETRAX_DEF_R_BUS_CONFIG=0x4 158CONFIG_ETRAX_DEF_R_BUS_CONFIG=104
99CONFIG_ETRAX_SDRAM=y 159# CONFIG_ETRAX_SDRAM is not set
100CONFIG_ETRAX_DEF_R_SDRAM_CONFIG=0x09e05757 160CONFIG_ETRAX_DEF_R_DRAM_CONFIG=1a200040
101CONFIG_ETRAX_DEF_R_SDRAM_TIMING=0x80008002 161CONFIG_ETRAX_DEF_R_DRAM_TIMING=5611
102CONFIG_ETRAX_DEF_R_PORT_PA_DIR=0x1d 162CONFIG_ETRAX_DEF_R_PORT_PA_DIR=1c
103CONFIG_ETRAX_DEF_R_PORT_PA_DATA=0x00 163CONFIG_ETRAX_DEF_R_PORT_PA_DATA=00
104CONFIG_ETRAX_DEF_R_PORT_PB_CONFIG=0x00 164CONFIG_ETRAX_DEF_R_PORT_PB_CONFIG=00
105CONFIG_ETRAX_DEF_R_PORT_PB_DIR=0x1e 165CONFIG_ETRAX_DEF_R_PORT_PB_DIR=00
106CONFIG_ETRAX_DEF_R_PORT_PB_DATA=0xf3 166CONFIG_ETRAX_DEF_R_PORT_PB_DATA=ff
107# CONFIG_ETRAX_SOFT_SHUTDOWN is not set 167# CONFIG_ETRAX_SOFT_SHUTDOWN is not set
108 168
109# 169#
170# Networking
171#
172CONFIG_NET=y
173
174#
175# Networking options
176#
177CONFIG_PACKET=y
178# CONFIG_PACKET_MMAP is not set
179CONFIG_UNIX=y
180CONFIG_XFRM=y
181# CONFIG_XFRM_USER is not set
182# CONFIG_XFRM_SUB_POLICY is not set
183# CONFIG_XFRM_MIGRATE is not set
184# CONFIG_NET_KEY is not set
185CONFIG_INET=y
186# CONFIG_IP_MULTICAST is not set
187# CONFIG_IP_ADVANCED_ROUTER is not set
188CONFIG_IP_FIB_HASH=y
189# CONFIG_IP_PNP is not set
190# CONFIG_NET_IPIP is not set
191# CONFIG_NET_IPGRE is not set
192# CONFIG_ARPD is not set
193# CONFIG_SYN_COOKIES is not set
194# CONFIG_INET_AH is not set
195# CONFIG_INET_ESP is not set
196# CONFIG_INET_IPCOMP is not set
197# CONFIG_INET_XFRM_TUNNEL is not set
198# CONFIG_INET_TUNNEL is not set
199CONFIG_INET_XFRM_MODE_TRANSPORT=y
200CONFIG_INET_XFRM_MODE_TUNNEL=y
201CONFIG_INET_XFRM_MODE_BEET=y
202# CONFIG_INET_LRO is not set
203CONFIG_INET_DIAG=y
204CONFIG_INET_TCP_DIAG=y
205# CONFIG_TCP_CONG_ADVANCED is not set
206CONFIG_TCP_CONG_CUBIC=y
207CONFIG_DEFAULT_TCP_CONG="cubic"
208# CONFIG_TCP_MD5SIG is not set
209# CONFIG_IP_VS is not set
210# CONFIG_IPV6 is not set
211# CONFIG_INET6_XFRM_TUNNEL is not set
212# CONFIG_INET6_TUNNEL is not set
213# CONFIG_NETWORK_SECMARK is not set
214CONFIG_NETFILTER=y
215# CONFIG_NETFILTER_DEBUG is not set
216
217#
218# Core Netfilter Configuration
219#
220# CONFIG_NETFILTER_NETLINK is not set
221# CONFIG_NF_CONNTRACK_ENABLED is not set
222# CONFIG_NF_CONNTRACK is not set
223# CONFIG_NETFILTER_XTABLES is not set
224
225#
226# IP: Netfilter Configuration
227#
228# CONFIG_IP_NF_QUEUE is not set
229# CONFIG_IP_NF_IPTABLES is not set
230# CONFIG_IP_NF_ARPTABLES is not set
231# CONFIG_IP_DCCP is not set
232# CONFIG_IP_SCTP is not set
233# CONFIG_TIPC is not set
234# CONFIG_ATM is not set
235# CONFIG_BRIDGE is not set
236# CONFIG_VLAN_8021Q is not set
237# CONFIG_DECNET is not set
238# CONFIG_LLC2 is not set
239# CONFIG_IPX is not set
240# CONFIG_ATALK is not set
241# CONFIG_X25 is not set
242# CONFIG_LAPB is not set
243# CONFIG_ECONET is not set
244# CONFIG_WAN_ROUTER is not set
245# CONFIG_NET_SCHED is not set
246
247#
248# Network testing
249#
250# CONFIG_NET_PKTGEN is not set
251# CONFIG_HAMRADIO is not set
252# CONFIG_IRDA is not set
253# CONFIG_BT is not set
254# CONFIG_AF_RXRPC is not set
255
256#
257# Wireless
258#
259# CONFIG_CFG80211 is not set
260# CONFIG_WIRELESS_EXT is not set
261# CONFIG_MAC80211 is not set
262# CONFIG_IEEE80211 is not set
263# CONFIG_RFKILL is not set
264# CONFIG_NET_9P is not set
265
266#
110# Drivers for built-in interfaces 267# Drivers for built-in interfaces
111# 268#
112CONFIG_ETRAX_ETHERNET=y 269CONFIG_ETRAX_ETHERNET=y
113# CONFIG_ETRAX_NETWORK_LED_ON_WHEN_LINK is not set
114CONFIG_ETRAX_NETWORK_LED_ON_WHEN_ACTIVITY=y
115CONFIG_ETRAX_SERIAL=y 270CONFIG_ETRAX_SERIAL=y
116# CONFIG_ETRAX_SERIAL_FAST_TIMER is not set 271# CONFIG_ETRAX_SERIAL_FAST_TIMER is not set
117# CONFIG_ETRAX_SERIAL_FLUSH_DMA_FAST is not set 272# CONFIG_ETRAX_SERIAL_FLUSH_DMA_FAST is not set
118CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS=5 273CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS=5
119CONFIG_ETRAX_SERIAL_PORT0=y 274# CONFIG_ETRAX_SERIAL_PORT0 is not set
120# CONFIG_ETRAX_SERIAL_PORT0_NO_DMA_OUT is not set
121CONFIG_ETRAX_SERIAL_PORT0_DMA6_OUT=y
122# CONFIG_ETRAX_SERIAL_PORT0_NO_DMA_IN is not set
123CONFIG_ETRAX_SERIAL_PORT0_DMA7_IN=y
124CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_ON_NONE=y
125# CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_ON_PA is not set
126# CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_ON_PB is not set
127# CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED is not set
128CONFIG_ETRAX_SER0_DTR_ON_PA_BIT=-1
129CONFIG_ETRAX_SER0_RI_ON_PA_BIT=-1
130CONFIG_ETRAX_SER0_DSR_ON_PA_BIT=-1
131CONFIG_ETRAX_SER0_CD_ON_PA_BIT=-1
132CONFIG_ETRAX_SER0_DTR_ON_PB_BIT=-1
133CONFIG_ETRAX_SER0_RI_ON_PB_BIT=-1
134CONFIG_ETRAX_SER0_DSR_ON_PB_BIT=-1
135CONFIG_ETRAX_SER0_CD_ON_PB_BIT=-1
136# CONFIG_ETRAX_SERIAL_PORT1 is not set 275# CONFIG_ETRAX_SERIAL_PORT1 is not set
137CONFIG_ETRAX_SERIAL_PORT2=y 276# CONFIG_ETRAX_SERIAL_PORT2 is not set
138# CONFIG_ETRAX_SERIAL_PORT2_NO_DMA_OUT is not set
139CONFIG_ETRAX_SERIAL_PORT2_DMA2_OUT=y
140# CONFIG_ETRAX_SERIAL_PORT2_NO_DMA_IN is not set
141CONFIG_ETRAX_SERIAL_PORT2_DMA3_IN=y
142CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_ON_NONE=y
143# CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_ON_PA is not set
144# CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_ON_PB is not set
145# CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED is not set
146CONFIG_ETRAX_SER2_DTR_ON_PA_BIT=-1
147CONFIG_ETRAX_SER2_RI_ON_PA_BIT=-1
148CONFIG_ETRAX_SER2_DSR_ON_PA_BIT=-1
149CONFIG_ETRAX_SER2_CD_ON_PA_BIT=-1
150CONFIG_ETRAX_SER2_DTR_ON_PB_BIT=-1
151CONFIG_ETRAX_SER2_RI_ON_PB_BIT=-1
152CONFIG_ETRAX_SER2_DSR_ON_PB_BIT=-1
153CONFIG_ETRAX_SER2_CD_ON_PB_BIT=-1
154# CONFIG_ETRAX_SERIAL_PORT3 is not set 277# CONFIG_ETRAX_SERIAL_PORT3 is not set
155CONFIG_ETRAX_RS485=y 278# CONFIG_ETRAX_RS485 is not set
156# CONFIG_ETRAX_RS485_ON_PA is not set 279# CONFIG_ETRAX_IDE is not set
157# CONFIG_ETRAX_RS485_DISABLE_RECEIVER is not set 280# CONFIG_ETRAX_USB_HOST is not set
158CONFIG_ETRAX_IDE=y
159CONFIG_ETRAX_IDE_DELAY=15
160CONFIG_ETRAX_IDE_PB7_RESET=y
161# CONFIG_ETRAX_IDE_G27_RESET is not set
162CONFIG_ETRAX_USB_HOST=y
163CONFIG_ETRAX_USB_HOST_PORT1=y
164CONFIG_ETRAX_USB_HOST_PORT2=y
165CONFIG_ETRAX_AXISFLASHMAP=y 281CONFIG_ETRAX_AXISFLASHMAP=y
166CONFIG_ETRAX_PTABLE_SECTOR=65536 282CONFIG_ETRAX_PTABLE_SECTOR=65536
167# CONFIG_ETRAX_I2C is not set 283# CONFIG_ETRAX_I2C is not set
168# CONFIG_ETRAX_GPIO is not set 284# CONFIG_ETRAX_GPIO is not set
169CONFIG_ETRAX_RTC=y 285# CONFIG_ETRAX_RTC is not set
170CONFIG_ETRAX_DS1302=y 286# CONFIG_ETRAX_NETWORK_LED_ON_WHEN_LINK is not set
171# CONFIG_ETRAX_PCF8563 is not set 287CONFIG_ETRAX_NETWORK_LED_ON_WHEN_ACTIVITY=y
172CONFIG_ETRAX_DS1302_RST_ON_GENERIC_PORT=y
173CONFIG_ETRAX_DS1302_RSTBIT=0
174CONFIG_ETRAX_DS1302_SCLBIT=1
175CONFIG_ETRAX_DS1302_SDABIT=0
176CONFIG_ETRAX_DS1302_TRICKLE_CHARGE=0
177 288
178# 289#
179# Generic Driver Options 290# Generic Driver Options
180# 291#
181CONFIG_STANDALONE=y 292CONFIG_STANDALONE=y
182CONFIG_PREVENT_FIRMWARE_BUILD=y 293CONFIG_PREVENT_FIRMWARE_BUILD=y
183# CONFIG_FW_LOADER is not set 294# CONFIG_SYS_HYPERVISOR is not set
184
185#
186# Memory Technology Devices (MTD)
187#
188CONFIG_MTD=y 295CONFIG_MTD=y
189# CONFIG_MTD_DEBUG is not set 296# CONFIG_MTD_DEBUG is not set
190CONFIG_MTD_PARTITIONS=y
191CONFIG_MTD_CONCAT=y 297CONFIG_MTD_CONCAT=y
298CONFIG_MTD_PARTITIONS=y
192# CONFIG_MTD_REDBOOT_PARTS is not set 299# CONFIG_MTD_REDBOOT_PARTS is not set
193# CONFIG_MTD_CMDLINE_PARTS is not set 300# CONFIG_MTD_CMDLINE_PARTS is not set
194 301
@@ -196,16 +303,20 @@ CONFIG_MTD_CONCAT=y
196# User Modules And Translation Layers 303# User Modules And Translation Layers
197# 304#
198CONFIG_MTD_CHAR=y 305CONFIG_MTD_CHAR=y
306CONFIG_MTD_BLKDEVS=y
199CONFIG_MTD_BLOCK=y 307CONFIG_MTD_BLOCK=y
200# CONFIG_FTL is not set 308# CONFIG_FTL is not set
201# CONFIG_NFTL is not set 309# CONFIG_NFTL is not set
202# CONFIG_INFTL is not set 310# CONFIG_INFTL is not set
311# CONFIG_RFD_FTL is not set
312# CONFIG_SSFDC is not set
313# CONFIG_MTD_OOPS is not set
203 314
204# 315#
205# RAM/ROM/Flash chip drivers 316# RAM/ROM/Flash chip drivers
206# 317#
207CONFIG_MTD_CFI=y 318CONFIG_MTD_CFI=y
208# CONFIG_MTD_JEDECPROBE is not set 319CONFIG_MTD_JEDECPROBE=y
209CONFIG_MTD_GEN_PROBE=y 320CONFIG_MTD_GEN_PROBE=y
210# CONFIG_MTD_CFI_ADV_OPTIONS is not set 321# CONFIG_MTD_CFI_ADV_OPTIONS is not set
211CONFIG_MTD_MAP_BANK_WIDTH_1=y 322CONFIG_MTD_MAP_BANK_WIDTH_1=y
@@ -220,20 +331,18 @@ CONFIG_MTD_CFI_I2=y
220# CONFIG_MTD_CFI_I8 is not set 331# CONFIG_MTD_CFI_I8 is not set
221# CONFIG_MTD_CFI_INTELEXT is not set 332# CONFIG_MTD_CFI_INTELEXT is not set
222CONFIG_MTD_CFI_AMDSTD=y 333CONFIG_MTD_CFI_AMDSTD=y
223CONFIG_MTD_CFI_AMDSTD_RETRY=0
224# CONFIG_MTD_CFI_STAA is not set 334# CONFIG_MTD_CFI_STAA is not set
225CONFIG_MTD_CFI_UTIL=y 335CONFIG_MTD_CFI_UTIL=y
226CONFIG_MTD_RAM=y 336CONFIG_MTD_RAM=y
227# CONFIG_MTD_ROM is not set 337# CONFIG_MTD_ROM is not set
228# CONFIG_MTD_ABSENT is not set 338# CONFIG_MTD_ABSENT is not set
229# CONFIG_MTD_SHARP is not set
230# CONFIG_MTD_JEDEC is not set
231 339
232# 340#
233# Mapping drivers for chip access 341# Mapping drivers for chip access
234# 342#
235CONFIG_MTD_COMPLEX_MAPPINGS=y 343CONFIG_MTD_COMPLEX_MAPPINGS=y
236# CONFIG_MTD_PHYSMAP is not set 344# CONFIG_MTD_PHYSMAP is not set
345# CONFIG_MTD_PLATRAM is not set
237 346
238# 347#
239# Self-contained MTD device drivers 348# Self-contained MTD device drivers
@@ -244,7 +353,6 @@ CONFIG_MTD_MTDRAM=y
244CONFIG_MTDRAM_TOTAL_SIZE=0 353CONFIG_MTDRAM_TOTAL_SIZE=0
245CONFIG_MTDRAM_ERASE_SIZE=64 354CONFIG_MTDRAM_ERASE_SIZE=64
246CONFIG_MTDRAM_ABS_POS=0x0 355CONFIG_MTDRAM_ABS_POS=0x0
247# CONFIG_MTD_BLKMTD is not set
248# CONFIG_MTD_BLOCK2MTD is not set 356# CONFIG_MTD_BLOCK2MTD is not set
249 357
250# 358#
@@ -253,216 +361,54 @@ CONFIG_MTDRAM_ABS_POS=0x0
253# CONFIG_MTD_DOC2000 is not set 361# CONFIG_MTD_DOC2000 is not set
254# CONFIG_MTD_DOC2001 is not set 362# CONFIG_MTD_DOC2001 is not set
255# CONFIG_MTD_DOC2001PLUS is not set 363# CONFIG_MTD_DOC2001PLUS is not set
256
257#
258# NAND Flash Device Drivers
259#
260# CONFIG_MTD_NAND is not set 364# CONFIG_MTD_NAND is not set
365# CONFIG_MTD_ONENAND is not set
261 366
262# 367#
263# Parallel port support 368# UBI - Unsorted block images
264#
265# CONFIG_PARPORT is not set
266
267#
268# Plug and Play support
269# 369#
270 370# CONFIG_MTD_UBI is not set
271# 371CONFIG_BLK_DEV=y
272# Block devices
273#
274# CONFIG_BLK_DEV_FD is not set
275# CONFIG_BLK_DEV_COW_COMMON is not set 372# CONFIG_BLK_DEV_COW_COMMON is not set
276# CONFIG_BLK_DEV_LOOP is not set 373# CONFIG_BLK_DEV_LOOP is not set
277# CONFIG_BLK_DEV_CRYPTOLOOP is not set
278# CONFIG_BLK_DEV_NBD is not set 374# CONFIG_BLK_DEV_NBD is not set
279# CONFIG_BLK_DEV_UB is not set
280CONFIG_BLK_DEV_RAM=y 375CONFIG_BLK_DEV_RAM=y
281CONFIG_BLK_DEV_RAM_COUNT=16 376CONFIG_BLK_DEV_RAM_COUNT=16
282CONFIG_BLK_DEV_RAM_SIZE=4096 377CONFIG_BLK_DEV_RAM_SIZE=4096
283# CONFIG_BLK_DEV_INITRD is not set 378CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
284CONFIG_INITRAMFS_SOURCE=""
285# CONFIG_CDROM_PKTCDVD is not set 379# CONFIG_CDROM_PKTCDVD is not set
286
287#
288# IO Schedulers
289#
290CONFIG_IOSCHED_NOOP=y
291# CONFIG_IOSCHED_AS is not set
292# CONFIG_IOSCHED_DEADLINE is not set
293CONFIG_IOSCHED_CFQ=y
294# CONFIG_ATA_OVER_ETH is not set 380# CONFIG_ATA_OVER_ETH is not set
295
296#
297# Multi-device support (RAID and LVM)
298#
299# CONFIG_MD is not set
300
301#
302# ATA/ATAPI/MFM/RLL support
303#
304# CONFIG_IDE is not set
305# CONFIG_PARIDE is not set
306
307#
308# Please see Documentation/ide.txt for help/info on IDE drives
309#
310# CONFIG_BLK_DEV_IDE_SATA is not set
311# CONFIG_IDEDISK_MULTI_MODE is not set
312# CONFIG_BLK_DEV_IDETAPE is not set
313# CONFIG_BLK_DEV_IDEFLOPPY is not set
314# CONFIG_IDE_TASK_IOCTL is not set
315
316#
317# IDE chipset support/bugfixes
318#
319# CONFIG_IDE_GENERIC is not set
320# CONFIG_IDE_ARM is not set
321# CONFIG_IDEDMA_AUTO is not set
322# CONFIG_BLK_DEV_HD is not set
323
324#
325# SCSI device support
326#
327# CONFIG_SCSI is not set
328# CONFIG_ISCSI_TCP is not set
329
330#
331# IEEE 1394 (FireWire) support
332#
333
334#
335# I2O device support
336#
337
338#
339# Networking support
340#
341CONFIG_NET=y
342
343#
344# Networking options
345#
346CONFIG_PACKET=y
347# CONFIG_PACKET_MMAP is not set
348# CONFIG_NETLINK_DEV is not set
349CONFIG_UNIX=y
350# CONFIG_NET_KEY is not set
351CONFIG_INET=y
352# CONFIG_IP_MULTICAST is not set
353# CONFIG_IP_ADVANCED_ROUTER is not set
354# CONFIG_IP_PNP is not set
355# CONFIG_NET_IPIP is not set
356# CONFIG_NET_IPGRE is not set
357# CONFIG_ARPD is not set
358# CONFIG_SYN_COOKIES is not set
359# CONFIG_INET_AH is not set
360# CONFIG_INET_ESP is not set
361# CONFIG_INET_IPCOMP is not set
362# CONFIG_INET_TUNNEL is not set
363CONFIG_IP_TCPDIAG=y
364# CONFIG_IP_TCPDIAG_IPV6 is not set
365
366#
367# IP: Virtual Server Configuration
368#
369# CONFIG_IP_VS is not set
370# CONFIG_IPV6 is not set
371CONFIG_NETFILTER=y
372# CONFIG_NETFILTER_DEBUG is not set
373
374#
375# IP: Netfilter Configuration
376#
377# CONFIG_IP_NF_CONNTRACK is not set
378# CONFIG_IP_NF_CONNTRACK_MARK is not set
379# CONFIG_IP_NF_QUEUE is not set
380# CONFIG_IP_NF_IPTABLES is not set
381# CONFIG_IP_NF_ARPTABLES is not set
382
383#
384# SCTP Configuration (EXPERIMENTAL)
385#
386# CONFIG_IP_SCTP is not set
387# CONFIG_ATM is not set
388# CONFIG_BRIDGE is not set
389# CONFIG_VLAN_8021Q is not set
390# CONFIG_DECNET is not set
391# CONFIG_LLC2 is not set
392# CONFIG_IPX is not set
393# CONFIG_ATALK is not set
394# CONFIG_X25 is not set
395# CONFIG_LAPB is not set
396# CONFIG_NET_DIVERT is not set
397# CONFIG_ECONET is not set
398# CONFIG_WAN_ROUTER is not set
399
400#
401# QoS and/or fair queueing
402#
403# CONFIG_NET_SCHED is not set
404# CONFIG_NET_CLS_ROUTE is not set
405
406#
407# Network testing
408#
409# CONFIG_NET_PKTGEN is not set
410# CONFIG_NETPOLL is not set
411# CONFIG_NET_POLL_CONTROLLER is not set
412# CONFIG_HAMRADIO is not set
413# CONFIG_IRDA is not set
414# CONFIG_AF_RXRPC is not set
415# CONFIG_AF_RXRPC_DEBUG is not set
416# CONFIG_BT is not set
417# CONFIG_I2C is not set
418
419CONFIG_NETDEVICES=y 381CONFIG_NETDEVICES=y
382# CONFIG_NETDEVICES_MULTIQUEUE is not set
420# CONFIG_DUMMY is not set 383# CONFIG_DUMMY is not set
421# CONFIG_BONDING is not set 384# CONFIG_BONDING is not set
385# CONFIG_MACVLAN is not set
422# CONFIG_EQUALIZER is not set 386# CONFIG_EQUALIZER is not set
423# CONFIG_TUN is not set 387# CONFIG_TUN is not set
424 388# CONFIG_VETH is not set
425# 389# CONFIG_PHYLIB is not set
426# Ethernet (10 or 100Mbit)
427#
428CONFIG_NET_ETHERNET=y 390CONFIG_NET_ETHERNET=y
429# CONFIG_MII is not set 391CONFIG_MII=y
392# CONFIG_IBM_NEW_EMAC_ZMII is not set
393# CONFIG_IBM_NEW_EMAC_RGMII is not set
394# CONFIG_IBM_NEW_EMAC_TAH is not set
395# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
396CONFIG_NETDEV_1000=y
397CONFIG_NETDEV_10000=y
430 398
431# 399#
432# Ethernet (1000 Mbit) 400# Wireless LAN
433#
434
435#
436# Ethernet (10000 Mbit)
437#
438
439#
440# Token Ring devices
441#
442
443#
444# Wireless LAN (non-hamradio)
445#
446# CONFIG_NET_RADIO is not set
447
448#
449# Wan interfaces
450# 401#
402# CONFIG_WLAN_PRE80211 is not set
403# CONFIG_WLAN_80211 is not set
451# CONFIG_WAN is not set 404# CONFIG_WAN is not set
452# CONFIG_PPP is not set 405# CONFIG_PPP is not set
453# CONFIG_SLIP is not set 406# CONFIG_SLIP is not set
454# CONFIG_SHAPER is not set 407# CONFIG_SHAPER is not set
455# CONFIG_NETCONSOLE is not set 408# CONFIG_NETCONSOLE is not set
456 409# CONFIG_NETPOLL is not set
457# 410# CONFIG_NET_POLL_CONTROLLER is not set
458# ISDN subsystem 411# CONFIG_RTC_CLASS is not set
459#
460# CONFIG_ISDN is not set
461
462#
463# Telephony Support
464#
465# CONFIG_PHONE is not set
466 412
467# 413#
468# Input device support 414# Input device support
@@ -470,7 +416,7 @@ CONFIG_NET_ETHERNET=y
470# CONFIG_INPUT is not set 416# CONFIG_INPUT is not set
471 417
472# 418#
473# Input I/O drivers 419# Hardware I/O ports
474# 420#
475CONFIG_SERIO=y 421CONFIG_SERIO=y
476# CONFIG_SERIO_I8042 is not set 422# CONFIG_SERIO_I8042 is not set
@@ -480,94 +426,39 @@ CONFIG_SERIO=y
480# CONFIG_GAMEPORT is not set 426# CONFIG_GAMEPORT is not set
481 427
482# 428#
483# Input Device Drivers
484#
485CONFIG_INPUT_KEYBOARD=y
486CONFIG_KEYBOARD_ATKBD=y
487# CONFIG_KEYBOARD_SUNKBD is not set
488# CONFIG_KEYBOARD_LKKBD is not set
489# CONFIG_KEYBOARD_XTKBD is not set
490# CONFIG_KEYBOARD_NEWTON is not set
491CONFIG_INPUT_MOUSE=y
492CONFIG_MOUSE_PS2=y
493# CONFIG_MOUSE_SERIAL is not set
494# CONFIG_MOUSE_VSXXXAA is not set
495# CONFIG_INPUT_JOYSTICK is not set
496# CONFIG_INPUT_TABLET is not set
497# CONFIG_INPUT_TOUCHSCREEN is not set
498# CONFIG_INPUT_MISC is not set
499
500#
501# Character devices 429# Character devices
502# 430#
503# CONFIG_VT is not set 431# CONFIG_VT is not set
504# CONFIG_SERIAL_NONSTANDARD is not set
505
506#
507# Serial drivers
508#
509# CONFIG_SERIAL_8250 is not set
510
511#
512# Non-8250 serial port support
513#
514CONFIG_SERIAL_CORE=y
515CONFIG_SERIAL_CORE_CONSOLE=y
516CONFIG_UNIX98_PTYS=y 432CONFIG_UNIX98_PTYS=y
517CONFIG_LEGACY_PTYS=y 433CONFIG_LEGACY_PTYS=y
518CONFIG_LEGACY_PTY_COUNT=256 434CONFIG_LEGACY_PTY_COUNT=256
519 435CONFIG_HW_RANDOM=y
520#
521# IPMI
522#
523# CONFIG_IPMI_HANDLER is not set
524
525#
526# Watchdog Cards
527#
528# CONFIG_WATCHDOG is not set
529# CONFIG_RTC is not set 436# CONFIG_RTC is not set
530# CONFIG_GEN_RTC is not set 437# CONFIG_GEN_RTC is not set
531# CONFIG_DTLK is not set
532# CONFIG_R3964 is not set 438# CONFIG_R3964 is not set
533# CONFIG_RTC_LIB is not set
534# CONFIG_RTC_CLASS is not set
535
536#
537# Ftape, the floppy tape device driver
538#
539# CONFIG_DRM is not set
540# CONFIG_RAW_DRIVER is not set 439# CONFIG_RAW_DRIVER is not set
541 440
542# 441#
543# Multimedia devices
544#
545# CONFIG_VIDEO_DEV is not set
546
547#
548# Digital Video Broadcasting Devices
549#
550# CONFIG_DVB is not set
551
552#
553# File systems 442# File systems
554# 443#
555# CONFIG_EXT2_FS is not set 444# CONFIG_EXT2_FS is not set
556# CONFIG_EXT3_FS is not set 445# CONFIG_EXT3_FS is not set
557# CONFIG_JBD is not set 446# CONFIG_EXT4DEV_FS is not set
558# CONFIG_REISERFS_FS is not set 447# CONFIG_REISERFS_FS is not set
559# CONFIG_JFS_FS is not set 448# CONFIG_JFS_FS is not set
560 449# CONFIG_FS_POSIX_ACL is not set
561#
562# XFS support
563#
564# CONFIG_XFS_FS is not set 450# CONFIG_XFS_FS is not set
451# CONFIG_GFS2_FS is not set
452# CONFIG_OCFS2_FS is not set
565# CONFIG_MINIX_FS is not set 453# CONFIG_MINIX_FS is not set
566# CONFIG_ROMFS_FS is not set 454# CONFIG_ROMFS_FS is not set
455CONFIG_INOTIFY=y
456CONFIG_INOTIFY_USER=y
567# CONFIG_QUOTA is not set 457# CONFIG_QUOTA is not set
568CONFIG_DNOTIFY=y 458CONFIG_DNOTIFY=y
569# CONFIG_AUTOFS_FS is not set 459# CONFIG_AUTOFS_FS is not set
570# CONFIG_AUTOFS4_FS is not set 460# CONFIG_AUTOFS4_FS is not set
461# CONFIG_FUSE_FS is not set
571 462
572# 463#
573# CD-ROM/DVD Filesystems 464# CD-ROM/DVD Filesystems
@@ -587,13 +478,12 @@ CONFIG_DNOTIFY=y
587# 478#
588CONFIG_PROC_FS=y 479CONFIG_PROC_FS=y
589CONFIG_PROC_KCORE=y 480CONFIG_PROC_KCORE=y
481CONFIG_PROC_SYSCTL=y
590CONFIG_SYSFS=y 482CONFIG_SYSFS=y
591# CONFIG_DEVFS_FS is not set
592# CONFIG_DEVPTS_FS_XATTR is not set
593CONFIG_TMPFS=y 483CONFIG_TMPFS=y
594# CONFIG_TMPFS_XATTR is not set 484# CONFIG_TMPFS_POSIX_ACL is not set
595# CONFIG_HUGETLB_PAGE is not set 485# CONFIG_HUGETLB_PAGE is not set
596CONFIG_RAMFS=y 486# CONFIG_CONFIGFS_FS is not set
597 487
598# 488#
599# Miscellaneous filesystems 489# Miscellaneous filesystems
@@ -605,15 +495,15 @@ CONFIG_RAMFS=y
605# CONFIG_BEFS_FS is not set 495# CONFIG_BEFS_FS is not set
606# CONFIG_BFS_FS is not set 496# CONFIG_BFS_FS is not set
607# CONFIG_EFS_FS is not set 497# CONFIG_EFS_FS is not set
608CONFIG_JFFS_FS=y
609CONFIG_JFFS_FS_VERBOSE=0
610# CONFIG_JFFS_PROC_FS is not set
611CONFIG_JFFS2_FS=y 498CONFIG_JFFS2_FS=y
612CONFIG_JFFS2_FS_DEBUG=0 499CONFIG_JFFS2_FS_DEBUG=0
613# CONFIG_JFFS2_FS_NAND is not set 500CONFIG_JFFS2_FS_WRITEBUFFER=y
614# CONFIG_JFFS2_FS_NOR_ECC is not set 501# CONFIG_JFFS2_FS_WBUF_VERIFY is not set
502# CONFIG_JFFS2_SUMMARY is not set
503# CONFIG_JFFS2_FS_XATTR is not set
615# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set 504# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
616CONFIG_JFFS2_ZLIB=y 505CONFIG_JFFS2_ZLIB=y
506# CONFIG_JFFS2_LZO is not set
617CONFIG_JFFS2_RTIME=y 507CONFIG_JFFS2_RTIME=y
618# CONFIG_JFFS2_RUBIN is not set 508# CONFIG_JFFS2_RUBIN is not set
619CONFIG_CRAMFS=y 509CONFIG_CRAMFS=y
@@ -622,12 +512,10 @@ CONFIG_CRAMFS=y
622# CONFIG_QNX4FS_FS is not set 512# CONFIG_QNX4FS_FS is not set
623# CONFIG_SYSV_FS is not set 513# CONFIG_SYSV_FS is not set
624# CONFIG_UFS_FS is not set 514# CONFIG_UFS_FS is not set
625 515CONFIG_NETWORK_FILESYSTEMS=y
626#
627# Network File Systems
628#
629CONFIG_NFS_FS=y 516CONFIG_NFS_FS=y
630CONFIG_NFS_V3=y 517CONFIG_NFS_V3=y
518# CONFIG_NFS_V3_ACL is not set
631# CONFIG_NFS_V4 is not set 519# CONFIG_NFS_V4 is not set
632# CONFIG_NFS_DIRECTIO is not set 520# CONFIG_NFS_DIRECTIO is not set
633# CONFIG_NFSD is not set 521# CONFIG_NFSD is not set
@@ -649,181 +537,44 @@ CONFIG_SUNRPC=y
649# 537#
650# CONFIG_PARTITION_ADVANCED is not set 538# CONFIG_PARTITION_ADVANCED is not set
651CONFIG_MSDOS_PARTITION=y 539CONFIG_MSDOS_PARTITION=y
652
653#
654# Native Language Support
655#
656# CONFIG_NLS is not set 540# CONFIG_NLS is not set
657 541# CONFIG_DLM is not set
658#
659# Sound
660#
661# CONFIG_SOUND is not set
662
663#
664# Generic devices
665#
666# CONFIG_SND_MPU401_UART is not set
667# CONFIG_SND_DUMMY is not set
668# CONFIG_SND_VIRMIDI is not set
669# CONFIG_SND_MTPAV is not set
670# CONFIG_SND_SERIAL_U16550 is not set
671# CONFIG_SND_MPU401 is not set
672
673#
674# PCCARD (PCMCIA/CardBus) support
675#
676# CONFIG_PCCARD is not set
677# CONFIG_PARPORT_PC_PCMCIA is not set
678# CONFIG_NET_PCMCIA is not set
679
680#
681# PC-card bridges
682#
683
684#
685# USB support
686#
687CONFIG_USB=y
688# CONFIG_USB_DEBUG is not set
689
690#
691# Miscellaneous USB options
692#
693CONFIG_USB_DEVICEFS=y
694# CONFIG_USB_BANDWIDTH is not set
695# CONFIG_USB_DYNAMIC_MINORS is not set
696# CONFIG_USB_OTG is not set
697# CONFIG_USB_ARCH_HAS_HCD is not set
698# CONFIG_USB_ARCH_HAS_OHCI is not set
699
700#
701# USB Host Controller Drivers
702#
703# CONFIG_USB_SL811_HCD is not set
704
705#
706# USB Device Class drivers
707#
708
709#
710# USB Bluetooth TTY can only be used with disabled Bluetooth subsystem
711#
712# CONFIG_USB_ACM is not set
713# CONFIG_USB_PRINTER is not set
714
715#
716# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' may also be needed; see USB_STORAGE Help for more information
717#
718# CONFIG_USB_STORAGE is not set
719
720#
721# USB Input Devices
722#
723# CONFIG_USB_HID is not set
724# HID_SUPPORT is not set
725
726#
727# USB HID Boot Protocol drivers
728#
729# CONFIG_USB_KBD is not set
730# CONFIG_USB_MOUSE is not set
731# CONFIG_USB_AIPTEK is not set
732# CONFIG_USB_WACOM is not set
733# CONFIG_USB_KBTAB is not set
734# CONFIG_USB_POWERMATE is not set
735# CONFIG_USB_MTOUCH is not set
736# CONFIG_USB_EGALAX is not set
737# CONFIG_USB_XPAD is not set
738# CONFIG_USB_ATI_REMOTE is not set
739
740#
741# USB Imaging devices
742#
743# CONFIG_USB_MDC800 is not set
744
745#
746# USB Multimedia devices
747#
748# CONFIG_USB_DABUSB is not set
749
750#
751# Video4Linux support is needed for USB Multimedia device support
752#
753
754#
755# USB Network Adapters
756#
757# CONFIG_USB_CATC is not set
758# CONFIG_USB_KAWETH is not set
759# CONFIG_USB_PEGASUS is not set
760CONFIG_USB_RTL8150=y
761# CONFIG_USB_USBNET is not set
762
763#
764# USB port drivers
765#
766
767#
768# USB Serial Converter support
769#
770# CONFIG_USB_SERIAL is not set
771
772#
773# USB Miscellaneous drivers
774#
775# CONFIG_USB_EMI62 is not set
776# CONFIG_USB_EMI26 is not set
777# CONFIG_USB_AUERSWALD is not set
778# CONFIG_USB_RIO500 is not set
779# CONFIG_USB_LEGOTOWER is not set
780# CONFIG_USB_LCD is not set
781# CONFIG_USB_LED is not set
782# CONFIG_USB_CYTHERM is not set
783# CONFIG_USB_PHIDGETKIT is not set
784# CONFIG_USB_PHIDGETSERVO is not set
785# CONFIG_USB_IDMOUSE is not set
786# CONFIG_USB_TEST is not set
787
788#
789# USB ATM/DSL drivers
790#
791
792#
793# USB Gadget Support
794#
795# CONFIG_USB_GADGET is not set
796 542
797# 543#
798# Kernel hacking 544# Kernel hacking
799# 545#
800# CONFIG_PROFILING is not set 546# CONFIG_PROFILING is not set
801# CONFIG_SYSTEM_PROFILER is not set 547# CONFIG_SYSTEM_PROFILER is not set
802# CONFIG_ETRAX_KGDB is not set 548# CONFIG_PRINTK_TIME is not set
803# CONFIG_DEBUG_INFO is not set 549CONFIG_ENABLE_WARN_DEPRECATED=y
804# CONFIG_FRAME_POINTER is not set 550CONFIG_ENABLE_MUST_CHECK=y
805# CONFIG_DEBUG_NMI_OOPS is not set 551# CONFIG_MAGIC_SYSRQ is not set
552# CONFIG_UNUSED_SYMBOLS is not set
553# CONFIG_DEBUG_FS is not set
554# CONFIG_HEADERS_CHECK is not set
555# CONFIG_DEBUG_KERNEL is not set
556# CONFIG_SLUB_DEBUG_ON is not set
557# CONFIG_SAMPLES is not set
806 558
807# 559#
808# Security options 560# Security options
809# 561#
810# CONFIG_KEYS is not set 562# CONFIG_KEYS is not set
811# CONFIG_SECURITY is not set 563# CONFIG_SECURITY is not set
812 564# CONFIG_SECURITY_FILE_CAPABILITIES is not set
813#
814# Cryptographic options
815#
816# CONFIG_CRYPTO is not set 565# CONFIG_CRYPTO is not set
817 566
818# 567#
819# Hardware crypto devices
820# CONFIG_CRYPTO_HW is not set
821
822#
823# Library routines 568# Library routines
824# 569#
570CONFIG_BITREVERSE=y
825# CONFIG_CRC_CCITT is not set 571# CONFIG_CRC_CCITT is not set
572# CONFIG_CRC16 is not set
573# CONFIG_CRC_ITU_T is not set
826CONFIG_CRC32=y 574CONFIG_CRC32=y
575# CONFIG_CRC7 is not set
827# CONFIG_LIBCRC32C is not set 576# CONFIG_LIBCRC32C is not set
828CONFIG_ZLIB_INFLATE=y 577CONFIG_ZLIB_INFLATE=y
829CONFIG_ZLIB_DEFLATE=y 578CONFIG_ZLIB_DEFLATE=y
579CONFIG_PLIST=y
580CONFIG_HAS_DMA=y
diff --git a/arch/cris/etraxfs_defconfig b/arch/cris/etraxfs_defconfig
new file mode 100644
index 000000000000..73c646a37255
--- /dev/null
+++ b/arch/cris/etraxfs_defconfig
@@ -0,0 +1,585 @@
1#
2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.24-rc3
4# Fri Nov 30 14:24:26 2007
5#
6CONFIG_MMU=y
7CONFIG_ZONE_DMA=y
8CONFIG_RWSEM_GENERIC_SPINLOCK=y
9CONFIG_GENERIC_IOMAP=y
10# CONFIG_ARCH_HAS_ILOG2_U32 is not set
11# CONFIG_ARCH_HAS_ILOG2_U64 is not set
12CONFIG_GENERIC_FIND_NEXT_BIT=y
13CONFIG_GENERIC_HWEIGHT=y
14CONFIG_GENERIC_CALIBRATE_DELAY=y
15CONFIG_NO_IOPORT=y
16CONFIG_FORCE_MAX_ZONEORDER=6
17CONFIG_CRIS=y
18CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
19
20#
21# General setup
22#
23CONFIG_EXPERIMENTAL=y
24CONFIG_BROKEN_ON_SMP=y
25CONFIG_INIT_ENV_ARG_LIMIT=32
26CONFIG_LOCALVERSION=""
27CONFIG_LOCALVERSION_AUTO=y
28# CONFIG_SWAP is not set
29# CONFIG_SYSVIPC is not set
30# CONFIG_POSIX_MQUEUE is not set
31# CONFIG_BSD_PROCESS_ACCT is not set
32# CONFIG_TASKSTATS is not set
33# CONFIG_USER_NS is not set
34# CONFIG_PID_NS is not set
35# CONFIG_AUDIT is not set
36# CONFIG_IKCONFIG is not set
37CONFIG_LOG_BUF_SHIFT=14
38# CONFIG_CGROUPS is not set
39CONFIG_FAIR_GROUP_SCHED=y
40CONFIG_FAIR_USER_SCHED=y
41# CONFIG_FAIR_CGROUP_SCHED is not set
42CONFIG_SYSFS_DEPRECATED=y
43# CONFIG_RELAY is not set
44# CONFIG_BLK_DEV_INITRD is not set
45# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
46CONFIG_SYSCTL=y
47CONFIG_EMBEDDED=y
48CONFIG_UID16=y
49CONFIG_SYSCTL_SYSCALL=y
50# CONFIG_KALLSYMS is not set
51# CONFIG_HOTPLUG is not set
52CONFIG_PRINTK=y
53CONFIG_BUG=y
54CONFIG_ELF_CORE=y
55CONFIG_BASE_FULL=y
56CONFIG_FUTEX=y
57CONFIG_ANON_INODES=y
58CONFIG_EPOLL=y
59CONFIG_SIGNALFD=y
60CONFIG_EVENTFD=y
61CONFIG_SHMEM=y
62CONFIG_VM_EVENT_COUNTERS=y
63CONFIG_SLUB_DEBUG=y
64# CONFIG_SLAB is not set
65CONFIG_SLUB=y
66# CONFIG_SLOB is not set
67CONFIG_RT_MUTEXES=y
68# CONFIG_TINY_SHMEM is not set
69CONFIG_BASE_SMALL=0
70# CONFIG_MODULES is not set
71CONFIG_BLOCK=y
72# CONFIG_LBD is not set
73# CONFIG_BLK_DEV_IO_TRACE is not set
74# CONFIG_LSF is not set
75# CONFIG_BLK_DEV_BSG is not set
76
77#
78# IO Schedulers
79#
80CONFIG_IOSCHED_NOOP=y
81# CONFIG_IOSCHED_AS is not set
82# CONFIG_IOSCHED_DEADLINE is not set
83CONFIG_IOSCHED_CFQ=y
84# CONFIG_DEFAULT_AS is not set
85# CONFIG_DEFAULT_DEADLINE is not set
86CONFIG_DEFAULT_CFQ=y
87# CONFIG_DEFAULT_NOOP is not set
88CONFIG_DEFAULT_IOSCHED="cfq"
89
90#
91# General setup
92#
93CONFIG_BINFMT_ELF=y
94# CONFIG_BINFMT_MISC is not set
95CONFIG_GENERIC_HARDIRQS=y
96CONFIG_ETRAX_CMDLINE="root=/dev/mtdblock3 init=/linuxrc"
97# CONFIG_ETRAX_WATCHDOG is not set
98CONFIG_ETRAX_FAST_TIMER=y
99# CONFIG_ETRAX_KMALLOCED_MODULES is not set
100# CONFIG_OOM_REBOOT is not set
101CONFIG_PREEMPT_NONE=y
102# CONFIG_PREEMPT_VOLUNTARY is not set
103# CONFIG_PREEMPT is not set
104CONFIG_SELECT_MEMORY_MODEL=y
105CONFIG_FLATMEM_MANUAL=y
106# CONFIG_DISCONTIGMEM_MANUAL is not set
107# CONFIG_SPARSEMEM_MANUAL is not set
108CONFIG_FLATMEM=y
109CONFIG_FLAT_NODE_MEM_MAP=y
110# CONFIG_SPARSEMEM_STATIC is not set
111# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
112CONFIG_SPLIT_PTLOCK_CPUS=4
113# CONFIG_RESOURCES_64BIT is not set
114CONFIG_ZONE_DMA_FLAG=1
115CONFIG_BOUNCE=y
116CONFIG_VIRT_TO_BUS=y
117
118#
119# Hardware setup
120#
121# CONFIG_ETRAX100LX is not set
122# CONFIG_ETRAX100LX_V2 is not set
123# CONFIG_SVINTO_SIM is not set
124CONFIG_ETRAXFS=y
125# CONFIG_CRIS_MACH_ARTPEC3 is not set
126# CONFIG_ETRAX_VCS_SIM is not set
127# CONFIG_ETRAX_ARCH_V10 is not set
128CONFIG_ETRAX_ARCH_V32=y
129CONFIG_ETRAX_DRAM_SIZE=32
130CONFIG_ETRAX_FLASH_BUSWIDTH=2
131CONFIG_ETRAX_NANDFLASH_BUSWIDTH=1
132CONFIG_ETRAX_FLASH1_SIZE=4
133CONFIG_ETRAX_DEBUG_PORT0=y
134# CONFIG_ETRAX_DEBUG_PORT1 is not set
135# CONFIG_ETRAX_DEBUG_PORT2 is not set
136# CONFIG_ETRAX_DEBUG_PORT3 is not set
137# CONFIG_ETRAX_DEBUG_PORT_NULL is not set
138CONFIG_ETRAX_DRAM_VIRTUAL_BASE=c0000000
139
140#
141# ETRAX FS options
142#
143CONFIG_ETRAX_SERIAL_PORTS=4
144CONFIG_ETRAX_MEM_GRP1_CONFIG=4044a
145CONFIG_ETRAX_MEM_GRP2_CONFIG=0
146CONFIG_ETRAX_MEM_GRP3_CONFIG=0
147CONFIG_ETRAX_MEM_GRP4_CONFIG=0
148CONFIG_ETRAX_SDRAM_GRP0_CONFIG=336
149CONFIG_ETRAX_SDRAM_GRP1_CONFIG=0
150CONFIG_ETRAX_SDRAM_TIMING=104a
151CONFIG_ETRAX_SDRAM_COMMAND=0
152CONFIG_ETRAX_DEF_GIO_PA_OE=1c
153CONFIG_ETRAX_DEF_GIO_PA_OUT=00
154CONFIG_ETRAX_DEF_GIO_PB_OE=00000
155CONFIG_ETRAX_DEF_GIO_PB_OUT=00000
156CONFIG_ETRAX_DEF_GIO_PC_OE=00000
157CONFIG_ETRAX_DEF_GIO_PC_OUT=00000
158CONFIG_ETRAX_DEF_GIO_PD_OE=00000
159CONFIG_ETRAX_DEF_GIO_PD_OUT=00000
160CONFIG_ETRAX_DEF_GIO_PE_OE=00000
161CONFIG_ETRAX_DEF_GIO_PE_OUT=00000
162# CONFIG_CPU_FREQ is not set
163# CONFIG_ETRAX_NBR_LED_GRP_ZERO is not set
164CONFIG_ETRAX_NBR_LED_GRP_ONE=y
165# CONFIG_ETRAX_NBR_LED_GRP_TWO is not set
166CONFIG_ETRAX_LED_G_NET0="PA3"
167CONFIG_ETRAX_LED_R_NET0="PA4"
168CONFIG_ETRAX_V32_LED2G="PA5"
169CONFIG_ETRAX_V32_LED2R="PA6"
170CONFIG_ETRAX_V32_LED3G="PA7"
171CONFIG_ETRAX_V32_LED3R="PA7"
172
173#
174# Networking
175#
176CONFIG_NET=y
177
178#
179# Networking options
180#
181CONFIG_PACKET=y
182# CONFIG_PACKET_MMAP is not set
183CONFIG_UNIX=y
184CONFIG_XFRM=y
185# CONFIG_XFRM_USER is not set
186# CONFIG_XFRM_SUB_POLICY is not set
187# CONFIG_XFRM_MIGRATE is not set
188# CONFIG_NET_KEY is not set
189CONFIG_INET=y
190# CONFIG_IP_MULTICAST is not set
191# CONFIG_IP_ADVANCED_ROUTER is not set
192CONFIG_IP_FIB_HASH=y
193# CONFIG_IP_PNP is not set
194# CONFIG_NET_IPIP is not set
195# CONFIG_NET_IPGRE is not set
196# CONFIG_ARPD is not set
197# CONFIG_SYN_COOKIES is not set
198# CONFIG_INET_AH is not set
199# CONFIG_INET_ESP is not set
200# CONFIG_INET_IPCOMP is not set
201# CONFIG_INET_XFRM_TUNNEL is not set
202# CONFIG_INET_TUNNEL is not set
203CONFIG_INET_XFRM_MODE_TRANSPORT=y
204CONFIG_INET_XFRM_MODE_TUNNEL=y
205CONFIG_INET_XFRM_MODE_BEET=y
206# CONFIG_INET_LRO is not set
207CONFIG_INET_DIAG=y
208CONFIG_INET_TCP_DIAG=y
209# CONFIG_TCP_CONG_ADVANCED is not set
210CONFIG_TCP_CONG_CUBIC=y
211CONFIG_DEFAULT_TCP_CONG="cubic"
212# CONFIG_TCP_MD5SIG is not set
213# CONFIG_IP_VS is not set
214# CONFIG_IPV6 is not set
215# CONFIG_INET6_XFRM_TUNNEL is not set
216# CONFIG_INET6_TUNNEL is not set
217# CONFIG_NETWORK_SECMARK is not set
218CONFIG_NETFILTER=y
219# CONFIG_NETFILTER_DEBUG is not set
220
221#
222# Core Netfilter Configuration
223#
224# CONFIG_NETFILTER_NETLINK is not set
225# CONFIG_NF_CONNTRACK_ENABLED is not set
226# CONFIG_NF_CONNTRACK is not set
227# CONFIG_NETFILTER_XTABLES is not set
228
229#
230# IP: Netfilter Configuration
231#
232# CONFIG_IP_NF_QUEUE is not set
233# CONFIG_IP_NF_IPTABLES is not set
234# CONFIG_IP_NF_ARPTABLES is not set
235# CONFIG_IP_DCCP is not set
236# CONFIG_IP_SCTP is not set
237# CONFIG_TIPC is not set
238# CONFIG_ATM is not set
239# CONFIG_BRIDGE is not set
240# CONFIG_VLAN_8021Q is not set
241# CONFIG_DECNET is not set
242# CONFIG_LLC2 is not set
243# CONFIG_IPX is not set
244# CONFIG_ATALK is not set
245# CONFIG_X25 is not set
246# CONFIG_LAPB is not set
247# CONFIG_ECONET is not set
248# CONFIG_WAN_ROUTER is not set
249# CONFIG_NET_SCHED is not set
250
251#
252# Network testing
253#
254# CONFIG_NET_PKTGEN is not set
255# CONFIG_HAMRADIO is not set
256# CONFIG_IRDA is not set
257# CONFIG_BT is not set
258# CONFIG_AF_RXRPC is not set
259
260#
261# Wireless
262#
263# CONFIG_CFG80211 is not set
264# CONFIG_WIRELESS_EXT is not set
265# CONFIG_MAC80211 is not set
266# CONFIG_IEEE80211 is not set
267# CONFIG_RFKILL is not set
268# CONFIG_NET_9P is not set
269
270#
271# Drivers for built-in interfaces
272#
273CONFIG_ETRAX_ETHERNET=y
274# CONFIG_ETRAX_IDE is not set
275CONFIG_ETRAX_AXISFLASHMAP=y
276CONFIG_ETRAX_PTABLE_SECTOR=65536
277# CONFIG_ETRAX_I2C is not set
278# CONFIG_ETRAX_GPIO is not set
279# CONFIG_ETRAX_NO_PHY is not set
280# CONFIG_ETRAX_ETHERNET_IFACE0 is not set
281# CONFIG_ETRAX_ETHERNET_IFACE1 is not set
282# CONFIG_ETRAXFS_SERIAL is not set
283# CONFIG_ETRAX_SYNCHRONOUS_SERIAL is not set
284# CONFIG_ETRAX_AXISFLASHMAP_MTD0WHOLE is not set
285# CONFIG_ETRAX_NANDFLASH is not set
286# CONFIG_ETRAX_CARDBUS is not set
287# CONFIG_ETRAX_IOP_FW_LOAD is not set
288# CONFIG_ETRAX_STREAMCOPROC is not set
289# CONFIG_ETRAX_SPI_MMC is not set
290# CONFIG_ETRAX_SPI_MMC_BOARD is not set
291# CONFIG_ETRAX_NETWORK_LED_ON_WHEN_LINK is not set
292CONFIG_ETRAX_NETWORK_LED_ON_WHEN_ACTIVITY=y
293
294#
295# Generic Driver Options
296#
297CONFIG_STANDALONE=y
298CONFIG_PREVENT_FIRMWARE_BUILD=y
299# CONFIG_SYS_HYPERVISOR is not set
300CONFIG_MTD=y
301# CONFIG_MTD_DEBUG is not set
302CONFIG_MTD_CONCAT=y
303CONFIG_MTD_PARTITIONS=y
304# CONFIG_MTD_REDBOOT_PARTS is not set
305# CONFIG_MTD_CMDLINE_PARTS is not set
306
307#
308# User Modules And Translation Layers
309#
310CONFIG_MTD_CHAR=y
311CONFIG_MTD_BLKDEVS=y
312CONFIG_MTD_BLOCK=y
313# CONFIG_FTL is not set
314# CONFIG_NFTL is not set
315# CONFIG_INFTL is not set
316# CONFIG_RFD_FTL is not set
317# CONFIG_SSFDC is not set
318# CONFIG_MTD_OOPS is not set
319
320#
321# RAM/ROM/Flash chip drivers
322#
323CONFIG_MTD_CFI=y
324CONFIG_MTD_JEDECPROBE=y
325CONFIG_MTD_GEN_PROBE=y
326# CONFIG_MTD_CFI_ADV_OPTIONS is not set
327CONFIG_MTD_MAP_BANK_WIDTH_1=y
328CONFIG_MTD_MAP_BANK_WIDTH_2=y
329CONFIG_MTD_MAP_BANK_WIDTH_4=y
330# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
331# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
332# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
333CONFIG_MTD_CFI_I1=y
334CONFIG_MTD_CFI_I2=y
335# CONFIG_MTD_CFI_I4 is not set
336# CONFIG_MTD_CFI_I8 is not set
337# CONFIG_MTD_CFI_INTELEXT is not set
338CONFIG_MTD_CFI_AMDSTD=y
339# CONFIG_MTD_CFI_STAA is not set
340CONFIG_MTD_CFI_UTIL=y
341CONFIG_MTD_RAM=y
342# CONFIG_MTD_ROM is not set
343# CONFIG_MTD_ABSENT is not set
344
345#
346# Mapping drivers for chip access
347#
348CONFIG_MTD_COMPLEX_MAPPINGS=y
349# CONFIG_MTD_PHYSMAP is not set
350# CONFIG_MTD_PLATRAM is not set
351
352#
353# Self-contained MTD device drivers
354#
355# CONFIG_MTD_SLRAM is not set
356# CONFIG_MTD_PHRAM is not set
357CONFIG_MTD_MTDRAM=y
358CONFIG_MTDRAM_TOTAL_SIZE=0
359CONFIG_MTDRAM_ERASE_SIZE=64
360CONFIG_MTDRAM_ABS_POS=0x0
361# CONFIG_MTD_BLOCK2MTD is not set
362
363#
364# Disk-On-Chip Device Drivers
365#
366# CONFIG_MTD_DOC2000 is not set
367# CONFIG_MTD_DOC2001 is not set
368# CONFIG_MTD_DOC2001PLUS is not set
369# CONFIG_MTD_NAND is not set
370# CONFIG_MTD_ONENAND is not set
371
372#
373# UBI - Unsorted block images
374#
375# CONFIG_MTD_UBI is not set
376CONFIG_BLK_DEV=y
377# CONFIG_BLK_DEV_COW_COMMON is not set
378# CONFIG_BLK_DEV_LOOP is not set
379# CONFIG_BLK_DEV_NBD is not set
380CONFIG_BLK_DEV_RAM=y
381CONFIG_BLK_DEV_RAM_COUNT=16
382CONFIG_BLK_DEV_RAM_SIZE=4096
383CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
384# CONFIG_CDROM_PKTCDVD is not set
385# CONFIG_ATA_OVER_ETH is not set
386CONFIG_NETDEVICES=y
387# CONFIG_NETDEVICES_MULTIQUEUE is not set
388# CONFIG_DUMMY is not set
389# CONFIG_BONDING is not set
390# CONFIG_MACVLAN is not set
391# CONFIG_EQUALIZER is not set
392# CONFIG_TUN is not set
393# CONFIG_VETH is not set
394# CONFIG_PHYLIB is not set
395CONFIG_NET_ETHERNET=y
396CONFIG_MII=y
397# CONFIG_IBM_NEW_EMAC_ZMII is not set
398# CONFIG_IBM_NEW_EMAC_RGMII is not set
399# CONFIG_IBM_NEW_EMAC_TAH is not set
400# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
401CONFIG_NETDEV_1000=y
402CONFIG_NETDEV_10000=y
403
404#
405# Wireless LAN
406#
407# CONFIG_WLAN_PRE80211 is not set
408# CONFIG_WLAN_80211 is not set
409# CONFIG_WAN is not set
410# CONFIG_PPP is not set
411# CONFIG_SLIP is not set
412# CONFIG_SHAPER is not set
413# CONFIG_NETCONSOLE is not set
414# CONFIG_NETPOLL is not set
415# CONFIG_NET_POLL_CONTROLLER is not set
416# CONFIG_RTC_CLASS is not set
417
418#
419# Input device support
420#
421# CONFIG_INPUT is not set
422
423#
424# Hardware I/O ports
425#
426CONFIG_SERIO=y
427# CONFIG_SERIO_I8042 is not set
428# CONFIG_SERIO_SERPORT is not set
429# CONFIG_SERIO_LIBPS2 is not set
430# CONFIG_SERIO_RAW is not set
431# CONFIG_GAMEPORT is not set
432
433#
434# Character devices
435#
436# CONFIG_VT is not set
437CONFIG_UNIX98_PTYS=y
438CONFIG_LEGACY_PTYS=y
439CONFIG_LEGACY_PTY_COUNT=256
440CONFIG_HW_RANDOM=y
441# CONFIG_RTC is not set
442# CONFIG_GEN_RTC is not set
443# CONFIG_R3964 is not set
444# CONFIG_RAW_DRIVER is not set
445
446#
447# File systems
448#
449# CONFIG_EXT2_FS is not set
450# CONFIG_EXT3_FS is not set
451# CONFIG_EXT4DEV_FS is not set
452# CONFIG_REISERFS_FS is not set
453# CONFIG_JFS_FS is not set
454# CONFIG_FS_POSIX_ACL is not set
455# CONFIG_XFS_FS is not set
456# CONFIG_GFS2_FS is not set
457# CONFIG_OCFS2_FS is not set
458# CONFIG_MINIX_FS is not set
459# CONFIG_ROMFS_FS is not set
460CONFIG_INOTIFY=y
461CONFIG_INOTIFY_USER=y
462# CONFIG_QUOTA is not set
463CONFIG_DNOTIFY=y
464# CONFIG_AUTOFS_FS is not set
465# CONFIG_AUTOFS4_FS is not set
466# CONFIG_FUSE_FS is not set
467
468#
469# CD-ROM/DVD Filesystems
470#
471# CONFIG_ISO9660_FS is not set
472# CONFIG_UDF_FS is not set
473
474#
475# DOS/FAT/NT Filesystems
476#
477# CONFIG_MSDOS_FS is not set
478# CONFIG_VFAT_FS is not set
479# CONFIG_NTFS_FS is not set
480
481#
482# Pseudo filesystems
483#
484CONFIG_PROC_FS=y
485CONFIG_PROC_KCORE=y
486CONFIG_PROC_SYSCTL=y
487CONFIG_SYSFS=y
488CONFIG_TMPFS=y
489# CONFIG_TMPFS_POSIX_ACL is not set
490# CONFIG_HUGETLB_PAGE is not set
491# CONFIG_CONFIGFS_FS is not set
492
493#
494# Miscellaneous filesystems
495#
496# CONFIG_ADFS_FS is not set
497# CONFIG_AFFS_FS is not set
498# CONFIG_HFS_FS is not set
499# CONFIG_HFSPLUS_FS is not set
500# CONFIG_BEFS_FS is not set
501# CONFIG_BFS_FS is not set
502# CONFIG_EFS_FS is not set
503CONFIG_JFFS2_FS=y
504CONFIG_JFFS2_FS_DEBUG=0
505CONFIG_JFFS2_FS_WRITEBUFFER=y
506# CONFIG_JFFS2_FS_WBUF_VERIFY is not set
507# CONFIG_JFFS2_SUMMARY is not set
508# CONFIG_JFFS2_FS_XATTR is not set
509# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
510CONFIG_JFFS2_ZLIB=y
511# CONFIG_JFFS2_LZO is not set
512CONFIG_JFFS2_RTIME=y
513# CONFIG_JFFS2_RUBIN is not set
514CONFIG_CRAMFS=y
515# CONFIG_VXFS_FS is not set
516# CONFIG_HPFS_FS is not set
517# CONFIG_QNX4FS_FS is not set
518# CONFIG_SYSV_FS is not set
519# CONFIG_UFS_FS is not set
520CONFIG_NETWORK_FILESYSTEMS=y
521CONFIG_NFS_FS=y
522CONFIG_NFS_V3=y
523# CONFIG_NFS_V3_ACL is not set
524# CONFIG_NFS_V4 is not set
525# CONFIG_NFS_DIRECTIO is not set
526# CONFIG_NFSD is not set
527CONFIG_LOCKD=y
528CONFIG_LOCKD_V4=y
529CONFIG_NFS_COMMON=y
530CONFIG_SUNRPC=y
531# CONFIG_SUNRPC_BIND34 is not set
532# CONFIG_RPCSEC_GSS_KRB5 is not set
533# CONFIG_RPCSEC_GSS_SPKM3 is not set
534# CONFIG_SMB_FS is not set
535# CONFIG_CIFS is not set
536# CONFIG_NCP_FS is not set
537# CONFIG_CODA_FS is not set
538# CONFIG_AFS_FS is not set
539
540#
541# Partition Types
542#
543# CONFIG_PARTITION_ADVANCED is not set
544CONFIG_MSDOS_PARTITION=y
545# CONFIG_NLS is not set
546# CONFIG_DLM is not set
547
548#
549# Kernel hacking
550#
551# CONFIG_PROFILING is not set
552# CONFIG_SYSTEM_PROFILER is not set
553# CONFIG_PRINTK_TIME is not set
554CONFIG_ENABLE_WARN_DEPRECATED=y
555CONFIG_ENABLE_MUST_CHECK=y
556# CONFIG_MAGIC_SYSRQ is not set
557# CONFIG_UNUSED_SYMBOLS is not set
558# CONFIG_DEBUG_FS is not set
559# CONFIG_HEADERS_CHECK is not set
560# CONFIG_DEBUG_KERNEL is not set
561# CONFIG_SLUB_DEBUG_ON is not set
562# CONFIG_SAMPLES is not set
563
564#
565# Security options
566#
567# CONFIG_KEYS is not set
568# CONFIG_SECURITY is not set
569# CONFIG_SECURITY_FILE_CAPABILITIES is not set
570# CONFIG_CRYPTO is not set
571
572#
573# Library routines
574#
575CONFIG_BITREVERSE=y
576# CONFIG_CRC_CCITT is not set
577# CONFIG_CRC16 is not set
578# CONFIG_CRC_ITU_T is not set
579CONFIG_CRC32=y
580# CONFIG_CRC7 is not set
581# CONFIG_LIBCRC32C is not set
582CONFIG_ZLIB_INFLATE=y
583CONFIG_ZLIB_DEFLATE=y
584CONFIG_PLIST=y
585CONFIG_HAS_DMA=y
diff --git a/arch/cris/kernel/module.c b/arch/cris/kernel/module.c
index 11b867df8617..a187833febc8 100644
--- a/arch/cris/kernel/module.c
+++ b/arch/cris/kernel/module.c
@@ -28,20 +28,28 @@
28#define DEBUGP(fmt , ...) 28#define DEBUGP(fmt , ...)
29#endif 29#endif
30 30
31#ifdef CONFIG_ETRAX_KMALLOCED_MODULES
32#define MALLOC_MODULE(size) kmalloc(size, GFP_KERNEL)
33#define FREE_MODULE(region) kfree(region)
34#else
35#define MALLOC_MODULE(size) vmalloc_exec(size)
36#define FREE_MODULE(region) vfree(region)
37#endif
38
31void *module_alloc(unsigned long size) 39void *module_alloc(unsigned long size)
32{ 40{
33 if (size == 0) 41 if (size == 0)
34 return NULL; 42 return NULL;
35 return vmalloc_exec(size); 43 return MALLOC_MODULE(size);
36} 44}
37 45
38 46
39/* Free memory returned from module_alloc */ 47/* Free memory returned from module_alloc */
40void module_free(struct module *mod, void *module_region) 48void module_free(struct module *mod, void *module_region)
41{ 49{
42 vfree(module_region); 50 FREE_MODULE(module_region);
43 /* FIXME: If module_region == mod->init_region, trim exception 51 /* FIXME: If module_region == mod->init_region, trim exception
44 table entries. */ 52 table entries. */
45} 53}
46 54
47/* We don't need anything special. */ 55/* We don't need anything special. */
diff --git a/arch/cris/kernel/process.c b/arch/cris/kernel/process.c
index 9ca558fc5bc8..ef2db8fd102a 100644
--- a/arch/cris/kernel/process.c
+++ b/arch/cris/kernel/process.c
@@ -1,5 +1,4 @@
1/* $Id: process.c,v 1.21 2005/03/04 08:16:17 starvik Exp $ 1/*
2 *
3 * linux/arch/cris/kernel/process.c 2 * linux/arch/cris/kernel/process.c
4 * 3 *
5 * Copyright (C) 1995 Linus Torvalds 4 * Copyright (C) 1995 Linus Torvalds
@@ -7,105 +6,6 @@
7 * 6 *
8 * Authors: Bjorn Wesen (bjornw@axis.com) 7 * Authors: Bjorn Wesen (bjornw@axis.com)
9 * 8 *
10 * $Log: process.c,v $
11 * Revision 1.21 2005/03/04 08:16:17 starvik
12 * Merge of Linux 2.6.11.
13 *
14 * Revision 1.20 2005/01/18 05:57:22 starvik
15 * Renamed hlt_counter to cris_hlt_counter and made it global.
16 *
17 * Revision 1.19 2004/10/19 13:07:43 starvik
18 * Merge of Linux 2.6.9
19 *
20 * Revision 1.18 2004/08/16 12:37:23 starvik
21 * Merge of Linux 2.6.8
22 *
23 * Revision 1.17 2004/04/05 13:53:48 starvik
24 * Merge of Linux 2.6.5
25 *
26 * Revision 1.16 2003/10/27 08:04:33 starvik
27 * Merge of Linux 2.6.0-test9
28 *
29 * Revision 1.15 2003/09/11 07:29:52 starvik
30 * Merge of Linux 2.6.0-test5
31 *
32 * Revision 1.14 2003/06/10 10:21:12 johana
33 * Moved thread_saved_pc() from arch/cris/kernel/process.c to
34 * subarch specific process.c. arch-v32 has an erp, no irp.
35 *
36 * Revision 1.13 2003/04/09 05:20:47 starvik
37 * Merge of Linux 2.5.67
38 *
39 * Revision 1.12 2002/12/11 15:41:11 starvik
40 * Extracted v10 (ETRAX 100LX) specific stuff to arch/cris/arch-v10/kernel
41 *
42 * Revision 1.11 2002/12/10 09:00:10 starvik
43 * Merge of Linux 2.5.51
44 *
45 * Revision 1.10 2002/11/27 08:42:34 starvik
46 * Argument to user_regs() is thread_info*
47 *
48 * Revision 1.9 2002/11/26 09:44:21 starvik
49 * New threads exits through ret_from_fork (necessary for preemptive scheduling)
50 *
51 * Revision 1.8 2002/11/19 14:35:24 starvik
52 * Changes from linux 2.4
53 * Changed struct initializer syntax to the currently prefered notation
54 *
55 * Revision 1.7 2002/11/18 07:39:42 starvik
56 * thread_saved_pc moved here from processor.h
57 *
58 * Revision 1.6 2002/11/14 06:51:27 starvik
59 * Made cpu_idle more similar with other archs
60 * init_task_union -> init_thread_union
61 * Updated for new interrupt macros
62 * sys_clone and do_fork have a new argument, user_tid
63 *
64 * Revision 1.5 2002/11/05 06:45:11 starvik
65 * Merge of Linux 2.5.45
66 *
67 * Revision 1.4 2002/02/05 15:37:44 bjornw
68 * Need init_task.h
69 *
70 * Revision 1.3 2002/01/21 15:22:49 bjornw
71 * current->counter is gone
72 *
73 * Revision 1.22 2001/11/13 09:40:43 orjanf
74 * Added dump_fpu (needed for core dumps).
75 *
76 * Revision 1.21 2001/11/12 18:26:21 pkj
77 * Fixed compiler warnings.
78 *
79 * Revision 1.20 2001/10/03 08:21:39 jonashg
80 * cause_of_death does not exist if CONFIG_SVINTO_SIM is defined.
81 *
82 * Revision 1.19 2001/09/26 11:52:54 bjornw
83 * INIT_MMAP is gone in 2.4.10
84 *
85 * Revision 1.18 2001/08/21 21:43:51 hp
86 * Move last watchdog fix inside #ifdef CONFIG_ETRAX_WATCHDOG
87 *
88 * Revision 1.17 2001/08/21 13:48:01 jonashg
89 * Added fix by HP to avoid oops when doing a hard_reset_now.
90 *
91 * Revision 1.16 2001/06/21 02:00:40 hp
92 * * entry.S: Include asm/unistd.h.
93 * (_sys_call_table): Use section .rodata, not .data.
94 * (_kernel_thread): Move from...
95 * * process.c: ... here.
96 * * entryoffsets.c (VAL): Break out from...
97 * (OF): Use VAL.
98 * (LCLONE_VM): New asmified value from CLONE_VM.
99 *
100 * Revision 1.15 2001/06/20 16:31:57 hp
101 * Add comments to describe empty functions according to review.
102 *
103 * Revision 1.14 2001/05/29 11:27:59 markusl
104 * Fixed so that hard_reset_now will do reset even if watchdog wasn't enabled
105 *
106 * Revision 1.13 2001/03/20 19:44:06 bjornw
107 * Use the 7th syscall argument for regs instead of current_regs
108 *
109 */ 9 */
110 10
111/* 11/*
@@ -206,6 +106,7 @@ EXPORT_SYMBOL(pm_power_off);
206 * low exit latency (ie sit in a loop waiting for 106 * low exit latency (ie sit in a loop waiting for
207 * somebody to say that they'd like to reschedule) 107 * somebody to say that they'd like to reschedule)
208 */ 108 */
109
209void cpu_idle (void) 110void cpu_idle (void)
210{ 111{
211 /* endless idle loop with no priority at all */ 112 /* endless idle loop with no priority at all */
diff --git a/arch/cris/kernel/ptrace.c b/arch/cris/kernel/ptrace.c
index 3ccd20e85dce..b326023baab2 100644
--- a/arch/cris/kernel/ptrace.c
+++ b/arch/cris/kernel/ptrace.c
@@ -2,65 +2,11 @@
2 * linux/arch/cris/kernel/ptrace.c 2 * linux/arch/cris/kernel/ptrace.c
3 * 3 *
4 * Parts taken from the m68k port. 4 * Parts taken from the m68k port.
5 * 5 *
6 * Copyright (c) 2000, 2001, 2002 Axis Communications AB 6 * Copyright (c) 2000, 2001, 2002 Axis Communications AB
7 * 7 *
8 * Authors: Bjorn Wesen 8 * Authors: Bjorn Wesen
9 * 9 *
10 * $Log: ptrace.c,v $
11 * Revision 1.10 2004/09/22 11:50:01 orjanf
12 * * Moved get_reg/put_reg to arch-specific files.
13 * * Added functions to access debug registers (CRISv32).
14 * * Added support for PTRACE_SINGLESTEP (CRISv32).
15 * * Added S flag to CCS_MASK (CRISv32).
16 *
17 * Revision 1.9 2003/07/04 12:56:11 tobiasa
18 * Moved arch-specific code to arch-specific files.
19 *
20 * Revision 1.8 2003/04/09 05:20:47 starvik
21 * Merge of Linux 2.5.67
22 *
23 * Revision 1.7 2002/11/27 08:42:34 starvik
24 * Argument to user_regs() is thread_info*
25 *
26 * Revision 1.6 2002/11/20 11:56:11 starvik
27 * Merge of Linux 2.5.48
28 *
29 * Revision 1.5 2002/11/18 07:41:19 starvik
30 * Removed warning
31 *
32 * Revision 1.4 2002/11/11 12:47:28 starvik
33 * SYSCALL_TRACE has been moved to thread flags
34 *
35 * Revision 1.3 2002/02/05 15:37:18 bjornw
36 * * Add do_notify_resume (replaces do_signal in the callchain)
37 * * syscall_trace is now do_syscall_trace
38 * * current->ptrace flag PT_TRACESYS -> PT_SYSCALLTRACE
39 * * Keep track of the current->work.syscall_trace counter
40 *
41 * Revision 1.2 2001/12/18 13:35:20 bjornw
42 * Applied the 2.4.13->2.4.16 CRIS patch to 2.5.1 (is a copy of 2.4.15).
43 *
44 * Revision 1.8 2001/11/12 18:26:21 pkj
45 * Fixed compiler warnings.
46 *
47 * Revision 1.7 2001/09/26 11:53:49 bjornw
48 * PTRACE_DETACH works more simple in 2.4.10
49 *
50 * Revision 1.6 2001/07/25 16:08:47 bjornw
51 * PTRACE_ATTACH bulk moved into arch-independent code in 2.4.7
52 *
53 * Revision 1.5 2001/03/26 14:24:28 orjanf
54 * * Changed loop condition.
55 * * Added comment documenting non-standard ptrace behaviour.
56 *
57 * Revision 1.4 2001/03/20 19:44:41 bjornw
58 * Use the user_regs macro instead of thread.esp0
59 *
60 * Revision 1.3 2000/12/18 23:45:25 bjornw
61 * Linux/CRIS first version
62 *
63 *
64 */ 10 */
65 11
66#include <linux/kernel.h> 12#include <linux/kernel.h>
@@ -85,7 +31,7 @@ extern int do_signal(int canrestart, struct pt_regs *regs);
85 31
86 32
87void do_notify_resume(int canrestart, struct pt_regs *regs, 33void do_notify_resume(int canrestart, struct pt_regs *regs,
88 __u32 thread_info_flags ) 34 __u32 thread_info_flags)
89{ 35{
90 /* deal with pending signal delivery */ 36 /* deal with pending signal delivery */
91 if (thread_info_flags & _TIF_SIGPENDING) 37 if (thread_info_flags & _TIF_SIGPENDING)
diff --git a/arch/cris/kernel/semaphore.c b/arch/cris/kernel/semaphore.c
index b884263d3cd4..f137a439041f 100644
--- a/arch/cris/kernel/semaphore.c
+++ b/arch/cris/kernel/semaphore.c
@@ -4,7 +4,6 @@
4 */ 4 */
5 5
6#include <linux/sched.h> 6#include <linux/sched.h>
7#include <linux/init.h>
8#include <asm/semaphore-helper.h> 7#include <asm/semaphore-helper.h>
9 8
10/* 9/*
diff --git a/arch/cris/kernel/setup.c b/arch/cris/kernel/setup.c
index 4da042e100a0..04d48dd91ddf 100644
--- a/arch/cris/kernel/setup.c
+++ b/arch/cris/kernel/setup.c
@@ -18,7 +18,7 @@
18#include <linux/screen_info.h> 18#include <linux/screen_info.h>
19#include <linux/utsname.h> 19#include <linux/utsname.h>
20#include <linux/pfn.h> 20#include <linux/pfn.h>
21 21#include <linux/cpu.h>
22#include <asm/setup.h> 22#include <asm/setup.h>
23 23
24/* 24/*
@@ -36,6 +36,8 @@ extern unsigned long dram_start, dram_end;
36 36
37extern unsigned long romfs_start, romfs_length, romfs_in_flash; /* from head.S */ 37extern unsigned long romfs_start, romfs_length, romfs_in_flash; /* from head.S */
38 38
39static struct cpu cpu_devices[NR_CPUS];
40
39extern void show_etrax_copyright(void); /* arch-vX/kernel/setup.c */ 41extern void show_etrax_copyright(void); /* arch-vX/kernel/setup.c */
40 42
41/* This mainly sets up the memory area, and can be really confusing. 43/* This mainly sets up the memory area, and can be really confusing.
@@ -45,24 +47,23 @@ extern void show_etrax_copyright(void); /* arch-vX/kernel/setup.c */
45 * given by the macro __pa(). 47 * given by the macro __pa().
46 * 48 *
47 * In this DRAM, the kernel code and data is loaded, in the beginning. 49 * In this DRAM, the kernel code and data is loaded, in the beginning.
48 * It really starts at c0004000 to make room for some special pages - 50 * It really starts at c0004000 to make room for some special pages -
49 * the start address is text_start. The kernel data ends at _end. After 51 * the start address is text_start. The kernel data ends at _end. After
50 * this the ROM filesystem is appended (if there is any). 52 * this the ROM filesystem is appended (if there is any).
51 * 53 *
52 * Between this address and dram_end, we have RAM pages usable to the 54 * Between this address and dram_end, we have RAM pages usable to the
53 * boot code and the system. 55 * boot code and the system.
54 * 56 *
55 */ 57 */
56 58
57void __init 59void __init setup_arch(char **cmdline_p)
58setup_arch(char **cmdline_p)
59{ 60{
60 extern void init_etrax_debug(void); 61 extern void init_etrax_debug(void);
61 unsigned long bootmap_size; 62 unsigned long bootmap_size;
62 unsigned long start_pfn, max_pfn; 63 unsigned long start_pfn, max_pfn;
63 unsigned long memory_start; 64 unsigned long memory_start;
64 65
65 /* register an initial console printing routine for printk's */ 66 /* register an initial console printing routine for printk's */
66 67
67 init_etrax_debug(); 68 init_etrax_debug();
68 69
@@ -121,7 +122,7 @@ setup_arch(char **cmdline_p)
121 min_low_pfn = PAGE_OFFSET >> PAGE_SHIFT; 122 min_low_pfn = PAGE_OFFSET >> PAGE_SHIFT;
122 123
123 bootmap_size = init_bootmem_node(NODE_DATA(0), start_pfn, 124 bootmap_size = init_bootmem_node(NODE_DATA(0), start_pfn,
124 min_low_pfn, 125 min_low_pfn,
125 max_low_pfn); 126 max_low_pfn);
126 127
127 /* And free all memory not belonging to the kernel (addr, size) */ 128 /* And free all memory not belonging to the kernel (addr, size) */
@@ -180,11 +181,23 @@ static void c_stop(struct seq_file *m, void *v)
180 181
181extern int show_cpuinfo(struct seq_file *m, void *v); 182extern int show_cpuinfo(struct seq_file *m, void *v);
182 183
183struct seq_operations cpuinfo_op = { 184const struct seq_operations cpuinfo_op = {
184 .start = c_start, 185 .start = c_start,
185 .next = c_next, 186 .next = c_next,
186 .stop = c_stop, 187 .stop = c_stop,
187 .show = show_cpuinfo, 188 .show = show_cpuinfo,
188}; 189};
189 190
191static int __init topology_init(void)
192{
193 int i;
194
195 for_each_possible_cpu(i) {
196 return register_cpu(&cpu_devices[i], i);
197 }
198
199 return 0;
200}
201
202subsys_initcall(topology_init);
190 203
diff --git a/arch/cris/kernel/time.c b/arch/cris/kernel/time.c
index 7a2cc7efbcf8..ff4c6aa75def 100644
--- a/arch/cris/kernel/time.c
+++ b/arch/cris/kernel/time.c
@@ -1,5 +1,4 @@
1/* $Id: time.c,v 1.18 2005/03/04 08:16:17 starvik Exp $ 1/*
2 *
3 * linux/arch/cris/kernel/time.c 2 * linux/arch/cris/kernel/time.c
4 * 3 *
5 * Copyright (C) 1991, 1992, 1995 Linus Torvalds 4 * Copyright (C) 1991, 1992, 1995 Linus Torvalds
@@ -18,7 +17,7 @@
18 * Linux/CRIS specific code: 17 * Linux/CRIS specific code:
19 * 18 *
20 * Authors: Bjorn Wesen 19 * Authors: Bjorn Wesen
21 * Johan Adolfsson 20 * Johan Adolfsson
22 * 21 *
23 */ 22 */
24 23
@@ -208,10 +207,16 @@ cris_do_profile(struct pt_regs* regs)
208#endif 207#endif
209 208
210#ifdef CONFIG_PROFILING 209#ifdef CONFIG_PROFILING
211 profile_tick(CPU_PROFILING); 210 profile_tick(CPU_PROFILING);
212#endif 211#endif
213} 212}
214 213
214unsigned long long sched_clock(void)
215{
216 return (unsigned long long)jiffies * (1000000000 / HZ) +
217 get_ns_in_jiffie();
218}
219
215static int 220static int
216__init init_udelay(void) 221__init init_udelay(void)
217{ 222{
diff --git a/arch/cris/kernel/traps.c b/arch/cris/kernel/traps.c
index 520d92205fed..541efbf09371 100644
--- a/arch/cris/kernel/traps.c
+++ b/arch/cris/kernel/traps.c
@@ -1,66 +1,78 @@
1/* $Id: traps.c,v 1.11 2005/01/24 16:03:19 orjanf Exp $ 1/*
2 *
3 * linux/arch/cris/traps.c 2 * linux/arch/cris/traps.c
4 * 3 *
5 * Here we handle the break vectors not used by the system call 4 * Here we handle the break vectors not used by the system call
6 * mechanism, as well as some general stack/register dumping 5 * mechanism, as well as some general stack/register dumping
7 * things. 6 * things.
8 * 7 *
9 * Copyright (C) 2000-2002 Axis Communications AB 8 * Copyright (C) 2000-2007 Axis Communications AB
10 * 9 *
11 * Authors: Bjorn Wesen 10 * Authors: Bjorn Wesen
12 * Hans-Peter Nilsson 11 * Hans-Peter Nilsson
13 * 12 *
14 */ 13 */
15 14
16#include <linux/init.h> 15#include <linux/init.h>
17#include <linux/module.h> 16#include <linux/module.h>
17
18#include <asm/pgtable.h> 18#include <asm/pgtable.h>
19#include <asm/uaccess.h> 19#include <asm/uaccess.h>
20 20
21extern void arch_enable_nmi(void);
22extern void stop_watchdog(void);
23extern void reset_watchdog(void);
24extern void show_registers(struct pt_regs *regs);
25
26#ifdef CONFIG_DEBUG_BUGVERBOSE
27extern void handle_BUG(struct pt_regs *regs);
28#else
29#define handle_BUG(regs)
30#endif
31
21static int kstack_depth_to_print = 24; 32static int kstack_depth_to_print = 24;
22 33
23extern int raw_printk(const char *fmt, ...); 34void (*nmi_handler)(struct pt_regs *);
24 35
25void show_trace(unsigned long * stack) 36void
37show_trace(unsigned long *stack)
26{ 38{
27 unsigned long addr, module_start, module_end; 39 unsigned long addr, module_start, module_end;
28 extern char _stext, _etext; 40 extern char _stext, _etext;
29 int i; 41 int i;
30 42
31 raw_printk("\nCall Trace: "); 43 printk("\nCall Trace: ");
32 44
33 i = 1; 45 i = 1;
34 module_start = VMALLOC_START; 46 module_start = VMALLOC_START;
35 module_end = VMALLOC_END; 47 module_end = VMALLOC_END;
36 48
37 while (((long) stack & (THREAD_SIZE-1)) != 0) { 49 while (((long)stack & (THREAD_SIZE-1)) != 0) {
38 if (__get_user (addr, stack)) { 50 if (__get_user(addr, stack)) {
39 /* This message matches "failing address" marked 51 /* This message matches "failing address" marked
40 s390 in ksymoops, so lines containing it will 52 s390 in ksymoops, so lines containing it will
41 not be filtered out by ksymoops. */ 53 not be filtered out by ksymoops. */
42 raw_printk ("Failing address 0x%lx\n", (unsigned long)stack); 54 printk("Failing address 0x%lx\n", (unsigned long)stack);
43 break; 55 break;
44 } 56 }
45 stack++; 57 stack++;
46 58
47 /* 59 /*
48 * If the address is either in the text segment of the 60 * If the address is either in the text segment of the
49 * kernel, or in the region which contains vmalloc'ed 61 * kernel, or in the region which contains vmalloc'ed
50 * memory, it *may* be the address of a calling 62 * memory, it *may* be the address of a calling
51 * routine; if so, print it so that someone tracing 63 * routine; if so, print it so that someone tracing
52 * down the cause of the crash will be able to figure 64 * down the cause of the crash will be able to figure
53 * out the call path that was taken. 65 * out the call path that was taken.
54 */ 66 */
55 if (((addr >= (unsigned long) &_stext) && 67 if (((addr >= (unsigned long)&_stext) &&
56 (addr <= (unsigned long) &_etext)) || 68 (addr <= (unsigned long)&_etext)) ||
57 ((addr >= module_start) && (addr <= module_end))) { 69 ((addr >= module_start) && (addr <= module_end))) {
58 if (i && ((i % 8) == 0)) 70 if (i && ((i % 8) == 0))
59 raw_printk("\n "); 71 printk("\n ");
60 raw_printk("[<%08lx>] ", addr); 72 printk("[<%08lx>] ", addr);
61 i++; 73 i++;
62 } 74 }
63 } 75 }
64} 76}
65 77
66/* 78/*
@@ -78,109 +90,149 @@ void show_trace(unsigned long * stack)
78 * with the ksymoops maintainer. 90 * with the ksymoops maintainer.
79 */ 91 */
80 92
81void 93void
82show_stack(struct task_struct *task, unsigned long *sp) 94show_stack(struct task_struct *task, unsigned long *sp)
83{ 95{
84 unsigned long *stack, addr; 96 unsigned long *stack, addr;
85 int i; 97 int i;
86 98
87 /* 99 /*
88 * debugging aid: "show_stack(NULL);" prints a 100 * debugging aid: "show_stack(NULL);" prints a
89 * back trace. 101 * back trace.
90 */ 102 */
91 103
92 if(sp == NULL) { 104 if (sp == NULL) {
93 if (task) 105 if (task)
94 sp = (unsigned long*)task->thread.ksp; 106 sp = (unsigned long*)task->thread.ksp;
95 else 107 else
96 sp = (unsigned long*)rdsp(); 108 sp = (unsigned long*)rdsp();
97 } 109 }
98 110
99 stack = sp; 111 stack = sp;
100 112
101 raw_printk("\nStack from %08lx:\n ", (unsigned long)stack); 113 printk("\nStack from %08lx:\n ", (unsigned long)stack);
102 for(i = 0; i < kstack_depth_to_print; i++) { 114 for (i = 0; i < kstack_depth_to_print; i++) {
103 if (((long) stack & (THREAD_SIZE-1)) == 0) 115 if (((long)stack & (THREAD_SIZE-1)) == 0)
104 break; 116 break;
105 if (i && ((i % 8) == 0)) 117 if (i && ((i % 8) == 0))
106 raw_printk("\n "); 118 printk("\n ");
107 if (__get_user (addr, stack)) { 119 if (__get_user(addr, stack)) {
108 /* This message matches "failing address" marked 120 /* This message matches "failing address" marked
109 s390 in ksymoops, so lines containing it will 121 s390 in ksymoops, so lines containing it will
110 not be filtered out by ksymoops. */ 122 not be filtered out by ksymoops. */
111 raw_printk ("Failing address 0x%lx\n", (unsigned long)stack); 123 printk("Failing address 0x%lx\n", (unsigned long)stack);
112 break; 124 break;
113 } 125 }
114 stack++; 126 stack++;
115 raw_printk("%08lx ", addr); 127 printk("%08lx ", addr);
116 } 128 }
117 show_trace(sp); 129 show_trace(sp);
118} 130}
119 131
120static void (*nmi_handler)(struct pt_regs*); 132#if 0
121extern void arch_enable_nmi(void); 133/* displays a short stack trace */
122 134
123void set_nmi_handler(void (*handler)(struct pt_regs*)) 135int
136show_stack(void)
124{ 137{
125 nmi_handler = handler; 138 unsigned long *sp = (unsigned long *)rdusp();
126 arch_enable_nmi(); 139 int i;
140
141 printk("Stack dump [0x%08lx]:\n", (unsigned long)sp);
142 for (i = 0; i < 16; i++)
143 printk("sp + %d: 0x%08lx\n", i*4, sp[i]);
144 return 0;
127} 145}
146#endif
128 147
129void handle_nmi(struct pt_regs* regs) 148void
149dump_stack(void)
130{ 150{
131 if (nmi_handler) 151 show_stack(NULL, NULL);
132 nmi_handler(regs); 152}
153EXPORT_SYMBOL(dump_stack);
154
155void
156set_nmi_handler(void (*handler)(struct pt_regs *))
157{
158 nmi_handler = handler;
159 arch_enable_nmi();
133} 160}
134 161
135#ifdef CONFIG_DEBUG_NMI_OOPS 162#ifdef CONFIG_DEBUG_NMI_OOPS
136void oops_nmi_handler(struct pt_regs* regs) 163void
164oops_nmi_handler(struct pt_regs *regs)
137{ 165{
138 stop_watchdog(); 166 stop_watchdog();
139 raw_printk("NMI!\n"); 167 oops_in_progress = 1;
140 show_registers(regs); 168 printk("NMI!\n");
169 show_registers(regs);
170 oops_in_progress = 0;
141} 171}
142 172
143static int 173static int __init
144__init oops_nmi_register(void) 174oops_nmi_register(void)
145{ 175{
146 set_nmi_handler(oops_nmi_handler); 176 set_nmi_handler(oops_nmi_handler);
147 return 0; 177 return 0;
148} 178}
149 179
150__initcall(oops_nmi_register); 180__initcall(oops_nmi_register);
151 181
152#endif 182#endif
153 183
154#if 0 184/*
155/* displays a short stack trace */ 185 * This gets called from entry.S when the watchdog has bitten. Show something
156 186 * similiar to an Oops dump, and if the kernel is configured to be a nice
157int 187 * doggy, then halt instead of reboot.
158show_stack() 188 */
189void
190watchdog_bite_hook(struct pt_regs *regs)
159{ 191{
160 unsigned long *sp = (unsigned long *)rdusp(); 192#ifdef CONFIG_ETRAX_WATCHDOG_NICE_DOGGY
161 int i; 193 local_irq_disable();
162 raw_printk("Stack dump [0x%08lx]:\n", (unsigned long)sp); 194 stop_watchdog();
163 for(i = 0; i < 16; i++) 195 show_registers(regs);
164 raw_printk("sp + %d: 0x%08lx\n", i*4, sp[i]); 196
165 return 0; 197 while (1)
166} 198 ; /* Do nothing. */
199#else
200 show_registers(regs);
167#endif 201#endif
202}
168 203
169void dump_stack(void) 204/* This is normally the Oops function. */
205void
206die_if_kernel(const char *str, struct pt_regs *regs, long err)
170{ 207{
171 show_stack(NULL, NULL); 208 if (user_mode(regs))
172} 209 return;
173 210
174EXPORT_SYMBOL(dump_stack); 211#ifdef CONFIG_ETRAX_WATCHDOG_NICE_DOGGY
212 /*
213 * This printout might take too long and could trigger
214 * the watchdog normally. If NICE_DOGGY is set, simply
215 * stop the watchdog during the printout.
216 */
217 stop_watchdog();
218#endif
175 219
176void __init 220 handle_BUG(regs);
177trap_init(void) 221
178{ 222 printk("%s: %04lx\n", str, err & 0xffff);
179 /* Nothing needs to be done */ 223
224 show_registers(regs);
225
226 oops_in_progress = 0;
227
228#ifdef CONFIG_ETRAX_WATCHDOG_NICE_DOGGY
229 reset_watchdog();
230#endif
231 do_exit(SIGSEGV);
180} 232}
181 233
182void spinning_cpu(void* addr) 234void __init
235trap_init(void)
183{ 236{
184 raw_printk("CPU %d spinning on %X\n", smp_processor_id(), addr); 237 /* Nothing needs to be done */
185 dump_stack();
186} 238}
diff --git a/arch/cris/mm/fault.c b/arch/cris/mm/fault.c
index 3034f3ff950c..c4c76db90f9c 100644
--- a/arch/cris/mm/fault.c
+++ b/arch/cris/mm/fault.c
@@ -1,130 +1,9 @@
1/* 1/*
2 * linux/arch/cris/mm/fault.c 2 * linux/arch/cris/mm/fault.c
3 * 3 *
4 * Copyright (C) 2000, 2001 Axis Communications AB 4 * Copyright (C) 2000-2006 Axis Communications AB
5 *
6 * Authors: Bjorn Wesen
7 *
8 * $Log: fault.c,v $
9 * Revision 1.20 2005/03/04 08:16:18 starvik
10 * Merge of Linux 2.6.11.
11 *
12 * Revision 1.19 2005/01/14 10:07:59 starvik
13 * Fixed warning.
14 *
15 * Revision 1.18 2005/01/12 08:10:14 starvik
16 * Re-added the change of frametype when handling kernel page fault fixup
17 * for v10. This is necessary to avoid that the CPU remakes the faulting
18 * access.
19 *
20 * Revision 1.17 2005/01/11 13:53:05 starvik
21 * Use raw_printk.
22 *
23 * Revision 1.16 2004/12/17 11:39:41 starvik
24 * SMP support.
25 *
26 * Revision 1.15 2004/11/23 18:36:18 starvik
27 * Stack is now non-executable.
28 * Signal handler trampolines are placed in a reserved page mapped into all
29 * processes.
30 *
31 * Revision 1.14 2004/11/23 07:10:21 starvik
32 * Moved find_fixup_code to generic code.
33 *
34 * Revision 1.13 2004/11/23 07:00:54 starvik
35 * Actually use the execute permission bit in the MMU. This makes it possible
36 * to prevent e.g. attacks where executable code is put on the stack.
37 *
38 * Revision 1.12 2004/09/29 06:16:04 starvik
39 * Use instruction_pointer
40 *
41 * Revision 1.11 2004/05/14 07:58:05 starvik
42 * Merge of changes from 2.4
43 *
44 * Revision 1.10 2003/10/27 14:51:24 starvik
45 * Removed debugcode
46 *
47 * Revision 1.9 2003/10/27 14:50:42 starvik
48 * Changed do_page_fault signature
49 *
50 * Revision 1.8 2003/07/04 13:02:48 tobiasa
51 * Moved code snippet from arch/cris/mm/fault.c that searches for fixup code
52 * to separate function in arch-specific files.
53 *
54 * Revision 1.7 2003/01/22 06:48:38 starvik
55 * Fixed warnings issued by GCC 3.2.1
56 *
57 * Revision 1.6 2003/01/09 14:42:52 starvik
58 * Merge of Linux 2.5.55
59 *
60 * Revision 1.5 2002/12/11 14:44:48 starvik
61 * Extracted v10 (ETRAX 100LX) specific stuff to arch/cris/arch-v10/mm
62 *
63 * Revision 1.4 2002/11/13 15:10:28 starvik
64 * pte_offset has been renamed to pte_offset_kernel
65 *
66 * Revision 1.3 2002/11/05 06:45:13 starvik
67 * Merge of Linux 2.5.45
68 *
69 * Revision 1.2 2001/12/18 13:35:22 bjornw
70 * Applied the 2.4.13->2.4.16 CRIS patch to 2.5.1 (is a copy of 2.4.15).
71 *
72 * Revision 1.20 2001/11/22 13:34:06 bjornw
73 * * Bug workaround (LX TR89): force a rerun of the whole of an interrupted
74 * unaligned write, because the second half of the write will be corrupted
75 * otherwise. Affected unaligned writes spanning not-yet mapped pages.
76 * * Optimization: use the wr_rd bit in R_MMU_CAUSE to know whether a miss
77 * was due to a read or a write (before we didn't know this until the next
78 * restart of the interrupted instruction, thus wasting one fault-irq)
79 *
80 * Revision 1.19 2001/11/12 19:02:10 pkj
81 * Fixed compiler warnings.
82 *
83 * Revision 1.18 2001/07/18 22:14:32 bjornw
84 * Enable interrupts in the bulk of do_page_fault
85 *
86 * Revision 1.17 2001/07/18 13:07:23 bjornw
87 * * Detect non-existant PTE's in vmalloc pmd synchronization
88 * * Remove comment about fast-paths for VMALLOC_START etc, because all that
89 * was totally bogus anyway it turned out :)
90 * * Fix detection of vmalloc-area synchronization
91 * * Add some comments
92 *
93 * Revision 1.16 2001/06/13 00:06:08 bjornw
94 * current_pgd should be volatile
95 *
96 * Revision 1.15 2001/06/13 00:02:23 bjornw
97 * Use a separate variable to store the current pgd to avoid races in schedule
98 *
99 * Revision 1.14 2001/05/16 17:41:07 hp
100 * Last comment tweak further tweaked.
101 *
102 * Revision 1.13 2001/05/15 00:58:44 hp
103 * Expand a bit on the comment why we compare address >= TASK_SIZE rather
104 * than >= VMALLOC_START.
105 *
106 * Revision 1.12 2001/04/04 10:51:14 bjornw
107 * mmap_sem is grabbed for reading
108 *
109 * Revision 1.11 2001/03/23 07:36:07 starvik
110 * Corrected according to review remarks
111 *
112 * Revision 1.10 2001/03/21 16:10:11 bjornw
113 * CRIS_FRAME_FIXUP not needed anymore, use FRAME_NORMAL
114 *
115 * Revision 1.9 2001/03/05 13:22:20 bjornw
116 * Spell-fix and fix in vmalloc_fault handling
117 *
118 * Revision 1.8 2000/11/22 14:45:31 bjornw
119 * * 2.4.0-test10 removed the set_pgdir instantaneous kernel global mapping
120 * into all processes. Instead we fill in the missing PTE entries on demand.
121 *
122 * Revision 1.7 2000/11/21 16:39:09 bjornw
123 * fixup switches frametype
124 *
125 * Revision 1.6 2000/11/17 16:54:08 bjornw
126 * More detailed siginfo reporting
127 * 5 *
6 * Authors: Bjorn Wesen
128 * 7 *
129 */ 8 */
130 9
@@ -135,7 +14,6 @@
135 14
136extern int find_fixup_code(struct pt_regs *); 15extern int find_fixup_code(struct pt_regs *);
137extern void die_if_kernel(const char *, struct pt_regs *, long); 16extern void die_if_kernel(const char *, struct pt_regs *, long);
138extern int raw_printk(const char *fmt, ...);
139 17
140/* debug of low-level TLB reload */ 18/* debug of low-level TLB reload */
141#undef DEBUG 19#undef DEBUG
@@ -164,8 +42,8 @@ unsigned long cris_signal_return_page;
164 * address. 42 * address.
165 * 43 *
166 * error_code: 44 * error_code:
167 * bit 0 == 0 means no page found, 1 means protection fault 45 * bit 0 == 0 means no page found, 1 means protection fault
168 * bit 1 == 0 means read, 1 means write 46 * bit 1 == 0 means read, 1 means write
169 * 47 *
170 * If this routine detects a bad access, it returns 1, otherwise it 48 * If this routine detects a bad access, it returns 1, otherwise it
171 * returns 0. 49 * returns 0.
@@ -181,9 +59,10 @@ do_page_fault(unsigned long address, struct pt_regs *regs,
181 siginfo_t info; 59 siginfo_t info;
182 int fault; 60 int fault;
183 61
184 D(printk("Page fault for %lX on %X at %lX, prot %d write %d\n", 62 D(printk(KERN_DEBUG
185 address, smp_processor_id(), instruction_pointer(regs), 63 "Page fault for %lX on %X at %lX, prot %d write %d\n",
186 protection, writeaccess)); 64 address, smp_processor_id(), instruction_pointer(regs),
65 protection, writeaccess));
187 66
188 tsk = current; 67 tsk = current;
189 68
@@ -233,7 +112,7 @@ do_page_fault(unsigned long address, struct pt_regs *regs,
233 * context, we must not take the fault.. 112 * context, we must not take the fault..
234 */ 113 */
235 114
236 if (in_atomic() || !mm) 115 if (in_interrupt() || !mm)
237 goto no_context; 116 goto no_context;
238 117
239 down_read(&mm->mmap_sem); 118 down_read(&mm->mmap_sem);
@@ -319,6 +198,9 @@ do_page_fault(unsigned long address, struct pt_regs *regs,
319 /* info.si_code has been set above */ 198 /* info.si_code has been set above */
320 info.si_addr = (void *)address; 199 info.si_addr = (void *)address;
321 force_sig_info(SIGSEGV, &info, tsk); 200 force_sig_info(SIGSEGV, &info, tsk);
201 printk(KERN_NOTICE "%s (pid %d) segfaults for page "
202 "address %08lx at pc %08lx\n",
203 tsk->comm, tsk->pid, address, instruction_pointer(regs));
322 return; 204 return;
323 } 205 }
324 206
@@ -326,7 +208,7 @@ do_page_fault(unsigned long address, struct pt_regs *regs,
326 208
327 /* Are we prepared to handle this kernel fault? 209 /* Are we prepared to handle this kernel fault?
328 * 210 *
329 * (The kernel has valid exception-points in the source 211 * (The kernel has valid exception-points in the source
330 * when it acesses user-memory. When it fails in one 212 * when it acesses user-memory. When it fails in one
331 * of those points, we find it in a table and do a jump 213 * of those points, we find it in a table and do a jump
332 * to some fixup code that loads an appropriate error 214 * to some fixup code that loads an appropriate error
@@ -341,13 +223,18 @@ do_page_fault(unsigned long address, struct pt_regs *regs,
341 * terminate things with extreme prejudice. 223 * terminate things with extreme prejudice.
342 */ 224 */
343 225
344 if ((unsigned long) (address) < PAGE_SIZE) 226 if (!oops_in_progress) {
345 raw_printk(KERN_ALERT "Unable to handle kernel NULL pointer dereference"); 227 oops_in_progress = 1;
346 else 228 if ((unsigned long) (address) < PAGE_SIZE)
347 raw_printk(KERN_ALERT "Unable to handle kernel access"); 229 printk(KERN_ALERT "Unable to handle kernel NULL "
348 raw_printk(" at virtual address %08lx\n",address); 230 "pointer dereference");
349 231 else
350 die_if_kernel("Oops", regs, (writeaccess << 1) | protection); 232 printk(KERN_ALERT "Unable to handle kernel access"
233 " at virtual address %08lx\n", address);
234
235 die_if_kernel("Oops", regs, (writeaccess << 1) | protection);
236 oops_in_progress = 0;
237 }
351 238
352 do_exit(SIGKILL); 239 do_exit(SIGKILL);
353 240
@@ -360,7 +247,7 @@ do_page_fault(unsigned long address, struct pt_regs *regs,
360 up_read(&mm->mmap_sem); 247 up_read(&mm->mmap_sem);
361 printk("VM: killing process %s\n", tsk->comm); 248 printk("VM: killing process %s\n", tsk->comm);
362 if (user_mode(regs)) 249 if (user_mode(regs))
363 do_group_exit(SIGKILL); 250 do_exit(SIGKILL);
364 goto no_context; 251 goto no_context;
365 252
366 do_sigbus: 253 do_sigbus:
@@ -406,8 +293,8 @@ vmalloc_fault:
406 /* Since we're two-level, we don't need to do both 293 /* Since we're two-level, we don't need to do both
407 * set_pgd and set_pmd (they do the same thing). If 294 * set_pgd and set_pmd (they do the same thing). If
408 * we go three-level at some point, do the right thing 295 * we go three-level at some point, do the right thing
409 * with pgd_present and set_pgd here. 296 * with pgd_present and set_pgd here.
410 * 297 *
411 * Also, since the vmalloc area is global, we don't 298 * Also, since the vmalloc area is global, we don't
412 * need to copy individual PTE's, it is enough to 299 * need to copy individual PTE's, it is enough to
413 * copy the pgd pointer into the pte page of the 300 * copy the pgd pointer into the pte page of the
diff --git a/arch/cris/mm/init.c b/arch/cris/mm/init.c
index 0c833d176226..4207a2b52750 100644
--- a/arch/cris/mm/init.c
+++ b/arch/cris/mm/init.c
@@ -6,117 +6,6 @@
6 * 6 *
7 * Authors: Bjorn Wesen (bjornw@axis.com) 7 * Authors: Bjorn Wesen (bjornw@axis.com)
8 * 8 *
9 * $Log: init.c,v $
10 * Revision 1.11 2004/05/28 09:28:56 starvik
11 * Calculation of loops_per_usec moved because initialization order has changed
12 * in Linux 2.6.
13 *
14 * Revision 1.10 2004/05/14 07:58:05 starvik
15 * Merge of changes from 2.4
16 *
17 * Revision 1.9 2003/07/04 08:27:54 starvik
18 * Merge of Linux 2.5.74
19 *
20 * Revision 1.8 2003/04/09 05:20:48 starvik
21 * Merge of Linux 2.5.67
22 *
23 * Revision 1.7 2003/01/22 06:48:38 starvik
24 * Fixed warnings issued by GCC 3.2.1
25 *
26 * Revision 1.6 2002/12/11 14:44:48 starvik
27 * Extracted v10 (ETRAX 100LX) specific stuff to arch/cris/arch-v10/mm
28 *
29 * Revision 1.5 2002/11/18 07:37:37 starvik
30 * Added cache bug workaround (from Linux 2.4)
31 *
32 * Revision 1.4 2002/11/13 15:40:24 starvik
33 * Removed the page table cache stuff (as done in other archs)
34 *
35 * Revision 1.3 2002/11/05 06:45:13 starvik
36 * Merge of Linux 2.5.45
37 *
38 * Revision 1.2 2001/12/18 13:35:22 bjornw
39 * Applied the 2.4.13->2.4.16 CRIS patch to 2.5.1 (is a copy of 2.4.15).
40 *
41 * Revision 1.31 2001/11/13 16:22:00 bjornw
42 * Skip calculating totalram and sharedram in si_meminfo
43 *
44 * Revision 1.30 2001/11/12 19:02:10 pkj
45 * Fixed compiler warnings.
46 *
47 * Revision 1.29 2001/07/25 16:09:50 bjornw
48 * val->sharedram will stay 0
49 *
50 * Revision 1.28 2001/06/28 16:30:17 bjornw
51 * Oops. This needs to wait until 2.4.6 is merged
52 *
53 * Revision 1.27 2001/06/28 14:04:07 bjornw
54 * Fill in sharedram
55 *
56 * Revision 1.26 2001/06/18 06:36:02 hp
57 * Enable free_initmem of __init-type pages
58 *
59 * Revision 1.25 2001/06/13 00:02:23 bjornw
60 * Use a separate variable to store the current pgd to avoid races in schedule
61 *
62 * Revision 1.24 2001/05/15 00:52:20 hp
63 * Only map segment 0xa as seg if CONFIG_JULIETTE
64 *
65 * Revision 1.23 2001/04/04 14:35:40 bjornw
66 * * Removed get_pte_slow and friends (2.4.3 change)
67 * * Removed bad_pmd handling (2.4.3 change)
68 *
69 * Revision 1.22 2001/04/04 13:38:04 matsfg
70 * Moved ioremap to a separate function instead
71 *
72 * Revision 1.21 2001/03/27 09:28:33 bjornw
73 * ioremap used too early - lets try it in mem_init instead
74 *
75 * Revision 1.20 2001/03/23 07:39:21 starvik
76 * Corrected according to review remarks
77 *
78 * Revision 1.19 2001/03/15 14:25:17 bjornw
79 * More general shadow registers and ioremaped addresses for external I/O
80 *
81 * Revision 1.18 2001/02/23 12:46:44 bjornw
82 * * 0xc was not CSE1; 0x8 is, same as uncached flash, so we move the uncached
83 * flash during CRIS_LOW_MAP from 0xe to 0x8 so both the flash and the I/O
84 * is mapped straight over (for !CRIS_LOW_MAP the uncached flash is still 0xe)
85 *
86 * Revision 1.17 2001/02/22 15:05:21 bjornw
87 * Map 0x9 straight over during LOW_MAP to allow for memory mapped LEDs
88 *
89 * Revision 1.16 2001/02/22 15:02:35 bjornw
90 * Map 0xc straight over during LOW_MAP to allow for memory mapped I/O
91 *
92 * Revision 1.15 2001/01/10 21:12:10 bjornw
93 * loops_per_sec -> loops_per_jiffy
94 *
95 * Revision 1.14 2000/11/22 16:23:20 bjornw
96 * Initialize totalhigh counters to 0 to make /proc/meminfo look nice.
97 *
98 * Revision 1.13 2000/11/21 16:37:51 bjornw
99 * Temporarily disable initmem freeing
100 *
101 * Revision 1.12 2000/11/21 13:55:07 bjornw
102 * Use CONFIG_CRIS_LOW_MAP for the low VM map instead of explicit CPU type
103 *
104 * Revision 1.11 2000/10/06 12:38:22 bjornw
105 * Cast empty_bad_page correctly (should really be of * type from the start..
106 *
107 * Revision 1.10 2000/10/04 16:53:57 bjornw
108 * Fix memory-map due to LX features
109 *
110 * Revision 1.9 2000/09/13 15:47:49 bjornw
111 * Wrong count in reserved-pages loop
112 *
113 * Revision 1.8 2000/09/13 14:35:10 bjornw
114 * 2.4.0-test8 added a new arg to free_area_init_node
115 *
116 * Revision 1.7 2000/08/17 15:35:55 bjornw
117 * 2.4.0-test6 removed MAP_NR and inserted virt_to_page
118 *
119 *
120 */ 9 */
121 10
122#include <linux/init.h> 11#include <linux/init.h>
diff --git a/arch/frv/Kconfig b/arch/frv/Kconfig
index 96f7d70f4473..9e561ede0925 100644
--- a/arch/frv/Kconfig
+++ b/arch/frv/Kconfig
@@ -57,6 +57,10 @@ config ARCH_HAS_ILOG2_U64
57 bool 57 bool
58 default y 58 default y
59 59
60config HZ
61 int
62 default 1000
63
60mainmenu "Fujitsu FR-V Kernel Configuration" 64mainmenu "Fujitsu FR-V Kernel Configuration"
61 65
62source "init/Kconfig" 66source "init/Kconfig"
diff --git a/arch/frv/kernel/setup.c b/arch/frv/kernel/setup.c
index 6c01464db699..0669e1382383 100644
--- a/arch/frv/kernel/setup.c
+++ b/arch/frv/kernel/setup.c
@@ -1113,7 +1113,7 @@ static void c_stop(struct seq_file *m, void *v)
1113{ 1113{
1114} 1114}
1115 1115
1116struct seq_operations cpuinfo_op = { 1116const struct seq_operations cpuinfo_op = {
1117 .start = c_start, 1117 .start = c_start,
1118 .next = c_next, 1118 .next = c_next,
1119 .stop = c_stop, 1119 .stop = c_stop,
diff --git a/arch/frv/mm/pgalloc.c b/arch/frv/mm/pgalloc.c
index 1a2e5c8d03a9..66f616fb4860 100644
--- a/arch/frv/mm/pgalloc.c
+++ b/arch/frv/mm/pgalloc.c
@@ -28,7 +28,7 @@ pte_t *pte_alloc_one_kernel(struct mm_struct *mm, unsigned long address)
28 return pte; 28 return pte;
29} 29}
30 30
31struct page *pte_alloc_one(struct mm_struct *mm, unsigned long address) 31pgtable_t pte_alloc_one(struct mm_struct *mm, unsigned long address)
32{ 32{
33 struct page *page; 33 struct page *page;
34 34
@@ -37,9 +37,11 @@ struct page *pte_alloc_one(struct mm_struct *mm, unsigned long address)
37#else 37#else
38 page = alloc_pages(GFP_KERNEL|__GFP_REPEAT, 0); 38 page = alloc_pages(GFP_KERNEL|__GFP_REPEAT, 0);
39#endif 39#endif
40 if (page) 40 if (page) {
41 clear_highpage(page); 41 clear_highpage(page);
42 flush_dcache_page(page); 42 pgtable_page_ctor(page);
43 flush_dcache_page(page);
44 }
43 return page; 45 return page;
44} 46}
45 47
diff --git a/arch/h8300/Kconfig b/arch/h8300/Kconfig
index dc61222e1120..f69e5ea38558 100644
--- a/arch/h8300/Kconfig
+++ b/arch/h8300/Kconfig
@@ -65,6 +65,9 @@ config TIME_LOW_RES
65 bool 65 bool
66 default y 66 default y
67 67
68config ARCH_SUPPORTS_AOUT
69 def_bool y
70
68config NO_IOPORT 71config NO_IOPORT
69 def_bool y 72 def_bool y
70 73
@@ -79,6 +82,10 @@ config PCI
79 bool 82 bool
80 default n 83 default n
81 84
85config HZ
86 int
87 default 100
88
82source "init/Kconfig" 89source "init/Kconfig"
83 90
84source "arch/h8300/Kconfig.cpu" 91source "arch/h8300/Kconfig.cpu"
diff --git a/arch/h8300/kernel/setup.c b/arch/h8300/kernel/setup.c
index cd3734614d9d..b1f25c20a5db 100644
--- a/arch/h8300/kernel/setup.c
+++ b/arch/h8300/kernel/setup.c
@@ -236,7 +236,7 @@ static void c_stop(struct seq_file *m, void *v)
236{ 236{
237} 237}
238 238
239struct seq_operations cpuinfo_op = { 239const struct seq_operations cpuinfo_op = {
240 .start = c_start, 240 .start = c_start,
241 .next = c_next, 241 .next = c_next,
242 .stop = c_stop, 242 .stop = c_stop,
diff --git a/arch/ia64/kernel/time.c b/arch/ia64/kernel/time.c
index 3ab042720970..17fda5293c67 100644
--- a/arch/ia64/kernel/time.c
+++ b/arch/ia64/kernel/time.c
@@ -49,13 +49,13 @@ EXPORT_SYMBOL(last_cli_ip);
49#endif 49#endif
50 50
51static struct clocksource clocksource_itc = { 51static struct clocksource clocksource_itc = {
52 .name = "itc", 52 .name = "itc",
53 .rating = 350, 53 .rating = 350,
54 .read = itc_get_cycles, 54 .read = itc_get_cycles,
55 .mask = CLOCKSOURCE_MASK(64), 55 .mask = CLOCKSOURCE_MASK(64),
56 .mult = 0, /*to be caluclated*/ 56 .mult = 0, /*to be calculated*/
57 .shift = 16, 57 .shift = 16,
58 .flags = CLOCK_SOURCE_IS_CONTINUOUS, 58 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
59}; 59};
60static struct clocksource *itc_clocksource; 60static struct clocksource *itc_clocksource;
61 61
diff --git a/arch/m32r/Kconfig b/arch/m32r/Kconfig
index 795180b8fd8e..d4679ab55b96 100644
--- a/arch/m32r/Kconfig
+++ b/arch/m32r/Kconfig
@@ -35,6 +35,13 @@ config NO_IOPORT
35config NO_DMA 35config NO_DMA
36 def_bool y 36 def_bool y
37 37
38config ARCH_SUPPORTS_AOUT
39 def_bool y
40
41config HZ
42 int
43 default 100
44
38source "init/Kconfig" 45source "init/Kconfig"
39 46
40 47
diff --git a/arch/m32r/kernel/setup.c b/arch/m32r/kernel/setup.c
index f1f5db0c4084..0392112a5d70 100644
--- a/arch/m32r/kernel/setup.c
+++ b/arch/m32r/kernel/setup.c
@@ -369,7 +369,7 @@ static void c_stop(struct seq_file *m, void *v)
369{ 369{
370} 370}
371 371
372struct seq_operations cpuinfo_op = { 372const struct seq_operations cpuinfo_op = {
373 .start = c_start, 373 .start = c_start,
374 .next = c_next, 374 .next = c_next,
375 .stop = c_stop, 375 .stop = c_stop,
diff --git a/arch/m68k/Kconfig b/arch/m68k/Kconfig
index ffabd01c45eb..2b0ed89cd173 100644
--- a/arch/m68k/Kconfig
+++ b/arch/m68k/Kconfig
@@ -52,6 +52,13 @@ config NO_IOPORT
52config NO_DMA 52config NO_DMA
53 def_bool SUN3 53 def_bool SUN3
54 54
55config ARCH_SUPPORTS_AOUT
56 def_bool y
57
58config HZ
59 int
60 default 100
61
55mainmenu "Linux/68k Kernel Configuration" 62mainmenu "Linux/68k Kernel Configuration"
56 63
57source "init/Kconfig" 64source "init/Kconfig"
diff --git a/arch/m68k/kernel/process.c b/arch/m68k/kernel/process.c
index f85b928ffac4..5de4e4ed76ab 100644
--- a/arch/m68k/kernel/process.c
+++ b/arch/m68k/kernel/process.c
@@ -23,7 +23,6 @@
23#include <linux/ptrace.h> 23#include <linux/ptrace.h>
24#include <linux/slab.h> 24#include <linux/slab.h>
25#include <linux/user.h> 25#include <linux/user.h>
26#include <linux/a.out.h>
27#include <linux/reboot.h> 26#include <linux/reboot.h>
28#include <linux/init_task.h> 27#include <linux/init_task.h>
29#include <linux/mqueue.h> 28#include <linux/mqueue.h>
@@ -316,53 +315,6 @@ int dump_fpu (struct pt_regs *regs, struct user_m68kfp_struct *fpu)
316EXPORT_SYMBOL(dump_fpu); 315EXPORT_SYMBOL(dump_fpu);
317 316
318/* 317/*
319 * fill in the user structure for a core dump..
320 */
321void dump_thread(struct pt_regs * regs, struct user * dump)
322{
323 struct switch_stack *sw;
324
325/* changed the size calculations - should hopefully work better. lbt */
326 dump->magic = CMAGIC;
327 dump->start_code = 0;
328 dump->start_stack = rdusp() & ~(PAGE_SIZE - 1);
329 dump->u_tsize = ((unsigned long) current->mm->end_code) >> PAGE_SHIFT;
330 dump->u_dsize = ((unsigned long) (current->mm->brk +
331 (PAGE_SIZE-1))) >> PAGE_SHIFT;
332 dump->u_dsize -= dump->u_tsize;
333 dump->u_ssize = 0;
334
335 if (dump->start_stack < TASK_SIZE)
336 dump->u_ssize = ((unsigned long) (TASK_SIZE - dump->start_stack)) >> PAGE_SHIFT;
337
338 dump->u_ar0 = offsetof(struct user, regs);
339 sw = ((struct switch_stack *)regs) - 1;
340 dump->regs.d1 = regs->d1;
341 dump->regs.d2 = regs->d2;
342 dump->regs.d3 = regs->d3;
343 dump->regs.d4 = regs->d4;
344 dump->regs.d5 = regs->d5;
345 dump->regs.d6 = sw->d6;
346 dump->regs.d7 = sw->d7;
347 dump->regs.a0 = regs->a0;
348 dump->regs.a1 = regs->a1;
349 dump->regs.a2 = regs->a2;
350 dump->regs.a3 = sw->a3;
351 dump->regs.a4 = sw->a4;
352 dump->regs.a5 = sw->a5;
353 dump->regs.a6 = sw->a6;
354 dump->regs.d0 = regs->d0;
355 dump->regs.orig_d0 = regs->orig_d0;
356 dump->regs.stkadj = regs->stkadj;
357 dump->regs.sr = regs->sr;
358 dump->regs.pc = regs->pc;
359 dump->regs.fmtvec = (regs->format << 12) | regs->vector;
360 /* dump floating point stuff */
361 dump->u_fpvalid = dump_fpu (regs, &dump->m68kfp);
362}
363EXPORT_SYMBOL(dump_thread);
364
365/*
366 * sys_execve() executes a new program. 318 * sys_execve() executes a new program.
367 */ 319 */
368asmlinkage int sys_execve(char __user *name, char __user * __user *argv, char __user * __user *envp) 320asmlinkage int sys_execve(char __user *name, char __user * __user *argv, char __user * __user *envp)
diff --git a/arch/m68k/kernel/setup.c b/arch/m68k/kernel/setup.c
index 9a06c48edcb3..bba650312fd9 100644
--- a/arch/m68k/kernel/setup.c
+++ b/arch/m68k/kernel/setup.c
@@ -450,7 +450,7 @@ static void *c_next(struct seq_file *m, void *v, loff_t *pos)
450static void c_stop(struct seq_file *m, void *v) 450static void c_stop(struct seq_file *m, void *v)
451{ 451{
452} 452}
453struct seq_operations cpuinfo_op = { 453const struct seq_operations cpuinfo_op = {
454 .start = c_start, 454 .start = c_start,
455 .next = c_next, 455 .next = c_next,
456 .stop = c_stop, 456 .stop = c_stop,
diff --git a/arch/m68k/kernel/traps.c b/arch/m68k/kernel/traps.c
index 97f556fa4932..fd4858e2dd63 100644
--- a/arch/m68k/kernel/traps.c
+++ b/arch/m68k/kernel/traps.c
@@ -23,7 +23,6 @@
23#include <linux/kernel.h> 23#include <linux/kernel.h>
24#include <linux/mm.h> 24#include <linux/mm.h>
25#include <linux/module.h> 25#include <linux/module.h>
26#include <linux/a.out.h>
27#include <linux/user.h> 26#include <linux/user.h>
28#include <linux/string.h> 27#include <linux/string.h>
29#include <linux/linkage.h> 28#include <linux/linkage.h>
diff --git a/arch/m68knommu/Kconfig b/arch/m68knommu/Kconfig
index 6abbbb8aac5e..548a7b321633 100644
--- a/arch/m68knommu/Kconfig
+++ b/arch/m68knommu/Kconfig
@@ -64,6 +64,9 @@ config TIME_LOW_RES
64config NO_IOPORT 64config NO_IOPORT
65 def_bool y 65 def_bool y
66 66
67config ARCH_SUPPORTS_AOUT
68 def_bool y
69
67source "init/Kconfig" 70source "init/Kconfig"
68 71
69menu "Processor type and features" 72menu "Processor type and features"
@@ -522,6 +525,11 @@ config 4KSTACKS
522 running more threads on a system and also reduces the pressure 525 running more threads on a system and also reduces the pressure
523 on the VM subsystem for higher order allocations. 526 on the VM subsystem for higher order allocations.
524 527
528config HZ
529 int
530 default 1000 if CLEOPATRA
531 default 100
532
525comment "RAM configuration" 533comment "RAM configuration"
526 534
527config RAMBASE 535config RAMBASE
diff --git a/arch/m68knommu/kernel/setup.c b/arch/m68knommu/kernel/setup.c
index 156c6c662c7e..d6f0200316fe 100644
--- a/arch/m68knommu/kernel/setup.c
+++ b/arch/m68knommu/kernel/setup.c
@@ -260,7 +260,7 @@ static void c_stop(struct seq_file *m, void *v)
260{ 260{
261} 261}
262 262
263struct seq_operations cpuinfo_op = { 263const struct seq_operations cpuinfo_op = {
264 .start = c_start, 264 .start = c_start,
265 .next = c_next, 265 .next = c_next,
266 .stop = c_stop, 266 .stop = c_stop,
diff --git a/arch/mips/kernel/i8259.c b/arch/mips/kernel/i8259.c
index 197d7977de35..413bd1d37f54 100644
--- a/arch/mips/kernel/i8259.c
+++ b/arch/mips/kernel/i8259.c
@@ -338,8 +338,10 @@ void __init init_i8259_irqs(void)
338 338
339 init_8259A(0); 339 init_8259A(0);
340 340
341 for (i = I8259A_IRQ_BASE; i < I8259A_IRQ_BASE + 16; i++) 341 for (i = I8259A_IRQ_BASE; i < I8259A_IRQ_BASE + 16; i++) {
342 set_irq_chip_and_handler(i, &i8259A_chip, handle_level_irq); 342 set_irq_chip_and_handler(i, &i8259A_chip, handle_level_irq);
343 set_irq_probe(i);
344 }
343 345
344 setup_irq(I8259A_IRQ_BASE + PIC_CASCADE_IR, &irq2); 346 setup_irq(I8259A_IRQ_BASE + PIC_CASCADE_IR, &irq2);
345} 347}
diff --git a/arch/mips/kernel/irixelf.c b/arch/mips/kernel/irixelf.c
index 7852c7cdf29e..290d8e3a664d 100644
--- a/arch/mips/kernel/irixelf.c
+++ b/arch/mips/kernel/irixelf.c
@@ -591,9 +591,9 @@ static void irix_map_prda_page(void)
591 return; 591 return;
592 592
593 pp = (struct prda *) v; 593 pp = (struct prda *) v;
594 pp->prda_sys.t_pid = current->pid; 594 pp->prda_sys.t_pid = task_pid_vnr(current);
595 pp->prda_sys.t_prid = read_c0_prid(); 595 pp->prda_sys.t_prid = read_c0_prid();
596 pp->prda_sys.t_rpid = current->pid; 596 pp->prda_sys.t_rpid = task_pid_vnr(current);
597 597
598 /* We leave the rest set to zero */ 598 /* We leave the rest set to zero */
599} 599}
@@ -1170,11 +1170,11 @@ static int irix_core_dump(long signr, struct pt_regs *regs, struct file *file, u
1170 prstatus.pr_info.si_signo = prstatus.pr_cursig = signr; 1170 prstatus.pr_info.si_signo = prstatus.pr_cursig = signr;
1171 prstatus.pr_sigpend = current->pending.signal.sig[0]; 1171 prstatus.pr_sigpend = current->pending.signal.sig[0];
1172 prstatus.pr_sighold = current->blocked.sig[0]; 1172 prstatus.pr_sighold = current->blocked.sig[0];
1173 psinfo.pr_pid = prstatus.pr_pid = current->pid; 1173 psinfo.pr_pid = prstatus.pr_pid = task_pid_vnr(current);
1174 psinfo.pr_ppid = prstatus.pr_ppid = current->parent->pid; 1174 psinfo.pr_ppid = prstatus.pr_ppid = task_pid_vnr(current->parent);
1175 psinfo.pr_pgrp = prstatus.pr_pgrp = task_pgrp_nr(current); 1175 psinfo.pr_pgrp = prstatus.pr_pgrp = task_pgrp_vnr(current);
1176 psinfo.pr_sid = prstatus.pr_sid = task_session_nr(current); 1176 psinfo.pr_sid = prstatus.pr_sid = task_session_vnr(current);
1177 if (current->pid == current->tgid) { 1177 if (thread_group_leader(current)) {
1178 /* 1178 /*
1179 * This is the record for the group leader. Add in the 1179 * This is the record for the group leader. Add in the
1180 * cumulative times of previous dead threads. This total 1180 * cumulative times of previous dead threads. This total
diff --git a/arch/mips/kernel/irixsig.c b/arch/mips/kernel/irixsig.c
index 5b10ac133ec8..0215c805a592 100644
--- a/arch/mips/kernel/irixsig.c
+++ b/arch/mips/kernel/irixsig.c
@@ -578,10 +578,11 @@ out:
578 578
579#define W_MASK (W_EXITED | W_TRAPPED | W_STOPPED | W_CONT | W_NOHANG) 579#define W_MASK (W_EXITED | W_TRAPPED | W_STOPPED | W_CONT | W_NOHANG)
580 580
581asmlinkage int irix_waitsys(int type, int pid, 581asmlinkage int irix_waitsys(int type, int upid,
582 struct irix5_siginfo __user *info, int options, 582 struct irix5_siginfo __user *info, int options,
583 struct rusage __user *ru) 583 struct rusage __user *ru)
584{ 584{
585 struct pid *pid = NULL;
585 int flag, retval; 586 int flag, retval;
586 DECLARE_WAITQUEUE(wait, current); 587 DECLARE_WAITQUEUE(wait, current);
587 struct task_struct *tsk; 588 struct task_struct *tsk;
@@ -604,6 +605,8 @@ asmlinkage int irix_waitsys(int type, int pid,
604 if (type != IRIX_P_PID && type != IRIX_P_PGID && type != IRIX_P_ALL) 605 if (type != IRIX_P_PID && type != IRIX_P_PGID && type != IRIX_P_ALL)
605 return -EINVAL; 606 return -EINVAL;
606 607
608 if (type != IRIX_P_ALL)
609 pid = find_get_pid(upid);
607 add_wait_queue(&current->signal->wait_chldexit, &wait); 610 add_wait_queue(&current->signal->wait_chldexit, &wait);
608repeat: 611repeat:
609 flag = 0; 612 flag = 0;
@@ -612,9 +615,9 @@ repeat:
612 tsk = current; 615 tsk = current;
613 list_for_each(_p, &tsk->children) { 616 list_for_each(_p, &tsk->children) {
614 p = list_entry(_p, struct task_struct, sibling); 617 p = list_entry(_p, struct task_struct, sibling);
615 if ((type == IRIX_P_PID) && p->pid != pid) 618 if ((type == IRIX_P_PID) && task_pid(p) != pid)
616 continue; 619 continue;
617 if ((type == IRIX_P_PGID) && task_pgrp_nr(p) != pid) 620 if ((type == IRIX_P_PGID) && task_pgrp(p) != pid)
618 continue; 621 continue;
619 if ((p->exit_signal != SIGCHLD)) 622 if ((p->exit_signal != SIGCHLD))
620 continue; 623 continue;
@@ -639,7 +642,7 @@ repeat:
639 642
640 retval = __put_user(SIGCHLD, &info->sig); 643 retval = __put_user(SIGCHLD, &info->sig);
641 retval |= __put_user(0, &info->code); 644 retval |= __put_user(0, &info->code);
642 retval |= __put_user(p->pid, &info->stuff.procinfo.pid); 645 retval |= __put_user(task_pid_vnr(p), &info->stuff.procinfo.pid);
643 retval |= __put_user((p->exit_code >> 8) & 0xff, 646 retval |= __put_user((p->exit_code >> 8) & 0xff,
644 &info->stuff.procinfo.procdata.child.status); 647 &info->stuff.procinfo.procdata.child.status);
645 retval |= __put_user(p->utime, &info->stuff.procinfo.procdata.child.utime); 648 retval |= __put_user(p->utime, &info->stuff.procinfo.procdata.child.utime);
@@ -657,7 +660,7 @@ repeat:
657 getrusage(p, RUSAGE_BOTH, ru); 660 getrusage(p, RUSAGE_BOTH, ru);
658 retval = __put_user(SIGCHLD, &info->sig); 661 retval = __put_user(SIGCHLD, &info->sig);
659 retval |= __put_user(1, &info->code); /* CLD_EXITED */ 662 retval |= __put_user(1, &info->code); /* CLD_EXITED */
660 retval |= __put_user(p->pid, &info->stuff.procinfo.pid); 663 retval |= __put_user(task_pid_vnr(p), &info->stuff.procinfo.pid);
661 retval |= __put_user((p->exit_code >> 8) & 0xff, 664 retval |= __put_user((p->exit_code >> 8) & 0xff,
662 &info->stuff.procinfo.procdata.child.status); 665 &info->stuff.procinfo.procdata.child.status);
663 retval |= __put_user(p->utime, 666 retval |= __put_user(p->utime,
@@ -665,7 +668,7 @@ repeat:
665 retval |= __put_user(p->stime, 668 retval |= __put_user(p->stime,
666 &info->stuff.procinfo.procdata.child.stime); 669 &info->stuff.procinfo.procdata.child.stime);
667 if (retval) 670 if (retval)
668 return retval; 671 goto end_waitsys;
669 672
670 if (p->real_parent != p->parent) { 673 if (p->real_parent != p->parent) {
671 write_lock_irq(&tasklist_lock); 674 write_lock_irq(&tasklist_lock);
@@ -698,6 +701,7 @@ repeat:
698end_waitsys: 701end_waitsys:
699 current->state = TASK_RUNNING; 702 current->state = TASK_RUNNING;
700 remove_wait_queue(&current->signal->wait_chldexit, &wait); 703 remove_wait_queue(&current->signal->wait_chldexit, &wait);
704 put_pid(pid);
701 705
702 return retval; 706 return retval;
703} 707}
diff --git a/arch/mips/kernel/irq.c b/arch/mips/kernel/irq.c
index d06e9c9af790..e3309ff9ece4 100644
--- a/arch/mips/kernel/irq.c
+++ b/arch/mips/kernel/irq.c
@@ -145,6 +145,11 @@ __setup("nokgdb", nokgdb);
145 145
146void __init init_IRQ(void) 146void __init init_IRQ(void)
147{ 147{
148 int i;
149
150 for (i = 0; i < NR_IRQS; i++)
151 set_irq_noprobe(i);
152
148 arch_init_irq(); 153 arch_init_irq();
149 154
150#ifdef CONFIG_KGDB 155#ifdef CONFIG_KGDB
diff --git a/arch/mips/kernel/sysirix.c b/arch/mips/kernel/sysirix.c
index 22fd41e946b2..d70c4e0e85fb 100644
--- a/arch/mips/kernel/sysirix.c
+++ b/arch/mips/kernel/sysirix.c
@@ -582,8 +582,8 @@ out:
582 582
583asmlinkage int irix_getpid(struct pt_regs *regs) 583asmlinkage int irix_getpid(struct pt_regs *regs)
584{ 584{
585 regs->regs[3] = current->real_parent->pid; 585 regs->regs[3] = task_pid_vnr(current->real_parent);
586 return current->pid; 586 return task_pid_vnr(current);
587} 587}
588 588
589asmlinkage int irix_getuid(struct pt_regs *regs) 589asmlinkage int irix_getuid(struct pt_regs *regs)
@@ -763,11 +763,11 @@ asmlinkage int irix_setpgrp(int flags)
763 printk("[%s:%d] setpgrp(%d) ", current->comm, current->pid, flags); 763 printk("[%s:%d] setpgrp(%d) ", current->comm, current->pid, flags);
764#endif 764#endif
765 if(!flags) 765 if(!flags)
766 error = task_pgrp_nr(current); 766 error = task_pgrp_vnr(current);
767 else 767 else
768 error = sys_setsid(); 768 error = sys_setsid();
769#ifdef DEBUG_PROCGRPS 769#ifdef DEBUG_PROCGRPS
770 printk("returning %d\n", task_pgrp_nr(current)); 770 printk("returning %d\n", error);
771#endif 771#endif
772 772
773 return error; 773 return error;
@@ -1093,10 +1093,10 @@ asmlinkage int irix_BSDsetpgrp(int pid, int pgrp)
1093 pid, pgrp); 1093 pid, pgrp);
1094#endif 1094#endif
1095 if(!pid) 1095 if(!pid)
1096 pid = current->pid; 1096 pid = task_pid_vnr(current);
1097 1097
1098 /* Wheee, weird sysv thing... */ 1098 /* Wheee, weird sysv thing... */
1099 if ((pgrp == 0) && (pid == current->pid)) 1099 if ((pgrp == 0) && (pid == task_pid_vnr(current)))
1100 error = sys_setsid(); 1100 error = sys_setsid();
1101 else 1101 else
1102 error = sys_setpgid(pid, pgrp); 1102 error = sys_setpgid(pid, pgrp);
diff --git a/arch/mn10300/Kconfig b/arch/mn10300/Kconfig
new file mode 100644
index 000000000000..eedc3a5e0d9b
--- /dev/null
+++ b/arch/mn10300/Kconfig
@@ -0,0 +1,381 @@
1#
2# For a description of the syntax of this configuration file,
3# see Documentation/kbuild/kconfig-language.txt.
4#
5
6mainmenu "Linux Kernel Configuration"
7
8config MN10300
9 def_bool y
10
11config AM33
12 def_bool y
13
14config MMU
15 def_bool y
16
17config HIGHMEM
18 def_bool n
19
20config NUMA
21 def_bool n
22
23config UID16
24 def_bool y
25
26config RWSEM_GENERIC_SPINLOCK
27 def_bool y
28
29config RWSEM_XCHGADD_ALGORITHM
30 bool
31
32config GENERIC_HARDIRQS_NO__DO_IRQ
33 def_bool y
34
35config GENERIC_CALIBRATE_DELAY
36 def_bool y
37
38config GENERIC_FIND_NEXT_BIT
39 def_bool y
40
41config GENERIC_HWEIGHT
42 def_bool y
43
44config GENERIC_TIME
45 def_bool y
46
47config GENERIC_BUG
48 def_bool y
49
50config QUICKLIST
51 def_bool y
52
53config ARCH_HAS_ILOG2_U32
54 def_bool y
55
56config ARCH_SUPPORTS_AOUT
57 def_bool n
58
59# Use the generic interrupt handling code in kernel/irq/
60config GENERIC_HARDIRQS
61 def_bool y
62
63config HOTPLUG_CPU
64 def_bool n
65
66mainmenu "Matsushita MN10300/AM33 Kernel Configuration"
67
68source "init/Kconfig"
69
70
71menu "Matsushita MN10300 system setup"
72
73choice
74 prompt "Unit type"
75 default MN10300_UNIT_ASB2303
76 help
77 This option specifies board for which the kernel will be
78 compiled. It affects the external peripherals catered for.
79
80config MN10300_UNIT_ASB2303
81 bool "ASB2303"
82
83config MN10300_UNIT_ASB2305
84 bool "ASB2305"
85
86endchoice
87
88choice
89 prompt "Processor support"
90 default MN10300_PROC_MN103E010
91 help
92 This option specifies the processor for which the kernel will be
93 compiled. It affects the on-chip peripherals catered for.
94
95config MN10300_PROC_MN103E010
96 bool "MN103E010"
97 depends on MN10300_UNIT_ASB2303 || MN10300_UNIT_ASB2305
98 select MN10300_PROC_HAS_TTYSM0
99 select MN10300_PROC_HAS_TTYSM1
100 select MN10300_PROC_HAS_TTYSM2
101
102endchoice
103
104choice
105 prompt "Processor core support"
106 default MN10300_CPU_AM33V2
107 help
108 This option specifies the processor core for which the kernel will be
109 compiled. It affects the instruction set used.
110
111config MN10300_CPU_AM33V2
112 bool "AM33v2"
113
114endchoice
115
116config FPU
117 bool "FPU present"
118 default y
119 depends on MN10300_PROC_MN103E010
120
121choice
122 prompt "CPU Caching mode"
123 default MN10300_CACHE_WBACK
124 help
125 This option determines the caching mode for the kernel.
126
127 Write-Back caching mode involves the all reads and writes causing
128 the affected cacheline to be read into the cache first before being
129 operated upon. Memory is not then updated by a write until the cache
130 is filled and a cacheline needs to be displaced from the cache to
131 make room. Only at that point is it written back.
132
133 Write-Through caching only fetches cachelines from memory on a
134 read. Writes always get written directly to memory. If the affected
135 cacheline is also in cache, it will be updated too.
136
137 The final option is to turn of caching entirely.
138
139config MN10300_CACHE_WBACK
140 bool "Write-Back"
141
142config MN10300_CACHE_WTHRU
143 bool "Write-Through"
144
145config MN10300_CACHE_DISABLED
146 bool "Disabled"
147
148endchoice
149
150menu "Memory layout options"
151
152config KERNEL_RAM_BASE_ADDRESS
153 hex "Base address of kernel RAM"
154 default "0x90000000"
155
156config INTERRUPT_VECTOR_BASE
157 hex "Base address of vector table"
158 default "0x90000000"
159 help
160 The base address of the vector table will be programmed into
161 the TBR register. It must be on 16MiB address boundary.
162
163config KERNEL_TEXT_ADDRESS
164 hex "Base address of kernel"
165 default "0x90001000"
166
167config KERNEL_ZIMAGE_BASE_ADDRESS
168 hex "Base address of compressed vmlinux image"
169 default "0x90700000"
170
171endmenu
172
173config PREEMPT
174 bool "Preemptible Kernel"
175 help
176 This option reduces the latency of the kernel when reacting to
177 real-time or interactive events by allowing a low priority process to
178 be preempted even if it is in kernel mode executing a system call.
179 This allows applications to run more reliably even when the system is
180 under load.
181
182 Say Y here if you are building a kernel for a desktop, embedded
183 or real-time system. Say N if you are unsure.
184
185config PREEMPT_BKL
186 bool "Preempt The Big Kernel Lock"
187 depends on PREEMPT
188 default y
189 help
190 This option reduces the latency of the kernel by making the
191 big kernel lock preemptible.
192
193 Say Y here if you are building a kernel for a desktop system.
194 Say N if you are unsure.
195
196config MN10300_CURRENT_IN_E2
197 bool "Hold current task address in E2 register"
198 default y
199 help
200 This option removes the E2/R2 register from the set available to gcc
201 for normal use and instead uses it to store the address of the
202 current process's task_struct whilst in the kernel.
203
204 This means the kernel doesn't need to calculate the address each time
205 "current" is used (take SP, AND with mask and dereference pointer
206 just to get the address), and instead can just use E2+offset
207 addressing each time.
208
209 This has no effect on userspace.
210
211config MN10300_USING_JTAG
212 bool "Using JTAG to debug kernel"
213 default y
214 help
215 This options indicates that JTAG will be used to debug the kernel. It
216 suppresses the use of certain hardware debugging features, such as
217 single-stepping, which are taken over completely by the JTAG unit.
218
219config MN10300_RTC
220 bool "Using MN10300 RTC"
221 depends on MN10300_PROC_MN103E010
222 default n
223 help
224
225 This option enables support for the RTC, thus enabling time to be
226 tracked, even when system is powered down. This is available on-chip
227 on the MN103E010.
228
229config MN10300_WD_TIMER
230 bool "Using MN10300 watchdog timer"
231 default y
232 help
233 This options indicates that the watchdog timer will be used.
234
235config PCI
236 bool "Use PCI"
237 depends on MN10300_UNIT_ASB2305
238 default y
239 help
240 Some systems (such as the ASB2305) have PCI onboard. If you have one
241 of these boards and you wish to use the PCI facilities, say Y here.
242
243 The PCI-HOWTO, available from
244 <http://www.tldp.org/docs.html#howto>, contains valuable
245 information about which PCI hardware does work under Linux and which
246 doesn't.
247
248source "drivers/pci/Kconfig"
249
250source "drivers/pcmcia/Kconfig"
251
252menu "MN10300 internal serial options"
253
254config MN10300_PROC_HAS_TTYSM0
255 bool
256 default n
257
258config MN10300_PROC_HAS_TTYSM1
259 bool
260 default n
261
262config MN10300_PROC_HAS_TTYSM2
263 bool
264 default n
265
266config MN10300_TTYSM
267 bool "Support for ttySM serial ports"
268 depends on MN10300
269 default y
270 select SERIAL_CORE
271 help
272 This option enables support for the on-chip serial ports that the
273 MN10300 has available.
274
275config MN10300_TTYSM_CONSOLE
276 bool "Support for console on ttySM serial ports"
277 depends on MN10300_TTYSM
278 select SERIAL_CORE_CONSOLE
279 help
280 This option enables support for a console on the on-chip serial ports
281 that the MN10300 has available.
282
283#
284# /dev/ttySM0
285#
286config MN10300_TTYSM0
287 bool "Enable SIF0 (/dev/ttySM0)"
288 depends on MN10300_TTYSM && MN10300_PROC_HAS_TTYSM0
289 help
290 Enable access to SIF0 through /dev/ttySM0 or gdb-stub
291
292choice
293 prompt "Select the timer to supply the clock for SIF0"
294 default MN10300_TTYSM0_TIMER8
295 depends on MN10300_TTYSM0
296
297config MN10300_TTYSM0_TIMER8
298 bool "Use timer 8 (16-bit)"
299
300config MN10300_TTYSM0_TIMER2
301 bool "Use timer 2 (8-bit)"
302
303endchoice
304
305#
306# /dev/ttySM1
307#
308config MN10300_TTYSM1
309 bool "Enable SIF1 (/dev/ttySM1)"
310 depends on MN10300_TTYSM && MN10300_PROC_HAS_TTYSM1
311 help
312 Enable access to SIF1 through /dev/ttySM1 or gdb-stub
313
314choice
315 prompt "Select the timer to supply the clock for SIF1"
316 default MN10300_TTYSM0_TIMER9
317 depends on MN10300_TTYSM1
318
319config MN10300_TTYSM1_TIMER9
320 bool "Use timer 9 (16-bit)"
321
322config MN10300_TTYSM1_TIMER3
323 bool "Use timer 3 (8-bit)"
324
325endchoice
326
327#
328# /dev/ttySM2
329#
330config MN10300_TTYSM2
331 bool "Enable SIF2 (/dev/ttySM2)"
332 depends on MN10300_TTYSM && MN10300_PROC_HAS_TTYSM2
333 help
334 Enable access to SIF2 through /dev/ttySM2 or gdb-stub
335
336choice
337 prompt "Select the timer to supply the clock for SIF2"
338 default MN10300_TTYSM0_TIMER10
339 depends on MN10300_TTYSM2
340
341config MN10300_TTYSM2_TIMER10
342 bool "Use timer 10 (16-bit)"
343
344endchoice
345
346config MN10300_TTYSM2_CTS
347 bool "Enable the use of the CTS line /dev/ttySM2"
348 depends on MN10300_TTYSM2
349
350endmenu
351
352source "mm/Kconfig"
353
354menu "Power management options"
355source kernel/power/Kconfig
356endmenu
357
358endmenu
359
360
361menu "Executable formats"
362
363source "fs/Kconfig.binfmt"
364
365endmenu
366
367source "net/Kconfig"
368
369source "drivers/Kconfig"
370
371source "fs/Kconfig"
372
373source "arch/mn10300/Kconfig.debug"
374
375source "security/Kconfig"
376
377source "crypto/Kconfig"
378
379source "lib/Kconfig"
380
381source "arch/mn10300/oprofile/Kconfig"
diff --git a/arch/mn10300/Kconfig.debug b/arch/mn10300/Kconfig.debug
new file mode 100644
index 000000000000..524e33819f32
--- /dev/null
+++ b/arch/mn10300/Kconfig.debug
@@ -0,0 +1,135 @@
1menu "Kernel hacking"
2
3source "lib/Kconfig.debug"
4
5config DEBUG_STACKOVERFLOW
6 bool "Check for stack overflows"
7 depends on DEBUG_KERNEL
8
9config DEBUG_DECOMPRESS_KERNEL
10 bool "Using serial port during decompressing kernel"
11 depends on DEBUG_KERNEL
12 default n
13 help
14 If you say Y here you will confirm the start and the end of
15 decompressing Linux seeing "Uncompressing Linux... " and
16 "Ok, booting the kernel.\n" on console.
17
18config KPROBES
19 bool "Kprobes"
20 depends on DEBUG_KERNEL
21 help
22 Kprobes allows you to trap at almost any kernel address and
23 execute a callback function. register_kprobe() establishes
24 a probepoint and specifies the callback. Kprobes is useful
25 for kernel debugging, non-intrusive instrumentation and testing.
26 If in doubt, say "N".
27
28config GDBSTUB
29 bool "Remote GDB kernel debugging"
30 depends on DEBUG_KERNEL
31 select DEBUG_INFO
32 select FRAME_POINTER
33 help
34 If you say Y here, it will be possible to remotely debug the kernel
35 using gdb. This enlarges your kernel ELF image disk size by several
36 megabytes and requires a machine with more than 16 MB, better 32 MB
37 RAM to avoid excessive linking time. This is only useful for kernel
38 hackers. If unsure, say N.
39
40config GDBSTUB_IMMEDIATE
41 bool "Break into GDB stub immediately"
42 depends on GDBSTUB
43 help
44 If you say Y here, GDB stub will break into the program as soon as
45 possible, leaving the program counter at the beginning of
46 start_kernel() in init/main.c.
47
48config GDB_CONSOLE
49 bool "Console output to GDB"
50 depends on GDBSTUB
51 help
52 If you are using GDB for remote debugging over a serial port and
53 would like kernel messages to be formatted into GDB $O packets so
54 that GDB prints them as program output, say 'Y'.
55
56config GDBSTUB_DEBUGGING
57 bool "Debug GDB stub by messages to serial port"
58 depends on GDBSTUB
59 help
60 This causes debugging messages to be displayed at various points
61 during execution of the GDB stub routines. Such messages will be
62 displayed on ttyS0 if that isn't the GDB stub's port, or ttySM0
63 otherwise.
64
65config GDBSTUB_DEBUG_ENTRY
66 bool "Debug GDB stub entry"
67 depends on GDBSTUB_DEBUGGING
68 help
69 This option causes information to be displayed about entry to or exit
70 from the main GDB stub routine.
71
72config GDBSTUB_DEBUG_PROTOCOL
73 bool "Debug GDB stub protocol"
74 depends on GDBSTUB_DEBUGGING
75 help
76 This option causes information to be displayed about the GDB remote
77 protocol messages generated exchanged with GDB.
78
79config GDBSTUB_DEBUG_IO
80 bool "Debug GDB stub I/O"
81 depends on GDBSTUB_DEBUGGING
82 help
83 This option causes information to be displayed about GDB stub's
84 low-level I/O.
85
86config GDBSTUB_DEBUG_BREAKPOINT
87 bool "Debug GDB stub breakpoint management"
88 depends on GDBSTUB_DEBUGGING
89 help
90 This option causes information to be displayed about GDB stub's
91 breakpoint management.
92
93choice
94 prompt "GDB stub port"
95 default GDBSTUB_TTYSM0
96 depends on GDBSTUB
97 help
98 Select the serial port used for GDB-stub.
99
100config GDBSTUB_ON_TTYSM0
101 bool "/dev/ttySM0 [SIF0]"
102 depends on MN10300_TTYSM0
103 select GDBSTUB_ON_TTYSMx
104
105config GDBSTUB_ON_TTYSM1
106 bool "/dev/ttySM1 [SIF1]"
107 depends on MN10300_TTYSM1
108 select GDBSTUB_ON_TTYSMx
109
110config GDBSTUB_ON_TTYSM2
111 bool "/dev/ttySM2 [SIF2]"
112 depends on MN10300_TTYSM2
113 select GDBSTUB_ON_TTYSMx
114
115config GDBSTUB_ON_TTYS0
116 bool "/dev/ttyS0"
117 select GDBSTUB_ON_TTYSx
118
119config GDBSTUB_ON_TTYS1
120 bool "/dev/ttyS1"
121 select GDBSTUB_ON_TTYSx
122
123endchoice
124
125config GDBSTUB_ON_TTYSMx
126 bool
127 depends on GDBSTUB_ON_TTYSM0 || GDBSTUB_ON_TTYSM1 || GDBSTUB_ON_TTYSM2
128 default y
129
130config GDBSTUB_ON_TTYSx
131 bool
132 depends on GDBSTUB_ON_TTYS0 || GDBSTUB_ON_TTYS1
133 default y
134
135endmenu
diff --git a/arch/mn10300/Makefile b/arch/mn10300/Makefile
new file mode 100644
index 000000000000..6673a28ec07a
--- /dev/null
+++ b/arch/mn10300/Makefile
@@ -0,0 +1,135 @@
1###############################################################################
2#
3# MN10300 Kernel makefile system specifications
4#
5# Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
6# Modified by David Howells (dhowells@redhat.com)
7#
8# This program is free software; you can redistribute it and/or
9# modify it under the terms of the GNU General Public Licence
10# as published by the Free Software Foundation; either version
11# 2 of the Licence, or (at your option) any later version.
12#
13###############################################################################
14
15KBUILD_DEFCONFIG := asb2303_defconfig
16
17CCSPECS := $(shell $(CC) -v 2>&1 | grep "^Reading specs from " | head -1 | cut -c20-)
18CCDIR := $(strip $(patsubst %/specs,%,$(CCSPECS)))
19KBUILD_CPPFLAGS += -nostdinc -I$(CCDIR)/include
20
21LDFLAGS :=
22OBJCOPYFLAGS := -O binary -R .note -R .comment -S
23#LDFLAGS_vmlinux := -Map linkmap.txt
24CHECKFLAGS +=
25
26PROCESSOR := unset
27UNIT := unset
28
29KBUILD_CFLAGS += -mam33 -mmem-funcs -DCPU=AM33
30KBUILD_AFLAGS += -mam33 -DCPU=AM33
31
32ifeq ($(CONFIG_MN10300_CURRENT_IN_E2),y)
33KBUILD_CFLAGS += -ffixed-e2 -fcall-saved-e5
34endif
35
36ifeq ($(CONFIG_MN10300_PROC_MN103E010),y)
37PROCESSOR := mn103e010
38endif
39
40ifeq ($(CONFIG_MN10300_UNIT_ASB2303),y)
41UNIT := asb2303
42endif
43ifeq ($(CONFIG_MN10300_UNIT_ASB2305),y)
44UNIT := asb2305
45endif
46
47
48head-y := arch/mn10300/kernel/head.o arch/mn10300/kernel/init_task.o
49
50core-y += arch/mn10300/kernel/ arch/mn10300/mm/
51
52ifneq ($(PROCESSOR),unset)
53core-y += arch/mn10300/proc-$(PROCESSOR)/
54endif
55ifneq ($(UNIT),unset)
56core-y += arch/mn10300/unit-$(UNIT)/
57endif
58libs-y += arch/mn10300/lib/
59
60drivers-$(CONFIG_OPROFILE) += arch/mn10300/oprofile/
61
62boot := arch/mn10300/boot
63
64.PHONY: zImage
65
66KBUILD_IMAGE := $(boot)/zImage
67CLEAN_FILES += $(boot)/zImage
68CLEAN_FILES += $(boot)/compressed/vmlinux
69CLEAN_FILES += $(boot)/compressed/vmlinux.bin
70CLEAN_FILES += $(boot)/compressed/vmlinux.bin.gz
71
72zImage: vmlinux
73 $(Q)$(MAKE) $(build)=$(boot) $(boot)/$@
74
75all: zImage
76
77bootstrap:
78 $(Q)$(MAKEBOOT) bootstrap
79
80archclean:
81 $(Q)$(MAKE) $(clean)=arch/mn10300/proc-mn103e010
82 $(Q)$(MAKE) $(clean)=arch/mn10300/unit-asb2303
83 $(Q)$(MAKE) $(clean)=arch/mn10300/unit-asb2305
84
85define archhelp
86 echo '* zImage - Compressed kernel image (arch/$(ARCH)/boot/zImage)'
87endef
88
89# If you make sure the .S files get compiled with debug info,
90# uncomment the following to disable optimisations
91# that are unhelpful whilst debugging.
92ifdef CONFIG_DEBUG_INFO
93#KBUILD_CFLAGS += -O1
94KBUILD_AFLAGS += -Wa,--gdwarf2
95endif
96
97###################################################################################################
98#
99# juggle some symlinks in the MN10300 asm include dir
100#
101# Update machine proc and unit symlinks if something which affects
102# them changed. We use .proc / .unit to indicate when they were
103# updated last, otherwise make uses the target directory mtime.
104#
105###################################################################################################
106
107# processor specific definitions
108include/asm-mn10300/.proc: $(wildcard include/config/proc/*.h) include/config/auto.conf
109 @echo ' SYMLINK include/asm-mn10300/proc -> include/asm-mn10300/proc-$(PROCESSOR)'
110ifneq ($(KBUILD_SRC),)
111 $(Q)mkdir -p include/asm-mn10300
112 $(Q)ln -fsn $(srctree)/include/asm-mn10300/proc-$(PROCESSOR) include/asm-mn10300/proc
113else
114 $(Q)ln -fsn proc-$(PROCESSOR) include/asm-mn10300/proc
115endif
116 @touch $@
117
118CLEAN_FILES += include/asm-mn10300/proc include/asm-mn10300/.proc
119
120prepare: include/asm-mn10300/.proc
121
122# unit specific definitions
123include/asm-mn10300/.unit: $(wildcard include/config/unit/*.h) include/config/auto.conf
124 @echo ' SYMLINK include/asm-mn10300/unit -> include/asm-mn10300/unit-$(UNIT)'
125ifneq ($(KBUILD_SRC),)
126 $(Q)mkdir -p include/asm-mn10300
127 $(Q)ln -fsn $(srctree)/include/asm-mn10300/unit-$(UNIT) include/asm-mn10300/unit
128else
129 $(Q)ln -fsn unit-$(UNIT) include/asm-mn10300/unit
130endif
131 @touch $@
132
133CLEAN_FILES += include/asm-mn10300/unit include/asm-mn10300/.unit
134
135prepare: include/asm-mn10300/.unit
diff --git a/arch/mn10300/boot/.gitignore b/arch/mn10300/boot/.gitignore
new file mode 100644
index 000000000000..b6718de23693
--- /dev/null
+++ b/arch/mn10300/boot/.gitignore
@@ -0,0 +1 @@
zImage
diff --git a/arch/mn10300/boot/Makefile b/arch/mn10300/boot/Makefile
new file mode 100644
index 000000000000..36c9caf8ea0a
--- /dev/null
+++ b/arch/mn10300/boot/Makefile
@@ -0,0 +1,28 @@
1# MN10300 kernel compressor and wrapper
2#
3# Copyright (C) 2007 Matsushita Electric Industrial Co., Ltd.
4# Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
5# Written by David Howells (dhowells@redhat.com)
6#
7# This program is free software; you can redistribute it and/or
8# modify it under the terms of the GNU General Public Licence
9# as published by the Free Software Foundation; either version
10# 2 of the Licence, or (at your option) any later version.
11#
12
13targets := vmlinux.bin zImage
14
15subdir- := compressed
16
17# ---------------------------------------------------------------------------
18
19
20$(obj)/zImage: $(obj)/compressed/vmlinux FORCE
21 $(call if_changed,objcopy)
22 @echo 'Kernel: $@ is ready'
23
24$(obj)/vmlinux.bin: $(obj)/compressed/vmlinux FORCE
25 $(call if_changed,objcopy)
26
27$(obj)/compressed/vmlinux: FORCE
28 $(Q)$(MAKE) $(build)=$(obj)/compressed IMAGE_OFFSET=$(IMAGE_OFFSET) $@
diff --git a/arch/mn10300/boot/compressed/Makefile b/arch/mn10300/boot/compressed/Makefile
new file mode 100644
index 000000000000..08a95e171685
--- /dev/null
+++ b/arch/mn10300/boot/compressed/Makefile
@@ -0,0 +1,22 @@
1#
2# Create a compressed vmlinux image from the original vmlinux
3#
4
5targets := vmlinux vmlinux.bin vmlinux.bin.gz head.o misc.o piggy.o
6
7LDFLAGS_vmlinux := -Ttext $(CONFIG_KERNEL_ZIMAGE_BASE_ADDRESS) -e startup_32
8
9$(obj)/vmlinux: $(obj)/head.o $(obj)/misc.o $(obj)/piggy.o FORCE
10 $(call if_changed,ld)
11 @:
12
13$(obj)/vmlinux.bin: vmlinux FORCE
14 $(call if_changed,objcopy)
15
16$(obj)/vmlinux.bin.gz: $(obj)/vmlinux.bin FORCE
17 $(call if_changed,gzip)
18
19LDFLAGS_piggy.o := -r --format binary --oformat elf32-am33lin -T
20
21$(obj)/piggy.o: $(obj)/vmlinux.lds $(obj)/vmlinux.bin.gz FORCE
22 $(call if_changed,ld)
diff --git a/arch/mn10300/boot/compressed/head.S b/arch/mn10300/boot/compressed/head.S
new file mode 100644
index 000000000000..502e1eb56709
--- /dev/null
+++ b/arch/mn10300/boot/compressed/head.S
@@ -0,0 +1,86 @@
1/* Boot entry point for a compressed MN10300 kernel
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11 .section .text
12
13#define DEBUG
14
15#include <linux/linkage.h>
16#include <asm/cpu-regs.h>
17
18 .globl startup_32
19startup_32:
20 # first save off parameters from bootloader
21 mov param_save_area,a0
22 mov d0,(a0)
23 mov d1,(4,a0)
24 mov d2,(8,a0)
25
26 mov sp,a3
27 mov decomp_stack+0x2000-4,a0
28 mov a0,sp
29
30 # invalidate and enable both of the caches
31 mov CHCTR,a0
32 clr d0
33 movhu d0,(a0) # turn off first
34 mov CHCTR_ICINV|CHCTR_DCINV,d0
35 movhu d0,(a0)
36 setlb
37 mov (a0),d0
38 btst CHCTR_ICBUSY|CHCTR_DCBUSY,d0 # wait till not busy
39 lne
40 mov CHCTR_ICEN|CHCTR_DCEN|CHCTR_DCWTMD,d0 # writethru dcache
41 movhu d0,(a0) # enable
42
43 # clear the BSS area
44 mov __bss_start,a0
45 mov _end,a1
46 clr d0
47bssclear:
48 cmp a1,a0
49 bge bssclear_end
50 movbu d0,(a0)
51 inc a0
52 bra bssclear
53bssclear_end:
54
55 # decompress the kernel
56 call decompress_kernel[],0
57
58 # disable caches again
59 mov CHCTR,a0
60 clr d0
61 movhu d0,(a0)
62 setlb
63 mov (a0),d0
64 btst CHCTR_ICBUSY|CHCTR_DCBUSY,d0 # wait till not busy
65 lne
66
67 mov param_save_area,a0
68 mov (a0),d0
69 mov (4,a0),d1
70 mov (8,a0),d2
71
72 mov a3,sp
73 mov CONFIG_KERNEL_TEXT_ADDRESS,a0
74 jmp (a0)
75
76 .data
77 .align 4
78param_save_area:
79 .rept 3
80 .word 0
81 .endr
82
83 .section .bss
84 .align 4
85decomp_stack:
86 .space 0x2000
diff --git a/arch/mn10300/boot/compressed/misc.c b/arch/mn10300/boot/compressed/misc.c
new file mode 100644
index 000000000000..ded207efc97a
--- /dev/null
+++ b/arch/mn10300/boot/compressed/misc.c
@@ -0,0 +1,429 @@
1/* MN10300 Miscellaneous helper routines for kernel decompressor
2 *
3 * Copyright (C) 2007 Matsushita Electric Industrial Co., Ltd.
4 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
5 * Modified by David Howells (dhowells@redhat.com)
6 * - Derived from arch/x86/boot/compressed/misc_32.c
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public Licence
10 * as published by the Free Software Foundation; either version
11 * 2 of the Licence, or (at your option) any later version.
12 */
13#include <linux/compiler.h>
14#include <asm/serial-regs.h>
15#include "misc.h"
16
17#ifndef CONFIG_GDBSTUB_ON_TTYSx
18/* display 'Uncompressing Linux... ' messages on ttyS0 or ttyS1 */
19#if 1 /* ttyS0 */
20#define CYG_DEV_BASE 0xA6FB0000
21#else /* ttyS1 */
22#define CYG_DEV_BASE 0xA6FC0000
23#endif
24
25#define CYG_DEV_THR (*((volatile __u8*)(CYG_DEV_BASE + 0x00)))
26#define CYG_DEV_MCR (*((volatile __u8*)(CYG_DEV_BASE + 0x10)))
27#define SIO_MCR_DTR 0x01
28#define SIO_MCR_RTS 0x02
29#define CYG_DEV_LSR (*((volatile __u8*)(CYG_DEV_BASE + 0x14)))
30#define SIO_LSR_THRE 0x20 /* transmitter holding register empty */
31#define SIO_LSR_TEMT 0x40 /* transmitter register empty */
32#define CYG_DEV_MSR (*((volatile __u8*)(CYG_DEV_BASE + 0x18)))
33#define SIO_MSR_CTS 0x10 /* clear to send */
34#define SIO_MSR_DSR 0x20 /* data set ready */
35
36#define LSR_WAIT_FOR(STATE) \
37 do { while (!(CYG_DEV_LSR & SIO_LSR_##STATE)) {} } while (0)
38#define FLOWCTL_QUERY(LINE) \
39 ({ CYG_DEV_MSR & SIO_MSR_##LINE; })
40#define FLOWCTL_WAIT_FOR(LINE) \
41 do { while (!(CYG_DEV_MSR & SIO_MSR_##LINE)) {} } while (0)
42#define FLOWCTL_CLEAR(LINE) \
43 do { CYG_DEV_MCR &= ~SIO_MCR_##LINE; } while (0)
44#define FLOWCTL_SET(LINE) \
45 do { CYG_DEV_MCR |= SIO_MCR_##LINE; } while (0)
46#endif
47
48/*
49 * gzip declarations
50 */
51
52#define OF(args) args
53#define STATIC static
54
55#undef memset
56#undef memcpy
57
58static inline void *memset(const void *s, int c, size_t n)
59{
60 int i;
61 char *ss = (char *) s;
62
63 for (i = 0; i < n; i++)
64 ss[i] = c;
65 return (void *)s;
66}
67
68#define memzero(s, n) memset((s), 0, (n))
69
70static inline void *memcpy(void *__dest, const void *__src, size_t __n)
71{
72 int i;
73 const char *s = __src;
74 char *d = __dest;
75
76 for (i = 0; i < __n; i++)
77 d[i] = s[i];
78 return __dest;
79}
80
81typedef unsigned char uch;
82typedef unsigned short ush;
83typedef unsigned long ulg;
84
85#define WSIZE 0x8000 /* Window size must be at least 32k, and a power of
86 * two */
87
88static uch *inbuf; /* input buffer */
89static uch window[WSIZE]; /* sliding window buffer */
90
91static unsigned insize; /* valid bytes in inbuf */
92static unsigned inptr; /* index of next byte to be processed in inbuf */
93static unsigned outcnt; /* bytes in output buffer */
94
95/* gzip flag byte */
96#define ASCII_FLAG 0x01 /* bit 0 set: file probably ASCII text */
97#define CONTINUATION 0x02 /* bit 1 set: continuation of multi-part gzip file */
98#define EXTRA_FIELD 0x04 /* bit 2 set: extra field present */
99#define ORIG_NAME 0x08 /* bit 3 set: original file name present */
100#define COMMENT 0x10 /* bit 4 set: file comment present */
101#define ENCRYPTED 0x20 /* bit 5 set: file is encrypted */
102#define RESERVED 0xC0 /* bit 6,7: reserved */
103
104/* Diagnostic functions */
105#ifdef DEBUG
106# define Assert(cond, msg) { if (!(cond)) error(msg); }
107# define Trace(x) fprintf x
108# define Tracev(x) { if (verbose) fprintf x ; }
109# define Tracevv(x) { if (verbose > 1) fprintf x ; }
110# define Tracec(c, x) { if (verbose && (c)) fprintf x ; }
111# define Tracecv(c, x) { if (verbose > 1 && (c)) fprintf x ; }
112#else
113# define Assert(cond, msg)
114# define Trace(x)
115# define Tracev(x)
116# define Tracevv(x)
117# define Tracec(c, x)
118# define Tracecv(c, x)
119#endif
120
121static int fill_inbuf(void);
122static void flush_window(void);
123static void error(const char *) __attribute__((noreturn));
124static void kputs(const char *);
125
126static inline unsigned char get_byte(void)
127{
128 unsigned char ch = inptr < insize ? inbuf[inptr++] : fill_inbuf();
129
130#if 0
131 char hex[3];
132 hex[0] = ((ch & 0x0f) > 9) ?
133 ((ch & 0x0f) + 'A' - 0xa) : ((ch & 0x0f) + '0');
134 hex[1] = ((ch >> 4) > 9) ?
135 ((ch >> 4) + 'A' - 0xa) : ((ch >> 4) + '0');
136 hex[2] = 0;
137 kputs(hex);
138#endif
139 return ch;
140}
141
142/*
143 * This is set up by the setup-routine at boot-time
144 */
145#define EXT_MEM_K (*(unsigned short *)0x90002)
146#ifndef STANDARD_MEMORY_BIOS_CALL
147#define ALT_MEM_K (*(unsigned long *) 0x901e0)
148#endif
149#define SCREEN_INFO (*(struct screen_info *)0x90000)
150
151static long bytes_out;
152static uch *output_data;
153static unsigned long output_ptr;
154
155
156static void *malloc(int size);
157
158static inline void free(void *where)
159{ /* Don't care */
160}
161
162static unsigned long free_mem_ptr = (unsigned long) &end;
163static unsigned long free_mem_end_ptr = (unsigned long) &end + 0x90000;
164
165static inline void gzip_mark(void **ptr)
166{
167 kputs(".");
168 *ptr = (void *) free_mem_ptr;
169}
170
171static inline void gzip_release(void **ptr)
172{
173 free_mem_ptr = (unsigned long) *ptr;
174}
175
176#define INPLACE_MOVE_ROUTINE 0x1000
177#define LOW_BUFFER_START 0x2000
178#define LOW_BUFFER_END 0x90000
179#define LOW_BUFFER_SIZE (LOW_BUFFER_END - LOW_BUFFER_START)
180#define HEAP_SIZE 0x3000
181static int high_loaded;
182static uch *high_buffer_start /* = (uch *)(((ulg)&end) + HEAP_SIZE)*/;
183
184static char *vidmem = (char *)0xb8000;
185static int lines, cols;
186
187#include "../../../../lib/inflate.c"
188
189static void *malloc(int size)
190{
191 void *p;
192
193 if (size < 0)
194 error("Malloc error\n");
195 if (!free_mem_ptr)
196 error("Memory error\n");
197
198 free_mem_ptr = (free_mem_ptr + 3) & ~3; /* Align */
199
200 p = (void *) free_mem_ptr;
201 free_mem_ptr += size;
202
203 if (free_mem_ptr >= free_mem_end_ptr)
204 error("\nOut of memory\n");
205
206 return p;
207}
208
209static inline void scroll(void)
210{
211 int i;
212
213 memcpy(vidmem, vidmem + cols * 2, (lines - 1) * cols * 2);
214 for (i = (lines - 1) * cols * 2; i < lines * cols * 2; i += 2)
215 vidmem[i] = ' ';
216}
217
218static inline void kputchar(unsigned char ch)
219{
220#ifdef CONFIG_MN10300_UNIT_ASB2305
221 while (SC0STR & SC01STR_TBF)
222 continue;
223
224 if (ch == 0x0a) {
225 SC0TXB = 0x0d;
226 while (SC0STR & SC01STR_TBF)
227 continue;
228 }
229
230 SC0TXB = ch;
231
232#else
233 while (SC1STR & SC01STR_TBF)
234 continue;
235
236 if (ch == 0x0a) {
237 SC1TXB = 0x0d;
238 while (SC1STR & SC01STR_TBF)
239 continue;
240 }
241
242 SC1TXB = ch;
243
244#endif
245}
246
247static void kputs(const char *s)
248{
249#ifdef CONFIG_DEBUG_DECOMPRESS_KERNEL
250#ifndef CONFIG_GDBSTUB_ON_TTYSx
251 char ch;
252
253 FLOWCTL_SET(DTR);
254
255 while (*s) {
256 LSR_WAIT_FOR(THRE);
257
258 ch = *s++;
259 if (ch == 0x0a) {
260 CYG_DEV_THR = 0x0d;
261 LSR_WAIT_FOR(THRE);
262 }
263 CYG_DEV_THR = ch;
264 }
265
266 FLOWCTL_CLEAR(DTR);
267#else
268
269 for (; *s; s++)
270 kputchar(*s);
271
272#endif
273#endif /* CONFIG_DEBUG_DECOMPRESS_KERNEL */
274}
275
276/* ===========================================================================
277 * Fill the input buffer. This is called only when the buffer is empty
278 * and at least one byte is really needed.
279 */
280static int fill_inbuf()
281{
282 if (insize != 0)
283 error("ran out of input data\n");
284
285 inbuf = input_data;
286 insize = input_len;
287 inptr = 1;
288 return inbuf[0];
289}
290
291/* ===========================================================================
292 * Write the output window window[0..outcnt-1] and update crc and bytes_out.
293 * (Used for the decompressed data only.)
294 */
295static void flush_window_low(void)
296{
297 ulg c = crc; /* temporary variable */
298 unsigned n;
299 uch *in, *out, ch;
300
301 in = window;
302 out = &output_data[output_ptr];
303 for (n = 0; n < outcnt; n++) {
304 ch = *out++ = *in++;
305 c = crc_32_tab[((int)c ^ ch) & 0xff] ^ (c >> 8);
306 }
307 crc = c;
308 bytes_out += (ulg)outcnt;
309 output_ptr += (ulg)outcnt;
310 outcnt = 0;
311}
312
313static void flush_window_high(void)
314{
315 ulg c = crc; /* temporary variable */
316 unsigned n;
317 uch *in, ch;
318 in = window;
319 for (n = 0; n < outcnt; n++) {
320 ch = *output_data++ = *in++;
321 if ((ulg) output_data == LOW_BUFFER_END)
322 output_data = high_buffer_start;
323 c = crc_32_tab[((int)c ^ ch) & 0xff] ^ (c >> 8);
324 }
325 crc = c;
326 bytes_out += (ulg)outcnt;
327 outcnt = 0;
328}
329
330static void flush_window(void)
331{
332 if (high_loaded)
333 flush_window_high();
334 else
335 flush_window_low();
336}
337
338static void error(const char *x)
339{
340 kputs("\n\n");
341 kputs(x);
342 kputs("\n\n -- System halted");
343
344 while (1)
345 /* Halt */;
346}
347
348#define STACK_SIZE (4096)
349
350long user_stack[STACK_SIZE];
351
352struct {
353 long *a;
354 short b;
355} stack_start = { &user_stack[STACK_SIZE], 0 };
356
357void setup_normal_output_buffer(void)
358{
359#ifdef STANDARD_MEMORY_BIOS_CALL
360 if (EXT_MEM_K < 1024)
361 error("Less than 2MB of memory.\n");
362#else
363 if ((ALT_MEM_K > EXT_MEM_K ? ALT_MEM_K : EXT_MEM_K) < 1024)
364 error("Less than 2MB of memory.\n");
365#endif
366 output_data = (char *) 0x100000; /* Points to 1M */
367}
368
369struct moveparams {
370 uch *low_buffer_start;
371 int lcount;
372 uch *high_buffer_start;
373 int hcount;
374};
375
376void setup_output_buffer_if_we_run_high(struct moveparams *mv)
377{
378 high_buffer_start = (uch *)(((ulg) &end) + HEAP_SIZE);
379#ifdef STANDARD_MEMORY_BIOS_CALL
380 if (EXT_MEM_K < (3 * 1024))
381 error("Less than 4MB of memory.\n");
382#else
383 if ((ALT_MEM_K > EXT_MEM_K ? ALT_MEM_K : EXT_MEM_K) < (3 * 1024))
384 error("Less than 4MB of memory.\n");
385#endif
386 mv->low_buffer_start = output_data = (char *) LOW_BUFFER_START;
387 high_loaded = 1;
388 free_mem_end_ptr = (long) high_buffer_start;
389 if (0x100000 + LOW_BUFFER_SIZE > (ulg) high_buffer_start) {
390 high_buffer_start = (uch *)(0x100000 + LOW_BUFFER_SIZE);
391 mv->hcount = 0; /* say: we need not to move high_buffer */
392 } else {
393 mv->hcount = -1;
394 }
395 mv->high_buffer_start = high_buffer_start;
396}
397
398void close_output_buffer_if_we_run_high(struct moveparams *mv)
399{
400 mv->lcount = bytes_out;
401 if (bytes_out > LOW_BUFFER_SIZE) {
402 mv->lcount = LOW_BUFFER_SIZE;
403 if (mv->hcount)
404 mv->hcount = bytes_out - LOW_BUFFER_SIZE;
405 } else {
406 mv->hcount = 0;
407 }
408}
409
410#undef DEBUGFLAG
411#ifdef DEBUGFLAG
412int debugflag;
413#endif
414
415int decompress_kernel(struct moveparams *mv)
416{
417#ifdef DEBUGFLAG
418 while (!debugflag)
419 barrier();
420#endif
421
422 output_data = (char *) CONFIG_KERNEL_TEXT_ADDRESS;
423
424 makecrc();
425 kputs("Uncompressing Linux... ");
426 gunzip();
427 kputs("Ok, booting the kernel.\n");
428 return 0;
429}
diff --git a/arch/mn10300/boot/compressed/misc.h b/arch/mn10300/boot/compressed/misc.h
new file mode 100644
index 000000000000..da921cd172fb
--- /dev/null
+++ b/arch/mn10300/boot/compressed/misc.h
@@ -0,0 +1,18 @@
1/* Internal definitions for the MN10300 kernel decompressor
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11
12extern int end;
13
14/*
15 * vmlinux.lds
16 */
17extern char input_data[];
18extern int input_len;
diff --git a/arch/mn10300/boot/compressed/vmlinux.lds b/arch/mn10300/boot/compressed/vmlinux.lds
new file mode 100644
index 000000000000..a084903603fe
--- /dev/null
+++ b/arch/mn10300/boot/compressed/vmlinux.lds
@@ -0,0 +1,9 @@
1SECTIONS
2{
3 .data : {
4 input_len = .;
5 LONG(input_data_end - input_data) input_data = .;
6 *(.data)
7 input_data_end = .;
8 }
9}
diff --git a/arch/mn10300/boot/install.sh b/arch/mn10300/boot/install.sh
new file mode 100644
index 000000000000..072951c83976
--- /dev/null
+++ b/arch/mn10300/boot/install.sh
@@ -0,0 +1,67 @@
1#!/bin/sh
2#
3# arch/mn10300/boot/install -c.sh
4#
5# This file is subject to the terms and conditions of the GNU General Public
6# Licence. See the file "COPYING" in the main directory of this archive
7# for more details.
8#
9# Copyright (C) 1995 by Linus Torvalds
10#
11# Adapted from code in arch/i386/boot/Makefile by H. Peter Anvin
12#
13# "make install -c" script for i386 architecture
14#
15# Arguments:
16# $1 - kernel version
17# $2 - kernel image file
18# $3 - kernel map file
19# $4 - default install -c path (blank if root directory)
20# $5 - boot rom file
21#
22
23# User may have a custom install -c script
24
25rm -fr $4/../usr/include/linux $4/../usr/include/asm
26install -c -m 0755 $2 $4/vmlinuz
27install -c -m 0755 $5 $4/boot.rom
28install -c -m 0755 -d $4/../usr/include/linux
29cd $TOPDIR/include/linux
30for i in `find . -maxdepth 1 -name '*.h' -print`; do
31 install -c -m 0644 $i $4/../usr/include/linux
32done
33install -c -m 0755 -d $4/../usr/include/linux/byteorder
34cd $TOPDIR/include/linux/byteorder
35for i in `find . -name '*.h' -print`; do
36 install -c -m 0644 $i $4/../usr/include/linux/byteorder
37done
38install -c -m 0755 -d $4/../usr/include/linux/lockd
39cd $TOPDIR/include/linux/lockd
40for i in `find . -name '*.h' -print`; do
41 install -c -m 0644 $i $4/../usr/include/linux/lockd
42done
43install -c -m 0755 -d $4/../usr/include/linux/netfilter_ipv4
44cd $TOPDIR/include/linux/netfilter_ipv4
45for i in `find . -name '*.h' -print`; do
46 install -c -m 0644 $i $4/../usr/include/linux/netfilter_ipv4
47done
48install -c -m 0755 -d $4/../usr/include/linux/nfsd
49cd $TOPDIR/include/linux/nfsd
50for i in `find . -name '*.h' -print`; do
51 install -c -m 0644 $i $4/../usr/include/linux/nfsd/$i
52done
53install -c -m 0755 -d $4/../usr/include/linux/raid
54cd $TOPDIR/include/linux/raid
55for i in `find . -name '*.h' -print`; do
56 install -c -m 0644 $i $4/../usr/include/linux/raid
57done
58install -c -m 0755 -d $4/../usr/include/linux/sunrpc
59cd $TOPDIR/include/linux/sunrpc
60for i in `find . -name '*.h' -print`; do
61 install -c -m 0644 $i $4/../usr/include/linux/sunrpc
62done
63install -c -m 0755 -d $4/../usr/include/asm
64cd $TOPDIR/include/asm
65for i in `find . -name '*.h' -print`; do
66 install -c -m 0644 $i $4/../usr/include/asm
67done
diff --git a/arch/mn10300/boot/tools/build.c b/arch/mn10300/boot/tools/build.c
new file mode 100644
index 000000000000..4f552ead0f8e
--- /dev/null
+++ b/arch/mn10300/boot/tools/build.c
@@ -0,0 +1,190 @@
1/*
2 * Copyright (C) 1991, 1992 Linus Torvalds
3 * Copyright (C) 1997 Martin Mares
4 */
5
6/*
7 * This file builds a disk-image from three different files:
8 *
9 * - bootsect: exactly 512 bytes of 8086 machine code, loads the rest
10 * - setup: 8086 machine code, sets up system parm
11 * - system: 80386 code for actual system
12 *
13 * It does some checking that all files are of the correct type, and
14 * just writes the result to stdout, removing headers and padding to
15 * the right amount. It also writes some system data to stderr.
16 */
17
18/*
19 * Changes by tytso to allow root device specification
20 * High loaded stuff by Hans Lermen & Werner Almesberger, Feb. 1996
21 * Cross compiling fixes by Gertjan van Wingerde, July 1996
22 * Rewritten by Martin Mares, April 1997
23 */
24
25#include <stdio.h>
26#include <string.h>
27#include <stdlib.h>
28#include <stdarg.h>
29#include <sys/types.h>
30#include <sys/stat.h>
31#include <sys/sysmacros.h>
32#include <unistd.h>
33#include <fcntl.h>
34#include <asm/boot.h>
35
36#define DEFAULT_MAJOR_ROOT 0
37#define DEFAULT_MINOR_ROOT 0
38
39/* Minimal number of setup sectors (see also bootsect.S) */
40#define SETUP_SECTS 4
41
42uint8_t buf[1024];
43int fd;
44int is_big_kernel;
45
46__attribute__((noreturn))
47void die(const char *str, ...)
48{
49 va_list args;
50 va_start(args, str);
51 vfprintf(stderr, str, args);
52 fputc('\n', stderr);
53 exit(1);
54}
55
56void file_open(const char *name)
57{
58 fd = open(name, O_RDONLY, 0);
59 if (fd < 0)
60 die("Unable to open `%s': %m", name);
61}
62
63__attribute__((noreturn))
64void usage(void)
65{
66 die("Usage: build [-b] bootsect setup system [rootdev] [> image]");
67}
68
69int main(int argc, char **argv)
70{
71 unsigned int i, c, sz, setup_sectors;
72 uint32_t sys_size;
73 uint8_t major_root, minor_root;
74 struct stat sb;
75
76 if (argc > 2 && !strcmp(argv[1], "-b")) {
77 is_big_kernel = 1;
78 argc--, argv++;
79 }
80 if ((argc < 4) || (argc > 5))
81 usage();
82 if (argc > 4) {
83 if (!strcmp(argv[4], "CURRENT")) {
84 if (stat("/", &sb)) {
85 perror("/");
86 die("Couldn't stat /");
87 }
88 major_root = major(sb.st_dev);
89 minor_root = minor(sb.st_dev);
90 } else if (strcmp(argv[4], "FLOPPY")) {
91 if (stat(argv[4], &sb)) {
92 perror(argv[4]);
93 die("Couldn't stat root device.");
94 }
95 major_root = major(sb.st_rdev);
96 minor_root = minor(sb.st_rdev);
97 } else {
98 major_root = 0;
99 minor_root = 0;
100 }
101 } else {
102 major_root = DEFAULT_MAJOR_ROOT;
103 minor_root = DEFAULT_MINOR_ROOT;
104 }
105 fprintf(stderr, "Root device is (%d, %d)\n", major_root, minor_root);
106
107 file_open(argv[1]);
108 i = read(fd, buf, sizeof(buf));
109 fprintf(stderr, "Boot sector %d bytes.\n", i);
110 if (i != 512)
111 die("Boot block must be exactly 512 bytes");
112 if (buf[510] != 0x55 || buf[511] != 0xaa)
113 die("Boot block hasn't got boot flag (0xAA55)");
114 buf[508] = minor_root;
115 buf[509] = major_root;
116 if (write(1, buf, 512) != 512)
117 die("Write call failed");
118 close(fd);
119
120 /* Copy the setup code */
121 file_open(argv[2]);
122 for (i = 0; (c = read(fd, buf, sizeof(buf))) > 0; i += c)
123 if (write(1, buf, c) != c)
124 die("Write call failed");
125 if (c != 0)
126 die("read-error on `setup'");
127 close(fd);
128
129 /* Pad unused space with zeros */
130 setup_sectors = (i + 511) / 512;
131 /* for compatibility with ancient versions of LILO. */
132 if (setup_sectors < SETUP_SECTS)
133 setup_sectors = SETUP_SECTS;
134 fprintf(stderr, "Setup is %d bytes.\n", i);
135 memset(buf, 0, sizeof(buf));
136 while (i < setup_sectors * 512) {
137 c = setup_sectors * 512 - i;
138 if (c > sizeof(buf))
139 c = sizeof(buf);
140 if (write(1, buf, c) != c)
141 die("Write call failed");
142 i += c;
143 }
144
145 file_open(argv[3]);
146 if (fstat(fd, &sb))
147 die("Unable to stat `%s': %m", argv[3]);
148 sz = sb.st_size;
149 fprintf(stderr, "System is %d kB\n", sz / 1024);
150 sys_size = (sz + 15) / 16;
151 /* 0x28000*16 = 2.5 MB, conservative estimate for the current maximum */
152 if (sys_size > (is_big_kernel ? 0x28000 : DEF_SYSSIZE))
153 die("System is too big. Try using %smodules.",
154 is_big_kernel ? "" : "bzImage or ");
155 if (sys_size > 0xffff)
156 fprintf(stderr,
157 "warning: kernel is too big for standalone boot "
158 "from floppy\n");
159 while (sz > 0) {
160 int l, n;
161
162 l = (sz > sizeof(buf)) ? sizeof(buf) : sz;
163 n = read(fd, buf, l);
164 if (n != l) {
165 if (n < 0)
166 die("Error reading %s: %m", argv[3]);
167 else
168 die("%s: Unexpected EOF", argv[3]);
169 }
170 if (write(1, buf, l) != l)
171 die("Write failed");
172 sz -= l;
173 }
174 close(fd);
175
176 /* Write sizes to the bootsector */
177 if (lseek(1, 497, SEEK_SET) != 497)
178 die("Output: seek failed");
179 buf[0] = setup_sectors;
180 if (write(1, buf, 1) != 1)
181 die("Write of setup sector count failed");
182 if (lseek(1, 500, SEEK_SET) != 500)
183 die("Output: seek failed");
184 buf[0] = (sys_size & 0xff);
185 buf[1] = ((sys_size >> 8) & 0xff);
186 if (write(1, buf, 2) != 2)
187 die("Write of image length failed");
188
189 return 0;
190}
diff --git a/arch/mn10300/configs/asb2303_defconfig b/arch/mn10300/configs/asb2303_defconfig
new file mode 100644
index 000000000000..ca9876a111d3
--- /dev/null
+++ b/arch/mn10300/configs/asb2303_defconfig
@@ -0,0 +1,558 @@
1#
2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.24-rc2
4# Fri Nov 16 13:36:38 2007
5#
6CONFIG_MN10300=y
7CONFIG_AM33=y
8CONFIG_MMU=y
9# CONFIG_HIGHMEM is not set
10# CONFIG_NUMA is not set
11CONFIG_UID16=y
12CONFIG_RWSEM_GENERIC_SPINLOCK=y
13CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
14CONFIG_GENERIC_CALIBRATE_DELAY=y
15CONFIG_GENERIC_FIND_NEXT_BIT=y
16CONFIG_GENERIC_HWEIGHT=y
17CONFIG_GENERIC_TIME=y
18CONFIG_GENERIC_BUG=y
19CONFIG_QUICKLIST=y
20CONFIG_ARCH_HAS_ILOG2_U32=y
21# CONFIG_ARCH_SUPPORTS_AOUT is not set
22CONFIG_GENERIC_HARDIRQS=y
23# CONFIG_HOTPLUG_CPU is not set
24CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
25
26#
27# General setup
28#
29CONFIG_EXPERIMENTAL=y
30CONFIG_BROKEN_ON_SMP=y
31CONFIG_LOCK_KERNEL=y
32CONFIG_INIT_ENV_ARG_LIMIT=32
33CONFIG_LOCALVERSION=""
34CONFIG_LOCALVERSION_AUTO=y
35CONFIG_SYSVIPC=y
36CONFIG_SYSVIPC_SYSCTL=y
37# CONFIG_POSIX_MQUEUE is not set
38CONFIG_BSD_PROCESS_ACCT=y
39# CONFIG_BSD_PROCESS_ACCT_V3 is not set
40# CONFIG_TASKSTATS is not set
41# CONFIG_USER_NS is not set
42# CONFIG_PID_NS is not set
43# CONFIG_AUDIT is not set
44# CONFIG_IKCONFIG is not set
45CONFIG_LOG_BUF_SHIFT=14
46# CONFIG_CGROUPS is not set
47# CONFIG_FAIR_GROUP_SCHED is not set
48# CONFIG_SYSFS_DEPRECATED is not set
49# CONFIG_RELAY is not set
50# CONFIG_BLK_DEV_INITRD is not set
51# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
52CONFIG_SYSCTL=y
53CONFIG_EMBEDDED=y
54CONFIG_SYSCTL_SYSCALL=y
55# CONFIG_KALLSYMS is not set
56# CONFIG_HOTPLUG is not set
57CONFIG_PRINTK=y
58CONFIG_BUG=y
59CONFIG_ELF_CORE=y
60CONFIG_BASE_FULL=y
61CONFIG_FUTEX=y
62CONFIG_ANON_INODES=y
63CONFIG_EPOLL=y
64CONFIG_SIGNALFD=y
65CONFIG_EVENTFD=y
66CONFIG_SHMEM=y
67# CONFIG_VM_EVENT_COUNTERS is not set
68CONFIG_SLAB=y
69# CONFIG_SLUB is not set
70# CONFIG_SLOB is not set
71CONFIG_RT_MUTEXES=y
72# CONFIG_TINY_SHMEM is not set
73CONFIG_BASE_SMALL=0
74# CONFIG_MODULES is not set
75# CONFIG_BLOCK is not set
76
77#
78# Matsushita MN10300 system setup
79#
80CONFIG_MN10300_UNIT_ASB2303=y
81# CONFIG_MN10300_UNIT_ASB2305 is not set
82CONFIG_MN10300_PROC_MN103E010=y
83CONFIG_MN10300_CPU_AM33V2=y
84CONFIG_FPU=y
85CONFIG_MN10300_CACHE_WBACK=y
86# CONFIG_MN10300_CACHE_WTHRU is not set
87# CONFIG_MN10300_CACHE_DISABLED is not set
88
89#
90# Memory layout options
91#
92CONFIG_KERNEL_RAM_BASE_ADDRESS=0x90000000
93CONFIG_INTERRUPT_VECTOR_BASE=0x90000000
94CONFIG_KERNEL_TEXT_ADDRESS=0x90001000
95CONFIG_KERNEL_ZIMAGE_BASE_ADDRESS=0x90700000
96CONFIG_PREEMPT=y
97CONFIG_PREEMPT_BKL=y
98CONFIG_MN10300_CURRENT_IN_E2=y
99CONFIG_MN10300_USING_JTAG=y
100CONFIG_MN10300_RTC=y
101CONFIG_MN10300_WD_TIMER=y
102# CONFIG_ARCH_SUPPORTS_MSI is not set
103
104#
105# MN10300 internal serial options
106#
107CONFIG_MN10300_PROC_HAS_TTYSM0=y
108CONFIG_MN10300_PROC_HAS_TTYSM1=y
109CONFIG_MN10300_PROC_HAS_TTYSM2=y
110CONFIG_MN10300_TTYSM=y
111CONFIG_MN10300_TTYSM_CONSOLE=y
112CONFIG_MN10300_TTYSM0=y
113CONFIG_MN10300_TTYSM0_TIMER8=y
114# CONFIG_MN10300_TTYSM0_TIMER2 is not set
115CONFIG_MN10300_TTYSM1=y
116CONFIG_MN10300_TTYSM1_TIMER9=y
117# CONFIG_MN10300_TTYSM1_TIMER3 is not set
118# CONFIG_MN10300_TTYSM2 is not set
119CONFIG_SELECT_MEMORY_MODEL=y
120CONFIG_FLATMEM_MANUAL=y
121# CONFIG_DISCONTIGMEM_MANUAL is not set
122# CONFIG_SPARSEMEM_MANUAL is not set
123CONFIG_FLATMEM=y
124CONFIG_FLAT_NODE_MEM_MAP=y
125# CONFIG_SPARSEMEM_STATIC is not set
126# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
127CONFIG_SPLIT_PTLOCK_CPUS=4
128# CONFIG_RESOURCES_64BIT is not set
129CONFIG_ZONE_DMA_FLAG=0
130CONFIG_NR_QUICK=1
131CONFIG_VIRT_TO_BUS=y
132
133#
134# Power management options
135#
136# CONFIG_PM is not set
137
138#
139# Executable formats
140#
141CONFIG_BINFMT_ELF=y
142# CONFIG_BINFMT_MISC is not set
143
144#
145# Networking
146#
147CONFIG_NET=y
148
149#
150# Networking options
151#
152CONFIG_PACKET=y
153CONFIG_PACKET_MMAP=y
154CONFIG_UNIX=y
155# CONFIG_NET_KEY is not set
156CONFIG_INET=y
157CONFIG_IP_MULTICAST=y
158# CONFIG_IP_ADVANCED_ROUTER is not set
159CONFIG_IP_FIB_HASH=y
160CONFIG_IP_PNP=y
161# CONFIG_IP_PNP_DHCP is not set
162CONFIG_IP_PNP_BOOTP=y
163# CONFIG_IP_PNP_RARP is not set
164# CONFIG_NET_IPIP is not set
165# CONFIG_NET_IPGRE is not set
166# CONFIG_IP_MROUTE is not set
167# CONFIG_ARPD is not set
168# CONFIG_SYN_COOKIES is not set
169# CONFIG_INET_AH is not set
170# CONFIG_INET_ESP is not set
171# CONFIG_INET_IPCOMP is not set
172# CONFIG_INET_XFRM_TUNNEL is not set
173# CONFIG_INET_TUNNEL is not set
174# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
175# CONFIG_INET_XFRM_MODE_TUNNEL is not set
176# CONFIG_INET_XFRM_MODE_BEET is not set
177# CONFIG_INET_LRO is not set
178# CONFIG_INET_DIAG is not set
179# CONFIG_TCP_CONG_ADVANCED is not set
180CONFIG_TCP_CONG_CUBIC=y
181CONFIG_DEFAULT_TCP_CONG="cubic"
182# CONFIG_TCP_MD5SIG is not set
183# CONFIG_IPV6 is not set
184# CONFIG_INET6_XFRM_TUNNEL is not set
185# CONFIG_INET6_TUNNEL is not set
186# CONFIG_NETWORK_SECMARK is not set
187# CONFIG_NETFILTER is not set
188# CONFIG_IP_DCCP is not set
189# CONFIG_IP_SCTP is not set
190# CONFIG_TIPC is not set
191# CONFIG_ATM is not set
192# CONFIG_BRIDGE is not set
193# CONFIG_VLAN_8021Q is not set
194# CONFIG_DECNET is not set
195# CONFIG_LLC2 is not set
196# CONFIG_IPX is not set
197# CONFIG_ATALK is not set
198# CONFIG_X25 is not set
199# CONFIG_LAPB is not set
200# CONFIG_ECONET is not set
201# CONFIG_WAN_ROUTER is not set
202# CONFIG_NET_SCHED is not set
203
204#
205# Network testing
206#
207# CONFIG_NET_PKTGEN is not set
208# CONFIG_HAMRADIO is not set
209# CONFIG_IRDA is not set
210# CONFIG_BT is not set
211# CONFIG_AF_RXRPC is not set
212
213#
214# Wireless
215#
216# CONFIG_CFG80211 is not set
217# CONFIG_WIRELESS_EXT is not set
218# CONFIG_MAC80211 is not set
219# CONFIG_IEEE80211 is not set
220# CONFIG_RFKILL is not set
221# CONFIG_NET_9P is not set
222
223#
224# Device Drivers
225#
226
227#
228# Generic Driver Options
229#
230CONFIG_STANDALONE=y
231CONFIG_PREVENT_FIRMWARE_BUILD=y
232# CONFIG_SYS_HYPERVISOR is not set
233# CONFIG_CONNECTOR is not set
234CONFIG_MTD=y
235CONFIG_MTD_DEBUG=y
236CONFIG_MTD_DEBUG_VERBOSE=0
237# CONFIG_MTD_CONCAT is not set
238CONFIG_MTD_PARTITIONS=y
239CONFIG_MTD_REDBOOT_PARTS=y
240CONFIG_MTD_REDBOOT_DIRECTORY_BLOCK=-1
241CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED=y
242# CONFIG_MTD_REDBOOT_PARTS_READONLY is not set
243# CONFIG_MTD_CMDLINE_PARTS is not set
244
245#
246# User Modules And Translation Layers
247#
248CONFIG_MTD_CHAR=y
249# CONFIG_MTD_OOPS is not set
250
251#
252# RAM/ROM/Flash chip drivers
253#
254CONFIG_MTD_CFI=y
255CONFIG_MTD_JEDECPROBE=y
256CONFIG_MTD_GEN_PROBE=y
257CONFIG_MTD_CFI_ADV_OPTIONS=y
258CONFIG_MTD_CFI_NOSWAP=y
259# CONFIG_MTD_CFI_BE_BYTE_SWAP is not set
260# CONFIG_MTD_CFI_LE_BYTE_SWAP is not set
261CONFIG_MTD_CFI_GEOMETRY=y
262CONFIG_MTD_MAP_BANK_WIDTH_1=y
263CONFIG_MTD_MAP_BANK_WIDTH_2=y
264CONFIG_MTD_MAP_BANK_WIDTH_4=y
265# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
266# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
267# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
268CONFIG_MTD_CFI_I1=y
269CONFIG_MTD_CFI_I2=y
270CONFIG_MTD_CFI_I4=y
271# CONFIG_MTD_CFI_I8 is not set
272# CONFIG_MTD_OTP is not set
273# CONFIG_MTD_CFI_INTELEXT is not set
274CONFIG_MTD_CFI_AMDSTD=y
275# CONFIG_MTD_CFI_STAA is not set
276CONFIG_MTD_CFI_UTIL=y
277# CONFIG_MTD_RAM is not set
278# CONFIG_MTD_ROM is not set
279# CONFIG_MTD_ABSENT is not set
280
281#
282# Mapping drivers for chip access
283#
284# CONFIG_MTD_COMPLEX_MAPPINGS is not set
285CONFIG_MTD_PHYSMAP=y
286CONFIG_MTD_PHYSMAP_START=0x8000000
287CONFIG_MTD_PHYSMAP_LEN=0x0
288CONFIG_MTD_PHYSMAP_BANKWIDTH=2
289# CONFIG_MTD_PLATRAM is not set
290
291#
292# Self-contained MTD device drivers
293#
294# CONFIG_MTD_SLRAM is not set
295# CONFIG_MTD_PHRAM is not set
296# CONFIG_MTD_MTDRAM is not set
297
298#
299# Disk-On-Chip Device Drivers
300#
301# CONFIG_MTD_DOC2000 is not set
302# CONFIG_MTD_DOC2001 is not set
303# CONFIG_MTD_DOC2001PLUS is not set
304# CONFIG_MTD_NAND is not set
305# CONFIG_MTD_ONENAND is not set
306
307#
308# UBI - Unsorted block images
309#
310# CONFIG_MTD_UBI is not set
311# CONFIG_PARPORT is not set
312CONFIG_MISC_DEVICES=y
313# CONFIG_EEPROM_93CX6 is not set
314
315#
316# SCSI device support
317#
318# CONFIG_SCSI_DMA is not set
319# CONFIG_SCSI_NETLINK is not set
320CONFIG_NETDEVICES=y
321# CONFIG_NETDEVICES_MULTIQUEUE is not set
322# CONFIG_DUMMY is not set
323# CONFIG_BONDING is not set
324# CONFIG_MACVLAN is not set
325# CONFIG_EQUALIZER is not set
326# CONFIG_TUN is not set
327# CONFIG_VETH is not set
328# CONFIG_PHYLIB is not set
329CONFIG_NET_ETHERNET=y
330CONFIG_MII=y
331CONFIG_SMC91X=y
332# CONFIG_IBM_NEW_EMAC_ZMII is not set
333# CONFIG_IBM_NEW_EMAC_RGMII is not set
334# CONFIG_IBM_NEW_EMAC_TAH is not set
335# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
336# CONFIG_B44 is not set
337# CONFIG_NETDEV_1000 is not set
338# CONFIG_NETDEV_10000 is not set
339
340#
341# Wireless LAN
342#
343# CONFIG_WLAN_PRE80211 is not set
344# CONFIG_WLAN_80211 is not set
345# CONFIG_WAN is not set
346# CONFIG_PPP is not set
347# CONFIG_SLIP is not set
348# CONFIG_SHAPER is not set
349# CONFIG_NETCONSOLE is not set
350# CONFIG_NETPOLL is not set
351# CONFIG_NET_POLL_CONTROLLER is not set
352# CONFIG_ISDN is not set
353# CONFIG_PHONE is not set
354
355#
356# Input device support
357#
358# CONFIG_INPUT is not set
359
360#
361# Hardware I/O ports
362#
363# CONFIG_SERIO is not set
364# CONFIG_GAMEPORT is not set
365
366#
367# Character devices
368#
369# CONFIG_VT is not set
370# CONFIG_SERIAL_NONSTANDARD is not set
371
372#
373# Serial drivers
374#
375CONFIG_SERIAL_8250=y
376CONFIG_SERIAL_8250_CONSOLE=y
377CONFIG_SERIAL_8250_NR_UARTS=4
378CONFIG_SERIAL_8250_RUNTIME_UARTS=4
379CONFIG_SERIAL_8250_EXTENDED=y
380# CONFIG_SERIAL_8250_MANY_PORTS is not set
381CONFIG_SERIAL_8250_SHARE_IRQ=y
382# CONFIG_SERIAL_8250_DETECT_IRQ is not set
383# CONFIG_SERIAL_8250_RSA is not set
384
385#
386# Non-8250 serial port support
387#
388CONFIG_SERIAL_CORE=y
389CONFIG_SERIAL_CORE_CONSOLE=y
390CONFIG_UNIX98_PTYS=y
391CONFIG_LEGACY_PTYS=y
392CONFIG_LEGACY_PTY_COUNT=256
393# CONFIG_IPMI_HANDLER is not set
394# CONFIG_HW_RANDOM is not set
395CONFIG_RTC=y
396# CONFIG_R3964 is not set
397# CONFIG_TCG_TPM is not set
398# CONFIG_I2C is not set
399
400#
401# SPI support
402#
403# CONFIG_SPI is not set
404# CONFIG_SPI_MASTER is not set
405# CONFIG_W1 is not set
406# CONFIG_POWER_SUPPLY is not set
407# CONFIG_HWMON is not set
408# CONFIG_WATCHDOG is not set
409
410#
411# Sonics Silicon Backplane
412#
413CONFIG_SSB_POSSIBLE=y
414# CONFIG_SSB is not set
415
416#
417# Multifunction device drivers
418#
419# CONFIG_MFD_SM501 is not set
420
421#
422# Multimedia devices
423#
424# CONFIG_VIDEO_DEV is not set
425# CONFIG_DVB_CORE is not set
426# CONFIG_DAB is not set
427
428#
429# Graphics support
430#
431# CONFIG_VGASTATE is not set
432# CONFIG_VIDEO_OUTPUT_CONTROL is not set
433# CONFIG_FB is not set
434# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
435
436#
437# Display device support
438#
439# CONFIG_DISPLAY_SUPPORT is not set
440
441#
442# Sound
443#
444# CONFIG_SOUND is not set
445# CONFIG_USB_SUPPORT is not set
446# CONFIG_MMC is not set
447# CONFIG_NEW_LEDS is not set
448# CONFIG_RTC_CLASS is not set
449
450#
451# Userspace I/O
452#
453# CONFIG_UIO is not set
454
455#
456# File systems
457#
458CONFIG_INOTIFY=y
459CONFIG_INOTIFY_USER=y
460# CONFIG_QUOTA is not set
461CONFIG_DNOTIFY=y
462# CONFIG_AUTOFS_FS is not set
463# CONFIG_AUTOFS4_FS is not set
464# CONFIG_FUSE_FS is not set
465
466#
467# Pseudo filesystems
468#
469CONFIG_PROC_FS=y
470CONFIG_PROC_KCORE=y
471CONFIG_PROC_SYSCTL=y
472CONFIG_SYSFS=y
473CONFIG_TMPFS=y
474# CONFIG_TMPFS_POSIX_ACL is not set
475# CONFIG_HUGETLB_PAGE is not set
476# CONFIG_CONFIGFS_FS is not set
477
478#
479# Miscellaneous filesystems
480#
481CONFIG_JFFS2_FS=y
482CONFIG_JFFS2_FS_DEBUG=0
483CONFIG_JFFS2_FS_WRITEBUFFER=y
484# CONFIG_JFFS2_FS_WBUF_VERIFY is not set
485# CONFIG_JFFS2_SUMMARY is not set
486# CONFIG_JFFS2_FS_XATTR is not set
487# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
488CONFIG_JFFS2_ZLIB=y
489# CONFIG_JFFS2_LZO is not set
490CONFIG_JFFS2_RTIME=y
491# CONFIG_JFFS2_RUBIN is not set
492CONFIG_NETWORK_FILESYSTEMS=y
493CONFIG_NFS_FS=y
494CONFIG_NFS_V3=y
495# CONFIG_NFS_V3_ACL is not set
496# CONFIG_NFS_V4 is not set
497# CONFIG_NFS_DIRECTIO is not set
498# CONFIG_NFSD is not set
499CONFIG_ROOT_NFS=y
500CONFIG_LOCKD=y
501CONFIG_LOCKD_V4=y
502CONFIG_NFS_COMMON=y
503CONFIG_SUNRPC=y
504# CONFIG_SUNRPC_BIND34 is not set
505# CONFIG_RPCSEC_GSS_KRB5 is not set
506# CONFIG_RPCSEC_GSS_SPKM3 is not set
507# CONFIG_SMB_FS is not set
508# CONFIG_CIFS is not set
509# CONFIG_NCP_FS is not set
510# CONFIG_CODA_FS is not set
511# CONFIG_AFS_FS is not set
512# CONFIG_NLS is not set
513# CONFIG_DLM is not set
514
515#
516# Kernel hacking
517#
518# CONFIG_PRINTK_TIME is not set
519CONFIG_ENABLE_WARN_DEPRECATED=y
520CONFIG_ENABLE_MUST_CHECK=y
521CONFIG_MAGIC_SYSRQ=y
522# CONFIG_UNUSED_SYMBOLS is not set
523# CONFIG_DEBUG_FS is not set
524# CONFIG_HEADERS_CHECK is not set
525# CONFIG_DEBUG_KERNEL is not set
526# CONFIG_DEBUG_BUGVERBOSE is not set
527# CONFIG_SAMPLES is not set
528
529#
530# Security options
531#
532# CONFIG_KEYS is not set
533# CONFIG_SECURITY is not set
534# CONFIG_SECURITY_FILE_CAPABILITIES is not set
535# CONFIG_CRYPTO is not set
536
537#
538# Library routines
539#
540CONFIG_BITREVERSE=y
541# CONFIG_CRC_CCITT is not set
542# CONFIG_CRC16 is not set
543# CONFIG_CRC_ITU_T is not set
544CONFIG_CRC32=y
545# CONFIG_CRC7 is not set
546# CONFIG_LIBCRC32C is not set
547CONFIG_ZLIB_INFLATE=y
548CONFIG_ZLIB_DEFLATE=y
549CONFIG_PLIST=y
550CONFIG_HAS_IOMEM=y
551CONFIG_HAS_IOPORT=y
552CONFIG_HAS_DMA=y
553
554#
555# Profiling support
556#
557CONFIG_PROFILING=y
558CONFIG_OPROFILE=y
diff --git a/arch/mn10300/kernel/Makefile b/arch/mn10300/kernel/Makefile
new file mode 100644
index 000000000000..ef07c956170a
--- /dev/null
+++ b/arch/mn10300/kernel/Makefile
@@ -0,0 +1,27 @@
1#
2# Makefile for the MN10300-specific core kernel code
3#
4extra-y := head.o init_task.o vmlinux.lds
5
6obj-y := process.o semaphore.o signal.o entry.o fpu.o traps.o irq.o \
7 ptrace.o setup.o time.o sys_mn10300.o io.o kthread.o \
8 switch_to.o mn10300_ksyms.o kernel_execve.o
9
10obj-$(CONFIG_MN10300_WD_TIMER) += mn10300-watchdog.o mn10300-watchdog-low.o
11
12obj-$(CONFIG_FPU) += fpu-low.o
13
14obj-$(CONFIG_MN10300_TTYSM) += mn10300-serial.o mn10300-serial-low.o \
15 mn10300-debug.o
16obj-$(CONFIG_GDBSTUB) += gdb-stub.o gdb-low.o
17obj-$(CONFIG_GDBSTUB_ON_TTYSx) += gdb-io-serial.o gdb-io-serial-low.o
18obj-$(CONFIG_GDBSTUB_ON_TTYSMx) += gdb-io-ttysm.o gdb-io-ttysm-low.o
19
20ifneq ($(CONFIG_MN10300_CACHE_DISABLED),y)
21obj-$(CONFIG_GDBSTUB) += gdb-cache.o
22endif
23
24obj-$(CONFIG_MN10300_RTC) += rtc.o
25obj-$(CONFIG_PROFILE) += profile.o profile-low.o
26obj-$(CONFIG_MODULES) += module.o
27obj-$(CONFIG_KPROBES) += kprobes.o
diff --git a/arch/mn10300/kernel/asm-offsets.c b/arch/mn10300/kernel/asm-offsets.c
new file mode 100644
index 000000000000..ee2d9f8af5ad
--- /dev/null
+++ b/arch/mn10300/kernel/asm-offsets.c
@@ -0,0 +1,108 @@
1/*
2 * Generate definitions needed by assembly language modules.
3 * This code generates raw asm output which is post-processed
4 * to extract and format the required data.
5 */
6
7#include <linux/sched.h>
8#include <linux/signal.h>
9#include <linux/personality.h>
10#include <asm/ucontext.h>
11#include <asm/processor.h>
12#include <asm/thread_info.h>
13#include <asm/ptrace.h>
14#include "sigframe.h"
15#include "mn10300-serial.h"
16
17#define DEFINE(sym, val) \
18 asm volatile("\n->" #sym " %0 " #val : : "i" (val))
19
20#define BLANK() asm volatile("\n->")
21
22#define OFFSET(sym, str, mem) \
23 DEFINE(sym, offsetof(struct str, mem));
24
25void foo(void)
26{
27 OFFSET(SIGCONTEXT_d0, sigcontext, d0);
28 OFFSET(SIGCONTEXT_d1, sigcontext, d1);
29 BLANK();
30
31 OFFSET(TI_task, thread_info, task);
32 OFFSET(TI_exec_domain, thread_info, exec_domain);
33 OFFSET(TI_flags, thread_info, flags);
34 OFFSET(TI_cpu, thread_info, cpu);
35 OFFSET(TI_preempt_count, thread_info, preempt_count);
36 OFFSET(TI_addr_limit, thread_info, addr_limit);
37 OFFSET(TI_restart_block, thread_info, restart_block);
38 BLANK();
39
40 OFFSET(REG_D0, pt_regs, d0);
41 OFFSET(REG_D1, pt_regs, d1);
42 OFFSET(REG_D2, pt_regs, d2);
43 OFFSET(REG_D3, pt_regs, d3);
44 OFFSET(REG_A0, pt_regs, a0);
45 OFFSET(REG_A1, pt_regs, a1);
46 OFFSET(REG_A2, pt_regs, a2);
47 OFFSET(REG_A3, pt_regs, a3);
48 OFFSET(REG_E0, pt_regs, e0);
49 OFFSET(REG_E1, pt_regs, e1);
50 OFFSET(REG_E2, pt_regs, e2);
51 OFFSET(REG_E3, pt_regs, e3);
52 OFFSET(REG_E4, pt_regs, e4);
53 OFFSET(REG_E5, pt_regs, e5);
54 OFFSET(REG_E6, pt_regs, e6);
55 OFFSET(REG_E7, pt_regs, e7);
56 OFFSET(REG_SP, pt_regs, sp);
57 OFFSET(REG_EPSW, pt_regs, epsw);
58 OFFSET(REG_PC, pt_regs, pc);
59 OFFSET(REG_LAR, pt_regs, lar);
60 OFFSET(REG_LIR, pt_regs, lir);
61 OFFSET(REG_MDR, pt_regs, mdr);
62 OFFSET(REG_MCVF, pt_regs, mcvf);
63 OFFSET(REG_MCRL, pt_regs, mcrl);
64 OFFSET(REG_MCRH, pt_regs, mcrh);
65 OFFSET(REG_MDRQ, pt_regs, mdrq);
66 OFFSET(REG_ORIG_D0, pt_regs, orig_d0);
67 OFFSET(REG_NEXT, pt_regs, next);
68 DEFINE(REG__END, sizeof(struct pt_regs));
69 BLANK();
70
71 OFFSET(THREAD_UREGS, thread_struct, uregs);
72 OFFSET(THREAD_PC, thread_struct, pc);
73 OFFSET(THREAD_SP, thread_struct, sp);
74 OFFSET(THREAD_A3, thread_struct, a3);
75 OFFSET(THREAD_USP, thread_struct, usp);
76 OFFSET(THREAD_FRAME, thread_struct, __frame);
77 BLANK();
78
79 DEFINE(CLONE_VM_asm, CLONE_VM);
80 DEFINE(CLONE_FS_asm, CLONE_FS);
81 DEFINE(CLONE_FILES_asm, CLONE_FILES);
82 DEFINE(CLONE_SIGHAND_asm, CLONE_SIGHAND);
83 DEFINE(CLONE_UNTRACED_asm, CLONE_UNTRACED);
84 DEFINE(SIGCHLD_asm, SIGCHLD);
85 BLANK();
86
87 OFFSET(EXEC_DOMAIN_handler, exec_domain, handler);
88 OFFSET(RT_SIGFRAME_sigcontext, rt_sigframe, uc.uc_mcontext);
89
90 DEFINE(PAGE_SIZE_asm, PAGE_SIZE);
91
92 OFFSET(__rx_buffer, mn10300_serial_port, rx_buffer);
93 OFFSET(__rx_inp, mn10300_serial_port, rx_inp);
94 OFFSET(__rx_outp, mn10300_serial_port, rx_outp);
95 OFFSET(__tx_info_buffer, mn10300_serial_port, uart.info);
96 OFFSET(__tx_xchar, mn10300_serial_port, tx_xchar);
97 OFFSET(__tx_break, mn10300_serial_port, tx_break);
98 OFFSET(__intr_flags, mn10300_serial_port, intr_flags);
99 OFFSET(__rx_icr, mn10300_serial_port, rx_icr);
100 OFFSET(__tx_icr, mn10300_serial_port, tx_icr);
101 OFFSET(__tm_icr, mn10300_serial_port, _tmicr);
102 OFFSET(__iobase, mn10300_serial_port, _iobase);
103
104 DEFINE(__UART_XMIT_SIZE, UART_XMIT_SIZE);
105 OFFSET(__xmit_buffer, uart_info, xmit.buf);
106 OFFSET(__xmit_head, uart_info, xmit.head);
107 OFFSET(__xmit_tail, uart_info, xmit.tail);
108}
diff --git a/arch/mn10300/kernel/entry.S b/arch/mn10300/kernel/entry.S
new file mode 100644
index 000000000000..11de3606eee6
--- /dev/null
+++ b/arch/mn10300/kernel/entry.S
@@ -0,0 +1,721 @@
1###############################################################################
2#
3# MN10300 Exception and interrupt entry points
4#
5# Copyright (C) 2007 Matsushita Electric Industrial Co., Ltd.
6# Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
7# Modified by David Howells (dhowells@redhat.com)
8#
9# This program is free software; you can redistribute it and/or
10# modify it under the terms of the GNU General Public Licence
11# as published by the Free Software Foundation; either version
12# 2 of the Licence, or (at your option) any later version.
13#
14###############################################################################
15#include <linux/sys.h>
16#include <linux/linkage.h>
17#include <asm/smp.h>
18#include <asm/system.h>
19#include <asm/thread_info.h>
20#include <asm/intctl-regs.h>
21#include <asm/busctl-regs.h>
22#include <asm/timer-regs.h>
23#include <asm/unit/leds.h>
24#include <asm/page.h>
25#include <asm/pgtable.h>
26#include <asm/errno.h>
27#include <asm/asm-offsets.h>
28#include <asm/frame.inc>
29
30#ifdef CONFIG_PREEMPT
31#define preempt_stop __cli
32#else
33#define preempt_stop
34#define resume_kernel restore_all
35#endif
36
37 .macro __cli
38 and ~EPSW_IM,epsw
39 or EPSW_IE|MN10300_CLI_LEVEL,epsw
40 nop
41 nop
42 nop
43 .endm
44 .macro __sti
45 or EPSW_IE|EPSW_IM_7,epsw
46 .endm
47
48
49 .am33_2
50
51###############################################################################
52#
53# the return path for a forked child
54# - on entry, D0 holds the address of the previous task to run
55#
56###############################################################################
57ENTRY(ret_from_fork)
58 call schedule_tail[],0
59 GET_THREAD_INFO a2
60
61 # return 0 to indicate child process
62 clr d0
63 mov d0,(REG_D0,fp)
64 jmp syscall_exit
65
66###############################################################################
67#
68# system call handler
69#
70###############################################################################
71ENTRY(system_call)
72 add -4,sp
73 SAVE_ALL
74 mov d0,(REG_ORIG_D0,fp)
75 GET_THREAD_INFO a2
76 cmp nr_syscalls,d0
77 bcc syscall_badsys
78 btst _TIF_SYSCALL_TRACE,(TI_flags,a2)
79 bne syscall_trace_entry
80syscall_call:
81 add d0,d0,a1
82 add a1,a1
83 mov (REG_A0,fp),d0
84 mov (sys_call_table,a1),a0
85 calls (a0)
86 mov d0,(REG_D0,fp)
87syscall_exit:
88 # make sure we don't miss an interrupt setting need_resched or
89 # sigpending between sampling and the rti
90 __cli
91 mov (TI_flags,a2),d2
92 btst _TIF_ALLWORK_MASK,d2
93 bne syscall_exit_work
94restore_all:
95 RESTORE_ALL
96
97###############################################################################
98#
99# perform work that needs to be done immediately before resumption and syscall
100# tracing
101#
102###############################################################################
103 ALIGN
104syscall_exit_work:
105 btst _TIF_SYSCALL_TRACE,d2
106 beq work_pending
107 __sti # could let do_syscall_trace() call
108 # schedule() instead
109 mov fp,d0
110 mov 1,d1
111 call do_syscall_trace[],0 # do_syscall_trace(regs,entryexit)
112 jmp resume_userspace
113
114 ALIGN
115work_pending:
116 btst _TIF_NEED_RESCHED,d2
117 beq work_notifysig
118
119work_resched:
120 call schedule[],0
121
122 # make sure we don't miss an interrupt setting need_resched or
123 # sigpending between sampling and the rti
124 __cli
125
126 # is there any work to be done other than syscall tracing?
127 mov (TI_flags,a2),d2
128 btst _TIF_WORK_MASK,d2
129 beq restore_all
130 btst _TIF_NEED_RESCHED,d2
131 bne work_resched
132
133 # deal with pending signals and notify-resume requests
134work_notifysig:
135 mov fp,d0
136 mov d2,d1
137 call do_notify_resume[],0
138 jmp resume_userspace
139
140 # perform syscall entry tracing
141syscall_trace_entry:
142 mov -ENOSYS,d0
143 mov d0,(REG_D0,fp)
144 mov fp,d0
145 clr d1
146 call do_syscall_trace[],0
147 mov (REG_ORIG_D0,fp),d0
148 mov (REG_D1,fp),d1
149 cmp nr_syscalls,d0
150 bcs syscall_call
151 jmp syscall_exit
152
153syscall_badsys:
154 mov -ENOSYS,d0
155 mov d0,(REG_D0,fp)
156 jmp resume_userspace
157
158 # userspace resumption stub bypassing syscall exit tracing
159 .globl ret_from_exception, ret_from_intr
160 ALIGN
161ret_from_exception:
162 preempt_stop
163ret_from_intr:
164 GET_THREAD_INFO a2
165 mov (REG_EPSW,fp),d0 # need to deliver signals before
166 # returning to userspace
167 and EPSW_nSL,d0
168 beq resume_kernel # returning to supervisor mode
169
170ENTRY(resume_userspace)
171 # make sure we don't miss an interrupt setting need_resched or
172 # sigpending between sampling and the rti
173 __cli
174
175 # is there any work to be done on int/exception return?
176 mov (TI_flags,a2),d2
177 btst _TIF_WORK_MASK,d2
178 bne work_pending
179 jmp restore_all
180
181#ifdef CONFIG_PREEMPT
182ENTRY(resume_kernel)
183 mov (TI_preempt_count,a2),d0 # non-zero preempt_count ?
184 cmp 0,d0
185 bne restore_all
186
187need_resched:
188 btst _TIF_NEED_RESCHED,(TI_flags,a2)
189 beq restore_all
190 mov (REG_EPSW,fp),d0
191 and EPSW_IM,d0
192 cmp EPSW_IM_7,d0 # interrupts off (exception path) ?
193 beq restore_all
194 call preempt_schedule_irq[],0
195 jmp need_resched
196#endif
197
198
199###############################################################################
200#
201# IRQ handler entry point
202# - intended to be entered at multiple priorities
203#
204###############################################################################
205ENTRY(irq_handler)
206 add -4,sp
207 SAVE_ALL
208
209 # it's not a syscall
210 mov 0xffffffff,d0
211 mov d0,(REG_ORIG_D0,fp)
212
213 mov fp,d0
214 call do_IRQ[],0 # do_IRQ(regs)
215
216 jmp ret_from_intr
217
218###############################################################################
219#
220# Monitor Signal handler entry point
221#
222###############################################################################
223ENTRY(monitor_signal)
224 movbu (0xae000001),d1
225 cmp 1,d1
226 beq monsignal
227 ret [],0
228
229monsignal:
230 or EPSW_NMID,epsw
231 mov d0,a0
232 mov a0,sp
233 mov (REG_EPSW,fp),d1
234 and ~EPSW_nSL,d1
235 mov d1,(REG_EPSW,fp)
236 movm (sp),[d2,d3,a2,a3,exreg0,exreg1,exother]
237 mov (sp),a1
238 mov a1,usp
239 movm (sp),[other]
240 add 4,sp
241here: jmp 0x8e000008-here+0x8e000008
242
243###############################################################################
244#
245# Double Fault handler entry point
246# - note that there will not be a stack, D0/A0 will hold EPSW/PC as were
247#
248###############################################################################
249 .section .bss
250 .balign THREAD_SIZE
251 .space THREAD_SIZE
252__df_stack:
253 .previous
254
255ENTRY(double_fault)
256 mov a0,(__df_stack-4) # PC as was
257 mov d0,(__df_stack-8) # EPSW as was
258 mn10300_set_dbfleds # display 'db-f' on the LEDs
259 mov 0xaa55aa55,d0
260 mov d0,(__df_stack-12) # no ORIG_D0
261 mov sp,a0 # save corrupted SP
262 mov __df_stack-12,sp # emergency supervisor stack
263 SAVE_ALL
264 mov a0,(REG_A0,fp) # save corrupted SP as A0 (which got
265 # clobbered by the CPU)
266 mov fp,d0
267 calls do_double_fault
268double_fault_loop:
269 bra double_fault_loop
270
271###############################################################################
272#
273# Bus Error handler entry point
274# - handle external (async) bus errors separately
275#
276###############################################################################
277ENTRY(raw_bus_error)
278 add -4,sp
279 mov d0,(sp)
280 mov (BCBERR),d0 # what
281 btst BCBERR_BEMR_DMA,d0 # see if it was an external bus error
282 beq __common_exception_aux # it wasn't
283
284 SAVE_ALL
285 mov (BCBEAR),d1 # destination of erroneous access
286
287 mov (REG_ORIG_D0,fp),d2
288 mov d2,(REG_D0,fp)
289 mov -1,d2
290 mov d2,(REG_ORIG_D0,fp)
291
292 add -4,sp
293 mov fp,(12,sp) # frame pointer
294 call io_bus_error[],0
295 jmp restore_all
296
297###############################################################################
298#
299# Miscellaneous exception entry points
300#
301###############################################################################
302ENTRY(nmi_handler)
303 add -4,sp
304 mov d0,(sp)
305 mov (TBR),d0
306 bra __common_exception_nonmi
307
308ENTRY(__common_exception)
309 add -4,sp
310 mov d0,(sp)
311
312__common_exception_aux:
313 mov (TBR),d0
314 and ~EPSW_NMID,epsw # turn NMIs back on if not NMI
315 or EPSW_IE,epsw
316
317__common_exception_nonmi:
318 and 0x0000FFFF,d0 # turn the exception code into a vector
319 # table index
320
321 btst 0x00000007,d0
322 bne 1f
323 cmp 0x00000400,d0
324 bge 1f
325
326 SAVE_ALL # build the stack frame
327
328 mov (REG_D0,fp),a2 # get the exception number
329 mov (REG_ORIG_D0,fp),d0
330 mov d0,(REG_D0,fp)
331 mov -1,d0
332 mov d0,(REG_ORIG_D0,fp)
333
334#ifdef CONFIG_GDBSTUB
335 btst 0x01,(gdbstub_busy)
336 beq 2f
337 and ~EPSW_IE,epsw
338 mov fp,d0
339 mov a2,d1
340 call gdbstub_exception[],0 # gdbstub itself caused an exception
341 bra restore_all
3422:
343#endif
344
345 mov fp,d0 # arg 0: stacked register file
346 mov a2,d1 # arg 1: exception number
347 lsr 1,a2
348
349 mov (exception_table,a2),a2
350 calls (a2)
351 jmp ret_from_exception
352
3531: pi # BUG() equivalent
354
355###############################################################################
356#
357# Exception handler functions table
358#
359###############################################################################
360 .data
361ENTRY(exception_table)
362 .rept 0x400>>1
363 .long uninitialised_exception
364 .endr
365 .previous
366
367###############################################################################
368#
369# Change an entry in the exception table
370# - D0 exception code, D1 handler
371#
372###############################################################################
373ENTRY(set_excp_vector)
374 lsr 1,d0
375 add exception_table,d0
376 mov d1,(d0)
377 mov 4,d1
378#if defined(CONFIG_MN10300_CACHE_WBACK)
379 jmp mn10300_dcache_flush_inv_range2
380#else
381 ret [],0
382#endif
383
384###############################################################################
385#
386# System call table
387#
388###############################################################################
389 .data
390ENTRY(sys_call_table)
391 .long sys_restart_syscall /* 0 */
392 .long sys_exit
393 .long sys_fork
394 .long sys_read
395 .long sys_write
396 .long sys_open /* 5 */
397 .long sys_close
398 .long sys_waitpid
399 .long sys_creat
400 .long sys_link
401 .long sys_unlink /* 10 */
402 .long sys_execve
403 .long sys_chdir
404 .long sys_time
405 .long sys_mknod
406 .long sys_chmod /* 15 */
407 .long sys_lchown16
408 .long sys_ni_syscall /* old break syscall holder */
409 .long sys_stat
410 .long sys_lseek
411 .long sys_getpid /* 20 */
412 .long sys_mount
413 .long sys_oldumount
414 .long sys_setuid16
415 .long sys_getuid16
416 .long sys_stime /* 25 */
417 .long sys_ptrace
418 .long sys_alarm
419 .long sys_fstat
420 .long sys_pause
421 .long sys_utime /* 30 */
422 .long sys_ni_syscall /* old stty syscall holder */
423 .long sys_ni_syscall /* old gtty syscall holder */
424 .long sys_access
425 .long sys_nice
426 .long sys_ni_syscall /* 35 - old ftime syscall holder */
427 .long sys_sync
428 .long sys_kill
429 .long sys_rename
430 .long sys_mkdir
431 .long sys_rmdir /* 40 */
432 .long sys_dup
433 .long sys_pipe
434 .long sys_times
435 .long sys_ni_syscall /* old prof syscall holder */
436 .long sys_brk /* 45 */
437 .long sys_setgid16
438 .long sys_getgid16
439 .long sys_signal
440 .long sys_geteuid16
441 .long sys_getegid16 /* 50 */
442 .long sys_acct
443 .long sys_umount /* recycled never used phys() */
444 .long sys_ni_syscall /* old lock syscall holder */
445 .long sys_ioctl
446 .long sys_fcntl /* 55 */
447 .long sys_ni_syscall /* old mpx syscall holder */
448 .long sys_setpgid
449 .long sys_ni_syscall /* old ulimit syscall holder */
450 .long sys_ni_syscall /* old sys_olduname */
451 .long sys_umask /* 60 */
452 .long sys_chroot
453 .long sys_ustat
454 .long sys_dup2
455 .long sys_getppid
456 .long sys_getpgrp /* 65 */
457 .long sys_setsid
458 .long sys_sigaction
459 .long sys_sgetmask
460 .long sys_ssetmask
461 .long sys_setreuid16 /* 70 */
462 .long sys_setregid16
463 .long sys_sigsuspend
464 .long sys_sigpending
465 .long sys_sethostname
466 .long sys_setrlimit /* 75 */
467 .long sys_old_getrlimit
468 .long sys_getrusage
469 .long sys_gettimeofday
470 .long sys_settimeofday
471 .long sys_getgroups16 /* 80 */
472 .long sys_setgroups16
473 .long old_select
474 .long sys_symlink
475 .long sys_lstat
476 .long sys_readlink /* 85 */
477 .long sys_uselib
478 .long sys_swapon
479 .long sys_reboot
480 .long old_readdir
481 .long old_mmap /* 90 */
482 .long sys_munmap
483 .long sys_truncate
484 .long sys_ftruncate
485 .long sys_fchmod
486 .long sys_fchown16 /* 95 */
487 .long sys_getpriority
488 .long sys_setpriority
489 .long sys_ni_syscall /* old profil syscall holder */
490 .long sys_statfs
491 .long sys_fstatfs /* 100 */
492 .long sys_ni_syscall /* ioperm */
493 .long sys_socketcall
494 .long sys_syslog
495 .long sys_setitimer
496 .long sys_getitimer /* 105 */
497 .long sys_newstat
498 .long sys_newlstat
499 .long sys_newfstat
500 .long sys_ni_syscall /* old sys_uname */
501 .long sys_ni_syscall /* 110 - iopl */
502 .long sys_vhangup
503 .long sys_ni_syscall /* old "idle" system call */
504 .long sys_ni_syscall /* vm86old */
505 .long sys_wait4
506 .long sys_swapoff /* 115 */
507 .long sys_sysinfo
508 .long sys_ipc
509 .long sys_fsync
510 .long sys_sigreturn
511 .long sys_clone /* 120 */
512 .long sys_setdomainname
513 .long sys_newuname
514 .long sys_ni_syscall /* modify_ldt */
515 .long sys_adjtimex
516 .long sys_mprotect /* 125 */
517 .long sys_sigprocmask
518 .long sys_ni_syscall /* old "create_module" */
519 .long sys_init_module
520 .long sys_delete_module
521 .long sys_ni_syscall /* 130: old "get_kernel_syms" */
522 .long sys_quotactl
523 .long sys_getpgid
524 .long sys_fchdir
525 .long sys_bdflush
526 .long sys_sysfs /* 135 */
527 .long sys_personality
528 .long sys_ni_syscall /* reserved for afs_syscall */
529 .long sys_setfsuid16
530 .long sys_setfsgid16
531 .long sys_llseek /* 140 */
532 .long sys_getdents
533 .long sys_select
534 .long sys_flock
535 .long sys_msync
536 .long sys_readv /* 145 */
537 .long sys_writev
538 .long sys_getsid
539 .long sys_fdatasync
540 .long sys_sysctl
541 .long sys_mlock /* 150 */
542 .long sys_munlock
543 .long sys_mlockall
544 .long sys_munlockall
545 .long sys_sched_setparam
546 .long sys_sched_getparam /* 155 */
547 .long sys_sched_setscheduler
548 .long sys_sched_getscheduler
549 .long sys_sched_yield
550 .long sys_sched_get_priority_max
551 .long sys_sched_get_priority_min /* 160 */
552 .long sys_sched_rr_get_interval
553 .long sys_nanosleep
554 .long sys_mremap
555 .long sys_setresuid16
556 .long sys_getresuid16 /* 165 */
557 .long sys_ni_syscall /* vm86 */
558 .long sys_ni_syscall /* Old sys_query_module */
559 .long sys_poll
560 .long sys_nfsservctl
561 .long sys_setresgid16 /* 170 */
562 .long sys_getresgid16
563 .long sys_prctl
564 .long sys_rt_sigreturn
565 .long sys_rt_sigaction
566 .long sys_rt_sigprocmask /* 175 */
567 .long sys_rt_sigpending
568 .long sys_rt_sigtimedwait
569 .long sys_rt_sigqueueinfo
570 .long sys_rt_sigsuspend
571 .long sys_pread64 /* 180 */
572 .long sys_pwrite64
573 .long sys_chown16
574 .long sys_getcwd
575 .long sys_capget
576 .long sys_capset /* 185 */
577 .long sys_sigaltstack
578 .long sys_sendfile
579 .long sys_ni_syscall /* reserved for streams1 */
580 .long sys_ni_syscall /* reserved for streams2 */
581 .long sys_vfork /* 190 */
582 .long sys_getrlimit
583 .long sys_mmap2
584 .long sys_truncate64
585 .long sys_ftruncate64
586 .long sys_stat64 /* 195 */
587 .long sys_lstat64
588 .long sys_fstat64
589 .long sys_lchown
590 .long sys_getuid
591 .long sys_getgid /* 200 */
592 .long sys_geteuid
593 .long sys_getegid
594 .long sys_setreuid
595 .long sys_setregid
596 .long sys_getgroups /* 205 */
597 .long sys_setgroups
598 .long sys_fchown
599 .long sys_setresuid
600 .long sys_getresuid
601 .long sys_setresgid /* 210 */
602 .long sys_getresgid
603 .long sys_chown
604 .long sys_setuid
605 .long sys_setgid
606 .long sys_setfsuid /* 215 */
607 .long sys_setfsgid
608 .long sys_pivot_root
609 .long sys_mincore
610 .long sys_madvise
611 .long sys_getdents64 /* 220 */
612 .long sys_fcntl64
613 .long sys_ni_syscall /* reserved for TUX */
614 .long sys_ni_syscall
615 .long sys_gettid
616 .long sys_readahead /* 225 */
617 .long sys_setxattr
618 .long sys_lsetxattr
619 .long sys_fsetxattr
620 .long sys_getxattr
621 .long sys_lgetxattr /* 230 */
622 .long sys_fgetxattr
623 .long sys_listxattr
624 .long sys_llistxattr
625 .long sys_flistxattr
626 .long sys_removexattr /* 235 */
627 .long sys_lremovexattr
628 .long sys_fremovexattr
629 .long sys_tkill
630 .long sys_sendfile64
631 .long sys_futex /* 240 */
632 .long sys_sched_setaffinity
633 .long sys_sched_getaffinity
634 .long sys_ni_syscall /* sys_set_thread_area */
635 .long sys_ni_syscall /* sys_get_thread_area */
636 .long sys_io_setup /* 245 */
637 .long sys_io_destroy
638 .long sys_io_getevents
639 .long sys_io_submit
640 .long sys_io_cancel
641 .long sys_fadvise64 /* 250 */
642 .long sys_ni_syscall
643 .long sys_exit_group
644 .long sys_lookup_dcookie
645 .long sys_epoll_create
646 .long sys_epoll_ctl /* 255 */
647 .long sys_epoll_wait
648 .long sys_remap_file_pages
649 .long sys_set_tid_address
650 .long sys_timer_create
651 .long sys_timer_settime /* 260 */
652 .long sys_timer_gettime
653 .long sys_timer_getoverrun
654 .long sys_timer_delete
655 .long sys_clock_settime
656 .long sys_clock_gettime /* 265 */
657 .long sys_clock_getres
658 .long sys_clock_nanosleep
659 .long sys_statfs64
660 .long sys_fstatfs64
661 .long sys_tgkill /* 270 */
662 .long sys_utimes
663 .long sys_fadvise64_64
664 .long sys_ni_syscall /* sys_vserver */
665 .long sys_mbind
666 .long sys_get_mempolicy /* 275 */
667 .long sys_set_mempolicy
668 .long sys_mq_open
669 .long sys_mq_unlink
670 .long sys_mq_timedsend
671 .long sys_mq_timedreceive /* 280 */
672 .long sys_mq_notify
673 .long sys_mq_getsetattr
674 .long sys_kexec_load
675 .long sys_waitid
676 .long sys_ni_syscall /* 285 */ /* available */
677 .long sys_add_key
678 .long sys_request_key
679 .long sys_keyctl
680 .long sys_cacheflush
681 .long sys_ioprio_set /* 290 */
682 .long sys_ioprio_get
683 .long sys_inotify_init
684 .long sys_inotify_add_watch
685 .long sys_inotify_rm_watch
686 .long sys_migrate_pages /* 295 */
687 .long sys_openat
688 .long sys_mkdirat
689 .long sys_mknodat
690 .long sys_fchownat
691 .long sys_futimesat /* 300 */
692 .long sys_fstatat64
693 .long sys_unlinkat
694 .long sys_renameat
695 .long sys_linkat
696 .long sys_symlinkat /* 305 */
697 .long sys_readlinkat
698 .long sys_fchmodat
699 .long sys_faccessat
700 .long sys_pselect6
701 .long sys_ppoll /* 310 */
702 .long sys_unshare
703 .long sys_set_robust_list
704 .long sys_get_robust_list
705 .long sys_splice
706 .long sys_sync_file_range /* 315 */
707 .long sys_tee
708 .long sys_vmsplice
709 .long sys_move_pages
710 .long sys_getcpu
711 .long sys_epoll_pwait /* 320 */
712 .long sys_utimensat
713 .long sys_signalfd
714 .long sys_timerfd_create
715 .long sys_eventfd
716 .long sys_fallocate /* 325 */
717 .long sys_timerfd_settime
718 .long sys_timerfd_gettime
719
720
721nr_syscalls=(.-sys_call_table)/4
diff --git a/arch/mn10300/kernel/fpu-low.S b/arch/mn10300/kernel/fpu-low.S
new file mode 100644
index 000000000000..96cfd47e68d5
--- /dev/null
+++ b/arch/mn10300/kernel/fpu-low.S
@@ -0,0 +1,197 @@
1/* MN10300 Low level FPU management operations
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#include <asm/cpu-regs.h>
12
13###############################################################################
14#
15# void fpu_init_state(void)
16# - initialise the FPU
17#
18###############################################################################
19 .globl fpu_init_state
20 .type fpu_init_state,@function
21fpu_init_state:
22 mov epsw,d0
23 or EPSW_FE,epsw
24
25#ifdef CONFIG_MN10300_PROC_MN103E010
26 nop
27 nop
28 nop
29#endif
30 fmov 0,fs0
31 fmov fs0,fs1
32 fmov fs0,fs2
33 fmov fs0,fs3
34 fmov fs0,fs4
35 fmov fs0,fs5
36 fmov fs0,fs6
37 fmov fs0,fs7
38 fmov fs0,fs8
39 fmov fs0,fs9
40 fmov fs0,fs10
41 fmov fs0,fs11
42 fmov fs0,fs12
43 fmov fs0,fs13
44 fmov fs0,fs14
45 fmov fs0,fs15
46 fmov fs0,fs16
47 fmov fs0,fs17
48 fmov fs0,fs18
49 fmov fs0,fs19
50 fmov fs0,fs20
51 fmov fs0,fs21
52 fmov fs0,fs22
53 fmov fs0,fs23
54 fmov fs0,fs24
55 fmov fs0,fs25
56 fmov fs0,fs26
57 fmov fs0,fs27
58 fmov fs0,fs28
59 fmov fs0,fs29
60 fmov fs0,fs30
61 fmov fs0,fs31
62 fmov FPCR_INIT,fpcr
63
64#ifdef CONFIG_MN10300_PROC_MN103E010
65 nop
66 nop
67 nop
68#endif
69 mov d0,epsw
70 ret [],0
71
72 .size fpu_init_state,.-fpu_init_state
73
74###############################################################################
75#
76# void fpu_save(struct fpu_state_struct *)
77# - save the fpu state
78# - note that an FPU Operational exception might occur during this process
79#
80###############################################################################
81 .globl fpu_save
82 .type fpu_save,@function
83fpu_save:
84 mov epsw,d1
85 or EPSW_FE,epsw /* enable the FPU so we can access it */
86
87#ifdef CONFIG_MN10300_PROC_MN103E010
88 nop
89 nop
90#endif
91 mov d0,a0
92 fmov fs0,(a0+)
93 fmov fs1,(a0+)
94 fmov fs2,(a0+)
95 fmov fs3,(a0+)
96 fmov fs4,(a0+)
97 fmov fs5,(a0+)
98 fmov fs6,(a0+)
99 fmov fs7,(a0+)
100 fmov fs8,(a0+)
101 fmov fs9,(a0+)
102 fmov fs10,(a0+)
103 fmov fs11,(a0+)
104 fmov fs12,(a0+)
105 fmov fs13,(a0+)
106 fmov fs14,(a0+)
107 fmov fs15,(a0+)
108 fmov fs16,(a0+)
109 fmov fs17,(a0+)
110 fmov fs18,(a0+)
111 fmov fs19,(a0+)
112 fmov fs20,(a0+)
113 fmov fs21,(a0+)
114 fmov fs22,(a0+)
115 fmov fs23,(a0+)
116 fmov fs24,(a0+)
117 fmov fs25,(a0+)
118 fmov fs26,(a0+)
119 fmov fs27,(a0+)
120 fmov fs28,(a0+)
121 fmov fs29,(a0+)
122 fmov fs30,(a0+)
123 fmov fs31,(a0+)
124 fmov fpcr,d0
125 mov d0,(a0)
126#ifdef CONFIG_MN10300_PROC_MN103E010
127 nop
128 nop
129#endif
130
131 mov d1,epsw
132 ret [],0
133
134 .size fpu_save,.-fpu_save
135
136###############################################################################
137#
138# void fpu_restore(struct fpu_state_struct *)
139# - restore the fpu state
140# - note that an FPU Operational exception might occur during this process
141#
142###############################################################################
143 .globl fpu_restore
144 .type fpu_restore,@function
145fpu_restore:
146 mov epsw,d1
147 or EPSW_FE,epsw /* enable the FPU so we can access it */
148
149#ifdef CONFIG_MN10300_PROC_MN103E010
150 nop
151 nop
152#endif
153 mov d0,a0
154 fmov (a0+),fs0
155 fmov (a0+),fs1
156 fmov (a0+),fs2
157 fmov (a0+),fs3
158 fmov (a0+),fs4
159 fmov (a0+),fs5
160 fmov (a0+),fs6
161 fmov (a0+),fs7
162 fmov (a0+),fs8
163 fmov (a0+),fs9
164 fmov (a0+),fs10
165 fmov (a0+),fs11
166 fmov (a0+),fs12
167 fmov (a0+),fs13
168 fmov (a0+),fs14
169 fmov (a0+),fs15
170 fmov (a0+),fs16
171 fmov (a0+),fs17
172 fmov (a0+),fs18
173 fmov (a0+),fs19
174 fmov (a0+),fs20
175 fmov (a0+),fs21
176 fmov (a0+),fs22
177 fmov (a0+),fs23
178 fmov (a0+),fs24
179 fmov (a0+),fs25
180 fmov (a0+),fs26
181 fmov (a0+),fs27
182 fmov (a0+),fs28
183 fmov (a0+),fs29
184 fmov (a0+),fs30
185 fmov (a0+),fs31
186 mov (a0),d0
187 fmov d0,fpcr
188#ifdef CONFIG_MN10300_PROC_MN103E010
189 nop
190 nop
191 nop
192#endif
193
194 mov d1,epsw
195 ret [],0
196
197 .size fpu_restore,.-fpu_restore
diff --git a/arch/mn10300/kernel/fpu.c b/arch/mn10300/kernel/fpu.c
new file mode 100644
index 000000000000..e705f25ad5ff
--- /dev/null
+++ b/arch/mn10300/kernel/fpu.c
@@ -0,0 +1,223 @@
1/* MN10300 FPU management
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#include <asm/uaccess.h>
12#include <asm/fpu.h>
13#include <asm/elf.h>
14#include <asm/exceptions.h>
15
16struct task_struct *fpu_state_owner;
17
18/*
19 * handle an exception due to the FPU being disabled
20 */
21asmlinkage void fpu_disabled(struct pt_regs *regs, enum exception_code code)
22{
23 struct task_struct *tsk = current;
24
25 if (!user_mode(regs))
26 die_if_no_fixup("An FPU Disabled exception happened in"
27 " kernel space\n",
28 regs, code);
29
30#ifdef CONFIG_FPU
31 preempt_disable();
32
33 /* transfer the last process's FPU state to memory */
34 if (fpu_state_owner) {
35 fpu_save(&fpu_state_owner->thread.fpu_state);
36 fpu_state_owner->thread.uregs->epsw &= ~EPSW_FE;
37 }
38
39 /* the current process now owns the FPU state */
40 fpu_state_owner = tsk;
41 regs->epsw |= EPSW_FE;
42
43 /* load the FPU with the current process's FPU state or invent a new
44 * clean one if the process doesn't have one */
45 if (is_using_fpu(tsk)) {
46 fpu_restore(&tsk->thread.fpu_state);
47 } else {
48 fpu_init_state();
49 set_using_fpu(tsk);
50 }
51
52 preempt_enable();
53#else
54 {
55 siginfo_t info;
56
57 info.si_signo = SIGFPE;
58 info.si_errno = 0;
59 info.si_addr = (void *) tsk->thread.uregs->pc;
60 info.si_code = FPE_FLTINV;
61
62 force_sig_info(SIGFPE, &info, tsk);
63 }
64#endif /* CONFIG_FPU */
65}
66
67/*
68 * handle an FPU operational exception
69 * - there's a possibility that if the FPU is asynchronous, the signal might
70 * be meant for a process other than the current one
71 */
72asmlinkage void fpu_exception(struct pt_regs *regs, enum exception_code code)
73{
74 struct task_struct *tsk = fpu_state_owner;
75 siginfo_t info;
76
77 if (!user_mode(regs))
78 die_if_no_fixup("An FPU Operation exception happened in"
79 " kernel space\n",
80 regs, code);
81
82 if (!tsk)
83 die_if_no_fixup("An FPU Operation exception happened,"
84 " but the FPU is not in use",
85 regs, code);
86
87 info.si_signo = SIGFPE;
88 info.si_errno = 0;
89 info.si_addr = (void *) tsk->thread.uregs->pc;
90 info.si_code = FPE_FLTINV;
91
92#ifdef CONFIG_FPU
93 {
94 u32 fpcr;
95
96 /* get FPCR (we need to enable the FPU whilst we do this) */
97 asm volatile(" or %1,epsw \n"
98#ifdef CONFIG_MN10300_PROC_MN103E010
99 " nop \n"
100 " nop \n"
101 " nop \n"
102#endif
103 " fmov fpcr,%0 \n"
104#ifdef CONFIG_MN10300_PROC_MN103E010
105 " nop \n"
106 " nop \n"
107 " nop \n"
108#endif
109 " and %2,epsw \n"
110 : "=&d"(fpcr)
111 : "i"(EPSW_FE), "i"(~EPSW_FE)
112 );
113
114 if (fpcr & FPCR_EC_Z)
115 info.si_code = FPE_FLTDIV;
116 else if (fpcr & FPCR_EC_O)
117 info.si_code = FPE_FLTOVF;
118 else if (fpcr & FPCR_EC_U)
119 info.si_code = FPE_FLTUND;
120 else if (fpcr & FPCR_EC_I)
121 info.si_code = FPE_FLTRES;
122 }
123#endif
124
125 force_sig_info(SIGFPE, &info, tsk);
126}
127
128/*
129 * save the FPU state to a signal context
130 */
131int fpu_setup_sigcontext(struct fpucontext *fpucontext)
132{
133#ifdef CONFIG_FPU
134 struct task_struct *tsk = current;
135
136 if (!is_using_fpu(tsk))
137 return 0;
138
139 /* transfer the current FPU state to memory and cause fpu_init() to be
140 * triggered by the next attempted FPU operation by the current
141 * process.
142 */
143 preempt_disable();
144
145 if (fpu_state_owner == tsk) {
146 fpu_save(&tsk->thread.fpu_state);
147 fpu_state_owner->thread.uregs->epsw &= ~EPSW_FE;
148 fpu_state_owner = NULL;
149 }
150
151 preempt_enable();
152
153 /* we no longer have a valid current FPU state */
154 clear_using_fpu(tsk);
155
156 /* transfer the saved FPU state onto the userspace stack */
157 if (copy_to_user(fpucontext,
158 &tsk->thread.fpu_state,
159 min(sizeof(struct fpu_state_struct),
160 sizeof(struct fpucontext))))
161 return -1;
162
163 return 1;
164#else
165 return 0;
166#endif
167}
168
169/*
170 * kill a process's FPU state during restoration after signal handling
171 */
172void fpu_kill_state(struct task_struct *tsk)
173{
174#ifdef CONFIG_FPU
175 /* disown anything left in the FPU */
176 preempt_disable();
177
178 if (fpu_state_owner == tsk) {
179 fpu_state_owner->thread.uregs->epsw &= ~EPSW_FE;
180 fpu_state_owner = NULL;
181 }
182
183 preempt_enable();
184#endif
185 /* we no longer have a valid current FPU state */
186 clear_using_fpu(tsk);
187}
188
189/*
190 * restore the FPU state from a signal context
191 */
192int fpu_restore_sigcontext(struct fpucontext *fpucontext)
193{
194 struct task_struct *tsk = current;
195 int ret;
196
197 /* load up the old FPU state */
198 ret = copy_from_user(&tsk->thread.fpu_state,
199 fpucontext,
200 min(sizeof(struct fpu_state_struct),
201 sizeof(struct fpucontext)));
202 if (!ret)
203 set_using_fpu(tsk);
204
205 return ret;
206}
207
208/*
209 * fill in the FPU structure for a core dump
210 */
211int dump_fpu(struct pt_regs *regs, elf_fpregset_t *fpreg)
212{
213 struct task_struct *tsk = current;
214 int fpvalid;
215
216 fpvalid = is_using_fpu(tsk);
217 if (fpvalid) {
218 unlazy_fpu(tsk);
219 memcpy(fpreg, &tsk->thread.fpu_state, sizeof(*fpreg));
220 }
221
222 return fpvalid;
223}
diff --git a/arch/mn10300/kernel/gdb-cache.S b/arch/mn10300/kernel/gdb-cache.S
new file mode 100644
index 000000000000..1108badc3d32
--- /dev/null
+++ b/arch/mn10300/kernel/gdb-cache.S
@@ -0,0 +1,105 @@
1###############################################################################
2#
3# MN10300 Low-level cache purging routines for gdbstub
4#
5# Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
6# Written by David Howells (dhowells@redhat.com)
7#
8# This program is free software; you can redistribute it and/or
9# modify it under the terms of the GNU General Public Licence
10# as published by the Free Software Foundation; either version
11# 2 of the Licence, or (at your option) any later version.
12#
13###############################################################################
14#include <linux/sys.h>
15#include <linux/linkage.h>
16#include <asm/smp.h>
17#include <asm/cache.h>
18#include <asm/cpu-regs.h>
19#include <asm/exceptions.h>
20#include <asm/frame.inc>
21#include <asm/serial-regs.h>
22
23 .text
24
25###############################################################################
26#
27# GDB stub cache purge
28#
29###############################################################################
30 .type gdbstub_purge_cache,@function
31ENTRY(gdbstub_purge_cache)
32 #######################################################################
33 # read the addresses tagged in the cache's tag RAM and attempt to flush
34 # those addresses specifically
35 # - we rely on the hardware to filter out invalid tag entry addresses
36 mov DCACHE_TAG(0,0),a0 # dcache tag RAM access address
37 mov DCACHE_PURGE(0,0),a1 # dcache purge request address
38 mov L1_CACHE_NWAYS*L1_CACHE_NENTRIES,d1 # total number of entries
39
40mn10300_dcache_flush_loop:
41 mov (a0),d0
42 and L1_CACHE_TAG_ADDRESS|L1_CACHE_TAG_ENTRY,d0
43 or L1_CACHE_TAG_VALID,d0 # retain valid entries in the
44 # cache
45 mov d0,(a1) # conditional purge
46
47mn10300_dcache_flush_skip:
48 add L1_CACHE_BYTES,a0
49 add L1_CACHE_BYTES,a1
50 add -1,d1
51 bne mn10300_dcache_flush_loop
52
53;; # unconditionally flush and invalidate the dcache
54;; mov DCACHE_PURGE(0,0),a1 # dcache purge request address
55;; mov L1_CACHE_NWAYS*L1_CACHE_NENTRIES,d1 # total number of
56;; # entries
57;;
58;; gdbstub_purge_cache__dcache_loop:
59;; mov (a1),d0 # unconditional purge
60;;
61;; add L1_CACHE_BYTES,a1
62;; add -1,d1
63;; bne gdbstub_purge_cache__dcache_loop
64
65 #######################################################################
66 # now invalidate the icache
67 mov CHCTR,a0
68 movhu (a0),a1
69
70 mov epsw,d1
71 and ~EPSW_IE,epsw
72 nop
73 nop
74
75 # disable the icache
76 and ~CHCTR_ICEN,d0
77 movhu d0,(a0)
78
79 # and wait for it to calm down
80 setlb
81 movhu (a0),d0
82 btst CHCTR_ICBUSY,d0
83 lne
84
85 # invalidate
86 or CHCTR_ICINV,d0
87 movhu d0,(a0)
88
89 # wait for the cache to finish
90 mov CHCTR,a0
91 setlb
92 movhu (a0),d0
93 btst CHCTR_ICBUSY,d0
94 lne
95
96 # and reenable it
97 movhu a1,(a0)
98 movhu (a0),d0 # read back to flush
99 # (SIGILLs all over without this)
100
101 mov d1,epsw
102
103 ret [],0
104
105 .size gdbstub_purge_cache,.-gdbstub_purge_cache
diff --git a/arch/mn10300/kernel/gdb-io-serial-low.S b/arch/mn10300/kernel/gdb-io-serial-low.S
new file mode 100644
index 000000000000..c68dcd052201
--- /dev/null
+++ b/arch/mn10300/kernel/gdb-io-serial-low.S
@@ -0,0 +1,90 @@
1###############################################################################
2#
3# 16550 serial Rx interrupt handler for gdbstub I/O
4#
5# Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
6# Written by David Howells (dhowells@redhat.com)
7#
8# This program is free software; you can redistribute it and/or
9# modify it under the terms of the GNU General Public Licence
10# as published by the Free Software Foundation; either version
11# 2 of the Licence, or (at your option) any later version.
12#
13###############################################################################
14#include <linux/sys.h>
15#include <linux/linkage.h>
16#include <asm/smp.h>
17#include <asm/cpu-regs.h>
18#include <asm/thread_info.h>
19#include <asm/frame.inc>
20#include <asm/intctl-regs.h>
21#include <asm/unit/serial.h>
22
23 .text
24
25###############################################################################
26#
27# GDB stub serial receive interrupt entry point
28# - intended to run at interrupt priority 0
29#
30###############################################################################
31 .globl gdbstub_io_rx_handler
32 .type gdbstub_io_rx_handler,@function
33gdbstub_io_rx_handler:
34 movm [d2,d3,a2,a3],(sp)
35
36#if 1
37 movbu (GDBPORT_SERIAL_IIR),d2
38#endif
39
40 mov (gdbstub_rx_inp),a3
41gdbstub_io_rx_more:
42 mov a3,a2
43 add 2,a3
44 and 0x00000fff,a3
45 mov (gdbstub_rx_outp),d3
46 cmp a3,d3
47 beq gdbstub_io_rx_overflow
48
49 movbu (GDBPORT_SERIAL_LSR),d3
50 btst UART_LSR_DR,d3
51 beq gdbstub_io_rx_done
52 movbu (GDBPORT_SERIAL_RX),d2
53 movbu d3,(gdbstub_rx_buffer+1,a2)
54 movbu d2,(gdbstub_rx_buffer,a2)
55 mov a3,(gdbstub_rx_inp)
56 bra gdbstub_io_rx_more
57
58gdbstub_io_rx_done:
59 mov GxICR_DETECT,d2
60 movbu d2,(XIRQxICR(GDBPORT_SERIAL_IRQ)) # ACK the interrupt
61 movhu (XIRQxICR(GDBPORT_SERIAL_IRQ)),d2 # flush
62 movm (sp),[d2,d3,a2,a3]
63 bset 0x01,(gdbstub_busy)
64 beq gdbstub_io_rx_enter
65 rti
66
67gdbstub_io_rx_overflow:
68 bset 0x01,(gdbstub_rx_overflow)
69 bra gdbstub_io_rx_done
70
71gdbstub_io_rx_enter:
72 or EPSW_IE|EPSW_IM_1,epsw
73 add -4,sp
74 SAVE_ALL
75
76 mov 0xffffffff,d0
77 mov d0,(REG_ORIG_D0,fp)
78 mov 0x280,d1
79
80 mov fp,d0
81 call gdbstub_rx_irq[],0 # gdbstub_rx_irq(regs,excep)
82
83 and ~EPSW_IE,epsw
84 bclr 0x01,(gdbstub_busy)
85
86 .globl gdbstub_return
87gdbstub_return:
88 RESTORE_ALL
89
90 .size gdbstub_io_rx_handler,.-gdbstub_io_rx_handler
diff --git a/arch/mn10300/kernel/gdb-io-serial.c b/arch/mn10300/kernel/gdb-io-serial.c
new file mode 100644
index 000000000000..9a6d4e8ebe73
--- /dev/null
+++ b/arch/mn10300/kernel/gdb-io-serial.c
@@ -0,0 +1,155 @@
1/* 16550 serial driver for gdbstub I/O
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#include <linux/string.h>
12#include <linux/kernel.h>
13#include <linux/signal.h>
14#include <linux/sched.h>
15#include <linux/mm.h>
16#include <linux/console.h>
17#include <linux/init.h>
18#include <linux/nmi.h>
19
20#include <asm/pgtable.h>
21#include <asm/system.h>
22#include <asm/gdb-stub.h>
23#include <asm/exceptions.h>
24#include <asm/serial-regs.h>
25#include <asm/unit/serial.h>
26
27/*
28 * initialise the GDB stub
29 */
30void gdbstub_io_init(void)
31{
32 u16 tmp;
33
34 /* set up the serial port */
35 GDBPORT_SERIAL_LCR = UART_LCR_WLEN8; /* 1N8 */
36 GDBPORT_SERIAL_FCR = (UART_FCR_ENABLE_FIFO | UART_FCR_CLEAR_RCVR |
37 UART_FCR_CLEAR_XMIT);
38
39 FLOWCTL_CLEAR(DTR);
40 FLOWCTL_SET(RTS);
41
42 gdbstub_io_set_baud(115200);
43
44 /* we want to get serial receive interrupts */
45 XIRQxICR(GDBPORT_SERIAL_IRQ) = 0;
46 tmp = XIRQxICR(GDBPORT_SERIAL_IRQ);
47
48 IVAR0 = EXCEP_IRQ_LEVEL0;
49 set_intr_stub(EXCEP_IRQ_LEVEL0, gdbstub_io_rx_handler);
50
51 XIRQxICR(GDBPORT_SERIAL_IRQ) &= ~GxICR_REQUEST;
52 XIRQxICR(GDBPORT_SERIAL_IRQ) = GxICR_ENABLE | GxICR_LEVEL_0;
53 tmp = XIRQxICR(GDBPORT_SERIAL_IRQ);
54
55 GDBPORT_SERIAL_IER = UART_IER_RDI | UART_IER_RLSI;
56
57 /* permit level 0 IRQs to take place */
58 asm volatile(
59 " and %0,epsw \n"
60 " or %1,epsw \n"
61 :
62 : "i"(~EPSW_IM), "i"(EPSW_IE | EPSW_IM_1)
63 );
64}
65
66/*
67 * set up the GDB stub serial port baud rate timers
68 */
69void gdbstub_io_set_baud(unsigned baud)
70{
71 unsigned value;
72 u8 lcr;
73
74 value = 18432000 / 16 / baud;
75
76 lcr = GDBPORT_SERIAL_LCR;
77 GDBPORT_SERIAL_LCR |= UART_LCR_DLAB;
78 GDBPORT_SERIAL_DLL = value & 0xff;
79 GDBPORT_SERIAL_DLM = (value >> 8) & 0xff;
80 GDBPORT_SERIAL_LCR = lcr;
81}
82
83/*
84 * wait for a character to come from the debugger
85 */
86int gdbstub_io_rx_char(unsigned char *_ch, int nonblock)
87{
88 unsigned ix;
89 u8 ch, st;
90
91 *_ch = 0xff;
92
93 if (gdbstub_rx_unget) {
94 *_ch = gdbstub_rx_unget;
95 gdbstub_rx_unget = 0;
96 return 0;
97 }
98
99 try_again:
100 /* pull chars out of the buffer */
101 ix = gdbstub_rx_outp;
102 if (ix == gdbstub_rx_inp) {
103 if (nonblock)
104 return -EAGAIN;
105#ifdef CONFIG_MN10300_WD_TIMER
106 watchdog_alert_counter = 0;
107#endif /* CONFIG_MN10300_WD_TIMER */
108 goto try_again;
109 }
110
111 ch = gdbstub_rx_buffer[ix++];
112 st = gdbstub_rx_buffer[ix++];
113 gdbstub_rx_outp = ix & 0x00000fff;
114
115 if (st & UART_LSR_BI) {
116 gdbstub_proto("### GDB Rx Break Detected ###\n");
117 return -EINTR;
118 } else if (st & (UART_LSR_FE | UART_LSR_OE | UART_LSR_PE)) {
119 gdbstub_proto("### GDB Rx Error (st=%02x) ###\n", st);
120 return -EIO;
121 } else {
122 gdbstub_proto("### GDB Rx %02x (st=%02x) ###\n", ch, st);
123 *_ch = ch & 0x7f;
124 return 0;
125 }
126}
127
128/*
129 * send a character to the debugger
130 */
131void gdbstub_io_tx_char(unsigned char ch)
132{
133 FLOWCTL_SET(DTR);
134 LSR_WAIT_FOR(THRE);
135 /* FLOWCTL_WAIT_FOR(CTS); */
136
137 if (ch == 0x0a) {
138 GDBPORT_SERIAL_TX = 0x0d;
139 LSR_WAIT_FOR(THRE);
140 /* FLOWCTL_WAIT_FOR(CTS); */
141 }
142 GDBPORT_SERIAL_TX = ch;
143
144 FLOWCTL_CLEAR(DTR);
145}
146
147/*
148 * send a character to the debugger
149 */
150void gdbstub_io_tx_flush(void)
151{
152 LSR_WAIT_FOR(TEMT);
153 LSR_WAIT_FOR(THRE);
154 FLOWCTL_CLEAR(DTR);
155}
diff --git a/arch/mn10300/kernel/gdb-io-ttysm-low.S b/arch/mn10300/kernel/gdb-io-ttysm-low.S
new file mode 100644
index 000000000000..677c7876307c
--- /dev/null
+++ b/arch/mn10300/kernel/gdb-io-ttysm-low.S
@@ -0,0 +1,93 @@
1###############################################################################
2#
3# MN10300 On-chip serial Rx interrupt handler for GDB stub I/O
4#
5# Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
6# Written by David Howells (dhowells@redhat.com)
7#
8# This program is free software; you can redistribute it and/or
9# modify it under the terms of the GNU General Public Licence
10# as published by the Free Software Foundation; either version
11# 2 of the Licence, or (at your option) any later version.
12#
13###############################################################################
14#include <linux/sys.h>
15#include <linux/linkage.h>
16#include <asm/smp.h>
17#include <asm/thread_info.h>
18#include <asm/cpu-regs.h>
19#include <asm/frame.inc>
20#include <asm/intctl-regs.h>
21#include <asm/unit/serial.h>
22#include "mn10300-serial.h"
23
24 .text
25
26###############################################################################
27#
28# GDB stub serial receive interrupt entry point
29# - intended to run at interrupt priority 0
30#
31###############################################################################
32 .globl gdbstub_io_rx_handler
33 .type gdbstub_io_rx_handler,@function
34gdbstub_io_rx_handler:
35 movm [d2,d3,a2,a3],(sp)
36
37 mov (gdbstub_rx_inp),a3
38gdbstub_io_rx_more:
39 mov a3,a2
40 add 2,a3
41 and PAGE_SIZE_asm-1,a3
42 mov (gdbstub_rx_outp),d3
43 cmp a3,d3
44 beq gdbstub_io_rx_overflow
45
46 movbu (SCgSTR),d3
47 btst SC01STR_RBF,d3
48 beq gdbstub_io_rx_done
49 movbu (SCgRXB),d2
50 movbu d3,(gdbstub_rx_buffer+1,a2)
51 movbu d2,(gdbstub_rx_buffer,a2)
52 mov a3,(gdbstub_rx_inp)
53 bra gdbstub_io_rx_more
54
55gdbstub_io_rx_done:
56 mov GxICR_DETECT,d2
57 movbu d2,(GxICR(SCgRXIRQ)) # ACK the interrupt
58 movhu (GxICR(SCgRXIRQ)),d2 # flush
59
60 movm (sp),[d2,d3,a2,a3]
61 bset 0x01,(gdbstub_busy)
62 beq gdbstub_io_rx_enter
63 rti
64
65gdbstub_io_rx_overflow:
66 bset 0x01,(gdbstub_rx_overflow)
67 bra gdbstub_io_rx_done
68
69###############################################################################
70#
71# debugging interrupt - enter the GDB stub proper
72#
73###############################################################################
74gdbstub_io_rx_enter:
75 or EPSW_IE|EPSW_IM_1,epsw
76 add -4,sp
77 SAVE_ALL
78
79 mov 0xffffffff,d0
80 mov d0,(REG_ORIG_D0,fp)
81 mov 0x280,d1
82
83 mov fp,d0
84 call gdbstub_rx_irq[],0 # gdbstub_io_rx_irq(regs,excep)
85
86 and ~EPSW_IE,epsw
87 bclr 0x01,(gdbstub_busy)
88
89 .globl gdbstub_return
90gdbstub_return:
91 RESTORE_ALL
92
93 .size gdbstub_io_rx_handler,.-gdbstub_io_rx_handler
diff --git a/arch/mn10300/kernel/gdb-io-ttysm.c b/arch/mn10300/kernel/gdb-io-ttysm.c
new file mode 100644
index 000000000000..c5451592d403
--- /dev/null
+++ b/arch/mn10300/kernel/gdb-io-ttysm.c
@@ -0,0 +1,299 @@
1/* MN10300 On-chip serial driver for gdbstub I/O
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#include <linux/string.h>
12#include <linux/kernel.h>
13#include <linux/signal.h>
14#include <linux/sched.h>
15#include <linux/mm.h>
16#include <linux/console.h>
17#include <linux/init.h>
18#include <linux/tty.h>
19#include <asm/pgtable.h>
20#include <asm/system.h>
21#include <asm/gdb-stub.h>
22#include <asm/exceptions.h>
23#include <asm/unit/clock.h>
24#include "mn10300-serial.h"
25
26#if defined(CONFIG_GDBSTUB_ON_TTYSM0)
27struct mn10300_serial_port *const gdbstub_port = &mn10300_serial_port_sif0;
28#elif defined(CONFIG_GDBSTUB_ON_TTYSM1)
29struct mn10300_serial_port *const gdbstub_port = &mn10300_serial_port_sif1;
30#else
31struct mn10300_serial_port *const gdbstub_port = &mn10300_serial_port_sif2;
32#endif
33
34
35/*
36 * initialise the GDB stub I/O routines
37 */
38void __init gdbstub_io_init(void)
39{
40 uint16_t scxctr;
41 int tmp;
42
43 switch (gdbstub_port->clock_src) {
44 case MNSCx_CLOCK_SRC_IOCLK:
45 gdbstub_port->ioclk = MN10300_IOCLK;
46 break;
47
48#ifdef MN10300_IOBCLK
49 case MNSCx_CLOCK_SRC_IOBCLK:
50 gdbstub_port->ioclk = MN10300_IOBCLK;
51 break;
52#endif
53 default:
54 BUG();
55 }
56
57 /* set up the serial port */
58 gdbstub_io_set_baud(115200);
59
60 /* we want to get serial receive interrupts */
61 set_intr_level(gdbstub_port->rx_irq, GxICR_LEVEL_0);
62 set_intr_level(gdbstub_port->tx_irq, GxICR_LEVEL_0);
63 set_intr_stub(EXCEP_IRQ_LEVEL0, gdbstub_io_rx_handler);
64
65 *gdbstub_port->rx_icr |= GxICR_ENABLE;
66 tmp = *gdbstub_port->rx_icr;
67
68 /* enable the device */
69 scxctr = SC01CTR_CLN_8BIT; /* 1N8 */
70 switch (gdbstub_port->div_timer) {
71 case MNSCx_DIV_TIMER_16BIT:
72 scxctr |= SC0CTR_CK_TM8UFLOW_8; /* == SC1CTR_CK_TM9UFLOW_8
73 == SC2CTR_CK_TM10UFLOW_8 */
74 break;
75
76 case MNSCx_DIV_TIMER_8BIT:
77 scxctr |= SC0CTR_CK_TM2UFLOW_8;
78 break;
79 }
80
81 scxctr |= SC01CTR_TXE | SC01CTR_RXE;
82
83 *gdbstub_port->_control = scxctr;
84 tmp = *gdbstub_port->_control;
85
86 /* permit level 0 IRQs only */
87 asm volatile(
88 " and %0,epsw \n"
89 " or %1,epsw \n"
90 :
91 : "i"(~EPSW_IM), "i"(EPSW_IE|EPSW_IM_1)
92 );
93}
94
95/*
96 * set up the GDB stub serial port baud rate timers
97 */
98void gdbstub_io_set_baud(unsigned baud)
99{
100 const unsigned bits = 10; /* 1 [start] + 8 [data] + 0 [parity] +
101 * 1 [stop] */
102 unsigned long ioclk = gdbstub_port->ioclk;
103 unsigned xdiv, tmp;
104 uint16_t tmxbr;
105 uint8_t tmxmd;
106
107 if (!baud) {
108 baud = 9600;
109 } else if (baud == 134) {
110 baud = 269; /* 134 is really 134.5 */
111 xdiv = 2;
112 }
113
114try_alternative:
115 xdiv = 1;
116
117 switch (gdbstub_port->div_timer) {
118 case MNSCx_DIV_TIMER_16BIT:
119 tmxmd = TM8MD_SRC_IOCLK;
120 tmxbr = tmp = (ioclk / (baud * xdiv) + 4) / 8 - 1;
121 if (tmp > 0 && tmp <= 65535)
122 goto timer_okay;
123
124 tmxmd = TM8MD_SRC_IOCLK_8;
125 tmxbr = tmp = (ioclk / (baud * 8 * xdiv) + 4) / 8 - 1;
126 if (tmp > 0 && tmp <= 65535)
127 goto timer_okay;
128
129 tmxmd = TM8MD_SRC_IOCLK_32;
130 tmxbr = tmp = (ioclk / (baud * 32 * xdiv) + 4) / 8 - 1;
131 if (tmp > 0 && tmp <= 65535)
132 goto timer_okay;
133
134 break;
135
136 case MNSCx_DIV_TIMER_8BIT:
137 tmxmd = TM2MD_SRC_IOCLK;
138 tmxbr = tmp = (ioclk / (baud * xdiv) + 4) / 8 - 1;
139 if (tmp > 0 && tmp <= 255)
140 goto timer_okay;
141
142 tmxmd = TM2MD_SRC_IOCLK_8;
143 tmxbr = tmp = (ioclk / (baud * 8 * xdiv) + 4) / 8 - 1;
144 if (tmp > 0 && tmp <= 255)
145 goto timer_okay;
146
147 tmxmd = TM2MD_SRC_IOCLK_32;
148 tmxbr = tmp = (ioclk / (baud * 32 * xdiv) + 4) / 8 - 1;
149 if (tmp > 0 && tmp <= 255)
150 goto timer_okay;
151 break;
152 }
153
154 /* as a last resort, if the quotient is zero, default to 9600 bps */
155 baud = 9600;
156 goto try_alternative;
157
158timer_okay:
159 gdbstub_port->uart.timeout = (2 * bits * HZ) / baud;
160 gdbstub_port->uart.timeout += HZ / 50;
161
162 /* set the timer to produce the required baud rate */
163 switch (gdbstub_port->div_timer) {
164 case MNSCx_DIV_TIMER_16BIT:
165 *gdbstub_port->_tmxmd = 0;
166 *gdbstub_port->_tmxbr = tmxbr;
167 *gdbstub_port->_tmxmd = TM8MD_INIT_COUNTER;
168 *gdbstub_port->_tmxmd = tmxmd | TM8MD_COUNT_ENABLE;
169 break;
170
171 case MNSCx_DIV_TIMER_8BIT:
172 *gdbstub_port->_tmxmd = 0;
173 *(volatile u8 *) gdbstub_port->_tmxbr = (u8)tmxbr;
174 *gdbstub_port->_tmxmd = TM2MD_INIT_COUNTER;
175 *gdbstub_port->_tmxmd = tmxmd | TM2MD_COUNT_ENABLE;
176 break;
177 }
178}
179
180/*
181 * wait for a character to come from the debugger
182 */
183int gdbstub_io_rx_char(unsigned char *_ch, int nonblock)
184{
185 unsigned ix;
186 u8 ch, st;
187
188 *_ch = 0xff;
189
190 if (gdbstub_rx_unget) {
191 *_ch = gdbstub_rx_unget;
192 gdbstub_rx_unget = 0;
193 return 0;
194 }
195
196try_again:
197 /* pull chars out of the buffer */
198 ix = gdbstub_rx_outp;
199 if (ix == gdbstub_rx_inp) {
200 if (nonblock)
201 return -EAGAIN;
202#ifdef CONFIG_MN10300_WD_TIMER
203 watchdog_alert_counter = 0;
204#endif /* CONFIG_MN10300_WD_TIMER */
205 goto try_again;
206 }
207
208 ch = gdbstub_rx_buffer[ix++];
209 st = gdbstub_rx_buffer[ix++];
210 gdbstub_rx_outp = ix & (PAGE_SIZE - 1);
211
212 st &= SC01STR_RXF | SC01STR_RBF | SC01STR_FEF | SC01STR_PEF |
213 SC01STR_OEF;
214
215 /* deal with what we've got
216 * - note that the UART doesn't do BREAK-detection for us
217 */
218 if (st & SC01STR_FEF && ch == 0) {
219 switch (gdbstub_port->rx_brk) {
220 case 0: gdbstub_port->rx_brk = 1; goto try_again;
221 case 1: gdbstub_port->rx_brk = 2; goto try_again;
222 case 2:
223 gdbstub_port->rx_brk = 3;
224 gdbstub_proto("### GDB MNSERIAL Rx Break Detected"
225 " ###\n");
226 return -EINTR;
227 default:
228 goto try_again;
229 }
230 } else if (st & SC01STR_FEF) {
231 if (gdbstub_port->rx_brk)
232 goto try_again;
233
234 gdbstub_proto("### GDB MNSERIAL Framing Error ###\n");
235 return -EIO;
236 } else if (st & SC01STR_OEF) {
237 if (gdbstub_port->rx_brk)
238 goto try_again;
239
240 gdbstub_proto("### GDB MNSERIAL Overrun Error ###\n");
241 return -EIO;
242 } else if (st & SC01STR_PEF) {
243 if (gdbstub_port->rx_brk)
244 goto try_again;
245
246 gdbstub_proto("### GDB MNSERIAL Parity Error ###\n");
247 return -EIO;
248 } else {
249 /* look for the tail-end char on a break run */
250 if (gdbstub_port->rx_brk == 3) {
251 switch (ch) {
252 case 0xFF:
253 case 0xFE:
254 case 0xFC:
255 case 0xF8:
256 case 0xF0:
257 case 0xE0:
258 case 0xC0:
259 case 0x80:
260 case 0x00:
261 gdbstub_port->rx_brk = 0;
262 goto try_again;
263 default:
264 break;
265 }
266 }
267
268 gdbstub_port->rx_brk = 0;
269 gdbstub_io("### GDB Rx %02x (st=%02x) ###\n", ch, st);
270 *_ch = ch & 0x7f;
271 return 0;
272 }
273}
274
275/*
276 * send a character to the debugger
277 */
278void gdbstub_io_tx_char(unsigned char ch)
279{
280 while (*gdbstub_port->_status & SC01STR_TBF)
281 continue;
282
283 if (ch == 0x0a) {
284 *(u8 *) gdbstub_port->_txb = 0x0d;
285 while (*gdbstub_port->_status & SC01STR_TBF)
286 continue;
287 }
288
289 *(u8 *) gdbstub_port->_txb = ch;
290}
291
292/*
293 * flush the transmission buffers
294 */
295void gdbstub_io_tx_flush(void)
296{
297 while (*gdbstub_port->_status & (SC01STR_TBF | SC01STR_TXF))
298 continue;
299}
diff --git a/arch/mn10300/kernel/gdb-low.S b/arch/mn10300/kernel/gdb-low.S
new file mode 100644
index 000000000000..e2725552cd82
--- /dev/null
+++ b/arch/mn10300/kernel/gdb-low.S
@@ -0,0 +1,115 @@
1###############################################################################
2#
3# MN10300 Low-level gdbstub routines
4#
5# Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
6# Written by David Howells (dhowells@redhat.com)
7#
8# This program is free software; you can redistribute it and/or
9# modify it under the terms of the GNU General Public Licence
10# as published by the Free Software Foundation; either version
11# 2 of the Licence, or (at your option) any later version.
12#
13###############################################################################
14#include <linux/sys.h>
15#include <linux/linkage.h>
16#include <asm/smp.h>
17#include <asm/cache.h>
18#include <asm/cpu-regs.h>
19#include <asm/exceptions.h>
20#include <asm/frame.inc>
21#include <asm/serial-regs.h>
22
23 .text
24
25###############################################################################
26#
27# GDB stub read memory with guard
28# - D0 holds the memory address to read
29# - D1 holds the address to store the byte into
30#
31###############################################################################
32 .globl gdbstub_read_byte_guard
33 .globl gdbstub_read_byte_cont
34ENTRY(gdbstub_read_byte)
35 mov d0,a0
36 mov d1,a1
37 clr d0
38gdbstub_read_byte_guard:
39 movbu (a0),d1
40gdbstub_read_byte_cont:
41 movbu d1,(a1)
42 ret [],0
43
44 .globl gdbstub_read_word_guard
45 .globl gdbstub_read_word_cont
46ENTRY(gdbstub_read_word)
47 mov d0,a0
48 mov d1,a1
49 clr d0
50gdbstub_read_word_guard:
51 movhu (a0),d1
52gdbstub_read_word_cont:
53 movhu d1,(a1)
54 ret [],0
55
56 .globl gdbstub_read_dword_guard
57 .globl gdbstub_read_dword_cont
58ENTRY(gdbstub_read_dword)
59 mov d0,a0
60 mov d1,a1
61 clr d0
62gdbstub_read_dword_guard:
63 mov (a0),d1
64gdbstub_read_dword_cont:
65 mov d1,(a1)
66 ret [],0
67
68###############################################################################
69#
70# GDB stub write memory with guard
71# - D0 holds the byte to store
72# - D1 holds the memory address to write
73#
74###############################################################################
75 .globl gdbstub_write_byte_guard
76 .globl gdbstub_write_byte_cont
77ENTRY(gdbstub_write_byte)
78 mov d0,a0
79 mov d1,a1
80 clr d0
81gdbstub_write_byte_guard:
82 movbu a0,(a1)
83gdbstub_write_byte_cont:
84 ret [],0
85
86 .globl gdbstub_write_word_guard
87 .globl gdbstub_write_word_cont
88ENTRY(gdbstub_write_word)
89 mov d0,a0
90 mov d1,a1
91 clr d0
92gdbstub_write_word_guard:
93 movhu a0,(a1)
94gdbstub_write_word_cont:
95 ret [],0
96
97 .globl gdbstub_write_dword_guard
98 .globl gdbstub_write_dword_cont
99ENTRY(gdbstub_write_dword)
100 mov d0,a0
101 mov d1,a1
102 clr d0
103gdbstub_write_dword_guard:
104 mov a0,(a1)
105gdbstub_write_dword_cont:
106 ret [],0
107
108###############################################################################
109#
110# GDB stub BUG() trap
111#
112###############################################################################
113ENTRY(__gdbstub_bug_trap)
114 .byte 0xF7,0xF7 # don't use 0xFF as the JTAG unit preempts that
115 ret [],0
diff --git a/arch/mn10300/kernel/gdb-stub.c b/arch/mn10300/kernel/gdb-stub.c
new file mode 100644
index 000000000000..21891c71d549
--- /dev/null
+++ b/arch/mn10300/kernel/gdb-stub.c
@@ -0,0 +1,1947 @@
1/* MN10300 GDB stub
2 *
3 * Originally written by Glenn Engel, Lake Stevens Instrument Division
4 *
5 * Contributed by HP Systems
6 *
7 * Modified for SPARC by Stu Grossman, Cygnus Support.
8 *
9 * Modified for Linux/MIPS (and MIPS in general) by Andreas Busse
10 * Send complaints, suggestions etc. to <andy@waldorf-gmbh.de>
11 *
12 * Copyright (C) 1995 Andreas Busse
13 *
14 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
15 * Modified for Linux/mn10300 by David Howells <dhowells@redhat.com>
16 */
17
18/*
19 * To enable debugger support, two things need to happen. One, a
20 * call to set_debug_traps() is necessary in order to allow any breakpoints
21 * or error conditions to be properly intercepted and reported to gdb.
22 * Two, a breakpoint needs to be generated to begin communication. This
23 * is most easily accomplished by a call to breakpoint(). Breakpoint()
24 * simulates a breakpoint by executing a BREAK instruction.
25 *
26 *
27 * The following gdb commands are supported:
28 *
29 * command function Return value
30 *
31 * g return the value of the CPU registers hex data or ENN
32 * G set the value of the CPU registers OK or ENN
33 *
34 * mAA..AA,LLLL Read LLLL bytes at address AA..AA hex data or ENN
35 * MAA..AA,LLLL: Write LLLL bytes at address AA.AA OK or ENN
36 *
37 * c Resume at current address SNN ( signal NN)
38 * cAA..AA Continue at address AA..AA SNN
39 *
40 * s Step one instruction SNN
41 * sAA..AA Step one instruction from AA..AA SNN
42 *
43 * k kill
44 *
45 * ? What was the last sigval ? SNN (signal NN)
46 *
47 * bBB..BB Set baud rate to BB..BB OK or BNN, then sets
48 * baud rate
49 *
50 * All commands and responses are sent with a packet which includes a
51 * checksum. A packet consists of
52 *
53 * $<packet info>#<checksum>.
54 *
55 * where
56 * <packet info> :: <characters representing the command or response>
57 * <checksum> :: < two hex digits computed as modulo 256 sum of <packetinfo>>
58 *
59 * When a packet is received, it is first acknowledged with either '+' or '-'.
60 * '+' indicates a successful transfer. '-' indicates a failed transfer.
61 *
62 * Example:
63 *
64 * Host: Reply:
65 * $m0,10#2a +$00010203040506070809101112131415#42
66 *
67 *
68 * ==============
69 * MORE EXAMPLES:
70 * ==============
71 *
72 * For reference -- the following are the steps that one
73 * company took (RidgeRun Inc) to get remote gdb debugging
74 * going. In this scenario the host machine was a PC and the
75 * target platform was a Galileo EVB64120A MIPS evaluation
76 * board.
77 *
78 * Step 1:
79 * First download gdb-5.0.tar.gz from the internet.
80 * and then build/install the package.
81 *
82 * Example:
83 * $ tar zxf gdb-5.0.tar.gz
84 * $ cd gdb-5.0
85 * $ ./configure --target=am33_2.0-linux-gnu
86 * $ make
87 * $ install
88 * am33_2.0-linux-gnu-gdb
89 *
90 * Step 2:
91 * Configure linux for remote debugging and build it.
92 *
93 * Example:
94 * $ cd ~/linux
95 * $ make menuconfig <go to "Kernel Hacking" and turn on remote debugging>
96 * $ make dep; make vmlinux
97 *
98 * Step 3:
99 * Download the kernel to the remote target and start
100 * the kernel running. It will promptly halt and wait
101 * for the host gdb session to connect. It does this
102 * since the "Kernel Hacking" option has defined
103 * CONFIG_REMOTE_DEBUG which in turn enables your calls
104 * to:
105 * set_debug_traps();
106 * breakpoint();
107 *
108 * Step 4:
109 * Start the gdb session on the host.
110 *
111 * Example:
112 * $ am33_2.0-linux-gnu-gdb vmlinux
113 * (gdb) set remotebaud 115200
114 * (gdb) target remote /dev/ttyS1
115 * ...at this point you are connected to
116 * the remote target and can use gdb
117 * in the normal fasion. Setting
118 * breakpoints, single stepping,
119 * printing variables, etc.
120 *
121 */
122
123#include <linux/string.h>
124#include <linux/kernel.h>
125#include <linux/signal.h>
126#include <linux/sched.h>
127#include <linux/mm.h>
128#include <linux/console.h>
129#include <linux/init.h>
130#include <linux/bug.h>
131
132#include <asm/pgtable.h>
133#include <asm/system.h>
134#include <asm/gdb-stub.h>
135#include <asm/exceptions.h>
136#include <asm/cacheflush.h>
137#include <asm/serial-regs.h>
138#include <asm/busctl-regs.h>
139#include <asm/unit/leds.h>
140#include <asm/unit/serial.h>
141
142/* define to use F7F7 rather than FF which is subverted by JTAG debugger */
143#undef GDBSTUB_USE_F7F7_AS_BREAKPOINT
144
145/*
146 * BUFMAX defines the maximum number of characters in inbound/outbound buffers
147 * at least NUMREGBYTES*2 are needed for register packets
148 */
149#define BUFMAX 2048
150
151static const char gdbstub_banner[] =
152 "Linux/MN10300 GDB Stub (c) RedHat 2007\n";
153
154u8 gdbstub_rx_buffer[PAGE_SIZE] __attribute__((aligned(PAGE_SIZE)));
155u32 gdbstub_rx_inp;
156u32 gdbstub_rx_outp;
157u8 gdbstub_busy;
158u8 gdbstub_rx_overflow;
159u8 gdbstub_rx_unget;
160
161static u8 gdbstub_flush_caches;
162static char input_buffer[BUFMAX];
163static char output_buffer[BUFMAX];
164static char trans_buffer[BUFMAX];
165
166static const char hexchars[] = "0123456789abcdef";
167
168struct gdbstub_bkpt {
169 u8 *addr; /* address of breakpoint */
170 u8 len; /* size of breakpoint */
171 u8 origbytes[7]; /* original bytes */
172};
173
174static struct gdbstub_bkpt gdbstub_bkpts[256];
175
176/*
177 * local prototypes
178 */
179static void getpacket(char *buffer);
180static int putpacket(char *buffer);
181static int computeSignal(enum exception_code excep);
182static int hex(unsigned char ch);
183static int hexToInt(char **ptr, int *intValue);
184static unsigned char *mem2hex(const void *mem, char *buf, int count,
185 int may_fault);
186static const char *hex2mem(const char *buf, void *_mem, int count,
187 int may_fault);
188
189/*
190 * Convert ch from a hex digit to an int
191 */
192static int hex(unsigned char ch)
193{
194 if (ch >= 'a' && ch <= 'f')
195 return ch - 'a' + 10;
196 if (ch >= '0' && ch <= '9')
197 return ch - '0';
198 if (ch >= 'A' && ch <= 'F')
199 return ch - 'A' + 10;
200 return -1;
201}
202
203#ifdef CONFIG_GDBSTUB_DEBUGGING
204
205void debug_to_serial(const char *p, int n)
206{
207 __debug_to_serial(p, n);
208 /* gdbstub_console_write(NULL, p, n); */
209}
210
211void gdbstub_printk(const char *fmt, ...)
212{
213 va_list args;
214 int len;
215
216 /* Emit the output into the temporary buffer */
217 va_start(args, fmt);
218 len = vsnprintf(trans_buffer, sizeof(trans_buffer), fmt, args);
219 va_end(args);
220 debug_to_serial(trans_buffer, len);
221}
222
223#endif
224
225static inline char *gdbstub_strcpy(char *dst, const char *src)
226{
227 int loop = 0;
228 while ((dst[loop] = src[loop]))
229 loop++;
230 return dst;
231}
232
233/*
234 * scan for the sequence $<data>#<checksum>
235 */
236static void getpacket(char *buffer)
237{
238 unsigned char checksum;
239 unsigned char xmitcsum;
240 unsigned char ch;
241 int count, i, ret, error;
242
243 for (;;) {
244 /*
245 * wait around for the start character,
246 * ignore all other characters
247 */
248 do {
249 gdbstub_io_rx_char(&ch, 0);
250 } while (ch != '$');
251
252 checksum = 0;
253 xmitcsum = -1;
254 count = 0;
255 error = 0;
256
257 /*
258 * now, read until a # or end of buffer is found
259 */
260 while (count < BUFMAX) {
261 ret = gdbstub_io_rx_char(&ch, 0);
262 if (ret < 0)
263 error = ret;
264
265 if (ch == '#')
266 break;
267 checksum += ch;
268 buffer[count] = ch;
269 count++;
270 }
271
272 if (error == -EIO) {
273 gdbstub_proto("### GDB Rx Error - Skipping packet"
274 " ###\n");
275 gdbstub_proto("### GDB Tx NAK\n");
276 gdbstub_io_tx_char('-');
277 continue;
278 }
279
280 if (count >= BUFMAX || error)
281 continue;
282
283 buffer[count] = 0;
284
285 /* read the checksum */
286 ret = gdbstub_io_rx_char(&ch, 0);
287 if (ret < 0)
288 error = ret;
289 xmitcsum = hex(ch) << 4;
290
291 ret = gdbstub_io_rx_char(&ch, 0);
292 if (ret < 0)
293 error = ret;
294 xmitcsum |= hex(ch);
295
296 if (error) {
297 if (error == -EIO)
298 gdbstub_io("### GDB Rx Error -"
299 " Skipping packet\n");
300 gdbstub_io("### GDB Tx NAK\n");
301 gdbstub_io_tx_char('-');
302 continue;
303 }
304
305 /* check the checksum */
306 if (checksum != xmitcsum) {
307 gdbstub_io("### GDB Tx NAK\n");
308 gdbstub_io_tx_char('-'); /* failed checksum */
309 continue;
310 }
311
312 gdbstub_proto("### GDB Rx '$%s#%02x' ###\n", buffer, checksum);
313 gdbstub_io("### GDB Tx ACK\n");
314 gdbstub_io_tx_char('+'); /* successful transfer */
315
316 /*
317 * if a sequence char is present,
318 * reply the sequence ID
319 */
320 if (buffer[2] == ':') {
321 gdbstub_io_tx_char(buffer[0]);
322 gdbstub_io_tx_char(buffer[1]);
323
324 /*
325 * remove sequence chars from buffer
326 */
327 count = 0;
328 while (buffer[count])
329 count++;
330 for (i = 3; i <= count; i++)
331 buffer[i - 3] = buffer[i];
332 }
333
334 break;
335 }
336}
337
338/*
339 * send the packet in buffer.
340 * - return 0 if successfully ACK'd
341 * - return 1 if abandoned due to new incoming packet
342 */
343static int putpacket(char *buffer)
344{
345 unsigned char checksum;
346 unsigned char ch;
347 int count;
348
349 /*
350 * $<packet info>#<checksum>.
351 */
352 gdbstub_proto("### GDB Tx $'%s'#?? ###\n", buffer);
353
354 do {
355 gdbstub_io_tx_char('$');
356 checksum = 0;
357 count = 0;
358
359 while ((ch = buffer[count]) != 0) {
360 gdbstub_io_tx_char(ch);
361 checksum += ch;
362 count += 1;
363 }
364
365 gdbstub_io_tx_char('#');
366 gdbstub_io_tx_char(hexchars[checksum >> 4]);
367 gdbstub_io_tx_char(hexchars[checksum & 0xf]);
368
369 } while (gdbstub_io_rx_char(&ch, 0),
370 ch == '-' && (gdbstub_io("### GDB Rx NAK\n"), 0),
371 ch != '-' && ch != '+' &&
372 (gdbstub_io("### GDB Rx ??? %02x\n", ch), 0),
373 ch != '+' && ch != '$');
374
375 if (ch == '+') {
376 gdbstub_io("### GDB Rx ACK\n");
377 return 0;
378 }
379
380 gdbstub_io("### GDB Tx Abandoned\n");
381 gdbstub_rx_unget = ch;
382 return 1;
383}
384
385/*
386 * While we find nice hex chars, build an int.
387 * Return number of chars processed.
388 */
389static int hexToInt(char **ptr, int *intValue)
390{
391 int numChars = 0;
392 int hexValue;
393
394 *intValue = 0;
395
396 while (**ptr) {
397 hexValue = hex(**ptr);
398 if (hexValue < 0)
399 break;
400
401 *intValue = (*intValue << 4) | hexValue;
402 numChars++;
403
404 (*ptr)++;
405 }
406
407 return (numChars);
408}
409
410/*
411 * We single-step by setting breakpoints. When an exception
412 * is handled, we need to restore the instructions hoisted
413 * when the breakpoints were set.
414 *
415 * This is where we save the original instructions.
416 */
417static struct gdb_bp_save {
418 u8 *addr;
419 u8 opcode[2];
420} step_bp[2];
421
422static const unsigned char gdbstub_insn_sizes[256] =
423{
424 /* 1 2 3 4 5 6 7 8 9 a b c d e f */
425 1, 3, 3, 3, 1, 3, 3, 3, 1, 3, 3, 3, 1, 3, 3, 3, /* 0 */
426 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, /* 1 */
427 2, 2, 2, 2, 3, 3, 3, 3, 2, 2, 2, 2, 3, 3, 3, 3, /* 2 */
428 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, /* 3 */
429 1, 1, 2, 2, 1, 1, 2, 2, 1, 1, 2, 2, 1, 1, 2, 2, /* 4 */
430 1, 1, 1, 1, 1, 1, 1, 1, 2, 2, 2, 2, 2, 2, 2, 2, /* 5 */
431 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, /* 6 */
432 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, /* 7 */
433 2, 1, 1, 1, 1, 2, 1, 1, 1, 1, 2, 1, 1, 1, 1, 2, /* 8 */
434 2, 1, 1, 1, 1, 2, 1, 1, 1, 1, 2, 1, 1, 1, 1, 2, /* 9 */
435 2, 1, 1, 1, 1, 2, 1, 1, 1, 1, 2, 1, 1, 1, 1, 2, /* a */
436 2, 1, 1, 1, 1, 2, 1, 1, 1, 1, 2, 1, 1, 1, 1, 2, /* b */
437 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 2, 2, /* c */
438 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* d */
439 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, /* e */
440 0, 2, 2, 2, 2, 2, 2, 4, 0, 3, 0, 4, 0, 6, 7, 1 /* f */
441};
442
443static int __gdbstub_mark_bp(u8 *addr, int ix)
444{
445 if (addr < (u8 *) 0x70000000UL)
446 return 0;
447 /* 70000000-7fffffff: vmalloc area */
448 if (addr < (u8 *) 0x80000000UL)
449 goto okay;
450 if (addr < (u8 *) 0x8c000000UL)
451 return 0;
452 /* 8c000000-93ffffff: SRAM, SDRAM */
453 if (addr < (u8 *) 0x94000000UL)
454 goto okay;
455 return 0;
456
457okay:
458 if (gdbstub_read_byte(addr + 0, &step_bp[ix].opcode[0]) < 0 ||
459 gdbstub_read_byte(addr + 1, &step_bp[ix].opcode[1]) < 0)
460 return 0;
461
462 step_bp[ix].addr = addr;
463 return 1;
464}
465
466static inline void __gdbstub_restore_bp(void)
467{
468#ifdef GDBSTUB_USE_F7F7_AS_BREAKPOINT
469 if (step_bp[0].addr) {
470 gdbstub_write_byte(step_bp[0].opcode[0], step_bp[0].addr + 0);
471 gdbstub_write_byte(step_bp[0].opcode[1], step_bp[0].addr + 1);
472 }
473 if (step_bp[1].addr) {
474 gdbstub_write_byte(step_bp[1].opcode[0], step_bp[1].addr + 0);
475 gdbstub_write_byte(step_bp[1].opcode[1], step_bp[1].addr + 1);
476 }
477#else
478 if (step_bp[0].addr)
479 gdbstub_write_byte(step_bp[0].opcode[0], step_bp[0].addr + 0);
480 if (step_bp[1].addr)
481 gdbstub_write_byte(step_bp[1].opcode[0], step_bp[1].addr + 0);
482#endif
483
484 gdbstub_flush_caches = 1;
485
486 step_bp[0].addr = NULL;
487 step_bp[0].opcode[0] = 0;
488 step_bp[0].opcode[1] = 0;
489 step_bp[1].addr = NULL;
490 step_bp[1].opcode[0] = 0;
491 step_bp[1].opcode[1] = 0;
492}
493
494/*
495 * emulate single stepping by means of breakpoint instructions
496 */
497static int gdbstub_single_step(struct pt_regs *regs)
498{
499 unsigned size;
500 uint32_t x;
501 uint8_t cur, *pc, *sp;
502
503 step_bp[0].addr = NULL;
504 step_bp[0].opcode[0] = 0;
505 step_bp[0].opcode[1] = 0;
506 step_bp[1].addr = NULL;
507 step_bp[1].opcode[0] = 0;
508 step_bp[1].opcode[1] = 0;
509 x = 0;
510
511 pc = (u8 *) regs->pc;
512 sp = (u8 *) (regs + 1);
513 if (gdbstub_read_byte(pc, &cur) < 0)
514 return -EFAULT;
515
516 gdbstub_bkpt("Single Step from %p { %02x }\n", pc, cur);
517
518 gdbstub_flush_caches = 1;
519
520 size = gdbstub_insn_sizes[cur];
521 if (size > 0) {
522 if (!__gdbstub_mark_bp(pc + size, 0))
523 goto fault;
524 } else {
525 switch (cur) {
526 /* Bxx (d8,PC) */
527 case 0xc0:
528 case 0xc1:
529 case 0xc2:
530 case 0xc3:
531 case 0xc4:
532 case 0xc5:
533 case 0xc6:
534 case 0xc7:
535 case 0xc8:
536 case 0xc9:
537 case 0xca:
538 if (gdbstub_read_byte(pc + 1, (u8 *) &x) < 0)
539 goto fault;
540 if (!__gdbstub_mark_bp(pc + 2, 0))
541 goto fault;
542 if ((x < 0 || x > 2) &&
543 !__gdbstub_mark_bp(pc + (s8) x, 1))
544 goto fault;
545 break;
546
547 /* LXX (d8,PC) */
548 case 0xd0:
549 case 0xd1:
550 case 0xd2:
551 case 0xd3:
552 case 0xd4:
553 case 0xd5:
554 case 0xd6:
555 case 0xd7:
556 case 0xd8:
557 case 0xd9:
558 case 0xda:
559 if (!__gdbstub_mark_bp(pc + 1, 0))
560 goto fault;
561 if (regs->pc != regs->lar &&
562 !__gdbstub_mark_bp((u8 *) regs->lar, 1))
563 goto fault;
564 break;
565
566 /* SETLB - loads the next for bytes into the LIR
567 * register */
568 case 0xdb:
569 if (!__gdbstub_mark_bp(pc + 1, 0))
570 goto fault;
571 break;
572
573 /* JMP (d16,PC) or CALL (d16,PC) */
574 case 0xcc:
575 case 0xcd:
576 if (gdbstub_read_byte(pc + 1, ((u8 *) &x) + 0) < 0 ||
577 gdbstub_read_byte(pc + 2, ((u8 *) &x) + 1) < 0)
578 goto fault;
579 if (!__gdbstub_mark_bp(pc + (s16) x, 0))
580 goto fault;
581 break;
582
583 /* JMP (d32,PC) or CALL (d32,PC) */
584 case 0xdc:
585 case 0xdd:
586 if (gdbstub_read_byte(pc + 1, ((u8 *) &x) + 0) < 0 ||
587 gdbstub_read_byte(pc + 2, ((u8 *) &x) + 1) < 0 ||
588 gdbstub_read_byte(pc + 3, ((u8 *) &x) + 2) < 0 ||
589 gdbstub_read_byte(pc + 4, ((u8 *) &x) + 3) < 0)
590 goto fault;
591 if (!__gdbstub_mark_bp(pc + (s32) x, 0))
592 goto fault;
593 break;
594
595 /* RETF */
596 case 0xde:
597 if (!__gdbstub_mark_bp((u8 *) regs->mdr, 0))
598 goto fault;
599 break;
600
601 /* RET */
602 case 0xdf:
603 if (gdbstub_read_byte(pc + 2, (u8 *) &x) < 0)
604 goto fault;
605 sp += (s8)x;
606 if (gdbstub_read_byte(sp + 0, ((u8 *) &x) + 0) < 0 ||
607 gdbstub_read_byte(sp + 1, ((u8 *) &x) + 1) < 0 ||
608 gdbstub_read_byte(sp + 2, ((u8 *) &x) + 2) < 0 ||
609 gdbstub_read_byte(sp + 3, ((u8 *) &x) + 3) < 0)
610 goto fault;
611 if (!__gdbstub_mark_bp((u8 *) x, 0))
612 goto fault;
613 break;
614
615 case 0xf0:
616 if (gdbstub_read_byte(pc + 1, &cur) < 0)
617 goto fault;
618
619 if (cur >= 0xf0 && cur <= 0xf7) {
620 /* JMP (An) / CALLS (An) */
621 switch (cur & 3) {
622 case 0: x = regs->a0; break;
623 case 1: x = regs->a1; break;
624 case 2: x = regs->a2; break;
625 case 3: x = regs->a3; break;
626 }
627 if (!__gdbstub_mark_bp((u8 *) x, 0))
628 goto fault;
629 } else if (cur == 0xfc) {
630 /* RETS */
631 if (gdbstub_read_byte(
632 sp + 0, ((u8 *) &x) + 0) < 0 ||
633 gdbstub_read_byte(
634 sp + 1, ((u8 *) &x) + 1) < 0 ||
635 gdbstub_read_byte(
636 sp + 2, ((u8 *) &x) + 2) < 0 ||
637 gdbstub_read_byte(
638 sp + 3, ((u8 *) &x) + 3) < 0)
639 goto fault;
640 if (!__gdbstub_mark_bp((u8 *) x, 0))
641 goto fault;
642 } else if (cur == 0xfd) {
643 /* RTI */
644 if (gdbstub_read_byte(
645 sp + 4, ((u8 *) &x) + 0) < 0 ||
646 gdbstub_read_byte(
647 sp + 5, ((u8 *) &x) + 1) < 0 ||
648 gdbstub_read_byte(
649 sp + 6, ((u8 *) &x) + 2) < 0 ||
650 gdbstub_read_byte(
651 sp + 7, ((u8 *) &x) + 3) < 0)
652 goto fault;
653 if (!__gdbstub_mark_bp((u8 *) x, 0))
654 goto fault;
655 } else {
656 if (!__gdbstub_mark_bp(pc + 2, 0))
657 goto fault;
658 }
659
660 break;
661
662 /* potential 3-byte conditional branches */
663 case 0xf8:
664 if (gdbstub_read_byte(pc + 1, &cur) < 0)
665 goto fault;
666 if (!__gdbstub_mark_bp(pc + 3, 0))
667 goto fault;
668
669 if (cur >= 0xe8 && cur <= 0xeb) {
670 if (gdbstub_read_byte(
671 pc + 2, ((u8 *) &x) + 0) < 0)
672 goto fault;
673 if ((x < 0 || x > 3) &&
674 !__gdbstub_mark_bp(pc + (s8) x, 1))
675 goto fault;
676 }
677 break;
678
679 case 0xfa:
680 if (gdbstub_read_byte(pc + 1, &cur) < 0)
681 goto fault;
682
683 if (cur == 0xff) {
684 /* CALLS (d16,PC) */
685 if (gdbstub_read_byte(
686 pc + 2, ((u8 *) &x) + 0) < 0 ||
687 gdbstub_read_byte(
688 pc + 3, ((u8 *) &x) + 1) < 0)
689 goto fault;
690 if (!__gdbstub_mark_bp(pc + (s16) x, 0))
691 goto fault;
692 } else {
693 if (!__gdbstub_mark_bp(pc + 4, 0))
694 goto fault;
695 }
696 break;
697
698 case 0xfc:
699 if (gdbstub_read_byte(pc + 1, &cur) < 0)
700 goto fault;
701 if (cur == 0xff) {
702 /* CALLS (d32,PC) */
703 if (gdbstub_read_byte(
704 pc + 2, ((u8 *) &x) + 0) < 0 ||
705 gdbstub_read_byte(
706 pc + 3, ((u8 *) &x) + 1) < 0 ||
707 gdbstub_read_byte(
708 pc + 4, ((u8 *) &x) + 2) < 0 ||
709 gdbstub_read_byte(
710 pc + 5, ((u8 *) &x) + 3) < 0)
711 goto fault;
712 if (!__gdbstub_mark_bp(
713 pc + (s32) x, 0))
714 goto fault;
715 } else {
716 if (!__gdbstub_mark_bp(
717 pc + 6, 0))
718 goto fault;
719 }
720 break;
721
722 }
723 }
724
725 gdbstub_bkpt("Step: %02x at %p; %02x at %p\n",
726 step_bp[0].opcode[0], step_bp[0].addr,
727 step_bp[1].opcode[0], step_bp[1].addr);
728
729 if (step_bp[0].addr) {
730#ifdef GDBSTUB_USE_F7F7_AS_BREAKPOINT
731 if (gdbstub_write_byte(0xF7, step_bp[0].addr + 0) < 0 ||
732 gdbstub_write_byte(0xF7, step_bp[0].addr + 1) < 0)
733 goto fault;
734#else
735 if (gdbstub_write_byte(0xFF, step_bp[0].addr + 0) < 0)
736 goto fault;
737#endif
738 }
739
740 if (step_bp[1].addr) {
741#ifdef GDBSTUB_USE_F7F7_AS_BREAKPOINT
742 if (gdbstub_write_byte(0xF7, step_bp[1].addr + 0) < 0 ||
743 gdbstub_write_byte(0xF7, step_bp[1].addr + 1) < 0)
744 goto fault;
745#else
746 if (gdbstub_write_byte(0xFF, step_bp[1].addr + 0) < 0)
747 goto fault;
748#endif
749 }
750
751 return 0;
752
753 fault:
754 /* uh-oh - silly address alert, try and restore things */
755 __gdbstub_restore_bp();
756 return -EFAULT;
757}
758
759#ifdef CONFIG_GDBSTUB_CONSOLE
760
761void gdbstub_console_write(struct console *con, const char *p, unsigned n)
762{
763 static const char gdbstub_cr[] = { 0x0d };
764 char outbuf[26];
765 int qty;
766 u8 busy;
767
768 busy = gdbstub_busy;
769 gdbstub_busy = 1;
770
771 outbuf[0] = 'O';
772
773 while (n > 0) {
774 qty = 1;
775
776 while (n > 0 && qty < 20) {
777 mem2hex(p, outbuf + qty, 2, 0);
778 qty += 2;
779 if (*p == 0x0a) {
780 mem2hex(gdbstub_cr, outbuf + qty, 2, 0);
781 qty += 2;
782 }
783 p++;
784 n--;
785 }
786
787 outbuf[qty] = 0;
788 putpacket(outbuf);
789 }
790
791 gdbstub_busy = busy;
792}
793
794static kdev_t gdbstub_console_dev(struct console *con)
795{
796 return MKDEV(1, 3); /* /dev/null */
797}
798
799static struct console gdbstub_console = {
800 .name = "gdb",
801 .write = gdbstub_console_write,
802 .device = gdbstub_console_dev,
803 .flags = CON_PRINTBUFFER,
804 .index = -1,
805};
806
807#endif
808
809/*
810 * Convert the memory pointed to by mem into hex, placing result in buf.
811 * - if successful, return a pointer to the last char put in buf (NUL)
812 * - in case of mem fault, return NULL
813 * may_fault is non-zero if we are reading from arbitrary memory, but is
814 * currently not used.
815 */
816static
817unsigned char *mem2hex(const void *_mem, char *buf, int count, int may_fault)
818{
819 const u8 *mem = _mem;
820 u8 ch[4];
821
822 if ((u32) mem & 1 && count >= 1) {
823 if (gdbstub_read_byte(mem, ch) != 0)
824 return 0;
825 *buf++ = hexchars[ch[0] >> 4];
826 *buf++ = hexchars[ch[0] & 0xf];
827 mem++;
828 count--;
829 }
830
831 if ((u32) mem & 3 && count >= 2) {
832 if (gdbstub_read_word(mem, ch) != 0)
833 return 0;
834 *buf++ = hexchars[ch[0] >> 4];
835 *buf++ = hexchars[ch[0] & 0xf];
836 *buf++ = hexchars[ch[1] >> 4];
837 *buf++ = hexchars[ch[1] & 0xf];
838 mem += 2;
839 count -= 2;
840 }
841
842 while (count >= 4) {
843 if (gdbstub_read_dword(mem, ch) != 0)
844 return 0;
845 *buf++ = hexchars[ch[0] >> 4];
846 *buf++ = hexchars[ch[0] & 0xf];
847 *buf++ = hexchars[ch[1] >> 4];
848 *buf++ = hexchars[ch[1] & 0xf];
849 *buf++ = hexchars[ch[2] >> 4];
850 *buf++ = hexchars[ch[2] & 0xf];
851 *buf++ = hexchars[ch[3] >> 4];
852 *buf++ = hexchars[ch[3] & 0xf];
853 mem += 4;
854 count -= 4;
855 }
856
857 if (count >= 2) {
858 if (gdbstub_read_word(mem, ch) != 0)
859 return 0;
860 *buf++ = hexchars[ch[0] >> 4];
861 *buf++ = hexchars[ch[0] & 0xf];
862 *buf++ = hexchars[ch[1] >> 4];
863 *buf++ = hexchars[ch[1] & 0xf];
864 mem += 2;
865 count -= 2;
866 }
867
868 if (count >= 1) {
869 if (gdbstub_read_byte(mem, ch) != 0)
870 return 0;
871 *buf++ = hexchars[ch[0] >> 4];
872 *buf++ = hexchars[ch[0] & 0xf];
873 }
874
875 *buf = 0;
876 return buf;
877}
878
879/*
880 * convert the hex array pointed to by buf into binary to be placed in mem
881 * return a pointer to the character AFTER the last byte written
882 * may_fault is non-zero if we are reading from arbitrary memory, but is
883 * currently not used.
884 */
885static
886const char *hex2mem(const char *buf, void *_mem, int count, int may_fault)
887{
888 u8 *mem = _mem;
889 union {
890 u32 val;
891 u8 b[4];
892 } ch;
893
894 if ((u32) mem & 1 && count >= 1) {
895 ch.b[0] = hex(*buf++) << 4;
896 ch.b[0] |= hex(*buf++);
897 if (gdbstub_write_byte(ch.val, mem) != 0)
898 return 0;
899 mem++;
900 count--;
901 }
902
903 if ((u32) mem & 3 && count >= 2) {
904 ch.b[0] = hex(*buf++) << 4;
905 ch.b[0] |= hex(*buf++);
906 ch.b[1] = hex(*buf++) << 4;
907 ch.b[1] |= hex(*buf++);
908 if (gdbstub_write_word(ch.val, mem) != 0)
909 return 0;
910 mem += 2;
911 count -= 2;
912 }
913
914 while (count >= 4) {
915 ch.b[0] = hex(*buf++) << 4;
916 ch.b[0] |= hex(*buf++);
917 ch.b[1] = hex(*buf++) << 4;
918 ch.b[1] |= hex(*buf++);
919 ch.b[2] = hex(*buf++) << 4;
920 ch.b[2] |= hex(*buf++);
921 ch.b[3] = hex(*buf++) << 4;
922 ch.b[3] |= hex(*buf++);
923 if (gdbstub_write_dword(ch.val, mem) != 0)
924 return 0;
925 mem += 4;
926 count -= 4;
927 }
928
929 if (count >= 2) {
930 ch.b[0] = hex(*buf++) << 4;
931 ch.b[0] |= hex(*buf++);
932 ch.b[1] = hex(*buf++) << 4;
933 ch.b[1] |= hex(*buf++);
934 if (gdbstub_write_word(ch.val, mem) != 0)
935 return 0;
936 mem += 2;
937 count -= 2;
938 }
939
940 if (count >= 1) {
941 ch.b[0] = hex(*buf++) << 4;
942 ch.b[0] |= hex(*buf++);
943 if (gdbstub_write_byte(ch.val, mem) != 0)
944 return 0;
945 }
946
947 return buf;
948}
949
950/*
951 * This table contains the mapping between MN10300 exception codes, and
952 * signals, which are primarily what GDB understands. It also indicates
953 * which hardware traps we need to commandeer when initializing the stub.
954 */
955static const struct excep_to_sig_map {
956 enum exception_code excep; /* MN10300 exception code */
957 unsigned char signo; /* Signal that we map this into */
958} excep_to_sig_map[] = {
959 { EXCEP_ITLBMISS, SIGSEGV },
960 { EXCEP_DTLBMISS, SIGSEGV },
961 { EXCEP_TRAP, SIGTRAP },
962 { EXCEP_ISTEP, SIGTRAP },
963 { EXCEP_IBREAK, SIGTRAP },
964 { EXCEP_OBREAK, SIGTRAP },
965 { EXCEP_UNIMPINS, SIGILL },
966 { EXCEP_UNIMPEXINS, SIGILL },
967 { EXCEP_MEMERR, SIGSEGV },
968 { EXCEP_MISALIGN, SIGSEGV },
969 { EXCEP_BUSERROR, SIGBUS },
970 { EXCEP_ILLINSACC, SIGSEGV },
971 { EXCEP_ILLDATACC, SIGSEGV },
972 { EXCEP_IOINSACC, SIGSEGV },
973 { EXCEP_PRIVINSACC, SIGSEGV },
974 { EXCEP_PRIVDATACC, SIGSEGV },
975 { EXCEP_FPU_DISABLED, SIGFPE },
976 { EXCEP_FPU_UNIMPINS, SIGFPE },
977 { EXCEP_FPU_OPERATION, SIGFPE },
978 { EXCEP_WDT, SIGALRM },
979 { EXCEP_NMI, SIGQUIT },
980 { EXCEP_IRQ_LEVEL0, SIGINT },
981 { EXCEP_IRQ_LEVEL1, SIGINT },
982 { EXCEP_IRQ_LEVEL2, SIGINT },
983 { EXCEP_IRQ_LEVEL3, SIGINT },
984 { EXCEP_IRQ_LEVEL4, SIGINT },
985 { EXCEP_IRQ_LEVEL5, SIGINT },
986 { EXCEP_IRQ_LEVEL6, SIGINT },
987 { 0, 0}
988};
989
990/*
991 * convert the MN10300 exception code into a UNIX signal number
992 */
993static int computeSignal(enum exception_code excep)
994{
995 const struct excep_to_sig_map *map;
996
997 for (map = excep_to_sig_map; map->signo; map++)
998 if (map->excep == excep)
999 return map->signo;
1000
1001 return SIGHUP; /* default for things we don't know about */
1002}
1003
1004static u32 gdbstub_fpcr, gdbstub_fpufs_array[32];
1005
1006/*
1007 *
1008 */
1009static void gdbstub_store_fpu(void)
1010{
1011#ifdef CONFIG_FPU
1012
1013 asm volatile(
1014 "or %2,epsw\n"
1015#ifdef CONFIG_MN10300_PROC_MN103E010
1016 "nop\n"
1017 "nop\n"
1018#endif
1019 "mov %1, a1\n"
1020 "fmov fs0, (a1+)\n"
1021 "fmov fs1, (a1+)\n"
1022 "fmov fs2, (a1+)\n"
1023 "fmov fs3, (a1+)\n"
1024 "fmov fs4, (a1+)\n"
1025 "fmov fs5, (a1+)\n"
1026 "fmov fs6, (a1+)\n"
1027 "fmov fs7, (a1+)\n"
1028 "fmov fs8, (a1+)\n"
1029 "fmov fs9, (a1+)\n"
1030 "fmov fs10, (a1+)\n"
1031 "fmov fs11, (a1+)\n"
1032 "fmov fs12, (a1+)\n"
1033 "fmov fs13, (a1+)\n"
1034 "fmov fs14, (a1+)\n"
1035 "fmov fs15, (a1+)\n"
1036 "fmov fs16, (a1+)\n"
1037 "fmov fs17, (a1+)\n"
1038 "fmov fs18, (a1+)\n"
1039 "fmov fs19, (a1+)\n"
1040 "fmov fs20, (a1+)\n"
1041 "fmov fs21, (a1+)\n"
1042 "fmov fs22, (a1+)\n"
1043 "fmov fs23, (a1+)\n"
1044 "fmov fs24, (a1+)\n"
1045 "fmov fs25, (a1+)\n"
1046 "fmov fs26, (a1+)\n"
1047 "fmov fs27, (a1+)\n"
1048 "fmov fs28, (a1+)\n"
1049 "fmov fs29, (a1+)\n"
1050 "fmov fs30, (a1+)\n"
1051 "fmov fs31, (a1+)\n"
1052 "fmov fpcr, %0\n"
1053 : "=d"(gdbstub_fpcr)
1054 : "g" (&gdbstub_fpufs_array), "i"(EPSW_FE)
1055 : "a1"
1056 );
1057#endif
1058}
1059
1060/*
1061 *
1062 */
1063static void gdbstub_load_fpu(void)
1064{
1065#ifdef CONFIG_FPU
1066
1067 asm volatile(
1068 "or %1,epsw\n"
1069#ifdef CONFIG_MN10300_PROC_MN103E010
1070 "nop\n"
1071 "nop\n"
1072#endif
1073 "mov %0, a1\n"
1074 "fmov (a1+), fs0\n"
1075 "fmov (a1+), fs1\n"
1076 "fmov (a1+), fs2\n"
1077 "fmov (a1+), fs3\n"
1078 "fmov (a1+), fs4\n"
1079 "fmov (a1+), fs5\n"
1080 "fmov (a1+), fs6\n"
1081 "fmov (a1+), fs7\n"
1082 "fmov (a1+), fs8\n"
1083 "fmov (a1+), fs9\n"
1084 "fmov (a1+), fs10\n"
1085 "fmov (a1+), fs11\n"
1086 "fmov (a1+), fs12\n"
1087 "fmov (a1+), fs13\n"
1088 "fmov (a1+), fs14\n"
1089 "fmov (a1+), fs15\n"
1090 "fmov (a1+), fs16\n"
1091 "fmov (a1+), fs17\n"
1092 "fmov (a1+), fs18\n"
1093 "fmov (a1+), fs19\n"
1094 "fmov (a1+), fs20\n"
1095 "fmov (a1+), fs21\n"
1096 "fmov (a1+), fs22\n"
1097 "fmov (a1+), fs23\n"
1098 "fmov (a1+), fs24\n"
1099 "fmov (a1+), fs25\n"
1100 "fmov (a1+), fs26\n"
1101 "fmov (a1+), fs27\n"
1102 "fmov (a1+), fs28\n"
1103 "fmov (a1+), fs29\n"
1104 "fmov (a1+), fs30\n"
1105 "fmov (a1+), fs31\n"
1106 "fmov %2, fpcr\n"
1107 :
1108 : "g" (&gdbstub_fpufs_array), "i"(EPSW_FE), "d"(gdbstub_fpcr)
1109 : "a1"
1110 );
1111#endif
1112}
1113
1114/*
1115 * set a software breakpoint
1116 */
1117int gdbstub_set_breakpoint(u8 *addr, int len)
1118{
1119 int bkpt, loop, xloop;
1120
1121#ifdef GDBSTUB_USE_F7F7_AS_BREAKPOINT
1122 len = (len + 1) & ~1;
1123#endif
1124
1125 gdbstub_bkpt("setbkpt(%p,%d)\n", addr, len);
1126
1127 for (bkpt = 255; bkpt >= 0; bkpt--)
1128 if (!gdbstub_bkpts[bkpt].addr)
1129 break;
1130 if (bkpt < 0)
1131 return -ENOSPC;
1132
1133 for (loop = 0; loop < len; loop++)
1134 if (gdbstub_read_byte(&addr[loop],
1135 &gdbstub_bkpts[bkpt].origbytes[loop]
1136 ) < 0)
1137 return -EFAULT;
1138
1139 gdbstub_flush_caches = 1;
1140
1141#ifdef GDBSTUB_USE_F7F7_AS_BREAKPOINT
1142 for (loop = 0; loop < len; loop++)
1143 if (gdbstub_write_byte(0xF7, &addr[loop]) < 0)
1144 goto restore;
1145#else
1146 for (loop = 0; loop < len; loop++)
1147 if (gdbstub_write_byte(0xFF, &addr[loop]) < 0)
1148 goto restore;
1149#endif
1150
1151 gdbstub_bkpts[bkpt].addr = addr;
1152 gdbstub_bkpts[bkpt].len = len;
1153
1154 gdbstub_bkpt("Set BKPT[%02x]: %p-%p {%02x%02x%02x%02x%02x%02x%02x}\n",
1155 bkpt,
1156 gdbstub_bkpts[bkpt].addr,
1157 gdbstub_bkpts[bkpt].addr + gdbstub_bkpts[bkpt].len - 1,
1158 gdbstub_bkpts[bkpt].origbytes[0],
1159 gdbstub_bkpts[bkpt].origbytes[1],
1160 gdbstub_bkpts[bkpt].origbytes[2],
1161 gdbstub_bkpts[bkpt].origbytes[3],
1162 gdbstub_bkpts[bkpt].origbytes[4],
1163 gdbstub_bkpts[bkpt].origbytes[5],
1164 gdbstub_bkpts[bkpt].origbytes[6]
1165 );
1166
1167 return 0;
1168
1169restore:
1170 for (xloop = 0; xloop < loop; xloop++)
1171 gdbstub_write_byte(gdbstub_bkpts[bkpt].origbytes[xloop],
1172 addr + xloop);
1173 return -EFAULT;
1174}
1175
1176/*
1177 * clear a software breakpoint
1178 */
1179int gdbstub_clear_breakpoint(u8 *addr, int len)
1180{
1181 int bkpt, loop;
1182
1183#ifdef GDBSTUB_USE_F7F7_AS_BREAKPOINT
1184 len = (len + 1) & ~1;
1185#endif
1186
1187 gdbstub_bkpt("clearbkpt(%p,%d)\n", addr, len);
1188
1189 for (bkpt = 255; bkpt >= 0; bkpt--)
1190 if (gdbstub_bkpts[bkpt].addr == addr &&
1191 gdbstub_bkpts[bkpt].len == len)
1192 break;
1193 if (bkpt < 0)
1194 return -ENOENT;
1195
1196 gdbstub_bkpts[bkpt].addr = NULL;
1197
1198 gdbstub_flush_caches = 1;
1199
1200 for (loop = 0; loop < len; loop++)
1201 if (gdbstub_write_byte(gdbstub_bkpts[bkpt].origbytes[loop],
1202 addr + loop) < 0)
1203 return -EFAULT;
1204
1205 return 0;
1206}
1207
1208/*
1209 * This function does all command processing for interfacing to gdb
1210 * - returns 1 if the exception should be skipped, 0 otherwise.
1211 */
1212static int gdbstub(struct pt_regs *regs, enum exception_code excep)
1213{
1214 unsigned long *stack;
1215 unsigned long epsw, mdr;
1216 uint32_t zero, ssp;
1217 uint8_t broke;
1218 char *ptr;
1219 int sigval;
1220 int addr;
1221 int length;
1222 int loop;
1223
1224 if (excep == EXCEP_FPU_DISABLED)
1225 return 0;
1226
1227 gdbstub_flush_caches = 0;
1228
1229 mn10300_set_gdbleds(1);
1230
1231 asm volatile("mov mdr,%0" : "=d"(mdr));
1232 asm volatile("mov epsw,%0" : "=d"(epsw));
1233 asm volatile("mov %0,epsw"
1234 :: "d"((epsw & ~EPSW_IM) | EPSW_IE | EPSW_IM_1));
1235
1236 gdbstub_store_fpu();
1237
1238#ifdef CONFIG_GDBSTUB_IMMEDIATE
1239 /* skip the initial pause loop */
1240 if (regs->pc == (unsigned long) __gdbstub_pause)
1241 regs->pc = (unsigned long) start_kernel;
1242#endif
1243
1244 /* if we were single stepping, restore the opcodes hoisted for the
1245 * breakpoint[s] */
1246 broke = 0;
1247 if ((step_bp[0].addr && step_bp[0].addr == (u8 *) regs->pc) ||
1248 (step_bp[1].addr && step_bp[1].addr == (u8 *) regs->pc))
1249 broke = 1;
1250
1251 __gdbstub_restore_bp();
1252
1253 if (gdbstub_rx_unget) {
1254 sigval = SIGINT;
1255 if (gdbstub_rx_unget != 3)
1256 goto packet_waiting;
1257 gdbstub_rx_unget = 0;
1258 }
1259
1260 stack = (unsigned long *) regs->sp;
1261 sigval = broke ? SIGTRAP : computeSignal(excep);
1262
1263 /* send information about a BUG() */
1264 if (!user_mode(regs) && excep == EXCEP_SYSCALL15) {
1265 const struct bug_entry *bug;
1266
1267 bug = find_bug(regs->pc);
1268 if (bug)
1269 goto found_bug;
1270 length = snprintf(trans_buffer, sizeof(trans_buffer),
1271 "BUG() at address %lx\n", regs->pc);
1272 goto send_bug_pkt;
1273
1274 found_bug:
1275 length = snprintf(trans_buffer, sizeof(trans_buffer),
1276 "BUG() at address %lx (%s:%d)\n",
1277 regs->pc, bug->file, bug->line);
1278
1279 send_bug_pkt:
1280 ptr = output_buffer;
1281 *ptr++ = 'O';
1282 ptr = mem2hex(trans_buffer, ptr, length, 0);
1283 *ptr = 0;
1284 putpacket(output_buffer);
1285
1286 regs->pc -= 2;
1287 sigval = SIGABRT;
1288 } else if (regs->pc == (unsigned long) __gdbstub_bug_trap) {
1289 regs->pc = regs->mdr;
1290 sigval = SIGABRT;
1291 }
1292
1293 /*
1294 * send a message to the debugger's user saying what happened if it may
1295 * not be clear cut (we can't map exceptions onto signals properly)
1296 */
1297 if (sigval != SIGINT && sigval != SIGTRAP && sigval != SIGILL) {
1298 static const char title[] = "Excep ", tbcberr[] = "BCBERR ";
1299 static const char crlf[] = "\r\n";
1300 char hx;
1301 u32 bcberr = BCBERR;
1302
1303 ptr = output_buffer;
1304 *ptr++ = 'O';
1305 ptr = mem2hex(title, ptr, sizeof(title) - 1, 0);
1306
1307 hx = hexchars[(excep & 0xf000) >> 12];
1308 *ptr++ = hexchars[hx >> 4]; *ptr++ = hexchars[hx & 0xf];
1309 hx = hexchars[(excep & 0x0f00) >> 8];
1310 *ptr++ = hexchars[hx >> 4]; *ptr++ = hexchars[hx & 0xf];
1311 hx = hexchars[(excep & 0x00f0) >> 4];
1312 *ptr++ = hexchars[hx >> 4]; *ptr++ = hexchars[hx & 0xf];
1313 hx = hexchars[(excep & 0x000f)];
1314 *ptr++ = hexchars[hx >> 4]; *ptr++ = hexchars[hx & 0xf];
1315
1316 ptr = mem2hex(crlf, ptr, sizeof(crlf) - 1, 0);
1317 *ptr = 0;
1318 putpacket(output_buffer); /* send it off... */
1319
1320 /* BCBERR */
1321 ptr = output_buffer;
1322 *ptr++ = 'O';
1323 ptr = mem2hex(tbcberr, ptr, sizeof(tbcberr) - 1, 0);
1324
1325 hx = hexchars[(bcberr & 0xf0000000) >> 28];
1326 *ptr++ = hexchars[hx >> 4]; *ptr++ = hexchars[hx & 0xf];
1327 hx = hexchars[(bcberr & 0x0f000000) >> 24];
1328 *ptr++ = hexchars[hx >> 4]; *ptr++ = hexchars[hx & 0xf];
1329 hx = hexchars[(bcberr & 0x00f00000) >> 20];
1330 *ptr++ = hexchars[hx >> 4]; *ptr++ = hexchars[hx & 0xf];
1331 hx = hexchars[(bcberr & 0x000f0000) >> 16];
1332 *ptr++ = hexchars[hx >> 4]; *ptr++ = hexchars[hx & 0xf];
1333 hx = hexchars[(bcberr & 0x0000f000) >> 12];
1334 *ptr++ = hexchars[hx >> 4]; *ptr++ = hexchars[hx & 0xf];
1335 hx = hexchars[(bcberr & 0x00000f00) >> 8];
1336 *ptr++ = hexchars[hx >> 4]; *ptr++ = hexchars[hx & 0xf];
1337 hx = hexchars[(bcberr & 0x000000f0) >> 4];
1338 *ptr++ = hexchars[hx >> 4]; *ptr++ = hexchars[hx & 0xf];
1339 hx = hexchars[(bcberr & 0x0000000f)];
1340 *ptr++ = hexchars[hx >> 4]; *ptr++ = hexchars[hx & 0xf];
1341
1342 ptr = mem2hex(crlf, ptr, sizeof(crlf) - 1, 0);
1343 *ptr = 0;
1344 putpacket(output_buffer); /* send it off... */
1345 }
1346
1347 /*
1348 * tell the debugger that an exception has occurred
1349 */
1350 ptr = output_buffer;
1351
1352 /*
1353 * Send trap type (converted to signal)
1354 */
1355 *ptr++ = 'T';
1356 *ptr++ = hexchars[sigval >> 4];
1357 *ptr++ = hexchars[sigval & 0xf];
1358
1359 /*
1360 * Send Error PC
1361 */
1362 *ptr++ = hexchars[GDB_REGID_PC >> 4];
1363 *ptr++ = hexchars[GDB_REGID_PC & 0xf];
1364 *ptr++ = ':';
1365 ptr = mem2hex(&regs->pc, ptr, 4, 0);
1366 *ptr++ = ';';
1367
1368 /*
1369 * Send frame pointer
1370 */
1371 *ptr++ = hexchars[GDB_REGID_FP >> 4];
1372 *ptr++ = hexchars[GDB_REGID_FP & 0xf];
1373 *ptr++ = ':';
1374 ptr = mem2hex(&regs->a3, ptr, 4, 0);
1375 *ptr++ = ';';
1376
1377 /*
1378 * Send stack pointer
1379 */
1380 ssp = (unsigned long) (regs + 1);
1381 *ptr++ = hexchars[GDB_REGID_SP >> 4];
1382 *ptr++ = hexchars[GDB_REGID_SP & 0xf];
1383 *ptr++ = ':';
1384 ptr = mem2hex(&ssp, ptr, 4, 0);
1385 *ptr++ = ';';
1386
1387 *ptr++ = 0;
1388 putpacket(output_buffer); /* send it off... */
1389
1390packet_waiting:
1391 /*
1392 * Wait for input from remote GDB
1393 */
1394 while (1) {
1395 output_buffer[0] = 0;
1396 getpacket(input_buffer);
1397
1398 switch (input_buffer[0]) {
1399 /* request repeat of last signal number */
1400 case '?':
1401 output_buffer[0] = 'S';
1402 output_buffer[1] = hexchars[sigval >> 4];
1403 output_buffer[2] = hexchars[sigval & 0xf];
1404 output_buffer[3] = 0;
1405 break;
1406
1407 case 'd':
1408 /* toggle debug flag */
1409 break;
1410
1411 /*
1412 * Return the value of the CPU registers
1413 */
1414 case 'g':
1415 zero = 0;
1416 ssp = (u32) (regs + 1);
1417 ptr = output_buffer;
1418 ptr = mem2hex(&regs->d0, ptr, 4, 0);
1419 ptr = mem2hex(&regs->d1, ptr, 4, 0);
1420 ptr = mem2hex(&regs->d2, ptr, 4, 0);
1421 ptr = mem2hex(&regs->d3, ptr, 4, 0);
1422 ptr = mem2hex(&regs->a0, ptr, 4, 0);
1423 ptr = mem2hex(&regs->a1, ptr, 4, 0);
1424 ptr = mem2hex(&regs->a2, ptr, 4, 0);
1425 ptr = mem2hex(&regs->a3, ptr, 4, 0);
1426
1427 ptr = mem2hex(&ssp, ptr, 4, 0); /* 8 */
1428 ptr = mem2hex(&regs->pc, ptr, 4, 0);
1429 ptr = mem2hex(&regs->mdr, ptr, 4, 0);
1430 ptr = mem2hex(&regs->epsw, ptr, 4, 0);
1431 ptr = mem2hex(&regs->lir, ptr, 4, 0);
1432 ptr = mem2hex(&regs->lar, ptr, 4, 0);
1433 ptr = mem2hex(&regs->mdrq, ptr, 4, 0);
1434
1435 ptr = mem2hex(&regs->e0, ptr, 4, 0); /* 15 */
1436 ptr = mem2hex(&regs->e1, ptr, 4, 0);
1437 ptr = mem2hex(&regs->e2, ptr, 4, 0);
1438 ptr = mem2hex(&regs->e3, ptr, 4, 0);
1439 ptr = mem2hex(&regs->e4, ptr, 4, 0);
1440 ptr = mem2hex(&regs->e5, ptr, 4, 0);
1441 ptr = mem2hex(&regs->e6, ptr, 4, 0);
1442 ptr = mem2hex(&regs->e7, ptr, 4, 0);
1443
1444 ptr = mem2hex(&ssp, ptr, 4, 0);
1445 ptr = mem2hex(&regs, ptr, 4, 0);
1446 ptr = mem2hex(&regs->sp, ptr, 4, 0);
1447 ptr = mem2hex(&regs->mcrh, ptr, 4, 0); /* 26 */
1448 ptr = mem2hex(&regs->mcrl, ptr, 4, 0);
1449 ptr = mem2hex(&regs->mcvf, ptr, 4, 0);
1450
1451 ptr = mem2hex(&gdbstub_fpcr, ptr, 4, 0); /* 29 - FPCR */
1452 ptr = mem2hex(&zero, ptr, 4, 0);
1453 ptr = mem2hex(&zero, ptr, 4, 0);
1454 for (loop = 0; loop < 32; loop++)
1455 ptr = mem2hex(&gdbstub_fpufs_array[loop],
1456 ptr, 4, 0); /* 32 - FS0-31 */
1457
1458 break;
1459
1460 /*
1461 * set the value of the CPU registers - return OK
1462 */
1463 case 'G':
1464 {
1465 const char *ptr;
1466
1467 ptr = &input_buffer[1];
1468 ptr = hex2mem(ptr, &regs->d0, 4, 0);
1469 ptr = hex2mem(ptr, &regs->d1, 4, 0);
1470 ptr = hex2mem(ptr, &regs->d2, 4, 0);
1471 ptr = hex2mem(ptr, &regs->d3, 4, 0);
1472 ptr = hex2mem(ptr, &regs->a0, 4, 0);
1473 ptr = hex2mem(ptr, &regs->a1, 4, 0);
1474 ptr = hex2mem(ptr, &regs->a2, 4, 0);
1475 ptr = hex2mem(ptr, &regs->a3, 4, 0);
1476
1477 ptr = hex2mem(ptr, &ssp, 4, 0); /* 8 */
1478 ptr = hex2mem(ptr, &regs->pc, 4, 0);
1479 ptr = hex2mem(ptr, &regs->mdr, 4, 0);
1480 ptr = hex2mem(ptr, &regs->epsw, 4, 0);
1481 ptr = hex2mem(ptr, &regs->lir, 4, 0);
1482 ptr = hex2mem(ptr, &regs->lar, 4, 0);
1483 ptr = hex2mem(ptr, &regs->mdrq, 4, 0);
1484
1485 ptr = hex2mem(ptr, &regs->e0, 4, 0); /* 15 */
1486 ptr = hex2mem(ptr, &regs->e1, 4, 0);
1487 ptr = hex2mem(ptr, &regs->e2, 4, 0);
1488 ptr = hex2mem(ptr, &regs->e3, 4, 0);
1489 ptr = hex2mem(ptr, &regs->e4, 4, 0);
1490 ptr = hex2mem(ptr, &regs->e5, 4, 0);
1491 ptr = hex2mem(ptr, &regs->e6, 4, 0);
1492 ptr = hex2mem(ptr, &regs->e7, 4, 0);
1493
1494 ptr = hex2mem(ptr, &ssp, 4, 0);
1495 ptr = hex2mem(ptr, &zero, 4, 0);
1496 ptr = hex2mem(ptr, &regs->sp, 4, 0);
1497 ptr = hex2mem(ptr, &regs->mcrh, 4, 0); /* 26 */
1498 ptr = hex2mem(ptr, &regs->mcrl, 4, 0);
1499 ptr = hex2mem(ptr, &regs->mcvf, 4, 0);
1500
1501 ptr = hex2mem(ptr, &zero, 4, 0); /* 29 - FPCR */
1502 ptr = hex2mem(ptr, &zero, 4, 0);
1503 ptr = hex2mem(ptr, &zero, 4, 0);
1504 for (loop = 0; loop < 32; loop++) /* 32 - FS0-31 */
1505 ptr = hex2mem(ptr, &zero, 4, 0);
1506
1507#if 0
1508 /*
1509 * See if the stack pointer has moved. If so, then copy
1510 * the saved locals and ins to the new location.
1511 */
1512 unsigned long *newsp = (unsigned long *) registers[SP];
1513 if (sp != newsp)
1514 sp = memcpy(newsp, sp, 16 * 4);
1515#endif
1516
1517 gdbstub_strcpy(output_buffer, "OK");
1518 }
1519 break;
1520
1521 /*
1522 * mAA..AA,LLLL Read LLLL bytes at address AA..AA
1523 */
1524 case 'm':
1525 ptr = &input_buffer[1];
1526
1527 if (hexToInt(&ptr, &addr) &&
1528 *ptr++ == ',' &&
1529 hexToInt(&ptr, &length)
1530 ) {
1531 if (mem2hex((char *) addr, output_buffer,
1532 length, 1))
1533 break;
1534 gdbstub_strcpy(output_buffer, "E03");
1535 } else {
1536 gdbstub_strcpy(output_buffer, "E01");
1537 }
1538 break;
1539
1540 /*
1541 * MAA..AA,LLLL: Write LLLL bytes at address AA.AA
1542 * return OK
1543 */
1544 case 'M':
1545 ptr = &input_buffer[1];
1546
1547 if (hexToInt(&ptr, &addr) &&
1548 *ptr++ == ',' &&
1549 hexToInt(&ptr, &length) &&
1550 *ptr++ == ':'
1551 ) {
1552 if (hex2mem(ptr, (char *) addr, length, 1))
1553 gdbstub_strcpy(output_buffer, "OK");
1554 else
1555 gdbstub_strcpy(output_buffer, "E03");
1556
1557 gdbstub_flush_caches = 1;
1558 } else {
1559 gdbstub_strcpy(output_buffer, "E02");
1560 }
1561 break;
1562
1563 /*
1564 * cAA..AA Continue at address AA..AA(optional)
1565 */
1566 case 'c':
1567 /* try to read optional parameter, pc unchanged if no
1568 * parm */
1569
1570 ptr = &input_buffer[1];
1571 if (hexToInt(&ptr, &addr))
1572 regs->pc = addr;
1573 goto done;
1574
1575 /*
1576 * kill the program
1577 */
1578 case 'k' :
1579 goto done; /* just continue */
1580
1581 /*
1582 * Reset the whole machine (FIXME: system dependent)
1583 */
1584 case 'r':
1585 break;
1586
1587 /*
1588 * Step to next instruction
1589 */
1590 case 's':
1591 /*
1592 * using the T flag doesn't seem to perform single
1593 * stepping (it seems to wind up being caught by the
1594 * JTAG unit), so we have to use breakpoints and
1595 * continue instead.
1596 */
1597 if (gdbstub_single_step(regs) < 0)
1598 /* ignore any fault error for now */
1599 gdbstub_printk("unable to set single-step"
1600 " bp\n");
1601 goto done;
1602
1603 /*
1604 * Set baud rate (bBB)
1605 */
1606 case 'b':
1607 do {
1608 int baudrate;
1609
1610 ptr = &input_buffer[1];
1611 if (!hexToInt(&ptr, &baudrate)) {
1612 gdbstub_strcpy(output_buffer, "B01");
1613 break;
1614 }
1615
1616 if (baudrate) {
1617 /* ACK before changing speed */
1618 putpacket("OK");
1619 gdbstub_io_set_baud(baudrate);
1620 }
1621 } while (0);
1622 break;
1623
1624 /*
1625 * Set breakpoint
1626 */
1627 case 'Z':
1628 ptr = &input_buffer[1];
1629
1630 if (!hexToInt(&ptr, &loop) || *ptr++ != ',' ||
1631 !hexToInt(&ptr, &addr) || *ptr++ != ',' ||
1632 !hexToInt(&ptr, &length)
1633 ) {
1634 gdbstub_strcpy(output_buffer, "E01");
1635 break;
1636 }
1637
1638 /* only support software breakpoints */
1639 gdbstub_strcpy(output_buffer, "E03");
1640 if (loop != 0 ||
1641 length < 1 ||
1642 length > 7 ||
1643 (unsigned long) addr < 4096)
1644 break;
1645
1646 if (gdbstub_set_breakpoint((u8 *) addr, length) < 0)
1647 break;
1648
1649 gdbstub_strcpy(output_buffer, "OK");
1650 break;
1651
1652 /*
1653 * Clear breakpoint
1654 */
1655 case 'z':
1656 ptr = &input_buffer[1];
1657
1658 if (!hexToInt(&ptr, &loop) || *ptr++ != ',' ||
1659 !hexToInt(&ptr, &addr) || *ptr++ != ',' ||
1660 !hexToInt(&ptr, &length)
1661 ) {
1662 gdbstub_strcpy(output_buffer, "E01");
1663 break;
1664 }
1665
1666 /* only support software breakpoints */
1667 gdbstub_strcpy(output_buffer, "E03");
1668 if (loop != 0 ||
1669 length < 1 ||
1670 length > 7 ||
1671 (unsigned long) addr < 4096)
1672 break;
1673
1674 if (gdbstub_clear_breakpoint((u8 *) addr, length) < 0)
1675 break;
1676
1677 gdbstub_strcpy(output_buffer, "OK");
1678 break;
1679
1680 default:
1681 gdbstub_proto("### GDB Unsupported Cmd '%s'\n",
1682 input_buffer);
1683 break;
1684 }
1685
1686 /* reply to the request */
1687 putpacket(output_buffer);
1688 }
1689
1690done:
1691 /*
1692 * Need to flush the instruction cache here, as we may
1693 * have deposited a breakpoint, and the icache probably
1694 * has no way of knowing that a data ref to some location
1695 * may have changed something that is in the instruction
1696 * cache.
1697 * NB: We flush both caches, just to be sure...
1698 */
1699 if (gdbstub_flush_caches)
1700 gdbstub_purge_cache();
1701
1702 gdbstub_load_fpu();
1703 mn10300_set_gdbleds(0);
1704 if (excep == EXCEP_NMI)
1705 NMICR = NMICR_NMIF;
1706
1707 touch_softlockup_watchdog();
1708
1709 local_irq_restore(epsw);
1710 return 1;
1711}
1712
1713/*
1714 * handle event interception
1715 */
1716asmlinkage int gdbstub_intercept(struct pt_regs *regs,
1717 enum exception_code excep)
1718{
1719 static u8 notfirst = 1;
1720 int ret;
1721
1722 if (gdbstub_busy)
1723 gdbstub_printk("--> gdbstub reentered itself\n");
1724 gdbstub_busy = 1;
1725
1726 if (notfirst) {
1727 unsigned long mdr;
1728 asm("mov mdr,%0" : "=d"(mdr));
1729
1730 gdbstub_entry(
1731 "--> gdbstub_intercept(%p,%04x) [MDR=%lx PC=%lx]\n",
1732 regs, excep, mdr, regs->pc);
1733
1734 gdbstub_entry(
1735 "PC: %08lx EPSW: %08lx SSP: %08lx mode: %s\n",
1736 regs->pc, regs->epsw, (unsigned long) &ret,
1737 user_mode(regs) ? "User" : "Super");
1738 gdbstub_entry(
1739 "d0: %08lx d1: %08lx d2: %08lx d3: %08lx\n",
1740 regs->d0, regs->d1, regs->d2, regs->d3);
1741 gdbstub_entry(
1742 "a0: %08lx a1: %08lx a2: %08lx a3: %08lx\n",
1743 regs->a0, regs->a1, regs->a2, regs->a3);
1744 gdbstub_entry(
1745 "e0: %08lx e1: %08lx e2: %08lx e3: %08lx\n",
1746 regs->e0, regs->e1, regs->e2, regs->e3);
1747 gdbstub_entry(
1748 "e4: %08lx e5: %08lx e6: %08lx e7: %08lx\n",
1749 regs->e4, regs->e5, regs->e6, regs->e7);
1750 gdbstub_entry(
1751 "lar: %08lx lir: %08lx mdr: %08lx usp: %08lx\n",
1752 regs->lar, regs->lir, regs->mdr, regs->sp);
1753 gdbstub_entry(
1754 "cvf: %08lx crl: %08lx crh: %08lx drq: %08lx\n",
1755 regs->mcvf, regs->mcrl, regs->mcrh, regs->mdrq);
1756 gdbstub_entry(
1757 "threadinfo=%p task=%p)\n",
1758 current_thread_info(), current);
1759 } else {
1760 notfirst = 1;
1761 }
1762
1763 ret = gdbstub(regs, excep);
1764
1765 gdbstub_entry("<-- gdbstub_intercept()\n");
1766 gdbstub_busy = 0;
1767 return ret;
1768}
1769
1770/*
1771 * handle the GDB stub itself causing an exception
1772 */
1773asmlinkage void gdbstub_exception(struct pt_regs *regs,
1774 enum exception_code excep)
1775{
1776 unsigned long mdr;
1777
1778 asm("mov mdr,%0" : "=d"(mdr));
1779 gdbstub_entry("--> gdbstub exception({%p},%04x) [MDR=%lx]\n",
1780 regs, excep, mdr);
1781
1782 while ((unsigned long) regs == 0xffffffff) {}
1783
1784 /* handle guarded memory accesses where we know it might fault */
1785 if (regs->pc == (unsigned) gdbstub_read_byte_guard) {
1786 regs->pc = (unsigned) gdbstub_read_byte_cont;
1787 goto fault;
1788 }
1789
1790 if (regs->pc == (unsigned) gdbstub_read_word_guard) {
1791 regs->pc = (unsigned) gdbstub_read_word_cont;
1792 goto fault;
1793 }
1794
1795 if (regs->pc == (unsigned) gdbstub_read_dword_guard) {
1796 regs->pc = (unsigned) gdbstub_read_dword_cont;
1797 goto fault;
1798 }
1799
1800 if (regs->pc == (unsigned) gdbstub_write_byte_guard) {
1801 regs->pc = (unsigned) gdbstub_write_byte_cont;
1802 goto fault;
1803 }
1804
1805 if (regs->pc == (unsigned) gdbstub_write_word_guard) {
1806 regs->pc = (unsigned) gdbstub_write_word_cont;
1807 goto fault;
1808 }
1809
1810 if (regs->pc == (unsigned) gdbstub_write_dword_guard) {
1811 regs->pc = (unsigned) gdbstub_write_dword_cont;
1812 goto fault;
1813 }
1814
1815 gdbstub_printk("\n### GDB stub caused an exception ###\n");
1816
1817 /* something went horribly wrong */
1818 console_verbose();
1819 show_registers(regs);
1820
1821 panic("GDB Stub caused an unexpected exception - can't continue\n");
1822
1823 /* we caught an attempt by the stub to access silly memory */
1824fault:
1825 gdbstub_entry("<-- gdbstub exception() = EFAULT\n");
1826 regs->d0 = -EFAULT;
1827 return;
1828}
1829
1830/*
1831 * send an exit message to GDB
1832 */
1833void gdbstub_exit(int status)
1834{
1835 unsigned char checksum;
1836 unsigned char ch;
1837 int count;
1838
1839 gdbstub_busy = 1;
1840 output_buffer[0] = 'W';
1841 output_buffer[1] = hexchars[(status >> 4) & 0x0F];
1842 output_buffer[2] = hexchars[status & 0x0F];
1843 output_buffer[3] = 0;
1844
1845 gdbstub_io_tx_char('$');
1846 checksum = 0;
1847 count = 0;
1848
1849 while ((ch = output_buffer[count]) != 0) {
1850 gdbstub_io_tx_char(ch);
1851 checksum += ch;
1852 count += 1;
1853 }
1854
1855 gdbstub_io_tx_char('#');
1856 gdbstub_io_tx_char(hexchars[checksum >> 4]);
1857 gdbstub_io_tx_char(hexchars[checksum & 0xf]);
1858
1859 /* make sure the output is flushed, or else RedBoot might clobber it */
1860 gdbstub_io_tx_flush();
1861
1862 gdbstub_busy = 0;
1863}
1864
1865/*
1866 * initialise the GDB stub
1867 */
1868asmlinkage void __init gdbstub_init(void)
1869{
1870#ifdef CONFIG_GDBSTUB_IMMEDIATE
1871 unsigned char ch;
1872 int ret;
1873#endif
1874
1875 gdbstub_busy = 1;
1876
1877 printk(KERN_INFO "%s", gdbstub_banner);
1878
1879 gdbstub_io_init();
1880
1881 gdbstub_entry("--> gdbstub_init\n");
1882
1883 /* try to talk to GDB (or anyone insane enough to want to type GDB
1884 * protocol by hand) */
1885 gdbstub_io("### GDB Tx ACK\n");
1886 gdbstub_io_tx_char('+'); /* 'hello world' */
1887
1888#ifdef CONFIG_GDBSTUB_IMMEDIATE
1889 gdbstub_printk("GDB Stub waiting for packet\n");
1890
1891 /* in case GDB is started before us, ACK any packets that are already
1892 * sitting there (presumably "$?#xx")
1893 */
1894 do { gdbstub_io_rx_char(&ch, 0); } while (ch != '$');
1895 do { gdbstub_io_rx_char(&ch, 0); } while (ch != '#');
1896 /* eat first csum byte */
1897 do { ret = gdbstub_io_rx_char(&ch, 0); } while (ret != 0);
1898 /* eat second csum byte */
1899 do { ret = gdbstub_io_rx_char(&ch, 0); } while (ret != 0);
1900
1901 gdbstub_io("### GDB Tx NAK\n");
1902 gdbstub_io_tx_char('-'); /* NAK it */
1903
1904#else
1905 printk("GDB Stub ready\n");
1906#endif
1907
1908 gdbstub_busy = 0;
1909 gdbstub_entry("<-- gdbstub_init\n");
1910}
1911
1912/*
1913 * register the console at a more appropriate time
1914 */
1915#ifdef CONFIG_GDBSTUB_CONSOLE
1916static int __init gdbstub_postinit(void)
1917{
1918 printk(KERN_NOTICE "registering console\n");
1919 register_console(&gdbstub_console);
1920 return 0;
1921}
1922
1923__initcall(gdbstub_postinit);
1924#endif
1925
1926/*
1927 * handle character reception on GDB serial port
1928 * - jump into the GDB stub if BREAK is detected on the serial line
1929 */
1930asmlinkage void gdbstub_rx_irq(struct pt_regs *regs, enum exception_code excep)
1931{
1932 char ch;
1933 int ret;
1934
1935 gdbstub_entry("--> gdbstub_rx_irq\n");
1936
1937 do {
1938 ret = gdbstub_io_rx_char(&ch, 1);
1939 if (ret != -EIO && ret != -EAGAIN) {
1940 if (ret != -EINTR)
1941 gdbstub_rx_unget = ch;
1942 gdbstub(regs, excep);
1943 }
1944 } while (ret != -EAGAIN);
1945
1946 gdbstub_entry("<-- gdbstub_rx_irq\n");
1947}
diff --git a/arch/mn10300/kernel/head.S b/arch/mn10300/kernel/head.S
new file mode 100644
index 000000000000..606bd8c6758d
--- /dev/null
+++ b/arch/mn10300/kernel/head.S
@@ -0,0 +1,255 @@
1/* Boot entry point for MN10300 kernel
2 *
3 * Copyright (C) 2005 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11
12#include <linux/threads.h>
13#include <linux/linkage.h>
14#include <linux/serial_reg.h>
15#include <asm/thread_info.h>
16#include <asm/page.h>
17#include <asm/pgtable.h>
18#include <asm/frame.inc>
19#include <asm/param.h>
20#include <asm/unit/serial.h>
21
22 .section .text.head,"ax"
23
24###############################################################################
25#
26# bootloader entry point
27#
28###############################################################################
29 .globl _start
30 .type _start,@function
31_start:
32 # save commandline pointer
33 mov d0,a3
34
35 # preload the PGD pointer register
36 mov swapper_pg_dir,d0
37 mov d0,(PTBR)
38
39 # turn on the TLBs
40 mov MMUCTR_IIV|MMUCTR_DIV,d0
41 mov d0,(MMUCTR)
42 mov MMUCTR_ITE|MMUCTR_DTE|MMUCTR_CE,d0
43 mov d0,(MMUCTR)
44
45 # turn on AM33v2 exception handling mode and set the trap table base
46 movhu (CPUP),d0
47 or CPUP_EXM_AM33V2,d0
48 movhu d0,(CPUP)
49 mov CONFIG_INTERRUPT_VECTOR_BASE,d0
50 mov d0,(TBR)
51
52 # invalidate and enable both of the caches
53 mov CHCTR,a0
54 clr d0
55 movhu d0,(a0) # turn off first
56 mov CHCTR_ICINV|CHCTR_DCINV,d0
57 movhu d0,(a0)
58 setlb
59 mov (a0),d0
60 btst CHCTR_ICBUSY|CHCTR_DCBUSY,d0 # wait till not busy
61 lne
62
63#ifndef CONFIG_MN10300_CACHE_DISABLED
64#ifdef CONFIG_MN10300_CACHE_WBACK
65#ifndef CONFIG_MN10300_CACHE_WBACK_NOWRALLOC
66 mov CHCTR_ICEN|CHCTR_DCEN|CHCTR_DCWTMD_WRBACK,d0
67#else
68 mov CHCTR_ICEN|CHCTR_DCEN|CHCTR_DCWTMD_WRBACK|CHCTR_DCALMD,d0
69#endif /* CACHE_DISABLED */
70#else
71 mov CHCTR_ICEN|CHCTR_DCEN|CHCTR_DCWTMD_WRTHROUGH,d0
72#endif /* WBACK */
73 movhu d0,(a0) # enable
74#endif /* NOWRALLOC */
75
76 # turn on RTS on the debug serial port if applicable
77#ifdef CONFIG_MN10300_UNIT_ASB2305
78 bset UART_MCR_RTS,(ASB2305_DEBUG_MCR)
79#endif
80
81 # clear the BSS area
82 mov __bss_start,a0
83 mov __bss_stop,a1
84 clr d0
85bssclear:
86 cmp a1,a0
87 bge bssclear_end
88 mov d0,(a0)
89 inc4 a0
90 bra bssclear
91bssclear_end:
92
93 # retrieve the parameters (including command line) before we overwrite
94 # them
95 cmp 0xabadcafe,d1
96 bne __no_parameters
97
98__copy_parameters:
99 mov redboot_command_line,a0
100 mov a0,a1
101 add COMMAND_LINE_SIZE,a1
1021:
103 movbu (a3),d0
104 inc a3
105 movbu d0,(a0)
106 inc a0
107 cmp a1,a0
108 blt 1b
109
110 mov redboot_platform_name,a0
111 mov a0,a1
112 add COMMAND_LINE_SIZE,a1
113 mov d2,a3
1141:
115 movbu (a3),d0
116 inc a3
117 movbu d0,(a0)
118 inc a0
119 cmp a1,a0
120 blt 1b
121
122__no_parameters:
123
124 # set up the registers with recognisable rubbish in them
125 mov init_thread_union+THREAD_SIZE-12,sp
126
127 mov 0xea01eaea,d0
128 mov d0,(4,sp) # EPSW save area
129 mov 0xea02eaea,d0
130 mov d0,(8,sp) # PC save area
131
132 mov 0xeb0060ed,d0
133 mov d0,mdr
134 mov 0xeb0061ed,d0
135 mov d0,mdrq
136 mov 0xeb0062ed,d0
137 mov d0,mcrh
138 mov 0xeb0063ed,d0
139 mov d0,mcrl
140 mov 0xeb0064ed,d0
141 mov d0,mcvf
142 mov 0xed0065ed,a3
143 mov a3,usp
144
145 mov 0xed00e0ed,e0
146 mov 0xed00e1ed,e1
147 mov 0xed00e2ed,e2
148 mov 0xed00e3ed,e3
149 mov 0xed00e4ed,e4
150 mov 0xed00e5ed,e5
151 mov 0xed00e6ed,e6
152 mov 0xed00e7ed,e7
153
154 mov 0xed00d0ed,d0
155 mov 0xed00d1ed,d1
156 mov 0xed00d2ed,d2
157 mov 0xed00d3ed,d3
158 mov 0xed00a0ed,a0
159 mov 0xed00a1ed,a1
160 mov 0xed00a2ed,a2
161 mov 0,a3
162
163 # set up the initial kernel stack
164 SAVE_ALL
165 mov 0xffffffff,d0
166 mov d0,(REG_ORIG_D0,fp)
167
168 # put different recognisable rubbish in the regs
169 mov 0xfb0060ed,d0
170 mov d0,mdr
171 mov 0xfb0061ed,d0
172 mov d0,mdrq
173 mov 0xfb0062ed,d0
174 mov d0,mcrh
175 mov 0xfb0063ed,d0
176 mov d0,mcrl
177 mov 0xfb0064ed,d0
178 mov d0,mcvf
179 mov 0xfd0065ed,a0
180 mov a0,usp
181
182 mov 0xfd00e0ed,e0
183 mov 0xfd00e1ed,e1
184 mov 0xfd00e2ed,e2
185 mov 0xfd00e3ed,e3
186 mov 0xfd00e4ed,e4
187 mov 0xfd00e5ed,e5
188 mov 0xfd00e6ed,e6
189 mov 0xfd00e7ed,e7
190
191 mov 0xfd00d0ed,d0
192 mov 0xfd00d1ed,d1
193 mov 0xfd00d2ed,d2
194 mov 0xfd00d3ed,d3
195 mov 0xfd00a0ed,a0
196 mov 0xfd00a1ed,a1
197 mov 0xfd00a2ed,a2
198
199 # we may be holding current in E2
200#ifdef CONFIG_MN10300_CURRENT_IN_E2
201 mov init_task,e2
202#endif
203
204 # initialise the processor and the unit
205 call processor_init[],0
206 call unit_init[],0
207
208#ifdef CONFIG_GDBSTUB
209 call gdbstub_init[],0
210
211#ifdef CONFIG_GDBSTUB_IMMEDIATE
212 .globl __gdbstub_pause
213__gdbstub_pause:
214 bra __gdbstub_pause
215#endif
216#endif
217
218 jmp start_kernel
219 .size _start, _start-.
220ENTRY(__head_end)
221
222/*
223 * This is initialized to disallow all access to the low 2G region
224 * - the high 2G region is managed directly by the MMU
225 * - range 0x70000000-0x7C000000 are initialised for use by VMALLOC
226 */
227 .section .bss
228 .balign PAGE_SIZE
229ENTRY(swapper_pg_dir)
230 .space PTRS_PER_PGD*4
231
232/*
233 * The page tables are initialized to only 8MB here - the final page
234 * tables are set up later depending on memory size.
235 */
236
237 .balign PAGE_SIZE
238ENTRY(empty_zero_page)
239 .space PAGE_SIZE
240
241 .balign PAGE_SIZE
242ENTRY(empty_bad_page)
243 .space PAGE_SIZE
244
245 .balign PAGE_SIZE
246ENTRY(empty_bad_pte_table)
247 .space PAGE_SIZE
248
249 .balign PAGE_SIZE
250ENTRY(large_page_table)
251 .space PAGE_SIZE
252
253 .balign PAGE_SIZE
254ENTRY(kernel_vmalloc_ptes)
255 .space ((VMALLOC_END-VMALLOC_START)/PAGE_SIZE)*4
diff --git a/arch/mn10300/kernel/init_task.c b/arch/mn10300/kernel/init_task.c
new file mode 100644
index 000000000000..39fe6882dd1d
--- /dev/null
+++ b/arch/mn10300/kernel/init_task.c
@@ -0,0 +1,45 @@
1/* MN10300 Initial task definitions
2 *
3 * Copyright (C) 2007 Matsushita Electric Industrial Co., Ltd.
4 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#include <linux/mm.h>
12#include <linux/module.h>
13#include <linux/sched.h>
14#include <linux/init.h>
15#include <linux/init_task.h>
16#include <linux/fs.h>
17#include <linux/mqueue.h>
18#include <asm/uaccess.h>
19#include <asm/pgtable.h>
20
21static struct fs_struct init_fs = INIT_FS;
22static struct files_struct init_files = INIT_FILES;
23static struct signal_struct init_signals = INIT_SIGNALS(init_signals);
24static struct sighand_struct init_sighand = INIT_SIGHAND(init_sighand);
25struct mm_struct init_mm = INIT_MM(init_mm);
26EXPORT_SYMBOL(init_mm);
27
28/*
29 * Initial thread structure.
30 *
31 * We need to make sure that this is THREAD_SIZE aligned due to the
32 * way process stacks are handled. This is done by having a special
33 * "init_task" linker map entry..
34 */
35union thread_union init_thread_union
36 __attribute__((__section__(".data.init_task"))) =
37 { INIT_THREAD_INFO(init_task) };
38
39/*
40 * Initial task structure.
41 *
42 * All other task structs will be allocated on slabs in fork.c
43 */
44struct task_struct init_task = INIT_TASK(init_task);
45EXPORT_SYMBOL(init_task);
diff --git a/arch/mn10300/kernel/internal.h b/arch/mn10300/kernel/internal.h
new file mode 100644
index 000000000000..eee2eee86267
--- /dev/null
+++ b/arch/mn10300/kernel/internal.h
@@ -0,0 +1,20 @@
1/* Internal definitions for the arch part of the core kernel
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11
12/*
13 * kthread.S
14 */
15extern int kernel_thread_helper(int);
16
17/*
18 * entry.S
19 */
20extern void ret_from_fork(struct task_struct *) __attribute__((noreturn));
diff --git a/arch/mn10300/kernel/io.c b/arch/mn10300/kernel/io.c
new file mode 100644
index 000000000000..e96fdf6bb542
--- /dev/null
+++ b/arch/mn10300/kernel/io.c
@@ -0,0 +1,30 @@
1/* MN10300 Misaligned multibyte-word I/O
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#include <linux/module.h>
12#include <linux/string.h>
13#include <linux/kernel.h>
14#include <asm/io.h>
15
16/*
17 * output data from a potentially misaligned buffer
18 */
19void __outsl(unsigned long addr, const void *buffer, int count)
20{
21 const unsigned char *buf = buffer;
22 unsigned long val;
23
24 while (count--) {
25 memcpy(&val, buf, 4);
26 outl(val, addr);
27 buf += 4;
28 }
29}
30EXPORT_SYMBOL(__outsl);
diff --git a/arch/mn10300/kernel/irq.c b/arch/mn10300/kernel/irq.c
new file mode 100644
index 000000000000..761c434a2488
--- /dev/null
+++ b/arch/mn10300/kernel/irq.c
@@ -0,0 +1,235 @@
1/* MN10300 Arch-specific interrupt handling
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#include <linux/module.h>
12#include <linux/interrupt.h>
13#include <linux/kernel_stat.h>
14#include <linux/seq_file.h>
15#include <asm/setup.h>
16
17unsigned long __mn10300_irq_enabled_epsw = EPSW_IE | EPSW_IM_7;
18EXPORT_SYMBOL(__mn10300_irq_enabled_epsw);
19
20atomic_t irq_err_count;
21
22/*
23 * MN10300 INTC controller operations
24 */
25static void mn10300_cpupic_disable(unsigned int irq)
26{
27 u16 tmp = GxICR(irq);
28 GxICR(irq) = (tmp & GxICR_LEVEL) | GxICR_DETECT;
29 tmp = GxICR(irq);
30}
31
32static void mn10300_cpupic_enable(unsigned int irq)
33{
34 u16 tmp = GxICR(irq);
35 GxICR(irq) = (tmp & GxICR_LEVEL) | GxICR_ENABLE;
36 tmp = GxICR(irq);
37}
38
39static void mn10300_cpupic_ack(unsigned int irq)
40{
41 u16 tmp;
42 *(volatile u8 *) &GxICR(irq) = GxICR_DETECT;
43 tmp = GxICR(irq);
44}
45
46static void mn10300_cpupic_mask(unsigned int irq)
47{
48 u16 tmp = GxICR(irq);
49 GxICR(irq) = (tmp & GxICR_LEVEL);
50 tmp = GxICR(irq);
51}
52
53static void mn10300_cpupic_mask_ack(unsigned int irq)
54{
55 u16 tmp = GxICR(irq);
56 GxICR(irq) = (tmp & GxICR_LEVEL) | GxICR_DETECT;
57 tmp = GxICR(irq);
58}
59
60static void mn10300_cpupic_unmask(unsigned int irq)
61{
62 u16 tmp = GxICR(irq);
63 GxICR(irq) = (tmp & GxICR_LEVEL) | GxICR_ENABLE | GxICR_DETECT;
64 tmp = GxICR(irq);
65}
66
67static void mn10300_cpupic_end(unsigned int irq)
68{
69 u16 tmp = GxICR(irq);
70 GxICR(irq) = (tmp & GxICR_LEVEL) | GxICR_ENABLE;
71 tmp = GxICR(irq);
72}
73
74static struct irq_chip mn10300_cpu_pic = {
75 .name = "cpu",
76 .disable = mn10300_cpupic_disable,
77 .enable = mn10300_cpupic_enable,
78 .ack = mn10300_cpupic_ack,
79 .mask = mn10300_cpupic_mask,
80 .mask_ack = mn10300_cpupic_mask_ack,
81 .unmask = mn10300_cpupic_unmask,
82 .end = mn10300_cpupic_end,
83};
84
85/*
86 * 'what should we do if we get a hw irq event on an illegal vector'.
87 * each architecture has to answer this themselves.
88 */
89void ack_bad_irq(int irq)
90{
91 printk(KERN_WARNING "unexpected IRQ trap at vector %02x\n", irq);
92}
93
94/*
95 * change the level at which an IRQ executes
96 * - must not be called whilst interrupts are being processed!
97 */
98void set_intr_level(int irq, u16 level)
99{
100 u16 tmp;
101
102 if (in_interrupt())
103 BUG();
104
105 tmp = GxICR(irq);
106 GxICR(irq) = (tmp & GxICR_ENABLE) | level;
107 tmp = GxICR(irq);
108}
109
110/*
111 * mark an interrupt to be ACK'd after interrupt handlers have been run rather
112 * than before
113 * - see Documentation/mn10300/features.txt
114 */
115void set_intr_postackable(int irq)
116{
117 set_irq_handler(irq, handle_level_irq);
118}
119
120/*
121 * initialise the interrupt system
122 */
123void __init init_IRQ(void)
124{
125 int irq;
126
127 for (irq = 0; irq < NR_IRQS; irq++)
128 if (irq_desc[irq].chip == &no_irq_type)
129 set_irq_chip_and_handler(irq, &mn10300_cpu_pic,
130 handle_edge_irq);
131 unit_init_IRQ();
132}
133
134/*
135 * handle normal device IRQs
136 */
137asmlinkage void do_IRQ(void)
138{
139 unsigned long sp, epsw, irq_disabled_epsw, old_irq_enabled_epsw;
140 int irq;
141
142 sp = current_stack_pointer();
143 if (sp - (sp & ~(THREAD_SIZE - 1)) < STACK_WARN)
144 BUG();
145
146 /* make sure local_irq_enable() doesn't muck up the interrupt priority
147 * setting in EPSW */
148 old_irq_enabled_epsw = __mn10300_irq_enabled_epsw;
149 local_save_flags(epsw);
150 __mn10300_irq_enabled_epsw = EPSW_IE | (EPSW_IM & epsw);
151 irq_disabled_epsw = EPSW_IE | MN10300_CLI_LEVEL;
152
153 __IRQ_STAT(smp_processor_id(), __irq_count)++;
154
155 irq_enter();
156
157 for (;;) {
158 /* ask the interrupt controller for the next IRQ to process
159 * - the result we get depends on EPSW.IM
160 */
161 irq = IAGR & IAGR_GN;
162 if (!irq)
163 break;
164
165 local_irq_restore(irq_disabled_epsw);
166
167 generic_handle_irq(irq >> 2);
168
169 /* restore IRQ controls for IAGR access */
170 local_irq_restore(epsw);
171 }
172
173 __mn10300_irq_enabled_epsw = old_irq_enabled_epsw;
174
175 irq_exit();
176}
177
178/*
179 * Display interrupt management information through /proc/interrupts
180 */
181int show_interrupts(struct seq_file *p, void *v)
182{
183 int i = *(loff_t *) v, j, cpu;
184 struct irqaction *action;
185 unsigned long flags;
186
187 switch (i) {
188 /* display column title bar naming CPUs */
189 case 0:
190 seq_printf(p, " ");
191 for (j = 0; j < NR_CPUS; j++)
192 if (cpu_online(j))
193 seq_printf(p, "CPU%d ", j);
194 seq_putc(p, '\n');
195 break;
196
197 /* display information rows, one per active CPU */
198 case 1 ... NR_IRQS - 1:
199 spin_lock_irqsave(&irq_desc[i].lock, flags);
200
201 action = irq_desc[i].action;
202 if (action) {
203 seq_printf(p, "%3d: ", i);
204 for_each_present_cpu(cpu)
205 seq_printf(p, "%10u ", kstat_cpu(cpu).irqs[i]);
206 seq_printf(p, " %14s.%u", irq_desc[i].chip->name,
207 (GxICR(i) & GxICR_LEVEL) >>
208 GxICR_LEVEL_SHIFT);
209 seq_printf(p, " %s", action->name);
210
211 for (action = action->next;
212 action;
213 action = action->next)
214 seq_printf(p, ", %s", action->name);
215
216 seq_putc(p, '\n');
217 }
218
219 spin_unlock_irqrestore(&irq_desc[i].lock, flags);
220 break;
221
222 /* polish off with NMI and error counters */
223 case NR_IRQS:
224 seq_printf(p, "NMI: ");
225 for (j = 0; j < NR_CPUS; j++)
226 if (cpu_online(j))
227 seq_printf(p, "%10u ", nmi_count(j));
228 seq_putc(p, '\n');
229
230 seq_printf(p, "ERR: %10u\n", atomic_read(&irq_err_count));
231 break;
232 }
233
234 return 0;
235}
diff --git a/arch/mn10300/kernel/kernel_execve.S b/arch/mn10300/kernel/kernel_execve.S
new file mode 100644
index 000000000000..86039f105268
--- /dev/null
+++ b/arch/mn10300/kernel/kernel_execve.S
@@ -0,0 +1,37 @@
1/* MN10300 In-kernel program execution
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#include <linux/linkage.h>
12#include <asm/unistd.h>
13
14###############################################################################
15#
16# Do a system call from kernel instead of calling sys_execve so we end up with
17# proper pt_regs.
18#
19# int kernel_execve(const char *filename, char *const argv[],
20# char *const envp[])
21#
22# On entry: D0/D1/8(SP): arguments to function
23# On return: D0: syscall return.
24#
25###############################################################################
26 .globl kernel_execve
27 .type kernel_execve,@function
28kernel_execve:
29 mov a3,a1
30 mov d0,a0
31 mov (12,sp),a3
32 mov +__NR_execve,d0
33 syscall 0
34 mov a1,a3
35 rets
36
37 .size kernel_execve,.-kernel_execve
diff --git a/arch/mn10300/kernel/kprobes.c b/arch/mn10300/kernel/kprobes.c
new file mode 100644
index 000000000000..dacafab00eb2
--- /dev/null
+++ b/arch/mn10300/kernel/kprobes.c
@@ -0,0 +1,653 @@
1/* MN10300 Kernel probes implementation
2 *
3 * Copyright (C) 2005 Red Hat, Inc. All Rights Reserved.
4 * Written by Mark Salter (msalter@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public Licence as published by
8 * the Free Software Foundation; either version 2 of the Licence, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public Licence for more details.
15 *
16 * You should have received a copy of the GNU General Public Licence
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
19 */
20#include <linux/kprobes.h>
21#include <linux/ptrace.h>
22#include <linux/spinlock.h>
23#include <linux/preempt.h>
24#include <linux/kdebug.h>
25#include <asm/cacheflush.h>
26
27struct kretprobe_blackpoint kretprobe_blacklist[] = { { NULL, NULL } };
28const int kretprobe_blacklist_size = ARRAY_SIZE(kretprobe_blacklist);
29
30/* kprobe_status settings */
31#define KPROBE_HIT_ACTIVE 0x00000001
32#define KPROBE_HIT_SS 0x00000002
33
34static struct kprobe *current_kprobe;
35static unsigned long current_kprobe_orig_pc;
36static unsigned long current_kprobe_next_pc;
37static int current_kprobe_ss_flags;
38static unsigned long kprobe_status;
39static kprobe_opcode_t current_kprobe_ss_buf[MAX_INSN_SIZE + 2];
40static unsigned long current_kprobe_bp_addr;
41
42DEFINE_PER_CPU(struct kprobe *, current_kprobe) = NULL;
43
44
45/* singlestep flag bits */
46#define SINGLESTEP_BRANCH 1
47#define SINGLESTEP_PCREL 2
48
49#define READ_BYTE(p, valp) \
50 do { *(u8 *)(valp) = *(u8 *)(p); } while (0)
51
52#define READ_WORD16(p, valp) \
53 do { \
54 READ_BYTE((p), (valp)); \
55 READ_BYTE((u8 *)(p) + 1, (u8 *)(valp) + 1); \
56 } while (0)
57
58#define READ_WORD32(p, valp) \
59 do { \
60 READ_BYTE((p), (valp)); \
61 READ_BYTE((u8 *)(p) + 1, (u8 *)(valp) + 1); \
62 READ_BYTE((u8 *)(p) + 2, (u8 *)(valp) + 2); \
63 READ_BYTE((u8 *)(p) + 3, (u8 *)(valp) + 3); \
64 } while (0)
65
66
67static const u8 mn10300_insn_sizes[256] =
68{
69 /* 1 2 3 4 5 6 7 8 9 a b c d e f */
70 1, 3, 3, 3, 1, 3, 3, 3, 1, 3, 3, 3, 1, 3, 3, 3, /* 0 */
71 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, /* 1 */
72 2, 2, 2, 2, 3, 3, 3, 3, 2, 2, 2, 2, 3, 3, 3, 3, /* 2 */
73 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, /* 3 */
74 1, 1, 2, 2, 1, 1, 2, 2, 1, 1, 2, 2, 1, 1, 2, 2, /* 4 */
75 1, 1, 1, 1, 1, 1, 1, 1, 2, 2, 2, 2, 2, 2, 2, 2, /* 5 */
76 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, /* 6 */
77 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, /* 7 */
78 2, 1, 1, 1, 1, 2, 1, 1, 1, 1, 2, 1, 1, 1, 1, 2, /* 8 */
79 2, 1, 1, 1, 1, 2, 1, 1, 1, 1, 2, 1, 1, 1, 1, 2, /* 9 */
80 2, 1, 1, 1, 1, 2, 1, 1, 1, 1, 2, 1, 1, 1, 1, 2, /* a */
81 2, 1, 1, 1, 1, 2, 1, 1, 1, 1, 2, 1, 1, 1, 1, 2, /* b */
82 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 2, 2, /* c */
83 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* d */
84 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, /* e */
85 0, 2, 2, 2, 2, 2, 2, 4, 0, 3, 0, 4, 0, 6, 7, 1 /* f */
86};
87
88#define LT (1 << 0)
89#define GT (1 << 1)
90#define GE (1 << 2)
91#define LE (1 << 3)
92#define CS (1 << 4)
93#define HI (1 << 5)
94#define CC (1 << 6)
95#define LS (1 << 7)
96#define EQ (1 << 8)
97#define NE (1 << 9)
98#define RA (1 << 10)
99#define VC (1 << 11)
100#define VS (1 << 12)
101#define NC (1 << 13)
102#define NS (1 << 14)
103
104static const u16 cond_table[] = {
105 /* V C N Z */
106 /* 0 0 0 0 */ (NE | NC | CC | VC | GE | GT | HI),
107 /* 0 0 0 1 */ (EQ | NC | CC | VC | GE | LE | LS),
108 /* 0 0 1 0 */ (NE | NS | CC | VC | LT | LE | HI),
109 /* 0 0 1 1 */ (EQ | NS | CC | VC | LT | LE | LS),
110 /* 0 1 0 0 */ (NE | NC | CS | VC | GE | GT | LS),
111 /* 0 1 0 1 */ (EQ | NC | CS | VC | GE | LE | LS),
112 /* 0 1 1 0 */ (NE | NS | CS | VC | LT | LE | LS),
113 /* 0 1 1 1 */ (EQ | NS | CS | VC | LT | LE | LS),
114 /* 1 0 0 0 */ (NE | NC | CC | VS | LT | LE | HI),
115 /* 1 0 0 1 */ (EQ | NC | CC | VS | LT | LE | LS),
116 /* 1 0 1 0 */ (NE | NS | CC | VS | GE | GT | HI),
117 /* 1 0 1 1 */ (EQ | NS | CC | VS | GE | LE | LS),
118 /* 1 1 0 0 */ (NE | NC | CS | VS | LT | LE | LS),
119 /* 1 1 0 1 */ (EQ | NC | CS | VS | LT | LE | LS),
120 /* 1 1 1 0 */ (NE | NS | CS | VS | GE | GT | LS),
121 /* 1 1 1 1 */ (EQ | NS | CS | VS | GE | LE | LS),
122};
123
124/*
125 * Calculate what the PC will be after executing next instruction
126 */
127static unsigned find_nextpc(struct pt_regs *regs, int *flags)
128{
129 unsigned size;
130 s8 x8;
131 s16 x16;
132 s32 x32;
133 u8 opc, *pc, *sp, *next;
134
135 next = 0;
136 *flags = SINGLESTEP_PCREL;
137
138 pc = (u8 *) regs->pc;
139 sp = (u8 *) (regs + 1);
140 opc = *pc;
141
142 size = mn10300_insn_sizes[opc];
143 if (size > 0) {
144 next = pc + size;
145 } else {
146 switch (opc) {
147 /* Bxx (d8,PC) */
148 case 0xc0 ... 0xca:
149 x8 = 2;
150 if (cond_table[regs->epsw & 0xf] & (1 << (opc & 0xf)))
151 x8 = (s8)pc[1];
152 next = pc + x8;
153 *flags |= SINGLESTEP_BRANCH;
154 break;
155
156 /* JMP (d16,PC) or CALL (d16,PC) */
157 case 0xcc:
158 case 0xcd:
159 READ_WORD16(pc + 1, &x16);
160 next = pc + x16;
161 *flags |= SINGLESTEP_BRANCH;
162 break;
163
164 /* JMP (d32,PC) or CALL (d32,PC) */
165 case 0xdc:
166 case 0xdd:
167 READ_WORD32(pc + 1, &x32);
168 next = pc + x32;
169 *flags |= SINGLESTEP_BRANCH;
170 break;
171
172 /* RETF */
173 case 0xde:
174 next = (u8 *)regs->mdr;
175 *flags &= ~SINGLESTEP_PCREL;
176 *flags |= SINGLESTEP_BRANCH;
177 break;
178
179 /* RET */
180 case 0xdf:
181 sp += pc[2];
182 READ_WORD32(sp, &x32);
183 next = (u8 *)x32;
184 *flags &= ~SINGLESTEP_PCREL;
185 *flags |= SINGLESTEP_BRANCH;
186 break;
187
188 case 0xf0:
189 next = pc + 2;
190 opc = pc[1];
191 if (opc >= 0xf0 && opc <= 0xf7) {
192 /* JMP (An) / CALLS (An) */
193 switch (opc & 3) {
194 case 0:
195 next = (u8 *)regs->a0;
196 break;
197 case 1:
198 next = (u8 *)regs->a1;
199 break;
200 case 2:
201 next = (u8 *)regs->a2;
202 break;
203 case 3:
204 next = (u8 *)regs->a3;
205 break;
206 }
207 *flags &= ~SINGLESTEP_PCREL;
208 *flags |= SINGLESTEP_BRANCH;
209 } else if (opc == 0xfc) {
210 /* RETS */
211 READ_WORD32(sp, &x32);
212 next = (u8 *)x32;
213 *flags &= ~SINGLESTEP_PCREL;
214 *flags |= SINGLESTEP_BRANCH;
215 } else if (opc == 0xfd) {
216 /* RTI */
217 READ_WORD32(sp + 4, &x32);
218 next = (u8 *)x32;
219 *flags &= ~SINGLESTEP_PCREL;
220 *flags |= SINGLESTEP_BRANCH;
221 }
222 break;
223
224 /* potential 3-byte conditional branches */
225 case 0xf8:
226 next = pc + 3;
227 opc = pc[1];
228 if (opc >= 0xe8 && opc <= 0xeb &&
229 (cond_table[regs->epsw & 0xf] &
230 (1 << ((opc & 0xf) + 3)))
231 ) {
232 READ_BYTE(pc+2, &x8);
233 next = pc + x8;
234 *flags |= SINGLESTEP_BRANCH;
235 }
236 break;
237
238 case 0xfa:
239 if (pc[1] == 0xff) {
240 /* CALLS (d16,PC) */
241 READ_WORD16(pc + 2, &x16);
242 next = pc + x16;
243 } else
244 next = pc + 4;
245 *flags |= SINGLESTEP_BRANCH;
246 break;
247
248 case 0xfc:
249 x32 = 6;
250 if (pc[1] == 0xff) {
251 /* CALLS (d32,PC) */
252 READ_WORD32(pc + 2, &x32);
253 }
254 next = pc + x32;
255 *flags |= SINGLESTEP_BRANCH;
256 break;
257 /* LXX (d8,PC) */
258 /* SETLB - loads the next four bytes into the LIR reg */
259 case 0xd0 ... 0xda:
260 case 0xdb:
261 panic("Can't singlestep Lxx/SETLB\n");
262 break;
263 }
264 }
265 return (unsigned)next;
266
267}
268
269/*
270 * set up out of place singlestep of some branching instructions
271 */
272static unsigned __kprobes singlestep_branch_setup(struct pt_regs *regs)
273{
274 u8 opc, *pc, *sp, *next;
275
276 next = NULL;
277 pc = (u8 *) regs->pc;
278 sp = (u8 *) (regs + 1);
279
280 switch (pc[0]) {
281 case 0xc0 ... 0xca: /* Bxx (d8,PC) */
282 case 0xcc: /* JMP (d16,PC) */
283 case 0xdc: /* JMP (d32,PC) */
284 case 0xf8: /* Bxx (d8,PC) 3-byte version */
285 /* don't really need to do anything except cause trap */
286 next = pc;
287 break;
288
289 case 0xcd: /* CALL (d16,PC) */
290 pc[1] = 5;
291 pc[2] = 0;
292 next = pc + 5;
293 break;
294
295 case 0xdd: /* CALL (d32,PC) */
296 pc[1] = 7;
297 pc[2] = 0;
298 pc[3] = 0;
299 pc[4] = 0;
300 next = pc + 7;
301 break;
302
303 case 0xde: /* RETF */
304 next = pc + 3;
305 regs->mdr = (unsigned) next;
306 break;
307
308 case 0xdf: /* RET */
309 sp += pc[2];
310 next = pc + 3;
311 *(unsigned *)sp = (unsigned) next;
312 break;
313
314 case 0xf0:
315 next = pc + 2;
316 opc = pc[1];
317 if (opc >= 0xf0 && opc <= 0xf3) {
318 /* CALLS (An) */
319 /* use CALLS (d16,PC) to avoid mucking with An */
320 pc[0] = 0xfa;
321 pc[1] = 0xff;
322 pc[2] = 4;
323 pc[3] = 0;
324 next = pc + 4;
325 } else if (opc >= 0xf4 && opc <= 0xf7) {
326 /* JMP (An) */
327 next = pc;
328 } else if (opc == 0xfc) {
329 /* RETS */
330 next = pc + 2;
331 *(unsigned *) sp = (unsigned) next;
332 } else if (opc == 0xfd) {
333 /* RTI */
334 next = pc + 2;
335 *(unsigned *)(sp + 4) = (unsigned) next;
336 }
337 break;
338
339 case 0xfa: /* CALLS (d16,PC) */
340 pc[2] = 4;
341 pc[3] = 0;
342 next = pc + 4;
343 break;
344
345 case 0xfc: /* CALLS (d32,PC) */
346 pc[2] = 6;
347 pc[3] = 0;
348 pc[4] = 0;
349 pc[5] = 0;
350 next = pc + 6;
351 break;
352
353 case 0xd0 ... 0xda: /* LXX (d8,PC) */
354 case 0xdb: /* SETLB */
355 panic("Can't singlestep Lxx/SETLB\n");
356 }
357
358 return (unsigned) next;
359}
360
361int __kprobes arch_prepare_kprobe(struct kprobe *p)
362{
363 return 0;
364}
365
366void __kprobes arch_copy_kprobe(struct kprobe *p)
367{
368 memcpy(p->ainsn.insn, p->addr, MAX_INSN_SIZE);
369}
370
371void __kprobes arch_arm_kprobe(struct kprobe *p)
372{
373 *p->addr = BREAKPOINT_INSTRUCTION;
374 flush_icache_range((unsigned long) p->addr,
375 (unsigned long) p->addr + sizeof(kprobe_opcode_t));
376}
377
378void __kprobes arch_disarm_kprobe(struct kprobe *p)
379{
380 mn10300_dcache_flush();
381 mn10300_icache_inv();
382}
383
384void arch_remove_kprobe(struct kprobe *p)
385{
386}
387
388static inline
389void __kprobes disarm_kprobe(struct kprobe *p, struct pt_regs *regs)
390{
391 *p->addr = p->opcode;
392 regs->pc = (unsigned long) p->addr;
393 mn10300_dcache_flush();
394 mn10300_icache_inv();
395}
396
397static inline
398void __kprobes prepare_singlestep(struct kprobe *p, struct pt_regs *regs)
399{
400 unsigned long nextpc;
401
402 current_kprobe_orig_pc = regs->pc;
403 memcpy(current_kprobe_ss_buf, &p->ainsn.insn[0], MAX_INSN_SIZE);
404 regs->pc = (unsigned long) current_kprobe_ss_buf;
405
406 nextpc = find_nextpc(regs, &current_kprobe_ss_flags);
407 if (current_kprobe_ss_flags & SINGLESTEP_PCREL)
408 current_kprobe_next_pc =
409 current_kprobe_orig_pc + (nextpc - regs->pc);
410 else
411 current_kprobe_next_pc = nextpc;
412
413 /* branching instructions need special handling */
414 if (current_kprobe_ss_flags & SINGLESTEP_BRANCH)
415 nextpc = singlestep_branch_setup(regs);
416
417 current_kprobe_bp_addr = nextpc;
418
419 *(u8 *) nextpc = BREAKPOINT_INSTRUCTION;
420 mn10300_dcache_flush_range2((unsigned) current_kprobe_ss_buf,
421 sizeof(current_kprobe_ss_buf));
422 mn10300_icache_inv();
423}
424
425static inline int __kprobes kprobe_handler(struct pt_regs *regs)
426{
427 struct kprobe *p;
428 int ret = 0;
429 unsigned int *addr = (unsigned int *) regs->pc;
430
431 /* We're in an interrupt, but this is clear and BUG()-safe. */
432 preempt_disable();
433
434 /* Check we're not actually recursing */
435 if (kprobe_running()) {
436 /* We *are* holding lock here, so this is safe.
437 Disarm the probe we just hit, and ignore it. */
438 p = get_kprobe(addr);
439 if (p) {
440 disarm_kprobe(p, regs);
441 ret = 1;
442 } else {
443 p = current_kprobe;
444 if (p->break_handler && p->break_handler(p, regs))
445 goto ss_probe;
446 }
447 /* If it's not ours, can't be delete race, (we hold lock). */
448 goto no_kprobe;
449 }
450
451 p = get_kprobe(addr);
452 if (!p) {
453 if (*addr != BREAKPOINT_INSTRUCTION) {
454 /* The breakpoint instruction was removed right after
455 * we hit it. Another cpu has removed either a
456 * probepoint or a debugger breakpoint at this address.
457 * In either case, no further handling of this
458 * interrupt is appropriate.
459 */
460 ret = 1;
461 }
462 /* Not one of ours: let kernel handle it */
463 goto no_kprobe;
464 }
465
466 kprobe_status = KPROBE_HIT_ACTIVE;
467 current_kprobe = p;
468 if (p->pre_handler(p, regs)) {
469 /* handler has already set things up, so skip ss setup */
470 return 1;
471 }
472
473ss_probe:
474 prepare_singlestep(p, regs);
475 kprobe_status = KPROBE_HIT_SS;
476 return 1;
477
478no_kprobe:
479 preempt_enable_no_resched();
480 return ret;
481}
482
483/*
484 * Called after single-stepping. p->addr is the address of the
485 * instruction whose first byte has been replaced by the "breakpoint"
486 * instruction. To avoid the SMP problems that can occur when we
487 * temporarily put back the original opcode to single-step, we
488 * single-stepped a copy of the instruction. The address of this
489 * copy is p->ainsn.insn.
490 */
491static void __kprobes resume_execution(struct kprobe *p, struct pt_regs *regs)
492{
493 /* we may need to fixup regs/stack after singlestepping a call insn */
494 if (current_kprobe_ss_flags & SINGLESTEP_BRANCH) {
495 regs->pc = current_kprobe_orig_pc;
496 switch (p->ainsn.insn[0]) {
497 case 0xcd: /* CALL (d16,PC) */
498 *(unsigned *) regs->sp = regs->mdr = regs->pc + 5;
499 break;
500 case 0xdd: /* CALL (d32,PC) */
501 /* fixup mdr and return address on stack */
502 *(unsigned *) regs->sp = regs->mdr = regs->pc + 7;
503 break;
504 case 0xf0:
505 if (p->ainsn.insn[1] >= 0xf0 &&
506 p->ainsn.insn[1] <= 0xf3) {
507 /* CALLS (An) */
508 /* fixup MDR and return address on stack */
509 regs->mdr = regs->pc + 2;
510 *(unsigned *) regs->sp = regs->mdr;
511 }
512 break;
513
514 case 0xfa: /* CALLS (d16,PC) */
515 /* fixup MDR and return address on stack */
516 *(unsigned *) regs->sp = regs->mdr = regs->pc + 4;
517 break;
518
519 case 0xfc: /* CALLS (d32,PC) */
520 /* fixup MDR and return address on stack */
521 *(unsigned *) regs->sp = regs->mdr = regs->pc + 6;
522 break;
523 }
524 }
525
526 regs->pc = current_kprobe_next_pc;
527 current_kprobe_bp_addr = 0;
528}
529
530static inline int __kprobes post_kprobe_handler(struct pt_regs *regs)
531{
532 if (!kprobe_running())
533 return 0;
534
535 if (current_kprobe->post_handler)
536 current_kprobe->post_handler(current_kprobe, regs, 0);
537
538 resume_execution(current_kprobe, regs);
539 reset_current_kprobe();
540 preempt_enable_no_resched();
541 return 1;
542}
543
544/* Interrupts disabled, kprobe_lock held. */
545static inline
546int __kprobes kprobe_fault_handler(struct pt_regs *regs, int trapnr)
547{
548 if (current_kprobe->fault_handler &&
549 current_kprobe->fault_handler(current_kprobe, regs, trapnr))
550 return 1;
551
552 if (kprobe_status & KPROBE_HIT_SS) {
553 resume_execution(current_kprobe, regs);
554 reset_current_kprobe();
555 preempt_enable_no_resched();
556 }
557 return 0;
558}
559
560/*
561 * Wrapper routine to for handling exceptions.
562 */
563int __kprobes kprobe_exceptions_notify(struct notifier_block *self,
564 unsigned long val, void *data)
565{
566 struct die_args *args = data;
567
568 switch (val) {
569 case DIE_BREAKPOINT:
570 if (current_kprobe_bp_addr != args->regs->pc) {
571 if (kprobe_handler(args->regs))
572 return NOTIFY_STOP;
573 } else {
574 if (post_kprobe_handler(args->regs))
575 return NOTIFY_STOP;
576 }
577 break;
578 case DIE_GPF:
579 if (kprobe_running() &&
580 kprobe_fault_handler(args->regs, args->trapnr))
581 return NOTIFY_STOP;
582 break;
583 default:
584 break;
585 }
586 return NOTIFY_DONE;
587}
588
589/* Jprobes support. */
590static struct pt_regs jprobe_saved_regs;
591static struct pt_regs *jprobe_saved_regs_location;
592static kprobe_opcode_t jprobe_saved_stack[MAX_STACK_SIZE];
593
594int __kprobes setjmp_pre_handler(struct kprobe *p, struct pt_regs *regs)
595{
596 struct jprobe *jp = container_of(p, struct jprobe, kp);
597
598 jprobe_saved_regs_location = regs;
599 memcpy(&jprobe_saved_regs, regs, sizeof(struct pt_regs));
600
601 /* Save a whole stack frame, this gets arguments
602 * pushed onto the stack after using up all the
603 * arg registers.
604 */
605 memcpy(&jprobe_saved_stack, regs + 1, sizeof(jprobe_saved_stack));
606
607 /* setup return addr to the jprobe handler routine */
608 regs->pc = (unsigned long) jp->entry;
609 return 1;
610}
611
612void __kprobes jprobe_return(void)
613{
614 void *orig_sp = jprobe_saved_regs_location + 1;
615
616 preempt_enable_no_resched();
617 asm volatile(" mov %0,sp\n"
618 ".globl jprobe_return_bp_addr\n"
619 "jprobe_return_bp_addr:\n\t"
620 " .byte 0xff\n"
621 : : "d" (orig_sp));
622}
623
624extern void jprobe_return_bp_addr(void);
625
626int __kprobes longjmp_break_handler(struct kprobe *p, struct pt_regs *regs)
627{
628 u8 *addr = (u8 *) regs->pc;
629
630 if (addr == (u8 *) jprobe_return_bp_addr) {
631 if (jprobe_saved_regs_location != regs) {
632 printk(KERN_ERR"JPROBE:"
633 " Current regs (%p) does not match saved regs"
634 " (%p).\n",
635 regs, jprobe_saved_regs_location);
636 BUG();
637 }
638
639 /* Restore old register state.
640 */
641 memcpy(regs, &jprobe_saved_regs, sizeof(struct pt_regs));
642
643 memcpy(regs + 1, &jprobe_saved_stack,
644 sizeof(jprobe_saved_stack));
645 return 1;
646 }
647 return 0;
648}
649
650int __init arch_init_kprobes(void)
651{
652 return 0;
653}
diff --git a/arch/mn10300/kernel/kthread.S b/arch/mn10300/kernel/kthread.S
new file mode 100644
index 000000000000..b5ae467ac5ec
--- /dev/null
+++ b/arch/mn10300/kernel/kthread.S
@@ -0,0 +1,31 @@
1/* MN10300 Kernel thread trampoline function
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by Mark Salter (msalter@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11 .text
12
13###############################################################################
14#
15# kernel_thread_helper - trampoline for kernel_thread()
16#
17# On entry:
18# A2 = address of function to call
19# D2 = function argument
20#
21###############################################################################
22 .globl kernel_thread_helper
23 .type kernel_thread_helper,@function
24kernel_thread_helper:
25 mov do_exit,d1
26 mov d1,(sp)
27 mov d1,mdr
28 mov d2,d0
29 jmp (a2)
30
31 .size kernel_thread_helper,.-kernel_thread_helper
diff --git a/arch/mn10300/kernel/mn10300-debug.c b/arch/mn10300/kernel/mn10300-debug.c
new file mode 100644
index 000000000000..bd8196478cbc
--- /dev/null
+++ b/arch/mn10300/kernel/mn10300-debug.c
@@ -0,0 +1,58 @@
1/* Debugging stuff for the MN10300-based processors
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#include <linux/sched.h>
12#include <asm/serial-regs.h>
13
14#undef MN10300_CONSOLE_ON_SERIO
15
16/*
17 * write a string directly through one of the serial ports on-board the MN10300
18 */
19#ifdef MN10300_CONSOLE_ON_SERIO
20void debug_to_serial_mnser(const char *p, int n)
21{
22 char ch;
23
24 for (; n > 0; n--) {
25 ch = *p++;
26
27#if MN10300_CONSOLE_ON_SERIO == 0
28 while (SC0STR & (SC01STR_TBF)) continue;
29 SC0TXB = ch;
30 while (SC0STR & (SC01STR_TBF)) continue;
31 if (ch == 0x0a) {
32 SC0TXB = 0x0d;
33 while (SC0STR & (SC01STR_TBF)) continue;
34 }
35
36#elif MN10300_CONSOLE_ON_SERIO == 1
37 while (SC1STR & (SC01STR_TBF)) continue;
38 SC1TXB = ch;
39 while (SC1STR & (SC01STR_TBF)) continue;
40 if (ch == 0x0a) {
41 SC1TXB = 0x0d;
42 while (SC1STR & (SC01STR_TBF)) continue;
43 }
44
45#elif MN10300_CONSOLE_ON_SERIO == 2
46 while (SC2STR & (SC2STR_TBF)) continue;
47 SC2TXB = ch;
48 while (SC2STR & (SC2STR_TBF)) continue;
49 if (ch == 0x0a) {
50 SC2TXB = 0x0d;
51 while (SC2STR & (SC2STR_TBF)) continue;
52 }
53
54#endif
55 }
56}
57#endif
58
diff --git a/arch/mn10300/kernel/mn10300-serial-low.S b/arch/mn10300/kernel/mn10300-serial-low.S
new file mode 100644
index 000000000000..ef3f4c1df2a4
--- /dev/null
+++ b/arch/mn10300/kernel/mn10300-serial-low.S
@@ -0,0 +1,191 @@
1###############################################################################
2#
3# Virtual DMA driver for MN10300 serial ports
4#
5# Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
6# Written by David Howells (dhowells@redhat.com)
7#
8# This program is free software; you can redistribute it and/or
9# modify it under the terms of the GNU General Public Licence
10# as published by the Free Software Foundation; either version
11# 2 of the Licence, or (at your option) any later version.
12#
13###############################################################################
14#include <linux/sys.h>
15#include <linux/linkage.h>
16#include <asm/page.h>
17#include <asm/smp.h>
18#include <asm/cpu-regs.h>
19#include <asm/frame.inc>
20#include <asm/timer-regs.h>
21#include <asm/proc/cache.h>
22#include <asm/unit/timex.h>
23#include "mn10300-serial.h"
24
25#define SCxCTR 0x00
26#define SCxICR 0x04
27#define SCxTXB 0x08
28#define SCxRXB 0x09
29#define SCxSTR 0x0c
30#define SCxTIM 0x0d
31
32 .text
33
34###############################################################################
35#
36# serial port interrupt virtual DMA entry point
37# - intended to run at interrupt priority 1 (not affected by local_irq_disable)
38#
39###############################################################################
40 .balign L1_CACHE_BYTES
41ENTRY(mn10300_serial_vdma_interrupt)
42 or EPSW_IE,psw # permit overriding by
43 # debugging interrupts
44 movm [d2,d3,a2,a3,exreg0],(sp)
45
46 movhu (IAGR),a2 # see if which interrupt is
47 # pending
48 and IAGR_GN,a2
49 add a2,a2
50 add mn10300_serial_int_tbl,a2
51
52 mov (a2+),a3
53 mov (__iobase,a3),e2
54 mov (a2),a2
55 jmp (a2)
56
57###############################################################################
58#
59# serial port receive interrupt virtual DMA entry point
60# - intended to run at interrupt priority 1 (not affected by local_irq_disable)
61# - stores data/status byte pairs in the ring buffer
62# - induces a scheduler tick timer interrupt when done, which we then subvert
63# on entry:
64# A3 struct mn10300_serial_port *
65# E2 I/O port base
66#
67###############################################################################
68ENTRY(mn10300_serial_vdma_rx_handler)
69 mov (__rx_icr,a3),e3
70 mov GxICR_DETECT,d2
71 movbu d2,(e3) # ACK the interrupt
72 movhu (e3),d2 # flush
73
74 mov (__rx_inp,a3),d3
75 mov d3,a2
76 add 2,d3
77 and MNSC_BUFFER_SIZE-1,d3
78 mov (__rx_outp,a3),d2
79 cmp d3,d2
80 beq mnsc_vdma_rx_overflow
81
82 mov (__rx_buffer,a3),d2
83 add d2,a2
84 movhu (SCxSTR,e2),d2
85 movbu d2,(1,a2)
86 movbu (SCxRXB,e2),d2
87 movbu d2,(a2)
88 mov d3,(__rx_inp,a3)
89 bset MNSCx_RX_AVAIL,(__intr_flags,a3)
90
91mnsc_vdma_rx_done:
92 mov (__tm_icr,a3),a2
93 mov GxICR_LEVEL_6|GxICR_ENABLE|GxICR_REQUEST|GxICR_DETECT,d2
94 movhu d2,(a2) # request a slow interrupt
95 movhu (a2),d2 # flush
96
97 movm (sp),[d2,d3,a2,a3,exreg0]
98 rti
99
100mnsc_vdma_rx_overflow:
101 bset MNSCx_RX_OVERF,(__intr_flags,a3)
102 bra mnsc_vdma_rx_done
103
104###############################################################################
105#
106# serial port transmit interrupt virtual DMA entry point
107# - intended to run at interrupt priority 1 (not affected by local_irq_disable)
108# - retrieves data bytes from the ring buffer and passes them to the serial port
109# - induces a scheduler tick timer interrupt when done, which we then subvert
110# A3 struct mn10300_serial_port *
111# E2 I/O port base
112#
113###############################################################################
114 .balign L1_CACHE_BYTES
115ENTRY(mn10300_serial_vdma_tx_handler)
116 mov (__tx_icr,a3),e3
117 mov GxICR_DETECT,d2
118 movbu d2,(e3) # ACK the interrupt
119 movhu (e3),d2 # flush
120
121 btst 0x01,(__tx_break,a3) # handle transmit break request
122 bne mnsc_vdma_tx_break
123
124 movbu (SCxSTR,e2),d2 # don't try and transmit a char if the
125 # buffer is not empty
126 btst SC01STR_TBF,d2 # (may have tried to jumpstart)
127 bne mnsc_vdma_tx_noint
128
129 movbu (__tx_xchar,a3),d2 # handle hi-pri XON/XOFF
130 or d2,d2
131 bne mnsc_vdma_tx_xchar
132
133 mov (__tx_info_buffer,a3),a2 # get the uart_info struct for Tx
134 mov (__xmit_tail,a2),d3
135 mov (__xmit_head,a2),d2
136 cmp d3,d2
137 beq mnsc_vdma_tx_empty
138
139 mov (__xmit_buffer,a2),d2 # get a char from the buffer and
140 # transmit it
141 movbu (d3,d2),d2
142 movbu d2,(SCxTXB,e2) # Tx
143
144 inc d3 # advance the buffer pointer
145 and __UART_XMIT_SIZE-1,d3
146 mov (__xmit_head,a2),d2
147 mov d3,(__xmit_tail,a2)
148
149 sub d3,d2 # see if we've written everything
150 beq mnsc_vdma_tx_empty
151
152 and __UART_XMIT_SIZE-1,d2 # see if we just made a hole
153 cmp __UART_XMIT_SIZE-2,d2
154 beq mnsc_vdma_tx_made_hole
155
156mnsc_vdma_tx_done:
157 mov (__tm_icr,a3),a2
158 mov GxICR_LEVEL_6|GxICR_ENABLE|GxICR_REQUEST|GxICR_DETECT,d2
159 movhu d2,(a2) # request a slow interrupt
160 movhu (a2),d2 # flush
161
162mnsc_vdma_tx_noint:
163 movm (sp),[d2,d3,a2,a3,exreg0]
164 rti
165
166mnsc_vdma_tx_empty:
167 mov +(GxICR_LEVEL_1|GxICR_DETECT),d2
168 movhu d2,(e3) # disable the interrupt
169 movhu (e3),d2 # flush
170
171 bset MNSCx_TX_EMPTY,(__intr_flags,a3)
172 bra mnsc_vdma_tx_done
173
174mnsc_vdma_tx_break:
175 movhu (SCxCTR,e2),d2 # turn on break mode
176 or SC01CTR_BKE,d2
177 movhu d2,(SCxCTR,e2)
178 mov +(GxICR_LEVEL_1|GxICR_DETECT),d2
179 movhu d2,(e3) # disable transmit interrupts on this
180 # channel
181 movhu (e3),d2 # flush
182 bra mnsc_vdma_tx_noint
183
184mnsc_vdma_tx_xchar:
185 bclr 0xff,(__tx_xchar,a3)
186 movbu d2,(SCxTXB,e2)
187 bra mnsc_vdma_tx_done
188
189mnsc_vdma_tx_made_hole:
190 bset MNSCx_TX_SPACE,(__intr_flags,a3)
191 bra mnsc_vdma_tx_done
diff --git a/arch/mn10300/kernel/mn10300-serial.c b/arch/mn10300/kernel/mn10300-serial.c
new file mode 100644
index 000000000000..b9c268c6b2fb
--- /dev/null
+++ b/arch/mn10300/kernel/mn10300-serial.c
@@ -0,0 +1,1480 @@
1/* MN10300 On-chip serial port UART driver
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11
12static const char serial_name[] = "MN10300 Serial driver";
13static const char serial_version[] = "mn10300_serial-1.0";
14static const char serial_revdate[] = "2007-11-06";
15
16#if defined(CONFIG_MN10300_TTYSM_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
17#define SUPPORT_SYSRQ
18#endif
19
20#include <linux/version.h>
21#include <linux/module.h>
22#include <linux/serial.h>
23#include <linux/circ_buf.h>
24#include <linux/errno.h>
25#include <linux/signal.h>
26#include <linux/sched.h>
27#include <linux/timer.h>
28#include <linux/interrupt.h>
29#include <linux/tty.h>
30#include <linux/tty_flip.h>
31#include <linux/major.h>
32#include <linux/string.h>
33#include <linux/ioport.h>
34#include <linux/mm.h>
35#include <linux/slab.h>
36#include <linux/init.h>
37#include <linux/console.h>
38#include <linux/sysrq.h>
39
40#include <asm/system.h>
41#include <asm/io.h>
42#include <asm/irq.h>
43#include <asm/bitops.h>
44#include <asm/serial-regs.h>
45#include <asm/unit/timex.h>
46#include "mn10300-serial.h"
47
48static inline __attribute__((format(printf, 1, 2)))
49void no_printk(const char *fmt, ...)
50{
51}
52
53#define kenter(FMT, ...) \
54 printk(KERN_DEBUG "-->%s(" FMT ")\n", __func__, ##__VA_ARGS__)
55#define _enter(FMT, ...) \
56 no_printk(KERN_DEBUG "-->%s(" FMT ")\n", __func__, ##__VA_ARGS__)
57#define kdebug(FMT, ...) \
58 printk(KERN_DEBUG "--- " FMT "\n", ##__VA_ARGS__)
59#define _debug(FMT, ...) \
60 no_printk(KERN_DEBUG "--- " FMT "\n", ##__VA_ARGS__)
61#define kproto(FMT, ...) \
62 printk(KERN_DEBUG "### MNSERIAL " FMT " ###\n", ##__VA_ARGS__)
63#define _proto(FMT, ...) \
64 no_printk(KERN_DEBUG "### MNSERIAL " FMT " ###\n", ##__VA_ARGS__)
65
66#define NR_UARTS 3
67
68#ifdef CONFIG_MN10300_TTYSM_CONSOLE
69static void mn10300_serial_console_write(struct console *co,
70 const char *s, unsigned count);
71static int __init mn10300_serial_console_setup(struct console *co,
72 char *options);
73
74static struct uart_driver mn10300_serial_driver;
75static struct console mn10300_serial_console = {
76 .name = "ttySM",
77 .write = mn10300_serial_console_write,
78 .device = uart_console_device,
79 .setup = mn10300_serial_console_setup,
80 .flags = CON_PRINTBUFFER,
81 .index = -1,
82 .data = &mn10300_serial_driver,
83};
84#endif
85
86static struct uart_driver mn10300_serial_driver = {
87 .owner = NULL,
88 .driver_name = "mn10300-serial",
89 .dev_name = "ttySM",
90 .major = TTY_MAJOR,
91 .minor = 128,
92 .nr = NR_UARTS,
93#ifdef CONFIG_MN10300_TTYSM_CONSOLE
94 .cons = &mn10300_serial_console,
95#endif
96};
97
98static unsigned int mn10300_serial_tx_empty(struct uart_port *);
99static void mn10300_serial_set_mctrl(struct uart_port *, unsigned int mctrl);
100static unsigned int mn10300_serial_get_mctrl(struct uart_port *);
101static void mn10300_serial_stop_tx(struct uart_port *);
102static void mn10300_serial_start_tx(struct uart_port *);
103static void mn10300_serial_send_xchar(struct uart_port *, char ch);
104static void mn10300_serial_stop_rx(struct uart_port *);
105static void mn10300_serial_enable_ms(struct uart_port *);
106static void mn10300_serial_break_ctl(struct uart_port *, int ctl);
107static int mn10300_serial_startup(struct uart_port *);
108static void mn10300_serial_shutdown(struct uart_port *);
109static void mn10300_serial_set_termios(struct uart_port *,
110 struct ktermios *new,
111 struct ktermios *old);
112static const char *mn10300_serial_type(struct uart_port *);
113static void mn10300_serial_release_port(struct uart_port *);
114static int mn10300_serial_request_port(struct uart_port *);
115static void mn10300_serial_config_port(struct uart_port *, int);
116static int mn10300_serial_verify_port(struct uart_port *,
117 struct serial_struct *);
118
119static const struct uart_ops mn10300_serial_ops = {
120 .tx_empty = mn10300_serial_tx_empty,
121 .set_mctrl = mn10300_serial_set_mctrl,
122 .get_mctrl = mn10300_serial_get_mctrl,
123 .stop_tx = mn10300_serial_stop_tx,
124 .start_tx = mn10300_serial_start_tx,
125 .send_xchar = mn10300_serial_send_xchar,
126 .stop_rx = mn10300_serial_stop_rx,
127 .enable_ms = mn10300_serial_enable_ms,
128 .break_ctl = mn10300_serial_break_ctl,
129 .startup = mn10300_serial_startup,
130 .shutdown = mn10300_serial_shutdown,
131 .set_termios = mn10300_serial_set_termios,
132 .type = mn10300_serial_type,
133 .release_port = mn10300_serial_release_port,
134 .request_port = mn10300_serial_request_port,
135 .config_port = mn10300_serial_config_port,
136 .verify_port = mn10300_serial_verify_port,
137};
138
139static irqreturn_t mn10300_serial_interrupt(int irq, void *dev_id);
140
141/*
142 * the first on-chip serial port: ttySM0 (aka SIF0)
143 */
144#ifdef CONFIG_MN10300_TTYSM0
145struct mn10300_serial_port mn10300_serial_port_sif0 = {
146 .uart.ops = &mn10300_serial_ops,
147 .uart.membase = (void __iomem *) &SC0CTR,
148 .uart.mapbase = (unsigned long) &SC0CTR,
149 .uart.iotype = UPIO_MEM,
150 .uart.irq = 0,
151 .uart.uartclk = 0, /* MN10300_IOCLK, */
152 .uart.fifosize = 1,
153 .uart.flags = UPF_BOOT_AUTOCONF,
154 .uart.line = 0,
155 .uart.type = PORT_MN10300,
156 .uart.lock =
157 __SPIN_LOCK_UNLOCKED(mn10300_serial_port_sif0.uart.lock),
158 .name = "ttySM0",
159 ._iobase = &SC0CTR,
160 ._control = &SC0CTR,
161 ._status = (volatile u8 *) &SC0STR,
162 ._intr = &SC0ICR,
163 ._rxb = &SC0RXB,
164 ._txb = &SC0TXB,
165 .rx_name = "ttySM0/Rx",
166 .tx_name = "ttySM0/Tx",
167#ifdef CONFIG_MN10300_TTYSM0_TIMER8
168 .tm_name = "ttySM0/Timer8",
169 ._tmxmd = &TM8MD,
170 ._tmxbr = &TM8BR,
171 ._tmicr = &TM8ICR,
172 .tm_irq = TM8IRQ,
173 .div_timer = MNSCx_DIV_TIMER_16BIT,
174#else /* CONFIG_MN10300_TTYSM0_TIMER2 */
175 .tm_name = "ttySM0/Timer2",
176 ._tmxmd = &TM2MD,
177 ._tmxbr = (volatile u16 *) &TM2BR,
178 ._tmicr = &TM2ICR,
179 .tm_irq = TM2IRQ,
180 .div_timer = MNSCx_DIV_TIMER_8BIT,
181#endif
182 .rx_irq = SC0RXIRQ,
183 .tx_irq = SC0TXIRQ,
184 .rx_icr = &GxICR(SC0RXIRQ),
185 .tx_icr = &GxICR(SC0TXIRQ),
186 .clock_src = MNSCx_CLOCK_SRC_IOCLK,
187 .options = 0,
188#ifdef CONFIG_GDBSTUB_ON_TTYSM0
189 .gdbstub = 1,
190#endif
191};
192#endif /* CONFIG_MN10300_TTYSM0 */
193
194/*
195 * the second on-chip serial port: ttySM1 (aka SIF1)
196 */
197#ifdef CONFIG_MN10300_TTYSM1
198struct mn10300_serial_port mn10300_serial_port_sif1 = {
199 .uart.ops = &mn10300_serial_ops,
200 .uart.membase = (void __iomem *) &SC1CTR,
201 .uart.mapbase = (unsigned long) &SC1CTR,
202 .uart.iotype = UPIO_MEM,
203 .uart.irq = 0,
204 .uart.uartclk = 0, /* MN10300_IOCLK, */
205 .uart.fifosize = 1,
206 .uart.flags = UPF_BOOT_AUTOCONF,
207 .uart.line = 1,
208 .uart.type = PORT_MN10300,
209 .uart.lock =
210 __SPIN_LOCK_UNLOCKED(mn10300_serial_port_sif1.uart.lock),
211 .name = "ttySM1",
212 ._iobase = &SC1CTR,
213 ._control = &SC1CTR,
214 ._status = (volatile u8 *) &SC1STR,
215 ._intr = &SC1ICR,
216 ._rxb = &SC1RXB,
217 ._txb = &SC1TXB,
218 .rx_name = "ttySM1/Rx",
219 .tx_name = "ttySM1/Tx",
220#ifdef CONFIG_MN10300_TTYSM1_TIMER9
221 .tm_name = "ttySM1/Timer9",
222 ._tmxmd = &TM9MD,
223 ._tmxbr = &TM9BR,
224 ._tmicr = &TM9ICR,
225 .tm_irq = TM9IRQ,
226 .div_timer = MNSCx_DIV_TIMER_16BIT,
227#else /* CONFIG_MN10300_TTYSM1_TIMER3 */
228 .tm_name = "ttySM1/Timer3",
229 ._tmxmd = &TM3MD,
230 ._tmxbr = (volatile u16 *) &TM3BR,
231 ._tmicr = &TM3ICR,
232 .tm_irq = TM3IRQ,
233 .div_timer = MNSCx_DIV_TIMER_8BIT,
234#endif
235 .rx_irq = SC1RXIRQ,
236 .tx_irq = SC1TXIRQ,
237 .rx_icr = &GxICR(SC1RXIRQ),
238 .tx_icr = &GxICR(SC1TXIRQ),
239 .clock_src = MNSCx_CLOCK_SRC_IOCLK,
240 .options = 0,
241#ifdef CONFIG_GDBSTUB_ON_TTYSM1
242 .gdbstub = 1,
243#endif
244};
245#endif /* CONFIG_MN10300_TTYSM1 */
246
247/*
248 * the third on-chip serial port: ttySM2 (aka SIF2)
249 */
250#ifdef CONFIG_MN10300_TTYSM2
251struct mn10300_serial_port mn10300_serial_port_sif2 = {
252 .uart.ops = &mn10300_serial_ops,
253 .uart.membase = (void __iomem *) &SC2CTR,
254 .uart.mapbase = (unsigned long) &SC2CTR,
255 .uart.iotype = UPIO_MEM,
256 .uart.irq = 0,
257 .uart.uartclk = 0, /* MN10300_IOCLK, */
258 .uart.fifosize = 1,
259 .uart.flags = UPF_BOOT_AUTOCONF,
260 .uart.line = 2,
261#ifdef CONFIG_MN10300_TTYSM2_CTS
262 .uart.type = PORT_MN10300_CTS,
263#else
264 .uart.type = PORT_MN10300,
265#endif
266 .uart.lock =
267 __SPIN_LOCK_UNLOCKED(mn10300_serial_port_sif2.uart.lock),
268 .name = "ttySM2",
269 .rx_name = "ttySM2/Rx",
270 .tx_name = "ttySM2/Tx",
271 .tm_name = "ttySM2/Timer10",
272 ._iobase = &SC2CTR,
273 ._control = &SC2CTR,
274 ._status = &SC2STR,
275 ._intr = &SC2ICR,
276 ._rxb = &SC2RXB,
277 ._txb = &SC2TXB,
278 ._tmxmd = &TM10MD,
279 ._tmxbr = &TM10BR,
280 ._tmicr = &TM10ICR,
281 .tm_irq = TM10IRQ,
282 .div_timer = MNSCx_DIV_TIMER_16BIT,
283 .rx_irq = SC2RXIRQ,
284 .tx_irq = SC2TXIRQ,
285 .rx_icr = &GxICR(SC2RXIRQ),
286 .tx_icr = &GxICR(SC2TXIRQ),
287 .clock_src = MNSCx_CLOCK_SRC_IOCLK,
288#ifdef CONFIG_MN10300_TTYSM2_CTS
289 .options = MNSCx_OPT_CTS,
290#else
291 .options = 0,
292#endif
293#ifdef CONFIG_GDBSTUB_ON_TTYSM2
294 .gdbstub = 1,
295#endif
296};
297#endif /* CONFIG_MN10300_TTYSM2 */
298
299
300/*
301 * list of available serial ports
302 */
303struct mn10300_serial_port *mn10300_serial_ports[NR_UARTS + 1] = {
304#ifdef CONFIG_MN10300_TTYSM0
305 [0] = &mn10300_serial_port_sif0,
306#endif
307#ifdef CONFIG_MN10300_TTYSM1
308 [1] = &mn10300_serial_port_sif1,
309#endif
310#ifdef CONFIG_MN10300_TTYSM2
311 [2] = &mn10300_serial_port_sif2,
312#endif
313 [NR_UARTS] = NULL,
314};
315
316
317/*
318 * we abuse the serial ports' baud timers' interrupt lines to get the ability
319 * to deliver interrupts to userspace as we use the ports' interrupt lines to
320 * do virtual DMA on account of the ports having no hardware FIFOs
321 *
322 * we can generate an interrupt manually in the assembly stubs by writing to
323 * the enable and detect bits in the interrupt control register, so all we need
324 * to do here is disable the interrupt line
325 *
326 * note that we can't just leave the line enabled as the baud rate timer *also*
327 * generates interrupts
328 */
329static void mn10300_serial_mask_ack(unsigned int irq)
330{
331 u16 tmp;
332 GxICR(irq) = GxICR_LEVEL_6;
333 tmp = GxICR(irq); /* flush write buffer */
334}
335
336static void mn10300_serial_nop(unsigned int irq)
337{
338}
339
340static struct irq_chip mn10300_serial_pic = {
341 .name = "mnserial",
342 .ack = mn10300_serial_mask_ack,
343 .mask = mn10300_serial_mask_ack,
344 .mask_ack = mn10300_serial_mask_ack,
345 .unmask = mn10300_serial_nop,
346 .end = mn10300_serial_nop,
347};
348
349
350/*
351 * serial virtual DMA interrupt jump table
352 */
353struct mn10300_serial_int mn10300_serial_int_tbl[NR_IRQS];
354
355static void mn10300_serial_dis_tx_intr(struct mn10300_serial_port *port)
356{
357 u16 x;
358 *port->tx_icr = GxICR_LEVEL_1 | GxICR_DETECT;
359 x = *port->tx_icr;
360}
361
362static void mn10300_serial_en_tx_intr(struct mn10300_serial_port *port)
363{
364 u16 x;
365 *port->tx_icr = GxICR_LEVEL_1 | GxICR_ENABLE;
366 x = *port->tx_icr;
367}
368
369static void mn10300_serial_dis_rx_intr(struct mn10300_serial_port *port)
370{
371 u16 x;
372 *port->rx_icr = GxICR_LEVEL_1 | GxICR_DETECT;
373 x = *port->rx_icr;
374}
375
376/*
377 * multi-bit equivalent of test_and_clear_bit()
378 */
379static int mask_test_and_clear(volatile u8 *ptr, u8 mask)
380{
381 u32 epsw;
382 asm volatile(" bclr %1,(%2) \n"
383 " mov epsw,%0 \n"
384 : "=d"(epsw) : "d"(mask), "a"(ptr));
385 return !(epsw & EPSW_FLAG_Z);
386}
387
388/*
389 * receive chars from the ring buffer for this serial port
390 * - must do break detection here (not done in the UART)
391 */
392static void mn10300_serial_receive_interrupt(struct mn10300_serial_port *port)
393{
394 struct uart_icount *icount = &port->uart.icount;
395 struct tty_struct *tty = port->uart.info->tty;
396 unsigned ix;
397 int count;
398 u8 st, ch, push, status, overrun;
399
400 _enter("%s", port->name);
401
402 push = 0;
403
404 count = CIRC_CNT(port->rx_inp, port->rx_outp, MNSC_BUFFER_SIZE);
405 count = tty_buffer_request_room(tty, count);
406 if (count == 0) {
407 if (!tty->low_latency)
408 tty_flip_buffer_push(tty);
409 return;
410 }
411
412try_again:
413 /* pull chars out of the hat */
414 ix = port->rx_outp;
415 if (ix == port->rx_inp) {
416 if (push && !tty->low_latency)
417 tty_flip_buffer_push(tty);
418 return;
419 }
420
421 ch = port->rx_buffer[ix++];
422 st = port->rx_buffer[ix++];
423 smp_rmb();
424 port->rx_outp = ix & (MNSC_BUFFER_SIZE - 1);
425 port->uart.icount.rx++;
426
427 st &= SC01STR_FEF | SC01STR_PEF | SC01STR_OEF;
428 status = 0;
429 overrun = 0;
430
431 /* the UART doesn't detect BREAK, so we have to do that ourselves
432 * - it starts as a framing error on a NUL character
433 * - then we count another two NUL characters before issuing TTY_BREAK
434 * - then we end on a normal char or one that has all the bottom bits
435 * zero and the top bits set
436 */
437 switch (port->rx_brk) {
438 case 0:
439 /* not breaking at the moment */
440 break;
441
442 case 1:
443 if (st & SC01STR_FEF && ch == 0) {
444 port->rx_brk = 2;
445 goto try_again;
446 }
447 goto not_break;
448
449 case 2:
450 if (st & SC01STR_FEF && ch == 0) {
451 port->rx_brk = 3;
452 _proto("Rx Break Detected");
453 icount->brk++;
454 if (uart_handle_break(&port->uart))
455 goto ignore_char;
456 status |= 1 << TTY_BREAK;
457 goto insert;
458 }
459 goto not_break;
460
461 default:
462 if (st & (SC01STR_FEF | SC01STR_PEF | SC01STR_OEF))
463 goto try_again; /* still breaking */
464
465 port->rx_brk = 0; /* end of the break */
466
467 switch (ch) {
468 case 0xFF:
469 case 0xFE:
470 case 0xFC:
471 case 0xF8:
472 case 0xF0:
473 case 0xE0:
474 case 0xC0:
475 case 0x80:
476 case 0x00:
477 /* discard char at probable break end */
478 goto try_again;
479 }
480 break;
481 }
482
483process_errors:
484 /* handle framing error */
485 if (st & SC01STR_FEF) {
486 if (ch == 0) {
487 /* framing error with NUL char is probably a BREAK */
488 port->rx_brk = 1;
489 goto try_again;
490 }
491
492 _proto("Rx Framing Error");
493 icount->frame++;
494 status |= 1 << TTY_FRAME;
495 }
496
497 /* handle parity error */
498 if (st & SC01STR_PEF) {
499 _proto("Rx Parity Error");
500 icount->parity++;
501 status = TTY_PARITY;
502 }
503
504 /* handle normal char */
505 if (status == 0) {
506 if (uart_handle_sysrq_char(&port->uart, ch))
507 goto ignore_char;
508 status = (1 << TTY_NORMAL);
509 }
510
511 /* handle overrun error */
512 if (st & SC01STR_OEF) {
513 if (port->rx_brk)
514 goto try_again;
515
516 _proto("Rx Overrun Error");
517 icount->overrun++;
518 overrun = 1;
519 }
520
521insert:
522 status &= port->uart.read_status_mask;
523
524 if (!overrun && !(status & port->uart.ignore_status_mask)) {
525 int flag;
526
527 if (status & (1 << TTY_BREAK))
528 flag = TTY_BREAK;
529 else if (status & (1 << TTY_PARITY))
530 flag = TTY_PARITY;
531 else if (status & (1 << TTY_FRAME))
532 flag = TTY_FRAME;
533 else
534 flag = TTY_NORMAL;
535
536 tty_insert_flip_char(tty, ch, flag);
537 }
538
539 /* overrun is special, since it's reported immediately, and doesn't
540 * affect the current character
541 */
542 if (overrun)
543 tty_insert_flip_char(tty, 0, TTY_OVERRUN);
544
545 count--;
546 if (count <= 0) {
547 if (!tty->low_latency)
548 tty_flip_buffer_push(tty);
549 return;
550 }
551
552ignore_char:
553 push = 1;
554 goto try_again;
555
556not_break:
557 port->rx_brk = 0;
558 goto process_errors;
559}
560
561/*
562 * handle an interrupt from the serial transmission "virtual DMA" driver
563 * - note: the interrupt routine will disable its own interrupts when the Tx
564 * buffer is empty
565 */
566static void mn10300_serial_transmit_interrupt(struct mn10300_serial_port *port)
567{
568 _enter("%s", port->name);
569
570 if (uart_tx_stopped(&port->uart) ||
571 uart_circ_empty(&port->uart.info->xmit))
572 mn10300_serial_dis_tx_intr(port);
573
574 if (uart_circ_chars_pending(&port->uart.info->xmit) < WAKEUP_CHARS)
575 uart_write_wakeup(&port->uart);
576}
577
578/*
579 * deal with a change in the status of the CTS line
580 */
581static void mn10300_serial_cts_changed(struct mn10300_serial_port *port, u8 st)
582{
583 u16 ctr;
584
585 port->tx_cts = st;
586 port->uart.icount.cts++;
587
588 /* flip the CTS state selector flag to interrupt when it changes
589 * back */
590 ctr = *port->_control;
591 ctr ^= SC2CTR_TWS;
592 *port->_control = ctr;
593
594 uart_handle_cts_change(&port->uart, st & SC2STR_CTS);
595 wake_up_interruptible(&port->uart.info->delta_msr_wait);
596}
597
598/*
599 * handle a virtual interrupt generated by the lower level "virtual DMA"
600 * routines (irq is the baud timer interrupt)
601 */
602static irqreturn_t mn10300_serial_interrupt(int irq, void *dev_id)
603{
604 struct mn10300_serial_port *port = dev_id;
605 u8 st;
606
607 spin_lock(&port->uart.lock);
608
609 if (port->intr_flags) {
610 _debug("INT %s: %x", port->name, port->intr_flags);
611
612 if (mask_test_and_clear(&port->intr_flags, MNSCx_RX_AVAIL))
613 mn10300_serial_receive_interrupt(port);
614
615 if (mask_test_and_clear(&port->intr_flags,
616 MNSCx_TX_SPACE | MNSCx_TX_EMPTY))
617 mn10300_serial_transmit_interrupt(port);
618 }
619
620 /* the only modem control line amongst the whole lot is CTS on
621 * serial port 2 */
622 if (port->type == PORT_MN10300_CTS) {
623 st = *port->_status;
624 if ((port->tx_cts ^ st) & SC2STR_CTS)
625 mn10300_serial_cts_changed(port, st);
626 }
627
628 spin_unlock(&port->uart.lock);
629
630 return IRQ_HANDLED;
631}
632
633/*
634 * return indication of whether the hardware transmit buffer is empty
635 */
636static unsigned int mn10300_serial_tx_empty(struct uart_port *_port)
637{
638 struct mn10300_serial_port *port =
639 container_of(_port, struct mn10300_serial_port, uart);
640
641 _enter("%s", port->name);
642
643 return (*port->_status & (SC01STR_TXF | SC01STR_TBF)) ?
644 0 : TIOCSER_TEMT;
645}
646
647/*
648 * set the modem control lines (we don't have any)
649 */
650static void mn10300_serial_set_mctrl(struct uart_port *_port,
651 unsigned int mctrl)
652{
653 struct mn10300_serial_port *port =
654 container_of(_port, struct mn10300_serial_port, uart);
655
656 _enter("%s,%x", port->name, mctrl);
657}
658
659/*
660 * get the modem control line statuses
661 */
662static unsigned int mn10300_serial_get_mctrl(struct uart_port *_port)
663{
664 struct mn10300_serial_port *port =
665 container_of(_port, struct mn10300_serial_port, uart);
666
667 _enter("%s", port->name);
668
669 if (port->type == PORT_MN10300_CTS && !(*port->_status & SC2STR_CTS))
670 return TIOCM_CAR | TIOCM_DSR;
671
672 return TIOCM_CAR | TIOCM_CTS | TIOCM_DSR;
673}
674
675/*
676 * stop transmitting characters
677 */
678static void mn10300_serial_stop_tx(struct uart_port *_port)
679{
680 struct mn10300_serial_port *port =
681 container_of(_port, struct mn10300_serial_port, uart);
682
683 _enter("%s", port->name);
684
685 /* disable the virtual DMA */
686 mn10300_serial_dis_tx_intr(port);
687}
688
689/*
690 * start transmitting characters
691 * - jump-start transmission if it has stalled
692 * - enable the serial Tx interrupt (used by the virtual DMA controller)
693 * - force an interrupt to happen if necessary
694 */
695static void mn10300_serial_start_tx(struct uart_port *_port)
696{
697 struct mn10300_serial_port *port =
698 container_of(_port, struct mn10300_serial_port, uart);
699
700 u16 x;
701
702 _enter("%s{%lu}",
703 port->name,
704 CIRC_CNT(&port->uart.info->xmit.head,
705 &port->uart.info->xmit.tail,
706 UART_XMIT_SIZE));
707
708 /* kick the virtual DMA controller */
709 x = *port->tx_icr;
710 x |= GxICR_ENABLE;
711
712 if (*port->_status & SC01STR_TBF)
713 x &= ~(GxICR_REQUEST | GxICR_DETECT);
714 else
715 x |= GxICR_REQUEST | GxICR_DETECT;
716
717 _debug("CTR=%04hx ICR=%02hx STR=%04x TMD=%02hx TBR=%04hx ICR=%04hx",
718 *port->_control, *port->_intr, *port->_status,
719 *port->_tmxmd, *port->_tmxbr, *port->tx_icr);
720
721 *port->tx_icr = x;
722 x = *port->tx_icr;
723}
724
725/*
726 * transmit a high-priority XON/XOFF character
727 */
728static void mn10300_serial_send_xchar(struct uart_port *_port, char ch)
729{
730 struct mn10300_serial_port *port =
731 container_of(_port, struct mn10300_serial_port, uart);
732
733 _enter("%s,%02x", port->name, ch);
734
735 if (likely(port->gdbstub)) {
736 port->tx_xchar = ch;
737 if (ch)
738 mn10300_serial_en_tx_intr(port);
739 }
740}
741
742/*
743 * stop receiving characters
744 * - called whilst the port is being closed
745 */
746static void mn10300_serial_stop_rx(struct uart_port *_port)
747{
748 struct mn10300_serial_port *port =
749 container_of(_port, struct mn10300_serial_port, uart);
750
751 u16 ctr;
752
753 _enter("%s", port->name);
754
755 ctr = *port->_control;
756 ctr &= ~SC01CTR_RXE;
757 *port->_control = ctr;
758
759 mn10300_serial_dis_rx_intr(port);
760}
761
762/*
763 * enable modem status interrupts
764 */
765static void mn10300_serial_enable_ms(struct uart_port *_port)
766{
767 struct mn10300_serial_port *port =
768 container_of(_port, struct mn10300_serial_port, uart);
769
770 u16 ctr, cts;
771
772 _enter("%s", port->name);
773
774 if (port->type == PORT_MN10300_CTS) {
775 /* want to interrupt when CTS goes low if CTS is now high and
776 * vice versa
777 */
778 port->tx_cts = *port->_status;
779
780 cts = (port->tx_cts & SC2STR_CTS) ?
781 SC2CTR_TWE : SC2CTR_TWE | SC2CTR_TWS;
782
783 ctr = *port->_control;
784 ctr &= ~SC2CTR_TWS;
785 ctr |= cts;
786 *port->_control = ctr;
787
788 mn10300_serial_en_tx_intr(port);
789 }
790}
791
792/*
793 * transmit or cease transmitting a break signal
794 */
795static void mn10300_serial_break_ctl(struct uart_port *_port, int ctl)
796{
797 struct mn10300_serial_port *port =
798 container_of(_port, struct mn10300_serial_port, uart);
799
800 _enter("%s,%d", port->name, ctl);
801
802 if (ctl) {
803 /* tell the virtual DMA handler to assert BREAK */
804 port->tx_break = 1;
805 mn10300_serial_en_tx_intr(port);
806 } else {
807 port->tx_break = 0;
808 *port->_control &= ~SC01CTR_BKE;
809 mn10300_serial_en_tx_intr(port);
810 }
811}
812
813/*
814 * grab the interrupts and enable the port for reception
815 */
816static int mn10300_serial_startup(struct uart_port *_port)
817{
818 struct mn10300_serial_port *port =
819 container_of(_port, struct mn10300_serial_port, uart);
820 struct mn10300_serial_int *pint;
821
822 _enter("%s{%d}", port->name, port->gdbstub);
823
824 if (unlikely(port->gdbstub))
825 return -EBUSY;
826
827 /* allocate an Rx buffer for the virtual DMA handler */
828 port->rx_buffer = kmalloc(MNSC_BUFFER_SIZE, GFP_KERNEL);
829 if (!port->rx_buffer)
830 return -ENOMEM;
831
832 port->rx_inp = port->rx_outp = 0;
833
834 /* finally, enable the device */
835 *port->_intr = SC01ICR_TI;
836 *port->_control |= SC01CTR_TXE | SC01CTR_RXE;
837
838 pint = &mn10300_serial_int_tbl[port->rx_irq];
839 pint->port = port;
840 pint->vdma = mn10300_serial_vdma_rx_handler;
841 pint = &mn10300_serial_int_tbl[port->tx_irq];
842 pint->port = port;
843 pint->vdma = mn10300_serial_vdma_tx_handler;
844
845 set_intr_level(port->rx_irq, GxICR_LEVEL_1);
846 set_intr_level(port->tx_irq, GxICR_LEVEL_1);
847 set_irq_chip(port->tm_irq, &mn10300_serial_pic);
848
849 if (request_irq(port->rx_irq, mn10300_serial_interrupt,
850 IRQF_DISABLED, port->rx_name, port) < 0)
851 goto error;
852
853 if (request_irq(port->tx_irq, mn10300_serial_interrupt,
854 IRQF_DISABLED, port->tx_name, port) < 0)
855 goto error2;
856
857 if (request_irq(port->tm_irq, mn10300_serial_interrupt,
858 IRQF_DISABLED, port->tm_name, port) < 0)
859 goto error3;
860 mn10300_serial_mask_ack(port->tm_irq);
861
862 return 0;
863
864error3:
865 free_irq(port->tx_irq, port);
866error2:
867 free_irq(port->rx_irq, port);
868error:
869 kfree(port->rx_buffer);
870 port->rx_buffer = NULL;
871 return -EBUSY;
872}
873
874/*
875 * shutdown the port and release interrupts
876 */
877static void mn10300_serial_shutdown(struct uart_port *_port)
878{
879 struct mn10300_serial_port *port =
880 container_of(_port, struct mn10300_serial_port, uart);
881
882 _enter("%s", port->name);
883
884 /* disable the serial port and its baud rate timer */
885 port->tx_break = 0;
886 *port->_control &= ~(SC01CTR_TXE | SC01CTR_RXE | SC01CTR_BKE);
887 *port->_tmxmd = 0;
888
889 if (port->rx_buffer) {
890 void *buf = port->rx_buffer;
891 port->rx_buffer = NULL;
892 kfree(buf);
893 }
894
895 /* disable all intrs */
896 free_irq(port->tm_irq, port);
897 free_irq(port->rx_irq, port);
898 free_irq(port->tx_irq, port);
899
900 *port->rx_icr = GxICR_LEVEL_1;
901 *port->tx_icr = GxICR_LEVEL_1;
902}
903
904/*
905 * this routine is called to set the UART divisor registers to match the
906 * specified baud rate for a serial port.
907 */
908static void mn10300_serial_change_speed(struct mn10300_serial_port *port,
909 struct ktermios *new,
910 struct ktermios *old)
911{
912 unsigned long flags;
913 unsigned long ioclk = port->ioclk;
914 unsigned cflag;
915 int baud, bits, xdiv, tmp;
916 u16 tmxbr, scxctr;
917 u8 tmxmd, battempt;
918 u8 div_timer = port->div_timer;
919
920 _enter("%s{%lu}", port->name, ioclk);
921
922 /* byte size and parity */
923 cflag = new->c_cflag;
924 switch (cflag & CSIZE) {
925 case CS7: scxctr = SC01CTR_CLN_7BIT; bits = 9; break;
926 case CS8: scxctr = SC01CTR_CLN_8BIT; bits = 10; break;
927 default: scxctr = SC01CTR_CLN_8BIT; bits = 10; break;
928 }
929
930 if (cflag & CSTOPB) {
931 scxctr |= SC01CTR_STB_2BIT;
932 bits++;
933 }
934
935 if (cflag & PARENB) {
936 bits++;
937 if (cflag & PARODD)
938 scxctr |= SC01CTR_PB_ODD;
939#ifdef CMSPAR
940 else if (cflag & CMSPAR)
941 scxctr |= SC01CTR_PB_FIXED0;
942#endif
943 else
944 scxctr |= SC01CTR_PB_EVEN;
945 }
946
947 /* Determine divisor based on baud rate */
948 battempt = 0;
949
950 if (div_timer == MNSCx_DIV_TIMER_16BIT)
951 scxctr |= SC0CTR_CK_TM8UFLOW_8; /* ( == SC1CTR_CK_TM9UFLOW_8
952 * == SC2CTR_CK_TM10UFLOW) */
953 else if (div_timer == MNSCx_DIV_TIMER_8BIT)
954 scxctr |= SC0CTR_CK_TM2UFLOW_8;
955
956try_alternative:
957 baud = uart_get_baud_rate(&port->uart, new, old, 0,
958 port->ioclk / 8);
959
960 _debug("ALT %d [baud %d]", battempt, baud);
961
962 if (!baud)
963 baud = 9600; /* B0 transition handled in rs_set_termios */
964 xdiv = 1;
965 if (baud == 134) {
966 baud = 269; /* 134 is really 134.5 */
967 xdiv = 2;
968 }
969
970 if (baud == 38400 &&
971 (port->uart.flags & UPF_SPD_MASK) == UPF_SPD_CUST
972 ) {
973 _debug("CUSTOM %u", port->uart.custom_divisor);
974
975 if (div_timer == MNSCx_DIV_TIMER_16BIT) {
976 if (port->uart.custom_divisor <= 65535) {
977 tmxmd = TM8MD_SRC_IOCLK;
978 tmxbr = port->uart.custom_divisor;
979 port->uart.uartclk = ioclk;
980 goto timer_okay;
981 }
982 if (port->uart.custom_divisor / 8 <= 65535) {
983 tmxmd = TM8MD_SRC_IOCLK_8;
984 tmxbr = port->uart.custom_divisor / 8;
985 port->uart.custom_divisor = tmxbr * 8;
986 port->uart.uartclk = ioclk / 8;
987 goto timer_okay;
988 }
989 if (port->uart.custom_divisor / 32 <= 65535) {
990 tmxmd = TM8MD_SRC_IOCLK_32;
991 tmxbr = port->uart.custom_divisor / 32;
992 port->uart.custom_divisor = tmxbr * 32;
993 port->uart.uartclk = ioclk / 32;
994 goto timer_okay;
995 }
996
997 } else if (div_timer == MNSCx_DIV_TIMER_8BIT) {
998 if (port->uart.custom_divisor <= 255) {
999 tmxmd = TM2MD_SRC_IOCLK;
1000 tmxbr = port->uart.custom_divisor;
1001 port->uart.uartclk = ioclk;
1002 goto timer_okay;
1003 }
1004 if (port->uart.custom_divisor / 8 <= 255) {
1005 tmxmd = TM2MD_SRC_IOCLK_8;
1006 tmxbr = port->uart.custom_divisor / 8;
1007 port->uart.custom_divisor = tmxbr * 8;
1008 port->uart.uartclk = ioclk / 8;
1009 goto timer_okay;
1010 }
1011 if (port->uart.custom_divisor / 32 <= 255) {
1012 tmxmd = TM2MD_SRC_IOCLK_32;
1013 tmxbr = port->uart.custom_divisor / 32;
1014 port->uart.custom_divisor = tmxbr * 32;
1015 port->uart.uartclk = ioclk / 32;
1016 goto timer_okay;
1017 }
1018 }
1019 }
1020
1021 switch (div_timer) {
1022 case MNSCx_DIV_TIMER_16BIT:
1023 port->uart.uartclk = ioclk;
1024 tmxmd = TM8MD_SRC_IOCLK;
1025 tmxbr = tmp = (ioclk / (baud * xdiv) + 4) / 8 - 1;
1026 if (tmp > 0 && tmp <= 65535)
1027 goto timer_okay;
1028
1029 port->uart.uartclk = ioclk / 8;
1030 tmxmd = TM8MD_SRC_IOCLK_8;
1031 tmxbr = tmp = (ioclk / (baud * 8 * xdiv) + 4) / 8 - 1;
1032 if (tmp > 0 && tmp <= 65535)
1033 goto timer_okay;
1034
1035 port->uart.uartclk = ioclk / 32;
1036 tmxmd = TM8MD_SRC_IOCLK_32;
1037 tmxbr = tmp = (ioclk / (baud * 32 * xdiv) + 4) / 8 - 1;
1038 if (tmp > 0 && tmp <= 65535)
1039 goto timer_okay;
1040 break;
1041
1042 case MNSCx_DIV_TIMER_8BIT:
1043 port->uart.uartclk = ioclk;
1044 tmxmd = TM2MD_SRC_IOCLK;
1045 tmxbr = tmp = (ioclk / (baud * xdiv) + 4) / 8 - 1;
1046 if (tmp > 0 && tmp <= 255)
1047 goto timer_okay;
1048
1049 port->uart.uartclk = ioclk / 8;
1050 tmxmd = TM2MD_SRC_IOCLK_8;
1051 tmxbr = tmp = (ioclk / (baud * 8 * xdiv) + 4) / 8 - 1;
1052 if (tmp > 0 && tmp <= 255)
1053 goto timer_okay;
1054
1055 port->uart.uartclk = ioclk / 32;
1056 tmxmd = TM2MD_SRC_IOCLK_32;
1057 tmxbr = tmp = (ioclk / (baud * 32 * xdiv) + 4) / 8 - 1;
1058 if (tmp > 0 && tmp <= 255)
1059 goto timer_okay;
1060 break;
1061
1062 default:
1063 BUG();
1064 return;
1065 }
1066
1067 /* refuse to change to a baud rate we can't support */
1068 _debug("CAN'T SUPPORT");
1069
1070 switch (battempt) {
1071 case 0:
1072 if (old) {
1073 new->c_cflag &= ~CBAUD;
1074 new->c_cflag |= (old->c_cflag & CBAUD);
1075 battempt = 1;
1076 goto try_alternative;
1077 }
1078
1079 case 1:
1080 /* as a last resort, if the quotient is zero, default to 9600
1081 * bps */
1082 new->c_cflag &= ~CBAUD;
1083 new->c_cflag |= B9600;
1084 battempt = 2;
1085 goto try_alternative;
1086
1087 default:
1088 /* hmmm... can't seem to support 9600 either
1089 * - we could try iterating through the speeds we know about to
1090 * find the lowest
1091 */
1092 new->c_cflag &= ~CBAUD;
1093 new->c_cflag |= B0;
1094
1095 if (div_timer == MNSCx_DIV_TIMER_16BIT)
1096 tmxmd = TM8MD_SRC_IOCLK_32;
1097 else if (div_timer == MNSCx_DIV_TIMER_8BIT)
1098 tmxmd = TM2MD_SRC_IOCLK_32;
1099 tmxbr = 1;
1100
1101 port->uart.uartclk = ioclk / 32;
1102 break;
1103 }
1104timer_okay:
1105
1106 _debug("UARTCLK: %u / %hu", port->uart.uartclk, tmxbr);
1107
1108 /* make the changes */
1109 spin_lock_irqsave(&port->uart.lock, flags);
1110
1111 uart_update_timeout(&port->uart, new->c_cflag, baud);
1112
1113 /* set the timer to produce the required baud rate */
1114 switch (div_timer) {
1115 case MNSCx_DIV_TIMER_16BIT:
1116 *port->_tmxmd = 0;
1117 *port->_tmxbr = tmxbr;
1118 *port->_tmxmd = TM8MD_INIT_COUNTER;
1119 *port->_tmxmd = tmxmd | TM8MD_COUNT_ENABLE;
1120 break;
1121
1122 case MNSCx_DIV_TIMER_8BIT:
1123 *port->_tmxmd = 0;
1124 *(volatile u8 *) port->_tmxbr = (u8) tmxbr;
1125 *port->_tmxmd = TM2MD_INIT_COUNTER;
1126 *port->_tmxmd = tmxmd | TM2MD_COUNT_ENABLE;
1127 break;
1128 }
1129
1130 /* CTS flow control flag and modem status interrupts */
1131 scxctr &= ~(SC2CTR_TWE | SC2CTR_TWS);
1132
1133 if (port->type == PORT_MN10300_CTS && cflag & CRTSCTS) {
1134 /* want to interrupt when CTS goes low if CTS is now
1135 * high and vice versa
1136 */
1137 port->tx_cts = *port->_status;
1138
1139 if (port->tx_cts & SC2STR_CTS)
1140 scxctr |= SC2CTR_TWE;
1141 else
1142 scxctr |= SC2CTR_TWE | SC2CTR_TWS;
1143 }
1144
1145 /* set up parity check flag */
1146 port->uart.read_status_mask = (1 << TTY_NORMAL) | (1 << TTY_OVERRUN);
1147 if (new->c_iflag & INPCK)
1148 port->uart.read_status_mask |=
1149 (1 << TTY_PARITY) | (1 << TTY_FRAME);
1150 if (new->c_iflag & (BRKINT | PARMRK))
1151 port->uart.read_status_mask |= (1 << TTY_BREAK);
1152
1153 /* characters to ignore */
1154 port->uart.ignore_status_mask = 0;
1155 if (new->c_iflag & IGNPAR)
1156 port->uart.ignore_status_mask |=
1157 (1 << TTY_PARITY) | (1 << TTY_FRAME);
1158 if (new->c_iflag & IGNBRK) {
1159 port->uart.ignore_status_mask |= (1 << TTY_BREAK);
1160 /*
1161 * If we're ignoring parity and break indicators,
1162 * ignore overruns to (for real raw support).
1163 */
1164 if (new->c_iflag & IGNPAR)
1165 port->uart.ignore_status_mask |= (1 << TTY_OVERRUN);
1166 }
1167
1168 /* Ignore all characters if CREAD is not set */
1169 if ((new->c_cflag & CREAD) == 0)
1170 port->uart.ignore_status_mask |= (1 << TTY_NORMAL);
1171
1172 scxctr |= *port->_control & (SC01CTR_TXE | SC01CTR_RXE | SC01CTR_BKE);
1173 *port->_control = scxctr;
1174
1175 spin_unlock_irqrestore(&port->uart.lock, flags);
1176}
1177
1178/*
1179 * set the terminal I/O parameters
1180 */
1181static void mn10300_serial_set_termios(struct uart_port *_port,
1182 struct ktermios *new,
1183 struct ktermios *old)
1184{
1185 struct mn10300_serial_port *port =
1186 container_of(_port, struct mn10300_serial_port, uart);
1187
1188 _enter("%s,%p,%p", port->name, new, old);
1189
1190 mn10300_serial_change_speed(port, new, old);
1191
1192 /* handle turning off CRTSCTS */
1193 if (!(new->c_cflag & CRTSCTS)) {
1194 u16 ctr = *port->_control;
1195 ctr &= ~SC2CTR_TWE;
1196 *port->_control = ctr;
1197 }
1198}
1199
1200/*
1201 * return description of port type
1202 */
1203static const char *mn10300_serial_type(struct uart_port *_port)
1204{
1205 struct mn10300_serial_port *port =
1206 container_of(_port, struct mn10300_serial_port, uart);
1207
1208 if (port->uart.type == PORT_MN10300_CTS)
1209 return "MN10300 SIF_CTS";
1210
1211 return "MN10300 SIF";
1212}
1213
1214/*
1215 * release I/O and memory regions in use by port
1216 */
1217static void mn10300_serial_release_port(struct uart_port *_port)
1218{
1219 struct mn10300_serial_port *port =
1220 container_of(_port, struct mn10300_serial_port, uart);
1221
1222 _enter("%s", port->name);
1223
1224 release_mem_region((unsigned long) port->_iobase, 16);
1225}
1226
1227/*
1228 * request I/O and memory regions for port
1229 */
1230static int mn10300_serial_request_port(struct uart_port *_port)
1231{
1232 struct mn10300_serial_port *port =
1233 container_of(_port, struct mn10300_serial_port, uart);
1234
1235 _enter("%s", port->name);
1236
1237 request_mem_region((unsigned long) port->_iobase, 16, port->name);
1238 return 0;
1239}
1240
1241/*
1242 * configure the type and reserve the ports
1243 */
1244static void mn10300_serial_config_port(struct uart_port *_port, int type)
1245{
1246 struct mn10300_serial_port *port =
1247 container_of(_port, struct mn10300_serial_port, uart);
1248
1249 _enter("%s", port->name);
1250
1251 port->uart.type = PORT_MN10300;
1252
1253 if (port->options & MNSCx_OPT_CTS)
1254 port->uart.type = PORT_MN10300_CTS;
1255
1256 mn10300_serial_request_port(_port);
1257}
1258
1259/*
1260 * verify serial parameters are suitable for this port type
1261 */
1262static int mn10300_serial_verify_port(struct uart_port *_port,
1263 struct serial_struct *ss)
1264{
1265 struct mn10300_serial_port *port =
1266 container_of(_port, struct mn10300_serial_port, uart);
1267 void *mapbase = (void *) (unsigned long) port->uart.mapbase;
1268
1269 _enter("%s", port->name);
1270
1271 /* these things may not be changed */
1272 if (ss->irq != port->uart.irq ||
1273 ss->port != port->uart.iobase ||
1274 ss->io_type != port->uart.iotype ||
1275 ss->iomem_base != mapbase ||
1276 ss->iomem_reg_shift != port->uart.regshift ||
1277 ss->hub6 != port->uart.hub6 ||
1278 ss->xmit_fifo_size != port->uart.fifosize)
1279 return -EINVAL;
1280
1281 /* type may be changed on a port that supports CTS */
1282 if (ss->type != port->uart.type) {
1283 if (!(port->options & MNSCx_OPT_CTS))
1284 return -EINVAL;
1285
1286 if (ss->type != PORT_MN10300 &&
1287 ss->type != PORT_MN10300_CTS)
1288 return -EINVAL;
1289 }
1290
1291 return 0;
1292}
1293
1294/*
1295 * initialise the MN10300 on-chip UARTs
1296 */
1297static int __init mn10300_serial_init(void)
1298{
1299 struct mn10300_serial_port *port;
1300 int ret, i;
1301
1302 printk(KERN_INFO "%s version %s (%s)\n",
1303 serial_name, serial_version, serial_revdate);
1304
1305#ifdef CONFIG_MN10300_TTYSM2
1306 SC2TIM = 8; /* make the baud base of timer 2 IOCLK/8 */
1307#endif
1308
1309 set_intr_stub(EXCEP_IRQ_LEVEL1, mn10300_serial_vdma_interrupt);
1310
1311 ret = uart_register_driver(&mn10300_serial_driver);
1312 if (!ret) {
1313 for (i = 0 ; i < NR_PORTS ; i++) {
1314 port = mn10300_serial_ports[i];
1315 if (!port || port->gdbstub)
1316 continue;
1317
1318 switch (port->clock_src) {
1319 case MNSCx_CLOCK_SRC_IOCLK:
1320 port->ioclk = MN10300_IOCLK;
1321 break;
1322
1323#ifdef MN10300_IOBCLK
1324 case MNSCx_CLOCK_SRC_IOBCLK:
1325 port->ioclk = MN10300_IOBCLK;
1326 break;
1327#endif
1328 default:
1329 BUG();
1330 }
1331
1332 ret = uart_add_one_port(&mn10300_serial_driver,
1333 &port->uart);
1334
1335 if (ret < 0) {
1336 _debug("ERROR %d", -ret);
1337 break;
1338 }
1339 }
1340
1341 if (ret)
1342 uart_unregister_driver(&mn10300_serial_driver);
1343 }
1344
1345 return ret;
1346}
1347
1348__initcall(mn10300_serial_init);
1349
1350
1351#ifdef CONFIG_MN10300_TTYSM_CONSOLE
1352
1353/*
1354 * print a string to the serial port without disturbing the real user of the
1355 * port too much
1356 * - the console must be locked by the caller
1357 */
1358static void mn10300_serial_console_write(struct console *co,
1359 const char *s, unsigned count)
1360{
1361 struct mn10300_serial_port *port;
1362 unsigned i;
1363 u16 scxctr, txicr, tmp;
1364 u8 tmxmd;
1365
1366 port = mn10300_serial_ports[co->index];
1367
1368 /* firstly hijack the serial port from the "virtual DMA" controller */
1369 txicr = *port->tx_icr;
1370 *port->tx_icr = GxICR_LEVEL_1;
1371 tmp = *port->tx_icr;
1372
1373 /* the transmitter may be disabled */
1374 scxctr = *port->_control;
1375 if (!(scxctr & SC01CTR_TXE)) {
1376 /* restart the UART clock */
1377 tmxmd = *port->_tmxmd;
1378
1379 switch (port->div_timer) {
1380 case MNSCx_DIV_TIMER_16BIT:
1381 *port->_tmxmd = 0;
1382 *port->_tmxmd = TM8MD_INIT_COUNTER;
1383 *port->_tmxmd = tmxmd | TM8MD_COUNT_ENABLE;
1384 break;
1385
1386 case MNSCx_DIV_TIMER_8BIT:
1387 *port->_tmxmd = 0;
1388 *port->_tmxmd = TM2MD_INIT_COUNTER;
1389 *port->_tmxmd = tmxmd | TM2MD_COUNT_ENABLE;
1390 break;
1391 }
1392
1393 /* enable the transmitter */
1394 *port->_control = (scxctr & ~SC01CTR_BKE) | SC01CTR_TXE;
1395
1396 } else if (scxctr & SC01CTR_BKE) {
1397 /* stop transmitting BREAK */
1398 *port->_control = (scxctr & ~SC01CTR_BKE);
1399 }
1400
1401 /* send the chars into the serial port (with LF -> LFCR conversion) */
1402 for (i = 0; i < count; i++) {
1403 char ch = *s++;
1404
1405 while (*port->_status & SC01STR_TBF)
1406 continue;
1407 *(u8 *) port->_txb = ch;
1408
1409 if (ch == 0x0a) {
1410 while (*port->_status & SC01STR_TBF)
1411 continue;
1412 *(u8 *) port->_txb = 0xd;
1413 }
1414 }
1415
1416 /* can't let the transmitter be turned off if it's actually
1417 * transmitting */
1418 while (*port->_status & (SC01STR_TXF | SC01STR_TBF))
1419 continue;
1420
1421 /* disable the transmitter if we re-enabled it */
1422 if (!(scxctr & SC01CTR_TXE))
1423 *port->_control = scxctr;
1424
1425 *port->tx_icr = txicr;
1426 tmp = *port->tx_icr;
1427}
1428
1429/*
1430 * set up a serial port as a console
1431 * - construct a cflag setting for the first rs_open()
1432 * - initialize the serial port
1433 * - return non-zero if we didn't find a serial port.
1434 */
1435static int __init mn10300_serial_console_setup(struct console *co,
1436 char *options)
1437{
1438 struct mn10300_serial_port *port;
1439 int i, parity = 'n', baud = 9600, bits = 8, flow = 0;
1440
1441 for (i = 0 ; i < NR_PORTS ; i++) {
1442 port = mn10300_serial_ports[i];
1443 if (port && !port->gdbstub && port->uart.line == co->index)
1444 goto found_device;
1445 }
1446
1447 return -ENODEV;
1448
1449found_device:
1450 switch (port->clock_src) {
1451 case MNSCx_CLOCK_SRC_IOCLK:
1452 port->ioclk = MN10300_IOCLK;
1453 break;
1454
1455#ifdef MN10300_IOBCLK
1456 case MNSCx_CLOCK_SRC_IOBCLK:
1457 port->ioclk = MN10300_IOBCLK;
1458 break;
1459#endif
1460 default:
1461 BUG();
1462 }
1463
1464 if (options)
1465 uart_parse_options(options, &baud, &parity, &bits, &flow);
1466
1467 return uart_set_options(&port->uart, co, baud, parity, bits, flow);
1468}
1469
1470/*
1471 * register console
1472 */
1473static int __init mn10300_serial_console_init(void)
1474{
1475 register_console(&mn10300_serial_console);
1476 return 0;
1477}
1478
1479console_initcall(mn10300_serial_console_init);
1480#endif
diff --git a/arch/mn10300/kernel/mn10300-serial.h b/arch/mn10300/kernel/mn10300-serial.h
new file mode 100644
index 000000000000..6796499bf789
--- /dev/null
+++ b/arch/mn10300/kernel/mn10300-serial.h
@@ -0,0 +1,126 @@
1/* MN10300 On-chip serial port driver definitions
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _MN10300_SERIAL_H
12#define _MN10300_SERIAL_H
13
14#ifndef __ASSEMBLY__
15#include <linux/serial_core.h>
16#include <linux/termios.h>
17#endif
18
19#include <asm/page.h>
20#include <asm/serial-regs.h>
21
22#define NR_PORTS 3 /* should be set 3 or 9 or 16 */
23
24#define MNSC_BUFFER_SIZE +(PAGE_SIZE / 2)
25
26/* intr_flags bits */
27#define MNSCx_RX_AVAIL 0x01
28#define MNSCx_RX_OVERF 0x02
29#define MNSCx_TX_SPACE 0x04
30#define MNSCx_TX_EMPTY 0x08
31
32#ifndef __ASSEMBLY__
33
34struct mn10300_serial_port {
35 char *rx_buffer; /* reception buffer base */
36 unsigned rx_inp; /* pointer to rx input offset */
37 unsigned rx_outp; /* pointer to rx output offset */
38 u8 tx_xchar; /* high-priority XON/XOFF buffer */
39 u8 tx_break; /* transmit break request */
40 u8 intr_flags; /* interrupt flags */
41 volatile u16 *rx_icr; /* Rx interrupt control register */
42 volatile u16 *tx_icr; /* Tx interrupt control register */
43 int rx_irq; /* reception IRQ */
44 int tx_irq; /* transmission IRQ */
45 int tm_irq; /* timer IRQ */
46
47 const char *name; /* name of serial port */
48 const char *rx_name; /* Rx interrupt handler name of serial port */
49 const char *tx_name; /* Tx interrupt handler name of serial port */
50 const char *tm_name; /* Timer interrupt handler name */
51 unsigned short type; /* type of serial port */
52 unsigned char isconsole; /* T if it's a console */
53 volatile void *_iobase; /* pointer to base of I/O control regs */
54 volatile u16 *_control; /* control register pointer */
55 volatile u8 *_status; /* status register pointer */
56 volatile u8 *_intr; /* interrupt register pointer */
57 volatile void *_rxb; /* receive buffer register pointer */
58 volatile void *_txb; /* transmit buffer register pointer */
59 volatile u16 *_tmicr; /* timer interrupt control register */
60 volatile u8 *_tmxmd; /* baud rate timer mode register */
61 volatile u16 *_tmxbr; /* baud rate timer base register */
62
63 /* this must come down here so that assembly can use BSET to access the
64 * above fields */
65 struct uart_port uart;
66
67 unsigned short rx_brk; /* current break reception status */
68 u16 tx_cts; /* current CTS status */
69 int gdbstub; /* preemptively stolen by GDB stub */
70
71 u8 clock_src; /* clock source */
72#define MNSCx_CLOCK_SRC_IOCLK 0
73#define MNSCx_CLOCK_SRC_IOBCLK 1
74
75 u8 div_timer; /* timer used as divisor */
76#define MNSCx_DIV_TIMER_16BIT 0
77#define MNSCx_DIV_TIMER_8BIT 1
78
79 u16 options; /* options */
80#define MNSCx_OPT_CTS 0x0001
81
82 unsigned long ioclk; /* base clock rate */
83};
84
85#ifdef CONFIG_MN10300_TTYSM0
86extern struct mn10300_serial_port mn10300_serial_port_sif0;
87#endif
88
89#ifdef CONFIG_MN10300_TTYSM1
90extern struct mn10300_serial_port mn10300_serial_port_sif1;
91#endif
92
93#ifdef CONFIG_MN10300_TTYSM2
94extern struct mn10300_serial_port mn10300_serial_port_sif2;
95#endif
96
97extern struct mn10300_serial_port *mn10300_serial_ports[];
98
99struct mn10300_serial_int {
100 struct mn10300_serial_port *port;
101 asmlinkage void (*vdma)(void);
102};
103
104extern struct mn10300_serial_int mn10300_serial_int_tbl[];
105
106extern asmlinkage void mn10300_serial_vdma_interrupt(void);
107extern asmlinkage void mn10300_serial_vdma_rx_handler(void);
108extern asmlinkage void mn10300_serial_vdma_tx_handler(void);
109
110#endif /* __ASSEMBLY__ */
111
112#if defined(CONFIG_GDBSTUB_ON_TTYSM0)
113#define SCgSTR SC0STR
114#define SCgRXB SC0RXB
115#define SCgRXIRQ SC0RXIRQ
116#elif defined(CONFIG_GDBSTUB_ON_TTYSM1)
117#define SCgSTR SC1STR
118#define SCgRXB SC1RXB
119#define SCgRXIRQ SC1RXIRQ
120#elif defined(CONFIG_GDBSTUB_ON_TTYSM2)
121#define SCgSTR SC2STR
122#define SCgRXB SC2RXB
123#define SCgRXIRQ SC2RXIRQ
124#endif
125
126#endif /* _MN10300_SERIAL_H */
diff --git a/arch/mn10300/kernel/mn10300-watchdog-low.S b/arch/mn10300/kernel/mn10300-watchdog-low.S
new file mode 100644
index 000000000000..996244745cca
--- /dev/null
+++ b/arch/mn10300/kernel/mn10300-watchdog-low.S
@@ -0,0 +1,59 @@
1###############################################################################
2#
3# MN10300 Watchdog interrupt handler
4#
5# Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
6# Written by David Howells (dhowells@redhat.com)
7#
8# This program is free software; you can redistribute it and/or
9# modify it under the terms of the GNU General Public Licence
10# as published by the Free Software Foundation; either version
11# 2 of the Licence, or (at your option) any later version.
12#
13###############################################################################
14#include <linux/sys.h>
15#include <linux/linkage.h>
16#include <asm/intctl-regs.h>
17#include <asm/timer-regs.h>
18#include <asm/frame.inc>
19
20 .text
21
22###############################################################################
23#
24# Watchdog handler entry point
25# - special non-maskable interrupt
26#
27###############################################################################
28 .globl watchdog_handler
29 .type watchdog_handler,@function
30watchdog_handler:
31 add -4,sp
32 SAVE_ALL
33
34 mov 0xffffffff,d0
35 mov d0,(REG_ORIG_D0,fp)
36
37 mov fp,d0
38 lsr 2,d1
39 call watchdog_interrupt[],0 # watchdog_interrupt(regs,irq)
40
41 jmp ret_from_intr
42
43 .size watchdog_handler,.-watchdog_handler
44
45###############################################################################
46#
47# Watchdog touch entry point
48# - kept to absolute minimum (unfortunately, it's prototyped in linux/nmi.h so
49# we can't inline it)
50#
51###############################################################################
52 .globl touch_nmi_watchdog
53 .type touch_nmi_watchdog,@function
54touch_nmi_watchdog:
55 clr d0
56 mov d0,(watchdog_alert_counter)
57 ret [],0
58
59 .size touch_nmi_watchdog,.-touch_nmi_watchdog
diff --git a/arch/mn10300/kernel/mn10300-watchdog.c b/arch/mn10300/kernel/mn10300-watchdog.c
new file mode 100644
index 000000000000..10811e981d20
--- /dev/null
+++ b/arch/mn10300/kernel/mn10300-watchdog.c
@@ -0,0 +1,183 @@
1/* MN10300 Watchdog timer
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 * - Derived from arch/i386/kernel/nmi.c
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public Licence
9 * as published by the Free Software Foundation; either version
10 * 2 of the Licence, or (at your option) any later version.
11 */
12#include <linux/module.h>
13#include <linux/sched.h>
14#include <linux/kernel.h>
15#include <linux/init.h>
16#include <linux/delay.h>
17#include <linux/interrupt.h>
18#include <linux/kernel_stat.h>
19#include <linux/nmi.h>
20#include <asm/processor.h>
21#include <asm/system.h>
22#include <asm/atomic.h>
23#include <asm/intctl-regs.h>
24#include <asm/rtc-regs.h>
25#include <asm/div64.h>
26#include <asm/smp.h>
27#include <asm/gdb-stub.h>
28#include <asm/proc/clock.h>
29
30static DEFINE_SPINLOCK(watchdog_print_lock);
31static unsigned int watchdog;
32static unsigned int watchdog_hz = 1;
33unsigned int watchdog_alert_counter;
34
35EXPORT_SYMBOL(touch_nmi_watchdog);
36
37/*
38 * the best way to detect whether a CPU has a 'hard lockup' problem
39 * is to check its timer makes IRQ counts. If they are not
40 * changing then that CPU has some problem.
41 *
42 * as these watchdog NMI IRQs are generated on every CPU, we only
43 * have to check the current processor.
44 *
45 * since NMIs dont listen to _any_ locks, we have to be extremely
46 * careful not to rely on unsafe variables. The printk might lock
47 * up though, so we have to break up any console locks first ...
48 * [when there will be more tty-related locks, break them up
49 * here too!]
50 */
51static unsigned int last_irq_sums[NR_CPUS];
52
53int __init check_watchdog(void)
54{
55 irq_cpustat_t tmp[1];
56
57 printk(KERN_INFO "Testing Watchdog... ");
58
59 memcpy(tmp, irq_stat, sizeof(tmp));
60 local_irq_enable();
61 mdelay((10 * 1000) / watchdog_hz); /* wait 10 ticks */
62 local_irq_disable();
63
64 if (nmi_count(0) - tmp[0].__nmi_count <= 5) {
65 printk(KERN_WARNING "CPU#%d: Watchdog appears to be stuck!\n",
66 0);
67 return -1;
68 }
69
70 printk(KERN_INFO "OK.\n");
71
72 /* now that we know it works we can reduce NMI frequency to
73 * something more reasonable; makes a difference in some configs
74 */
75 watchdog_hz = 1;
76
77 return 0;
78}
79
80static int __init setup_watchdog(char *str)
81{
82 unsigned tmp;
83 int opt;
84 u8 ctr;
85
86 get_option(&str, &opt);
87 if (opt != 1)
88 return 0;
89
90 watchdog = opt;
91 if (watchdog) {
92 set_intr_stub(EXCEP_WDT, watchdog_handler);
93 ctr = WDCTR_WDCK_65536th;
94 WDCTR = WDCTR_WDRST | ctr;
95 WDCTR = ctr;
96 tmp = WDCTR;
97
98 tmp = __muldiv64u(1 << (16 + ctr * 2), 1000000, MN10300_WDCLK);
99 tmp = 1000000000 / tmp;
100 watchdog_hz = (tmp + 500) / 1000;
101 }
102
103 return 1;
104}
105
106__setup("watchdog=", setup_watchdog);
107
108void __init watchdog_go(void)
109{
110 u8 wdt;
111
112 if (watchdog) {
113 printk(KERN_INFO "Watchdog: running at %uHz\n", watchdog_hz);
114 wdt = WDCTR & ~WDCTR_WDCNE;
115 WDCTR = wdt | WDCTR_WDRST;
116 wdt = WDCTR;
117 WDCTR = wdt | WDCTR_WDCNE;
118 wdt = WDCTR;
119
120 check_watchdog();
121 }
122}
123
124asmlinkage
125void watchdog_interrupt(struct pt_regs *regs, enum exception_code excep)
126{
127
128 /*
129 * Since current-> is always on the stack, and we always switch
130 * the stack NMI-atomically, it's safe to use smp_processor_id().
131 */
132 int sum, cpu = smp_processor_id();
133 u8 wdt, tmp;
134
135 wdt = WDCTR & ~WDCTR_WDCNE;
136 WDCTR = wdt;
137 tmp = WDCTR;
138 NMICR = NMICR_WDIF;
139
140 nmi_count(cpu)++;
141 kstat_this_cpu.irqs[NMIIRQ]++;
142 sum = irq_stat[cpu].__irq_count;
143
144 if (last_irq_sums[cpu] == sum) {
145 /*
146 * Ayiee, looks like this CPU is stuck ...
147 * wait a few IRQs (5 seconds) before doing the oops ...
148 */
149 watchdog_alert_counter++;
150 if (watchdog_alert_counter == 5 * watchdog_hz) {
151 spin_lock(&watchdog_print_lock);
152 /*
153 * We are in trouble anyway, lets at least try
154 * to get a message out.
155 */
156 bust_spinlocks(1);
157 printk(KERN_ERR
158 "NMI Watchdog detected LOCKUP on CPU%d,"
159 " pc %08lx, registers:\n",
160 cpu, regs->pc);
161 show_registers(regs);
162 printk("console shuts up ...\n");
163 console_silent();
164 spin_unlock(&watchdog_print_lock);
165 bust_spinlocks(0);
166#ifdef CONFIG_GDBSTUB
167 if (gdbstub_busy)
168 gdbstub_exception(regs, excep);
169 else
170 gdbstub_intercept(regs, excep);
171#endif
172 do_exit(SIGSEGV);
173 }
174 } else {
175 last_irq_sums[cpu] = sum;
176 watchdog_alert_counter = 0;
177 }
178
179 WDCTR = wdt | WDCTR_WDRST;
180 tmp = WDCTR;
181 WDCTR = wdt | WDCTR_WDCNE;
182 tmp = WDCTR;
183}
diff --git a/arch/mn10300/kernel/mn10300_ksyms.c b/arch/mn10300/kernel/mn10300_ksyms.c
new file mode 100644
index 000000000000..6d19628634e3
--- /dev/null
+++ b/arch/mn10300/kernel/mn10300_ksyms.c
@@ -0,0 +1,37 @@
1/* MN10300 Miscellaneous and library kernel exports
2 *
3 * Copyright (C) 2007 Matsushita Electric Industrial Co., Ltd.
4 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#include <linux/module.h>
12#include <asm/uaccess.h>
13
14
15EXPORT_SYMBOL(change_bit);
16EXPORT_SYMBOL(test_and_change_bit);
17
18EXPORT_SYMBOL(memcpy);
19EXPORT_SYMBOL(memmove);
20EXPORT_SYMBOL(memset);
21
22EXPORT_SYMBOL(strncpy_from_user);
23EXPORT_SYMBOL(__strncpy_from_user);
24EXPORT_SYMBOL(clear_user);
25EXPORT_SYMBOL(__clear_user);
26EXPORT_SYMBOL(__generic_copy_from_user);
27EXPORT_SYMBOL(__generic_copy_to_user);
28EXPORT_SYMBOL(strnlen_user);
29
30extern u64 __ashrdi3(u64, unsigned);
31extern u64 __ashldi3(u64, unsigned);
32extern u64 __lshrdi3(u64, unsigned);
33extern s64 __negdi2(s64);
34EXPORT_SYMBOL(__ashrdi3);
35EXPORT_SYMBOL(__ashldi3);
36EXPORT_SYMBOL(__lshrdi3);
37EXPORT_SYMBOL(__negdi2);
diff --git a/arch/mn10300/kernel/module.c b/arch/mn10300/kernel/module.c
new file mode 100644
index 000000000000..0e4d2f6fa6e8
--- /dev/null
+++ b/arch/mn10300/kernel/module.c
@@ -0,0 +1,206 @@
1/* MN10300 Kernel module helper routines
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by Mark Salter (msalter@redhat.com)
5 * - Derived from arch/i386/kernel/module.c
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public Licence as published by
9 * the Free Software Foundation; either version 2 of the Licence, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public Licence for more details.
16 *
17 * You should have received a copy of the GNU General Public Licence
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */
21#include <linux/moduleloader.h>
22#include <linux/elf.h>
23#include <linux/vmalloc.h>
24#include <linux/fs.h>
25#include <linux/string.h>
26#include <linux/kernel.h>
27
28#if 0
29#define DEBUGP printk
30#else
31#define DEBUGP(fmt, ...)
32#endif
33
34/*
35 * allocate storage for a module
36 */
37void *module_alloc(unsigned long size)
38{
39 if (size == 0)
40 return NULL;
41 return vmalloc_exec(size);
42}
43
44/*
45 * free memory returned from module_alloc()
46 */
47void module_free(struct module *mod, void *module_region)
48{
49 vfree(module_region);
50 /* FIXME: If module_region == mod->init_region, trim exception
51 * table entries. */
52}
53
54/*
55 * allow the arch to fix up the section table
56 * - we don't need anything special
57 */
58int module_frob_arch_sections(Elf_Ehdr *hdr,
59 Elf_Shdr *sechdrs,
60 char *secstrings,
61 struct module *mod)
62{
63 return 0;
64}
65
66static uint32_t reloc_get16(uint8_t *p)
67{
68 return p[0] | (p[1] << 8);
69}
70
71static uint32_t reloc_get24(uint8_t *p)
72{
73 return reloc_get16(p) | (p[2] << 16);
74}
75
76static uint32_t reloc_get32(uint8_t *p)
77{
78 return reloc_get16(p) | (reloc_get16(p+2) << 16);
79}
80
81static void reloc_put16(uint8_t *p, uint32_t val)
82{
83 p[0] = val & 0xff;
84 p[1] = (val >> 8) & 0xff;
85}
86
87static void reloc_put24(uint8_t *p, uint32_t val)
88{
89 reloc_put16(p, val);
90 p[2] = (val >> 16) & 0xff;
91}
92
93static void reloc_put32(uint8_t *p, uint32_t val)
94{
95 reloc_put16(p, val);
96 reloc_put16(p+2, val >> 16);
97}
98
99/*
100 * apply a REL relocation
101 */
102int apply_relocate(Elf32_Shdr *sechdrs,
103 const char *strtab,
104 unsigned int symindex,
105 unsigned int relsec,
106 struct module *me)
107{
108 printk(KERN_ERR "module %s: RELOCATION unsupported\n",
109 me->name);
110 return -ENOEXEC;
111}
112
113/*
114 * apply a RELA relocation
115 */
116int apply_relocate_add(Elf32_Shdr *sechdrs,
117 const char *strtab,
118 unsigned int symindex,
119 unsigned int relsec,
120 struct module *me)
121{
122 unsigned int i;
123 Elf32_Rela *rel = (void *)sechdrs[relsec].sh_addr;
124 Elf32_Sym *sym;
125 Elf32_Addr relocation;
126 uint8_t *location;
127 uint32_t value;
128
129 DEBUGP("Applying relocate section %u to %u\n",
130 relsec, sechdrs[relsec].sh_info);
131
132 for (i = 0; i < sechdrs[relsec].sh_size / sizeof(*rel); i++) {
133 /* this is where to make the change */
134 location = (void *)sechdrs[sechdrs[relsec].sh_info].sh_addr
135 + rel[i].r_offset;
136
137 /* this is the symbol the relocation is referring to (note that
138 * all undefined symbols have been resolved by the caller) */
139 sym = (Elf32_Sym *)sechdrs[symindex].sh_addr
140 + ELF32_R_SYM(rel[i].r_info);
141
142 /* this is the adjustment to be made */
143 relocation = sym->st_value + rel[i].r_addend;
144
145 switch (ELF32_R_TYPE(rel[i].r_info)) {
146 /* for the first four relocation types, we add the
147 * adjustment into the value at the location given */
148 case R_MN10300_32:
149 value = reloc_get32(location);
150 value += relocation;
151 reloc_put32(location, value);
152 break;
153 case R_MN10300_24:
154 value = reloc_get24(location);
155 value += relocation;
156 reloc_put24(location, value);
157 break;
158 case R_MN10300_16:
159 value = reloc_get16(location);
160 value += relocation;
161 reloc_put16(location, value);
162 break;
163 case R_MN10300_8:
164 *location += relocation;
165 break;
166
167 /* for the next three relocation types, we write the
168 * adjustment with the address subtracted over the
169 * value at the location given */
170 case R_MN10300_PCREL32:
171 value = relocation - (uint32_t) location;
172 reloc_put32(location, value);
173 break;
174 case R_MN10300_PCREL16:
175 value = relocation - (uint32_t) location;
176 reloc_put16(location, value);
177 break;
178 case R_MN10300_PCREL8:
179 *location = relocation - (uint32_t) location;
180 break;
181
182 default:
183 printk(KERN_ERR "module %s: Unknown relocation: %u\n",
184 me->name, ELF32_R_TYPE(rel[i].r_info));
185 return -ENOEXEC;
186 }
187 }
188 return 0;
189}
190
191/*
192 * finish loading the module
193 */
194int module_finalize(const Elf_Ehdr *hdr,
195 const Elf_Shdr *sechdrs,
196 struct module *me)
197{
198 return 0;
199}
200
201/*
202 * finish clearing the module
203 */
204void module_arch_cleanup(struct module *mod)
205{
206}
diff --git a/arch/mn10300/kernel/process.c b/arch/mn10300/kernel/process.c
new file mode 100644
index 000000000000..3b0d579fc15d
--- /dev/null
+++ b/arch/mn10300/kernel/process.c
@@ -0,0 +1,297 @@
1/* MN10300 Process handling code
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#include <linux/module.h>
12#include <linux/errno.h>
13#include <linux/sched.h>
14#include <linux/kernel.h>
15#include <linux/mm.h>
16#include <linux/smp.h>
17#include <linux/smp_lock.h>
18#include <linux/stddef.h>
19#include <linux/unistd.h>
20#include <linux/ptrace.h>
21#include <linux/slab.h>
22#include <linux/user.h>
23#include <linux/a.out.h>
24#include <linux/interrupt.h>
25#include <linux/delay.h>
26#include <linux/reboot.h>
27#include <linux/percpu.h>
28#include <linux/err.h>
29#include <linux/fs.h>
30#include <asm/uaccess.h>
31#include <asm/pgtable.h>
32#include <asm/system.h>
33#include <asm/io.h>
34#include <asm/processor.h>
35#include <asm/mmu_context.h>
36#include <asm/fpu.h>
37#include <asm/reset-regs.h>
38#include <asm/gdb-stub.h>
39#include "internal.h"
40
41/*
42 * power management idle function, if any..
43 */
44void (*pm_idle)(void);
45EXPORT_SYMBOL(pm_idle);
46
47/*
48 * return saved PC of a blocked thread.
49 */
50unsigned long thread_saved_pc(struct task_struct *tsk)
51{
52 return ((unsigned long *) tsk->thread.sp)[3];
53}
54
55/*
56 * power off function, if any
57 */
58void (*pm_power_off)(void);
59EXPORT_SYMBOL(pm_power_off);
60
61/*
62 * we use this if we don't have any better idle routine
63 */
64static void default_idle(void)
65{
66 local_irq_disable();
67 if (!need_resched())
68 safe_halt();
69 else
70 local_irq_enable();
71}
72
73/*
74 * the idle thread
75 * - there's no useful work to be done, so just try to conserve power and have
76 * a low exit latency (ie sit in a loop waiting for somebody to say that
77 * they'd like to reschedule)
78 */
79void cpu_idle(void)
80{
81 int cpu = smp_processor_id();
82
83 /* endless idle loop with no priority at all */
84 for (;;) {
85 while (!need_resched()) {
86 void (*idle)(void);
87
88 smp_rmb();
89 idle = pm_idle;
90 if (!idle)
91 idle = default_idle;
92
93 irq_stat[cpu].idle_timestamp = jiffies;
94 idle();
95 }
96
97 preempt_enable_no_resched();
98 schedule();
99 preempt_disable();
100 }
101}
102
103void release_segments(struct mm_struct *mm)
104{
105}
106
107void machine_restart(char *cmd)
108{
109#ifdef CONFIG_GDBSTUB
110 gdbstub_exit(0);
111#endif
112
113#ifdef mn10300_unit_hard_reset
114 mn10300_unit_hard_reset();
115#else
116 mn10300_proc_hard_reset();
117#endif
118}
119
120void machine_halt(void)
121{
122#ifdef CONFIG_GDBSTUB
123 gdbstub_exit(0);
124#endif
125}
126
127void machine_power_off(void)
128{
129#ifdef CONFIG_GDBSTUB
130 gdbstub_exit(0);
131#endif
132}
133
134void show_regs(struct pt_regs *regs)
135{
136}
137
138/*
139 * create a kernel thread
140 */
141int kernel_thread(int (*fn)(void *), void *arg, unsigned long flags)
142{
143 struct pt_regs regs;
144
145 memset(&regs, 0, sizeof(regs));
146
147 regs.a2 = (unsigned long) fn;
148 regs.d2 = (unsigned long) arg;
149 regs.pc = (unsigned long) kernel_thread_helper;
150 local_save_flags(regs.epsw);
151 regs.epsw |= EPSW_IE | EPSW_IM_7;
152
153 /* Ok, create the new process.. */
154 return do_fork(flags | CLONE_VM | CLONE_UNTRACED, 0, &regs, 0,
155 NULL, NULL);
156}
157
158/*
159 * free current thread data structures etc..
160 */
161void exit_thread(void)
162{
163 exit_fpu();
164}
165
166void flush_thread(void)
167{
168 flush_fpu();
169}
170
171void release_thread(struct task_struct *dead_task)
172{
173}
174
175/*
176 * we do not have to muck with descriptors here, that is
177 * done in switch_mm() as needed.
178 */
179void copy_segments(struct task_struct *p, struct mm_struct *new_mm)
180{
181}
182
183/*
184 * this gets called before we allocate a new thread and copy the current task
185 * into it so that we can store lazy state into memory
186 */
187void prepare_to_copy(struct task_struct *tsk)
188{
189 unlazy_fpu(tsk);
190}
191
192/*
193 * set up the kernel stack for a new thread and copy arch-specific thread
194 * control information
195 */
196int copy_thread(int nr, unsigned long clone_flags,
197 unsigned long c_usp, unsigned long ustk_size,
198 struct task_struct *p, struct pt_regs *kregs)
199{
200 struct pt_regs *c_uregs, *c_kregs, *uregs;
201 unsigned long c_ksp;
202
203 uregs = current->thread.uregs;
204
205 c_ksp = (unsigned long) task_stack_page(p) + THREAD_SIZE;
206
207 /* allocate the userspace exception frame and set it up */
208 c_ksp -= sizeof(struct pt_regs);
209 c_uregs = (struct pt_regs *) c_ksp;
210
211 p->thread.uregs = c_uregs;
212 *c_uregs = *uregs;
213 c_uregs->sp = c_usp;
214 c_uregs->epsw &= ~EPSW_FE; /* my FPU */
215
216 c_ksp -= 12; /* allocate function call ABI slack */
217
218 /* the new TLS pointer is passed in as arg #5 to sys_clone() */
219 if (clone_flags & CLONE_SETTLS)
220 c_uregs->e2 = __frame->d3;
221
222 /* set up the return kernel frame if called from kernel_thread() */
223 c_kregs = c_uregs;
224 if (kregs != uregs) {
225 c_ksp -= sizeof(struct pt_regs);
226 c_kregs = (struct pt_regs *) c_ksp;
227 *c_kregs = *kregs;
228 c_kregs->sp = c_usp;
229 c_kregs->next = c_uregs;
230#ifdef CONFIG_MN10300_CURRENT_IN_E2
231 c_kregs->e2 = (unsigned long) p; /* current */
232#endif
233
234 c_ksp -= 12; /* allocate function call ABI slack */
235 }
236
237 /* set up things up so the scheduler can start the new task */
238 p->thread.__frame = c_kregs;
239 p->thread.a3 = (unsigned long) c_kregs;
240 p->thread.sp = c_ksp;
241 p->thread.pc = (unsigned long) ret_from_fork;
242 p->thread.wchan = (unsigned long) ret_from_fork;
243 p->thread.usp = c_usp;
244
245 return 0;
246}
247
248/*
249 * clone a process
250 * - tlsptr is retrieved by copy_thread() from __frame->d3
251 */
252asmlinkage long sys_clone(unsigned long clone_flags, unsigned long newsp,
253 int __user *parent_tidptr, int __user *child_tidptr,
254 int __user *tlsptr)
255{
256 return do_fork(clone_flags, newsp ?: __frame->sp, __frame, 0,
257 parent_tidptr, child_tidptr);
258}
259
260asmlinkage long sys_fork(void)
261{
262 return do_fork(SIGCHLD, __frame->sp, __frame, 0, NULL, NULL);
263}
264
265asmlinkage long sys_vfork(void)
266{
267 return do_fork(CLONE_VFORK | CLONE_VM | SIGCHLD, __frame->sp, __frame,
268 0, NULL, NULL);
269}
270
271asmlinkage long sys_execve(char __user *name,
272 char __user * __user *argv,
273 char __user * __user *envp)
274{
275 char *filename;
276 int error;
277
278 lock_kernel();
279
280 filename = getname(name);
281 error = PTR_ERR(filename);
282 if (!IS_ERR(filename)) {
283 error = do_execve(filename, argv, envp, __frame);
284 if (error == 0)
285 current->ptrace &= ~PT_DTRACE;
286
287 putname(filename);
288 }
289
290 unlock_kernel();
291 return error;
292}
293
294unsigned long get_wchan(struct task_struct *p)
295{
296 return p->thread.wchan;
297}
diff --git a/arch/mn10300/kernel/profile-low.S b/arch/mn10300/kernel/profile-low.S
new file mode 100644
index 000000000000..94ffac12d02d
--- /dev/null
+++ b/arch/mn10300/kernel/profile-low.S
@@ -0,0 +1,72 @@
1###############################################################################
2#
3# Fast profiling interrupt handler
4#
5# Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
6# Written by David Howells (dhowells@redhat.com)
7#
8# This program is free software; you can redistribute it and/or
9# modify it under the terms of the GNU General Public Licence
10# as published by the Free Software Foundation; either version
11# 2 of the Licence, or (at your option) any later version.
12#
13###############################################################################
14#include <linux/sys.h>
15#include <linux/linkage.h>
16#include <asm/segment.h>
17#include <asm/smp.h>
18#include <asm/intctl-regs.h>
19#include <asm/timer-regs.h>
20
21#define pi break
22
23 .balign 4
24counter:
25 .long -1
26
27###############################################################################
28#
29# Profiling interrupt entry point
30# - intended to run at interrupt priority 1
31#
32###############################################################################
33ENTRY(profile_handler)
34 movm [d2,d3,a2],(sp)
35
36 # ignore userspace
37 mov (12,sp),d2
38 and EPSW_nSL,d2
39 bne out
40
41 # do nothing if there's no buffer
42 mov (prof_buffer),a2
43 and a2,a2
44 beq out
45 or 0x20000000,a2
46
47 # calculate relative position in text segment
48 mov (16,sp),d2
49 sub _stext,d2
50 mov (prof_shift),d3
51 lsr d3,d2
52 mov (prof_len),d3
53 cmp d3,d2
54 bcc outside_text
55
56 # increment the appropriate profile bucket
57do_inc:
58 asl2 d2
59 mov (a2,d2),d3
60 inc d3
61 mov d3,(a2,d2)
62out:
63 mov GxICR_DETECT,d2
64 movbu d2,(TM11ICR) # ACK the interrupt
65 movbu (TM11ICR),d2
66 movm (sp),[d2,d3,a2]
67 rti
68
69outside_text:
70 sub 1,d3
71 mov d3,d2
72 bra do_inc
diff --git a/arch/mn10300/kernel/profile.c b/arch/mn10300/kernel/profile.c
new file mode 100644
index 000000000000..20d7d0306b16
--- /dev/null
+++ b/arch/mn10300/kernel/profile.c
@@ -0,0 +1,51 @@
1/* MN10300 Profiling setup
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11
12/*
13 * initialise the profiling if enabled
14 * - using with gdbstub will give anomalous results
15 * - can't be used with gdbstub if running at IRQ priority 0
16 */
17static __init int profile_init(void)
18{
19 u16 tmp;
20
21 if (!prof_buffer)
22 return 0;
23
24 /* use timer 11 to drive the profiling interrupts */
25 set_intr_stub(EXCEP_IRQ_LEVEL0, profile_handler);
26
27 /* set IRQ priority at which to run */
28 set_intr_level(TM11IRQ, GxICR_LEVEL_0);
29
30 /* set up timer 11
31 * - source: (IOCLK 33MHz)*2 = 66MHz
32 * - frequency: (33330000*2) / 8 / 20625 = 202Hz
33 */
34 TM11BR = 20625 - 1;
35 TM11MD = TM8MD_SRC_IOCLK_8;
36 TM11MD |= TM8MD_INIT_COUNTER;
37 TM11MD &= ~TM8MD_INIT_COUNTER;
38 TM11MD |= TM8MD_COUNT_ENABLE;
39
40 TM11ICR |= GxICR_ENABLE;
41 tmp = TM11ICR;
42
43 printk(KERN_INFO "Profiling initiated on timer 11, priority 0, %uHz\n",
44 mn10300_ioclk / 8 / (TM11BR + 1));
45 printk(KERN_INFO "Profile histogram stored %p-%p\n",
46 prof_buffer, (u8 *)(prof_buffer + prof_len) - 1);
47
48 return 0;
49}
50
51__initcall(profile_init);
diff --git a/arch/mn10300/kernel/ptrace.c b/arch/mn10300/kernel/ptrace.c
new file mode 100644
index 000000000000..d6d6cdc75c52
--- /dev/null
+++ b/arch/mn10300/kernel/ptrace.c
@@ -0,0 +1,379 @@
1/* MN10300 Process tracing
2 *
3 * Copyright (C) 2007 Matsushita Electric Industrial Co., Ltd.
4 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
5 * Modified by David Howells (dhowells@redhat.com)
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public Licence
9 * as published by the Free Software Foundation; either version
10 * 2 of the Licence, or (at your option) any later version.
11 */
12#include <linux/kernel.h>
13#include <linux/sched.h>
14#include <linux/mm.h>
15#include <linux/smp.h>
16#include <linux/smp_lock.h>
17#include <linux/errno.h>
18#include <linux/ptrace.h>
19#include <linux/user.h>
20#include <asm/uaccess.h>
21#include <asm/pgtable.h>
22#include <asm/system.h>
23#include <asm/processor.h>
24#include <asm/cacheflush.h>
25#include <asm/fpu.h>
26#include <asm/asm-offsets.h>
27
28/*
29 * translate ptrace register IDs into struct pt_regs offsets
30 */
31static const u8 ptrace_regid_to_frame[] = {
32 [PT_A3 << 2] = REG_A3,
33 [PT_A2 << 2] = REG_A2,
34 [PT_D3 << 2] = REG_D3,
35 [PT_D2 << 2] = REG_D2,
36 [PT_MCVF << 2] = REG_MCVF,
37 [PT_MCRL << 2] = REG_MCRL,
38 [PT_MCRH << 2] = REG_MCRH,
39 [PT_MDRQ << 2] = REG_MDRQ,
40 [PT_E1 << 2] = REG_E1,
41 [PT_E0 << 2] = REG_E0,
42 [PT_E7 << 2] = REG_E7,
43 [PT_E6 << 2] = REG_E6,
44 [PT_E5 << 2] = REG_E5,
45 [PT_E4 << 2] = REG_E4,
46 [PT_E3 << 2] = REG_E3,
47 [PT_E2 << 2] = REG_E2,
48 [PT_SP << 2] = REG_SP,
49 [PT_LAR << 2] = REG_LAR,
50 [PT_LIR << 2] = REG_LIR,
51 [PT_MDR << 2] = REG_MDR,
52 [PT_A1 << 2] = REG_A1,
53 [PT_A0 << 2] = REG_A0,
54 [PT_D1 << 2] = REG_D1,
55 [PT_D0 << 2] = REG_D0,
56 [PT_ORIG_D0 << 2] = REG_ORIG_D0,
57 [PT_EPSW << 2] = REG_EPSW,
58 [PT_PC << 2] = REG_PC,
59};
60
61static inline int get_stack_long(struct task_struct *task, int offset)
62{
63 return *(unsigned long *)
64 ((unsigned long) task->thread.uregs + offset);
65}
66
67/*
68 * this routine will put a word on the processes privileged stack.
69 * the offset is how far from the base addr as stored in the TSS.
70 * this routine assumes that all the privileged stacks are in our
71 * data space.
72 */
73static inline
74int put_stack_long(struct task_struct *task, int offset, unsigned long data)
75{
76 unsigned long stack;
77
78 stack = (unsigned long) task->thread.uregs + offset;
79 *(unsigned long *) stack = data;
80 return 0;
81}
82
83static inline unsigned long get_fpregs(struct fpu_state_struct *buf,
84 struct task_struct *tsk)
85{
86 return __copy_to_user(buf, &tsk->thread.fpu_state,
87 sizeof(struct fpu_state_struct));
88}
89
90static inline unsigned long set_fpregs(struct task_struct *tsk,
91 struct fpu_state_struct *buf)
92{
93 return __copy_from_user(&tsk->thread.fpu_state, buf,
94 sizeof(struct fpu_state_struct));
95}
96
97static inline void fpsave_init(struct task_struct *task)
98{
99 memset(&task->thread.fpu_state, 0, sizeof(struct fpu_state_struct));
100}
101
102/*
103 * make sure the single step bit is not set
104 */
105void ptrace_disable(struct task_struct *child)
106{
107#ifndef CONFIG_MN10300_USING_JTAG
108 struct user *dummy = NULL;
109 long tmp;
110
111 tmp = get_stack_long(child, (unsigned long) &dummy->regs.epsw);
112 tmp &= ~EPSW_T;
113 put_stack_long(child, (unsigned long) &dummy->regs.epsw, tmp);
114#endif
115}
116
117/*
118 * set the single step bit
119 */
120void ptrace_enable(struct task_struct *child)
121{
122#ifndef CONFIG_MN10300_USING_JTAG
123 struct user *dummy = NULL;
124 long tmp;
125
126 tmp = get_stack_long(child, (unsigned long) &dummy->regs.epsw);
127 tmp |= EPSW_T;
128 put_stack_long(child, (unsigned long) &dummy->regs.epsw, tmp);
129#endif
130}
131
132/*
133 * handle the arch-specific side of process tracing
134 */
135long arch_ptrace(struct task_struct *child, long request, long addr, long data)
136{
137 struct fpu_state_struct fpu_state;
138 int i, ret;
139
140 switch (request) {
141 /* read the word at location addr. */
142 case PTRACE_PEEKTEXT: {
143 unsigned long tmp;
144 int copied;
145
146 copied = access_process_vm(child, addr, &tmp, sizeof(tmp), 0);
147 ret = -EIO;
148 if (copied != sizeof(tmp))
149 break;
150 ret = put_user(tmp, (unsigned long *) data);
151 break;
152 }
153
154 /* read the word at location addr. */
155 case PTRACE_PEEKDATA: {
156 unsigned long tmp;
157 int copied;
158
159 copied = access_process_vm(child, addr, &tmp, sizeof(tmp), 0);
160 ret = -EIO;
161 if (copied != sizeof(tmp))
162 break;
163 ret = put_user(tmp, (unsigned long *) data);
164 break;
165 }
166
167 /* read the word at location addr in the USER area. */
168 case PTRACE_PEEKUSR: {
169 unsigned long tmp;
170
171 ret = -EIO;
172 if ((addr & 3) || addr < 0 ||
173 addr > sizeof(struct user) - 3)
174 break;
175
176 tmp = 0; /* Default return condition */
177 if (addr < NR_PTREGS << 2)
178 tmp = get_stack_long(child,
179 ptrace_regid_to_frame[addr]);
180 ret = put_user(tmp, (unsigned long *) data);
181 break;
182 }
183
184 /* write the word at location addr. */
185 case PTRACE_POKETEXT:
186 case PTRACE_POKEDATA:
187 if (access_process_vm(child, addr, &data, sizeof(data), 1) ==
188 sizeof(data))
189 ret = 0;
190 else
191 ret = -EIO;
192 break;
193
194 /* write the word at location addr in the USER area */
195 case PTRACE_POKEUSR:
196 ret = -EIO;
197 if ((addr & 3) || addr < 0 ||
198 addr > sizeof(struct user) - 3)
199 break;
200
201 ret = 0;
202 if (addr < NR_PTREGS << 2)
203 ret = put_stack_long(child, ptrace_regid_to_frame[addr],
204 data);
205 break;
206
207 /* continue and stop at next (return from) syscall */
208 case PTRACE_SYSCALL:
209 /* restart after signal. */
210 case PTRACE_CONT:
211 ret = -EIO;
212 if ((unsigned long) data > _NSIG)
213 break;
214 if (request == PTRACE_SYSCALL)
215 set_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
216 else
217 clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
218 child->exit_code = data;
219 ptrace_disable(child);
220 wake_up_process(child);
221 ret = 0;
222 break;
223
224 /*
225 * make the child exit
226 * - the best I can do is send it a sigkill
227 * - perhaps it should be put in the status that it wants to
228 * exit
229 */
230 case PTRACE_KILL:
231 ret = 0;
232 if (child->exit_state == EXIT_ZOMBIE) /* already dead */
233 break;
234 child->exit_code = SIGKILL;
235 clear_tsk_thread_flag(child, TIF_SINGLESTEP);
236 ptrace_disable(child);
237 wake_up_process(child);
238 break;
239
240 case PTRACE_SINGLESTEP: /* set the trap flag. */
241#ifndef CONFIG_MN10300_USING_JTAG
242 ret = -EIO;
243 if ((unsigned long) data > _NSIG)
244 break;
245 clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
246 ptrace_enable(child);
247 child->exit_code = data;
248 wake_up_process(child);
249 ret = 0;
250#else
251 ret = -EINVAL;
252#endif
253 break;
254
255 case PTRACE_DETACH: /* detach a process that was attached. */
256 ret = ptrace_detach(child, data);
257 break;
258
259 /* Get all gp regs from the child. */
260 case PTRACE_GETREGS: {
261 unsigned long tmp;
262
263 if (!access_ok(VERIFY_WRITE, (unsigned *) data, NR_PTREGS << 2)) {
264 ret = -EIO;
265 break;
266 }
267
268 for (i = 0; i < NR_PTREGS << 2; i += 4) {
269 tmp = get_stack_long(child, ptrace_regid_to_frame[i]);
270 __put_user(tmp, (unsigned long *) data);
271 data += sizeof(tmp);
272 }
273 ret = 0;
274 break;
275 }
276
277 case PTRACE_SETREGS: { /* Set all gp regs in the child. */
278 unsigned long tmp;
279
280 if (!access_ok(VERIFY_READ, (unsigned long *)data,
281 sizeof(struct pt_regs))) {
282 ret = -EIO;
283 break;
284 }
285
286 for (i = 0; i < NR_PTREGS << 2; i += 4) {
287 __get_user(tmp, (unsigned long *) data);
288 put_stack_long(child, ptrace_regid_to_frame[i], tmp);
289 data += sizeof(tmp);
290 }
291 ret = 0;
292 break;
293 }
294
295 case PTRACE_GETFPREGS: { /* Get the child FPU state. */
296 if (is_using_fpu(child)) {
297 unlazy_fpu(child);
298 fpu_state = child->thread.fpu_state;
299 } else {
300 memset(&fpu_state, 0, sizeof(fpu_state));
301 }
302
303 ret = -EIO;
304 if (copy_to_user((void *) data, &fpu_state,
305 sizeof(fpu_state)) == 0)
306 ret = 0;
307 break;
308 }
309
310 case PTRACE_SETFPREGS: { /* Set the child FPU state. */
311 ret = -EFAULT;
312 if (copy_from_user(&fpu_state, (const void *) data,
313 sizeof(fpu_state)) == 0) {
314 fpu_kill_state(child);
315 child->thread.fpu_state = fpu_state;
316 set_using_fpu(child);
317 ret = 0;
318 }
319 break;
320 }
321
322 case PTRACE_SETOPTIONS: {
323 if (data & PTRACE_O_TRACESYSGOOD)
324 child->ptrace |= PT_TRACESYSGOOD;
325 else
326 child->ptrace &= ~PT_TRACESYSGOOD;
327 ret = 0;
328 break;
329 }
330
331 default:
332 ret = -EIO;
333 break;
334 }
335
336 return ret;
337}
338
339/*
340 * notification of system call entry/exit
341 * - triggered by current->work.syscall_trace
342 */
343asmlinkage void do_syscall_trace(struct pt_regs *regs, int entryexit)
344{
345#if 0
346 /* just in case... */
347 printk(KERN_DEBUG "[%d] syscall_%lu(%lx,%lx,%lx,%lx) = %lx\n",
348 current->pid,
349 regs->orig_d0,
350 regs->a0,
351 regs->d1,
352 regs->a3,
353 regs->a2,
354 regs->d0);
355 return;
356#endif
357
358 if (!test_thread_flag(TIF_SYSCALL_TRACE) &&
359 !test_thread_flag(TIF_SINGLESTEP))
360 return;
361 if (!(current->ptrace & PT_PTRACED))
362 return;
363
364 /* the 0x80 provides a way for the tracing parent to distinguish
365 between a syscall stop and SIGTRAP delivery */
366 ptrace_notify(SIGTRAP |
367 ((current->ptrace & PT_TRACESYSGOOD) &&
368 !test_thread_flag(TIF_SINGLESTEP) ? 0x80 : 0));
369
370 /*
371 * this isn't the same as continuing with a signal, but it will do
372 * for normal use. strace only continues with a signal if the
373 * stopping signal is not SIGTRAP. -brl
374 */
375 if (current->exit_code) {
376 send_sig(current->exit_code, current, 1);
377 current->exit_code = 0;
378 }
379}
diff --git a/arch/mn10300/kernel/rtc.c b/arch/mn10300/kernel/rtc.c
new file mode 100644
index 000000000000..042f792d8430
--- /dev/null
+++ b/arch/mn10300/kernel/rtc.c
@@ -0,0 +1,173 @@
1/* MN10300 RTC management
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#include <linux/kernel.h>
12#include <linux/module.h>
13#include <linux/init.h>
14#include <linux/mc146818rtc.h>
15#include <linux/bcd.h>
16#include <linux/timex.h>
17#include <asm/rtc-regs.h>
18#include <asm/rtc.h>
19
20DEFINE_SPINLOCK(rtc_lock);
21EXPORT_SYMBOL(rtc_lock);
22
23/* last time the RTC got updated */
24static long last_rtc_update;
25
26/* time for RTC to update itself in ioclks */
27static unsigned long mn10300_rtc_update_period;
28
29/*
30 * read the current RTC time
31 */
32unsigned long __init get_initial_rtc_time(void)
33{
34 struct rtc_time tm;
35
36 get_rtc_time(&tm);
37
38 return mktime(tm.tm_year, tm.tm_mon, tm.tm_mday,
39 tm.tm_hour, tm.tm_min, tm.tm_sec);
40}
41
42/*
43 * In order to set the CMOS clock precisely, set_rtc_mmss has to be called 500
44 * ms after the second nowtime has started, because when nowtime is written
45 * into the registers of the CMOS clock, it will jump to the next second
46 * precisely 500 ms later. Check the Motorola MC146818A or Dallas DS12887 data
47 * sheet for details.
48 *
49 * BUG: This routine does not handle hour overflow properly; it just
50 * sets the minutes. Usually you'll only notice that after reboot!
51 */
52static int set_rtc_mmss(unsigned long nowtime)
53{
54 unsigned char save_control, save_freq_select;
55 int retval = 0;
56 int real_seconds, real_minutes, cmos_minutes;
57
58 /* gets recalled with irq locally disabled */
59 spin_lock(&rtc_lock);
60 save_control = CMOS_READ(RTC_CONTROL); /* tell the clock it's being
61 * set */
62 CMOS_WRITE(save_control | RTC_SET, RTC_CONTROL);
63
64 save_freq_select = CMOS_READ(RTC_FREQ_SELECT); /* stop and reset
65 * prescaler */
66 CMOS_WRITE(save_freq_select | RTC_DIV_RESET2, RTC_FREQ_SELECT);
67
68 cmos_minutes = CMOS_READ(RTC_MINUTES);
69 if (!(save_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD)
70 BCD_TO_BIN(cmos_minutes);
71
72 /*
73 * since we're only adjusting minutes and seconds,
74 * don't interfere with hour overflow. This avoids
75 * messing with unknown time zones but requires your
76 * RTC not to be off by more than 15 minutes
77 */
78 real_seconds = nowtime % 60;
79 real_minutes = nowtime / 60;
80 if (((abs(real_minutes - cmos_minutes) + 15) / 30) & 1)
81 /* correct for half hour time zone */
82 real_minutes += 30;
83 real_minutes %= 60;
84
85 if (abs(real_minutes - cmos_minutes) < 30) {
86 if (!(save_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
87 BIN_TO_BCD(real_seconds);
88 BIN_TO_BCD(real_minutes);
89 }
90 CMOS_WRITE(real_seconds, RTC_SECONDS);
91 CMOS_WRITE(real_minutes, RTC_MINUTES);
92 } else {
93 printk(KERN_WARNING
94 "set_rtc_mmss: can't update from %d to %d\n",
95 cmos_minutes, real_minutes);
96 retval = -1;
97 }
98
99 /* The following flags have to be released exactly in this order,
100 * otherwise the DS12887 (popular MC146818A clone with integrated
101 * battery and quartz) will not reset the oscillator and will not
102 * update precisely 500 ms later. You won't find this mentioned in
103 * the Dallas Semiconductor data sheets, but who believes data
104 * sheets anyway ... -- Markus Kuhn
105 */
106 CMOS_WRITE(save_control, RTC_CONTROL);
107 CMOS_WRITE(save_freq_select, RTC_FREQ_SELECT);
108 spin_unlock(&rtc_lock);
109
110 return retval;
111}
112
113void check_rtc_time(void)
114{
115 /* the RTC clock just finished ticking over again this second
116 * - if we have an externally synchronized Linux clock, then update
117 * RTC clock accordingly every ~11 minutes. set_rtc_mmss() has to be
118 * called as close as possible to 500 ms before the new second starts.
119 */
120 if ((time_status & STA_UNSYNC) == 0 &&
121 xtime.tv_sec > last_rtc_update + 660 &&
122 xtime.tv_nsec / 1000 >= 500000 - ((unsigned) TICK_SIZE) / 2 &&
123 xtime.tv_nsec / 1000 <= 500000 + ((unsigned) TICK_SIZE) / 2
124 ) {
125 if (set_rtc_mmss(xtime.tv_sec) == 0)
126 last_rtc_update = xtime.tv_sec;
127 else
128 /* do it again in 60s */
129 last_rtc_update = xtime.tv_sec - 600;
130 }
131}
132
133/*
134 * calibrate the TSC clock against the RTC
135 */
136void __init calibrate_clock(void)
137{
138 unsigned long count0, counth, count1;
139 unsigned char status;
140
141 /* make sure the RTC is running and is set to operate in 24hr mode */
142 status = RTSRC;
143 RTCRB |= RTCRB_SET;
144 RTCRB |= RTCRB_TM_24HR;
145 RTCRA |= RTCRA_DVR;
146 RTCRA &= ~RTCRA_DVR;
147 RTCRB &= ~RTCRB_SET;
148
149 /* work out the clock speed by counting clock cycles between ends of
150 * the RTC update cycle - track the RTC through one complete update
151 * cycle (1 second)
152 */
153 startup_timestamp_counter();
154
155 while (!(RTCRA & RTCRA_UIP)) {}
156 while ((RTCRA & RTCRA_UIP)) {}
157
158 count0 = TMTSCBC;
159
160 while (!(RTCRA & RTCRA_UIP)) {}
161
162 counth = TMTSCBC;
163
164 while ((RTCRA & RTCRA_UIP)) {}
165
166 count1 = TMTSCBC;
167
168 shutdown_timestamp_counter();
169
170 MN10300_TSCCLK = count0 - count1; /* the timers count down */
171 mn10300_rtc_update_period = counth - count1;
172 MN10300_TSC_PER_HZ = MN10300_TSCCLK / HZ;
173}
diff --git a/arch/mn10300/kernel/semaphore.c b/arch/mn10300/kernel/semaphore.c
new file mode 100644
index 000000000000..9153c4039fd2
--- /dev/null
+++ b/arch/mn10300/kernel/semaphore.c
@@ -0,0 +1,149 @@
1/* MN10300 Semaphore implementation
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#include <linux/sched.h>
12#include <linux/module.h>
13#include <asm/semaphore.h>
14
15struct sem_waiter {
16 struct list_head list;
17 struct task_struct *task;
18};
19
20#if SEMAPHORE_DEBUG
21void semtrace(struct semaphore *sem, const char *str)
22{
23 if (sem->debug)
24 printk(KERN_DEBUG "[%d] %s({%d,%d})\n",
25 current->pid,
26 str,
27 atomic_read(&sem->count),
28 list_empty(&sem->wait_list) ? 0 : 1);
29}
30#else
31#define semtrace(SEM, STR) do { } while (0)
32#endif
33
34/*
35 * wait for a token to be granted from a semaphore
36 * - entered with lock held and interrupts disabled
37 */
38void __down(struct semaphore *sem, unsigned long flags)
39{
40 struct task_struct *tsk = current;
41 struct sem_waiter waiter;
42
43 semtrace(sem, "Entering __down");
44
45 /* set up my own style of waitqueue */
46 waiter.task = tsk;
47 get_task_struct(tsk);
48
49 list_add_tail(&waiter.list, &sem->wait_list);
50
51 /* we don't need to touch the semaphore struct anymore */
52 spin_unlock_irqrestore(&sem->wait_lock, flags);
53
54 /* wait to be given the semaphore */
55 set_task_state(tsk, TASK_UNINTERRUPTIBLE);
56
57 for (;;) {
58 if (!waiter.task)
59 break;
60 schedule();
61 set_task_state(tsk, TASK_UNINTERRUPTIBLE);
62 }
63
64 tsk->state = TASK_RUNNING;
65 semtrace(sem, "Leaving __down");
66}
67EXPORT_SYMBOL(__down);
68
69/*
70 * interruptibly wait for a token to be granted from a semaphore
71 * - entered with lock held and interrupts disabled
72 */
73int __down_interruptible(struct semaphore *sem, unsigned long flags)
74{
75 struct task_struct *tsk = current;
76 struct sem_waiter waiter;
77 int ret;
78
79 semtrace(sem, "Entering __down_interruptible");
80
81 /* set up my own style of waitqueue */
82 waiter.task = tsk;
83 get_task_struct(tsk);
84
85 list_add_tail(&waiter.list, &sem->wait_list);
86
87 /* we don't need to touch the semaphore struct anymore */
88 set_task_state(tsk, TASK_INTERRUPTIBLE);
89
90 spin_unlock_irqrestore(&sem->wait_lock, flags);
91
92 /* wait to be given the semaphore */
93 ret = 0;
94 for (;;) {
95 if (!waiter.task)
96 break;
97 if (unlikely(signal_pending(current)))
98 goto interrupted;
99 schedule();
100 set_task_state(tsk, TASK_INTERRUPTIBLE);
101 }
102
103 out:
104 tsk->state = TASK_RUNNING;
105 semtrace(sem, "Leaving __down_interruptible");
106 return ret;
107
108 interrupted:
109 spin_lock_irqsave(&sem->wait_lock, flags);
110 list_del(&waiter.list);
111 spin_unlock_irqrestore(&sem->wait_lock, flags);
112
113 ret = 0;
114 if (!waiter.task) {
115 put_task_struct(current);
116 ret = -EINTR;
117 }
118 goto out;
119}
120EXPORT_SYMBOL(__down_interruptible);
121
122/*
123 * release a single token back to a semaphore
124 * - entered with lock held and interrupts disabled
125 */
126void __up(struct semaphore *sem)
127{
128 struct task_struct *tsk;
129 struct sem_waiter *waiter;
130
131 semtrace(sem, "Entering __up");
132
133 /* grant the token to the process at the front of the queue */
134 waiter = list_entry(sem->wait_list.next, struct sem_waiter, list);
135
136 /* We must be careful not to touch 'waiter' after we set ->task = NULL.
137 * It is an allocated on the waiter's stack and may become invalid at
138 * any time after that point (due to a wakeup from another source).
139 */
140 list_del_init(&waiter->list);
141 tsk = waiter->task;
142 smp_mb();
143 waiter->task = NULL;
144 wake_up_process(tsk);
145 put_task_struct(tsk);
146
147 semtrace(sem, "Leaving __up");
148}
149EXPORT_SYMBOL(__up);
diff --git a/arch/mn10300/kernel/setup.c b/arch/mn10300/kernel/setup.c
new file mode 100644
index 000000000000..6b7ce2636851
--- /dev/null
+++ b/arch/mn10300/kernel/setup.c
@@ -0,0 +1,298 @@
1/* MN10300 Arch-specific initialisation
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#include <linux/errno.h>
12#include <linux/sched.h>
13#include <linux/kernel.h>
14#include <linux/mm.h>
15#include <linux/stddef.h>
16#include <linux/unistd.h>
17#include <linux/ptrace.h>
18#include <linux/slab.h>
19#include <linux/user.h>
20#include <linux/a.out.h>
21#include <linux/tty.h>
22#include <linux/ioport.h>
23#include <linux/delay.h>
24#include <linux/init.h>
25#include <linux/bootmem.h>
26#include <linux/seq_file.h>
27#include <asm/processor.h>
28#include <linux/console.h>
29#include <asm/uaccess.h>
30#include <asm/system.h>
31#include <asm/setup.h>
32#include <asm/io.h>
33#include <asm/smp.h>
34#include <asm/proc/proc.h>
35#include <asm/busctl-regs.h>
36#include <asm/fpu.h>
37#include <asm/sections.h>
38
39struct mn10300_cpuinfo boot_cpu_data;
40
41/* For PCI or other memory-mapped resources */
42unsigned long pci_mem_start = 0x18000000;
43
44char redboot_command_line[COMMAND_LINE_SIZE] =
45 "console=ttyS0,115200 root=/dev/mtdblock3 rw";
46
47char __initdata redboot_platform_name[COMMAND_LINE_SIZE];
48
49static struct resource code_resource = {
50 .start = 0x100000,
51 .end = 0,
52 .name = "Kernel code",
53};
54
55static struct resource data_resource = {
56 .start = 0,
57 .end = 0,
58 .name = "Kernel data",
59};
60
61static unsigned long __initdata phys_memory_base;
62static unsigned long __initdata phys_memory_end;
63static unsigned long __initdata memory_end;
64unsigned long memory_size;
65
66struct thread_info *__current_ti = &init_thread_union.thread_info;
67struct task_struct *__current = &init_task;
68
69#define mn10300_known_cpus 3
70static const char *const mn10300_cputypes[] = {
71 "am33v1",
72 "am33v2",
73 "am34v1",
74 "unknown"
75};
76
77/*
78 *
79 */
80static void __init parse_mem_cmdline(char **cmdline_p)
81{
82 char *from, *to, c;
83
84 /* save unparsed command line copy for /proc/cmdline */
85 strcpy(boot_command_line, redboot_command_line);
86
87 /* see if there's an explicit memory size option */
88 from = redboot_command_line;
89 to = redboot_command_line;
90 c = ' ';
91
92 for (;;) {
93 if (c == ' ' && !memcmp(from, "mem=", 4)) {
94 if (to != redboot_command_line)
95 to--;
96 memory_size = memparse(from + 4, &from);
97 }
98
99 c = *(from++);
100 if (!c)
101 break;
102
103 *(to++) = c;
104 }
105
106 *to = '\0';
107 *cmdline_p = redboot_command_line;
108
109 if (memory_size == 0)
110 panic("Memory size not known\n");
111
112 memory_end = (unsigned long) CONFIG_KERNEL_RAM_BASE_ADDRESS +
113 memory_size;
114 if (memory_end > phys_memory_end)
115 memory_end = phys_memory_end;
116}
117
118/*
119 * architecture specific setup
120 */
121void __init setup_arch(char **cmdline_p)
122{
123 unsigned long bootmap_size;
124 unsigned long kstart_pfn, start_pfn, free_pfn, end_pfn;
125
126 cpu_init();
127 unit_setup();
128 parse_mem_cmdline(cmdline_p);
129
130 init_mm.start_code = (unsigned long)&_text;
131 init_mm.end_code = (unsigned long) &_etext;
132 init_mm.end_data = (unsigned long) &_edata;
133 init_mm.brk = (unsigned long) &_end;
134
135 code_resource.start = virt_to_bus(&_text);
136 code_resource.end = virt_to_bus(&_etext)-1;
137 data_resource.start = virt_to_bus(&_etext);
138 data_resource.end = virt_to_bus(&_edata)-1;
139
140#define PFN_UP(x) (((x) + PAGE_SIZE-1) >> PAGE_SHIFT)
141#define PFN_DOWN(x) ((x) >> PAGE_SHIFT)
142#define PFN_PHYS(x) ((x) << PAGE_SHIFT)
143
144 start_pfn = (CONFIG_KERNEL_RAM_BASE_ADDRESS >> PAGE_SHIFT);
145 kstart_pfn = PFN_UP(__pa(&_text));
146 free_pfn = PFN_UP(__pa(&_end));
147 end_pfn = PFN_DOWN(__pa(memory_end));
148
149 bootmap_size = init_bootmem_node(&contig_page_data,
150 free_pfn,
151 start_pfn,
152 end_pfn);
153
154 if (kstart_pfn > start_pfn)
155 free_bootmem(PFN_PHYS(start_pfn),
156 PFN_PHYS(kstart_pfn - start_pfn));
157
158 free_bootmem(PFN_PHYS(free_pfn),
159 PFN_PHYS(end_pfn - free_pfn));
160
161 /* If interrupt vector table is in main ram, then we need to
162 reserve the page it is occupying. */
163 if (CONFIG_INTERRUPT_VECTOR_BASE >= CONFIG_KERNEL_RAM_BASE_ADDRESS &&
164 CONFIG_INTERRUPT_VECTOR_BASE < memory_end)
165 reserve_bootmem(CONFIG_INTERRUPT_VECTOR_BASE, 1,
166 BOOTMEM_DEFAULT);
167
168 reserve_bootmem(PAGE_ALIGN(PFN_PHYS(free_pfn)), bootmap_size,
169 BOOTMEM_DEFAULT);
170
171#ifdef CONFIG_VT
172#if defined(CONFIG_VGA_CONSOLE)
173 conswitchp = &vga_con;
174#elif defined(CONFIG_DUMMY_CONSOLE)
175 conswitchp = &dummy_con;
176#endif
177#endif
178
179 paging_init();
180}
181
182/*
183 * perform CPU initialisation
184 */
185void __init cpu_init(void)
186{
187 unsigned long cpurev = CPUREV, type;
188 unsigned long base, size;
189
190 type = (CPUREV & CPUREV_TYPE) >> CPUREV_TYPE_S;
191 if (type > mn10300_known_cpus)
192 type = mn10300_known_cpus;
193
194 printk(KERN_INFO "Matsushita %s, rev %ld\n",
195 mn10300_cputypes[type],
196 (cpurev & CPUREV_REVISION) >> CPUREV_REVISION_S);
197
198 /* determine the memory size and base from the memory controller regs */
199 memory_size = 0;
200
201 base = SDBASE(0);
202 if (base & SDBASE_CE) {
203 size = (base & SDBASE_CBAM) << SDBASE_CBAM_SHIFT;
204 size = ~size + 1;
205 base &= SDBASE_CBA;
206
207 printk(KERN_INFO "SDRAM[0]: %luMb @%08lx\n", size >> 20, base);
208 memory_size += size;
209 phys_memory_base = base;
210 }
211
212 base = SDBASE(1);
213 if (base & SDBASE_CE) {
214 size = (base & SDBASE_CBAM) << SDBASE_CBAM_SHIFT;
215 size = ~size + 1;
216 base &= SDBASE_CBA;
217
218 printk(KERN_INFO "SDRAM[1]: %luMb @%08lx\n", size >> 20, base);
219 memory_size += size;
220 if (phys_memory_base == 0)
221 phys_memory_base = base;
222 }
223
224 phys_memory_end = phys_memory_base + memory_size;
225
226#ifdef CONFIG_FPU
227 fpu_init_state();
228#endif
229}
230
231/*
232 * Get CPU information for use by the procfs.
233 */
234static int show_cpuinfo(struct seq_file *m, void *v)
235{
236 unsigned long cpurev = CPUREV, type, icachesz, dcachesz;
237
238 type = (CPUREV & CPUREV_TYPE) >> CPUREV_TYPE_S;
239 if (type > mn10300_known_cpus)
240 type = mn10300_known_cpus;
241
242 icachesz =
243 ((cpurev & CPUREV_ICWAY ) >> CPUREV_ICWAY_S) *
244 ((cpurev & CPUREV_ICSIZE) >> CPUREV_ICSIZE_S) *
245 1024;
246
247 dcachesz =
248 ((cpurev & CPUREV_DCWAY ) >> CPUREV_DCWAY_S) *
249 ((cpurev & CPUREV_DCSIZE) >> CPUREV_DCSIZE_S) *
250 1024;
251
252 seq_printf(m,
253 "processor : 0\n"
254 "vendor_id : Matsushita\n"
255 "cpu core : %s\n"
256 "cpu rev : %lu\n"
257 "model name : " PROCESSOR_MODEL_NAME "\n"
258 "icache size: %lu\n"
259 "dcache size: %lu\n",
260 mn10300_cputypes[type],
261 (cpurev & CPUREV_REVISION) >> CPUREV_REVISION_S,
262 icachesz,
263 dcachesz
264 );
265
266 seq_printf(m,
267 "ioclk speed: %lu.%02luMHz\n"
268 "bogomips : %lu.%02lu\n\n",
269 MN10300_IOCLK / 1000000,
270 (MN10300_IOCLK / 10000) % 100,
271 loops_per_jiffy / (500000 / HZ),
272 (loops_per_jiffy / (5000 / HZ)) % 100
273 );
274
275 return 0;
276}
277
278static void *c_start(struct seq_file *m, loff_t *pos)
279{
280 return *pos < NR_CPUS ? cpu_data + *pos : NULL;
281}
282
283static void *c_next(struct seq_file *m, void *v, loff_t *pos)
284{
285 ++*pos;
286 return c_start(m, pos);
287}
288
289static void c_stop(struct seq_file *m, void *v)
290{
291}
292
293struct seq_operations cpuinfo_op = {
294 .start = c_start,
295 .next = c_next,
296 .stop = c_stop,
297 .show = show_cpuinfo,
298};
diff --git a/arch/mn10300/kernel/sigframe.h b/arch/mn10300/kernel/sigframe.h
new file mode 100644
index 000000000000..0decba28ae84
--- /dev/null
+++ b/arch/mn10300/kernel/sigframe.h
@@ -0,0 +1,33 @@
1/* MN10300 Signal frame definitions
2 *
3 * Copyright (C) 2007 Matsushita Electric Industrial Co., Ltd.
4 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11
12struct sigframe
13{
14 void (*pretcode)(void);
15 int sig;
16 struct sigcontext *psc;
17 struct sigcontext sc;
18 struct fpucontext fpuctx;
19 unsigned long extramask[_NSIG_WORDS-1];
20 char retcode[8];
21};
22
23struct rt_sigframe
24{
25 void (*pretcode)(void);
26 int sig;
27 struct siginfo *pinfo;
28 void *puc;
29 struct siginfo info;
30 struct ucontext uc;
31 struct fpucontext fpuctx;
32 char retcode[8];
33};
diff --git a/arch/mn10300/kernel/signal.c b/arch/mn10300/kernel/signal.c
new file mode 100644
index 000000000000..841ca9955a18
--- /dev/null
+++ b/arch/mn10300/kernel/signal.c
@@ -0,0 +1,564 @@
1/* MN10300 Signal handling
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11
12#include <linux/sched.h>
13#include <linux/mm.h>
14#include <linux/smp.h>
15#include <linux/smp_lock.h>
16#include <linux/kernel.h>
17#include <linux/signal.h>
18#include <linux/errno.h>
19#include <linux/wait.h>
20#include <linux/ptrace.h>
21#include <linux/unistd.h>
22#include <linux/stddef.h>
23#include <linux/tty.h>
24#include <linux/personality.h>
25#include <linux/suspend.h>
26#include <asm/cacheflush.h>
27#include <asm/ucontext.h>
28#include <asm/uaccess.h>
29#include <asm/fpu.h>
30#include "sigframe.h"
31
32#define DEBUG_SIG 0
33
34#define _BLOCKABLE (~(sigmask(SIGKILL) | sigmask(SIGSTOP)))
35
36/*
37 * atomically swap in the new signal mask, and wait for a signal.
38 */
39asmlinkage long sys_sigsuspend(int history0, int history1, old_sigset_t mask)
40{
41 mask &= _BLOCKABLE;
42 spin_lock_irq(&current->sighand->siglock);
43 current->saved_sigmask = current->blocked;
44 siginitset(&current->blocked, mask);
45 recalc_sigpending();
46 spin_unlock_irq(&current->sighand->siglock);
47
48 current->state = TASK_INTERRUPTIBLE;
49 schedule();
50 set_thread_flag(TIF_RESTORE_SIGMASK);
51 return -ERESTARTNOHAND;
52}
53
54/*
55 * set signal action syscall
56 */
57asmlinkage long sys_sigaction(int sig,
58 const struct old_sigaction __user *act,
59 struct old_sigaction __user *oact)
60{
61 struct k_sigaction new_ka, old_ka;
62 int ret;
63
64 if (act) {
65 old_sigset_t mask;
66 if (verify_area(VERIFY_READ, act, sizeof(*act)) ||
67 __get_user(new_ka.sa.sa_handler, &act->sa_handler) ||
68 __get_user(new_ka.sa.sa_restorer, &act->sa_restorer))
69 return -EFAULT;
70 __get_user(new_ka.sa.sa_flags, &act->sa_flags);
71 __get_user(mask, &act->sa_mask);
72 siginitset(&new_ka.sa.sa_mask, mask);
73 }
74
75 ret = do_sigaction(sig, act ? &new_ka : NULL, oact ? &old_ka : NULL);
76
77 if (!ret && oact) {
78 if (verify_area(VERIFY_WRITE, oact, sizeof(*oact)) ||
79 __put_user(old_ka.sa.sa_handler, &oact->sa_handler) ||
80 __put_user(old_ka.sa.sa_restorer, &oact->sa_restorer))
81 return -EFAULT;
82 __put_user(old_ka.sa.sa_flags, &oact->sa_flags);
83 __put_user(old_ka.sa.sa_mask.sig[0], &oact->sa_mask);
84 }
85
86 return ret;
87}
88
89/*
90 * set alternate signal stack syscall
91 */
92asmlinkage long sys_sigaltstack(const stack_t __user *uss, stack_t *uoss)
93{
94 return do_sigaltstack(uss, uoss, __frame->sp);
95}
96
97/*
98 * do a signal return; undo the signal stack.
99 */
100static int restore_sigcontext(struct pt_regs *regs,
101 struct sigcontext __user *sc, long *_d0)
102{
103 unsigned int err = 0;
104
105 if (is_using_fpu(current))
106 fpu_kill_state(current);
107
108#define COPY(x) err |= __get_user(regs->x, &sc->x)
109 COPY(d1); COPY(d2); COPY(d3);
110 COPY(a0); COPY(a1); COPY(a2); COPY(a3);
111 COPY(e0); COPY(e1); COPY(e2); COPY(e3);
112 COPY(e4); COPY(e5); COPY(e6); COPY(e7);
113 COPY(lar); COPY(lir);
114 COPY(mdr); COPY(mdrq);
115 COPY(mcvf); COPY(mcrl); COPY(mcrh);
116 COPY(sp); COPY(pc);
117#undef COPY
118
119 {
120 unsigned int tmpflags;
121#ifndef CONFIG_MN10300_USING_JTAG
122#define USER_EPSW (EPSW_FLAG_Z | EPSW_FLAG_N | EPSW_FLAG_C | EPSW_FLAG_V | \
123 EPSW_T | EPSW_nAR)
124#else
125#define USER_EPSW (EPSW_FLAG_Z | EPSW_FLAG_N | EPSW_FLAG_C | EPSW_FLAG_V | \
126 EPSW_nAR)
127#endif
128 err |= __get_user(tmpflags, &sc->epsw);
129 regs->epsw = (regs->epsw & ~USER_EPSW) |
130 (tmpflags & USER_EPSW);
131 regs->orig_d0 = -1; /* disable syscall checks */
132 }
133
134 {
135 struct fpucontext *buf;
136 err |= __get_user(buf, &sc->fpucontext);
137 if (buf) {
138 if (verify_area(VERIFY_READ, buf, sizeof(*buf)))
139 goto badframe;
140 err |= fpu_restore_sigcontext(buf);
141 }
142 }
143
144 err |= __get_user(*_d0, &sc->d0);
145 return err;
146
147badframe:
148 return 1;
149}
150
151/*
152 * standard signal return syscall
153 */
154asmlinkage long sys_sigreturn(void)
155{
156 struct sigframe __user *frame = (struct sigframe __user *) __frame->sp;
157 sigset_t set;
158 long d0;
159
160 if (verify_area(VERIFY_READ, frame, sizeof(*frame)))
161 goto badframe;
162 if (__get_user(set.sig[0], &frame->sc.oldmask))
163 goto badframe;
164
165 if (_NSIG_WORDS > 1 &&
166 __copy_from_user(&set.sig[1], &frame->extramask,
167 sizeof(frame->extramask)))
168 goto badframe;
169
170 sigdelsetmask(&set, ~_BLOCKABLE);
171 spin_lock_irq(&current->sighand->siglock);
172 current->blocked = set;
173 recalc_sigpending();
174 spin_unlock_irq(&current->sighand->siglock);
175
176 if (restore_sigcontext(__frame, &frame->sc, &d0))
177 goto badframe;
178
179 return d0;
180
181badframe:
182 force_sig(SIGSEGV, current);
183 return 0;
184}
185
186/*
187 * realtime signal return syscall
188 */
189asmlinkage long sys_rt_sigreturn(void)
190{
191 struct rt_sigframe __user *frame =
192 (struct rt_sigframe __user *) __frame->sp;
193 sigset_t set;
194 unsigned long d0;
195
196 if (verify_area(VERIFY_READ, frame, sizeof(*frame)))
197 goto badframe;
198 if (__copy_from_user(&set, &frame->uc.uc_sigmask, sizeof(set)))
199 goto badframe;
200
201 sigdelsetmask(&set, ~_BLOCKABLE);
202 spin_lock_irq(&current->sighand->siglock);
203 current->blocked = set;
204 recalc_sigpending();
205 spin_unlock_irq(&current->sighand->siglock);
206
207 if (restore_sigcontext(__frame, &frame->uc.uc_mcontext, &d0))
208 goto badframe;
209
210 if (do_sigaltstack(&frame->uc.uc_stack, NULL, __frame->sp) == -EFAULT)
211 goto badframe;
212
213 return d0;
214
215badframe:
216 force_sig(SIGSEGV, current);
217 return 0;
218}
219
220/*
221 * store the userspace context into a signal frame
222 */
223static int setup_sigcontext(struct sigcontext __user *sc,
224 struct fpucontext *fpuctx,
225 struct pt_regs *regs,
226 unsigned long mask)
227{
228 int tmp, err = 0;
229
230#define COPY(x) err |= __put_user(regs->x, &sc->x)
231 COPY(d0); COPY(d1); COPY(d2); COPY(d3);
232 COPY(a0); COPY(a1); COPY(a2); COPY(a3);
233 COPY(e0); COPY(e1); COPY(e2); COPY(e3);
234 COPY(e4); COPY(e5); COPY(e6); COPY(e7);
235 COPY(lar); COPY(lir);
236 COPY(mdr); COPY(mdrq);
237 COPY(mcvf); COPY(mcrl); COPY(mcrh);
238 COPY(sp); COPY(epsw); COPY(pc);
239#undef COPY
240
241 tmp = fpu_setup_sigcontext(fpuctx);
242 if (tmp < 0)
243 err = 1;
244 else
245 err |= __put_user(tmp ? fpuctx : NULL, &sc->fpucontext);
246
247 /* non-iBCS2 extensions.. */
248 err |= __put_user(mask, &sc->oldmask);
249
250 return err;
251}
252
253/*
254 * determine which stack to use..
255 */
256static inline void __user *get_sigframe(struct k_sigaction *ka,
257 struct pt_regs *regs,
258 size_t frame_size)
259{
260 unsigned long sp;
261
262 /* default to using normal stack */
263 sp = regs->sp;
264
265 /* this is the X/Open sanctioned signal stack switching. */
266 if (ka->sa.sa_flags & SA_ONSTACK) {
267 if (!on_sig_stack(sp))
268 sp = current->sas_ss_sp + current->sas_ss_size;
269 }
270
271 return (void __user *) ((sp - frame_size) & ~7UL);
272}
273
274/*
275 * set up a normal signal frame
276 */
277static int setup_frame(int sig, struct k_sigaction *ka, sigset_t *set,
278 struct pt_regs *regs)
279{
280 struct sigframe __user *frame;
281 int rsig;
282
283 frame = get_sigframe(ka, regs, sizeof(*frame));
284
285 if (!access_ok(VERIFY_WRITE, frame, sizeof(*frame)))
286 goto give_sigsegv;
287
288 rsig = sig;
289 if (sig < 32 &&
290 current_thread_info()->exec_domain &&
291 current_thread_info()->exec_domain->signal_invmap)
292 rsig = current_thread_info()->exec_domain->signal_invmap[sig];
293
294 if (__put_user(rsig, &frame->sig) < 0 ||
295 __put_user(&frame->sc, &frame->psc) < 0)
296 goto give_sigsegv;
297
298 if (setup_sigcontext(&frame->sc, &frame->fpuctx, regs, set->sig[0]))
299 goto give_sigsegv;
300
301 if (_NSIG_WORDS > 1) {
302 if (__copy_to_user(frame->extramask, &set->sig[1],
303 sizeof(frame->extramask)))
304 goto give_sigsegv;
305 }
306
307 /* set up to return from userspace. If provided, use a stub already in
308 * userspace */
309 if (ka->sa.sa_flags & SA_RESTORER) {
310 if (__put_user(ka->sa.sa_restorer, &frame->pretcode))
311 goto give_sigsegv;
312 } else {
313 if (__put_user((void (*)(void))frame->retcode,
314 &frame->pretcode))
315 goto give_sigsegv;
316 /* this is mov $,d0; syscall 0 */
317 if (__put_user(0x2c, (char *)(frame->retcode + 0)) ||
318 __put_user(__NR_sigreturn, (char *)(frame->retcode + 1)) ||
319 __put_user(0x00, (char *)(frame->retcode + 2)) ||
320 __put_user(0xf0, (char *)(frame->retcode + 3)) ||
321 __put_user(0xe0, (char *)(frame->retcode + 4)))
322 goto give_sigsegv;
323 flush_icache_range((unsigned long) frame->retcode,
324 (unsigned long) frame->retcode + 5);
325 }
326
327 /* set up registers for signal handler */
328 regs->sp = (unsigned long) frame;
329 regs->pc = (unsigned long) ka->sa.sa_handler;
330 regs->d0 = sig;
331 regs->d1 = (unsigned long) &frame->sc;
332
333 set_fs(USER_DS);
334
335 /* the tracer may want to single-step inside the handler */
336 if (test_thread_flag(TIF_SINGLESTEP))
337 ptrace_notify(SIGTRAP);
338
339#if DEBUG_SIG
340 printk(KERN_DEBUG "SIG deliver %d (%s:%d): sp=%p pc=%lx ra=%p\n",
341 sig, current->comm, current->pid, frame, regs->pc,
342 frame->pretcode);
343#endif
344
345 return 0;
346
347give_sigsegv:
348 force_sig(SIGSEGV, current);
349 return -EFAULT;
350}
351
352/*
353 * set up a realtime signal frame
354 */
355static int setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info,
356 sigset_t *set, struct pt_regs *regs)
357{
358 struct rt_sigframe __user *frame;
359 int rsig;
360
361 frame = get_sigframe(ka, regs, sizeof(*frame));
362
363 if (!access_ok(VERIFY_WRITE, frame, sizeof(*frame)))
364 goto give_sigsegv;
365
366 rsig = sig;
367 if (sig < 32 &&
368 current_thread_info()->exec_domain &&
369 current_thread_info()->exec_domain->signal_invmap)
370 rsig = current_thread_info()->exec_domain->signal_invmap[sig];
371
372 if (__put_user(rsig, &frame->sig) ||
373 __put_user(&frame->info, &frame->pinfo) ||
374 __put_user(&frame->uc, &frame->puc) ||
375 copy_siginfo_to_user(&frame->info, info))
376 goto give_sigsegv;
377
378 /* create the ucontext. */
379 if (__put_user(0, &frame->uc.uc_flags) ||
380 __put_user(0, &frame->uc.uc_link) ||
381 __put_user((void *)current->sas_ss_sp, &frame->uc.uc_stack.ss_sp) ||
382 __put_user(sas_ss_flags(regs->sp), &frame->uc.uc_stack.ss_flags) ||
383 __put_user(current->sas_ss_size, &frame->uc.uc_stack.ss_size) ||
384 setup_sigcontext(&frame->uc.uc_mcontext,
385 &frame->fpuctx, regs, set->sig[0]) ||
386 __copy_to_user(&frame->uc.uc_sigmask, set, sizeof(*set)))
387 goto give_sigsegv;
388
389 /* set up to return from userspace. If provided, use a stub already in
390 * userspace */
391 if (ka->sa.sa_flags & SA_RESTORER) {
392 if (__put_user(ka->sa.sa_restorer, &frame->pretcode))
393 goto give_sigsegv;
394 } else {
395 if (__put_user((void(*)(void))frame->retcode,
396 &frame->pretcode) ||
397 /* This is mov $,d0; syscall 0 */
398 __put_user(0x2c, (char *)(frame->retcode + 0)) ||
399 __put_user(__NR_rt_sigreturn,
400 (char *)(frame->retcode + 1)) ||
401 __put_user(0x00, (char *)(frame->retcode + 2)) ||
402 __put_user(0xf0, (char *)(frame->retcode + 3)) ||
403 __put_user(0xe0, (char *)(frame->retcode + 4)))
404 goto give_sigsegv;
405
406 flush_icache_range((u_long) frame->retcode,
407 (u_long) frame->retcode + 5);
408 }
409
410 /* Set up registers for signal handler */
411 regs->sp = (unsigned long) frame;
412 regs->pc = (unsigned long) ka->sa.sa_handler;
413 regs->d0 = sig;
414 regs->d1 = (long) &frame->info;
415
416 set_fs(USER_DS);
417
418 /* the tracer may want to single-step inside the handler */
419 if (test_thread_flag(TIF_SINGLESTEP))
420 ptrace_notify(SIGTRAP);
421
422#if DEBUG_SIG
423 printk(KERN_DEBUG "SIG deliver %d (%s:%d): sp=%p pc=%lx ra=%p\n",
424 sig, current->comm, current->pid, frame, regs->pc,
425 frame->pretcode);
426#endif
427
428 return 0;
429
430give_sigsegv:
431 force_sig(SIGSEGV, current);
432 return -EFAULT;
433}
434
435/*
436 * handle the actual delivery of a signal to userspace
437 */
438static int handle_signal(int sig,
439 siginfo_t *info, struct k_sigaction *ka,
440 sigset_t *oldset, struct pt_regs *regs)
441{
442 int ret;
443
444 /* Are we from a system call? */
445 if (regs->orig_d0 >= 0) {
446 /* If so, check system call restarting.. */
447 switch (regs->d0) {
448 case -ERESTART_RESTARTBLOCK:
449 case -ERESTARTNOHAND:
450 regs->d0 = -EINTR;
451 break;
452
453 case -ERESTARTSYS:
454 if (!(ka->sa.sa_flags & SA_RESTART)) {
455 regs->d0 = -EINTR;
456 break;
457 }
458
459 /* fallthrough */
460 case -ERESTARTNOINTR:
461 regs->d0 = regs->orig_d0;
462 regs->pc -= 2;
463 }
464 }
465
466 /* Set up the stack frame */
467 if (ka->sa.sa_flags & SA_SIGINFO)
468 ret = setup_rt_frame(sig, ka, info, oldset, regs);
469 else
470 ret = setup_frame(sig, ka, oldset, regs);
471
472 if (ret == 0) {
473 spin_lock_irq(&current->sighand->siglock);
474 sigorsets(&current->blocked, &current->blocked,
475 &ka->sa.sa_mask);
476 if (!(ka->sa.sa_flags & SA_NODEFER))
477 sigaddset(&current->blocked, sig);
478 recalc_sigpending();
479 spin_unlock_irq(&current->sighand->siglock);
480 }
481
482 return ret;
483}
484
485/*
486 * handle a potential signal
487 */
488static void do_signal(struct pt_regs *regs)
489{
490 struct k_sigaction ka;
491 siginfo_t info;
492 sigset_t *oldset;
493 int signr;
494
495 /* we want the common case to go fast, which is why we may in certain
496 * cases get here from kernel mode */
497 if (!user_mode(regs))
498 return;
499
500 if (test_thread_flag(TIF_RESTORE_SIGMASK))
501 oldset = &current->saved_sigmask;
502 else
503 oldset = &current->blocked;
504
505 signr = get_signal_to_deliver(&info, &ka, regs, NULL);
506 if (signr > 0) {
507 if (handle_signal(signr, &info, &ka, oldset, regs) == 0) {
508 /* a signal was successfully delivered; the saved
509 * sigmask will have been stored in the signal frame,
510 * and will be restored by sigreturn, so we can simply
511 * clear the TIF_RESTORE_SIGMASK flag */
512 if (test_thread_flag(TIF_RESTORE_SIGMASK))
513 clear_thread_flag(TIF_RESTORE_SIGMASK);
514 }
515
516 return;
517 }
518
519 /* did we come from a system call? */
520 if (regs->orig_d0 >= 0) {
521 /* restart the system call - no handlers present */
522 switch (regs->d0) {
523 case -ERESTARTNOHAND:
524 case -ERESTARTSYS:
525 case -ERESTARTNOINTR:
526 regs->d0 = regs->orig_d0;
527 regs->pc -= 2;
528 break;
529
530 case -ERESTART_RESTARTBLOCK:
531 regs->d0 = __NR_restart_syscall;
532 regs->pc -= 2;
533 break;
534 }
535 }
536
537 /* if there's no signal to deliver, we just put the saved sigmask
538 * back */
539 if (test_thread_flag(TIF_RESTORE_SIGMASK)) {
540 clear_thread_flag(TIF_RESTORE_SIGMASK);
541 sigprocmask(SIG_SETMASK, &current->saved_sigmask, NULL);
542 }
543}
544
545/*
546 * notification of userspace execution resumption
547 * - triggered by current->work.notify_resume
548 */
549asmlinkage void do_notify_resume(struct pt_regs *regs, u32 thread_info_flags)
550{
551 /* Pending single-step? */
552 if (thread_info_flags & _TIF_SINGLESTEP) {
553#ifndef CONFIG_MN10300_USING_JTAG
554 regs->epsw |= EPSW_T;
555 clear_thread_flag(TIF_SINGLESTEP);
556#else
557 BUG(); /* no h/w single-step if using JTAG unit */
558#endif
559 }
560
561 /* deal with pending signal delivery */
562 if (thread_info_flags & (_TIF_SIGPENDING | _TIF_RESTORE_SIGMASK))
563 do_signal(regs);
564}
diff --git a/arch/mn10300/kernel/switch_to.S b/arch/mn10300/kernel/switch_to.S
new file mode 100644
index 000000000000..630aad71b946
--- /dev/null
+++ b/arch/mn10300/kernel/switch_to.S
@@ -0,0 +1,71 @@
1###############################################################################
2#
3# MN10300 Context switch operation
4#
5# Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
6# Written by David Howells (dhowells@redhat.com)
7#
8# This program is free software; you can redistribute it and/or
9# modify it under the terms of the GNU General Public Licence
10# as published by the Free Software Foundation; either version
11# 2 of the Licence, or (at your option) any later version.
12#
13###############################################################################
14#include <linux/sys.h>
15#include <linux/linkage.h>
16#include <asm/thread_info.h>
17#include <asm/cpu-regs.h>
18
19 .text
20
21###############################################################################
22#
23# struct task_struct *__switch_to(struct thread_struct *prev,
24# struct thread_struct *next,
25# struct task_struct *prev_task)
26#
27###############################################################################
28ENTRY(__switch_to)
29 movm [d2,d3,a2,a3,exreg1],(sp)
30 or EPSW_NMID,epsw
31
32 mov (44,sp),d2
33
34 mov d0,a0
35 mov d1,a1
36
37 # save prev context
38 mov (__frame),d0
39 mov d0,(THREAD_FRAME,a0)
40 mov __switch_back,d0
41 mov d0,(THREAD_PC,a0)
42 mov sp,a2
43 mov a2,(THREAD_SP,a0)
44 mov a3,(THREAD_A3,a0)
45
46 mov (THREAD_A3,a1),a3
47 mov (THREAD_SP,a1),a2
48
49 # switch
50 mov a2,sp
51
52 # load next context
53 GET_THREAD_INFO a2
54 mov a2,(__current_ti)
55 mov (TI_task,a2),a2
56 mov a2,(__current)
57#ifdef CONFIG_MN10300_CURRENT_IN_E2
58 mov a2,e2
59#endif
60
61 mov (THREAD_FRAME,a1),a2
62 mov a2,(__frame)
63 mov (THREAD_PC,a1),a2
64 mov d2,d0 # for ret_from_fork
65 mov d0,a0 # for __switch_to
66
67 jmp (a2)
68
69__switch_back:
70 and ~EPSW_NMID,epsw
71 ret [d2,d3,a2,a3,exreg1],32
diff --git a/arch/mn10300/kernel/sys_mn10300.c b/arch/mn10300/kernel/sys_mn10300.c
new file mode 100644
index 000000000000..5f17a1ebc825
--- /dev/null
+++ b/arch/mn10300/kernel/sys_mn10300.c
@@ -0,0 +1,193 @@
1/* MN10300 Weird system calls
2 *
3 * Copyright (C) 2007 Matsushita Electric Industrial Co., Ltd.
4 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#include <linux/errno.h>
12#include <linux/sched.h>
13#include <linux/syscalls.h>
14#include <linux/mm.h>
15#include <linux/smp.h>
16#include <linux/smp_lock.h>
17#include <linux/sem.h>
18#include <linux/msg.h>
19#include <linux/shm.h>
20#include <linux/stat.h>
21#include <linux/mman.h>
22#include <linux/file.h>
23#include <linux/utsname.h>
24#include <linux/syscalls.h>
25#include <linux/tty.h>
26
27#include <asm/uaccess.h>
28
29#define MIN_MAP_ADDR PAGE_SIZE /* minimum fixed mmap address */
30
31/*
32 * sys_pipe() is the normal C calling standard for creating
33 * a pipe. It's not the way Unix traditionally does this, though.
34 */
35asmlinkage long sys_pipe(unsigned long __user *fildes)
36{
37 int fd[2];
38 int error;
39
40 error = do_pipe(fd);
41 if (!error) {
42 if (copy_to_user(fildes, fd, 2 * sizeof(int)))
43 error = -EFAULT;
44 }
45 return error;
46}
47
48/*
49 * memory mapping syscall
50 */
51asmlinkage long sys_mmap2(unsigned long addr, unsigned long len,
52 unsigned long prot, unsigned long flags,
53 unsigned long fd, unsigned long pgoff)
54{
55 struct file *file = NULL;
56 long error = -EINVAL;
57
58 flags &= ~(MAP_EXECUTABLE | MAP_DENYWRITE);
59
60 if (flags & MAP_FIXED && addr < MIN_MAP_ADDR)
61 goto out;
62
63 error = -EBADF;
64 if (!(flags & MAP_ANONYMOUS)) {
65 file = fget(fd);
66 if (!file)
67 goto out;
68 }
69
70 down_write(&current->mm->mmap_sem);
71 error = do_mmap_pgoff(file, addr, len, prot, flags, pgoff);
72 up_write(&current->mm->mmap_sem);
73
74 if (file)
75 fput(file);
76out:
77 return error;
78}
79
80asmlinkage long old_mmap(unsigned long addr, unsigned long len,
81 unsigned long prot, unsigned long flags,
82 unsigned long fd, unsigned long offset)
83{
84 if (offset & ~PAGE_MASK)
85 return -EINVAL;
86 return sys_mmap2(addr, len, prot, flags, fd, offset >> PAGE_SHIFT);
87}
88
89struct sel_arg_struct {
90 unsigned long n;
91 fd_set *inp;
92 fd_set *outp;
93 fd_set *exp;
94 struct timeval *tvp;
95};
96
97asmlinkage int old_select(struct sel_arg_struct __user *arg)
98{
99 struct sel_arg_struct a;
100
101 if (copy_from_user(&a, arg, sizeof(a)))
102 return -EFAULT;
103 /* sys_select() does the appropriate kernel locking */
104 return sys_select(a.n, a.inp, a.outp, a.exp, a.tvp);
105}
106
107/*
108 * sys_ipc() is the de-multiplexer for the SysV IPC calls..
109 *
110 * This is really horribly ugly.
111 */
112asmlinkage long sys_ipc(uint call, int first, int second,
113 int third, void __user *ptr, long fifth)
114{
115 int version, ret;
116
117 version = call >> 16; /* hack for backward compatibility */
118 call &= 0xffff;
119
120 switch (call) {
121 case SEMOP:
122 return sys_semtimedop(first, (struct sembuf __user *)ptr,
123 second, NULL);
124 case SEMTIMEDOP:
125 return sys_semtimedop(first, (struct sembuf __user *)ptr,
126 second,
127 (const struct timespec __user *)fifth);
128 case SEMGET:
129 return sys_semget(first, second, third);
130 case SEMCTL: {
131 union semun fourth;
132 if (!ptr)
133 return -EINVAL;
134 if (get_user(fourth.__pad, (void __user * __user *) ptr))
135 return -EFAULT;
136 return sys_semctl(first, second, third, fourth);
137 }
138
139 case MSGSND:
140 return sys_msgsnd(first, (struct msgbuf __user *) ptr,
141 second, third);
142 case MSGRCV:
143 switch (version) {
144 case 0: {
145 struct ipc_kludge tmp;
146 if (!ptr)
147 return -EINVAL;
148
149 if (copy_from_user(&tmp,
150 (struct ipc_kludge __user *) ptr,
151 sizeof(tmp)))
152 return -EFAULT;
153 return sys_msgrcv(first, tmp.msgp, second,
154 tmp.msgtyp, third);
155 }
156 default:
157 return sys_msgrcv(first,
158 (struct msgbuf __user *) ptr,
159 second, fifth, third);
160 }
161 case MSGGET:
162 return sys_msgget((key_t) first, second);
163 case MSGCTL:
164 return sys_msgctl(first, second,
165 (struct msqid_ds __user *) ptr);
166
167 case SHMAT:
168 switch (version) {
169 default: {
170 ulong raddr;
171 ret = do_shmat(first, (char __user *) ptr, second,
172 &raddr);
173 if (ret)
174 return ret;
175 return put_user(raddr, (ulong *) third);
176 }
177 case 1: /* iBCS2 emulator entry point */
178 if (!segment_eq(get_fs(), get_ds()))
179 return -EINVAL;
180 return do_shmat(first, (char __user *) ptr, second,
181 (ulong *) third);
182 }
183 case SHMDT:
184 return sys_shmdt((char __user *)ptr);
185 case SHMGET:
186 return sys_shmget(first, second, third);
187 case SHMCTL:
188 return sys_shmctl(first, second,
189 (struct shmid_ds __user *) ptr);
190 default:
191 return -EINVAL;
192 }
193}
diff --git a/arch/mn10300/kernel/time.c b/arch/mn10300/kernel/time.c
new file mode 100644
index 000000000000..ff492e3b3457
--- /dev/null
+++ b/arch/mn10300/kernel/time.c
@@ -0,0 +1,129 @@
1/* MN10300 Low level time management
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 * - Derived from arch/i386/kernel/time.c
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public Licence
9 * as published by the Free Software Foundation; either version
10 * 2 of the Licence, or (at your option) any later version.
11 */
12#include <linux/sched.h>
13#include <linux/kernel.h>
14#include <linux/interrupt.h>
15#include <linux/time.h>
16#include <linux/init.h>
17#include <linux/smp.h>
18#include <linux/profile.h>
19#include <asm/irq.h>
20#include <asm/div64.h>
21#include <asm/processor.h>
22#include <asm/intctl-regs.h>
23#include <asm/rtc.h>
24
25#ifdef CONFIG_MN10300_RTC
26unsigned long mn10300_ioclk; /* system I/O clock frequency */
27unsigned long mn10300_iobclk; /* system I/O clock frequency */
28unsigned long mn10300_tsc_per_HZ; /* number of ioclks per jiffy */
29#endif /* CONFIG_MN10300_RTC */
30
31static unsigned long mn10300_last_tsc; /* time-stamp counter at last time
32 * interrupt occurred */
33
34static irqreturn_t timer_interrupt(int irq, void *dev_id);
35
36static struct irqaction timer_irq = {
37 .handler = timer_interrupt,
38 .flags = IRQF_DISABLED | IRQF_SHARED | IRQF_TIMER,
39 .mask = CPU_MASK_NONE,
40 .name = "timer",
41};
42
43/*
44 * scheduler clock - returns current time in nanosec units.
45 */
46unsigned long long sched_clock(void)
47{
48 union {
49 unsigned long long l;
50 u32 w[2];
51 } quot;
52
53 quot.w[0] = mn10300_last_tsc - get_cycles();
54 quot.w[1] = 1000000000;
55
56 asm("mulu %2,%3,%0,%1"
57 : "=r"(quot.w[1]), "=r"(quot.w[0])
58 : "0"(quot.w[1]), "1"(quot.w[0])
59 : "cc");
60
61 do_div(quot.l, MN10300_TSCCLK);
62
63 return quot.l;
64}
65
66/*
67 * advance the kernel's time keeping clocks (xtime and jiffies)
68 * - we use Timer 0 & 1 cascaded as a clock to nudge us the next time
69 * there's a need to update
70 */
71static irqreturn_t timer_interrupt(int irq, void *dev_id)
72{
73 unsigned tsc, elapse;
74
75 write_seqlock(&xtime_lock);
76
77 while (tsc = get_cycles(),
78 elapse = mn10300_last_tsc - tsc, /* time elapsed since last
79 * tick */
80 elapse > MN10300_TSC_PER_HZ
81 ) {
82 mn10300_last_tsc -= MN10300_TSC_PER_HZ;
83
84 /* advance the kernel's time tracking system */
85 profile_tick(CPU_PROFILING);
86 do_timer(1);
87 update_process_times(user_mode(get_irq_regs()));
88 check_rtc_time();
89 }
90
91 write_sequnlock(&xtime_lock);
92 return IRQ_HANDLED;
93}
94
95/*
96 * initialise the various timers used by the main part of the kernel
97 */
98void __init time_init(void)
99{
100 /* we need the prescalar running to be able to use IOCLK/8
101 * - IOCLK runs at 1/4 (ST5 open) or 1/8 (ST5 closed) internal CPU clock
102 * - IOCLK runs at Fosc rate (crystal speed)
103 */
104 TMPSCNT |= TMPSCNT_ENABLE;
105
106 startup_timestamp_counter();
107
108 printk(KERN_INFO
109 "timestamp counter I/O clock running at %lu.%02lu"
110 " (calibrated against RTC)\n",
111 MN10300_TSCCLK / 1000000, (MN10300_TSCCLK / 10000) % 100);
112
113 xtime.tv_sec = get_initial_rtc_time();
114 xtime.tv_nsec = 0;
115
116 mn10300_last_tsc = TMTSCBC;
117
118 /* use timer 0 & 1 cascaded to tick at as close to HZ as possible */
119 setup_irq(TMJCIRQ, &timer_irq);
120
121 set_intr_level(TMJCIRQ, TMJCICR_LEVEL);
122
123 startup_jiffies_counter();
124
125#ifdef CONFIG_MN10300_WD_TIMER
126 /* start the watchdog timer */
127 watchdog_go();
128#endif
129}
diff --git a/arch/mn10300/kernel/traps.c b/arch/mn10300/kernel/traps.c
new file mode 100644
index 000000000000..8b9dc6d9dcc6
--- /dev/null
+++ b/arch/mn10300/kernel/traps.c
@@ -0,0 +1,619 @@
1/* MN10300 Exception handling
2 *
3 * Copyright (C) 2007 Matsushita Electric Industrial Co., Ltd.
4 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
5 * Modified by David Howells (dhowells@redhat.com)
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public Licence
9 * as published by the Free Software Foundation; either version
10 * 2 of the Licence, or (at your option) any later version.
11 */
12#include <linux/sched.h>
13#include <linux/kernel.h>
14#include <linux/string.h>
15#include <linux/errno.h>
16#include <linux/ptrace.h>
17#include <linux/timer.h>
18#include <linux/mm.h>
19#include <linux/smp.h>
20#include <linux/smp_lock.h>
21#include <linux/init.h>
22#include <linux/delay.h>
23#include <linux/spinlock.h>
24#include <linux/interrupt.h>
25#include <linux/kallsyms.h>
26#include <linux/pci.h>
27#include <linux/kdebug.h>
28#include <linux/bug.h>
29#include <linux/irq.h>
30#include <asm/processor.h>
31#include <asm/system.h>
32#include <asm/uaccess.h>
33#include <asm/io.h>
34#include <asm/atomic.h>
35#include <asm/smp.h>
36#include <asm/pgalloc.h>
37#include <asm/cacheflush.h>
38#include <asm/cpu-regs.h>
39#include <asm/busctl-regs.h>
40#include <asm/unit/leds.h>
41#include <asm/fpu.h>
42#include <asm/gdb-stub.h>
43#include <asm/sections.h>
44
45#if (CONFIG_INTERRUPT_VECTOR_BASE & 0xffffff)
46#error "INTERRUPT_VECTOR_BASE not aligned to 16MiB boundary!"
47#endif
48
49struct pt_regs *__frame; /* current frame pointer */
50EXPORT_SYMBOL(__frame);
51
52int kstack_depth_to_print = 24;
53
54spinlock_t die_lock = __SPIN_LOCK_UNLOCKED(die_lock);
55
56ATOMIC_NOTIFIER_HEAD(mn10300_die_chain);
57
58/*
59 * These constants are for searching for possible module text
60 * segments. MODULE_RANGE is a guess of how much space is likely
61 * to be vmalloced.
62 */
63#define MODULE_RANGE (8 * 1024 * 1024)
64
65#define DO_ERROR(signr, prologue, str, name) \
66asmlinkage void name(struct pt_regs *regs, u32 intcode) \
67{ \
68 prologue; \
69 if (die_if_no_fixup(str, regs, intcode)) \
70 return; \
71 force_sig(signr, current); \
72}
73
74#define DO_EINFO(signr, prologue, str, name, sicode) \
75asmlinkage void name(struct pt_regs *regs, u32 intcode) \
76{ \
77 siginfo_t info; \
78 prologue; \
79 if (die_if_no_fixup(str, regs, intcode)) \
80 return; \
81 info.si_signo = signr; \
82 if (signr == SIGILL && sicode == ILL_ILLOPC) { \
83 uint8_t opcode; \
84 if (get_user(opcode, (uint8_t __user *)regs->pc) == 0) \
85 if (opcode == 0xff) \
86 info.si_signo = SIGTRAP; \
87 } \
88 info.si_errno = 0; \
89 info.si_code = sicode; \
90 info.si_addr = (void *) regs->pc; \
91 force_sig_info(info.si_signo, &info, current); \
92}
93
94DO_ERROR(SIGTRAP, {}, "trap", trap);
95DO_ERROR(SIGSEGV, {}, "ibreak", ibreak);
96DO_ERROR(SIGSEGV, {}, "obreak", obreak);
97DO_EINFO(SIGSEGV, {}, "access error", access_error, SEGV_ACCERR);
98DO_EINFO(SIGSEGV, {}, "insn access error", insn_acc_error, SEGV_ACCERR);
99DO_EINFO(SIGSEGV, {}, "data access error", data_acc_error, SEGV_ACCERR);
100DO_EINFO(SIGILL, {}, "privileged opcode", priv_op, ILL_PRVOPC);
101DO_EINFO(SIGILL, {}, "invalid opcode", invalid_op, ILL_ILLOPC);
102DO_EINFO(SIGILL, {}, "invalid ex opcode", invalid_exop, ILL_ILLOPC);
103DO_EINFO(SIGBUS, {}, "invalid address", mem_error, BUS_ADRERR);
104DO_EINFO(SIGBUS, {}, "bus error", bus_error, BUS_ADRERR);
105DO_EINFO(SIGILL, {}, "FPU invalid opcode", fpu_invalid_op, ILL_COPROC);
106
107DO_ERROR(SIGTRAP,
108#ifndef CONFIG_MN10300_USING_JTAG
109 DCR &= ~0x0001,
110#else
111 {},
112#endif
113 "single step", istep);
114
115/*
116 * handle NMI
117 */
118asmlinkage void nmi(struct pt_regs *regs, enum exception_code code)
119{
120 /* see if gdbstub wants to deal with it */
121#ifdef CONFIG_GDBSTUB
122 if (gdbstub_intercept(regs, code))
123 return;
124#endif
125
126 printk(KERN_WARNING "--- Register Dump ---\n");
127 show_registers(regs);
128 printk(KERN_WARNING "---------------------\n");
129}
130
131/*
132 * show a stack trace from the specified stack pointer
133 */
134void show_trace(unsigned long *sp)
135{
136 unsigned long *stack, addr, module_start, module_end;
137 int i;
138
139 printk(KERN_EMERG "\n"
140 KERN_EMERG "Call Trace:");
141
142 stack = sp;
143 i = 0;
144 module_start = VMALLOC_START;
145 module_end = VMALLOC_END;
146
147 while (((long) stack & (THREAD_SIZE - 1)) != 0) {
148 addr = *stack++;
149 if (__kernel_text_address(addr)) {
150#if 1
151 printk(" [<%08lx>]", addr);
152 print_symbol(" %s", addr);
153 printk("\n");
154#else
155 if ((i % 6) == 0)
156 printk("\n" KERN_EMERG " ");
157 printk("[<%08lx>] ", addr);
158 i++;
159#endif
160 }
161 }
162
163 printk("\n");
164}
165
166/*
167 * show the raw stack from the specified stack pointer
168 */
169void show_stack(struct task_struct *task, unsigned long *sp)
170{
171 unsigned long *stack;
172 int i;
173
174 if (!sp)
175 sp = (unsigned long *) &sp;
176
177 stack = sp;
178 printk(KERN_EMERG "Stack:");
179 for (i = 0; i < kstack_depth_to_print; i++) {
180 if (((long) stack & (THREAD_SIZE - 1)) == 0)
181 break;
182 if ((i % 8) == 0)
183 printk("\n" KERN_EMERG " ");
184 printk("%08lx ", *stack++);
185 }
186
187 show_trace(sp);
188}
189
190/*
191 * the architecture-independent dump_stack generator
192 */
193void dump_stack(void)
194{
195 unsigned long stack;
196
197 show_stack(current, &stack);
198}
199EXPORT_SYMBOL(dump_stack);
200
201/*
202 * dump the register file in the specified exception frame
203 */
204void show_registers_only(struct pt_regs *regs)
205{
206 unsigned long ssp;
207
208 ssp = (unsigned long) regs + sizeof(*regs);
209
210 printk(KERN_EMERG "PC: %08lx EPSW: %08lx SSP: %08lx mode: %s\n",
211 regs->pc, regs->epsw, ssp, user_mode(regs) ? "User" : "Super");
212 printk(KERN_EMERG "d0: %08lx d1: %08lx d2: %08lx d3: %08lx\n",
213 regs->d0, regs->d1, regs->d2, regs->d3);
214 printk(KERN_EMERG "a0: %08lx a1: %08lx a2: %08lx a3: %08lx\n",
215 regs->a0, regs->a1, regs->a2, regs->a3);
216 printk(KERN_EMERG "e0: %08lx e1: %08lx e2: %08lx e3: %08lx\n",
217 regs->e0, regs->e1, regs->e2, regs->e3);
218 printk(KERN_EMERG "e4: %08lx e5: %08lx e6: %08lx e7: %08lx\n",
219 regs->e4, regs->e5, regs->e6, regs->e7);
220 printk(KERN_EMERG "lar: %08lx lir: %08lx mdr: %08lx usp: %08lx\n",
221 regs->lar, regs->lir, regs->mdr, regs->sp);
222 printk(KERN_EMERG "cvf: %08lx crl: %08lx crh: %08lx drq: %08lx\n",
223 regs->mcvf, regs->mcrl, regs->mcrh, regs->mdrq);
224 printk(KERN_EMERG "threadinfo=%p task=%p)\n",
225 current_thread_info(), current);
226
227 if ((unsigned long) current >= 0x90000000UL &&
228 (unsigned long) current < 0x94000000UL)
229 printk(KERN_EMERG "Process %s (pid: %d)\n",
230 current->comm, current->pid);
231
232 printk(KERN_EMERG "CPUP: %04hx\n", CPUP);
233 printk(KERN_EMERG "TBR: %08x\n", TBR);
234 printk(KERN_EMERG "DEAR: %08x\n", DEAR);
235 printk(KERN_EMERG "sISR: %08x\n", sISR);
236 printk(KERN_EMERG "NMICR: %04hx\n", NMICR);
237 printk(KERN_EMERG "BCBERR: %08x\n", BCBERR);
238 printk(KERN_EMERG "BCBEAR: %08x\n", BCBEAR);
239 printk(KERN_EMERG "MMUFCR: %08x\n", MMUFCR);
240 printk(KERN_EMERG "IPTEU : %08x IPTEL2: %08x\n", IPTEU, IPTEL2);
241 printk(KERN_EMERG "DPTEU: %08x DPTEL2: %08x\n", DPTEU, DPTEL2);
242}
243
244/*
245 * dump the registers and the stack
246 */
247void show_registers(struct pt_regs *regs)
248{
249 unsigned long sp;
250 int i;
251
252 show_registers_only(regs);
253
254 if (!user_mode(regs))
255 sp = (unsigned long) regs + sizeof(*regs);
256 else
257 sp = regs->sp;
258
259 /* when in-kernel, we also print out the stack and code at the
260 * time of the fault..
261 */
262 if (!user_mode(regs)) {
263 printk(KERN_EMERG "\n");
264 show_stack(current, (unsigned long *) sp);
265
266#if 0
267 printk(KERN_EMERG "\n"
268 KERN_EMERG "Code: ");
269 if (regs->pc < PAGE_OFFSET)
270 goto bad;
271
272 for (i = 0; i < 20; i++) {
273 unsigned char c;
274 if (__get_user(c, &((unsigned char *) regs->pc)[i]))
275 goto bad;
276 printk("%02x ", c);
277 }
278#else
279 i = 0;
280#endif
281 }
282
283 printk("\n");
284 return;
285
286#if 0
287bad:
288 printk(KERN_EMERG " Bad PC value.");
289 break;
290#endif
291}
292
293/*
294 *
295 */
296void show_trace_task(struct task_struct *tsk)
297{
298 unsigned long sp = tsk->thread.sp;
299
300 /* User space on another CPU? */
301 if ((sp ^ (unsigned long) tsk) & (PAGE_MASK << 1))
302 return;
303
304 show_trace((unsigned long *) sp);
305}
306
307/*
308 * note the untimely death of part of the kernel
309 */
310void die(const char *str, struct pt_regs *regs, enum exception_code code)
311{
312 console_verbose();
313 spin_lock_irq(&die_lock);
314 printk(KERN_EMERG "\n"
315 KERN_EMERG "%s: %04x\n",
316 str, code & 0xffff);
317 show_registers(regs);
318
319 if (regs->pc >= 0x02000000 && regs->pc < 0x04000000 &&
320 (regs->epsw & (EPSW_IM | EPSW_IE)) != (EPSW_IM | EPSW_IE)) {
321 printk(KERN_EMERG "Exception in usermode interrupt handler\n");
322 printk(KERN_EMERG "\n"
323 KERN_EMERG " Please connect to kernel debugger !!\n");
324 asm volatile ("0: bra 0b");
325 }
326
327 spin_unlock_irq(&die_lock);
328 do_exit(SIGSEGV);
329}
330
331/*
332 * see if there's a fixup handler we can force a jump to when an exception
333 * happens due to something kernel code did
334 */
335int die_if_no_fixup(const char *str, struct pt_regs *regs,
336 enum exception_code code)
337{
338 if (user_mode(regs))
339 return 0;
340
341 peripheral_leds_display_exception(code);
342
343 switch (code) {
344 /* see if we can fixup the kernel accessing memory */
345 case EXCEP_ITLBMISS:
346 case EXCEP_DTLBMISS:
347 case EXCEP_IAERROR:
348 case EXCEP_DAERROR:
349 case EXCEP_MEMERR:
350 case EXCEP_MISALIGN:
351 case EXCEP_BUSERROR:
352 case EXCEP_ILLDATACC:
353 case EXCEP_IOINSACC:
354 case EXCEP_PRIVINSACC:
355 case EXCEP_PRIVDATACC:
356 case EXCEP_DATINSACC:
357 if (fixup_exception(regs))
358 return 1;
359 case EXCEP_UNIMPINS:
360 if (regs->pc && *(uint8_t *)regs->pc == 0xff)
361 if (notify_die(DIE_BREAKPOINT, str, regs, code, 0, 0))
362 return 1;
363 break;
364 default:
365 break;
366 }
367
368 /* see if gdbstub wants to deal with it */
369#ifdef CONFIG_GDBSTUB
370 if (gdbstub_intercept(regs, code))
371 return 1;
372#endif
373
374 if (notify_die(DIE_GPF, str, regs, code, 0, 0))
375 return 1;
376
377 /* make the process die as the last resort */
378 die(str, regs, code);
379}
380
381/*
382 * handle unsupported syscall instructions (syscall 1-15)
383 */
384static asmlinkage void unsupported_syscall(struct pt_regs *regs,
385 enum exception_code code)
386{
387 struct task_struct *tsk = current;
388 siginfo_t info;
389
390 /* catch a kernel BUG() */
391 if (code == EXCEP_SYSCALL15 && !user_mode(regs)) {
392 if (report_bug(regs->pc, regs) == BUG_TRAP_TYPE_BUG) {
393#ifdef CONFIG_GDBSTUB
394 __gdbstub_bug_trap();
395#endif
396 }
397 }
398
399 regs->pc -= 2; /* syscall return addr is _after_ the instruction */
400
401 die_if_no_fixup("An unsupported syscall insn was used by the kernel\n",
402 regs, code);
403
404 info.si_signo = SIGILL;
405 info.si_errno = ENOSYS;
406 info.si_code = ILL_ILLTRP;
407 info.si_addr = (void *) regs->pc;
408 force_sig_info(SIGILL, &info, tsk);
409}
410
411/*
412 * display the register file when the stack pointer gets clobbered
413 */
414asmlinkage void do_double_fault(struct pt_regs *regs)
415{
416 struct task_struct *tsk = current;
417
418 strcpy(tsk->comm, "emergency tsk");
419 tsk->pid = 0;
420 console_verbose();
421 printk(KERN_EMERG "--- double fault ---\n");
422 show_registers(regs);
423}
424
425/*
426 * asynchronous bus error (external, usually I/O DMA)
427 */
428asmlinkage void io_bus_error(u32 bcberr, u32 bcbear, struct pt_regs *regs)
429{
430 console_verbose();
431
432 printk(KERN_EMERG "\n"
433 KERN_EMERG "Asynchronous I/O Bus Error\n"
434 KERN_EMERG "==========================\n");
435
436 if (bcberr & BCBERR_BEME)
437 printk(KERN_EMERG "- Multiple recorded errors\n");
438
439 printk(KERN_EMERG "- Faulting Buses:%s%s%s\n",
440 bcberr & BCBERR_BEMR_CI ? " CPU-Ins-Fetch" : "",
441 bcberr & BCBERR_BEMR_CD ? " CPU-Data" : "",
442 bcberr & BCBERR_BEMR_DMA ? " DMA" : "");
443
444 printk(KERN_EMERG "- %s %s access made to %s at address %08x\n",
445 bcberr & BCBERR_BEBST ? "Burst" : "Single",
446 bcberr & BCBERR_BERW ? "Read" : "Write",
447 bcberr & BCBERR_BESB_MON ? "Monitor Space" :
448 bcberr & BCBERR_BESB_IO ? "Internal CPU I/O Space" :
449 bcberr & BCBERR_BESB_EX ? "External I/O Bus" :
450 bcberr & BCBERR_BESB_OPEX ? "External Memory Bus" :
451 "On Chip Memory",
452 bcbear
453 );
454
455 printk(KERN_EMERG "- Detected by the %s\n",
456 bcberr&BCBERR_BESD ? "Bus Control Unit" : "Slave Bus");
457
458#ifdef CONFIG_PCI
459#define BRIDGEREGB(X) (*(volatile __u8 *)(0xBE040000 + (X)))
460#define BRIDGEREGW(X) (*(volatile __u16 *)(0xBE040000 + (X)))
461#define BRIDGEREGL(X) (*(volatile __u32 *)(0xBE040000 + (X)))
462
463 printk(KERN_EMERG "- PCI Memory Paging Reg: %08x\n",
464 *(volatile __u32 *) (0xBFFFFFF4));
465 printk(KERN_EMERG "- PCI Bridge Base Address 0: %08x\n",
466 BRIDGEREGL(PCI_BASE_ADDRESS_0));
467 printk(KERN_EMERG "- PCI Bridge AMPCI Base Address: %08x\n",
468 BRIDGEREGL(0x48));
469 printk(KERN_EMERG "- PCI Bridge Command: %04hx\n",
470 BRIDGEREGW(PCI_COMMAND));
471 printk(KERN_EMERG "- PCI Bridge Status: %04hx\n",
472 BRIDGEREGW(PCI_STATUS));
473 printk(KERN_EMERG "- PCI Bridge Int Status: %08hx\n",
474 BRIDGEREGL(0x4c));
475#endif
476
477 printk(KERN_EMERG "\n");
478 show_registers(regs);
479
480 panic("Halted due to asynchronous I/O Bus Error\n");
481}
482
483/*
484 * handle an exception for which a handler has not yet been installed
485 */
486asmlinkage void uninitialised_exception(struct pt_regs *regs,
487 enum exception_code code)
488{
489
490 /* see if gdbstub wants to deal with it */
491#ifdef CONFIG_GDBSTUB
492 if (gdbstub_intercept(regs, code))
493 return;
494#endif
495
496 peripheral_leds_display_exception(code);
497 printk(KERN_EMERG "Uninitialised Exception 0x%04x\n", code & 0xFFFF);
498 show_registers(regs);
499
500 for (;;)
501 continue;
502}
503
504/*
505 * set an interrupt stub to jump to a handler
506 * ! NOTE: this does *not* flush the caches
507 */
508void __init __set_intr_stub(enum exception_code code, void *handler)
509{
510 unsigned long addr;
511 u8 *vector = (u8 *)(CONFIG_INTERRUPT_VECTOR_BASE + code);
512
513 addr = (unsigned long) handler - (unsigned long) vector;
514 vector[0] = 0xdc; /* JMP handler */
515 vector[1] = addr;
516 vector[2] = addr >> 8;
517 vector[3] = addr >> 16;
518 vector[4] = addr >> 24;
519 vector[5] = 0xcb;
520 vector[6] = 0xcb;
521 vector[7] = 0xcb;
522}
523
524/*
525 * set an interrupt stub to jump to a handler
526 */
527void __init set_intr_stub(enum exception_code code, void *handler)
528{
529 unsigned long addr;
530 u8 *vector = (u8 *)(CONFIG_INTERRUPT_VECTOR_BASE + code);
531
532 addr = (unsigned long) handler - (unsigned long) vector;
533 vector[0] = 0xdc; /* JMP handler */
534 vector[1] = addr;
535 vector[2] = addr >> 8;
536 vector[3] = addr >> 16;
537 vector[4] = addr >> 24;
538 vector[5] = 0xcb;
539 vector[6] = 0xcb;
540 vector[7] = 0xcb;
541
542 mn10300_dcache_flush_inv();
543 mn10300_icache_inv();
544}
545
546/*
547 * set an interrupt stub to invoke the JTAG unit and then jump to a handler
548 */
549void __init set_jtag_stub(enum exception_code code, void *handler)
550{
551 unsigned long addr;
552 u8 *vector = (u8 *)(CONFIG_INTERRUPT_VECTOR_BASE + code);
553
554 addr = (unsigned long) handler - ((unsigned long) vector + 1);
555 vector[0] = 0xff; /* PI to jump into JTAG debugger */
556 vector[1] = 0xdc; /* jmp handler */
557 vector[2] = addr;
558 vector[3] = addr >> 8;
559 vector[4] = addr >> 16;
560 vector[5] = addr >> 24;
561 vector[6] = 0xcb;
562 vector[7] = 0xcb;
563
564 mn10300_dcache_flush_inv();
565 flush_icache_range((unsigned long) vector, (unsigned long) vector + 8);
566}
567
568/*
569 * initialise the exception table
570 */
571void __init trap_init(void)
572{
573 set_excp_vector(EXCEP_TRAP, trap);
574 set_excp_vector(EXCEP_ISTEP, istep);
575 set_excp_vector(EXCEP_IBREAK, ibreak);
576 set_excp_vector(EXCEP_OBREAK, obreak);
577
578 set_excp_vector(EXCEP_PRIVINS, priv_op);
579 set_excp_vector(EXCEP_UNIMPINS, invalid_op);
580 set_excp_vector(EXCEP_UNIMPEXINS, invalid_exop);
581 set_excp_vector(EXCEP_MEMERR, mem_error);
582 set_excp_vector(EXCEP_MISALIGN, misalignment);
583 set_excp_vector(EXCEP_BUSERROR, bus_error);
584 set_excp_vector(EXCEP_ILLINSACC, insn_acc_error);
585 set_excp_vector(EXCEP_ILLDATACC, data_acc_error);
586 set_excp_vector(EXCEP_IOINSACC, insn_acc_error);
587 set_excp_vector(EXCEP_PRIVINSACC, insn_acc_error);
588 set_excp_vector(EXCEP_PRIVDATACC, data_acc_error);
589 set_excp_vector(EXCEP_DATINSACC, insn_acc_error);
590 set_excp_vector(EXCEP_FPU_DISABLED, fpu_disabled);
591 set_excp_vector(EXCEP_FPU_UNIMPINS, fpu_invalid_op);
592 set_excp_vector(EXCEP_FPU_OPERATION, fpu_exception);
593
594 set_excp_vector(EXCEP_NMI, nmi);
595
596 set_excp_vector(EXCEP_SYSCALL1, unsupported_syscall);
597 set_excp_vector(EXCEP_SYSCALL2, unsupported_syscall);
598 set_excp_vector(EXCEP_SYSCALL3, unsupported_syscall);
599 set_excp_vector(EXCEP_SYSCALL4, unsupported_syscall);
600 set_excp_vector(EXCEP_SYSCALL5, unsupported_syscall);
601 set_excp_vector(EXCEP_SYSCALL6, unsupported_syscall);
602 set_excp_vector(EXCEP_SYSCALL7, unsupported_syscall);
603 set_excp_vector(EXCEP_SYSCALL8, unsupported_syscall);
604 set_excp_vector(EXCEP_SYSCALL9, unsupported_syscall);
605 set_excp_vector(EXCEP_SYSCALL10, unsupported_syscall);
606 set_excp_vector(EXCEP_SYSCALL11, unsupported_syscall);
607 set_excp_vector(EXCEP_SYSCALL12, unsupported_syscall);
608 set_excp_vector(EXCEP_SYSCALL13, unsupported_syscall);
609 set_excp_vector(EXCEP_SYSCALL14, unsupported_syscall);
610 set_excp_vector(EXCEP_SYSCALL15, unsupported_syscall);
611}
612
613/*
614 * determine if a program counter value is a valid bug address
615 */
616int is_valid_bugaddr(unsigned long pc)
617{
618 return pc >= PAGE_OFFSET;
619}
diff --git a/arch/mn10300/kernel/vmlinux.lds.S b/arch/mn10300/kernel/vmlinux.lds.S
new file mode 100644
index 000000000000..a3e80f444f55
--- /dev/null
+++ b/arch/mn10300/kernel/vmlinux.lds.S
@@ -0,0 +1,159 @@
1/* MN10300 Main kernel linker script
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#define __VMLINUX_LDS__
12#include <asm-generic/vmlinux.lds.h>
13#include <asm/thread_info.h>
14
15OUTPUT_FORMAT("elf32-am33lin", "elf32-am33lin", "elf32-am33lin")
16OUTPUT_ARCH(mn10300)
17ENTRY(_start)
18jiffies = jiffies_64;
19#ifndef CONFIG_MN10300_CURRENT_IN_E2
20current = __current;
21#endif
22SECTIONS
23{
24 . = CONFIG_KERNEL_TEXT_ADDRESS;
25 /* read-only */
26 _stext = .;
27 _text = .; /* Text and read-only data */
28 .text : {
29 *(
30 .text.head
31 .text
32 )
33 TEXT_TEXT
34 SCHED_TEXT
35 LOCK_TEXT
36 KPROBES_TEXT
37 *(.fixup)
38 *(.gnu.warning)
39 } = 0xcb
40
41 _etext = .; /* End of text section */
42
43 . = ALIGN(16); /* Exception table */
44 __start___ex_table = .;
45 __ex_table : { *(__ex_table) }
46 __stop___ex_table = .;
47
48 BUG_TABLE
49
50 RODATA
51
52 /* writeable */
53 .data : { /* Data */
54 DATA_DATA
55 CONSTRUCTORS
56 }
57
58 . = ALIGN(4096);
59 __nosave_begin = .;
60 .data_nosave : { *(.data.nosave) }
61 . = ALIGN(4096);
62 __nosave_end = .;
63
64 . = ALIGN(4096);
65 .data.page_aligned : { *(.data.idt) }
66
67 . = ALIGN(32);
68 .data.cacheline_aligned : { *(.data.cacheline_aligned) }
69
70 /* rarely changed data like cpu maps */
71 . = ALIGN(32);
72 .data.read_mostly : AT(ADDR(.data.read_mostly)) {
73 *(.data.read_mostly)
74 _edata = .; /* End of data section */
75 }
76
77 . = ALIGN(THREAD_SIZE); /* init_task */
78 .data.init_task : { *(.data.init_task) }
79
80 /* might get freed after init */
81 . = ALIGN(4096);
82 .smp_locks : AT(ADDR(.smp_locks) - LOAD_OFFSET) {
83 __smp_locks = .;
84 *(.smp_locks)
85 __smp_locks_end = .;
86 }
87
88 /* will be freed after init */
89 . = ALIGN(4096); /* Init code and data */
90 __init_begin = .;
91 .init.text : {
92 _sinittext = .;
93 *(.init.text)
94 _einittext = .;
95 }
96 .init.data : { *(.init.data) }
97 . = ALIGN(16);
98 __setup_start = .;
99 .setup.init : { KEEP(*(.init.setup)) }
100 __setup_end = .;
101
102 __initcall_start = .;
103 .initcall.init : {
104 INITCALLS
105 }
106 __initcall_end = .;
107 __con_initcall_start = .;
108 .con_initcall.init : { *(.con_initcall.init) }
109 __con_initcall_end = .;
110
111 SECURITY_INIT
112 . = ALIGN(4);
113 __alt_instructions = .;
114 .altinstructions : { *(.altinstructions) }
115 __alt_instructions_end = .;
116 .altinstr_replacement : { *(.altinstr_replacement) }
117 /* .exit.text is discard at runtime, not link time, to deal with references
118 from .altinstructions and .eh_frame */
119 .exit.text : { *(.exit.text) }
120 .exit.data : { *(.exit.data) }
121
122#ifdef CONFIG_BLK_DEV_INITRD
123 . = ALIGN(4096);
124 __initramfs_start = .;
125 .init.ramfs : { *(.init.ramfs) }
126 __initramfs_end = .;
127#endif
128
129 . = ALIGN(32);
130 __per_cpu_start = .;
131 .data.percpu : { *(.data.percpu) }
132 __per_cpu_end = .;
133 . = ALIGN(4096);
134 __init_end = .;
135 /* freed after init ends here */
136
137 __bss_start = .; /* BSS */
138 .bss : {
139 *(.bss.page_aligned)
140 *(.bss)
141 }
142 . = ALIGN(4);
143 __bss_stop = .;
144
145 _end = . ;
146
147 /* This is where the kernel creates the early boot page tables */
148 . = ALIGN(4096);
149 pg0 = .;
150
151 /* Sections to be discarded */
152 /DISCARD/ : {
153 *(.exitcall.exit)
154 }
155
156 STABS_DEBUG
157
158 DWARF_DEBUG
159}
diff --git a/arch/mn10300/lib/Makefile b/arch/mn10300/lib/Makefile
new file mode 100644
index 000000000000..fdfa9ec5b5bb
--- /dev/null
+++ b/arch/mn10300/lib/Makefile
@@ -0,0 +1,7 @@
1#
2# Makefile for the MN10300-specific library files..
3#
4
5lib-y = delay.o usercopy.o checksum.o bitops.o memcpy.o memmove.o memset.o
6lib-y += do_csum.o
7lib-y += __ashldi3.o __ashrdi3.o __lshrdi3.o negdi2.o
diff --git a/arch/mn10300/lib/__ashldi3.S b/arch/mn10300/lib/__ashldi3.S
new file mode 100644
index 000000000000..a51a9506f00c
--- /dev/null
+++ b/arch/mn10300/lib/__ashldi3.S
@@ -0,0 +1,51 @@
1/* MN10300 64-bit arithmetic left shift
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#include <asm/cache.h>
12
13 .text
14 .balign L1_CACHE_BYTES
15
16###############################################################################
17#
18# unsigned long long __ashldi3(unsigned long long value [D1:D0],
19# unsigned by [(12,SP)])
20#
21###############################################################################
22 .globl __ashldi3
23 .type __ashldi3,@function
24__ashldi3:
25 mov (12,sp),a0
26 and +63,a0
27 beq __ashldi3_zero
28
29 cmp +31,a0
30 bhi __ashldi3_32plus
31
32 # the count is in the range 1-31
33 asl a0,d1
34
35 mov +32,a1
36 sub a0,a1,a1 # a1 = 32 - count
37 lsr a1,d0,a1 # get overflow from LSW -> MSW
38
39 or_asl a1,d1,a0,d0 # insert overflow into MSW and
40 # shift the LSW
41 rets
42
43 .balign L1_CACHE_BYTES
44 # the count is in the range 32-63
45__ashldi3_32plus:
46 asl a0,d0,d1
47 clr d0
48__ashldi3_zero:
49 rets
50
51 .size __ashldi3, .-__ashldi3
diff --git a/arch/mn10300/lib/__ashrdi3.S b/arch/mn10300/lib/__ashrdi3.S
new file mode 100644
index 000000000000..6f42382728cb
--- /dev/null
+++ b/arch/mn10300/lib/__ashrdi3.S
@@ -0,0 +1,52 @@
1/* MN10300 64-bit arithmetic right shift
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#include <asm/cache.h>
12
13 .text
14 .balign L1_CACHE_BYTES
15
16###############################################################################
17#
18# unsigned long long __ashrdi3(unsigned long long value [D1:D0],
19# unsigned by [(12,SP)])
20#
21###############################################################################
22 .globl __ashrdi3
23 .type __ashrdi3,@function
24__ashrdi3:
25 mov (12,sp),a0
26 and +63,a0
27 beq __ashrdi3_zero
28
29 cmp +31,a0
30 bhi __ashrdi3_32plus
31
32 # the count is in the range 1-31
33 lsr a0,d0
34
35 mov +32,a1
36 sub a0,a1,a1 # a1 = 32 - count
37 asl a1,d1,a1 # get underflow from MSW -> LSW
38
39 or_asr a1,d0,a0,d1 # insert underflow into LSW and
40 # shift the MSW
41 rets
42
43 .balign L1_CACHE_BYTES
44 # the count is in the range 32-63
45__ashrdi3_32plus:
46 asr a0,d1,d0
47 ext d0 # sign-extend result through MDR
48 mov mdr,d1
49__ashrdi3_zero:
50 rets
51
52 .size __ashrdi3, .-__ashrdi3
diff --git a/arch/mn10300/lib/__lshrdi3.S b/arch/mn10300/lib/__lshrdi3.S
new file mode 100644
index 000000000000..a686aef31e90
--- /dev/null
+++ b/arch/mn10300/lib/__lshrdi3.S
@@ -0,0 +1,52 @@
1/* MN10300 64-bit logical right shift
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11
12#include <asm/cache.h>
13
14 .text
15 .balign L1_CACHE_BYTES
16
17###############################################################################
18#
19# unsigned long long __lshrdi3(unsigned long long value [D1:D0],
20# unsigned by [(12,SP)])
21#
22###############################################################################
23 .globl __lshrdi3
24 .type __lshrdi3,@function
25__lshrdi3:
26 mov (12,sp),a0
27 and +63,a0
28 beq __lshrdi3_zero
29
30 cmp +31,a0
31 bhi __lshrdi3_32plus
32
33 # the count is in the range 1-31
34 lsr a0,d0
35
36 mov +32,a1
37 sub a0,a1,a1 # a1 = 32 - count
38 asl a1,d1,a1 # get underflow from MSW -> LSW
39
40 or_lsr a1,d0,a0,d1 # insert underflow into LSW and
41 # shift the MSW
42 rets
43
44 .balign L1_CACHE_BYTES
45 # the count is in the range 32-63
46__lshrdi3_32plus:
47 lsr a0,d1,d0
48 clr d1
49__lshrdi3_zero:
50 rets
51
52 .size __lshrdi3, .-__lshrdi3
diff --git a/arch/mn10300/lib/ashrdi3.c b/arch/mn10300/lib/ashrdi3.c
new file mode 100644
index 000000000000..c54f61ddf0b5
--- /dev/null
+++ b/arch/mn10300/lib/ashrdi3.c
@@ -0,0 +1,61 @@
1/* ashrdi3.c extracted from gcc-2.7.2/libgcc2.c which is: */
2/* Copyright (C) 1989, 1992, 1993, 1994, 1995 Free Software Foundation, Inc.
3
4This file is part of GNU CC.
5
6GNU CC is free software; you can redistribute it and/or modify
7it under the terms of the GNU General Public Licence as published by
8the Free Software Foundation; either version 2, or (at your option)
9any later version.
10
11GNU CC is distributed in the hope that it will be useful,
12but WITHOUT ANY WARRANTY; without even the implied warranty of
13MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14GNU General Public Licence for more details.
15
16You should have received a copy of the GNU General Public Licence
17along with GNU CC; see the file COPYING. If not, write to
18the Free Software Foundation, 59 Temple Place - Suite 330,
19Boston, MA 02111-1307, USA. */
20
21#define BITS_PER_UNIT 8
22
23typedef int SItype __attribute__((mode(SI)));
24typedef unsigned int USItype __attribute__((mode(SI)));
25typedef int DItype __attribute__((mode(DI)));
26typedef int word_type __attribute__((mode(__word__)));
27
28struct DIstruct {
29 SItype low;
30 SItype high;
31};
32
33union DIunion {
34 struct DIstruct s;
35 DItype ll;
36};
37
38DItype __ashrdi3(DItype u, word_type b)
39{
40 union DIunion w;
41 union DIunion uu;
42 word_type bm;
43
44 if (b == 0)
45 return u;
46
47 uu.ll = u;
48
49 bm = (sizeof(SItype) * BITS_PER_UNIT) - b;
50 if (bm <= 0) {
51 /* w.s.high = 1..1 or 0..0 */
52 w.s.high = uu.s.high >> (sizeof(SItype) * BITS_PER_UNIT - 1);
53 w.s.low = uu.s.high >> -bm;
54 } else {
55 USItype carries = (USItype)uu.s.high << bm;
56 w.s.high = uu.s.high >> b;
57 w.s.low = ((USItype)uu.s.low >> b) | carries;
58 }
59
60 return w.ll;
61}
diff --git a/arch/mn10300/lib/bitops.c b/arch/mn10300/lib/bitops.c
new file mode 100644
index 000000000000..440a7dcbf87b
--- /dev/null
+++ b/arch/mn10300/lib/bitops.c
@@ -0,0 +1,51 @@
1/* MN10300 Non-trivial bit operations
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#include <linux/module.h>
12#include <asm/bitops.h>
13#include <asm/system.h>
14
15/*
16 * try flipping a bit using BSET and BCLR
17 */
18void change_bit(int nr, volatile void *addr)
19{
20 if (test_bit(nr, addr))
21 goto try_clear_bit;
22
23try_set_bit:
24 if (!test_and_set_bit(nr, addr))
25 return;
26
27try_clear_bit:
28 if (test_and_clear_bit(nr, addr))
29 return;
30
31 goto try_set_bit;
32}
33
34/*
35 * try flipping a bit using BSET and BCLR and returning the old value
36 */
37int test_and_change_bit(int nr, volatile void *addr)
38{
39 if (test_bit(nr, addr))
40 goto try_clear_bit;
41
42try_set_bit:
43 if (!test_and_set_bit(nr, addr))
44 return 0;
45
46try_clear_bit:
47 if (test_and_clear_bit(nr, addr))
48 return 1;
49
50 goto try_set_bit;
51}
diff --git a/arch/mn10300/lib/checksum.c b/arch/mn10300/lib/checksum.c
new file mode 100644
index 000000000000..274f29ec33c1
--- /dev/null
+++ b/arch/mn10300/lib/checksum.c
@@ -0,0 +1,99 @@
1/* MN10300 Optimised checksumming wrappers
2 *
3 * Copyright (C) 2007 Matsushita Electric Industrial Co., Ltd.
4 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
5 * Written by David Howells (dhowells@redhat.com)
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public Licence
9 * as published by the Free Software Foundation; either version
10 * 2 of the Licence, or (at your option) any later version.
11 */
12#include <linux/module.h>
13#include <linux/errno.h>
14#include <asm/byteorder.h>
15#include <asm/uaccess.h>
16#include <asm/checksum.h>
17#include "internal.h"
18
19static inline unsigned short from32to16(__wsum sum)
20{
21 asm(" add %1,%0 \n"
22 " addc 0xffff,%0 \n"
23 : "=r" (sum)
24 : "r" (sum << 16), "0" (sum & 0xffff0000)
25 );
26 return sum >> 16;
27}
28
29__sum16 ip_fast_csum(const void *iph, unsigned int ihl)
30{
31 return ~do_csum(iph, ihl * 4);
32}
33EXPORT_SYMBOL(ip_fast_csum);
34
35__wsum csum_partial(const void *buff, int len, __wsum sum)
36{
37 __wsum result;
38
39 result = do_csum(buff, len);
40 result += sum;
41 if (sum > result)
42 result++;
43 return result;
44}
45EXPORT_SYMBOL(csum_partial);
46
47__sum16 ip_compute_csum(const void *buff, int len)
48{
49 return ~from32to16(do_csum(buff, len));
50}
51EXPORT_SYMBOL(ip_compute_csum);
52
53__wsum csum_partial_copy(const void *src, void *dst, int len, __wsum sum)
54{
55 copy_from_user(dst, src, len);
56 return csum_partial(dst, len, sum);
57}
58EXPORT_SYMBOL(csum_partial_copy);
59
60__wsum csum_partial_copy_nocheck(const void *src, void *dst,
61 int len, __wsum sum)
62{
63 sum = csum_partial(src, len, sum);
64 memcpy(dst, src, len);
65 return sum;
66}
67EXPORT_SYMBOL(csum_partial_copy_nocheck);
68
69__wsum csum_partial_copy_from_user(const void *src, void *dst,
70 int len, __wsum sum,
71 int *err_ptr)
72{
73 int missing;
74
75 missing = copy_from_user(dst, src, len);
76 if (missing) {
77 memset(dst + len - missing, 0, missing);
78 *err_ptr = -EFAULT;
79 }
80
81 return csum_partial(dst, len, sum);
82}
83EXPORT_SYMBOL(csum_partial_copy_from_user);
84
85__wsum csum_and_copy_to_user(const void *src, void *dst,
86 int len, __wsum sum,
87 int *err_ptr)
88{
89 int missing;
90
91 missing = copy_to_user(dst, src, len);
92 if (missing) {
93 memset(dst + len - missing, 0, missing);
94 *err_ptr = -EFAULT;
95 }
96
97 return csum_partial(src, len, sum);
98}
99EXPORT_SYMBOL(csum_and_copy_to_user);
diff --git a/arch/mn10300/lib/delay.c b/arch/mn10300/lib/delay.c
new file mode 100644
index 000000000000..cce66bc0822d
--- /dev/null
+++ b/arch/mn10300/lib/delay.c
@@ -0,0 +1,50 @@
1/* MN10300 Short delay interpolation routines
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#include <linux/module.h>
12#include <linux/sched.h>
13#include <linux/delay.h>
14#include <asm/div64.h>
15
16/*
17 * basic delay loop
18 */
19void __delay(unsigned long loops)
20{
21 int d0;
22
23 asm volatile(
24 " bra 1f \n"
25 " .align 4 \n"
26 "1: bra 2f \n"
27 " .align 4 \n"
28 "2: add -1,%0 \n"
29 " bne 2b \n"
30 : "=&d" (d0)
31 : "0" (loops));
32}
33EXPORT_SYMBOL(__delay);
34
35/*
36 * handle a delay specified in terms of microseconds
37 */
38void __udelay(unsigned long usecs)
39{
40 signed long ioclk, stop;
41
42 /* usecs * CLK / 1E6 */
43 stop = __muldiv64u(usecs, MN10300_TSCCLK, 1000000);
44 stop = TMTSCBC - stop;
45
46 do {
47 ioclk = TMTSCBC;
48 } while (stop < ioclk);
49}
50EXPORT_SYMBOL(__udelay);
diff --git a/arch/mn10300/lib/do_csum.S b/arch/mn10300/lib/do_csum.S
new file mode 100644
index 000000000000..e138994e1667
--- /dev/null
+++ b/arch/mn10300/lib/do_csum.S
@@ -0,0 +1,162 @@
1/* Optimised simple memory checksum
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#include <asm/cache.h>
12
13 .section .text
14 .balign L1_CACHE_BYTES
15
16###############################################################################
17#
18# unsigned int do_csum(const unsigned char *buff, size_t len)
19#
20###############################################################################
21 .globl do_csum
22 .type do_csum,@function
23do_csum:
24 movm [d2,d3],(sp)
25 mov d0,(12,sp)
26 mov d1,(16,sp)
27 mov d1,d2 # count
28 mov d0,a0 # buff
29 clr d1 # accumulator
30
31 cmp +0,d2
32 beq do_csum_done # return if zero-length buffer
33
34 # 4-byte align the buffer pointer
35 btst +3,a0
36 beq do_csum_now_4b_aligned
37
38 btst +1,a0
39 beq do_csum_addr_not_odd
40 movbu (a0),d0
41 inc a0
42 asl +8,d0
43 add d0,d1
44 addc +0,d1
45 add -1,d2
46do_csum_addr_not_odd:
47
48 cmp +2,d2
49 bcs do_csum_fewer_than_4
50 btst +2,a0
51 beq do_csum_now_4b_aligned
52 movhu (a0+),d0
53 add d0,d1
54 addc +0,d1
55 add -2,d2
56 cmp +4,d2
57 bcs do_csum_fewer_than_4
58
59do_csum_now_4b_aligned:
60 # we want to checksum as much as we can in chunks of 32 bytes
61 cmp +31,d2
62 bls do_csum_remainder # 4-byte aligned remainder
63
64 add -32,d2
65 mov +32,d3
66
67do_csum_loop:
68 mov (a0+),d0
69 add d0,d1
70 mov (a0+),e0
71 addc e0,d1
72 mov (a0+),e1
73 addc e1,d1
74 mov (a0+),e3
75 addc e3,d1
76 mov (a0+),d0
77 addc d0,d1
78 mov (a0+),e0
79 addc e0,d1
80 mov (a0+),e1
81 addc e1,d1
82 mov (a0+),e3
83 addc e3,d1
84 addc +0,d1
85
86 sub d3,d2
87 bcc do_csum_loop
88
89 add d3,d2
90 beq do_csum_done
91
92do_csum_remainder:
93 # cut 16-31 bytes down to 0-15
94 cmp +16,d2
95 bcs do_csum_fewer_than_16
96 mov (a0+),d0
97 add d0,d1
98 mov (a0+),e0
99 addc e0,d1
100 mov (a0+),e1
101 addc e1,d1
102 mov (a0+),e3
103 addc e3,d1
104 addc +0,d1
105 add -16,d2
106 beq do_csum_done
107
108do_csum_fewer_than_16:
109 # copy the remaining whole words
110 cmp +4,d2
111 bcs do_csum_fewer_than_4
112 cmp +8,d2
113 bcs do_csum_one_word
114 cmp +12,d2
115 bcs do_csum_two_words
116 mov (a0+),d0
117 add d0,d1
118 addc +0,d1
119do_csum_two_words:
120 mov (a0+),d0
121 add d0,d1
122 addc +0,d1
123do_csum_one_word:
124 mov (a0+),d0
125 add d0,d1
126 addc +0,d1
127
128do_csum_fewer_than_4:
129 and +3,d2
130 beq do_csum_done
131 xor_cmp d0,d0,+2,d2
132 bcs do_csum_fewer_than_2
133 movhu (a0+),d0
134do_csum_fewer_than_2:
135 and +1,d2
136 beq do_csum_add_last_bit
137 movbu (a0),d3
138 add d3,d0
139do_csum_add_last_bit:
140 add d0,d1
141 addc +0,d1
142
143do_csum_done:
144 # compress the checksum down to 16 bits
145 mov +0xffff0000,d2
146 and d1,d2
147 asl +16,d1
148 add d2,d1,d0
149 addc +0xffff,d0
150 lsr +16,d0
151
152 # flip the halves of the word result if the buffer was oddly aligned
153 mov (12,sp),d1
154 and +1,d1
155 beq do_csum_not_oddly_aligned
156 swaph d0,d0 # exchange bits 15:8 with 7:0
157
158do_csum_not_oddly_aligned:
159 ret [d2,d3],8
160
161do_csum_end:
162 .size do_csum, do_csum_end-do_csum
diff --git a/arch/mn10300/lib/internal.h b/arch/mn10300/lib/internal.h
new file mode 100644
index 000000000000..0014eee5f04f
--- /dev/null
+++ b/arch/mn10300/lib/internal.h
@@ -0,0 +1,15 @@
1/* Internal definitions for the arch part of the kernel library
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11
12/*
13 * do_csum.S
14 */
15extern unsigned int do_csum(const unsigned char *, size_t);
diff --git a/arch/mn10300/lib/lshrdi3.c b/arch/mn10300/lib/lshrdi3.c
new file mode 100644
index 000000000000..e05e64e9ce96
--- /dev/null
+++ b/arch/mn10300/lib/lshrdi3.c
@@ -0,0 +1,60 @@
1/* lshrdi3.c extracted from gcc-2.7.2/libgcc2.c which is: */
2/* Copyright (C) 1989, 1992, 1993, 1994, 1995 Free Software Foundation, Inc.
3
4This file is part of GNU CC.
5
6GNU CC is free software; you can redistribute it and/or modify
7it under the terms of the GNU General Public Licence as published by
8the Free Software Foundation; either version 2, or (at your option)
9any later version.
10
11GNU CC is distributed in the hope that it will be useful,
12but WITHOUT ANY WARRANTY; without even the implied warranty of
13MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14GNU General Public Licence for more details.
15
16You should have received a copy of the GNU General Public Licence
17along with GNU CC; see the file COPYING. If not, write to
18the Free Software Foundation, 59 Temple Place - Suite 330,
19Boston, MA 02111-1307, USA. */
20
21#define BITS_PER_UNIT 8
22
23typedef int SItype __attribute__((mode(SI)));
24typedef unsigned int USItype __attribute__((mode(SI)));
25typedef int DItype __attribute__((mode(DI)));
26typedef int word_type __attribute__((mode(__word__)));
27
28struct DIstruct {
29 SItype low;
30 SItype high;
31};
32
33union DIunion {
34 struct DIstruct s;
35 DItype ll;
36};
37
38DItype __lshrdi3(DItype u, word_type b)
39{
40 union DIunion w;
41 word_type bm;
42 union DIunion uu;
43
44 if (b == 0)
45 return u;
46
47 uu.ll = u;
48
49 bm = (sizeof(SItype) * BITS_PER_UNIT) - b;
50 if (bm <= 0) {
51 w.s.high = 0;
52 w.s.low = (USItype) uu.s.high >> -bm;
53 } else {
54 USItype carries = (USItype) uu.s.high << bm;
55 w.s.high = (USItype) uu.s.high >> b;
56 w.s.low = ((USItype) uu.s.low >> b) | carries;
57 }
58
59 return w.ll;
60}
diff --git a/arch/mn10300/lib/memcpy.S b/arch/mn10300/lib/memcpy.S
new file mode 100644
index 000000000000..25fb9bb2604f
--- /dev/null
+++ b/arch/mn10300/lib/memcpy.S
@@ -0,0 +1,135 @@
1/* MN10300 Optimised simple memory to memory copy
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#include <asm/cache.h>
12
13 .section .text
14 .balign L1_CACHE_BYTES
15
16###############################################################################
17#
18# void *memcpy(void *dst, const void *src, size_t n)
19#
20###############################################################################
21 .globl memcpy
22 .type memcpy,@function
23memcpy:
24 movm [d2,d3],(sp)
25 mov d0,(12,sp)
26 mov d1,(16,sp)
27 mov (20,sp),d2 # count
28 mov d0,a0 # dst
29 mov d1,a1 # src
30 mov d0,e3 # the return value
31
32 cmp +0,d2
33 beq memcpy_done # return if zero-length copy
34
35 # see if the three parameters are all four-byte aligned
36 or d0,d1,d3
37 or d2,d3
38 and +3,d3
39 bne memcpy_1 # jump if not
40
41 # we want to transfer as much as we can in chunks of 32 bytes
42 cmp +31,d2
43 bls memcpy_4_remainder # 4-byte aligned remainder
44
45 movm [exreg1],(sp)
46 add -32,d2
47 mov +32,d3
48
49memcpy_4_loop:
50 mov (a1+),d0
51 mov (a1+),d1
52 mov (a1+),e0
53 mov (a1+),e1
54 mov (a1+),e4
55 mov (a1+),e5
56 mov (a1+),e6
57 mov (a1+),e7
58 mov d0,(a0+)
59 mov d1,(a0+)
60 mov e0,(a0+)
61 mov e1,(a0+)
62 mov e4,(a0+)
63 mov e5,(a0+)
64 mov e6,(a0+)
65 mov e7,(a0+)
66
67 sub d3,d2
68 bcc memcpy_4_loop
69
70 movm (sp),[exreg1]
71 add d3,d2
72 beq memcpy_4_no_remainder
73
74memcpy_4_remainder:
75 # cut 4-7 words down to 0-3
76 cmp +16,d2
77 bcs memcpy_4_three_or_fewer_words
78 mov (a1+),d0
79 mov (a1+),d1
80 mov (a1+),e0
81 mov (a1+),e1
82 mov d0,(a0+)
83 mov d1,(a0+)
84 mov e0,(a0+)
85 mov e1,(a0+)
86 add -16,d2
87 beq memcpy_4_no_remainder
88
89 # copy the remaining 1, 2 or 3 words
90memcpy_4_three_or_fewer_words:
91 cmp +8,d2
92 bcs memcpy_4_one_word
93 beq memcpy_4_two_words
94 mov (a1+),d0
95 mov d0,(a0+)
96memcpy_4_two_words:
97 mov (a1+),d0
98 mov d0,(a0+)
99memcpy_4_one_word:
100 mov (a1+),d0
101 mov d0,(a0+)
102
103memcpy_4_no_remainder:
104 # check we copied the correct amount
105 # TODO: REMOVE CHECK
106 sub e3,a0,d2
107 mov (20,sp),d1
108 cmp d2,d1
109 beq memcpy_done
110 break
111 break
112 break
113
114memcpy_done:
115 mov e3,a0
116 ret [d2,d3],8
117
118 # handle misaligned copying
119memcpy_1:
120 add -1,d2
121 mov +1,d3
122 setlb # setlb requires the next insns
123 # to occupy exactly 4 bytes
124
125 sub d3,d2
126 movbu (a1),d0
127 movbu d0,(a0)
128 add_add d3,a1,d3,a0
129 lcc
130
131 mov e3,a0
132 ret [d2,d3],8
133
134memcpy_end:
135 .size memcpy, memcpy_end-memcpy
diff --git a/arch/mn10300/lib/memmove.S b/arch/mn10300/lib/memmove.S
new file mode 100644
index 000000000000..20b07b62b77c
--- /dev/null
+++ b/arch/mn10300/lib/memmove.S
@@ -0,0 +1,160 @@
1/* MN10300 Optimised simple memory to memory copy, with support for overlapping
2 * regions
3 *
4 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
5 * Written by David Howells (dhowells@redhat.com)
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public Licence
9 * as published by the Free Software Foundation; either version
10 * 2 of the Licence, or (at your option) any later version.
11 */
12#include <asm/cache.h>
13
14 .section .text
15 .balign L1_CACHE_BYTES
16
17###############################################################################
18#
19# void *memmove(void *dst, const void *src, size_t n)
20#
21###############################################################################
22 .globl memmove
23 .type memmove,@function
24memmove:
25 # fall back to memcpy if dst < src to work bottom up
26 cmp d1,d0
27 bcs memmove_memcpy
28
29 # work top down
30 movm [d2,d3],(sp)
31 mov d0,(12,sp)
32 mov d1,(16,sp)
33 mov (20,sp),d2 # count
34 add d0,d2,a0 # dst end
35 add d1,d2,a1 # src end
36 mov d0,e3 # the return value
37
38 cmp +0,d2
39 beq memmove_done # return if zero-length copy
40
41 # see if the three parameters are all four-byte aligned
42 or d0,d1,d3
43 or d2,d3
44 and +3,d3
45 bne memmove_1 # jump if not
46
47 # we want to transfer as much as we can in chunks of 32 bytes
48 add -4,a1
49 cmp +31,d2
50 bls memmove_4_remainder # 4-byte aligned remainder
51
52 add -32,d2
53 mov +32,d3
54
55memmove_4_loop:
56 mov (a1),d0
57 sub_sub +4,a1,+4,a0
58 mov d0,(a0)
59 mov (a1),d1
60 sub_sub +4,a1,+4,a0
61 mov d1,(a0)
62
63 mov (a1),d0
64 sub_sub +4,a1,+4,a0
65 mov d0,(a0)
66 mov (a1),d1
67 sub_sub +4,a1,+4,a0
68 mov d1,(a0)
69
70 mov (a1),d0
71 sub_sub +4,a1,+4,a0
72 mov d0,(a0)
73 mov (a1),d1
74 sub_sub +4,a1,+4,a0
75 mov d1,(a0)
76
77 mov (a1),d0
78 sub_sub +4,a1,+4,a0
79 mov d0,(a0)
80 mov (a1),d1
81 sub_sub +4,a1,+4,a0
82 mov d1,(a0)
83
84 sub d3,d2
85 bcc memmove_4_loop
86
87 add d3,d2
88 beq memmove_4_no_remainder
89
90memmove_4_remainder:
91 # cut 4-7 words down to 0-3
92 cmp +16,d2
93 bcs memmove_4_three_or_fewer_words
94 mov (a1),d0
95 sub_sub +4,a1,+4,a0
96 mov d0,(a0)
97 mov (a1),d1
98 sub_sub +4,a1,+4,a0
99 mov d1,(a0)
100 mov (a1),e0
101 sub_sub +4,a1,+4,a0
102 mov e0,(a0)
103 mov (a1),e1
104 sub_sub +4,a1,+4,a0
105 mov e1,(a0)
106 add -16,d2
107 beq memmove_4_no_remainder
108
109 # copy the remaining 1, 2 or 3 words
110memmove_4_three_or_fewer_words:
111 cmp +8,d2
112 bcs memmove_4_one_word
113 beq memmove_4_two_words
114 mov (a1),d0
115 sub_sub +4,a1,+4,a0
116 mov d0,(a0)
117memmove_4_two_words:
118 mov (a1),d0
119 sub_sub +4,a1,+4,a0
120 mov d0,(a0)
121memmove_4_one_word:
122 mov (a1),d0
123 sub_sub +4,a1,+4,a0
124 mov d0,(a0)
125
126memmove_4_no_remainder:
127 # check we copied the correct amount
128 # TODO: REMOVE CHECK
129 sub e3,a0,d2
130 beq memmove_done
131 break
132 break
133 break
134
135memmove_done:
136 mov e3,a0
137 ret [d2,d3],8
138
139 # handle misaligned copying
140memmove_1:
141 add -1,a1
142 add -1,d2
143 mov +1,d3
144 setlb # setlb requires the next insns
145 # to occupy exactly 4 bytes
146
147 sub d3,d2
148 movbu (a1),d0
149 sub_sub d3,a1,d3,a0
150 movbu d0,(a0)
151 lcc
152
153 mov e3,a0
154 ret [d2,d3],8
155
156memmove_memcpy:
157 jmp memcpy
158
159memmove_end:
160 .size memmove, memmove_end-memmove
diff --git a/arch/mn10300/lib/memset.S b/arch/mn10300/lib/memset.S
new file mode 100644
index 000000000000..bc02e39629b7
--- /dev/null
+++ b/arch/mn10300/lib/memset.S
@@ -0,0 +1,121 @@
1/* Optimised simple memory fill
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#include <asm/cache.h>
12
13 .section .text
14 .balign L1_CACHE_BYTES
15
16###############################################################################
17#
18# void *memset(void *dst, int c, size_t n)
19#
20###############################################################################
21 .globl memset
22 .type memset,@function
23memset:
24 movm [d2,d3],(sp)
25 mov d0,(12,sp)
26 mov d1,(16,sp)
27 mov (20,sp),d2 # count
28 mov d0,a0 # dst
29 mov d0,e3 # the return value
30
31 cmp +0,d2
32 beq memset_done # return if zero-length fill
33
34 # see if the region parameters are four-byte aligned
35 or d0,d2,d3
36 and +3,d3
37 bne memset_1 # jump if not
38
39 extbu d1
40 mov_asl d1,d3,8,d1
41 or_asl d1,d3,8,d1
42 or_asl d1,d3,8,d1
43 or d3,d1
44
45 # we want to transfer as much as we can in chunks of 32 bytes
46 cmp +31,d2
47 bls memset_4_remainder # 4-byte aligned remainder
48
49 add -32,d2
50 mov +32,d3
51
52memset_4_loop:
53 mov d1,(a0+)
54 mov d1,(a0+)
55 mov d1,(a0+)
56 mov d1,(a0+)
57 mov d1,(a0+)
58 mov d1,(a0+)
59 mov d1,(a0+)
60 mov d1,(a0+)
61
62 sub d3,d2
63 bcc memset_4_loop
64
65 add d3,d2
66 beq memset_4_no_remainder
67
68memset_4_remainder:
69 # cut 4-7 words down to 0-3
70 cmp +16,d2
71 bcs memset_4_three_or_fewer_words
72 mov d1,(a0+)
73 mov d1,(a0+)
74 mov d1,(a0+)
75 mov d1,(a0+)
76 add -16,d2
77 beq memset_4_no_remainder
78
79 # copy the remaining 1, 2 or 3 words
80memset_4_three_or_fewer_words:
81 cmp +8,d2
82 bcs memset_4_one_word
83 beq memset_4_two_words
84 mov d1,(a0+)
85memset_4_two_words:
86 mov d1,(a0+)
87memset_4_one_word:
88 mov d1,(a0+)
89
90memset_4_no_remainder:
91 # check we set the correct amount
92 # TODO: REMOVE CHECK
93 sub e3,a0,d2
94 mov (20,sp),d1
95 cmp d2,d1
96 beq memset_done
97 break
98 break
99 break
100
101memset_done:
102 mov e3,a0
103 ret [d2,d3],8
104
105 # handle misaligned copying
106memset_1:
107 add -1,d2
108 mov +1,d3
109 setlb # setlb requires the next insns
110 # to occupy exactly 4 bytes
111
112 sub d3,d2
113 movbu d1,(a0)
114 inc a0
115 lcc
116
117 mov e3,a0
118 ret [d2,d3],8
119
120memset_end:
121 .size memset, memset_end-memset
diff --git a/arch/mn10300/lib/negdi2.c b/arch/mn10300/lib/negdi2.c
new file mode 100644
index 000000000000..eae4ecdd5f69
--- /dev/null
+++ b/arch/mn10300/lib/negdi2.c
@@ -0,0 +1,57 @@
1/* More subroutines needed by GCC output code on some machines. */
2/* Compile this one with gcc. */
3/* Copyright (C) 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
4 2000, 2001 Free Software Foundation, Inc.
5
6This file is part of GNU CC.
7
8GNU CC is free software; you can redistribute it and/or modify
9it under the terms of the GNU General Public Licence as published by
10the Free Software Foundation; either version 2, or (at your option)
11any later version.
12
13In addition to the permissions in the GNU General Public Licence, the
14Free Software Foundation gives you unlimited permission to link the
15compiled version of this file into combinations with other programs,
16and to distribute those combinations without any restriction coming
17from the use of this file. (The General Public Licence restrictions
18do apply in other respects; for example, they cover modification of
19the file, and distribution when not linked into a combine
20executable.)
21
22GNU CC is distributed in the hope that it will be useful,
23but WITHOUT ANY WARRANTY; without even the implied warranty of
24MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
25GNU General Public Licence for more details.
26
27You should have received a copy of the GNU General Public Licence
28along with GNU CC; see the file COPYING. If not, write to
29the Free Software Foundation, 59 Temple Place - Suite 330,
30Boston, MA 02111-1307, USA. */
31
32/* It is incorrect to include config.h here, because this file is being
33 compiled for the target, and hence definitions concerning only the host
34 do not apply. */
35
36#include <linux/types.h>
37
38union DWunion {
39 s64 ll;
40 struct {
41 s32 low;
42 s32 high;
43 } s;
44};
45
46s64 __negdi2(s64 u)
47{
48 union DWunion w;
49 union DWunion uu;
50
51 uu.ll = u;
52
53 w.s.low = -uu.s.low;
54 w.s.high = -uu.s.high - ((u32) w.s.low > 0);
55
56 return w.ll;
57}
diff --git a/arch/mn10300/lib/usercopy.c b/arch/mn10300/lib/usercopy.c
new file mode 100644
index 000000000000..a75b203059c1
--- /dev/null
+++ b/arch/mn10300/lib/usercopy.c
@@ -0,0 +1,166 @@
1/* MN10300 Userspace accessor functions
2 *
3 * Copyright (C) 2007 Matsushita Electric Industrial Co., Ltd.
4 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
5 * Written by David Howells (dhowells@redhat.com)
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public Licence
9 * as published by the Free Software Foundation; either version
10 * 2 of the Licence, or (at your option) any later version.
11 */
12#include <asm/uaccess.h>
13
14unsigned long
15__generic_copy_to_user(void *to, const void *from, unsigned long n)
16{
17 if (access_ok(VERIFY_WRITE, to, n))
18 __copy_user(to, from, n);
19 return n;
20}
21
22unsigned long
23__generic_copy_from_user(void *to, const void *from, unsigned long n)
24{
25 if (access_ok(VERIFY_READ, from, n))
26 __copy_user_zeroing(to, from, n);
27 return n;
28}
29
30/*
31 * Copy a null terminated string from userspace.
32 */
33#define __do_strncpy_from_user(dst, src, count, res) \
34do { \
35 int w; \
36 asm volatile( \
37 " mov %1,%0\n" \
38 " cmp 0,%1\n" \
39 " beq 2f\n" \
40 "0:\n" \
41 " movbu (%5),%2\n" \
42 "1:\n" \
43 " movbu %2,(%6)\n" \
44 " inc %5\n" \
45 " inc %6\n" \
46 " cmp 0,%2\n" \
47 " beq 2f\n" \
48 " add -1,%1\n" \
49 " bne 0b\n" \
50 "2:\n" \
51 " sub %1,%0\n" \
52 "3:\n" \
53 " .section .fixup,\"ax\"\n" \
54 "4:\n" \
55 " mov %3,%0\n" \
56 " jmp 3b\n" \
57 " .previous\n" \
58 " .section __ex_table,\"a\"\n" \
59 " .balign 4\n" \
60 " .long 0b,4b\n" \
61 " .long 1b,4b\n" \
62 " .previous" \
63 :"=&r"(res), "=r"(count), "=&r"(w) \
64 :"i"(-EFAULT), "1"(count), "a"(src), "a"(dst) \
65 :"memory"); \
66} while (0)
67
68long
69__strncpy_from_user(char *dst, const char *src, long count)
70{
71 long res;
72 __do_strncpy_from_user(dst, src, count, res);
73 return res;
74}
75
76long
77strncpy_from_user(char *dst, const char *src, long count)
78{
79 long res = -EFAULT;
80 if (access_ok(VERIFY_READ, src, 1))
81 __do_strncpy_from_user(dst, src, count, res);
82 return res;
83}
84
85
86/*
87 * Clear a userspace memory
88 */
89#define __do_clear_user(addr, size) \
90do { \
91 int w; \
92 asm volatile( \
93 " cmp 0,%0\n" \
94 " beq 1f\n" \
95 " clr %1\n" \
96 "0: movbu %1,(%3,%2)\n" \
97 " inc %3\n" \
98 " cmp %0,%3\n" \
99 " bne 0b\n" \
100 "1:\n" \
101 " sub %3,%0\n" \
102 "2:\n" \
103 ".section .fixup,\"ax\"\n" \
104 "3: jmp 2b\n" \
105 ".previous\n" \
106 ".section __ex_table,\"a\"\n" \
107 " .balign 4\n" \
108 " .long 0b,3b\n" \
109 ".previous\n" \
110 : "+r"(size), "=&r"(w) \
111 : "a"(addr), "d"(0) \
112 : "memory"); \
113} while (0)
114
115unsigned long
116__clear_user(void *to, unsigned long n)
117{
118 __do_clear_user(to, n);
119 return n;
120}
121
122unsigned long
123clear_user(void *to, unsigned long n)
124{
125 if (access_ok(VERIFY_WRITE, to, n))
126 __do_clear_user(to, n);
127 return n;
128}
129
130/*
131 * Return the size of a string (including the ending 0)
132 *
133 * Return 0 on exception, a value greater than N if too long
134 */
135long strnlen_user(const char *s, long n)
136{
137 unsigned long res, w;
138
139 if (!__addr_ok(s))
140 return 0;
141
142 if (n < 0 || n + (u_long) s > current_thread_info()->addr_limit.seg)
143 n = current_thread_info()->addr_limit.seg - (u_long)s;
144
145 asm volatile(
146 "0: cmp %4,%0\n"
147 " beq 2f\n"
148 "1: movbu (%0,%3),%1\n"
149 " inc %0\n"
150 " cmp 0,%1\n"
151 " beq 3f\n"
152 " bra 0b\n"
153 "2: clr %0\n"
154 "3:\n"
155 ".section .fixup,\"ax\"\n"
156 "4: jmp 2b\n"
157 ".previous\n"
158 ".section __ex_table,\"a\"\n"
159 " .balign 4\n"
160 " .long 1b,4b\n"
161 ".previous\n"
162 :"=d"(res), "=&r"(w)
163 :"0"(0), "a"(s), "r"(n)
164 :"memory");
165 return res;
166}
diff --git a/arch/mn10300/mm/Makefile b/arch/mn10300/mm/Makefile
new file mode 100644
index 000000000000..28b9d983db0c
--- /dev/null
+++ b/arch/mn10300/mm/Makefile
@@ -0,0 +1,14 @@
1#
2# Makefile for the MN10300-specific memory management code
3#
4
5obj-y := \
6 init.o fault.o pgtable.o extable.o tlb-mn10300.o mmu-context.o \
7 misalignment.o dma-alloc.o
8
9ifneq ($(CONFIG_MN10300_CACHE_DISABLED),y)
10obj-y += cache.o cache-mn10300.o
11ifeq ($(CONFIG_MN10300_CACHE_WBACK),y)
12obj-y += cache-flush-mn10300.o
13endif
14endif
diff --git a/arch/mn10300/mm/cache-flush-mn10300.S b/arch/mn10300/mm/cache-flush-mn10300.S
new file mode 100644
index 000000000000..c8ed1cbac107
--- /dev/null
+++ b/arch/mn10300/mm/cache-flush-mn10300.S
@@ -0,0 +1,192 @@
1/* MN10300 CPU core caching routines
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11
12#include <linux/sys.h>
13#include <linux/linkage.h>
14#include <asm/smp.h>
15#include <asm/page.h>
16#include <asm/cache.h>
17
18 .am33_2
19 .globl mn10300_dcache_flush
20 .globl mn10300_dcache_flush_page
21 .globl mn10300_dcache_flush_range
22 .globl mn10300_dcache_flush_range2
23 .globl mn10300_dcache_flush_inv
24 .globl mn10300_dcache_flush_inv_page
25 .globl mn10300_dcache_flush_inv_range
26 .globl mn10300_dcache_flush_inv_range2
27
28###############################################################################
29#
30# void mn10300_dcache_flush(void)
31# Flush the entire data cache back to RAM
32#
33###############################################################################
34 ALIGN
35mn10300_dcache_flush:
36 movhu (CHCTR),d0
37 btst CHCTR_DCEN,d0
38 beq mn10300_dcache_flush_end
39
40 # read the addresses tagged in the cache's tag RAM and attempt to flush
41 # those addresses specifically
42 # - we rely on the hardware to filter out invalid tag entry addresses
43 mov DCACHE_TAG(0,0),a0 # dcache tag RAM access address
44 mov DCACHE_PURGE(0,0),a1 # dcache purge request address
45 mov L1_CACHE_NWAYS*L1_CACHE_NENTRIES,d1 # total number of entries
46
47mn10300_dcache_flush_loop:
48 mov (a0),d0
49 and L1_CACHE_TAG_ADDRESS|L1_CACHE_TAG_ENTRY,d0
50 or L1_CACHE_TAG_VALID,d0 # retain valid entries in the
51 # cache
52 mov d0,(a1) # conditional purge
53
54mn10300_dcache_flush_skip:
55 add L1_CACHE_BYTES,a0
56 add L1_CACHE_BYTES,a1
57 add -1,d1
58 bne mn10300_dcache_flush_loop
59
60mn10300_dcache_flush_end:
61 ret [],0
62
63###############################################################################
64#
65# void mn10300_dcache_flush_page(unsigned start)
66# void mn10300_dcache_flush_range(unsigned start, unsigned end)
67# void mn10300_dcache_flush_range2(unsigned start, unsigned size)
68# Flush a range of addresses on a page in the dcache
69#
70###############################################################################
71 ALIGN
72mn10300_dcache_flush_page:
73 mov PAGE_SIZE,d1
74mn10300_dcache_flush_range2:
75 add d0,d1
76mn10300_dcache_flush_range:
77 movm [d2,d3],(sp)
78
79 movhu (CHCTR),d2
80 btst CHCTR_DCEN,d2
81 beq mn10300_dcache_flush_range_end
82
83 # round start addr down
84 and L1_CACHE_TAG_ADDRESS|L1_CACHE_TAG_ENTRY,d0
85 mov d0,a1
86
87 add L1_CACHE_BYTES,d1 # round end addr up
88 and L1_CACHE_TAG_ADDRESS|L1_CACHE_TAG_ENTRY,d1
89
90 # write a request to flush all instances of an address from the cache
91 mov DCACHE_PURGE(0,0),a0
92 mov a1,d0
93 and L1_CACHE_TAG_ENTRY,d0
94 add d0,a0 # starting dcache purge control
95 # reg address
96
97 sub a1,d1
98 lsr L1_CACHE_SHIFT,d1 # total number of entries to
99 # examine
100
101 or L1_CACHE_TAG_VALID,a1 # retain valid entries in the
102 # cache
103
104mn10300_dcache_flush_range_loop:
105 mov a1,(L1_CACHE_WAYDISP*0,a0) # conditionally purge this line
106 # all ways
107
108 add L1_CACHE_BYTES,a0
109 add L1_CACHE_BYTES,a1
110 and ~L1_CACHE_WAYDISP,a0 # make sure way stay on way 0
111 add -1,d1
112 bne mn10300_dcache_flush_range_loop
113
114mn10300_dcache_flush_range_end:
115 ret [d2,d3],8
116
117###############################################################################
118#
119# void mn10300_dcache_flush_inv(void)
120# Flush the entire data cache and invalidate all entries
121#
122###############################################################################
123 ALIGN
124mn10300_dcache_flush_inv:
125 movhu (CHCTR),d0
126 btst CHCTR_DCEN,d0
127 beq mn10300_dcache_flush_inv_end
128
129 # hit each line in the dcache with an unconditional purge
130 mov DCACHE_PURGE(0,0),a1 # dcache purge request address
131 mov L1_CACHE_NWAYS*L1_CACHE_NENTRIES,d1 # total number of entries
132
133mn10300_dcache_flush_inv_loop:
134 mov (a1),d0 # unconditional purge
135
136 add L1_CACHE_BYTES,a1
137 add -1,d1
138 bne mn10300_dcache_flush_inv_loop
139
140mn10300_dcache_flush_inv_end:
141 ret [],0
142
143###############################################################################
144#
145# void mn10300_dcache_flush_inv_page(unsigned start)
146# void mn10300_dcache_flush_inv_range(unsigned start, unsigned end)
147# void mn10300_dcache_flush_inv_range2(unsigned start, unsigned size)
148# Flush and invalidate a range of addresses on a page in the dcache
149#
150###############################################################################
151 ALIGN
152mn10300_dcache_flush_inv_page:
153 mov PAGE_SIZE,d1
154mn10300_dcache_flush_inv_range2:
155 add d0,d1
156mn10300_dcache_flush_inv_range:
157 movm [d2,d3],(sp)
158 movhu (CHCTR),d2
159 btst CHCTR_DCEN,d2
160 beq mn10300_dcache_flush_inv_range_end
161
162 and L1_CACHE_TAG_ADDRESS|L1_CACHE_TAG_ENTRY,d0 # round start
163 # addr down
164 mov d0,a1
165
166 add L1_CACHE_BYTES,d1 # round end addr up
167 and L1_CACHE_TAG_ADDRESS|L1_CACHE_TAG_ENTRY,d1
168
169 # write a request to flush and invalidate all instances of an address
170 # from the cache
171 mov DCACHE_PURGE(0,0),a0
172 mov a1,d0
173 and L1_CACHE_TAG_ENTRY,d0
174 add d0,a0 # starting dcache purge control
175 # reg address
176
177 sub a1,d1
178 lsr L1_CACHE_SHIFT,d1 # total number of entries to
179 # examine
180
181mn10300_dcache_flush_inv_range_loop:
182 mov a1,(L1_CACHE_WAYDISP*0,a0) # conditionally purge this line
183 # in all ways
184
185 add L1_CACHE_BYTES,a0
186 add L1_CACHE_BYTES,a1
187 and ~L1_CACHE_WAYDISP,a0 # make sure way stay on way 0
188 add -1,d1
189 bne mn10300_dcache_flush_inv_range_loop
190
191mn10300_dcache_flush_inv_range_end:
192 ret [d2,d3],8
diff --git a/arch/mn10300/mm/cache-mn10300.S b/arch/mn10300/mm/cache-mn10300.S
new file mode 100644
index 000000000000..e839d0aedd69
--- /dev/null
+++ b/arch/mn10300/mm/cache-mn10300.S
@@ -0,0 +1,289 @@
1/* MN10300 CPU core caching routines
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#include <linux/sys.h>
12#include <linux/linkage.h>
13#include <asm/smp.h>
14#include <asm/page.h>
15#include <asm/cache.h>
16
17#define mn10300_dcache_inv_range_intr_interval \
18 +((1 << MN10300_DCACHE_INV_RANGE_INTR_LOG2_INTERVAL) - 1)
19
20#if mn10300_dcache_inv_range_intr_interval > 0xff
21#error MN10300_DCACHE_INV_RANGE_INTR_LOG2_INTERVAL must be 8 or less
22#endif
23
24 .am33_2
25
26 .globl mn10300_icache_inv
27 .globl mn10300_dcache_inv
28 .globl mn10300_dcache_inv_range
29 .globl mn10300_dcache_inv_range2
30 .globl mn10300_dcache_inv_page
31
32###############################################################################
33#
34# void mn10300_icache_inv(void)
35# Invalidate the entire icache
36#
37###############################################################################
38 ALIGN
39mn10300_icache_inv:
40 mov CHCTR,a0
41
42 movhu (a0),d0
43 btst CHCTR_ICEN,d0
44 beq mn10300_icache_inv_end
45
46 mov epsw,d1
47 and ~EPSW_IE,epsw
48 nop
49 nop
50
51 # disable the icache
52 and ~CHCTR_ICEN,d0
53 movhu d0,(a0)
54
55 # and wait for it to calm down
56 setlb
57 movhu (a0),d0
58 btst CHCTR_ICBUSY,d0
59 lne
60
61 # invalidate
62 or CHCTR_ICINV,d0
63 movhu d0,(a0)
64
65 # wait for the cache to finish
66 mov CHCTR,a0
67 setlb
68 movhu (a0),d0
69 btst CHCTR_ICBUSY,d0
70 lne
71
72 # and reenable it
73 and ~CHCTR_ICINV,d0
74 or CHCTR_ICEN,d0
75 movhu d0,(a0)
76 movhu (a0),d0
77
78 mov d1,epsw
79
80mn10300_icache_inv_end:
81 ret [],0
82
83###############################################################################
84#
85# void mn10300_dcache_inv(void)
86# Invalidate the entire dcache
87#
88###############################################################################
89 ALIGN
90mn10300_dcache_inv:
91 mov CHCTR,a0
92
93 movhu (a0),d0
94 btst CHCTR_DCEN,d0
95 beq mn10300_dcache_inv_end
96
97 mov epsw,d1
98 and ~EPSW_IE,epsw
99 nop
100 nop
101
102 # disable the dcache
103 and ~CHCTR_DCEN,d0
104 movhu d0,(a0)
105
106 # and wait for it to calm down
107 setlb
108 movhu (a0),d0
109 btst CHCTR_DCBUSY,d0
110 lne
111
112 # invalidate
113 or CHCTR_DCINV,d0
114 movhu d0,(a0)
115
116 # wait for the cache to finish
117 mov CHCTR,a0
118 setlb
119 movhu (a0),d0
120 btst CHCTR_DCBUSY,d0
121 lne
122
123 # and reenable it
124 and ~CHCTR_DCINV,d0
125 or CHCTR_DCEN,d0
126 movhu d0,(a0)
127 movhu (a0),d0
128
129 mov d1,epsw
130
131mn10300_dcache_inv_end:
132 ret [],0
133
134###############################################################################
135#
136# void mn10300_dcache_inv_range(unsigned start, unsigned end)
137# void mn10300_dcache_inv_range2(unsigned start, unsigned size)
138# void mn10300_dcache_inv_page(unsigned start)
139# Invalidate a range of addresses on a page in the dcache
140#
141###############################################################################
142 ALIGN
143mn10300_dcache_inv_page:
144 mov PAGE_SIZE,d1
145mn10300_dcache_inv_range2:
146 add d0,d1
147mn10300_dcache_inv_range:
148 movm [d2,d3,a2],(sp)
149 mov CHCTR,a2
150
151 movhu (a2),d2
152 btst CHCTR_DCEN,d2
153 beq mn10300_dcache_inv_range_end
154
155 and L1_CACHE_TAG_ADDRESS|L1_CACHE_TAG_ENTRY,d0 # round start
156 # addr down
157 mov d0,a1
158
159 add L1_CACHE_BYTES,d1 # round end addr up
160 and L1_CACHE_TAG_ADDRESS|L1_CACHE_TAG_ENTRY,d1
161
162 clr d2 # we're going to clear tag ram
163 # entries
164
165 # read the tags from the tag RAM, and if they indicate a valid dirty
166 # cache line then invalidate that line
167 mov DCACHE_TAG(0,0),a0
168 mov a1,d0
169 and L1_CACHE_TAG_ENTRY,d0
170 add d0,a0 # starting dcache tag RAM
171 # access address
172
173 sub a1,d1
174 lsr L1_CACHE_SHIFT,d1 # total number of entries to
175 # examine
176
177 and ~(L1_CACHE_DISPARITY-1),a1 # determine comparator base
178
179mn10300_dcache_inv_range_outer_loop:
180 # disable interrupts
181 mov epsw,d3
182 and ~EPSW_IE,epsw
183 nop # note that reading CHCTR and
184 # AND'ing D0 occupy two delay
185 # slots after disabling
186 # interrupts
187
188 # disable the dcache
189 movhu (a2),d0
190 and ~CHCTR_DCEN,d0
191 movhu d0,(a2)
192
193 # and wait for it to calm down
194 setlb
195 movhu (a2),d0
196 btst CHCTR_DCBUSY,d0
197 lne
198
199mn10300_dcache_inv_range_loop:
200
201 # process the way 0 slot
202 mov (L1_CACHE_WAYDISP*0,a0),d0 # read the tag in the way 0 slot
203 btst L1_CACHE_TAG_VALID,d0
204 beq mn10300_dcache_inv_range_skip_0 # jump if this cacheline is not
205 # valid
206
207 xor a1,d0
208 lsr 12,d0
209 bne mn10300_dcache_inv_range_skip_0 # jump if not this cacheline
210
211 mov d2,(a0) # kill the tag
212
213mn10300_dcache_inv_range_skip_0:
214
215 # process the way 1 slot
216 mov (L1_CACHE_WAYDISP*1,a0),d0 # read the tag in the way 1 slot
217 btst L1_CACHE_TAG_VALID,d0
218 beq mn10300_dcache_inv_range_skip_1 # jump if this cacheline is not
219 # valid
220
221 xor a1,d0
222 lsr 12,d0
223 bne mn10300_dcache_inv_range_skip_1 # jump if not this cacheline
224
225 mov d2,(a0) # kill the tag
226
227mn10300_dcache_inv_range_skip_1:
228
229 # process the way 2 slot
230 mov (L1_CACHE_WAYDISP*2,a0),d0 # read the tag in the way 2 slot
231 btst L1_CACHE_TAG_VALID,d0
232 beq mn10300_dcache_inv_range_skip_2 # jump if this cacheline is not
233 # valid
234
235 xor a1,d0
236 lsr 12,d0
237 bne mn10300_dcache_inv_range_skip_2 # jump if not this cacheline
238
239 mov d2,(a0) # kill the tag
240
241mn10300_dcache_inv_range_skip_2:
242
243 # process the way 3 slot
244 mov (L1_CACHE_WAYDISP*3,a0),d0 # read the tag in the way 3 slot
245 btst L1_CACHE_TAG_VALID,d0
246 beq mn10300_dcache_inv_range_skip_3 # jump if this cacheline is not
247 # valid
248
249 xor a1,d0
250 lsr 12,d0
251 bne mn10300_dcache_inv_range_skip_3 # jump if not this cacheline
252
253 mov d2,(a0) # kill the tag
254
255mn10300_dcache_inv_range_skip_3:
256
257 # approx every N steps we re-enable the cache and see if there are any
258 # interrupts to be processed
259 # we also break out if we've reached the end of the loop
260 # (the bottom nibble of the count is zero in both cases)
261 add L1_CACHE_BYTES,a0
262 add L1_CACHE_BYTES,a1
263 add -1,d1
264 btst mn10300_dcache_inv_range_intr_interval,d1
265 bne mn10300_dcache_inv_range_loop
266
267 # wait for the cache to finish what it's doing
268 setlb
269 movhu (a2),d0
270 btst CHCTR_DCBUSY,d0
271 lne
272
273 # and reenable it
274 or CHCTR_DCEN,d0
275 movhu d0,(a2)
276 movhu (a2),d0
277
278 # re-enable interrupts
279 # - we don't bother with delay NOPs as we'll have enough instructions
280 # before we disable interrupts again to give the interrupts a chance
281 # to happen
282 mov d3,epsw
283
284 # go around again if the counter hasn't yet reached zero
285 add 0,d1
286 bne mn10300_dcache_inv_range_outer_loop
287
288mn10300_dcache_inv_range_end:
289 ret [d2,d3,a2],12
diff --git a/arch/mn10300/mm/cache.c b/arch/mn10300/mm/cache.c
new file mode 100644
index 000000000000..1b76719ec1c3
--- /dev/null
+++ b/arch/mn10300/mm/cache.c
@@ -0,0 +1,121 @@
1/* MN10300 Cache flushing routines
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#include <linux/module.h>
12#include <linux/mm.h>
13#include <linux/mman.h>
14#include <linux/threads.h>
15#include <asm/page.h>
16#include <asm/pgtable.h>
17#include <asm/processor.h>
18#include <asm/cacheflush.h>
19#include <asm/io.h>
20#include <asm/uaccess.h>
21
22EXPORT_SYMBOL(mn10300_icache_inv);
23EXPORT_SYMBOL(mn10300_dcache_inv);
24EXPORT_SYMBOL(mn10300_dcache_inv_range);
25EXPORT_SYMBOL(mn10300_dcache_inv_range2);
26EXPORT_SYMBOL(mn10300_dcache_inv_page);
27
28#ifdef CONFIG_MN10300_CACHE_WBACK
29EXPORT_SYMBOL(mn10300_dcache_flush);
30EXPORT_SYMBOL(mn10300_dcache_flush_inv);
31EXPORT_SYMBOL(mn10300_dcache_flush_inv_range);
32EXPORT_SYMBOL(mn10300_dcache_flush_inv_range2);
33EXPORT_SYMBOL(mn10300_dcache_flush_inv_page);
34EXPORT_SYMBOL(mn10300_dcache_flush_range);
35EXPORT_SYMBOL(mn10300_dcache_flush_range2);
36EXPORT_SYMBOL(mn10300_dcache_flush_page);
37#endif
38
39/*
40 * write a page back from the dcache and invalidate the icache so that we can
41 * run code from it that we've just written into it
42 */
43void flush_icache_page(struct vm_area_struct *vma, struct page *page)
44{
45 mn10300_dcache_flush_page(page_to_phys(page));
46 mn10300_icache_inv();
47}
48EXPORT_SYMBOL(flush_icache_page);
49
50/*
51 * write some code we've just written back from the dcache and invalidate the
52 * icache so that we can run that code
53 */
54void flush_icache_range(unsigned long start, unsigned long end)
55{
56#ifdef CONFIG_MN10300_CACHE_WBACK
57 unsigned long addr, size, off;
58 struct page *page;
59 pgd_t *pgd;
60 pud_t *pud;
61 pmd_t *pmd;
62 pte_t *ppte, pte;
63
64 for (; start < end; start += size) {
65 /* work out how much of the page to flush */
66 off = start & (PAGE_SIZE - 1);
67
68 size = end - start;
69 if (size > PAGE_SIZE - off)
70 size = PAGE_SIZE - off;
71
72 /* get the physical address the page is mapped to from the page
73 * tables */
74 pgd = pgd_offset(current->mm, start);
75 if (!pgd || !pgd_val(*pgd))
76 continue;
77
78 pud = pud_offset(pgd, start);
79 if (!pud || !pud_val(*pud))
80 continue;
81
82 pmd = pmd_offset(pud, start);
83 if (!pmd || !pmd_val(*pmd))
84 continue;
85
86 ppte = pte_offset_map(pmd, start);
87 if (!ppte)
88 continue;
89 pte = *ppte;
90 pte_unmap(ppte);
91
92 if (pte_none(pte))
93 continue;
94
95 page = pte_page(pte);
96 if (!page)
97 continue;
98
99 addr = page_to_phys(page);
100
101 /* flush the dcache and invalidate the icache coverage on that
102 * region */
103 mn10300_dcache_flush_range2(addr + off, size);
104 }
105#endif
106
107 mn10300_icache_inv();
108}
109EXPORT_SYMBOL(flush_icache_range);
110
111/*
112 * allow userspace to flush the instruction cache
113 */
114asmlinkage long sys_cacheflush(unsigned long start, unsigned long end)
115{
116 if (end < start)
117 return -EINVAL;
118
119 flush_icache_range(start, end);
120 return 0;
121}
diff --git a/arch/mn10300/mm/dma-alloc.c b/arch/mn10300/mm/dma-alloc.c
new file mode 100644
index 000000000000..f3649d8f50e3
--- /dev/null
+++ b/arch/mn10300/mm/dma-alloc.c
@@ -0,0 +1,56 @@
1/* MN10300 Dynamic DMA mapping support
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 * Derived from: arch/i386/kernel/pci-dma.c
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public Licence
9 * as published by the Free Software Foundation; either version
10 * 2 of the Licence, or (at your option) any later version.
11 */
12
13#include <linux/types.h>
14#include <linux/mm.h>
15#include <linux/string.h>
16#include <linux/pci.h>
17#include <asm/io.h>
18
19void *dma_alloc_coherent(struct device *dev, size_t size,
20 dma_addr_t *dma_handle, int gfp)
21{
22 unsigned long addr;
23 void *ret;
24
25 /* ignore region specifiers */
26 gfp &= ~(__GFP_DMA | __GFP_HIGHMEM);
27
28 if (dev == NULL || dev->coherent_dma_mask < 0xffffffff)
29 gfp |= GFP_DMA;
30
31 addr = __get_free_pages(gfp, get_order(size));
32 if (!addr)
33 return NULL;
34
35 /* map the coherent memory through the uncached memory window */
36 ret = (void *) (addr | 0x20000000);
37
38 /* fill the memory with obvious rubbish */
39 memset((void *) addr, 0xfb, size);
40
41 /* write back and evict all cache lines covering this region */
42 mn10300_dcache_flush_inv_range2(virt_to_phys((void *) addr), PAGE_SIZE);
43
44 *dma_handle = virt_to_bus((void *) addr);
45 return ret;
46}
47EXPORT_SYMBOL(dma_alloc_coherent);
48
49void dma_free_coherent(struct device *dev, size_t size, void *vaddr,
50 dma_addr_t dma_handle)
51{
52 unsigned long addr = (unsigned long) vaddr & ~0x20000000;
53
54 free_pages(addr, get_order(size));
55}
56EXPORT_SYMBOL(dma_free_coherent);
diff --git a/arch/mn10300/mm/extable.c b/arch/mn10300/mm/extable.c
new file mode 100644
index 000000000000..25e5485ab87d
--- /dev/null
+++ b/arch/mn10300/mm/extable.c
@@ -0,0 +1,26 @@
1/* MN10300 In-kernel exception handling
2 *
3 * Copyright (C) 2007 Matsushita Electric Industrial Co., Ltd.
4 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#include <linux/module.h>
12#include <linux/spinlock.h>
13#include <asm/uaccess.h>
14
15int fixup_exception(struct pt_regs *regs)
16{
17 const struct exception_table_entry *fixup;
18
19 fixup = search_exception_tables(regs->pc);
20 if (fixup) {
21 regs->pc = fixup->fixup;
22 return 1;
23 }
24
25 return 0;
26}
diff --git a/arch/mn10300/mm/fault.c b/arch/mn10300/mm/fault.c
new file mode 100644
index 000000000000..78f092ca0316
--- /dev/null
+++ b/arch/mn10300/mm/fault.c
@@ -0,0 +1,405 @@
1/* MN10300 MMU Fault handler
2 *
3 * Copyright (C) 2007 Matsushita Electric Industrial Co., Ltd.
4 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
5 * Modified by David Howells (dhowells@redhat.com)
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public Licence
9 * as published by the Free Software Foundation; either version
10 * 2 of the Licence, or (at your option) any later version.
11 */
12
13#include <linux/signal.h>
14#include <linux/sched.h>
15#include <linux/kernel.h>
16#include <linux/errno.h>
17#include <linux/string.h>
18#include <linux/types.h>
19#include <linux/ptrace.h>
20#include <linux/mman.h>
21#include <linux/mm.h>
22#include <linux/smp.h>
23#include <linux/smp_lock.h>
24#include <linux/interrupt.h>
25#include <linux/init.h>
26#include <linux/vt_kern.h> /* For unblank_screen() */
27
28#include <asm/system.h>
29#include <asm/uaccess.h>
30#include <asm/pgalloc.h>
31#include <asm/hardirq.h>
32#include <asm/gdb-stub.h>
33#include <asm/cpu-regs.h>
34
35/*
36 * Unlock any spinlocks which will prevent us from getting the
37 * message out
38 */
39void bust_spinlocks(int yes)
40{
41 if (yes) {
42 oops_in_progress = 1;
43#ifdef CONFIG_SMP
44 /* Many serial drivers do __global_cli() */
45 global_irq_lock = 0;
46#endif
47 } else {
48 int loglevel_save = console_loglevel;
49#ifdef CONFIG_VT
50 unblank_screen();
51#endif
52 oops_in_progress = 0;
53 /*
54 * OK, the message is on the console. Now we call printk()
55 * without oops_in_progress set so that printk will give klogd
56 * a poke. Hold onto your hats...
57 */
58 console_loglevel = 15; /* NMI oopser may have shut the console
59 * up */
60 printk(" ");
61 console_loglevel = loglevel_save;
62 }
63}
64
65void do_BUG(const char *file, int line)
66{
67 bust_spinlocks(1);
68 printk(KERN_EMERG "------------[ cut here ]------------\n");
69 printk(KERN_EMERG "kernel BUG at %s:%d!\n", file, line);
70}
71
72#if 0
73static void print_pagetable_entries(pgd_t *pgdir, unsigned long address)
74{
75 pgd_t *pgd;
76 pmd_t *pmd;
77 pte_t *pte;
78
79 pgd = pgdir + __pgd_offset(address);
80 printk(KERN_DEBUG "pgd entry %p: %016Lx\n",
81 pgd, (long long) pgd_val(*pgd));
82
83 if (!pgd_present(*pgd)) {
84 printk(KERN_DEBUG "... pgd not present!\n");
85 return;
86 }
87 pmd = pmd_offset(pgd, address);
88 printk(KERN_DEBUG "pmd entry %p: %016Lx\n",
89 pmd, (long long)pmd_val(*pmd));
90
91 if (!pmd_present(*pmd)) {
92 printk(KERN_DEBUG "... pmd not present!\n");
93 return;
94 }
95 pte = pte_offset(pmd, address);
96 printk(KERN_DEBUG "pte entry %p: %016Lx\n",
97 pte, (long long) pte_val(*pte));
98
99 if (!pte_present(*pte))
100 printk(KERN_DEBUG "... pte not present!\n");
101}
102#endif
103
104asmlinkage void monitor_signal(struct pt_regs *);
105
106/*
107 * This routine handles page faults. It determines the address,
108 * and the problem, and then passes it off to one of the appropriate
109 * routines.
110 *
111 * fault_code:
112 * - LSW: either MMUFCR_IFC or MMUFCR_DFC as appropriate
113 * - MSW: 0 if data access, 1 if instruction access
114 * - bit 0: TLB miss flag
115 * - bit 1: initial write
116 * - bit 2: page invalid
117 * - bit 3: protection violation
118 * - bit 4: accessor (0=user 1=kernel)
119 * - bit 5: 0=read 1=write
120 * - bit 6-8: page protection spec
121 * - bit 9: illegal address
122 * - bit 16: 0=data 1=ins
123 *
124 */
125asmlinkage void do_page_fault(struct pt_regs *regs, unsigned long fault_code,
126 unsigned long address)
127{
128 struct vm_area_struct *vma;
129 struct task_struct *tsk;
130 struct mm_struct *mm;
131 unsigned long page;
132 siginfo_t info;
133 int write, fault;
134
135#ifdef CONFIG_GDBSTUB
136 /* handle GDB stub causing a fault */
137 if (gdbstub_busy) {
138 gdbstub_exception(regs, TBR & TBR_INT_CODE);
139 return;
140 }
141#endif
142
143#if 0
144 printk(KERN_DEBUG "--- do_page_fault(%p,%s:%04lx,%08lx)\n",
145 regs,
146 fault_code & 0x10000 ? "ins" : "data",
147 fault_code & 0xffff, address);
148#endif
149
150 tsk = current;
151
152 /*
153 * We fault-in kernel-space virtual memory on-demand. The
154 * 'reference' page table is init_mm.pgd.
155 *
156 * NOTE! We MUST NOT take any locks for this case. We may
157 * be in an interrupt or a critical region, and should
158 * only copy the information from the master page table,
159 * nothing more.
160 *
161 * This verifies that the fault happens in kernel space
162 * and that the fault was a page not present (invalid) error
163 */
164 if (address >= VMALLOC_START && address < VMALLOC_END &&
165 (fault_code & MMUFCR_xFC_ACCESS) == MMUFCR_xFC_ACCESS_SR &&
166 (fault_code & MMUFCR_xFC_PGINVAL) == MMUFCR_xFC_PGINVAL
167 )
168 goto vmalloc_fault;
169
170 mm = tsk->mm;
171 info.si_code = SEGV_MAPERR;
172
173 /*
174 * If we're in an interrupt or have no user
175 * context, we must not take the fault..
176 */
177 if (in_interrupt() || !mm)
178 goto no_context;
179
180 down_read(&mm->mmap_sem);
181
182 vma = find_vma(mm, address);
183 if (!vma)
184 goto bad_area;
185 if (vma->vm_start <= address)
186 goto good_area;
187 if (!(vma->vm_flags & VM_GROWSDOWN))
188 goto bad_area;
189
190 if ((fault_code & MMUFCR_xFC_ACCESS) == MMUFCR_xFC_ACCESS_USR) {
191 /* accessing the stack below the stack pointer is always a
192 * bug */
193 if ((address & PAGE_MASK) + 2 * PAGE_SIZE < regs->sp) {
194#if 0
195 printk(KERN_WARNING
196 "[%d] ### Access below stack @%lx (sp=%lx)\n",
197 current->pid, address, regs->sp);
198 printk(KERN_WARNING
199 "vma [%08x - %08x]\n",
200 vma->vm_start, vma->vm_end);
201 show_registers(regs);
202 printk(KERN_WARNING
203 "[%d] ### Code: [%08lx]"
204 " %02x %02x %02x %02x %02x %02x %02x %02x\n",
205 current->pid,
206 regs->pc,
207 ((u8 *) regs->pc)[0],
208 ((u8 *) regs->pc)[1],
209 ((u8 *) regs->pc)[2],
210 ((u8 *) regs->pc)[3],
211 ((u8 *) regs->pc)[4],
212 ((u8 *) regs->pc)[5],
213 ((u8 *) regs->pc)[6],
214 ((u8 *) regs->pc)[7]
215 );
216#endif
217 goto bad_area;
218 }
219 }
220
221 if (expand_stack(vma, address))
222 goto bad_area;
223
224/*
225 * Ok, we have a good vm_area for this memory access, so
226 * we can handle it..
227 */
228good_area:
229 info.si_code = SEGV_ACCERR;
230 write = 0;
231 switch (fault_code & (MMUFCR_xFC_PGINVAL|MMUFCR_xFC_TYPE)) {
232 default: /* 3: write, present */
233 case MMUFCR_xFC_TYPE_WRITE:
234#ifdef TEST_VERIFY_AREA
235 if ((fault_code & MMUFCR_xFC_ACCESS) == MMUFCR_xFC_ACCESS_SR)
236 printk(KERN_DEBUG "WP fault at %08lx\n", regs->pc);
237#endif
238 /* write to absent page */
239 case MMUFCR_xFC_PGINVAL | MMUFCR_xFC_TYPE_WRITE:
240 if (!(vma->vm_flags & VM_WRITE))
241 goto bad_area;
242 write++;
243 break;
244
245 /* read from protected page */
246 case MMUFCR_xFC_TYPE_READ:
247 goto bad_area;
248
249 /* read from absent page present */
250 case MMUFCR_xFC_PGINVAL | MMUFCR_xFC_TYPE_READ:
251 if (!(vma->vm_flags & (VM_READ | VM_EXEC)))
252 goto bad_area;
253 break;
254 }
255
256 /*
257 * If for any reason at all we couldn't handle the fault,
258 * make sure we exit gracefully rather than endlessly redo
259 * the fault.
260 */
261 fault = handle_mm_fault(mm, vma, address, write);
262 if (unlikely(fault & VM_FAULT_ERROR)) {
263 if (fault & VM_FAULT_OOM)
264 goto out_of_memory;
265 else if (fault & VM_FAULT_SIGBUS)
266 goto do_sigbus;
267 BUG();
268 }
269 if (fault & VM_FAULT_MAJOR)
270 current->maj_flt++;
271 else
272 current->min_flt++;
273
274 up_read(&mm->mmap_sem);
275 return;
276
277/*
278 * Something tried to access memory that isn't in our memory map..
279 * Fix it, but check if it's kernel or user first..
280 */
281bad_area:
282 up_read(&mm->mmap_sem);
283 monitor_signal(regs);
284
285 /* User mode accesses just cause a SIGSEGV */
286 if ((fault_code & MMUFCR_xFC_ACCESS) == MMUFCR_xFC_ACCESS_USR) {
287 info.si_signo = SIGSEGV;
288 info.si_errno = 0;
289 /* info.si_code has been set above */
290 info.si_addr = (void *)address;
291 force_sig_info(SIGSEGV, &info, tsk);
292 return;
293 }
294
295no_context:
296 monitor_signal(regs);
297 /* Are we prepared to handle this kernel fault? */
298 if (fixup_exception(regs))
299 return;
300
301/*
302 * Oops. The kernel tried to access some bad page. We'll have to
303 * terminate things with extreme prejudice.
304 */
305
306 bust_spinlocks(1);
307
308 if (address < PAGE_SIZE)
309 printk(KERN_ALERT
310 "Unable to handle kernel NULL pointer dereference");
311 else
312 printk(KERN_ALERT
313 "Unable to handle kernel paging request");
314 printk(" at virtual address %08lx\n", address);
315 printk(" printing pc:\n");
316 printk(KERN_ALERT "%08lx\n", regs->pc);
317
318#ifdef CONFIG_GDBSTUB
319 gdbstub_intercept(
320 regs, fault_code & 0x00010000 ? EXCEP_IAERROR : EXCEP_DAERROR);
321#endif
322
323 page = PTBR;
324 page = ((unsigned long *) __va(page))[address >> 22];
325 printk(KERN_ALERT "*pde = %08lx\n", page);
326 if (page & 1) {
327 page &= PAGE_MASK;
328 address &= 0x003ff000;
329 page = ((unsigned long *) __va(page))[address >> PAGE_SHIFT];
330 printk(KERN_ALERT "*pte = %08lx\n", page);
331 }
332
333 die("Oops", regs, fault_code);
334 do_exit(SIGKILL);
335
336/*
337 * We ran out of memory, or some other thing happened to us that made
338 * us unable to handle the page fault gracefully.
339 */
340out_of_memory:
341 up_read(&mm->mmap_sem);
342 monitor_signal(regs);
343 printk(KERN_ALERT "VM: killing process %s\n", tsk->comm);
344 if ((fault_code & MMUFCR_xFC_ACCESS) == MMUFCR_xFC_ACCESS_USR)
345 do_exit(SIGKILL);
346 goto no_context;
347
348do_sigbus:
349 up_read(&mm->mmap_sem);
350 monitor_signal(regs);
351
352 /*
353 * Send a sigbus, regardless of whether we were in kernel
354 * or user mode.
355 */
356 info.si_signo = SIGBUS;
357 info.si_errno = 0;
358 info.si_code = BUS_ADRERR;
359 info.si_addr = (void *)address;
360 force_sig_info(SIGBUS, &info, tsk);
361
362 /* Kernel mode? Handle exceptions or die */
363 if ((fault_code & MMUFCR_xFC_ACCESS) == MMUFCR_xFC_ACCESS_SR)
364 goto no_context;
365 return;
366
367vmalloc_fault:
368 {
369 /*
370 * Synchronize this task's top level page-table
371 * with the 'reference' page table.
372 *
373 * Do _not_ use "tsk" here. We might be inside
374 * an interrupt in the middle of a task switch..
375 */
376 int index = pgd_index(address);
377 pgd_t *pgd, *pgd_k;
378 pud_t *pud, *pud_k;
379 pmd_t *pmd, *pmd_k;
380 pte_t *pte_k;
381
382 pgd_k = init_mm.pgd + index;
383
384 if (!pgd_present(*pgd_k))
385 goto no_context;
386
387 pud_k = pud_offset(pgd_k, address);
388 if (!pud_present(*pud_k))
389 goto no_context;
390
391 pmd_k = pmd_offset(pud_k, address);
392 if (!pmd_present(*pmd_k))
393 goto no_context;
394
395 pgd = (pgd_t *) PTBR + index;
396 pud = pud_offset(pgd, address);
397 pmd = pmd_offset(pud, address);
398 set_pmd(pmd, *pmd_k);
399
400 pte_k = pte_offset_kernel(pmd_k, address);
401 if (!pte_present(*pte_k))
402 goto no_context;
403 return;
404 }
405}
diff --git a/arch/mn10300/mm/init.c b/arch/mn10300/mm/init.c
new file mode 100644
index 000000000000..8c5d88c7b90a
--- /dev/null
+++ b/arch/mn10300/mm/init.c
@@ -0,0 +1,160 @@
1/* MN10300 Memory management initialisation
2 *
3 * Copyright (C) 2007 Matsushita Electric Industrial Co., Ltd.
4 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
5 * Modified by David Howells (dhowells@redhat.com)
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public Licence
9 * as published by the Free Software Foundation; either version
10 * 2 of the Licence, or (at your option) any later version.
11 */
12#include <linux/signal.h>
13#include <linux/sched.h>
14#include <linux/kernel.h>
15#include <linux/errno.h>
16#include <linux/string.h>
17#include <linux/types.h>
18#include <linux/ptrace.h>
19#include <linux/mman.h>
20#include <linux/slab.h>
21#include <linux/fs.h>
22#include <linux/mm.h>
23#include <linux/swap.h>
24#include <linux/smp.h>
25#include <linux/init.h>
26#include <linux/initrd.h>
27#include <linux/highmem.h>
28#include <linux/pagemap.h>
29#include <linux/bootmem.h>
30
31#include <asm/processor.h>
32#include <asm/system.h>
33#include <asm/uaccess.h>
34#include <asm/pgtable.h>
35#include <asm/pgalloc.h>
36#include <asm/dma.h>
37#include <asm/tlb.h>
38#include <asm/sections.h>
39
40DEFINE_PER_CPU(struct mmu_gather, mmu_gathers);
41
42unsigned long highstart_pfn, highend_pfn;
43
44/*
45 * set up paging
46 */
47void __init paging_init(void)
48{
49 unsigned long zones_size[MAX_NR_ZONES] = {0,};
50 pte_t *ppte;
51 int loop;
52
53 /* main kernel space -> RAM mapping is handled as 1:1 transparent by
54 * the MMU */
55 memset(swapper_pg_dir, 0, sizeof(swapper_pg_dir));
56 memset(kernel_vmalloc_ptes, 0, sizeof(kernel_vmalloc_ptes));
57
58 /* load the VMALLOC area PTE table addresses into the kernel PGD */
59 ppte = kernel_vmalloc_ptes;
60 for (loop = VMALLOC_START / (PAGE_SIZE * PTRS_PER_PTE);
61 loop < VMALLOC_END / (PAGE_SIZE * PTRS_PER_PTE);
62 loop++
63 ) {
64 set_pgd(swapper_pg_dir + loop, __pgd(__pa(ppte) | _PAGE_TABLE));
65 ppte += PAGE_SIZE / sizeof(pte_t);
66 }
67
68 /* declare the sizes of the RAM zones (only use the normal zone) */
69 zones_size[ZONE_NORMAL] =
70 (contig_page_data.bdata->node_low_pfn) -
71 (contig_page_data.bdata->node_boot_start >> PAGE_SHIFT);
72
73 /* pass the memory from the bootmem allocator to the main allocator */
74 free_area_init(zones_size);
75
76 __flush_tlb_all();
77}
78
79/*
80 * transfer all the memory from the bootmem allocator to the runtime allocator
81 */
82void __init mem_init(void)
83{
84 int codesize, reservedpages, datasize, initsize;
85 int tmp;
86
87 if (!mem_map)
88 BUG();
89
90#define START_PFN (contig_page_data.bdata->node_boot_start >> PAGE_SHIFT)
91#define MAX_LOW_PFN (contig_page_data.bdata->node_low_pfn)
92
93 max_mapnr = num_physpages = MAX_LOW_PFN - START_PFN;
94 high_memory = (void *) __va(MAX_LOW_PFN * PAGE_SIZE);
95
96 /* clear the zero-page */
97 memset(empty_zero_page, 0, PAGE_SIZE);
98
99 /* this will put all low memory onto the freelists */
100 totalram_pages += free_all_bootmem();
101
102 reservedpages = 0;
103 for (tmp = 0; tmp < num_physpages; tmp++)
104 if (PageReserved(&mem_map[tmp]))
105 reservedpages++;
106
107 codesize = (unsigned long) &_etext - (unsigned long) &_stext;
108 datasize = (unsigned long) &_edata - (unsigned long) &_etext;
109 initsize = (unsigned long) &__init_end - (unsigned long) &__init_begin;
110
111 printk(KERN_INFO
112 "Memory: %luk/%luk available"
113 " (%dk kernel code, %dk reserved, %dk data, %dk init,"
114 " %ldk highmem)\n",
115 (unsigned long) nr_free_pages() << (PAGE_SHIFT - 10),
116 max_mapnr << (PAGE_SHIFT - 10),
117 codesize >> 10,
118 reservedpages << (PAGE_SHIFT - 10),
119 datasize >> 10,
120 initsize >> 10,
121 (unsigned long) (totalhigh_pages << (PAGE_SHIFT - 10))
122 );
123}
124
125/*
126 *
127 */
128void free_init_pages(char *what, unsigned long begin, unsigned long end)
129{
130 unsigned long addr;
131
132 for (addr = begin; addr < end; addr += PAGE_SIZE) {
133 ClearPageReserved(virt_to_page(addr));
134 init_page_count(virt_to_page(addr));
135 memset((void *) addr, 0xcc, PAGE_SIZE);
136 free_page(addr);
137 totalram_pages++;
138 }
139 printk(KERN_INFO "Freeing %s: %ldk freed\n", what, (end - begin) >> 10);
140}
141
142/*
143 * recycle memory containing stuff only required for initialisation
144 */
145void free_initmem(void)
146{
147 free_init_pages("unused kernel memory",
148 (unsigned long) &__init_begin,
149 (unsigned long) &__init_end);
150}
151
152/*
153 * dispose of the memory on which the initial ramdisk resided
154 */
155#ifdef CONFIG_BLK_DEV_INITRD
156void free_initrd_mem(unsigned long start, unsigned long end)
157{
158 free_init_pages("initrd memory", start, end);
159}
160#endif
diff --git a/arch/mn10300/mm/misalignment.c b/arch/mn10300/mm/misalignment.c
new file mode 100644
index 000000000000..32aa89dc3848
--- /dev/null
+++ b/arch/mn10300/mm/misalignment.c
@@ -0,0 +1,661 @@
1/* MN10300 Misalignment fixup handler
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#include <linux/module.h>
12#include <linux/sched.h>
13#include <linux/kernel.h>
14#include <linux/string.h>
15#include <linux/errno.h>
16#include <linux/ptrace.h>
17#include <linux/timer.h>
18#include <linux/mm.h>
19#include <linux/smp.h>
20#include <linux/smp_lock.h>
21#include <linux/init.h>
22#include <linux/delay.h>
23#include <linux/spinlock.h>
24#include <linux/interrupt.h>
25#include <linux/pci.h>
26#include <asm/processor.h>
27#include <asm/system.h>
28#include <asm/uaccess.h>
29#include <asm/io.h>
30#include <asm/atomic.h>
31#include <asm/smp.h>
32#include <asm/pgalloc.h>
33#include <asm/cpu-regs.h>
34#include <asm/busctl-regs.h>
35#include <asm/fpu.h>
36#include <asm/gdb-stub.h>
37#include <asm/asm-offsets.h>
38
39#if 0
40#define kdebug(FMT, ...) printk(KERN_DEBUG FMT, ##__VA_ARGS__)
41#else
42#define kdebug(FMT, ...) do {} while (0)
43#endif
44
45static int misalignment_addr(unsigned long *registers, unsigned params,
46 unsigned opcode, unsigned disp,
47 void **_address, unsigned long **_postinc);
48
49static int misalignment_reg(unsigned long *registers, unsigned params,
50 unsigned opcode, unsigned disp,
51 unsigned long **_register);
52
53static inline unsigned int_log2(unsigned x)
54{
55 unsigned y;
56 asm("bsch %1,%0" : "=r"(y) : "r"(x), "0"(0));
57 return y;
58}
59#define log2(x) int_log2(x)
60
61static const unsigned Dreg_index[] = {
62 REG_D0 >> 2, REG_D1 >> 2, REG_D2 >> 2, REG_D3 >> 2
63};
64
65static const unsigned Areg_index[] = {
66 REG_A0 >> 2, REG_A1 >> 2, REG_A2 >> 2, REG_A3 >> 2
67};
68
69static const unsigned Rreg_index[] = {
70 REG_E0 >> 2, REG_E1 >> 2, REG_E2 >> 2, REG_E3 >> 2,
71 REG_E4 >> 2, REG_E5 >> 2, REG_E6 >> 2, REG_E7 >> 2,
72 REG_A0 >> 2, REG_A1 >> 2, REG_A2 >> 2, REG_A3 >> 2,
73 REG_D0 >> 2, REG_D1 >> 2, REG_D2 >> 2, REG_D3 >> 2
74};
75
76enum format_id {
77 FMT_S0,
78 FMT_S1,
79 FMT_S2,
80 FMT_S4,
81 FMT_D0,
82 FMT_D1,
83 FMT_D2,
84 FMT_D4,
85 FMT_D6,
86 FMT_D7,
87 FMT_D8,
88 FMT_D9,
89};
90
91struct {
92 u_int8_t opsz, dispsz;
93} format_tbl[16] = {
94 [FMT_S0] = { 8, 0 },
95 [FMT_S1] = { 8, 8 },
96 [FMT_S2] = { 8, 16 },
97 [FMT_S4] = { 8, 32 },
98 [FMT_D0] = { 16, 0 },
99 [FMT_D1] = { 16, 8 },
100 [FMT_D2] = { 16, 16 },
101 [FMT_D4] = { 16, 32 },
102 [FMT_D6] = { 24, 0 },
103 [FMT_D7] = { 24, 8 },
104 [FMT_D8] = { 24, 24 },
105 [FMT_D9] = { 24, 32 },
106};
107
108enum value_id {
109 DM0, /* data reg in opcode in bits 0-1 */
110 DM1, /* data reg in opcode in bits 2-3 */
111 DM2, /* data reg in opcode in bits 4-5 */
112 AM0, /* addr reg in opcode in bits 0-1 */
113 AM1, /* addr reg in opcode in bits 2-3 */
114 AM2, /* addr reg in opcode in bits 4-5 */
115 RM0, /* reg in opcode in bits 0-3 */
116 RM1, /* reg in opcode in bits 2-5 */
117 RM2, /* reg in opcode in bits 4-7 */
118 RM4, /* reg in opcode in bits 8-11 */
119 RM6, /* reg in opcode in bits 12-15 */
120
121 RD0, /* reg in displacement in bits 0-3 */
122 RD2, /* reg in displacement in bits 4-7 */
123
124 SP, /* stack pointer */
125
126 SD8, /* 8-bit signed displacement */
127 SD16, /* 16-bit signed displacement */
128 SD24, /* 24-bit signed displacement */
129 SIMM4_2, /* 4-bit signed displacement in opcode bits 4-7 */
130 SIMM8, /* 8-bit signed immediate */
131 IMM24, /* 24-bit unsigned immediate */
132 IMM32, /* 32-bit unsigned immediate */
133 IMM32_HIGH8, /* 32-bit unsigned immediate, high 8-bits in opcode */
134
135 DN0 = DM0,
136 DN1 = DM1,
137 DN2 = DM2,
138 AN0 = AM0,
139 AN1 = AM1,
140 AN2 = AM2,
141 RN0 = RM0,
142 RN1 = RM1,
143 RN2 = RM2,
144 RN4 = RM4,
145 RN6 = RM6,
146 DI = DM1,
147 RI = RM2,
148
149};
150
151struct mn10300_opcode {
152 const char *name;
153 u_int32_t opcode;
154 u_int32_t opmask;
155 unsigned exclusion;
156
157 enum format_id format;
158
159 unsigned cpu_mask;
160#define AM33 330
161
162 unsigned params[2];
163#define MEM(ADDR) (0x80000000 | (ADDR))
164#define MEM2(ADDR1, ADDR2) (0x80000000 | (ADDR1) << 8 | (ADDR2))
165#define MEMINC(ADDR) (0x81000000 | (ADDR))
166#define MEMINC2(ADDR, INC) (0x81000000 | (ADDR) << 8 | (INC))
167};
168
169/* LIBOPCODES EXCERPT
170 Assemble Matsushita MN10300 instructions.
171 Copyright 1996, 1997, 1998, 1999, 2000 Free Software Foundation, Inc.
172
173 This program is free software; you can redistribute it and/or modify
174 it under the terms of the GNU General Public Licence as published by
175 the Free Software Foundation; either version 2 of the Licence, or
176 (at your option) any later version.
177
178 This program is distributed in the hope that it will be useful,
179 but WITHOUT ANY WARRANTY; without even the implied warranty of
180 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
181 GNU General Public Licence for more details.
182
183 You should have received a copy of the GNU General Public Licence
184 along with this program; if not, write to the Free Software
185 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
186*/
187static const struct mn10300_opcode mn10300_opcodes[] = {
188{ "mov", 0x60, 0xf0, 0, FMT_S0, 0, {DM1, MEM(AN0)}},
189{ "mov", 0x70, 0xf0, 0, FMT_S0, 0, {MEM(AM0), DN1}},
190{ "mov", 0xf000, 0xfff0, 0, FMT_D0, 0, {MEM(AM0), AN1}},
191{ "mov", 0xf010, 0xfff0, 0, FMT_D0, 0, {AM1, MEM(AN0)}},
192{ "mov", 0xf300, 0xffc0, 0, FMT_D0, 0, {MEM2(DI, AM0), DN2}},
193{ "mov", 0xf340, 0xffc0, 0, FMT_D0, 0, {DM2, MEM2(DI, AN0)}},
194{ "mov", 0xf380, 0xffc0, 0, FMT_D0, 0, {MEM2(DI, AM0), AN2}},
195{ "mov", 0xf3c0, 0xffc0, 0, FMT_D0, 0, {AM2, MEM2(DI, AN0)}},
196{ "mov", 0xf80000, 0xfff000, 0, FMT_D1, 0, {MEM2(SD8, AM0), DN1}},
197{ "mov", 0xf81000, 0xfff000, 0, FMT_D1, 0, {DM1, MEM2(SD8, AN0)}},
198{ "mov", 0xf82000, 0xfff000, 0, FMT_D1, 0, {MEM2(SD8,AM0), AN1}},
199{ "mov", 0xf83000, 0xfff000, 0, FMT_D1, 0, {AM1, MEM2(SD8, AN0)}},
200{ "mov", 0xf8f000, 0xfffc00, 0, FMT_D1, AM33, {MEM2(SD8, AM0), SP}},
201{ "mov", 0xf8f400, 0xfffc00, 0, FMT_D1, AM33, {SP, MEM2(SD8, AN0)}},
202{ "mov", 0xf90a00, 0xffff00, 0, FMT_D6, AM33, {MEM(RM0), RN2}},
203{ "mov", 0xf91a00, 0xffff00, 0, FMT_D6, AM33, {RM2, MEM(RN0)}},
204{ "mov", 0xf96a00, 0xffff00, 0x12, FMT_D6, AM33, {MEMINC(RM0), RN2}},
205{ "mov", 0xf97a00, 0xffff00, 0, FMT_D6, AM33, {RM2, MEMINC(RN0)}},
206{ "mov", 0xfa000000, 0xfff00000, 0, FMT_D2, 0, {MEM2(SD16, AM0), DN1}},
207{ "mov", 0xfa100000, 0xfff00000, 0, FMT_D2, 0, {DM1, MEM2(SD16, AN0)}},
208{ "mov", 0xfa200000, 0xfff00000, 0, FMT_D2, 0, {MEM2(SD16, AM0), AN1}},
209{ "mov", 0xfa300000, 0xfff00000, 0, FMT_D2, 0, {AM1, MEM2(SD16, AN0)}},
210{ "mov", 0xfb0a0000, 0xffff0000, 0, FMT_D7, AM33, {MEM2(SD8, RM0), RN2}},
211{ "mov", 0xfb1a0000, 0xffff0000, 0, FMT_D7, AM33, {RM2, MEM2(SD8, RN0)}},
212{ "mov", 0xfb6a0000, 0xffff0000, 0x22, FMT_D7, AM33, {MEMINC2 (RM0, SIMM8), RN2}},
213{ "mov", 0xfb7a0000, 0xffff0000, 0, FMT_D7, AM33, {RM2, MEMINC2 (RN0, SIMM8)}},
214{ "mov", 0xfb8e0000, 0xffff000f, 0, FMT_D7, AM33, {MEM2(RI, RM0), RD2}},
215{ "mov", 0xfb9e0000, 0xffff000f, 0, FMT_D7, AM33, {RD2, MEM2(RI, RN0)}},
216{ "mov", 0xfc000000, 0xfff00000, 0, FMT_D4, 0, {MEM2(IMM32,AM0), DN1}},
217{ "mov", 0xfc100000, 0xfff00000, 0, FMT_D4, 0, {DM1, MEM2(IMM32,AN0)}},
218{ "mov", 0xfc200000, 0xfff00000, 0, FMT_D4, 0, {MEM2(IMM32,AM0), AN1}},
219{ "mov", 0xfc300000, 0xfff00000, 0, FMT_D4, 0, {AM1, MEM2(IMM32,AN0)}},
220{ "mov", 0xfd0a0000, 0xffff0000, 0, FMT_D8, AM33, {MEM2(SD24, RM0), RN2}},
221{ "mov", 0xfd1a0000, 0xffff0000, 0, FMT_D8, AM33, {RM2, MEM2(SD24, RN0)}},
222{ "mov", 0xfd6a0000, 0xffff0000, 0x22, FMT_D8, AM33, {MEMINC2 (RM0, IMM24), RN2}},
223{ "mov", 0xfd7a0000, 0xffff0000, 0, FMT_D8, AM33, {RM2, MEMINC2 (RN0, IMM24)}},
224{ "mov", 0xfe0a0000, 0xffff0000, 0, FMT_D9, AM33, {MEM2(IMM32_HIGH8,RM0), RN2}},
225{ "mov", 0xfe1a0000, 0xffff0000, 0, FMT_D9, AM33, {RM2, MEM2(IMM32_HIGH8, RN0)}},
226{ "mov", 0xfe6a0000, 0xffff0000, 0x22, FMT_D9, AM33, {MEMINC2 (RM0, IMM32_HIGH8), RN2}},
227{ "mov", 0xfe7a0000, 0xffff0000, 0, FMT_D9, AM33, {RN2, MEMINC2 (RM0, IMM32_HIGH8)}},
228
229{ "movhu", 0xf060, 0xfff0, 0, FMT_D0, 0, {MEM(AM0), DN1}},
230{ "movhu", 0xf070, 0xfff0, 0, FMT_D0, 0, {DM1, MEM(AN0)}},
231{ "movhu", 0xf480, 0xffc0, 0, FMT_D0, 0, {MEM2(DI, AM0), DN2}},
232{ "movhu", 0xf4c0, 0xffc0, 0, FMT_D0, 0, {DM2, MEM2(DI, AN0)}},
233{ "movhu", 0xf86000, 0xfff000, 0, FMT_D1, 0, {MEM2(SD8, AM0), DN1}},
234{ "movhu", 0xf87000, 0xfff000, 0, FMT_D1, 0, {DM1, MEM2(SD8, AN0)}},
235{ "movhu", 0xf94a00, 0xffff00, 0, FMT_D6, AM33, {MEM(RM0), RN2}},
236{ "movhu", 0xf95a00, 0xffff00, 0, FMT_D6, AM33, {RM2, MEM(RN0)}},
237{ "movhu", 0xf9ea00, 0xffff00, 0x12, FMT_D6, AM33, {MEMINC(RM0), RN2}},
238{ "movhu", 0xf9fa00, 0xffff00, 0, FMT_D6, AM33, {RM2, MEMINC(RN0)}},
239{ "movhu", 0xfa600000, 0xfff00000, 0, FMT_D2, 0, {MEM2(SD16, AM0), DN1}},
240{ "movhu", 0xfa700000, 0xfff00000, 0, FMT_D2, 0, {DM1, MEM2(SD16, AN0)}},
241{ "movhu", 0xfb4a0000, 0xffff0000, 0, FMT_D7, AM33, {MEM2(SD8, RM0), RN2}},
242{ "movhu", 0xfb5a0000, 0xffff0000, 0, FMT_D7, AM33, {RM2, MEM2(SD8, RN0)}},
243{ "movhu", 0xfbce0000, 0xffff000f, 0, FMT_D7, AM33, {MEM2(RI, RM0), RD2}},
244{ "movhu", 0xfbde0000, 0xffff000f, 0, FMT_D7, AM33, {RD2, MEM2(RI, RN0)}},
245{ "movhu", 0xfbea0000, 0xffff0000, 0x22, FMT_D7, AM33, {MEMINC2 (RM0, SIMM8), RN2}},
246{ "movhu", 0xfbfa0000, 0xffff0000, 0, FMT_D7, AM33, {RM2, MEMINC2 (RN0, SIMM8)}},
247{ "movhu", 0xfc600000, 0xfff00000, 0, FMT_D4, 0, {MEM2(IMM32,AM0), DN1}},
248{ "movhu", 0xfc700000, 0xfff00000, 0, FMT_D4, 0, {DM1, MEM2(IMM32,AN0)}},
249{ "movhu", 0xfd4a0000, 0xffff0000, 0, FMT_D8, AM33, {MEM2(SD24, RM0), RN2}},
250{ "movhu", 0xfd5a0000, 0xffff0000, 0, FMT_D8, AM33, {RM2, MEM2(SD24, RN0)}},
251{ "movhu", 0xfdea0000, 0xffff0000, 0x22, FMT_D8, AM33, {MEMINC2 (RM0, IMM24), RN2}},
252{ "movhu", 0xfdfa0000, 0xffff0000, 0, FMT_D8, AM33, {RM2, MEMINC2 (RN0, IMM24)}},
253{ "movhu", 0xfe4a0000, 0xffff0000, 0, FMT_D9, AM33, {MEM2(IMM32_HIGH8,RM0), RN2}},
254{ "movhu", 0xfe5a0000, 0xffff0000, 0, FMT_D9, AM33, {RM2, MEM2(IMM32_HIGH8, RN0)}},
255{ "movhu", 0xfeea0000, 0xffff0000, 0x22, FMT_D9, AM33, {MEMINC2 (RM0, IMM32_HIGH8), RN2}},
256{ "movhu", 0xfefa0000, 0xffff0000, 0, FMT_D9, AM33, {RN2, MEMINC2 (RM0, IMM32_HIGH8)}},
257{ 0, 0, 0, 0, 0, 0, {0}},
258};
259
260/*
261 * fix up misalignment problems where possible
262 */
263asmlinkage void misalignment(struct pt_regs *regs, enum exception_code code)
264{
265 const struct exception_table_entry *fixup;
266 const struct mn10300_opcode *pop;
267 unsigned long *registers = (unsigned long *) regs;
268 unsigned long data, *store, *postinc;
269 mm_segment_t seg;
270 siginfo_t info;
271 uint32_t opcode, disp, noc, xo, xm;
272 uint8_t *pc, byte;
273 void *address;
274 unsigned tmp, npop;
275
276 kdebug("MISALIGN at %lx\n", regs->pc);
277
278 if (in_interrupt())
279 die("Misalignment trap in interrupt context", regs, code);
280
281 if (regs->epsw & EPSW_IE)
282 asm volatile("or %0,epsw" : : "i"(EPSW_IE));
283
284 seg = get_fs();
285 set_fs(KERNEL_DS);
286
287 fixup = search_exception_tables(regs->pc);
288
289 /* first thing to do is to match the opcode */
290 pc = (u_int8_t *) regs->pc;
291
292 if (__get_user(byte, pc) != 0)
293 goto fetch_error;
294 opcode = byte;
295 noc = 8;
296
297 for (pop = mn10300_opcodes; pop->name; pop++) {
298 npop = log2(pop->opcode | pop->opmask);
299 if (npop <= 0 || npop > 31)
300 continue;
301 npop = (npop + 8) & ~7;
302
303 got_more_bits:
304 if (npop == noc) {
305 if ((opcode & pop->opmask) == pop->opcode)
306 goto found_opcode;
307 } else if (npop > noc) {
308 xo = pop->opcode >> (npop - noc);
309 xm = pop->opmask >> (npop - noc);
310
311 if ((opcode & xm) != xo)
312 continue;
313
314 /* we've got a partial match (an exact match on the
315 * first N bytes), so we need to get some more data */
316 pc++;
317 if (__get_user(byte, pc) != 0)
318 goto fetch_error;
319 opcode = opcode << 8 | byte;
320 noc += 8;
321 goto got_more_bits;
322 } else {
323 /* there's already been a partial match as long as the
324 * complete match we're now considering, so this one
325 * should't match */
326 continue;
327 }
328 }
329
330 /* didn't manage to find a fixup */
331 if (!user_mode(regs))
332 printk(KERN_CRIT "MISALIGN: %lx: unsupported instruction %x\n",
333 regs->pc, opcode);
334
335failed:
336 set_fs(seg);
337 if (die_if_no_fixup("misalignment error", regs, code))
338 return;
339
340 info.si_signo = SIGBUS;
341 info.si_errno = 0;
342 info.si_code = BUS_ADRALN;
343 info.si_addr = (void *) regs->pc;
344 force_sig_info(SIGBUS, &info, current);
345 return;
346
347 /* error reading opcodes */
348fetch_error:
349 if (!user_mode(regs))
350 printk(KERN_CRIT
351 "MISALIGN: %p: fault whilst reading instruction data\n",
352 pc);
353 goto failed;
354
355bad_addr_mode:
356 if (!user_mode(regs))
357 printk(KERN_CRIT
358 "MISALIGN: %lx: unsupported addressing mode %x\n",
359 regs->pc, opcode);
360 goto failed;
361
362bad_reg_mode:
363 if (!user_mode(regs))
364 printk(KERN_CRIT
365 "MISALIGN: %lx: unsupported register mode %x\n",
366 regs->pc, opcode);
367 goto failed;
368
369unsupported_instruction:
370 if (!user_mode(regs))
371 printk(KERN_CRIT
372 "MISALIGN: %lx: unsupported instruction %x (%s)\n",
373 regs->pc, opcode, pop->name);
374 goto failed;
375
376transfer_failed:
377 set_fs(seg);
378 if (fixup) {
379 regs->pc = fixup->fixup;
380 return;
381 }
382 if (die_if_no_fixup("misalignment fixup", regs, code))
383 return;
384
385 info.si_signo = SIGSEGV;
386 info.si_errno = 0;
387 info.si_code = 0;
388 info.si_addr = (void *) regs->pc;
389 force_sig_info(SIGSEGV, &info, current);
390 return;
391
392 /* we matched the opcode */
393found_opcode:
394 kdebug("MISALIGN: %lx: %x==%x { %x, %x }\n",
395 regs->pc, opcode, pop->opcode, pop->params[0], pop->params[1]);
396
397 tmp = format_tbl[pop->format].opsz;
398 if (tmp > noc)
399 BUG(); /* match was less complete than it ought to have been */
400
401 if (tmp < noc) {
402 tmp = noc - tmp;
403 opcode >>= tmp;
404 pc -= tmp >> 3;
405 }
406
407 /* grab the extra displacement (note it's LSB first) */
408 disp = 0;
409 tmp = format_tbl[pop->format].dispsz >> 3;
410 while (tmp > 0) {
411 tmp--;
412 disp <<= 8;
413
414 pc++;
415 if (__get_user(byte, pc) != 0)
416 goto fetch_error;
417 disp |= byte;
418 }
419
420 set_fs(KERNEL_XDS);
421 if (fixup || regs->epsw & EPSW_nSL)
422 set_fs(seg);
423
424 tmp = (pop->params[0] ^ pop->params[1]) & 0x80000000;
425 if (!tmp) {
426 if (!user_mode(regs))
427 printk(KERN_CRIT
428 "MISALIGN: %lx:"
429 " insn not move to/from memory %x\n",
430 regs->pc, opcode);
431 goto failed;
432 }
433
434 if (pop->params[0] & 0x80000000) {
435 /* move memory to register */
436 if (!misalignment_addr(registers, pop->params[0], opcode, disp,
437 &address, &postinc))
438 goto bad_addr_mode;
439
440 if (!misalignment_reg(registers, pop->params[1], opcode, disp,
441 &store))
442 goto bad_reg_mode;
443
444 if (strcmp(pop->name, "mov") == 0) {
445 kdebug("FIXUP: mov (%p),DARn\n", address);
446 if (copy_from_user(&data, (void *) address, 4) != 0)
447 goto transfer_failed;
448 if (pop->params[0] & 0x1000000)
449 *postinc += 4;
450 } else if (strcmp(pop->name, "movhu") == 0) {
451 kdebug("FIXUP: movhu (%p),DARn\n", address);
452 data = 0;
453 if (copy_from_user(&data, (void *) address, 2) != 0)
454 goto transfer_failed;
455 if (pop->params[0] & 0x1000000)
456 *postinc += 2;
457 } else {
458 goto unsupported_instruction;
459 }
460
461 *store = data;
462 } else {
463 /* move register to memory */
464 if (!misalignment_reg(registers, pop->params[0], opcode, disp,
465 &store))
466 goto bad_reg_mode;
467
468 if (!misalignment_addr(registers, pop->params[1], opcode, disp,
469 &address, &postinc))
470 goto bad_addr_mode;
471
472 data = *store;
473
474 if (strcmp(pop->name, "mov") == 0) {
475 kdebug("FIXUP: mov %lx,(%p)\n", data, address);
476 if (copy_to_user((void *) address, &data, 4) != 0)
477 goto transfer_failed;
478 if (pop->params[1] & 0x1000000)
479 *postinc += 4;
480 } else if (strcmp(pop->name, "movhu") == 0) {
481 kdebug("FIXUP: movhu %hx,(%p)\n",
482 (uint16_t) data, address);
483 if (copy_to_user((void *) address, &data, 2) != 0)
484 goto transfer_failed;
485 if (pop->params[1] & 0x1000000)
486 *postinc += 2;
487 } else {
488 goto unsupported_instruction;
489 }
490 }
491
492 tmp = format_tbl[pop->format].opsz + format_tbl[pop->format].dispsz;
493 regs->pc += tmp >> 3;
494
495 set_fs(seg);
496 return;
497}
498
499/*
500 * determine the address that was being accessed
501 */
502static int misalignment_addr(unsigned long *registers, unsigned params,
503 unsigned opcode, unsigned disp,
504 void **_address, unsigned long **_postinc)
505{
506 unsigned long *postinc = NULL, address = 0, tmp;
507
508 params &= 0x7fffffff;
509
510 do {
511 switch (params & 0xff) {
512 case DM0:
513 postinc = &registers[Dreg_index[opcode & 0x03]];
514 address += *postinc;
515 break;
516 case DM1:
517 postinc = &registers[Dreg_index[opcode >> 2 & 0x0c]];
518 address += *postinc;
519 break;
520 case DM2:
521 postinc = &registers[Dreg_index[opcode >> 4 & 0x30]];
522 address += *postinc;
523 break;
524 case AM0:
525 postinc = &registers[Areg_index[opcode & 0x03]];
526 address += *postinc;
527 break;
528 case AM1:
529 postinc = &registers[Areg_index[opcode >> 2 & 0x0c]];
530 address += *postinc;
531 break;
532 case AM2:
533 postinc = &registers[Areg_index[opcode >> 4 & 0x30]];
534 address += *postinc;
535 break;
536 case RM0:
537 postinc = &registers[Rreg_index[opcode & 0x0f]];
538 address += *postinc;
539 break;
540 case RM1:
541 postinc = &registers[Rreg_index[opcode >> 2 & 0x0f]];
542 address += *postinc;
543 break;
544 case RM2:
545 postinc = &registers[Rreg_index[opcode >> 4 & 0x0f]];
546 address += *postinc;
547 break;
548 case RM4:
549 postinc = &registers[Rreg_index[opcode >> 8 & 0x0f]];
550 address += *postinc;
551 break;
552 case RM6:
553 postinc = &registers[Rreg_index[opcode >> 12 & 0x0f]];
554 address += *postinc;
555 break;
556 case RD0:
557 postinc = &registers[Rreg_index[disp & 0x0f]];
558 address += *postinc;
559 break;
560 case RD2:
561 postinc = &registers[Rreg_index[disp >> 4 & 0x0f]];
562 address += *postinc;
563 break;
564
565 case SD8:
566 case SIMM8:
567 address += (int32_t) (int8_t) (disp & 0xff);
568 break;
569 case SD16:
570 address += (int32_t) (int16_t) (disp & 0xffff);
571 break;
572 case SD24:
573 tmp = disp << 8;
574 asm("asr 8,%0" : "=r"(tmp) : "0"(tmp));
575 address += tmp;
576 break;
577 case SIMM4_2:
578 tmp = opcode >> 4 & 0x0f;
579 tmp <<= 28;
580 asm("asr 28,%0" : "=r"(tmp) : "0"(tmp));
581 address += tmp;
582 break;
583 case IMM24:
584 address += disp & 0x00ffffff;
585 break;
586 case IMM32:
587 case IMM32_HIGH8:
588 address += disp;
589 break;
590 default:
591 return 0;
592 }
593 } while ((params >>= 8));
594
595 *_address = (void *) address;
596 *_postinc = postinc;
597 return 1;
598}
599
600/*
601 * determine the register that is acting as source/dest
602 */
603static int misalignment_reg(unsigned long *registers, unsigned params,
604 unsigned opcode, unsigned disp,
605 unsigned long **_register)
606{
607 params &= 0x7fffffff;
608
609 if (params & 0xffffff00)
610 return 0;
611
612 switch (params & 0xff) {
613 case DM0:
614 *_register = &registers[Dreg_index[opcode & 0x03]];
615 break;
616 case DM1:
617 *_register = &registers[Dreg_index[opcode >> 2 & 0x03]];
618 break;
619 case DM2:
620 *_register = &registers[Dreg_index[opcode >> 4 & 0x03]];
621 break;
622 case AM0:
623 *_register = &registers[Areg_index[opcode & 0x03]];
624 break;
625 case AM1:
626 *_register = &registers[Areg_index[opcode >> 2 & 0x03]];
627 break;
628 case AM2:
629 *_register = &registers[Areg_index[opcode >> 4 & 0x03]];
630 break;
631 case RM0:
632 *_register = &registers[Rreg_index[opcode & 0x0f]];
633 break;
634 case RM1:
635 *_register = &registers[Rreg_index[opcode >> 2 & 0x0f]];
636 break;
637 case RM2:
638 *_register = &registers[Rreg_index[opcode >> 4 & 0x0f]];
639 break;
640 case RM4:
641 *_register = &registers[Rreg_index[opcode >> 8 & 0x0f]];
642 break;
643 case RM6:
644 *_register = &registers[Rreg_index[opcode >> 12 & 0x0f]];
645 break;
646 case RD0:
647 *_register = &registers[Rreg_index[disp & 0x0f]];
648 break;
649 case RD2:
650 *_register = &registers[Rreg_index[disp >> 4 & 0x0f]];
651 break;
652 case SP:
653 *_register = &registers[REG_SP >> 2];
654 break;
655
656 default:
657 return 0;
658 }
659
660 return 1;
661}
diff --git a/arch/mn10300/mm/mmu-context.c b/arch/mn10300/mm/mmu-context.c
new file mode 100644
index 000000000000..31c9d27a75ae
--- /dev/null
+++ b/arch/mn10300/mm/mmu-context.c
@@ -0,0 +1,80 @@
1/* MN10300 MMU context allocation and management
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#include <linux/sched.h>
12#include <linux/mm.h>
13#include <asm/mmu_context.h>
14#include <asm/tlbflush.h>
15
16/*
17 * list of the MMU contexts last allocated on each CPU
18 */
19unsigned long mmu_context_cache[NR_CPUS] = {
20 [0 ... NR_CPUS - 1] = MMU_CONTEXT_FIRST_VERSION * 2 - 1,
21};
22
23/*
24 * flush the specified TLB entry
25 */
26void flush_tlb_page(struct vm_area_struct *vma, unsigned long addr)
27{
28 unsigned long pteu, cnx, flags;
29
30 addr &= PAGE_MASK;
31
32 /* make sure the context doesn't migrate and defend against
33 * interference from vmalloc'd regions */
34 local_irq_save(flags);
35
36 cnx = mm_context(vma->vm_mm);
37
38 if (cnx != MMU_NO_CONTEXT) {
39 pteu = addr | (cnx & 0x000000ffUL);
40 IPTEU = pteu;
41 DPTEU = pteu;
42 if (IPTEL & xPTEL_V)
43 IPTEL = 0;
44 if (DPTEL & xPTEL_V)
45 DPTEL = 0;
46 }
47
48 local_irq_restore(flags);
49}
50
51/*
52 * preemptively set a TLB entry
53 */
54void update_mmu_cache(struct vm_area_struct *vma, unsigned long addr, pte_t pte)
55{
56 unsigned long pteu, ptel, cnx, flags;
57
58 addr &= PAGE_MASK;
59 ptel = pte_val(pte) & ~(xPTEL_UNUSED1 | xPTEL_UNUSED2);
60
61 /* make sure the context doesn't migrate and defend against
62 * interference from vmalloc'd regions */
63 local_irq_save(flags);
64
65 cnx = mm_context(vma->vm_mm);
66
67 if (cnx != MMU_NO_CONTEXT) {
68 pteu = addr | (cnx & 0x000000ffUL);
69 if (!(pte_val(pte) & _PAGE_NX)) {
70 IPTEU = pteu;
71 if (IPTEL & xPTEL_V)
72 IPTEL = ptel;
73 }
74 DPTEU = pteu;
75 if (DPTEL & xPTEL_V)
76 DPTEL = ptel;
77 }
78
79 local_irq_restore(flags);
80}
diff --git a/arch/mn10300/mm/pgtable.c b/arch/mn10300/mm/pgtable.c
new file mode 100644
index 000000000000..a477038752ba
--- /dev/null
+++ b/arch/mn10300/mm/pgtable.c
@@ -0,0 +1,197 @@
1/* MN10300 Page table management
2 *
3 * Copyright (C) 2007 Matsushita Electric Industrial Co., Ltd.
4 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
5 * Modified by David Howells (dhowells@redhat.com)
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public Licence
9 * as published by the Free Software Foundation; either version
10 * 2 of the Licence, or (at your option) any later version.
11 */
12#include <linux/sched.h>
13#include <linux/kernel.h>
14#include <linux/errno.h>
15#include <linux/mm.h>
16#include <linux/swap.h>
17#include <linux/smp.h>
18#include <linux/highmem.h>
19#include <linux/slab.h>
20#include <linux/pagemap.h>
21#include <linux/spinlock.h>
22#include <linux/quicklist.h>
23
24#include <asm/system.h>
25#include <asm/pgtable.h>
26#include <asm/pgalloc.h>
27#include <asm/tlb.h>
28#include <asm/tlbflush.h>
29
30void show_mem(void)
31{
32 unsigned long i;
33 int free = 0, total = 0, reserved = 0, shared = 0;
34
35 int cached = 0;
36 printk(KERN_INFO "Mem-info:\n");
37 show_free_areas();
38 i = max_mapnr;
39 while (i-- > 0) {
40 total++;
41 if (PageReserved(mem_map + i))
42 reserved++;
43 else if (PageSwapCache(mem_map + i))
44 cached++;
45 else if (!page_count(mem_map + i))
46 free++;
47 else
48 shared += page_count(mem_map + i) - 1;
49 }
50 printk(KERN_INFO "%d pages of RAM\n", total);
51 printk(KERN_INFO "%d free pages\n", free);
52 printk(KERN_INFO "%d reserved pages\n", reserved);
53 printk(KERN_INFO "%d pages shared\n", shared);
54 printk(KERN_INFO "%d pages swap cached\n", cached);
55}
56
57/*
58 * Associate a large virtual page frame with a given physical page frame
59 * and protection flags for that frame. pfn is for the base of the page,
60 * vaddr is what the page gets mapped to - both must be properly aligned.
61 * The pmd must already be instantiated. Assumes PAE mode.
62 */
63void set_pmd_pfn(unsigned long vaddr, unsigned long pfn, pgprot_t flags)
64{
65 pgd_t *pgd;
66 pud_t *pud;
67 pmd_t *pmd;
68
69 if (vaddr & (PMD_SIZE-1)) { /* vaddr is misaligned */
70 printk(KERN_ERR "set_pmd_pfn: vaddr misaligned\n");
71 return; /* BUG(); */
72 }
73 if (pfn & (PTRS_PER_PTE-1)) { /* pfn is misaligned */
74 printk(KERN_ERR "set_pmd_pfn: pfn misaligned\n");
75 return; /* BUG(); */
76 }
77 pgd = swapper_pg_dir + pgd_index(vaddr);
78 if (pgd_none(*pgd)) {
79 printk(KERN_ERR "set_pmd_pfn: pgd_none\n");
80 return; /* BUG(); */
81 }
82 pud = pud_offset(pgd, vaddr);
83 pmd = pmd_offset(pud, vaddr);
84 set_pmd(pmd, pfn_pmd(pfn, flags));
85 /*
86 * It's enough to flush this one mapping.
87 * (PGE mappings get flushed as well)
88 */
89 __flush_tlb_one(vaddr);
90}
91
92pte_t *pte_alloc_one_kernel(struct mm_struct *mm, unsigned long address)
93{
94 pte_t *pte = (pte_t *)__get_free_page(GFP_KERNEL|__GFP_REPEAT);
95 if (pte)
96 clear_page(pte);
97 return pte;
98}
99
100struct page *pte_alloc_one(struct mm_struct *mm, unsigned long address)
101{
102 struct page *pte;
103
104#ifdef CONFIG_HIGHPTE
105 pte = alloc_pages(GFP_KERNEL|__GFP_HIGHMEM|__GFP_REPEAT, 0);
106#else
107 pte = alloc_pages(GFP_KERNEL|__GFP_REPEAT, 0);
108#endif
109 if (pte)
110 clear_highpage(pte);
111 return pte;
112}
113
114/*
115 * List of all pgd's needed for non-PAE so it can invalidate entries
116 * in both cached and uncached pgd's; not needed for PAE since the
117 * kernel pmd is shared. If PAE were not to share the pmd a similar
118 * tactic would be needed. This is essentially codepath-based locking
119 * against pageattr.c; it is the unique case in which a valid change
120 * of kernel pagetables can't be lazily synchronized by vmalloc faults.
121 * vmalloc faults work because attached pagetables are never freed.
122 * If the locking proves to be non-performant, a ticketing scheme with
123 * checks at dup_mmap(), exec(), and other mmlist addition points
124 * could be used. The locking scheme was chosen on the basis of
125 * manfred's recommendations and having no core impact whatsoever.
126 * -- wli
127 */
128DEFINE_SPINLOCK(pgd_lock);
129struct page *pgd_list;
130
131static inline void pgd_list_add(pgd_t *pgd)
132{
133 struct page *page = virt_to_page(pgd);
134 page->index = (unsigned long) pgd_list;
135 if (pgd_list)
136 set_page_private(pgd_list, (unsigned long) &page->index);
137 pgd_list = page;
138 set_page_private(page, (unsigned long) &pgd_list);
139}
140
141static inline void pgd_list_del(pgd_t *pgd)
142{
143 struct page *next, **pprev, *page = virt_to_page(pgd);
144 next = (struct page *) page->index;
145 pprev = (struct page **) page_private(page);
146 *pprev = next;
147 if (next)
148 set_page_private(next, (unsigned long) pprev);
149}
150
151void pgd_ctor(void *pgd)
152{
153 unsigned long flags;
154
155 if (PTRS_PER_PMD == 1)
156 spin_lock_irqsave(&pgd_lock, flags);
157
158 memcpy((pgd_t *)pgd + USER_PTRS_PER_PGD,
159 swapper_pg_dir + USER_PTRS_PER_PGD,
160 (PTRS_PER_PGD - USER_PTRS_PER_PGD) * sizeof(pgd_t));
161
162 if (PTRS_PER_PMD > 1)
163 return;
164
165 pgd_list_add(pgd);
166 spin_unlock_irqrestore(&pgd_lock, flags);
167 memset(pgd, 0, USER_PTRS_PER_PGD * sizeof(pgd_t));
168}
169
170/* never called when PTRS_PER_PMD > 1 */
171void pgd_dtor(void *pgd)
172{
173 unsigned long flags; /* can be called from interrupt context */
174
175 spin_lock_irqsave(&pgd_lock, flags);
176 pgd_list_del(pgd);
177 spin_unlock_irqrestore(&pgd_lock, flags);
178}
179
180pgd_t *pgd_alloc(struct mm_struct *mm)
181{
182 return quicklist_alloc(0, GFP_KERNEL, pgd_ctor);
183}
184
185void pgd_free(struct mm_struct *mm, pgd_t *pgd)
186{
187 quicklist_free(0, pgd_dtor, pgd);
188}
189
190void __init pgtable_cache_init(void)
191{
192}
193
194void check_pgt_cache(void)
195{
196 quicklist_trim(0, pgd_dtor, 25, 16);
197}
diff --git a/arch/mn10300/mm/tlb-mn10300.S b/arch/mn10300/mm/tlb-mn10300.S
new file mode 100644
index 000000000000..789208094e98
--- /dev/null
+++ b/arch/mn10300/mm/tlb-mn10300.S
@@ -0,0 +1,207 @@
1###############################################################################
2#
3# TLB loading functions
4#
5# Copyright (C) 2007 Matsushita Electric Industrial Co., Ltd.
6# Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
7# Modified by David Howells (dhowells@redhat.com)
8#
9# This program is free software; you can redistribute it and/or
10# modify it under the terms of the GNU General Public Licence
11# as published by the Free Software Foundation; either version
12# 2 of the Licence, or (at your option) any later version.
13#
14###############################################################################
15#include <linux/sys.h>
16#include <linux/linkage.h>
17#include <asm/smp.h>
18#include <asm/intctl-regs.h>
19#include <asm/frame.inc>
20#include <asm/page.h>
21#include <asm/pgtable.h>
22
23###############################################################################
24#
25# Instruction TLB Miss handler entry point
26#
27###############################################################################
28 .type itlb_miss,@function
29ENTRY(itlb_miss)
30 and ~EPSW_NMID,epsw
31#ifdef CONFIG_GDBSTUB
32 movm [d2,d3,a2],(sp)
33#else
34 or EPSW_nAR,epsw # switch D0-D3 & A0-A3 to the alternate
35 # register bank
36 nop
37 nop
38 nop
39#endif
40
41 mov (IPTEU),d3
42 mov (PTBR),a2
43 mov d3,d2
44 and 0xffc00000,d2
45 lsr 20,d2
46 mov (a2,d2),a2 # PTD *ptd = PGD[addr 31..22]
47 btst _PAGE_VALID,a2
48 beq itlb_miss_fault # jump if doesn't point anywhere
49
50 and ~(PAGE_SIZE-1),a2
51 mov d3,d2
52 and 0x003ff000,d2
53 lsr 10,d2
54 add d2,a2
55 mov (a2),d2 # get pte from PTD[addr 21..12]
56 btst _PAGE_VALID,d2
57 beq itlb_miss_fault # jump if doesn't point to a page
58 # (might be a swap id)
59 bset _PAGE_ACCESSED,(0,a2)
60 and ~(xPTEL_UNUSED1|xPTEL_UNUSED2),d2
61itlb_miss_set:
62 mov d2,(IPTEL) # change the TLB
63#ifdef CONFIG_GDBSTUB
64 movm (sp),[d2,d3,a2]
65#endif
66 rti
67
68itlb_miss_fault:
69 mov _PAGE_VALID,d2 # force address error handler to be
70 # invoked
71 bra itlb_miss_set
72
73 .size itlb_miss, . - itlb_miss
74
75###############################################################################
76#
77# Data TLB Miss handler entry point
78#
79###############################################################################
80 .type dtlb_miss,@function
81ENTRY(dtlb_miss)
82 and ~EPSW_NMID,epsw
83#ifdef CONFIG_GDBSTUB
84 movm [d2,d3,a2],(sp)
85#else
86 or EPSW_nAR,epsw # switch D0-D3 & A0-A3 to the alternate
87 # register bank
88 nop
89 nop
90 nop
91#endif
92
93 mov (DPTEU),d3
94 mov (PTBR),a2
95 mov d3,d2
96 and 0xffc00000,d2
97 lsr 20,d2
98 mov (a2,d2),a2 # PTD *ptd = PGD[addr 31..22]
99 btst _PAGE_VALID,a2
100 beq dtlb_miss_fault # jump if doesn't point anywhere
101
102 and ~(PAGE_SIZE-1),a2
103 mov d3,d2
104 and 0x003ff000,d2
105 lsr 10,d2
106 add d2,a2
107 mov (a2),d2 # get pte from PTD[addr 21..12]
108 btst _PAGE_VALID,d2
109 beq dtlb_miss_fault # jump if doesn't point to a page
110 # (might be a swap id)
111 bset _PAGE_ACCESSED,(0,a2)
112 and ~(xPTEL_UNUSED1|xPTEL_UNUSED2),d2
113dtlb_miss_set:
114 mov d2,(DPTEL) # change the TLB
115#ifdef CONFIG_GDBSTUB
116 movm (sp),[d2,d3,a2]
117#endif
118 rti
119
120dtlb_miss_fault:
121 mov _PAGE_VALID,d2 # force address error handler to be
122 # invoked
123 bra dtlb_miss_set
124 .size dtlb_miss, . - dtlb_miss
125
126###############################################################################
127#
128# Instruction TLB Address Error handler entry point
129#
130###############################################################################
131 .type itlb_aerror,@function
132ENTRY(itlb_aerror)
133 and ~EPSW_NMID,epsw
134 add -4,sp
135 SAVE_ALL
136 add -4,sp # need to pass three params
137
138 # calculate the fault code
139 movhu (MMUFCR_IFC),d1
140 or 0x00010000,d1 # it's an instruction fetch
141
142 # determine the page address
143 mov (IPTEU),a2
144 mov a2,d0
145 and PAGE_MASK,d0
146 mov d0,(12,sp)
147
148 clr d0
149 mov d0,(IPTEL)
150
151 and ~EPSW_NMID,epsw
152 or EPSW_IE,epsw
153 mov fp,d0
154 call do_page_fault[],0 # do_page_fault(regs,code,addr
155
156 jmp ret_from_exception
157 .size itlb_aerror, . - itlb_aerror
158
159###############################################################################
160#
161# Data TLB Address Error handler entry point
162#
163###############################################################################
164 .type dtlb_aerror,@function
165ENTRY(dtlb_aerror)
166 and ~EPSW_NMID,epsw
167 add -4,sp
168 mov d1,(sp)
169
170 movhu (MMUFCR_DFC),d1 # is it the initial valid write
171 # to this page?
172 and MMUFCR_xFC_INITWR,d1
173 beq dtlb_pagefault # jump if not
174
175 mov (DPTEL),d1 # set the dirty bit
176 # (don't replace with BSET!)
177 or _PAGE_DIRTY,d1
178 mov d1,(DPTEL)
179 mov (sp),d1
180 add 4,sp
181 rti
182
183 ALIGN
184dtlb_pagefault:
185 mov (sp),d1
186 SAVE_ALL
187 add -4,sp # need to pass three params
188
189 # calculate the fault code
190 movhu (MMUFCR_DFC),d1
191
192 # determine the page address
193 mov (DPTEU),a2
194 mov a2,d0
195 and PAGE_MASK,d0
196 mov d0,(12,sp)
197
198 clr d0
199 mov d0,(DPTEL)
200
201 and ~EPSW_NMID,epsw
202 or EPSW_IE,epsw
203 mov fp,d0
204 call do_page_fault[],0 # do_page_fault(regs,code,addr
205
206 jmp ret_from_exception
207 .size dtlb_aerror, . - dtlb_aerror
diff --git a/arch/mn10300/oprofile/Kconfig b/arch/mn10300/oprofile/Kconfig
new file mode 100644
index 000000000000..19d37730b664
--- /dev/null
+++ b/arch/mn10300/oprofile/Kconfig
@@ -0,0 +1,23 @@
1
2menu "Profiling support"
3 depends on EXPERIMENTAL
4
5config PROFILING
6 bool "Profiling support (EXPERIMENTAL)"
7 help
8 Say Y here to enable the extended profiling support mechanisms used
9 by profilers such as OProfile.
10
11
12config OPROFILE
13 tristate "OProfile system profiling (EXPERIMENTAL)"
14 depends on PROFILING
15 help
16 OProfile is a profiling system capable of profiling the
17 whole system, include the kernel, kernel modules, libraries,
18 and applications.
19
20 If unsure, say N.
21
22endmenu
23
diff --git a/arch/mn10300/oprofile/Makefile b/arch/mn10300/oprofile/Makefile
new file mode 100644
index 000000000000..918dbe60ebb6
--- /dev/null
+++ b/arch/mn10300/oprofile/Makefile
@@ -0,0 +1,13 @@
1#
2# Makefile for the MN10300-specific profiling code
3#
4obj-$(CONFIG_OPROFILE) += oprofile.o
5
6DRIVER_OBJS = $(addprefix ../../../drivers/oprofile/, \
7 oprof.o cpu_buffer.o buffer_sync.o \
8 event_buffer.o oprofile_files.o \
9 oprofilefs.o oprofile_stats.o \
10 timer_int.o )
11
12oprofile-y := $(DRIVER_OBJS) op_model_null.o
13
diff --git a/arch/mn10300/oprofile/op_model_null.c b/arch/mn10300/oprofile/op_model_null.c
new file mode 100644
index 000000000000..cd4ab374bc4f
--- /dev/null
+++ b/arch/mn10300/oprofile/op_model_null.c
@@ -0,0 +1,22 @@
1/* Null profiling driver
2 *
3 * Copyright (C) 2003 Paul Mundt
4 *
5 * This file is subject to the terms and conditions of the GNU General Public
6 * Licence. See the file "COPYING" in the main directory of this archive
7 * for more details.
8 */
9#include <linux/kernel.h>
10#include <linux/oprofile.h>
11#include <linux/init.h>
12#include <linux/errno.h>
13
14int __init oprofile_arch_init(struct oprofile_operations *ops)
15{
16 return -ENODEV;
17}
18
19void oprofile_arch_exit(void)
20{
21}
22
diff --git a/arch/mn10300/proc-mn103e010/Makefile b/arch/mn10300/proc-mn103e010/Makefile
new file mode 100644
index 000000000000..ac2c9784cd21
--- /dev/null
+++ b/arch/mn10300/proc-mn103e010/Makefile
@@ -0,0 +1,5 @@
1#
2# Makefile for the MN103E010 processor chip specific code
3#
4obj-y := proc-init.o
5
diff --git a/arch/mn10300/proc-mn103e010/proc-init.c b/arch/mn10300/proc-mn103e010/proc-init.c
new file mode 100644
index 000000000000..9a482efafa82
--- /dev/null
+++ b/arch/mn10300/proc-mn103e010/proc-init.c
@@ -0,0 +1,75 @@
1/* MN103E010 Processor initialisation
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#include <linux/kernel.h>
12#include <asm/rtc.h>
13
14/*
15 * initialise the on-silicon processor peripherals
16 */
17asmlinkage void __init processor_init(void)
18{
19 int loop;
20
21 /* set up the exception table first */
22 for (loop = 0x000; loop < 0x400; loop += 8)
23 __set_intr_stub(loop, __common_exception);
24
25 __set_intr_stub(EXCEP_ITLBMISS, itlb_miss);
26 __set_intr_stub(EXCEP_DTLBMISS, dtlb_miss);
27 __set_intr_stub(EXCEP_IAERROR, itlb_aerror);
28 __set_intr_stub(EXCEP_DAERROR, dtlb_aerror);
29 __set_intr_stub(EXCEP_BUSERROR, raw_bus_error);
30 __set_intr_stub(EXCEP_DOUBLE_FAULT, double_fault);
31 __set_intr_stub(EXCEP_SYSCALL0, system_call);
32
33 __set_intr_stub(EXCEP_NMI, nmi_handler);
34 __set_intr_stub(EXCEP_WDT, nmi_handler);
35 __set_intr_stub(EXCEP_IRQ_LEVEL0, irq_handler);
36 __set_intr_stub(EXCEP_IRQ_LEVEL1, irq_handler);
37 __set_intr_stub(EXCEP_IRQ_LEVEL2, irq_handler);
38 __set_intr_stub(EXCEP_IRQ_LEVEL3, irq_handler);
39 __set_intr_stub(EXCEP_IRQ_LEVEL4, irq_handler);
40 __set_intr_stub(EXCEP_IRQ_LEVEL5, irq_handler);
41 __set_intr_stub(EXCEP_IRQ_LEVEL6, irq_handler);
42
43 IVAR0 = EXCEP_IRQ_LEVEL0;
44 IVAR1 = EXCEP_IRQ_LEVEL1;
45 IVAR2 = EXCEP_IRQ_LEVEL2;
46 IVAR3 = EXCEP_IRQ_LEVEL3;
47 IVAR4 = EXCEP_IRQ_LEVEL4;
48 IVAR5 = EXCEP_IRQ_LEVEL5;
49 IVAR6 = EXCEP_IRQ_LEVEL6;
50
51 mn10300_dcache_flush_inv();
52 mn10300_icache_inv();
53
54 /* disable all interrupts and set to priority 6 (lowest) */
55 for (loop = 0; loop < NR_IRQS; loop++)
56 GxICR(loop) = GxICR_LEVEL_6 | GxICR_DETECT;
57
58 /* clear the timers */
59 TM0MD = 0;
60 TM1MD = 0;
61 TM2MD = 0;
62 TM3MD = 0;
63 TM4MD = 0;
64 TM5MD = 0;
65 TM6MD = 0;
66 TM6MDA = 0;
67 TM6MDB = 0;
68 TM7MD = 0;
69 TM8MD = 0;
70 TM9MD = 0;
71 TM10MD = 0;
72 TM11MD = 0;
73
74 calibrate_clock();
75}
diff --git a/arch/mn10300/unit-asb2303/Makefile b/arch/mn10300/unit-asb2303/Makefile
new file mode 100644
index 000000000000..38a5bb43b0bb
--- /dev/null
+++ b/arch/mn10300/unit-asb2303/Makefile
@@ -0,0 +1,6 @@
1###############################################################################
2#
3# Makefile for the ASB2303 board
4#
5###############################################################################
6obj-y := unit-init.o smc91111.o flash.o leds.o
diff --git a/arch/mn10300/unit-asb2303/flash.c b/arch/mn10300/unit-asb2303/flash.c
new file mode 100644
index 000000000000..17fe083fcb6f
--- /dev/null
+++ b/arch/mn10300/unit-asb2303/flash.c
@@ -0,0 +1,100 @@
1/* Handle mapping of the flash on the ASB2303 board
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#include <linux/init.h>
12#include <linux/platform_device.h>
13#include <linux/mtd/partitions.h>
14#include <linux/mtd/physmap.h>
15
16#define ASB2303_PROM_ADDR 0xA0000000 /* Boot PROM */
17#define ASB2303_PROM_SIZE (2 * 1024 * 1024)
18#define ASB2303_FLASH_ADDR 0xA4000000 /* System Flash */
19#define ASB2303_FLASH_SIZE (32 * 1024 * 1024)
20#define ASB2303_CONFIG_ADDR 0xA6000000 /* System Config EEPROM */
21#define ASB2303_CONFIG_SIZE (8 * 1024)
22
23/*
24 * default MTD partition table for both main flash devices, expected to be
25 * overridden by RedBoot
26 */
27static struct mtd_partition asb2303_partitions[] = {
28 {
29 .name = "Bootloader",
30 .size = 0x00040000,
31 .offset = 0,
32 .mask_flags = MTD_CAP_ROM /* force read-only */
33 }, {
34 .name = "Kernel",
35 .size = 0x00400000,
36 .offset = 0x00040000,
37 }, {
38 .name = "Filesystem",
39 .size = MTDPART_SIZ_FULL,
40 .offset = 0x00440000
41 }
42};
43
44/*
45 * the ASB2303 Boot PROM definition
46 */
47static struct physmap_flash_data asb2303_bootprom_data = {
48 .width = 2,
49 .nr_parts = 1,
50 .parts = asb2303_partitions,
51};
52
53static struct resource asb2303_bootprom_resource = {
54 .start = ASB2303_PROM_ADDR,
55 .end = ASB2303_PROM_ADDR + ASB2303_PROM_SIZE,
56 .flags = IORESOURCE_MEM,
57};
58
59static struct platform_device asb2303_bootprom = {
60 .name = "physmap-flash",
61 .id = 0,
62 .dev.platform_data = &asb2303_bootprom_data,
63 .num_resources = 1,
64 .resource = &asb2303_bootprom_resource,
65};
66
67/*
68 * the ASB2303 System Flash definition
69 */
70static struct physmap_flash_data asb2303_sysflash_data = {
71 .width = 4,
72 .nr_parts = 1,
73 .parts = asb2303_partitions,
74};
75
76static struct resource asb2303_sysflash_resource = {
77 .start = ASB2303_FLASH_ADDR,
78 .end = ASB2303_FLASH_ADDR + ASB2303_FLASH_SIZE,
79 .flags = IORESOURCE_MEM,
80};
81
82static struct platform_device asb2303_sysflash = {
83 .name = "physmap-flash",
84 .id = 1,
85 .dev.platform_data = &asb2303_sysflash_data,
86 .num_resources = 1,
87 .resource = &asb2303_sysflash_resource,
88};
89
90/*
91 * register the ASB2303 flashes
92 */
93static int __init asb2303_mtd_init(void)
94{
95 platform_device_register(&asb2303_bootprom);
96 platform_device_register(&asb2303_sysflash);
97 return 0;
98}
99
100module_init(asb2303_mtd_init);
diff --git a/arch/mn10300/unit-asb2303/leds.c b/arch/mn10300/unit-asb2303/leds.c
new file mode 100644
index 000000000000..cd4bc78ccfc8
--- /dev/null
+++ b/arch/mn10300/unit-asb2303/leds.c
@@ -0,0 +1,52 @@
1/* ASB2303 peripheral 7-segment LEDs x1 support
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#include <linux/kernel.h>
12#include <linux/param.h>
13#include <linux/init.h>
14
15#include <asm/io.h>
16#include <asm/processor.h>
17#include <asm/intctl-regs.h>
18#include <asm/rtc-regs.h>
19#include <asm/unit/leds.h>
20
21#if 0
22static const u8 asb2303_led_hex_tbl[16] = {
23 0x80, 0xf2, 0x48, 0x60, 0x32, 0x24, 0x04, 0xf0,
24 0x00, 0x20, 0x10, 0x06, 0x8c, 0x42, 0x0c, 0x1c
25};
26#endif
27
28static const u8 asb2303_led_chase_tbl[6] = {
29 ~0x02, /* top - segA */
30 ~0x04, /* right top - segB */
31 ~0x08, /* right bottom - segC */
32 ~0x10, /* bottom - segD */
33 ~0x20, /* left bottom - segE */
34 ~0x40, /* left top - segF */
35};
36
37static unsigned asb2303_led_chase;
38
39void peripheral_leds_display_exception(enum exception_code code)
40{
41 ASB2303_GPIO0DEF = 0x5555; /* configure as an output port */
42 ASB2303_7SEGLEDS = 0x6d; /* triple horizontal bar */
43}
44
45void peripheral_leds_led_chase(void)
46{
47 ASB2303_GPIO0DEF = 0x5555; /* configure as an output port */
48 ASB2303_7SEGLEDS = asb2303_led_chase_tbl[asb2303_led_chase];
49 asb2303_led_chase++;
50 if (asb2303_led_chase >= 6)
51 asb2303_led_chase = 0;
52}
diff --git a/arch/mn10300/unit-asb2303/smc91111.c b/arch/mn10300/unit-asb2303/smc91111.c
new file mode 100644
index 000000000000..30875dd65631
--- /dev/null
+++ b/arch/mn10300/unit-asb2303/smc91111.c
@@ -0,0 +1,52 @@
1/* ASB2303 initialisation
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11
12#include <linux/kernel.h>
13#include <linux/param.h>
14#include <linux/init.h>
15#include <linux/platform_device.h>
16
17#include <asm/io.h>
18#include <asm/timex.h>
19#include <asm/processor.h>
20#include <asm/intctl-regs.h>
21#include <asm/unit/smc91111.h>
22
23static struct resource smc91c111_resources[] = {
24 [0] = {
25 .start = SMC91111_BASE,
26 .end = SMC91111_BASE_END,
27 .flags = IORESOURCE_MEM,
28 },
29 [1] = {
30 .start = SMC91111_IRQ,
31 .end = SMC91111_IRQ,
32 .flags = IORESOURCE_IRQ,
33 },
34};
35
36static struct platform_device smc91c111_device = {
37 .name = "smc91x",
38 .id = 0,
39 .num_resources = ARRAY_SIZE(smc91c111_resources),
40 .resource = smc91c111_resources,
41};
42
43/*
44 * add platform devices
45 */
46static int __init unit_device_init(void)
47{
48 platform_device_register(&smc91c111_device);
49 return 0;
50}
51
52device_initcall(unit_device_init);
diff --git a/arch/mn10300/unit-asb2303/unit-init.c b/arch/mn10300/unit-asb2303/unit-init.c
new file mode 100644
index 000000000000..14b2c817cff8
--- /dev/null
+++ b/arch/mn10300/unit-asb2303/unit-init.c
@@ -0,0 +1,60 @@
1/* ASB2303 initialisation
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11
12#include <linux/kernel.h>
13#include <linux/param.h>
14#include <linux/init.h>
15#include <linux/device.h>
16
17#include <asm/io.h>
18#include <asm/setup.h>
19#include <asm/processor.h>
20#include <asm/irq.h>
21#include <asm/intctl-regs.h>
22
23/*
24 * initialise some of the unit hardware before gdbstub is set up
25 */
26asmlinkage void __init unit_init(void)
27{
28 /* set up the external interrupts */
29 SET_XIRQ_TRIGGER(0, XIRQ_TRIGGER_HILEVEL);
30 SET_XIRQ_TRIGGER(2, XIRQ_TRIGGER_LOWLEVEL);
31 SET_XIRQ_TRIGGER(3, XIRQ_TRIGGER_HILEVEL);
32 SET_XIRQ_TRIGGER(4, XIRQ_TRIGGER_LOWLEVEL);
33 SET_XIRQ_TRIGGER(5, XIRQ_TRIGGER_LOWLEVEL);
34}
35
36/*
37 * initialise the rest of the unit hardware after gdbstub is ready
38 */
39void __init unit_setup(void)
40{
41}
42
43/*
44 * initialise the external interrupts used by a unit of this type
45 */
46void __init unit_init_IRQ(void)
47{
48 unsigned int extnum;
49
50 for (extnum = 0; extnum < NR_XIRQS; extnum++) {
51 switch (GET_XIRQ_TRIGGER(extnum)) {
52 case XIRQ_TRIGGER_HILEVEL:
53 case XIRQ_TRIGGER_LOWLEVEL:
54 set_irq_handler(XIRQ2IRQ(extnum), handle_level_irq);
55 break;
56 default:
57 break;
58 }
59 }
60}
diff --git a/arch/mn10300/unit-asb2305/Makefile b/arch/mn10300/unit-asb2305/Makefile
new file mode 100644
index 000000000000..0551022225b3
--- /dev/null
+++ b/arch/mn10300/unit-asb2305/Makefile
@@ -0,0 +1,8 @@
1###############################################################################
2#
3# Makefile for the ASB2305 board
4#
5###############################################################################
6obj-y := unit-init.o leds.o
7
8obj-$(CONFIG_PCI) += pci.o pci-asb2305.o pci-irq.o pci-iomap.o
diff --git a/arch/mn10300/unit-asb2305/leds.c b/arch/mn10300/unit-asb2305/leds.c
new file mode 100644
index 000000000000..e99dcc9cee1a
--- /dev/null
+++ b/arch/mn10300/unit-asb2305/leds.c
@@ -0,0 +1,124 @@
1/* ASB2305 Peripheral 7-segment LEDs x4 support
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#include <linux/kernel.h>
12#include <linux/param.h>
13#include <linux/init.h>
14#include <asm/io.h>
15#include <asm/processor.h>
16#include <asm/cpu/intctl-regs.h>
17#include <asm/cpu/rtc-regs.h>
18#include <asm/unit/leds.h>
19
20static const u8 asb2305_led_hex_tbl[16] = {
21 0x80, 0xf2, 0x48, 0x60, 0x32, 0x24, 0x04, 0xf0,
22 0x00, 0x20, 0x10, 0x06, 0x8c, 0x42, 0x0c, 0x1c
23};
24
25static const u32 asb2305_led_chase_tbl[6] = {
26 ~0x02020202, /* top - segA */
27 ~0x04040404, /* right top - segB */
28 ~0x08080808, /* right bottom - segC */
29 ~0x10101010, /* bottom - segD */
30 ~0x20202020, /* left bottom - segE */
31 ~0x40404040, /* left top - segF */
32};
33
34static unsigned asb2305_led_chase;
35
36void peripheral_leds7x4_display_dec(unsigned int val, unsigned int points)
37{
38 u32 leds;
39
40 leds = asb2305_led_hex_tbl[(val/1000) % 10];
41 leds <<= 8;
42 leds |= asb2305_led_hex_tbl[(val/100) % 10];
43 leds <<= 8;
44 leds |= asb2305_led_hex_tbl[(val/10) % 10];
45 leds <<= 8;
46 leds |= asb2305_led_hex_tbl[val % 10];
47 leds |= points^0x01010101;
48
49 ASB2305_7SEGLEDS = leds;
50}
51
52void peripheral_leds7x4_display_hex(unsigned int val, unsigned int points)
53{
54 u32 leds;
55
56 leds = asb2305_led_hex_tbl[(val/1000) % 10];
57 leds <<= 8;
58 leds |= asb2305_led_hex_tbl[(val/100) % 10];
59 leds <<= 8;
60 leds |= asb2305_led_hex_tbl[(val/10) % 10];
61 leds <<= 8;
62 leds |= asb2305_led_hex_tbl[val % 10];
63 leds |= points^0x01010101;
64
65 ASB2305_7SEGLEDS = leds;
66}
67
68void peripheral_leds_display_exception(enum exception_code code)
69{
70 u32 leds;
71
72 leds = asb2305_led_hex_tbl[(code/0x100) % 0x10];
73 leds <<= 8;
74 leds |= asb2305_led_hex_tbl[(code/0x10) % 0x10];
75 leds <<= 8;
76 leds |= asb2305_led_hex_tbl[code % 0x10];
77 leds |= 0x6d010101;
78
79 ASB2305_7SEGLEDS = leds;
80}
81
82void peripheral_leds7x4_display_minssecs(unsigned int time, unsigned int points)
83{
84 u32 leds;
85
86 leds = asb2305_led_hex_tbl[(time/600) % 6];
87 leds <<= 8;
88 leds |= asb2305_led_hex_tbl[(time/60) % 10];
89 leds <<= 8;
90 leds |= asb2305_led_hex_tbl[(time/10) % 6];
91 leds <<= 8;
92 leds |= asb2305_led_hex_tbl[time % 10];
93 leds |= points^0x01010101;
94
95 ASB2305_7SEGLEDS = leds;
96}
97
98void peripheral_leds7x4_display_rtc(void)
99{
100 unsigned int clock;
101 u8 mins, secs;
102
103 mins = RTMCR;
104 secs = RTSCR;
105
106 clock = ((mins & 0xf0) >> 4);
107 clock *= 10;
108 clock += (mins & 0x0f);
109 clock *= 6;
110
111 clock += ((secs & 0xf0) >> 4);
112 clock *= 10;
113 clock += (secs & 0x0f);
114
115 peripheral_leds7x4_display_minssecs(clock, 0);
116}
117
118void peripheral_leds_led_chase(void)
119{
120 ASB2305_7SEGLEDS = asb2305_led_chase_tbl[asb2305_led_chase];
121 asb2305_led_chase++;
122 if (asb2305_led_chase >= 6)
123 asb2305_led_chase = 0;
124}
diff --git a/arch/mn10300/unit-asb2305/pci-asb2305.c b/arch/mn10300/unit-asb2305/pci-asb2305.c
new file mode 100644
index 000000000000..d100ca788468
--- /dev/null
+++ b/arch/mn10300/unit-asb2305/pci-asb2305.c
@@ -0,0 +1,303 @@
1/* ASB2305 PCI resource stuff
2 *
3 * Copyright (C) 2001 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 * - Derived from arch/i386/pci-i386.c
6 * - Copyright 1997--2000 Martin Mares <mj@suse.cz>
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public Licence
10 * as published by the Free Software Foundation; either version
11 * 2 of the Licence, or (at your option) any later version.
12 */
13#include <linux/types.h>
14#include <linux/kernel.h>
15#include <linux/pci.h>
16#include <linux/init.h>
17#include <linux/ioport.h>
18#include <linux/errno.h>
19#include "pci-asb2305.h"
20
21/*
22 * We need to avoid collisions with `mirrored' VGA ports
23 * and other strange ISA hardware, so we always want the
24 * addresses to be allocated in the 0x000-0x0ff region
25 * modulo 0x400.
26 *
27 * Why? Because some silly external IO cards only decode
28 * the low 10 bits of the IO address. The 0x00-0xff region
29 * is reserved for motherboard devices that decode all 16
30 * bits, so it's ok to allocate at, say, 0x2800-0x28ff,
31 * but we want to try to avoid allocating at 0x2900-0x2bff
32 * which might have be mirrored at 0x0100-0x03ff..
33 */
34void pcibios_align_resource(void *data, struct resource *res,
35 resource_size_t size, resource_size_t align)
36{
37#if 0
38 struct pci_dev *dev = data;
39
40 printk(KERN_DEBUG
41 "### PCIBIOS_ALIGN_RESOURCE(%s,,{%08lx-%08lx,%08lx},%lx)\n",
42 pci_name(dev),
43 res->start,
44 res->end,
45 res->flags,
46 size
47 );
48#endif
49
50 if (res->flags & IORESOURCE_IO) {
51 unsigned long start = res->start;
52
53 if (start & 0x300) {
54 start = (start + 0x3ff) & ~0x3ff;
55 res->start = start;
56 }
57 }
58}
59
60
61/*
62 * Handle resources of PCI devices. If the world were perfect, we could
63 * just allocate all the resource regions and do nothing more. It isn't.
64 * On the other hand, we cannot just re-allocate all devices, as it would
65 * require us to know lots of host bridge internals. So we attempt to
66 * keep as much of the original configuration as possible, but tweak it
67 * when it's found to be wrong.
68 *
69 * Known BIOS problems we have to work around:
70 * - I/O or memory regions not configured
71 * - regions configured, but not enabled in the command register
72 * - bogus I/O addresses above 64K used
73 * - expansion ROMs left enabled (this may sound harmless, but given
74 * the fact the PCI specs explicitly allow address decoders to be
75 * shared between expansion ROMs and other resource regions, it's
76 * at least dangerous)
77 *
78 * Our solution:
79 * (1) Allocate resources for all buses behind PCI-to-PCI bridges.
80 * This gives us fixed barriers on where we can allocate.
81 * (2) Allocate resources for all enabled devices. If there is
82 * a collision, just mark the resource as unallocated. Also
83 * disable expansion ROMs during this step.
84 * (3) Try to allocate resources for disabled devices. If the
85 * resources were assigned correctly, everything goes well,
86 * if they weren't, they won't disturb allocation of other
87 * resources.
88 * (4) Assign new addresses to resources which were either
89 * not configured at all or misconfigured. If explicitly
90 * requested by the user, configure expansion ROM address
91 * as well.
92 */
93static void __init pcibios_allocate_bus_resources(struct list_head *bus_list)
94{
95 struct pci_bus *bus;
96 struct pci_dev *dev;
97 int idx;
98 struct resource *r, *pr;
99
100 /* Depth-First Search on bus tree */
101 list_for_each_entry(bus, bus_list, node) {
102 dev = bus->self;
103 if (dev) {
104 for (idx = PCI_BRIDGE_RESOURCES;
105 idx < PCI_NUM_RESOURCES;
106 idx++) {
107 r = &dev->resource[idx];
108 if (!r->flags)
109 continue;
110 pr = pci_find_parent_resource(dev, r);
111 if (!r->start ||
112 !pr ||
113 request_resource(pr, r) < 0) {
114 printk(KERN_ERR "PCI:"
115 " Cannot allocate resource"
116 " region %d of bridge %s\n",
117 idx, pci_name(dev));
118 /* Something is wrong with the region.
119 * Invalidate the resource to prevent
120 * child resource allocations in this
121 * range. */
122 r->flags = 0;
123 }
124 }
125 }
126 pcibios_allocate_bus_resources(&bus->children);
127 }
128}
129
130static void __init pcibios_allocate_resources(int pass)
131{
132 struct pci_dev *dev = NULL;
133 int idx, disabled;
134 u16 command;
135 struct resource *r, *pr;
136
137 for_each_pci_dev(dev) {
138 pci_read_config_word(dev, PCI_COMMAND, &command);
139 for (idx = 0; idx < 6; idx++) {
140 r = &dev->resource[idx];
141 if (r->parent) /* Already allocated */
142 continue;
143 if (!r->start) /* Address not assigned */
144 continue;
145 if (r->flags & IORESOURCE_IO)
146 disabled = !(command & PCI_COMMAND_IO);
147 else
148 disabled = !(command & PCI_COMMAND_MEMORY);
149 if (pass == disabled) {
150 DBG("PCI[%s]: Resource %08lx-%08lx"
151 " (f=%lx, d=%d, p=%d)\n",
152 pci_name(dev), r->start, r->end, r->flags,
153 disabled, pass);
154 pr = pci_find_parent_resource(dev, r);
155 if (!pr || request_resource(pr, r) < 0) {
156 printk(KERN_ERR "PCI:"
157 " Cannot allocate resource"
158 " region %d of device %s\n",
159 idx, pci_name(dev));
160 /* We'll assign a new address later */
161 r->end -= r->start;
162 r->start = 0;
163 }
164 }
165 }
166 if (!pass) {
167 r = &dev->resource[PCI_ROM_RESOURCE];
168 if (r->flags & IORESOURCE_ROM_ENABLE) {
169 /* Turn the ROM off, leave the resource region,
170 * but keep it unregistered. */
171 u32 reg;
172 DBG("PCI: Switching off ROM of %s\n",
173 pci_name(dev));
174 r->flags &= ~IORESOURCE_ROM_ENABLE;
175 pci_read_config_dword(
176 dev, dev->rom_base_reg, &reg);
177 pci_write_config_dword(
178 dev, dev->rom_base_reg,
179 reg & ~PCI_ROM_ADDRESS_ENABLE);
180 }
181 }
182 }
183}
184
185static int __init pcibios_assign_resources(void)
186{
187 struct pci_dev *dev = NULL;
188 struct resource *r, *pr;
189
190 if (!(pci_probe & PCI_ASSIGN_ROMS)) {
191 /* Try to use BIOS settings for ROMs, otherwise let
192 pci_assign_unassigned_resources() allocate the new
193 addresses. */
194 for_each_pci_dev(dev) {
195 r = &dev->resource[PCI_ROM_RESOURCE];
196 if (!r->flags || !r->start)
197 continue;
198 pr = pci_find_parent_resource(dev, r);
199 if (!pr || request_resource(pr, r) < 0) {
200 r->end -= r->start;
201 r->start = 0;
202 }
203 }
204 }
205
206 pci_assign_unassigned_resources();
207
208 return 0;
209}
210
211fs_initcall(pcibios_assign_resources);
212
213void __init pcibios_resource_survey(void)
214{
215 DBG("PCI: Allocating resources\n");
216 pcibios_allocate_bus_resources(&pci_root_buses);
217 pcibios_allocate_resources(0);
218 pcibios_allocate_resources(1);
219}
220
221int pcibios_enable_resources(struct pci_dev *dev, int mask)
222{
223 u16 cmd, old_cmd;
224 int idx;
225 struct resource *r;
226
227 pci_read_config_word(dev, PCI_COMMAND, &cmd);
228 old_cmd = cmd;
229
230 for (idx = 0; idx < 6; idx++) {
231 /* Only set up the requested stuff */
232 if (!(mask & (1 << idx)))
233 continue;
234
235 r = &dev->resource[idx];
236
237 if (!r->start && r->end) {
238 printk(KERN_ERR
239 "PCI: Device %s not available because of"
240 " resource collisions\n",
241 pci_name(dev));
242 return -EINVAL;
243 }
244
245 if (r->flags & IORESOURCE_IO)
246 cmd |= PCI_COMMAND_IO;
247 if (r->flags & IORESOURCE_MEM)
248 cmd |= PCI_COMMAND_MEMORY;
249 }
250
251 if (dev->resource[PCI_ROM_RESOURCE].start)
252 cmd |= PCI_COMMAND_MEMORY;
253
254 if (cmd != old_cmd)
255 pci_write_config_word(dev, PCI_COMMAND, cmd);
256
257 return 0;
258}
259
260/*
261 * If we set up a device for bus mastering, we need to check the latency
262 * timer as certain crappy BIOSes forget to set it properly.
263 */
264unsigned int pcibios_max_latency = 255;
265
266void pcibios_set_master(struct pci_dev *dev)
267{
268 u8 lat;
269
270 pci_read_config_byte(dev, PCI_LATENCY_TIMER, &lat);
271
272 if (lat < 16)
273 lat = (64 <= pcibios_max_latency) ? 64 : pcibios_max_latency;
274 else if (lat > pcibios_max_latency)
275 lat = pcibios_max_latency;
276 else
277 return;
278
279 pci_write_config_byte(dev, PCI_LATENCY_TIMER, lat);
280}
281
282int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,
283 enum pci_mmap_state mmap_state, int write_combine)
284{
285 unsigned long prot;
286
287 /* Leave vm_pgoff as-is, the PCI space address is the physical
288 * address on this platform.
289 */
290 vma->vm_flags |= VM_LOCKED | VM_IO;
291
292 prot = pgprot_val(vma->vm_page_prot);
293 prot &= ~_PAGE_CACHE;
294 vma->vm_page_prot = __pgprot(prot);
295
296 /* Write-combine setting is ignored */
297 if (io_remap_pfn_range(vma, vma->vm_start, vma->vm_pgoff,
298 vma->vm_end - vma->vm_start,
299 vma->vm_page_prot))
300 return -EAGAIN;
301
302 return 0;
303}
diff --git a/arch/mn10300/unit-asb2305/pci-asb2305.h b/arch/mn10300/unit-asb2305/pci-asb2305.h
new file mode 100644
index 000000000000..84634fa3bce6
--- /dev/null
+++ b/arch/mn10300/unit-asb2305/pci-asb2305.h
@@ -0,0 +1,82 @@
1/* ASB2305 Arch-specific PCI declarations
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 * Derived from: arch/i386/kernel/pci-i386.h: (c) 1999 Martin Mares <mj@ucw.cz>
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public Licence
9 * as published by the Free Software Foundation; either version
10 * 2 of the Licence, or (at your option) any later version.
11 */
12#ifndef _PCI_ASB2305_H
13#define _PCI_ASB2305_H
14
15#undef DEBUG
16
17#ifdef DEBUG
18#define DBG(x...) printk(x)
19#else
20#define DBG(x...)
21#endif
22
23#define PCI_PROBE_BIOS 1
24#define PCI_PROBE_CONF1 2
25#define PCI_PROBE_CONF2 4
26#define PCI_NO_SORT 0x100
27#define PCI_BIOS_SORT 0x200
28#define PCI_NO_CHECKS 0x400
29#define PCI_ASSIGN_ROMS 0x1000
30#define PCI_BIOS_IRQ_SCAN 0x2000
31
32extern unsigned int pci_probe;
33
34/* pci-asb2305.c */
35
36extern unsigned int pcibios_max_latency;
37
38extern void pcibios_resource_survey(void);
39extern int pcibios_enable_resources(struct pci_dev *dev, int mask);
40
41/* pci.c */
42
43extern int pcibios_last_bus;
44extern struct pci_bus *pci_root_bus;
45extern struct pci_ops *pci_root_ops;
46
47extern struct irq_routing_table *pcibios_get_irq_routing_table(void);
48extern int pcibios_set_irq_routing(struct pci_dev *dev, int pin, int irq);
49
50/* pci-irq.c */
51
52struct irq_info {
53 u8 bus, devfn; /* Bus, device and function */
54 struct {
55 u8 link; /* IRQ line ID, chipset dependent,
56 * 0=not routed */
57 u16 bitmap; /* Available IRQs */
58 } __attribute__((packed)) irq[4];
59 u8 slot; /* Slot number, 0=onboard */
60 u8 rfu;
61} __attribute__((packed));
62
63struct irq_routing_table {
64 u32 signature; /* PIRQ_SIGNATURE should be here */
65 u16 version; /* PIRQ_VERSION */
66 u16 size; /* Table size in bytes */
67 u8 rtr_bus, rtr_devfn; /* Where the interrupt router lies */
68 u16 exclusive_irqs; /* IRQs devoted exclusively to PCI usage */
69 u16 rtr_vendor, rtr_device; /* Vendor and device ID of interrupt router */
70 u32 miniport_data; /* Crap */
71 u8 rfu[11];
72 u8 checksum; /* Modulo 256 checksum must give zero */
73 struct irq_info slots[0];
74} __attribute__((packed));
75
76extern unsigned int pcibios_irq_mask;
77
78extern void pcibios_irq_init(void);
79extern void pcibios_fixup_irqs(void);
80extern void pcibios_enable_irq(struct pci_dev *dev);
81
82#endif /* PCI_ASB2305_H */
diff --git a/arch/mn10300/unit-asb2305/pci-iomap.c b/arch/mn10300/unit-asb2305/pci-iomap.c
new file mode 100644
index 000000000000..dbceae4307da
--- /dev/null
+++ b/arch/mn10300/unit-asb2305/pci-iomap.c
@@ -0,0 +1,31 @@
1/* ASB2305 PCI I/O mapping handler
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#include <linux/pci.h>
12#include <linux/module.h>
13
14/*
15 * Create a virtual mapping cookie for a PCI BAR (memory or IO)
16 */
17void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long maxlen)
18{
19 unsigned long start = pci_resource_start(dev, bar);
20 unsigned long len = pci_resource_len(dev, bar);
21 unsigned long flags = pci_resource_flags(dev, bar);
22
23 if (!len || !start)
24 return NULL;
25
26 if ((flags & IORESOURCE_IO) || (flags & IORESOURCE_MEM))
27 return (void __iomem *) start;
28
29 return NULL;
30}
31EXPORT_SYMBOL(pci_iomap);
diff --git a/arch/mn10300/unit-asb2305/pci-irq.c b/arch/mn10300/unit-asb2305/pci-irq.c
new file mode 100644
index 000000000000..58cfb44f0acf
--- /dev/null
+++ b/arch/mn10300/unit-asb2305/pci-irq.c
@@ -0,0 +1,51 @@
1/* PCI IRQ routing on the MN103E010 based ASB2305
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 *
11 * This is simple: All PCI interrupts route through the CPU's XIRQ1 pin [IRQ 35]
12 */
13#include <linux/types.h>
14#include <linux/kernel.h>
15#include <linux/pci.h>
16#include <linux/init.h>
17#include <linux/slab.h>
18#include <linux/interrupt.h>
19#include <linux/irq.h>
20#include <asm/io.h>
21#include <asm/smp.h>
22#include "pci-asb2305.h"
23
24void __init pcibios_irq_init(void)
25{
26}
27
28void __init pcibios_fixup_irqs(void)
29{
30 struct pci_dev *dev = NULL;
31 u8 line, pin;
32
33 while ((dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) {
34 pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin);
35 if (pin) {
36 dev->irq = XIRQ1;
37 pci_write_config_byte(dev, PCI_INTERRUPT_LINE,
38 dev->irq);
39 }
40 pci_read_config_byte(dev, PCI_INTERRUPT_LINE, &line);
41 }
42}
43
44void __init pcibios_penalize_isa_irq(int irq)
45{
46}
47
48void pcibios_enable_irq(struct pci_dev *dev)
49{
50 pci_write_config_byte(dev, PCI_INTERRUPT_LINE, dev->irq);
51}
diff --git a/arch/mn10300/unit-asb2305/pci.c b/arch/mn10300/unit-asb2305/pci.c
new file mode 100644
index 000000000000..1a86425fec42
--- /dev/null
+++ b/arch/mn10300/unit-asb2305/pci.c
@@ -0,0 +1,545 @@
1/* ASB2305 PCI support
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 * Derived from arch/i386/kernel/pci-pc.c
6 * (c) 1999--2000 Martin Mares <mj@suse.cz>
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public Licence
10 * as published by the Free Software Foundation; either version
11 * 2 of the Licence, or (at your option) any later version.
12 */
13#include <linux/types.h>
14#include <linux/kernel.h>
15#include <linux/sched.h>
16#include <linux/pci.h>
17#include <linux/init.h>
18#include <linux/ioport.h>
19#include <linux/delay.h>
20#include <asm/io.h>
21#include "pci-asb2305.h"
22
23unsigned int pci_probe = 1;
24
25int pcibios_last_bus = -1;
26struct pci_bus *pci_root_bus;
27struct pci_ops *pci_root_ops;
28
29/*
30 * Functions for accessing PCI configuration space
31 */
32
33#define CONFIG_CMD(bus, devfn, where) \
34 (0x80000000 | (bus->number << 16) | (devfn << 8) | (where & ~3))
35
36#define MEM_PAGING_REG (*(volatile __u32 *) 0xBFFFFFF4)
37#define CONFIG_ADDRESS (*(volatile __u32 *) 0xBFFFFFF8)
38#define CONFIG_DATAL(X) (*(volatile __u32 *) 0xBFFFFFFC)
39#define CONFIG_DATAW(X) (*(volatile __u16 *) (0xBFFFFFFC + ((X) & 2)))
40#define CONFIG_DATAB(X) (*(volatile __u8 *) (0xBFFFFFFC + ((X) & 3)))
41
42#define BRIDGEREGB(X) (*(volatile __u8 *) (0xBE040000 + (X)))
43#define BRIDGEREGW(X) (*(volatile __u16 *) (0xBE040000 + (X)))
44#define BRIDGEREGL(X) (*(volatile __u32 *) (0xBE040000 + (X)))
45
46static inline int __query(const struct pci_bus *bus, unsigned int devfn)
47{
48#if 0
49 return bus->number == 0 && (devfn == PCI_DEVFN(0, 0));
50 return bus->number == 1;
51 return bus->number == 0 &&
52 (devfn == PCI_DEVFN(2, 0) || devfn == PCI_DEVFN(3, 0));
53#endif
54 return 1;
55}
56
57/*
58 * translate Linuxcentric addresses to PCI bus addresses
59 */
60void pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region,
61 struct resource *res)
62{
63 if (res->flags & IORESOURCE_IO) {
64 region->start = (res->start & 0x00ffffff);
65 region->end = (res->end & 0x00ffffff);
66 }
67
68 if (res->flags & IORESOURCE_MEM) {
69 region->start = (res->start & 0x03ffffff) | MEM_PAGING_REG;
70 region->end = (res->end & 0x03ffffff) | MEM_PAGING_REG;
71 }
72
73#if 0
74 printk(KERN_DEBUG "RES->BUS: %lx-%lx => %lx-%lx\n",
75 res->start, res->end, region->start, region->end);
76#endif
77}
78EXPORT_SYMBOL(pcibios_resource_to_bus);
79
80/*
81 * translate PCI bus addresses to Linuxcentric addresses
82 */
83void pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res,
84 struct pci_bus_region *region)
85{
86 if (res->flags & IORESOURCE_IO) {
87 res->start = (region->start & 0x00ffffff) | 0xbe000000;
88 res->end = (region->end & 0x00ffffff) | 0xbe000000;
89 }
90
91 if (res->flags & IORESOURCE_MEM) {
92 res->start = (region->start & 0x03ffffff) | 0xb8000000;
93 res->end = (region->end & 0x03ffffff) | 0xb8000000;
94 }
95
96#if 0
97 printk(KERN_INFO "BUS->RES: %lx-%lx => %lx-%lx\n",
98 region->start, region->end, res->start, res->end);
99#endif
100}
101EXPORT_SYMBOL(pcibios_bus_to_resource);
102
103/*
104 *
105 */
106static int pci_ampci_read_config_byte(struct pci_bus *bus, unsigned int devfn,
107 int where, u32 *_value)
108{
109 u32 rawval, value;
110
111 if (bus->number == 0 && devfn == PCI_DEVFN(0, 0)) {
112 value = BRIDGEREGB(where);
113 __pcbdebug("=> %02hx", &BRIDGEREGL(where), value);
114 } else {
115 CONFIG_ADDRESS = CONFIG_CMD(bus, devfn, where);
116 rawval = CONFIG_ADDRESS;
117 value = CONFIG_DATAB(where);
118 if (__query(bus, devfn))
119 __pcidebug("=> %02hx", bus, devfn, where, value);
120 }
121
122 *_value = value;
123 return PCIBIOS_SUCCESSFUL;
124}
125
126static int pci_ampci_read_config_word(struct pci_bus *bus, unsigned int devfn,
127 int where, u32 *_value)
128{
129 u32 rawval, value;
130
131 if (bus->number == 0 && devfn == PCI_DEVFN(0, 0)) {
132 value = BRIDGEREGW(where);
133 __pcbdebug("=> %04hx", &BRIDGEREGL(where), value);
134 } else {
135 CONFIG_ADDRESS = CONFIG_CMD(bus, devfn, where);
136 rawval = CONFIG_ADDRESS;
137 value = CONFIG_DATAW(where);
138 if (__query(bus, devfn))
139 __pcidebug("=> %04hx", bus, devfn, where, value);
140 }
141
142 *_value = value;
143 return PCIBIOS_SUCCESSFUL;
144}
145
146static int pci_ampci_read_config_dword(struct pci_bus *bus, unsigned int devfn,
147 int where, u32 *_value)
148{
149 u32 rawval, value;
150
151 if (bus->number == 0 && devfn == PCI_DEVFN(0, 0)) {
152 value = BRIDGEREGL(where);
153 __pcbdebug("=> %08x", &BRIDGEREGL(where), value);
154 } else {
155 CONFIG_ADDRESS = CONFIG_CMD(bus, devfn, where);
156 rawval = CONFIG_ADDRESS;
157 value = CONFIG_DATAL(where);
158 if (__query(bus, devfn))
159 __pcidebug("=> %08x", bus, devfn, where, value);
160 }
161
162 *_value = value;
163 return PCIBIOS_SUCCESSFUL;
164}
165
166static int pci_ampci_write_config_byte(struct pci_bus *bus, unsigned int devfn,
167 int where, u8 value)
168{
169 u32 rawval;
170
171 if (bus->number == 0 && devfn == PCI_DEVFN(0, 0)) {
172 __pcbdebug("<= %02x", &BRIDGEREGB(where), value);
173 BRIDGEREGB(where) = value;
174 } else {
175 if (bus->number == 0 &&
176 (devfn == PCI_DEVFN(2, 0) && devfn == PCI_DEVFN(3, 0))
177 )
178 __pcidebug("<= %02x", bus, devfn, where, value);
179 CONFIG_ADDRESS = CONFIG_CMD(bus, devfn, where);
180 rawval = CONFIG_ADDRESS;
181 CONFIG_DATAB(where) = value;
182 }
183 return PCIBIOS_SUCCESSFUL;
184}
185
186static int pci_ampci_write_config_word(struct pci_bus *bus, unsigned int devfn,
187 int where, u16 value)
188{
189 u32 rawval;
190
191 if (bus->number == 0 && devfn == PCI_DEVFN(0, 0)) {
192 __pcbdebug("<= %04hx", &BRIDGEREGW(where), value);
193 BRIDGEREGW(where) = value;
194 } else {
195 if (__query(bus, devfn))
196 __pcidebug("<= %04hx", bus, devfn, where, value);
197 CONFIG_ADDRESS = CONFIG_CMD(bus, devfn, where);
198 rawval = CONFIG_ADDRESS;
199 CONFIG_DATAW(where) = value;
200 }
201 return PCIBIOS_SUCCESSFUL;
202}
203
204static int pci_ampci_write_config_dword(struct pci_bus *bus, unsigned int devfn,
205 int where, u32 value)
206{
207 u32 rawval;
208
209 if (bus->number == 0 && devfn == PCI_DEVFN(0, 0)) {
210 __pcbdebug("<= %08x", &BRIDGEREGL(where), value);
211 BRIDGEREGL(where) = value;
212 } else {
213 if (__query(bus, devfn))
214 __pcidebug("<= %08x", bus, devfn, where, value);
215 CONFIG_ADDRESS = CONFIG_CMD(bus, devfn, where);
216 rawval = CONFIG_ADDRESS;
217 CONFIG_DATAL(where) = value;
218 }
219 return PCIBIOS_SUCCESSFUL;
220}
221
222static int pci_ampci_read_config(struct pci_bus *bus, unsigned int devfn,
223 int where, int size, u32 *val)
224{
225 switch (size) {
226 case 1:
227 return pci_ampci_read_config_byte(bus, devfn, where, val);
228 case 2:
229 return pci_ampci_read_config_word(bus, devfn, where, val);
230 case 4:
231 return pci_ampci_read_config_dword(bus, devfn, where, val);
232 default:
233 BUG();
234 return -EOPNOTSUPP;
235 }
236}
237
238static int pci_ampci_write_config(struct pci_bus *bus, unsigned int devfn,
239 int where, int size, u32 val)
240{
241 switch (size) {
242 case 1:
243 return pci_ampci_write_config_byte(bus, devfn, where, val);
244 case 2:
245 return pci_ampci_write_config_word(bus, devfn, where, val);
246 case 4:
247 return pci_ampci_write_config_dword(bus, devfn, where, val);
248 default:
249 BUG();
250 return -EOPNOTSUPP;
251 }
252}
253
254static struct pci_ops pci_direct_ampci = {
255 pci_ampci_read_config,
256 pci_ampci_write_config,
257};
258
259/*
260 * Before we decide to use direct hardware access mechanisms, we try to do some
261 * trivial checks to ensure it at least _seems_ to be working -- we just test
262 * whether bus 00 contains a host bridge (this is similar to checking
263 * techniques used in XFree86, but ours should be more reliable since we
264 * attempt to make use of direct access hints provided by the PCI BIOS).
265 *
266 * This should be close to trivial, but it isn't, because there are buggy
267 * chipsets (yes, you guessed it, by Intel and Compaq) that have no class ID.
268 */
269static int __init pci_sanity_check(struct pci_ops *o)
270{
271 struct pci_bus bus; /* Fake bus and device */
272 u32 x;
273
274 bus.number = 0;
275
276 if ((!o->read(&bus, 0, PCI_CLASS_DEVICE, 2, &x) &&
277 (x == PCI_CLASS_BRIDGE_HOST || x == PCI_CLASS_DISPLAY_VGA)) ||
278 (!o->read(&bus, 0, PCI_VENDOR_ID, 2, &x) &&
279 (x == PCI_VENDOR_ID_INTEL || x == PCI_VENDOR_ID_COMPAQ)))
280 return 1;
281
282 printk(KERN_ERROR "PCI: Sanity check failed\n");
283 return 0;
284}
285
286static int __init pci_check_direct(void)
287{
288 unsigned long flags;
289
290 local_irq_save(flags);
291
292 /*
293 * Check if access works.
294 */
295 if (pci_sanity_check(&pci_direct_ampci)) {
296 local_irq_restore(flags);
297 printk(KERN_INFO "PCI: Using configuration ampci\n");
298 request_mem_region(0xBE040000, 256, "AMPCI bridge");
299 request_mem_region(0xBFFFFFF4, 12, "PCI ampci");
300 return 0;
301 }
302
303 local_irq_restore(flags);
304 return -ENODEV;
305}
306
307static int __devinit is_valid_resource(struct pci_dev *dev, int idx)
308{
309 unsigned int i, type_mask = IORESOURCE_IO | IORESOURCE_MEM;
310 struct resource *devr = &dev->resource[idx];
311
312 if (dev->bus) {
313 for (i = 0; i < PCI_BUS_NUM_RESOURCES; i++) {
314 struct resource *busr = dev->bus->resource[i];
315
316 if (!busr || (busr->flags ^ devr->flags) & type_mask)
317 continue;
318
319 if (devr->start &&
320 devr->start >= busr->start &&
321 devr->end <= busr->end)
322 return 1;
323 }
324 }
325
326 return 0;
327}
328
329static void __devinit pcibios_fixup_device_resources(struct pci_dev *dev)
330{
331 struct pci_bus_region region;
332 int i;
333 int limit;
334
335 if (dev->bus->number != 0)
336 return;
337
338 limit = (dev->hdr_type == PCI_HEADER_TYPE_NORMAL) ?
339 PCI_BRIDGE_RESOURCES : PCI_NUM_RESOURCES;
340
341 for (i = 0; i < limit; i++) {
342 if (!dev->resource[i].flags)
343 continue;
344
345 region.start = dev->resource[i].start;
346 region.end = dev->resource[i].end;
347 pcibios_bus_to_resource(dev, &dev->resource[i], &region);
348 if (is_valid_resource(dev, i))
349 pci_claim_resource(dev, i);
350 }
351}
352
353/*
354 * Called after each bus is probed, but before its children
355 * are examined.
356 */
357void __devinit pcibios_fixup_bus(struct pci_bus *bus)
358{
359 struct pci_dev *dev;
360
361 if (bus->self) {
362 pci_read_bridge_bases(bus);
363 pcibios_fixup_device_resources(bus->self);
364 }
365
366 list_for_each_entry(dev, &bus->devices, bus_list)
367 pcibios_fixup_device_resources(dev);
368}
369
370/*
371 * Initialization. Try all known PCI access methods. Note that we support
372 * using both PCI BIOS and direct access: in such cases, we use I/O ports
373 * to access config space, but we still keep BIOS order of cards to be
374 * compatible with 2.0.X. This should go away some day.
375 */
376static int __init pcibios_init(void)
377{
378 ioport_resource.start = 0xA0000000;
379 ioport_resource.end = 0xDFFFFFFF;
380 iomem_resource.start = 0xA0000000;
381 iomem_resource.end = 0xDFFFFFFF;
382
383 if (!pci_probe)
384 return 0;
385
386 if (pci_check_direct() < 0) {
387 printk(KERN_WARNING "PCI: No PCI bus detected\n");
388 return 0;
389 }
390
391 printk(KERN_INFO "PCI: Probing PCI hardware [mempage %08x]\n",
392 MEM_PAGING_REG);
393
394 {
395#if 0
396 static struct pci_bus am33_root_bus = {
397 .children = LIST_HEAD_INIT(am33_root_bus.children),
398 .devices = LIST_HEAD_INIT(am33_root_bus.devices),
399 .number = 0,
400 .secondary = 0,
401 .resource = { &ioport_resource, &iomem_resource },
402 };
403
404 am33_root_bus.ops = pci_root_ops;
405 list_add_tail(&am33_root_bus.node, &pci_root_buses);
406
407 am33_root_bus.subordinate = pci_do_scan_bus(0);
408
409 pci_root_bus = &am33_root_bus;
410#else
411 pci_root_bus = pci_scan_bus(0, &pci_direct_ampci, NULL);
412#endif
413 }
414
415 pcibios_irq_init();
416 pcibios_fixup_irqs();
417#if 0
418 pcibios_resource_survey();
419#endif
420 return 0;
421}
422
423arch_initcall(pcibios_init);
424
425char *__init pcibios_setup(char *str)
426{
427 if (!strcmp(str, "off")) {
428 pci_probe = 0;
429 return NULL;
430
431 } else if (!strncmp(str, "lastbus=", 8)) {
432 pcibios_last_bus = simple_strtol(str+8, NULL, 0);
433 return NULL;
434 }
435
436 return str;
437}
438
439int pcibios_enable_device(struct pci_dev *dev, int mask)
440{
441 int err;
442
443 err = pcibios_enable_resources(dev, mask);
444 if (err == 0)
445 pcibios_enable_irq(dev);
446 return err;
447}
448
449/*
450 * disable the ethernet chipset
451 */
452static void __init unit_disable_pcnet(struct pci_bus *bus, struct pci_ops *o)
453{
454 u32 x;
455
456 bus->number = 0;
457
458 o->read (bus, PCI_DEVFN(2, 0), PCI_COMMAND, 2, &x);
459 x |= PCI_COMMAND_MASTER |
460 PCI_COMMAND_IO | PCI_COMMAND_MEMORY |
461 PCI_COMMAND_SERR | PCI_COMMAND_PARITY;
462 o->write(bus, PCI_DEVFN(2, 0), PCI_COMMAND, 2, x);
463 o->read (bus, PCI_DEVFN(2, 0), PCI_COMMAND, 2, &x);
464 o->write(bus, PCI_DEVFN(2, 0), PCI_BASE_ADDRESS_0, 4, 0x00030001);
465 o->read (bus, PCI_DEVFN(2, 0), PCI_BASE_ADDRESS_0, 4, &x);
466
467#define RDP (*(volatile u32 *) 0xBE030010)
468#define RAP (*(volatile u32 *) 0xBE030014)
469#define __set_RAP(X) do { RAP = (X); x = RAP; } while (0)
470#define __set_RDP(X) do { RDP = (X); x = RDP; } while (0)
471#define __get_RDP() ({ RDP & 0xffff; })
472
473 __set_RAP(0);
474 __set_RDP(0x0004); /* CSR0 = STOP */
475
476 __set_RAP(88); /* check CSR88 indicates an Am79C973 */
477 BUG_ON(__get_RDP() != 0x5003);
478
479 for (x = 0; x < 100; x++)
480 asm volatile("nop");
481
482 __set_RDP(0x0004); /* CSR0 = STOP */
483}
484
485/*
486 * initialise the unit hardware
487 */
488asmlinkage void __init unit_pci_init(void)
489{
490 struct pci_bus bus; /* Fake bus and device */
491 struct pci_ops *o = &pci_direct_ampci;
492 u32 x;
493
494 set_intr_level(XIRQ1, GxICR_LEVEL_3);
495
496 memset(&bus, 0, sizeof(bus));
497
498 MEM_PAGING_REG = 0xE8000000;
499
500 /* we need to set up the bridge _now_ or we won't be able to access the
501 * PCI config registers
502 */
503 BRIDGEREGW(PCI_COMMAND) |=
504 PCI_COMMAND_SERR | PCI_COMMAND_PARITY |
505 PCI_COMMAND_MEMORY | PCI_COMMAND_IO | PCI_COMMAND_MASTER;
506 BRIDGEREGW(PCI_STATUS) = 0xF800;
507 BRIDGEREGB(PCI_LATENCY_TIMER) = 0x10;
508 BRIDGEREGL(PCI_BASE_ADDRESS_0) = 0x80000000;
509 BRIDGEREGB(PCI_INTERRUPT_LINE) = 1;
510 BRIDGEREGL(0x48) = 0x98000000; /* AMPCI base addr */
511 BRIDGEREGB(0x41) = 0x00; /* secondary bus
512 * number */
513 BRIDGEREGB(0x42) = 0x01; /* subordinate bus
514 * number */
515 BRIDGEREGB(0x44) = 0x01;
516 BRIDGEREGL(0x50) = 0x00000001;
517 BRIDGEREGL(0x58) = 0x00001002;
518 BRIDGEREGL(0x5C) = 0x00000011;
519
520 /* we also need to set up the PCI-PCI bridge */
521 bus.number = 0;
522
523 /* IO: 0x00000000-0x00020000 */
524 o->read (&bus, PCI_DEVFN(3, 0), PCI_COMMAND, 2, &x);
525 x |= PCI_COMMAND_MASTER |
526 PCI_COMMAND_IO | PCI_COMMAND_MEMORY |
527 PCI_COMMAND_SERR | PCI_COMMAND_PARITY;
528 o->write(&bus, PCI_DEVFN(3, 0), PCI_COMMAND, 2, x);
529
530 o->read (&bus, PCI_DEVFN(3, 0), PCI_IO_BASE, 1, &x);
531 o->read (&bus, PCI_DEVFN(3, 0), PCI_IO_BASE_UPPER16, 4, &x);
532 o->read (&bus, PCI_DEVFN(3, 0), PCI_MEMORY_BASE, 4, &x);
533 o->read (&bus, PCI_DEVFN(3, 0), PCI_PREF_MEMORY_BASE, 4, &x);
534
535 o->write(&bus, PCI_DEVFN(3, 0), PCI_IO_BASE, 1, 0x01);
536 o->read (&bus, PCI_DEVFN(3, 0), PCI_IO_BASE, 1, &x);
537 o->write(&bus, PCI_DEVFN(3, 0), PCI_IO_BASE_UPPER16, 4, 0x00020000);
538 o->read (&bus, PCI_DEVFN(3, 0), PCI_IO_BASE_UPPER16, 4, &x);
539 o->write(&bus, PCI_DEVFN(3, 0), PCI_MEMORY_BASE, 4, 0xEBB0EA00);
540 o->read (&bus, PCI_DEVFN(3, 0), PCI_MEMORY_BASE, 4, &x);
541 o->write(&bus, PCI_DEVFN(3, 0), PCI_PREF_MEMORY_BASE, 4, 0xE9F0E800);
542 o->read (&bus, PCI_DEVFN(3, 0), PCI_PREF_MEMORY_BASE, 4, &x);
543
544 unit_disable_pcnet(&bus, o);
545}
diff --git a/arch/mn10300/unit-asb2305/unit-init.c b/arch/mn10300/unit-asb2305/unit-init.c
new file mode 100644
index 000000000000..6a352414a358
--- /dev/null
+++ b/arch/mn10300/unit-asb2305/unit-init.c
@@ -0,0 +1,61 @@
1/* ASB2305 Initialisation
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#include <linux/kernel.h>
12#include <linux/param.h>
13#include <linux/init.h>
14#include <linux/pci.h>
15#include <asm/io.h>
16#include <asm/setup.h>
17#include <asm/processor.h>
18#include <asm/cpu/intctl-regs.h>
19#include <asm/cpu/rtc-regs.h>
20#include <asm/cpu/serial-regs.h>
21#include <asm/unit/serial.h>
22
23/*
24 * initialise some of the unit hardware before gdbstub is set up
25 */
26asmlinkage void __init unit_init(void)
27{
28#ifndef CONFIG_GDBSTUB_ON_TTYSx
29 /* set the 16550 interrupt line to level 3 if not being used for GDB */
30 set_intr_level(XIRQ0, GxICR_LEVEL_3);
31#endif
32}
33
34/*
35 * initialise the rest of the unit hardware after gdbstub is ready
36 */
37void __init unit_setup(void)
38{
39#ifdef CONFIG_PCI
40 unit_pci_init();
41#endif
42}
43
44/*
45 * initialise the external interrupts used by a unit of this type
46 */
47void __init unit_init_IRQ(void)
48{
49 unsigned int extnum;
50
51 for (extnum = 0; extnum < NR_XIRQS; extnum++) {
52 switch (GET_XIRQ_TRIGGER(extnum)) {
53 case XIRQ_TRIGGER_HILEVEL:
54 case XIRQ_TRIGGER_LOWLEVEL:
55 set_irq_handler(XIRQ2IRQ(extnum), handle_level_irq);
56 break;
57 default:
58 break;
59 }
60 }
61}
diff --git a/arch/parisc/Kconfig b/arch/parisc/Kconfig
index 028d8a0fdbfd..d929ac84f25a 100644
--- a/arch/parisc/Kconfig
+++ b/arch/parisc/Kconfig
@@ -75,6 +75,9 @@ config IRQ_PER_CPU
75 bool 75 bool
76 default y 76 default y
77 77
78config ARCH_SUPPORTS_AOUT
79 def_bool y
80
78# unless you want to implement ACPI on PA-RISC ... ;-) 81# unless you want to implement ACPI on PA-RISC ... ;-)
79config PM 82config PM
80 bool 83 bool
diff --git a/arch/parisc/kernel/setup.c b/arch/parisc/kernel/setup.c
index c44b8c51f5d1..39e7c5a5946a 100644
--- a/arch/parisc/kernel/setup.c
+++ b/arch/parisc/kernel/setup.c
@@ -190,7 +190,7 @@ c_stop (struct seq_file *m, void *v)
190{ 190{
191} 191}
192 192
193struct seq_operations cpuinfo_op = { 193const struct seq_operations cpuinfo_op = {
194 .start = c_start, 194 .start = c_start,
195 .next = c_next, 195 .next = c_next,
196 .stop = c_stop, 196 .stop = c_stop,
diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
index 8dcac0b22d68..26b963c33c88 100644
--- a/arch/powerpc/Kconfig
+++ b/arch/powerpc/Kconfig
@@ -272,6 +272,12 @@ config HOTPLUG_CPU
272config ARCH_ENABLE_MEMORY_HOTPLUG 272config ARCH_ENABLE_MEMORY_HOTPLUG
273 def_bool y 273 def_bool y
274 274
275config ARCH_HAS_WALK_MEMORY
276 def_bool y
277
278config ARCH_ENABLE_MEMORY_HOTREMOVE
279 def_bool y
280
275config KEXEC 281config KEXEC
276 bool "kexec system call (EXPERIMENTAL)" 282 bool "kexec system call (EXPERIMENTAL)"
277 depends on (PPC_PRPMC2800 || PPC_MULTIPLATFORM) && EXPERIMENTAL 283 depends on (PPC_PRPMC2800 || PPC_MULTIPLATFORM) && EXPERIMENTAL
diff --git a/arch/powerpc/mm/mem.c b/arch/powerpc/mm/mem.c
index 93a5c53e3423..be5c506779a7 100644
--- a/arch/powerpc/mm/mem.c
+++ b/arch/powerpc/mm/mem.c
@@ -129,6 +129,39 @@ int __devinit arch_add_memory(int nid, u64 start, u64 size)
129 return __add_pages(zone, start_pfn, nr_pages); 129 return __add_pages(zone, start_pfn, nr_pages);
130} 130}
131 131
132#ifdef CONFIG_MEMORY_HOTREMOVE
133int remove_memory(u64 start, u64 size)
134{
135 unsigned long start_pfn, end_pfn;
136 int ret;
137
138 start_pfn = start >> PAGE_SHIFT;
139 end_pfn = start_pfn + (size >> PAGE_SHIFT);
140 ret = offline_pages(start_pfn, end_pfn, 120 * HZ);
141 if (ret)
142 goto out;
143 /* Arch-specific calls go here - next patch */
144out:
145 return ret;
146}
147#endif /* CONFIG_MEMORY_HOTREMOVE */
148
149/*
150 * walk_memory_resource() needs to make sure there is no holes in a given
151 * memory range. On PPC64, since this range comes from /sysfs, the range
152 * is guaranteed to be valid, non-overlapping and can not contain any
153 * holes. By the time we get here (memory add or remove), /proc/device-tree
154 * is updated and correct. Only reason we need to check against device-tree
155 * would be if we allow user-land to specify a memory range through a
156 * system call/ioctl etc. instead of doing offline/online through /sysfs.
157 */
158int
159walk_memory_resource(unsigned long start_pfn, unsigned long nr_pages, void *arg,
160 int (*func)(unsigned long, unsigned long, void *))
161{
162 return (*func)(start_pfn, nr_pages, arg);
163}
164
132#endif /* CONFIG_MEMORY_HOTPLUG */ 165#endif /* CONFIG_MEMORY_HOTPLUG */
133 166
134void show_mem(void) 167void show_mem(void)
diff --git a/arch/powerpc/mm/pgtable_32.c b/arch/powerpc/mm/pgtable_32.c
index f80f90c4d58b..ac3390f81900 100644
--- a/arch/powerpc/mm/pgtable_32.c
+++ b/arch/powerpc/mm/pgtable_32.c
@@ -107,19 +107,20 @@ __init_refok pte_t *pte_alloc_one_kernel(struct mm_struct *mm, unsigned long add
107 return pte; 107 return pte;
108} 108}
109 109
110struct page *pte_alloc_one(struct mm_struct *mm, unsigned long address) 110pgtable_t pte_alloc_one(struct mm_struct *mm, unsigned long address)
111{ 111{
112 struct page *ptepage; 112 struct page *ptepage;
113 113
114#ifdef CONFIG_HIGHPTE 114#ifdef CONFIG_HIGHPTE
115 gfp_t flags = GFP_KERNEL | __GFP_HIGHMEM | __GFP_REPEAT; 115 gfp_t flags = GFP_KERNEL | __GFP_HIGHMEM | __GFP_REPEAT | __GFP_ZERO;
116#else 116#else
117 gfp_t flags = GFP_KERNEL | __GFP_REPEAT; 117 gfp_t flags = GFP_KERNEL | __GFP_REPEAT | __GFP_ZERO;
118#endif 118#endif
119 119
120 ptepage = alloc_pages(flags, 0); 120 ptepage = alloc_pages(flags, 0);
121 if (ptepage) 121 if (!ptepage)
122 clear_highpage(ptepage); 122 return NULL;
123 pgtable_page_ctor(ptepage);
123 return ptepage; 124 return ptepage;
124} 125}
125 126
@@ -131,11 +132,12 @@ void pte_free_kernel(struct mm_struct *mm, pte_t *pte)
131 free_page((unsigned long)pte); 132 free_page((unsigned long)pte);
132} 133}
133 134
134void pte_free(struct mm_struct *mm, struct page *ptepage) 135void pte_free(struct mm_struct *mm, pgtable_t ptepage)
135{ 136{
136#ifdef CONFIG_SMP 137#ifdef CONFIG_SMP
137 hash_page_sync(); 138 hash_page_sync();
138#endif 139#endif
140 pgtable_page_dtor(ptepage);
139 __free_page(ptepage); 141 __free_page(ptepage);
140} 142}
141 143
diff --git a/arch/powerpc/platforms/cell/iommu.c b/arch/powerpc/platforms/cell/iommu.c
index df330666ccc9..edab631a8dcb 100644
--- a/arch/powerpc/platforms/cell/iommu.c
+++ b/arch/powerpc/platforms/cell/iommu.c
@@ -26,6 +26,7 @@
26#include <linux/init.h> 26#include <linux/init.h>
27#include <linux/interrupt.h> 27#include <linux/interrupt.h>
28#include <linux/notifier.h> 28#include <linux/notifier.h>
29#include <linux/of.h>
29#include <linux/of_platform.h> 30#include <linux/of_platform.h>
30 31
31#include <asm/prom.h> 32#include <asm/prom.h>
@@ -789,18 +790,16 @@ static int __init cell_iommu_init_disabled(void)
789static u64 cell_iommu_get_fixed_address(struct device *dev) 790static u64 cell_iommu_get_fixed_address(struct device *dev)
790{ 791{
791 u64 cpu_addr, size, best_size, pci_addr = OF_BAD_ADDR; 792 u64 cpu_addr, size, best_size, pci_addr = OF_BAD_ADDR;
792 struct device_node *tmp, *np; 793 struct device_node *np;
793 const u32 *ranges = NULL; 794 const u32 *ranges = NULL;
794 int i, len, best; 795 int i, len, best;
795 796
796 np = dev->archdata.of_node; 797 np = of_node_get(dev->archdata.of_node);
797 of_node_get(np); 798 while (np) {
798 ranges = of_get_property(np, "dma-ranges", &len);
799 while (!ranges && np) {
800 tmp = of_get_parent(np);
801 of_node_put(np);
802 np = tmp;
803 ranges = of_get_property(np, "dma-ranges", &len); 799 ranges = of_get_property(np, "dma-ranges", &len);
800 if (ranges)
801 break;
802 np = of_get_next_parent(np);
804 } 803 }
805 804
806 if (!ranges) { 805 if (!ranges) {
@@ -842,19 +841,18 @@ static int dma_set_mask_and_switch(struct device *dev, u64 dma_mask)
842 if (!dev->dma_mask || !dma_supported(dev, dma_mask)) 841 if (!dev->dma_mask || !dma_supported(dev, dma_mask))
843 return -EIO; 842 return -EIO;
844 843
845 if (dma_mask == DMA_BIT_MASK(64)) { 844 if (dma_mask == DMA_BIT_MASK(64) &&
846 if (cell_iommu_get_fixed_address(dev) == OF_BAD_ADDR) 845 cell_iommu_get_fixed_address(dev) != OF_BAD_ADDR)
847 dev_dbg(dev, "iommu: 64-bit OK, but bad addr\n"); 846 {
848 else { 847 dev_dbg(dev, "iommu: 64-bit OK, using fixed ops\n");
849 dev_dbg(dev, "iommu: 64-bit OK, using fixed ops\n"); 848 set_dma_ops(dev, &dma_iommu_fixed_ops);
850 set_dma_ops(dev, &dma_iommu_fixed_ops);
851 cell_dma_dev_setup(dev);
852 }
853 } else { 849 } else {
854 dev_dbg(dev, "iommu: not 64-bit, using default ops\n"); 850 dev_dbg(dev, "iommu: not 64-bit, using default ops\n");
855 set_dma_ops(dev, get_pci_dma_ops()); 851 set_dma_ops(dev, get_pci_dma_ops());
856 } 852 }
857 853
854 cell_dma_dev_setup(dev);
855
858 *dev->dma_mask = dma_mask; 856 *dev->dma_mask = dma_mask;
859 857
860 return 0; 858 return 0;
@@ -918,6 +916,18 @@ static int __init cell_iommu_fixed_mapping_init(void)
918 return -1; 916 return -1;
919 } 917 }
920 918
919 /* We must have dma-ranges properties for fixed mapping to work */
920 for (np = NULL; (np = of_find_all_nodes(np));) {
921 if (of_find_property(np, "dma-ranges", NULL))
922 break;
923 }
924 of_node_put(np);
925
926 if (!np) {
927 pr_debug("iommu: no dma-ranges found, no fixed mapping\n");
928 return -1;
929 }
930
921 /* The default setup is to have the fixed mapping sit after the 931 /* The default setup is to have the fixed mapping sit after the
922 * dynamic region, so find the top of the largest IOMMU window 932 * dynamic region, so find the top of the largest IOMMU window
923 * on any axon, then add the size of RAM and that's our max value. 933 * on any axon, then add the size of RAM and that's our max value.
@@ -981,8 +991,8 @@ static int __init cell_iommu_fixed_mapping_init(void)
981 dsize = htab_size_bytes; 991 dsize = htab_size_bytes;
982 } 992 }
983 993
984 pr_debug("iommu: setting up %d, dynamic window %lx-%lx " \ 994 printk(KERN_DEBUG "iommu: node %d, dynamic window 0x%lx-0x%lx "
985 "fixed window %lx-%lx\n", iommu->nid, dbase, 995 "fixed window 0x%lx-0x%lx\n", iommu->nid, dbase,
986 dbase + dsize, fbase, fbase + fsize); 996 dbase + dsize, fbase, fbase + fsize);
987 997
988 cell_iommu_setup_page_tables(iommu, dbase, dsize, fbase, fsize); 998 cell_iommu_setup_page_tables(iommu, dbase, dsize, fbase, fsize);
@@ -998,8 +1008,6 @@ static int __init cell_iommu_fixed_mapping_init(void)
998 dma_iommu_ops.set_dma_mask = dma_set_mask_and_switch; 1008 dma_iommu_ops.set_dma_mask = dma_set_mask_and_switch;
999 set_pci_dma_ops(&dma_iommu_ops); 1009 set_pci_dma_ops(&dma_iommu_ops);
1000 1010
1001 printk(KERN_DEBUG "IOMMU fixed mapping established.\n");
1002
1003 return 0; 1011 return 0;
1004} 1012}
1005 1013
diff --git a/arch/powerpc/platforms/cell/spufs/backing_ops.c b/arch/powerpc/platforms/cell/spufs/backing_ops.c
index 50d98a154aaf..64eb15b22040 100644
--- a/arch/powerpc/platforms/cell/spufs/backing_ops.c
+++ b/arch/powerpc/platforms/cell/spufs/backing_ops.c
@@ -288,6 +288,12 @@ static void spu_backing_runcntl_write(struct spu_context *ctx, u32 val)
288 spin_lock(&ctx->csa.register_lock); 288 spin_lock(&ctx->csa.register_lock);
289 ctx->csa.prob.spu_runcntl_RW = val; 289 ctx->csa.prob.spu_runcntl_RW = val;
290 if (val & SPU_RUNCNTL_RUNNABLE) { 290 if (val & SPU_RUNCNTL_RUNNABLE) {
291 ctx->csa.prob.spu_status_R &=
292 ~SPU_STATUS_STOPPED_BY_STOP &
293 ~SPU_STATUS_STOPPED_BY_HALT &
294 ~SPU_STATUS_SINGLE_STEP &
295 ~SPU_STATUS_INVALID_INSTR &
296 ~SPU_STATUS_INVALID_CH;
291 ctx->csa.prob.spu_status_R |= SPU_STATUS_RUNNING; 297 ctx->csa.prob.spu_status_R |= SPU_STATUS_RUNNING;
292 } else { 298 } else {
293 ctx->csa.prob.spu_status_R &= ~SPU_STATUS_RUNNING; 299 ctx->csa.prob.spu_status_R &= ~SPU_STATUS_RUNNING;
diff --git a/arch/powerpc/platforms/cell/spufs/fault.c b/arch/powerpc/platforms/cell/spufs/fault.c
index eff4d291ba85..e46d300e21a5 100644
--- a/arch/powerpc/platforms/cell/spufs/fault.c
+++ b/arch/powerpc/platforms/cell/spufs/fault.c
@@ -108,7 +108,7 @@ int spufs_handle_class1(struct spu_context *ctx)
108 u64 ea, dsisr, access; 108 u64 ea, dsisr, access;
109 unsigned long flags; 109 unsigned long flags;
110 unsigned flt = 0; 110 unsigned flt = 0;
111 int ret, ret2; 111 int ret;
112 112
113 /* 113 /*
114 * dar and dsisr get passed from the registers 114 * dar and dsisr get passed from the registers
@@ -148,13 +148,10 @@ int spufs_handle_class1(struct spu_context *ctx)
148 ret = spu_handle_mm_fault(current->mm, ea, dsisr, &flt); 148 ret = spu_handle_mm_fault(current->mm, ea, dsisr, &flt);
149 149
150 /* 150 /*
151 * If spu_acquire fails due to a pending signal we just want to return 151 * This is nasty: we need the state_mutex for all the bookkeeping even
152 * EINTR to userspace even if that means missing the dma restart or 152 * if the syscall was interrupted by a signal. ewww.
153 * updating the page fault statistics.
154 */ 153 */
155 ret2 = spu_acquire(ctx); 154 mutex_lock(&ctx->state_mutex);
156 if (ret2)
157 goto out;
158 155
159 /* 156 /*
160 * Clear dsisr under ctxt lock after handling the fault, so that 157 * Clear dsisr under ctxt lock after handling the fault, so that
@@ -185,7 +182,6 @@ int spufs_handle_class1(struct spu_context *ctx)
185 } else 182 } else
186 spufs_handle_event(ctx, ea, SPE_EVENT_SPE_DATA_STORAGE); 183 spufs_handle_event(ctx, ea, SPE_EVENT_SPE_DATA_STORAGE);
187 184
188 out:
189 spuctx_switch_state(ctx, SPU_UTIL_SYSTEM); 185 spuctx_switch_state(ctx, SPU_UTIL_SYSTEM);
190 return ret; 186 return ret;
191} 187}
diff --git a/arch/powerpc/platforms/cell/spufs/file.c b/arch/powerpc/platforms/cell/spufs/file.c
index 1018acd1746b..c66c3756970d 100644
--- a/arch/powerpc/platforms/cell/spufs/file.c
+++ b/arch/powerpc/platforms/cell/spufs/file.c
@@ -358,6 +358,7 @@ static unsigned long spufs_ps_nopfn(struct vm_area_struct *vma,
358{ 358{
359 struct spu_context *ctx = vma->vm_file->private_data; 359 struct spu_context *ctx = vma->vm_file->private_data;
360 unsigned long area, offset = address - vma->vm_start; 360 unsigned long area, offset = address - vma->vm_start;
361 int ret = 0;
361 362
362 spu_context_nospu_trace(spufs_ps_nopfn__enter, ctx); 363 spu_context_nospu_trace(spufs_ps_nopfn__enter, ctx);
363 364
@@ -379,7 +380,7 @@ static unsigned long spufs_ps_nopfn(struct vm_area_struct *vma,
379 if (ctx->state == SPU_STATE_SAVED) { 380 if (ctx->state == SPU_STATE_SAVED) {
380 up_read(&current->mm->mmap_sem); 381 up_read(&current->mm->mmap_sem);
381 spu_context_nospu_trace(spufs_ps_nopfn__sleep, ctx); 382 spu_context_nospu_trace(spufs_ps_nopfn__sleep, ctx);
382 spufs_wait(ctx->run_wq, ctx->state == SPU_STATE_RUNNABLE); 383 ret = spufs_wait(ctx->run_wq, ctx->state == SPU_STATE_RUNNABLE);
383 spu_context_trace(spufs_ps_nopfn__wake, ctx, ctx->spu); 384 spu_context_trace(spufs_ps_nopfn__wake, ctx, ctx->spu);
384 down_read(&current->mm->mmap_sem); 385 down_read(&current->mm->mmap_sem);
385 } else { 386 } else {
@@ -388,7 +389,8 @@ static unsigned long spufs_ps_nopfn(struct vm_area_struct *vma,
388 spu_context_trace(spufs_ps_nopfn__insert, ctx, ctx->spu); 389 spu_context_trace(spufs_ps_nopfn__insert, ctx, ctx->spu);
389 } 390 }
390 391
391 spu_release(ctx); 392 if (!ret)
393 spu_release(ctx);
392 return NOPFN_REFAULT; 394 return NOPFN_REFAULT;
393} 395}
394 396
@@ -460,7 +462,7 @@ static int spufs_cntl_open(struct inode *inode, struct file *file)
460 if (!i->i_openers++) 462 if (!i->i_openers++)
461 ctx->cntl = inode->i_mapping; 463 ctx->cntl = inode->i_mapping;
462 mutex_unlock(&ctx->mapping_lock); 464 mutex_unlock(&ctx->mapping_lock);
463 return spufs_attr_open(inode, file, spufs_cntl_get, 465 return simple_attr_open(inode, file, spufs_cntl_get,
464 spufs_cntl_set, "0x%08lx"); 466 spufs_cntl_set, "0x%08lx");
465} 467}
466 468
@@ -470,7 +472,7 @@ spufs_cntl_release(struct inode *inode, struct file *file)
470 struct spufs_inode_info *i = SPUFS_I(inode); 472 struct spufs_inode_info *i = SPUFS_I(inode);
471 struct spu_context *ctx = i->i_ctx; 473 struct spu_context *ctx = i->i_ctx;
472 474
473 spufs_attr_release(inode, file); 475 simple_attr_release(inode, file);
474 476
475 mutex_lock(&ctx->mapping_lock); 477 mutex_lock(&ctx->mapping_lock);
476 if (!--i->i_openers) 478 if (!--i->i_openers)
@@ -482,8 +484,8 @@ spufs_cntl_release(struct inode *inode, struct file *file)
482static const struct file_operations spufs_cntl_fops = { 484static const struct file_operations spufs_cntl_fops = {
483 .open = spufs_cntl_open, 485 .open = spufs_cntl_open,
484 .release = spufs_cntl_release, 486 .release = spufs_cntl_release,
485 .read = spufs_attr_read, 487 .read = simple_attr_read,
486 .write = spufs_attr_write, 488 .write = simple_attr_write,
487 .mmap = spufs_cntl_mmap, 489 .mmap = spufs_cntl_mmap,
488}; 490};
489 491
@@ -755,23 +757,25 @@ static ssize_t spufs_ibox_read(struct file *file, char __user *buf,
755 757
756 count = spu_acquire(ctx); 758 count = spu_acquire(ctx);
757 if (count) 759 if (count)
758 return count; 760 goto out;
759 761
760 /* wait only for the first element */ 762 /* wait only for the first element */
761 count = 0; 763 count = 0;
762 if (file->f_flags & O_NONBLOCK) { 764 if (file->f_flags & O_NONBLOCK) {
763 if (!spu_ibox_read(ctx, &ibox_data)) 765 if (!spu_ibox_read(ctx, &ibox_data)) {
764 count = -EAGAIN; 766 count = -EAGAIN;
767 goto out_unlock;
768 }
765 } else { 769 } else {
766 count = spufs_wait(ctx->ibox_wq, spu_ibox_read(ctx, &ibox_data)); 770 count = spufs_wait(ctx->ibox_wq, spu_ibox_read(ctx, &ibox_data));
771 if (count)
772 goto out;
767 } 773 }
768 if (count)
769 goto out;
770 774
771 /* if we can't write at all, return -EFAULT */ 775 /* if we can't write at all, return -EFAULT */
772 count = __put_user(ibox_data, udata); 776 count = __put_user(ibox_data, udata);
773 if (count) 777 if (count)
774 goto out; 778 goto out_unlock;
775 779
776 for (count = 4, udata++; (count + 4) <= len; count += 4, udata++) { 780 for (count = 4, udata++; (count + 4) <= len; count += 4, udata++) {
777 int ret; 781 int ret;
@@ -788,9 +792,9 @@ static ssize_t spufs_ibox_read(struct file *file, char __user *buf,
788 break; 792 break;
789 } 793 }
790 794
791out: 795out_unlock:
792 spu_release(ctx); 796 spu_release(ctx);
793 797out:
794 return count; 798 return count;
795} 799}
796 800
@@ -905,7 +909,7 @@ static ssize_t spufs_wbox_write(struct file *file, const char __user *buf,
905 909
906 count = spu_acquire(ctx); 910 count = spu_acquire(ctx);
907 if (count) 911 if (count)
908 return count; 912 goto out;
909 913
910 /* 914 /*
911 * make sure we can at least write one element, by waiting 915 * make sure we can at least write one element, by waiting
@@ -913,14 +917,16 @@ static ssize_t spufs_wbox_write(struct file *file, const char __user *buf,
913 */ 917 */
914 count = 0; 918 count = 0;
915 if (file->f_flags & O_NONBLOCK) { 919 if (file->f_flags & O_NONBLOCK) {
916 if (!spu_wbox_write(ctx, wbox_data)) 920 if (!spu_wbox_write(ctx, wbox_data)) {
917 count = -EAGAIN; 921 count = -EAGAIN;
922 goto out_unlock;
923 }
918 } else { 924 } else {
919 count = spufs_wait(ctx->wbox_wq, spu_wbox_write(ctx, wbox_data)); 925 count = spufs_wait(ctx->wbox_wq, spu_wbox_write(ctx, wbox_data));
926 if (count)
927 goto out;
920 } 928 }
921 929
922 if (count)
923 goto out;
924 930
925 /* write as much as possible */ 931 /* write as much as possible */
926 for (count = 4, udata++; (count + 4) <= len; count += 4, udata++) { 932 for (count = 4, udata++; (count + 4) <= len; count += 4, udata++) {
@@ -934,8 +940,9 @@ static ssize_t spufs_wbox_write(struct file *file, const char __user *buf,
934 break; 940 break;
935 } 941 }
936 942
937out: 943out_unlock:
938 spu_release(ctx); 944 spu_release(ctx);
945out:
939 return count; 946 return count;
940} 947}
941 948
@@ -1598,12 +1605,11 @@ static ssize_t spufs_mfc_read(struct file *file, char __user *buffer,
1598 } else { 1605 } else {
1599 ret = spufs_wait(ctx->mfc_wq, 1606 ret = spufs_wait(ctx->mfc_wq,
1600 spufs_read_mfc_tagstatus(ctx, &status)); 1607 spufs_read_mfc_tagstatus(ctx, &status));
1608 if (ret)
1609 goto out;
1601 } 1610 }
1602 spu_release(ctx); 1611 spu_release(ctx);
1603 1612
1604 if (ret)
1605 goto out;
1606
1607 ret = 4; 1613 ret = 4;
1608 if (copy_to_user(buffer, &status, 4)) 1614 if (copy_to_user(buffer, &status, 4))
1609 ret = -EFAULT; 1615 ret = -EFAULT;
@@ -1732,6 +1738,8 @@ static ssize_t spufs_mfc_write(struct file *file, const char __user *buffer,
1732 int status; 1738 int status;
1733 ret = spufs_wait(ctx->mfc_wq, 1739 ret = spufs_wait(ctx->mfc_wq,
1734 spu_send_mfc_command(ctx, cmd, &status)); 1740 spu_send_mfc_command(ctx, cmd, &status));
1741 if (ret)
1742 goto out;
1735 if (status) 1743 if (status)
1736 ret = status; 1744 ret = status;
1737 } 1745 }
@@ -1785,7 +1793,7 @@ static int spufs_mfc_flush(struct file *file, fl_owner_t id)
1785 1793
1786 ret = spu_acquire(ctx); 1794 ret = spu_acquire(ctx);
1787 if (ret) 1795 if (ret)
1788 return ret; 1796 goto out;
1789#if 0 1797#if 0
1790/* this currently hangs */ 1798/* this currently hangs */
1791 ret = spufs_wait(ctx->mfc_wq, 1799 ret = spufs_wait(ctx->mfc_wq,
@@ -1794,12 +1802,13 @@ static int spufs_mfc_flush(struct file *file, fl_owner_t id)
1794 goto out; 1802 goto out;
1795 ret = spufs_wait(ctx->mfc_wq, 1803 ret = spufs_wait(ctx->mfc_wq,
1796 ctx->ops->read_mfc_tagstatus(ctx) == ctx->tagwait); 1804 ctx->ops->read_mfc_tagstatus(ctx) == ctx->tagwait);
1797out: 1805 if (ret)
1806 goto out;
1798#else 1807#else
1799 ret = 0; 1808 ret = 0;
1800#endif 1809#endif
1801 spu_release(ctx); 1810 spu_release(ctx);
1802 1811out:
1803 return ret; 1812 return ret;
1804} 1813}
1805 1814
diff --git a/arch/powerpc/platforms/cell/spufs/inode.c b/arch/powerpc/platforms/cell/spufs/inode.c
index 90784c029f25..e6e6559c55ed 100644
--- a/arch/powerpc/platforms/cell/spufs/inode.c
+++ b/arch/powerpc/platforms/cell/spufs/inode.c
@@ -755,8 +755,11 @@ spufs_fill_super(struct super_block *sb, void *data, int silent)
755 .statfs = simple_statfs, 755 .statfs = simple_statfs,
756 .delete_inode = spufs_delete_inode, 756 .delete_inode = spufs_delete_inode,
757 .drop_inode = generic_delete_inode, 757 .drop_inode = generic_delete_inode,
758 .show_options = generic_show_options,
758 }; 759 };
759 760
761 save_mount_options(sb, data);
762
760 sb->s_maxbytes = MAX_LFS_FILESIZE; 763 sb->s_maxbytes = MAX_LFS_FILESIZE;
761 sb->s_blocksize = PAGE_CACHE_SIZE; 764 sb->s_blocksize = PAGE_CACHE_SIZE;
762 sb->s_blocksize_bits = PAGE_CACHE_SHIFT; 765 sb->s_blocksize_bits = PAGE_CACHE_SHIFT;
diff --git a/arch/powerpc/platforms/cell/spufs/run.c b/arch/powerpc/platforms/cell/spufs/run.c
index b4814c740d8a..fca22e18069a 100644
--- a/arch/powerpc/platforms/cell/spufs/run.c
+++ b/arch/powerpc/platforms/cell/spufs/run.c
@@ -53,7 +53,7 @@ int spu_stopped(struct spu_context *ctx, u32 *stat)
53 53
54 stopped = SPU_STATUS_INVALID_INSTR | SPU_STATUS_SINGLE_STEP | 54 stopped = SPU_STATUS_INVALID_INSTR | SPU_STATUS_SINGLE_STEP |
55 SPU_STATUS_STOPPED_BY_HALT | SPU_STATUS_STOPPED_BY_STOP; 55 SPU_STATUS_STOPPED_BY_HALT | SPU_STATUS_STOPPED_BY_STOP;
56 if (*stat & stopped) 56 if (!(*stat & SPU_STATUS_RUNNING) && (*stat & stopped))
57 return 1; 57 return 1;
58 58
59 dsisr = ctx->csa.dsisr; 59 dsisr = ctx->csa.dsisr;
@@ -354,8 +354,15 @@ long spufs_run_spu(struct spu_context *ctx, u32 *npc, u32 *event)
354 354
355 do { 355 do {
356 ret = spufs_wait(ctx->stop_wq, spu_stopped(ctx, &status)); 356 ret = spufs_wait(ctx->stop_wq, spu_stopped(ctx, &status));
357 if (unlikely(ret)) 357 if (unlikely(ret)) {
358 /*
359 * This is nasty: we need the state_mutex for all the
360 * bookkeeping even if the syscall was interrupted by
361 * a signal. ewww.
362 */
363 mutex_lock(&ctx->state_mutex);
358 break; 364 break;
365 }
359 spu = ctx->spu; 366 spu = ctx->spu;
360 if (unlikely(test_and_clear_bit(SPU_SCHED_NOTIFY_ACTIVE, 367 if (unlikely(test_and_clear_bit(SPU_SCHED_NOTIFY_ACTIVE,
361 &ctx->sched_flags))) { 368 &ctx->sched_flags))) {
@@ -388,16 +395,14 @@ long spufs_run_spu(struct spu_context *ctx, u32 *npc, u32 *event)
388 SPU_STATUS_STOPPED_BY_HALT | 395 SPU_STATUS_STOPPED_BY_HALT |
389 SPU_STATUS_SINGLE_STEP))); 396 SPU_STATUS_SINGLE_STEP)));
390 397
391 if ((status & SPU_STATUS_STOPPED_BY_STOP) &&
392 (((status >> SPU_STOP_STATUS_SHIFT) & 0x3f00) == 0x2100) &&
393 (ctx->state == SPU_STATE_RUNNABLE))
394 ctx->stats.libassist++;
395
396
397 spu_disable_spu(ctx); 398 spu_disable_spu(ctx);
398 ret = spu_run_fini(ctx, npc, &status); 399 ret = spu_run_fini(ctx, npc, &status);
399 spu_yield(ctx); 400 spu_yield(ctx);
400 401
402 if ((status & SPU_STATUS_STOPPED_BY_STOP) &&
403 (((status >> SPU_STOP_STATUS_SHIFT) & 0x3f00) == 0x2100))
404 ctx->stats.libassist++;
405
401 if ((ret == 0) || 406 if ((ret == 0) ||
402 ((ret == -ERESTARTSYS) && 407 ((ret == -ERESTARTSYS) &&
403 ((status & SPU_STATUS_STOPPED_BY_HALT) || 408 ((status & SPU_STATUS_STOPPED_BY_HALT) ||
diff --git a/arch/powerpc/platforms/cell/spufs/spufs.h b/arch/powerpc/platforms/cell/spufs/spufs.h
index 795a1b52538b..2c2fe3c07d72 100644
--- a/arch/powerpc/platforms/cell/spufs/spufs.h
+++ b/arch/powerpc/platforms/cell/spufs/spufs.h
@@ -268,6 +268,9 @@ extern char *isolated_loader;
268 * Same as wait_event_interruptible(), except that here 268 * Same as wait_event_interruptible(), except that here
269 * we need to call spu_release(ctx) before sleeping, and 269 * we need to call spu_release(ctx) before sleeping, and
270 * then spu_acquire(ctx) when awoken. 270 * then spu_acquire(ctx) when awoken.
271 *
272 * Returns with state_mutex re-acquired when successfull or
273 * with -ERESTARTSYS and the state_mutex dropped when interrupted.
271 */ 274 */
272 275
273#define spufs_wait(wq, condition) \ 276#define spufs_wait(wq, condition) \
@@ -278,11 +281,11 @@ extern char *isolated_loader;
278 prepare_to_wait(&(wq), &__wait, TASK_INTERRUPTIBLE); \ 281 prepare_to_wait(&(wq), &__wait, TASK_INTERRUPTIBLE); \
279 if (condition) \ 282 if (condition) \
280 break; \ 283 break; \
284 spu_release(ctx); \
281 if (signal_pending(current)) { \ 285 if (signal_pending(current)) { \
282 __ret = -ERESTARTSYS; \ 286 __ret = -ERESTARTSYS; \
283 break; \ 287 break; \
284 } \ 288 } \
285 spu_release(ctx); \
286 schedule(); \ 289 schedule(); \
287 __ret = spu_acquire(ctx); \ 290 __ret = spu_acquire(ctx); \
288 if (__ret) \ 291 if (__ret) \
diff --git a/arch/powerpc/platforms/powermac/feature.c b/arch/powerpc/platforms/powermac/feature.c
index ba931be2175c..5169ecc37123 100644
--- a/arch/powerpc/platforms/powermac/feature.c
+++ b/arch/powerpc/platforms/powermac/feature.c
@@ -2565,6 +2565,8 @@ static void __init probe_uninorth(void)
2565 2565
2566 /* Locate core99 Uni-N */ 2566 /* Locate core99 Uni-N */
2567 uninorth_node = of_find_node_by_name(NULL, "uni-n"); 2567 uninorth_node = of_find_node_by_name(NULL, "uni-n");
2568 uninorth_maj = 1;
2569
2568 /* Locate G5 u3 */ 2570 /* Locate G5 u3 */
2569 if (uninorth_node == NULL) { 2571 if (uninorth_node == NULL) {
2570 uninorth_node = of_find_node_by_name(NULL, "u3"); 2572 uninorth_node = of_find_node_by_name(NULL, "u3");
@@ -2575,8 +2577,10 @@ static void __init probe_uninorth(void)
2575 uninorth_node = of_find_node_by_name(NULL, "u4"); 2577 uninorth_node = of_find_node_by_name(NULL, "u4");
2576 uninorth_maj = 4; 2578 uninorth_maj = 4;
2577 } 2579 }
2578 if (uninorth_node == NULL) 2580 if (uninorth_node == NULL) {
2581 uninorth_maj = 0;
2579 return; 2582 return;
2583 }
2580 2584
2581 addrp = of_get_property(uninorth_node, "reg", NULL); 2585 addrp = of_get_property(uninorth_node, "reg", NULL);
2582 if (addrp == NULL) 2586 if (addrp == NULL)
@@ -3029,3 +3033,8 @@ void pmac_resume_agp_for_card(struct pci_dev *dev)
3029 pmac_agp_resume(pmac_agp_bridge); 3033 pmac_agp_resume(pmac_agp_bridge);
3030} 3034}
3031EXPORT_SYMBOL(pmac_resume_agp_for_card); 3035EXPORT_SYMBOL(pmac_resume_agp_for_card);
3036
3037int pmac_get_uninorth_variant(void)
3038{
3039 return uninorth_maj;
3040}
diff --git a/arch/ppc/kernel/setup.c b/arch/ppc/kernel/setup.c
index d51368d72e39..294055902f0c 100644
--- a/arch/ppc/kernel/setup.c
+++ b/arch/ppc/kernel/setup.c
@@ -275,7 +275,7 @@ static void c_stop(struct seq_file *m, void *v)
275{ 275{
276} 276}
277 277
278struct seq_operations cpuinfo_op = { 278const struct seq_operations cpuinfo_op = {
279 .start =c_start, 279 .start =c_start,
280 .next = c_next, 280 .next = c_next,
281 .stop = c_stop, 281 .stop = c_stop,
diff --git a/arch/ppc/mm/pgtable.c b/arch/ppc/mm/pgtable.c
index 409fcaa4994a..03a79bff1271 100644
--- a/arch/ppc/mm/pgtable.c
+++ b/arch/ppc/mm/pgtable.c
@@ -95,7 +95,7 @@ __init_refok pte_t *pte_alloc_one_kernel(struct mm_struct *mm, unsigned long add
95 return pte; 95 return pte;
96} 96}
97 97
98struct page *pte_alloc_one(struct mm_struct *mm, unsigned long address) 98pgtable_t pte_alloc_one(struct mm_struct *mm, unsigned long address)
99{ 99{
100 struct page *ptepage; 100 struct page *ptepage;
101 101
@@ -106,8 +106,10 @@ struct page *pte_alloc_one(struct mm_struct *mm, unsigned long address)
106#endif 106#endif
107 107
108 ptepage = alloc_pages(flags, 0); 108 ptepage = alloc_pages(flags, 0);
109 if (ptepage) 109 if (ptepage) {
110 clear_highpage(ptepage); 110 clear_highpage(ptepage);
111 pgtable_page_ctor(ptepage);
112 }
111 return ptepage; 113 return ptepage;
112} 114}
113 115
@@ -119,11 +121,12 @@ void pte_free_kernel(struct mm_struct *mm, pte_t *pte)
119 free_page((unsigned long)pte); 121 free_page((unsigned long)pte);
120} 122}
121 123
122void pte_free(struct mm_struct *mm, struct page *ptepage) 124void pte_free(struct mm_struct *mm, pgtable_t ptepage)
123{ 125{
124#ifdef CONFIG_SMP 126#ifdef CONFIG_SMP
125 hash_page_sync(); 127 hash_page_sync();
126#endif 128#endif
129 pgtable_page_dtor(ptepage);
127 __free_page(ptepage); 130 __free_page(ptepage);
128} 131}
129 132
diff --git a/arch/s390/kernel/traps.c b/arch/s390/kernel/traps.c
index 1a2fdb6991df..a4d29025ddbd 100644
--- a/arch/s390/kernel/traps.c
+++ b/arch/s390/kernel/traps.c
@@ -24,6 +24,7 @@
24#include <linux/smp.h> 24#include <linux/smp.h>
25#include <linux/init.h> 25#include <linux/init.h>
26#include <linux/interrupt.h> 26#include <linux/interrupt.h>
27#include <linux/seq_file.h>
27#include <linux/delay.h> 28#include <linux/delay.h>
28#include <linux/module.h> 29#include <linux/module.h>
29#include <linux/kdebug.h> 30#include <linux/kdebug.h>
@@ -218,41 +219,40 @@ void show_registers(struct pt_regs *regs)
218} 219}
219 220
220/* This is called from fs/proc/array.c */ 221/* This is called from fs/proc/array.c */
221char *task_show_regs(struct task_struct *task, char *buffer) 222void task_show_regs(struct seq_file *m, struct task_struct *task)
222{ 223{
223 struct pt_regs *regs; 224 struct pt_regs *regs;
224 225
225 regs = task_pt_regs(task); 226 regs = task_pt_regs(task);
226 buffer += sprintf(buffer, "task: %p, ksp: %p\n", 227 seq_printf(m, "task: %p, ksp: %p\n",
227 task, (void *)task->thread.ksp); 228 task, (void *)task->thread.ksp);
228 buffer += sprintf(buffer, "User PSW : %p %p\n", 229 seq_printf(m, "User PSW : %p %p\n",
229 (void *) regs->psw.mask, (void *)regs->psw.addr); 230 (void *) regs->psw.mask, (void *)regs->psw.addr);
230 231
231 buffer += sprintf(buffer, "User GPRS: " FOURLONG, 232 seq_printf(m, "User GPRS: " FOURLONG,
232 regs->gprs[0], regs->gprs[1], 233 regs->gprs[0], regs->gprs[1],
233 regs->gprs[2], regs->gprs[3]); 234 regs->gprs[2], regs->gprs[3]);
234 buffer += sprintf(buffer, " " FOURLONG, 235 seq_printf(m, " " FOURLONG,
235 regs->gprs[4], regs->gprs[5], 236 regs->gprs[4], regs->gprs[5],
236 regs->gprs[6], regs->gprs[7]); 237 regs->gprs[6], regs->gprs[7]);
237 buffer += sprintf(buffer, " " FOURLONG, 238 seq_printf(m, " " FOURLONG,
238 regs->gprs[8], regs->gprs[9], 239 regs->gprs[8], regs->gprs[9],
239 regs->gprs[10], regs->gprs[11]); 240 regs->gprs[10], regs->gprs[11]);
240 buffer += sprintf(buffer, " " FOURLONG, 241 seq_printf(m, " " FOURLONG,
241 regs->gprs[12], regs->gprs[13], 242 regs->gprs[12], regs->gprs[13],
242 regs->gprs[14], regs->gprs[15]); 243 regs->gprs[14], regs->gprs[15]);
243 buffer += sprintf(buffer, "User ACRS: %08x %08x %08x %08x\n", 244 seq_printf(m, "User ACRS: %08x %08x %08x %08x\n",
244 task->thread.acrs[0], task->thread.acrs[1], 245 task->thread.acrs[0], task->thread.acrs[1],
245 task->thread.acrs[2], task->thread.acrs[3]); 246 task->thread.acrs[2], task->thread.acrs[3]);
246 buffer += sprintf(buffer, " %08x %08x %08x %08x\n", 247 seq_printf(m, " %08x %08x %08x %08x\n",
247 task->thread.acrs[4], task->thread.acrs[5], 248 task->thread.acrs[4], task->thread.acrs[5],
248 task->thread.acrs[6], task->thread.acrs[7]); 249 task->thread.acrs[6], task->thread.acrs[7]);
249 buffer += sprintf(buffer, " %08x %08x %08x %08x\n", 250 seq_printf(m, " %08x %08x %08x %08x\n",
250 task->thread.acrs[8], task->thread.acrs[9], 251 task->thread.acrs[8], task->thread.acrs[9],
251 task->thread.acrs[10], task->thread.acrs[11]); 252 task->thread.acrs[10], task->thread.acrs[11]);
252 buffer += sprintf(buffer, " %08x %08x %08x %08x\n", 253 seq_printf(m, " %08x %08x %08x %08x\n",
253 task->thread.acrs[12], task->thread.acrs[13], 254 task->thread.acrs[12], task->thread.acrs[13],
254 task->thread.acrs[14], task->thread.acrs[15]); 255 task->thread.acrs[14], task->thread.acrs[15]);
255 return buffer;
256} 256}
257 257
258static DEFINE_SPINLOCK(die_lock); 258static DEFINE_SPINLOCK(die_lock);
diff --git a/arch/s390/mm/pgtable.c b/arch/s390/mm/pgtable.c
index e60e0ae13402..019f518cd5a0 100644
--- a/arch/s390/mm/pgtable.c
+++ b/arch/s390/mm/pgtable.c
@@ -78,6 +78,7 @@ unsigned long *page_table_alloc(int noexec)
78 clear_table(table, _PAGE_TYPE_EMPTY, PAGE_SIZE); 78 clear_table(table, _PAGE_TYPE_EMPTY, PAGE_SIZE);
79 page->index = (addr_t) table; 79 page->index = (addr_t) table;
80 } 80 }
81 pgtable_page_ctor(page);
81 table = (unsigned long *) page_to_phys(page); 82 table = (unsigned long *) page_to_phys(page);
82 clear_table(table, _PAGE_TYPE_EMPTY, PAGE_SIZE); 83 clear_table(table, _PAGE_TYPE_EMPTY, PAGE_SIZE);
83 return table; 84 return table;
@@ -87,6 +88,7 @@ void page_table_free(unsigned long *table)
87{ 88{
88 unsigned long *shadow = get_shadow_pte(table); 89 unsigned long *shadow = get_shadow_pte(table);
89 90
91 pgtable_page_dtor(virt_to_page(table));
90 if (shadow) 92 if (shadow)
91 free_page((unsigned long) shadow); 93 free_page((unsigned long) shadow);
92 free_page((unsigned long) table); 94 free_page((unsigned long) table);
diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig
index 1c3a90835c7e..6e035d1cf789 100644
--- a/arch/sh/Kconfig
+++ b/arch/sh/Kconfig
@@ -89,6 +89,9 @@ config ARCH_HAS_ILOG2_U64
89config ARCH_NO_VIRT_TO_BUS 89config ARCH_NO_VIRT_TO_BUS
90 def_bool y 90 def_bool y
91 91
92config ARCH_SUPPORTS_AOUT
93 def_bool y
94
92source "init/Kconfig" 95source "init/Kconfig"
93 96
94menu "System type" 97menu "System type"
diff --git a/arch/sh/kernel/cpu/sh4/sq.c b/arch/sh/kernel/cpu/sh4/sq.c
index 3008c00eea6b..8250e017bd4e 100644
--- a/arch/sh/kernel/cpu/sh4/sq.c
+++ b/arch/sh/kernel/cpu/sh4/sq.c
@@ -263,7 +263,7 @@ struct sq_sysfs_attr {
263 ssize_t (*store)(const char *buf, size_t count); 263 ssize_t (*store)(const char *buf, size_t count);
264}; 264};
265 265
266#define to_sq_sysfs_attr(attr) container_of(attr, struct sq_sysfs_attr, attr) 266#define to_sq_sysfs_attr(a) container_of(a, struct sq_sysfs_attr, attr)
267 267
268static ssize_t sq_sysfs_show(struct kobject *kobj, struct attribute *attr, 268static ssize_t sq_sysfs_show(struct kobject *kobj, struct attribute *attr,
269 char *buf) 269 char *buf)
diff --git a/arch/sparc/Kconfig b/arch/sparc/Kconfig
index 99f8971716d2..7c674a3503b6 100644
--- a/arch/sparc/Kconfig
+++ b/arch/sparc/Kconfig
@@ -27,6 +27,13 @@ config ARCH_NO_VIRT_TO_BUS
27config OF 27config OF
28 def_bool y 28 def_bool y
29 29
30config ARCH_SUPPORTS_AOUT
31 def_bool y
32
33config HZ
34 int
35 default 100
36
30source "init/Kconfig" 37source "init/Kconfig"
31 38
32menu "General machine setup" 39menu "General machine setup"
diff --git a/arch/sparc/kernel/process.c b/arch/sparc/kernel/process.c
index 77460e316a03..19186ce8850d 100644
--- a/arch/sparc/kernel/process.c
+++ b/arch/sparc/kernel/process.c
@@ -20,7 +20,6 @@
20#include <linux/ptrace.h> 20#include <linux/ptrace.h>
21#include <linux/slab.h> 21#include <linux/slab.h>
22#include <linux/user.h> 22#include <linux/user.h>
23#include <linux/a.out.h>
24#include <linux/smp.h> 23#include <linux/smp.h>
25#include <linux/reboot.h> 24#include <linux/reboot.h>
26#include <linux/delay.h> 25#include <linux/delay.h>
@@ -567,38 +566,6 @@ int copy_thread(int nr, unsigned long clone_flags, unsigned long sp,
567} 566}
568 567
569/* 568/*
570 * fill in the user structure for a core dump..
571 */
572void dump_thread(struct pt_regs * regs, struct user * dump)
573{
574 unsigned long first_stack_page;
575
576 dump->magic = SUNOS_CORE_MAGIC;
577 dump->len = sizeof(struct user);
578 dump->regs.psr = regs->psr;
579 dump->regs.pc = regs->pc;
580 dump->regs.npc = regs->npc;
581 dump->regs.y = regs->y;
582 /* fuck me plenty */
583 memcpy(&dump->regs.regs[0], &regs->u_regs[1], (sizeof(unsigned long) * 15));
584 dump->uexec = current->thread.core_exec;
585 dump->u_tsize = (((unsigned long) current->mm->end_code) -
586 ((unsigned long) current->mm->start_code)) & ~(PAGE_SIZE - 1);
587 dump->u_dsize = ((unsigned long) (current->mm->brk + (PAGE_SIZE-1)));
588 dump->u_dsize -= dump->u_tsize;
589 dump->u_dsize &= ~(PAGE_SIZE - 1);
590 first_stack_page = (regs->u_regs[UREG_FP] & ~(PAGE_SIZE - 1));
591 dump->u_ssize = (TASK_SIZE - first_stack_page) & ~(PAGE_SIZE - 1);
592 memcpy(&dump->fpu.fpstatus.fregs.regs[0], &current->thread.float_regs[0], (sizeof(unsigned long) * 32));
593 dump->fpu.fpstatus.fsr = current->thread.fsr;
594 dump->fpu.fpstatus.flags = dump->fpu.fpstatus.extra = 0;
595 dump->fpu.fpstatus.fpq_count = current->thread.fpqdepth;
596 memcpy(&dump->fpu.fpstatus.fpq[0], &current->thread.fpqueue[0],
597 ((sizeof(unsigned long) * 2) * 16));
598 dump->sigcode = 0;
599}
600
601/*
602 * fill in the fpu structure for a core dump. 569 * fill in the fpu structure for a core dump.
603 */ 570 */
604int dump_fpu (struct pt_regs * regs, elf_fpregset_t * fpregs) 571int dump_fpu (struct pt_regs * regs, elf_fpregset_t * fpregs)
diff --git a/arch/sparc/kernel/setup.c b/arch/sparc/kernel/setup.c
index d07bc74773aa..3cf78f160846 100644
--- a/arch/sparc/kernel/setup.c
+++ b/arch/sparc/kernel/setup.c
@@ -16,7 +16,6 @@
16#include <linux/initrd.h> 16#include <linux/initrd.h>
17#include <asm/smp.h> 17#include <asm/smp.h>
18#include <linux/user.h> 18#include <linux/user.h>
19#include <linux/a.out.h>
20#include <linux/screen_info.h> 19#include <linux/screen_info.h>
21#include <linux/delay.h> 20#include <linux/delay.h>
22#include <linux/fs.h> 21#include <linux/fs.h>
diff --git a/arch/sparc/kernel/sparc_ksyms.c b/arch/sparc/kernel/sparc_ksyms.c
index ef647acc479e..c1025e551650 100644
--- a/arch/sparc/kernel/sparc_ksyms.c
+++ b/arch/sparc/kernel/sparc_ksyms.c
@@ -51,7 +51,6 @@
51#ifdef CONFIG_PCI 51#ifdef CONFIG_PCI
52#include <asm/ebus.h> 52#include <asm/ebus.h>
53#endif 53#endif
54#include <asm/a.out.h>
55#include <asm/io-unit.h> 54#include <asm/io-unit.h>
56#include <asm/bug.h> 55#include <asm/bug.h>
57 56
@@ -214,8 +213,6 @@ EXPORT_SYMBOL(kunmap_atomic);
214EXPORT_SYMBOL(svr4_setcontext); 213EXPORT_SYMBOL(svr4_setcontext);
215EXPORT_SYMBOL(svr4_getcontext); 214EXPORT_SYMBOL(svr4_getcontext);
216 215
217EXPORT_SYMBOL(dump_thread);
218
219/* prom symbols */ 216/* prom symbols */
220EXPORT_SYMBOL(idprom); 217EXPORT_SYMBOL(idprom);
221EXPORT_SYMBOL(prom_root_node); 218EXPORT_SYMBOL(prom_root_node);
diff --git a/arch/sparc/mm/loadmmu.c b/arch/sparc/mm/loadmmu.c
index 36b4d24988f8..2d9cd65160a4 100644
--- a/arch/sparc/mm/loadmmu.c
+++ b/arch/sparc/mm/loadmmu.c
@@ -14,7 +14,6 @@
14#include <asm/system.h> 14#include <asm/system.h>
15#include <asm/page.h> 15#include <asm/page.h>
16#include <asm/pgtable.h> 16#include <asm/pgtable.h>
17#include <asm/a.out.h>
18#include <asm/mmu_context.h> 17#include <asm/mmu_context.h>
19#include <asm/oplib.h> 18#include <asm/oplib.h>
20 19
diff --git a/arch/sparc/mm/srmmu.c b/arch/sparc/mm/srmmu.c
index 17b485f2825c..23d3291a3e81 100644
--- a/arch/sparc/mm/srmmu.c
+++ b/arch/sparc/mm/srmmu.c
@@ -34,7 +34,6 @@
34#include <asm/sbus.h> 34#include <asm/sbus.h>
35#include <asm/asi.h> 35#include <asm/asi.h>
36#include <asm/msi.h> 36#include <asm/msi.h>
37#include <asm/a.out.h>
38#include <asm/mmu_context.h> 37#include <asm/mmu_context.h>
39#include <asm/io-unit.h> 38#include <asm/io-unit.h>
40#include <asm/cacheflush.h> 39#include <asm/cacheflush.h>
@@ -490,14 +489,17 @@ srmmu_pte_alloc_one_kernel(struct mm_struct *mm, unsigned long address)
490 return (pte_t *)srmmu_get_nocache(PTE_SIZE, PTE_SIZE); 489 return (pte_t *)srmmu_get_nocache(PTE_SIZE, PTE_SIZE);
491} 490}
492 491
493static struct page * 492static pgtable_t
494srmmu_pte_alloc_one(struct mm_struct *mm, unsigned long address) 493srmmu_pte_alloc_one(struct mm_struct *mm, unsigned long address)
495{ 494{
496 unsigned long pte; 495 unsigned long pte;
496 struct page *page;
497 497
498 if ((pte = (unsigned long)srmmu_pte_alloc_one_kernel(mm, address)) == 0) 498 if ((pte = (unsigned long)srmmu_pte_alloc_one_kernel(mm, address)) == 0)
499 return NULL; 499 return NULL;
500 return pfn_to_page( __nocache_pa(pte) >> PAGE_SHIFT ); 500 page = pfn_to_page( __nocache_pa(pte) >> PAGE_SHIFT );
501 pgtable_page_ctor(page);
502 return page;
501} 503}
502 504
503static void srmmu_free_pte_fast(pte_t *pte) 505static void srmmu_free_pte_fast(pte_t *pte)
@@ -505,10 +507,11 @@ static void srmmu_free_pte_fast(pte_t *pte)
505 srmmu_free_nocache((unsigned long)pte, PTE_SIZE); 507 srmmu_free_nocache((unsigned long)pte, PTE_SIZE);
506} 508}
507 509
508static void srmmu_pte_free(struct page *pte) 510static void srmmu_pte_free(pgtable_t pte)
509{ 511{
510 unsigned long p; 512 unsigned long p;
511 513
514 pgtable_page_dtor(pte);
512 p = (unsigned long)page_address(pte); /* Cached address (for test) */ 515 p = (unsigned long)page_address(pte); /* Cached address (for test) */
513 if (p == 0) 516 if (p == 0)
514 BUG(); 517 BUG();
diff --git a/arch/sparc/mm/sun4c.c b/arch/sparc/mm/sun4c.c
index 0729305f2f59..c0442e8c4b15 100644
--- a/arch/sparc/mm/sun4c.c
+++ b/arch/sparc/mm/sun4c.c
@@ -1947,12 +1947,17 @@ static pte_t *sun4c_pte_alloc_one_kernel(struct mm_struct *mm, unsigned long add
1947 return pte; 1947 return pte;
1948} 1948}
1949 1949
1950static struct page *sun4c_pte_alloc_one(struct mm_struct *mm, unsigned long address) 1950static pgtable_t sun4c_pte_alloc_one(struct mm_struct *mm, unsigned long address)
1951{ 1951{
1952 pte_t *pte = sun4c_pte_alloc_one_kernel(mm, address); 1952 pte_t *pte;
1953 struct page *page;
1954
1955 pte = sun4c_pte_alloc_one_kernel(mm, address);
1953 if (pte == NULL) 1956 if (pte == NULL)
1954 return NULL; 1957 return NULL;
1955 return virt_to_page(pte); 1958 page = virt_to_page(pte);
1959 pgtable_page_ctor(page);
1960 return page;
1956} 1961}
1957 1962
1958static inline void sun4c_free_pte_fast(pte_t *pte) 1963static inline void sun4c_free_pte_fast(pte_t *pte)
@@ -1962,8 +1967,9 @@ static inline void sun4c_free_pte_fast(pte_t *pte)
1962 pgtable_cache_size++; 1967 pgtable_cache_size++;
1963} 1968}
1964 1969
1965static void sun4c_pte_free(struct page *pte) 1970static void sun4c_pte_free(pgtable_t pte)
1966{ 1971{
1972 pgtable_page_dtor(pte);
1967 sun4c_free_pte_fast(page_address(pte)); 1973 sun4c_free_pte_fast(page_address(pte));
1968} 1974}
1969 1975
diff --git a/arch/sparc64/Kconfig b/arch/sparc64/Kconfig
index a8c6366f05a1..b810f2b7526a 100644
--- a/arch/sparc64/Kconfig
+++ b/arch/sparc64/Kconfig
@@ -81,6 +81,9 @@ config GENERIC_HARDIRQS_NO__DO_IRQ
81 bool 81 bool
82 def_bool y 82 def_bool y
83 83
84config ARCH_SUPPORTS_AOUT
85 def_bool y
86
84choice 87choice
85 prompt "Kernel page size" 88 prompt "Kernel page size"
86 default SPARC64_PAGE_SIZE_8KB 89 default SPARC64_PAGE_SIZE_8KB
@@ -380,17 +383,11 @@ config COMPAT
380 bool 383 bool
381 depends on SPARC32_COMPAT 384 depends on SPARC32_COMPAT
382 default y 385 default y
383 386 select COMPAT_BINFMT_ELF
384config BINFMT_ELF32
385 bool "Kernel support for 32-bit ELF binaries"
386 depends on SPARC32_COMPAT
387 help
388 This allows you to run 32-bit Linux/ELF binaries on your Ultra.
389 Everybody wants this; say Y.
390 387
391config BINFMT_AOUT32 388config BINFMT_AOUT32
392 bool "Kernel support for 32-bit (ie. SunOS) a.out binaries" 389 bool "Kernel support for 32-bit (ie. SunOS) a.out binaries"
393 depends on SPARC32_COMPAT 390 depends on SPARC32_COMPAT && ARCH_SUPPORTS_AOUT
394 help 391 help
395 This allows you to run 32-bit a.out format binaries on your Ultra. 392 This allows you to run 32-bit a.out format binaries on your Ultra.
396 If you want to run SunOS binaries (see SunOS binary emulation below) 393 If you want to run SunOS binaries (see SunOS binary emulation below)
diff --git a/arch/sparc64/kernel/Makefile b/arch/sparc64/kernel/Makefile
index 4b78b24ef413..1bf5b187de49 100644
--- a/arch/sparc64/kernel/Makefile
+++ b/arch/sparc64/kernel/Makefile
@@ -21,7 +21,6 @@ obj-$(CONFIG_PCI) += ebus.o isa.o pci_common.o \
21obj-$(CONFIG_PCI_MSI) += pci_msi.o 21obj-$(CONFIG_PCI_MSI) += pci_msi.o
22obj-$(CONFIG_SMP) += smp.o trampoline.o hvtramp.o 22obj-$(CONFIG_SMP) += smp.o trampoline.o hvtramp.o
23obj-$(CONFIG_SPARC32_COMPAT) += sys32.o sys_sparc32.o signal32.o 23obj-$(CONFIG_SPARC32_COMPAT) += sys32.o sys_sparc32.o signal32.o
24obj-$(CONFIG_BINFMT_ELF32) += binfmt_elf32.o
25obj-$(CONFIG_BINFMT_AOUT32) += binfmt_aout32.o 24obj-$(CONFIG_BINFMT_AOUT32) += binfmt_aout32.o
26obj-$(CONFIG_MODULES) += module.o 25obj-$(CONFIG_MODULES) += module.o
27obj-$(CONFIG_US3_FREQ) += us3_cpufreq.o 26obj-$(CONFIG_US3_FREQ) += us3_cpufreq.o
diff --git a/arch/sparc64/kernel/binfmt_aout32.c b/arch/sparc64/kernel/binfmt_aout32.c
index 92c1b36a2e16..9877f2d7672d 100644
--- a/arch/sparc64/kernel/binfmt_aout32.c
+++ b/arch/sparc64/kernel/binfmt_aout32.c
@@ -32,6 +32,7 @@
32#include <asm/uaccess.h> 32#include <asm/uaccess.h>
33#include <asm/pgalloc.h> 33#include <asm/pgalloc.h>
34#include <asm/mmu_context.h> 34#include <asm/mmu_context.h>
35#include <asm/a.out-core.h>
35 36
36static int load_aout32_binary(struct linux_binprm *, struct pt_regs * regs); 37static int load_aout32_binary(struct linux_binprm *, struct pt_regs * regs);
37static int load_aout32_library(struct file*); 38static int load_aout32_library(struct file*);
@@ -101,7 +102,7 @@ static int aout32_core_dump(long signr, struct pt_regs *regs, struct file *file,
101 current->flags |= PF_DUMPCORE; 102 current->flags |= PF_DUMPCORE;
102 strncpy(dump.u_comm, current->comm, sizeof(dump.u_comm)); 103 strncpy(dump.u_comm, current->comm, sizeof(dump.u_comm));
103 dump.signal = signr; 104 dump.signal = signr;
104 dump_thread(regs, &dump); 105 aout_dump_thread(regs, &dump);
105 106
106/* If the size of the dump file exceeds the rlimit, then see what would happen 107/* If the size of the dump file exceeds the rlimit, then see what would happen
107 if we wrote the stack, but not the data area. */ 108 if we wrote the stack, but not the data area. */
diff --git a/arch/sparc64/kernel/binfmt_elf32.c b/arch/sparc64/kernel/binfmt_elf32.c
deleted file mode 100644
index d141300e76b7..000000000000
--- a/arch/sparc64/kernel/binfmt_elf32.c
+++ /dev/null
@@ -1,136 +0,0 @@
1/*
2 * binfmt_elf32.c: Support 32-bit Sparc ELF binaries on Ultra.
3 *
4 * Copyright (C) 1995, 1996, 1997, 1998, 2008 David S. Miller (davem@davemloft.net)
5 * Copyright (C) 1995, 1996, 1997, 1998 Jakub Jelinek (jj@ultra.linux.cz)
6 */
7
8#define ELF_ARCH EM_SPARC
9#define ELF_CLASS ELFCLASS32
10#define ELF_DATA ELFDATA2MSB;
11
12/* Format is:
13 * G0 --> G7
14 * O0 --> O7
15 * L0 --> L7
16 * I0 --> I7
17 * PSR, PC, nPC, Y, WIM, TBR
18 */
19typedef unsigned int elf_greg_t;
20#define ELF_NGREG 38
21typedef elf_greg_t elf_gregset_t[ELF_NGREG];
22
23typedef struct {
24 union {
25 unsigned int pr_regs[32];
26 unsigned long pr_dregs[16];
27 } pr_fr;
28 unsigned int __unused;
29 unsigned int pr_fsr;
30 unsigned char pr_qcnt;
31 unsigned char pr_q_entrysize;
32 unsigned char pr_en;
33 unsigned int pr_q[64];
34} elf_fpregset_t;
35
36/* UltraSparc extensions. Still unused, but will be eventually. */
37typedef struct {
38 unsigned int pr_type;
39 unsigned int pr_align;
40 union {
41 struct {
42 union {
43 unsigned int pr_regs[32];
44 unsigned long pr_dregs[16];
45 long double pr_qregs[8];
46 } pr_xfr;
47 } pr_v8p;
48 unsigned int pr_xfsr;
49 unsigned int pr_fprs;
50 unsigned int pr_xg[8];
51 unsigned int pr_xo[8];
52 unsigned long pr_tstate;
53 unsigned int pr_filler[8];
54 } pr_un;
55} elf_xregset_t;
56
57#define elf_check_arch(x) (((x)->e_machine == EM_SPARC) || ((x)->e_machine == EM_SPARC32PLUS))
58
59#define ELF_ET_DYN_BASE 0x70000000
60
61
62#include <asm/processor.h>
63#include <linux/module.h>
64#include <linux/elfcore.h>
65#include <linux/compat.h>
66
67#define elf_prstatus elf_prstatus32
68struct elf_prstatus32
69{
70 struct elf_siginfo pr_info; /* Info associated with signal */
71 short pr_cursig; /* Current signal */
72 unsigned int pr_sigpend; /* Set of pending signals */
73 unsigned int pr_sighold; /* Set of held signals */
74 pid_t pr_pid;
75 pid_t pr_ppid;
76 pid_t pr_pgrp;
77 pid_t pr_sid;
78 struct compat_timeval pr_utime; /* User time */
79 struct compat_timeval pr_stime; /* System time */
80 struct compat_timeval pr_cutime; /* Cumulative user time */
81 struct compat_timeval pr_cstime; /* Cumulative system time */
82 elf_gregset_t pr_reg; /* GP registers */
83 int pr_fpvalid; /* True if math co-processor being used. */
84};
85
86#define elf_prpsinfo elf_prpsinfo32
87struct elf_prpsinfo32
88{
89 char pr_state; /* numeric process state */
90 char pr_sname; /* char for pr_state */
91 char pr_zomb; /* zombie */
92 char pr_nice; /* nice val */
93 unsigned int pr_flag; /* flags */
94 u16 pr_uid;
95 u16 pr_gid;
96 pid_t pr_pid, pr_ppid, pr_pgrp, pr_sid;
97 /* Lots missing */
98 char pr_fname[16]; /* filename of executable */
99 char pr_psargs[ELF_PRARGSZ]; /* initial part of arg list */
100};
101
102#include <linux/highuid.h>
103
104#undef NEW_TO_OLD_UID
105#undef NEW_TO_OLD_GID
106#define NEW_TO_OLD_UID(uid) ((uid) > 65535) ? (u16)overflowuid : (u16)(uid)
107#define NEW_TO_OLD_GID(gid) ((gid) > 65535) ? (u16)overflowgid : (u16)(gid)
108
109#include <linux/time.h>
110
111#undef cputime_to_timeval
112#define cputime_to_timeval cputime_to_compat_timeval
113static inline void
114cputime_to_compat_timeval(const cputime_t cputime, struct compat_timeval *value)
115{
116 unsigned long jiffies = cputime_to_jiffies(cputime);
117 value->tv_usec = (jiffies % HZ) * (1000000L / HZ);
118 value->tv_sec = jiffies / HZ;
119}
120
121#undef start_thread
122#define start_thread start_thread32
123#define init_elf_binfmt init_elf32_binfmt
124
125MODULE_DESCRIPTION("Binary format loader for compatibility with 32bit SparcLinux binaries on the Ultra");
126MODULE_AUTHOR("Eric Youngdale, David S. Miller, Jakub Jelinek");
127
128#undef MODULE_DESCRIPTION
129#undef MODULE_AUTHOR
130
131#include <asm/a.out.h>
132
133#undef TASK_SIZE
134#define TASK_SIZE STACK_TOP32
135
136#include "../../../fs/binfmt_elf.c"
diff --git a/arch/sparc64/kernel/irq.c b/arch/sparc64/kernel/irq.c
index 30431bd24e1e..5ec06c8c7fea 100644
--- a/arch/sparc64/kernel/irq.c
+++ b/arch/sparc64/kernel/irq.c
@@ -522,7 +522,7 @@ static struct irq_chip sun4v_virq = {
522 .set_affinity = sun4v_virt_set_affinity, 522 .set_affinity = sun4v_virt_set_affinity,
523}; 523};
524 524
525static void fastcall pre_flow_handler(unsigned int virt_irq, 525static void pre_flow_handler(unsigned int virt_irq,
526 struct irq_desc *desc) 526 struct irq_desc *desc)
527{ 527{
528 struct irq_handler_data *data = get_irq_chip_data(virt_irq); 528 struct irq_handler_data *data = get_irq_chip_data(virt_irq);
diff --git a/arch/sparc64/kernel/process.c b/arch/sparc64/kernel/process.c
index ca7cdfd55f72..1b2379174988 100644
--- a/arch/sparc64/kernel/process.c
+++ b/arch/sparc64/kernel/process.c
@@ -24,7 +24,6 @@
24#include <linux/ptrace.h> 24#include <linux/ptrace.h>
25#include <linux/slab.h> 25#include <linux/slab.h>
26#include <linux/user.h> 26#include <linux/user.h>
27#include <linux/a.out.h>
28#include <linux/reboot.h> 27#include <linux/reboot.h>
29#include <linux/delay.h> 28#include <linux/delay.h>
30#include <linux/compat.h> 29#include <linux/compat.h>
@@ -725,17 +724,6 @@ pid_t kernel_thread(int (*fn)(void *), void * arg, unsigned long flags)
725 return retval; 724 return retval;
726} 725}
727 726
728/*
729 * fill in the user structure for a core dump..
730 */
731void dump_thread(struct pt_regs * regs, struct user * dump)
732{
733 /* Only should be used for SunOS and ancient a.out
734 * SparcLinux binaries... Not worth implementing.
735 */
736 memset(dump, 0, sizeof(struct user));
737}
738
739typedef struct { 727typedef struct {
740 union { 728 union {
741 unsigned int pr_regs[32]; 729 unsigned int pr_regs[32];
diff --git a/arch/sparc64/kernel/ptrace.c b/arch/sparc64/kernel/ptrace.c
index 51f012410f9d..9a1ba1fe859d 100644
--- a/arch/sparc64/kernel/ptrace.c
+++ b/arch/sparc64/kernel/ptrace.c
@@ -684,72 +684,39 @@ const struct user_regset_view *task_user_regset_view(struct task_struct *task)
684 return &user_sparc64_view; 684 return &user_sparc64_view;
685} 685}
686 686
687long arch_ptrace(struct task_struct *child, long request, long addr, long data) 687struct compat_fps {
688 unsigned int regs[32];
689 unsigned int fsr;
690 unsigned int flags;
691 unsigned int extra;
692 unsigned int fpqd;
693 struct compat_fq {
694 unsigned int insnaddr;
695 unsigned int insn;
696 } fpq[16];
697};
698
699long compat_arch_ptrace(struct task_struct *child, compat_long_t request,
700 compat_ulong_t caddr, compat_ulong_t cdata)
688{ 701{
689 long addr2 = task_pt_regs(current)->u_regs[UREG_I4]; 702 const struct user_regset_view *view = task_user_regset_view(child);
690 const struct user_regset_view *view; 703 compat_ulong_t caddr2 = task_pt_regs(current)->u_regs[UREG_I4];
704 struct pt_regs32 __user *pregs;
705 struct compat_fps __user *fps;
706 unsigned long addr2 = caddr2;
707 unsigned long addr = caddr;
708 unsigned long data = cdata;
691 int ret; 709 int ret;
692 710
693 if (test_thread_flag(TIF_32BIT)) 711 pregs = (struct pt_regs32 __user *) addr;
694 addr2 &= 0xffffffffUL; 712 fps = (struct compat_fps __user *) addr;
695 713
696 view = task_user_regset_view(child); 714 switch (request) {
697
698 switch(request) {
699 case PTRACE_PEEKUSR: 715 case PTRACE_PEEKUSR:
700 ret = (addr != 0) ? -EIO : 0; 716 ret = (addr != 0) ? -EIO : 0;
701 break; 717 break;
702 718
703 case PTRACE_PEEKTEXT: /* read word at location addr. */ 719 case PTRACE_GETREGS:
704 case PTRACE_PEEKDATA: {
705 unsigned long tmp64;
706 unsigned int tmp32;
707 int copied;
708
709 ret = -EIO;
710 if (test_thread_flag(TIF_32BIT)) {
711 copied = access_process_vm(child, addr,
712 &tmp32, sizeof(tmp32), 0);
713 if (copied == sizeof(tmp32))
714 ret = put_user(tmp32,
715 (unsigned int __user *) data);
716 } else {
717 copied = access_process_vm(child, addr,
718 &tmp64, sizeof(tmp64), 0);
719 if (copied == sizeof(tmp64))
720 ret = put_user(tmp64,
721 (unsigned long __user *) data);
722 }
723 break;
724 }
725
726 case PTRACE_POKETEXT: /* write the word at location addr. */
727 case PTRACE_POKEDATA: {
728 unsigned long tmp64;
729 unsigned int tmp32;
730 int copied;
731
732 ret = -EIO;
733 if (test_thread_flag(TIF_32BIT)) {
734 tmp32 = data;
735 copied = access_process_vm(child, addr,
736 &tmp32, sizeof(tmp32), 1);
737 if (copied == sizeof(tmp32))
738 ret = 0;
739 } else {
740 tmp64 = data;
741 copied = access_process_vm(child, addr,
742 &tmp64, sizeof(tmp64), 1);
743 if (copied == sizeof(tmp64))
744 ret = 0;
745 }
746 break;
747 }
748
749 case PTRACE_GETREGS: {
750 struct pt_regs32 __user *pregs =
751 (struct pt_regs32 __user *) addr;
752
753 ret = copy_regset_to_user(child, view, REGSET_GENERAL, 720 ret = copy_regset_to_user(child, view, REGSET_GENERAL,
754 32 * sizeof(u32), 721 32 * sizeof(u32),
755 4 * sizeof(u32), 722 4 * sizeof(u32),
@@ -760,29 +727,8 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
760 15 * sizeof(u32), 727 15 * sizeof(u32),
761 &pregs->u_regs[0]); 728 &pregs->u_regs[0]);
762 break; 729 break;
763 }
764
765 case PTRACE_GETREGS64: {
766 struct pt_regs __user *pregs = (struct pt_regs __user *) addr;
767
768 ret = copy_regset_to_user(child, view, REGSET_GENERAL,
769 1 * sizeof(u64),
770 15 * sizeof(u64),
771 &pregs->u_regs[0]);
772 if (!ret) {
773 /* XXX doesn't handle 'y' register correctly XXX */
774 ret = copy_regset_to_user(child, view, REGSET_GENERAL,
775 32 * sizeof(u64),
776 4 * sizeof(u64),
777 &pregs->tstate);
778 }
779 break;
780 }
781
782 case PTRACE_SETREGS: {
783 struct pt_regs32 __user *pregs =
784 (struct pt_regs32 __user *) addr;
785 730
731 case PTRACE_SETREGS:
786 ret = copy_regset_from_user(child, view, REGSET_GENERAL, 732 ret = copy_regset_from_user(child, view, REGSET_GENERAL,
787 32 * sizeof(u32), 733 32 * sizeof(u32),
788 4 * sizeof(u32), 734 4 * sizeof(u32),
@@ -793,39 +739,8 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
793 15 * sizeof(u32), 739 15 * sizeof(u32),
794 &pregs->u_regs[0]); 740 &pregs->u_regs[0]);
795 break; 741 break;
796 }
797
798 case PTRACE_SETREGS64: {
799 struct pt_regs __user *pregs = (struct pt_regs __user *) addr;
800
801 ret = copy_regset_from_user(child, view, REGSET_GENERAL,
802 1 * sizeof(u64),
803 15 * sizeof(u64),
804 &pregs->u_regs[0]);
805 if (!ret) {
806 /* XXX doesn't handle 'y' register correctly XXX */
807 ret = copy_regset_from_user(child, view, REGSET_GENERAL,
808 32 * sizeof(u64),
809 4 * sizeof(u64),
810 &pregs->tstate);
811 }
812 break;
813 }
814
815 case PTRACE_GETFPREGS: {
816 struct fps {
817 unsigned int regs[32];
818 unsigned int fsr;
819 unsigned int flags;
820 unsigned int extra;
821 unsigned int fpqd;
822 struct fq {
823 unsigned int insnaddr;
824 unsigned int insn;
825 } fpq[16];
826 };
827 struct fps __user *fps = (struct fps __user *) addr;
828 742
743 case PTRACE_GETFPREGS:
829 ret = copy_regset_to_user(child, view, REGSET_FP, 744 ret = copy_regset_to_user(child, view, REGSET_FP,
830 0 * sizeof(u32), 745 0 * sizeof(u32),
831 32 * sizeof(u32), 746 32 * sizeof(u32),
@@ -843,36 +758,8 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
843 ret = -EFAULT; 758 ret = -EFAULT;
844 } 759 }
845 break; 760 break;
846 }
847
848 case PTRACE_GETFPREGS64: {
849 struct fps {
850 unsigned int regs[64];
851 unsigned long fsr;
852 };
853 struct fps __user *fps = (struct fps __user *) addr;
854
855 ret = copy_regset_to_user(child, view, REGSET_FP,
856 0 * sizeof(u64),
857 33 * sizeof(u64),
858 fps);
859 break;
860 }
861
862 case PTRACE_SETFPREGS: {
863 struct fps {
864 unsigned int regs[32];
865 unsigned int fsr;
866 unsigned int flags;
867 unsigned int extra;
868 unsigned int fpqd;
869 struct fq {
870 unsigned int insnaddr;
871 unsigned int insn;
872 } fpq[16];
873 };
874 struct fps __user *fps = (struct fps __user *) addr;
875 761
762 case PTRACE_SETFPREGS:
876 ret = copy_regset_from_user(child, view, REGSET_FP, 763 ret = copy_regset_from_user(child, view, REGSET_FP,
877 0 * sizeof(u32), 764 0 * sizeof(u32),
878 32 * sizeof(u32), 765 32 * sizeof(u32),
@@ -883,21 +770,94 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
883 1 * sizeof(u32), 770 1 * sizeof(u32),
884 &fps->fsr); 771 &fps->fsr);
885 break; 772 break;
773
774 case PTRACE_READTEXT:
775 case PTRACE_READDATA:
776 ret = ptrace_readdata(child, addr,
777 (char __user *)addr2, data);
778 if (ret == data)
779 ret = 0;
780 else if (ret >= 0)
781 ret = -EIO;
782 break;
783
784 case PTRACE_WRITETEXT:
785 case PTRACE_WRITEDATA:
786 ret = ptrace_writedata(child, (char __user *) addr2,
787 addr, data);
788 if (ret == data)
789 ret = 0;
790 else if (ret >= 0)
791 ret = -EIO;
792 break;
793
794 default:
795 ret = compat_ptrace_request(child, request, addr, data);
796 break;
886 } 797 }
887 798
888 case PTRACE_SETFPREGS64: { 799 return ret;
889 struct fps { 800}
890 unsigned int regs[64]; 801
891 unsigned long fsr; 802struct fps {
892 }; 803 unsigned int regs[64];
893 struct fps __user *fps = (struct fps __user *) addr; 804 unsigned long fsr;
805};
806
807long arch_ptrace(struct task_struct *child, long request, long addr, long data)
808{
809 const struct user_regset_view *view = task_user_regset_view(child);
810 struct pt_regs __user *pregs = (struct pt_regs __user *) addr;
811 unsigned long addr2 = task_pt_regs(current)->u_regs[UREG_I4];
812 struct fps __user *fps = (struct fps __user *) addr;
813 int ret;
814
815 switch (request) {
816 case PTRACE_PEEKUSR:
817 ret = (addr != 0) ? -EIO : 0;
818 break;
894 819
820 case PTRACE_GETREGS64:
821 ret = copy_regset_to_user(child, view, REGSET_GENERAL,
822 1 * sizeof(u64),
823 15 * sizeof(u64),
824 &pregs->u_regs[0]);
825 if (!ret) {
826 /* XXX doesn't handle 'y' register correctly XXX */
827 ret = copy_regset_to_user(child, view, REGSET_GENERAL,
828 32 * sizeof(u64),
829 4 * sizeof(u64),
830 &pregs->tstate);
831 }
832 break;
833
834 case PTRACE_SETREGS64:
835 ret = copy_regset_from_user(child, view, REGSET_GENERAL,
836 1 * sizeof(u64),
837 15 * sizeof(u64),
838 &pregs->u_regs[0]);
839 if (!ret) {
840 /* XXX doesn't handle 'y' register correctly XXX */
841 ret = copy_regset_from_user(child, view, REGSET_GENERAL,
842 32 * sizeof(u64),
843 4 * sizeof(u64),
844 &pregs->tstate);
845 }
846 break;
847
848 case PTRACE_GETFPREGS64:
849 ret = copy_regset_to_user(child, view, REGSET_FP,
850 0 * sizeof(u64),
851 33 * sizeof(u64),
852 fps);
853 break;
854
855 case PTRACE_SETFPREGS64:
895 ret = copy_regset_to_user(child, view, REGSET_FP, 856 ret = copy_regset_to_user(child, view, REGSET_FP,
896 0 * sizeof(u64), 857 0 * sizeof(u64),
897 33 * sizeof(u64), 858 33 * sizeof(u64),
898 fps); 859 fps);
899 break; 860 break;
900 }
901 861
902 case PTRACE_READTEXT: 862 case PTRACE_READTEXT:
903 case PTRACE_READDATA: 863 case PTRACE_READDATA:
@@ -919,16 +879,6 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
919 ret = -EIO; 879 ret = -EIO;
920 break; 880 break;
921 881
922 case PTRACE_GETEVENTMSG: {
923 if (test_thread_flag(TIF_32BIT))
924 ret = put_user(child->ptrace_message,
925 (unsigned int __user *) data);
926 else
927 ret = put_user(child->ptrace_message,
928 (unsigned long __user *) data);
929 break;
930 }
931
932 default: 882 default:
933 ret = ptrace_request(child, request, addr, data); 883 ret = ptrace_request(child, request, addr, data);
934 break; 884 break;
diff --git a/arch/sparc64/kernel/setup.c b/arch/sparc64/kernel/setup.c
index a813441b358f..5964d8653ade 100644
--- a/arch/sparc64/kernel/setup.c
+++ b/arch/sparc64/kernel/setup.c
@@ -15,7 +15,6 @@
15#include <linux/slab.h> 15#include <linux/slab.h>
16#include <asm/smp.h> 16#include <asm/smp.h>
17#include <linux/user.h> 17#include <linux/user.h>
18#include <linux/a.out.h>
19#include <linux/screen_info.h> 18#include <linux/screen_info.h>
20#include <linux/delay.h> 19#include <linux/delay.h>
21#include <linux/fs.h> 20#include <linux/fs.h>
diff --git a/arch/sparc64/kernel/sparc64_ksyms.c b/arch/sparc64/kernel/sparc64_ksyms.c
index 8649635d6d74..68db08930399 100644
--- a/arch/sparc64/kernel/sparc64_ksyms.c
+++ b/arch/sparc64/kernel/sparc64_ksyms.c
@@ -53,7 +53,6 @@
53#include <asm/ebus.h> 53#include <asm/ebus.h>
54#include <asm/isa.h> 54#include <asm/isa.h>
55#endif 55#endif
56#include <asm/a.out.h>
57#include <asm/ns87303.h> 56#include <asm/ns87303.h>
58#include <asm/timer.h> 57#include <asm/timer.h>
59#include <asm/cpudata.h> 58#include <asm/cpudata.h>
diff --git a/arch/sparc64/kernel/sys_sparc.c b/arch/sparc64/kernel/sys_sparc.c
index c56573a10eee..134d801579f9 100644
--- a/arch/sparc64/kernel/sys_sparc.c
+++ b/arch/sparc64/kernel/sys_sparc.c
@@ -28,7 +28,6 @@
28#include <asm/uaccess.h> 28#include <asm/uaccess.h>
29#include <asm/utrap.h> 29#include <asm/utrap.h>
30#include <asm/perfctr.h> 30#include <asm/perfctr.h>
31#include <asm/a.out.h>
32#include <asm/unistd.h> 31#include <asm/unistd.h>
33 32
34/* #define DEBUG_UNIMP_SYSCALL */ 33/* #define DEBUG_UNIMP_SYSCALL */
diff --git a/arch/sparc64/kernel/sys_sparc32.c b/arch/sparc64/kernel/sys_sparc32.c
index 98c468803ce3..deaba2bd0535 100644
--- a/arch/sparc64/kernel/sys_sparc32.c
+++ b/arch/sparc64/kernel/sys_sparc32.c
@@ -57,7 +57,6 @@
57#include <asm/fpumacro.h> 57#include <asm/fpumacro.h>
58#include <asm/semaphore.h> 58#include <asm/semaphore.h>
59#include <asm/mmu_context.h> 59#include <asm/mmu_context.h>
60#include <asm/a.out.h>
61#include <asm/compat_signal.h> 60#include <asm/compat_signal.h>
62 61
63asmlinkage long sys32_chown16(const char __user * filename, u16 user, u16 group) 62asmlinkage long sys32_chown16(const char __user * filename, u16 user, u16 group)
diff --git a/arch/sparc64/kernel/systbls.S b/arch/sparc64/kernel/systbls.S
index adc62f490f36..6b9b718e24af 100644
--- a/arch/sparc64/kernel/systbls.S
+++ b/arch/sparc64/kernel/systbls.S
@@ -23,7 +23,7 @@ sys_call_table32:
23/*10*/ .word sys_unlink, sunos_execv, sys_chdir, sys32_chown16, sys32_mknod 23/*10*/ .word sys_unlink, sunos_execv, sys_chdir, sys32_chown16, sys32_mknod
24/*15*/ .word sys_chmod, sys32_lchown16, sparc_brk, sys32_perfctr, sys32_lseek 24/*15*/ .word sys_chmod, sys32_lchown16, sparc_brk, sys32_perfctr, sys32_lseek
25/*20*/ .word sys_getpid, sys_capget, sys_capset, sys32_setuid16, sys32_getuid16 25/*20*/ .word sys_getpid, sys_capget, sys_capset, sys32_setuid16, sys32_getuid16
26/*25*/ .word sys32_vmsplice, sys_ptrace, sys_alarm, sys32_sigaltstack, sys32_pause 26/*25*/ .word sys32_vmsplice, compat_sys_ptrace, sys_alarm, sys32_sigaltstack, sys32_pause
27/*30*/ .word compat_sys_utime, sys_lchown, sys_fchown, sys32_access, sys32_nice 27/*30*/ .word compat_sys_utime, sys_lchown, sys_fchown, sys32_access, sys32_nice
28 .word sys_chown, sys_sync, sys32_kill, compat_sys_newstat, sys32_sendfile 28 .word sys_chown, sys_sync, sys32_kill, compat_sys_newstat, sys32_sendfile
29/*40*/ .word compat_sys_newlstat, sys_dup, sys_pipe, compat_sys_times, sys_getuid 29/*40*/ .word compat_sys_newlstat, sys_dup, sys_pipe, compat_sys_times, sys_getuid
diff --git a/arch/sparc64/solaris/misc.c b/arch/sparc64/solaris/misc.c
index c86cb3091a8e..d3e48e9701bf 100644
--- a/arch/sparc64/solaris/misc.c
+++ b/arch/sparc64/solaris/misc.c
@@ -415,7 +415,7 @@ asmlinkage int solaris_procids(int cmd, s32 pid, s32 pgid)
415 415
416 switch (cmd) { 416 switch (cmd) {
417 case 0: /* getpgrp */ 417 case 0: /* getpgrp */
418 return task_pgrp_nr(current); 418 return task_pgrp_vnr(current);
419 case 1: /* setpgrp */ 419 case 1: /* setpgrp */
420 { 420 {
421 int (*sys_setpgid)(pid_t,pid_t) = 421 int (*sys_setpgid)(pid_t,pid_t) =
@@ -426,7 +426,7 @@ asmlinkage int solaris_procids(int cmd, s32 pid, s32 pgid)
426 ret = sys_setpgid(0, 0); 426 ret = sys_setpgid(0, 0);
427 if (ret) return ret; 427 if (ret) return ret;
428 proc_clear_tty(current); 428 proc_clear_tty(current);
429 return task_pgrp_nr(current); 429 return task_pgrp_vnr(current);
430 } 430 }
431 case 2: /* getsid */ 431 case 2: /* getsid */
432 { 432 {
diff --git a/arch/um/Kconfig b/arch/um/Kconfig
index 99e51d059a02..dba8e05f0287 100644
--- a/arch/um/Kconfig
+++ b/arch/um/Kconfig
@@ -203,17 +203,6 @@ config NR_CPUS
203 depends on SMP 203 depends on SMP
204 default "32" 204 default "32"
205 205
206config NEST_LEVEL
207 int "Nesting level"
208 default "0"
209 help
210 This is set to the number of layers of UMLs that this UML will be run
211 in. Normally, this is zero, meaning that it will run directly on the
212 host. Setting it to one will build a UML that can run inside a UML
213 that is running on the host. Generally, if you intend this UML to run
214 inside another UML, set CONFIG_NEST_LEVEL to one more than the host
215 UML.
216
217config HIGHMEM 206config HIGHMEM
218 bool "Highmem support (EXPERIMENTAL)" 207 bool "Highmem support (EXPERIMENTAL)"
219 depends on !64BIT && EXPERIMENTAL 208 depends on !64BIT && EXPERIMENTAL
diff --git a/arch/um/Kconfig.i386 b/arch/um/Kconfig.i386
index 717f5d3440e3..3cd8a04d66d8 100644
--- a/arch/um/Kconfig.i386
+++ b/arch/um/Kconfig.i386
@@ -23,43 +23,6 @@ config SEMAPHORE_SLEEPERS
23 bool 23 bool
24 default y 24 default y
25 25
26choice
27 prompt "Host memory split"
28 default HOST_VMSPLIT_3G
29 help
30 This is needed when the host kernel on which you run has a non-default
31 (like 2G/2G) memory split, instead of the customary 3G/1G. If you did
32 not recompile your own kernel but use the default distro's one, you can
33 safely accept the "Default split" option.
34
35 It can be enabled on recent (>=2.6.16-rc2) vanilla kernels via
36 CONFIG_VM_SPLIT_*, or on previous kernels with special patches (-ck
37 patchset by Con Kolivas, or other ones) - option names match closely the
38 host CONFIG_VM_SPLIT_* ones.
39
40 A lower setting (where 1G/3G is lowest and 3G/1G is higher) will
41 tolerate even more "normal" host kernels, but an higher setting will be
42 stricter.
43
44 So, if you do not know what to do here, say 'Default split'.
45
46config HOST_VMSPLIT_3G
47 bool "Default split (3G/1G user/kernel host split)"
48config HOST_VMSPLIT_3G_OPT
49 bool "3G/1G user/kernel host split (for full 1G low memory)"
50config HOST_VMSPLIT_2G
51 bool "2G/2G user/kernel host split"
52config HOST_VMSPLIT_1G
53 bool "1G/3G user/kernel host split"
54endchoice
55
56config TOP_ADDR
57 hex
58 default 0xB0000000 if HOST_VMSPLIT_3G_OPT
59 default 0x78000000 if HOST_VMSPLIT_2G
60 default 0x40000000 if HOST_VMSPLIT_1G
61 default 0xC0000000
62
63config 3_LEVEL_PGTABLES 26config 3_LEVEL_PGTABLES
64 bool "Three-level pagetables (EXPERIMENTAL)" 27 bool "Three-level pagetables (EXPERIMENTAL)"
65 default n 28 default n
@@ -84,3 +47,5 @@ config GENERIC_HWEIGHT
84 bool 47 bool
85 default y 48 default y
86 49
50config ARCH_SUPPORTS_AOUT
51 def_bool y
diff --git a/arch/um/Kconfig.x86_64 b/arch/um/Kconfig.x86_64
index d632e9a89cc3..6533b349f061 100644
--- a/arch/um/Kconfig.x86_64
+++ b/arch/um/Kconfig.x86_64
@@ -15,10 +15,6 @@ config SEMAPHORE_SLEEPERS
15 bool 15 bool
16 default y 16 default y
17 17
18config TOP_ADDR
19 hex
20 default 0x7fc0000000
21
22config 3_LEVEL_PGTABLES 18config 3_LEVEL_PGTABLES
23 bool 19 bool
24 default y 20 default y
@@ -39,3 +35,5 @@ config GENERIC_HWEIGHT
39 bool 35 bool
40 default y 36 default y
41 37
38config ARCH_SUPPORTS_AOUT
39 def_bool y
diff --git a/arch/um/Makefile b/arch/um/Makefile
index cb4af9bf2074..dbeab15e7bb7 100644
--- a/arch/um/Makefile
+++ b/arch/um/Makefile
@@ -79,13 +79,6 @@ KERNEL_DEFINES = $(strip -Derrno=kernel_errno -Dsigprocmask=kernel_sigprocmask \
79KBUILD_CFLAGS += $(KERNEL_DEFINES) 79KBUILD_CFLAGS += $(KERNEL_DEFINES)
80KBUILD_CFLAGS += $(call cc-option,-fno-unit-at-a-time,) 80KBUILD_CFLAGS += $(call cc-option,-fno-unit-at-a-time,)
81 81
82# These are needed for clean and mrproper, since in that case .config is not
83# included; the values here are meaningless
84
85CONFIG_NEST_LEVEL ?= 0
86
87SIZE = ($(CONFIG_NEST_LEVEL) * 0x20000000)
88
89PHONY += linux 82PHONY += linux
90 83
91all: linux 84all: linux
@@ -120,10 +113,6 @@ CFLAGS_NO_HARDENING := $(call cc-option, -fno-PIC,) $(call cc-option, -fno-pic,)
120CONFIG_KERNEL_STACK_ORDER ?= 2 113CONFIG_KERNEL_STACK_ORDER ?= 2
121STACK_SIZE := $(shell echo $$[ 4096 * (1 << $(CONFIG_KERNEL_STACK_ORDER)) ] ) 114STACK_SIZE := $(shell echo $$[ 4096 * (1 << $(CONFIG_KERNEL_STACK_ORDER)) ] )
122 115
123ifndef START
124 START = $(shell echo $$[ $(TOP_ADDR) - $(SIZE) ] )
125endif
126
127CPPFLAGS_vmlinux.lds = -U$(SUBARCH) -DSTART=$(START) -DELF_ARCH=$(ELF_ARCH) \ 116CPPFLAGS_vmlinux.lds = -U$(SUBARCH) -DSTART=$(START) -DELF_ARCH=$(ELF_ARCH) \
128 -DELF_FORMAT="$(ELF_FORMAT)" -DKERNEL_STACK_SIZE=$(STACK_SIZE) 117 -DELF_FORMAT="$(ELF_FORMAT)" -DKERNEL_STACK_SIZE=$(STACK_SIZE)
129 118
diff --git a/arch/um/defconfig b/arch/um/defconfig
index 86db2862f222..59215bc264ef 100644
--- a/arch/um/defconfig
+++ b/arch/um/defconfig
@@ -56,8 +56,6 @@ CONFIG_X86_TSC=y
56CONFIG_UML_X86=y 56CONFIG_UML_X86=y
57# CONFIG_64BIT is not set 57# CONFIG_64BIT is not set
58CONFIG_SEMAPHORE_SLEEPERS=y 58CONFIG_SEMAPHORE_SLEEPERS=y
59# CONFIG_HOST_2G_2G is not set
60CONFIG_TOP_ADDR=0xc0000000
61# CONFIG_3_LEVEL_PGTABLES is not set 59# CONFIG_3_LEVEL_PGTABLES is not set
62CONFIG_ARCH_HAS_SC_SIGNALS=y 60CONFIG_ARCH_HAS_SC_SIGNALS=y
63CONFIG_ARCH_REUSE_HOST_VSYSCALL_AREA=y 61CONFIG_ARCH_REUSE_HOST_VSYSCALL_AREA=y
@@ -81,7 +79,6 @@ CONFIG_HOSTFS=y
81# CONFIG_HPPFS is not set 79# CONFIG_HPPFS is not set
82CONFIG_MCONSOLE=y 80CONFIG_MCONSOLE=y
83CONFIG_MAGIC_SYSRQ=y 81CONFIG_MAGIC_SYSRQ=y
84CONFIG_NEST_LEVEL=0
85# CONFIG_HIGHMEM is not set 82# CONFIG_HIGHMEM is not set
86CONFIG_KERNEL_STACK_ORDER=0 83CONFIG_KERNEL_STACK_ORDER=0
87 84
diff --git a/arch/um/include/as-layout.h b/arch/um/include/as-layout.h
index 606bb5c7fdf6..cac542d8ff70 100644
--- a/arch/um/include/as-layout.h
+++ b/arch/um/include/as-layout.h
@@ -57,6 +57,8 @@ extern unsigned long _stext, _etext, _sdata, _edata, __bss_start, _end;
57extern unsigned long _unprotected_end; 57extern unsigned long _unprotected_end;
58extern unsigned long brk_start; 58extern unsigned long brk_start;
59 59
60extern unsigned long host_task_size;
61
60extern int linux_main(int argc, char **argv); 62extern int linux_main(int argc, char **argv);
61 63
62extern void (*sig_info[])(int, struct uml_pt_regs *); 64extern void (*sig_info[])(int, struct uml_pt_regs *);
diff --git a/arch/um/include/os.h b/arch/um/include/os.h
index 0b6b62733303..32c799e3a495 100644
--- a/arch/um/include/os.h
+++ b/arch/um/include/os.h
@@ -295,6 +295,9 @@ extern void maybe_sigio_broken(int fd, int read);
295extern int os_arch_prctl(int pid, int code, unsigned long *addr); 295extern int os_arch_prctl(int pid, int code, unsigned long *addr);
296 296
297/* tty.c */ 297/* tty.c */
298int get_pty(void); 298extern int get_pty(void);
299
300/* sys-$ARCH/task_size.c */
301extern unsigned long os_get_task_size(void);
299 302
300#endif 303#endif
diff --git a/arch/um/include/tempfile.h b/arch/um/include/tempfile.h
deleted file mode 100644
index d441eac936b9..000000000000
--- a/arch/um/include/tempfile.h
+++ /dev/null
@@ -1,11 +0,0 @@
1/*
2 * Copyright (C) 2000, 2001, 2002 Jeff Dike (jdike@karaya.com)
3 * Licensed under the GPL
4 */
5
6#ifndef __TEMPFILE_H__
7#define __TEMPFILE_H__
8
9extern int make_tempfile(const char *template, char **tempname, int do_unlink);
10
11#endif
diff --git a/arch/um/include/um_mmu.h b/arch/um/include/um_mmu.h
index 82865fcf6872..f575ff91f2a0 100644
--- a/arch/um/include/um_mmu.h
+++ b/arch/um/include/um_mmu.h
@@ -13,6 +13,7 @@
13typedef struct mm_context { 13typedef struct mm_context {
14 struct mm_id id; 14 struct mm_id id;
15 struct uml_ldt ldt; 15 struct uml_ldt ldt;
16 struct page **stub_pages;
16} mm_context_t; 17} mm_context_t;
17 18
18extern void __switch_mm(struct mm_id * mm_idp); 19extern void __switch_mm(struct mm_id * mm_idp);
diff --git a/arch/um/kernel/exec.c b/arch/um/kernel/exec.c
index 76a62c0cb2bc..f5d7f4569ba7 100644
--- a/arch/um/kernel/exec.c
+++ b/arch/um/kernel/exec.c
@@ -25,7 +25,7 @@ void flush_thread(void)
25 25
26 ret = unmap(&current->mm->context.id, 0, STUB_START, 0, &data); 26 ret = unmap(&current->mm->context.id, 0, STUB_START, 0, &data);
27 ret = ret || unmap(&current->mm->context.id, STUB_END, 27 ret = ret || unmap(&current->mm->context.id, STUB_END,
28 TASK_SIZE - STUB_END, 1, &data); 28 host_task_size - STUB_END, 1, &data);
29 if (ret) { 29 if (ret) {
30 printk(KERN_ERR "flush_thread - clearing address space failed, " 30 printk(KERN_ERR "flush_thread - clearing address space failed, "
31 "err = %d\n", ret); 31 "err = %d\n", ret);
diff --git a/arch/um/kernel/ksyms.c b/arch/um/kernel/ksyms.c
index 5311ee93ede3..66e2a305a8d6 100644
--- a/arch/um/kernel/ksyms.c
+++ b/arch/um/kernel/ksyms.c
@@ -5,7 +5,6 @@
5 5
6#include "linux/module.h" 6#include "linux/module.h"
7#include "linux/syscalls.h" 7#include "linux/syscalls.h"
8#include "asm/a.out.h"
9#include "asm/tlbflush.h" 8#include "asm/tlbflush.h"
10#include "asm/uaccess.h" 9#include "asm/uaccess.h"
11#include "as-layout.h" 10#include "as-layout.h"
@@ -60,7 +59,6 @@ EXPORT_SYMBOL(os_accept_connection);
60EXPORT_SYMBOL(os_rcv_fd); 59EXPORT_SYMBOL(os_rcv_fd);
61EXPORT_SYMBOL(run_helper); 60EXPORT_SYMBOL(run_helper);
62EXPORT_SYMBOL(start_thread); 61EXPORT_SYMBOL(start_thread);
63EXPORT_SYMBOL(dump_thread);
64 62
65#ifdef CONFIG_SMP 63#ifdef CONFIG_SMP
66 64
diff --git a/arch/um/kernel/mem.c b/arch/um/kernel/mem.c
index d872fdce1d7e..2627ce82e918 100644
--- a/arch/um/kernel/mem.c
+++ b/arch/um/kernel/mem.c
@@ -354,11 +354,13 @@ pte_t *pte_alloc_one_kernel(struct mm_struct *mm, unsigned long address)
354 return pte; 354 return pte;
355} 355}
356 356
357struct page *pte_alloc_one(struct mm_struct *mm, unsigned long address) 357pgtable_t pte_alloc_one(struct mm_struct *mm, unsigned long address)
358{ 358{
359 struct page *pte; 359 struct page *pte;
360 360
361 pte = alloc_page(GFP_KERNEL|__GFP_REPEAT|__GFP_ZERO); 361 pte = alloc_page(GFP_KERNEL|__GFP_REPEAT|__GFP_ZERO);
362 if (pte)
363 pgtable_page_ctor(pte);
362 return pte; 364 return pte;
363} 365}
364 366
diff --git a/arch/um/kernel/process.c b/arch/um/kernel/process.c
index c07961bedb75..fc50d2f959d1 100644
--- a/arch/um/kernel/process.c
+++ b/arch/um/kernel/process.c
@@ -258,10 +258,6 @@ void cpu_idle(void)
258 default_idle(); 258 default_idle();
259} 259}
260 260
261void dump_thread(struct pt_regs *regs, struct user *u)
262{
263}
264
265int __cant_sleep(void) { 261int __cant_sleep(void) {
266 return in_atomic() || irqs_disabled() || in_interrupt(); 262 return in_atomic() || irqs_disabled() || in_interrupt();
267 /* Is in_interrupt() really needed? */ 263 /* Is in_interrupt() really needed? */
diff --git a/arch/um/kernel/skas/mmu.c b/arch/um/kernel/skas/mmu.c
index 78b3e9f69d57..0cd9a7a05e77 100644
--- a/arch/um/kernel/skas/mmu.c
+++ b/arch/um/kernel/skas/mmu.c
@@ -91,6 +91,8 @@ int init_new_context(struct task_struct *task, struct mm_struct *mm)
91 goto out_free; 91 goto out_free;
92 } 92 }
93 93
94 to_mm->stub_pages = NULL;
95
94 return 0; 96 return 0;
95 97
96 out_free: 98 out_free:
@@ -126,6 +128,7 @@ void arch_dup_mmap(struct mm_struct *oldmm, struct mm_struct *mm)
126 128
127 pages[0] = virt_to_page(&__syscall_stub_start); 129 pages[0] = virt_to_page(&__syscall_stub_start);
128 pages[1] = virt_to_page(mm->context.id.stack); 130 pages[1] = virt_to_page(mm->context.id.stack);
131 mm->context.stub_pages = pages;
129 132
130 /* dup_mmap already holds mmap_sem */ 133 /* dup_mmap already holds mmap_sem */
131 err = install_special_mapping(mm, STUB_START, STUB_END - STUB_START, 134 err = install_special_mapping(mm, STUB_START, STUB_END - STUB_START,
@@ -147,6 +150,8 @@ void arch_exit_mmap(struct mm_struct *mm)
147{ 150{
148 pte_t *pte; 151 pte_t *pte;
149 152
153 if (mm->context.stub_pages != NULL)
154 kfree(mm->context.stub_pages);
150 pte = virt_to_pte(mm, STUB_CODE); 155 pte = virt_to_pte(mm, STUB_CODE);
151 if (pte != NULL) 156 if (pte != NULL)
152 pte_clear(mm, STUB_CODE, pte); 157 pte_clear(mm, STUB_CODE, pte);
diff --git a/arch/um/kernel/um_arch.c b/arch/um/kernel/um_arch.c
index 468aba990dbd..a6c1dd1cf5a1 100644
--- a/arch/um/kernel/um_arch.c
+++ b/arch/um/kernel/um_arch.c
@@ -241,6 +241,11 @@ static struct notifier_block panic_exit_notifier = {
241}; 241};
242 242
243/* Set during early boot */ 243/* Set during early boot */
244unsigned long task_size;
245EXPORT_SYMBOL(task_size);
246
247unsigned long host_task_size;
248
244unsigned long brk_start; 249unsigned long brk_start;
245unsigned long end_iomem; 250unsigned long end_iomem;
246EXPORT_SYMBOL(end_iomem); 251EXPORT_SYMBOL(end_iomem);
@@ -267,6 +272,13 @@ int __init linux_main(int argc, char **argv)
267 if (have_root == 0) 272 if (have_root == 0)
268 add_arg(DEFAULT_COMMAND_LINE); 273 add_arg(DEFAULT_COMMAND_LINE);
269 274
275 host_task_size = os_get_task_size();
276 /*
277 * TASK_SIZE needs to be PGDIR_SIZE aligned or else exit_mmap craps
278 * out
279 */
280 task_size = host_task_size & PGDIR_MASK;
281
270 /* OS sanity checks that need to happen before the kernel runs */ 282 /* OS sanity checks that need to happen before the kernel runs */
271 os_early_checks(); 283 os_early_checks();
272 284
@@ -303,7 +315,7 @@ int __init linux_main(int argc, char **argv)
303 315
304 highmem = 0; 316 highmem = 0;
305 iomem_size = (iomem_size + PAGE_SIZE - 1) & PAGE_MASK; 317 iomem_size = (iomem_size + PAGE_SIZE - 1) & PAGE_MASK;
306 max_physmem = CONFIG_TOP_ADDR - uml_physmem - iomem_size - MIN_VMALLOC; 318 max_physmem = TASK_SIZE - uml_physmem - iomem_size - MIN_VMALLOC;
307 319
308 /* 320 /*
309 * Zones have to begin on a 1 << MAX_ORDER page boundary, 321 * Zones have to begin on a 1 << MAX_ORDER page boundary,
@@ -335,7 +347,7 @@ int __init linux_main(int argc, char **argv)
335 } 347 }
336 348
337 virtmem_size = physmem_size; 349 virtmem_size = physmem_size;
338 avail = CONFIG_TOP_ADDR - start_vm; 350 avail = TASK_SIZE - start_vm;
339 if (physmem_size > avail) 351 if (physmem_size > avail)
340 virtmem_size = avail; 352 virtmem_size = avail;
341 end_vm = start_vm + virtmem_size; 353 end_vm = start_vm + virtmem_size;
diff --git a/arch/um/os-Linux/aio.c b/arch/um/os-Linux/aio.c
index b8d8c9ca8d4a..57e3d46c989c 100644
--- a/arch/um/os-Linux/aio.c
+++ b/arch/um/os-Linux/aio.c
@@ -142,7 +142,7 @@ static int do_not_aio(struct aio_thread_req *req)
142 if (actual != req->offset) 142 if (actual != req->offset)
143 return -errno; 143 return -errno;
144 144
145 switch(req->type) { 145 switch (req->type) {
146 case AIO_READ: 146 case AIO_READ:
147 n = read(req->io_fd, req->buf, req->len); 147 n = read(req->io_fd, req->buf, req->len);
148 break; 148 break;
diff --git a/arch/um/os-Linux/drivers/ethertap_kern.c b/arch/um/os-Linux/drivers/ethertap_kern.c
index 04f11b9f1ac0..046a131f6104 100644
--- a/arch/um/os-Linux/drivers/ethertap_kern.c
+++ b/arch/um/os-Linux/drivers/ethertap_kern.c
@@ -6,7 +6,7 @@
6 * Licensed under the GPL. 6 * Licensed under the GPL.
7 */ 7 */
8 8
9#include "linux/init.h" 9#include <linux/init.h>
10#include <linux/netdevice.h> 10#include <linux/netdevice.h>
11#include "etap.h" 11#include "etap.h"
12#include "net_kern.h" 12#include "net_kern.h"
@@ -30,10 +30,10 @@ static void etap_init(struct net_device *dev, void *data)
30 epri->control_fd = -1; 30 epri->control_fd = -1;
31 epri->dev = dev; 31 epri->dev = dev;
32 32
33 printk("ethertap backend - %s", epri->dev_name); 33 printk(KERN_INFO "ethertap backend - %s", epri->dev_name);
34 if (epri->gate_addr != NULL) 34 if (epri->gate_addr != NULL)
35 printk(", IP = %s", epri->gate_addr); 35 printk(KERN_CONT ", IP = %s", epri->gate_addr);
36 printk("\n"); 36 printk(KERN_CONT "\n");
37} 37}
38 38
39static int etap_read(int fd, struct sk_buff *skb, struct uml_net_private *lp) 39static int etap_read(int fd, struct sk_buff *skb, struct uml_net_private *lp)
diff --git a/arch/um/os-Linux/drivers/tuntap_kern.c b/arch/um/os-Linux/drivers/tuntap_kern.c
index 9d384807b077..6b9e33d5de20 100644
--- a/arch/um/os-Linux/drivers/tuntap_kern.c
+++ b/arch/um/os-Linux/drivers/tuntap_kern.c
@@ -29,10 +29,10 @@ static void tuntap_init(struct net_device *dev, void *data)
29 tpri->fd = -1; 29 tpri->fd = -1;
30 tpri->dev = dev; 30 tpri->dev = dev;
31 31
32 printk("TUN/TAP backend - "); 32 printk(KERN_INFO "TUN/TAP backend - ");
33 if (tpri->gate_addr != NULL) 33 if (tpri->gate_addr != NULL)
34 printk("IP = %s", tpri->gate_addr); 34 printk(KERN_CONT "IP = %s", tpri->gate_addr);
35 printk("\n"); 35 printk(KERN_CONT "\n");
36} 36}
37 37
38static int tuntap_read(int fd, struct sk_buff *skb, struct uml_net_private *lp) 38static int tuntap_read(int fd, struct sk_buff *skb, struct uml_net_private *lp)
diff --git a/arch/um/os-Linux/include/file.h b/arch/um/os-Linux/include/file.h
index d82711efacfa..fe71be24bd59 100644
--- a/arch/um/os-Linux/include/file.h
+++ b/arch/um/os-Linux/include/file.h
@@ -1,5 +1,5 @@
1/* 1/*
2 * Copyright (C) 2002 Jeff Dike (jdike@karaya.com) 2 * Copyright (C) 2002 - 2007 Jeff Dike (jdike@{addtoit,linux.intel}.com)
3 * Licensed under the GPL 3 * Licensed under the GPL
4 */ 4 */
5 5
@@ -9,14 +9,3 @@
9#define DEV_NULL "/dev/null" 9#define DEV_NULL "/dev/null"
10 10
11#endif 11#endif
12
13/*
14 * Overrides for Emacs so that we follow Linus's tabbing style.
15 * Emacs will notice this stuff at the end of the file and automatically
16 * adjust the settings for this buffer only. This must remain at the end
17 * of the file.
18 * ---------------------------------------------------------------------------
19 * Local variables:
20 * c-file-style: "linux"
21 * End:
22 */
diff --git a/arch/um/os-Linux/mem.c b/arch/um/os-Linux/mem.c
index eedc2d88ef8a..93a11d7edfa0 100644
--- a/arch/um/os-Linux/mem.c
+++ b/arch/um/os-Linux/mem.c
@@ -1,22 +1,21 @@
1/*
2 * Copyright (C) 2007 Jeff Dike (jdike@{addtoit,linux.intel}.com)
3 * Licensed under the GPL
4 */
5
1#include <stdio.h> 6#include <stdio.h>
2#include <stdlib.h>
3#include <stddef.h> 7#include <stddef.h>
4#include <stdarg.h> 8#include <stdlib.h>
5#include <unistd.h> 9#include <unistd.h>
6#include <errno.h> 10#include <errno.h>
7#include <string.h>
8#include <fcntl.h> 11#include <fcntl.h>
9#include <sys/types.h> 12#include <string.h>
10#include <sys/mman.h> 13#include <sys/mman.h>
11#include <sys/statfs.h> 14#include <sys/param.h>
12#include "user.h"
13#include "mem_user.h"
14#include "init.h" 15#include "init.h"
15#include "os.h"
16#include "tempfile.h"
17#include "kern_constants.h" 16#include "kern_constants.h"
18 17#include "os.h"
19#include <sys/param.h> 18#include "user.h"
20 19
21/* Modified by which_tmpdir, which is called during early boot */ 20/* Modified by which_tmpdir, which is called during early boot */
22static char *default_tmpdir = "/tmp"; 21static char *default_tmpdir = "/tmp";
@@ -33,18 +32,19 @@ static void __init find_tempdir(void)
33 int i; 32 int i;
34 char *dir = NULL; 33 char *dir = NULL;
35 34
36 if(tempdir != NULL) /* We've already been called */ 35 if (tempdir != NULL)
36 /* We've already been called */
37 return; 37 return;
38 for(i = 0; dirs[i]; i++){ 38 for (i = 0; dirs[i]; i++) {
39 dir = getenv(dirs[i]); 39 dir = getenv(dirs[i]);
40 if((dir != NULL) && (*dir != '\0')) 40 if ((dir != NULL) && (*dir != '\0'))
41 break; 41 break;
42 } 42 }
43 if((dir == NULL) || (*dir == '\0')) 43 if ((dir == NULL) || (*dir == '\0'))
44 dir = default_tmpdir; 44 dir = default_tmpdir;
45 45
46 tempdir = malloc(strlen(dir) + 2); 46 tempdir = malloc(strlen(dir) + 2);
47 if(tempdir == NULL){ 47 if (tempdir == NULL) {
48 fprintf(stderr, "Failed to malloc tempdir, " 48 fprintf(stderr, "Failed to malloc tempdir, "
49 "errno = %d\n", errno); 49 "errno = %d\n", errno);
50 return; 50 return;
@@ -53,7 +53,8 @@ static void __init find_tempdir(void)
53 strcat(tempdir, "/"); 53 strcat(tempdir, "/");
54} 54}
55 55
56/* This will return 1, with the first character in buf being the 56/*
57 * This will return 1, with the first character in buf being the
57 * character following the next instance of c in the file. This will 58 * character following the next instance of c in the file. This will
58 * read the file as needed. If there's an error, -errno is returned; 59 * read the file as needed. If there's an error, -errno is returned;
59 * if the end of the file is reached, 0 is returned. 60 * if the end of the file is reached, 0 is returned.
@@ -64,11 +65,11 @@ static int next(int fd, char *buf, size_t size, char c)
64 size_t len; 65 size_t len;
65 char *ptr; 66 char *ptr;
66 67
67 while((ptr = strchr(buf, c)) == NULL){ 68 while ((ptr = strchr(buf, c)) == NULL) {
68 n = read(fd, buf, size - 1); 69 n = read(fd, buf, size - 1);
69 if(n == 0) 70 if (n == 0)
70 return 0; 71 return 0;
71 else if(n < 0) 72 else if (n < 0)
72 return -errno; 73 return -errno;
73 74
74 buf[n] = '\0'; 75 buf[n] = '\0';
@@ -78,11 +79,12 @@ static int next(int fd, char *buf, size_t size, char c)
78 len = strlen(ptr); 79 len = strlen(ptr);
79 memmove(buf, ptr, len + 1); 80 memmove(buf, ptr, len + 1);
80 81
81 /* Refill the buffer so that if there's a partial string that we care 82 /*
83 * Refill the buffer so that if there's a partial string that we care
82 * about, it will be completed, and we can recognize it. 84 * about, it will be completed, and we can recognize it.
83 */ 85 */
84 n = read(fd, &buf[len], size - len - 1); 86 n = read(fd, &buf[len], size - len - 1);
85 if(n < 0) 87 if (n < 0)
86 return -errno; 88 return -errno;
87 89
88 buf[len + n] = '\0'; 90 buf[len + n] = '\0';
@@ -92,7 +94,8 @@ static int next(int fd, char *buf, size_t size, char c)
92/* which_tmpdir is called only during early boot */ 94/* which_tmpdir is called only during early boot */
93static int checked_tmpdir = 0; 95static int checked_tmpdir = 0;
94 96
95/* Look for a tmpfs mounted at /dev/shm. I couldn't find a cleaner 97/*
98 * Look for a tmpfs mounted at /dev/shm. I couldn't find a cleaner
96 * way to do this than to parse /proc/mounts. statfs will return the 99 * way to do this than to parse /proc/mounts. statfs will return the
97 * same filesystem magic number and fs id for both /dev and /dev/shm 100 * same filesystem magic number and fs id for both /dev and /dev/shm
98 * when they are both tmpfs, so you can't tell if they are different 101 * when they are both tmpfs, so you can't tell if they are different
@@ -107,7 +110,7 @@ static void which_tmpdir(void)
107 int fd, found; 110 int fd, found;
108 char buf[128] = { '\0' }; 111 char buf[128] = { '\0' };
109 112
110 if(checked_tmpdir) 113 if (checked_tmpdir)
111 return; 114 return;
112 115
113 checked_tmpdir = 1; 116 checked_tmpdir = 1;
@@ -115,28 +118,28 @@ static void which_tmpdir(void)
115 printf("Checking for tmpfs mount on /dev/shm..."); 118 printf("Checking for tmpfs mount on /dev/shm...");
116 119
117 fd = open("/proc/mounts", O_RDONLY); 120 fd = open("/proc/mounts", O_RDONLY);
118 if(fd < 0){ 121 if (fd < 0) {
119 printf("failed to open /proc/mounts, errno = %d\n", errno); 122 printf("failed to open /proc/mounts, errno = %d\n", errno);
120 return; 123 return;
121 } 124 }
122 125
123 while(1){ 126 while (1) {
124 found = next(fd, buf, ARRAY_SIZE(buf), ' '); 127 found = next(fd, buf, ARRAY_SIZE(buf), ' ');
125 if(found != 1) 128 if (found != 1)
126 break; 129 break;
127 130
128 if(!strncmp(buf, "/dev/shm", strlen("/dev/shm"))) 131 if (!strncmp(buf, "/dev/shm", strlen("/dev/shm")))
129 goto found; 132 goto found;
130 133
131 found = next(fd, buf, ARRAY_SIZE(buf), '\n'); 134 found = next(fd, buf, ARRAY_SIZE(buf), '\n');
132 if(found != 1) 135 if (found != 1)
133 break; 136 break;
134 } 137 }
135 138
136err: 139err:
137 if(found == 0) 140 if (found == 0)
138 printf("nothing mounted on /dev/shm\n"); 141 printf("nothing mounted on /dev/shm\n");
139 else if(found < 0) 142 else if (found < 0)
140 printf("read returned errno %d\n", -found); 143 printf("read returned errno %d\n", -found);
141 144
142out: 145out:
@@ -146,10 +149,10 @@ out:
146 149
147found: 150found:
148 found = next(fd, buf, ARRAY_SIZE(buf), ' '); 151 found = next(fd, buf, ARRAY_SIZE(buf), ' ');
149 if(found != 1) 152 if (found != 1)
150 goto err; 153 goto err;
151 154
152 if(strncmp(buf, "tmpfs", strlen("tmpfs"))){ 155 if (strncmp(buf, "tmpfs", strlen("tmpfs"))) {
153 printf("not tmpfs\n"); 156 printf("not tmpfs\n");
154 goto out; 157 goto out;
155 } 158 }
@@ -159,43 +162,40 @@ found:
159 goto out; 162 goto out;
160} 163}
161 164
162/* 165static int __init make_tempfile(const char *template, char **out_tempname,
163 * This proc still used in tt-mode 166 int do_unlink)
164 * (file: kernel/tt/ptproxy/proxy.c, proc: start_debugger).
165 * So it isn't 'static' yet.
166 */
167int __init make_tempfile(const char *template, char **out_tempname,
168 int do_unlink)
169{ 167{
170 char *tempname; 168 char *tempname;
171 int fd; 169 int fd;
172 170
173 which_tmpdir(); 171 which_tmpdir();
174 tempname = malloc(MAXPATHLEN); 172 tempname = malloc(MAXPATHLEN);
175 if (!tempname) 173 if (tempname == NULL)
176 goto out; 174 return -1;
177 175
178 find_tempdir(); 176 find_tempdir();
177 if ((tempdir == NULL) || (strlen(tempdir) >= MAXPATHLEN))
178 return -1;
179
179 if (template[0] != '/') 180 if (template[0] != '/')
180 strcpy(tempname, tempdir); 181 strcpy(tempname, tempdir);
181 else 182 else
182 tempname[0] = '\0'; 183 tempname[0] = '\0';
183 strncat(tempname, template, MAXPATHLEN-1-strlen(tempname)); 184 strncat(tempname, template, MAXPATHLEN-1-strlen(tempname));
184 fd = mkstemp(tempname); 185 fd = mkstemp(tempname);
185 if(fd < 0){ 186 if (fd < 0) {
186 fprintf(stderr, "open - cannot create %s: %s\n", tempname, 187 fprintf(stderr, "open - cannot create %s: %s\n", tempname,
187 strerror(errno)); 188 strerror(errno));
188 goto out; 189 goto out;
189 } 190 }
190 if(do_unlink && (unlink(tempname) < 0)){ 191 if (do_unlink && (unlink(tempname) < 0)) {
191 perror("unlink"); 192 perror("unlink");
192 goto out; 193 goto out;
193 } 194 }
194 if(out_tempname){ 195 if (out_tempname) {
195 *out_tempname = tempname; 196 *out_tempname = tempname;
196 } else { 197 } else
197 free(tempname); 198 free(tempname);
198 }
199 return fd; 199 return fd;
200out: 200out:
201 free(tempname); 201 free(tempname);
@@ -204,27 +204,23 @@ out:
204 204
205#define TEMPNAME_TEMPLATE "vm_file-XXXXXX" 205#define TEMPNAME_TEMPLATE "vm_file-XXXXXX"
206 206
207/* 207static int __init create_tmp_file(unsigned long long len)
208 * This proc is used in start_up.c
209 * So it isn't 'static'.
210 */
211int __init create_tmp_file(unsigned long long len)
212{ 208{
213 int fd, err; 209 int fd, err;
214 char zero; 210 char zero;
215 211
216 fd = make_tempfile(TEMPNAME_TEMPLATE, NULL, 1); 212 fd = make_tempfile(TEMPNAME_TEMPLATE, NULL, 1);
217 if(fd < 0) { 213 if (fd < 0)
218 exit(1); 214 exit(1);
219 }
220 215
221 err = fchmod(fd, 0777); 216 err = fchmod(fd, 0777);
222 if(err < 0){ 217 if (err < 0) {
223 perror("fchmod"); 218 perror("fchmod");
224 exit(1); 219 exit(1);
225 } 220 }
226 221
227 /* Seek to len - 1 because writing a character there will 222 /*
223 * Seek to len - 1 because writing a character there will
228 * increase the file size by one byte, to the desired length. 224 * increase the file size by one byte, to the desired length.
229 */ 225 */
230 if (lseek64(fd, len - 1, SEEK_SET) < 0) { 226 if (lseek64(fd, len - 1, SEEK_SET) < 0) {
@@ -235,7 +231,7 @@ int __init create_tmp_file(unsigned long long len)
235 zero = 0; 231 zero = 0;
236 232
237 err = write(fd, &zero, 1); 233 err = write(fd, &zero, 1);
238 if(err != 1){ 234 if (err != 1) {
239 perror("write"); 235 perror("write");
240 exit(1); 236 exit(1);
241 } 237 }
@@ -250,7 +246,7 @@ int __init create_mem_file(unsigned long long len)
250 fd = create_tmp_file(len); 246 fd = create_tmp_file(len);
251 247
252 err = os_set_exec_close(fd); 248 err = os_set_exec_close(fd);
253 if(err < 0){ 249 if (err < 0) {
254 errno = -err; 250 errno = -err;
255 perror("exec_close"); 251 perror("exec_close");
256 } 252 }
@@ -267,11 +263,11 @@ void __init check_tmpexec(void)
267 PROT_READ | PROT_WRITE | PROT_EXEC, MAP_PRIVATE, fd, 0); 263 PROT_READ | PROT_WRITE | PROT_EXEC, MAP_PRIVATE, fd, 0);
268 printf("Checking PROT_EXEC mmap in %s...",tempdir); 264 printf("Checking PROT_EXEC mmap in %s...",tempdir);
269 fflush(stdout); 265 fflush(stdout);
270 if(addr == MAP_FAILED){ 266 if (addr == MAP_FAILED) {
271 err = errno; 267 err = errno;
272 perror("failed"); 268 perror("failed");
273 close(fd); 269 close(fd);
274 if(err == EPERM) 270 if (err == EPERM)
275 printf("%s must be not mounted noexec\n",tempdir); 271 printf("%s must be not mounted noexec\n",tempdir);
276 exit(1); 272 exit(1);
277 } 273 }
diff --git a/arch/um/os-Linux/process.c b/arch/um/os-Linux/process.c
index abf6beae3df1..e0477c3ee894 100644
--- a/arch/um/os-Linux/process.c
+++ b/arch/um/os-Linux/process.c
@@ -224,7 +224,7 @@ int __init can_drop_memory(void)
224 goto out_unmap; 224 goto out_unmap;
225 } 225 }
226 226
227 printk("OK\n"); 227 printk(UM_KERN_CONT "OK\n");
228 ok = 1; 228 ok = 1;
229 229
230out_unmap: 230out_unmap:
diff --git a/arch/um/os-Linux/signal.c b/arch/um/os-Linux/signal.c
index 0fb0cc8d4757..3f1694b134cb 100644
--- a/arch/um/os-Linux/signal.c
+++ b/arch/um/os-Linux/signal.c
@@ -237,7 +237,7 @@ void unblock_signals(void)
237 * interrupts may have arrived and we need to re-enable them and 237 * interrupts may have arrived and we need to re-enable them and
238 * recheck signals_pending. 238 * recheck signals_pending.
239 */ 239 */
240 while(1) { 240 while (1) {
241 /* 241 /*
242 * Save and reset save_pending after enabling signals. This 242 * Save and reset save_pending after enabling signals. This
243 * way, signals_pending won't be changed while we're reading it. 243 * way, signals_pending won't be changed while we're reading it.
diff --git a/arch/um/os-Linux/skas/process.c b/arch/um/os-Linux/skas/process.c
index d36c89c24a45..b14829469fae 100644
--- a/arch/um/os-Linux/skas/process.c
+++ b/arch/um/os-Linux/skas/process.c
@@ -341,7 +341,7 @@ void userspace(struct uml_pt_regs *regs)
341 int local_using_sysemu; 341 int local_using_sysemu;
342 342
343 if (getitimer(ITIMER_VIRTUAL, &timer)) 343 if (getitimer(ITIMER_VIRTUAL, &timer))
344 printk("Failed to get itimer, errno = %d\n", errno); 344 printk(UM_KERN_ERR "Failed to get itimer, errno = %d\n", errno);
345 nsecs = timer.it_value.tv_sec * UM_NSEC_PER_SEC + 345 nsecs = timer.it_value.tv_sec * UM_NSEC_PER_SEC +
346 timer.it_value.tv_usec * UM_NSEC_PER_USEC; 346 timer.it_value.tv_usec * UM_NSEC_PER_USEC;
347 nsecs += os_nsecs(); 347 nsecs += os_nsecs();
@@ -388,7 +388,7 @@ void userspace(struct uml_pt_regs *regs)
388 388
389 if (WIFSTOPPED(status)) { 389 if (WIFSTOPPED(status)) {
390 int sig = WSTOPSIG(status); 390 int sig = WSTOPSIG(status);
391 switch(sig) { 391 switch (sig) {
392 case SIGSEGV: 392 case SIGSEGV:
393 if (PTRACE_FULL_FAULTINFO || 393 if (PTRACE_FULL_FAULTINFO ||
394 !ptrace_faultinfo) { 394 !ptrace_faultinfo) {
@@ -641,7 +641,7 @@ int start_idle_thread(void *stack, jmp_buf *switch_buf)
641 * after returning to the jumper. 641 * after returning to the jumper.
642 */ 642 */
643 n = setjmp(initial_jmpbuf); 643 n = setjmp(initial_jmpbuf);
644 switch(n) { 644 switch (n) {
645 case INIT_JMP_NEW_THREAD: 645 case INIT_JMP_NEW_THREAD:
646 (*switch_buf)[0].JB_IP = (unsigned long) new_thread_handler; 646 (*switch_buf)[0].JB_IP = (unsigned long) new_thread_handler;
647 (*switch_buf)[0].JB_SP = (unsigned long) stack + 647 (*switch_buf)[0].JB_SP = (unsigned long) stack +
diff --git a/arch/um/os-Linux/sys-i386/Makefile b/arch/um/os-Linux/sys-i386/Makefile
index a841262c594a..b4bc6ac4f30b 100644
--- a/arch/um/os-Linux/sys-i386/Makefile
+++ b/arch/um/os-Linux/sys-i386/Makefile
@@ -3,7 +3,7 @@
3# Licensed under the GPL 3# Licensed under the GPL
4# 4#
5 5
6obj-y = registers.o signal.o tls.o 6obj-y = registers.o signal.o task_size.o tls.o
7 7
8USER_OBJS := $(obj-y) 8USER_OBJS := $(obj-y)
9 9
diff --git a/arch/um/os-Linux/sys-i386/registers.c b/arch/um/os-Linux/sys-i386/registers.c
index d1997ca76e5c..f74d853a0ee0 100644
--- a/arch/um/os-Linux/sys-i386/registers.c
+++ b/arch/um/os-Linux/sys-i386/registers.c
@@ -62,10 +62,10 @@ void arch_init_registers(int pid)
62 int err; 62 int err;
63 63
64 err = ptrace(PTRACE_GETFPXREGS, pid, 0, fpx_regs); 64 err = ptrace(PTRACE_GETFPXREGS, pid, 0, fpx_regs);
65 if(!err) 65 if (!err)
66 return; 66 return;
67 67
68 if(errno != EIO) 68 if (errno != EIO)
69 panic("check_ptrace : PTRACE_GETFPXREGS failed, errno = %d", 69 panic("check_ptrace : PTRACE_GETFPXREGS failed, errno = %d",
70 errno); 70 errno);
71 71
diff --git a/arch/um/os-Linux/sys-i386/task_size.c b/arch/um/os-Linux/sys-i386/task_size.c
new file mode 100644
index 000000000000..48d211b3d9a1
--- /dev/null
+++ b/arch/um/os-Linux/sys-i386/task_size.c
@@ -0,0 +1,120 @@
1#include <stdio.h>
2#include <stdlib.h>
3#include <signal.h>
4#include <sys/mman.h>
5#include "longjmp.h"
6#include "kern_constants.h"
7
8static jmp_buf buf;
9
10static void segfault(int sig)
11{
12 longjmp(buf, 1);
13}
14
15static int page_ok(unsigned long page)
16{
17 unsigned long *address = (unsigned long *) (page << UM_KERN_PAGE_SHIFT);
18 unsigned long n = ~0UL;
19 void *mapped = NULL;
20 int ok = 0;
21
22 /*
23 * First see if the page is readable. If it is, it may still
24 * be a VDSO, so we go on to see if it's writable. If not
25 * then try mapping memory there. If that fails, then we're
26 * still in the kernel area. As a sanity check, we'll fail if
27 * the mmap succeeds, but gives us an address different from
28 * what we wanted.
29 */
30 if (setjmp(buf) == 0)
31 n = *address;
32 else {
33 mapped = mmap(address, UM_KERN_PAGE_SIZE,
34 PROT_READ | PROT_WRITE,
35 MAP_FIXED | MAP_PRIVATE | MAP_ANONYMOUS, -1, 0);
36 if (mapped == MAP_FAILED)
37 return 0;
38 if (mapped != address)
39 goto out;
40 }
41
42 /*
43 * Now, is it writeable? If so, then we're in user address
44 * space. If not, then try mprotecting it and try the write
45 * again.
46 */
47 if (setjmp(buf) == 0) {
48 *address = n;
49 ok = 1;
50 goto out;
51 } else if (mprotect(address, UM_KERN_PAGE_SIZE,
52 PROT_READ | PROT_WRITE) != 0)
53 goto out;
54
55 if (setjmp(buf) == 0) {
56 *address = n;
57 ok = 1;
58 }
59
60 out:
61 if (mapped != NULL)
62 munmap(mapped, UM_KERN_PAGE_SIZE);
63 return ok;
64}
65
66unsigned long os_get_task_size(void)
67{
68 struct sigaction sa, old;
69 unsigned long bottom = 0;
70 /*
71 * A 32-bit UML on a 64-bit host gets confused about the VDSO at
72 * 0xffffe000. It is mapped, is readable, can be reprotected writeable
73 * and written. However, exec discovers later that it can't be
74 * unmapped. So, just set the highest address to be checked to just
75 * below it. This might waste some address space on 4G/4G 32-bit
76 * hosts, but shouldn't hurt otherwise.
77 */
78 unsigned long top = 0xffffd000 >> UM_KERN_PAGE_SHIFT;
79 unsigned long test;
80
81 printf("Locating the top of the address space ... ");
82 fflush(stdout);
83
84 /*
85 * We're going to be longjmping out of the signal handler, so
86 * SA_DEFER needs to be set.
87 */
88 sa.sa_handler = segfault;
89 sigemptyset(&sa.sa_mask);
90 sa.sa_flags = SA_NODEFER;
91 sigaction(SIGSEGV, &sa, &old);
92
93 if (!page_ok(bottom)) {
94 fprintf(stderr, "Address 0x%x no good?\n",
95 bottom << UM_KERN_PAGE_SHIFT);
96 exit(1);
97 }
98
99 /* This could happen with a 4G/4G split */
100 if (page_ok(top))
101 goto out;
102
103 do {
104 test = bottom + (top - bottom) / 2;
105 if (page_ok(test))
106 bottom = test;
107 else
108 top = test;
109 } while (top - bottom > 1);
110
111out:
112 /* Restore the old SIGSEGV handling */
113 sigaction(SIGSEGV, &old, NULL);
114
115 top <<= UM_KERN_PAGE_SHIFT;
116 printf("0x%x\n", top);
117 fflush(stdout);
118
119 return top;
120}
diff --git a/arch/um/os-Linux/sys-x86_64/Makefile b/arch/um/os-Linux/sys-x86_64/Makefile
index a42a4ef02e1e..a44a47f8f57b 100644
--- a/arch/um/os-Linux/sys-x86_64/Makefile
+++ b/arch/um/os-Linux/sys-x86_64/Makefile
@@ -3,7 +3,7 @@
3# Licensed under the GPL 3# Licensed under the GPL
4# 4#
5 5
6obj-y = registers.o prctl.o signal.o 6obj-y = registers.o prctl.o signal.o task_size.o
7 7
8USER_OBJS := $(obj-y) 8USER_OBJS := $(obj-y)
9 9
diff --git a/arch/um/os-Linux/sys-x86_64/registers.c b/arch/um/os-Linux/sys-x86_64/registers.c
index 9bfa789992de..a375853337a7 100644
--- a/arch/um/os-Linux/sys-x86_64/registers.c
+++ b/arch/um/os-Linux/sys-x86_64/registers.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * Copyright (C) 2006-2007 Jeff Dike (jdike@{addtoit,linux.intel}.com) 2 * Copyright (C) 2006 - 2007 Jeff Dike (jdike@{addtoit,linux.intel}.com)
3 * Licensed under the GPL 3 * Licensed under the GPL
4 */ 4 */
5 5
@@ -7,31 +7,36 @@
7#include <sys/ptrace.h> 7#include <sys/ptrace.h>
8#define __FRAME_OFFSETS 8#define __FRAME_OFFSETS
9#include <asm/ptrace.h> 9#include <asm/ptrace.h>
10#include "kern_constants.h"
10#include "longjmp.h" 11#include "longjmp.h"
11#include "user.h" 12#include "user.h"
12 13
13int save_fp_registers(int pid, unsigned long *fp_regs) 14int save_fp_registers(int pid, unsigned long *fp_regs)
14{ 15{
15 if(ptrace(PTRACE_GETFPREGS, pid, 0, fp_regs) < 0) 16 if (ptrace(PTRACE_GETFPREGS, pid, 0, fp_regs) < 0)
16 return -errno; 17 return -errno;
17 return 0; 18 return 0;
18} 19}
19 20
20int restore_fp_registers(int pid, unsigned long *fp_regs) 21int restore_fp_registers(int pid, unsigned long *fp_regs)
21{ 22{
22 if(ptrace(PTRACE_SETFPREGS, pid, 0, fp_regs) < 0) 23 if (ptrace(PTRACE_SETFPREGS, pid, 0, fp_regs) < 0)
23 return -errno; 24 return -errno;
24 return 0; 25 return 0;
25} 26}
26 27
27unsigned long get_thread_reg(int reg, jmp_buf *buf) 28unsigned long get_thread_reg(int reg, jmp_buf *buf)
28{ 29{
29 switch(reg){ 30 switch (reg) {
30 case RIP: return buf[0]->__rip; 31 case RIP:
31 case RSP: return buf[0]->__rsp; 32 return buf[0]->__rip;
32 case RBP: return buf[0]->__rbp; 33 case RSP:
34 return buf[0]->__rsp;
35 case RBP:
36 return buf[0]->__rbp;
33 default: 37 default:
34 printk("get_thread_regs - unknown register %d\n", reg); 38 printk(UM_KERN_ERR "get_thread_regs - unknown register %d\n",
39 reg);
35 return 0; 40 return 0;
36 } 41 }
37} 42}
diff --git a/arch/um/os-Linux/sys-x86_64/task_size.c b/arch/um/os-Linux/sys-x86_64/task_size.c
new file mode 100644
index 000000000000..fad6f57f8ee3
--- /dev/null
+++ b/arch/um/os-Linux/sys-x86_64/task_size.c
@@ -0,0 +1,5 @@
1unsigned long os_get_task_size(unsigned long shift)
2{
3 /* The old value of CONFIG_TOP_ADDR */
4 return 0x7fc0000000;
5}
diff --git a/arch/um/os-Linux/uaccess.c b/arch/um/os-Linux/uaccess.c
index 8d27b6d1df91..087ed74ffca5 100644
--- a/arch/um/os-Linux/uaccess.c
+++ b/arch/um/os-Linux/uaccess.c
@@ -1,6 +1,6 @@
1/* 1/*
2 * Copyright (C) 2001 Chris Emerson (cemerson@chiark.greenend.org.uk) 2 * Copyright (C) 2001 Chris Emerson (cemerson@chiark.greenend.org.uk)
3 * Copyright (C) 2001, 2002 Jeff Dike (jdike@karaya.com) 3 * Copyright (C) 2001 - 2007 Jeff Dike (jdike@{addtoit,linux.intel}.com)
4 * Licensed under the GPL 4 * Licensed under the GPL
5 */ 5 */
6 6
@@ -16,7 +16,7 @@ unsigned long __do_user_copy(void *to, const void *from, int n,
16 16
17 jmp_buf jbuf; 17 jmp_buf jbuf;
18 *fault_catcher = &jbuf; 18 *fault_catcher = &jbuf;
19 if(UML_SETJMP(&jbuf) == 0){ 19 if (UML_SETJMP(&jbuf) == 0) {
20 (*op)(to, from, n); 20 (*op)(to, from, n);
21 ret = 0; 21 ret = 0;
22 *faulted_out = 0; 22 *faulted_out = 0;
diff --git a/arch/um/os-Linux/user_syms.c b/arch/um/os-Linux/user_syms.c
index 4c37b1b1d0b5..74f49bb9b125 100644
--- a/arch/um/os-Linux/user_syms.c
+++ b/arch/um/os-Linux/user_syms.c
@@ -34,8 +34,8 @@ EXPORT_SYMBOL(printf);
34 * good; so the versions of these symbols will always match 34 * good; so the versions of these symbols will always match
35 */ 35 */
36#define EXPORT_SYMBOL_PROTO(sym) \ 36#define EXPORT_SYMBOL_PROTO(sym) \
37 int sym(void); \ 37 int sym(void); \
38 EXPORT_SYMBOL(sym); 38 EXPORT_SYMBOL(sym);
39 39
40extern void readdir64(void) __attribute__((weak)); 40extern void readdir64(void) __attribute__((weak));
41EXPORT_SYMBOL(readdir64); 41EXPORT_SYMBOL(readdir64);
diff --git a/arch/um/os-Linux/util.c b/arch/um/os-Linux/util.c
index a6f31d476993..6ea77979531c 100644
--- a/arch/um/os-Linux/util.c
+++ b/arch/um/os-Linux/util.c
@@ -1,39 +1,24 @@
1/* 1/*
2 * Copyright (C) 2000, 2001, 2002 Jeff Dike (jdike@karaya.com) 2 * Copyright (C) 2000 - 2007 Jeff Dike (jdike@{addtoit,linux.intel}.com)
3 * Licensed under the GPL 3 * Licensed under the GPL
4 */ 4 */
5 5
6#include <stdio.h> 6#include <stdio.h>
7#include <stdlib.h> 7#include <stdlib.h>
8#include <unistd.h>
9#include <limits.h>
10#include <sys/mman.h>
11#include <sys/stat.h>
12#include <sys/utsname.h>
13#include <sys/param.h>
14#include <sys/time.h>
15#include "asm/types.h"
16#include <ctype.h>
17#include <signal.h>
18#include <wait.h>
19#include <errno.h> 8#include <errno.h>
20#include <stdarg.h> 9#include <signal.h>
21#include <sched.h>
22#include <termios.h>
23#include <string.h> 10#include <string.h>
24#include "kern_util.h" 11#include <termios.h>
25#include "user.h" 12#include <wait.h>
26#include "mem_user.h" 13#include <sys/mman.h>
27#include "init.h" 14#include <sys/utsname.h>
28#include "ptrace_user.h"
29#include "uml-config.h"
30#include "os.h"
31#include "longjmp.h"
32#include "kern_constants.h" 15#include "kern_constants.h"
16#include "os.h"
17#include "user.h"
33 18
34void stack_protections(unsigned long address) 19void stack_protections(unsigned long address)
35{ 20{
36 if(mprotect((void *) address, UM_THREAD_SIZE, 21 if (mprotect((void *) address, UM_THREAD_SIZE,
37 PROT_READ | PROT_WRITE | PROT_EXEC) < 0) 22 PROT_READ | PROT_WRITE | PROT_EXEC) < 0)
38 panic("protecting stack failed, errno = %d", errno); 23 panic("protecting stack failed, errno = %d", errno);
39} 24}
@@ -44,17 +29,19 @@ int raw(int fd)
44 int err; 29 int err;
45 30
46 CATCH_EINTR(err = tcgetattr(fd, &tt)); 31 CATCH_EINTR(err = tcgetattr(fd, &tt));
47 if(err < 0) 32 if (err < 0)
48 return -errno; 33 return -errno;
49 34
50 cfmakeraw(&tt); 35 cfmakeraw(&tt);
51 36
52 CATCH_EINTR(err = tcsetattr(fd, TCSADRAIN, &tt)); 37 CATCH_EINTR(err = tcsetattr(fd, TCSADRAIN, &tt));
53 if(err < 0) 38 if (err < 0)
54 return -errno; 39 return -errno;
55 40
56 /* XXX tcsetattr could have applied only some changes 41 /*
57 * (and cfmakeraw() is a set of changes) */ 42 * XXX tcsetattr could have applied only some changes
43 * (and cfmakeraw() is a set of changes)
44 */
58 return 0; 45 return 0;
59} 46}
60 47
diff --git a/arch/v850/Kconfig b/arch/v850/Kconfig
index ace479ab273f..7b6d3716efca 100644
--- a/arch/v850/Kconfig
+++ b/arch/v850/Kconfig
@@ -53,6 +53,9 @@ config ARCH_HAS_ILOG2_U64
53 bool 53 bool
54 default n 54 default n
55 55
56config ARCH_SUPPORTS_AOUT
57 def_bool y
58
56# Turn off some random 386 crap that can affect device config 59# Turn off some random 386 crap that can affect device config
57config ISA 60config ISA
58 bool 61 bool
@@ -212,6 +215,13 @@ menu "Processor type and features"
212 bool 215 bool
213 default !V850E_CACHE && !V850E2_CACHE 216 default !V850E_CACHE && !V850E2_CACHE
214 217
218 # HZ depends on the platform
219 config HZ
220 int
221 default 24 if V850E_SIM || V850E2_SIM85E2
222 default 122 if V850E2_FPGA85E2C
223 default 100
224
215 #### Misc config 225 #### Misc config
216 226
217 config ROM_KERNEL 227 config ROM_KERNEL
diff --git a/arch/v850/kernel/procfs.c b/arch/v850/kernel/procfs.c
index e6f9d060ad5b..e433cde789b4 100644
--- a/arch/v850/kernel/procfs.c
+++ b/arch/v850/kernel/procfs.c
@@ -59,7 +59,7 @@ static void cpuinfo_stop (struct seq_file *m, void *v)
59{ 59{
60} 60}
61 61
62struct seq_operations cpuinfo_op = { 62const struct seq_operations cpuinfo_op = {
63 .start = cpuinfo_start, 63 .start = cpuinfo_start,
64 .next = cpuinfo_next, 64 .next = cpuinfo_next,
65 .stop = cpuinfo_stop, 65 .stop = cpuinfo_stop,
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index 9d0acedf5f3f..65a70b777c12 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -136,6 +136,9 @@ config AUDIT_ARCH
136 bool 136 bool
137 default X86_64 137 default X86_64
138 138
139config ARCH_SUPPORTS_AOUT
140 def_bool y
141
139# Use the generic interrupt handling code in kernel/irq/: 142# Use the generic interrupt handling code in kernel/irq/:
140config GENERIC_HARDIRQS 143config GENERIC_HARDIRQS
141 bool 144 bool
@@ -1577,7 +1580,7 @@ config IA32_EMULATION
1577 1580
1578config IA32_AOUT 1581config IA32_AOUT
1579 tristate "IA32 a.out support" 1582 tristate "IA32 a.out support"
1580 depends on IA32_EMULATION 1583 depends on IA32_EMULATION && ARCH_SUPPORTS_AOUT
1581 help 1584 help
1582 Support old a.out binaries in the 32bit emulation. 1585 Support old a.out binaries in the 32bit emulation.
1583 1586
diff --git a/arch/x86/kernel/process_32.c b/arch/x86/kernel/process_32.c
index dabdbeff1f77..a7d50a547dc2 100644
--- a/arch/x86/kernel/process_32.c
+++ b/arch/x86/kernel/process_32.c
@@ -23,7 +23,6 @@
23#include <linux/slab.h> 23#include <linux/slab.h>
24#include <linux/vmalloc.h> 24#include <linux/vmalloc.h>
25#include <linux/user.h> 25#include <linux/user.h>
26#include <linux/a.out.h>
27#include <linux/interrupt.h> 26#include <linux/interrupt.h>
28#include <linux/utsname.h> 27#include <linux/utsname.h>
29#include <linux/delay.h> 28#include <linux/delay.h>
@@ -539,55 +538,6 @@ int copy_thread(int nr, unsigned long clone_flags, unsigned long sp,
539 return err; 538 return err;
540} 539}
541 540
542/*
543 * fill in the user structure for a core dump..
544 */
545void dump_thread(struct pt_regs * regs, struct user * dump)
546{
547 u16 gs;
548
549/* changed the size calculations - should hopefully work better. lbt */
550 dump->magic = CMAGIC;
551 dump->start_code = 0;
552 dump->start_stack = regs->sp & ~(PAGE_SIZE - 1);
553 dump->u_tsize = ((unsigned long) current->mm->end_code) >> PAGE_SHIFT;
554 dump->u_dsize = ((unsigned long) (current->mm->brk + (PAGE_SIZE-1))) >> PAGE_SHIFT;
555 dump->u_dsize -= dump->u_tsize;
556 dump->u_ssize = 0;
557 dump->u_debugreg[0] = current->thread.debugreg0;
558 dump->u_debugreg[1] = current->thread.debugreg1;
559 dump->u_debugreg[2] = current->thread.debugreg2;
560 dump->u_debugreg[3] = current->thread.debugreg3;
561 dump->u_debugreg[4] = 0;
562 dump->u_debugreg[5] = 0;
563 dump->u_debugreg[6] = current->thread.debugreg6;
564 dump->u_debugreg[7] = current->thread.debugreg7;
565
566 if (dump->start_stack < TASK_SIZE)
567 dump->u_ssize = ((unsigned long) (TASK_SIZE - dump->start_stack)) >> PAGE_SHIFT;
568
569 dump->regs.bx = regs->bx;
570 dump->regs.cx = regs->cx;
571 dump->regs.dx = regs->dx;
572 dump->regs.si = regs->si;
573 dump->regs.di = regs->di;
574 dump->regs.bp = regs->bp;
575 dump->regs.ax = regs->ax;
576 dump->regs.ds = (u16)regs->ds;
577 dump->regs.es = (u16)regs->es;
578 dump->regs.fs = (u16)regs->fs;
579 savesegment(gs,gs);
580 dump->regs.orig_ax = regs->orig_ax;
581 dump->regs.ip = regs->ip;
582 dump->regs.cs = (u16)regs->cs;
583 dump->regs.flags = regs->flags;
584 dump->regs.sp = regs->sp;
585 dump->regs.ss = (u16)regs->ss;
586
587 dump->u_fpvalid = dump_fpu (regs, &dump->i387);
588}
589EXPORT_SYMBOL(dump_thread);
590
591#ifdef CONFIG_SECCOMP 541#ifdef CONFIG_SECCOMP
592static void hard_disable_TSC(void) 542static void hard_disable_TSC(void)
593{ 543{
diff --git a/arch/x86/kernel/process_64.c b/arch/x86/kernel/process_64.c
index 137a86171c39..b0cc8f0136d8 100644
--- a/arch/x86/kernel/process_64.c
+++ b/arch/x86/kernel/process_64.c
@@ -26,7 +26,6 @@
26#include <linux/smp.h> 26#include <linux/smp.h>
27#include <linux/slab.h> 27#include <linux/slab.h>
28#include <linux/user.h> 28#include <linux/user.h>
29#include <linux/a.out.h>
30#include <linux/interrupt.h> 29#include <linux/interrupt.h>
31#include <linux/utsname.h> 30#include <linux/utsname.h>
32#include <linux/delay.h> 31#include <linux/delay.h>
diff --git a/arch/x86/kernel/setup_64.c b/arch/x86/kernel/setup_64.c
index a49f5f734a5e..c0d8208af12a 100644
--- a/arch/x86/kernel/setup_64.c
+++ b/arch/x86/kernel/setup_64.c
@@ -15,7 +15,6 @@
15#include <linux/ptrace.h> 15#include <linux/ptrace.h>
16#include <linux/slab.h> 16#include <linux/slab.h>
17#include <linux/user.h> 17#include <linux/user.h>
18#include <linux/a.out.h>
19#include <linux/screen_info.h> 18#include <linux/screen_info.h>
20#include <linux/ioport.h> 19#include <linux/ioport.h>
21#include <linux/delay.h> 20#include <linux/delay.h>
diff --git a/arch/x86/kernel/time_64.c b/arch/x86/kernel/time_64.c
index 0380795121a6..c737849e2ef7 100644
--- a/arch/x86/kernel/time_64.c
+++ b/arch/x86/kernel/time_64.c
@@ -77,7 +77,7 @@ unsigned long __init native_calculate_cpu_khz(void)
77 reserve_evntsel_nmi(MSR_K7_EVNTSEL0 + i); 77 reserve_evntsel_nmi(MSR_K7_EVNTSEL0 + i);
78 } 78 }
79 local_irq_save(flags); 79 local_irq_save(flags);
80 /* start meauring cycles, incrementing from 0 */ 80 /* start measuring cycles, incrementing from 0 */
81 wrmsrl(MSR_K7_PERFCTR0 + i, 0); 81 wrmsrl(MSR_K7_PERFCTR0 + i, 0);
82 wrmsrl(MSR_K7_EVNTSEL0 + i, 1 << 22 | 3 << 16 | 0x76); 82 wrmsrl(MSR_K7_EVNTSEL0 + i, 1 << 22 | 3 << 16 | 0x76);
83 rdtscl(tsc_start); 83 rdtscl(tsc_start);
diff --git a/arch/x86/mm/pgtable_32.c b/arch/x86/mm/pgtable_32.c
index 6c1914622a88..73aba7125203 100644
--- a/arch/x86/mm/pgtable_32.c
+++ b/arch/x86/mm/pgtable_32.c
@@ -183,7 +183,7 @@ pte_t *pte_alloc_one_kernel(struct mm_struct *mm, unsigned long address)
183 return (pte_t *)__get_free_page(GFP_KERNEL|__GFP_REPEAT|__GFP_ZERO); 183 return (pte_t *)__get_free_page(GFP_KERNEL|__GFP_REPEAT|__GFP_ZERO);
184} 184}
185 185
186struct page *pte_alloc_one(struct mm_struct *mm, unsigned long address) 186pgtable_t pte_alloc_one(struct mm_struct *mm, unsigned long address)
187{ 187{
188 struct page *pte; 188 struct page *pte;
189 189
@@ -192,6 +192,8 @@ struct page *pte_alloc_one(struct mm_struct *mm, unsigned long address)
192#else 192#else
193 pte = alloc_pages(GFP_KERNEL|__GFP_REPEAT|__GFP_ZERO, 0); 193 pte = alloc_pages(GFP_KERNEL|__GFP_REPEAT|__GFP_ZERO, 0);
194#endif 194#endif
195 if (pte)
196 pgtable_page_ctor(pte);
195 return pte; 197 return pte;
196} 198}
197 199
@@ -365,6 +367,7 @@ void check_pgt_cache(void)
365 367
366void __pte_free_tlb(struct mmu_gather *tlb, struct page *pte) 368void __pte_free_tlb(struct mmu_gather *tlb, struct page *pte)
367{ 369{
370 pgtable_page_dtor(pte);
368 paravirt_release_pt(page_to_pfn(pte)); 371 paravirt_release_pt(page_to_pfn(pte));
369 tlb_remove_page(tlb, pte); 372 tlb_remove_page(tlb, pte);
370} 373}
diff --git a/arch/xtensa/Kconfig b/arch/xtensa/Kconfig
index 5d5546ce88fe..fd36764d7fb7 100644
--- a/arch/xtensa/Kconfig
+++ b/arch/xtensa/Kconfig
@@ -49,6 +49,10 @@ config ARCH_HAS_ILOG2_U64
49config NO_IOPORT 49config NO_IOPORT
50 def_bool y 50 def_bool y
51 51
52config HZ
53 int
54 default 100
55
52source "init/Kconfig" 56source "init/Kconfig"
53 57
54menu "Processor type and features" 58menu "Processor type and features"
diff --git a/arch/xtensa/kernel/setup.c b/arch/xtensa/kernel/setup.c
index 2e8d398cf196..b80f2cb1b4fb 100644
--- a/arch/xtensa/kernel/setup.c
+++ b/arch/xtensa/kernel/setup.c
@@ -469,7 +469,7 @@ c_stop(struct seq_file *f, void *v)
469{ 469{
470} 470}
471 471
472struct seq_operations cpuinfo_op = 472const struct seq_operations cpuinfo_op =
473{ 473{
474 start: c_start, 474 start: c_start,
475 next: c_next, 475 next: c_next,
diff --git a/block/blk-core.c b/block/blk-core.c
index 4afb39c82339..e9754dc98ec4 100644
--- a/block/blk-core.c
+++ b/block/blk-core.c
@@ -60,10 +60,15 @@ static void drive_stat_acct(struct request *rq, int new_io)
60 return; 60 return;
61 61
62 if (!new_io) { 62 if (!new_io) {
63 __disk_stat_inc(rq->rq_disk, merges[rw]); 63 __all_stat_inc(rq->rq_disk, merges[rw], rq->sector);
64 } else { 64 } else {
65 struct hd_struct *part = get_part(rq->rq_disk, rq->sector);
65 disk_round_stats(rq->rq_disk); 66 disk_round_stats(rq->rq_disk);
66 rq->rq_disk->in_flight++; 67 rq->rq_disk->in_flight++;
68 if (part) {
69 part_round_stats(part);
70 part->in_flight++;
71 }
67 } 72 }
68} 73}
69 74
@@ -102,27 +107,38 @@ struct backing_dev_info *blk_get_backing_dev_info(struct block_device *bdev)
102} 107}
103EXPORT_SYMBOL(blk_get_backing_dev_info); 108EXPORT_SYMBOL(blk_get_backing_dev_info);
104 109
110/*
111 * We can't just memset() the structure, since the allocation path
112 * already stored some information in the request.
113 */
105void rq_init(struct request_queue *q, struct request *rq) 114void rq_init(struct request_queue *q, struct request *rq)
106{ 115{
107 INIT_LIST_HEAD(&rq->queuelist); 116 INIT_LIST_HEAD(&rq->queuelist);
108 INIT_LIST_HEAD(&rq->donelist); 117 INIT_LIST_HEAD(&rq->donelist);
109 118 rq->q = q;
110 rq->errors = 0; 119 rq->sector = rq->hard_sector = (sector_t) -1;
120 rq->nr_sectors = rq->hard_nr_sectors = 0;
121 rq->current_nr_sectors = rq->hard_cur_sectors = 0;
111 rq->bio = rq->biotail = NULL; 122 rq->bio = rq->biotail = NULL;
112 INIT_HLIST_NODE(&rq->hash); 123 INIT_HLIST_NODE(&rq->hash);
113 RB_CLEAR_NODE(&rq->rb_node); 124 RB_CLEAR_NODE(&rq->rb_node);
125 rq->rq_disk = NULL;
126 rq->nr_phys_segments = 0;
127 rq->nr_hw_segments = 0;
114 rq->ioprio = 0; 128 rq->ioprio = 0;
129 rq->special = NULL;
115 rq->buffer = NULL; 130 rq->buffer = NULL;
131 rq->tag = -1;
132 rq->errors = 0;
116 rq->ref_count = 1; 133 rq->ref_count = 1;
117 rq->q = q; 134 rq->cmd_len = 0;
118 rq->special = NULL; 135 memset(rq->cmd, 0, sizeof(rq->cmd));
119 rq->data_len = 0; 136 rq->data_len = 0;
137 rq->sense_len = 0;
120 rq->data = NULL; 138 rq->data = NULL;
121 rq->nr_phys_segments = 0;
122 rq->sense = NULL; 139 rq->sense = NULL;
123 rq->end_io = NULL; 140 rq->end_io = NULL;
124 rq->end_io_data = NULL; 141 rq->end_io_data = NULL;
125 rq->completion_data = NULL;
126 rq->next_rq = NULL; 142 rq->next_rq = NULL;
127} 143}
128 144
@@ -986,6 +1002,21 @@ void disk_round_stats(struct gendisk *disk)
986} 1002}
987EXPORT_SYMBOL_GPL(disk_round_stats); 1003EXPORT_SYMBOL_GPL(disk_round_stats);
988 1004
1005void part_round_stats(struct hd_struct *part)
1006{
1007 unsigned long now = jiffies;
1008
1009 if (now == part->stamp)
1010 return;
1011
1012 if (part->in_flight) {
1013 __part_stat_add(part, time_in_queue,
1014 part->in_flight * (now - part->stamp));
1015 __part_stat_add(part, io_ticks, (now - part->stamp));
1016 }
1017 part->stamp = now;
1018}
1019
989/* 1020/*
990 * queue lock must be held 1021 * queue lock must be held
991 */ 1022 */
@@ -1188,10 +1219,6 @@ static inline void blk_partition_remap(struct bio *bio)
1188 1219
1189 if (bio_sectors(bio) && bdev != bdev->bd_contains) { 1220 if (bio_sectors(bio) && bdev != bdev->bd_contains) {
1190 struct hd_struct *p = bdev->bd_part; 1221 struct hd_struct *p = bdev->bd_part;
1191 const int rw = bio_data_dir(bio);
1192
1193 p->sectors[rw] += bio_sectors(bio);
1194 p->ios[rw]++;
1195 1222
1196 bio->bi_sector += p->start_sect; 1223 bio->bi_sector += p->start_sect;
1197 bio->bi_bdev = bdev->bd_contains; 1224 bio->bi_bdev = bdev->bd_contains;
@@ -1519,7 +1546,8 @@ static int __end_that_request_first(struct request *req, int error,
1519 if (blk_fs_request(req) && req->rq_disk) { 1546 if (blk_fs_request(req) && req->rq_disk) {
1520 const int rw = rq_data_dir(req); 1547 const int rw = rq_data_dir(req);
1521 1548
1522 disk_stat_add(req->rq_disk, sectors[rw], nr_bytes >> 9); 1549 all_stat_add(req->rq_disk, sectors[rw],
1550 nr_bytes >> 9, req->sector);
1523 } 1551 }
1524 1552
1525 total_bytes = bio_nbytes = 0; 1553 total_bytes = bio_nbytes = 0;
@@ -1704,11 +1732,16 @@ static void end_that_request_last(struct request *req, int error)
1704 if (disk && blk_fs_request(req) && req != &req->q->bar_rq) { 1732 if (disk && blk_fs_request(req) && req != &req->q->bar_rq) {
1705 unsigned long duration = jiffies - req->start_time; 1733 unsigned long duration = jiffies - req->start_time;
1706 const int rw = rq_data_dir(req); 1734 const int rw = rq_data_dir(req);
1735 struct hd_struct *part = get_part(disk, req->sector);
1707 1736
1708 __disk_stat_inc(disk, ios[rw]); 1737 __all_stat_inc(disk, ios[rw], req->sector);
1709 __disk_stat_add(disk, ticks[rw], duration); 1738 __all_stat_add(disk, ticks[rw], duration, req->sector);
1710 disk_round_stats(disk); 1739 disk_round_stats(disk);
1711 disk->in_flight--; 1740 disk->in_flight--;
1741 if (part) {
1742 part_round_stats(part);
1743 part->in_flight--;
1744 }
1712 } 1745 }
1713 1746
1714 if (req->end_io) 1747 if (req->end_io)
diff --git a/block/blk-merge.c b/block/blk-merge.c
index 845ef8131108..d3b84bbb776a 100644
--- a/block/blk-merge.c
+++ b/block/blk-merge.c
@@ -454,8 +454,14 @@ static int attempt_merge(struct request_queue *q, struct request *req,
454 elv_merge_requests(q, req, next); 454 elv_merge_requests(q, req, next);
455 455
456 if (req->rq_disk) { 456 if (req->rq_disk) {
457 struct hd_struct *part
458 = get_part(req->rq_disk, req->sector);
457 disk_round_stats(req->rq_disk); 459 disk_round_stats(req->rq_disk);
458 req->rq_disk->in_flight--; 460 req->rq_disk->in_flight--;
461 if (part) {
462 part_round_stats(part);
463 part->in_flight--;
464 }
459 } 465 }
460 466
461 req->ioprio = ioprio_best(req->ioprio, next->ioprio); 467 req->ioprio = ioprio_best(req->ioprio, next->ioprio);
diff --git a/block/genhd.c b/block/genhd.c
index de2ebb2fab43..53f2238e69c8 100644
--- a/block/genhd.c
+++ b/block/genhd.c
@@ -584,12 +584,28 @@ static int diskstats_show(struct seq_file *s, void *v)
584 for (n = 0; n < gp->minors - 1; n++) { 584 for (n = 0; n < gp->minors - 1; n++) {
585 struct hd_struct *hd = gp->part[n]; 585 struct hd_struct *hd = gp->part[n];
586 586
587 if (hd && hd->nr_sects) 587 if (!hd || !hd->nr_sects)
588 seq_printf(s, "%4d %4d %s %u %u %u %u\n", 588 continue;
589 gp->major, n + gp->first_minor + 1, 589
590 disk_name(gp, n + 1, buf), 590 preempt_disable();
591 hd->ios[0], hd->sectors[0], 591 part_round_stats(hd);
592 hd->ios[1], hd->sectors[1]); 592 preempt_enable();
593 seq_printf(s, "%4d %4d %s %lu %lu %llu "
594 "%u %lu %lu %llu %u %u %u %u\n",
595 gp->major, n + gp->first_minor + 1,
596 disk_name(gp, n + 1, buf),
597 part_stat_read(hd, ios[0]),
598 part_stat_read(hd, merges[0]),
599 (unsigned long long)part_stat_read(hd, sectors[0]),
600 jiffies_to_msecs(part_stat_read(hd, ticks[0])),
601 part_stat_read(hd, ios[1]),
602 part_stat_read(hd, merges[1]),
603 (unsigned long long)part_stat_read(hd, sectors[1]),
604 jiffies_to_msecs(part_stat_read(hd, ticks[1])),
605 hd->in_flight,
606 jiffies_to_msecs(part_stat_read(hd, io_ticks)),
607 jiffies_to_msecs(part_stat_read(hd, time_in_queue))
608 );
593 } 609 }
594 610
595 return 0; 611 return 0;
diff --git a/drivers/acpi/Kconfig b/drivers/acpi/Kconfig
index 7ef172c2a1d6..f688c214be0c 100644
--- a/drivers/acpi/Kconfig
+++ b/drivers/acpi/Kconfig
@@ -204,13 +204,25 @@ config ACPI_NUMA
204 204
205config ACPI_WMI 205config ACPI_WMI
206 tristate "WMI (EXPERIMENTAL)" 206 tristate "WMI (EXPERIMENTAL)"
207 depends on X86
207 depends on EXPERIMENTAL 208 depends on EXPERIMENTAL
208 help 209 help
209 This driver adds support for the ACPI-WMI mapper device (PNP0C14) 210 This driver adds support for the ACPI-WMI (Windows Management
210 found on some systems. 211 Instrumentation) mapper device (PNP0C14) found on some systems.
212
213 ACPI-WMI is a proprietary extension to ACPI to expose parts of the
214 ACPI firmware to userspace - this is done through various vendor
215 defined methods and data blocks in a PNP0C14 device, which are then
216 made available for userspace to call.
217
218 The implementation of this in Linux currently only exposes this to
219 other kernel space drivers.
220
221 This driver is a required dependency to build the firmware specific
222 drivers needed on many machines, including Acer and HP laptops.
211 223
212 NOTE: You will need another driver or userspace application on top of 224 It is safe to enable this driver even if your DSDT doesn't define
213 this to actually use anything defined in the ACPI-WMI mapper. 225 any ACPI-WMI devices.
214 226
215config ACPI_ASUS 227config ACPI_ASUS
216 tristate "ASUS/Medion Laptop Extras" 228 tristate "ASUS/Medion Laptop Extras"
diff --git a/drivers/acpi/blacklist.c b/drivers/acpi/blacklist.c
index 6dbaa2d15fe0..9ce983ed60f0 100644
--- a/drivers/acpi/blacklist.c
+++ b/drivers/acpi/blacklist.c
@@ -445,6 +445,8 @@ static struct dmi_system_id acpi_osi_dmi_table[] __initdata = {
445 * DMI_MATCH(DMI_PRODUCT_VERSION, "ThinkPad T61"), 445 * DMI_MATCH(DMI_PRODUCT_VERSION, "ThinkPad T61"),
446 * _OSI(Linux) is a NOP: 446 * _OSI(Linux) is a NOP:
447 * DMI_MATCH(DMI_PRODUCT_VERSION, "3000 N100"), 447 * DMI_MATCH(DMI_PRODUCT_VERSION, "3000 N100"),
448 * _OSI(Linux) effect unknown
449 * DMI_MATCH(DMI_PRODUCT_VERSION, "ThinkPad X61"),
448 */ 450 */
449 { 451 {
450 .callback = dmi_enable_osi_linux, 452 .callback = dmi_enable_osi_linux,
@@ -464,6 +466,14 @@ static struct dmi_system_id acpi_osi_dmi_table[] __initdata = {
464 }, 466 },
465 { 467 {
466 .callback = dmi_unknown_osi_linux, 468 .callback = dmi_unknown_osi_linux,
469 .ident = "Lenovo ThinkPad X61",
470 .matches = {
471 DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"),
472 DMI_MATCH(DMI_PRODUCT_VERSION, "ThinkPad X61"),
473 },
474 },
475 {
476 .callback = dmi_unknown_osi_linux,
467 .ident = "Lenovo 3000 V100", 477 .ident = "Lenovo 3000 V100",
468 .matches = { 478 .matches = {
469 DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"), 479 DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"),
@@ -505,6 +515,16 @@ static struct dmi_system_id acpi_osi_dmi_table[] __initdata = {
505 DMI_MATCH(DMI_PRODUCT_NAME, "NEC VERSA M360"), 515 DMI_MATCH(DMI_PRODUCT_NAME, "NEC VERSA M360"),
506 }, 516 },
507 }, 517 },
518 /* Panasonic */
519 {
520 .callback = dmi_unknown_osi_linux,
521 .ident = "Panasonic",
522 .matches = {
523 DMI_MATCH(DMI_SYS_VENDOR, "Matsushita"),
524 /* Toughbook CF-52 */
525 DMI_MATCH(DMI_PRODUCT_NAME, "CF-52CCABVBG"),
526 },
527 },
508 /* 528 /*
509 * Disable OSI(Linux) warnings on all "Samsung Electronics" 529 * Disable OSI(Linux) warnings on all "Samsung Electronics"
510 * 530 *
diff --git a/drivers/acpi/osl.c b/drivers/acpi/osl.c
index 27ccd68b8f46..a14501c98f40 100644
--- a/drivers/acpi/osl.c
+++ b/drivers/acpi/osl.c
@@ -343,7 +343,7 @@ struct acpi_table_header *acpi_find_dsdt_initrd(void)
343 struct kstat stat; 343 struct kstat stat;
344 char *ramfs_dsdt_name = "/DSDT.aml"; 344 char *ramfs_dsdt_name = "/DSDT.aml";
345 345
346 printk(KERN_INFO PREFIX "Checking initramfs for custom DSDT"); 346 printk(KERN_INFO PREFIX "Checking initramfs for custom DSDT\n");
347 347
348 /* 348 /*
349 * Never do this at home, only the user-space is allowed to open a file. 349 * Never do this at home, only the user-space is allowed to open a file.
diff --git a/drivers/acpi/processor_perflib.c b/drivers/acpi/processor_perflib.c
index f32010bee4d5..b477a4be8a69 100644
--- a/drivers/acpi/processor_perflib.c
+++ b/drivers/acpi/processor_perflib.c
@@ -50,6 +50,10 @@ ACPI_MODULE_NAME("processor_perflib");
50 50
51static DEFINE_MUTEX(performance_mutex); 51static DEFINE_MUTEX(performance_mutex);
52 52
53/* Use cpufreq debug layer for _PPC changes. */
54#define cpufreq_printk(msg...) cpufreq_debug_printk(CPUFREQ_DEBUG_CORE, \
55 "cpufreq-core", msg)
56
53/* 57/*
54 * _PPC support is implemented as a CPUfreq policy notifier: 58 * _PPC support is implemented as a CPUfreq policy notifier:
55 * This means each time a CPUfreq driver registered also with 59 * This means each time a CPUfreq driver registered also with
@@ -131,6 +135,9 @@ static int acpi_processor_get_platform_limit(struct acpi_processor *pr)
131 return -ENODEV; 135 return -ENODEV;
132 } 136 }
133 137
138 cpufreq_printk("CPU %d: _PPC is %d - frequency %s limited\n", pr->id,
139 (int)ppc, ppc ? "" : "not");
140
134 pr->performance_platform_limit = (int)ppc; 141 pr->performance_platform_limit = (int)ppc;
135 142
136 return 0; 143 return 0;
diff --git a/drivers/block/Kconfig b/drivers/block/Kconfig
index 64e5148d82bc..b6d230b3209f 100644
--- a/drivers/block/Kconfig
+++ b/drivers/block/Kconfig
@@ -322,7 +322,7 @@ config BLK_DEV_UB
322 If unsure, say N. 322 If unsure, say N.
323 323
324config BLK_DEV_RAM 324config BLK_DEV_RAM
325 tristate "RAM disk support" 325 tristate "RAM block device support"
326 ---help--- 326 ---help---
327 Saying Y here will allow you to use a portion of your RAM memory as 327 Saying Y here will allow you to use a portion of your RAM memory as
328 a block device, so that you can make file systems on it, read and 328 a block device, so that you can make file systems on it, read and
@@ -357,15 +357,15 @@ config BLK_DEV_RAM_SIZE
357 The default value is 4096 kilobytes. Only change this if you know 357 The default value is 4096 kilobytes. Only change this if you know
358 what you are doing. 358 what you are doing.
359 359
360config BLK_DEV_RAM_BLOCKSIZE 360config BLK_DEV_XIP
361 int "Default RAM disk block size (bytes)" 361 bool "Support XIP filesystems on RAM block device"
362 depends on BLK_DEV_RAM 362 depends on BLK_DEV_RAM
363 default "1024" 363 default n
364 help 364 help
365 The default value is 1024 bytes. PAGE_SIZE is a much more 365 Support XIP filesystems (such as ext2 with XIP support on) on
366 efficient choice however. The default is kept to ensure initrd 366 top of block ram device. This will slightly enlarge the kernel, and
367 setups function - apparently needed by the rd_load_image routine 367 will prevent RAM block device backing store memory from being
368 that supposes the filesystem in the image uses a 1024 blocksize. 368 allocated from highmem (only a problem for highmem systems).
369 369
370config CDROM_PKTCDVD 370config CDROM_PKTCDVD
371 tristate "Packet writing on CD/DVD media" 371 tristate "Packet writing on CD/DVD media"
diff --git a/drivers/block/Makefile b/drivers/block/Makefile
index 7691505a2e12..01c972415cb2 100644
--- a/drivers/block/Makefile
+++ b/drivers/block/Makefile
@@ -11,7 +11,7 @@ obj-$(CONFIG_AMIGA_FLOPPY) += amiflop.o
11obj-$(CONFIG_PS3_DISK) += ps3disk.o 11obj-$(CONFIG_PS3_DISK) += ps3disk.o
12obj-$(CONFIG_ATARI_FLOPPY) += ataflop.o 12obj-$(CONFIG_ATARI_FLOPPY) += ataflop.o
13obj-$(CONFIG_AMIGA_Z2RAM) += z2ram.o 13obj-$(CONFIG_AMIGA_Z2RAM) += z2ram.o
14obj-$(CONFIG_BLK_DEV_RAM) += rd.o 14obj-$(CONFIG_BLK_DEV_RAM) += brd.o
15obj-$(CONFIG_BLK_DEV_LOOP) += loop.o 15obj-$(CONFIG_BLK_DEV_LOOP) += loop.o
16obj-$(CONFIG_BLK_DEV_PS2) += ps2esdi.o 16obj-$(CONFIG_BLK_DEV_PS2) += ps2esdi.o
17obj-$(CONFIG_BLK_DEV_XD) += xd.o 17obj-$(CONFIG_BLK_DEV_XD) += xd.o
diff --git a/drivers/block/aoe/aoe.h b/drivers/block/aoe/aoe.h
index 07f02f855ab5..280e71ee744c 100644
--- a/drivers/block/aoe/aoe.h
+++ b/drivers/block/aoe/aoe.h
@@ -1,5 +1,5 @@
1/* Copyright (c) 2006 Coraid, Inc. See COPYING for GPL terms. */ 1/* Copyright (c) 2007 Coraid, Inc. See COPYING for GPL terms. */
2#define VERSION "32" 2#define VERSION "47"
3#define AOE_MAJOR 152 3#define AOE_MAJOR 152
4#define DEVICE_NAME "aoe" 4#define DEVICE_NAME "aoe"
5 5
@@ -76,10 +76,8 @@ enum {
76 DEVFL_EXT = (1<<2), /* device accepts lba48 commands */ 76 DEVFL_EXT = (1<<2), /* device accepts lba48 commands */
77 DEVFL_CLOSEWAIT = (1<<3), /* device is waiting for all closes to revalidate */ 77 DEVFL_CLOSEWAIT = (1<<3), /* device is waiting for all closes to revalidate */
78 DEVFL_GDALLOC = (1<<4), /* need to alloc gendisk */ 78 DEVFL_GDALLOC = (1<<4), /* need to alloc gendisk */
79 DEVFL_PAUSE = (1<<5), 79 DEVFL_KICKME = (1<<5), /* slow polling network card catch */
80 DEVFL_NEWSIZE = (1<<6), /* need to update dev size in block layer */ 80 DEVFL_NEWSIZE = (1<<6), /* need to update dev size in block layer */
81 DEVFL_MAXBCNT = (1<<7), /* d->maxbcnt is not changeable */
82 DEVFL_KICKME = (1<<8),
83 81
84 BUFFL_FAIL = 1, 82 BUFFL_FAIL = 1,
85}; 83};
@@ -88,17 +86,25 @@ enum {
88 DEFAULTBCNT = 2 * 512, /* 2 sectors */ 86 DEFAULTBCNT = 2 * 512, /* 2 sectors */
89 NPERSHELF = 16, /* number of slots per shelf address */ 87 NPERSHELF = 16, /* number of slots per shelf address */
90 FREETAG = -1, 88 FREETAG = -1,
91 MIN_BUFS = 8, 89 MIN_BUFS = 16,
90 NTARGETS = 8,
91 NAOEIFS = 8,
92 NSKBPOOLMAX = 128,
93
94 TIMERTICK = HZ / 10,
95 MINTIMER = HZ >> 2,
96 MAXTIMER = HZ << 1,
97 HELPWAIT = 20,
92}; 98};
93 99
94struct buf { 100struct buf {
95 struct list_head bufs; 101 struct list_head bufs;
96 ulong start_time; /* for disk stats */ 102 ulong stime; /* for disk stats */
97 ulong flags; 103 ulong flags;
98 ulong nframesout; 104 ulong nframesout;
99 char *bufaddr;
100 ulong resid; 105 ulong resid;
101 ulong bv_resid; 106 ulong bv_resid;
107 ulong bv_off;
102 sector_t sector; 108 sector_t sector;
103 struct bio *bio; 109 struct bio *bio;
104 struct bio_vec *bv; 110 struct bio_vec *bv;
@@ -114,19 +120,38 @@ struct frame {
114 struct sk_buff *skb; 120 struct sk_buff *skb;
115}; 121};
116 122
123struct aoeif {
124 struct net_device *nd;
125 unsigned char lost;
126 unsigned char lostjumbo;
127 ushort maxbcnt;
128};
129
130struct aoetgt {
131 unsigned char addr[6];
132 ushort nframes;
133 struct frame *frames;
134 struct aoeif ifs[NAOEIFS];
135 struct aoeif *ifp; /* current aoeif in use */
136 ushort nout;
137 ushort maxout;
138 u16 lasttag; /* last tag sent */
139 u16 useme;
140 ulong lastwadj; /* last window adjustment */
141 int wpkts, rpkts;
142 int dataref;
143};
144
117struct aoedev { 145struct aoedev {
118 struct aoedev *next; 146 struct aoedev *next;
119 unsigned char addr[6]; /* remote mac addr */
120 ushort flags;
121 ulong sysminor; 147 ulong sysminor;
122 ulong aoemajor; 148 ulong aoemajor;
123 ulong aoeminor; 149 u16 aoeminor;
150 u16 flags;
124 u16 nopen; /* (bd_openers isn't available without sleeping) */ 151 u16 nopen; /* (bd_openers isn't available without sleeping) */
125 u16 lasttag; /* last tag sent */
126 u16 rttavg; /* round trip average of requests/responses */ 152 u16 rttavg; /* round trip average of requests/responses */
127 u16 mintimer; 153 u16 mintimer;
128 u16 fw_ver; /* version of blade's firmware */ 154 u16 fw_ver; /* version of blade's firmware */
129 u16 maxbcnt;
130 struct work_struct work;/* disk create work struct */ 155 struct work_struct work;/* disk create work struct */
131 struct gendisk *gd; 156 struct gendisk *gd;
132 struct request_queue blkq; 157 struct request_queue blkq;
@@ -134,15 +159,17 @@ struct aoedev {
134 sector_t ssize; 159 sector_t ssize;
135 struct timer_list timer; 160 struct timer_list timer;
136 spinlock_t lock; 161 spinlock_t lock;
137 struct net_device *ifp; /* interface ed is attached to */
138 struct sk_buff *sendq_hd; /* packets needing to be sent, list head */ 162 struct sk_buff *sendq_hd; /* packets needing to be sent, list head */
139 struct sk_buff *sendq_tl; 163 struct sk_buff *sendq_tl;
164 struct sk_buff *skbpool_hd;
165 struct sk_buff *skbpool_tl;
166 int nskbpool;
140 mempool_t *bufpool; /* for deadlock-free Buf allocation */ 167 mempool_t *bufpool; /* for deadlock-free Buf allocation */
141 struct list_head bufq; /* queue of bios to work on */ 168 struct list_head bufq; /* queue of bios to work on */
142 struct buf *inprocess; /* the one we're currently working on */ 169 struct buf *inprocess; /* the one we're currently working on */
143 ushort lostjumbo; 170 struct aoetgt *targets[NTARGETS];
144 ushort nframes; /* number of frames below */ 171 struct aoetgt **tgt; /* target in use when working */
145 struct frame *frames; 172 struct aoetgt **htgt; /* target needing rexmit assistance */
146}; 173};
147 174
148 175
@@ -160,14 +187,16 @@ void aoecmd_cfg(ushort aoemajor, unsigned char aoeminor);
160void aoecmd_ata_rsp(struct sk_buff *); 187void aoecmd_ata_rsp(struct sk_buff *);
161void aoecmd_cfg_rsp(struct sk_buff *); 188void aoecmd_cfg_rsp(struct sk_buff *);
162void aoecmd_sleepwork(struct work_struct *); 189void aoecmd_sleepwork(struct work_struct *);
163struct sk_buff *new_skb(ulong); 190void aoecmd_cleanslate(struct aoedev *);
191struct sk_buff *aoecmd_ata_id(struct aoedev *);
164 192
165int aoedev_init(void); 193int aoedev_init(void);
166void aoedev_exit(void); 194void aoedev_exit(void);
167struct aoedev *aoedev_by_aoeaddr(int maj, int min); 195struct aoedev *aoedev_by_aoeaddr(int maj, int min);
168struct aoedev *aoedev_by_sysminor_m(ulong sysminor, ulong bufcnt); 196struct aoedev *aoedev_by_sysminor_m(ulong sysminor);
169void aoedev_downdev(struct aoedev *d); 197void aoedev_downdev(struct aoedev *d);
170int aoedev_isbusy(struct aoedev *d); 198int aoedev_isbusy(struct aoedev *d);
199int aoedev_flush(const char __user *str, size_t size);
171 200
172int aoenet_init(void); 201int aoenet_init(void);
173void aoenet_exit(void); 202void aoenet_exit(void);
@@ -175,4 +204,4 @@ void aoenet_xmit(struct sk_buff *);
175int is_aoe_netif(struct net_device *ifp); 204int is_aoe_netif(struct net_device *ifp);
176int set_aoe_iflist(const char __user *str, size_t size); 205int set_aoe_iflist(const char __user *str, size_t size);
177 206
178u64 mac_addr(char addr[6]); 207unsigned long long mac_addr(char addr[6]);
diff --git a/drivers/block/aoe/aoeblk.c b/drivers/block/aoe/aoeblk.c
index 826d12381e21..0c39782b2660 100644
--- a/drivers/block/aoe/aoeblk.c
+++ b/drivers/block/aoe/aoeblk.c
@@ -1,4 +1,4 @@
1/* Copyright (c) 2006 Coraid, Inc. See COPYING for GPL terms. */ 1/* Copyright (c) 2007 Coraid, Inc. See COPYING for GPL terms. */
2/* 2/*
3 * aoeblk.c 3 * aoeblk.c
4 * block device routines 4 * block device routines
@@ -24,7 +24,7 @@ static ssize_t aoedisk_show_state(struct device *dev,
24 return snprintf(page, PAGE_SIZE, 24 return snprintf(page, PAGE_SIZE,
25 "%s%s\n", 25 "%s%s\n",
26 (d->flags & DEVFL_UP) ? "up" : "down", 26 (d->flags & DEVFL_UP) ? "up" : "down",
27 (d->flags & DEVFL_PAUSE) ? ",paused" : 27 (d->flags & DEVFL_KICKME) ? ",kickme" :
28 (d->nopen && !(d->flags & DEVFL_UP)) ? ",closewait" : ""); 28 (d->nopen && !(d->flags & DEVFL_UP)) ? ",closewait" : "");
29 /* I'd rather see nopen exported so we can ditch closewait */ 29 /* I'd rather see nopen exported so we can ditch closewait */
30} 30}
@@ -33,17 +33,48 @@ static ssize_t aoedisk_show_mac(struct device *dev,
33{ 33{
34 struct gendisk *disk = dev_to_disk(dev); 34 struct gendisk *disk = dev_to_disk(dev);
35 struct aoedev *d = disk->private_data; 35 struct aoedev *d = disk->private_data;
36 struct aoetgt *t = d->targets[0];
36 37
37 return snprintf(page, PAGE_SIZE, "%012llx\n", 38 if (t == NULL)
38 (unsigned long long)mac_addr(d->addr)); 39 return snprintf(page, PAGE_SIZE, "none\n");
40 return snprintf(page, PAGE_SIZE, "%012llx\n", mac_addr(t->addr));
39} 41}
40static ssize_t aoedisk_show_netif(struct device *dev, 42static ssize_t aoedisk_show_netif(struct device *dev,
41 struct device_attribute *attr, char *page) 43 struct device_attribute *attr, char *page)
42{ 44{
43 struct gendisk *disk = dev_to_disk(dev); 45 struct gendisk *disk = dev_to_disk(dev);
44 struct aoedev *d = disk->private_data; 46 struct aoedev *d = disk->private_data;
47 struct net_device *nds[8], **nd, **nnd, **ne;
48 struct aoetgt **t, **te;
49 struct aoeif *ifp, *e;
50 char *p;
51
52 memset(nds, 0, sizeof nds);
53 nd = nds;
54 ne = nd + ARRAY_SIZE(nds);
55 t = d->targets;
56 te = t + NTARGETS;
57 for (; t < te && *t; t++) {
58 ifp = (*t)->ifs;
59 e = ifp + NAOEIFS;
60 for (; ifp < e && ifp->nd; ifp++) {
61 for (nnd = nds; nnd < nd; nnd++)
62 if (*nnd == ifp->nd)
63 break;
64 if (nnd == nd && nd != ne)
65 *nd++ = ifp->nd;
66 }
67 }
45 68
46 return snprintf(page, PAGE_SIZE, "%s\n", d->ifp->name); 69 ne = nd;
70 nd = nds;
71 if (*nd == NULL)
72 return snprintf(page, PAGE_SIZE, "none\n");
73 for (p = page; nd < ne; nd++)
74 p += snprintf(p, PAGE_SIZE - (p-page), "%s%s",
75 p == page ? "" : ",", (*nd)->name);
76 p += snprintf(p, PAGE_SIZE - (p-page), "\n");
77 return p-page;
47} 78}
48/* firmware version */ 79/* firmware version */
49static ssize_t aoedisk_show_fwver(struct device *dev, 80static ssize_t aoedisk_show_fwver(struct device *dev,
@@ -134,7 +165,23 @@ aoeblk_make_request(struct request_queue *q, struct bio *bio)
134 165
135 blk_queue_bounce(q, &bio); 166 blk_queue_bounce(q, &bio);
136 167
168 if (bio == NULL) {
169 printk(KERN_ERR "aoe: bio is NULL\n");
170 BUG();
171 return 0;
172 }
137 d = bio->bi_bdev->bd_disk->private_data; 173 d = bio->bi_bdev->bd_disk->private_data;
174 if (d == NULL) {
175 printk(KERN_ERR "aoe: bd_disk->private_data is NULL\n");
176 BUG();
177 bio_endio(bio, -ENXIO);
178 return 0;
179 } else if (bio->bi_io_vec == NULL) {
180 printk(KERN_ERR "aoe: bi_io_vec is NULL\n");
181 BUG();
182 bio_endio(bio, -ENXIO);
183 return 0;
184 }
138 buf = mempool_alloc(d->bufpool, GFP_NOIO); 185 buf = mempool_alloc(d->bufpool, GFP_NOIO);
139 if (buf == NULL) { 186 if (buf == NULL) {
140 printk(KERN_INFO "aoe: buf allocation failure\n"); 187 printk(KERN_INFO "aoe: buf allocation failure\n");
@@ -143,19 +190,19 @@ aoeblk_make_request(struct request_queue *q, struct bio *bio)
143 } 190 }
144 memset(buf, 0, sizeof(*buf)); 191 memset(buf, 0, sizeof(*buf));
145 INIT_LIST_HEAD(&buf->bufs); 192 INIT_LIST_HEAD(&buf->bufs);
146 buf->start_time = jiffies; 193 buf->stime = jiffies;
147 buf->bio = bio; 194 buf->bio = bio;
148 buf->resid = bio->bi_size; 195 buf->resid = bio->bi_size;
149 buf->sector = bio->bi_sector; 196 buf->sector = bio->bi_sector;
150 buf->bv = &bio->bi_io_vec[bio->bi_idx]; 197 buf->bv = &bio->bi_io_vec[bio->bi_idx];
151 WARN_ON(buf->bv->bv_len == 0);
152 buf->bv_resid = buf->bv->bv_len; 198 buf->bv_resid = buf->bv->bv_len;
153 buf->bufaddr = page_address(buf->bv->bv_page) + buf->bv->bv_offset; 199 WARN_ON(buf->bv_resid == 0);
200 buf->bv_off = buf->bv->bv_offset;
154 201
155 spin_lock_irqsave(&d->lock, flags); 202 spin_lock_irqsave(&d->lock, flags);
156 203
157 if ((d->flags & DEVFL_UP) == 0) { 204 if ((d->flags & DEVFL_UP) == 0) {
158 printk(KERN_INFO "aoe: device %ld.%ld is not up\n", 205 printk(KERN_INFO "aoe: device %ld.%d is not up\n",
159 d->aoemajor, d->aoeminor); 206 d->aoemajor, d->aoeminor);
160 spin_unlock_irqrestore(&d->lock, flags); 207 spin_unlock_irqrestore(&d->lock, flags);
161 mempool_free(buf, d->bufpool); 208 mempool_free(buf, d->bufpool);
@@ -208,14 +255,15 @@ aoeblk_gdalloc(void *vp)
208 255
209 gd = alloc_disk(AOE_PARTITIONS); 256 gd = alloc_disk(AOE_PARTITIONS);
210 if (gd == NULL) { 257 if (gd == NULL) {
211 printk(KERN_ERR "aoe: cannot allocate disk structure for %ld.%ld\n", 258 printk(KERN_ERR
259 "aoe: cannot allocate disk structure for %ld.%d\n",
212 d->aoemajor, d->aoeminor); 260 d->aoemajor, d->aoeminor);
213 goto err; 261 goto err;
214 } 262 }
215 263
216 d->bufpool = mempool_create_slab_pool(MIN_BUFS, buf_pool_cache); 264 d->bufpool = mempool_create_slab_pool(MIN_BUFS, buf_pool_cache);
217 if (d->bufpool == NULL) { 265 if (d->bufpool == NULL) {
218 printk(KERN_ERR "aoe: cannot allocate bufpool for %ld.%ld\n", 266 printk(KERN_ERR "aoe: cannot allocate bufpool for %ld.%d\n",
219 d->aoemajor, d->aoeminor); 267 d->aoemajor, d->aoeminor);
220 goto err_disk; 268 goto err_disk;
221 } 269 }
@@ -229,7 +277,7 @@ aoeblk_gdalloc(void *vp)
229 gd->fops = &aoe_bdops; 277 gd->fops = &aoe_bdops;
230 gd->private_data = d; 278 gd->private_data = d;
231 gd->capacity = d->ssize; 279 gd->capacity = d->ssize;
232 snprintf(gd->disk_name, sizeof gd->disk_name, "etherd/e%ld.%ld", 280 snprintf(gd->disk_name, sizeof gd->disk_name, "etherd/e%ld.%d",
233 d->aoemajor, d->aoeminor); 281 d->aoemajor, d->aoeminor);
234 282
235 gd->queue = &d->blkq; 283 gd->queue = &d->blkq;
diff --git a/drivers/block/aoe/aoechr.c b/drivers/block/aoe/aoechr.c
index d5480e34cb22..e8e60e7a2e70 100644
--- a/drivers/block/aoe/aoechr.c
+++ b/drivers/block/aoe/aoechr.c
@@ -1,4 +1,4 @@
1/* Copyright (c) 2006 Coraid, Inc. See COPYING for GPL terms. */ 1/* Copyright (c) 2007 Coraid, Inc. See COPYING for GPL terms. */
2/* 2/*
3 * aoechr.c 3 * aoechr.c
4 * AoE character device driver 4 * AoE character device driver
@@ -6,6 +6,7 @@
6 6
7#include <linux/hdreg.h> 7#include <linux/hdreg.h>
8#include <linux/blkdev.h> 8#include <linux/blkdev.h>
9#include <linux/delay.h>
9#include "aoe.h" 10#include "aoe.h"
10 11
11enum { 12enum {
@@ -14,6 +15,7 @@ enum {
14 MINOR_DISCOVER, 15 MINOR_DISCOVER,
15 MINOR_INTERFACES, 16 MINOR_INTERFACES,
16 MINOR_REVALIDATE, 17 MINOR_REVALIDATE,
18 MINOR_FLUSH,
17 MSGSZ = 2048, 19 MSGSZ = 2048,
18 NMSG = 100, /* message backlog to retain */ 20 NMSG = 100, /* message backlog to retain */
19}; 21};
@@ -42,6 +44,7 @@ static struct aoe_chardev chardevs[] = {
42 { MINOR_DISCOVER, "discover" }, 44 { MINOR_DISCOVER, "discover" },
43 { MINOR_INTERFACES, "interfaces" }, 45 { MINOR_INTERFACES, "interfaces" },
44 { MINOR_REVALIDATE, "revalidate" }, 46 { MINOR_REVALIDATE, "revalidate" },
47 { MINOR_FLUSH, "flush" },
45}; 48};
46 49
47static int 50static int
@@ -68,6 +71,7 @@ revalidate(const char __user *str, size_t size)
68 int major, minor, n; 71 int major, minor, n;
69 ulong flags; 72 ulong flags;
70 struct aoedev *d; 73 struct aoedev *d;
74 struct sk_buff *skb;
71 char buf[16]; 75 char buf[16];
72 76
73 if (size >= sizeof buf) 77 if (size >= sizeof buf)
@@ -85,13 +89,20 @@ revalidate(const char __user *str, size_t size)
85 d = aoedev_by_aoeaddr(major, minor); 89 d = aoedev_by_aoeaddr(major, minor);
86 if (!d) 90 if (!d)
87 return -EINVAL; 91 return -EINVAL;
88
89 spin_lock_irqsave(&d->lock, flags); 92 spin_lock_irqsave(&d->lock, flags);
90 d->flags &= ~DEVFL_MAXBCNT; 93 aoecmd_cleanslate(d);
91 d->flags |= DEVFL_PAUSE; 94loop:
95 skb = aoecmd_ata_id(d);
92 spin_unlock_irqrestore(&d->lock, flags); 96 spin_unlock_irqrestore(&d->lock, flags);
97 /* try again if we are able to sleep a bit,
98 * otherwise give up this revalidation
99 */
100 if (!skb && !msleep_interruptible(200)) {
101 spin_lock_irqsave(&d->lock, flags);
102 goto loop;
103 }
104 aoenet_xmit(skb);
93 aoecmd_cfg(major, minor); 105 aoecmd_cfg(major, minor);
94
95 return 0; 106 return 0;
96} 107}
97 108
@@ -149,6 +160,9 @@ aoechr_write(struct file *filp, const char __user *buf, size_t cnt, loff_t *offp
149 break; 160 break;
150 case MINOR_REVALIDATE: 161 case MINOR_REVALIDATE:
151 ret = revalidate(buf, cnt); 162 ret = revalidate(buf, cnt);
163 break;
164 case MINOR_FLUSH:
165 ret = aoedev_flush(buf, cnt);
152 } 166 }
153 if (ret == 0) 167 if (ret == 0)
154 ret = cnt; 168 ret = cnt;
@@ -185,52 +199,51 @@ aoechr_read(struct file *filp, char __user *buf, size_t cnt, loff_t *off)
185 ulong flags; 199 ulong flags;
186 200
187 n = (unsigned long) filp->private_data; 201 n = (unsigned long) filp->private_data;
188 switch (n) { 202 if (n != MINOR_ERR)
189 case MINOR_ERR: 203 return -EFAULT;
190 spin_lock_irqsave(&emsgs_lock, flags); 204
191loop: 205 spin_lock_irqsave(&emsgs_lock, flags);
192 em = emsgs + emsgs_head_idx;
193 if ((em->flags & EMFL_VALID) == 0) {
194 if (filp->f_flags & O_NDELAY) {
195 spin_unlock_irqrestore(&emsgs_lock, flags);
196 return -EAGAIN;
197 }
198 nblocked_emsgs_readers++;
199 206
207 for (;;) {
208 em = emsgs + emsgs_head_idx;
209 if ((em->flags & EMFL_VALID) != 0)
210 break;
211 if (filp->f_flags & O_NDELAY) {
200 spin_unlock_irqrestore(&emsgs_lock, flags); 212 spin_unlock_irqrestore(&emsgs_lock, flags);
213 return -EAGAIN;
214 }
215 nblocked_emsgs_readers++;
201 216
202 n = down_interruptible(&emsgs_sema); 217 spin_unlock_irqrestore(&emsgs_lock, flags);
218
219 n = down_interruptible(&emsgs_sema);
203 220
204 spin_lock_irqsave(&emsgs_lock, flags); 221 spin_lock_irqsave(&emsgs_lock, flags);
205 222
206 nblocked_emsgs_readers--; 223 nblocked_emsgs_readers--;
207 224
208 if (n) { 225 if (n) {
209 spin_unlock_irqrestore(&emsgs_lock, flags);
210 return -ERESTARTSYS;
211 }
212 goto loop;
213 }
214 if (em->len > cnt) {
215 spin_unlock_irqrestore(&emsgs_lock, flags); 226 spin_unlock_irqrestore(&emsgs_lock, flags);
216 return -EAGAIN; 227 return -ERESTARTSYS;
217 } 228 }
218 mp = em->msg; 229 }
219 len = em->len; 230 if (em->len > cnt) {
220 em->msg = NULL; 231 spin_unlock_irqrestore(&emsgs_lock, flags);
221 em->flags &= ~EMFL_VALID; 232 return -EAGAIN;
233 }
234 mp = em->msg;
235 len = em->len;
236 em->msg = NULL;
237 em->flags &= ~EMFL_VALID;
222 238
223 emsgs_head_idx++; 239 emsgs_head_idx++;
224 emsgs_head_idx %= ARRAY_SIZE(emsgs); 240 emsgs_head_idx %= ARRAY_SIZE(emsgs);
225 241
226 spin_unlock_irqrestore(&emsgs_lock, flags); 242 spin_unlock_irqrestore(&emsgs_lock, flags);
227 243
228 n = copy_to_user(buf, mp, len); 244 n = copy_to_user(buf, mp, len);
229 kfree(mp); 245 kfree(mp);
230 return n == 0 ? len : -EFAULT; 246 return n == 0 ? len : -EFAULT;
231 default:
232 return -EFAULT;
233 }
234} 247}
235 248
236static const struct file_operations aoe_fops = { 249static const struct file_operations aoe_fops = {
diff --git a/drivers/block/aoe/aoecmd.c b/drivers/block/aoe/aoecmd.c
index 4d59d5057734..d00293ba3b45 100644
--- a/drivers/block/aoe/aoecmd.c
+++ b/drivers/block/aoe/aoecmd.c
@@ -1,4 +1,4 @@
1/* Copyright (c) 2006 Coraid, Inc. See COPYING for GPL terms. */ 1/* Copyright (c) 2007 Coraid, Inc. See COPYING for GPL terms. */
2/* 2/*
3 * aoecmd.c 3 * aoecmd.c
4 * Filesystem request handling methods 4 * Filesystem request handling methods
@@ -9,19 +9,21 @@
9#include <linux/skbuff.h> 9#include <linux/skbuff.h>
10#include <linux/netdevice.h> 10#include <linux/netdevice.h>
11#include <linux/genhd.h> 11#include <linux/genhd.h>
12#include <linux/moduleparam.h>
12#include <net/net_namespace.h> 13#include <net/net_namespace.h>
13#include <asm/unaligned.h> 14#include <asm/unaligned.h>
14#include "aoe.h" 15#include "aoe.h"
15 16
16#define TIMERTICK (HZ / 10)
17#define MINTIMER (2 * TIMERTICK)
18#define MAXTIMER (HZ << 1)
19
20static int aoe_deadsecs = 60 * 3; 17static int aoe_deadsecs = 60 * 3;
21module_param(aoe_deadsecs, int, 0644); 18module_param(aoe_deadsecs, int, 0644);
22MODULE_PARM_DESC(aoe_deadsecs, "After aoe_deadsecs seconds, give up and fail dev."); 19MODULE_PARM_DESC(aoe_deadsecs, "After aoe_deadsecs seconds, give up and fail dev.");
23 20
24struct sk_buff * 21static int aoe_maxout = 16;
22module_param(aoe_maxout, int, 0644);
23MODULE_PARM_DESC(aoe_maxout,
24 "Only aoe_maxout outstanding packets for every MAC on eX.Y.");
25
26static struct sk_buff *
25new_skb(ulong len) 27new_skb(ulong len)
26{ 28{
27 struct sk_buff *skb; 29 struct sk_buff *skb;
@@ -43,12 +45,12 @@ new_skb(ulong len)
43} 45}
44 46
45static struct frame * 47static struct frame *
46getframe(struct aoedev *d, int tag) 48getframe(struct aoetgt *t, int tag)
47{ 49{
48 struct frame *f, *e; 50 struct frame *f, *e;
49 51
50 f = d->frames; 52 f = t->frames;
51 e = f + d->nframes; 53 e = f + t->nframes;
52 for (; f<e; f++) 54 for (; f<e; f++)
53 if (f->tag == tag) 55 if (f->tag == tag)
54 return f; 56 return f;
@@ -61,21 +63,21 @@ getframe(struct aoedev *d, int tag)
61 * This driver reserves tag -1 to mean "unused frame." 63 * This driver reserves tag -1 to mean "unused frame."
62 */ 64 */
63static int 65static int
64newtag(struct aoedev *d) 66newtag(struct aoetgt *t)
65{ 67{
66 register ulong n; 68 register ulong n;
67 69
68 n = jiffies & 0xffff; 70 n = jiffies & 0xffff;
69 return n |= (++d->lasttag & 0x7fff) << 16; 71 return n |= (++t->lasttag & 0x7fff) << 16;
70} 72}
71 73
72static int 74static int
73aoehdr_atainit(struct aoedev *d, struct aoe_hdr *h) 75aoehdr_atainit(struct aoedev *d, struct aoetgt *t, struct aoe_hdr *h)
74{ 76{
75 u32 host_tag = newtag(d); 77 u32 host_tag = newtag(t);
76 78
77 memcpy(h->src, d->ifp->dev_addr, sizeof h->src); 79 memcpy(h->src, t->ifp->nd->dev_addr, sizeof h->src);
78 memcpy(h->dst, d->addr, sizeof h->dst); 80 memcpy(h->dst, t->addr, sizeof h->dst);
79 h->type = __constant_cpu_to_be16(ETH_P_AOE); 81 h->type = __constant_cpu_to_be16(ETH_P_AOE);
80 h->verfl = AOE_HVER; 82 h->verfl = AOE_HVER;
81 h->major = cpu_to_be16(d->aoemajor); 83 h->major = cpu_to_be16(d->aoemajor);
@@ -98,42 +100,162 @@ put_lba(struct aoe_atahdr *ah, sector_t lba)
98} 100}
99 101
100static void 102static void
101aoecmd_ata_rw(struct aoedev *d, struct frame *f) 103ifrotate(struct aoetgt *t)
104{
105 t->ifp++;
106 if (t->ifp >= &t->ifs[NAOEIFS] || t->ifp->nd == NULL)
107 t->ifp = t->ifs;
108 if (t->ifp->nd == NULL) {
109 printk(KERN_INFO "aoe: no interface to rotate to\n");
110 BUG();
111 }
112}
113
114static void
115skb_pool_put(struct aoedev *d, struct sk_buff *skb)
116{
117 if (!d->skbpool_hd)
118 d->skbpool_hd = skb;
119 else
120 d->skbpool_tl->next = skb;
121 d->skbpool_tl = skb;
122}
123
124static struct sk_buff *
125skb_pool_get(struct aoedev *d)
126{
127 struct sk_buff *skb;
128
129 skb = d->skbpool_hd;
130 if (skb && atomic_read(&skb_shinfo(skb)->dataref) == 1) {
131 d->skbpool_hd = skb->next;
132 skb->next = NULL;
133 return skb;
134 }
135 if (d->nskbpool < NSKBPOOLMAX
136 && (skb = new_skb(ETH_ZLEN))) {
137 d->nskbpool++;
138 return skb;
139 }
140 return NULL;
141}
142
143/* freeframe is where we do our load balancing so it's a little hairy. */
144static struct frame *
145freeframe(struct aoedev *d)
146{
147 struct frame *f, *e, *rf;
148 struct aoetgt **t;
149 struct sk_buff *skb;
150
151 if (d->targets[0] == NULL) { /* shouldn't happen, but I'm paranoid */
152 printk(KERN_ERR "aoe: NULL TARGETS!\n");
153 return NULL;
154 }
155 t = d->tgt;
156 t++;
157 if (t >= &d->targets[NTARGETS] || !*t)
158 t = d->targets;
159 for (;;) {
160 if ((*t)->nout < (*t)->maxout
161 && t != d->htgt
162 && (*t)->ifp->nd) {
163 rf = NULL;
164 f = (*t)->frames;
165 e = f + (*t)->nframes;
166 for (; f < e; f++) {
167 if (f->tag != FREETAG)
168 continue;
169 skb = f->skb;
170 if (!skb
171 && !(f->skb = skb = new_skb(ETH_ZLEN)))
172 continue;
173 if (atomic_read(&skb_shinfo(skb)->dataref)
174 != 1) {
175 if (!rf)
176 rf = f;
177 continue;
178 }
179gotone: skb_shinfo(skb)->nr_frags = skb->data_len = 0;
180 skb_trim(skb, 0);
181 d->tgt = t;
182 ifrotate(*t);
183 return f;
184 }
185 /* Work can be done, but the network layer is
186 holding our precious packets. Try to grab
187 one from the pool. */
188 f = rf;
189 if (f == NULL) { /* more paranoia */
190 printk(KERN_ERR
191 "aoe: freeframe: %s.\n",
192 "unexpected null rf");
193 d->flags |= DEVFL_KICKME;
194 return NULL;
195 }
196 skb = skb_pool_get(d);
197 if (skb) {
198 skb_pool_put(d, f->skb);
199 f->skb = skb;
200 goto gotone;
201 }
202 (*t)->dataref++;
203 if ((*t)->nout == 0)
204 d->flags |= DEVFL_KICKME;
205 }
206 if (t == d->tgt) /* we've looped and found nada */
207 break;
208 t++;
209 if (t >= &d->targets[NTARGETS] || !*t)
210 t = d->targets;
211 }
212 return NULL;
213}
214
215static int
216aoecmd_ata_rw(struct aoedev *d)
102{ 217{
218 struct frame *f;
103 struct aoe_hdr *h; 219 struct aoe_hdr *h;
104 struct aoe_atahdr *ah; 220 struct aoe_atahdr *ah;
105 struct buf *buf; 221 struct buf *buf;
222 struct bio_vec *bv;
223 struct aoetgt *t;
106 struct sk_buff *skb; 224 struct sk_buff *skb;
107 ulong bcnt; 225 ulong bcnt;
108 register sector_t sector;
109 char writebit, extbit; 226 char writebit, extbit;
110 227
111 writebit = 0x10; 228 writebit = 0x10;
112 extbit = 0x4; 229 extbit = 0x4;
113 230
231 f = freeframe(d);
232 if (f == NULL)
233 return 0;
234 t = *d->tgt;
114 buf = d->inprocess; 235 buf = d->inprocess;
115 236 bv = buf->bv;
116 sector = buf->sector; 237 bcnt = t->ifp->maxbcnt;
117 bcnt = buf->bv_resid; 238 if (bcnt == 0)
118 if (bcnt > d->maxbcnt) 239 bcnt = DEFAULTBCNT;
119 bcnt = d->maxbcnt; 240 if (bcnt > buf->bv_resid)
120 241 bcnt = buf->bv_resid;
121 /* initialize the headers & frame */ 242 /* initialize the headers & frame */
122 skb = f->skb; 243 skb = f->skb;
123 h = (struct aoe_hdr *) skb_mac_header(skb); 244 h = (struct aoe_hdr *) skb_mac_header(skb);
124 ah = (struct aoe_atahdr *) (h+1); 245 ah = (struct aoe_atahdr *) (h+1);
125 skb_put(skb, sizeof *h + sizeof *ah); 246 skb_put(skb, sizeof *h + sizeof *ah);
126 memset(h, 0, skb->len); 247 memset(h, 0, skb->len);
127 f->tag = aoehdr_atainit(d, h); 248 f->tag = aoehdr_atainit(d, t, h);
249 t->nout++;
128 f->waited = 0; 250 f->waited = 0;
129 f->buf = buf; 251 f->buf = buf;
130 f->bufaddr = buf->bufaddr; 252 f->bufaddr = page_address(bv->bv_page) + buf->bv_off;
131 f->bcnt = bcnt; 253 f->bcnt = bcnt;
132 f->lba = sector; 254 f->lba = buf->sector;
133 255
134 /* set up ata header */ 256 /* set up ata header */
135 ah->scnt = bcnt >> 9; 257 ah->scnt = bcnt >> 9;
136 put_lba(ah, sector); 258 put_lba(ah, buf->sector);
137 if (d->flags & DEVFL_EXT) { 259 if (d->flags & DEVFL_EXT) {
138 ah->aflags |= AOEAFL_EXT; 260 ah->aflags |= AOEAFL_EXT;
139 } else { 261 } else {
@@ -141,14 +263,14 @@ aoecmd_ata_rw(struct aoedev *d, struct frame *f)
141 ah->lba3 &= 0x0f; 263 ah->lba3 &= 0x0f;
142 ah->lba3 |= 0xe0; /* LBA bit + obsolete 0xa0 */ 264 ah->lba3 |= 0xe0; /* LBA bit + obsolete 0xa0 */
143 } 265 }
144
145 if (bio_data_dir(buf->bio) == WRITE) { 266 if (bio_data_dir(buf->bio) == WRITE) {
146 skb_fill_page_desc(skb, 0, virt_to_page(f->bufaddr), 267 skb_fill_page_desc(skb, 0, bv->bv_page, buf->bv_off, bcnt);
147 offset_in_page(f->bufaddr), bcnt);
148 ah->aflags |= AOEAFL_WRITE; 268 ah->aflags |= AOEAFL_WRITE;
149 skb->len += bcnt; 269 skb->len += bcnt;
150 skb->data_len = bcnt; 270 skb->data_len = bcnt;
271 t->wpkts++;
151 } else { 272 } else {
273 t->rpkts++;
152 writebit = 0; 274 writebit = 0;
153 } 275 }
154 276
@@ -156,29 +278,29 @@ aoecmd_ata_rw(struct aoedev *d, struct frame *f)
156 278
157 /* mark all tracking fields and load out */ 279 /* mark all tracking fields and load out */
158 buf->nframesout += 1; 280 buf->nframesout += 1;
159 buf->bufaddr += bcnt; 281 buf->bv_off += bcnt;
160 buf->bv_resid -= bcnt; 282 buf->bv_resid -= bcnt;
161/* printk(KERN_DEBUG "aoe: bv_resid=%ld\n", buf->bv_resid); */
162 buf->resid -= bcnt; 283 buf->resid -= bcnt;
163 buf->sector += bcnt >> 9; 284 buf->sector += bcnt >> 9;
164 if (buf->resid == 0) { 285 if (buf->resid == 0) {
165 d->inprocess = NULL; 286 d->inprocess = NULL;
166 } else if (buf->bv_resid == 0) { 287 } else if (buf->bv_resid == 0) {
167 buf->bv++; 288 buf->bv = ++bv;
168 WARN_ON(buf->bv->bv_len == 0); 289 buf->bv_resid = bv->bv_len;
169 buf->bv_resid = buf->bv->bv_len; 290 WARN_ON(buf->bv_resid == 0);
170 buf->bufaddr = page_address(buf->bv->bv_page) + buf->bv->bv_offset; 291 buf->bv_off = bv->bv_offset;
171 } 292 }
172 293
173 skb->dev = d->ifp; 294 skb->dev = t->ifp->nd;
174 skb = skb_clone(skb, GFP_ATOMIC); 295 skb = skb_clone(skb, GFP_ATOMIC);
175 if (skb == NULL) 296 if (skb) {
176 return; 297 if (d->sendq_hd)
177 if (d->sendq_hd) 298 d->sendq_tl->next = skb;
178 d->sendq_tl->next = skb; 299 else
179 else 300 d->sendq_hd = skb;
180 d->sendq_hd = skb; 301 d->sendq_tl = skb;
181 d->sendq_tl = skb; 302 }
303 return 1;
182} 304}
183 305
184/* some callers cannot sleep, and they can call this function, 306/* some callers cannot sleep, and they can call this function,
@@ -232,62 +354,8 @@ cont:
232 return sl; 354 return sl;
233} 355}
234 356
235static struct frame *
236freeframe(struct aoedev *d)
237{
238 struct frame *f, *e;
239 int n = 0;
240
241 f = d->frames;
242 e = f + d->nframes;
243 for (; f<e; f++) {
244 if (f->tag != FREETAG)
245 continue;
246 if (atomic_read(&skb_shinfo(f->skb)->dataref) == 1) {
247 skb_shinfo(f->skb)->nr_frags = f->skb->data_len = 0;
248 skb_trim(f->skb, 0);
249 return f;
250 }
251 n++;
252 }
253 if (n == d->nframes) /* wait for network layer */
254 d->flags |= DEVFL_KICKME;
255
256 return NULL;
257}
258
259/* enters with d->lock held */
260void
261aoecmd_work(struct aoedev *d)
262{
263 struct frame *f;
264 struct buf *buf;
265
266 if (d->flags & DEVFL_PAUSE) {
267 if (!aoedev_isbusy(d))
268 d->sendq_hd = aoecmd_cfg_pkts(d->aoemajor,
269 d->aoeminor, &d->sendq_tl);
270 return;
271 }
272
273loop:
274 f = freeframe(d);
275 if (f == NULL)
276 return;
277 if (d->inprocess == NULL) {
278 if (list_empty(&d->bufq))
279 return;
280 buf = container_of(d->bufq.next, struct buf, bufs);
281 list_del(d->bufq.next);
282/*printk(KERN_DEBUG "aoe: bi_size=%ld\n", buf->bio->bi_size); */
283 d->inprocess = buf;
284 }
285 aoecmd_ata_rw(d, f);
286 goto loop;
287}
288
289static void 357static void
290rexmit(struct aoedev *d, struct frame *f) 358resend(struct aoedev *d, struct aoetgt *t, struct frame *f)
291{ 359{
292 struct sk_buff *skb; 360 struct sk_buff *skb;
293 struct aoe_hdr *h; 361 struct aoe_hdr *h;
@@ -295,41 +363,46 @@ rexmit(struct aoedev *d, struct frame *f)
295 char buf[128]; 363 char buf[128];
296 u32 n; 364 u32 n;
297 365
298 n = newtag(d); 366 ifrotate(t);
367 n = newtag(t);
368 skb = f->skb;
369 h = (struct aoe_hdr *) skb_mac_header(skb);
370 ah = (struct aoe_atahdr *) (h+1);
299 371
300 snprintf(buf, sizeof buf, 372 snprintf(buf, sizeof buf,
301 "%15s e%ld.%ld oldtag=%08x@%08lx newtag=%08x\n", 373 "%15s e%ld.%d oldtag=%08x@%08lx newtag=%08x "
302 "retransmit", 374 "s=%012llx d=%012llx nout=%d\n",
303 d->aoemajor, d->aoeminor, f->tag, jiffies, n); 375 "retransmit", d->aoemajor, d->aoeminor, f->tag, jiffies, n,
376 mac_addr(h->src),
377 mac_addr(h->dst), t->nout);
304 aoechr_error(buf); 378 aoechr_error(buf);
305 379
306 skb = f->skb;
307 h = (struct aoe_hdr *) skb_mac_header(skb);
308 ah = (struct aoe_atahdr *) (h+1);
309 f->tag = n; 380 f->tag = n;
310 h->tag = cpu_to_be32(n); 381 h->tag = cpu_to_be32(n);
311 memcpy(h->dst, d->addr, sizeof h->dst); 382 memcpy(h->dst, t->addr, sizeof h->dst);
312 memcpy(h->src, d->ifp->dev_addr, sizeof h->src); 383 memcpy(h->src, t->ifp->nd->dev_addr, sizeof h->src);
313 384
314 n = DEFAULTBCNT / 512; 385 switch (ah->cmdstat) {
315 if (ah->scnt > n) { 386 default:
316 ah->scnt = n; 387 break;
388 case WIN_READ:
389 case WIN_READ_EXT:
390 case WIN_WRITE:
391 case WIN_WRITE_EXT:
392 put_lba(ah, f->lba);
393
394 n = f->bcnt;
395 if (n > DEFAULTBCNT)
396 n = DEFAULTBCNT;
397 ah->scnt = n >> 9;
317 if (ah->aflags & AOEAFL_WRITE) { 398 if (ah->aflags & AOEAFL_WRITE) {
318 skb_fill_page_desc(skb, 0, virt_to_page(f->bufaddr), 399 skb_fill_page_desc(skb, 0, virt_to_page(f->bufaddr),
319 offset_in_page(f->bufaddr), DEFAULTBCNT); 400 offset_in_page(f->bufaddr), n);
320 skb->len = sizeof *h + sizeof *ah + DEFAULTBCNT; 401 skb->len = sizeof *h + sizeof *ah + n;
321 skb->data_len = DEFAULTBCNT; 402 skb->data_len = n;
322 }
323 if (++d->lostjumbo > (d->nframes << 1))
324 if (d->maxbcnt != DEFAULTBCNT) {
325 printk(KERN_INFO "aoe: e%ld.%ld: too many lost jumbo on %s - using 1KB frames.\n",
326 d->aoemajor, d->aoeminor, d->ifp->name);
327 d->maxbcnt = DEFAULTBCNT;
328 d->flags |= DEVFL_MAXBCNT;
329 } 403 }
330 } 404 }
331 405 skb->dev = t->ifp->nd;
332 skb->dev = d->ifp;
333 skb = skb_clone(skb, GFP_ATOMIC); 406 skb = skb_clone(skb, GFP_ATOMIC);
334 if (skb == NULL) 407 if (skb == NULL)
335 return; 408 return;
@@ -352,10 +425,92 @@ tsince(int tag)
352 return n; 425 return n;
353} 426}
354 427
428static struct aoeif *
429getif(struct aoetgt *t, struct net_device *nd)
430{
431 struct aoeif *p, *e;
432
433 p = t->ifs;
434 e = p + NAOEIFS;
435 for (; p < e; p++)
436 if (p->nd == nd)
437 return p;
438 return NULL;
439}
440
441static struct aoeif *
442addif(struct aoetgt *t, struct net_device *nd)
443{
444 struct aoeif *p;
445
446 p = getif(t, NULL);
447 if (!p)
448 return NULL;
449 p->nd = nd;
450 p->maxbcnt = DEFAULTBCNT;
451 p->lost = 0;
452 p->lostjumbo = 0;
453 return p;
454}
455
456static void
457ejectif(struct aoetgt *t, struct aoeif *ifp)
458{
459 struct aoeif *e;
460 ulong n;
461
462 e = t->ifs + NAOEIFS - 1;
463 n = (e - ifp) * sizeof *ifp;
464 memmove(ifp, ifp+1, n);
465 e->nd = NULL;
466}
467
468static int
469sthtith(struct aoedev *d)
470{
471 struct frame *f, *e, *nf;
472 struct sk_buff *skb;
473 struct aoetgt *ht = *d->htgt;
474
475 f = ht->frames;
476 e = f + ht->nframes;
477 for (; f < e; f++) {
478 if (f->tag == FREETAG)
479 continue;
480 nf = freeframe(d);
481 if (!nf)
482 return 0;
483 skb = nf->skb;
484 *nf = *f;
485 f->skb = skb;
486 f->tag = FREETAG;
487 nf->waited = 0;
488 ht->nout--;
489 (*d->tgt)->nout++;
490 resend(d, *d->tgt, nf);
491 }
492 /* he's clean, he's useless. take away his interfaces */
493 memset(ht->ifs, 0, sizeof ht->ifs);
494 d->htgt = NULL;
495 return 1;
496}
497
498static inline unsigned char
499ata_scnt(unsigned char *packet) {
500 struct aoe_hdr *h;
501 struct aoe_atahdr *ah;
502
503 h = (struct aoe_hdr *) packet;
504 ah = (struct aoe_atahdr *) (h+1);
505 return ah->scnt;
506}
507
355static void 508static void
356rexmit_timer(ulong vp) 509rexmit_timer(ulong vp)
357{ 510{
358 struct aoedev *d; 511 struct aoedev *d;
512 struct aoetgt *t, **tt, **te;
513 struct aoeif *ifp;
359 struct frame *f, *e; 514 struct frame *f, *e;
360 struct sk_buff *sl; 515 struct sk_buff *sl;
361 register long timeout; 516 register long timeout;
@@ -374,31 +529,79 @@ rexmit_timer(ulong vp)
374 spin_unlock_irqrestore(&d->lock, flags); 529 spin_unlock_irqrestore(&d->lock, flags);
375 return; 530 return;
376 } 531 }
377 f = d->frames; 532 tt = d->targets;
378 e = f + d->nframes; 533 te = tt + NTARGETS;
379 for (; f<e; f++) { 534 for (; tt < te && *tt; tt++) {
380 if (f->tag != FREETAG && tsince(f->tag) >= timeout) { 535 t = *tt;
536 f = t->frames;
537 e = f + t->nframes;
538 for (; f < e; f++) {
539 if (f->tag == FREETAG
540 || tsince(f->tag) < timeout)
541 continue;
381 n = f->waited += timeout; 542 n = f->waited += timeout;
382 n /= HZ; 543 n /= HZ;
383 if (n > aoe_deadsecs) { /* waited too long for response */ 544 if (n > aoe_deadsecs) {
545 /* waited too long. device failure. */
384 aoedev_downdev(d); 546 aoedev_downdev(d);
385 break; 547 break;
386 } 548 }
387 rexmit(d, f); 549
550 if (n > HELPWAIT /* see if another target can help */
551 && (tt != d->targets || d->targets[1]))
552 d->htgt = tt;
553
554 if (t->nout == t->maxout) {
555 if (t->maxout > 1)
556 t->maxout--;
557 t->lastwadj = jiffies;
558 }
559
560 ifp = getif(t, f->skb->dev);
561 if (ifp && ++ifp->lost > (t->nframes << 1)
562 && (ifp != t->ifs || t->ifs[1].nd)) {
563 ejectif(t, ifp);
564 ifp = NULL;
565 }
566
567 if (ata_scnt(skb_mac_header(f->skb)) > DEFAULTBCNT / 512
568 && ifp && ++ifp->lostjumbo > (t->nframes << 1)
569 && ifp->maxbcnt != DEFAULTBCNT) {
570 printk(KERN_INFO
571 "aoe: e%ld.%d: "
572 "too many lost jumbo on "
573 "%s:%012llx - "
574 "falling back to %d frames.\n",
575 d->aoemajor, d->aoeminor,
576 ifp->nd->name, mac_addr(t->addr),
577 DEFAULTBCNT);
578 ifp->maxbcnt = 0;
579 }
580 resend(d, t, f);
581 }
582
583 /* window check */
584 if (t->nout == t->maxout
585 && t->maxout < t->nframes
586 && (jiffies - t->lastwadj)/HZ > 10) {
587 t->maxout++;
588 t->lastwadj = jiffies;
388 } 589 }
389 } 590 }
390 if (d->flags & DEVFL_KICKME) { 591
592 if (d->sendq_hd) {
593 n = d->rttavg <<= 1;
594 if (n > MAXTIMER)
595 d->rttavg = MAXTIMER;
596 }
597
598 if (d->flags & DEVFL_KICKME || d->htgt) {
391 d->flags &= ~DEVFL_KICKME; 599 d->flags &= ~DEVFL_KICKME;
392 aoecmd_work(d); 600 aoecmd_work(d);
393 } 601 }
394 602
395 sl = d->sendq_hd; 603 sl = d->sendq_hd;
396 d->sendq_hd = d->sendq_tl = NULL; 604 d->sendq_hd = d->sendq_tl = NULL;
397 if (sl) {
398 n = d->rttavg <<= 1;
399 if (n > MAXTIMER)
400 d->rttavg = MAXTIMER;
401 }
402 605
403 d->timer.expires = jiffies + TIMERTICK; 606 d->timer.expires = jiffies + TIMERTICK;
404 add_timer(&d->timer); 607 add_timer(&d->timer);
@@ -408,6 +611,25 @@ rexmit_timer(ulong vp)
408 aoenet_xmit(sl); 611 aoenet_xmit(sl);
409} 612}
410 613
614/* enters with d->lock held */
615void
616aoecmd_work(struct aoedev *d)
617{
618 struct buf *buf;
619loop:
620 if (d->htgt && !sthtith(d))
621 return;
622 if (d->inprocess == NULL) {
623 if (list_empty(&d->bufq))
624 return;
625 buf = container_of(d->bufq.next, struct buf, bufs);
626 list_del(d->bufq.next);
627 d->inprocess = buf;
628 }
629 if (aoecmd_ata_rw(d))
630 goto loop;
631}
632
411/* this function performs work that has been deferred until sleeping is OK 633/* this function performs work that has been deferred until sleeping is OK
412 */ 634 */
413void 635void
@@ -440,7 +662,7 @@ aoecmd_sleepwork(struct work_struct *work)
440} 662}
441 663
442static void 664static void
443ataid_complete(struct aoedev *d, unsigned char *id) 665ataid_complete(struct aoedev *d, struct aoetgt *t, unsigned char *id)
444{ 666{
445 u64 ssize; 667 u64 ssize;
446 u16 n; 668 u16 n;
@@ -475,24 +697,20 @@ ataid_complete(struct aoedev *d, unsigned char *id)
475 } 697 }
476 698
477 if (d->ssize != ssize) 699 if (d->ssize != ssize)
478 printk(KERN_INFO "aoe: %012llx e%lu.%lu v%04x has %llu sectors\n", 700 printk(KERN_INFO
479 (unsigned long long)mac_addr(d->addr), 701 "aoe: %012llx e%ld.%d v%04x has %llu sectors\n",
702 mac_addr(t->addr),
480 d->aoemajor, d->aoeminor, 703 d->aoemajor, d->aoeminor,
481 d->fw_ver, (long long)ssize); 704 d->fw_ver, (long long)ssize);
482 d->ssize = ssize; 705 d->ssize = ssize;
483 d->geo.start = 0; 706 d->geo.start = 0;
707 if (d->flags & (DEVFL_GDALLOC|DEVFL_NEWSIZE))
708 return;
484 if (d->gd != NULL) { 709 if (d->gd != NULL) {
485 d->gd->capacity = ssize; 710 d->gd->capacity = ssize;
486 d->flags |= DEVFL_NEWSIZE; 711 d->flags |= DEVFL_NEWSIZE;
487 } else { 712 } else
488 if (d->flags & DEVFL_GDALLOC) {
489 printk(KERN_ERR "aoe: can't schedule work for e%lu.%lu, %s\n",
490 d->aoemajor, d->aoeminor,
491 "it's already on! This shouldn't happen.\n");
492 return;
493 }
494 d->flags |= DEVFL_GDALLOC; 713 d->flags |= DEVFL_GDALLOC;
495 }
496 schedule_work(&d->work); 714 schedule_work(&d->work);
497} 715}
498 716
@@ -519,6 +737,31 @@ calc_rttavg(struct aoedev *d, int rtt)
519 d->rttavg += n >> 2; 737 d->rttavg += n >> 2;
520} 738}
521 739
740static struct aoetgt *
741gettgt(struct aoedev *d, char *addr)
742{
743 struct aoetgt **t, **e;
744
745 t = d->targets;
746 e = t + NTARGETS;
747 for (; t < e && *t; t++)
748 if (memcmp((*t)->addr, addr, sizeof((*t)->addr)) == 0)
749 return *t;
750 return NULL;
751}
752
753static inline void
754diskstats(struct gendisk *disk, struct bio *bio, ulong duration, sector_t sector)
755{
756 unsigned long n_sect = bio->bi_size >> 9;
757 const int rw = bio_data_dir(bio);
758
759 all_stat_inc(disk, ios[rw], sector);
760 all_stat_add(disk, ticks[rw], duration, sector);
761 all_stat_add(disk, sectors[rw], n_sect, sector);
762 all_stat_add(disk, io_ticks, duration, sector);
763}
764
522void 765void
523aoecmd_ata_rsp(struct sk_buff *skb) 766aoecmd_ata_rsp(struct sk_buff *skb)
524{ 767{
@@ -528,6 +771,8 @@ aoecmd_ata_rsp(struct sk_buff *skb)
528 struct frame *f; 771 struct frame *f;
529 struct buf *buf; 772 struct buf *buf;
530 struct sk_buff *sl; 773 struct sk_buff *sl;
774 struct aoetgt *t;
775 struct aoeif *ifp;
531 register long n; 776 register long n;
532 ulong flags; 777 ulong flags;
533 char ebuf[128]; 778 char ebuf[128];
@@ -547,7 +792,14 @@ aoecmd_ata_rsp(struct sk_buff *skb)
547 spin_lock_irqsave(&d->lock, flags); 792 spin_lock_irqsave(&d->lock, flags);
548 793
549 n = be32_to_cpu(get_unaligned(&hin->tag)); 794 n = be32_to_cpu(get_unaligned(&hin->tag));
550 f = getframe(d, n); 795 t = gettgt(d, hin->src);
796 if (t == NULL) {
797 printk(KERN_INFO "aoe: can't find target e%ld.%d:%012llx\n",
798 d->aoemajor, d->aoeminor, mac_addr(hin->src));
799 spin_unlock_irqrestore(&d->lock, flags);
800 return;
801 }
802 f = getframe(t, n);
551 if (f == NULL) { 803 if (f == NULL) {
552 calc_rttavg(d, -tsince(n)); 804 calc_rttavg(d, -tsince(n));
553 spin_unlock_irqrestore(&d->lock, flags); 805 spin_unlock_irqrestore(&d->lock, flags);
@@ -569,24 +821,24 @@ aoecmd_ata_rsp(struct sk_buff *skb)
569 ahout = (struct aoe_atahdr *) (hout+1); 821 ahout = (struct aoe_atahdr *) (hout+1);
570 buf = f->buf; 822 buf = f->buf;
571 823
572 if (ahout->cmdstat == WIN_IDENTIFY)
573 d->flags &= ~DEVFL_PAUSE;
574 if (ahin->cmdstat & 0xa9) { /* these bits cleared on success */ 824 if (ahin->cmdstat & 0xa9) { /* these bits cleared on success */
575 printk(KERN_ERR 825 printk(KERN_ERR
576 "aoe: ata error cmd=%2.2Xh stat=%2.2Xh from e%ld.%ld\n", 826 "aoe: ata error cmd=%2.2Xh stat=%2.2Xh from e%ld.%d\n",
577 ahout->cmdstat, ahin->cmdstat, 827 ahout->cmdstat, ahin->cmdstat,
578 d->aoemajor, d->aoeminor); 828 d->aoemajor, d->aoeminor);
579 if (buf) 829 if (buf)
580 buf->flags |= BUFFL_FAIL; 830 buf->flags |= BUFFL_FAIL;
581 } else { 831 } else {
832 if (d->htgt && t == *d->htgt) /* I'll help myself, thank you. */
833 d->htgt = NULL;
582 n = ahout->scnt << 9; 834 n = ahout->scnt << 9;
583 switch (ahout->cmdstat) { 835 switch (ahout->cmdstat) {
584 case WIN_READ: 836 case WIN_READ:
585 case WIN_READ_EXT: 837 case WIN_READ_EXT:
586 if (skb->len - sizeof *hin - sizeof *ahin < n) { 838 if (skb->len - sizeof *hin - sizeof *ahin < n) {
587 printk(KERN_ERR 839 printk(KERN_ERR
588 "aoe: runt data size in read. skb->len=%d\n", 840 "aoe: %s. skb->len=%d need=%ld\n",
589 skb->len); 841 "runt data size in read", skb->len, n);
590 /* fail frame f? just returning will rexmit. */ 842 /* fail frame f? just returning will rexmit. */
591 spin_unlock_irqrestore(&d->lock, flags); 843 spin_unlock_irqrestore(&d->lock, flags);
592 return; 844 return;
@@ -594,32 +846,18 @@ aoecmd_ata_rsp(struct sk_buff *skb)
594 memcpy(f->bufaddr, ahin+1, n); 846 memcpy(f->bufaddr, ahin+1, n);
595 case WIN_WRITE: 847 case WIN_WRITE:
596 case WIN_WRITE_EXT: 848 case WIN_WRITE_EXT:
849 ifp = getif(t, skb->dev);
850 if (ifp) {
851 ifp->lost = 0;
852 if (n > DEFAULTBCNT)
853 ifp->lostjumbo = 0;
854 }
597 if (f->bcnt -= n) { 855 if (f->bcnt -= n) {
598 skb = f->skb; 856 f->lba += n >> 9;
599 f->bufaddr += n; 857 f->bufaddr += n;
600 put_lba(ahout, f->lba += ahout->scnt); 858 resend(d, t, f);
601 n = f->bcnt; 859 goto xmit;
602 if (n > DEFAULTBCNT)
603 n = DEFAULTBCNT;
604 ahout->scnt = n >> 9;
605 if (ahout->aflags & AOEAFL_WRITE) {
606 skb_fill_page_desc(skb, 0,
607 virt_to_page(f->bufaddr),
608 offset_in_page(f->bufaddr), n);
609 skb->len = sizeof *hout + sizeof *ahout + n;
610 skb->data_len = n;
611 }
612 f->tag = newtag(d);
613 hout->tag = cpu_to_be32(f->tag);
614 skb->dev = d->ifp;
615 skb = skb_clone(skb, GFP_ATOMIC);
616 spin_unlock_irqrestore(&d->lock, flags);
617 if (skb)
618 aoenet_xmit(skb);
619 return;
620 } 860 }
621 if (n > DEFAULTBCNT)
622 d->lostjumbo = 0;
623 break; 861 break;
624 case WIN_IDENTIFY: 862 case WIN_IDENTIFY:
625 if (skb->len - sizeof *hin - sizeof *ahin < 512) { 863 if (skb->len - sizeof *hin - sizeof *ahin < 512) {
@@ -629,7 +867,7 @@ aoecmd_ata_rsp(struct sk_buff *skb)
629 spin_unlock_irqrestore(&d->lock, flags); 867 spin_unlock_irqrestore(&d->lock, flags);
630 return; 868 return;
631 } 869 }
632 ataid_complete(d, (char *) (ahin+1)); 870 ataid_complete(d, t, (char *) (ahin+1));
633 break; 871 break;
634 default: 872 default:
635 printk(KERN_INFO 873 printk(KERN_INFO
@@ -640,28 +878,19 @@ aoecmd_ata_rsp(struct sk_buff *skb)
640 } 878 }
641 } 879 }
642 880
643 if (buf) { 881 if (buf && --buf->nframesout == 0 && buf->resid == 0) {
644 buf->nframesout -= 1; 882 diskstats(d->gd, buf->bio, jiffies - buf->stime, buf->sector);
645 if (buf->nframesout == 0 && buf->resid == 0) { 883 n = (buf->flags & BUFFL_FAIL) ? -EIO : 0;
646 unsigned long duration = jiffies - buf->start_time; 884 bio_endio(buf->bio, n);
647 unsigned long n_sect = buf->bio->bi_size >> 9; 885 mempool_free(buf, d->bufpool);
648 struct gendisk *disk = d->gd;
649 const int rw = bio_data_dir(buf->bio);
650
651 disk_stat_inc(disk, ios[rw]);
652 disk_stat_add(disk, ticks[rw], duration);
653 disk_stat_add(disk, sectors[rw], n_sect);
654 disk_stat_add(disk, io_ticks, duration);
655 n = (buf->flags & BUFFL_FAIL) ? -EIO : 0;
656 bio_endio(buf->bio, n);
657 mempool_free(buf, d->bufpool);
658 }
659 } 886 }
660 887
661 f->buf = NULL; 888 f->buf = NULL;
662 f->tag = FREETAG; 889 f->tag = FREETAG;
890 t->nout--;
663 891
664 aoecmd_work(d); 892 aoecmd_work(d);
893xmit:
665 sl = d->sendq_hd; 894 sl = d->sendq_hd;
666 d->sendq_hd = d->sendq_tl = NULL; 895 d->sendq_hd = d->sendq_tl = NULL;
667 896
@@ -679,23 +908,20 @@ aoecmd_cfg(ushort aoemajor, unsigned char aoeminor)
679 aoenet_xmit(sl); 908 aoenet_xmit(sl);
680} 909}
681 910
682/* 911struct sk_buff *
683 * Since we only call this in one place (and it only prepares one frame)
684 * we just return the skb. Usually we'd chain it up to the aoedev sendq.
685 */
686static struct sk_buff *
687aoecmd_ata_id(struct aoedev *d) 912aoecmd_ata_id(struct aoedev *d)
688{ 913{
689 struct aoe_hdr *h; 914 struct aoe_hdr *h;
690 struct aoe_atahdr *ah; 915 struct aoe_atahdr *ah;
691 struct frame *f; 916 struct frame *f;
692 struct sk_buff *skb; 917 struct sk_buff *skb;
918 struct aoetgt *t;
693 919
694 f = freeframe(d); 920 f = freeframe(d);
695 if (f == NULL) { 921 if (f == NULL)
696 printk(KERN_ERR "aoe: can't get a frame. This shouldn't happen.\n");
697 return NULL; 922 return NULL;
698 } 923
924 t = *d->tgt;
699 925
700 /* initialize the headers & frame */ 926 /* initialize the headers & frame */
701 skb = f->skb; 927 skb = f->skb;
@@ -703,7 +929,8 @@ aoecmd_ata_id(struct aoedev *d)
703 ah = (struct aoe_atahdr *) (h+1); 929 ah = (struct aoe_atahdr *) (h+1);
704 skb_put(skb, sizeof *h + sizeof *ah); 930 skb_put(skb, sizeof *h + sizeof *ah);
705 memset(h, 0, skb->len); 931 memset(h, 0, skb->len);
706 f->tag = aoehdr_atainit(d, h); 932 f->tag = aoehdr_atainit(d, t, h);
933 t->nout++;
707 f->waited = 0; 934 f->waited = 0;
708 935
709 /* set up ata header */ 936 /* set up ata header */
@@ -711,7 +938,7 @@ aoecmd_ata_id(struct aoedev *d)
711 ah->cmdstat = WIN_IDENTIFY; 938 ah->cmdstat = WIN_IDENTIFY;
712 ah->lba3 = 0xa0; 939 ah->lba3 = 0xa0;
713 940
714 skb->dev = d->ifp; 941 skb->dev = t->ifp->nd;
715 942
716 d->rttavg = MAXTIMER; 943 d->rttavg = MAXTIMER;
717 d->timer.function = rexmit_timer; 944 d->timer.function = rexmit_timer;
@@ -719,15 +946,52 @@ aoecmd_ata_id(struct aoedev *d)
719 return skb_clone(skb, GFP_ATOMIC); 946 return skb_clone(skb, GFP_ATOMIC);
720} 947}
721 948
949static struct aoetgt *
950addtgt(struct aoedev *d, char *addr, ulong nframes)
951{
952 struct aoetgt *t, **tt, **te;
953 struct frame *f, *e;
954
955 tt = d->targets;
956 te = tt + NTARGETS;
957 for (; tt < te && *tt; tt++)
958 ;
959
960 if (tt == te) {
961 printk(KERN_INFO
962 "aoe: device addtgt failure; too many targets\n");
963 return NULL;
964 }
965 t = kcalloc(1, sizeof *t, GFP_ATOMIC);
966 f = kcalloc(nframes, sizeof *f, GFP_ATOMIC);
967 if (!t || !f) {
968 kfree(f);
969 kfree(t);
970 printk(KERN_INFO "aoe: cannot allocate memory to add target\n");
971 return NULL;
972 }
973
974 t->nframes = nframes;
975 t->frames = f;
976 e = f + nframes;
977 for (; f < e; f++)
978 f->tag = FREETAG;
979 memcpy(t->addr, addr, sizeof t->addr);
980 t->ifp = t->ifs;
981 t->maxout = t->nframes;
982 return *tt = t;
983}
984
722void 985void
723aoecmd_cfg_rsp(struct sk_buff *skb) 986aoecmd_cfg_rsp(struct sk_buff *skb)
724{ 987{
725 struct aoedev *d; 988 struct aoedev *d;
726 struct aoe_hdr *h; 989 struct aoe_hdr *h;
727 struct aoe_cfghdr *ch; 990 struct aoe_cfghdr *ch;
991 struct aoetgt *t;
992 struct aoeif *ifp;
728 ulong flags, sysminor, aoemajor; 993 ulong flags, sysminor, aoemajor;
729 struct sk_buff *sl; 994 struct sk_buff *sl;
730 enum { MAXFRAMES = 16 };
731 u16 n; 995 u16 n;
732 996
733 h = (struct aoe_hdr *) skb_mac_header(skb); 997 h = (struct aoe_hdr *) skb_mac_header(skb);
@@ -752,10 +1016,10 @@ aoecmd_cfg_rsp(struct sk_buff *skb)
752 } 1016 }
753 1017
754 n = be16_to_cpu(ch->bufcnt); 1018 n = be16_to_cpu(ch->bufcnt);
755 if (n > MAXFRAMES) /* keep it reasonable */ 1019 if (n > aoe_maxout) /* keep it reasonable */
756 n = MAXFRAMES; 1020 n = aoe_maxout;
757 1021
758 d = aoedev_by_sysminor_m(sysminor, n); 1022 d = aoedev_by_sysminor_m(sysminor);
759 if (d == NULL) { 1023 if (d == NULL) {
760 printk(KERN_INFO "aoe: device sysminor_m failure\n"); 1024 printk(KERN_INFO "aoe: device sysminor_m failure\n");
761 return; 1025 return;
@@ -763,38 +1027,74 @@ aoecmd_cfg_rsp(struct sk_buff *skb)
763 1027
764 spin_lock_irqsave(&d->lock, flags); 1028 spin_lock_irqsave(&d->lock, flags);
765 1029
766 /* permit device to migrate mac and network interface */ 1030 t = gettgt(d, h->src);
767 d->ifp = skb->dev; 1031 if (!t) {
768 memcpy(d->addr, h->src, sizeof d->addr); 1032 t = addtgt(d, h->src, n);
769 if (!(d->flags & DEVFL_MAXBCNT)) { 1033 if (!t) {
770 n = d->ifp->mtu; 1034 spin_unlock_irqrestore(&d->lock, flags);
1035 return;
1036 }
1037 }
1038 ifp = getif(t, skb->dev);
1039 if (!ifp) {
1040 ifp = addif(t, skb->dev);
1041 if (!ifp) {
1042 printk(KERN_INFO
1043 "aoe: device addif failure; "
1044 "too many interfaces?\n");
1045 spin_unlock_irqrestore(&d->lock, flags);
1046 return;
1047 }
1048 }
1049 if (ifp->maxbcnt) {
1050 n = ifp->nd->mtu;
771 n -= sizeof (struct aoe_hdr) + sizeof (struct aoe_atahdr); 1051 n -= sizeof (struct aoe_hdr) + sizeof (struct aoe_atahdr);
772 n /= 512; 1052 n /= 512;
773 if (n > ch->scnt) 1053 if (n > ch->scnt)
774 n = ch->scnt; 1054 n = ch->scnt;
775 n = n ? n * 512 : DEFAULTBCNT; 1055 n = n ? n * 512 : DEFAULTBCNT;
776 if (n != d->maxbcnt) { 1056 if (n != ifp->maxbcnt) {
777 printk(KERN_INFO 1057 printk(KERN_INFO
778 "aoe: e%ld.%ld: setting %d byte data frames on %s\n", 1058 "aoe: e%ld.%d: setting %d%s%s:%012llx\n",
779 d->aoemajor, d->aoeminor, n, d->ifp->name); 1059 d->aoemajor, d->aoeminor, n,
780 d->maxbcnt = n; 1060 " byte data frames on ", ifp->nd->name,
1061 mac_addr(t->addr));
1062 ifp->maxbcnt = n;
781 } 1063 }
782 } 1064 }
783 1065
784 /* don't change users' perspective */ 1066 /* don't change users' perspective */
785 if (d->nopen && !(d->flags & DEVFL_PAUSE)) { 1067 if (d->nopen) {
786 spin_unlock_irqrestore(&d->lock, flags); 1068 spin_unlock_irqrestore(&d->lock, flags);
787 return; 1069 return;
788 } 1070 }
789 d->flags |= DEVFL_PAUSE; /* force pause */
790 d->mintimer = MINTIMER;
791 d->fw_ver = be16_to_cpu(ch->fwver); 1071 d->fw_ver = be16_to_cpu(ch->fwver);
792 1072
793 /* check for already outstanding ataid */ 1073 sl = aoecmd_ata_id(d);
794 sl = aoedev_isbusy(d) == 0 ? aoecmd_ata_id(d) : NULL;
795 1074
796 spin_unlock_irqrestore(&d->lock, flags); 1075 spin_unlock_irqrestore(&d->lock, flags);
797 1076
798 aoenet_xmit(sl); 1077 aoenet_xmit(sl);
799} 1078}
800 1079
1080void
1081aoecmd_cleanslate(struct aoedev *d)
1082{
1083 struct aoetgt **t, **te;
1084 struct aoeif *p, *e;
1085
1086 d->mintimer = MINTIMER;
1087
1088 t = d->targets;
1089 te = t + NTARGETS;
1090 for (; t < te && *t; t++) {
1091 (*t)->maxout = (*t)->nframes;
1092 p = (*t)->ifs;
1093 e = p + NAOEIFS;
1094 for (; p < e; p++) {
1095 p->lostjumbo = 0;
1096 p->lost = 0;
1097 p->maxbcnt = DEFAULTBCNT;
1098 }
1099 }
1100}
diff --git a/drivers/block/aoe/aoedev.c b/drivers/block/aoe/aoedev.c
index 51f50710e5fc..f9a1cd9edb77 100644
--- a/drivers/block/aoe/aoedev.c
+++ b/drivers/block/aoe/aoedev.c
@@ -1,4 +1,4 @@
1/* Copyright (c) 2006 Coraid, Inc. See COPYING for GPL terms. */ 1/* Copyright (c) 2007 Coraid, Inc. See COPYING for GPL terms. */
2/* 2/*
3 * aoedev.c 3 * aoedev.c
4 * AoE device utility functions; maintains device list. 4 * AoE device utility functions; maintains device list.
@@ -7,23 +7,32 @@
7#include <linux/hdreg.h> 7#include <linux/hdreg.h>
8#include <linux/blkdev.h> 8#include <linux/blkdev.h>
9#include <linux/netdevice.h> 9#include <linux/netdevice.h>
10#include <linux/delay.h>
10#include "aoe.h" 11#include "aoe.h"
11 12
13static void dummy_timer(ulong);
14static void aoedev_freedev(struct aoedev *);
15static void freetgt(struct aoedev *d, struct aoetgt *t);
16static void skbpoolfree(struct aoedev *d);
17
12static struct aoedev *devlist; 18static struct aoedev *devlist;
13static spinlock_t devlist_lock; 19static DEFINE_SPINLOCK(devlist_lock);
14 20
15int 21int
16aoedev_isbusy(struct aoedev *d) 22aoedev_isbusy(struct aoedev *d)
17{ 23{
24 struct aoetgt **t, **te;
18 struct frame *f, *e; 25 struct frame *f, *e;
19 26
20 f = d->frames; 27 t = d->targets;
21 e = f + d->nframes; 28 te = t + NTARGETS;
22 do { 29 for (; t < te && *t; t++) {
23 if (f->tag != FREETAG) 30 f = (*t)->frames;
24 return 1; 31 e = f + (*t)->nframes;
25 } while (++f < e); 32 for (; f < e; f++)
26 33 if (f->tag != FREETAG)
34 return 1;
35 }
27 return 0; 36 return 0;
28} 37}
29 38
@@ -55,75 +64,41 @@ dummy_timer(ulong vp)
55 add_timer(&d->timer); 64 add_timer(&d->timer);
56} 65}
57 66
58/* called with devlist lock held */
59static struct aoedev *
60aoedev_newdev(ulong nframes)
61{
62 struct aoedev *d;
63 struct frame *f, *e;
64
65 d = kzalloc(sizeof *d, GFP_ATOMIC);
66 f = kcalloc(nframes, sizeof *f, GFP_ATOMIC);
67 switch (!d || !f) {
68 case 0:
69 d->nframes = nframes;
70 d->frames = f;
71 e = f + nframes;
72 for (; f<e; f++) {
73 f->tag = FREETAG;
74 f->skb = new_skb(ETH_ZLEN);
75 if (!f->skb)
76 break;
77 }
78 if (f == e)
79 break;
80 while (f > d->frames) {
81 f--;
82 dev_kfree_skb(f->skb);
83 }
84 default:
85 if (f)
86 kfree(f);
87 if (d)
88 kfree(d);
89 return NULL;
90 }
91 INIT_WORK(&d->work, aoecmd_sleepwork);
92 spin_lock_init(&d->lock);
93 init_timer(&d->timer);
94 d->timer.data = (ulong) d;
95 d->timer.function = dummy_timer;
96 d->timer.expires = jiffies + HZ;
97 add_timer(&d->timer);
98 d->bufpool = NULL; /* defer to aoeblk_gdalloc */
99 INIT_LIST_HEAD(&d->bufq);
100 d->next = devlist;
101 devlist = d;
102
103 return d;
104}
105
106void 67void
107aoedev_downdev(struct aoedev *d) 68aoedev_downdev(struct aoedev *d)
108{ 69{
70 struct aoetgt **t, **te;
109 struct frame *f, *e; 71 struct frame *f, *e;
110 struct buf *buf; 72 struct buf *buf;
111 struct bio *bio; 73 struct bio *bio;
112 74
113 f = d->frames; 75 t = d->targets;
114 e = f + d->nframes; 76 te = t + NTARGETS;
115 for (; f<e; f->tag = FREETAG, f->buf = NULL, f++) { 77 for (; t < te && *t; t++) {
116 if (f->tag == FREETAG || f->buf == NULL) 78 f = (*t)->frames;
117 continue; 79 e = f + (*t)->nframes;
118 buf = f->buf; 80 for (; f < e; f->tag = FREETAG, f->buf = NULL, f++) {
119 bio = buf->bio; 81 if (f->tag == FREETAG || f->buf == NULL)
120 if (--buf->nframesout == 0) { 82 continue;
121 mempool_free(buf, d->bufpool); 83 buf = f->buf;
122 bio_endio(bio, -EIO); 84 bio = buf->bio;
85 if (--buf->nframesout == 0
86 && buf != d->inprocess) {
87 mempool_free(buf, d->bufpool);
88 bio_endio(bio, -EIO);
89 }
123 } 90 }
124 skb_shinfo(f->skb)->nr_frags = f->skb->data_len = 0; 91 (*t)->maxout = (*t)->nframes;
92 (*t)->nout = 0;
93 }
94 buf = d->inprocess;
95 if (buf) {
96 bio = buf->bio;
97 mempool_free(buf, d->bufpool);
98 bio_endio(bio, -EIO);
125 } 99 }
126 d->inprocess = NULL; 100 d->inprocess = NULL;
101 d->htgt = NULL;
127 102
128 while (!list_empty(&d->bufq)) { 103 while (!list_empty(&d->bufq)) {
129 buf = container_of(d->bufq.next, struct buf, bufs); 104 buf = container_of(d->bufq.next, struct buf, bufs);
@@ -136,12 +111,114 @@ aoedev_downdev(struct aoedev *d)
136 if (d->gd) 111 if (d->gd)
137 d->gd->capacity = 0; 112 d->gd->capacity = 0;
138 113
139 d->flags &= ~(DEVFL_UP | DEVFL_PAUSE); 114 d->flags &= ~DEVFL_UP;
115}
116
117static void
118aoedev_freedev(struct aoedev *d)
119{
120 struct aoetgt **t, **e;
121
122 if (d->gd) {
123 aoedisk_rm_sysfs(d);
124 del_gendisk(d->gd);
125 put_disk(d->gd);
126 }
127 t = d->targets;
128 e = t + NTARGETS;
129 for (; t < e && *t; t++)
130 freetgt(d, *t);
131 if (d->bufpool)
132 mempool_destroy(d->bufpool);
133 skbpoolfree(d);
134 kfree(d);
135}
136
137int
138aoedev_flush(const char __user *str, size_t cnt)
139{
140 ulong flags;
141 struct aoedev *d, **dd;
142 struct aoedev *rmd = NULL;
143 char buf[16];
144 int all = 0;
145
146 if (cnt >= 3) {
147 if (cnt > sizeof buf)
148 cnt = sizeof buf;
149 if (copy_from_user(buf, str, cnt))
150 return -EFAULT;
151 all = !strncmp(buf, "all", 3);
152 }
153
154 flush_scheduled_work();
155 spin_lock_irqsave(&devlist_lock, flags);
156 dd = &devlist;
157 while ((d = *dd)) {
158 spin_lock(&d->lock);
159 if ((!all && (d->flags & DEVFL_UP))
160 || (d->flags & (DEVFL_GDALLOC|DEVFL_NEWSIZE))
161 || d->nopen) {
162 spin_unlock(&d->lock);
163 dd = &d->next;
164 continue;
165 }
166 *dd = d->next;
167 aoedev_downdev(d);
168 d->flags |= DEVFL_TKILL;
169 spin_unlock(&d->lock);
170 d->next = rmd;
171 rmd = d;
172 }
173 spin_unlock_irqrestore(&devlist_lock, flags);
174 while ((d = rmd)) {
175 rmd = d->next;
176 del_timer_sync(&d->timer);
177 aoedev_freedev(d); /* must be able to sleep */
178 }
179 return 0;
180}
181
182/* I'm not really sure that this is a realistic problem, but if the
183network driver goes gonzo let's just leak memory after complaining. */
184static void
185skbfree(struct sk_buff *skb)
186{
187 enum { Sms = 100, Tms = 3*1000};
188 int i = Tms / Sms;
189
190 if (skb == NULL)
191 return;
192 while (atomic_read(&skb_shinfo(skb)->dataref) != 1 && i-- > 0)
193 msleep(Sms);
194 if (i <= 0) {
195 printk(KERN_ERR
196 "aoe: %s holds ref: %s\n",
197 skb->dev ? skb->dev->name : "netif",
198 "cannot free skb -- memory leaked.");
199 return;
200 }
201 skb_shinfo(skb)->nr_frags = skb->data_len = 0;
202 skb_trim(skb, 0);
203 dev_kfree_skb(skb);
204}
205
206static void
207skbpoolfree(struct aoedev *d)
208{
209 struct sk_buff *skb;
210
211 while ((skb = d->skbpool_hd)) {
212 d->skbpool_hd = skb->next;
213 skb->next = NULL;
214 skbfree(skb);
215 }
216 d->skbpool_tl = NULL;
140} 217}
141 218
142/* find it or malloc it */ 219/* find it or malloc it */
143struct aoedev * 220struct aoedev *
144aoedev_by_sysminor_m(ulong sysminor, ulong bufcnt) 221aoedev_by_sysminor_m(ulong sysminor)
145{ 222{
146 struct aoedev *d; 223 struct aoedev *d;
147 ulong flags; 224 ulong flags;
@@ -151,43 +228,43 @@ aoedev_by_sysminor_m(ulong sysminor, ulong bufcnt)
151 for (d=devlist; d; d=d->next) 228 for (d=devlist; d; d=d->next)
152 if (d->sysminor == sysminor) 229 if (d->sysminor == sysminor)
153 break; 230 break;
154 231 if (d)
155 if (d == NULL) { 232 goto out;
156 d = aoedev_newdev(bufcnt); 233 d = kcalloc(1, sizeof *d, GFP_ATOMIC);
157 if (d == NULL) { 234 if (!d)
158 spin_unlock_irqrestore(&devlist_lock, flags); 235 goto out;
159 printk(KERN_INFO "aoe: aoedev_newdev failure.\n"); 236 INIT_WORK(&d->work, aoecmd_sleepwork);
160 return NULL; 237 spin_lock_init(&d->lock);
161 } 238 init_timer(&d->timer);
162 d->sysminor = sysminor; 239 d->timer.data = (ulong) d;
163 d->aoemajor = AOEMAJOR(sysminor); 240 d->timer.function = dummy_timer;
164 d->aoeminor = AOEMINOR(sysminor); 241 d->timer.expires = jiffies + HZ;
165 } 242 add_timer(&d->timer);
166 243 d->bufpool = NULL; /* defer to aoeblk_gdalloc */
244 d->tgt = d->targets;
245 INIT_LIST_HEAD(&d->bufq);
246 d->sysminor = sysminor;
247 d->aoemajor = AOEMAJOR(sysminor);
248 d->aoeminor = AOEMINOR(sysminor);
249 d->mintimer = MINTIMER;
250 d->next = devlist;
251 devlist = d;
252 out:
167 spin_unlock_irqrestore(&devlist_lock, flags); 253 spin_unlock_irqrestore(&devlist_lock, flags);
168 return d; 254 return d;
169} 255}
170 256
171static void 257static void
172aoedev_freedev(struct aoedev *d) 258freetgt(struct aoedev *d, struct aoetgt *t)
173{ 259{
174 struct frame *f, *e; 260 struct frame *f, *e;
175 261
176 if (d->gd) { 262 f = t->frames;
177 aoedisk_rm_sysfs(d); 263 e = f + t->nframes;
178 del_gendisk(d->gd); 264 for (; f < e; f++)
179 put_disk(d->gd); 265 skbfree(f->skb);
180 } 266 kfree(t->frames);
181 f = d->frames; 267 kfree(t);
182 e = f + d->nframes;
183 for (; f<e; f++) {
184 skb_shinfo(f->skb)->nr_frags = 0;
185 dev_kfree_skb(f->skb);
186 }
187 kfree(d->frames);
188 if (d->bufpool)
189 mempool_destroy(d->bufpool);
190 kfree(d);
191} 268}
192 269
193void 270void
@@ -214,7 +291,5 @@ aoedev_exit(void)
214int __init 291int __init
215aoedev_init(void) 292aoedev_init(void)
216{ 293{
217 spin_lock_init(&devlist_lock);
218 return 0; 294 return 0;
219} 295}
220
diff --git a/drivers/block/aoe/aoemain.c b/drivers/block/aoe/aoemain.c
index a04b7d613299..7b15a5e9cec0 100644
--- a/drivers/block/aoe/aoemain.c
+++ b/drivers/block/aoe/aoemain.c
@@ -1,4 +1,4 @@
1/* Copyright (c) 2006 Coraid, Inc. See COPYING for GPL terms. */ 1/* Copyright (c) 2007 Coraid, Inc. See COPYING for GPL terms. */
2/* 2/*
3 * aoemain.c 3 * aoemain.c
4 * Module initialization routines, discover timer 4 * Module initialization routines, discover timer
diff --git a/drivers/block/aoe/aoenet.c b/drivers/block/aoe/aoenet.c
index 4e6deb7f5c24..8460ef736d56 100644
--- a/drivers/block/aoe/aoenet.c
+++ b/drivers/block/aoe/aoenet.c
@@ -1,4 +1,4 @@
1/* Copyright (c) 2006 Coraid, Inc. See COPYING for GPL terms. */ 1/* Copyright (c) 2007 Coraid, Inc. See COPYING for GPL terms. */
2/* 2/*
3 * aoenet.c 3 * aoenet.c
4 * Ethernet portion of AoE driver 4 * Ethernet portion of AoE driver
@@ -83,7 +83,7 @@ set_aoe_iflist(const char __user *user_str, size_t size)
83 return 0; 83 return 0;
84} 84}
85 85
86u64 86unsigned long long
87mac_addr(char addr[6]) 87mac_addr(char addr[6])
88{ 88{
89 __be64 n = 0; 89 __be64 n = 0;
@@ -91,7 +91,7 @@ mac_addr(char addr[6])
91 91
92 memcpy(p + 2, addr, 6); /* (sizeof addr != 6) */ 92 memcpy(p + 2, addr, 6); /* (sizeof addr != 6) */
93 93
94 return __be64_to_cpu(n); 94 return (unsigned long long) __be64_to_cpu(n);
95} 95}
96 96
97void 97void
@@ -137,9 +137,12 @@ aoenet_rcv(struct sk_buff *skb, struct net_device *ifp, struct packet_type *pt,
137 if (n > NECODES) 137 if (n > NECODES)
138 n = 0; 138 n = 0;
139 if (net_ratelimit()) 139 if (net_ratelimit())
140 printk(KERN_ERR "aoe: error packet from %d.%d; ecode=%d '%s'\n", 140 printk(KERN_ERR
141 be16_to_cpu(get_unaligned(&h->major)), h->minor, 141 "%s%d.%d@%s; ecode=%d '%s'\n",
142 h->err, aoe_errlist[n]); 142 "aoe: error packet from ",
143 be16_to_cpu(get_unaligned(&h->major)),
144 h->minor, skb->dev->name,
145 h->err, aoe_errlist[n]);
143 goto exit; 146 goto exit;
144 } 147 }
145 148
diff --git a/drivers/block/brd.c b/drivers/block/brd.c
new file mode 100644
index 000000000000..85364804364f
--- /dev/null
+++ b/drivers/block/brd.c
@@ -0,0 +1,583 @@
1/*
2 * Ram backed block device driver.
3 *
4 * Copyright (C) 2007 Nick Piggin
5 * Copyright (C) 2007 Novell Inc.
6 *
7 * Parts derived from drivers/block/rd.c, and drivers/block/loop.c, copyright
8 * of their respective owners.
9 */
10
11#include <linux/init.h>
12#include <linux/module.h>
13#include <linux/moduleparam.h>
14#include <linux/major.h>
15#include <linux/blkdev.h>
16#include <linux/bio.h>
17#include <linux/highmem.h>
18#include <linux/gfp.h>
19#include <linux/radix-tree.h>
20#include <linux/buffer_head.h> /* invalidate_bh_lrus() */
21
22#include <asm/uaccess.h>
23
24#define SECTOR_SHIFT 9
25#define PAGE_SECTORS_SHIFT (PAGE_SHIFT - SECTOR_SHIFT)
26#define PAGE_SECTORS (1 << PAGE_SECTORS_SHIFT)
27
28/*
29 * Each block ramdisk device has a radix_tree brd_pages of pages that stores
30 * the pages containing the block device's contents. A brd page's ->index is
31 * its offset in PAGE_SIZE units. This is similar to, but in no way connected
32 * with, the kernel's pagecache or buffer cache (which sit above our block
33 * device).
34 */
35struct brd_device {
36 int brd_number;
37 int brd_refcnt;
38 loff_t brd_offset;
39 loff_t brd_sizelimit;
40 unsigned brd_blocksize;
41
42 struct request_queue *brd_queue;
43 struct gendisk *brd_disk;
44 struct list_head brd_list;
45
46 /*
47 * Backing store of pages and lock to protect it. This is the contents
48 * of the block device.
49 */
50 spinlock_t brd_lock;
51 struct radix_tree_root brd_pages;
52};
53
54/*
55 * Look up and return a brd's page for a given sector.
56 */
57static struct page *brd_lookup_page(struct brd_device *brd, sector_t sector)
58{
59 pgoff_t idx;
60 struct page *page;
61
62 /*
63 * The page lifetime is protected by the fact that we have opened the
64 * device node -- brd pages will never be deleted under us, so we
65 * don't need any further locking or refcounting.
66 *
67 * This is strictly true for the radix-tree nodes as well (ie. we
68 * don't actually need the rcu_read_lock()), however that is not a
69 * documented feature of the radix-tree API so it is better to be
70 * safe here (we don't have total exclusion from radix tree updates
71 * here, only deletes).
72 */
73 rcu_read_lock();
74 idx = sector >> PAGE_SECTORS_SHIFT; /* sector to page index */
75 page = radix_tree_lookup(&brd->brd_pages, idx);
76 rcu_read_unlock();
77
78 BUG_ON(page && page->index != idx);
79
80 return page;
81}
82
83/*
84 * Look up and return a brd's page for a given sector.
85 * If one does not exist, allocate an empty page, and insert that. Then
86 * return it.
87 */
88static struct page *brd_insert_page(struct brd_device *brd, sector_t sector)
89{
90 pgoff_t idx;
91 struct page *page;
92 gfp_t gfp_flags;
93
94 page = brd_lookup_page(brd, sector);
95 if (page)
96 return page;
97
98 /*
99 * Must use NOIO because we don't want to recurse back into the
100 * block or filesystem layers from page reclaim.
101 *
102 * Cannot support XIP and highmem, because our ->direct_access
103 * routine for XIP must return memory that is always addressable.
104 * If XIP was reworked to use pfns and kmap throughout, this
105 * restriction might be able to be lifted.
106 */
107 gfp_flags = GFP_NOIO | __GFP_ZERO;
108#ifndef CONFIG_BLK_DEV_XIP
109 gfp_flags |= __GFP_HIGHMEM;
110#endif
111 page = alloc_page(GFP_NOIO | __GFP_HIGHMEM | __GFP_ZERO);
112 if (!page)
113 return NULL;
114
115 if (radix_tree_preload(GFP_NOIO)) {
116 __free_page(page);
117 return NULL;
118 }
119
120 spin_lock(&brd->brd_lock);
121 idx = sector >> PAGE_SECTORS_SHIFT;
122 if (radix_tree_insert(&brd->brd_pages, idx, page)) {
123 __free_page(page);
124 page = radix_tree_lookup(&brd->brd_pages, idx);
125 BUG_ON(!page);
126 BUG_ON(page->index != idx);
127 } else
128 page->index = idx;
129 spin_unlock(&brd->brd_lock);
130
131 radix_tree_preload_end();
132
133 return page;
134}
135
136/*
137 * Free all backing store pages and radix tree. This must only be called when
138 * there are no other users of the device.
139 */
140#define FREE_BATCH 16
141static void brd_free_pages(struct brd_device *brd)
142{
143 unsigned long pos = 0;
144 struct page *pages[FREE_BATCH];
145 int nr_pages;
146
147 do {
148 int i;
149
150 nr_pages = radix_tree_gang_lookup(&brd->brd_pages,
151 (void **)pages, pos, FREE_BATCH);
152
153 for (i = 0; i < nr_pages; i++) {
154 void *ret;
155
156 BUG_ON(pages[i]->index < pos);
157 pos = pages[i]->index;
158 ret = radix_tree_delete(&brd->brd_pages, pos);
159 BUG_ON(!ret || ret != pages[i]);
160 __free_page(pages[i]);
161 }
162
163 pos++;
164
165 /*
166 * This assumes radix_tree_gang_lookup always returns as
167 * many pages as possible. If the radix-tree code changes,
168 * so will this have to.
169 */
170 } while (nr_pages == FREE_BATCH);
171}
172
173/*
174 * copy_to_brd_setup must be called before copy_to_brd. It may sleep.
175 */
176static int copy_to_brd_setup(struct brd_device *brd, sector_t sector, size_t n)
177{
178 unsigned int offset = (sector & (PAGE_SECTORS-1)) << SECTOR_SHIFT;
179 size_t copy;
180
181 copy = min_t(size_t, n, PAGE_SIZE - offset);
182 if (!brd_insert_page(brd, sector))
183 return -ENOMEM;
184 if (copy < n) {
185 sector += copy >> SECTOR_SHIFT;
186 if (!brd_insert_page(brd, sector))
187 return -ENOMEM;
188 }
189 return 0;
190}
191
192/*
193 * Copy n bytes from src to the brd starting at sector. Does not sleep.
194 */
195static void copy_to_brd(struct brd_device *brd, const void *src,
196 sector_t sector, size_t n)
197{
198 struct page *page;
199 void *dst;
200 unsigned int offset = (sector & (PAGE_SECTORS-1)) << SECTOR_SHIFT;
201 size_t copy;
202
203 copy = min_t(size_t, n, PAGE_SIZE - offset);
204 page = brd_lookup_page(brd, sector);
205 BUG_ON(!page);
206
207 dst = kmap_atomic(page, KM_USER1);
208 memcpy(dst + offset, src, copy);
209 kunmap_atomic(dst, KM_USER1);
210
211 if (copy < n) {
212 src += copy;
213 sector += copy >> SECTOR_SHIFT;
214 copy = n - copy;
215 page = brd_lookup_page(brd, sector);
216 BUG_ON(!page);
217
218 dst = kmap_atomic(page, KM_USER1);
219 memcpy(dst, src, copy);
220 kunmap_atomic(dst, KM_USER1);
221 }
222}
223
224/*
225 * Copy n bytes to dst from the brd starting at sector. Does not sleep.
226 */
227static void copy_from_brd(void *dst, struct brd_device *brd,
228 sector_t sector, size_t n)
229{
230 struct page *page;
231 void *src;
232 unsigned int offset = (sector & (PAGE_SECTORS-1)) << SECTOR_SHIFT;
233 size_t copy;
234
235 copy = min_t(size_t, n, PAGE_SIZE - offset);
236 page = brd_lookup_page(brd, sector);
237 if (page) {
238 src = kmap_atomic(page, KM_USER1);
239 memcpy(dst, src + offset, copy);
240 kunmap_atomic(src, KM_USER1);
241 } else
242 memset(dst, 0, copy);
243
244 if (copy < n) {
245 dst += copy;
246 sector += copy >> SECTOR_SHIFT;
247 copy = n - copy;
248 page = brd_lookup_page(brd, sector);
249 if (page) {
250 src = kmap_atomic(page, KM_USER1);
251 memcpy(dst, src, copy);
252 kunmap_atomic(src, KM_USER1);
253 } else
254 memset(dst, 0, copy);
255 }
256}
257
258/*
259 * Process a single bvec of a bio.
260 */
261static int brd_do_bvec(struct brd_device *brd, struct page *page,
262 unsigned int len, unsigned int off, int rw,
263 sector_t sector)
264{
265 void *mem;
266 int err = 0;
267
268 if (rw != READ) {
269 err = copy_to_brd_setup(brd, sector, len);
270 if (err)
271 goto out;
272 }
273
274 mem = kmap_atomic(page, KM_USER0);
275 if (rw == READ) {
276 copy_from_brd(mem + off, brd, sector, len);
277 flush_dcache_page(page);
278 } else
279 copy_to_brd(brd, mem + off, sector, len);
280 kunmap_atomic(mem, KM_USER0);
281
282out:
283 return err;
284}
285
286static int brd_make_request(struct request_queue *q, struct bio *bio)
287{
288 struct block_device *bdev = bio->bi_bdev;
289 struct brd_device *brd = bdev->bd_disk->private_data;
290 int rw;
291 struct bio_vec *bvec;
292 sector_t sector;
293 int i;
294 int err = -EIO;
295
296 sector = bio->bi_sector;
297 if (sector + (bio->bi_size >> SECTOR_SHIFT) >
298 get_capacity(bdev->bd_disk))
299 goto out;
300
301 rw = bio_rw(bio);
302 if (rw == READA)
303 rw = READ;
304
305 bio_for_each_segment(bvec, bio, i) {
306 unsigned int len = bvec->bv_len;
307 err = brd_do_bvec(brd, bvec->bv_page, len,
308 bvec->bv_offset, rw, sector);
309 if (err)
310 break;
311 sector += len >> SECTOR_SHIFT;
312 }
313
314out:
315 bio_endio(bio, err);
316
317 return 0;
318}
319
320#ifdef CONFIG_BLK_DEV_XIP
321static int brd_direct_access (struct block_device *bdev, sector_t sector,
322 unsigned long *data)
323{
324 struct brd_device *brd = bdev->bd_disk->private_data;
325 struct page *page;
326
327 if (!brd)
328 return -ENODEV;
329 if (sector & (PAGE_SECTORS-1))
330 return -EINVAL;
331 if (sector + PAGE_SECTORS > get_capacity(bdev->bd_disk))
332 return -ERANGE;
333 page = brd_insert_page(brd, sector);
334 if (!page)
335 return -ENOMEM;
336 *data = (unsigned long)page_address(page);
337
338 return 0;
339}
340#endif
341
342static int brd_ioctl(struct inode *inode, struct file *file,
343 unsigned int cmd, unsigned long arg)
344{
345 int error;
346 struct block_device *bdev = inode->i_bdev;
347 struct brd_device *brd = bdev->bd_disk->private_data;
348
349 if (cmd != BLKFLSBUF)
350 return -ENOTTY;
351
352 /*
353 * ram device BLKFLSBUF has special semantics, we want to actually
354 * release and destroy the ramdisk data.
355 */
356 mutex_lock(&bdev->bd_mutex);
357 error = -EBUSY;
358 if (bdev->bd_openers <= 1) {
359 /*
360 * Invalidate the cache first, so it isn't written
361 * back to the device.
362 *
363 * Another thread might instantiate more buffercache here,
364 * but there is not much we can do to close that race.
365 */
366 invalidate_bh_lrus();
367 truncate_inode_pages(bdev->bd_inode->i_mapping, 0);
368 brd_free_pages(brd);
369 error = 0;
370 }
371 mutex_unlock(&bdev->bd_mutex);
372
373 return error;
374}
375
376static struct block_device_operations brd_fops = {
377 .owner = THIS_MODULE,
378 .ioctl = brd_ioctl,
379#ifdef CONFIG_BLK_DEV_XIP
380 .direct_access = brd_direct_access,
381#endif
382};
383
384/*
385 * And now the modules code and kernel interface.
386 */
387static int rd_nr;
388int rd_size = CONFIG_BLK_DEV_RAM_SIZE;
389module_param(rd_nr, int, 0);
390MODULE_PARM_DESC(rd_nr, "Maximum number of brd devices");
391module_param(rd_size, int, 0);
392MODULE_PARM_DESC(rd_size, "Size of each RAM disk in kbytes.");
393MODULE_LICENSE("GPL");
394MODULE_ALIAS_BLOCKDEV_MAJOR(RAMDISK_MAJOR);
395
396#ifndef MODULE
397/* Legacy boot options - nonmodular */
398static int __init ramdisk_size(char *str)
399{
400 rd_size = simple_strtol(str, NULL, 0);
401 return 1;
402}
403static int __init ramdisk_size2(char *str)
404{
405 return ramdisk_size(str);
406}
407__setup("ramdisk=", ramdisk_size);
408__setup("ramdisk_size=", ramdisk_size2);
409#endif
410
411/*
412 * The device scheme is derived from loop.c. Keep them in synch where possible
413 * (should share code eventually).
414 */
415static LIST_HEAD(brd_devices);
416static DEFINE_MUTEX(brd_devices_mutex);
417
418static struct brd_device *brd_alloc(int i)
419{
420 struct brd_device *brd;
421 struct gendisk *disk;
422
423 brd = kzalloc(sizeof(*brd), GFP_KERNEL);
424 if (!brd)
425 goto out;
426 brd->brd_number = i;
427 spin_lock_init(&brd->brd_lock);
428 INIT_RADIX_TREE(&brd->brd_pages, GFP_ATOMIC);
429
430 brd->brd_queue = blk_alloc_queue(GFP_KERNEL);
431 if (!brd->brd_queue)
432 goto out_free_dev;
433 blk_queue_make_request(brd->brd_queue, brd_make_request);
434 blk_queue_max_sectors(brd->brd_queue, 1024);
435 blk_queue_bounce_limit(brd->brd_queue, BLK_BOUNCE_ANY);
436
437 disk = brd->brd_disk = alloc_disk(1);
438 if (!disk)
439 goto out_free_queue;
440 disk->major = RAMDISK_MAJOR;
441 disk->first_minor = i;
442 disk->fops = &brd_fops;
443 disk->private_data = brd;
444 disk->queue = brd->brd_queue;
445 sprintf(disk->disk_name, "ram%d", i);
446 set_capacity(disk, rd_size * 2);
447
448 return brd;
449
450out_free_queue:
451 blk_cleanup_queue(brd->brd_queue);
452out_free_dev:
453 kfree(brd);
454out:
455 return NULL;
456}
457
458static void brd_free(struct brd_device *brd)
459{
460 put_disk(brd->brd_disk);
461 blk_cleanup_queue(brd->brd_queue);
462 brd_free_pages(brd);
463 kfree(brd);
464}
465
466static struct brd_device *brd_init_one(int i)
467{
468 struct brd_device *brd;
469
470 list_for_each_entry(brd, &brd_devices, brd_list) {
471 if (brd->brd_number == i)
472 goto out;
473 }
474
475 brd = brd_alloc(i);
476 if (brd) {
477 add_disk(brd->brd_disk);
478 list_add_tail(&brd->brd_list, &brd_devices);
479 }
480out:
481 return brd;
482}
483
484static void brd_del_one(struct brd_device *brd)
485{
486 list_del(&brd->brd_list);
487 del_gendisk(brd->brd_disk);
488 brd_free(brd);
489}
490
491static struct kobject *brd_probe(dev_t dev, int *part, void *data)
492{
493 struct brd_device *brd;
494 struct kobject *kobj;
495
496 mutex_lock(&brd_devices_mutex);
497 brd = brd_init_one(dev & MINORMASK);
498 kobj = brd ? get_disk(brd->brd_disk) : ERR_PTR(-ENOMEM);
499 mutex_unlock(&brd_devices_mutex);
500
501 *part = 0;
502 return kobj;
503}
504
505static int __init brd_init(void)
506{
507 int i, nr;
508 unsigned long range;
509 struct brd_device *brd, *next;
510
511 /*
512 * brd module now has a feature to instantiate underlying device
513 * structure on-demand, provided that there is an access dev node.
514 * However, this will not work well with user space tool that doesn't
515 * know about such "feature". In order to not break any existing
516 * tool, we do the following:
517 *
518 * (1) if rd_nr is specified, create that many upfront, and this
519 * also becomes a hard limit.
520 * (2) if rd_nr is not specified, create 1 rd device on module
521 * load, user can further extend brd device by create dev node
522 * themselves and have kernel automatically instantiate actual
523 * device on-demand.
524 */
525 if (rd_nr > 1UL << MINORBITS)
526 return -EINVAL;
527
528 if (rd_nr) {
529 nr = rd_nr;
530 range = rd_nr;
531 } else {
532 nr = CONFIG_BLK_DEV_RAM_COUNT;
533 range = 1UL << MINORBITS;
534 }
535
536 if (register_blkdev(RAMDISK_MAJOR, "ramdisk"))
537 return -EIO;
538
539 for (i = 0; i < nr; i++) {
540 brd = brd_alloc(i);
541 if (!brd)
542 goto out_free;
543 list_add_tail(&brd->brd_list, &brd_devices);
544 }
545
546 /* point of no return */
547
548 list_for_each_entry(brd, &brd_devices, brd_list)
549 add_disk(brd->brd_disk);
550
551 blk_register_region(MKDEV(RAMDISK_MAJOR, 0), range,
552 THIS_MODULE, brd_probe, NULL, NULL);
553
554 printk(KERN_INFO "brd: module loaded\n");
555 return 0;
556
557out_free:
558 list_for_each_entry_safe(brd, next, &brd_devices, brd_list) {
559 list_del(&brd->brd_list);
560 brd_free(brd);
561 }
562
563 unregister_blkdev(RAMDISK_MAJOR, "brd");
564 return -ENOMEM;
565}
566
567static void __exit brd_exit(void)
568{
569 unsigned long range;
570 struct brd_device *brd, *next;
571
572 range = rd_nr ? rd_nr : 1UL << MINORBITS;
573
574 list_for_each_entry_safe(brd, next, &brd_devices, brd_list)
575 brd_del_one(brd);
576
577 blk_unregister_region(MKDEV(RAMDISK_MAJOR, 0), range);
578 unregister_blkdev(RAMDISK_MAJOR, "ramdisk");
579}
580
581module_init(brd_init);
582module_exit(brd_exit);
583
diff --git a/drivers/block/nbd.c b/drivers/block/nbd.c
index ae3106045ee5..018753c59b8e 100644
--- a/drivers/block/nbd.c
+++ b/drivers/block/nbd.c
@@ -54,7 +54,7 @@ static unsigned int debugflags;
54#endif /* NDEBUG */ 54#endif /* NDEBUG */
55 55
56static unsigned int nbds_max = 16; 56static unsigned int nbds_max = 16;
57static struct nbd_device nbd_dev[MAX_NBD]; 57static struct nbd_device *nbd_dev;
58 58
59/* 59/*
60 * Use just one lock (or at most 1 per NIC). Two arguments for this: 60 * Use just one lock (or at most 1 per NIC). Two arguments for this:
@@ -649,11 +649,9 @@ static int __init nbd_init(void)
649 649
650 BUILD_BUG_ON(sizeof(struct nbd_request) != 28); 650 BUILD_BUG_ON(sizeof(struct nbd_request) != 28);
651 651
652 if (nbds_max > MAX_NBD) { 652 nbd_dev = kcalloc(nbds_max, sizeof(*nbd_dev), GFP_KERNEL);
653 printk(KERN_CRIT "nbd: cannot allocate more than %u nbds; %u requested.\n", MAX_NBD, 653 if (!nbd_dev)
654 nbds_max); 654 return -ENOMEM;
655 return -EINVAL;
656 }
657 655
658 for (i = 0; i < nbds_max; i++) { 656 for (i = 0; i < nbds_max; i++) {
659 struct gendisk *disk = alloc_disk(1); 657 struct gendisk *disk = alloc_disk(1);
diff --git a/drivers/block/rd.c b/drivers/block/rd.c
deleted file mode 100644
index 06e23be70904..000000000000
--- a/drivers/block/rd.c
+++ /dev/null
@@ -1,537 +0,0 @@
1/*
2 * ramdisk.c - Multiple RAM disk driver - gzip-loading version - v. 0.8 beta.
3 *
4 * (C) Chad Page, Theodore Ts'o, et. al, 1995.
5 *
6 * This RAM disk is designed to have filesystems created on it and mounted
7 * just like a regular floppy disk.
8 *
9 * It also does something suggested by Linus: use the buffer cache as the
10 * RAM disk data. This makes it possible to dynamically allocate the RAM disk
11 * buffer - with some consequences I have to deal with as I write this.
12 *
13 * This code is based on the original ramdisk.c, written mostly by
14 * Theodore Ts'o (TYT) in 1991. The code was largely rewritten by
15 * Chad Page to use the buffer cache to store the RAM disk data in
16 * 1995; Theodore then took over the driver again, and cleaned it up
17 * for inclusion in the mainline kernel.
18 *
19 * The original CRAMDISK code was written by Richard Lyons, and
20 * adapted by Chad Page to use the new RAM disk interface. Theodore
21 * Ts'o rewrote it so that both the compressed RAM disk loader and the
22 * kernel decompressor uses the same inflate.c codebase. The RAM disk
23 * loader now also loads into a dynamic (buffer cache based) RAM disk,
24 * not the old static RAM disk. Support for the old static RAM disk has
25 * been completely removed.
26 *
27 * Loadable module support added by Tom Dyas.
28 *
29 * Further cleanups by Chad Page (page0588@sundance.sjsu.edu):
30 * Cosmetic changes in #ifdef MODULE, code movement, etc.
31 * When the RAM disk module is removed, free the protected buffers
32 * Default RAM disk size changed to 2.88 MB
33 *
34 * Added initrd: Werner Almesberger & Hans Lermen, Feb '96
35 *
36 * 4/25/96 : Made RAM disk size a parameter (default is now 4 MB)
37 * - Chad Page
38 *
39 * Add support for fs images split across >1 disk, Paul Gortmaker, Mar '98
40 *
41 * Make block size and block size shift for RAM disks a global macro
42 * and set blk_size for -ENOSPC, Werner Fink <werner@suse.de>, Apr '99
43 */
44
45#include <linux/string.h>
46#include <linux/slab.h>
47#include <asm/atomic.h>
48#include <linux/bio.h>
49#include <linux/module.h>
50#include <linux/moduleparam.h>
51#include <linux/init.h>
52#include <linux/pagemap.h>
53#include <linux/blkdev.h>
54#include <linux/genhd.h>
55#include <linux/buffer_head.h> /* for invalidate_bdev() */
56#include <linux/backing-dev.h>
57#include <linux/blkpg.h>
58#include <linux/writeback.h>
59#include <linux/log2.h>
60
61#include <asm/uaccess.h>
62
63/* Various static variables go here. Most are used only in the RAM disk code.
64 */
65
66static struct gendisk *rd_disks[CONFIG_BLK_DEV_RAM_COUNT];
67static struct block_device *rd_bdev[CONFIG_BLK_DEV_RAM_COUNT];/* Protected device data */
68static struct request_queue *rd_queue[CONFIG_BLK_DEV_RAM_COUNT];
69
70/*
71 * Parameters for the boot-loading of the RAM disk. These are set by
72 * init/main.c (from arguments to the kernel command line) or from the
73 * architecture-specific setup routine (from the stored boot sector
74 * information).
75 */
76int rd_size = CONFIG_BLK_DEV_RAM_SIZE; /* Size of the RAM disks */
77/*
78 * It would be very desirable to have a soft-blocksize (that in the case
79 * of the ramdisk driver is also the hardblocksize ;) of PAGE_SIZE because
80 * doing that we'll achieve a far better MM footprint. Using a rd_blocksize of
81 * BLOCK_SIZE in the worst case we'll make PAGE_SIZE/BLOCK_SIZE buffer-pages
82 * unfreeable. With a rd_blocksize of PAGE_SIZE instead we are sure that only
83 * 1 page will be protected. Depending on the size of the ramdisk you
84 * may want to change the ramdisk blocksize to achieve a better or worse MM
85 * behaviour. The default is still BLOCK_SIZE (needed by rd_load_image that
86 * supposes the filesystem in the image uses a BLOCK_SIZE blocksize).
87 */
88static int rd_blocksize = CONFIG_BLK_DEV_RAM_BLOCKSIZE;
89
90/*
91 * Copyright (C) 2000 Linus Torvalds.
92 * 2000 Transmeta Corp.
93 * aops copied from ramfs.
94 */
95
96/*
97 * If a ramdisk page has buffers, some may be uptodate and some may be not.
98 * To bring the page uptodate we zero out the non-uptodate buffers. The
99 * page must be locked.
100 */
101static void make_page_uptodate(struct page *page)
102{
103 if (page_has_buffers(page)) {
104 struct buffer_head *bh = page_buffers(page);
105 struct buffer_head *head = bh;
106
107 do {
108 if (!buffer_uptodate(bh)) {
109 memset(bh->b_data, 0, bh->b_size);
110 /*
111 * akpm: I'm totally undecided about this. The
112 * buffer has just been magically brought "up to
113 * date", but nobody should want to be reading
114 * it anyway, because it hasn't been used for
115 * anything yet. It is still in a "not read
116 * from disk yet" state.
117 *
118 * But non-uptodate buffers against an uptodate
119 * page are against the rules. So do it anyway.
120 */
121 set_buffer_uptodate(bh);
122 }
123 } while ((bh = bh->b_this_page) != head);
124 } else {
125 memset(page_address(page), 0, PAGE_CACHE_SIZE);
126 }
127 flush_dcache_page(page);
128 SetPageUptodate(page);
129}
130
131static int ramdisk_readpage(struct file *file, struct page *page)
132{
133 if (!PageUptodate(page))
134 make_page_uptodate(page);
135 unlock_page(page);
136 return 0;
137}
138
139static int ramdisk_prepare_write(struct file *file, struct page *page,
140 unsigned offset, unsigned to)
141{
142 if (!PageUptodate(page))
143 make_page_uptodate(page);
144 return 0;
145}
146
147static int ramdisk_commit_write(struct file *file, struct page *page,
148 unsigned offset, unsigned to)
149{
150 set_page_dirty(page);
151 return 0;
152}
153
154/*
155 * ->writepage to the blockdev's mapping has to redirty the page so that the
156 * VM doesn't go and steal it. We return AOP_WRITEPAGE_ACTIVATE so that the VM
157 * won't try to (pointlessly) write the page again for a while.
158 *
159 * Really, these pages should not be on the LRU at all.
160 */
161static int ramdisk_writepage(struct page *page, struct writeback_control *wbc)
162{
163 if (!PageUptodate(page))
164 make_page_uptodate(page);
165 SetPageDirty(page);
166 if (wbc->for_reclaim)
167 return AOP_WRITEPAGE_ACTIVATE;
168 unlock_page(page);
169 return 0;
170}
171
172/*
173 * This is a little speedup thing: short-circuit attempts to write back the
174 * ramdisk blockdev inode to its non-existent backing store.
175 */
176static int ramdisk_writepages(struct address_space *mapping,
177 struct writeback_control *wbc)
178{
179 return 0;
180}
181
182/*
183 * ramdisk blockdev pages have their own ->set_page_dirty() because we don't
184 * want them to contribute to dirty memory accounting.
185 */
186static int ramdisk_set_page_dirty(struct page *page)
187{
188 if (!TestSetPageDirty(page))
189 return 1;
190 return 0;
191}
192
193/*
194 * releasepage is called by pagevec_strip/try_to_release_page if
195 * buffers_heads_over_limit is true. Without a releasepage function
196 * try_to_free_buffers is called instead. That can unset the dirty
197 * bit of our ram disk pages, which will be eventually freed, even
198 * if the page is still in use.
199 */
200static int ramdisk_releasepage(struct page *page, gfp_t dummy)
201{
202 return 0;
203}
204
205static const struct address_space_operations ramdisk_aops = {
206 .readpage = ramdisk_readpage,
207 .prepare_write = ramdisk_prepare_write,
208 .commit_write = ramdisk_commit_write,
209 .writepage = ramdisk_writepage,
210 .set_page_dirty = ramdisk_set_page_dirty,
211 .writepages = ramdisk_writepages,
212 .releasepage = ramdisk_releasepage,
213};
214
215static int rd_blkdev_pagecache_IO(int rw, struct bio_vec *vec, sector_t sector,
216 struct address_space *mapping)
217{
218 pgoff_t index = sector >> (PAGE_CACHE_SHIFT - 9);
219 unsigned int vec_offset = vec->bv_offset;
220 int offset = (sector << 9) & ~PAGE_CACHE_MASK;
221 int size = vec->bv_len;
222 int err = 0;
223
224 do {
225 int count;
226 struct page *page;
227 char *src;
228 char *dst;
229
230 count = PAGE_CACHE_SIZE - offset;
231 if (count > size)
232 count = size;
233 size -= count;
234
235 page = grab_cache_page(mapping, index);
236 if (!page) {
237 err = -ENOMEM;
238 goto out;
239 }
240
241 if (!PageUptodate(page))
242 make_page_uptodate(page);
243
244 index++;
245
246 if (rw == READ) {
247 src = kmap_atomic(page, KM_USER0) + offset;
248 dst = kmap_atomic(vec->bv_page, KM_USER1) + vec_offset;
249 } else {
250 src = kmap_atomic(vec->bv_page, KM_USER0) + vec_offset;
251 dst = kmap_atomic(page, KM_USER1) + offset;
252 }
253 offset = 0;
254 vec_offset += count;
255
256 memcpy(dst, src, count);
257
258 kunmap_atomic(src, KM_USER0);
259 kunmap_atomic(dst, KM_USER1);
260
261 if (rw == READ)
262 flush_dcache_page(vec->bv_page);
263 else
264 set_page_dirty(page);
265 unlock_page(page);
266 put_page(page);
267 } while (size);
268
269 out:
270 return err;
271}
272
273/*
274 * Basically, my strategy here is to set up a buffer-head which can't be
275 * deleted, and make that my Ramdisk. If the request is outside of the
276 * allocated size, we must get rid of it...
277 *
278 * 19-JAN-1998 Richard Gooch <rgooch@atnf.csiro.au> Added devfs support
279 *
280 */
281static int rd_make_request(struct request_queue *q, struct bio *bio)
282{
283 struct block_device *bdev = bio->bi_bdev;
284 struct address_space * mapping = bdev->bd_inode->i_mapping;
285 sector_t sector = bio->bi_sector;
286 unsigned long len = bio->bi_size >> 9;
287 int rw = bio_data_dir(bio);
288 struct bio_vec *bvec;
289 int ret = 0, i;
290
291 if (sector + len > get_capacity(bdev->bd_disk))
292 goto fail;
293
294 if (rw==READA)
295 rw=READ;
296
297 bio_for_each_segment(bvec, bio, i) {
298 ret |= rd_blkdev_pagecache_IO(rw, bvec, sector, mapping);
299 sector += bvec->bv_len >> 9;
300 }
301 if (ret)
302 goto fail;
303
304 bio_endio(bio, 0);
305 return 0;
306fail:
307 bio_io_error(bio);
308 return 0;
309}
310
311static int rd_ioctl(struct inode *inode, struct file *file,
312 unsigned int cmd, unsigned long arg)
313{
314 int error;
315 struct block_device *bdev = inode->i_bdev;
316
317 if (cmd != BLKFLSBUF)
318 return -ENOTTY;
319
320 /*
321 * special: we want to release the ramdisk memory, it's not like with
322 * the other blockdevices where this ioctl only flushes away the buffer
323 * cache
324 */
325 error = -EBUSY;
326 mutex_lock(&bdev->bd_mutex);
327 if (bdev->bd_openers <= 2) {
328 truncate_inode_pages(bdev->bd_inode->i_mapping, 0);
329 error = 0;
330 }
331 mutex_unlock(&bdev->bd_mutex);
332 return error;
333}
334
335/*
336 * This is the backing_dev_info for the blockdev inode itself. It doesn't need
337 * writeback and it does not contribute to dirty memory accounting.
338 */
339static struct backing_dev_info rd_backing_dev_info = {
340 .ra_pages = 0, /* No readahead */
341 .capabilities = BDI_CAP_NO_ACCT_DIRTY | BDI_CAP_NO_WRITEBACK | BDI_CAP_MAP_COPY,
342 .unplug_io_fn = default_unplug_io_fn,
343};
344
345/*
346 * This is the backing_dev_info for the files which live atop the ramdisk
347 * "device". These files do need writeback and they do contribute to dirty
348 * memory accounting.
349 */
350static struct backing_dev_info rd_file_backing_dev_info = {
351 .ra_pages = 0, /* No readahead */
352 .capabilities = BDI_CAP_MAP_COPY, /* Does contribute to dirty memory */
353 .unplug_io_fn = default_unplug_io_fn,
354};
355
356static int rd_open(struct inode *inode, struct file *filp)
357{
358 unsigned unit = iminor(inode);
359
360 if (rd_bdev[unit] == NULL) {
361 struct block_device *bdev = inode->i_bdev;
362 struct address_space *mapping;
363 unsigned bsize;
364 gfp_t gfp_mask;
365
366 inode = igrab(bdev->bd_inode);
367 rd_bdev[unit] = bdev;
368 bdev->bd_openers++;
369 bsize = bdev_hardsect_size(bdev);
370 bdev->bd_block_size = bsize;
371 inode->i_blkbits = blksize_bits(bsize);
372 inode->i_size = get_capacity(bdev->bd_disk)<<9;
373
374 mapping = inode->i_mapping;
375 mapping->a_ops = &ramdisk_aops;
376 mapping->backing_dev_info = &rd_backing_dev_info;
377 bdev->bd_inode_backing_dev_info = &rd_file_backing_dev_info;
378
379 /*
380 * Deep badness. rd_blkdev_pagecache_IO() needs to allocate
381 * pagecache pages within a request_fn. We cannot recur back
382 * into the filesystem which is mounted atop the ramdisk, because
383 * that would deadlock on fs locks. And we really don't want
384 * to reenter rd_blkdev_pagecache_IO when we're already within
385 * that function.
386 *
387 * So we turn off __GFP_FS and __GFP_IO.
388 *
389 * And to give this thing a hope of working, turn on __GFP_HIGH.
390 * Hopefully, there's enough regular memory allocation going on
391 * for the page allocator emergency pools to keep the ramdisk
392 * driver happy.
393 */
394 gfp_mask = mapping_gfp_mask(mapping);
395 gfp_mask &= ~(__GFP_FS|__GFP_IO);
396 gfp_mask |= __GFP_HIGH;
397 mapping_set_gfp_mask(mapping, gfp_mask);
398 }
399
400 return 0;
401}
402
403static struct block_device_operations rd_bd_op = {
404 .owner = THIS_MODULE,
405 .open = rd_open,
406 .ioctl = rd_ioctl,
407};
408
409/*
410 * Before freeing the module, invalidate all of the protected buffers!
411 */
412static void __exit rd_cleanup(void)
413{
414 int i;
415
416 for (i = 0; i < CONFIG_BLK_DEV_RAM_COUNT; i++) {
417 struct block_device *bdev = rd_bdev[i];
418 rd_bdev[i] = NULL;
419 if (bdev) {
420 invalidate_bdev(bdev);
421 blkdev_put(bdev);
422 }
423 del_gendisk(rd_disks[i]);
424 put_disk(rd_disks[i]);
425 blk_cleanup_queue(rd_queue[i]);
426 }
427 unregister_blkdev(RAMDISK_MAJOR, "ramdisk");
428
429 bdi_destroy(&rd_file_backing_dev_info);
430 bdi_destroy(&rd_backing_dev_info);
431}
432
433/*
434 * This is the registration and initialization section of the RAM disk driver
435 */
436static int __init rd_init(void)
437{
438 int i;
439 int err;
440
441 err = bdi_init(&rd_backing_dev_info);
442 if (err)
443 goto out2;
444
445 err = bdi_init(&rd_file_backing_dev_info);
446 if (err) {
447 bdi_destroy(&rd_backing_dev_info);
448 goto out2;
449 }
450
451 err = -ENOMEM;
452
453 if (rd_blocksize > PAGE_SIZE || rd_blocksize < 512 ||
454 !is_power_of_2(rd_blocksize)) {
455 printk("RAMDISK: wrong blocksize %d, reverting to defaults\n",
456 rd_blocksize);
457 rd_blocksize = BLOCK_SIZE;
458 }
459
460 for (i = 0; i < CONFIG_BLK_DEV_RAM_COUNT; i++) {
461 rd_disks[i] = alloc_disk(1);
462 if (!rd_disks[i])
463 goto out;
464
465 rd_queue[i] = blk_alloc_queue(GFP_KERNEL);
466 if (!rd_queue[i]) {
467 put_disk(rd_disks[i]);
468 goto out;
469 }
470 }
471
472 if (register_blkdev(RAMDISK_MAJOR, "ramdisk")) {
473 err = -EIO;
474 goto out;
475 }
476
477 for (i = 0; i < CONFIG_BLK_DEV_RAM_COUNT; i++) {
478 struct gendisk *disk = rd_disks[i];
479
480 blk_queue_make_request(rd_queue[i], &rd_make_request);
481 blk_queue_hardsect_size(rd_queue[i], rd_blocksize);
482
483 /* rd_size is given in kB */
484 disk->major = RAMDISK_MAJOR;
485 disk->first_minor = i;
486 disk->fops = &rd_bd_op;
487 disk->queue = rd_queue[i];
488 disk->flags |= GENHD_FL_SUPPRESS_PARTITION_INFO;
489 sprintf(disk->disk_name, "ram%d", i);
490 set_capacity(disk, rd_size * 2);
491 add_disk(rd_disks[i]);
492 }
493
494 /* rd_size is given in kB */
495 printk("RAMDISK driver initialized: "
496 "%d RAM disks of %dK size %d blocksize\n",
497 CONFIG_BLK_DEV_RAM_COUNT, rd_size, rd_blocksize);
498
499 return 0;
500out:
501 while (i--) {
502 put_disk(rd_disks[i]);
503 blk_cleanup_queue(rd_queue[i]);
504 }
505 bdi_destroy(&rd_backing_dev_info);
506 bdi_destroy(&rd_file_backing_dev_info);
507out2:
508 return err;
509}
510
511module_init(rd_init);
512module_exit(rd_cleanup);
513
514/* options - nonmodular */
515#ifndef MODULE
516static int __init ramdisk_size(char *str)
517{
518 rd_size = simple_strtol(str,NULL,0);
519 return 1;
520}
521static int __init ramdisk_blocksize(char *str)
522{
523 rd_blocksize = simple_strtol(str,NULL,0);
524 return 1;
525}
526__setup("ramdisk_size=", ramdisk_size);
527__setup("ramdisk_blocksize=", ramdisk_blocksize);
528#endif
529
530/* options - modular */
531module_param(rd_size, int, 0);
532MODULE_PARM_DESC(rd_size, "Size of each RAM disk in kbytes.");
533module_param(rd_blocksize, int, 0);
534MODULE_PARM_DESC(rd_blocksize, "Blocksize of each RAM disk in bytes.");
535MODULE_ALIAS_BLOCKDEV_MAJOR(RAMDISK_MAJOR);
536
537MODULE_LICENSE("GPL");
diff --git a/drivers/char/applicom.c b/drivers/char/applicom.c
index 1f0b752e5de1..a7c4990b5b6b 100644
--- a/drivers/char/applicom.c
+++ b/drivers/char/applicom.c
@@ -57,7 +57,6 @@
57#define PCI_DEVICE_ID_APPLICOM_PCI2000IBS_CAN 0x0002 57#define PCI_DEVICE_ID_APPLICOM_PCI2000IBS_CAN 0x0002
58#define PCI_DEVICE_ID_APPLICOM_PCI2000PFB 0x0003 58#define PCI_DEVICE_ID_APPLICOM_PCI2000PFB 0x0003
59#endif 59#endif
60#define MAX_PCI_DEVICE_NUM 3
61 60
62static char *applicom_pci_devnames[] = { 61static char *applicom_pci_devnames[] = {
63 "PCI board", 62 "PCI board",
@@ -66,12 +65,9 @@ static char *applicom_pci_devnames[] = {
66}; 65};
67 66
68static struct pci_device_id applicom_pci_tbl[] = { 67static struct pci_device_id applicom_pci_tbl[] = {
69 { PCI_VENDOR_ID_APPLICOM, PCI_DEVICE_ID_APPLICOM_PCIGENERIC, 68 { PCI_VDEVICE(APPLICOM, PCI_DEVICE_ID_APPLICOM_PCIGENERIC) },
70 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, 69 { PCI_VDEVICE(APPLICOM, PCI_DEVICE_ID_APPLICOM_PCI2000IBS_CAN) },
71 { PCI_VENDOR_ID_APPLICOM, PCI_DEVICE_ID_APPLICOM_PCI2000IBS_CAN, 70 { PCI_VDEVICE(APPLICOM, PCI_DEVICE_ID_APPLICOM_PCI2000PFB) },
72 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
73 { PCI_VENDOR_ID_APPLICOM, PCI_DEVICE_ID_APPLICOM_PCI2000PFB,
74 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
75 { 0 } 71 { 0 }
76}; 72};
77MODULE_DEVICE_TABLE(pci, applicom_pci_tbl); 73MODULE_DEVICE_TABLE(pci, applicom_pci_tbl);
@@ -197,31 +193,29 @@ static int __init applicom_init(void)
197 193
198 while ( (dev = pci_get_class(PCI_CLASS_OTHERS << 16, dev))) { 194 while ( (dev = pci_get_class(PCI_CLASS_OTHERS << 16, dev))) {
199 195
200 if (dev->vendor != PCI_VENDOR_ID_APPLICOM) 196 if (!pci_match_id(applicom_pci_tbl, dev))
201 continue;
202
203 if (dev->device > MAX_PCI_DEVICE_NUM || dev->device == 0)
204 continue; 197 continue;
205 198
206 if (pci_enable_device(dev)) 199 if (pci_enable_device(dev))
207 return -EIO; 200 return -EIO;
208 201
209 RamIO = ioremap(dev->resource[0].start, LEN_RAM_IO); 202 RamIO = ioremap(pci_resource_start(dev, 0), LEN_RAM_IO);
210 203
211 if (!RamIO) { 204 if (!RamIO) {
212 printk(KERN_INFO "ac.o: Failed to ioremap PCI memory " 205 printk(KERN_INFO "ac.o: Failed to ioremap PCI memory "
213 "space at 0x%llx\n", 206 "space at 0x%llx\n",
214 (unsigned long long)dev->resource[0].start); 207 (unsigned long long)pci_resource_start(dev, 0));
215 pci_disable_device(dev); 208 pci_disable_device(dev);
216 return -EIO; 209 return -EIO;
217 } 210 }
218 211
219 printk(KERN_INFO "Applicom %s found at mem 0x%llx, irq %d\n", 212 printk(KERN_INFO "Applicom %s found at mem 0x%llx, irq %d\n",
220 applicom_pci_devnames[dev->device-1], 213 applicom_pci_devnames[dev->device-1],
221 (unsigned long long)dev->resource[0].start, 214 (unsigned long long)pci_resource_start(dev, 0),
222 dev->irq); 215 dev->irq);
223 216
224 boardno = ac_register_board(dev->resource[0].start, RamIO,0); 217 boardno = ac_register_board(pci_resource_start(dev, 0),
218 RamIO, 0);
225 if (!boardno) { 219 if (!boardno) {
226 printk(KERN_INFO "ac.o: PCI Applicom device doesn't have correct signature.\n"); 220 printk(KERN_INFO "ac.o: PCI Applicom device doesn't have correct signature.\n");
227 iounmap(RamIO); 221 iounmap(RamIO);
diff --git a/drivers/char/moxa.c b/drivers/char/moxa.c
index 2fc255a21486..64b7b2b18352 100644
--- a/drivers/char/moxa.c
+++ b/drivers/char/moxa.c
@@ -207,7 +207,7 @@ static int moxa_tiocmget(struct tty_struct *tty, struct file *file);
207static int moxa_tiocmset(struct tty_struct *tty, struct file *file, 207static int moxa_tiocmset(struct tty_struct *tty, struct file *file,
208 unsigned int set, unsigned int clear); 208 unsigned int set, unsigned int clear);
209static void moxa_poll(unsigned long); 209static void moxa_poll(unsigned long);
210static void moxa_set_tty_param(struct tty_struct *); 210static void moxa_set_tty_param(struct tty_struct *, struct ktermios *);
211static int moxa_block_till_ready(struct tty_struct *, struct file *, 211static int moxa_block_till_ready(struct tty_struct *, struct file *,
212 struct moxa_port *); 212 struct moxa_port *);
213static void moxa_setup_empty_event(struct tty_struct *); 213static void moxa_setup_empty_event(struct tty_struct *);
@@ -500,7 +500,7 @@ static int moxa_open(struct tty_struct *tty, struct file *filp)
500 ch->tty = tty; 500 ch->tty = tty;
501 if (!(ch->asyncflags & ASYNC_INITIALIZED)) { 501 if (!(ch->asyncflags & ASYNC_INITIALIZED)) {
502 ch->statusflags = 0; 502 ch->statusflags = 0;
503 moxa_set_tty_param(tty); 503 moxa_set_tty_param(tty, tty->termios);
504 MoxaPortLineCtrl(ch->port, 1, 1); 504 MoxaPortLineCtrl(ch->port, 1, 1);
505 MoxaPortEnable(ch->port); 505 MoxaPortEnable(ch->port);
506 ch->asyncflags |= ASYNC_INITIALIZED; 506 ch->asyncflags |= ASYNC_INITIALIZED;
@@ -803,7 +803,7 @@ static void moxa_set_termios(struct tty_struct *tty,
803 803
804 if (ch == NULL) 804 if (ch == NULL)
805 return; 805 return;
806 moxa_set_tty_param(tty); 806 moxa_set_tty_param(tty, old_termios);
807 if (!(old_termios->c_cflag & CLOCAL) && 807 if (!(old_termios->c_cflag & CLOCAL) &&
808 (tty->termios->c_cflag & CLOCAL)) 808 (tty->termios->c_cflag & CLOCAL))
809 wake_up_interruptible(&ch->open_wait); 809 wake_up_interruptible(&ch->open_wait);
@@ -903,11 +903,11 @@ static void moxa_poll(unsigned long ignored)
903 903
904/******************************************************************************/ 904/******************************************************************************/
905 905
906static void moxa_set_tty_param(struct tty_struct *tty) 906static void moxa_set_tty_param(struct tty_struct *tty, struct ktermios *old_termios)
907{ 907{
908 register struct ktermios *ts; 908 register struct ktermios *ts;
909 struct moxa_port *ch; 909 struct moxa_port *ch;
910 int rts, cts, txflow, rxflow, xany; 910 int rts, cts, txflow, rxflow, xany, baud;
911 911
912 ch = (struct moxa_port *) tty->driver_data; 912 ch = (struct moxa_port *) tty->driver_data;
913 ts = tty->termios; 913 ts = tty->termios;
@@ -924,8 +924,15 @@ static void moxa_set_tty_param(struct tty_struct *tty)
924 rxflow = 1; 924 rxflow = 1;
925 if (ts->c_iflag & IXANY) 925 if (ts->c_iflag & IXANY)
926 xany = 1; 926 xany = 1;
927
928 /* Clear the features we don't support */
929 ts->c_cflag &= ~CMSPAR;
927 MoxaPortFlowCtrl(ch->port, rts, cts, txflow, rxflow, xany); 930 MoxaPortFlowCtrl(ch->port, rts, cts, txflow, rxflow, xany);
928 MoxaPortSetTermio(ch->port, ts, tty_get_baud_rate(tty)); 931 baud = MoxaPortSetTermio(ch->port, ts, tty_get_baud_rate(tty));
932 if (baud == -1)
933 baud = tty_termios_baud_rate(old_termios);
934 /* Not put the baud rate into the termios data */
935 tty_encode_baud_rate(tty, baud, baud);
929} 936}
930 937
931static int moxa_block_till_ready(struct tty_struct *tty, struct file *filp, 938static int moxa_block_till_ready(struct tty_struct *tty, struct file *filp,
@@ -2065,7 +2072,7 @@ int MoxaPortSetTermio(int port, struct ktermios *termio, speed_t baud)
2065 if (baud >= 921600L) 2072 if (baud >= 921600L)
2066 return (-1); 2073 return (-1);
2067 } 2074 }
2068 MoxaPortSetBaud(port, baud); 2075 baud = MoxaPortSetBaud(port, baud);
2069 2076
2070 if (termio->c_iflag & (IXON | IXOFF | IXANY)) { 2077 if (termio->c_iflag & (IXON | IXOFF | IXANY)) {
2071 writeb(termio->c_cc[VSTART], ofsAddr + FuncArg); 2078 writeb(termio->c_cc[VSTART], ofsAddr + FuncArg);
@@ -2074,7 +2081,7 @@ int MoxaPortSetTermio(int port, struct ktermios *termio, speed_t baud)
2074 moxa_wait_finish(ofsAddr); 2081 moxa_wait_finish(ofsAddr);
2075 2082
2076 } 2083 }
2077 return (0); 2084 return (baud);
2078} 2085}
2079 2086
2080int MoxaPortGetLineOut(int port, int *dtrState, int *rtsState) 2087int MoxaPortGetLineOut(int port, int *dtrState, int *rtsState)
diff --git a/drivers/char/n_tty.c b/drivers/char/n_tty.c
index 90c3969012a3..46b2a1cc8b54 100644
--- a/drivers/char/n_tty.c
+++ b/drivers/char/n_tty.c
@@ -1,6 +1,6 @@
1/* 1/*
2 * n_tty.c --- implements the N_TTY line discipline. 2 * n_tty.c --- implements the N_TTY line discipline.
3 * 3 *
4 * This code used to be in tty_io.c, but things are getting hairy 4 * This code used to be in tty_io.c, but things are getting hairy
5 * enough that it made sense to split things off. (The N_TTY 5 * enough that it made sense to split things off. (The N_TTY
6 * processing has changed so much that it's hardly recognizable, 6 * processing has changed so much that it's hardly recognizable,
@@ -8,19 +8,19 @@
8 * 8 *
9 * Note that the open routine for N_TTY is guaranteed never to return 9 * Note that the open routine for N_TTY is guaranteed never to return
10 * an error. This is because Linux will fall back to setting a line 10 * an error. This is because Linux will fall back to setting a line
11 * to N_TTY if it can not switch to any other line discipline. 11 * to N_TTY if it can not switch to any other line discipline.
12 * 12 *
13 * Written by Theodore Ts'o, Copyright 1994. 13 * Written by Theodore Ts'o, Copyright 1994.
14 * 14 *
15 * This file also contains code originally written by Linus Torvalds, 15 * This file also contains code originally written by Linus Torvalds,
16 * Copyright 1991, 1992, 1993, and by Julian Cowley, Copyright 1994. 16 * Copyright 1991, 1992, 1993, and by Julian Cowley, Copyright 1994.
17 * 17 *
18 * This file may be redistributed under the terms of the GNU General Public 18 * This file may be redistributed under the terms of the GNU General Public
19 * License. 19 * License.
20 * 20 *
21 * Reduced memory usage for older ARM systems - Russell King. 21 * Reduced memory usage for older ARM systems - Russell King.
22 * 22 *
23 * 2000/01/20 Fixed SMP locking on put_tty_queue using bits of 23 * 2000/01/20 Fixed SMP locking on put_tty_queue using bits of
24 * the patch by Andrew J. Kroll <ag784@freenet.buffalo.edu> 24 * the patch by Andrew J. Kroll <ag784@freenet.buffalo.edu>
25 * who actually finally proved there really was a race. 25 * who actually finally proved there really was a race.
26 * 26 *
@@ -144,11 +144,11 @@ static void put_tty_queue(unsigned char c, struct tty_struct *tty)
144 * Can sleep, may be called under the atomic_read_lock mutex but 144 * Can sleep, may be called under the atomic_read_lock mutex but
145 * this is not guaranteed. 145 * this is not guaranteed.
146 */ 146 */
147 147
148static void check_unthrottle(struct tty_struct * tty) 148static void check_unthrottle(struct tty_struct *tty)
149{ 149{
150 if (tty->count && 150 if (tty->count &&
151 test_and_clear_bit(TTY_THROTTLED, &tty->flags) && 151 test_and_clear_bit(TTY_THROTTLED, &tty->flags) &&
152 tty->driver->unthrottle) 152 tty->driver->unthrottle)
153 tty->driver->unthrottle(tty); 153 tty->driver->unthrottle(tty);
154} 154}
@@ -157,7 +157,7 @@ static void check_unthrottle(struct tty_struct * tty)
157 * reset_buffer_flags - reset buffer state 157 * reset_buffer_flags - reset buffer state
158 * @tty: terminal to reset 158 * @tty: terminal to reset
159 * 159 *
160 * Reset the read buffer counters, clear the flags, 160 * Reset the read buffer counters, clear the flags,
161 * and make sure the driver is unthrottled. Called 161 * and make sure the driver is unthrottled. Called
162 * from n_tty_open() and n_tty_flush_buffer(). 162 * from n_tty_open() and n_tty_flush_buffer().
163 */ 163 */
@@ -186,12 +186,12 @@ static void reset_buffer_flags(struct tty_struct *tty)
186 * FIXME: tty->ctrl_status is not spinlocked and relies on 186 * FIXME: tty->ctrl_status is not spinlocked and relies on
187 * lock_kernel() still. 187 * lock_kernel() still.
188 */ 188 */
189 189
190static void n_tty_flush_buffer(struct tty_struct * tty) 190static void n_tty_flush_buffer(struct tty_struct *tty)
191{ 191{
192 /* clear everything and unthrottle the driver */ 192 /* clear everything and unthrottle the driver */
193 reset_buffer_flags(tty); 193 reset_buffer_flags(tty);
194 194
195 if (!tty->link) 195 if (!tty->link)
196 return; 196 return;
197 197
@@ -206,9 +206,9 @@ static void n_tty_flush_buffer(struct tty_struct * tty)
206 * @tty: tty device 206 * @tty: tty device
207 * 207 *
208 * Report the number of characters buffered to be delivered to user 208 * Report the number of characters buffered to be delivered to user
209 * at this instant in time. 209 * at this instant in time.
210 */ 210 */
211 211
212static ssize_t n_tty_chars_in_buffer(struct tty_struct *tty) 212static ssize_t n_tty_chars_in_buffer(struct tty_struct *tty)
213{ 213{
214 unsigned long flags; 214 unsigned long flags;
@@ -234,7 +234,7 @@ static ssize_t n_tty_chars_in_buffer(struct tty_struct *tty)
234 * character. We use this to correctly compute the on screen size 234 * character. We use this to correctly compute the on screen size
235 * of the character when printing 235 * of the character when printing
236 */ 236 */
237 237
238static inline int is_utf8_continuation(unsigned char c) 238static inline int is_utf8_continuation(unsigned char c)
239{ 239{
240 return (c & 0xc0) == 0x80; 240 return (c & 0xc0) == 0x80;
@@ -247,7 +247,7 @@ static inline int is_utf8_continuation(unsigned char c)
247 * Returns true if the utf8 character 'c' is a multibyte continuation 247 * Returns true if the utf8 character 'c' is a multibyte continuation
248 * character and the terminal is in unicode mode. 248 * character and the terminal is in unicode mode.
249 */ 249 */
250 250
251static inline int is_continuation(unsigned char c, struct tty_struct *tty) 251static inline int is_continuation(unsigned char c, struct tty_struct *tty)
252{ 252{
253 return I_IUTF8(tty) && is_utf8_continuation(c); 253 return I_IUTF8(tty) && is_utf8_continuation(c);
@@ -266,7 +266,7 @@ static inline int is_continuation(unsigned char c, struct tty_struct *tty)
266 * Called from both the receive and transmit sides and can be called 266 * Called from both the receive and transmit sides and can be called
267 * re-entrantly. Relies on lock_kernel() still. 267 * re-entrantly. Relies on lock_kernel() still.
268 */ 268 */
269 269
270static int opost(unsigned char c, struct tty_struct *tty) 270static int opost(unsigned char c, struct tty_struct *tty)
271{ 271{
272 int space, spaces; 272 int space, spaces;
@@ -339,9 +339,9 @@ static int opost(unsigned char c, struct tty_struct *tty)
339 * 339 *
340 * Called from write_chan under the tty layer write lock. 340 * Called from write_chan under the tty layer write lock.
341 */ 341 */
342 342
343static ssize_t opost_block(struct tty_struct * tty, 343static ssize_t opost_block(struct tty_struct *tty,
344 const unsigned char * buf, unsigned int nr) 344 const unsigned char *buf, unsigned int nr)
345{ 345{
346 int space; 346 int space;
347 int i; 347 int i;
@@ -386,7 +386,7 @@ static ssize_t opost_block(struct tty_struct * tty,
386break_out: 386break_out:
387 if (tty->driver->flush_chars) 387 if (tty->driver->flush_chars)
388 tty->driver->flush_chars(tty); 388 tty->driver->flush_chars(tty);
389 i = tty->driver->write(tty, buf, i); 389 i = tty->driver->write(tty, buf, i);
390 return i; 390 return i;
391} 391}
392 392
@@ -398,7 +398,7 @@ break_out:
398 * 398 *
399 * Queue a byte to the driver layer for output 399 * Queue a byte to the driver layer for output
400 */ 400 */
401 401
402static inline void put_char(unsigned char c, struct tty_struct *tty) 402static inline void put_char(unsigned char c, struct tty_struct *tty)
403{ 403{
404 tty->driver->put_char(tty, c); 404 tty->driver->put_char(tty, c);
@@ -409,7 +409,7 @@ static inline void put_char(unsigned char c, struct tty_struct *tty)
409 * @c: unicode byte to echo 409 * @c: unicode byte to echo
410 * @tty: terminal device 410 * @tty: terminal device
411 * 411 *
412 * Echo user input back onto the screen. This must be called only when 412 * Echo user input back onto the screen. This must be called only when
413 * L_ECHO(tty) is true. Called from the driver receive_buf path. 413 * L_ECHO(tty) is true. Called from the driver receive_buf path.
414 */ 414 */
415 415
@@ -441,7 +441,7 @@ static inline void finish_erasing(struct tty_struct *tty)
441 * present in the stream from the driver layer. Handles the complexities 441 * present in the stream from the driver layer. Handles the complexities
442 * of UTF-8 multibyte symbols. 442 * of UTF-8 multibyte symbols.
443 */ 443 */
444 444
445static void eraser(unsigned char c, struct tty_struct *tty) 445static void eraser(unsigned char c, struct tty_struct *tty)
446{ 446{
447 enum { ERASE, WERASE, KILL } kill_type; 447 enum { ERASE, WERASE, KILL } kill_type;
@@ -541,7 +541,7 @@ static void eraser(unsigned char c, struct tty_struct *tty)
541 541
542 /* should never happen */ 542 /* should never happen */
543 if (tty->column > 0x80000000) 543 if (tty->column > 0x80000000)
544 tty->column = 0; 544 tty->column = 0;
545 545
546 /* Now backup to that column. */ 546 /* Now backup to that column. */
547 while (tty->column > col) { 547 while (tty->column > col) {
@@ -585,7 +585,7 @@ static void eraser(unsigned char c, struct tty_struct *tty)
585 * settings and character used. Called from the driver receive_buf 585 * settings and character used. Called from the driver receive_buf
586 * path so serialized. 586 * path so serialized.
587 */ 587 */
588 588
589static inline void isig(int sig, struct tty_struct *tty, int flush) 589static inline void isig(int sig, struct tty_struct *tty, int flush)
590{ 590{
591 if (tty->pgrp) 591 if (tty->pgrp)
@@ -606,7 +606,7 @@ static inline void isig(int sig, struct tty_struct *tty, int flush)
606 * 606 *
607 * Called from the receive_buf path so single threaded. 607 * Called from the receive_buf path so single threaded.
608 */ 608 */
609 609
610static inline void n_tty_receive_break(struct tty_struct *tty) 610static inline void n_tty_receive_break(struct tty_struct *tty)
611{ 611{
612 if (I_IGNBRK(tty)) 612 if (I_IGNBRK(tty))
@@ -635,7 +635,7 @@ static inline void n_tty_receive_break(struct tty_struct *tty)
635 * need locking as num_overrun and overrun_time are function 635 * need locking as num_overrun and overrun_time are function
636 * private. 636 * private.
637 */ 637 */
638 638
639static inline void n_tty_receive_overrun(struct tty_struct *tty) 639static inline void n_tty_receive_overrun(struct tty_struct *tty)
640{ 640{
641 char buf[64]; 641 char buf[64];
@@ -662,9 +662,8 @@ static inline void n_tty_receive_overrun(struct tty_struct *tty)
662static inline void n_tty_receive_parity_error(struct tty_struct *tty, 662static inline void n_tty_receive_parity_error(struct tty_struct *tty,
663 unsigned char c) 663 unsigned char c)
664{ 664{
665 if (I_IGNPAR(tty)) { 665 if (I_IGNPAR(tty))
666 return; 666 return;
667 }
668 if (I_PARMRK(tty)) { 667 if (I_PARMRK(tty)) {
669 put_tty_queue('\377', tty); 668 put_tty_queue('\377', tty);
670 put_tty_queue('\0', tty); 669 put_tty_queue('\0', tty);
@@ -682,7 +681,7 @@ static inline void n_tty_receive_parity_error(struct tty_struct *tty,
682 * @c: character 681 * @c: character
683 * 682 *
684 * Process an individual character of input received from the driver. 683 * Process an individual character of input received from the driver.
685 * This is serialized with respect to itself by the rules for the 684 * This is serialized with respect to itself by the rules for the
686 * driver above. 685 * driver above.
687 */ 686 */
688 687
@@ -694,7 +693,7 @@ static inline void n_tty_receive_char(struct tty_struct *tty, unsigned char c)
694 put_tty_queue(c, tty); 693 put_tty_queue(c, tty);
695 return; 694 return;
696 } 695 }
697 696
698 if (I_ISTRIP(tty)) 697 if (I_ISTRIP(tty))
699 c &= 0x7f; 698 c &= 0x7f;
700 if (I_IUCLC(tty) && L_IEXTEN(tty)) 699 if (I_IUCLC(tty) && L_IEXTEN(tty))
@@ -739,7 +738,7 @@ static inline void n_tty_receive_char(struct tty_struct *tty, unsigned char c)
739 put_tty_queue(c, tty); 738 put_tty_queue(c, tty);
740 return; 739 return;
741 } 740 }
742 741
743 if (c == '\r') { 742 if (c == '\r') {
744 if (I_IGNCR(tty)) 743 if (I_IGNCR(tty))
745 return; 744 return;
@@ -825,8 +824,8 @@ send_signal:
825 goto handle_newline; 824 goto handle_newline;
826 } 825 }
827 if (c == EOF_CHAR(tty)) { 826 if (c == EOF_CHAR(tty)) {
828 if (tty->canon_head != tty->read_head) 827 if (tty->canon_head != tty->read_head)
829 set_bit(TTY_PUSH, &tty->flags); 828 set_bit(TTY_PUSH, &tty->flags);
830 c = __DISABLED_CHAR; 829 c = __DISABLED_CHAR;
831 goto handle_newline; 830 goto handle_newline;
832 } 831 }
@@ -850,7 +849,7 @@ send_signal:
850 if (I_PARMRK(tty) && c == (unsigned char) '\377') 849 if (I_PARMRK(tty) && c == (unsigned char) '\377')
851 put_tty_queue(c, tty); 850 put_tty_queue(c, tty);
852 851
853 handle_newline: 852handle_newline:
854 spin_lock_irqsave(&tty->read_lock, flags); 853 spin_lock_irqsave(&tty->read_lock, flags);
855 set_bit(tty->read_head, tty->read_flags); 854 set_bit(tty->read_head, tty->read_flags);
856 put_tty_queue_nolock(c, tty); 855 put_tty_queue_nolock(c, tty);
@@ -863,7 +862,7 @@ send_signal:
863 return; 862 return;
864 } 863 }
865 } 864 }
866 865
867 finish_erasing(tty); 866 finish_erasing(tty);
868 if (L_ECHO(tty)) { 867 if (L_ECHO(tty)) {
869 if (tty->read_cnt >= N_TTY_BUF_SIZE-1) { 868 if (tty->read_cnt >= N_TTY_BUF_SIZE-1) {
@@ -884,7 +883,7 @@ send_signal:
884 put_tty_queue(c, tty); 883 put_tty_queue(c, tty);
885 884
886 put_tty_queue(c, tty); 885 put_tty_queue(c, tty);
887} 886}
888 887
889 888
890/** 889/**
@@ -898,12 +897,10 @@ send_signal:
898 897
899static void n_tty_write_wakeup(struct tty_struct *tty) 898static void n_tty_write_wakeup(struct tty_struct *tty)
900{ 899{
901 if (tty->fasync) 900 if (tty->fasync) {
902 { 901 set_bit(TTY_DO_WRITE_WAKEUP, &tty->flags);
903 set_bit(TTY_DO_WRITE_WAKEUP, &tty->flags);
904 kill_fasync(&tty->fasync, SIGIO, POLL_OUT); 902 kill_fasync(&tty->fasync, SIGIO, POLL_OUT);
905 } 903 }
906 return;
907} 904}
908 905
909/** 906/**
@@ -918,7 +915,7 @@ static void n_tty_write_wakeup(struct tty_struct *tty)
918 * not from interrupt context. The driver is responsible for making 915 * not from interrupt context. The driver is responsible for making
919 * calls one at a time and in order (or using flush_to_ldisc) 916 * calls one at a time and in order (or using flush_to_ldisc)
920 */ 917 */
921 918
922static void n_tty_receive_buf(struct tty_struct *tty, const unsigned char *cp, 919static void n_tty_receive_buf(struct tty_struct *tty, const unsigned char *cp,
923 char *fp, int count) 920 char *fp, int count)
924{ 921{
@@ -950,7 +947,7 @@ static void n_tty_receive_buf(struct tty_struct *tty, const unsigned char *cp,
950 tty->read_cnt += i; 947 tty->read_cnt += i;
951 spin_unlock_irqrestore(&tty->read_lock, cpuflags); 948 spin_unlock_irqrestore(&tty->read_lock, cpuflags);
952 } else { 949 } else {
953 for (i=count, p = cp, f = fp; i; i--, p++) { 950 for (i = count, p = cp, f = fp; i; i--, p++) {
954 if (f) 951 if (f)
955 flags = *f++; 952 flags = *f++;
956 switch (flags) { 953 switch (flags) {
@@ -968,7 +965,7 @@ static void n_tty_receive_buf(struct tty_struct *tty, const unsigned char *cp,
968 n_tty_receive_overrun(tty); 965 n_tty_receive_overrun(tty);
969 break; 966 break;
970 default: 967 default:
971 printk("%s: unknown flag %d\n", 968 printk(KERN_ERR "%s: unknown flag %d\n",
972 tty_name(tty, buf), flags); 969 tty_name(tty, buf), flags);
973 break; 970 break;
974 } 971 }
@@ -1001,7 +998,7 @@ static void n_tty_receive_buf(struct tty_struct *tty, const unsigned char *cp,
1001int is_ignored(int sig) 998int is_ignored(int sig)
1002{ 999{
1003 return (sigismember(&current->blocked, sig) || 1000 return (sigismember(&current->blocked, sig) ||
1004 current->sighand->action[sig-1].sa.sa_handler == SIG_IGN); 1001 current->sighand->action[sig-1].sa.sa_handler == SIG_IGN);
1005} 1002}
1006 1003
1007/** 1004/**
@@ -1011,16 +1008,16 @@ int is_ignored(int sig)
1011 * 1008 *
1012 * Called by the tty layer when the user changes termios flags so 1009 * Called by the tty layer when the user changes termios flags so
1013 * that the line discipline can plan ahead. This function cannot sleep 1010 * that the line discipline can plan ahead. This function cannot sleep
1014 * and is protected from re-entry by the tty layer. The user is 1011 * and is protected from re-entry by the tty layer. The user is
1015 * guaranteed that this function will not be re-entered or in progress 1012 * guaranteed that this function will not be re-entered or in progress
1016 * when the ldisc is closed. 1013 * when the ldisc is closed.
1017 */ 1014 */
1018 1015
1019static void n_tty_set_termios(struct tty_struct *tty, struct ktermios * old) 1016static void n_tty_set_termios(struct tty_struct *tty, struct ktermios *old)
1020{ 1017{
1021 if (!tty) 1018 if (!tty)
1022 return; 1019 return;
1023 1020
1024 tty->icanon = (L_ICANON(tty) != 0); 1021 tty->icanon = (L_ICANON(tty) != 0);
1025 if (test_bit(TTY_HW_COOK_IN, &tty->flags)) { 1022 if (test_bit(TTY_HW_COOK_IN, &tty->flags)) {
1026 tty->raw = 1; 1023 tty->raw = 1;
@@ -1085,12 +1082,12 @@ static void n_tty_set_termios(struct tty_struct *tty, struct ktermios * old)
1085 * n_tty_close - close the ldisc for this tty 1082 * n_tty_close - close the ldisc for this tty
1086 * @tty: device 1083 * @tty: device
1087 * 1084 *
1088 * Called from the terminal layer when this line discipline is 1085 * Called from the terminal layer when this line discipline is
1089 * being shut down, either because of a close or becsuse of a 1086 * being shut down, either because of a close or becsuse of a
1090 * discipline change. The function will not be called while other 1087 * discipline change. The function will not be called while other
1091 * ldisc methods are in progress. 1088 * ldisc methods are in progress.
1092 */ 1089 */
1093 1090
1094static void n_tty_close(struct tty_struct *tty) 1091static void n_tty_close(struct tty_struct *tty)
1095{ 1092{
1096 n_tty_flush_buffer(tty); 1093 n_tty_flush_buffer(tty);
@@ -1104,7 +1101,7 @@ static void n_tty_close(struct tty_struct *tty)
1104 * n_tty_open - open an ldisc 1101 * n_tty_open - open an ldisc
1105 * @tty: terminal to open 1102 * @tty: terminal to open
1106 * 1103 *
1107 * Called when this line discipline is being attached to the 1104 * Called when this line discipline is being attached to the
1108 * terminal device. Can sleep. Called serialized so that no 1105 * terminal device. Can sleep. Called serialized so that no
1109 * other events will occur in parallel. No further open will occur 1106 * other events will occur in parallel. No further open will occur
1110 * until a close. 1107 * until a close.
@@ -1157,7 +1154,7 @@ static inline int input_available_p(struct tty_struct *tty, int amt)
1157 * Called under the tty->atomic_read_lock sem 1154 * Called under the tty->atomic_read_lock sem
1158 * 1155 *
1159 */ 1156 */
1160 1157
1161static int copy_from_read_buf(struct tty_struct *tty, 1158static int copy_from_read_buf(struct tty_struct *tty,
1162 unsigned char __user **b, 1159 unsigned char __user **b,
1163 size_t *nr) 1160 size_t *nr)
@@ -1186,7 +1183,8 @@ static int copy_from_read_buf(struct tty_struct *tty,
1186 return retval; 1183 return retval;
1187} 1184}
1188 1185
1189extern ssize_t redirected_tty_write(struct file *,const char *,size_t,loff_t *); 1186extern ssize_t redirected_tty_write(struct file *, const char *,
1187 size_t, loff_t *);
1190 1188
1191/** 1189/**
1192 * job_control - check job control 1190 * job_control - check job control
@@ -1194,10 +1192,10 @@ extern ssize_t redirected_tty_write(struct file *,const char *,size_t,loff_t *);
1194 * @file: file handle 1192 * @file: file handle
1195 * 1193 *
1196 * Perform job control management checks on this file/tty descriptor 1194 * Perform job control management checks on this file/tty descriptor
1197 * and if appropriate send any needed signals and return a negative 1195 * and if appropriate send any needed signals and return a negative
1198 * error code if action should be taken. 1196 * error code if action should be taken.
1199 */ 1197 */
1200 1198
1201static int job_control(struct tty_struct *tty, struct file *file) 1199static int job_control(struct tty_struct *tty, struct file *file)
1202{ 1200{
1203 /* Job control check -- must be done at start and after 1201 /* Job control check -- must be done at start and after
@@ -1208,7 +1206,7 @@ static int job_control(struct tty_struct *tty, struct file *file)
1208 if (file->f_op->write != redirected_tty_write && 1206 if (file->f_op->write != redirected_tty_write &&
1209 current->signal->tty == tty) { 1207 current->signal->tty == tty) {
1210 if (!tty->pgrp) 1208 if (!tty->pgrp)
1211 printk("read_chan: no tty->pgrp!\n"); 1209 printk(KERN_ERR "read_chan: no tty->pgrp!\n");
1212 else if (task_pgrp(current) != tty->pgrp) { 1210 else if (task_pgrp(current) != tty->pgrp) {
1213 if (is_ignored(SIGTTIN) || 1211 if (is_ignored(SIGTTIN) ||
1214 is_current_pgrp_orphaned()) 1212 is_current_pgrp_orphaned())
@@ -1220,7 +1218,7 @@ static int job_control(struct tty_struct *tty, struct file *file)
1220 } 1218 }
1221 return 0; 1219 return 0;
1222} 1220}
1223 1221
1224 1222
1225/** 1223/**
1226 * read_chan - read function for tty 1224 * read_chan - read function for tty
@@ -1236,7 +1234,7 @@ static int job_control(struct tty_struct *tty, struct file *file)
1236 * 1234 *
1237 * This code must be sure never to sleep through a hangup. 1235 * This code must be sure never to sleep through a hangup.
1238 */ 1236 */
1239 1237
1240static ssize_t read_chan(struct tty_struct *tty, struct file *file, 1238static ssize_t read_chan(struct tty_struct *tty, struct file *file,
1241 unsigned char __user *buf, size_t nr) 1239 unsigned char __user *buf, size_t nr)
1242{ 1240{
@@ -1252,14 +1250,14 @@ static ssize_t read_chan(struct tty_struct *tty, struct file *file,
1252do_it_again: 1250do_it_again:
1253 1251
1254 if (!tty->read_buf) { 1252 if (!tty->read_buf) {
1255 printk("n_tty_read_chan: called with read_buf == NULL?!?\n"); 1253 printk(KERN_ERR "n_tty_read_chan: read_buf == NULL?!?\n");
1256 return -EIO; 1254 return -EIO;
1257 } 1255 }
1258 1256
1259 c = job_control(tty, file); 1257 c = job_control(tty, file);
1260 if(c < 0) 1258 if (c < 0)
1261 return c; 1259 return c;
1262 1260
1263 minimum = time = 0; 1261 minimum = time = 0;
1264 timeout = MAX_SCHEDULE_TIMEOUT; 1262 timeout = MAX_SCHEDULE_TIMEOUT;
1265 if (!tty->icanon) { 1263 if (!tty->icanon) {
@@ -1287,8 +1285,7 @@ do_it_again:
1287 if (file->f_flags & O_NONBLOCK) { 1285 if (file->f_flags & O_NONBLOCK) {
1288 if (!mutex_trylock(&tty->atomic_read_lock)) 1286 if (!mutex_trylock(&tty->atomic_read_lock))
1289 return -EAGAIN; 1287 return -EAGAIN;
1290 } 1288 } else {
1291 else {
1292 if (mutex_lock_interruptible(&tty->atomic_read_lock)) 1289 if (mutex_lock_interruptible(&tty->atomic_read_lock))
1293 return -ERESTARTSYS; 1290 return -ERESTARTSYS;
1294 } 1291 }
@@ -1314,11 +1311,11 @@ do_it_again:
1314 so that any interrupt will set the state back to 1311 so that any interrupt will set the state back to
1315 TASK_RUNNING. */ 1312 TASK_RUNNING. */
1316 set_current_state(TASK_INTERRUPTIBLE); 1313 set_current_state(TASK_INTERRUPTIBLE);
1317 1314
1318 if (((minimum - (b - buf)) < tty->minimum_to_wake) && 1315 if (((minimum - (b - buf)) < tty->minimum_to_wake) &&
1319 ((minimum - (b - buf)) >= 1)) 1316 ((minimum - (b - buf)) >= 1))
1320 tty->minimum_to_wake = (minimum - (b - buf)); 1317 tty->minimum_to_wake = (minimum - (b - buf));
1321 1318
1322 if (!input_available_p(tty, 0)) { 1319 if (!input_available_p(tty, 0)) {
1323 if (test_bit(TTY_OTHER_CLOSED, &tty->flags)) { 1320 if (test_bit(TTY_OTHER_CLOSED, &tty->flags)) {
1324 retval = -EIO; 1321 retval = -EIO;
@@ -1355,7 +1352,7 @@ do_it_again:
1355 if (tty->icanon) { 1352 if (tty->icanon) {
1356 /* N.B. avoid overrun if nr == 0 */ 1353 /* N.B. avoid overrun if nr == 0 */
1357 while (nr && tty->read_cnt) { 1354 while (nr && tty->read_cnt) {
1358 int eol; 1355 int eol;
1359 1356
1360 eol = test_and_clear_bit(tty->read_tail, 1357 eol = test_and_clear_bit(tty->read_tail,
1361 tty->read_flags); 1358 tty->read_flags);
@@ -1427,7 +1424,7 @@ do_it_again:
1427 if (size) { 1424 if (size) {
1428 retval = size; 1425 retval = size;
1429 if (nr) 1426 if (nr)
1430 clear_bit(TTY_PUSH, &tty->flags); 1427 clear_bit(TTY_PUSH, &tty->flags);
1431 } else if (test_and_clear_bit(TTY_PUSH, &tty->flags)) 1428 } else if (test_and_clear_bit(TTY_PUSH, &tty->flags))
1432 goto do_it_again; 1429 goto do_it_again;
1433 1430
@@ -1450,9 +1447,9 @@ do_it_again:
1450 * 1447 *
1451 * This code must be sure never to sleep through a hangup. 1448 * This code must be sure never to sleep through a hangup.
1452 */ 1449 */
1453 1450
1454static ssize_t write_chan(struct tty_struct * tty, struct file * file, 1451static ssize_t write_chan(struct tty_struct *tty, struct file *file,
1455 const unsigned char * buf, size_t nr) 1452 const unsigned char *buf, size_t nr)
1456{ 1453{
1457 const unsigned char *b = buf; 1454 const unsigned char *b = buf;
1458 DECLARE_WAITQUEUE(wait, current); 1455 DECLARE_WAITQUEUE(wait, current);
@@ -1542,8 +1539,9 @@ break_out:
1542 * recompute the new limits. Possibly set_termios should issue 1539 * recompute the new limits. Possibly set_termios should issue
1543 * a read wakeup to fix this bug. 1540 * a read wakeup to fix this bug.
1544 */ 1541 */
1545 1542
1546static unsigned int normal_poll(struct tty_struct * tty, struct file * file, poll_table *wait) 1543static unsigned int normal_poll(struct tty_struct *tty, struct file *file,
1544 poll_table *wait)
1547{ 1545{
1548 unsigned int mask = 0; 1546 unsigned int mask = 0;
1549 1547
diff --git a/drivers/char/rocket.c b/drivers/char/rocket.c
index 68c289fe2dc2..72f289279d8f 100644
--- a/drivers/char/rocket.c
+++ b/drivers/char/rocket.c
@@ -715,11 +715,10 @@ static void configure_r_port(struct r_port *info,
715 unsigned rocketMode; 715 unsigned rocketMode;
716 int bits, baud, divisor; 716 int bits, baud, divisor;
717 CHANNEL_t *cp; 717 CHANNEL_t *cp;
718 struct ktermios *t = info->tty->termios;
718 719
719 if (!info->tty || !info->tty->termios)
720 return;
721 cp = &info->channel; 720 cp = &info->channel;
722 cflag = info->tty->termios->c_cflag; 721 cflag = t->c_cflag;
723 722
724 /* Byte size and parity */ 723 /* Byte size and parity */
725 if ((cflag & CSIZE) == CS8) { 724 if ((cflag & CSIZE) == CS8) {
@@ -754,10 +753,7 @@ static void configure_r_port(struct r_port *info,
754 baud = 9600; 753 baud = 9600;
755 divisor = ((rp_baud_base[info->board] + (baud >> 1)) / baud) - 1; 754 divisor = ((rp_baud_base[info->board] + (baud >> 1)) / baud) - 1;
756 if ((divisor >= 8192 || divisor < 0) && old_termios) { 755 if ((divisor >= 8192 || divisor < 0) && old_termios) {
757 info->tty->termios->c_cflag &= ~CBAUD; 756 baud = tty_termios_baud_rate(old_termios);
758 info->tty->termios->c_cflag |=
759 (old_termios->c_cflag & CBAUD);
760 baud = tty_get_baud_rate(info->tty);
761 if (!baud) 757 if (!baud)
762 baud = 9600; 758 baud = 9600;
763 divisor = (rp_baud_base[info->board] / baud) - 1; 759 divisor = (rp_baud_base[info->board] / baud) - 1;
@@ -769,6 +765,9 @@ static void configure_r_port(struct r_port *info,
769 info->cps = baud / bits; 765 info->cps = baud / bits;
770 sSetBaud(cp, divisor); 766 sSetBaud(cp, divisor);
771 767
768 /* FIXME: Should really back compute a baud rate from the divisor */
769 tty_encode_baud_rate(info->tty, baud, baud);
770
772 if (cflag & CRTSCTS) { 771 if (cflag & CRTSCTS) {
773 info->intmask |= DELTA_CTS; 772 info->intmask |= DELTA_CTS;
774 sEnCTSFlowCtl(cp); 773 sEnCTSFlowCtl(cp);
@@ -1202,15 +1201,14 @@ static void rp_set_termios(struct tty_struct *tty,
1202 1201
1203 cflag = tty->termios->c_cflag; 1202 cflag = tty->termios->c_cflag;
1204 1203
1205 if (cflag == old_termios->c_cflag)
1206 return;
1207
1208 /* 1204 /*
1209 * This driver doesn't support CS5 or CS6 1205 * This driver doesn't support CS5 or CS6
1210 */ 1206 */
1211 if (((cflag & CSIZE) == CS5) || ((cflag & CSIZE) == CS6)) 1207 if (((cflag & CSIZE) == CS5) || ((cflag & CSIZE) == CS6))
1212 tty->termios->c_cflag = 1208 tty->termios->c_cflag =
1213 ((cflag & ~CSIZE) | (old_termios->c_cflag & CSIZE)); 1209 ((cflag & ~CSIZE) | (old_termios->c_cflag & CSIZE));
1210 /* Or CMSPAR */
1211 tty->termios->c_cflag &= ~CMSPAR;
1214 1212
1215 configure_r_port(info, old_termios); 1213 configure_r_port(info, old_termios);
1216 1214
@@ -1401,6 +1399,9 @@ static int reset_rm2(struct r_port *info, void __user *arg)
1401{ 1399{
1402 int reset; 1400 int reset;
1403 1401
1402 if (!capable(CAP_SYS_ADMIN))
1403 return -EPERM;
1404
1404 if (copy_from_user(&reset, arg, sizeof (int))) 1405 if (copy_from_user(&reset, arg, sizeof (int)))
1405 return -EFAULT; 1406 return -EFAULT;
1406 if (reset) 1407 if (reset)
diff --git a/drivers/char/tty_audit.c b/drivers/char/tty_audit.c
index bacded0eefab..7722466e052f 100644
--- a/drivers/char/tty_audit.c
+++ b/drivers/char/tty_audit.c
@@ -27,7 +27,7 @@ static struct tty_audit_buf *tty_audit_buf_alloc(int major, int minor,
27{ 27{
28 struct tty_audit_buf *buf; 28 struct tty_audit_buf *buf;
29 29
30 buf = kmalloc(sizeof (*buf), GFP_KERNEL); 30 buf = kmalloc(sizeof(*buf), GFP_KERNEL);
31 if (!buf) 31 if (!buf)
32 goto err; 32 goto err;
33 if (PAGE_SIZE != N_TTY_BUF_SIZE) 33 if (PAGE_SIZE != N_TTY_BUF_SIZE)
diff --git a/drivers/char/tty_io.c b/drivers/char/tty_io.c
index 79c86c47947f..613ec816ce60 100644
--- a/drivers/char/tty_io.c
+++ b/drivers/char/tty_io.c
@@ -19,7 +19,7 @@
19 * Also restructured routines so that there is more of a separation 19 * Also restructured routines so that there is more of a separation
20 * between the high-level tty routines (tty_io.c and tty_ioctl.c) and 20 * between the high-level tty routines (tty_io.c and tty_ioctl.c) and
21 * the low-level tty routines (serial.c, pty.c, console.c). This 21 * the low-level tty routines (serial.c, pty.c, console.c). This
22 * makes for cleaner and more compact code. -TYT, 9/17/92 22 * makes for cleaner and more compact code. -TYT, 9/17/92
23 * 23 *
24 * Modified by Fred N. van Kempen, 01/29/93, to add line disciplines 24 * Modified by Fred N. van Kempen, 01/29/93, to add line disciplines
25 * which can be dynamically activated and de-activated by the line 25 * which can be dynamically activated and de-activated by the line
@@ -41,7 +41,7 @@
41 * 41 *
42 * New TIOCLINUX variants added. 42 * New TIOCLINUX variants added.
43 * -- mj@k332.feld.cvut.cz, 19-Nov-95 43 * -- mj@k332.feld.cvut.cz, 19-Nov-95
44 * 44 *
45 * Restrict vt switching via ioctl() 45 * Restrict vt switching via ioctl()
46 * -- grif@cs.ucr.edu, 5-Dec-95 46 * -- grif@cs.ucr.edu, 5-Dec-95
47 * 47 *
@@ -62,7 +62,8 @@
62 * -- Russell King <rmk@arm.linux.org.uk> 62 * -- Russell King <rmk@arm.linux.org.uk>
63 * 63 *
64 * Move do_SAK() into process context. Less stack use in devfs functions. 64 * Move do_SAK() into process context. Less stack use in devfs functions.
65 * alloc_tty_struct() always uses kmalloc() -- Andrew Morton <andrewm@uow.edu.eu> 17Mar01 65 * alloc_tty_struct() always uses kmalloc()
66 * -- Andrew Morton <andrewm@uow.edu.eu> 17Mar01
66 */ 67 */
67 68
68#include <linux/types.h> 69#include <linux/types.h>
@@ -126,7 +127,7 @@ EXPORT_SYMBOL(tty_std_termios);
126/* This list gets poked at by procfs and various bits of boot up code. This 127/* This list gets poked at by procfs and various bits of boot up code. This
127 could do with some rationalisation such as pulling the tty proc function 128 could do with some rationalisation such as pulling the tty proc function
128 into this file */ 129 into this file */
129 130
130LIST_HEAD(tty_drivers); /* linked list of tty drivers */ 131LIST_HEAD(tty_drivers); /* linked list of tty drivers */
131 132
132/* Mutex to protect creating and releasing a tty. This is shared with 133/* Mutex to protect creating and releasing a tty. This is shared with
@@ -136,7 +137,7 @@ EXPORT_SYMBOL(tty_mutex);
136 137
137#ifdef CONFIG_UNIX98_PTYS 138#ifdef CONFIG_UNIX98_PTYS
138extern struct tty_driver *ptm_driver; /* Unix98 pty masters; for /dev/ptmx */ 139extern struct tty_driver *ptm_driver; /* Unix98 pty masters; for /dev/ptmx */
139extern int pty_limit; /* Config limit on Unix98 ptys */ 140extern int pty_limit; /* Config limit on Unix98 ptys */
140static DEFINE_IDR(allocated_ptys); 141static DEFINE_IDR(allocated_ptys);
141static DEFINE_MUTEX(allocated_ptys_lock); 142static DEFINE_MUTEX(allocated_ptys_lock);
142static int ptmx_open(struct inode *, struct file *); 143static int ptmx_open(struct inode *, struct file *);
@@ -146,19 +147,20 @@ static void initialize_tty_struct(struct tty_struct *tty);
146 147
147static ssize_t tty_read(struct file *, char __user *, size_t, loff_t *); 148static ssize_t tty_read(struct file *, char __user *, size_t, loff_t *);
148static ssize_t tty_write(struct file *, const char __user *, size_t, loff_t *); 149static ssize_t tty_write(struct file *, const char __user *, size_t, loff_t *);
149ssize_t redirected_tty_write(struct file *, const char __user *, size_t, loff_t *); 150ssize_t redirected_tty_write(struct file *, const char __user *,
151 size_t, loff_t *);
150static unsigned int tty_poll(struct file *, poll_table *); 152static unsigned int tty_poll(struct file *, poll_table *);
151static int tty_open(struct inode *, struct file *); 153static int tty_open(struct inode *, struct file *);
152static int tty_release(struct inode *, struct file *); 154static int tty_release(struct inode *, struct file *);
153int tty_ioctl(struct inode * inode, struct file * file, 155int tty_ioctl(struct inode *inode, struct file *file,
154 unsigned int cmd, unsigned long arg); 156 unsigned int cmd, unsigned long arg);
155#ifdef CONFIG_COMPAT 157#ifdef CONFIG_COMPAT
156static long tty_compat_ioctl(struct file * file, unsigned int cmd, 158static long tty_compat_ioctl(struct file *file, unsigned int cmd,
157 unsigned long arg); 159 unsigned long arg);
158#else 160#else
159#define tty_compat_ioctl NULL 161#define tty_compat_ioctl NULL
160#endif 162#endif
161static int tty_fasync(int fd, struct file * filp, int on); 163static int tty_fasync(int fd, struct file *filp, int on);
162static void release_tty(struct tty_struct *tty, int idx); 164static void release_tty(struct tty_struct *tty, int idx);
163static void __proc_set_tty(struct task_struct *tsk, struct tty_struct *tty); 165static void __proc_set_tty(struct task_struct *tsk, struct tty_struct *tty);
164static void proc_set_tty(struct task_struct *tsk, struct tty_struct *tty); 166static void proc_set_tty(struct task_struct *tsk, struct tty_struct *tty);
@@ -244,7 +246,7 @@ static int check_tty_count(struct tty_struct *tty, const char *routine)
244#ifdef CHECK_TTY_COUNT 246#ifdef CHECK_TTY_COUNT
245 struct list_head *p; 247 struct list_head *p;
246 int count = 0; 248 int count = 0;
247 249
248 file_list_lock(); 250 file_list_lock();
249 list_for_each(p, &tty->tty_files) { 251 list_for_each(p, &tty->tty_files) {
250 count++; 252 count++;
@@ -281,11 +283,11 @@ static int check_tty_count(struct tty_struct *tty, const char *routine)
281static void tty_buffer_free_all(struct tty_struct *tty) 283static void tty_buffer_free_all(struct tty_struct *tty)
282{ 284{
283 struct tty_buffer *thead; 285 struct tty_buffer *thead;
284 while((thead = tty->buf.head) != NULL) { 286 while ((thead = tty->buf.head) != NULL) {
285 tty->buf.head = thead->next; 287 tty->buf.head = thead->next;
286 kfree(thead); 288 kfree(thead);
287 } 289 }
288 while((thead = tty->buf.free) != NULL) { 290 while ((thead = tty->buf.free) != NULL) {
289 tty->buf.free = thead->next; 291 tty->buf.free = thead->next;
290 kfree(thead); 292 kfree(thead);
291 } 293 }
@@ -331,7 +333,7 @@ static struct tty_buffer *tty_buffer_alloc(struct tty_struct *tty, size_t size)
331 if (tty->buf.memory_used + size > 65536) 333 if (tty->buf.memory_used + size > 65536)
332 return NULL; 334 return NULL;
333 p = kmalloc(sizeof(struct tty_buffer) + 2 * size, GFP_ATOMIC); 335 p = kmalloc(sizeof(struct tty_buffer) + 2 * size, GFP_ATOMIC);
334 if(p == NULL) 336 if (p == NULL)
335 return NULL; 337 return NULL;
336 p->used = 0; 338 p->used = 0;
337 p->size = size; 339 p->size = size;
@@ -361,7 +363,7 @@ static void tty_buffer_free(struct tty_struct *tty, struct tty_buffer *b)
361 tty->buf.memory_used -= b->size; 363 tty->buf.memory_used -= b->size;
362 WARN_ON(tty->buf.memory_used < 0); 364 WARN_ON(tty->buf.memory_used < 0);
363 365
364 if(b->size >= 512) 366 if (b->size >= 512)
365 kfree(b); 367 kfree(b);
366 else { 368 else {
367 b->next = tty->buf.free; 369 b->next = tty->buf.free;
@@ -384,7 +386,7 @@ static void __tty_buffer_flush(struct tty_struct *tty)
384{ 386{
385 struct tty_buffer *thead; 387 struct tty_buffer *thead;
386 388
387 while((thead = tty->buf.head) != NULL) { 389 while ((thead = tty->buf.head) != NULL) {
388 tty->buf.head = thead->next; 390 tty->buf.head = thead->next;
389 tty_buffer_free(tty, thead); 391 tty_buffer_free(tty, thead);
390 } 392 }
@@ -436,9 +438,9 @@ static void tty_buffer_flush(struct tty_struct *tty)
436static struct tty_buffer *tty_buffer_find(struct tty_struct *tty, size_t size) 438static struct tty_buffer *tty_buffer_find(struct tty_struct *tty, size_t size)
437{ 439{
438 struct tty_buffer **tbh = &tty->buf.free; 440 struct tty_buffer **tbh = &tty->buf.free;
439 while((*tbh) != NULL) { 441 while ((*tbh) != NULL) {
440 struct tty_buffer *t = *tbh; 442 struct tty_buffer *t = *tbh;
441 if(t->size >= size) { 443 if (t->size >= size) {
442 *tbh = t->next; 444 *tbh = t->next;
443 t->next = NULL; 445 t->next = NULL;
444 t->used = 0; 446 t->used = 0;
@@ -450,7 +452,7 @@ static struct tty_buffer *tty_buffer_find(struct tty_struct *tty, size_t size)
450 tbh = &((*tbh)->next); 452 tbh = &((*tbh)->next);
451 } 453 }
452 /* Round the buffer size out */ 454 /* Round the buffer size out */
453 size = (size + 0xFF) & ~ 0xFF; 455 size = (size + 0xFF) & ~0xFF;
454 return tty_buffer_alloc(tty, size); 456 return tty_buffer_alloc(tty, size);
455 /* Should possibly check if this fails for the largest buffer we 457 /* Should possibly check if this fails for the largest buffer we
456 have queued and recycle that ? */ 458 have queued and recycle that ? */
@@ -520,7 +522,7 @@ int tty_insert_flip_string(struct tty_struct *tty, const unsigned char *chars,
520 int space = tty_buffer_request_room(tty, size - copied); 522 int space = tty_buffer_request_room(tty, size - copied);
521 struct tty_buffer *tb = tty->buf.tail; 523 struct tty_buffer *tb = tty->buf.tail;
522 /* If there is no space then tb may be NULL */ 524 /* If there is no space then tb may be NULL */
523 if(unlikely(space == 0)) 525 if (unlikely(space == 0))
524 break; 526 break;
525 memcpy(tb->char_buf_ptr + tb->used, chars, space); 527 memcpy(tb->char_buf_ptr + tb->used, chars, space);
526 memset(tb->flag_buf_ptr + tb->used, TTY_NORMAL, space); 528 memset(tb->flag_buf_ptr + tb->used, TTY_NORMAL, space);
@@ -556,7 +558,7 @@ int tty_insert_flip_string_flags(struct tty_struct *tty,
556 int space = tty_buffer_request_room(tty, size - copied); 558 int space = tty_buffer_request_room(tty, size - copied);
557 struct tty_buffer *tb = tty->buf.tail; 559 struct tty_buffer *tb = tty->buf.tail;
558 /* If there is no space then tb may be NULL */ 560 /* If there is no space then tb may be NULL */
559 if(unlikely(space == 0)) 561 if (unlikely(space == 0))
560 break; 562 break;
561 memcpy(tb->char_buf_ptr + tb->used, chars, space); 563 memcpy(tb->char_buf_ptr + tb->used, chars, space);
562 memcpy(tb->flag_buf_ptr + tb->used, flags, space); 564 memcpy(tb->flag_buf_ptr + tb->used, flags, space);
@@ -608,7 +610,8 @@ EXPORT_SYMBOL(tty_schedule_flip);
608 * Locking: May call functions taking tty->buf.lock 610 * Locking: May call functions taking tty->buf.lock
609 */ 611 */
610 612
611int tty_prepare_flip_string(struct tty_struct *tty, unsigned char **chars, size_t size) 613int tty_prepare_flip_string(struct tty_struct *tty, unsigned char **chars,
614 size_t size)
612{ 615{
613 int space = tty_buffer_request_room(tty, size); 616 int space = tty_buffer_request_room(tty, size);
614 if (likely(space)) { 617 if (likely(space)) {
@@ -638,7 +641,8 @@ EXPORT_SYMBOL_GPL(tty_prepare_flip_string);
638 * Locking: May call functions taking tty->buf.lock 641 * Locking: May call functions taking tty->buf.lock
639 */ 642 */
640 643
641int tty_prepare_flip_string_flags(struct tty_struct *tty, unsigned char **chars, char **flags, size_t size) 644int tty_prepare_flip_string_flags(struct tty_struct *tty,
645 unsigned char **chars, char **flags, size_t size)
642{ 646{
643 int space = tty_buffer_request_room(tty, size); 647 int space = tty_buffer_request_room(tty, size);
644 if (likely(space)) { 648 if (likely(space)) {
@@ -660,12 +664,12 @@ EXPORT_SYMBOL_GPL(tty_prepare_flip_string_flags);
660 * @num: line discipline number 664 * @num: line discipline number
661 * 665 *
662 * This is probably overkill for real world processors but 666 * This is probably overkill for real world processors but
663 * they are not on hot paths so a little discipline won't do 667 * they are not on hot paths so a little discipline won't do
664 * any harm. 668 * any harm.
665 * 669 *
666 * Locking: takes termios_mutex 670 * Locking: takes termios_mutex
667 */ 671 */
668 672
669static void tty_set_termios_ldisc(struct tty_struct *tty, int num) 673static void tty_set_termios_ldisc(struct tty_struct *tty, int num)
670{ 674{
671 mutex_lock(&tty->termios_mutex); 675 mutex_lock(&tty->termios_mutex);
@@ -678,10 +682,11 @@ static void tty_set_termios_ldisc(struct tty_struct *tty, int num)
678 * must be taken with irqs off because there are hangup path 682 * must be taken with irqs off because there are hangup path
679 * callers who will do ldisc lookups and cannot sleep. 683 * callers who will do ldisc lookups and cannot sleep.
680 */ 684 */
681 685
682static DEFINE_SPINLOCK(tty_ldisc_lock); 686static DEFINE_SPINLOCK(tty_ldisc_lock);
683static DECLARE_WAIT_QUEUE_HEAD(tty_ldisc_wait); 687static DECLARE_WAIT_QUEUE_HEAD(tty_ldisc_wait);
684static struct tty_ldisc tty_ldiscs[NR_LDISCS]; /* line disc dispatch table */ 688/* Line disc dispatch table */
689static struct tty_ldisc tty_ldiscs[NR_LDISCS];
685 690
686/** 691/**
687 * tty_register_ldisc - install a line discipline 692 * tty_register_ldisc - install a line discipline
@@ -700,17 +705,17 @@ int tty_register_ldisc(int disc, struct tty_ldisc *new_ldisc)
700{ 705{
701 unsigned long flags; 706 unsigned long flags;
702 int ret = 0; 707 int ret = 0;
703 708
704 if (disc < N_TTY || disc >= NR_LDISCS) 709 if (disc < N_TTY || disc >= NR_LDISCS)
705 return -EINVAL; 710 return -EINVAL;
706 711
707 spin_lock_irqsave(&tty_ldisc_lock, flags); 712 spin_lock_irqsave(&tty_ldisc_lock, flags);
708 tty_ldiscs[disc] = *new_ldisc; 713 tty_ldiscs[disc] = *new_ldisc;
709 tty_ldiscs[disc].num = disc; 714 tty_ldiscs[disc].num = disc;
710 tty_ldiscs[disc].flags |= LDISC_FLAG_DEFINED; 715 tty_ldiscs[disc].flags |= LDISC_FLAG_DEFINED;
711 tty_ldiscs[disc].refcount = 0; 716 tty_ldiscs[disc].refcount = 0;
712 spin_unlock_irqrestore(&tty_ldisc_lock, flags); 717 spin_unlock_irqrestore(&tty_ldisc_lock, flags);
713 718
714 return ret; 719 return ret;
715} 720}
716EXPORT_SYMBOL(tty_register_ldisc); 721EXPORT_SYMBOL(tty_register_ldisc);
@@ -766,20 +771,18 @@ struct tty_ldisc *tty_ldisc_get(int disc)
766 771
767 if (disc < N_TTY || disc >= NR_LDISCS) 772 if (disc < N_TTY || disc >= NR_LDISCS)
768 return NULL; 773 return NULL;
769 774
770 spin_lock_irqsave(&tty_ldisc_lock, flags); 775 spin_lock_irqsave(&tty_ldisc_lock, flags);
771 776
772 ld = &tty_ldiscs[disc]; 777 ld = &tty_ldiscs[disc];
773 /* Check the entry is defined */ 778 /* Check the entry is defined */
774 if(ld->flags & LDISC_FLAG_DEFINED) 779 if (ld->flags & LDISC_FLAG_DEFINED) {
775 {
776 /* If the module is being unloaded we can't use it */ 780 /* If the module is being unloaded we can't use it */
777 if (!try_module_get(ld->owner)) 781 if (!try_module_get(ld->owner))
778 ld = NULL; 782 ld = NULL;
779 else /* lock it */ 783 else /* lock it */
780 ld->refcount++; 784 ld->refcount++;
781 } 785 } else
782 else
783 ld = NULL; 786 ld = NULL;
784 spin_unlock_irqrestore(&tty_ldisc_lock, flags); 787 spin_unlock_irqrestore(&tty_ldisc_lock, flags);
785 return ld; 788 return ld;
@@ -802,9 +805,9 @@ void tty_ldisc_put(int disc)
802{ 805{
803 struct tty_ldisc *ld; 806 struct tty_ldisc *ld;
804 unsigned long flags; 807 unsigned long flags;
805 808
806 BUG_ON(disc < N_TTY || disc >= NR_LDISCS); 809 BUG_ON(disc < N_TTY || disc >= NR_LDISCS);
807 810
808 spin_lock_irqsave(&tty_ldisc_lock, flags); 811 spin_lock_irqsave(&tty_ldisc_lock, flags);
809 ld = &tty_ldiscs[disc]; 812 ld = &tty_ldiscs[disc];
810 BUG_ON(ld->refcount == 0); 813 BUG_ON(ld->refcount == 0);
@@ -812,7 +815,7 @@ void tty_ldisc_put(int disc)
812 module_put(ld->owner); 815 module_put(ld->owner);
813 spin_unlock_irqrestore(&tty_ldisc_lock, flags); 816 spin_unlock_irqrestore(&tty_ldisc_lock, flags);
814} 817}
815 818
816EXPORT_SYMBOL_GPL(tty_ldisc_put); 819EXPORT_SYMBOL_GPL(tty_ldisc_put);
817 820
818/** 821/**
@@ -851,11 +854,10 @@ static int tty_ldisc_try(struct tty_struct *tty)
851 unsigned long flags; 854 unsigned long flags;
852 struct tty_ldisc *ld; 855 struct tty_ldisc *ld;
853 int ret = 0; 856 int ret = 0;
854 857
855 spin_lock_irqsave(&tty_ldisc_lock, flags); 858 spin_lock_irqsave(&tty_ldisc_lock, flags);
856 ld = &tty->ldisc; 859 ld = &tty->ldisc;
857 if(test_bit(TTY_LDISC, &tty->flags)) 860 if (test_bit(TTY_LDISC, &tty->flags)) {
858 {
859 ld->refcount++; 861 ld->refcount++;
860 ret = 1; 862 ret = 1;
861 } 863 }
@@ -867,8 +869,8 @@ static int tty_ldisc_try(struct tty_struct *tty)
867 * tty_ldisc_ref_wait - wait for the tty ldisc 869 * tty_ldisc_ref_wait - wait for the tty ldisc
868 * @tty: tty device 870 * @tty: tty device
869 * 871 *
870 * Dereference the line discipline for the terminal and take a 872 * Dereference the line discipline for the terminal and take a
871 * reference to it. If the line discipline is in flux then 873 * reference to it. If the line discipline is in flux then
872 * wait patiently until it changes. 874 * wait patiently until it changes.
873 * 875 *
874 * Note: Must not be called from an IRQ/timer context. The caller 876 * Note: Must not be called from an IRQ/timer context. The caller
@@ -878,12 +880,12 @@ static int tty_ldisc_try(struct tty_struct *tty)
878 * 880 *
879 * Locking: call functions take tty_ldisc_lock 881 * Locking: call functions take tty_ldisc_lock
880 */ 882 */
881 883
882struct tty_ldisc *tty_ldisc_ref_wait(struct tty_struct *tty) 884struct tty_ldisc *tty_ldisc_ref_wait(struct tty_struct *tty)
883{ 885{
884 /* wait_event is a macro */ 886 /* wait_event is a macro */
885 wait_event(tty_ldisc_wait, tty_ldisc_try(tty)); 887 wait_event(tty_ldisc_wait, tty_ldisc_try(tty));
886 if(tty->ldisc.refcount == 0) 888 if (tty->ldisc.refcount == 0)
887 printk(KERN_ERR "tty_ldisc_ref_wait\n"); 889 printk(KERN_ERR "tty_ldisc_ref_wait\n");
888 return &tty->ldisc; 890 return &tty->ldisc;
889} 891}
@@ -894,16 +896,16 @@ EXPORT_SYMBOL_GPL(tty_ldisc_ref_wait);
894 * tty_ldisc_ref - get the tty ldisc 896 * tty_ldisc_ref - get the tty ldisc
895 * @tty: tty device 897 * @tty: tty device
896 * 898 *
897 * Dereference the line discipline for the terminal and take a 899 * Dereference the line discipline for the terminal and take a
898 * reference to it. If the line discipline is in flux then 900 * reference to it. If the line discipline is in flux then
899 * return NULL. Can be called from IRQ and timer functions. 901 * return NULL. Can be called from IRQ and timer functions.
900 * 902 *
901 * Locking: called functions take tty_ldisc_lock 903 * Locking: called functions take tty_ldisc_lock
902 */ 904 */
903 905
904struct tty_ldisc *tty_ldisc_ref(struct tty_struct *tty) 906struct tty_ldisc *tty_ldisc_ref(struct tty_struct *tty)
905{ 907{
906 if(tty_ldisc_try(tty)) 908 if (tty_ldisc_try(tty))
907 return &tty->ldisc; 909 return &tty->ldisc;
908 return NULL; 910 return NULL;
909} 911}
@@ -919,19 +921,19 @@ EXPORT_SYMBOL_GPL(tty_ldisc_ref);
919 * 921 *
920 * Locking: takes tty_ldisc_lock 922 * Locking: takes tty_ldisc_lock
921 */ 923 */
922 924
923void tty_ldisc_deref(struct tty_ldisc *ld) 925void tty_ldisc_deref(struct tty_ldisc *ld)
924{ 926{
925 unsigned long flags; 927 unsigned long flags;
926 928
927 BUG_ON(ld == NULL); 929 BUG_ON(ld == NULL);
928 930
929 spin_lock_irqsave(&tty_ldisc_lock, flags); 931 spin_lock_irqsave(&tty_ldisc_lock, flags);
930 if(ld->refcount == 0) 932 if (ld->refcount == 0)
931 printk(KERN_ERR "tty_ldisc_deref: no references.\n"); 933 printk(KERN_ERR "tty_ldisc_deref: no references.\n");
932 else 934 else
933 ld->refcount--; 935 ld->refcount--;
934 if(ld->refcount == 0) 936 if (ld->refcount == 0)
935 wake_up(&tty_ldisc_wait); 937 wake_up(&tty_ldisc_wait);
936 spin_unlock_irqrestore(&tty_ldisc_lock, flags); 938 spin_unlock_irqrestore(&tty_ldisc_lock, flags);
937} 939}
@@ -954,7 +956,7 @@ static void tty_ldisc_enable(struct tty_struct *tty)
954 set_bit(TTY_LDISC, &tty->flags); 956 set_bit(TTY_LDISC, &tty->flags);
955 wake_up(&tty_ldisc_wait); 957 wake_up(&tty_ldisc_wait);
956} 958}
957 959
958/** 960/**
959 * tty_set_ldisc - set line discipline 961 * tty_set_ldisc - set line discipline
960 * @tty: the terminal to set 962 * @tty: the terminal to set
@@ -966,7 +968,7 @@ static void tty_ldisc_enable(struct tty_struct *tty)
966 * Locking: takes tty_ldisc_lock. 968 * Locking: takes tty_ldisc_lock.
967 * called functions take termios_mutex 969 * called functions take termios_mutex
968 */ 970 */
969 971
970static int tty_set_ldisc(struct tty_struct *tty, int ldisc) 972static int tty_set_ldisc(struct tty_struct *tty, int ldisc)
971{ 973{
972 int retval = 0; 974 int retval = 0;
@@ -1022,7 +1024,7 @@ restart:
1022 1024
1023 spin_lock_irqsave(&tty_ldisc_lock, flags); 1025 spin_lock_irqsave(&tty_ldisc_lock, flags);
1024 if (tty->ldisc.refcount || (o_tty && o_tty->ldisc.refcount)) { 1026 if (tty->ldisc.refcount || (o_tty && o_tty->ldisc.refcount)) {
1025 if(tty->ldisc.refcount) { 1027 if (tty->ldisc.refcount) {
1026 /* Free the new ldisc we grabbed. Must drop the lock 1028 /* Free the new ldisc we grabbed. Must drop the lock
1027 first. */ 1029 first. */
1028 spin_unlock_irqrestore(&tty_ldisc_lock, flags); 1030 spin_unlock_irqrestore(&tty_ldisc_lock, flags);
@@ -1031,14 +1033,14 @@ restart:
1031 * There are several reasons we may be busy, including 1033 * There are several reasons we may be busy, including
1032 * random momentary I/O traffic. We must therefore 1034 * random momentary I/O traffic. We must therefore
1033 * retry. We could distinguish between blocking ops 1035 * retry. We could distinguish between blocking ops
1034 * and retries if we made tty_ldisc_wait() smarter. That 1036 * and retries if we made tty_ldisc_wait() smarter.
1035 * is up for discussion. 1037 * That is up for discussion.
1036 */ 1038 */
1037 if (wait_event_interruptible(tty_ldisc_wait, tty->ldisc.refcount == 0) < 0) 1039 if (wait_event_interruptible(tty_ldisc_wait, tty->ldisc.refcount == 0) < 0)
1038 return -ERESTARTSYS; 1040 return -ERESTARTSYS;
1039 goto restart; 1041 goto restart;
1040 } 1042 }
1041 if(o_tty && o_tty->ldisc.refcount) { 1043 if (o_tty && o_tty->ldisc.refcount) {
1042 spin_unlock_irqrestore(&tty_ldisc_lock, flags); 1044 spin_unlock_irqrestore(&tty_ldisc_lock, flags);
1043 tty_ldisc_put(ldisc); 1045 tty_ldisc_put(ldisc);
1044 if (wait_event_interruptible(tty_ldisc_wait, o_tty->ldisc.refcount == 0) < 0) 1046 if (wait_event_interruptible(tty_ldisc_wait, o_tty->ldisc.refcount == 0) < 0)
@@ -1046,9 +1048,10 @@ restart:
1046 goto restart; 1048 goto restart;
1047 } 1049 }
1048 } 1050 }
1049 1051 /*
1050 /* if the TTY_LDISC bit is set, then we are racing against another ldisc change */ 1052 * If the TTY_LDISC bit is set, then we are racing against
1051 1053 * another ldisc change
1054 */
1052 if (!test_bit(TTY_LDISC, &tty->flags)) { 1055 if (!test_bit(TTY_LDISC, &tty->flags)) {
1053 spin_unlock_irqrestore(&tty_ldisc_lock, flags); 1056 spin_unlock_irqrestore(&tty_ldisc_lock, flags);
1054 tty_ldisc_put(ldisc); 1057 tty_ldisc_put(ldisc);
@@ -1072,7 +1075,6 @@ restart:
1072 /* 1075 /*
1073 * Wait for ->hangup_work and ->buf.work handlers to terminate 1076 * Wait for ->hangup_work and ->buf.work handlers to terminate
1074 */ 1077 */
1075
1076 flush_scheduled_work(); 1078 flush_scheduled_work();
1077 /* Shutdown the current discipline. */ 1079 /* Shutdown the current discipline. */
1078 if (tty->ldisc.close) 1080 if (tty->ldisc.close)
@@ -1106,21 +1108,21 @@ restart:
1106 /* At this point we hold a reference to the new ldisc and a 1108 /* At this point we hold a reference to the new ldisc and a
1107 a reference to the old ldisc. If we ended up flipping back 1109 a reference to the old ldisc. If we ended up flipping back
1108 to the existing ldisc we have two references to it */ 1110 to the existing ldisc we have two references to it */
1109 1111
1110 if (tty->ldisc.num != o_ldisc.num && tty->driver->set_ldisc) 1112 if (tty->ldisc.num != o_ldisc.num && tty->driver->set_ldisc)
1111 tty->driver->set_ldisc(tty); 1113 tty->driver->set_ldisc(tty);
1112 1114
1113 tty_ldisc_put(o_ldisc.num); 1115 tty_ldisc_put(o_ldisc.num);
1114 1116
1115 /* 1117 /*
1116 * Allow ldisc referencing to occur as soon as the driver 1118 * Allow ldisc referencing to occur as soon as the driver
1117 * ldisc callback completes. 1119 * ldisc callback completes.
1118 */ 1120 */
1119 1121
1120 tty_ldisc_enable(tty); 1122 tty_ldisc_enable(tty);
1121 if (o_tty) 1123 if (o_tty)
1122 tty_ldisc_enable(o_tty); 1124 tty_ldisc_enable(o_tty);
1123 1125
1124 /* Restart it in case no characters kick it off. Safe if 1126 /* Restart it in case no characters kick it off. Safe if
1125 already running */ 1127 already running */
1126 if (work) 1128 if (work)
@@ -1164,7 +1166,7 @@ static struct tty_driver *get_tty_driver(dev_t device, int *index)
1164 * Locking: none 1166 * Locking: none
1165 */ 1167 */
1166 1168
1167int tty_check_change(struct tty_struct * tty) 1169int tty_check_change(struct tty_struct *tty)
1168{ 1170{
1169 if (current->signal->tty != tty) 1171 if (current->signal->tty != tty)
1170 return 0; 1172 return 0;
@@ -1185,31 +1187,31 @@ int tty_check_change(struct tty_struct * tty)
1185 1187
1186EXPORT_SYMBOL(tty_check_change); 1188EXPORT_SYMBOL(tty_check_change);
1187 1189
1188static ssize_t hung_up_tty_read(struct file * file, char __user * buf, 1190static ssize_t hung_up_tty_read(struct file *file, char __user *buf,
1189 size_t count, loff_t *ppos) 1191 size_t count, loff_t *ppos)
1190{ 1192{
1191 return 0; 1193 return 0;
1192} 1194}
1193 1195
1194static ssize_t hung_up_tty_write(struct file * file, const char __user * buf, 1196static ssize_t hung_up_tty_write(struct file *file, const char __user *buf,
1195 size_t count, loff_t *ppos) 1197 size_t count, loff_t *ppos)
1196{ 1198{
1197 return -EIO; 1199 return -EIO;
1198} 1200}
1199 1201
1200/* No kernel lock held - none needed ;) */ 1202/* No kernel lock held - none needed ;) */
1201static unsigned int hung_up_tty_poll(struct file * filp, poll_table * wait) 1203static unsigned int hung_up_tty_poll(struct file *filp, poll_table *wait)
1202{ 1204{
1203 return POLLIN | POLLOUT | POLLERR | POLLHUP | POLLRDNORM | POLLWRNORM; 1205 return POLLIN | POLLOUT | POLLERR | POLLHUP | POLLRDNORM | POLLWRNORM;
1204} 1206}
1205 1207
1206static int hung_up_tty_ioctl(struct inode * inode, struct file * file, 1208static int hung_up_tty_ioctl(struct inode *inode, struct file *file,
1207 unsigned int cmd, unsigned long arg) 1209 unsigned int cmd, unsigned long arg)
1208{ 1210{
1209 return cmd == TIOCSPGRP ? -ENOTTY : -EIO; 1211 return cmd == TIOCSPGRP ? -ENOTTY : -EIO;
1210} 1212}
1211 1213
1212static long hung_up_tty_compat_ioctl(struct file * file, 1214static long hung_up_tty_compat_ioctl(struct file *file,
1213 unsigned int cmd, unsigned long arg) 1215 unsigned int cmd, unsigned long arg)
1214{ 1216{
1215 return cmd == TIOCSPGRP ? -ENOTTY : -EIO; 1217 return cmd == TIOCSPGRP ? -ENOTTY : -EIO;
@@ -1274,15 +1276,15 @@ static struct file *redirect;
1274 * informs the line discipline if present that the driver is ready 1276 * informs the line discipline if present that the driver is ready
1275 * to receive more output data. 1277 * to receive more output data.
1276 */ 1278 */
1277 1279
1278void tty_wakeup(struct tty_struct *tty) 1280void tty_wakeup(struct tty_struct *tty)
1279{ 1281{
1280 struct tty_ldisc *ld; 1282 struct tty_ldisc *ld;
1281 1283
1282 if (test_bit(TTY_DO_WRITE_WAKEUP, &tty->flags)) { 1284 if (test_bit(TTY_DO_WRITE_WAKEUP, &tty->flags)) {
1283 ld = tty_ldisc_ref(tty); 1285 ld = tty_ldisc_ref(tty);
1284 if(ld) { 1286 if (ld) {
1285 if(ld->write_wakeup) 1287 if (ld->write_wakeup)
1286 ld->write_wakeup(tty); 1288 ld->write_wakeup(tty);
1287 tty_ldisc_deref(ld); 1289 tty_ldisc_deref(ld);
1288 } 1290 }
@@ -1299,12 +1301,12 @@ EXPORT_SYMBOL_GPL(tty_wakeup);
1299 * Flush the line discipline queue (if any) for this tty. If there 1301 * Flush the line discipline queue (if any) for this tty. If there
1300 * is no line discipline active this is a no-op. 1302 * is no line discipline active this is a no-op.
1301 */ 1303 */
1302 1304
1303void tty_ldisc_flush(struct tty_struct *tty) 1305void tty_ldisc_flush(struct tty_struct *tty)
1304{ 1306{
1305 struct tty_ldisc *ld = tty_ldisc_ref(tty); 1307 struct tty_ldisc *ld = tty_ldisc_ref(tty);
1306 if(ld) { 1308 if (ld) {
1307 if(ld->flush_buffer) 1309 if (ld->flush_buffer)
1308 ld->flush_buffer(tty); 1310 ld->flush_buffer(tty);
1309 tty_ldisc_deref(ld); 1311 tty_ldisc_deref(ld);
1310 } 1312 }
@@ -1328,7 +1330,7 @@ static void tty_reset_termios(struct tty_struct *tty)
1328 tty->termios->c_ospeed = tty_termios_baud_rate(tty->termios); 1330 tty->termios->c_ospeed = tty_termios_baud_rate(tty->termios);
1329 mutex_unlock(&tty->termios_mutex); 1331 mutex_unlock(&tty->termios_mutex);
1330} 1332}
1331 1333
1332/** 1334/**
1333 * do_tty_hangup - actual handler for hangup events 1335 * do_tty_hangup - actual handler for hangup events
1334 * @work: tty device 1336 * @work: tty device
@@ -1355,7 +1357,7 @@ static void do_tty_hangup(struct work_struct *work)
1355{ 1357{
1356 struct tty_struct *tty = 1358 struct tty_struct *tty =
1357 container_of(work, struct tty_struct, hangup_work); 1359 container_of(work, struct tty_struct, hangup_work);
1358 struct file * cons_filp = NULL; 1360 struct file *cons_filp = NULL;
1359 struct file *filp, *f = NULL; 1361 struct file *filp, *f = NULL;
1360 struct task_struct *p; 1362 struct task_struct *p;
1361 struct tty_ldisc *ld; 1363 struct tty_ldisc *ld;
@@ -1373,7 +1375,7 @@ static void do_tty_hangup(struct work_struct *work)
1373 redirect = NULL; 1375 redirect = NULL;
1374 } 1376 }
1375 spin_unlock(&redirect_lock); 1377 spin_unlock(&redirect_lock);
1376 1378
1377 check_tty_count(tty, "do_tty_hangup"); 1379 check_tty_count(tty, "do_tty_hangup");
1378 file_list_lock(); 1380 file_list_lock();
1379 /* This breaks for file handles being sent over AF_UNIX sockets ? */ 1381 /* This breaks for file handles being sent over AF_UNIX sockets ? */
@@ -1387,13 +1389,14 @@ static void do_tty_hangup(struct work_struct *work)
1387 filp->f_op = &hung_up_tty_fops; 1389 filp->f_op = &hung_up_tty_fops;
1388 } 1390 }
1389 file_list_unlock(); 1391 file_list_unlock();
1390 1392 /*
1391 /* FIXME! What are the locking issues here? This may me overdoing things.. 1393 * FIXME! What are the locking issues here? This may me overdoing
1392 * this question is especially important now that we've removed the irqlock. */ 1394 * things... This question is especially important now that we've
1393 1395 * removed the irqlock.
1396 */
1394 ld = tty_ldisc_ref(tty); 1397 ld = tty_ldisc_ref(tty);
1395 if(ld != NULL) /* We may have no line discipline at this point */ 1398 if (ld != NULL) {
1396 { 1399 /* We may have no line discipline at this point */
1397 if (ld->flush_buffer) 1400 if (ld->flush_buffer)
1398 ld->flush_buffer(tty); 1401 ld->flush_buffer(tty);
1399 if (tty->driver->flush_buffer) 1402 if (tty->driver->flush_buffer)
@@ -1404,26 +1407,24 @@ static void do_tty_hangup(struct work_struct *work)
1404 if (ld->hangup) 1407 if (ld->hangup)
1405 ld->hangup(tty); 1408 ld->hangup(tty);
1406 } 1409 }
1407 1410 /*
1408 /* FIXME: Once we trust the LDISC code better we can wait here for 1411 * FIXME: Once we trust the LDISC code better we can wait here for
1409 ldisc completion and fix the driver call race */ 1412 * ldisc completion and fix the driver call race
1410 1413 */
1411 wake_up_interruptible(&tty->write_wait); 1414 wake_up_interruptible(&tty->write_wait);
1412 wake_up_interruptible(&tty->read_wait); 1415 wake_up_interruptible(&tty->read_wait);
1413
1414 /* 1416 /*
1415 * Shutdown the current line discipline, and reset it to 1417 * Shutdown the current line discipline, and reset it to
1416 * N_TTY. 1418 * N_TTY.
1417 */ 1419 */
1418 if (tty->driver->flags & TTY_DRIVER_RESET_TERMIOS) 1420 if (tty->driver->flags & TTY_DRIVER_RESET_TERMIOS)
1419 tty_reset_termios(tty); 1421 tty_reset_termios(tty);
1420
1421 /* Defer ldisc switch */ 1422 /* Defer ldisc switch */
1422 /* tty_deferred_ldisc_switch(N_TTY); 1423 /* tty_deferred_ldisc_switch(N_TTY);
1423 1424
1424 This should get done automatically when the port closes and 1425 This should get done automatically when the port closes and
1425 tty_release is called */ 1426 tty_release is called */
1426 1427
1427 read_lock(&tasklist_lock); 1428 read_lock(&tasklist_lock);
1428 if (tty->session) { 1429 if (tty->session) {
1429 do_each_pid_task(tty->session, PIDTYPE_SID, p) { 1430 do_each_pid_task(tty->session, PIDTYPE_SID, p) {
@@ -1451,10 +1452,10 @@ static void do_tty_hangup(struct work_struct *work)
1451 tty->pgrp = NULL; 1452 tty->pgrp = NULL;
1452 tty->ctrl_status = 0; 1453 tty->ctrl_status = 0;
1453 /* 1454 /*
1454 * If one of the devices matches a console pointer, we 1455 * If one of the devices matches a console pointer, we
1455 * cannot just call hangup() because that will cause 1456 * cannot just call hangup() because that will cause
1456 * tty->count and state->count to go out of sync. 1457 * tty->count and state->count to go out of sync.
1457 * So we just call close() the right number of times. 1458 * So we just call close() the right number of times.
1458 */ 1459 */
1459 if (cons_filp) { 1460 if (cons_filp) {
1460 if (tty->driver->close) 1461 if (tty->driver->close)
@@ -1462,12 +1463,12 @@ static void do_tty_hangup(struct work_struct *work)
1462 tty->driver->close(tty, cons_filp); 1463 tty->driver->close(tty, cons_filp);
1463 } else if (tty->driver->hangup) 1464 } else if (tty->driver->hangup)
1464 (tty->driver->hangup)(tty); 1465 (tty->driver->hangup)(tty);
1465 1466 /*
1466 /* We don't want to have driver/ldisc interactions beyond 1467 * We don't want to have driver/ldisc interactions beyond
1467 the ones we did here. The driver layer expects no 1468 * the ones we did here. The driver layer expects no
1468 calls after ->hangup() from the ldisc side. However we 1469 * calls after ->hangup() from the ldisc side. However we
1469 can't yet guarantee all that */ 1470 * can't yet guarantee all that.
1470 1471 */
1471 set_bit(TTY_HUPPED, &tty->flags); 1472 set_bit(TTY_HUPPED, &tty->flags);
1472 if (ld) { 1473 if (ld) {
1473 tty_ldisc_enable(tty); 1474 tty_ldisc_enable(tty);
@@ -1486,11 +1487,10 @@ static void do_tty_hangup(struct work_struct *work)
1486 * schedule a hangup sequence to run after this event. 1487 * schedule a hangup sequence to run after this event.
1487 */ 1488 */
1488 1489
1489void tty_hangup(struct tty_struct * tty) 1490void tty_hangup(struct tty_struct *tty)
1490{ 1491{
1491#ifdef TTY_DEBUG_HANGUP 1492#ifdef TTY_DEBUG_HANGUP
1492 char buf[64]; 1493 char buf[64];
1493
1494 printk(KERN_DEBUG "%s hangup...\n", tty_name(tty, buf)); 1494 printk(KERN_DEBUG "%s hangup...\n", tty_name(tty, buf));
1495#endif 1495#endif
1496 schedule_work(&tty->hangup_work); 1496 schedule_work(&tty->hangup_work);
@@ -1507,7 +1507,7 @@ EXPORT_SYMBOL(tty_hangup);
1507 * is complete. That guarantee is necessary for security reasons. 1507 * is complete. That guarantee is necessary for security reasons.
1508 */ 1508 */
1509 1509
1510void tty_vhangup(struct tty_struct * tty) 1510void tty_vhangup(struct tty_struct *tty)
1511{ 1511{
1512#ifdef TTY_DEBUG_HANGUP 1512#ifdef TTY_DEBUG_HANGUP
1513 char buf[64]; 1513 char buf[64];
@@ -1516,6 +1516,7 @@ void tty_vhangup(struct tty_struct * tty)
1516#endif 1516#endif
1517 do_tty_hangup(&tty->hangup_work); 1517 do_tty_hangup(&tty->hangup_work);
1518} 1518}
1519
1519EXPORT_SYMBOL(tty_vhangup); 1520EXPORT_SYMBOL(tty_vhangup);
1520 1521
1521/** 1522/**
@@ -1526,7 +1527,7 @@ EXPORT_SYMBOL(tty_vhangup);
1526 * loss 1527 * loss
1527 */ 1528 */
1528 1529
1529int tty_hung_up_p(struct file * filp) 1530int tty_hung_up_p(struct file *filp)
1530{ 1531{
1531 return (filp->f_op == &hung_up_tty_fops); 1532 return (filp->f_op == &hung_up_tty_fops);
1532} 1533}
@@ -1534,8 +1535,12 @@ int tty_hung_up_p(struct file * filp)
1534EXPORT_SYMBOL(tty_hung_up_p); 1535EXPORT_SYMBOL(tty_hung_up_p);
1535 1536
1536/** 1537/**
1537 * is_tty - checker whether file is a TTY 1538 * is_tty - checker whether file is a TTY
1539 * @filp: file handle that may be a tty
1540 *
1541 * Check if the file handle is a tty handle.
1538 */ 1542 */
1543
1539int is_tty(struct file *filp) 1544int is_tty(struct file *filp)
1540{ 1545{
1541 return filp->f_op->read == tty_read 1546 return filp->f_op->read == tty_read
@@ -1601,7 +1606,7 @@ void disassociate_ctty(int on_exit)
1601 put_pid(old_pgrp); 1606 put_pid(old_pgrp);
1602 } 1607 }
1603 mutex_unlock(&tty_mutex); 1608 mutex_unlock(&tty_mutex);
1604 unlock_kernel(); 1609 unlock_kernel();
1605 return; 1610 return;
1606 } 1611 }
1607 if (tty_pgrp) { 1612 if (tty_pgrp) {
@@ -1711,7 +1716,6 @@ void start_tty(struct tty_struct *tty)
1711 } 1716 }
1712 if (tty->driver->start) 1717 if (tty->driver->start)
1713 (tty->driver->start)(tty); 1718 (tty->driver->start)(tty);
1714
1715 /* If we have a running line discipline it may need kicking */ 1719 /* If we have a running line discipline it may need kicking */
1716 tty_wakeup(tty); 1720 tty_wakeup(tty);
1717} 1721}
@@ -1735,11 +1739,11 @@ EXPORT_SYMBOL(start_tty);
1735 * in new code. Multiple read calls may be outstanding in parallel. 1739 * in new code. Multiple read calls may be outstanding in parallel.
1736 */ 1740 */
1737 1741
1738static ssize_t tty_read(struct file * file, char __user * buf, size_t count, 1742static ssize_t tty_read(struct file *file, char __user *buf, size_t count,
1739 loff_t *ppos) 1743 loff_t *ppos)
1740{ 1744{
1741 int i; 1745 int i;
1742 struct tty_struct * tty; 1746 struct tty_struct *tty;
1743 struct inode *inode; 1747 struct inode *inode;
1744 struct tty_ldisc *ld; 1748 struct tty_ldisc *ld;
1745 1749
@@ -1755,7 +1759,7 @@ static ssize_t tty_read(struct file * file, char __user * buf, size_t count,
1755 ld = tty_ldisc_ref_wait(tty); 1759 ld = tty_ldisc_ref_wait(tty);
1756 lock_kernel(); 1760 lock_kernel();
1757 if (ld->read) 1761 if (ld->read)
1758 i = (ld->read)(tty,file,buf,count); 1762 i = (ld->read)(tty, file, buf, count);
1759 else 1763 else
1760 i = -EIO; 1764 i = -EIO;
1761 tty_ldisc_deref(ld); 1765 tty_ldisc_deref(ld);
@@ -1795,7 +1799,7 @@ static inline ssize_t do_tty_write(
1795{ 1799{
1796 ssize_t ret, written = 0; 1800 ssize_t ret, written = 0;
1797 unsigned int chunk; 1801 unsigned int chunk;
1798 1802
1799 ret = tty_write_lock(tty, file->f_flags & O_NDELAY); 1803 ret = tty_write_lock(tty, file->f_flags & O_NDELAY);
1800 if (ret < 0) 1804 if (ret < 0)
1801 return ret; 1805 return ret;
@@ -1891,21 +1895,22 @@ out:
1891 * kernel lock for historical reasons. New code should not rely on this. 1895 * kernel lock for historical reasons. New code should not rely on this.
1892 */ 1896 */
1893 1897
1894static ssize_t tty_write(struct file * file, const char __user * buf, size_t count, 1898static ssize_t tty_write(struct file *file, const char __user *buf,
1895 loff_t *ppos) 1899 size_t count, loff_t *ppos)
1896{ 1900{
1897 struct tty_struct * tty; 1901 struct tty_struct *tty;
1898 struct inode *inode = file->f_path.dentry->d_inode; 1902 struct inode *inode = file->f_path.dentry->d_inode;
1899 ssize_t ret; 1903 ssize_t ret;
1900 struct tty_ldisc *ld; 1904 struct tty_ldisc *ld;
1901 1905
1902 tty = (struct tty_struct *)file->private_data; 1906 tty = (struct tty_struct *)file->private_data;
1903 if (tty_paranoia_check(tty, inode, "tty_write")) 1907 if (tty_paranoia_check(tty, inode, "tty_write"))
1904 return -EIO; 1908 return -EIO;
1905 if (!tty || !tty->driver->write || (test_bit(TTY_IO_ERROR, &tty->flags))) 1909 if (!tty || !tty->driver->write ||
1906 return -EIO; 1910 (test_bit(TTY_IO_ERROR, &tty->flags)))
1911 return -EIO;
1907 1912
1908 ld = tty_ldisc_ref_wait(tty); 1913 ld = tty_ldisc_ref_wait(tty);
1909 if (!ld->write) 1914 if (!ld->write)
1910 ret = -EIO; 1915 ret = -EIO;
1911 else 1916 else
@@ -1914,8 +1919,8 @@ static ssize_t tty_write(struct file * file, const char __user * buf, size_t cou
1914 return ret; 1919 return ret;
1915} 1920}
1916 1921
1917ssize_t redirected_tty_write(struct file * file, const char __user * buf, size_t count, 1922ssize_t redirected_tty_write(struct file *file, const char __user *buf,
1918 loff_t *ppos) 1923 size_t count, loff_t *ppos)
1919{ 1924{
1920 struct file *p = NULL; 1925 struct file *p = NULL;
1921 1926
@@ -1932,7 +1937,6 @@ ssize_t redirected_tty_write(struct file * file, const char __user * buf, size_t
1932 fput(p); 1937 fput(p);
1933 return res; 1938 return res;
1934 } 1939 }
1935
1936 return tty_write(file, buf, count, ppos); 1940 return tty_write(file, buf, count, ppos);
1937} 1941}
1938 1942
@@ -1954,8 +1958,8 @@ static void pty_line_name(struct tty_driver *driver, int index, char *p)
1954 int i = index + driver->name_base; 1958 int i = index + driver->name_base;
1955 /* ->name is initialized to "ttyp", but "tty" is expected */ 1959 /* ->name is initialized to "ttyp", but "tty" is expected */
1956 sprintf(p, "%s%c%x", 1960 sprintf(p, "%s%c%x",
1957 driver->subtype == PTY_TYPE_SLAVE ? "tty" : driver->name, 1961 driver->subtype == PTY_TYPE_SLAVE ? "tty" : driver->name,
1958 ptychar[i >> 4 & 0xf], i & 0xf); 1962 ptychar[i >> 4 & 0xf], i & 0xf);
1959} 1963}
1960 1964
1961/** 1965/**
@@ -2034,7 +2038,7 @@ static int init_dev(struct tty_driver *driver, int idx,
2034 * First time open is complex, especially for PTY devices. 2038 * First time open is complex, especially for PTY devices.
2035 * This code guarantees that either everything succeeds and the 2039 * This code guarantees that either everything succeeds and the
2036 * TTY is ready for operation, or else the table slots are vacated 2040 * TTY is ready for operation, or else the table slots are vacated
2037 * and the allocated memory released. (Except that the termios 2041 * and the allocated memory released. (Except that the termios
2038 * and locked termios may be retained.) 2042 * and locked termios may be retained.)
2039 */ 2043 */
2040 2044
@@ -2048,7 +2052,7 @@ static int init_dev(struct tty_driver *driver, int idx,
2048 ltp = o_ltp = NULL; 2052 ltp = o_ltp = NULL;
2049 2053
2050 tty = alloc_tty_struct(); 2054 tty = alloc_tty_struct();
2051 if(!tty) 2055 if (!tty)
2052 goto fail_no_mem; 2056 goto fail_no_mem;
2053 initialize_tty_struct(tty); 2057 initialize_tty_struct(tty);
2054 tty->driver = driver; 2058 tty->driver = driver;
@@ -2109,9 +2113,8 @@ static int init_dev(struct tty_driver *driver, int idx,
2109 /* 2113 /*
2110 * Everything allocated ... set up the o_tty structure. 2114 * Everything allocated ... set up the o_tty structure.
2111 */ 2115 */
2112 if (!(driver->other->flags & TTY_DRIVER_DEVPTS_MEM)) { 2116 if (!(driver->other->flags & TTY_DRIVER_DEVPTS_MEM))
2113 driver->other->ttys[idx] = o_tty; 2117 driver->other->ttys[idx] = o_tty;
2114 }
2115 if (!*o_tp_loc) 2118 if (!*o_tp_loc)
2116 *o_tp_loc = o_tp; 2119 *o_tp_loc = o_tp;
2117 if (!*o_ltp_loc) 2120 if (!*o_ltp_loc)
@@ -2127,15 +2130,14 @@ static int init_dev(struct tty_driver *driver, int idx,
2127 o_tty->link = tty; 2130 o_tty->link = tty;
2128 } 2131 }
2129 2132
2130 /* 2133 /*
2131 * All structures have been allocated, so now we install them. 2134 * All structures have been allocated, so now we install them.
2132 * Failures after this point use release_tty to clean up, so 2135 * Failures after this point use release_tty to clean up, so
2133 * there's no need to null out the local pointers. 2136 * there's no need to null out the local pointers.
2134 */ 2137 */
2135 if (!(driver->flags & TTY_DRIVER_DEVPTS_MEM)) { 2138 if (!(driver->flags & TTY_DRIVER_DEVPTS_MEM))
2136 driver->ttys[idx] = tty; 2139 driver->ttys[idx] = tty;
2137 } 2140
2138
2139 if (!*tp_loc) 2141 if (!*tp_loc)
2140 *tp_loc = tp; 2142 *tp_loc = tp;
2141 if (!*ltp_loc) 2143 if (!*ltp_loc)
@@ -2148,7 +2150,7 @@ static int init_dev(struct tty_driver *driver, int idx,
2148 driver->refcount++; 2150 driver->refcount++;
2149 tty->count++; 2151 tty->count++;
2150 2152
2151 /* 2153 /*
2152 * Structures all installed ... call the ldisc open routines. 2154 * Structures all installed ... call the ldisc open routines.
2153 * If we fail here just call release_tty to clean up. No need 2155 * If we fail here just call release_tty to clean up. No need
2154 * to decrement the use counts, as release_tty doesn't care. 2156 * to decrement the use counts, as release_tty doesn't care.
@@ -2185,7 +2187,7 @@ fast_track:
2185 if (driver->type == TTY_DRIVER_TYPE_PTY && 2187 if (driver->type == TTY_DRIVER_TYPE_PTY &&
2186 driver->subtype == PTY_TYPE_MASTER) { 2188 driver->subtype == PTY_TYPE_MASTER) {
2187 /* 2189 /*
2188 * special case for PTY masters: only one open permitted, 2190 * special case for PTY masters: only one open permitted,
2189 * and the slave side open count is incremented as well. 2191 * and the slave side open count is incremented as well.
2190 */ 2192 */
2191 if (tty->count) { 2193 if (tty->count) {
@@ -2198,11 +2200,11 @@ fast_track:
2198 tty->driver = driver; /* N.B. why do this every time?? */ 2200 tty->driver = driver; /* N.B. why do this every time?? */
2199 2201
2200 /* FIXME */ 2202 /* FIXME */
2201 if(!test_bit(TTY_LDISC, &tty->flags)) 2203 if (!test_bit(TTY_LDISC, &tty->flags))
2202 printk(KERN_ERR "init_dev but no ldisc\n"); 2204 printk(KERN_ERR "init_dev but no ldisc\n");
2203success: 2205success:
2204 *ret_tty = tty; 2206 *ret_tty = tty;
2205 2207
2206 /* All paths come through here to release the mutex */ 2208 /* All paths come through here to release the mutex */
2207end_init: 2209end_init:
2208 return retval; 2210 return retval;
@@ -2304,7 +2306,7 @@ static void release_tty(struct tty_struct *tty, int idx)
2304 * WSH 09/09/97: rewritten to avoid some nasty race conditions that could 2306 * WSH 09/09/97: rewritten to avoid some nasty race conditions that could
2305 * lead to double frees or releasing memory still in use. 2307 * lead to double frees or releasing memory still in use.
2306 */ 2308 */
2307static void release_dev(struct file * filp) 2309static void release_dev(struct file *filp)
2308{ 2310{
2309 struct tty_struct *tty, *o_tty; 2311 struct tty_struct *tty, *o_tty;
2310 int pty_master, tty_closing, o_tty_closing, do_sleep; 2312 int pty_master, tty_closing, o_tty_closing, do_sleep;
@@ -2312,9 +2314,10 @@ static void release_dev(struct file * filp)
2312 int idx; 2314 int idx;
2313 char buf[64]; 2315 char buf[64];
2314 unsigned long flags; 2316 unsigned long flags;
2315 2317
2316 tty = (struct tty_struct *)filp->private_data; 2318 tty = (struct tty_struct *)filp->private_data;
2317 if (tty_paranoia_check(tty, filp->f_path.dentry->d_inode, "release_dev")) 2319 if (tty_paranoia_check(tty, filp->f_path.dentry->d_inode,
2320 "release_dev"))
2318 return; 2321 return;
2319 2322
2320 check_tty_count(tty, "release_dev"); 2323 check_tty_count(tty, "release_dev");
@@ -2374,7 +2377,7 @@ static void release_dev(struct file * filp)
2374 idx, tty->name); 2377 idx, tty->name);
2375 return; 2378 return;
2376 } 2379 }
2377 if (o_tty->termios_locked != 2380 if (o_tty->termios_locked !=
2378 tty->driver->other->termios_locked[idx]) { 2381 tty->driver->other->termios_locked[idx]) {
2379 printk(KERN_DEBUG "release_dev: other->termios_locked[" 2382 printk(KERN_DEBUG "release_dev: other->termios_locked["
2380 "%d] not o_termios_locked for (%s)\n", 2383 "%d] not o_termios_locked for (%s)\n",
@@ -2410,7 +2413,7 @@ static void release_dev(struct file * filp)
2410 while (1) { 2413 while (1) {
2411 /* Guard against races with tty->count changes elsewhere and 2414 /* Guard against races with tty->count changes elsewhere and
2412 opens on /dev/tty */ 2415 opens on /dev/tty */
2413 2416
2414 mutex_lock(&tty_mutex); 2417 mutex_lock(&tty_mutex);
2415 tty_closing = tty->count <= 1; 2418 tty_closing = tty->count <= 1;
2416 o_tty_closing = o_tty && 2419 o_tty_closing = o_tty &&
@@ -2444,11 +2447,11 @@ static void release_dev(struct file * filp)
2444 "active!\n", tty_name(tty, buf)); 2447 "active!\n", tty_name(tty, buf));
2445 mutex_unlock(&tty_mutex); 2448 mutex_unlock(&tty_mutex);
2446 schedule(); 2449 schedule();
2447 } 2450 }
2448 2451
2449 /* 2452 /*
2450 * The closing flags are now consistent with the open counts on 2453 * The closing flags are now consistent with the open counts on
2451 * both sides, and we've completed the last operation that could 2454 * both sides, and we've completed the last operation that could
2452 * block, so it's safe to proceed with closing. 2455 * block, so it's safe to proceed with closing.
2453 */ 2456 */
2454 if (pty_master) { 2457 if (pty_master) {
@@ -2464,7 +2467,7 @@ static void release_dev(struct file * filp)
2464 tty->count, tty_name(tty, buf)); 2467 tty->count, tty_name(tty, buf));
2465 tty->count = 0; 2468 tty->count = 0;
2466 } 2469 }
2467 2470
2468 /* 2471 /*
2469 * We've decremented tty->count, so we need to remove this file 2472 * We've decremented tty->count, so we need to remove this file
2470 * descriptor off the tty->tty_files list; this serves two 2473 * descriptor off the tty->tty_files list; this serves two
@@ -2484,9 +2487,9 @@ static void release_dev(struct file * filp)
2484 * case of a pty we may have to wait around for the other side 2487 * case of a pty we may have to wait around for the other side
2485 * to close, and TTY_CLOSING makes sure we can't be reopened. 2488 * to close, and TTY_CLOSING makes sure we can't be reopened.
2486 */ 2489 */
2487 if(tty_closing) 2490 if (tty_closing)
2488 set_bit(TTY_CLOSING, &tty->flags); 2491 set_bit(TTY_CLOSING, &tty->flags);
2489 if(o_tty_closing) 2492 if (o_tty_closing)
2490 set_bit(TTY_CLOSING, &o_tty->flags); 2493 set_bit(TTY_CLOSING, &o_tty->flags);
2491 2494
2492 /* 2495 /*
@@ -2507,7 +2510,7 @@ static void release_dev(struct file * filp)
2507 /* check whether both sides are closing ... */ 2510 /* check whether both sides are closing ... */
2508 if (!tty_closing || (o_tty && !o_tty_closing)) 2511 if (!tty_closing || (o_tty && !o_tty_closing))
2509 return; 2512 return;
2510 2513
2511#ifdef TTY_DEBUG_HANGUP 2514#ifdef TTY_DEBUG_HANGUP
2512 printk(KERN_DEBUG "freeing tty structure..."); 2515 printk(KERN_DEBUG "freeing tty structure...");
2513#endif 2516#endif
@@ -2522,17 +2525,16 @@ static void release_dev(struct file * filp)
2522 /* 2525 /*
2523 * Wait for ->hangup_work and ->buf.work handlers to terminate 2526 * Wait for ->hangup_work and ->buf.work handlers to terminate
2524 */ 2527 */
2525 2528
2526 flush_scheduled_work(); 2529 flush_scheduled_work();
2527 2530
2528 /* 2531 /*
2529 * Wait for any short term users (we know they are just driver 2532 * Wait for any short term users (we know they are just driver
2530 * side waiters as the file is closing so user count on the file 2533 * side waiters as the file is closing so user count on the file
2531 * side is zero. 2534 * side is zero.
2532 */ 2535 */
2533 spin_lock_irqsave(&tty_ldisc_lock, flags); 2536 spin_lock_irqsave(&tty_ldisc_lock, flags);
2534 while(tty->ldisc.refcount) 2537 while (tty->ldisc.refcount) {
2535 {
2536 spin_unlock_irqrestore(&tty_ldisc_lock, flags); 2538 spin_unlock_irqrestore(&tty_ldisc_lock, flags);
2537 wait_event(tty_ldisc_wait, tty->ldisc.refcount == 0); 2539 wait_event(tty_ldisc_wait, tty->ldisc.refcount == 0);
2538 spin_lock_irqsave(&tty_ldisc_lock, flags); 2540 spin_lock_irqsave(&tty_ldisc_lock, flags);
@@ -2547,12 +2549,12 @@ static void release_dev(struct file * filp)
2547 if (tty->ldisc.close) 2549 if (tty->ldisc.close)
2548 (tty->ldisc.close)(tty); 2550 (tty->ldisc.close)(tty);
2549 tty_ldisc_put(tty->ldisc.num); 2551 tty_ldisc_put(tty->ldisc.num);
2550 2552
2551 /* 2553 /*
2552 * Switch the line discipline back 2554 * Switch the line discipline back
2553 */ 2555 */
2554 tty_ldisc_assign(tty, tty_ldisc_get(N_TTY)); 2556 tty_ldisc_assign(tty, tty_ldisc_get(N_TTY));
2555 tty_set_termios_ldisc(tty,N_TTY); 2557 tty_set_termios_ldisc(tty, N_TTY);
2556 if (o_tty) { 2558 if (o_tty) {
2557 /* FIXME: could o_tty be in setldisc here ? */ 2559 /* FIXME: could o_tty be in setldisc here ? */
2558 clear_bit(TTY_LDISC, &o_tty->flags); 2560 clear_bit(TTY_LDISC, &o_tty->flags);
@@ -2560,7 +2562,7 @@ static void release_dev(struct file * filp)
2560 (o_tty->ldisc.close)(o_tty); 2562 (o_tty->ldisc.close)(o_tty);
2561 tty_ldisc_put(o_tty->ldisc.num); 2563 tty_ldisc_put(o_tty->ldisc.num);
2562 tty_ldisc_assign(o_tty, tty_ldisc_get(N_TTY)); 2564 tty_ldisc_assign(o_tty, tty_ldisc_get(N_TTY));
2563 tty_set_termios_ldisc(o_tty,N_TTY); 2565 tty_set_termios_ldisc(o_tty, N_TTY);
2564 } 2566 }
2565 /* 2567 /*
2566 * The release_tty function takes care of the details of clearing 2568 * The release_tty function takes care of the details of clearing
@@ -2600,7 +2602,7 @@ static void release_dev(struct file * filp)
2600 * ->siglock protects ->signal/->sighand 2602 * ->siglock protects ->signal/->sighand
2601 */ 2603 */
2602 2604
2603static int tty_open(struct inode * inode, struct file * filp) 2605static int tty_open(struct inode *inode, struct file *filp)
2604{ 2606{
2605 struct tty_struct *tty; 2607 struct tty_struct *tty;
2606 int noctty, retval; 2608 int noctty, retval;
@@ -2610,15 +2612,15 @@ static int tty_open(struct inode * inode, struct file * filp)
2610 unsigned short saved_flags = filp->f_flags; 2612 unsigned short saved_flags = filp->f_flags;
2611 2613
2612 nonseekable_open(inode, filp); 2614 nonseekable_open(inode, filp);
2613 2615
2614retry_open: 2616retry_open:
2615 noctty = filp->f_flags & O_NOCTTY; 2617 noctty = filp->f_flags & O_NOCTTY;
2616 index = -1; 2618 index = -1;
2617 retval = 0; 2619 retval = 0;
2618 2620
2619 mutex_lock(&tty_mutex); 2621 mutex_lock(&tty_mutex);
2620 2622
2621 if (device == MKDEV(TTYAUX_MAJOR,0)) { 2623 if (device == MKDEV(TTYAUX_MAJOR, 0)) {
2622 tty = get_current_tty(); 2624 tty = get_current_tty();
2623 if (!tty) { 2625 if (!tty) {
2624 mutex_unlock(&tty_mutex); 2626 mutex_unlock(&tty_mutex);
@@ -2631,7 +2633,7 @@ retry_open:
2631 goto got_driver; 2633 goto got_driver;
2632 } 2634 }
2633#ifdef CONFIG_VT 2635#ifdef CONFIG_VT
2634 if (device == MKDEV(TTY_MAJOR,0)) { 2636 if (device == MKDEV(TTY_MAJOR, 0)) {
2635 extern struct tty_driver *console_driver; 2637 extern struct tty_driver *console_driver;
2636 driver = console_driver; 2638 driver = console_driver;
2637 index = fg_console; 2639 index = fg_console;
@@ -2639,7 +2641,7 @@ retry_open:
2639 goto got_driver; 2641 goto got_driver;
2640 } 2642 }
2641#endif 2643#endif
2642 if (device == MKDEV(TTYAUX_MAJOR,1)) { 2644 if (device == MKDEV(TTYAUX_MAJOR, 1)) {
2643 driver = console_device(&index); 2645 driver = console_device(&index);
2644 if (driver) { 2646 if (driver) {
2645 /* Don't let /dev/console block */ 2647 /* Don't let /dev/console block */
@@ -2679,7 +2681,8 @@ got_driver:
2679 } 2681 }
2680 filp->f_flags = saved_flags; 2682 filp->f_flags = saved_flags;
2681 2683
2682 if (!retval && test_bit(TTY_EXCLUSIVE, &tty->flags) && !capable(CAP_SYS_ADMIN)) 2684 if (!retval && test_bit(TTY_EXCLUSIVE, &tty->flags) &&
2685 !capable(CAP_SYS_ADMIN))
2683 retval = -EBUSY; 2686 retval = -EBUSY;
2684 2687
2685 if (retval) { 2688 if (retval) {
@@ -2723,11 +2726,11 @@ got_driver:
2723 * Allocate a unix98 pty master device from the ptmx driver. 2726 * Allocate a unix98 pty master device from the ptmx driver.
2724 * 2727 *
2725 * Locking: tty_mutex protects theinit_dev work. tty->count should 2728 * Locking: tty_mutex protects theinit_dev work. tty->count should
2726 protect the rest. 2729 * protect the rest.
2727 * allocated_ptys_lock handles the list of free pty numbers 2730 * allocated_ptys_lock handles the list of free pty numbers
2728 */ 2731 */
2729 2732
2730static int ptmx_open(struct inode * inode, struct file * filp) 2733static int ptmx_open(struct inode *inode, struct file *filp)
2731{ 2734{
2732 struct tty_struct *tty; 2735 struct tty_struct *tty;
2733 int retval; 2736 int retval;
@@ -2759,7 +2762,7 @@ static int ptmx_open(struct inode * inode, struct file * filp)
2759 mutex_lock(&tty_mutex); 2762 mutex_lock(&tty_mutex);
2760 retval = init_dev(ptm_driver, index, &tty); 2763 retval = init_dev(ptm_driver, index, &tty);
2761 mutex_unlock(&tty_mutex); 2764 mutex_unlock(&tty_mutex);
2762 2765
2763 if (retval) 2766 if (retval)
2764 goto out; 2767 goto out;
2765 2768
@@ -2800,7 +2803,7 @@ out:
2800 * Takes bkl. See release_dev 2803 * Takes bkl. See release_dev
2801 */ 2804 */
2802 2805
2803static int tty_release(struct inode * inode, struct file * filp) 2806static int tty_release(struct inode *inode, struct file *filp)
2804{ 2807{
2805 lock_kernel(); 2808 lock_kernel();
2806 release_dev(filp); 2809 release_dev(filp);
@@ -2820,16 +2823,16 @@ static int tty_release(struct inode * inode, struct file * filp)
2820 * may be re-entered freely by other callers. 2823 * may be re-entered freely by other callers.
2821 */ 2824 */
2822 2825
2823static unsigned int tty_poll(struct file * filp, poll_table * wait) 2826static unsigned int tty_poll(struct file *filp, poll_table *wait)
2824{ 2827{
2825 struct tty_struct * tty; 2828 struct tty_struct *tty;
2826 struct tty_ldisc *ld; 2829 struct tty_ldisc *ld;
2827 int ret = 0; 2830 int ret = 0;
2828 2831
2829 tty = (struct tty_struct *)filp->private_data; 2832 tty = (struct tty_struct *)filp->private_data;
2830 if (tty_paranoia_check(tty, filp->f_path.dentry->d_inode, "tty_poll")) 2833 if (tty_paranoia_check(tty, filp->f_path.dentry->d_inode, "tty_poll"))
2831 return 0; 2834 return 0;
2832 2835
2833 ld = tty_ldisc_ref_wait(tty); 2836 ld = tty_ldisc_ref_wait(tty);
2834 if (ld->poll) 2837 if (ld->poll)
2835 ret = (ld->poll)(tty, filp, wait); 2838 ret = (ld->poll)(tty, filp, wait);
@@ -2837,15 +2840,15 @@ static unsigned int tty_poll(struct file * filp, poll_table * wait)
2837 return ret; 2840 return ret;
2838} 2841}
2839 2842
2840static int tty_fasync(int fd, struct file * filp, int on) 2843static int tty_fasync(int fd, struct file *filp, int on)
2841{ 2844{
2842 struct tty_struct * tty; 2845 struct tty_struct *tty;
2843 int retval; 2846 int retval;
2844 2847
2845 tty = (struct tty_struct *)filp->private_data; 2848 tty = (struct tty_struct *)filp->private_data;
2846 if (tty_paranoia_check(tty, filp->f_path.dentry->d_inode, "tty_fasync")) 2849 if (tty_paranoia_check(tty, filp->f_path.dentry->d_inode, "tty_fasync"))
2847 return 0; 2850 return 0;
2848 2851
2849 retval = fasync_helper(fd, filp, on, &tty->fasync); 2852 retval = fasync_helper(fd, filp, on, &tty->fasync);
2850 if (retval <= 0) 2853 if (retval <= 0)
2851 return retval; 2854 return retval;
@@ -2893,7 +2896,7 @@ static int tiocsti(struct tty_struct *tty, char __user *p)
2893{ 2896{
2894 char ch, mbz = 0; 2897 char ch, mbz = 0;
2895 struct tty_ldisc *ld; 2898 struct tty_ldisc *ld;
2896 2899
2897 if ((current->signal->tty != tty) && !capable(CAP_SYS_ADMIN)) 2900 if ((current->signal->tty != tty) && !capable(CAP_SYS_ADMIN))
2898 return -EPERM; 2901 return -EPERM;
2899 if (get_user(ch, p)) 2902 if (get_user(ch, p))
@@ -2915,7 +2918,7 @@ static int tiocsti(struct tty_struct *tty, char __user *p)
2915 * is consistent. 2918 * is consistent.
2916 */ 2919 */
2917 2920
2918static int tiocgwinsz(struct tty_struct *tty, struct winsize __user * arg) 2921static int tiocgwinsz(struct tty_struct *tty, struct winsize __user *arg)
2919{ 2922{
2920 int err; 2923 int err;
2921 2924
@@ -2944,7 +2947,7 @@ static int tiocgwinsz(struct tty_struct *tty, struct winsize __user * arg)
2944 */ 2947 */
2945 2948
2946static int tiocswinsz(struct tty_struct *tty, struct tty_struct *real_tty, 2949static int tiocswinsz(struct tty_struct *tty, struct tty_struct *real_tty,
2947 struct winsize __user * arg) 2950 struct winsize __user *arg)
2948{ 2951{
2949 struct winsize tmp_ws; 2952 struct winsize tmp_ws;
2950 2953
@@ -2960,7 +2963,7 @@ static int tiocswinsz(struct tty_struct *tty, struct tty_struct *real_tty,
2960 if (vc_lock_resize(tty->driver_data, tmp_ws.ws_col, 2963 if (vc_lock_resize(tty->driver_data, tmp_ws.ws_col,
2961 tmp_ws.ws_row)) { 2964 tmp_ws.ws_row)) {
2962 mutex_unlock(&tty->termios_mutex); 2965 mutex_unlock(&tty->termios_mutex);
2963 return -ENXIO; 2966 return -ENXIO;
2964 } 2967 }
2965 } 2968 }
2966#endif 2969#endif
@@ -3070,7 +3073,7 @@ static int tiocsctty(struct tty_struct *tty, int arg)
3070 * This tty is already the controlling 3073 * This tty is already the controlling
3071 * tty for another session group! 3074 * tty for another session group!
3072 */ 3075 */
3073 if ((arg == 1) && capable(CAP_SYS_ADMIN)) { 3076 if (arg == 1 && capable(CAP_SYS_ADMIN)) {
3074 /* 3077 /*
3075 * Steal it away 3078 * Steal it away
3076 */ 3079 */
@@ -3303,14 +3306,14 @@ static int tty_tiocmset(struct tty_struct *tty, struct file *file, unsigned int
3303/* 3306/*
3304 * Split this up, as gcc can choke on it otherwise.. 3307 * Split this up, as gcc can choke on it otherwise..
3305 */ 3308 */
3306int tty_ioctl(struct inode * inode, struct file * file, 3309int tty_ioctl(struct inode *inode, struct file *file,
3307 unsigned int cmd, unsigned long arg) 3310 unsigned int cmd, unsigned long arg)
3308{ 3311{
3309 struct tty_struct *tty, *real_tty; 3312 struct tty_struct *tty, *real_tty;
3310 void __user *p = (void __user *)arg; 3313 void __user *p = (void __user *)arg;
3311 int retval; 3314 int retval;
3312 struct tty_ldisc *ld; 3315 struct tty_ldisc *ld;
3313 3316
3314 tty = (struct tty_struct *)file->private_data; 3317 tty = (struct tty_struct *)file->private_data;
3315 if (tty_paranoia_check(tty, inode, "tty_ioctl")) 3318 if (tty_paranoia_check(tty, inode, "tty_ioctl"))
3316 return -EINVAL; 3319 return -EINVAL;
@@ -3326,13 +3329,13 @@ int tty_ioctl(struct inode * inode, struct file * file,
3326 * Break handling by driver 3329 * Break handling by driver
3327 */ 3330 */
3328 if (!tty->driver->break_ctl) { 3331 if (!tty->driver->break_ctl) {
3329 switch(cmd) { 3332 switch (cmd) {
3330 case TIOCSBRK: 3333 case TIOCSBRK:
3331 case TIOCCBRK: 3334 case TIOCCBRK:
3332 if (tty->driver->ioctl) 3335 if (tty->driver->ioctl)
3333 return tty->driver->ioctl(tty, file, cmd, arg); 3336 return tty->driver->ioctl(tty, file, cmd, arg);
3334 return -EINVAL; 3337 return -EINVAL;
3335 3338
3336 /* These two ioctl's always return success; even if */ 3339 /* These two ioctl's always return success; even if */
3337 /* the driver doesn't support them. */ 3340 /* the driver doesn't support them. */
3338 case TCSBRK: 3341 case TCSBRK:
@@ -3354,7 +3357,7 @@ int tty_ioctl(struct inode * inode, struct file * file,
3354 case TIOCSBRK: 3357 case TIOCSBRK:
3355 case TIOCCBRK: 3358 case TIOCCBRK:
3356 case TCSBRK: 3359 case TCSBRK:
3357 case TCSBRKP: 3360 case TCSBRKP:
3358 retval = tty_check_change(tty); 3361 retval = tty_check_change(tty);
3359 if (retval) 3362 if (retval)
3360 return retval; 3363 return retval;
@@ -3367,81 +3370,80 @@ int tty_ioctl(struct inode * inode, struct file * file,
3367 } 3370 }
3368 3371
3369 switch (cmd) { 3372 switch (cmd) {
3370 case TIOCSTI: 3373 case TIOCSTI:
3371 return tiocsti(tty, p); 3374 return tiocsti(tty, p);
3372 case TIOCGWINSZ: 3375 case TIOCGWINSZ:
3373 return tiocgwinsz(tty, p); 3376 return tiocgwinsz(tty, p);
3374 case TIOCSWINSZ: 3377 case TIOCSWINSZ:
3375 return tiocswinsz(tty, real_tty, p); 3378 return tiocswinsz(tty, real_tty, p);
3376 case TIOCCONS: 3379 case TIOCCONS:
3377 return real_tty!=tty ? -EINVAL : tioccons(file); 3380 return real_tty != tty ? -EINVAL : tioccons(file);
3378 case FIONBIO: 3381 case FIONBIO:
3379 return fionbio(file, p); 3382 return fionbio(file, p);
3380 case TIOCEXCL: 3383 case TIOCEXCL:
3381 set_bit(TTY_EXCLUSIVE, &tty->flags); 3384 set_bit(TTY_EXCLUSIVE, &tty->flags);
3382 return 0; 3385 return 0;
3383 case TIOCNXCL: 3386 case TIOCNXCL:
3384 clear_bit(TTY_EXCLUSIVE, &tty->flags); 3387 clear_bit(TTY_EXCLUSIVE, &tty->flags);
3385 return 0; 3388 return 0;
3386 case TIOCNOTTY: 3389 case TIOCNOTTY:
3387 if (current->signal->tty != tty) 3390 if (current->signal->tty != tty)
3388 return -ENOTTY; 3391 return -ENOTTY;
3389 no_tty(); 3392 no_tty();
3390 return 0; 3393 return 0;
3391 case TIOCSCTTY: 3394 case TIOCSCTTY:
3392 return tiocsctty(tty, arg); 3395 return tiocsctty(tty, arg);
3393 case TIOCGPGRP: 3396 case TIOCGPGRP:
3394 return tiocgpgrp(tty, real_tty, p); 3397 return tiocgpgrp(tty, real_tty, p);
3395 case TIOCSPGRP: 3398 case TIOCSPGRP:
3396 return tiocspgrp(tty, real_tty, p); 3399 return tiocspgrp(tty, real_tty, p);
3397 case TIOCGSID: 3400 case TIOCGSID:
3398 return tiocgsid(tty, real_tty, p); 3401 return tiocgsid(tty, real_tty, p);
3399 case TIOCGETD: 3402 case TIOCGETD:
3400 /* FIXME: check this is ok */ 3403 /* FIXME: check this is ok */
3401 return put_user(tty->ldisc.num, (int __user *)p); 3404 return put_user(tty->ldisc.num, (int __user *)p);
3402 case TIOCSETD: 3405 case TIOCSETD:
3403 return tiocsetd(tty, p); 3406 return tiocsetd(tty, p);
3404#ifdef CONFIG_VT 3407#ifdef CONFIG_VT
3405 case TIOCLINUX: 3408 case TIOCLINUX:
3406 return tioclinux(tty, arg); 3409 return tioclinux(tty, arg);
3407#endif 3410#endif
3408 /* 3411 /*
3409 * Break handling 3412 * Break handling
3410 */ 3413 */
3411 case TIOCSBRK: /* Turn break on, unconditionally */ 3414 case TIOCSBRK: /* Turn break on, unconditionally */
3412 tty->driver->break_ctl(tty, -1); 3415 tty->driver->break_ctl(tty, -1);
3413 return 0; 3416 return 0;
3414
3415 case TIOCCBRK: /* Turn break off, unconditionally */
3416 tty->driver->break_ctl(tty, 0);
3417 return 0;
3418 case TCSBRK: /* SVID version: non-zero arg --> no break */
3419 /* non-zero arg means wait for all output data
3420 * to be sent (performed above) but don't send break.
3421 * This is used by the tcdrain() termios function.
3422 */
3423 if (!arg)
3424 return send_break(tty, 250);
3425 return 0;
3426 case TCSBRKP: /* support for POSIX tcsendbreak() */
3427 return send_break(tty, arg ? arg*100 : 250);
3428
3429 case TIOCMGET:
3430 return tty_tiocmget(tty, file, p);
3431 3417
3432 case TIOCMSET: 3418 case TIOCCBRK: /* Turn break off, unconditionally */
3433 case TIOCMBIC: 3419 tty->driver->break_ctl(tty, 0);
3434 case TIOCMBIS: 3420 return 0;
3435 return tty_tiocmset(tty, file, cmd, p); 3421 case TCSBRK: /* SVID version: non-zero arg --> no break */
3436 case TCFLSH: 3422 /* non-zero arg means wait for all output data
3437 switch (arg) { 3423 * to be sent (performed above) but don't send break.
3438 case TCIFLUSH: 3424 * This is used by the tcdrain() termios function.
3439 case TCIOFLUSH: 3425 */
3440 /* flush tty buffer and allow ldisc to process ioctl */ 3426 if (!arg)
3441 tty_buffer_flush(tty); 3427 return send_break(tty, 250);
3442 break; 3428 return 0;
3443 } 3429 case TCSBRKP: /* support for POSIX tcsendbreak() */
3430 return send_break(tty, arg ? arg*100 : 250);
3431
3432 case TIOCMGET:
3433 return tty_tiocmget(tty, file, p);
3434 case TIOCMSET:
3435 case TIOCMBIC:
3436 case TIOCMBIS:
3437 return tty_tiocmset(tty, file, cmd, p);
3438 case TCFLSH:
3439 switch (arg) {
3440 case TCIFLUSH:
3441 case TCIOFLUSH:
3442 /* flush tty buffer and allow ldisc to process ioctl */
3443 tty_buffer_flush(tty);
3444 break; 3444 break;
3445 }
3446 break;
3445 } 3447 }
3446 if (tty->driver->ioctl) { 3448 if (tty->driver->ioctl) {
3447 retval = (tty->driver->ioctl)(tty, file, cmd, arg); 3449 retval = (tty->driver->ioctl)(tty, file, cmd, arg);
@@ -3460,7 +3462,7 @@ int tty_ioctl(struct inode * inode, struct file * file,
3460} 3462}
3461 3463
3462#ifdef CONFIG_COMPAT 3464#ifdef CONFIG_COMPAT
3463static long tty_compat_ioctl(struct file * file, unsigned int cmd, 3465static long tty_compat_ioctl(struct file *file, unsigned int cmd,
3464 unsigned long arg) 3466 unsigned long arg)
3465{ 3467{
3466 struct inode *inode = file->f_dentry->d_inode; 3468 struct inode *inode = file->f_dentry->d_inode;
@@ -3491,7 +3493,7 @@ static long tty_compat_ioctl(struct file * file, unsigned int cmd,
3491 * prevent trojan horses by killing all processes associated with this 3493 * prevent trojan horses by killing all processes associated with this
3492 * tty when the user hits the "Secure Attention Key". Required for 3494 * tty when the user hits the "Secure Attention Key". Required for
3493 * super-paranoid applications --- see the Orange Book for more details. 3495 * super-paranoid applications --- see the Orange Book for more details.
3494 * 3496 *
3495 * This code could be nicer; ideally it should send a HUP, wait a few 3497 * This code could be nicer; ideally it should send a HUP, wait a few
3496 * seconds, then send a INT, and then a KILL signal. But you then 3498 * seconds, then send a INT, and then a KILL signal. But you then
3497 * have to coordinate with the init process, since all processes associated 3499 * have to coordinate with the init process, since all processes associated
@@ -3515,16 +3517,16 @@ void __do_SAK(struct tty_struct *tty)
3515 int i; 3517 int i;
3516 struct file *filp; 3518 struct file *filp;
3517 struct fdtable *fdt; 3519 struct fdtable *fdt;
3518 3520
3519 if (!tty) 3521 if (!tty)
3520 return; 3522 return;
3521 session = tty->session; 3523 session = tty->session;
3522 3524
3523 tty_ldisc_flush(tty); 3525 tty_ldisc_flush(tty);
3524 3526
3525 if (tty->driver->flush_buffer) 3527 if (tty->driver->flush_buffer)
3526 tty->driver->flush_buffer(tty); 3528 tty->driver->flush_buffer(tty);
3527 3529
3528 read_lock(&tasklist_lock); 3530 read_lock(&tasklist_lock);
3529 /* Kill the entire session */ 3531 /* Kill the entire session */
3530 do_each_pid_task(session, PIDTYPE_SID, p) { 3532 do_each_pid_task(session, PIDTYPE_SID, p) {
@@ -3552,7 +3554,7 @@ void __do_SAK(struct tty_struct *tty)
3552 */ 3554 */
3553 spin_lock(&p->files->file_lock); 3555 spin_lock(&p->files->file_lock);
3554 fdt = files_fdtable(p->files); 3556 fdt = files_fdtable(p->files);
3555 for (i=0; i < fdt->max_fds; i++) { 3557 for (i = 0; i < fdt->max_fds; i++) {
3556 filp = fcheck_files(p->files, i); 3558 filp = fcheck_files(p->files, i);
3557 if (!filp) 3559 if (!filp)
3558 continue; 3560 continue;
@@ -3606,7 +3608,7 @@ EXPORT_SYMBOL(do_SAK);
3606 * while invoking the line discipline receive_buf method. The 3608 * while invoking the line discipline receive_buf method. The
3607 * receive_buf method is single threaded for each tty instance. 3609 * receive_buf method is single threaded for each tty instance.
3608 */ 3610 */
3609 3611
3610static void flush_to_ldisc(struct work_struct *work) 3612static void flush_to_ldisc(struct work_struct *work)
3611{ 3613{
3612 struct tty_struct *tty = 3614 struct tty_struct *tty =
@@ -3622,7 +3624,8 @@ static void flush_to_ldisc(struct work_struct *work)
3622 return; 3624 return;
3623 3625
3624 spin_lock_irqsave(&tty->buf.lock, flags); 3626 spin_lock_irqsave(&tty->buf.lock, flags);
3625 set_bit(TTY_FLUSHING, &tty->flags); /* So we know a flush is running */ 3627 /* So we know a flush is running */
3628 set_bit(TTY_FLUSHING, &tty->flags);
3626 head = tty->buf.head; 3629 head = tty->buf.head;
3627 if (head != NULL) { 3630 if (head != NULL) {
3628 tty->buf.head = NULL; 3631 tty->buf.head = NULL;
@@ -3795,7 +3798,8 @@ struct device *tty_register_device(struct tty_driver *driver, unsigned index,
3795 3798
3796void tty_unregister_device(struct tty_driver *driver, unsigned index) 3799void tty_unregister_device(struct tty_driver *driver, unsigned index)
3797{ 3800{
3798 device_destroy(tty_class, MKDEV(driver->major, driver->minor_start) + index); 3801 device_destroy(tty_class,
3802 MKDEV(driver->major, driver->minor_start) + index);
3799} 3803}
3800 3804
3801EXPORT_SYMBOL(tty_register_device); 3805EXPORT_SYMBOL(tty_register_device);
@@ -3859,7 +3863,7 @@ EXPORT_SYMBOL(tty_set_operations);
3859int tty_register_driver(struct tty_driver *driver) 3863int tty_register_driver(struct tty_driver *driver)
3860{ 3864{
3861 int error; 3865 int error;
3862 int i; 3866 int i;
3863 dev_t dev; 3867 dev_t dev;
3864 void **p = NULL; 3868 void **p = NULL;
3865 3869
@@ -3873,8 +3877,8 @@ int tty_register_driver(struct tty_driver *driver)
3873 } 3877 }
3874 3878
3875 if (!driver->major) { 3879 if (!driver->major) {
3876 error = alloc_chrdev_region(&dev, driver->minor_start, driver->num, 3880 error = alloc_chrdev_region(&dev, driver->minor_start,
3877 driver->name); 3881 driver->num, driver->name);
3878 if (!error) { 3882 if (!error) {
3879 driver->major = MAJOR(dev); 3883 driver->major = MAJOR(dev);
3880 driver->minor_start = MINOR(dev); 3884 driver->minor_start = MINOR(dev);
@@ -3891,7 +3895,8 @@ int tty_register_driver(struct tty_driver *driver)
3891 if (p) { 3895 if (p) {
3892 driver->ttys = (struct tty_struct **)p; 3896 driver->ttys = (struct tty_struct **)p;
3893 driver->termios = (struct ktermios **)(p + driver->num); 3897 driver->termios = (struct ktermios **)(p + driver->num);
3894 driver->termios_locked = (struct ktermios **)(p + driver->num * 2); 3898 driver->termios_locked = (struct ktermios **)
3899 (p + driver->num * 2);
3895 } else { 3900 } else {
3896 driver->ttys = NULL; 3901 driver->ttys = NULL;
3897 driver->termios = NULL; 3902 driver->termios = NULL;
@@ -3911,13 +3916,13 @@ int tty_register_driver(struct tty_driver *driver)
3911 3916
3912 if (!driver->put_char) 3917 if (!driver->put_char)
3913 driver->put_char = tty_default_put_char; 3918 driver->put_char = tty_default_put_char;
3914 3919
3915 mutex_lock(&tty_mutex); 3920 mutex_lock(&tty_mutex);
3916 list_add(&driver->tty_drivers, &tty_drivers); 3921 list_add(&driver->tty_drivers, &tty_drivers);
3917 mutex_unlock(&tty_mutex); 3922 mutex_unlock(&tty_mutex);
3918 3923
3919 if ( !(driver->flags & TTY_DRIVER_DYNAMIC_DEV) ) { 3924 if (!(driver->flags & TTY_DRIVER_DYNAMIC_DEV)) {
3920 for(i = 0; i < driver->num; i++) 3925 for (i = 0; i < driver->num; i++)
3921 tty_register_device(driver, i, NULL); 3926 tty_register_device(driver, i, NULL);
3922 } 3927 }
3923 proc_tty_register_driver(driver); 3928 proc_tty_register_driver(driver);
@@ -4037,7 +4042,7 @@ void __init console_init(void)
4037 (void) tty_register_ldisc(N_TTY, &tty_ldisc_N_TTY); 4042 (void) tty_register_ldisc(N_TTY, &tty_ldisc_N_TTY);
4038 4043
4039 /* 4044 /*
4040 * set up the console device so that later boot sequences can 4045 * set up the console device so that later boot sequences can
4041 * inform about problems etc.. 4046 * inform about problems etc..
4042 */ 4047 */
4043 call = __con_initcall_start; 4048 call = __con_initcall_start;
diff --git a/drivers/char/tty_ioctl.c b/drivers/char/tty_ioctl.c
index d4b6d64e858b..f95a80b2265f 100644
--- a/drivers/char/tty_ioctl.c
+++ b/drivers/char/tty_ioctl.c
@@ -50,11 +50,11 @@
50 * Locking: none 50 * Locking: none
51 */ 51 */
52 52
53void tty_wait_until_sent(struct tty_struct * tty, long timeout) 53void tty_wait_until_sent(struct tty_struct *tty, long timeout)
54{ 54{
55#ifdef TTY_DEBUG_WAIT_UNTIL_SENT 55#ifdef TTY_DEBUG_WAIT_UNTIL_SENT
56 char buf[64]; 56 char buf[64];
57 57
58 printk(KERN_DEBUG "%s wait until sent...\n", tty_name(tty, buf)); 58 printk(KERN_DEBUG "%s wait until sent...\n", tty_name(tty, buf));
59#endif 59#endif
60 if (!tty->driver->chars_in_buffer) 60 if (!tty->driver->chars_in_buffer)
@@ -67,7 +67,6 @@ void tty_wait_until_sent(struct tty_struct * tty, long timeout)
67 if (tty->driver->wait_until_sent) 67 if (tty->driver->wait_until_sent)
68 tty->driver->wait_until_sent(tty, timeout); 68 tty->driver->wait_until_sent(tty, timeout);
69} 69}
70
71EXPORT_SYMBOL(tty_wait_until_sent); 70EXPORT_SYMBOL(tty_wait_until_sent);
72 71
73static void unset_locked_termios(struct ktermios *termios, 72static void unset_locked_termios(struct ktermios *termios,
@@ -75,8 +74,8 @@ static void unset_locked_termios(struct ktermios *termios,
75 struct ktermios *locked) 74 struct ktermios *locked)
76{ 75{
77 int i; 76 int i;
78 77
79#define NOSET_MASK(x,y,z) (x = ((x) & ~(z)) | ((y) & (z))) 78#define NOSET_MASK(x, y, z) (x = ((x) & ~(z)) | ((y) & (z)))
80 79
81 if (!locked) { 80 if (!locked) {
82 printk(KERN_WARNING "Warning?!? termios_locked is NULL.\n"); 81 printk(KERN_WARNING "Warning?!? termios_locked is NULL.\n");
@@ -88,7 +87,7 @@ static void unset_locked_termios(struct ktermios *termios,
88 NOSET_MASK(termios->c_cflag, old->c_cflag, locked->c_cflag); 87 NOSET_MASK(termios->c_cflag, old->c_cflag, locked->c_cflag);
89 NOSET_MASK(termios->c_lflag, old->c_lflag, locked->c_lflag); 88 NOSET_MASK(termios->c_lflag, old->c_lflag, locked->c_lflag);
90 termios->c_line = locked->c_line ? old->c_line : termios->c_line; 89 termios->c_line = locked->c_line ? old->c_line : termios->c_line;
91 for (i=0; i < NCCS; i++) 90 for (i = 0; i < NCCS; i++)
92 termios->c_cc[i] = locked->c_cc[i] ? 91 termios->c_cc[i] = locked->c_cc[i] ?
93 old->c_cc[i] : termios->c_cc[i]; 92 old->c_cc[i] : termios->c_cc[i];
94 /* FIXME: What should we do for i/ospeed */ 93 /* FIXME: What should we do for i/ospeed */
@@ -163,7 +162,6 @@ speed_t tty_termios_baud_rate(struct ktermios *termios)
163 } 162 }
164 return baud_table[cbaud]; 163 return baud_table[cbaud];
165} 164}
166
167EXPORT_SYMBOL(tty_termios_baud_rate); 165EXPORT_SYMBOL(tty_termios_baud_rate);
168 166
169/** 167/**
@@ -203,7 +201,6 @@ speed_t tty_termios_input_baud_rate(struct ktermios *termios)
203 return tty_termios_baud_rate(termios); 201 return tty_termios_baud_rate(termios);
204#endif 202#endif
205} 203}
206
207EXPORT_SYMBOL(tty_termios_input_baud_rate); 204EXPORT_SYMBOL(tty_termios_input_baud_rate);
208 205
209/** 206/**
@@ -338,7 +335,6 @@ speed_t tty_get_baud_rate(struct tty_struct *tty)
338 335
339 return baud; 336 return baud;
340} 337}
341
342EXPORT_SYMBOL(tty_get_baud_rate); 338EXPORT_SYMBOL(tty_get_baud_rate);
343 339
344/** 340/**
@@ -361,7 +357,6 @@ void tty_termios_copy_hw(struct ktermios *new, struct ktermios *old)
361 new->c_ispeed = old->c_ispeed; 357 new->c_ispeed = old->c_ispeed;
362 new->c_ospeed = old->c_ospeed; 358 new->c_ospeed = old->c_ospeed;
363} 359}
364
365EXPORT_SYMBOL(tty_termios_copy_hw); 360EXPORT_SYMBOL(tty_termios_copy_hw);
366 361
367/** 362/**
@@ -395,16 +390,16 @@ EXPORT_SYMBOL(tty_termios_hw_change);
395 * Locking: termios_sem 390 * Locking: termios_sem
396 */ 391 */
397 392
398static void change_termios(struct tty_struct * tty, struct ktermios * new_termios) 393static void change_termios(struct tty_struct *tty, struct ktermios *new_termios)
399{ 394{
400 int canon_change; 395 int canon_change;
401 struct ktermios old_termios = *tty->termios; 396 struct ktermios old_termios = *tty->termios;
402 struct tty_ldisc *ld; 397 struct tty_ldisc *ld;
403 398
404 /* 399 /*
405 * Perform the actual termios internal changes under lock. 400 * Perform the actual termios internal changes under lock.
406 */ 401 */
407 402
408 403
409 /* FIXME: we need to decide on some locking/ordering semantics 404 /* FIXME: we need to decide on some locking/ordering semantics
410 for the set_termios notification eventually */ 405 for the set_termios notification eventually */
@@ -419,7 +414,7 @@ static void change_termios(struct tty_struct * tty, struct ktermios * new_termio
419 tty->canon_data = 0; 414 tty->canon_data = 0;
420 tty->erasing = 0; 415 tty->erasing = 0;
421 } 416 }
422 417
423 /* This bit should be in the ldisc code */ 418 /* This bit should be in the ldisc code */
424 if (canon_change && !L_ICANON(tty) && tty->read_cnt) 419 if (canon_change && !L_ICANON(tty) && tty->read_cnt)
425 /* Get characters left over from canonical mode. */ 420 /* Get characters left over from canonical mode. */
@@ -442,7 +437,7 @@ static void change_termios(struct tty_struct * tty, struct ktermios * new_termio
442 wake_up_interruptible(&tty->link->read_wait); 437 wake_up_interruptible(&tty->link->read_wait);
443 } 438 }
444 } 439 }
445 440
446 if (tty->driver->set_termios) 441 if (tty->driver->set_termios)
447 (*tty->driver->set_termios)(tty, &old_termios); 442 (*tty->driver->set_termios)(tty, &old_termios);
448 else 443 else
@@ -470,7 +465,7 @@ static void change_termios(struct tty_struct * tty, struct ktermios * new_termio
470 * Called functions take ldisc and termios_sem locks 465 * Called functions take ldisc and termios_sem locks
471 */ 466 */
472 467
473static int set_termios(struct tty_struct * tty, void __user *arg, int opt) 468static int set_termios(struct tty_struct *tty, void __user *arg, int opt)
474{ 469{
475 struct ktermios tmp_termios; 470 struct ktermios tmp_termios;
476 struct tty_ldisc *ld; 471 struct tty_ldisc *ld;
@@ -501,19 +496,19 @@ static int set_termios(struct tty_struct * tty, void __user *arg, int opt)
501 return -EFAULT; 496 return -EFAULT;
502#endif 497#endif
503 498
504 /* If old style Bfoo values are used then load c_ispeed/c_ospeed with the real speed 499 /* If old style Bfoo values are used then load c_ispeed/c_ospeed
505 so its unconditionally usable */ 500 * with the real speed so its unconditionally usable */
506 tmp_termios.c_ispeed = tty_termios_input_baud_rate(&tmp_termios); 501 tmp_termios.c_ispeed = tty_termios_input_baud_rate(&tmp_termios);
507 tmp_termios.c_ospeed = tty_termios_baud_rate(&tmp_termios); 502 tmp_termios.c_ospeed = tty_termios_baud_rate(&tmp_termios);
508 503
509 ld = tty_ldisc_ref(tty); 504 ld = tty_ldisc_ref(tty);
510 505
511 if (ld != NULL) { 506 if (ld != NULL) {
512 if ((opt & TERMIOS_FLUSH) && ld->flush_buffer) 507 if ((opt & TERMIOS_FLUSH) && ld->flush_buffer)
513 ld->flush_buffer(tty); 508 ld->flush_buffer(tty);
514 tty_ldisc_deref(ld); 509 tty_ldisc_deref(ld);
515 } 510 }
516 511
517 if (opt & TERMIOS_WAIT) { 512 if (opt & TERMIOS_WAIT) {
518 tty_wait_until_sent(tty, 0); 513 tty_wait_until_sent(tty, 0);
519 if (signal_pending(current)) 514 if (signal_pending(current))
@@ -529,14 +524,14 @@ static int set_termios(struct tty_struct * tty, void __user *arg, int opt)
529 return 0; 524 return 0;
530} 525}
531 526
532static int get_termio(struct tty_struct * tty, struct termio __user * termio) 527static int get_termio(struct tty_struct *tty, struct termio __user *termio)
533{ 528{
534 if (kernel_termios_to_user_termio(termio, tty->termios)) 529 if (kernel_termios_to_user_termio(termio, tty->termios))
535 return -EFAULT; 530 return -EFAULT;
536 return 0; 531 return 0;
537} 532}
538 533
539static unsigned long inq_canon(struct tty_struct * tty) 534static unsigned long inq_canon(struct tty_struct *tty)
540{ 535{
541 int nr, head, tail; 536 int nr, head, tail;
542 537
@@ -561,7 +556,7 @@ static unsigned long inq_canon(struct tty_struct * tty)
561 * 556 *
562 * The "sg_flags" translation is a joke.. 557 * The "sg_flags" translation is a joke..
563 */ 558 */
564static int get_sgflags(struct tty_struct * tty) 559static int get_sgflags(struct tty_struct *tty)
565{ 560{
566 int flags = 0; 561 int flags = 0;
567 562
@@ -579,7 +574,7 @@ static int get_sgflags(struct tty_struct * tty)
579 return flags; 574 return flags;
580} 575}
581 576
582static int get_sgttyb(struct tty_struct * tty, struct sgttyb __user * sgttyb) 577static int get_sgttyb(struct tty_struct *tty, struct sgttyb __user *sgttyb)
583{ 578{
584 struct sgttyb tmp; 579 struct sgttyb tmp;
585 580
@@ -590,11 +585,11 @@ static int get_sgttyb(struct tty_struct * tty, struct sgttyb __user * sgttyb)
590 tmp.sg_kill = tty->termios->c_cc[VKILL]; 585 tmp.sg_kill = tty->termios->c_cc[VKILL];
591 tmp.sg_flags = get_sgflags(tty); 586 tmp.sg_flags = get_sgflags(tty);
592 mutex_unlock(&tty->termios_mutex); 587 mutex_unlock(&tty->termios_mutex);
593 588
594 return copy_to_user(sgttyb, &tmp, sizeof(tmp)) ? -EFAULT : 0; 589 return copy_to_user(sgttyb, &tmp, sizeof(tmp)) ? -EFAULT : 0;
595} 590}
596 591
597static void set_sgflags(struct ktermios * termios, int flags) 592static void set_sgflags(struct ktermios *termios, int flags)
598{ 593{
599 termios->c_iflag = ICRNL | IXON; 594 termios->c_iflag = ICRNL | IXON;
600 termios->c_oflag = 0; 595 termios->c_oflag = 0;
@@ -631,7 +626,7 @@ static void set_sgflags(struct ktermios * termios, int flags)
631 * Locking: termios_sem 626 * Locking: termios_sem
632 */ 627 */
633 628
634static int set_sgttyb(struct tty_struct * tty, struct sgttyb __user * sgttyb) 629static int set_sgttyb(struct tty_struct *tty, struct sgttyb __user *sgttyb)
635{ 630{
636 int retval; 631 int retval;
637 struct sgttyb tmp; 632 struct sgttyb tmp;
@@ -640,7 +635,7 @@ static int set_sgttyb(struct tty_struct * tty, struct sgttyb __user * sgttyb)
640 retval = tty_check_change(tty); 635 retval = tty_check_change(tty);
641 if (retval) 636 if (retval)
642 return retval; 637 return retval;
643 638
644 if (copy_from_user(&tmp, sgttyb, sizeof(tmp))) 639 if (copy_from_user(&tmp, sgttyb, sizeof(tmp)))
645 return -EFAULT; 640 return -EFAULT;
646 641
@@ -651,7 +646,8 @@ static int set_sgttyb(struct tty_struct * tty, struct sgttyb __user * sgttyb)
651 set_sgflags(&termios, tmp.sg_flags); 646 set_sgflags(&termios, tmp.sg_flags);
652 /* Try and encode into Bfoo format */ 647 /* Try and encode into Bfoo format */
653#ifdef BOTHER 648#ifdef BOTHER
654 tty_termios_encode_baud_rate(&termios, termios.c_ispeed, termios.c_ospeed); 649 tty_termios_encode_baud_rate(&termios, termios.c_ispeed,
650 termios.c_ospeed);
655#endif 651#endif
656 mutex_unlock(&tty->termios_mutex); 652 mutex_unlock(&tty->termios_mutex);
657 change_termios(tty, &termios); 653 change_termios(tty, &termios);
@@ -660,7 +656,7 @@ static int set_sgttyb(struct tty_struct * tty, struct sgttyb __user * sgttyb)
660#endif 656#endif
661 657
662#ifdef TIOCGETC 658#ifdef TIOCGETC
663static int get_tchars(struct tty_struct * tty, struct tchars __user * tchars) 659static int get_tchars(struct tty_struct *tty, struct tchars __user *tchars)
664{ 660{
665 struct tchars tmp; 661 struct tchars tmp;
666 662
@@ -673,7 +669,7 @@ static int get_tchars(struct tty_struct * tty, struct tchars __user * tchars)
673 return copy_to_user(tchars, &tmp, sizeof(tmp)) ? -EFAULT : 0; 669 return copy_to_user(tchars, &tmp, sizeof(tmp)) ? -EFAULT : 0;
674} 670}
675 671
676static int set_tchars(struct tty_struct * tty, struct tchars __user * tchars) 672static int set_tchars(struct tty_struct *tty, struct tchars __user *tchars)
677{ 673{
678 struct tchars tmp; 674 struct tchars tmp;
679 675
@@ -690,20 +686,22 @@ static int set_tchars(struct tty_struct * tty, struct tchars __user * tchars)
690#endif 686#endif
691 687
692#ifdef TIOCGLTC 688#ifdef TIOCGLTC
693static int get_ltchars(struct tty_struct * tty, struct ltchars __user * ltchars) 689static int get_ltchars(struct tty_struct *tty, struct ltchars __user *ltchars)
694{ 690{
695 struct ltchars tmp; 691 struct ltchars tmp;
696 692
697 tmp.t_suspc = tty->termios->c_cc[VSUSP]; 693 tmp.t_suspc = tty->termios->c_cc[VSUSP];
698 tmp.t_dsuspc = tty->termios->c_cc[VSUSP]; /* what is dsuspc anyway? */ 694 /* what is dsuspc anyway? */
695 tmp.t_dsuspc = tty->termios->c_cc[VSUSP];
699 tmp.t_rprntc = tty->termios->c_cc[VREPRINT]; 696 tmp.t_rprntc = tty->termios->c_cc[VREPRINT];
700 tmp.t_flushc = tty->termios->c_cc[VEOL2]; /* what is flushc anyway? */ 697 /* what is flushc anyway? */
698 tmp.t_flushc = tty->termios->c_cc[VEOL2];
701 tmp.t_werasc = tty->termios->c_cc[VWERASE]; 699 tmp.t_werasc = tty->termios->c_cc[VWERASE];
702 tmp.t_lnextc = tty->termios->c_cc[VLNEXT]; 700 tmp.t_lnextc = tty->termios->c_cc[VLNEXT];
703 return copy_to_user(ltchars, &tmp, sizeof(tmp)) ? -EFAULT : 0; 701 return copy_to_user(ltchars, &tmp, sizeof(tmp)) ? -EFAULT : 0;
704} 702}
705 703
706static int set_ltchars(struct tty_struct * tty, struct ltchars __user * ltchars) 704static int set_ltchars(struct tty_struct *tty, struct ltchars __user *ltchars)
707{ 705{
708 struct ltchars tmp; 706 struct ltchars tmp;
709 707
@@ -711,9 +709,11 @@ static int set_ltchars(struct tty_struct * tty, struct ltchars __user * ltchars)
711 return -EFAULT; 709 return -EFAULT;
712 710
713 tty->termios->c_cc[VSUSP] = tmp.t_suspc; 711 tty->termios->c_cc[VSUSP] = tmp.t_suspc;
714 tty->termios->c_cc[VEOL2] = tmp.t_dsuspc; /* what is dsuspc anyway? */ 712 /* what is dsuspc anyway? */
713 tty->termios->c_cc[VEOL2] = tmp.t_dsuspc;
715 tty->termios->c_cc[VREPRINT] = tmp.t_rprntc; 714 tty->termios->c_cc[VREPRINT] = tmp.t_rprntc;
716 tty->termios->c_cc[VEOL2] = tmp.t_flushc; /* what is flushc anyway? */ 715 /* what is flushc anyway? */
716 tty->termios->c_cc[VEOL2] = tmp.t_flushc;
717 tty->termios->c_cc[VWERASE] = tmp.t_werasc; 717 tty->termios->c_cc[VWERASE] = tmp.t_werasc;
718 tty->termios->c_cc[VLNEXT] = tmp.t_lnextc; 718 tty->termios->c_cc[VLNEXT] = tmp.t_lnextc;
719 return 0; 719 return 0;
@@ -761,10 +761,10 @@ static int send_prio_char(struct tty_struct *tty, char ch)
761 * consistent mode setting. 761 * consistent mode setting.
762 */ 762 */
763 763
764int tty_mode_ioctl(struct tty_struct * tty, struct file *file, 764int tty_mode_ioctl(struct tty_struct *tty, struct file *file,
765 unsigned int cmd, unsigned long arg) 765 unsigned int cmd, unsigned long arg)
766{ 766{
767 struct tty_struct * real_tty; 767 struct tty_struct *real_tty;
768 void __user *p = (void __user *)arg; 768 void __user *p = (void __user *)arg;
769 769
770 if (tty->driver->type == TTY_DRIVER_TYPE_PTY && 770 if (tty->driver->type == TTY_DRIVER_TYPE_PTY &&
@@ -775,100 +775,100 @@ int tty_mode_ioctl(struct tty_struct * tty, struct file *file,
775 775
776 switch (cmd) { 776 switch (cmd) {
777#ifdef TIOCGETP 777#ifdef TIOCGETP
778 case TIOCGETP: 778 case TIOCGETP:
779 return get_sgttyb(real_tty, (struct sgttyb __user *) arg); 779 return get_sgttyb(real_tty, (struct sgttyb __user *) arg);
780 case TIOCSETP: 780 case TIOCSETP:
781 case TIOCSETN: 781 case TIOCSETN:
782 return set_sgttyb(real_tty, (struct sgttyb __user *) arg); 782 return set_sgttyb(real_tty, (struct sgttyb __user *) arg);
783#endif 783#endif
784#ifdef TIOCGETC 784#ifdef TIOCGETC
785 case TIOCGETC: 785 case TIOCGETC:
786 return get_tchars(real_tty, p); 786 return get_tchars(real_tty, p);
787 case TIOCSETC: 787 case TIOCSETC:
788 return set_tchars(real_tty, p); 788 return set_tchars(real_tty, p);
789#endif 789#endif
790#ifdef TIOCGLTC 790#ifdef TIOCGLTC
791 case TIOCGLTC: 791 case TIOCGLTC:
792 return get_ltchars(real_tty, p); 792 return get_ltchars(real_tty, p);
793 case TIOCSLTC: 793 case TIOCSLTC:
794 return set_ltchars(real_tty, p); 794 return set_ltchars(real_tty, p);
795#endif 795#endif
796 case TCSETSF: 796 case TCSETSF:
797 return set_termios(real_tty, p, TERMIOS_FLUSH | TERMIOS_WAIT | TERMIOS_OLD); 797 return set_termios(real_tty, p, TERMIOS_FLUSH | TERMIOS_WAIT | TERMIOS_OLD);
798 case TCSETSW: 798 case TCSETSW:
799 return set_termios(real_tty, p, TERMIOS_WAIT | TERMIOS_OLD); 799 return set_termios(real_tty, p, TERMIOS_WAIT | TERMIOS_OLD);
800 case TCSETS: 800 case TCSETS:
801 return set_termios(real_tty, p, TERMIOS_OLD); 801 return set_termios(real_tty, p, TERMIOS_OLD);
802#ifndef TCGETS2 802#ifndef TCGETS2
803 case TCGETS: 803 case TCGETS:
804 if (kernel_termios_to_user_termios((struct termios __user *)arg, real_tty->termios)) 804 if (kernel_termios_to_user_termios((struct termios __user *)arg, real_tty->termios))
805 return -EFAULT; 805 return -EFAULT;
806 return 0; 806 return 0;
807#else 807#else
808 case TCGETS: 808 case TCGETS:
809 if (kernel_termios_to_user_termios_1((struct termios __user *)arg, real_tty->termios)) 809 if (kernel_termios_to_user_termios_1((struct termios __user *)arg, real_tty->termios))
810 return -EFAULT; 810 return -EFAULT;
811 return 0; 811 return 0;
812 case TCGETS2: 812 case TCGETS2:
813 if (kernel_termios_to_user_termios((struct termios2 __user *)arg, real_tty->termios)) 813 if (kernel_termios_to_user_termios((struct termios2 __user *)arg, real_tty->termios))
814 return -EFAULT; 814 return -EFAULT;
815 return 0; 815 return 0;
816 case TCSETSF2: 816 case TCSETSF2:
817 return set_termios(real_tty, p, TERMIOS_FLUSH | TERMIOS_WAIT); 817 return set_termios(real_tty, p, TERMIOS_FLUSH | TERMIOS_WAIT);
818 case TCSETSW2: 818 case TCSETSW2:
819 return set_termios(real_tty, p, TERMIOS_WAIT); 819 return set_termios(real_tty, p, TERMIOS_WAIT);
820 case TCSETS2: 820 case TCSETS2:
821 return set_termios(real_tty, p, 0); 821 return set_termios(real_tty, p, 0);
822#endif 822#endif
823 case TCGETA: 823 case TCGETA:
824 return get_termio(real_tty, p); 824 return get_termio(real_tty, p);
825 case TCSETAF: 825 case TCSETAF:
826 return set_termios(real_tty, p, TERMIOS_FLUSH | TERMIOS_WAIT | TERMIOS_TERMIO); 826 return set_termios(real_tty, p, TERMIOS_FLUSH | TERMIOS_WAIT | TERMIOS_TERMIO);
827 case TCSETAW: 827 case TCSETAW:
828 return set_termios(real_tty, p, TERMIOS_WAIT | TERMIOS_TERMIO); 828 return set_termios(real_tty, p, TERMIOS_WAIT | TERMIOS_TERMIO);
829 case TCSETA: 829 case TCSETA:
830 return set_termios(real_tty, p, TERMIOS_TERMIO); 830 return set_termios(real_tty, p, TERMIOS_TERMIO);
831#ifndef TCGETS2 831#ifndef TCGETS2
832 case TIOCGLCKTRMIOS: 832 case TIOCGLCKTRMIOS:
833 if (kernel_termios_to_user_termios((struct termios __user *)arg, real_tty->termios_locked)) 833 if (kernel_termios_to_user_termios((struct termios __user *)arg, real_tty->termios_locked))
834 return -EFAULT; 834 return -EFAULT;
835 return 0; 835 return 0;
836 836 case TIOCSLCKTRMIOS:
837 case TIOCSLCKTRMIOS: 837 if (!capable(CAP_SYS_ADMIN))
838 if (!capable(CAP_SYS_ADMIN)) 838 return -EPERM;
839 return -EPERM; 839 if (user_termios_to_kernel_termios(real_tty->termios_locked,
840 if (user_termios_to_kernel_termios(real_tty->termios_locked, (struct termios __user *) arg)) 840 (struct termios __user *) arg))
841 return -EFAULT; 841 return -EFAULT;
842 return 0; 842 return 0;
843#else 843#else
844 case TIOCGLCKTRMIOS: 844 case TIOCGLCKTRMIOS:
845 if (kernel_termios_to_user_termios_1((struct termios __user *)arg, real_tty->termios_locked)) 845 if (kernel_termios_to_user_termios_1((struct termios __user *)arg, real_tty->termios_locked))
846 return -EFAULT; 846 return -EFAULT;
847 return 0; 847 return 0;
848 848 case TIOCSLCKTRMIOS:
849 case TIOCSLCKTRMIOS: 849 if (!capable(CAP_SYS_ADMIN))
850 if (!capable(CAP_SYS_ADMIN)) 850 return -EPERM;
851 return -EPERM; 851 if (user_termios_to_kernel_termios_1(real_tty->termios_locked,
852 if (user_termios_to_kernel_termios_1(real_tty->termios_locked, (struct termios __user *) arg)) 852 (struct termios __user *) arg))
853 return -EFAULT; 853 return -EFAULT;
854 return 0; 854 return 0;
855#endif 855#endif
856 case TIOCGSOFTCAR: 856 case TIOCGSOFTCAR:
857 return put_user(C_CLOCAL(tty) ? 1 : 0, (int __user *)arg); 857 return put_user(C_CLOCAL(tty) ? 1 : 0,
858 case TIOCSSOFTCAR: 858 (int __user *)arg);
859 if (get_user(arg, (unsigned int __user *) arg)) 859 case TIOCSSOFTCAR:
860 return -EFAULT; 860 if (get_user(arg, (unsigned int __user *) arg))
861 mutex_lock(&tty->termios_mutex); 861 return -EFAULT;
862 tty->termios->c_cflag = 862 mutex_lock(&tty->termios_mutex);
863 ((tty->termios->c_cflag & ~CLOCAL) | 863 tty->termios->c_cflag =
864 (arg ? CLOCAL : 0)); 864 ((tty->termios->c_cflag & ~CLOCAL) |
865 mutex_unlock(&tty->termios_mutex); 865 (arg ? CLOCAL : 0));
866 return 0; 866 mutex_unlock(&tty->termios_mutex);
867 default: 867 return 0;
868 return -ENOIOCTLCMD; 868 default:
869 return -ENOIOCTLCMD;
869 } 870 }
870} 871}
871
872EXPORT_SYMBOL_GPL(tty_mode_ioctl); 872EXPORT_SYMBOL_GPL(tty_mode_ioctl);
873 873
874int tty_perform_flush(struct tty_struct *tty, unsigned long arg) 874int tty_perform_flush(struct tty_struct *tty, unsigned long arg)
@@ -899,13 +899,12 @@ int tty_perform_flush(struct tty_struct *tty, unsigned long arg)
899 tty_ldisc_deref(ld); 899 tty_ldisc_deref(ld);
900 return 0; 900 return 0;
901} 901}
902
903EXPORT_SYMBOL_GPL(tty_perform_flush); 902EXPORT_SYMBOL_GPL(tty_perform_flush);
904 903
905int n_tty_ioctl(struct tty_struct * tty, struct file * file, 904int n_tty_ioctl(struct tty_struct *tty, struct file *file,
906 unsigned int cmd, unsigned long arg) 905 unsigned int cmd, unsigned long arg)
907{ 906{
908 struct tty_struct * real_tty; 907 struct tty_struct *real_tty;
909 int retval; 908 int retval;
910 909
911 if (tty->driver->type == TTY_DRIVER_TYPE_PTY && 910 if (tty->driver->type == TTY_DRIVER_TYPE_PTY &&
@@ -915,68 +914,67 @@ int n_tty_ioctl(struct tty_struct * tty, struct file * file,
915 real_tty = tty; 914 real_tty = tty;
916 915
917 switch (cmd) { 916 switch (cmd) {
918 case TCXONC: 917 case TCXONC:
919 retval = tty_check_change(tty); 918 retval = tty_check_change(tty);
920 if (retval) 919 if (retval)
921 return retval; 920 return retval;
922 switch (arg) { 921 switch (arg) {
923 case TCOOFF: 922 case TCOOFF:
924 if (!tty->flow_stopped) { 923 if (!tty->flow_stopped) {
925 tty->flow_stopped = 1; 924 tty->flow_stopped = 1;
926 stop_tty(tty); 925 stop_tty(tty);
927 }
928 break;
929 case TCOON:
930 if (tty->flow_stopped) {
931 tty->flow_stopped = 0;
932 start_tty(tty);
933 }
934 break;
935 case TCIOFF:
936 if (STOP_CHAR(tty) != __DISABLED_CHAR)
937 return send_prio_char(tty, STOP_CHAR(tty));
938 break;
939 case TCION:
940 if (START_CHAR(tty) != __DISABLED_CHAR)
941 return send_prio_char(tty, START_CHAR(tty));
942 break;
943 default:
944 return -EINVAL;
945 } 926 }
946 return 0; 927 break;
947 case TCFLSH: 928 case TCOON:
948 return tty_perform_flush(tty, arg); 929 if (tty->flow_stopped) {
949 case TIOCOUTQ: 930 tty->flow_stopped = 0;
950 return put_user(tty->driver->chars_in_buffer ? 931 start_tty(tty);
951 tty->driver->chars_in_buffer(tty) : 0, 932 }
952 (int __user *) arg); 933 break;
953 case TIOCINQ: 934 case TCIOFF:
954 retval = tty->read_cnt; 935 if (STOP_CHAR(tty) != __DISABLED_CHAR)
955 if (L_ICANON(tty)) 936 return send_prio_char(tty, STOP_CHAR(tty));
956 retval = inq_canon(tty); 937 break;
957 return put_user(retval, (unsigned int __user *) arg); 938 case TCION:
958 case TIOCPKT: 939 if (START_CHAR(tty) != __DISABLED_CHAR)
959 { 940 return send_prio_char(tty, START_CHAR(tty));
960 int pktmode; 941 break;
961
962 if (tty->driver->type != TTY_DRIVER_TYPE_PTY ||
963 tty->driver->subtype != PTY_TYPE_MASTER)
964 return -ENOTTY;
965 if (get_user(pktmode, (int __user *) arg))
966 return -EFAULT;
967 if (pktmode) {
968 if (!tty->packet) {
969 tty->packet = 1;
970 tty->link->ctrl_status = 0;
971 }
972 } else
973 tty->packet = 0;
974 return 0;
975 }
976 default: 942 default:
977 /* Try the mode commands */ 943 return -EINVAL;
978 return tty_mode_ioctl(tty, file, cmd, arg);
979 } 944 }
945 return 0;
946 case TCFLSH:
947 return tty_perform_flush(tty, arg);
948 case TIOCOUTQ:
949 return put_user(tty->driver->chars_in_buffer ?
950 tty->driver->chars_in_buffer(tty) : 0,
951 (int __user *) arg);
952 case TIOCINQ:
953 retval = tty->read_cnt;
954 if (L_ICANON(tty))
955 retval = inq_canon(tty);
956 return put_user(retval, (unsigned int __user *) arg);
957 case TIOCPKT:
958 {
959 int pktmode;
960
961 if (tty->driver->type != TTY_DRIVER_TYPE_PTY ||
962 tty->driver->subtype != PTY_TYPE_MASTER)
963 return -ENOTTY;
964 if (get_user(pktmode, (int __user *) arg))
965 return -EFAULT;
966 if (pktmode) {
967 if (!tty->packet) {
968 tty->packet = 1;
969 tty->link->ctrl_status = 0;
970 }
971 } else
972 tty->packet = 0;
973 return 0;
974 }
975 default:
976 /* Try the mode commands */
977 return tty_mode_ioctl(tty, file, cmd, arg);
978 }
980} 979}
981
982EXPORT_SYMBOL(n_tty_ioctl); 980EXPORT_SYMBOL(n_tty_ioctl);
diff --git a/drivers/dca/dca-sysfs.c b/drivers/dca/dca-sysfs.c
index 24a263b6844c..011328faa5f2 100644
--- a/drivers/dca/dca-sysfs.c
+++ b/drivers/dca/dca-sysfs.c
@@ -12,10 +12,10 @@ static spinlock_t dca_idr_lock;
12 12
13int dca_sysfs_add_req(struct dca_provider *dca, struct device *dev, int slot) 13int dca_sysfs_add_req(struct dca_provider *dca, struct device *dev, int slot)
14{ 14{
15 struct class_device *cd; 15 struct device *cd;
16 16
17 cd = class_device_create(dca_class, dca->cd, MKDEV(0, slot + 1), 17 cd = device_create(dca_class, dca->cd, MKDEV(0, slot + 1),
18 dev, "requester%d", slot); 18 "requester%d", slot);
19 if (IS_ERR(cd)) 19 if (IS_ERR(cd))
20 return PTR_ERR(cd); 20 return PTR_ERR(cd);
21 return 0; 21 return 0;
@@ -23,12 +23,12 @@ int dca_sysfs_add_req(struct dca_provider *dca, struct device *dev, int slot)
23 23
24void dca_sysfs_remove_req(struct dca_provider *dca, int slot) 24void dca_sysfs_remove_req(struct dca_provider *dca, int slot)
25{ 25{
26 class_device_destroy(dca_class, MKDEV(0, slot + 1)); 26 device_destroy(dca_class, MKDEV(0, slot + 1));
27} 27}
28 28
29int dca_sysfs_add_provider(struct dca_provider *dca, struct device *dev) 29int dca_sysfs_add_provider(struct dca_provider *dca, struct device *dev)
30{ 30{
31 struct class_device *cd; 31 struct device *cd;
32 int err = 0; 32 int err = 0;
33 33
34idr_try_again: 34idr_try_again:
@@ -46,8 +46,7 @@ idr_try_again:
46 return err; 46 return err;
47 } 47 }
48 48
49 cd = class_device_create(dca_class, NULL, MKDEV(0, 0), 49 cd = device_create(dca_class, dev, MKDEV(0, 0), "dca%d", dca->id);
50 dev, "dca%d", dca->id);
51 if (IS_ERR(cd)) { 50 if (IS_ERR(cd)) {
52 spin_lock(&dca_idr_lock); 51 spin_lock(&dca_idr_lock);
53 idr_remove(&dca_idr, dca->id); 52 idr_remove(&dca_idr, dca->id);
@@ -60,7 +59,7 @@ idr_try_again:
60 59
61void dca_sysfs_remove_provider(struct dca_provider *dca) 60void dca_sysfs_remove_provider(struct dca_provider *dca)
62{ 61{
63 class_device_unregister(dca->cd); 62 device_unregister(dca->cd);
64 dca->cd = NULL; 63 dca->cd = NULL;
65 spin_lock(&dca_idr_lock); 64 spin_lock(&dca_idr_lock);
66 idr_remove(&dca_idr, dca->id); 65 idr_remove(&dca_idr, dca->id);
diff --git a/drivers/firmware/dmi_scan.c b/drivers/firmware/dmi_scan.c
index 1412d7bcdbd1..653265a40b7f 100644
--- a/drivers/firmware/dmi_scan.c
+++ b/drivers/firmware/dmi_scan.c
@@ -250,6 +250,28 @@ static void __init dmi_save_ipmi_device(const struct dmi_header *dm)
250 list_add(&dev->list, &dmi_devices); 250 list_add(&dev->list, &dmi_devices);
251} 251}
252 252
253static void __init dmi_save_extended_devices(const struct dmi_header *dm)
254{
255 const u8 *d = (u8*) dm + 5;
256 struct dmi_device *dev;
257
258 /* Skip disabled device */
259 if ((*d & 0x80) == 0)
260 return;
261
262 dev = dmi_alloc(sizeof(*dev));
263 if (!dev) {
264 printk(KERN_ERR "dmi_save_extended_devices: out of memory.\n");
265 return;
266 }
267
268 dev->type = *d-- & 0x7f;
269 dev->name = dmi_string(dm, *d);
270 dev->device_data = NULL;
271
272 list_add(&dev->list, &dmi_devices);
273}
274
253/* 275/*
254 * Process a DMI table entry. Right now all we care about are the BIOS 276 * Process a DMI table entry. Right now all we care about are the BIOS
255 * and machine entries. For 2.5 we should pull the smbus controller info 277 * and machine entries. For 2.5 we should pull the smbus controller info
@@ -292,6 +314,9 @@ static void __init dmi_decode(const struct dmi_header *dm)
292 break; 314 break;
293 case 38: /* IPMI Device Information */ 315 case 38: /* IPMI Device Information */
294 dmi_save_ipmi_device(dm); 316 dmi_save_ipmi_device(dm);
317 break;
318 case 41: /* Onboard Devices Extended Information */
319 dmi_save_extended_devices(dm);
295 } 320 }
296} 321}
297 322
diff --git a/drivers/ide/ppc/mpc8xx.c b/drivers/ide/ppc/mpc8xx.c
index 06190b1c4ec5..38fbfb8d5445 100644
--- a/drivers/ide/ppc/mpc8xx.c
+++ b/drivers/ide/ppc/mpc8xx.c
@@ -17,7 +17,6 @@
17#include <linux/ptrace.h> 17#include <linux/ptrace.h>
18#include <linux/slab.h> 18#include <linux/slab.h>
19#include <linux/user.h> 19#include <linux/user.h>
20#include <linux/a.out.h>
21#include <linux/tty.h> 20#include <linux/tty.h>
22#include <linux/major.h> 21#include <linux/major.h>
23#include <linux/interrupt.h> 22#include <linux/interrupt.h>
diff --git a/drivers/infiniband/hw/mlx4/cq.c b/drivers/infiniband/hw/mlx4/cq.c
index 7950aa6e8184..7360bbafbe84 100644
--- a/drivers/infiniband/hw/mlx4/cq.c
+++ b/drivers/infiniband/hw/mlx4/cq.c
@@ -64,13 +64,7 @@ static void mlx4_ib_cq_event(struct mlx4_cq *cq, enum mlx4_event type)
64 64
65static void *get_cqe_from_buf(struct mlx4_ib_cq_buf *buf, int n) 65static void *get_cqe_from_buf(struct mlx4_ib_cq_buf *buf, int n)
66{ 66{
67 int offset = n * sizeof (struct mlx4_cqe); 67 return mlx4_buf_offset(&buf->buf, n * sizeof (struct mlx4_cqe));
68
69 if (buf->buf.nbufs == 1)
70 return buf->buf.u.direct.buf + offset;
71 else
72 return buf->buf.u.page_list[offset >> PAGE_SHIFT].buf +
73 (offset & (PAGE_SIZE - 1));
74} 68}
75 69
76static void *get_cqe(struct mlx4_ib_cq *cq, int n) 70static void *get_cqe(struct mlx4_ib_cq *cq, int n)
@@ -332,6 +326,12 @@ static int mlx4_ib_poll_one(struct mlx4_ib_cq *cq,
332 is_error = (cqe->owner_sr_opcode & MLX4_CQE_OPCODE_MASK) == 326 is_error = (cqe->owner_sr_opcode & MLX4_CQE_OPCODE_MASK) ==
333 MLX4_CQE_OPCODE_ERROR; 327 MLX4_CQE_OPCODE_ERROR;
334 328
329 if (unlikely((cqe->owner_sr_opcode & MLX4_CQE_OPCODE_MASK) == MLX4_OPCODE_NOP &&
330 is_send)) {
331 printk(KERN_WARNING "Completion for NOP opcode detected!\n");
332 return -EINVAL;
333 }
334
335 if (!*cur_qp || 335 if (!*cur_qp ||
336 (be32_to_cpu(cqe->my_qpn) & 0xffffff) != (*cur_qp)->mqp.qpn) { 336 (be32_to_cpu(cqe->my_qpn) & 0xffffff) != (*cur_qp)->mqp.qpn) {
337 /* 337 /*
@@ -354,8 +354,10 @@ static int mlx4_ib_poll_one(struct mlx4_ib_cq *cq,
354 354
355 if (is_send) { 355 if (is_send) {
356 wq = &(*cur_qp)->sq; 356 wq = &(*cur_qp)->sq;
357 wqe_ctr = be16_to_cpu(cqe->wqe_index); 357 if (!(*cur_qp)->sq_signal_bits) {
358 wq->tail += (u16) (wqe_ctr - (u16) wq->tail); 358 wqe_ctr = be16_to_cpu(cqe->wqe_index);
359 wq->tail += (u16) (wqe_ctr - (u16) wq->tail);
360 }
359 wc->wr_id = wq->wrid[wq->tail & (wq->wqe_cnt - 1)]; 361 wc->wr_id = wq->wrid[wq->tail & (wq->wqe_cnt - 1)];
360 ++wq->tail; 362 ++wq->tail;
361 } else if ((*cur_qp)->ibqp.srq) { 363 } else if ((*cur_qp)->ibqp.srq) {
diff --git a/drivers/infiniband/hw/mlx4/mlx4_ib.h b/drivers/infiniband/hw/mlx4/mlx4_ib.h
index 28697653a370..3726e451a327 100644
--- a/drivers/infiniband/hw/mlx4/mlx4_ib.h
+++ b/drivers/infiniband/hw/mlx4/mlx4_ib.h
@@ -120,6 +120,8 @@ struct mlx4_ib_qp {
120 120
121 u32 doorbell_qpn; 121 u32 doorbell_qpn;
122 __be32 sq_signal_bits; 122 __be32 sq_signal_bits;
123 unsigned sq_next_wqe;
124 int sq_max_wqes_per_wr;
123 int sq_spare_wqes; 125 int sq_spare_wqes;
124 struct mlx4_ib_wq sq; 126 struct mlx4_ib_wq sq;
125 127
diff --git a/drivers/infiniband/hw/mlx4/qp.c b/drivers/infiniband/hw/mlx4/qp.c
index 8cba9c532e64..958e205b6d7c 100644
--- a/drivers/infiniband/hw/mlx4/qp.c
+++ b/drivers/infiniband/hw/mlx4/qp.c
@@ -30,6 +30,8 @@
30 * SOFTWARE. 30 * SOFTWARE.
31 */ 31 */
32 32
33#include <linux/log2.h>
34
33#include <rdma/ib_cache.h> 35#include <rdma/ib_cache.h>
34#include <rdma/ib_pack.h> 36#include <rdma/ib_pack.h>
35 37
@@ -96,11 +98,7 @@ static int is_qp0(struct mlx4_ib_dev *dev, struct mlx4_ib_qp *qp)
96 98
97static void *get_wqe(struct mlx4_ib_qp *qp, int offset) 99static void *get_wqe(struct mlx4_ib_qp *qp, int offset)
98{ 100{
99 if (qp->buf.nbufs == 1) 101 return mlx4_buf_offset(&qp->buf, offset);
100 return qp->buf.u.direct.buf + offset;
101 else
102 return qp->buf.u.page_list[offset >> PAGE_SHIFT].buf +
103 (offset & (PAGE_SIZE - 1));
104} 102}
105 103
106static void *get_recv_wqe(struct mlx4_ib_qp *qp, int n) 104static void *get_recv_wqe(struct mlx4_ib_qp *qp, int n)
@@ -115,16 +113,87 @@ static void *get_send_wqe(struct mlx4_ib_qp *qp, int n)
115 113
116/* 114/*
117 * Stamp a SQ WQE so that it is invalid if prefetched by marking the 115 * Stamp a SQ WQE so that it is invalid if prefetched by marking the
118 * first four bytes of every 64 byte chunk with 0xffffffff, except for 116 * first four bytes of every 64 byte chunk with
119 * the very first chunk of the WQE. 117 * 0x7FFFFFF | (invalid_ownership_value << 31).
118 *
119 * When the max work request size is less than or equal to the WQE
120 * basic block size, as an optimization, we can stamp all WQEs with
121 * 0xffffffff, and skip the very first chunk of each WQE.
120 */ 122 */
121static void stamp_send_wqe(struct mlx4_ib_qp *qp, int n) 123static void stamp_send_wqe(struct mlx4_ib_qp *qp, int n, int size)
122{ 124{
123 u32 *wqe = get_send_wqe(qp, n); 125 u32 *wqe;
124 int i; 126 int i;
127 int s;
128 int ind;
129 void *buf;
130 __be32 stamp;
131
132 s = roundup(size, 1U << qp->sq.wqe_shift);
133 if (qp->sq_max_wqes_per_wr > 1) {
134 for (i = 0; i < s; i += 64) {
135 ind = (i >> qp->sq.wqe_shift) + n;
136 stamp = ind & qp->sq.wqe_cnt ? cpu_to_be32(0x7fffffff) :
137 cpu_to_be32(0xffffffff);
138 buf = get_send_wqe(qp, ind & (qp->sq.wqe_cnt - 1));
139 wqe = buf + (i & ((1 << qp->sq.wqe_shift) - 1));
140 *wqe = stamp;
141 }
142 } else {
143 buf = get_send_wqe(qp, n & (qp->sq.wqe_cnt - 1));
144 for (i = 64; i < s; i += 64) {
145 wqe = buf + i;
146 *wqe = 0xffffffff;
147 }
148 }
149}
150
151static void post_nop_wqe(struct mlx4_ib_qp *qp, int n, int size)
152{
153 struct mlx4_wqe_ctrl_seg *ctrl;
154 struct mlx4_wqe_inline_seg *inl;
155 void *wqe;
156 int s;
157
158 ctrl = wqe = get_send_wqe(qp, n & (qp->sq.wqe_cnt - 1));
159 s = sizeof(struct mlx4_wqe_ctrl_seg);
125 160
126 for (i = 16; i < 1 << (qp->sq.wqe_shift - 2); i += 16) 161 if (qp->ibqp.qp_type == IB_QPT_UD) {
127 wqe[i] = 0xffffffff; 162 struct mlx4_wqe_datagram_seg *dgram = wqe + sizeof *ctrl;
163 struct mlx4_av *av = (struct mlx4_av *)dgram->av;
164 memset(dgram, 0, sizeof *dgram);
165 av->port_pd = cpu_to_be32((qp->port << 24) | to_mpd(qp->ibqp.pd)->pdn);
166 s += sizeof(struct mlx4_wqe_datagram_seg);
167 }
168
169 /* Pad the remainder of the WQE with an inline data segment. */
170 if (size > s) {
171 inl = wqe + s;
172 inl->byte_count = cpu_to_be32(1 << 31 | (size - s - sizeof *inl));
173 }
174 ctrl->srcrb_flags = 0;
175 ctrl->fence_size = size / 16;
176 /*
177 * Make sure descriptor is fully written before setting ownership bit
178 * (because HW can start executing as soon as we do).
179 */
180 wmb();
181
182 ctrl->owner_opcode = cpu_to_be32(MLX4_OPCODE_NOP | MLX4_WQE_CTRL_NEC) |
183 (n & qp->sq.wqe_cnt ? cpu_to_be32(1 << 31) : 0);
184
185 stamp_send_wqe(qp, n + qp->sq_spare_wqes, size);
186}
187
188/* Post NOP WQE to prevent wrap-around in the middle of WR */
189static inline unsigned pad_wraparound(struct mlx4_ib_qp *qp, int ind)
190{
191 unsigned s = qp->sq.wqe_cnt - (ind & (qp->sq.wqe_cnt - 1));
192 if (unlikely(s < qp->sq_max_wqes_per_wr)) {
193 post_nop_wqe(qp, ind, s << qp->sq.wqe_shift);
194 ind += s;
195 }
196 return ind;
128} 197}
129 198
130static void mlx4_ib_qp_event(struct mlx4_qp *qp, enum mlx4_event type) 199static void mlx4_ib_qp_event(struct mlx4_qp *qp, enum mlx4_event type)
@@ -241,6 +310,8 @@ static int set_rq_size(struct mlx4_ib_dev *dev, struct ib_qp_cap *cap,
241static int set_kernel_sq_size(struct mlx4_ib_dev *dev, struct ib_qp_cap *cap, 310static int set_kernel_sq_size(struct mlx4_ib_dev *dev, struct ib_qp_cap *cap,
242 enum ib_qp_type type, struct mlx4_ib_qp *qp) 311 enum ib_qp_type type, struct mlx4_ib_qp *qp)
243{ 312{
313 int s;
314
244 /* Sanity check SQ size before proceeding */ 315 /* Sanity check SQ size before proceeding */
245 if (cap->max_send_wr > dev->dev->caps.max_wqes || 316 if (cap->max_send_wr > dev->dev->caps.max_wqes ||
246 cap->max_send_sge > dev->dev->caps.max_sq_sg || 317 cap->max_send_sge > dev->dev->caps.max_sq_sg ||
@@ -256,20 +327,74 @@ static int set_kernel_sq_size(struct mlx4_ib_dev *dev, struct ib_qp_cap *cap,
256 cap->max_send_sge + 2 > dev->dev->caps.max_sq_sg) 327 cap->max_send_sge + 2 > dev->dev->caps.max_sq_sg)
257 return -EINVAL; 328 return -EINVAL;
258 329
259 qp->sq.wqe_shift = ilog2(roundup_pow_of_two(max(cap->max_send_sge * 330 s = max(cap->max_send_sge * sizeof (struct mlx4_wqe_data_seg),
260 sizeof (struct mlx4_wqe_data_seg), 331 cap->max_inline_data + sizeof (struct mlx4_wqe_inline_seg)) +
261 cap->max_inline_data + 332 send_wqe_overhead(type);
262 sizeof (struct mlx4_wqe_inline_seg)) +
263 send_wqe_overhead(type)));
264 qp->sq.max_gs = ((1 << qp->sq.wqe_shift) - send_wqe_overhead(type)) /
265 sizeof (struct mlx4_wqe_data_seg);
266 333
267 /* 334 /*
268 * We need to leave 2 KB + 1 WQE of headroom in the SQ to 335 * Hermon supports shrinking WQEs, such that a single work
269 * allow HW to prefetch. 336 * request can include multiple units of 1 << wqe_shift. This
337 * way, work requests can differ in size, and do not have to
338 * be a power of 2 in size, saving memory and speeding up send
339 * WR posting. Unfortunately, if we do this then the
340 * wqe_index field in CQEs can't be used to look up the WR ID
341 * anymore, so we do this only if selective signaling is off.
342 *
343 * Further, on 32-bit platforms, we can't use vmap() to make
344 * the QP buffer virtually contigious. Thus we have to use
345 * constant-sized WRs to make sure a WR is always fully within
346 * a single page-sized chunk.
347 *
348 * Finally, we use NOP work requests to pad the end of the
349 * work queue, to avoid wrap-around in the middle of WR. We
350 * set NEC bit to avoid getting completions with error for
351 * these NOP WRs, but since NEC is only supported starting
352 * with firmware 2.2.232, we use constant-sized WRs for older
353 * firmware.
354 *
355 * And, since MLX QPs only support SEND, we use constant-sized
356 * WRs in this case.
357 *
358 * We look for the smallest value of wqe_shift such that the
359 * resulting number of wqes does not exceed device
360 * capabilities.
361 *
362 * We set WQE size to at least 64 bytes, this way stamping
363 * invalidates each WQE.
270 */ 364 */
271 qp->sq_spare_wqes = (2048 >> qp->sq.wqe_shift) + 1; 365 if (dev->dev->caps.fw_ver >= MLX4_FW_VER_WQE_CTRL_NEC &&
272 qp->sq.wqe_cnt = roundup_pow_of_two(cap->max_send_wr + qp->sq_spare_wqes); 366 qp->sq_signal_bits && BITS_PER_LONG == 64 &&
367 type != IB_QPT_SMI && type != IB_QPT_GSI)
368 qp->sq.wqe_shift = ilog2(64);
369 else
370 qp->sq.wqe_shift = ilog2(roundup_pow_of_two(s));
371
372 for (;;) {
373 if (1 << qp->sq.wqe_shift > dev->dev->caps.max_sq_desc_sz)
374 return -EINVAL;
375
376 qp->sq_max_wqes_per_wr = DIV_ROUND_UP(s, 1U << qp->sq.wqe_shift);
377
378 /*
379 * We need to leave 2 KB + 1 WR of headroom in the SQ to
380 * allow HW to prefetch.
381 */
382 qp->sq_spare_wqes = (2048 >> qp->sq.wqe_shift) + qp->sq_max_wqes_per_wr;
383 qp->sq.wqe_cnt = roundup_pow_of_two(cap->max_send_wr *
384 qp->sq_max_wqes_per_wr +
385 qp->sq_spare_wqes);
386
387 if (qp->sq.wqe_cnt <= dev->dev->caps.max_wqes)
388 break;
389
390 if (qp->sq_max_wqes_per_wr <= 1)
391 return -EINVAL;
392
393 ++qp->sq.wqe_shift;
394 }
395
396 qp->sq.max_gs = ((qp->sq_max_wqes_per_wr << qp->sq.wqe_shift) -
397 send_wqe_overhead(type)) / sizeof (struct mlx4_wqe_data_seg);
273 398
274 qp->buf_size = (qp->rq.wqe_cnt << qp->rq.wqe_shift) + 399 qp->buf_size = (qp->rq.wqe_cnt << qp->rq.wqe_shift) +
275 (qp->sq.wqe_cnt << qp->sq.wqe_shift); 400 (qp->sq.wqe_cnt << qp->sq.wqe_shift);
@@ -281,7 +406,8 @@ static int set_kernel_sq_size(struct mlx4_ib_dev *dev, struct ib_qp_cap *cap,
281 qp->sq.offset = 0; 406 qp->sq.offset = 0;
282 } 407 }
283 408
284 cap->max_send_wr = qp->sq.max_post = qp->sq.wqe_cnt - qp->sq_spare_wqes; 409 cap->max_send_wr = qp->sq.max_post =
410 (qp->sq.wqe_cnt - qp->sq_spare_wqes) / qp->sq_max_wqes_per_wr;
285 cap->max_send_sge = qp->sq.max_gs; 411 cap->max_send_sge = qp->sq.max_gs;
286 /* We don't support inline sends for kernel QPs (yet) */ 412 /* We don't support inline sends for kernel QPs (yet) */
287 cap->max_inline_data = 0; 413 cap->max_inline_data = 0;
@@ -327,6 +453,12 @@ static int create_qp_common(struct mlx4_ib_dev *dev, struct ib_pd *pd,
327 qp->rq.tail = 0; 453 qp->rq.tail = 0;
328 qp->sq.head = 0; 454 qp->sq.head = 0;
329 qp->sq.tail = 0; 455 qp->sq.tail = 0;
456 qp->sq_next_wqe = 0;
457
458 if (init_attr->sq_sig_type == IB_SIGNAL_ALL_WR)
459 qp->sq_signal_bits = cpu_to_be32(MLX4_WQE_CTRL_CQ_UPDATE);
460 else
461 qp->sq_signal_bits = 0;
330 462
331 err = set_rq_size(dev, &init_attr->cap, !!pd->uobject, !!init_attr->srq, qp); 463 err = set_rq_size(dev, &init_attr->cap, !!pd->uobject, !!init_attr->srq, qp);
332 if (err) 464 if (err)
@@ -417,11 +549,6 @@ static int create_qp_common(struct mlx4_ib_dev *dev, struct ib_pd *pd,
417 */ 549 */
418 qp->doorbell_qpn = swab32(qp->mqp.qpn << 8); 550 qp->doorbell_qpn = swab32(qp->mqp.qpn << 8);
419 551
420 if (init_attr->sq_sig_type == IB_SIGNAL_ALL_WR)
421 qp->sq_signal_bits = cpu_to_be32(MLX4_WQE_CTRL_CQ_UPDATE);
422 else
423 qp->sq_signal_bits = 0;
424
425 qp->mqp.event = mlx4_ib_qp_event; 552 qp->mqp.event = mlx4_ib_qp_event;
426 553
427 return 0; 554 return 0;
@@ -916,7 +1043,7 @@ static int __mlx4_ib_modify_qp(struct ib_qp *ibqp,
916 ctrl = get_send_wqe(qp, i); 1043 ctrl = get_send_wqe(qp, i);
917 ctrl->owner_opcode = cpu_to_be32(1 << 31); 1044 ctrl->owner_opcode = cpu_to_be32(1 << 31);
918 1045
919 stamp_send_wqe(qp, i); 1046 stamp_send_wqe(qp, i, 1 << qp->sq.wqe_shift);
920 } 1047 }
921 } 1048 }
922 1049
@@ -969,6 +1096,7 @@ static int __mlx4_ib_modify_qp(struct ib_qp *ibqp,
969 qp->rq.tail = 0; 1096 qp->rq.tail = 0;
970 qp->sq.head = 0; 1097 qp->sq.head = 0;
971 qp->sq.tail = 0; 1098 qp->sq.tail = 0;
1099 qp->sq_next_wqe = 0;
972 if (!ibqp->srq) 1100 if (!ibqp->srq)
973 *qp->db.db = 0; 1101 *qp->db.db = 0;
974 } 1102 }
@@ -1278,13 +1406,14 @@ int mlx4_ib_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr,
1278 unsigned long flags; 1406 unsigned long flags;
1279 int nreq; 1407 int nreq;
1280 int err = 0; 1408 int err = 0;
1281 int ind; 1409 unsigned ind;
1282 int size; 1410 int uninitialized_var(stamp);
1411 int uninitialized_var(size);
1283 int i; 1412 int i;
1284 1413
1285 spin_lock_irqsave(&qp->sq.lock, flags); 1414 spin_lock_irqsave(&qp->sq.lock, flags);
1286 1415
1287 ind = qp->sq.head; 1416 ind = qp->sq_next_wqe;
1288 1417
1289 for (nreq = 0; wr; ++nreq, wr = wr->next) { 1418 for (nreq = 0; wr; ++nreq, wr = wr->next) {
1290 if (mlx4_wq_overflow(&qp->sq, nreq, qp->ibqp.send_cq)) { 1419 if (mlx4_wq_overflow(&qp->sq, nreq, qp->ibqp.send_cq)) {
@@ -1300,7 +1429,7 @@ int mlx4_ib_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr,
1300 } 1429 }
1301 1430
1302 ctrl = wqe = get_send_wqe(qp, ind & (qp->sq.wqe_cnt - 1)); 1431 ctrl = wqe = get_send_wqe(qp, ind & (qp->sq.wqe_cnt - 1));
1303 qp->sq.wrid[ind & (qp->sq.wqe_cnt - 1)] = wr->wr_id; 1432 qp->sq.wrid[(qp->sq.head + nreq) & (qp->sq.wqe_cnt - 1)] = wr->wr_id;
1304 1433
1305 ctrl->srcrb_flags = 1434 ctrl->srcrb_flags =
1306 (wr->send_flags & IB_SEND_SIGNALED ? 1435 (wr->send_flags & IB_SEND_SIGNALED ?
@@ -1413,16 +1542,23 @@ int mlx4_ib_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr,
1413 ctrl->owner_opcode = mlx4_ib_opcode[wr->opcode] | 1542 ctrl->owner_opcode = mlx4_ib_opcode[wr->opcode] |
1414 (ind & qp->sq.wqe_cnt ? cpu_to_be32(1 << 31) : 0); 1543 (ind & qp->sq.wqe_cnt ? cpu_to_be32(1 << 31) : 0);
1415 1544
1545 stamp = ind + qp->sq_spare_wqes;
1546 ind += DIV_ROUND_UP(size * 16, 1U << qp->sq.wqe_shift);
1547
1416 /* 1548 /*
1417 * We can improve latency by not stamping the last 1549 * We can improve latency by not stamping the last
1418 * send queue WQE until after ringing the doorbell, so 1550 * send queue WQE until after ringing the doorbell, so
1419 * only stamp here if there are still more WQEs to post. 1551 * only stamp here if there are still more WQEs to post.
1552 *
1553 * Same optimization applies to padding with NOP wqe
1554 * in case of WQE shrinking (used to prevent wrap-around
1555 * in the middle of WR).
1420 */ 1556 */
1421 if (wr->next) 1557 if (wr->next) {
1422 stamp_send_wqe(qp, (ind + qp->sq_spare_wqes) & 1558 stamp_send_wqe(qp, stamp, size * 16);
1423 (qp->sq.wqe_cnt - 1)); 1559 ind = pad_wraparound(qp, ind);
1560 }
1424 1561
1425 ++ind;
1426 } 1562 }
1427 1563
1428out: 1564out:
@@ -1444,8 +1580,10 @@ out:
1444 */ 1580 */
1445 mmiowb(); 1581 mmiowb();
1446 1582
1447 stamp_send_wqe(qp, (ind + qp->sq_spare_wqes - 1) & 1583 stamp_send_wqe(qp, stamp, size * 16);
1448 (qp->sq.wqe_cnt - 1)); 1584
1585 ind = pad_wraparound(qp, ind);
1586 qp->sq_next_wqe = ind;
1449 } 1587 }
1450 1588
1451 spin_unlock_irqrestore(&qp->sq.lock, flags); 1589 spin_unlock_irqrestore(&qp->sq.lock, flags);
diff --git a/drivers/infiniband/hw/mlx4/srq.c b/drivers/infiniband/hw/mlx4/srq.c
index e7e9a3d0dac3..beaa3b06cf58 100644
--- a/drivers/infiniband/hw/mlx4/srq.c
+++ b/drivers/infiniband/hw/mlx4/srq.c
@@ -38,13 +38,7 @@
38 38
39static void *get_wqe(struct mlx4_ib_srq *srq, int n) 39static void *get_wqe(struct mlx4_ib_srq *srq, int n)
40{ 40{
41 int offset = n << srq->msrq.wqe_shift; 41 return mlx4_buf_offset(&srq->buf, n << srq->msrq.wqe_shift);
42
43 if (srq->buf.nbufs == 1)
44 return srq->buf.u.direct.buf + offset;
45 else
46 return srq->buf.u.page_list[offset >> PAGE_SHIFT].buf +
47 (offset & (PAGE_SIZE - 1));
48} 42}
49 43
50static void mlx4_ib_srq_event(struct mlx4_srq *srq, enum mlx4_event type) 44static void mlx4_ib_srq_event(struct mlx4_srq *srq, enum mlx4_event type)
diff --git a/drivers/infiniband/ulp/ipoib/ipoib.h b/drivers/infiniband/ulp/ipoib/ipoib.h
index fe250c60607d..f9b7caa54143 100644
--- a/drivers/infiniband/ulp/ipoib/ipoib.h
+++ b/drivers/infiniband/ulp/ipoib/ipoib.h
@@ -143,7 +143,7 @@ struct ipoib_rx_buf {
143 143
144struct ipoib_tx_buf { 144struct ipoib_tx_buf {
145 struct sk_buff *skb; 145 struct sk_buff *skb;
146 u64 mapping; 146 u64 mapping[MAX_SKB_FRAGS + 1];
147}; 147};
148 148
149struct ib_cm_id; 149struct ib_cm_id;
@@ -296,7 +296,7 @@ struct ipoib_dev_priv {
296 struct ipoib_tx_buf *tx_ring; 296 struct ipoib_tx_buf *tx_ring;
297 unsigned tx_head; 297 unsigned tx_head;
298 unsigned tx_tail; 298 unsigned tx_tail;
299 struct ib_sge tx_sge; 299 struct ib_sge tx_sge[MAX_SKB_FRAGS + 1];
300 struct ib_send_wr tx_wr; 300 struct ib_send_wr tx_wr;
301 unsigned tx_outstanding; 301 unsigned tx_outstanding;
302 302
diff --git a/drivers/infiniband/ulp/ipoib/ipoib_cm.c b/drivers/infiniband/ulp/ipoib/ipoib_cm.c
index 1818f958c250..7dd2ec473d24 100644
--- a/drivers/infiniband/ulp/ipoib/ipoib_cm.c
+++ b/drivers/infiniband/ulp/ipoib/ipoib_cm.c
@@ -634,8 +634,8 @@ static inline int post_send(struct ipoib_dev_priv *priv,
634{ 634{
635 struct ib_send_wr *bad_wr; 635 struct ib_send_wr *bad_wr;
636 636
637 priv->tx_sge.addr = addr; 637 priv->tx_sge[0].addr = addr;
638 priv->tx_sge.length = len; 638 priv->tx_sge[0].length = len;
639 639
640 priv->tx_wr.wr_id = wr_id | IPOIB_OP_CM; 640 priv->tx_wr.wr_id = wr_id | IPOIB_OP_CM;
641 641
@@ -676,7 +676,7 @@ void ipoib_cm_send(struct net_device *dev, struct sk_buff *skb, struct ipoib_cm_
676 return; 676 return;
677 } 677 }
678 678
679 tx_req->mapping = addr; 679 tx_req->mapping[0] = addr;
680 680
681 if (unlikely(post_send(priv, tx, tx->tx_head & (ipoib_sendq_size - 1), 681 if (unlikely(post_send(priv, tx, tx->tx_head & (ipoib_sendq_size - 1),
682 addr, skb->len))) { 682 addr, skb->len))) {
@@ -715,7 +715,7 @@ void ipoib_cm_handle_tx_wc(struct net_device *dev, struct ib_wc *wc)
715 715
716 tx_req = &tx->tx_ring[wr_id]; 716 tx_req = &tx->tx_ring[wr_id];
717 717
718 ib_dma_unmap_single(priv->ca, tx_req->mapping, tx_req->skb->len, DMA_TO_DEVICE); 718 ib_dma_unmap_single(priv->ca, tx_req->mapping[0], tx_req->skb->len, DMA_TO_DEVICE);
719 719
720 /* FIXME: is this right? Shouldn't we only increment on success? */ 720 /* FIXME: is this right? Shouldn't we only increment on success? */
721 ++dev->stats.tx_packets; 721 ++dev->stats.tx_packets;
@@ -1110,7 +1110,7 @@ timeout:
1110 1110
1111 while ((int) p->tx_tail - (int) p->tx_head < 0) { 1111 while ((int) p->tx_tail - (int) p->tx_head < 0) {
1112 tx_req = &p->tx_ring[p->tx_tail & (ipoib_sendq_size - 1)]; 1112 tx_req = &p->tx_ring[p->tx_tail & (ipoib_sendq_size - 1)];
1113 ib_dma_unmap_single(priv->ca, tx_req->mapping, tx_req->skb->len, 1113 ib_dma_unmap_single(priv->ca, tx_req->mapping[0], tx_req->skb->len,
1114 DMA_TO_DEVICE); 1114 DMA_TO_DEVICE);
1115 dev_kfree_skb_any(tx_req->skb); 1115 dev_kfree_skb_any(tx_req->skb);
1116 ++p->tx_tail; 1116 ++p->tx_tail;
diff --git a/drivers/infiniband/ulp/ipoib/ipoib_ib.c b/drivers/infiniband/ulp/ipoib/ipoib_ib.c
index 52bc2bd5799a..9d3e778dc56d 100644
--- a/drivers/infiniband/ulp/ipoib/ipoib_ib.c
+++ b/drivers/infiniband/ulp/ipoib/ipoib_ib.c
@@ -239,6 +239,54 @@ repost:
239 "for buf %d\n", wr_id); 239 "for buf %d\n", wr_id);
240} 240}
241 241
242static int ipoib_dma_map_tx(struct ib_device *ca,
243 struct ipoib_tx_buf *tx_req)
244{
245 struct sk_buff *skb = tx_req->skb;
246 u64 *mapping = tx_req->mapping;
247 int i;
248
249 mapping[0] = ib_dma_map_single(ca, skb->data, skb_headlen(skb),
250 DMA_TO_DEVICE);
251 if (unlikely(ib_dma_mapping_error(ca, mapping[0])))
252 return -EIO;
253
254 for (i = 0; i < skb_shinfo(skb)->nr_frags; ++i) {
255 skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
256 mapping[i + 1] = ib_dma_map_page(ca, frag->page,
257 frag->page_offset, frag->size,
258 DMA_TO_DEVICE);
259 if (unlikely(ib_dma_mapping_error(ca, mapping[i + 1])))
260 goto partial_error;
261 }
262 return 0;
263
264partial_error:
265 ib_dma_unmap_single(ca, mapping[0], skb_headlen(skb), DMA_TO_DEVICE);
266
267 for (; i > 0; --i) {
268 skb_frag_t *frag = &skb_shinfo(skb)->frags[i - 1];
269 ib_dma_unmap_page(ca, mapping[i], frag->size, DMA_TO_DEVICE);
270 }
271 return -EIO;
272}
273
274static void ipoib_dma_unmap_tx(struct ib_device *ca,
275 struct ipoib_tx_buf *tx_req)
276{
277 struct sk_buff *skb = tx_req->skb;
278 u64 *mapping = tx_req->mapping;
279 int i;
280
281 ib_dma_unmap_single(ca, mapping[0], skb_headlen(skb), DMA_TO_DEVICE);
282
283 for (i = 0; i < skb_shinfo(skb)->nr_frags; ++i) {
284 skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
285 ib_dma_unmap_page(ca, mapping[i + 1], frag->size,
286 DMA_TO_DEVICE);
287 }
288}
289
242static void ipoib_ib_handle_tx_wc(struct net_device *dev, struct ib_wc *wc) 290static void ipoib_ib_handle_tx_wc(struct net_device *dev, struct ib_wc *wc)
243{ 291{
244 struct ipoib_dev_priv *priv = netdev_priv(dev); 292 struct ipoib_dev_priv *priv = netdev_priv(dev);
@@ -257,8 +305,7 @@ static void ipoib_ib_handle_tx_wc(struct net_device *dev, struct ib_wc *wc)
257 305
258 tx_req = &priv->tx_ring[wr_id]; 306 tx_req = &priv->tx_ring[wr_id];
259 307
260 ib_dma_unmap_single(priv->ca, tx_req->mapping, 308 ipoib_dma_unmap_tx(priv->ca, tx_req);
261 tx_req->skb->len, DMA_TO_DEVICE);
262 309
263 ++dev->stats.tx_packets; 310 ++dev->stats.tx_packets;
264 dev->stats.tx_bytes += tx_req->skb->len; 311 dev->stats.tx_bytes += tx_req->skb->len;
@@ -341,16 +388,23 @@ void ipoib_ib_completion(struct ib_cq *cq, void *dev_ptr)
341static inline int post_send(struct ipoib_dev_priv *priv, 388static inline int post_send(struct ipoib_dev_priv *priv,
342 unsigned int wr_id, 389 unsigned int wr_id,
343 struct ib_ah *address, u32 qpn, 390 struct ib_ah *address, u32 qpn,
344 u64 addr, int len) 391 u64 *mapping, int headlen,
392 skb_frag_t *frags,
393 int nr_frags)
345{ 394{
346 struct ib_send_wr *bad_wr; 395 struct ib_send_wr *bad_wr;
396 int i;
347 397
348 priv->tx_sge.addr = addr; 398 priv->tx_sge[0].addr = mapping[0];
349 priv->tx_sge.length = len; 399 priv->tx_sge[0].length = headlen;
350 400 for (i = 0; i < nr_frags; ++i) {
351 priv->tx_wr.wr_id = wr_id; 401 priv->tx_sge[i + 1].addr = mapping[i + 1];
352 priv->tx_wr.wr.ud.remote_qpn = qpn; 402 priv->tx_sge[i + 1].length = frags[i].size;
353 priv->tx_wr.wr.ud.ah = address; 403 }
404 priv->tx_wr.num_sge = nr_frags + 1;
405 priv->tx_wr.wr_id = wr_id;
406 priv->tx_wr.wr.ud.remote_qpn = qpn;
407 priv->tx_wr.wr.ud.ah = address;
354 408
355 return ib_post_send(priv->qp, &priv->tx_wr, &bad_wr); 409 return ib_post_send(priv->qp, &priv->tx_wr, &bad_wr);
356} 410}
@@ -360,7 +414,6 @@ void ipoib_send(struct net_device *dev, struct sk_buff *skb,
360{ 414{
361 struct ipoib_dev_priv *priv = netdev_priv(dev); 415 struct ipoib_dev_priv *priv = netdev_priv(dev);
362 struct ipoib_tx_buf *tx_req; 416 struct ipoib_tx_buf *tx_req;
363 u64 addr;
364 417
365 if (unlikely(skb->len > priv->mcast_mtu + IPOIB_ENCAP_LEN)) { 418 if (unlikely(skb->len > priv->mcast_mtu + IPOIB_ENCAP_LEN)) {
366 ipoib_warn(priv, "packet len %d (> %d) too long to send, dropping\n", 419 ipoib_warn(priv, "packet len %d (> %d) too long to send, dropping\n",
@@ -383,20 +436,19 @@ void ipoib_send(struct net_device *dev, struct sk_buff *skb,
383 */ 436 */
384 tx_req = &priv->tx_ring[priv->tx_head & (ipoib_sendq_size - 1)]; 437 tx_req = &priv->tx_ring[priv->tx_head & (ipoib_sendq_size - 1)];
385 tx_req->skb = skb; 438 tx_req->skb = skb;
386 addr = ib_dma_map_single(priv->ca, skb->data, skb->len, 439 if (unlikely(ipoib_dma_map_tx(priv->ca, tx_req))) {
387 DMA_TO_DEVICE);
388 if (unlikely(ib_dma_mapping_error(priv->ca, addr))) {
389 ++dev->stats.tx_errors; 440 ++dev->stats.tx_errors;
390 dev_kfree_skb_any(skb); 441 dev_kfree_skb_any(skb);
391 return; 442 return;
392 } 443 }
393 tx_req->mapping = addr;
394 444
395 if (unlikely(post_send(priv, priv->tx_head & (ipoib_sendq_size - 1), 445 if (unlikely(post_send(priv, priv->tx_head & (ipoib_sendq_size - 1),
396 address->ah, qpn, addr, skb->len))) { 446 address->ah, qpn,
447 tx_req->mapping, skb_headlen(skb),
448 skb_shinfo(skb)->frags, skb_shinfo(skb)->nr_frags))) {
397 ipoib_warn(priv, "post_send failed\n"); 449 ipoib_warn(priv, "post_send failed\n");
398 ++dev->stats.tx_errors; 450 ++dev->stats.tx_errors;
399 ib_dma_unmap_single(priv->ca, addr, skb->len, DMA_TO_DEVICE); 451 ipoib_dma_unmap_tx(priv->ca, tx_req);
400 dev_kfree_skb_any(skb); 452 dev_kfree_skb_any(skb);
401 } else { 453 } else {
402 dev->trans_start = jiffies; 454 dev->trans_start = jiffies;
@@ -615,10 +667,7 @@ int ipoib_ib_dev_stop(struct net_device *dev, int flush)
615 while ((int) priv->tx_tail - (int) priv->tx_head < 0) { 667 while ((int) priv->tx_tail - (int) priv->tx_head < 0) {
616 tx_req = &priv->tx_ring[priv->tx_tail & 668 tx_req = &priv->tx_ring[priv->tx_tail &
617 (ipoib_sendq_size - 1)]; 669 (ipoib_sendq_size - 1)];
618 ib_dma_unmap_single(priv->ca, 670 ipoib_dma_unmap_tx(priv->ca, tx_req);
619 tx_req->mapping,
620 tx_req->skb->len,
621 DMA_TO_DEVICE);
622 dev_kfree_skb_any(tx_req->skb); 671 dev_kfree_skb_any(tx_req->skb);
623 ++priv->tx_tail; 672 ++priv->tx_tail;
624 --priv->tx_outstanding; 673 --priv->tx_outstanding;
diff --git a/drivers/infiniband/ulp/ipoib/ipoib_main.c b/drivers/infiniband/ulp/ipoib/ipoib_main.c
index 09f5371137a1..f96477a8ca5a 100644
--- a/drivers/infiniband/ulp/ipoib/ipoib_main.c
+++ b/drivers/infiniband/ulp/ipoib/ipoib_main.c
@@ -965,7 +965,9 @@ static void ipoib_setup(struct net_device *dev)
965 dev->addr_len = INFINIBAND_ALEN; 965 dev->addr_len = INFINIBAND_ALEN;
966 dev->type = ARPHRD_INFINIBAND; 966 dev->type = ARPHRD_INFINIBAND;
967 dev->tx_queue_len = ipoib_sendq_size * 2; 967 dev->tx_queue_len = ipoib_sendq_size * 2;
968 dev->features = NETIF_F_VLAN_CHALLENGED | NETIF_F_LLTX; 968 dev->features = (NETIF_F_VLAN_CHALLENGED |
969 NETIF_F_LLTX |
970 NETIF_F_HIGHDMA);
969 971
970 /* MTU will be reset when mcast join happens */ 972 /* MTU will be reset when mcast join happens */
971 dev->mtu = IPOIB_PACKET_SIZE - IPOIB_ENCAP_LEN; 973 dev->mtu = IPOIB_PACKET_SIZE - IPOIB_ENCAP_LEN;
diff --git a/drivers/infiniband/ulp/ipoib/ipoib_verbs.c b/drivers/infiniband/ulp/ipoib/ipoib_verbs.c
index 433e99ac227b..a3aeb911f024 100644
--- a/drivers/infiniband/ulp/ipoib/ipoib_verbs.c
+++ b/drivers/infiniband/ulp/ipoib/ipoib_verbs.c
@@ -157,6 +157,7 @@ int ipoib_transport_dev_init(struct net_device *dev, struct ib_device *ca)
157 }; 157 };
158 158
159 int ret, size; 159 int ret, size;
160 int i;
160 161
161 priv->pd = ib_alloc_pd(priv->ca); 162 priv->pd = ib_alloc_pd(priv->ca);
162 if (IS_ERR(priv->pd)) { 163 if (IS_ERR(priv->pd)) {
@@ -191,6 +192,9 @@ int ipoib_transport_dev_init(struct net_device *dev, struct ib_device *ca)
191 init_attr.send_cq = priv->cq; 192 init_attr.send_cq = priv->cq;
192 init_attr.recv_cq = priv->cq; 193 init_attr.recv_cq = priv->cq;
193 194
195 if (dev->features & NETIF_F_SG)
196 init_attr.cap.max_send_sge = MAX_SKB_FRAGS + 1;
197
194 priv->qp = ib_create_qp(priv->pd, &init_attr); 198 priv->qp = ib_create_qp(priv->pd, &init_attr);
195 if (IS_ERR(priv->qp)) { 199 if (IS_ERR(priv->qp)) {
196 printk(KERN_WARNING "%s: failed to create QP\n", ca->name); 200 printk(KERN_WARNING "%s: failed to create QP\n", ca->name);
@@ -201,11 +205,11 @@ int ipoib_transport_dev_init(struct net_device *dev, struct ib_device *ca)
201 priv->dev->dev_addr[2] = (priv->qp->qp_num >> 8) & 0xff; 205 priv->dev->dev_addr[2] = (priv->qp->qp_num >> 8) & 0xff;
202 priv->dev->dev_addr[3] = (priv->qp->qp_num ) & 0xff; 206 priv->dev->dev_addr[3] = (priv->qp->qp_num ) & 0xff;
203 207
204 priv->tx_sge.lkey = priv->mr->lkey; 208 for (i = 0; i < MAX_SKB_FRAGS + 1; ++i)
209 priv->tx_sge[i].lkey = priv->mr->lkey;
205 210
206 priv->tx_wr.opcode = IB_WR_SEND; 211 priv->tx_wr.opcode = IB_WR_SEND;
207 priv->tx_wr.sg_list = &priv->tx_sge; 212 priv->tx_wr.sg_list = priv->tx_sge;
208 priv->tx_wr.num_sge = 1;
209 priv->tx_wr.send_flags = IB_SEND_SIGNALED; 213 priv->tx_wr.send_flags = IB_SEND_SIGNALED;
210 214
211 return 0; 215 return 0;
diff --git a/drivers/input/joystick/analog.c b/drivers/input/joystick/analog.c
index f32e031dcb27..708c5ae13b24 100644
--- a/drivers/input/joystick/analog.c
+++ b/drivers/input/joystick/analog.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * $Id: analog.c,v 1.68 2002/01/22 20:18:32 vojtech Exp $
3 *
4 * Copyright (c) 1996-2001 Vojtech Pavlik 2 * Copyright (c) 1996-2001 Vojtech Pavlik
5 */ 3 */
6 4
@@ -164,6 +162,10 @@ static unsigned int get_time_pit(void)
164#define GET_TIME(x) do { x = get_cycles(); } while (0) 162#define GET_TIME(x) do { x = get_cycles(); } while (0)
165#define DELTA(x,y) ((y)-(x)) 163#define DELTA(x,y) ((y)-(x))
166#define TIME_NAME "PCC" 164#define TIME_NAME "PCC"
165#elif defined(CONFIG_MN10300)
166#define GET_TIME(x) do { x = get_cycles(); } while (0)
167#define DELTA(x, y) ((x) - (y))
168#define TIME_NAME "TSC"
167#else 169#else
168#define FAKE_TIME 170#define FAKE_TIME
169static unsigned long analog_faketime = 0; 171static unsigned long analog_faketime = 0;
diff --git a/drivers/isdn/capi/capifs.c b/drivers/isdn/capi/capifs.c
index 2dd1b57b0ba4..6d7c47ec0367 100644
--- a/drivers/isdn/capi/capifs.c
+++ b/drivers/isdn/capi/capifs.c
@@ -52,6 +52,7 @@ static int capifs_remount(struct super_block *s, int *flags, char *data)
52 gid_t gid = 0; 52 gid_t gid = 0;
53 umode_t mode = 0600; 53 umode_t mode = 0600;
54 char *this_char; 54 char *this_char;
55 char *new_opt = kstrdup(data, GFP_KERNEL);
55 56
56 this_char = NULL; 57 this_char = NULL;
57 while ((this_char = strsep(&data, ",")) != NULL) { 58 while ((this_char = strsep(&data, ",")) != NULL) {
@@ -72,11 +73,16 @@ static int capifs_remount(struct super_block *s, int *flags, char *data)
72 return -EINVAL; 73 return -EINVAL;
73 } 74 }
74 } 75 }
76
77 kfree(s->s_options);
78 s->s_options = new_opt;
79
75 config.setuid = setuid; 80 config.setuid = setuid;
76 config.setgid = setgid; 81 config.setgid = setgid;
77 config.uid = uid; 82 config.uid = uid;
78 config.gid = gid; 83 config.gid = gid;
79 config.mode = mode; 84 config.mode = mode;
85
80 return 0; 86 return 0;
81} 87}
82 88
@@ -84,6 +90,7 @@ static struct super_operations capifs_sops =
84{ 90{
85 .statfs = simple_statfs, 91 .statfs = simple_statfs,
86 .remount_fs = capifs_remount, 92 .remount_fs = capifs_remount,
93 .show_options = generic_show_options,
87}; 94};
88 95
89 96
diff --git a/drivers/isdn/hisax/amd7930_fn.c b/drivers/isdn/hisax/amd7930_fn.c
index c0d7036404a5..341faf58a65c 100644
--- a/drivers/isdn/hisax/amd7930_fn.c
+++ b/drivers/isdn/hisax/amd7930_fn.c
@@ -744,8 +744,7 @@ dbusy_timer_handler(struct IsdnCardState *cs)
744 744
745 745
746 746
747void __devinit 747void Amd7930_init(struct IsdnCardState *cs)
748Amd7930_init(struct IsdnCardState *cs)
749{ 748{
750 WORD *ptr; 749 WORD *ptr;
751 BYTE cmd, cnt; 750 BYTE cmd, cnt;
diff --git a/drivers/leds/Kconfig b/drivers/leds/Kconfig
index 851a3b01781e..859814f62cb0 100644
--- a/drivers/leds/Kconfig
+++ b/drivers/leds/Kconfig
@@ -18,6 +18,13 @@ config LEDS_CLASS
18 18
19comment "LED drivers" 19comment "LED drivers"
20 20
21config LEDS_ATMEL_PWM
22 tristate "LED Support using Atmel PWM outputs"
23 depends on LEDS_CLASS && ATMEL_PWM
24 help
25 This option enables support for LEDs driven using outputs
26 of the dedicated PWM controller found on newer Atmel SOCs.
27
21config LEDS_CORGI 28config LEDS_CORGI
22 tristate "LED Support for the Sharp SL-C7x0 series" 29 tristate "LED Support for the Sharp SL-C7x0 series"
23 depends on LEDS_CLASS && PXA_SHARP_C7xx 30 depends on LEDS_CLASS && PXA_SHARP_C7xx
diff --git a/drivers/leds/Makefile b/drivers/leds/Makefile
index bc6afc8dcb27..84ced3b1a13d 100644
--- a/drivers/leds/Makefile
+++ b/drivers/leds/Makefile
@@ -5,6 +5,7 @@ obj-$(CONFIG_LEDS_CLASS) += led-class.o
5obj-$(CONFIG_LEDS_TRIGGERS) += led-triggers.o 5obj-$(CONFIG_LEDS_TRIGGERS) += led-triggers.o
6 6
7# LED Platform Drivers 7# LED Platform Drivers
8obj-$(CONFIG_LEDS_ATMEL_PWM) += leds-atmel-pwm.o
8obj-$(CONFIG_LEDS_CORGI) += leds-corgi.o 9obj-$(CONFIG_LEDS_CORGI) += leds-corgi.o
9obj-$(CONFIG_LEDS_LOCOMO) += leds-locomo.o 10obj-$(CONFIG_LEDS_LOCOMO) += leds-locomo.o
10obj-$(CONFIG_LEDS_SPITZ) += leds-spitz.o 11obj-$(CONFIG_LEDS_SPITZ) += leds-spitz.o
diff --git a/drivers/leds/leds-atmel-pwm.c b/drivers/leds/leds-atmel-pwm.c
new file mode 100644
index 000000000000..af61f55571fe
--- /dev/null
+++ b/drivers/leds/leds-atmel-pwm.c
@@ -0,0 +1,157 @@
1#include <linux/kernel.h>
2#include <linux/platform_device.h>
3#include <linux/leds.h>
4#include <linux/io.h>
5#include <linux/atmel_pwm.h>
6
7
8struct pwmled {
9 struct led_classdev cdev;
10 struct pwm_channel pwmc;
11 struct gpio_led *desc;
12 u32 mult;
13 u8 active_low;
14};
15
16
17/*
18 * For simplicity, we use "brightness" as if it were a linear function
19 * of PWM duty cycle. However, a logarithmic function of duty cycle is
20 * probably a better match for perceived brightness: two is half as bright
21 * as four, four is half as bright as eight, etc
22 */
23static void pwmled_brightness(struct led_classdev *cdev, enum led_brightness b)
24{
25 struct pwmled *led;
26
27 /* update the duty cycle for the *next* period */
28 led = container_of(cdev, struct pwmled, cdev);
29 pwm_channel_writel(&led->pwmc, PWM_CUPD, led->mult * (unsigned) b);
30}
31
32/*
33 * NOTE: we reuse the platform_data structure of GPIO leds,
34 * but repurpose its "gpio" number as a PWM channel number.
35 */
36static int __init pwmled_probe(struct platform_device *pdev)
37{
38 const struct gpio_led_platform_data *pdata;
39 struct pwmled *leds;
40 unsigned i;
41 int status;
42
43 pdata = pdev->dev.platform_data;
44 if (!pdata || pdata->num_leds < 1)
45 return -ENODEV;
46
47 leds = kcalloc(pdata->num_leds, sizeof(*leds), GFP_KERNEL);
48 if (!leds)
49 return -ENOMEM;
50
51 for (i = 0; i < pdata->num_leds; i++) {
52 struct pwmled *led = leds + i;
53 const struct gpio_led *dat = pdata->leds + i;
54 u32 tmp;
55
56 led->cdev.name = dat->name;
57 led->cdev.brightness = LED_OFF;
58 led->cdev.brightness_set = pwmled_brightness;
59 led->cdev.default_trigger = dat->default_trigger;
60
61 led->active_low = dat->active_low;
62
63 status = pwm_channel_alloc(dat->gpio, &led->pwmc);
64 if (status < 0)
65 goto err;
66
67 /*
68 * Prescale clock by 2^x, so PWM counts in low MHz.
69 * Start each cycle with the LED active, so increasing
70 * the duty cycle gives us more time on (== brighter).
71 */
72 tmp = 5;
73 if (!led->active_low)
74 tmp |= PWM_CPR_CPOL;
75 pwm_channel_writel(&led->pwmc, PWM_CMR, tmp);
76
77 /*
78 * Pick a period so PWM cycles at 100+ Hz; and a multiplier
79 * for scaling duty cycle: brightness * mult.
80 */
81 tmp = (led->pwmc.mck / (1 << 5)) / 100;
82 tmp /= 255;
83 led->mult = tmp;
84 pwm_channel_writel(&led->pwmc, PWM_CDTY,
85 led->cdev.brightness * 255);
86 pwm_channel_writel(&led->pwmc, PWM_CPRD,
87 LED_FULL * tmp);
88
89 pwm_channel_enable(&led->pwmc);
90
91 /* Hand it over to the LED framework */
92 status = led_classdev_register(&pdev->dev, &led->cdev);
93 if (status < 0) {
94 pwm_channel_free(&led->pwmc);
95 goto err;
96 }
97 }
98
99 platform_set_drvdata(pdev, leds);
100 return 0;
101
102err:
103 if (i > 0) {
104 for (i = i - 1; i >= 0; i--) {
105 led_classdev_unregister(&leds[i].cdev);
106 pwm_channel_free(&leds[i].pwmc);
107 }
108 }
109 kfree(leds);
110
111 return status;
112}
113
114static int __exit pwmled_remove(struct platform_device *pdev)
115{
116 const struct gpio_led_platform_data *pdata;
117 struct pwmled *leds;
118 unsigned i;
119
120 pdata = pdev->dev.platform_data;
121 leds = platform_get_drvdata(pdev);
122
123 for (i = 0; i < pdata->num_leds; i++) {
124 struct pwmled *led = leds + i;
125
126 led_classdev_unregister(&led->cdev);
127 pwm_channel_free(&led->pwmc);
128 }
129
130 kfree(leds);
131 platform_set_drvdata(pdev, NULL);
132 return 0;
133}
134
135static struct platform_driver pwmled_driver = {
136 .driver = {
137 .name = "leds-atmel-pwm",
138 .owner = THIS_MODULE,
139 },
140 /* REVISIT add suspend() and resume() methods */
141 .remove = __exit_p(pwmled_remove),
142};
143
144static int __init modinit(void)
145{
146 return platform_driver_probe(&pwmled_driver, pwmled_probe);
147}
148module_init(modinit);
149
150static void __exit modexit(void)
151{
152 platform_driver_unregister(&pwmled_driver);
153}
154module_exit(modexit);
155
156MODULE_DESCRIPTION("Driver for LEDs with PWM-controlled brightness");
157MODULE_LICENSE("GPL");
diff --git a/drivers/lguest/lguest_device.c b/drivers/lguest/lguest_device.c
index 84f85e23cca7..1b2ec0bf5eb1 100644
--- a/drivers/lguest/lguest_device.c
+++ b/drivers/lguest/lguest_device.c
@@ -47,7 +47,7 @@ struct lguest_device {
47/* Since the virtio infrastructure hands us a pointer to the virtio_device all 47/* Since the virtio infrastructure hands us a pointer to the virtio_device all
48 * the time, it helps to have a curt macro to get a pointer to the struct 48 * the time, it helps to have a curt macro to get a pointer to the struct
49 * lguest_device it's enclosed in. */ 49 * lguest_device it's enclosed in. */
50#define to_lgdev(vdev) container_of(vdev, struct lguest_device, vdev) 50#define to_lgdev(vd) container_of(vd, struct lguest_device, vdev)
51 51
52/*D:130 52/*D:130
53 * Device configurations 53 * Device configurations
diff --git a/drivers/macintosh/smu.c b/drivers/macintosh/smu.c
index 8ba49385c3ff..77ad192962c5 100644
--- a/drivers/macintosh/smu.c
+++ b/drivers/macintosh/smu.c
@@ -85,6 +85,7 @@ struct smu_device {
85 u32 cmd_buf_abs; /* command buffer absolute */ 85 u32 cmd_buf_abs; /* command buffer absolute */
86 struct list_head cmd_list; 86 struct list_head cmd_list;
87 struct smu_cmd *cmd_cur; /* pending command */ 87 struct smu_cmd *cmd_cur; /* pending command */
88 int broken_nap;
88 struct list_head cmd_i2c_list; 89 struct list_head cmd_i2c_list;
89 struct smu_i2c_cmd *cmd_i2c_cur; /* pending i2c command */ 90 struct smu_i2c_cmd *cmd_i2c_cur; /* pending i2c command */
90 struct timer_list i2c_timer; 91 struct timer_list i2c_timer;
@@ -135,6 +136,19 @@ static void smu_start_cmd(void)
135 fend = faddr + smu->cmd_buf->length + 2; 136 fend = faddr + smu->cmd_buf->length + 2;
136 flush_inval_dcache_range(faddr, fend); 137 flush_inval_dcache_range(faddr, fend);
137 138
139
140 /* We also disable NAP mode for the duration of the command
141 * on U3 based machines.
142 * This is slightly racy as it can be written back to 1 by a sysctl
143 * but that never happens in practice. There seem to be an issue with
144 * U3 based machines such as the iMac G5 where napping for the
145 * whole duration of the command prevents the SMU from fetching it
146 * from memory. This might be related to the strange i2c based
147 * mechanism the SMU uses to access memory.
148 */
149 if (smu->broken_nap)
150 powersave_nap = 0;
151
138 /* This isn't exactly a DMA mapping here, I suspect 152 /* This isn't exactly a DMA mapping here, I suspect
139 * the SMU is actually communicating with us via i2c to the 153 * the SMU is actually communicating with us via i2c to the
140 * northbridge or the CPU to access RAM. 154 * northbridge or the CPU to access RAM.
@@ -211,6 +225,10 @@ static irqreturn_t smu_db_intr(int irq, void *arg)
211 misc = cmd->misc; 225 misc = cmd->misc;
212 mb(); 226 mb();
213 cmd->status = rc; 227 cmd->status = rc;
228
229 /* Re-enable NAP mode */
230 if (smu->broken_nap)
231 powersave_nap = 1;
214 bail: 232 bail:
215 /* Start next command if any */ 233 /* Start next command if any */
216 smu_start_cmd(); 234 smu_start_cmd();
@@ -461,7 +479,7 @@ int __init smu_init (void)
461 if (np == NULL) 479 if (np == NULL)
462 return -ENODEV; 480 return -ENODEV;
463 481
464 printk(KERN_INFO "SMU driver %s %s\n", VERSION, AUTHOR); 482 printk(KERN_INFO "SMU: Driver %s %s\n", VERSION, AUTHOR);
465 483
466 if (smu_cmdbuf_abs == 0) { 484 if (smu_cmdbuf_abs == 0) {
467 printk(KERN_ERR "SMU: Command buffer not allocated !\n"); 485 printk(KERN_ERR "SMU: Command buffer not allocated !\n");
@@ -533,6 +551,11 @@ int __init smu_init (void)
533 goto fail; 551 goto fail;
534 } 552 }
535 553
554 /* U3 has an issue with NAP mode when issuing SMU commands */
555 smu->broken_nap = pmac_get_uninorth_variant() < 4;
556 if (smu->broken_nap)
557 printk(KERN_INFO "SMU: using NAP mode workaround\n");
558
536 sys_ctrler = SYS_CTRLER_SMU; 559 sys_ctrler = SYS_CTRLER_SMU;
537 return 0; 560 return 0;
538 561
diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig
index 7b5220ca7d7f..c143a86c2ea6 100644
--- a/drivers/misc/Kconfig
+++ b/drivers/misc/Kconfig
@@ -13,6 +13,15 @@ menuconfig MISC_DEVICES
13 13
14if MISC_DEVICES 14if MISC_DEVICES
15 15
16config ATMEL_PWM
17 tristate "Atmel AT32/AT91 PWM support"
18 depends on AVR32 || ARCH_AT91
19 help
20 This option enables device driver support for the PWM channels
21 on certain Atmel prcoessors. Pulse Width Modulation is used for
22 purposes including software controlled power-efficent backlights
23 on LCD displays, motor control, and waveform generation.
24
16config IBM_ASM 25config IBM_ASM
17 tristate "Device driver for IBM RSA service processor" 26 tristate "Device driver for IBM RSA service processor"
18 depends on X86 && PCI && INPUT && EXPERIMENTAL 27 depends on X86 && PCI && INPUT && EXPERIMENTAL
@@ -97,9 +106,9 @@ config ACER_WMI
97 depends on X86 106 depends on X86
98 depends on EXPERIMENTAL 107 depends on EXPERIMENTAL
99 depends on ACPI 108 depends on ACPI
100 depends on ACPI_WMI
101 depends on LEDS_CLASS 109 depends on LEDS_CLASS
102 depends on BACKLIGHT_CLASS_DEVICE 110 depends on BACKLIGHT_CLASS_DEVICE
111 select ACPI_WMI
103 ---help--- 112 ---help---
104 This is a driver for newer Acer (and Wistron) laptops. It adds 113 This is a driver for newer Acer (and Wistron) laptops. It adds
105 wireless radio and bluetooth control, and on some laptops, 114 wireless radio and bluetooth control, and on some laptops,
@@ -146,7 +155,7 @@ config TC1100_WMI
146 tristate "HP Compaq TC1100 Tablet WMI Extras" 155 tristate "HP Compaq TC1100 Tablet WMI Extras"
147 depends on X86 && !X86_64 156 depends on X86 && !X86_64
148 depends on ACPI 157 depends on ACPI
149 depends on ACPI_WMI 158 select ACPI_WMI
150 ---help--- 159 ---help---
151 This is a driver for the WMI extensions (wireless and bluetooth power 160 This is a driver for the WMI extensions (wireless and bluetooth power
152 control) of the HP Compaq TC1100 tablet. 161 control) of the HP Compaq TC1100 tablet.
@@ -279,6 +288,7 @@ config ATMEL_SSC
279config INTEL_MENLOW 288config INTEL_MENLOW
280 tristate "Thermal Management driver for Intel menlow platform" 289 tristate "Thermal Management driver for Intel menlow platform"
281 depends on ACPI_THERMAL 290 depends on ACPI_THERMAL
291 depends on X86
282 ---help--- 292 ---help---
283 ACPI thermal management enhancement driver on 293 ACPI thermal management enhancement driver on
284 Intel Menlow platform. 294 Intel Menlow platform.
diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
index 7f13549cc87e..3b12f5da8562 100644
--- a/drivers/misc/Makefile
+++ b/drivers/misc/Makefile
@@ -8,6 +8,7 @@ obj-$(CONFIG_HDPU_FEATURES) += hdpuftrs/
8obj-$(CONFIG_MSI_LAPTOP) += msi-laptop.o 8obj-$(CONFIG_MSI_LAPTOP) += msi-laptop.o
9obj-$(CONFIG_ACER_WMI) += acer-wmi.o 9obj-$(CONFIG_ACER_WMI) += acer-wmi.o
10obj-$(CONFIG_ASUS_LAPTOP) += asus-laptop.o 10obj-$(CONFIG_ASUS_LAPTOP) += asus-laptop.o
11obj-$(CONFIG_ATMEL_PWM) += atmel_pwm.o
11obj-$(CONFIG_ATMEL_SSC) += atmel-ssc.o 12obj-$(CONFIG_ATMEL_SSC) += atmel-ssc.o
12obj-$(CONFIG_TC1100_WMI) += tc1100-wmi.o 13obj-$(CONFIG_TC1100_WMI) += tc1100-wmi.o
13obj-$(CONFIG_LKDTM) += lkdtm.o 14obj-$(CONFIG_LKDTM) += lkdtm.o
diff --git a/drivers/misc/atmel_pwm.c b/drivers/misc/atmel_pwm.c
new file mode 100644
index 000000000000..f8d3b9a76cbd
--- /dev/null
+++ b/drivers/misc/atmel_pwm.c
@@ -0,0 +1,409 @@
1#include <linux/module.h>
2#include <linux/clk.h>
3#include <linux/err.h>
4#include <linux/io.h>
5#include <linux/interrupt.h>
6#include <linux/platform_device.h>
7#include <linux/atmel_pwm.h>
8
9
10/*
11 * This is a simple driver for the PWM controller found in various newer
12 * Atmel SOCs, including the AVR32 series and the AT91sam9263.
13 *
14 * Chips with current Linux ports have only 4 PWM channels, out of max 32.
15 * AT32UC3A and AT32UC3B chips have 7 channels (but currently no Linux).
16 * Docs are inconsistent about the width of the channel counter registers;
17 * it's at least 16 bits, but several places say 20 bits.
18 */
19#define PWM_NCHAN 4 /* max 32 */
20
21struct pwm {
22 spinlock_t lock;
23 struct platform_device *pdev;
24 u32 mask;
25 int irq;
26 void __iomem *base;
27 struct clk *clk;
28 struct pwm_channel *channel[PWM_NCHAN];
29 void (*handler[PWM_NCHAN])(struct pwm_channel *);
30};
31
32
33/* global PWM controller registers */
34#define PWM_MR 0x00
35#define PWM_ENA 0x04
36#define PWM_DIS 0x08
37#define PWM_SR 0x0c
38#define PWM_IER 0x10
39#define PWM_IDR 0x14
40#define PWM_IMR 0x18
41#define PWM_ISR 0x1c
42
43static inline void pwm_writel(const struct pwm *p, unsigned offset, u32 val)
44{
45 __raw_writel(val, p->base + offset);
46}
47
48static inline u32 pwm_readl(const struct pwm *p, unsigned offset)
49{
50 return __raw_readl(p->base + offset);
51}
52
53static inline void __iomem *pwmc_regs(const struct pwm *p, int index)
54{
55 return p->base + 0x200 + index * 0x20;
56}
57
58static struct pwm *pwm;
59
60static void pwm_dumpregs(struct pwm_channel *ch, char *tag)
61{
62 struct device *dev = &pwm->pdev->dev;
63
64 dev_dbg(dev, "%s: mr %08x, sr %08x, imr %08x\n",
65 tag,
66 pwm_readl(pwm, PWM_MR),
67 pwm_readl(pwm, PWM_SR),
68 pwm_readl(pwm, PWM_IMR));
69 dev_dbg(dev,
70 "pwm ch%d - mr %08x, dty %u, prd %u, cnt %u\n",
71 ch->index,
72 pwm_channel_readl(ch, PWM_CMR),
73 pwm_channel_readl(ch, PWM_CDTY),
74 pwm_channel_readl(ch, PWM_CPRD),
75 pwm_channel_readl(ch, PWM_CCNT));
76}
77
78
79/**
80 * pwm_channel_alloc - allocate an unused PWM channel
81 * @index: identifies the channel
82 * @ch: structure to be initialized
83 *
84 * Drivers allocate PWM channels according to the board's wiring, and
85 * matching board-specific setup code. Returns zero or negative errno.
86 */
87int pwm_channel_alloc(int index, struct pwm_channel *ch)
88{
89 unsigned long flags;
90 int status = 0;
91
92 /* insist on PWM init, with this signal pinned out */
93 if (!pwm || !(pwm->mask & 1 << index))
94 return -ENODEV;
95
96 if (index < 0 || index >= PWM_NCHAN || !ch)
97 return -EINVAL;
98 memset(ch, 0, sizeof *ch);
99
100 spin_lock_irqsave(&pwm->lock, flags);
101 if (pwm->channel[index])
102 status = -EBUSY;
103 else {
104 clk_enable(pwm->clk);
105
106 ch->regs = pwmc_regs(pwm, index);
107 ch->index = index;
108
109 /* REVISIT: ap7000 seems to go 2x as fast as we expect!! */
110 ch->mck = clk_get_rate(pwm->clk);
111
112 pwm->channel[index] = ch;
113 pwm->handler[index] = NULL;
114
115 /* channel and irq are always disabled when we return */
116 pwm_writel(pwm, PWM_DIS, 1 << index);
117 pwm_writel(pwm, PWM_IDR, 1 << index);
118 }
119 spin_unlock_irqrestore(&pwm->lock, flags);
120 return status;
121}
122EXPORT_SYMBOL(pwm_channel_alloc);
123
124static int pwmcheck(struct pwm_channel *ch)
125{
126 int index;
127
128 if (!pwm)
129 return -ENODEV;
130 if (!ch)
131 return -EINVAL;
132 index = ch->index;
133 if (index < 0 || index >= PWM_NCHAN || pwm->channel[index] != ch)
134 return -EINVAL;
135
136 return index;
137}
138
139/**
140 * pwm_channel_free - release a previously allocated channel
141 * @ch: the channel being released
142 *
143 * The channel is completely shut down (counter and IRQ disabled),
144 * and made available for re-use. Returns zero, or negative errno.
145 */
146int pwm_channel_free(struct pwm_channel *ch)
147{
148 unsigned long flags;
149 int t;
150
151 spin_lock_irqsave(&pwm->lock, flags);
152 t = pwmcheck(ch);
153 if (t >= 0) {
154 pwm->channel[t] = NULL;
155 pwm->handler[t] = NULL;
156
157 /* channel and irq are always disabled when we return */
158 pwm_writel(pwm, PWM_DIS, 1 << t);
159 pwm_writel(pwm, PWM_IDR, 1 << t);
160
161 clk_disable(pwm->clk);
162 t = 0;
163 }
164 spin_unlock_irqrestore(&pwm->lock, flags);
165 return t;
166}
167EXPORT_SYMBOL(pwm_channel_free);
168
169int __pwm_channel_onoff(struct pwm_channel *ch, int enabled)
170{
171 unsigned long flags;
172 int t;
173
174 /* OMITTED FUNCTIONALITY: starting several channels in synch */
175
176 spin_lock_irqsave(&pwm->lock, flags);
177 t = pwmcheck(ch);
178 if (t >= 0) {
179 pwm_writel(pwm, enabled ? PWM_ENA : PWM_DIS, 1 << t);
180 t = 0;
181 pwm_dumpregs(ch, enabled ? "enable" : "disable");
182 }
183 spin_unlock_irqrestore(&pwm->lock, flags);
184
185 return t;
186}
187EXPORT_SYMBOL(__pwm_channel_onoff);
188
189/**
190 * pwm_clk_alloc - allocate and configure CLKA or CLKB
191 * @prescale: from 0..10, the power of two used to divide MCK
192 * @div: from 1..255, the linear divisor to use
193 *
194 * Returns PWM_CPR_CLKA, PWM_CPR_CLKB, or negative errno. The allocated
195 * clock will run with a period of (2^prescale * div) / MCK, or twice as
196 * long if center aligned PWM output is used. The clock must later be
197 * deconfigured using pwm_clk_free().
198 */
199int pwm_clk_alloc(unsigned prescale, unsigned div)
200{
201 unsigned long flags;
202 u32 mr;
203 u32 val = (prescale << 8) | div;
204 int ret = -EBUSY;
205
206 if (prescale >= 10 || div == 0 || div > 255)
207 return -EINVAL;
208
209 spin_lock_irqsave(&pwm->lock, flags);
210 mr = pwm_readl(pwm, PWM_MR);
211 if ((mr & 0xffff) == 0) {
212 mr |= val;
213 ret = PWM_CPR_CLKA;
214 }
215 if ((mr & (0xffff << 16)) == 0) {
216 mr |= val << 16;
217 ret = PWM_CPR_CLKB;
218 }
219 if (ret > 0)
220 pwm_writel(pwm, PWM_MR, mr);
221 spin_unlock_irqrestore(&pwm->lock, flags);
222 return ret;
223}
224EXPORT_SYMBOL(pwm_clk_alloc);
225
226/**
227 * pwm_clk_free - deconfigure and release CLKA or CLKB
228 *
229 * Reverses the effect of pwm_clk_alloc().
230 */
231void pwm_clk_free(unsigned clk)
232{
233 unsigned long flags;
234 u32 mr;
235
236 spin_lock_irqsave(&pwm->lock, flags);
237 mr = pwm_readl(pwm, PWM_MR);
238 if (clk == PWM_CPR_CLKA)
239 pwm_writel(pwm, PWM_MR, mr & ~(0xffff << 0));
240 if (clk == PWM_CPR_CLKB)
241 pwm_writel(pwm, PWM_MR, mr & ~(0xffff << 16));
242 spin_unlock_irqrestore(&pwm->lock, flags);
243}
244EXPORT_SYMBOL(pwm_clk_free);
245
246/**
247 * pwm_channel_handler - manage channel's IRQ handler
248 * @ch: the channel
249 * @handler: the handler to use, possibly NULL
250 *
251 * If the handler is non-null, the handler will be called after every
252 * period of this PWM channel. If the handler is null, this channel
253 * won't generate an IRQ.
254 */
255int pwm_channel_handler(struct pwm_channel *ch,
256 void (*handler)(struct pwm_channel *ch))
257{
258 unsigned long flags;
259 int t;
260
261 spin_lock_irqsave(&pwm->lock, flags);
262 t = pwmcheck(ch);
263 if (t >= 0) {
264 pwm->handler[t] = handler;
265 pwm_writel(pwm, handler ? PWM_IER : PWM_IDR, 1 << t);
266 t = 0;
267 }
268 spin_unlock_irqrestore(&pwm->lock, flags);
269
270 return t;
271}
272EXPORT_SYMBOL(pwm_channel_handler);
273
274static irqreturn_t pwm_irq(int id, void *_pwm)
275{
276 struct pwm *p = _pwm;
277 irqreturn_t handled = IRQ_NONE;
278 u32 irqstat;
279 int index;
280
281 spin_lock(&p->lock);
282
283 /* ack irqs, then handle them */
284 irqstat = pwm_readl(pwm, PWM_ISR);
285
286 while (irqstat) {
287 struct pwm_channel *ch;
288 void (*handler)(struct pwm_channel *ch);
289
290 index = ffs(irqstat) - 1;
291 irqstat &= ~(1 << index);
292 ch = pwm->channel[index];
293 handler = pwm->handler[index];
294 if (handler && ch) {
295 spin_unlock(&p->lock);
296 handler(ch);
297 spin_lock(&p->lock);
298 handled = IRQ_HANDLED;
299 }
300 }
301
302 spin_unlock(&p->lock);
303 return handled;
304}
305
306static int __init pwm_probe(struct platform_device *pdev)
307{
308 struct resource *r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
309 int irq = platform_get_irq(pdev, 0);
310 u32 *mp = pdev->dev.platform_data;
311 struct pwm *p;
312 int status = -EIO;
313
314 if (pwm)
315 return -EBUSY;
316 if (!r || irq < 0 || !mp || !*mp)
317 return -ENODEV;
318 if (*mp & ~((1<<PWM_NCHAN)-1)) {
319 dev_warn(&pdev->dev, "mask 0x%x ... more than %d channels\n",
320 *mp, PWM_NCHAN);
321 return -EINVAL;
322 }
323
324 p = kzalloc(sizeof(*p), GFP_KERNEL);
325 if (!p)
326 return -ENOMEM;
327
328 spin_lock_init(&p->lock);
329 p->pdev = pdev;
330 p->mask = *mp;
331 p->irq = irq;
332 p->base = ioremap(r->start, r->end - r->start + 1);
333 if (!p->base)
334 goto fail;
335 p->clk = clk_get(&pdev->dev, "mck");
336 if (IS_ERR(p->clk)) {
337 status = PTR_ERR(p->clk);
338 p->clk = NULL;
339 goto fail;
340 }
341
342 status = request_irq(irq, pwm_irq, 0, pdev->name, p);
343 if (status < 0)
344 goto fail;
345
346 pwm = p;
347 platform_set_drvdata(pdev, p);
348
349 return 0;
350
351fail:
352 if (p->clk)
353 clk_put(p->clk);
354 if (p->base)
355 iounmap(p->base);
356
357 kfree(p);
358 return status;
359}
360
361static int __exit pwm_remove(struct platform_device *pdev)
362{
363 struct pwm *p = platform_get_drvdata(pdev);
364
365 if (p != pwm)
366 return -EINVAL;
367
368 clk_enable(pwm->clk);
369 pwm_writel(pwm, PWM_DIS, (1 << PWM_NCHAN) - 1);
370 pwm_writel(pwm, PWM_IDR, (1 << PWM_NCHAN) - 1);
371 clk_disable(pwm->clk);
372
373 pwm = NULL;
374
375 free_irq(p->irq, p);
376 clk_put(p->clk);
377 iounmap(p->base);
378 kfree(p);
379
380 return 0;
381}
382
383static struct platform_driver atmel_pwm_driver = {
384 .driver = {
385 .name = "atmel_pwm",
386 .owner = THIS_MODULE,
387 },
388 .remove = __exit_p(pwm_remove),
389
390 /* NOTE: PWM can keep running in AVR32 "idle" and "frozen" states;
391 * and all AT91sam9263 states, albeit at reduced clock rate if
392 * MCK becomes the slow clock (i.e. what Linux labels STR).
393 */
394};
395
396static int __init pwm_init(void)
397{
398 return platform_driver_probe(&atmel_pwm_driver, pwm_probe);
399}
400module_init(pwm_init);
401
402static void __exit pwm_exit(void)
403{
404 platform_driver_unregister(&atmel_pwm_driver);
405}
406module_exit(pwm_exit);
407
408MODULE_DESCRIPTION("Driver for AT32/AT91 PWM module");
409MODULE_LICENSE("GPL");
diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig
index 9cc25fd80b60..50c2b60e1fee 100644
--- a/drivers/net/Kconfig
+++ b/drivers/net/Kconfig
@@ -879,7 +879,8 @@ config SMC91X
879 tristate "SMC 91C9x/91C1xxx support" 879 tristate "SMC 91C9x/91C1xxx support"
880 select CRC32 880 select CRC32
881 select MII 881 select MII
882 depends on ARM || REDWOOD_5 || REDWOOD_6 || M32R || SUPERH || SOC_AU1X00 || BLACKFIN 882 depends on ARM || REDWOOD_5 || REDWOOD_6 || M32R || SUPERH || \
883 SOC_AU1X00 || BLACKFIN || MN10300
883 help 884 help
884 This is a driver for SMC's 91x series of Ethernet chipsets, 885 This is a driver for SMC's 91x series of Ethernet chipsets,
885 including the SMC91C94 and the SMC91C111. Say Y if you want it 886 including the SMC91C94 and the SMC91C111. Say Y if you want it
diff --git a/drivers/net/cris/eth_v10.c b/drivers/net/cris/eth_v10.c
index 917b7b46f1a7..65d0a9103297 100644
--- a/drivers/net/cris/eth_v10.c
+++ b/drivers/net/cris/eth_v10.c
@@ -1,221 +1,10 @@
1/* $Id: ethernet.c,v 1.31 2004/10/18 14:49:03 starvik Exp $ 1/*
2 *
3 * e100net.c: A network driver for the ETRAX 100LX network controller. 2 * e100net.c: A network driver for the ETRAX 100LX network controller.
4 * 3 *
5 * Copyright (c) 1998-2002 Axis Communications AB. 4 * Copyright (c) 1998-2002 Axis Communications AB.
6 * 5 *
7 * The outline of this driver comes from skeleton.c. 6 * The outline of this driver comes from skeleton.c.
8 * 7 *
9 * $Log: ethernet.c,v $
10 * Revision 1.31 2004/10/18 14:49:03 starvik
11 * Use RX interrupt as random source
12 *
13 * Revision 1.30 2004/09/29 10:44:04 starvik
14 * Enabed MAC-address output again
15 *
16 * Revision 1.29 2004/08/24 07:14:05 starvik
17 * Make use of generic MDIO interface and constants.
18 *
19 * Revision 1.28 2004/08/20 09:37:11 starvik
20 * Added support for Intel LXT972A. Creds to Randy Scarborough.
21 *
22 * Revision 1.27 2004/08/16 12:37:22 starvik
23 * Merge of Linux 2.6.8
24 *
25 * Revision 1.25 2004/06/21 10:29:57 starvik
26 * Merge of Linux 2.6.7
27 *
28 * Revision 1.23 2004/06/09 05:29:22 starvik
29 * Avoid any race where R_DMA_CH1_FIRST is NULL (may trigger cache bug).
30 *
31 * Revision 1.22 2004/05/14 07:58:03 starvik
32 * Merge of changes from 2.4
33 *
34 * Revision 1.20 2004/03/11 11:38:40 starvik
35 * Merge of Linux 2.6.4
36 *
37 * Revision 1.18 2003/12/03 13:45:46 starvik
38 * Use hardware pad for short packets to prevent information leakage.
39 *
40 * Revision 1.17 2003/07/04 08:27:37 starvik
41 * Merge of Linux 2.5.74
42 *
43 * Revision 1.16 2003/04/24 08:28:22 starvik
44 * New LED behaviour: LED off when no link
45 *
46 * Revision 1.15 2003/04/09 05:20:47 starvik
47 * Merge of Linux 2.5.67
48 *
49 * Revision 1.13 2003/03/06 16:11:01 henriken
50 * Off by one error in group address register setting.
51 *
52 * Revision 1.12 2003/02/27 17:24:19 starvik
53 * Corrected Rev to Revision
54 *
55 * Revision 1.11 2003/01/24 09:53:21 starvik
56 * Oops. Initialize GA to 0, not to 1
57 *
58 * Revision 1.10 2003/01/24 09:50:55 starvik
59 * Initialize GA_0 and GA_1 to 0 to avoid matching of unwanted packets
60 *
61 * Revision 1.9 2002/12/13 07:40:58 starvik
62 * Added basic ethtool interface
63 * Handled out of memory when allocating new buffers
64 *
65 * Revision 1.8 2002/12/11 13:13:57 starvik
66 * Added arch/ to v10 specific includes
67 * Added fix from Linux 2.4 in serial.c (flush_to_flip_buffer)
68 *
69 * Revision 1.7 2002/11/26 09:41:42 starvik
70 * Added e100_set_config (standard interface to set media type)
71 * Added protection against preemptive scheduling
72 * Added standard MII ioctls
73 *
74 * Revision 1.6 2002/11/21 07:18:18 starvik
75 * Timers must be initialized in 2.5.48
76 *
77 * Revision 1.5 2002/11/20 11:56:11 starvik
78 * Merge of Linux 2.5.48
79 *
80 * Revision 1.4 2002/11/18 07:26:46 starvik
81 * Linux 2.5 port of latest Linux 2.4 ethernet driver
82 *
83 * Revision 1.33 2002/10/02 20:16:17 hp
84 * SETF, SETS: Use underscored IO_x_ macros rather than incorrect token concatenation
85 *
86 * Revision 1.32 2002/09/16 06:05:58 starvik
87 * Align memory returned by dev_alloc_skb
88 * Moved handling of sent packets to interrupt to avoid reference counting problem
89 *
90 * Revision 1.31 2002/09/10 13:28:23 larsv
91 * Return -EINVAL for unknown ioctls to avoid confusing tools that tests
92 * for supported functionality by issuing special ioctls, i.e. wireless
93 * extensions.
94 *
95 * Revision 1.30 2002/05/07 18:50:08 johana
96 * Correct spelling in comments.
97 *
98 * Revision 1.29 2002/05/06 05:38:49 starvik
99 * Performance improvements:
100 * Large packets are not copied (breakpoint set to 256 bytes)
101 * The cache bug workaround is delayed until half of the receive list
102 * has been used
103 * Added transmit list
104 * Transmit interrupts are only enabled when transmit queue is full
105 *
106 * Revision 1.28.2.1 2002/04/30 08:15:51 starvik
107 * Performance improvements:
108 * Large packets are not copied (breakpoint set to 256 bytes)
109 * The cache bug workaround is delayed until half of the receive list
110 * has been used.
111 * Added transmit list
112 * Transmit interrupts are only enabled when transmit queue is full
113 *
114 * Revision 1.28 2002/04/22 11:47:21 johana
115 * Fix according to 2.4.19-pre7. time_after/time_before and
116 * missing end of comment.
117 * The patch has a typo for ethernet.c in e100_clear_network_leds(),
118 * that is fixed here.
119 *
120 * Revision 1.27 2002/04/12 11:55:11 bjornw
121 * Added TODO
122 *
123 * Revision 1.26 2002/03/15 17:11:02 bjornw
124 * Use prepare_rx_descriptor after the CPU has touched the receiving descs
125 *
126 * Revision 1.25 2002/03/08 13:07:53 bjornw
127 * Unnecessary spinlock removed
128 *
129 * Revision 1.24 2002/02/20 12:57:43 fredriks
130 * Replaced MIN() with min().
131 *
132 * Revision 1.23 2002/02/20 10:58:14 fredriks
133 * Strip the Ethernet checksum (4 bytes) before forwarding a frame to upper layers.
134 *
135 * Revision 1.22 2002/01/30 07:48:22 matsfg
136 * Initiate R_NETWORK_TR_CTRL
137 *
138 * Revision 1.21 2001/11/23 11:54:49 starvik
139 * Added IFF_PROMISC and IFF_ALLMULTI handling in set_multicast_list
140 * Removed compiler warnings
141 *
142 * Revision 1.20 2001/11/12 19:26:00 pkj
143 * * Corrected e100_negotiate() to not assign half to current_duplex when
144 * it was supposed to compare them...
145 * * Cleaned up failure handling in e100_open().
146 * * Fixed compiler warnings.
147 *
148 * Revision 1.19 2001/11/09 07:43:09 starvik
149 * Added full duplex support
150 * Added ioctl to set speed and duplex
151 * Clear LED timer only runs when LED is lit
152 *
153 * Revision 1.18 2001/10/03 14:40:43 jonashg
154 * Update rx_bytes counter.
155 *
156 * Revision 1.17 2001/06/11 12:43:46 olof
157 * Modified defines for network LED behavior
158 *
159 * Revision 1.16 2001/05/30 06:12:46 markusl
160 * TxDesc.next should not be set to NULL
161 *
162 * Revision 1.15 2001/05/29 10:27:04 markusl
163 * Updated after review remarks:
164 * +Use IO_EXTRACT
165 * +Handle underrun
166 *
167 * Revision 1.14 2001/05/29 09:20:14 jonashg
168 * Use driver name on printk output so one can tell which driver that complains.
169 *
170 * Revision 1.13 2001/05/09 12:35:59 johana
171 * Use DMA_NBR and IRQ_NBR defines from dma.h and irq.h
172 *
173 * Revision 1.12 2001/04/05 11:43:11 tobiasa
174 * Check dev before panic.
175 *
176 * Revision 1.11 2001/04/04 11:21:05 markusl
177 * Updated according to review remarks
178 *
179 * Revision 1.10 2001/03/26 16:03:06 bjornw
180 * Needs linux/config.h
181 *
182 * Revision 1.9 2001/03/19 14:47:48 pkj
183 * * Make sure there is always a pause after the network LEDs are
184 * changed so they will not look constantly lit during heavy traffic.
185 * * Always use HZ when setting times relative to jiffies.
186 * * Use LED_NETWORK_SET() when setting the network LEDs.
187 *
188 * Revision 1.8 2001/02/27 13:52:48 bjornw
189 * malloc.h -> slab.h
190 *
191 * Revision 1.7 2001/02/23 13:46:38 bjornw
192 * Spellling check
193 *
194 * Revision 1.6 2001/01/26 15:21:04 starvik
195 * Don't disable interrupts while reading MDIO registers (MDIO is slow)
196 * Corrected promiscuous mode
197 * Improved deallocation of IRQs ("ifconfig eth0 down" now works)
198 *
199 * Revision 1.5 2000/11/29 17:22:22 bjornw
200 * Get rid of the udword types legacy stuff
201 *
202 * Revision 1.4 2000/11/22 16:36:09 bjornw
203 * Please marketing by using the correct case when spelling Etrax.
204 *
205 * Revision 1.3 2000/11/21 16:43:04 bjornw
206 * Minor short->int change
207 *
208 * Revision 1.2 2000/11/08 14:27:57 bjornw
209 * 2.4 port
210 *
211 * Revision 1.1 2000/11/06 13:56:00 bjornw
212 * Verbatim copy of the 1.24 version of e100net.c from elinux
213 *
214 * Revision 1.24 2000/10/04 15:55:23 bjornw
215 * * Use virt_to_phys etc. for DMA addresses
216 * * Removed bogus CHECKSUM_UNNECESSARY
217 *
218 *
219 */ 8 */
220 9
221 10
@@ -244,7 +33,7 @@
244#include <linux/ethtool.h> 33#include <linux/ethtool.h>
245 34
246#include <asm/arch/svinto.h>/* DMA and register descriptions */ 35#include <asm/arch/svinto.h>/* DMA and register descriptions */
247#include <asm/io.h> /* LED_* I/O functions */ 36#include <asm/io.h> /* CRIS_LED_* I/O functions */
248#include <asm/irq.h> 37#include <asm/irq.h>
249#include <asm/dma.h> 38#include <asm/dma.h>
250#include <asm/system.h> 39#include <asm/system.h>
@@ -1899,18 +1688,18 @@ e100_set_network_leds(int active)
1899 if (!current_speed) { 1688 if (!current_speed) {
1900 /* Make LED red, link is down */ 1689 /* Make LED red, link is down */
1901#if defined(CONFIG_ETRAX_NETWORK_RED_ON_NO_CONNECTION) 1690#if defined(CONFIG_ETRAX_NETWORK_RED_ON_NO_CONNECTION)
1902 LED_NETWORK_SET(LED_RED); 1691 CRIS_LED_NETWORK_SET(CRIS_LED_RED);
1903#else 1692#else
1904 LED_NETWORK_SET(LED_OFF); 1693 CRIS_LED_NETWORK_SET(CRIS_LED_OFF);
1905#endif 1694#endif
1906 } else if (light_leds) { 1695 } else if (light_leds) {
1907 if (current_speed == 10) { 1696 if (current_speed == 10) {
1908 LED_NETWORK_SET(LED_ORANGE); 1697 CRIS_LED_NETWORK_SET(CRIS_LED_ORANGE);
1909 } else { 1698 } else {
1910 LED_NETWORK_SET(LED_GREEN); 1699 CRIS_LED_NETWORK_SET(CRIS_LED_GREEN);
1911 } 1700 }
1912 } else { 1701 } else {
1913 LED_NETWORK_SET(LED_OFF); 1702 CRIS_LED_NETWORK_SET(CRIS_LED_OFF);
1914 } 1703 }
1915} 1704}
1916 1705
diff --git a/drivers/net/mlx4/alloc.c b/drivers/net/mlx4/alloc.c
index b226e019bc8b..521dc0322ee4 100644
--- a/drivers/net/mlx4/alloc.c
+++ b/drivers/net/mlx4/alloc.c
@@ -116,40 +116,53 @@ int mlx4_buf_alloc(struct mlx4_dev *dev, int size, int max_direct,
116 buf->nbufs = 1; 116 buf->nbufs = 1;
117 buf->npages = 1; 117 buf->npages = 1;
118 buf->page_shift = get_order(size) + PAGE_SHIFT; 118 buf->page_shift = get_order(size) + PAGE_SHIFT;
119 buf->u.direct.buf = dma_alloc_coherent(&dev->pdev->dev, 119 buf->direct.buf = dma_alloc_coherent(&dev->pdev->dev,
120 size, &t, GFP_KERNEL); 120 size, &t, GFP_KERNEL);
121 if (!buf->u.direct.buf) 121 if (!buf->direct.buf)
122 return -ENOMEM; 122 return -ENOMEM;
123 123
124 buf->u.direct.map = t; 124 buf->direct.map = t;
125 125
126 while (t & ((1 << buf->page_shift) - 1)) { 126 while (t & ((1 << buf->page_shift) - 1)) {
127 --buf->page_shift; 127 --buf->page_shift;
128 buf->npages *= 2; 128 buf->npages *= 2;
129 } 129 }
130 130
131 memset(buf->u.direct.buf, 0, size); 131 memset(buf->direct.buf, 0, size);
132 } else { 132 } else {
133 int i; 133 int i;
134 134
135 buf->nbufs = (size + PAGE_SIZE - 1) / PAGE_SIZE; 135 buf->nbufs = (size + PAGE_SIZE - 1) / PAGE_SIZE;
136 buf->npages = buf->nbufs; 136 buf->npages = buf->nbufs;
137 buf->page_shift = PAGE_SHIFT; 137 buf->page_shift = PAGE_SHIFT;
138 buf->u.page_list = kzalloc(buf->nbufs * sizeof *buf->u.page_list, 138 buf->page_list = kzalloc(buf->nbufs * sizeof *buf->page_list,
139 GFP_KERNEL); 139 GFP_KERNEL);
140 if (!buf->u.page_list) 140 if (!buf->page_list)
141 return -ENOMEM; 141 return -ENOMEM;
142 142
143 for (i = 0; i < buf->nbufs; ++i) { 143 for (i = 0; i < buf->nbufs; ++i) {
144 buf->u.page_list[i].buf = 144 buf->page_list[i].buf =
145 dma_alloc_coherent(&dev->pdev->dev, PAGE_SIZE, 145 dma_alloc_coherent(&dev->pdev->dev, PAGE_SIZE,
146 &t, GFP_KERNEL); 146 &t, GFP_KERNEL);
147 if (!buf->u.page_list[i].buf) 147 if (!buf->page_list[i].buf)
148 goto err_free; 148 goto err_free;
149 149
150 buf->u.page_list[i].map = t; 150 buf->page_list[i].map = t;
151 151
152 memset(buf->u.page_list[i].buf, 0, PAGE_SIZE); 152 memset(buf->page_list[i].buf, 0, PAGE_SIZE);
153 }
154
155 if (BITS_PER_LONG == 64) {
156 struct page **pages;
157 pages = kmalloc(sizeof *pages * buf->nbufs, GFP_KERNEL);
158 if (!pages)
159 goto err_free;
160 for (i = 0; i < buf->nbufs; ++i)
161 pages[i] = virt_to_page(buf->page_list[i].buf);
162 buf->direct.buf = vmap(pages, buf->nbufs, VM_MAP, PAGE_KERNEL);
163 kfree(pages);
164 if (!buf->direct.buf)
165 goto err_free;
153 } 166 }
154 } 167 }
155 168
@@ -167,15 +180,18 @@ void mlx4_buf_free(struct mlx4_dev *dev, int size, struct mlx4_buf *buf)
167 int i; 180 int i;
168 181
169 if (buf->nbufs == 1) 182 if (buf->nbufs == 1)
170 dma_free_coherent(&dev->pdev->dev, size, buf->u.direct.buf, 183 dma_free_coherent(&dev->pdev->dev, size, buf->direct.buf,
171 buf->u.direct.map); 184 buf->direct.map);
172 else { 185 else {
186 if (BITS_PER_LONG == 64)
187 vunmap(buf->direct.buf);
188
173 for (i = 0; i < buf->nbufs; ++i) 189 for (i = 0; i < buf->nbufs; ++i)
174 if (buf->u.page_list[i].buf) 190 if (buf->page_list[i].buf)
175 dma_free_coherent(&dev->pdev->dev, PAGE_SIZE, 191 dma_free_coherent(&dev->pdev->dev, PAGE_SIZE,
176 buf->u.page_list[i].buf, 192 buf->page_list[i].buf,
177 buf->u.page_list[i].map); 193 buf->page_list[i].map);
178 kfree(buf->u.page_list); 194 kfree(buf->page_list);
179 } 195 }
180} 196}
181EXPORT_SYMBOL_GPL(mlx4_buf_free); 197EXPORT_SYMBOL_GPL(mlx4_buf_free);
diff --git a/drivers/net/mlx4/mr.c b/drivers/net/mlx4/mr.c
index 9c9e308d0917..679dfdb6807f 100644
--- a/drivers/net/mlx4/mr.c
+++ b/drivers/net/mlx4/mr.c
@@ -419,9 +419,9 @@ int mlx4_buf_write_mtt(struct mlx4_dev *dev, struct mlx4_mtt *mtt,
419 419
420 for (i = 0; i < buf->npages; ++i) 420 for (i = 0; i < buf->npages; ++i)
421 if (buf->nbufs == 1) 421 if (buf->nbufs == 1)
422 page_list[i] = buf->u.direct.map + (i << buf->page_shift); 422 page_list[i] = buf->direct.map + (i << buf->page_shift);
423 else 423 else
424 page_list[i] = buf->u.page_list[i].map; 424 page_list[i] = buf->page_list[i].map;
425 425
426 err = mlx4_write_mtt(dev, mtt, 0, buf->npages, page_list); 426 err = mlx4_write_mtt(dev, mtt, 0, buf->npages, page_list);
427 427
diff --git a/drivers/net/smc91x.h b/drivers/net/smc91x.h
index 271c28dc9baa..51d4134b37b1 100644
--- a/drivers/net/smc91x.h
+++ b/drivers/net/smc91x.h
@@ -450,8 +450,20 @@ static inline void LPD7_SMC_outsw (unsigned char* a, int r,
450#define SMC_outsl(a, r, p, l) writesl((a) + (r), p, l) 450#define SMC_outsl(a, r, p, l) writesl((a) + (r), p, l)
451#define SMC_IRQ_FLAGS (-1) /* from resource */ 451#define SMC_IRQ_FLAGS (-1) /* from resource */
452 452
453#elif defined(CONFIG_MN10300)
454
455/*
456 * MN10300/AM33 configuration
457 */
458
459#include <asm/unit/smc91111.h>
460
453#else 461#else
454 462
463/*
464 * Default configuration
465 */
466
455#define SMC_CAN_USE_8BIT 1 467#define SMC_CAN_USE_8BIT 1
456#define SMC_CAN_USE_16BIT 1 468#define SMC_CAN_USE_16BIT 1
457#define SMC_CAN_USE_32BIT 1 469#define SMC_CAN_USE_32BIT 1
diff --git a/drivers/net/wan/x25_asy.c b/drivers/net/wan/x25_asy.c
index 1e89d4de1bb7..5e2d763c6b5f 100644
--- a/drivers/net/wan/x25_asy.c
+++ b/drivers/net/wan/x25_asy.c
@@ -554,6 +554,7 @@ static void x25_asy_receive_buf(struct tty_struct *tty, const unsigned char *cp,
554static int x25_asy_open_tty(struct tty_struct *tty) 554static int x25_asy_open_tty(struct tty_struct *tty)
555{ 555{
556 struct x25_asy *sl = (struct x25_asy *) tty->disc_data; 556 struct x25_asy *sl = (struct x25_asy *) tty->disc_data;
557 struct tty_ldisc *ld;
557 int err; 558 int err;
558 559
559 /* First make sure we're not already connected. */ 560 /* First make sure we're not already connected. */
@@ -572,9 +573,7 @@ static int x25_asy_open_tty(struct tty_struct *tty)
572 if (tty->driver->flush_buffer) { 573 if (tty->driver->flush_buffer) {
573 tty->driver->flush_buffer(tty); 574 tty->driver->flush_buffer(tty);
574 } 575 }
575 if (tty->ldisc.flush_buffer) { 576 tty_ldisc_flush(tty);
576 tty->ldisc.flush_buffer(tty);
577 }
578 577
579 /* Restore default settings */ 578 /* Restore default settings */
580 sl->dev->type = ARPHRD_X25; 579 sl->dev->type = ARPHRD_X25;
diff --git a/drivers/parport/Kconfig b/drivers/parport/Kconfig
index d449b150930e..b7bcdcc5c724 100644
--- a/drivers/parport/Kconfig
+++ b/drivers/parport/Kconfig
@@ -35,7 +35,8 @@ if PARPORT
35 35
36config PARPORT_PC 36config PARPORT_PC
37 tristate "PC-style hardware" 37 tristate "PC-style hardware"
38 depends on (!SPARC64 || PCI) && !SPARC32 && !M32R && !FRV && (!M68K || ISA) 38 depends on (!SPARC64 || PCI) && !SPARC32 && !M32R && !FRV && \
39 (!M68K || ISA) && !MN10300
39 ---help--- 40 ---help---
40 You should say Y here if you have a PC-style parallel port. All 41 You should say Y here if you have a PC-style parallel port. All
41 IBM PC compatible computers and some Alphas have PC-style 42 IBM PC compatible computers and some Alphas have PC-style
diff --git a/drivers/parport/ieee1284_ops.c b/drivers/parport/ieee1284_ops.c
index 525312f2fe9c..2e21af43d91e 100644
--- a/drivers/parport/ieee1284_ops.c
+++ b/drivers/parport/ieee1284_ops.c
@@ -888,7 +888,7 @@ size_t parport_ieee1284_epp_read_addr (struct parport *port,
888 888
889 /* Event 59: set nSelectIn (nAStrb) high */ 889 /* Event 59: set nSelectIn (nAStrb) high */
890 parport_frob_control (port, PARPORT_CONTROL_SELECT, 890 parport_frob_control (port, PARPORT_CONTROL_SELECT,
891 PARPORT_CONTROL_SELECT); 891 0);
892 892
893 /* Event 60: wait for Busy to go low */ 893 /* Event 60: wait for Busy to go low */
894 if (parport_poll_peripheral (port, PARPORT_STATUS_BUSY, 894 if (parport_poll_peripheral (port, PARPORT_STATUS_BUSY,
diff --git a/drivers/pci/Makefile b/drivers/pci/Makefile
index 9f04d17576d6..4d1ce2e7361e 100644
--- a/drivers/pci/Makefile
+++ b/drivers/pci/Makefile
@@ -38,6 +38,7 @@ obj-$(CONFIG_PPC32) += setup-irq.o
38obj-$(CONFIG_PPC) += setup-bus.o 38obj-$(CONFIG_PPC) += setup-bus.o
39obj-$(CONFIG_MIPS) += setup-bus.o setup-irq.o 39obj-$(CONFIG_MIPS) += setup-bus.o setup-irq.o
40obj-$(CONFIG_X86_VISWS) += setup-irq.o 40obj-$(CONFIG_X86_VISWS) += setup-irq.o
41obj-$(CONFIG_MN10300) += setup-bus.o
41 42
42# 43#
43# ACPI Related PCI FW Functions 44# ACPI Related PCI FW Functions
diff --git a/drivers/pci/intel-iommu.c b/drivers/pci/intel-iommu.c
index 31fa6c92aa5e..a4c3089f892a 100644
--- a/drivers/pci/intel-iommu.c
+++ b/drivers/pci/intel-iommu.c
@@ -692,6 +692,23 @@ static int iommu_flush_iotlb_psi(struct intel_iommu *iommu, u16 did,
692 DMA_TLB_PSI_FLUSH, non_present_entry_flush); 692 DMA_TLB_PSI_FLUSH, non_present_entry_flush);
693} 693}
694 694
695static void iommu_disable_protect_mem_regions(struct intel_iommu *iommu)
696{
697 u32 pmen;
698 unsigned long flags;
699
700 spin_lock_irqsave(&iommu->register_lock, flags);
701 pmen = readl(iommu->reg + DMAR_PMEN_REG);
702 pmen &= ~DMA_PMEN_EPM;
703 writel(pmen, iommu->reg + DMAR_PMEN_REG);
704
705 /* wait for the protected region status bit to clear */
706 IOMMU_WAIT_OP(iommu, DMAR_PMEN_REG,
707 readl, !(pmen & DMA_PMEN_PRS), pmen);
708
709 spin_unlock_irqrestore(&iommu->register_lock, flags);
710}
711
695static int iommu_enable_translation(struct intel_iommu *iommu) 712static int iommu_enable_translation(struct intel_iommu *iommu)
696{ 713{
697 u32 sts; 714 u32 sts;
@@ -728,7 +745,7 @@ static int iommu_disable_translation(struct intel_iommu *iommu)
728 745
729/* iommu interrupt handling. Most stuff are MSI-like. */ 746/* iommu interrupt handling. Most stuff are MSI-like. */
730 747
731static char *fault_reason_strings[] = 748static const char *fault_reason_strings[] =
732{ 749{
733 "Software", 750 "Software",
734 "Present bit in root entry is clear", 751 "Present bit in root entry is clear",
@@ -743,14 +760,13 @@ static char *fault_reason_strings[] =
743 "non-zero reserved fields in RTP", 760 "non-zero reserved fields in RTP",
744 "non-zero reserved fields in CTP", 761 "non-zero reserved fields in CTP",
745 "non-zero reserved fields in PTE", 762 "non-zero reserved fields in PTE",
746 "Unknown"
747}; 763};
748#define MAX_FAULT_REASON_IDX ARRAY_SIZE(fault_reason_strings) - 1 764#define MAX_FAULT_REASON_IDX (ARRAY_SIZE(fault_reason_strings) - 1)
749 765
750char *dmar_get_fault_reason(u8 fault_reason) 766const char *dmar_get_fault_reason(u8 fault_reason)
751{ 767{
752 if (fault_reason >= MAX_FAULT_REASON_IDX) 768 if (fault_reason > MAX_FAULT_REASON_IDX)
753 return fault_reason_strings[MAX_FAULT_REASON_IDX - 1]; 769 return "Unknown";
754 else 770 else
755 return fault_reason_strings[fault_reason]; 771 return fault_reason_strings[fault_reason];
756} 772}
@@ -808,7 +824,7 @@ void dmar_msi_read(int irq, struct msi_msg *msg)
808static int iommu_page_fault_do_one(struct intel_iommu *iommu, int type, 824static int iommu_page_fault_do_one(struct intel_iommu *iommu, int type,
809 u8 fault_reason, u16 source_id, u64 addr) 825 u8 fault_reason, u16 source_id, u64 addr)
810{ 826{
811 char *reason; 827 const char *reason;
812 828
813 reason = dmar_get_fault_reason(fault_reason); 829 reason = dmar_get_fault_reason(fault_reason);
814 830
@@ -1730,6 +1746,8 @@ int __init init_dmars(void)
1730 iommu_flush_context_global(iommu, 0); 1746 iommu_flush_context_global(iommu, 0);
1731 iommu_flush_iotlb_global(iommu, 0); 1747 iommu_flush_iotlb_global(iommu, 0);
1732 1748
1749 iommu_disable_protect_mem_regions(iommu);
1750
1733 ret = iommu_enable_translation(iommu); 1751 ret = iommu_enable_translation(iommu);
1734 if (ret) 1752 if (ret)
1735 goto error; 1753 goto error;
diff --git a/drivers/pci/intel-iommu.h b/drivers/pci/intel-iommu.h
index 0e4862675ad2..07f5f6353bda 100644
--- a/drivers/pci/intel-iommu.h
+++ b/drivers/pci/intel-iommu.h
@@ -140,6 +140,10 @@ static inline void dmar_writeq(void __iomem *addr, u64 val)
140#define DMA_TLB_IH_NONLEAF (((u64)1) << 6) 140#define DMA_TLB_IH_NONLEAF (((u64)1) << 6)
141#define DMA_TLB_MAX_SIZE (0x3f) 141#define DMA_TLB_MAX_SIZE (0x3f)
142 142
143/* PMEN_REG */
144#define DMA_PMEN_EPM (((u32)1)<<31)
145#define DMA_PMEN_PRS (((u32)1)<<0)
146
143/* GCMD_REG */ 147/* GCMD_REG */
144#define DMA_GCMD_TE (((u32)1) << 31) 148#define DMA_GCMD_TE (((u32)1) << 31)
145#define DMA_GCMD_SRTP (((u32)1) << 30) 149#define DMA_GCMD_SRTP (((u32)1) << 30)
diff --git a/drivers/serial/8250.c b/drivers/serial/8250.c
index b8a4bd94f51d..77f7a7f0646e 100644
--- a/drivers/serial/8250.c
+++ b/drivers/serial/8250.c
@@ -305,7 +305,7 @@ static inline int map_8250_out_reg(struct uart_8250_port *up, int offset)
305 return au_io_out_map[offset]; 305 return au_io_out_map[offset];
306} 306}
307 307
308#elif defined (CONFIG_SERIAL_8250_RM9K) 308#elif defined(CONFIG_SERIAL_8250_RM9K)
309 309
310static const u8 310static const u8
311 regmap_in[8] = { 311 regmap_in[8] = {
@@ -475,7 +475,7 @@ static inline void _serial_dl_write(struct uart_8250_port *up, int value)
475 serial_outp(up, UART_DLM, value >> 8 & 0xff); 475 serial_outp(up, UART_DLM, value >> 8 & 0xff);
476} 476}
477 477
478#if defined (CONFIG_SERIAL_8250_AU1X00) 478#if defined(CONFIG_SERIAL_8250_AU1X00)
479/* Au1x00 haven't got a standard divisor latch */ 479/* Au1x00 haven't got a standard divisor latch */
480static int serial_dl_read(struct uart_8250_port *up) 480static int serial_dl_read(struct uart_8250_port *up)
481{ 481{
@@ -492,7 +492,7 @@ static void serial_dl_write(struct uart_8250_port *up, int value)
492 else 492 else
493 _serial_dl_write(up, value); 493 _serial_dl_write(up, value);
494} 494}
495#elif defined (CONFIG_SERIAL_8250_RM9K) 495#elif defined(CONFIG_SERIAL_8250_RM9K)
496static int serial_dl_read(struct uart_8250_port *up) 496static int serial_dl_read(struct uart_8250_port *up)
497{ 497{
498 return (up->port.iotype == UPIO_RM9000) ? 498 return (up->port.iotype == UPIO_RM9000) ?
@@ -1185,8 +1185,8 @@ static void autoconfig_irq(struct uart_8250_port *up)
1185 1185
1186 irqs = probe_irq_on(); 1186 irqs = probe_irq_on();
1187 serial_outp(up, UART_MCR, 0); 1187 serial_outp(up, UART_MCR, 0);
1188 udelay (10); 1188 udelay(10);
1189 if (up->port.flags & UPF_FOURPORT) { 1189 if (up->port.flags & UPF_FOURPORT) {
1190 serial_outp(up, UART_MCR, 1190 serial_outp(up, UART_MCR,
1191 UART_MCR_DTR | UART_MCR_RTS); 1191 UART_MCR_DTR | UART_MCR_RTS);
1192 } else { 1192 } else {
@@ -1199,7 +1199,7 @@ static void autoconfig_irq(struct uart_8250_port *up)
1199 (void)serial_inp(up, UART_IIR); 1199 (void)serial_inp(up, UART_IIR);
1200 (void)serial_inp(up, UART_MSR); 1200 (void)serial_inp(up, UART_MSR);
1201 serial_outp(up, UART_TX, 0xFF); 1201 serial_outp(up, UART_TX, 0xFF);
1202 udelay (20); 1202 udelay(20);
1203 irq = probe_irq_off(irqs); 1203 irq = probe_irq_off(irqs);
1204 1204
1205 serial_outp(up, UART_MCR, save_mcr); 1205 serial_outp(up, UART_MCR, save_mcr);
@@ -1343,7 +1343,7 @@ receive_chars(struct uart_8250_port *up, unsigned int *status)
1343 1343
1344 uart_insert_char(&up->port, lsr, UART_LSR_OE, ch, flag); 1344 uart_insert_char(&up->port, lsr, UART_LSR_OE, ch, flag);
1345 1345
1346 ignore_char: 1346ignore_char:
1347 lsr = serial_inp(up, UART_LSR); 1347 lsr = serial_inp(up, UART_LSR);
1348 } while ((lsr & UART_LSR_DR) && (max_count-- > 0)); 1348 } while ((lsr & UART_LSR_DR) && (max_count-- > 0));
1349 spin_unlock(&up->port.lock); 1349 spin_unlock(&up->port.lock);
@@ -1633,7 +1633,8 @@ static void serial8250_backup_timeout(unsigned long data)
1633 serial_out(up, UART_IER, ier); 1633 serial_out(up, UART_IER, ier);
1634 1634
1635 /* Standard timer interval plus 0.2s to keep the port running */ 1635 /* Standard timer interval plus 0.2s to keep the port running */
1636 mod_timer(&up->timer, jiffies + poll_timeout(up->port.timeout) + HZ/5); 1636 mod_timer(&up->timer,
1637 jiffies + poll_timeout(up->port.timeout) + HZ / 5);
1637} 1638}
1638 1639
1639static unsigned int serial8250_tx_empty(struct uart_port *port) 1640static unsigned int serial8250_tx_empty(struct uart_port *port)
@@ -1844,7 +1845,7 @@ static int serial8250_startup(struct uart_port *port)
1844 up->timer.function = serial8250_backup_timeout; 1845 up->timer.function = serial8250_backup_timeout;
1845 up->timer.data = (unsigned long)up; 1846 up->timer.data = (unsigned long)up;
1846 mod_timer(&up->timer, jiffies + 1847 mod_timer(&up->timer, jiffies +
1847 poll_timeout(up->port.timeout) + HZ/5); 1848 poll_timeout(up->port.timeout) + HZ / 5);
1848 } 1849 }
1849 } 1850 }
1850 1851
@@ -2173,6 +2174,7 @@ serial8250_set_termios(struct uart_port *port, struct ktermios *termios,
2173 } 2174 }
2174 serial8250_set_mctrl(&up->port, up->port.mctrl); 2175 serial8250_set_mctrl(&up->port, up->port.mctrl);
2175 spin_unlock_irqrestore(&up->port.lock, flags); 2176 spin_unlock_irqrestore(&up->port.lock, flags);
2177 tty_termios_encode_baud_rate(termios, baud, baud);
2176} 2178}
2177 2179
2178static void 2180static void
diff --git a/drivers/serial/8250_early.c b/drivers/serial/8250_early.c
index 1f16de719962..38776e8b064b 100644
--- a/drivers/serial/8250_early.c
+++ b/drivers/serial/8250_early.c
@@ -82,7 +82,8 @@ static void __init serial_putc(struct uart_port *port, int c)
82 serial_out(port, UART_TX, c); 82 serial_out(port, UART_TX, c);
83} 83}
84 84
85static void __init early_serial8250_write(struct console *console, const char *s, unsigned int count) 85static void __init early_serial8250_write(struct console *console,
86 const char *s, unsigned int count)
86{ 87{
87 struct uart_port *port = &early_device.port; 88 struct uart_port *port = &early_device.port;
88 unsigned int ier; 89 unsigned int ier;
@@ -132,7 +133,8 @@ static void __init init_port(struct early_serial8250_device *device)
132 serial_out(port, UART_LCR, c & ~UART_LCR_DLAB); 133 serial_out(port, UART_LCR, c & ~UART_LCR_DLAB);
133} 134}
134 135
135static int __init parse_options(struct early_serial8250_device *device, char *options) 136static int __init parse_options(struct early_serial8250_device *device,
137 char *options)
136{ 138{
137 struct uart_port *port = &device->port; 139 struct uart_port *port = &device->port;
138 int mmio, length; 140 int mmio, length;
@@ -145,8 +147,10 @@ static int __init parse_options(struct early_serial8250_device *device, char *op
145 port->iotype = UPIO_MEM; 147 port->iotype = UPIO_MEM;
146 port->mapbase = simple_strtoul(options + 5, &options, 0); 148 port->mapbase = simple_strtoul(options + 5, &options, 0);
147#ifdef CONFIG_FIX_EARLYCON_MEM 149#ifdef CONFIG_FIX_EARLYCON_MEM
148 set_fixmap_nocache(FIX_EARLYCON_MEM_BASE, port->mapbase & PAGE_MASK); 150 set_fixmap_nocache(FIX_EARLYCON_MEM_BASE,
149 port->membase = (void __iomem *)__fix_to_virt(FIX_EARLYCON_MEM_BASE); 151 port->mapbase & PAGE_MASK);
152 port->membase =
153 (void __iomem *)__fix_to_virt(FIX_EARLYCON_MEM_BASE);
150 port->membase += port->mapbase & ~PAGE_MASK; 154 port->membase += port->mapbase & ~PAGE_MASK;
151#else 155#else
152 port->membase = ioremap(port->mapbase, 64); 156 port->membase = ioremap(port->mapbase, 64);
@@ -165,7 +169,8 @@ static int __init parse_options(struct early_serial8250_device *device, char *op
165 } else 169 } else
166 return -EINVAL; 170 return -EINVAL;
167 171
168 if ((options = strchr(options, ','))) { 172 options = strchr(options, ',');
173 if (options) {
169 options++; 174 options++;
170 device->baud = simple_strtoul(options, NULL, 0); 175 device->baud = simple_strtoul(options, NULL, 0);
171 length = min(strcspn(options, " "), sizeof(device->options)); 176 length = min(strcspn(options, " "), sizeof(device->options));
@@ -179,7 +184,7 @@ static int __init parse_options(struct early_serial8250_device *device, char *op
179 printk(KERN_INFO "Early serial console at %s 0x%llx (options '%s')\n", 184 printk(KERN_INFO "Early serial console at %s 0x%llx (options '%s')\n",
180 mmio ? "MMIO" : "I/O port", 185 mmio ? "MMIO" : "I/O port",
181 mmio ? (unsigned long long) port->mapbase 186 mmio ? (unsigned long long) port->mapbase
182 : (unsigned long long) port->iobase, 187 : (unsigned long long) port->iobase,
183 device->options); 188 device->options);
184 return 0; 189 return 0;
185} 190}
@@ -199,7 +204,8 @@ static int __init early_serial8250_setup(char *options)
199 if (device->port.membase || device->port.iobase) 204 if (device->port.membase || device->port.iobase)
200 return 0; 205 return 0;
201 206
202 if ((err = parse_options(device, options)) < 0) 207 err = parse_options(device, options);
208 if (err < 0)
203 return err; 209 return err;
204 210
205 init_port(device); 211 init_port(device);
@@ -219,7 +225,8 @@ int __init setup_early_serial8250_console(char *cmdline)
219 } 225 }
220 226
221 options = strchr(cmdline, ',') + 1; 227 options = strchr(cmdline, ',') + 1;
222 if ((err = early_serial8250_setup(options)) < 0) 228 err = early_serial8250_setup(options);
229 if (err < 0)
223 return err; 230 return err;
224 231
225 register_console(&early_serial8250_console); 232 register_console(&early_serial8250_console);
diff --git a/drivers/serial/8250_gsc.c b/drivers/serial/8250_gsc.c
index c5d0addfda4f..4eb7437a404a 100644
--- a/drivers/serial/8250_gsc.c
+++ b/drivers/serial/8250_gsc.c
@@ -25,8 +25,7 @@
25 25
26#include "8250.h" 26#include "8250.h"
27 27
28static int __init 28static int __init serial_init_chip(struct parisc_device *dev)
29serial_init_chip(struct parisc_device *dev)
30{ 29{
31 struct uart_port port; 30 struct uart_port port;
32 unsigned long address; 31 unsigned long address;
@@ -38,18 +37,17 @@ serial_init_chip(struct parisc_device *dev)
38 * what we have here is a missing parent device, so tell 37 * what we have here is a missing parent device, so tell
39 * the user what they're missing. 38 * the user what they're missing.
40 */ 39 */
41 if (parisc_parent(dev)->id.hw_type != HPHW_IOA) { 40 if (parisc_parent(dev)->id.hw_type != HPHW_IOA)
42 printk(KERN_INFO "Serial: device 0x%lx not configured.\n" 41 printk(KERN_INFO
42 "Serial: device 0x%lx not configured.\n"
43 "Enable support for Wax, Lasi, Asp or Dino.\n", 43 "Enable support for Wax, Lasi, Asp or Dino.\n",
44 dev->hpa.start); 44 dev->hpa.start);
45 }
46 return -ENODEV; 45 return -ENODEV;
47 } 46 }
48 47
49 address = dev->hpa.start; 48 address = dev->hpa.start;
50 if (dev->id.sversion != 0x8d) { 49 if (dev->id.sversion != 0x8d)
51 address += 0x800; 50 address += 0x800;
52 }
53 51
54 memset(&port, 0, sizeof(port)); 52 memset(&port, 0, sizeof(port));
55 port.iotype = UPIO_MEM; 53 port.iotype = UPIO_MEM;
@@ -63,11 +61,12 @@ serial_init_chip(struct parisc_device *dev)
63 61
64 err = serial8250_register_port(&port); 62 err = serial8250_register_port(&port);
65 if (err < 0) { 63 if (err < 0) {
66 printk(KERN_WARNING "serial8250_register_port returned error %d\n", err); 64 printk(KERN_WARNING
65 "serial8250_register_port returned error %d\n", err);
67 iounmap(port.membase); 66 iounmap(port.membase);
68 return err; 67 return err;
69 } 68 }
70 69
71 return 0; 70 return 0;
72} 71}
73 72
diff --git a/drivers/serial/8250_hp300.c b/drivers/serial/8250_hp300.c
index 2cf0953fe0ec..0e1410f2c033 100644
--- a/drivers/serial/8250_hp300.c
+++ b/drivers/serial/8250_hp300.c
@@ -36,7 +36,7 @@ static struct hp300_port *hp300_ports;
36#ifdef CONFIG_HPDCA 36#ifdef CONFIG_HPDCA
37 37
38static int __devinit hpdca_init_one(struct dio_dev *d, 38static int __devinit hpdca_init_one(struct dio_dev *d,
39 const struct dio_device_id *ent); 39 const struct dio_device_id *ent);
40static void __devexit hpdca_remove_one(struct dio_dev *d); 40static void __devexit hpdca_remove_one(struct dio_dev *d);
41 41
42static struct dio_device_id hpdca_dio_tbl[] = { 42static struct dio_device_id hpdca_dio_tbl[] = {
@@ -85,7 +85,7 @@ extern int hp300_uart_scode;
85 85
86#ifdef CONFIG_SERIAL_8250_CONSOLE 86#ifdef CONFIG_SERIAL_8250_CONSOLE
87/* 87/*
88 * Parse the bootinfo to find descriptions for headless console and 88 * Parse the bootinfo to find descriptions for headless console and
89 * debug serial ports and register them with the 8250 driver. 89 * debug serial ports and register them with the 8250 driver.
90 * This function should be called before serial_console_init() is called 90 * This function should be called before serial_console_init() is called
91 * to make sure the serial console will be available for use. IA-64 kernel 91 * to make sure the serial console will be available for use. IA-64 kernel
@@ -126,13 +126,11 @@ int __init hp300_setup_serial_console(void)
126 printk(KERN_WARNING "Serial console is APCI but support is disabled (CONFIG_HPAPCI)!\n"); 126 printk(KERN_WARNING "Serial console is APCI but support is disabled (CONFIG_HPAPCI)!\n");
127 return 0; 127 return 0;
128#endif 128#endif
129 } 129 } else {
130 else {
131#ifdef CONFIG_HPDCA 130#ifdef CONFIG_HPDCA
132 unsigned long pa = dio_scodetophysaddr(scode); 131 unsigned long pa = dio_scodetophysaddr(scode);
133 if (!pa) { 132 if (!pa)
134 return 0; 133 return 0;
135 }
136 134
137 printk(KERN_INFO "Serial console is HP DCA at select code %d\n", scode); 135 printk(KERN_INFO "Serial console is HP DCA at select code %d\n", scode);
138 136
@@ -145,26 +143,23 @@ int __init hp300_setup_serial_console(void)
145 /* Enable board-interrupts */ 143 /* Enable board-interrupts */
146 out_8(pa + DIO_VIRADDRBASE + DCA_IC, DCA_IC_IE); 144 out_8(pa + DIO_VIRADDRBASE + DCA_IC, DCA_IC_IE);
147 145
148 if (DIO_ID(pa + DIO_VIRADDRBASE) & 0x80) { 146 if (DIO_ID(pa + DIO_VIRADDRBASE) & 0x80)
149 add_preferred_console("ttyS", port.line, "9600n8"); 147 add_preferred_console("ttyS", port.line, "9600n8");
150 }
151#else 148#else
152 printk(KERN_WARNING "Serial console is DCA but support is disabled (CONFIG_HPDCA)!\n"); 149 printk(KERN_WARNING "Serial console is DCA but support is disabled (CONFIG_HPDCA)!\n");
153 return 0; 150 return 0;
154#endif 151#endif
155 } 152 }
156 153
157 if (early_serial_setup(&port) < 0) { 154 if (early_serial_setup(&port) < 0)
158 printk(KERN_WARNING "hp300_setup_serial_console(): early_serial_setup() failed.\n"); 155 printk(KERN_WARNING "hp300_setup_serial_console(): early_serial_setup() failed.\n");
159 }
160
161 return 0; 156 return 0;
162} 157}
163#endif /* CONFIG_SERIAL_8250_CONSOLE */ 158#endif /* CONFIG_SERIAL_8250_CONSOLE */
164 159
165#ifdef CONFIG_HPDCA 160#ifdef CONFIG_HPDCA
166static int __devinit hpdca_init_one(struct dio_dev *d, 161static int __devinit hpdca_init_one(struct dio_dev *d,
167 const struct dio_device_id *ent) 162 const struct dio_device_id *ent)
168{ 163{
169 struct uart_port port; 164 struct uart_port port;
170 int line; 165 int line;
@@ -210,7 +205,7 @@ static int __devinit hpdca_init_one(struct dio_dev *d,
210 205
211static int __init hp300_8250_init(void) 206static int __init hp300_8250_init(void)
212{ 207{
213 static int called = 0; 208 static int called;
214#ifdef CONFIG_HPAPCI 209#ifdef CONFIG_HPAPCI
215 int line; 210 int line;
216 unsigned long base; 211 unsigned long base;
@@ -239,13 +234,12 @@ static int __init hp300_8250_init(void)
239 * Port 1 is either the console or the DCA. 234 * Port 1 is either the console or the DCA.
240 */ 235 */
241 for (i = 1; i < 4; i++) { 236 for (i = 1; i < 4; i++) {
242 /* Port 1 is the console on a 425e, on other machines it's mapped to 237 /* Port 1 is the console on a 425e, on other machines it's
243 * DCA. 238 * mapped to DCA.
244 */ 239 */
245#ifdef CONFIG_SERIAL_8250_CONSOLE 240#ifdef CONFIG_SERIAL_8250_CONSOLE
246 if (i == 1) { 241 if (i == 1)
247 continue; 242 continue;
248 }
249#endif 243#endif
250 244
251 /* Create new serial device */ 245 /* Create new serial device */
@@ -259,7 +253,8 @@ static int __init hp300_8250_init(void)
259 253
260 /* Memory mapped I/O */ 254 /* Memory mapped I/O */
261 uport.iotype = UPIO_MEM; 255 uport.iotype = UPIO_MEM;
262 uport.flags = UPF_SKIP_TEST | UPF_SHARE_IRQ | UPF_BOOT_AUTOCONF; 256 uport.flags = UPF_SKIP_TEST | UPF_SHARE_IRQ \
257 | UPF_BOOT_AUTOCONF;
263 /* XXX - no interrupt support yet */ 258 /* XXX - no interrupt support yet */
264 uport.irq = 0; 259 uport.irq = 0;
265 uport.uartclk = HPAPCI_BAUD_BASE * 16; 260 uport.uartclk = HPAPCI_BAUD_BASE * 16;
@@ -270,8 +265,8 @@ static int __init hp300_8250_init(void)
270 line = serial8250_register_port(&uport); 265 line = serial8250_register_port(&uport);
271 266
272 if (line < 0) { 267 if (line < 0) {
273 printk(KERN_NOTICE "8250_hp300: register_serial() APCI %d" 268 printk(KERN_NOTICE "8250_hp300: register_serial() APCI"
274 " irq %d failed\n", i, uport.irq); 269 " %d irq %d failed\n", i, uport.irq);
275 kfree(port); 270 kfree(port);
276 continue; 271 continue;
277 } 272 }
diff --git a/drivers/serial/8250_hub6.c b/drivers/serial/8250_hub6.c
index daf569cd3c8f..7609150e7d5e 100644
--- a/drivers/serial/8250_hub6.c
+++ b/drivers/serial/8250_hub6.c
@@ -23,18 +23,18 @@
23 } 23 }
24 24
25static struct plat_serial8250_port hub6_data[] = { 25static struct plat_serial8250_port hub6_data[] = {
26 HUB6(0,0), 26 HUB6(0, 0),
27 HUB6(0,1), 27 HUB6(0, 1),
28 HUB6(0,2), 28 HUB6(0, 2),
29 HUB6(0,3), 29 HUB6(0, 3),
30 HUB6(0,4), 30 HUB6(0, 4),
31 HUB6(0,5), 31 HUB6(0, 5),
32 HUB6(1,0), 32 HUB6(1, 0),
33 HUB6(1,1), 33 HUB6(1, 1),
34 HUB6(1,2), 34 HUB6(1, 2),
35 HUB6(1,3), 35 HUB6(1, 3),
36 HUB6(1,4), 36 HUB6(1, 4),
37 HUB6(1,5), 37 HUB6(1, 5),
38 { }, 38 { },
39}; 39};
40 40
diff --git a/drivers/serial/8250_pci.c b/drivers/serial/8250_pci.c
index 0a4ac2b6eb5a..a8bec498cad6 100644
--- a/drivers/serial/8250_pci.c
+++ b/drivers/serial/8250_pci.c
@@ -140,7 +140,7 @@ afavlab_setup(struct serial_private *priv, struct pciserial_board *board,
140 struct uart_port *port, int idx) 140 struct uart_port *port, int idx)
141{ 141{
142 unsigned int bar, offset = board->first_offset; 142 unsigned int bar, offset = board->first_offset;
143 143
144 bar = FL_GET_BASE(board->flags); 144 bar = FL_GET_BASE(board->flags);
145 if (idx < 4) 145 if (idx < 4)
146 bar += idx; 146 bar += idx;
@@ -227,8 +227,8 @@ static int pci_inteli960ni_init(struct pci_dev *dev)
227 return -ENODEV; 227 return -ENODEV;
228 228
229 /* is firmware started? */ 229 /* is firmware started? */
230 pci_read_config_dword(dev, 0x44, (void*) &oldval); 230 pci_read_config_dword(dev, 0x44, (void *)&oldval);
231 if (oldval == 0x00001000L) { /* RESET value */ 231 if (oldval == 0x00001000L) { /* RESET value */
232 printk(KERN_DEBUG "Local i960 firmware missing"); 232 printk(KERN_DEBUG "Local i960 firmware missing");
233 return -ENODEV; 233 return -ENODEV;
234 } 234 }
@@ -253,11 +253,11 @@ static int pci_plx9050_init(struct pci_dev *dev)
253 253
254 irq_config = 0x41; 254 irq_config = 0x41;
255 if (dev->vendor == PCI_VENDOR_ID_PANACOM || 255 if (dev->vendor == PCI_VENDOR_ID_PANACOM ||
256 dev->subsystem_vendor == PCI_SUBVENDOR_ID_EXSYS) { 256 dev->subsystem_vendor == PCI_SUBVENDOR_ID_EXSYS)
257 irq_config = 0x43; 257 irq_config = 0x43;
258 } 258
259 if ((dev->vendor == PCI_VENDOR_ID_PLX) && 259 if ((dev->vendor == PCI_VENDOR_ID_PLX) &&
260 (dev->device == PCI_DEVICE_ID_PLX_ROMULUS)) { 260 (dev->device == PCI_DEVICE_ID_PLX_ROMULUS))
261 /* 261 /*
262 * As the megawolf cards have the int pins active 262 * As the megawolf cards have the int pins active
263 * high, and have 2 UART chips, both ints must be 263 * high, and have 2 UART chips, both ints must be
@@ -267,8 +267,6 @@ static int pci_plx9050_init(struct pci_dev *dev)
267 * deep FIFOs 267 * deep FIFOs
268 */ 268 */
269 irq_config = 0x5b; 269 irq_config = 0x5b;
270 }
271
272 /* 270 /*
273 * enable/disable interrupts 271 * enable/disable interrupts
274 */ 272 */
@@ -343,14 +341,14 @@ static int sbs_init(struct pci_dev *dev)
343{ 341{
344 u8 __iomem *p; 342 u8 __iomem *p;
345 343
346 p = ioremap(pci_resource_start(dev, 0),pci_resource_len(dev,0)); 344 p = ioremap(pci_resource_start(dev, 0), pci_resource_len(dev, 0));
347 345
348 if (p == NULL) 346 if (p == NULL)
349 return -ENOMEM; 347 return -ENOMEM;
350 /* Set bit-4 Control Register (UART RESET) in to reset the uarts */ 348 /* Set bit-4 Control Register (UART RESET) in to reset the uarts */
351 writeb(0x10,p + OCT_REG_CR_OFF); 349 writeb(0x10, p + OCT_REG_CR_OFF);
352 udelay(50); 350 udelay(50);
353 writeb(0x0,p + OCT_REG_CR_OFF); 351 writeb(0x0, p + OCT_REG_CR_OFF);
354 352
355 /* Set bit-2 (INTENABLE) of Control Register */ 353 /* Set bit-2 (INTENABLE) of Control Register */
356 writeb(0x4, p + OCT_REG_CR_OFF); 354 writeb(0x4, p + OCT_REG_CR_OFF);
@@ -367,10 +365,10 @@ static void __devexit sbs_exit(struct pci_dev *dev)
367{ 365{
368 u8 __iomem *p; 366 u8 __iomem *p;
369 367
370 p = ioremap(pci_resource_start(dev, 0),pci_resource_len(dev,0)); 368 p = ioremap(pci_resource_start(dev, 0), pci_resource_len(dev, 0));
371 if (p != NULL) { 369 /* FIXME: What if resource_len < OCT_REG_CR_OFF */
370 if (p != NULL)
372 writeb(0, p + OCT_REG_CR_OFF); 371 writeb(0, p + OCT_REG_CR_OFF);
373 }
374 iounmap(p); 372 iounmap(p);
375} 373}
376 374
@@ -386,7 +384,7 @@ static void __devexit sbs_exit(struct pci_dev *dev)
386 * with other OSes (like M$ DOS). 384 * with other OSes (like M$ DOS).
387 * 385 *
388 * SIIG support added by Andrey Panin <pazke@donpac.ru>, 10/1999 386 * SIIG support added by Andrey Panin <pazke@donpac.ru>, 10/1999
389 * 387 *
390 * There is two family of SIIG serial cards with different PCI 388 * There is two family of SIIG serial cards with different PCI
391 * interface chip and different configuration methods: 389 * interface chip and different configuration methods:
392 * - 10x cards have control registers in IO and/or memory space; 390 * - 10x cards have control registers in IO and/or memory space;
@@ -489,21 +487,21 @@ static const unsigned short timedia_single_port[] = {
489 487
490static const unsigned short timedia_dual_port[] = { 488static const unsigned short timedia_dual_port[] = {
491 0x0002, 0x4036, 0x4037, 0x4038, 0x4078, 0x4079, 0x4085, 489 0x0002, 0x4036, 0x4037, 0x4038, 0x4078, 0x4079, 0x4085,
492 0x4088, 0x4089, 0x5037, 0x5078, 0x5079, 0x5085, 0x6079, 490 0x4088, 0x4089, 0x5037, 0x5078, 0x5079, 0x5085, 0x6079,
493 0x7079, 0x8079, 0x8137, 0x8138, 0x8237, 0x8238, 0x9079, 491 0x7079, 0x8079, 0x8137, 0x8138, 0x8237, 0x8238, 0x9079,
494 0x9137, 0x9138, 0x9237, 0x9238, 0xA079, 0xB079, 0xC079, 492 0x9137, 0x9138, 0x9237, 0x9238, 0xA079, 0xB079, 0xC079,
495 0xD079, 0 493 0xD079, 0
496}; 494};
497 495
498static const unsigned short timedia_quad_port[] = { 496static const unsigned short timedia_quad_port[] = {
499 0x4055, 0x4056, 0x4095, 0x4096, 0x5056, 0x8156, 0x8157, 497 0x4055, 0x4056, 0x4095, 0x4096, 0x5056, 0x8156, 0x8157,
500 0x8256, 0x8257, 0x9056, 0x9156, 0x9157, 0x9158, 0x9159, 498 0x8256, 0x8257, 0x9056, 0x9156, 0x9157, 0x9158, 0x9159,
501 0x9256, 0x9257, 0xA056, 0xA157, 0xA158, 0xA159, 0xB056, 499 0x9256, 0x9257, 0xA056, 0xA157, 0xA158, 0xA159, 0xB056,
502 0xB157, 0 500 0xB157, 0
503}; 501};
504 502
505static const unsigned short timedia_eight_port[] = { 503static const unsigned short timedia_eight_port[] = {
506 0x4065, 0x4066, 0x5065, 0x5066, 0x8166, 0x9066, 0x9166, 504 0x4065, 0x4066, 0x5065, 0x5066, 0x8166, 0x9066, 0x9166,
507 0x9167, 0x9168, 0xA066, 0xA167, 0xA168, 0 505 0x9167, 0x9168, 0xA066, 0xA167, 0xA168, 0
508}; 506};
509 507
@@ -656,7 +654,8 @@ static int pci_ite887x_init(struct pci_dev *dev)
656 ITE_887x_POSIO_ENABLE | ITE_887x_POSIO_SPEED | 654 ITE_887x_POSIO_ENABLE | ITE_887x_POSIO_SPEED |
657 ITE_887x_POSIO_IOSIZE_32 | inta_addr[i]); 655 ITE_887x_POSIO_IOSIZE_32 | inta_addr[i]);
658 /* write INTCBAR - ioport */ 656 /* write INTCBAR - ioport */
659 pci_write_config_dword(dev, ITE_887x_INTCBAR, inta_addr[i]); 657 pci_write_config_dword(dev, ITE_887x_INTCBAR,
658 inta_addr[i]);
660 ret = inb(inta_addr[i]); 659 ret = inb(inta_addr[i]);
661 if (ret != 0xff) { 660 if (ret != 0xff) {
662 /* ioport connected */ 661 /* ioport connected */
@@ -755,7 +754,7 @@ pci_default_setup(struct serial_private *priv, struct pciserial_board *board,
755 754
756 if (board->flags & FL_REGION_SZ_CAP && idx >= maxnr) 755 if (board->flags & FL_REGION_SZ_CAP && idx >= maxnr)
757 return 1; 756 return 1;
758 757
759 return setup_port(priv, port, bar, offset, board->reg_shift); 758 return setup_port(priv, port, bar, offset, board->reg_shift);
760} 759}
761 760
@@ -843,7 +842,7 @@ static struct pci_serial_quirk pci_serial_quirks[] = {
843 .init = pci_plx9050_init, 842 .init = pci_plx9050_init,
844 .setup = pci_default_setup, 843 .setup = pci_default_setup,
845 .exit = __devexit_p(pci_plx9050_exit), 844 .exit = __devexit_p(pci_plx9050_exit),
846 }, 845 },
847 { 846 {
848 .vendor = PCI_VENDOR_ID_PANACOM, 847 .vendor = PCI_VENDOR_ID_PANACOM,
849 .device = PCI_DEVICE_ID_PANACOM_DUALMODEM, 848 .device = PCI_DEVICE_ID_PANACOM_DUALMODEM,
@@ -1032,7 +1031,7 @@ static struct pci_serial_quirk *find_quirk(struct pci_dev *dev)
1032 quirk_id_matches(quirk->device, dev->device) && 1031 quirk_id_matches(quirk->device, dev->device) &&
1033 quirk_id_matches(quirk->subvendor, dev->subsystem_vendor) && 1032 quirk_id_matches(quirk->subvendor, dev->subsystem_vendor) &&
1034 quirk_id_matches(quirk->subdevice, dev->subsystem_device)) 1033 quirk_id_matches(quirk->subdevice, dev->subsystem_device))
1035 break; 1034 break;
1036 return quirk; 1035 return quirk;
1037} 1036}
1038 1037
@@ -1711,7 +1710,7 @@ static struct pciserial_board pci_boards[] __devinitdata = {
1711}; 1710};
1712 1711
1713static const struct pci_device_id softmodem_blacklist[] = { 1712static const struct pci_device_id softmodem_blacklist[] = {
1714 { PCI_VDEVICE ( AL, 0x5457 ), }, /* ALi Corporation M5457 AC'97 Modem */ 1713 { PCI_VDEVICE(AL, 0x5457), }, /* ALi Corporation M5457 AC'97 Modem */
1715}; 1714};
1716 1715
1717/* 1716/*
@@ -1724,13 +1723,13 @@ serial_pci_guess_board(struct pci_dev *dev, struct pciserial_board *board)
1724{ 1723{
1725 const struct pci_device_id *blacklist; 1724 const struct pci_device_id *blacklist;
1726 int num_iomem, num_port, first_port = -1, i; 1725 int num_iomem, num_port, first_port = -1, i;
1727 1726
1728 /* 1727 /*
1729 * If it is not a communications device or the programming 1728 * If it is not a communications device or the programming
1730 * interface is greater than 6, give up. 1729 * interface is greater than 6, give up.
1731 * 1730 *
1732 * (Should we try to make guesses for multiport serial devices 1731 * (Should we try to make guesses for multiport serial devices
1733 * later?) 1732 * later?)
1734 */ 1733 */
1735 if ((((dev->class >> 8) != PCI_CLASS_COMMUNICATION_SERIAL) && 1734 if ((((dev->class >> 8) != PCI_CLASS_COMMUNICATION_SERIAL) &&
1736 ((dev->class >> 8) != PCI_CLASS_COMMUNICATION_MODEM)) || 1735 ((dev->class >> 8) != PCI_CLASS_COMMUNICATION_MODEM)) ||
@@ -1863,25 +1862,23 @@ pciserial_init_ports(struct pci_dev *dev, struct pciserial_board *board)
1863 break; 1862 break;
1864 1863
1865#ifdef SERIAL_DEBUG_PCI 1864#ifdef SERIAL_DEBUG_PCI
1866 printk("Setup PCI port: port %x, irq %d, type %d\n", 1865 printk(KERN_DEBUG "Setup PCI port: port %x, irq %d, type %d\n",
1867 serial_port.iobase, serial_port.irq, serial_port.iotype); 1866 serial_port.iobase, serial_port.irq, serial_port.iotype);
1868#endif 1867#endif
1869 1868
1870 priv->line[i] = serial8250_register_port(&serial_port); 1869 priv->line[i] = serial8250_register_port(&serial_port);
1871 if (priv->line[i] < 0) { 1870 if (priv->line[i] < 0) {
1872 printk(KERN_WARNING "Couldn't register serial port %s: %d\n", pci_name(dev), priv->line[i]); 1871 printk(KERN_WARNING "Couldn't register serial port %s: %d\n", pci_name(dev), priv->line[i]);
1873 break; 1872 break;
1874 } 1873 }
1875 } 1874 }
1876
1877 priv->nr = i; 1875 priv->nr = i;
1878
1879 return priv; 1876 return priv;
1880 1877
1881 err_deinit: 1878err_deinit:
1882 if (quirk->exit) 1879 if (quirk->exit)
1883 quirk->exit(dev); 1880 quirk->exit(dev);
1884 err_out: 1881err_out:
1885 return priv; 1882 return priv;
1886} 1883}
1887EXPORT_SYMBOL_GPL(pciserial_init_ports); 1884EXPORT_SYMBOL_GPL(pciserial_init_ports);
@@ -2171,22 +2168,22 @@ static struct pci_device_id serial_pci_tbl[] = {
2171 pbn_b0_8_1843200_200 }, 2168 pbn_b0_8_1843200_200 },
2172 2169
2173 { PCI_VENDOR_ID_SEALEVEL, PCI_DEVICE_ID_SEALEVEL_U530, 2170 { PCI_VENDOR_ID_SEALEVEL, PCI_DEVICE_ID_SEALEVEL_U530,
2174 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 2171 PCI_ANY_ID, PCI_ANY_ID, 0, 0,
2175 pbn_b2_bt_1_115200 }, 2172 pbn_b2_bt_1_115200 },
2176 { PCI_VENDOR_ID_SEALEVEL, PCI_DEVICE_ID_SEALEVEL_UCOMM2, 2173 { PCI_VENDOR_ID_SEALEVEL, PCI_DEVICE_ID_SEALEVEL_UCOMM2,
2177 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 2174 PCI_ANY_ID, PCI_ANY_ID, 0, 0,
2178 pbn_b2_bt_2_115200 }, 2175 pbn_b2_bt_2_115200 },
2179 { PCI_VENDOR_ID_SEALEVEL, PCI_DEVICE_ID_SEALEVEL_UCOMM422, 2176 { PCI_VENDOR_ID_SEALEVEL, PCI_DEVICE_ID_SEALEVEL_UCOMM422,
2180 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 2177 PCI_ANY_ID, PCI_ANY_ID, 0, 0,
2181 pbn_b2_bt_4_115200 }, 2178 pbn_b2_bt_4_115200 },
2182 { PCI_VENDOR_ID_SEALEVEL, PCI_DEVICE_ID_SEALEVEL_UCOMM232, 2179 { PCI_VENDOR_ID_SEALEVEL, PCI_DEVICE_ID_SEALEVEL_UCOMM232,
2183 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 2180 PCI_ANY_ID, PCI_ANY_ID, 0, 0,
2184 pbn_b2_bt_2_115200 }, 2181 pbn_b2_bt_2_115200 },
2185 { PCI_VENDOR_ID_SEALEVEL, PCI_DEVICE_ID_SEALEVEL_COMM4, 2182 { PCI_VENDOR_ID_SEALEVEL, PCI_DEVICE_ID_SEALEVEL_COMM4,
2186 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 2183 PCI_ANY_ID, PCI_ANY_ID, 0, 0,
2187 pbn_b2_bt_4_115200 }, 2184 pbn_b2_bt_4_115200 },
2188 { PCI_VENDOR_ID_SEALEVEL, PCI_DEVICE_ID_SEALEVEL_COMM8, 2185 { PCI_VENDOR_ID_SEALEVEL, PCI_DEVICE_ID_SEALEVEL_COMM8,
2189 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 2186 PCI_ANY_ID, PCI_ANY_ID, 0, 0,
2190 pbn_b2_8_115200 }, 2187 pbn_b2_8_115200 },
2191 { PCI_VENDOR_ID_SEALEVEL, PCI_DEVICE_ID_SEALEVEL_UCOMM8, 2188 { PCI_VENDOR_ID_SEALEVEL, PCI_DEVICE_ID_SEALEVEL_UCOMM8,
2192 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 2189 PCI_ANY_ID, PCI_ANY_ID, 0, 0,
@@ -2201,11 +2198,11 @@ static struct pci_device_id serial_pci_tbl[] = {
2201 /* 2198 /*
2202 * VScom SPCOM800, from sl@s.pl 2199 * VScom SPCOM800, from sl@s.pl
2203 */ 2200 */
2204 { PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_SPCOM800, 2201 { PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_SPCOM800,
2205 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 2202 PCI_ANY_ID, PCI_ANY_ID, 0, 0,
2206 pbn_b2_8_921600 }, 2203 pbn_b2_8_921600 },
2207 { PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_1077, 2204 { PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_1077,
2208 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 2205 PCI_ANY_ID, PCI_ANY_ID, 0, 0,
2209 pbn_b2_4_921600 }, 2206 pbn_b2_4_921600 },
2210 { PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_9050, 2207 { PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_9050,
2211 PCI_SUBVENDOR_ID_KEYSPAN, 2208 PCI_SUBVENDOR_ID_KEYSPAN,
@@ -2223,27 +2220,27 @@ static struct pci_device_id serial_pci_tbl[] = {
2223 pbn_b2_4_115200 }, 2220 pbn_b2_4_115200 },
2224 { PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_9050, 2221 { PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_9050,
2225 PCI_SUBVENDOR_ID_CHASE_PCIFAST, 2222 PCI_SUBVENDOR_ID_CHASE_PCIFAST,
2226 PCI_SUBDEVICE_ID_CHASE_PCIFAST4, 0, 0, 2223 PCI_SUBDEVICE_ID_CHASE_PCIFAST4, 0, 0,
2227 pbn_b2_4_460800 }, 2224 pbn_b2_4_460800 },
2228 { PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_9050, 2225 { PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_9050,
2229 PCI_SUBVENDOR_ID_CHASE_PCIFAST, 2226 PCI_SUBVENDOR_ID_CHASE_PCIFAST,
2230 PCI_SUBDEVICE_ID_CHASE_PCIFAST8, 0, 0, 2227 PCI_SUBDEVICE_ID_CHASE_PCIFAST8, 0, 0,
2231 pbn_b2_8_460800 }, 2228 pbn_b2_8_460800 },
2232 { PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_9050, 2229 { PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_9050,
2233 PCI_SUBVENDOR_ID_CHASE_PCIFAST, 2230 PCI_SUBVENDOR_ID_CHASE_PCIFAST,
2234 PCI_SUBDEVICE_ID_CHASE_PCIFAST16, 0, 0, 2231 PCI_SUBDEVICE_ID_CHASE_PCIFAST16, 0, 0,
2235 pbn_b2_16_460800 }, 2232 pbn_b2_16_460800 },
2236 { PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_9050, 2233 { PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_9050,
2237 PCI_SUBVENDOR_ID_CHASE_PCIFAST, 2234 PCI_SUBVENDOR_ID_CHASE_PCIFAST,
2238 PCI_SUBDEVICE_ID_CHASE_PCIFAST16FMC, 0, 0, 2235 PCI_SUBDEVICE_ID_CHASE_PCIFAST16FMC, 0, 0,
2239 pbn_b2_16_460800 }, 2236 pbn_b2_16_460800 },
2240 { PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_9050, 2237 { PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_9050,
2241 PCI_SUBVENDOR_ID_CHASE_PCIRAS, 2238 PCI_SUBVENDOR_ID_CHASE_PCIRAS,
2242 PCI_SUBDEVICE_ID_CHASE_PCIRAS4, 0, 0, 2239 PCI_SUBDEVICE_ID_CHASE_PCIRAS4, 0, 0,
2243 pbn_b2_4_460800 }, 2240 pbn_b2_4_460800 },
2244 { PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_9050, 2241 { PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_9050,
2245 PCI_SUBVENDOR_ID_CHASE_PCIRAS, 2242 PCI_SUBVENDOR_ID_CHASE_PCIRAS,
2246 PCI_SUBDEVICE_ID_CHASE_PCIRAS8, 0, 0, 2243 PCI_SUBDEVICE_ID_CHASE_PCIRAS8, 0, 0,
2247 pbn_b2_8_460800 }, 2244 pbn_b2_8_460800 },
2248 { PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_9050, 2245 { PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_9050,
2249 PCI_SUBVENDOR_ID_EXSYS, 2246 PCI_SUBVENDOR_ID_EXSYS,
@@ -2269,10 +2266,12 @@ static struct pci_device_id serial_pci_tbl[] = {
2269 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 2266 PCI_ANY_ID, PCI_ANY_ID, 0, 0,
2270 pbn_b1_8_115200 }, 2267 pbn_b1_8_115200 },
2271 { PCI_VENDOR_ID_SPECIALIX, PCI_DEVICE_ID_OXSEMI_16PCI954, 2268 { PCI_VENDOR_ID_SPECIALIX, PCI_DEVICE_ID_OXSEMI_16PCI954,
2272 PCI_VENDOR_ID_SPECIALIX, PCI_SUBDEVICE_ID_SPECIALIX_SPEED4, 0, 0, 2269 PCI_VENDOR_ID_SPECIALIX, PCI_SUBDEVICE_ID_SPECIALIX_SPEED4,
2270 0, 0,
2273 pbn_b0_4_921600 }, 2271 pbn_b0_4_921600 },
2274 { PCI_VENDOR_ID_OXSEMI, PCI_DEVICE_ID_OXSEMI_16PCI954, 2272 { PCI_VENDOR_ID_OXSEMI, PCI_DEVICE_ID_OXSEMI_16PCI954,
2275 PCI_SUBVENDOR_ID_SIIG, PCI_SUBDEVICE_ID_SIIG_QUARTET_SERIAL, 0, 0, 2273 PCI_SUBVENDOR_ID_SIIG, PCI_SUBDEVICE_ID_SIIG_QUARTET_SERIAL,
2274 0, 0,
2276 pbn_b0_4_1152000 }, 2275 pbn_b0_4_1152000 },
2277 2276
2278 /* 2277 /*
@@ -2312,7 +2311,7 @@ static struct pci_device_id serial_pci_tbl[] = {
2312 * Digitan DS560-558, from jimd@esoft.com 2311 * Digitan DS560-558, from jimd@esoft.com
2313 */ 2312 */
2314 { PCI_VENDOR_ID_ATT, PCI_DEVICE_ID_ATT_VENUS_MODEM, 2313 { PCI_VENDOR_ID_ATT, PCI_DEVICE_ID_ATT_VENUS_MODEM,
2315 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 2314 PCI_ANY_ID, PCI_ANY_ID, 0, 0,
2316 pbn_b1_1_115200 }, 2315 pbn_b1_1_115200 },
2317 2316
2318 /* 2317 /*
@@ -2320,16 +2319,16 @@ static struct pci_device_id serial_pci_tbl[] = {
2320 * The 400L and 800L have a custom setup quirk. 2319 * The 400L and 800L have a custom setup quirk.
2321 */ 2320 */
2322 { PCI_VENDOR_ID_TITAN, PCI_DEVICE_ID_TITAN_100, 2321 { PCI_VENDOR_ID_TITAN, PCI_DEVICE_ID_TITAN_100,
2323 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 2322 PCI_ANY_ID, PCI_ANY_ID, 0, 0,
2324 pbn_b0_1_921600 }, 2323 pbn_b0_1_921600 },
2325 { PCI_VENDOR_ID_TITAN, PCI_DEVICE_ID_TITAN_200, 2324 { PCI_VENDOR_ID_TITAN, PCI_DEVICE_ID_TITAN_200,
2326 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 2325 PCI_ANY_ID, PCI_ANY_ID, 0, 0,
2327 pbn_b0_2_921600 }, 2326 pbn_b0_2_921600 },
2328 { PCI_VENDOR_ID_TITAN, PCI_DEVICE_ID_TITAN_400, 2327 { PCI_VENDOR_ID_TITAN, PCI_DEVICE_ID_TITAN_400,
2329 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 2328 PCI_ANY_ID, PCI_ANY_ID, 0, 0,
2330 pbn_b0_4_921600 }, 2329 pbn_b0_4_921600 },
2331 { PCI_VENDOR_ID_TITAN, PCI_DEVICE_ID_TITAN_800B, 2330 { PCI_VENDOR_ID_TITAN, PCI_DEVICE_ID_TITAN_800B,
2332 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 2331 PCI_ANY_ID, PCI_ANY_ID, 0, 0,
2333 pbn_b0_4_921600 }, 2332 pbn_b0_4_921600 },
2334 { PCI_VENDOR_ID_TITAN, PCI_DEVICE_ID_TITAN_100L, 2333 { PCI_VENDOR_ID_TITAN, PCI_DEVICE_ID_TITAN_100L,
2335 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 2334 PCI_ANY_ID, PCI_ANY_ID, 0, 0,
diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
index 84a054d7e986..b82595cf13e8 100644
--- a/drivers/serial/Kconfig
+++ b/drivers/serial/Kconfig
@@ -380,6 +380,21 @@ config SERIAL_ATMEL_CONSOLE
380 console is the device which receives all kernel messages and 380 console is the device which receives all kernel messages and
381 warnings and which allows logins in single user mode). 381 warnings and which allows logins in single user mode).
382 382
383config SERIAL_ATMEL_PDC
384 bool "Support DMA transfers on AT91 / AT32 serial port"
385 depends on SERIAL_ATMEL
386 default y
387 help
388 Say Y here if you wish to use the PDC to do DMA transfers to
389 and from the Atmel AT91 / AT32 serial port. In order to
390 actually use DMA transfers, make sure that the use_dma_tx
391 and use_dma_rx members in the atmel_uart_data struct is set
392 appropriately for each port.
393
394 Note that break and error handling currently doesn't work
395 properly when DMA is enabled. Make sure that ports where
396 this matters don't use DMA.
397
383config SERIAL_ATMEL_TTYAT 398config SERIAL_ATMEL_TTYAT
384 bool "Install as device ttyATn instead of ttySn" 399 bool "Install as device ttyATn instead of ttySn"
385 depends on SERIAL_ATMEL=y 400 depends on SERIAL_ATMEL=y
diff --git a/drivers/serial/atmel_serial.c b/drivers/serial/atmel_serial.c
index 60f52904aad0..fad245b064d6 100644
--- a/drivers/serial/atmel_serial.c
+++ b/drivers/serial/atmel_serial.c
@@ -7,6 +7,8 @@
7 * Based on drivers/char/serial_sa1100.c, by Deep Blue Solutions Ltd. 7 * Based on drivers/char/serial_sa1100.c, by Deep Blue Solutions Ltd.
8 * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o. 8 * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
9 * 9 *
10 * DMA support added by Chip Coldwell.
11 *
10 * This program is free software; you can redistribute it and/or modify 12 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by 13 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or 14 * the Free Software Foundation; either version 2 of the License, or
@@ -33,6 +35,7 @@
33#include <linux/sysrq.h> 35#include <linux/sysrq.h>
34#include <linux/tty_flip.h> 36#include <linux/tty_flip.h>
35#include <linux/platform_device.h> 37#include <linux/platform_device.h>
38#include <linux/dma-mapping.h>
36#include <linux/atmel_pdc.h> 39#include <linux/atmel_pdc.h>
37#include <linux/atmel_serial.h> 40#include <linux/atmel_serial.h>
38 41
@@ -46,6 +49,10 @@
46#include <asm/arch/gpio.h> 49#include <asm/arch/gpio.h>
47#endif 50#endif
48 51
52#define PDC_BUFFER_SIZE 512
53/* Revisit: We should calculate this based on the actual port settings */
54#define PDC_RX_TIMEOUT (3 * 10) /* 3 bytes */
55
49#if defined(CONFIG_SERIAL_ATMEL_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) 56#if defined(CONFIG_SERIAL_ATMEL_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
50#define SUPPORT_SYSRQ 57#define SUPPORT_SYSRQ
51#endif 58#endif
@@ -73,6 +80,7 @@
73 80
74#define ATMEL_ISR_PASS_LIMIT 256 81#define ATMEL_ISR_PASS_LIMIT 256
75 82
83/* UART registers. CR is write-only, hence no GET macro */
76#define UART_PUT_CR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_CR) 84#define UART_PUT_CR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_CR)
77#define UART_GET_MR(port) __raw_readl((port)->membase + ATMEL_US_MR) 85#define UART_GET_MR(port) __raw_readl((port)->membase + ATMEL_US_MR)
78#define UART_PUT_MR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_MR) 86#define UART_PUT_MR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_MR)
@@ -86,8 +94,6 @@
86#define UART_PUT_BRGR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_BRGR) 94#define UART_PUT_BRGR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_BRGR)
87#define UART_PUT_RTOR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_RTOR) 95#define UART_PUT_RTOR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_RTOR)
88 96
89// #define UART_GET_CR(port) __raw_readl((port)->membase + ATMEL_US_CR) // is write-only
90
91 /* PDC registers */ 97 /* PDC registers */
92#define UART_PUT_PTCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_PTCR) 98#define UART_PUT_PTCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_PTCR)
93#define UART_GET_PTSR(port) __raw_readl((port)->membase + ATMEL_PDC_PTSR) 99#define UART_GET_PTSR(port) __raw_readl((port)->membase + ATMEL_PDC_PTSR)
@@ -100,12 +106,24 @@
100 106
101#define UART_PUT_TPR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_TPR) 107#define UART_PUT_TPR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_TPR)
102#define UART_PUT_TCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_TCR) 108#define UART_PUT_TCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_TCR)
103//#define UART_PUT_TNPR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_TNPR)
104//#define UART_PUT_TNCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_TNCR)
105 109
106static int (*atmel_open_hook)(struct uart_port *); 110static int (*atmel_open_hook)(struct uart_port *);
107static void (*atmel_close_hook)(struct uart_port *); 111static void (*atmel_close_hook)(struct uart_port *);
108 112
113struct atmel_dma_buffer {
114 unsigned char *buf;
115 dma_addr_t dma_addr;
116 unsigned int dma_size;
117 unsigned int ofs;
118};
119
120struct atmel_uart_char {
121 u16 status;
122 u16 ch;
123};
124
125#define ATMEL_SERIAL_RINGSIZE 1024
126
109/* 127/*
110 * We wrap our port structure around the generic uart_port. 128 * We wrap our port structure around the generic uart_port.
111 */ 129 */
@@ -114,6 +132,19 @@ struct atmel_uart_port {
114 struct clk *clk; /* uart clock */ 132 struct clk *clk; /* uart clock */
115 unsigned short suspended; /* is port suspended? */ 133 unsigned short suspended; /* is port suspended? */
116 int break_active; /* break being received */ 134 int break_active; /* break being received */
135
136 short use_dma_rx; /* enable PDC receiver */
137 short pdc_rx_idx; /* current PDC RX buffer */
138 struct atmel_dma_buffer pdc_rx[2]; /* PDC receier */
139
140 short use_dma_tx; /* enable PDC transmitter */
141 struct atmel_dma_buffer pdc_tx; /* PDC transmitter */
142
143 struct tasklet_struct tasklet;
144 unsigned int irq_status;
145 unsigned int irq_status_prev;
146
147 struct circ_buf rx_ring;
117}; 148};
118 149
119static struct atmel_uart_port atmel_ports[ATMEL_MAX_UART]; 150static struct atmel_uart_port atmel_ports[ATMEL_MAX_UART];
@@ -122,6 +153,38 @@ static struct atmel_uart_port atmel_ports[ATMEL_MAX_UART];
122static struct console atmel_console; 153static struct console atmel_console;
123#endif 154#endif
124 155
156static inline struct atmel_uart_port *
157to_atmel_uart_port(struct uart_port *uart)
158{
159 return container_of(uart, struct atmel_uart_port, uart);
160}
161
162#ifdef CONFIG_SERIAL_ATMEL_PDC
163static bool atmel_use_dma_rx(struct uart_port *port)
164{
165 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
166
167 return atmel_port->use_dma_rx;
168}
169
170static bool atmel_use_dma_tx(struct uart_port *port)
171{
172 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
173
174 return atmel_port->use_dma_tx;
175}
176#else
177static bool atmel_use_dma_rx(struct uart_port *port)
178{
179 return false;
180}
181
182static bool atmel_use_dma_tx(struct uart_port *port)
183{
184 return false;
185}
186#endif
187
125/* 188/*
126 * Return TIOCSER_TEMT when transmitter FIFO and Shift register is empty. 189 * Return TIOCSER_TEMT when transmitter FIFO and Shift register is empty.
127 */ 190 */
@@ -141,8 +204,8 @@ static void atmel_set_mctrl(struct uart_port *port, u_int mctrl)
141#ifdef CONFIG_ARCH_AT91RM9200 204#ifdef CONFIG_ARCH_AT91RM9200
142 if (cpu_is_at91rm9200()) { 205 if (cpu_is_at91rm9200()) {
143 /* 206 /*
144 * AT91RM9200 Errata #39: RTS0 is not internally connected to PA21. 207 * AT91RM9200 Errata #39: RTS0 is not internally connected
145 * We need to drive the pin manually. 208 * to PA21. We need to drive the pin manually.
146 */ 209 */
147 if (port->mapbase == AT91RM9200_BASE_US0) { 210 if (port->mapbase == AT91RM9200_BASE_US0) {
148 if (mctrl & TIOCM_RTS) 211 if (mctrl & TIOCM_RTS)
@@ -203,7 +266,12 @@ static u_int atmel_get_mctrl(struct uart_port *port)
203 */ 266 */
204static void atmel_stop_tx(struct uart_port *port) 267static void atmel_stop_tx(struct uart_port *port)
205{ 268{
206 UART_PUT_IDR(port, ATMEL_US_TXRDY); 269 if (atmel_use_dma_tx(port)) {
270 /* disable PDC transmit */
271 UART_PUT_PTCR(port, ATMEL_PDC_TXTDIS);
272 UART_PUT_IDR(port, ATMEL_US_ENDTX | ATMEL_US_TXBUFE);
273 } else
274 UART_PUT_IDR(port, ATMEL_US_TXRDY);
207} 275}
208 276
209/* 277/*
@@ -211,7 +279,17 @@ static void atmel_stop_tx(struct uart_port *port)
211 */ 279 */
212static void atmel_start_tx(struct uart_port *port) 280static void atmel_start_tx(struct uart_port *port)
213{ 281{
214 UART_PUT_IER(port, ATMEL_US_TXRDY); 282 if (atmel_use_dma_tx(port)) {
283 if (UART_GET_PTSR(port) & ATMEL_PDC_TXTEN)
284 /* The transmitter is already running. Yes, we
285 really need this.*/
286 return;
287
288 UART_PUT_IER(port, ATMEL_US_ENDTX | ATMEL_US_TXBUFE);
289 /* re-enable PDC transmit */
290 UART_PUT_PTCR(port, ATMEL_PDC_TXTEN);
291 } else
292 UART_PUT_IER(port, ATMEL_US_TXRDY);
215} 293}
216 294
217/* 295/*
@@ -219,7 +297,12 @@ static void atmel_start_tx(struct uart_port *port)
219 */ 297 */
220static void atmel_stop_rx(struct uart_port *port) 298static void atmel_stop_rx(struct uart_port *port)
221{ 299{
222 UART_PUT_IDR(port, ATMEL_US_RXRDY); 300 if (atmel_use_dma_rx(port)) {
301 /* disable PDC receive */
302 UART_PUT_PTCR(port, ATMEL_PDC_RXTDIS);
303 UART_PUT_IDR(port, ATMEL_US_ENDRX | ATMEL_US_TIMEOUT);
304 } else
305 UART_PUT_IDR(port, ATMEL_US_RXRDY);
223} 306}
224 307
225/* 308/*
@@ -227,7 +310,8 @@ static void atmel_stop_rx(struct uart_port *port)
227 */ 310 */
228static void atmel_enable_ms(struct uart_port *port) 311static void atmel_enable_ms(struct uart_port *port)
229{ 312{
230 UART_PUT_IER(port, ATMEL_US_RIIC | ATMEL_US_DSRIC | ATMEL_US_DCDIC | ATMEL_US_CTSIC); 313 UART_PUT_IER(port, ATMEL_US_RIIC | ATMEL_US_DSRIC
314 | ATMEL_US_DCDIC | ATMEL_US_CTSIC);
231} 315}
232 316
233/* 317/*
@@ -242,22 +326,63 @@ static void atmel_break_ctl(struct uart_port *port, int break_state)
242} 326}
243 327
244/* 328/*
329 * Stores the incoming character in the ring buffer
330 */
331static void
332atmel_buffer_rx_char(struct uart_port *port, unsigned int status,
333 unsigned int ch)
334{
335 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
336 struct circ_buf *ring = &atmel_port->rx_ring;
337 struct atmel_uart_char *c;
338
339 if (!CIRC_SPACE(ring->head, ring->tail, ATMEL_SERIAL_RINGSIZE))
340 /* Buffer overflow, ignore char */
341 return;
342
343 c = &((struct atmel_uart_char *)ring->buf)[ring->head];
344 c->status = status;
345 c->ch = ch;
346
347 /* Make sure the character is stored before we update head. */
348 smp_wmb();
349
350 ring->head = (ring->head + 1) & (ATMEL_SERIAL_RINGSIZE - 1);
351}
352
353/*
354 * Deal with parity, framing and overrun errors.
355 */
356static void atmel_pdc_rxerr(struct uart_port *port, unsigned int status)
357{
358 /* clear error */
359 UART_PUT_CR(port, ATMEL_US_RSTSTA);
360
361 if (status & ATMEL_US_RXBRK) {
362 /* ignore side-effect */
363 status &= ~(ATMEL_US_PARE | ATMEL_US_FRAME);
364 port->icount.brk++;
365 }
366 if (status & ATMEL_US_PARE)
367 port->icount.parity++;
368 if (status & ATMEL_US_FRAME)
369 port->icount.frame++;
370 if (status & ATMEL_US_OVRE)
371 port->icount.overrun++;
372}
373
374/*
245 * Characters received (called from interrupt handler) 375 * Characters received (called from interrupt handler)
246 */ 376 */
247static void atmel_rx_chars(struct uart_port *port) 377static void atmel_rx_chars(struct uart_port *port)
248{ 378{
249 struct atmel_uart_port *atmel_port = (struct atmel_uart_port *) port; 379 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
250 struct tty_struct *tty = port->info->tty; 380 unsigned int status, ch;
251 unsigned int status, ch, flg;
252 381
253 status = UART_GET_CSR(port); 382 status = UART_GET_CSR(port);
254 while (status & ATMEL_US_RXRDY) { 383 while (status & ATMEL_US_RXRDY) {
255 ch = UART_GET_CHAR(port); 384 ch = UART_GET_CHAR(port);
256 385
257 port->icount.rx++;
258
259 flg = TTY_NORMAL;
260
261 /* 386 /*
262 * note that the error handling code is 387 * note that the error handling code is
263 * out of the main execution path 388 * out of the main execution path
@@ -265,15 +390,14 @@ static void atmel_rx_chars(struct uart_port *port)
265 if (unlikely(status & (ATMEL_US_PARE | ATMEL_US_FRAME 390 if (unlikely(status & (ATMEL_US_PARE | ATMEL_US_FRAME
266 | ATMEL_US_OVRE | ATMEL_US_RXBRK) 391 | ATMEL_US_OVRE | ATMEL_US_RXBRK)
267 || atmel_port->break_active)) { 392 || atmel_port->break_active)) {
268 UART_PUT_CR(port, ATMEL_US_RSTSTA); /* clear error */ 393
394 /* clear error */
395 UART_PUT_CR(port, ATMEL_US_RSTSTA);
396
269 if (status & ATMEL_US_RXBRK 397 if (status & ATMEL_US_RXBRK
270 && !atmel_port->break_active) { 398 && !atmel_port->break_active) {
271 status &= ~(ATMEL_US_PARE | ATMEL_US_FRAME); /* ignore side-effect */
272 port->icount.brk++;
273 atmel_port->break_active = 1; 399 atmel_port->break_active = 1;
274 UART_PUT_IER(port, ATMEL_US_RXBRK); 400 UART_PUT_IER(port, ATMEL_US_RXBRK);
275 if (uart_handle_break(port))
276 goto ignore_char;
277 } else { 401 } else {
278 /* 402 /*
279 * This is either the end-of-break 403 * This is either the end-of-break
@@ -286,52 +410,30 @@ static void atmel_rx_chars(struct uart_port *port)
286 status &= ~ATMEL_US_RXBRK; 410 status &= ~ATMEL_US_RXBRK;
287 atmel_port->break_active = 0; 411 atmel_port->break_active = 0;
288 } 412 }
289 if (status & ATMEL_US_PARE)
290 port->icount.parity++;
291 if (status & ATMEL_US_FRAME)
292 port->icount.frame++;
293 if (status & ATMEL_US_OVRE)
294 port->icount.overrun++;
295
296 status &= port->read_status_mask;
297
298 if (status & ATMEL_US_RXBRK)
299 flg = TTY_BREAK;
300 else if (status & ATMEL_US_PARE)
301 flg = TTY_PARITY;
302 else if (status & ATMEL_US_FRAME)
303 flg = TTY_FRAME;
304 } 413 }
305 414
306 if (uart_handle_sysrq_char(port, ch)) 415 atmel_buffer_rx_char(port, status, ch);
307 goto ignore_char;
308
309 uart_insert_char(port, status, ATMEL_US_OVRE, ch, flg);
310
311 ignore_char:
312 status = UART_GET_CSR(port); 416 status = UART_GET_CSR(port);
313 } 417 }
314 418
315 tty_flip_buffer_push(tty); 419 tasklet_schedule(&atmel_port->tasklet);
316} 420}
317 421
318/* 422/*
319 * Transmit characters (called from interrupt handler) 423 * Transmit characters (called from tasklet with TXRDY interrupt
424 * disabled)
320 */ 425 */
321static void atmel_tx_chars(struct uart_port *port) 426static void atmel_tx_chars(struct uart_port *port)
322{ 427{
323 struct circ_buf *xmit = &port->info->xmit; 428 struct circ_buf *xmit = &port->info->xmit;
324 429
325 if (port->x_char) { 430 if (port->x_char && UART_GET_CSR(port) & ATMEL_US_TXRDY) {
326 UART_PUT_CHAR(port, port->x_char); 431 UART_PUT_CHAR(port, port->x_char);
327 port->icount.tx++; 432 port->icount.tx++;
328 port->x_char = 0; 433 port->x_char = 0;
329 return;
330 } 434 }
331 if (uart_circ_empty(xmit) || uart_tx_stopped(port)) { 435 if (uart_circ_empty(xmit) || uart_tx_stopped(port))
332 atmel_stop_tx(port);
333 return; 436 return;
334 }
335 437
336 while (UART_GET_CSR(port) & ATMEL_US_TXRDY) { 438 while (UART_GET_CSR(port) & ATMEL_US_TXRDY) {
337 UART_PUT_CHAR(port, xmit->buf[xmit->tail]); 439 UART_PUT_CHAR(port, xmit->buf[xmit->tail]);
@@ -344,8 +446,88 @@ static void atmel_tx_chars(struct uart_port *port)
344 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) 446 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
345 uart_write_wakeup(port); 447 uart_write_wakeup(port);
346 448
347 if (uart_circ_empty(xmit)) 449 if (!uart_circ_empty(xmit))
348 atmel_stop_tx(port); 450 UART_PUT_IER(port, ATMEL_US_TXRDY);
451}
452
453/*
454 * receive interrupt handler.
455 */
456static void
457atmel_handle_receive(struct uart_port *port, unsigned int pending)
458{
459 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
460
461 if (atmel_use_dma_rx(port)) {
462 /*
463 * PDC receive. Just schedule the tasklet and let it
464 * figure out the details.
465 *
466 * TODO: We're not handling error flags correctly at
467 * the moment.
468 */
469 if (pending & (ATMEL_US_ENDRX | ATMEL_US_TIMEOUT)) {
470 UART_PUT_IDR(port, (ATMEL_US_ENDRX
471 | ATMEL_US_TIMEOUT));
472 tasklet_schedule(&atmel_port->tasklet);
473 }
474
475 if (pending & (ATMEL_US_RXBRK | ATMEL_US_OVRE |
476 ATMEL_US_FRAME | ATMEL_US_PARE))
477 atmel_pdc_rxerr(port, pending);
478 }
479
480 /* Interrupt receive */
481 if (pending & ATMEL_US_RXRDY)
482 atmel_rx_chars(port);
483 else if (pending & ATMEL_US_RXBRK) {
484 /*
485 * End of break detected. If it came along with a
486 * character, atmel_rx_chars will handle it.
487 */
488 UART_PUT_CR(port, ATMEL_US_RSTSTA);
489 UART_PUT_IDR(port, ATMEL_US_RXBRK);
490 atmel_port->break_active = 0;
491 }
492}
493
494/*
495 * transmit interrupt handler. (Transmit is IRQF_NODELAY safe)
496 */
497static void
498atmel_handle_transmit(struct uart_port *port, unsigned int pending)
499{
500 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
501
502 if (atmel_use_dma_tx(port)) {
503 /* PDC transmit */
504 if (pending & (ATMEL_US_ENDTX | ATMEL_US_TXBUFE)) {
505 UART_PUT_IDR(port, ATMEL_US_ENDTX | ATMEL_US_TXBUFE);
506 tasklet_schedule(&atmel_port->tasklet);
507 }
508 } else {
509 /* Interrupt transmit */
510 if (pending & ATMEL_US_TXRDY) {
511 UART_PUT_IDR(port, ATMEL_US_TXRDY);
512 tasklet_schedule(&atmel_port->tasklet);
513 }
514 }
515}
516
517/*
518 * status flags interrupt handler.
519 */
520static void
521atmel_handle_status(struct uart_port *port, unsigned int pending,
522 unsigned int status)
523{
524 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
525
526 if (pending & (ATMEL_US_RIIC | ATMEL_US_DSRIC | ATMEL_US_DCDIC
527 | ATMEL_US_CTSIC)) {
528 atmel_port->irq_status = status;
529 tasklet_schedule(&atmel_port->tasklet);
530 }
349} 531}
350 532
351/* 533/*
@@ -354,47 +536,255 @@ static void atmel_tx_chars(struct uart_port *port)
354static irqreturn_t atmel_interrupt(int irq, void *dev_id) 536static irqreturn_t atmel_interrupt(int irq, void *dev_id)
355{ 537{
356 struct uart_port *port = dev_id; 538 struct uart_port *port = dev_id;
357 struct atmel_uart_port *atmel_port = (struct atmel_uart_port *) port;
358 unsigned int status, pending, pass_counter = 0; 539 unsigned int status, pending, pass_counter = 0;
359 540
360 status = UART_GET_CSR(port); 541 do {
361 pending = status & UART_GET_IMR(port); 542 status = UART_GET_CSR(port);
362 while (pending) { 543 pending = status & UART_GET_IMR(port);
363 /* Interrupt receive */ 544 if (!pending)
364 if (pending & ATMEL_US_RXRDY) 545 break;
365 atmel_rx_chars(port); 546
366 else if (pending & ATMEL_US_RXBRK) { 547 atmel_handle_receive(port, pending);
548 atmel_handle_status(port, pending, status);
549 atmel_handle_transmit(port, pending);
550 } while (pass_counter++ < ATMEL_ISR_PASS_LIMIT);
551
552 return IRQ_HANDLED;
553}
554
555/*
556 * Called from tasklet with ENDTX and TXBUFE interrupts disabled.
557 */
558static void atmel_tx_dma(struct uart_port *port)
559{
560 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
561 struct circ_buf *xmit = &port->info->xmit;
562 struct atmel_dma_buffer *pdc = &atmel_port->pdc_tx;
563 int count;
564
565 xmit->tail += pdc->ofs;
566 xmit->tail &= UART_XMIT_SIZE - 1;
567
568 port->icount.tx += pdc->ofs;
569 pdc->ofs = 0;
570
571 if (!uart_circ_empty(xmit)) {
572 /* more to transmit - setup next transfer */
573
574 /* disable PDC transmit */
575 UART_PUT_PTCR(port, ATMEL_PDC_TXTDIS);
576 dma_sync_single_for_device(port->dev,
577 pdc->dma_addr,
578 pdc->dma_size,
579 DMA_TO_DEVICE);
580
581 count = CIRC_CNT_TO_END(xmit->head, xmit->tail, UART_XMIT_SIZE);
582 pdc->ofs = count;
583
584 UART_PUT_TPR(port, pdc->dma_addr + xmit->tail);
585 UART_PUT_TCR(port, count);
586 /* re-enable PDC transmit and interrupts */
587 UART_PUT_PTCR(port, ATMEL_PDC_TXTEN);
588 UART_PUT_IER(port, ATMEL_US_ENDTX | ATMEL_US_TXBUFE);
589 } else {
590 /* nothing left to transmit - disable the transmitter */
591
592 /* disable PDC transmit */
593 UART_PUT_PTCR(port, ATMEL_PDC_TXTDIS);
594 }
595
596 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
597 uart_write_wakeup(port);
598}
599
600static void atmel_rx_from_ring(struct uart_port *port)
601{
602 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
603 struct circ_buf *ring = &atmel_port->rx_ring;
604 unsigned int flg;
605 unsigned int status;
606
607 while (ring->head != ring->tail) {
608 struct atmel_uart_char c;
609
610 /* Make sure c is loaded after head. */
611 smp_rmb();
612
613 c = ((struct atmel_uart_char *)ring->buf)[ring->tail];
614
615 ring->tail = (ring->tail + 1) & (ATMEL_SERIAL_RINGSIZE - 1);
616
617 port->icount.rx++;
618 status = c.status;
619 flg = TTY_NORMAL;
620
621 /*
622 * note that the error handling code is
623 * out of the main execution path
624 */
625 if (unlikely(status & (ATMEL_US_PARE | ATMEL_US_FRAME
626 | ATMEL_US_OVRE | ATMEL_US_RXBRK))) {
627 if (status & ATMEL_US_RXBRK) {
628 /* ignore side-effect */
629 status &= ~(ATMEL_US_PARE | ATMEL_US_FRAME);
630
631 port->icount.brk++;
632 if (uart_handle_break(port))
633 continue;
634 }
635 if (status & ATMEL_US_PARE)
636 port->icount.parity++;
637 if (status & ATMEL_US_FRAME)
638 port->icount.frame++;
639 if (status & ATMEL_US_OVRE)
640 port->icount.overrun++;
641
642 status &= port->read_status_mask;
643
644 if (status & ATMEL_US_RXBRK)
645 flg = TTY_BREAK;
646 else if (status & ATMEL_US_PARE)
647 flg = TTY_PARITY;
648 else if (status & ATMEL_US_FRAME)
649 flg = TTY_FRAME;
650 }
651
652
653 if (uart_handle_sysrq_char(port, c.ch))
654 continue;
655
656 uart_insert_char(port, status, ATMEL_US_OVRE, c.ch, flg);
657 }
658
659 /*
660 * Drop the lock here since it might end up calling
661 * uart_start(), which takes the lock.
662 */
663 spin_unlock(&port->lock);
664 tty_flip_buffer_push(port->info->tty);
665 spin_lock(&port->lock);
666}
667
668static void atmel_rx_from_dma(struct uart_port *port)
669{
670 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
671 struct tty_struct *tty = port->info->tty;
672 struct atmel_dma_buffer *pdc;
673 int rx_idx = atmel_port->pdc_rx_idx;
674 unsigned int head;
675 unsigned int tail;
676 unsigned int count;
677
678 do {
679 /* Reset the UART timeout early so that we don't miss one */
680 UART_PUT_CR(port, ATMEL_US_STTTO);
681
682 pdc = &atmel_port->pdc_rx[rx_idx];
683 head = UART_GET_RPR(port) - pdc->dma_addr;
684 tail = pdc->ofs;
685
686 /* If the PDC has switched buffers, RPR won't contain
687 * any address within the current buffer. Since head
688 * is unsigned, we just need a one-way comparison to
689 * find out.
690 *
691 * In this case, we just need to consume the entire
692 * buffer and resubmit it for DMA. This will clear the
693 * ENDRX bit as well, so that we can safely re-enable
694 * all interrupts below.
695 */
696 head = min(head, pdc->dma_size);
697
698 if (likely(head != tail)) {
699 dma_sync_single_for_cpu(port->dev, pdc->dma_addr,
700 pdc->dma_size, DMA_FROM_DEVICE);
701
367 /* 702 /*
368 * End of break detected. If it came along 703 * head will only wrap around when we recycle
369 * with a character, atmel_rx_chars will 704 * the DMA buffer, and when that happens, we
370 * handle it. 705 * explicitly set tail to 0. So head will
706 * always be greater than tail.
371 */ 707 */
372 UART_PUT_CR(port, ATMEL_US_RSTSTA); 708 count = head - tail;
373 UART_PUT_IDR(port, ATMEL_US_RXBRK); 709
374 atmel_port->break_active = 0; 710 tty_insert_flip_string(tty, pdc->buf + pdc->ofs, count);
711
712 dma_sync_single_for_device(port->dev, pdc->dma_addr,
713 pdc->dma_size, DMA_FROM_DEVICE);
714
715 port->icount.rx += count;
716 pdc->ofs = head;
375 } 717 }
376 718
377 // TODO: All reads to CSR will clear these interrupts! 719 /*
378 if (pending & ATMEL_US_RIIC) port->icount.rng++; 720 * If the current buffer is full, we need to check if
379 if (pending & ATMEL_US_DSRIC) port->icount.dsr++; 721 * the next one contains any additional data.
380 if (pending & ATMEL_US_DCDIC) 722 */
723 if (head >= pdc->dma_size) {
724 pdc->ofs = 0;
725 UART_PUT_RNPR(port, pdc->dma_addr);
726 UART_PUT_RNCR(port, pdc->dma_size);
727
728 rx_idx = !rx_idx;
729 atmel_port->pdc_rx_idx = rx_idx;
730 }
731 } while (head >= pdc->dma_size);
732
733 /*
734 * Drop the lock here since it might end up calling
735 * uart_start(), which takes the lock.
736 */
737 spin_unlock(&port->lock);
738 tty_flip_buffer_push(tty);
739 spin_lock(&port->lock);
740
741 UART_PUT_IER(port, ATMEL_US_ENDRX | ATMEL_US_TIMEOUT);
742}
743
744/*
745 * tasklet handling tty stuff outside the interrupt handler.
746 */
747static void atmel_tasklet_func(unsigned long data)
748{
749 struct uart_port *port = (struct uart_port *)data;
750 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
751 unsigned int status;
752 unsigned int status_change;
753
754 /* The interrupt handler does not take the lock */
755 spin_lock(&port->lock);
756
757 if (atmel_use_dma_tx(port))
758 atmel_tx_dma(port);
759 else
760 atmel_tx_chars(port);
761
762 status = atmel_port->irq_status;
763 status_change = status ^ atmel_port->irq_status_prev;
764
765 if (status_change & (ATMEL_US_RI | ATMEL_US_DSR
766 | ATMEL_US_DCD | ATMEL_US_CTS)) {
767 /* TODO: All reads to CSR will clear these interrupts! */
768 if (status_change & ATMEL_US_RI)
769 port->icount.rng++;
770 if (status_change & ATMEL_US_DSR)
771 port->icount.dsr++;
772 if (status_change & ATMEL_US_DCD)
381 uart_handle_dcd_change(port, !(status & ATMEL_US_DCD)); 773 uart_handle_dcd_change(port, !(status & ATMEL_US_DCD));
382 if (pending & ATMEL_US_CTSIC) 774 if (status_change & ATMEL_US_CTS)
383 uart_handle_cts_change(port, !(status & ATMEL_US_CTS)); 775 uart_handle_cts_change(port, !(status & ATMEL_US_CTS));
384 if (pending & (ATMEL_US_RIIC | ATMEL_US_DSRIC | ATMEL_US_DCDIC | ATMEL_US_CTSIC))
385 wake_up_interruptible(&port->info->delta_msr_wait);
386 776
387 /* Interrupt transmit */ 777 wake_up_interruptible(&port->info->delta_msr_wait);
388 if (pending & ATMEL_US_TXRDY)
389 atmel_tx_chars(port);
390 778
391 if (pass_counter++ > ATMEL_ISR_PASS_LIMIT) 779 atmel_port->irq_status_prev = status;
392 break;
393
394 status = UART_GET_CSR(port);
395 pending = status & UART_GET_IMR(port);
396 } 780 }
397 return IRQ_HANDLED; 781
782 if (atmel_use_dma_rx(port))
783 atmel_rx_from_dma(port);
784 else
785 atmel_rx_from_ring(port);
786
787 spin_unlock(&port->lock);
398} 788}
399 789
400/* 790/*
@@ -402,6 +792,8 @@ static irqreturn_t atmel_interrupt(int irq, void *dev_id)
402 */ 792 */
403static int atmel_startup(struct uart_port *port) 793static int atmel_startup(struct uart_port *port)
404{ 794{
795 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
796 struct tty_struct *tty = port->info->tty;
405 int retval; 797 int retval;
406 798
407 /* 799 /*
@@ -414,13 +806,64 @@ static int atmel_startup(struct uart_port *port)
414 /* 806 /*
415 * Allocate the IRQ 807 * Allocate the IRQ
416 */ 808 */
417 retval = request_irq(port->irq, atmel_interrupt, IRQF_SHARED, "atmel_serial", port); 809 retval = request_irq(port->irq, atmel_interrupt, IRQF_SHARED,
810 tty ? tty->name : "atmel_serial", port);
418 if (retval) { 811 if (retval) {
419 printk("atmel_serial: atmel_startup - Can't get irq\n"); 812 printk("atmel_serial: atmel_startup - Can't get irq\n");
420 return retval; 813 return retval;
421 } 814 }
422 815
423 /* 816 /*
817 * Initialize DMA (if necessary)
818 */
819 if (atmel_use_dma_rx(port)) {
820 int i;
821
822 for (i = 0; i < 2; i++) {
823 struct atmel_dma_buffer *pdc = &atmel_port->pdc_rx[i];
824
825 pdc->buf = kmalloc(PDC_BUFFER_SIZE, GFP_KERNEL);
826 if (pdc->buf == NULL) {
827 if (i != 0) {
828 dma_unmap_single(port->dev,
829 atmel_port->pdc_rx[0].dma_addr,
830 PDC_BUFFER_SIZE,
831 DMA_FROM_DEVICE);
832 kfree(atmel_port->pdc_rx[0].buf);
833 }
834 free_irq(port->irq, port);
835 return -ENOMEM;
836 }
837 pdc->dma_addr = dma_map_single(port->dev,
838 pdc->buf,
839 PDC_BUFFER_SIZE,
840 DMA_FROM_DEVICE);
841 pdc->dma_size = PDC_BUFFER_SIZE;
842 pdc->ofs = 0;
843 }
844
845 atmel_port->pdc_rx_idx = 0;
846
847 UART_PUT_RPR(port, atmel_port->pdc_rx[0].dma_addr);
848 UART_PUT_RCR(port, PDC_BUFFER_SIZE);
849
850 UART_PUT_RNPR(port, atmel_port->pdc_rx[1].dma_addr);
851 UART_PUT_RNCR(port, PDC_BUFFER_SIZE);
852 }
853 if (atmel_use_dma_tx(port)) {
854 struct atmel_dma_buffer *pdc = &atmel_port->pdc_tx;
855 struct circ_buf *xmit = &port->info->xmit;
856
857 pdc->buf = xmit->buf;
858 pdc->dma_addr = dma_map_single(port->dev,
859 pdc->buf,
860 UART_XMIT_SIZE,
861 DMA_TO_DEVICE);
862 pdc->dma_size = UART_XMIT_SIZE;
863 pdc->ofs = 0;
864 }
865
866 /*
424 * If there is a specific "open" function (to register 867 * If there is a specific "open" function (to register
425 * control line interrupts) 868 * control line interrupts)
426 */ 869 */
@@ -436,9 +879,21 @@ static int atmel_startup(struct uart_port *port)
436 * Finally, enable the serial port 879 * Finally, enable the serial port
437 */ 880 */
438 UART_PUT_CR(port, ATMEL_US_RSTSTA | ATMEL_US_RSTRX); 881 UART_PUT_CR(port, ATMEL_US_RSTSTA | ATMEL_US_RSTRX);
439 UART_PUT_CR(port, ATMEL_US_TXEN | ATMEL_US_RXEN); /* enable xmit & rcvr */ 882 /* enable xmit & rcvr */
883 UART_PUT_CR(port, ATMEL_US_TXEN | ATMEL_US_RXEN);
440 884
441 UART_PUT_IER(port, ATMEL_US_RXRDY); /* enable receive only */ 885 if (atmel_use_dma_rx(port)) {
886 /* set UART timeout */
887 UART_PUT_RTOR(port, PDC_RX_TIMEOUT);
888 UART_PUT_CR(port, ATMEL_US_STTTO);
889
890 UART_PUT_IER(port, ATMEL_US_ENDRX | ATMEL_US_TIMEOUT);
891 /* enable PDC controller */
892 UART_PUT_PTCR(port, ATMEL_PDC_RXTEN);
893 } else {
894 /* enable receive only */
895 UART_PUT_IER(port, ATMEL_US_RXRDY);
896 }
442 897
443 return 0; 898 return 0;
444} 899}
@@ -448,6 +903,38 @@ static int atmel_startup(struct uart_port *port)
448 */ 903 */
449static void atmel_shutdown(struct uart_port *port) 904static void atmel_shutdown(struct uart_port *port)
450{ 905{
906 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
907 /*
908 * Ensure everything is stopped.
909 */
910 atmel_stop_rx(port);
911 atmel_stop_tx(port);
912
913 /*
914 * Shut-down the DMA.
915 */
916 if (atmel_use_dma_rx(port)) {
917 int i;
918
919 for (i = 0; i < 2; i++) {
920 struct atmel_dma_buffer *pdc = &atmel_port->pdc_rx[i];
921
922 dma_unmap_single(port->dev,
923 pdc->dma_addr,
924 pdc->dma_size,
925 DMA_FROM_DEVICE);
926 kfree(pdc->buf);
927 }
928 }
929 if (atmel_use_dma_tx(port)) {
930 struct atmel_dma_buffer *pdc = &atmel_port->pdc_tx;
931
932 dma_unmap_single(port->dev,
933 pdc->dma_addr,
934 pdc->dma_size,
935 DMA_TO_DEVICE);
936 }
937
451 /* 938 /*
452 * Disable all interrupts, port and break condition. 939 * Disable all interrupts, port and break condition.
453 */ 940 */
@@ -470,45 +957,48 @@ static void atmel_shutdown(struct uart_port *port)
470/* 957/*
471 * Power / Clock management. 958 * Power / Clock management.
472 */ 959 */
473static void atmel_serial_pm(struct uart_port *port, unsigned int state, unsigned int oldstate) 960static void atmel_serial_pm(struct uart_port *port, unsigned int state,
961 unsigned int oldstate)
474{ 962{
475 struct atmel_uart_port *atmel_port = (struct atmel_uart_port *) port; 963 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
476 964
477 switch (state) { 965 switch (state) {
478 case 0: 966 case 0:
479 /* 967 /*
480 * Enable the peripheral clock for this serial port. 968 * Enable the peripheral clock for this serial port.
481 * This is called on uart_open() or a resume event. 969 * This is called on uart_open() or a resume event.
482 */ 970 */
483 clk_enable(atmel_port->clk); 971 clk_enable(atmel_port->clk);
484 break; 972 break;
485 case 3: 973 case 3:
486 /* 974 /*
487 * Disable the peripheral clock for this serial port. 975 * Disable the peripheral clock for this serial port.
488 * This is called on uart_close() or a suspend event. 976 * This is called on uart_close() or a suspend event.
489 */ 977 */
490 clk_disable(atmel_port->clk); 978 clk_disable(atmel_port->clk);
491 break; 979 break;
492 default: 980 default:
493 printk(KERN_ERR "atmel_serial: unknown pm %d\n", state); 981 printk(KERN_ERR "atmel_serial: unknown pm %d\n", state);
494 } 982 }
495} 983}
496 984
497/* 985/*
498 * Change the port parameters 986 * Change the port parameters
499 */ 987 */
500static void atmel_set_termios(struct uart_port *port, struct ktermios * termios, struct ktermios * old) 988static void atmel_set_termios(struct uart_port *port, struct ktermios *termios,
989 struct ktermios *old)
501{ 990{
502 unsigned long flags; 991 unsigned long flags;
503 unsigned int mode, imr, quot, baud; 992 unsigned int mode, imr, quot, baud;
504 993
505 /* Get current mode register */ 994 /* Get current mode register */
506 mode = UART_GET_MR(port) & ~(ATMEL_US_USCLKS | ATMEL_US_CHRL | ATMEL_US_NBSTOP | ATMEL_US_PAR); 995 mode = UART_GET_MR(port) & ~(ATMEL_US_USCLKS | ATMEL_US_CHRL
996 | ATMEL_US_NBSTOP | ATMEL_US_PAR);
507 997
508 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16); 998 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk / 16);
509 quot = uart_get_divisor(port, baud); 999 quot = uart_get_divisor(port, baud);
510 1000
511 if (quot > 65535) { /* BRGR is 16-bit, so switch to slower clock */ 1001 if (quot > 65535) { /* BRGR is 16-bit, so switch to slower clock */
512 quot /= 8; 1002 quot /= 8;
513 mode |= ATMEL_US_USCLKS_MCK_DIV8; 1003 mode |= ATMEL_US_USCLKS_MCK_DIV8;
514 } 1004 }
@@ -535,18 +1025,17 @@ static void atmel_set_termios(struct uart_port *port, struct ktermios * termios,
535 1025
536 /* parity */ 1026 /* parity */
537 if (termios->c_cflag & PARENB) { 1027 if (termios->c_cflag & PARENB) {
538 if (termios->c_cflag & CMSPAR) { /* Mark or Space parity */ 1028 /* Mark or Space parity */
1029 if (termios->c_cflag & CMSPAR) {
539 if (termios->c_cflag & PARODD) 1030 if (termios->c_cflag & PARODD)
540 mode |= ATMEL_US_PAR_MARK; 1031 mode |= ATMEL_US_PAR_MARK;
541 else 1032 else
542 mode |= ATMEL_US_PAR_SPACE; 1033 mode |= ATMEL_US_PAR_SPACE;
543 } 1034 } else if (termios->c_cflag & PARODD)
544 else if (termios->c_cflag & PARODD)
545 mode |= ATMEL_US_PAR_ODD; 1035 mode |= ATMEL_US_PAR_ODD;
546 else 1036 else
547 mode |= ATMEL_US_PAR_EVEN; 1037 mode |= ATMEL_US_PAR_EVEN;
548 } 1038 } else
549 else
550 mode |= ATMEL_US_PAR_NONE; 1039 mode |= ATMEL_US_PAR_NONE;
551 1040
552 spin_lock_irqsave(&port->lock, flags); 1041 spin_lock_irqsave(&port->lock, flags);
@@ -557,6 +1046,10 @@ static void atmel_set_termios(struct uart_port *port, struct ktermios * termios,
557 if (termios->c_iflag & (BRKINT | PARMRK)) 1046 if (termios->c_iflag & (BRKINT | PARMRK))
558 port->read_status_mask |= ATMEL_US_RXBRK; 1047 port->read_status_mask |= ATMEL_US_RXBRK;
559 1048
1049 if (atmel_use_dma_rx(port))
1050 /* need to enable error interrupts */
1051 UART_PUT_IER(port, port->read_status_mask);
1052
560 /* 1053 /*
561 * Characters to ignore 1054 * Characters to ignore
562 */ 1055 */
@@ -572,16 +1065,16 @@ static void atmel_set_termios(struct uart_port *port, struct ktermios * termios,
572 if (termios->c_iflag & IGNPAR) 1065 if (termios->c_iflag & IGNPAR)
573 port->ignore_status_mask |= ATMEL_US_OVRE; 1066 port->ignore_status_mask |= ATMEL_US_OVRE;
574 } 1067 }
575 1068 /* TODO: Ignore all characters if CREAD is set.*/
576 // TODO: Ignore all characters if CREAD is set.
577 1069
578 /* update the per-port timeout */ 1070 /* update the per-port timeout */
579 uart_update_timeout(port, termios->c_cflag, baud); 1071 uart_update_timeout(port, termios->c_cflag, baud);
580 1072
581 /* disable interrupts and drain transmitter */ 1073 /* save/disable interrupts and drain transmitter */
582 imr = UART_GET_IMR(port); /* get interrupt mask */ 1074 imr = UART_GET_IMR(port);
583 UART_PUT_IDR(port, -1); /* disable all interrupts */ 1075 UART_PUT_IDR(port, -1);
584 while (!(UART_GET_CSR(port) & ATMEL_US_TXEMPTY)) { barrier(); } 1076 while (!(UART_GET_CSR(port) & ATMEL_US_TXEMPTY))
1077 cpu_relax();
585 1078
586 /* disable receiver and transmitter */ 1079 /* disable receiver and transmitter */
587 UART_PUT_CR(port, ATMEL_US_TXDIS | ATMEL_US_RXDIS); 1080 UART_PUT_CR(port, ATMEL_US_TXDIS | ATMEL_US_RXDIS);
@@ -707,7 +1200,8 @@ static struct uart_ops atmel_pops = {
707/* 1200/*
708 * Configure the port from the platform device resource info. 1201 * Configure the port from the platform device resource info.
709 */ 1202 */
710static void __devinit atmel_init_port(struct atmel_uart_port *atmel_port, struct platform_device *pdev) 1203static void __devinit atmel_init_port(struct atmel_uart_port *atmel_port,
1204 struct platform_device *pdev)
711{ 1205{
712 struct uart_port *port = &atmel_port->uart; 1206 struct uart_port *port = &atmel_port->uart;
713 struct atmel_uart_data *data = pdev->dev.platform_data; 1207 struct atmel_uart_data *data = pdev->dev.platform_data;
@@ -722,6 +1216,11 @@ static void __devinit atmel_init_port(struct atmel_uart_port *atmel_port, struct
722 port->mapbase = pdev->resource[0].start; 1216 port->mapbase = pdev->resource[0].start;
723 port->irq = pdev->resource[1].start; 1217 port->irq = pdev->resource[1].start;
724 1218
1219 tasklet_init(&atmel_port->tasklet, atmel_tasklet_func,
1220 (unsigned long)port);
1221
1222 memset(&atmel_port->rx_ring, 0, sizeof(atmel_port->rx_ring));
1223
725 if (data->regs) 1224 if (data->regs)
726 /* Already mapped by setup code */ 1225 /* Already mapped by setup code */
727 port->membase = data->regs; 1226 port->membase = data->regs;
@@ -730,11 +1229,17 @@ static void __devinit atmel_init_port(struct atmel_uart_port *atmel_port, struct
730 port->membase = NULL; 1229 port->membase = NULL;
731 } 1230 }
732 1231
733 if (!atmel_port->clk) { /* for console, the clock could already be configured */ 1232 /* for console, the clock could already be configured */
1233 if (!atmel_port->clk) {
734 atmel_port->clk = clk_get(&pdev->dev, "usart"); 1234 atmel_port->clk = clk_get(&pdev->dev, "usart");
735 clk_enable(atmel_port->clk); 1235 clk_enable(atmel_port->clk);
736 port->uartclk = clk_get_rate(atmel_port->clk); 1236 port->uartclk = clk_get_rate(atmel_port->clk);
737 } 1237 }
1238
1239 atmel_port->use_dma_rx = data->use_dma_rx;
1240 atmel_port->use_dma_tx = data->use_dma_tx;
1241 if (atmel_use_dma_tx(port))
1242 port->fifosize = PDC_BUFFER_SIZE;
738} 1243}
739 1244
740/* 1245/*
@@ -754,12 +1259,11 @@ void __init atmel_register_uart_fns(struct atmel_port_fns *fns)
754 atmel_pops.set_wake = fns->set_wake; 1259 atmel_pops.set_wake = fns->set_wake;
755} 1260}
756 1261
757
758#ifdef CONFIG_SERIAL_ATMEL_CONSOLE 1262#ifdef CONFIG_SERIAL_ATMEL_CONSOLE
759static void atmel_console_putchar(struct uart_port *port, int ch) 1263static void atmel_console_putchar(struct uart_port *port, int ch)
760{ 1264{
761 while (!(UART_GET_CSR(port) & ATMEL_US_TXRDY)) 1265 while (!(UART_GET_CSR(port) & ATMEL_US_TXRDY))
762 barrier(); 1266 cpu_relax();
763 UART_PUT_CHAR(port, ch); 1267 UART_PUT_CHAR(port, ch);
764} 1268}
765 1269
@@ -772,38 +1276,40 @@ static void atmel_console_write(struct console *co, const char *s, u_int count)
772 unsigned int status, imr; 1276 unsigned int status, imr;
773 1277
774 /* 1278 /*
775 * First, save IMR and then disable interrupts 1279 * First, save IMR and then disable interrupts
776 */ 1280 */
777 imr = UART_GET_IMR(port); /* get interrupt mask */ 1281 imr = UART_GET_IMR(port);
778 UART_PUT_IDR(port, ATMEL_US_RXRDY | ATMEL_US_TXRDY); 1282 UART_PUT_IDR(port, ATMEL_US_RXRDY | ATMEL_US_TXRDY);
779 1283
780 uart_console_write(port, s, count, atmel_console_putchar); 1284 uart_console_write(port, s, count, atmel_console_putchar);
781 1285
782 /* 1286 /*
783 * Finally, wait for transmitter to become empty 1287 * Finally, wait for transmitter to become empty
784 * and restore IMR 1288 * and restore IMR
785 */ 1289 */
786 do { 1290 do {
787 status = UART_GET_CSR(port); 1291 status = UART_GET_CSR(port);
788 } while (!(status & ATMEL_US_TXRDY)); 1292 } while (!(status & ATMEL_US_TXRDY));
789 UART_PUT_IER(port, imr); /* set interrupts back the way they were */ 1293 /* set interrupts back the way they were */
1294 UART_PUT_IER(port, imr);
790} 1295}
791 1296
792/* 1297/*
793 * If the port was already initialised (eg, by a boot loader), try to determine 1298 * If the port was already initialised (eg, by a boot loader),
794 * the current setup. 1299 * try to determine the current setup.
795 */ 1300 */
796static void __init atmel_console_get_options(struct uart_port *port, int *baud, int *parity, int *bits) 1301static void __init atmel_console_get_options(struct uart_port *port, int *baud,
1302 int *parity, int *bits)
797{ 1303{
798 unsigned int mr, quot; 1304 unsigned int mr, quot;
799 1305
800// TODO: CR is a write-only register 1306 /*
801// unsigned int cr; 1307 * If the baud rate generator isn't running, the port wasn't
802// 1308 * initialized by the boot loader.
803// cr = UART_GET_CR(port) & (ATMEL_US_RXEN | ATMEL_US_TXEN); 1309 */
804// if (cr == (ATMEL_US_RXEN | ATMEL_US_TXEN)) { 1310 quot = UART_GET_BRGR(port);
805// /* ok, the port was enabled */ 1311 if (!quot)
806// } 1312 return;
807 1313
808 mr = UART_GET_MR(port) & ATMEL_US_CHRL; 1314 mr = UART_GET_MR(port) & ATMEL_US_CHRL;
809 if (mr == ATMEL_US_CHRL_8) 1315 if (mr == ATMEL_US_CHRL_8)
@@ -823,7 +1329,6 @@ static void __init atmel_console_get_options(struct uart_port *port, int *baud,
823 * lower than one of those, as it would make us fall through 1329 * lower than one of those, as it would make us fall through
824 * to a much lower baud rate than we really want. 1330 * to a much lower baud rate than we really want.
825 */ 1331 */
826 quot = UART_GET_BRGR(port);
827 *baud = port->uartclk / (16 * (quot - 1)); 1332 *baud = port->uartclk / (16 * (quot - 1));
828} 1333}
829 1334
@@ -835,10 +1340,12 @@ static int __init atmel_console_setup(struct console *co, char *options)
835 int parity = 'n'; 1340 int parity = 'n';
836 int flow = 'n'; 1341 int flow = 'n';
837 1342
838 if (port->membase == 0) /* Port not initialized yet - delay setup */ 1343 if (port->membase == NULL) {
1344 /* Port not initialized yet - delay setup */
839 return -ENODEV; 1345 return -ENODEV;
1346 }
840 1347
841 UART_PUT_IDR(port, -1); /* disable interrupts */ 1348 UART_PUT_IDR(port, -1);
842 UART_PUT_CR(port, ATMEL_US_RSTSTA | ATMEL_US_RSTRX); 1349 UART_PUT_CR(port, ATMEL_US_RSTSTA | ATMEL_US_RSTRX);
843 UART_PUT_CR(port, ATMEL_US_TXEN | ATMEL_US_RXEN); 1350 UART_PUT_CR(port, ATMEL_US_TXEN | ATMEL_US_RXEN);
844 1351
@@ -870,13 +1377,16 @@ static struct console atmel_console = {
870static int __init atmel_console_init(void) 1377static int __init atmel_console_init(void)
871{ 1378{
872 if (atmel_default_console_device) { 1379 if (atmel_default_console_device) {
873 add_preferred_console(ATMEL_DEVICENAME, atmel_default_console_device->id, NULL); 1380 add_preferred_console(ATMEL_DEVICENAME,
874 atmel_init_port(&(atmel_ports[atmel_default_console_device->id]), atmel_default_console_device); 1381 atmel_default_console_device->id, NULL);
1382 atmel_init_port(&atmel_ports[atmel_default_console_device->id],
1383 atmel_default_console_device);
875 register_console(&atmel_console); 1384 register_console(&atmel_console);
876 } 1385 }
877 1386
878 return 0; 1387 return 0;
879} 1388}
1389
880console_initcall(atmel_console_init); 1390console_initcall(atmel_console_init);
881 1391
882/* 1392/*
@@ -884,34 +1394,48 @@ console_initcall(atmel_console_init);
884 */ 1394 */
885static int __init atmel_late_console_init(void) 1395static int __init atmel_late_console_init(void)
886{ 1396{
887 if (atmel_default_console_device && !(atmel_console.flags & CON_ENABLED)) 1397 if (atmel_default_console_device
1398 && !(atmel_console.flags & CON_ENABLED))
888 register_console(&atmel_console); 1399 register_console(&atmel_console);
889 1400
890 return 0; 1401 return 0;
891} 1402}
1403
892core_initcall(atmel_late_console_init); 1404core_initcall(atmel_late_console_init);
893 1405
1406static inline bool atmel_is_console_port(struct uart_port *port)
1407{
1408 return port->cons && port->cons->index == port->line;
1409}
1410
894#else 1411#else
895#define ATMEL_CONSOLE_DEVICE NULL 1412#define ATMEL_CONSOLE_DEVICE NULL
1413
1414static inline bool atmel_is_console_port(struct uart_port *port)
1415{
1416 return false;
1417}
896#endif 1418#endif
897 1419
898static struct uart_driver atmel_uart = { 1420static struct uart_driver atmel_uart = {
899 .owner = THIS_MODULE, 1421 .owner = THIS_MODULE,
900 .driver_name = "atmel_serial", 1422 .driver_name = "atmel_serial",
901 .dev_name = ATMEL_DEVICENAME, 1423 .dev_name = ATMEL_DEVICENAME,
902 .major = SERIAL_ATMEL_MAJOR, 1424 .major = SERIAL_ATMEL_MAJOR,
903 .minor = MINOR_START, 1425 .minor = MINOR_START,
904 .nr = ATMEL_MAX_UART, 1426 .nr = ATMEL_MAX_UART,
905 .cons = ATMEL_CONSOLE_DEVICE, 1427 .cons = ATMEL_CONSOLE_DEVICE,
906}; 1428};
907 1429
908#ifdef CONFIG_PM 1430#ifdef CONFIG_PM
909static int atmel_serial_suspend(struct platform_device *pdev, pm_message_t state) 1431static int atmel_serial_suspend(struct platform_device *pdev,
1432 pm_message_t state)
910{ 1433{
911 struct uart_port *port = platform_get_drvdata(pdev); 1434 struct uart_port *port = platform_get_drvdata(pdev);
912 struct atmel_uart_port *atmel_port = (struct atmel_uart_port *) port; 1435 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
913 1436
914 if (device_may_wakeup(&pdev->dev) && !at91_suspend_entering_slow_clock()) 1437 if (device_may_wakeup(&pdev->dev)
1438 && !at91_suspend_entering_slow_clock())
915 enable_irq_wake(port->irq); 1439 enable_irq_wake(port->irq);
916 else { 1440 else {
917 uart_suspend_port(&atmel_uart, port); 1441 uart_suspend_port(&atmel_uart, port);
@@ -924,13 +1448,12 @@ static int atmel_serial_suspend(struct platform_device *pdev, pm_message_t state
924static int atmel_serial_resume(struct platform_device *pdev) 1448static int atmel_serial_resume(struct platform_device *pdev)
925{ 1449{
926 struct uart_port *port = platform_get_drvdata(pdev); 1450 struct uart_port *port = platform_get_drvdata(pdev);
927 struct atmel_uart_port *atmel_port = (struct atmel_uart_port *) port; 1451 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
928 1452
929 if (atmel_port->suspended) { 1453 if (atmel_port->suspended) {
930 uart_resume_port(&atmel_uart, port); 1454 uart_resume_port(&atmel_uart, port);
931 atmel_port->suspended = 0; 1455 atmel_port->suspended = 0;
932 } 1456 } else
933 else
934 disable_irq_wake(port->irq); 1457 disable_irq_wake(port->irq);
935 1458
936 return 0; 1459 return 0;
@@ -943,15 +1466,40 @@ static int atmel_serial_resume(struct platform_device *pdev)
943static int __devinit atmel_serial_probe(struct platform_device *pdev) 1466static int __devinit atmel_serial_probe(struct platform_device *pdev)
944{ 1467{
945 struct atmel_uart_port *port; 1468 struct atmel_uart_port *port;
1469 void *data;
946 int ret; 1470 int ret;
947 1471
1472 BUILD_BUG_ON(!is_power_of_2(ATMEL_SERIAL_RINGSIZE));
1473
948 port = &atmel_ports[pdev->id]; 1474 port = &atmel_ports[pdev->id];
949 atmel_init_port(port, pdev); 1475 atmel_init_port(port, pdev);
950 1476
1477 if (!atmel_use_dma_rx(&port->uart)) {
1478 ret = -ENOMEM;
1479 data = kmalloc(sizeof(struct atmel_uart_char)
1480 * ATMEL_SERIAL_RINGSIZE, GFP_KERNEL);
1481 if (!data)
1482 goto err_alloc_ring;
1483 port->rx_ring.buf = data;
1484 }
1485
951 ret = uart_add_one_port(&atmel_uart, &port->uart); 1486 ret = uart_add_one_port(&atmel_uart, &port->uart);
952 if (!ret) { 1487 if (ret)
953 device_init_wakeup(&pdev->dev, 1); 1488 goto err_add_port;
954 platform_set_drvdata(pdev, port); 1489
1490 device_init_wakeup(&pdev->dev, 1);
1491 platform_set_drvdata(pdev, port);
1492
1493 return 0;
1494
1495err_add_port:
1496 kfree(port->rx_ring.buf);
1497 port->rx_ring.buf = NULL;
1498err_alloc_ring:
1499 if (!atmel_is_console_port(&port->uart)) {
1500 clk_disable(port->clk);
1501 clk_put(port->clk);
1502 port->clk = NULL;
955 } 1503 }
956 1504
957 return ret; 1505 return ret;
@@ -960,19 +1508,21 @@ static int __devinit atmel_serial_probe(struct platform_device *pdev)
960static int __devexit atmel_serial_remove(struct platform_device *pdev) 1508static int __devexit atmel_serial_remove(struct platform_device *pdev)
961{ 1509{
962 struct uart_port *port = platform_get_drvdata(pdev); 1510 struct uart_port *port = platform_get_drvdata(pdev);
963 struct atmel_uart_port *atmel_port = (struct atmel_uart_port *) port; 1511 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
964 int ret = 0; 1512 int ret = 0;
965 1513
966 clk_disable(atmel_port->clk);
967 clk_put(atmel_port->clk);
968
969 device_init_wakeup(&pdev->dev, 0); 1514 device_init_wakeup(&pdev->dev, 0);
970 platform_set_drvdata(pdev, NULL); 1515 platform_set_drvdata(pdev, NULL);
971 1516
972 if (port) { 1517 ret = uart_remove_one_port(&atmel_uart, port);
973 ret = uart_remove_one_port(&atmel_uart, port); 1518
974 kfree(port); 1519 tasklet_kill(&atmel_port->tasklet);
975 } 1520 kfree(atmel_port->rx_ring.buf);
1521
1522 /* "port" is allocated statically, so we shouldn't free it */
1523
1524 clk_disable(atmel_port->clk);
1525 clk_put(atmel_port->clk);
976 1526
977 return ret; 1527 return ret;
978} 1528}
diff --git a/drivers/serial/serial_core.c b/drivers/serial/serial_core.c
index 276da148c57e..0f5a17987cca 100644
--- a/drivers/serial/serial_core.c
+++ b/drivers/serial/serial_core.c
@@ -58,7 +58,8 @@ static struct lock_class_key port_lock_key;
58#define uart_console(port) (0) 58#define uart_console(port) (0)
59#endif 59#endif
60 60
61static void uart_change_speed(struct uart_state *state, struct ktermios *old_termios); 61static void uart_change_speed(struct uart_state *state,
62 struct ktermios *old_termios);
62static void uart_wait_until_sent(struct tty_struct *tty, int timeout); 63static void uart_wait_until_sent(struct tty_struct *tty, int timeout);
63static void uart_change_pm(struct uart_state *state, int pm_state); 64static void uart_change_pm(struct uart_state *state, int pm_state);
64 65
@@ -129,8 +130,8 @@ uart_update_mctrl(struct uart_port *port, unsigned int set, unsigned int clear)
129 spin_unlock_irqrestore(&port->lock, flags); 130 spin_unlock_irqrestore(&port->lock, flags);
130} 131}
131 132
132#define uart_set_mctrl(port,set) uart_update_mctrl(port,set,0) 133#define uart_set_mctrl(port, set) uart_update_mctrl(port, set, 0)
133#define uart_clear_mctrl(port,clear) uart_update_mctrl(port,0,clear) 134#define uart_clear_mctrl(port, clear) uart_update_mctrl(port, 0, clear)
134 135
135/* 136/*
136 * Startup the port. This will be called once per open. All calls 137 * Startup the port. This will be called once per open. All calls
@@ -290,7 +291,7 @@ uart_update_timeout(struct uart_port *port, unsigned int cflag,
290 break; 291 break;
291 default: 292 default:
292 bits = 10; 293 bits = 10;
293 break; // CS8 294 break; /* CS8 */
294 } 295 }
295 296
296 if (cflag & CSTOPB) 297 if (cflag & CSTOPB)
@@ -622,7 +623,7 @@ static int uart_get_info(struct uart_state *state,
622 tmp.close_delay = state->close_delay / 10; 623 tmp.close_delay = state->close_delay / 10;
623 tmp.closing_wait = state->closing_wait == USF_CLOSING_WAIT_NONE ? 624 tmp.closing_wait = state->closing_wait == USF_CLOSING_WAIT_NONE ?
624 ASYNC_CLOSING_WAIT_NONE : 625 ASYNC_CLOSING_WAIT_NONE :
625 state->closing_wait / 10; 626 state->closing_wait / 10;
626 tmp.custom_divisor = port->custom_divisor; 627 tmp.custom_divisor = port->custom_divisor;
627 tmp.hub6 = port->hub6; 628 tmp.hub6 = port->hub6;
628 tmp.io_type = port->iotype; 629 tmp.io_type = port->iotype;
@@ -788,7 +789,8 @@ static int uart_set_info(struct uart_state *state,
788 * We failed anyway. 789 * We failed anyway.
789 */ 790 */
790 retval = -EBUSY; 791 retval = -EBUSY;
791 goto exit; // Added to return the correct error -Ram Gupta 792 /* Added to return the correct error -Ram Gupta */
793 goto exit;
792 } 794 }
793 } 795 }
794 796
@@ -858,7 +860,7 @@ static int uart_get_lsr_info(struct uart_state *state,
858 ((uart_circ_chars_pending(&state->info->xmit) > 0) && 860 ((uart_circ_chars_pending(&state->info->xmit) > 0) &&
859 !state->info->tty->stopped && !state->info->tty->hw_stopped)) 861 !state->info->tty->stopped && !state->info->tty->hw_stopped))
860 result &= ~TIOCSER_TEMT; 862 result &= ~TIOCSER_TEMT;
861 863
862 return put_user(result, value); 864 return put_user(result, value);
863} 865}
864 866
@@ -996,8 +998,8 @@ uart_wait_modem_status(struct uart_state *state, unsigned long arg)
996 ((arg & TIOCM_DSR) && (cnow.dsr != cprev.dsr)) || 998 ((arg & TIOCM_DSR) && (cnow.dsr != cprev.dsr)) ||
997 ((arg & TIOCM_CD) && (cnow.dcd != cprev.dcd)) || 999 ((arg & TIOCM_CD) && (cnow.dcd != cprev.dcd)) ||
998 ((arg & TIOCM_CTS) && (cnow.cts != cprev.cts))) { 1000 ((arg & TIOCM_CTS) && (cnow.cts != cprev.cts))) {
999 ret = 0; 1001 ret = 0;
1000 break; 1002 break;
1001 } 1003 }
1002 1004
1003 schedule(); 1005 schedule();
@@ -1137,7 +1139,8 @@ uart_ioctl(struct tty_struct *tty, struct file *filp, unsigned int cmd,
1137 return ret; 1139 return ret;
1138} 1140}
1139 1141
1140static void uart_set_termios(struct tty_struct *tty, struct ktermios *old_termios) 1142static void uart_set_termios(struct tty_struct *tty,
1143 struct ktermios *old_termios)
1141{ 1144{
1142 struct uart_state *state = tty->driver_data; 1145 struct uart_state *state = tty->driver_data;
1143 unsigned long flags; 1146 unsigned long flags;
@@ -1213,7 +1216,7 @@ static void uart_close(struct tty_struct *tty, struct file *filp)
1213{ 1216{
1214 struct uart_state *state = tty->driver_data; 1217 struct uart_state *state = tty->driver_data;
1215 struct uart_port *port; 1218 struct uart_port *port;
1216 1219
1217 BUG_ON(!kernel_locked()); 1220 BUG_ON(!kernel_locked());
1218 1221
1219 if (!state || !state->port) 1222 if (!state || !state->port)
@@ -1278,8 +1281,8 @@ static void uart_close(struct tty_struct *tty, struct file *filp)
1278 uart_shutdown(state); 1281 uart_shutdown(state);
1279 uart_flush_buffer(tty); 1282 uart_flush_buffer(tty);
1280 1283
1281 tty_ldisc_flush(tty); 1284 tty_ldisc_flush(tty);
1282 1285
1283 tty->closing = 0; 1286 tty->closing = 0;
1284 state->info->tty = NULL; 1287 state->info->tty = NULL;
1285 1288
@@ -1341,7 +1344,7 @@ static void uart_wait_until_sent(struct tty_struct *tty, int timeout)
1341 expire = jiffies + timeout; 1344 expire = jiffies + timeout;
1342 1345
1343 pr_debug("uart_wait_until_sent(%d), jiffies=%lu, expire=%lu...\n", 1346 pr_debug("uart_wait_until_sent(%d), jiffies=%lu, expire=%lu...\n",
1344 port->line, jiffies, expire); 1347 port->line, jiffies, expire);
1345 1348
1346 /* 1349 /*
1347 * Check whether the transmitter is empty every 'char_time'. 1350 * Check whether the transmitter is empty every 'char_time'.
@@ -1460,10 +1463,9 @@ uart_block_til_ready(struct file *filp, struct uart_state *state)
1460 * have set TTY_IO_ERROR for a non-existant port. 1463 * have set TTY_IO_ERROR for a non-existant port.
1461 */ 1464 */
1462 if ((filp->f_flags & O_NONBLOCK) || 1465 if ((filp->f_flags & O_NONBLOCK) ||
1463 (info->tty->termios->c_cflag & CLOCAL) || 1466 (info->tty->termios->c_cflag & CLOCAL) ||
1464 (info->tty->flags & (1 << TTY_IO_ERROR))) { 1467 (info->tty->flags & (1 << TTY_IO_ERROR)))
1465 break; 1468 break;
1466 }
1467 1469
1468 /* 1470 /*
1469 * Set DTR to allow modem to know we're waiting. Do 1471 * Set DTR to allow modem to know we're waiting. Do
@@ -1551,8 +1553,8 @@ static struct uart_state *uart_get(struct uart_driver *drv, int line)
1551} 1553}
1552 1554
1553/* 1555/*
1554 * In 2.4.5, calls to uart_open are serialised by the BKL in 1556 * calls to uart_open are serialised by the BKL in
1555 * linux/fs/devices.c:chrdev_open() 1557 * fs/char_dev.c:chrdev_open()
1556 * Note that if this fails, then uart_close() _will_ be called. 1558 * Note that if this fails, then uart_close() _will_ be called.
1557 * 1559 *
1558 * In time, we want to scrap the "opening nonpresent ports" 1560 * In time, we want to scrap the "opening nonpresent ports"
@@ -1674,7 +1676,7 @@ static int uart_line_info(char *buf, struct uart_driver *drv, int i)
1674 port->line, uart_type(port), 1676 port->line, uart_type(port),
1675 mmio ? "mmio:0x" : "port:", 1677 mmio ? "mmio:0x" : "port:",
1676 mmio ? (unsigned long long)port->mapbase 1678 mmio ? (unsigned long long)port->mapbase
1677 : (unsigned long long) port->iobase, 1679 : (unsigned long long) port->iobase,
1678 port->irq); 1680 port->irq);
1679 1681
1680 if (port->type == PORT_UNKNOWN) { 1682 if (port->type == PORT_UNKNOWN) {
@@ -1682,8 +1684,7 @@ static int uart_line_info(char *buf, struct uart_driver *drv, int i)
1682 return ret + 1; 1684 return ret + 1;
1683 } 1685 }
1684 1686
1685 if(capable(CAP_SYS_ADMIN)) 1687 if (capable(CAP_SYS_ADMIN)) {
1686 {
1687 mutex_lock(&state->mutex); 1688 mutex_lock(&state->mutex);
1688 pm_state = state->pm_state; 1689 pm_state = state->pm_state;
1689 if (pm_state) 1690 if (pm_state)
@@ -1709,12 +1710,12 @@ static int uart_line_info(char *buf, struct uart_driver *drv, int i)
1709 if (port->icount.overrun) 1710 if (port->icount.overrun)
1710 ret += sprintf(buf + ret, " oe:%d", 1711 ret += sprintf(buf + ret, " oe:%d",
1711 port->icount.overrun); 1712 port->icount.overrun);
1712 1713
1713#define INFOBIT(bit,str) \ 1714#define INFOBIT(bit, str) \
1714 if (port->mctrl & (bit)) \ 1715 if (port->mctrl & (bit)) \
1715 strncat(stat_buf, (str), sizeof(stat_buf) - \ 1716 strncat(stat_buf, (str), sizeof(stat_buf) - \
1716 strlen(stat_buf) - 2) 1717 strlen(stat_buf) - 2)
1717#define STATBIT(bit,str) \ 1718#define STATBIT(bit, str) \
1718 if (status & (bit)) \ 1719 if (status & (bit)) \
1719 strncat(stat_buf, (str), sizeof(stat_buf) - \ 1720 strncat(stat_buf, (str), sizeof(stat_buf) - \
1720 strlen(stat_buf) - 2) 1721 strlen(stat_buf) - 2)
@@ -1730,7 +1731,7 @@ static int uart_line_info(char *buf, struct uart_driver *drv, int i)
1730 if (stat_buf[0]) 1731 if (stat_buf[0])
1731 stat_buf[0] = ' '; 1732 stat_buf[0] = ' ';
1732 strcat(stat_buf, "\n"); 1733 strcat(stat_buf, "\n");
1733 1734
1734 ret += sprintf(buf + ret, stat_buf); 1735 ret += sprintf(buf + ret, stat_buf);
1735 } else { 1736 } else {
1736 strcat(buf, "\n"); 1737 strcat(buf, "\n");
@@ -1992,11 +1993,11 @@ int uart_suspend_port(struct uart_driver *drv, struct uart_port *port)
1992 /* 1993 /*
1993 * Wait for the transmitter to empty. 1994 * Wait for the transmitter to empty.
1994 */ 1995 */
1995 for (tries = 3; !ops->tx_empty(port) && tries; tries--) { 1996 for (tries = 3; !ops->tx_empty(port) && tries; tries--)
1996 msleep(10); 1997 msleep(10);
1997 }
1998 if (!tries) 1998 if (!tries)
1999 printk(KERN_ERR "%s%s%s%d: Unable to drain transmitter\n", 1999 printk(KERN_ERR "%s%s%s%d: Unable to drain "
2000 "transmitter\n",
2000 port->dev ? port->dev->bus_id : "", 2001 port->dev ? port->dev->bus_id : "",
2001 port->dev ? ": " : "", 2002 port->dev ? ": " : "",
2002 drv->dev_name, port->line); 2003 drv->dev_name, port->line);
diff --git a/drivers/thermal/Kconfig b/drivers/thermal/Kconfig
index 9b3f61200000..69f19f224875 100644
--- a/drivers/thermal/Kconfig
+++ b/drivers/thermal/Kconfig
@@ -9,7 +9,7 @@ menuconfig THERMAL
9 Generic Thermal Sysfs driver offers a generic mechanism for 9 Generic Thermal Sysfs driver offers a generic mechanism for
10 thermal management. Usually it's made up of one or more thermal 10 thermal management. Usually it's made up of one or more thermal
11 zone and cooling device. 11 zone and cooling device.
12 each thermal zone contains its own temperature, trip points, 12 Each thermal zone contains its own temperature, trip points,
13 cooling devices. 13 cooling devices.
14 All platforms with ACPI thermal support can use this driver. 14 All platforms with ACPI thermal support can use this driver.
15 If you want this support, you should say Y here 15 If you want this support, you should say Y here.
diff --git a/drivers/thermal/thermal.c b/drivers/thermal/thermal.c
index 3273e348fd14..e782b3e7fcdb 100644
--- a/drivers/thermal/thermal.c
+++ b/drivers/thermal/thermal.c
@@ -267,7 +267,7 @@ thermal_cooling_device_cur_state_store(struct device *dev,
267} 267}
268 268
269static struct device_attribute dev_attr_cdev_type = 269static struct device_attribute dev_attr_cdev_type =
270 __ATTR(type, 0444, thermal_cooling_device_type_show, NULL); 270__ATTR(type, 0444, thermal_cooling_device_type_show, NULL);
271static DEVICE_ATTR(max_state, 0444, 271static DEVICE_ATTR(max_state, 0444,
272 thermal_cooling_device_max_state_show, NULL); 272 thermal_cooling_device_max_state_show, NULL);
273static DEVICE_ATTR(cur_state, 0644, 273static DEVICE_ATTR(cur_state, 0644,
@@ -276,7 +276,7 @@ static DEVICE_ATTR(cur_state, 0644,
276 276
277static ssize_t 277static ssize_t
278thermal_cooling_device_trip_point_show(struct device *dev, 278thermal_cooling_device_trip_point_show(struct device *dev,
279 struct device_attribute *attr, char *buf) 279 struct device_attribute *attr, char *buf)
280{ 280{
281 struct thermal_cooling_device_instance *instance; 281 struct thermal_cooling_device_instance *instance;
282 282
@@ -293,11 +293,12 @@ thermal_cooling_device_trip_point_show(struct device *dev,
293 293
294/** 294/**
295 * thermal_zone_bind_cooling_device - bind a cooling device to a thermal zone 295 * thermal_zone_bind_cooling_device - bind a cooling device to a thermal zone
296 * this function is usually called in the thermal zone device .bind callback.
297 * @tz: thermal zone device 296 * @tz: thermal zone device
298 * @trip: indicates which trip point the cooling devices is 297 * @trip: indicates which trip point the cooling devices is
299 * associated with in this thermal zone. 298 * associated with in this thermal zone.
300 * @cdev: thermal cooling device 299 * @cdev: thermal cooling device
300 *
301 * This function is usually called in the thermal zone device .bind callback.
301 */ 302 */
302int thermal_zone_bind_cooling_device(struct thermal_zone_device *tz, 303int thermal_zone_bind_cooling_device(struct thermal_zone_device *tz,
303 int trip, 304 int trip,
@@ -307,8 +308,7 @@ int thermal_zone_bind_cooling_device(struct thermal_zone_device *tz,
307 struct thermal_cooling_device_instance *pos; 308 struct thermal_cooling_device_instance *pos;
308 int result; 309 int result;
309 310
310 if (trip >= tz->trips || 311 if (trip >= tz->trips || (trip < 0 && trip != THERMAL_TRIPS_NONE))
311 (trip < 0 && trip != THERMAL_TRIPS_NONE))
312 return -EINVAL; 312 return -EINVAL;
313 313
314 if (!tz || !cdev) 314 if (!tz || !cdev)
@@ -361,15 +361,17 @@ int thermal_zone_bind_cooling_device(struct thermal_zone_device *tz,
361 kfree(dev); 361 kfree(dev);
362 return result; 362 return result;
363} 363}
364
364EXPORT_SYMBOL(thermal_zone_bind_cooling_device); 365EXPORT_SYMBOL(thermal_zone_bind_cooling_device);
365 366
366/** 367/**
367 * thermal_zone_unbind_cooling_device - unbind a cooling device from a thermal zone 368 * thermal_zone_unbind_cooling_device - unbind a cooling device from a thermal zone
368 * this function is usually called in the thermal zone device .unbind callback.
369 * @tz: thermal zone device 369 * @tz: thermal zone device
370 * @trip: indicates which trip point the cooling devices is 370 * @trip: indicates which trip point the cooling devices is
371 * associated with in this thermal zone. 371 * associated with in this thermal zone.
372 * @cdev: thermal cooling device 372 * @cdev: thermal cooling device
373 *
374 * This function is usually called in the thermal zone device .unbind callback.
373 */ 375 */
374int thermal_zone_unbind_cooling_device(struct thermal_zone_device *tz, 376int thermal_zone_unbind_cooling_device(struct thermal_zone_device *tz,
375 int trip, 377 int trip,
@@ -379,8 +381,7 @@ int thermal_zone_unbind_cooling_device(struct thermal_zone_device *tz,
379 381
380 mutex_lock(&tz->lock); 382 mutex_lock(&tz->lock);
381 list_for_each_entry_safe(pos, next, &tz->cooling_devices, node) { 383 list_for_each_entry_safe(pos, next, &tz->cooling_devices, node) {
382 if (pos->tz == tz && pos->trip == trip 384 if (pos->tz == tz && pos->trip == trip && pos->cdev == cdev) {
383 && pos->cdev == cdev) {
384 list_del(&pos->node); 385 list_del(&pos->node);
385 mutex_unlock(&tz->lock); 386 mutex_unlock(&tz->lock);
386 goto unbind; 387 goto unbind;
@@ -397,6 +398,7 @@ int thermal_zone_unbind_cooling_device(struct thermal_zone_device *tz,
397 kfree(pos); 398 kfree(pos);
398 return 0; 399 return 0;
399} 400}
401
400EXPORT_SYMBOL(thermal_zone_unbind_cooling_device); 402EXPORT_SYMBOL(thermal_zone_unbind_cooling_device);
401 403
402static void thermal_release(struct device *dev) 404static void thermal_release(struct device *dev)
@@ -425,7 +427,10 @@ static struct class thermal_class = {
425 * @ops: standard thermal cooling devices callbacks. 427 * @ops: standard thermal cooling devices callbacks.
426 */ 428 */
427struct thermal_cooling_device *thermal_cooling_device_register(char *type, 429struct thermal_cooling_device *thermal_cooling_device_register(char *type,
428 void *devdata, struct thermal_cooling_device_ops *ops) 430 void *devdata,
431 struct
432 thermal_cooling_device_ops
433 *ops)
429{ 434{
430 struct thermal_cooling_device *cdev; 435 struct thermal_cooling_device *cdev;
431 struct thermal_zone_device *pos; 436 struct thermal_zone_device *pos;
@@ -435,7 +440,7 @@ struct thermal_cooling_device *thermal_cooling_device_register(char *type,
435 return NULL; 440 return NULL;
436 441
437 if (!ops || !ops->get_max_state || !ops->get_cur_state || 442 if (!ops || !ops->get_max_state || !ops->get_cur_state ||
438 !ops->set_cur_state) 443 !ops->set_cur_state)
439 return NULL; 444 return NULL;
440 445
441 cdev = kzalloc(sizeof(struct thermal_cooling_device), GFP_KERNEL); 446 cdev = kzalloc(sizeof(struct thermal_cooling_device), GFP_KERNEL);
@@ -462,8 +467,7 @@ struct thermal_cooling_device *thermal_cooling_device_register(char *type,
462 467
463 /* sys I/F */ 468 /* sys I/F */
464 if (type) { 469 if (type) {
465 result = device_create_file(&cdev->device, 470 result = device_create_file(&cdev->device, &dev_attr_cdev_type);
466 &dev_attr_cdev_type);
467 if (result) 471 if (result)
468 goto unregister; 472 goto unregister;
469 } 473 }
@@ -496,11 +500,11 @@ struct thermal_cooling_device *thermal_cooling_device_register(char *type,
496 device_unregister(&cdev->device); 500 device_unregister(&cdev->device);
497 return NULL; 501 return NULL;
498} 502}
503
499EXPORT_SYMBOL(thermal_cooling_device_register); 504EXPORT_SYMBOL(thermal_cooling_device_register);
500 505
501/** 506/**
502 * thermal_cooling_device_unregister - removes the registered thermal cooling device 507 * thermal_cooling_device_unregister - removes the registered thermal cooling device
503 *
504 * @cdev: the thermal cooling device to remove. 508 * @cdev: the thermal cooling device to remove.
505 * 509 *
506 * thermal_cooling_device_unregister() must be called when the device is no 510 * thermal_cooling_device_unregister() must be called when the device is no
@@ -533,8 +537,7 @@ void thermal_cooling_device_unregister(struct
533 } 537 }
534 mutex_unlock(&thermal_list_lock); 538 mutex_unlock(&thermal_list_lock);
535 if (cdev->type[0]) 539 if (cdev->type[0])
536 device_remove_file(&cdev->device, 540 device_remove_file(&cdev->device, &dev_attr_cdev_type);
537 &dev_attr_cdev_type);
538 device_remove_file(&cdev->device, &dev_attr_max_state); 541 device_remove_file(&cdev->device, &dev_attr_max_state);
539 device_remove_file(&cdev->device, &dev_attr_cur_state); 542 device_remove_file(&cdev->device, &dev_attr_cur_state);
540 543
@@ -542,6 +545,7 @@ void thermal_cooling_device_unregister(struct
542 device_unregister(&cdev->device); 545 device_unregister(&cdev->device);
543 return; 546 return;
544} 547}
548
545EXPORT_SYMBOL(thermal_cooling_device_unregister); 549EXPORT_SYMBOL(thermal_cooling_device_unregister);
546 550
547/** 551/**
@@ -555,8 +559,10 @@ EXPORT_SYMBOL(thermal_cooling_device_unregister);
555 * longer needed. 559 * longer needed.
556 */ 560 */
557struct thermal_zone_device *thermal_zone_device_register(char *type, 561struct thermal_zone_device *thermal_zone_device_register(char *type,
558 int trips, void *devdata, 562 int trips,
559 struct thermal_zone_device_ops *ops) 563 void *devdata, struct
564 thermal_zone_device_ops
565 *ops)
560{ 566{
561 struct thermal_zone_device *tz; 567 struct thermal_zone_device *tz;
562 struct thermal_cooling_device *pos; 568 struct thermal_cooling_device *pos;
@@ -625,9 +631,9 @@ struct thermal_zone_device *thermal_zone_device_register(char *type,
625 list_add_tail(&tz->node, &thermal_tz_list); 631 list_add_tail(&tz->node, &thermal_tz_list);
626 if (ops->bind) 632 if (ops->bind)
627 list_for_each_entry(pos, &thermal_cdev_list, node) { 633 list_for_each_entry(pos, &thermal_cdev_list, node) {
628 result = ops->bind(tz, pos); 634 result = ops->bind(tz, pos);
629 if (result) 635 if (result)
630 break; 636 break;
631 } 637 }
632 mutex_unlock(&thermal_list_lock); 638 mutex_unlock(&thermal_list_lock);
633 639
@@ -639,11 +645,11 @@ struct thermal_zone_device *thermal_zone_device_register(char *type,
639 device_unregister(&tz->device); 645 device_unregister(&tz->device);
640 return NULL; 646 return NULL;
641} 647}
648
642EXPORT_SYMBOL(thermal_zone_device_register); 649EXPORT_SYMBOL(thermal_zone_device_register);
643 650
644/** 651/**
645 * thermal_device_unregister - removes the registered thermal zone device 652 * thermal_device_unregister - removes the registered thermal zone device
646 *
647 * @tz: the thermal zone device to remove 653 * @tz: the thermal zone device to remove
648 */ 654 */
649void thermal_zone_device_unregister(struct thermal_zone_device *tz) 655void thermal_zone_device_unregister(struct thermal_zone_device *tz)
@@ -685,6 +691,7 @@ void thermal_zone_device_unregister(struct thermal_zone_device *tz)
685 device_unregister(&tz->device); 691 device_unregister(&tz->device);
686 return; 692 return;
687} 693}
694
688EXPORT_SYMBOL(thermal_zone_device_unregister); 695EXPORT_SYMBOL(thermal_zone_device_unregister);
689 696
690static int __init thermal_init(void) 697static int __init thermal_init(void)
diff --git a/drivers/usb/gadget/net2280.c b/drivers/usb/gadget/net2280.c
index 33469cf5aec3..e01862300169 100644
--- a/drivers/usb/gadget/net2280.c
+++ b/drivers/usb/gadget/net2280.c
@@ -1418,8 +1418,8 @@ show_function (struct device *_dev, struct device_attribute *attr, char *buf)
1418} 1418}
1419static DEVICE_ATTR (function, S_IRUGO, show_function, NULL); 1419static DEVICE_ATTR (function, S_IRUGO, show_function, NULL);
1420 1420
1421static ssize_t 1421static ssize_t net2280_show_registers(struct device *_dev,
1422show_registers (struct device *_dev, struct device_attribute *attr, char *buf) 1422 struct device_attribute *attr, char *buf)
1423{ 1423{
1424 struct net2280 *dev; 1424 struct net2280 *dev;
1425 char *next; 1425 char *next;
@@ -1571,7 +1571,7 @@ show_registers (struct device *_dev, struct device_attribute *attr, char *buf)
1571 1571
1572 return PAGE_SIZE - size; 1572 return PAGE_SIZE - size;
1573} 1573}
1574static DEVICE_ATTR (registers, S_IRUGO, show_registers, NULL); 1574static DEVICE_ATTR(registers, S_IRUGO, net2280_show_registers, NULL);
1575 1575
1576static ssize_t 1576static ssize_t
1577show_queues (struct device *_dev, struct device_attribute *attr, char *buf) 1577show_queues (struct device *_dev, struct device_attribute *attr, char *buf)
diff --git a/drivers/video/console/Kconfig b/drivers/video/console/Kconfig
index 2b53d1f56281..06f87b04f207 100644
--- a/drivers/video/console/Kconfig
+++ b/drivers/video/console/Kconfig
@@ -6,7 +6,7 @@ menu "Console display driver support"
6 6
7config VGA_CONSOLE 7config VGA_CONSOLE
8 bool "VGA text console" if EMBEDDED || !X86 8 bool "VGA text console" if EMBEDDED || !X86
9 depends on !ARCH_ACORN && !ARCH_EBSA110 && !4xx && !8xx && !SPARC && !M68K && !PARISC && !FRV && !ARCH_VERSATILE && !SUPERH && !BLACKFIN && !AVR32 9 depends on !ARCH_ACORN && !ARCH_EBSA110 && !4xx && !8xx && !SPARC && !M68K && !PARISC && !FRV && !ARCH_VERSATILE && !SUPERH && !BLACKFIN && !AVR32 && !MN10300
10 default y 10 default y
11 help 11 help
12 Saying Y here will allow you to use Linux in text mode through a 12 Saying Y here will allow you to use Linux in text mode through a
diff --git a/fs/Kconfig.binfmt b/fs/Kconfig.binfmt
index 7c3d5f923da1..b5c3b6114add 100644
--- a/fs/Kconfig.binfmt
+++ b/fs/Kconfig.binfmt
@@ -61,7 +61,8 @@ config BINFMT_SHARED_FLAT
61 61
62config BINFMT_AOUT 62config BINFMT_AOUT
63 tristate "Kernel support for a.out and ECOFF binaries" 63 tristate "Kernel support for a.out and ECOFF binaries"
64 depends on X86_32 || ALPHA || ARM || M68K || SPARC32 64 depends on ARCH_SUPPORTS_AOUT && \
65 (X86_32 || ALPHA || ARM || M68K || SPARC32)
65 ---help--- 66 ---help---
66 A.out (Assembler.OUTput) is a set of formats for libraries and 67 A.out (Assembler.OUTput) is a set of formats for libraries and
67 executables used in the earliest versions of UNIX. Linux used 68 executables used in the earliest versions of UNIX. Linux used
diff --git a/fs/adfs/super.c b/fs/adfs/super.c
index b36695ae5c2e..9e421eeb672b 100644
--- a/fs/adfs/super.c
+++ b/fs/adfs/super.c
@@ -20,6 +20,8 @@
20#include <linux/vfs.h> 20#include <linux/vfs.h>
21#include <linux/parser.h> 21#include <linux/parser.h>
22#include <linux/bitops.h> 22#include <linux/bitops.h>
23#include <linux/mount.h>
24#include <linux/seq_file.h>
23 25
24#include <asm/uaccess.h> 26#include <asm/uaccess.h>
25#include <asm/system.h> 27#include <asm/system.h>
@@ -30,6 +32,9 @@
30#include "dir_f.h" 32#include "dir_f.h"
31#include "dir_fplus.h" 33#include "dir_fplus.h"
32 34
35#define ADFS_DEFAULT_OWNER_MASK S_IRWXU
36#define ADFS_DEFAULT_OTHER_MASK (S_IRWXG | S_IRWXO)
37
33void __adfs_error(struct super_block *sb, const char *function, const char *fmt, ...) 38void __adfs_error(struct super_block *sb, const char *function, const char *fmt, ...)
34{ 39{
35 char error_buf[128]; 40 char error_buf[128];
@@ -134,6 +139,22 @@ static void adfs_put_super(struct super_block *sb)
134 sb->s_fs_info = NULL; 139 sb->s_fs_info = NULL;
135} 140}
136 141
142static int adfs_show_options(struct seq_file *seq, struct vfsmount *mnt)
143{
144 struct adfs_sb_info *asb = ADFS_SB(mnt->mnt_sb);
145
146 if (asb->s_uid != 0)
147 seq_printf(seq, ",uid=%u", asb->s_uid);
148 if (asb->s_gid != 0)
149 seq_printf(seq, ",gid=%u", asb->s_gid);
150 if (asb->s_owner_mask != ADFS_DEFAULT_OWNER_MASK)
151 seq_printf(seq, ",ownmask=%o", asb->s_owner_mask);
152 if (asb->s_other_mask != ADFS_DEFAULT_OTHER_MASK)
153 seq_printf(seq, ",othmask=%o", asb->s_other_mask);
154
155 return 0;
156}
157
137enum {Opt_uid, Opt_gid, Opt_ownmask, Opt_othmask, Opt_err}; 158enum {Opt_uid, Opt_gid, Opt_ownmask, Opt_othmask, Opt_err};
138 159
139static match_table_t tokens = { 160static match_table_t tokens = {
@@ -259,6 +280,7 @@ static const struct super_operations adfs_sops = {
259 .put_super = adfs_put_super, 280 .put_super = adfs_put_super,
260 .statfs = adfs_statfs, 281 .statfs = adfs_statfs,
261 .remount_fs = adfs_remount, 282 .remount_fs = adfs_remount,
283 .show_options = adfs_show_options,
262}; 284};
263 285
264static struct adfs_discmap *adfs_read_map(struct super_block *sb, struct adfs_discrecord *dr) 286static struct adfs_discmap *adfs_read_map(struct super_block *sb, struct adfs_discrecord *dr)
@@ -344,8 +366,8 @@ static int adfs_fill_super(struct super_block *sb, void *data, int silent)
344 /* set default options */ 366 /* set default options */
345 asb->s_uid = 0; 367 asb->s_uid = 0;
346 asb->s_gid = 0; 368 asb->s_gid = 0;
347 asb->s_owner_mask = S_IRWXU; 369 asb->s_owner_mask = ADFS_DEFAULT_OWNER_MASK;
348 asb->s_other_mask = S_IRWXG | S_IRWXO; 370 asb->s_other_mask = ADFS_DEFAULT_OTHER_MASK;
349 371
350 if (parse_options(sb, data)) 372 if (parse_options(sb, data))
351 goto error; 373 goto error;
diff --git a/fs/affs/super.c b/fs/affs/super.c
index 3c45d49c0d26..d2dc047cb479 100644
--- a/fs/affs/super.c
+++ b/fs/affs/super.c
@@ -122,6 +122,7 @@ static const struct super_operations affs_sops = {
122 .write_super = affs_write_super, 122 .write_super = affs_write_super,
123 .statfs = affs_statfs, 123 .statfs = affs_statfs,
124 .remount_fs = affs_remount, 124 .remount_fs = affs_remount,
125 .show_options = generic_show_options,
125}; 126};
126 127
127enum { 128enum {
@@ -272,6 +273,8 @@ static int affs_fill_super(struct super_block *sb, void *data, int silent)
272 u8 sig[4]; 273 u8 sig[4];
273 int ret = -EINVAL; 274 int ret = -EINVAL;
274 275
276 save_mount_options(sb, data);
277
275 pr_debug("AFFS: read_super(%s)\n",data ? (const char *)data : "no options"); 278 pr_debug("AFFS: read_super(%s)\n",data ? (const char *)data : "no options");
276 279
277 sb->s_magic = AFFS_SUPER_MAGIC; 280 sb->s_magic = AFFS_SUPER_MAGIC;
@@ -487,14 +490,21 @@ affs_remount(struct super_block *sb, int *flags, char *data)
487 int root_block; 490 int root_block;
488 unsigned long mount_flags; 491 unsigned long mount_flags;
489 int res = 0; 492 int res = 0;
493 char *new_opts = kstrdup(data, GFP_KERNEL);
490 494
491 pr_debug("AFFS: remount(flags=0x%x,opts=\"%s\")\n",*flags,data); 495 pr_debug("AFFS: remount(flags=0x%x,opts=\"%s\")\n",*flags,data);
492 496
493 *flags |= MS_NODIRATIME; 497 *flags |= MS_NODIRATIME;
494 498
495 if (!parse_options(data,&uid,&gid,&mode,&reserved,&root_block, 499 if (!parse_options(data, &uid, &gid, &mode, &reserved, &root_block,
496 &blocksize,&sbi->s_prefix,sbi->s_volume,&mount_flags)) 500 &blocksize, &sbi->s_prefix, sbi->s_volume,
501 &mount_flags)) {
502 kfree(new_opts);
497 return -EINVAL; 503 return -EINVAL;
504 }
505 kfree(sb->s_options);
506 sb->s_options = new_opts;
507
498 sbi->s_flags = mount_flags; 508 sbi->s_flags = mount_flags;
499 sbi->s_mode = mode; 509 sbi->s_mode = mode;
500 sbi->s_uid = uid; 510 sbi->s_uid = uid;
diff --git a/fs/afs/security.c b/fs/afs/security.c
index 9446a1fd108a..3bcbeceba1bb 100644
--- a/fs/afs/security.c
+++ b/fs/afs/security.c
@@ -287,7 +287,7 @@ static int afs_check_permit(struct afs_vnode *vnode, struct key *key,
287int afs_permission(struct inode *inode, int mask, struct nameidata *nd) 287int afs_permission(struct inode *inode, int mask, struct nameidata *nd)
288{ 288{
289 struct afs_vnode *vnode = AFS_FS_I(inode); 289 struct afs_vnode *vnode = AFS_FS_I(inode);
290 afs_access_t access; 290 afs_access_t uninitialized_var(access);
291 struct key *key; 291 struct key *key;
292 int ret; 292 int ret;
293 293
diff --git a/fs/afs/super.c b/fs/afs/super.c
index 4b2558c42213..36bbce45f44b 100644
--- a/fs/afs/super.c
+++ b/fs/afs/super.c
@@ -52,6 +52,7 @@ static const struct super_operations afs_super_ops = {
52 .clear_inode = afs_clear_inode, 52 .clear_inode = afs_clear_inode,
53 .umount_begin = afs_umount_begin, 53 .umount_begin = afs_umount_begin,
54 .put_super = afs_put_super, 54 .put_super = afs_put_super,
55 .show_options = generic_show_options,
55}; 56};
56 57
57static struct kmem_cache *afs_inode_cachep; 58static struct kmem_cache *afs_inode_cachep;
@@ -357,6 +358,7 @@ static int afs_get_sb(struct file_system_type *fs_type,
357 struct super_block *sb; 358 struct super_block *sb;
358 struct afs_volume *vol; 359 struct afs_volume *vol;
359 struct key *key; 360 struct key *key;
361 char *new_opts = kstrdup(options, GFP_KERNEL);
360 int ret; 362 int ret;
361 363
362 _enter(",,%s,%p", dev_name, options); 364 _enter(",,%s,%p", dev_name, options);
@@ -408,9 +410,11 @@ static int afs_get_sb(struct file_system_type *fs_type,
408 deactivate_super(sb); 410 deactivate_super(sb);
409 goto error; 411 goto error;
410 } 412 }
413 sb->s_options = new_opts;
411 sb->s_flags |= MS_ACTIVE; 414 sb->s_flags |= MS_ACTIVE;
412 } else { 415 } else {
413 _debug("reuse"); 416 _debug("reuse");
417 kfree(new_opts);
414 ASSERTCMP(sb->s_flags, &, MS_ACTIVE); 418 ASSERTCMP(sb->s_flags, &, MS_ACTIVE);
415 } 419 }
416 420
@@ -424,6 +428,7 @@ error:
424 afs_put_volume(params.volume); 428 afs_put_volume(params.volume);
425 afs_put_cell(params.cell); 429 afs_put_cell(params.cell);
426 key_put(params.key); 430 key_put(params.key);
431 kfree(new_opts);
427 _leave(" = %d", ret); 432 _leave(" = %d", ret);
428 return ret; 433 return ret;
429} 434}
diff --git a/fs/aio.c b/fs/aio.c
index 8a37dbbf3437..b74c567383bc 100644
--- a/fs/aio.c
+++ b/fs/aio.c
@@ -317,7 +317,7 @@ out:
317/* wait_on_sync_kiocb: 317/* wait_on_sync_kiocb:
318 * Waits on the given sync kiocb to complete. 318 * Waits on the given sync kiocb to complete.
319 */ 319 */
320ssize_t fastcall wait_on_sync_kiocb(struct kiocb *iocb) 320ssize_t wait_on_sync_kiocb(struct kiocb *iocb)
321{ 321{
322 while (iocb->ki_users) { 322 while (iocb->ki_users) {
323 set_current_state(TASK_UNINTERRUPTIBLE); 323 set_current_state(TASK_UNINTERRUPTIBLE);
@@ -336,7 +336,7 @@ ssize_t fastcall wait_on_sync_kiocb(struct kiocb *iocb)
336 * go away, they will call put_ioctx and release any pinned memory 336 * go away, they will call put_ioctx and release any pinned memory
337 * associated with the request (held via struct page * references). 337 * associated with the request (held via struct page * references).
338 */ 338 */
339void fastcall exit_aio(struct mm_struct *mm) 339void exit_aio(struct mm_struct *mm)
340{ 340{
341 struct kioctx *ctx = mm->ioctx_list; 341 struct kioctx *ctx = mm->ioctx_list;
342 mm->ioctx_list = NULL; 342 mm->ioctx_list = NULL;
@@ -365,7 +365,7 @@ void fastcall exit_aio(struct mm_struct *mm)
365 * Called when the last user of an aio context has gone away, 365 * Called when the last user of an aio context has gone away,
366 * and the struct needs to be freed. 366 * and the struct needs to be freed.
367 */ 367 */
368void fastcall __put_ioctx(struct kioctx *ctx) 368void __put_ioctx(struct kioctx *ctx)
369{ 369{
370 unsigned nr_events = ctx->max_reqs; 370 unsigned nr_events = ctx->max_reqs;
371 371
@@ -397,8 +397,7 @@ void fastcall __put_ioctx(struct kioctx *ctx)
397 * This prevents races between the aio code path referencing the 397 * This prevents races between the aio code path referencing the
398 * req (after submitting it) and aio_complete() freeing the req. 398 * req (after submitting it) and aio_complete() freeing the req.
399 */ 399 */
400static struct kiocb *__aio_get_req(struct kioctx *ctx); 400static struct kiocb *__aio_get_req(struct kioctx *ctx)
401static struct kiocb fastcall *__aio_get_req(struct kioctx *ctx)
402{ 401{
403 struct kiocb *req = NULL; 402 struct kiocb *req = NULL;
404 struct aio_ring *ring; 403 struct aio_ring *ring;
@@ -533,7 +532,7 @@ static int __aio_put_req(struct kioctx *ctx, struct kiocb *req)
533 * Returns true if this put was the last user of the kiocb, 532 * Returns true if this put was the last user of the kiocb,
534 * false if the request is still in use. 533 * false if the request is still in use.
535 */ 534 */
536int fastcall aio_put_req(struct kiocb *req) 535int aio_put_req(struct kiocb *req)
537{ 536{
538 struct kioctx *ctx = req->ki_ctx; 537 struct kioctx *ctx = req->ki_ctx;
539 int ret; 538 int ret;
@@ -893,7 +892,7 @@ static void try_queue_kicked_iocb(struct kiocb *iocb)
893 * The retry is usually executed by aio workqueue 892 * The retry is usually executed by aio workqueue
894 * threads (See aio_kick_handler). 893 * threads (See aio_kick_handler).
895 */ 894 */
896void fastcall kick_iocb(struct kiocb *iocb) 895void kick_iocb(struct kiocb *iocb)
897{ 896{
898 /* sync iocbs are easy: they can only ever be executing from a 897 /* sync iocbs are easy: they can only ever be executing from a
899 * single context. */ 898 * single context. */
@@ -912,7 +911,7 @@ EXPORT_SYMBOL(kick_iocb);
912 * Returns true if this is the last user of the request. The 911 * Returns true if this is the last user of the request. The
913 * only other user of the request can be the cancellation code. 912 * only other user of the request can be the cancellation code.
914 */ 913 */
915int fastcall aio_complete(struct kiocb *iocb, long res, long res2) 914int aio_complete(struct kiocb *iocb, long res, long res2)
916{ 915{
917 struct kioctx *ctx = iocb->ki_ctx; 916 struct kioctx *ctx = iocb->ki_ctx;
918 struct aio_ring_info *info; 917 struct aio_ring_info *info;
@@ -1330,6 +1329,10 @@ static ssize_t aio_rw_vect_retry(struct kiocb *iocb)
1330 opcode = IOCB_CMD_PWRITEV; 1329 opcode = IOCB_CMD_PWRITEV;
1331 } 1330 }
1332 1331
1332 /* This matches the pread()/pwrite() logic */
1333 if (iocb->ki_pos < 0)
1334 return -EINVAL;
1335
1333 do { 1336 do {
1334 ret = rw_op(iocb, &iocb->ki_iovec[iocb->ki_cur_seg], 1337 ret = rw_op(iocb, &iocb->ki_iovec[iocb->ki_cur_seg],
1335 iocb->ki_nr_segs - iocb->ki_cur_seg, 1338 iocb->ki_nr_segs - iocb->ki_cur_seg,
@@ -1348,6 +1351,13 @@ static ssize_t aio_rw_vect_retry(struct kiocb *iocb)
1348 if ((ret == 0) || (iocb->ki_left == 0)) 1351 if ((ret == 0) || (iocb->ki_left == 0))
1349 ret = iocb->ki_nbytes - iocb->ki_left; 1352 ret = iocb->ki_nbytes - iocb->ki_left;
1350 1353
1354 /* If we managed to write some out we return that, rather than
1355 * the eventual error. */
1356 if (opcode == IOCB_CMD_PWRITEV
1357 && ret < 0 && ret != -EIOCBQUEUED && ret != -EIOCBRETRY
1358 && iocb->ki_nbytes - iocb->ki_left)
1359 ret = iocb->ki_nbytes - iocb->ki_left;
1360
1351 return ret; 1361 return ret;
1352} 1362}
1353 1363
@@ -1523,7 +1533,7 @@ static int aio_wake_function(wait_queue_t *wait, unsigned mode,
1523 return 1; 1533 return 1;
1524} 1534}
1525 1535
1526int fastcall io_submit_one(struct kioctx *ctx, struct iocb __user *user_iocb, 1536int io_submit_one(struct kioctx *ctx, struct iocb __user *user_iocb,
1527 struct iocb *iocb) 1537 struct iocb *iocb)
1528{ 1538{
1529 struct kiocb *req; 1539 struct kiocb *req;
diff --git a/fs/autofs/inode.c b/fs/autofs/inode.c
index 708bdb89fea1..dda510d31f84 100644
--- a/fs/autofs/inode.c
+++ b/fs/autofs/inode.c
@@ -54,6 +54,7 @@ out_kill_sb:
54 54
55static const struct super_operations autofs_sops = { 55static const struct super_operations autofs_sops = {
56 .statfs = simple_statfs, 56 .statfs = simple_statfs,
57 .show_options = generic_show_options,
57}; 58};
58 59
59enum {Opt_err, Opt_fd, Opt_uid, Opt_gid, Opt_pgrp, Opt_minproto, Opt_maxproto}; 60enum {Opt_err, Opt_fd, Opt_uid, Opt_gid, Opt_pgrp, Opt_minproto, Opt_maxproto};
@@ -140,6 +141,8 @@ int autofs_fill_super(struct super_block *s, void *data, int silent)
140 int minproto, maxproto; 141 int minproto, maxproto;
141 pid_t pgid; 142 pid_t pgid;
142 143
144 save_mount_options(s, data);
145
143 sbi = kzalloc(sizeof(*sbi), GFP_KERNEL); 146 sbi = kzalloc(sizeof(*sbi), GFP_KERNEL);
144 if (!sbi) 147 if (!sbi)
145 goto fail_unlock; 148 goto fail_unlock;
diff --git a/fs/autofs4/inode.c b/fs/autofs4/inode.c
index 7f05d6ccdb13..2fdcf5e1d236 100644
--- a/fs/autofs4/inode.c
+++ b/fs/autofs4/inode.c
@@ -176,11 +176,16 @@ out_kill_sb:
176static int autofs4_show_options(struct seq_file *m, struct vfsmount *mnt) 176static int autofs4_show_options(struct seq_file *m, struct vfsmount *mnt)
177{ 177{
178 struct autofs_sb_info *sbi = autofs4_sbi(mnt->mnt_sb); 178 struct autofs_sb_info *sbi = autofs4_sbi(mnt->mnt_sb);
179 struct inode *root_inode = mnt->mnt_sb->s_root->d_inode;
179 180
180 if (!sbi) 181 if (!sbi)
181 return 0; 182 return 0;
182 183
183 seq_printf(m, ",fd=%d", sbi->pipefd); 184 seq_printf(m, ",fd=%d", sbi->pipefd);
185 if (root_inode->i_uid != 0)
186 seq_printf(m, ",uid=%u", root_inode->i_uid);
187 if (root_inode->i_gid != 0)
188 seq_printf(m, ",gid=%u", root_inode->i_gid);
184 seq_printf(m, ",pgrp=%d", sbi->oz_pgrp); 189 seq_printf(m, ",pgrp=%d", sbi->oz_pgrp);
185 seq_printf(m, ",timeout=%lu", sbi->exp_timeout/HZ); 190 seq_printf(m, ",timeout=%lu", sbi->exp_timeout/HZ);
186 seq_printf(m, ",minproto=%d", sbi->min_proto); 191 seq_printf(m, ",minproto=%d", sbi->min_proto);
diff --git a/fs/befs/linuxvfs.c b/fs/befs/linuxvfs.c
index 403fe661c144..82123ff3e1dd 100644
--- a/fs/befs/linuxvfs.c
+++ b/fs/befs/linuxvfs.c
@@ -57,6 +57,7 @@ static const struct super_operations befs_sops = {
57 .put_super = befs_put_super, /* uninit super */ 57 .put_super = befs_put_super, /* uninit super */
58 .statfs = befs_statfs, /* statfs */ 58 .statfs = befs_statfs, /* statfs */
59 .remount_fs = befs_remount, 59 .remount_fs = befs_remount,
60 .show_options = generic_show_options,
60}; 61};
61 62
62/* slab cache for befs_inode_info objects */ 63/* slab cache for befs_inode_info objects */
@@ -759,10 +760,11 @@ befs_fill_super(struct super_block *sb, void *data, int silent)
759 befs_super_block *disk_sb; 760 befs_super_block *disk_sb;
760 struct inode *root; 761 struct inode *root;
761 long ret = -EINVAL; 762 long ret = -EINVAL;
762
763 const unsigned long sb_block = 0; 763 const unsigned long sb_block = 0;
764 const off_t x86_sb_off = 512; 764 const off_t x86_sb_off = 512;
765 765
766 save_mount_options(sb, data);
767
766 sb->s_fs_info = kmalloc(sizeof (*befs_sb), GFP_KERNEL); 768 sb->s_fs_info = kmalloc(sizeof (*befs_sb), GFP_KERNEL);
767 if (sb->s_fs_info == NULL) { 769 if (sb->s_fs_info == NULL) {
768 printk(KERN_ERR 770 printk(KERN_ERR
diff --git a/fs/binfmt_aout.c b/fs/binfmt_aout.c
index 7f65e71bf859..a1bb2244cac7 100644
--- a/fs/binfmt_aout.c
+++ b/fs/binfmt_aout.c
@@ -28,6 +28,7 @@
28#include <asm/system.h> 28#include <asm/system.h>
29#include <asm/uaccess.h> 29#include <asm/uaccess.h>
30#include <asm/cacheflush.h> 30#include <asm/cacheflush.h>
31#include <asm/a.out-core.h>
31 32
32static int load_aout_binary(struct linux_binprm *, struct pt_regs * regs); 33static int load_aout_binary(struct linux_binprm *, struct pt_regs * regs);
33static int load_aout_library(struct file*); 34static int load_aout_library(struct file*);
@@ -118,7 +119,7 @@ static int aout_core_dump(long signr, struct pt_regs *regs, struct file *file, u
118 dump.u_ar0 = offsetof(struct user, regs); 119 dump.u_ar0 = offsetof(struct user, regs);
119#endif 120#endif
120 dump.signal = signr; 121 dump.signal = signr;
121 dump_thread(regs, &dump); 122 aout_dump_thread(regs, &dump);
122 123
123/* If the size of the dump file exceeds the rlimit, then see what would happen 124/* If the size of the dump file exceeds the rlimit, then see what would happen
124 if we wrote the stack, but not the data area. */ 125 if we wrote the stack, but not the data area. */
diff --git a/fs/binfmt_elf.c b/fs/binfmt_elf.c
index 111771d38e6e..41a958a7585e 100644
--- a/fs/binfmt_elf.c
+++ b/fs/binfmt_elf.c
@@ -134,8 +134,7 @@ static int padzero(unsigned long elf_bss)
134 134
135static int 135static int
136create_elf_tables(struct linux_binprm *bprm, struct elfhdr *exec, 136create_elf_tables(struct linux_binprm *bprm, struct elfhdr *exec,
137 int interp_aout, unsigned long load_addr, 137 unsigned long load_addr, unsigned long interp_load_addr)
138 unsigned long interp_load_addr)
139{ 138{
140 unsigned long p = bprm->p; 139 unsigned long p = bprm->p;
141 int argc = bprm->argc; 140 int argc = bprm->argc;
@@ -223,12 +222,7 @@ create_elf_tables(struct linux_binprm *bprm, struct elfhdr *exec,
223 222
224 sp = STACK_ADD(p, ei_index); 223 sp = STACK_ADD(p, ei_index);
225 224
226 items = (argc + 1) + (envc + 1); 225 items = (argc + 1) + (envc + 1) + 1;
227 if (interp_aout) {
228 items += 3; /* a.out interpreters require argv & envp too */
229 } else {
230 items += 1; /* ELF interpreters only put argc on the stack */
231 }
232 bprm->p = STACK_ROUND(sp, items); 226 bprm->p = STACK_ROUND(sp, items);
233 227
234 /* Point sp at the lowest address on the stack */ 228 /* Point sp at the lowest address on the stack */
@@ -251,16 +245,8 @@ create_elf_tables(struct linux_binprm *bprm, struct elfhdr *exec,
251 /* Now, let's put argc (and argv, envp if appropriate) on the stack */ 245 /* Now, let's put argc (and argv, envp if appropriate) on the stack */
252 if (__put_user(argc, sp++)) 246 if (__put_user(argc, sp++))
253 return -EFAULT; 247 return -EFAULT;
254 if (interp_aout) { 248 argv = sp;
255 argv = sp + 2; 249 envp = argv + argc + 1;
256 envp = argv + argc + 1;
257 if (__put_user((elf_addr_t)(unsigned long)argv, sp++) ||
258 __put_user((elf_addr_t)(unsigned long)envp, sp++))
259 return -EFAULT;
260 } else {
261 argv = sp;
262 envp = argv + argc + 1;
263 }
264 250
265 /* Populate argv and envp */ 251 /* Populate argv and envp */
266 p = current->mm->arg_end = current->mm->arg_start; 252 p = current->mm->arg_end = current->mm->arg_start;
@@ -513,59 +499,12 @@ out:
513 return error; 499 return error;
514} 500}
515 501
516static unsigned long load_aout_interp(struct exec *interp_ex,
517 struct file *interpreter)
518{
519 unsigned long text_data, elf_entry = ~0UL;
520 char __user * addr;
521 loff_t offset;
522
523 current->mm->end_code = interp_ex->a_text;
524 text_data = interp_ex->a_text + interp_ex->a_data;
525 current->mm->end_data = text_data;
526 current->mm->brk = interp_ex->a_bss + text_data;
527
528 switch (N_MAGIC(*interp_ex)) {
529 case OMAGIC:
530 offset = 32;
531 addr = (char __user *)0;
532 break;
533 case ZMAGIC:
534 case QMAGIC:
535 offset = N_TXTOFF(*interp_ex);
536 addr = (char __user *)N_TXTADDR(*interp_ex);
537 break;
538 default:
539 goto out;
540 }
541
542 down_write(&current->mm->mmap_sem);
543 do_brk(0, text_data);
544 up_write(&current->mm->mmap_sem);
545 if (!interpreter->f_op || !interpreter->f_op->read)
546 goto out;
547 if (interpreter->f_op->read(interpreter, addr, text_data, &offset) < 0)
548 goto out;
549 flush_icache_range((unsigned long)addr,
550 (unsigned long)addr + text_data);
551
552 down_write(&current->mm->mmap_sem);
553 do_brk(ELF_PAGESTART(text_data + ELF_MIN_ALIGN - 1),
554 interp_ex->a_bss);
555 up_write(&current->mm->mmap_sem);
556 elf_entry = interp_ex->a_entry;
557
558out:
559 return elf_entry;
560}
561
562/* 502/*
563 * These are the functions used to load ELF style executables and shared 503 * These are the functions used to load ELF style executables and shared
564 * libraries. There is no binary dependent code anywhere else. 504 * libraries. There is no binary dependent code anywhere else.
565 */ 505 */
566 506
567#define INTERPRETER_NONE 0 507#define INTERPRETER_NONE 0
568#define INTERPRETER_AOUT 1
569#define INTERPRETER_ELF 2 508#define INTERPRETER_ELF 2
570 509
571#ifndef STACK_RND_MASK 510#ifndef STACK_RND_MASK
@@ -594,7 +533,6 @@ static int load_elf_binary(struct linux_binprm *bprm, struct pt_regs *regs)
594 unsigned long load_addr = 0, load_bias = 0; 533 unsigned long load_addr = 0, load_bias = 0;
595 int load_addr_set = 0; 534 int load_addr_set = 0;
596 char * elf_interpreter = NULL; 535 char * elf_interpreter = NULL;
597 unsigned int interpreter_type = INTERPRETER_NONE;
598 unsigned long error; 536 unsigned long error;
599 struct elf_phdr *elf_ppnt, *elf_phdata; 537 struct elf_phdr *elf_ppnt, *elf_phdata;
600 unsigned long elf_bss, elf_brk; 538 unsigned long elf_bss, elf_brk;
@@ -605,7 +543,6 @@ static int load_elf_binary(struct linux_binprm *bprm, struct pt_regs *regs)
605 unsigned long interp_load_addr = 0; 543 unsigned long interp_load_addr = 0;
606 unsigned long start_code, end_code, start_data, end_data; 544 unsigned long start_code, end_code, start_data, end_data;
607 unsigned long reloc_func_desc = 0; 545 unsigned long reloc_func_desc = 0;
608 char passed_fileno[6];
609 struct files_struct *files; 546 struct files_struct *files;
610 int executable_stack = EXSTACK_DEFAULT; 547 int executable_stack = EXSTACK_DEFAULT;
611 unsigned long def_flags = 0; 548 unsigned long def_flags = 0;
@@ -774,59 +711,18 @@ static int load_elf_binary(struct linux_binprm *bprm, struct pt_regs *regs)
774 711
775 /* Some simple consistency checks for the interpreter */ 712 /* Some simple consistency checks for the interpreter */
776 if (elf_interpreter) { 713 if (elf_interpreter) {
777 static int warn;
778 interpreter_type = INTERPRETER_ELF | INTERPRETER_AOUT;
779
780 /* Now figure out which format our binary is */
781 if ((N_MAGIC(loc->interp_ex) != OMAGIC) &&
782 (N_MAGIC(loc->interp_ex) != ZMAGIC) &&
783 (N_MAGIC(loc->interp_ex) != QMAGIC))
784 interpreter_type = INTERPRETER_ELF;
785
786 if (memcmp(loc->interp_elf_ex.e_ident, ELFMAG, SELFMAG) != 0)
787 interpreter_type &= ~INTERPRETER_ELF;
788
789 if (interpreter_type == INTERPRETER_AOUT && warn < 10) {
790 printk(KERN_WARNING "a.out ELF interpreter %s is "
791 "deprecated and will not be supported "
792 "after Linux 2.6.25\n", elf_interpreter);
793 warn++;
794 }
795
796 retval = -ELIBBAD; 714 retval = -ELIBBAD;
797 if (!interpreter_type) 715 /* Not an ELF interpreter */
716 if (memcmp(loc->interp_elf_ex.e_ident, ELFMAG, SELFMAG) != 0)
798 goto out_free_dentry; 717 goto out_free_dentry;
799
800 /* Make sure only one type was selected */
801 if ((interpreter_type & INTERPRETER_ELF) &&
802 interpreter_type != INTERPRETER_ELF) {
803 // FIXME - ratelimit this before re-enabling
804 // printk(KERN_WARNING "ELF: Ambiguous type, using ELF\n");
805 interpreter_type = INTERPRETER_ELF;
806 }
807 /* Verify the interpreter has a valid arch */ 718 /* Verify the interpreter has a valid arch */
808 if ((interpreter_type == INTERPRETER_ELF) && 719 if (!elf_check_arch(&loc->interp_elf_ex))
809 !elf_check_arch(&loc->interp_elf_ex))
810 goto out_free_dentry; 720 goto out_free_dentry;
811 } else { 721 } else {
812 /* Executables without an interpreter also need a personality */ 722 /* Executables without an interpreter also need a personality */
813 SET_PERSONALITY(loc->elf_ex, 0); 723 SET_PERSONALITY(loc->elf_ex, 0);
814 } 724 }
815 725
816 /* OK, we are done with that, now set up the arg stuff,
817 and then start this sucker up */
818 if ((!bprm->sh_bang) && (interpreter_type == INTERPRETER_AOUT)) {
819 char *passed_p = passed_fileno;
820 sprintf(passed_fileno, "%d", elf_exec_fileno);
821
822 if (elf_interpreter) {
823 retval = copy_strings_kernel(1, &passed_p, bprm);
824 if (retval)
825 goto out_free_dentry;
826 bprm->argc++;
827 }
828 }
829
830 /* Flush all traces of the currently running executable */ 726 /* Flush all traces of the currently running executable */
831 retval = flush_old_exec(bprm); 727 retval = flush_old_exec(bprm);
832 if (retval) 728 if (retval)
@@ -1004,24 +900,19 @@ static int load_elf_binary(struct linux_binprm *bprm, struct pt_regs *regs)
1004 } 900 }
1005 901
1006 if (elf_interpreter) { 902 if (elf_interpreter) {
1007 if (interpreter_type == INTERPRETER_AOUT) { 903 unsigned long uninitialized_var(interp_map_addr);
1008 elf_entry = load_aout_interp(&loc->interp_ex, 904
1009 interpreter); 905 elf_entry = load_elf_interp(&loc->interp_elf_ex,
1010 } else { 906 interpreter,
1011 unsigned long uninitialized_var(interp_map_addr); 907 &interp_map_addr,
1012 908 load_bias);
1013 elf_entry = load_elf_interp(&loc->interp_elf_ex, 909 if (!IS_ERR((void *)elf_entry)) {
1014 interpreter, 910 /*
1015 &interp_map_addr, 911 * load_elf_interp() returns relocation
1016 load_bias); 912 * adjustment
1017 if (!IS_ERR((void *)elf_entry)) { 913 */
1018 /* 914 interp_load_addr = elf_entry;
1019 * load_elf_interp() returns relocation 915 elf_entry += loc->interp_elf_ex.e_entry;
1020 * adjustment
1021 */
1022 interp_load_addr = elf_entry;
1023 elf_entry += loc->interp_elf_ex.e_entry;
1024 }
1025 } 916 }
1026 if (BAD_ADDR(elf_entry)) { 917 if (BAD_ADDR(elf_entry)) {
1027 force_sig(SIGSEGV, current); 918 force_sig(SIGSEGV, current);
@@ -1045,8 +936,7 @@ static int load_elf_binary(struct linux_binprm *bprm, struct pt_regs *regs)
1045 936
1046 kfree(elf_phdata); 937 kfree(elf_phdata);
1047 938
1048 if (interpreter_type != INTERPRETER_AOUT) 939 sys_close(elf_exec_fileno);
1049 sys_close(elf_exec_fileno);
1050 940
1051 set_binfmt(&elf_format); 941 set_binfmt(&elf_format);
1052 942
@@ -1061,15 +951,12 @@ static int load_elf_binary(struct linux_binprm *bprm, struct pt_regs *regs)
1061 compute_creds(bprm); 951 compute_creds(bprm);
1062 current->flags &= ~PF_FORKNOEXEC; 952 current->flags &= ~PF_FORKNOEXEC;
1063 retval = create_elf_tables(bprm, &loc->elf_ex, 953 retval = create_elf_tables(bprm, &loc->elf_ex,
1064 (interpreter_type == INTERPRETER_AOUT),
1065 load_addr, interp_load_addr); 954 load_addr, interp_load_addr);
1066 if (retval < 0) { 955 if (retval < 0) {
1067 send_sig(SIGKILL, current, 0); 956 send_sig(SIGKILL, current, 0);
1068 goto out; 957 goto out;
1069 } 958 }
1070 /* N.B. passed_fileno might not be initialized? */ 959 /* N.B. passed_fileno might not be initialized? */
1071 if (interpreter_type == INTERPRETER_AOUT)
1072 current->mm->arg_start += strlen(passed_fileno) + 1;
1073 current->mm->end_code = end_code; 960 current->mm->end_code = end_code;
1074 current->mm->start_code = start_code; 961 current->mm->start_code = start_code;
1075 current->mm->start_data = start_data; 962 current->mm->start_data = start_data;
diff --git a/fs/binfmt_flat.c b/fs/binfmt_flat.c
index 33764fd6db66..d8a02f1e08cc 100644
--- a/fs/binfmt_flat.c
+++ b/fs/binfmt_flat.c
@@ -20,7 +20,6 @@
20#include <linux/sched.h> 20#include <linux/sched.h>
21#include <linux/mm.h> 21#include <linux/mm.h>
22#include <linux/mman.h> 22#include <linux/mman.h>
23#include <linux/a.out.h>
24#include <linux/errno.h> 23#include <linux/errno.h>
25#include <linux/signal.h> 24#include <linux/signal.h>
26#include <linux/string.h> 25#include <linux/string.h>
diff --git a/fs/binfmt_som.c b/fs/binfmt_som.c
index 9208c41209f9..14c63527c762 100644
--- a/fs/binfmt_som.c
+++ b/fs/binfmt_som.c
@@ -29,7 +29,6 @@
29#include <linux/personality.h> 29#include <linux/personality.h>
30#include <linux/init.h> 30#include <linux/init.h>
31 31
32#include <asm/a.out.h>
33#include <asm/uaccess.h> 32#include <asm/uaccess.h>
34#include <asm/pgtable.h> 33#include <asm/pgtable.h>
35 34
diff --git a/fs/buffer.c b/fs/buffer.c
index 826baf4f04bc..3ebccf4aa7e3 100644
--- a/fs/buffer.c
+++ b/fs/buffer.c
@@ -67,14 +67,14 @@ static int sync_buffer(void *word)
67 return 0; 67 return 0;
68} 68}
69 69
70void fastcall __lock_buffer(struct buffer_head *bh) 70void __lock_buffer(struct buffer_head *bh)
71{ 71{
72 wait_on_bit_lock(&bh->b_state, BH_Lock, sync_buffer, 72 wait_on_bit_lock(&bh->b_state, BH_Lock, sync_buffer,
73 TASK_UNINTERRUPTIBLE); 73 TASK_UNINTERRUPTIBLE);
74} 74}
75EXPORT_SYMBOL(__lock_buffer); 75EXPORT_SYMBOL(__lock_buffer);
76 76
77void fastcall unlock_buffer(struct buffer_head *bh) 77void unlock_buffer(struct buffer_head *bh)
78{ 78{
79 smp_mb__before_clear_bit(); 79 smp_mb__before_clear_bit();
80 clear_buffer_locked(bh); 80 clear_buffer_locked(bh);
@@ -678,7 +678,7 @@ void mark_buffer_dirty_inode(struct buffer_head *bh, struct inode *inode)
678 } else { 678 } else {
679 BUG_ON(mapping->assoc_mapping != buffer_mapping); 679 BUG_ON(mapping->assoc_mapping != buffer_mapping);
680 } 680 }
681 if (list_empty(&bh->b_assoc_buffers)) { 681 if (!bh->b_assoc_map) {
682 spin_lock(&buffer_mapping->private_lock); 682 spin_lock(&buffer_mapping->private_lock);
683 list_move_tail(&bh->b_assoc_buffers, 683 list_move_tail(&bh->b_assoc_buffers,
684 &mapping->private_list); 684 &mapping->private_list);
@@ -794,6 +794,7 @@ static int fsync_buffers_list(spinlock_t *lock, struct list_head *list)
794{ 794{
795 struct buffer_head *bh; 795 struct buffer_head *bh;
796 struct list_head tmp; 796 struct list_head tmp;
797 struct address_space *mapping;
797 int err = 0, err2; 798 int err = 0, err2;
798 799
799 INIT_LIST_HEAD(&tmp); 800 INIT_LIST_HEAD(&tmp);
@@ -801,9 +802,14 @@ static int fsync_buffers_list(spinlock_t *lock, struct list_head *list)
801 spin_lock(lock); 802 spin_lock(lock);
802 while (!list_empty(list)) { 803 while (!list_empty(list)) {
803 bh = BH_ENTRY(list->next); 804 bh = BH_ENTRY(list->next);
805 mapping = bh->b_assoc_map;
804 __remove_assoc_queue(bh); 806 __remove_assoc_queue(bh);
807 /* Avoid race with mark_buffer_dirty_inode() which does
808 * a lockless check and we rely on seeing the dirty bit */
809 smp_mb();
805 if (buffer_dirty(bh) || buffer_locked(bh)) { 810 if (buffer_dirty(bh) || buffer_locked(bh)) {
806 list_add(&bh->b_assoc_buffers, &tmp); 811 list_add(&bh->b_assoc_buffers, &tmp);
812 bh->b_assoc_map = mapping;
807 if (buffer_dirty(bh)) { 813 if (buffer_dirty(bh)) {
808 get_bh(bh); 814 get_bh(bh);
809 spin_unlock(lock); 815 spin_unlock(lock);
@@ -822,8 +828,17 @@ static int fsync_buffers_list(spinlock_t *lock, struct list_head *list)
822 828
823 while (!list_empty(&tmp)) { 829 while (!list_empty(&tmp)) {
824 bh = BH_ENTRY(tmp.prev); 830 bh = BH_ENTRY(tmp.prev);
825 list_del_init(&bh->b_assoc_buffers);
826 get_bh(bh); 831 get_bh(bh);
832 mapping = bh->b_assoc_map;
833 __remove_assoc_queue(bh);
834 /* Avoid race with mark_buffer_dirty_inode() which does
835 * a lockless check and we rely on seeing the dirty bit */
836 smp_mb();
837 if (buffer_dirty(bh)) {
838 list_add(&bh->b_assoc_buffers,
839 &bh->b_assoc_map->private_list);
840 bh->b_assoc_map = mapping;
841 }
827 spin_unlock(lock); 842 spin_unlock(lock);
828 wait_on_buffer(bh); 843 wait_on_buffer(bh);
829 if (!buffer_uptodate(bh)) 844 if (!buffer_uptodate(bh))
@@ -1164,7 +1179,7 @@ __getblk_slow(struct block_device *bdev, sector_t block, int size)
1164 * mark_buffer_dirty() is atomic. It takes bh->b_page->mapping->private_lock, 1179 * mark_buffer_dirty() is atomic. It takes bh->b_page->mapping->private_lock,
1165 * mapping->tree_lock and the global inode_lock. 1180 * mapping->tree_lock and the global inode_lock.
1166 */ 1181 */
1167void fastcall mark_buffer_dirty(struct buffer_head *bh) 1182void mark_buffer_dirty(struct buffer_head *bh)
1168{ 1183{
1169 WARN_ON_ONCE(!buffer_uptodate(bh)); 1184 WARN_ON_ONCE(!buffer_uptodate(bh));
1170 if (!buffer_dirty(bh) && !test_set_buffer_dirty(bh)) 1185 if (!buffer_dirty(bh) && !test_set_buffer_dirty(bh))
@@ -1195,7 +1210,7 @@ void __brelse(struct buffer_head * buf)
1195void __bforget(struct buffer_head *bh) 1210void __bforget(struct buffer_head *bh)
1196{ 1211{
1197 clear_buffer_dirty(bh); 1212 clear_buffer_dirty(bh);
1198 if (!list_empty(&bh->b_assoc_buffers)) { 1213 if (bh->b_assoc_map) {
1199 struct address_space *buffer_mapping = bh->b_page->mapping; 1214 struct address_space *buffer_mapping = bh->b_page->mapping;
1200 1215
1201 spin_lock(&buffer_mapping->private_lock); 1216 spin_lock(&buffer_mapping->private_lock);
@@ -1436,6 +1451,7 @@ void invalidate_bh_lrus(void)
1436{ 1451{
1437 on_each_cpu(invalidate_bh_lru, NULL, 1, 1); 1452 on_each_cpu(invalidate_bh_lru, NULL, 1, 1);
1438} 1453}
1454EXPORT_SYMBOL_GPL(invalidate_bh_lrus);
1439 1455
1440void set_bh_page(struct buffer_head *bh, 1456void set_bh_page(struct buffer_head *bh,
1441 struct page *page, unsigned long offset) 1457 struct page *page, unsigned long offset)
@@ -3021,7 +3037,7 @@ drop_buffers(struct page *page, struct buffer_head **buffers_to_free)
3021 do { 3037 do {
3022 struct buffer_head *next = bh->b_this_page; 3038 struct buffer_head *next = bh->b_this_page;
3023 3039
3024 if (!list_empty(&bh->b_assoc_buffers)) 3040 if (bh->b_assoc_map)
3025 __remove_assoc_queue(bh); 3041 __remove_assoc_queue(bh);
3026 bh = next; 3042 bh = next;
3027 } while (bh != head); 3043 } while (bh != head);
diff --git a/fs/char_dev.c b/fs/char_dev.c
index 2c7a8b5b4598..038674aa88a7 100644
--- a/fs/char_dev.c
+++ b/fs/char_dev.c
@@ -357,7 +357,7 @@ void cdev_put(struct cdev *p)
357/* 357/*
358 * Called every time a character special file is opened 358 * Called every time a character special file is opened
359 */ 359 */
360int chrdev_open(struct inode * inode, struct file * filp) 360static int chrdev_open(struct inode *inode, struct file *filp)
361{ 361{
362 struct cdev *p; 362 struct cdev *p;
363 struct cdev *new = NULL; 363 struct cdev *new = NULL;
diff --git a/fs/debugfs/file.c b/fs/debugfs/file.c
index fa6b7f7ff914..fddffe4851f5 100644
--- a/fs/debugfs/file.c
+++ b/fs/debugfs/file.c
@@ -56,13 +56,15 @@ const struct inode_operations debugfs_link_operations = {
56 .follow_link = debugfs_follow_link, 56 .follow_link = debugfs_follow_link,
57}; 57};
58 58
59static void debugfs_u8_set(void *data, u64 val) 59static int debugfs_u8_set(void *data, u64 val)
60{ 60{
61 *(u8 *)data = val; 61 *(u8 *)data = val;
62 return 0;
62} 63}
63static u64 debugfs_u8_get(void *data) 64static int debugfs_u8_get(void *data, u64 *val)
64{ 65{
65 return *(u8 *)data; 66 *val = *(u8 *)data;
67 return 0;
66} 68}
67DEFINE_SIMPLE_ATTRIBUTE(fops_u8, debugfs_u8_get, debugfs_u8_set, "%llu\n"); 69DEFINE_SIMPLE_ATTRIBUTE(fops_u8, debugfs_u8_get, debugfs_u8_set, "%llu\n");
68 70
@@ -97,13 +99,15 @@ struct dentry *debugfs_create_u8(const char *name, mode_t mode,
97} 99}
98EXPORT_SYMBOL_GPL(debugfs_create_u8); 100EXPORT_SYMBOL_GPL(debugfs_create_u8);
99 101
100static void debugfs_u16_set(void *data, u64 val) 102static int debugfs_u16_set(void *data, u64 val)
101{ 103{
102 *(u16 *)data = val; 104 *(u16 *)data = val;
105 return 0;
103} 106}
104static u64 debugfs_u16_get(void *data) 107static int debugfs_u16_get(void *data, u64 *val)
105{ 108{
106 return *(u16 *)data; 109 *val = *(u16 *)data;
110 return 0;
107} 111}
108DEFINE_SIMPLE_ATTRIBUTE(fops_u16, debugfs_u16_get, debugfs_u16_set, "%llu\n"); 112DEFINE_SIMPLE_ATTRIBUTE(fops_u16, debugfs_u16_get, debugfs_u16_set, "%llu\n");
109 113
@@ -138,13 +142,15 @@ struct dentry *debugfs_create_u16(const char *name, mode_t mode,
138} 142}
139EXPORT_SYMBOL_GPL(debugfs_create_u16); 143EXPORT_SYMBOL_GPL(debugfs_create_u16);
140 144
141static void debugfs_u32_set(void *data, u64 val) 145static int debugfs_u32_set(void *data, u64 val)
142{ 146{
143 *(u32 *)data = val; 147 *(u32 *)data = val;
148 return 0;
144} 149}
145static u64 debugfs_u32_get(void *data) 150static int debugfs_u32_get(void *data, u64 *val)
146{ 151{
147 return *(u32 *)data; 152 *val = *(u32 *)data;
153 return 0;
148} 154}
149DEFINE_SIMPLE_ATTRIBUTE(fops_u32, debugfs_u32_get, debugfs_u32_set, "%llu\n"); 155DEFINE_SIMPLE_ATTRIBUTE(fops_u32, debugfs_u32_get, debugfs_u32_set, "%llu\n");
150 156
@@ -179,14 +185,16 @@ struct dentry *debugfs_create_u32(const char *name, mode_t mode,
179} 185}
180EXPORT_SYMBOL_GPL(debugfs_create_u32); 186EXPORT_SYMBOL_GPL(debugfs_create_u32);
181 187
182static void debugfs_u64_set(void *data, u64 val) 188static int debugfs_u64_set(void *data, u64 val)
183{ 189{
184 *(u64 *)data = val; 190 *(u64 *)data = val;
191 return 0;
185} 192}
186 193
187static u64 debugfs_u64_get(void *data) 194static int debugfs_u64_get(void *data, u64 *val)
188{ 195{
189 return *(u64 *)data; 196 *val = *(u64 *)data;
197 return 0;
190} 198}
191DEFINE_SIMPLE_ATTRIBUTE(fops_u64, debugfs_u64_get, debugfs_u64_set, "%llu\n"); 199DEFINE_SIMPLE_ATTRIBUTE(fops_u64, debugfs_u64_get, debugfs_u64_set, "%llu\n");
192 200
diff --git a/fs/devpts/inode.c b/fs/devpts/inode.c
index 06ef9a255c76..f120e1207874 100644
--- a/fs/devpts/inode.c
+++ b/fs/devpts/inode.c
@@ -20,9 +20,12 @@
20#include <linux/devpts_fs.h> 20#include <linux/devpts_fs.h>
21#include <linux/parser.h> 21#include <linux/parser.h>
22#include <linux/fsnotify.h> 22#include <linux/fsnotify.h>
23#include <linux/seq_file.h>
23 24
24#define DEVPTS_SUPER_MAGIC 0x1cd1 25#define DEVPTS_SUPER_MAGIC 0x1cd1
25 26
27#define DEVPTS_DEFAULT_MODE 0600
28
26static struct vfsmount *devpts_mnt; 29static struct vfsmount *devpts_mnt;
27static struct dentry *devpts_root; 30static struct dentry *devpts_root;
28 31
@@ -32,7 +35,7 @@ static struct {
32 uid_t uid; 35 uid_t uid;
33 gid_t gid; 36 gid_t gid;
34 umode_t mode; 37 umode_t mode;
35} config = {.mode = 0600}; 38} config = {.mode = DEVPTS_DEFAULT_MODE};
36 39
37enum { 40enum {
38 Opt_uid, Opt_gid, Opt_mode, 41 Opt_uid, Opt_gid, Opt_mode,
@@ -54,7 +57,7 @@ static int devpts_remount(struct super_block *sb, int *flags, char *data)
54 config.setgid = 0; 57 config.setgid = 0;
55 config.uid = 0; 58 config.uid = 0;
56 config.gid = 0; 59 config.gid = 0;
57 config.mode = 0600; 60 config.mode = DEVPTS_DEFAULT_MODE;
58 61
59 while ((p = strsep(&data, ",")) != NULL) { 62 while ((p = strsep(&data, ",")) != NULL) {
60 substring_t args[MAX_OPT_ARGS]; 63 substring_t args[MAX_OPT_ARGS];
@@ -81,7 +84,7 @@ static int devpts_remount(struct super_block *sb, int *flags, char *data)
81 case Opt_mode: 84 case Opt_mode:
82 if (match_octal(&args[0], &option)) 85 if (match_octal(&args[0], &option))
83 return -EINVAL; 86 return -EINVAL;
84 config.mode = option & ~S_IFMT; 87 config.mode = option & S_IALLUGO;
85 break; 88 break;
86 default: 89 default:
87 printk(KERN_ERR "devpts: called with bogus options\n"); 90 printk(KERN_ERR "devpts: called with bogus options\n");
@@ -92,9 +95,21 @@ static int devpts_remount(struct super_block *sb, int *flags, char *data)
92 return 0; 95 return 0;
93} 96}
94 97
98static int devpts_show_options(struct seq_file *seq, struct vfsmount *vfs)
99{
100 if (config.setuid)
101 seq_printf(seq, ",uid=%u", config.uid);
102 if (config.setgid)
103 seq_printf(seq, ",gid=%u", config.gid);
104 seq_printf(seq, ",mode=%03o", config.mode);
105
106 return 0;
107}
108
95static const struct super_operations devpts_sops = { 109static const struct super_operations devpts_sops = {
96 .statfs = simple_statfs, 110 .statfs = simple_statfs,
97 .remount_fs = devpts_remount, 111 .remount_fs = devpts_remount,
112 .show_options = devpts_show_options,
98}; 113};
99 114
100static int 115static int
diff --git a/fs/dlm/ast.c b/fs/dlm/ast.c
index 6308122890ca..8bf31e3fbf01 100644
--- a/fs/dlm/ast.c
+++ b/fs/dlm/ast.c
@@ -39,7 +39,6 @@ void dlm_add_ast(struct dlm_lkb *lkb, int type)
39 dlm_user_add_ast(lkb, type); 39 dlm_user_add_ast(lkb, type);
40 return; 40 return;
41 } 41 }
42 DLM_ASSERT(lkb->lkb_astaddr != DLM_FAKE_USER_AST, dlm_print_lkb(lkb););
43 42
44 spin_lock(&ast_queue_lock); 43 spin_lock(&ast_queue_lock);
45 if (!(lkb->lkb_ast_type & (AST_COMP | AST_BAST))) { 44 if (!(lkb->lkb_ast_type & (AST_COMP | AST_BAST))) {
@@ -58,8 +57,8 @@ static void process_asts(void)
58 struct dlm_ls *ls = NULL; 57 struct dlm_ls *ls = NULL;
59 struct dlm_rsb *r = NULL; 58 struct dlm_rsb *r = NULL;
60 struct dlm_lkb *lkb; 59 struct dlm_lkb *lkb;
61 void (*cast) (long param); 60 void (*cast) (void *astparam);
62 void (*bast) (long param, int mode); 61 void (*bast) (void *astparam, int mode);
63 int type = 0, found, bmode; 62 int type = 0, found, bmode;
64 63
65 for (;;) { 64 for (;;) {
@@ -83,8 +82,8 @@ static void process_asts(void)
83 if (!found) 82 if (!found)
84 break; 83 break;
85 84
86 cast = lkb->lkb_astaddr; 85 cast = lkb->lkb_astfn;
87 bast = lkb->lkb_bastaddr; 86 bast = lkb->lkb_bastfn;
88 bmode = lkb->lkb_bastmode; 87 bmode = lkb->lkb_bastmode;
89 88
90 if ((type & AST_COMP) && cast) 89 if ((type & AST_COMP) && cast)
diff --git a/fs/dlm/config.c b/fs/dlm/config.c
index 2f8e3c81bc19..c3ad1dff3b25 100644
--- a/fs/dlm/config.c
+++ b/fs/dlm/config.c
@@ -604,7 +604,7 @@ static struct clusters clusters_root = {
604 }, 604 },
605}; 605};
606 606
607int dlm_config_init(void) 607int __init dlm_config_init(void)
608{ 608{
609 config_group_init(&clusters_root.subsys.su_group); 609 config_group_init(&clusters_root.subsys.su_group);
610 mutex_init(&clusters_root.subsys.su_mutex); 610 mutex_init(&clusters_root.subsys.su_mutex);
diff --git a/fs/dlm/debug_fs.c b/fs/dlm/debug_fs.c
index 12c3bfd5e660..8fc24f4507a3 100644
--- a/fs/dlm/debug_fs.c
+++ b/fs/dlm/debug_fs.c
@@ -162,14 +162,12 @@ static int print_resource(struct dlm_rsb *res, struct seq_file *s)
162 162
163static void print_lock(struct seq_file *s, struct dlm_lkb *lkb, struct dlm_rsb *r) 163static void print_lock(struct seq_file *s, struct dlm_lkb *lkb, struct dlm_rsb *r)
164{ 164{
165 struct dlm_user_args *ua;
166 unsigned int waiting = 0; 165 unsigned int waiting = 0;
167 uint64_t xid = 0; 166 uint64_t xid = 0;
168 167
169 if (lkb->lkb_flags & DLM_IFL_USER) { 168 if (lkb->lkb_flags & DLM_IFL_USER) {
170 ua = (struct dlm_user_args *) lkb->lkb_astparam; 169 if (lkb->lkb_ua)
171 if (ua) 170 xid = lkb->lkb_ua->xid;
172 xid = ua->xid;
173 } 171 }
174 172
175 if (lkb->lkb_timestamp) 173 if (lkb->lkb_timestamp)
@@ -543,7 +541,7 @@ void dlm_delete_debug_file(struct dlm_ls *ls)
543 debugfs_remove(ls->ls_debug_locks_dentry); 541 debugfs_remove(ls->ls_debug_locks_dentry);
544} 542}
545 543
546int dlm_register_debugfs(void) 544int __init dlm_register_debugfs(void)
547{ 545{
548 mutex_init(&debug_buf_lock); 546 mutex_init(&debug_buf_lock);
549 dlm_root = debugfs_create_dir("dlm", NULL); 547 dlm_root = debugfs_create_dir("dlm", NULL);
diff --git a/fs/dlm/dir.c b/fs/dlm/dir.c
index ff97ba924333..85defeb64df4 100644
--- a/fs/dlm/dir.c
+++ b/fs/dlm/dir.c
@@ -220,6 +220,7 @@ int dlm_recover_directory(struct dlm_ls *ls)
220 last_len = 0; 220 last_len = 0;
221 221
222 for (;;) { 222 for (;;) {
223 int left;
223 error = dlm_recovery_stopped(ls); 224 error = dlm_recovery_stopped(ls);
224 if (error) 225 if (error)
225 goto out_free; 226 goto out_free;
@@ -235,12 +236,21 @@ int dlm_recover_directory(struct dlm_ls *ls)
235 * pick namelen/name pairs out of received buffer 236 * pick namelen/name pairs out of received buffer
236 */ 237 */
237 238
238 b = ls->ls_recover_buf + sizeof(struct dlm_rcom); 239 b = ls->ls_recover_buf->rc_buf;
240 left = ls->ls_recover_buf->rc_header.h_length;
241 left -= sizeof(struct dlm_rcom);
239 242
240 for (;;) { 243 for (;;) {
241 memcpy(&namelen, b, sizeof(uint16_t)); 244 __be16 v;
242 namelen = be16_to_cpu(namelen); 245
243 b += sizeof(uint16_t); 246 error = -EINVAL;
247 if (left < sizeof(__be16))
248 goto out_free;
249
250 memcpy(&v, b, sizeof(__be16));
251 namelen = be16_to_cpu(v);
252 b += sizeof(__be16);
253 left -= sizeof(__be16);
244 254
245 /* namelen of 0xFFFFF marks end of names for 255 /* namelen of 0xFFFFF marks end of names for
246 this node; namelen of 0 marks end of the 256 this node; namelen of 0 marks end of the
@@ -251,6 +261,12 @@ int dlm_recover_directory(struct dlm_ls *ls)
251 if (!namelen) 261 if (!namelen)
252 break; 262 break;
253 263
264 if (namelen > left)
265 goto out_free;
266
267 if (namelen > DLM_RESNAME_MAXLEN)
268 goto out_free;
269
254 error = -ENOMEM; 270 error = -ENOMEM;
255 de = get_free_de(ls, namelen); 271 de = get_free_de(ls, namelen);
256 if (!de) 272 if (!de)
@@ -262,6 +278,7 @@ int dlm_recover_directory(struct dlm_ls *ls)
262 memcpy(de->name, b, namelen); 278 memcpy(de->name, b, namelen);
263 memcpy(last_name, b, namelen); 279 memcpy(last_name, b, namelen);
264 b += namelen; 280 b += namelen;
281 left -= namelen;
265 282
266 add_entry_to_hash(ls, de); 283 add_entry_to_hash(ls, de);
267 count++; 284 count++;
@@ -302,6 +319,9 @@ static int get_entry(struct dlm_ls *ls, int nodeid, char *name,
302 319
303 write_unlock(&ls->ls_dirtbl[bucket].lock); 320 write_unlock(&ls->ls_dirtbl[bucket].lock);
304 321
322 if (namelen > DLM_RESNAME_MAXLEN)
323 return -EINVAL;
324
305 de = kzalloc(sizeof(struct dlm_direntry) + namelen, GFP_KERNEL); 325 de = kzalloc(sizeof(struct dlm_direntry) + namelen, GFP_KERNEL);
306 if (!de) 326 if (!de)
307 return -ENOMEM; 327 return -ENOMEM;
diff --git a/fs/dlm/dlm_internal.h b/fs/dlm/dlm_internal.h
index ec61bbaf25df..d30ea8b433a2 100644
--- a/fs/dlm/dlm_internal.h
+++ b/fs/dlm/dlm_internal.h
@@ -92,8 +92,6 @@ do { \
92 } \ 92 } \
93} 93}
94 94
95#define DLM_FAKE_USER_AST ERR_PTR(-EINVAL)
96
97 95
98struct dlm_direntry { 96struct dlm_direntry {
99 struct list_head list; 97 struct list_head list;
@@ -146,9 +144,9 @@ struct dlm_recover {
146 144
147struct dlm_args { 145struct dlm_args {
148 uint32_t flags; 146 uint32_t flags;
149 void *astaddr; 147 void (*astfn) (void *astparam);
150 long astparam; 148 void *astparam;
151 void *bastaddr; 149 void (*bastfn) (void *astparam, int mode);
152 int mode; 150 int mode;
153 struct dlm_lksb *lksb; 151 struct dlm_lksb *lksb;
154 unsigned long timeout; 152 unsigned long timeout;
@@ -253,9 +251,12 @@ struct dlm_lkb {
253 251
254 char *lkb_lvbptr; 252 char *lkb_lvbptr;
255 struct dlm_lksb *lkb_lksb; /* caller's status block */ 253 struct dlm_lksb *lkb_lksb; /* caller's status block */
256 void *lkb_astaddr; /* caller's ast function */ 254 void (*lkb_astfn) (void *astparam);
257 void *lkb_bastaddr; /* caller's bast function */ 255 void (*lkb_bastfn) (void *astparam, int mode);
258 long lkb_astparam; /* caller's ast arg */ 256 union {
257 void *lkb_astparam; /* caller's ast arg */
258 struct dlm_user_args *lkb_ua;
259 };
259}; 260};
260 261
261 262
@@ -403,28 +404,34 @@ struct dlm_rcom {
403 char rc_buf[0]; 404 char rc_buf[0];
404}; 405};
405 406
407union dlm_packet {
408 struct dlm_header header; /* common to other two */
409 struct dlm_message message;
410 struct dlm_rcom rcom;
411};
412
406struct rcom_config { 413struct rcom_config {
407 uint32_t rf_lvblen; 414 __le32 rf_lvblen;
408 uint32_t rf_lsflags; 415 __le32 rf_lsflags;
409 uint64_t rf_unused; 416 __le64 rf_unused;
410}; 417};
411 418
412struct rcom_lock { 419struct rcom_lock {
413 uint32_t rl_ownpid; 420 __le32 rl_ownpid;
414 uint32_t rl_lkid; 421 __le32 rl_lkid;
415 uint32_t rl_remid; 422 __le32 rl_remid;
416 uint32_t rl_parent_lkid; 423 __le32 rl_parent_lkid;
417 uint32_t rl_parent_remid; 424 __le32 rl_parent_remid;
418 uint32_t rl_exflags; 425 __le32 rl_exflags;
419 uint32_t rl_flags; 426 __le32 rl_flags;
420 uint32_t rl_lvbseq; 427 __le32 rl_lvbseq;
421 int rl_result; 428 __le32 rl_result;
422 int8_t rl_rqmode; 429 int8_t rl_rqmode;
423 int8_t rl_grmode; 430 int8_t rl_grmode;
424 int8_t rl_status; 431 int8_t rl_status;
425 int8_t rl_asts; 432 int8_t rl_asts;
426 uint16_t rl_wait_type; 433 __le16 rl_wait_type;
427 uint16_t rl_namelen; 434 __le16 rl_namelen;
428 char rl_name[DLM_RESNAME_MAXLEN]; 435 char rl_name[DLM_RESNAME_MAXLEN];
429 char rl_lvb[0]; 436 char rl_lvb[0];
430}; 437};
@@ -494,7 +501,7 @@ struct dlm_ls {
494 struct rw_semaphore ls_recv_active; /* block dlm_recv */ 501 struct rw_semaphore ls_recv_active; /* block dlm_recv */
495 struct list_head ls_requestqueue;/* queue remote requests */ 502 struct list_head ls_requestqueue;/* queue remote requests */
496 struct mutex ls_requestqueue_mutex; 503 struct mutex ls_requestqueue_mutex;
497 char *ls_recover_buf; 504 struct dlm_rcom *ls_recover_buf;
498 int ls_recover_nodeid; /* for debugging */ 505 int ls_recover_nodeid; /* for debugging */
499 uint64_t ls_rcom_seq; 506 uint64_t ls_rcom_seq;
500 spinlock_t ls_rcom_spin; 507 spinlock_t ls_rcom_spin;
diff --git a/fs/dlm/lock.c b/fs/dlm/lock.c
index ff4a198fa677..8f250ac8b928 100644
--- a/fs/dlm/lock.c
+++ b/fs/dlm/lock.c
@@ -436,11 +436,15 @@ static int find_rsb(struct dlm_ls *ls, char *name, int namelen,
436{ 436{
437 struct dlm_rsb *r, *tmp; 437 struct dlm_rsb *r, *tmp;
438 uint32_t hash, bucket; 438 uint32_t hash, bucket;
439 int error = 0; 439 int error = -EINVAL;
440
441 if (namelen > DLM_RESNAME_MAXLEN)
442 goto out;
440 443
441 if (dlm_no_directory(ls)) 444 if (dlm_no_directory(ls))
442 flags |= R_CREATE; 445 flags |= R_CREATE;
443 446
447 error = 0;
444 hash = jhash(name, namelen, 0); 448 hash = jhash(name, namelen, 0);
445 bucket = hash & (ls->ls_rsbtbl_size - 1); 449 bucket = hash & (ls->ls_rsbtbl_size - 1);
446 450
@@ -1222,6 +1226,8 @@ static void set_lvb_lock_pc(struct dlm_rsb *r, struct dlm_lkb *lkb,
1222 b = dlm_lvb_operations[lkb->lkb_grmode + 1][lkb->lkb_rqmode + 1]; 1226 b = dlm_lvb_operations[lkb->lkb_grmode + 1][lkb->lkb_rqmode + 1];
1223 if (b == 1) { 1227 if (b == 1) {
1224 int len = receive_extralen(ms); 1228 int len = receive_extralen(ms);
1229 if (len > DLM_RESNAME_MAXLEN)
1230 len = DLM_RESNAME_MAXLEN;
1225 memcpy(lkb->lkb_lvbptr, ms->m_extra, len); 1231 memcpy(lkb->lkb_lvbptr, ms->m_extra, len);
1226 lkb->lkb_lvbseq = ms->m_lvbseq; 1232 lkb->lkb_lvbseq = ms->m_lvbseq;
1227 } 1233 }
@@ -1775,7 +1781,7 @@ static void grant_pending_locks(struct dlm_rsb *r)
1775 */ 1781 */
1776 1782
1777 list_for_each_entry_safe(lkb, s, &r->res_grantqueue, lkb_statequeue) { 1783 list_for_each_entry_safe(lkb, s, &r->res_grantqueue, lkb_statequeue) {
1778 if (lkb->lkb_bastaddr && lock_requires_bast(lkb, high, cw)) { 1784 if (lkb->lkb_bastfn && lock_requires_bast(lkb, high, cw)) {
1779 if (cw && high == DLM_LOCK_PR) 1785 if (cw && high == DLM_LOCK_PR)
1780 queue_bast(r, lkb, DLM_LOCK_CW); 1786 queue_bast(r, lkb, DLM_LOCK_CW);
1781 else 1787 else
@@ -1805,7 +1811,7 @@ static void send_bast_queue(struct dlm_rsb *r, struct list_head *head,
1805 struct dlm_lkb *gr; 1811 struct dlm_lkb *gr;
1806 1812
1807 list_for_each_entry(gr, head, lkb_statequeue) { 1813 list_for_each_entry(gr, head, lkb_statequeue) {
1808 if (gr->lkb_bastaddr && modes_require_bast(gr, lkb)) { 1814 if (gr->lkb_bastfn && modes_require_bast(gr, lkb)) {
1809 queue_bast(r, gr, lkb->lkb_rqmode); 1815 queue_bast(r, gr, lkb->lkb_rqmode);
1810 gr->lkb_highbast = lkb->lkb_rqmode; 1816 gr->lkb_highbast = lkb->lkb_rqmode;
1811 } 1817 }
@@ -1960,8 +1966,11 @@ static void confirm_master(struct dlm_rsb *r, int error)
1960} 1966}
1961 1967
1962static int set_lock_args(int mode, struct dlm_lksb *lksb, uint32_t flags, 1968static int set_lock_args(int mode, struct dlm_lksb *lksb, uint32_t flags,
1963 int namelen, unsigned long timeout_cs, void *ast, 1969 int namelen, unsigned long timeout_cs,
1964 void *astarg, void *bast, struct dlm_args *args) 1970 void (*ast) (void *astparam),
1971 void *astparam,
1972 void (*bast) (void *astparam, int mode),
1973 struct dlm_args *args)
1965{ 1974{
1966 int rv = -EINVAL; 1975 int rv = -EINVAL;
1967 1976
@@ -2011,9 +2020,9 @@ static int set_lock_args(int mode, struct dlm_lksb *lksb, uint32_t flags,
2011 an active lkb cannot be modified before locking the rsb */ 2020 an active lkb cannot be modified before locking the rsb */
2012 2021
2013 args->flags = flags; 2022 args->flags = flags;
2014 args->astaddr = ast; 2023 args->astfn = ast;
2015 args->astparam = (long) astarg; 2024 args->astparam = astparam;
2016 args->bastaddr = bast; 2025 args->bastfn = bast;
2017 args->timeout = timeout_cs; 2026 args->timeout = timeout_cs;
2018 args->mode = mode; 2027 args->mode = mode;
2019 args->lksb = lksb; 2028 args->lksb = lksb;
@@ -2032,7 +2041,7 @@ static int set_unlock_args(uint32_t flags, void *astarg, struct dlm_args *args)
2032 return -EINVAL; 2041 return -EINVAL;
2033 2042
2034 args->flags = flags; 2043 args->flags = flags;
2035 args->astparam = (long) astarg; 2044 args->astparam = astarg;
2036 return 0; 2045 return 0;
2037} 2046}
2038 2047
@@ -2062,9 +2071,9 @@ static int validate_lock_args(struct dlm_ls *ls, struct dlm_lkb *lkb,
2062 2071
2063 lkb->lkb_exflags = args->flags; 2072 lkb->lkb_exflags = args->flags;
2064 lkb->lkb_sbflags = 0; 2073 lkb->lkb_sbflags = 0;
2065 lkb->lkb_astaddr = args->astaddr; 2074 lkb->lkb_astfn = args->astfn;
2066 lkb->lkb_astparam = args->astparam; 2075 lkb->lkb_astparam = args->astparam;
2067 lkb->lkb_bastaddr = args->bastaddr; 2076 lkb->lkb_bastfn = args->bastfn;
2068 lkb->lkb_rqmode = args->mode; 2077 lkb->lkb_rqmode = args->mode;
2069 lkb->lkb_lksb = args->lksb; 2078 lkb->lkb_lksb = args->lksb;
2070 lkb->lkb_lvbptr = args->lksb->sb_lvbptr; 2079 lkb->lkb_lvbptr = args->lksb->sb_lvbptr;
@@ -2711,9 +2720,9 @@ static void send_args(struct dlm_rsb *r, struct dlm_lkb *lkb,
2711 /* m_result and m_bastmode are set from function args, 2720 /* m_result and m_bastmode are set from function args,
2712 not from lkb fields */ 2721 not from lkb fields */
2713 2722
2714 if (lkb->lkb_bastaddr) 2723 if (lkb->lkb_bastfn)
2715 ms->m_asts |= AST_BAST; 2724 ms->m_asts |= AST_BAST;
2716 if (lkb->lkb_astaddr) 2725 if (lkb->lkb_astfn)
2717 ms->m_asts |= AST_COMP; 2726 ms->m_asts |= AST_COMP;
2718 2727
2719 /* compare with switch in create_message; send_remove() doesn't 2728 /* compare with switch in create_message; send_remove() doesn't
@@ -2989,11 +2998,23 @@ static int receive_lvb(struct dlm_ls *ls, struct dlm_lkb *lkb,
2989 if (!lkb->lkb_lvbptr) 2998 if (!lkb->lkb_lvbptr)
2990 return -ENOMEM; 2999 return -ENOMEM;
2991 len = receive_extralen(ms); 3000 len = receive_extralen(ms);
3001 if (len > DLM_RESNAME_MAXLEN)
3002 len = DLM_RESNAME_MAXLEN;
2992 memcpy(lkb->lkb_lvbptr, ms->m_extra, len); 3003 memcpy(lkb->lkb_lvbptr, ms->m_extra, len);
2993 } 3004 }
2994 return 0; 3005 return 0;
2995} 3006}
2996 3007
3008static void fake_bastfn(void *astparam, int mode)
3009{
3010 log_print("fake_bastfn should not be called");
3011}
3012
3013static void fake_astfn(void *astparam)
3014{
3015 log_print("fake_astfn should not be called");
3016}
3017
2997static int receive_request_args(struct dlm_ls *ls, struct dlm_lkb *lkb, 3018static int receive_request_args(struct dlm_ls *ls, struct dlm_lkb *lkb,
2998 struct dlm_message *ms) 3019 struct dlm_message *ms)
2999{ 3020{
@@ -3002,8 +3023,9 @@ static int receive_request_args(struct dlm_ls *ls, struct dlm_lkb *lkb,
3002 lkb->lkb_remid = ms->m_lkid; 3023 lkb->lkb_remid = ms->m_lkid;
3003 lkb->lkb_grmode = DLM_LOCK_IV; 3024 lkb->lkb_grmode = DLM_LOCK_IV;
3004 lkb->lkb_rqmode = ms->m_rqmode; 3025 lkb->lkb_rqmode = ms->m_rqmode;
3005 lkb->lkb_bastaddr = (void *) (long) (ms->m_asts & AST_BAST); 3026
3006 lkb->lkb_astaddr = (void *) (long) (ms->m_asts & AST_COMP); 3027 lkb->lkb_bastfn = (ms->m_asts & AST_BAST) ? &fake_bastfn : NULL;
3028 lkb->lkb_astfn = (ms->m_asts & AST_COMP) ? &fake_astfn : NULL;
3007 3029
3008 if (lkb->lkb_exflags & DLM_LKF_VALBLK) { 3030 if (lkb->lkb_exflags & DLM_LKF_VALBLK) {
3009 /* lkb was just created so there won't be an lvb yet */ 3031 /* lkb was just created so there won't be an lvb yet */
@@ -3802,7 +3824,7 @@ static void dlm_receive_message(struct dlm_ls *ls, struct dlm_message *ms,
3802 int nodeid) 3824 int nodeid)
3803{ 3825{
3804 if (dlm_locking_stopped(ls)) { 3826 if (dlm_locking_stopped(ls)) {
3805 dlm_add_requestqueue(ls, nodeid, (struct dlm_header *) ms); 3827 dlm_add_requestqueue(ls, nodeid, ms);
3806 } else { 3828 } else {
3807 dlm_wait_requestqueue(ls); 3829 dlm_wait_requestqueue(ls);
3808 _receive_message(ls, ms); 3830 _receive_message(ls, ms);
@@ -3822,21 +3844,20 @@ void dlm_receive_message_saved(struct dlm_ls *ls, struct dlm_message *ms)
3822 standard locking activity) or an RCOM (recovery message sent as part of 3844 standard locking activity) or an RCOM (recovery message sent as part of
3823 lockspace recovery). */ 3845 lockspace recovery). */
3824 3846
3825void dlm_receive_buffer(struct dlm_header *hd, int nodeid) 3847void dlm_receive_buffer(union dlm_packet *p, int nodeid)
3826{ 3848{
3827 struct dlm_message *ms = (struct dlm_message *) hd; 3849 struct dlm_header *hd = &p->header;
3828 struct dlm_rcom *rc = (struct dlm_rcom *) hd;
3829 struct dlm_ls *ls; 3850 struct dlm_ls *ls;
3830 int type = 0; 3851 int type = 0;
3831 3852
3832 switch (hd->h_cmd) { 3853 switch (hd->h_cmd) {
3833 case DLM_MSG: 3854 case DLM_MSG:
3834 dlm_message_in(ms); 3855 dlm_message_in(&p->message);
3835 type = ms->m_type; 3856 type = p->message.m_type;
3836 break; 3857 break;
3837 case DLM_RCOM: 3858 case DLM_RCOM:
3838 dlm_rcom_in(rc); 3859 dlm_rcom_in(&p->rcom);
3839 type = rc->rc_type; 3860 type = p->rcom.rc_type;
3840 break; 3861 break;
3841 default: 3862 default:
3842 log_print("invalid h_cmd %d from %u", hd->h_cmd, nodeid); 3863 log_print("invalid h_cmd %d from %u", hd->h_cmd, nodeid);
@@ -3856,7 +3877,7 @@ void dlm_receive_buffer(struct dlm_header *hd, int nodeid)
3856 hd->h_lockspace, nodeid, hd->h_cmd, type); 3877 hd->h_lockspace, nodeid, hd->h_cmd, type);
3857 3878
3858 if (hd->h_cmd == DLM_RCOM && type == DLM_RCOM_STATUS) 3879 if (hd->h_cmd == DLM_RCOM && type == DLM_RCOM_STATUS)
3859 dlm_send_ls_not_ready(nodeid, rc); 3880 dlm_send_ls_not_ready(nodeid, &p->rcom);
3860 return; 3881 return;
3861 } 3882 }
3862 3883
@@ -3865,9 +3886,9 @@ void dlm_receive_buffer(struct dlm_header *hd, int nodeid)
3865 3886
3866 down_read(&ls->ls_recv_active); 3887 down_read(&ls->ls_recv_active);
3867 if (hd->h_cmd == DLM_MSG) 3888 if (hd->h_cmd == DLM_MSG)
3868 dlm_receive_message(ls, ms, nodeid); 3889 dlm_receive_message(ls, &p->message, nodeid);
3869 else 3890 else
3870 dlm_receive_rcom(ls, rc, nodeid); 3891 dlm_receive_rcom(ls, &p->rcom, nodeid);
3871 up_read(&ls->ls_recv_active); 3892 up_read(&ls->ls_recv_active);
3872 3893
3873 dlm_put_lockspace(ls); 3894 dlm_put_lockspace(ls);
@@ -4267,32 +4288,34 @@ static struct dlm_lkb *search_remid(struct dlm_rsb *r, int nodeid,
4267 return NULL; 4288 return NULL;
4268} 4289}
4269 4290
4291/* needs at least dlm_rcom + rcom_lock */
4270static int receive_rcom_lock_args(struct dlm_ls *ls, struct dlm_lkb *lkb, 4292static int receive_rcom_lock_args(struct dlm_ls *ls, struct dlm_lkb *lkb,
4271 struct dlm_rsb *r, struct dlm_rcom *rc) 4293 struct dlm_rsb *r, struct dlm_rcom *rc)
4272{ 4294{
4273 struct rcom_lock *rl = (struct rcom_lock *) rc->rc_buf; 4295 struct rcom_lock *rl = (struct rcom_lock *) rc->rc_buf;
4274 int lvblen;
4275 4296
4276 lkb->lkb_nodeid = rc->rc_header.h_nodeid; 4297 lkb->lkb_nodeid = rc->rc_header.h_nodeid;
4277 lkb->lkb_ownpid = rl->rl_ownpid; 4298 lkb->lkb_ownpid = le32_to_cpu(rl->rl_ownpid);
4278 lkb->lkb_remid = rl->rl_lkid; 4299 lkb->lkb_remid = le32_to_cpu(rl->rl_lkid);
4279 lkb->lkb_exflags = rl->rl_exflags; 4300 lkb->lkb_exflags = le32_to_cpu(rl->rl_exflags);
4280 lkb->lkb_flags = rl->rl_flags & 0x0000FFFF; 4301 lkb->lkb_flags = le32_to_cpu(rl->rl_flags) & 0x0000FFFF;
4281 lkb->lkb_flags |= DLM_IFL_MSTCPY; 4302 lkb->lkb_flags |= DLM_IFL_MSTCPY;
4282 lkb->lkb_lvbseq = rl->rl_lvbseq; 4303 lkb->lkb_lvbseq = le32_to_cpu(rl->rl_lvbseq);
4283 lkb->lkb_rqmode = rl->rl_rqmode; 4304 lkb->lkb_rqmode = rl->rl_rqmode;
4284 lkb->lkb_grmode = rl->rl_grmode; 4305 lkb->lkb_grmode = rl->rl_grmode;
4285 /* don't set lkb_status because add_lkb wants to itself */ 4306 /* don't set lkb_status because add_lkb wants to itself */
4286 4307
4287 lkb->lkb_bastaddr = (void *) (long) (rl->rl_asts & AST_BAST); 4308 lkb->lkb_bastfn = (rl->rl_asts & AST_BAST) ? &fake_bastfn : NULL;
4288 lkb->lkb_astaddr = (void *) (long) (rl->rl_asts & AST_COMP); 4309 lkb->lkb_astfn = (rl->rl_asts & AST_COMP) ? &fake_astfn : NULL;
4289 4310
4290 if (lkb->lkb_exflags & DLM_LKF_VALBLK) { 4311 if (lkb->lkb_exflags & DLM_LKF_VALBLK) {
4312 int lvblen = rc->rc_header.h_length - sizeof(struct dlm_rcom) -
4313 sizeof(struct rcom_lock);
4314 if (lvblen > ls->ls_lvblen)
4315 return -EINVAL;
4291 lkb->lkb_lvbptr = dlm_allocate_lvb(ls); 4316 lkb->lkb_lvbptr = dlm_allocate_lvb(ls);
4292 if (!lkb->lkb_lvbptr) 4317 if (!lkb->lkb_lvbptr)
4293 return -ENOMEM; 4318 return -ENOMEM;
4294 lvblen = rc->rc_header.h_length - sizeof(struct dlm_rcom) -
4295 sizeof(struct rcom_lock);
4296 memcpy(lkb->lkb_lvbptr, rl->rl_lvb, lvblen); 4319 memcpy(lkb->lkb_lvbptr, rl->rl_lvb, lvblen);
4297 } 4320 }
4298 4321
@@ -4300,7 +4323,8 @@ static int receive_rcom_lock_args(struct dlm_ls *ls, struct dlm_lkb *lkb,
4300 The real granted mode of these converting locks cannot be determined 4323 The real granted mode of these converting locks cannot be determined
4301 until all locks have been rebuilt on the rsb (recover_conversion) */ 4324 until all locks have been rebuilt on the rsb (recover_conversion) */
4302 4325
4303 if (rl->rl_wait_type == DLM_MSG_CONVERT && middle_conversion(lkb)) { 4326 if (rl->rl_wait_type == cpu_to_le16(DLM_MSG_CONVERT) &&
4327 middle_conversion(lkb)) {
4304 rl->rl_status = DLM_LKSTS_CONVERT; 4328 rl->rl_status = DLM_LKSTS_CONVERT;
4305 lkb->lkb_grmode = DLM_LOCK_IV; 4329 lkb->lkb_grmode = DLM_LOCK_IV;
4306 rsb_set_flag(r, RSB_RECOVER_CONVERT); 4330 rsb_set_flag(r, RSB_RECOVER_CONVERT);
@@ -4315,6 +4339,7 @@ static int receive_rcom_lock_args(struct dlm_ls *ls, struct dlm_lkb *lkb,
4315 the given values and send back our lkid. We send back our lkid by sending 4339 the given values and send back our lkid. We send back our lkid by sending
4316 back the rcom_lock struct we got but with the remid field filled in. */ 4340 back the rcom_lock struct we got but with the remid field filled in. */
4317 4341
4342/* needs at least dlm_rcom + rcom_lock */
4318int dlm_recover_master_copy(struct dlm_ls *ls, struct dlm_rcom *rc) 4343int dlm_recover_master_copy(struct dlm_ls *ls, struct dlm_rcom *rc)
4319{ 4344{
4320 struct rcom_lock *rl = (struct rcom_lock *) rc->rc_buf; 4345 struct rcom_lock *rl = (struct rcom_lock *) rc->rc_buf;
@@ -4327,13 +4352,14 @@ int dlm_recover_master_copy(struct dlm_ls *ls, struct dlm_rcom *rc)
4327 goto out; 4352 goto out;
4328 } 4353 }
4329 4354
4330 error = find_rsb(ls, rl->rl_name, rl->rl_namelen, R_MASTER, &r); 4355 error = find_rsb(ls, rl->rl_name, le16_to_cpu(rl->rl_namelen),
4356 R_MASTER, &r);
4331 if (error) 4357 if (error)
4332 goto out; 4358 goto out;
4333 4359
4334 lock_rsb(r); 4360 lock_rsb(r);
4335 4361
4336 lkb = search_remid(r, rc->rc_header.h_nodeid, rl->rl_lkid); 4362 lkb = search_remid(r, rc->rc_header.h_nodeid, le32_to_cpu(rl->rl_lkid));
4337 if (lkb) { 4363 if (lkb) {
4338 error = -EEXIST; 4364 error = -EEXIST;
4339 goto out_remid; 4365 goto out_remid;
@@ -4356,18 +4382,20 @@ int dlm_recover_master_copy(struct dlm_ls *ls, struct dlm_rcom *rc)
4356 out_remid: 4382 out_remid:
4357 /* this is the new value returned to the lock holder for 4383 /* this is the new value returned to the lock holder for
4358 saving in its process-copy lkb */ 4384 saving in its process-copy lkb */
4359 rl->rl_remid = lkb->lkb_id; 4385 rl->rl_remid = cpu_to_le32(lkb->lkb_id);
4360 4386
4361 out_unlock: 4387 out_unlock:
4362 unlock_rsb(r); 4388 unlock_rsb(r);
4363 put_rsb(r); 4389 put_rsb(r);
4364 out: 4390 out:
4365 if (error) 4391 if (error)
4366 log_debug(ls, "recover_master_copy %d %x", error, rl->rl_lkid); 4392 log_debug(ls, "recover_master_copy %d %x", error,
4367 rl->rl_result = error; 4393 le32_to_cpu(rl->rl_lkid));
4394 rl->rl_result = cpu_to_le32(error);
4368 return error; 4395 return error;
4369} 4396}
4370 4397
4398/* needs at least dlm_rcom + rcom_lock */
4371int dlm_recover_process_copy(struct dlm_ls *ls, struct dlm_rcom *rc) 4399int dlm_recover_process_copy(struct dlm_ls *ls, struct dlm_rcom *rc)
4372{ 4400{
4373 struct rcom_lock *rl = (struct rcom_lock *) rc->rc_buf; 4401 struct rcom_lock *rl = (struct rcom_lock *) rc->rc_buf;
@@ -4375,15 +4403,16 @@ int dlm_recover_process_copy(struct dlm_ls *ls, struct dlm_rcom *rc)
4375 struct dlm_lkb *lkb; 4403 struct dlm_lkb *lkb;
4376 int error; 4404 int error;
4377 4405
4378 error = find_lkb(ls, rl->rl_lkid, &lkb); 4406 error = find_lkb(ls, le32_to_cpu(rl->rl_lkid), &lkb);
4379 if (error) { 4407 if (error) {
4380 log_error(ls, "recover_process_copy no lkid %x", rl->rl_lkid); 4408 log_error(ls, "recover_process_copy no lkid %x",
4409 le32_to_cpu(rl->rl_lkid));
4381 return error; 4410 return error;
4382 } 4411 }
4383 4412
4384 DLM_ASSERT(is_process_copy(lkb), dlm_print_lkb(lkb);); 4413 DLM_ASSERT(is_process_copy(lkb), dlm_print_lkb(lkb););
4385 4414
4386 error = rl->rl_result; 4415 error = le32_to_cpu(rl->rl_result);
4387 4416
4388 r = lkb->lkb_resource; 4417 r = lkb->lkb_resource;
4389 hold_rsb(r); 4418 hold_rsb(r);
@@ -4402,7 +4431,7 @@ int dlm_recover_process_copy(struct dlm_ls *ls, struct dlm_rcom *rc)
4402 log_debug(ls, "master copy exists %x", lkb->lkb_id); 4431 log_debug(ls, "master copy exists %x", lkb->lkb_id);
4403 /* fall through */ 4432 /* fall through */
4404 case 0: 4433 case 0:
4405 lkb->lkb_remid = rl->rl_remid; 4434 lkb->lkb_remid = le32_to_cpu(rl->rl_remid);
4406 break; 4435 break;
4407 default: 4436 default:
4408 log_error(ls, "dlm_recover_process_copy unknown error %d %x", 4437 log_error(ls, "dlm_recover_process_copy unknown error %d %x",
@@ -4451,7 +4480,7 @@ int dlm_user_request(struct dlm_ls *ls, struct dlm_user_args *ua,
4451 lock and that lkb_astparam is the dlm_user_args structure. */ 4480 lock and that lkb_astparam is the dlm_user_args structure. */
4452 4481
4453 error = set_lock_args(mode, &ua->lksb, flags, namelen, timeout_cs, 4482 error = set_lock_args(mode, &ua->lksb, flags, namelen, timeout_cs,
4454 DLM_FAKE_USER_AST, ua, DLM_FAKE_USER_AST, &args); 4483 fake_astfn, ua, fake_bastfn, &args);
4455 lkb->lkb_flags |= DLM_IFL_USER; 4484 lkb->lkb_flags |= DLM_IFL_USER;
4456 ua->old_mode = DLM_LOCK_IV; 4485 ua->old_mode = DLM_LOCK_IV;
4457 4486
@@ -4504,7 +4533,7 @@ int dlm_user_convert(struct dlm_ls *ls, struct dlm_user_args *ua_tmp,
4504 /* user can change the params on its lock when it converts it, or 4533 /* user can change the params on its lock when it converts it, or
4505 add an lvb that didn't exist before */ 4534 add an lvb that didn't exist before */
4506 4535
4507 ua = (struct dlm_user_args *)lkb->lkb_astparam; 4536 ua = lkb->lkb_ua;
4508 4537
4509 if (flags & DLM_LKF_VALBLK && !ua->lksb.sb_lvbptr) { 4538 if (flags & DLM_LKF_VALBLK && !ua->lksb.sb_lvbptr) {
4510 ua->lksb.sb_lvbptr = kzalloc(DLM_USER_LVB_LEN, GFP_KERNEL); 4539 ua->lksb.sb_lvbptr = kzalloc(DLM_USER_LVB_LEN, GFP_KERNEL);
@@ -4525,7 +4554,7 @@ int dlm_user_convert(struct dlm_ls *ls, struct dlm_user_args *ua_tmp,
4525 ua->old_mode = lkb->lkb_grmode; 4554 ua->old_mode = lkb->lkb_grmode;
4526 4555
4527 error = set_lock_args(mode, &ua->lksb, flags, 0, timeout_cs, 4556 error = set_lock_args(mode, &ua->lksb, flags, 0, timeout_cs,
4528 DLM_FAKE_USER_AST, ua, DLM_FAKE_USER_AST, &args); 4557 fake_astfn, ua, fake_bastfn, &args);
4529 if (error) 4558 if (error)
4530 goto out_put; 4559 goto out_put;
4531 4560
@@ -4555,7 +4584,7 @@ int dlm_user_unlock(struct dlm_ls *ls, struct dlm_user_args *ua_tmp,
4555 if (error) 4584 if (error)
4556 goto out; 4585 goto out;
4557 4586
4558 ua = (struct dlm_user_args *)lkb->lkb_astparam; 4587 ua = lkb->lkb_ua;
4559 4588
4560 if (lvb_in && ua->lksb.sb_lvbptr) 4589 if (lvb_in && ua->lksb.sb_lvbptr)
4561 memcpy(ua->lksb.sb_lvbptr, lvb_in, DLM_USER_LVB_LEN); 4590 memcpy(ua->lksb.sb_lvbptr, lvb_in, DLM_USER_LVB_LEN);
@@ -4604,7 +4633,7 @@ int dlm_user_cancel(struct dlm_ls *ls, struct dlm_user_args *ua_tmp,
4604 if (error) 4633 if (error)
4605 goto out; 4634 goto out;
4606 4635
4607 ua = (struct dlm_user_args *)lkb->lkb_astparam; 4636 ua = lkb->lkb_ua;
4608 if (ua_tmp->castparam) 4637 if (ua_tmp->castparam)
4609 ua->castparam = ua_tmp->castparam; 4638 ua->castparam = ua_tmp->castparam;
4610 ua->user_lksb = ua_tmp->user_lksb; 4639 ua->user_lksb = ua_tmp->user_lksb;
@@ -4642,7 +4671,7 @@ int dlm_user_deadlock(struct dlm_ls *ls, uint32_t flags, uint32_t lkid)
4642 if (error) 4671 if (error)
4643 goto out; 4672 goto out;
4644 4673
4645 ua = (struct dlm_user_args *)lkb->lkb_astparam; 4674 ua = lkb->lkb_ua;
4646 4675
4647 error = set_unlock_args(flags, ua, &args); 4676 error = set_unlock_args(flags, ua, &args);
4648 if (error) 4677 if (error)
@@ -4681,7 +4710,6 @@ int dlm_user_deadlock(struct dlm_ls *ls, uint32_t flags, uint32_t lkid)
4681 4710
4682static int orphan_proc_lock(struct dlm_ls *ls, struct dlm_lkb *lkb) 4711static int orphan_proc_lock(struct dlm_ls *ls, struct dlm_lkb *lkb)
4683{ 4712{
4684 struct dlm_user_args *ua = (struct dlm_user_args *)lkb->lkb_astparam;
4685 struct dlm_args args; 4713 struct dlm_args args;
4686 int error; 4714 int error;
4687 4715
@@ -4690,7 +4718,7 @@ static int orphan_proc_lock(struct dlm_ls *ls, struct dlm_lkb *lkb)
4690 list_add_tail(&lkb->lkb_ownqueue, &ls->ls_orphans); 4718 list_add_tail(&lkb->lkb_ownqueue, &ls->ls_orphans);
4691 mutex_unlock(&ls->ls_orphans_mutex); 4719 mutex_unlock(&ls->ls_orphans_mutex);
4692 4720
4693 set_unlock_args(0, ua, &args); 4721 set_unlock_args(0, lkb->lkb_ua, &args);
4694 4722
4695 error = cancel_lock(ls, lkb, &args); 4723 error = cancel_lock(ls, lkb, &args);
4696 if (error == -DLM_ECANCEL) 4724 if (error == -DLM_ECANCEL)
@@ -4703,11 +4731,10 @@ static int orphan_proc_lock(struct dlm_ls *ls, struct dlm_lkb *lkb)
4703 4731
4704static int unlock_proc_lock(struct dlm_ls *ls, struct dlm_lkb *lkb) 4732static int unlock_proc_lock(struct dlm_ls *ls, struct dlm_lkb *lkb)
4705{ 4733{
4706 struct dlm_user_args *ua = (struct dlm_user_args *)lkb->lkb_astparam;
4707 struct dlm_args args; 4734 struct dlm_args args;
4708 int error; 4735 int error;
4709 4736
4710 set_unlock_args(DLM_LKF_FORCEUNLOCK, ua, &args); 4737 set_unlock_args(DLM_LKF_FORCEUNLOCK, lkb->lkb_ua, &args);
4711 4738
4712 error = unlock_lock(ls, lkb, &args); 4739 error = unlock_lock(ls, lkb, &args);
4713 if (error == -DLM_EUNLOCK) 4740 if (error == -DLM_EUNLOCK)
diff --git a/fs/dlm/lock.h b/fs/dlm/lock.h
index 27b6ed302911..05d9c82e646b 100644
--- a/fs/dlm/lock.h
+++ b/fs/dlm/lock.h
@@ -17,7 +17,7 @@ void dlm_print_rsb(struct dlm_rsb *r);
17void dlm_dump_rsb(struct dlm_rsb *r); 17void dlm_dump_rsb(struct dlm_rsb *r);
18void dlm_print_lkb(struct dlm_lkb *lkb); 18void dlm_print_lkb(struct dlm_lkb *lkb);
19void dlm_receive_message_saved(struct dlm_ls *ls, struct dlm_message *ms); 19void dlm_receive_message_saved(struct dlm_ls *ls, struct dlm_message *ms);
20void dlm_receive_buffer(struct dlm_header *hd, int nodeid); 20void dlm_receive_buffer(union dlm_packet *p, int nodeid);
21int dlm_modes_compat(int mode1, int mode2); 21int dlm_modes_compat(int mode1, int mode2);
22void dlm_put_rsb(struct dlm_rsb *r); 22void dlm_put_rsb(struct dlm_rsb *r);
23void dlm_hold_rsb(struct dlm_rsb *r); 23void dlm_hold_rsb(struct dlm_rsb *r);
diff --git a/fs/dlm/lockspace.c b/fs/dlm/lockspace.c
index b180fdc51085..b64e55e0515d 100644
--- a/fs/dlm/lockspace.c
+++ b/fs/dlm/lockspace.c
@@ -191,7 +191,7 @@ static int do_uevent(struct dlm_ls *ls, int in)
191} 191}
192 192
193 193
194int dlm_lockspace_init(void) 194int __init dlm_lockspace_init(void)
195{ 195{
196 ls_count = 0; 196 ls_count = 0;
197 mutex_init(&ls_lock); 197 mutex_init(&ls_lock);
diff --git a/fs/dlm/memory.c b/fs/dlm/memory.c
index f7783867491a..54c14c6d06cb 100644
--- a/fs/dlm/memory.c
+++ b/fs/dlm/memory.c
@@ -18,7 +18,7 @@
18static struct kmem_cache *lkb_cache; 18static struct kmem_cache *lkb_cache;
19 19
20 20
21int dlm_memory_init(void) 21int __init dlm_memory_init(void)
22{ 22{
23 int ret = 0; 23 int ret = 0;
24 24
@@ -80,7 +80,7 @@ void dlm_free_lkb(struct dlm_lkb *lkb)
80{ 80{
81 if (lkb->lkb_flags & DLM_IFL_USER) { 81 if (lkb->lkb_flags & DLM_IFL_USER) {
82 struct dlm_user_args *ua; 82 struct dlm_user_args *ua;
83 ua = (struct dlm_user_args *)lkb->lkb_astparam; 83 ua = lkb->lkb_ua;
84 if (ua) { 84 if (ua) {
85 if (ua->lksb.sb_lvbptr) 85 if (ua->lksb.sb_lvbptr)
86 kfree(ua->lksb.sb_lvbptr); 86 kfree(ua->lksb.sb_lvbptr);
diff --git a/fs/dlm/midcomms.c b/fs/dlm/midcomms.c
index e69926e984db..07ac709f3ed7 100644
--- a/fs/dlm/midcomms.c
+++ b/fs/dlm/midcomms.c
@@ -61,9 +61,9 @@ int dlm_process_incoming_buffer(int nodeid, const void *base,
61 union { 61 union {
62 unsigned char __buf[DLM_INBUF_LEN]; 62 unsigned char __buf[DLM_INBUF_LEN];
63 /* this is to force proper alignment on some arches */ 63 /* this is to force proper alignment on some arches */
64 struct dlm_header dlm; 64 union dlm_packet p;
65 } __tmp; 65 } __tmp;
66 struct dlm_header *msg = &__tmp.dlm; 66 union dlm_packet *p = &__tmp.p;
67 int ret = 0; 67 int ret = 0;
68 int err = 0; 68 int err = 0;
69 uint16_t msglen; 69 uint16_t msglen;
@@ -75,15 +75,22 @@ int dlm_process_incoming_buffer(int nodeid, const void *base,
75 message may wrap around the end of the buffer back to the 75 message may wrap around the end of the buffer back to the
76 start, so we need to use a temp buffer and copy_from_cb. */ 76 start, so we need to use a temp buffer and copy_from_cb. */
77 77
78 copy_from_cb(msg, base, offset, sizeof(struct dlm_header), 78 copy_from_cb(p, base, offset, sizeof(struct dlm_header),
79 limit); 79 limit);
80 80
81 msglen = le16_to_cpu(msg->h_length); 81 msglen = le16_to_cpu(p->header.h_length);
82 lockspace = msg->h_lockspace; 82 lockspace = p->header.h_lockspace;
83 83
84 err = -EINVAL; 84 err = -EINVAL;
85 if (msglen < sizeof(struct dlm_header)) 85 if (msglen < sizeof(struct dlm_header))
86 break; 86 break;
87 if (p->header.h_cmd == DLM_MSG) {
88 if (msglen < sizeof(struct dlm_message))
89 break;
90 } else {
91 if (msglen < sizeof(struct dlm_rcom))
92 break;
93 }
87 err = -E2BIG; 94 err = -E2BIG;
88 if (msglen > dlm_config.ci_buffer_size) { 95 if (msglen > dlm_config.ci_buffer_size) {
89 log_print("message size %d from %d too big, buf len %d", 96 log_print("message size %d from %d too big, buf len %d",
@@ -104,26 +111,26 @@ int dlm_process_incoming_buffer(int nodeid, const void *base,
104 in the buffer on the stack (which should work for most 111 in the buffer on the stack (which should work for most
105 ordinary messages). */ 112 ordinary messages). */
106 113
107 if (msglen > DLM_INBUF_LEN && msg == &__tmp.dlm) { 114 if (msglen > sizeof(__tmp) && p == &__tmp.p) {
108 msg = kmalloc(dlm_config.ci_buffer_size, GFP_KERNEL); 115 p = kmalloc(dlm_config.ci_buffer_size, GFP_KERNEL);
109 if (msg == NULL) 116 if (p == NULL)
110 return ret; 117 return ret;
111 } 118 }
112 119
113 copy_from_cb(msg, base, offset, msglen, limit); 120 copy_from_cb(p, base, offset, msglen, limit);
114 121
115 BUG_ON(lockspace != msg->h_lockspace); 122 BUG_ON(lockspace != p->header.h_lockspace);
116 123
117 ret += msglen; 124 ret += msglen;
118 offset += msglen; 125 offset += msglen;
119 offset &= (limit - 1); 126 offset &= (limit - 1);
120 len -= msglen; 127 len -= msglen;
121 128
122 dlm_receive_buffer(msg, nodeid); 129 dlm_receive_buffer(p, nodeid);
123 } 130 }
124 131
125 if (msg != &__tmp.dlm) 132 if (p != &__tmp.p)
126 kfree(msg); 133 kfree(p);
127 134
128 return err ? err : ret; 135 return err ? err : ret;
129} 136}
diff --git a/fs/dlm/netlink.c b/fs/dlm/netlink.c
index 863b87d0dc71..714593621f4f 100644
--- a/fs/dlm/netlink.c
+++ b/fs/dlm/netlink.c
@@ -78,7 +78,7 @@ static struct genl_ops dlm_nl_ops = {
78 .doit = user_cmd, 78 .doit = user_cmd,
79}; 79};
80 80
81int dlm_netlink_init(void) 81int __init dlm_netlink_init(void)
82{ 82{
83 int rv; 83 int rv;
84 84
@@ -95,7 +95,7 @@ int dlm_netlink_init(void)
95 return rv; 95 return rv;
96} 96}
97 97
98void dlm_netlink_exit(void) 98void __exit dlm_netlink_exit(void)
99{ 99{
100 genl_unregister_ops(&family, &dlm_nl_ops); 100 genl_unregister_ops(&family, &dlm_nl_ops);
101 genl_unregister_family(&family); 101 genl_unregister_family(&family);
@@ -104,7 +104,6 @@ void dlm_netlink_exit(void)
104static void fill_data(struct dlm_lock_data *data, struct dlm_lkb *lkb) 104static void fill_data(struct dlm_lock_data *data, struct dlm_lkb *lkb)
105{ 105{
106 struct dlm_rsb *r = lkb->lkb_resource; 106 struct dlm_rsb *r = lkb->lkb_resource;
107 struct dlm_user_args *ua = (struct dlm_user_args *) lkb->lkb_astparam;
108 107
109 memset(data, 0, sizeof(struct dlm_lock_data)); 108 memset(data, 0, sizeof(struct dlm_lock_data));
110 109
@@ -117,8 +116,8 @@ static void fill_data(struct dlm_lock_data *data, struct dlm_lkb *lkb)
117 data->grmode = lkb->lkb_grmode; 116 data->grmode = lkb->lkb_grmode;
118 data->rqmode = lkb->lkb_rqmode; 117 data->rqmode = lkb->lkb_rqmode;
119 data->timestamp = lkb->lkb_timestamp; 118 data->timestamp = lkb->lkb_timestamp;
120 if (ua) 119 if (lkb->lkb_ua)
121 data->xid = ua->xid; 120 data->xid = lkb->lkb_ua->xid;
122 if (r) { 121 if (r) {
123 data->lockspace_id = r->res_ls->ls_global_id; 122 data->lockspace_id = r->res_ls->ls_global_id;
124 data->resource_namelen = r->res_length; 123 data->resource_namelen = r->res_length;
diff --git a/fs/dlm/rcom.c b/fs/dlm/rcom.c
index 026824cd3acb..035e6f9990b0 100644
--- a/fs/dlm/rcom.c
+++ b/fs/dlm/rcom.c
@@ -78,13 +78,14 @@ static void send_rcom(struct dlm_ls *ls, struct dlm_mhandle *mh,
78 78
79static void make_config(struct dlm_ls *ls, struct rcom_config *rf) 79static void make_config(struct dlm_ls *ls, struct rcom_config *rf)
80{ 80{
81 rf->rf_lvblen = ls->ls_lvblen; 81 rf->rf_lvblen = cpu_to_le32(ls->ls_lvblen);
82 rf->rf_lsflags = ls->ls_exflags; 82 rf->rf_lsflags = cpu_to_le32(ls->ls_exflags);
83} 83}
84 84
85static int check_config(struct dlm_ls *ls, struct dlm_rcom *rc, int nodeid) 85static int check_config(struct dlm_ls *ls, struct dlm_rcom *rc, int nodeid)
86{ 86{
87 struct rcom_config *rf = (struct rcom_config *) rc->rc_buf; 87 struct rcom_config *rf = (struct rcom_config *) rc->rc_buf;
88 size_t conf_size = sizeof(struct dlm_rcom) + sizeof(struct rcom_config);
88 89
89 if ((rc->rc_header.h_version & 0xFFFF0000) != DLM_HEADER_MAJOR) { 90 if ((rc->rc_header.h_version & 0xFFFF0000) != DLM_HEADER_MAJOR) {
90 log_error(ls, "version mismatch: %x nodeid %d: %x", 91 log_error(ls, "version mismatch: %x nodeid %d: %x",
@@ -93,11 +94,18 @@ static int check_config(struct dlm_ls *ls, struct dlm_rcom *rc, int nodeid)
93 return -EPROTO; 94 return -EPROTO;
94 } 95 }
95 96
96 if (rf->rf_lvblen != ls->ls_lvblen || 97 if (rc->rc_header.h_length < conf_size) {
97 rf->rf_lsflags != ls->ls_exflags) { 98 log_error(ls, "config too short: %d nodeid %d",
99 rc->rc_header.h_length, nodeid);
100 return -EPROTO;
101 }
102
103 if (le32_to_cpu(rf->rf_lvblen) != ls->ls_lvblen ||
104 le32_to_cpu(rf->rf_lsflags) != ls->ls_exflags) {
98 log_error(ls, "config mismatch: %d,%x nodeid %d: %d,%x", 105 log_error(ls, "config mismatch: %d,%x nodeid %d: %d,%x",
99 ls->ls_lvblen, ls->ls_exflags, 106 ls->ls_lvblen, ls->ls_exflags, nodeid,
100 nodeid, rf->rf_lvblen, rf->rf_lsflags); 107 le32_to_cpu(rf->rf_lvblen),
108 le32_to_cpu(rf->rf_lsflags));
101 return -EPROTO; 109 return -EPROTO;
102 } 110 }
103 return 0; 111 return 0;
@@ -128,7 +136,7 @@ int dlm_rcom_status(struct dlm_ls *ls, int nodeid)
128 ls->ls_recover_nodeid = nodeid; 136 ls->ls_recover_nodeid = nodeid;
129 137
130 if (nodeid == dlm_our_nodeid()) { 138 if (nodeid == dlm_our_nodeid()) {
131 rc = (struct dlm_rcom *) ls->ls_recover_buf; 139 rc = ls->ls_recover_buf;
132 rc->rc_result = dlm_recover_status(ls); 140 rc->rc_result = dlm_recover_status(ls);
133 goto out; 141 goto out;
134 } 142 }
@@ -147,7 +155,7 @@ int dlm_rcom_status(struct dlm_ls *ls, int nodeid)
147 if (error) 155 if (error)
148 goto out; 156 goto out;
149 157
150 rc = (struct dlm_rcom *) ls->ls_recover_buf; 158 rc = ls->ls_recover_buf;
151 159
152 if (rc->rc_result == -ESRCH) { 160 if (rc->rc_result == -ESRCH) {
153 /* we pretend the remote lockspace exists with 0 status */ 161 /* we pretend the remote lockspace exists with 0 status */
@@ -201,14 +209,15 @@ int dlm_rcom_names(struct dlm_ls *ls, int nodeid, char *last_name, int last_len)
201{ 209{
202 struct dlm_rcom *rc; 210 struct dlm_rcom *rc;
203 struct dlm_mhandle *mh; 211 struct dlm_mhandle *mh;
204 int error = 0, len = sizeof(struct dlm_rcom); 212 int error = 0;
213 int max_size = dlm_config.ci_buffer_size - sizeof(struct dlm_rcom);
205 214
206 ls->ls_recover_nodeid = nodeid; 215 ls->ls_recover_nodeid = nodeid;
207 216
208 if (nodeid == dlm_our_nodeid()) { 217 if (nodeid == dlm_our_nodeid()) {
209 dlm_copy_master_names(ls, last_name, last_len, 218 dlm_copy_master_names(ls, last_name, last_len,
210 ls->ls_recover_buf + len, 219 ls->ls_recover_buf->rc_buf,
211 dlm_config.ci_buffer_size - len, nodeid); 220 max_size, nodeid);
212 goto out; 221 goto out;
213 } 222 }
214 223
@@ -299,22 +308,22 @@ static void pack_rcom_lock(struct dlm_rsb *r, struct dlm_lkb *lkb,
299{ 308{
300 memset(rl, 0, sizeof(*rl)); 309 memset(rl, 0, sizeof(*rl));
301 310
302 rl->rl_ownpid = lkb->lkb_ownpid; 311 rl->rl_ownpid = cpu_to_le32(lkb->lkb_ownpid);
303 rl->rl_lkid = lkb->lkb_id; 312 rl->rl_lkid = cpu_to_le32(lkb->lkb_id);
304 rl->rl_exflags = lkb->lkb_exflags; 313 rl->rl_exflags = cpu_to_le32(lkb->lkb_exflags);
305 rl->rl_flags = lkb->lkb_flags; 314 rl->rl_flags = cpu_to_le32(lkb->lkb_flags);
306 rl->rl_lvbseq = lkb->lkb_lvbseq; 315 rl->rl_lvbseq = cpu_to_le32(lkb->lkb_lvbseq);
307 rl->rl_rqmode = lkb->lkb_rqmode; 316 rl->rl_rqmode = lkb->lkb_rqmode;
308 rl->rl_grmode = lkb->lkb_grmode; 317 rl->rl_grmode = lkb->lkb_grmode;
309 rl->rl_status = lkb->lkb_status; 318 rl->rl_status = lkb->lkb_status;
310 rl->rl_wait_type = lkb->lkb_wait_type; 319 rl->rl_wait_type = cpu_to_le16(lkb->lkb_wait_type);
311 320
312 if (lkb->lkb_bastaddr) 321 if (lkb->lkb_bastfn)
313 rl->rl_asts |= AST_BAST; 322 rl->rl_asts |= AST_BAST;
314 if (lkb->lkb_astaddr) 323 if (lkb->lkb_astfn)
315 rl->rl_asts |= AST_COMP; 324 rl->rl_asts |= AST_COMP;
316 325
317 rl->rl_namelen = r->res_length; 326 rl->rl_namelen = cpu_to_le16(r->res_length);
318 memcpy(rl->rl_name, r->res_name, r->res_length); 327 memcpy(rl->rl_name, r->res_name, r->res_length);
319 328
320 /* FIXME: might we have an lvb without DLM_LKF_VALBLK set ? 329 /* FIXME: might we have an lvb without DLM_LKF_VALBLK set ?
@@ -348,6 +357,7 @@ int dlm_send_rcom_lock(struct dlm_rsb *r, struct dlm_lkb *lkb)
348 return error; 357 return error;
349} 358}
350 359
360/* needs at least dlm_rcom + rcom_lock */
351static void receive_rcom_lock(struct dlm_ls *ls, struct dlm_rcom *rc_in) 361static void receive_rcom_lock(struct dlm_ls *ls, struct dlm_rcom *rc_in)
352{ 362{
353 struct dlm_rcom *rc; 363 struct dlm_rcom *rc;
@@ -401,7 +411,7 @@ int dlm_send_ls_not_ready(int nodeid, struct dlm_rcom *rc_in)
401 rc->rc_result = -ESRCH; 411 rc->rc_result = -ESRCH;
402 412
403 rf = (struct rcom_config *) rc->rc_buf; 413 rf = (struct rcom_config *) rc->rc_buf;
404 rf->rf_lvblen = -1; 414 rf->rf_lvblen = cpu_to_le32(~0U);
405 415
406 dlm_rcom_out(rc); 416 dlm_rcom_out(rc);
407 dlm_lowcomms_commit_buffer(mh); 417 dlm_lowcomms_commit_buffer(mh);
@@ -439,6 +449,8 @@ static int is_old_reply(struct dlm_ls *ls, struct dlm_rcom *rc)
439 449
440void dlm_receive_rcom(struct dlm_ls *ls, struct dlm_rcom *rc, int nodeid) 450void dlm_receive_rcom(struct dlm_ls *ls, struct dlm_rcom *rc, int nodeid)
441{ 451{
452 int lock_size = sizeof(struct dlm_rcom) + sizeof(struct rcom_lock);
453
442 if (dlm_recovery_stopped(ls) && (rc->rc_type != DLM_RCOM_STATUS)) { 454 if (dlm_recovery_stopped(ls) && (rc->rc_type != DLM_RCOM_STATUS)) {
443 log_debug(ls, "ignoring recovery message %x from %d", 455 log_debug(ls, "ignoring recovery message %x from %d",
444 rc->rc_type, nodeid); 456 rc->rc_type, nodeid);
@@ -462,6 +474,8 @@ void dlm_receive_rcom(struct dlm_ls *ls, struct dlm_rcom *rc, int nodeid)
462 break; 474 break;
463 475
464 case DLM_RCOM_LOCK: 476 case DLM_RCOM_LOCK:
477 if (rc->rc_header.h_length < lock_size)
478 goto Eshort;
465 receive_rcom_lock(ls, rc); 479 receive_rcom_lock(ls, rc);
466 break; 480 break;
467 481
@@ -478,13 +492,18 @@ void dlm_receive_rcom(struct dlm_ls *ls, struct dlm_rcom *rc, int nodeid)
478 break; 492 break;
479 493
480 case DLM_RCOM_LOCK_REPLY: 494 case DLM_RCOM_LOCK_REPLY:
495 if (rc->rc_header.h_length < lock_size)
496 goto Eshort;
481 dlm_recover_process_copy(ls, rc); 497 dlm_recover_process_copy(ls, rc);
482 break; 498 break;
483 499
484 default: 500 default:
485 log_error(ls, "receive_rcom bad type %d", rc->rc_type); 501 log_error(ls, "receive_rcom bad type %d", rc->rc_type);
486 } 502 }
487 out: 503out:
488 return; 504 return;
505Eshort:
506 log_error(ls, "recovery message %x from %d is too short",
507 rc->rc_type, nodeid);
489} 508}
490 509
diff --git a/fs/dlm/recover.c b/fs/dlm/recover.c
index df075dc300fa..80aba5bdd4a4 100644
--- a/fs/dlm/recover.c
+++ b/fs/dlm/recover.c
@@ -94,7 +94,7 @@ void dlm_set_recover_status(struct dlm_ls *ls, uint32_t status)
94 94
95static int wait_status_all(struct dlm_ls *ls, uint32_t wait_status) 95static int wait_status_all(struct dlm_ls *ls, uint32_t wait_status)
96{ 96{
97 struct dlm_rcom *rc = (struct dlm_rcom *) ls->ls_recover_buf; 97 struct dlm_rcom *rc = ls->ls_recover_buf;
98 struct dlm_member *memb; 98 struct dlm_member *memb;
99 int error = 0, delay; 99 int error = 0, delay;
100 100
@@ -123,7 +123,7 @@ static int wait_status_all(struct dlm_ls *ls, uint32_t wait_status)
123 123
124static int wait_status_low(struct dlm_ls *ls, uint32_t wait_status) 124static int wait_status_low(struct dlm_ls *ls, uint32_t wait_status)
125{ 125{
126 struct dlm_rcom *rc = (struct dlm_rcom *) ls->ls_recover_buf; 126 struct dlm_rcom *rc = ls->ls_recover_buf;
127 int error = 0, delay = 0, nodeid = ls->ls_low_nodeid; 127 int error = 0, delay = 0, nodeid = ls->ls_low_nodeid;
128 128
129 for (;;) { 129 for (;;) {
diff --git a/fs/dlm/requestqueue.c b/fs/dlm/requestqueue.c
index 0de04f17ccea..daa4183fbb84 100644
--- a/fs/dlm/requestqueue.c
+++ b/fs/dlm/requestqueue.c
@@ -20,7 +20,7 @@
20struct rq_entry { 20struct rq_entry {
21 struct list_head list; 21 struct list_head list;
22 int nodeid; 22 int nodeid;
23 char request[0]; 23 struct dlm_message request;
24}; 24};
25 25
26/* 26/*
@@ -30,10 +30,10 @@ struct rq_entry {
30 * lockspace is enabled on some while still suspended on others. 30 * lockspace is enabled on some while still suspended on others.
31 */ 31 */
32 32
33void dlm_add_requestqueue(struct dlm_ls *ls, int nodeid, struct dlm_header *hd) 33void dlm_add_requestqueue(struct dlm_ls *ls, int nodeid, struct dlm_message *ms)
34{ 34{
35 struct rq_entry *e; 35 struct rq_entry *e;
36 int length = hd->h_length; 36 int length = ms->m_header.h_length - sizeof(struct dlm_message);
37 37
38 e = kmalloc(sizeof(struct rq_entry) + length, GFP_KERNEL); 38 e = kmalloc(sizeof(struct rq_entry) + length, GFP_KERNEL);
39 if (!e) { 39 if (!e) {
@@ -42,7 +42,7 @@ void dlm_add_requestqueue(struct dlm_ls *ls, int nodeid, struct dlm_header *hd)
42 } 42 }
43 43
44 e->nodeid = nodeid; 44 e->nodeid = nodeid;
45 memcpy(e->request, hd, length); 45 memcpy(&e->request, ms, ms->m_header.h_length);
46 46
47 mutex_lock(&ls->ls_requestqueue_mutex); 47 mutex_lock(&ls->ls_requestqueue_mutex);
48 list_add_tail(&e->list, &ls->ls_requestqueue); 48 list_add_tail(&e->list, &ls->ls_requestqueue);
@@ -76,7 +76,7 @@ int dlm_process_requestqueue(struct dlm_ls *ls)
76 e = list_entry(ls->ls_requestqueue.next, struct rq_entry, list); 76 e = list_entry(ls->ls_requestqueue.next, struct rq_entry, list);
77 mutex_unlock(&ls->ls_requestqueue_mutex); 77 mutex_unlock(&ls->ls_requestqueue_mutex);
78 78
79 dlm_receive_message_saved(ls, (struct dlm_message *)e->request); 79 dlm_receive_message_saved(ls, &e->request);
80 80
81 mutex_lock(&ls->ls_requestqueue_mutex); 81 mutex_lock(&ls->ls_requestqueue_mutex);
82 list_del(&e->list); 82 list_del(&e->list);
@@ -176,7 +176,7 @@ void dlm_purge_requestqueue(struct dlm_ls *ls)
176 176
177 mutex_lock(&ls->ls_requestqueue_mutex); 177 mutex_lock(&ls->ls_requestqueue_mutex);
178 list_for_each_entry_safe(e, safe, &ls->ls_requestqueue, list) { 178 list_for_each_entry_safe(e, safe, &ls->ls_requestqueue, list) {
179 ms = (struct dlm_message *) e->request; 179 ms = &e->request;
180 180
181 if (purge_request(ls, ms, e->nodeid)) { 181 if (purge_request(ls, ms, e->nodeid)) {
182 list_del(&e->list); 182 list_del(&e->list);
diff --git a/fs/dlm/requestqueue.h b/fs/dlm/requestqueue.h
index aba34fc05ee4..10ce449b77da 100644
--- a/fs/dlm/requestqueue.h
+++ b/fs/dlm/requestqueue.h
@@ -13,7 +13,7 @@
13#ifndef __REQUESTQUEUE_DOT_H__ 13#ifndef __REQUESTQUEUE_DOT_H__
14#define __REQUESTQUEUE_DOT_H__ 14#define __REQUESTQUEUE_DOT_H__
15 15
16void dlm_add_requestqueue(struct dlm_ls *ls, int nodeid, struct dlm_header *hd); 16void dlm_add_requestqueue(struct dlm_ls *ls, int nodeid, struct dlm_message *ms);
17int dlm_process_requestqueue(struct dlm_ls *ls); 17int dlm_process_requestqueue(struct dlm_ls *ls);
18void dlm_wait_requestqueue(struct dlm_ls *ls); 18void dlm_wait_requestqueue(struct dlm_ls *ls);
19void dlm_purge_requestqueue(struct dlm_ls *ls); 19void dlm_purge_requestqueue(struct dlm_ls *ls);
diff --git a/fs/dlm/user.c b/fs/dlm/user.c
index 7cbc6826239b..ebbcf38fd33b 100644
--- a/fs/dlm/user.c
+++ b/fs/dlm/user.c
@@ -82,7 +82,7 @@ struct dlm_lock_result32 {
82 82
83static void compat_input(struct dlm_write_request *kb, 83static void compat_input(struct dlm_write_request *kb,
84 struct dlm_write_request32 *kb32, 84 struct dlm_write_request32 *kb32,
85 int max_namelen) 85 size_t count)
86{ 86{
87 kb->version[0] = kb32->version[0]; 87 kb->version[0] = kb32->version[0];
88 kb->version[1] = kb32->version[1]; 88 kb->version[1] = kb32->version[1];
@@ -94,7 +94,8 @@ static void compat_input(struct dlm_write_request *kb,
94 kb->cmd == DLM_USER_REMOVE_LOCKSPACE) { 94 kb->cmd == DLM_USER_REMOVE_LOCKSPACE) {
95 kb->i.lspace.flags = kb32->i.lspace.flags; 95 kb->i.lspace.flags = kb32->i.lspace.flags;
96 kb->i.lspace.minor = kb32->i.lspace.minor; 96 kb->i.lspace.minor = kb32->i.lspace.minor;
97 strcpy(kb->i.lspace.name, kb32->i.lspace.name); 97 memcpy(kb->i.lspace.name, kb32->i.lspace.name, count -
98 offsetof(struct dlm_write_request32, i.lspace.name));
98 } else if (kb->cmd == DLM_USER_PURGE) { 99 } else if (kb->cmd == DLM_USER_PURGE) {
99 kb->i.purge.nodeid = kb32->i.purge.nodeid; 100 kb->i.purge.nodeid = kb32->i.purge.nodeid;
100 kb->i.purge.pid = kb32->i.purge.pid; 101 kb->i.purge.pid = kb32->i.purge.pid;
@@ -112,11 +113,8 @@ static void compat_input(struct dlm_write_request *kb,
112 kb->i.lock.bastaddr = (void *)(long)kb32->i.lock.bastaddr; 113 kb->i.lock.bastaddr = (void *)(long)kb32->i.lock.bastaddr;
113 kb->i.lock.lksb = (void *)(long)kb32->i.lock.lksb; 114 kb->i.lock.lksb = (void *)(long)kb32->i.lock.lksb;
114 memcpy(kb->i.lock.lvb, kb32->i.lock.lvb, DLM_USER_LVB_LEN); 115 memcpy(kb->i.lock.lvb, kb32->i.lock.lvb, DLM_USER_LVB_LEN);
115 if (kb->i.lock.namelen <= max_namelen) 116 memcpy(kb->i.lock.name, kb32->i.lock.name, count -
116 memcpy(kb->i.lock.name, kb32->i.lock.name, 117 offsetof(struct dlm_write_request32, i.lock.name));
117 kb->i.lock.namelen);
118 else
119 kb->i.lock.namelen = max_namelen;
120 } 118 }
121} 119}
122 120
@@ -197,8 +195,8 @@ void dlm_user_add_ast(struct dlm_lkb *lkb, int type)
197 if (lkb->lkb_flags & (DLM_IFL_ORPHAN | DLM_IFL_DEAD)) 195 if (lkb->lkb_flags & (DLM_IFL_ORPHAN | DLM_IFL_DEAD))
198 goto out; 196 goto out;
199 197
200 DLM_ASSERT(lkb->lkb_astparam, dlm_print_lkb(lkb);); 198 DLM_ASSERT(lkb->lkb_ua, dlm_print_lkb(lkb););
201 ua = (struct dlm_user_args *)lkb->lkb_astparam; 199 ua = lkb->lkb_ua;
202 proc = ua->proc; 200 proc = ua->proc;
203 201
204 if (type == AST_BAST && ua->bastaddr == NULL) 202 if (type == AST_BAST && ua->bastaddr == NULL)
@@ -508,7 +506,7 @@ static ssize_t device_write(struct file *file, const char __user *buf,
508#endif 506#endif
509 return -EINVAL; 507 return -EINVAL;
510 508
511 kbuf = kmalloc(count, GFP_KERNEL); 509 kbuf = kzalloc(count + 1, GFP_KERNEL);
512 if (!kbuf) 510 if (!kbuf)
513 return -ENOMEM; 511 return -ENOMEM;
514 512
@@ -526,15 +524,14 @@ static ssize_t device_write(struct file *file, const char __user *buf,
526 if (!kbuf->is64bit) { 524 if (!kbuf->is64bit) {
527 struct dlm_write_request32 *k32buf; 525 struct dlm_write_request32 *k32buf;
528 k32buf = (struct dlm_write_request32 *)kbuf; 526 k32buf = (struct dlm_write_request32 *)kbuf;
529 kbuf = kmalloc(count + (sizeof(struct dlm_write_request) - 527 kbuf = kmalloc(count + 1 + (sizeof(struct dlm_write_request) -
530 sizeof(struct dlm_write_request32)), GFP_KERNEL); 528 sizeof(struct dlm_write_request32)), GFP_KERNEL);
531 if (!kbuf) 529 if (!kbuf)
532 return -ENOMEM; 530 return -ENOMEM;
533 531
534 if (proc) 532 if (proc)
535 set_bit(DLM_PROC_FLAGS_COMPAT, &proc->flags); 533 set_bit(DLM_PROC_FLAGS_COMPAT, &proc->flags);
536 compat_input(kbuf, k32buf, 534 compat_input(kbuf, k32buf, count + 1);
537 count - sizeof(struct dlm_write_request32));
538 kfree(k32buf); 535 kfree(k32buf);
539 } 536 }
540#endif 537#endif
@@ -774,7 +771,6 @@ static ssize_t device_read(struct file *file, char __user *buf, size_t count,
774{ 771{
775 struct dlm_user_proc *proc = file->private_data; 772 struct dlm_user_proc *proc = file->private_data;
776 struct dlm_lkb *lkb; 773 struct dlm_lkb *lkb;
777 struct dlm_user_args *ua;
778 DECLARE_WAITQUEUE(wait, current); 774 DECLARE_WAITQUEUE(wait, current);
779 int error, type=0, bmode=0, removed = 0; 775 int error, type=0, bmode=0, removed = 0;
780 776
@@ -845,8 +841,7 @@ static ssize_t device_read(struct file *file, char __user *buf, size_t count,
845 } 841 }
846 spin_unlock(&proc->asts_spin); 842 spin_unlock(&proc->asts_spin);
847 843
848 ua = (struct dlm_user_args *)lkb->lkb_astparam; 844 error = copy_result_to_user(lkb->lkb_ua,
849 error = copy_result_to_user(ua,
850 test_bit(DLM_PROC_FLAGS_COMPAT, &proc->flags), 845 test_bit(DLM_PROC_FLAGS_COMPAT, &proc->flags),
851 type, bmode, buf, count); 846 type, bmode, buf, count);
852 847
@@ -907,7 +902,7 @@ static struct miscdevice ctl_device = {
907 .minor = MISC_DYNAMIC_MINOR, 902 .minor = MISC_DYNAMIC_MINOR,
908}; 903};
909 904
910int dlm_user_init(void) 905int __init dlm_user_init(void)
911{ 906{
912 int error; 907 int error;
913 908
diff --git a/fs/dlm/util.c b/fs/dlm/util.c
index 4d9c1f4e1bd1..e36520af7cc0 100644
--- a/fs/dlm/util.c
+++ b/fs/dlm/util.c
@@ -131,52 +131,8 @@ void dlm_message_in(struct dlm_message *ms)
131 ms->m_result = from_dlm_errno(le32_to_cpu(ms->m_result)); 131 ms->m_result = from_dlm_errno(le32_to_cpu(ms->m_result));
132} 132}
133 133
134static void rcom_lock_out(struct rcom_lock *rl)
135{
136 rl->rl_ownpid = cpu_to_le32(rl->rl_ownpid);
137 rl->rl_lkid = cpu_to_le32(rl->rl_lkid);
138 rl->rl_remid = cpu_to_le32(rl->rl_remid);
139 rl->rl_parent_lkid = cpu_to_le32(rl->rl_parent_lkid);
140 rl->rl_parent_remid = cpu_to_le32(rl->rl_parent_remid);
141 rl->rl_exflags = cpu_to_le32(rl->rl_exflags);
142 rl->rl_flags = cpu_to_le32(rl->rl_flags);
143 rl->rl_lvbseq = cpu_to_le32(rl->rl_lvbseq);
144 rl->rl_result = cpu_to_le32(rl->rl_result);
145 rl->rl_wait_type = cpu_to_le16(rl->rl_wait_type);
146 rl->rl_namelen = cpu_to_le16(rl->rl_namelen);
147}
148
149static void rcom_lock_in(struct rcom_lock *rl)
150{
151 rl->rl_ownpid = le32_to_cpu(rl->rl_ownpid);
152 rl->rl_lkid = le32_to_cpu(rl->rl_lkid);
153 rl->rl_remid = le32_to_cpu(rl->rl_remid);
154 rl->rl_parent_lkid = le32_to_cpu(rl->rl_parent_lkid);
155 rl->rl_parent_remid = le32_to_cpu(rl->rl_parent_remid);
156 rl->rl_exflags = le32_to_cpu(rl->rl_exflags);
157 rl->rl_flags = le32_to_cpu(rl->rl_flags);
158 rl->rl_lvbseq = le32_to_cpu(rl->rl_lvbseq);
159 rl->rl_result = le32_to_cpu(rl->rl_result);
160 rl->rl_wait_type = le16_to_cpu(rl->rl_wait_type);
161 rl->rl_namelen = le16_to_cpu(rl->rl_namelen);
162}
163
164static void rcom_config_out(struct rcom_config *rf)
165{
166 rf->rf_lvblen = cpu_to_le32(rf->rf_lvblen);
167 rf->rf_lsflags = cpu_to_le32(rf->rf_lsflags);
168}
169
170static void rcom_config_in(struct rcom_config *rf)
171{
172 rf->rf_lvblen = le32_to_cpu(rf->rf_lvblen);
173 rf->rf_lsflags = le32_to_cpu(rf->rf_lsflags);
174}
175
176void dlm_rcom_out(struct dlm_rcom *rc) 134void dlm_rcom_out(struct dlm_rcom *rc)
177{ 135{
178 int type = rc->rc_type;
179
180 header_out(&rc->rc_header); 136 header_out(&rc->rc_header);
181 137
182 rc->rc_type = cpu_to_le32(rc->rc_type); 138 rc->rc_type = cpu_to_le32(rc->rc_type);
@@ -184,18 +140,10 @@ void dlm_rcom_out(struct dlm_rcom *rc)
184 rc->rc_id = cpu_to_le64(rc->rc_id); 140 rc->rc_id = cpu_to_le64(rc->rc_id);
185 rc->rc_seq = cpu_to_le64(rc->rc_seq); 141 rc->rc_seq = cpu_to_le64(rc->rc_seq);
186 rc->rc_seq_reply = cpu_to_le64(rc->rc_seq_reply); 142 rc->rc_seq_reply = cpu_to_le64(rc->rc_seq_reply);
187
188 if ((type == DLM_RCOM_LOCK) || (type == DLM_RCOM_LOCK_REPLY))
189 rcom_lock_out((struct rcom_lock *) rc->rc_buf);
190
191 else if (type == DLM_RCOM_STATUS_REPLY)
192 rcom_config_out((struct rcom_config *) rc->rc_buf);
193} 143}
194 144
195void dlm_rcom_in(struct dlm_rcom *rc) 145void dlm_rcom_in(struct dlm_rcom *rc)
196{ 146{
197 int type;
198
199 header_in(&rc->rc_header); 147 header_in(&rc->rc_header);
200 148
201 rc->rc_type = le32_to_cpu(rc->rc_type); 149 rc->rc_type = le32_to_cpu(rc->rc_type);
@@ -203,13 +151,4 @@ void dlm_rcom_in(struct dlm_rcom *rc)
203 rc->rc_id = le64_to_cpu(rc->rc_id); 151 rc->rc_id = le64_to_cpu(rc->rc_id);
204 rc->rc_seq = le64_to_cpu(rc->rc_seq); 152 rc->rc_seq = le64_to_cpu(rc->rc_seq);
205 rc->rc_seq_reply = le64_to_cpu(rc->rc_seq_reply); 153 rc->rc_seq_reply = le64_to_cpu(rc->rc_seq_reply);
206
207 type = rc->rc_type;
208
209 if ((type == DLM_RCOM_LOCK) || (type == DLM_RCOM_LOCK_REPLY))
210 rcom_lock_in((struct rcom_lock *) rc->rc_buf);
211
212 else if (type == DLM_RCOM_STATUS_REPLY)
213 rcom_config_in((struct rcom_config *) rc->rc_buf);
214} 154}
215
diff --git a/fs/exec.c b/fs/exec.c
index be923e4bc389..9ff6069094d8 100644
--- a/fs/exec.c
+++ b/fs/exec.c
@@ -119,7 +119,7 @@ asmlinkage long sys_uselib(const char __user * library)
119 if (error) 119 if (error)
120 goto exit; 120 goto exit;
121 121
122 file = nameidata_to_filp(&nd, O_RDONLY); 122 file = nameidata_to_filp(&nd, O_RDONLY|O_LARGEFILE);
123 error = PTR_ERR(file); 123 error = PTR_ERR(file);
124 if (IS_ERR(file)) 124 if (IS_ERR(file))
125 goto out; 125 goto out;
@@ -658,7 +658,8 @@ struct file *open_exec(const char *name)
658 int err = vfs_permission(&nd, MAY_EXEC); 658 int err = vfs_permission(&nd, MAY_EXEC);
659 file = ERR_PTR(err); 659 file = ERR_PTR(err);
660 if (!err) { 660 if (!err) {
661 file = nameidata_to_filp(&nd, O_RDONLY); 661 file = nameidata_to_filp(&nd,
662 O_RDONLY|O_LARGEFILE);
662 if (!IS_ERR(file)) { 663 if (!IS_ERR(file)) {
663 err = deny_write_access(file); 664 err = deny_write_access(file);
664 if (err) { 665 if (err) {
@@ -782,26 +783,8 @@ static int de_thread(struct task_struct *tsk)
782 zap_other_threads(tsk); 783 zap_other_threads(tsk);
783 read_unlock(&tasklist_lock); 784 read_unlock(&tasklist_lock);
784 785
785 /* 786 /* Account for the thread group leader hanging around: */
786 * Account for the thread group leader hanging around: 787 count = thread_group_leader(tsk) ? 1 : 2;
787 */
788 count = 1;
789 if (!thread_group_leader(tsk)) {
790 count = 2;
791 /*
792 * The SIGALRM timer survives the exec, but needs to point
793 * at us as the new group leader now. We have a race with
794 * a timer firing now getting the old leader, so we need to
795 * synchronize with any firing (by calling del_timer_sync)
796 * before we can safely let the old group leader die.
797 */
798 sig->tsk = tsk;
799 spin_unlock_irq(lock);
800 if (hrtimer_cancel(&sig->real_timer))
801 hrtimer_restart(&sig->real_timer);
802 spin_lock_irq(lock);
803 }
804
805 sig->notify_count = count; 788 sig->notify_count = count;
806 while (atomic_read(&sig->count) > count) { 789 while (atomic_read(&sig->count) > count) {
807 __set_current_state(TASK_UNINTERRUPTIBLE); 790 __set_current_state(TASK_UNINTERRUPTIBLE);
@@ -1184,7 +1167,7 @@ int search_binary_handler(struct linux_binprm *bprm,struct pt_regs *regs)
1184{ 1167{
1185 int try,retval; 1168 int try,retval;
1186 struct linux_binfmt *fmt; 1169 struct linux_binfmt *fmt;
1187#ifdef __alpha__ 1170#if defined(__alpha__) && defined(CONFIG_ARCH_SUPPORTS_AOUT)
1188 /* handle /sbin/loader.. */ 1171 /* handle /sbin/loader.. */
1189 { 1172 {
1190 struct exec * eh = (struct exec *) bprm->buf; 1173 struct exec * eh = (struct exec *) bprm->buf;
diff --git a/fs/ext2/ext2.h b/fs/ext2/ext2.h
index f1e5705e75f1..47d88da2d33b 100644
--- a/fs/ext2/ext2.h
+++ b/fs/ext2/ext2.h
@@ -126,7 +126,6 @@ extern unsigned long ext2_count_free (struct buffer_head *, unsigned);
126/* inode.c */ 126/* inode.c */
127extern struct inode *ext2_iget (struct super_block *, unsigned long); 127extern struct inode *ext2_iget (struct super_block *, unsigned long);
128extern int ext2_write_inode (struct inode *, int); 128extern int ext2_write_inode (struct inode *, int);
129extern void ext2_put_inode (struct inode *);
130extern void ext2_delete_inode (struct inode *); 129extern void ext2_delete_inode (struct inode *);
131extern int ext2_sync_inode (struct inode *); 130extern int ext2_sync_inode (struct inode *);
132extern int ext2_get_block(struct inode *, sector_t, struct buffer_head *, int); 131extern int ext2_get_block(struct inode *, sector_t, struct buffer_head *, int);
diff --git a/fs/ext2/super.c b/fs/ext2/super.c
index 22f1010bf79f..088b011bb97e 100644
--- a/fs/ext2/super.c
+++ b/fs/ext2/super.c
@@ -285,6 +285,9 @@ static int ext2_show_options(struct seq_file *seq, struct vfsmount *vfs)
285 seq_puts(seq, ",xip"); 285 seq_puts(seq, ",xip");
286#endif 286#endif
287 287
288 if (!test_opt(sb, RESERVATION))
289 seq_puts(seq, ",noreservation");
290
288 return 0; 291 return 0;
289} 292}
290 293
diff --git a/fs/ext3/balloc.c b/fs/ext3/balloc.c
index a75713031105..da0cb2c0e437 100644
--- a/fs/ext3/balloc.c
+++ b/fs/ext3/balloc.c
@@ -630,9 +630,7 @@ do_more:
630 jbd_unlock_bh_state(bitmap_bh); 630 jbd_unlock_bh_state(bitmap_bh);
631 631
632 spin_lock(sb_bgl_lock(sbi, block_group)); 632 spin_lock(sb_bgl_lock(sbi, block_group));
633 desc->bg_free_blocks_count = 633 le16_add_cpu(&desc->bg_free_blocks_count, group_freed);
634 cpu_to_le16(le16_to_cpu(desc->bg_free_blocks_count) +
635 group_freed);
636 spin_unlock(sb_bgl_lock(sbi, block_group)); 634 spin_unlock(sb_bgl_lock(sbi, block_group));
637 percpu_counter_add(&sbi->s_freeblocks_counter, count); 635 percpu_counter_add(&sbi->s_freeblocks_counter, count);
638 636
@@ -1696,8 +1694,7 @@ allocated:
1696 ret_block, goal_hits, goal_attempts); 1694 ret_block, goal_hits, goal_attempts);
1697 1695
1698 spin_lock(sb_bgl_lock(sbi, group_no)); 1696 spin_lock(sb_bgl_lock(sbi, group_no));
1699 gdp->bg_free_blocks_count = 1697 le16_add_cpu(&gdp->bg_free_blocks_count, -num);
1700 cpu_to_le16(le16_to_cpu(gdp->bg_free_blocks_count)-num);
1701 spin_unlock(sb_bgl_lock(sbi, group_no)); 1698 spin_unlock(sb_bgl_lock(sbi, group_no));
1702 percpu_counter_sub(&sbi->s_freeblocks_counter, num); 1699 percpu_counter_sub(&sbi->s_freeblocks_counter, num);
1703 1700
diff --git a/fs/ext3/ialloc.c b/fs/ext3/ialloc.c
index 58ae2f943f12..4f4020c54683 100644
--- a/fs/ext3/ialloc.c
+++ b/fs/ext3/ialloc.c
@@ -164,11 +164,9 @@ void ext3_free_inode (handle_t *handle, struct inode * inode)
164 164
165 if (gdp) { 165 if (gdp) {
166 spin_lock(sb_bgl_lock(sbi, block_group)); 166 spin_lock(sb_bgl_lock(sbi, block_group));
167 gdp->bg_free_inodes_count = cpu_to_le16( 167 le16_add_cpu(&gdp->bg_free_inodes_count, 1);
168 le16_to_cpu(gdp->bg_free_inodes_count) + 1);
169 if (is_directory) 168 if (is_directory)
170 gdp->bg_used_dirs_count = cpu_to_le16( 169 le16_add_cpu(&gdp->bg_used_dirs_count, -1);
171 le16_to_cpu(gdp->bg_used_dirs_count) - 1);
172 spin_unlock(sb_bgl_lock(sbi, block_group)); 170 spin_unlock(sb_bgl_lock(sbi, block_group));
173 percpu_counter_inc(&sbi->s_freeinodes_counter); 171 percpu_counter_inc(&sbi->s_freeinodes_counter);
174 if (is_directory) 172 if (is_directory)
@@ -527,11 +525,9 @@ got:
527 err = ext3_journal_get_write_access(handle, bh2); 525 err = ext3_journal_get_write_access(handle, bh2);
528 if (err) goto fail; 526 if (err) goto fail;
529 spin_lock(sb_bgl_lock(sbi, group)); 527 spin_lock(sb_bgl_lock(sbi, group));
530 gdp->bg_free_inodes_count = 528 le16_add_cpu(&gdp->bg_free_inodes_count, -1);
531 cpu_to_le16(le16_to_cpu(gdp->bg_free_inodes_count) - 1);
532 if (S_ISDIR(mode)) { 529 if (S_ISDIR(mode)) {
533 gdp->bg_used_dirs_count = 530 le16_add_cpu(&gdp->bg_used_dirs_count, 1);
534 cpu_to_le16(le16_to_cpu(gdp->bg_used_dirs_count) + 1);
535 } 531 }
536 spin_unlock(sb_bgl_lock(sbi, group)); 532 spin_unlock(sb_bgl_lock(sbi, group));
537 BUFFER_TRACE(bh2, "call ext3_journal_dirty_metadata"); 533 BUFFER_TRACE(bh2, "call ext3_journal_dirty_metadata");
diff --git a/fs/ext3/resize.c b/fs/ext3/resize.c
index ebc05af7343a..9397d779c43d 100644
--- a/fs/ext3/resize.c
+++ b/fs/ext3/resize.c
@@ -518,8 +518,7 @@ static int add_new_gdb(handle_t *handle, struct inode *inode,
518 EXT3_SB(sb)->s_gdb_count++; 518 EXT3_SB(sb)->s_gdb_count++;
519 kfree(o_group_desc); 519 kfree(o_group_desc);
520 520
521 es->s_reserved_gdt_blocks = 521 le16_add_cpu(&es->s_reserved_gdt_blocks, -1);
522 cpu_to_le16(le16_to_cpu(es->s_reserved_gdt_blocks) - 1);
523 ext3_journal_dirty_metadata(handle, EXT3_SB(sb)->s_sbh); 522 ext3_journal_dirty_metadata(handle, EXT3_SB(sb)->s_sbh);
524 523
525 return 0; 524 return 0;
@@ -890,10 +889,8 @@ int ext3_group_add(struct super_block *sb, struct ext3_new_group_data *input)
890 * blocks/inodes before the group is live won't actually let us 889 * blocks/inodes before the group is live won't actually let us
891 * allocate the new space yet. 890 * allocate the new space yet.
892 */ 891 */
893 es->s_blocks_count = cpu_to_le32(le32_to_cpu(es->s_blocks_count) + 892 le32_add_cpu(&es->s_blocks_count, input->blocks_count);
894 input->blocks_count); 893 le32_add_cpu(&es->s_inodes_count, EXT3_INODES_PER_GROUP(sb));
895 es->s_inodes_count = cpu_to_le32(le32_to_cpu(es->s_inodes_count) +
896 EXT3_INODES_PER_GROUP(sb));
897 894
898 /* 895 /*
899 * We need to protect s_groups_count against other CPUs seeing 896 * We need to protect s_groups_count against other CPUs seeing
@@ -926,8 +923,7 @@ int ext3_group_add(struct super_block *sb, struct ext3_new_group_data *input)
926 923
927 /* Update the reserved block counts only once the new group is 924 /* Update the reserved block counts only once the new group is
928 * active. */ 925 * active. */
929 es->s_r_blocks_count = cpu_to_le32(le32_to_cpu(es->s_r_blocks_count) + 926 le32_add_cpu(&es->s_r_blocks_count, input->reserved_blocks);
930 input->reserved_blocks);
931 927
932 /* Update the free space counts */ 928 /* Update the free space counts */
933 percpu_counter_add(&sbi->s_freeblocks_counter, 929 percpu_counter_add(&sbi->s_freeblocks_counter,
diff --git a/fs/ext3/super.c b/fs/ext3/super.c
index cf2a2c3660ec..8e02cbfb1123 100644
--- a/fs/ext3/super.c
+++ b/fs/ext3/super.c
@@ -1222,7 +1222,7 @@ static int ext3_setup_super(struct super_block *sb, struct ext3_super_block *es,
1222#endif 1222#endif
1223 if (!(__s16) le16_to_cpu(es->s_max_mnt_count)) 1223 if (!(__s16) le16_to_cpu(es->s_max_mnt_count))
1224 es->s_max_mnt_count = cpu_to_le16(EXT3_DFL_MAX_MNT_COUNT); 1224 es->s_max_mnt_count = cpu_to_le16(EXT3_DFL_MAX_MNT_COUNT);
1225 es->s_mnt_count=cpu_to_le16(le16_to_cpu(es->s_mnt_count) + 1); 1225 le16_add_cpu(&es->s_mnt_count, 1);
1226 es->s_mtime = cpu_to_le32(get_seconds()); 1226 es->s_mtime = cpu_to_le32(get_seconds());
1227 ext3_update_dynamic_rev(sb); 1227 ext3_update_dynamic_rev(sb);
1228 EXT3_SET_INCOMPAT_FEATURE(sb, EXT3_FEATURE_INCOMPAT_RECOVER); 1228 EXT3_SET_INCOMPAT_FEATURE(sb, EXT3_FEATURE_INCOMPAT_RECOVER);
diff --git a/fs/ext3/xattr.c b/fs/ext3/xattr.c
index 408373819e34..fb89c299bece 100644
--- a/fs/ext3/xattr.c
+++ b/fs/ext3/xattr.c
@@ -492,8 +492,7 @@ ext3_xattr_release_block(handle_t *handle, struct inode *inode,
492 get_bh(bh); 492 get_bh(bh);
493 ext3_forget(handle, 1, inode, bh, bh->b_blocknr); 493 ext3_forget(handle, 1, inode, bh, bh->b_blocknr);
494 } else { 494 } else {
495 BHDR(bh)->h_refcount = cpu_to_le32( 495 le32_add_cpu(&BHDR(bh)->h_refcount, -1);
496 le32_to_cpu(BHDR(bh)->h_refcount) - 1);
497 error = ext3_journal_dirty_metadata(handle, bh); 496 error = ext3_journal_dirty_metadata(handle, bh);
498 if (IS_SYNC(inode)) 497 if (IS_SYNC(inode))
499 handle->h_sync = 1; 498 handle->h_sync = 1;
@@ -780,8 +779,7 @@ inserted:
780 if (error) 779 if (error)
781 goto cleanup_dquot; 780 goto cleanup_dquot;
782 lock_buffer(new_bh); 781 lock_buffer(new_bh);
783 BHDR(new_bh)->h_refcount = cpu_to_le32(1 + 782 le32_add_cpu(&BHDR(new_bh)->h_refcount, 1);
784 le32_to_cpu(BHDR(new_bh)->h_refcount));
785 ea_bdebug(new_bh, "reusing; refcount now=%d", 783 ea_bdebug(new_bh, "reusing; refcount now=%d",
786 le32_to_cpu(BHDR(new_bh)->h_refcount)); 784 le32_to_cpu(BHDR(new_bh)->h_refcount));
787 unlock_buffer(new_bh); 785 unlock_buffer(new_bh);
diff --git a/fs/fat/inode.c b/fs/fat/inode.c
index 085269e07fb3..53f3cf62b7c1 100644
--- a/fs/fat/inode.c
+++ b/fs/fat/inode.c
@@ -837,6 +837,8 @@ static int fat_show_options(struct seq_file *m, struct vfsmount *mnt)
837 if (!opts->numtail) 837 if (!opts->numtail)
838 seq_puts(m, ",nonumtail"); 838 seq_puts(m, ",nonumtail");
839 } 839 }
840 if (sbi->options.flush)
841 seq_puts(m, ",flush");
840 842
841 return 0; 843 return 0;
842} 844}
diff --git a/fs/fcntl.c b/fs/fcntl.c
index 8685263ccc4a..e632da761fc1 100644
--- a/fs/fcntl.c
+++ b/fs/fcntl.c
@@ -24,7 +24,7 @@
24#include <asm/siginfo.h> 24#include <asm/siginfo.h>
25#include <asm/uaccess.h> 25#include <asm/uaccess.h>
26 26
27void fastcall set_close_on_exec(unsigned int fd, int flag) 27void set_close_on_exec(unsigned int fd, int flag)
28{ 28{
29 struct files_struct *files = current->files; 29 struct files_struct *files = current->files;
30 struct fdtable *fdt; 30 struct fdtable *fdt;
@@ -309,7 +309,7 @@ pid_t f_getown(struct file *filp)
309{ 309{
310 pid_t pid; 310 pid_t pid;
311 read_lock(&filp->f_owner.lock); 311 read_lock(&filp->f_owner.lock);
312 pid = pid_nr_ns(filp->f_owner.pid, current->nsproxy->pid_ns); 312 pid = pid_vnr(filp->f_owner.pid);
313 if (filp->f_owner.pid_type == PIDTYPE_PGID) 313 if (filp->f_owner.pid_type == PIDTYPE_PGID)
314 pid = -pid; 314 pid = -pid;
315 read_unlock(&filp->f_owner.lock); 315 read_unlock(&filp->f_owner.lock);
diff --git a/fs/file_table.c b/fs/file_table.c
index 664e3f2309b8..6d27befe2d48 100644
--- a/fs/file_table.c
+++ b/fs/file_table.c
@@ -197,7 +197,7 @@ int init_file(struct file *file, struct vfsmount *mnt, struct dentry *dentry,
197} 197}
198EXPORT_SYMBOL(init_file); 198EXPORT_SYMBOL(init_file);
199 199
200void fastcall fput(struct file *file) 200void fput(struct file *file)
201{ 201{
202 if (atomic_dec_and_test(&file->f_count)) 202 if (atomic_dec_and_test(&file->f_count))
203 __fput(file); 203 __fput(file);
@@ -208,7 +208,7 @@ EXPORT_SYMBOL(fput);
208/* __fput is called from task context when aio completion releases the last 208/* __fput is called from task context when aio completion releases the last
209 * last use of a struct file *. Do not use otherwise. 209 * last use of a struct file *. Do not use otherwise.
210 */ 210 */
211void fastcall __fput(struct file *file) 211void __fput(struct file *file)
212{ 212{
213 struct dentry *dentry = file->f_path.dentry; 213 struct dentry *dentry = file->f_path.dentry;
214 struct vfsmount *mnt = file->f_path.mnt; 214 struct vfsmount *mnt = file->f_path.mnt;
@@ -241,7 +241,7 @@ void fastcall __fput(struct file *file)
241 mntput(mnt); 241 mntput(mnt);
242} 242}
243 243
244struct file fastcall *fget(unsigned int fd) 244struct file *fget(unsigned int fd)
245{ 245{
246 struct file *file; 246 struct file *file;
247 struct files_struct *files = current->files; 247 struct files_struct *files = current->files;
@@ -269,7 +269,7 @@ EXPORT_SYMBOL(fget);
269 * and a flag is returned to be passed to the corresponding fput_light(). 269 * and a flag is returned to be passed to the corresponding fput_light().
270 * There must not be a cloning between an fget_light/fput_light pair. 270 * There must not be a cloning between an fget_light/fput_light pair.
271 */ 271 */
272struct file fastcall *fget_light(unsigned int fd, int *fput_needed) 272struct file *fget_light(unsigned int fd, int *fput_needed)
273{ 273{
274 struct file *file; 274 struct file *file;
275 struct files_struct *files = current->files; 275 struct files_struct *files = current->files;
diff --git a/fs/fs-writeback.c b/fs/fs-writeback.c
index db80ce9eb1d0..c0076077d338 100644
--- a/fs/fs-writeback.c
+++ b/fs/fs-writeback.c
@@ -655,7 +655,7 @@ int write_inode_now(struct inode *inode, int sync)
655 int ret; 655 int ret;
656 struct writeback_control wbc = { 656 struct writeback_control wbc = {
657 .nr_to_write = LONG_MAX, 657 .nr_to_write = LONG_MAX,
658 .sync_mode = WB_SYNC_ALL, 658 .sync_mode = sync ? WB_SYNC_ALL : WB_SYNC_NONE,
659 .range_start = 0, 659 .range_start = 0,
660 .range_end = LLONG_MAX, 660 .range_end = LLONG_MAX,
661 }; 661 };
diff --git a/fs/fuse/inode.c b/fs/fuse/inode.c
index 574707409bbf..033f7bdd47e8 100644
--- a/fs/fuse/inode.c
+++ b/fs/fuse/inode.c
@@ -29,6 +29,8 @@ DEFINE_MUTEX(fuse_mutex);
29 29
30#define FUSE_SUPER_MAGIC 0x65735546 30#define FUSE_SUPER_MAGIC 0x65735546
31 31
32#define FUSE_DEFAULT_BLKSIZE 512
33
32struct fuse_mount_data { 34struct fuse_mount_data {
33 int fd; 35 int fd;
34 unsigned rootmode; 36 unsigned rootmode;
@@ -355,7 +357,7 @@ static int parse_fuse_opt(char *opt, struct fuse_mount_data *d, int is_bdev)
355 char *p; 357 char *p;
356 memset(d, 0, sizeof(struct fuse_mount_data)); 358 memset(d, 0, sizeof(struct fuse_mount_data));
357 d->max_read = ~0; 359 d->max_read = ~0;
358 d->blksize = 512; 360 d->blksize = FUSE_DEFAULT_BLKSIZE;
359 361
360 while ((p = strsep(&opt, ",")) != NULL) { 362 while ((p = strsep(&opt, ",")) != NULL) {
361 int token; 363 int token;
@@ -440,6 +442,9 @@ static int fuse_show_options(struct seq_file *m, struct vfsmount *mnt)
440 seq_puts(m, ",allow_other"); 442 seq_puts(m, ",allow_other");
441 if (fc->max_read != ~0) 443 if (fc->max_read != ~0)
442 seq_printf(m, ",max_read=%u", fc->max_read); 444 seq_printf(m, ",max_read=%u", fc->max_read);
445 if (mnt->mnt_sb->s_bdev &&
446 mnt->mnt_sb->s_blocksize != FUSE_DEFAULT_BLKSIZE)
447 seq_printf(m, ",blksize=%lu", mnt->mnt_sb->s_blocksize);
443 return 0; 448 return 0;
444} 449}
445 450
diff --git a/fs/hfsplus/unicode.c b/fs/hfsplus/unicode.c
index 9e10f9444b64..628ccf6fa402 100644
--- a/fs/hfsplus/unicode.c
+++ b/fs/hfsplus/unicode.c
@@ -325,7 +325,7 @@ int hfsplus_hash_dentry(struct dentry *dentry, struct qstr *str)
325 struct super_block *sb = dentry->d_sb; 325 struct super_block *sb = dentry->d_sb;
326 const char *astr; 326 const char *astr;
327 const u16 *dstr; 327 const u16 *dstr;
328 int casefold, decompose, size, dsize, len; 328 int casefold, decompose, size, len;
329 unsigned long hash; 329 unsigned long hash;
330 wchar_t c; 330 wchar_t c;
331 u16 c2; 331 u16 c2;
@@ -336,6 +336,7 @@ int hfsplus_hash_dentry(struct dentry *dentry, struct qstr *str)
336 astr = str->name; 336 astr = str->name;
337 len = str->len; 337 len = str->len;
338 while (len > 0) { 338 while (len > 0) {
339 int uninitialized_var(dsize);
339 size = asc2unichar(sb, astr, len, &c); 340 size = asc2unichar(sb, astr, len, &c);
340 astr += size; 341 astr += size;
341 len -= size; 342 len -= size;
diff --git a/fs/hostfs/hostfs_kern.c b/fs/hostfs/hostfs_kern.c
index 2b9b35733aac..d0549cb4fb23 100644
--- a/fs/hostfs/hostfs_kern.c
+++ b/fs/hostfs/hostfs_kern.c
@@ -11,6 +11,7 @@
11#include <linux/mm.h> 11#include <linux/mm.h>
12#include <linux/pagemap.h> 12#include <linux/pagemap.h>
13#include <linux/statfs.h> 13#include <linux/statfs.h>
14#include <linux/seq_file.h>
14#include "hostfs.h" 15#include "hostfs.h"
15#include "init.h" 16#include "init.h"
16#include "kern.h" 17#include "kern.h"
@@ -322,12 +323,25 @@ static void hostfs_destroy_inode(struct inode *inode)
322 kfree(HOSTFS_I(inode)); 323 kfree(HOSTFS_I(inode));
323} 324}
324 325
326static int hostfs_show_options(struct seq_file *seq, struct vfsmount *vfs)
327{
328 struct inode *root = vfs->mnt_sb->s_root->d_inode;
329 const char *root_path = HOSTFS_I(root)->host_filename;
330 size_t offset = strlen(root_ino) + 1;
331
332 if (strlen(root_path) > offset)
333 seq_printf(seq, ",%s", root_path + offset);
334
335 return 0;
336}
337
325static const struct super_operations hostfs_sbops = { 338static const struct super_operations hostfs_sbops = {
326 .alloc_inode = hostfs_alloc_inode, 339 .alloc_inode = hostfs_alloc_inode,
327 .drop_inode = generic_delete_inode, 340 .drop_inode = generic_delete_inode,
328 .delete_inode = hostfs_delete_inode, 341 .delete_inode = hostfs_delete_inode,
329 .destroy_inode = hostfs_destroy_inode, 342 .destroy_inode = hostfs_destroy_inode,
330 .statfs = hostfs_statfs, 343 .statfs = hostfs_statfs,
344 .show_options = hostfs_show_options,
331}; 345};
332 346
333int hostfs_readdir(struct file *file, void *ent, filldir_t filldir) 347int hostfs_readdir(struct file *file, void *ent, filldir_t filldir)
diff --git a/fs/hpfs/super.c b/fs/hpfs/super.c
index 00971d999964..f63a699ec659 100644
--- a/fs/hpfs/super.c
+++ b/fs/hpfs/super.c
@@ -386,6 +386,7 @@ static int hpfs_remount_fs(struct super_block *s, int *flags, char *data)
386 int lowercase, conv, eas, chk, errs, chkdsk, timeshift; 386 int lowercase, conv, eas, chk, errs, chkdsk, timeshift;
387 int o; 387 int o;
388 struct hpfs_sb_info *sbi = hpfs_sb(s); 388 struct hpfs_sb_info *sbi = hpfs_sb(s);
389 char *new_opts = kstrdup(data, GFP_KERNEL);
389 390
390 *flags |= MS_NOATIME; 391 *flags |= MS_NOATIME;
391 392
@@ -398,15 +399,15 @@ static int hpfs_remount_fs(struct super_block *s, int *flags, char *data)
398 if (!(o = parse_opts(data, &uid, &gid, &umask, &lowercase, &conv, 399 if (!(o = parse_opts(data, &uid, &gid, &umask, &lowercase, &conv,
399 &eas, &chk, &errs, &chkdsk, &timeshift))) { 400 &eas, &chk, &errs, &chkdsk, &timeshift))) {
400 printk("HPFS: bad mount options.\n"); 401 printk("HPFS: bad mount options.\n");
401 return 1; 402 goto out_err;
402 } 403 }
403 if (o == 2) { 404 if (o == 2) {
404 hpfs_help(); 405 hpfs_help();
405 return 1; 406 goto out_err;
406 } 407 }
407 if (timeshift != sbi->sb_timeshift) { 408 if (timeshift != sbi->sb_timeshift) {
408 printk("HPFS: timeshift can't be changed using remount.\n"); 409 printk("HPFS: timeshift can't be changed using remount.\n");
409 return 1; 410 goto out_err;
410 } 411 }
411 412
412 unmark_dirty(s); 413 unmark_dirty(s);
@@ -419,7 +420,14 @@ static int hpfs_remount_fs(struct super_block *s, int *flags, char *data)
419 420
420 if (!(*flags & MS_RDONLY)) mark_dirty(s); 421 if (!(*flags & MS_RDONLY)) mark_dirty(s);
421 422
423 kfree(s->s_options);
424 s->s_options = new_opts;
425
422 return 0; 426 return 0;
427
428out_err:
429 kfree(new_opts);
430 return -EINVAL;
423} 431}
424 432
425/* Super operations */ 433/* Super operations */
@@ -432,6 +440,7 @@ static const struct super_operations hpfs_sops =
432 .put_super = hpfs_put_super, 440 .put_super = hpfs_put_super,
433 .statfs = hpfs_statfs, 441 .statfs = hpfs_statfs,
434 .remount_fs = hpfs_remount_fs, 442 .remount_fs = hpfs_remount_fs,
443 .show_options = generic_show_options,
435}; 444};
436 445
437static int hpfs_fill_super(struct super_block *s, void *options, int silent) 446static int hpfs_fill_super(struct super_block *s, void *options, int silent)
@@ -454,6 +463,8 @@ static int hpfs_fill_super(struct super_block *s, void *options, int silent)
454 463
455 int o; 464 int o;
456 465
466 save_mount_options(s, options);
467
457 sbi = kzalloc(sizeof(*sbi), GFP_KERNEL); 468 sbi = kzalloc(sizeof(*sbi), GFP_KERNEL);
458 if (!sbi) 469 if (!sbi)
459 return -ENOMEM; 470 return -ENOMEM;
diff --git a/fs/hugetlbfs/inode.c b/fs/hugetlbfs/inode.c
index 3b3cc28cdefc..eee9487ae47f 100644
--- a/fs/hugetlbfs/inode.c
+++ b/fs/hugetlbfs/inode.c
@@ -734,6 +734,7 @@ static const struct super_operations hugetlbfs_ops = {
734 .delete_inode = hugetlbfs_delete_inode, 734 .delete_inode = hugetlbfs_delete_inode,
735 .drop_inode = hugetlbfs_drop_inode, 735 .drop_inode = hugetlbfs_drop_inode,
736 .put_super = hugetlbfs_put_super, 736 .put_super = hugetlbfs_put_super,
737 .show_options = generic_show_options,
737}; 738};
738 739
739static int 740static int
@@ -817,6 +818,8 @@ hugetlbfs_fill_super(struct super_block *sb, void *data, int silent)
817 struct hugetlbfs_config config; 818 struct hugetlbfs_config config;
818 struct hugetlbfs_sb_info *sbinfo; 819 struct hugetlbfs_sb_info *sbinfo;
819 820
821 save_mount_options(sb, data);
822
820 config.nr_blocks = -1; /* No limit on size by default */ 823 config.nr_blocks = -1; /* No limit on size by default */
821 config.nr_inodes = -1; /* No limit on number of inodes by default */ 824 config.nr_inodes = -1; /* No limit on number of inodes by default */
822 config.uid = current->fsuid; 825 config.uid = current->fsuid;
diff --git a/fs/inotify_user.c b/fs/inotify_user.c
index a336c9709f3c..3ab09a65c456 100644
--- a/fs/inotify_user.c
+++ b/fs/inotify_user.c
@@ -283,7 +283,7 @@ static void inotify_dev_queue_event(struct inotify_watch *w, u32 wd, u32 mask,
283 /* we can safely put the watch as we don't reference it while 283 /* we can safely put the watch as we don't reference it while
284 * generating the event 284 * generating the event
285 */ 285 */
286 if (mask & IN_IGNORED || mask & IN_ONESHOT) 286 if (mask & IN_IGNORED || w->mask & IN_ONESHOT)
287 put_inotify_watch(w); /* final put */ 287 put_inotify_watch(w); /* final put */
288 288
289 /* coalescing: drop this event if it is a dupe of the previous */ 289 /* coalescing: drop this event if it is a dupe of the previous */
diff --git a/fs/isofs/inode.c b/fs/isofs/inode.c
index 875d37fb6c70..044a254d526b 100644
--- a/fs/isofs/inode.c
+++ b/fs/isofs/inode.c
@@ -110,6 +110,7 @@ static const struct super_operations isofs_sops = {
110 .put_super = isofs_put_super, 110 .put_super = isofs_put_super,
111 .statfs = isofs_statfs, 111 .statfs = isofs_statfs,
112 .remount_fs = isofs_remount, 112 .remount_fs = isofs_remount,
113 .show_options = generic_show_options,
113}; 114};
114 115
115 116
@@ -144,7 +145,8 @@ struct iso9660_options{
144 char nocompress; 145 char nocompress;
145 unsigned char check; 146 unsigned char check;
146 unsigned int blocksize; 147 unsigned int blocksize;
147 mode_t mode; 148 mode_t fmode;
149 mode_t dmode;
148 gid_t gid; 150 gid_t gid;
149 uid_t uid; 151 uid_t uid;
150 char *iocharset; 152 char *iocharset;
@@ -305,7 +307,7 @@ enum {
305 Opt_block, Opt_check_r, Opt_check_s, Opt_cruft, Opt_gid, Opt_ignore, 307 Opt_block, Opt_check_r, Opt_check_s, Opt_cruft, Opt_gid, Opt_ignore,
306 Opt_iocharset, Opt_map_a, Opt_map_n, Opt_map_o, Opt_mode, Opt_nojoliet, 308 Opt_iocharset, Opt_map_a, Opt_map_n, Opt_map_o, Opt_mode, Opt_nojoliet,
307 Opt_norock, Opt_sb, Opt_session, Opt_uid, Opt_unhide, Opt_utf8, Opt_err, 309 Opt_norock, Opt_sb, Opt_session, Opt_uid, Opt_unhide, Opt_utf8, Opt_err,
308 Opt_nocompress, Opt_hide, Opt_showassoc, 310 Opt_nocompress, Opt_hide, Opt_showassoc, Opt_dmode,
309}; 311};
310 312
311static match_table_t tokens = { 313static match_table_t tokens = {
@@ -332,6 +334,7 @@ static match_table_t tokens = {
332 {Opt_uid, "uid=%u"}, 334 {Opt_uid, "uid=%u"},
333 {Opt_gid, "gid=%u"}, 335 {Opt_gid, "gid=%u"},
334 {Opt_mode, "mode=%u"}, 336 {Opt_mode, "mode=%u"},
337 {Opt_dmode, "dmode=%u"},
335 {Opt_block, "block=%u"}, 338 {Opt_block, "block=%u"},
336 {Opt_ignore, "conv=binary"}, 339 {Opt_ignore, "conv=binary"},
337 {Opt_ignore, "conv=b"}, 340 {Opt_ignore, "conv=b"},
@@ -359,7 +362,7 @@ static int parse_options(char *options, struct iso9660_options *popt)
359 popt->check = 'u'; /* unset */ 362 popt->check = 'u'; /* unset */
360 popt->nocompress = 0; 363 popt->nocompress = 0;
361 popt->blocksize = 1024; 364 popt->blocksize = 1024;
362 popt->mode = S_IRUGO | S_IXUGO; /* 365 popt->fmode = popt->dmode = S_IRUGO | S_IXUGO; /*
363 * r-x for all. The disc could 366 * r-x for all. The disc could
364 * be shared with DOS machines so 367 * be shared with DOS machines so
365 * virtually anything could be 368 * virtually anything could be
@@ -451,7 +454,12 @@ static int parse_options(char *options, struct iso9660_options *popt)
451 case Opt_mode: 454 case Opt_mode:
452 if (match_int(&args[0], &option)) 455 if (match_int(&args[0], &option))
453 return 0; 456 return 0;
454 popt->mode = option; 457 popt->fmode = option;
458 break;
459 case Opt_dmode:
460 if (match_int(&args[0], &option))
461 return 0;
462 popt->dmode = option;
455 break; 463 break;
456 case Opt_block: 464 case Opt_block:
457 if (match_int(&args[0], &option)) 465 if (match_int(&args[0], &option))
@@ -554,6 +562,8 @@ static int isofs_fill_super(struct super_block *s, void *data, int silent)
554 int table, error = -EINVAL; 562 int table, error = -EINVAL;
555 unsigned int vol_desc_start; 563 unsigned int vol_desc_start;
556 564
565 save_mount_options(s, data);
566
557 sbi = kzalloc(sizeof(*sbi), GFP_KERNEL); 567 sbi = kzalloc(sizeof(*sbi), GFP_KERNEL);
558 if (!sbi) 568 if (!sbi)
559 return -ENOMEM; 569 return -ENOMEM;
@@ -801,7 +811,8 @@ root_found:
801 * on the disk as suid, so we merely allow them to set the default 811 * on the disk as suid, so we merely allow them to set the default
802 * permissions. 812 * permissions.
803 */ 813 */
804 sbi->s_mode = opt.mode & 0777; 814 sbi->s_fmode = opt.fmode & 0777;
815 sbi->s_dmode = opt.dmode & 0777;
805 816
806 /* 817 /*
807 * Read the root inode, which _may_ result in changing 818 * Read the root inode, which _may_ result in changing
@@ -1248,7 +1259,7 @@ static int isofs_read_inode(struct inode *inode)
1248 ei->i_file_format = isofs_file_normal; 1259 ei->i_file_format = isofs_file_normal;
1249 1260
1250 if (de->flags[-high_sierra] & 2) { 1261 if (de->flags[-high_sierra] & 2) {
1251 inode->i_mode = S_IRUGO | S_IXUGO | S_IFDIR; 1262 inode->i_mode = sbi->s_dmode | S_IFDIR;
1252 inode->i_nlink = 1; /* 1263 inode->i_nlink = 1; /*
1253 * Set to 1. We know there are 2, but 1264 * Set to 1. We know there are 2, but
1254 * the find utility tries to optimize 1265 * the find utility tries to optimize
@@ -1258,9 +1269,8 @@ static int isofs_read_inode(struct inode *inode)
1258 */ 1269 */
1259 } else { 1270 } else {
1260 /* Everybody gets to read the file. */ 1271 /* Everybody gets to read the file. */
1261 inode->i_mode = sbi->s_mode; 1272 inode->i_mode = sbi->s_fmode | S_IFREG;
1262 inode->i_nlink = 1; 1273 inode->i_nlink = 1;
1263 inode->i_mode |= S_IFREG;
1264 } 1274 }
1265 inode->i_uid = sbi->s_uid; 1275 inode->i_uid = sbi->s_uid;
1266 inode->i_gid = sbi->s_gid; 1276 inode->i_gid = sbi->s_gid;
diff --git a/fs/isofs/isofs.h b/fs/isofs/isofs.h
index f3213f9f89af..d1bdf8adb351 100644
--- a/fs/isofs/isofs.h
+++ b/fs/isofs/isofs.h
@@ -51,7 +51,8 @@ struct isofs_sb_info {
51 unsigned char s_hide; 51 unsigned char s_hide;
52 unsigned char s_showassoc; 52 unsigned char s_showassoc;
53 53
54 mode_t s_mode; 54 mode_t s_fmode;
55 mode_t s_dmode;
55 gid_t s_gid; 56 gid_t s_gid;
56 uid_t s_uid; 57 uid_t s_uid;
57 struct nls_table *s_nls_iocharset; /* Native language support table */ 58 struct nls_table *s_nls_iocharset; /* Native language support table */
diff --git a/fs/jbd/commit.c b/fs/jbd/commit.c
index 31853eb65b4c..8e08efcaede2 100644
--- a/fs/jbd/commit.c
+++ b/fs/jbd/commit.c
@@ -131,6 +131,8 @@ static int journal_write_commit_record(journal_t *journal,
131 barrier_done = 1; 131 barrier_done = 1;
132 } 132 }
133 ret = sync_dirty_buffer(bh); 133 ret = sync_dirty_buffer(bh);
134 if (barrier_done)
135 clear_buffer_ordered(bh);
134 /* is it possible for another commit to fail at roughly 136 /* is it possible for another commit to fail at roughly
135 * the same time as this one? If so, we don't want to 137 * the same time as this one? If so, we don't want to
136 * trust the barrier flag in the super, but instead want 138 * trust the barrier flag in the super, but instead want
@@ -148,7 +150,6 @@ static int journal_write_commit_record(journal_t *journal,
148 spin_unlock(&journal->j_state_lock); 150 spin_unlock(&journal->j_state_lock);
149 151
150 /* And try again, without the barrier */ 152 /* And try again, without the barrier */
151 clear_buffer_ordered(bh);
152 set_buffer_uptodate(bh); 153 set_buffer_uptodate(bh);
153 set_buffer_dirty(bh); 154 set_buffer_dirty(bh);
154 ret = sync_dirty_buffer(bh); 155 ret = sync_dirty_buffer(bh);
diff --git a/fs/libfs.c b/fs/libfs.c
index 5523bde96387..b004dfadd891 100644
--- a/fs/libfs.c
+++ b/fs/libfs.c
@@ -583,8 +583,8 @@ int simple_transaction_release(struct inode *inode, struct file *file)
583/* Simple attribute files */ 583/* Simple attribute files */
584 584
585struct simple_attr { 585struct simple_attr {
586 u64 (*get)(void *); 586 int (*get)(void *, u64 *);
587 void (*set)(void *, u64); 587 int (*set)(void *, u64);
588 char get_buf[24]; /* enough to store a u64 and "\n\0" */ 588 char get_buf[24]; /* enough to store a u64 and "\n\0" */
589 char set_buf[24]; 589 char set_buf[24];
590 void *data; 590 void *data;
@@ -595,7 +595,7 @@ struct simple_attr {
595/* simple_attr_open is called by an actual attribute open file operation 595/* simple_attr_open is called by an actual attribute open file operation
596 * to set the attribute specific access operations. */ 596 * to set the attribute specific access operations. */
597int simple_attr_open(struct inode *inode, struct file *file, 597int simple_attr_open(struct inode *inode, struct file *file,
598 u64 (*get)(void *), void (*set)(void *, u64), 598 int (*get)(void *, u64 *), int (*set)(void *, u64),
599 const char *fmt) 599 const char *fmt)
600{ 600{
601 struct simple_attr *attr; 601 struct simple_attr *attr;
@@ -615,7 +615,7 @@ int simple_attr_open(struct inode *inode, struct file *file,
615 return nonseekable_open(inode, file); 615 return nonseekable_open(inode, file);
616} 616}
617 617
618int simple_attr_close(struct inode *inode, struct file *file) 618int simple_attr_release(struct inode *inode, struct file *file)
619{ 619{
620 kfree(file->private_data); 620 kfree(file->private_data);
621 return 0; 621 return 0;
@@ -634,15 +634,24 @@ ssize_t simple_attr_read(struct file *file, char __user *buf,
634 if (!attr->get) 634 if (!attr->get)
635 return -EACCES; 635 return -EACCES;
636 636
637 mutex_lock(&attr->mutex); 637 ret = mutex_lock_interruptible(&attr->mutex);
638 if (*ppos) /* continued read */ 638 if (ret)
639 return ret;
640
641 if (*ppos) { /* continued read */
639 size = strlen(attr->get_buf); 642 size = strlen(attr->get_buf);
640 else /* first read */ 643 } else { /* first read */
644 u64 val;
645 ret = attr->get(attr->data, &val);
646 if (ret)
647 goto out;
648
641 size = scnprintf(attr->get_buf, sizeof(attr->get_buf), 649 size = scnprintf(attr->get_buf, sizeof(attr->get_buf),
642 attr->fmt, 650 attr->fmt, (unsigned long long)val);
643 (unsigned long long)attr->get(attr->data)); 651 }
644 652
645 ret = simple_read_from_buffer(buf, len, ppos, attr->get_buf, size); 653 ret = simple_read_from_buffer(buf, len, ppos, attr->get_buf, size);
654out:
646 mutex_unlock(&attr->mutex); 655 mutex_unlock(&attr->mutex);
647 return ret; 656 return ret;
648} 657}
@@ -657,11 +666,13 @@ ssize_t simple_attr_write(struct file *file, const char __user *buf,
657 ssize_t ret; 666 ssize_t ret;
658 667
659 attr = file->private_data; 668 attr = file->private_data;
660
661 if (!attr->set) 669 if (!attr->set)
662 return -EACCES; 670 return -EACCES;
663 671
664 mutex_lock(&attr->mutex); 672 ret = mutex_lock_interruptible(&attr->mutex);
673 if (ret)
674 return ret;
675
665 ret = -EFAULT; 676 ret = -EFAULT;
666 size = min(sizeof(attr->set_buf) - 1, len); 677 size = min(sizeof(attr->set_buf) - 1, len);
667 if (copy_from_user(attr->set_buf, buf, size)) 678 if (copy_from_user(attr->set_buf, buf, size))
@@ -793,6 +804,6 @@ EXPORT_SYMBOL(simple_transaction_get);
793EXPORT_SYMBOL(simple_transaction_read); 804EXPORT_SYMBOL(simple_transaction_read);
794EXPORT_SYMBOL(simple_transaction_release); 805EXPORT_SYMBOL(simple_transaction_release);
795EXPORT_SYMBOL_GPL(simple_attr_open); 806EXPORT_SYMBOL_GPL(simple_attr_open);
796EXPORT_SYMBOL_GPL(simple_attr_close); 807EXPORT_SYMBOL_GPL(simple_attr_release);
797EXPORT_SYMBOL_GPL(simple_attr_read); 808EXPORT_SYMBOL_GPL(simple_attr_read);
798EXPORT_SYMBOL_GPL(simple_attr_write); 809EXPORT_SYMBOL_GPL(simple_attr_write);
diff --git a/fs/locks.c b/fs/locks.c
index 49354b9c7dc1..f36f0e61558d 100644
--- a/fs/locks.c
+++ b/fs/locks.c
@@ -658,8 +658,7 @@ posix_test_lock(struct file *filp, struct file_lock *fl)
658 if (cfl) { 658 if (cfl) {
659 __locks_copy_lock(fl, cfl); 659 __locks_copy_lock(fl, cfl);
660 if (cfl->fl_nspid) 660 if (cfl->fl_nspid)
661 fl->fl_pid = pid_nr_ns(cfl->fl_nspid, 661 fl->fl_pid = pid_vnr(cfl->fl_nspid);
662 task_active_pid_ns(current));
663 } else 662 } else
664 fl->fl_type = F_UNLCK; 663 fl->fl_type = F_UNLCK;
665 unlock_kernel(); 664 unlock_kernel();
@@ -2084,7 +2083,7 @@ static void lock_get_status(struct seq_file *f, struct file_lock *fl,
2084 unsigned int fl_pid; 2083 unsigned int fl_pid;
2085 2084
2086 if (fl->fl_nspid) 2085 if (fl->fl_nspid)
2087 fl_pid = pid_nr_ns(fl->fl_nspid, task_active_pid_ns(current)); 2086 fl_pid = pid_vnr(fl->fl_nspid);
2088 else 2087 else
2089 fl_pid = fl->fl_pid; 2088 fl_pid = fl->fl_pid;
2090 2089
diff --git a/fs/namei.c b/fs/namei.c
index 241cff423653..52703986323a 100644
--- a/fs/namei.c
+++ b/fs/namei.c
@@ -106,7 +106,7 @@
106 * any extra contention... 106 * any extra contention...
107 */ 107 */
108 108
109static int fastcall link_path_walk(const char *name, struct nameidata *nd); 109static int link_path_walk(const char *name, struct nameidata *nd);
110 110
111/* In order to reduce some races, while at the same time doing additional 111/* In order to reduce some races, while at the same time doing additional
112 * checking and hopefully speeding things up, we copy filenames to the 112 * checking and hopefully speeding things up, we copy filenames to the
@@ -823,7 +823,7 @@ fail:
823 * Returns 0 and nd will have valid dentry and mnt on success. 823 * Returns 0 and nd will have valid dentry and mnt on success.
824 * Returns error and drops reference to input namei data on failure. 824 * Returns error and drops reference to input namei data on failure.
825 */ 825 */
826static fastcall int __link_path_walk(const char * name, struct nameidata *nd) 826static int __link_path_walk(const char *name, struct nameidata *nd)
827{ 827{
828 struct path next; 828 struct path next;
829 struct inode *inode; 829 struct inode *inode;
@@ -1015,7 +1015,7 @@ return_err:
1015 * Retry the whole path once, forcing real lookup requests 1015 * Retry the whole path once, forcing real lookup requests
1016 * instead of relying on the dcache. 1016 * instead of relying on the dcache.
1017 */ 1017 */
1018static int fastcall link_path_walk(const char *name, struct nameidata *nd) 1018static int link_path_walk(const char *name, struct nameidata *nd)
1019{ 1019{
1020 struct nameidata save = *nd; 1020 struct nameidata save = *nd;
1021 int result; 1021 int result;
@@ -1039,7 +1039,7 @@ static int fastcall link_path_walk(const char *name, struct nameidata *nd)
1039 return result; 1039 return result;
1040} 1040}
1041 1041
1042static int fastcall path_walk(const char * name, struct nameidata *nd) 1042static int path_walk(const char *name, struct nameidata *nd)
1043{ 1043{
1044 current->total_link_count = 0; 1044 current->total_link_count = 0;
1045 return link_path_walk(name, nd); 1045 return link_path_walk(name, nd);
@@ -1116,7 +1116,7 @@ set_it:
1116} 1116}
1117 1117
1118/* Returns 0 and nd will be valid on success; Retuns error, otherwise. */ 1118/* Returns 0 and nd will be valid on success; Retuns error, otherwise. */
1119static int fastcall do_path_lookup(int dfd, const char *name, 1119static int do_path_lookup(int dfd, const char *name,
1120 unsigned int flags, struct nameidata *nd) 1120 unsigned int flags, struct nameidata *nd)
1121{ 1121{
1122 int retval = 0; 1122 int retval = 0;
@@ -1183,7 +1183,7 @@ fput_fail:
1183 goto out_fail; 1183 goto out_fail;
1184} 1184}
1185 1185
1186int fastcall path_lookup(const char *name, unsigned int flags, 1186int path_lookup(const char *name, unsigned int flags,
1187 struct nameidata *nd) 1187 struct nameidata *nd)
1188{ 1188{
1189 return do_path_lookup(AT_FDCWD, name, flags, nd); 1189 return do_path_lookup(AT_FDCWD, name, flags, nd);
@@ -1409,7 +1409,7 @@ struct dentry *lookup_one_noperm(const char *name, struct dentry *base)
1409 return __lookup_hash(&this, base, NULL); 1409 return __lookup_hash(&this, base, NULL);
1410} 1410}
1411 1411
1412int fastcall __user_walk_fd(int dfd, const char __user *name, unsigned flags, 1412int __user_walk_fd(int dfd, const char __user *name, unsigned flags,
1413 struct nameidata *nd) 1413 struct nameidata *nd)
1414{ 1414{
1415 char *tmp = getname(name); 1415 char *tmp = getname(name);
@@ -1422,7 +1422,7 @@ int fastcall __user_walk_fd(int dfd, const char __user *name, unsigned flags,
1422 return err; 1422 return err;
1423} 1423}
1424 1424
1425int fastcall __user_walk(const char __user *name, unsigned flags, struct nameidata *nd) 1425int __user_walk(const char __user *name, unsigned flags, struct nameidata *nd)
1426{ 1426{
1427 return __user_walk_fd(AT_FDCWD, name, flags, nd); 1427 return __user_walk_fd(AT_FDCWD, name, flags, nd);
1428} 1428}
diff --git a/fs/namespace.c b/fs/namespace.c
index e9c10cd01e13..63ced21c12dc 100644
--- a/fs/namespace.c
+++ b/fs/namespace.c
@@ -320,6 +320,50 @@ void mnt_unpin(struct vfsmount *mnt)
320 320
321EXPORT_SYMBOL(mnt_unpin); 321EXPORT_SYMBOL(mnt_unpin);
322 322
323static inline void mangle(struct seq_file *m, const char *s)
324{
325 seq_escape(m, s, " \t\n\\");
326}
327
328/*
329 * Simple .show_options callback for filesystems which don't want to
330 * implement more complex mount option showing.
331 *
332 * See also save_mount_options().
333 */
334int generic_show_options(struct seq_file *m, struct vfsmount *mnt)
335{
336 const char *options = mnt->mnt_sb->s_options;
337
338 if (options != NULL && options[0]) {
339 seq_putc(m, ',');
340 mangle(m, options);
341 }
342
343 return 0;
344}
345EXPORT_SYMBOL(generic_show_options);
346
347/*
348 * If filesystem uses generic_show_options(), this function should be
349 * called from the fill_super() callback.
350 *
351 * The .remount_fs callback usually needs to be handled in a special
352 * way, to make sure, that previous options are not overwritten if the
353 * remount fails.
354 *
355 * Also note, that if the filesystem's .remount_fs function doesn't
356 * reset all options to their default value, but changes only newly
357 * given options, then the displayed options will not reflect reality
358 * any more.
359 */
360void save_mount_options(struct super_block *sb, char *options)
361{
362 kfree(sb->s_options);
363 sb->s_options = kstrdup(options, GFP_KERNEL);
364}
365EXPORT_SYMBOL(save_mount_options);
366
323/* iterator */ 367/* iterator */
324static void *m_start(struct seq_file *m, loff_t *pos) 368static void *m_start(struct seq_file *m, loff_t *pos)
325{ 369{
@@ -341,11 +385,6 @@ static void m_stop(struct seq_file *m, void *v)
341 up_read(&namespace_sem); 385 up_read(&namespace_sem);
342} 386}
343 387
344static inline void mangle(struct seq_file *m, const char *s)
345{
346 seq_escape(m, s, " \t\n\\");
347}
348
349static int show_vfsmnt(struct seq_file *m, void *v) 388static int show_vfsmnt(struct seq_file *m, void *v)
350{ 389{
351 struct vfsmount *mnt = list_entry(v, struct vfsmount, mnt_list); 390 struct vfsmount *mnt = list_entry(v, struct vfsmount, mnt_list);
@@ -897,8 +936,9 @@ out_unlock:
897 936
898/* 937/*
899 * recursively change the type of the mountpoint. 938 * recursively change the type of the mountpoint.
939 * noinline this do_mount helper to save do_mount stack space.
900 */ 940 */
901static int do_change_type(struct nameidata *nd, int flag) 941static noinline int do_change_type(struct nameidata *nd, int flag)
902{ 942{
903 struct vfsmount *m, *mnt = nd->mnt; 943 struct vfsmount *m, *mnt = nd->mnt;
904 int recurse = flag & MS_REC; 944 int recurse = flag & MS_REC;
@@ -921,8 +961,10 @@ static int do_change_type(struct nameidata *nd, int flag)
921 961
922/* 962/*
923 * do loopback mount. 963 * do loopback mount.
964 * noinline this do_mount helper to save do_mount stack space.
924 */ 965 */
925static int do_loopback(struct nameidata *nd, char *old_name, int recurse) 966static noinline int do_loopback(struct nameidata *nd, char *old_name,
967 int recurse)
926{ 968{
927 struct nameidata old_nd; 969 struct nameidata old_nd;
928 struct vfsmount *mnt = NULL; 970 struct vfsmount *mnt = NULL;
@@ -971,8 +1013,9 @@ out:
971 * change filesystem flags. dir should be a physical root of filesystem. 1013 * change filesystem flags. dir should be a physical root of filesystem.
972 * If you've mounted a non-root directory somewhere and want to do remount 1014 * If you've mounted a non-root directory somewhere and want to do remount
973 * on it - tough luck. 1015 * on it - tough luck.
1016 * noinline this do_mount helper to save do_mount stack space.
974 */ 1017 */
975static int do_remount(struct nameidata *nd, int flags, int mnt_flags, 1018static noinline int do_remount(struct nameidata *nd, int flags, int mnt_flags,
976 void *data) 1019 void *data)
977{ 1020{
978 int err; 1021 int err;
@@ -1007,7 +1050,10 @@ static inline int tree_contains_unbindable(struct vfsmount *mnt)
1007 return 0; 1050 return 0;
1008} 1051}
1009 1052
1010static int do_move_mount(struct nameidata *nd, char *old_name) 1053/*
1054 * noinline this do_mount helper to save do_mount stack space.
1055 */
1056static noinline int do_move_mount(struct nameidata *nd, char *old_name)
1011{ 1057{
1012 struct nameidata old_nd, parent_nd; 1058 struct nameidata old_nd, parent_nd;
1013 struct vfsmount *p; 1059 struct vfsmount *p;
@@ -1082,8 +1128,9 @@ out:
1082/* 1128/*
1083 * create a new mount for userspace and request it to be added into the 1129 * create a new mount for userspace and request it to be added into the
1084 * namespace's tree 1130 * namespace's tree
1131 * noinline this do_mount helper to save do_mount stack space.
1085 */ 1132 */
1086static int do_new_mount(struct nameidata *nd, char *type, int flags, 1133static noinline int do_new_mount(struct nameidata *nd, char *type, int flags,
1087 int mnt_flags, char *name, void *data) 1134 int mnt_flags, char *name, void *data)
1088{ 1135{
1089 struct vfsmount *mnt; 1136 struct vfsmount *mnt;
diff --git a/fs/ncpfs/inode.c b/fs/ncpfs/inode.c
index eff1f18d034f..fbbb9f7afa1a 100644
--- a/fs/ncpfs/inode.c
+++ b/fs/ncpfs/inode.c
@@ -28,6 +28,8 @@
28#include <linux/init.h> 28#include <linux/init.h>
29#include <linux/smp_lock.h> 29#include <linux/smp_lock.h>
30#include <linux/vfs.h> 30#include <linux/vfs.h>
31#include <linux/mount.h>
32#include <linux/seq_file.h>
31 33
32#include <linux/ncp_fs.h> 34#include <linux/ncp_fs.h>
33 35
@@ -36,9 +38,15 @@
36#include "ncplib_kernel.h" 38#include "ncplib_kernel.h"
37#include "getopt.h" 39#include "getopt.h"
38 40
41#define NCP_DEFAULT_FILE_MODE 0600
42#define NCP_DEFAULT_DIR_MODE 0700
43#define NCP_DEFAULT_TIME_OUT 10
44#define NCP_DEFAULT_RETRY_COUNT 20
45
39static void ncp_delete_inode(struct inode *); 46static void ncp_delete_inode(struct inode *);
40static void ncp_put_super(struct super_block *); 47static void ncp_put_super(struct super_block *);
41static int ncp_statfs(struct dentry *, struct kstatfs *); 48static int ncp_statfs(struct dentry *, struct kstatfs *);
49static int ncp_show_options(struct seq_file *, struct vfsmount *);
42 50
43static struct kmem_cache * ncp_inode_cachep; 51static struct kmem_cache * ncp_inode_cachep;
44 52
@@ -96,6 +104,7 @@ static const struct super_operations ncp_sops =
96 .put_super = ncp_put_super, 104 .put_super = ncp_put_super,
97 .statfs = ncp_statfs, 105 .statfs = ncp_statfs,
98 .remount_fs = ncp_remount, 106 .remount_fs = ncp_remount,
107 .show_options = ncp_show_options,
99}; 108};
100 109
101extern struct dentry_operations ncp_root_dentry_operations; 110extern struct dentry_operations ncp_root_dentry_operations;
@@ -304,6 +313,37 @@ static void ncp_stop_tasks(struct ncp_server *server) {
304 flush_scheduled_work(); 313 flush_scheduled_work();
305} 314}
306 315
316static int ncp_show_options(struct seq_file *seq, struct vfsmount *mnt)
317{
318 struct ncp_server *server = NCP_SBP(mnt->mnt_sb);
319 unsigned int tmp;
320
321 if (server->m.uid != 0)
322 seq_printf(seq, ",uid=%u", server->m.uid);
323 if (server->m.gid != 0)
324 seq_printf(seq, ",gid=%u", server->m.gid);
325 if (server->m.mounted_uid != 0)
326 seq_printf(seq, ",owner=%u", server->m.mounted_uid);
327 tmp = server->m.file_mode & S_IALLUGO;
328 if (tmp != NCP_DEFAULT_FILE_MODE)
329 seq_printf(seq, ",mode=0%o", tmp);
330 tmp = server->m.dir_mode & S_IALLUGO;
331 if (tmp != NCP_DEFAULT_DIR_MODE)
332 seq_printf(seq, ",dirmode=0%o", tmp);
333 if (server->m.time_out != NCP_DEFAULT_TIME_OUT * HZ / 100) {
334 tmp = server->m.time_out * 100 / HZ;
335 seq_printf(seq, ",timeout=%u", tmp);
336 }
337 if (server->m.retry_count != NCP_DEFAULT_RETRY_COUNT)
338 seq_printf(seq, ",retry=%u", server->m.retry_count);
339 if (server->m.flags != 0)
340 seq_printf(seq, ",flags=%lu", server->m.flags);
341 if (server->m.wdog_pid != NULL)
342 seq_printf(seq, ",wdogpid=%u", pid_vnr(server->m.wdog_pid));
343
344 return 0;
345}
346
307static const struct ncp_option ncp_opts[] = { 347static const struct ncp_option ncp_opts[] = {
308 { "uid", OPT_INT, 'u' }, 348 { "uid", OPT_INT, 'u' },
309 { "gid", OPT_INT, 'g' }, 349 { "gid", OPT_INT, 'g' },
@@ -331,12 +371,12 @@ static int ncp_parse_options(struct ncp_mount_data_kernel *data, char *options)
331 data->mounted_uid = 0; 371 data->mounted_uid = 0;
332 data->wdog_pid = NULL; 372 data->wdog_pid = NULL;
333 data->ncp_fd = ~0; 373 data->ncp_fd = ~0;
334 data->time_out = 10; 374 data->time_out = NCP_DEFAULT_TIME_OUT;
335 data->retry_count = 20; 375 data->retry_count = NCP_DEFAULT_RETRY_COUNT;
336 data->uid = 0; 376 data->uid = 0;
337 data->gid = 0; 377 data->gid = 0;
338 data->file_mode = 0600; 378 data->file_mode = NCP_DEFAULT_FILE_MODE;
339 data->dir_mode = 0700; 379 data->dir_mode = NCP_DEFAULT_DIR_MODE;
340 data->info_fd = -1; 380 data->info_fd = -1;
341 data->mounted_vol[0] = 0; 381 data->mounted_vol[0] = 0;
342 382
@@ -982,6 +1022,7 @@ static struct file_system_type ncp_fs_type = {
982 .name = "ncpfs", 1022 .name = "ncpfs",
983 .get_sb = ncp_get_sb, 1023 .get_sb = ncp_get_sb,
984 .kill_sb = kill_anon_super, 1024 .kill_sb = kill_anon_super,
1025 .fs_flags = FS_BINARY_MOUNTDATA,
985}; 1026};
986 1027
987static int __init init_ncp_fs(void) 1028static int __init init_ncp_fs(void)
diff --git a/fs/ocfs2/cluster/endian.h b/fs/ocfs2/cluster/endian.h
deleted file mode 100644
index 2df9082f4e35..000000000000
--- a/fs/ocfs2/cluster/endian.h
+++ /dev/null
@@ -1,30 +0,0 @@
1/* -*- mode: c; c-basic-offset: 8; -*-
2 * vim: noexpandtab sw=8 ts=8 sts=0:
3 *
4 * Copyright (C) 2005 Oracle. All rights reserved.
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public
17 * License along with this program; if not, write to the
18 * Free Software Foundation, Inc., 59 Temple Place - Suite 330,
19 * Boston, MA 021110-1307, USA.
20 */
21
22#ifndef OCFS2_CLUSTER_ENDIAN_H
23#define OCFS2_CLUSTER_ENDIAN_H
24
25static inline void be32_add_cpu(__be32 *var, u32 val)
26{
27 *var = cpu_to_be32(be32_to_cpu(*var) + val);
28}
29
30#endif /* OCFS2_CLUSTER_ENDIAN_H */
diff --git a/fs/ocfs2/cluster/nodemanager.c b/fs/ocfs2/cluster/nodemanager.c
index af2070da308b..709fba25bf7e 100644
--- a/fs/ocfs2/cluster/nodemanager.c
+++ b/fs/ocfs2/cluster/nodemanager.c
@@ -24,7 +24,6 @@
24#include <linux/sysctl.h> 24#include <linux/sysctl.h>
25#include <linux/configfs.h> 25#include <linux/configfs.h>
26 26
27#include "endian.h"
28#include "tcp.h" 27#include "tcp.h"
29#include "nodemanager.h" 28#include "nodemanager.h"
30#include "heartbeat.h" 29#include "heartbeat.h"
diff --git a/fs/ocfs2/dlm/dlmast.c b/fs/ocfs2/dlm/dlmast.c
index 2fd8bded38f3..644bee55d8ba 100644
--- a/fs/ocfs2/dlm/dlmast.c
+++ b/fs/ocfs2/dlm/dlmast.c
@@ -43,7 +43,6 @@
43#include "cluster/heartbeat.h" 43#include "cluster/heartbeat.h"
44#include "cluster/nodemanager.h" 44#include "cluster/nodemanager.h"
45#include "cluster/tcp.h" 45#include "cluster/tcp.h"
46#include "cluster/endian.h"
47 46
48#include "dlmapi.h" 47#include "dlmapi.h"
49#include "dlmcommon.h" 48#include "dlmcommon.h"
diff --git a/fs/ocfs2/endian.h b/fs/ocfs2/endian.h
deleted file mode 100644
index 1942e09f6ee5..000000000000
--- a/fs/ocfs2/endian.h
+++ /dev/null
@@ -1,45 +0,0 @@
1/* -*- mode: c; c-basic-offset: 8; -*-
2 * vim: noexpandtab sw=8 ts=8 sts=0:
3 *
4 * Copyright (C) 2005 Oracle. All rights reserved.
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public
17 * License along with this program; if not, write to the
18 * Free Software Foundation, Inc., 59 Temple Place - Suite 330,
19 * Boston, MA 021110-1307, USA.
20 */
21
22#ifndef OCFS2_ENDIAN_H
23#define OCFS2_ENDIAN_H
24
25static inline void le16_add_cpu(__le16 *var, u16 val)
26{
27 *var = cpu_to_le16(le16_to_cpu(*var) + val);
28}
29
30static inline void le32_add_cpu(__le32 *var, u32 val)
31{
32 *var = cpu_to_le32(le32_to_cpu(*var) + val);
33}
34
35static inline void le64_add_cpu(__le64 *var, u64 val)
36{
37 *var = cpu_to_le64(le64_to_cpu(*var) + val);
38}
39
40static inline void be32_add_cpu(__be32 *var, u32 val)
41{
42 *var = cpu_to_be32(be32_to_cpu(*var) + val);
43}
44
45#endif /* OCFS2_ENDIAN_H */
diff --git a/fs/ocfs2/ocfs2.h b/fs/ocfs2/ocfs2.h
index e8b7292e0152..6546cef212e3 100644
--- a/fs/ocfs2/ocfs2.h
+++ b/fs/ocfs2/ocfs2.h
@@ -43,7 +43,6 @@
43#include "dlm/dlmapi.h" 43#include "dlm/dlmapi.h"
44 44
45#include "ocfs2_fs.h" 45#include "ocfs2_fs.h"
46#include "endian.h"
47#include "ocfs2_lockid.h" 46#include "ocfs2_lockid.h"
48 47
49/* Most user visible OCFS2 inodes will have very few pieces of 48/* Most user visible OCFS2 inodes will have very few pieces of
diff --git a/fs/open.c b/fs/open.c
index 4932b4d1da05..43fcd6031969 100644
--- a/fs/open.c
+++ b/fs/open.c
@@ -991,7 +991,7 @@ static void __put_unused_fd(struct files_struct *files, unsigned int fd)
991 files->next_fd = fd; 991 files->next_fd = fd;
992} 992}
993 993
994void fastcall put_unused_fd(unsigned int fd) 994void put_unused_fd(unsigned int fd)
995{ 995{
996 struct files_struct *files = current->files; 996 struct files_struct *files = current->files;
997 spin_lock(&files->file_lock); 997 spin_lock(&files->file_lock);
@@ -1014,7 +1014,7 @@ EXPORT_SYMBOL(put_unused_fd);
1014 * will follow. 1014 * will follow.
1015 */ 1015 */
1016 1016
1017void fastcall fd_install(unsigned int fd, struct file * file) 1017void fd_install(unsigned int fd, struct file *file)
1018{ 1018{
1019 struct files_struct *files = current->files; 1019 struct files_struct *files = current->files;
1020 struct fdtable *fdt; 1020 struct fdtable *fdt;
@@ -1061,7 +1061,6 @@ asmlinkage long sys_open(const char __user *filename, int flags, int mode)
1061 prevent_tail_call(ret); 1061 prevent_tail_call(ret);
1062 return ret; 1062 return ret;
1063} 1063}
1064EXPORT_UNUSED_SYMBOL_GPL(sys_open); /* To be deleted for 2.6.25 */
1065 1064
1066asmlinkage long sys_openat(int dfd, const char __user *filename, int flags, 1065asmlinkage long sys_openat(int dfd, const char __user *filename, int flags,
1067 int mode) 1066 int mode)
diff --git a/fs/partitions/check.c b/fs/partitions/check.c
index 9a64045ff845..03f808c5b79d 100644
--- a/fs/partitions/check.c
+++ b/fs/partitions/check.c
@@ -18,6 +18,7 @@
18#include <linux/fs.h> 18#include <linux/fs.h>
19#include <linux/kmod.h> 19#include <linux/kmod.h>
20#include <linux/ctype.h> 20#include <linux/ctype.h>
21#include <linux/genhd.h>
21 22
22#include "check.h" 23#include "check.h"
23 24
@@ -215,9 +216,25 @@ static ssize_t part_stat_show(struct device *dev,
215{ 216{
216 struct hd_struct *p = dev_to_part(dev); 217 struct hd_struct *p = dev_to_part(dev);
217 218
218 return sprintf(buf, "%8u %8llu %8u %8llu\n", 219 preempt_disable();
219 p->ios[0], (unsigned long long)p->sectors[0], 220 part_round_stats(p);
220 p->ios[1], (unsigned long long)p->sectors[1]); 221 preempt_enable();
222 return sprintf(buf,
223 "%8lu %8lu %8llu %8u "
224 "%8lu %8lu %8llu %8u "
225 "%8u %8u %8u"
226 "\n",
227 part_stat_read(p, ios[READ]),
228 part_stat_read(p, merges[READ]),
229 (unsigned long long)part_stat_read(p, sectors[READ]),
230 jiffies_to_msecs(part_stat_read(p, ticks[READ])),
231 part_stat_read(p, ios[WRITE]),
232 part_stat_read(p, merges[WRITE]),
233 (unsigned long long)part_stat_read(p, sectors[WRITE]),
234 jiffies_to_msecs(part_stat_read(p, ticks[WRITE])),
235 p->in_flight,
236 jiffies_to_msecs(part_stat_read(p, io_ticks)),
237 jiffies_to_msecs(part_stat_read(p, time_in_queue)));
221} 238}
222 239
223#ifdef CONFIG_FAIL_MAKE_REQUEST 240#ifdef CONFIG_FAIL_MAKE_REQUEST
@@ -273,6 +290,7 @@ static struct attribute_group *part_attr_groups[] = {
273static void part_release(struct device *dev) 290static void part_release(struct device *dev)
274{ 291{
275 struct hd_struct *p = dev_to_part(dev); 292 struct hd_struct *p = dev_to_part(dev);
293 free_part_stats(p);
276 kfree(p); 294 kfree(p);
277} 295}
278 296
@@ -312,8 +330,7 @@ void delete_partition(struct gendisk *disk, int part)
312 disk->part[part-1] = NULL; 330 disk->part[part-1] = NULL;
313 p->start_sect = 0; 331 p->start_sect = 0;
314 p->nr_sects = 0; 332 p->nr_sects = 0;
315 p->ios[0] = p->ios[1] = 0; 333 part_stat_set_all(p, 0);
316 p->sectors[0] = p->sectors[1] = 0;
317 kobject_put(p->holder_dir); 334 kobject_put(p->holder_dir);
318 device_del(&p->dev); 335 device_del(&p->dev);
319 put_device(&p->dev); 336 put_device(&p->dev);
@@ -336,6 +353,10 @@ void add_partition(struct gendisk *disk, int part, sector_t start, sector_t len,
336 if (!p) 353 if (!p)
337 return; 354 return;
338 355
356 if (!init_part_stats(p)) {
357 kfree(p);
358 return;
359 }
339 p->start_sect = start; 360 p->start_sect = start;
340 p->nr_sects = len; 361 p->nr_sects = len;
341 p->partno = part; 362 p->partno = part;
diff --git a/fs/pipe.c b/fs/pipe.c
index e66ec48e95d8..a07e9a542064 100644
--- a/fs/pipe.c
+++ b/fs/pipe.c
@@ -576,9 +576,7 @@ bad_pipe_w(struct file *filp, const char __user *buf, size_t count,
576 return -EBADF; 576 return -EBADF;
577} 577}
578 578
579static int 579static long pipe_ioctl(struct file *filp, unsigned int cmd, unsigned long arg)
580pipe_ioctl(struct inode *pino, struct file *filp,
581 unsigned int cmd, unsigned long arg)
582{ 580{
583 struct inode *inode = filp->f_path.dentry->d_inode; 581 struct inode *inode = filp->f_path.dentry->d_inode;
584 struct pipe_inode_info *pipe; 582 struct pipe_inode_info *pipe;
@@ -785,7 +783,7 @@ const struct file_operations read_fifo_fops = {
785 .aio_read = pipe_read, 783 .aio_read = pipe_read,
786 .write = bad_pipe_w, 784 .write = bad_pipe_w,
787 .poll = pipe_poll, 785 .poll = pipe_poll,
788 .ioctl = pipe_ioctl, 786 .unlocked_ioctl = pipe_ioctl,
789 .open = pipe_read_open, 787 .open = pipe_read_open,
790 .release = pipe_read_release, 788 .release = pipe_read_release,
791 .fasync = pipe_read_fasync, 789 .fasync = pipe_read_fasync,
@@ -797,7 +795,7 @@ const struct file_operations write_fifo_fops = {
797 .write = do_sync_write, 795 .write = do_sync_write,
798 .aio_write = pipe_write, 796 .aio_write = pipe_write,
799 .poll = pipe_poll, 797 .poll = pipe_poll,
800 .ioctl = pipe_ioctl, 798 .unlocked_ioctl = pipe_ioctl,
801 .open = pipe_write_open, 799 .open = pipe_write_open,
802 .release = pipe_write_release, 800 .release = pipe_write_release,
803 .fasync = pipe_write_fasync, 801 .fasync = pipe_write_fasync,
@@ -810,7 +808,7 @@ const struct file_operations rdwr_fifo_fops = {
810 .write = do_sync_write, 808 .write = do_sync_write,
811 .aio_write = pipe_write, 809 .aio_write = pipe_write,
812 .poll = pipe_poll, 810 .poll = pipe_poll,
813 .ioctl = pipe_ioctl, 811 .unlocked_ioctl = pipe_ioctl,
814 .open = pipe_rdwr_open, 812 .open = pipe_rdwr_open,
815 .release = pipe_rdwr_release, 813 .release = pipe_rdwr_release,
816 .fasync = pipe_rdwr_fasync, 814 .fasync = pipe_rdwr_fasync,
@@ -822,7 +820,7 @@ static const struct file_operations read_pipe_fops = {
822 .aio_read = pipe_read, 820 .aio_read = pipe_read,
823 .write = bad_pipe_w, 821 .write = bad_pipe_w,
824 .poll = pipe_poll, 822 .poll = pipe_poll,
825 .ioctl = pipe_ioctl, 823 .unlocked_ioctl = pipe_ioctl,
826 .open = pipe_read_open, 824 .open = pipe_read_open,
827 .release = pipe_read_release, 825 .release = pipe_read_release,
828 .fasync = pipe_read_fasync, 826 .fasync = pipe_read_fasync,
@@ -834,7 +832,7 @@ static const struct file_operations write_pipe_fops = {
834 .write = do_sync_write, 832 .write = do_sync_write,
835 .aio_write = pipe_write, 833 .aio_write = pipe_write,
836 .poll = pipe_poll, 834 .poll = pipe_poll,
837 .ioctl = pipe_ioctl, 835 .unlocked_ioctl = pipe_ioctl,
838 .open = pipe_write_open, 836 .open = pipe_write_open,
839 .release = pipe_write_release, 837 .release = pipe_write_release,
840 .fasync = pipe_write_fasync, 838 .fasync = pipe_write_fasync,
@@ -847,7 +845,7 @@ static const struct file_operations rdwr_pipe_fops = {
847 .write = do_sync_write, 845 .write = do_sync_write,
848 .aio_write = pipe_write, 846 .aio_write = pipe_write,
849 .poll = pipe_poll, 847 .poll = pipe_poll,
850 .ioctl = pipe_ioctl, 848 .unlocked_ioctl = pipe_ioctl,
851 .open = pipe_rdwr_open, 849 .open = pipe_rdwr_open,
852 .release = pipe_rdwr_release, 850 .release = pipe_rdwr_release,
853 .fasync = pipe_rdwr_fasync, 851 .fasync = pipe_rdwr_fasync,
diff --git a/fs/proc/array.c b/fs/proc/array.c
index 6ba2746e4517..07d6c4853fe8 100644
--- a/fs/proc/array.c
+++ b/fs/proc/array.c
@@ -77,6 +77,7 @@
77#include <linux/cpuset.h> 77#include <linux/cpuset.h>
78#include <linux/rcupdate.h> 78#include <linux/rcupdate.h>
79#include <linux/delayacct.h> 79#include <linux/delayacct.h>
80#include <linux/seq_file.h>
80#include <linux/pid_namespace.h> 81#include <linux/pid_namespace.h>
81 82
82#include <asm/pgtable.h> 83#include <asm/pgtable.h>
@@ -88,18 +89,21 @@
88do { memcpy(buffer, string, strlen(string)); \ 89do { memcpy(buffer, string, strlen(string)); \
89 buffer += strlen(string); } while (0) 90 buffer += strlen(string); } while (0)
90 91
91static inline char *task_name(struct task_struct *p, char *buf) 92static inline void task_name(struct seq_file *m, struct task_struct *p)
92{ 93{
93 int i; 94 int i;
95 char *buf, *end;
94 char *name; 96 char *name;
95 char tcomm[sizeof(p->comm)]; 97 char tcomm[sizeof(p->comm)];
96 98
97 get_task_comm(tcomm, p); 99 get_task_comm(tcomm, p);
98 100
99 ADDBUF(buf, "Name:\t"); 101 seq_printf(m, "Name:\t");
102 end = m->buf + m->size;
103 buf = m->buf + m->count;
100 name = tcomm; 104 name = tcomm;
101 i = sizeof(tcomm); 105 i = sizeof(tcomm);
102 do { 106 while (i && (buf < end)) {
103 unsigned char c = *name; 107 unsigned char c = *name;
104 name++; 108 name++;
105 i--; 109 i--;
@@ -107,20 +111,21 @@ static inline char *task_name(struct task_struct *p, char *buf)
107 if (!c) 111 if (!c)
108 break; 112 break;
109 if (c == '\\') { 113 if (c == '\\') {
110 buf[1] = c; 114 buf++;
111 buf += 2; 115 if (buf < end)
116 *buf++ = c;
112 continue; 117 continue;
113 } 118 }
114 if (c == '\n') { 119 if (c == '\n') {
115 buf[0] = '\\'; 120 *buf++ = '\\';
116 buf[1] = 'n'; 121 if (buf < end)
117 buf += 2; 122 *buf++ = 'n';
118 continue; 123 continue;
119 } 124 }
120 buf++; 125 buf++;
121 } while (i); 126 }
122 *buf = '\n'; 127 m->count = buf - m->buf;
123 return buf+1; 128 seq_printf(m, "\n");
124} 129}
125 130
126/* 131/*
@@ -151,21 +156,20 @@ static inline const char *get_task_state(struct task_struct *tsk)
151 return *p; 156 return *p;
152} 157}
153 158
154static inline char *task_state(struct task_struct *p, char *buffer) 159static inline void task_state(struct seq_file *m, struct pid_namespace *ns,
160 struct pid *pid, struct task_struct *p)
155{ 161{
156 struct group_info *group_info; 162 struct group_info *group_info;
157 int g; 163 int g;
158 struct fdtable *fdt = NULL; 164 struct fdtable *fdt = NULL;
159 struct pid_namespace *ns;
160 pid_t ppid, tpid; 165 pid_t ppid, tpid;
161 166
162 ns = current->nsproxy->pid_ns;
163 rcu_read_lock(); 167 rcu_read_lock();
164 ppid = pid_alive(p) ? 168 ppid = pid_alive(p) ?
165 task_tgid_nr_ns(rcu_dereference(p->real_parent), ns) : 0; 169 task_tgid_nr_ns(rcu_dereference(p->real_parent), ns) : 0;
166 tpid = pid_alive(p) && p->ptrace ? 170 tpid = pid_alive(p) && p->ptrace ?
167 task_pid_nr_ns(rcu_dereference(p->parent), ns) : 0; 171 task_pid_nr_ns(rcu_dereference(p->parent), ns) : 0;
168 buffer += sprintf(buffer, 172 seq_printf(m,
169 "State:\t%s\n" 173 "State:\t%s\n"
170 "Tgid:\t%d\n" 174 "Tgid:\t%d\n"
171 "Pid:\t%d\n" 175 "Pid:\t%d\n"
@@ -175,7 +179,7 @@ static inline char *task_state(struct task_struct *p, char *buffer)
175 "Gid:\t%d\t%d\t%d\t%d\n", 179 "Gid:\t%d\t%d\t%d\t%d\n",
176 get_task_state(p), 180 get_task_state(p),
177 task_tgid_nr_ns(p, ns), 181 task_tgid_nr_ns(p, ns),
178 task_pid_nr_ns(p, ns), 182 pid_nr_ns(pid, ns),
179 ppid, tpid, 183 ppid, tpid,
180 p->uid, p->euid, p->suid, p->fsuid, 184 p->uid, p->euid, p->suid, p->fsuid,
181 p->gid, p->egid, p->sgid, p->fsgid); 185 p->gid, p->egid, p->sgid, p->fsgid);
@@ -183,7 +187,7 @@ static inline char *task_state(struct task_struct *p, char *buffer)
183 task_lock(p); 187 task_lock(p);
184 if (p->files) 188 if (p->files)
185 fdt = files_fdtable(p->files); 189 fdt = files_fdtable(p->files);
186 buffer += sprintf(buffer, 190 seq_printf(m,
187 "FDSize:\t%d\n" 191 "FDSize:\t%d\n"
188 "Groups:\t", 192 "Groups:\t",
189 fdt ? fdt->max_fds : 0); 193 fdt ? fdt->max_fds : 0);
@@ -194,20 +198,18 @@ static inline char *task_state(struct task_struct *p, char *buffer)
194 task_unlock(p); 198 task_unlock(p);
195 199
196 for (g = 0; g < min(group_info->ngroups, NGROUPS_SMALL); g++) 200 for (g = 0; g < min(group_info->ngroups, NGROUPS_SMALL); g++)
197 buffer += sprintf(buffer, "%d ", GROUP_AT(group_info, g)); 201 seq_printf(m, "%d ", GROUP_AT(group_info, g));
198 put_group_info(group_info); 202 put_group_info(group_info);
199 203
200 buffer += sprintf(buffer, "\n"); 204 seq_printf(m, "\n");
201 return buffer;
202} 205}
203 206
204static char *render_sigset_t(const char *header, sigset_t *set, char *buffer) 207static void render_sigset_t(struct seq_file *m, const char *header,
208 sigset_t *set)
205{ 209{
206 int i, len; 210 int i;
207 211
208 len = strlen(header); 212 seq_printf(m, "%s", header);
209 memcpy(buffer, header, len);
210 buffer += len;
211 213
212 i = _NSIG; 214 i = _NSIG;
213 do { 215 do {
@@ -218,12 +220,10 @@ static char *render_sigset_t(const char *header, sigset_t *set, char *buffer)
218 if (sigismember(set, i+2)) x |= 2; 220 if (sigismember(set, i+2)) x |= 2;
219 if (sigismember(set, i+3)) x |= 4; 221 if (sigismember(set, i+3)) x |= 4;
220 if (sigismember(set, i+4)) x |= 8; 222 if (sigismember(set, i+4)) x |= 8;
221 *buffer++ = (x < 10 ? '0' : 'a' - 10) + x; 223 seq_printf(m, "%x", x);
222 } while (i >= 4); 224 } while (i >= 4);
223 225
224 *buffer++ = '\n'; 226 seq_printf(m, "\n");
225 *buffer = 0;
226 return buffer;
227} 227}
228 228
229static void collect_sigign_sigcatch(struct task_struct *p, sigset_t *ign, 229static void collect_sigign_sigcatch(struct task_struct *p, sigset_t *ign,
@@ -241,7 +241,7 @@ static void collect_sigign_sigcatch(struct task_struct *p, sigset_t *ign,
241 } 241 }
242} 242}
243 243
244static inline char *task_sig(struct task_struct *p, char *buffer) 244static inline void task_sig(struct seq_file *m, struct task_struct *p)
245{ 245{
246 unsigned long flags; 246 unsigned long flags;
247 sigset_t pending, shpending, blocked, ignored, caught; 247 sigset_t pending, shpending, blocked, ignored, caught;
@@ -268,67 +268,66 @@ static inline char *task_sig(struct task_struct *p, char *buffer)
268 } 268 }
269 rcu_read_unlock(); 269 rcu_read_unlock();
270 270
271 buffer += sprintf(buffer, "Threads:\t%d\n", num_threads); 271 seq_printf(m, "Threads:\t%d\n", num_threads);
272 buffer += sprintf(buffer, "SigQ:\t%lu/%lu\n", qsize, qlim); 272 seq_printf(m, "SigQ:\t%lu/%lu\n", qsize, qlim);
273 273
274 /* render them all */ 274 /* render them all */
275 buffer = render_sigset_t("SigPnd:\t", &pending, buffer); 275 render_sigset_t(m, "SigPnd:\t", &pending);
276 buffer = render_sigset_t("ShdPnd:\t", &shpending, buffer); 276 render_sigset_t(m, "ShdPnd:\t", &shpending);
277 buffer = render_sigset_t("SigBlk:\t", &blocked, buffer); 277 render_sigset_t(m, "SigBlk:\t", &blocked);
278 buffer = render_sigset_t("SigIgn:\t", &ignored, buffer); 278 render_sigset_t(m, "SigIgn:\t", &ignored);
279 buffer = render_sigset_t("SigCgt:\t", &caught, buffer); 279 render_sigset_t(m, "SigCgt:\t", &caught);
280
281 return buffer;
282} 280}
283 281
284static char *render_cap_t(const char *header, kernel_cap_t *a, char *buffer) 282static void render_cap_t(struct seq_file *m, const char *header,
283 kernel_cap_t *a)
285{ 284{
286 unsigned __capi; 285 unsigned __capi;
287 286
288 buffer += sprintf(buffer, "%s", header); 287 seq_printf(m, "%s", header);
289 CAP_FOR_EACH_U32(__capi) { 288 CAP_FOR_EACH_U32(__capi) {
290 buffer += sprintf(buffer, "%08x", 289 seq_printf(m, "%08x",
291 a->cap[(_LINUX_CAPABILITY_U32S-1) - __capi]); 290 a->cap[(_LINUX_CAPABILITY_U32S-1) - __capi]);
292 } 291 }
293 return buffer + sprintf(buffer, "\n"); 292 seq_printf(m, "\n");
294} 293}
295 294
296static inline char *task_cap(struct task_struct *p, char *buffer) 295static inline void task_cap(struct seq_file *m, struct task_struct *p)
297{ 296{
298 buffer = render_cap_t("CapInh:\t", &p->cap_inheritable, buffer); 297 render_cap_t(m, "CapInh:\t", &p->cap_inheritable);
299 buffer = render_cap_t("CapPrm:\t", &p->cap_permitted, buffer); 298 render_cap_t(m, "CapPrm:\t", &p->cap_permitted);
300 return render_cap_t("CapEff:\t", &p->cap_effective, buffer); 299 render_cap_t(m, "CapEff:\t", &p->cap_effective);
301} 300}
302 301
303static inline char *task_context_switch_counts(struct task_struct *p, 302static inline void task_context_switch_counts(struct seq_file *m,
304 char *buffer) 303 struct task_struct *p)
305{ 304{
306 return buffer + sprintf(buffer, "voluntary_ctxt_switches:\t%lu\n" 305 seq_printf(m, "voluntary_ctxt_switches:\t%lu\n"
307 "nonvoluntary_ctxt_switches:\t%lu\n", 306 "nonvoluntary_ctxt_switches:\t%lu\n",
308 p->nvcsw, 307 p->nvcsw,
309 p->nivcsw); 308 p->nivcsw);
310} 309}
311 310
312int proc_pid_status(struct task_struct *task, char *buffer) 311int proc_pid_status(struct seq_file *m, struct pid_namespace *ns,
312 struct pid *pid, struct task_struct *task)
313{ 313{
314 char *orig = buffer;
315 struct mm_struct *mm = get_task_mm(task); 314 struct mm_struct *mm = get_task_mm(task);
316 315
317 buffer = task_name(task, buffer); 316 task_name(m, task);
318 buffer = task_state(task, buffer); 317 task_state(m, ns, pid, task);
319 318
320 if (mm) { 319 if (mm) {
321 buffer = task_mem(mm, buffer); 320 task_mem(m, mm);
322 mmput(mm); 321 mmput(mm);
323 } 322 }
324 buffer = task_sig(task, buffer); 323 task_sig(m, task);
325 buffer = task_cap(task, buffer); 324 task_cap(m, task);
326 buffer = cpuset_task_status_allowed(task, buffer); 325 cpuset_task_status_allowed(m, task);
327#if defined(CONFIG_S390) 326#if defined(CONFIG_S390)
328 buffer = task_show_regs(task, buffer); 327 task_show_regs(m, task);
329#endif 328#endif
330 buffer = task_context_switch_counts(task, buffer); 329 task_context_switch_counts(m, task);
331 return buffer - orig; 330 return 0;
332} 331}
333 332
334/* 333/*
@@ -390,14 +389,14 @@ static cputime_t task_gtime(struct task_struct *p)
390 return p->gtime; 389 return p->gtime;
391} 390}
392 391
393static int do_task_stat(struct task_struct *task, char *buffer, int whole) 392static int do_task_stat(struct seq_file *m, struct pid_namespace *ns,
393 struct pid *pid, struct task_struct *task, int whole)
394{ 394{
395 unsigned long vsize, eip, esp, wchan = ~0UL; 395 unsigned long vsize, eip, esp, wchan = ~0UL;
396 long priority, nice; 396 long priority, nice;
397 int tty_pgrp = -1, tty_nr = 0; 397 int tty_pgrp = -1, tty_nr = 0;
398 sigset_t sigign, sigcatch; 398 sigset_t sigign, sigcatch;
399 char state; 399 char state;
400 int res;
401 pid_t ppid = 0, pgid = -1, sid = -1; 400 pid_t ppid = 0, pgid = -1, sid = -1;
402 int num_threads = 0; 401 int num_threads = 0;
403 struct mm_struct *mm; 402 struct mm_struct *mm;
@@ -409,9 +408,6 @@ static int do_task_stat(struct task_struct *task, char *buffer, int whole)
409 unsigned long rsslim = 0; 408 unsigned long rsslim = 0;
410 char tcomm[sizeof(task->comm)]; 409 char tcomm[sizeof(task->comm)];
411 unsigned long flags; 410 unsigned long flags;
412 struct pid_namespace *ns;
413
414 ns = current->nsproxy->pid_ns;
415 411
416 state = *get_task_state(task); 412 state = *get_task_state(task);
417 vsize = eip = esp = 0; 413 vsize = eip = esp = 0;
@@ -498,10 +494,10 @@ static int do_task_stat(struct task_struct *task, char *buffer, int whole)
498 /* convert nsec -> ticks */ 494 /* convert nsec -> ticks */
499 start_time = nsec_to_clock_t(start_time); 495 start_time = nsec_to_clock_t(start_time);
500 496
501 res = sprintf(buffer, "%d (%s) %c %d %d %d %d %d %u %lu \ 497 seq_printf(m, "%d (%s) %c %d %d %d %d %d %u %lu \
502%lu %lu %lu %lu %lu %ld %ld %ld %ld %d 0 %llu %lu %ld %lu %lu %lu %lu %lu \ 498%lu %lu %lu %lu %lu %ld %ld %ld %ld %d 0 %llu %lu %ld %lu %lu %lu %lu %lu \
503%lu %lu %lu %lu %lu %lu %lu %lu %d %d %u %u %llu %lu %ld\n", 499%lu %lu %lu %lu %lu %lu %lu %lu %d %d %u %u %llu %lu %ld\n",
504 task_pid_nr_ns(task, ns), 500 pid_nr_ns(pid, ns),
505 tcomm, 501 tcomm,
506 state, 502 state,
507 ppid, 503 ppid,
@@ -550,20 +546,23 @@ static int do_task_stat(struct task_struct *task, char *buffer, int whole)
550 cputime_to_clock_t(cgtime)); 546 cputime_to_clock_t(cgtime));
551 if (mm) 547 if (mm)
552 mmput(mm); 548 mmput(mm);
553 return res; 549 return 0;
554} 550}
555 551
556int proc_tid_stat(struct task_struct *task, char *buffer) 552int proc_tid_stat(struct seq_file *m, struct pid_namespace *ns,
553 struct pid *pid, struct task_struct *task)
557{ 554{
558 return do_task_stat(task, buffer, 0); 555 return do_task_stat(m, ns, pid, task, 0);
559} 556}
560 557
561int proc_tgid_stat(struct task_struct *task, char *buffer) 558int proc_tgid_stat(struct seq_file *m, struct pid_namespace *ns,
559 struct pid *pid, struct task_struct *task)
562{ 560{
563 return do_task_stat(task, buffer, 1); 561 return do_task_stat(m, ns, pid, task, 1);
564} 562}
565 563
566int proc_pid_statm(struct task_struct *task, char *buffer) 564int proc_pid_statm(struct seq_file *m, struct pid_namespace *ns,
565 struct pid *pid, struct task_struct *task)
567{ 566{
568 int size = 0, resident = 0, shared = 0, text = 0, lib = 0, data = 0; 567 int size = 0, resident = 0, shared = 0, text = 0, lib = 0, data = 0;
569 struct mm_struct *mm = get_task_mm(task); 568 struct mm_struct *mm = get_task_mm(task);
@@ -572,7 +571,8 @@ int proc_pid_statm(struct task_struct *task, char *buffer)
572 size = task_statm(mm, &shared, &text, &data, &resident); 571 size = task_statm(mm, &shared, &text, &data, &resident);
573 mmput(mm); 572 mmput(mm);
574 } 573 }
574 seq_printf(m, "%d %d %d %d %d %d %d\n",
575 size, resident, shared, text, lib, data, 0);
575 576
576 return sprintf(buffer, "%d %d %d %d %d %d %d\n", 577 return 0;
577 size, resident, shared, text, lib, data, 0);
578} 578}
diff --git a/fs/proc/base.c b/fs/proc/base.c
index c59852b38787..7c6b4ec83cb7 100644
--- a/fs/proc/base.c
+++ b/fs/proc/base.c
@@ -121,6 +121,10 @@ struct pid_entry {
121 NOD(NAME, (S_IFREG|(MODE)), \ 121 NOD(NAME, (S_IFREG|(MODE)), \
122 NULL, &proc_info_file_operations, \ 122 NULL, &proc_info_file_operations, \
123 { .proc_read = &proc_##OTYPE } ) 123 { .proc_read = &proc_##OTYPE } )
124#define ONE(NAME, MODE, OTYPE) \
125 NOD(NAME, (S_IFREG|(MODE)), \
126 NULL, &proc_single_file_operations, \
127 { .proc_show = &proc_##OTYPE } )
124 128
125int maps_protect; 129int maps_protect;
126EXPORT_SYMBOL(maps_protect); 130EXPORT_SYMBOL(maps_protect);
@@ -502,7 +506,7 @@ static const struct inode_operations proc_def_inode_operations = {
502 .setattr = proc_setattr, 506 .setattr = proc_setattr,
503}; 507};
504 508
505extern struct seq_operations mounts_op; 509extern const struct seq_operations mounts_op;
506struct proc_mounts { 510struct proc_mounts {
507 struct seq_file m; 511 struct seq_file m;
508 int event; 512 int event;
@@ -581,7 +585,7 @@ static const struct file_operations proc_mounts_operations = {
581 .poll = mounts_poll, 585 .poll = mounts_poll,
582}; 586};
583 587
584extern struct seq_operations mountstats_op; 588extern const struct seq_operations mountstats_op;
585static int mountstats_open(struct inode *inode, struct file *file) 589static int mountstats_open(struct inode *inode, struct file *file)
586{ 590{
587 int ret = seq_open(file, &mountstats_op); 591 int ret = seq_open(file, &mountstats_op);
@@ -658,6 +662,45 @@ static const struct file_operations proc_info_file_operations = {
658 .read = proc_info_read, 662 .read = proc_info_read,
659}; 663};
660 664
665static int proc_single_show(struct seq_file *m, void *v)
666{
667 struct inode *inode = m->private;
668 struct pid_namespace *ns;
669 struct pid *pid;
670 struct task_struct *task;
671 int ret;
672
673 ns = inode->i_sb->s_fs_info;
674 pid = proc_pid(inode);
675 task = get_pid_task(pid, PIDTYPE_PID);
676 if (!task)
677 return -ESRCH;
678
679 ret = PROC_I(inode)->op.proc_show(m, ns, pid, task);
680
681 put_task_struct(task);
682 return ret;
683}
684
685static int proc_single_open(struct inode *inode, struct file *filp)
686{
687 int ret;
688 ret = single_open(filp, proc_single_show, NULL);
689 if (!ret) {
690 struct seq_file *m = filp->private_data;
691
692 m->private = inode;
693 }
694 return ret;
695}
696
697static const struct file_operations proc_single_file_operations = {
698 .open = proc_single_open,
699 .read = seq_read,
700 .llseek = seq_lseek,
701 .release = single_release,
702};
703
661static int mem_open(struct inode* inode, struct file* file) 704static int mem_open(struct inode* inode, struct file* file)
662{ 705{
663 file->private_data = (void*)((long)current->self_exec_id); 706 file->private_data = (void*)((long)current->self_exec_id);
@@ -2058,15 +2101,23 @@ static const struct file_operations proc_coredump_filter_operations = {
2058static int proc_self_readlink(struct dentry *dentry, char __user *buffer, 2101static int proc_self_readlink(struct dentry *dentry, char __user *buffer,
2059 int buflen) 2102 int buflen)
2060{ 2103{
2104 struct pid_namespace *ns = dentry->d_sb->s_fs_info;
2105 pid_t tgid = task_tgid_nr_ns(current, ns);
2061 char tmp[PROC_NUMBUF]; 2106 char tmp[PROC_NUMBUF];
2062 sprintf(tmp, "%d", task_tgid_vnr(current)); 2107 if (!tgid)
2108 return -ENOENT;
2109 sprintf(tmp, "%d", tgid);
2063 return vfs_readlink(dentry,buffer,buflen,tmp); 2110 return vfs_readlink(dentry,buffer,buflen,tmp);
2064} 2111}
2065 2112
2066static void *proc_self_follow_link(struct dentry *dentry, struct nameidata *nd) 2113static void *proc_self_follow_link(struct dentry *dentry, struct nameidata *nd)
2067{ 2114{
2115 struct pid_namespace *ns = dentry->d_sb->s_fs_info;
2116 pid_t tgid = task_tgid_nr_ns(current, ns);
2068 char tmp[PROC_NUMBUF]; 2117 char tmp[PROC_NUMBUF];
2069 sprintf(tmp, "%d", task_tgid_vnr(current)); 2118 if (!tgid)
2119 return ERR_PTR(-ENOENT);
2120 sprintf(tmp, "%d", task_tgid_nr_ns(current, ns));
2070 return ERR_PTR(vfs_follow_link(nd,tmp)); 2121 return ERR_PTR(vfs_follow_link(nd,tmp));
2071} 2122}
2072 2123
@@ -2231,14 +2282,14 @@ static const struct pid_entry tgid_base_stuff[] = {
2231 DIR("fdinfo", S_IRUSR|S_IXUSR, fdinfo), 2282 DIR("fdinfo", S_IRUSR|S_IXUSR, fdinfo),
2232 REG("environ", S_IRUSR, environ), 2283 REG("environ", S_IRUSR, environ),
2233 INF("auxv", S_IRUSR, pid_auxv), 2284 INF("auxv", S_IRUSR, pid_auxv),
2234 INF("status", S_IRUGO, pid_status), 2285 ONE("status", S_IRUGO, pid_status),
2235 INF("limits", S_IRUSR, pid_limits), 2286 INF("limits", S_IRUSR, pid_limits),
2236#ifdef CONFIG_SCHED_DEBUG 2287#ifdef CONFIG_SCHED_DEBUG
2237 REG("sched", S_IRUGO|S_IWUSR, pid_sched), 2288 REG("sched", S_IRUGO|S_IWUSR, pid_sched),
2238#endif 2289#endif
2239 INF("cmdline", S_IRUGO, pid_cmdline), 2290 INF("cmdline", S_IRUGO, pid_cmdline),
2240 INF("stat", S_IRUGO, tgid_stat), 2291 ONE("stat", S_IRUGO, tgid_stat),
2241 INF("statm", S_IRUGO, pid_statm), 2292 ONE("statm", S_IRUGO, pid_statm),
2242 REG("maps", S_IRUGO, maps), 2293 REG("maps", S_IRUGO, maps),
2243#ifdef CONFIG_NUMA 2294#ifdef CONFIG_NUMA
2244 REG("numa_maps", S_IRUGO, numa_maps), 2295 REG("numa_maps", S_IRUGO, numa_maps),
@@ -2562,14 +2613,14 @@ static const struct pid_entry tid_base_stuff[] = {
2562 DIR("fdinfo", S_IRUSR|S_IXUSR, fdinfo), 2613 DIR("fdinfo", S_IRUSR|S_IXUSR, fdinfo),
2563 REG("environ", S_IRUSR, environ), 2614 REG("environ", S_IRUSR, environ),
2564 INF("auxv", S_IRUSR, pid_auxv), 2615 INF("auxv", S_IRUSR, pid_auxv),
2565 INF("status", S_IRUGO, pid_status), 2616 ONE("status", S_IRUGO, pid_status),
2566 INF("limits", S_IRUSR, pid_limits), 2617 INF("limits", S_IRUSR, pid_limits),
2567#ifdef CONFIG_SCHED_DEBUG 2618#ifdef CONFIG_SCHED_DEBUG
2568 REG("sched", S_IRUGO|S_IWUSR, pid_sched), 2619 REG("sched", S_IRUGO|S_IWUSR, pid_sched),
2569#endif 2620#endif
2570 INF("cmdline", S_IRUGO, pid_cmdline), 2621 INF("cmdline", S_IRUGO, pid_cmdline),
2571 INF("stat", S_IRUGO, tid_stat), 2622 ONE("stat", S_IRUGO, tid_stat),
2572 INF("statm", S_IRUGO, pid_statm), 2623 ONE("statm", S_IRUGO, pid_statm),
2573 REG("maps", S_IRUGO, maps), 2624 REG("maps", S_IRUGO, maps),
2574#ifdef CONFIG_NUMA 2625#ifdef CONFIG_NUMA
2575 REG("numa_maps", S_IRUGO, numa_maps), 2626 REG("numa_maps", S_IRUGO, numa_maps),
diff --git a/fs/proc/generic.c b/fs/proc/generic.c
index 6a2fe5187b62..68971e66cd41 100644
--- a/fs/proc/generic.c
+++ b/fs/proc/generic.c
@@ -25,12 +25,6 @@
25 25
26#include "internal.h" 26#include "internal.h"
27 27
28static ssize_t proc_file_read(struct file *file, char __user *buf,
29 size_t nbytes, loff_t *ppos);
30static ssize_t proc_file_write(struct file *file, const char __user *buffer,
31 size_t count, loff_t *ppos);
32static loff_t proc_file_lseek(struct file *, loff_t, int);
33
34DEFINE_SPINLOCK(proc_subdir_lock); 28DEFINE_SPINLOCK(proc_subdir_lock);
35 29
36static int proc_match(int len, const char *name, struct proc_dir_entry *de) 30static int proc_match(int len, const char *name, struct proc_dir_entry *de)
@@ -40,12 +34,6 @@ static int proc_match(int len, const char *name, struct proc_dir_entry *de)
40 return !memcmp(name, de->name, len); 34 return !memcmp(name, de->name, len);
41} 35}
42 36
43static const struct file_operations proc_file_operations = {
44 .llseek = proc_file_lseek,
45 .read = proc_file_read,
46 .write = proc_file_write,
47};
48
49/* buffer size is one page but our output routines use some slack for overruns */ 37/* buffer size is one page but our output routines use some slack for overruns */
50#define PROC_BLOCK_SIZE (PAGE_SIZE - 1024) 38#define PROC_BLOCK_SIZE (PAGE_SIZE - 1024)
51 39
@@ -233,6 +221,12 @@ proc_file_lseek(struct file *file, loff_t offset, int orig)
233 return retval; 221 return retval;
234} 222}
235 223
224static const struct file_operations proc_file_operations = {
225 .llseek = proc_file_lseek,
226 .read = proc_file_read,
227 .write = proc_file_write,
228};
229
236static int proc_notify_change(struct dentry *dentry, struct iattr *iattr) 230static int proc_notify_change(struct dentry *dentry, struct iattr *iattr)
237{ 231{
238 struct inode *inode = dentry->d_inode; 232 struct inode *inode = dentry->d_inode;
@@ -406,12 +400,12 @@ struct dentry *proc_lookup(struct inode * dir, struct dentry *dentry, struct nam
406 spin_unlock(&proc_subdir_lock); 400 spin_unlock(&proc_subdir_lock);
407 error = -EINVAL; 401 error = -EINVAL;
408 inode = proc_get_inode(dir->i_sb, ino, de); 402 inode = proc_get_inode(dir->i_sb, ino, de);
409 spin_lock(&proc_subdir_lock); 403 goto out_unlock;
410 break;
411 } 404 }
412 } 405 }
413 } 406 }
414 spin_unlock(&proc_subdir_lock); 407 spin_unlock(&proc_subdir_lock);
408out_unlock:
415 unlock_kernel(); 409 unlock_kernel();
416 410
417 if (inode) { 411 if (inode) {
@@ -527,6 +521,7 @@ static const struct inode_operations proc_dir_inode_operations = {
527static int proc_register(struct proc_dir_entry * dir, struct proc_dir_entry * dp) 521static int proc_register(struct proc_dir_entry * dir, struct proc_dir_entry * dp)
528{ 522{
529 unsigned int i; 523 unsigned int i;
524 struct proc_dir_entry *tmp;
530 525
531 i = get_inode_number(); 526 i = get_inode_number();
532 if (i == 0) 527 if (i == 0)
@@ -550,6 +545,15 @@ static int proc_register(struct proc_dir_entry * dir, struct proc_dir_entry * dp
550 } 545 }
551 546
552 spin_lock(&proc_subdir_lock); 547 spin_lock(&proc_subdir_lock);
548
549 for (tmp = dir->subdir; tmp; tmp = tmp->next)
550 if (strcmp(tmp->name, dp->name) == 0) {
551 printk(KERN_WARNING "proc_dir_entry '%s' already "
552 "registered\n", dp->name);
553 dump_stack();
554 break;
555 }
556
553 dp->next = dir->subdir; 557 dp->next = dir->subdir;
554 dp->parent = dir; 558 dp->parent = dir;
555 dir->subdir = dp; 559 dir->subdir = dp;
@@ -558,7 +562,7 @@ static int proc_register(struct proc_dir_entry * dir, struct proc_dir_entry * dp
558 return 0; 562 return 0;
559} 563}
560 564
561static struct proc_dir_entry *proc_create(struct proc_dir_entry **parent, 565static struct proc_dir_entry *__proc_create(struct proc_dir_entry **parent,
562 const char *name, 566 const char *name,
563 mode_t mode, 567 mode_t mode,
564 nlink_t nlink) 568 nlink_t nlink)
@@ -601,7 +605,7 @@ struct proc_dir_entry *proc_symlink(const char *name,
601{ 605{
602 struct proc_dir_entry *ent; 606 struct proc_dir_entry *ent;
603 607
604 ent = proc_create(&parent,name, 608 ent = __proc_create(&parent, name,
605 (S_IFLNK | S_IRUGO | S_IWUGO | S_IXUGO),1); 609 (S_IFLNK | S_IRUGO | S_IWUGO | S_IXUGO),1);
606 610
607 if (ent) { 611 if (ent) {
@@ -626,7 +630,7 @@ struct proc_dir_entry *proc_mkdir_mode(const char *name, mode_t mode,
626{ 630{
627 struct proc_dir_entry *ent; 631 struct proc_dir_entry *ent;
628 632
629 ent = proc_create(&parent, name, S_IFDIR | mode, 2); 633 ent = __proc_create(&parent, name, S_IFDIR | mode, 2);
630 if (ent) { 634 if (ent) {
631 if (proc_register(parent, ent) < 0) { 635 if (proc_register(parent, ent) < 0) {
632 kfree(ent); 636 kfree(ent);
@@ -660,7 +664,7 @@ struct proc_dir_entry *create_proc_entry(const char *name, mode_t mode,
660 nlink = 1; 664 nlink = 1;
661 } 665 }
662 666
663 ent = proc_create(&parent,name,mode,nlink); 667 ent = __proc_create(&parent, name, mode, nlink);
664 if (ent) { 668 if (ent) {
665 if (proc_register(parent, ent) < 0) { 669 if (proc_register(parent, ent) < 0) {
666 kfree(ent); 670 kfree(ent);
@@ -670,6 +674,38 @@ struct proc_dir_entry *create_proc_entry(const char *name, mode_t mode,
670 return ent; 674 return ent;
671} 675}
672 676
677struct proc_dir_entry *proc_create(const char *name, mode_t mode,
678 struct proc_dir_entry *parent,
679 const struct file_operations *proc_fops)
680{
681 struct proc_dir_entry *pde;
682 nlink_t nlink;
683
684 if (S_ISDIR(mode)) {
685 if ((mode & S_IALLUGO) == 0)
686 mode |= S_IRUGO | S_IXUGO;
687 nlink = 2;
688 } else {
689 if ((mode & S_IFMT) == 0)
690 mode |= S_IFREG;
691 if ((mode & S_IALLUGO) == 0)
692 mode |= S_IRUGO;
693 nlink = 1;
694 }
695
696 pde = __proc_create(&parent, name, mode, nlink);
697 if (!pde)
698 goto out;
699 pde->proc_fops = proc_fops;
700 if (proc_register(parent, pde) < 0)
701 goto out_free;
702 return pde;
703out_free:
704 kfree(pde);
705out:
706 return NULL;
707}
708
673void free_proc_entry(struct proc_dir_entry *de) 709void free_proc_entry(struct proc_dir_entry *de)
674{ 710{
675 unsigned int ino = de->low_ino; 711 unsigned int ino = de->low_ino;
@@ -679,7 +715,7 @@ void free_proc_entry(struct proc_dir_entry *de)
679 715
680 release_inode_number(ino); 716 release_inode_number(ino);
681 717
682 if (S_ISLNK(de->mode) && de->data) 718 if (S_ISLNK(de->mode))
683 kfree(de->data); 719 kfree(de->data);
684 kfree(de); 720 kfree(de);
685} 721}
diff --git a/fs/proc/inode.c b/fs/proc/inode.c
index 6ecf6396f072..82b3a1b5a70b 100644
--- a/fs/proc/inode.c
+++ b/fs/proc/inode.c
@@ -467,4 +467,3 @@ out_no_root:
467 de_put(&proc_root); 467 de_put(&proc_root);
468 return -ENOMEM; 468 return -ENOMEM;
469} 469}
470MODULE_LICENSE("GPL");
diff --git a/fs/proc/internal.h b/fs/proc/internal.h
index 7d57e8069924..ea496ffeabe7 100644
--- a/fs/proc/internal.h
+++ b/fs/proc/internal.h
@@ -46,12 +46,17 @@ extern int nommu_vma_show(struct seq_file *, struct vm_area_struct *);
46 46
47extern int maps_protect; 47extern int maps_protect;
48 48
49extern void create_seq_entry(char *name, mode_t mode, const struct file_operations *f); 49extern void create_seq_entry(char *name, mode_t mode,
50 const struct file_operations *f);
50extern int proc_exe_link(struct inode *, struct dentry **, struct vfsmount **); 51extern int proc_exe_link(struct inode *, struct dentry **, struct vfsmount **);
51extern int proc_tid_stat(struct task_struct *, char *); 52extern int proc_tid_stat(struct seq_file *m, struct pid_namespace *ns,
52extern int proc_tgid_stat(struct task_struct *, char *); 53 struct pid *pid, struct task_struct *task);
53extern int proc_pid_status(struct task_struct *, char *); 54extern int proc_tgid_stat(struct seq_file *m, struct pid_namespace *ns,
54extern int proc_pid_statm(struct task_struct *, char *); 55 struct pid *pid, struct task_struct *task);
56extern int proc_pid_status(struct seq_file *m, struct pid_namespace *ns,
57 struct pid *pid, struct task_struct *task);
58extern int proc_pid_statm(struct seq_file *m, struct pid_namespace *ns,
59 struct pid *pid, struct task_struct *task);
55extern loff_t mem_lseek(struct file *file, loff_t offset, int orig); 60extern loff_t mem_lseek(struct file *file, loff_t offset, int orig);
56 61
57extern const struct file_operations proc_maps_operations; 62extern const struct file_operations proc_maps_operations;
diff --git a/fs/proc/kcore.c b/fs/proc/kcore.c
index 7dd26e18cbfd..e78c81fcf547 100644
--- a/fs/proc/kcore.c
+++ b/fs/proc/kcore.c
@@ -12,7 +12,6 @@
12#include <linux/mm.h> 12#include <linux/mm.h>
13#include <linux/proc_fs.h> 13#include <linux/proc_fs.h>
14#include <linux/user.h> 14#include <linux/user.h>
15#include <linux/a.out.h>
16#include <linux/capability.h> 15#include <linux/capability.h>
17#include <linux/elf.h> 16#include <linux/elf.h>
18#include <linux/elfcore.h> 17#include <linux/elfcore.h>
diff --git a/fs/proc/nommu.c b/fs/proc/nommu.c
index 22f789de3909..5d9147b9d738 100644
--- a/fs/proc/nommu.c
+++ b/fs/proc/nommu.c
@@ -116,7 +116,7 @@ static void *nommu_vma_list_next(struct seq_file *m, void *v, loff_t *pos)
116 return rb_next((struct rb_node *) v); 116 return rb_next((struct rb_node *) v);
117} 117}
118 118
119static struct seq_operations proc_nommu_vma_list_seqop = { 119static const struct seq_operations proc_nommu_vma_list_seqop = {
120 .start = nommu_vma_list_start, 120 .start = nommu_vma_list_start,
121 .next = nommu_vma_list_next, 121 .next = nommu_vma_list_next,
122 .stop = nommu_vma_list_stop, 122 .stop = nommu_vma_list_stop,
diff --git a/fs/proc/proc_misc.c b/fs/proc/proc_misc.c
index 2686592dbcb2..468805d40e2b 100644
--- a/fs/proc/proc_misc.c
+++ b/fs/proc/proc_misc.c
@@ -222,7 +222,7 @@ static int meminfo_read_proc(char *page, char **start, off_t off,
222#undef K 222#undef K
223} 223}
224 224
225extern struct seq_operations fragmentation_op; 225extern const struct seq_operations fragmentation_op;
226static int fragmentation_open(struct inode *inode, struct file *file) 226static int fragmentation_open(struct inode *inode, struct file *file)
227{ 227{
228 (void)inode; 228 (void)inode;
@@ -236,7 +236,7 @@ static const struct file_operations fragmentation_file_operations = {
236 .release = seq_release, 236 .release = seq_release,
237}; 237};
238 238
239extern struct seq_operations pagetypeinfo_op; 239extern const struct seq_operations pagetypeinfo_op;
240static int pagetypeinfo_open(struct inode *inode, struct file *file) 240static int pagetypeinfo_open(struct inode *inode, struct file *file)
241{ 241{
242 return seq_open(file, &pagetypeinfo_op); 242 return seq_open(file, &pagetypeinfo_op);
@@ -249,7 +249,7 @@ static const struct file_operations pagetypeinfo_file_ops = {
249 .release = seq_release, 249 .release = seq_release,
250}; 250};
251 251
252extern struct seq_operations zoneinfo_op; 252extern const struct seq_operations zoneinfo_op;
253static int zoneinfo_open(struct inode *inode, struct file *file) 253static int zoneinfo_open(struct inode *inode, struct file *file)
254{ 254{
255 return seq_open(file, &zoneinfo_op); 255 return seq_open(file, &zoneinfo_op);
@@ -274,7 +274,7 @@ static int version_read_proc(char *page, char **start, off_t off,
274 return proc_calc_metrics(page, start, off, count, eof, len); 274 return proc_calc_metrics(page, start, off, count, eof, len);
275} 275}
276 276
277extern struct seq_operations cpuinfo_op; 277extern const struct seq_operations cpuinfo_op;
278static int cpuinfo_open(struct inode *inode, struct file *file) 278static int cpuinfo_open(struct inode *inode, struct file *file)
279{ 279{
280 return seq_open(file, &cpuinfo_op); 280 return seq_open(file, &cpuinfo_op);
@@ -327,7 +327,7 @@ static void devinfo_stop(struct seq_file *f, void *v)
327 /* Nothing to do */ 327 /* Nothing to do */
328} 328}
329 329
330static struct seq_operations devinfo_ops = { 330static const struct seq_operations devinfo_ops = {
331 .start = devinfo_start, 331 .start = devinfo_start,
332 .next = devinfo_next, 332 .next = devinfo_next,
333 .stop = devinfo_stop, 333 .stop = devinfo_stop,
@@ -346,7 +346,7 @@ static const struct file_operations proc_devinfo_operations = {
346 .release = seq_release, 346 .release = seq_release,
347}; 347};
348 348
349extern struct seq_operations vmstat_op; 349extern const struct seq_operations vmstat_op;
350static int vmstat_open(struct inode *inode, struct file *file) 350static int vmstat_open(struct inode *inode, struct file *file)
351{ 351{
352 return seq_open(file, &vmstat_op); 352 return seq_open(file, &vmstat_op);
@@ -377,7 +377,7 @@ static int stram_read_proc(char *page, char **start, off_t off,
377#endif 377#endif
378 378
379#ifdef CONFIG_BLOCK 379#ifdef CONFIG_BLOCK
380extern struct seq_operations partitions_op; 380extern const struct seq_operations partitions_op;
381static int partitions_open(struct inode *inode, struct file *file) 381static int partitions_open(struct inode *inode, struct file *file)
382{ 382{
383 return seq_open(file, &partitions_op); 383 return seq_open(file, &partitions_op);
@@ -389,7 +389,7 @@ static const struct file_operations proc_partitions_operations = {
389 .release = seq_release, 389 .release = seq_release,
390}; 390};
391 391
392extern struct seq_operations diskstats_op; 392extern const struct seq_operations diskstats_op;
393static int diskstats_open(struct inode *inode, struct file *file) 393static int diskstats_open(struct inode *inode, struct file *file)
394{ 394{
395 return seq_open(file, &diskstats_op); 395 return seq_open(file, &diskstats_op);
@@ -403,7 +403,7 @@ static const struct file_operations proc_diskstats_operations = {
403#endif 403#endif
404 404
405#ifdef CONFIG_MODULES 405#ifdef CONFIG_MODULES
406extern struct seq_operations modules_op; 406extern const struct seq_operations modules_op;
407static int modules_open(struct inode *inode, struct file *file) 407static int modules_open(struct inode *inode, struct file *file)
408{ 408{
409 return seq_open(file, &modules_op); 409 return seq_open(file, &modules_op);
@@ -430,7 +430,7 @@ static const struct file_operations proc_slabinfo_operations = {
430}; 430};
431 431
432#ifdef CONFIG_DEBUG_SLAB_LEAK 432#ifdef CONFIG_DEBUG_SLAB_LEAK
433extern struct seq_operations slabstats_op; 433extern const struct seq_operations slabstats_op;
434static int slabstats_open(struct inode *inode, struct file *file) 434static int slabstats_open(struct inode *inode, struct file *file)
435{ 435{
436 unsigned long *n = kzalloc(PAGE_SIZE, GFP_KERNEL); 436 unsigned long *n = kzalloc(PAGE_SIZE, GFP_KERNEL);
@@ -604,7 +604,7 @@ static void int_seq_stop(struct seq_file *f, void *v)
604} 604}
605 605
606 606
607static struct seq_operations int_seq_ops = { 607static const struct seq_operations int_seq_ops = {
608 .start = int_seq_start, 608 .start = int_seq_start,
609 .next = int_seq_next, 609 .next = int_seq_next,
610 .stop = int_seq_stop, 610 .stop = int_seq_stop,
diff --git a/fs/proc/proc_net.c b/fs/proc/proc_net.c
index 4823c9677fac..14e9b5aaf863 100644
--- a/fs/proc/proc_net.c
+++ b/fs/proc/proc_net.c
@@ -67,12 +67,7 @@ EXPORT_SYMBOL_GPL(seq_release_net);
67struct proc_dir_entry *proc_net_fops_create(struct net *net, 67struct proc_dir_entry *proc_net_fops_create(struct net *net,
68 const char *name, mode_t mode, const struct file_operations *fops) 68 const char *name, mode_t mode, const struct file_operations *fops)
69{ 69{
70 struct proc_dir_entry *res; 70 return proc_create(name, mode, net->proc_net, fops);
71
72 res = create_proc_entry(name, mode, net->proc_net);
73 if (res)
74 res->proc_fops = fops;
75 return res;
76} 71}
77EXPORT_SYMBOL_GPL(proc_net_fops_create); 72EXPORT_SYMBOL_GPL(proc_net_fops_create);
78 73
diff --git a/fs/proc/proc_sysctl.c b/fs/proc/proc_sysctl.c
index 4e57fcf85982..b9cb23c08f63 100644
--- a/fs/proc/proc_sysctl.c
+++ b/fs/proc/proc_sysctl.c
@@ -9,7 +9,7 @@
9 9
10static struct dentry_operations proc_sys_dentry_operations; 10static struct dentry_operations proc_sys_dentry_operations;
11static const struct file_operations proc_sys_file_operations; 11static const struct file_operations proc_sys_file_operations;
12static struct inode_operations proc_sys_inode_operations; 12static const struct inode_operations proc_sys_inode_operations;
13 13
14static void proc_sys_refresh_inode(struct inode *inode, struct ctl_table *table) 14static void proc_sys_refresh_inode(struct inode *inode, struct ctl_table *table)
15{ 15{
@@ -446,7 +446,7 @@ static const struct file_operations proc_sys_file_operations = {
446 .readdir = proc_sys_readdir, 446 .readdir = proc_sys_readdir,
447}; 447};
448 448
449static struct inode_operations proc_sys_inode_operations = { 449static const struct inode_operations proc_sys_inode_operations = {
450 .lookup = proc_sys_lookup, 450 .lookup = proc_sys_lookup,
451 .permission = proc_sys_permission, 451 .permission = proc_sys_permission,
452 .setattr = proc_sys_setattr, 452 .setattr = proc_sys_setattr,
diff --git a/fs/proc/proc_tty.c b/fs/proc/proc_tty.c
index 22846225acfa..49816e00b51a 100644
--- a/fs/proc/proc_tty.c
+++ b/fs/proc/proc_tty.c
@@ -15,9 +15,6 @@
15#include <linux/seq_file.h> 15#include <linux/seq_file.h>
16#include <linux/bitops.h> 16#include <linux/bitops.h>
17 17
18static int tty_ldiscs_read_proc(char *page, char **start, off_t off,
19 int count, int *eof, void *data);
20
21/* 18/*
22 * The /proc/tty directory inodes... 19 * The /proc/tty directory inodes...
23 */ 20 */
@@ -120,7 +117,7 @@ static void t_stop(struct seq_file *m, void *v)
120 mutex_unlock(&tty_mutex); 117 mutex_unlock(&tty_mutex);
121} 118}
122 119
123static struct seq_operations tty_drivers_op = { 120static const struct seq_operations tty_drivers_op = {
124 .start = t_start, 121 .start = t_start,
125 .next = t_next, 122 .next = t_next,
126 .stop = t_stop, 123 .stop = t_stop,
diff --git a/fs/proc/root.c b/fs/proc/root.c
index 81f99e691f99..ef0fb57fc9ef 100644
--- a/fs/proc/root.c
+++ b/fs/proc/root.c
@@ -232,6 +232,7 @@ void pid_ns_release_proc(struct pid_namespace *ns)
232EXPORT_SYMBOL(proc_symlink); 232EXPORT_SYMBOL(proc_symlink);
233EXPORT_SYMBOL(proc_mkdir); 233EXPORT_SYMBOL(proc_mkdir);
234EXPORT_SYMBOL(create_proc_entry); 234EXPORT_SYMBOL(create_proc_entry);
235EXPORT_SYMBOL(proc_create);
235EXPORT_SYMBOL(remove_proc_entry); 236EXPORT_SYMBOL(remove_proc_entry);
236EXPORT_SYMBOL(proc_root); 237EXPORT_SYMBOL(proc_root);
237EXPORT_SYMBOL(proc_root_fs); 238EXPORT_SYMBOL(proc_root_fs);
diff --git a/fs/proc/task_mmu.c b/fs/proc/task_mmu.c
index 38338ed98cc6..ae4d3f2c8cb2 100644
--- a/fs/proc/task_mmu.c
+++ b/fs/proc/task_mmu.c
@@ -9,13 +9,14 @@
9#include <linux/mempolicy.h> 9#include <linux/mempolicy.h>
10#include <linux/swap.h> 10#include <linux/swap.h>
11#include <linux/swapops.h> 11#include <linux/swapops.h>
12#include <linux/seq_file.h>
12 13
13#include <asm/elf.h> 14#include <asm/elf.h>
14#include <asm/uaccess.h> 15#include <asm/uaccess.h>
15#include <asm/tlbflush.h> 16#include <asm/tlbflush.h>
16#include "internal.h" 17#include "internal.h"
17 18
18char *task_mem(struct mm_struct *mm, char *buffer) 19void task_mem(struct seq_file *m, struct mm_struct *mm)
19{ 20{
20 unsigned long data, text, lib; 21 unsigned long data, text, lib;
21 unsigned long hiwater_vm, total_vm, hiwater_rss, total_rss; 22 unsigned long hiwater_vm, total_vm, hiwater_rss, total_rss;
@@ -37,7 +38,7 @@ char *task_mem(struct mm_struct *mm, char *buffer)
37 data = mm->total_vm - mm->shared_vm - mm->stack_vm; 38 data = mm->total_vm - mm->shared_vm - mm->stack_vm;
38 text = (PAGE_ALIGN(mm->end_code) - (mm->start_code & PAGE_MASK)) >> 10; 39 text = (PAGE_ALIGN(mm->end_code) - (mm->start_code & PAGE_MASK)) >> 10;
39 lib = (mm->exec_vm << (PAGE_SHIFT-10)) - text; 40 lib = (mm->exec_vm << (PAGE_SHIFT-10)) - text;
40 buffer += sprintf(buffer, 41 seq_printf(m,
41 "VmPeak:\t%8lu kB\n" 42 "VmPeak:\t%8lu kB\n"
42 "VmSize:\t%8lu kB\n" 43 "VmSize:\t%8lu kB\n"
43 "VmLck:\t%8lu kB\n" 44 "VmLck:\t%8lu kB\n"
@@ -56,7 +57,6 @@ char *task_mem(struct mm_struct *mm, char *buffer)
56 data << (PAGE_SHIFT-10), 57 data << (PAGE_SHIFT-10),
57 mm->stack_vm << (PAGE_SHIFT-10), text, lib, 58 mm->stack_vm << (PAGE_SHIFT-10), text, lib,
58 (PTRS_PER_PTE*sizeof(pte_t)*mm->nr_ptes) >> 10); 59 (PTRS_PER_PTE*sizeof(pte_t)*mm->nr_ptes) >> 10);
59 return buffer;
60} 60}
61 61
62unsigned long task_vsize(struct mm_struct *mm) 62unsigned long task_vsize(struct mm_struct *mm)
@@ -216,7 +216,7 @@ static void m_stop(struct seq_file *m, void *v)
216} 216}
217 217
218static int do_maps_open(struct inode *inode, struct file *file, 218static int do_maps_open(struct inode *inode, struct file *file,
219 struct seq_operations *ops) 219 const struct seq_operations *ops)
220{ 220{
221 struct proc_maps_private *priv; 221 struct proc_maps_private *priv;
222 int ret = -ENOMEM; 222 int ret = -ENOMEM;
@@ -299,7 +299,7 @@ static int show_map(struct seq_file *m, void *v)
299 return 0; 299 return 0;
300} 300}
301 301
302static struct seq_operations proc_pid_maps_op = { 302static const struct seq_operations proc_pid_maps_op = {
303 .start = m_start, 303 .start = m_start,
304 .next = m_next, 304 .next = m_next,
305 .stop = m_stop, 305 .stop = m_stop,
@@ -434,7 +434,7 @@ static int show_smap(struct seq_file *m, void *v)
434 return ret; 434 return ret;
435} 435}
436 436
437static struct seq_operations proc_pid_smaps_op = { 437static const struct seq_operations proc_pid_smaps_op = {
438 .start = m_start, 438 .start = m_start,
439 .next = m_next, 439 .next = m_next,
440 .stop = m_stop, 440 .stop = m_stop,
@@ -734,7 +734,7 @@ static int show_numa_map_checked(struct seq_file *m, void *v)
734 return show_numa_map(m, v); 734 return show_numa_map(m, v);
735} 735}
736 736
737static struct seq_operations proc_pid_numa_maps_op = { 737static const struct seq_operations proc_pid_numa_maps_op = {
738 .start = m_start, 738 .start = m_start,
739 .next = m_next, 739 .next = m_next,
740 .stop = m_stop, 740 .stop = m_stop,
diff --git a/fs/proc/task_nommu.c b/fs/proc/task_nommu.c
index 1932c2ca3457..abfc6f5e56ca 100644
--- a/fs/proc/task_nommu.c
+++ b/fs/proc/task_nommu.c
@@ -12,7 +12,7 @@
12 * each process that owns it. Non-shared memory is counted 12 * each process that owns it. Non-shared memory is counted
13 * accurately. 13 * accurately.
14 */ 14 */
15char *task_mem(struct mm_struct *mm, char *buffer) 15void task_mem(struct seq_file *m, struct mm_struct *mm)
16{ 16{
17 struct vm_list_struct *vml; 17 struct vm_list_struct *vml;
18 unsigned long bytes = 0, sbytes = 0, slack = 0; 18 unsigned long bytes = 0, sbytes = 0, slack = 0;
@@ -58,14 +58,13 @@ char *task_mem(struct mm_struct *mm, char *buffer)
58 58
59 bytes += kobjsize(current); /* includes kernel stack */ 59 bytes += kobjsize(current); /* includes kernel stack */
60 60
61 buffer += sprintf(buffer, 61 seq_printf(m,
62 "Mem:\t%8lu bytes\n" 62 "Mem:\t%8lu bytes\n"
63 "Slack:\t%8lu bytes\n" 63 "Slack:\t%8lu bytes\n"
64 "Shared:\t%8lu bytes\n", 64 "Shared:\t%8lu bytes\n",
65 bytes, slack, sbytes); 65 bytes, slack, sbytes);
66 66
67 up_read(&mm->mmap_sem); 67 up_read(&mm->mmap_sem);
68 return buffer;
69} 68}
70 69
71unsigned long task_vsize(struct mm_struct *mm) 70unsigned long task_vsize(struct mm_struct *mm)
@@ -199,7 +198,7 @@ static void *m_next(struct seq_file *m, void *_vml, loff_t *pos)
199 return vml ? vml->next : NULL; 198 return vml ? vml->next : NULL;
200} 199}
201 200
202static struct seq_operations proc_pid_maps_ops = { 201static const struct seq_operations proc_pid_maps_ops = {
203 .start = m_start, 202 .start = m_start,
204 .next = m_next, 203 .next = m_next,
205 .stop = m_stop, 204 .stop = m_stop,
diff --git a/fs/proc/vmcore.c b/fs/proc/vmcore.c
index 523e1098ae88..9ac0f5e064e0 100644
--- a/fs/proc/vmcore.c
+++ b/fs/proc/vmcore.c
@@ -10,7 +10,6 @@
10#include <linux/mm.h> 10#include <linux/mm.h>
11#include <linux/proc_fs.h> 11#include <linux/proc_fs.h>
12#include <linux/user.h> 12#include <linux/user.h>
13#include <linux/a.out.h>
14#include <linux/elf.h> 13#include <linux/elf.h>
15#include <linux/elfcore.h> 14#include <linux/elfcore.h>
16#include <linux/highmem.h> 15#include <linux/highmem.h>
diff --git a/fs/read_write.c b/fs/read_write.c
index 1c177f29e1b7..49a98718ecdf 100644
--- a/fs/read_write.c
+++ b/fs/read_write.c
@@ -366,7 +366,6 @@ asmlinkage ssize_t sys_read(unsigned int fd, char __user * buf, size_t count)
366 366
367 return ret; 367 return ret;
368} 368}
369EXPORT_UNUSED_SYMBOL_GPL(sys_read); /* to be deleted for 2.6.25 */
370 369
371asmlinkage ssize_t sys_write(unsigned int fd, const char __user * buf, size_t count) 370asmlinkage ssize_t sys_write(unsigned int fd, const char __user * buf, size_t count)
372{ 371{
diff --git a/fs/reiserfs/procfs.c b/fs/reiserfs/procfs.c
index 001144621672..8f86c52b30d8 100644
--- a/fs/reiserfs/procfs.c
+++ b/fs/reiserfs/procfs.c
@@ -444,7 +444,7 @@ static int r_show(struct seq_file *m, void *v)
444 return show(m, v); 444 return show(m, v);
445} 445}
446 446
447static struct seq_operations r_ops = { 447static const struct seq_operations r_ops = {
448 .start = r_start, 448 .start = r_start,
449 .next = r_next, 449 .next = r_next,
450 .stop = r_stop, 450 .stop = r_stop,
diff --git a/fs/reiserfs/super.c b/fs/reiserfs/super.c
index 5cd85fe5df5d..6033f0c3bd0b 100644
--- a/fs/reiserfs/super.c
+++ b/fs/reiserfs/super.c
@@ -617,6 +617,7 @@ static const struct super_operations reiserfs_sops = {
617 .unlockfs = reiserfs_unlockfs, 617 .unlockfs = reiserfs_unlockfs,
618 .statfs = reiserfs_statfs, 618 .statfs = reiserfs_statfs,
619 .remount_fs = reiserfs_remount, 619 .remount_fs = reiserfs_remount,
620 .show_options = generic_show_options,
620#ifdef CONFIG_QUOTA 621#ifdef CONFIG_QUOTA
621 .quota_read = reiserfs_quota_read, 622 .quota_read = reiserfs_quota_read,
622 .quota_write = reiserfs_quota_write, 623 .quota_write = reiserfs_quota_write,
@@ -1138,6 +1139,7 @@ static int reiserfs_remount(struct super_block *s, int *mount_flags, char *arg)
1138 unsigned long safe_mask = 0; 1139 unsigned long safe_mask = 0;
1139 unsigned int commit_max_age = (unsigned int)-1; 1140 unsigned int commit_max_age = (unsigned int)-1;
1140 struct reiserfs_journal *journal = SB_JOURNAL(s); 1141 struct reiserfs_journal *journal = SB_JOURNAL(s);
1142 char *new_opts = kstrdup(arg, GFP_KERNEL);
1141 int err; 1143 int err;
1142#ifdef CONFIG_QUOTA 1144#ifdef CONFIG_QUOTA
1143 int i; 1145 int i;
@@ -1153,7 +1155,8 @@ static int reiserfs_remount(struct super_block *s, int *mount_flags, char *arg)
1153 REISERFS_SB(s)->s_qf_names[i] = NULL; 1155 REISERFS_SB(s)->s_qf_names[i] = NULL;
1154 } 1156 }
1155#endif 1157#endif
1156 return -EINVAL; 1158 err = -EINVAL;
1159 goto out_err;
1157 } 1160 }
1158 1161
1159 handle_attrs(s); 1162 handle_attrs(s);
@@ -1191,9 +1194,9 @@ static int reiserfs_remount(struct super_block *s, int *mount_flags, char *arg)
1191 } 1194 }
1192 1195
1193 if (blocks) { 1196 if (blocks) {
1194 int rc = reiserfs_resize(s, blocks); 1197 err = reiserfs_resize(s, blocks);
1195 if (rc != 0) 1198 if (err != 0)
1196 return rc; 1199 goto out_err;
1197 } 1200 }
1198 1201
1199 if (*mount_flags & MS_RDONLY) { 1202 if (*mount_flags & MS_RDONLY) {
@@ -1201,16 +1204,16 @@ static int reiserfs_remount(struct super_block *s, int *mount_flags, char *arg)
1201 /* remount read-only */ 1204 /* remount read-only */
1202 if (s->s_flags & MS_RDONLY) 1205 if (s->s_flags & MS_RDONLY)
1203 /* it is read-only already */ 1206 /* it is read-only already */
1204 return 0; 1207 goto out_ok;
1205 /* try to remount file system with read-only permissions */ 1208 /* try to remount file system with read-only permissions */
1206 if (sb_umount_state(rs) == REISERFS_VALID_FS 1209 if (sb_umount_state(rs) == REISERFS_VALID_FS
1207 || REISERFS_SB(s)->s_mount_state != REISERFS_VALID_FS) { 1210 || REISERFS_SB(s)->s_mount_state != REISERFS_VALID_FS) {
1208 return 0; 1211 goto out_ok;
1209 } 1212 }
1210 1213
1211 err = journal_begin(&th, s, 10); 1214 err = journal_begin(&th, s, 10);
1212 if (err) 1215 if (err)
1213 return err; 1216 goto out_err;
1214 1217
1215 /* Mounting a rw partition read-only. */ 1218 /* Mounting a rw partition read-only. */
1216 reiserfs_prepare_for_journal(s, SB_BUFFER_WITH_SB(s), 1); 1219 reiserfs_prepare_for_journal(s, SB_BUFFER_WITH_SB(s), 1);
@@ -1220,11 +1223,13 @@ static int reiserfs_remount(struct super_block *s, int *mount_flags, char *arg)
1220 /* remount read-write */ 1223 /* remount read-write */
1221 if (!(s->s_flags & MS_RDONLY)) { 1224 if (!(s->s_flags & MS_RDONLY)) {
1222 reiserfs_xattr_init(s, *mount_flags); 1225 reiserfs_xattr_init(s, *mount_flags);
1223 return 0; /* We are read-write already */ 1226 goto out_ok; /* We are read-write already */
1224 } 1227 }
1225 1228
1226 if (reiserfs_is_journal_aborted(journal)) 1229 if (reiserfs_is_journal_aborted(journal)) {
1227 return journal->j_errno; 1230 err = journal->j_errno;
1231 goto out_err;
1232 }
1228 1233
1229 handle_data_mode(s, mount_options); 1234 handle_data_mode(s, mount_options);
1230 handle_barrier_mode(s, mount_options); 1235 handle_barrier_mode(s, mount_options);
@@ -1232,7 +1237,7 @@ static int reiserfs_remount(struct super_block *s, int *mount_flags, char *arg)
1232 s->s_flags &= ~MS_RDONLY; /* now it is safe to call journal_begin */ 1237 s->s_flags &= ~MS_RDONLY; /* now it is safe to call journal_begin */
1233 err = journal_begin(&th, s, 10); 1238 err = journal_begin(&th, s, 10);
1234 if (err) 1239 if (err)
1235 return err; 1240 goto out_err;
1236 1241
1237 /* Mount a partition which is read-only, read-write */ 1242 /* Mount a partition which is read-only, read-write */
1238 reiserfs_prepare_for_journal(s, SB_BUFFER_WITH_SB(s), 1); 1243 reiserfs_prepare_for_journal(s, SB_BUFFER_WITH_SB(s), 1);
@@ -1247,7 +1252,7 @@ static int reiserfs_remount(struct super_block *s, int *mount_flags, char *arg)
1247 SB_JOURNAL(s)->j_must_wait = 1; 1252 SB_JOURNAL(s)->j_must_wait = 1;
1248 err = journal_end(&th, s, 10); 1253 err = journal_end(&th, s, 10);
1249 if (err) 1254 if (err)
1250 return err; 1255 goto out_err;
1251 s->s_dirt = 0; 1256 s->s_dirt = 0;
1252 1257
1253 if (!(*mount_flags & MS_RDONLY)) { 1258 if (!(*mount_flags & MS_RDONLY)) {
@@ -1255,7 +1260,14 @@ static int reiserfs_remount(struct super_block *s, int *mount_flags, char *arg)
1255 reiserfs_xattr_init(s, *mount_flags); 1260 reiserfs_xattr_init(s, *mount_flags);
1256 } 1261 }
1257 1262
1263out_ok:
1264 kfree(s->s_options);
1265 s->s_options = new_opts;
1258 return 0; 1266 return 0;
1267
1268out_err:
1269 kfree(new_opts);
1270 return err;
1259} 1271}
1260 1272
1261static int read_super_block(struct super_block *s, int offset) 1273static int read_super_block(struct super_block *s, int offset)
@@ -1559,6 +1571,8 @@ static int reiserfs_fill_super(struct super_block *s, void *data, int silent)
1559 struct reiserfs_sb_info *sbi; 1571 struct reiserfs_sb_info *sbi;
1560 int errval = -EINVAL; 1572 int errval = -EINVAL;
1561 1573
1574 save_mount_options(s, data);
1575
1562 sbi = kzalloc(sizeof(struct reiserfs_sb_info), GFP_KERNEL); 1576 sbi = kzalloc(sizeof(struct reiserfs_sb_info), GFP_KERNEL);
1563 if (!sbi) { 1577 if (!sbi) {
1564 errval = -ENOMEM; 1578 errval = -ENOMEM;
diff --git a/fs/splice.c b/fs/splice.c
index 4ee49e86edde..14e2262c0a04 100644
--- a/fs/splice.c
+++ b/fs/splice.c
@@ -1179,6 +1179,9 @@ static int copy_from_user_mmap_sem(void *dst, const void __user *src, size_t n)
1179{ 1179{
1180 int partial; 1180 int partial;
1181 1181
1182 if (!access_ok(VERIFY_READ, src, n))
1183 return -EFAULT;
1184
1182 pagefault_disable(); 1185 pagefault_disable();
1183 partial = __copy_from_user_inatomic(dst, src, n); 1186 partial = __copy_from_user_inatomic(dst, src, n);
1184 pagefault_enable(); 1187 pagefault_enable();
@@ -1387,6 +1390,11 @@ static long vmsplice_to_user(struct file *file, const struct iovec __user *iov,
1387 break; 1390 break;
1388 } 1391 }
1389 1392
1393 if (unlikely(!access_ok(VERIFY_WRITE, base, len))) {
1394 error = -EFAULT;
1395 break;
1396 }
1397
1390 sd.len = 0; 1398 sd.len = 0;
1391 sd.total_len = len; 1399 sd.total_len = len;
1392 sd.flags = flags; 1400 sd.flags = flags;
diff --git a/fs/super.c b/fs/super.c
index ceaf2e3d594c..88811f60c8de 100644
--- a/fs/super.c
+++ b/fs/super.c
@@ -105,6 +105,7 @@ static inline void destroy_super(struct super_block *s)
105{ 105{
106 security_sb_free(s); 106 security_sb_free(s);
107 kfree(s->s_subtype); 107 kfree(s->s_subtype);
108 kfree(s->s_options);
108 kfree(s); 109 kfree(s);
109} 110}
110 111
@@ -603,6 +604,7 @@ int do_remount_sb(struct super_block *sb, int flags, void *data, int force)
603 mark_files_ro(sb); 604 mark_files_ro(sb);
604 else if (!fs_may_remount_ro(sb)) 605 else if (!fs_may_remount_ro(sb))
605 return -EBUSY; 606 return -EBUSY;
607 DQUOT_OFF(sb);
606 } 608 }
607 609
608 if (sb->s_op->remount_fs) { 610 if (sb->s_op->remount_fs) {
diff --git a/fs/udf/balloc.c b/fs/udf/balloc.c
index ab26176f6b91..d721a1af1972 100644
--- a/fs/udf/balloc.c
+++ b/fs/udf/balloc.c
@@ -28,15 +28,16 @@
28#include "udf_i.h" 28#include "udf_i.h"
29#include "udf_sb.h" 29#include "udf_sb.h"
30 30
31#define udf_clear_bit(nr,addr) ext2_clear_bit(nr,addr) 31#define udf_clear_bit(nr, addr) ext2_clear_bit(nr, addr)
32#define udf_set_bit(nr,addr) ext2_set_bit(nr,addr) 32#define udf_set_bit(nr, addr) ext2_set_bit(nr, addr)
33#define udf_test_bit(nr, addr) ext2_test_bit(nr, addr) 33#define udf_test_bit(nr, addr) ext2_test_bit(nr, addr)
34#define udf_find_first_one_bit(addr, size) find_first_one_bit(addr, size) 34#define udf_find_first_one_bit(addr, size) find_first_one_bit(addr, size)
35#define udf_find_next_one_bit(addr, size, offset) find_next_one_bit(addr, size, offset) 35#define udf_find_next_one_bit(addr, size, offset) \
36 find_next_one_bit(addr, size, offset)
36 37
37#define leBPL_to_cpup(x) leNUM_to_cpup(BITS_PER_LONG, x) 38#define leBPL_to_cpup(x) leNUM_to_cpup(BITS_PER_LONG, x)
38#define leNUM_to_cpup(x,y) xleNUM_to_cpup(x,y) 39#define leNUM_to_cpup(x, y) xleNUM_to_cpup(x, y)
39#define xleNUM_to_cpup(x,y) (le ## x ## _to_cpup(y)) 40#define xleNUM_to_cpup(x, y) (le ## x ## _to_cpup(y))
40#define uintBPL_t uint(BITS_PER_LONG) 41#define uintBPL_t uint(BITS_PER_LONG)
41#define uint(x) xuint(x) 42#define uint(x) xuint(x)
42#define xuint(x) __le ## x 43#define xuint(x) __le ## x
@@ -62,7 +63,8 @@ static inline int find_next_one_bit(void *addr, int size, int offset)
62 result += BITS_PER_LONG; 63 result += BITS_PER_LONG;
63 } 64 }
64 while (size & ~(BITS_PER_LONG - 1)) { 65 while (size & ~(BITS_PER_LONG - 1)) {
65 if ((tmp = leBPL_to_cpup(p++))) 66 tmp = leBPL_to_cpup(p++);
67 if (tmp)
66 goto found_middle; 68 goto found_middle;
67 result += BITS_PER_LONG; 69 result += BITS_PER_LONG;
68 size -= BITS_PER_LONG; 70 size -= BITS_PER_LONG;
@@ -88,12 +90,12 @@ static int read_block_bitmap(struct super_block *sb,
88 kernel_lb_addr loc; 90 kernel_lb_addr loc;
89 91
90 loc.logicalBlockNum = bitmap->s_extPosition; 92 loc.logicalBlockNum = bitmap->s_extPosition;
91 loc.partitionReferenceNum = UDF_SB_PARTITION(sb); 93 loc.partitionReferenceNum = UDF_SB(sb)->s_partition;
92 94
93 bh = udf_tread(sb, udf_get_lb_pblock(sb, loc, block)); 95 bh = udf_tread(sb, udf_get_lb_pblock(sb, loc, block));
94 if (!bh) { 96 if (!bh)
95 retval = -EIO; 97 retval = -EIO;
96 } 98
97 bitmap->s_block_bitmap[bitmap_nr] = bh; 99 bitmap->s_block_bitmap[bitmap_nr] = bh;
98 return retval; 100 return retval;
99} 101}
@@ -138,6 +140,20 @@ static inline int load_block_bitmap(struct super_block *sb,
138 return slot; 140 return slot;
139} 141}
140 142
143static bool udf_add_free_space(struct udf_sb_info *sbi,
144 u16 partition, u32 cnt)
145{
146 struct logicalVolIntegrityDesc *lvid;
147
148 if (sbi->s_lvid_bh)
149 return false;
150
151 lvid = (struct logicalVolIntegrityDesc *)sbi->s_lvid_bh->b_data;
152 lvid->freeSpaceTable[partition] = cpu_to_le32(le32_to_cpu(
153 lvid->freeSpaceTable[partition]) + cnt);
154 return true;
155}
156
141static void udf_bitmap_free_blocks(struct super_block *sb, 157static void udf_bitmap_free_blocks(struct super_block *sb,
142 struct inode *inode, 158 struct inode *inode,
143 struct udf_bitmap *bitmap, 159 struct udf_bitmap *bitmap,
@@ -155,57 +171,58 @@ static void udf_bitmap_free_blocks(struct super_block *sb,
155 171
156 mutex_lock(&sbi->s_alloc_mutex); 172 mutex_lock(&sbi->s_alloc_mutex);
157 if (bloc.logicalBlockNum < 0 || 173 if (bloc.logicalBlockNum < 0 ||
158 (bloc.logicalBlockNum + count) > UDF_SB_PARTLEN(sb, bloc.partitionReferenceNum)) { 174 (bloc.logicalBlockNum + count) >
175 sbi->s_partmaps[bloc.partitionReferenceNum].s_partition_len) {
159 udf_debug("%d < %d || %d + %d > %d\n", 176 udf_debug("%d < %d || %d + %d > %d\n",
160 bloc.logicalBlockNum, 0, bloc.logicalBlockNum, count, 177 bloc.logicalBlockNum, 0, bloc.logicalBlockNum, count,
161 UDF_SB_PARTLEN(sb, bloc.partitionReferenceNum)); 178 sbi->s_partmaps[bloc.partitionReferenceNum].
179 s_partition_len);
162 goto error_return; 180 goto error_return;
163 } 181 }
164 182
165 block = bloc.logicalBlockNum + offset + (sizeof(struct spaceBitmapDesc) << 3); 183 block = bloc.logicalBlockNum + offset +
184 (sizeof(struct spaceBitmapDesc) << 3);
166 185
167do_more: 186 do {
168 overflow = 0; 187 overflow = 0;
169 block_group = block >> (sb->s_blocksize_bits + 3); 188 block_group = block >> (sb->s_blocksize_bits + 3);
170 bit = block % (sb->s_blocksize << 3); 189 bit = block % (sb->s_blocksize << 3);
171 190
172 /* 191 /*
173 * Check to see if we are freeing blocks across a group boundary. 192 * Check to see if we are freeing blocks across a group boundary.
174 */ 193 */
175 if (bit + count > (sb->s_blocksize << 3)) { 194 if (bit + count > (sb->s_blocksize << 3)) {
176 overflow = bit + count - (sb->s_blocksize << 3); 195 overflow = bit + count - (sb->s_blocksize << 3);
177 count -= overflow; 196 count -= overflow;
178 } 197 }
179 bitmap_nr = load_block_bitmap(sb, bitmap, block_group); 198 bitmap_nr = load_block_bitmap(sb, bitmap, block_group);
180 if (bitmap_nr < 0) 199 if (bitmap_nr < 0)
181 goto error_return; 200 goto error_return;
182 201
183 bh = bitmap->s_block_bitmap[bitmap_nr]; 202 bh = bitmap->s_block_bitmap[bitmap_nr];
184 for (i = 0; i < count; i++) { 203 for (i = 0; i < count; i++) {
185 if (udf_set_bit(bit + i, bh->b_data)) { 204 if (udf_set_bit(bit + i, bh->b_data)) {
186 udf_debug("bit %ld already set\n", bit + i); 205 udf_debug("bit %ld already set\n", bit + i);
187 udf_debug("byte=%2x\n", ((char *)bh->b_data)[(bit + i) >> 3]); 206 udf_debug("byte=%2x\n",
188 } else { 207 ((char *)bh->b_data)[(bit + i) >> 3]);
189 if (inode) 208 } else {
190 DQUOT_FREE_BLOCK(inode, 1); 209 if (inode)
191 if (UDF_SB_LVIDBH(sb)) { 210 DQUOT_FREE_BLOCK(inode, 1);
192 UDF_SB_LVID(sb)->freeSpaceTable[UDF_SB_PARTITION(sb)] = 211 udf_add_free_space(sbi, sbi->s_partition, 1);
193 cpu_to_le32(le32_to_cpu(UDF_SB_LVID(sb)->freeSpaceTable[UDF_SB_PARTITION(sb)]) + 1);
194 } 212 }
195 } 213 }
196 } 214 mark_buffer_dirty(bh);
197 mark_buffer_dirty(bh); 215 if (overflow) {
198 if (overflow) { 216 block += count;
199 block += count; 217 count = overflow;
200 count = overflow; 218 }
201 goto do_more; 219 } while (overflow);
202 } 220
203error_return: 221error_return:
204 sb->s_dirt = 1; 222 sb->s_dirt = 1;
205 if (UDF_SB_LVIDBH(sb)) 223 if (sbi->s_lvid_bh)
206 mark_buffer_dirty(UDF_SB_LVIDBH(sb)); 224 mark_buffer_dirty(sbi->s_lvid_bh);
207 mutex_unlock(&sbi->s_alloc_mutex); 225 mutex_unlock(&sbi->s_alloc_mutex);
208 return;
209} 226}
210 227
211static int udf_bitmap_prealloc_blocks(struct super_block *sb, 228static int udf_bitmap_prealloc_blocks(struct super_block *sb,
@@ -219,53 +236,50 @@ static int udf_bitmap_prealloc_blocks(struct super_block *sb,
219 int bit, block, block_group, group_start; 236 int bit, block, block_group, group_start;
220 int nr_groups, bitmap_nr; 237 int nr_groups, bitmap_nr;
221 struct buffer_head *bh; 238 struct buffer_head *bh;
239 __u32 part_len;
222 240
223 mutex_lock(&sbi->s_alloc_mutex); 241 mutex_lock(&sbi->s_alloc_mutex);
224 if (first_block < 0 || first_block >= UDF_SB_PARTLEN(sb, partition)) 242 part_len = sbi->s_partmaps[partition].s_partition_len;
243 if (first_block < 0 || first_block >= part_len)
225 goto out; 244 goto out;
226 245
227 if (first_block + block_count > UDF_SB_PARTLEN(sb, partition)) 246 if (first_block + block_count > part_len)
228 block_count = UDF_SB_PARTLEN(sb, partition) - first_block; 247 block_count = part_len - first_block;
229 248
230repeat: 249 do {
231 nr_groups = (UDF_SB_PARTLEN(sb, partition) + 250 nr_groups = udf_compute_nr_groups(sb, partition);
232 (sizeof(struct spaceBitmapDesc) << 3) + 251 block = first_block + (sizeof(struct spaceBitmapDesc) << 3);
233 (sb->s_blocksize * 8) - 1) / (sb->s_blocksize * 8); 252 block_group = block >> (sb->s_blocksize_bits + 3);
234 block = first_block + (sizeof(struct spaceBitmapDesc) << 3); 253 group_start = block_group ? 0 : sizeof(struct spaceBitmapDesc);
235 block_group = block >> (sb->s_blocksize_bits + 3);
236 group_start = block_group ? 0 : sizeof(struct spaceBitmapDesc);
237 254
238 bitmap_nr = load_block_bitmap(sb, bitmap, block_group); 255 bitmap_nr = load_block_bitmap(sb, bitmap, block_group);
239 if (bitmap_nr < 0) 256 if (bitmap_nr < 0)
240 goto out; 257 goto out;
241 bh = bitmap->s_block_bitmap[bitmap_nr]; 258 bh = bitmap->s_block_bitmap[bitmap_nr];
242 259
243 bit = block % (sb->s_blocksize << 3); 260 bit = block % (sb->s_blocksize << 3);
244 261
245 while (bit < (sb->s_blocksize << 3) && block_count > 0) { 262 while (bit < (sb->s_blocksize << 3) && block_count > 0) {
246 if (!udf_test_bit(bit, bh->b_data)) { 263 if (!udf_test_bit(bit, bh->b_data))
247 goto out; 264 goto out;
248 } else if (DQUOT_PREALLOC_BLOCK(inode, 1)) { 265 else if (DQUOT_PREALLOC_BLOCK(inode, 1))
249 goto out; 266 goto out;
250 } else if (!udf_clear_bit(bit, bh->b_data)) { 267 else if (!udf_clear_bit(bit, bh->b_data)) {
251 udf_debug("bit already cleared for block %d\n", bit); 268 udf_debug("bit already cleared for block %d\n", bit);
252 DQUOT_FREE_BLOCK(inode, 1); 269 DQUOT_FREE_BLOCK(inode, 1);
253 goto out; 270 goto out;
271 }
272 block_count--;
273 alloc_count++;
274 bit++;
275 block++;
254 } 276 }
255 block_count--; 277 mark_buffer_dirty(bh);
256 alloc_count++; 278 } while (block_count > 0);
257 bit++; 279
258 block++;
259 }
260 mark_buffer_dirty(bh);
261 if (block_count > 0)
262 goto repeat;
263out: 280out:
264 if (UDF_SB_LVIDBH(sb)) { 281 if (udf_add_free_space(sbi, partition, -alloc_count))
265 UDF_SB_LVID(sb)->freeSpaceTable[partition] = 282 mark_buffer_dirty(sbi->s_lvid_bh);
266 cpu_to_le32(le32_to_cpu(UDF_SB_LVID(sb)->freeSpaceTable[partition]) - alloc_count);
267 mark_buffer_dirty(UDF_SB_LVIDBH(sb));
268 }
269 sb->s_dirt = 1; 283 sb->s_dirt = 1;
270 mutex_unlock(&sbi->s_alloc_mutex); 284 mutex_unlock(&sbi->s_alloc_mutex);
271 return alloc_count; 285 return alloc_count;
@@ -287,7 +301,7 @@ static int udf_bitmap_new_block(struct super_block *sb,
287 mutex_lock(&sbi->s_alloc_mutex); 301 mutex_lock(&sbi->s_alloc_mutex);
288 302
289repeat: 303repeat:
290 if (goal < 0 || goal >= UDF_SB_PARTLEN(sb, partition)) 304 if (goal < 0 || goal >= sbi->s_partmaps[partition].s_partition_len)
291 goal = 0; 305 goal = 0;
292 306
293 nr_groups = bitmap->s_nr_groups; 307 nr_groups = bitmap->s_nr_groups;
@@ -312,14 +326,16 @@ repeat:
312 if (bit < end_goal) 326 if (bit < end_goal)
313 goto got_block; 327 goto got_block;
314 328
315 ptr = memscan((char *)bh->b_data + (bit >> 3), 0xFF, sb->s_blocksize - ((bit + 7) >> 3)); 329 ptr = memscan((char *)bh->b_data + (bit >> 3), 0xFF,
330 sb->s_blocksize - ((bit + 7) >> 3));
316 newbit = (ptr - ((char *)bh->b_data)) << 3; 331 newbit = (ptr - ((char *)bh->b_data)) << 3;
317 if (newbit < sb->s_blocksize << 3) { 332 if (newbit < sb->s_blocksize << 3) {
318 bit = newbit; 333 bit = newbit;
319 goto search_back; 334 goto search_back;
320 } 335 }
321 336
322 newbit = udf_find_next_one_bit(bh->b_data, sb->s_blocksize << 3, bit); 337 newbit = udf_find_next_one_bit(bh->b_data,
338 sb->s_blocksize << 3, bit);
323 if (newbit < sb->s_blocksize << 3) { 339 if (newbit < sb->s_blocksize << 3) {
324 bit = newbit; 340 bit = newbit;
325 goto got_block; 341 goto got_block;
@@ -358,15 +374,20 @@ repeat:
358 if (bit < sb->s_blocksize << 3) 374 if (bit < sb->s_blocksize << 3)
359 goto search_back; 375 goto search_back;
360 else 376 else
361 bit = udf_find_next_one_bit(bh->b_data, sb->s_blocksize << 3, group_start << 3); 377 bit = udf_find_next_one_bit(bh->b_data, sb->s_blocksize << 3,
378 group_start << 3);
362 if (bit >= sb->s_blocksize << 3) { 379 if (bit >= sb->s_blocksize << 3) {
363 mutex_unlock(&sbi->s_alloc_mutex); 380 mutex_unlock(&sbi->s_alloc_mutex);
364 return 0; 381 return 0;
365 } 382 }
366 383
367search_back: 384search_back:
368 for (i = 0; i < 7 && bit > (group_start << 3) && udf_test_bit(bit - 1, bh->b_data); i++, bit--) 385 i = 0;
369 ; /* empty loop */ 386 while (i < 7 && bit > (group_start << 3) &&
387 udf_test_bit(bit - 1, bh->b_data)) {
388 ++i;
389 --bit;
390 }
370 391
371got_block: 392got_block:
372 393
@@ -389,11 +410,8 @@ got_block:
389 410
390 mark_buffer_dirty(bh); 411 mark_buffer_dirty(bh);
391 412
392 if (UDF_SB_LVIDBH(sb)) { 413 if (udf_add_free_space(sbi, partition, -1))
393 UDF_SB_LVID(sb)->freeSpaceTable[partition] = 414 mark_buffer_dirty(sbi->s_lvid_bh);
394 cpu_to_le32(le32_to_cpu(UDF_SB_LVID(sb)->freeSpaceTable[partition]) - 1);
395 mark_buffer_dirty(UDF_SB_LVIDBH(sb));
396 }
397 sb->s_dirt = 1; 415 sb->s_dirt = 1;
398 mutex_unlock(&sbi->s_alloc_mutex); 416 mutex_unlock(&sbi->s_alloc_mutex);
399 *err = 0; 417 *err = 0;
@@ -418,56 +436,70 @@ static void udf_table_free_blocks(struct super_block *sb,
418 struct extent_position oepos, epos; 436 struct extent_position oepos, epos;
419 int8_t etype; 437 int8_t etype;
420 int i; 438 int i;
439 struct udf_inode_info *iinfo;
421 440
422 mutex_lock(&sbi->s_alloc_mutex); 441 mutex_lock(&sbi->s_alloc_mutex);
423 if (bloc.logicalBlockNum < 0 || 442 if (bloc.logicalBlockNum < 0 ||
424 (bloc.logicalBlockNum + count) > UDF_SB_PARTLEN(sb, bloc.partitionReferenceNum)) { 443 (bloc.logicalBlockNum + count) >
444 sbi->s_partmaps[bloc.partitionReferenceNum].s_partition_len) {
425 udf_debug("%d < %d || %d + %d > %d\n", 445 udf_debug("%d < %d || %d + %d > %d\n",
426 bloc.logicalBlockNum, 0, bloc.logicalBlockNum, count, 446 bloc.logicalBlockNum, 0, bloc.logicalBlockNum, count,
427 UDF_SB_PARTLEN(sb, bloc.partitionReferenceNum)); 447 sbi->s_partmaps[bloc.partitionReferenceNum].
448 s_partition_len);
428 goto error_return; 449 goto error_return;
429 } 450 }
430 451
431 /* We do this up front - There are some error conditions that could occure, 452 iinfo = UDF_I(table);
432 but.. oh well */ 453 /* We do this up front - There are some error conditions that
454 could occure, but.. oh well */
433 if (inode) 455 if (inode)
434 DQUOT_FREE_BLOCK(inode, count); 456 DQUOT_FREE_BLOCK(inode, count);
435 if (UDF_SB_LVIDBH(sb)) { 457 if (udf_add_free_space(sbi, sbi->s_partition, count))
436 UDF_SB_LVID(sb)->freeSpaceTable[UDF_SB_PARTITION(sb)] = 458 mark_buffer_dirty(sbi->s_lvid_bh);
437 cpu_to_le32(le32_to_cpu(UDF_SB_LVID(sb)->freeSpaceTable[UDF_SB_PARTITION(sb)]) + count);
438 mark_buffer_dirty(UDF_SB_LVIDBH(sb));
439 }
440 459
441 start = bloc.logicalBlockNum + offset; 460 start = bloc.logicalBlockNum + offset;
442 end = bloc.logicalBlockNum + offset + count - 1; 461 end = bloc.logicalBlockNum + offset + count - 1;
443 462
444 epos.offset = oepos.offset = sizeof(struct unallocSpaceEntry); 463 epos.offset = oepos.offset = sizeof(struct unallocSpaceEntry);
445 elen = 0; 464 elen = 0;
446 epos.block = oepos.block = UDF_I_LOCATION(table); 465 epos.block = oepos.block = iinfo->i_location;
447 epos.bh = oepos.bh = NULL; 466 epos.bh = oepos.bh = NULL;
448 467
449 while (count && 468 while (count &&
450 (etype = udf_next_aext(table, &epos, &eloc, &elen, 1)) != -1) { 469 (etype = udf_next_aext(table, &epos, &eloc, &elen, 1)) != -1) {
451 if (((eloc.logicalBlockNum + (elen >> sb->s_blocksize_bits)) == start)) { 470 if (((eloc.logicalBlockNum +
452 if ((0x3FFFFFFF - elen) < (count << sb->s_blocksize_bits)) { 471 (elen >> sb->s_blocksize_bits)) == start)) {
453 count -= ((0x3FFFFFFF - elen) >> sb->s_blocksize_bits); 472 if ((0x3FFFFFFF - elen) <
454 start += ((0x3FFFFFFF - elen) >> sb->s_blocksize_bits); 473 (count << sb->s_blocksize_bits)) {
455 elen = (etype << 30) | (0x40000000 - sb->s_blocksize); 474 uint32_t tmp = ((0x3FFFFFFF - elen) >>
475 sb->s_blocksize_bits);
476 count -= tmp;
477 start += tmp;
478 elen = (etype << 30) |
479 (0x40000000 - sb->s_blocksize);
456 } else { 480 } else {
457 elen = (etype << 30) | (elen + (count << sb->s_blocksize_bits)); 481 elen = (etype << 30) |
482 (elen +
483 (count << sb->s_blocksize_bits));
458 start += count; 484 start += count;
459 count = 0; 485 count = 0;
460 } 486 }
461 udf_write_aext(table, &oepos, eloc, elen, 1); 487 udf_write_aext(table, &oepos, eloc, elen, 1);
462 } else if (eloc.logicalBlockNum == (end + 1)) { 488 } else if (eloc.logicalBlockNum == (end + 1)) {
463 if ((0x3FFFFFFF - elen) < (count << sb->s_blocksize_bits)) { 489 if ((0x3FFFFFFF - elen) <
464 count -= ((0x3FFFFFFF - elen) >> sb->s_blocksize_bits); 490 (count << sb->s_blocksize_bits)) {
465 end -= ((0x3FFFFFFF - elen) >> sb->s_blocksize_bits); 491 uint32_t tmp = ((0x3FFFFFFF - elen) >>
466 eloc.logicalBlockNum -= ((0x3FFFFFFF - elen) >> sb->s_blocksize_bits); 492 sb->s_blocksize_bits);
467 elen = (etype << 30) | (0x40000000 - sb->s_blocksize); 493 count -= tmp;
494 end -= tmp;
495 eloc.logicalBlockNum -= tmp;
496 elen = (etype << 30) |
497 (0x40000000 - sb->s_blocksize);
468 } else { 498 } else {
469 eloc.logicalBlockNum = start; 499 eloc.logicalBlockNum = start;
470 elen = (etype << 30) | (elen + (count << sb->s_blocksize_bits)); 500 elen = (etype << 30) |
501 (elen +
502 (count << sb->s_blocksize_bits));
471 end -= count; 503 end -= count;
472 count = 0; 504 count = 0;
473 } 505 }
@@ -488,9 +520,9 @@ static void udf_table_free_blocks(struct super_block *sb,
488 520
489 if (count) { 521 if (count) {
490 /* 522 /*
491 * NOTE: we CANNOT use udf_add_aext here, as it can try to allocate 523 * NOTE: we CANNOT use udf_add_aext here, as it can try to
492 * a new block, and since we hold the super block lock already 524 * allocate a new block, and since we hold the super block
493 * very bad things would happen :) 525 * lock already very bad things would happen :)
494 * 526 *
495 * We copy the behavior of udf_add_aext, but instead of 527 * We copy the behavior of udf_add_aext, but instead of
496 * trying to allocate a new block close to the existing one, 528 * trying to allocate a new block close to the existing one,
@@ -509,11 +541,11 @@ static void udf_table_free_blocks(struct super_block *sb,
509 elen = EXT_RECORDED_ALLOCATED | 541 elen = EXT_RECORDED_ALLOCATED |
510 (count << sb->s_blocksize_bits); 542 (count << sb->s_blocksize_bits);
511 543
512 if (UDF_I_ALLOCTYPE(table) == ICBTAG_FLAG_AD_SHORT) { 544 if (iinfo->i_alloc_type == ICBTAG_FLAG_AD_SHORT)
513 adsize = sizeof(short_ad); 545 adsize = sizeof(short_ad);
514 } else if (UDF_I_ALLOCTYPE(table) == ICBTAG_FLAG_AD_LONG) { 546 else if (iinfo->i_alloc_type == ICBTAG_FLAG_AD_LONG)
515 adsize = sizeof(long_ad); 547 adsize = sizeof(long_ad);
516 } else { 548 else {
517 brelse(oepos.bh); 549 brelse(oepos.bh);
518 brelse(epos.bh); 550 brelse(epos.bh);
519 goto error_return; 551 goto error_return;
@@ -531,56 +563,70 @@ static void udf_table_free_blocks(struct super_block *sb,
531 eloc.logicalBlockNum++; 563 eloc.logicalBlockNum++;
532 elen -= sb->s_blocksize; 564 elen -= sb->s_blocksize;
533 565
534 if (!(epos.bh = udf_tread(sb, udf_get_lb_pblock(sb, epos.block, 0)))) { 566 epos.bh = udf_tread(sb,
567 udf_get_lb_pblock(sb, epos.block, 0));
568 if (!epos.bh) {
535 brelse(oepos.bh); 569 brelse(oepos.bh);
536 goto error_return; 570 goto error_return;
537 } 571 }
538 aed = (struct allocExtDesc *)(epos.bh->b_data); 572 aed = (struct allocExtDesc *)(epos.bh->b_data);
539 aed->previousAllocExtLocation = cpu_to_le32(oepos.block.logicalBlockNum); 573 aed->previousAllocExtLocation =
574 cpu_to_le32(oepos.block.logicalBlockNum);
540 if (epos.offset + adsize > sb->s_blocksize) { 575 if (epos.offset + adsize > sb->s_blocksize) {
541 loffset = epos.offset; 576 loffset = epos.offset;
542 aed->lengthAllocDescs = cpu_to_le32(adsize); 577 aed->lengthAllocDescs = cpu_to_le32(adsize);
543 sptr = UDF_I_DATA(table) + epos.offset - adsize; 578 sptr = iinfo->i_ext.i_data + epos.offset
544 dptr = epos.bh->b_data + sizeof(struct allocExtDesc); 579 - adsize;
580 dptr = epos.bh->b_data +
581 sizeof(struct allocExtDesc);
545 memcpy(dptr, sptr, adsize); 582 memcpy(dptr, sptr, adsize);
546 epos.offset = sizeof(struct allocExtDesc) + adsize; 583 epos.offset = sizeof(struct allocExtDesc) +
584 adsize;
547 } else { 585 } else {
548 loffset = epos.offset + adsize; 586 loffset = epos.offset + adsize;
549 aed->lengthAllocDescs = cpu_to_le32(0); 587 aed->lengthAllocDescs = cpu_to_le32(0);
550 if (oepos.bh) { 588 if (oepos.bh) {
551 sptr = oepos.bh->b_data + epos.offset; 589 sptr = oepos.bh->b_data + epos.offset;
552 aed = (struct allocExtDesc *)oepos.bh->b_data; 590 aed = (struct allocExtDesc *)
591 oepos.bh->b_data;
553 aed->lengthAllocDescs = 592 aed->lengthAllocDescs =
554 cpu_to_le32(le32_to_cpu(aed->lengthAllocDescs) + adsize); 593 cpu_to_le32(le32_to_cpu(
594 aed->lengthAllocDescs) +
595 adsize);
555 } else { 596 } else {
556 sptr = UDF_I_DATA(table) + epos.offset; 597 sptr = iinfo->i_ext.i_data +
557 UDF_I_LENALLOC(table) += adsize; 598 epos.offset;
599 iinfo->i_lenAlloc += adsize;
558 mark_inode_dirty(table); 600 mark_inode_dirty(table);
559 } 601 }
560 epos.offset = sizeof(struct allocExtDesc); 602 epos.offset = sizeof(struct allocExtDesc);
561 } 603 }
562 if (UDF_SB_UDFREV(sb) >= 0x0200) 604 if (sbi->s_udfrev >= 0x0200)
563 udf_new_tag(epos.bh->b_data, TAG_IDENT_AED, 3, 1, 605 udf_new_tag(epos.bh->b_data, TAG_IDENT_AED,
564 epos.block.logicalBlockNum, sizeof(tag)); 606 3, 1, epos.block.logicalBlockNum,
607 sizeof(tag));
565 else 608 else
566 udf_new_tag(epos.bh->b_data, TAG_IDENT_AED, 2, 1, 609 udf_new_tag(epos.bh->b_data, TAG_IDENT_AED,
567 epos.block.logicalBlockNum, sizeof(tag)); 610 2, 1, epos.block.logicalBlockNum,
568 611 sizeof(tag));
569 switch (UDF_I_ALLOCTYPE(table)) { 612
570 case ICBTAG_FLAG_AD_SHORT: 613 switch (iinfo->i_alloc_type) {
571 sad = (short_ad *)sptr; 614 case ICBTAG_FLAG_AD_SHORT:
572 sad->extLength = cpu_to_le32( 615 sad = (short_ad *)sptr;
573 EXT_NEXT_EXTENT_ALLOCDECS | 616 sad->extLength = cpu_to_le32(
574 sb->s_blocksize); 617 EXT_NEXT_EXTENT_ALLOCDECS |
575 sad->extPosition = cpu_to_le32(epos.block.logicalBlockNum); 618 sb->s_blocksize);
576 break; 619 sad->extPosition =
577 case ICBTAG_FLAG_AD_LONG: 620 cpu_to_le32(epos.block.logicalBlockNum);
578 lad = (long_ad *)sptr; 621 break;
579 lad->extLength = cpu_to_le32( 622 case ICBTAG_FLAG_AD_LONG:
580 EXT_NEXT_EXTENT_ALLOCDECS | 623 lad = (long_ad *)sptr;
581 sb->s_blocksize); 624 lad->extLength = cpu_to_le32(
582 lad->extLocation = cpu_to_lelb(epos.block); 625 EXT_NEXT_EXTENT_ALLOCDECS |
583 break; 626 sb->s_blocksize);
627 lad->extLocation =
628 cpu_to_lelb(epos.block);
629 break;
584 } 630 }
585 if (oepos.bh) { 631 if (oepos.bh) {
586 udf_update_tag(oepos.bh->b_data, loffset); 632 udf_update_tag(oepos.bh->b_data, loffset);
@@ -590,16 +636,18 @@ static void udf_table_free_blocks(struct super_block *sb,
590 } 636 }
591 } 637 }
592 638
593 if (elen) { /* It's possible that stealing the block emptied the extent */ 639 /* It's possible that stealing the block emptied the extent */
640 if (elen) {
594 udf_write_aext(table, &epos, eloc, elen, 1); 641 udf_write_aext(table, &epos, eloc, elen, 1);
595 642
596 if (!epos.bh) { 643 if (!epos.bh) {
597 UDF_I_LENALLOC(table) += adsize; 644 iinfo->i_lenAlloc += adsize;
598 mark_inode_dirty(table); 645 mark_inode_dirty(table);
599 } else { 646 } else {
600 aed = (struct allocExtDesc *)epos.bh->b_data; 647 aed = (struct allocExtDesc *)epos.bh->b_data;
601 aed->lengthAllocDescs = 648 aed->lengthAllocDescs =
602 cpu_to_le32(le32_to_cpu(aed->lengthAllocDescs) + adsize); 649 cpu_to_le32(le32_to_cpu(
650 aed->lengthAllocDescs) + adsize);
603 udf_update_tag(epos.bh->b_data, epos.offset); 651 udf_update_tag(epos.bh->b_data, epos.offset);
604 mark_buffer_dirty(epos.bh); 652 mark_buffer_dirty(epos.bh);
605 } 653 }
@@ -626,20 +674,23 @@ static int udf_table_prealloc_blocks(struct super_block *sb,
626 kernel_lb_addr eloc; 674 kernel_lb_addr eloc;
627 struct extent_position epos; 675 struct extent_position epos;
628 int8_t etype = -1; 676 int8_t etype = -1;
677 struct udf_inode_info *iinfo;
629 678
630 if (first_block < 0 || first_block >= UDF_SB_PARTLEN(sb, partition)) 679 if (first_block < 0 ||
680 first_block >= sbi->s_partmaps[partition].s_partition_len)
631 return 0; 681 return 0;
632 682
633 if (UDF_I_ALLOCTYPE(table) == ICBTAG_FLAG_AD_SHORT) 683 iinfo = UDF_I(table);
684 if (iinfo->i_alloc_type == ICBTAG_FLAG_AD_SHORT)
634 adsize = sizeof(short_ad); 685 adsize = sizeof(short_ad);
635 else if (UDF_I_ALLOCTYPE(table) == ICBTAG_FLAG_AD_LONG) 686 else if (iinfo->i_alloc_type == ICBTAG_FLAG_AD_LONG)
636 adsize = sizeof(long_ad); 687 adsize = sizeof(long_ad);
637 else 688 else
638 return 0; 689 return 0;
639 690
640 mutex_lock(&sbi->s_alloc_mutex); 691 mutex_lock(&sbi->s_alloc_mutex);
641 epos.offset = sizeof(struct unallocSpaceEntry); 692 epos.offset = sizeof(struct unallocSpaceEntry);
642 epos.block = UDF_I_LOCATION(table); 693 epos.block = iinfo->i_location;
643 epos.bh = NULL; 694 epos.bh = NULL;
644 eloc.logicalBlockNum = 0xFFFFFFFF; 695 eloc.logicalBlockNum = 0xFFFFFFFF;
645 696
@@ -654,26 +705,26 @@ static int udf_table_prealloc_blocks(struct super_block *sb,
654 epos.offset -= adsize; 705 epos.offset -= adsize;
655 706
656 alloc_count = (elen >> sb->s_blocksize_bits); 707 alloc_count = (elen >> sb->s_blocksize_bits);
657 if (inode && DQUOT_PREALLOC_BLOCK(inode, alloc_count > block_count ? block_count : alloc_count)) { 708 if (inode && DQUOT_PREALLOC_BLOCK(inode,
709 alloc_count > block_count ? block_count : alloc_count))
658 alloc_count = 0; 710 alloc_count = 0;
659 } else if (alloc_count > block_count) { 711 else if (alloc_count > block_count) {
660 alloc_count = block_count; 712 alloc_count = block_count;
661 eloc.logicalBlockNum += alloc_count; 713 eloc.logicalBlockNum += alloc_count;
662 elen -= (alloc_count << sb->s_blocksize_bits); 714 elen -= (alloc_count << sb->s_blocksize_bits);
663 udf_write_aext(table, &epos, eloc, (etype << 30) | elen, 1); 715 udf_write_aext(table, &epos, eloc,
664 } else { 716 (etype << 30) | elen, 1);
665 udf_delete_aext(table, epos, eloc, (etype << 30) | elen); 717 } else
666 } 718 udf_delete_aext(table, epos, eloc,
719 (etype << 30) | elen);
667 } else { 720 } else {
668 alloc_count = 0; 721 alloc_count = 0;
669 } 722 }
670 723
671 brelse(epos.bh); 724 brelse(epos.bh);
672 725
673 if (alloc_count && UDF_SB_LVIDBH(sb)) { 726 if (alloc_count && udf_add_free_space(sbi, partition, -alloc_count)) {
674 UDF_SB_LVID(sb)->freeSpaceTable[partition] = 727 mark_buffer_dirty(sbi->s_lvid_bh);
675 cpu_to_le32(le32_to_cpu(UDF_SB_LVID(sb)->freeSpaceTable[partition]) - alloc_count);
676 mark_buffer_dirty(UDF_SB_LVIDBH(sb));
677 sb->s_dirt = 1; 728 sb->s_dirt = 1;
678 } 729 }
679 mutex_unlock(&sbi->s_alloc_mutex); 730 mutex_unlock(&sbi->s_alloc_mutex);
@@ -692,33 +743,35 @@ static int udf_table_new_block(struct super_block *sb,
692 kernel_lb_addr eloc, uninitialized_var(goal_eloc); 743 kernel_lb_addr eloc, uninitialized_var(goal_eloc);
693 struct extent_position epos, goal_epos; 744 struct extent_position epos, goal_epos;
694 int8_t etype; 745 int8_t etype;
746 struct udf_inode_info *iinfo = UDF_I(table);
695 747
696 *err = -ENOSPC; 748 *err = -ENOSPC;
697 749
698 if (UDF_I_ALLOCTYPE(table) == ICBTAG_FLAG_AD_SHORT) 750 if (iinfo->i_alloc_type == ICBTAG_FLAG_AD_SHORT)
699 adsize = sizeof(short_ad); 751 adsize = sizeof(short_ad);
700 else if (UDF_I_ALLOCTYPE(table) == ICBTAG_FLAG_AD_LONG) 752 else if (iinfo->i_alloc_type == ICBTAG_FLAG_AD_LONG)
701 adsize = sizeof(long_ad); 753 adsize = sizeof(long_ad);
702 else 754 else
703 return newblock; 755 return newblock;
704 756
705 mutex_lock(&sbi->s_alloc_mutex); 757 mutex_lock(&sbi->s_alloc_mutex);
706 if (goal < 0 || goal >= UDF_SB_PARTLEN(sb, partition)) 758 if (goal < 0 || goal >= sbi->s_partmaps[partition].s_partition_len)
707 goal = 0; 759 goal = 0;
708 760
709 /* We search for the closest matching block to goal. If we find a exact hit, 761 /* We search for the closest matching block to goal. If we find
710 we stop. Otherwise we keep going till we run out of extents. 762 a exact hit, we stop. Otherwise we keep going till we run out
711 We store the buffer_head, bloc, and extoffset of the current closest 763 of extents. We store the buffer_head, bloc, and extoffset
712 match and use that when we are done. 764 of the current closest match and use that when we are done.
713 */ 765 */
714 epos.offset = sizeof(struct unallocSpaceEntry); 766 epos.offset = sizeof(struct unallocSpaceEntry);
715 epos.block = UDF_I_LOCATION(table); 767 epos.block = iinfo->i_location;
716 epos.bh = goal_epos.bh = NULL; 768 epos.bh = goal_epos.bh = NULL;
717 769
718 while (spread && 770 while (spread &&
719 (etype = udf_next_aext(table, &epos, &eloc, &elen, 1)) != -1) { 771 (etype = udf_next_aext(table, &epos, &eloc, &elen, 1)) != -1) {
720 if (goal >= eloc.logicalBlockNum) { 772 if (goal >= eloc.logicalBlockNum) {
721 if (goal < eloc.logicalBlockNum + (elen >> sb->s_blocksize_bits)) 773 if (goal < eloc.logicalBlockNum +
774 (elen >> sb->s_blocksize_bits))
722 nspread = 0; 775 nspread = 0;
723 else 776 else
724 nspread = goal - eloc.logicalBlockNum - 777 nspread = goal - eloc.logicalBlockNum -
@@ -771,11 +824,8 @@ static int udf_table_new_block(struct super_block *sb,
771 udf_delete_aext(table, goal_epos, goal_eloc, goal_elen); 824 udf_delete_aext(table, goal_epos, goal_eloc, goal_elen);
772 brelse(goal_epos.bh); 825 brelse(goal_epos.bh);
773 826
774 if (UDF_SB_LVIDBH(sb)) { 827 if (udf_add_free_space(sbi, partition, -1))
775 UDF_SB_LVID(sb)->freeSpaceTable[partition] = 828 mark_buffer_dirty(sbi->s_lvid_bh);
776 cpu_to_le32(le32_to_cpu(UDF_SB_LVID(sb)->freeSpaceTable[partition]) - 1);
777 mark_buffer_dirty(UDF_SB_LVIDBH(sb));
778 }
779 829
780 sb->s_dirt = 1; 830 sb->s_dirt = 1;
781 mutex_unlock(&sbi->s_alloc_mutex); 831 mutex_unlock(&sbi->s_alloc_mutex);
@@ -789,22 +839,23 @@ inline void udf_free_blocks(struct super_block *sb,
789 uint32_t count) 839 uint32_t count)
790{ 840{
791 uint16_t partition = bloc.partitionReferenceNum; 841 uint16_t partition = bloc.partitionReferenceNum;
842 struct udf_part_map *map = &UDF_SB(sb)->s_partmaps[partition];
792 843
793 if (UDF_SB_PARTFLAGS(sb, partition) & UDF_PART_FLAG_UNALLOC_BITMAP) { 844 if (map->s_partition_flags & UDF_PART_FLAG_UNALLOC_BITMAP) {
794 return udf_bitmap_free_blocks(sb, inode, 845 return udf_bitmap_free_blocks(sb, inode,
795 UDF_SB_PARTMAPS(sb)[partition].s_uspace.s_bitmap, 846 map->s_uspace.s_bitmap,
796 bloc, offset, count); 847 bloc, offset, count);
797 } else if (UDF_SB_PARTFLAGS(sb, partition) & UDF_PART_FLAG_UNALLOC_TABLE) { 848 } else if (map->s_partition_flags & UDF_PART_FLAG_UNALLOC_TABLE) {
798 return udf_table_free_blocks(sb, inode, 849 return udf_table_free_blocks(sb, inode,
799 UDF_SB_PARTMAPS(sb)[partition].s_uspace.s_table, 850 map->s_uspace.s_table,
800 bloc, offset, count); 851 bloc, offset, count);
801 } else if (UDF_SB_PARTFLAGS(sb, partition) & UDF_PART_FLAG_FREED_BITMAP) { 852 } else if (map->s_partition_flags & UDF_PART_FLAG_FREED_BITMAP) {
802 return udf_bitmap_free_blocks(sb, inode, 853 return udf_bitmap_free_blocks(sb, inode,
803 UDF_SB_PARTMAPS(sb)[partition].s_fspace.s_bitmap, 854 map->s_fspace.s_bitmap,
804 bloc, offset, count); 855 bloc, offset, count);
805 } else if (UDF_SB_PARTFLAGS(sb, partition) & UDF_PART_FLAG_FREED_TABLE) { 856 } else if (map->s_partition_flags & UDF_PART_FLAG_FREED_TABLE) {
806 return udf_table_free_blocks(sb, inode, 857 return udf_table_free_blocks(sb, inode,
807 UDF_SB_PARTMAPS(sb)[partition].s_fspace.s_table, 858 map->s_fspace.s_table,
808 bloc, offset, count); 859 bloc, offset, count);
809 } else { 860 } else {
810 return; 861 return;
@@ -816,51 +867,55 @@ inline int udf_prealloc_blocks(struct super_block *sb,
816 uint16_t partition, uint32_t first_block, 867 uint16_t partition, uint32_t first_block,
817 uint32_t block_count) 868 uint32_t block_count)
818{ 869{
819 if (UDF_SB_PARTFLAGS(sb, partition) & UDF_PART_FLAG_UNALLOC_BITMAP) { 870 struct udf_part_map *map = &UDF_SB(sb)->s_partmaps[partition];
871
872 if (map->s_partition_flags & UDF_PART_FLAG_UNALLOC_BITMAP)
820 return udf_bitmap_prealloc_blocks(sb, inode, 873 return udf_bitmap_prealloc_blocks(sb, inode,
821 UDF_SB_PARTMAPS(sb)[partition].s_uspace.s_bitmap, 874 map->s_uspace.s_bitmap,
822 partition, first_block, block_count); 875 partition, first_block,
823 } else if (UDF_SB_PARTFLAGS(sb, partition) & UDF_PART_FLAG_UNALLOC_TABLE) { 876 block_count);
877 else if (map->s_partition_flags & UDF_PART_FLAG_UNALLOC_TABLE)
824 return udf_table_prealloc_blocks(sb, inode, 878 return udf_table_prealloc_blocks(sb, inode,
825 UDF_SB_PARTMAPS(sb)[partition].s_uspace.s_table, 879 map->s_uspace.s_table,
826 partition, first_block, block_count); 880 partition, first_block,
827 } else if (UDF_SB_PARTFLAGS(sb, partition) & UDF_PART_FLAG_FREED_BITMAP) { 881 block_count);
882 else if (map->s_partition_flags & UDF_PART_FLAG_FREED_BITMAP)
828 return udf_bitmap_prealloc_blocks(sb, inode, 883 return udf_bitmap_prealloc_blocks(sb, inode,
829 UDF_SB_PARTMAPS(sb)[partition].s_fspace.s_bitmap, 884 map->s_fspace.s_bitmap,
830 partition, first_block, block_count); 885 partition, first_block,
831 } else if (UDF_SB_PARTFLAGS(sb, partition) & UDF_PART_FLAG_FREED_TABLE) { 886 block_count);
887 else if (map->s_partition_flags & UDF_PART_FLAG_FREED_TABLE)
832 return udf_table_prealloc_blocks(sb, inode, 888 return udf_table_prealloc_blocks(sb, inode,
833 UDF_SB_PARTMAPS(sb)[partition].s_fspace.s_table, 889 map->s_fspace.s_table,
834 partition, first_block, block_count); 890 partition, first_block,
835 } else { 891 block_count);
892 else
836 return 0; 893 return 0;
837 }
838} 894}
839 895
840inline int udf_new_block(struct super_block *sb, 896inline int udf_new_block(struct super_block *sb,
841 struct inode *inode, 897 struct inode *inode,
842 uint16_t partition, uint32_t goal, int *err) 898 uint16_t partition, uint32_t goal, int *err)
843{ 899{
844 int ret; 900 struct udf_part_map *map = &UDF_SB(sb)->s_partmaps[partition];
845 901
846 if (UDF_SB_PARTFLAGS(sb, partition) & UDF_PART_FLAG_UNALLOC_BITMAP) { 902 if (map->s_partition_flags & UDF_PART_FLAG_UNALLOC_BITMAP)
847 ret = udf_bitmap_new_block(sb, inode, 903 return udf_bitmap_new_block(sb, inode,
848 UDF_SB_PARTMAPS(sb)[partition].s_uspace.s_bitmap, 904 map->s_uspace.s_bitmap,
849 partition, goal, err); 905 partition, goal, err);
850 return ret; 906 else if (map->s_partition_flags & UDF_PART_FLAG_UNALLOC_TABLE)
851 } else if (UDF_SB_PARTFLAGS(sb, partition) & UDF_PART_FLAG_UNALLOC_TABLE) {
852 return udf_table_new_block(sb, inode, 907 return udf_table_new_block(sb, inode,
853 UDF_SB_PARTMAPS(sb)[partition].s_uspace.s_table, 908 map->s_uspace.s_table,
854 partition, goal, err); 909 partition, goal, err);
855 } else if (UDF_SB_PARTFLAGS(sb, partition) & UDF_PART_FLAG_FREED_BITMAP) { 910 else if (map->s_partition_flags & UDF_PART_FLAG_FREED_BITMAP)
856 return udf_bitmap_new_block(sb, inode, 911 return udf_bitmap_new_block(sb, inode,
857 UDF_SB_PARTMAPS(sb)[partition].s_fspace.s_bitmap, 912 map->s_fspace.s_bitmap,
858 partition, goal, err); 913 partition, goal, err);
859 } else if (UDF_SB_PARTFLAGS(sb, partition) & UDF_PART_FLAG_FREED_TABLE) { 914 else if (map->s_partition_flags & UDF_PART_FLAG_FREED_TABLE)
860 return udf_table_new_block(sb, inode, 915 return udf_table_new_block(sb, inode,
861 UDF_SB_PARTMAPS(sb)[partition].s_fspace.s_table, 916 map->s_fspace.s_table,
862 partition, goal, err); 917 partition, goal, err);
863 } else { 918 else {
864 *err = -EIO; 919 *err = -EIO;
865 return 0; 920 return 0;
866 } 921 }
diff --git a/fs/udf/crc.c b/fs/udf/crc.c
index 85aaee5fab26..b1661296e786 100644
--- a/fs/udf/crc.c
+++ b/fs/udf/crc.c
@@ -79,7 +79,7 @@ static uint16_t crc_table[256] = {
79 * July 21, 1997 - Andrew E. Mileski 79 * July 21, 1997 - Andrew E. Mileski
80 * Adapted from OSTA-UDF(tm) 1.50 standard. 80 * Adapted from OSTA-UDF(tm) 1.50 standard.
81 */ 81 */
82uint16_t udf_crc(uint8_t * data, uint32_t size, uint16_t crc) 82uint16_t udf_crc(uint8_t *data, uint32_t size, uint16_t crc)
83{ 83{
84 while (size--) 84 while (size--)
85 crc = crc_table[(crc >> 8 ^ *(data++)) & 0xffU] ^ (crc << 8); 85 crc = crc_table[(crc >> 8 ^ *(data++)) & 0xffU] ^ (crc << 8);
diff --git a/fs/udf/dir.c b/fs/udf/dir.c
index 9e3b9f97ddbc..4b44e23caa12 100644
--- a/fs/udf/dir.c
+++ b/fs/udf/dir.c
@@ -36,68 +36,8 @@
36#include "udf_i.h" 36#include "udf_i.h"
37#include "udf_sb.h" 37#include "udf_sb.h"
38 38
39/* Prototypes for file operations */ 39static int do_udf_readdir(struct inode *dir, struct file *filp,
40static int udf_readdir(struct file *, void *, filldir_t); 40 filldir_t filldir, void *dirent)
41static int do_udf_readdir(struct inode *, struct file *, filldir_t, void *);
42
43/* readdir and lookup functions */
44
45const struct file_operations udf_dir_operations = {
46 .read = generic_read_dir,
47 .readdir = udf_readdir,
48 .ioctl = udf_ioctl,
49 .fsync = udf_fsync_file,
50};
51
52/*
53 * udf_readdir
54 *
55 * PURPOSE
56 * Read a directory entry.
57 *
58 * DESCRIPTION
59 * Optional - sys_getdents() will return -ENOTDIR if this routine is not
60 * available.
61 *
62 * Refer to sys_getdents() in fs/readdir.c
63 * sys_getdents() -> .
64 *
65 * PRE-CONDITIONS
66 * filp Pointer to directory file.
67 * buf Pointer to directory entry buffer.
68 * filldir Pointer to filldir function.
69 *
70 * POST-CONDITIONS
71 * <return> >=0 on success.
72 *
73 * HISTORY
74 * July 1, 1997 - Andrew E. Mileski
75 * Written, tested, and released.
76 */
77
78int udf_readdir(struct file *filp, void *dirent, filldir_t filldir)
79{
80 struct inode *dir = filp->f_path.dentry->d_inode;
81 int result;
82
83 lock_kernel();
84
85 if (filp->f_pos == 0) {
86 if (filldir(dirent, ".", 1, filp->f_pos, dir->i_ino, DT_DIR) < 0) {
87 unlock_kernel();
88 return 0;
89 }
90 filp->f_pos++;
91 }
92
93 result = do_udf_readdir(dir, filp, filldir, dirent);
94 unlock_kernel();
95 return result;
96}
97
98static int
99do_udf_readdir(struct inode *dir, struct file *filp, filldir_t filldir,
100 void *dirent)
101{ 41{
102 struct udf_fileident_bh fibh; 42 struct udf_fileident_bh fibh;
103 struct fileIdentDesc *fi = NULL; 43 struct fileIdentDesc *fi = NULL;
@@ -117,6 +57,7 @@ do_udf_readdir(struct inode *dir, struct file *filp, filldir_t filldir,
117 int i, num; 57 int i, num;
118 unsigned int dt_type; 58 unsigned int dt_type;
119 struct extent_position epos = { NULL, 0, {0, 0} }; 59 struct extent_position epos = { NULL, 0, {0, 0} };
60 struct udf_inode_info *iinfo;
120 61
121 if (nf_pos >= size) 62 if (nf_pos >= size)
122 return 0; 63 return 0;
@@ -125,15 +66,17 @@ do_udf_readdir(struct inode *dir, struct file *filp, filldir_t filldir,
125 nf_pos = (udf_ext0_offset(dir) >> 2); 66 nf_pos = (udf_ext0_offset(dir) >> 2);
126 67
127 fibh.soffset = fibh.eoffset = (nf_pos & ((dir->i_sb->s_blocksize - 1) >> 2)) << 2; 68 fibh.soffset = fibh.eoffset = (nf_pos & ((dir->i_sb->s_blocksize - 1) >> 2)) << 2;
128 if (UDF_I_ALLOCTYPE(dir) == ICBTAG_FLAG_AD_IN_ICB) { 69 iinfo = UDF_I(dir);
70 if (iinfo->i_alloc_type == ICBTAG_FLAG_AD_IN_ICB) {
129 fibh.sbh = fibh.ebh = NULL; 71 fibh.sbh = fibh.ebh = NULL;
130 } else if (inode_bmap(dir, nf_pos >> (dir->i_sb->s_blocksize_bits - 2), 72 } else if (inode_bmap(dir, nf_pos >> (dir->i_sb->s_blocksize_bits - 2),
131 &epos, &eloc, &elen, &offset) == (EXT_RECORDED_ALLOCATED >> 30)) { 73 &epos, &eloc, &elen, &offset) == (EXT_RECORDED_ALLOCATED >> 30)) {
132 block = udf_get_lb_pblock(dir->i_sb, eloc, offset); 74 block = udf_get_lb_pblock(dir->i_sb, eloc, offset);
133 if ((++offset << dir->i_sb->s_blocksize_bits) < elen) { 75 if ((++offset << dir->i_sb->s_blocksize_bits) < elen) {
134 if (UDF_I_ALLOCTYPE(dir) == ICBTAG_FLAG_AD_SHORT) 76 if (iinfo->i_alloc_type == ICBTAG_FLAG_AD_SHORT)
135 epos.offset -= sizeof(short_ad); 77 epos.offset -= sizeof(short_ad);
136 else if (UDF_I_ALLOCTYPE(dir) == ICBTAG_FLAG_AD_LONG) 78 else if (iinfo->i_alloc_type ==
79 ICBTAG_FLAG_AD_LONG)
137 epos.offset -= sizeof(long_ad); 80 epos.offset -= sizeof(long_ad);
138 } else { 81 } else {
139 offset = 0; 82 offset = 0;
@@ -244,3 +187,57 @@ do_udf_readdir(struct inode *dir, struct file *filp, filldir_t filldir,
244 187
245 return 0; 188 return 0;
246} 189}
190
191/*
192 * udf_readdir
193 *
194 * PURPOSE
195 * Read a directory entry.
196 *
197 * DESCRIPTION
198 * Optional - sys_getdents() will return -ENOTDIR if this routine is not
199 * available.
200 *
201 * Refer to sys_getdents() in fs/readdir.c
202 * sys_getdents() -> .
203 *
204 * PRE-CONDITIONS
205 * filp Pointer to directory file.
206 * buf Pointer to directory entry buffer.
207 * filldir Pointer to filldir function.
208 *
209 * POST-CONDITIONS
210 * <return> >=0 on success.
211 *
212 * HISTORY
213 * July 1, 1997 - Andrew E. Mileski
214 * Written, tested, and released.
215 */
216
217static int udf_readdir(struct file *filp, void *dirent, filldir_t filldir)
218{
219 struct inode *dir = filp->f_path.dentry->d_inode;
220 int result;
221
222 lock_kernel();
223
224 if (filp->f_pos == 0) {
225 if (filldir(dirent, ".", 1, filp->f_pos, dir->i_ino, DT_DIR) < 0) {
226 unlock_kernel();
227 return 0;
228 }
229 filp->f_pos++;
230 }
231
232 result = do_udf_readdir(dir, filp, filldir, dirent);
233 unlock_kernel();
234 return result;
235}
236
237/* readdir and lookup functions */
238const struct file_operations udf_dir_operations = {
239 .read = generic_read_dir,
240 .readdir = udf_readdir,
241 .ioctl = udf_ioctl,
242 .fsync = udf_fsync_file,
243};
diff --git a/fs/udf/directory.c b/fs/udf/directory.c
index ff8c08fd7bf5..2820f8fcf4cc 100644
--- a/fs/udf/directory.c
+++ b/fs/udf/directory.c
@@ -19,7 +19,7 @@
19#include <linux/buffer_head.h> 19#include <linux/buffer_head.h>
20 20
21#if 0 21#if 0
22static uint8_t *udf_filead_read(struct inode *dir, uint8_t * tmpad, 22static uint8_t *udf_filead_read(struct inode *dir, uint8_t *tmpad,
23 uint8_t ad_size, kernel_lb_addr fe_loc, 23 uint8_t ad_size, kernel_lb_addr fe_loc,
24 int *pos, int *offset, struct buffer_head **bh, 24 int *pos, int *offset, struct buffer_head **bh,
25 int *error) 25 int *error)
@@ -45,7 +45,8 @@ static uint8_t *udf_filead_read(struct inode *dir, uint8_t * tmpad,
45 block = udf_get_lb_pblock(dir->i_sb, fe_loc, ++*pos); 45 block = udf_get_lb_pblock(dir->i_sb, fe_loc, ++*pos);
46 if (!block) 46 if (!block)
47 return NULL; 47 return NULL;
48 if (!(*bh = udf_tread(dir->i_sb, block))) 48 *bh = udf_tread(dir->i_sb, block);
49 if (!*bh)
49 return NULL; 50 return NULL;
50 } else if (*offset > dir->i_sb->s_blocksize) { 51 } else if (*offset > dir->i_sb->s_blocksize) {
51 ad = tmpad; 52 ad = tmpad;
@@ -57,10 +58,12 @@ static uint8_t *udf_filead_read(struct inode *dir, uint8_t * tmpad,
57 block = udf_get_lb_pblock(dir->i_sb, fe_loc, ++*pos); 58 block = udf_get_lb_pblock(dir->i_sb, fe_loc, ++*pos);
58 if (!block) 59 if (!block)
59 return NULL; 60 return NULL;
60 if (!((*bh) = udf_tread(dir->i_sb, block))) 61 (*bh) = udf_tread(dir->i_sb, block);
62 if (!*bh)
61 return NULL; 63 return NULL;
62 64
63 memcpy((uint8_t *)ad + remainder, (*bh)->b_data, ad_size - remainder); 65 memcpy((uint8_t *)ad + remainder, (*bh)->b_data,
66 ad_size - remainder);
64 *offset = ad_size - remainder; 67 *offset = ad_size - remainder;
65 } 68 }
66 69
@@ -68,29 +71,31 @@ static uint8_t *udf_filead_read(struct inode *dir, uint8_t * tmpad,
68} 71}
69#endif 72#endif
70 73
71struct fileIdentDesc *udf_fileident_read(struct inode *dir, loff_t * nf_pos, 74struct fileIdentDesc *udf_fileident_read(struct inode *dir, loff_t *nf_pos,
72 struct udf_fileident_bh *fibh, 75 struct udf_fileident_bh *fibh,
73 struct fileIdentDesc *cfi, 76 struct fileIdentDesc *cfi,
74 struct extent_position *epos, 77 struct extent_position *epos,
75 kernel_lb_addr * eloc, uint32_t * elen, 78 kernel_lb_addr *eloc, uint32_t *elen,
76 sector_t * offset) 79 sector_t *offset)
77{ 80{
78 struct fileIdentDesc *fi; 81 struct fileIdentDesc *fi;
79 int i, num, block; 82 int i, num, block;
80 struct buffer_head *tmp, *bha[16]; 83 struct buffer_head *tmp, *bha[16];
84 struct udf_inode_info *iinfo = UDF_I(dir);
81 85
82 fibh->soffset = fibh->eoffset; 86 fibh->soffset = fibh->eoffset;
83 87
84 if (UDF_I_ALLOCTYPE(dir) == ICBTAG_FLAG_AD_IN_ICB) { 88 if (iinfo->i_alloc_type == ICBTAG_FLAG_AD_IN_ICB) {
85 fi = udf_get_fileident(UDF_I_DATA(dir) - 89 fi = udf_get_fileident(iinfo->i_ext.i_data -
86 (UDF_I_EFE(dir) ? 90 (iinfo->i_efe ?
87 sizeof(struct extendedFileEntry) : 91 sizeof(struct extendedFileEntry) :
88 sizeof(struct fileEntry)), 92 sizeof(struct fileEntry)),
89 dir->i_sb->s_blocksize, &(fibh->eoffset)); 93 dir->i_sb->s_blocksize,
94 &(fibh->eoffset));
90 if (!fi) 95 if (!fi)
91 return NULL; 96 return NULL;
92 97
93 *nf_pos += ((fibh->eoffset - fibh->soffset) >> 2); 98 *nf_pos += fibh->eoffset - fibh->soffset;
94 99
95 memcpy((uint8_t *)cfi, (uint8_t *)fi, 100 memcpy((uint8_t *)cfi, (uint8_t *)fi,
96 sizeof(struct fileIdentDesc)); 101 sizeof(struct fileIdentDesc));
@@ -100,6 +105,7 @@ struct fileIdentDesc *udf_fileident_read(struct inode *dir, loff_t * nf_pos,
100 105
101 if (fibh->eoffset == dir->i_sb->s_blocksize) { 106 if (fibh->eoffset == dir->i_sb->s_blocksize) {
102 int lextoffset = epos->offset; 107 int lextoffset = epos->offset;
108 unsigned char blocksize_bits = dir->i_sb->s_blocksize_bits;
103 109
104 if (udf_next_aext(dir, epos, eloc, elen, 1) != 110 if (udf_next_aext(dir, epos, eloc, elen, 1) !=
105 (EXT_RECORDED_ALLOCATED >> 30)) 111 (EXT_RECORDED_ALLOCATED >> 30))
@@ -109,24 +115,27 @@ struct fileIdentDesc *udf_fileident_read(struct inode *dir, loff_t * nf_pos,
109 115
110 (*offset)++; 116 (*offset)++;
111 117
112 if ((*offset << dir->i_sb->s_blocksize_bits) >= *elen) 118 if ((*offset << blocksize_bits) >= *elen)
113 *offset = 0; 119 *offset = 0;
114 else 120 else
115 epos->offset = lextoffset; 121 epos->offset = lextoffset;
116 122
117 brelse(fibh->sbh); 123 brelse(fibh->sbh);
118 if (!(fibh->sbh = fibh->ebh = udf_tread(dir->i_sb, block))) 124 fibh->sbh = fibh->ebh = udf_tread(dir->i_sb, block);
125 if (!fibh->sbh)
119 return NULL; 126 return NULL;
120 fibh->soffset = fibh->eoffset = 0; 127 fibh->soffset = fibh->eoffset = 0;
121 128
122 if (!(*offset & ((16 >> (dir->i_sb->s_blocksize_bits - 9)) - 1))) { 129 if (!(*offset & ((16 >> (blocksize_bits - 9)) - 1))) {
123 i = 16 >> (dir->i_sb->s_blocksize_bits - 9); 130 i = 16 >> (blocksize_bits - 9);
124 if (i + *offset > (*elen >> dir->i_sb->s_blocksize_bits)) 131 if (i + *offset > (*elen >> blocksize_bits))
125 i = (*elen >> dir->i_sb->s_blocksize_bits)-*offset; 132 i = (*elen >> blocksize_bits)-*offset;
126 for (num = 0; i > 0; i--) { 133 for (num = 0; i > 0; i--) {
127 block = udf_get_lb_pblock(dir->i_sb, *eloc, *offset + i); 134 block = udf_get_lb_pblock(dir->i_sb, *eloc,
135 *offset + i);
128 tmp = udf_tgetblk(dir->i_sb, block); 136 tmp = udf_tgetblk(dir->i_sb, block);
129 if (tmp && !buffer_uptodate(tmp) && !buffer_locked(tmp)) 137 if (tmp && !buffer_uptodate(tmp) &&
138 !buffer_locked(tmp))
130 bha[num++] = tmp; 139 bha[num++] = tmp;
131 else 140 else
132 brelse(tmp); 141 brelse(tmp);
@@ -148,7 +157,7 @@ struct fileIdentDesc *udf_fileident_read(struct inode *dir, loff_t * nf_pos,
148 if (!fi) 157 if (!fi)
149 return NULL; 158 return NULL;
150 159
151 *nf_pos += ((fibh->eoffset - fibh->soffset) >> 2); 160 *nf_pos += fibh->eoffset - fibh->soffset;
152 161
153 if (fibh->eoffset <= dir->i_sb->s_blocksize) { 162 if (fibh->eoffset <= dir->i_sb->s_blocksize) {
154 memcpy((uint8_t *)cfi, (uint8_t *)fi, 163 memcpy((uint8_t *)cfi, (uint8_t *)fi,
@@ -172,20 +181,23 @@ struct fileIdentDesc *udf_fileident_read(struct inode *dir, loff_t * nf_pos,
172 fibh->soffset -= dir->i_sb->s_blocksize; 181 fibh->soffset -= dir->i_sb->s_blocksize;
173 fibh->eoffset -= dir->i_sb->s_blocksize; 182 fibh->eoffset -= dir->i_sb->s_blocksize;
174 183
175 if (!(fibh->ebh = udf_tread(dir->i_sb, block))) 184 fibh->ebh = udf_tread(dir->i_sb, block);
185 if (!fibh->ebh)
176 return NULL; 186 return NULL;
177 187
178 if (sizeof(struct fileIdentDesc) > -fibh->soffset) { 188 if (sizeof(struct fileIdentDesc) > -fibh->soffset) {
179 int fi_len; 189 int fi_len;
180 190
181 memcpy((uint8_t *)cfi, (uint8_t *)fi, -fibh->soffset); 191 memcpy((uint8_t *)cfi, (uint8_t *)fi, -fibh->soffset);
182 memcpy((uint8_t *)cfi - fibh->soffset, fibh->ebh->b_data, 192 memcpy((uint8_t *)cfi - fibh->soffset,
193 fibh->ebh->b_data,
183 sizeof(struct fileIdentDesc) + fibh->soffset); 194 sizeof(struct fileIdentDesc) + fibh->soffset);
184 195
185 fi_len = (sizeof(struct fileIdentDesc) + cfi->lengthFileIdent + 196 fi_len = (sizeof(struct fileIdentDesc) +
197 cfi->lengthFileIdent +
186 le16_to_cpu(cfi->lengthOfImpUse) + 3) & ~3; 198 le16_to_cpu(cfi->lengthOfImpUse) + 3) & ~3;
187 199
188 *nf_pos += ((fi_len - (fibh->eoffset - fibh->soffset)) >> 2); 200 *nf_pos += fi_len - (fibh->eoffset - fibh->soffset);
189 fibh->eoffset = fibh->soffset + fi_len; 201 fibh->eoffset = fibh->soffset + fi_len;
190 } else { 202 } else {
191 memcpy((uint8_t *)cfi, (uint8_t *)fi, 203 memcpy((uint8_t *)cfi, (uint8_t *)fi,
@@ -210,11 +222,10 @@ struct fileIdentDesc *udf_get_fileident(void *buffer, int bufsize, int *offset)
210 222
211 ptr = buffer; 223 ptr = buffer;
212 224
213 if ((*offset > 0) && (*offset < bufsize)) { 225 if ((*offset > 0) && (*offset < bufsize))
214 ptr += *offset; 226 ptr += *offset;
215 }
216 fi = (struct fileIdentDesc *)ptr; 227 fi = (struct fileIdentDesc *)ptr;
217 if (le16_to_cpu(fi->descTag.tagIdent) != TAG_IDENT_FID) { 228 if (fi->descTag.tagIdent != cpu_to_le16(TAG_IDENT_FID)) {
218 udf_debug("0x%x != TAG_IDENT_FID\n", 229 udf_debug("0x%x != TAG_IDENT_FID\n",
219 le16_to_cpu(fi->descTag.tagIdent)); 230 le16_to_cpu(fi->descTag.tagIdent));
220 udf_debug("offset: %u sizeof: %lu bufsize: %u\n", 231 udf_debug("offset: %u sizeof: %lu bufsize: %u\n",
@@ -222,12 +233,11 @@ struct fileIdentDesc *udf_get_fileident(void *buffer, int bufsize, int *offset)
222 bufsize); 233 bufsize);
223 return NULL; 234 return NULL;
224 } 235 }
225 if ((*offset + sizeof(struct fileIdentDesc)) > bufsize) { 236 if ((*offset + sizeof(struct fileIdentDesc)) > bufsize)
226 lengthThisIdent = sizeof(struct fileIdentDesc); 237 lengthThisIdent = sizeof(struct fileIdentDesc);
227 } else { 238 else
228 lengthThisIdent = sizeof(struct fileIdentDesc) + 239 lengthThisIdent = sizeof(struct fileIdentDesc) +
229 fi->lengthFileIdent + le16_to_cpu(fi->lengthOfImpUse); 240 fi->lengthFileIdent + le16_to_cpu(fi->lengthOfImpUse);
230 }
231 241
232 /* we need to figure padding, too! */ 242 /* we need to figure padding, too! */
233 padlen = lengthThisIdent % UDF_NAME_PAD; 243 padlen = lengthThisIdent % UDF_NAME_PAD;
@@ -252,17 +262,17 @@ static extent_ad *udf_get_fileextent(void *buffer, int bufsize, int *offset)
252 262
253 fe = (struct fileEntry *)buffer; 263 fe = (struct fileEntry *)buffer;
254 264
255 if (le16_to_cpu(fe->descTag.tagIdent) != TAG_IDENT_FE) { 265 if (fe->descTag.tagIdent != cpu_to_le16(TAG_IDENT_FE)) {
256 udf_debug("0x%x != TAG_IDENT_FE\n", 266 udf_debug("0x%x != TAG_IDENT_FE\n",
257 le16_to_cpu(fe->descTag.tagIdent)); 267 le16_to_cpu(fe->descTag.tagIdent));
258 return NULL; 268 return NULL;
259 } 269 }
260 270
261 ptr = (uint8_t *)(fe->extendedAttr) + le32_to_cpu(fe->lengthExtendedAttr); 271 ptr = (uint8_t *)(fe->extendedAttr) +
272 le32_to_cpu(fe->lengthExtendedAttr);
262 273
263 if ((*offset > 0) && (*offset < le32_to_cpu(fe->lengthAllocDescs))) { 274 if ((*offset > 0) && (*offset < le32_to_cpu(fe->lengthAllocDescs)))
264 ptr += *offset; 275 ptr += *offset;
265 }
266 276
267 ext = (extent_ad *)ptr; 277 ext = (extent_ad *)ptr;
268 278
@@ -271,7 +281,7 @@ static extent_ad *udf_get_fileextent(void *buffer, int bufsize, int *offset)
271} 281}
272#endif 282#endif
273 283
274short_ad *udf_get_fileshortad(uint8_t *ptr, int maxoffset, int *offset, 284short_ad *udf_get_fileshortad(uint8_t *ptr, int maxoffset, uint32_t *offset,
275 int inc) 285 int inc)
276{ 286{
277 short_ad *sa; 287 short_ad *sa;
@@ -281,17 +291,20 @@ short_ad *udf_get_fileshortad(uint8_t *ptr, int maxoffset, int *offset,
281 return NULL; 291 return NULL;
282 } 292 }
283 293
284 if ((*offset < 0) || ((*offset + sizeof(short_ad)) > maxoffset)) 294 if ((*offset + sizeof(short_ad)) > maxoffset)
285 return NULL;
286 else if ((sa = (short_ad *)ptr)->extLength == 0)
287 return NULL; 295 return NULL;
296 else {
297 sa = (short_ad *)ptr;
298 if (sa->extLength == 0)
299 return NULL;
300 }
288 301
289 if (inc) 302 if (inc)
290 *offset += sizeof(short_ad); 303 *offset += sizeof(short_ad);
291 return sa; 304 return sa;
292} 305}
293 306
294long_ad *udf_get_filelongad(uint8_t *ptr, int maxoffset, int *offset, int inc) 307long_ad *udf_get_filelongad(uint8_t *ptr, int maxoffset, uint32_t *offset, int inc)
295{ 308{
296 long_ad *la; 309 long_ad *la;
297 310
@@ -300,10 +313,13 @@ long_ad *udf_get_filelongad(uint8_t *ptr, int maxoffset, int *offset, int inc)
300 return NULL; 313 return NULL;
301 } 314 }
302 315
303 if ((*offset < 0) || ((*offset + sizeof(long_ad)) > maxoffset)) 316 if ((*offset + sizeof(long_ad)) > maxoffset)
304 return NULL;
305 else if ((la = (long_ad *)ptr)->extLength == 0)
306 return NULL; 317 return NULL;
318 else {
319 la = (long_ad *)ptr;
320 if (la->extLength == 0)
321 return NULL;
322 }
307 323
308 if (inc) 324 if (inc)
309 *offset += sizeof(long_ad); 325 *offset += sizeof(long_ad);
diff --git a/fs/udf/file.c b/fs/udf/file.c
index 7c7a1b39d56c..97c71ae7c689 100644
--- a/fs/udf/file.c
+++ b/fs/udf/file.c
@@ -45,12 +45,13 @@ static int udf_adinicb_readpage(struct file *file, struct page *page)
45{ 45{
46 struct inode *inode = page->mapping->host; 46 struct inode *inode = page->mapping->host;
47 char *kaddr; 47 char *kaddr;
48 struct udf_inode_info *iinfo = UDF_I(inode);
48 49
49 BUG_ON(!PageLocked(page)); 50 BUG_ON(!PageLocked(page));
50 51
51 kaddr = kmap(page); 52 kaddr = kmap(page);
52 memset(kaddr, 0, PAGE_CACHE_SIZE); 53 memset(kaddr, 0, PAGE_CACHE_SIZE);
53 memcpy(kaddr, UDF_I_DATA(inode) + UDF_I_LENEATTR(inode), inode->i_size); 54 memcpy(kaddr, iinfo->i_ext.i_data + iinfo->i_lenEAttr, inode->i_size);
54 flush_dcache_page(page); 55 flush_dcache_page(page);
55 SetPageUptodate(page); 56 SetPageUptodate(page);
56 kunmap(page); 57 kunmap(page);
@@ -59,15 +60,17 @@ static int udf_adinicb_readpage(struct file *file, struct page *page)
59 return 0; 60 return 0;
60} 61}
61 62
62static int udf_adinicb_writepage(struct page *page, struct writeback_control *wbc) 63static int udf_adinicb_writepage(struct page *page,
64 struct writeback_control *wbc)
63{ 65{
64 struct inode *inode = page->mapping->host; 66 struct inode *inode = page->mapping->host;
65 char *kaddr; 67 char *kaddr;
68 struct udf_inode_info *iinfo = UDF_I(inode);
66 69
67 BUG_ON(!PageLocked(page)); 70 BUG_ON(!PageLocked(page));
68 71
69 kaddr = kmap(page); 72 kaddr = kmap(page);
70 memcpy(UDF_I_DATA(inode) + UDF_I_LENEATTR(inode), kaddr, inode->i_size); 73 memcpy(iinfo->i_ext.i_data + iinfo->i_lenEAttr, kaddr, inode->i_size);
71 mark_inode_dirty(inode); 74 mark_inode_dirty(inode);
72 SetPageUptodate(page); 75 SetPageUptodate(page);
73 kunmap(page); 76 kunmap(page);
@@ -84,9 +87,10 @@ static int udf_adinicb_write_end(struct file *file,
84 struct inode *inode = mapping->host; 87 struct inode *inode = mapping->host;
85 unsigned offset = pos & (PAGE_CACHE_SIZE - 1); 88 unsigned offset = pos & (PAGE_CACHE_SIZE - 1);
86 char *kaddr; 89 char *kaddr;
90 struct udf_inode_info *iinfo = UDF_I(inode);
87 91
88 kaddr = kmap_atomic(page, KM_USER0); 92 kaddr = kmap_atomic(page, KM_USER0);
89 memcpy(UDF_I_DATA(inode) + UDF_I_LENEATTR(inode) + offset, 93 memcpy(iinfo->i_ext.i_data + iinfo->i_lenEAttr + offset,
90 kaddr + offset, copied); 94 kaddr + offset, copied);
91 kunmap_atomic(kaddr, KM_USER0); 95 kunmap_atomic(kaddr, KM_USER0);
92 96
@@ -109,25 +113,27 @@ static ssize_t udf_file_aio_write(struct kiocb *iocb, const struct iovec *iov,
109 struct inode *inode = file->f_path.dentry->d_inode; 113 struct inode *inode = file->f_path.dentry->d_inode;
110 int err, pos; 114 int err, pos;
111 size_t count = iocb->ki_left; 115 size_t count = iocb->ki_left;
116 struct udf_inode_info *iinfo = UDF_I(inode);
112 117
113 if (UDF_I_ALLOCTYPE(inode) == ICBTAG_FLAG_AD_IN_ICB) { 118 if (iinfo->i_alloc_type == ICBTAG_FLAG_AD_IN_ICB) {
114 if (file->f_flags & O_APPEND) 119 if (file->f_flags & O_APPEND)
115 pos = inode->i_size; 120 pos = inode->i_size;
116 else 121 else
117 pos = ppos; 122 pos = ppos;
118 123
119 if (inode->i_sb->s_blocksize < (udf_file_entry_alloc_offset(inode) + 124 if (inode->i_sb->s_blocksize <
125 (udf_file_entry_alloc_offset(inode) +
120 pos + count)) { 126 pos + count)) {
121 udf_expand_file_adinicb(inode, pos + count, &err); 127 udf_expand_file_adinicb(inode, pos + count, &err);
122 if (UDF_I_ALLOCTYPE(inode) == ICBTAG_FLAG_AD_IN_ICB) { 128 if (iinfo->i_alloc_type == ICBTAG_FLAG_AD_IN_ICB) {
123 udf_debug("udf_expand_adinicb: err=%d\n", err); 129 udf_debug("udf_expand_adinicb: err=%d\n", err);
124 return err; 130 return err;
125 } 131 }
126 } else { 132 } else {
127 if (pos + count > inode->i_size) 133 if (pos + count > inode->i_size)
128 UDF_I_LENALLOC(inode) = pos + count; 134 iinfo->i_lenAlloc = pos + count;
129 else 135 else
130 UDF_I_LENALLOC(inode) = inode->i_size; 136 iinfo->i_lenAlloc = inode->i_size;
131 } 137 }
132 } 138 }
133 139
@@ -191,23 +197,28 @@ int udf_ioctl(struct inode *inode, struct file *filp, unsigned int cmd,
191 197
192 switch (cmd) { 198 switch (cmd) {
193 case UDF_GETVOLIDENT: 199 case UDF_GETVOLIDENT:
194 return copy_to_user((char __user *)arg, 200 if (copy_to_user((char __user *)arg,
195 UDF_SB_VOLIDENT(inode->i_sb), 32) ? -EFAULT : 0; 201 UDF_SB(inode->i_sb)->s_volume_ident, 32))
202 return -EFAULT;
203 else
204 return 0;
196 case UDF_RELOCATE_BLOCKS: 205 case UDF_RELOCATE_BLOCKS:
197 if (!capable(CAP_SYS_ADMIN)) 206 if (!capable(CAP_SYS_ADMIN))
198 return -EACCES; 207 return -EACCES;
199 if (get_user(old_block, (long __user *)arg)) 208 if (get_user(old_block, (long __user *)arg))
200 return -EFAULT; 209 return -EFAULT;
201 if ((result = udf_relocate_blocks(inode->i_sb, 210 result = udf_relocate_blocks(inode->i_sb,
202 old_block, &new_block)) == 0) 211 old_block, &new_block);
212 if (result == 0)
203 result = put_user(new_block, (long __user *)arg); 213 result = put_user(new_block, (long __user *)arg);
204 return result; 214 return result;
205 case UDF_GETEASIZE: 215 case UDF_GETEASIZE:
206 result = put_user(UDF_I_LENEATTR(inode), (int __user *)arg); 216 result = put_user(UDF_I(inode)->i_lenEAttr, (int __user *)arg);
207 break; 217 break;
208 case UDF_GETEABLOCK: 218 case UDF_GETEABLOCK:
209 result = copy_to_user((char __user *)arg, UDF_I_DATA(inode), 219 result = copy_to_user((char __user *)arg,
210 UDF_I_LENEATTR(inode)) ? -EFAULT : 0; 220 UDF_I(inode)->i_ext.i_data,
221 UDF_I(inode)->i_lenEAttr) ? -EFAULT : 0;
211 break; 222 break;
212 } 223 }
213 224
diff --git a/fs/udf/ialloc.c b/fs/udf/ialloc.c
index 636d8f613929..84360315aca2 100644
--- a/fs/udf/ialloc.c
+++ b/fs/udf/ialloc.c
@@ -43,19 +43,21 @@ void udf_free_inode(struct inode *inode)
43 clear_inode(inode); 43 clear_inode(inode);
44 44
45 mutex_lock(&sbi->s_alloc_mutex); 45 mutex_lock(&sbi->s_alloc_mutex);
46 if (sbi->s_lvidbh) { 46 if (sbi->s_lvid_bh) {
47 struct logicalVolIntegrityDescImpUse *lvidiu =
48 udf_sb_lvidiu(sbi);
47 if (S_ISDIR(inode->i_mode)) 49 if (S_ISDIR(inode->i_mode))
48 UDF_SB_LVIDIU(sb)->numDirs = 50 lvidiu->numDirs =
49 cpu_to_le32(le32_to_cpu(UDF_SB_LVIDIU(sb)->numDirs) - 1); 51 cpu_to_le32(le32_to_cpu(lvidiu->numDirs) - 1);
50 else 52 else
51 UDF_SB_LVIDIU(sb)->numFiles = 53 lvidiu->numFiles =
52 cpu_to_le32(le32_to_cpu(UDF_SB_LVIDIU(sb)->numFiles) - 1); 54 cpu_to_le32(le32_to_cpu(lvidiu->numFiles) - 1);
53 55
54 mark_buffer_dirty(sbi->s_lvidbh); 56 mark_buffer_dirty(sbi->s_lvid_bh);
55 } 57 }
56 mutex_unlock(&sbi->s_alloc_mutex); 58 mutex_unlock(&sbi->s_alloc_mutex);
57 59
58 udf_free_blocks(sb, NULL, UDF_I_LOCATION(inode), 0, 1); 60 udf_free_blocks(sb, NULL, UDF_I(inode)->i_location, 0, 1);
59} 61}
60 62
61struct inode *udf_new_inode(struct inode *dir, int mode, int *err) 63struct inode *udf_new_inode(struct inode *dir, int mode, int *err)
@@ -64,7 +66,9 @@ struct inode *udf_new_inode(struct inode *dir, int mode, int *err)
64 struct udf_sb_info *sbi = UDF_SB(sb); 66 struct udf_sb_info *sbi = UDF_SB(sb);
65 struct inode *inode; 67 struct inode *inode;
66 int block; 68 int block;
67 uint32_t start = UDF_I_LOCATION(dir).logicalBlockNum; 69 uint32_t start = UDF_I(dir)->i_location.logicalBlockNum;
70 struct udf_inode_info *iinfo;
71 struct udf_inode_info *dinfo = UDF_I(dir);
68 72
69 inode = new_inode(sb); 73 inode = new_inode(sb);
70 74
@@ -74,13 +78,15 @@ struct inode *udf_new_inode(struct inode *dir, int mode, int *err)
74 } 78 }
75 *err = -ENOSPC; 79 *err = -ENOSPC;
76 80
77 UDF_I_UNIQUE(inode) = 0; 81 iinfo = UDF_I(inode);
78 UDF_I_LENEXTENTS(inode) = 0; 82 iinfo->i_unique = 0;
79 UDF_I_NEXT_ALLOC_BLOCK(inode) = 0; 83 iinfo->i_lenExtents = 0;
80 UDF_I_NEXT_ALLOC_GOAL(inode) = 0; 84 iinfo->i_next_alloc_block = 0;
81 UDF_I_STRAT4096(inode) = 0; 85 iinfo->i_next_alloc_goal = 0;
86 iinfo->i_strat4096 = 0;
82 87
83 block = udf_new_block(dir->i_sb, NULL, UDF_I_LOCATION(dir).partitionReferenceNum, 88 block = udf_new_block(dir->i_sb, NULL,
89 dinfo->i_location.partitionReferenceNum,
84 start, err); 90 start, err);
85 if (*err) { 91 if (*err) {
86 iput(inode); 92 iput(inode);
@@ -88,21 +94,27 @@ struct inode *udf_new_inode(struct inode *dir, int mode, int *err)
88 } 94 }
89 95
90 mutex_lock(&sbi->s_alloc_mutex); 96 mutex_lock(&sbi->s_alloc_mutex);
91 if (UDF_SB_LVIDBH(sb)) { 97 if (sbi->s_lvid_bh) {
98 struct logicalVolIntegrityDesc *lvid =
99 (struct logicalVolIntegrityDesc *)
100 sbi->s_lvid_bh->b_data;
101 struct logicalVolIntegrityDescImpUse *lvidiu =
102 udf_sb_lvidiu(sbi);
92 struct logicalVolHeaderDesc *lvhd; 103 struct logicalVolHeaderDesc *lvhd;
93 uint64_t uniqueID; 104 uint64_t uniqueID;
94 lvhd = (struct logicalVolHeaderDesc *)(UDF_SB_LVID(sb)->logicalVolContentsUse); 105 lvhd = (struct logicalVolHeaderDesc *)
106 (lvid->logicalVolContentsUse);
95 if (S_ISDIR(mode)) 107 if (S_ISDIR(mode))
96 UDF_SB_LVIDIU(sb)->numDirs = 108 lvidiu->numDirs =
97 cpu_to_le32(le32_to_cpu(UDF_SB_LVIDIU(sb)->numDirs) + 1); 109 cpu_to_le32(le32_to_cpu(lvidiu->numDirs) + 1);
98 else 110 else
99 UDF_SB_LVIDIU(sb)->numFiles = 111 lvidiu->numFiles =
100 cpu_to_le32(le32_to_cpu(UDF_SB_LVIDIU(sb)->numFiles) + 1); 112 cpu_to_le32(le32_to_cpu(lvidiu->numFiles) + 1);
101 UDF_I_UNIQUE(inode) = uniqueID = le64_to_cpu(lvhd->uniqueID); 113 iinfo->i_unique = uniqueID = le64_to_cpu(lvhd->uniqueID);
102 if (!(++uniqueID & 0x00000000FFFFFFFFUL)) 114 if (!(++uniqueID & 0x00000000FFFFFFFFUL))
103 uniqueID += 16; 115 uniqueID += 16;
104 lvhd->uniqueID = cpu_to_le64(uniqueID); 116 lvhd->uniqueID = cpu_to_le64(uniqueID);
105 mark_buffer_dirty(UDF_SB_LVIDBH(sb)); 117 mark_buffer_dirty(sbi->s_lvid_bh);
106 } 118 }
107 inode->i_mode = mode; 119 inode->i_mode = mode;
108 inode->i_uid = current->fsuid; 120 inode->i_uid = current->fsuid;
@@ -114,35 +126,41 @@ struct inode *udf_new_inode(struct inode *dir, int mode, int *err)
114 inode->i_gid = current->fsgid; 126 inode->i_gid = current->fsgid;
115 } 127 }
116 128
117 UDF_I_LOCATION(inode).logicalBlockNum = block; 129 iinfo->i_location.logicalBlockNum = block;
118 UDF_I_LOCATION(inode).partitionReferenceNum = UDF_I_LOCATION(dir).partitionReferenceNum; 130 iinfo->i_location.partitionReferenceNum =
119 inode->i_ino = udf_get_lb_pblock(sb, UDF_I_LOCATION(inode), 0); 131 dinfo->i_location.partitionReferenceNum;
132 inode->i_ino = udf_get_lb_pblock(sb, iinfo->i_location, 0);
120 inode->i_blocks = 0; 133 inode->i_blocks = 0;
121 UDF_I_LENEATTR(inode) = 0; 134 iinfo->i_lenEAttr = 0;
122 UDF_I_LENALLOC(inode) = 0; 135 iinfo->i_lenAlloc = 0;
123 UDF_I_USE(inode) = 0; 136 iinfo->i_use = 0;
124 if (UDF_QUERY_FLAG(inode->i_sb, UDF_FLAG_USE_EXTENDED_FE)) { 137 if (UDF_QUERY_FLAG(inode->i_sb, UDF_FLAG_USE_EXTENDED_FE)) {
125 UDF_I_EFE(inode) = 1; 138 iinfo->i_efe = 1;
126 UDF_UPDATE_UDFREV(inode->i_sb, UDF_VERS_USE_EXTENDED_FE); 139 if (UDF_VERS_USE_EXTENDED_FE > sbi->s_udfrev)
127 UDF_I_DATA(inode) = kzalloc(inode->i_sb->s_blocksize - sizeof(struct extendedFileEntry), GFP_KERNEL); 140 sbi->s_udfrev = UDF_VERS_USE_EXTENDED_FE;
141 iinfo->i_ext.i_data = kzalloc(inode->i_sb->s_blocksize -
142 sizeof(struct extendedFileEntry),
143 GFP_KERNEL);
128 } else { 144 } else {
129 UDF_I_EFE(inode) = 0; 145 iinfo->i_efe = 0;
130 UDF_I_DATA(inode) = kzalloc(inode->i_sb->s_blocksize - sizeof(struct fileEntry), GFP_KERNEL); 146 iinfo->i_ext.i_data = kzalloc(inode->i_sb->s_blocksize -
147 sizeof(struct fileEntry),
148 GFP_KERNEL);
131 } 149 }
132 if (!UDF_I_DATA(inode)) { 150 if (!iinfo->i_ext.i_data) {
133 iput(inode); 151 iput(inode);
134 *err = -ENOMEM; 152 *err = -ENOMEM;
135 mutex_unlock(&sbi->s_alloc_mutex); 153 mutex_unlock(&sbi->s_alloc_mutex);
136 return NULL; 154 return NULL;
137 } 155 }
138 if (UDF_QUERY_FLAG(inode->i_sb, UDF_FLAG_USE_AD_IN_ICB)) 156 if (UDF_QUERY_FLAG(inode->i_sb, UDF_FLAG_USE_AD_IN_ICB))
139 UDF_I_ALLOCTYPE(inode) = ICBTAG_FLAG_AD_IN_ICB; 157 iinfo->i_alloc_type = ICBTAG_FLAG_AD_IN_ICB;
140 else if (UDF_QUERY_FLAG(inode->i_sb, UDF_FLAG_USE_SHORT_AD)) 158 else if (UDF_QUERY_FLAG(inode->i_sb, UDF_FLAG_USE_SHORT_AD))
141 UDF_I_ALLOCTYPE(inode) = ICBTAG_FLAG_AD_SHORT; 159 iinfo->i_alloc_type = ICBTAG_FLAG_AD_SHORT;
142 else 160 else
143 UDF_I_ALLOCTYPE(inode) = ICBTAG_FLAG_AD_LONG; 161 iinfo->i_alloc_type = ICBTAG_FLAG_AD_LONG;
144 inode->i_mtime = inode->i_atime = inode->i_ctime = 162 inode->i_mtime = inode->i_atime = inode->i_ctime =
145 UDF_I_CRTIME(inode) = current_fs_time(inode->i_sb); 163 iinfo->i_crtime = current_fs_time(inode->i_sb);
146 insert_inode_hash(inode); 164 insert_inode_hash(inode);
147 mark_inode_dirty(inode); 165 mark_inode_dirty(inode);
148 mutex_unlock(&sbi->s_alloc_mutex); 166 mutex_unlock(&sbi->s_alloc_mutex);
diff --git a/fs/udf/inode.c b/fs/udf/inode.c
index 6ff8151984cf..24cfa55d0fdc 100644
--- a/fs/udf/inode.c
+++ b/fs/udf/inode.c
@@ -19,7 +19,8 @@
19 * 10/04/98 dgb Added rudimentary directory functions 19 * 10/04/98 dgb Added rudimentary directory functions
20 * 10/07/98 Fully working udf_block_map! It works! 20 * 10/07/98 Fully working udf_block_map! It works!
21 * 11/25/98 bmap altered to better support extents 21 * 11/25/98 bmap altered to better support extents
22 * 12/06/98 blf partition support in udf_iget, udf_block_map and udf_read_inode 22 * 12/06/98 blf partition support in udf_iget, udf_block_map
23 * and udf_read_inode
23 * 12/12/98 rewrote udf_block_map to handle next extents and descs across 24 * 12/12/98 rewrote udf_block_map to handle next extents and descs across
24 * block boundaries (which is not actually allowed) 25 * block boundaries (which is not actually allowed)
25 * 12/20/98 added support for strategy 4096 26 * 12/20/98 added support for strategy 4096
@@ -51,7 +52,7 @@ static int udf_update_inode(struct inode *, int);
51static void udf_fill_inode(struct inode *, struct buffer_head *); 52static void udf_fill_inode(struct inode *, struct buffer_head *);
52static int udf_alloc_i_data(struct inode *inode, size_t size); 53static int udf_alloc_i_data(struct inode *inode, size_t size);
53static struct buffer_head *inode_getblk(struct inode *, sector_t, int *, 54static struct buffer_head *inode_getblk(struct inode *, sector_t, int *,
54 long *, int *); 55 sector_t *, int *);
55static int8_t udf_insert_aext(struct inode *, struct extent_position, 56static int8_t udf_insert_aext(struct inode *, struct extent_position,
56 kernel_lb_addr, uint32_t); 57 kernel_lb_addr, uint32_t);
57static void udf_split_extents(struct inode *, int *, int, int, 58static void udf_split_extents(struct inode *, int *, int, int,
@@ -111,16 +112,18 @@ no_delete:
111 */ 112 */
112void udf_clear_inode(struct inode *inode) 113void udf_clear_inode(struct inode *inode)
113{ 114{
115 struct udf_inode_info *iinfo;
114 if (!(inode->i_sb->s_flags & MS_RDONLY)) { 116 if (!(inode->i_sb->s_flags & MS_RDONLY)) {
115 lock_kernel(); 117 lock_kernel();
116 /* Discard preallocation for directories, symlinks, etc. */ 118 /* Discard preallocation for directories, symlinks, etc. */
117 udf_discard_prealloc(inode); 119 udf_discard_prealloc(inode);
118 udf_truncate_tail_extent(inode); 120 udf_truncate_tail_extent(inode);
119 unlock_kernel(); 121 unlock_kernel();
120 write_inode_now(inode, 1); 122 write_inode_now(inode, 0);
121 } 123 }
122 kfree(UDF_I_DATA(inode)); 124 iinfo = UDF_I(inode);
123 UDF_I_DATA(inode) = NULL; 125 kfree(iinfo->i_ext.i_data);
126 iinfo->i_ext.i_data = NULL;
124} 127}
125 128
126static int udf_writepage(struct page *page, struct writeback_control *wbc) 129static int udf_writepage(struct page *page, struct writeback_control *wbc)
@@ -160,6 +163,7 @@ void udf_expand_file_adinicb(struct inode *inode, int newsize, int *err)
160{ 163{
161 struct page *page; 164 struct page *page;
162 char *kaddr; 165 char *kaddr;
166 struct udf_inode_info *iinfo = UDF_I(inode);
163 struct writeback_control udf_wbc = { 167 struct writeback_control udf_wbc = {
164 .sync_mode = WB_SYNC_NONE, 168 .sync_mode = WB_SYNC_NONE,
165 .nr_to_write = 1, 169 .nr_to_write = 1,
@@ -168,11 +172,11 @@ void udf_expand_file_adinicb(struct inode *inode, int newsize, int *err)
168 /* from now on we have normal address_space methods */ 172 /* from now on we have normal address_space methods */
169 inode->i_data.a_ops = &udf_aops; 173 inode->i_data.a_ops = &udf_aops;
170 174
171 if (!UDF_I_LENALLOC(inode)) { 175 if (!iinfo->i_lenAlloc) {
172 if (UDF_QUERY_FLAG(inode->i_sb, UDF_FLAG_USE_SHORT_AD)) 176 if (UDF_QUERY_FLAG(inode->i_sb, UDF_FLAG_USE_SHORT_AD))
173 UDF_I_ALLOCTYPE(inode) = ICBTAG_FLAG_AD_SHORT; 177 iinfo->i_alloc_type = ICBTAG_FLAG_AD_SHORT;
174 else 178 else
175 UDF_I_ALLOCTYPE(inode) = ICBTAG_FLAG_AD_LONG; 179 iinfo->i_alloc_type = ICBTAG_FLAG_AD_LONG;
176 mark_inode_dirty(inode); 180 mark_inode_dirty(inode);
177 return; 181 return;
178 } 182 }
@@ -182,21 +186,21 @@ void udf_expand_file_adinicb(struct inode *inode, int newsize, int *err)
182 186
183 if (!PageUptodate(page)) { 187 if (!PageUptodate(page)) {
184 kaddr = kmap(page); 188 kaddr = kmap(page);
185 memset(kaddr + UDF_I_LENALLOC(inode), 0x00, 189 memset(kaddr + iinfo->i_lenAlloc, 0x00,
186 PAGE_CACHE_SIZE - UDF_I_LENALLOC(inode)); 190 PAGE_CACHE_SIZE - iinfo->i_lenAlloc);
187 memcpy(kaddr, UDF_I_DATA(inode) + UDF_I_LENEATTR(inode), 191 memcpy(kaddr, iinfo->i_ext.i_data + iinfo->i_lenEAttr,
188 UDF_I_LENALLOC(inode)); 192 iinfo->i_lenAlloc);
189 flush_dcache_page(page); 193 flush_dcache_page(page);
190 SetPageUptodate(page); 194 SetPageUptodate(page);
191 kunmap(page); 195 kunmap(page);
192 } 196 }
193 memset(UDF_I_DATA(inode) + UDF_I_LENEATTR(inode), 0x00, 197 memset(iinfo->i_ext.i_data + iinfo->i_lenEAttr, 0x00,
194 UDF_I_LENALLOC(inode)); 198 iinfo->i_lenAlloc);
195 UDF_I_LENALLOC(inode) = 0; 199 iinfo->i_lenAlloc = 0;
196 if (UDF_QUERY_FLAG(inode->i_sb, UDF_FLAG_USE_SHORT_AD)) 200 if (UDF_QUERY_FLAG(inode->i_sb, UDF_FLAG_USE_SHORT_AD))
197 UDF_I_ALLOCTYPE(inode) = ICBTAG_FLAG_AD_SHORT; 201 iinfo->i_alloc_type = ICBTAG_FLAG_AD_SHORT;
198 else 202 else
199 UDF_I_ALLOCTYPE(inode) = ICBTAG_FLAG_AD_LONG; 203 iinfo->i_alloc_type = ICBTAG_FLAG_AD_LONG;
200 204
201 inode->i_data.a_ops->writepage(page, &udf_wbc); 205 inode->i_data.a_ops->writepage(page, &udf_wbc);
202 page_cache_release(page); 206 page_cache_release(page);
@@ -215,9 +219,10 @@ struct buffer_head *udf_expand_dir_adinicb(struct inode *inode, int *block,
215 struct extent_position epos; 219 struct extent_position epos;
216 220
217 struct udf_fileident_bh sfibh, dfibh; 221 struct udf_fileident_bh sfibh, dfibh;
218 loff_t f_pos = udf_ext0_offset(inode) >> 2; 222 loff_t f_pos = udf_ext0_offset(inode);
219 int size = (udf_ext0_offset(inode) + inode->i_size) >> 2; 223 int size = udf_ext0_offset(inode) + inode->i_size;
220 struct fileIdentDesc cfi, *sfi, *dfi; 224 struct fileIdentDesc cfi, *sfi, *dfi;
225 struct udf_inode_info *iinfo = UDF_I(inode);
221 226
222 if (UDF_QUERY_FLAG(inode->i_sb, UDF_FLAG_USE_SHORT_AD)) 227 if (UDF_QUERY_FLAG(inode->i_sb, UDF_FLAG_USE_SHORT_AD))
223 alloctype = ICBTAG_FLAG_AD_SHORT; 228 alloctype = ICBTAG_FLAG_AD_SHORT;
@@ -225,19 +230,20 @@ struct buffer_head *udf_expand_dir_adinicb(struct inode *inode, int *block,
225 alloctype = ICBTAG_FLAG_AD_LONG; 230 alloctype = ICBTAG_FLAG_AD_LONG;
226 231
227 if (!inode->i_size) { 232 if (!inode->i_size) {
228 UDF_I_ALLOCTYPE(inode) = alloctype; 233 iinfo->i_alloc_type = alloctype;
229 mark_inode_dirty(inode); 234 mark_inode_dirty(inode);
230 return NULL; 235 return NULL;
231 } 236 }
232 237
233 /* alloc block, and copy data to it */ 238 /* alloc block, and copy data to it */
234 *block = udf_new_block(inode->i_sb, inode, 239 *block = udf_new_block(inode->i_sb, inode,
235 UDF_I_LOCATION(inode).partitionReferenceNum, 240 iinfo->i_location.partitionReferenceNum,
236 UDF_I_LOCATION(inode).logicalBlockNum, err); 241 iinfo->i_location.logicalBlockNum, err);
237 if (!(*block)) 242 if (!(*block))
238 return NULL; 243 return NULL;
239 newblock = udf_get_pblock(inode->i_sb, *block, 244 newblock = udf_get_pblock(inode->i_sb, *block,
240 UDF_I_LOCATION(inode).partitionReferenceNum, 0); 245 iinfo->i_location.partitionReferenceNum,
246 0);
241 if (!newblock) 247 if (!newblock)
242 return NULL; 248 return NULL;
243 dbh = udf_tgetblk(inode->i_sb, newblock); 249 dbh = udf_tgetblk(inode->i_sb, newblock);
@@ -249,39 +255,44 @@ struct buffer_head *udf_expand_dir_adinicb(struct inode *inode, int *block,
249 unlock_buffer(dbh); 255 unlock_buffer(dbh);
250 mark_buffer_dirty_inode(dbh, inode); 256 mark_buffer_dirty_inode(dbh, inode);
251 257
252 sfibh.soffset = sfibh.eoffset = (f_pos & ((inode->i_sb->s_blocksize - 1) >> 2)) << 2; 258 sfibh.soffset = sfibh.eoffset =
259 f_pos & (inode->i_sb->s_blocksize - 1);
253 sfibh.sbh = sfibh.ebh = NULL; 260 sfibh.sbh = sfibh.ebh = NULL;
254 dfibh.soffset = dfibh.eoffset = 0; 261 dfibh.soffset = dfibh.eoffset = 0;
255 dfibh.sbh = dfibh.ebh = dbh; 262 dfibh.sbh = dfibh.ebh = dbh;
256 while ((f_pos < size)) { 263 while (f_pos < size) {
257 UDF_I_ALLOCTYPE(inode) = ICBTAG_FLAG_AD_IN_ICB; 264 iinfo->i_alloc_type = ICBTAG_FLAG_AD_IN_ICB;
258 sfi = udf_fileident_read(inode, &f_pos, &sfibh, &cfi, NULL, NULL, NULL, NULL); 265 sfi = udf_fileident_read(inode, &f_pos, &sfibh, &cfi, NULL,
266 NULL, NULL, NULL);
259 if (!sfi) { 267 if (!sfi) {
260 brelse(dbh); 268 brelse(dbh);
261 return NULL; 269 return NULL;
262 } 270 }
263 UDF_I_ALLOCTYPE(inode) = alloctype; 271 iinfo->i_alloc_type = alloctype;
264 sfi->descTag.tagLocation = cpu_to_le32(*block); 272 sfi->descTag.tagLocation = cpu_to_le32(*block);
265 dfibh.soffset = dfibh.eoffset; 273 dfibh.soffset = dfibh.eoffset;
266 dfibh.eoffset += (sfibh.eoffset - sfibh.soffset); 274 dfibh.eoffset += (sfibh.eoffset - sfibh.soffset);
267 dfi = (struct fileIdentDesc *)(dbh->b_data + dfibh.soffset); 275 dfi = (struct fileIdentDesc *)(dbh->b_data + dfibh.soffset);
268 if (udf_write_fi(inode, sfi, dfi, &dfibh, sfi->impUse, 276 if (udf_write_fi(inode, sfi, dfi, &dfibh, sfi->impUse,
269 sfi->fileIdent + le16_to_cpu(sfi->lengthOfImpUse))) { 277 sfi->fileIdent +
270 UDF_I_ALLOCTYPE(inode) = ICBTAG_FLAG_AD_IN_ICB; 278 le16_to_cpu(sfi->lengthOfImpUse))) {
279 iinfo->i_alloc_type = ICBTAG_FLAG_AD_IN_ICB;
271 brelse(dbh); 280 brelse(dbh);
272 return NULL; 281 return NULL;
273 } 282 }
274 } 283 }
275 mark_buffer_dirty_inode(dbh, inode); 284 mark_buffer_dirty_inode(dbh, inode);
276 285
277 memset(UDF_I_DATA(inode) + UDF_I_LENEATTR(inode), 0, UDF_I_LENALLOC(inode)); 286 memset(iinfo->i_ext.i_data + iinfo->i_lenEAttr, 0,
278 UDF_I_LENALLOC(inode) = 0; 287 iinfo->i_lenAlloc);
288 iinfo->i_lenAlloc = 0;
279 eloc.logicalBlockNum = *block; 289 eloc.logicalBlockNum = *block;
280 eloc.partitionReferenceNum = UDF_I_LOCATION(inode).partitionReferenceNum; 290 eloc.partitionReferenceNum =
281 elen = inode->i_size; 291 iinfo->i_location.partitionReferenceNum;
282 UDF_I_LENEXTENTS(inode) = elen; 292 elen = inode->i_sb->s_blocksize;
293 iinfo->i_lenExtents = elen;
283 epos.bh = NULL; 294 epos.bh = NULL;
284 epos.block = UDF_I_LOCATION(inode); 295 epos.block = iinfo->i_location;
285 epos.offset = udf_file_entry_alloc_offset(inode); 296 epos.offset = udf_file_entry_alloc_offset(inode);
286 udf_add_aext(inode, &epos, eloc, elen, 0); 297 udf_add_aext(inode, &epos, eloc, elen, 0);
287 /* UniqueID stuff */ 298 /* UniqueID stuff */
@@ -296,7 +307,8 @@ static int udf_get_block(struct inode *inode, sector_t block,
296{ 307{
297 int err, new; 308 int err, new;
298 struct buffer_head *bh; 309 struct buffer_head *bh;
299 unsigned long phys; 310 sector_t phys = 0;
311 struct udf_inode_info *iinfo;
300 312
301 if (!create) { 313 if (!create) {
302 phys = udf_block_map(inode, block); 314 phys = udf_block_map(inode, block);
@@ -314,9 +326,10 @@ static int udf_get_block(struct inode *inode, sector_t block,
314 if (block < 0) 326 if (block < 0)
315 goto abort_negative; 327 goto abort_negative;
316 328
317 if (block == UDF_I_NEXT_ALLOC_BLOCK(inode) + 1) { 329 iinfo = UDF_I(inode);
318 UDF_I_NEXT_ALLOC_BLOCK(inode)++; 330 if (block == iinfo->i_next_alloc_block + 1) {
319 UDF_I_NEXT_ALLOC_GOAL(inode)++; 331 iinfo->i_next_alloc_block++;
332 iinfo->i_next_alloc_goal++;
320 } 333 }
321 334
322 err = 0; 335 err = 0;
@@ -366,32 +379,35 @@ static struct buffer_head *udf_getblk(struct inode *inode, long block,
366 379
367/* Extend the file by 'blocks' blocks, return the number of extents added */ 380/* Extend the file by 'blocks' blocks, return the number of extents added */
368int udf_extend_file(struct inode *inode, struct extent_position *last_pos, 381int udf_extend_file(struct inode *inode, struct extent_position *last_pos,
369 kernel_long_ad * last_ext, sector_t blocks) 382 kernel_long_ad *last_ext, sector_t blocks)
370{ 383{
371 sector_t add; 384 sector_t add;
372 int count = 0, fake = !(last_ext->extLength & UDF_EXTENT_LENGTH_MASK); 385 int count = 0, fake = !(last_ext->extLength & UDF_EXTENT_LENGTH_MASK);
373 struct super_block *sb = inode->i_sb; 386 struct super_block *sb = inode->i_sb;
374 kernel_lb_addr prealloc_loc = {}; 387 kernel_lb_addr prealloc_loc = {};
375 int prealloc_len = 0; 388 int prealloc_len = 0;
389 struct udf_inode_info *iinfo;
376 390
377 /* The previous extent is fake and we should not extend by anything 391 /* The previous extent is fake and we should not extend by anything
378 * - there's nothing to do... */ 392 * - there's nothing to do... */
379 if (!blocks && fake) 393 if (!blocks && fake)
380 return 0; 394 return 0;
381 395
396 iinfo = UDF_I(inode);
382 /* Round the last extent up to a multiple of block size */ 397 /* Round the last extent up to a multiple of block size */
383 if (last_ext->extLength & (sb->s_blocksize - 1)) { 398 if (last_ext->extLength & (sb->s_blocksize - 1)) {
384 last_ext->extLength = 399 last_ext->extLength =
385 (last_ext->extLength & UDF_EXTENT_FLAG_MASK) | 400 (last_ext->extLength & UDF_EXTENT_FLAG_MASK) |
386 (((last_ext->extLength & UDF_EXTENT_LENGTH_MASK) + 401 (((last_ext->extLength & UDF_EXTENT_LENGTH_MASK) +
387 sb->s_blocksize - 1) & ~(sb->s_blocksize - 1)); 402 sb->s_blocksize - 1) & ~(sb->s_blocksize - 1));
388 UDF_I_LENEXTENTS(inode) = 403 iinfo->i_lenExtents =
389 (UDF_I_LENEXTENTS(inode) + sb->s_blocksize - 1) & 404 (iinfo->i_lenExtents + sb->s_blocksize - 1) &
390 ~(sb->s_blocksize - 1); 405 ~(sb->s_blocksize - 1);
391 } 406 }
392 407
393 /* Last extent are just preallocated blocks? */ 408 /* Last extent are just preallocated blocks? */
394 if ((last_ext->extLength & UDF_EXTENT_FLAG_MASK) == EXT_NOT_RECORDED_ALLOCATED) { 409 if ((last_ext->extLength & UDF_EXTENT_FLAG_MASK) ==
410 EXT_NOT_RECORDED_ALLOCATED) {
395 /* Save the extent so that we can reattach it to the end */ 411 /* Save the extent so that we can reattach it to the end */
396 prealloc_loc = last_ext->extLocation; 412 prealloc_loc = last_ext->extLocation;
397 prealloc_len = last_ext->extLength; 413 prealloc_len = last_ext->extLength;
@@ -399,13 +415,15 @@ int udf_extend_file(struct inode *inode, struct extent_position *last_pos,
399 last_ext->extLength = EXT_NOT_RECORDED_NOT_ALLOCATED | 415 last_ext->extLength = EXT_NOT_RECORDED_NOT_ALLOCATED |
400 (last_ext->extLength & UDF_EXTENT_LENGTH_MASK); 416 (last_ext->extLength & UDF_EXTENT_LENGTH_MASK);
401 last_ext->extLocation.logicalBlockNum = 0; 417 last_ext->extLocation.logicalBlockNum = 0;
402 last_ext->extLocation.partitionReferenceNum = 0; 418 last_ext->extLocation.partitionReferenceNum = 0;
403 } 419 }
404 420
405 /* Can we merge with the previous extent? */ 421 /* Can we merge with the previous extent? */
406 if ((last_ext->extLength & UDF_EXTENT_FLAG_MASK) == EXT_NOT_RECORDED_NOT_ALLOCATED) { 422 if ((last_ext->extLength & UDF_EXTENT_FLAG_MASK) ==
407 add = ((1 << 30) - sb->s_blocksize - (last_ext->extLength & 423 EXT_NOT_RECORDED_NOT_ALLOCATED) {
408 UDF_EXTENT_LENGTH_MASK)) >> sb->s_blocksize_bits; 424 add = ((1 << 30) - sb->s_blocksize -
425 (last_ext->extLength & UDF_EXTENT_LENGTH_MASK)) >>
426 sb->s_blocksize_bits;
409 if (add > blocks) 427 if (add > blocks)
410 add = blocks; 428 add = blocks;
411 blocks -= add; 429 blocks -= add;
@@ -416,9 +434,9 @@ int udf_extend_file(struct inode *inode, struct extent_position *last_pos,
416 udf_add_aext(inode, last_pos, last_ext->extLocation, 434 udf_add_aext(inode, last_pos, last_ext->extLocation,
417 last_ext->extLength, 1); 435 last_ext->extLength, 1);
418 count++; 436 count++;
419 } else { 437 } else
420 udf_write_aext(inode, last_pos, last_ext->extLocation, last_ext->extLength, 1); 438 udf_write_aext(inode, last_pos, last_ext->extLocation,
421 } 439 last_ext->extLength, 1);
422 440
423 /* Managed to do everything necessary? */ 441 /* Managed to do everything necessary? */
424 if (!blocks) 442 if (!blocks)
@@ -426,9 +444,10 @@ int udf_extend_file(struct inode *inode, struct extent_position *last_pos,
426 444
427 /* All further extents will be NOT_RECORDED_NOT_ALLOCATED */ 445 /* All further extents will be NOT_RECORDED_NOT_ALLOCATED */
428 last_ext->extLocation.logicalBlockNum = 0; 446 last_ext->extLocation.logicalBlockNum = 0;
429 last_ext->extLocation.partitionReferenceNum = 0; 447 last_ext->extLocation.partitionReferenceNum = 0;
430 add = (1 << (30-sb->s_blocksize_bits)) - 1; 448 add = (1 << (30-sb->s_blocksize_bits)) - 1;
431 last_ext->extLength = EXT_NOT_RECORDED_NOT_ALLOCATED | (add << sb->s_blocksize_bits); 449 last_ext->extLength = EXT_NOT_RECORDED_NOT_ALLOCATED |
450 (add << sb->s_blocksize_bits);
432 451
433 /* Create enough extents to cover the whole hole */ 452 /* Create enough extents to cover the whole hole */
434 while (blocks > add) { 453 while (blocks > add) {
@@ -450,7 +469,8 @@ int udf_extend_file(struct inode *inode, struct extent_position *last_pos,
450out: 469out:
451 /* Do we have some preallocated blocks saved? */ 470 /* Do we have some preallocated blocks saved? */
452 if (prealloc_len) { 471 if (prealloc_len) {
453 if (udf_add_aext(inode, last_pos, prealloc_loc, prealloc_len, 1) == -1) 472 if (udf_add_aext(inode, last_pos, prealloc_loc,
473 prealloc_len, 1) == -1)
454 return -1; 474 return -1;
455 last_ext->extLocation = prealloc_loc; 475 last_ext->extLocation = prealloc_loc;
456 last_ext->extLength = prealloc_len; 476 last_ext->extLength = prealloc_len;
@@ -458,9 +478,9 @@ out:
458 } 478 }
459 479
460 /* last_pos should point to the last written extent... */ 480 /* last_pos should point to the last written extent... */
461 if (UDF_I_ALLOCTYPE(inode) == ICBTAG_FLAG_AD_SHORT) 481 if (iinfo->i_alloc_type == ICBTAG_FLAG_AD_SHORT)
462 last_pos->offset -= sizeof(short_ad); 482 last_pos->offset -= sizeof(short_ad);
463 else if (UDF_I_ALLOCTYPE(inode) == ICBTAG_FLAG_AD_LONG) 483 else if (iinfo->i_alloc_type == ICBTAG_FLAG_AD_LONG)
464 last_pos->offset -= sizeof(long_ad); 484 last_pos->offset -= sizeof(long_ad);
465 else 485 else
466 return -1; 486 return -1;
@@ -469,7 +489,7 @@ out:
469} 489}
470 490
471static struct buffer_head *inode_getblk(struct inode *inode, sector_t block, 491static struct buffer_head *inode_getblk(struct inode *inode, sector_t block,
472 int *err, long *phys, int *new) 492 int *err, sector_t *phys, int *new)
473{ 493{
474 static sector_t last_block; 494 static sector_t last_block;
475 struct buffer_head *result = NULL; 495 struct buffer_head *result = NULL;
@@ -483,11 +503,12 @@ static struct buffer_head *inode_getblk(struct inode *inode, sector_t block,
483 uint32_t newblocknum, newblock; 503 uint32_t newblocknum, newblock;
484 sector_t offset = 0; 504 sector_t offset = 0;
485 int8_t etype; 505 int8_t etype;
486 int goal = 0, pgoal = UDF_I_LOCATION(inode).logicalBlockNum; 506 struct udf_inode_info *iinfo = UDF_I(inode);
507 int goal = 0, pgoal = iinfo->i_location.logicalBlockNum;
487 int lastblock = 0; 508 int lastblock = 0;
488 509
489 prev_epos.offset = udf_file_entry_alloc_offset(inode); 510 prev_epos.offset = udf_file_entry_alloc_offset(inode);
490 prev_epos.block = UDF_I_LOCATION(inode); 511 prev_epos.block = iinfo->i_location;
491 prev_epos.bh = NULL; 512 prev_epos.bh = NULL;
492 cur_epos = next_epos = prev_epos; 513 cur_epos = next_epos = prev_epos;
493 b_off = (loff_t)block << inode->i_sb->s_blocksize_bits; 514 b_off = (loff_t)block << inode->i_sb->s_blocksize_bits;
@@ -515,7 +536,8 @@ static struct buffer_head *inode_getblk(struct inode *inode, sector_t block,
515 prev_epos.offset = cur_epos.offset; 536 prev_epos.offset = cur_epos.offset;
516 cur_epos.offset = next_epos.offset; 537 cur_epos.offset = next_epos.offset;
517 538
518 if ((etype = udf_next_aext(inode, &next_epos, &eloc, &elen, 1)) == -1) 539 etype = udf_next_aext(inode, &next_epos, &eloc, &elen, 1);
540 if (etype == -1)
519 break; 541 break;
520 542
521 c = !c; 543 c = !c;
@@ -569,9 +591,11 @@ static struct buffer_head *inode_getblk(struct inode *inode, sector_t block,
569 startnum = 1; 591 startnum = 1;
570 } else { 592 } else {
571 /* Create a fake extent when there's not one */ 593 /* Create a fake extent when there's not one */
572 memset(&laarr[0].extLocation, 0x00, sizeof(kernel_lb_addr)); 594 memset(&laarr[0].extLocation, 0x00,
595 sizeof(kernel_lb_addr));
573 laarr[0].extLength = EXT_NOT_RECORDED_NOT_ALLOCATED; 596 laarr[0].extLength = EXT_NOT_RECORDED_NOT_ALLOCATED;
574 /* Will udf_extend_file() create real extent from a fake one? */ 597 /* Will udf_extend_file() create real extent from
598 a fake one? */
575 startnum = (offset > 0); 599 startnum = (offset > 0);
576 } 600 }
577 /* Create extents for the hole between EOF and offset */ 601 /* Create extents for the hole between EOF and offset */
@@ -589,14 +613,16 @@ static struct buffer_head *inode_getblk(struct inode *inode, sector_t block,
589 offset = 0; 613 offset = 0;
590 count += ret; 614 count += ret;
591 /* We are not covered by a preallocated extent? */ 615 /* We are not covered by a preallocated extent? */
592 if ((laarr[0].extLength & UDF_EXTENT_FLAG_MASK) != EXT_NOT_RECORDED_ALLOCATED) { 616 if ((laarr[0].extLength & UDF_EXTENT_FLAG_MASK) !=
617 EXT_NOT_RECORDED_ALLOCATED) {
593 /* Is there any real extent? - otherwise we overwrite 618 /* Is there any real extent? - otherwise we overwrite
594 * the fake one... */ 619 * the fake one... */
595 if (count) 620 if (count)
596 c = !c; 621 c = !c;
597 laarr[c].extLength = EXT_NOT_RECORDED_NOT_ALLOCATED | 622 laarr[c].extLength = EXT_NOT_RECORDED_NOT_ALLOCATED |
598 inode->i_sb->s_blocksize; 623 inode->i_sb->s_blocksize;
599 memset(&laarr[c].extLocation, 0x00, sizeof(kernel_lb_addr)); 624 memset(&laarr[c].extLocation, 0x00,
625 sizeof(kernel_lb_addr));
600 count++; 626 count++;
601 endnum++; 627 endnum++;
602 } 628 }
@@ -605,7 +631,8 @@ static struct buffer_head *inode_getblk(struct inode *inode, sector_t block,
605 } else { 631 } else {
606 endnum = startnum = ((count > 2) ? 2 : count); 632 endnum = startnum = ((count > 2) ? 2 : count);
607 633
608 /* if the current extent is in position 0, swap it with the previous */ 634 /* if the current extent is in position 0,
635 swap it with the previous */
609 if (!c && count != 1) { 636 if (!c && count != 1) {
610 laarr[2] = laarr[0]; 637 laarr[2] = laarr[0];
611 laarr[0] = laarr[1]; 638 laarr[0] = laarr[1];
@@ -613,44 +640,47 @@ static struct buffer_head *inode_getblk(struct inode *inode, sector_t block,
613 c = 1; 640 c = 1;
614 } 641 }
615 642
616 /* if the current block is located in an extent, read the next extent */ 643 /* if the current block is located in an extent,
617 if ((etype = udf_next_aext(inode, &next_epos, &eloc, &elen, 0)) != -1) { 644 read the next extent */
645 etype = udf_next_aext(inode, &next_epos, &eloc, &elen, 0);
646 if (etype != -1) {
618 laarr[c + 1].extLength = (etype << 30) | elen; 647 laarr[c + 1].extLength = (etype << 30) | elen;
619 laarr[c + 1].extLocation = eloc; 648 laarr[c + 1].extLocation = eloc;
620 count++; 649 count++;
621 startnum++; 650 startnum++;
622 endnum++; 651 endnum++;
623 } else { 652 } else
624 lastblock = 1; 653 lastblock = 1;
625 }
626 } 654 }
627 655
628 /* if the current extent is not recorded but allocated, get the 656 /* if the current extent is not recorded but allocated, get the
629 * block in the extent corresponding to the requested block */ 657 * block in the extent corresponding to the requested block */
630 if ((laarr[c].extLength >> 30) == (EXT_NOT_RECORDED_ALLOCATED >> 30)) { 658 if ((laarr[c].extLength >> 30) == (EXT_NOT_RECORDED_ALLOCATED >> 30))
631 newblocknum = laarr[c].extLocation.logicalBlockNum + offset; 659 newblocknum = laarr[c].extLocation.logicalBlockNum + offset;
632 } else { /* otherwise, allocate a new block */ 660 else { /* otherwise, allocate a new block */
633 if (UDF_I_NEXT_ALLOC_BLOCK(inode) == block) 661 if (iinfo->i_next_alloc_block == block)
634 goal = UDF_I_NEXT_ALLOC_GOAL(inode); 662 goal = iinfo->i_next_alloc_goal;
635 663
636 if (!goal) { 664 if (!goal) {
637 if (!(goal = pgoal)) 665 if (!(goal = pgoal)) /* XXX: what was intended here? */
638 goal = UDF_I_LOCATION(inode).logicalBlockNum + 1; 666 goal = iinfo->i_location.logicalBlockNum + 1;
639 } 667 }
640 668
641 if (!(newblocknum = udf_new_block(inode->i_sb, inode, 669 newblocknum = udf_new_block(inode->i_sb, inode,
642 UDF_I_LOCATION(inode).partitionReferenceNum, 670 iinfo->i_location.partitionReferenceNum,
643 goal, err))) { 671 goal, err);
672 if (!newblocknum) {
644 brelse(prev_epos.bh); 673 brelse(prev_epos.bh);
645 *err = -ENOSPC; 674 *err = -ENOSPC;
646 return NULL; 675 return NULL;
647 } 676 }
648 UDF_I_LENEXTENTS(inode) += inode->i_sb->s_blocksize; 677 iinfo->i_lenExtents += inode->i_sb->s_blocksize;
649 } 678 }
650 679
651 /* if the extent the requsted block is located in contains multiple blocks, 680 /* if the extent the requsted block is located in contains multiple
652 * split the extent into at most three extents. blocks prior to requested 681 * blocks, split the extent into at most three extents. blocks prior
653 * block, requested block, and blocks after requested block */ 682 * to requested block, requested block, and blocks after requested
683 * block */
654 udf_split_extents(inode, &c, offset, newblocknum, laarr, &endnum); 684 udf_split_extents(inode, &c, offset, newblocknum, laarr, &endnum);
655 685
656#ifdef UDF_PREALLOCATE 686#ifdef UDF_PREALLOCATE
@@ -668,15 +698,15 @@ static struct buffer_head *inode_getblk(struct inode *inode, sector_t block,
668 698
669 brelse(prev_epos.bh); 699 brelse(prev_epos.bh);
670 700
671 if (!(newblock = udf_get_pblock(inode->i_sb, newblocknum, 701 newblock = udf_get_pblock(inode->i_sb, newblocknum,
672 UDF_I_LOCATION(inode).partitionReferenceNum, 0))) { 702 iinfo->i_location.partitionReferenceNum, 0);
703 if (!newblock)
673 return NULL; 704 return NULL;
674 }
675 *phys = newblock; 705 *phys = newblock;
676 *err = 0; 706 *err = 0;
677 *new = 1; 707 *new = 1;
678 UDF_I_NEXT_ALLOC_BLOCK(inode) = block; 708 iinfo->i_next_alloc_block = block;
679 UDF_I_NEXT_ALLOC_GOAL(inode) = newblocknum; 709 iinfo->i_next_alloc_goal = newblocknum;
680 inode->i_ctime = current_fs_time(inode->i_sb); 710 inode->i_ctime = current_fs_time(inode->i_sb);
681 711
682 if (IS_SYNC(inode)) 712 if (IS_SYNC(inode))
@@ -692,16 +722,20 @@ static void udf_split_extents(struct inode *inode, int *c, int offset,
692 kernel_long_ad laarr[EXTENT_MERGE_SIZE], 722 kernel_long_ad laarr[EXTENT_MERGE_SIZE],
693 int *endnum) 723 int *endnum)
694{ 724{
725 unsigned long blocksize = inode->i_sb->s_blocksize;
726 unsigned char blocksize_bits = inode->i_sb->s_blocksize_bits;
727
695 if ((laarr[*c].extLength >> 30) == (EXT_NOT_RECORDED_ALLOCATED >> 30) || 728 if ((laarr[*c].extLength >> 30) == (EXT_NOT_RECORDED_ALLOCATED >> 30) ||
696 (laarr[*c].extLength >> 30) == (EXT_NOT_RECORDED_NOT_ALLOCATED >> 30)) { 729 (laarr[*c].extLength >> 30) ==
730 (EXT_NOT_RECORDED_NOT_ALLOCATED >> 30)) {
697 int curr = *c; 731 int curr = *c;
698 int blen = ((laarr[curr].extLength & UDF_EXTENT_LENGTH_MASK) + 732 int blen = ((laarr[curr].extLength & UDF_EXTENT_LENGTH_MASK) +
699 inode->i_sb->s_blocksize - 1) >> inode->i_sb->s_blocksize_bits; 733 blocksize - 1) >> blocksize_bits;
700 int8_t etype = (laarr[curr].extLength >> 30); 734 int8_t etype = (laarr[curr].extLength >> 30);
701 735
702 if (blen == 1) { 736 if (blen == 1)
703 ; 737 ;
704 } else if (!offset || blen == offset + 1) { 738 else if (!offset || blen == offset + 1) {
705 laarr[curr + 2] = laarr[curr + 1]; 739 laarr[curr + 2] = laarr[curr + 1];
706 laarr[curr + 1] = laarr[curr]; 740 laarr[curr + 1] = laarr[curr];
707 } else { 741 } else {
@@ -711,15 +745,18 @@ static void udf_split_extents(struct inode *inode, int *c, int offset,
711 745
712 if (offset) { 746 if (offset) {
713 if (etype == (EXT_NOT_RECORDED_ALLOCATED >> 30)) { 747 if (etype == (EXT_NOT_RECORDED_ALLOCATED >> 30)) {
714 udf_free_blocks(inode->i_sb, inode, laarr[curr].extLocation, 0, offset); 748 udf_free_blocks(inode->i_sb, inode,
715 laarr[curr].extLength = EXT_NOT_RECORDED_NOT_ALLOCATED | 749 laarr[curr].extLocation,
716 (offset << inode->i_sb->s_blocksize_bits); 750 0, offset);
751 laarr[curr].extLength =
752 EXT_NOT_RECORDED_NOT_ALLOCATED |
753 (offset << blocksize_bits);
717 laarr[curr].extLocation.logicalBlockNum = 0; 754 laarr[curr].extLocation.logicalBlockNum = 0;
718 laarr[curr].extLocation.partitionReferenceNum = 0; 755 laarr[curr].extLocation.
719 } else { 756 partitionReferenceNum = 0;
757 } else
720 laarr[curr].extLength = (etype << 30) | 758 laarr[curr].extLength = (etype << 30) |
721 (offset << inode->i_sb->s_blocksize_bits); 759 (offset << blocksize_bits);
722 }
723 curr++; 760 curr++;
724 (*c)++; 761 (*c)++;
725 (*endnum)++; 762 (*endnum)++;
@@ -728,16 +765,17 @@ static void udf_split_extents(struct inode *inode, int *c, int offset,
728 laarr[curr].extLocation.logicalBlockNum = newblocknum; 765 laarr[curr].extLocation.logicalBlockNum = newblocknum;
729 if (etype == (EXT_NOT_RECORDED_NOT_ALLOCATED >> 30)) 766 if (etype == (EXT_NOT_RECORDED_NOT_ALLOCATED >> 30))
730 laarr[curr].extLocation.partitionReferenceNum = 767 laarr[curr].extLocation.partitionReferenceNum =
731 UDF_I_LOCATION(inode).partitionReferenceNum; 768 UDF_I(inode)->i_location.partitionReferenceNum;
732 laarr[curr].extLength = EXT_RECORDED_ALLOCATED | 769 laarr[curr].extLength = EXT_RECORDED_ALLOCATED |
733 inode->i_sb->s_blocksize; 770 blocksize;
734 curr++; 771 curr++;
735 772
736 if (blen != offset + 1) { 773 if (blen != offset + 1) {
737 if (etype == (EXT_NOT_RECORDED_ALLOCATED >> 30)) 774 if (etype == (EXT_NOT_RECORDED_ALLOCATED >> 30))
738 laarr[curr].extLocation.logicalBlockNum += (offset + 1); 775 laarr[curr].extLocation.logicalBlockNum +=
776 offset + 1;
739 laarr[curr].extLength = (etype << 30) | 777 laarr[curr].extLength = (etype << 30) |
740 ((blen - (offset + 1)) << inode->i_sb->s_blocksize_bits); 778 ((blen - (offset + 1)) << blocksize_bits);
741 curr++; 779 curr++;
742 (*endnum)++; 780 (*endnum)++;
743 } 781 }
@@ -756,69 +794,86 @@ static void udf_prealloc_extents(struct inode *inode, int c, int lastblock,
756 else 794 else
757 start = c; 795 start = c;
758 } else { 796 } else {
759 if ((laarr[c + 1].extLength >> 30) == (EXT_NOT_RECORDED_ALLOCATED >> 30)) { 797 if ((laarr[c + 1].extLength >> 30) ==
798 (EXT_NOT_RECORDED_ALLOCATED >> 30)) {
760 start = c + 1; 799 start = c + 1;
761 length = currlength = (((laarr[c + 1].extLength & UDF_EXTENT_LENGTH_MASK) + 800 length = currlength =
762 inode->i_sb->s_blocksize - 1) >> inode->i_sb->s_blocksize_bits); 801 (((laarr[c + 1].extLength &
763 } else { 802 UDF_EXTENT_LENGTH_MASK) +
803 inode->i_sb->s_blocksize - 1) >>
804 inode->i_sb->s_blocksize_bits);
805 } else
764 start = c; 806 start = c;
765 }
766 } 807 }
767 808
768 for (i = start + 1; i <= *endnum; i++) { 809 for (i = start + 1; i <= *endnum; i++) {
769 if (i == *endnum) { 810 if (i == *endnum) {
770 if (lastblock) 811 if (lastblock)
771 length += UDF_DEFAULT_PREALLOC_BLOCKS; 812 length += UDF_DEFAULT_PREALLOC_BLOCKS;
772 } else if ((laarr[i].extLength >> 30) == (EXT_NOT_RECORDED_NOT_ALLOCATED >> 30)) { 813 } else if ((laarr[i].extLength >> 30) ==
773 length += (((laarr[i].extLength & UDF_EXTENT_LENGTH_MASK) + 814 (EXT_NOT_RECORDED_NOT_ALLOCATED >> 30)) {
774 inode->i_sb->s_blocksize - 1) >> inode->i_sb->s_blocksize_bits); 815 length += (((laarr[i].extLength &
775 } else { 816 UDF_EXTENT_LENGTH_MASK) +
817 inode->i_sb->s_blocksize - 1) >>
818 inode->i_sb->s_blocksize_bits);
819 } else
776 break; 820 break;
777 }
778 } 821 }
779 822
780 if (length) { 823 if (length) {
781 int next = laarr[start].extLocation.logicalBlockNum + 824 int next = laarr[start].extLocation.logicalBlockNum +
782 (((laarr[start].extLength & UDF_EXTENT_LENGTH_MASK) + 825 (((laarr[start].extLength & UDF_EXTENT_LENGTH_MASK) +
783 inode->i_sb->s_blocksize - 1) >> inode->i_sb->s_blocksize_bits); 826 inode->i_sb->s_blocksize - 1) >>
827 inode->i_sb->s_blocksize_bits);
784 int numalloc = udf_prealloc_blocks(inode->i_sb, inode, 828 int numalloc = udf_prealloc_blocks(inode->i_sb, inode,
785 laarr[start].extLocation.partitionReferenceNum, 829 laarr[start].extLocation.partitionReferenceNum,
786 next, (UDF_DEFAULT_PREALLOC_BLOCKS > length ? length : 830 next, (UDF_DEFAULT_PREALLOC_BLOCKS > length ?
787 UDF_DEFAULT_PREALLOC_BLOCKS) - currlength); 831 length : UDF_DEFAULT_PREALLOC_BLOCKS) -
832 currlength);
788 if (numalloc) { 833 if (numalloc) {
789 if (start == (c + 1)) { 834 if (start == (c + 1))
790 laarr[start].extLength += 835 laarr[start].extLength +=
791 (numalloc << inode->i_sb->s_blocksize_bits); 836 (numalloc <<
792 } else { 837 inode->i_sb->s_blocksize_bits);
838 else {
793 memmove(&laarr[c + 2], &laarr[c + 1], 839 memmove(&laarr[c + 2], &laarr[c + 1],
794 sizeof(long_ad) * (*endnum - (c + 1))); 840 sizeof(long_ad) * (*endnum - (c + 1)));
795 (*endnum)++; 841 (*endnum)++;
796 laarr[c + 1].extLocation.logicalBlockNum = next; 842 laarr[c + 1].extLocation.logicalBlockNum = next;
797 laarr[c + 1].extLocation.partitionReferenceNum = 843 laarr[c + 1].extLocation.partitionReferenceNum =
798 laarr[c].extLocation.partitionReferenceNum; 844 laarr[c].extLocation.
799 laarr[c + 1].extLength = EXT_NOT_RECORDED_ALLOCATED | 845 partitionReferenceNum;
800 (numalloc << inode->i_sb->s_blocksize_bits); 846 laarr[c + 1].extLength =
847 EXT_NOT_RECORDED_ALLOCATED |
848 (numalloc <<
849 inode->i_sb->s_blocksize_bits);
801 start = c + 1; 850 start = c + 1;
802 } 851 }
803 852
804 for (i = start + 1; numalloc && i < *endnum; i++) { 853 for (i = start + 1; numalloc && i < *endnum; i++) {
805 int elen = ((laarr[i].extLength & UDF_EXTENT_LENGTH_MASK) + 854 int elen = ((laarr[i].extLength &
806 inode->i_sb->s_blocksize - 1) >> inode->i_sb->s_blocksize_bits; 855 UDF_EXTENT_LENGTH_MASK) +
856 inode->i_sb->s_blocksize - 1) >>
857 inode->i_sb->s_blocksize_bits;
807 858
808 if (elen > numalloc) { 859 if (elen > numalloc) {
809 laarr[i].extLength -= 860 laarr[i].extLength -=
810 (numalloc << inode->i_sb->s_blocksize_bits); 861 (numalloc <<
862 inode->i_sb->s_blocksize_bits);
811 numalloc = 0; 863 numalloc = 0;
812 } else { 864 } else {
813 numalloc -= elen; 865 numalloc -= elen;
814 if (*endnum > (i + 1)) 866 if (*endnum > (i + 1))
815 memmove(&laarr[i], &laarr[i + 1], 867 memmove(&laarr[i],
816 sizeof(long_ad) * (*endnum - (i + 1))); 868 &laarr[i + 1],
869 sizeof(long_ad) *
870 (*endnum - (i + 1)));
817 i--; 871 i--;
818 (*endnum)--; 872 (*endnum)--;
819 } 873 }
820 } 874 }
821 UDF_I_LENEXTENTS(inode) += numalloc << inode->i_sb->s_blocksize_bits; 875 UDF_I(inode)->i_lenExtents +=
876 numalloc << inode->i_sb->s_blocksize_bits;
822 } 877 }
823 } 878 }
824} 879}
@@ -828,70 +883,97 @@ static void udf_merge_extents(struct inode *inode,
828 int *endnum) 883 int *endnum)
829{ 884{
830 int i; 885 int i;
886 unsigned long blocksize = inode->i_sb->s_blocksize;
887 unsigned char blocksize_bits = inode->i_sb->s_blocksize_bits;
831 888
832 for (i = 0; i < (*endnum - 1); i++) { 889 for (i = 0; i < (*endnum - 1); i++) {
833 if ((laarr[i].extLength >> 30) == (laarr[i + 1].extLength >> 30)) { 890 kernel_long_ad *li /*l[i]*/ = &laarr[i];
834 if (((laarr[i].extLength >> 30) == (EXT_NOT_RECORDED_NOT_ALLOCATED >> 30)) || 891 kernel_long_ad *lip1 /*l[i plus 1]*/ = &laarr[i + 1];
835 ((laarr[i + 1].extLocation.logicalBlockNum - laarr[i].extLocation.logicalBlockNum) == 892
836 (((laarr[i].extLength & UDF_EXTENT_LENGTH_MASK) + 893 if (((li->extLength >> 30) == (lip1->extLength >> 30)) &&
837 inode->i_sb->s_blocksize - 1) >> inode->i_sb->s_blocksize_bits))) { 894 (((li->extLength >> 30) ==
838 if (((laarr[i].extLength & UDF_EXTENT_LENGTH_MASK) + 895 (EXT_NOT_RECORDED_NOT_ALLOCATED >> 30)) ||
839 (laarr[i + 1].extLength & UDF_EXTENT_LENGTH_MASK) + 896 ((lip1->extLocation.logicalBlockNum -
840 inode->i_sb->s_blocksize - 1) & ~UDF_EXTENT_LENGTH_MASK) { 897 li->extLocation.logicalBlockNum) ==
841 laarr[i + 1].extLength = (laarr[i + 1].extLength - 898 (((li->extLength & UDF_EXTENT_LENGTH_MASK) +
842 (laarr[i].extLength & UDF_EXTENT_LENGTH_MASK) + 899 blocksize - 1) >> blocksize_bits)))) {
843 UDF_EXTENT_LENGTH_MASK) & ~(inode->i_sb->s_blocksize - 1); 900
844 laarr[i].extLength = (laarr[i].extLength & UDF_EXTENT_FLAG_MASK) + 901 if (((li->extLength & UDF_EXTENT_LENGTH_MASK) +
845 (UDF_EXTENT_LENGTH_MASK + 1) - inode->i_sb->s_blocksize; 902 (lip1->extLength & UDF_EXTENT_LENGTH_MASK) +
846 laarr[i + 1].extLocation.logicalBlockNum = 903 blocksize - 1) & ~UDF_EXTENT_LENGTH_MASK) {
847 laarr[i].extLocation.logicalBlockNum + 904 lip1->extLength = (lip1->extLength -
848 ((laarr[i].extLength & UDF_EXTENT_LENGTH_MASK) >> 905 (li->extLength &
849 inode->i_sb->s_blocksize_bits); 906 UDF_EXTENT_LENGTH_MASK) +
850 } else { 907 UDF_EXTENT_LENGTH_MASK) &
851 laarr[i].extLength = laarr[i + 1].extLength + 908 ~(blocksize - 1);
852 (((laarr[i].extLength & UDF_EXTENT_LENGTH_MASK) + 909 li->extLength = (li->extLength &
853 inode->i_sb->s_blocksize - 1) & ~(inode->i_sb->s_blocksize - 1)); 910 UDF_EXTENT_FLAG_MASK) +
854 if (*endnum > (i + 2)) 911 (UDF_EXTENT_LENGTH_MASK + 1) -
855 memmove(&laarr[i + 1], &laarr[i + 2], 912 blocksize;
856 sizeof(long_ad) * (*endnum - (i + 2))); 913 lip1->extLocation.logicalBlockNum =
857 i--; 914 li->extLocation.logicalBlockNum +
858 (*endnum)--; 915 ((li->extLength &
859 } 916 UDF_EXTENT_LENGTH_MASK) >>
917 blocksize_bits);
918 } else {
919 li->extLength = lip1->extLength +
920 (((li->extLength &
921 UDF_EXTENT_LENGTH_MASK) +
922 blocksize - 1) & ~(blocksize - 1));
923 if (*endnum > (i + 2))
924 memmove(&laarr[i + 1], &laarr[i + 2],
925 sizeof(long_ad) *
926 (*endnum - (i + 2)));
927 i--;
928 (*endnum)--;
860 } 929 }
861 } else if (((laarr[i].extLength >> 30) == (EXT_NOT_RECORDED_ALLOCATED >> 30)) && 930 } else if (((li->extLength >> 30) ==
862 ((laarr[i + 1].extLength >> 30) == (EXT_NOT_RECORDED_NOT_ALLOCATED >> 30))) { 931 (EXT_NOT_RECORDED_ALLOCATED >> 30)) &&
863 udf_free_blocks(inode->i_sb, inode, laarr[i].extLocation, 0, 932 ((lip1->extLength >> 30) ==
864 ((laarr[i].extLength & UDF_EXTENT_LENGTH_MASK) + 933 (EXT_NOT_RECORDED_NOT_ALLOCATED >> 30))) {
865 inode->i_sb->s_blocksize - 1) >> inode->i_sb->s_blocksize_bits); 934 udf_free_blocks(inode->i_sb, inode, li->extLocation, 0,
866 laarr[i].extLocation.logicalBlockNum = 0; 935 ((li->extLength &
867 laarr[i].extLocation.partitionReferenceNum = 0; 936 UDF_EXTENT_LENGTH_MASK) +
868 937 blocksize - 1) >> blocksize_bits);
869 if (((laarr[i].extLength & UDF_EXTENT_LENGTH_MASK) + 938 li->extLocation.logicalBlockNum = 0;
870 (laarr[i + 1].extLength & UDF_EXTENT_LENGTH_MASK) + 939 li->extLocation.partitionReferenceNum = 0;
871 inode->i_sb->s_blocksize - 1) & ~UDF_EXTENT_LENGTH_MASK) { 940
872 laarr[i + 1].extLength = (laarr[i + 1].extLength - 941 if (((li->extLength & UDF_EXTENT_LENGTH_MASK) +
873 (laarr[i].extLength & UDF_EXTENT_LENGTH_MASK) + 942 (lip1->extLength & UDF_EXTENT_LENGTH_MASK) +
874 UDF_EXTENT_LENGTH_MASK) & ~(inode->i_sb->s_blocksize - 1); 943 blocksize - 1) & ~UDF_EXTENT_LENGTH_MASK) {
875 laarr[i].extLength = (laarr[i].extLength & UDF_EXTENT_FLAG_MASK) + 944 lip1->extLength = (lip1->extLength -
876 (UDF_EXTENT_LENGTH_MASK + 1) - inode->i_sb->s_blocksize; 945 (li->extLength &
946 UDF_EXTENT_LENGTH_MASK) +
947 UDF_EXTENT_LENGTH_MASK) &
948 ~(blocksize - 1);
949 li->extLength = (li->extLength &
950 UDF_EXTENT_FLAG_MASK) +
951 (UDF_EXTENT_LENGTH_MASK + 1) -
952 blocksize;
877 } else { 953 } else {
878 laarr[i].extLength = laarr[i + 1].extLength + 954 li->extLength = lip1->extLength +
879 (((laarr[i].extLength & UDF_EXTENT_LENGTH_MASK) + 955 (((li->extLength &
880 inode->i_sb->s_blocksize - 1) & ~(inode->i_sb->s_blocksize - 1)); 956 UDF_EXTENT_LENGTH_MASK) +
957 blocksize - 1) & ~(blocksize - 1));
881 if (*endnum > (i + 2)) 958 if (*endnum > (i + 2))
882 memmove(&laarr[i + 1], &laarr[i + 2], 959 memmove(&laarr[i + 1], &laarr[i + 2],
883 sizeof(long_ad) * (*endnum - (i + 2))); 960 sizeof(long_ad) *
961 (*endnum - (i + 2)));
884 i--; 962 i--;
885 (*endnum)--; 963 (*endnum)--;
886 } 964 }
887 } else if ((laarr[i].extLength >> 30) == (EXT_NOT_RECORDED_ALLOCATED >> 30)) { 965 } else if ((li->extLength >> 30) ==
888 udf_free_blocks(inode->i_sb, inode, laarr[i].extLocation, 0, 966 (EXT_NOT_RECORDED_ALLOCATED >> 30)) {
889 ((laarr[i].extLength & UDF_EXTENT_LENGTH_MASK) + 967 udf_free_blocks(inode->i_sb, inode,
890 inode->i_sb->s_blocksize - 1) >> inode->i_sb->s_blocksize_bits); 968 li->extLocation, 0,
891 laarr[i].extLocation.logicalBlockNum = 0; 969 ((li->extLength &
892 laarr[i].extLocation.partitionReferenceNum = 0; 970 UDF_EXTENT_LENGTH_MASK) +
893 laarr[i].extLength = (laarr[i].extLength & UDF_EXTENT_LENGTH_MASK) | 971 blocksize - 1) >> blocksize_bits);
894 EXT_NOT_RECORDED_NOT_ALLOCATED; 972 li->extLocation.logicalBlockNum = 0;
973 li->extLocation.partitionReferenceNum = 0;
974 li->extLength = (li->extLength &
975 UDF_EXTENT_LENGTH_MASK) |
976 EXT_NOT_RECORDED_NOT_ALLOCATED;
895 } 977 }
896 } 978 }
897} 979}
@@ -953,6 +1035,7 @@ void udf_truncate(struct inode *inode)
953{ 1035{
954 int offset; 1036 int offset;
955 int err; 1037 int err;
1038 struct udf_inode_info *iinfo;
956 1039
957 if (!(S_ISREG(inode->i_mode) || S_ISDIR(inode->i_mode) || 1040 if (!(S_ISREG(inode->i_mode) || S_ISDIR(inode->i_mode) ||
958 S_ISLNK(inode->i_mode))) 1041 S_ISLNK(inode->i_mode)))
@@ -961,25 +1044,28 @@ void udf_truncate(struct inode *inode)
961 return; 1044 return;
962 1045
963 lock_kernel(); 1046 lock_kernel();
964 if (UDF_I_ALLOCTYPE(inode) == ICBTAG_FLAG_AD_IN_ICB) { 1047 iinfo = UDF_I(inode);
965 if (inode->i_sb->s_blocksize < (udf_file_entry_alloc_offset(inode) + 1048 if (iinfo->i_alloc_type == ICBTAG_FLAG_AD_IN_ICB) {
966 inode->i_size)) { 1049 if (inode->i_sb->s_blocksize <
1050 (udf_file_entry_alloc_offset(inode) +
1051 inode->i_size)) {
967 udf_expand_file_adinicb(inode, inode->i_size, &err); 1052 udf_expand_file_adinicb(inode, inode->i_size, &err);
968 if (UDF_I_ALLOCTYPE(inode) == ICBTAG_FLAG_AD_IN_ICB) { 1053 if (iinfo->i_alloc_type == ICBTAG_FLAG_AD_IN_ICB) {
969 inode->i_size = UDF_I_LENALLOC(inode); 1054 inode->i_size = iinfo->i_lenAlloc;
970 unlock_kernel(); 1055 unlock_kernel();
971 return; 1056 return;
972 } else { 1057 } else
973 udf_truncate_extents(inode); 1058 udf_truncate_extents(inode);
974 }
975 } else { 1059 } else {
976 offset = inode->i_size & (inode->i_sb->s_blocksize - 1); 1060 offset = inode->i_size & (inode->i_sb->s_blocksize - 1);
977 memset(UDF_I_DATA(inode) + UDF_I_LENEATTR(inode) + offset, 0x00, 1061 memset(iinfo->i_ext.i_data + iinfo->i_lenEAttr + offset,
978 inode->i_sb->s_blocksize - offset - udf_file_entry_alloc_offset(inode)); 1062 0x00, inode->i_sb->s_blocksize -
979 UDF_I_LENALLOC(inode) = inode->i_size; 1063 offset - udf_file_entry_alloc_offset(inode));
1064 iinfo->i_lenAlloc = inode->i_size;
980 } 1065 }
981 } else { 1066 } else {
982 block_truncate_page(inode->i_mapping, inode->i_size, udf_get_block); 1067 block_truncate_page(inode->i_mapping, inode->i_size,
1068 udf_get_block);
983 udf_truncate_extents(inode); 1069 udf_truncate_extents(inode);
984 } 1070 }
985 1071
@@ -996,6 +1082,7 @@ static void __udf_read_inode(struct inode *inode)
996 struct buffer_head *bh = NULL; 1082 struct buffer_head *bh = NULL;
997 struct fileEntry *fe; 1083 struct fileEntry *fe;
998 uint16_t ident; 1084 uint16_t ident;
1085 struct udf_inode_info *iinfo = UDF_I(inode);
999 1086
1000 /* 1087 /*
1001 * Set defaults, but the inode is still incomplete! 1088 * Set defaults, but the inode is still incomplete!
@@ -1009,7 +1096,7 @@ static void __udf_read_inode(struct inode *inode)
1009 * i_nlink = 1 1096 * i_nlink = 1
1010 * i_op = NULL; 1097 * i_op = NULL;
1011 */ 1098 */
1012 bh = udf_read_ptagged(inode->i_sb, UDF_I_LOCATION(inode), 0, &ident); 1099 bh = udf_read_ptagged(inode->i_sb, iinfo->i_location, 0, &ident);
1013 if (!bh) { 1100 if (!bh) {
1014 printk(KERN_ERR "udf: udf_read_inode(ino %ld) failed !bh\n", 1101 printk(KERN_ERR "udf: udf_read_inode(ino %ld) failed !bh\n",
1015 inode->i_ino); 1102 inode->i_ino);
@@ -1019,8 +1106,8 @@ static void __udf_read_inode(struct inode *inode)
1019 1106
1020 if (ident != TAG_IDENT_FE && ident != TAG_IDENT_EFE && 1107 if (ident != TAG_IDENT_FE && ident != TAG_IDENT_EFE &&
1021 ident != TAG_IDENT_USE) { 1108 ident != TAG_IDENT_USE) {
1022 printk(KERN_ERR "udf: udf_read_inode(ino %ld) failed ident=%d\n", 1109 printk(KERN_ERR "udf: udf_read_inode(ino %ld) "
1023 inode->i_ino, ident); 1110 "failed ident=%d\n", inode->i_ino, ident);
1024 brelse(bh); 1111 brelse(bh);
1025 make_bad_inode(inode); 1112 make_bad_inode(inode);
1026 return; 1113 return;
@@ -1028,11 +1115,12 @@ static void __udf_read_inode(struct inode *inode)
1028 1115
1029 fe = (struct fileEntry *)bh->b_data; 1116 fe = (struct fileEntry *)bh->b_data;
1030 1117
1031 if (le16_to_cpu(fe->icbTag.strategyType) == 4096) { 1118 if (fe->icbTag.strategyType == cpu_to_le16(4096)) {
1032 struct buffer_head *ibh = NULL, *nbh = NULL; 1119 struct buffer_head *ibh = NULL, *nbh = NULL;
1033 struct indirectEntry *ie; 1120 struct indirectEntry *ie;
1034 1121
1035 ibh = udf_read_ptagged(inode->i_sb, UDF_I_LOCATION(inode), 1, &ident); 1122 ibh = udf_read_ptagged(inode->i_sb, iinfo->i_location, 1,
1123 &ident);
1036 if (ident == TAG_IDENT_IE) { 1124 if (ident == TAG_IDENT_IE) {
1037 if (ibh) { 1125 if (ibh) {
1038 kernel_lb_addr loc; 1126 kernel_lb_addr loc;
@@ -1041,10 +1129,12 @@ static void __udf_read_inode(struct inode *inode)
1041 loc = lelb_to_cpu(ie->indirectICB.extLocation); 1129 loc = lelb_to_cpu(ie->indirectICB.extLocation);
1042 1130
1043 if (ie->indirectICB.extLength && 1131 if (ie->indirectICB.extLength &&
1044 (nbh = udf_read_ptagged(inode->i_sb, loc, 0, &ident))) { 1132 (nbh = udf_read_ptagged(inode->i_sb, loc, 0,
1133 &ident))) {
1045 if (ident == TAG_IDENT_FE || 1134 if (ident == TAG_IDENT_FE ||
1046 ident == TAG_IDENT_EFE) { 1135 ident == TAG_IDENT_EFE) {
1047 memcpy(&UDF_I_LOCATION(inode), &loc, 1136 memcpy(&iinfo->i_location,
1137 &loc,
1048 sizeof(kernel_lb_addr)); 1138 sizeof(kernel_lb_addr));
1049 brelse(bh); 1139 brelse(bh);
1050 brelse(ibh); 1140 brelse(ibh);
@@ -1062,7 +1152,7 @@ static void __udf_read_inode(struct inode *inode)
1062 } else { 1152 } else {
1063 brelse(ibh); 1153 brelse(ibh);
1064 } 1154 }
1065 } else if (le16_to_cpu(fe->icbTag.strategyType) != 4) { 1155 } else if (fe->icbTag.strategyType != cpu_to_le16(4)) {
1066 printk(KERN_ERR "udf: unsupported strategy type: %d\n", 1156 printk(KERN_ERR "udf: unsupported strategy type: %d\n",
1067 le16_to_cpu(fe->icbTag.strategyType)); 1157 le16_to_cpu(fe->icbTag.strategyType));
1068 brelse(bh); 1158 brelse(bh);
@@ -1081,51 +1171,63 @@ static void udf_fill_inode(struct inode *inode, struct buffer_head *bh)
1081 time_t convtime; 1171 time_t convtime;
1082 long convtime_usec; 1172 long convtime_usec;
1083 int offset; 1173 int offset;
1174 struct udf_sb_info *sbi = UDF_SB(inode->i_sb);
1175 struct udf_inode_info *iinfo = UDF_I(inode);
1084 1176
1085 fe = (struct fileEntry *)bh->b_data; 1177 fe = (struct fileEntry *)bh->b_data;
1086 efe = (struct extendedFileEntry *)bh->b_data; 1178 efe = (struct extendedFileEntry *)bh->b_data;
1087 1179
1088 if (le16_to_cpu(fe->icbTag.strategyType) == 4) 1180 if (fe->icbTag.strategyType == cpu_to_le16(4))
1089 UDF_I_STRAT4096(inode) = 0; 1181 iinfo->i_strat4096 = 0;
1090 else /* if (le16_to_cpu(fe->icbTag.strategyType) == 4096) */ 1182 else /* if (fe->icbTag.strategyType == cpu_to_le16(4096)) */
1091 UDF_I_STRAT4096(inode) = 1; 1183 iinfo->i_strat4096 = 1;
1092 1184
1093 UDF_I_ALLOCTYPE(inode) = le16_to_cpu(fe->icbTag.flags) & ICBTAG_FLAG_AD_MASK; 1185 iinfo->i_alloc_type = le16_to_cpu(fe->icbTag.flags) &
1094 UDF_I_UNIQUE(inode) = 0; 1186 ICBTAG_FLAG_AD_MASK;
1095 UDF_I_LENEATTR(inode) = 0; 1187 iinfo->i_unique = 0;
1096 UDF_I_LENEXTENTS(inode) = 0; 1188 iinfo->i_lenEAttr = 0;
1097 UDF_I_LENALLOC(inode) = 0; 1189 iinfo->i_lenExtents = 0;
1098 UDF_I_NEXT_ALLOC_BLOCK(inode) = 0; 1190 iinfo->i_lenAlloc = 0;
1099 UDF_I_NEXT_ALLOC_GOAL(inode) = 0; 1191 iinfo->i_next_alloc_block = 0;
1100 if (le16_to_cpu(fe->descTag.tagIdent) == TAG_IDENT_EFE) { 1192 iinfo->i_next_alloc_goal = 0;
1101 UDF_I_EFE(inode) = 1; 1193 if (fe->descTag.tagIdent == cpu_to_le16(TAG_IDENT_EFE)) {
1102 UDF_I_USE(inode) = 0; 1194 iinfo->i_efe = 1;
1103 if (udf_alloc_i_data(inode, inode->i_sb->s_blocksize - sizeof(struct extendedFileEntry))) { 1195 iinfo->i_use = 0;
1196 if (udf_alloc_i_data(inode, inode->i_sb->s_blocksize -
1197 sizeof(struct extendedFileEntry))) {
1104 make_bad_inode(inode); 1198 make_bad_inode(inode);
1105 return; 1199 return;
1106 } 1200 }
1107 memcpy(UDF_I_DATA(inode), bh->b_data + sizeof(struct extendedFileEntry), 1201 memcpy(iinfo->i_ext.i_data,
1108 inode->i_sb->s_blocksize - sizeof(struct extendedFileEntry)); 1202 bh->b_data + sizeof(struct extendedFileEntry),
1109 } else if (le16_to_cpu(fe->descTag.tagIdent) == TAG_IDENT_FE) { 1203 inode->i_sb->s_blocksize -
1110 UDF_I_EFE(inode) = 0; 1204 sizeof(struct extendedFileEntry));
1111 UDF_I_USE(inode) = 0; 1205 } else if (fe->descTag.tagIdent == cpu_to_le16(TAG_IDENT_FE)) {
1112 if (udf_alloc_i_data(inode, inode->i_sb->s_blocksize - sizeof(struct fileEntry))) { 1206 iinfo->i_efe = 0;
1207 iinfo->i_use = 0;
1208 if (udf_alloc_i_data(inode, inode->i_sb->s_blocksize -
1209 sizeof(struct fileEntry))) {
1113 make_bad_inode(inode); 1210 make_bad_inode(inode);
1114 return; 1211 return;
1115 } 1212 }
1116 memcpy(UDF_I_DATA(inode), bh->b_data + sizeof(struct fileEntry), 1213 memcpy(iinfo->i_ext.i_data,
1214 bh->b_data + sizeof(struct fileEntry),
1117 inode->i_sb->s_blocksize - sizeof(struct fileEntry)); 1215 inode->i_sb->s_blocksize - sizeof(struct fileEntry));
1118 } else if (le16_to_cpu(fe->descTag.tagIdent) == TAG_IDENT_USE) { 1216 } else if (fe->descTag.tagIdent == cpu_to_le16(TAG_IDENT_USE)) {
1119 UDF_I_EFE(inode) = 0; 1217 iinfo->i_efe = 0;
1120 UDF_I_USE(inode) = 1; 1218 iinfo->i_use = 1;
1121 UDF_I_LENALLOC(inode) = 1219 iinfo->i_lenAlloc = le32_to_cpu(
1122 le32_to_cpu(((struct unallocSpaceEntry *)bh->b_data)->lengthAllocDescs); 1220 ((struct unallocSpaceEntry *)bh->b_data)->
1123 if (udf_alloc_i_data(inode, inode->i_sb->s_blocksize - sizeof(struct unallocSpaceEntry))) { 1221 lengthAllocDescs);
1222 if (udf_alloc_i_data(inode, inode->i_sb->s_blocksize -
1223 sizeof(struct unallocSpaceEntry))) {
1124 make_bad_inode(inode); 1224 make_bad_inode(inode);
1125 return; 1225 return;
1126 } 1226 }
1127 memcpy(UDF_I_DATA(inode), bh->b_data + sizeof(struct unallocSpaceEntry), 1227 memcpy(iinfo->i_ext.i_data,
1128 inode->i_sb->s_blocksize - sizeof(struct unallocSpaceEntry)); 1228 bh->b_data + sizeof(struct unallocSpaceEntry),
1229 inode->i_sb->s_blocksize -
1230 sizeof(struct unallocSpaceEntry));
1129 return; 1231 return;
1130 } 1232 }
1131 1233
@@ -1146,12 +1248,12 @@ static void udf_fill_inode(struct inode *inode, struct buffer_head *bh)
1146 inode->i_nlink = 1; 1248 inode->i_nlink = 1;
1147 1249
1148 inode->i_size = le64_to_cpu(fe->informationLength); 1250 inode->i_size = le64_to_cpu(fe->informationLength);
1149 UDF_I_LENEXTENTS(inode) = inode->i_size; 1251 iinfo->i_lenExtents = inode->i_size;
1150 1252
1151 inode->i_mode = udf_convert_permissions(fe); 1253 inode->i_mode = udf_convert_permissions(fe);
1152 inode->i_mode &= ~UDF_SB(inode->i_sb)->s_umask; 1254 inode->i_mode &= ~UDF_SB(inode->i_sb)->s_umask;
1153 1255
1154 if (UDF_I_EFE(inode) == 0) { 1256 if (iinfo->i_efe == 0) {
1155 inode->i_blocks = le64_to_cpu(fe->logicalBlocksRecorded) << 1257 inode->i_blocks = le64_to_cpu(fe->logicalBlocksRecorded) <<
1156 (inode->i_sb->s_blocksize_bits - 9); 1258 (inode->i_sb->s_blocksize_bits - 9);
1157 1259
@@ -1160,7 +1262,7 @@ static void udf_fill_inode(struct inode *inode, struct buffer_head *bh)
1160 inode->i_atime.tv_sec = convtime; 1262 inode->i_atime.tv_sec = convtime;
1161 inode->i_atime.tv_nsec = convtime_usec * 1000; 1263 inode->i_atime.tv_nsec = convtime_usec * 1000;
1162 } else { 1264 } else {
1163 inode->i_atime = UDF_SB_RECORDTIME(inode->i_sb); 1265 inode->i_atime = sbi->s_record_time;
1164 } 1266 }
1165 1267
1166 if (udf_stamp_to_time(&convtime, &convtime_usec, 1268 if (udf_stamp_to_time(&convtime, &convtime_usec,
@@ -1168,7 +1270,7 @@ static void udf_fill_inode(struct inode *inode, struct buffer_head *bh)
1168 inode->i_mtime.tv_sec = convtime; 1270 inode->i_mtime.tv_sec = convtime;
1169 inode->i_mtime.tv_nsec = convtime_usec * 1000; 1271 inode->i_mtime.tv_nsec = convtime_usec * 1000;
1170 } else { 1272 } else {
1171 inode->i_mtime = UDF_SB_RECORDTIME(inode->i_sb); 1273 inode->i_mtime = sbi->s_record_time;
1172 } 1274 }
1173 1275
1174 if (udf_stamp_to_time(&convtime, &convtime_usec, 1276 if (udf_stamp_to_time(&convtime, &convtime_usec,
@@ -1176,13 +1278,13 @@ static void udf_fill_inode(struct inode *inode, struct buffer_head *bh)
1176 inode->i_ctime.tv_sec = convtime; 1278 inode->i_ctime.tv_sec = convtime;
1177 inode->i_ctime.tv_nsec = convtime_usec * 1000; 1279 inode->i_ctime.tv_nsec = convtime_usec * 1000;
1178 } else { 1280 } else {
1179 inode->i_ctime = UDF_SB_RECORDTIME(inode->i_sb); 1281 inode->i_ctime = sbi->s_record_time;
1180 } 1282 }
1181 1283
1182 UDF_I_UNIQUE(inode) = le64_to_cpu(fe->uniqueID); 1284 iinfo->i_unique = le64_to_cpu(fe->uniqueID);
1183 UDF_I_LENEATTR(inode) = le32_to_cpu(fe->lengthExtendedAttr); 1285 iinfo->i_lenEAttr = le32_to_cpu(fe->lengthExtendedAttr);
1184 UDF_I_LENALLOC(inode) = le32_to_cpu(fe->lengthAllocDescs); 1286 iinfo->i_lenAlloc = le32_to_cpu(fe->lengthAllocDescs);
1185 offset = sizeof(struct fileEntry) + UDF_I_LENEATTR(inode); 1287 offset = sizeof(struct fileEntry) + iinfo->i_lenEAttr;
1186 } else { 1288 } else {
1187 inode->i_blocks = le64_to_cpu(efe->logicalBlocksRecorded) << 1289 inode->i_blocks = le64_to_cpu(efe->logicalBlocksRecorded) <<
1188 (inode->i_sb->s_blocksize_bits - 9); 1290 (inode->i_sb->s_blocksize_bits - 9);
@@ -1192,7 +1294,7 @@ static void udf_fill_inode(struct inode *inode, struct buffer_head *bh)
1192 inode->i_atime.tv_sec = convtime; 1294 inode->i_atime.tv_sec = convtime;
1193 inode->i_atime.tv_nsec = convtime_usec * 1000; 1295 inode->i_atime.tv_nsec = convtime_usec * 1000;
1194 } else { 1296 } else {
1195 inode->i_atime = UDF_SB_RECORDTIME(inode->i_sb); 1297 inode->i_atime = sbi->s_record_time;
1196 } 1298 }
1197 1299
1198 if (udf_stamp_to_time(&convtime, &convtime_usec, 1300 if (udf_stamp_to_time(&convtime, &convtime_usec,
@@ -1200,15 +1302,15 @@ static void udf_fill_inode(struct inode *inode, struct buffer_head *bh)
1200 inode->i_mtime.tv_sec = convtime; 1302 inode->i_mtime.tv_sec = convtime;
1201 inode->i_mtime.tv_nsec = convtime_usec * 1000; 1303 inode->i_mtime.tv_nsec = convtime_usec * 1000;
1202 } else { 1304 } else {
1203 inode->i_mtime = UDF_SB_RECORDTIME(inode->i_sb); 1305 inode->i_mtime = sbi->s_record_time;
1204 } 1306 }
1205 1307
1206 if (udf_stamp_to_time(&convtime, &convtime_usec, 1308 if (udf_stamp_to_time(&convtime, &convtime_usec,
1207 lets_to_cpu(efe->createTime))) { 1309 lets_to_cpu(efe->createTime))) {
1208 UDF_I_CRTIME(inode).tv_sec = convtime; 1310 iinfo->i_crtime.tv_sec = convtime;
1209 UDF_I_CRTIME(inode).tv_nsec = convtime_usec * 1000; 1311 iinfo->i_crtime.tv_nsec = convtime_usec * 1000;
1210 } else { 1312 } else {
1211 UDF_I_CRTIME(inode) = UDF_SB_RECORDTIME(inode->i_sb); 1313 iinfo->i_crtime = sbi->s_record_time;
1212 } 1314 }
1213 1315
1214 if (udf_stamp_to_time(&convtime, &convtime_usec, 1316 if (udf_stamp_to_time(&convtime, &convtime_usec,
@@ -1216,13 +1318,14 @@ static void udf_fill_inode(struct inode *inode, struct buffer_head *bh)
1216 inode->i_ctime.tv_sec = convtime; 1318 inode->i_ctime.tv_sec = convtime;
1217 inode->i_ctime.tv_nsec = convtime_usec * 1000; 1319 inode->i_ctime.tv_nsec = convtime_usec * 1000;
1218 } else { 1320 } else {
1219 inode->i_ctime = UDF_SB_RECORDTIME(inode->i_sb); 1321 inode->i_ctime = sbi->s_record_time;
1220 } 1322 }
1221 1323
1222 UDF_I_UNIQUE(inode) = le64_to_cpu(efe->uniqueID); 1324 iinfo->i_unique = le64_to_cpu(efe->uniqueID);
1223 UDF_I_LENEATTR(inode) = le32_to_cpu(efe->lengthExtendedAttr); 1325 iinfo->i_lenEAttr = le32_to_cpu(efe->lengthExtendedAttr);
1224 UDF_I_LENALLOC(inode) = le32_to_cpu(efe->lengthAllocDescs); 1326 iinfo->i_lenAlloc = le32_to_cpu(efe->lengthAllocDescs);
1225 offset = sizeof(struct extendedFileEntry) + UDF_I_LENEATTR(inode); 1327 offset = sizeof(struct extendedFileEntry) +
1328 iinfo->i_lenEAttr;
1226 } 1329 }
1227 1330
1228 switch (fe->icbTag.fileType) { 1331 switch (fe->icbTag.fileType) {
@@ -1235,7 +1338,7 @@ static void udf_fill_inode(struct inode *inode, struct buffer_head *bh)
1235 case ICBTAG_FILE_TYPE_REALTIME: 1338 case ICBTAG_FILE_TYPE_REALTIME:
1236 case ICBTAG_FILE_TYPE_REGULAR: 1339 case ICBTAG_FILE_TYPE_REGULAR:
1237 case ICBTAG_FILE_TYPE_UNDEF: 1340 case ICBTAG_FILE_TYPE_UNDEF:
1238 if (UDF_I_ALLOCTYPE(inode) == ICBTAG_FLAG_AD_IN_ICB) 1341 if (iinfo->i_alloc_type == ICBTAG_FLAG_AD_IN_ICB)
1239 inode->i_data.a_ops = &udf_adinicb_aops; 1342 inode->i_data.a_ops = &udf_adinicb_aops;
1240 else 1343 else
1241 inode->i_data.a_ops = &udf_aops; 1344 inode->i_data.a_ops = &udf_aops;
@@ -1261,31 +1364,33 @@ static void udf_fill_inode(struct inode *inode, struct buffer_head *bh)
1261 inode->i_mode = S_IFLNK | S_IRWXUGO; 1364 inode->i_mode = S_IFLNK | S_IRWXUGO;
1262 break; 1365 break;
1263 default: 1366 default:
1264 printk(KERN_ERR "udf: udf_fill_inode(ino %ld) failed unknown file type=%d\n", 1367 printk(KERN_ERR "udf: udf_fill_inode(ino %ld) failed unknown "
1265 inode->i_ino, fe->icbTag.fileType); 1368 "file type=%d\n", inode->i_ino,
1369 fe->icbTag.fileType);
1266 make_bad_inode(inode); 1370 make_bad_inode(inode);
1267 return; 1371 return;
1268 } 1372 }
1269 if (S_ISCHR(inode->i_mode) || S_ISBLK(inode->i_mode)) { 1373 if (S_ISCHR(inode->i_mode) || S_ISBLK(inode->i_mode)) {
1270 struct deviceSpec *dsea = (struct deviceSpec *)udf_get_extendedattr(inode, 12, 1); 1374 struct deviceSpec *dsea =
1375 (struct deviceSpec *)udf_get_extendedattr(inode, 12, 1);
1271 if (dsea) { 1376 if (dsea) {
1272 init_special_inode(inode, inode->i_mode, 1377 init_special_inode(inode, inode->i_mode,
1273 MKDEV(le32_to_cpu(dsea->majorDeviceIdent), 1378 MKDEV(le32_to_cpu(dsea->majorDeviceIdent),
1274 le32_to_cpu(dsea->minorDeviceIdent))); 1379 le32_to_cpu(dsea->minorDeviceIdent)));
1275 /* Developer ID ??? */ 1380 /* Developer ID ??? */
1276 } else { 1381 } else
1277 make_bad_inode(inode); 1382 make_bad_inode(inode);
1278 }
1279 } 1383 }
1280} 1384}
1281 1385
1282static int udf_alloc_i_data(struct inode *inode, size_t size) 1386static int udf_alloc_i_data(struct inode *inode, size_t size)
1283{ 1387{
1284 UDF_I_DATA(inode) = kmalloc(size, GFP_KERNEL); 1388 struct udf_inode_info *iinfo = UDF_I(inode);
1389 iinfo->i_ext.i_data = kmalloc(size, GFP_KERNEL);
1285 1390
1286 if (!UDF_I_DATA(inode)) { 1391 if (!iinfo->i_ext.i_data) {
1287 printk(KERN_ERR "udf:udf_alloc_i_data (ino %ld) no free memory\n", 1392 printk(KERN_ERR "udf:udf_alloc_i_data (ino %ld) "
1288 inode->i_ino); 1393 "no free memory\n", inode->i_ino);
1289 return -ENOMEM; 1394 return -ENOMEM;
1290 } 1395 }
1291 1396
@@ -1301,12 +1406,12 @@ static mode_t udf_convert_permissions(struct fileEntry *fe)
1301 permissions = le32_to_cpu(fe->permissions); 1406 permissions = le32_to_cpu(fe->permissions);
1302 flags = le16_to_cpu(fe->icbTag.flags); 1407 flags = le16_to_cpu(fe->icbTag.flags);
1303 1408
1304 mode = (( permissions ) & S_IRWXO) | 1409 mode = ((permissions) & S_IRWXO) |
1305 (( permissions >> 2 ) & S_IRWXG) | 1410 ((permissions >> 2) & S_IRWXG) |
1306 (( permissions >> 4 ) & S_IRWXU) | 1411 ((permissions >> 4) & S_IRWXU) |
1307 (( flags & ICBTAG_FLAG_SETUID) ? S_ISUID : 0) | 1412 ((flags & ICBTAG_FLAG_SETUID) ? S_ISUID : 0) |
1308 (( flags & ICBTAG_FLAG_SETGID) ? S_ISGID : 0) | 1413 ((flags & ICBTAG_FLAG_SETGID) ? S_ISGID : 0) |
1309 (( flags & ICBTAG_FLAG_STICKY) ? S_ISVTX : 0); 1414 ((flags & ICBTAG_FLAG_STICKY) ? S_ISVTX : 0);
1310 1415
1311 return mode; 1416 return mode;
1312} 1417}
@@ -1350,11 +1455,15 @@ static int udf_update_inode(struct inode *inode, int do_sync)
1350 uint32_t udfperms; 1455 uint32_t udfperms;
1351 uint16_t icbflags; 1456 uint16_t icbflags;
1352 uint16_t crclen; 1457 uint16_t crclen;
1353 int i;
1354 kernel_timestamp cpu_time; 1458 kernel_timestamp cpu_time;
1355 int err = 0; 1459 int err = 0;
1460 struct udf_sb_info *sbi = UDF_SB(inode->i_sb);
1461 unsigned char blocksize_bits = inode->i_sb->s_blocksize_bits;
1462 struct udf_inode_info *iinfo = UDF_I(inode);
1356 1463
1357 bh = udf_tread(inode->i_sb, udf_get_lb_pblock(inode->i_sb, UDF_I_LOCATION(inode), 0)); 1464 bh = udf_tread(inode->i_sb,
1465 udf_get_lb_pblock(inode->i_sb,
1466 iinfo->i_location, 0));
1358 if (!bh) { 1467 if (!bh) {
1359 udf_debug("bread failure\n"); 1468 udf_debug("bread failure\n");
1360 return -EIO; 1469 return -EIO;
@@ -1365,23 +1474,24 @@ static int udf_update_inode(struct inode *inode, int do_sync)
1365 fe = (struct fileEntry *)bh->b_data; 1474 fe = (struct fileEntry *)bh->b_data;
1366 efe = (struct extendedFileEntry *)bh->b_data; 1475 efe = (struct extendedFileEntry *)bh->b_data;
1367 1476
1368 if (le16_to_cpu(fe->descTag.tagIdent) == TAG_IDENT_USE) { 1477 if (fe->descTag.tagIdent == cpu_to_le16(TAG_IDENT_USE)) {
1369 struct unallocSpaceEntry *use = 1478 struct unallocSpaceEntry *use =
1370 (struct unallocSpaceEntry *)bh->b_data; 1479 (struct unallocSpaceEntry *)bh->b_data;
1371 1480
1372 use->lengthAllocDescs = cpu_to_le32(UDF_I_LENALLOC(inode)); 1481 use->lengthAllocDescs = cpu_to_le32(iinfo->i_lenAlloc);
1373 memcpy(bh->b_data + sizeof(struct unallocSpaceEntry), UDF_I_DATA(inode), 1482 memcpy(bh->b_data + sizeof(struct unallocSpaceEntry),
1374 inode->i_sb->s_blocksize - sizeof(struct unallocSpaceEntry)); 1483 iinfo->i_ext.i_data, inode->i_sb->s_blocksize -
1375 crclen = sizeof(struct unallocSpaceEntry) + UDF_I_LENALLOC(inode) - sizeof(tag); 1484 sizeof(struct unallocSpaceEntry));
1376 use->descTag.tagLocation = cpu_to_le32(UDF_I_LOCATION(inode).logicalBlockNum); 1485 crclen = sizeof(struct unallocSpaceEntry) +
1486 iinfo->i_lenAlloc - sizeof(tag);
1487 use->descTag.tagLocation = cpu_to_le32(
1488 iinfo->i_location.
1489 logicalBlockNum);
1377 use->descTag.descCRCLength = cpu_to_le16(crclen); 1490 use->descTag.descCRCLength = cpu_to_le16(crclen);
1378 use->descTag.descCRC = cpu_to_le16(udf_crc((char *)use + sizeof(tag), crclen, 0)); 1491 use->descTag.descCRC = cpu_to_le16(udf_crc((char *)use +
1379 1492 sizeof(tag), crclen,
1380 use->descTag.tagChecksum = 0; 1493 0));
1381 for (i = 0; i < 16; i++) { 1494 use->descTag.tagChecksum = udf_tag_checksum(&use->descTag);
1382 if (i != 4)
1383 use->descTag.tagChecksum += ((uint8_t *)&(use->descTag))[i];
1384 }
1385 1495
1386 mark_buffer_dirty(bh); 1496 mark_buffer_dirty(bh);
1387 brelse(bh); 1497 brelse(bh);
@@ -1398,14 +1508,14 @@ static int udf_update_inode(struct inode *inode, int do_sync)
1398 else 1508 else
1399 fe->gid = cpu_to_le32(inode->i_gid); 1509 fe->gid = cpu_to_le32(inode->i_gid);
1400 1510
1401 udfperms = ((inode->i_mode & S_IRWXO) ) | 1511 udfperms = ((inode->i_mode & S_IRWXO)) |
1402 ((inode->i_mode & S_IRWXG) << 2) | 1512 ((inode->i_mode & S_IRWXG) << 2) |
1403 ((inode->i_mode & S_IRWXU) << 4); 1513 ((inode->i_mode & S_IRWXU) << 4);
1404 1514
1405 udfperms |= (le32_to_cpu(fe->permissions) & 1515 udfperms |= (le32_to_cpu(fe->permissions) &
1406 (FE_PERM_O_DELETE | FE_PERM_O_CHATTR | 1516 (FE_PERM_O_DELETE | FE_PERM_O_CHATTR |
1407 FE_PERM_G_DELETE | FE_PERM_G_CHATTR | 1517 FE_PERM_G_DELETE | FE_PERM_G_CHATTR |
1408 FE_PERM_U_DELETE | FE_PERM_U_CHATTR)); 1518 FE_PERM_U_DELETE | FE_PERM_U_CHATTR));
1409 fe->permissions = cpu_to_le32(udfperms); 1519 fe->permissions = cpu_to_le32(udfperms);
1410 1520
1411 if (S_ISDIR(inode->i_mode)) 1521 if (S_ISDIR(inode->i_mode))
@@ -1426,8 +1536,9 @@ static int udf_update_inode(struct inode *inode, int do_sync)
1426 sizeof(regid), 12, 0x3); 1536 sizeof(regid), 12, 0x3);
1427 dsea->attrType = cpu_to_le32(12); 1537 dsea->attrType = cpu_to_le32(12);
1428 dsea->attrSubtype = 1; 1538 dsea->attrSubtype = 1;
1429 dsea->attrLength = cpu_to_le32(sizeof(struct deviceSpec) + 1539 dsea->attrLength = cpu_to_le32(
1430 sizeof(regid)); 1540 sizeof(struct deviceSpec) +
1541 sizeof(regid));
1431 dsea->impUseLength = cpu_to_le32(sizeof(regid)); 1542 dsea->impUseLength = cpu_to_le32(sizeof(regid));
1432 } 1543 }
1433 eid = (regid *)dsea->impUse; 1544 eid = (regid *)dsea->impUse;
@@ -1439,12 +1550,13 @@ static int udf_update_inode(struct inode *inode, int do_sync)
1439 dsea->minorDeviceIdent = cpu_to_le32(iminor(inode)); 1550 dsea->minorDeviceIdent = cpu_to_le32(iminor(inode));
1440 } 1551 }
1441 1552
1442 if (UDF_I_EFE(inode) == 0) { 1553 if (iinfo->i_efe == 0) {
1443 memcpy(bh->b_data + sizeof(struct fileEntry), UDF_I_DATA(inode), 1554 memcpy(bh->b_data + sizeof(struct fileEntry),
1555 iinfo->i_ext.i_data,
1444 inode->i_sb->s_blocksize - sizeof(struct fileEntry)); 1556 inode->i_sb->s_blocksize - sizeof(struct fileEntry));
1445 fe->logicalBlocksRecorded = cpu_to_le64( 1557 fe->logicalBlocksRecorded = cpu_to_le64(
1446 (inode->i_blocks + (1 << (inode->i_sb->s_blocksize_bits - 9)) - 1) >> 1558 (inode->i_blocks + (1 << (blocksize_bits - 9)) - 1) >>
1447 (inode->i_sb->s_blocksize_bits - 9)); 1559 (blocksize_bits - 9));
1448 1560
1449 if (udf_time_to_stamp(&cpu_time, inode->i_atime)) 1561 if (udf_time_to_stamp(&cpu_time, inode->i_atime))
1450 fe->accessTime = cpu_to_lets(cpu_time); 1562 fe->accessTime = cpu_to_lets(cpu_time);
@@ -1456,40 +1568,41 @@ static int udf_update_inode(struct inode *inode, int do_sync)
1456 strcpy(fe->impIdent.ident, UDF_ID_DEVELOPER); 1568 strcpy(fe->impIdent.ident, UDF_ID_DEVELOPER);
1457 fe->impIdent.identSuffix[0] = UDF_OS_CLASS_UNIX; 1569 fe->impIdent.identSuffix[0] = UDF_OS_CLASS_UNIX;
1458 fe->impIdent.identSuffix[1] = UDF_OS_ID_LINUX; 1570 fe->impIdent.identSuffix[1] = UDF_OS_ID_LINUX;
1459 fe->uniqueID = cpu_to_le64(UDF_I_UNIQUE(inode)); 1571 fe->uniqueID = cpu_to_le64(iinfo->i_unique);
1460 fe->lengthExtendedAttr = cpu_to_le32(UDF_I_LENEATTR(inode)); 1572 fe->lengthExtendedAttr = cpu_to_le32(iinfo->i_lenEAttr);
1461 fe->lengthAllocDescs = cpu_to_le32(UDF_I_LENALLOC(inode)); 1573 fe->lengthAllocDescs = cpu_to_le32(iinfo->i_lenAlloc);
1462 fe->descTag.tagIdent = cpu_to_le16(TAG_IDENT_FE); 1574 fe->descTag.tagIdent = cpu_to_le16(TAG_IDENT_FE);
1463 crclen = sizeof(struct fileEntry); 1575 crclen = sizeof(struct fileEntry);
1464 } else { 1576 } else {
1465 memcpy(bh->b_data + sizeof(struct extendedFileEntry), UDF_I_DATA(inode), 1577 memcpy(bh->b_data + sizeof(struct extendedFileEntry),
1466 inode->i_sb->s_blocksize - sizeof(struct extendedFileEntry)); 1578 iinfo->i_ext.i_data,
1579 inode->i_sb->s_blocksize -
1580 sizeof(struct extendedFileEntry));
1467 efe->objectSize = cpu_to_le64(inode->i_size); 1581 efe->objectSize = cpu_to_le64(inode->i_size);
1468 efe->logicalBlocksRecorded = cpu_to_le64( 1582 efe->logicalBlocksRecorded = cpu_to_le64(
1469 (inode->i_blocks + (1 << (inode->i_sb->s_blocksize_bits - 9)) - 1) >> 1583 (inode->i_blocks + (1 << (blocksize_bits - 9)) - 1) >>
1470 (inode->i_sb->s_blocksize_bits - 9)); 1584 (blocksize_bits - 9));
1471 1585
1472 if (UDF_I_CRTIME(inode).tv_sec > inode->i_atime.tv_sec || 1586 if (iinfo->i_crtime.tv_sec > inode->i_atime.tv_sec ||
1473 (UDF_I_CRTIME(inode).tv_sec == inode->i_atime.tv_sec && 1587 (iinfo->i_crtime.tv_sec == inode->i_atime.tv_sec &&
1474 UDF_I_CRTIME(inode).tv_nsec > inode->i_atime.tv_nsec)) { 1588 iinfo->i_crtime.tv_nsec > inode->i_atime.tv_nsec))
1475 UDF_I_CRTIME(inode) = inode->i_atime; 1589 iinfo->i_crtime = inode->i_atime;
1476 } 1590
1477 if (UDF_I_CRTIME(inode).tv_sec > inode->i_mtime.tv_sec || 1591 if (iinfo->i_crtime.tv_sec > inode->i_mtime.tv_sec ||
1478 (UDF_I_CRTIME(inode).tv_sec == inode->i_mtime.tv_sec && 1592 (iinfo->i_crtime.tv_sec == inode->i_mtime.tv_sec &&
1479 UDF_I_CRTIME(inode).tv_nsec > inode->i_mtime.tv_nsec)) { 1593 iinfo->i_crtime.tv_nsec > inode->i_mtime.tv_nsec))
1480 UDF_I_CRTIME(inode) = inode->i_mtime; 1594 iinfo->i_crtime = inode->i_mtime;
1481 } 1595
1482 if (UDF_I_CRTIME(inode).tv_sec > inode->i_ctime.tv_sec || 1596 if (iinfo->i_crtime.tv_sec > inode->i_ctime.tv_sec ||
1483 (UDF_I_CRTIME(inode).tv_sec == inode->i_ctime.tv_sec && 1597 (iinfo->i_crtime.tv_sec == inode->i_ctime.tv_sec &&
1484 UDF_I_CRTIME(inode).tv_nsec > inode->i_ctime.tv_nsec)) { 1598 iinfo->i_crtime.tv_nsec > inode->i_ctime.tv_nsec))
1485 UDF_I_CRTIME(inode) = inode->i_ctime; 1599 iinfo->i_crtime = inode->i_ctime;
1486 }
1487 1600
1488 if (udf_time_to_stamp(&cpu_time, inode->i_atime)) 1601 if (udf_time_to_stamp(&cpu_time, inode->i_atime))
1489 efe->accessTime = cpu_to_lets(cpu_time); 1602 efe->accessTime = cpu_to_lets(cpu_time);
1490 if (udf_time_to_stamp(&cpu_time, inode->i_mtime)) 1603 if (udf_time_to_stamp(&cpu_time, inode->i_mtime))
1491 efe->modificationTime = cpu_to_lets(cpu_time); 1604 efe->modificationTime = cpu_to_lets(cpu_time);
1492 if (udf_time_to_stamp(&cpu_time, UDF_I_CRTIME(inode))) 1605 if (udf_time_to_stamp(&cpu_time, iinfo->i_crtime))
1493 efe->createTime = cpu_to_lets(cpu_time); 1606 efe->createTime = cpu_to_lets(cpu_time);
1494 if (udf_time_to_stamp(&cpu_time, inode->i_ctime)) 1607 if (udf_time_to_stamp(&cpu_time, inode->i_ctime))
1495 efe->attrTime = cpu_to_lets(cpu_time); 1608 efe->attrTime = cpu_to_lets(cpu_time);
@@ -1498,13 +1611,13 @@ static int udf_update_inode(struct inode *inode, int do_sync)
1498 strcpy(efe->impIdent.ident, UDF_ID_DEVELOPER); 1611 strcpy(efe->impIdent.ident, UDF_ID_DEVELOPER);
1499 efe->impIdent.identSuffix[0] = UDF_OS_CLASS_UNIX; 1612 efe->impIdent.identSuffix[0] = UDF_OS_CLASS_UNIX;
1500 efe->impIdent.identSuffix[1] = UDF_OS_ID_LINUX; 1613 efe->impIdent.identSuffix[1] = UDF_OS_ID_LINUX;
1501 efe->uniqueID = cpu_to_le64(UDF_I_UNIQUE(inode)); 1614 efe->uniqueID = cpu_to_le64(iinfo->i_unique);
1502 efe->lengthExtendedAttr = cpu_to_le32(UDF_I_LENEATTR(inode)); 1615 efe->lengthExtendedAttr = cpu_to_le32(iinfo->i_lenEAttr);
1503 efe->lengthAllocDescs = cpu_to_le32(UDF_I_LENALLOC(inode)); 1616 efe->lengthAllocDescs = cpu_to_le32(iinfo->i_lenAlloc);
1504 efe->descTag.tagIdent = cpu_to_le16(TAG_IDENT_EFE); 1617 efe->descTag.tagIdent = cpu_to_le16(TAG_IDENT_EFE);
1505 crclen = sizeof(struct extendedFileEntry); 1618 crclen = sizeof(struct extendedFileEntry);
1506 } 1619 }
1507 if (UDF_I_STRAT4096(inode)) { 1620 if (iinfo->i_strat4096) {
1508 fe->icbTag.strategyType = cpu_to_le16(4096); 1621 fe->icbTag.strategyType = cpu_to_le16(4096);
1509 fe->icbTag.strategyParameter = cpu_to_le16(1); 1622 fe->icbTag.strategyParameter = cpu_to_le16(1);
1510 fe->icbTag.numEntries = cpu_to_le16(2); 1623 fe->icbTag.numEntries = cpu_to_le16(2);
@@ -1528,7 +1641,7 @@ static int udf_update_inode(struct inode *inode, int do_sync)
1528 else if (S_ISSOCK(inode->i_mode)) 1641 else if (S_ISSOCK(inode->i_mode))
1529 fe->icbTag.fileType = ICBTAG_FILE_TYPE_SOCKET; 1642 fe->icbTag.fileType = ICBTAG_FILE_TYPE_SOCKET;
1530 1643
1531 icbflags = UDF_I_ALLOCTYPE(inode) | 1644 icbflags = iinfo->i_alloc_type |
1532 ((inode->i_mode & S_ISUID) ? ICBTAG_FLAG_SETUID : 0) | 1645 ((inode->i_mode & S_ISUID) ? ICBTAG_FLAG_SETUID : 0) |
1533 ((inode->i_mode & S_ISGID) ? ICBTAG_FLAG_SETGID : 0) | 1646 ((inode->i_mode & S_ISGID) ? ICBTAG_FLAG_SETGID : 0) |
1534 ((inode->i_mode & S_ISVTX) ? ICBTAG_FLAG_STICKY : 0) | 1647 ((inode->i_mode & S_ISVTX) ? ICBTAG_FLAG_STICKY : 0) |
@@ -1537,29 +1650,28 @@ static int udf_update_inode(struct inode *inode, int do_sync)
1537 ICBTAG_FLAG_SETGID | ICBTAG_FLAG_STICKY)); 1650 ICBTAG_FLAG_SETGID | ICBTAG_FLAG_STICKY));
1538 1651
1539 fe->icbTag.flags = cpu_to_le16(icbflags); 1652 fe->icbTag.flags = cpu_to_le16(icbflags);
1540 if (UDF_SB_UDFREV(inode->i_sb) >= 0x0200) 1653 if (sbi->s_udfrev >= 0x0200)
1541 fe->descTag.descVersion = cpu_to_le16(3); 1654 fe->descTag.descVersion = cpu_to_le16(3);
1542 else 1655 else
1543 fe->descTag.descVersion = cpu_to_le16(2); 1656 fe->descTag.descVersion = cpu_to_le16(2);
1544 fe->descTag.tagSerialNum = cpu_to_le16(UDF_SB_SERIALNUM(inode->i_sb)); 1657 fe->descTag.tagSerialNum = cpu_to_le16(sbi->s_serial_number);
1545 fe->descTag.tagLocation = cpu_to_le32(UDF_I_LOCATION(inode).logicalBlockNum); 1658 fe->descTag.tagLocation = cpu_to_le32(
1546 crclen += UDF_I_LENEATTR(inode) + UDF_I_LENALLOC(inode) - sizeof(tag); 1659 iinfo->i_location.logicalBlockNum);
1660 crclen += iinfo->i_lenEAttr + iinfo->i_lenAlloc -
1661 sizeof(tag);
1547 fe->descTag.descCRCLength = cpu_to_le16(crclen); 1662 fe->descTag.descCRCLength = cpu_to_le16(crclen);
1548 fe->descTag.descCRC = cpu_to_le16(udf_crc((char *)fe + sizeof(tag), crclen, 0)); 1663 fe->descTag.descCRC = cpu_to_le16(udf_crc((char *)fe + sizeof(tag),
1549 1664 crclen, 0));
1550 fe->descTag.tagChecksum = 0; 1665 fe->descTag.tagChecksum = udf_tag_checksum(&fe->descTag);
1551 for (i = 0; i < 16; i++) {
1552 if (i != 4)
1553 fe->descTag.tagChecksum += ((uint8_t *)&(fe->descTag))[i];
1554 }
1555 1666
1556 /* write the data blocks */ 1667 /* write the data blocks */
1557 mark_buffer_dirty(bh); 1668 mark_buffer_dirty(bh);
1558 if (do_sync) { 1669 if (do_sync) {
1559 sync_dirty_buffer(bh); 1670 sync_dirty_buffer(bh);
1560 if (buffer_req(bh) && !buffer_uptodate(bh)) { 1671 if (buffer_req(bh) && !buffer_uptodate(bh)) {
1561 printk("IO error syncing udf inode [%s:%08lx]\n", 1672 printk(KERN_WARNING "IO error syncing udf inode "
1562 inode->i_sb->s_id, inode->i_ino); 1673 "[%s:%08lx]\n", inode->i_sb->s_id,
1674 inode->i_ino);
1563 err = -EIO; 1675 err = -EIO;
1564 } 1676 }
1565 } 1677 }
@@ -1577,7 +1689,7 @@ struct inode *udf_iget(struct super_block *sb, kernel_lb_addr ino)
1577 return NULL; 1689 return NULL;
1578 1690
1579 if (inode->i_state & I_NEW) { 1691 if (inode->i_state & I_NEW) {
1580 memcpy(&UDF_I_LOCATION(inode), &ino, sizeof(kernel_lb_addr)); 1692 memcpy(&UDF_I(inode)->i_location, &ino, sizeof(kernel_lb_addr));
1581 __udf_read_inode(inode); 1693 __udf_read_inode(inode);
1582 unlock_new_inode(inode); 1694 unlock_new_inode(inode);
1583 } 1695 }
@@ -1585,7 +1697,8 @@ struct inode *udf_iget(struct super_block *sb, kernel_lb_addr ino)
1585 if (is_bad_inode(inode)) 1697 if (is_bad_inode(inode))
1586 goto out_iput; 1698 goto out_iput;
1587 1699
1588 if (ino.logicalBlockNum >= UDF_SB_PARTLEN(sb, ino.partitionReferenceNum)) { 1700 if (ino.logicalBlockNum >= UDF_SB(sb)->
1701 s_partmaps[ino.partitionReferenceNum].s_partition_len) {
1589 udf_debug("block=%d, partition=%d out of range\n", 1702 udf_debug("block=%d, partition=%d out of range\n",
1590 ino.logicalBlockNum, ino.partitionReferenceNum); 1703 ino.logicalBlockNum, ino.partitionReferenceNum);
1591 make_bad_inode(inode); 1704 make_bad_inode(inode);
@@ -1599,7 +1712,7 @@ struct inode *udf_iget(struct super_block *sb, kernel_lb_addr ino)
1599 return NULL; 1712 return NULL;
1600} 1713}
1601 1714
1602int8_t udf_add_aext(struct inode * inode, struct extent_position * epos, 1715int8_t udf_add_aext(struct inode *inode, struct extent_position *epos,
1603 kernel_lb_addr eloc, uint32_t elen, int inc) 1716 kernel_lb_addr eloc, uint32_t elen, int inc)
1604{ 1717{
1605 int adsize; 1718 int adsize;
@@ -1608,15 +1721,18 @@ int8_t udf_add_aext(struct inode * inode, struct extent_position * epos,
1608 struct allocExtDesc *aed; 1721 struct allocExtDesc *aed;
1609 int8_t etype; 1722 int8_t etype;
1610 uint8_t *ptr; 1723 uint8_t *ptr;
1724 struct udf_inode_info *iinfo = UDF_I(inode);
1611 1725
1612 if (!epos->bh) 1726 if (!epos->bh)
1613 ptr = UDF_I_DATA(inode) + epos->offset - udf_file_entry_alloc_offset(inode) + UDF_I_LENEATTR(inode); 1727 ptr = iinfo->i_ext.i_data + epos->offset -
1728 udf_file_entry_alloc_offset(inode) +
1729 iinfo->i_lenEAttr;
1614 else 1730 else
1615 ptr = epos->bh->b_data + epos->offset; 1731 ptr = epos->bh->b_data + epos->offset;
1616 1732
1617 if (UDF_I_ALLOCTYPE(inode) == ICBTAG_FLAG_AD_SHORT) 1733 if (iinfo->i_alloc_type == ICBTAG_FLAG_AD_SHORT)
1618 adsize = sizeof(short_ad); 1734 adsize = sizeof(short_ad);
1619 else if (UDF_I_ALLOCTYPE(inode) == ICBTAG_FLAG_AD_LONG) 1735 else if (iinfo->i_alloc_type == ICBTAG_FLAG_AD_LONG)
1620 adsize = sizeof(long_ad); 1736 adsize = sizeof(long_ad);
1621 else 1737 else
1622 return -1; 1738 return -1;
@@ -1627,15 +1743,16 @@ int8_t udf_add_aext(struct inode * inode, struct extent_position * epos,
1627 int err, loffset; 1743 int err, loffset;
1628 kernel_lb_addr obloc = epos->block; 1744 kernel_lb_addr obloc = epos->block;
1629 1745
1630 if (!(epos->block.logicalBlockNum = udf_new_block(inode->i_sb, NULL, 1746 epos->block.logicalBlockNum = udf_new_block(inode->i_sb, NULL,
1631 obloc.partitionReferenceNum, 1747 obloc.partitionReferenceNum,
1632 obloc.logicalBlockNum, &err))) { 1748 obloc.logicalBlockNum, &err);
1749 if (!epos->block.logicalBlockNum)
1633 return -1; 1750 return -1;
1634 } 1751 nbh = udf_tgetblk(inode->i_sb, udf_get_lb_pblock(inode->i_sb,
1635 if (!(nbh = udf_tgetblk(inode->i_sb, udf_get_lb_pblock(inode->i_sb, 1752 epos->block,
1636 epos->block, 0)))) { 1753 0));
1754 if (!nbh)
1637 return -1; 1755 return -1;
1638 }
1639 lock_buffer(nbh); 1756 lock_buffer(nbh);
1640 memset(nbh->b_data, 0x00, inode->i_sb->s_blocksize); 1757 memset(nbh->b_data, 0x00, inode->i_sb->s_blocksize);
1641 set_buffer_uptodate(nbh); 1758 set_buffer_uptodate(nbh);
@@ -1644,7 +1761,8 @@ int8_t udf_add_aext(struct inode * inode, struct extent_position * epos,
1644 1761
1645 aed = (struct allocExtDesc *)(nbh->b_data); 1762 aed = (struct allocExtDesc *)(nbh->b_data);
1646 if (!UDF_QUERY_FLAG(inode->i_sb, UDF_FLAG_STRICT)) 1763 if (!UDF_QUERY_FLAG(inode->i_sb, UDF_FLAG_STRICT))
1647 aed->previousAllocExtLocation = cpu_to_le32(obloc.logicalBlockNum); 1764 aed->previousAllocExtLocation =
1765 cpu_to_le32(obloc.logicalBlockNum);
1648 if (epos->offset + adsize > inode->i_sb->s_blocksize) { 1766 if (epos->offset + adsize > inode->i_sb->s_blocksize) {
1649 loffset = epos->offset; 1767 loffset = epos->offset;
1650 aed->lengthAllocDescs = cpu_to_le32(adsize); 1768 aed->lengthAllocDescs = cpu_to_le32(adsize);
@@ -1661,24 +1779,26 @@ int8_t udf_add_aext(struct inode * inode, struct extent_position * epos,
1661 if (epos->bh) { 1779 if (epos->bh) {
1662 aed = (struct allocExtDesc *)epos->bh->b_data; 1780 aed = (struct allocExtDesc *)epos->bh->b_data;
1663 aed->lengthAllocDescs = 1781 aed->lengthAllocDescs =
1664 cpu_to_le32(le32_to_cpu(aed->lengthAllocDescs) + adsize); 1782 cpu_to_le32(le32_to_cpu(
1783 aed->lengthAllocDescs) + adsize);
1665 } else { 1784 } else {
1666 UDF_I_LENALLOC(inode) += adsize; 1785 iinfo->i_lenAlloc += adsize;
1667 mark_inode_dirty(inode); 1786 mark_inode_dirty(inode);
1668 } 1787 }
1669 } 1788 }
1670 if (UDF_SB_UDFREV(inode->i_sb) >= 0x0200) 1789 if (UDF_SB(inode->i_sb)->s_udfrev >= 0x0200)
1671 udf_new_tag(nbh->b_data, TAG_IDENT_AED, 3, 1, 1790 udf_new_tag(nbh->b_data, TAG_IDENT_AED, 3, 1,
1672 epos->block.logicalBlockNum, sizeof(tag)); 1791 epos->block.logicalBlockNum, sizeof(tag));
1673 else 1792 else
1674 udf_new_tag(nbh->b_data, TAG_IDENT_AED, 2, 1, 1793 udf_new_tag(nbh->b_data, TAG_IDENT_AED, 2, 1,
1675 epos->block.logicalBlockNum, sizeof(tag)); 1794 epos->block.logicalBlockNum, sizeof(tag));
1676 switch (UDF_I_ALLOCTYPE(inode)) { 1795 switch (iinfo->i_alloc_type) {
1677 case ICBTAG_FLAG_AD_SHORT: 1796 case ICBTAG_FLAG_AD_SHORT:
1678 sad = (short_ad *)sptr; 1797 sad = (short_ad *)sptr;
1679 sad->extLength = cpu_to_le32(EXT_NEXT_EXTENT_ALLOCDECS | 1798 sad->extLength = cpu_to_le32(EXT_NEXT_EXTENT_ALLOCDECS |
1680 inode->i_sb->s_blocksize); 1799 inode->i_sb->s_blocksize);
1681 sad->extPosition = cpu_to_le32(epos->block.logicalBlockNum); 1800 sad->extPosition =
1801 cpu_to_le32(epos->block.logicalBlockNum);
1682 break; 1802 break;
1683 case ICBTAG_FLAG_AD_LONG: 1803 case ICBTAG_FLAG_AD_LONG:
1684 lad = (long_ad *)sptr; 1804 lad = (long_ad *)sptr;
@@ -1690,10 +1810,11 @@ int8_t udf_add_aext(struct inode * inode, struct extent_position * epos,
1690 } 1810 }
1691 if (epos->bh) { 1811 if (epos->bh) {
1692 if (!UDF_QUERY_FLAG(inode->i_sb, UDF_FLAG_STRICT) || 1812 if (!UDF_QUERY_FLAG(inode->i_sb, UDF_FLAG_STRICT) ||
1693 UDF_SB_UDFREV(inode->i_sb) >= 0x0201) 1813 UDF_SB(inode->i_sb)->s_udfrev >= 0x0201)
1694 udf_update_tag(epos->bh->b_data, loffset); 1814 udf_update_tag(epos->bh->b_data, loffset);
1695 else 1815 else
1696 udf_update_tag(epos->bh->b_data, sizeof(struct allocExtDesc)); 1816 udf_update_tag(epos->bh->b_data,
1817 sizeof(struct allocExtDesc));
1697 mark_buffer_dirty_inode(epos->bh, inode); 1818 mark_buffer_dirty_inode(epos->bh, inode);
1698 brelse(epos->bh); 1819 brelse(epos->bh);
1699 } else { 1820 } else {
@@ -1705,36 +1826,43 @@ int8_t udf_add_aext(struct inode * inode, struct extent_position * epos,
1705 etype = udf_write_aext(inode, epos, eloc, elen, inc); 1826 etype = udf_write_aext(inode, epos, eloc, elen, inc);
1706 1827
1707 if (!epos->bh) { 1828 if (!epos->bh) {
1708 UDF_I_LENALLOC(inode) += adsize; 1829 iinfo->i_lenAlloc += adsize;
1709 mark_inode_dirty(inode); 1830 mark_inode_dirty(inode);
1710 } else { 1831 } else {
1711 aed = (struct allocExtDesc *)epos->bh->b_data; 1832 aed = (struct allocExtDesc *)epos->bh->b_data;
1712 aed->lengthAllocDescs = 1833 aed->lengthAllocDescs =
1713 cpu_to_le32(le32_to_cpu(aed->lengthAllocDescs) + adsize); 1834 cpu_to_le32(le32_to_cpu(aed->lengthAllocDescs) +
1714 if (!UDF_QUERY_FLAG(inode->i_sb, UDF_FLAG_STRICT) || UDF_SB_UDFREV(inode->i_sb) >= 0x0201) 1835 adsize);
1715 udf_update_tag(epos->bh->b_data, epos->offset + (inc ? 0 : adsize)); 1836 if (!UDF_QUERY_FLAG(inode->i_sb, UDF_FLAG_STRICT) ||
1837 UDF_SB(inode->i_sb)->s_udfrev >= 0x0201)
1838 udf_update_tag(epos->bh->b_data,
1839 epos->offset + (inc ? 0 : adsize));
1716 else 1840 else
1717 udf_update_tag(epos->bh->b_data, sizeof(struct allocExtDesc)); 1841 udf_update_tag(epos->bh->b_data,
1842 sizeof(struct allocExtDesc));
1718 mark_buffer_dirty_inode(epos->bh, inode); 1843 mark_buffer_dirty_inode(epos->bh, inode);
1719 } 1844 }
1720 1845
1721 return etype; 1846 return etype;
1722} 1847}
1723 1848
1724int8_t udf_write_aext(struct inode * inode, struct extent_position * epos, 1849int8_t udf_write_aext(struct inode *inode, struct extent_position *epos,
1725 kernel_lb_addr eloc, uint32_t elen, int inc) 1850 kernel_lb_addr eloc, uint32_t elen, int inc)
1726{ 1851{
1727 int adsize; 1852 int adsize;
1728 uint8_t *ptr; 1853 uint8_t *ptr;
1729 short_ad *sad; 1854 short_ad *sad;
1730 long_ad *lad; 1855 long_ad *lad;
1856 struct udf_inode_info *iinfo = UDF_I(inode);
1731 1857
1732 if (!epos->bh) 1858 if (!epos->bh)
1733 ptr = UDF_I_DATA(inode) + epos->offset - udf_file_entry_alloc_offset(inode) + UDF_I_LENEATTR(inode); 1859 ptr = iinfo->i_ext.i_data + epos->offset -
1860 udf_file_entry_alloc_offset(inode) +
1861 iinfo->i_lenEAttr;
1734 else 1862 else
1735 ptr = epos->bh->b_data + epos->offset; 1863 ptr = epos->bh->b_data + epos->offset;
1736 1864
1737 switch (UDF_I_ALLOCTYPE(inode)) { 1865 switch (iinfo->i_alloc_type) {
1738 case ICBTAG_FLAG_AD_SHORT: 1866 case ICBTAG_FLAG_AD_SHORT:
1739 sad = (short_ad *)ptr; 1867 sad = (short_ad *)ptr;
1740 sad->extLength = cpu_to_le32(elen); 1868 sad->extLength = cpu_to_le32(elen);
@@ -1754,10 +1882,12 @@ int8_t udf_write_aext(struct inode * inode, struct extent_position * epos,
1754 1882
1755 if (epos->bh) { 1883 if (epos->bh) {
1756 if (!UDF_QUERY_FLAG(inode->i_sb, UDF_FLAG_STRICT) || 1884 if (!UDF_QUERY_FLAG(inode->i_sb, UDF_FLAG_STRICT) ||
1757 UDF_SB_UDFREV(inode->i_sb) >= 0x0201) { 1885 UDF_SB(inode->i_sb)->s_udfrev >= 0x0201) {
1758 struct allocExtDesc *aed = (struct allocExtDesc *)epos->bh->b_data; 1886 struct allocExtDesc *aed =
1887 (struct allocExtDesc *)epos->bh->b_data;
1759 udf_update_tag(epos->bh->b_data, 1888 udf_update_tag(epos->bh->b_data,
1760 le32_to_cpu(aed->lengthAllocDescs) + sizeof(struct allocExtDesc)); 1889 le32_to_cpu(aed->lengthAllocDescs) +
1890 sizeof(struct allocExtDesc));
1761 } 1891 }
1762 mark_buffer_dirty_inode(epos->bh, inode); 1892 mark_buffer_dirty_inode(epos->bh, inode);
1763 } else { 1893 } else {
@@ -1770,19 +1900,21 @@ int8_t udf_write_aext(struct inode * inode, struct extent_position * epos,
1770 return (elen >> 30); 1900 return (elen >> 30);
1771} 1901}
1772 1902
1773int8_t udf_next_aext(struct inode * inode, struct extent_position * epos, 1903int8_t udf_next_aext(struct inode *inode, struct extent_position *epos,
1774 kernel_lb_addr * eloc, uint32_t * elen, int inc) 1904 kernel_lb_addr *eloc, uint32_t *elen, int inc)
1775{ 1905{
1776 int8_t etype; 1906 int8_t etype;
1777 1907
1778 while ((etype = udf_current_aext(inode, epos, eloc, elen, inc)) == 1908 while ((etype = udf_current_aext(inode, epos, eloc, elen, inc)) ==
1779 (EXT_NEXT_EXTENT_ALLOCDECS >> 30)) { 1909 (EXT_NEXT_EXTENT_ALLOCDECS >> 30)) {
1910 int block;
1780 epos->block = *eloc; 1911 epos->block = *eloc;
1781 epos->offset = sizeof(struct allocExtDesc); 1912 epos->offset = sizeof(struct allocExtDesc);
1782 brelse(epos->bh); 1913 brelse(epos->bh);
1783 if (!(epos->bh = udf_tread(inode->i_sb, udf_get_lb_pblock(inode->i_sb, epos->block, 0)))) { 1914 block = udf_get_lb_pblock(inode->i_sb, epos->block, 0);
1784 udf_debug("reading block %d failed!\n", 1915 epos->bh = udf_tread(inode->i_sb, block);
1785 udf_get_lb_pblock(inode->i_sb, epos->block, 0)); 1916 if (!epos->bh) {
1917 udf_debug("reading block %d failed!\n", block);
1786 return -1; 1918 return -1;
1787 } 1919 }
1788 } 1920 }
@@ -1790,47 +1922,55 @@ int8_t udf_next_aext(struct inode * inode, struct extent_position * epos,
1790 return etype; 1922 return etype;
1791} 1923}
1792 1924
1793int8_t udf_current_aext(struct inode * inode, struct extent_position * epos, 1925int8_t udf_current_aext(struct inode *inode, struct extent_position *epos,
1794 kernel_lb_addr * eloc, uint32_t * elen, int inc) 1926 kernel_lb_addr *eloc, uint32_t *elen, int inc)
1795{ 1927{
1796 int alen; 1928 int alen;
1797 int8_t etype; 1929 int8_t etype;
1798 uint8_t *ptr; 1930 uint8_t *ptr;
1799 short_ad *sad; 1931 short_ad *sad;
1800 long_ad *lad; 1932 long_ad *lad;
1801 1933 struct udf_inode_info *iinfo = UDF_I(inode);
1802 1934
1803 if (!epos->bh) { 1935 if (!epos->bh) {
1804 if (!epos->offset) 1936 if (!epos->offset)
1805 epos->offset = udf_file_entry_alloc_offset(inode); 1937 epos->offset = udf_file_entry_alloc_offset(inode);
1806 ptr = UDF_I_DATA(inode) + epos->offset - udf_file_entry_alloc_offset(inode) + UDF_I_LENEATTR(inode); 1938 ptr = iinfo->i_ext.i_data + epos->offset -
1807 alen = udf_file_entry_alloc_offset(inode) + UDF_I_LENALLOC(inode); 1939 udf_file_entry_alloc_offset(inode) +
1940 iinfo->i_lenEAttr;
1941 alen = udf_file_entry_alloc_offset(inode) +
1942 iinfo->i_lenAlloc;
1808 } else { 1943 } else {
1809 if (!epos->offset) 1944 if (!epos->offset)
1810 epos->offset = sizeof(struct allocExtDesc); 1945 epos->offset = sizeof(struct allocExtDesc);
1811 ptr = epos->bh->b_data + epos->offset; 1946 ptr = epos->bh->b_data + epos->offset;
1812 alen = sizeof(struct allocExtDesc) + 1947 alen = sizeof(struct allocExtDesc) +
1813 le32_to_cpu(((struct allocExtDesc *)epos->bh->b_data)->lengthAllocDescs); 1948 le32_to_cpu(((struct allocExtDesc *)epos->bh->b_data)->
1949 lengthAllocDescs);
1814 } 1950 }
1815 1951
1816 switch (UDF_I_ALLOCTYPE(inode)) { 1952 switch (iinfo->i_alloc_type) {
1817 case ICBTAG_FLAG_AD_SHORT: 1953 case ICBTAG_FLAG_AD_SHORT:
1818 if (!(sad = udf_get_fileshortad(ptr, alen, &epos->offset, inc))) 1954 sad = udf_get_fileshortad(ptr, alen, &epos->offset, inc);
1955 if (!sad)
1819 return -1; 1956 return -1;
1820 etype = le32_to_cpu(sad->extLength) >> 30; 1957 etype = le32_to_cpu(sad->extLength) >> 30;
1821 eloc->logicalBlockNum = le32_to_cpu(sad->extPosition); 1958 eloc->logicalBlockNum = le32_to_cpu(sad->extPosition);
1822 eloc->partitionReferenceNum = UDF_I_LOCATION(inode).partitionReferenceNum; 1959 eloc->partitionReferenceNum =
1960 iinfo->i_location.partitionReferenceNum;
1823 *elen = le32_to_cpu(sad->extLength) & UDF_EXTENT_LENGTH_MASK; 1961 *elen = le32_to_cpu(sad->extLength) & UDF_EXTENT_LENGTH_MASK;
1824 break; 1962 break;
1825 case ICBTAG_FLAG_AD_LONG: 1963 case ICBTAG_FLAG_AD_LONG:
1826 if (!(lad = udf_get_filelongad(ptr, alen, &epos->offset, inc))) 1964 lad = udf_get_filelongad(ptr, alen, &epos->offset, inc);
1965 if (!lad)
1827 return -1; 1966 return -1;
1828 etype = le32_to_cpu(lad->extLength) >> 30; 1967 etype = le32_to_cpu(lad->extLength) >> 30;
1829 *eloc = lelb_to_cpu(lad->extLocation); 1968 *eloc = lelb_to_cpu(lad->extLocation);
1830 *elen = le32_to_cpu(lad->extLength) & UDF_EXTENT_LENGTH_MASK; 1969 *elen = le32_to_cpu(lad->extLength) & UDF_EXTENT_LENGTH_MASK;
1831 break; 1970 break;
1832 default: 1971 default:
1833 udf_debug("alloc_type = %d unsupported\n", UDF_I_ALLOCTYPE(inode)); 1972 udf_debug("alloc_type = %d unsupported\n",
1973 iinfo->i_alloc_type);
1834 return -1; 1974 return -1;
1835 } 1975 }
1836 1976
@@ -1858,22 +1998,24 @@ static int8_t udf_insert_aext(struct inode *inode, struct extent_position epos,
1858 return (nelen >> 30); 1998 return (nelen >> 30);
1859} 1999}
1860 2000
1861int8_t udf_delete_aext(struct inode * inode, struct extent_position epos, 2001int8_t udf_delete_aext(struct inode *inode, struct extent_position epos,
1862 kernel_lb_addr eloc, uint32_t elen) 2002 kernel_lb_addr eloc, uint32_t elen)
1863{ 2003{
1864 struct extent_position oepos; 2004 struct extent_position oepos;
1865 int adsize; 2005 int adsize;
1866 int8_t etype; 2006 int8_t etype;
1867 struct allocExtDesc *aed; 2007 struct allocExtDesc *aed;
2008 struct udf_inode_info *iinfo;
1868 2009
1869 if (epos.bh) { 2010 if (epos.bh) {
1870 get_bh(epos.bh); 2011 get_bh(epos.bh);
1871 get_bh(epos.bh); 2012 get_bh(epos.bh);
1872 } 2013 }
1873 2014
1874 if (UDF_I_ALLOCTYPE(inode) == ICBTAG_FLAG_AD_SHORT) 2015 iinfo = UDF_I(inode);
2016 if (iinfo->i_alloc_type == ICBTAG_FLAG_AD_SHORT)
1875 adsize = sizeof(short_ad); 2017 adsize = sizeof(short_ad);
1876 else if (UDF_I_ALLOCTYPE(inode) == ICBTAG_FLAG_AD_LONG) 2018 else if (iinfo->i_alloc_type == ICBTAG_FLAG_AD_LONG)
1877 adsize = sizeof(long_ad); 2019 adsize = sizeof(long_ad);
1878 else 2020 else
1879 adsize = 0; 2021 adsize = 0;
@@ -1900,33 +2042,39 @@ int8_t udf_delete_aext(struct inode * inode, struct extent_position epos,
1900 udf_write_aext(inode, &oepos, eloc, elen, 1); 2042 udf_write_aext(inode, &oepos, eloc, elen, 1);
1901 udf_write_aext(inode, &oepos, eloc, elen, 1); 2043 udf_write_aext(inode, &oepos, eloc, elen, 1);
1902 if (!oepos.bh) { 2044 if (!oepos.bh) {
1903 UDF_I_LENALLOC(inode) -= (adsize * 2); 2045 iinfo->i_lenAlloc -= (adsize * 2);
1904 mark_inode_dirty(inode); 2046 mark_inode_dirty(inode);
1905 } else { 2047 } else {
1906 aed = (struct allocExtDesc *)oepos.bh->b_data; 2048 aed = (struct allocExtDesc *)oepos.bh->b_data;
1907 aed->lengthAllocDescs = 2049 aed->lengthAllocDescs =
1908 cpu_to_le32(le32_to_cpu(aed->lengthAllocDescs) - (2 * adsize)); 2050 cpu_to_le32(le32_to_cpu(aed->lengthAllocDescs) -
2051 (2 * adsize));
1909 if (!UDF_QUERY_FLAG(inode->i_sb, UDF_FLAG_STRICT) || 2052 if (!UDF_QUERY_FLAG(inode->i_sb, UDF_FLAG_STRICT) ||
1910 UDF_SB_UDFREV(inode->i_sb) >= 0x0201) 2053 UDF_SB(inode->i_sb)->s_udfrev >= 0x0201)
1911 udf_update_tag(oepos.bh->b_data, oepos.offset - (2 * adsize)); 2054 udf_update_tag(oepos.bh->b_data,
2055 oepos.offset - (2 * adsize));
1912 else 2056 else
1913 udf_update_tag(oepos.bh->b_data, sizeof(struct allocExtDesc)); 2057 udf_update_tag(oepos.bh->b_data,
2058 sizeof(struct allocExtDesc));
1914 mark_buffer_dirty_inode(oepos.bh, inode); 2059 mark_buffer_dirty_inode(oepos.bh, inode);
1915 } 2060 }
1916 } else { 2061 } else {
1917 udf_write_aext(inode, &oepos, eloc, elen, 1); 2062 udf_write_aext(inode, &oepos, eloc, elen, 1);
1918 if (!oepos.bh) { 2063 if (!oepos.bh) {
1919 UDF_I_LENALLOC(inode) -= adsize; 2064 iinfo->i_lenAlloc -= adsize;
1920 mark_inode_dirty(inode); 2065 mark_inode_dirty(inode);
1921 } else { 2066 } else {
1922 aed = (struct allocExtDesc *)oepos.bh->b_data; 2067 aed = (struct allocExtDesc *)oepos.bh->b_data;
1923 aed->lengthAllocDescs = 2068 aed->lengthAllocDescs =
1924 cpu_to_le32(le32_to_cpu(aed->lengthAllocDescs) - adsize); 2069 cpu_to_le32(le32_to_cpu(aed->lengthAllocDescs) -
2070 adsize);
1925 if (!UDF_QUERY_FLAG(inode->i_sb, UDF_FLAG_STRICT) || 2071 if (!UDF_QUERY_FLAG(inode->i_sb, UDF_FLAG_STRICT) ||
1926 UDF_SB_UDFREV(inode->i_sb) >= 0x0201) 2072 UDF_SB(inode->i_sb)->s_udfrev >= 0x0201)
1927 udf_update_tag(oepos.bh->b_data, epos.offset - adsize); 2073 udf_update_tag(oepos.bh->b_data,
2074 epos.offset - adsize);
1928 else 2075 else
1929 udf_update_tag(oepos.bh->b_data, sizeof(struct allocExtDesc)); 2076 udf_update_tag(oepos.bh->b_data,
2077 sizeof(struct allocExtDesc));
1930 mark_buffer_dirty_inode(oepos.bh, inode); 2078 mark_buffer_dirty_inode(oepos.bh, inode);
1931 } 2079 }
1932 } 2080 }
@@ -1937,34 +2085,38 @@ int8_t udf_delete_aext(struct inode * inode, struct extent_position epos,
1937 return (elen >> 30); 2085 return (elen >> 30);
1938} 2086}
1939 2087
1940int8_t inode_bmap(struct inode * inode, sector_t block, 2088int8_t inode_bmap(struct inode *inode, sector_t block,
1941 struct extent_position * pos, kernel_lb_addr * eloc, 2089 struct extent_position *pos, kernel_lb_addr *eloc,
1942 uint32_t * elen, sector_t * offset) 2090 uint32_t *elen, sector_t *offset)
1943{ 2091{
2092 unsigned char blocksize_bits = inode->i_sb->s_blocksize_bits;
1944 loff_t lbcount = 0, bcount = 2093 loff_t lbcount = 0, bcount =
1945 (loff_t) block << inode->i_sb->s_blocksize_bits; 2094 (loff_t) block << blocksize_bits;
1946 int8_t etype; 2095 int8_t etype;
2096 struct udf_inode_info *iinfo;
1947 2097
1948 if (block < 0) { 2098 if (block < 0) {
1949 printk(KERN_ERR "udf: inode_bmap: block < 0\n"); 2099 printk(KERN_ERR "udf: inode_bmap: block < 0\n");
1950 return -1; 2100 return -1;
1951 } 2101 }
1952 2102
2103 iinfo = UDF_I(inode);
1953 pos->offset = 0; 2104 pos->offset = 0;
1954 pos->block = UDF_I_LOCATION(inode); 2105 pos->block = iinfo->i_location;
1955 pos->bh = NULL; 2106 pos->bh = NULL;
1956 *elen = 0; 2107 *elen = 0;
1957 2108
1958 do { 2109 do {
1959 if ((etype = udf_next_aext(inode, pos, eloc, elen, 1)) == -1) { 2110 etype = udf_next_aext(inode, pos, eloc, elen, 1);
1960 *offset = (bcount - lbcount) >> inode->i_sb->s_blocksize_bits; 2111 if (etype == -1) {
1961 UDF_I_LENEXTENTS(inode) = lbcount; 2112 *offset = (bcount - lbcount) >> blocksize_bits;
2113 iinfo->i_lenExtents = lbcount;
1962 return -1; 2114 return -1;
1963 } 2115 }
1964 lbcount += *elen; 2116 lbcount += *elen;
1965 } while (lbcount <= bcount); 2117 } while (lbcount <= bcount);
1966 2118
1967 *offset = (bcount + *elen - lbcount) >> inode->i_sb->s_blocksize_bits; 2119 *offset = (bcount + *elen - lbcount) >> blocksize_bits;
1968 2120
1969 return etype; 2121 return etype;
1970} 2122}
@@ -1979,7 +2131,8 @@ long udf_block_map(struct inode *inode, sector_t block)
1979 2131
1980 lock_kernel(); 2132 lock_kernel();
1981 2133
1982 if (inode_bmap(inode, block, &epos, &eloc, &elen, &offset) == (EXT_RECORDED_ALLOCATED >> 30)) 2134 if (inode_bmap(inode, block, &epos, &eloc, &elen, &offset) ==
2135 (EXT_RECORDED_ALLOCATED >> 30))
1983 ret = udf_get_lb_pblock(inode->i_sb, eloc, offset); 2136 ret = udf_get_lb_pblock(inode->i_sb, eloc, offset);
1984 else 2137 else
1985 ret = 0; 2138 ret = 0;
diff --git a/fs/udf/misc.c b/fs/udf/misc.c
index 15297deb5051..a1d6da0caf71 100644
--- a/fs/udf/misc.c
+++ b/fs/udf/misc.c
@@ -51,18 +51,18 @@ struct genericFormat *udf_add_extendedattr(struct inode *inode, uint32_t size,
51 uint8_t *ea = NULL, *ad = NULL; 51 uint8_t *ea = NULL, *ad = NULL;
52 int offset; 52 int offset;
53 uint16_t crclen; 53 uint16_t crclen;
54 int i; 54 struct udf_inode_info *iinfo = UDF_I(inode);
55 55
56 ea = UDF_I_DATA(inode); 56 ea = iinfo->i_ext.i_data;
57 if (UDF_I_LENEATTR(inode)) { 57 if (iinfo->i_lenEAttr) {
58 ad = UDF_I_DATA(inode) + UDF_I_LENEATTR(inode); 58 ad = iinfo->i_ext.i_data + iinfo->i_lenEAttr;
59 } else { 59 } else {
60 ad = ea; 60 ad = ea;
61 size += sizeof(struct extendedAttrHeaderDesc); 61 size += sizeof(struct extendedAttrHeaderDesc);
62 } 62 }
63 63
64 offset = inode->i_sb->s_blocksize - udf_file_entry_alloc_offset(inode) - 64 offset = inode->i_sb->s_blocksize - udf_file_entry_alloc_offset(inode) -
65 UDF_I_LENALLOC(inode); 65 iinfo->i_lenAlloc;
66 66
67 /* TODO - Check for FreeEASpace */ 67 /* TODO - Check for FreeEASpace */
68 68
@@ -70,69 +70,80 @@ struct genericFormat *udf_add_extendedattr(struct inode *inode, uint32_t size,
70 struct extendedAttrHeaderDesc *eahd; 70 struct extendedAttrHeaderDesc *eahd;
71 eahd = (struct extendedAttrHeaderDesc *)ea; 71 eahd = (struct extendedAttrHeaderDesc *)ea;
72 72
73 if (UDF_I_LENALLOC(inode)) { 73 if (iinfo->i_lenAlloc)
74 memmove(&ad[size], ad, UDF_I_LENALLOC(inode)); 74 memmove(&ad[size], ad, iinfo->i_lenAlloc);
75 }
76 75
77 if (UDF_I_LENEATTR(inode)) { 76 if (iinfo->i_lenEAttr) {
78 /* check checksum/crc */ 77 /* check checksum/crc */
79 if (le16_to_cpu(eahd->descTag.tagIdent) != TAG_IDENT_EAHD || 78 if (eahd->descTag.tagIdent !=
80 le32_to_cpu(eahd->descTag.tagLocation) != UDF_I_LOCATION(inode).logicalBlockNum) { 79 cpu_to_le16(TAG_IDENT_EAHD) ||
80 le32_to_cpu(eahd->descTag.tagLocation) !=
81 iinfo->i_location.logicalBlockNum)
81 return NULL; 82 return NULL;
82 }
83 } else { 83 } else {
84 struct udf_sb_info *sbi = UDF_SB(inode->i_sb);
85
84 size -= sizeof(struct extendedAttrHeaderDesc); 86 size -= sizeof(struct extendedAttrHeaderDesc);
85 UDF_I_LENEATTR(inode) += sizeof(struct extendedAttrHeaderDesc); 87 iinfo->i_lenEAttr +=
88 sizeof(struct extendedAttrHeaderDesc);
86 eahd->descTag.tagIdent = cpu_to_le16(TAG_IDENT_EAHD); 89 eahd->descTag.tagIdent = cpu_to_le16(TAG_IDENT_EAHD);
87 if (UDF_SB_UDFREV(inode->i_sb) >= 0x0200) 90 if (sbi->s_udfrev >= 0x0200)
88 eahd->descTag.descVersion = cpu_to_le16(3); 91 eahd->descTag.descVersion = cpu_to_le16(3);
89 else 92 else
90 eahd->descTag.descVersion = cpu_to_le16(2); 93 eahd->descTag.descVersion = cpu_to_le16(2);
91 eahd->descTag.tagSerialNum = cpu_to_le16(UDF_SB_SERIALNUM(inode->i_sb)); 94 eahd->descTag.tagSerialNum =
92 eahd->descTag.tagLocation = cpu_to_le32(UDF_I_LOCATION(inode).logicalBlockNum); 95 cpu_to_le16(sbi->s_serial_number);
96 eahd->descTag.tagLocation = cpu_to_le32(
97 iinfo->i_location.logicalBlockNum);
93 eahd->impAttrLocation = cpu_to_le32(0xFFFFFFFF); 98 eahd->impAttrLocation = cpu_to_le32(0xFFFFFFFF);
94 eahd->appAttrLocation = cpu_to_le32(0xFFFFFFFF); 99 eahd->appAttrLocation = cpu_to_le32(0xFFFFFFFF);
95 } 100 }
96 101
97 offset = UDF_I_LENEATTR(inode); 102 offset = iinfo->i_lenEAttr;
98 if (type < 2048) { 103 if (type < 2048) {
99 if (le32_to_cpu(eahd->appAttrLocation) < UDF_I_LENEATTR(inode)) { 104 if (le32_to_cpu(eahd->appAttrLocation) <
100 uint32_t aal = le32_to_cpu(eahd->appAttrLocation); 105 iinfo->i_lenEAttr) {
106 uint32_t aal =
107 le32_to_cpu(eahd->appAttrLocation);
101 memmove(&ea[offset - aal + size], 108 memmove(&ea[offset - aal + size],
102 &ea[aal], offset - aal); 109 &ea[aal], offset - aal);
103 offset -= aal; 110 offset -= aal;
104 eahd->appAttrLocation = cpu_to_le32(aal + size); 111 eahd->appAttrLocation =
112 cpu_to_le32(aal + size);
105 } 113 }
106 if (le32_to_cpu(eahd->impAttrLocation) < UDF_I_LENEATTR(inode)) { 114 if (le32_to_cpu(eahd->impAttrLocation) <
107 uint32_t ial = le32_to_cpu(eahd->impAttrLocation); 115 iinfo->i_lenEAttr) {
116 uint32_t ial =
117 le32_to_cpu(eahd->impAttrLocation);
108 memmove(&ea[offset - ial + size], 118 memmove(&ea[offset - ial + size],
109 &ea[ial], offset - ial); 119 &ea[ial], offset - ial);
110 offset -= ial; 120 offset -= ial;
111 eahd->impAttrLocation = cpu_to_le32(ial + size); 121 eahd->impAttrLocation =
122 cpu_to_le32(ial + size);
112 } 123 }
113 } else if (type < 65536) { 124 } else if (type < 65536) {
114 if (le32_to_cpu(eahd->appAttrLocation) < UDF_I_LENEATTR(inode)) { 125 if (le32_to_cpu(eahd->appAttrLocation) <
115 uint32_t aal = le32_to_cpu(eahd->appAttrLocation); 126 iinfo->i_lenEAttr) {
127 uint32_t aal =
128 le32_to_cpu(eahd->appAttrLocation);
116 memmove(&ea[offset - aal + size], 129 memmove(&ea[offset - aal + size],
117 &ea[aal], offset - aal); 130 &ea[aal], offset - aal);
118 offset -= aal; 131 offset -= aal;
119 eahd->appAttrLocation = cpu_to_le32(aal + size); 132 eahd->appAttrLocation =
133 cpu_to_le32(aal + size);
120 } 134 }
121 } 135 }
122 /* rewrite CRC + checksum of eahd */ 136 /* rewrite CRC + checksum of eahd */
123 crclen = sizeof(struct extendedAttrHeaderDesc) - sizeof(tag); 137 crclen = sizeof(struct extendedAttrHeaderDesc) - sizeof(tag);
124 eahd->descTag.descCRCLength = cpu_to_le16(crclen); 138 eahd->descTag.descCRCLength = cpu_to_le16(crclen);
125 eahd->descTag.descCRC = cpu_to_le16(udf_crc((char *)eahd + 139 eahd->descTag.descCRC = cpu_to_le16(udf_crc((char *)eahd +
126 sizeof(tag), crclen, 0)); 140 sizeof(tag), crclen, 0));
127 eahd->descTag.tagChecksum = 0; 141 eahd->descTag.tagChecksum = udf_tag_checksum(&eahd->descTag);
128 for (i = 0; i < 16; i++) 142 iinfo->i_lenEAttr += size;
129 if (i != 4)
130 eahd->descTag.tagChecksum += ((uint8_t *)&(eahd->descTag))[i];
131 UDF_I_LENEATTR(inode) += size;
132 return (struct genericFormat *)&ea[offset]; 143 return (struct genericFormat *)&ea[offset];
133 } 144 }
134 if (loc & 0x02) { 145 if (loc & 0x02)
135 } 146 ;
136 147
137 return NULL; 148 return NULL;
138} 149}
@@ -143,18 +154,20 @@ struct genericFormat *udf_get_extendedattr(struct inode *inode, uint32_t type,
143 struct genericFormat *gaf; 154 struct genericFormat *gaf;
144 uint8_t *ea = NULL; 155 uint8_t *ea = NULL;
145 uint32_t offset; 156 uint32_t offset;
157 struct udf_inode_info *iinfo = UDF_I(inode);
146 158
147 ea = UDF_I_DATA(inode); 159 ea = iinfo->i_ext.i_data;
148 160
149 if (UDF_I_LENEATTR(inode)) { 161 if (iinfo->i_lenEAttr) {
150 struct extendedAttrHeaderDesc *eahd; 162 struct extendedAttrHeaderDesc *eahd;
151 eahd = (struct extendedAttrHeaderDesc *)ea; 163 eahd = (struct extendedAttrHeaderDesc *)ea;
152 164
153 /* check checksum/crc */ 165 /* check checksum/crc */
154 if (le16_to_cpu(eahd->descTag.tagIdent) != TAG_IDENT_EAHD || 166 if (eahd->descTag.tagIdent !=
155 le32_to_cpu(eahd->descTag.tagLocation) != UDF_I_LOCATION(inode).logicalBlockNum) { 167 cpu_to_le16(TAG_IDENT_EAHD) ||
168 le32_to_cpu(eahd->descTag.tagLocation) !=
169 iinfo->i_location.logicalBlockNum)
156 return NULL; 170 return NULL;
157 }
158 171
159 if (type < 2048) 172 if (type < 2048)
160 offset = sizeof(struct extendedAttrHeaderDesc); 173 offset = sizeof(struct extendedAttrHeaderDesc);
@@ -163,9 +176,10 @@ struct genericFormat *udf_get_extendedattr(struct inode *inode, uint32_t type,
163 else 176 else
164 offset = le32_to_cpu(eahd->appAttrLocation); 177 offset = le32_to_cpu(eahd->appAttrLocation);
165 178
166 while (offset < UDF_I_LENEATTR(inode)) { 179 while (offset < iinfo->i_lenEAttr) {
167 gaf = (struct genericFormat *)&ea[offset]; 180 gaf = (struct genericFormat *)&ea[offset];
168 if (le32_to_cpu(gaf->attrType) == type && gaf->attrSubtype == subtype) 181 if (le32_to_cpu(gaf->attrType) == type &&
182 gaf->attrSubtype == subtype)
169 return gaf; 183 return gaf;
170 else 184 else
171 offset += le32_to_cpu(gaf->attrLength); 185 offset += le32_to_cpu(gaf->attrLength);
@@ -186,21 +200,20 @@ struct genericFormat *udf_get_extendedattr(struct inode *inode, uint32_t type,
186 * Written, tested, and released. 200 * Written, tested, and released.
187 */ 201 */
188struct buffer_head *udf_read_tagged(struct super_block *sb, uint32_t block, 202struct buffer_head *udf_read_tagged(struct super_block *sb, uint32_t block,
189 uint32_t location, uint16_t * ident) 203 uint32_t location, uint16_t *ident)
190{ 204{
191 tag *tag_p; 205 tag *tag_p;
192 struct buffer_head *bh = NULL; 206 struct buffer_head *bh = NULL;
193 register uint8_t checksum; 207 struct udf_sb_info *sbi = UDF_SB(sb);
194 register int i;
195 208
196 /* Read the block */ 209 /* Read the block */
197 if (block == 0xFFFFFFFF) 210 if (block == 0xFFFFFFFF)
198 return NULL; 211 return NULL;
199 212
200 bh = udf_tread(sb, block + UDF_SB_SESSION(sb)); 213 bh = udf_tread(sb, block + sbi->s_session);
201 if (!bh) { 214 if (!bh) {
202 udf_debug("block=%d, location=%d: read failed\n", 215 udf_debug("block=%d, location=%d: read failed\n",
203 block + UDF_SB_SESSION(sb), location); 216 block + sbi->s_session, location);
204 return NULL; 217 return NULL;
205 } 218 }
206 219
@@ -210,24 +223,20 @@ struct buffer_head *udf_read_tagged(struct super_block *sb, uint32_t block,
210 223
211 if (location != le32_to_cpu(tag_p->tagLocation)) { 224 if (location != le32_to_cpu(tag_p->tagLocation)) {
212 udf_debug("location mismatch block %u, tag %u != %u\n", 225 udf_debug("location mismatch block %u, tag %u != %u\n",
213 block + UDF_SB_SESSION(sb), le32_to_cpu(tag_p->tagLocation), location); 226 block + sbi->s_session,
227 le32_to_cpu(tag_p->tagLocation), location);
214 goto error_out; 228 goto error_out;
215 } 229 }
216 230
217 /* Verify the tag checksum */ 231 /* Verify the tag checksum */
218 checksum = 0U; 232 if (udf_tag_checksum(tag_p) != tag_p->tagChecksum) {
219 for (i = 0; i < 4; i++)
220 checksum += (uint8_t)(bh->b_data[i]);
221 for (i = 5; i < 16; i++)
222 checksum += (uint8_t)(bh->b_data[i]);
223 if (checksum != tag_p->tagChecksum) {
224 printk(KERN_ERR "udf: tag checksum failed block %d\n", block); 233 printk(KERN_ERR "udf: tag checksum failed block %d\n", block);
225 goto error_out; 234 goto error_out;
226 } 235 }
227 236
228 /* Verify the tag version */ 237 /* Verify the tag version */
229 if (le16_to_cpu(tag_p->descVersion) != 0x0002U && 238 if (tag_p->descVersion != cpu_to_le16(0x0002U) &&
230 le16_to_cpu(tag_p->descVersion) != 0x0003U) { 239 tag_p->descVersion != cpu_to_le16(0x0003U)) {
231 udf_debug("tag version 0x%04x != 0x0002 || 0x0003 block %d\n", 240 udf_debug("tag version 0x%04x != 0x0002 || 0x0003 block %d\n",
232 le16_to_cpu(tag_p->descVersion), block); 241 le16_to_cpu(tag_p->descVersion), block);
233 goto error_out; 242 goto error_out;
@@ -236,11 +245,11 @@ struct buffer_head *udf_read_tagged(struct super_block *sb, uint32_t block,
236 /* Verify the descriptor CRC */ 245 /* Verify the descriptor CRC */
237 if (le16_to_cpu(tag_p->descCRCLength) + sizeof(tag) > sb->s_blocksize || 246 if (le16_to_cpu(tag_p->descCRCLength) + sizeof(tag) > sb->s_blocksize ||
238 le16_to_cpu(tag_p->descCRC) == udf_crc(bh->b_data + sizeof(tag), 247 le16_to_cpu(tag_p->descCRC) == udf_crc(bh->b_data + sizeof(tag),
239 le16_to_cpu(tag_p->descCRCLength), 0)) { 248 le16_to_cpu(tag_p->descCRCLength), 0))
240 return bh; 249 return bh;
241 } 250
242 udf_debug("Crc failure block %d: crc = %d, crclen = %d\n", 251 udf_debug("Crc failure block %d: crc = %d, crclen = %d\n",
243 block + UDF_SB_SESSION(sb), le16_to_cpu(tag_p->descCRC), 252 block + sbi->s_session, le16_to_cpu(tag_p->descCRC),
244 le16_to_cpu(tag_p->descCRCLength)); 253 le16_to_cpu(tag_p->descCRCLength));
245 254
246error_out: 255error_out:
@@ -249,7 +258,7 @@ error_out:
249} 258}
250 259
251struct buffer_head *udf_read_ptagged(struct super_block *sb, kernel_lb_addr loc, 260struct buffer_head *udf_read_ptagged(struct super_block *sb, kernel_lb_addr loc,
252 uint32_t offset, uint16_t * ident) 261 uint32_t offset, uint16_t *ident)
253{ 262{
254 return udf_read_tagged(sb, udf_get_lb_pblock(sb, loc, offset), 263 return udf_read_tagged(sb, udf_get_lb_pblock(sb, loc, offset),
255 loc.logicalBlockNum + offset, ident); 264 loc.logicalBlockNum + offset, ident);
@@ -258,17 +267,11 @@ struct buffer_head *udf_read_ptagged(struct super_block *sb, kernel_lb_addr loc,
258void udf_update_tag(char *data, int length) 267void udf_update_tag(char *data, int length)
259{ 268{
260 tag *tptr = (tag *)data; 269 tag *tptr = (tag *)data;
261 int i;
262
263 length -= sizeof(tag); 270 length -= sizeof(tag);
264 271
265 tptr->tagChecksum = 0;
266 tptr->descCRCLength = cpu_to_le16(length); 272 tptr->descCRCLength = cpu_to_le16(length);
267 tptr->descCRC = cpu_to_le16(udf_crc(data + sizeof(tag), length, 0)); 273 tptr->descCRC = cpu_to_le16(udf_crc(data + sizeof(tag), length, 0));
268 274 tptr->tagChecksum = udf_tag_checksum(tptr);
269 for (i = 0; i < 16; i++)
270 if (i != 4)
271 tptr->tagChecksum += (uint8_t)(data[i]);
272} 275}
273 276
274void udf_new_tag(char *data, uint16_t ident, uint16_t version, uint16_t snum, 277void udf_new_tag(char *data, uint16_t ident, uint16_t version, uint16_t snum,
@@ -281,3 +284,14 @@ void udf_new_tag(char *data, uint16_t ident, uint16_t version, uint16_t snum,
281 tptr->tagLocation = cpu_to_le32(loc); 284 tptr->tagLocation = cpu_to_le32(loc);
282 udf_update_tag(data, length); 285 udf_update_tag(data, length);
283} 286}
287
288u8 udf_tag_checksum(const tag *t)
289{
290 u8 *data = (u8 *)t;
291 u8 checksum = 0;
292 int i;
293 for (i = 0; i < sizeof(tag); ++i)
294 if (i != 4) /* position of checksum */
295 checksum += data[i];
296 return checksum;
297}
diff --git a/fs/udf/namei.c b/fs/udf/namei.c
index bec96a6b3343..112a5fb0b27b 100644
--- a/fs/udf/namei.c
+++ b/fs/udf/namei.c
@@ -43,12 +43,10 @@ static inline int udf_match(int len1, const char *name1, int len2,
43 43
44int udf_write_fi(struct inode *inode, struct fileIdentDesc *cfi, 44int udf_write_fi(struct inode *inode, struct fileIdentDesc *cfi,
45 struct fileIdentDesc *sfi, struct udf_fileident_bh *fibh, 45 struct fileIdentDesc *sfi, struct udf_fileident_bh *fibh,
46 uint8_t * impuse, uint8_t * fileident) 46 uint8_t *impuse, uint8_t *fileident)
47{ 47{
48 uint16_t crclen = fibh->eoffset - fibh->soffset - sizeof(tag); 48 uint16_t crclen = fibh->eoffset - fibh->soffset - sizeof(tag);
49 uint16_t crc; 49 uint16_t crc;
50 uint8_t checksum = 0;
51 int i;
52 int offset; 50 int offset;
53 uint16_t liu = le16_to_cpu(cfi->lengthOfImpUse); 51 uint16_t liu = le16_to_cpu(cfi->lengthOfImpUse);
54 uint8_t lfi = cfi->lengthFileIdent; 52 uint8_t lfi = cfi->lengthFileIdent;
@@ -56,7 +54,7 @@ int udf_write_fi(struct inode *inode, struct fileIdentDesc *cfi,
56 sizeof(struct fileIdentDesc); 54 sizeof(struct fileIdentDesc);
57 int adinicb = 0; 55 int adinicb = 0;
58 56
59 if (UDF_I_ALLOCTYPE(inode) == ICBTAG_FLAG_AD_IN_ICB) 57 if (UDF_I(inode)->i_alloc_type == ICBTAG_FLAG_AD_IN_ICB)
60 adinicb = 1; 58 adinicb = 1;
61 59
62 offset = fibh->soffset + sizeof(struct fileIdentDesc); 60 offset = fibh->soffset + sizeof(struct fileIdentDesc);
@@ -68,7 +66,8 @@ int udf_write_fi(struct inode *inode, struct fileIdentDesc *cfi,
68 memcpy(fibh->ebh->b_data + offset, impuse, liu); 66 memcpy(fibh->ebh->b_data + offset, impuse, liu);
69 } else { 67 } else {
70 memcpy((uint8_t *)sfi->impUse, impuse, -offset); 68 memcpy((uint8_t *)sfi->impUse, impuse, -offset);
71 memcpy(fibh->ebh->b_data, impuse - offset, liu + offset); 69 memcpy(fibh->ebh->b_data, impuse - offset,
70 liu + offset);
72 } 71 }
73 } 72 }
74 73
@@ -80,8 +79,10 @@ int udf_write_fi(struct inode *inode, struct fileIdentDesc *cfi,
80 } else if (offset >= 0) { 79 } else if (offset >= 0) {
81 memcpy(fibh->ebh->b_data + offset, fileident, lfi); 80 memcpy(fibh->ebh->b_data + offset, fileident, lfi);
82 } else { 81 } else {
83 memcpy((uint8_t *)sfi->fileIdent + liu, fileident, -offset); 82 memcpy((uint8_t *)sfi->fileIdent + liu, fileident,
84 memcpy(fibh->ebh->b_data, fileident - offset, lfi + offset); 83 -offset);
84 memcpy(fibh->ebh->b_data, fileident - offset,
85 lfi + offset);
85 } 86 }
86 } 87 }
87 88
@@ -101,27 +102,29 @@ int udf_write_fi(struct inode *inode, struct fileIdentDesc *cfi,
101 102
102 if (fibh->sbh == fibh->ebh) { 103 if (fibh->sbh == fibh->ebh) {
103 crc = udf_crc((uint8_t *)sfi->impUse, 104 crc = udf_crc((uint8_t *)sfi->impUse,
104 crclen + sizeof(tag) - sizeof(struct fileIdentDesc), crc); 105 crclen + sizeof(tag) -
106 sizeof(struct fileIdentDesc), crc);
105 } else if (sizeof(struct fileIdentDesc) >= -fibh->soffset) { 107 } else if (sizeof(struct fileIdentDesc) >= -fibh->soffset) {
106 crc = udf_crc(fibh->ebh->b_data + sizeof(struct fileIdentDesc) + fibh->soffset, 108 crc = udf_crc(fibh->ebh->b_data +
107 crclen + sizeof(tag) - sizeof(struct fileIdentDesc), crc); 109 sizeof(struct fileIdentDesc) +
110 fibh->soffset,
111 crclen + sizeof(tag) -
112 sizeof(struct fileIdentDesc),
113 crc);
108 } else { 114 } else {
109 crc = udf_crc((uint8_t *)sfi->impUse, 115 crc = udf_crc((uint8_t *)sfi->impUse,
110 -fibh->soffset - sizeof(struct fileIdentDesc), crc); 116 -fibh->soffset - sizeof(struct fileIdentDesc),
117 crc);
111 crc = udf_crc(fibh->ebh->b_data, fibh->eoffset, crc); 118 crc = udf_crc(fibh->ebh->b_data, fibh->eoffset, crc);
112 } 119 }
113 120
114 cfi->descTag.descCRC = cpu_to_le16(crc); 121 cfi->descTag.descCRC = cpu_to_le16(crc);
115 cfi->descTag.descCRCLength = cpu_to_le16(crclen); 122 cfi->descTag.descCRCLength = cpu_to_le16(crclen);
123 cfi->descTag.tagChecksum = udf_tag_checksum(&cfi->descTag);
116 124
117 for (i = 0; i < 16; i++) {
118 if (i != 4)
119 checksum += ((uint8_t *)&cfi->descTag)[i];
120 }
121
122 cfi->descTag.tagChecksum = checksum;
123 if (adinicb || (sizeof(struct fileIdentDesc) <= -fibh->soffset)) { 125 if (adinicb || (sizeof(struct fileIdentDesc) <= -fibh->soffset)) {
124 memcpy((uint8_t *)sfi, (uint8_t *)cfi, sizeof(struct fileIdentDesc)); 126 memcpy((uint8_t *)sfi, (uint8_t *)cfi,
127 sizeof(struct fileIdentDesc));
125 } else { 128 } else {
126 memcpy((uint8_t *)sfi, (uint8_t *)cfi, -fibh->soffset); 129 memcpy((uint8_t *)sfi, (uint8_t *)cfi, -fibh->soffset);
127 memcpy(fibh->ebh->b_data, (uint8_t *)cfi - fibh->soffset, 130 memcpy(fibh->ebh->b_data, (uint8_t *)cfi - fibh->soffset,
@@ -155,26 +158,28 @@ static struct fileIdentDesc *udf_find_entry(struct inode *dir,
155 uint32_t elen; 158 uint32_t elen;
156 sector_t offset; 159 sector_t offset;
157 struct extent_position epos = {}; 160 struct extent_position epos = {};
161 struct udf_inode_info *dinfo = UDF_I(dir);
158 162
159 size = (udf_ext0_offset(dir) + dir->i_size) >> 2; 163 size = udf_ext0_offset(dir) + dir->i_size;
160 f_pos = (udf_ext0_offset(dir) >> 2); 164 f_pos = udf_ext0_offset(dir);
161 165
162 fibh->soffset = fibh->eoffset = (f_pos & ((dir->i_sb->s_blocksize - 1) >> 2)) << 2; 166 fibh->soffset = fibh->eoffset = f_pos & (dir->i_sb->s_blocksize - 1);
163 if (UDF_I_ALLOCTYPE(dir) == ICBTAG_FLAG_AD_IN_ICB) { 167 if (dinfo->i_alloc_type == ICBTAG_FLAG_AD_IN_ICB)
164 fibh->sbh = fibh->ebh = NULL; 168 fibh->sbh = fibh->ebh = NULL;
165 } else if (inode_bmap(dir, f_pos >> (dir->i_sb->s_blocksize_bits - 2), 169 else if (inode_bmap(dir, f_pos >> dir->i_sb->s_blocksize_bits,
166 &epos, &eloc, &elen, &offset) == (EXT_RECORDED_ALLOCATED >> 30)) { 170 &epos, &eloc, &elen, &offset) ==
171 (EXT_RECORDED_ALLOCATED >> 30)) {
167 block = udf_get_lb_pblock(dir->i_sb, eloc, offset); 172 block = udf_get_lb_pblock(dir->i_sb, eloc, offset);
168 if ((++offset << dir->i_sb->s_blocksize_bits) < elen) { 173 if ((++offset << dir->i_sb->s_blocksize_bits) < elen) {
169 if (UDF_I_ALLOCTYPE(dir) == ICBTAG_FLAG_AD_SHORT) 174 if (dinfo->i_alloc_type == ICBTAG_FLAG_AD_SHORT)
170 epos.offset -= sizeof(short_ad); 175 epos.offset -= sizeof(short_ad);
171 else if (UDF_I_ALLOCTYPE(dir) == ICBTAG_FLAG_AD_LONG) 176 else if (dinfo->i_alloc_type == ICBTAG_FLAG_AD_LONG)
172 epos.offset -= sizeof(long_ad); 177 epos.offset -= sizeof(long_ad);
173 } else { 178 } else
174 offset = 0; 179 offset = 0;
175 }
176 180
177 if (!(fibh->sbh = fibh->ebh = udf_tread(dir->i_sb, block))) { 181 fibh->sbh = fibh->ebh = udf_tread(dir->i_sb, block);
182 if (!fibh->sbh) {
178 brelse(epos.bh); 183 brelse(epos.bh);
179 return NULL; 184 return NULL;
180 } 185 }
@@ -183,7 +188,7 @@ static struct fileIdentDesc *udf_find_entry(struct inode *dir,
183 return NULL; 188 return NULL;
184 } 189 }
185 190
186 while ((f_pos < size)) { 191 while (f_pos < size) {
187 fi = udf_fileident_read(dir, &f_pos, fibh, cfi, &epos, &eloc, 192 fi = udf_fileident_read(dir, &f_pos, fibh, cfi, &epos, &eloc,
188 &elen, &offset); 193 &elen, &offset);
189 if (!fi) { 194 if (!fi) {
@@ -202,14 +207,18 @@ static struct fileIdentDesc *udf_find_entry(struct inode *dir,
202 } else { 207 } else {
203 int poffset; /* Unpaded ending offset */ 208 int poffset; /* Unpaded ending offset */
204 209
205 poffset = fibh->soffset + sizeof(struct fileIdentDesc) + liu + lfi; 210 poffset = fibh->soffset + sizeof(struct fileIdentDesc) +
211 liu + lfi;
206 212
207 if (poffset >= lfi) { 213 if (poffset >= lfi)
208 nameptr = (uint8_t *)(fibh->ebh->b_data + poffset - lfi); 214 nameptr = (uint8_t *)(fibh->ebh->b_data +
209 } else { 215 poffset - lfi);
216 else {
210 nameptr = fname; 217 nameptr = fname;
211 memcpy(nameptr, fi->fileIdent + liu, lfi - poffset); 218 memcpy(nameptr, fi->fileIdent + liu,
212 memcpy(nameptr + lfi - poffset, fibh->ebh->b_data, poffset); 219 lfi - poffset);
220 memcpy(nameptr + lfi - poffset,
221 fibh->ebh->b_data, poffset);
213 } 222 }
214 } 223 }
215 224
@@ -226,11 +235,11 @@ static struct fileIdentDesc *udf_find_entry(struct inode *dir,
226 if (!lfi) 235 if (!lfi)
227 continue; 236 continue;
228 237
229 if ((flen = udf_get_filename(dir->i_sb, nameptr, fname, lfi))) { 238 flen = udf_get_filename(dir->i_sb, nameptr, fname, lfi);
230 if (udf_match(flen, fname, dentry->d_name.len, dentry->d_name.name)) { 239 if (flen && udf_match(flen, fname, dentry->d_name.len,
231 brelse(epos.bh); 240 dentry->d_name.name)) {
232 return fi; 241 brelse(epos.bh);
233 } 242 return fi;
234 } 243 }
235 } 244 }
236 245
@@ -291,16 +300,16 @@ static struct dentry *udf_lookup(struct inode *dir, struct dentry *dentry,
291 if (!strncmp(dentry->d_name.name, ".B=", 3)) { 300 if (!strncmp(dentry->d_name.name, ".B=", 3)) {
292 kernel_lb_addr lb = { 301 kernel_lb_addr lb = {
293 .logicalBlockNum = 0, 302 .logicalBlockNum = 0,
294 .partitionReferenceNum = simple_strtoul(dentry->d_name.name + 3, 303 .partitionReferenceNum =
295 NULL, 0), 304 simple_strtoul(dentry->d_name.name + 3,
305 NULL, 0),
296 }; 306 };
297 inode = udf_iget(dir->i_sb, lb); 307 inode = udf_iget(dir->i_sb, lb);
298 if (!inode) { 308 if (!inode) {
299 unlock_kernel(); 309 unlock_kernel();
300 return ERR_PTR(-EACCES); 310 return ERR_PTR(-EACCES);
301 } 311 }
302 } 312 } else
303 else
304#endif /* UDF_RECOVERY */ 313#endif /* UDF_RECOVERY */
305 314
306 if (udf_find_entry(dir, dentry, &fibh, &cfi)) { 315 if (udf_find_entry(dir, dentry, &fibh, &cfi)) {
@@ -325,14 +334,14 @@ static struct fileIdentDesc *udf_add_entry(struct inode *dir,
325 struct udf_fileident_bh *fibh, 334 struct udf_fileident_bh *fibh,
326 struct fileIdentDesc *cfi, int *err) 335 struct fileIdentDesc *cfi, int *err)
327{ 336{
328 struct super_block *sb; 337 struct super_block *sb = dir->i_sb;
329 struct fileIdentDesc *fi = NULL; 338 struct fileIdentDesc *fi = NULL;
330 char name[UDF_NAME_LEN], fname[UDF_NAME_LEN]; 339 char name[UDF_NAME_LEN], fname[UDF_NAME_LEN];
331 int namelen; 340 int namelen;
332 loff_t f_pos; 341 loff_t f_pos;
333 int flen; 342 int flen;
334 char *nameptr; 343 char *nameptr;
335 loff_t size = (udf_ext0_offset(dir) + dir->i_size) >> 2; 344 loff_t size = udf_ext0_offset(dir) + dir->i_size;
336 int nfidlen; 345 int nfidlen;
337 uint8_t lfi; 346 uint8_t lfi;
338 uint16_t liu; 347 uint16_t liu;
@@ -341,16 +350,16 @@ static struct fileIdentDesc *udf_add_entry(struct inode *dir,
341 uint32_t elen; 350 uint32_t elen;
342 sector_t offset; 351 sector_t offset;
343 struct extent_position epos = {}; 352 struct extent_position epos = {};
344 353 struct udf_inode_info *dinfo;
345 sb = dir->i_sb;
346 354
347 if (dentry) { 355 if (dentry) {
348 if (!dentry->d_name.len) { 356 if (!dentry->d_name.len) {
349 *err = -EINVAL; 357 *err = -EINVAL;
350 return NULL; 358 return NULL;
351 } 359 }
352 if (!(namelen = udf_put_filename(sb, dentry->d_name.name, name, 360 namelen = udf_put_filename(sb, dentry->d_name.name, name,
353 dentry->d_name.len))) { 361 dentry->d_name.len);
362 if (!namelen) {
354 *err = -ENAMETOOLONG; 363 *err = -ENAMETOOLONG;
355 return NULL; 364 return NULL;
356 } 365 }
@@ -360,39 +369,40 @@ static struct fileIdentDesc *udf_add_entry(struct inode *dir,
360 369
361 nfidlen = (sizeof(struct fileIdentDesc) + namelen + 3) & ~3; 370 nfidlen = (sizeof(struct fileIdentDesc) + namelen + 3) & ~3;
362 371
363 f_pos = (udf_ext0_offset(dir) >> 2); 372 f_pos = udf_ext0_offset(dir);
364 373
365 fibh->soffset = fibh->eoffset = (f_pos & ((dir->i_sb->s_blocksize - 1) >> 2)) << 2; 374 fibh->soffset = fibh->eoffset = f_pos & (dir->i_sb->s_blocksize - 1);
366 if (UDF_I_ALLOCTYPE(dir) == ICBTAG_FLAG_AD_IN_ICB) { 375 dinfo = UDF_I(dir);
376 if (dinfo->i_alloc_type == ICBTAG_FLAG_AD_IN_ICB)
367 fibh->sbh = fibh->ebh = NULL; 377 fibh->sbh = fibh->ebh = NULL;
368 } else if (inode_bmap(dir, f_pos >> (dir->i_sb->s_blocksize_bits - 2), 378 else if (inode_bmap(dir, f_pos >> dir->i_sb->s_blocksize_bits,
369 &epos, &eloc, &elen, &offset) == (EXT_RECORDED_ALLOCATED >> 30)) { 379 &epos, &eloc, &elen, &offset) ==
380 (EXT_RECORDED_ALLOCATED >> 30)) {
370 block = udf_get_lb_pblock(dir->i_sb, eloc, offset); 381 block = udf_get_lb_pblock(dir->i_sb, eloc, offset);
371 if ((++offset << dir->i_sb->s_blocksize_bits) < elen) { 382 if ((++offset << dir->i_sb->s_blocksize_bits) < elen) {
372 if (UDF_I_ALLOCTYPE(dir) == ICBTAG_FLAG_AD_SHORT) 383 if (dinfo->i_alloc_type == ICBTAG_FLAG_AD_SHORT)
373 epos.offset -= sizeof(short_ad); 384 epos.offset -= sizeof(short_ad);
374 else if (UDF_I_ALLOCTYPE(dir) == ICBTAG_FLAG_AD_LONG) 385 else if (dinfo->i_alloc_type == ICBTAG_FLAG_AD_LONG)
375 epos.offset -= sizeof(long_ad); 386 epos.offset -= sizeof(long_ad);
376 } else { 387 } else
377 offset = 0; 388 offset = 0;
378 }
379 389
380 if (!(fibh->sbh = fibh->ebh = udf_tread(dir->i_sb, block))) { 390 fibh->sbh = fibh->ebh = udf_tread(dir->i_sb, block);
391 if (!fibh->sbh) {
381 brelse(epos.bh); 392 brelse(epos.bh);
382 *err = -EIO; 393 *err = -EIO;
383 return NULL; 394 return NULL;
384 } 395 }
385 396
386 block = UDF_I_LOCATION(dir).logicalBlockNum; 397 block = dinfo->i_location.logicalBlockNum;
387
388 } else { 398 } else {
389 block = udf_get_lb_pblock(dir->i_sb, UDF_I_LOCATION(dir), 0); 399 block = udf_get_lb_pblock(dir->i_sb, dinfo->i_location, 0);
390 fibh->sbh = fibh->ebh = NULL; 400 fibh->sbh = fibh->ebh = NULL;
391 fibh->soffset = fibh->eoffset = sb->s_blocksize; 401 fibh->soffset = fibh->eoffset = sb->s_blocksize;
392 goto add; 402 goto add;
393 } 403 }
394 404
395 while ((f_pos < size)) { 405 while (f_pos < size) {
396 fi = udf_fileident_read(dir, &f_pos, fibh, cfi, &epos, &eloc, 406 fi = udf_fileident_read(dir, &f_pos, fibh, cfi, &epos, &eloc,
397 &elen, &offset); 407 &elen, &offset);
398 408
@@ -408,33 +418,39 @@ static struct fileIdentDesc *udf_add_entry(struct inode *dir,
408 liu = le16_to_cpu(cfi->lengthOfImpUse); 418 liu = le16_to_cpu(cfi->lengthOfImpUse);
409 lfi = cfi->lengthFileIdent; 419 lfi = cfi->lengthFileIdent;
410 420
411 if (fibh->sbh == fibh->ebh) { 421 if (fibh->sbh == fibh->ebh)
412 nameptr = fi->fileIdent + liu; 422 nameptr = fi->fileIdent + liu;
413 } else { 423 else {
414 int poffset; /* Unpaded ending offset */ 424 int poffset; /* Unpaded ending offset */
415 425
416 poffset = fibh->soffset + sizeof(struct fileIdentDesc) + liu + lfi; 426 poffset = fibh->soffset + sizeof(struct fileIdentDesc) +
427 liu + lfi;
417 428
418 if (poffset >= lfi) { 429 if (poffset >= lfi)
419 nameptr = (char *)(fibh->ebh->b_data + poffset - lfi); 430 nameptr = (char *)(fibh->ebh->b_data +
420 } else { 431 poffset - lfi);
432 else {
421 nameptr = fname; 433 nameptr = fname;
422 memcpy(nameptr, fi->fileIdent + liu, lfi - poffset); 434 memcpy(nameptr, fi->fileIdent + liu,
423 memcpy(nameptr + lfi - poffset, fibh->ebh->b_data, poffset); 435 lfi - poffset);
436 memcpy(nameptr + lfi - poffset,
437 fibh->ebh->b_data, poffset);
424 } 438 }
425 } 439 }
426 440
427 if ((cfi->fileCharacteristics & FID_FILE_CHAR_DELETED) != 0) { 441 if ((cfi->fileCharacteristics & FID_FILE_CHAR_DELETED) != 0) {
428 if (((sizeof(struct fileIdentDesc) + liu + lfi + 3) & ~3) == nfidlen) { 442 if (((sizeof(struct fileIdentDesc) +
443 liu + lfi + 3) & ~3) == nfidlen) {
429 brelse(epos.bh); 444 brelse(epos.bh);
430 cfi->descTag.tagSerialNum = cpu_to_le16(1); 445 cfi->descTag.tagSerialNum = cpu_to_le16(1);
431 cfi->fileVersionNum = cpu_to_le16(1); 446 cfi->fileVersionNum = cpu_to_le16(1);
432 cfi->fileCharacteristics = 0; 447 cfi->fileCharacteristics = 0;
433 cfi->lengthFileIdent = namelen; 448 cfi->lengthFileIdent = namelen;
434 cfi->lengthOfImpUse = cpu_to_le16(0); 449 cfi->lengthOfImpUse = cpu_to_le16(0);
435 if (!udf_write_fi(dir, cfi, fi, fibh, NULL, name)) { 450 if (!udf_write_fi(dir, cfi, fi, fibh, NULL,
451 name))
436 return fi; 452 return fi;
437 } else { 453 else {
438 *err = -EIO; 454 *err = -EIO;
439 return NULL; 455 return NULL;
440 } 456 }
@@ -444,8 +460,9 @@ static struct fileIdentDesc *udf_add_entry(struct inode *dir,
444 if (!lfi || !dentry) 460 if (!lfi || !dentry)
445 continue; 461 continue;
446 462
447 if ((flen = udf_get_filename(dir->i_sb, nameptr, fname, lfi)) && 463 flen = udf_get_filename(dir->i_sb, nameptr, fname, lfi);
448 udf_match(flen, fname, dentry->d_name.len, dentry->d_name.name)) { 464 if (flen && udf_match(flen, fname, dentry->d_name.len,
465 dentry->d_name.name)) {
449 if (fibh->sbh != fibh->ebh) 466 if (fibh->sbh != fibh->ebh)
450 brelse(fibh->ebh); 467 brelse(fibh->ebh);
451 brelse(fibh->sbh); 468 brelse(fibh->sbh);
@@ -456,29 +473,34 @@ static struct fileIdentDesc *udf_add_entry(struct inode *dir,
456 } 473 }
457 474
458add: 475add:
476 if (dinfo->i_alloc_type != ICBTAG_FLAG_AD_IN_ICB) {
477 elen = (elen + sb->s_blocksize - 1) & ~(sb->s_blocksize - 1);
478 if (dinfo->i_alloc_type == ICBTAG_FLAG_AD_SHORT)
479 epos.offset -= sizeof(short_ad);
480 else if (dinfo->i_alloc_type == ICBTAG_FLAG_AD_LONG)
481 epos.offset -= sizeof(long_ad);
482 udf_write_aext(dir, &epos, eloc, elen, 1);
483 }
459 f_pos += nfidlen; 484 f_pos += nfidlen;
460 485
461 if (UDF_I_ALLOCTYPE(dir) == ICBTAG_FLAG_AD_IN_ICB && 486 if (dinfo->i_alloc_type == ICBTAG_FLAG_AD_IN_ICB &&
462 sb->s_blocksize - fibh->eoffset < nfidlen) { 487 sb->s_blocksize - fibh->eoffset < nfidlen) {
463 brelse(epos.bh); 488 brelse(epos.bh);
464 epos.bh = NULL; 489 epos.bh = NULL;
465 fibh->soffset -= udf_ext0_offset(dir); 490 fibh->soffset -= udf_ext0_offset(dir);
466 fibh->eoffset -= udf_ext0_offset(dir); 491 fibh->eoffset -= udf_ext0_offset(dir);
467 f_pos -= (udf_ext0_offset(dir) >> 2); 492 f_pos -= udf_ext0_offset(dir);
468 if (fibh->sbh != fibh->ebh) 493 if (fibh->sbh != fibh->ebh)
469 brelse(fibh->ebh); 494 brelse(fibh->ebh);
470 brelse(fibh->sbh); 495 brelse(fibh->sbh);
471 if (!(fibh->sbh = fibh->ebh = udf_expand_dir_adinicb(dir, &block, err))) 496 fibh->sbh = fibh->ebh =
497 udf_expand_dir_adinicb(dir, &block, err);
498 if (!fibh->sbh)
472 return NULL; 499 return NULL;
473 epos.block = UDF_I_LOCATION(dir); 500 epos.block = dinfo->i_location;
474 eloc.logicalBlockNum = block;
475 eloc.partitionReferenceNum = UDF_I_LOCATION(dir).partitionReferenceNum;
476 elen = dir->i_sb->s_blocksize;
477 epos.offset = udf_file_entry_alloc_offset(dir); 501 epos.offset = udf_file_entry_alloc_offset(dir);
478 if (UDF_I_ALLOCTYPE(dir) == ICBTAG_FLAG_AD_SHORT) 502 /* Load extent udf_expand_dir_adinicb() has created */
479 epos.offset += sizeof(short_ad); 503 udf_current_aext(dir, &epos, &eloc, &elen, 1);
480 else if (UDF_I_ALLOCTYPE(dir) == ICBTAG_FLAG_AD_LONG)
481 epos.offset += sizeof(long_ad);
482 } 504 }
483 505
484 if (sb->s_blocksize - fibh->eoffset >= nfidlen) { 506 if (sb->s_blocksize - fibh->eoffset >= nfidlen) {
@@ -489,15 +511,19 @@ add:
489 fibh->sbh = fibh->ebh; 511 fibh->sbh = fibh->ebh;
490 } 512 }
491 513
492 if (UDF_I_ALLOCTYPE(dir) == ICBTAG_FLAG_AD_IN_ICB) { 514 if (dinfo->i_alloc_type == ICBTAG_FLAG_AD_IN_ICB) {
493 block = UDF_I_LOCATION(dir).logicalBlockNum; 515 block = dinfo->i_location.logicalBlockNum;
494 fi = (struct fileIdentDesc *)(UDF_I_DATA(dir) + fibh->soffset - 516 fi = (struct fileIdentDesc *)
495 udf_ext0_offset(dir) + 517 (dinfo->i_ext.i_data +
496 UDF_I_LENEATTR(dir)); 518 fibh->soffset -
519 udf_ext0_offset(dir) +
520 dinfo->i_lenEAttr);
497 } else { 521 } else {
498 block = eloc.logicalBlockNum + ((elen - 1) >> 522 block = eloc.logicalBlockNum +
499 dir->i_sb->s_blocksize_bits); 523 ((elen - 1) >>
500 fi = (struct fileIdentDesc *)(fibh->sbh->b_data + fibh->soffset); 524 dir->i_sb->s_blocksize_bits);
525 fi = (struct fileIdentDesc *)
526 (fibh->sbh->b_data + fibh->soffset);
501 } 527 }
502 } else { 528 } else {
503 fibh->soffset = fibh->eoffset - sb->s_blocksize; 529 fibh->soffset = fibh->eoffset - sb->s_blocksize;
@@ -509,7 +535,8 @@ add:
509 535
510 block = eloc.logicalBlockNum + ((elen - 1) >> 536 block = eloc.logicalBlockNum + ((elen - 1) >>
511 dir->i_sb->s_blocksize_bits); 537 dir->i_sb->s_blocksize_bits);
512 fibh->ebh = udf_bread(dir, f_pos >> (dir->i_sb->s_blocksize_bits - 2), 1, err); 538 fibh->ebh = udf_bread(dir,
539 f_pos >> dir->i_sb->s_blocksize_bits, 1, err);
513 if (!fibh->ebh) { 540 if (!fibh->ebh) {
514 brelse(epos.bh); 541 brelse(epos.bh);
515 brelse(fibh->sbh); 542 brelse(fibh->sbh);
@@ -521,32 +548,34 @@ add:
521 (EXT_RECORDED_ALLOCATED >> 30)) { 548 (EXT_RECORDED_ALLOCATED >> 30)) {
522 block = eloc.logicalBlockNum + ((elen - 1) >> 549 block = eloc.logicalBlockNum + ((elen - 1) >>
523 dir->i_sb->s_blocksize_bits); 550 dir->i_sb->s_blocksize_bits);
524 } else { 551 } else
525 block++; 552 block++;
526 }
527 553
528 brelse(fibh->sbh); 554 brelse(fibh->sbh);
529 fibh->sbh = fibh->ebh; 555 fibh->sbh = fibh->ebh;
530 fi = (struct fileIdentDesc *)(fibh->sbh->b_data); 556 fi = (struct fileIdentDesc *)(fibh->sbh->b_data);
531 } else { 557 } else {
532 fi = (struct fileIdentDesc *) 558 fi = (struct fileIdentDesc *)
533 (fibh->sbh->b_data + sb->s_blocksize + fibh->soffset); 559 (fibh->sbh->b_data + sb->s_blocksize +
560 fibh->soffset);
534 } 561 }
535 } 562 }
536 563
537 memset(cfi, 0, sizeof(struct fileIdentDesc)); 564 memset(cfi, 0, sizeof(struct fileIdentDesc));
538 if (UDF_SB_UDFREV(sb) >= 0x0200) 565 if (UDF_SB(sb)->s_udfrev >= 0x0200)
539 udf_new_tag((char *)cfi, TAG_IDENT_FID, 3, 1, block, sizeof(tag)); 566 udf_new_tag((char *)cfi, TAG_IDENT_FID, 3, 1, block,
567 sizeof(tag));
540 else 568 else
541 udf_new_tag((char *)cfi, TAG_IDENT_FID, 2, 1, block, sizeof(tag)); 569 udf_new_tag((char *)cfi, TAG_IDENT_FID, 2, 1, block,
570 sizeof(tag));
542 cfi->fileVersionNum = cpu_to_le16(1); 571 cfi->fileVersionNum = cpu_to_le16(1);
543 cfi->lengthFileIdent = namelen; 572 cfi->lengthFileIdent = namelen;
544 cfi->lengthOfImpUse = cpu_to_le16(0); 573 cfi->lengthOfImpUse = cpu_to_le16(0);
545 if (!udf_write_fi(dir, cfi, fi, fibh, NULL, name)) { 574 if (!udf_write_fi(dir, cfi, fi, fibh, NULL, name)) {
546 brelse(epos.bh); 575 brelse(epos.bh);
547 dir->i_size += nfidlen; 576 dir->i_size += nfidlen;
548 if (UDF_I_ALLOCTYPE(dir) == ICBTAG_FLAG_AD_IN_ICB) 577 if (dinfo->i_alloc_type == ICBTAG_FLAG_AD_IN_ICB)
549 UDF_I_LENALLOC(dir) += nfidlen; 578 dinfo->i_lenAlloc += nfidlen;
550 mark_inode_dirty(dir); 579 mark_inode_dirty(dir);
551 return fi; 580 return fi;
552 } else { 581 } else {
@@ -578,6 +607,7 @@ static int udf_create(struct inode *dir, struct dentry *dentry, int mode,
578 struct inode *inode; 607 struct inode *inode;
579 struct fileIdentDesc cfi, *fi; 608 struct fileIdentDesc cfi, *fi;
580 int err; 609 int err;
610 struct udf_inode_info *iinfo;
581 611
582 lock_kernel(); 612 lock_kernel();
583 inode = udf_new_inode(dir, mode, &err); 613 inode = udf_new_inode(dir, mode, &err);
@@ -586,7 +616,8 @@ static int udf_create(struct inode *dir, struct dentry *dentry, int mode,
586 return err; 616 return err;
587 } 617 }
588 618
589 if (UDF_I_ALLOCTYPE(inode) == ICBTAG_FLAG_AD_IN_ICB) 619 iinfo = UDF_I(inode);
620 if (iinfo->i_alloc_type == ICBTAG_FLAG_AD_IN_ICB)
590 inode->i_data.a_ops = &udf_adinicb_aops; 621 inode->i_data.a_ops = &udf_adinicb_aops;
591 else 622 else
592 inode->i_data.a_ops = &udf_aops; 623 inode->i_data.a_ops = &udf_aops;
@@ -595,7 +626,8 @@ static int udf_create(struct inode *dir, struct dentry *dentry, int mode,
595 inode->i_mode = mode; 626 inode->i_mode = mode;
596 mark_inode_dirty(inode); 627 mark_inode_dirty(inode);
597 628
598 if (!(fi = udf_add_entry(dir, dentry, &fibh, &cfi, &err))) { 629 fi = udf_add_entry(dir, dentry, &fibh, &cfi, &err);
630 if (!fi) {
599 inode->i_nlink--; 631 inode->i_nlink--;
600 mark_inode_dirty(inode); 632 mark_inode_dirty(inode);
601 iput(inode); 633 iput(inode);
@@ -603,13 +635,12 @@ static int udf_create(struct inode *dir, struct dentry *dentry, int mode,
603 return err; 635 return err;
604 } 636 }
605 cfi.icb.extLength = cpu_to_le32(inode->i_sb->s_blocksize); 637 cfi.icb.extLength = cpu_to_le32(inode->i_sb->s_blocksize);
606 cfi.icb.extLocation = cpu_to_lelb(UDF_I_LOCATION(inode)); 638 cfi.icb.extLocation = cpu_to_lelb(iinfo->i_location);
607 *(__le32 *)((struct allocDescImpUse *)cfi.icb.impUse)->impUse = 639 *(__le32 *)((struct allocDescImpUse *)cfi.icb.impUse)->impUse =
608 cpu_to_le32(UDF_I_UNIQUE(inode) & 0x00000000FFFFFFFFUL); 640 cpu_to_le32(iinfo->i_unique & 0x00000000FFFFFFFFUL);
609 udf_write_fi(dir, &cfi, fi, &fibh, NULL, NULL); 641 udf_write_fi(dir, &cfi, fi, &fibh, NULL, NULL);
610 if (UDF_I_ALLOCTYPE(dir) == ICBTAG_FLAG_AD_IN_ICB) { 642 if (UDF_I(dir)->i_alloc_type == ICBTAG_FLAG_AD_IN_ICB)
611 mark_inode_dirty(dir); 643 mark_inode_dirty(dir);
612 }
613 if (fibh.sbh != fibh.ebh) 644 if (fibh.sbh != fibh.ebh)
614 brelse(fibh.ebh); 645 brelse(fibh.ebh);
615 brelse(fibh.sbh); 646 brelse(fibh.sbh);
@@ -626,6 +657,7 @@ static int udf_mknod(struct inode *dir, struct dentry *dentry, int mode,
626 struct udf_fileident_bh fibh; 657 struct udf_fileident_bh fibh;
627 struct fileIdentDesc cfi, *fi; 658 struct fileIdentDesc cfi, *fi;
628 int err; 659 int err;
660 struct udf_inode_info *iinfo;
629 661
630 if (!old_valid_dev(rdev)) 662 if (!old_valid_dev(rdev))
631 return -EINVAL; 663 return -EINVAL;
@@ -636,9 +668,11 @@ static int udf_mknod(struct inode *dir, struct dentry *dentry, int mode,
636 if (!inode) 668 if (!inode)
637 goto out; 669 goto out;
638 670
671 iinfo = UDF_I(inode);
639 inode->i_uid = current->fsuid; 672 inode->i_uid = current->fsuid;
640 init_special_inode(inode, mode, rdev); 673 init_special_inode(inode, mode, rdev);
641 if (!(fi = udf_add_entry(dir, dentry, &fibh, &cfi, &err))) { 674 fi = udf_add_entry(dir, dentry, &fibh, &cfi, &err);
675 if (!fi) {
642 inode->i_nlink--; 676 inode->i_nlink--;
643 mark_inode_dirty(inode); 677 mark_inode_dirty(inode);
644 iput(inode); 678 iput(inode);
@@ -646,13 +680,12 @@ static int udf_mknod(struct inode *dir, struct dentry *dentry, int mode,
646 return err; 680 return err;
647 } 681 }
648 cfi.icb.extLength = cpu_to_le32(inode->i_sb->s_blocksize); 682 cfi.icb.extLength = cpu_to_le32(inode->i_sb->s_blocksize);
649 cfi.icb.extLocation = cpu_to_lelb(UDF_I_LOCATION(inode)); 683 cfi.icb.extLocation = cpu_to_lelb(iinfo->i_location);
650 *(__le32 *)((struct allocDescImpUse *)cfi.icb.impUse)->impUse = 684 *(__le32 *)((struct allocDescImpUse *)cfi.icb.impUse)->impUse =
651 cpu_to_le32(UDF_I_UNIQUE(inode) & 0x00000000FFFFFFFFUL); 685 cpu_to_le32(iinfo->i_unique & 0x00000000FFFFFFFFUL);
652 udf_write_fi(dir, &cfi, fi, &fibh, NULL, NULL); 686 udf_write_fi(dir, &cfi, fi, &fibh, NULL, NULL);
653 if (UDF_I_ALLOCTYPE(dir) == ICBTAG_FLAG_AD_IN_ICB) { 687 if (UDF_I(dir)->i_alloc_type == ICBTAG_FLAG_AD_IN_ICB)
654 mark_inode_dirty(dir); 688 mark_inode_dirty(dir);
655 }
656 mark_inode_dirty(inode); 689 mark_inode_dirty(inode);
657 690
658 if (fibh.sbh != fibh.ebh) 691 if (fibh.sbh != fibh.ebh)
@@ -672,6 +705,8 @@ static int udf_mkdir(struct inode *dir, struct dentry *dentry, int mode)
672 struct udf_fileident_bh fibh; 705 struct udf_fileident_bh fibh;
673 struct fileIdentDesc cfi, *fi; 706 struct fileIdentDesc cfi, *fi;
674 int err; 707 int err;
708 struct udf_inode_info *dinfo = UDF_I(dir);
709 struct udf_inode_info *iinfo;
675 710
676 lock_kernel(); 711 lock_kernel();
677 err = -EMLINK; 712 err = -EMLINK;
@@ -683,9 +718,11 @@ static int udf_mkdir(struct inode *dir, struct dentry *dentry, int mode)
683 if (!inode) 718 if (!inode)
684 goto out; 719 goto out;
685 720
721 iinfo = UDF_I(inode);
686 inode->i_op = &udf_dir_inode_operations; 722 inode->i_op = &udf_dir_inode_operations;
687 inode->i_fop = &udf_dir_operations; 723 inode->i_fop = &udf_dir_operations;
688 if (!(fi = udf_add_entry(inode, NULL, &fibh, &cfi, &err))) { 724 fi = udf_add_entry(inode, NULL, &fibh, &cfi, &err);
725 if (!fi) {
689 inode->i_nlink--; 726 inode->i_nlink--;
690 mark_inode_dirty(inode); 727 mark_inode_dirty(inode);
691 iput(inode); 728 iput(inode);
@@ -693,10 +730,11 @@ static int udf_mkdir(struct inode *dir, struct dentry *dentry, int mode)
693 } 730 }
694 inode->i_nlink = 2; 731 inode->i_nlink = 2;
695 cfi.icb.extLength = cpu_to_le32(inode->i_sb->s_blocksize); 732 cfi.icb.extLength = cpu_to_le32(inode->i_sb->s_blocksize);
696 cfi.icb.extLocation = cpu_to_lelb(UDF_I_LOCATION(dir)); 733 cfi.icb.extLocation = cpu_to_lelb(dinfo->i_location);
697 *(__le32 *)((struct allocDescImpUse *)cfi.icb.impUse)->impUse = 734 *(__le32 *)((struct allocDescImpUse *)cfi.icb.impUse)->impUse =
698 cpu_to_le32(UDF_I_UNIQUE(dir) & 0x00000000FFFFFFFFUL); 735 cpu_to_le32(dinfo->i_unique & 0x00000000FFFFFFFFUL);
699 cfi.fileCharacteristics = FID_FILE_CHAR_DIRECTORY | FID_FILE_CHAR_PARENT; 736 cfi.fileCharacteristics =
737 FID_FILE_CHAR_DIRECTORY | FID_FILE_CHAR_PARENT;
700 udf_write_fi(inode, &cfi, fi, &fibh, NULL, NULL); 738 udf_write_fi(inode, &cfi, fi, &fibh, NULL, NULL);
701 brelse(fibh.sbh); 739 brelse(fibh.sbh);
702 inode->i_mode = S_IFDIR | mode; 740 inode->i_mode = S_IFDIR | mode;
@@ -704,16 +742,17 @@ static int udf_mkdir(struct inode *dir, struct dentry *dentry, int mode)
704 inode->i_mode |= S_ISGID; 742 inode->i_mode |= S_ISGID;
705 mark_inode_dirty(inode); 743 mark_inode_dirty(inode);
706 744
707 if (!(fi = udf_add_entry(dir, dentry, &fibh, &cfi, &err))) { 745 fi = udf_add_entry(dir, dentry, &fibh, &cfi, &err);
746 if (!fi) {
708 inode->i_nlink = 0; 747 inode->i_nlink = 0;
709 mark_inode_dirty(inode); 748 mark_inode_dirty(inode);
710 iput(inode); 749 iput(inode);
711 goto out; 750 goto out;
712 } 751 }
713 cfi.icb.extLength = cpu_to_le32(inode->i_sb->s_blocksize); 752 cfi.icb.extLength = cpu_to_le32(inode->i_sb->s_blocksize);
714 cfi.icb.extLocation = cpu_to_lelb(UDF_I_LOCATION(inode)); 753 cfi.icb.extLocation = cpu_to_lelb(iinfo->i_location);
715 *(__le32 *)((struct allocDescImpUse *)cfi.icb.impUse)->impUse = 754 *(__le32 *)((struct allocDescImpUse *)cfi.icb.impUse)->impUse =
716 cpu_to_le32(UDF_I_UNIQUE(inode) & 0x00000000FFFFFFFFUL); 755 cpu_to_le32(iinfo->i_unique & 0x00000000FFFFFFFFUL);
717 cfi.fileCharacteristics |= FID_FILE_CHAR_DIRECTORY; 756 cfi.fileCharacteristics |= FID_FILE_CHAR_DIRECTORY;
718 udf_write_fi(dir, &cfi, fi, &fibh, NULL, NULL); 757 udf_write_fi(dir, &cfi, fi, &fibh, NULL, NULL);
719 inc_nlink(dir); 758 inc_nlink(dir);
@@ -734,32 +773,33 @@ static int empty_dir(struct inode *dir)
734 struct fileIdentDesc *fi, cfi; 773 struct fileIdentDesc *fi, cfi;
735 struct udf_fileident_bh fibh; 774 struct udf_fileident_bh fibh;
736 loff_t f_pos; 775 loff_t f_pos;
737 loff_t size = (udf_ext0_offset(dir) + dir->i_size) >> 2; 776 loff_t size = udf_ext0_offset(dir) + dir->i_size;
738 int block; 777 int block;
739 kernel_lb_addr eloc; 778 kernel_lb_addr eloc;
740 uint32_t elen; 779 uint32_t elen;
741 sector_t offset; 780 sector_t offset;
742 struct extent_position epos = {}; 781 struct extent_position epos = {};
782 struct udf_inode_info *dinfo = UDF_I(dir);
743 783
744 f_pos = (udf_ext0_offset(dir) >> 2); 784 f_pos = udf_ext0_offset(dir);
785 fibh.soffset = fibh.eoffset = f_pos & (dir->i_sb->s_blocksize - 1);
745 786
746 fibh.soffset = fibh.eoffset = (f_pos & ((dir->i_sb->s_blocksize - 1) >> 2)) << 2; 787 if (dinfo->i_alloc_type == ICBTAG_FLAG_AD_IN_ICB)
747
748 if (UDF_I_ALLOCTYPE(dir) == ICBTAG_FLAG_AD_IN_ICB) {
749 fibh.sbh = fibh.ebh = NULL; 788 fibh.sbh = fibh.ebh = NULL;
750 } else if (inode_bmap(dir, f_pos >> (dir->i_sb->s_blocksize_bits - 2), 789 else if (inode_bmap(dir, f_pos >> dir->i_sb->s_blocksize_bits,
751 &epos, &eloc, &elen, &offset) == (EXT_RECORDED_ALLOCATED >> 30)) { 790 &epos, &eloc, &elen, &offset) ==
791 (EXT_RECORDED_ALLOCATED >> 30)) {
752 block = udf_get_lb_pblock(dir->i_sb, eloc, offset); 792 block = udf_get_lb_pblock(dir->i_sb, eloc, offset);
753 if ((++offset << dir->i_sb->s_blocksize_bits) < elen) { 793 if ((++offset << dir->i_sb->s_blocksize_bits) < elen) {
754 if (UDF_I_ALLOCTYPE(dir) == ICBTAG_FLAG_AD_SHORT) 794 if (dinfo->i_alloc_type == ICBTAG_FLAG_AD_SHORT)
755 epos.offset -= sizeof(short_ad); 795 epos.offset -= sizeof(short_ad);
756 else if (UDF_I_ALLOCTYPE(dir) == ICBTAG_FLAG_AD_LONG) 796 else if (dinfo->i_alloc_type == ICBTAG_FLAG_AD_LONG)
757 epos.offset -= sizeof(long_ad); 797 epos.offset -= sizeof(long_ad);
758 } else { 798 } else
759 offset = 0; 799 offset = 0;
760 }
761 800
762 if (!(fibh.sbh = fibh.ebh = udf_tread(dir->i_sb, block))) { 801 fibh.sbh = fibh.ebh = udf_tread(dir->i_sb, block);
802 if (!fibh.sbh) {
763 brelse(epos.bh); 803 brelse(epos.bh);
764 return 0; 804 return 0;
765 } 805 }
@@ -768,7 +808,7 @@ static int empty_dir(struct inode *dir)
768 return 0; 808 return 0;
769 } 809 }
770 810
771 while ((f_pos < size)) { 811 while (f_pos < size) {
772 fi = udf_fileident_read(dir, &f_pos, &fibh, &cfi, &epos, &eloc, 812 fi = udf_fileident_read(dir, &f_pos, &fibh, &cfi, &epos, &eloc,
773 &elen, &offset); 813 &elen, &offset);
774 if (!fi) { 814 if (!fi) {
@@ -828,7 +868,8 @@ static int udf_rmdir(struct inode *dir, struct dentry *dentry)
828 clear_nlink(inode); 868 clear_nlink(inode);
829 inode->i_size = 0; 869 inode->i_size = 0;
830 inode_dec_link_count(dir); 870 inode_dec_link_count(dir);
831 inode->i_ctime = dir->i_ctime = dir->i_mtime = current_fs_time(dir->i_sb); 871 inode->i_ctime = dir->i_ctime = dir->i_mtime =
872 current_fs_time(dir->i_sb);
832 mark_inode_dirty(dir); 873 mark_inode_dirty(dir);
833 874
834end_rmdir: 875end_rmdir:
@@ -901,36 +942,42 @@ static int udf_symlink(struct inode *dir, struct dentry *dentry,
901 int block; 942 int block;
902 char name[UDF_NAME_LEN]; 943 char name[UDF_NAME_LEN];
903 int namelen; 944 int namelen;
945 struct buffer_head *bh;
946 struct udf_inode_info *iinfo;
904 947
905 lock_kernel(); 948 lock_kernel();
906 if (!(inode = udf_new_inode(dir, S_IFLNK, &err))) 949 inode = udf_new_inode(dir, S_IFLNK, &err);
950 if (!inode)
907 goto out; 951 goto out;
908 952
953 iinfo = UDF_I(inode);
909 inode->i_mode = S_IFLNK | S_IRWXUGO; 954 inode->i_mode = S_IFLNK | S_IRWXUGO;
910 inode->i_data.a_ops = &udf_symlink_aops; 955 inode->i_data.a_ops = &udf_symlink_aops;
911 inode->i_op = &page_symlink_inode_operations; 956 inode->i_op = &page_symlink_inode_operations;
912 957
913 if (UDF_I_ALLOCTYPE(inode) != ICBTAG_FLAG_AD_IN_ICB) { 958 if (iinfo->i_alloc_type != ICBTAG_FLAG_AD_IN_ICB) {
914 kernel_lb_addr eloc; 959 kernel_lb_addr eloc;
915 uint32_t elen; 960 uint32_t elen;
916 961
917 block = udf_new_block(inode->i_sb, inode, 962 block = udf_new_block(inode->i_sb, inode,
918 UDF_I_LOCATION(inode).partitionReferenceNum, 963 iinfo->i_location.partitionReferenceNum,
919 UDF_I_LOCATION(inode).logicalBlockNum, &err); 964 iinfo->i_location.logicalBlockNum, &err);
920 if (!block) 965 if (!block)
921 goto out_no_entry; 966 goto out_no_entry;
922 epos.block = UDF_I_LOCATION(inode); 967 epos.block = iinfo->i_location;
923 epos.offset = udf_file_entry_alloc_offset(inode); 968 epos.offset = udf_file_entry_alloc_offset(inode);
924 epos.bh = NULL; 969 epos.bh = NULL;
925 eloc.logicalBlockNum = block; 970 eloc.logicalBlockNum = block;
926 eloc.partitionReferenceNum = UDF_I_LOCATION(inode).partitionReferenceNum; 971 eloc.partitionReferenceNum =
972 iinfo->i_location.partitionReferenceNum;
927 elen = inode->i_sb->s_blocksize; 973 elen = inode->i_sb->s_blocksize;
928 UDF_I_LENEXTENTS(inode) = elen; 974 iinfo->i_lenExtents = elen;
929 udf_add_aext(inode, &epos, eloc, elen, 0); 975 udf_add_aext(inode, &epos, eloc, elen, 0);
930 brelse(epos.bh); 976 brelse(epos.bh);
931 977
932 block = udf_get_pblock(inode->i_sb, block, 978 block = udf_get_pblock(inode->i_sb, block,
933 UDF_I_LOCATION(inode).partitionReferenceNum, 0); 979 iinfo->i_location.partitionReferenceNum,
980 0);
934 epos.bh = udf_tread(inode->i_sb, block); 981 epos.bh = udf_tread(inode->i_sb, block);
935 lock_buffer(epos.bh); 982 lock_buffer(epos.bh);
936 memset(epos.bh->b_data, 0x00, inode->i_sb->s_blocksize); 983 memset(epos.bh->b_data, 0x00, inode->i_sb->s_blocksize);
@@ -938,9 +985,8 @@ static int udf_symlink(struct inode *dir, struct dentry *dentry,
938 unlock_buffer(epos.bh); 985 unlock_buffer(epos.bh);
939 mark_buffer_dirty_inode(epos.bh, inode); 986 mark_buffer_dirty_inode(epos.bh, inode);
940 ea = epos.bh->b_data + udf_ext0_offset(inode); 987 ea = epos.bh->b_data + udf_ext0_offset(inode);
941 } else { 988 } else
942 ea = UDF_I_DATA(inode) + UDF_I_LENEATTR(inode); 989 ea = iinfo->i_ext.i_data + iinfo->i_lenEAttr;
943 }
944 990
945 eoffset = inode->i_sb->s_blocksize - udf_ext0_offset(inode); 991 eoffset = inode->i_sb->s_blocksize - udf_ext0_offset(inode);
946 pc = (struct pathComponent *)ea; 992 pc = (struct pathComponent *)ea;
@@ -977,7 +1023,8 @@ static int udf_symlink(struct inode *dir, struct dentry *dentry,
977 if (compstart[0] == '.') { 1023 if (compstart[0] == '.') {
978 if ((symname - compstart) == 1) 1024 if ((symname - compstart) == 1)
979 pc->componentType = 4; 1025 pc->componentType = 4;
980 else if ((symname - compstart) == 2 && compstart[1] == '.') 1026 else if ((symname - compstart) == 2 &&
1027 compstart[1] == '.')
981 pc->componentType = 3; 1028 pc->componentType = 3;
982 } 1029 }
983 1030
@@ -987,7 +1034,8 @@ static int udf_symlink(struct inode *dir, struct dentry *dentry,
987 if (!namelen) 1034 if (!namelen)
988 goto out_no_entry; 1035 goto out_no_entry;
989 1036
990 if (elen + sizeof(struct pathComponent) + namelen > eoffset) 1037 if (elen + sizeof(struct pathComponent) + namelen >
1038 eoffset)
991 goto out_no_entry; 1039 goto out_no_entry;
992 else 1040 else
993 pc->lengthComponentIdent = namelen; 1041 pc->lengthComponentIdent = namelen;
@@ -1006,30 +1054,34 @@ static int udf_symlink(struct inode *dir, struct dentry *dentry,
1006 1054
1007 brelse(epos.bh); 1055 brelse(epos.bh);
1008 inode->i_size = elen; 1056 inode->i_size = elen;
1009 if (UDF_I_ALLOCTYPE(inode) == ICBTAG_FLAG_AD_IN_ICB) 1057 if (iinfo->i_alloc_type == ICBTAG_FLAG_AD_IN_ICB)
1010 UDF_I_LENALLOC(inode) = inode->i_size; 1058 iinfo->i_lenAlloc = inode->i_size;
1011 mark_inode_dirty(inode); 1059 mark_inode_dirty(inode);
1012 1060
1013 if (!(fi = udf_add_entry(dir, dentry, &fibh, &cfi, &err))) 1061 fi = udf_add_entry(dir, dentry, &fibh, &cfi, &err);
1062 if (!fi)
1014 goto out_no_entry; 1063 goto out_no_entry;
1015 cfi.icb.extLength = cpu_to_le32(inode->i_sb->s_blocksize); 1064 cfi.icb.extLength = cpu_to_le32(inode->i_sb->s_blocksize);
1016 cfi.icb.extLocation = cpu_to_lelb(UDF_I_LOCATION(inode)); 1065 cfi.icb.extLocation = cpu_to_lelb(iinfo->i_location);
1017 if (UDF_SB_LVIDBH(inode->i_sb)) { 1066 bh = UDF_SB(inode->i_sb)->s_lvid_bh;
1067 if (bh) {
1068 struct logicalVolIntegrityDesc *lvid =
1069 (struct logicalVolIntegrityDesc *)bh->b_data;
1018 struct logicalVolHeaderDesc *lvhd; 1070 struct logicalVolHeaderDesc *lvhd;
1019 uint64_t uniqueID; 1071 uint64_t uniqueID;
1020 lvhd = (struct logicalVolHeaderDesc *)(UDF_SB_LVID(inode->i_sb)->logicalVolContentsUse); 1072 lvhd = (struct logicalVolHeaderDesc *)
1073 lvid->logicalVolContentsUse;
1021 uniqueID = le64_to_cpu(lvhd->uniqueID); 1074 uniqueID = le64_to_cpu(lvhd->uniqueID);
1022 *(__le32 *)((struct allocDescImpUse *)cfi.icb.impUse)->impUse = 1075 *(__le32 *)((struct allocDescImpUse *)cfi.icb.impUse)->impUse =
1023 cpu_to_le32(uniqueID & 0x00000000FFFFFFFFUL); 1076 cpu_to_le32(uniqueID & 0x00000000FFFFFFFFUL);
1024 if (!(++uniqueID & 0x00000000FFFFFFFFUL)) 1077 if (!(++uniqueID & 0x00000000FFFFFFFFUL))
1025 uniqueID += 16; 1078 uniqueID += 16;
1026 lvhd->uniqueID = cpu_to_le64(uniqueID); 1079 lvhd->uniqueID = cpu_to_le64(uniqueID);
1027 mark_buffer_dirty(UDF_SB_LVIDBH(inode->i_sb)); 1080 mark_buffer_dirty(bh);
1028 } 1081 }
1029 udf_write_fi(dir, &cfi, fi, &fibh, NULL, NULL); 1082 udf_write_fi(dir, &cfi, fi, &fibh, NULL, NULL);
1030 if (UDF_I_ALLOCTYPE(dir) == ICBTAG_FLAG_AD_IN_ICB) { 1083 if (UDF_I(dir)->i_alloc_type == ICBTAG_FLAG_AD_IN_ICB)
1031 mark_inode_dirty(dir); 1084 mark_inode_dirty(dir);
1032 }
1033 if (fibh.sbh != fibh.ebh) 1085 if (fibh.sbh != fibh.ebh)
1034 brelse(fibh.ebh); 1086 brelse(fibh.ebh);
1035 brelse(fibh.sbh); 1087 brelse(fibh.sbh);
@@ -1053,6 +1105,7 @@ static int udf_link(struct dentry *old_dentry, struct inode *dir,
1053 struct udf_fileident_bh fibh; 1105 struct udf_fileident_bh fibh;
1054 struct fileIdentDesc cfi, *fi; 1106 struct fileIdentDesc cfi, *fi;
1055 int err; 1107 int err;
1108 struct buffer_head *bh;
1056 1109
1057 lock_kernel(); 1110 lock_kernel();
1058 if (inode->i_nlink >= (256 << sizeof(inode->i_nlink)) - 1) { 1111 if (inode->i_nlink >= (256 << sizeof(inode->i_nlink)) - 1) {
@@ -1060,28 +1113,32 @@ static int udf_link(struct dentry *old_dentry, struct inode *dir,
1060 return -EMLINK; 1113 return -EMLINK;
1061 } 1114 }
1062 1115
1063 if (!(fi = udf_add_entry(dir, dentry, &fibh, &cfi, &err))) { 1116 fi = udf_add_entry(dir, dentry, &fibh, &cfi, &err);
1117 if (!fi) {
1064 unlock_kernel(); 1118 unlock_kernel();
1065 return err; 1119 return err;
1066 } 1120 }
1067 cfi.icb.extLength = cpu_to_le32(inode->i_sb->s_blocksize); 1121 cfi.icb.extLength = cpu_to_le32(inode->i_sb->s_blocksize);
1068 cfi.icb.extLocation = cpu_to_lelb(UDF_I_LOCATION(inode)); 1122 cfi.icb.extLocation = cpu_to_lelb(UDF_I(inode)->i_location);
1069 if (UDF_SB_LVIDBH(inode->i_sb)) { 1123 bh = UDF_SB(inode->i_sb)->s_lvid_bh;
1124 if (bh) {
1125 struct logicalVolIntegrityDesc *lvid =
1126 (struct logicalVolIntegrityDesc *)bh->b_data;
1070 struct logicalVolHeaderDesc *lvhd; 1127 struct logicalVolHeaderDesc *lvhd;
1071 uint64_t uniqueID; 1128 uint64_t uniqueID;
1072 lvhd = (struct logicalVolHeaderDesc *)(UDF_SB_LVID(inode->i_sb)->logicalVolContentsUse); 1129 lvhd = (struct logicalVolHeaderDesc *)
1130 (lvid->logicalVolContentsUse);
1073 uniqueID = le64_to_cpu(lvhd->uniqueID); 1131 uniqueID = le64_to_cpu(lvhd->uniqueID);
1074 *(__le32 *)((struct allocDescImpUse *)cfi.icb.impUse)->impUse = 1132 *(__le32 *)((struct allocDescImpUse *)cfi.icb.impUse)->impUse =
1075 cpu_to_le32(uniqueID & 0x00000000FFFFFFFFUL); 1133 cpu_to_le32(uniqueID & 0x00000000FFFFFFFFUL);
1076 if (!(++uniqueID & 0x00000000FFFFFFFFUL)) 1134 if (!(++uniqueID & 0x00000000FFFFFFFFUL))
1077 uniqueID += 16; 1135 uniqueID += 16;
1078 lvhd->uniqueID = cpu_to_le64(uniqueID); 1136 lvhd->uniqueID = cpu_to_le64(uniqueID);
1079 mark_buffer_dirty(UDF_SB_LVIDBH(inode->i_sb)); 1137 mark_buffer_dirty(bh);
1080 } 1138 }
1081 udf_write_fi(dir, &cfi, fi, &fibh, NULL, NULL); 1139 udf_write_fi(dir, &cfi, fi, &fibh, NULL, NULL);
1082 if (UDF_I_ALLOCTYPE(dir) == ICBTAG_FLAG_AD_IN_ICB) { 1140 if (UDF_I(dir)->i_alloc_type == ICBTAG_FLAG_AD_IN_ICB)
1083 mark_inode_dirty(dir); 1141 mark_inode_dirty(dir);
1084 }
1085 1142
1086 if (fibh.sbh != fibh.ebh) 1143 if (fibh.sbh != fibh.ebh)
1087 brelse(fibh.ebh); 1144 brelse(fibh.ebh);
@@ -1105,13 +1162,16 @@ static int udf_rename(struct inode *old_dir, struct dentry *old_dentry,
1105 struct inode *old_inode = old_dentry->d_inode; 1162 struct inode *old_inode = old_dentry->d_inode;
1106 struct inode *new_inode = new_dentry->d_inode; 1163 struct inode *new_inode = new_dentry->d_inode;
1107 struct udf_fileident_bh ofibh, nfibh; 1164 struct udf_fileident_bh ofibh, nfibh;
1108 struct fileIdentDesc *ofi = NULL, *nfi = NULL, *dir_fi = NULL, ocfi, ncfi; 1165 struct fileIdentDesc *ofi = NULL, *nfi = NULL, *dir_fi = NULL;
1166 struct fileIdentDesc ocfi, ncfi;
1109 struct buffer_head *dir_bh = NULL; 1167 struct buffer_head *dir_bh = NULL;
1110 int retval = -ENOENT; 1168 int retval = -ENOENT;
1111 kernel_lb_addr tloc; 1169 kernel_lb_addr tloc;
1170 struct udf_inode_info *old_iinfo = UDF_I(old_inode);
1112 1171
1113 lock_kernel(); 1172 lock_kernel();
1114 if ((ofi = udf_find_entry(old_dir, old_dentry, &ofibh, &ocfi))) { 1173 ofi = udf_find_entry(old_dir, old_dentry, &ofibh, &ocfi);
1174 if (ofi) {
1115 if (ofibh.sbh != ofibh.ebh) 1175 if (ofibh.sbh != ofibh.ebh)
1116 brelse(ofibh.ebh); 1176 brelse(ofibh.ebh);
1117 brelse(ofibh.sbh); 1177 brelse(ofibh.sbh);
@@ -1131,7 +1191,7 @@ static int udf_rename(struct inode *old_dir, struct dentry *old_dentry,
1131 } 1191 }
1132 } 1192 }
1133 if (S_ISDIR(old_inode->i_mode)) { 1193 if (S_ISDIR(old_inode->i_mode)) {
1134 uint32_t offset = udf_ext0_offset(old_inode); 1194 int offset = udf_ext0_offset(old_inode);
1135 1195
1136 if (new_inode) { 1196 if (new_inode) {
1137 retval = -ENOTEMPTY; 1197 retval = -ENOTEMPTY;
@@ -1139,30 +1199,36 @@ static int udf_rename(struct inode *old_dir, struct dentry *old_dentry,
1139 goto end_rename; 1199 goto end_rename;
1140 } 1200 }
1141 retval = -EIO; 1201 retval = -EIO;
1142 if (UDF_I_ALLOCTYPE(old_inode) == ICBTAG_FLAG_AD_IN_ICB) { 1202 if (old_iinfo->i_alloc_type == ICBTAG_FLAG_AD_IN_ICB) {
1143 dir_fi = udf_get_fileident(UDF_I_DATA(old_inode) - 1203 dir_fi = udf_get_fileident(
1144 (UDF_I_EFE(old_inode) ? 1204 old_iinfo->i_ext.i_data -
1145 sizeof(struct extendedFileEntry) : 1205 (old_iinfo->i_efe ?
1146 sizeof(struct fileEntry)), 1206 sizeof(struct extendedFileEntry) :
1147 old_inode->i_sb->s_blocksize, &offset); 1207 sizeof(struct fileEntry)),
1208 old_inode->i_sb->s_blocksize, &offset);
1148 } else { 1209 } else {
1149 dir_bh = udf_bread(old_inode, 0, 0, &retval); 1210 dir_bh = udf_bread(old_inode, 0, 0, &retval);
1150 if (!dir_bh) 1211 if (!dir_bh)
1151 goto end_rename; 1212 goto end_rename;
1152 dir_fi = udf_get_fileident(dir_bh->b_data, old_inode->i_sb->s_blocksize, &offset); 1213 dir_fi = udf_get_fileident(dir_bh->b_data,
1214 old_inode->i_sb->s_blocksize, &offset);
1153 } 1215 }
1154 if (!dir_fi) 1216 if (!dir_fi)
1155 goto end_rename; 1217 goto end_rename;
1156 tloc = lelb_to_cpu(dir_fi->icb.extLocation); 1218 tloc = lelb_to_cpu(dir_fi->icb.extLocation);
1157 if (udf_get_lb_pblock(old_inode->i_sb, tloc, 0) != old_dir->i_ino) 1219 if (udf_get_lb_pblock(old_inode->i_sb, tloc, 0) !=
1220 old_dir->i_ino)
1158 goto end_rename; 1221 goto end_rename;
1159 1222
1160 retval = -EMLINK; 1223 retval = -EMLINK;
1161 if (!new_inode && new_dir->i_nlink >= (256 << sizeof(new_dir->i_nlink)) - 1) 1224 if (!new_inode &&
1225 new_dir->i_nlink >=
1226 (256 << sizeof(new_dir->i_nlink)) - 1)
1162 goto end_rename; 1227 goto end_rename;
1163 } 1228 }
1164 if (!nfi) { 1229 if (!nfi) {
1165 nfi = udf_add_entry(new_dir, new_dentry, &nfibh, &ncfi, &retval); 1230 nfi = udf_add_entry(new_dir, new_dentry, &nfibh, &ncfi,
1231 &retval);
1166 if (!nfi) 1232 if (!nfi)
1167 goto end_rename; 1233 goto end_rename;
1168 } 1234 }
@@ -1194,18 +1260,19 @@ static int udf_rename(struct inode *old_dir, struct dentry *old_dentry,
1194 mark_inode_dirty(old_dir); 1260 mark_inode_dirty(old_dir);
1195 1261
1196 if (dir_fi) { 1262 if (dir_fi) {
1197 dir_fi->icb.extLocation = cpu_to_lelb(UDF_I_LOCATION(new_dir)); 1263 dir_fi->icb.extLocation = cpu_to_lelb(UDF_I(new_dir)->i_location);
1198 udf_update_tag((char *)dir_fi, (sizeof(struct fileIdentDesc) + 1264 udf_update_tag((char *)dir_fi,
1199 le16_to_cpu(dir_fi->lengthOfImpUse) + 3) & ~3); 1265 (sizeof(struct fileIdentDesc) +
1200 if (UDF_I_ALLOCTYPE(old_inode) == ICBTAG_FLAG_AD_IN_ICB) { 1266 le16_to_cpu(dir_fi->lengthOfImpUse) + 3) & ~3);
1267 if (old_iinfo->i_alloc_type == ICBTAG_FLAG_AD_IN_ICB)
1201 mark_inode_dirty(old_inode); 1268 mark_inode_dirty(old_inode);
1202 } else { 1269 else
1203 mark_buffer_dirty_inode(dir_bh, old_inode); 1270 mark_buffer_dirty_inode(dir_bh, old_inode);
1204 } 1271
1205 inode_dec_link_count(old_dir); 1272 inode_dec_link_count(old_dir);
1206 if (new_inode) { 1273 if (new_inode)
1207 inode_dec_link_count(new_inode); 1274 inode_dec_link_count(new_inode);
1208 } else { 1275 else {
1209 inc_nlink(new_dir); 1276 inc_nlink(new_dir);
1210 mark_inode_dirty(new_dir); 1277 mark_inode_dirty(new_dir);
1211 } 1278 }
diff --git a/fs/udf/partition.c b/fs/udf/partition.c
index aaab24c8c498..fc533345ab89 100644
--- a/fs/udf/partition.c
+++ b/fs/udf/partition.c
@@ -31,15 +31,18 @@
31inline uint32_t udf_get_pblock(struct super_block *sb, uint32_t block, 31inline uint32_t udf_get_pblock(struct super_block *sb, uint32_t block,
32 uint16_t partition, uint32_t offset) 32 uint16_t partition, uint32_t offset)
33{ 33{
34 if (partition >= UDF_SB_NUMPARTS(sb)) { 34 struct udf_sb_info *sbi = UDF_SB(sb);
35 udf_debug("block=%d, partition=%d, offset=%d: invalid partition\n", 35 struct udf_part_map *map;
36 block, partition, offset); 36 if (partition >= sbi->s_partitions) {
37 udf_debug("block=%d, partition=%d, offset=%d: "
38 "invalid partition\n", block, partition, offset);
37 return 0xFFFFFFFF; 39 return 0xFFFFFFFF;
38 } 40 }
39 if (UDF_SB_PARTFUNC(sb, partition)) 41 map = &sbi->s_partmaps[partition];
40 return UDF_SB_PARTFUNC(sb, partition)(sb, block, partition, offset); 42 if (map->s_partition_func)
43 return map->s_partition_func(sb, block, partition, offset);
41 else 44 else
42 return UDF_SB_PARTROOT(sb, partition) + block + offset; 45 return map->s_partition_root + block + offset;
43} 46}
44 47
45uint32_t udf_get_pblock_virt15(struct super_block *sb, uint32_t block, 48uint32_t udf_get_pblock_virt15(struct super_block *sb, uint32_t block,
@@ -49,12 +52,18 @@ uint32_t udf_get_pblock_virt15(struct super_block *sb, uint32_t block,
49 uint32_t newblock; 52 uint32_t newblock;
50 uint32_t index; 53 uint32_t index;
51 uint32_t loc; 54 uint32_t loc;
55 struct udf_sb_info *sbi = UDF_SB(sb);
56 struct udf_part_map *map;
57 struct udf_virtual_data *vdata;
58 struct udf_inode_info *iinfo;
52 59
53 index = (sb->s_blocksize - UDF_SB_TYPEVIRT(sb,partition).s_start_offset) / sizeof(uint32_t); 60 map = &sbi->s_partmaps[partition];
61 vdata = &map->s_type_specific.s_virtual;
62 index = (sb->s_blocksize - vdata->s_start_offset) / sizeof(uint32_t);
54 63
55 if (block > UDF_SB_TYPEVIRT(sb,partition).s_num_entries) { 64 if (block > vdata->s_num_entries) {
56 udf_debug("Trying to access block beyond end of VAT (%d max %d)\n", 65 udf_debug("Trying to access block beyond end of VAT "
57 block, UDF_SB_TYPEVIRT(sb,partition).s_num_entries); 66 "(%d max %d)\n", block, vdata->s_num_entries);
58 return 0xFFFFFFFF; 67 return 0xFFFFFFFF;
59 } 68 }
60 69
@@ -64,12 +73,13 @@ uint32_t udf_get_pblock_virt15(struct super_block *sb, uint32_t block,
64 index = block % (sb->s_blocksize / sizeof(uint32_t)); 73 index = block % (sb->s_blocksize / sizeof(uint32_t));
65 } else { 74 } else {
66 newblock = 0; 75 newblock = 0;
67 index = UDF_SB_TYPEVIRT(sb,partition).s_start_offset / sizeof(uint32_t) + block; 76 index = vdata->s_start_offset / sizeof(uint32_t) + block;
68 } 77 }
69 78
70 loc = udf_block_map(UDF_SB_VAT(sb), newblock); 79 loc = udf_block_map(sbi->s_vat_inode, newblock);
71 80
72 if (!(bh = sb_bread(sb, loc))) { 81 bh = sb_bread(sb, loc);
82 if (!bh) {
73 udf_debug("get_pblock(UDF_VIRTUAL_MAP:%p,%d,%d) VAT: %d[%d]\n", 83 udf_debug("get_pblock(UDF_VIRTUAL_MAP:%p,%d,%d) VAT: %d[%d]\n",
74 sb, block, partition, loc, index); 84 sb, block, partition, loc, index);
75 return 0xFFFFFFFF; 85 return 0xFFFFFFFF;
@@ -79,50 +89,61 @@ uint32_t udf_get_pblock_virt15(struct super_block *sb, uint32_t block,
79 89
80 brelse(bh); 90 brelse(bh);
81 91
82 if (UDF_I_LOCATION(UDF_SB_VAT(sb)).partitionReferenceNum == partition) { 92 iinfo = UDF_I(sbi->s_vat_inode);
93 if (iinfo->i_location.partitionReferenceNum == partition) {
83 udf_debug("recursive call to udf_get_pblock!\n"); 94 udf_debug("recursive call to udf_get_pblock!\n");
84 return 0xFFFFFFFF; 95 return 0xFFFFFFFF;
85 } 96 }
86 97
87 return udf_get_pblock(sb, loc, 98 return udf_get_pblock(sb, loc,
88 UDF_I_LOCATION(UDF_SB_VAT(sb)).partitionReferenceNum, 99 iinfo->i_location.partitionReferenceNum,
89 offset); 100 offset);
90} 101}
91 102
92inline uint32_t udf_get_pblock_virt20(struct super_block * sb, uint32_t block, 103inline uint32_t udf_get_pblock_virt20(struct super_block *sb, uint32_t block,
93 uint16_t partition, uint32_t offset) 104 uint16_t partition, uint32_t offset)
94{ 105{
95 return udf_get_pblock_virt15(sb, block, partition, offset); 106 return udf_get_pblock_virt15(sb, block, partition, offset);
96} 107}
97 108
98uint32_t udf_get_pblock_spar15(struct super_block * sb, uint32_t block, 109uint32_t udf_get_pblock_spar15(struct super_block *sb, uint32_t block,
99 uint16_t partition, uint32_t offset) 110 uint16_t partition, uint32_t offset)
100{ 111{
101 int i; 112 int i;
102 struct sparingTable *st = NULL; 113 struct sparingTable *st = NULL;
103 uint32_t packet = (block + offset) & ~(UDF_SB_TYPESPAR(sb,partition).s_packet_len - 1); 114 struct udf_sb_info *sbi = UDF_SB(sb);
115 struct udf_part_map *map;
116 uint32_t packet;
117 struct udf_sparing_data *sdata;
118
119 map = &sbi->s_partmaps[partition];
120 sdata = &map->s_type_specific.s_sparing;
121 packet = (block + offset) & ~(sdata->s_packet_len - 1);
104 122
105 for (i = 0; i < 4; i++) { 123 for (i = 0; i < 4; i++) {
106 if (UDF_SB_TYPESPAR(sb,partition).s_spar_map[i] != NULL) { 124 if (sdata->s_spar_map[i] != NULL) {
107 st = (struct sparingTable *)UDF_SB_TYPESPAR(sb,partition).s_spar_map[i]->b_data; 125 st = (struct sparingTable *)
126 sdata->s_spar_map[i]->b_data;
108 break; 127 break;
109 } 128 }
110 } 129 }
111 130
112 if (st) { 131 if (st) {
113 for (i = 0; i < le16_to_cpu(st->reallocationTableLen); i++) { 132 for (i = 0; i < le16_to_cpu(st->reallocationTableLen); i++) {
114 if (le32_to_cpu(st->mapEntry[i].origLocation) >= 0xFFFFFFF0) { 133 struct sparingEntry *entry = &st->mapEntry[i];
134 u32 origLoc = le32_to_cpu(entry->origLocation);
135 if (origLoc >= 0xFFFFFFF0)
115 break; 136 break;
116 } else if (le32_to_cpu(st->mapEntry[i].origLocation) == packet) { 137 else if (origLoc == packet)
117 return le32_to_cpu(st->mapEntry[i].mappedLocation) + 138 return le32_to_cpu(entry->mappedLocation) +
118 ((block + offset) & (UDF_SB_TYPESPAR(sb,partition).s_packet_len - 1)); 139 ((block + offset) &
119 } else if (le32_to_cpu(st->mapEntry[i].origLocation) > packet) { 140 (sdata->s_packet_len - 1));
141 else if (origLoc > packet)
120 break; 142 break;
121 }
122 } 143 }
123 } 144 }
124 145
125 return UDF_SB_PARTROOT(sb,partition) + block + offset; 146 return map->s_partition_root + block + offset;
126} 147}
127 148
128int udf_relocate_blocks(struct super_block *sb, long old_block, long *new_block) 149int udf_relocate_blocks(struct super_block *sb, long old_block, long *new_block)
@@ -132,69 +153,109 @@ int udf_relocate_blocks(struct super_block *sb, long old_block, long *new_block)
132 struct sparingEntry mapEntry; 153 struct sparingEntry mapEntry;
133 uint32_t packet; 154 uint32_t packet;
134 int i, j, k, l; 155 int i, j, k, l;
156 struct udf_sb_info *sbi = UDF_SB(sb);
157 u16 reallocationTableLen;
158 struct buffer_head *bh;
135 159
136 for (i = 0; i < UDF_SB_NUMPARTS(sb); i++) { 160 for (i = 0; i < sbi->s_partitions; i++) {
137 if (old_block > UDF_SB_PARTROOT(sb,i) && 161 struct udf_part_map *map = &sbi->s_partmaps[i];
138 old_block < UDF_SB_PARTROOT(sb,i) + UDF_SB_PARTLEN(sb,i)) { 162 if (old_block > map->s_partition_root &&
139 sdata = &UDF_SB_TYPESPAR(sb,i); 163 old_block < map->s_partition_root + map->s_partition_len) {
140 packet = (old_block - UDF_SB_PARTROOT(sb,i)) & ~(sdata->s_packet_len - 1); 164 sdata = &map->s_type_specific.s_sparing;
165 packet = (old_block - map->s_partition_root) &
166 ~(sdata->s_packet_len - 1);
141 167
142 for (j = 0; j < 4; j++) { 168 for (j = 0; j < 4; j++)
143 if (UDF_SB_TYPESPAR(sb,i).s_spar_map[j] != NULL) { 169 if (sdata->s_spar_map[j] != NULL) {
144 st = (struct sparingTable *)sdata->s_spar_map[j]->b_data; 170 st = (struct sparingTable *)
171 sdata->s_spar_map[j]->b_data;
145 break; 172 break;
146 } 173 }
147 }
148 174
149 if (!st) 175 if (!st)
150 return 1; 176 return 1;
151 177
152 for (k = 0; k < le16_to_cpu(st->reallocationTableLen); k++) { 178 reallocationTableLen =
153 if (le32_to_cpu(st->mapEntry[k].origLocation) == 0xFFFFFFFF) { 179 le16_to_cpu(st->reallocationTableLen);
180 for (k = 0; k < reallocationTableLen; k++) {
181 struct sparingEntry *entry = &st->mapEntry[k];
182 u32 origLoc = le32_to_cpu(entry->origLocation);
183
184 if (origLoc == 0xFFFFFFFF) {
154 for (; j < 4; j++) { 185 for (; j < 4; j++) {
155 if (sdata->s_spar_map[j]) { 186 int len;
156 st = (struct sparingTable *)sdata->s_spar_map[j]->b_data; 187 bh = sdata->s_spar_map[j];
157 st->mapEntry[k].origLocation = cpu_to_le32(packet); 188 if (!bh)
158 udf_update_tag((char *)st, sizeof(struct sparingTable) + le16_to_cpu(st->reallocationTableLen) * sizeof(struct sparingEntry)); 189 continue;
159 mark_buffer_dirty(sdata->s_spar_map[j]); 190
160 } 191 st = (struct sparingTable *)
192 bh->b_data;
193 entry->origLocation =
194 cpu_to_le32(packet);
195 len =
196 sizeof(struct sparingTable) +
197 reallocationTableLen *
198 sizeof(struct sparingEntry);
199 udf_update_tag((char *)st, len);
200 mark_buffer_dirty(bh);
161 } 201 }
162 *new_block = le32_to_cpu(st->mapEntry[k].mappedLocation) + 202 *new_block = le32_to_cpu(
163 ((old_block - UDF_SB_PARTROOT(sb,i)) & (sdata->s_packet_len - 1)); 203 entry->mappedLocation) +
204 ((old_block -
205 map->s_partition_root) &
206 (sdata->s_packet_len - 1));
164 return 0; 207 return 0;
165 } else if (le32_to_cpu(st->mapEntry[k].origLocation) == packet) { 208 } else if (origLoc == packet) {
166 *new_block = le32_to_cpu(st->mapEntry[k].mappedLocation) + 209 *new_block = le32_to_cpu(
167 ((old_block - UDF_SB_PARTROOT(sb,i)) & (sdata->s_packet_len - 1)); 210 entry->mappedLocation) +
211 ((old_block -
212 map->s_partition_root) &
213 (sdata->s_packet_len - 1));
168 return 0; 214 return 0;
169 } else if (le32_to_cpu(st->mapEntry[k].origLocation) > packet) { 215 } else if (origLoc > packet)
170 break; 216 break;
171 }
172 } 217 }
173 218
174 for (l = k; l < le16_to_cpu(st->reallocationTableLen); l++) { 219 for (l = k; l < reallocationTableLen; l++) {
175 if (le32_to_cpu(st->mapEntry[l].origLocation) == 0xFFFFFFFF) { 220 struct sparingEntry *entry = &st->mapEntry[l];
176 for (; j < 4; j++) { 221 u32 origLoc = le32_to_cpu(entry->origLocation);
177 if (sdata->s_spar_map[j]) { 222
178 st = (struct sparingTable *)sdata->s_spar_map[j]->b_data; 223 if (origLoc != 0xFFFFFFFF)
179 mapEntry = st->mapEntry[l]; 224 continue;
180 mapEntry.origLocation = cpu_to_le32(packet); 225
181 memmove(&st->mapEntry[k + 1], &st->mapEntry[k], (l - k) * sizeof(struct sparingEntry)); 226 for (; j < 4; j++) {
182 st->mapEntry[k] = mapEntry; 227 bh = sdata->s_spar_map[j];
183 udf_update_tag((char *)st, sizeof(struct sparingTable) + le16_to_cpu(st->reallocationTableLen) * sizeof(struct sparingEntry)); 228 if (!bh)
184 mark_buffer_dirty(sdata->s_spar_map[j]); 229 continue;
185 } 230
186 } 231 st = (struct sparingTable *)bh->b_data;
187 *new_block = le32_to_cpu(st->mapEntry[k].mappedLocation) + 232 mapEntry = st->mapEntry[l];
188 ((old_block - UDF_SB_PARTROOT(sb,i)) & (sdata->s_packet_len - 1)); 233 mapEntry.origLocation =
189 return 0; 234 cpu_to_le32(packet);
235 memmove(&st->mapEntry[k + 1],
236 &st->mapEntry[k],
237 (l - k) *
238 sizeof(struct sparingEntry));
239 st->mapEntry[k] = mapEntry;
240 udf_update_tag((char *)st,
241 sizeof(struct sparingTable) +
242 reallocationTableLen *
243 sizeof(struct sparingEntry));
244 mark_buffer_dirty(bh);
190 } 245 }
246 *new_block =
247 le32_to_cpu(
248 st->mapEntry[k].mappedLocation) +
249 ((old_block - map->s_partition_root) &
250 (sdata->s_packet_len - 1));
251 return 0;
191 } 252 }
192 253
193 return 1; 254 return 1;
194 } /* if old_block */ 255 } /* if old_block */
195 } 256 }
196 257
197 if (i == UDF_SB_NUMPARTS(sb)) { 258 if (i == sbi->s_partitions) {
198 /* outside of partitions */ 259 /* outside of partitions */
199 /* for now, fail =) */ 260 /* for now, fail =) */
200 return 1; 261 return 1;
diff --git a/fs/udf/super.c b/fs/udf/super.c
index 4360c7a05743..f3ac4abfc946 100644
--- a/fs/udf/super.c
+++ b/fs/udf/super.c
@@ -33,8 +33,8 @@
33 * 10/17/98 added freespace count for "df" 33 * 10/17/98 added freespace count for "df"
34 * 11/11/98 gr added novrs option 34 * 11/11/98 gr added novrs option
35 * 11/26/98 dgb added fileset,anchor mount options 35 * 11/26/98 dgb added fileset,anchor mount options
36 * 12/06/98 blf really hosed things royally. vat/sparing support. sequenced vol descs 36 * 12/06/98 blf really hosed things royally. vat/sparing support. sequenced
37 * rewrote option handling based on isofs 37 * vol descs. rewrote option handling based on isofs
38 * 12/20/98 find the free space bitmap (if it exists) 38 * 12/20/98 find the free space bitmap (if it exists)
39 */ 39 */
40 40
@@ -52,6 +52,9 @@
52#include <linux/buffer_head.h> 52#include <linux/buffer_head.h>
53#include <linux/vfs.h> 53#include <linux/vfs.h>
54#include <linux/vmalloc.h> 54#include <linux/vmalloc.h>
55#include <linux/errno.h>
56#include <linux/mount.h>
57#include <linux/seq_file.h>
55#include <asm/byteorder.h> 58#include <asm/byteorder.h>
56 59
57#include <linux/udf_fs.h> 60#include <linux/udf_fs.h>
@@ -70,6 +73,8 @@
70#define VDS_POS_TERMINATING_DESC 6 73#define VDS_POS_TERMINATING_DESC 6
71#define VDS_POS_LENGTH 7 74#define VDS_POS_LENGTH 7
72 75
76#define UDF_DEFAULT_BLOCKSIZE 2048
77
73static char error_buf[1024]; 78static char error_buf[1024];
74 79
75/* These are the "meat" - everything else is stuffing */ 80/* These are the "meat" - everything else is stuffing */
@@ -94,6 +99,17 @@ static void udf_open_lvid(struct super_block *);
94static void udf_close_lvid(struct super_block *); 99static void udf_close_lvid(struct super_block *);
95static unsigned int udf_count_free(struct super_block *); 100static unsigned int udf_count_free(struct super_block *);
96static int udf_statfs(struct dentry *, struct kstatfs *); 101static int udf_statfs(struct dentry *, struct kstatfs *);
102static int udf_show_options(struct seq_file *, struct vfsmount *);
103
104struct logicalVolIntegrityDescImpUse *udf_sb_lvidiu(struct udf_sb_info *sbi)
105{
106 struct logicalVolIntegrityDesc *lvid =
107 (struct logicalVolIntegrityDesc *)sbi->s_lvid_bh->b_data;
108 __u32 number_of_partitions = le32_to_cpu(lvid->numOfPartitions);
109 __u32 offset = number_of_partitions * 2 *
110 sizeof(uint32_t)/sizeof(uint8_t);
111 return (struct logicalVolIntegrityDescImpUse *)&(lvid->impUse[offset]);
112}
97 113
98/* UDF filesystem type */ 114/* UDF filesystem type */
99static int udf_get_sb(struct file_system_type *fs_type, 115static int udf_get_sb(struct file_system_type *fs_type,
@@ -116,7 +132,7 @@ static struct kmem_cache *udf_inode_cachep;
116static struct inode *udf_alloc_inode(struct super_block *sb) 132static struct inode *udf_alloc_inode(struct super_block *sb)
117{ 133{
118 struct udf_inode_info *ei; 134 struct udf_inode_info *ei;
119 ei = (struct udf_inode_info *)kmem_cache_alloc(udf_inode_cachep, GFP_KERNEL); 135 ei = kmem_cache_alloc(udf_inode_cachep, GFP_KERNEL);
120 if (!ei) 136 if (!ei)
121 return NULL; 137 return NULL;
122 138
@@ -170,6 +186,7 @@ static const struct super_operations udf_sb_ops = {
170 .write_super = udf_write_super, 186 .write_super = udf_write_super,
171 .statfs = udf_statfs, 187 .statfs = udf_statfs,
172 .remount_fs = udf_remount_fs, 188 .remount_fs = udf_remount_fs,
189 .show_options = udf_show_options,
173}; 190};
174 191
175struct udf_options { 192struct udf_options {
@@ -218,6 +235,79 @@ static void __exit exit_udf_fs(void)
218module_init(init_udf_fs) 235module_init(init_udf_fs)
219module_exit(exit_udf_fs) 236module_exit(exit_udf_fs)
220 237
238static int udf_sb_alloc_partition_maps(struct super_block *sb, u32 count)
239{
240 struct udf_sb_info *sbi = UDF_SB(sb);
241
242 sbi->s_partmaps = kcalloc(count, sizeof(struct udf_part_map),
243 GFP_KERNEL);
244 if (!sbi->s_partmaps) {
245 udf_error(sb, __FUNCTION__,
246 "Unable to allocate space for %d partition maps",
247 count);
248 sbi->s_partitions = 0;
249 return -ENOMEM;
250 }
251
252 sbi->s_partitions = count;
253 return 0;
254}
255
256static int udf_show_options(struct seq_file *seq, struct vfsmount *mnt)
257{
258 struct super_block *sb = mnt->mnt_sb;
259 struct udf_sb_info *sbi = UDF_SB(sb);
260
261 if (!UDF_QUERY_FLAG(sb, UDF_FLAG_STRICT))
262 seq_puts(seq, ",nostrict");
263 if (sb->s_blocksize != UDF_DEFAULT_BLOCKSIZE)
264 seq_printf(seq, ",bs=%lu", sb->s_blocksize);
265 if (UDF_QUERY_FLAG(sb, UDF_FLAG_UNHIDE))
266 seq_puts(seq, ",unhide");
267 if (UDF_QUERY_FLAG(sb, UDF_FLAG_UNDELETE))
268 seq_puts(seq, ",undelete");
269 if (!UDF_QUERY_FLAG(sb, UDF_FLAG_USE_AD_IN_ICB))
270 seq_puts(seq, ",noadinicb");
271 if (UDF_QUERY_FLAG(sb, UDF_FLAG_USE_SHORT_AD))
272 seq_puts(seq, ",shortad");
273 if (UDF_QUERY_FLAG(sb, UDF_FLAG_UID_FORGET))
274 seq_puts(seq, ",uid=forget");
275 if (UDF_QUERY_FLAG(sb, UDF_FLAG_UID_IGNORE))
276 seq_puts(seq, ",uid=ignore");
277 if (UDF_QUERY_FLAG(sb, UDF_FLAG_GID_FORGET))
278 seq_puts(seq, ",gid=forget");
279 if (UDF_QUERY_FLAG(sb, UDF_FLAG_GID_IGNORE))
280 seq_puts(seq, ",gid=ignore");
281 if (UDF_QUERY_FLAG(sb, UDF_FLAG_UID_SET))
282 seq_printf(seq, ",uid=%u", sbi->s_uid);
283 if (UDF_QUERY_FLAG(sb, UDF_FLAG_GID_SET))
284 seq_printf(seq, ",gid=%u", sbi->s_gid);
285 if (sbi->s_umask != 0)
286 seq_printf(seq, ",umask=%o", sbi->s_umask);
287 if (UDF_QUERY_FLAG(sb, UDF_FLAG_SESSION_SET))
288 seq_printf(seq, ",session=%u", sbi->s_session);
289 if (UDF_QUERY_FLAG(sb, UDF_FLAG_LASTBLOCK_SET))
290 seq_printf(seq, ",lastblock=%u", sbi->s_last_block);
291 /*
292 * s_anchor[2] could be zeroed out in case there is no anchor
293 * in the specified block, but then the "anchor=N" option
294 * originally given by the user wasn't effective, so it's OK
295 * if we don't show it.
296 */
297 if (sbi->s_anchor[2] != 0)
298 seq_printf(seq, ",anchor=%u", sbi->s_anchor[2]);
299 /*
300 * volume, partition, fileset and rootdir seem to be ignored
301 * currently
302 */
303 if (UDF_QUERY_FLAG(sb, UDF_FLAG_UTF8))
304 seq_puts(seq, ",utf8");
305 if (UDF_QUERY_FLAG(sb, UDF_FLAG_NLS_MAP) && sbi->s_nls_map)
306 seq_printf(seq, ",iocharset=%s", sbi->s_nls_map->charset);
307
308 return 0;
309}
310
221/* 311/*
222 * udf_parse_options 312 * udf_parse_options
223 * 313 *
@@ -310,13 +400,14 @@ static match_table_t tokens = {
310 {Opt_err, NULL} 400 {Opt_err, NULL}
311}; 401};
312 402
313static int udf_parse_options(char *options, struct udf_options *uopt) 403static int udf_parse_options(char *options, struct udf_options *uopt,
404 bool remount)
314{ 405{
315 char *p; 406 char *p;
316 int option; 407 int option;
317 408
318 uopt->novrs = 0; 409 uopt->novrs = 0;
319 uopt->blocksize = 2048; 410 uopt->blocksize = UDF_DEFAULT_BLOCKSIZE;
320 uopt->partition = 0xFFFF; 411 uopt->partition = 0xFFFF;
321 uopt->session = 0xFFFFFFFF; 412 uopt->session = 0xFFFFFFFF;
322 uopt->lastblock = 0; 413 uopt->lastblock = 0;
@@ -386,11 +477,15 @@ static int udf_parse_options(char *options, struct udf_options *uopt)
386 if (match_int(args, &option)) 477 if (match_int(args, &option))
387 return 0; 478 return 0;
388 uopt->session = option; 479 uopt->session = option;
480 if (!remount)
481 uopt->flags |= (1 << UDF_FLAG_SESSION_SET);
389 break; 482 break;
390 case Opt_lastblock: 483 case Opt_lastblock:
391 if (match_int(args, &option)) 484 if (match_int(args, &option))
392 return 0; 485 return 0;
393 uopt->lastblock = option; 486 uopt->lastblock = option;
487 if (!remount)
488 uopt->flags |= (1 << UDF_FLAG_LASTBLOCK_SET);
394 break; 489 break;
395 case Opt_anchor: 490 case Opt_anchor:
396 if (match_int(args, &option)) 491 if (match_int(args, &option))
@@ -447,7 +542,7 @@ static int udf_parse_options(char *options, struct udf_options *uopt)
447 return 1; 542 return 1;
448} 543}
449 544
450void udf_write_super(struct super_block *sb) 545static void udf_write_super(struct super_block *sb)
451{ 546{
452 lock_kernel(); 547 lock_kernel();
453 548
@@ -461,22 +556,23 @@ void udf_write_super(struct super_block *sb)
461static int udf_remount_fs(struct super_block *sb, int *flags, char *options) 556static int udf_remount_fs(struct super_block *sb, int *flags, char *options)
462{ 557{
463 struct udf_options uopt; 558 struct udf_options uopt;
559 struct udf_sb_info *sbi = UDF_SB(sb);
464 560
465 uopt.flags = UDF_SB(sb)->s_flags; 561 uopt.flags = sbi->s_flags;
466 uopt.uid = UDF_SB(sb)->s_uid; 562 uopt.uid = sbi->s_uid;
467 uopt.gid = UDF_SB(sb)->s_gid; 563 uopt.gid = sbi->s_gid;
468 uopt.umask = UDF_SB(sb)->s_umask; 564 uopt.umask = sbi->s_umask;
469 565
470 if (!udf_parse_options(options, &uopt)) 566 if (!udf_parse_options(options, &uopt, true))
471 return -EINVAL; 567 return -EINVAL;
472 568
473 UDF_SB(sb)->s_flags = uopt.flags; 569 sbi->s_flags = uopt.flags;
474 UDF_SB(sb)->s_uid = uopt.uid; 570 sbi->s_uid = uopt.uid;
475 UDF_SB(sb)->s_gid = uopt.gid; 571 sbi->s_gid = uopt.gid;
476 UDF_SB(sb)->s_umask = uopt.umask; 572 sbi->s_umask = uopt.umask;
477 573
478 if (UDF_SB_LVIDBH(sb)) { 574 if (sbi->s_lvid_bh) {
479 int write_rev = le16_to_cpu(UDF_SB_LVIDIU(sb)->minUDFWriteRev); 575 int write_rev = le16_to_cpu(udf_sb_lvidiu(sbi)->minUDFWriteRev);
480 if (write_rev > UDF_MAX_WRITE_VERSION) 576 if (write_rev > UDF_MAX_WRITE_VERSION)
481 *flags |= MS_RDONLY; 577 *flags |= MS_RDONLY;
482 } 578 }
@@ -538,17 +634,19 @@ static int udf_vrs(struct super_block *sb, int silent)
538 int iso9660 = 0; 634 int iso9660 = 0;
539 int nsr02 = 0; 635 int nsr02 = 0;
540 int nsr03 = 0; 636 int nsr03 = 0;
637 struct udf_sb_info *sbi;
541 638
542 /* Block size must be a multiple of 512 */ 639 /* Block size must be a multiple of 512 */
543 if (sb->s_blocksize & 511) 640 if (sb->s_blocksize & 511)
544 return 0; 641 return 0;
642 sbi = UDF_SB(sb);
545 643
546 if (sb->s_blocksize < sizeof(struct volStructDesc)) 644 if (sb->s_blocksize < sizeof(struct volStructDesc))
547 sectorsize = sizeof(struct volStructDesc); 645 sectorsize = sizeof(struct volStructDesc);
548 else 646 else
549 sectorsize = sb->s_blocksize; 647 sectorsize = sb->s_blocksize;
550 648
551 sector += (UDF_SB_SESSION(sb) << sb->s_blocksize_bits); 649 sector += (sbi->s_session << sb->s_blocksize_bits);
552 650
553 udf_debug("Starting at sector %u (%ld byte sectors)\n", 651 udf_debug("Starting at sector %u (%ld byte sectors)\n",
554 (sector >> sb->s_blocksize_bits), sb->s_blocksize); 652 (sector >> sb->s_blocksize_bits), sb->s_blocksize);
@@ -561,47 +659,52 @@ static int udf_vrs(struct super_block *sb, int silent)
561 659
562 /* Look for ISO descriptors */ 660 /* Look for ISO descriptors */
563 vsd = (struct volStructDesc *)(bh->b_data + 661 vsd = (struct volStructDesc *)(bh->b_data +
564 (sector & (sb->s_blocksize - 1))); 662 (sector & (sb->s_blocksize - 1)));
565 663
566 if (vsd->stdIdent[0] == 0) { 664 if (vsd->stdIdent[0] == 0) {
567 brelse(bh); 665 brelse(bh);
568 break; 666 break;
569 } else if (!strncmp(vsd->stdIdent, VSD_STD_ID_CD001, VSD_STD_ID_LEN)) { 667 } else if (!strncmp(vsd->stdIdent, VSD_STD_ID_CD001,
668 VSD_STD_ID_LEN)) {
570 iso9660 = sector; 669 iso9660 = sector;
571 switch (vsd->structType) { 670 switch (vsd->structType) {
572 case 0: 671 case 0:
573 udf_debug("ISO9660 Boot Record found\n"); 672 udf_debug("ISO9660 Boot Record found\n");
574 break; 673 break;
575 case 1: 674 case 1:
576 udf_debug 675 udf_debug("ISO9660 Primary Volume Descriptor "
577 ("ISO9660 Primary Volume Descriptor found\n"); 676 "found\n");
578 break; 677 break;
579 case 2: 678 case 2:
580 udf_debug 679 udf_debug("ISO9660 Supplementary Volume "
581 ("ISO9660 Supplementary Volume Descriptor found\n"); 680 "Descriptor found\n");
582 break; 681 break;
583 case 3: 682 case 3:
584 udf_debug 683 udf_debug("ISO9660 Volume Partition Descriptor "
585 ("ISO9660 Volume Partition Descriptor found\n"); 684 "found\n");
586 break; 685 break;
587 case 255: 686 case 255:
588 udf_debug 687 udf_debug("ISO9660 Volume Descriptor Set "
589 ("ISO9660 Volume Descriptor Set Terminator found\n"); 688 "Terminator found\n");
590 break; 689 break;
591 default: 690 default:
592 udf_debug("ISO9660 VRS (%u) found\n", 691 udf_debug("ISO9660 VRS (%u) found\n",
593 vsd->structType); 692 vsd->structType);
594 break; 693 break;
595 } 694 }
596 } else if (!strncmp(vsd->stdIdent, VSD_STD_ID_BEA01, VSD_STD_ID_LEN)) { 695 } else if (!strncmp(vsd->stdIdent, VSD_STD_ID_BEA01,
597 } else if (!strncmp(vsd->stdIdent, VSD_STD_ID_TEA01, VSD_STD_ID_LEN)) { 696 VSD_STD_ID_LEN))
697 ; /* nothing */
698 else if (!strncmp(vsd->stdIdent, VSD_STD_ID_TEA01,
699 VSD_STD_ID_LEN)) {
598 brelse(bh); 700 brelse(bh);
599 break; 701 break;
600 } else if (!strncmp(vsd->stdIdent, VSD_STD_ID_NSR02, VSD_STD_ID_LEN)) { 702 } else if (!strncmp(vsd->stdIdent, VSD_STD_ID_NSR02,
703 VSD_STD_ID_LEN))
601 nsr02 = sector; 704 nsr02 = sector;
602 } else if (!strncmp(vsd->stdIdent, VSD_STD_ID_NSR03, VSD_STD_ID_LEN)) { 705 else if (!strncmp(vsd->stdIdent, VSD_STD_ID_NSR03,
706 VSD_STD_ID_LEN))
603 nsr03 = sector; 707 nsr03 = sector;
604 }
605 brelse(bh); 708 brelse(bh);
606 } 709 }
607 710
@@ -609,7 +712,7 @@ static int udf_vrs(struct super_block *sb, int silent)
609 return nsr03; 712 return nsr03;
610 else if (nsr02) 713 else if (nsr02)
611 return nsr02; 714 return nsr02;
612 else if (sector - (UDF_SB_SESSION(sb) << sb->s_blocksize_bits) == 32768) 715 else if (sector - (sbi->s_session << sb->s_blocksize_bits) == 32768)
613 return -1; 716 return -1;
614 else 717 else
615 return 0; 718 return 0;
@@ -634,11 +737,15 @@ static int udf_vrs(struct super_block *sb, int silent)
634 */ 737 */
635static void udf_find_anchor(struct super_block *sb) 738static void udf_find_anchor(struct super_block *sb)
636{ 739{
637 int lastblock = UDF_SB_LASTBLOCK(sb); 740 int lastblock;
638 struct buffer_head *bh = NULL; 741 struct buffer_head *bh = NULL;
639 uint16_t ident; 742 uint16_t ident;
640 uint32_t location; 743 uint32_t location;
641 int i; 744 int i;
745 struct udf_sb_info *sbi;
746
747 sbi = UDF_SB(sb);
748 lastblock = sbi->s_last_block;
642 749
643 if (lastblock) { 750 if (lastblock) {
644 int varlastblock = udf_variable_to_fixed(lastblock); 751 int varlastblock = udf_variable_to_fixed(lastblock);
@@ -658,57 +765,83 @@ static void udf_find_anchor(struct super_block *sb)
658 * however, if the disc isn't closed, it could be 512 */ 765 * however, if the disc isn't closed, it could be 512 */
659 766
660 for (i = 0; !lastblock && i < ARRAY_SIZE(last); i++) { 767 for (i = 0; !lastblock && i < ARRAY_SIZE(last); i++) {
661 if (last[i] < 0 || !(bh = sb_bread(sb, last[i]))) { 768 ident = location = 0;
662 ident = location = 0; 769 if (last[i] >= 0) {
663 } else { 770 bh = sb_bread(sb, last[i]);
664 ident = le16_to_cpu(((tag *)bh->b_data)->tagIdent); 771 if (bh) {
665 location = le32_to_cpu(((tag *)bh->b_data)->tagLocation); 772 tag *t = (tag *)bh->b_data;
666 brelse(bh); 773 ident = le16_to_cpu(t->tagIdent);
774 location = le32_to_cpu(t->tagLocation);
775 brelse(bh);
776 }
667 } 777 }
668 778
669 if (ident == TAG_IDENT_AVDP) { 779 if (ident == TAG_IDENT_AVDP) {
670 if (location == last[i] - UDF_SB_SESSION(sb)) { 780 if (location == last[i] - sbi->s_session) {
671 lastblock = UDF_SB_ANCHOR(sb)[0] = last[i] - UDF_SB_SESSION(sb); 781 lastblock = last[i] - sbi->s_session;
672 UDF_SB_ANCHOR(sb)[1] = last[i] - 256 - UDF_SB_SESSION(sb); 782 sbi->s_anchor[0] = lastblock;
673 } else if (location == udf_variable_to_fixed(last[i]) - UDF_SB_SESSION(sb)) { 783 sbi->s_anchor[1] = lastblock - 256;
784 } else if (location ==
785 udf_variable_to_fixed(last[i]) -
786 sbi->s_session) {
674 UDF_SET_FLAG(sb, UDF_FLAG_VARCONV); 787 UDF_SET_FLAG(sb, UDF_FLAG_VARCONV);
675 lastblock = UDF_SB_ANCHOR(sb)[0] = udf_variable_to_fixed(last[i]) - UDF_SB_SESSION(sb); 788 lastblock =
676 UDF_SB_ANCHOR(sb)[1] = lastblock - 256 - UDF_SB_SESSION(sb); 789 udf_variable_to_fixed(last[i]) -
790 sbi->s_session;
791 sbi->s_anchor[0] = lastblock;
792 sbi->s_anchor[1] = lastblock - 256 -
793 sbi->s_session;
677 } else { 794 } else {
678 udf_debug("Anchor found at block %d, location mismatch %d.\n", 795 udf_debug("Anchor found at block %d, "
796 "location mismatch %d.\n",
679 last[i], location); 797 last[i], location);
680 } 798 }
681 } else if (ident == TAG_IDENT_FE || ident == TAG_IDENT_EFE) { 799 } else if (ident == TAG_IDENT_FE ||
800 ident == TAG_IDENT_EFE) {
682 lastblock = last[i]; 801 lastblock = last[i];
683 UDF_SB_ANCHOR(sb)[3] = 512; 802 sbi->s_anchor[3] = 512;
684 } else { 803 } else {
685 if (last[i] < 256 || !(bh = sb_bread(sb, last[i] - 256))) { 804 ident = location = 0;
686 ident = location = 0; 805 if (last[i] >= 256) {
687 } else { 806 bh = sb_bread(sb, last[i] - 256);
688 ident = le16_to_cpu(((tag *)bh->b_data)->tagIdent); 807 if (bh) {
689 location = le32_to_cpu(((tag *)bh->b_data)->tagLocation); 808 tag *t = (tag *)bh->b_data;
690 brelse(bh); 809 ident = le16_to_cpu(
810 t->tagIdent);
811 location = le32_to_cpu(
812 t->tagLocation);
813 brelse(bh);
814 }
691 } 815 }
692 816
693 if (ident == TAG_IDENT_AVDP && 817 if (ident == TAG_IDENT_AVDP &&
694 location == last[i] - 256 - UDF_SB_SESSION(sb)) { 818 location == last[i] - 256 -
819 sbi->s_session) {
695 lastblock = last[i]; 820 lastblock = last[i];
696 UDF_SB_ANCHOR(sb)[1] = last[i] - 256; 821 sbi->s_anchor[1] = last[i] - 256;
697 } else { 822 } else {
698 if (last[i] < 312 + UDF_SB_SESSION(sb) || 823 ident = location = 0;
699 !(bh = sb_bread(sb, last[i] - 312 - UDF_SB_SESSION(sb)))) { 824 if (last[i] >= 312 + sbi->s_session) {
700 ident = location = 0; 825 bh = sb_bread(sb,
701 } else { 826 last[i] - 312 -
702 ident = le16_to_cpu(((tag *)bh->b_data)->tagIdent); 827 sbi->s_session);
703 location = le32_to_cpu(((tag *)bh->b_data)->tagLocation); 828 if (bh) {
704 brelse(bh); 829 tag *t = (tag *)
830 bh->b_data;
831 ident = le16_to_cpu(
832 t->tagIdent);
833 location = le32_to_cpu(
834 t->tagLocation);
835 brelse(bh);
836 }
705 } 837 }
706 838
707 if (ident == TAG_IDENT_AVDP && 839 if (ident == TAG_IDENT_AVDP &&
708 location == udf_variable_to_fixed(last[i]) - 256) { 840 location == udf_variable_to_fixed(last[i]) - 256) {
709 UDF_SET_FLAG(sb, UDF_FLAG_VARCONV); 841 UDF_SET_FLAG(sb,
842 UDF_FLAG_VARCONV);
710 lastblock = udf_variable_to_fixed(last[i]); 843 lastblock = udf_variable_to_fixed(last[i]);
711 UDF_SB_ANCHOR(sb)[1] = lastblock - 256; 844 sbi->s_anchor[1] = lastblock - 256;
712 } 845 }
713 } 846 }
714 } 847 }
@@ -716,10 +849,12 @@ static void udf_find_anchor(struct super_block *sb)
716 } 849 }
717 850
718 if (!lastblock) { 851 if (!lastblock) {
719 /* We havn't found the lastblock. check 312 */ 852 /* We haven't found the lastblock. check 312 */
720 if ((bh = sb_bread(sb, 312 + UDF_SB_SESSION(sb)))) { 853 bh = sb_bread(sb, 312 + sbi->s_session);
721 ident = le16_to_cpu(((tag *)bh->b_data)->tagIdent); 854 if (bh) {
722 location = le32_to_cpu(((tag *)bh->b_data)->tagLocation); 855 tag *t = (tag *)bh->b_data;
856 ident = le16_to_cpu(t->tagIdent);
857 location = le32_to_cpu(t->tagLocation);
723 brelse(bh); 858 brelse(bh);
724 859
725 if (ident == TAG_IDENT_AVDP && location == 256) 860 if (ident == TAG_IDENT_AVDP && location == 256)
@@ -727,29 +862,33 @@ static void udf_find_anchor(struct super_block *sb)
727 } 862 }
728 } 863 }
729 864
730 for (i = 0; i < ARRAY_SIZE(UDF_SB_ANCHOR(sb)); i++) { 865 for (i = 0; i < ARRAY_SIZE(sbi->s_anchor); i++) {
731 if (UDF_SB_ANCHOR(sb)[i]) { 866 if (sbi->s_anchor[i]) {
732 if (!(bh = udf_read_tagged(sb, UDF_SB_ANCHOR(sb)[i], 867 bh = udf_read_tagged(sb, sbi->s_anchor[i],
733 UDF_SB_ANCHOR(sb)[i], &ident))) { 868 sbi->s_anchor[i], &ident);
734 UDF_SB_ANCHOR(sb)[i] = 0; 869 if (!bh)
735 } else { 870 sbi->s_anchor[i] = 0;
871 else {
736 brelse(bh); 872 brelse(bh);
737 if ((ident != TAG_IDENT_AVDP) && 873 if ((ident != TAG_IDENT_AVDP) &&
738 (i || (ident != TAG_IDENT_FE && ident != TAG_IDENT_EFE))) { 874 (i || (ident != TAG_IDENT_FE &&
739 UDF_SB_ANCHOR(sb)[i] = 0; 875 ident != TAG_IDENT_EFE)))
740 } 876 sbi->s_anchor[i] = 0;
741 } 877 }
742 } 878 }
743 } 879 }
744 880
745 UDF_SB_LASTBLOCK(sb) = lastblock; 881 sbi->s_last_block = lastblock;
746} 882}
747 883
748static int udf_find_fileset(struct super_block *sb, kernel_lb_addr *fileset, kernel_lb_addr *root) 884static int udf_find_fileset(struct super_block *sb,
885 kernel_lb_addr *fileset,
886 kernel_lb_addr *root)
749{ 887{
750 struct buffer_head *bh = NULL; 888 struct buffer_head *bh = NULL;
751 long lastblock; 889 long lastblock;
752 uint16_t ident; 890 uint16_t ident;
891 struct udf_sb_info *sbi;
753 892
754 if (fileset->logicalBlockNum != 0xFFFFFFFF || 893 if (fileset->logicalBlockNum != 0xFFFFFFFF ||
755 fileset->partitionReferenceNum != 0xFFFF) { 894 fileset->partitionReferenceNum != 0xFFFF) {
@@ -764,22 +903,27 @@ static int udf_find_fileset(struct super_block *sb, kernel_lb_addr *fileset, ker
764 903
765 } 904 }
766 905
767 if (!bh) { /* Search backwards through the partitions */ 906 sbi = UDF_SB(sb);
907 if (!bh) {
908 /* Search backwards through the partitions */
768 kernel_lb_addr newfileset; 909 kernel_lb_addr newfileset;
769 910
770/* --> cvg: FIXME - is it reasonable? */ 911/* --> cvg: FIXME - is it reasonable? */
771 return 1; 912 return 1;
772 913
773 for (newfileset.partitionReferenceNum = UDF_SB_NUMPARTS(sb) - 1; 914 for (newfileset.partitionReferenceNum = sbi->s_partitions - 1;
774 (newfileset.partitionReferenceNum != 0xFFFF && 915 (newfileset.partitionReferenceNum != 0xFFFF &&
775 fileset->logicalBlockNum == 0xFFFFFFFF && 916 fileset->logicalBlockNum == 0xFFFFFFFF &&
776 fileset->partitionReferenceNum == 0xFFFF); 917 fileset->partitionReferenceNum == 0xFFFF);
777 newfileset.partitionReferenceNum--) { 918 newfileset.partitionReferenceNum--) {
778 lastblock = UDF_SB_PARTLEN(sb, newfileset.partitionReferenceNum); 919 lastblock = sbi->s_partmaps
920 [newfileset.partitionReferenceNum]
921 .s_partition_len;
779 newfileset.logicalBlockNum = 0; 922 newfileset.logicalBlockNum = 0;
780 923
781 do { 924 do {
782 bh = udf_read_ptagged(sb, newfileset, 0, &ident); 925 bh = udf_read_ptagged(sb, newfileset, 0,
926 &ident);
783 if (!bh) { 927 if (!bh) {
784 newfileset.logicalBlockNum++; 928 newfileset.logicalBlockNum++;
785 continue; 929 continue;
@@ -789,11 +933,12 @@ static int udf_find_fileset(struct super_block *sb, kernel_lb_addr *fileset, ker
789 case TAG_IDENT_SBD: 933 case TAG_IDENT_SBD:
790 { 934 {
791 struct spaceBitmapDesc *sp; 935 struct spaceBitmapDesc *sp;
792 sp = (struct spaceBitmapDesc *)bh->b_data; 936 sp = (struct spaceBitmapDesc *)
937 bh->b_data;
793 newfileset.logicalBlockNum += 1 + 938 newfileset.logicalBlockNum += 1 +
794 ((le32_to_cpu(sp->numOfBytes) + 939 ((le32_to_cpu(sp->numOfBytes) +
795 sizeof(struct spaceBitmapDesc) - 1) 940 sizeof(struct spaceBitmapDesc)
796 >> sb->s_blocksize_bits); 941 - 1) >> sb->s_blocksize_bits);
797 brelse(bh); 942 brelse(bh);
798 break; 943 break;
799 } 944 }
@@ -818,7 +963,7 @@ static int udf_find_fileset(struct super_block *sb, kernel_lb_addr *fileset, ker
818 fileset->logicalBlockNum, 963 fileset->logicalBlockNum,
819 fileset->partitionReferenceNum); 964 fileset->partitionReferenceNum);
820 965
821 UDF_SB_PARTITION(sb) = fileset->partitionReferenceNum; 966 sbi->s_partition = fileset->partitionReferenceNum;
822 udf_load_fileset(sb, bh, root); 967 udf_load_fileset(sb, bh, root);
823 brelse(bh); 968 brelse(bh);
824 return 0; 969 return 0;
@@ -840,26 +985,26 @@ static void udf_load_pvoldesc(struct super_block *sb, struct buffer_head *bh)
840 lets_to_cpu(pvoldesc->recordingDateAndTime))) { 985 lets_to_cpu(pvoldesc->recordingDateAndTime))) {
841 kernel_timestamp ts; 986 kernel_timestamp ts;
842 ts = lets_to_cpu(pvoldesc->recordingDateAndTime); 987 ts = lets_to_cpu(pvoldesc->recordingDateAndTime);
843 udf_debug("recording time %ld/%ld, %04u/%02u/%02u %02u:%02u (%x)\n", 988 udf_debug("recording time %ld/%ld, %04u/%02u/%02u"
989 " %02u:%02u (%x)\n",
844 recording, recording_usec, 990 recording, recording_usec,
845 ts.year, ts.month, ts.day, ts.hour, 991 ts.year, ts.month, ts.day, ts.hour,
846 ts.minute, ts.typeAndTimezone); 992 ts.minute, ts.typeAndTimezone);
847 UDF_SB_RECORDTIME(sb).tv_sec = recording; 993 UDF_SB(sb)->s_record_time.tv_sec = recording;
848 UDF_SB_RECORDTIME(sb).tv_nsec = recording_usec * 1000; 994 UDF_SB(sb)->s_record_time.tv_nsec = recording_usec * 1000;
849 } 995 }
850 996
851 if (!udf_build_ustr(&instr, pvoldesc->volIdent, 32)) { 997 if (!udf_build_ustr(&instr, pvoldesc->volIdent, 32))
852 if (udf_CS0toUTF8(&outstr, &instr)) { 998 if (udf_CS0toUTF8(&outstr, &instr)) {
853 strncpy(UDF_SB_VOLIDENT(sb), outstr.u_name, 999 strncpy(UDF_SB(sb)->s_volume_ident, outstr.u_name,
854 outstr.u_len > 31 ? 31 : outstr.u_len); 1000 outstr.u_len > 31 ? 31 : outstr.u_len);
855 udf_debug("volIdent[] = '%s'\n", UDF_SB_VOLIDENT(sb)); 1001 udf_debug("volIdent[] = '%s'\n",
1002 UDF_SB(sb)->s_volume_ident);
856 } 1003 }
857 }
858 1004
859 if (!udf_build_ustr(&instr, pvoldesc->volSetIdent, 128)) { 1005 if (!udf_build_ustr(&instr, pvoldesc->volSetIdent, 128))
860 if (udf_CS0toUTF8(&outstr, &instr)) 1006 if (udf_CS0toUTF8(&outstr, &instr))
861 udf_debug("volSetIdent[] = '%s'\n", outstr.u_name); 1007 udf_debug("volSetIdent[] = '%s'\n", outstr.u_name);
862 }
863} 1008}
864 1009
865static void udf_load_fileset(struct super_block *sb, struct buffer_head *bh, 1010static void udf_load_fileset(struct super_block *sb, struct buffer_head *bh,
@@ -871,65 +1016,124 @@ static void udf_load_fileset(struct super_block *sb, struct buffer_head *bh,
871 1016
872 *root = lelb_to_cpu(fset->rootDirectoryICB.extLocation); 1017 *root = lelb_to_cpu(fset->rootDirectoryICB.extLocation);
873 1018
874 UDF_SB_SERIALNUM(sb) = le16_to_cpu(fset->descTag.tagSerialNum); 1019 UDF_SB(sb)->s_serial_number = le16_to_cpu(fset->descTag.tagSerialNum);
875 1020
876 udf_debug("Rootdir at block=%d, partition=%d\n", 1021 udf_debug("Rootdir at block=%d, partition=%d\n",
877 root->logicalBlockNum, root->partitionReferenceNum); 1022 root->logicalBlockNum, root->partitionReferenceNum);
878} 1023}
879 1024
1025int udf_compute_nr_groups(struct super_block *sb, u32 partition)
1026{
1027 struct udf_part_map *map = &UDF_SB(sb)->s_partmaps[partition];
1028 return (map->s_partition_len +
1029 (sizeof(struct spaceBitmapDesc) << 3) +
1030 (sb->s_blocksize * 8) - 1) /
1031 (sb->s_blocksize * 8);
1032}
1033
1034static struct udf_bitmap *udf_sb_alloc_bitmap(struct super_block *sb, u32 index)
1035{
1036 struct udf_bitmap *bitmap;
1037 int nr_groups;
1038 int size;
1039
1040 nr_groups = udf_compute_nr_groups(sb, index);
1041 size = sizeof(struct udf_bitmap) +
1042 (sizeof(struct buffer_head *) * nr_groups);
1043
1044 if (size <= PAGE_SIZE)
1045 bitmap = kmalloc(size, GFP_KERNEL);
1046 else
1047 bitmap = vmalloc(size); /* TODO: get rid of vmalloc */
1048
1049 if (bitmap == NULL) {
1050 udf_error(sb, __FUNCTION__,
1051 "Unable to allocate space for bitmap "
1052 "and %d buffer_head pointers", nr_groups);
1053 return NULL;
1054 }
1055
1056 memset(bitmap, 0x00, size);
1057 bitmap->s_block_bitmap = (struct buffer_head **)(bitmap + 1);
1058 bitmap->s_nr_groups = nr_groups;
1059 return bitmap;
1060}
1061
880static int udf_load_partdesc(struct super_block *sb, struct buffer_head *bh) 1062static int udf_load_partdesc(struct super_block *sb, struct buffer_head *bh)
881{ 1063{
882 struct partitionDesc *p; 1064 struct partitionDesc *p;
883 int i; 1065 int i;
1066 struct udf_part_map *map;
1067 struct udf_sb_info *sbi;
884 1068
885 p = (struct partitionDesc *)bh->b_data; 1069 p = (struct partitionDesc *)bh->b_data;
1070 sbi = UDF_SB(sb);
886 1071
887 for (i = 0; i < UDF_SB_NUMPARTS(sb); i++) { 1072 for (i = 0; i < sbi->s_partitions; i++) {
1073 map = &sbi->s_partmaps[i];
888 udf_debug("Searching map: (%d == %d)\n", 1074 udf_debug("Searching map: (%d == %d)\n",
889 UDF_SB_PARTMAPS(sb)[i].s_partition_num, le16_to_cpu(p->partitionNumber)); 1075 map->s_partition_num,
890 if (UDF_SB_PARTMAPS(sb)[i].s_partition_num == le16_to_cpu(p->partitionNumber)) { 1076 le16_to_cpu(p->partitionNumber));
891 UDF_SB_PARTLEN(sb,i) = le32_to_cpu(p->partitionLength); /* blocks */ 1077 if (map->s_partition_num ==
892 UDF_SB_PARTROOT(sb,i) = le32_to_cpu(p->partitionStartingLocation); 1078 le16_to_cpu(p->partitionNumber)) {
893 if (le32_to_cpu(p->accessType) == PD_ACCESS_TYPE_READ_ONLY) 1079 map->s_partition_len =
894 UDF_SB_PARTFLAGS(sb,i) |= UDF_PART_FLAG_READ_ONLY; 1080 le32_to_cpu(p->partitionLength); /* blocks */
895 if (le32_to_cpu(p->accessType) == PD_ACCESS_TYPE_WRITE_ONCE) 1081 map->s_partition_root =
896 UDF_SB_PARTFLAGS(sb,i) |= UDF_PART_FLAG_WRITE_ONCE; 1082 le32_to_cpu(p->partitionStartingLocation);
897 if (le32_to_cpu(p->accessType) == PD_ACCESS_TYPE_REWRITABLE) 1083 if (p->accessType ==
898 UDF_SB_PARTFLAGS(sb,i) |= UDF_PART_FLAG_REWRITABLE; 1084 cpu_to_le32(PD_ACCESS_TYPE_READ_ONLY))
899 if (le32_to_cpu(p->accessType) == PD_ACCESS_TYPE_OVERWRITABLE) 1085 map->s_partition_flags |=
900 UDF_SB_PARTFLAGS(sb,i) |= UDF_PART_FLAG_OVERWRITABLE; 1086 UDF_PART_FLAG_READ_ONLY;
901 1087 if (p->accessType ==
902 if (!strcmp(p->partitionContents.ident, PD_PARTITION_CONTENTS_NSR02) || 1088 cpu_to_le32(PD_ACCESS_TYPE_WRITE_ONCE))
903 !strcmp(p->partitionContents.ident, PD_PARTITION_CONTENTS_NSR03)) { 1089 map->s_partition_flags |=
1090 UDF_PART_FLAG_WRITE_ONCE;
1091 if (p->accessType ==
1092 cpu_to_le32(PD_ACCESS_TYPE_REWRITABLE))
1093 map->s_partition_flags |=
1094 UDF_PART_FLAG_REWRITABLE;
1095 if (p->accessType ==
1096 cpu_to_le32(PD_ACCESS_TYPE_OVERWRITABLE))
1097 map->s_partition_flags |=
1098 UDF_PART_FLAG_OVERWRITABLE;
1099
1100 if (!strcmp(p->partitionContents.ident,
1101 PD_PARTITION_CONTENTS_NSR02) ||
1102 !strcmp(p->partitionContents.ident,
1103 PD_PARTITION_CONTENTS_NSR03)) {
904 struct partitionHeaderDesc *phd; 1104 struct partitionHeaderDesc *phd;
905 1105
906 phd = (struct partitionHeaderDesc *)(p->partitionContentsUse); 1106 phd = (struct partitionHeaderDesc *)
1107 (p->partitionContentsUse);
907 if (phd->unallocSpaceTable.extLength) { 1108 if (phd->unallocSpaceTable.extLength) {
908 kernel_lb_addr loc = { 1109 kernel_lb_addr loc = {
909 .logicalBlockNum = le32_to_cpu(phd->unallocSpaceTable.extPosition), 1110 .logicalBlockNum = le32_to_cpu(phd->unallocSpaceTable.extPosition),
910 .partitionReferenceNum = i, 1111 .partitionReferenceNum = i,
911 }; 1112 };
912 1113
913 UDF_SB_PARTMAPS(sb)[i].s_uspace.s_table = 1114 map->s_uspace.s_table =
914 udf_iget(sb, loc); 1115 udf_iget(sb, loc);
915 if (!UDF_SB_PARTMAPS(sb)[i].s_uspace.s_table) { 1116 if (!map->s_uspace.s_table) {
916 udf_debug("cannot load unallocSpaceTable (part %d)\n", i); 1117 udf_debug("cannot load unallocSpaceTable (part %d)\n", i);
917 return 1; 1118 return 1;
918 } 1119 }
919 UDF_SB_PARTFLAGS(sb,i) |= UDF_PART_FLAG_UNALLOC_TABLE; 1120 map->s_partition_flags |=
1121 UDF_PART_FLAG_UNALLOC_TABLE;
920 udf_debug("unallocSpaceTable (part %d) @ %ld\n", 1122 udf_debug("unallocSpaceTable (part %d) @ %ld\n",
921 i, UDF_SB_PARTMAPS(sb)[i].s_uspace.s_table->i_ino); 1123 i, map->s_uspace.s_table->i_ino);
922 } 1124 }
923 if (phd->unallocSpaceBitmap.extLength) { 1125 if (phd->unallocSpaceBitmap.extLength) {
924 UDF_SB_ALLOC_BITMAP(sb, i, s_uspace); 1126 struct udf_bitmap *bitmap =
925 if (UDF_SB_PARTMAPS(sb)[i].s_uspace.s_bitmap != NULL) { 1127 udf_sb_alloc_bitmap(sb, i);
926 UDF_SB_PARTMAPS(sb)[i].s_uspace.s_bitmap->s_extLength = 1128 map->s_uspace.s_bitmap = bitmap;
1129 if (bitmap != NULL) {
1130 bitmap->s_extLength =
927 le32_to_cpu(phd->unallocSpaceBitmap.extLength); 1131 le32_to_cpu(phd->unallocSpaceBitmap.extLength);
928 UDF_SB_PARTMAPS(sb)[i].s_uspace.s_bitmap->s_extPosition = 1132 bitmap->s_extPosition =
929 le32_to_cpu(phd->unallocSpaceBitmap.extPosition); 1133 le32_to_cpu(phd->unallocSpaceBitmap.extPosition);
930 UDF_SB_PARTFLAGS(sb,i) |= UDF_PART_FLAG_UNALLOC_BITMAP; 1134 map->s_partition_flags |= UDF_PART_FLAG_UNALLOC_BITMAP;
931 udf_debug("unallocSpaceBitmap (part %d) @ %d\n", 1135 udf_debug("unallocSpaceBitmap (part %d) @ %d\n",
932 i, UDF_SB_PARTMAPS(sb)[i].s_uspace.s_bitmap->s_extPosition); 1136 i, bitmap->s_extPosition);
933 } 1137 }
934 } 1138 }
935 if (phd->partitionIntegrityTable.extLength) 1139 if (phd->partitionIntegrityTable.extLength)
@@ -940,40 +1144,45 @@ static int udf_load_partdesc(struct super_block *sb, struct buffer_head *bh)
940 .partitionReferenceNum = i, 1144 .partitionReferenceNum = i,
941 }; 1145 };
942 1146
943 UDF_SB_PARTMAPS(sb)[i].s_fspace.s_table = 1147 map->s_fspace.s_table =
944 udf_iget(sb, loc); 1148 udf_iget(sb, loc);
945 if (!UDF_SB_PARTMAPS(sb)[i].s_fspace.s_table) { 1149 if (!map->s_fspace.s_table) {
946 udf_debug("cannot load freedSpaceTable (part %d)\n", i); 1150 udf_debug("cannot load freedSpaceTable (part %d)\n", i);
947 return 1; 1151 return 1;
948 } 1152 }
949 UDF_SB_PARTFLAGS(sb,i) |= UDF_PART_FLAG_FREED_TABLE; 1153 map->s_partition_flags |=
1154 UDF_PART_FLAG_FREED_TABLE;
950 udf_debug("freedSpaceTable (part %d) @ %ld\n", 1155 udf_debug("freedSpaceTable (part %d) @ %ld\n",
951 i, UDF_SB_PARTMAPS(sb)[i].s_fspace.s_table->i_ino); 1156 i, map->s_fspace.s_table->i_ino);
952 } 1157 }
953 if (phd->freedSpaceBitmap.extLength) { 1158 if (phd->freedSpaceBitmap.extLength) {
954 UDF_SB_ALLOC_BITMAP(sb, i, s_fspace); 1159 struct udf_bitmap *bitmap =
955 if (UDF_SB_PARTMAPS(sb)[i].s_fspace.s_bitmap != NULL) { 1160 udf_sb_alloc_bitmap(sb, i);
956 UDF_SB_PARTMAPS(sb)[i].s_fspace.s_bitmap->s_extLength = 1161 map->s_fspace.s_bitmap = bitmap;
1162 if (bitmap != NULL) {
1163 bitmap->s_extLength =
957 le32_to_cpu(phd->freedSpaceBitmap.extLength); 1164 le32_to_cpu(phd->freedSpaceBitmap.extLength);
958 UDF_SB_PARTMAPS(sb)[i].s_fspace.s_bitmap->s_extPosition = 1165 bitmap->s_extPosition =
959 le32_to_cpu(phd->freedSpaceBitmap.extPosition); 1166 le32_to_cpu(phd->freedSpaceBitmap.extPosition);
960 UDF_SB_PARTFLAGS(sb,i) |= UDF_PART_FLAG_FREED_BITMAP; 1167 map->s_partition_flags |= UDF_PART_FLAG_FREED_BITMAP;
961 udf_debug("freedSpaceBitmap (part %d) @ %d\n", 1168 udf_debug("freedSpaceBitmap (part %d) @ %d\n",
962 i, UDF_SB_PARTMAPS(sb)[i].s_fspace.s_bitmap->s_extPosition); 1169 i, bitmap->s_extPosition);
963 } 1170 }
964 } 1171 }
965 } 1172 }
966 break; 1173 break;
967 } 1174 }
968 } 1175 }
969 if (i == UDF_SB_NUMPARTS(sb)) { 1176 if (i == sbi->s_partitions)
970 udf_debug("Partition (%d) not found in partition map\n", 1177 udf_debug("Partition (%d) not found in partition map\n",
971 le16_to_cpu(p->partitionNumber)); 1178 le16_to_cpu(p->partitionNumber));
972 } else { 1179 else
973 udf_debug("Partition (%d:%d type %x) starts at physical %d, block length %d\n", 1180 udf_debug("Partition (%d:%d type %x) starts at physical %d, "
974 le16_to_cpu(p->partitionNumber), i, UDF_SB_PARTTYPE(sb,i), 1181 "block length %d\n",
975 UDF_SB_PARTROOT(sb,i), UDF_SB_PARTLEN(sb,i)); 1182 le16_to_cpu(p->partitionNumber), i,
976 } 1183 map->s_partition_type,
1184 map->s_partition_root,
1185 map->s_partition_len);
977 return 0; 1186 return 0;
978} 1187}
979 1188
@@ -983,70 +1192,105 @@ static int udf_load_logicalvol(struct super_block *sb, struct buffer_head *bh,
983 struct logicalVolDesc *lvd; 1192 struct logicalVolDesc *lvd;
984 int i, j, offset; 1193 int i, j, offset;
985 uint8_t type; 1194 uint8_t type;
1195 struct udf_sb_info *sbi = UDF_SB(sb);
1196 struct genericPartitionMap *gpm;
986 1197
987 lvd = (struct logicalVolDesc *)bh->b_data; 1198 lvd = (struct logicalVolDesc *)bh->b_data;
988 1199
989 UDF_SB_ALLOC_PARTMAPS(sb, le32_to_cpu(lvd->numPartitionMaps)); 1200 i = udf_sb_alloc_partition_maps(sb, le32_to_cpu(lvd->numPartitionMaps));
1201 if (i != 0)
1202 return i;
990 1203
991 for (i = 0, offset = 0; 1204 for (i = 0, offset = 0;
992 i < UDF_SB_NUMPARTS(sb) && offset < le32_to_cpu(lvd->mapTableLength); 1205 i < sbi->s_partitions && offset < le32_to_cpu(lvd->mapTableLength);
993 i++, offset += ((struct genericPartitionMap *)&(lvd->partitionMaps[offset]))->partitionMapLength) { 1206 i++, offset += gpm->partitionMapLength) {
994 type = ((struct genericPartitionMap *)&(lvd->partitionMaps[offset]))->partitionMapType; 1207 struct udf_part_map *map = &sbi->s_partmaps[i];
1208 gpm = (struct genericPartitionMap *)
1209 &(lvd->partitionMaps[offset]);
1210 type = gpm->partitionMapType;
995 if (type == 1) { 1211 if (type == 1) {
996 struct genericPartitionMap1 *gpm1 = (struct genericPartitionMap1 *)&(lvd->partitionMaps[offset]); 1212 struct genericPartitionMap1 *gpm1 =
997 UDF_SB_PARTTYPE(sb,i) = UDF_TYPE1_MAP15; 1213 (struct genericPartitionMap1 *)gpm;
998 UDF_SB_PARTVSN(sb,i) = le16_to_cpu(gpm1->volSeqNum); 1214 map->s_partition_type = UDF_TYPE1_MAP15;
999 UDF_SB_PARTNUM(sb,i) = le16_to_cpu(gpm1->partitionNum); 1215 map->s_volumeseqnum = le16_to_cpu(gpm1->volSeqNum);
1000 UDF_SB_PARTFUNC(sb,i) = NULL; 1216 map->s_partition_num = le16_to_cpu(gpm1->partitionNum);
1217 map->s_partition_func = NULL;
1001 } else if (type == 2) { 1218 } else if (type == 2) {
1002 struct udfPartitionMap2 *upm2 = (struct udfPartitionMap2 *)&(lvd->partitionMaps[offset]); 1219 struct udfPartitionMap2 *upm2 =
1003 if (!strncmp(upm2->partIdent.ident, UDF_ID_VIRTUAL, strlen(UDF_ID_VIRTUAL))) { 1220 (struct udfPartitionMap2 *)gpm;
1004 if (le16_to_cpu(((__le16 *)upm2->partIdent.identSuffix)[0]) == 0x0150) { 1221 if (!strncmp(upm2->partIdent.ident, UDF_ID_VIRTUAL,
1005 UDF_SB_PARTTYPE(sb,i) = UDF_VIRTUAL_MAP15; 1222 strlen(UDF_ID_VIRTUAL))) {
1006 UDF_SB_PARTFUNC(sb,i) = udf_get_pblock_virt15; 1223 u16 suf =
1007 } else if (le16_to_cpu(((__le16 *)upm2->partIdent.identSuffix)[0]) == 0x0200) { 1224 le16_to_cpu(((__le16 *)upm2->partIdent.
1008 UDF_SB_PARTTYPE(sb,i) = UDF_VIRTUAL_MAP20; 1225 identSuffix)[0]);
1009 UDF_SB_PARTFUNC(sb,i) = udf_get_pblock_virt20; 1226 if (suf == 0x0150) {
1227 map->s_partition_type =
1228 UDF_VIRTUAL_MAP15;
1229 map->s_partition_func =
1230 udf_get_pblock_virt15;
1231 } else if (suf == 0x0200) {
1232 map->s_partition_type =
1233 UDF_VIRTUAL_MAP20;
1234 map->s_partition_func =
1235 udf_get_pblock_virt20;
1010 } 1236 }
1011 } else if (!strncmp(upm2->partIdent.ident, UDF_ID_SPARABLE, strlen(UDF_ID_SPARABLE))) { 1237 } else if (!strncmp(upm2->partIdent.ident,
1238 UDF_ID_SPARABLE,
1239 strlen(UDF_ID_SPARABLE))) {
1012 uint32_t loc; 1240 uint32_t loc;
1013 uint16_t ident; 1241 uint16_t ident;
1014 struct sparingTable *st; 1242 struct sparingTable *st;
1015 struct sparablePartitionMap *spm = (struct sparablePartitionMap *)&(lvd->partitionMaps[offset]); 1243 struct sparablePartitionMap *spm =
1244 (struct sparablePartitionMap *)gpm;
1016 1245
1017 UDF_SB_PARTTYPE(sb,i) = UDF_SPARABLE_MAP15; 1246 map->s_partition_type = UDF_SPARABLE_MAP15;
1018 UDF_SB_TYPESPAR(sb,i).s_packet_len = le16_to_cpu(spm->packetLength); 1247 map->s_type_specific.s_sparing.s_packet_len =
1248 le16_to_cpu(spm->packetLength);
1019 for (j = 0; j < spm->numSparingTables; j++) { 1249 for (j = 0; j < spm->numSparingTables; j++) {
1020 loc = le32_to_cpu(spm->locSparingTable[j]); 1250 struct buffer_head *bh2;
1021 UDF_SB_TYPESPAR(sb,i).s_spar_map[j] = 1251
1022 udf_read_tagged(sb, loc, loc, &ident); 1252 loc = le32_to_cpu(
1023 if (UDF_SB_TYPESPAR(sb,i).s_spar_map[j] != NULL) { 1253 spm->locSparingTable[j]);
1024 st = (struct sparingTable *)UDF_SB_TYPESPAR(sb,i).s_spar_map[j]->b_data; 1254 bh2 = udf_read_tagged(sb, loc, loc,
1025 if (ident != 0 || 1255 &ident);
1026 strncmp(st->sparingIdent.ident, UDF_ID_SPARING, strlen(UDF_ID_SPARING))) { 1256 map->s_type_specific.s_sparing.
1027 brelse(UDF_SB_TYPESPAR(sb,i).s_spar_map[j]); 1257 s_spar_map[j] = bh2;
1028 UDF_SB_TYPESPAR(sb,i).s_spar_map[j] = NULL; 1258
1259 if (bh2 != NULL) {
1260 st = (struct sparingTable *)
1261 bh2->b_data;
1262 if (ident != 0 || strncmp(
1263 st->sparingIdent.ident,
1264 UDF_ID_SPARING,
1265 strlen(UDF_ID_SPARING))) {
1266 brelse(bh2);
1267 map->s_type_specific.
1268 s_sparing.
1269 s_spar_map[j] =
1270 NULL;
1029 } 1271 }
1030 } 1272 }
1031 } 1273 }
1032 UDF_SB_PARTFUNC(sb,i) = udf_get_pblock_spar15; 1274 map->s_partition_func = udf_get_pblock_spar15;
1033 } else { 1275 } else {
1034 udf_debug("Unknown ident: %s\n", upm2->partIdent.ident); 1276 udf_debug("Unknown ident: %s\n",
1277 upm2->partIdent.ident);
1035 continue; 1278 continue;
1036 } 1279 }
1037 UDF_SB_PARTVSN(sb,i) = le16_to_cpu(upm2->volSeqNum); 1280 map->s_volumeseqnum = le16_to_cpu(upm2->volSeqNum);
1038 UDF_SB_PARTNUM(sb,i) = le16_to_cpu(upm2->partitionNum); 1281 map->s_partition_num = le16_to_cpu(upm2->partitionNum);
1039 } 1282 }
1040 udf_debug("Partition (%d:%d) type %d on volume %d\n", 1283 udf_debug("Partition (%d:%d) type %d on volume %d\n",
1041 i, UDF_SB_PARTNUM(sb,i), type, UDF_SB_PARTVSN(sb,i)); 1284 i, map->s_partition_num, type,
1285 map->s_volumeseqnum);
1042 } 1286 }
1043 1287
1044 if (fileset) { 1288 if (fileset) {
1045 long_ad *la = (long_ad *)&(lvd->logicalVolContentsUse[0]); 1289 long_ad *la = (long_ad *)&(lvd->logicalVolContentsUse[0]);
1046 1290
1047 *fileset = lelb_to_cpu(la->extLocation); 1291 *fileset = lelb_to_cpu(la->extLocation);
1048 udf_debug("FileSet found in LogicalVolDesc at block=%d, partition=%d\n", 1292 udf_debug("FileSet found in LogicalVolDesc at block=%d, "
1049 fileset->logicalBlockNum, 1293 "partition=%d\n", fileset->logicalBlockNum,
1050 fileset->partitionReferenceNum); 1294 fileset->partitionReferenceNum);
1051 } 1295 }
1052 if (lvd->integritySeqExt.extLength) 1296 if (lvd->integritySeqExt.extLength)
@@ -1063,22 +1307,26 @@ static void udf_load_logicalvolint(struct super_block *sb, kernel_extent_ad loc)
1063{ 1307{
1064 struct buffer_head *bh = NULL; 1308 struct buffer_head *bh = NULL;
1065 uint16_t ident; 1309 uint16_t ident;
1310 struct udf_sb_info *sbi = UDF_SB(sb);
1311 struct logicalVolIntegrityDesc *lvid;
1066 1312
1067 while (loc.extLength > 0 && 1313 while (loc.extLength > 0 &&
1068 (bh = udf_read_tagged(sb, loc.extLocation, 1314 (bh = udf_read_tagged(sb, loc.extLocation,
1069 loc.extLocation, &ident)) && 1315 loc.extLocation, &ident)) &&
1070 ident == TAG_IDENT_LVID) { 1316 ident == TAG_IDENT_LVID) {
1071 UDF_SB_LVIDBH(sb) = bh; 1317 sbi->s_lvid_bh = bh;
1318 lvid = (struct logicalVolIntegrityDesc *)bh->b_data;
1072 1319
1073 if (UDF_SB_LVID(sb)->nextIntegrityExt.extLength) 1320 if (lvid->nextIntegrityExt.extLength)
1074 udf_load_logicalvolint(sb, leea_to_cpu(UDF_SB_LVID(sb)->nextIntegrityExt)); 1321 udf_load_logicalvolint(sb,
1322 leea_to_cpu(lvid->nextIntegrityExt));
1075 1323
1076 if (UDF_SB_LVIDBH(sb) != bh) 1324 if (sbi->s_lvid_bh != bh)
1077 brelse(bh); 1325 brelse(bh);
1078 loc.extLength -= sb->s_blocksize; 1326 loc.extLength -= sb->s_blocksize;
1079 loc.extLocation++; 1327 loc.extLocation++;
1080 } 1328 }
1081 if (UDF_SB_LVIDBH(sb) != bh) 1329 if (sbi->s_lvid_bh != bh)
1082 brelse(bh); 1330 brelse(bh);
1083} 1331}
1084 1332
@@ -1097,11 +1345,12 @@ static void udf_load_logicalvolint(struct super_block *sb, kernel_extent_ad loc)
1097 * July 1, 1997 - Andrew E. Mileski 1345 * July 1, 1997 - Andrew E. Mileski
1098 * Written, tested, and released. 1346 * Written, tested, and released.
1099 */ 1347 */
1100static int udf_process_sequence(struct super_block *sb, long block, long lastblock, 1348static int udf_process_sequence(struct super_block *sb, long block,
1101 kernel_lb_addr *fileset) 1349 long lastblock, kernel_lb_addr *fileset)
1102{ 1350{
1103 struct buffer_head *bh = NULL; 1351 struct buffer_head *bh = NULL;
1104 struct udf_vds_record vds[VDS_POS_LENGTH]; 1352 struct udf_vds_record vds[VDS_POS_LENGTH];
1353 struct udf_vds_record *curr;
1105 struct generic_desc *gd; 1354 struct generic_desc *gd;
1106 struct volDescPtr *vdp; 1355 struct volDescPtr *vdp;
1107 int done = 0; 1356 int done = 0;
@@ -1124,43 +1373,51 @@ static int udf_process_sequence(struct super_block *sb, long block, long lastblo
1124 vdsn = le32_to_cpu(gd->volDescSeqNum); 1373 vdsn = le32_to_cpu(gd->volDescSeqNum);
1125 switch (ident) { 1374 switch (ident) {
1126 case TAG_IDENT_PVD: /* ISO 13346 3/10.1 */ 1375 case TAG_IDENT_PVD: /* ISO 13346 3/10.1 */
1127 if (vdsn >= vds[VDS_POS_PRIMARY_VOL_DESC].volDescSeqNum) { 1376 curr = &vds[VDS_POS_PRIMARY_VOL_DESC];
1128 vds[VDS_POS_PRIMARY_VOL_DESC].volDescSeqNum = vdsn; 1377 if (vdsn >= curr->volDescSeqNum) {
1129 vds[VDS_POS_PRIMARY_VOL_DESC].block = block; 1378 curr->volDescSeqNum = vdsn;
1379 curr->block = block;
1130 } 1380 }
1131 break; 1381 break;
1132 case TAG_IDENT_VDP: /* ISO 13346 3/10.3 */ 1382 case TAG_IDENT_VDP: /* ISO 13346 3/10.3 */
1133 if (vdsn >= vds[VDS_POS_VOL_DESC_PTR].volDescSeqNum) { 1383 curr = &vds[VDS_POS_VOL_DESC_PTR];
1134 vds[VDS_POS_VOL_DESC_PTR].volDescSeqNum = vdsn; 1384 if (vdsn >= curr->volDescSeqNum) {
1135 vds[VDS_POS_VOL_DESC_PTR].block = block; 1385 curr->volDescSeqNum = vdsn;
1386 curr->block = block;
1136 1387
1137 vdp = (struct volDescPtr *)bh->b_data; 1388 vdp = (struct volDescPtr *)bh->b_data;
1138 next_s = le32_to_cpu(vdp->nextVolDescSeqExt.extLocation); 1389 next_s = le32_to_cpu(
1139 next_e = le32_to_cpu(vdp->nextVolDescSeqExt.extLength); 1390 vdp->nextVolDescSeqExt.extLocation);
1391 next_e = le32_to_cpu(
1392 vdp->nextVolDescSeqExt.extLength);
1140 next_e = next_e >> sb->s_blocksize_bits; 1393 next_e = next_e >> sb->s_blocksize_bits;
1141 next_e += next_s; 1394 next_e += next_s;
1142 } 1395 }
1143 break; 1396 break;
1144 case TAG_IDENT_IUVD: /* ISO 13346 3/10.4 */ 1397 case TAG_IDENT_IUVD: /* ISO 13346 3/10.4 */
1145 if (vdsn >= vds[VDS_POS_IMP_USE_VOL_DESC].volDescSeqNum) { 1398 curr = &vds[VDS_POS_IMP_USE_VOL_DESC];
1146 vds[VDS_POS_IMP_USE_VOL_DESC].volDescSeqNum = vdsn; 1399 if (vdsn >= curr->volDescSeqNum) {
1147 vds[VDS_POS_IMP_USE_VOL_DESC].block = block; 1400 curr->volDescSeqNum = vdsn;
1401 curr->block = block;
1148 } 1402 }
1149 break; 1403 break;
1150 case TAG_IDENT_PD: /* ISO 13346 3/10.5 */ 1404 case TAG_IDENT_PD: /* ISO 13346 3/10.5 */
1151 if (!vds[VDS_POS_PARTITION_DESC].block) 1405 curr = &vds[VDS_POS_PARTITION_DESC];
1152 vds[VDS_POS_PARTITION_DESC].block = block; 1406 if (!curr->block)
1407 curr->block = block;
1153 break; 1408 break;
1154 case TAG_IDENT_LVD: /* ISO 13346 3/10.6 */ 1409 case TAG_IDENT_LVD: /* ISO 13346 3/10.6 */
1155 if (vdsn >= vds[VDS_POS_LOGICAL_VOL_DESC].volDescSeqNum) { 1410 curr = &vds[VDS_POS_LOGICAL_VOL_DESC];
1156 vds[VDS_POS_LOGICAL_VOL_DESC].volDescSeqNum = vdsn; 1411 if (vdsn >= curr->volDescSeqNum) {
1157 vds[VDS_POS_LOGICAL_VOL_DESC].block = block; 1412 curr->volDescSeqNum = vdsn;
1413 curr->block = block;
1158 } 1414 }
1159 break; 1415 break;
1160 case TAG_IDENT_USD: /* ISO 13346 3/10.8 */ 1416 case TAG_IDENT_USD: /* ISO 13346 3/10.8 */
1161 if (vdsn >= vds[VDS_POS_UNALLOC_SPACE_DESC].volDescSeqNum) { 1417 curr = &vds[VDS_POS_UNALLOC_SPACE_DESC];
1162 vds[VDS_POS_UNALLOC_SPACE_DESC].volDescSeqNum = vdsn; 1418 if (vdsn >= curr->volDescSeqNum) {
1163 vds[VDS_POS_UNALLOC_SPACE_DESC].block = block; 1419 curr->volDescSeqNum = vdsn;
1420 curr->block = block;
1164 } 1421 }
1165 break; 1422 break;
1166 case TAG_IDENT_TD: /* ISO 13346 3/10.9 */ 1423 case TAG_IDENT_TD: /* ISO 13346 3/10.9 */
@@ -1169,32 +1426,38 @@ static int udf_process_sequence(struct super_block *sb, long block, long lastblo
1169 block = next_s; 1426 block = next_s;
1170 lastblock = next_e; 1427 lastblock = next_e;
1171 next_s = next_e = 0; 1428 next_s = next_e = 0;
1172 } else { 1429 } else
1173 done = 1; 1430 done = 1;
1174 }
1175 break; 1431 break;
1176 } 1432 }
1177 brelse(bh); 1433 brelse(bh);
1178 } 1434 }
1179 for (i = 0; i < VDS_POS_LENGTH; i++) { 1435 for (i = 0; i < VDS_POS_LENGTH; i++) {
1180 if (vds[i].block) { 1436 if (vds[i].block) {
1181 bh = udf_read_tagged(sb, vds[i].block, vds[i].block, &ident); 1437 bh = udf_read_tagged(sb, vds[i].block, vds[i].block,
1438 &ident);
1182 1439
1183 if (i == VDS_POS_PRIMARY_VOL_DESC) { 1440 if (i == VDS_POS_PRIMARY_VOL_DESC) {
1184 udf_load_pvoldesc(sb, bh); 1441 udf_load_pvoldesc(sb, bh);
1185 } else if (i == VDS_POS_LOGICAL_VOL_DESC) { 1442 } else if (i == VDS_POS_LOGICAL_VOL_DESC) {
1186 udf_load_logicalvol(sb, bh, fileset); 1443 if (udf_load_logicalvol(sb, bh, fileset)) {
1444 brelse(bh);
1445 return 1;
1446 }
1187 } else if (i == VDS_POS_PARTITION_DESC) { 1447 } else if (i == VDS_POS_PARTITION_DESC) {
1188 struct buffer_head *bh2 = NULL; 1448 struct buffer_head *bh2 = NULL;
1189 if (udf_load_partdesc(sb, bh)) { 1449 if (udf_load_partdesc(sb, bh)) {
1190 brelse(bh); 1450 brelse(bh);
1191 return 1; 1451 return 1;
1192 } 1452 }
1193 for (j = vds[i].block + 1; j < vds[VDS_POS_TERMINATING_DESC].block; j++) { 1453 for (j = vds[i].block + 1;
1454 j < vds[VDS_POS_TERMINATING_DESC].block;
1455 j++) {
1194 bh2 = udf_read_tagged(sb, j, j, &ident); 1456 bh2 = udf_read_tagged(sb, j, j, &ident);
1195 gd = (struct generic_desc *)bh2->b_data; 1457 gd = (struct generic_desc *)bh2->b_data;
1196 if (ident == TAG_IDENT_PD) 1458 if (ident == TAG_IDENT_PD)
1197 if (udf_load_partdesc(sb, bh2)) { 1459 if (udf_load_partdesc(sb,
1460 bh2)) {
1198 brelse(bh); 1461 brelse(bh);
1199 brelse(bh2); 1462 brelse(bh2);
1200 return 1; 1463 return 1;
@@ -1222,14 +1485,17 @@ static int udf_check_valid(struct super_block *sb, int novrs, int silent)
1222 } 1485 }
1223 /* Check that it is NSR02 compliant */ 1486 /* Check that it is NSR02 compliant */
1224 /* Process any "CD-ROM Volume Descriptor Set" (ECMA 167 2/8.3.1) */ 1487 /* Process any "CD-ROM Volume Descriptor Set" (ECMA 167 2/8.3.1) */
1225 else if ((block = udf_vrs(sb, silent)) == -1) { 1488 else {
1226 udf_debug("Failed to read byte 32768. Assuming open disc. " 1489 block = udf_vrs(sb, silent);
1227 "Skipping validity check\n"); 1490 if (block == -1) {
1228 if (!UDF_SB_LASTBLOCK(sb)) 1491 struct udf_sb_info *sbi = UDF_SB(sb);
1229 UDF_SB_LASTBLOCK(sb) = udf_get_last_block(sb); 1492 udf_debug("Failed to read byte 32768. Assuming open "
1230 return 0; 1493 "disc. Skipping validity check\n");
1231 } else { 1494 if (!sbi->s_last_block)
1232 return !block; 1495 sbi->s_last_block = udf_get_last_block(sb);
1496 return 0;
1497 } else
1498 return !block;
1233 } 1499 }
1234} 1500}
1235 1501
@@ -1240,100 +1506,121 @@ static int udf_load_partition(struct super_block *sb, kernel_lb_addr *fileset)
1240 struct buffer_head *bh; 1506 struct buffer_head *bh;
1241 long main_s, main_e, reserve_s, reserve_e; 1507 long main_s, main_e, reserve_s, reserve_e;
1242 int i, j; 1508 int i, j;
1509 struct udf_sb_info *sbi;
1243 1510
1244 if (!sb) 1511 if (!sb)
1245 return 1; 1512 return 1;
1513 sbi = UDF_SB(sb);
1246 1514
1247 for (i = 0; i < ARRAY_SIZE(UDF_SB_ANCHOR(sb)); i++) { 1515 for (i = 0; i < ARRAY_SIZE(sbi->s_anchor); i++) {
1248 if (UDF_SB_ANCHOR(sb)[i] && 1516 if (!sbi->s_anchor[i])
1249 (bh = udf_read_tagged(sb, UDF_SB_ANCHOR(sb)[i], 1517 continue;
1250 UDF_SB_ANCHOR(sb)[i], &ident))) { 1518 bh = udf_read_tagged(sb, sbi->s_anchor[i], sbi->s_anchor[i],
1251 anchor = (struct anchorVolDescPtr *)bh->b_data; 1519 &ident);
1520 if (!bh)
1521 continue;
1252 1522
1253 /* Locate the main sequence */ 1523 anchor = (struct anchorVolDescPtr *)bh->b_data;
1254 main_s = le32_to_cpu(anchor->mainVolDescSeqExt.extLocation);
1255 main_e = le32_to_cpu(anchor->mainVolDescSeqExt.extLength );
1256 main_e = main_e >> sb->s_blocksize_bits;
1257 main_e += main_s;
1258 1524
1259 /* Locate the reserve sequence */ 1525 /* Locate the main sequence */
1260 reserve_s = le32_to_cpu(anchor->reserveVolDescSeqExt.extLocation); 1526 main_s = le32_to_cpu(anchor->mainVolDescSeqExt.extLocation);
1261 reserve_e = le32_to_cpu(anchor->reserveVolDescSeqExt.extLength); 1527 main_e = le32_to_cpu(anchor->mainVolDescSeqExt.extLength);
1262 reserve_e = reserve_e >> sb->s_blocksize_bits; 1528 main_e = main_e >> sb->s_blocksize_bits;
1263 reserve_e += reserve_s; 1529 main_e += main_s;
1264 1530
1265 brelse(bh); 1531 /* Locate the reserve sequence */
1532 reserve_s = le32_to_cpu(
1533 anchor->reserveVolDescSeqExt.extLocation);
1534 reserve_e = le32_to_cpu(
1535 anchor->reserveVolDescSeqExt.extLength);
1536 reserve_e = reserve_e >> sb->s_blocksize_bits;
1537 reserve_e += reserve_s;
1266 1538
1267 /* Process the main & reserve sequences */ 1539 brelse(bh);
1268 /* responsible for finding the PartitionDesc(s) */ 1540
1269 if (!(udf_process_sequence(sb, main_s, main_e, fileset) && 1541 /* Process the main & reserve sequences */
1270 udf_process_sequence(sb, reserve_s, reserve_e, fileset))) { 1542 /* responsible for finding the PartitionDesc(s) */
1271 break; 1543 if (!(udf_process_sequence(sb, main_s, main_e,
1272 } 1544 fileset) &&
1273 } 1545 udf_process_sequence(sb, reserve_s, reserve_e,
1546 fileset)))
1547 break;
1274 } 1548 }
1275 1549
1276 if (i == ARRAY_SIZE(UDF_SB_ANCHOR(sb))) { 1550 if (i == ARRAY_SIZE(sbi->s_anchor)) {
1277 udf_debug("No Anchor block found\n"); 1551 udf_debug("No Anchor block found\n");
1278 return 1; 1552 return 1;
1279 } else 1553 }
1280 udf_debug("Using anchor in block %d\n", UDF_SB_ANCHOR(sb)[i]); 1554 udf_debug("Using anchor in block %d\n", sbi->s_anchor[i]);
1281 1555
1282 for (i = 0; i < UDF_SB_NUMPARTS(sb); i++) { 1556 for (i = 0; i < sbi->s_partitions; i++) {
1283 kernel_lb_addr uninitialized_var(ino); 1557 kernel_lb_addr uninitialized_var(ino);
1284 switch (UDF_SB_PARTTYPE(sb, i)) { 1558 struct udf_part_map *map = &sbi->s_partmaps[i];
1559 switch (map->s_partition_type) {
1285 case UDF_VIRTUAL_MAP15: 1560 case UDF_VIRTUAL_MAP15:
1286 case UDF_VIRTUAL_MAP20: 1561 case UDF_VIRTUAL_MAP20:
1287 if (!UDF_SB_LASTBLOCK(sb)) { 1562 if (!sbi->s_last_block) {
1288 UDF_SB_LASTBLOCK(sb) = udf_get_last_block(sb); 1563 sbi->s_last_block = udf_get_last_block(sb);
1289 udf_find_anchor(sb); 1564 udf_find_anchor(sb);
1290 } 1565 }
1291 1566
1292 if (!UDF_SB_LASTBLOCK(sb)) { 1567 if (!sbi->s_last_block) {
1293 udf_debug("Unable to determine Lastblock (For " 1568 udf_debug("Unable to determine Lastblock (For "
1294 "Virtual Partition)\n"); 1569 "Virtual Partition)\n");
1295 return 1; 1570 return 1;
1296 } 1571 }
1297 1572
1298 for (j = 0; j < UDF_SB_NUMPARTS(sb); j++) { 1573 for (j = 0; j < sbi->s_partitions; j++) {
1574 struct udf_part_map *map2 = &sbi->s_partmaps[j];
1299 if (j != i && 1575 if (j != i &&
1300 UDF_SB_PARTVSN(sb, i) == UDF_SB_PARTVSN(sb, j) && 1576 map->s_volumeseqnum ==
1301 UDF_SB_PARTNUM(sb, i) == UDF_SB_PARTNUM(sb, j)) { 1577 map2->s_volumeseqnum &&
1578 map->s_partition_num ==
1579 map2->s_partition_num) {
1302 ino.partitionReferenceNum = j; 1580 ino.partitionReferenceNum = j;
1303 ino.logicalBlockNum = UDF_SB_LASTBLOCK(sb) - UDF_SB_PARTROOT(sb, j); 1581 ino.logicalBlockNum =
1582 sbi->s_last_block -
1583 map2->s_partition_root;
1304 break; 1584 break;
1305 } 1585 }
1306 } 1586 }
1307 1587
1308 if (j == UDF_SB_NUMPARTS(sb)) 1588 if (j == sbi->s_partitions)
1309 return 1; 1589 return 1;
1310 1590
1311 if (!(UDF_SB_VAT(sb) = udf_iget(sb, ino))) 1591 sbi->s_vat_inode = udf_iget(sb, ino);
1592 if (!sbi->s_vat_inode)
1312 return 1; 1593 return 1;
1313 1594
1314 if (UDF_SB_PARTTYPE(sb, i) == UDF_VIRTUAL_MAP15) { 1595 if (map->s_partition_type == UDF_VIRTUAL_MAP15) {
1315 UDF_SB_TYPEVIRT(sb, i).s_start_offset = 1596 map->s_type_specific.s_virtual.s_start_offset =
1316 udf_ext0_offset(UDF_SB_VAT(sb)); 1597 udf_ext0_offset(sbi->s_vat_inode);
1317 UDF_SB_TYPEVIRT(sb, i).s_num_entries = 1598 map->s_type_specific.s_virtual.s_num_entries =
1318 (UDF_SB_VAT(sb)->i_size - 36) >> 2; 1599 (sbi->s_vat_inode->i_size - 36) >> 2;
1319 } else if (UDF_SB_PARTTYPE(sb, i) == UDF_VIRTUAL_MAP20) { 1600 } else if (map->s_partition_type == UDF_VIRTUAL_MAP20) {
1320 struct buffer_head *bh = NULL;
1321 uint32_t pos; 1601 uint32_t pos;
1602 struct virtualAllocationTable20 *vat20;
1322 1603
1323 pos = udf_block_map(UDF_SB_VAT(sb), 0); 1604 pos = udf_block_map(sbi->s_vat_inode, 0);
1324 bh = sb_bread(sb, pos); 1605 bh = sb_bread(sb, pos);
1325 if (!bh) 1606 if (!bh)
1326 return 1; 1607 return 1;
1327 UDF_SB_TYPEVIRT(sb, i).s_start_offset = 1608 vat20 = (struct virtualAllocationTable20 *)
1328 le16_to_cpu(((struct virtualAllocationTable20 *)bh->b_data + 1609 bh->b_data +
1329 udf_ext0_offset(UDF_SB_VAT(sb)))->lengthHeader) + 1610 udf_ext0_offset(sbi->s_vat_inode);
1330 udf_ext0_offset(UDF_SB_VAT(sb)); 1611 map->s_type_specific.s_virtual.s_start_offset =
1331 UDF_SB_TYPEVIRT(sb, i).s_num_entries = (UDF_SB_VAT(sb)->i_size - 1612 le16_to_cpu(vat20->lengthHeader) +
1332 UDF_SB_TYPEVIRT(sb, i).s_start_offset) >> 2; 1613 udf_ext0_offset(sbi->s_vat_inode);
1614 map->s_type_specific.s_virtual.s_num_entries =
1615 (sbi->s_vat_inode->i_size -
1616 map->s_type_specific.s_virtual.
1617 s_start_offset) >> 2;
1333 brelse(bh); 1618 brelse(bh);
1334 } 1619 }
1335 UDF_SB_PARTROOT(sb, i) = udf_get_pblock(sb, 0, i, 0); 1620 map->s_partition_root = udf_get_pblock(sb, 0, i, 0);
1336 UDF_SB_PARTLEN(sb, i) = UDF_SB_PARTLEN(sb, ino.partitionReferenceNum); 1621 map->s_partition_len =
1622 sbi->s_partmaps[ino.partitionReferenceNum].
1623 s_partition_len;
1337 } 1624 }
1338 } 1625 }
1339 return 0; 1626 return 0;
@@ -1341,62 +1628,86 @@ static int udf_load_partition(struct super_block *sb, kernel_lb_addr *fileset)
1341 1628
1342static void udf_open_lvid(struct super_block *sb) 1629static void udf_open_lvid(struct super_block *sb)
1343{ 1630{
1344 if (UDF_SB_LVIDBH(sb)) { 1631 struct udf_sb_info *sbi = UDF_SB(sb);
1345 int i; 1632 struct buffer_head *bh = sbi->s_lvid_bh;
1633 if (bh) {
1346 kernel_timestamp cpu_time; 1634 kernel_timestamp cpu_time;
1635 struct logicalVolIntegrityDesc *lvid =
1636 (struct logicalVolIntegrityDesc *)bh->b_data;
1637 struct logicalVolIntegrityDescImpUse *lvidiu =
1638 udf_sb_lvidiu(sbi);
1347 1639
1348 UDF_SB_LVIDIU(sb)->impIdent.identSuffix[0] = UDF_OS_CLASS_UNIX; 1640 lvidiu->impIdent.identSuffix[0] = UDF_OS_CLASS_UNIX;
1349 UDF_SB_LVIDIU(sb)->impIdent.identSuffix[1] = UDF_OS_ID_LINUX; 1641 lvidiu->impIdent.identSuffix[1] = UDF_OS_ID_LINUX;
1350 if (udf_time_to_stamp(&cpu_time, CURRENT_TIME)) 1642 if (udf_time_to_stamp(&cpu_time, CURRENT_TIME))
1351 UDF_SB_LVID(sb)->recordingDateAndTime = cpu_to_lets(cpu_time); 1643 lvid->recordingDateAndTime = cpu_to_lets(cpu_time);
1352 UDF_SB_LVID(sb)->integrityType = LVID_INTEGRITY_TYPE_OPEN; 1644 lvid->integrityType = LVID_INTEGRITY_TYPE_OPEN;
1353
1354 UDF_SB_LVID(sb)->descTag.descCRC = cpu_to_le16(udf_crc((char *)UDF_SB_LVID(sb) + sizeof(tag),
1355 le16_to_cpu(UDF_SB_LVID(sb)->descTag.descCRCLength), 0));
1356 1645
1357 UDF_SB_LVID(sb)->descTag.tagChecksum = 0; 1646 lvid->descTag.descCRC = cpu_to_le16(
1358 for (i = 0; i < 16; i++) 1647 udf_crc((char *)lvid + sizeof(tag),
1359 if (i != 4) 1648 le16_to_cpu(lvid->descTag.descCRCLength),
1360 UDF_SB_LVID(sb)->descTag.tagChecksum += 1649 0));
1361 ((uint8_t *) &(UDF_SB_LVID(sb)->descTag))[i];
1362 1650
1363 mark_buffer_dirty(UDF_SB_LVIDBH(sb)); 1651 lvid->descTag.tagChecksum = udf_tag_checksum(&lvid->descTag);
1652 mark_buffer_dirty(bh);
1364 } 1653 }
1365} 1654}
1366 1655
1367static void udf_close_lvid(struct super_block *sb) 1656static void udf_close_lvid(struct super_block *sb)
1368{ 1657{
1369 kernel_timestamp cpu_time; 1658 kernel_timestamp cpu_time;
1370 int i; 1659 struct udf_sb_info *sbi = UDF_SB(sb);
1660 struct buffer_head *bh = sbi->s_lvid_bh;
1661 struct logicalVolIntegrityDesc *lvid;
1662
1663 if (!bh)
1664 return;
1665
1666 lvid = (struct logicalVolIntegrityDesc *)bh->b_data;
1371 1667
1372 if (UDF_SB_LVIDBH(sb) && 1668 if (lvid->integrityType == LVID_INTEGRITY_TYPE_OPEN) {
1373 UDF_SB_LVID(sb)->integrityType == LVID_INTEGRITY_TYPE_OPEN) { 1669 struct logicalVolIntegrityDescImpUse *lvidiu =
1374 UDF_SB_LVIDIU(sb)->impIdent.identSuffix[0] = UDF_OS_CLASS_UNIX; 1670 udf_sb_lvidiu(sbi);
1375 UDF_SB_LVIDIU(sb)->impIdent.identSuffix[1] = UDF_OS_ID_LINUX; 1671 lvidiu->impIdent.identSuffix[0] = UDF_OS_CLASS_UNIX;
1672 lvidiu->impIdent.identSuffix[1] = UDF_OS_ID_LINUX;
1376 if (udf_time_to_stamp(&cpu_time, CURRENT_TIME)) 1673 if (udf_time_to_stamp(&cpu_time, CURRENT_TIME))
1377 UDF_SB_LVID(sb)->recordingDateAndTime = cpu_to_lets(cpu_time); 1674 lvid->recordingDateAndTime = cpu_to_lets(cpu_time);
1378 if (UDF_MAX_WRITE_VERSION > le16_to_cpu(UDF_SB_LVIDIU(sb)->maxUDFWriteRev)) 1675 if (UDF_MAX_WRITE_VERSION > le16_to_cpu(lvidiu->maxUDFWriteRev))
1379 UDF_SB_LVIDIU(sb)->maxUDFWriteRev = cpu_to_le16(UDF_MAX_WRITE_VERSION); 1676 lvidiu->maxUDFWriteRev =
1380 if (UDF_SB_UDFREV(sb) > le16_to_cpu(UDF_SB_LVIDIU(sb)->minUDFReadRev)) 1677 cpu_to_le16(UDF_MAX_WRITE_VERSION);
1381 UDF_SB_LVIDIU(sb)->minUDFReadRev = cpu_to_le16(UDF_SB_UDFREV(sb)); 1678 if (sbi->s_udfrev > le16_to_cpu(lvidiu->minUDFReadRev))
1382 if (UDF_SB_UDFREV(sb) > le16_to_cpu(UDF_SB_LVIDIU(sb)->minUDFWriteRev)) 1679 lvidiu->minUDFReadRev = cpu_to_le16(sbi->s_udfrev);
1383 UDF_SB_LVIDIU(sb)->minUDFWriteRev = cpu_to_le16(UDF_SB_UDFREV(sb)); 1680 if (sbi->s_udfrev > le16_to_cpu(lvidiu->minUDFWriteRev))
1384 UDF_SB_LVID(sb)->integrityType = cpu_to_le32(LVID_INTEGRITY_TYPE_CLOSE); 1681 lvidiu->minUDFWriteRev = cpu_to_le16(sbi->s_udfrev);
1385 1682 lvid->integrityType = cpu_to_le32(LVID_INTEGRITY_TYPE_CLOSE);
1386 UDF_SB_LVID(sb)->descTag.descCRC = 1683
1387 cpu_to_le16(udf_crc((char *)UDF_SB_LVID(sb) + sizeof(tag), 1684 lvid->descTag.descCRC = cpu_to_le16(
1388 le16_to_cpu(UDF_SB_LVID(sb)->descTag.descCRCLength), 0)); 1685 udf_crc((char *)lvid + sizeof(tag),
1389 1686 le16_to_cpu(lvid->descTag.descCRCLength),
1390 UDF_SB_LVID(sb)->descTag.tagChecksum = 0; 1687 0));
1391 for (i = 0; i < 16; i++) 1688
1392 if (i != 4) 1689 lvid->descTag.tagChecksum = udf_tag_checksum(&lvid->descTag);
1393 UDF_SB_LVID(sb)->descTag.tagChecksum += 1690 mark_buffer_dirty(bh);
1394 ((uint8_t *)&(UDF_SB_LVID(sb)->descTag))[i];
1395
1396 mark_buffer_dirty(UDF_SB_LVIDBH(sb));
1397 } 1691 }
1398} 1692}
1399 1693
1694static void udf_sb_free_bitmap(struct udf_bitmap *bitmap)
1695{
1696 int i;
1697 int nr_groups = bitmap->s_nr_groups;
1698 int size = sizeof(struct udf_bitmap) + (sizeof(struct buffer_head *) *
1699 nr_groups);
1700
1701 for (i = 0; i < nr_groups; i++)
1702 if (bitmap->s_block_bitmap[i])
1703 brelse(bitmap->s_block_bitmap[i]);
1704
1705 if (size <= PAGE_SIZE)
1706 kfree(bitmap);
1707 else
1708 vfree(bitmap);
1709}
1710
1400/* 1711/*
1401 * udf_read_super 1712 * udf_read_super
1402 * 1713 *
@@ -1426,16 +1737,15 @@ static int udf_fill_super(struct super_block *sb, void *options, int silent)
1426 uopt.gid = -1; 1737 uopt.gid = -1;
1427 uopt.umask = 0; 1738 uopt.umask = 0;
1428 1739
1429 sbi = kmalloc(sizeof(struct udf_sb_info), GFP_KERNEL); 1740 sbi = kzalloc(sizeof(struct udf_sb_info), GFP_KERNEL);
1430 if (!sbi) 1741 if (!sbi)
1431 return -ENOMEM; 1742 return -ENOMEM;
1432 1743
1433 sb->s_fs_info = sbi; 1744 sb->s_fs_info = sbi;
1434 memset(UDF_SB(sb), 0x00, sizeof(struct udf_sb_info));
1435 1745
1436 mutex_init(&sbi->s_alloc_mutex); 1746 mutex_init(&sbi->s_alloc_mutex);
1437 1747
1438 if (!udf_parse_options((char *)options, &uopt)) 1748 if (!udf_parse_options((char *)options, &uopt, false))
1439 goto error_out; 1749 goto error_out;
1440 1750
1441 if (uopt.flags & (1 << UDF_FLAG_UTF8) && 1751 if (uopt.flags & (1 << UDF_FLAG_UTF8) &&
@@ -1459,30 +1769,31 @@ static int udf_fill_super(struct super_block *sb, void *options, int silent)
1459 fileset.logicalBlockNum = 0xFFFFFFFF; 1769 fileset.logicalBlockNum = 0xFFFFFFFF;
1460 fileset.partitionReferenceNum = 0xFFFF; 1770 fileset.partitionReferenceNum = 0xFFFF;
1461 1771
1462 UDF_SB(sb)->s_flags = uopt.flags; 1772 sbi->s_flags = uopt.flags;
1463 UDF_SB(sb)->s_uid = uopt.uid; 1773 sbi->s_uid = uopt.uid;
1464 UDF_SB(sb)->s_gid = uopt.gid; 1774 sbi->s_gid = uopt.gid;
1465 UDF_SB(sb)->s_umask = uopt.umask; 1775 sbi->s_umask = uopt.umask;
1466 UDF_SB(sb)->s_nls_map = uopt.nls_map; 1776 sbi->s_nls_map = uopt.nls_map;
1467 1777
1468 /* Set the block size for all transfers */ 1778 /* Set the block size for all transfers */
1469 if (!udf_set_blocksize(sb, uopt.blocksize)) 1779 if (!udf_set_blocksize(sb, uopt.blocksize))
1470 goto error_out; 1780 goto error_out;
1471 1781
1472 if (uopt.session == 0xFFFFFFFF) 1782 if (uopt.session == 0xFFFFFFFF)
1473 UDF_SB_SESSION(sb) = udf_get_last_session(sb); 1783 sbi->s_session = udf_get_last_session(sb);
1474 else 1784 else
1475 UDF_SB_SESSION(sb) = uopt.session; 1785 sbi->s_session = uopt.session;
1476 1786
1477 udf_debug("Multi-session=%d\n", UDF_SB_SESSION(sb)); 1787 udf_debug("Multi-session=%d\n", sbi->s_session);
1478 1788
1479 UDF_SB_LASTBLOCK(sb) = uopt.lastblock; 1789 sbi->s_last_block = uopt.lastblock;
1480 UDF_SB_ANCHOR(sb)[0] = UDF_SB_ANCHOR(sb)[1] = 0; 1790 sbi->s_anchor[0] = sbi->s_anchor[1] = 0;
1481 UDF_SB_ANCHOR(sb)[2] = uopt.anchor; 1791 sbi->s_anchor[2] = uopt.anchor;
1482 UDF_SB_ANCHOR(sb)[3] = 256; 1792 sbi->s_anchor[3] = 256;
1483 1793
1484 if (udf_check_valid(sb, uopt.novrs, silent)) { /* read volume recognition sequences */ 1794 if (udf_check_valid(sb, uopt.novrs, silent)) {
1485 printk("UDF-fs: No VRS found\n"); 1795 /* read volume recognition sequences */
1796 printk(KERN_WARNING "UDF-fs: No VRS found\n");
1486 goto error_out; 1797 goto error_out;
1487 } 1798 }
1488 1799
@@ -1496,27 +1807,30 @@ static int udf_fill_super(struct super_block *sb, void *options, int silent)
1496 sb->s_time_gran = 1000; 1807 sb->s_time_gran = 1000;
1497 1808
1498 if (udf_load_partition(sb, &fileset)) { 1809 if (udf_load_partition(sb, &fileset)) {
1499 printk("UDF-fs: No partition found (1)\n"); 1810 printk(KERN_WARNING "UDF-fs: No partition found (1)\n");
1500 goto error_out; 1811 goto error_out;
1501 } 1812 }
1502 1813
1503 udf_debug("Lastblock=%d\n", UDF_SB_LASTBLOCK(sb)); 1814 udf_debug("Lastblock=%d\n", sbi->s_last_block);
1504 1815
1505 if (UDF_SB_LVIDBH(sb)) { 1816 if (sbi->s_lvid_bh) {
1506 uint16_t minUDFReadRev = le16_to_cpu(UDF_SB_LVIDIU(sb)->minUDFReadRev); 1817 struct logicalVolIntegrityDescImpUse *lvidiu =
1507 uint16_t minUDFWriteRev = le16_to_cpu(UDF_SB_LVIDIU(sb)->minUDFWriteRev); 1818 udf_sb_lvidiu(sbi);
1508 /* uint16_t maxUDFWriteRev = le16_to_cpu(UDF_SB_LVIDIU(sb)->maxUDFWriteRev); */ 1819 uint16_t minUDFReadRev = le16_to_cpu(lvidiu->minUDFReadRev);
1820 uint16_t minUDFWriteRev = le16_to_cpu(lvidiu->minUDFWriteRev);
1821 /* uint16_t maxUDFWriteRev =
1822 le16_to_cpu(lvidiu->maxUDFWriteRev); */
1509 1823
1510 if (minUDFReadRev > UDF_MAX_READ_VERSION) { 1824 if (minUDFReadRev > UDF_MAX_READ_VERSION) {
1511 printk("UDF-fs: minUDFReadRev=%x (max is %x)\n", 1825 printk(KERN_ERR "UDF-fs: minUDFReadRev=%x "
1512 le16_to_cpu(UDF_SB_LVIDIU(sb)->minUDFReadRev), 1826 "(max is %x)\n",
1827 le16_to_cpu(lvidiu->minUDFReadRev),
1513 UDF_MAX_READ_VERSION); 1828 UDF_MAX_READ_VERSION);
1514 goto error_out; 1829 goto error_out;
1515 } else if (minUDFWriteRev > UDF_MAX_WRITE_VERSION) { 1830 } else if (minUDFWriteRev > UDF_MAX_WRITE_VERSION)
1516 sb->s_flags |= MS_RDONLY; 1831 sb->s_flags |= MS_RDONLY;
1517 }
1518 1832
1519 UDF_SB_UDFREV(sb) = minUDFWriteRev; 1833 sbi->s_udfrev = minUDFWriteRev;
1520 1834
1521 if (minUDFReadRev >= UDF_VERS_USE_EXTENDED_FE) 1835 if (minUDFReadRev >= UDF_VERS_USE_EXTENDED_FE)
1522 UDF_SET_FLAG(sb, UDF_FLAG_USE_EXTENDED_FE); 1836 UDF_SET_FLAG(sb, UDF_FLAG_USE_EXTENDED_FE);
@@ -1524,29 +1838,30 @@ static int udf_fill_super(struct super_block *sb, void *options, int silent)
1524 UDF_SET_FLAG(sb, UDF_FLAG_USE_STREAMS); 1838 UDF_SET_FLAG(sb, UDF_FLAG_USE_STREAMS);
1525 } 1839 }
1526 1840
1527 if (!UDF_SB_NUMPARTS(sb)) { 1841 if (!sbi->s_partitions) {
1528 printk("UDF-fs: No partition found (2)\n"); 1842 printk(KERN_WARNING "UDF-fs: No partition found (2)\n");
1529 goto error_out; 1843 goto error_out;
1530 } 1844 }
1531 1845
1532 if (UDF_SB_PARTFLAGS(sb, UDF_SB_PARTITION(sb)) & UDF_PART_FLAG_READ_ONLY) { 1846 if (sbi->s_partmaps[sbi->s_partition].s_partition_flags &
1533 printk("UDF-fs: Partition marked readonly; forcing readonly mount\n"); 1847 UDF_PART_FLAG_READ_ONLY) {
1848 printk(KERN_NOTICE "UDF-fs: Partition marked readonly; "
1849 "forcing readonly mount\n");
1534 sb->s_flags |= MS_RDONLY; 1850 sb->s_flags |= MS_RDONLY;
1535 } 1851 }
1536 1852
1537 if (udf_find_fileset(sb, &fileset, &rootdir)) { 1853 if (udf_find_fileset(sb, &fileset, &rootdir)) {
1538 printk("UDF-fs: No fileset found\n"); 1854 printk(KERN_WARNING "UDF-fs: No fileset found\n");
1539 goto error_out; 1855 goto error_out;
1540 } 1856 }
1541 1857
1542 if (!silent) { 1858 if (!silent) {
1543 kernel_timestamp ts; 1859 kernel_timestamp ts;
1544 udf_time_to_stamp(&ts, UDF_SB_RECORDTIME(sb)); 1860 udf_time_to_stamp(&ts, sbi->s_record_time);
1545 udf_info("UDF %s (%s) Mounting volume '%s', " 1861 udf_info("UDF: Mounting volume '%s', "
1546 "timestamp %04u/%02u/%02u %02u:%02u (%x)\n", 1862 "timestamp %04u/%02u/%02u %02u:%02u (%x)\n",
1547 UDFFS_VERSION, UDFFS_DATE, 1863 sbi->s_volume_ident, ts.year, ts.month, ts.day,
1548 UDF_SB_VOLIDENT(sb), ts.year, ts.month, ts.day, ts.hour, ts.minute, 1864 ts.hour, ts.minute, ts.typeAndTimezone);
1549 ts.typeAndTimezone);
1550 } 1865 }
1551 if (!(sb->s_flags & MS_RDONLY)) 1866 if (!(sb->s_flags & MS_RDONLY))
1552 udf_open_lvid(sb); 1867 udf_open_lvid(sb);
@@ -1556,7 +1871,8 @@ static int udf_fill_super(struct super_block *sb, void *options, int silent)
1556 /* perhaps it's not extensible enough, but for now ... */ 1871 /* perhaps it's not extensible enough, but for now ... */
1557 inode = udf_iget(sb, rootdir); 1872 inode = udf_iget(sb, rootdir);
1558 if (!inode) { 1873 if (!inode) {
1559 printk("UDF-fs: Error in udf_iget, block=%d, partition=%d\n", 1874 printk(KERN_ERR "UDF-fs: Error in udf_iget, block=%d, "
1875 "partition=%d\n",
1560 rootdir.logicalBlockNum, rootdir.partitionReferenceNum); 1876 rootdir.logicalBlockNum, rootdir.partitionReferenceNum);
1561 goto error_out; 1877 goto error_out;
1562 } 1878 }
@@ -1564,7 +1880,7 @@ static int udf_fill_super(struct super_block *sb, void *options, int silent)
1564 /* Allocate a dentry for the root inode */ 1880 /* Allocate a dentry for the root inode */
1565 sb->s_root = d_alloc_root(inode); 1881 sb->s_root = d_alloc_root(inode);
1566 if (!sb->s_root) { 1882 if (!sb->s_root) {
1567 printk("UDF-fs: Couldn't allocate root dentry\n"); 1883 printk(KERN_ERR "UDF-fs: Couldn't allocate root dentry\n");
1568 iput(inode); 1884 iput(inode);
1569 goto error_out; 1885 goto error_out;
1570 } 1886 }
@@ -1572,30 +1888,32 @@ static int udf_fill_super(struct super_block *sb, void *options, int silent)
1572 return 0; 1888 return 0;
1573 1889
1574error_out: 1890error_out:
1575 if (UDF_SB_VAT(sb)) 1891 if (sbi->s_vat_inode)
1576 iput(UDF_SB_VAT(sb)); 1892 iput(sbi->s_vat_inode);
1577 if (UDF_SB_NUMPARTS(sb)) { 1893 if (sbi->s_partitions) {
1578 if (UDF_SB_PARTFLAGS(sb, UDF_SB_PARTITION(sb)) & UDF_PART_FLAG_UNALLOC_TABLE) 1894 struct udf_part_map *map = &sbi->s_partmaps[sbi->s_partition];
1579 iput(UDF_SB_PARTMAPS(sb)[UDF_SB_PARTITION(sb)].s_uspace.s_table); 1895 if (map->s_partition_flags & UDF_PART_FLAG_UNALLOC_TABLE)
1580 if (UDF_SB_PARTFLAGS(sb, UDF_SB_PARTITION(sb)) & UDF_PART_FLAG_FREED_TABLE) 1896 iput(map->s_uspace.s_table);
1581 iput(UDF_SB_PARTMAPS(sb)[UDF_SB_PARTITION(sb)].s_fspace.s_table); 1897 if (map->s_partition_flags & UDF_PART_FLAG_FREED_TABLE)
1582 if (UDF_SB_PARTFLAGS(sb, UDF_SB_PARTITION(sb)) & UDF_PART_FLAG_UNALLOC_BITMAP) 1898 iput(map->s_fspace.s_table);
1583 UDF_SB_FREE_BITMAP(sb,UDF_SB_PARTITION(sb), s_uspace); 1899 if (map->s_partition_flags & UDF_PART_FLAG_UNALLOC_BITMAP)
1584 if (UDF_SB_PARTFLAGS(sb, UDF_SB_PARTITION(sb)) & UDF_PART_FLAG_FREED_BITMAP) 1900 udf_sb_free_bitmap(map->s_uspace.s_bitmap);
1585 UDF_SB_FREE_BITMAP(sb,UDF_SB_PARTITION(sb), s_fspace); 1901 if (map->s_partition_flags & UDF_PART_FLAG_FREED_BITMAP)
1586 if (UDF_SB_PARTTYPE(sb, UDF_SB_PARTITION(sb)) == UDF_SPARABLE_MAP15) { 1902 udf_sb_free_bitmap(map->s_fspace.s_bitmap);
1903 if (map->s_partition_type == UDF_SPARABLE_MAP15)
1587 for (i = 0; i < 4; i++) 1904 for (i = 0; i < 4; i++)
1588 brelse(UDF_SB_TYPESPAR(sb, UDF_SB_PARTITION(sb)).s_spar_map[i]); 1905 brelse(map->s_type_specific.s_sparing.
1589 } 1906 s_spar_map[i]);
1590 } 1907 }
1591#ifdef CONFIG_UDF_NLS 1908#ifdef CONFIG_UDF_NLS
1592 if (UDF_QUERY_FLAG(sb, UDF_FLAG_NLS_MAP)) 1909 if (UDF_QUERY_FLAG(sb, UDF_FLAG_NLS_MAP))
1593 unload_nls(UDF_SB(sb)->s_nls_map); 1910 unload_nls(sbi->s_nls_map);
1594#endif 1911#endif
1595 if (!(sb->s_flags & MS_RDONLY)) 1912 if (!(sb->s_flags & MS_RDONLY))
1596 udf_close_lvid(sb); 1913 udf_close_lvid(sb);
1597 brelse(UDF_SB_LVIDBH(sb)); 1914 brelse(sbi->s_lvid_bh);
1598 UDF_SB_FREE(sb); 1915
1916 kfree(sbi->s_partmaps);
1599 kfree(sbi); 1917 kfree(sbi);
1600 sb->s_fs_info = NULL; 1918 sb->s_fs_info = NULL;
1601 1919
@@ -1614,7 +1932,7 @@ void udf_error(struct super_block *sb, const char *function,
1614 va_start(args, fmt); 1932 va_start(args, fmt);
1615 vsnprintf(error_buf, sizeof(error_buf), fmt, args); 1933 vsnprintf(error_buf, sizeof(error_buf), fmt, args);
1616 va_end(args); 1934 va_end(args);
1617 printk (KERN_CRIT "UDF-fs error (device %s): %s: %s\n", 1935 printk(KERN_CRIT "UDF-fs error (device %s): %s: %s\n",
1618 sb->s_id, function, error_buf); 1936 sb->s_id, function, error_buf);
1619} 1937}
1620 1938
@@ -1646,31 +1964,34 @@ void udf_warning(struct super_block *sb, const char *function,
1646static void udf_put_super(struct super_block *sb) 1964static void udf_put_super(struct super_block *sb)
1647{ 1965{
1648 int i; 1966 int i;
1967 struct udf_sb_info *sbi;
1649 1968
1650 if (UDF_SB_VAT(sb)) 1969 sbi = UDF_SB(sb);
1651 iput(UDF_SB_VAT(sb)); 1970 if (sbi->s_vat_inode)
1652 if (UDF_SB_NUMPARTS(sb)) { 1971 iput(sbi->s_vat_inode);
1653 if (UDF_SB_PARTFLAGS(sb, UDF_SB_PARTITION(sb)) & UDF_PART_FLAG_UNALLOC_TABLE) 1972 if (sbi->s_partitions) {
1654 iput(UDF_SB_PARTMAPS(sb)[UDF_SB_PARTITION(sb)].s_uspace.s_table); 1973 struct udf_part_map *map = &sbi->s_partmaps[sbi->s_partition];
1655 if (UDF_SB_PARTFLAGS(sb, UDF_SB_PARTITION(sb)) & UDF_PART_FLAG_FREED_TABLE) 1974 if (map->s_partition_flags & UDF_PART_FLAG_UNALLOC_TABLE)
1656 iput(UDF_SB_PARTMAPS(sb)[UDF_SB_PARTITION(sb)].s_fspace.s_table); 1975 iput(map->s_uspace.s_table);
1657 if (UDF_SB_PARTFLAGS(sb, UDF_SB_PARTITION(sb)) & UDF_PART_FLAG_UNALLOC_BITMAP) 1976 if (map->s_partition_flags & UDF_PART_FLAG_FREED_TABLE)
1658 UDF_SB_FREE_BITMAP(sb,UDF_SB_PARTITION(sb), s_uspace); 1977 iput(map->s_fspace.s_table);
1659 if (UDF_SB_PARTFLAGS(sb, UDF_SB_PARTITION(sb)) & UDF_PART_FLAG_FREED_BITMAP) 1978 if (map->s_partition_flags & UDF_PART_FLAG_UNALLOC_BITMAP)
1660 UDF_SB_FREE_BITMAP(sb,UDF_SB_PARTITION(sb), s_fspace); 1979 udf_sb_free_bitmap(map->s_uspace.s_bitmap);
1661 if (UDF_SB_PARTTYPE(sb, UDF_SB_PARTITION(sb)) == UDF_SPARABLE_MAP15) { 1980 if (map->s_partition_flags & UDF_PART_FLAG_FREED_BITMAP)
1981 udf_sb_free_bitmap(map->s_fspace.s_bitmap);
1982 if (map->s_partition_type == UDF_SPARABLE_MAP15)
1662 for (i = 0; i < 4; i++) 1983 for (i = 0; i < 4; i++)
1663 brelse(UDF_SB_TYPESPAR(sb, UDF_SB_PARTITION(sb)).s_spar_map[i]); 1984 brelse(map->s_type_specific.s_sparing.
1664 } 1985 s_spar_map[i]);
1665 } 1986 }
1666#ifdef CONFIG_UDF_NLS 1987#ifdef CONFIG_UDF_NLS
1667 if (UDF_QUERY_FLAG(sb, UDF_FLAG_NLS_MAP)) 1988 if (UDF_QUERY_FLAG(sb, UDF_FLAG_NLS_MAP))
1668 unload_nls(UDF_SB(sb)->s_nls_map); 1989 unload_nls(sbi->s_nls_map);
1669#endif 1990#endif
1670 if (!(sb->s_flags & MS_RDONLY)) 1991 if (!(sb->s_flags & MS_RDONLY))
1671 udf_close_lvid(sb); 1992 udf_close_lvid(sb);
1672 brelse(UDF_SB_LVIDBH(sb)); 1993 brelse(sbi->s_lvid_bh);
1673 UDF_SB_FREE(sb); 1994 kfree(sbi->s_partmaps);
1674 kfree(sb->s_fs_info); 1995 kfree(sb->s_fs_info);
1675 sb->s_fs_info = NULL; 1996 sb->s_fs_info = NULL;
1676} 1997}
@@ -1691,15 +2012,22 @@ static void udf_put_super(struct super_block *sb)
1691static int udf_statfs(struct dentry *dentry, struct kstatfs *buf) 2012static int udf_statfs(struct dentry *dentry, struct kstatfs *buf)
1692{ 2013{
1693 struct super_block *sb = dentry->d_sb; 2014 struct super_block *sb = dentry->d_sb;
2015 struct udf_sb_info *sbi = UDF_SB(sb);
2016 struct logicalVolIntegrityDescImpUse *lvidiu;
2017
2018 if (sbi->s_lvid_bh != NULL)
2019 lvidiu = udf_sb_lvidiu(sbi);
2020 else
2021 lvidiu = NULL;
1694 2022
1695 buf->f_type = UDF_SUPER_MAGIC; 2023 buf->f_type = UDF_SUPER_MAGIC;
1696 buf->f_bsize = sb->s_blocksize; 2024 buf->f_bsize = sb->s_blocksize;
1697 buf->f_blocks = UDF_SB_PARTLEN(sb, UDF_SB_PARTITION(sb)); 2025 buf->f_blocks = sbi->s_partmaps[sbi->s_partition].s_partition_len;
1698 buf->f_bfree = udf_count_free(sb); 2026 buf->f_bfree = udf_count_free(sb);
1699 buf->f_bavail = buf->f_bfree; 2027 buf->f_bavail = buf->f_bfree;
1700 buf->f_files = (UDF_SB_LVIDBH(sb) ? 2028 buf->f_files = (lvidiu != NULL ? (le32_to_cpu(lvidiu->numFiles) +
1701 (le32_to_cpu(UDF_SB_LVIDIU(sb)->numFiles) + 2029 le32_to_cpu(lvidiu->numDirs)) : 0)
1702 le32_to_cpu(UDF_SB_LVIDIU(sb)->numDirs)) : 0) + buf->f_bfree; 2030 + buf->f_bfree;
1703 buf->f_ffree = buf->f_bfree; 2031 buf->f_ffree = buf->f_bfree;
1704 /* __kernel_fsid_t f_fsid */ 2032 /* __kernel_fsid_t f_fsid */
1705 buf->f_namelen = UDF_NAME_LEN - 2; 2033 buf->f_namelen = UDF_NAME_LEN - 2;
@@ -1711,7 +2039,8 @@ static unsigned char udf_bitmap_lookup[16] = {
1711 0, 1, 1, 2, 1, 2, 2, 3, 1, 2, 2, 3, 2, 3, 3, 4 2039 0, 1, 1, 2, 1, 2, 2, 3, 1, 2, 2, 3, 2, 3, 3, 4
1712}; 2040};
1713 2041
1714static unsigned int udf_count_free_bitmap(struct super_block *sb, struct udf_bitmap *bitmap) 2042static unsigned int udf_count_free_bitmap(struct super_block *sb,
2043 struct udf_bitmap *bitmap)
1715{ 2044{
1716 struct buffer_head *bh = NULL; 2045 struct buffer_head *bh = NULL;
1717 unsigned int accum = 0; 2046 unsigned int accum = 0;
@@ -1727,7 +2056,7 @@ static unsigned int udf_count_free_bitmap(struct super_block *sb, struct udf_bit
1727 lock_kernel(); 2056 lock_kernel();
1728 2057
1729 loc.logicalBlockNum = bitmap->s_extPosition; 2058 loc.logicalBlockNum = bitmap->s_extPosition;
1730 loc.partitionReferenceNum = UDF_SB_PARTITION(sb); 2059 loc.partitionReferenceNum = UDF_SB(sb)->s_partition;
1731 bh = udf_read_ptagged(sb, loc, 0, &ident); 2060 bh = udf_read_ptagged(sb, loc, 0, &ident);
1732 2061
1733 if (!bh) { 2062 if (!bh) {
@@ -1772,7 +2101,8 @@ out:
1772 return accum; 2101 return accum;
1773} 2102}
1774 2103
1775static unsigned int udf_count_free_table(struct super_block *sb, struct inode *table) 2104static unsigned int udf_count_free_table(struct super_block *sb,
2105 struct inode *table)
1776{ 2106{
1777 unsigned int accum = 0; 2107 unsigned int accum = 0;
1778 uint32_t elen; 2108 uint32_t elen;
@@ -1782,13 +2112,13 @@ static unsigned int udf_count_free_table(struct super_block *sb, struct inode *t
1782 2112
1783 lock_kernel(); 2113 lock_kernel();
1784 2114
1785 epos.block = UDF_I_LOCATION(table); 2115 epos.block = UDF_I(table)->i_location;
1786 epos.offset = sizeof(struct unallocSpaceEntry); 2116 epos.offset = sizeof(struct unallocSpaceEntry);
1787 epos.bh = NULL; 2117 epos.bh = NULL;
1788 2118
1789 while ((etype = udf_next_aext(table, &epos, &eloc, &elen, 1)) != -1) { 2119 while ((etype = udf_next_aext(table, &epos, &eloc, &elen, 1)) != -1)
1790 accum += (elen >> table->i_sb->s_blocksize_bits); 2120 accum += (elen >> table->i_sb->s_blocksize_bits);
1791 } 2121
1792 brelse(epos.bh); 2122 brelse(epos.bh);
1793 2123
1794 unlock_kernel(); 2124 unlock_kernel();
@@ -1799,10 +2129,17 @@ static unsigned int udf_count_free_table(struct super_block *sb, struct inode *t
1799static unsigned int udf_count_free(struct super_block *sb) 2129static unsigned int udf_count_free(struct super_block *sb)
1800{ 2130{
1801 unsigned int accum = 0; 2131 unsigned int accum = 0;
1802 2132 struct udf_sb_info *sbi;
1803 if (UDF_SB_LVIDBH(sb)) { 2133 struct udf_part_map *map;
1804 if (le32_to_cpu(UDF_SB_LVID(sb)->numOfPartitions) > UDF_SB_PARTITION(sb)) { 2134
1805 accum = le32_to_cpu(UDF_SB_LVID(sb)->freeSpaceTable[UDF_SB_PARTITION(sb)]); 2135 sbi = UDF_SB(sb);
2136 if (sbi->s_lvid_bh) {
2137 struct logicalVolIntegrityDesc *lvid =
2138 (struct logicalVolIntegrityDesc *)
2139 sbi->s_lvid_bh->b_data;
2140 if (le32_to_cpu(lvid->numOfPartitions) > sbi->s_partition) {
2141 accum = le32_to_cpu(
2142 lvid->freeSpaceTable[sbi->s_partition]);
1806 if (accum == 0xFFFFFFFF) 2143 if (accum == 0xFFFFFFFF)
1807 accum = 0; 2144 accum = 0;
1808 } 2145 }
@@ -1811,24 +2148,25 @@ static unsigned int udf_count_free(struct super_block *sb)
1811 if (accum) 2148 if (accum)
1812 return accum; 2149 return accum;
1813 2150
1814 if (UDF_SB_PARTFLAGS(sb,UDF_SB_PARTITION(sb)) & UDF_PART_FLAG_UNALLOC_BITMAP) { 2151 map = &sbi->s_partmaps[sbi->s_partition];
2152 if (map->s_partition_flags & UDF_PART_FLAG_UNALLOC_BITMAP) {
1815 accum += udf_count_free_bitmap(sb, 2153 accum += udf_count_free_bitmap(sb,
1816 UDF_SB_PARTMAPS(sb)[UDF_SB_PARTITION(sb)].s_uspace.s_bitmap); 2154 map->s_uspace.s_bitmap);
1817 } 2155 }
1818 if (UDF_SB_PARTFLAGS(sb,UDF_SB_PARTITION(sb)) & UDF_PART_FLAG_FREED_BITMAP) { 2156 if (map->s_partition_flags & UDF_PART_FLAG_FREED_BITMAP) {
1819 accum += udf_count_free_bitmap(sb, 2157 accum += udf_count_free_bitmap(sb,
1820 UDF_SB_PARTMAPS(sb)[UDF_SB_PARTITION(sb)].s_fspace.s_bitmap); 2158 map->s_fspace.s_bitmap);
1821 } 2159 }
1822 if (accum) 2160 if (accum)
1823 return accum; 2161 return accum;
1824 2162
1825 if (UDF_SB_PARTFLAGS(sb,UDF_SB_PARTITION(sb)) & UDF_PART_FLAG_UNALLOC_TABLE) { 2163 if (map->s_partition_flags & UDF_PART_FLAG_UNALLOC_TABLE) {
1826 accum += udf_count_free_table(sb, 2164 accum += udf_count_free_table(sb,
1827 UDF_SB_PARTMAPS(sb)[UDF_SB_PARTITION(sb)].s_uspace.s_table); 2165 map->s_uspace.s_table);
1828 } 2166 }
1829 if (UDF_SB_PARTFLAGS(sb,UDF_SB_PARTITION(sb)) & UDF_PART_FLAG_FREED_TABLE) { 2167 if (map->s_partition_flags & UDF_PART_FLAG_FREED_TABLE) {
1830 accum += udf_count_free_table(sb, 2168 accum += udf_count_free_table(sb,
1831 UDF_SB_PARTMAPS(sb)[UDF_SB_PARTITION(sb)].s_fspace.s_table); 2169 map->s_fspace.s_table);
1832 } 2170 }
1833 2171
1834 return accum; 2172 return accum;
diff --git a/fs/udf/symlink.c b/fs/udf/symlink.c
index e6f933dd6a7b..6ec99221e50c 100644
--- a/fs/udf/symlink.c
+++ b/fs/udf/symlink.c
@@ -33,7 +33,8 @@
33#include <linux/buffer_head.h> 33#include <linux/buffer_head.h>
34#include "udf_i.h" 34#include "udf_i.h"
35 35
36static void udf_pc_to_char(struct super_block *sb, char *from, int fromlen, char *to) 36static void udf_pc_to_char(struct super_block *sb, char *from, int fromlen,
37 char *to)
37{ 38{
38 struct pathComponent *pc; 39 struct pathComponent *pc;
39 int elen = 0; 40 int elen = 0;
@@ -78,10 +79,12 @@ static int udf_symlink_filler(struct file *file, struct page *page)
78 char *symlink; 79 char *symlink;
79 int err = -EIO; 80 int err = -EIO;
80 char *p = kmap(page); 81 char *p = kmap(page);
82 struct udf_inode_info *iinfo;
81 83
82 lock_kernel(); 84 lock_kernel();
83 if (UDF_I_ALLOCTYPE(inode) == ICBTAG_FLAG_AD_IN_ICB) { 85 iinfo = UDF_I(inode);
84 symlink = UDF_I_DATA(inode) + UDF_I_LENEATTR(inode); 86 if (iinfo->i_alloc_type == ICBTAG_FLAG_AD_IN_ICB) {
87 symlink = iinfo->i_ext.i_data + iinfo->i_lenEAttr;
85 } else { 88 } else {
86 bh = sb_bread(inode->i_sb, udf_block_map(inode, 0)); 89 bh = sb_bread(inode->i_sb, udf_block_map(inode, 0));
87 90
diff --git a/fs/udf/truncate.c b/fs/udf/truncate.c
index 7fc3912885a5..fe61be17cdab 100644
--- a/fs/udf/truncate.c
+++ b/fs/udf/truncate.c
@@ -74,17 +74,18 @@ void udf_truncate_tail_extent(struct inode *inode)
74 uint64_t lbcount = 0; 74 uint64_t lbcount = 0;
75 int8_t etype = -1, netype; 75 int8_t etype = -1, netype;
76 int adsize; 76 int adsize;
77 struct udf_inode_info *iinfo = UDF_I(inode);
77 78
78 if (UDF_I_ALLOCTYPE(inode) == ICBTAG_FLAG_AD_IN_ICB || 79 if (iinfo->i_alloc_type == ICBTAG_FLAG_AD_IN_ICB ||
79 inode->i_size == UDF_I_LENEXTENTS(inode)) 80 inode->i_size == iinfo->i_lenExtents)
80 return; 81 return;
81 /* Are we going to delete the file anyway? */ 82 /* Are we going to delete the file anyway? */
82 if (inode->i_nlink == 0) 83 if (inode->i_nlink == 0)
83 return; 84 return;
84 85
85 if (UDF_I_ALLOCTYPE(inode) == ICBTAG_FLAG_AD_SHORT) 86 if (iinfo->i_alloc_type == ICBTAG_FLAG_AD_SHORT)
86 adsize = sizeof(short_ad); 87 adsize = sizeof(short_ad);
87 else if (UDF_I_ALLOCTYPE(inode) == ICBTAG_FLAG_AD_LONG) 88 else if (iinfo->i_alloc_type == ICBTAG_FLAG_AD_LONG)
88 adsize = sizeof(long_ad); 89 adsize = sizeof(long_ad);
89 else 90 else
90 BUG(); 91 BUG();
@@ -117,7 +118,7 @@ void udf_truncate_tail_extent(struct inode *inode)
117 } 118 }
118 /* This inode entry is in-memory only and thus we don't have to mark 119 /* This inode entry is in-memory only and thus we don't have to mark
119 * the inode dirty */ 120 * the inode dirty */
120 UDF_I_LENEXTENTS(inode) = inode->i_size; 121 iinfo->i_lenExtents = inode->i_size;
121 brelse(epos.bh); 122 brelse(epos.bh);
122} 123}
123 124
@@ -129,19 +130,20 @@ void udf_discard_prealloc(struct inode *inode)
129 uint64_t lbcount = 0; 130 uint64_t lbcount = 0;
130 int8_t etype = -1, netype; 131 int8_t etype = -1, netype;
131 int adsize; 132 int adsize;
133 struct udf_inode_info *iinfo = UDF_I(inode);
132 134
133 if (UDF_I_ALLOCTYPE(inode) == ICBTAG_FLAG_AD_IN_ICB || 135 if (iinfo->i_alloc_type == ICBTAG_FLAG_AD_IN_ICB ||
134 inode->i_size == UDF_I_LENEXTENTS(inode)) 136 inode->i_size == iinfo->i_lenExtents)
135 return; 137 return;
136 138
137 if (UDF_I_ALLOCTYPE(inode) == ICBTAG_FLAG_AD_SHORT) 139 if (iinfo->i_alloc_type == ICBTAG_FLAG_AD_SHORT)
138 adsize = sizeof(short_ad); 140 adsize = sizeof(short_ad);
139 else if (UDF_I_ALLOCTYPE(inode) == ICBTAG_FLAG_AD_LONG) 141 else if (iinfo->i_alloc_type == ICBTAG_FLAG_AD_LONG)
140 adsize = sizeof(long_ad); 142 adsize = sizeof(long_ad);
141 else 143 else
142 adsize = 0; 144 adsize = 0;
143 145
144 epos.block = UDF_I_LOCATION(inode); 146 epos.block = iinfo->i_location;
145 147
146 /* Find the last extent in the file */ 148 /* Find the last extent in the file */
147 while ((netype = udf_next_aext(inode, &epos, &eloc, &elen, 1)) != -1) { 149 while ((netype = udf_next_aext(inode, &epos, &eloc, &elen, 1)) != -1) {
@@ -153,8 +155,9 @@ void udf_discard_prealloc(struct inode *inode)
153 lbcount -= elen; 155 lbcount -= elen;
154 extent_trunc(inode, &epos, eloc, etype, elen, 0); 156 extent_trunc(inode, &epos, eloc, etype, elen, 0);
155 if (!epos.bh) { 157 if (!epos.bh) {
156 UDF_I_LENALLOC(inode) = 158 iinfo->i_lenAlloc =
157 epos.offset - udf_file_entry_alloc_offset(inode); 159 epos.offset -
160 udf_file_entry_alloc_offset(inode);
158 mark_inode_dirty(inode); 161 mark_inode_dirty(inode);
159 } else { 162 } else {
160 struct allocExtDesc *aed = 163 struct allocExtDesc *aed =
@@ -163,7 +166,7 @@ void udf_discard_prealloc(struct inode *inode)
163 cpu_to_le32(epos.offset - 166 cpu_to_le32(epos.offset -
164 sizeof(struct allocExtDesc)); 167 sizeof(struct allocExtDesc));
165 if (!UDF_QUERY_FLAG(inode->i_sb, UDF_FLAG_STRICT) || 168 if (!UDF_QUERY_FLAG(inode->i_sb, UDF_FLAG_STRICT) ||
166 UDF_SB_UDFREV(inode->i_sb) >= 0x0201) 169 UDF_SB(inode->i_sb)->s_udfrev >= 0x0201)
167 udf_update_tag(epos.bh->b_data, epos.offset); 170 udf_update_tag(epos.bh->b_data, epos.offset);
168 else 171 else
169 udf_update_tag(epos.bh->b_data, 172 udf_update_tag(epos.bh->b_data,
@@ -173,7 +176,7 @@ void udf_discard_prealloc(struct inode *inode)
173 } 176 }
174 /* This inode entry is in-memory only and thus we don't have to mark 177 /* This inode entry is in-memory only and thus we don't have to mark
175 * the inode dirty */ 178 * the inode dirty */
176 UDF_I_LENEXTENTS(inode) = lbcount; 179 iinfo->i_lenExtents = lbcount;
177 brelse(epos.bh); 180 brelse(epos.bh);
178} 181}
179 182
@@ -184,13 +187,15 @@ void udf_truncate_extents(struct inode *inode)
184 uint32_t elen, nelen = 0, indirect_ext_len = 0, lenalloc; 187 uint32_t elen, nelen = 0, indirect_ext_len = 0, lenalloc;
185 int8_t etype; 188 int8_t etype;
186 struct super_block *sb = inode->i_sb; 189 struct super_block *sb = inode->i_sb;
190 struct udf_sb_info *sbi = UDF_SB(sb);
187 sector_t first_block = inode->i_size >> sb->s_blocksize_bits, offset; 191 sector_t first_block = inode->i_size >> sb->s_blocksize_bits, offset;
188 loff_t byte_offset; 192 loff_t byte_offset;
189 int adsize; 193 int adsize;
194 struct udf_inode_info *iinfo = UDF_I(inode);
190 195
191 if (UDF_I_ALLOCTYPE(inode) == ICBTAG_FLAG_AD_SHORT) 196 if (iinfo->i_alloc_type == ICBTAG_FLAG_AD_SHORT)
192 adsize = sizeof(short_ad); 197 adsize = sizeof(short_ad);
193 else if (UDF_I_ALLOCTYPE(inode) == ICBTAG_FLAG_AD_LONG) 198 else if (iinfo->i_alloc_type == ICBTAG_FLAG_AD_LONG)
194 adsize = sizeof(long_ad); 199 adsize = sizeof(long_ad);
195 else 200 else
196 BUG(); 201 BUG();
@@ -212,7 +217,8 @@ void udf_truncate_extents(struct inode *inode)
212 else 217 else
213 lenalloc -= sizeof(struct allocExtDesc); 218 lenalloc -= sizeof(struct allocExtDesc);
214 219
215 while ((etype = udf_current_aext(inode, &epos, &eloc, &elen, 0)) != -1) { 220 while ((etype = udf_current_aext(inode, &epos, &eloc,
221 &elen, 0)) != -1) {
216 if (etype == (EXT_NEXT_EXTENT_ALLOCDECS >> 30)) { 222 if (etype == (EXT_NEXT_EXTENT_ALLOCDECS >> 30)) {
217 udf_write_aext(inode, &epos, neloc, nelen, 0); 223 udf_write_aext(inode, &epos, neloc, nelen, 0);
218 if (indirect_ext_len) { 224 if (indirect_ext_len) {
@@ -224,35 +230,43 @@ void udf_truncate_extents(struct inode *inode)
224 0, indirect_ext_len); 230 0, indirect_ext_len);
225 } else { 231 } else {
226 if (!epos.bh) { 232 if (!epos.bh) {
227 UDF_I_LENALLOC(inode) = lenalloc; 233 iinfo->i_lenAlloc =
234 lenalloc;
228 mark_inode_dirty(inode); 235 mark_inode_dirty(inode);
229 } else { 236 } else {
230 struct allocExtDesc *aed = 237 struct allocExtDesc *aed =
231 (struct allocExtDesc *)(epos.bh->b_data); 238 (struct allocExtDesc *)
239 (epos.bh->b_data);
240 int len =
241 sizeof(struct allocExtDesc);
242
232 aed->lengthAllocDescs = 243 aed->lengthAllocDescs =
233 cpu_to_le32(lenalloc); 244 cpu_to_le32(lenalloc);
234 if (!UDF_QUERY_FLAG(sb, UDF_FLAG_STRICT) || 245 if (!UDF_QUERY_FLAG(sb,
235 UDF_SB_UDFREV(sb) >= 0x0201) 246 UDF_FLAG_STRICT) ||
236 udf_update_tag(epos.bh->b_data, 247 sbi->s_udfrev >= 0x0201)
237 lenalloc + 248 len += lenalloc;
238 sizeof(struct allocExtDesc)); 249
239 else 250 udf_update_tag(epos.bh->b_data,
240 udf_update_tag(epos.bh->b_data, 251 len);
241 sizeof(struct allocExtDesc)); 252 mark_buffer_dirty_inode(
242 mark_buffer_dirty_inode(epos.bh, inode); 253 epos.bh, inode);
243 } 254 }
244 } 255 }
245 brelse(epos.bh); 256 brelse(epos.bh);
246 epos.offset = sizeof(struct allocExtDesc); 257 epos.offset = sizeof(struct allocExtDesc);
247 epos.block = eloc; 258 epos.block = eloc;
248 epos.bh = udf_tread(sb, udf_get_lb_pblock(sb, eloc, 0)); 259 epos.bh = udf_tread(sb,
260 udf_get_lb_pblock(sb, eloc, 0));
249 if (elen) 261 if (elen)
250 indirect_ext_len = (elen + sb->s_blocksize -1) >> 262 indirect_ext_len =
263 (elen + sb->s_blocksize - 1) >>
251 sb->s_blocksize_bits; 264 sb->s_blocksize_bits;
252 else 265 else
253 indirect_ext_len = 1; 266 indirect_ext_len = 1;
254 } else { 267 } else {
255 extent_trunc(inode, &epos, eloc, etype, elen, 0); 268 extent_trunc(inode, &epos, eloc, etype,
269 elen, 0);
256 epos.offset += adsize; 270 epos.offset += adsize;
257 } 271 }
258 } 272 }
@@ -264,19 +278,20 @@ void udf_truncate_extents(struct inode *inode)
264 indirect_ext_len); 278 indirect_ext_len);
265 } else { 279 } else {
266 if (!epos.bh) { 280 if (!epos.bh) {
267 UDF_I_LENALLOC(inode) = lenalloc; 281 iinfo->i_lenAlloc = lenalloc;
268 mark_inode_dirty(inode); 282 mark_inode_dirty(inode);
269 } else { 283 } else {
270 struct allocExtDesc *aed = 284 struct allocExtDesc *aed =
271 (struct allocExtDesc *)(epos.bh->b_data); 285 (struct allocExtDesc *)(epos.bh->b_data);
272 aed->lengthAllocDescs = cpu_to_le32(lenalloc); 286 aed->lengthAllocDescs = cpu_to_le32(lenalloc);
273 if (!UDF_QUERY_FLAG(sb, UDF_FLAG_STRICT) || 287 if (!UDF_QUERY_FLAG(sb, UDF_FLAG_STRICT) ||
274 UDF_SB_UDFREV(sb) >= 0x0201) 288 sbi->s_udfrev >= 0x0201)
275 udf_update_tag(epos.bh->b_data, 289 udf_update_tag(epos.bh->b_data,
276 lenalloc + sizeof(struct allocExtDesc)); 290 lenalloc +
291 sizeof(struct allocExtDesc));
277 else 292 else
278 udf_update_tag(epos.bh->b_data, 293 udf_update_tag(epos.bh->b_data,
279 sizeof(struct allocExtDesc)); 294 sizeof(struct allocExtDesc));
280 mark_buffer_dirty_inode(epos.bh, inode); 295 mark_buffer_dirty_inode(epos.bh, inode);
281 } 296 }
282 } 297 }
@@ -290,13 +305,16 @@ void udf_truncate_extents(struct inode *inode)
290 * extending the file by 'offset' blocks. 305 * extending the file by 'offset' blocks.
291 */ 306 */
292 if ((!epos.bh && 307 if ((!epos.bh &&
293 epos.offset == udf_file_entry_alloc_offset(inode)) || 308 epos.offset ==
294 (epos.bh && epos.offset == sizeof(struct allocExtDesc))) { 309 udf_file_entry_alloc_offset(inode)) ||
310 (epos.bh && epos.offset ==
311 sizeof(struct allocExtDesc))) {
295 /* File has no extents at all or has empty last 312 /* File has no extents at all or has empty last
296 * indirect extent! Create a fake extent... */ 313 * indirect extent! Create a fake extent... */
297 extent.extLocation.logicalBlockNum = 0; 314 extent.extLocation.logicalBlockNum = 0;
298 extent.extLocation.partitionReferenceNum = 0; 315 extent.extLocation.partitionReferenceNum = 0;
299 extent.extLength = EXT_NOT_RECORDED_NOT_ALLOCATED; 316 extent.extLength =
317 EXT_NOT_RECORDED_NOT_ALLOCATED;
300 } else { 318 } else {
301 epos.offset -= adsize; 319 epos.offset -= adsize;
302 etype = udf_next_aext(inode, &epos, 320 etype = udf_next_aext(inode, &epos,
@@ -305,10 +323,12 @@ void udf_truncate_extents(struct inode *inode)
305 extent.extLength |= etype << 30; 323 extent.extLength |= etype << 30;
306 } 324 }
307 udf_extend_file(inode, &epos, &extent, 325 udf_extend_file(inode, &epos, &extent,
308 offset + ((inode->i_size & (sb->s_blocksize - 1)) != 0)); 326 offset +
327 ((inode->i_size &
328 (sb->s_blocksize - 1)) != 0));
309 } 329 }
310 } 330 }
311 UDF_I_LENEXTENTS(inode) = inode->i_size; 331 iinfo->i_lenExtents = inode->i_size;
312 332
313 brelse(epos.bh); 333 brelse(epos.bh);
314} 334}
diff --git a/fs/udf/udf_i.h b/fs/udf/udf_i.h
index d7dbe6f3ba0c..ccc52f16bf7d 100644
--- a/fs/udf/udf_i.h
+++ b/fs/udf/udf_i.h
@@ -7,20 +7,4 @@ static inline struct udf_inode_info *UDF_I(struct inode *inode)
7 return list_entry(inode, struct udf_inode_info, vfs_inode); 7 return list_entry(inode, struct udf_inode_info, vfs_inode);
8} 8}
9 9
10#define UDF_I_LOCATION(X) ( UDF_I(X)->i_location )
11#define UDF_I_LENEATTR(X) ( UDF_I(X)->i_lenEAttr )
12#define UDF_I_LENALLOC(X) ( UDF_I(X)->i_lenAlloc )
13#define UDF_I_LENEXTENTS(X) ( UDF_I(X)->i_lenExtents )
14#define UDF_I_UNIQUE(X) ( UDF_I(X)->i_unique )
15#define UDF_I_ALLOCTYPE(X) ( UDF_I(X)->i_alloc_type )
16#define UDF_I_EFE(X) ( UDF_I(X)->i_efe )
17#define UDF_I_USE(X) ( UDF_I(X)->i_use )
18#define UDF_I_STRAT4096(X) ( UDF_I(X)->i_strat4096 )
19#define UDF_I_NEXT_ALLOC_BLOCK(X) ( UDF_I(X)->i_next_alloc_block )
20#define UDF_I_NEXT_ALLOC_GOAL(X) ( UDF_I(X)->i_next_alloc_goal )
21#define UDF_I_CRTIME(X) ( UDF_I(X)->i_crtime )
22#define UDF_I_SAD(X) ( UDF_I(X)->i_ext.i_sad )
23#define UDF_I_LAD(X) ( UDF_I(X)->i_ext.i_lad )
24#define UDF_I_DATA(X) ( UDF_I(X)->i_ext.i_data )
25
26#endif /* !defined(_LINUX_UDF_I_H) */ 10#endif /* !defined(_LINUX_UDF_I_H) */
diff --git a/fs/udf/udf_sb.h b/fs/udf/udf_sb.h
index 3c2982017c6d..737d1c604eea 100644
--- a/fs/udf/udf_sb.h
+++ b/fs/udf/udf_sb.h
@@ -26,6 +26,8 @@
26#define UDF_FLAG_GID_IGNORE 14 26#define UDF_FLAG_GID_IGNORE 14
27#define UDF_FLAG_UID_SET 15 27#define UDF_FLAG_UID_SET 15
28#define UDF_FLAG_GID_SET 16 28#define UDF_FLAG_GID_SET 16
29#define UDF_FLAG_SESSION_SET 17
30#define UDF_FLAG_LASTBLOCK_SET 18
29 31
30#define UDF_PART_FLAG_UNALLOC_BITMAP 0x0001 32#define UDF_PART_FLAG_UNALLOC_BITMAP 0x0001
31#define UDF_PART_FLAG_UNALLOC_TABLE 0x0002 33#define UDF_PART_FLAG_UNALLOC_TABLE 0x0002
@@ -41,96 +43,12 @@ static inline struct udf_sb_info *UDF_SB(struct super_block *sb)
41 return sb->s_fs_info; 43 return sb->s_fs_info;
42} 44}
43 45
44#define UDF_SB_FREE(X)\ 46struct logicalVolIntegrityDescImpUse *udf_sb_lvidiu(struct udf_sb_info *sbi);
45{\
46 if (UDF_SB(X)) {\
47 kfree(UDF_SB_PARTMAPS(X));\
48 UDF_SB_PARTMAPS(X) = NULL;\
49 }\
50}
51
52#define UDF_SB_ALLOC_PARTMAPS(X,Y)\
53{\
54 UDF_SB_PARTMAPS(X) = kmalloc(sizeof(struct udf_part_map) * Y, GFP_KERNEL);\
55 if (UDF_SB_PARTMAPS(X) != NULL) {\
56 UDF_SB_NUMPARTS(X) = Y;\
57 memset(UDF_SB_PARTMAPS(X), 0x00, sizeof(struct udf_part_map) * Y);\
58 } else {\
59 UDF_SB_NUMPARTS(X) = 0;\
60 udf_error(X, __FUNCTION__, "Unable to allocate space for %d partition maps", Y);\
61 }\
62}
63
64#define UDF_SB_ALLOC_BITMAP(X,Y,Z)\
65{\
66 int nr_groups = ((UDF_SB_PARTLEN((X),(Y)) + (sizeof(struct spaceBitmapDesc) << 3) +\
67 ((X)->s_blocksize * 8) - 1) / ((X)->s_blocksize * 8));\
68 int size = sizeof(struct udf_bitmap) + (sizeof(struct buffer_head *) * nr_groups);\
69 if (size <= PAGE_SIZE)\
70 UDF_SB_PARTMAPS(X)[(Y)].Z.s_bitmap = kmalloc(size, GFP_KERNEL);\
71 else\
72 UDF_SB_PARTMAPS(X)[(Y)].Z.s_bitmap = vmalloc(size);\
73 if (UDF_SB_PARTMAPS(X)[(Y)].Z.s_bitmap != NULL) {\
74 memset(UDF_SB_PARTMAPS(X)[(Y)].Z.s_bitmap, 0x00, size);\
75 UDF_SB_PARTMAPS(X)[(Y)].Z.s_bitmap->s_block_bitmap =\
76 (struct buffer_head **)(UDF_SB_PARTMAPS(X)[(Y)].Z.s_bitmap + 1);\
77 UDF_SB_PARTMAPS(X)[(Y)].Z.s_bitmap->s_nr_groups = nr_groups;\
78 } else {\
79 udf_error(X, __FUNCTION__, "Unable to allocate space for bitmap and %d buffer_head pointers", nr_groups);\
80 }\
81}
82 47
83#define UDF_SB_FREE_BITMAP(X,Y,Z)\ 48int udf_compute_nr_groups(struct super_block *sb, u32 partition);
84{\
85 int i;\
86 int nr_groups = UDF_SB_BITMAP_NR_GROUPS(X,Y,Z);\
87 int size = sizeof(struct udf_bitmap) + (sizeof(struct buffer_head *) * nr_groups);\
88 for (i = 0; i < nr_groups; i++) {\
89 if (UDF_SB_BITMAP(X,Y,Z,i))\
90 brelse(UDF_SB_BITMAP(X,Y,Z,i));\
91 }\
92 if (size <= PAGE_SIZE)\
93 kfree(UDF_SB_PARTMAPS(X)[Y].Z.s_bitmap);\
94 else\
95 vfree(UDF_SB_PARTMAPS(X)[Y].Z.s_bitmap);\
96}
97 49
98#define UDF_QUERY_FLAG(X,Y) ( UDF_SB(X)->s_flags & ( 1 << (Y) ) ) 50#define UDF_QUERY_FLAG(X,Y) ( UDF_SB(X)->s_flags & ( 1 << (Y) ) )
99#define UDF_SET_FLAG(X,Y) ( UDF_SB(X)->s_flags |= ( 1 << (Y) ) ) 51#define UDF_SET_FLAG(X,Y) ( UDF_SB(X)->s_flags |= ( 1 << (Y) ) )
100#define UDF_CLEAR_FLAG(X,Y) ( UDF_SB(X)->s_flags &= ~( 1 << (Y) ) ) 52#define UDF_CLEAR_FLAG(X,Y) ( UDF_SB(X)->s_flags &= ~( 1 << (Y) ) )
101 53
102#define UDF_UPDATE_UDFREV(X,Y) ( ((Y) > UDF_SB_UDFREV(X)) ? UDF_SB_UDFREV(X) = (Y) : UDF_SB_UDFREV(X) )
103
104#define UDF_SB_PARTMAPS(X) ( UDF_SB(X)->s_partmaps )
105#define UDF_SB_PARTTYPE(X,Y) ( UDF_SB_PARTMAPS(X)[(Y)].s_partition_type )
106#define UDF_SB_PARTROOT(X,Y) ( UDF_SB_PARTMAPS(X)[(Y)].s_partition_root )
107#define UDF_SB_PARTLEN(X,Y) ( UDF_SB_PARTMAPS(X)[(Y)].s_partition_len )
108#define UDF_SB_PARTVSN(X,Y) ( UDF_SB_PARTMAPS(X)[(Y)].s_volumeseqnum )
109#define UDF_SB_PARTNUM(X,Y) ( UDF_SB_PARTMAPS(X)[(Y)].s_partition_num )
110#define UDF_SB_TYPESPAR(X,Y) ( UDF_SB_PARTMAPS(X)[(Y)].s_type_specific.s_sparing )
111#define UDF_SB_TYPEVIRT(X,Y) ( UDF_SB_PARTMAPS(X)[(Y)].s_type_specific.s_virtual )
112#define UDF_SB_PARTFUNC(X,Y) ( UDF_SB_PARTMAPS(X)[(Y)].s_partition_func )
113#define UDF_SB_PARTFLAGS(X,Y) ( UDF_SB_PARTMAPS(X)[(Y)].s_partition_flags )
114#define UDF_SB_BITMAP(X,Y,Z,I) ( UDF_SB_PARTMAPS(X)[(Y)].Z.s_bitmap->s_block_bitmap[I] )
115#define UDF_SB_BITMAP_NR_GROUPS(X,Y,Z) ( UDF_SB_PARTMAPS(X)[(Y)].Z.s_bitmap->s_nr_groups )
116
117#define UDF_SB_VOLIDENT(X) ( UDF_SB(X)->s_volident )
118#define UDF_SB_NUMPARTS(X) ( UDF_SB(X)->s_partitions )
119#define UDF_SB_PARTITION(X) ( UDF_SB(X)->s_partition )
120#define UDF_SB_SESSION(X) ( UDF_SB(X)->s_session )
121#define UDF_SB_ANCHOR(X) ( UDF_SB(X)->s_anchor )
122#define UDF_SB_LASTBLOCK(X) ( UDF_SB(X)->s_lastblock )
123#define UDF_SB_LVIDBH(X) ( UDF_SB(X)->s_lvidbh )
124#define UDF_SB_LVID(X) ( (struct logicalVolIntegrityDesc *)UDF_SB_LVIDBH(X)->b_data )
125#define UDF_SB_LVIDIU(X) ( (struct logicalVolIntegrityDescImpUse *)&(UDF_SB_LVID(X)->impUse[le32_to_cpu(UDF_SB_LVID(X)->numOfPartitions) * 2 * sizeof(uint32_t)/sizeof(uint8_t)]) )
126
127#define UDF_SB_UMASK(X) ( UDF_SB(X)->s_umask )
128#define UDF_SB_GID(X) ( UDF_SB(X)->s_gid )
129#define UDF_SB_UID(X) ( UDF_SB(X)->s_uid )
130#define UDF_SB_RECORDTIME(X) ( UDF_SB(X)->s_recordtime )
131#define UDF_SB_SERIALNUM(X) ( UDF_SB(X)->s_serialnum )
132#define UDF_SB_UDFREV(X) ( UDF_SB(X)->s_udfrev )
133#define UDF_SB_FLAGS(X) ( UDF_SB(X)->s_flags )
134#define UDF_SB_VAT(X) ( UDF_SB(X)->s_vat )
135
136#endif /* __LINUX_UDF_SB_H */ 54#endif /* __LINUX_UDF_SB_H */
diff --git a/fs/udf/udfdecl.h b/fs/udf/udfdecl.h
index c8016cc9e7e6..681dc2b66cdb 100644
--- a/fs/udf/udfdecl.h
+++ b/fs/udf/udfdecl.h
@@ -24,18 +24,21 @@
24#define UDF_PATH_LEN 1023 24#define UDF_PATH_LEN 1023
25 25
26#define udf_file_entry_alloc_offset(inode)\ 26#define udf_file_entry_alloc_offset(inode)\
27 (UDF_I_USE(inode) ?\ 27 (UDF_I(inode)->i_use ?\
28 sizeof(struct unallocSpaceEntry) :\ 28 sizeof(struct unallocSpaceEntry) :\
29 ((UDF_I_EFE(inode) ?\ 29 ((UDF_I(inode)->i_efe ?\
30 sizeof(struct extendedFileEntry) :\ 30 sizeof(struct extendedFileEntry) :\
31 sizeof(struct fileEntry)) + UDF_I_LENEATTR(inode))) 31 sizeof(struct fileEntry)) + UDF_I(inode)->i_lenEAttr))
32 32
33#define udf_ext0_offset(inode)\ 33#define udf_ext0_offset(inode)\
34 (UDF_I_ALLOCTYPE(inode) == ICBTAG_FLAG_AD_IN_ICB ?\ 34 (UDF_I(inode)->i_alloc_type == ICBTAG_FLAG_AD_IN_ICB ?\
35 udf_file_entry_alloc_offset(inode) : 0) 35 udf_file_entry_alloc_offset(inode) : 0)
36 36
37#define udf_get_lb_pblock(sb,loc,offset) udf_get_pblock((sb), (loc).logicalBlockNum, (loc).partitionReferenceNum, (offset)) 37#define udf_get_lb_pblock(sb,loc,offset) udf_get_pblock((sb), (loc).logicalBlockNum, (loc).partitionReferenceNum, (offset))
38 38
39/* computes tag checksum */
40u8 udf_tag_checksum(const tag *t);
41
39struct dentry; 42struct dentry;
40struct inode; 43struct inode;
41struct task_struct; 44struct task_struct;
@@ -185,8 +188,8 @@ extern struct fileIdentDesc *udf_fileident_read(struct inode *, loff_t *,
185 sector_t *); 188 sector_t *);
186extern struct fileIdentDesc *udf_get_fileident(void *buffer, int bufsize, 189extern struct fileIdentDesc *udf_get_fileident(void *buffer, int bufsize,
187 int *offset); 190 int *offset);
188extern long_ad *udf_get_filelongad(uint8_t *, int, int *, int); 191extern long_ad *udf_get_filelongad(uint8_t *, int, uint32_t *, int);
189extern short_ad *udf_get_fileshortad(uint8_t *, int, int *, int); 192extern short_ad *udf_get_fileshortad(uint8_t *, int, uint32_t *, int);
190 193
191/* crc.c */ 194/* crc.c */
192extern uint16_t udf_crc(uint8_t *, uint32_t, uint16_t); 195extern uint16_t udf_crc(uint8_t *, uint32_t, uint16_t);
diff --git a/fs/udf/udftime.c b/fs/udf/udftime.c
index adcb87c2da7e..ce595732ba6f 100644
--- a/fs/udf/udftime.c
+++ b/fs/udf/udftime.c
@@ -18,8 +18,10 @@
18 Boston, MA 02111-1307, USA. */ 18 Boston, MA 02111-1307, USA. */
19 19
20/* 20/*
21 * dgb 10/02/98: ripped this from glibc source to help convert timestamps to unix time 21 * dgb 10/02/98: ripped this from glibc source to help convert timestamps
22 * 10/04/98: added new table-based lookup after seeing how ugly the gnu code is 22 * to unix time
23 * 10/04/98: added new table-based lookup after seeing how ugly
24 * the gnu code is
23 * blf 09/27/99: ripped out all the old code and inserted new table from 25 * blf 09/27/99: ripped out all the old code and inserted new table from
24 * John Brockmeyer (without leap second corrections) 26 * John Brockmeyer (without leap second corrections)
25 * rewrote udf_stamp_to_time and fixed timezone accounting in 27 * rewrote udf_stamp_to_time and fixed timezone accounting in
@@ -55,27 +57,27 @@ static const unsigned short int __mon_yday[2][13] = {
55 57
56#define MAX_YEAR_SECONDS 69 58#define MAX_YEAR_SECONDS 69
57#define SPD 0x15180 /*3600*24 */ 59#define SPD 0x15180 /*3600*24 */
58#define SPY(y,l,s) (SPD * (365*y+l)+s) 60#define SPY(y, l, s) (SPD * (365 * y + l) + s)
59 61
60static time_t year_seconds[MAX_YEAR_SECONDS]= { 62static time_t year_seconds[MAX_YEAR_SECONDS] = {
61/*1970*/ SPY( 0, 0,0), SPY( 1, 0,0), SPY( 2, 0,0), SPY( 3, 1,0), 63/*1970*/ SPY(0, 0, 0), SPY(1, 0, 0), SPY(2, 0, 0), SPY(3, 1, 0),
62/*1974*/ SPY( 4, 1,0), SPY( 5, 1,0), SPY( 6, 1,0), SPY( 7, 2,0), 64/*1974*/ SPY(4, 1, 0), SPY(5, 1, 0), SPY(6, 1, 0), SPY(7, 2, 0),
63/*1978*/ SPY( 8, 2,0), SPY( 9, 2,0), SPY(10, 2,0), SPY(11, 3,0), 65/*1978*/ SPY(8, 2, 0), SPY(9, 2, 0), SPY(10, 2, 0), SPY(11, 3, 0),
64/*1982*/ SPY(12, 3,0), SPY(13, 3,0), SPY(14, 3,0), SPY(15, 4,0), 66/*1982*/ SPY(12, 3, 0), SPY(13, 3, 0), SPY(14, 3, 0), SPY(15, 4, 0),
65/*1986*/ SPY(16, 4,0), SPY(17, 4,0), SPY(18, 4,0), SPY(19, 5,0), 67/*1986*/ SPY(16, 4, 0), SPY(17, 4, 0), SPY(18, 4, 0), SPY(19, 5, 0),
66/*1990*/ SPY(20, 5,0), SPY(21, 5,0), SPY(22, 5,0), SPY(23, 6,0), 68/*1990*/ SPY(20, 5, 0), SPY(21, 5, 0), SPY(22, 5, 0), SPY(23, 6, 0),
67/*1994*/ SPY(24, 6,0), SPY(25, 6,0), SPY(26, 6,0), SPY(27, 7,0), 69/*1994*/ SPY(24, 6, 0), SPY(25, 6, 0), SPY(26, 6, 0), SPY(27, 7, 0),
68/*1998*/ SPY(28, 7,0), SPY(29, 7,0), SPY(30, 7,0), SPY(31, 8,0), 70/*1998*/ SPY(28, 7, 0), SPY(29, 7, 0), SPY(30, 7, 0), SPY(31, 8, 0),
69/*2002*/ SPY(32, 8,0), SPY(33, 8,0), SPY(34, 8,0), SPY(35, 9,0), 71/*2002*/ SPY(32, 8, 0), SPY(33, 8, 0), SPY(34, 8, 0), SPY(35, 9, 0),
70/*2006*/ SPY(36, 9,0), SPY(37, 9,0), SPY(38, 9,0), SPY(39,10,0), 72/*2006*/ SPY(36, 9, 0), SPY(37, 9, 0), SPY(38, 9, 0), SPY(39, 10, 0),
71/*2010*/ SPY(40,10,0), SPY(41,10,0), SPY(42,10,0), SPY(43,11,0), 73/*2010*/ SPY(40, 10, 0), SPY(41, 10, 0), SPY(42, 10, 0), SPY(43, 11, 0),
72/*2014*/ SPY(44,11,0), SPY(45,11,0), SPY(46,11,0), SPY(47,12,0), 74/*2014*/ SPY(44, 11, 0), SPY(45, 11, 0), SPY(46, 11, 0), SPY(47, 12, 0),
73/*2018*/ SPY(48,12,0), SPY(49,12,0), SPY(50,12,0), SPY(51,13,0), 75/*2018*/ SPY(48, 12, 0), SPY(49, 12, 0), SPY(50, 12, 0), SPY(51, 13, 0),
74/*2022*/ SPY(52,13,0), SPY(53,13,0), SPY(54,13,0), SPY(55,14,0), 76/*2022*/ SPY(52, 13, 0), SPY(53, 13, 0), SPY(54, 13, 0), SPY(55, 14, 0),
75/*2026*/ SPY(56,14,0), SPY(57,14,0), SPY(58,14,0), SPY(59,15,0), 77/*2026*/ SPY(56, 14, 0), SPY(57, 14, 0), SPY(58, 14, 0), SPY(59, 15, 0),
76/*2030*/ SPY(60,15,0), SPY(61,15,0), SPY(62,15,0), SPY(63,16,0), 78/*2030*/ SPY(60, 15, 0), SPY(61, 15, 0), SPY(62, 15, 0), SPY(63, 16, 0),
77/*2034*/ SPY(64,16,0), SPY(65,16,0), SPY(66,16,0), SPY(67,17,0), 79/*2034*/ SPY(64, 16, 0), SPY(65, 16, 0), SPY(66, 16, 0), SPY(67, 17, 0),
78/*2038*/ SPY(68,17,0) 80/*2038*/ SPY(68, 17, 0)
79}; 81};
80 82
81extern struct timezone sys_tz; 83extern struct timezone sys_tz;
@@ -115,7 +117,7 @@ time_t *udf_stamp_to_time(time_t *dest, long *dest_usec, kernel_timestamp src)
115 return dest; 117 return dest;
116} 118}
117 119
118kernel_timestamp *udf_time_to_stamp(kernel_timestamp * dest, struct timespec ts) 120kernel_timestamp *udf_time_to_stamp(kernel_timestamp *dest, struct timespec ts)
119{ 121{
120 long int days, rem, y; 122 long int days, rem, y;
121 const unsigned short int *ip; 123 const unsigned short int *ip;
@@ -137,7 +139,7 @@ kernel_timestamp *udf_time_to_stamp(kernel_timestamp * dest, struct timespec ts)
137 dest->second = rem % 60; 139 dest->second = rem % 60;
138 y = 1970; 140 y = 1970;
139 141
140#define DIV(a,b) ((a) / (b) - ((a) % (b) < 0)) 142#define DIV(a, b) ((a) / (b) - ((a) % (b) < 0))
141#define LEAPS_THRU_END_OF(y) (DIV (y, 4) - DIV (y, 100) + DIV (y, 400)) 143#define LEAPS_THRU_END_OF(y) (DIV (y, 4) - DIV (y, 100) + DIV (y, 400))
142 144
143 while (days < 0 || days >= (__isleap(y) ? 366 : 365)) { 145 while (days < 0 || days >= (__isleap(y) ? 366 : 365)) {
@@ -145,8 +147,8 @@ kernel_timestamp *udf_time_to_stamp(kernel_timestamp * dest, struct timespec ts)
145 147
146 /* Adjust DAYS and Y to match the guessed year. */ 148 /* Adjust DAYS and Y to match the guessed year. */
147 days -= ((yg - y) * 365 149 days -= ((yg - y) * 365
148 + LEAPS_THRU_END_OF (yg - 1) 150 + LEAPS_THRU_END_OF(yg - 1)
149 - LEAPS_THRU_END_OF (y - 1)); 151 - LEAPS_THRU_END_OF(y - 1));
150 y = yg; 152 y = yg;
151 } 153 }
152 dest->year = y; 154 dest->year = y;
@@ -158,7 +160,8 @@ kernel_timestamp *udf_time_to_stamp(kernel_timestamp * dest, struct timespec ts)
158 dest->day = days + 1; 160 dest->day = days + 1;
159 161
160 dest->centiseconds = ts.tv_nsec / 10000000; 162 dest->centiseconds = ts.tv_nsec / 10000000;
161 dest->hundredsOfMicroseconds = (ts.tv_nsec / 1000 - dest->centiseconds * 10000) / 100; 163 dest->hundredsOfMicroseconds = (ts.tv_nsec / 1000 -
164 dest->centiseconds * 10000) / 100;
162 dest->microseconds = (ts.tv_nsec / 1000 - dest->centiseconds * 10000 - 165 dest->microseconds = (ts.tv_nsec / 1000 - dest->centiseconds * 10000 -
163 dest->hundredsOfMicroseconds * 100); 166 dest->hundredsOfMicroseconds * 100);
164 return dest; 167 return dest;
diff --git a/fs/udf/unicode.c b/fs/udf/unicode.c
index 9e6099c26c27..e533b11703bf 100644
--- a/fs/udf/unicode.c
+++ b/fs/udf/unicode.c
@@ -136,12 +136,18 @@ int udf_CS0toUTF8(struct ustr *utf_o, struct ustr *ocu_i)
136 if (c < 0x80U) { 136 if (c < 0x80U) {
137 utf_o->u_name[utf_o->u_len++] = (uint8_t)c; 137 utf_o->u_name[utf_o->u_len++] = (uint8_t)c;
138 } else if (c < 0x800U) { 138 } else if (c < 0x800U) {
139 utf_o->u_name[utf_o->u_len++] = (uint8_t)(0xc0 | (c >> 6)); 139 utf_o->u_name[utf_o->u_len++] =
140 utf_o->u_name[utf_o->u_len++] = (uint8_t)(0x80 | (c & 0x3f)); 140 (uint8_t)(0xc0 | (c >> 6));
141 utf_o->u_name[utf_o->u_len++] =
142 (uint8_t)(0x80 | (c & 0x3f));
141 } else { 143 } else {
142 utf_o->u_name[utf_o->u_len++] = (uint8_t)(0xe0 | (c >> 12)); 144 utf_o->u_name[utf_o->u_len++] =
143 utf_o->u_name[utf_o->u_len++] = (uint8_t)(0x80 | ((c >> 6) & 0x3f)); 145 (uint8_t)(0xe0 | (c >> 12));
144 utf_o->u_name[utf_o->u_len++] = (uint8_t)(0x80 | (c & 0x3f)); 146 utf_o->u_name[utf_o->u_len++] =
147 (uint8_t)(0x80 |
148 ((c >> 6) & 0x3f));
149 utf_o->u_name[utf_o->u_len++] =
150 (uint8_t)(0x80 | (c & 0x3f));
145 } 151 }
146 } 152 }
147 utf_o->u_cmpID = 8; 153 utf_o->u_cmpID = 8;
@@ -232,9 +238,8 @@ try_again:
232 goto error_out; 238 goto error_out;
233 } 239 }
234 240
235 if (max_val == 0xffffU) { 241 if (max_val == 0xffffU)
236 ocu[++u_len] = (uint8_t)(utf_char >> 8); 242 ocu[++u_len] = (uint8_t)(utf_char >> 8);
237 }
238 ocu[++u_len] = (uint8_t)(utf_char & 0xffU); 243 ocu[++u_len] = (uint8_t)(utf_char & 0xffU);
239 } 244 }
240 245
@@ -330,29 +335,29 @@ int udf_get_filename(struct super_block *sb, uint8_t *sname, uint8_t *dname,
330 struct ustr filename, unifilename; 335 struct ustr filename, unifilename;
331 int len; 336 int len;
332 337
333 if (udf_build_ustr_exact(&unifilename, sname, flen)) { 338 if (udf_build_ustr_exact(&unifilename, sname, flen))
334 return 0; 339 return 0;
335 }
336 340
337 if (UDF_QUERY_FLAG(sb, UDF_FLAG_UTF8)) { 341 if (UDF_QUERY_FLAG(sb, UDF_FLAG_UTF8)) {
338 if (!udf_CS0toUTF8(&filename, &unifilename)) { 342 if (!udf_CS0toUTF8(&filename, &unifilename)) {
339 udf_debug("Failed in udf_get_filename: sname = %s\n", sname); 343 udf_debug("Failed in udf_get_filename: sname = %s\n",
344 sname);
340 return 0; 345 return 0;
341 } 346 }
342 } else if (UDF_QUERY_FLAG(sb, UDF_FLAG_NLS_MAP)) { 347 } else if (UDF_QUERY_FLAG(sb, UDF_FLAG_NLS_MAP)) {
343 if (!udf_CS0toNLS(UDF_SB(sb)->s_nls_map, &filename, &unifilename)) { 348 if (!udf_CS0toNLS(UDF_SB(sb)->s_nls_map, &filename,
344 udf_debug("Failed in udf_get_filename: sname = %s\n", sname); 349 &unifilename)) {
350 udf_debug("Failed in udf_get_filename: sname = %s\n",
351 sname);
345 return 0; 352 return 0;
346 } 353 }
347 } else { 354 } else
348 return 0; 355 return 0;
349 }
350 356
351 len = udf_translate_to_linux(dname, filename.u_name, filename.u_len, 357 len = udf_translate_to_linux(dname, filename.u_name, filename.u_len,
352 unifilename.u_name, unifilename.u_len); 358 unifilename.u_name, unifilename.u_len);
353 if (len) { 359 if (len)
354 return len; 360 return len;
355 }
356 361
357 return 0; 362 return 0;
358} 363}
@@ -363,23 +368,20 @@ int udf_put_filename(struct super_block *sb, const uint8_t *sname,
363 struct ustr unifilename; 368 struct ustr unifilename;
364 int namelen; 369 int namelen;
365 370
366 if (!(udf_char_to_ustr(&unifilename, sname, flen))) { 371 if (!udf_char_to_ustr(&unifilename, sname, flen))
367 return 0; 372 return 0;
368 }
369 373
370 if (UDF_QUERY_FLAG(sb, UDF_FLAG_UTF8)) { 374 if (UDF_QUERY_FLAG(sb, UDF_FLAG_UTF8)) {
371 namelen = udf_UTF8toCS0(dname, &unifilename, UDF_NAME_LEN); 375 namelen = udf_UTF8toCS0(dname, &unifilename, UDF_NAME_LEN);
372 if (!namelen) { 376 if (!namelen)
373 return 0; 377 return 0;
374 }
375 } else if (UDF_QUERY_FLAG(sb, UDF_FLAG_NLS_MAP)) { 378 } else if (UDF_QUERY_FLAG(sb, UDF_FLAG_NLS_MAP)) {
376 namelen = udf_NLStoCS0(UDF_SB(sb)->s_nls_map, dname, &unifilename, UDF_NAME_LEN); 379 namelen = udf_NLStoCS0(UDF_SB(sb)->s_nls_map, dname,
377 if (!namelen) { 380 &unifilename, UDF_NAME_LEN);
381 if (!namelen)
378 return 0; 382 return 0;
379 } 383 } else
380 } else {
381 return 0; 384 return 0;
382 }
383 385
384 return namelen; 386 return namelen;
385} 387}
@@ -389,8 +391,9 @@ int udf_put_filename(struct super_block *sb, const uint8_t *sname,
389#define CRC_MARK '#' 391#define CRC_MARK '#'
390#define EXT_SIZE 5 392#define EXT_SIZE 5
391 393
392static int udf_translate_to_linux(uint8_t *newName, uint8_t *udfName, int udfLen, 394static int udf_translate_to_linux(uint8_t *newName, uint8_t *udfName,
393 uint8_t *fidName, int fidNameLen) 395 int udfLen, uint8_t *fidName,
396 int fidNameLen)
394{ 397{
395 int index, newIndex = 0, needsCRC = 0; 398 int index, newIndex = 0, needsCRC = 0;
396 int extIndex = 0, newExtIndex = 0, hasExt = 0; 399 int extIndex = 0, newExtIndex = 0, hasExt = 0;
@@ -409,13 +412,16 @@ static int udf_translate_to_linux(uint8_t *newName, uint8_t *udfName, int udfLen
409 if (curr == '/' || curr == 0) { 412 if (curr == '/' || curr == 0) {
410 needsCRC = 1; 413 needsCRC = 1;
411 curr = ILLEGAL_CHAR_MARK; 414 curr = ILLEGAL_CHAR_MARK;
412 while (index + 1 < udfLen && (udfName[index + 1] == '/' || 415 while (index + 1 < udfLen &&
413 udfName[index + 1] == 0)) 416 (udfName[index + 1] == '/' ||
417 udfName[index + 1] == 0))
414 index++; 418 index++;
415 } if (curr == EXT_MARK && (udfLen - index - 1) <= EXT_SIZE) { 419 }
416 if (udfLen == index + 1) { 420 if (curr == EXT_MARK &&
421 (udfLen - index - 1) <= EXT_SIZE) {
422 if (udfLen == index + 1)
417 hasExt = 0; 423 hasExt = 0;
418 } else { 424 else {
419 hasExt = 1; 425 hasExt = 1;
420 extIndex = index; 426 extIndex = index;
421 newExtIndex = newIndex; 427 newExtIndex = newIndex;
@@ -433,16 +439,18 @@ static int udf_translate_to_linux(uint8_t *newName, uint8_t *udfName, int udfLen
433 439
434 if (hasExt) { 440 if (hasExt) {
435 int maxFilenameLen; 441 int maxFilenameLen;
436 for(index = 0; index < EXT_SIZE && extIndex + index + 1 < udfLen; index++) { 442 for (index = 0;
443 index < EXT_SIZE && extIndex + index + 1 < udfLen;
444 index++) {
437 curr = udfName[extIndex + index + 1]; 445 curr = udfName[extIndex + index + 1];
438 446
439 if (curr == '/' || curr == 0) { 447 if (curr == '/' || curr == 0) {
440 needsCRC = 1; 448 needsCRC = 1;
441 curr = ILLEGAL_CHAR_MARK; 449 curr = ILLEGAL_CHAR_MARK;
442 while(extIndex + index + 2 < udfLen && 450 while (extIndex + index + 2 < udfLen &&
443 (index + 1 < EXT_SIZE 451 (index + 1 < EXT_SIZE &&
444 && (udfName[extIndex + index + 2] == '/' || 452 (udfName[extIndex + index + 2] == '/' ||
445 udfName[extIndex + index + 2] == 0))) 453 udfName[extIndex + index + 2] == 0)))
446 index++; 454 index++;
447 } 455 }
448 ext[localExtIndex++] = curr; 456 ext[localExtIndex++] = curr;
@@ -452,9 +460,8 @@ static int udf_translate_to_linux(uint8_t *newName, uint8_t *udfName, int udfLen
452 newIndex = maxFilenameLen; 460 newIndex = maxFilenameLen;
453 else 461 else
454 newIndex = newExtIndex; 462 newIndex = newExtIndex;
455 } else if (newIndex > 250) { 463 } else if (newIndex > 250)
456 newIndex = 250; 464 newIndex = 250;
457 }
458 newName[newIndex++] = CRC_MARK; 465 newName[newIndex++] = CRC_MARK;
459 valueCRC = udf_crc(fidName, fidNameLen, 0); 466 valueCRC = udf_crc(fidName, fidNameLen, 0);
460 newName[newIndex++] = hexChar[(valueCRC & 0xf000) >> 12]; 467 newName[newIndex++] = hexChar[(valueCRC & 0xf000) >> 12];
diff --git a/fs/ufs/balloc.c b/fs/ufs/balloc.c
index f63a09ce8683..1fca381f0ce2 100644
--- a/fs/ufs/balloc.c
+++ b/fs/ufs/balloc.c
@@ -9,7 +9,6 @@
9 */ 9 */
10 10
11#include <linux/fs.h> 11#include <linux/fs.h>
12#include <linux/ufs_fs.h>
13#include <linux/stat.h> 12#include <linux/stat.h>
14#include <linux/time.h> 13#include <linux/time.h>
15#include <linux/string.h> 14#include <linux/string.h>
@@ -19,6 +18,7 @@
19#include <linux/bitops.h> 18#include <linux/bitops.h>
20#include <asm/byteorder.h> 19#include <asm/byteorder.h>
21 20
21#include "ufs_fs.h"
22#include "ufs.h" 22#include "ufs.h"
23#include "swab.h" 23#include "swab.h"
24#include "util.h" 24#include "util.h"
diff --git a/fs/ufs/cylinder.c b/fs/ufs/cylinder.c
index 2a815665644f..b4676322ddb6 100644
--- a/fs/ufs/cylinder.c
+++ b/fs/ufs/cylinder.c
@@ -9,7 +9,6 @@
9 */ 9 */
10 10
11#include <linux/fs.h> 11#include <linux/fs.h>
12#include <linux/ufs_fs.h>
13#include <linux/time.h> 12#include <linux/time.h>
14#include <linux/stat.h> 13#include <linux/stat.h>
15#include <linux/string.h> 14#include <linux/string.h>
@@ -17,6 +16,7 @@
17 16
18#include <asm/byteorder.h> 17#include <asm/byteorder.h>
19 18
19#include "ufs_fs.h"
20#include "ufs.h" 20#include "ufs.h"
21#include "swab.h" 21#include "swab.h"
22#include "util.h" 22#include "util.h"
diff --git a/fs/ufs/dir.c b/fs/ufs/dir.c
index aaf2878305ce..ef563fc8d72c 100644
--- a/fs/ufs/dir.c
+++ b/fs/ufs/dir.c
@@ -18,9 +18,9 @@
18 18
19#include <linux/time.h> 19#include <linux/time.h>
20#include <linux/fs.h> 20#include <linux/fs.h>
21#include <linux/ufs_fs.h>
22#include <linux/swap.h> 21#include <linux/swap.h>
23 22
23#include "ufs_fs.h"
24#include "ufs.h" 24#include "ufs.h"
25#include "swab.h" 25#include "swab.h"
26#include "util.h" 26#include "util.h"
diff --git a/fs/ufs/file.c b/fs/ufs/file.c
index a46c97bf023f..625ef17c6f83 100644
--- a/fs/ufs/file.c
+++ b/fs/ufs/file.c
@@ -24,9 +24,9 @@
24 */ 24 */
25 25
26#include <linux/fs.h> 26#include <linux/fs.h>
27#include <linux/ufs_fs.h>
28#include <linux/buffer_head.h> /* for sync_mapping_buffers() */ 27#include <linux/buffer_head.h> /* for sync_mapping_buffers() */
29 28
29#include "ufs_fs.h"
30#include "ufs.h" 30#include "ufs.h"
31 31
32 32
diff --git a/fs/ufs/ialloc.c b/fs/ufs/ialloc.c
index 7e260bc0d94f..ac181f6806a3 100644
--- a/fs/ufs/ialloc.c
+++ b/fs/ufs/ialloc.c
@@ -24,7 +24,6 @@
24 */ 24 */
25 25
26#include <linux/fs.h> 26#include <linux/fs.h>
27#include <linux/ufs_fs.h>
28#include <linux/time.h> 27#include <linux/time.h>
29#include <linux/stat.h> 28#include <linux/stat.h>
30#include <linux/string.h> 29#include <linux/string.h>
@@ -34,6 +33,7 @@
34#include <linux/bitops.h> 33#include <linux/bitops.h>
35#include <asm/byteorder.h> 34#include <asm/byteorder.h>
36 35
36#include "ufs_fs.h"
37#include "ufs.h" 37#include "ufs.h"
38#include "swab.h" 38#include "swab.h"
39#include "util.h" 39#include "util.h"
diff --git a/fs/ufs/inode.c b/fs/ufs/inode.c
index 489f26bc26d9..5446b888fc8e 100644
--- a/fs/ufs/inode.c
+++ b/fs/ufs/inode.c
@@ -30,7 +30,6 @@
30 30
31#include <linux/errno.h> 31#include <linux/errno.h>
32#include <linux/fs.h> 32#include <linux/fs.h>
33#include <linux/ufs_fs.h>
34#include <linux/time.h> 33#include <linux/time.h>
35#include <linux/stat.h> 34#include <linux/stat.h>
36#include <linux/string.h> 35#include <linux/string.h>
@@ -38,6 +37,7 @@
38#include <linux/smp_lock.h> 37#include <linux/smp_lock.h>
39#include <linux/buffer_head.h> 38#include <linux/buffer_head.h>
40 39
40#include "ufs_fs.h"
41#include "ufs.h" 41#include "ufs.h"
42#include "swab.h" 42#include "swab.h"
43#include "util.h" 43#include "util.h"
diff --git a/fs/ufs/namei.c b/fs/ufs/namei.c
index 747a4de6c695..e3a9b1fac75a 100644
--- a/fs/ufs/namei.c
+++ b/fs/ufs/namei.c
@@ -29,8 +29,9 @@
29 29
30#include <linux/time.h> 30#include <linux/time.h>
31#include <linux/fs.h> 31#include <linux/fs.h>
32#include <linux/ufs_fs.h>
33#include <linux/smp_lock.h> 32#include <linux/smp_lock.h>
33
34#include "ufs_fs.h"
34#include "ufs.h" 35#include "ufs.h"
35#include "util.h" 36#include "util.h"
36 37
diff --git a/fs/ufs/super.c b/fs/ufs/super.c
index 73deff475e63..85b22b5977fa 100644
--- a/fs/ufs/super.c
+++ b/fs/ufs/super.c
@@ -76,7 +76,6 @@
76 76
77#include <linux/errno.h> 77#include <linux/errno.h>
78#include <linux/fs.h> 78#include <linux/fs.h>
79#include <linux/ufs_fs.h>
80#include <linux/slab.h> 79#include <linux/slab.h>
81#include <linux/time.h> 80#include <linux/time.h>
82#include <linux/stat.h> 81#include <linux/stat.h>
@@ -91,6 +90,7 @@
91#include <linux/mount.h> 90#include <linux/mount.h>
92#include <linux/seq_file.h> 91#include <linux/seq_file.h>
93 92
93#include "ufs_fs.h"
94#include "ufs.h" 94#include "ufs.h"
95#include "swab.h" 95#include "swab.h"
96#include "util.h" 96#include "util.h"
@@ -131,6 +131,8 @@ static void ufs_print_super_stuff(struct super_block *sb,
131 printk(KERN_INFO" cs_nffree(Num of free frags): %llu\n", 131 printk(KERN_INFO" cs_nffree(Num of free frags): %llu\n",
132 (unsigned long long) 132 (unsigned long long)
133 fs64_to_cpu(sb, usb3->fs_un1.fs_u2.cs_nffree)); 133 fs64_to_cpu(sb, usb3->fs_un1.fs_u2.cs_nffree));
134 printk(KERN_INFO" fs_maxsymlinklen: %u\n",
135 fs32_to_cpu(sb, usb3->fs_un2.fs_44.fs_maxsymlinklen));
134 } else { 136 } else {
135 printk(" sblkno: %u\n", fs32_to_cpu(sb, usb1->fs_sblkno)); 137 printk(" sblkno: %u\n", fs32_to_cpu(sb, usb1->fs_sblkno));
136 printk(" cblkno: %u\n", fs32_to_cpu(sb, usb1->fs_cblkno)); 138 printk(" cblkno: %u\n", fs32_to_cpu(sb, usb1->fs_cblkno));
@@ -1061,8 +1063,8 @@ magic_found:
1061 uspi->s_bpf = uspi->s_fsize << 3; 1063 uspi->s_bpf = uspi->s_fsize << 3;
1062 uspi->s_bpfshift = uspi->s_fshift + 3; 1064 uspi->s_bpfshift = uspi->s_fshift + 3;
1063 uspi->s_bpfmask = uspi->s_bpf - 1; 1065 uspi->s_bpfmask = uspi->s_bpf - 1;
1064 if ((sbi->s_mount_opt & UFS_MOUNT_UFSTYPE) == 1066 if ((sbi->s_mount_opt & UFS_MOUNT_UFSTYPE) == UFS_MOUNT_UFSTYPE_44BSD ||
1065 UFS_MOUNT_UFSTYPE_44BSD) 1067 (sbi->s_mount_opt & UFS_MOUNT_UFSTYPE) == UFS_MOUNT_UFSTYPE_UFS2)
1066 uspi->s_maxsymlinklen = 1068 uspi->s_maxsymlinklen =
1067 fs32_to_cpu(sb, usb3->fs_un2.fs_44.fs_maxsymlinklen); 1069 fs32_to_cpu(sb, usb3->fs_un2.fs_44.fs_maxsymlinklen);
1068 1070
diff --git a/fs/ufs/symlink.c b/fs/ufs/symlink.c
index 43ac10e75a4a..c0156eda44bc 100644
--- a/fs/ufs/symlink.c
+++ b/fs/ufs/symlink.c
@@ -27,7 +27,8 @@
27 27
28#include <linux/fs.h> 28#include <linux/fs.h>
29#include <linux/namei.h> 29#include <linux/namei.h>
30#include <linux/ufs_fs.h> 30
31#include "ufs_fs.h"
31#include "ufs.h" 32#include "ufs.h"
32 33
33 34
diff --git a/fs/ufs/truncate.c b/fs/ufs/truncate.c
index 311ded34c2b2..41dd431ce228 100644
--- a/fs/ufs/truncate.c
+++ b/fs/ufs/truncate.c
@@ -36,7 +36,6 @@
36 36
37#include <linux/errno.h> 37#include <linux/errno.h>
38#include <linux/fs.h> 38#include <linux/fs.h>
39#include <linux/ufs_fs.h>
40#include <linux/fcntl.h> 39#include <linux/fcntl.h>
41#include <linux/time.h> 40#include <linux/time.h>
42#include <linux/stat.h> 41#include <linux/stat.h>
@@ -46,6 +45,7 @@
46#include <linux/blkdev.h> 45#include <linux/blkdev.h>
47#include <linux/sched.h> 46#include <linux/sched.h>
48 47
48#include "ufs_fs.h"
49#include "ufs.h" 49#include "ufs.h"
50#include "swab.h" 50#include "swab.h"
51#include "util.h" 51#include "util.h"
diff --git a/include/linux/ufs_fs.h b/fs/ufs/ufs_fs.h
index 10b854d3561f..54bde1895a80 100644
--- a/include/linux/ufs_fs.h
+++ b/fs/ufs/ufs_fs.h
@@ -35,16 +35,10 @@
35#include <linux/stat.h> 35#include <linux/stat.h>
36#include <linux/fs.h> 36#include <linux/fs.h>
37 37
38#ifndef __KERNEL__
39typedef __u64 __fs64;
40typedef __u32 __fs32;
41typedef __u16 __fs16;
42#else
43#include <asm/div64.h> 38#include <asm/div64.h>
44typedef __u64 __bitwise __fs64; 39typedef __u64 __bitwise __fs64;
45typedef __u32 __bitwise __fs32; 40typedef __u32 __bitwise __fs32;
46typedef __u16 __bitwise __fs16; 41typedef __u16 __bitwise __fs16;
47#endif
48 42
49#define UFS_BBLOCK 0 43#define UFS_BBLOCK 0
50#define UFS_BBSIZE 8192 44#define UFS_BBSIZE 8192
@@ -197,7 +191,7 @@ typedef __u16 __bitwise __fs16;
197 */ 191 */
198#define UFS_MINFREE 5 192#define UFS_MINFREE 5
199#define UFS_DEFAULTOPT UFS_OPTTIME 193#define UFS_DEFAULTOPT UFS_OPTTIME
200 194
201/* 195/*
202 * Turn file system block numbers into disk block addresses. 196 * Turn file system block numbers into disk block addresses.
203 * This maps file system blocks to device size blocks. 197 * This maps file system blocks to device size blocks.
@@ -714,7 +708,7 @@ struct ufs_cg_private_info {
714 __u32 c_clustersumoff;/* (u_int32) counts of avail clusters */ 708 __u32 c_clustersumoff;/* (u_int32) counts of avail clusters */
715 __u32 c_clusteroff; /* (u_int8) free cluster map */ 709 __u32 c_clusteroff; /* (u_int8) free cluster map */
716 __u32 c_nclusterblks; /* number of clusters this cg */ 710 __u32 c_nclusterblks; /* number of clusters this cg */
717}; 711};
718 712
719 713
720struct ufs_sb_private_info { 714struct ufs_sb_private_info {
diff --git a/fs/ufs/util.c b/fs/ufs/util.c
index 410084dae389..85a7fc9e4a4e 100644
--- a/fs/ufs/util.c
+++ b/fs/ufs/util.c
@@ -8,9 +8,9 @@
8 8
9#include <linux/string.h> 9#include <linux/string.h>
10#include <linux/slab.h> 10#include <linux/slab.h>
11#include <linux/ufs_fs.h>
12#include <linux/buffer_head.h> 11#include <linux/buffer_head.h>
13 12
13#include "ufs_fs.h"
14#include "ufs.h" 14#include "ufs.h"
15#include "swab.h" 15#include "swab.h"
16#include "util.h" 16#include "util.h"
diff --git a/include/asm-alpha/a.out-core.h b/include/asm-alpha/a.out-core.h
new file mode 100644
index 000000000000..9e33e92e524c
--- /dev/null
+++ b/include/asm-alpha/a.out-core.h
@@ -0,0 +1,80 @@
1/* a.out coredump register dumper
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11
12#ifndef _ASM_A_OUT_CORE_H
13#define _ASM_A_OUT_CORE_H
14
15#ifdef __KERNEL__
16
17#include <linux/user.h>
18
19/*
20 * Fill in the user structure for an ECOFF core dump.
21 */
22static inline void aout_dump_thread(struct pt_regs *pt, struct user *dump)
23{
24 /* switch stack follows right below pt_regs: */
25 struct switch_stack * sw = ((struct switch_stack *) pt) - 1;
26
27 dump->magic = CMAGIC;
28 dump->start_code = current->mm->start_code;
29 dump->start_data = current->mm->start_data;
30 dump->start_stack = rdusp() & ~(PAGE_SIZE - 1);
31 dump->u_tsize = ((current->mm->end_code - dump->start_code)
32 >> PAGE_SHIFT);
33 dump->u_dsize = ((current->mm->brk + PAGE_SIZE-1 - dump->start_data)
34 >> PAGE_SHIFT);
35 dump->u_ssize = (current->mm->start_stack - dump->start_stack
36 + PAGE_SIZE-1) >> PAGE_SHIFT;
37
38 /*
39 * We store the registers in an order/format that is
40 * compatible with DEC Unix/OSF/1 as this makes life easier
41 * for gdb.
42 */
43 dump->regs[EF_V0] = pt->r0;
44 dump->regs[EF_T0] = pt->r1;
45 dump->regs[EF_T1] = pt->r2;
46 dump->regs[EF_T2] = pt->r3;
47 dump->regs[EF_T3] = pt->r4;
48 dump->regs[EF_T4] = pt->r5;
49 dump->regs[EF_T5] = pt->r6;
50 dump->regs[EF_T6] = pt->r7;
51 dump->regs[EF_T7] = pt->r8;
52 dump->regs[EF_S0] = sw->r9;
53 dump->regs[EF_S1] = sw->r10;
54 dump->regs[EF_S2] = sw->r11;
55 dump->regs[EF_S3] = sw->r12;
56 dump->regs[EF_S4] = sw->r13;
57 dump->regs[EF_S5] = sw->r14;
58 dump->regs[EF_S6] = sw->r15;
59 dump->regs[EF_A3] = pt->r19;
60 dump->regs[EF_A4] = pt->r20;
61 dump->regs[EF_A5] = pt->r21;
62 dump->regs[EF_T8] = pt->r22;
63 dump->regs[EF_T9] = pt->r23;
64 dump->regs[EF_T10] = pt->r24;
65 dump->regs[EF_T11] = pt->r25;
66 dump->regs[EF_RA] = pt->r26;
67 dump->regs[EF_T12] = pt->r27;
68 dump->regs[EF_AT] = pt->r28;
69 dump->regs[EF_SP] = rdusp();
70 dump->regs[EF_PS] = pt->ps;
71 dump->regs[EF_PC] = pt->pc;
72 dump->regs[EF_GP] = pt->gp;
73 dump->regs[EF_A0] = pt->r16;
74 dump->regs[EF_A1] = pt->r17;
75 dump->regs[EF_A2] = pt->r18;
76 memcpy((char *)dump->regs + EF_SIZE, sw->fp, 32 * 8);
77}
78
79#endif /* __KERNEL__ */
80#endif /* _ASM_A_OUT_CORE_H */
diff --git a/include/asm-alpha/a.out.h b/include/asm-alpha/a.out.h
index e43cf61649a9..02ce8473870a 100644
--- a/include/asm-alpha/a.out.h
+++ b/include/asm-alpha/a.out.h
@@ -98,11 +98,5 @@ struct exec
98 set_personality (((BFPM->sh_bang || EX.ah.entry < 0x100000000L \ 98 set_personality (((BFPM->sh_bang || EX.ah.entry < 0x100000000L \
99 ? ADDR_LIMIT_32BIT : 0) | PER_OSF4)) 99 ? ADDR_LIMIT_32BIT : 0) | PER_OSF4))
100 100
101#define STACK_TOP \ 101#endif /* __KERNEL__ */
102 (current->personality & ADDR_LIMIT_32BIT ? 0x80000000 : 0x00120000000UL)
103
104#define STACK_TOP_MAX 0x00120000000UL
105
106#endif
107
108#endif /* __A_OUT_GNU_H__ */ 102#endif /* __A_OUT_GNU_H__ */
diff --git a/include/asm-alpha/page.h b/include/asm-alpha/page.h
index 05f09f997d82..22ff9762d17b 100644
--- a/include/asm-alpha/page.h
+++ b/include/asm-alpha/page.h
@@ -62,6 +62,8 @@ typedef unsigned long pgprot_t;
62 62
63#endif /* STRICT_MM_TYPECHECKS */ 63#endif /* STRICT_MM_TYPECHECKS */
64 64
65typedef struct page *pgtable_t;
66
65#ifdef USE_48_BIT_KSEG 67#ifdef USE_48_BIT_KSEG
66#define PAGE_OFFSET 0xffff800000000000UL 68#define PAGE_OFFSET 0xffff800000000000UL
67#else 69#else
diff --git a/include/asm-alpha/param.h b/include/asm-alpha/param.h
index 214e7996346f..0982f1d39499 100644
--- a/include/asm-alpha/param.h
+++ b/include/asm-alpha/param.h
@@ -5,15 +5,7 @@
5 hardware ignores reprogramming. We also need userland buy-in to the 5 hardware ignores reprogramming. We also need userland buy-in to the
6 change in HZ, since this is visible in the wait4 resources etc. */ 6 change in HZ, since this is visible in the wait4 resources etc. */
7 7
8 8#define HZ CONFIG_HZ
9#ifndef HZ
10# ifndef CONFIG_ALPHA_RAWHIDE
11# define HZ 1024
12# else
13# define HZ 1200
14# endif
15#endif
16
17#define USER_HZ HZ 9#define USER_HZ HZ
18 10
19#define EXEC_PAGESIZE 8192 11#define EXEC_PAGESIZE 8192
diff --git a/include/asm-alpha/pgalloc.h b/include/asm-alpha/pgalloc.h
index fdbedacc7375..fd090155dccd 100644
--- a/include/asm-alpha/pgalloc.h
+++ b/include/asm-alpha/pgalloc.h
@@ -11,10 +11,11 @@
11 */ 11 */
12 12
13static inline void 13static inline void
14pmd_populate(struct mm_struct *mm, pmd_t *pmd, struct page *pte) 14pmd_populate(struct mm_struct *mm, pmd_t *pmd, pgtable_t pte)
15{ 15{
16 pmd_set(pmd, (pte_t *)(page_to_pa(pte) + PAGE_OFFSET)); 16 pmd_set(pmd, (pte_t *)(page_to_pa(pte) + PAGE_OFFSET));
17} 17}
18#define pmd_pgtable(pmd) pmd_page(pmd)
18 19
19static inline void 20static inline void
20pmd_populate_kernel(struct mm_struct *mm, pmd_t *pmd, pte_t *pte) 21pmd_populate_kernel(struct mm_struct *mm, pmd_t *pmd, pte_t *pte)
@@ -57,18 +58,23 @@ pte_free_kernel(struct mm_struct *mm, pte_t *pte)
57 free_page((unsigned long)pte); 58 free_page((unsigned long)pte);
58} 59}
59 60
60static inline struct page * 61static inline pgtable_t
61pte_alloc_one(struct mm_struct *mm, unsigned long addr) 62pte_alloc_one(struct mm_struct *mm, unsigned long address)
62{ 63{
63 pte_t *pte = pte_alloc_one_kernel(mm, addr); 64 pte_t *pte = pte_alloc_one_kernel(mm, address);
64 if (pte) 65 struct page *page;
65 return virt_to_page(pte); 66
66 return NULL; 67 if (!pte)
68 return NULL;
69 page = virt_to_page(pte);
70 pgtable_page_ctor(page);
71 return page;
67} 72}
68 73
69static inline void 74static inline void
70pte_free(struct mm_struct *mm, struct page *page) 75pte_free(struct mm_struct *mm, pgtable_t page)
71{ 76{
77 pgtable_page_dtor(page);
72 __free_page(page); 78 __free_page(page);
73} 79}
74 80
diff --git a/include/asm-alpha/processor.h b/include/asm-alpha/processor.h
index 425b7b6d28cb..94afe5859301 100644
--- a/include/asm-alpha/processor.h
+++ b/include/asm-alpha/processor.h
@@ -20,6 +20,11 @@
20 */ 20 */
21#define TASK_SIZE (0x40000000000UL) 21#define TASK_SIZE (0x40000000000UL)
22 22
23#define STACK_TOP \
24 (current->personality & ADDR_LIMIT_32BIT ? 0x80000000 : 0x00120000000UL)
25
26#define STACK_TOP_MAX 0x00120000000UL
27
23/* This decides where the kernel will search for a free chunk of vm 28/* This decides where the kernel will search for a free chunk of vm
24 * space during mmap's. 29 * space during mmap's.
25 */ 30 */
diff --git a/include/asm-arm/a.out-core.h b/include/asm-arm/a.out-core.h
new file mode 100644
index 000000000000..93d04acaa31f
--- /dev/null
+++ b/include/asm-arm/a.out-core.h
@@ -0,0 +1,49 @@
1/* a.out coredump register dumper
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11
12#ifndef _ASM_A_OUT_CORE_H
13#define _ASM_A_OUT_CORE_H
14
15#ifdef __KERNEL__
16
17#include <linux/user.h>
18#include <linux/elfcore.h>
19
20/*
21 * fill in the user structure for an a.out core dump
22 */
23static inline void aout_dump_thread(struct pt_regs *regs, struct user *dump)
24{
25 struct task_struct *tsk = current;
26
27 dump->magic = CMAGIC;
28 dump->start_code = tsk->mm->start_code;
29 dump->start_stack = regs->ARM_sp & ~(PAGE_SIZE - 1);
30
31 dump->u_tsize = (tsk->mm->end_code - tsk->mm->start_code) >> PAGE_SHIFT;
32 dump->u_dsize = (tsk->mm->brk - tsk->mm->start_data + PAGE_SIZE - 1) >> PAGE_SHIFT;
33 dump->u_ssize = 0;
34
35 dump->u_debugreg[0] = tsk->thread.debug.bp[0].address;
36 dump->u_debugreg[1] = tsk->thread.debug.bp[1].address;
37 dump->u_debugreg[2] = tsk->thread.debug.bp[0].insn.arm;
38 dump->u_debugreg[3] = tsk->thread.debug.bp[1].insn.arm;
39 dump->u_debugreg[4] = tsk->thread.debug.nsaved;
40
41 if (dump->start_stack < 0x04000000)
42 dump->u_ssize = (0x04000000 - dump->start_stack) >> PAGE_SHIFT;
43
44 dump->regs = *regs;
45 dump->u_fpvalid = dump_fpu (regs, &dump->u_fp);
46}
47
48#endif /* __KERNEL__ */
49#endif /* _ASM_A_OUT_CORE_H */
diff --git a/include/asm-arm/a.out.h b/include/asm-arm/a.out.h
index d7165e86df25..79489fdcc8b8 100644
--- a/include/asm-arm/a.out.h
+++ b/include/asm-arm/a.out.h
@@ -27,12 +27,6 @@ struct exec
27 27
28#define M_ARM 103 28#define M_ARM 103
29 29
30#ifdef __KERNEL__
31#define STACK_TOP ((current->personality == PER_LINUX_32BIT) ? \
32 TASK_SIZE : TASK_SIZE_26)
33#define STACK_TOP_MAX TASK_SIZE
34#endif
35
36#ifndef LIBRARY_START_TEXT 30#ifndef LIBRARY_START_TEXT
37#define LIBRARY_START_TEXT (0x00c00000) 31#define LIBRARY_START_TEXT (0x00c00000)
38#endif 32#endif
diff --git a/include/asm-arm/mutex.h b/include/asm-arm/mutex.h
index cb29d84e690d..020bd98710a1 100644
--- a/include/asm-arm/mutex.h
+++ b/include/asm-arm/mutex.h
@@ -24,7 +24,7 @@
24 * reattempted until it succeeds. 24 * reattempted until it succeeds.
25 */ 25 */
26static inline void 26static inline void
27__mutex_fastpath_lock(atomic_t *count, fastcall void (*fail_fn)(atomic_t *)) 27__mutex_fastpath_lock(atomic_t *count, void (*fail_fn)(atomic_t *))
28{ 28{
29 int __ex_flag, __res; 29 int __ex_flag, __res;
30 30
@@ -44,7 +44,7 @@ __mutex_fastpath_lock(atomic_t *count, fastcall void (*fail_fn)(atomic_t *))
44} 44}
45 45
46static inline int 46static inline int
47__mutex_fastpath_lock_retval(atomic_t *count, fastcall int (*fail_fn)(atomic_t *)) 47__mutex_fastpath_lock_retval(atomic_t *count, int (*fail_fn)(atomic_t *))
48{ 48{
49 int __ex_flag, __res; 49 int __ex_flag, __res;
50 50
@@ -70,7 +70,7 @@ __mutex_fastpath_lock_retval(atomic_t *count, fastcall int (*fail_fn)(atomic_t *
70 * better generated assembly. 70 * better generated assembly.
71 */ 71 */
72static inline void 72static inline void
73__mutex_fastpath_unlock(atomic_t *count, fastcall void (*fail_fn)(atomic_t *)) 73__mutex_fastpath_unlock(atomic_t *count, void (*fail_fn)(atomic_t *))
74{ 74{
75 int __ex_flag, __res, __orig; 75 int __ex_flag, __res, __orig;
76 76
diff --git a/include/asm-arm/page.h b/include/asm-arm/page.h
index 31ff12f4ffb7..c86f68ee6511 100644
--- a/include/asm-arm/page.h
+++ b/include/asm-arm/page.h
@@ -171,6 +171,8 @@ typedef unsigned long pgprot_t;
171 171
172#endif /* STRICT_MM_TYPECHECKS */ 172#endif /* STRICT_MM_TYPECHECKS */
173 173
174typedef struct page *pgtable_t;
175
174#endif /* CONFIG_MMU */ 176#endif /* CONFIG_MMU */
175 177
176#include <asm/memory.h> 178#include <asm/memory.h>
diff --git a/include/asm-arm/pgalloc.h b/include/asm-arm/pgalloc.h
index fb6c6e3222bd..163b0305dd76 100644
--- a/include/asm-arm/pgalloc.h
+++ b/include/asm-arm/pgalloc.h
@@ -66,7 +66,7 @@ pte_alloc_one_kernel(struct mm_struct *mm, unsigned long addr)
66 return pte; 66 return pte;
67} 67}
68 68
69static inline struct page * 69static inline pgtable_t
70pte_alloc_one(struct mm_struct *mm, unsigned long addr) 70pte_alloc_one(struct mm_struct *mm, unsigned long addr)
71{ 71{
72 struct page *pte; 72 struct page *pte;
@@ -75,6 +75,7 @@ pte_alloc_one(struct mm_struct *mm, unsigned long addr)
75 if (pte) { 75 if (pte) {
76 void *page = page_address(pte); 76 void *page = page_address(pte);
77 clean_dcache_area(page, sizeof(pte_t) * PTRS_PER_PTE); 77 clean_dcache_area(page, sizeof(pte_t) * PTRS_PER_PTE);
78 pgtable_page_ctor(pte);
78 } 79 }
79 80
80 return pte; 81 return pte;
@@ -91,8 +92,9 @@ static inline void pte_free_kernel(struct mm_struct *mm, pte_t *pte)
91 } 92 }
92} 93}
93 94
94static inline void pte_free(struct mm_struct *mm, struct page *pte) 95static inline void pte_free(struct mm_struct *mm, pgtable_t pte)
95{ 96{
97 pgtable_page_dtor(pte);
96 __free_page(pte); 98 __free_page(pte);
97} 99}
98 100
@@ -123,10 +125,11 @@ pmd_populate_kernel(struct mm_struct *mm, pmd_t *pmdp, pte_t *ptep)
123} 125}
124 126
125static inline void 127static inline void
126pmd_populate(struct mm_struct *mm, pmd_t *pmdp, struct page *ptep) 128pmd_populate(struct mm_struct *mm, pmd_t *pmdp, pgtable_t ptep)
127{ 129{
128 __pmd_populate(pmdp, page_to_pfn(ptep) << PAGE_SHIFT | _PAGE_USER_TABLE); 130 __pmd_populate(pmdp, page_to_pfn(ptep) << PAGE_SHIFT | _PAGE_USER_TABLE);
129} 131}
132#define pmd_pgtable(pmd) pmd_page(pmd)
130 133
131#endif /* CONFIG_MMU */ 134#endif /* CONFIG_MMU */
132 135
diff --git a/include/asm-arm/posix_types.h b/include/asm-arm/posix_types.h
index e142a2a016ca..c37379dadcb2 100644
--- a/include/asm-arm/posix_types.h
+++ b/include/asm-arm/posix_types.h
@@ -51,14 +51,10 @@ typedef long long __kernel_loff_t;
51#endif 51#endif
52 52
53typedef struct { 53typedef struct {
54#if defined(__KERNEL__) || defined(__USE_ALL)
55 int val[2]; 54 int val[2];
56#else /* !defined(__KERNEL__) && !defined(__USE_ALL) */
57 int __val[2];
58#endif /* !defined(__KERNEL__) && !defined(__USE_ALL) */
59} __kernel_fsid_t; 55} __kernel_fsid_t;
60 56
61#if defined(__KERNEL__) || !defined(__GLIBC__) || (__GLIBC__ < 2) 57#if defined(__KERNEL__)
62 58
63#undef __FD_SET 59#undef __FD_SET
64#define __FD_SET(fd, fdsetp) \ 60#define __FD_SET(fd, fdsetp) \
diff --git a/include/asm-arm/processor.h b/include/asm-arm/processor.h
index 1bbf16182d62..bd8029e8dc67 100644
--- a/include/asm-arm/processor.h
+++ b/include/asm-arm/processor.h
@@ -22,6 +22,12 @@
22#include <asm/ptrace.h> 22#include <asm/ptrace.h>
23#include <asm/types.h> 23#include <asm/types.h>
24 24
25#ifdef __KERNEL__
26#define STACK_TOP ((current->personality == PER_LINUX_32BIT) ? \
27 TASK_SIZE : TASK_SIZE_26)
28#define STACK_TOP_MAX TASK_SIZE
29#endif
30
25union debug_insn { 31union debug_insn {
26 u32 arm; 32 u32 arm;
27 u16 thumb; 33 u16 thumb;
diff --git a/include/asm-avr32/a.out.h b/include/asm-avr32/a.out.h
index 9f398ab28ed0..e46375a34a72 100644
--- a/include/asm-avr32/a.out.h
+++ b/include/asm-avr32/a.out.h
@@ -17,11 +17,4 @@ struct exec
17#define N_DRSIZE(a) ((a).a_drsize) 17#define N_DRSIZE(a) ((a).a_drsize)
18#define N_SYMSIZE(a) ((a).a_syms) 18#define N_SYMSIZE(a) ((a).a_syms)
19 19
20#ifdef __KERNEL__
21
22#define STACK_TOP TASK_SIZE
23#define STACK_TOP_MAX STACK_TOP
24
25#endif
26
27#endif /* __ASM_AVR32_A_OUT_H */ 20#endif /* __ASM_AVR32_A_OUT_H */
diff --git a/include/asm-avr32/arch-at32ap/board.h b/include/asm-avr32/arch-at32ap/board.h
index d6993a6b6473..7597b0bd2f01 100644
--- a/include/asm-avr32/arch-at32ap/board.h
+++ b/include/asm-avr32/arch-at32ap/board.h
@@ -51,6 +51,9 @@ struct platform_device *
51at32_add_device_ide(unsigned int id, unsigned int extint, 51at32_add_device_ide(unsigned int id, unsigned int extint,
52 struct ide_platform_data *data); 52 struct ide_platform_data *data);
53 53
54/* mask says which PWM channels to mux */
55struct platform_device *at32_add_device_pwm(u32 mask);
56
54/* depending on what's hooked up, not all SSC pins will be used */ 57/* depending on what's hooked up, not all SSC pins will be used */
55#define ATMEL_SSC_TK 0x01 58#define ATMEL_SSC_TK 0x01
56#define ATMEL_SSC_TF 0x02 59#define ATMEL_SSC_TF 0x02
diff --git a/include/asm-avr32/page.h b/include/asm-avr32/page.h
index ee23499cec34..5582968feee8 100644
--- a/include/asm-avr32/page.h
+++ b/include/asm-avr32/page.h
@@ -34,6 +34,7 @@ extern void copy_page(void *to, void *from);
34typedef struct { unsigned long pte; } pte_t; 34typedef struct { unsigned long pte; } pte_t;
35typedef struct { unsigned long pgd; } pgd_t; 35typedef struct { unsigned long pgd; } pgd_t;
36typedef struct { unsigned long pgprot; } pgprot_t; 36typedef struct { unsigned long pgprot; } pgprot_t;
37typedef struct page *pgtable_t;
37 38
38#define pte_val(x) ((x).pte) 39#define pte_val(x) ((x).pte)
39#define pgd_val(x) ((x).pgd) 40#define pgd_val(x) ((x).pgd)
diff --git a/include/asm-avr32/pgalloc.h b/include/asm-avr32/pgalloc.h
index b77e364b4c44..51fc1f6e4b17 100644
--- a/include/asm-avr32/pgalloc.h
+++ b/include/asm-avr32/pgalloc.h
@@ -17,10 +17,11 @@
17 set_pmd(pmd, __pmd(_PAGE_TABLE + __pa(pte))) 17 set_pmd(pmd, __pmd(_PAGE_TABLE + __pa(pte)))
18 18
19static __inline__ void pmd_populate(struct mm_struct *mm, pmd_t *pmd, 19static __inline__ void pmd_populate(struct mm_struct *mm, pmd_t *pmd,
20 struct page *pte) 20 pgtable_t pte)
21{ 21{
22 set_pmd(pmd, __pmd(_PAGE_TABLE + page_to_phys(pte))); 22 set_pmd(pmd, __pmd(_PAGE_TABLE + page_to_phys(pte)));
23} 23}
24#define pmd_pgtable(pmd) pmd_page(pmd)
24 25
25/* 26/*
26 * Allocate and free page tables 27 * Allocate and free page tables
@@ -51,7 +52,9 @@ static inline struct page *pte_alloc_one(struct mm_struct *mm,
51 struct page *pte; 52 struct page *pte;
52 53
53 pte = alloc_page(GFP_KERNEL | __GFP_REPEAT | __GFP_ZERO); 54 pte = alloc_page(GFP_KERNEL | __GFP_REPEAT | __GFP_ZERO);
54 55 if (!pte)
56 return NULL;
57 pgtable_page_ctor(pte);
55 return pte; 58 return pte;
56} 59}
57 60
@@ -60,12 +63,17 @@ static inline void pte_free_kernel(struct mm_struct *mm, pte_t *pte)
60 free_page((unsigned long)pte); 63 free_page((unsigned long)pte);
61} 64}
62 65
63static inline void pte_free(struct mm_struct *mm, struct page *pte) 66static inline void pte_free(struct mm_struct *mm, pgtable_t pte)
64{ 67{
68 pgtable_page_dtor(pte);
65 __free_page(pte); 69 __free_page(pte);
66} 70}
67 71
68#define __pte_free_tlb(tlb,pte) tlb_remove_page((tlb),(pte)) 72#define __pte_free_tlb(tlb,pte) \
73do { \
74 pgtable_page_dtor(pte); \
75 tlb_remove_page((tlb), pte); \
76} while (0)
69 77
70#define check_pgt_cache() do { } while(0) 78#define check_pgt_cache() do { } while(0)
71 79
diff --git a/include/asm-avr32/posix_types.h b/include/asm-avr32/posix_types.h
index 9e255b999639..fe0c0c014389 100644
--- a/include/asm-avr32/posix_types.h
+++ b/include/asm-avr32/posix_types.h
@@ -46,11 +46,7 @@ typedef long long __kernel_loff_t;
46#endif 46#endif
47 47
48typedef struct { 48typedef struct {
49#if defined(__KERNEL__) || defined(__USE_ALL)
50 int val[2]; 49 int val[2];
51#else /* !defined(__KERNEL__) && !defined(__USE_ALL) */
52 int __val[2];
53#endif /* !defined(__KERNEL__) && !defined(__USE_ALL) */
54} __kernel_fsid_t; 50} __kernel_fsid_t;
55 51
56#if defined(__KERNEL__) 52#if defined(__KERNEL__)
diff --git a/include/asm-avr32/processor.h b/include/asm-avr32/processor.h
index 4212551c1cd9..49a88f5a9d2f 100644
--- a/include/asm-avr32/processor.h
+++ b/include/asm-avr32/processor.h
@@ -13,6 +13,11 @@
13 13
14#define TASK_SIZE 0x80000000 14#define TASK_SIZE 0x80000000
15 15
16#ifdef __KERNEL__
17#define STACK_TOP TASK_SIZE
18#define STACK_TOP_MAX STACK_TOP
19#endif
20
16#ifndef __ASSEMBLY__ 21#ifndef __ASSEMBLY__
17 22
18static inline void *current_text_addr(void) 23static inline void *current_text_addr(void)
diff --git a/include/asm-blackfin/a.out.h b/include/asm-blackfin/a.out.h
index d37a6849bf74..6c3d652ebd33 100644
--- a/include/asm-blackfin/a.out.h
+++ b/include/asm-blackfin/a.out.h
@@ -16,10 +16,4 @@ struct exec {
16#define N_DRSIZE(a) ((a).a_drsize) 16#define N_DRSIZE(a) ((a).a_drsize)
17#define N_SYMSIZE(a) ((a).a_syms) 17#define N_SYMSIZE(a) ((a).a_syms)
18 18
19#ifdef __KERNEL__
20
21#define STACK_TOP TASK_SIZE
22
23#endif
24
25#endif /* __BFIN_A_OUT_H__ */ 19#endif /* __BFIN_A_OUT_H__ */
diff --git a/include/asm-blackfin/bfin-global.h b/include/asm-blackfin/bfin-global.h
index 6ae0619d7696..5dba3a735596 100644
--- a/include/asm-blackfin/bfin-global.h
+++ b/include/asm-blackfin/bfin-global.h
@@ -70,6 +70,7 @@ extern void program_IAR(void);
70extern void evt14_softirq(void); 70extern void evt14_softirq(void);
71extern asmlinkage void asm_do_IRQ(unsigned int irq, struct pt_regs *regs); 71extern asmlinkage void asm_do_IRQ(unsigned int irq, struct pt_regs *regs);
72extern void bfin_gpio_interrupt_setup(int irq, int irq_pfx, int type); 72extern void bfin_gpio_interrupt_setup(int irq, int irq_pfx, int type);
73extern int bfin_internal_set_wake(unsigned int irq, unsigned int state);
73 74
74extern asmlinkage void finish_atomic_sections (struct pt_regs *regs); 75extern asmlinkage void finish_atomic_sections (struct pt_regs *regs);
75extern char fixed_code_start; 76extern char fixed_code_start;
@@ -121,6 +122,7 @@ extern unsigned long dpdt_swapcount_table[];
121 122
122extern unsigned long table_start, table_end; 123extern unsigned long table_start, table_end;
123 124
125extern unsigned long bfin_sic_iwr[];
124extern u16 _bfin_swrst; /* shadow for Software Reset Register (SWRST) */ 126extern u16 _bfin_swrst; /* shadow for Software Reset Register (SWRST) */
125extern struct file_operations dpmc_fops; 127extern struct file_operations dpmc_fops;
126extern char _start; 128extern char _start;
diff --git a/include/asm-blackfin/bfin5xx_spi.h b/include/asm-blackfin/bfin5xx_spi.h
index 1a0b57f6a3d4..9fa19158e38d 100644
--- a/include/asm-blackfin/bfin5xx_spi.h
+++ b/include/asm-blackfin/bfin5xx_spi.h
@@ -1,6 +1,6 @@
1/************************************************************ 1/************************************************************
2* 2
3* Copyright (C) 2004, Analog Devices. All Rights Reserved 3* Copyright (C) 2006-2008, Analog Devices. All Rights Reserved
4* 4*
5* FILE bfin5xx_spi.h 5* FILE bfin5xx_spi.h
6* PROGRAMMER(S): Luke Yang (Analog Devices Inc.) 6* PROGRAMMER(S): Luke Yang (Analog Devices Inc.)
@@ -32,42 +32,6 @@
32#define SPI_BAUD_OFF 0x14 32#define SPI_BAUD_OFF 0x14
33#define SPI_SHAW_OFF 0x18 33#define SPI_SHAW_OFF 0x18
34 34
35#define CMD_SPI_OUT_ENABLE 1
36#define CMD_SPI_SET_BAUDRATE 2
37#define CMD_SPI_SET_POLAR 3
38#define CMD_SPI_SET_PHASE 4
39#define CMD_SPI_SET_MASTER 5
40#define CMD_SPI_SET_SENDOPT 6
41#define CMD_SPI_SET_RECVOPT 7
42#define CMD_SPI_SET_ORDER 8
43#define CMD_SPI_SET_LENGTH16 9
44#define CMD_SPI_GET_STAT 11
45#define CMD_SPI_GET_CFG 12
46#define CMD_SPI_SET_CSAVAIL 13
47#define CMD_SPI_SET_CSHIGH 14 /* CS unavail */
48#define CMD_SPI_SET_CSLOW 15 /* CS avail */
49#define CMD_SPI_MISO_ENABLE 16
50#define CMD_SPI_SET_CSENABLE 17
51#define CMD_SPI_SET_CSDISABLE 18
52
53#define CMD_SPI_SET_TRIGGER_MODE 19
54#define CMD_SPI_SET_TRIGGER_SENSE 20
55#define CMD_SPI_SET_TRIGGER_EDGE 21
56#define CMD_SPI_SET_TRIGGER_LEVEL 22
57
58#define CMD_SPI_SET_TIME_SPS 23
59#define CMD_SPI_SET_TIME_SAMPLES 24
60#define CMD_SPI_GET_SYSTEMCLOCK 25
61
62#define CMD_SPI_SET_WRITECONTINUOUS 26
63#define CMD_SPI_SET_SKFS 27
64
65#define CMD_SPI_GET_ALLCONFIG 32 /* For debug */
66
67#define SPI_DEFAULT_BARD 0x0100
68
69#define SPI0_IRQ_NUM IRQ_SPI
70#define SPI_ERR_TRIG -1
71 35
72#define BIT_CTL_ENABLE 0x4000 36#define BIT_CTL_ENABLE 0x4000
73#define BIT_CTL_OPENDRAIN 0x2000 37#define BIT_CTL_OPENDRAIN 0x2000
@@ -148,6 +112,10 @@
148#define CFG_SPI_CS6VALUE 6 112#define CFG_SPI_CS6VALUE 6
149#define CFG_SPI_CS7VALUE 7 113#define CFG_SPI_CS7VALUE 7
150 114
115#define CMD_SPI_SET_BAUDRATE 2
116#define CMD_SPI_GET_SYSTEMCLOCK 25
117#define CMD_SPI_SET_WRITECONTINUOUS 26
118
151/* device.platform_data for SSP controller devices */ 119/* device.platform_data for SSP controller devices */
152struct bfin5xx_spi_master { 120struct bfin5xx_spi_master {
153 u16 num_chipselect; 121 u16 num_chipselect;
diff --git a/include/asm-blackfin/dpmc.h b/include/asm-blackfin/dpmc.h
index f162edb23033..686cf83a5269 100644
--- a/include/asm-blackfin/dpmc.h
+++ b/include/asm-blackfin/dpmc.h
@@ -53,10 +53,10 @@ unsigned long get_pll_status(void);
53void change_baud(int baud); 53void change_baud(int baud);
54void fullon_mode(void); 54void fullon_mode(void);
55void active_mode(void); 55void active_mode(void);
56void sleep_mode(u32 sic_iwr); 56void sleep_mode(u32 sic_iwr0, u32 sic_iwr1, u32 sic_iwr2);
57void deep_sleep(u32 sic_iwr); 57void deep_sleep(u32 sic_iwr0, u32 sic_iwr1, u32 sic_iwr2);
58void hibernate_mode(u32 sic_iwr); 58void hibernate_mode(u32 sic_iwr0, u32 sic_iwr1, u32 sic_iwr2);
59void sleep_deeper(u32 sic_iwr); 59void sleep_deeper(u32 sic_iwr0, u32 sic_iwr1, u32 sic_iwr2);
60void program_wdog_timer(unsigned long); 60void program_wdog_timer(unsigned long);
61void unmask_wdog_wakeup_evt(void); 61void unmask_wdog_wakeup_evt(void);
62void clear_wdog_wakeup_evt(void); 62void clear_wdog_wakeup_evt(void);
diff --git a/include/asm-blackfin/gpio.h b/include/asm-blackfin/gpio.h
index d0426c108262..27ff532a806c 100644
--- a/include/asm-blackfin/gpio.h
+++ b/include/asm-blackfin/gpio.h
@@ -376,16 +376,19 @@ struct gpio_port_t {
376#endif 376#endif
377 377
378#ifdef CONFIG_PM 378#ifdef CONFIG_PM
379unsigned int bfin_pm_setup(void);
380void bfin_pm_restore(void);
381
382#ifndef CONFIG_BF54x
379#define PM_WAKE_RISING 0x1 383#define PM_WAKE_RISING 0x1
380#define PM_WAKE_FALLING 0x2 384#define PM_WAKE_FALLING 0x2
381#define PM_WAKE_HIGH 0x4 385#define PM_WAKE_HIGH 0x4
382#define PM_WAKE_LOW 0x8 386#define PM_WAKE_LOW 0x8
383#define PM_WAKE_BOTH_EDGES (PM_WAKE_RISING | PM_WAKE_FALLING) 387#define PM_WAKE_BOTH_EDGES (PM_WAKE_RISING | PM_WAKE_FALLING)
388#define PM_WAKE_IGNORE 0xF0
384 389
385int gpio_pm_wakeup_request(unsigned gpio, unsigned char type); 390int gpio_pm_wakeup_request(unsigned gpio, unsigned char type);
386void gpio_pm_wakeup_free(unsigned gpio); 391void gpio_pm_wakeup_free(unsigned gpio);
387unsigned int gpio_pm_setup(void);
388void gpio_pm_restore(void);
389 392
390struct gpio_port_s { 393struct gpio_port_s {
391 unsigned short data; 394 unsigned short data;
@@ -409,6 +412,7 @@ struct gpio_port_s {
409 unsigned short fer; 412 unsigned short fer;
410 unsigned short reserved; 413 unsigned short reserved;
411}; 414};
415#endif /*CONFIG_BF54x*/
412#endif /*CONFIG_PM*/ 416#endif /*CONFIG_PM*/
413 417
414/*********************************************************** 418/***********************************************************
diff --git a/include/asm-blackfin/mach-bf548/blackfin.h b/include/asm-blackfin/mach-bf548/blackfin.h
index 19e84dd4c99c..3bd67da86053 100644
--- a/include/asm-blackfin/mach-bf548/blackfin.h
+++ b/include/asm-blackfin/mach-bf548/blackfin.h
@@ -46,6 +46,10 @@
46#include "defBF544.h" 46#include "defBF544.h"
47#endif 47#endif
48 48
49#ifdef CONFIG_BF547
50#include "defBF547.h"
51#endif
52
49#ifdef CONFIG_BF548 53#ifdef CONFIG_BF548
50#include "defBF548.h" 54#include "defBF548.h"
51#endif 55#endif
@@ -58,10 +62,12 @@
58#ifdef CONFIG_BF542 62#ifdef CONFIG_BF542
59#include "cdefBF542.h" 63#include "cdefBF542.h"
60#endif 64#endif
61
62#ifdef CONFIG_BF544 65#ifdef CONFIG_BF544
63#include "cdefBF544.h" 66#include "cdefBF544.h"
64#endif 67#endif
68#ifdef CONFIG_BF547
69#include "cdefBF547.h"
70#endif
65#ifdef CONFIG_BF548 71#ifdef CONFIG_BF548
66#include "cdefBF548.h" 72#include "cdefBF548.h"
67#endif 73#endif
diff --git a/include/asm-blackfin/mach-bf548/cdefBF547.h b/include/asm-blackfin/mach-bf548/cdefBF547.h
new file mode 100644
index 000000000000..d0a200b08abd
--- /dev/null
+++ b/include/asm-blackfin/mach-bf548/cdefBF547.h
@@ -0,0 +1,865 @@
1/*
2 * File: include/asm-blackfin/mach-bf548/cdefBF547.h
3 * Based on:
4 * Author:
5 *
6 * Created:
7 * Description:
8 *
9 * Rev:
10 *
11 * Modified:
12 *
13 * Bugs: Enter bugs at http://blackfin.uclinux.org/
14 *
15 * This program is free software; you can redistribute it and/or modify
16 * it under the terms of the GNU General Public License as published by
17 * the Free Software Foundation; either version 2, or (at your option)
18 * any later version.
19 *
20 * This program is distributed in the hope that it will be useful,
21 * but WITHOUT ANY WARRANTY; without even the implied warranty of
22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
23 * GNU General Public License for more details.
24 *
25 * You should have received a copy of the GNU General Public License
26 * along with this program; see the file COPYING.
27 * If not, write to the Free Software Foundation,
28 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
29 */
30
31#ifndef _CDEF_BF548_H
32#define _CDEF_BF548_H
33
34/* include all Core registers and bit definitions */
35#include "defBF548.h"
36
37/* include core sbfin_read_()ecific register pointer definitions */
38#include <asm/mach-common/cdef_LPBlackfin.h>
39
40/* SYSTEM & MMR ADDRESS DEFINITIONS FOR ADSP-BF548 */
41
42/* include cdefBF54x_base.h for the set of #defines that are common to all ADSP-BF54x bfin_read_()rocessors */
43#include "cdefBF54x_base.h"
44
45/* The following are the #defines needed by ADSP-BF548 that are not in the common header */
46
47/* Timer Registers */
48
49#define bfin_read_TIMER8_CONFIG() bfin_read16(TIMER8_CONFIG)
50#define bfin_write_TIMER8_CONFIG(val) bfin_write16(TIMER8_CONFIG, val)
51#define bfin_read_TIMER8_COUNTER() bfin_read32(TIMER8_COUNTER)
52#define bfin_write_TIMER8_COUNTER(val) bfin_write32(TIMER8_COUNTER, val)
53#define bfin_read_TIMER8_PERIOD() bfin_read32(TIMER8_PERIOD)
54#define bfin_write_TIMER8_PERIOD(val) bfin_write32(TIMER8_PERIOD, val)
55#define bfin_read_TIMER8_WIDTH() bfin_read32(TIMER8_WIDTH)
56#define bfin_write_TIMER8_WIDTH(val) bfin_write32(TIMER8_WIDTH, val)
57#define bfin_read_TIMER9_CONFIG() bfin_read16(TIMER9_CONFIG)
58#define bfin_write_TIMER9_CONFIG(val) bfin_write16(TIMER9_CONFIG, val)
59#define bfin_read_TIMER9_COUNTER() bfin_read32(TIMER9_COUNTER)
60#define bfin_write_TIMER9_COUNTER(val) bfin_write32(TIMER9_COUNTER, val)
61#define bfin_read_TIMER9_PERIOD() bfin_read32(TIMER9_PERIOD)
62#define bfin_write_TIMER9_PERIOD(val) bfin_write32(TIMER9_PERIOD, val)
63#define bfin_read_TIMER9_WIDTH() bfin_read32(TIMER9_WIDTH)
64#define bfin_write_TIMER9_WIDTH(val) bfin_write32(TIMER9_WIDTH, val)
65#define bfin_read_TIMER10_CONFIG() bfin_read16(TIMER10_CONFIG)
66#define bfin_write_TIMER10_CONFIG(val) bfin_write16(TIMER10_CONFIG, val)
67#define bfin_read_TIMER10_COUNTER() bfin_read32(TIMER10_COUNTER)
68#define bfin_write_TIMER10_COUNTER(val) bfin_write32(TIMER10_COUNTER, val)
69#define bfin_read_TIMER10_PERIOD() bfin_read32(TIMER10_PERIOD)
70#define bfin_write_TIMER10_PERIOD(val) bfin_write32(TIMER10_PERIOD, val)
71#define bfin_read_TIMER10_WIDTH() bfin_read32(TIMER10_WIDTH)
72#define bfin_write_TIMER10_WIDTH(val) bfin_write32(TIMER10_WIDTH, val)
73
74/* Timer Groubfin_read_() of 3 */
75
76#define bfin_read_TIMER_ENABLE1() bfin_read16(TIMER_ENABLE1)
77#define bfin_write_TIMER_ENABLE1(val) bfin_write16(TIMER_ENABLE1, val)
78#define bfin_read_TIMER_DISABLE1() bfin_read16(TIMER_DISABLE1)
79#define bfin_write_TIMER_DISABLE1(val) bfin_write16(TIMER_DISABLE1, val)
80#define bfin_read_TIMER_STATUS1() bfin_read32(TIMER_STATUS1)
81#define bfin_write_TIMER_STATUS1(val) bfin_write32(TIMER_STATUS1, val)
82
83/* SPORT0 Registers */
84
85#define bfin_read_SPORT0_TCR1() bfin_read16(SPORT0_TCR1)
86#define bfin_write_SPORT0_TCR1(val) bfin_write16(SPORT0_TCR1, val)
87#define bfin_read_SPORT0_TCR2() bfin_read16(SPORT0_TCR2)
88#define bfin_write_SPORT0_TCR2(val) bfin_write16(SPORT0_TCR2, val)
89#define bfin_read_SPORT0_TCLKDIV() bfin_read16(SPORT0_TCLKDIV)
90#define bfin_write_SPORT0_TCLKDIV(val) bfin_write16(SPORT0_TCLKDIV, val)
91#define bfin_read_SPORT0_TFSDIV() bfin_read16(SPORT0_TFSDIV)
92#define bfin_write_SPORT0_TFSDIV(val) bfin_write16(SPORT0_TFSDIV, val)
93#define bfin_read_SPORT0_TX() bfin_read32(SPORT0_TX)
94#define bfin_write_SPORT0_TX(val) bfin_write32(SPORT0_TX, val)
95#define bfin_read_SPORT0_RX() bfin_read32(SPORT0_RX)
96#define bfin_write_SPORT0_RX(val) bfin_write32(SPORT0_RX, val)
97#define bfin_read_SPORT0_RCR1() bfin_read16(SPORT0_RCR1)
98#define bfin_write_SPORT0_RCR1(val) bfin_write16(SPORT0_RCR1, val)
99#define bfin_read_SPORT0_RCR2() bfin_read16(SPORT0_RCR2)
100#define bfin_write_SPORT0_RCR2(val) bfin_write16(SPORT0_RCR2, val)
101#define bfin_read_SPORT0_RCLKDIV() bfin_read16(SPORT0_RCLKDIV)
102#define bfin_write_SPORT0_RCLKDIV(val) bfin_write16(SPORT0_RCLKDIV, val)
103#define bfin_read_SPORT0_RFSDIV() bfin_read16(SPORT0_RFSDIV)
104#define bfin_write_SPORT0_RFSDIV(val) bfin_write16(SPORT0_RFSDIV, val)
105#define bfin_read_SPORT0_STAT() bfin_read16(SPORT0_STAT)
106#define bfin_write_SPORT0_STAT(val) bfin_write16(SPORT0_STAT, val)
107#define bfin_read_SPORT0_CHNL() bfin_read16(SPORT0_CHNL)
108#define bfin_write_SPORT0_CHNL(val) bfin_write16(SPORT0_CHNL, val)
109#define bfin_read_SPORT0_MCMC1() bfin_read16(SPORT0_MCMC1)
110#define bfin_write_SPORT0_MCMC1(val) bfin_write16(SPORT0_MCMC1, val)
111#define bfin_read_SPORT0_MCMC2() bfin_read16(SPORT0_MCMC2)
112#define bfin_write_SPORT0_MCMC2(val) bfin_write16(SPORT0_MCMC2, val)
113#define bfin_read_SPORT0_MTCS0() bfin_read32(SPORT0_MTCS0)
114#define bfin_write_SPORT0_MTCS0(val) bfin_write32(SPORT0_MTCS0, val)
115#define bfin_read_SPORT0_MTCS1() bfin_read32(SPORT0_MTCS1)
116#define bfin_write_SPORT0_MTCS1(val) bfin_write32(SPORT0_MTCS1, val)
117#define bfin_read_SPORT0_MTCS2() bfin_read32(SPORT0_MTCS2)
118#define bfin_write_SPORT0_MTCS2(val) bfin_write32(SPORT0_MTCS2, val)
119#define bfin_read_SPORT0_MTCS3() bfin_read32(SPORT0_MTCS3)
120#define bfin_write_SPORT0_MTCS3(val) bfin_write32(SPORT0_MTCS3, val)
121#define bfin_read_SPORT0_MRCS0() bfin_read32(SPORT0_MRCS0)
122#define bfin_write_SPORT0_MRCS0(val) bfin_write32(SPORT0_MRCS0, val)
123#define bfin_read_SPORT0_MRCS1() bfin_read32(SPORT0_MRCS1)
124#define bfin_write_SPORT0_MRCS1(val) bfin_write32(SPORT0_MRCS1, val)
125#define bfin_read_SPORT0_MRCS2() bfin_read32(SPORT0_MRCS2)
126#define bfin_write_SPORT0_MRCS2(val) bfin_write32(SPORT0_MRCS2, val)
127#define bfin_read_SPORT0_MRCS3() bfin_read32(SPORT0_MRCS3)
128#define bfin_write_SPORT0_MRCS3(val) bfin_write32(SPORT0_MRCS3, val)
129
130/* EPPI0 Registers */
131
132#define bfin_read_EPPI0_STATUS() bfin_read16(EPPI0_STATUS)
133#define bfin_write_EPPI0_STATUS(val) bfin_write16(EPPI0_STATUS, val)
134#define bfin_read_EPPI0_HCOUNT() bfin_read16(EPPI0_HCOUNT)
135#define bfin_write_EPPI0_HCOUNT(val) bfin_write16(EPPI0_HCOUNT, val)
136#define bfin_read_EPPI0_HDELAY() bfin_read16(EPPI0_HDELAY)
137#define bfin_write_EPPI0_HDELAY(val) bfin_write16(EPPI0_HDELAY, val)
138#define bfin_read_EPPI0_VCOUNT() bfin_read16(EPPI0_VCOUNT)
139#define bfin_write_EPPI0_VCOUNT(val) bfin_write16(EPPI0_VCOUNT, val)
140#define bfin_read_EPPI0_VDELAY() bfin_read16(EPPI0_VDELAY)
141#define bfin_write_EPPI0_VDELAY(val) bfin_write16(EPPI0_VDELAY, val)
142#define bfin_read_EPPI0_FRAME() bfin_read16(EPPI0_FRAME)
143#define bfin_write_EPPI0_FRAME(val) bfin_write16(EPPI0_FRAME, val)
144#define bfin_read_EPPI0_LINE() bfin_read16(EPPI0_LINE)
145#define bfin_write_EPPI0_LINE(val) bfin_write16(EPPI0_LINE, val)
146#define bfin_read_EPPI0_CLKDIV() bfin_read16(EPPI0_CLKDIV)
147#define bfin_write_EPPI0_CLKDIV(val) bfin_write16(EPPI0_CLKDIV, val)
148#define bfin_read_EPPI0_CONTROL() bfin_read32(EPPI0_CONTROL)
149#define bfin_write_EPPI0_CONTROL(val) bfin_write32(EPPI0_CONTROL, val)
150#define bfin_read_EPPI0_FS1W_HBL() bfin_read32(EPPI0_FS1W_HBL)
151#define bfin_write_EPPI0_FS1W_HBL(val) bfin_write32(EPPI0_FS1W_HBL, val)
152#define bfin_read_EPPI0_FS1P_AVPL() bfin_read32(EPPI0_FS1P_AVPL)
153#define bfin_write_EPPI0_FS1P_AVPL(val) bfin_write32(EPPI0_FS1P_AVPL, val)
154#define bfin_read_EPPI0_FS2W_LVB() bfin_read32(EPPI0_FS2W_LVB)
155#define bfin_write_EPPI0_FS2W_LVB(val) bfin_write32(EPPI0_FS2W_LVB, val)
156#define bfin_read_EPPI0_FS2P_LAVF() bfin_read32(EPPI0_FS2P_LAVF)
157#define bfin_write_EPPI0_FS2P_LAVF(val) bfin_write32(EPPI0_FS2P_LAVF, val)
158#define bfin_read_EPPI0_CLIP() bfin_read32(EPPI0_CLIP)
159#define bfin_write_EPPI0_CLIP(val) bfin_write32(EPPI0_CLIP, val)
160
161/* UART2 Registers */
162
163#define bfin_read_UART2_DLL() bfin_read16(UART2_DLL)
164#define bfin_write_UART2_DLL(val) bfin_write16(UART2_DLL, val)
165#define bfin_read_UART2_DLH() bfin_read16(UART2_DLH)
166#define bfin_write_UART2_DLH(val) bfin_write16(UART2_DLH, val)
167#define bfin_read_UART2_GCTL() bfin_read16(UART2_GCTL)
168#define bfin_write_UART2_GCTL(val) bfin_write16(UART2_GCTL, val)
169#define bfin_read_UART2_LCR() bfin_read16(UART2_LCR)
170#define bfin_write_UART2_LCR(val) bfin_write16(UART2_LCR, val)
171#define bfin_read_UART2_MCR() bfin_read16(UART2_MCR)
172#define bfin_write_UART2_MCR(val) bfin_write16(UART2_MCR, val)
173#define bfin_read_UART2_LSR() bfin_read16(UART2_LSR)
174#define bfin_write_UART2_LSR(val) bfin_write16(UART2_LSR, val)
175#define bfin_read_UART2_MSR() bfin_read16(UART2_MSR)
176#define bfin_write_UART2_MSR(val) bfin_write16(UART2_MSR, val)
177#define bfin_read_UART2_SCR() bfin_read16(UART2_SCR)
178#define bfin_write_UART2_SCR(val) bfin_write16(UART2_SCR, val)
179#define bfin_read_UART2_IER_SET() bfin_read16(UART2_IER_SET)
180#define bfin_write_UART2_IER_SET(val) bfin_write16(UART2_IER_SET, val)
181#define bfin_read_UART2_IER_CLEAR() bfin_read16(UART2_IER_CLEAR)
182#define bfin_write_UART2_IER_CLEAR(val) bfin_write16(UART2_IER_CLEAR, val)
183#define bfin_read_UART2_RBR() bfin_read16(UART2_RBR)
184#define bfin_write_UART2_RBR(val) bfin_write16(UART2_RBR, val)
185
186/* Two Wire Interface Registers (TWI1) */
187
188#define bfin_read_TWI1_CLKDIV() bfin_read16(TWI1_CLKDIV)
189#define bfin_write_TWI1_CLKDIV(val) bfin_write16(TWI1_CLKDIV, val)
190#define bfin_read_TWI1_CONTROL() bfin_read16(TWI1_CONTROL)
191#define bfin_write_TWI1_CONTROL(val) bfin_write16(TWI1_CONTROL, val)
192#define bfin_read_TWI1_SLAVE_CTRL() bfin_read16(TWI1_SLAVE_CTRL)
193#define bfin_write_TWI1_SLAVE_CTRL(val) bfin_write16(TWI1_SLAVE_CTRL, val)
194#define bfin_read_TWI1_SLAVE_STAT() bfin_read16(TWI1_SLAVE_STAT)
195#define bfin_write_TWI1_SLAVE_STAT(val) bfin_write16(TWI1_SLAVE_STAT, val)
196#define bfin_read_TWI1_SLAVE_ADDR() bfin_read16(TWI1_SLAVE_ADDR)
197#define bfin_write_TWI1_SLAVE_ADDR(val) bfin_write16(TWI1_SLAVE_ADDR, val)
198#define bfin_read_TWI1_MASTER_CTRL() bfin_read16(TWI1_MASTER_CTRL)
199#define bfin_write_TWI1_MASTER_CTRL(val) bfin_write16(TWI1_MASTER_CTRL, val)
200#define bfin_read_TWI1_MASTER_STAT() bfin_read16(TWI1_MASTER_STAT)
201#define bfin_write_TWI1_MASTER_STAT(val) bfin_write16(TWI1_MASTER_STAT, val)
202#define bfin_read_TWI1_MASTER_ADDR() bfin_read16(TWI1_MASTER_ADDR)
203#define bfin_write_TWI1_MASTER_ADDR(val) bfin_write16(TWI1_MASTER_ADDR, val)
204#define bfin_read_TWI1_INT_STAT() bfin_read16(TWI1_INT_STAT)
205#define bfin_write_TWI1_INT_STAT(val) bfin_write16(TWI1_INT_STAT, val)
206#define bfin_read_TWI1_INT_MASK() bfin_read16(TWI1_INT_MASK)
207#define bfin_write_TWI1_INT_MASK(val) bfin_write16(TWI1_INT_MASK, val)
208#define bfin_read_TWI1_FIFO_CTRL() bfin_read16(TWI1_FIFO_CTRL)
209#define bfin_write_TWI1_FIFO_CTRL(val) bfin_write16(TWI1_FIFO_CTRL, val)
210#define bfin_read_TWI1_FIFO_STAT() bfin_read16(TWI1_FIFO_STAT)
211#define bfin_write_TWI1_FIFO_STAT(val) bfin_write16(TWI1_FIFO_STAT, val)
212#define bfin_read_TWI1_XMT_DATA8() bfin_read16(TWI1_XMT_DATA8)
213#define bfin_write_TWI1_XMT_DATA8(val) bfin_write16(TWI1_XMT_DATA8, val)
214#define bfin_read_TWI1_XMT_DATA16() bfin_read16(TWI1_XMT_DATA16)
215#define bfin_write_TWI1_XMT_DATA16(val) bfin_write16(TWI1_XMT_DATA16, val)
216#define bfin_read_TWI1_RCV_DATA8() bfin_read16(TWI1_RCV_DATA8)
217#define bfin_write_TWI1_RCV_DATA8(val) bfin_write16(TWI1_RCV_DATA8, val)
218#define bfin_read_TWI1_RCV_DATA16() bfin_read16(TWI1_RCV_DATA16)
219#define bfin_write_TWI1_RCV_DATA16(val) bfin_write16(TWI1_RCV_DATA16, val)
220
221/* SPI2 Registers */
222
223#define bfin_read_SPI2_CTL() bfin_read16(SPI2_CTL)
224#define bfin_write_SPI2_CTL(val) bfin_write16(SPI2_CTL, val)
225#define bfin_read_SPI2_FLG() bfin_read16(SPI2_FLG)
226#define bfin_write_SPI2_FLG(val) bfin_write16(SPI2_FLG, val)
227#define bfin_read_SPI2_STAT() bfin_read16(SPI2_STAT)
228#define bfin_write_SPI2_STAT(val) bfin_write16(SPI2_STAT, val)
229#define bfin_read_SPI2_TDBR() bfin_read16(SPI2_TDBR)
230#define bfin_write_SPI2_TDBR(val) bfin_write16(SPI2_TDBR, val)
231#define bfin_read_SPI2_RDBR() bfin_read16(SPI2_RDBR)
232#define bfin_write_SPI2_RDBR(val) bfin_write16(SPI2_RDBR, val)
233#define bfin_read_SPI2_BAUD() bfin_read16(SPI2_BAUD)
234#define bfin_write_SPI2_BAUD(val) bfin_write16(SPI2_BAUD, val)
235#define bfin_read_SPI2_SHADOW() bfin_read16(SPI2_SHADOW)
236#define bfin_write_SPI2_SHADOW(val) bfin_write16(SPI2_SHADOW, val)
237
238/* ATAPI Registers */
239
240#define bfin_read_ATAPI_CONTROL() bfin_read16(ATAPI_CONTROL)
241#define bfin_write_ATAPI_CONTROL(val) bfin_write16(ATAPI_CONTROL, val)
242#define bfin_read_ATAPI_STATUS() bfin_read16(ATAPI_STATUS)
243#define bfin_write_ATAPI_STATUS(val) bfin_write16(ATAPI_STATUS, val)
244#define bfin_read_ATAPI_DEV_ADDR() bfin_read16(ATAPI_DEV_ADDR)
245#define bfin_write_ATAPI_DEV_ADDR(val) bfin_write16(ATAPI_DEV_ADDR, val)
246#define bfin_read_ATAPI_DEV_TXBUF() bfin_read16(ATAPI_DEV_TXBUF)
247#define bfin_write_ATAPI_DEV_TXBUF(val) bfin_write16(ATAPI_DEV_TXBUF, val)
248#define bfin_read_ATAPI_DEV_RXBUF() bfin_read16(ATAPI_DEV_RXBUF)
249#define bfin_write_ATAPI_DEV_RXBUF(val) bfin_write16(ATAPI_DEV_RXBUF, val)
250#define bfin_read_ATAPI_INT_MASK() bfin_read16(ATAPI_INT_MASK)
251#define bfin_write_ATAPI_INT_MASK(val) bfin_write16(ATAPI_INT_MASK, val)
252#define bfin_read_ATAPI_INT_STATUS() bfin_read16(ATAPI_INT_STATUS)
253#define bfin_write_ATAPI_INT_STATUS(val) bfin_write16(ATAPI_INT_STATUS, val)
254#define bfin_read_ATAPI_XFER_LEN() bfin_read16(ATAPI_XFER_LEN)
255#define bfin_write_ATAPI_XFER_LEN(val) bfin_write16(ATAPI_XFER_LEN, val)
256#define bfin_read_ATAPI_LINE_STATUS() bfin_read16(ATAPI_LINE_STATUS)
257#define bfin_write_ATAPI_LINE_STATUS(val) bfin_write16(ATAPI_LINE_STATUS, val)
258#define bfin_read_ATAPI_SM_STATE() bfin_read16(ATAPI_SM_STATE)
259#define bfin_write_ATAPI_SM_STATE(val) bfin_write16(ATAPI_SM_STATE, val)
260#define bfin_read_ATAPI_TERMINATE() bfin_read16(ATAPI_TERMINATE)
261#define bfin_write_ATAPI_TERMINATE(val) bfin_write16(ATAPI_TERMINATE, val)
262#define bfin_read_ATAPI_PIO_TFRCNT() bfin_read16(ATAPI_PIO_TFRCNT)
263#define bfin_write_ATAPI_PIO_TFRCNT(val) bfin_write16(ATAPI_PIO_TFRCNT, val)
264#define bfin_read_ATAPI_DMA_TFRCNT() bfin_read16(ATAPI_DMA_TFRCNT)
265#define bfin_write_ATAPI_DMA_TFRCNT(val) bfin_write16(ATAPI_DMA_TFRCNT, val)
266#define bfin_read_ATAPI_UMAIN_TFRCNT() bfin_read16(ATAPI_UMAIN_TFRCNT)
267#define bfin_write_ATAPI_UMAIN_TFRCNT(val) bfin_write16(ATAPI_UMAIN_TFRCNT, val)
268#define bfin_read_ATAPI_UDMAOUT_TFRCNT() bfin_read16(ATAPI_UDMAOUT_TFRCNT)
269#define bfin_write_ATAPI_UDMAOUT_TFRCNT(val) bfin_write16(ATAPI_UDMAOUT_TFRCNT, val)
270#define bfin_read_ATAPI_REG_TIM_0() bfin_read16(ATAPI_REG_TIM_0)
271#define bfin_write_ATAPI_REG_TIM_0(val) bfin_write16(ATAPI_REG_TIM_0, val)
272#define bfin_read_ATAPI_PIO_TIM_0() bfin_read16(ATAPI_PIO_TIM_0)
273#define bfin_write_ATAPI_PIO_TIM_0(val) bfin_write16(ATAPI_PIO_TIM_0, val)
274#define bfin_read_ATAPI_PIO_TIM_1() bfin_read16(ATAPI_PIO_TIM_1)
275#define bfin_write_ATAPI_PIO_TIM_1(val) bfin_write16(ATAPI_PIO_TIM_1, val)
276#define bfin_read_ATAPI_MULTI_TIM_0() bfin_read16(ATAPI_MULTI_TIM_0)
277#define bfin_write_ATAPI_MULTI_TIM_0(val) bfin_write16(ATAPI_MULTI_TIM_0, val)
278#define bfin_read_ATAPI_MULTI_TIM_1() bfin_read16(ATAPI_MULTI_TIM_1)
279#define bfin_write_ATAPI_MULTI_TIM_1(val) bfin_write16(ATAPI_MULTI_TIM_1, val)
280#define bfin_read_ATAPI_MULTI_TIM_2() bfin_read16(ATAPI_MULTI_TIM_2)
281#define bfin_write_ATAPI_MULTI_TIM_2(val) bfin_write16(ATAPI_MULTI_TIM_2, val)
282#define bfin_read_ATAPI_ULTRA_TIM_0() bfin_read16(ATAPI_ULTRA_TIM_0)
283#define bfin_write_ATAPI_ULTRA_TIM_0(val) bfin_write16(ATAPI_ULTRA_TIM_0, val)
284#define bfin_read_ATAPI_ULTRA_TIM_1() bfin_read16(ATAPI_ULTRA_TIM_1)
285#define bfin_write_ATAPI_ULTRA_TIM_1(val) bfin_write16(ATAPI_ULTRA_TIM_1, val)
286#define bfin_read_ATAPI_ULTRA_TIM_2() bfin_read16(ATAPI_ULTRA_TIM_2)
287#define bfin_write_ATAPI_ULTRA_TIM_2(val) bfin_write16(ATAPI_ULTRA_TIM_2, val)
288#define bfin_read_ATAPI_ULTRA_TIM_3() bfin_read16(ATAPI_ULTRA_TIM_3)
289#define bfin_write_ATAPI_ULTRA_TIM_3(val) bfin_write16(ATAPI_ULTRA_TIM_3, val)
290
291/* SDH Registers */
292
293#define bfin_read_SDH_PWR_CTL() bfin_read16(SDH_PWR_CTL)
294#define bfin_write_SDH_PWR_CTL(val) bfin_write16(SDH_PWR_CTL, val)
295#define bfin_read_SDH_CLK_CTL() bfin_read16(SDH_CLK_CTL)
296#define bfin_write_SDH_CLK_CTL(val) bfin_write16(SDH_CLK_CTL, val)
297#define bfin_read_SDH_ARGUMENT() bfin_read32(SDH_ARGUMENT)
298#define bfin_write_SDH_ARGUMENT(val) bfin_write32(SDH_ARGUMENT, val)
299#define bfin_read_SDH_COMMAND() bfin_read16(SDH_COMMAND)
300#define bfin_write_SDH_COMMAND(val) bfin_write16(SDH_COMMAND, val)
301#define bfin_read_SDH_RESP_CMD() bfin_read16(SDH_RESP_CMD)
302#define bfin_write_SDH_RESP_CMD(val) bfin_write16(SDH_RESP_CMD, val)
303#define bfin_read_SDH_RESPONSE0() bfin_read32(SDH_RESPONSE0)
304#define bfin_write_SDH_RESPONSE0(val) bfin_write32(SDH_RESPONSE0, val)
305#define bfin_read_SDH_RESPONSE1() bfin_read32(SDH_RESPONSE1)
306#define bfin_write_SDH_RESPONSE1(val) bfin_write32(SDH_RESPONSE1, val)
307#define bfin_read_SDH_RESPONSE2() bfin_read32(SDH_RESPONSE2)
308#define bfin_write_SDH_RESPONSE2(val) bfin_write32(SDH_RESPONSE2, val)
309#define bfin_read_SDH_RESPONSE3() bfin_read32(SDH_RESPONSE3)
310#define bfin_write_SDH_RESPONSE3(val) bfin_write32(SDH_RESPONSE3, val)
311#define bfin_read_SDH_DATA_TIMER() bfin_read32(SDH_DATA_TIMER)
312#define bfin_write_SDH_DATA_TIMER(val) bfin_write32(SDH_DATA_TIMER, val)
313#define bfin_read_SDH_DATA_LGTH() bfin_read16(SDH_DATA_LGTH)
314#define bfin_write_SDH_DATA_LGTH(val) bfin_write16(SDH_DATA_LGTH, val)
315#define bfin_read_SDH_DATA_CTL() bfin_read16(SDH_DATA_CTL)
316#define bfin_write_SDH_DATA_CTL(val) bfin_write16(SDH_DATA_CTL, val)
317#define bfin_read_SDH_DATA_CNT() bfin_read16(SDH_DATA_CNT)
318#define bfin_write_SDH_DATA_CNT(val) bfin_write16(SDH_DATA_CNT, val)
319#define bfin_read_SDH_STATUS() bfin_read32(SDH_STATUS)
320#define bfin_write_SDH_STATUS(val) bfin_write32(SDH_STATUS, val)
321#define bfin_read_SDH_STATUS_CLR() bfin_read16(SDH_STATUS_CLR)
322#define bfin_write_SDH_STATUS_CLR(val) bfin_write16(SDH_STATUS_CLR, val)
323#define bfin_read_SDH_MASK0() bfin_read32(SDH_MASK0)
324#define bfin_write_SDH_MASK0(val) bfin_write32(SDH_MASK0, val)
325#define bfin_read_SDH_MASK1() bfin_read32(SDH_MASK1)
326#define bfin_write_SDH_MASK1(val) bfin_write32(SDH_MASK1, val)
327#define bfin_read_SDH_FIFO_CNT() bfin_read16(SDH_FIFO_CNT)
328#define bfin_write_SDH_FIFO_CNT(val) bfin_write16(SDH_FIFO_CNT, val)
329#define bfin_read_SDH_FIFO() bfin_read32(SDH_FIFO)
330#define bfin_write_SDH_FIFO(val) bfin_write32(SDH_FIFO, val)
331#define bfin_read_SDH_E_STATUS() bfin_read16(SDH_E_STATUS)
332#define bfin_write_SDH_E_STATUS(val) bfin_write16(SDH_E_STATUS, val)
333#define bfin_read_SDH_E_MASK() bfin_read16(SDH_E_MASK)
334#define bfin_write_SDH_E_MASK(val) bfin_write16(SDH_E_MASK, val)
335#define bfin_read_SDH_CFG() bfin_read16(SDH_CFG)
336#define bfin_write_SDH_CFG(val) bfin_write16(SDH_CFG, val)
337#define bfin_read_SDH_RD_WAIT_EN() bfin_read16(SDH_RD_WAIT_EN)
338#define bfin_write_SDH_RD_WAIT_EN(val) bfin_write16(SDH_RD_WAIT_EN, val)
339#define bfin_read_SDH_PID0() bfin_read16(SDH_PID0)
340#define bfin_write_SDH_PID0(val) bfin_write16(SDH_PID0, val)
341#define bfin_read_SDH_PID1() bfin_read16(SDH_PID1)
342#define bfin_write_SDH_PID1(val) bfin_write16(SDH_PID1, val)
343#define bfin_read_SDH_PID2() bfin_read16(SDH_PID2)
344#define bfin_write_SDH_PID2(val) bfin_write16(SDH_PID2, val)
345#define bfin_read_SDH_PID3() bfin_read16(SDH_PID3)
346#define bfin_write_SDH_PID3(val) bfin_write16(SDH_PID3, val)
347#define bfin_read_SDH_PID4() bfin_read16(SDH_PID4)
348#define bfin_write_SDH_PID4(val) bfin_write16(SDH_PID4, val)
349#define bfin_read_SDH_PID5() bfin_read16(SDH_PID5)
350#define bfin_write_SDH_PID5(val) bfin_write16(SDH_PID5, val)
351#define bfin_read_SDH_PID6() bfin_read16(SDH_PID6)
352#define bfin_write_SDH_PID6(val) bfin_write16(SDH_PID6, val)
353#define bfin_read_SDH_PID7() bfin_read16(SDH_PID7)
354#define bfin_write_SDH_PID7(val) bfin_write16(SDH_PID7, val)
355
356/* HOST Port Registers */
357
358#define bfin_read_HOST_CONTROL() bfin_read16(HOST_CONTROL)
359#define bfin_write_HOST_CONTROL(val) bfin_write16(HOST_CONTROL, val)
360#define bfin_read_HOST_STATUS() bfin_read16(HOST_STATUS)
361#define bfin_write_HOST_STATUS(val) bfin_write16(HOST_STATUS, val)
362#define bfin_read_HOST_TIMEOUT() bfin_read16(HOST_TIMEOUT)
363#define bfin_write_HOST_TIMEOUT(val) bfin_write16(HOST_TIMEOUT, val)
364
365/* USB Control Registers */
366
367#define bfin_read_USB_FADDR() bfin_read16(USB_FADDR)
368#define bfin_write_USB_FADDR(val) bfin_write16(USB_FADDR, val)
369#define bfin_read_USB_POWER() bfin_read16(USB_POWER)
370#define bfin_write_USB_POWER(val) bfin_write16(USB_POWER, val)
371#define bfin_read_USB_INTRTX() bfin_read16(USB_INTRTX)
372#define bfin_write_USB_INTRTX(val) bfin_write16(USB_INTRTX, val)
373#define bfin_read_USB_INTRRX() bfin_read16(USB_INTRRX)
374#define bfin_write_USB_INTRRX(val) bfin_write16(USB_INTRRX, val)
375#define bfin_read_USB_INTRTXE() bfin_read16(USB_INTRTXE)
376#define bfin_write_USB_INTRTXE(val) bfin_write16(USB_INTRTXE, val)
377#define bfin_read_USB_INTRRXE() bfin_read16(USB_INTRRXE)
378#define bfin_write_USB_INTRRXE(val) bfin_write16(USB_INTRRXE, val)
379#define bfin_read_USB_INTRUSB() bfin_read16(USB_INTRUSB)
380#define bfin_write_USB_INTRUSB(val) bfin_write16(USB_INTRUSB, val)
381#define bfin_read_USB_INTRUSBE() bfin_read16(USB_INTRUSBE)
382#define bfin_write_USB_INTRUSBE(val) bfin_write16(USB_INTRUSBE, val)
383#define bfin_read_USB_FRAME() bfin_read16(USB_FRAME)
384#define bfin_write_USB_FRAME(val) bfin_write16(USB_FRAME, val)
385#define bfin_read_USB_INDEX() bfin_read16(USB_INDEX)
386#define bfin_write_USB_INDEX(val) bfin_write16(USB_INDEX, val)
387#define bfin_read_USB_TESTMODE() bfin_read16(USB_TESTMODE)
388#define bfin_write_USB_TESTMODE(val) bfin_write16(USB_TESTMODE, val)
389#define bfin_read_USB_GLOBINTR() bfin_read16(USB_GLOBINTR)
390#define bfin_write_USB_GLOBINTR(val) bfin_write16(USB_GLOBINTR, val)
391#define bfin_read_USB_GLOBAL_CTL() bfin_read16(USB_GLOBAL_CTL)
392#define bfin_write_USB_GLOBAL_CTL(val) bfin_write16(USB_GLOBAL_CTL, val)
393
394/* USB Packet Control Registers */
395
396#define bfin_read_USB_TX_MAX_PACKET() bfin_read16(USB_TX_MAX_PACKET)
397#define bfin_write_USB_TX_MAX_PACKET(val) bfin_write16(USB_TX_MAX_PACKET, val)
398#define bfin_read_USB_CSR0() bfin_read16(USB_CSR0)
399#define bfin_write_USB_CSR0(val) bfin_write16(USB_CSR0, val)
400#define bfin_read_USB_TXCSR() bfin_read16(USB_TXCSR)
401#define bfin_write_USB_TXCSR(val) bfin_write16(USB_TXCSR, val)
402#define bfin_read_USB_RX_MAX_PACKET() bfin_read16(USB_RX_MAX_PACKET)
403#define bfin_write_USB_RX_MAX_PACKET(val) bfin_write16(USB_RX_MAX_PACKET, val)
404#define bfin_read_USB_RXCSR() bfin_read16(USB_RXCSR)
405#define bfin_write_USB_RXCSR(val) bfin_write16(USB_RXCSR, val)
406#define bfin_read_USB_COUNT0() bfin_read16(USB_COUNT0)
407#define bfin_write_USB_COUNT0(val) bfin_write16(USB_COUNT0, val)
408#define bfin_read_USB_RXCOUNT() bfin_read16(USB_RXCOUNT)
409#define bfin_write_USB_RXCOUNT(val) bfin_write16(USB_RXCOUNT, val)
410#define bfin_read_USB_TXTYPE() bfin_read16(USB_TXTYPE)
411#define bfin_write_USB_TXTYPE(val) bfin_write16(USB_TXTYPE, val)
412#define bfin_read_USB_NAKLIMIT0() bfin_read16(USB_NAKLIMIT0)
413#define bfin_write_USB_NAKLIMIT0(val) bfin_write16(USB_NAKLIMIT0, val)
414#define bfin_read_USB_TXINTERVAL() bfin_read16(USB_TXINTERVAL)
415#define bfin_write_USB_TXINTERVAL(val) bfin_write16(USB_TXINTERVAL, val)
416#define bfin_read_USB_RXTYPE() bfin_read16(USB_RXTYPE)
417#define bfin_write_USB_RXTYPE(val) bfin_write16(USB_RXTYPE, val)
418#define bfin_read_USB_RXINTERVAL() bfin_read16(USB_RXINTERVAL)
419#define bfin_write_USB_RXINTERVAL(val) bfin_write16(USB_RXINTERVAL, val)
420#define bfin_read_USB_TXCOUNT() bfin_read16(USB_TXCOUNT)
421#define bfin_write_USB_TXCOUNT(val) bfin_write16(USB_TXCOUNT, val)
422
423/* USB Endbfin_read_()oint FIFO Registers */
424
425#define bfin_read_USB_EP0_FIFO() bfin_read16(USB_EP0_FIFO)
426#define bfin_write_USB_EP0_FIFO(val) bfin_write16(USB_EP0_FIFO, val)
427#define bfin_read_USB_EP1_FIFO() bfin_read16(USB_EP1_FIFO)
428#define bfin_write_USB_EP1_FIFO(val) bfin_write16(USB_EP1_FIFO, val)
429#define bfin_read_USB_EP2_FIFO() bfin_read16(USB_EP2_FIFO)
430#define bfin_write_USB_EP2_FIFO(val) bfin_write16(USB_EP2_FIFO, val)
431#define bfin_read_USB_EP3_FIFO() bfin_read16(USB_EP3_FIFO)
432#define bfin_write_USB_EP3_FIFO(val) bfin_write16(USB_EP3_FIFO, val)
433#define bfin_read_USB_EP4_FIFO() bfin_read16(USB_EP4_FIFO)
434#define bfin_write_USB_EP4_FIFO(val) bfin_write16(USB_EP4_FIFO, val)
435#define bfin_read_USB_EP5_FIFO() bfin_read16(USB_EP5_FIFO)
436#define bfin_write_USB_EP5_FIFO(val) bfin_write16(USB_EP5_FIFO, val)
437#define bfin_read_USB_EP6_FIFO() bfin_read16(USB_EP6_FIFO)
438#define bfin_write_USB_EP6_FIFO(val) bfin_write16(USB_EP6_FIFO, val)
439#define bfin_read_USB_EP7_FIFO() bfin_read16(USB_EP7_FIFO)
440#define bfin_write_USB_EP7_FIFO(val) bfin_write16(USB_EP7_FIFO, val)
441
442/* USB OTG Control Registers */
443
444#define bfin_read_USB_OTG_DEV_CTL() bfin_read16(USB_OTG_DEV_CTL)
445#define bfin_write_USB_OTG_DEV_CTL(val) bfin_write16(USB_OTG_DEV_CTL, val)
446#define bfin_read_USB_OTG_VBUS_IRQ() bfin_read16(USB_OTG_VBUS_IRQ)
447#define bfin_write_USB_OTG_VBUS_IRQ(val) bfin_write16(USB_OTG_VBUS_IRQ, val)
448#define bfin_read_USB_OTG_VBUS_MASK() bfin_read16(USB_OTG_VBUS_MASK)
449#define bfin_write_USB_OTG_VBUS_MASK(val) bfin_write16(USB_OTG_VBUS_MASK, val)
450
451/* USB Phy Control Registers */
452
453#define bfin_read_USB_LINKINFO() bfin_read16(USB_LINKINFO)
454#define bfin_write_USB_LINKINFO(val) bfin_write16(USB_LINKINFO, val)
455#define bfin_read_USB_VPLEN() bfin_read16(USB_VPLEN)
456#define bfin_write_USB_VPLEN(val) bfin_write16(USB_VPLEN, val)
457#define bfin_read_USB_HS_EOF1() bfin_read16(USB_HS_EOF1)
458#define bfin_write_USB_HS_EOF1(val) bfin_write16(USB_HS_EOF1, val)
459#define bfin_read_USB_FS_EOF1() bfin_read16(USB_FS_EOF1)
460#define bfin_write_USB_FS_EOF1(val) bfin_write16(USB_FS_EOF1, val)
461#define bfin_read_USB_LS_EOF1() bfin_read16(USB_LS_EOF1)
462#define bfin_write_USB_LS_EOF1(val) bfin_write16(USB_LS_EOF1, val)
463
464/* (APHY_CNTRL is for ADI usage only) */
465
466#define bfin_read_USB_APHY_CNTRL() bfin_read16(USB_APHY_CNTRL)
467#define bfin_write_USB_APHY_CNTRL(val) bfin_write16(USB_APHY_CNTRL, val)
468
469/* (APHY_CALIB is for ADI usage only) */
470
471#define bfin_read_USB_APHY_CALIB() bfin_read16(USB_APHY_CALIB)
472#define bfin_write_USB_APHY_CALIB(val) bfin_write16(USB_APHY_CALIB, val)
473#define bfin_read_USB_APHY_CNTRL2() bfin_read16(USB_APHY_CNTRL2)
474#define bfin_write_USB_APHY_CNTRL2(val) bfin_write16(USB_APHY_CNTRL2, val)
475
476/* (PHY_TEST is for ADI usage only) */
477
478#define bfin_read_USB_PHY_TEST() bfin_read16(USB_PHY_TEST)
479#define bfin_write_USB_PHY_TEST(val) bfin_write16(USB_PHY_TEST, val)
480#define bfin_read_USB_PLLOSC_CTRL() bfin_read16(USB_PLLOSC_CTRL)
481#define bfin_write_USB_PLLOSC_CTRL(val) bfin_write16(USB_PLLOSC_CTRL, val)
482#define bfin_read_USB_SRP_CLKDIV() bfin_read16(USB_SRP_CLKDIV)
483#define bfin_write_USB_SRP_CLKDIV(val) bfin_write16(USB_SRP_CLKDIV, val)
484
485/* USB Endbfin_read_()oint 0 Control Registers */
486
487#define bfin_read_USB_EP_NI0_TXMAXP() bfin_read16(USB_EP_NI0_TXMAXP)
488#define bfin_write_USB_EP_NI0_TXMAXP(val) bfin_write16(USB_EP_NI0_TXMAXP, val)
489#define bfin_read_USB_EP_NI0_TXCSR() bfin_read16(USB_EP_NI0_TXCSR)
490#define bfin_write_USB_EP_NI0_TXCSR(val) bfin_write16(USB_EP_NI0_TXCSR, val)
491#define bfin_read_USB_EP_NI0_RXMAXP() bfin_read16(USB_EP_NI0_RXMAXP)
492#define bfin_write_USB_EP_NI0_RXMAXP(val) bfin_write16(USB_EP_NI0_RXMAXP, val)
493#define bfin_read_USB_EP_NI0_RXCSR() bfin_read16(USB_EP_NI0_RXCSR)
494#define bfin_write_USB_EP_NI0_RXCSR(val) bfin_write16(USB_EP_NI0_RXCSR, val)
495#define bfin_read_USB_EP_NI0_RXCOUNT() bfin_read16(USB_EP_NI0_RXCOUNT)
496#define bfin_write_USB_EP_NI0_RXCOUNT(val) bfin_write16(USB_EP_NI0_RXCOUNT, val)
497#define bfin_read_USB_EP_NI0_TXTYPE() bfin_read16(USB_EP_NI0_TXTYPE)
498#define bfin_write_USB_EP_NI0_TXTYPE(val) bfin_write16(USB_EP_NI0_TXTYPE, val)
499#define bfin_read_USB_EP_NI0_TXINTERVAL() bfin_read16(USB_EP_NI0_TXINTERVAL)
500#define bfin_write_USB_EP_NI0_TXINTERVAL(val) bfin_write16(USB_EP_NI0_TXINTERVAL, val)
501#define bfin_read_USB_EP_NI0_RXTYPE() bfin_read16(USB_EP_NI0_RXTYPE)
502#define bfin_write_USB_EP_NI0_RXTYPE(val) bfin_write16(USB_EP_NI0_RXTYPE, val)
503#define bfin_read_USB_EP_NI0_RXINTERVAL() bfin_read16(USB_EP_NI0_RXINTERVAL)
504#define bfin_write_USB_EP_NI0_RXINTERVAL(val) bfin_write16(USB_EP_NI0_RXINTERVAL, val)
505
506/* USB Endbfin_read_()oint 1 Control Registers */
507
508#define bfin_read_USB_EP_NI0_TXCOUNT() bfin_read16(USB_EP_NI0_TXCOUNT)
509#define bfin_write_USB_EP_NI0_TXCOUNT(val) bfin_write16(USB_EP_NI0_TXCOUNT, val)
510#define bfin_read_USB_EP_NI1_TXMAXP() bfin_read16(USB_EP_NI1_TXMAXP)
511#define bfin_write_USB_EP_NI1_TXMAXP(val) bfin_write16(USB_EP_NI1_TXMAXP, val)
512#define bfin_read_USB_EP_NI1_TXCSR() bfin_read16(USB_EP_NI1_TXCSR)
513#define bfin_write_USB_EP_NI1_TXCSR(val) bfin_write16(USB_EP_NI1_TXCSR, val)
514#define bfin_read_USB_EP_NI1_RXMAXP() bfin_read16(USB_EP_NI1_RXMAXP)
515#define bfin_write_USB_EP_NI1_RXMAXP(val) bfin_write16(USB_EP_NI1_RXMAXP, val)
516#define bfin_read_USB_EP_NI1_RXCSR() bfin_read16(USB_EP_NI1_RXCSR)
517#define bfin_write_USB_EP_NI1_RXCSR(val) bfin_write16(USB_EP_NI1_RXCSR, val)
518#define bfin_read_USB_EP_NI1_RXCOUNT() bfin_read16(USB_EP_NI1_RXCOUNT)
519#define bfin_write_USB_EP_NI1_RXCOUNT(val) bfin_write16(USB_EP_NI1_RXCOUNT, val)
520#define bfin_read_USB_EP_NI1_TXTYPE() bfin_read16(USB_EP_NI1_TXTYPE)
521#define bfin_write_USB_EP_NI1_TXTYPE(val) bfin_write16(USB_EP_NI1_TXTYPE, val)
522#define bfin_read_USB_EP_NI1_TXINTERVAL() bfin_read16(USB_EP_NI1_TXINTERVAL)
523#define bfin_write_USB_EP_NI1_TXINTERVAL(val) bfin_write16(USB_EP_NI1_TXINTERVAL, val)
524#define bfin_read_USB_EP_NI1_RXTYPE() bfin_read16(USB_EP_NI1_RXTYPE)
525#define bfin_write_USB_EP_NI1_RXTYPE(val) bfin_write16(USB_EP_NI1_RXTYPE, val)
526#define bfin_read_USB_EP_NI1_RXINTERVAL() bfin_read16(USB_EP_NI1_RXINTERVAL)
527#define bfin_write_USB_EP_NI1_RXINTERVAL(val) bfin_write16(USB_EP_NI1_RXINTERVAL, val)
528
529/* USB Endbfin_read_()oint 2 Control Registers */
530
531#define bfin_read_USB_EP_NI1_TXCOUNT() bfin_read16(USB_EP_NI1_TXCOUNT)
532#define bfin_write_USB_EP_NI1_TXCOUNT(val) bfin_write16(USB_EP_NI1_TXCOUNT, val)
533#define bfin_read_USB_EP_NI2_TXMAXP() bfin_read16(USB_EP_NI2_TXMAXP)
534#define bfin_write_USB_EP_NI2_TXMAXP(val) bfin_write16(USB_EP_NI2_TXMAXP, val)
535#define bfin_read_USB_EP_NI2_TXCSR() bfin_read16(USB_EP_NI2_TXCSR)
536#define bfin_write_USB_EP_NI2_TXCSR(val) bfin_write16(USB_EP_NI2_TXCSR, val)
537#define bfin_read_USB_EP_NI2_RXMAXP() bfin_read16(USB_EP_NI2_RXMAXP)
538#define bfin_write_USB_EP_NI2_RXMAXP(val) bfin_write16(USB_EP_NI2_RXMAXP, val)
539#define bfin_read_USB_EP_NI2_RXCSR() bfin_read16(USB_EP_NI2_RXCSR)
540#define bfin_write_USB_EP_NI2_RXCSR(val) bfin_write16(USB_EP_NI2_RXCSR, val)
541#define bfin_read_USB_EP_NI2_RXCOUNT() bfin_read16(USB_EP_NI2_RXCOUNT)
542#define bfin_write_USB_EP_NI2_RXCOUNT(val) bfin_write16(USB_EP_NI2_RXCOUNT, val)
543#define bfin_read_USB_EP_NI2_TXTYPE() bfin_read16(USB_EP_NI2_TXTYPE)
544#define bfin_write_USB_EP_NI2_TXTYPE(val) bfin_write16(USB_EP_NI2_TXTYPE, val)
545#define bfin_read_USB_EP_NI2_TXINTERVAL() bfin_read16(USB_EP_NI2_TXINTERVAL)
546#define bfin_write_USB_EP_NI2_TXINTERVAL(val) bfin_write16(USB_EP_NI2_TXINTERVAL, val)
547#define bfin_read_USB_EP_NI2_RXTYPE() bfin_read16(USB_EP_NI2_RXTYPE)
548#define bfin_write_USB_EP_NI2_RXTYPE(val) bfin_write16(USB_EP_NI2_RXTYPE, val)
549#define bfin_read_USB_EP_NI2_RXINTERVAL() bfin_read16(USB_EP_NI2_RXINTERVAL)
550#define bfin_write_USB_EP_NI2_RXINTERVAL(val) bfin_write16(USB_EP_NI2_RXINTERVAL, val)
551
552/* USB Endbfin_read_()oint 3 Control Registers */
553
554#define bfin_read_USB_EP_NI2_TXCOUNT() bfin_read16(USB_EP_NI2_TXCOUNT)
555#define bfin_write_USB_EP_NI2_TXCOUNT(val) bfin_write16(USB_EP_NI2_TXCOUNT, val)
556#define bfin_read_USB_EP_NI3_TXMAXP() bfin_read16(USB_EP_NI3_TXMAXP)
557#define bfin_write_USB_EP_NI3_TXMAXP(val) bfin_write16(USB_EP_NI3_TXMAXP, val)
558#define bfin_read_USB_EP_NI3_TXCSR() bfin_read16(USB_EP_NI3_TXCSR)
559#define bfin_write_USB_EP_NI3_TXCSR(val) bfin_write16(USB_EP_NI3_TXCSR, val)
560#define bfin_read_USB_EP_NI3_RXMAXP() bfin_read16(USB_EP_NI3_RXMAXP)
561#define bfin_write_USB_EP_NI3_RXMAXP(val) bfin_write16(USB_EP_NI3_RXMAXP, val)
562#define bfin_read_USB_EP_NI3_RXCSR() bfin_read16(USB_EP_NI3_RXCSR)
563#define bfin_write_USB_EP_NI3_RXCSR(val) bfin_write16(USB_EP_NI3_RXCSR, val)
564#define bfin_read_USB_EP_NI3_RXCOUNT() bfin_read16(USB_EP_NI3_RXCOUNT)
565#define bfin_write_USB_EP_NI3_RXCOUNT(val) bfin_write16(USB_EP_NI3_RXCOUNT, val)
566#define bfin_read_USB_EP_NI3_TXTYPE() bfin_read16(USB_EP_NI3_TXTYPE)
567#define bfin_write_USB_EP_NI3_TXTYPE(val) bfin_write16(USB_EP_NI3_TXTYPE, val)
568#define bfin_read_USB_EP_NI3_TXINTERVAL() bfin_read16(USB_EP_NI3_TXINTERVAL)
569#define bfin_write_USB_EP_NI3_TXINTERVAL(val) bfin_write16(USB_EP_NI3_TXINTERVAL, val)
570#define bfin_read_USB_EP_NI3_RXTYPE() bfin_read16(USB_EP_NI3_RXTYPE)
571#define bfin_write_USB_EP_NI3_RXTYPE(val) bfin_write16(USB_EP_NI3_RXTYPE, val)
572#define bfin_read_USB_EP_NI3_RXINTERVAL() bfin_read16(USB_EP_NI3_RXINTERVAL)
573#define bfin_write_USB_EP_NI3_RXINTERVAL(val) bfin_write16(USB_EP_NI3_RXINTERVAL, val)
574
575/* USB Endbfin_read_()oint 4 Control Registers */
576
577#define bfin_read_USB_EP_NI3_TXCOUNT() bfin_read16(USB_EP_NI3_TXCOUNT)
578#define bfin_write_USB_EP_NI3_TXCOUNT(val) bfin_write16(USB_EP_NI3_TXCOUNT, val)
579#define bfin_read_USB_EP_NI4_TXMAXP() bfin_read16(USB_EP_NI4_TXMAXP)
580#define bfin_write_USB_EP_NI4_TXMAXP(val) bfin_write16(USB_EP_NI4_TXMAXP, val)
581#define bfin_read_USB_EP_NI4_TXCSR() bfin_read16(USB_EP_NI4_TXCSR)
582#define bfin_write_USB_EP_NI4_TXCSR(val) bfin_write16(USB_EP_NI4_TXCSR, val)
583#define bfin_read_USB_EP_NI4_RXMAXP() bfin_read16(USB_EP_NI4_RXMAXP)
584#define bfin_write_USB_EP_NI4_RXMAXP(val) bfin_write16(USB_EP_NI4_RXMAXP, val)
585#define bfin_read_USB_EP_NI4_RXCSR() bfin_read16(USB_EP_NI4_RXCSR)
586#define bfin_write_USB_EP_NI4_RXCSR(val) bfin_write16(USB_EP_NI4_RXCSR, val)
587#define bfin_read_USB_EP_NI4_RXCOUNT() bfin_read16(USB_EP_NI4_RXCOUNT)
588#define bfin_write_USB_EP_NI4_RXCOUNT(val) bfin_write16(USB_EP_NI4_RXCOUNT, val)
589#define bfin_read_USB_EP_NI4_TXTYPE() bfin_read16(USB_EP_NI4_TXTYPE)
590#define bfin_write_USB_EP_NI4_TXTYPE(val) bfin_write16(USB_EP_NI4_TXTYPE, val)
591#define bfin_read_USB_EP_NI4_TXINTERVAL() bfin_read16(USB_EP_NI4_TXINTERVAL)
592#define bfin_write_USB_EP_NI4_TXINTERVAL(val) bfin_write16(USB_EP_NI4_TXINTERVAL, val)
593#define bfin_read_USB_EP_NI4_RXTYPE() bfin_read16(USB_EP_NI4_RXTYPE)
594#define bfin_write_USB_EP_NI4_RXTYPE(val) bfin_write16(USB_EP_NI4_RXTYPE, val)
595#define bfin_read_USB_EP_NI4_RXINTERVAL() bfin_read16(USB_EP_NI4_RXINTERVAL)
596#define bfin_write_USB_EP_NI4_RXINTERVAL(val) bfin_write16(USB_EP_NI4_RXINTERVAL, val)
597
598/* USB Endbfin_read_()oint 5 Control Registers */
599
600#define bfin_read_USB_EP_NI4_TXCOUNT() bfin_read16(USB_EP_NI4_TXCOUNT)
601#define bfin_write_USB_EP_NI4_TXCOUNT(val) bfin_write16(USB_EP_NI4_TXCOUNT, val)
602#define bfin_read_USB_EP_NI5_TXMAXP() bfin_read16(USB_EP_NI5_TXMAXP)
603#define bfin_write_USB_EP_NI5_TXMAXP(val) bfin_write16(USB_EP_NI5_TXMAXP, val)
604#define bfin_read_USB_EP_NI5_TXCSR() bfin_read16(USB_EP_NI5_TXCSR)
605#define bfin_write_USB_EP_NI5_TXCSR(val) bfin_write16(USB_EP_NI5_TXCSR, val)
606#define bfin_read_USB_EP_NI5_RXMAXP() bfin_read16(USB_EP_NI5_RXMAXP)
607#define bfin_write_USB_EP_NI5_RXMAXP(val) bfin_write16(USB_EP_NI5_RXMAXP, val)
608#define bfin_read_USB_EP_NI5_RXCSR() bfin_read16(USB_EP_NI5_RXCSR)
609#define bfin_write_USB_EP_NI5_RXCSR(val) bfin_write16(USB_EP_NI5_RXCSR, val)
610#define bfin_read_USB_EP_NI5_RXCOUNT() bfin_read16(USB_EP_NI5_RXCOUNT)
611#define bfin_write_USB_EP_NI5_RXCOUNT(val) bfin_write16(USB_EP_NI5_RXCOUNT, val)
612#define bfin_read_USB_EP_NI5_TXTYPE() bfin_read16(USB_EP_NI5_TXTYPE)
613#define bfin_write_USB_EP_NI5_TXTYPE(val) bfin_write16(USB_EP_NI5_TXTYPE, val)
614#define bfin_read_USB_EP_NI5_TXINTERVAL() bfin_read16(USB_EP_NI5_TXINTERVAL)
615#define bfin_write_USB_EP_NI5_TXINTERVAL(val) bfin_write16(USB_EP_NI5_TXINTERVAL, val)
616#define bfin_read_USB_EP_NI5_RXTYPE() bfin_read16(USB_EP_NI5_RXTYPE)
617#define bfin_write_USB_EP_NI5_RXTYPE(val) bfin_write16(USB_EP_NI5_RXTYPE, val)
618#define bfin_read_USB_EP_NI5_RXINTERVAL() bfin_read16(USB_EP_NI5_RXINTERVAL)
619#define bfin_write_USB_EP_NI5_RXINTERVAL(val) bfin_write16(USB_EP_NI5_RXINTERVAL, val)
620
621/* USB Endbfin_read_()oint 6 Control Registers */
622
623#define bfin_read_USB_EP_NI5_TXCOUNT() bfin_read16(USB_EP_NI5_TXCOUNT)
624#define bfin_write_USB_EP_NI5_TXCOUNT(val) bfin_write16(USB_EP_NI5_TXCOUNT, val)
625#define bfin_read_USB_EP_NI6_TXMAXP() bfin_read16(USB_EP_NI6_TXMAXP)
626#define bfin_write_USB_EP_NI6_TXMAXP(val) bfin_write16(USB_EP_NI6_TXMAXP, val)
627#define bfin_read_USB_EP_NI6_TXCSR() bfin_read16(USB_EP_NI6_TXCSR)
628#define bfin_write_USB_EP_NI6_TXCSR(val) bfin_write16(USB_EP_NI6_TXCSR, val)
629#define bfin_read_USB_EP_NI6_RXMAXP() bfin_read16(USB_EP_NI6_RXMAXP)
630#define bfin_write_USB_EP_NI6_RXMAXP(val) bfin_write16(USB_EP_NI6_RXMAXP, val)
631#define bfin_read_USB_EP_NI6_RXCSR() bfin_read16(USB_EP_NI6_RXCSR)
632#define bfin_write_USB_EP_NI6_RXCSR(val) bfin_write16(USB_EP_NI6_RXCSR, val)
633#define bfin_read_USB_EP_NI6_RXCOUNT() bfin_read16(USB_EP_NI6_RXCOUNT)
634#define bfin_write_USB_EP_NI6_RXCOUNT(val) bfin_write16(USB_EP_NI6_RXCOUNT, val)
635#define bfin_read_USB_EP_NI6_TXTYPE() bfin_read16(USB_EP_NI6_TXTYPE)
636#define bfin_write_USB_EP_NI6_TXTYPE(val) bfin_write16(USB_EP_NI6_TXTYPE, val)
637#define bfin_read_USB_EP_NI6_TXINTERVAL() bfin_read16(USB_EP_NI6_TXINTERVAL)
638#define bfin_write_USB_EP_NI6_TXINTERVAL(val) bfin_write16(USB_EP_NI6_TXINTERVAL, val)
639#define bfin_read_USB_EP_NI6_RXTYPE() bfin_read16(USB_EP_NI6_RXTYPE)
640#define bfin_write_USB_EP_NI6_RXTYPE(val) bfin_write16(USB_EP_NI6_RXTYPE, val)
641#define bfin_read_USB_EP_NI6_RXINTERVAL() bfin_read16(USB_EP_NI6_RXINTERVAL)
642#define bfin_write_USB_EP_NI6_RXINTERVAL(val) bfin_write16(USB_EP_NI6_RXINTERVAL, val)
643
644/* USB Endbfin_read_()oint 7 Control Registers */
645
646#define bfin_read_USB_EP_NI6_TXCOUNT() bfin_read16(USB_EP_NI6_TXCOUNT)
647#define bfin_write_USB_EP_NI6_TXCOUNT(val) bfin_write16(USB_EP_NI6_TXCOUNT, val)
648#define bfin_read_USB_EP_NI7_TXMAXP() bfin_read16(USB_EP_NI7_TXMAXP)
649#define bfin_write_USB_EP_NI7_TXMAXP(val) bfin_write16(USB_EP_NI7_TXMAXP, val)
650#define bfin_read_USB_EP_NI7_TXCSR() bfin_read16(USB_EP_NI7_TXCSR)
651#define bfin_write_USB_EP_NI7_TXCSR(val) bfin_write16(USB_EP_NI7_TXCSR, val)
652#define bfin_read_USB_EP_NI7_RXMAXP() bfin_read16(USB_EP_NI7_RXMAXP)
653#define bfin_write_USB_EP_NI7_RXMAXP(val) bfin_write16(USB_EP_NI7_RXMAXP, val)
654#define bfin_read_USB_EP_NI7_RXCSR() bfin_read16(USB_EP_NI7_RXCSR)
655#define bfin_write_USB_EP_NI7_RXCSR(val) bfin_write16(USB_EP_NI7_RXCSR, val)
656#define bfin_read_USB_EP_NI7_RXCOUNT() bfin_read16(USB_EP_NI7_RXCOUNT)
657#define bfin_write_USB_EP_NI7_RXCOUNT(val) bfin_write16(USB_EP_NI7_RXCOUNT, val)
658#define bfin_read_USB_EP_NI7_TXTYPE() bfin_read16(USB_EP_NI7_TXTYPE)
659#define bfin_write_USB_EP_NI7_TXTYPE(val) bfin_write16(USB_EP_NI7_TXTYPE, val)
660#define bfin_read_USB_EP_NI7_TXINTERVAL() bfin_read16(USB_EP_NI7_TXINTERVAL)
661#define bfin_write_USB_EP_NI7_TXINTERVAL(val) bfin_write16(USB_EP_NI7_TXINTERVAL, val)
662#define bfin_read_USB_EP_NI7_RXTYPE() bfin_read16(USB_EP_NI7_RXTYPE)
663#define bfin_write_USB_EP_NI7_RXTYPE(val) bfin_write16(USB_EP_NI7_RXTYPE, val)
664#define bfin_read_USB_EP_NI7_RXINTERVAL() bfin_read16(USB_EP_NI7_RXINTERVAL)
665#define bfin_write_USB_EP_NI7_RXINTERVAL(val) bfin_write16(USB_EP_NI7_RXINTERVAL, val)
666#define bfin_read_USB_EP_NI7_TXCOUNT() bfin_read16(USB_EP_NI7_TXCOUNT)
667#define bfin_write_USB_EP_NI7_TXCOUNT(val) bfin_write16(USB_EP_NI7_TXCOUNT, val)
668#define bfin_read_USB_DMA_INTERRUPT() bfin_read16(USB_DMA_INTERRUPT)
669#define bfin_write_USB_DMA_INTERRUPT(val) bfin_write16(USB_DMA_INTERRUPT, val)
670
671/* USB Channel 0 Config Registers */
672
673#define bfin_read_USB_DMA0CONTROL() bfin_read16(USB_DMA0CONTROL)
674#define bfin_write_USB_DMA0CONTROL(val) bfin_write16(USB_DMA0CONTROL, val)
675#define bfin_read_USB_DMA0ADDRLOW() bfin_read16(USB_DMA0ADDRLOW)
676#define bfin_write_USB_DMA0ADDRLOW(val) bfin_write16(USB_DMA0ADDRLOW, val)
677#define bfin_read_USB_DMA0ADDRHIGH() bfin_read16(USB_DMA0ADDRHIGH)
678#define bfin_write_USB_DMA0ADDRHIGH(val) bfin_write16(USB_DMA0ADDRHIGH, val)
679#define bfin_read_USB_DMA0COUNTLOW() bfin_read16(USB_DMA0COUNTLOW)
680#define bfin_write_USB_DMA0COUNTLOW(val) bfin_write16(USB_DMA0COUNTLOW, val)
681#define bfin_read_USB_DMA0COUNTHIGH() bfin_read16(USB_DMA0COUNTHIGH)
682#define bfin_write_USB_DMA0COUNTHIGH(val) bfin_write16(USB_DMA0COUNTHIGH, val)
683
684/* USB Channel 1 Config Registers */
685
686#define bfin_read_USB_DMA1CONTROL() bfin_read16(USB_DMA1CONTROL)
687#define bfin_write_USB_DMA1CONTROL(val) bfin_write16(USB_DMA1CONTROL, val)
688#define bfin_read_USB_DMA1ADDRLOW() bfin_read16(USB_DMA1ADDRLOW)
689#define bfin_write_USB_DMA1ADDRLOW(val) bfin_write16(USB_DMA1ADDRLOW, val)
690#define bfin_read_USB_DMA1ADDRHIGH() bfin_read16(USB_DMA1ADDRHIGH)
691#define bfin_write_USB_DMA1ADDRHIGH(val) bfin_write16(USB_DMA1ADDRHIGH, val)
692#define bfin_read_USB_DMA1COUNTLOW() bfin_read16(USB_DMA1COUNTLOW)
693#define bfin_write_USB_DMA1COUNTLOW(val) bfin_write16(USB_DMA1COUNTLOW, val)
694#define bfin_read_USB_DMA1COUNTHIGH() bfin_read16(USB_DMA1COUNTHIGH)
695#define bfin_write_USB_DMA1COUNTHIGH(val) bfin_write16(USB_DMA1COUNTHIGH, val)
696
697/* USB Channel 2 Config Registers */
698
699#define bfin_read_USB_DMA2CONTROL() bfin_read16(USB_DMA2CONTROL)
700#define bfin_write_USB_DMA2CONTROL(val) bfin_write16(USB_DMA2CONTROL, val)
701#define bfin_read_USB_DMA2ADDRLOW() bfin_read16(USB_DMA2ADDRLOW)
702#define bfin_write_USB_DMA2ADDRLOW(val) bfin_write16(USB_DMA2ADDRLOW, val)
703#define bfin_read_USB_DMA2ADDRHIGH() bfin_read16(USB_DMA2ADDRHIGH)
704#define bfin_write_USB_DMA2ADDRHIGH(val) bfin_write16(USB_DMA2ADDRHIGH, val)
705#define bfin_read_USB_DMA2COUNTLOW() bfin_read16(USB_DMA2COUNTLOW)
706#define bfin_write_USB_DMA2COUNTLOW(val) bfin_write16(USB_DMA2COUNTLOW, val)
707#define bfin_read_USB_DMA2COUNTHIGH() bfin_read16(USB_DMA2COUNTHIGH)
708#define bfin_write_USB_DMA2COUNTHIGH(val) bfin_write16(USB_DMA2COUNTHIGH, val)
709
710/* USB Channel 3 Config Registers */
711
712#define bfin_read_USB_DMA3CONTROL() bfin_read16(USB_DMA3CONTROL)
713#define bfin_write_USB_DMA3CONTROL(val) bfin_write16(USB_DMA3CONTROL, val)
714#define bfin_read_USB_DMA3ADDRLOW() bfin_read16(USB_DMA3ADDRLOW)
715#define bfin_write_USB_DMA3ADDRLOW(val) bfin_write16(USB_DMA3ADDRLOW, val)
716#define bfin_read_USB_DMA3ADDRHIGH() bfin_read16(USB_DMA3ADDRHIGH)
717#define bfin_write_USB_DMA3ADDRHIGH(val) bfin_write16(USB_DMA3ADDRHIGH, val)
718#define bfin_read_USB_DMA3COUNTLOW() bfin_read16(USB_DMA3COUNTLOW)
719#define bfin_write_USB_DMA3COUNTLOW(val) bfin_write16(USB_DMA3COUNTLOW, val)
720#define bfin_read_USB_DMA3COUNTHIGH() bfin_read16(USB_DMA3COUNTHIGH)
721#define bfin_write_USB_DMA3COUNTHIGH(val) bfin_write16(USB_DMA3COUNTHIGH, val)
722
723/* USB Channel 4 Config Registers */
724
725#define bfin_read_USB_DMA4CONTROL() bfin_read16(USB_DMA4CONTROL)
726#define bfin_write_USB_DMA4CONTROL(val) bfin_write16(USB_DMA4CONTROL, val)
727#define bfin_read_USB_DMA4ADDRLOW() bfin_read16(USB_DMA4ADDRLOW)
728#define bfin_write_USB_DMA4ADDRLOW(val) bfin_write16(USB_DMA4ADDRLOW, val)
729#define bfin_read_USB_DMA4ADDRHIGH() bfin_read16(USB_DMA4ADDRHIGH)
730#define bfin_write_USB_DMA4ADDRHIGH(val) bfin_write16(USB_DMA4ADDRHIGH, val)
731#define bfin_read_USB_DMA4COUNTLOW() bfin_read16(USB_DMA4COUNTLOW)
732#define bfin_write_USB_DMA4COUNTLOW(val) bfin_write16(USB_DMA4COUNTLOW, val)
733#define bfin_read_USB_DMA4COUNTHIGH() bfin_read16(USB_DMA4COUNTHIGH)
734#define bfin_write_USB_DMA4COUNTHIGH(val) bfin_write16(USB_DMA4COUNTHIGH, val)
735
736/* USB Channel 5 Config Registers */
737
738#define bfin_read_USB_DMA5CONTROL() bfin_read16(USB_DMA5CONTROL)
739#define bfin_write_USB_DMA5CONTROL(val) bfin_write16(USB_DMA5CONTROL, val)
740#define bfin_read_USB_DMA5ADDRLOW() bfin_read16(USB_DMA5ADDRLOW)
741#define bfin_write_USB_DMA5ADDRLOW(val) bfin_write16(USB_DMA5ADDRLOW, val)
742#define bfin_read_USB_DMA5ADDRHIGH() bfin_read16(USB_DMA5ADDRHIGH)
743#define bfin_write_USB_DMA5ADDRHIGH(val) bfin_write16(USB_DMA5ADDRHIGH, val)
744#define bfin_read_USB_DMA5COUNTLOW() bfin_read16(USB_DMA5COUNTLOW)
745#define bfin_write_USB_DMA5COUNTLOW(val) bfin_write16(USB_DMA5COUNTLOW, val)
746#define bfin_read_USB_DMA5COUNTHIGH() bfin_read16(USB_DMA5COUNTHIGH)
747#define bfin_write_USB_DMA5COUNTHIGH(val) bfin_write16(USB_DMA5COUNTHIGH, val)
748
749/* USB Channel 6 Config Registers */
750
751#define bfin_read_USB_DMA6CONTROL() bfin_read16(USB_DMA6CONTROL)
752#define bfin_write_USB_DMA6CONTROL(val) bfin_write16(USB_DMA6CONTROL, val)
753#define bfin_read_USB_DMA6ADDRLOW() bfin_read16(USB_DMA6ADDRLOW)
754#define bfin_write_USB_DMA6ADDRLOW(val) bfin_write16(USB_DMA6ADDRLOW, val)
755#define bfin_read_USB_DMA6ADDRHIGH() bfin_read16(USB_DMA6ADDRHIGH)
756#define bfin_write_USB_DMA6ADDRHIGH(val) bfin_write16(USB_DMA6ADDRHIGH, val)
757#define bfin_read_USB_DMA6COUNTLOW() bfin_read16(USB_DMA6COUNTLOW)
758#define bfin_write_USB_DMA6COUNTLOW(val) bfin_write16(USB_DMA6COUNTLOW, val)
759#define bfin_read_USB_DMA6COUNTHIGH() bfin_read16(USB_DMA6COUNTHIGH)
760#define bfin_write_USB_DMA6COUNTHIGH(val) bfin_write16(USB_DMA6COUNTHIGH, val)
761
762/* USB Channel 7 Config Registers */
763
764#define bfin_read_USB_DMA7CONTROL() bfin_read16(USB_DMA7CONTROL)
765#define bfin_write_USB_DMA7CONTROL(val) bfin_write16(USB_DMA7CONTROL, val)
766#define bfin_read_USB_DMA7ADDRLOW() bfin_read16(USB_DMA7ADDRLOW)
767#define bfin_write_USB_DMA7ADDRLOW(val) bfin_write16(USB_DMA7ADDRLOW, val)
768#define bfin_read_USB_DMA7ADDRHIGH() bfin_read16(USB_DMA7ADDRHIGH)
769#define bfin_write_USB_DMA7ADDRHIGH(val) bfin_write16(USB_DMA7ADDRHIGH, val)
770#define bfin_read_USB_DMA7COUNTLOW() bfin_read16(USB_DMA7COUNTLOW)
771#define bfin_write_USB_DMA7COUNTLOW(val) bfin_write16(USB_DMA7COUNTLOW, val)
772#define bfin_read_USB_DMA7COUNTHIGH() bfin_read16(USB_DMA7COUNTHIGH)
773#define bfin_write_USB_DMA7COUNTHIGH(val) bfin_write16(USB_DMA7COUNTHIGH, val)
774
775/* Keybfin_read_()ad Registers */
776
777#define bfin_read_KPAD_CTL() bfin_read16(KPAD_CTL)
778#define bfin_write_KPAD_CTL(val) bfin_write16(KPAD_CTL, val)
779#define bfin_read_KPAD_PRESCALE() bfin_read16(KPAD_PRESCALE)
780#define bfin_write_KPAD_PRESCALE(val) bfin_write16(KPAD_PRESCALE, val)
781#define bfin_read_KPAD_MSEL() bfin_read16(KPAD_MSEL)
782#define bfin_write_KPAD_MSEL(val) bfin_write16(KPAD_MSEL, val)
783#define bfin_read_KPAD_ROWCOL() bfin_read16(KPAD_ROWCOL)
784#define bfin_write_KPAD_ROWCOL(val) bfin_write16(KPAD_ROWCOL, val)
785#define bfin_read_KPAD_STAT() bfin_read16(KPAD_STAT)
786#define bfin_write_KPAD_STAT(val) bfin_write16(KPAD_STAT, val)
787#define bfin_read_KPAD_SOFTEVAL() bfin_read16(KPAD_SOFTEVAL)
788#define bfin_write_KPAD_SOFTEVAL(val) bfin_write16(KPAD_SOFTEVAL, val)
789
790/* Pixel Combfin_read_()ositor (PIXC) Registers */
791
792#define bfin_read_PIXC_CTL() bfin_read16(PIXC_CTL)
793#define bfin_write_PIXC_CTL(val) bfin_write16(PIXC_CTL, val)
794#define bfin_read_PIXC_PPL() bfin_read16(PIXC_PPL)
795#define bfin_write_PIXC_PPL(val) bfin_write16(PIXC_PPL, val)
796#define bfin_read_PIXC_LPF() bfin_read16(PIXC_LPF)
797#define bfin_write_PIXC_LPF(val) bfin_write16(PIXC_LPF, val)
798#define bfin_read_PIXC_AHSTART() bfin_read16(PIXC_AHSTART)
799#define bfin_write_PIXC_AHSTART(val) bfin_write16(PIXC_AHSTART, val)
800#define bfin_read_PIXC_AHEND() bfin_read16(PIXC_AHEND)
801#define bfin_write_PIXC_AHEND(val) bfin_write16(PIXC_AHEND, val)
802#define bfin_read_PIXC_AVSTART() bfin_read16(PIXC_AVSTART)
803#define bfin_write_PIXC_AVSTART(val) bfin_write16(PIXC_AVSTART, val)
804#define bfin_read_PIXC_AVEND() bfin_read16(PIXC_AVEND)
805#define bfin_write_PIXC_AVEND(val) bfin_write16(PIXC_AVEND, val)
806#define bfin_read_PIXC_ATRANSP() bfin_read16(PIXC_ATRANSP)
807#define bfin_write_PIXC_ATRANSP(val) bfin_write16(PIXC_ATRANSP, val)
808#define bfin_read_PIXC_BHSTART() bfin_read16(PIXC_BHSTART)
809#define bfin_write_PIXC_BHSTART(val) bfin_write16(PIXC_BHSTART, val)
810#define bfin_read_PIXC_BHEND() bfin_read16(PIXC_BHEND)
811#define bfin_write_PIXC_BHEND(val) bfin_write16(PIXC_BHEND, val)
812#define bfin_read_PIXC_BVSTART() bfin_read16(PIXC_BVSTART)
813#define bfin_write_PIXC_BVSTART(val) bfin_write16(PIXC_BVSTART, val)
814#define bfin_read_PIXC_BVEND() bfin_read16(PIXC_BVEND)
815#define bfin_write_PIXC_BVEND(val) bfin_write16(PIXC_BVEND, val)
816#define bfin_read_PIXC_BTRANSP() bfin_read16(PIXC_BTRANSP)
817#define bfin_write_PIXC_BTRANSP(val) bfin_write16(PIXC_BTRANSP, val)
818#define bfin_read_PIXC_INTRSTAT() bfin_read16(PIXC_INTRSTAT)
819#define bfin_write_PIXC_INTRSTAT(val) bfin_write16(PIXC_INTRSTAT, val)
820#define bfin_read_PIXC_RYCON() bfin_read32(PIXC_RYCON)
821#define bfin_write_PIXC_RYCON(val) bfin_write32(PIXC_RYCON, val)
822#define bfin_read_PIXC_GUCON() bfin_read32(PIXC_GUCON)
823#define bfin_write_PIXC_GUCON(val) bfin_write32(PIXC_GUCON, val)
824#define bfin_read_PIXC_BVCON() bfin_read32(PIXC_BVCON)
825#define bfin_write_PIXC_BVCON(val) bfin_write32(PIXC_BVCON, val)
826#define bfin_read_PIXC_CCBIAS() bfin_read32(PIXC_CCBIAS)
827#define bfin_write_PIXC_CCBIAS(val) bfin_write32(PIXC_CCBIAS, val)
828#define bfin_read_PIXC_TC() bfin_read32(PIXC_TC)
829#define bfin_write_PIXC_TC(val) bfin_write32(PIXC_TC, val)
830
831/* Handshake MDMA 0 Registers */
832
833#define bfin_read_HMDMA0_CONTROL() bfin_read16(HMDMA0_CONTROL)
834#define bfin_write_HMDMA0_CONTROL(val) bfin_write16(HMDMA0_CONTROL, val)
835#define bfin_read_HMDMA0_ECINIT() bfin_read16(HMDMA0_ECINIT)
836#define bfin_write_HMDMA0_ECINIT(val) bfin_write16(HMDMA0_ECINIT, val)
837#define bfin_read_HMDMA0_BCINIT() bfin_read16(HMDMA0_BCINIT)
838#define bfin_write_HMDMA0_BCINIT(val) bfin_write16(HMDMA0_BCINIT, val)
839#define bfin_read_HMDMA0_ECURGENT() bfin_read16(HMDMA0_ECURGENT)
840#define bfin_write_HMDMA0_ECURGENT(val) bfin_write16(HMDMA0_ECURGENT, val)
841#define bfin_read_HMDMA0_ECOVERFLOW() bfin_read16(HMDMA0_ECOVERFLOW)
842#define bfin_write_HMDMA0_ECOVERFLOW(val) bfin_write16(HMDMA0_ECOVERFLOW, val)
843#define bfin_read_HMDMA0_ECOUNT() bfin_read16(HMDMA0_ECOUNT)
844#define bfin_write_HMDMA0_ECOUNT(val) bfin_write16(HMDMA0_ECOUNT, val)
845#define bfin_read_HMDMA0_BCOUNT() bfin_read16(HMDMA0_BCOUNT)
846#define bfin_write_HMDMA0_BCOUNT(val) bfin_write16(HMDMA0_BCOUNT, val)
847
848/* Handshake MDMA 1 Registers */
849
850#define bfin_read_HMDMA1_CONTROL() bfin_read16(HMDMA1_CONTROL)
851#define bfin_write_HMDMA1_CONTROL(val) bfin_write16(HMDMA1_CONTROL, val)
852#define bfin_read_HMDMA1_ECINIT() bfin_read16(HMDMA1_ECINIT)
853#define bfin_write_HMDMA1_ECINIT(val) bfin_write16(HMDMA1_ECINIT, val)
854#define bfin_read_HMDMA1_BCINIT() bfin_read16(HMDMA1_BCINIT)
855#define bfin_write_HMDMA1_BCINIT(val) bfin_write16(HMDMA1_BCINIT, val)
856#define bfin_read_HMDMA1_ECURGENT() bfin_read16(HMDMA1_ECURGENT)
857#define bfin_write_HMDMA1_ECURGENT(val) bfin_write16(HMDMA1_ECURGENT, val)
858#define bfin_read_HMDMA1_ECOVERFLOW() bfin_read16(HMDMA1_ECOVERFLOW)
859#define bfin_write_HMDMA1_ECOVERFLOW(val) bfin_write16(HMDMA1_ECOVERFLOW, val)
860#define bfin_read_HMDMA1_ECOUNT() bfin_read16(HMDMA1_ECOUNT)
861#define bfin_write_HMDMA1_ECOUNT(val) bfin_write16(HMDMA1_ECOUNT, val)
862#define bfin_read_HMDMA1_BCOUNT() bfin_read16(HMDMA1_BCOUNT)
863#define bfin_write_HMDMA1_BCOUNT(val) bfin_write16(HMDMA1_BCOUNT, val)
864
865#endif /* _CDEF_BF548_H */
diff --git a/include/asm-blackfin/mach-bf548/defBF547.h b/include/asm-blackfin/mach-bf548/defBF547.h
new file mode 100644
index 000000000000..3a3a18ebb10e
--- /dev/null
+++ b/include/asm-blackfin/mach-bf548/defBF547.h
@@ -0,0 +1,1244 @@
1/*
2 * File: include/asm-blackfin/mach-bf548/defBF547.h
3 * Based on:
4 * Author:
5 *
6 * Created:
7 * Description:
8 *
9 * Rev:
10 *
11 * Modified:
12 *
13 * Bugs: Enter bugs at http://blackfin.uclinux.org/
14 *
15 * This program is free software; you can redistribute it and/or modify
16 * it under the terms of the GNU General Public License as published by
17 * the Free Software Foundation; either version 2, or (at your option)
18 * any later version.
19 *
20 * This program is distributed in the hope that it will be useful,
21 * but WITHOUT ANY WARRANTY; without even the implied warranty of
22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
23 * GNU General Public License for more details.
24 *
25 * You should have received a copy of the GNU General Public License
26 * along with this program; see the file COPYING.
27 * If not, write to the Free Software Foundation,
28 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
29 */
30
31#ifndef _DEF_BF548_H
32#define _DEF_BF548_H
33
34/* Include all Core registers and bit definitions */
35#include <asm/mach-common/def_LPBlackfin.h>
36
37/* SYSTEM & MMR ADDRESS DEFINITIONS FOR ADSP-BF548 */
38
39/* Include defBF54x_base.h for the set of #defines that are common to all ADSP-BF54x processors */
40#include "defBF54x_base.h"
41
42/* The following are the #defines needed by ADSP-BF548 that are not in the common header */
43
44/* Timer Registers */
45
46#define TIMER8_CONFIG 0xffc00600 /* Timer 8 Configuration Register */
47#define TIMER8_COUNTER 0xffc00604 /* Timer 8 Counter Register */
48#define TIMER8_PERIOD 0xffc00608 /* Timer 8 Period Register */
49#define TIMER8_WIDTH 0xffc0060c /* Timer 8 Width Register */
50#define TIMER9_CONFIG 0xffc00610 /* Timer 9 Configuration Register */
51#define TIMER9_COUNTER 0xffc00614 /* Timer 9 Counter Register */
52#define TIMER9_PERIOD 0xffc00618 /* Timer 9 Period Register */
53#define TIMER9_WIDTH 0xffc0061c /* Timer 9 Width Register */
54#define TIMER10_CONFIG 0xffc00620 /* Timer 10 Configuration Register */
55#define TIMER10_COUNTER 0xffc00624 /* Timer 10 Counter Register */
56#define TIMER10_PERIOD 0xffc00628 /* Timer 10 Period Register */
57#define TIMER10_WIDTH 0xffc0062c /* Timer 10 Width Register */
58
59/* Timer Group of 3 Registers */
60
61#define TIMER_ENABLE1 0xffc00640 /* Timer Group of 3 Enable Register */
62#define TIMER_DISABLE1 0xffc00644 /* Timer Group of 3 Disable Register */
63#define TIMER_STATUS1 0xffc00648 /* Timer Group of 3 Status Register */
64
65/* SPORT0 Registers */
66
67#define SPORT0_TCR1 0xffc00800 /* SPORT0 Transmit Configuration 1 Register */
68#define SPORT0_TCR2 0xffc00804 /* SPORT0 Transmit Configuration 2 Register */
69#define SPORT0_TCLKDIV 0xffc00808 /* SPORT0 Transmit Serial Clock Divider Register */
70#define SPORT0_TFSDIV 0xffc0080c /* SPORT0 Transmit Frame Sync Divider Register */
71#define SPORT0_TX 0xffc00810 /* SPORT0 Transmit Data Register */
72#define SPORT0_RX 0xffc00818 /* SPORT0 Receive Data Register */
73#define SPORT0_RCR1 0xffc00820 /* SPORT0 Receive Configuration 1 Register */
74#define SPORT0_RCR2 0xffc00824 /* SPORT0 Receive Configuration 2 Register */
75#define SPORT0_RCLKDIV 0xffc00828 /* SPORT0 Receive Serial Clock Divider Register */
76#define SPORT0_RFSDIV 0xffc0082c /* SPORT0 Receive Frame Sync Divider Register */
77#define SPORT0_STAT 0xffc00830 /* SPORT0 Status Register */
78#define SPORT0_CHNL 0xffc00834 /* SPORT0 Current Channel Register */
79#define SPORT0_MCMC1 0xffc00838 /* SPORT0 Multi channel Configuration Register 1 */
80#define SPORT0_MCMC2 0xffc0083c /* SPORT0 Multi channel Configuration Register 2 */
81#define SPORT0_MTCS0 0xffc00840 /* SPORT0 Multi channel Transmit Select Register 0 */
82#define SPORT0_MTCS1 0xffc00844 /* SPORT0 Multi channel Transmit Select Register 1 */
83#define SPORT0_MTCS2 0xffc00848 /* SPORT0 Multi channel Transmit Select Register 2 */
84#define SPORT0_MTCS3 0xffc0084c /* SPORT0 Multi channel Transmit Select Register 3 */
85#define SPORT0_MRCS0 0xffc00850 /* SPORT0 Multi channel Receive Select Register 0 */
86#define SPORT0_MRCS1 0xffc00854 /* SPORT0 Multi channel Receive Select Register 1 */
87#define SPORT0_MRCS2 0xffc00858 /* SPORT0 Multi channel Receive Select Register 2 */
88#define SPORT0_MRCS3 0xffc0085c /* SPORT0 Multi channel Receive Select Register 3 */
89
90/* EPPI0 Registers */
91
92#define EPPI0_STATUS 0xffc01000 /* EPPI0 Status Register */
93#define EPPI0_HCOUNT 0xffc01004 /* EPPI0 Horizontal Transfer Count Register */
94#define EPPI0_HDELAY 0xffc01008 /* EPPI0 Horizontal Delay Count Register */
95#define EPPI0_VCOUNT 0xffc0100c /* EPPI0 Vertical Transfer Count Register */
96#define EPPI0_VDELAY 0xffc01010 /* EPPI0 Vertical Delay Count Register */
97#define EPPI0_FRAME 0xffc01014 /* EPPI0 Lines per Frame Register */
98#define EPPI0_LINE 0xffc01018 /* EPPI0 Samples per Line Register */
99#define EPPI0_CLKDIV 0xffc0101c /* EPPI0 Clock Divide Register */
100#define EPPI0_CONTROL 0xffc01020 /* EPPI0 Control Register */
101#define EPPI0_FS1W_HBL 0xffc01024 /* EPPI0 FS1 Width Register / EPPI0 Horizontal Blanking Samples Per Line Register */
102#define EPPI0_FS1P_AVPL 0xffc01028 /* EPPI0 FS1 Period Register / EPPI0 Active Video Samples Per Line Register */
103#define EPPI0_FS2W_LVB 0xffc0102c /* EPPI0 FS2 Width Register / EPPI0 Lines of Vertical Blanking Register */
104#define EPPI0_FS2P_LAVF 0xffc01030 /* EPPI0 FS2 Period Register/ EPPI0 Lines of Active Video Per Field Register */
105#define EPPI0_CLIP 0xffc01034 /* EPPI0 Clipping Register */
106
107/* UART2 Registers */
108
109#define UART2_DLL 0xffc02100 /* Divisor Latch Low Byte */
110#define UART2_DLH 0xffc02104 /* Divisor Latch High Byte */
111#define UART2_GCTL 0xffc02108 /* Global Control Register */
112#define UART2_LCR 0xffc0210c /* Line Control Register */
113#define UART2_MCR 0xffc02110 /* Modem Control Register */
114#define UART2_LSR 0xffc02114 /* Line Status Register */
115#define UART2_MSR 0xffc02118 /* Modem Status Register */
116#define UART2_SCR 0xffc0211c /* Scratch Register */
117#define UART2_IER_SET 0xffc02120 /* Interrupt Enable Register Set */
118#define UART2_IER_CLEAR 0xffc02124 /* Interrupt Enable Register Clear */
119#define UART2_RBR 0xffc0212c /* Receive Buffer Register */
120
121/* Two Wire Interface Registers (TWI1) */
122
123#define TWI1_REGBASE 0xffc02200
124#define TWI1_CLKDIV 0xffc02200 /* Clock Divider Register */
125#define TWI1_CONTROL 0xffc02204 /* TWI Control Register */
126#define TWI1_SLAVE_CTRL 0xffc02208 /* TWI Slave Mode Control Register */
127#define TWI1_SLAVE_STAT 0xffc0220c /* TWI Slave Mode Status Register */
128#define TWI1_SLAVE_ADDR 0xffc02210 /* TWI Slave Mode Address Register */
129#define TWI1_MASTER_CTRL 0xffc02214 /* TWI Master Mode Control Register */
130#define TWI1_MASTER_STAT 0xffc02218 /* TWI Master Mode Status Register */
131#define TWI1_MASTER_ADDR 0xffc0221c /* TWI Master Mode Address Register */
132#define TWI1_INT_STAT 0xffc02220 /* TWI Interrupt Status Register */
133#define TWI1_INT_MASK 0xffc02224 /* TWI Interrupt Mask Register */
134#define TWI1_FIFO_CTRL 0xffc02228 /* TWI FIFO Control Register */
135#define TWI1_FIFO_STAT 0xffc0222c /* TWI FIFO Status Register */
136#define TWI1_XMT_DATA8 0xffc02280 /* TWI FIFO Transmit Data Single Byte Register */
137#define TWI1_XMT_DATA16 0xffc02284 /* TWI FIFO Transmit Data Double Byte Register */
138#define TWI1_RCV_DATA8 0xffc02288 /* TWI FIFO Receive Data Single Byte Register */
139#define TWI1_RCV_DATA16 0xffc0228c /* TWI FIFO Receive Data Double Byte Register */
140
141/* SPI2 Registers */
142
143#define SPI2_REGBASE 0xffc02400
144#define SPI2_CTL 0xffc02400 /* SPI2 Control Register */
145#define SPI2_FLG 0xffc02404 /* SPI2 Flag Register */
146#define SPI2_STAT 0xffc02408 /* SPI2 Status Register */
147#define SPI2_TDBR 0xffc0240c /* SPI2 Transmit Data Buffer Register */
148#define SPI2_RDBR 0xffc02410 /* SPI2 Receive Data Buffer Register */
149#define SPI2_BAUD 0xffc02414 /* SPI2 Baud Rate Register */
150#define SPI2_SHADOW 0xffc02418 /* SPI2 Receive Data Buffer Shadow Register */
151
152/* ATAPI Registers */
153
154#define ATAPI_CONTROL 0xffc03800 /* ATAPI Control Register */
155#define ATAPI_STATUS 0xffc03804 /* ATAPI Status Register */
156#define ATAPI_DEV_ADDR 0xffc03808 /* ATAPI Device Register Address */
157#define ATAPI_DEV_TXBUF 0xffc0380c /* ATAPI Device Register Write Data */
158#define ATAPI_DEV_RXBUF 0xffc03810 /* ATAPI Device Register Read Data */
159#define ATAPI_INT_MASK 0xffc03814 /* ATAPI Interrupt Mask Register */
160#define ATAPI_INT_STATUS 0xffc03818 /* ATAPI Interrupt Status Register */
161#define ATAPI_XFER_LEN 0xffc0381c /* ATAPI Length of Transfer */
162#define ATAPI_LINE_STATUS 0xffc03820 /* ATAPI Line Status */
163#define ATAPI_SM_STATE 0xffc03824 /* ATAPI State Machine Status */
164#define ATAPI_TERMINATE 0xffc03828 /* ATAPI Host Terminate */
165#define ATAPI_PIO_TFRCNT 0xffc0382c /* ATAPI PIO mode transfer count */
166#define ATAPI_DMA_TFRCNT 0xffc03830 /* ATAPI DMA mode transfer count */
167#define ATAPI_UMAIN_TFRCNT 0xffc03834 /* ATAPI UDMAIN transfer count */
168#define ATAPI_UDMAOUT_TFRCNT 0xffc03838 /* ATAPI UDMAOUT transfer count */
169#define ATAPI_REG_TIM_0 0xffc03840 /* ATAPI Register Transfer Timing 0 */
170#define ATAPI_PIO_TIM_0 0xffc03844 /* ATAPI PIO Timing 0 Register */
171#define ATAPI_PIO_TIM_1 0xffc03848 /* ATAPI PIO Timing 1 Register */
172#define ATAPI_MULTI_TIM_0 0xffc03850 /* ATAPI Multi-DMA Timing 0 Register */
173#define ATAPI_MULTI_TIM_1 0xffc03854 /* ATAPI Multi-DMA Timing 1 Register */
174#define ATAPI_MULTI_TIM_2 0xffc03858 /* ATAPI Multi-DMA Timing 2 Register */
175#define ATAPI_ULTRA_TIM_0 0xffc03860 /* ATAPI Ultra-DMA Timing 0 Register */
176#define ATAPI_ULTRA_TIM_1 0xffc03864 /* ATAPI Ultra-DMA Timing 1 Register */
177#define ATAPI_ULTRA_TIM_2 0xffc03868 /* ATAPI Ultra-DMA Timing 2 Register */
178#define ATAPI_ULTRA_TIM_3 0xffc0386c /* ATAPI Ultra-DMA Timing 3 Register */
179
180/* SDH Registers */
181
182#define SDH_PWR_CTL 0xffc03900 /* SDH Power Control */
183#define SDH_CLK_CTL 0xffc03904 /* SDH Clock Control */
184#define SDH_ARGUMENT 0xffc03908 /* SDH Argument */
185#define SDH_COMMAND 0xffc0390c /* SDH Command */
186#define SDH_RESP_CMD 0xffc03910 /* SDH Response Command */
187#define SDH_RESPONSE0 0xffc03914 /* SDH Response0 */
188#define SDH_RESPONSE1 0xffc03918 /* SDH Response1 */
189#define SDH_RESPONSE2 0xffc0391c /* SDH Response2 */
190#define SDH_RESPONSE3 0xffc03920 /* SDH Response3 */
191#define SDH_DATA_TIMER 0xffc03924 /* SDH Data Timer */
192#define SDH_DATA_LGTH 0xffc03928 /* SDH Data Length */
193#define SDH_DATA_CTL 0xffc0392c /* SDH Data Control */
194#define SDH_DATA_CNT 0xffc03930 /* SDH Data Counter */
195#define SDH_STATUS 0xffc03934 /* SDH Status */
196#define SDH_STATUS_CLR 0xffc03938 /* SDH Status Clear */
197#define SDH_MASK0 0xffc0393c /* SDH Interrupt0 Mask */
198#define SDH_MASK1 0xffc03940 /* SDH Interrupt1 Mask */
199#define SDH_FIFO_CNT 0xffc03948 /* SDH FIFO Counter */
200#define SDH_FIFO 0xffc03980 /* SDH Data FIFO */
201#define SDH_E_STATUS 0xffc039c0 /* SDH Exception Status */
202#define SDH_E_MASK 0xffc039c4 /* SDH Exception Mask */
203#define SDH_CFG 0xffc039c8 /* SDH Configuration */
204#define SDH_RD_WAIT_EN 0xffc039cc /* SDH Read Wait Enable */
205#define SDH_PID0 0xffc039d0 /* SDH Peripheral Identification0 */
206#define SDH_PID1 0xffc039d4 /* SDH Peripheral Identification1 */
207#define SDH_PID2 0xffc039d8 /* SDH Peripheral Identification2 */
208#define SDH_PID3 0xffc039dc /* SDH Peripheral Identification3 */
209#define SDH_PID4 0xffc039e0 /* SDH Peripheral Identification4 */
210#define SDH_PID5 0xffc039e4 /* SDH Peripheral Identification5 */
211#define SDH_PID6 0xffc039e8 /* SDH Peripheral Identification6 */
212#define SDH_PID7 0xffc039ec /* SDH Peripheral Identification7 */
213
214/* HOST Port Registers */
215
216#define HOST_CONTROL 0xffc03a00 /* HOST Control Register */
217#define HOST_STATUS 0xffc03a04 /* HOST Status Register */
218#define HOST_TIMEOUT 0xffc03a08 /* HOST Acknowledge Mode Timeout Register */
219
220/* USB Control Registers */
221
222#define USB_FADDR 0xffc03c00 /* Function address register */
223#define USB_POWER 0xffc03c04 /* Power management register */
224#define USB_INTRTX 0xffc03c08 /* Interrupt register for endpoint 0 and Tx endpoint 1 to 7 */
225#define USB_INTRRX 0xffc03c0c /* Interrupt register for Rx endpoints 1 to 7 */
226#define USB_INTRTXE 0xffc03c10 /* Interrupt enable register for IntrTx */
227#define USB_INTRRXE 0xffc03c14 /* Interrupt enable register for IntrRx */
228#define USB_INTRUSB 0xffc03c18 /* Interrupt register for common USB interrupts */
229#define USB_INTRUSBE 0xffc03c1c /* Interrupt enable register for IntrUSB */
230#define USB_FRAME 0xffc03c20 /* USB frame number */
231#define USB_INDEX 0xffc03c24 /* Index register for selecting the indexed endpoint registers */
232#define USB_TESTMODE 0xffc03c28 /* Enabled USB 20 test modes */
233#define USB_GLOBINTR 0xffc03c2c /* Global Interrupt Mask register and Wakeup Exception Interrupt */
234#define USB_GLOBAL_CTL 0xffc03c30 /* Global Clock Control for the core */
235
236/* USB Packet Control Registers */
237
238#define USB_TX_MAX_PACKET 0xffc03c40 /* Maximum packet size for Host Tx endpoint */
239#define USB_CSR0 0xffc03c44 /* Control Status register for endpoint 0 and Control Status register for Host Tx endpoint */
240#define USB_TXCSR 0xffc03c44 /* Control Status register for endpoint 0 and Control Status register for Host Tx endpoint */
241#define USB_RX_MAX_PACKET 0xffc03c48 /* Maximum packet size for Host Rx endpoint */
242#define USB_RXCSR 0xffc03c4c /* Control Status register for Host Rx endpoint */
243#define USB_COUNT0 0xffc03c50 /* Number of bytes received in endpoint 0 FIFO and Number of bytes received in Host Tx endpoint */
244#define USB_RXCOUNT 0xffc03c50 /* Number of bytes received in endpoint 0 FIFO and Number of bytes received in Host Tx endpoint */
245#define USB_TXTYPE 0xffc03c54 /* Sets the transaction protocol and peripheral endpoint number for the Host Tx endpoint */
246#define USB_NAKLIMIT0 0xffc03c58 /* Sets the NAK response timeout on Endpoint 0 and on Bulk transfers for Host Tx endpoint */
247#define USB_TXINTERVAL 0xffc03c58 /* Sets the NAK response timeout on Endpoint 0 and on Bulk transfers for Host Tx endpoint */
248#define USB_RXTYPE 0xffc03c5c /* Sets the transaction protocol and peripheral endpoint number for the Host Rx endpoint */
249#define USB_RXINTERVAL 0xffc03c60 /* Sets the polling interval for Interrupt and Isochronous transfers or the NAK response timeout on Bulk transfers */
250#define USB_TXCOUNT 0xffc03c68 /* Number of bytes to be written to the selected endpoint Tx FIFO */
251
252/* USB Endpoint FIFO Registers */
253
254#define USB_EP0_FIFO 0xffc03c80 /* Endpoint 0 FIFO */
255#define USB_EP1_FIFO 0xffc03c88 /* Endpoint 1 FIFO */
256#define USB_EP2_FIFO 0xffc03c90 /* Endpoint 2 FIFO */
257#define USB_EP3_FIFO 0xffc03c98 /* Endpoint 3 FIFO */
258#define USB_EP4_FIFO 0xffc03ca0 /* Endpoint 4 FIFO */
259#define USB_EP5_FIFO 0xffc03ca8 /* Endpoint 5 FIFO */
260#define USB_EP6_FIFO 0xffc03cb0 /* Endpoint 6 FIFO */
261#define USB_EP7_FIFO 0xffc03cb8 /* Endpoint 7 FIFO */
262
263/* USB OTG Control Registers */
264
265#define USB_OTG_DEV_CTL 0xffc03d00 /* OTG Device Control Register */
266#define USB_OTG_VBUS_IRQ 0xffc03d04 /* OTG VBUS Control Interrupts */
267#define USB_OTG_VBUS_MASK 0xffc03d08 /* VBUS Control Interrupt Enable */
268
269/* USB Phy Control Registers */
270
271#define USB_LINKINFO 0xffc03d48 /* Enables programming of some PHY-side delays */
272#define USB_VPLEN 0xffc03d4c /* Determines duration of VBUS pulse for VBUS charging */
273#define USB_HS_EOF1 0xffc03d50 /* Time buffer for High-Speed transactions */
274#define USB_FS_EOF1 0xffc03d54 /* Time buffer for Full-Speed transactions */
275#define USB_LS_EOF1 0xffc03d58 /* Time buffer for Low-Speed transactions */
276
277/* (APHY_CNTRL is for ADI usage only) */
278
279#define USB_APHY_CNTRL 0xffc03de0 /* Register that increases visibility of Analog PHY */
280
281/* (APHY_CALIB is for ADI usage only) */
282
283#define USB_APHY_CALIB 0xffc03de4 /* Register used to set some calibration values */
284#define USB_APHY_CNTRL2 0xffc03de8 /* Register used to prevent re-enumeration once Moab goes into hibernate mode */
285
286/* (PHY_TEST is for ADI usage only) */
287
288#define USB_PHY_TEST 0xffc03dec /* Used for reducing simulation time and simplifies FIFO testability */
289#define USB_PLLOSC_CTRL 0xffc03df0 /* Used to program different parameters for USB PLL and Oscillator */
290#define USB_SRP_CLKDIV 0xffc03df4 /* Used to program clock divide value for the clock fed to the SRP detection logic */
291
292/* USB Endpoint 0 Control Registers */
293
294#define USB_EP_NI0_TXMAXP 0xffc03e00 /* Maximum packet size for Host Tx endpoint0 */
295#define USB_EP_NI0_TXCSR 0xffc03e04 /* Control Status register for endpoint 0 */
296#define USB_EP_NI0_RXMAXP 0xffc03e08 /* Maximum packet size for Host Rx endpoint0 */
297#define USB_EP_NI0_RXCSR 0xffc03e0c /* Control Status register for Host Rx endpoint0 */
298#define USB_EP_NI0_RXCOUNT 0xffc03e10 /* Number of bytes received in endpoint 0 FIFO */
299#define USB_EP_NI0_TXTYPE 0xffc03e14 /* Sets the transaction protocol and peripheral endpoint number for the Host Tx endpoint0 */
300#define USB_EP_NI0_TXINTERVAL 0xffc03e18 /* Sets the NAK response timeout on Endpoint 0 */
301#define USB_EP_NI0_RXTYPE 0xffc03e1c /* Sets the transaction protocol and peripheral endpoint number for the Host Rx endpoint0 */
302#define USB_EP_NI0_RXINTERVAL 0xffc03e20 /* Sets the polling interval for Interrupt/Isochronous transfers or the NAK response timeout on Bulk transfers for Host Rx endpoint0 */
303
304/* USB Endpoint 1 Control Registers */
305
306#define USB_EP_NI0_TXCOUNT 0xffc03e28 /* Number of bytes to be written to the endpoint0 Tx FIFO */
307#define USB_EP_NI1_TXMAXP 0xffc03e40 /* Maximum packet size for Host Tx endpoint1 */
308#define USB_EP_NI1_TXCSR 0xffc03e44 /* Control Status register for endpoint1 */
309#define USB_EP_NI1_RXMAXP 0xffc03e48 /* Maximum packet size for Host Rx endpoint1 */
310#define USB_EP_NI1_RXCSR 0xffc03e4c /* Control Status register for Host Rx endpoint1 */
311#define USB_EP_NI1_RXCOUNT 0xffc03e50 /* Number of bytes received in endpoint1 FIFO */
312#define USB_EP_NI1_TXTYPE 0xffc03e54 /* Sets the transaction protocol and peripheral endpoint number for the Host Tx endpoint1 */
313#define USB_EP_NI1_TXINTERVAL 0xffc03e58 /* Sets the NAK response timeout on Endpoint1 */
314#define USB_EP_NI1_RXTYPE 0xffc03e5c /* Sets the transaction protocol and peripheral endpoint number for the Host Rx endpoint1 */
315#define USB_EP_NI1_RXINTERVAL 0xffc03e60 /* Sets the polling interval for Interrupt/Isochronous transfers or the NAK response timeout on Bulk transfers for Host Rx endpoint1 */
316
317/* USB Endpoint 2 Control Registers */
318
319#define USB_EP_NI1_TXCOUNT 0xffc03e68 /* Number of bytes to be written to the+H102 endpoint1 Tx FIFO */
320#define USB_EP_NI2_TXMAXP 0xffc03e80 /* Maximum packet size for Host Tx endpoint2 */
321#define USB_EP_NI2_TXCSR 0xffc03e84 /* Control Status register for endpoint2 */
322#define USB_EP_NI2_RXMAXP 0xffc03e88 /* Maximum packet size for Host Rx endpoint2 */
323#define USB_EP_NI2_RXCSR 0xffc03e8c /* Control Status register for Host Rx endpoint2 */
324#define USB_EP_NI2_RXCOUNT 0xffc03e90 /* Number of bytes received in endpoint2 FIFO */
325#define USB_EP_NI2_TXTYPE 0xffc03e94 /* Sets the transaction protocol and peripheral endpoint number for the Host Tx endpoint2 */
326#define USB_EP_NI2_TXINTERVAL 0xffc03e98 /* Sets the NAK response timeout on Endpoint2 */
327#define USB_EP_NI2_RXTYPE 0xffc03e9c /* Sets the transaction protocol and peripheral endpoint number for the Host Rx endpoint2 */
328#define USB_EP_NI2_RXINTERVAL 0xffc03ea0 /* Sets the polling interval for Interrupt/Isochronous transfers or the NAK response timeout on Bulk transfers for Host Rx endpoint2 */
329
330/* USB Endpoint 3 Control Registers */
331
332#define USB_EP_NI2_TXCOUNT 0xffc03ea8 /* Number of bytes to be written to the endpoint2 Tx FIFO */
333#define USB_EP_NI3_TXMAXP 0xffc03ec0 /* Maximum packet size for Host Tx endpoint3 */
334#define USB_EP_NI3_TXCSR 0xffc03ec4 /* Control Status register for endpoint3 */
335#define USB_EP_NI3_RXMAXP 0xffc03ec8 /* Maximum packet size for Host Rx endpoint3 */
336#define USB_EP_NI3_RXCSR 0xffc03ecc /* Control Status register for Host Rx endpoint3 */
337#define USB_EP_NI3_RXCOUNT 0xffc03ed0 /* Number of bytes received in endpoint3 FIFO */
338#define USB_EP_NI3_TXTYPE 0xffc03ed4 /* Sets the transaction protocol and peripheral endpoint number for the Host Tx endpoint3 */
339#define USB_EP_NI3_TXINTERVAL 0xffc03ed8 /* Sets the NAK response timeout on Endpoint3 */
340#define USB_EP_NI3_RXTYPE 0xffc03edc /* Sets the transaction protocol and peripheral endpoint number for the Host Rx endpoint3 */
341#define USB_EP_NI3_RXINTERVAL 0xffc03ee0 /* Sets the polling interval for Interrupt/Isochronous transfers or the NAK response timeout on Bulk transfers for Host Rx endpoint3 */
342
343/* USB Endpoint 4 Control Registers */
344
345#define USB_EP_NI3_TXCOUNT 0xffc03ee8 /* Number of bytes to be written to the H124endpoint3 Tx FIFO */
346#define USB_EP_NI4_TXMAXP 0xffc03f00 /* Maximum packet size for Host Tx endpoint4 */
347#define USB_EP_NI4_TXCSR 0xffc03f04 /* Control Status register for endpoint4 */
348#define USB_EP_NI4_RXMAXP 0xffc03f08 /* Maximum packet size for Host Rx endpoint4 */
349#define USB_EP_NI4_RXCSR 0xffc03f0c /* Control Status register for Host Rx endpoint4 */
350#define USB_EP_NI4_RXCOUNT 0xffc03f10 /* Number of bytes received in endpoint4 FIFO */
351#define USB_EP_NI4_TXTYPE 0xffc03f14 /* Sets the transaction protocol and peripheral endpoint number for the Host Tx endpoint4 */
352#define USB_EP_NI4_TXINTERVAL 0xffc03f18 /* Sets the NAK response timeout on Endpoint4 */
353#define USB_EP_NI4_RXTYPE 0xffc03f1c /* Sets the transaction protocol and peripheral endpoint number for the Host Rx endpoint4 */
354#define USB_EP_NI4_RXINTERVAL 0xffc03f20 /* Sets the polling interval for Interrupt/Isochronous transfers or the NAK response timeout on Bulk transfers for Host Rx endpoint4 */
355
356/* USB Endpoint 5 Control Registers */
357
358#define USB_EP_NI4_TXCOUNT 0xffc03f28 /* Number of bytes to be written to the endpoint4 Tx FIFO */
359#define USB_EP_NI5_TXMAXP 0xffc03f40 /* Maximum packet size for Host Tx endpoint5 */
360#define USB_EP_NI5_TXCSR 0xffc03f44 /* Control Status register for endpoint5 */
361#define USB_EP_NI5_RXMAXP 0xffc03f48 /* Maximum packet size for Host Rx endpoint5 */
362#define USB_EP_NI5_RXCSR 0xffc03f4c /* Control Status register for Host Rx endpoint5 */
363#define USB_EP_NI5_RXCOUNT 0xffc03f50 /* Number of bytes received in endpoint5 FIFO */
364#define USB_EP_NI5_TXTYPE 0xffc03f54 /* Sets the transaction protocol and peripheral endpoint number for the Host Tx endpoint5 */
365#define USB_EP_NI5_TXINTERVAL 0xffc03f58 /* Sets the NAK response timeout on Endpoint5 */
366#define USB_EP_NI5_RXTYPE 0xffc03f5c /* Sets the transaction protocol and peripheral endpoint number for the Host Rx endpoint5 */
367#define USB_EP_NI5_RXINTERVAL 0xffc03f60 /* Sets the polling interval for Interrupt/Isochronous transfers or the NAK response timeout on Bulk transfers for Host Rx endpoint5 */
368
369/* USB Endpoint 6 Control Registers */
370
371#define USB_EP_NI5_TXCOUNT 0xffc03f68 /* Number of bytes to be written to the H145endpoint5 Tx FIFO */
372#define USB_EP_NI6_TXMAXP 0xffc03f80 /* Maximum packet size for Host Tx endpoint6 */
373#define USB_EP_NI6_TXCSR 0xffc03f84 /* Control Status register for endpoint6 */
374#define USB_EP_NI6_RXMAXP 0xffc03f88 /* Maximum packet size for Host Rx endpoint6 */
375#define USB_EP_NI6_RXCSR 0xffc03f8c /* Control Status register for Host Rx endpoint6 */
376#define USB_EP_NI6_RXCOUNT 0xffc03f90 /* Number of bytes received in endpoint6 FIFO */
377#define USB_EP_NI6_TXTYPE 0xffc03f94 /* Sets the transaction protocol and peripheral endpoint number for the Host Tx endpoint6 */
378#define USB_EP_NI6_TXINTERVAL 0xffc03f98 /* Sets the NAK response timeout on Endpoint6 */
379#define USB_EP_NI6_RXTYPE 0xffc03f9c /* Sets the transaction protocol and peripheral endpoint number for the Host Rx endpoint6 */
380#define USB_EP_NI6_RXINTERVAL 0xffc03fa0 /* Sets the polling interval for Interrupt/Isochronous transfers or the NAK response timeout on Bulk transfers for Host Rx endpoint6 */
381
382/* USB Endpoint 7 Control Registers */
383
384#define USB_EP_NI6_TXCOUNT 0xffc03fa8 /* Number of bytes to be written to the endpoint6 Tx FIFO */
385#define USB_EP_NI7_TXMAXP 0xffc03fc0 /* Maximum packet size for Host Tx endpoint7 */
386#define USB_EP_NI7_TXCSR 0xffc03fc4 /* Control Status register for endpoint7 */
387#define USB_EP_NI7_RXMAXP 0xffc03fc8 /* Maximum packet size for Host Rx endpoint7 */
388#define USB_EP_NI7_RXCSR 0xffc03fcc /* Control Status register for Host Rx endpoint7 */
389#define USB_EP_NI7_RXCOUNT 0xffc03fd0 /* Number of bytes received in endpoint7 FIFO */
390#define USB_EP_NI7_TXTYPE 0xffc03fd4 /* Sets the transaction protocol and peripheral endpoint number for the Host Tx endpoint7 */
391#define USB_EP_NI7_TXINTERVAL 0xffc03fd8 /* Sets the NAK response timeout on Endpoint7 */
392#define USB_EP_NI7_RXTYPE 0xffc03fdc /* Sets the transaction protocol and peripheral endpoint number for the Host Rx endpoint7 */
393#define USB_EP_NI7_RXINTERVAL 0xffc03ff0 /* Sets the polling interval for Interrupt/Isochronous transfers or the NAK response timeout on Bulk transfers for Host Rx endpoint7 */
394#define USB_EP_NI7_TXCOUNT 0xffc03ff8 /* Number of bytes to be written to the endpoint7 Tx FIFO */
395#define USB_DMA_INTERRUPT 0xffc04000 /* Indicates pending interrupts for the DMA channels */
396
397/* USB Channel 0 Config Registers */
398
399#define USB_DMA0CONTROL 0xffc04004 /* DMA master channel 0 configuration */
400#define USB_DMA0ADDRLOW 0xffc04008 /* Lower 16-bits of memory source/destination address for DMA master channel 0 */
401#define USB_DMA0ADDRHIGH 0xffc0400c /* Upper 16-bits of memory source/destination address for DMA master channel 0 */
402#define USB_DMA0COUNTLOW 0xffc04010 /* Lower 16-bits of byte count of DMA transfer for DMA master channel 0 */
403#define USB_DMA0COUNTHIGH 0xffc04014 /* Upper 16-bits of byte count of DMA transfer for DMA master channel 0 */
404
405/* USB Channel 1 Config Registers */
406
407#define USB_DMA1CONTROL 0xffc04024 /* DMA master channel 1 configuration */
408#define USB_DMA1ADDRLOW 0xffc04028 /* Lower 16-bits of memory source/destination address for DMA master channel 1 */
409#define USB_DMA1ADDRHIGH 0xffc0402c /* Upper 16-bits of memory source/destination address for DMA master channel 1 */
410#define USB_DMA1COUNTLOW 0xffc04030 /* Lower 16-bits of byte count of DMA transfer for DMA master channel 1 */
411#define USB_DMA1COUNTHIGH 0xffc04034 /* Upper 16-bits of byte count of DMA transfer for DMA master channel 1 */
412
413/* USB Channel 2 Config Registers */
414
415#define USB_DMA2CONTROL 0xffc04044 /* DMA master channel 2 configuration */
416#define USB_DMA2ADDRLOW 0xffc04048 /* Lower 16-bits of memory source/destination address for DMA master channel 2 */
417#define USB_DMA2ADDRHIGH 0xffc0404c /* Upper 16-bits of memory source/destination address for DMA master channel 2 */
418#define USB_DMA2COUNTLOW 0xffc04050 /* Lower 16-bits of byte count of DMA transfer for DMA master channel 2 */
419#define USB_DMA2COUNTHIGH 0xffc04054 /* Upper 16-bits of byte count of DMA transfer for DMA master channel 2 */
420
421/* USB Channel 3 Config Registers */
422
423#define USB_DMA3CONTROL 0xffc04064 /* DMA master channel 3 configuration */
424#define USB_DMA3ADDRLOW 0xffc04068 /* Lower 16-bits of memory source/destination address for DMA master channel 3 */
425#define USB_DMA3ADDRHIGH 0xffc0406c /* Upper 16-bits of memory source/destination address for DMA master channel 3 */
426#define USB_DMA3COUNTLOW 0xffc04070 /* Lower 16-bits of byte count of DMA transfer for DMA master channel 3 */
427#define USB_DMA3COUNTHIGH 0xffc04074 /* Upper 16-bits of byte count of DMA transfer for DMA master channel 3 */
428
429/* USB Channel 4 Config Registers */
430
431#define USB_DMA4CONTROL 0xffc04084 /* DMA master channel 4 configuration */
432#define USB_DMA4ADDRLOW 0xffc04088 /* Lower 16-bits of memory source/destination address for DMA master channel 4 */
433#define USB_DMA4ADDRHIGH 0xffc0408c /* Upper 16-bits of memory source/destination address for DMA master channel 4 */
434#define USB_DMA4COUNTLOW 0xffc04090 /* Lower 16-bits of byte count of DMA transfer for DMA master channel 4 */
435#define USB_DMA4COUNTHIGH 0xffc04094 /* Upper 16-bits of byte count of DMA transfer for DMA master channel 4 */
436
437/* USB Channel 5 Config Registers */
438
439#define USB_DMA5CONTROL 0xffc040a4 /* DMA master channel 5 configuration */
440#define USB_DMA5ADDRLOW 0xffc040a8 /* Lower 16-bits of memory source/destination address for DMA master channel 5 */
441#define USB_DMA5ADDRHIGH 0xffc040ac /* Upper 16-bits of memory source/destination address for DMA master channel 5 */
442#define USB_DMA5COUNTLOW 0xffc040b0 /* Lower 16-bits of byte count of DMA transfer for DMA master channel 5 */
443#define USB_DMA5COUNTHIGH 0xffc040b4 /* Upper 16-bits of byte count of DMA transfer for DMA master channel 5 */
444
445/* USB Channel 6 Config Registers */
446
447#define USB_DMA6CONTROL 0xffc040c4 /* DMA master channel 6 configuration */
448#define USB_DMA6ADDRLOW 0xffc040c8 /* Lower 16-bits of memory source/destination address for DMA master channel 6 */
449#define USB_DMA6ADDRHIGH 0xffc040cc /* Upper 16-bits of memory source/destination address for DMA master channel 6 */
450#define USB_DMA6COUNTLOW 0xffc040d0 /* Lower 16-bits of byte count of DMA transfer for DMA master channel 6 */
451#define USB_DMA6COUNTHIGH 0xffc040d4 /* Upper 16-bits of byte count of DMA transfer for DMA master channel 6 */
452
453/* USB Channel 7 Config Registers */
454
455#define USB_DMA7CONTROL 0xffc040e4 /* DMA master channel 7 configuration */
456#define USB_DMA7ADDRLOW 0xffc040e8 /* Lower 16-bits of memory source/destination address for DMA master channel 7 */
457#define USB_DMA7ADDRHIGH 0xffc040ec /* Upper 16-bits of memory source/destination address for DMA master channel 7 */
458#define USB_DMA7COUNTLOW 0xffc040f0 /* Lower 16-bits of byte count of DMA transfer for DMA master channel 7 */
459#define USB_DMA7COUNTHIGH 0xffc040f4 /* Upper 16-bits of byte count of DMA transfer for DMA master channel 7 */
460
461/* Keypad Registers */
462
463#define KPAD_CTL 0xffc04100 /* Controls keypad module enable and disable */
464#define KPAD_PRESCALE 0xffc04104 /* Establish a time base for programing the KPAD_MSEL register */
465#define KPAD_MSEL 0xffc04108 /* Selects delay parameters for keypad interface sensitivity */
466#define KPAD_ROWCOL 0xffc0410c /* Captures the row and column output values of the keys pressed */
467#define KPAD_STAT 0xffc04110 /* Holds and clears the status of the keypad interface interrupt */
468#define KPAD_SOFTEVAL 0xffc04114 /* Lets software force keypad interface to check for keys being pressed */
469
470/* Pixel Compositor (PIXC) Registers */
471
472#define PIXC_CTL 0xffc04400 /* Overlay enable, resampling mode, I/O data format, transparency enable, watermark level, FIFO status */
473#define PIXC_PPL 0xffc04404 /* Holds the number of pixels per line of the display */
474#define PIXC_LPF 0xffc04408 /* Holds the number of lines per frame of the display */
475#define PIXC_AHSTART 0xffc0440c /* Contains horizontal start pixel information of the overlay data (set A) */
476#define PIXC_AHEND 0xffc04410 /* Contains horizontal end pixel information of the overlay data (set A) */
477#define PIXC_AVSTART 0xffc04414 /* Contains vertical start pixel information of the overlay data (set A) */
478#define PIXC_AVEND 0xffc04418 /* Contains vertical end pixel information of the overlay data (set A) */
479#define PIXC_ATRANSP 0xffc0441c /* Contains the transparency ratio (set A) */
480#define PIXC_BHSTART 0xffc04420 /* Contains horizontal start pixel information of the overlay data (set B) */
481#define PIXC_BHEND 0xffc04424 /* Contains horizontal end pixel information of the overlay data (set B) */
482#define PIXC_BVSTART 0xffc04428 /* Contains vertical start pixel information of the overlay data (set B) */
483#define PIXC_BVEND 0xffc0442c /* Contains vertical end pixel information of the overlay data (set B) */
484#define PIXC_BTRANSP 0xffc04430 /* Contains the transparency ratio (set B) */
485#define PIXC_INTRSTAT 0xffc0443c /* Overlay interrupt configuration/status */
486#define PIXC_RYCON 0xffc04440 /* Color space conversion matrix register. Contains the R/Y conversion coefficients */
487#define PIXC_GUCON 0xffc04444 /* Color space conversion matrix register. Contains the G/U conversion coefficients */
488#define PIXC_BVCON 0xffc04448 /* Color space conversion matrix register. Contains the B/V conversion coefficients */
489#define PIXC_CCBIAS 0xffc0444c /* Bias values for the color space conversion matrix */
490#define PIXC_TC 0xffc04450 /* Holds the transparent color value */
491
492/* Handshake MDMA 0 Registers */
493
494#define HMDMA0_CONTROL 0xffc04500 /* Handshake MDMA0 Control Register */
495#define HMDMA0_ECINIT 0xffc04504 /* Handshake MDMA0 Initial Edge Count Register */
496#define HMDMA0_BCINIT 0xffc04508 /* Handshake MDMA0 Initial Block Count Register */
497#define HMDMA0_ECURGENT 0xffc0450c /* Handshake MDMA0 Urgent Edge Count Threshhold Register */
498#define HMDMA0_ECOVERFLOW 0xffc04510 /* Handshake MDMA0 Edge Count Overflow Interrupt Register */
499#define HMDMA0_ECOUNT 0xffc04514 /* Handshake MDMA0 Current Edge Count Register */
500#define HMDMA0_BCOUNT 0xffc04518 /* Handshake MDMA0 Current Block Count Register */
501
502/* Handshake MDMA 1 Registers */
503
504#define HMDMA1_CONTROL 0xffc04540 /* Handshake MDMA1 Control Register */
505#define HMDMA1_ECINIT 0xffc04544 /* Handshake MDMA1 Initial Edge Count Register */
506#define HMDMA1_BCINIT 0xffc04548 /* Handshake MDMA1 Initial Block Count Register */
507#define HMDMA1_ECURGENT 0xffc0454c /* Handshake MDMA1 Urgent Edge Count Threshhold Register */
508#define HMDMA1_ECOVERFLOW 0xffc04550 /* Handshake MDMA1 Edge Count Overflow Interrupt Register */
509#define HMDMA1_ECOUNT 0xffc04554 /* Handshake MDMA1 Current Edge Count Register */
510#define HMDMA1_BCOUNT 0xffc04558 /* Handshake MDMA1 Current Block Count Register */
511
512
513/* ********************************************************** */
514/* SINGLE BIT MACRO PAIRS (bit mask and negated one) */
515/* and MULTI BIT READ MACROS */
516/* ********************************************************** */
517
518/* Bit masks for PIXC_CTL */
519
520#define PIXC_EN 0x1 /* Pixel Compositor Enable */
521#define OVR_A_EN 0x2 /* Overlay A Enable */
522#define OVR_B_EN 0x4 /* Overlay B Enable */
523#define IMG_FORM 0x8 /* Image Data Format */
524#define OVR_FORM 0x10 /* Overlay Data Format */
525#define OUT_FORM 0x20 /* Output Data Format */
526#define UDS_MOD 0x40 /* Resampling Mode */
527#define TC_EN 0x80 /* Transparent Color Enable */
528#define IMG_STAT 0x300 /* Image FIFO Status */
529#define OVR_STAT 0xc00 /* Overlay FIFO Status */
530#define WM_LVL 0x3000 /* FIFO Watermark Level */
531
532/* Bit masks for PIXC_AHSTART */
533
534#define A_HSTART 0xfff /* Horizontal Start Coordinates */
535
536/* Bit masks for PIXC_AHEND */
537
538#define A_HEND 0xfff /* Horizontal End Coordinates */
539
540/* Bit masks for PIXC_AVSTART */
541
542#define A_VSTART 0x3ff /* Vertical Start Coordinates */
543
544/* Bit masks for PIXC_AVEND */
545
546#define A_VEND 0x3ff /* Vertical End Coordinates */
547
548/* Bit masks for PIXC_ATRANSP */
549
550#define A_TRANSP 0xf /* Transparency Value */
551
552/* Bit masks for PIXC_BHSTART */
553
554#define B_HSTART 0xfff /* Horizontal Start Coordinates */
555
556/* Bit masks for PIXC_BHEND */
557
558#define B_HEND 0xfff /* Horizontal End Coordinates */
559
560/* Bit masks for PIXC_BVSTART */
561
562#define B_VSTART 0x3ff /* Vertical Start Coordinates */
563
564/* Bit masks for PIXC_BVEND */
565
566#define B_VEND 0x3ff /* Vertical End Coordinates */
567
568/* Bit masks for PIXC_BTRANSP */
569
570#define B_TRANSP 0xf /* Transparency Value */
571
572/* Bit masks for PIXC_INTRSTAT */
573
574#define OVR_INT_EN 0x1 /* Interrupt at End of Last Valid Overlay */
575#define FRM_INT_EN 0x2 /* Interrupt at End of Frame */
576#define OVR_INT_STAT 0x4 /* Overlay Interrupt Status */
577#define FRM_INT_STAT 0x8 /* Frame Interrupt Status */
578
579/* Bit masks for PIXC_RYCON */
580
581#define A11 0x3ff /* A11 in the Coefficient Matrix */
582#define A12 0xffc00 /* A12 in the Coefficient Matrix */
583#define A13 0x3ff00000 /* A13 in the Coefficient Matrix */
584#define RY_MULT4 0x40000000 /* Multiply Row by 4 */
585
586/* Bit masks for PIXC_GUCON */
587
588#define A21 0x3ff /* A21 in the Coefficient Matrix */
589#define A22 0xffc00 /* A22 in the Coefficient Matrix */
590#define A23 0x3ff00000 /* A23 in the Coefficient Matrix */
591#define GU_MULT4 0x40000000 /* Multiply Row by 4 */
592
593/* Bit masks for PIXC_BVCON */
594
595#define A31 0x3ff /* A31 in the Coefficient Matrix */
596#define A32 0xffc00 /* A32 in the Coefficient Matrix */
597#define A33 0x3ff00000 /* A33 in the Coefficient Matrix */
598#define BV_MULT4 0x40000000 /* Multiply Row by 4 */
599
600/* Bit masks for PIXC_CCBIAS */
601
602#define A14 0x3ff /* A14 in the Bias Vector */
603#define A24 0xffc00 /* A24 in the Bias Vector */
604#define A34 0x3ff00000 /* A34 in the Bias Vector */
605
606/* Bit masks for PIXC_TC */
607
608#define RY_TRANS 0xff /* Transparent Color - R/Y Component */
609#define GU_TRANS 0xff00 /* Transparent Color - G/U Component */
610#define BV_TRANS 0xff0000 /* Transparent Color - B/V Component */
611
612/* Bit masks for HOST_CONTROL */
613
614#define HOST_EN 0x1 /* Host Enable */
615#define HOST_END 0x2 /* Host Endianess */
616#define DATA_SIZE 0x4 /* Data Size */
617#define HOST_RST 0x8 /* Host Reset */
618#define HRDY_OVR 0x20 /* Host Ready Override */
619#define INT_MODE 0x40 /* Interrupt Mode */
620#define BT_EN 0x80 /* Bus Timeout Enable */
621#define EHW 0x100 /* Enable Host Write */
622#define EHR 0x200 /* Enable Host Read */
623#define BDR 0x400 /* Burst DMA Requests */
624
625/* Bit masks for HOST_STATUS */
626
627#define DMA_READY 0x1 /* DMA Ready */
628#define FIFOFULL 0x2 /* FIFO Full */
629#define FIFOEMPTY 0x4 /* FIFO Empty */
630#define DMA_COMPLETE 0x8 /* DMA Complete */
631#define HSHK 0x10 /* Host Handshake */
632#define HSTIMEOUT 0x20 /* Host Timeout */
633#define HIRQ 0x40 /* Host Interrupt Request */
634#define ALLOW_CNFG 0x80 /* Allow New Configuration */
635#define DMA_DIR 0x100 /* DMA Direction */
636#define BTE 0x200 /* Bus Timeout Enabled */
637
638/* Bit masks for HOST_TIMEOUT */
639
640#define COUNT_TIMEOUT 0x7ff /* Host Timeout count */
641
642/* Bit masks for KPAD_CTL */
643
644#define KPAD_EN 0x1 /* Keypad Enable */
645#define KPAD_IRQMODE 0x6 /* Key Press Interrupt Enable */
646#define KPAD_ROWEN 0x1c00 /* Row Enable Width */
647#define KPAD_COLEN 0xe000 /* Column Enable Width */
648
649/* Bit masks for KPAD_PRESCALE */
650
651#define KPAD_PRESCALE_VAL 0x3f /* Key Prescale Value */
652
653/* Bit masks for KPAD_MSEL */
654
655#define DBON_SCALE 0xff /* Debounce Scale Value */
656#define COLDRV_SCALE 0xff00 /* Column Driver Scale Value */
657
658/* Bit masks for KPAD_ROWCOL */
659
660#define KPAD_ROW 0xff /* Rows Pressed */
661#define KPAD_COL 0xff00 /* Columns Pressed */
662
663/* Bit masks for KPAD_STAT */
664
665#define KPAD_IRQ 0x1 /* Keypad Interrupt Status */
666#define KPAD_MROWCOL 0x6 /* Multiple Row/Column Keypress Status */
667#define KPAD_PRESSED 0x8 /* Key press current status */
668
669/* Bit masks for KPAD_SOFTEVAL */
670
671#define KPAD_SOFTEVAL_E 0x2 /* Software Programmable Force Evaluate */
672
673/* Bit masks for SDH_COMMAND */
674
675#define CMD_IDX 0x3f /* Command Index */
676#define CMD_RSP 0x40 /* Response */
677#define CMD_L_RSP 0x80 /* Long Response */
678#define CMD_INT_E 0x100 /* Command Interrupt */
679#define CMD_PEND_E 0x200 /* Command Pending */
680#define CMD_E 0x400 /* Command Enable */
681
682/* Bit masks for SDH_PWR_CTL */
683
684#define PWR_ON 0x3 /* Power On */
685#if 0
686#define TBD 0x3c /* TBD */
687#endif
688#define SD_CMD_OD 0x40 /* Open Drain Output */
689#define ROD_CTL 0x80 /* Rod Control */
690
691/* Bit masks for SDH_CLK_CTL */
692
693#define CLKDIV 0xff /* MC_CLK Divisor */
694#define CLK_E 0x100 /* MC_CLK Bus Clock Enable */
695#define PWR_SV_E 0x200 /* Power Save Enable */
696#define CLKDIV_BYPASS 0x400 /* Bypass Divisor */
697#define WIDE_BUS 0x800 /* Wide Bus Mode Enable */
698
699/* Bit masks for SDH_RESP_CMD */
700
701#define RESP_CMD 0x3f /* Response Command */
702
703/* Bit masks for SDH_DATA_CTL */
704
705#define DTX_E 0x1 /* Data Transfer Enable */
706#define DTX_DIR 0x2 /* Data Transfer Direction */
707#define DTX_MODE 0x4 /* Data Transfer Mode */
708#define DTX_DMA_E 0x8 /* Data Transfer DMA Enable */
709#define DTX_BLK_LGTH 0xf0 /* Data Transfer Block Length */
710
711/* Bit masks for SDH_STATUS */
712
713#define CMD_CRC_FAIL 0x1 /* CMD CRC Fail */
714#define DAT_CRC_FAIL 0x2 /* Data CRC Fail */
715#define CMD_TIME_OUT 0x4 /* CMD Time Out */
716#define DAT_TIME_OUT 0x8 /* Data Time Out */
717#define TX_UNDERRUN 0x10 /* Transmit Underrun */
718#define RX_OVERRUN 0x20 /* Receive Overrun */
719#define CMD_RESP_END 0x40 /* CMD Response End */
720#define CMD_SENT 0x80 /* CMD Sent */
721#define DAT_END 0x100 /* Data End */
722#define START_BIT_ERR 0x200 /* Start Bit Error */
723#define DAT_BLK_END 0x400 /* Data Block End */
724#define CMD_ACT 0x800 /* CMD Active */
725#define TX_ACT 0x1000 /* Transmit Active */
726#define RX_ACT 0x2000 /* Receive Active */
727#define TX_FIFO_STAT 0x4000 /* Transmit FIFO Status */
728#define RX_FIFO_STAT 0x8000 /* Receive FIFO Status */
729#define TX_FIFO_FULL 0x10000 /* Transmit FIFO Full */
730#define RX_FIFO_FULL 0x20000 /* Receive FIFO Full */
731#define TX_FIFO_ZERO 0x40000 /* Transmit FIFO Empty */
732#define RX_DAT_ZERO 0x80000 /* Receive FIFO Empty */
733#define TX_DAT_RDY 0x100000 /* Transmit Data Available */
734#define RX_FIFO_RDY 0x200000 /* Receive Data Available */
735
736/* Bit masks for SDH_STATUS_CLR */
737
738#define CMD_CRC_FAIL_STAT 0x1 /* CMD CRC Fail Status */
739#define DAT_CRC_FAIL_STAT 0x2 /* Data CRC Fail Status */
740#define CMD_TIMEOUT_STAT 0x4 /* CMD Time Out Status */
741#define DAT_TIMEOUT_STAT 0x8 /* Data Time Out status */
742#define TX_UNDERRUN_STAT 0x10 /* Transmit Underrun Status */
743#define RX_OVERRUN_STAT 0x20 /* Receive Overrun Status */
744#define CMD_RESP_END_STAT 0x40 /* CMD Response End Status */
745#define CMD_SENT_STAT 0x80 /* CMD Sent Status */
746#define DAT_END_STAT 0x100 /* Data End Status */
747#define START_BIT_ERR_STAT 0x200 /* Start Bit Error Status */
748#define DAT_BLK_END_STAT 0x400 /* Data Block End Status */
749
750/* Bit masks for SDH_MASK0 */
751
752#define CMD_CRC_FAIL_MASK 0x1 /* CMD CRC Fail Mask */
753#define DAT_CRC_FAIL_MASK 0x2 /* Data CRC Fail Mask */
754#define CMD_TIMEOUT_MASK 0x4 /* CMD Time Out Mask */
755#define DAT_TIMEOUT_MASK 0x8 /* Data Time Out Mask */
756#define TX_UNDERRUN_MASK 0x10 /* Transmit Underrun Mask */
757#define RX_OVERRUN_MASK 0x20 /* Receive Overrun Mask */
758#define CMD_RESP_END_MASK 0x40 /* CMD Response End Mask */
759#define CMD_SENT_MASK 0x80 /* CMD Sent Mask */
760#define DAT_END_MASK 0x100 /* Data End Mask */
761#define START_BIT_ERR_MASK 0x200 /* Start Bit Error Mask */
762#define DAT_BLK_END_MASK 0x400 /* Data Block End Mask */
763#define CMD_ACT_MASK 0x800 /* CMD Active Mask */
764#define TX_ACT_MASK 0x1000 /* Transmit Active Mask */
765#define RX_ACT_MASK 0x2000 /* Receive Active Mask */
766#define TX_FIFO_STAT_MASK 0x4000 /* Transmit FIFO Status Mask */
767#define RX_FIFO_STAT_MASK 0x8000 /* Receive FIFO Status Mask */
768#define TX_FIFO_FULL_MASK 0x10000 /* Transmit FIFO Full Mask */
769#define RX_FIFO_FULL_MASK 0x20000 /* Receive FIFO Full Mask */
770#define TX_FIFO_ZERO_MASK 0x40000 /* Transmit FIFO Empty Mask */
771#define RX_DAT_ZERO_MASK 0x80000 /* Receive FIFO Empty Mask */
772#define TX_DAT_RDY_MASK 0x100000 /* Transmit Data Available Mask */
773#define RX_FIFO_RDY_MASK 0x200000 /* Receive Data Available Mask */
774
775/* Bit masks for SDH_FIFO_CNT */
776
777#define FIFO_COUNT 0x7fff /* FIFO Count */
778
779/* Bit masks for SDH_E_STATUS */
780
781#define SDIO_INT_DET 0x2 /* SDIO Int Detected */
782#define SD_CARD_DET 0x10 /* SD Card Detect */
783
784/* Bit masks for SDH_E_MASK */
785
786#define SDIO_MSK 0x2 /* Mask SDIO Int Detected */
787#define SCD_MSK 0x40 /* Mask Card Detect */
788
789/* Bit masks for SDH_CFG */
790
791#define CLKS_EN 0x1 /* Clocks Enable */
792#define SD4E 0x4 /* SDIO 4-Bit Enable */
793#define MWE 0x8 /* Moving Window Enable */
794#define SD_RST 0x10 /* SDMMC Reset */
795#define PUP_SDDAT 0x20 /* Pull-up SD_DAT */
796#define PUP_SDDAT3 0x40 /* Pull-up SD_DAT3 */
797#define PD_SDDAT3 0x80 /* Pull-down SD_DAT3 */
798
799/* Bit masks for SDH_RD_WAIT_EN */
800
801#define RWR 0x1 /* Read Wait Request */
802
803/* Bit masks for ATAPI_CONTROL */
804
805#define PIO_START 0x1 /* Start PIO/Reg Op */
806#define MULTI_START 0x2 /* Start Multi-DMA Op */
807#define ULTRA_START 0x4 /* Start Ultra-DMA Op */
808#define XFER_DIR 0x8 /* Transfer Direction */
809#define IORDY_EN 0x10 /* IORDY Enable */
810#define FIFO_FLUSH 0x20 /* Flush FIFOs */
811#define SOFT_RST 0x40 /* Soft Reset */
812#define DEV_RST 0x80 /* Device Reset */
813#define TFRCNT_RST 0x100 /* Trans Count Reset */
814#define END_ON_TERM 0x200 /* End/Terminate Select */
815#define PIO_USE_DMA 0x400 /* PIO-DMA Enable */
816#define UDMAIN_FIFO_THRS 0xf000 /* Ultra DMA-IN FIFO Threshold */
817
818/* Bit masks for ATAPI_STATUS */
819
820#define PIO_XFER_ON 0x1 /* PIO transfer in progress */
821#define MULTI_XFER_ON 0x2 /* Multi-word DMA transfer in progress */
822#define ULTRA_XFER_ON 0x4 /* Ultra DMA transfer in progress */
823#define ULTRA_IN_FL 0xf0 /* Ultra DMA Input FIFO Level */
824
825/* Bit masks for ATAPI_DEV_ADDR */
826
827#define DEV_ADDR 0x1f /* Device Address */
828
829/* Bit masks for ATAPI_INT_MASK */
830
831#define ATAPI_DEV_INT_MASK 0x1 /* Device interrupt mask */
832#define PIO_DONE_MASK 0x2 /* PIO transfer done interrupt mask */
833#define MULTI_DONE_MASK 0x4 /* Multi-DMA transfer done interrupt mask */
834#define UDMAIN_DONE_MASK 0x8 /* Ultra-DMA in transfer done interrupt mask */
835#define UDMAOUT_DONE_MASK 0x10 /* Ultra-DMA out transfer done interrupt mask */
836#define HOST_TERM_XFER_MASK 0x20 /* Host terminate current transfer interrupt mask */
837#define MULTI_TERM_MASK 0x40 /* Device terminate Multi-DMA transfer interrupt mask */
838#define UDMAIN_TERM_MASK 0x80 /* Device terminate Ultra-DMA-in transfer interrupt mask */
839#define UDMAOUT_TERM_MASK 0x100 /* Device terminate Ultra-DMA-out transfer interrupt mask */
840
841/* Bit masks for ATAPI_INT_STATUS */
842
843#define ATAPI_DEV_INT 0x1 /* Device interrupt status */
844#define PIO_DONE_INT 0x2 /* PIO transfer done interrupt status */
845#define MULTI_DONE_INT 0x4 /* Multi-DMA transfer done interrupt status */
846#define UDMAIN_DONE_INT 0x8 /* Ultra-DMA in transfer done interrupt status */
847#define UDMAOUT_DONE_INT 0x10 /* Ultra-DMA out transfer done interrupt status */
848#define HOST_TERM_XFER_INT 0x20 /* Host terminate current transfer interrupt status */
849#define MULTI_TERM_INT 0x40 /* Device terminate Multi-DMA transfer interrupt status */
850#define UDMAIN_TERM_INT 0x80 /* Device terminate Ultra-DMA-in transfer interrupt status */
851#define UDMAOUT_TERM_INT 0x100 /* Device terminate Ultra-DMA-out transfer interrupt status */
852
853/* Bit masks for ATAPI_LINE_STATUS */
854
855#define ATAPI_INTR 0x1 /* Device interrupt to host line status */
856#define ATAPI_DASP 0x2 /* Device dasp to host line status */
857#define ATAPI_CS0N 0x4 /* ATAPI chip select 0 line status */
858#define ATAPI_CS1N 0x8 /* ATAPI chip select 1 line status */
859#define ATAPI_ADDR 0x70 /* ATAPI address line status */
860#define ATAPI_DMAREQ 0x80 /* ATAPI DMA request line status */
861#define ATAPI_DMAACKN 0x100 /* ATAPI DMA acknowledge line status */
862#define ATAPI_DIOWN 0x200 /* ATAPI write line status */
863#define ATAPI_DIORN 0x400 /* ATAPI read line status */
864#define ATAPI_IORDY 0x800 /* ATAPI IORDY line status */
865
866/* Bit masks for ATAPI_SM_STATE */
867
868#define PIO_CSTATE 0xf /* PIO mode state machine current state */
869#define DMA_CSTATE 0xf0 /* DMA mode state machine current state */
870#define UDMAIN_CSTATE 0xf00 /* Ultra DMA-In mode state machine current state */
871#define UDMAOUT_CSTATE 0xf000 /* ATAPI IORDY line status */
872
873/* Bit masks for ATAPI_TERMINATE */
874
875#define ATAPI_HOST_TERM 0x1 /* Host terminationation */
876
877/* Bit masks for ATAPI_REG_TIM_0 */
878
879#define T2_REG 0xff /* End of cycle time for register access transfers */
880#define TEOC_REG 0xff00 /* Selects DIOR/DIOW pulsewidth */
881
882/* Bit masks for ATAPI_PIO_TIM_0 */
883
884#define T1_REG 0xf /* Time from address valid to DIOR/DIOW */
885#define T2_REG_PIO 0xff0 /* DIOR/DIOW pulsewidth */
886#define T4_REG 0xf000 /* DIOW data hold */
887
888/* Bit masks for ATAPI_PIO_TIM_1 */
889
890#define TEOC_REG_PIO 0xff /* End of cycle time for PIO access transfers. */
891
892/* Bit masks for ATAPI_MULTI_TIM_0 */
893
894#define TD 0xff /* DIOR/DIOW asserted pulsewidth */
895#define TM 0xff00 /* Time from address valid to DIOR/DIOW */
896
897/* Bit masks for ATAPI_MULTI_TIM_1 */
898
899#define TKW 0xff /* Selects DIOW negated pulsewidth */
900#define TKR 0xff00 /* Selects DIOR negated pulsewidth */
901
902/* Bit masks for ATAPI_MULTI_TIM_2 */
903
904#define TH 0xff /* Selects DIOW data hold */
905#define TEOC 0xff00 /* Selects end of cycle for DMA */
906
907/* Bit masks for ATAPI_ULTRA_TIM_0 */
908
909#define TACK 0xff /* Selects setup and hold times for TACK */
910#define TENV 0xff00 /* Selects envelope time */
911
912/* Bit masks for ATAPI_ULTRA_TIM_1 */
913
914#define TDVS 0xff /* Selects data valid setup time */
915#define TCYC_TDVS 0xff00 /* Selects cycle time - TDVS time */
916
917/* Bit masks for ATAPI_ULTRA_TIM_2 */
918
919#define TSS 0xff /* Selects time from STROBE edge to negation of DMARQ or assertion of STOP */
920#define TMLI 0xff00 /* Selects interlock time */
921
922/* Bit masks for ATAPI_ULTRA_TIM_3 */
923
924#define TZAH 0xff /* Selects minimum delay required for output */
925#define READY_PAUSE 0xff00 /* Selects ready to pause */
926
927/* Bit masks for TIMER_ENABLE1 */
928
929#define TIMEN8 0x1 /* Timer 8 Enable */
930#define TIMEN9 0x2 /* Timer 9 Enable */
931#define TIMEN10 0x4 /* Timer 10 Enable */
932
933/* Bit masks for TIMER_DISABLE1 */
934
935#define TIMDIS8 0x1 /* Timer 8 Disable */
936#define TIMDIS9 0x2 /* Timer 9 Disable */
937#define TIMDIS10 0x4 /* Timer 10 Disable */
938
939/* Bit masks for TIMER_STATUS1 */
940
941#define TIMIL8 0x1 /* Timer 8 Interrupt */
942#define TIMIL9 0x2 /* Timer 9 Interrupt */
943#define TIMIL10 0x4 /* Timer 10 Interrupt */
944#define TOVF_ERR8 0x10 /* Timer 8 Counter Overflow */
945#define TOVF_ERR9 0x20 /* Timer 9 Counter Overflow */
946#define TOVF_ERR10 0x40 /* Timer 10 Counter Overflow */
947#define TRUN8 0x1000 /* Timer 8 Slave Enable Status */
948#define TRUN9 0x2000 /* Timer 9 Slave Enable Status */
949#define TRUN10 0x4000 /* Timer 10 Slave Enable Status */
950
951/* Bit masks for EPPI0 are obtained from common base header for EPPIx (EPPI1 and EPPI2) */
952
953/* Bit masks for USB_FADDR */
954
955#define FUNCTION_ADDRESS 0x7f /* Function address */
956
957/* Bit masks for USB_POWER */
958
959#define ENABLE_SUSPENDM 0x1 /* enable SuspendM output */
960#define SUSPEND_MODE 0x2 /* Suspend Mode indicator */
961#define RESUME_MODE 0x4 /* DMA Mode */
962#define RESET 0x8 /* Reset indicator */
963#define HS_MODE 0x10 /* High Speed mode indicator */
964#define HS_ENABLE 0x20 /* high Speed Enable */
965#define SOFT_CONN 0x40 /* Soft connect */
966#define ISO_UPDATE 0x80 /* Isochronous update */
967
968/* Bit masks for USB_INTRTX */
969
970#define EP0_TX 0x1 /* Tx Endpoint 0 interrupt */
971#define EP1_TX 0x2 /* Tx Endpoint 1 interrupt */
972#define EP2_TX 0x4 /* Tx Endpoint 2 interrupt */
973#define EP3_TX 0x8 /* Tx Endpoint 3 interrupt */
974#define EP4_TX 0x10 /* Tx Endpoint 4 interrupt */
975#define EP5_TX 0x20 /* Tx Endpoint 5 interrupt */
976#define EP6_TX 0x40 /* Tx Endpoint 6 interrupt */
977#define EP7_TX 0x80 /* Tx Endpoint 7 interrupt */
978
979/* Bit masks for USB_INTRRX */
980
981#define EP1_RX 0x2 /* Rx Endpoint 1 interrupt */
982#define EP2_RX 0x4 /* Rx Endpoint 2 interrupt */
983#define EP3_RX 0x8 /* Rx Endpoint 3 interrupt */
984#define EP4_RX 0x10 /* Rx Endpoint 4 interrupt */
985#define EP5_RX 0x20 /* Rx Endpoint 5 interrupt */
986#define EP6_RX 0x40 /* Rx Endpoint 6 interrupt */
987#define EP7_RX 0x80 /* Rx Endpoint 7 interrupt */
988
989/* Bit masks for USB_INTRTXE */
990
991#define EP0_TX_E 0x1 /* Endpoint 0 interrupt Enable */
992#define EP1_TX_E 0x2 /* Tx Endpoint 1 interrupt Enable */
993#define EP2_TX_E 0x4 /* Tx Endpoint 2 interrupt Enable */
994#define EP3_TX_E 0x8 /* Tx Endpoint 3 interrupt Enable */
995#define EP4_TX_E 0x10 /* Tx Endpoint 4 interrupt Enable */
996#define EP5_TX_E 0x20 /* Tx Endpoint 5 interrupt Enable */
997#define EP6_TX_E 0x40 /* Tx Endpoint 6 interrupt Enable */
998#define EP7_TX_E 0x80 /* Tx Endpoint 7 interrupt Enable */
999
1000/* Bit masks for USB_INTRRXE */
1001
1002#define EP1_RX_E 0x2 /* Rx Endpoint 1 interrupt Enable */
1003#define EP2_RX_E 0x4 /* Rx Endpoint 2 interrupt Enable */
1004#define EP3_RX_E 0x8 /* Rx Endpoint 3 interrupt Enable */
1005#define EP4_RX_E 0x10 /* Rx Endpoint 4 interrupt Enable */
1006#define EP5_RX_E 0x20 /* Rx Endpoint 5 interrupt Enable */
1007#define EP6_RX_E 0x40 /* Rx Endpoint 6 interrupt Enable */
1008#define EP7_RX_E 0x80 /* Rx Endpoint 7 interrupt Enable */
1009
1010/* Bit masks for USB_INTRUSB */
1011
1012#define SUSPEND_B 0x1 /* Suspend indicator */
1013#define RESUME_B 0x2 /* Resume indicator */
1014#define RESET_OR_BABLE_B 0x4 /* Reset/babble indicator */
1015#define SOF_B 0x8 /* Start of frame */
1016#define CONN_B 0x10 /* Connection indicator */
1017#define DISCON_B 0x20 /* Disconnect indicator */
1018#define SESSION_REQ_B 0x40 /* Session Request */
1019#define VBUS_ERROR_B 0x80 /* Vbus threshold indicator */
1020
1021/* Bit masks for USB_INTRUSBE */
1022
1023#define SUSPEND_BE 0x1 /* Suspend indicator int enable */
1024#define RESUME_BE 0x2 /* Resume indicator int enable */
1025#define RESET_OR_BABLE_BE 0x4 /* Reset/babble indicator int enable */
1026#define SOF_BE 0x8 /* Start of frame int enable */
1027#define CONN_BE 0x10 /* Connection indicator int enable */
1028#define DISCON_BE 0x20 /* Disconnect indicator int enable */
1029#define SESSION_REQ_BE 0x40 /* Session Request int enable */
1030#define VBUS_ERROR_BE 0x80 /* Vbus threshold indicator int enable */
1031
1032/* Bit masks for USB_FRAME */
1033
1034#define FRAME_NUMBER 0x7ff /* Frame number */
1035
1036/* Bit masks for USB_INDEX */
1037
1038#define SELECTED_ENDPOINT 0xf /* selected endpoint */
1039
1040/* Bit masks for USB_GLOBAL_CTL */
1041
1042#define GLOBAL_ENA 0x1 /* enables USB module */
1043#define EP1_TX_ENA 0x2 /* Transmit endpoint 1 enable */
1044#define EP2_TX_ENA 0x4 /* Transmit endpoint 2 enable */
1045#define EP3_TX_ENA 0x8 /* Transmit endpoint 3 enable */
1046#define EP4_TX_ENA 0x10 /* Transmit endpoint 4 enable */
1047#define EP5_TX_ENA 0x20 /* Transmit endpoint 5 enable */
1048#define EP6_TX_ENA 0x40 /* Transmit endpoint 6 enable */
1049#define EP7_TX_ENA 0x80 /* Transmit endpoint 7 enable */
1050#define EP1_RX_ENA 0x100 /* Receive endpoint 1 enable */
1051#define EP2_RX_ENA 0x200 /* Receive endpoint 2 enable */
1052#define EP3_RX_ENA 0x400 /* Receive endpoint 3 enable */
1053#define EP4_RX_ENA 0x800 /* Receive endpoint 4 enable */
1054#define EP5_RX_ENA 0x1000 /* Receive endpoint 5 enable */
1055#define EP6_RX_ENA 0x2000 /* Receive endpoint 6 enable */
1056#define EP7_RX_ENA 0x4000 /* Receive endpoint 7 enable */
1057
1058/* Bit masks for USB_OTG_DEV_CTL */
1059
1060#define SESSION 0x1 /* session indicator */
1061#define HOST_REQ 0x2 /* Host negotiation request */
1062#define HOST_MODE 0x4 /* indicates USBDRC is a host */
1063#define VBUS0 0x8 /* Vbus level indicator[0] */
1064#define VBUS1 0x10 /* Vbus level indicator[1] */
1065#define LSDEV 0x20 /* Low-speed indicator */
1066#define FSDEV 0x40 /* Full or High-speed indicator */
1067#define B_DEVICE 0x80 /* A' or 'B' device indicator */
1068
1069/* Bit masks for USB_OTG_VBUS_IRQ */
1070
1071#define DRIVE_VBUS_ON 0x1 /* indicator to drive VBUS control circuit */
1072#define DRIVE_VBUS_OFF 0x2 /* indicator to shut off charge pump */
1073#define CHRG_VBUS_START 0x4 /* indicator for external circuit to start charging VBUS */
1074#define CHRG_VBUS_END 0x8 /* indicator for external circuit to end charging VBUS */
1075#define DISCHRG_VBUS_START 0x10 /* indicator to start discharging VBUS */
1076#define DISCHRG_VBUS_END 0x20 /* indicator to stop discharging VBUS */
1077
1078/* Bit masks for USB_OTG_VBUS_MASK */
1079
1080#define DRIVE_VBUS_ON_ENA 0x1 /* enable DRIVE_VBUS_ON interrupt */
1081#define DRIVE_VBUS_OFF_ENA 0x2 /* enable DRIVE_VBUS_OFF interrupt */
1082#define CHRG_VBUS_START_ENA 0x4 /* enable CHRG_VBUS_START interrupt */
1083#define CHRG_VBUS_END_ENA 0x8 /* enable CHRG_VBUS_END interrupt */
1084#define DISCHRG_VBUS_START_ENA 0x10 /* enable DISCHRG_VBUS_START interrupt */
1085#define DISCHRG_VBUS_END_ENA 0x20 /* enable DISCHRG_VBUS_END interrupt */
1086
1087/* Bit masks for USB_CSR0 */
1088
1089#define RXPKTRDY 0x1 /* data packet receive indicator */
1090#define TXPKTRDY 0x2 /* data packet in FIFO indicator */
1091#define STALL_SENT 0x4 /* STALL handshake sent */
1092#define DATAEND 0x8 /* Data end indicator */
1093#define SETUPEND 0x10 /* Setup end */
1094#define SENDSTALL 0x20 /* Send STALL handshake */
1095#define SERVICED_RXPKTRDY 0x40 /* used to clear the RxPktRdy bit */
1096#define SERVICED_SETUPEND 0x80 /* used to clear the SetupEnd bit */
1097#define FLUSHFIFO 0x100 /* flush endpoint FIFO */
1098#define STALL_RECEIVED_H 0x4 /* STALL handshake received host mode */
1099#define SETUPPKT_H 0x8 /* send Setup token host mode */
1100#define ERROR_H 0x10 /* timeout error indicator host mode */
1101#define REQPKT_H 0x20 /* Request an IN transaction host mode */
1102#define STATUSPKT_H 0x40 /* Status stage transaction host mode */
1103#define NAK_TIMEOUT_H 0x80 /* EP0 halted after a NAK host mode */
1104
1105/* Bit masks for USB_COUNT0 */
1106
1107#define EP0_RX_COUNT 0x7f /* number of received bytes in EP0 FIFO */
1108
1109/* Bit masks for USB_NAKLIMIT0 */
1110
1111#define EP0_NAK_LIMIT 0x1f /* number of frames/micro frames after which EP0 timeouts */
1112
1113/* Bit masks for USB_TX_MAX_PACKET */
1114
1115#define MAX_PACKET_SIZE_T 0x7ff /* maximum data pay load in a frame */
1116
1117/* Bit masks for USB_RX_MAX_PACKET */
1118
1119#define MAX_PACKET_SIZE_R 0x7ff /* maximum data pay load in a frame */
1120
1121/* Bit masks for USB_TXCSR */
1122
1123#define TXPKTRDY_T 0x1 /* data packet in FIFO indicator */
1124#define FIFO_NOT_EMPTY_T 0x2 /* FIFO not empty */
1125#define UNDERRUN_T 0x4 /* TxPktRdy not set for an IN token */
1126#define FLUSHFIFO_T 0x8 /* flush endpoint FIFO */
1127#define STALL_SEND_T 0x10 /* issue a Stall handshake */
1128#define STALL_SENT_T 0x20 /* Stall handshake transmitted */
1129#define CLEAR_DATATOGGLE_T 0x40 /* clear endpoint data toggle */
1130#define INCOMPTX_T 0x80 /* indicates that a large packet is split */
1131#define DMAREQMODE_T 0x400 /* DMA mode (0 or 1) selection */
1132#define FORCE_DATATOGGLE_T 0x800 /* Force data toggle */
1133#define DMAREQ_ENA_T 0x1000 /* Enable DMA request for Tx EP */
1134#define ISO_T 0x4000 /* enable Isochronous transfers */
1135#define AUTOSET_T 0x8000 /* allows TxPktRdy to be set automatically */
1136#define ERROR_TH 0x4 /* error condition host mode */
1137#define STALL_RECEIVED_TH 0x20 /* Stall handshake received host mode */
1138#define NAK_TIMEOUT_TH 0x80 /* NAK timeout host mode */
1139
1140/* Bit masks for USB_TXCOUNT */
1141
1142#define TX_COUNT 0x1fff /* Number of bytes to be written to the selected endpoint Tx FIFO */
1143
1144/* Bit masks for USB_RXCSR */
1145
1146#define RXPKTRDY_R 0x1 /* data packet in FIFO indicator */
1147#define FIFO_FULL_R 0x2 /* FIFO not empty */
1148#define OVERRUN_R 0x4 /* TxPktRdy not set for an IN token */
1149#define DATAERROR_R 0x8 /* Out packet cannot be loaded into Rx FIFO */
1150#define FLUSHFIFO_R 0x10 /* flush endpoint FIFO */
1151#define STALL_SEND_R 0x20 /* issue a Stall handshake */
1152#define STALL_SENT_R 0x40 /* Stall handshake transmitted */
1153#define CLEAR_DATATOGGLE_R 0x80 /* clear endpoint data toggle */
1154#define INCOMPRX_R 0x100 /* indicates that a large packet is split */
1155#define DMAREQMODE_R 0x800 /* DMA mode (0 or 1) selection */
1156#define DISNYET_R 0x1000 /* disable Nyet handshakes */
1157#define DMAREQ_ENA_R 0x2000 /* Enable DMA request for Tx EP */
1158#define ISO_R 0x4000 /* enable Isochronous transfers */
1159#define AUTOCLEAR_R 0x8000 /* allows TxPktRdy to be set automatically */
1160#define ERROR_RH 0x4 /* TxPktRdy not set for an IN token host mode */
1161#define REQPKT_RH 0x20 /* request an IN transaction host mode */
1162#define STALL_RECEIVED_RH 0x40 /* Stall handshake received host mode */
1163#define INCOMPRX_RH 0x100 /* indicates that a large packet is split host mode */
1164#define DMAREQMODE_RH 0x800 /* DMA mode (0 or 1) selection host mode */
1165#define AUTOREQ_RH 0x4000 /* sets ReqPkt automatically host mode */
1166
1167/* Bit masks for USB_RXCOUNT */
1168
1169#define RX_COUNT 0x1fff /* Number of received bytes in the packet in the Rx FIFO */
1170
1171/* Bit masks for USB_TXTYPE */
1172
1173#define TARGET_EP_NO_T 0xf /* EP number */
1174#define PROTOCOL_T 0xc /* transfer type */
1175
1176/* Bit masks for USB_TXINTERVAL */
1177
1178#define TX_POLL_INTERVAL 0xff /* polling interval for selected Tx EP */
1179
1180/* Bit masks for USB_RXTYPE */
1181
1182#define TARGET_EP_NO_R 0xf /* EP number */
1183#define PROTOCOL_R 0xc /* transfer type */
1184
1185/* Bit masks for USB_RXINTERVAL */
1186
1187#define RX_POLL_INTERVAL 0xff /* polling interval for selected Rx EP */
1188
1189/* Bit masks for USB_DMA_INTERRUPT */
1190
1191#define DMA0_INT 0x1 /* DMA0 pending interrupt */
1192#define DMA1_INT 0x2 /* DMA1 pending interrupt */
1193#define DMA2_INT 0x4 /* DMA2 pending interrupt */
1194#define DMA3_INT 0x8 /* DMA3 pending interrupt */
1195#define DMA4_INT 0x10 /* DMA4 pending interrupt */
1196#define DMA5_INT 0x20 /* DMA5 pending interrupt */
1197#define DMA6_INT 0x40 /* DMA6 pending interrupt */
1198#define DMA7_INT 0x80 /* DMA7 pending interrupt */
1199
1200/* Bit masks for USB_DMAxCONTROL */
1201
1202#define DMA_ENA 0x1 /* DMA enable */
1203#define DIRECTION 0x2 /* direction of DMA transfer */
1204#define MODE 0x4 /* DMA Bus error */
1205#define INT_ENA 0x8 /* Interrupt enable */
1206#define EPNUM 0xf0 /* EP number */
1207#define BUSERROR 0x100 /* DMA Bus error */
1208
1209/* Bit masks for USB_DMAxADDRHIGH */
1210
1211#define DMA_ADDR_HIGH 0xffff /* Upper 16-bits of memory source/destination address for the DMA master channel */
1212
1213/* Bit masks for USB_DMAxADDRLOW */
1214
1215#define DMA_ADDR_LOW 0xffff /* Lower 16-bits of memory source/destination address for the DMA master channel */
1216
1217/* Bit masks for USB_DMAxCOUNTHIGH */
1218
1219#define DMA_COUNT_HIGH 0xffff /* Upper 16-bits of byte count of DMA transfer for DMA master channel */
1220
1221/* Bit masks for USB_DMAxCOUNTLOW */
1222
1223#define DMA_COUNT_LOW 0xffff /* Lower 16-bits of byte count of DMA transfer for DMA master channel */
1224
1225/* Bit masks for HMDMAx_CONTROL */
1226
1227#define HMDMAEN 0x1 /* Handshake MDMA Enable */
1228#define REP 0x2 /* Handshake MDMA Request Polarity */
1229#define UTE 0x8 /* Urgency Threshold Enable */
1230#define OIE 0x10 /* Overflow Interrupt Enable */
1231#define BDIE 0x20 /* Block Done Interrupt Enable */
1232#define MBDI 0x40 /* Mask Block Done Interrupt */
1233#define DRQ 0x300 /* Handshake MDMA Request Type */
1234#define RBC 0x1000 /* Force Reload of BCOUNT */
1235#define PS 0x2000 /* Pin Status */
1236#define OI 0x4000 /* Overflow Interrupt Generated */
1237#define BDI 0x8000 /* Block Done Interrupt Generated */
1238
1239/* ******************************************* */
1240/* MULTI BIT MACRO ENUMERATIONS */
1241/* ******************************************* */
1242
1243
1244#endif /* _DEF_BF548_H */
diff --git a/include/asm-blackfin/mach-bf548/defBF548.h b/include/asm-blackfin/mach-bf548/defBF548.h
index e46f56891e6a..1d7c96edb038 100644
--- a/include/asm-blackfin/mach-bf548/defBF548.h
+++ b/include/asm-blackfin/mach-bf548/defBF548.h
@@ -1010,9 +1010,9 @@
1010#define DMA_READY 0x1 /* DMA Ready */ 1010#define DMA_READY 0x1 /* DMA Ready */
1011#define FIFOFULL 0x2 /* FIFO Full */ 1011#define FIFOFULL 0x2 /* FIFO Full */
1012#define FIFOEMPTY 0x4 /* FIFO Empty */ 1012#define FIFOEMPTY 0x4 /* FIFO Empty */
1013#define COMPLETE 0x8 /* DMA Complete */ 1013#define DMA_COMPLETE 0x8 /* DMA Complete */
1014#define HSHK 0x10 /* Host Handshake */ 1014#define HSHK 0x10 /* Host Handshake */
1015#define TIMEOUT 0x20 /* Host Timeout */ 1015#define HSTIMEOUT 0x20 /* Host Timeout */
1016#define HIRQ 0x40 /* Host Interrupt Request */ 1016#define HIRQ 0x40 /* Host Interrupt Request */
1017#define ALLOW_CNFG 0x80 /* Allow New Configuration */ 1017#define ALLOW_CNFG 0x80 /* Allow New Configuration */
1018#define DMA_DIR 0x100 /* DMA Direction */ 1018#define DMA_DIR 0x100 /* DMA Direction */
diff --git a/include/asm-blackfin/mach-bf548/dma.h b/include/asm-blackfin/mach-bf548/dma.h
index 4d97d3aa97cd..46ff31f20ae5 100644
--- a/include/asm-blackfin/mach-bf548/dma.h
+++ b/include/asm-blackfin/mach-bf548/dma.h
@@ -51,9 +51,13 @@
51#define CH_PIXC_OVERLAY 16 51#define CH_PIXC_OVERLAY 16
52#define CH_PIXC_OUTPUT 17 52#define CH_PIXC_OUTPUT 17
53#define CH_SPORT2_RX 18 53#define CH_SPORT2_RX 18
54#define CH_UART2_RX 18
54#define CH_SPORT2_TX 19 55#define CH_SPORT2_TX 19
56#define CH_UART2_TX 19
55#define CH_SPORT3_RX 20 57#define CH_SPORT3_RX 20
58#define CH_UART3_RX 20
56#define CH_SPORT3_TX 21 59#define CH_SPORT3_TX 21
60#define CH_UART3_TX 21
57#define CH_SDH 22 61#define CH_SDH 22
58#define CH_NFC 22 62#define CH_NFC 22
59#define CH_SPI2 23 63#define CH_SPI2 23
diff --git a/include/asm-blackfin/mach-bf548/irq.h b/include/asm-blackfin/mach-bf548/irq.h
index c34507a3f1df..ad380d1f5872 100644
--- a/include/asm-blackfin/mach-bf548/irq.h
+++ b/include/asm-blackfin/mach-bf548/irq.h
@@ -99,9 +99,13 @@ Events (highest priority) EMU 0
99#define IRQ_UART2_ERROR BFIN_IRQ(31) /* UART2 Status (Error) Interrupt */ 99#define IRQ_UART2_ERROR BFIN_IRQ(31) /* UART2 Status (Error) Interrupt */
100#define IRQ_CAN0_ERROR BFIN_IRQ(32) /* CAN0 Status (Error) Interrupt */ 100#define IRQ_CAN0_ERROR BFIN_IRQ(32) /* CAN0 Status (Error) Interrupt */
101#define IRQ_SPORT2_RX BFIN_IRQ(33) /* SPORT2 RX (DMA18) Interrupt */ 101#define IRQ_SPORT2_RX BFIN_IRQ(33) /* SPORT2 RX (DMA18) Interrupt */
102#define IRQ_UART2_RX BFIN_IRQ(33) /* UART2 RX (DMA18) Interrupt */
102#define IRQ_SPORT2_TX BFIN_IRQ(34) /* SPORT2 TX (DMA19) Interrupt */ 103#define IRQ_SPORT2_TX BFIN_IRQ(34) /* SPORT2 TX (DMA19) Interrupt */
104#define IRQ_UART2_TX BFIN_IRQ(34) /* UART2 TX (DMA19) Interrupt */
103#define IRQ_SPORT3_RX BFIN_IRQ(35) /* SPORT3 RX (DMA20) Interrupt */ 105#define IRQ_SPORT3_RX BFIN_IRQ(35) /* SPORT3 RX (DMA20) Interrupt */
106#define IRQ_UART3_RX BFIN_IRQ(35) /* UART3 RX (DMA20) Interrupt */
104#define IRQ_SPORT3_TX BFIN_IRQ(36) /* SPORT3 TX (DMA21) Interrupt */ 107#define IRQ_SPORT3_TX BFIN_IRQ(36) /* SPORT3 TX (DMA21) Interrupt */
108#define IRQ_UART3_TX BFIN_IRQ(36) /* UART3 TX (DMA21) Interrupt */
105#define IRQ_EPPI1 BFIN_IRQ(37) /* EPP1 (DMA13) Interrupt */ 109#define IRQ_EPPI1 BFIN_IRQ(37) /* EPP1 (DMA13) Interrupt */
106#define IRQ_EPPI2 BFIN_IRQ(38) /* EPP2 (DMA14) Interrupt */ 110#define IRQ_EPPI2 BFIN_IRQ(38) /* EPP2 (DMA14) Interrupt */
107#define IRQ_SPI1 BFIN_IRQ(39) /* SPI1 (DMA5) Interrupt */ 111#define IRQ_SPI1 BFIN_IRQ(39) /* SPI1 (DMA5) Interrupt */
@@ -421,9 +425,13 @@ Events (highest priority) EMU 0
421/* IAR4 BIT FILEDS */ 425/* IAR4 BIT FILEDS */
422#define IRQ_CAN0_ERR_POS 0 426#define IRQ_CAN0_ERR_POS 0
423#define IRQ_SPORT2_RX_POS 4 427#define IRQ_SPORT2_RX_POS 4
428#define IRQ_UART2_RX_POS 4
424#define IRQ_SPORT2_TX_POS 8 429#define IRQ_SPORT2_TX_POS 8
430#define IRQ_UART2_TX_POS 8
425#define IRQ_SPORT3_RX_POS 12 431#define IRQ_SPORT3_RX_POS 12
432#define IRQ_UART3_RX_POS 12
426#define IRQ_SPORT3_TX_POS 16 433#define IRQ_SPORT3_TX_POS 16
434#define IRQ_UART3_TX_POS 16
427#define IRQ_EPPI1_POS 20 435#define IRQ_EPPI1_POS 20
428#define IRQ_EPPI2_POS 24 436#define IRQ_EPPI2_POS 24
429#define IRQ_SPI1_POS 28 437#define IRQ_SPI1_POS 28
diff --git a/include/asm-blackfin/mach-bf561/blackfin.h b/include/asm-blackfin/mach-bf561/blackfin.h
index 562aee39895c..362617f93845 100644
--- a/include/asm-blackfin/mach-bf561/blackfin.h
+++ b/include/asm-blackfin/mach-bf561/blackfin.h
@@ -49,4 +49,24 @@
49#define bfin_read_FIO_INEN() bfin_read_FIO0_INEN() 49#define bfin_read_FIO_INEN() bfin_read_FIO0_INEN()
50#define bfin_write_FIO_INEN(val) bfin_write_FIO0_INEN(val) 50#define bfin_write_FIO_INEN(val) bfin_write_FIO0_INEN(val)
51 51
52
53#define SIC_IAR0 SICA_IAR0
54#define bfin_write_SIC_IMASK0 bfin_write_SICA_IMASK0
55#define bfin_write_SIC_IMASK1 bfin_write_SICA_IMASK1
56#define bfin_write_SIC_IWR0 bfin_write_SICA_IWR0
57#define bfin_write_SIC_IWR1 bfin_write_SICA_IWR1
58
59#define bfin_read_SIC_IMASK0 bfin_read_SICA_IMASK0
60#define bfin_read_SIC_IMASK1 bfin_read_SICA_IMASK1
61#define bfin_read_SIC_IWR0 bfin_read_SICA_IWR0
62#define bfin_read_SIC_IWR1 bfin_read_SICA_IWR1
63#define bfin_read_SIC_ISR0 bfin_read_SICA_ISR0
64#define bfin_read_SIC_ISR1 bfin_read_SICA_ISR1
65
66#define bfin_read_SIC_IMASK(x) bfin_read32(SICA_IMASK0 + (x << 2))
67#define bfin_write_SIC_IMASK(x, val) bfin_write32((SICA_IMASK0 + (x << 2)), val)
68#define bfin_read_SIC_ISR(x) bfin_read32(SICA_ISR0 + (x << 2))
69#define bfin_write_SIC_ISR(x, val) bfin_write32((SICA_ISR0 + (x << 2)), val)
70
71
52#endif /* _MACH_BLACKFIN_H_ */ 72#endif /* _MACH_BLACKFIN_H_ */
diff --git a/include/asm-blackfin/posix_types.h b/include/asm-blackfin/posix_types.h
index c3fa50fa50b8..23aa1f8c1bd1 100644
--- a/include/asm-blackfin/posix_types.h
+++ b/include/asm-blackfin/posix_types.h
@@ -39,14 +39,10 @@ typedef long long __kernel_loff_t;
39#endif 39#endif
40 40
41typedef struct { 41typedef struct {
42#if defined(__KERNEL__) || defined(__USE_ALL)
43 int val[2]; 42 int val[2];
44#else /* !defined(__KERNEL__) && !defined(__USE_ALL) */
45 int __val[2];
46#endif /* !defined(__KERNEL__) && !defined(__USE_ALL) */
47} __kernel_fsid_t; 43} __kernel_fsid_t;
48 44
49#if defined(__KERNEL__) || !defined(__GLIBC__) || (__GLIBC__ < 2) 45#if defined(__KERNEL__)
50 46
51#undef __FD_SET 47#undef __FD_SET
52#define __FD_SET(d, set) ((set)->fds_bits[__FDELT(d)] |= __FDMASK(d)) 48#define __FD_SET(d, set) ((set)->fds_bits[__FDELT(d)] |= __FDMASK(d))
@@ -60,6 +56,6 @@ typedef struct {
60#undef __FD_ZERO 56#undef __FD_ZERO
61#define __FD_ZERO(fdsetp) (memset (fdsetp, 0, sizeof(*(fd_set *)fdsetp))) 57#define __FD_ZERO(fdsetp) (memset (fdsetp, 0, sizeof(*(fd_set *)fdsetp)))
62 58
63#endif /* defined(__KERNEL__) || !defined(__GLIBC__) || (__GLIBC__ < 2) */ 59#endif /* defined(__KERNEL__) */
64 60
65#endif 61#endif
diff --git a/include/asm-blackfin/processor.h b/include/asm-blackfin/processor.h
index c571e958558c..1033e5c76011 100644
--- a/include/asm-blackfin/processor.h
+++ b/include/asm-blackfin/processor.h
@@ -30,6 +30,10 @@ static inline void wrusp(unsigned long usp)
30extern unsigned long memory_end; 30extern unsigned long memory_end;
31#define TASK_SIZE (memory_end) 31#define TASK_SIZE (memory_end)
32 32
33#ifdef __KERNEL__
34#define STACK_TOP TASK_SIZE
35#endif
36
33#define TASK_UNMAPPED_BASE 0 37#define TASK_UNMAPPED_BASE 0
34 38
35struct thread_struct { 39struct thread_struct {
diff --git a/include/asm-blackfin/termios.h b/include/asm-blackfin/termios.h
index e31fe859650b..d50d063c605a 100644
--- a/include/asm-blackfin/termios.h
+++ b/include/asm-blackfin/termios.h
@@ -39,24 +39,6 @@ struct termio {
39 39
40/* ioctl (fd, TIOCSERGETLSR, &result) where result may be as below */ 40/* ioctl (fd, TIOCSERGETLSR, &result) where result may be as below */
41 41
42/* line disciplines */
43#define N_TTY 0
44#define N_SLIP 1
45#define N_MOUSE 2
46#define N_PPP 3
47#define N_STRIP 4
48#define N_AX25 5
49#define N_X25 6 /* X.25 async */
50#define N_6PACK 7
51#define N_MASC 8 /* Reserved for Mobitex module <kaz@cafe.net> */
52#define N_R3964 9 /* Reserved for Simatic R3964 module */
53#define N_PROFIBUS_FDL 10 /* Reserved for Profibus <Dave@mvhi.com> */
54#define N_IRDA 11 /* Linux IR - http://irda.sourceforge.net/ */
55#define N_SMSBLOCK 12 /* SMS block mode - for talking to GSM data cards about SMS messages */
56#define N_HDLC 13 /* synchronous HDLC */
57#define N_SYNC_PPP 14 /* synchronous PPP */
58#define N_HCI 15 /* Bluetooth HCI UART */
59
60#ifdef __KERNEL__ 42#ifdef __KERNEL__
61 43
62/* intr=^C quit=^\ erase=del kill=^U 44/* intr=^C quit=^\ erase=del kill=^U
diff --git a/include/asm-blackfin/trace.h b/include/asm-blackfin/trace.h
index 6313aace9d59..ef18afbc2101 100644
--- a/include/asm-blackfin/trace.h
+++ b/include/asm-blackfin/trace.h
@@ -46,42 +46,47 @@ extern unsigned long software_trace_buff[];
46 46
47#ifdef CONFIG_DEBUG_BFIN_HWTRACE_ON 47#ifdef CONFIG_DEBUG_BFIN_HWTRACE_ON
48 48
49#define TRACE_BUFFER_START(preg, dreg) trace_buffer_start(preg, dreg)
50#define TRACE_BUFFER_STOP(preg, dreg) trace_buffer_stop(preg, dreg)
51
52#define trace_buffer_stop(preg, dreg) \ 49#define trace_buffer_stop(preg, dreg) \
53 preg.L = LO(TBUFCTL); \ 50 preg.L = LO(TBUFCTL); \
54 preg.H = HI(TBUFCTL); \ 51 preg.H = HI(TBUFCTL); \
55 dreg = 0x1; \ 52 dreg = 0x1; \
56 [preg] = dreg; 53 [preg] = dreg;
57 54
58#define trace_buffer_start(preg, dreg) \
59 preg.L = LO(TBUFCTL); \
60 preg.H = HI(TBUFCTL); \
61 dreg = BFIN_TRACE_ON; \
62 [preg] = dreg;
63
64#define trace_buffer_init(preg, dreg) \ 55#define trace_buffer_init(preg, dreg) \
65 preg.L = LO(TBUFCTL); \ 56 preg.L = LO(TBUFCTL); \
66 preg.H = HI(TBUFCTL); \ 57 preg.H = HI(TBUFCTL); \
67 dreg = BFIN_TRACE_INIT; \ 58 dreg = BFIN_TRACE_INIT; \
68 [preg] = dreg; 59 [preg] = dreg;
69 60
61#define trace_buffer_save(preg, dreg) \
62 preg.L = LO(TBUFCTL); \
63 preg.H = HI(TBUFCTL); \
64 dreg = [preg]; \
65 [sp++] = dreg; \
66 dreg = 0x1; \
67 [preg] = dreg;
68
69#define trace_buffer_restore(preg, dreg) \
70 preg.L = LO(TBUFCTL); \
71 preg.H = HI(TBUFCTL); \
72 dreg = [sp--]; \
73 [preg] = dreg;
74
70#else /* CONFIG_DEBUG_BFIN_HWTRACE_ON */ 75#else /* CONFIG_DEBUG_BFIN_HWTRACE_ON */
71 76
72#define trace_buffer_stop(preg, dreg) 77#define trace_buffer_stop(preg, dreg)
73#define trace_buffer_start(preg, dreg)
74#define trace_buffer_init(preg, dreg) 78#define trace_buffer_init(preg, dreg)
79#define trace_buffer_save(preg, dreg)
80#define trace_buffer_restore(preg, dreg)
75 81
76#endif /* CONFIG_DEBUG_BFIN_HWTRACE_ON */ 82#endif /* CONFIG_DEBUG_BFIN_HWTRACE_ON */
77 83
78#ifdef CONFIG_DEBUG_BFIN_NO_KERN_HWTRACE 84#ifdef CONFIG_DEBUG_BFIN_NO_KERN_HWTRACE
79# define DEBUG_START_HWTRACE(preg, dreg) trace_buffer_start(preg, dreg) 85# define DEBUG_HWTRACE_SAVE(preg, dreg) trace_buffer_save(preg, dreg)
80# define DEBUG_STOP_HWTRACE(preg, dreg) trace_buffer_stop(preg, dreg) 86# define DEBUG_HWTRACE_RESTORE(preg, dreg) trace_buffer_restore(preg, dreg)
81
82#else 87#else
83# define DEBUG_START_HWTRACE(preg, dreg) 88# define DEBUG_HWTRACE_SAVE(preg, dreg)
84# define DEBUG_STOP_HWTRACE(preg, dreg) 89# define DEBUG_HWTRACE_RESTORE(preg, dreg)
85#endif 90#endif
86 91
87#endif /* __ASSEMBLY__ */ 92#endif /* __ASSEMBLY__ */
diff --git a/include/asm-cris/Kbuild b/include/asm-cris/Kbuild
index 14498d5a2f65..17455459c43f 100644
--- a/include/asm-cris/Kbuild
+++ b/include/asm-cris/Kbuild
@@ -1,5 +1,11 @@
1include include/asm-generic/Kbuild.asm 1include include/asm-generic/Kbuild.asm
2 2
3header-y += arch-v10/ arch-v32/ 3header-$(CONFIG_ETRAX_ARCH_V10) += arch-v10/
4header-$(CONFIG_ETRAX_ARCH_V32) += arch-v32/
4 5
6header-y += ethernet.h
7header-y += rtc.h
8header-y += sync_serial.h
9
10unifdef-y += etraxgpio.h
5unifdef-y += rs485.h 11unifdef-y += rs485.h
diff --git a/include/asm-cris/a.out.h b/include/asm-cris/a.out.h
index 919b34a084f8..c82e9f9b75f6 100644
--- a/include/asm-cris/a.out.h
+++ b/include/asm-cris/a.out.h
@@ -6,11 +6,6 @@
6 * wants to know about a.out even if there is no interpreter available... 6 * wants to know about a.out even if there is no interpreter available...
7 */ 7 */
8 8
9/* grabbed from the intel stuff */
10#define STACK_TOP TASK_SIZE
11#define STACK_TOP_MAX STACK_TOP
12
13
14struct exec 9struct exec
15{ 10{
16 unsigned long a_info; /* Use macros N_MAGIC, etc for access */ 11 unsigned long a_info; /* Use macros N_MAGIC, etc for access */
@@ -28,5 +23,4 @@ struct exec
28#define N_DRSIZE(a) ((a).a_drsize) 23#define N_DRSIZE(a) ((a).a_drsize)
29#define N_SYMSIZE(a) ((a).a_syms) 24#define N_SYMSIZE(a) ((a).a_syms)
30 25
31
32#endif 26#endif
diff --git a/include/asm-cris/arch-v10/Kbuild b/include/asm-cris/arch-v10/Kbuild
index d7f27dc0941a..60e7e1b73cec 100644
--- a/include/asm-cris/arch-v10/Kbuild
+++ b/include/asm-cris/arch-v10/Kbuild
@@ -1,2 +1,5 @@
1header-y += ptrace.h 1header-y += ptrace.h
2header-y += user.h 2header-y += user.h
3header-y += svinto.h
4header-y += sv_addr_ag.h
5header-y += sv_addr.agh
diff --git a/include/asm-cris/arch-v10/bug.h b/include/asm-cris/arch-v10/bug.h
new file mode 100644
index 000000000000..3485d6b34bb0
--- /dev/null
+++ b/include/asm-cris/arch-v10/bug.h
@@ -0,0 +1,66 @@
1#ifndef __ASM_CRISv10_ARCH_BUG_H
2#define __ASM_CRISv10_ARCH_BUG_H
3
4#include <linux/stringify.h>
5
6#ifdef CONFIG_BUG
7#ifdef CONFIG_DEBUG_BUGVERBOSE
8/* The BUG() macro is used for marking obviously incorrect code paths.
9 * It will cause a message with the file name and line number to be printed,
10 * and then cause an oops. The message is actually printed by handle_BUG()
11 * in arch/cris/kernel/traps.c, and the reason we use this method of storing
12 * the file name and line number is that we do not want to affect the registers
13 * by calling printk() before causing the oops.
14 */
15
16#define BUG_PREFIX 0x0D7F
17#define BUG_MAGIC 0x00001234
18
19struct bug_frame {
20 unsigned short prefix;
21 unsigned int magic;
22 unsigned short clear;
23 unsigned short movu;
24 unsigned short line;
25 unsigned short jump;
26 unsigned char *filename;
27};
28
29#if 0
30/* Unfortunately this version of the macro does not work due to a problem
31 * with the compiler (aka a bug) when compiling with -O2, which sometimes
32 * erroneously causes the second input to be stored in a register...
33 */
34#define BUG() \
35 __asm__ __volatile__ ("clear.d [" __stringify(BUG_MAGIC) "]\n\t"\
36 "movu.w %0,$r0\n\t" \
37 "jump %1\n\t" \
38 : : "i" (__LINE__), "i" (__FILE__))
39#else
40/* This version will have to do for now, until the compiler is fixed.
41 * The drawbacks of this version are that the file name will appear multiple
42 * times in the .rodata section, and that __LINE__ and __FILE__ can probably
43 * not be used like this with newer versions of gcc.
44 */
45#define BUG() \
46 __asm__ __volatile__ ("clear.d [" __stringify(BUG_MAGIC) "]\n\t"\
47 "movu.w " __stringify(__LINE__) ",$r0\n\t"\
48 "jump 0f\n\t" \
49 ".section .rodata\n" \
50 "0:\t.string \"" __FILE__ "\"\n\t" \
51 ".previous")
52#endif
53
54#else
55
56/* This just causes an oops. */
57#define BUG() (*(int *)0 = 0)
58
59#endif
60
61#define HAVE_ARCH_BUG
62#endif
63
64#include <asm-generic/bug.h>
65
66#endif
diff --git a/include/asm-cris/arch-v10/io.h b/include/asm-cris/arch-v10/io.h
index 11ef5b53d84e..c08c24265299 100644
--- a/include/asm-cris/arch-v10/io.h
+++ b/include/asm-cris/arch-v10/io.h
@@ -23,7 +23,7 @@ extern volatile unsigned long *port_cse1_addr;
23extern volatile unsigned long *port_csp0_addr; 23extern volatile unsigned long *port_csp0_addr;
24extern volatile unsigned long *port_csp4_addr; 24extern volatile unsigned long *port_csp4_addr;
25 25
26/* macro for setting regs through a shadow - 26/* macro for setting regs through a shadow -
27 * r = register name (like R_PORT_PA_DATA) 27 * r = register name (like R_PORT_PA_DATA)
28 * s = shadow name (like port_pa_data_shadow) 28 * s = shadow name (like port_pa_data_shadow)
29 * b = bit number 29 * b = bit number
@@ -38,83 +38,89 @@ extern volatile unsigned long *port_csp4_addr;
38#undef CONFIG_ETRAX_PA_LEDS 38#undef CONFIG_ETRAX_PA_LEDS
39#undef CONFIG_ETRAX_PB_LEDS 39#undef CONFIG_ETRAX_PB_LEDS
40#undef CONFIG_ETRAX_CSP0_LEDS 40#undef CONFIG_ETRAX_CSP0_LEDS
41#define LED_NETWORK_SET_G(x) 41#define CRIS_LED_NETWORK_SET_G(x)
42#define LED_NETWORK_SET_R(x) 42#define CRIS_LED_NETWORK_SET_R(x)
43#define LED_ACTIVE_SET_G(x) 43#define CRIS_LED_ACTIVE_SET_G(x)
44#define LED_ACTIVE_SET_R(x) 44#define CRIS_LED_ACTIVE_SET_R(x)
45#define LED_DISK_WRITE(x) 45#define CRIS_LED_DISK_WRITE(x)
46#define LED_DISK_READ(x) 46#define CRIS_LED_DISK_READ(x)
47#endif 47#endif
48 48
49#if !defined(CONFIG_ETRAX_CSP0_LEDS) 49#if !defined(CONFIG_ETRAX_CSP0_LEDS)
50#define LED_BIT_SET(x) 50#define CRIS_LED_BIT_SET(x)
51#define LED_BIT_CLR(x) 51#define CRIS_LED_BIT_CLR(x)
52#endif 52#endif
53 53
54#define LED_OFF 0x00 54#define CRIS_LED_OFF 0x00
55#define LED_GREEN 0x01 55#define CRIS_LED_GREEN 0x01
56#define LED_RED 0x02 56#define CRIS_LED_RED 0x02
57#define LED_ORANGE (LED_GREEN | LED_RED) 57#define CRIS_LED_ORANGE (CRIS_LED_GREEN | CRIS_LED_RED)
58 58
59#if CONFIG_ETRAX_LED1G == CONFIG_ETRAX_LED1R 59#if defined(CONFIG_ETRAX_NO_LEDS)
60#define LED_NETWORK_SET(x) \ 60#define CRIS_LED_NETWORK_SET(x)
61#else
62#if CONFIG_ETRAX_LED1G == CONFIG_ETRAX_LED1R
63#define CRIS_LED_NETWORK_SET(x) \
61 do { \ 64 do { \
62 LED_NETWORK_SET_G((x) & LED_GREEN); \ 65 CRIS_LED_NETWORK_SET_G((x) & CRIS_LED_GREEN); \
63 } while (0) 66 } while (0)
64#else 67#else
65#define LED_NETWORK_SET(x) \ 68#define CRIS_LED_NETWORK_SET(x) \
66 do { \ 69 do { \
67 LED_NETWORK_SET_G((x) & LED_GREEN); \ 70 CRIS_LED_NETWORK_SET_G((x) & CRIS_LED_GREEN); \
68 LED_NETWORK_SET_R((x) & LED_RED); \ 71 CRIS_LED_NETWORK_SET_R((x) & CRIS_LED_RED); \
69 } while (0) 72 } while (0)
70#endif 73#endif
71#if CONFIG_ETRAX_LED2G == CONFIG_ETRAX_LED2R 74#if CONFIG_ETRAX_LED2G == CONFIG_ETRAX_LED2R
72#define LED_ACTIVE_SET(x) \ 75#define CRIS_LED_ACTIVE_SET(x) \
73 do { \ 76 do { \
74 LED_ACTIVE_SET_G((x) & LED_GREEN); \ 77 CRIS_LED_ACTIVE_SET_G((x) & CRIS_LED_GREEN); \
75 } while (0) 78 } while (0)
76#else 79#else
77#define LED_ACTIVE_SET(x) \ 80#define CRIS_LED_ACTIVE_SET(x) \
78 do { \ 81 do { \
79 LED_ACTIVE_SET_G((x) & LED_GREEN); \ 82 CRIS_LED_ACTIVE_SET_G((x) & CRIS_LED_GREEN); \
80 LED_ACTIVE_SET_R((x) & LED_RED); \ 83 CRIS_LED_ACTIVE_SET_R((x) & CRIS_LED_RED); \
81 } while (0) 84 } while (0)
82#endif 85#endif
86#endif
83 87
84#ifdef CONFIG_ETRAX_PA_LEDS 88#ifdef CONFIG_ETRAX_PA_LEDS
85#define LED_NETWORK_SET_G(x) \ 89#define CRIS_LED_NETWORK_SET_G(x) \
86 REG_SHADOW_SET(R_PORT_PA_DATA, port_pa_data_shadow, CONFIG_ETRAX_LED1G, !(x)) 90 REG_SHADOW_SET(R_PORT_PA_DATA, port_pa_data_shadow, CONFIG_ETRAX_LED1G, !(x))
87#define LED_NETWORK_SET_R(x) \ 91#define CRIS_LED_NETWORK_SET_R(x) \
88 REG_SHADOW_SET(R_PORT_PA_DATA, port_pa_data_shadow, CONFIG_ETRAX_LED1R, !(x)) 92 REG_SHADOW_SET(R_PORT_PA_DATA, port_pa_data_shadow, CONFIG_ETRAX_LED1R, !(x))
89#define LED_ACTIVE_SET_G(x) \ 93#define CRIS_LED_ACTIVE_SET_G(x) \
90 REG_SHADOW_SET(R_PORT_PA_DATA, port_pa_data_shadow, CONFIG_ETRAX_LED2G, !(x)) 94 REG_SHADOW_SET(R_PORT_PA_DATA, port_pa_data_shadow, CONFIG_ETRAX_LED2G, !(x))
91#define LED_ACTIVE_SET_R(x) \ 95#define CRIS_LED_ACTIVE_SET_R(x) \
92 REG_SHADOW_SET(R_PORT_PA_DATA, port_pa_data_shadow, CONFIG_ETRAX_LED2R, !(x)) 96 REG_SHADOW_SET(R_PORT_PA_DATA, port_pa_data_shadow, CONFIG_ETRAX_LED2R, !(x))
93#define LED_DISK_WRITE(x) \ 97#define CRIS_LED_DISK_WRITE(x) \
94 do{\ 98 do{\
95 REG_SHADOW_SET(R_PORT_PA_DATA, port_pa_data_shadow, CONFIG_ETRAX_LED3G, !(x));\ 99 REG_SHADOW_SET(R_PORT_PA_DATA, port_pa_data_shadow, CONFIG_ETRAX_LED3G, !(x));\
96 REG_SHADOW_SET(R_PORT_PA_DATA, port_pa_data_shadow, CONFIG_ETRAX_LED3R, !(x));\ 100 REG_SHADOW_SET(R_PORT_PA_DATA, port_pa_data_shadow, CONFIG_ETRAX_LED3R, !(x));\
97 }while(0) 101 }while(0)
98#define LED_DISK_READ(x) \ 102#define CRIS_LED_DISK_READ(x) \
99 REG_SHADOW_SET(R_PORT_PA_DATA, port_pa_data_shadow, CONFIG_ETRAX_LED3G, !(x)) 103 REG_SHADOW_SET(R_PORT_PA_DATA, port_pa_data_shadow, \
104 CONFIG_ETRAX_LED3G, !(x))
100#endif 105#endif
101 106
102#ifdef CONFIG_ETRAX_PB_LEDS 107#ifdef CONFIG_ETRAX_PB_LEDS
103#define LED_NETWORK_SET_G(x) \ 108#define CRIS_LED_NETWORK_SET_G(x) \
104 REG_SHADOW_SET(R_PORT_PB_DATA, port_pb_data_shadow, CONFIG_ETRAX_LED1G, !(x)) 109 REG_SHADOW_SET(R_PORT_PB_DATA, port_pb_data_shadow, CONFIG_ETRAX_LED1G, !(x))
105#define LED_NETWORK_SET_R(x) \ 110#define CRIS_LED_NETWORK_SET_R(x) \
106 REG_SHADOW_SET(R_PORT_PB_DATA, port_pb_data_shadow, CONFIG_ETRAX_LED1R, !(x)) 111 REG_SHADOW_SET(R_PORT_PB_DATA, port_pb_data_shadow, CONFIG_ETRAX_LED1R, !(x))
107#define LED_ACTIVE_SET_G(x) \ 112#define CRIS_LED_ACTIVE_SET_G(x) \
108 REG_SHADOW_SET(R_PORT_PB_DATA, port_pb_data_shadow, CONFIG_ETRAX_LED2G, !(x)) 113 REG_SHADOW_SET(R_PORT_PB_DATA, port_pb_data_shadow, CONFIG_ETRAX_LED2G, !(x))
109#define LED_ACTIVE_SET_R(x) \ 114#define CRIS_LED_ACTIVE_SET_R(x) \
110 REG_SHADOW_SET(R_PORT_PB_DATA, port_pb_data_shadow, CONFIG_ETRAX_LED2R, !(x)) 115 REG_SHADOW_SET(R_PORT_PB_DATA, port_pb_data_shadow, CONFIG_ETRAX_LED2R, !(x))
111#define LED_DISK_WRITE(x) \ 116#define CRIS_LED_DISK_WRITE(x) \
112 do{\ 117 do{\
113 REG_SHADOW_SET(R_PORT_PB_DATA, port_pb_data_shadow, CONFIG_ETRAX_LED3G, !(x));\ 118 REG_SHADOW_SET(R_PORT_PB_DATA, port_pb_data_shadow, CONFIG_ETRAX_LED3G, !(x));\
114 REG_SHADOW_SET(R_PORT_PB_DATA, port_pb_data_shadow, CONFIG_ETRAX_LED3R, !(x));\ 119 REG_SHADOW_SET(R_PORT_PB_DATA, port_pb_data_shadow, CONFIG_ETRAX_LED3R, !(x));\
115 }while(0) 120 }while(0)
116#define LED_DISK_READ(x) \ 121#define CRIS_LED_DISK_READ(x) \
117 REG_SHADOW_SET(R_PORT_PB_DATA, port_pb_data_shadow, CONFIG_ETRAX_LED3G, !(x)) 122 REG_SHADOW_SET(R_PORT_PB_DATA, port_pb_data_shadow, \
123 CONFIG_ETRAX_LED3G, !(x))
118#endif 124#endif
119 125
120#ifdef CONFIG_ETRAX_CSP0_LEDS 126#ifdef CONFIG_ETRAX_CSP0_LEDS
@@ -130,27 +136,27 @@ extern volatile unsigned long *port_csp4_addr;
130 (1 << CONFIG_ETRAX_LED10Y ) |(1 << CONFIG_ETRAX_LED11Y )|\ 136 (1 << CONFIG_ETRAX_LED10Y ) |(1 << CONFIG_ETRAX_LED11Y )|\
131 (1 << CONFIG_ETRAX_LED12R )) 137 (1 << CONFIG_ETRAX_LED12R ))
132 138
133#define LED_NETWORK_SET_G(x) \ 139#define CRIS_LED_NETWORK_SET_G(x) \
134 REG_SHADOW_SET(port_csp0_addr, port_csp0_shadow, CONFIG_ETRAX_LED1G, !(x)) 140 REG_SHADOW_SET(port_csp0_addr, port_csp0_shadow, CONFIG_ETRAX_LED1G, !(x))
135#define LED_NETWORK_SET_R(x) \ 141#define CRIS_LED_NETWORK_SET_R(x) \
136 REG_SHADOW_SET(port_csp0_addr, port_csp0_shadow, CONFIG_ETRAX_LED1R, !(x)) 142 REG_SHADOW_SET(port_csp0_addr, port_csp0_shadow, CONFIG_ETRAX_LED1R, !(x))
137#define LED_ACTIVE_SET_G(x) \ 143#define CRIS_LED_ACTIVE_SET_G(x) \
138 REG_SHADOW_SET(port_csp0_addr, port_csp0_shadow, CONFIG_ETRAX_LED2G, !(x)) 144 REG_SHADOW_SET(port_csp0_addr, port_csp0_shadow, CONFIG_ETRAX_LED2G, !(x))
139#define LED_ACTIVE_SET_R(x) \ 145#define CRIS_LED_ACTIVE_SET_R(x) \
140 REG_SHADOW_SET(port_csp0_addr, port_csp0_shadow, CONFIG_ETRAX_LED2R, !(x)) 146 REG_SHADOW_SET(port_csp0_addr, port_csp0_shadow, CONFIG_ETRAX_LED2R, !(x))
141#define LED_DISK_WRITE(x) \ 147#define CRIS_LED_DISK_WRITE(x) \
142 do{\ 148 do{\
143 REG_SHADOW_SET(port_csp0_addr, port_csp0_shadow, CONFIG_ETRAX_LED3G, !(x));\ 149 REG_SHADOW_SET(port_csp0_addr, port_csp0_shadow, CONFIG_ETRAX_LED3G, !(x));\
144 REG_SHADOW_SET(port_csp0_addr, port_csp0_shadow, CONFIG_ETRAX_LED3R, !(x));\ 150 REG_SHADOW_SET(port_csp0_addr, port_csp0_shadow, CONFIG_ETRAX_LED3R, !(x));\
145 }while(0) 151 }while(0)
146#define LED_DISK_READ(x) \ 152#define CRIS_LED_DISK_READ(x) \
147 REG_SHADOW_SET(port_csp0_addr, port_csp0_shadow, CONFIG_ETRAX_LED3G, !(x)) 153 REG_SHADOW_SET(port_csp0_addr, port_csp0_shadow, CONFIG_ETRAX_LED3G, !(x))
148#define LED_BIT_SET(x)\ 154#define CRIS_LED_BIT_SET(x)\
149 do{\ 155 do{\
150 if((( 1 << x) & CONFIGURABLE_LEDS) != 0)\ 156 if((( 1 << x) & CONFIGURABLE_LEDS) != 0)\
151 REG_SHADOW_SET(port_csp0_addr, port_csp0_shadow, x, 1);\ 157 REG_SHADOW_SET(port_csp0_addr, port_csp0_shadow, x, 1);\
152 }while(0) 158 }while(0)
153#define LED_BIT_CLR(x)\ 159#define CRIS_LED_BIT_CLR(x)\
154 do{\ 160 do{\
155 if((( 1 << x) & CONFIGURABLE_LEDS) != 0)\ 161 if((( 1 << x) & CONFIGURABLE_LEDS) != 0)\
156 REG_SHADOW_SET(port_csp0_addr, port_csp0_shadow, x, 0);\ 162 REG_SHADOW_SET(port_csp0_addr, port_csp0_shadow, x, 0);\
diff --git a/include/asm-cris/arch-v10/page.h b/include/asm-cris/arch-v10/page.h
index 7d8307aed7f3..ffafc99c3472 100644
--- a/include/asm-cris/arch-v10/page.h
+++ b/include/asm-cris/arch-v10/page.h
@@ -12,8 +12,8 @@
12#endif 12#endif
13 13
14/* macros to convert between really physical and virtual addresses 14/* macros to convert between really physical and virtual addresses
15 * by stripping a selected bit, we can convert between KSEG_x and 0x40000000 where 15 * by stripping a selected bit, we can convert between KSEG_x and
16 * the DRAM really resides 16 * 0x40000000 where the DRAM really resides
17 */ 17 */
18 18
19#ifdef CONFIG_CRIS_LOW_MAP 19#ifdef CONFIG_CRIS_LOW_MAP
diff --git a/include/asm-cris/arch-v32/Kbuild b/include/asm-cris/arch-v32/Kbuild
index d7f27dc0941a..a0ec545e242e 100644
--- a/include/asm-cris/arch-v32/Kbuild
+++ b/include/asm-cris/arch-v32/Kbuild
@@ -1,2 +1,3 @@
1header-y += ptrace.h 1header-y += ptrace.h
2header-y += user.h 2header-y += user.h
3header-y += cryptocop.h
diff --git a/include/asm-cris/arch-v32/atomic.h b/include/asm-cris/arch-v32/atomic.h
index bbfb7a5ae315..852ceff8013f 100644
--- a/include/asm-cris/arch-v32/atomic.h
+++ b/include/asm-cris/arch-v32/atomic.h
@@ -1,7 +1,7 @@
1#ifndef __ASM_CRIS_ARCH_ATOMIC__ 1#ifndef __ASM_CRIS_ARCH_ATOMIC__
2#define __ASM_CRIS_ARCH_ATOMIC__ 2#define __ASM_CRIS_ARCH_ATOMIC__
3 3
4#include <asm/system.h> 4#include <linux/spinlock_types.h>
5 5
6extern void cris_spin_unlock(void *l, int val); 6extern void cris_spin_unlock(void *l, int val);
7extern void cris_spin_lock(void *l); 7extern void cris_spin_lock(void *l);
@@ -18,15 +18,15 @@ extern spinlock_t cris_atomic_locks[];
18 18
19#define cris_atomic_save(addr, flags) \ 19#define cris_atomic_save(addr, flags) \
20 local_irq_save(flags); \ 20 local_irq_save(flags); \
21 cris_spin_lock((void*)&cris_atomic_locks[HASH_ADDR(addr)].lock); 21 cris_spin_lock((void *)&cris_atomic_locks[HASH_ADDR(addr)].raw_lock.slock);
22 22
23#define cris_atomic_restore(addr, flags) \ 23#define cris_atomic_restore(addr, flags) \
24 { \ 24 { \
25 spinlock_t *lock = (void*)&cris_atomic_locks[HASH_ADDR(addr)]; \ 25 spinlock_t *lock = (void*)&cris_atomic_locks[HASH_ADDR(addr)]; \
26 __asm__ volatile ("move.d %1,%0" \ 26 __asm__ volatile ("move.d %1,%0" \
27 : "=m" (lock->lock) \ 27 : "=m" (lock->raw_lock.slock) \
28 : "r" (1) \ 28 : "r" (1) \
29 : "memory"); \ 29 : "memory"); \
30 local_irq_restore(flags); \ 30 local_irq_restore(flags); \
31 } 31 }
32 32
diff --git a/include/asm-cris/arch-v32/bug.h b/include/asm-cris/arch-v32/bug.h
new file mode 100644
index 000000000000..0f211e135248
--- /dev/null
+++ b/include/asm-cris/arch-v32/bug.h
@@ -0,0 +1,33 @@
1#ifndef __ASM_CRISv32_ARCH_BUG_H
2#define __ASM_CRISv32_ARCH_BUG_H
3
4#include <linux/stringify.h>
5
6#ifdef CONFIG_BUG
7#ifdef CONFIG_DEBUG_BUGVERBOSE
8/*
9 * The penalty for the in-band code path will be the size of break 14.
10 * All other stuff is done out-of-band with exception handlers.
11 */
12#define BUG() \
13 __asm__ __volatile__ ("0: break 14\n\t" \
14 ".section .fixup,\"ax\"\n" \
15 "1:\n\t" \
16 "move.d %0, $r10\n\t" \
17 "move.d %1, $r11\n\t" \
18 "jump do_BUG\n\t" \
19 "nop\n\t" \
20 ".previous\n\t" \
21 ".section __ex_table,\"a\"\n\t" \
22 ".dword 0b, 1b\n\t" \
23 ".previous\n\t" \
24 : : "ri" (__FILE__), "i" (__LINE__))
25#else
26#define BUG() __asm__ __volatile__ ("break 14\n\t")
27#endif
28
29#define HAVE_ARCH_BUG
30#endif
31
32#include <asm-generic/bug.h>
33#endif
diff --git a/include/asm-cris/arch-v32/cache.h b/include/asm-cris/arch-v32/cache.h
index 80b236b15319..b3d752dfe15b 100644
--- a/include/asm-cris/arch-v32/cache.h
+++ b/include/asm-cris/arch-v32/cache.h
@@ -1,8 +1,19 @@
1#ifndef _ASM_CRIS_ARCH_CACHE_H 1#ifndef _ASM_CRIS_ARCH_CACHE_H
2#define _ASM_CRIS_ARCH_CACHE_H 2#define _ASM_CRIS_ARCH_CACHE_H
3 3
4#include <asm/arch/hwregs/dma.h>
5
4/* A cache-line is 32 bytes. */ 6/* A cache-line is 32 bytes. */
5#define L1_CACHE_BYTES 32 7#define L1_CACHE_BYTES 32
6#define L1_CACHE_SHIFT 5 8#define L1_CACHE_SHIFT 5
7 9
10void flush_dma_list(dma_descr_data *descr);
11void flush_dma_descr(dma_descr_data *descr, int flush_buf);
12
13#define flush_dma_context(c) \
14 flush_dma_list(phys_to_virt((c)->saved_data));
15
16void cris_flush_cache_range(void *buf, unsigned long len);
17void cris_flush_cache(void);
18
8#endif /* _ASM_CRIS_ARCH_CACHE_H */ 19#endif /* _ASM_CRIS_ARCH_CACHE_H */
diff --git a/include/asm-cris/arch-v32/delay.h b/include/asm-cris/arch-v32/delay.h
index b6e941e637de..e9fda03810a9 100644
--- a/include/asm-cris/arch-v32/delay.h
+++ b/include/asm-cris/arch-v32/delay.h
@@ -1,6 +1,16 @@
1#ifndef _ASM_CRIS_ARCH_DELAY_H 1#ifndef _ASM_CRIS_ARCH_DELAY_H
2#define _ASM_CRIS_ARCH_DELAY_H 2#define _ASM_CRIS_ARCH_DELAY_H
3 3
4extern void cris_delay10ns(u32 n10ns);
5#define udelay(u) cris_delay10ns((u)*100)
6#define ndelay(n) cris_delay10ns(((n)+9)/10)
7
8/*
9 * Not used anymore for udelay or ndelay. Referenced by
10 * e.g. init/calibrate.c. All other references are likely bugs;
11 * should be replaced by mdelay, udelay or ndelay.
12 */
13
4static inline void 14static inline void
5__delay(int loops) 15__delay(int loops)
6{ 16{
diff --git a/include/asm-cris/arch-v32/hwregs/Makefile b/include/asm-cris/arch-v32/hwregs/Makefile
index c9160f9949a9..f9a05d2aa061 100644
--- a/include/asm-cris/arch-v32/hwregs/Makefile
+++ b/include/asm-cris/arch-v32/hwregs/Makefile
@@ -1,4 +1,3 @@
1# $Id: Makefile,v 1.8 2004/01/07 21:16:18 johana Exp $
2# Makefile to generate or copy the latest register definitions 1# Makefile to generate or copy the latest register definitions
3# and related datastructures and helpermacros. 2# and related datastructures and helpermacros.
4# The offical place for these files is at: 3# The offical place for these files is at:
diff --git a/include/asm-cris/arch-v32/hwregs/dma.h b/include/asm-cris/arch-v32/hwregs/dma.h
index c31832d3d6be..3ce322b5c731 100644
--- a/include/asm-cris/arch-v32/hwregs/dma.h
+++ b/include/asm-cris/arch-v32/hwregs/dma.h
@@ -1,5 +1,4 @@
1/* $Id: dma.h,v 1.7 2005/04/24 18:30:58 starvik Exp $ 1/*
2 *
3 * DMA C definitions and help macros 2 * DMA C definitions and help macros
4 * 3 *
5 */ 4 */
@@ -98,11 +97,11 @@ typedef struct dma_descr_data {
98 97
99// give stream command 98// give stream command
100#define DMA_WR_CMD( inst, cmd_par ) \ 99#define DMA_WR_CMD( inst, cmd_par ) \
101 do { reg_dma_rw_stream_cmd r = {0}; \ 100 do { reg_dma_rw_stream_cmd __x = {0}; \
102 do { r = REG_RD( dma, inst, rw_stream_cmd ); } while( r.busy ); \ 101 do { __x = REG_RD(dma, inst, rw_stream_cmd); } while (__x.busy); \
103 r.cmd = (cmd_par); \ 102 __x.cmd = (cmd_par); \
104 REG_WR( dma, inst, rw_stream_cmd, r ); \ 103 REG_WR(dma, inst, rw_stream_cmd, __x); \
105 } while( 0 ) 104 } while (0)
106 105
107// load: g,c,d:burst 106// load: g,c,d:burst
108#define DMA_START_GROUP( inst, group_descr ) \ 107#define DMA_START_GROUP( inst, group_descr ) \
diff --git a/include/asm-cris/arch-v32/hwregs/eth_defs.h b/include/asm-cris/arch-v32/hwregs/eth_defs.h
index 1196d7cc783f..90fe8a28894f 100644
--- a/include/asm-cris/arch-v32/hwregs/eth_defs.h
+++ b/include/asm-cris/arch-v32/hwregs/eth_defs.h
@@ -3,12 +3,12 @@
3 3
4/* 4/*
5 * This file is autogenerated from 5 * This file is autogenerated from
6 * file: ../../inst/eth/rtl/eth_regs.r 6 * file: eth.r
7 * id: eth_regs.r,v 1.11 2005/02/09 10:48:38 kriskn Exp 7 * id: eth_regs.r,v 1.16 2005/05/20 15:41:22 perz Exp
8 * last modfied: Mon Apr 11 16:07:03 2005 8 * last modfied: Mon Jan 9 06:06:41 2006
9 * 9 *
10 * by /n/asic/design/tools/rdesc/src/rdes2c --outfile eth_defs.h ../../inst/eth/rtl/eth_regs.r 10 * by /n/asic/design/tools/rdesc/rdes2c eth.r
11 * id: $Id: eth_defs.h,v 1.6 2005/04/24 18:30:58 starvik Exp $ 11 * id: $Id: eth_defs.h,v 1.7 2006/01/26 13:45:30 karljope Exp $
12 * Any changes here will be lost. 12 * Any changes here will be lost.
13 * 13 *
14 * -*- buffer-read-only: t -*- 14 * -*- buffer-read-only: t -*-
@@ -116,26 +116,28 @@ typedef struct {
116 116
117/* Register rw_ga_lo, scope eth, type rw */ 117/* Register rw_ga_lo, scope eth, type rw */
118typedef struct { 118typedef struct {
119 unsigned int table : 32; 119 unsigned int tbl : 32;
120} reg_eth_rw_ga_lo; 120} reg_eth_rw_ga_lo;
121#define REG_RD_ADDR_eth_rw_ga_lo 16 121#define REG_RD_ADDR_eth_rw_ga_lo 16
122#define REG_WR_ADDR_eth_rw_ga_lo 16 122#define REG_WR_ADDR_eth_rw_ga_lo 16
123 123
124/* Register rw_ga_hi, scope eth, type rw */ 124/* Register rw_ga_hi, scope eth, type rw */
125typedef struct { 125typedef struct {
126 unsigned int table : 32; 126 unsigned int tbl : 32;
127} reg_eth_rw_ga_hi; 127} reg_eth_rw_ga_hi;
128#define REG_RD_ADDR_eth_rw_ga_hi 20 128#define REG_RD_ADDR_eth_rw_ga_hi 20
129#define REG_WR_ADDR_eth_rw_ga_hi 20 129#define REG_WR_ADDR_eth_rw_ga_hi 20
130 130
131/* Register rw_gen_ctrl, scope eth, type rw */ 131/* Register rw_gen_ctrl, scope eth, type rw */
132typedef struct { 132typedef struct {
133 unsigned int en : 1; 133 unsigned int en : 1;
134 unsigned int phy : 2; 134 unsigned int phy : 2;
135 unsigned int protocol : 1; 135 unsigned int protocol : 1;
136 unsigned int loopback : 1; 136 unsigned int loopback : 1;
137 unsigned int flow_ctrl_dis : 1; 137 unsigned int flow_ctrl : 1;
138 unsigned int dummy1 : 26; 138 unsigned int gtxclk_out : 1;
139 unsigned int phyrst_n : 1;
140 unsigned int dummy1 : 24;
139} reg_eth_rw_gen_ctrl; 141} reg_eth_rw_gen_ctrl;
140#define REG_RD_ADDR_eth_rw_gen_ctrl 24 142#define REG_RD_ADDR_eth_rw_gen_ctrl 24
141#define REG_WR_ADDR_eth_rw_gen_ctrl 24 143#define REG_WR_ADDR_eth_rw_gen_ctrl 24
@@ -150,22 +152,23 @@ typedef struct {
150 unsigned int oversize : 1; 152 unsigned int oversize : 1;
151 unsigned int bad_crc : 1; 153 unsigned int bad_crc : 1;
152 unsigned int duplex : 1; 154 unsigned int duplex : 1;
153 unsigned int max_size : 1; 155 unsigned int max_size : 16;
154 unsigned int dummy1 : 23; 156 unsigned int dummy1 : 8;
155} reg_eth_rw_rec_ctrl; 157} reg_eth_rw_rec_ctrl;
156#define REG_RD_ADDR_eth_rw_rec_ctrl 28 158#define REG_RD_ADDR_eth_rw_rec_ctrl 28
157#define REG_WR_ADDR_eth_rw_rec_ctrl 28 159#define REG_WR_ADDR_eth_rw_rec_ctrl 28
158 160
159/* Register rw_tr_ctrl, scope eth, type rw */ 161/* Register rw_tr_ctrl, scope eth, type rw */
160typedef struct { 162typedef struct {
161 unsigned int crc : 1; 163 unsigned int crc : 1;
162 unsigned int pad : 1; 164 unsigned int pad : 1;
163 unsigned int retry : 1; 165 unsigned int retry : 1;
164 unsigned int ignore_col : 1; 166 unsigned int ignore_col : 1;
165 unsigned int cancel : 1; 167 unsigned int cancel : 1;
166 unsigned int hsh_delay : 1; 168 unsigned int hsh_delay : 1;
167 unsigned int ignore_crs : 1; 169 unsigned int ignore_crs : 1;
168 unsigned int dummy1 : 25; 170 unsigned int carrier_ext : 1;
171 unsigned int dummy1 : 24;
169} reg_eth_rw_tr_ctrl; 172} reg_eth_rw_tr_ctrl;
170#define REG_RD_ADDR_eth_rw_tr_ctrl 32 173#define REG_RD_ADDR_eth_rw_tr_ctrl 32
171#define REG_WR_ADDR_eth_rw_tr_ctrl 32 174#define REG_WR_ADDR_eth_rw_tr_ctrl 32
@@ -180,13 +183,10 @@ typedef struct {
180 183
181/* Register rw_mgm_ctrl, scope eth, type rw */ 184/* Register rw_mgm_ctrl, scope eth, type rw */
182typedef struct { 185typedef struct {
183 unsigned int mdio : 1; 186 unsigned int mdio : 1;
184 unsigned int mdoe : 1; 187 unsigned int mdoe : 1;
185 unsigned int mdc : 1; 188 unsigned int mdc : 1;
186 unsigned int phyclk : 1; 189 unsigned int dummy1 : 29;
187 unsigned int txdata : 4;
188 unsigned int txen : 1;
189 unsigned int dummy1 : 23;
190} reg_eth_rw_mgm_ctrl; 190} reg_eth_rw_mgm_ctrl;
191#define REG_RD_ADDR_eth_rw_mgm_ctrl 40 191#define REG_RD_ADDR_eth_rw_mgm_ctrl 40
192#define REG_WR_ADDR_eth_rw_mgm_ctrl 40 192#define REG_WR_ADDR_eth_rw_mgm_ctrl 40
@@ -196,17 +196,8 @@ typedef struct {
196 unsigned int mdio : 1; 196 unsigned int mdio : 1;
197 unsigned int exc_col : 1; 197 unsigned int exc_col : 1;
198 unsigned int urun : 1; 198 unsigned int urun : 1;
199 unsigned int phyclk : 1; 199 unsigned int clk_125 : 1;
200 unsigned int txdata : 4; 200 unsigned int dummy1 : 28;
201 unsigned int txen : 1;
202 unsigned int col : 1;
203 unsigned int crs : 1;
204 unsigned int txclk : 1;
205 unsigned int rxdata : 4;
206 unsigned int rxer : 1;
207 unsigned int rxdv : 1;
208 unsigned int rxclk : 1;
209 unsigned int dummy1 : 13;
210} reg_eth_r_stat; 201} reg_eth_r_stat;
211#define REG_RD_ADDR_eth_r_stat 44 202#define REG_RD_ADDR_eth_r_stat 44
212 203
@@ -274,83 +265,83 @@ typedef struct {
274 265
275/* Register rw_intr_mask, scope eth, type rw */ 266/* Register rw_intr_mask, scope eth, type rw */
276typedef struct { 267typedef struct {
277 unsigned int crc : 1; 268 unsigned int crc : 1;
278 unsigned int align : 1; 269 unsigned int align : 1;
279 unsigned int oversize : 1; 270 unsigned int oversize : 1;
280 unsigned int congestion : 1; 271 unsigned int congestion : 1;
281 unsigned int single_col : 1; 272 unsigned int single_col : 1;
282 unsigned int mult_col : 1; 273 unsigned int mult_col : 1;
283 unsigned int late_col : 1; 274 unsigned int late_col : 1;
284 unsigned int deferred : 1; 275 unsigned int deferred : 1;
285 unsigned int carrier_loss : 1; 276 unsigned int carrier_loss : 1;
286 unsigned int sqe_test_err : 1; 277 unsigned int sqe_test_err : 1;
287 unsigned int orun : 1; 278 unsigned int orun : 1;
288 unsigned int urun : 1; 279 unsigned int urun : 1;
289 unsigned int excessive_col : 1; 280 unsigned int exc_col : 1;
290 unsigned int mdio : 1; 281 unsigned int mdio : 1;
291 unsigned int dummy1 : 18; 282 unsigned int dummy1 : 18;
292} reg_eth_rw_intr_mask; 283} reg_eth_rw_intr_mask;
293#define REG_RD_ADDR_eth_rw_intr_mask 76 284#define REG_RD_ADDR_eth_rw_intr_mask 76
294#define REG_WR_ADDR_eth_rw_intr_mask 76 285#define REG_WR_ADDR_eth_rw_intr_mask 76
295 286
296/* Register rw_ack_intr, scope eth, type rw */ 287/* Register rw_ack_intr, scope eth, type rw */
297typedef struct { 288typedef struct {
298 unsigned int crc : 1; 289 unsigned int crc : 1;
299 unsigned int align : 1; 290 unsigned int align : 1;
300 unsigned int oversize : 1; 291 unsigned int oversize : 1;
301 unsigned int congestion : 1; 292 unsigned int congestion : 1;
302 unsigned int single_col : 1; 293 unsigned int single_col : 1;
303 unsigned int mult_col : 1; 294 unsigned int mult_col : 1;
304 unsigned int late_col : 1; 295 unsigned int late_col : 1;
305 unsigned int deferred : 1; 296 unsigned int deferred : 1;
306 unsigned int carrier_loss : 1; 297 unsigned int carrier_loss : 1;
307 unsigned int sqe_test_err : 1; 298 unsigned int sqe_test_err : 1;
308 unsigned int orun : 1; 299 unsigned int orun : 1;
309 unsigned int urun : 1; 300 unsigned int urun : 1;
310 unsigned int excessive_col : 1; 301 unsigned int exc_col : 1;
311 unsigned int mdio : 1; 302 unsigned int mdio : 1;
312 unsigned int dummy1 : 18; 303 unsigned int dummy1 : 18;
313} reg_eth_rw_ack_intr; 304} reg_eth_rw_ack_intr;
314#define REG_RD_ADDR_eth_rw_ack_intr 80 305#define REG_RD_ADDR_eth_rw_ack_intr 80
315#define REG_WR_ADDR_eth_rw_ack_intr 80 306#define REG_WR_ADDR_eth_rw_ack_intr 80
316 307
317/* Register r_intr, scope eth, type r */ 308/* Register r_intr, scope eth, type r */
318typedef struct { 309typedef struct {
319 unsigned int crc : 1; 310 unsigned int crc : 1;
320 unsigned int align : 1; 311 unsigned int align : 1;
321 unsigned int oversize : 1; 312 unsigned int oversize : 1;
322 unsigned int congestion : 1; 313 unsigned int congestion : 1;
323 unsigned int single_col : 1; 314 unsigned int single_col : 1;
324 unsigned int mult_col : 1; 315 unsigned int mult_col : 1;
325 unsigned int late_col : 1; 316 unsigned int late_col : 1;
326 unsigned int deferred : 1; 317 unsigned int deferred : 1;
327 unsigned int carrier_loss : 1; 318 unsigned int carrier_loss : 1;
328 unsigned int sqe_test_err : 1; 319 unsigned int sqe_test_err : 1;
329 unsigned int orun : 1; 320 unsigned int orun : 1;
330 unsigned int urun : 1; 321 unsigned int urun : 1;
331 unsigned int excessive_col : 1; 322 unsigned int exc_col : 1;
332 unsigned int mdio : 1; 323 unsigned int mdio : 1;
333 unsigned int dummy1 : 18; 324 unsigned int dummy1 : 18;
334} reg_eth_r_intr; 325} reg_eth_r_intr;
335#define REG_RD_ADDR_eth_r_intr 84 326#define REG_RD_ADDR_eth_r_intr 84
336 327
337/* Register r_masked_intr, scope eth, type r */ 328/* Register r_masked_intr, scope eth, type r */
338typedef struct { 329typedef struct {
339 unsigned int crc : 1; 330 unsigned int crc : 1;
340 unsigned int align : 1; 331 unsigned int align : 1;
341 unsigned int oversize : 1; 332 unsigned int oversize : 1;
342 unsigned int congestion : 1; 333 unsigned int congestion : 1;
343 unsigned int single_col : 1; 334 unsigned int single_col : 1;
344 unsigned int mult_col : 1; 335 unsigned int mult_col : 1;
345 unsigned int late_col : 1; 336 unsigned int late_col : 1;
346 unsigned int deferred : 1; 337 unsigned int deferred : 1;
347 unsigned int carrier_loss : 1; 338 unsigned int carrier_loss : 1;
348 unsigned int sqe_test_err : 1; 339 unsigned int sqe_test_err : 1;
349 unsigned int orun : 1; 340 unsigned int orun : 1;
350 unsigned int urun : 1; 341 unsigned int urun : 1;
351 unsigned int excessive_col : 1; 342 unsigned int exc_col : 1;
352 unsigned int mdio : 1; 343 unsigned int mdio : 1;
353 unsigned int dummy1 : 18; 344 unsigned int dummy1 : 18;
354} reg_eth_r_masked_intr; 345} reg_eth_r_masked_intr;
355#define REG_RD_ADDR_eth_r_masked_intr 88 346#define REG_RD_ADDR_eth_r_masked_intr 88
356 347
@@ -360,12 +351,15 @@ enum {
360 regk_eth_discard = 0x00000000, 351 regk_eth_discard = 0x00000000,
361 regk_eth_ether = 0x00000000, 352 regk_eth_ether = 0x00000000,
362 regk_eth_full = 0x00000001, 353 regk_eth_full = 0x00000001,
354 regk_eth_gmii = 0x00000003,
355 regk_eth_gtxclk = 0x00000001,
363 regk_eth_half = 0x00000000, 356 regk_eth_half = 0x00000000,
364 regk_eth_hsh = 0x00000001, 357 regk_eth_hsh = 0x00000001,
365 regk_eth_mii = 0x00000001, 358 regk_eth_mii = 0x00000001,
359 regk_eth_mii_arec = 0x00000002,
366 regk_eth_mii_clk = 0x00000000, 360 regk_eth_mii_clk = 0x00000000,
367 regk_eth_mii_rec = 0x00000002,
368 regk_eth_no = 0x00000000, 361 regk_eth_no = 0x00000000,
362 regk_eth_phyrst = 0x00000000,
369 regk_eth_rec = 0x00000001, 363 regk_eth_rec = 0x00000001,
370 regk_eth_rw_ga_hi_default = 0x00000000, 364 regk_eth_rw_ga_hi_default = 0x00000000,
371 regk_eth_rw_ga_lo_default = 0x00000000, 365 regk_eth_rw_ga_lo_default = 0x00000000,
@@ -377,8 +371,8 @@ enum {
377 regk_eth_rw_ma1_lo_default = 0x00000000, 371 regk_eth_rw_ma1_lo_default = 0x00000000,
378 regk_eth_rw_mgm_ctrl_default = 0x00000000, 372 regk_eth_rw_mgm_ctrl_default = 0x00000000,
379 regk_eth_rw_test_ctrl_default = 0x00000000, 373 regk_eth_rw_test_ctrl_default = 0x00000000,
380 regk_eth_size1518 = 0x00000000, 374 regk_eth_size1518 = 0x000005ee,
381 regk_eth_size1522 = 0x00000001, 375 regk_eth_size1522 = 0x000005f2,
382 regk_eth_yes = 0x00000001 376 regk_eth_yes = 0x00000001
383}; 377};
384#endif /* __eth_defs_h */ 378#endif /* __eth_defs_h */
diff --git a/include/asm-cris/arch-v32/hwregs/reg_rdwr.h b/include/asm-cris/arch-v32/hwregs/reg_rdwr.h
index 44e60233c68f..236f91efe7e8 100644
--- a/include/asm-cris/arch-v32/hwregs/reg_rdwr.h
+++ b/include/asm-cris/arch-v32/hwregs/reg_rdwr.h
@@ -1,15 +1,17 @@
1/* $Id: reg_rdwr.h,v 1.6 2005/04/24 18:30:58 starvik Exp $ 1/*
2 *
3 * Read/write register macros used by *_defs.h 2 * Read/write register macros used by *_defs.h
4 */ 3 */
5 4
6#ifndef reg_rdwr_h 5#ifndef reg_rdwr_h
7#define reg_rdwr_h 6#define reg_rdwr_h
8 7
8#ifndef REG_READ
9#define REG_READ(type, addr) (*((volatile type *) (addr)))
10#endif
9 11
10#define REG_READ(type, addr) *((volatile type *) (addr)) 12#ifndef REG_WRITE
11
12#define REG_WRITE(type, addr, val) \ 13#define REG_WRITE(type, addr, val) \
13 do { *((volatile type *) (addr)) = (val); } while(0) 14 do { *((volatile type *) (addr)) = (val); } while(0)
15#endif
14 16
15#endif 17#endif
diff --git a/include/asm-cris/arch-v32/io.h b/include/asm-cris/arch-v32/io.h
index 5efe4d949001..6b38912f29ba 100644
--- a/include/asm-cris/arch-v32/io.h
+++ b/include/asm-cris/arch-v32/io.h
@@ -1,9 +1,10 @@
1#ifndef _ASM_ARCH_CRIS_IO_H 1#ifndef _ASM_ARCH_CRIS_IO_H
2#define _ASM_ARCH_CRIS_IO_H 2#define _ASM_ARCH_CRIS_IO_H
3 3
4#include <asm/arch/hwregs/reg_map.h> 4#include <linux/spinlock.h>
5#include <asm/arch/hwregs/reg_rdwr.h> 5#include <hwregs/reg_map.h>
6#include <asm/arch/hwregs/gio_defs.h> 6#include <hwregs/reg_rdwr.h>
7#include <hwregs/gio_defs.h>
7 8
8enum crisv32_io_dir 9enum crisv32_io_dir
9{ 10{
@@ -13,10 +14,11 @@ enum crisv32_io_dir
13 14
14struct crisv32_ioport 15struct crisv32_ioport
15{ 16{
16 unsigned long* oe; 17 volatile unsigned long *oe;
17 unsigned long* data; 18 volatile unsigned long *data;
18 unsigned long* data_in; 19 volatile unsigned long *data_in;
19 unsigned int pin_count; 20 unsigned int pin_count;
21 spinlock_t lock;
20}; 22};
21 23
22struct crisv32_iopin 24struct crisv32_iopin
@@ -34,22 +36,36 @@ extern struct crisv32_iopin crisv32_led2_red;
34extern struct crisv32_iopin crisv32_led3_green; 36extern struct crisv32_iopin crisv32_led3_green;
35extern struct crisv32_iopin crisv32_led3_red; 37extern struct crisv32_iopin crisv32_led3_red;
36 38
37static inline void crisv32_io_set(struct crisv32_iopin* iopin, 39extern struct crisv32_iopin crisv32_led_net0_green;
38 int val) 40extern struct crisv32_iopin crisv32_led_net0_red;
41extern struct crisv32_iopin crisv32_led_net1_green;
42extern struct crisv32_iopin crisv32_led_net1_red;
43
44static inline void crisv32_io_set(struct crisv32_iopin *iopin, int val)
39{ 45{
46 long flags;
47 spin_lock_irqsave(&iopin->port->lock, flags);
48
40 if (val) 49 if (val)
41 *iopin->port->data |= iopin->bit; 50 *iopin->port->data |= iopin->bit;
42 else 51 else
43 *iopin->port->data &= ~iopin->bit; 52 *iopin->port->data &= ~iopin->bit;
53
54 spin_unlock_irqrestore(&iopin->port->lock, flags);
44} 55}
45 56
46static inline void crisv32_io_set_dir(struct crisv32_iopin* iopin, 57static inline void crisv32_io_set_dir(struct crisv32_iopin* iopin,
47 enum crisv32_io_dir dir) 58 enum crisv32_io_dir dir)
48{ 59{
60 long flags;
61 spin_lock_irqsave(&iopin->port->lock, flags);
62
49 if (dir == crisv32_io_dir_in) 63 if (dir == crisv32_io_dir_in)
50 *iopin->port->oe &= ~iopin->bit; 64 *iopin->port->oe &= ~iopin->bit;
51 else 65 else
52 *iopin->port->oe |= iopin->bit; 66 *iopin->port->oe |= iopin->bit;
67
68 spin_unlock_irqrestore(&iopin->port->lock, flags);
53} 69}
54 70
55static inline int crisv32_io_rd(struct crisv32_iopin* iopin) 71static inline int crisv32_io_rd(struct crisv32_iopin* iopin)
@@ -60,38 +76,61 @@ static inline int crisv32_io_rd(struct crisv32_iopin* iopin)
60int crisv32_io_get(struct crisv32_iopin* iopin, 76int crisv32_io_get(struct crisv32_iopin* iopin,
61 unsigned int port, unsigned int pin); 77 unsigned int port, unsigned int pin);
62int crisv32_io_get_name(struct crisv32_iopin* iopin, 78int crisv32_io_get_name(struct crisv32_iopin* iopin,
63 char* name); 79 const char *name);
64 80
65#define LED_OFF 0x00 81#define CRIS_LED_OFF 0x00
66#define LED_GREEN 0x01 82#define CRIS_LED_GREEN 0x01
67#define LED_RED 0x02 83#define CRIS_LED_RED 0x02
68#define LED_ORANGE (LED_GREEN | LED_RED) 84#define CRIS_LED_ORANGE (CRIS_LED_GREEN | CRIS_LED_RED)
69 85
70#define LED_NETWORK_SET(x) \ 86#if (defined(CONFIG_ETRAX_NBR_LED_GRP_ONE) || defined(CONFIG_ETRAX_NBR_LED_GRP_TWO))
71 do { \ 87#define CRIS_LED_NETWORK_GRP0_SET(x) \
72 LED_NETWORK_SET_G((x) & LED_GREEN); \ 88 do { \
73 LED_NETWORK_SET_R((x) & LED_RED); \ 89 CRIS_LED_NETWORK_GRP0_SET_G((x) & CRIS_LED_GREEN); \
90 CRIS_LED_NETWORK_GRP0_SET_R((x) & CRIS_LED_RED); \
74 } while (0) 91 } while (0)
75#define LED_ACTIVE_SET(x) \ 92#else
93#define CRIS_LED_NETWORK_GRP0_SET(x) while (0) {}
94#endif
95
96#define CRIS_LED_NETWORK_GRP0_SET_G(x) \
97 crisv32_io_set(&crisv32_led_net0_green, !(x));
98
99#define CRIS_LED_NETWORK_GRP0_SET_R(x) \
100 crisv32_io_set(&crisv32_led_net0_red, !(x));
101
102#if defined(CONFIG_ETRAX_NBR_LED_GRP_TWO)
103#define CRIS_LED_NETWORK_GRP1_SET(x) \
104 do { \
105 CRIS_LED_NETWORK_GRP1_SET_G((x) & CRIS_LED_GREEN); \
106 CRIS_LED_NETWORK_GRP1_SET_R((x) & CRIS_LED_RED); \
107 } while (0)
108#else
109#define CRIS_LED_NETWORK_GRP1_SET(x) while (0) {}
110#endif
111
112#define CRIS_LED_NETWORK_GRP1_SET_G(x) \
113 crisv32_io_set(&crisv32_led_net1_green, !(x));
114
115#define CRIS_LED_NETWORK_GRP1_SET_R(x) \
116 crisv32_io_set(&crisv32_led_net1_red, !(x));
117
118#define CRIS_LED_ACTIVE_SET(x) \
76 do { \ 119 do { \
77 LED_ACTIVE_SET_G((x) & LED_GREEN); \ 120 CRIS_LED_ACTIVE_SET_G((x) & CRIS_LED_GREEN); \
78 LED_ACTIVE_SET_R((x) & LED_RED); \ 121 CRIS_LED_ACTIVE_SET_R((x) & CRIS_LED_RED); \
79 } while (0) 122 } while (0)
80 123
81#define LED_NETWORK_SET_G(x) \ 124#define CRIS_LED_ACTIVE_SET_G(x) \
82 crisv32_io_set(&crisv32_led1_green, !(x));
83#define LED_NETWORK_SET_R(x) \
84 crisv32_io_set(&crisv32_led1_red, !(x));
85#define LED_ACTIVE_SET_G(x) \
86 crisv32_io_set(&crisv32_led2_green, !(x)); 125 crisv32_io_set(&crisv32_led2_green, !(x));
87#define LED_ACTIVE_SET_R(x) \ 126#define CRIS_LED_ACTIVE_SET_R(x) \
88 crisv32_io_set(&crisv32_led2_red, !(x)); 127 crisv32_io_set(&crisv32_led2_red, !(x));
89#define LED_DISK_WRITE(x) \ 128#define CRIS_LED_DISK_WRITE(x) \
90 do{\ 129 do{\
91 crisv32_io_set(&crisv32_led3_green, !(x)); \ 130 crisv32_io_set(&crisv32_led3_green, !(x)); \
92 crisv32_io_set(&crisv32_led3_red, !(x)); \ 131 crisv32_io_set(&crisv32_led3_red, !(x)); \
93 }while(0) 132 }while(0)
94#define LED_DISK_READ(x) \ 133#define CRIS_LED_DISK_READ(x) \
95 crisv32_io_set(&crisv32_led3_green, !(x)); 134 crisv32_io_set(&crisv32_led3_green, !(x));
96 135
97#endif 136#endif
diff --git a/include/asm-cris/arch-v32/irq.h b/include/asm-cris/arch-v32/irq.h
index bac94ee6bc90..9e4c9fbdfddf 100644
--- a/include/asm-cris/arch-v32/irq.h
+++ b/include/asm-cris/arch-v32/irq.h
@@ -1,12 +1,17 @@
1#ifndef _ASM_ARCH_IRQ_H 1#ifndef _ASM_ARCH_IRQ_H
2#define _ASM_ARCH_IRQ_H 2#define _ASM_ARCH_IRQ_H
3 3
4#include "hwregs/intr_vect.h" 4#include <hwregs/intr_vect.h>
5 5
6/* Number of non-cpu interrupts. */ 6/* Number of non-cpu interrupts. */
7#define NR_IRQS 0x50 /* Exceptions + IRQs */ 7#define NR_IRQS NBR_INTR_VECT /* Exceptions + IRQs */
8#define NR_REAL_IRQS 0x20 /* IRQs */
9#define FIRST_IRQ 0x31 /* Exception number for first IRQ */ 8#define FIRST_IRQ 0x31 /* Exception number for first IRQ */
9#define NR_REAL_IRQS (NBR_INTR_VECT - FIRST_IRQ) /* IRQs */
10#if NR_REAL_IRQS > 32
11#define MACH_IRQS 64
12#else
13#define MACH_IRQS 32
14#endif
10 15
11#ifndef __ASSEMBLY__ 16#ifndef __ASSEMBLY__
12/* Global IRQ vector. */ 17/* Global IRQ vector. */
@@ -73,7 +78,7 @@ void set_exception_vector(int n, irqvectptr addr);
73 * which will acknowledge the interrupt, is run. The actual blocking is made 78 * which will acknowledge the interrupt, is run. The actual blocking is made
74 * by crisv32_do_IRQ. 79 * by crisv32_do_IRQ.
75 */ 80 */
76#define BUILD_IRQ(nr, mask) \ 81#define BUILD_IRQ(nr) \
77void IRQ_NAME(nr); \ 82void IRQ_NAME(nr); \
78__asm__ ( \ 83__asm__ ( \
79 ".text\n\t" \ 84 ".text\n\t" \
@@ -81,7 +86,7 @@ __asm__ ( \
81 SAVE_ALL \ 86 SAVE_ALL \
82 KGDB_FIXUP \ 87 KGDB_FIXUP \
83 "move.d "#nr",$r10\n\t" \ 88 "move.d "#nr",$r10\n\t" \
84 "move.d $sp,$r12\n\t" \ 89 "move.d $sp, $r12\n\t" \
85 "jsr crisv32_do_IRQ\n\t" \ 90 "jsr crisv32_do_IRQ\n\t" \
86 "moveq 1, $r11\n\t" \ 91 "moveq 1, $r11\n\t" \
87 "jump ret_from_intr\n\t" \ 92 "jump ret_from_intr\n\t" \
diff --git a/include/asm-cris/arch-v32/juliette.h b/include/asm-cris/arch-v32/juliette.h
deleted file mode 100644
index f1f81725e57b..000000000000
--- a/include/asm-cris/arch-v32/juliette.h
+++ /dev/null
@@ -1,326 +0,0 @@
1#ifndef _ASM_JULIETTE_H
2#define _ASM_JULIETTE_H
3
4/* juliette _IOC_TYPE, bits 8 to 15 in ioctl cmd */
5
6#define JULIOCTYPE 42
7
8/* supported ioctl _IOC_NR's */
9
10#define JULSTARTDMA 0x1 /* start a picture asynchronously */
11
12/* set parameters */
13
14#define SETDEFAULT 0x2 /* CCD/VIDEO/SS1M */
15#define SETPARAMETERS 0x3 /* CCD/VIDEO */
16#define SETSIZE 0x4 /* CCD/VIDEO/SS1M */
17#define SETCOMPRESSION 0x5 /* CCD/VIDEO/SS1M */
18#define SETCOLORLEVEL 0x6 /* CCD/VIDEO */
19#define SETBRIGHTNESS 0x7 /* CCD */
20#define SETROTATION 0x8 /* CCD */
21#define SETTEXT 0x9 /* CCD/VIDEO/SS1M */
22#define SETCLOCK 0xa /* CCD/VIDEO/SS1M */
23#define SETDATE 0xb /* CCD/VIDEO/SS1M */
24#define SETTIMEFORMAT 0xc /* CCD/VIDEO/SS1M */
25#define SETDATEFORMAT 0xd /* VIDEO */
26#define SETTEXTALIGNMENT 0xe /* VIDEO */
27#define SETFPS 0xf /* CCD/VIDEO/SS1M */
28#define SETVGA 0xff /* VIDEO */
29#define SETCOMMENT 0xfe /* CCD/VIDEO */
30
31/* get parameters */
32
33#define GETDRIVERTYPE 0x10 /* CCD/VIDEO/SS1M */
34#define GETNBROFCAMERAS 0x11 /* CCD/VIDEO/SS1M */
35#define GETPARAMETERS 0x12 /* CCD/VIDEO/SS1M */
36#define GETBUFFERSIZE 0x13 /* CCD/VIDEO/SS1M */
37#define GETVIDEOTYPE 0x14 /* VIDEO/SS1M */
38#define GETVIDEOSIGNAL 0x15 /* VIDEO */
39#define GETMODULATION 0x16 /* VIDEO */
40#define GETDCYVALUES 0xa0 /* CCD /SS1M */
41#define GETDCYWIDTH 0xa1 /* CCD /SS1M */
42#define GETDCYHEIGHT 0xa2 /* CCD /SS1M */
43#define GETSIZE 0xa3 /* CCD/VIDEO */
44#define GETCOMPRESSION 0xa4 /* CCD/VIDEO */
45
46/* detect and get parameters */
47
48#define DETECTMODULATION 0x17 /* VIDEO */
49#define DETECTVIDEOTYPE 0x18 /* VIDEO */
50#define DETECTVIDEOSIGNAL 0x19 /* VIDEO */
51
52/* configure default parameters */
53
54#define CONFIGUREDEFAULT 0x20 /* CCD/VIDEO/SS1M */
55#define DEFSIZE 0x21 /* CCD/VIDEO/SS1M */
56#define DEFCOMPRESSION 0x22 /* CCD/VIDEO/SS1M */
57#define DEFCOLORLEVEL 0x23 /* CCD/VIDEO */
58#define DEFBRIGHTNESS 0x24 /* CCD */
59#define DEFROTATION 0x25 /* CCD */
60#define DEFWHITEBALANCE 0x26 /* CCD */
61#define DEFEXPOSURE 0x27 /* CCD */
62#define DEFAUTOEXPWINDOW 0x28 /* CCD */
63#define DEFTEXT 0x29 /* CCD/VIDEO/SS1M */
64#define DEFCLOCK 0x2a /* CCD/VIDEO/SS1M */
65#define DEFDATE 0x2b /* CCD/VIDEO/SS1M */
66#define DEFTIMEFORMAT 0x2c /* CCD/VIDEO/SS1M */
67#define DEFDATEFORMAT 0x2d /* VIDEO */
68#define DEFTEXTALIGNMENT 0x2e /* VIDEO */
69#define DEFFPS 0x2f /* CCD/VIDEO/SS1M */
70#define DEFTEXTSTRING 0x30 /* CCD/VIDEO/SS1M */
71#define DEFHEADERINFO 0x31 /* CCD/VIDEO/SS1M */
72#define DEFWEXAR 0x32 /* CCD */
73#define DEFLINEDELAY 0x33 /* CCD */
74#define DEFDISABLEDVIDEO 0x34 /* VIDEO */
75#define DEFVIDEOTYPE 0x35 /* VIDEO */
76#define DEFMODULATION 0x36 /* VIDEO */
77#define DEFXOFFSET 0x37 /* VIDEO */
78#define DEFYOFFSET 0x38 /* VIDEO */
79#define DEFYCMODE 0x39 /* VIDEO */
80#define DEFVCRMODE 0x3a /* VIDEO */
81#define DEFSTOREDCYVALUES 0x3b /* CCD/VIDEO/SS1M */
82#define DEFWCDS 0x3c /* CCD */
83#define DEFVGA 0x3d /* VIDEO */
84#define DEFCOMMENT 0x3e /* CCD/VIDEO */
85#define DEFCOMMENTSIZE 0x3f /* CCD/VIDEO */
86#define DEFCOMMENTTEXT 0x50 /* CCD/VIDEO */
87#define DEFSTOREDCYTEXT 0x51 /* VIDEO */
88
89
90#define JULABORTDMA 0x70 /* Abort current DMA transfer */
91
92/* juliette general i/o port */
93
94#define JIO_READBITS 0x40 /* read and return current port bits */
95#define JIO_SETBITS 0x41 /* set bits marked by 1 in the argument */
96#define JIO_CLRBITS 0x42 /* clr bits marked by 1 in the argument */
97#define JIO_READDIR 0x43 /* read direction, 0=input 1=output */
98#define JIO_SETINPUT 0x44 /* set direction, 0=unchanged 1=input
99 returns current dir */
100#define JIO_SETOUTPUT 0x45 /* set direction, 0=unchanged 1=output
101 returns current dir */
102
103/**** YumYum internal adresses ****/
104
105/* Juliette buffer addresses */
106
107#define BUFFER1_VIDEO 0x1100
108#define BUFFER2_VIDEO 0x2800
109#define ACDC_BUFF_VIDEO 0x0aaa
110#define BUFFER1 0x1700
111#define BUFFER2 0x2b01
112#define ACDC_BUFFER 0x1200
113#define BUFFER1_SS1M 0x1100
114#define BUFFER2_SS1M 0x2800
115#define ACDC_BUFF_SS1M 0x0900
116
117/* Juliette parameter memory addresses */
118
119#define PA_BUFFER_CNT 0x3f09 /* CCD/VIDEO */
120#define PA_CCD_BUFFER 0x3f10 /* CCD */
121#define PA_VIDEO_BUFFER 0x3f10 /* VIDEO */
122#define PA_DCT_BUFFER 0x3f11 /* CCD/VIDEO */
123#define PA_TEMP 0x3f12 /* CCD/VIDEO */
124#define PA_VIDEOLINE_RD 0x3f13 /* VIDEO */
125#define PA_VIDEOLINE_WR 0x3f14 /* VIDEO */
126#define PA_VI_HDELAY0 0x3f15 /* VIDEO */
127#define PA_VI_VDELAY0 0x3f16 /* VIDEO */
128#define PA_VI_HDELAY1 0x3f17 /* VIDEO */
129#define PA_VI_VDELAY1 0x3f18 /* VIDEO */
130#define PA_VI_HDELAY2 0x3f19 /* VIDEO */
131#define PA_VI_VDELAY2 0x3f1a /* VIDEO */
132#define PA_VI_HDELAY3 0x3f1b /* VIDEO */
133#define PA_VI_VDELAY3 0x3f1c /* VIDEO */
134#define PA_VI_CTRL 0x3f20 /* VIDEO */
135#define PA_JPEG_CTRL 0x3f22 /* CCD/VIDEO */
136#define PA_BUFFER_SIZE 0x3f24 /* CCD/VIDEO */
137#define PA_PAL_NTSC 0x3f25 /* VIDEO */
138#define PA_MACROBLOCKS 0x3f26 /* CCD/VIDEO */
139#define PA_COLOR 0x3f27 /* VIDEO */
140#define PA_MEMCH1CNT2 0x3f28 /* CCD/VIDEO */
141#define PA_MEMCH1CNT3 0x3f29 /* VIDEO */
142#define PA_MEMCH1STR2 0x3f2a /* CCD/VIDEO */
143#define PA_MEMCH1STR3 0x3f2b /* VIDEO */
144#define PA_BUFFERS 0x3f2c /* CCD/VIDEO */
145#define PA_PROGRAM 0x3f2d /* CCD/VIDEO */
146#define PA_ROTATION 0x3f2e /* CCD */
147#define PA_PC 0x3f30 /* CCD/VIDEO */
148#define PA_PC2 0x3f31 /* VIDEO */
149#define PA_ODD_LINE 0x3f32 /* VIDEO */
150#define PA_EXP_DELAY 0x3f34 /* CCD */
151#define PA_MACROBLOCK_CNT 0x3f35 /* CCD/VIDEO */
152#define PA_DRAM_PTR1_L 0x3f36 /* CCD/VIDEO */
153#define PA_CLPOB_CNT 0x3f37 /* CCD */
154#define PA_DRAM_PTR1_H 0x3f38 /* CCD/VIDEO */
155#define PA_DRAM_PTR2_L 0x3f3a /* VIDEO */
156#define PA_DRAM_PTR2_H 0x3f3c /* VIDEO */
157#define PA_CCD_LINE_CNT 0x3f3f /* CCD */
158#define PA_VIDEO_LINE_CNT 0x3f3f /* VIDEO */
159#define PA_TEXT 0x3f41 /* CCD/VIDEO */
160#define PA_CAMERA_CHANGED 0x3f42 /* VIDEO */
161#define PA_TEXTALIGNMENT 0x3f43 /* VIDEO */
162#define PA_DISABLED 0x3f44 /* VIDEO */
163#define PA_MACROBLOCKTEXT 0x3f45 /* VIDEO */
164#define PA_VGA 0x3f46 /* VIDEO */
165#define PA_ZERO 0x3ffe /* VIDEO */
166#define PA_NULL 0x3fff /* CCD/VIDEO */
167
168typedef enum {
169 jpeg = 0,
170 dummy = 1
171} request_type;
172
173typedef enum {
174 hugesize = 0,
175 fullsize = 1,
176 halfsize = 2,
177 fieldsize = 3
178} size_type;
179
180typedef enum {
181 min = 0,
182 low = 1,
183 medium = 2,
184 high = 3,
185 very_high = 4,
186 very_low = 5,
187 q1 = 6,
188 q2 = 7,
189 q3 = 8,
190 q4 = 9,
191 q5 = 10,
192 q6 = 11
193} compr_type;
194
195typedef enum {
196 deg_0 = 0,
197 deg_180 = 1,
198 deg_90 = 2,
199 deg_270 = 3
200} rotation_type;
201
202typedef enum {
203 auto_white = 0,
204 hold = 1,
205 fixed_outdoor = 2,
206 fixed_indoor = 3,
207 fixed_fluor = 4
208} white_balance_type;
209
210typedef enum {
211 auto_exp = 0,
212 fixed_exp = 1
213} exposure_type;
214
215typedef enum {
216 no_window = 0,
217 center = 1,
218 top = 2,
219 lower = 3,
220 left = 4,
221 right = 5,
222 spot = 6,
223 cw = 7
224} exp_window_type;
225
226typedef enum {
227 h_24 = 0,
228 h_12 = 1,
229 h_24P = 2
230} hour_type;
231
232typedef enum {
233 standard = 0,
234 YYYY_MM_DD = 1,
235 Www_Mmm_DD_YYYY = 2,
236 Www_DD_MM_YYYY = 3
237} date_type;
238
239typedef enum {
240 left_align = 0,
241 center_align = 1,
242 right_align = 2
243} alignment_type;
244
245typedef enum {
246 off = 0,
247 on = 1,
248 no = 0,
249 yes = 1
250} enable_type;
251
252typedef enum {
253 disabled = 0,
254 enabled = 1,
255 extended = 2
256} comment_type;
257
258typedef enum {
259 pal = 0,
260 ntsc = 1
261} video_type;
262
263typedef enum {
264 pal_bghi_ntsc_m = 0,
265 ntsc_4_43_50hz_pal_4_43_60hz = 1,
266 pal_n_ntsc_4_43_60hz = 2,
267 ntsc_n_pal_m = 3,
268 secam_pal_4_43_60hz = 4
269} modulation_type;
270
271typedef enum {
272 cam0 = 0,
273 cam1 = 1,
274 cam2 = 2,
275 cam3 = 3,
276 quad = 32
277} camera_type;
278
279typedef enum {
280 video_driver = 0,
281 ccd_driver = 1
282} driver_type;
283
284struct jul_param {
285 request_type req_type;
286 size_type size;
287 compr_type compression;
288 rotation_type rotation;
289 int color_level;
290 int brightness;
291 white_balance_type white_balance;
292 exposure_type exposure;
293 exp_window_type auto_exp_window;
294 hour_type time_format;
295 date_type date_format;
296 alignment_type text_alignment;
297 enable_type text;
298 enable_type clock;
299 enable_type date;
300 enable_type fps;
301 enable_type vga;
302 enable_type comment;
303};
304
305struct video_param {
306 enable_type disabled;
307 modulation_type modulation;
308 video_type video;
309 enable_type signal;
310 enable_type vcr;
311 int xoffset;
312 int yoffset;
313};
314
315/* The juliette_request structure is used during the JULSTARTDMA asynchronous
316 * picture-taking ioctl call as an argument to specify a buffer which will get
317 * the final picture.
318 */
319
320struct juliette_request {
321 char *buf; /* Pointer to the buffer to hold picture data */
322 unsigned int buflen; /* Length of the above buffer */
323 unsigned int size; /* Resulting length, 0 if the picture is not ready */
324};
325
326#endif
diff --git a/include/asm-cris/arch-v32/mach-a3/arbiter.h b/include/asm-cris/arch-v32/mach-a3/arbiter.h
new file mode 100644
index 000000000000..65e9d6ff0520
--- /dev/null
+++ b/include/asm-cris/arch-v32/mach-a3/arbiter.h
@@ -0,0 +1,34 @@
1#ifndef _ASM_CRIS_ARCH_ARBITER_H
2#define _ASM_CRIS_ARCH_ARBITER_H
3
4#define EXT_REGION 0
5#define INT_REGION 1
6
7typedef void (watch_callback)(void);
8
9enum {
10 arbiter_all_dmas = 0x7fe,
11 arbiter_cpu = 0x1800,
12 arbiter_all_clients = 0x7fff
13};
14
15enum {
16 arbiter_bar_all_clients = 0x1ff
17};
18
19enum {
20 arbiter_all_read = 0x55,
21 arbiter_all_write = 0xaa,
22 arbiter_all_accesses = 0xff
23};
24
25#define MARB_CLIENTS(foo_cli, bar_cli) (((bar_cli) << 16) | (foo_cli))
26
27int crisv32_arbiter_allocate_bandwidth(int client, int region,
28 unsigned long bandwidth);
29int crisv32_arbiter_watch(unsigned long start, unsigned long size,
30 unsigned long clients, unsigned long accesses,
31 watch_callback * cb);
32int crisv32_arbiter_unwatch(int id);
33
34#endif
diff --git a/include/asm-cris/arch-v32/mach-a3/dma.h b/include/asm-cris/arch-v32/mach-a3/dma.h
new file mode 100644
index 000000000000..9e8eb13b601d
--- /dev/null
+++ b/include/asm-cris/arch-v32/mach-a3/dma.h
@@ -0,0 +1,31 @@
1#ifndef _ASM_ARCH_CRIS_DMA_H
2#define _ASM_ARCH_CRIS_DMA_H
3
4/* Defines for using and allocating dma channels. */
5
6#define MAX_DMA_CHANNELS 12 /* 8 and 10 not used. */
7
8enum dma_owner {
9 dma_eth,
10 dma_ser0,
11 dma_ser1,
12 dma_ser2,
13 dma_ser3,
14 dma_ser4,
15 dma_iop,
16 dma_sser,
17 dma_strp,
18 dma_h264,
19 dma_jpeg
20};
21
22int crisv32_request_dma(unsigned int dmanr, const char *device_id,
23 unsigned options, unsigned bandwidth, enum dma_owner owner);
24void crisv32_free_dma(unsigned int dmanr);
25
26/* Masks used by crisv32_request_dma options: */
27#define DMA_VERBOSE_ON_ERROR 1
28#define DMA_PANIC_ON_ERROR (2|DMA_VERBOSE_ON_ERROR)
29#define DMA_INT_MEM 4
30
31#endif /* _ASM_ARCH_CRIS_DMA_H */
diff --git a/include/asm-cris/arch-v32/mach-a3/hwregs/asm/clkgen_defs_asm.h b/include/asm-cris/arch-v32/mach-a3/hwregs/asm/clkgen_defs_asm.h
new file mode 100644
index 000000000000..02855adf63e8
--- /dev/null
+++ b/include/asm-cris/arch-v32/mach-a3/hwregs/asm/clkgen_defs_asm.h
@@ -0,0 +1,164 @@
1#ifndef __clkgen_defs_asm_h
2#define __clkgen_defs_asm_h
3
4/*
5 * This file is autogenerated from
6 * file: clkgen.r
7 *
8 * by ../../../tools/rdesc/bin/rdes2c -asm -outfile clkgen_defs_asm.h clkgen.r
9 * Any changes here will be lost.
10 *
11 * -*- buffer-read-only: t -*-
12 */
13
14#ifndef REG_FIELD
15#define REG_FIELD( scope, reg, field, value ) \
16 REG_FIELD_X_( value, reg_##scope##_##reg##___##field##___lsb )
17#define REG_FIELD_X_( value, shift ) ((value) << shift)
18#endif
19
20#ifndef REG_STATE
21#define REG_STATE( scope, reg, field, symbolic_value ) \
22 REG_STATE_X_( regk_##scope##_##symbolic_value, reg_##scope##_##reg##___##field##___lsb )
23#define REG_STATE_X_( k, shift ) (k << shift)
24#endif
25
26#ifndef REG_MASK
27#define REG_MASK( scope, reg, field ) \
28 REG_MASK_X_( reg_##scope##_##reg##___##field##___width, reg_##scope##_##reg##___##field##___lsb )
29#define REG_MASK_X_( width, lsb ) (((1 << width)-1) << lsb)
30#endif
31
32#ifndef REG_LSB
33#define REG_LSB( scope, reg, field ) reg_##scope##_##reg##___##field##___lsb
34#endif
35
36#ifndef REG_BIT
37#define REG_BIT( scope, reg, field ) reg_##scope##_##reg##___##field##___bit
38#endif
39
40#ifndef REG_ADDR
41#define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset)
42#define REG_ADDR_X_( inst, offs ) ((inst) + offs)
43#endif
44
45#ifndef REG_ADDR_VECT
46#define REG_ADDR_VECT( scope, inst, reg, index ) \
47 REG_ADDR_VECT_X_(inst, reg_##scope##_##reg##_offset, index, \
48 STRIDE_##scope##_##reg )
49#define REG_ADDR_VECT_X_( inst, offs, index, stride ) \
50 ((inst) + offs + (index) * stride)
51#endif
52
53/* Register r_bootsel, scope clkgen, type r */
54#define reg_clkgen_r_bootsel___boot_mode___lsb 0
55#define reg_clkgen_r_bootsel___boot_mode___width 5
56#define reg_clkgen_r_bootsel___intern_main_clk___lsb 5
57#define reg_clkgen_r_bootsel___intern_main_clk___width 1
58#define reg_clkgen_r_bootsel___intern_main_clk___bit 5
59#define reg_clkgen_r_bootsel___extern_usb2_clk___lsb 6
60#define reg_clkgen_r_bootsel___extern_usb2_clk___width 1
61#define reg_clkgen_r_bootsel___extern_usb2_clk___bit 6
62#define reg_clkgen_r_bootsel_offset 0
63
64/* Register rw_clk_ctrl, scope clkgen, type rw */
65#define reg_clkgen_rw_clk_ctrl___pll___lsb 0
66#define reg_clkgen_rw_clk_ctrl___pll___width 1
67#define reg_clkgen_rw_clk_ctrl___pll___bit 0
68#define reg_clkgen_rw_clk_ctrl___cpu___lsb 1
69#define reg_clkgen_rw_clk_ctrl___cpu___width 1
70#define reg_clkgen_rw_clk_ctrl___cpu___bit 1
71#define reg_clkgen_rw_clk_ctrl___iop_usb___lsb 2
72#define reg_clkgen_rw_clk_ctrl___iop_usb___width 1
73#define reg_clkgen_rw_clk_ctrl___iop_usb___bit 2
74#define reg_clkgen_rw_clk_ctrl___vin___lsb 3
75#define reg_clkgen_rw_clk_ctrl___vin___width 1
76#define reg_clkgen_rw_clk_ctrl___vin___bit 3
77#define reg_clkgen_rw_clk_ctrl___sclr___lsb 4
78#define reg_clkgen_rw_clk_ctrl___sclr___width 1
79#define reg_clkgen_rw_clk_ctrl___sclr___bit 4
80#define reg_clkgen_rw_clk_ctrl___h264___lsb 5
81#define reg_clkgen_rw_clk_ctrl___h264___width 1
82#define reg_clkgen_rw_clk_ctrl___h264___bit 5
83#define reg_clkgen_rw_clk_ctrl___ddr2___lsb 6
84#define reg_clkgen_rw_clk_ctrl___ddr2___width 1
85#define reg_clkgen_rw_clk_ctrl___ddr2___bit 6
86#define reg_clkgen_rw_clk_ctrl___vout_hist___lsb 7
87#define reg_clkgen_rw_clk_ctrl___vout_hist___width 1
88#define reg_clkgen_rw_clk_ctrl___vout_hist___bit 7
89#define reg_clkgen_rw_clk_ctrl___eth___lsb 8
90#define reg_clkgen_rw_clk_ctrl___eth___width 1
91#define reg_clkgen_rw_clk_ctrl___eth___bit 8
92#define reg_clkgen_rw_clk_ctrl___ccd_tg_200___lsb 9
93#define reg_clkgen_rw_clk_ctrl___ccd_tg_200___width 1
94#define reg_clkgen_rw_clk_ctrl___ccd_tg_200___bit 9
95#define reg_clkgen_rw_clk_ctrl___dma0_1_eth___lsb 10
96#define reg_clkgen_rw_clk_ctrl___dma0_1_eth___width 1
97#define reg_clkgen_rw_clk_ctrl___dma0_1_eth___bit 10
98#define reg_clkgen_rw_clk_ctrl___ccd_tg_100___lsb 11
99#define reg_clkgen_rw_clk_ctrl___ccd_tg_100___width 1
100#define reg_clkgen_rw_clk_ctrl___ccd_tg_100___bit 11
101#define reg_clkgen_rw_clk_ctrl___jpeg___lsb 12
102#define reg_clkgen_rw_clk_ctrl___jpeg___width 1
103#define reg_clkgen_rw_clk_ctrl___jpeg___bit 12
104#define reg_clkgen_rw_clk_ctrl___sser_ser_dma6_7___lsb 13
105#define reg_clkgen_rw_clk_ctrl___sser_ser_dma6_7___width 1
106#define reg_clkgen_rw_clk_ctrl___sser_ser_dma6_7___bit 13
107#define reg_clkgen_rw_clk_ctrl___strdma0_2_video___lsb 14
108#define reg_clkgen_rw_clk_ctrl___strdma0_2_video___width 1
109#define reg_clkgen_rw_clk_ctrl___strdma0_2_video___bit 14
110#define reg_clkgen_rw_clk_ctrl___dma2_3_strcop___lsb 15
111#define reg_clkgen_rw_clk_ctrl___dma2_3_strcop___width 1
112#define reg_clkgen_rw_clk_ctrl___dma2_3_strcop___bit 15
113#define reg_clkgen_rw_clk_ctrl___dma4_5_iop___lsb 16
114#define reg_clkgen_rw_clk_ctrl___dma4_5_iop___width 1
115#define reg_clkgen_rw_clk_ctrl___dma4_5_iop___bit 16
116#define reg_clkgen_rw_clk_ctrl___dma9_11___lsb 17
117#define reg_clkgen_rw_clk_ctrl___dma9_11___width 1
118#define reg_clkgen_rw_clk_ctrl___dma9_11___bit 17
119#define reg_clkgen_rw_clk_ctrl___memarb_bar_ddr___lsb 18
120#define reg_clkgen_rw_clk_ctrl___memarb_bar_ddr___width 1
121#define reg_clkgen_rw_clk_ctrl___memarb_bar_ddr___bit 18
122#define reg_clkgen_rw_clk_ctrl___sclr_h264___lsb 19
123#define reg_clkgen_rw_clk_ctrl___sclr_h264___width 1
124#define reg_clkgen_rw_clk_ctrl___sclr_h264___bit 19
125#define reg_clkgen_rw_clk_ctrl_offset 4
126
127
128/* Constants */
129#define regk_clkgen_eth1000_rx 0x0000000c
130#define regk_clkgen_eth1000_tx 0x0000000e
131#define regk_clkgen_eth100_rx 0x0000001d
132#define regk_clkgen_eth100_rx_half 0x0000001c
133#define regk_clkgen_eth100_tx 0x0000001f
134#define regk_clkgen_eth100_tx_half 0x0000001e
135#define regk_clkgen_nand_3_2 0x00000000
136#define regk_clkgen_nand_3_2_0x30 0x00000002
137#define regk_clkgen_nand_3_2_0x30_pll 0x00000012
138#define regk_clkgen_nand_3_2_pll 0x00000010
139#define regk_clkgen_nand_3_3 0x00000001
140#define regk_clkgen_nand_3_3_0x30 0x00000003
141#define regk_clkgen_nand_3_3_0x30_pll 0x00000013
142#define regk_clkgen_nand_3_3_pll 0x00000011
143#define regk_clkgen_nand_4_2 0x00000004
144#define regk_clkgen_nand_4_2_0x30 0x00000006
145#define regk_clkgen_nand_4_2_0x30_pll 0x00000016
146#define regk_clkgen_nand_4_2_pll 0x00000014
147#define regk_clkgen_nand_4_3 0x00000005
148#define regk_clkgen_nand_4_3_0x30 0x00000007
149#define regk_clkgen_nand_4_3_0x30_pll 0x00000017
150#define regk_clkgen_nand_4_3_pll 0x00000015
151#define regk_clkgen_nand_5_2 0x00000008
152#define regk_clkgen_nand_5_2_0x30 0x0000000a
153#define regk_clkgen_nand_5_2_0x30_pll 0x0000001a
154#define regk_clkgen_nand_5_2_pll 0x00000018
155#define regk_clkgen_nand_5_3 0x00000009
156#define regk_clkgen_nand_5_3_0x30 0x0000000b
157#define regk_clkgen_nand_5_3_0x30_pll 0x0000001b
158#define regk_clkgen_nand_5_3_pll 0x00000019
159#define regk_clkgen_no 0x00000000
160#define regk_clkgen_rw_clk_ctrl_default 0x00000002
161#define regk_clkgen_ser 0x0000000d
162#define regk_clkgen_ser_pll 0x0000000f
163#define regk_clkgen_yes 0x00000001
164#endif /* __clkgen_defs_asm_h */
diff --git a/include/asm-cris/arch-v32/mach-a3/hwregs/asm/ddr2_defs_asm.h b/include/asm-cris/arch-v32/mach-a3/hwregs/asm/ddr2_defs_asm.h
new file mode 100644
index 000000000000..b12be03edacb
--- /dev/null
+++ b/include/asm-cris/arch-v32/mach-a3/hwregs/asm/ddr2_defs_asm.h
@@ -0,0 +1,266 @@
1#ifndef __ddr2_defs_asm_h
2#define __ddr2_defs_asm_h
3
4/*
5 * This file is autogenerated from
6 * file: ddr2.r
7 *
8 * by ../../../tools/rdesc/bin/rdes2c -asm -outfile ddr2_defs_asm.h ddr2.r
9 * Any changes here will be lost.
10 *
11 * -*- buffer-read-only: t -*-
12 */
13
14#ifndef REG_FIELD
15#define REG_FIELD( scope, reg, field, value ) \
16 REG_FIELD_X_( value, reg_##scope##_##reg##___##field##___lsb )
17#define REG_FIELD_X_( value, shift ) ((value) << shift)
18#endif
19
20#ifndef REG_STATE
21#define REG_STATE( scope, reg, field, symbolic_value ) \
22 REG_STATE_X_( regk_##scope##_##symbolic_value, reg_##scope##_##reg##___##field##___lsb )
23#define REG_STATE_X_( k, shift ) (k << shift)
24#endif
25
26#ifndef REG_MASK
27#define REG_MASK( scope, reg, field ) \
28 REG_MASK_X_( reg_##scope##_##reg##___##field##___width, reg_##scope##_##reg##___##field##___lsb )
29#define REG_MASK_X_( width, lsb ) (((1 << width)-1) << lsb)
30#endif
31
32#ifndef REG_LSB
33#define REG_LSB( scope, reg, field ) reg_##scope##_##reg##___##field##___lsb
34#endif
35
36#ifndef REG_BIT
37#define REG_BIT( scope, reg, field ) reg_##scope##_##reg##___##field##___bit
38#endif
39
40#ifndef REG_ADDR
41#define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset)
42#define REG_ADDR_X_( inst, offs ) ((inst) + offs)
43#endif
44
45#ifndef REG_ADDR_VECT
46#define REG_ADDR_VECT( scope, inst, reg, index ) \
47 REG_ADDR_VECT_X_(inst, reg_##scope##_##reg##_offset, index, \
48 STRIDE_##scope##_##reg )
49#define REG_ADDR_VECT_X_( inst, offs, index, stride ) \
50 ((inst) + offs + (index) * stride)
51#endif
52
53/* Register rw_cfg, scope ddr2, type rw */
54#define reg_ddr2_rw_cfg___col_width___lsb 0
55#define reg_ddr2_rw_cfg___col_width___width 4
56#define reg_ddr2_rw_cfg___nr_banks___lsb 4
57#define reg_ddr2_rw_cfg___nr_banks___width 1
58#define reg_ddr2_rw_cfg___nr_banks___bit 4
59#define reg_ddr2_rw_cfg___bw___lsb 5
60#define reg_ddr2_rw_cfg___bw___width 1
61#define reg_ddr2_rw_cfg___bw___bit 5
62#define reg_ddr2_rw_cfg___nr_ref___lsb 6
63#define reg_ddr2_rw_cfg___nr_ref___width 4
64#define reg_ddr2_rw_cfg___ref_interval___lsb 10
65#define reg_ddr2_rw_cfg___ref_interval___width 11
66#define reg_ddr2_rw_cfg___odt_ctrl___lsb 21
67#define reg_ddr2_rw_cfg___odt_ctrl___width 2
68#define reg_ddr2_rw_cfg___odt_mem___lsb 23
69#define reg_ddr2_rw_cfg___odt_mem___width 1
70#define reg_ddr2_rw_cfg___odt_mem___bit 23
71#define reg_ddr2_rw_cfg___imp_strength___lsb 24
72#define reg_ddr2_rw_cfg___imp_strength___width 1
73#define reg_ddr2_rw_cfg___imp_strength___bit 24
74#define reg_ddr2_rw_cfg___auto_imp_cal___lsb 25
75#define reg_ddr2_rw_cfg___auto_imp_cal___width 1
76#define reg_ddr2_rw_cfg___auto_imp_cal___bit 25
77#define reg_ddr2_rw_cfg___imp_cal_override___lsb 26
78#define reg_ddr2_rw_cfg___imp_cal_override___width 1
79#define reg_ddr2_rw_cfg___imp_cal_override___bit 26
80#define reg_ddr2_rw_cfg___dll_override___lsb 27
81#define reg_ddr2_rw_cfg___dll_override___width 1
82#define reg_ddr2_rw_cfg___dll_override___bit 27
83#define reg_ddr2_rw_cfg_offset 0
84
85/* Register rw_timing, scope ddr2, type rw */
86#define reg_ddr2_rw_timing___wr___lsb 0
87#define reg_ddr2_rw_timing___wr___width 3
88#define reg_ddr2_rw_timing___rcd___lsb 3
89#define reg_ddr2_rw_timing___rcd___width 3
90#define reg_ddr2_rw_timing___rp___lsb 6
91#define reg_ddr2_rw_timing___rp___width 3
92#define reg_ddr2_rw_timing___ras___lsb 9
93#define reg_ddr2_rw_timing___ras___width 4
94#define reg_ddr2_rw_timing___rfc___lsb 13
95#define reg_ddr2_rw_timing___rfc___width 7
96#define reg_ddr2_rw_timing___rc___lsb 20
97#define reg_ddr2_rw_timing___rc___width 5
98#define reg_ddr2_rw_timing___rtp___lsb 25
99#define reg_ddr2_rw_timing___rtp___width 2
100#define reg_ddr2_rw_timing___rtw___lsb 27
101#define reg_ddr2_rw_timing___rtw___width 3
102#define reg_ddr2_rw_timing___wtr___lsb 30
103#define reg_ddr2_rw_timing___wtr___width 2
104#define reg_ddr2_rw_timing_offset 4
105
106/* Register rw_latency, scope ddr2, type rw */
107#define reg_ddr2_rw_latency___cas___lsb 0
108#define reg_ddr2_rw_latency___cas___width 3
109#define reg_ddr2_rw_latency___additive___lsb 3
110#define reg_ddr2_rw_latency___additive___width 3
111#define reg_ddr2_rw_latency_offset 8
112
113/* Register rw_phy_cfg, scope ddr2, type rw */
114#define reg_ddr2_rw_phy_cfg___en___lsb 0
115#define reg_ddr2_rw_phy_cfg___en___width 1
116#define reg_ddr2_rw_phy_cfg___en___bit 0
117#define reg_ddr2_rw_phy_cfg_offset 12
118
119/* Register rw_phy_ctrl, scope ddr2, type rw */
120#define reg_ddr2_rw_phy_ctrl___rst___lsb 0
121#define reg_ddr2_rw_phy_ctrl___rst___width 1
122#define reg_ddr2_rw_phy_ctrl___rst___bit 0
123#define reg_ddr2_rw_phy_ctrl___cal_rst___lsb 1
124#define reg_ddr2_rw_phy_ctrl___cal_rst___width 1
125#define reg_ddr2_rw_phy_ctrl___cal_rst___bit 1
126#define reg_ddr2_rw_phy_ctrl___cal_start___lsb 2
127#define reg_ddr2_rw_phy_ctrl___cal_start___width 1
128#define reg_ddr2_rw_phy_ctrl___cal_start___bit 2
129#define reg_ddr2_rw_phy_ctrl_offset 16
130
131/* Register rw_ctrl, scope ddr2, type rw */
132#define reg_ddr2_rw_ctrl___mrs_data___lsb 0
133#define reg_ddr2_rw_ctrl___mrs_data___width 16
134#define reg_ddr2_rw_ctrl___cmd___lsb 16
135#define reg_ddr2_rw_ctrl___cmd___width 8
136#define reg_ddr2_rw_ctrl_offset 20
137
138/* Register rw_pwr_down, scope ddr2, type rw */
139#define reg_ddr2_rw_pwr_down___self_ref___lsb 0
140#define reg_ddr2_rw_pwr_down___self_ref___width 2
141#define reg_ddr2_rw_pwr_down___phy_en___lsb 2
142#define reg_ddr2_rw_pwr_down___phy_en___width 1
143#define reg_ddr2_rw_pwr_down___phy_en___bit 2
144#define reg_ddr2_rw_pwr_down_offset 24
145
146/* Register r_stat, scope ddr2, type r */
147#define reg_ddr2_r_stat___dll_lock___lsb 0
148#define reg_ddr2_r_stat___dll_lock___width 1
149#define reg_ddr2_r_stat___dll_lock___bit 0
150#define reg_ddr2_r_stat___dll_delay_code___lsb 1
151#define reg_ddr2_r_stat___dll_delay_code___width 7
152#define reg_ddr2_r_stat___imp_cal_done___lsb 8
153#define reg_ddr2_r_stat___imp_cal_done___width 1
154#define reg_ddr2_r_stat___imp_cal_done___bit 8
155#define reg_ddr2_r_stat___imp_cal_fault___lsb 9
156#define reg_ddr2_r_stat___imp_cal_fault___width 1
157#define reg_ddr2_r_stat___imp_cal_fault___bit 9
158#define reg_ddr2_r_stat___cal_imp_pu___lsb 10
159#define reg_ddr2_r_stat___cal_imp_pu___width 4
160#define reg_ddr2_r_stat___cal_imp_pd___lsb 14
161#define reg_ddr2_r_stat___cal_imp_pd___width 4
162#define reg_ddr2_r_stat_offset 28
163
164/* Register rw_imp_ctrl, scope ddr2, type rw */
165#define reg_ddr2_rw_imp_ctrl___imp_pu___lsb 0
166#define reg_ddr2_rw_imp_ctrl___imp_pu___width 4
167#define reg_ddr2_rw_imp_ctrl___imp_pd___lsb 4
168#define reg_ddr2_rw_imp_ctrl___imp_pd___width 4
169#define reg_ddr2_rw_imp_ctrl_offset 32
170
171#define STRIDE_ddr2_rw_dll_ctrl 4
172/* Register rw_dll_ctrl, scope ddr2, type rw */
173#define reg_ddr2_rw_dll_ctrl___mode___lsb 0
174#define reg_ddr2_rw_dll_ctrl___mode___width 1
175#define reg_ddr2_rw_dll_ctrl___mode___bit 0
176#define reg_ddr2_rw_dll_ctrl___clk_delay___lsb 1
177#define reg_ddr2_rw_dll_ctrl___clk_delay___width 7
178#define reg_ddr2_rw_dll_ctrl_offset 36
179
180#define STRIDE_ddr2_rw_dqs_dll_ctrl 4
181/* Register rw_dqs_dll_ctrl, scope ddr2, type rw */
182#define reg_ddr2_rw_dqs_dll_ctrl___dqs90_delay___lsb 0
183#define reg_ddr2_rw_dqs_dll_ctrl___dqs90_delay___width 7
184#define reg_ddr2_rw_dqs_dll_ctrl___dqs180_delay___lsb 7
185#define reg_ddr2_rw_dqs_dll_ctrl___dqs180_delay___width 7
186#define reg_ddr2_rw_dqs_dll_ctrl___dqs270_delay___lsb 14
187#define reg_ddr2_rw_dqs_dll_ctrl___dqs270_delay___width 7
188#define reg_ddr2_rw_dqs_dll_ctrl___dqs360_delay___lsb 21
189#define reg_ddr2_rw_dqs_dll_ctrl___dqs360_delay___width 7
190#define reg_ddr2_rw_dqs_dll_ctrl_offset 52
191
192
193/* Constants */
194#define regk_ddr2_al0 0x00000000
195#define regk_ddr2_al1 0x00000008
196#define regk_ddr2_al2 0x00000010
197#define regk_ddr2_al3 0x00000018
198#define regk_ddr2_al4 0x00000020
199#define regk_ddr2_auto 0x00000003
200#define regk_ddr2_bank4 0x00000000
201#define regk_ddr2_bank8 0x00000001
202#define regk_ddr2_bl4 0x00000002
203#define regk_ddr2_bl8 0x00000003
204#define regk_ddr2_bt_il 0x00000008
205#define regk_ddr2_bt_seq 0x00000000
206#define regk_ddr2_bw16 0x00000001
207#define regk_ddr2_bw32 0x00000000
208#define regk_ddr2_cas2 0x00000020
209#define regk_ddr2_cas3 0x00000030
210#define regk_ddr2_cas4 0x00000040
211#define regk_ddr2_cas5 0x00000050
212#define regk_ddr2_deselect 0x000000c0
213#define regk_ddr2_dic_weak 0x00000002
214#define regk_ddr2_direct 0x00000001
215#define regk_ddr2_dis 0x00000000
216#define regk_ddr2_dll_dis 0x00000001
217#define regk_ddr2_dll_en 0x00000000
218#define regk_ddr2_dll_rst 0x00000100
219#define regk_ddr2_emrs 0x00000081
220#define regk_ddr2_emrs2 0x00000082
221#define regk_ddr2_emrs3 0x00000083
222#define regk_ddr2_full 0x00000001
223#define regk_ddr2_hi_ref_rate 0x00000080
224#define regk_ddr2_mrs 0x00000080
225#define regk_ddr2_no 0x00000000
226#define regk_ddr2_nop 0x000000b8
227#define regk_ddr2_ocd_adj 0x00000200
228#define regk_ddr2_ocd_default 0x00000380
229#define regk_ddr2_ocd_drive0 0x00000100
230#define regk_ddr2_ocd_drive1 0x00000080
231#define regk_ddr2_ocd_exit 0x00000000
232#define regk_ddr2_odt_dis 0x00000000
233#define regk_ddr2_offs 0x00000000
234#define regk_ddr2_pre 0x00000090
235#define regk_ddr2_pre_all 0x00000400
236#define regk_ddr2_pwr_down_fast 0x00000000
237#define regk_ddr2_pwr_down_slow 0x00001000
238#define regk_ddr2_ref 0x00000088
239#define regk_ddr2_rtt150 0x00000040
240#define regk_ddr2_rtt50 0x00000044
241#define regk_ddr2_rtt75 0x00000004
242#define regk_ddr2_rw_cfg_default 0x00186000
243#define regk_ddr2_rw_dll_ctrl_default 0x00000000
244#define regk_ddr2_rw_dll_ctrl_size 0x00000004
245#define regk_ddr2_rw_dqs_dll_ctrl_default 0x00000000
246#define regk_ddr2_rw_dqs_dll_ctrl_size 0x00000004
247#define regk_ddr2_rw_latency_default 0x00000000
248#define regk_ddr2_rw_phy_cfg_default 0x00000000
249#define regk_ddr2_rw_pwr_down_default 0x00000000
250#define regk_ddr2_rw_timing_default 0x00000000
251#define regk_ddr2_s1Gb 0x0000001a
252#define regk_ddr2_s256Mb 0x0000000f
253#define regk_ddr2_s2Gb 0x00000027
254#define regk_ddr2_s4Gb 0x00000042
255#define regk_ddr2_s512Mb 0x00000015
256#define regk_ddr2_temp0_85 0x00000618
257#define regk_ddr2_temp85_95 0x0000030c
258#define regk_ddr2_term150 0x00000002
259#define regk_ddr2_term50 0x00000003
260#define regk_ddr2_term75 0x00000001
261#define regk_ddr2_test 0x00000080
262#define regk_ddr2_weak 0x00000000
263#define regk_ddr2_wr2 0x00000200
264#define regk_ddr2_wr3 0x00000400
265#define regk_ddr2_yes 0x00000001
266#endif /* __ddr2_defs_asm_h */
diff --git a/include/asm-cris/arch-v32/mach-a3/hwregs/asm/gio_defs_asm.h b/include/asm-cris/arch-v32/mach-a3/hwregs/asm/gio_defs_asm.h
new file mode 100644
index 000000000000..df6714fda179
--- /dev/null
+++ b/include/asm-cris/arch-v32/mach-a3/hwregs/asm/gio_defs_asm.h
@@ -0,0 +1,849 @@
1#ifndef __gio_defs_asm_h
2#define __gio_defs_asm_h
3
4/*
5 * This file is autogenerated from
6 * file: gio.r
7 *
8 * by ../../../tools/rdesc/bin/rdes2c -asm -outfile gio_defs_asm.h gio.r
9 * Any changes here will be lost.
10 *
11 * -*- buffer-read-only: t -*-
12 */
13
14#ifndef REG_FIELD
15#define REG_FIELD( scope, reg, field, value ) \
16 REG_FIELD_X_( value, reg_##scope##_##reg##___##field##___lsb )
17#define REG_FIELD_X_( value, shift ) ((value) << shift)
18#endif
19
20#ifndef REG_STATE
21#define REG_STATE( scope, reg, field, symbolic_value ) \
22 REG_STATE_X_( regk_##scope##_##symbolic_value, reg_##scope##_##reg##___##field##___lsb )
23#define REG_STATE_X_( k, shift ) (k << shift)
24#endif
25
26#ifndef REG_MASK
27#define REG_MASK( scope, reg, field ) \
28 REG_MASK_X_( reg_##scope##_##reg##___##field##___width, reg_##scope##_##reg##___##field##___lsb )
29#define REG_MASK_X_( width, lsb ) (((1 << width)-1) << lsb)
30#endif
31
32#ifndef REG_LSB
33#define REG_LSB( scope, reg, field ) reg_##scope##_##reg##___##field##___lsb
34#endif
35
36#ifndef REG_BIT
37#define REG_BIT( scope, reg, field ) reg_##scope##_##reg##___##field##___bit
38#endif
39
40#ifndef REG_ADDR
41#define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset)
42#define REG_ADDR_X_( inst, offs ) ((inst) + offs)
43#endif
44
45#ifndef REG_ADDR_VECT
46#define REG_ADDR_VECT( scope, inst, reg, index ) \
47 REG_ADDR_VECT_X_(inst, reg_##scope##_##reg##_offset, index, \
48 STRIDE_##scope##_##reg )
49#define REG_ADDR_VECT_X_( inst, offs, index, stride ) \
50 ((inst) + offs + (index) * stride)
51#endif
52
53/* Register r_pa_din, scope gio, type r */
54#define reg_gio_r_pa_din___data___lsb 0
55#define reg_gio_r_pa_din___data___width 32
56#define reg_gio_r_pa_din_offset 0
57
58/* Register rw_pa_dout, scope gio, type rw */
59#define reg_gio_rw_pa_dout___data___lsb 0
60#define reg_gio_rw_pa_dout___data___width 32
61#define reg_gio_rw_pa_dout_offset 4
62
63/* Register rw_pa_oe, scope gio, type rw */
64#define reg_gio_rw_pa_oe___oe___lsb 0
65#define reg_gio_rw_pa_oe___oe___width 32
66#define reg_gio_rw_pa_oe_offset 8
67
68/* Register rw_pa_byte0_dout, scope gio, type rw */
69#define reg_gio_rw_pa_byte0_dout___data___lsb 0
70#define reg_gio_rw_pa_byte0_dout___data___width 8
71#define reg_gio_rw_pa_byte0_dout_offset 12
72
73/* Register rw_pa_byte0_oe, scope gio, type rw */
74#define reg_gio_rw_pa_byte0_oe___oe___lsb 0
75#define reg_gio_rw_pa_byte0_oe___oe___width 8
76#define reg_gio_rw_pa_byte0_oe_offset 16
77
78/* Register rw_pa_byte1_dout, scope gio, type rw */
79#define reg_gio_rw_pa_byte1_dout___data___lsb 0
80#define reg_gio_rw_pa_byte1_dout___data___width 8
81#define reg_gio_rw_pa_byte1_dout_offset 20
82
83/* Register rw_pa_byte1_oe, scope gio, type rw */
84#define reg_gio_rw_pa_byte1_oe___oe___lsb 0
85#define reg_gio_rw_pa_byte1_oe___oe___width 8
86#define reg_gio_rw_pa_byte1_oe_offset 24
87
88/* Register rw_pa_byte2_dout, scope gio, type rw */
89#define reg_gio_rw_pa_byte2_dout___data___lsb 0
90#define reg_gio_rw_pa_byte2_dout___data___width 8
91#define reg_gio_rw_pa_byte2_dout_offset 28
92
93/* Register rw_pa_byte2_oe, scope gio, type rw */
94#define reg_gio_rw_pa_byte2_oe___oe___lsb 0
95#define reg_gio_rw_pa_byte2_oe___oe___width 8
96#define reg_gio_rw_pa_byte2_oe_offset 32
97
98/* Register rw_pa_byte3_dout, scope gio, type rw */
99#define reg_gio_rw_pa_byte3_dout___data___lsb 0
100#define reg_gio_rw_pa_byte3_dout___data___width 8
101#define reg_gio_rw_pa_byte3_dout_offset 36
102
103/* Register rw_pa_byte3_oe, scope gio, type rw */
104#define reg_gio_rw_pa_byte3_oe___oe___lsb 0
105#define reg_gio_rw_pa_byte3_oe___oe___width 8
106#define reg_gio_rw_pa_byte3_oe_offset 40
107
108/* Register r_pb_din, scope gio, type r */
109#define reg_gio_r_pb_din___data___lsb 0
110#define reg_gio_r_pb_din___data___width 32
111#define reg_gio_r_pb_din_offset 44
112
113/* Register rw_pb_dout, scope gio, type rw */
114#define reg_gio_rw_pb_dout___data___lsb 0
115#define reg_gio_rw_pb_dout___data___width 32
116#define reg_gio_rw_pb_dout_offset 48
117
118/* Register rw_pb_oe, scope gio, type rw */
119#define reg_gio_rw_pb_oe___oe___lsb 0
120#define reg_gio_rw_pb_oe___oe___width 32
121#define reg_gio_rw_pb_oe_offset 52
122
123/* Register rw_pb_byte0_dout, scope gio, type rw */
124#define reg_gio_rw_pb_byte0_dout___data___lsb 0
125#define reg_gio_rw_pb_byte0_dout___data___width 8
126#define reg_gio_rw_pb_byte0_dout_offset 56
127
128/* Register rw_pb_byte0_oe, scope gio, type rw */
129#define reg_gio_rw_pb_byte0_oe___oe___lsb 0
130#define reg_gio_rw_pb_byte0_oe___oe___width 8
131#define reg_gio_rw_pb_byte0_oe_offset 60
132
133/* Register rw_pb_byte1_dout, scope gio, type rw */
134#define reg_gio_rw_pb_byte1_dout___data___lsb 0
135#define reg_gio_rw_pb_byte1_dout___data___width 8
136#define reg_gio_rw_pb_byte1_dout_offset 64
137
138/* Register rw_pb_byte1_oe, scope gio, type rw */
139#define reg_gio_rw_pb_byte1_oe___oe___lsb 0
140#define reg_gio_rw_pb_byte1_oe___oe___width 8
141#define reg_gio_rw_pb_byte1_oe_offset 68
142
143/* Register rw_pb_byte2_dout, scope gio, type rw */
144#define reg_gio_rw_pb_byte2_dout___data___lsb 0
145#define reg_gio_rw_pb_byte2_dout___data___width 8
146#define reg_gio_rw_pb_byte2_dout_offset 72
147
148/* Register rw_pb_byte2_oe, scope gio, type rw */
149#define reg_gio_rw_pb_byte2_oe___oe___lsb 0
150#define reg_gio_rw_pb_byte2_oe___oe___width 8
151#define reg_gio_rw_pb_byte2_oe_offset 76
152
153/* Register rw_pb_byte3_dout, scope gio, type rw */
154#define reg_gio_rw_pb_byte3_dout___data___lsb 0
155#define reg_gio_rw_pb_byte3_dout___data___width 8
156#define reg_gio_rw_pb_byte3_dout_offset 80
157
158/* Register rw_pb_byte3_oe, scope gio, type rw */
159#define reg_gio_rw_pb_byte3_oe___oe___lsb 0
160#define reg_gio_rw_pb_byte3_oe___oe___width 8
161#define reg_gio_rw_pb_byte3_oe_offset 84
162
163/* Register r_pc_din, scope gio, type r */
164#define reg_gio_r_pc_din___data___lsb 0
165#define reg_gio_r_pc_din___data___width 16
166#define reg_gio_r_pc_din_offset 88
167
168/* Register rw_pc_dout, scope gio, type rw */
169#define reg_gio_rw_pc_dout___data___lsb 0
170#define reg_gio_rw_pc_dout___data___width 16
171#define reg_gio_rw_pc_dout_offset 92
172
173/* Register rw_pc_oe, scope gio, type rw */
174#define reg_gio_rw_pc_oe___oe___lsb 0
175#define reg_gio_rw_pc_oe___oe___width 16
176#define reg_gio_rw_pc_oe_offset 96
177
178/* Register rw_pc_byte0_dout, scope gio, type rw */
179#define reg_gio_rw_pc_byte0_dout___data___lsb 0
180#define reg_gio_rw_pc_byte0_dout___data___width 8
181#define reg_gio_rw_pc_byte0_dout_offset 100
182
183/* Register rw_pc_byte0_oe, scope gio, type rw */
184#define reg_gio_rw_pc_byte0_oe___oe___lsb 0
185#define reg_gio_rw_pc_byte0_oe___oe___width 8
186#define reg_gio_rw_pc_byte0_oe_offset 104
187
188/* Register rw_pc_byte1_dout, scope gio, type rw */
189#define reg_gio_rw_pc_byte1_dout___data___lsb 0
190#define reg_gio_rw_pc_byte1_dout___data___width 8
191#define reg_gio_rw_pc_byte1_dout_offset 108
192
193/* Register rw_pc_byte1_oe, scope gio, type rw */
194#define reg_gio_rw_pc_byte1_oe___oe___lsb 0
195#define reg_gio_rw_pc_byte1_oe___oe___width 8
196#define reg_gio_rw_pc_byte1_oe_offset 112
197
198/* Register r_pd_din, scope gio, type r */
199#define reg_gio_r_pd_din___data___lsb 0
200#define reg_gio_r_pd_din___data___width 32
201#define reg_gio_r_pd_din_offset 116
202
203/* Register rw_intr_cfg, scope gio, type rw */
204#define reg_gio_rw_intr_cfg___intr0___lsb 0
205#define reg_gio_rw_intr_cfg___intr0___width 3
206#define reg_gio_rw_intr_cfg___intr1___lsb 3
207#define reg_gio_rw_intr_cfg___intr1___width 3
208#define reg_gio_rw_intr_cfg___intr2___lsb 6
209#define reg_gio_rw_intr_cfg___intr2___width 3
210#define reg_gio_rw_intr_cfg___intr3___lsb 9
211#define reg_gio_rw_intr_cfg___intr3___width 3
212#define reg_gio_rw_intr_cfg___intr4___lsb 12
213#define reg_gio_rw_intr_cfg___intr4___width 3
214#define reg_gio_rw_intr_cfg___intr5___lsb 15
215#define reg_gio_rw_intr_cfg___intr5___width 3
216#define reg_gio_rw_intr_cfg___intr6___lsb 18
217#define reg_gio_rw_intr_cfg___intr6___width 3
218#define reg_gio_rw_intr_cfg___intr7___lsb 21
219#define reg_gio_rw_intr_cfg___intr7___width 3
220#define reg_gio_rw_intr_cfg_offset 120
221
222/* Register rw_intr_pins, scope gio, type rw */
223#define reg_gio_rw_intr_pins___intr0___lsb 0
224#define reg_gio_rw_intr_pins___intr0___width 4
225#define reg_gio_rw_intr_pins___intr1___lsb 4
226#define reg_gio_rw_intr_pins___intr1___width 4
227#define reg_gio_rw_intr_pins___intr2___lsb 8
228#define reg_gio_rw_intr_pins___intr2___width 4
229#define reg_gio_rw_intr_pins___intr3___lsb 12
230#define reg_gio_rw_intr_pins___intr3___width 4
231#define reg_gio_rw_intr_pins___intr4___lsb 16
232#define reg_gio_rw_intr_pins___intr4___width 4
233#define reg_gio_rw_intr_pins___intr5___lsb 20
234#define reg_gio_rw_intr_pins___intr5___width 4
235#define reg_gio_rw_intr_pins___intr6___lsb 24
236#define reg_gio_rw_intr_pins___intr6___width 4
237#define reg_gio_rw_intr_pins___intr7___lsb 28
238#define reg_gio_rw_intr_pins___intr7___width 4
239#define reg_gio_rw_intr_pins_offset 124
240
241/* Register rw_intr_mask, scope gio, type rw */
242#define reg_gio_rw_intr_mask___intr0___lsb 0
243#define reg_gio_rw_intr_mask___intr0___width 1
244#define reg_gio_rw_intr_mask___intr0___bit 0
245#define reg_gio_rw_intr_mask___intr1___lsb 1
246#define reg_gio_rw_intr_mask___intr1___width 1
247#define reg_gio_rw_intr_mask___intr1___bit 1
248#define reg_gio_rw_intr_mask___intr2___lsb 2
249#define reg_gio_rw_intr_mask___intr2___width 1
250#define reg_gio_rw_intr_mask___intr2___bit 2
251#define reg_gio_rw_intr_mask___intr3___lsb 3
252#define reg_gio_rw_intr_mask___intr3___width 1
253#define reg_gio_rw_intr_mask___intr3___bit 3
254#define reg_gio_rw_intr_mask___intr4___lsb 4
255#define reg_gio_rw_intr_mask___intr4___width 1
256#define reg_gio_rw_intr_mask___intr4___bit 4
257#define reg_gio_rw_intr_mask___intr5___lsb 5
258#define reg_gio_rw_intr_mask___intr5___width 1
259#define reg_gio_rw_intr_mask___intr5___bit 5
260#define reg_gio_rw_intr_mask___intr6___lsb 6
261#define reg_gio_rw_intr_mask___intr6___width 1
262#define reg_gio_rw_intr_mask___intr6___bit 6
263#define reg_gio_rw_intr_mask___intr7___lsb 7
264#define reg_gio_rw_intr_mask___intr7___width 1
265#define reg_gio_rw_intr_mask___intr7___bit 7
266#define reg_gio_rw_intr_mask___i2c0_done___lsb 8
267#define reg_gio_rw_intr_mask___i2c0_done___width 1
268#define reg_gio_rw_intr_mask___i2c0_done___bit 8
269#define reg_gio_rw_intr_mask___i2c1_done___lsb 9
270#define reg_gio_rw_intr_mask___i2c1_done___width 1
271#define reg_gio_rw_intr_mask___i2c1_done___bit 9
272#define reg_gio_rw_intr_mask_offset 128
273
274/* Register rw_ack_intr, scope gio, type rw */
275#define reg_gio_rw_ack_intr___intr0___lsb 0
276#define reg_gio_rw_ack_intr___intr0___width 1
277#define reg_gio_rw_ack_intr___intr0___bit 0
278#define reg_gio_rw_ack_intr___intr1___lsb 1
279#define reg_gio_rw_ack_intr___intr1___width 1
280#define reg_gio_rw_ack_intr___intr1___bit 1
281#define reg_gio_rw_ack_intr___intr2___lsb 2
282#define reg_gio_rw_ack_intr___intr2___width 1
283#define reg_gio_rw_ack_intr___intr2___bit 2
284#define reg_gio_rw_ack_intr___intr3___lsb 3
285#define reg_gio_rw_ack_intr___intr3___width 1
286#define reg_gio_rw_ack_intr___intr3___bit 3
287#define reg_gio_rw_ack_intr___intr4___lsb 4
288#define reg_gio_rw_ack_intr___intr4___width 1
289#define reg_gio_rw_ack_intr___intr4___bit 4
290#define reg_gio_rw_ack_intr___intr5___lsb 5
291#define reg_gio_rw_ack_intr___intr5___width 1
292#define reg_gio_rw_ack_intr___intr5___bit 5
293#define reg_gio_rw_ack_intr___intr6___lsb 6
294#define reg_gio_rw_ack_intr___intr6___width 1
295#define reg_gio_rw_ack_intr___intr6___bit 6
296#define reg_gio_rw_ack_intr___intr7___lsb 7
297#define reg_gio_rw_ack_intr___intr7___width 1
298#define reg_gio_rw_ack_intr___intr7___bit 7
299#define reg_gio_rw_ack_intr___i2c0_done___lsb 8
300#define reg_gio_rw_ack_intr___i2c0_done___width 1
301#define reg_gio_rw_ack_intr___i2c0_done___bit 8
302#define reg_gio_rw_ack_intr___i2c1_done___lsb 9
303#define reg_gio_rw_ack_intr___i2c1_done___width 1
304#define reg_gio_rw_ack_intr___i2c1_done___bit 9
305#define reg_gio_rw_ack_intr_offset 132
306
307/* Register r_intr, scope gio, type r */
308#define reg_gio_r_intr___intr0___lsb 0
309#define reg_gio_r_intr___intr0___width 1
310#define reg_gio_r_intr___intr0___bit 0
311#define reg_gio_r_intr___intr1___lsb 1
312#define reg_gio_r_intr___intr1___width 1
313#define reg_gio_r_intr___intr1___bit 1
314#define reg_gio_r_intr___intr2___lsb 2
315#define reg_gio_r_intr___intr2___width 1
316#define reg_gio_r_intr___intr2___bit 2
317#define reg_gio_r_intr___intr3___lsb 3
318#define reg_gio_r_intr___intr3___width 1
319#define reg_gio_r_intr___intr3___bit 3
320#define reg_gio_r_intr___intr4___lsb 4
321#define reg_gio_r_intr___intr4___width 1
322#define reg_gio_r_intr___intr4___bit 4
323#define reg_gio_r_intr___intr5___lsb 5
324#define reg_gio_r_intr___intr5___width 1
325#define reg_gio_r_intr___intr5___bit 5
326#define reg_gio_r_intr___intr6___lsb 6
327#define reg_gio_r_intr___intr6___width 1
328#define reg_gio_r_intr___intr6___bit 6
329#define reg_gio_r_intr___intr7___lsb 7
330#define reg_gio_r_intr___intr7___width 1
331#define reg_gio_r_intr___intr7___bit 7
332#define reg_gio_r_intr___i2c0_done___lsb 8
333#define reg_gio_r_intr___i2c0_done___width 1
334#define reg_gio_r_intr___i2c0_done___bit 8
335#define reg_gio_r_intr___i2c1_done___lsb 9
336#define reg_gio_r_intr___i2c1_done___width 1
337#define reg_gio_r_intr___i2c1_done___bit 9
338#define reg_gio_r_intr_offset 136
339
340/* Register r_masked_intr, scope gio, type r */
341#define reg_gio_r_masked_intr___intr0___lsb 0
342#define reg_gio_r_masked_intr___intr0___width 1
343#define reg_gio_r_masked_intr___intr0___bit 0
344#define reg_gio_r_masked_intr___intr1___lsb 1
345#define reg_gio_r_masked_intr___intr1___width 1
346#define reg_gio_r_masked_intr___intr1___bit 1
347#define reg_gio_r_masked_intr___intr2___lsb 2
348#define reg_gio_r_masked_intr___intr2___width 1
349#define reg_gio_r_masked_intr___intr2___bit 2
350#define reg_gio_r_masked_intr___intr3___lsb 3
351#define reg_gio_r_masked_intr___intr3___width 1
352#define reg_gio_r_masked_intr___intr3___bit 3
353#define reg_gio_r_masked_intr___intr4___lsb 4
354#define reg_gio_r_masked_intr___intr4___width 1
355#define reg_gio_r_masked_intr___intr4___bit 4
356#define reg_gio_r_masked_intr___intr5___lsb 5
357#define reg_gio_r_masked_intr___intr5___width 1
358#define reg_gio_r_masked_intr___intr5___bit 5
359#define reg_gio_r_masked_intr___intr6___lsb 6
360#define reg_gio_r_masked_intr___intr6___width 1
361#define reg_gio_r_masked_intr___intr6___bit 6
362#define reg_gio_r_masked_intr___intr7___lsb 7
363#define reg_gio_r_masked_intr___intr7___width 1
364#define reg_gio_r_masked_intr___intr7___bit 7
365#define reg_gio_r_masked_intr___i2c0_done___lsb 8
366#define reg_gio_r_masked_intr___i2c0_done___width 1
367#define reg_gio_r_masked_intr___i2c0_done___bit 8
368#define reg_gio_r_masked_intr___i2c1_done___lsb 9
369#define reg_gio_r_masked_intr___i2c1_done___width 1
370#define reg_gio_r_masked_intr___i2c1_done___bit 9
371#define reg_gio_r_masked_intr_offset 140
372
373/* Register rw_i2c0_start, scope gio, type rw */
374#define reg_gio_rw_i2c0_start___run___lsb 0
375#define reg_gio_rw_i2c0_start___run___width 1
376#define reg_gio_rw_i2c0_start___run___bit 0
377#define reg_gio_rw_i2c0_start_offset 144
378
379/* Register rw_i2c0_cfg, scope gio, type rw */
380#define reg_gio_rw_i2c0_cfg___en___lsb 0
381#define reg_gio_rw_i2c0_cfg___en___width 1
382#define reg_gio_rw_i2c0_cfg___en___bit 0
383#define reg_gio_rw_i2c0_cfg___bit_order___lsb 1
384#define reg_gio_rw_i2c0_cfg___bit_order___width 1
385#define reg_gio_rw_i2c0_cfg___bit_order___bit 1
386#define reg_gio_rw_i2c0_cfg___scl_io___lsb 2
387#define reg_gio_rw_i2c0_cfg___scl_io___width 1
388#define reg_gio_rw_i2c0_cfg___scl_io___bit 2
389#define reg_gio_rw_i2c0_cfg___scl_inv___lsb 3
390#define reg_gio_rw_i2c0_cfg___scl_inv___width 1
391#define reg_gio_rw_i2c0_cfg___scl_inv___bit 3
392#define reg_gio_rw_i2c0_cfg___sda_io___lsb 4
393#define reg_gio_rw_i2c0_cfg___sda_io___width 1
394#define reg_gio_rw_i2c0_cfg___sda_io___bit 4
395#define reg_gio_rw_i2c0_cfg___sda_idle___lsb 5
396#define reg_gio_rw_i2c0_cfg___sda_idle___width 1
397#define reg_gio_rw_i2c0_cfg___sda_idle___bit 5
398#define reg_gio_rw_i2c0_cfg_offset 148
399
400/* Register rw_i2c0_ctrl, scope gio, type rw */
401#define reg_gio_rw_i2c0_ctrl___trf_bits___lsb 0
402#define reg_gio_rw_i2c0_ctrl___trf_bits___width 6
403#define reg_gio_rw_i2c0_ctrl___switch_dir___lsb 6
404#define reg_gio_rw_i2c0_ctrl___switch_dir___width 6
405#define reg_gio_rw_i2c0_ctrl___extra_start___lsb 12
406#define reg_gio_rw_i2c0_ctrl___extra_start___width 3
407#define reg_gio_rw_i2c0_ctrl___early_end___lsb 15
408#define reg_gio_rw_i2c0_ctrl___early_end___width 1
409#define reg_gio_rw_i2c0_ctrl___early_end___bit 15
410#define reg_gio_rw_i2c0_ctrl___start_stop___lsb 16
411#define reg_gio_rw_i2c0_ctrl___start_stop___width 1
412#define reg_gio_rw_i2c0_ctrl___start_stop___bit 16
413#define reg_gio_rw_i2c0_ctrl___ack_dir0___lsb 17
414#define reg_gio_rw_i2c0_ctrl___ack_dir0___width 1
415#define reg_gio_rw_i2c0_ctrl___ack_dir0___bit 17
416#define reg_gio_rw_i2c0_ctrl___ack_dir1___lsb 18
417#define reg_gio_rw_i2c0_ctrl___ack_dir1___width 1
418#define reg_gio_rw_i2c0_ctrl___ack_dir1___bit 18
419#define reg_gio_rw_i2c0_ctrl___ack_dir2___lsb 19
420#define reg_gio_rw_i2c0_ctrl___ack_dir2___width 1
421#define reg_gio_rw_i2c0_ctrl___ack_dir2___bit 19
422#define reg_gio_rw_i2c0_ctrl___ack_dir3___lsb 20
423#define reg_gio_rw_i2c0_ctrl___ack_dir3___width 1
424#define reg_gio_rw_i2c0_ctrl___ack_dir3___bit 20
425#define reg_gio_rw_i2c0_ctrl___ack_dir4___lsb 21
426#define reg_gio_rw_i2c0_ctrl___ack_dir4___width 1
427#define reg_gio_rw_i2c0_ctrl___ack_dir4___bit 21
428#define reg_gio_rw_i2c0_ctrl___ack_dir5___lsb 22
429#define reg_gio_rw_i2c0_ctrl___ack_dir5___width 1
430#define reg_gio_rw_i2c0_ctrl___ack_dir5___bit 22
431#define reg_gio_rw_i2c0_ctrl___ack_bit___lsb 23
432#define reg_gio_rw_i2c0_ctrl___ack_bit___width 1
433#define reg_gio_rw_i2c0_ctrl___ack_bit___bit 23
434#define reg_gio_rw_i2c0_ctrl___start_bit___lsb 24
435#define reg_gio_rw_i2c0_ctrl___start_bit___width 1
436#define reg_gio_rw_i2c0_ctrl___start_bit___bit 24
437#define reg_gio_rw_i2c0_ctrl___freq___lsb 25
438#define reg_gio_rw_i2c0_ctrl___freq___width 2
439#define reg_gio_rw_i2c0_ctrl_offset 152
440
441/* Register rw_i2c0_data, scope gio, type rw */
442#define reg_gio_rw_i2c0_data___data0___lsb 0
443#define reg_gio_rw_i2c0_data___data0___width 8
444#define reg_gio_rw_i2c0_data___data1___lsb 8
445#define reg_gio_rw_i2c0_data___data1___width 8
446#define reg_gio_rw_i2c0_data___data2___lsb 16
447#define reg_gio_rw_i2c0_data___data2___width 8
448#define reg_gio_rw_i2c0_data___data3___lsb 24
449#define reg_gio_rw_i2c0_data___data3___width 8
450#define reg_gio_rw_i2c0_data_offset 156
451
452/* Register rw_i2c0_data2, scope gio, type rw */
453#define reg_gio_rw_i2c0_data2___data4___lsb 0
454#define reg_gio_rw_i2c0_data2___data4___width 8
455#define reg_gio_rw_i2c0_data2___data5___lsb 8
456#define reg_gio_rw_i2c0_data2___data5___width 8
457#define reg_gio_rw_i2c0_data2___start_val___lsb 16
458#define reg_gio_rw_i2c0_data2___start_val___width 6
459#define reg_gio_rw_i2c0_data2___ack_val___lsb 22
460#define reg_gio_rw_i2c0_data2___ack_val___width 6
461#define reg_gio_rw_i2c0_data2_offset 160
462
463/* Register rw_i2c1_start, scope gio, type rw */
464#define reg_gio_rw_i2c1_start___run___lsb 0
465#define reg_gio_rw_i2c1_start___run___width 1
466#define reg_gio_rw_i2c1_start___run___bit 0
467#define reg_gio_rw_i2c1_start_offset 164
468
469/* Register rw_i2c1_cfg, scope gio, type rw */
470#define reg_gio_rw_i2c1_cfg___en___lsb 0
471#define reg_gio_rw_i2c1_cfg___en___width 1
472#define reg_gio_rw_i2c1_cfg___en___bit 0
473#define reg_gio_rw_i2c1_cfg___bit_order___lsb 1
474#define reg_gio_rw_i2c1_cfg___bit_order___width 1
475#define reg_gio_rw_i2c1_cfg___bit_order___bit 1
476#define reg_gio_rw_i2c1_cfg___scl_io___lsb 2
477#define reg_gio_rw_i2c1_cfg___scl_io___width 1
478#define reg_gio_rw_i2c1_cfg___scl_io___bit 2
479#define reg_gio_rw_i2c1_cfg___scl_inv___lsb 3
480#define reg_gio_rw_i2c1_cfg___scl_inv___width 1
481#define reg_gio_rw_i2c1_cfg___scl_inv___bit 3
482#define reg_gio_rw_i2c1_cfg___sda0_io___lsb 4
483#define reg_gio_rw_i2c1_cfg___sda0_io___width 1
484#define reg_gio_rw_i2c1_cfg___sda0_io___bit 4
485#define reg_gio_rw_i2c1_cfg___sda0_idle___lsb 5
486#define reg_gio_rw_i2c1_cfg___sda0_idle___width 1
487#define reg_gio_rw_i2c1_cfg___sda0_idle___bit 5
488#define reg_gio_rw_i2c1_cfg___sda1_io___lsb 6
489#define reg_gio_rw_i2c1_cfg___sda1_io___width 1
490#define reg_gio_rw_i2c1_cfg___sda1_io___bit 6
491#define reg_gio_rw_i2c1_cfg___sda1_idle___lsb 7
492#define reg_gio_rw_i2c1_cfg___sda1_idle___width 1
493#define reg_gio_rw_i2c1_cfg___sda1_idle___bit 7
494#define reg_gio_rw_i2c1_cfg___sda2_io___lsb 8
495#define reg_gio_rw_i2c1_cfg___sda2_io___width 1
496#define reg_gio_rw_i2c1_cfg___sda2_io___bit 8
497#define reg_gio_rw_i2c1_cfg___sda2_idle___lsb 9
498#define reg_gio_rw_i2c1_cfg___sda2_idle___width 1
499#define reg_gio_rw_i2c1_cfg___sda2_idle___bit 9
500#define reg_gio_rw_i2c1_cfg___sda3_io___lsb 10
501#define reg_gio_rw_i2c1_cfg___sda3_io___width 1
502#define reg_gio_rw_i2c1_cfg___sda3_io___bit 10
503#define reg_gio_rw_i2c1_cfg___sda3_idle___lsb 11
504#define reg_gio_rw_i2c1_cfg___sda3_idle___width 1
505#define reg_gio_rw_i2c1_cfg___sda3_idle___bit 11
506#define reg_gio_rw_i2c1_cfg___sda_sel___lsb 12
507#define reg_gio_rw_i2c1_cfg___sda_sel___width 2
508#define reg_gio_rw_i2c1_cfg___sen_idle___lsb 14
509#define reg_gio_rw_i2c1_cfg___sen_idle___width 1
510#define reg_gio_rw_i2c1_cfg___sen_idle___bit 14
511#define reg_gio_rw_i2c1_cfg___sen_inv___lsb 15
512#define reg_gio_rw_i2c1_cfg___sen_inv___width 1
513#define reg_gio_rw_i2c1_cfg___sen_inv___bit 15
514#define reg_gio_rw_i2c1_cfg___sen_sel___lsb 16
515#define reg_gio_rw_i2c1_cfg___sen_sel___width 2
516#define reg_gio_rw_i2c1_cfg_offset 168
517
518/* Register rw_i2c1_ctrl, scope gio, type rw */
519#define reg_gio_rw_i2c1_ctrl___trf_bits___lsb 0
520#define reg_gio_rw_i2c1_ctrl___trf_bits___width 6
521#define reg_gio_rw_i2c1_ctrl___switch_dir___lsb 6
522#define reg_gio_rw_i2c1_ctrl___switch_dir___width 6
523#define reg_gio_rw_i2c1_ctrl___extra_start___lsb 12
524#define reg_gio_rw_i2c1_ctrl___extra_start___width 3
525#define reg_gio_rw_i2c1_ctrl___early_end___lsb 15
526#define reg_gio_rw_i2c1_ctrl___early_end___width 1
527#define reg_gio_rw_i2c1_ctrl___early_end___bit 15
528#define reg_gio_rw_i2c1_ctrl___start_stop___lsb 16
529#define reg_gio_rw_i2c1_ctrl___start_stop___width 1
530#define reg_gio_rw_i2c1_ctrl___start_stop___bit 16
531#define reg_gio_rw_i2c1_ctrl___ack_dir0___lsb 17
532#define reg_gio_rw_i2c1_ctrl___ack_dir0___width 1
533#define reg_gio_rw_i2c1_ctrl___ack_dir0___bit 17
534#define reg_gio_rw_i2c1_ctrl___ack_dir1___lsb 18
535#define reg_gio_rw_i2c1_ctrl___ack_dir1___width 1
536#define reg_gio_rw_i2c1_ctrl___ack_dir1___bit 18
537#define reg_gio_rw_i2c1_ctrl___ack_dir2___lsb 19
538#define reg_gio_rw_i2c1_ctrl___ack_dir2___width 1
539#define reg_gio_rw_i2c1_ctrl___ack_dir2___bit 19
540#define reg_gio_rw_i2c1_ctrl___ack_dir3___lsb 20
541#define reg_gio_rw_i2c1_ctrl___ack_dir3___width 1
542#define reg_gio_rw_i2c1_ctrl___ack_dir3___bit 20
543#define reg_gio_rw_i2c1_ctrl___ack_dir4___lsb 21
544#define reg_gio_rw_i2c1_ctrl___ack_dir4___width 1
545#define reg_gio_rw_i2c1_ctrl___ack_dir4___bit 21
546#define reg_gio_rw_i2c1_ctrl___ack_dir5___lsb 22
547#define reg_gio_rw_i2c1_ctrl___ack_dir5___width 1
548#define reg_gio_rw_i2c1_ctrl___ack_dir5___bit 22
549#define reg_gio_rw_i2c1_ctrl___ack_bit___lsb 23
550#define reg_gio_rw_i2c1_ctrl___ack_bit___width 1
551#define reg_gio_rw_i2c1_ctrl___ack_bit___bit 23
552#define reg_gio_rw_i2c1_ctrl___start_bit___lsb 24
553#define reg_gio_rw_i2c1_ctrl___start_bit___width 1
554#define reg_gio_rw_i2c1_ctrl___start_bit___bit 24
555#define reg_gio_rw_i2c1_ctrl___freq___lsb 25
556#define reg_gio_rw_i2c1_ctrl___freq___width 2
557#define reg_gio_rw_i2c1_ctrl_offset 172
558
559/* Register rw_i2c1_data, scope gio, type rw */
560#define reg_gio_rw_i2c1_data___data0___lsb 0
561#define reg_gio_rw_i2c1_data___data0___width 8
562#define reg_gio_rw_i2c1_data___data1___lsb 8
563#define reg_gio_rw_i2c1_data___data1___width 8
564#define reg_gio_rw_i2c1_data___data2___lsb 16
565#define reg_gio_rw_i2c1_data___data2___width 8
566#define reg_gio_rw_i2c1_data___data3___lsb 24
567#define reg_gio_rw_i2c1_data___data3___width 8
568#define reg_gio_rw_i2c1_data_offset 176
569
570/* Register rw_i2c1_data2, scope gio, type rw */
571#define reg_gio_rw_i2c1_data2___data4___lsb 0
572#define reg_gio_rw_i2c1_data2___data4___width 8
573#define reg_gio_rw_i2c1_data2___data5___lsb 8
574#define reg_gio_rw_i2c1_data2___data5___width 8
575#define reg_gio_rw_i2c1_data2___start_val___lsb 16
576#define reg_gio_rw_i2c1_data2___start_val___width 6
577#define reg_gio_rw_i2c1_data2___ack_val___lsb 22
578#define reg_gio_rw_i2c1_data2___ack_val___width 6
579#define reg_gio_rw_i2c1_data2_offset 180
580
581/* Register r_ppwm_stat, scope gio, type r */
582#define reg_gio_r_ppwm_stat___freq___lsb 0
583#define reg_gio_r_ppwm_stat___freq___width 2
584#define reg_gio_r_ppwm_stat_offset 184
585
586/* Register rw_ppwm_data, scope gio, type rw */
587#define reg_gio_rw_ppwm_data___data___lsb 0
588#define reg_gio_rw_ppwm_data___data___width 8
589#define reg_gio_rw_ppwm_data_offset 188
590
591/* Register rw_pwm0_ctrl, scope gio, type rw */
592#define reg_gio_rw_pwm0_ctrl___mode___lsb 0
593#define reg_gio_rw_pwm0_ctrl___mode___width 2
594#define reg_gio_rw_pwm0_ctrl___ccd_override___lsb 2
595#define reg_gio_rw_pwm0_ctrl___ccd_override___width 1
596#define reg_gio_rw_pwm0_ctrl___ccd_override___bit 2
597#define reg_gio_rw_pwm0_ctrl___ccd_val___lsb 3
598#define reg_gio_rw_pwm0_ctrl___ccd_val___width 1
599#define reg_gio_rw_pwm0_ctrl___ccd_val___bit 3
600#define reg_gio_rw_pwm0_ctrl_offset 192
601
602/* Register rw_pwm0_var, scope gio, type rw */
603#define reg_gio_rw_pwm0_var___lo___lsb 0
604#define reg_gio_rw_pwm0_var___lo___width 13
605#define reg_gio_rw_pwm0_var___hi___lsb 13
606#define reg_gio_rw_pwm0_var___hi___width 13
607#define reg_gio_rw_pwm0_var_offset 196
608
609/* Register rw_pwm0_data, scope gio, type rw */
610#define reg_gio_rw_pwm0_data___data___lsb 0
611#define reg_gio_rw_pwm0_data___data___width 8
612#define reg_gio_rw_pwm0_data_offset 200
613
614/* Register rw_pwm1_ctrl, scope gio, type rw */
615#define reg_gio_rw_pwm1_ctrl___mode___lsb 0
616#define reg_gio_rw_pwm1_ctrl___mode___width 2
617#define reg_gio_rw_pwm1_ctrl___ccd_override___lsb 2
618#define reg_gio_rw_pwm1_ctrl___ccd_override___width 1
619#define reg_gio_rw_pwm1_ctrl___ccd_override___bit 2
620#define reg_gio_rw_pwm1_ctrl___ccd_val___lsb 3
621#define reg_gio_rw_pwm1_ctrl___ccd_val___width 1
622#define reg_gio_rw_pwm1_ctrl___ccd_val___bit 3
623#define reg_gio_rw_pwm1_ctrl_offset 204
624
625/* Register rw_pwm1_var, scope gio, type rw */
626#define reg_gio_rw_pwm1_var___lo___lsb 0
627#define reg_gio_rw_pwm1_var___lo___width 13
628#define reg_gio_rw_pwm1_var___hi___lsb 13
629#define reg_gio_rw_pwm1_var___hi___width 13
630#define reg_gio_rw_pwm1_var_offset 208
631
632/* Register rw_pwm1_data, scope gio, type rw */
633#define reg_gio_rw_pwm1_data___data___lsb 0
634#define reg_gio_rw_pwm1_data___data___width 8
635#define reg_gio_rw_pwm1_data_offset 212
636
637/* Register rw_pwm2_ctrl, scope gio, type rw */
638#define reg_gio_rw_pwm2_ctrl___mode___lsb 0
639#define reg_gio_rw_pwm2_ctrl___mode___width 2
640#define reg_gio_rw_pwm2_ctrl___ccd_override___lsb 2
641#define reg_gio_rw_pwm2_ctrl___ccd_override___width 1
642#define reg_gio_rw_pwm2_ctrl___ccd_override___bit 2
643#define reg_gio_rw_pwm2_ctrl___ccd_val___lsb 3
644#define reg_gio_rw_pwm2_ctrl___ccd_val___width 1
645#define reg_gio_rw_pwm2_ctrl___ccd_val___bit 3
646#define reg_gio_rw_pwm2_ctrl_offset 216
647
648/* Register rw_pwm2_var, scope gio, type rw */
649#define reg_gio_rw_pwm2_var___lo___lsb 0
650#define reg_gio_rw_pwm2_var___lo___width 13
651#define reg_gio_rw_pwm2_var___hi___lsb 13
652#define reg_gio_rw_pwm2_var___hi___width 13
653#define reg_gio_rw_pwm2_var_offset 220
654
655/* Register rw_pwm2_data, scope gio, type rw */
656#define reg_gio_rw_pwm2_data___data___lsb 0
657#define reg_gio_rw_pwm2_data___data___width 8
658#define reg_gio_rw_pwm2_data_offset 224
659
660/* Register rw_pwm_in_cfg, scope gio, type rw */
661#define reg_gio_rw_pwm_in_cfg___pin___lsb 0
662#define reg_gio_rw_pwm_in_cfg___pin___width 3
663#define reg_gio_rw_pwm_in_cfg_offset 228
664
665/* Register r_pwm_in_lo, scope gio, type r */
666#define reg_gio_r_pwm_in_lo___data___lsb 0
667#define reg_gio_r_pwm_in_lo___data___width 32
668#define reg_gio_r_pwm_in_lo_offset 232
669
670/* Register r_pwm_in_hi, scope gio, type r */
671#define reg_gio_r_pwm_in_hi___data___lsb 0
672#define reg_gio_r_pwm_in_hi___data___width 32
673#define reg_gio_r_pwm_in_hi_offset 236
674
675/* Register r_pwm_in_cnt, scope gio, type r */
676#define reg_gio_r_pwm_in_cnt___data___lsb 0
677#define reg_gio_r_pwm_in_cnt___data___width 32
678#define reg_gio_r_pwm_in_cnt_offset 240
679
680
681/* Constants */
682#define regk_gio_anyedge 0x00000007
683#define regk_gio_f100k 0x00000000
684#define regk_gio_f1562 0x00000000
685#define regk_gio_f195 0x00000003
686#define regk_gio_f1m 0x00000002
687#define regk_gio_f390 0x00000002
688#define regk_gio_f400k 0x00000001
689#define regk_gio_f5m 0x00000003
690#define regk_gio_f781 0x00000001
691#define regk_gio_hi 0x00000001
692#define regk_gio_in 0x00000000
693#define regk_gio_intr_pa0 0x00000000
694#define regk_gio_intr_pa1 0x00000000
695#define regk_gio_intr_pa10 0x00000001
696#define regk_gio_intr_pa11 0x00000001
697#define regk_gio_intr_pa12 0x00000001
698#define regk_gio_intr_pa13 0x00000001
699#define regk_gio_intr_pa14 0x00000001
700#define regk_gio_intr_pa15 0x00000001
701#define regk_gio_intr_pa16 0x00000002
702#define regk_gio_intr_pa17 0x00000002
703#define regk_gio_intr_pa18 0x00000002
704#define regk_gio_intr_pa19 0x00000002
705#define regk_gio_intr_pa2 0x00000000
706#define regk_gio_intr_pa20 0x00000002
707#define regk_gio_intr_pa21 0x00000002
708#define regk_gio_intr_pa22 0x00000002
709#define regk_gio_intr_pa23 0x00000002
710#define regk_gio_intr_pa24 0x00000003
711#define regk_gio_intr_pa25 0x00000003
712#define regk_gio_intr_pa26 0x00000003
713#define regk_gio_intr_pa27 0x00000003
714#define regk_gio_intr_pa28 0x00000003
715#define regk_gio_intr_pa29 0x00000003
716#define regk_gio_intr_pa3 0x00000000
717#define regk_gio_intr_pa30 0x00000003
718#define regk_gio_intr_pa31 0x00000003
719#define regk_gio_intr_pa4 0x00000000
720#define regk_gio_intr_pa5 0x00000000
721#define regk_gio_intr_pa6 0x00000000
722#define regk_gio_intr_pa7 0x00000000
723#define regk_gio_intr_pa8 0x00000001
724#define regk_gio_intr_pa9 0x00000001
725#define regk_gio_intr_pb0 0x00000004
726#define regk_gio_intr_pb1 0x00000004
727#define regk_gio_intr_pb10 0x00000005
728#define regk_gio_intr_pb11 0x00000005
729#define regk_gio_intr_pb12 0x00000005
730#define regk_gio_intr_pb13 0x00000005
731#define regk_gio_intr_pb14 0x00000005
732#define regk_gio_intr_pb15 0x00000005
733#define regk_gio_intr_pb16 0x00000006
734#define regk_gio_intr_pb17 0x00000006
735#define regk_gio_intr_pb18 0x00000006
736#define regk_gio_intr_pb19 0x00000006
737#define regk_gio_intr_pb2 0x00000004
738#define regk_gio_intr_pb20 0x00000006
739#define regk_gio_intr_pb21 0x00000006
740#define regk_gio_intr_pb22 0x00000006
741#define regk_gio_intr_pb23 0x00000006
742#define regk_gio_intr_pb24 0x00000007
743#define regk_gio_intr_pb25 0x00000007
744#define regk_gio_intr_pb26 0x00000007
745#define regk_gio_intr_pb27 0x00000007
746#define regk_gio_intr_pb28 0x00000007
747#define regk_gio_intr_pb29 0x00000007
748#define regk_gio_intr_pb3 0x00000004
749#define regk_gio_intr_pb30 0x00000007
750#define regk_gio_intr_pb31 0x00000007
751#define regk_gio_intr_pb4 0x00000004
752#define regk_gio_intr_pb5 0x00000004
753#define regk_gio_intr_pb6 0x00000004
754#define regk_gio_intr_pb7 0x00000004
755#define regk_gio_intr_pb8 0x00000005
756#define regk_gio_intr_pb9 0x00000005
757#define regk_gio_intr_pc0 0x00000008
758#define regk_gio_intr_pc1 0x00000008
759#define regk_gio_intr_pc10 0x00000009
760#define regk_gio_intr_pc11 0x00000009
761#define regk_gio_intr_pc12 0x00000009
762#define regk_gio_intr_pc13 0x00000009
763#define regk_gio_intr_pc14 0x00000009
764#define regk_gio_intr_pc15 0x00000009
765#define regk_gio_intr_pc2 0x00000008
766#define regk_gio_intr_pc3 0x00000008
767#define regk_gio_intr_pc4 0x00000008
768#define regk_gio_intr_pc5 0x00000008
769#define regk_gio_intr_pc6 0x00000008
770#define regk_gio_intr_pc7 0x00000008
771#define regk_gio_intr_pc8 0x00000009
772#define regk_gio_intr_pc9 0x00000009
773#define regk_gio_intr_pd0 0x0000000c
774#define regk_gio_intr_pd1 0x0000000c
775#define regk_gio_intr_pd10 0x0000000d
776#define regk_gio_intr_pd11 0x0000000d
777#define regk_gio_intr_pd12 0x0000000d
778#define regk_gio_intr_pd13 0x0000000d
779#define regk_gio_intr_pd14 0x0000000d
780#define regk_gio_intr_pd15 0x0000000d
781#define regk_gio_intr_pd16 0x0000000e
782#define regk_gio_intr_pd17 0x0000000e
783#define regk_gio_intr_pd18 0x0000000e
784#define regk_gio_intr_pd19 0x0000000e
785#define regk_gio_intr_pd2 0x0000000c
786#define regk_gio_intr_pd20 0x0000000e
787#define regk_gio_intr_pd21 0x0000000e
788#define regk_gio_intr_pd22 0x0000000e
789#define regk_gio_intr_pd23 0x0000000e
790#define regk_gio_intr_pd24 0x0000000f
791#define regk_gio_intr_pd25 0x0000000f
792#define regk_gio_intr_pd26 0x0000000f
793#define regk_gio_intr_pd27 0x0000000f
794#define regk_gio_intr_pd28 0x0000000f
795#define regk_gio_intr_pd29 0x0000000f
796#define regk_gio_intr_pd3 0x0000000c
797#define regk_gio_intr_pd30 0x0000000f
798#define regk_gio_intr_pd31 0x0000000f
799#define regk_gio_intr_pd4 0x0000000c
800#define regk_gio_intr_pd5 0x0000000c
801#define regk_gio_intr_pd6 0x0000000c
802#define regk_gio_intr_pd7 0x0000000c
803#define regk_gio_intr_pd8 0x0000000d
804#define regk_gio_intr_pd9 0x0000000d
805#define regk_gio_lo 0x00000002
806#define regk_gio_lsb 0x00000000
807#define regk_gio_msb 0x00000001
808#define regk_gio_negedge 0x00000006
809#define regk_gio_no 0x00000000
810#define regk_gio_no_switch 0x0000003f
811#define regk_gio_none 0x00000007
812#define regk_gio_off 0x00000000
813#define regk_gio_opendrain 0x00000000
814#define regk_gio_out 0x00000001
815#define regk_gio_posedge 0x00000005
816#define regk_gio_pwm_hfp 0x00000002
817#define regk_gio_pwm_pa0 0x00000001
818#define regk_gio_pwm_pa19 0x00000004
819#define regk_gio_pwm_pa6 0x00000002
820#define regk_gio_pwm_pa7 0x00000003
821#define regk_gio_pwm_pb26 0x00000005
822#define regk_gio_pwm_pd23 0x00000006
823#define regk_gio_pwm_pd31 0x00000007
824#define regk_gio_pwm_std 0x00000001
825#define regk_gio_pwm_var 0x00000003
826#define regk_gio_rw_i2c0_cfg_default 0x00000020
827#define regk_gio_rw_i2c0_ctrl_default 0x00010000
828#define regk_gio_rw_i2c0_start_default 0x00000000
829#define regk_gio_rw_i2c1_cfg_default 0x00000aa0
830#define regk_gio_rw_i2c1_ctrl_default 0x00010000
831#define regk_gio_rw_i2c1_start_default 0x00000000
832#define regk_gio_rw_intr_cfg_default 0x00000000
833#define regk_gio_rw_intr_mask_default 0x00000000
834#define regk_gio_rw_pa_oe_default 0x00000000
835#define regk_gio_rw_pb_oe_default 0x00000000
836#define regk_gio_rw_pc_oe_default 0x00000000
837#define regk_gio_rw_ppwm_data_default 0x00000000
838#define regk_gio_rw_pwm0_ctrl_default 0x00000000
839#define regk_gio_rw_pwm1_ctrl_default 0x00000000
840#define regk_gio_rw_pwm2_ctrl_default 0x00000000
841#define regk_gio_rw_pwm_in_cfg_default 0x00000000
842#define regk_gio_sda0 0x00000000
843#define regk_gio_sda1 0x00000001
844#define regk_gio_sda2 0x00000002
845#define regk_gio_sda3 0x00000003
846#define regk_gio_sen 0x00000000
847#define regk_gio_set 0x00000003
848#define regk_gio_yes 0x00000001
849#endif /* __gio_defs_asm_h */
diff --git a/include/asm-cris/arch-v32/mach-a3/hwregs/asm/pinmux_defs_asm.h b/include/asm-cris/arch-v32/mach-a3/hwregs/asm/pinmux_defs_asm.h
new file mode 100644
index 000000000000..c3dc9c666c46
--- /dev/null
+++ b/include/asm-cris/arch-v32/mach-a3/hwregs/asm/pinmux_defs_asm.h
@@ -0,0 +1,572 @@
1#ifndef __pinmux_defs_asm_h
2#define __pinmux_defs_asm_h
3
4/*
5 * This file is autogenerated from
6 * file: pinmux.r
7 *
8 * by ../../../tools/rdesc/bin/rdes2c -asm -outfile pinmux_defs_asm.h pinmux.r
9 * Any changes here will be lost.
10 *
11 * -*- buffer-read-only: t -*-
12 */
13
14#ifndef REG_FIELD
15#define REG_FIELD( scope, reg, field, value ) \
16 REG_FIELD_X_( value, reg_##scope##_##reg##___##field##___lsb )
17#define REG_FIELD_X_( value, shift ) ((value) << shift)
18#endif
19
20#ifndef REG_STATE
21#define REG_STATE( scope, reg, field, symbolic_value ) \
22 REG_STATE_X_( regk_##scope##_##symbolic_value, reg_##scope##_##reg##___##field##___lsb )
23#define REG_STATE_X_( k, shift ) (k << shift)
24#endif
25
26#ifndef REG_MASK
27#define REG_MASK( scope, reg, field ) \
28 REG_MASK_X_( reg_##scope##_##reg##___##field##___width, reg_##scope##_##reg##___##field##___lsb )
29#define REG_MASK_X_( width, lsb ) (((1 << width)-1) << lsb)
30#endif
31
32#ifndef REG_LSB
33#define REG_LSB( scope, reg, field ) reg_##scope##_##reg##___##field##___lsb
34#endif
35
36#ifndef REG_BIT
37#define REG_BIT( scope, reg, field ) reg_##scope##_##reg##___##field##___bit
38#endif
39
40#ifndef REG_ADDR
41#define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset)
42#define REG_ADDR_X_( inst, offs ) ((inst) + offs)
43#endif
44
45#ifndef REG_ADDR_VECT
46#define REG_ADDR_VECT( scope, inst, reg, index ) \
47 REG_ADDR_VECT_X_(inst, reg_##scope##_##reg##_offset, index, \
48 STRIDE_##scope##_##reg )
49#define REG_ADDR_VECT_X_( inst, offs, index, stride ) \
50 ((inst) + offs + (index) * stride)
51#endif
52
53/* Register rw_hwprot, scope pinmux, type rw */
54#define reg_pinmux_rw_hwprot___eth___lsb 0
55#define reg_pinmux_rw_hwprot___eth___width 1
56#define reg_pinmux_rw_hwprot___eth___bit 0
57#define reg_pinmux_rw_hwprot___eth_mdio___lsb 1
58#define reg_pinmux_rw_hwprot___eth_mdio___width 1
59#define reg_pinmux_rw_hwprot___eth_mdio___bit 1
60#define reg_pinmux_rw_hwprot___geth___lsb 2
61#define reg_pinmux_rw_hwprot___geth___width 1
62#define reg_pinmux_rw_hwprot___geth___bit 2
63#define reg_pinmux_rw_hwprot___tg___lsb 3
64#define reg_pinmux_rw_hwprot___tg___width 1
65#define reg_pinmux_rw_hwprot___tg___bit 3
66#define reg_pinmux_rw_hwprot___tg_clk___lsb 4
67#define reg_pinmux_rw_hwprot___tg_clk___width 1
68#define reg_pinmux_rw_hwprot___tg_clk___bit 4
69#define reg_pinmux_rw_hwprot___vout___lsb 5
70#define reg_pinmux_rw_hwprot___vout___width 1
71#define reg_pinmux_rw_hwprot___vout___bit 5
72#define reg_pinmux_rw_hwprot___vout_sync___lsb 6
73#define reg_pinmux_rw_hwprot___vout_sync___width 1
74#define reg_pinmux_rw_hwprot___vout_sync___bit 6
75#define reg_pinmux_rw_hwprot___ser1___lsb 7
76#define reg_pinmux_rw_hwprot___ser1___width 1
77#define reg_pinmux_rw_hwprot___ser1___bit 7
78#define reg_pinmux_rw_hwprot___ser2___lsb 8
79#define reg_pinmux_rw_hwprot___ser2___width 1
80#define reg_pinmux_rw_hwprot___ser2___bit 8
81#define reg_pinmux_rw_hwprot___ser3___lsb 9
82#define reg_pinmux_rw_hwprot___ser3___width 1
83#define reg_pinmux_rw_hwprot___ser3___bit 9
84#define reg_pinmux_rw_hwprot___ser4___lsb 10
85#define reg_pinmux_rw_hwprot___ser4___width 1
86#define reg_pinmux_rw_hwprot___ser4___bit 10
87#define reg_pinmux_rw_hwprot___sser___lsb 11
88#define reg_pinmux_rw_hwprot___sser___width 1
89#define reg_pinmux_rw_hwprot___sser___bit 11
90#define reg_pinmux_rw_hwprot___pwm0___lsb 12
91#define reg_pinmux_rw_hwprot___pwm0___width 1
92#define reg_pinmux_rw_hwprot___pwm0___bit 12
93#define reg_pinmux_rw_hwprot___pwm1___lsb 13
94#define reg_pinmux_rw_hwprot___pwm1___width 1
95#define reg_pinmux_rw_hwprot___pwm1___bit 13
96#define reg_pinmux_rw_hwprot___pwm2___lsb 14
97#define reg_pinmux_rw_hwprot___pwm2___width 1
98#define reg_pinmux_rw_hwprot___pwm2___bit 14
99#define reg_pinmux_rw_hwprot___timer0___lsb 15
100#define reg_pinmux_rw_hwprot___timer0___width 1
101#define reg_pinmux_rw_hwprot___timer0___bit 15
102#define reg_pinmux_rw_hwprot___timer1___lsb 16
103#define reg_pinmux_rw_hwprot___timer1___width 1
104#define reg_pinmux_rw_hwprot___timer1___bit 16
105#define reg_pinmux_rw_hwprot___pio___lsb 17
106#define reg_pinmux_rw_hwprot___pio___width 1
107#define reg_pinmux_rw_hwprot___pio___bit 17
108#define reg_pinmux_rw_hwprot___i2c0___lsb 18
109#define reg_pinmux_rw_hwprot___i2c0___width 1
110#define reg_pinmux_rw_hwprot___i2c0___bit 18
111#define reg_pinmux_rw_hwprot___i2c1___lsb 19
112#define reg_pinmux_rw_hwprot___i2c1___width 1
113#define reg_pinmux_rw_hwprot___i2c1___bit 19
114#define reg_pinmux_rw_hwprot___i2c1_sda1___lsb 20
115#define reg_pinmux_rw_hwprot___i2c1_sda1___width 1
116#define reg_pinmux_rw_hwprot___i2c1_sda1___bit 20
117#define reg_pinmux_rw_hwprot___i2c1_sda2___lsb 21
118#define reg_pinmux_rw_hwprot___i2c1_sda2___width 1
119#define reg_pinmux_rw_hwprot___i2c1_sda2___bit 21
120#define reg_pinmux_rw_hwprot___i2c1_sda3___lsb 22
121#define reg_pinmux_rw_hwprot___i2c1_sda3___width 1
122#define reg_pinmux_rw_hwprot___i2c1_sda3___bit 22
123#define reg_pinmux_rw_hwprot___i2c1_sen___lsb 23
124#define reg_pinmux_rw_hwprot___i2c1_sen___width 1
125#define reg_pinmux_rw_hwprot___i2c1_sen___bit 23
126#define reg_pinmux_rw_hwprot_offset 0
127
128/* Register rw_gio_pa, scope pinmux, type rw */
129#define reg_pinmux_rw_gio_pa___pa0___lsb 0
130#define reg_pinmux_rw_gio_pa___pa0___width 1
131#define reg_pinmux_rw_gio_pa___pa0___bit 0
132#define reg_pinmux_rw_gio_pa___pa1___lsb 1
133#define reg_pinmux_rw_gio_pa___pa1___width 1
134#define reg_pinmux_rw_gio_pa___pa1___bit 1
135#define reg_pinmux_rw_gio_pa___pa2___lsb 2
136#define reg_pinmux_rw_gio_pa___pa2___width 1
137#define reg_pinmux_rw_gio_pa___pa2___bit 2
138#define reg_pinmux_rw_gio_pa___pa3___lsb 3
139#define reg_pinmux_rw_gio_pa___pa3___width 1
140#define reg_pinmux_rw_gio_pa___pa3___bit 3
141#define reg_pinmux_rw_gio_pa___pa4___lsb 4
142#define reg_pinmux_rw_gio_pa___pa4___width 1
143#define reg_pinmux_rw_gio_pa___pa4___bit 4
144#define reg_pinmux_rw_gio_pa___pa5___lsb 5
145#define reg_pinmux_rw_gio_pa___pa5___width 1
146#define reg_pinmux_rw_gio_pa___pa5___bit 5
147#define reg_pinmux_rw_gio_pa___pa6___lsb 6
148#define reg_pinmux_rw_gio_pa___pa6___width 1
149#define reg_pinmux_rw_gio_pa___pa6___bit 6
150#define reg_pinmux_rw_gio_pa___pa7___lsb 7
151#define reg_pinmux_rw_gio_pa___pa7___width 1
152#define reg_pinmux_rw_gio_pa___pa7___bit 7
153#define reg_pinmux_rw_gio_pa___pa8___lsb 8
154#define reg_pinmux_rw_gio_pa___pa8___width 1
155#define reg_pinmux_rw_gio_pa___pa8___bit 8
156#define reg_pinmux_rw_gio_pa___pa9___lsb 9
157#define reg_pinmux_rw_gio_pa___pa9___width 1
158#define reg_pinmux_rw_gio_pa___pa9___bit 9
159#define reg_pinmux_rw_gio_pa___pa10___lsb 10
160#define reg_pinmux_rw_gio_pa___pa10___width 1
161#define reg_pinmux_rw_gio_pa___pa10___bit 10
162#define reg_pinmux_rw_gio_pa___pa11___lsb 11
163#define reg_pinmux_rw_gio_pa___pa11___width 1
164#define reg_pinmux_rw_gio_pa___pa11___bit 11
165#define reg_pinmux_rw_gio_pa___pa12___lsb 12
166#define reg_pinmux_rw_gio_pa___pa12___width 1
167#define reg_pinmux_rw_gio_pa___pa12___bit 12
168#define reg_pinmux_rw_gio_pa___pa13___lsb 13
169#define reg_pinmux_rw_gio_pa___pa13___width 1
170#define reg_pinmux_rw_gio_pa___pa13___bit 13
171#define reg_pinmux_rw_gio_pa___pa14___lsb 14
172#define reg_pinmux_rw_gio_pa___pa14___width 1
173#define reg_pinmux_rw_gio_pa___pa14___bit 14
174#define reg_pinmux_rw_gio_pa___pa15___lsb 15
175#define reg_pinmux_rw_gio_pa___pa15___width 1
176#define reg_pinmux_rw_gio_pa___pa15___bit 15
177#define reg_pinmux_rw_gio_pa___pa16___lsb 16
178#define reg_pinmux_rw_gio_pa___pa16___width 1
179#define reg_pinmux_rw_gio_pa___pa16___bit 16
180#define reg_pinmux_rw_gio_pa___pa17___lsb 17
181#define reg_pinmux_rw_gio_pa___pa17___width 1
182#define reg_pinmux_rw_gio_pa___pa17___bit 17
183#define reg_pinmux_rw_gio_pa___pa18___lsb 18
184#define reg_pinmux_rw_gio_pa___pa18___width 1
185#define reg_pinmux_rw_gio_pa___pa18___bit 18
186#define reg_pinmux_rw_gio_pa___pa19___lsb 19
187#define reg_pinmux_rw_gio_pa___pa19___width 1
188#define reg_pinmux_rw_gio_pa___pa19___bit 19
189#define reg_pinmux_rw_gio_pa___pa20___lsb 20
190#define reg_pinmux_rw_gio_pa___pa20___width 1
191#define reg_pinmux_rw_gio_pa___pa20___bit 20
192#define reg_pinmux_rw_gio_pa___pa21___lsb 21
193#define reg_pinmux_rw_gio_pa___pa21___width 1
194#define reg_pinmux_rw_gio_pa___pa21___bit 21
195#define reg_pinmux_rw_gio_pa___pa22___lsb 22
196#define reg_pinmux_rw_gio_pa___pa22___width 1
197#define reg_pinmux_rw_gio_pa___pa22___bit 22
198#define reg_pinmux_rw_gio_pa___pa23___lsb 23
199#define reg_pinmux_rw_gio_pa___pa23___width 1
200#define reg_pinmux_rw_gio_pa___pa23___bit 23
201#define reg_pinmux_rw_gio_pa___pa24___lsb 24
202#define reg_pinmux_rw_gio_pa___pa24___width 1
203#define reg_pinmux_rw_gio_pa___pa24___bit 24
204#define reg_pinmux_rw_gio_pa___pa25___lsb 25
205#define reg_pinmux_rw_gio_pa___pa25___width 1
206#define reg_pinmux_rw_gio_pa___pa25___bit 25
207#define reg_pinmux_rw_gio_pa___pa26___lsb 26
208#define reg_pinmux_rw_gio_pa___pa26___width 1
209#define reg_pinmux_rw_gio_pa___pa26___bit 26
210#define reg_pinmux_rw_gio_pa___pa27___lsb 27
211#define reg_pinmux_rw_gio_pa___pa27___width 1
212#define reg_pinmux_rw_gio_pa___pa27___bit 27
213#define reg_pinmux_rw_gio_pa___pa28___lsb 28
214#define reg_pinmux_rw_gio_pa___pa28___width 1
215#define reg_pinmux_rw_gio_pa___pa28___bit 28
216#define reg_pinmux_rw_gio_pa___pa29___lsb 29
217#define reg_pinmux_rw_gio_pa___pa29___width 1
218#define reg_pinmux_rw_gio_pa___pa29___bit 29
219#define reg_pinmux_rw_gio_pa___pa30___lsb 30
220#define reg_pinmux_rw_gio_pa___pa30___width 1
221#define reg_pinmux_rw_gio_pa___pa30___bit 30
222#define reg_pinmux_rw_gio_pa___pa31___lsb 31
223#define reg_pinmux_rw_gio_pa___pa31___width 1
224#define reg_pinmux_rw_gio_pa___pa31___bit 31
225#define reg_pinmux_rw_gio_pa_offset 4
226
227/* Register rw_gio_pb, scope pinmux, type rw */
228#define reg_pinmux_rw_gio_pb___pb0___lsb 0
229#define reg_pinmux_rw_gio_pb___pb0___width 1
230#define reg_pinmux_rw_gio_pb___pb0___bit 0
231#define reg_pinmux_rw_gio_pb___pb1___lsb 1
232#define reg_pinmux_rw_gio_pb___pb1___width 1
233#define reg_pinmux_rw_gio_pb___pb1___bit 1
234#define reg_pinmux_rw_gio_pb___pb2___lsb 2
235#define reg_pinmux_rw_gio_pb___pb2___width 1
236#define reg_pinmux_rw_gio_pb___pb2___bit 2
237#define reg_pinmux_rw_gio_pb___pb3___lsb 3
238#define reg_pinmux_rw_gio_pb___pb3___width 1
239#define reg_pinmux_rw_gio_pb___pb3___bit 3
240#define reg_pinmux_rw_gio_pb___pb4___lsb 4
241#define reg_pinmux_rw_gio_pb___pb4___width 1
242#define reg_pinmux_rw_gio_pb___pb4___bit 4
243#define reg_pinmux_rw_gio_pb___pb5___lsb 5
244#define reg_pinmux_rw_gio_pb___pb5___width 1
245#define reg_pinmux_rw_gio_pb___pb5___bit 5
246#define reg_pinmux_rw_gio_pb___pb6___lsb 6
247#define reg_pinmux_rw_gio_pb___pb6___width 1
248#define reg_pinmux_rw_gio_pb___pb6___bit 6
249#define reg_pinmux_rw_gio_pb___pb7___lsb 7
250#define reg_pinmux_rw_gio_pb___pb7___width 1
251#define reg_pinmux_rw_gio_pb___pb7___bit 7
252#define reg_pinmux_rw_gio_pb___pb8___lsb 8
253#define reg_pinmux_rw_gio_pb___pb8___width 1
254#define reg_pinmux_rw_gio_pb___pb8___bit 8
255#define reg_pinmux_rw_gio_pb___pb9___lsb 9
256#define reg_pinmux_rw_gio_pb___pb9___width 1
257#define reg_pinmux_rw_gio_pb___pb9___bit 9
258#define reg_pinmux_rw_gio_pb___pb10___lsb 10
259#define reg_pinmux_rw_gio_pb___pb10___width 1
260#define reg_pinmux_rw_gio_pb___pb10___bit 10
261#define reg_pinmux_rw_gio_pb___pb11___lsb 11
262#define reg_pinmux_rw_gio_pb___pb11___width 1
263#define reg_pinmux_rw_gio_pb___pb11___bit 11
264#define reg_pinmux_rw_gio_pb___pb12___lsb 12
265#define reg_pinmux_rw_gio_pb___pb12___width 1
266#define reg_pinmux_rw_gio_pb___pb12___bit 12
267#define reg_pinmux_rw_gio_pb___pb13___lsb 13
268#define reg_pinmux_rw_gio_pb___pb13___width 1
269#define reg_pinmux_rw_gio_pb___pb13___bit 13
270#define reg_pinmux_rw_gio_pb___pb14___lsb 14
271#define reg_pinmux_rw_gio_pb___pb14___width 1
272#define reg_pinmux_rw_gio_pb___pb14___bit 14
273#define reg_pinmux_rw_gio_pb___pb15___lsb 15
274#define reg_pinmux_rw_gio_pb___pb15___width 1
275#define reg_pinmux_rw_gio_pb___pb15___bit 15
276#define reg_pinmux_rw_gio_pb___pb16___lsb 16
277#define reg_pinmux_rw_gio_pb___pb16___width 1
278#define reg_pinmux_rw_gio_pb___pb16___bit 16
279#define reg_pinmux_rw_gio_pb___pb17___lsb 17
280#define reg_pinmux_rw_gio_pb___pb17___width 1
281#define reg_pinmux_rw_gio_pb___pb17___bit 17
282#define reg_pinmux_rw_gio_pb___pb18___lsb 18
283#define reg_pinmux_rw_gio_pb___pb18___width 1
284#define reg_pinmux_rw_gio_pb___pb18___bit 18
285#define reg_pinmux_rw_gio_pb___pb19___lsb 19
286#define reg_pinmux_rw_gio_pb___pb19___width 1
287#define reg_pinmux_rw_gio_pb___pb19___bit 19
288#define reg_pinmux_rw_gio_pb___pb20___lsb 20
289#define reg_pinmux_rw_gio_pb___pb20___width 1
290#define reg_pinmux_rw_gio_pb___pb20___bit 20
291#define reg_pinmux_rw_gio_pb___pb21___lsb 21
292#define reg_pinmux_rw_gio_pb___pb21___width 1
293#define reg_pinmux_rw_gio_pb___pb21___bit 21
294#define reg_pinmux_rw_gio_pb___pb22___lsb 22
295#define reg_pinmux_rw_gio_pb___pb22___width 1
296#define reg_pinmux_rw_gio_pb___pb22___bit 22
297#define reg_pinmux_rw_gio_pb___pb23___lsb 23
298#define reg_pinmux_rw_gio_pb___pb23___width 1
299#define reg_pinmux_rw_gio_pb___pb23___bit 23
300#define reg_pinmux_rw_gio_pb___pb24___lsb 24
301#define reg_pinmux_rw_gio_pb___pb24___width 1
302#define reg_pinmux_rw_gio_pb___pb24___bit 24
303#define reg_pinmux_rw_gio_pb___pb25___lsb 25
304#define reg_pinmux_rw_gio_pb___pb25___width 1
305#define reg_pinmux_rw_gio_pb___pb25___bit 25
306#define reg_pinmux_rw_gio_pb___pb26___lsb 26
307#define reg_pinmux_rw_gio_pb___pb26___width 1
308#define reg_pinmux_rw_gio_pb___pb26___bit 26
309#define reg_pinmux_rw_gio_pb___pb27___lsb 27
310#define reg_pinmux_rw_gio_pb___pb27___width 1
311#define reg_pinmux_rw_gio_pb___pb27___bit 27
312#define reg_pinmux_rw_gio_pb___pb28___lsb 28
313#define reg_pinmux_rw_gio_pb___pb28___width 1
314#define reg_pinmux_rw_gio_pb___pb28___bit 28
315#define reg_pinmux_rw_gio_pb___pb29___lsb 29
316#define reg_pinmux_rw_gio_pb___pb29___width 1
317#define reg_pinmux_rw_gio_pb___pb29___bit 29
318#define reg_pinmux_rw_gio_pb___pb30___lsb 30
319#define reg_pinmux_rw_gio_pb___pb30___width 1
320#define reg_pinmux_rw_gio_pb___pb30___bit 30
321#define reg_pinmux_rw_gio_pb___pb31___lsb 31
322#define reg_pinmux_rw_gio_pb___pb31___width 1
323#define reg_pinmux_rw_gio_pb___pb31___bit 31
324#define reg_pinmux_rw_gio_pb_offset 8
325
326/* Register rw_gio_pc, scope pinmux, type rw */
327#define reg_pinmux_rw_gio_pc___pc0___lsb 0
328#define reg_pinmux_rw_gio_pc___pc0___width 1
329#define reg_pinmux_rw_gio_pc___pc0___bit 0
330#define reg_pinmux_rw_gio_pc___pc1___lsb 1
331#define reg_pinmux_rw_gio_pc___pc1___width 1
332#define reg_pinmux_rw_gio_pc___pc1___bit 1
333#define reg_pinmux_rw_gio_pc___pc2___lsb 2
334#define reg_pinmux_rw_gio_pc___pc2___width 1
335#define reg_pinmux_rw_gio_pc___pc2___bit 2
336#define reg_pinmux_rw_gio_pc___pc3___lsb 3
337#define reg_pinmux_rw_gio_pc___pc3___width 1
338#define reg_pinmux_rw_gio_pc___pc3___bit 3
339#define reg_pinmux_rw_gio_pc___pc4___lsb 4
340#define reg_pinmux_rw_gio_pc___pc4___width 1
341#define reg_pinmux_rw_gio_pc___pc4___bit 4
342#define reg_pinmux_rw_gio_pc___pc5___lsb 5
343#define reg_pinmux_rw_gio_pc___pc5___width 1
344#define reg_pinmux_rw_gio_pc___pc5___bit 5
345#define reg_pinmux_rw_gio_pc___pc6___lsb 6
346#define reg_pinmux_rw_gio_pc___pc6___width 1
347#define reg_pinmux_rw_gio_pc___pc6___bit 6
348#define reg_pinmux_rw_gio_pc___pc7___lsb 7
349#define reg_pinmux_rw_gio_pc___pc7___width 1
350#define reg_pinmux_rw_gio_pc___pc7___bit 7
351#define reg_pinmux_rw_gio_pc___pc8___lsb 8
352#define reg_pinmux_rw_gio_pc___pc8___width 1
353#define reg_pinmux_rw_gio_pc___pc8___bit 8
354#define reg_pinmux_rw_gio_pc___pc9___lsb 9
355#define reg_pinmux_rw_gio_pc___pc9___width 1
356#define reg_pinmux_rw_gio_pc___pc9___bit 9
357#define reg_pinmux_rw_gio_pc___pc10___lsb 10
358#define reg_pinmux_rw_gio_pc___pc10___width 1
359#define reg_pinmux_rw_gio_pc___pc10___bit 10
360#define reg_pinmux_rw_gio_pc___pc11___lsb 11
361#define reg_pinmux_rw_gio_pc___pc11___width 1
362#define reg_pinmux_rw_gio_pc___pc11___bit 11
363#define reg_pinmux_rw_gio_pc___pc12___lsb 12
364#define reg_pinmux_rw_gio_pc___pc12___width 1
365#define reg_pinmux_rw_gio_pc___pc12___bit 12
366#define reg_pinmux_rw_gio_pc___pc13___lsb 13
367#define reg_pinmux_rw_gio_pc___pc13___width 1
368#define reg_pinmux_rw_gio_pc___pc13___bit 13
369#define reg_pinmux_rw_gio_pc___pc14___lsb 14
370#define reg_pinmux_rw_gio_pc___pc14___width 1
371#define reg_pinmux_rw_gio_pc___pc14___bit 14
372#define reg_pinmux_rw_gio_pc___pc15___lsb 15
373#define reg_pinmux_rw_gio_pc___pc15___width 1
374#define reg_pinmux_rw_gio_pc___pc15___bit 15
375#define reg_pinmux_rw_gio_pc_offset 12
376
377/* Register rw_iop_pa, scope pinmux, type rw */
378#define reg_pinmux_rw_iop_pa___pa0___lsb 0
379#define reg_pinmux_rw_iop_pa___pa0___width 1
380#define reg_pinmux_rw_iop_pa___pa0___bit 0
381#define reg_pinmux_rw_iop_pa___pa1___lsb 1
382#define reg_pinmux_rw_iop_pa___pa1___width 1
383#define reg_pinmux_rw_iop_pa___pa1___bit 1
384#define reg_pinmux_rw_iop_pa___pa2___lsb 2
385#define reg_pinmux_rw_iop_pa___pa2___width 1
386#define reg_pinmux_rw_iop_pa___pa2___bit 2
387#define reg_pinmux_rw_iop_pa___pa3___lsb 3
388#define reg_pinmux_rw_iop_pa___pa3___width 1
389#define reg_pinmux_rw_iop_pa___pa3___bit 3
390#define reg_pinmux_rw_iop_pa___pa4___lsb 4
391#define reg_pinmux_rw_iop_pa___pa4___width 1
392#define reg_pinmux_rw_iop_pa___pa4___bit 4
393#define reg_pinmux_rw_iop_pa___pa5___lsb 5
394#define reg_pinmux_rw_iop_pa___pa5___width 1
395#define reg_pinmux_rw_iop_pa___pa5___bit 5
396#define reg_pinmux_rw_iop_pa___pa6___lsb 6
397#define reg_pinmux_rw_iop_pa___pa6___width 1
398#define reg_pinmux_rw_iop_pa___pa6___bit 6
399#define reg_pinmux_rw_iop_pa___pa7___lsb 7
400#define reg_pinmux_rw_iop_pa___pa7___width 1
401#define reg_pinmux_rw_iop_pa___pa7___bit 7
402#define reg_pinmux_rw_iop_pa___pa8___lsb 8
403#define reg_pinmux_rw_iop_pa___pa8___width 1
404#define reg_pinmux_rw_iop_pa___pa8___bit 8
405#define reg_pinmux_rw_iop_pa___pa9___lsb 9
406#define reg_pinmux_rw_iop_pa___pa9___width 1
407#define reg_pinmux_rw_iop_pa___pa9___bit 9
408#define reg_pinmux_rw_iop_pa___pa10___lsb 10
409#define reg_pinmux_rw_iop_pa___pa10___width 1
410#define reg_pinmux_rw_iop_pa___pa10___bit 10
411#define reg_pinmux_rw_iop_pa___pa11___lsb 11
412#define reg_pinmux_rw_iop_pa___pa11___width 1
413#define reg_pinmux_rw_iop_pa___pa11___bit 11
414#define reg_pinmux_rw_iop_pa___pa12___lsb 12
415#define reg_pinmux_rw_iop_pa___pa12___width 1
416#define reg_pinmux_rw_iop_pa___pa12___bit 12
417#define reg_pinmux_rw_iop_pa___pa13___lsb 13
418#define reg_pinmux_rw_iop_pa___pa13___width 1
419#define reg_pinmux_rw_iop_pa___pa13___bit 13
420#define reg_pinmux_rw_iop_pa___pa14___lsb 14
421#define reg_pinmux_rw_iop_pa___pa14___width 1
422#define reg_pinmux_rw_iop_pa___pa14___bit 14
423#define reg_pinmux_rw_iop_pa___pa15___lsb 15
424#define reg_pinmux_rw_iop_pa___pa15___width 1
425#define reg_pinmux_rw_iop_pa___pa15___bit 15
426#define reg_pinmux_rw_iop_pa___pa16___lsb 16
427#define reg_pinmux_rw_iop_pa___pa16___width 1
428#define reg_pinmux_rw_iop_pa___pa16___bit 16
429#define reg_pinmux_rw_iop_pa___pa17___lsb 17
430#define reg_pinmux_rw_iop_pa___pa17___width 1
431#define reg_pinmux_rw_iop_pa___pa17___bit 17
432#define reg_pinmux_rw_iop_pa___pa18___lsb 18
433#define reg_pinmux_rw_iop_pa___pa18___width 1
434#define reg_pinmux_rw_iop_pa___pa18___bit 18
435#define reg_pinmux_rw_iop_pa___pa19___lsb 19
436#define reg_pinmux_rw_iop_pa___pa19___width 1
437#define reg_pinmux_rw_iop_pa___pa19___bit 19
438#define reg_pinmux_rw_iop_pa___pa20___lsb 20
439#define reg_pinmux_rw_iop_pa___pa20___width 1
440#define reg_pinmux_rw_iop_pa___pa20___bit 20
441#define reg_pinmux_rw_iop_pa___pa21___lsb 21
442#define reg_pinmux_rw_iop_pa___pa21___width 1
443#define reg_pinmux_rw_iop_pa___pa21___bit 21
444#define reg_pinmux_rw_iop_pa___pa22___lsb 22
445#define reg_pinmux_rw_iop_pa___pa22___width 1
446#define reg_pinmux_rw_iop_pa___pa22___bit 22
447#define reg_pinmux_rw_iop_pa___pa23___lsb 23
448#define reg_pinmux_rw_iop_pa___pa23___width 1
449#define reg_pinmux_rw_iop_pa___pa23___bit 23
450#define reg_pinmux_rw_iop_pa___pa24___lsb 24
451#define reg_pinmux_rw_iop_pa___pa24___width 1
452#define reg_pinmux_rw_iop_pa___pa24___bit 24
453#define reg_pinmux_rw_iop_pa___pa25___lsb 25
454#define reg_pinmux_rw_iop_pa___pa25___width 1
455#define reg_pinmux_rw_iop_pa___pa25___bit 25
456#define reg_pinmux_rw_iop_pa___pa26___lsb 26
457#define reg_pinmux_rw_iop_pa___pa26___width 1
458#define reg_pinmux_rw_iop_pa___pa26___bit 26
459#define reg_pinmux_rw_iop_pa___pa27___lsb 27
460#define reg_pinmux_rw_iop_pa___pa27___width 1
461#define reg_pinmux_rw_iop_pa___pa27___bit 27
462#define reg_pinmux_rw_iop_pa___pa28___lsb 28
463#define reg_pinmux_rw_iop_pa___pa28___width 1
464#define reg_pinmux_rw_iop_pa___pa28___bit 28
465#define reg_pinmux_rw_iop_pa___pa29___lsb 29
466#define reg_pinmux_rw_iop_pa___pa29___width 1
467#define reg_pinmux_rw_iop_pa___pa29___bit 29
468#define reg_pinmux_rw_iop_pa___pa30___lsb 30
469#define reg_pinmux_rw_iop_pa___pa30___width 1
470#define reg_pinmux_rw_iop_pa___pa30___bit 30
471#define reg_pinmux_rw_iop_pa___pa31___lsb 31
472#define reg_pinmux_rw_iop_pa___pa31___width 1
473#define reg_pinmux_rw_iop_pa___pa31___bit 31
474#define reg_pinmux_rw_iop_pa_offset 16
475
476/* Register rw_iop_pb, scope pinmux, type rw */
477#define reg_pinmux_rw_iop_pb___pb0___lsb 0
478#define reg_pinmux_rw_iop_pb___pb0___width 1
479#define reg_pinmux_rw_iop_pb___pb0___bit 0
480#define reg_pinmux_rw_iop_pb___pb1___lsb 1
481#define reg_pinmux_rw_iop_pb___pb1___width 1
482#define reg_pinmux_rw_iop_pb___pb1___bit 1
483#define reg_pinmux_rw_iop_pb___pb2___lsb 2
484#define reg_pinmux_rw_iop_pb___pb2___width 1
485#define reg_pinmux_rw_iop_pb___pb2___bit 2
486#define reg_pinmux_rw_iop_pb___pb3___lsb 3
487#define reg_pinmux_rw_iop_pb___pb3___width 1
488#define reg_pinmux_rw_iop_pb___pb3___bit 3
489#define reg_pinmux_rw_iop_pb___pb4___lsb 4
490#define reg_pinmux_rw_iop_pb___pb4___width 1
491#define reg_pinmux_rw_iop_pb___pb4___bit 4
492#define reg_pinmux_rw_iop_pb___pb5___lsb 5
493#define reg_pinmux_rw_iop_pb___pb5___width 1
494#define reg_pinmux_rw_iop_pb___pb5___bit 5
495#define reg_pinmux_rw_iop_pb___pb6___lsb 6
496#define reg_pinmux_rw_iop_pb___pb6___width 1
497#define reg_pinmux_rw_iop_pb___pb6___bit 6
498#define reg_pinmux_rw_iop_pb___pb7___lsb 7
499#define reg_pinmux_rw_iop_pb___pb7___width 1
500#define reg_pinmux_rw_iop_pb___pb7___bit 7
501#define reg_pinmux_rw_iop_pb_offset 20
502
503/* Register rw_iop_pio, scope pinmux, type rw */
504#define reg_pinmux_rw_iop_pio___d0___lsb 0
505#define reg_pinmux_rw_iop_pio___d0___width 1
506#define reg_pinmux_rw_iop_pio___d0___bit 0
507#define reg_pinmux_rw_iop_pio___d1___lsb 1
508#define reg_pinmux_rw_iop_pio___d1___width 1
509#define reg_pinmux_rw_iop_pio___d1___bit 1
510#define reg_pinmux_rw_iop_pio___d2___lsb 2
511#define reg_pinmux_rw_iop_pio___d2___width 1
512#define reg_pinmux_rw_iop_pio___d2___bit 2
513#define reg_pinmux_rw_iop_pio___d3___lsb 3
514#define reg_pinmux_rw_iop_pio___d3___width 1
515#define reg_pinmux_rw_iop_pio___d3___bit 3
516#define reg_pinmux_rw_iop_pio___d4___lsb 4
517#define reg_pinmux_rw_iop_pio___d4___width 1
518#define reg_pinmux_rw_iop_pio___d4___bit 4
519#define reg_pinmux_rw_iop_pio___d5___lsb 5
520#define reg_pinmux_rw_iop_pio___d5___width 1
521#define reg_pinmux_rw_iop_pio___d5___bit 5
522#define reg_pinmux_rw_iop_pio___d6___lsb 6
523#define reg_pinmux_rw_iop_pio___d6___width 1
524#define reg_pinmux_rw_iop_pio___d6___bit 6
525#define reg_pinmux_rw_iop_pio___d7___lsb 7
526#define reg_pinmux_rw_iop_pio___d7___width 1
527#define reg_pinmux_rw_iop_pio___d7___bit 7
528#define reg_pinmux_rw_iop_pio___rd_n___lsb 8
529#define reg_pinmux_rw_iop_pio___rd_n___width 1
530#define reg_pinmux_rw_iop_pio___rd_n___bit 8
531#define reg_pinmux_rw_iop_pio___wr_n___lsb 9
532#define reg_pinmux_rw_iop_pio___wr_n___width 1
533#define reg_pinmux_rw_iop_pio___wr_n___bit 9
534#define reg_pinmux_rw_iop_pio___a0___lsb 10
535#define reg_pinmux_rw_iop_pio___a0___width 1
536#define reg_pinmux_rw_iop_pio___a0___bit 10
537#define reg_pinmux_rw_iop_pio___a1___lsb 11
538#define reg_pinmux_rw_iop_pio___a1___width 1
539#define reg_pinmux_rw_iop_pio___a1___bit 11
540#define reg_pinmux_rw_iop_pio___ce0_n___lsb 12
541#define reg_pinmux_rw_iop_pio___ce0_n___width 1
542#define reg_pinmux_rw_iop_pio___ce0_n___bit 12
543#define reg_pinmux_rw_iop_pio___ce1_n___lsb 13
544#define reg_pinmux_rw_iop_pio___ce1_n___width 1
545#define reg_pinmux_rw_iop_pio___ce1_n___bit 13
546#define reg_pinmux_rw_iop_pio___ce2_n___lsb 14
547#define reg_pinmux_rw_iop_pio___ce2_n___width 1
548#define reg_pinmux_rw_iop_pio___ce2_n___bit 14
549#define reg_pinmux_rw_iop_pio___rdy___lsb 15
550#define reg_pinmux_rw_iop_pio___rdy___width 1
551#define reg_pinmux_rw_iop_pio___rdy___bit 15
552#define reg_pinmux_rw_iop_pio_offset 24
553
554/* Register rw_iop_usb, scope pinmux, type rw */
555#define reg_pinmux_rw_iop_usb___usb0___lsb 0
556#define reg_pinmux_rw_iop_usb___usb0___width 1
557#define reg_pinmux_rw_iop_usb___usb0___bit 0
558#define reg_pinmux_rw_iop_usb_offset 28
559
560
561/* Constants */
562#define regk_pinmux_no 0x00000000
563#define regk_pinmux_rw_gio_pa_default 0x00000000
564#define regk_pinmux_rw_gio_pb_default 0x00000000
565#define regk_pinmux_rw_gio_pc_default 0x00000000
566#define regk_pinmux_rw_hwprot_default 0x00000000
567#define regk_pinmux_rw_iop_pa_default 0x00000000
568#define regk_pinmux_rw_iop_pb_default 0x00000000
569#define regk_pinmux_rw_iop_pio_default 0x00000000
570#define regk_pinmux_rw_iop_usb_default 0x00000001
571#define regk_pinmux_yes 0x00000001
572#endif /* __pinmux_defs_asm_h */
diff --git a/include/asm-cris/arch-v32/mach-a3/hwregs/asm/pio_defs_asm.h b/include/asm-cris/arch-v32/mach-a3/hwregs/asm/pio_defs_asm.h
new file mode 100644
index 000000000000..3907ef4921c8
--- /dev/null
+++ b/include/asm-cris/arch-v32/mach-a3/hwregs/asm/pio_defs_asm.h
@@ -0,0 +1,337 @@
1#ifndef __pio_defs_asm_h
2#define __pio_defs_asm_h
3
4/*
5 * This file is autogenerated from
6 * file: pio.r
7 *
8 * by ../../../tools/rdesc/bin/rdes2c -asm -outfile pio_defs_asm.h pio.r
9 * Any changes here will be lost.
10 *
11 * -*- buffer-read-only: t -*-
12 */
13
14#ifndef REG_FIELD
15#define REG_FIELD( scope, reg, field, value ) \
16 REG_FIELD_X_( value, reg_##scope##_##reg##___##field##___lsb )
17#define REG_FIELD_X_( value, shift ) ((value) << shift)
18#endif
19
20#ifndef REG_STATE
21#define REG_STATE( scope, reg, field, symbolic_value ) \
22 REG_STATE_X_( regk_##scope##_##symbolic_value, reg_##scope##_##reg##___##field##___lsb )
23#define REG_STATE_X_( k, shift ) (k << shift)
24#endif
25
26#ifndef REG_MASK
27#define REG_MASK( scope, reg, field ) \
28 REG_MASK_X_( reg_##scope##_##reg##___##field##___width, reg_##scope##_##reg##___##field##___lsb )
29#define REG_MASK_X_( width, lsb ) (((1 << width)-1) << lsb)
30#endif
31
32#ifndef REG_LSB
33#define REG_LSB( scope, reg, field ) reg_##scope##_##reg##___##field##___lsb
34#endif
35
36#ifndef REG_BIT
37#define REG_BIT( scope, reg, field ) reg_##scope##_##reg##___##field##___bit
38#endif
39
40#ifndef REG_ADDR
41#define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset)
42#define REG_ADDR_X_( inst, offs ) ((inst) + offs)
43#endif
44
45#ifndef REG_ADDR_VECT
46#define REG_ADDR_VECT( scope, inst, reg, index ) \
47 REG_ADDR_VECT_X_(inst, reg_##scope##_##reg##_offset, index, \
48 STRIDE_##scope##_##reg )
49#define REG_ADDR_VECT_X_( inst, offs, index, stride ) \
50 ((inst) + offs + (index) * stride)
51#endif
52
53/* Register rw_data, scope pio, type rw */
54#define reg_pio_rw_data_offset 64
55
56/* Register rw_io_access0, scope pio, type rw */
57#define reg_pio_rw_io_access0___data___lsb 0
58#define reg_pio_rw_io_access0___data___width 8
59#define reg_pio_rw_io_access0_offset 0
60
61/* Register rw_io_access1, scope pio, type rw */
62#define reg_pio_rw_io_access1___data___lsb 0
63#define reg_pio_rw_io_access1___data___width 8
64#define reg_pio_rw_io_access1_offset 4
65
66/* Register rw_io_access2, scope pio, type rw */
67#define reg_pio_rw_io_access2___data___lsb 0
68#define reg_pio_rw_io_access2___data___width 8
69#define reg_pio_rw_io_access2_offset 8
70
71/* Register rw_io_access3, scope pio, type rw */
72#define reg_pio_rw_io_access3___data___lsb 0
73#define reg_pio_rw_io_access3___data___width 8
74#define reg_pio_rw_io_access3_offset 12
75
76/* Register rw_io_access4, scope pio, type rw */
77#define reg_pio_rw_io_access4___data___lsb 0
78#define reg_pio_rw_io_access4___data___width 8
79#define reg_pio_rw_io_access4_offset 16
80
81/* Register rw_io_access5, scope pio, type rw */
82#define reg_pio_rw_io_access5___data___lsb 0
83#define reg_pio_rw_io_access5___data___width 8
84#define reg_pio_rw_io_access5_offset 20
85
86/* Register rw_io_access6, scope pio, type rw */
87#define reg_pio_rw_io_access6___data___lsb 0
88#define reg_pio_rw_io_access6___data___width 8
89#define reg_pio_rw_io_access6_offset 24
90
91/* Register rw_io_access7, scope pio, type rw */
92#define reg_pio_rw_io_access7___data___lsb 0
93#define reg_pio_rw_io_access7___data___width 8
94#define reg_pio_rw_io_access7_offset 28
95
96/* Register rw_io_access8, scope pio, type rw */
97#define reg_pio_rw_io_access8___data___lsb 0
98#define reg_pio_rw_io_access8___data___width 8
99#define reg_pio_rw_io_access8_offset 32
100
101/* Register rw_io_access9, scope pio, type rw */
102#define reg_pio_rw_io_access9___data___lsb 0
103#define reg_pio_rw_io_access9___data___width 8
104#define reg_pio_rw_io_access9_offset 36
105
106/* Register rw_io_access10, scope pio, type rw */
107#define reg_pio_rw_io_access10___data___lsb 0
108#define reg_pio_rw_io_access10___data___width 8
109#define reg_pio_rw_io_access10_offset 40
110
111/* Register rw_io_access11, scope pio, type rw */
112#define reg_pio_rw_io_access11___data___lsb 0
113#define reg_pio_rw_io_access11___data___width 8
114#define reg_pio_rw_io_access11_offset 44
115
116/* Register rw_io_access12, scope pio, type rw */
117#define reg_pio_rw_io_access12___data___lsb 0
118#define reg_pio_rw_io_access12___data___width 8
119#define reg_pio_rw_io_access12_offset 48
120
121/* Register rw_io_access13, scope pio, type rw */
122#define reg_pio_rw_io_access13___data___lsb 0
123#define reg_pio_rw_io_access13___data___width 8
124#define reg_pio_rw_io_access13_offset 52
125
126/* Register rw_io_access14, scope pio, type rw */
127#define reg_pio_rw_io_access14___data___lsb 0
128#define reg_pio_rw_io_access14___data___width 8
129#define reg_pio_rw_io_access14_offset 56
130
131/* Register rw_io_access15, scope pio, type rw */
132#define reg_pio_rw_io_access15___data___lsb 0
133#define reg_pio_rw_io_access15___data___width 8
134#define reg_pio_rw_io_access15_offset 60
135
136/* Register rw_ce0_cfg, scope pio, type rw */
137#define reg_pio_rw_ce0_cfg___lw___lsb 0
138#define reg_pio_rw_ce0_cfg___lw___width 6
139#define reg_pio_rw_ce0_cfg___ew___lsb 6
140#define reg_pio_rw_ce0_cfg___ew___width 3
141#define reg_pio_rw_ce0_cfg___zw___lsb 9
142#define reg_pio_rw_ce0_cfg___zw___width 3
143#define reg_pio_rw_ce0_cfg___aw___lsb 12
144#define reg_pio_rw_ce0_cfg___aw___width 2
145#define reg_pio_rw_ce0_cfg___mode___lsb 14
146#define reg_pio_rw_ce0_cfg___mode___width 2
147#define reg_pio_rw_ce0_cfg_offset 68
148
149/* Register rw_ce1_cfg, scope pio, type rw */
150#define reg_pio_rw_ce1_cfg___lw___lsb 0
151#define reg_pio_rw_ce1_cfg___lw___width 6
152#define reg_pio_rw_ce1_cfg___ew___lsb 6
153#define reg_pio_rw_ce1_cfg___ew___width 3
154#define reg_pio_rw_ce1_cfg___zw___lsb 9
155#define reg_pio_rw_ce1_cfg___zw___width 3
156#define reg_pio_rw_ce1_cfg___aw___lsb 12
157#define reg_pio_rw_ce1_cfg___aw___width 2
158#define reg_pio_rw_ce1_cfg___mode___lsb 14
159#define reg_pio_rw_ce1_cfg___mode___width 2
160#define reg_pio_rw_ce1_cfg_offset 72
161
162/* Register rw_ce2_cfg, scope pio, type rw */
163#define reg_pio_rw_ce2_cfg___lw___lsb 0
164#define reg_pio_rw_ce2_cfg___lw___width 6
165#define reg_pio_rw_ce2_cfg___ew___lsb 6
166#define reg_pio_rw_ce2_cfg___ew___width 3
167#define reg_pio_rw_ce2_cfg___zw___lsb 9
168#define reg_pio_rw_ce2_cfg___zw___width 3
169#define reg_pio_rw_ce2_cfg___aw___lsb 12
170#define reg_pio_rw_ce2_cfg___aw___width 2
171#define reg_pio_rw_ce2_cfg___mode___lsb 14
172#define reg_pio_rw_ce2_cfg___mode___width 2
173#define reg_pio_rw_ce2_cfg_offset 76
174
175/* Register rw_dout, scope pio, type rw */
176#define reg_pio_rw_dout___data___lsb 0
177#define reg_pio_rw_dout___data___width 8
178#define reg_pio_rw_dout___rd_n___lsb 8
179#define reg_pio_rw_dout___rd_n___width 1
180#define reg_pio_rw_dout___rd_n___bit 8
181#define reg_pio_rw_dout___wr_n___lsb 9
182#define reg_pio_rw_dout___wr_n___width 1
183#define reg_pio_rw_dout___wr_n___bit 9
184#define reg_pio_rw_dout___a0___lsb 10
185#define reg_pio_rw_dout___a0___width 1
186#define reg_pio_rw_dout___a0___bit 10
187#define reg_pio_rw_dout___a1___lsb 11
188#define reg_pio_rw_dout___a1___width 1
189#define reg_pio_rw_dout___a1___bit 11
190#define reg_pio_rw_dout___ce0_n___lsb 12
191#define reg_pio_rw_dout___ce0_n___width 1
192#define reg_pio_rw_dout___ce0_n___bit 12
193#define reg_pio_rw_dout___ce1_n___lsb 13
194#define reg_pio_rw_dout___ce1_n___width 1
195#define reg_pio_rw_dout___ce1_n___bit 13
196#define reg_pio_rw_dout___ce2_n___lsb 14
197#define reg_pio_rw_dout___ce2_n___width 1
198#define reg_pio_rw_dout___ce2_n___bit 14
199#define reg_pio_rw_dout___rdy___lsb 15
200#define reg_pio_rw_dout___rdy___width 1
201#define reg_pio_rw_dout___rdy___bit 15
202#define reg_pio_rw_dout_offset 80
203
204/* Register rw_oe, scope pio, type rw */
205#define reg_pio_rw_oe___data___lsb 0
206#define reg_pio_rw_oe___data___width 8
207#define reg_pio_rw_oe___rd_n___lsb 8
208#define reg_pio_rw_oe___rd_n___width 1
209#define reg_pio_rw_oe___rd_n___bit 8
210#define reg_pio_rw_oe___wr_n___lsb 9
211#define reg_pio_rw_oe___wr_n___width 1
212#define reg_pio_rw_oe___wr_n___bit 9
213#define reg_pio_rw_oe___a0___lsb 10
214#define reg_pio_rw_oe___a0___width 1
215#define reg_pio_rw_oe___a0___bit 10
216#define reg_pio_rw_oe___a1___lsb 11
217#define reg_pio_rw_oe___a1___width 1
218#define reg_pio_rw_oe___a1___bit 11
219#define reg_pio_rw_oe___ce0_n___lsb 12
220#define reg_pio_rw_oe___ce0_n___width 1
221#define reg_pio_rw_oe___ce0_n___bit 12
222#define reg_pio_rw_oe___ce1_n___lsb 13
223#define reg_pio_rw_oe___ce1_n___width 1
224#define reg_pio_rw_oe___ce1_n___bit 13
225#define reg_pio_rw_oe___ce2_n___lsb 14
226#define reg_pio_rw_oe___ce2_n___width 1
227#define reg_pio_rw_oe___ce2_n___bit 14
228#define reg_pio_rw_oe___rdy___lsb 15
229#define reg_pio_rw_oe___rdy___width 1
230#define reg_pio_rw_oe___rdy___bit 15
231#define reg_pio_rw_oe_offset 84
232
233/* Register rw_man_ctrl, scope pio, type rw */
234#define reg_pio_rw_man_ctrl___data___lsb 0
235#define reg_pio_rw_man_ctrl___data___width 8
236#define reg_pio_rw_man_ctrl___rd_n___lsb 8
237#define reg_pio_rw_man_ctrl___rd_n___width 1
238#define reg_pio_rw_man_ctrl___rd_n___bit 8
239#define reg_pio_rw_man_ctrl___wr_n___lsb 9
240#define reg_pio_rw_man_ctrl___wr_n___width 1
241#define reg_pio_rw_man_ctrl___wr_n___bit 9
242#define reg_pio_rw_man_ctrl___a0___lsb 10
243#define reg_pio_rw_man_ctrl___a0___width 1
244#define reg_pio_rw_man_ctrl___a0___bit 10
245#define reg_pio_rw_man_ctrl___a1___lsb 11
246#define reg_pio_rw_man_ctrl___a1___width 1
247#define reg_pio_rw_man_ctrl___a1___bit 11
248#define reg_pio_rw_man_ctrl___ce0_n___lsb 12
249#define reg_pio_rw_man_ctrl___ce0_n___width 1
250#define reg_pio_rw_man_ctrl___ce0_n___bit 12
251#define reg_pio_rw_man_ctrl___ce1_n___lsb 13
252#define reg_pio_rw_man_ctrl___ce1_n___width 1
253#define reg_pio_rw_man_ctrl___ce1_n___bit 13
254#define reg_pio_rw_man_ctrl___ce2_n___lsb 14
255#define reg_pio_rw_man_ctrl___ce2_n___width 1
256#define reg_pio_rw_man_ctrl___ce2_n___bit 14
257#define reg_pio_rw_man_ctrl___rdy___lsb 15
258#define reg_pio_rw_man_ctrl___rdy___width 1
259#define reg_pio_rw_man_ctrl___rdy___bit 15
260#define reg_pio_rw_man_ctrl_offset 88
261
262/* Register r_din, scope pio, type r */
263#define reg_pio_r_din___data___lsb 0
264#define reg_pio_r_din___data___width 8
265#define reg_pio_r_din___rd_n___lsb 8
266#define reg_pio_r_din___rd_n___width 1
267#define reg_pio_r_din___rd_n___bit 8
268#define reg_pio_r_din___wr_n___lsb 9
269#define reg_pio_r_din___wr_n___width 1
270#define reg_pio_r_din___wr_n___bit 9
271#define reg_pio_r_din___a0___lsb 10
272#define reg_pio_r_din___a0___width 1
273#define reg_pio_r_din___a0___bit 10
274#define reg_pio_r_din___a1___lsb 11
275#define reg_pio_r_din___a1___width 1
276#define reg_pio_r_din___a1___bit 11
277#define reg_pio_r_din___ce0_n___lsb 12
278#define reg_pio_r_din___ce0_n___width 1
279#define reg_pio_r_din___ce0_n___bit 12
280#define reg_pio_r_din___ce1_n___lsb 13
281#define reg_pio_r_din___ce1_n___width 1
282#define reg_pio_r_din___ce1_n___bit 13
283#define reg_pio_r_din___ce2_n___lsb 14
284#define reg_pio_r_din___ce2_n___width 1
285#define reg_pio_r_din___ce2_n___bit 14
286#define reg_pio_r_din___rdy___lsb 15
287#define reg_pio_r_din___rdy___width 1
288#define reg_pio_r_din___rdy___bit 15
289#define reg_pio_r_din_offset 92
290
291/* Register r_stat, scope pio, type r */
292#define reg_pio_r_stat___busy___lsb 0
293#define reg_pio_r_stat___busy___width 1
294#define reg_pio_r_stat___busy___bit 0
295#define reg_pio_r_stat_offset 96
296
297/* Register rw_intr_mask, scope pio, type rw */
298#define reg_pio_rw_intr_mask___rdy___lsb 0
299#define reg_pio_rw_intr_mask___rdy___width 1
300#define reg_pio_rw_intr_mask___rdy___bit 0
301#define reg_pio_rw_intr_mask_offset 100
302
303/* Register rw_ack_intr, scope pio, type rw */
304#define reg_pio_rw_ack_intr___rdy___lsb 0
305#define reg_pio_rw_ack_intr___rdy___width 1
306#define reg_pio_rw_ack_intr___rdy___bit 0
307#define reg_pio_rw_ack_intr_offset 104
308
309/* Register r_intr, scope pio, type r */
310#define reg_pio_r_intr___rdy___lsb 0
311#define reg_pio_r_intr___rdy___width 1
312#define reg_pio_r_intr___rdy___bit 0
313#define reg_pio_r_intr_offset 108
314
315/* Register r_masked_intr, scope pio, type r */
316#define reg_pio_r_masked_intr___rdy___lsb 0
317#define reg_pio_r_masked_intr___rdy___width 1
318#define reg_pio_r_masked_intr___rdy___bit 0
319#define reg_pio_r_masked_intr_offset 112
320
321
322/* Constants */
323#define regk_pio_a2 0x00000003
324#define regk_pio_no 0x00000000
325#define regk_pio_normal 0x00000000
326#define regk_pio_rd 0x00000001
327#define regk_pio_rw_ce0_cfg_default 0x00000000
328#define regk_pio_rw_ce1_cfg_default 0x00000000
329#define regk_pio_rw_ce2_cfg_default 0x00000000
330#define regk_pio_rw_intr_mask_default 0x00000000
331#define regk_pio_rw_man_ctrl_default 0x00000000
332#define regk_pio_rw_oe_default 0x00000000
333#define regk_pio_wr 0x00000002
334#define regk_pio_wr_ce2 0x00000003
335#define regk_pio_yes 0x00000001
336#define regk_pio_yes_all 0x000000ff
337#endif /* __pio_defs_asm_h */
diff --git a/include/asm-cris/arch-v32/mach-a3/hwregs/asm/reg_map_asm.h b/include/asm-cris/arch-v32/mach-a3/hwregs/asm/reg_map_asm.h
new file mode 100644
index 000000000000..89439e9610e2
--- /dev/null
+++ b/include/asm-cris/arch-v32/mach-a3/hwregs/asm/reg_map_asm.h
@@ -0,0 +1,99 @@
1#ifndef __reg_map_asm_h
2#define __reg_map_asm_h
3
4/*
5 * This file is autogenerated from
6 * file: reg.rmap
7 *
8 * by ../../../tools/rdesc/bin/rdes2c -asm -base 0xb0000000 -map marb_bar.r marb_foo.r ccd_top.r ccd_stat.r ccd_tg.r ccd_dp.r ccd.r iop_sap_in.r iop_sap_out.r iop_sw_cfg.r iop_sw_cpu.r iop_sw_mpu.r iop_sw_spu.r iop_version.r iop_crc_par.r iop_dmc_in.r iop_dmc_out.r iop_fifo_in_extra.r iop_fifo_in.r iop_fifo_out_extra.r iop_fifo_out.r iop_mc.r iop_mpu.r iop_scrc_in.r iop_scrc_out.r iop_spu.r iop_timer_grp.r iop_trigger_grp.r iop.r -outfile reg_map_asm.h reg.rmap
9 * Any changes here will be lost.
10 *
11 * -*- buffer-read-only: t -*-
12 */
13#define regi_ccd 0xb0000000
14#define regi_ccd_top 0xb0000000
15#define regi_ccd_dp 0xb0000400
16#define regi_ccd_stat 0xb0000800
17#define regi_ccd_tg 0xb0001000
18#define regi_cfg 0xb0002000
19#define regi_clkgen 0xb0004000
20#define regi_ddr2_ctrl 0xb0006000
21#define regi_dma0 0xb0008000
22#define regi_dma1 0xb000a000
23#define regi_dma11 0xb000c000
24#define regi_dma2 0xb000e000
25#define regi_dma3 0xb0010000
26#define regi_dma4 0xb0012000
27#define regi_dma5 0xb0014000
28#define regi_dma6 0xb0016000
29#define regi_dma7 0xb0018000
30#define regi_dma9 0xb001a000
31#define regi_eth 0xb001c000
32#define regi_gio 0xb0020000
33#define regi_h264 0xb0022000
34#define regi_hist 0xb0026000
35#define regi_iop 0xb0028000
36#define regi_iop_version 0xb0028000
37#define regi_iop_fifo_in_extra 0xb0028040
38#define regi_iop_fifo_out_extra 0xb0028080
39#define regi_iop_trigger_grp0 0xb00280c0
40#define regi_iop_trigger_grp1 0xb0028100
41#define regi_iop_trigger_grp2 0xb0028140
42#define regi_iop_trigger_grp3 0xb0028180
43#define regi_iop_trigger_grp4 0xb00281c0
44#define regi_iop_trigger_grp5 0xb0028200
45#define regi_iop_trigger_grp6 0xb0028240
46#define regi_iop_trigger_grp7 0xb0028280
47#define regi_iop_crc_par 0xb0028300
48#define regi_iop_dmc_in 0xb0028380
49#define regi_iop_dmc_out 0xb0028400
50#define regi_iop_fifo_in 0xb0028480
51#define regi_iop_fifo_out 0xb0028500
52#define regi_iop_scrc_in 0xb0028580
53#define regi_iop_scrc_out 0xb0028600
54#define regi_iop_timer_grp0 0xb0028680
55#define regi_iop_timer_grp1 0xb0028700
56#define regi_iop_sap_in 0xb0028800
57#define regi_iop_sap_out 0xb0028900
58#define regi_iop_spu 0xb0028a00
59#define regi_iop_sw_cfg 0xb0028b00
60#define regi_iop_sw_cpu 0xb0028c00
61#define regi_iop_sw_mpu 0xb0028d00
62#define regi_iop_sw_spu 0xb0028e00
63#define regi_iop_mpu 0xb0029000
64#define regi_irq 0xb002a000
65#define regi_jpeg 0xb002c000
66#define regi_l2cache 0xb0030000
67#define regi_marb_bar 0xb0032000
68#define regi_marb_bar_bp0 0xb0032140
69#define regi_marb_bar_bp1 0xb0032180
70#define regi_marb_bar_bp2 0xb00321c0
71#define regi_marb_bar_bp3 0xb0032200
72#define regi_marb_foo 0xb0034000
73#define regi_marb_foo_bp0 0xb0034280
74#define regi_marb_foo_bp1 0xb00342c0
75#define regi_marb_foo_bp2 0xb0034300
76#define regi_marb_foo_bp3 0xb0034340
77#define regi_pinmux 0xb0038000
78#define regi_pio 0xb0036000
79#define regi_sclr 0xb003a000
80#define regi_sclr_fifo 0xb003c000
81#define regi_ser0 0xb003e000
82#define regi_ser1 0xb0040000
83#define regi_ser2 0xb0042000
84#define regi_ser3 0xb0044000
85#define regi_ser4 0xb0046000
86#define regi_sser 0xb0048000
87#define regi_strcop 0xb004a000
88#define regi_strdma0 0xb004e000
89#define regi_strdma1 0xb0050000
90#define regi_strdma2 0xb0052000
91#define regi_strdma3 0xb0054000
92#define regi_strdma5 0xb0056000
93#define regi_strmux 0xb004c000
94#define regi_timer0 0xb0058000
95#define regi_timer1 0xb005a000
96#define regi_trace 0xb005c000
97#define regi_vin 0xb005e000
98#define regi_vout 0xb0060000
99#endif /* __reg_map_asm_h */
diff --git a/include/asm-cris/arch-v32/mach-a3/hwregs/asm/timer_defs_asm.h b/include/asm-cris/arch-v32/mach-a3/hwregs/asm/timer_defs_asm.h
new file mode 100644
index 000000000000..b129e826fc34
--- /dev/null
+++ b/include/asm-cris/arch-v32/mach-a3/hwregs/asm/timer_defs_asm.h
@@ -0,0 +1,228 @@
1#ifndef __timer_defs_asm_h
2#define __timer_defs_asm_h
3
4/*
5 * This file is autogenerated from
6 * file: timer.r
7 *
8 * by ../../../tools/rdesc/bin/rdes2c -asm -outfile timer_defs_asm.h timer.r
9 * Any changes here will be lost.
10 *
11 * -*- buffer-read-only: t -*-
12 */
13
14#ifndef REG_FIELD
15#define REG_FIELD( scope, reg, field, value ) \
16 REG_FIELD_X_( value, reg_##scope##_##reg##___##field##___lsb )
17#define REG_FIELD_X_( value, shift ) ((value) << shift)
18#endif
19
20#ifndef REG_STATE
21#define REG_STATE( scope, reg, field, symbolic_value ) \
22 REG_STATE_X_( regk_##scope##_##symbolic_value, reg_##scope##_##reg##___##field##___lsb )
23#define REG_STATE_X_( k, shift ) (k << shift)
24#endif
25
26#ifndef REG_MASK
27#define REG_MASK( scope, reg, field ) \
28 REG_MASK_X_( reg_##scope##_##reg##___##field##___width, reg_##scope##_##reg##___##field##___lsb )
29#define REG_MASK_X_( width, lsb ) (((1 << width)-1) << lsb)
30#endif
31
32#ifndef REG_LSB
33#define REG_LSB( scope, reg, field ) reg_##scope##_##reg##___##field##___lsb
34#endif
35
36#ifndef REG_BIT
37#define REG_BIT( scope, reg, field ) reg_##scope##_##reg##___##field##___bit
38#endif
39
40#ifndef REG_ADDR
41#define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset)
42#define REG_ADDR_X_( inst, offs ) ((inst) + offs)
43#endif
44
45#ifndef REG_ADDR_VECT
46#define REG_ADDR_VECT( scope, inst, reg, index ) \
47 REG_ADDR_VECT_X_(inst, reg_##scope##_##reg##_offset, index, \
48 STRIDE_##scope##_##reg )
49#define REG_ADDR_VECT_X_( inst, offs, index, stride ) \
50 ((inst) + offs + (index) * stride)
51#endif
52
53/* Register rw_tmr0_div, scope timer, type rw */
54#define reg_timer_rw_tmr0_div_offset 0
55
56/* Register r_tmr0_data, scope timer, type r */
57#define reg_timer_r_tmr0_data_offset 4
58
59/* Register rw_tmr0_ctrl, scope timer, type rw */
60#define reg_timer_rw_tmr0_ctrl___op___lsb 0
61#define reg_timer_rw_tmr0_ctrl___op___width 2
62#define reg_timer_rw_tmr0_ctrl___freq___lsb 2
63#define reg_timer_rw_tmr0_ctrl___freq___width 3
64#define reg_timer_rw_tmr0_ctrl_offset 8
65
66/* Register rw_tmr1_div, scope timer, type rw */
67#define reg_timer_rw_tmr1_div_offset 16
68
69/* Register r_tmr1_data, scope timer, type r */
70#define reg_timer_r_tmr1_data_offset 20
71
72/* Register rw_tmr1_ctrl, scope timer, type rw */
73#define reg_timer_rw_tmr1_ctrl___op___lsb 0
74#define reg_timer_rw_tmr1_ctrl___op___width 2
75#define reg_timer_rw_tmr1_ctrl___freq___lsb 2
76#define reg_timer_rw_tmr1_ctrl___freq___width 3
77#define reg_timer_rw_tmr1_ctrl_offset 24
78
79/* Register rs_cnt_data, scope timer, type rs */
80#define reg_timer_rs_cnt_data___tmr___lsb 0
81#define reg_timer_rs_cnt_data___tmr___width 24
82#define reg_timer_rs_cnt_data___cnt___lsb 24
83#define reg_timer_rs_cnt_data___cnt___width 8
84#define reg_timer_rs_cnt_data_offset 32
85
86/* Register r_cnt_data, scope timer, type r */
87#define reg_timer_r_cnt_data___tmr___lsb 0
88#define reg_timer_r_cnt_data___tmr___width 24
89#define reg_timer_r_cnt_data___cnt___lsb 24
90#define reg_timer_r_cnt_data___cnt___width 8
91#define reg_timer_r_cnt_data_offset 36
92
93/* Register rw_cnt_cfg, scope timer, type rw */
94#define reg_timer_rw_cnt_cfg___clk___lsb 0
95#define reg_timer_rw_cnt_cfg___clk___width 2
96#define reg_timer_rw_cnt_cfg_offset 40
97
98/* Register rw_trig, scope timer, type rw */
99#define reg_timer_rw_trig_offset 48
100
101/* Register rw_trig_cfg, scope timer, type rw */
102#define reg_timer_rw_trig_cfg___tmr___lsb 0
103#define reg_timer_rw_trig_cfg___tmr___width 2
104#define reg_timer_rw_trig_cfg_offset 52
105
106/* Register r_time, scope timer, type r */
107#define reg_timer_r_time_offset 56
108
109/* Register rw_out, scope timer, type rw */
110#define reg_timer_rw_out___tmr___lsb 0
111#define reg_timer_rw_out___tmr___width 2
112#define reg_timer_rw_out_offset 60
113
114/* Register rw_wd_ctrl, scope timer, type rw */
115#define reg_timer_rw_wd_ctrl___cnt___lsb 0
116#define reg_timer_rw_wd_ctrl___cnt___width 8
117#define reg_timer_rw_wd_ctrl___cmd___lsb 8
118#define reg_timer_rw_wd_ctrl___cmd___width 1
119#define reg_timer_rw_wd_ctrl___cmd___bit 8
120#define reg_timer_rw_wd_ctrl___key___lsb 9
121#define reg_timer_rw_wd_ctrl___key___width 7
122#define reg_timer_rw_wd_ctrl_offset 64
123
124/* Register r_wd_stat, scope timer, type r */
125#define reg_timer_r_wd_stat___cnt___lsb 0
126#define reg_timer_r_wd_stat___cnt___width 8
127#define reg_timer_r_wd_stat___cmd___lsb 8
128#define reg_timer_r_wd_stat___cmd___width 1
129#define reg_timer_r_wd_stat___cmd___bit 8
130#define reg_timer_r_wd_stat_offset 68
131
132/* Register rw_intr_mask, scope timer, type rw */
133#define reg_timer_rw_intr_mask___tmr0___lsb 0
134#define reg_timer_rw_intr_mask___tmr0___width 1
135#define reg_timer_rw_intr_mask___tmr0___bit 0
136#define reg_timer_rw_intr_mask___tmr1___lsb 1
137#define reg_timer_rw_intr_mask___tmr1___width 1
138#define reg_timer_rw_intr_mask___tmr1___bit 1
139#define reg_timer_rw_intr_mask___cnt___lsb 2
140#define reg_timer_rw_intr_mask___cnt___width 1
141#define reg_timer_rw_intr_mask___cnt___bit 2
142#define reg_timer_rw_intr_mask___trig___lsb 3
143#define reg_timer_rw_intr_mask___trig___width 1
144#define reg_timer_rw_intr_mask___trig___bit 3
145#define reg_timer_rw_intr_mask_offset 72
146
147/* Register rw_ack_intr, scope timer, type rw */
148#define reg_timer_rw_ack_intr___tmr0___lsb 0
149#define reg_timer_rw_ack_intr___tmr0___width 1
150#define reg_timer_rw_ack_intr___tmr0___bit 0
151#define reg_timer_rw_ack_intr___tmr1___lsb 1
152#define reg_timer_rw_ack_intr___tmr1___width 1
153#define reg_timer_rw_ack_intr___tmr1___bit 1
154#define reg_timer_rw_ack_intr___cnt___lsb 2
155#define reg_timer_rw_ack_intr___cnt___width 1
156#define reg_timer_rw_ack_intr___cnt___bit 2
157#define reg_timer_rw_ack_intr___trig___lsb 3
158#define reg_timer_rw_ack_intr___trig___width 1
159#define reg_timer_rw_ack_intr___trig___bit 3
160#define reg_timer_rw_ack_intr_offset 76
161
162/* Register r_intr, scope timer, type r */
163#define reg_timer_r_intr___tmr0___lsb 0
164#define reg_timer_r_intr___tmr0___width 1
165#define reg_timer_r_intr___tmr0___bit 0
166#define reg_timer_r_intr___tmr1___lsb 1
167#define reg_timer_r_intr___tmr1___width 1
168#define reg_timer_r_intr___tmr1___bit 1
169#define reg_timer_r_intr___cnt___lsb 2
170#define reg_timer_r_intr___cnt___width 1
171#define reg_timer_r_intr___cnt___bit 2
172#define reg_timer_r_intr___trig___lsb 3
173#define reg_timer_r_intr___trig___width 1
174#define reg_timer_r_intr___trig___bit 3
175#define reg_timer_r_intr_offset 80
176
177/* Register r_masked_intr, scope timer, type r */
178#define reg_timer_r_masked_intr___tmr0___lsb 0
179#define reg_timer_r_masked_intr___tmr0___width 1
180#define reg_timer_r_masked_intr___tmr0___bit 0
181#define reg_timer_r_masked_intr___tmr1___lsb 1
182#define reg_timer_r_masked_intr___tmr1___width 1
183#define reg_timer_r_masked_intr___tmr1___bit 1
184#define reg_timer_r_masked_intr___cnt___lsb 2
185#define reg_timer_r_masked_intr___cnt___width 1
186#define reg_timer_r_masked_intr___cnt___bit 2
187#define reg_timer_r_masked_intr___trig___lsb 3
188#define reg_timer_r_masked_intr___trig___width 1
189#define reg_timer_r_masked_intr___trig___bit 3
190#define reg_timer_r_masked_intr_offset 84
191
192/* Register rw_test, scope timer, type rw */
193#define reg_timer_rw_test___dis___lsb 0
194#define reg_timer_rw_test___dis___width 1
195#define reg_timer_rw_test___dis___bit 0
196#define reg_timer_rw_test___en___lsb 1
197#define reg_timer_rw_test___en___width 1
198#define reg_timer_rw_test___en___bit 1
199#define reg_timer_rw_test_offset 88
200
201
202/* Constants */
203#define regk_timer_ext 0x00000001
204#define regk_timer_f100 0x00000007
205#define regk_timer_f29_493 0x00000004
206#define regk_timer_f32 0x00000005
207#define regk_timer_f32_768 0x00000006
208#define regk_timer_f90 0x00000003
209#define regk_timer_hold 0x00000001
210#define regk_timer_ld 0x00000000
211#define regk_timer_no 0x00000000
212#define regk_timer_off 0x00000000
213#define regk_timer_run 0x00000002
214#define regk_timer_rw_cnt_cfg_default 0x00000000
215#define regk_timer_rw_intr_mask_default 0x00000000
216#define regk_timer_rw_out_default 0x00000000
217#define regk_timer_rw_test_default 0x00000000
218#define regk_timer_rw_tmr0_ctrl_default 0x00000000
219#define regk_timer_rw_tmr1_ctrl_default 0x00000000
220#define regk_timer_rw_trig_cfg_default 0x00000000
221#define regk_timer_start 0x00000001
222#define regk_timer_stop 0x00000000
223#define regk_timer_time 0x00000001
224#define regk_timer_tmr0 0x00000002
225#define regk_timer_tmr1 0x00000003
226#define regk_timer_vclk 0x00000002
227#define regk_timer_yes 0x00000001
228#endif /* __timer_defs_asm_h */
diff --git a/include/asm-cris/arch-v32/mach-a3/hwregs/clkgen_defs.h b/include/asm-cris/arch-v32/mach-a3/hwregs/clkgen_defs.h
new file mode 100644
index 000000000000..c1e9ba93b3a3
--- /dev/null
+++ b/include/asm-cris/arch-v32/mach-a3/hwregs/clkgen_defs.h
@@ -0,0 +1,159 @@
1#ifndef __clkgen_defs_h
2#define __clkgen_defs_h
3
4/*
5 * This file is autogenerated from
6 * file: clkgen.r
7 *
8 * by ../../../tools/rdesc/bin/rdes2c -outfile clkgen_defs.h clkgen.r
9 * Any changes here will be lost.
10 *
11 * -*- buffer-read-only: t -*-
12 */
13/* Main access macros */
14#ifndef REG_RD
15#define REG_RD( scope, inst, reg ) \
16 REG_READ( reg_##scope##_##reg, \
17 (inst) + REG_RD_ADDR_##scope##_##reg )
18#endif
19
20#ifndef REG_WR
21#define REG_WR( scope, inst, reg, val ) \
22 REG_WRITE( reg_##scope##_##reg, \
23 (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
24#endif
25
26#ifndef REG_RD_VECT
27#define REG_RD_VECT( scope, inst, reg, index ) \
28 REG_READ( reg_##scope##_##reg, \
29 (inst) + REG_RD_ADDR_##scope##_##reg + \
30 (index) * STRIDE_##scope##_##reg )
31#endif
32
33#ifndef REG_WR_VECT
34#define REG_WR_VECT( scope, inst, reg, index, val ) \
35 REG_WRITE( reg_##scope##_##reg, \
36 (inst) + REG_WR_ADDR_##scope##_##reg + \
37 (index) * STRIDE_##scope##_##reg, (val) )
38#endif
39
40#ifndef REG_RD_INT
41#define REG_RD_INT( scope, inst, reg ) \
42 REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg )
43#endif
44
45#ifndef REG_WR_INT
46#define REG_WR_INT( scope, inst, reg, val ) \
47 REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
48#endif
49
50#ifndef REG_RD_INT_VECT
51#define REG_RD_INT_VECT( scope, inst, reg, index ) \
52 REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg + \
53 (index) * STRIDE_##scope##_##reg )
54#endif
55
56#ifndef REG_WR_INT_VECT
57#define REG_WR_INT_VECT( scope, inst, reg, index, val ) \
58 REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg + \
59 (index) * STRIDE_##scope##_##reg, (val) )
60#endif
61
62#ifndef REG_TYPE_CONV
63#define REG_TYPE_CONV( type, orgtype, val ) \
64 ( { union { orgtype o; type n; } r; r.o = val; r.n; } )
65#endif
66
67#ifndef reg_page_size
68#define reg_page_size 8192
69#endif
70
71#ifndef REG_ADDR
72#define REG_ADDR( scope, inst, reg ) \
73 ( (inst) + REG_RD_ADDR_##scope##_##reg )
74#endif
75
76#ifndef REG_ADDR_VECT
77#define REG_ADDR_VECT( scope, inst, reg, index ) \
78 ( (inst) + REG_RD_ADDR_##scope##_##reg + \
79 (index) * STRIDE_##scope##_##reg )
80#endif
81
82/* C-code for register scope clkgen */
83
84/* Register r_bootsel, scope clkgen, type r */
85typedef struct {
86 unsigned int boot_mode : 5;
87 unsigned int intern_main_clk : 1;
88 unsigned int extern_usb2_clk : 1;
89 unsigned int dummy1 : 25;
90} reg_clkgen_r_bootsel;
91#define REG_RD_ADDR_clkgen_r_bootsel 0
92
93/* Register rw_clk_ctrl, scope clkgen, type rw */
94typedef struct {
95 unsigned int pll : 1;
96 unsigned int cpu : 1;
97 unsigned int iop_usb : 1;
98 unsigned int vin : 1;
99 unsigned int sclr : 1;
100 unsigned int h264 : 1;
101 unsigned int ddr2 : 1;
102 unsigned int vout_hist : 1;
103 unsigned int eth : 1;
104 unsigned int ccd_tg_200 : 1;
105 unsigned int dma0_1_eth : 1;
106 unsigned int ccd_tg_100 : 1;
107 unsigned int jpeg : 1;
108 unsigned int sser_ser_dma6_7 : 1;
109 unsigned int strdma0_2_video : 1;
110 unsigned int dma2_3_strcop : 1;
111 unsigned int dma4_5_iop : 1;
112 unsigned int dma9_11 : 1;
113 unsigned int memarb_bar_ddr : 1;
114 unsigned int sclr_h264 : 1;
115 unsigned int dummy1 : 12;
116} reg_clkgen_rw_clk_ctrl;
117#define REG_RD_ADDR_clkgen_rw_clk_ctrl 4
118#define REG_WR_ADDR_clkgen_rw_clk_ctrl 4
119
120
121/* Constants */
122enum {
123 regk_clkgen_eth1000_rx = 0x0000000c,
124 regk_clkgen_eth1000_tx = 0x0000000e,
125 regk_clkgen_eth100_rx = 0x0000001d,
126 regk_clkgen_eth100_rx_half = 0x0000001c,
127 regk_clkgen_eth100_tx = 0x0000001f,
128 regk_clkgen_eth100_tx_half = 0x0000001e,
129 regk_clkgen_nand_3_2 = 0x00000000,
130 regk_clkgen_nand_3_2_0x30 = 0x00000002,
131 regk_clkgen_nand_3_2_0x30_pll = 0x00000012,
132 regk_clkgen_nand_3_2_pll = 0x00000010,
133 regk_clkgen_nand_3_3 = 0x00000001,
134 regk_clkgen_nand_3_3_0x30 = 0x00000003,
135 regk_clkgen_nand_3_3_0x30_pll = 0x00000013,
136 regk_clkgen_nand_3_3_pll = 0x00000011,
137 regk_clkgen_nand_4_2 = 0x00000004,
138 regk_clkgen_nand_4_2_0x30 = 0x00000006,
139 regk_clkgen_nand_4_2_0x30_pll = 0x00000016,
140 regk_clkgen_nand_4_2_pll = 0x00000014,
141 regk_clkgen_nand_4_3 = 0x00000005,
142 regk_clkgen_nand_4_3_0x30 = 0x00000007,
143 regk_clkgen_nand_4_3_0x30_pll = 0x00000017,
144 regk_clkgen_nand_4_3_pll = 0x00000015,
145 regk_clkgen_nand_5_2 = 0x00000008,
146 regk_clkgen_nand_5_2_0x30 = 0x0000000a,
147 regk_clkgen_nand_5_2_0x30_pll = 0x0000001a,
148 regk_clkgen_nand_5_2_pll = 0x00000018,
149 regk_clkgen_nand_5_3 = 0x00000009,
150 regk_clkgen_nand_5_3_0x30 = 0x0000000b,
151 regk_clkgen_nand_5_3_0x30_pll = 0x0000001b,
152 regk_clkgen_nand_5_3_pll = 0x00000019,
153 regk_clkgen_no = 0x00000000,
154 regk_clkgen_rw_clk_ctrl_default = 0x00000002,
155 regk_clkgen_ser = 0x0000000d,
156 regk_clkgen_ser_pll = 0x0000000f,
157 regk_clkgen_yes = 0x00000001
158};
159#endif /* __clkgen_defs_h */
diff --git a/include/asm-cris/arch-v32/mach-a3/hwregs/ddr2_defs.h b/include/asm-cris/arch-v32/mach-a3/hwregs/ddr2_defs.h
new file mode 100644
index 000000000000..0f30e8bf946d
--- /dev/null
+++ b/include/asm-cris/arch-v32/mach-a3/hwregs/ddr2_defs.h
@@ -0,0 +1,281 @@
1#ifndef __ddr2_defs_h
2#define __ddr2_defs_h
3
4/*
5 * This file is autogenerated from
6 * file: ddr2.r
7 *
8 * by ../../../tools/rdesc/bin/rdes2c -outfile ddr2_defs.h ddr2.r
9 * Any changes here will be lost.
10 *
11 * -*- buffer-read-only: t -*-
12 */
13/* Main access macros */
14#ifndef REG_RD
15#define REG_RD( scope, inst, reg ) \
16 REG_READ( reg_##scope##_##reg, \
17 (inst) + REG_RD_ADDR_##scope##_##reg )
18#endif
19
20#ifndef REG_WR
21#define REG_WR( scope, inst, reg, val ) \
22 REG_WRITE( reg_##scope##_##reg, \
23 (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
24#endif
25
26#ifndef REG_RD_VECT
27#define REG_RD_VECT( scope, inst, reg, index ) \
28 REG_READ( reg_##scope##_##reg, \
29 (inst) + REG_RD_ADDR_##scope##_##reg + \
30 (index) * STRIDE_##scope##_##reg )
31#endif
32
33#ifndef REG_WR_VECT
34#define REG_WR_VECT( scope, inst, reg, index, val ) \
35 REG_WRITE( reg_##scope##_##reg, \
36 (inst) + REG_WR_ADDR_##scope##_##reg + \
37 (index) * STRIDE_##scope##_##reg, (val) )
38#endif
39
40#ifndef REG_RD_INT
41#define REG_RD_INT( scope, inst, reg ) \
42 REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg )
43#endif
44
45#ifndef REG_WR_INT
46#define REG_WR_INT( scope, inst, reg, val ) \
47 REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
48#endif
49
50#ifndef REG_RD_INT_VECT
51#define REG_RD_INT_VECT( scope, inst, reg, index ) \
52 REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg + \
53 (index) * STRIDE_##scope##_##reg )
54#endif
55
56#ifndef REG_WR_INT_VECT
57#define REG_WR_INT_VECT( scope, inst, reg, index, val ) \
58 REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg + \
59 (index) * STRIDE_##scope##_##reg, (val) )
60#endif
61
62#ifndef REG_TYPE_CONV
63#define REG_TYPE_CONV( type, orgtype, val ) \
64 ( { union { orgtype o; type n; } r; r.o = val; r.n; } )
65#endif
66
67#ifndef reg_page_size
68#define reg_page_size 8192
69#endif
70
71#ifndef REG_ADDR
72#define REG_ADDR( scope, inst, reg ) \
73 ( (inst) + REG_RD_ADDR_##scope##_##reg )
74#endif
75
76#ifndef REG_ADDR_VECT
77#define REG_ADDR_VECT( scope, inst, reg, index ) \
78 ( (inst) + REG_RD_ADDR_##scope##_##reg + \
79 (index) * STRIDE_##scope##_##reg )
80#endif
81
82/* C-code for register scope ddr2 */
83
84/* Register rw_cfg, scope ddr2, type rw */
85typedef struct {
86 unsigned int col_width : 4;
87 unsigned int nr_banks : 1;
88 unsigned int bw : 1;
89 unsigned int nr_ref : 4;
90 unsigned int ref_interval : 11;
91 unsigned int odt_ctrl : 2;
92 unsigned int odt_mem : 1;
93 unsigned int imp_strength : 1;
94 unsigned int auto_imp_cal : 1;
95 unsigned int imp_cal_override : 1;
96 unsigned int dll_override : 1;
97 unsigned int dummy1 : 4;
98} reg_ddr2_rw_cfg;
99#define REG_RD_ADDR_ddr2_rw_cfg 0
100#define REG_WR_ADDR_ddr2_rw_cfg 0
101
102/* Register rw_timing, scope ddr2, type rw */
103typedef struct {
104 unsigned int wr : 3;
105 unsigned int rcd : 3;
106 unsigned int rp : 3;
107 unsigned int ras : 4;
108 unsigned int rfc : 7;
109 unsigned int rc : 5;
110 unsigned int rtp : 2;
111 unsigned int rtw : 3;
112 unsigned int wtr : 2;
113} reg_ddr2_rw_timing;
114#define REG_RD_ADDR_ddr2_rw_timing 4
115#define REG_WR_ADDR_ddr2_rw_timing 4
116
117/* Register rw_latency, scope ddr2, type rw */
118typedef struct {
119 unsigned int cas : 3;
120 unsigned int additive : 3;
121 unsigned int dummy1 : 26;
122} reg_ddr2_rw_latency;
123#define REG_RD_ADDR_ddr2_rw_latency 8
124#define REG_WR_ADDR_ddr2_rw_latency 8
125
126/* Register rw_phy_cfg, scope ddr2, type rw */
127typedef struct {
128 unsigned int en : 1;
129 unsigned int dummy1 : 31;
130} reg_ddr2_rw_phy_cfg;
131#define REG_RD_ADDR_ddr2_rw_phy_cfg 12
132#define REG_WR_ADDR_ddr2_rw_phy_cfg 12
133
134/* Register rw_phy_ctrl, scope ddr2, type rw */
135typedef struct {
136 unsigned int rst : 1;
137 unsigned int cal_rst : 1;
138 unsigned int cal_start : 1;
139 unsigned int dummy1 : 29;
140} reg_ddr2_rw_phy_ctrl;
141#define REG_RD_ADDR_ddr2_rw_phy_ctrl 16
142#define REG_WR_ADDR_ddr2_rw_phy_ctrl 16
143
144/* Register rw_ctrl, scope ddr2, type rw */
145typedef struct {
146 unsigned int mrs_data : 16;
147 unsigned int cmd : 8;
148 unsigned int dummy1 : 8;
149} reg_ddr2_rw_ctrl;
150#define REG_RD_ADDR_ddr2_rw_ctrl 20
151#define REG_WR_ADDR_ddr2_rw_ctrl 20
152
153/* Register rw_pwr_down, scope ddr2, type rw */
154typedef struct {
155 unsigned int self_ref : 2;
156 unsigned int phy_en : 1;
157 unsigned int dummy1 : 29;
158} reg_ddr2_rw_pwr_down;
159#define REG_RD_ADDR_ddr2_rw_pwr_down 24
160#define REG_WR_ADDR_ddr2_rw_pwr_down 24
161
162/* Register r_stat, scope ddr2, type r */
163typedef struct {
164 unsigned int dll_lock : 1;
165 unsigned int dll_delay_code : 7;
166 unsigned int imp_cal_done : 1;
167 unsigned int imp_cal_fault : 1;
168 unsigned int cal_imp_pu : 4;
169 unsigned int cal_imp_pd : 4;
170 unsigned int dummy1 : 14;
171} reg_ddr2_r_stat;
172#define REG_RD_ADDR_ddr2_r_stat 28
173
174/* Register rw_imp_ctrl, scope ddr2, type rw */
175typedef struct {
176 unsigned int imp_pu : 4;
177 unsigned int imp_pd : 4;
178 unsigned int dummy1 : 24;
179} reg_ddr2_rw_imp_ctrl;
180#define REG_RD_ADDR_ddr2_rw_imp_ctrl 32
181#define REG_WR_ADDR_ddr2_rw_imp_ctrl 32
182
183#define STRIDE_ddr2_rw_dll_ctrl 4
184/* Register rw_dll_ctrl, scope ddr2, type rw */
185typedef struct {
186 unsigned int mode : 1;
187 unsigned int clk_delay : 7;
188 unsigned int dummy1 : 24;
189} reg_ddr2_rw_dll_ctrl;
190#define REG_RD_ADDR_ddr2_rw_dll_ctrl 36
191#define REG_WR_ADDR_ddr2_rw_dll_ctrl 36
192
193#define STRIDE_ddr2_rw_dqs_dll_ctrl 4
194/* Register rw_dqs_dll_ctrl, scope ddr2, type rw */
195typedef struct {
196 unsigned int dqs90_delay : 7;
197 unsigned int dqs180_delay : 7;
198 unsigned int dqs270_delay : 7;
199 unsigned int dqs360_delay : 7;
200 unsigned int dummy1 : 4;
201} reg_ddr2_rw_dqs_dll_ctrl;
202#define REG_RD_ADDR_ddr2_rw_dqs_dll_ctrl 52
203#define REG_WR_ADDR_ddr2_rw_dqs_dll_ctrl 52
204
205
206/* Constants */
207enum {
208 regk_ddr2_al0 = 0x00000000,
209 regk_ddr2_al1 = 0x00000008,
210 regk_ddr2_al2 = 0x00000010,
211 regk_ddr2_al3 = 0x00000018,
212 regk_ddr2_al4 = 0x00000020,
213 regk_ddr2_auto = 0x00000003,
214 regk_ddr2_bank4 = 0x00000000,
215 regk_ddr2_bank8 = 0x00000001,
216 regk_ddr2_bl4 = 0x00000002,
217 regk_ddr2_bl8 = 0x00000003,
218 regk_ddr2_bt_il = 0x00000008,
219 regk_ddr2_bt_seq = 0x00000000,
220 regk_ddr2_bw16 = 0x00000001,
221 regk_ddr2_bw32 = 0x00000000,
222 regk_ddr2_cas2 = 0x00000020,
223 regk_ddr2_cas3 = 0x00000030,
224 regk_ddr2_cas4 = 0x00000040,
225 regk_ddr2_cas5 = 0x00000050,
226 regk_ddr2_deselect = 0x000000c0,
227 regk_ddr2_dic_weak = 0x00000002,
228 regk_ddr2_direct = 0x00000001,
229 regk_ddr2_dis = 0x00000000,
230 regk_ddr2_dll_dis = 0x00000001,
231 regk_ddr2_dll_en = 0x00000000,
232 regk_ddr2_dll_rst = 0x00000100,
233 regk_ddr2_emrs = 0x00000081,
234 regk_ddr2_emrs2 = 0x00000082,
235 regk_ddr2_emrs3 = 0x00000083,
236 regk_ddr2_full = 0x00000001,
237 regk_ddr2_hi_ref_rate = 0x00000080,
238 regk_ddr2_mrs = 0x00000080,
239 regk_ddr2_no = 0x00000000,
240 regk_ddr2_nop = 0x000000b8,
241 regk_ddr2_ocd_adj = 0x00000200,
242 regk_ddr2_ocd_default = 0x00000380,
243 regk_ddr2_ocd_drive0 = 0x00000100,
244 regk_ddr2_ocd_drive1 = 0x00000080,
245 regk_ddr2_ocd_exit = 0x00000000,
246 regk_ddr2_odt_dis = 0x00000000,
247 regk_ddr2_offs = 0x00000000,
248 regk_ddr2_pre = 0x00000090,
249 regk_ddr2_pre_all = 0x00000400,
250 regk_ddr2_pwr_down_fast = 0x00000000,
251 regk_ddr2_pwr_down_slow = 0x00001000,
252 regk_ddr2_ref = 0x00000088,
253 regk_ddr2_rtt150 = 0x00000040,
254 regk_ddr2_rtt50 = 0x00000044,
255 regk_ddr2_rtt75 = 0x00000004,
256 regk_ddr2_rw_cfg_default = 0x00186000,
257 regk_ddr2_rw_dll_ctrl_default = 0x00000000,
258 regk_ddr2_rw_dll_ctrl_size = 0x00000004,
259 regk_ddr2_rw_dqs_dll_ctrl_default = 0x00000000,
260 regk_ddr2_rw_dqs_dll_ctrl_size = 0x00000004,
261 regk_ddr2_rw_latency_default = 0x00000000,
262 regk_ddr2_rw_phy_cfg_default = 0x00000000,
263 regk_ddr2_rw_pwr_down_default = 0x00000000,
264 regk_ddr2_rw_timing_default = 0x00000000,
265 regk_ddr2_s1Gb = 0x0000001a,
266 regk_ddr2_s256Mb = 0x0000000f,
267 regk_ddr2_s2Gb = 0x00000027,
268 regk_ddr2_s4Gb = 0x00000042,
269 regk_ddr2_s512Mb = 0x00000015,
270 regk_ddr2_temp0_85 = 0x00000618,
271 regk_ddr2_temp85_95 = 0x0000030c,
272 regk_ddr2_term150 = 0x00000002,
273 regk_ddr2_term50 = 0x00000003,
274 regk_ddr2_term75 = 0x00000001,
275 regk_ddr2_test = 0x00000080,
276 regk_ddr2_weak = 0x00000000,
277 regk_ddr2_wr2 = 0x00000200,
278 regk_ddr2_wr3 = 0x00000400,
279 regk_ddr2_yes = 0x00000001
280};
281#endif /* __ddr2_defs_h */
diff --git a/include/asm-cris/arch-v32/mach-a3/hwregs/gio_defs.h b/include/asm-cris/arch-v32/mach-a3/hwregs/gio_defs.h
new file mode 100644
index 000000000000..5d88e0db23ae
--- /dev/null
+++ b/include/asm-cris/arch-v32/mach-a3/hwregs/gio_defs.h
@@ -0,0 +1,837 @@
1#ifndef __gio_defs_h
2#define __gio_defs_h
3
4/*
5 * This file is autogenerated from
6 * file: gio.r
7 *
8 * by ../../../tools/rdesc/bin/rdes2c -outfile gio_defs.h gio.r
9 * Any changes here will be lost.
10 *
11 * -*- buffer-read-only: t -*-
12 */
13/* Main access macros */
14#ifndef REG_RD
15#define REG_RD( scope, inst, reg ) \
16 REG_READ( reg_##scope##_##reg, \
17 (inst) + REG_RD_ADDR_##scope##_##reg )
18#endif
19
20#ifndef REG_WR
21#define REG_WR( scope, inst, reg, val ) \
22 REG_WRITE( reg_##scope##_##reg, \
23 (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
24#endif
25
26#ifndef REG_RD_VECT
27#define REG_RD_VECT( scope, inst, reg, index ) \
28 REG_READ( reg_##scope##_##reg, \
29 (inst) + REG_RD_ADDR_##scope##_##reg + \
30 (index) * STRIDE_##scope##_##reg )
31#endif
32
33#ifndef REG_WR_VECT
34#define REG_WR_VECT( scope, inst, reg, index, val ) \
35 REG_WRITE( reg_##scope##_##reg, \
36 (inst) + REG_WR_ADDR_##scope##_##reg + \
37 (index) * STRIDE_##scope##_##reg, (val) )
38#endif
39
40#ifndef REG_RD_INT
41#define REG_RD_INT( scope, inst, reg ) \
42 REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg )
43#endif
44
45#ifndef REG_WR_INT
46#define REG_WR_INT( scope, inst, reg, val ) \
47 REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
48#endif
49
50#ifndef REG_RD_INT_VECT
51#define REG_RD_INT_VECT( scope, inst, reg, index ) \
52 REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg + \
53 (index) * STRIDE_##scope##_##reg )
54#endif
55
56#ifndef REG_WR_INT_VECT
57#define REG_WR_INT_VECT( scope, inst, reg, index, val ) \
58 REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg + \
59 (index) * STRIDE_##scope##_##reg, (val) )
60#endif
61
62#ifndef REG_TYPE_CONV
63#define REG_TYPE_CONV( type, orgtype, val ) \
64 ( { union { orgtype o; type n; } r; r.o = val; r.n; } )
65#endif
66
67#ifndef reg_page_size
68#define reg_page_size 8192
69#endif
70
71#ifndef REG_ADDR
72#define REG_ADDR( scope, inst, reg ) \
73 ( (inst) + REG_RD_ADDR_##scope##_##reg )
74#endif
75
76#ifndef REG_ADDR_VECT
77#define REG_ADDR_VECT( scope, inst, reg, index ) \
78 ( (inst) + REG_RD_ADDR_##scope##_##reg + \
79 (index) * STRIDE_##scope##_##reg )
80#endif
81
82/* C-code for register scope gio */
83
84/* Register r_pa_din, scope gio, type r */
85typedef struct {
86 unsigned int data : 32;
87} reg_gio_r_pa_din;
88#define REG_RD_ADDR_gio_r_pa_din 0
89
90/* Register rw_pa_dout, scope gio, type rw */
91typedef struct {
92 unsigned int data : 32;
93} reg_gio_rw_pa_dout;
94#define REG_RD_ADDR_gio_rw_pa_dout 4
95#define REG_WR_ADDR_gio_rw_pa_dout 4
96
97/* Register rw_pa_oe, scope gio, type rw */
98typedef struct {
99 unsigned int oe : 32;
100} reg_gio_rw_pa_oe;
101#define REG_RD_ADDR_gio_rw_pa_oe 8
102#define REG_WR_ADDR_gio_rw_pa_oe 8
103
104/* Register rw_pa_byte0_dout, scope gio, type rw */
105typedef struct {
106 unsigned int data : 8;
107 unsigned int dummy1 : 24;
108} reg_gio_rw_pa_byte0_dout;
109#define REG_RD_ADDR_gio_rw_pa_byte0_dout 12
110#define REG_WR_ADDR_gio_rw_pa_byte0_dout 12
111
112/* Register rw_pa_byte0_oe, scope gio, type rw */
113typedef struct {
114 unsigned int oe : 8;
115 unsigned int dummy1 : 24;
116} reg_gio_rw_pa_byte0_oe;
117#define REG_RD_ADDR_gio_rw_pa_byte0_oe 16
118#define REG_WR_ADDR_gio_rw_pa_byte0_oe 16
119
120/* Register rw_pa_byte1_dout, scope gio, type rw */
121typedef struct {
122 unsigned int data : 8;
123 unsigned int dummy1 : 24;
124} reg_gio_rw_pa_byte1_dout;
125#define REG_RD_ADDR_gio_rw_pa_byte1_dout 20
126#define REG_WR_ADDR_gio_rw_pa_byte1_dout 20
127
128/* Register rw_pa_byte1_oe, scope gio, type rw */
129typedef struct {
130 unsigned int oe : 8;
131 unsigned int dummy1 : 24;
132} reg_gio_rw_pa_byte1_oe;
133#define REG_RD_ADDR_gio_rw_pa_byte1_oe 24
134#define REG_WR_ADDR_gio_rw_pa_byte1_oe 24
135
136/* Register rw_pa_byte2_dout, scope gio, type rw */
137typedef struct {
138 unsigned int data : 8;
139 unsigned int dummy1 : 24;
140} reg_gio_rw_pa_byte2_dout;
141#define REG_RD_ADDR_gio_rw_pa_byte2_dout 28
142#define REG_WR_ADDR_gio_rw_pa_byte2_dout 28
143
144/* Register rw_pa_byte2_oe, scope gio, type rw */
145typedef struct {
146 unsigned int oe : 8;
147 unsigned int dummy1 : 24;
148} reg_gio_rw_pa_byte2_oe;
149#define REG_RD_ADDR_gio_rw_pa_byte2_oe 32
150#define REG_WR_ADDR_gio_rw_pa_byte2_oe 32
151
152/* Register rw_pa_byte3_dout, scope gio, type rw */
153typedef struct {
154 unsigned int data : 8;
155 unsigned int dummy1 : 24;
156} reg_gio_rw_pa_byte3_dout;
157#define REG_RD_ADDR_gio_rw_pa_byte3_dout 36
158#define REG_WR_ADDR_gio_rw_pa_byte3_dout 36
159
160/* Register rw_pa_byte3_oe, scope gio, type rw */
161typedef struct {
162 unsigned int oe : 8;
163 unsigned int dummy1 : 24;
164} reg_gio_rw_pa_byte3_oe;
165#define REG_RD_ADDR_gio_rw_pa_byte3_oe 40
166#define REG_WR_ADDR_gio_rw_pa_byte3_oe 40
167
168/* Register r_pb_din, scope gio, type r */
169typedef struct {
170 unsigned int data : 32;
171} reg_gio_r_pb_din;
172#define REG_RD_ADDR_gio_r_pb_din 44
173
174/* Register rw_pb_dout, scope gio, type rw */
175typedef struct {
176 unsigned int data : 32;
177} reg_gio_rw_pb_dout;
178#define REG_RD_ADDR_gio_rw_pb_dout 48
179#define REG_WR_ADDR_gio_rw_pb_dout 48
180
181/* Register rw_pb_oe, scope gio, type rw */
182typedef struct {
183 unsigned int oe : 32;
184} reg_gio_rw_pb_oe;
185#define REG_RD_ADDR_gio_rw_pb_oe 52
186#define REG_WR_ADDR_gio_rw_pb_oe 52
187
188/* Register rw_pb_byte0_dout, scope gio, type rw */
189typedef struct {
190 unsigned int data : 8;
191 unsigned int dummy1 : 24;
192} reg_gio_rw_pb_byte0_dout;
193#define REG_RD_ADDR_gio_rw_pb_byte0_dout 56
194#define REG_WR_ADDR_gio_rw_pb_byte0_dout 56
195
196/* Register rw_pb_byte0_oe, scope gio, type rw */
197typedef struct {
198 unsigned int oe : 8;
199 unsigned int dummy1 : 24;
200} reg_gio_rw_pb_byte0_oe;
201#define REG_RD_ADDR_gio_rw_pb_byte0_oe 60
202#define REG_WR_ADDR_gio_rw_pb_byte0_oe 60
203
204/* Register rw_pb_byte1_dout, scope gio, type rw */
205typedef struct {
206 unsigned int data : 8;
207 unsigned int dummy1 : 24;
208} reg_gio_rw_pb_byte1_dout;
209#define REG_RD_ADDR_gio_rw_pb_byte1_dout 64
210#define REG_WR_ADDR_gio_rw_pb_byte1_dout 64
211
212/* Register rw_pb_byte1_oe, scope gio, type rw */
213typedef struct {
214 unsigned int oe : 8;
215 unsigned int dummy1 : 24;
216} reg_gio_rw_pb_byte1_oe;
217#define REG_RD_ADDR_gio_rw_pb_byte1_oe 68
218#define REG_WR_ADDR_gio_rw_pb_byte1_oe 68
219
220/* Register rw_pb_byte2_dout, scope gio, type rw */
221typedef struct {
222 unsigned int data : 8;
223 unsigned int dummy1 : 24;
224} reg_gio_rw_pb_byte2_dout;
225#define REG_RD_ADDR_gio_rw_pb_byte2_dout 72
226#define REG_WR_ADDR_gio_rw_pb_byte2_dout 72
227
228/* Register rw_pb_byte2_oe, scope gio, type rw */
229typedef struct {
230 unsigned int oe : 8;
231 unsigned int dummy1 : 24;
232} reg_gio_rw_pb_byte2_oe;
233#define REG_RD_ADDR_gio_rw_pb_byte2_oe 76
234#define REG_WR_ADDR_gio_rw_pb_byte2_oe 76
235
236/* Register rw_pb_byte3_dout, scope gio, type rw */
237typedef struct {
238 unsigned int data : 8;
239 unsigned int dummy1 : 24;
240} reg_gio_rw_pb_byte3_dout;
241#define REG_RD_ADDR_gio_rw_pb_byte3_dout 80
242#define REG_WR_ADDR_gio_rw_pb_byte3_dout 80
243
244/* Register rw_pb_byte3_oe, scope gio, type rw */
245typedef struct {
246 unsigned int oe : 8;
247 unsigned int dummy1 : 24;
248} reg_gio_rw_pb_byte3_oe;
249#define REG_RD_ADDR_gio_rw_pb_byte3_oe 84
250#define REG_WR_ADDR_gio_rw_pb_byte3_oe 84
251
252/* Register r_pc_din, scope gio, type r */
253typedef struct {
254 unsigned int data : 16;
255 unsigned int dummy1 : 16;
256} reg_gio_r_pc_din;
257#define REG_RD_ADDR_gio_r_pc_din 88
258
259/* Register rw_pc_dout, scope gio, type rw */
260typedef struct {
261 unsigned int data : 16;
262 unsigned int dummy1 : 16;
263} reg_gio_rw_pc_dout;
264#define REG_RD_ADDR_gio_rw_pc_dout 92
265#define REG_WR_ADDR_gio_rw_pc_dout 92
266
267/* Register rw_pc_oe, scope gio, type rw */
268typedef struct {
269 unsigned int oe : 16;
270 unsigned int dummy1 : 16;
271} reg_gio_rw_pc_oe;
272#define REG_RD_ADDR_gio_rw_pc_oe 96
273#define REG_WR_ADDR_gio_rw_pc_oe 96
274
275/* Register rw_pc_byte0_dout, scope gio, type rw */
276typedef struct {
277 unsigned int data : 8;
278 unsigned int dummy1 : 24;
279} reg_gio_rw_pc_byte0_dout;
280#define REG_RD_ADDR_gio_rw_pc_byte0_dout 100
281#define REG_WR_ADDR_gio_rw_pc_byte0_dout 100
282
283/* Register rw_pc_byte0_oe, scope gio, type rw */
284typedef struct {
285 unsigned int oe : 8;
286 unsigned int dummy1 : 24;
287} reg_gio_rw_pc_byte0_oe;
288#define REG_RD_ADDR_gio_rw_pc_byte0_oe 104
289#define REG_WR_ADDR_gio_rw_pc_byte0_oe 104
290
291/* Register rw_pc_byte1_dout, scope gio, type rw */
292typedef struct {
293 unsigned int data : 8;
294 unsigned int dummy1 : 24;
295} reg_gio_rw_pc_byte1_dout;
296#define REG_RD_ADDR_gio_rw_pc_byte1_dout 108
297#define REG_WR_ADDR_gio_rw_pc_byte1_dout 108
298
299/* Register rw_pc_byte1_oe, scope gio, type rw */
300typedef struct {
301 unsigned int oe : 8;
302 unsigned int dummy1 : 24;
303} reg_gio_rw_pc_byte1_oe;
304#define REG_RD_ADDR_gio_rw_pc_byte1_oe 112
305#define REG_WR_ADDR_gio_rw_pc_byte1_oe 112
306
307/* Register r_pd_din, scope gio, type r */
308typedef struct {
309 unsigned int data : 32;
310} reg_gio_r_pd_din;
311#define REG_RD_ADDR_gio_r_pd_din 116
312
313/* Register rw_intr_cfg, scope gio, type rw */
314typedef struct {
315 unsigned int intr0 : 3;
316 unsigned int intr1 : 3;
317 unsigned int intr2 : 3;
318 unsigned int intr3 : 3;
319 unsigned int intr4 : 3;
320 unsigned int intr5 : 3;
321 unsigned int intr6 : 3;
322 unsigned int intr7 : 3;
323 unsigned int dummy1 : 8;
324} reg_gio_rw_intr_cfg;
325#define REG_RD_ADDR_gio_rw_intr_cfg 120
326#define REG_WR_ADDR_gio_rw_intr_cfg 120
327
328/* Register rw_intr_pins, scope gio, type rw */
329typedef struct {
330 unsigned int intr0 : 4;
331 unsigned int intr1 : 4;
332 unsigned int intr2 : 4;
333 unsigned int intr3 : 4;
334 unsigned int intr4 : 4;
335 unsigned int intr5 : 4;
336 unsigned int intr6 : 4;
337 unsigned int intr7 : 4;
338} reg_gio_rw_intr_pins;
339#define REG_RD_ADDR_gio_rw_intr_pins 124
340#define REG_WR_ADDR_gio_rw_intr_pins 124
341
342/* Register rw_intr_mask, scope gio, type rw */
343typedef struct {
344 unsigned int intr0 : 1;
345 unsigned int intr1 : 1;
346 unsigned int intr2 : 1;
347 unsigned int intr3 : 1;
348 unsigned int intr4 : 1;
349 unsigned int intr5 : 1;
350 unsigned int intr6 : 1;
351 unsigned int intr7 : 1;
352 unsigned int i2c0_done : 1;
353 unsigned int i2c1_done : 1;
354 unsigned int dummy1 : 22;
355} reg_gio_rw_intr_mask;
356#define REG_RD_ADDR_gio_rw_intr_mask 128
357#define REG_WR_ADDR_gio_rw_intr_mask 128
358
359/* Register rw_ack_intr, scope gio, type rw */
360typedef struct {
361 unsigned int intr0 : 1;
362 unsigned int intr1 : 1;
363 unsigned int intr2 : 1;
364 unsigned int intr3 : 1;
365 unsigned int intr4 : 1;
366 unsigned int intr5 : 1;
367 unsigned int intr6 : 1;
368 unsigned int intr7 : 1;
369 unsigned int i2c0_done : 1;
370 unsigned int i2c1_done : 1;
371 unsigned int dummy1 : 22;
372} reg_gio_rw_ack_intr;
373#define REG_RD_ADDR_gio_rw_ack_intr 132
374#define REG_WR_ADDR_gio_rw_ack_intr 132
375
376/* Register r_intr, scope gio, type r */
377typedef struct {
378 unsigned int intr0 : 1;
379 unsigned int intr1 : 1;
380 unsigned int intr2 : 1;
381 unsigned int intr3 : 1;
382 unsigned int intr4 : 1;
383 unsigned int intr5 : 1;
384 unsigned int intr6 : 1;
385 unsigned int intr7 : 1;
386 unsigned int i2c0_done : 1;
387 unsigned int i2c1_done : 1;
388 unsigned int dummy1 : 22;
389} reg_gio_r_intr;
390#define REG_RD_ADDR_gio_r_intr 136
391
392/* Register r_masked_intr, scope gio, type r */
393typedef struct {
394 unsigned int intr0 : 1;
395 unsigned int intr1 : 1;
396 unsigned int intr2 : 1;
397 unsigned int intr3 : 1;
398 unsigned int intr4 : 1;
399 unsigned int intr5 : 1;
400 unsigned int intr6 : 1;
401 unsigned int intr7 : 1;
402 unsigned int i2c0_done : 1;
403 unsigned int i2c1_done : 1;
404 unsigned int dummy1 : 22;
405} reg_gio_r_masked_intr;
406#define REG_RD_ADDR_gio_r_masked_intr 140
407
408/* Register rw_i2c0_start, scope gio, type rw */
409typedef struct {
410 unsigned int run : 1;
411 unsigned int dummy1 : 31;
412} reg_gio_rw_i2c0_start;
413#define REG_RD_ADDR_gio_rw_i2c0_start 144
414#define REG_WR_ADDR_gio_rw_i2c0_start 144
415
416/* Register rw_i2c0_cfg, scope gio, type rw */
417typedef struct {
418 unsigned int en : 1;
419 unsigned int bit_order : 1;
420 unsigned int scl_io : 1;
421 unsigned int scl_inv : 1;
422 unsigned int sda_io : 1;
423 unsigned int sda_idle : 1;
424 unsigned int dummy1 : 26;
425} reg_gio_rw_i2c0_cfg;
426#define REG_RD_ADDR_gio_rw_i2c0_cfg 148
427#define REG_WR_ADDR_gio_rw_i2c0_cfg 148
428
429/* Register rw_i2c0_ctrl, scope gio, type rw */
430typedef struct {
431 unsigned int trf_bits : 6;
432 unsigned int switch_dir : 6;
433 unsigned int extra_start : 3;
434 unsigned int early_end : 1;
435 unsigned int start_stop : 1;
436 unsigned int ack_dir0 : 1;
437 unsigned int ack_dir1 : 1;
438 unsigned int ack_dir2 : 1;
439 unsigned int ack_dir3 : 1;
440 unsigned int ack_dir4 : 1;
441 unsigned int ack_dir5 : 1;
442 unsigned int ack_bit : 1;
443 unsigned int start_bit : 1;
444 unsigned int freq : 2;
445 unsigned int dummy1 : 5;
446} reg_gio_rw_i2c0_ctrl;
447#define REG_RD_ADDR_gio_rw_i2c0_ctrl 152
448#define REG_WR_ADDR_gio_rw_i2c0_ctrl 152
449
450/* Register rw_i2c0_data, scope gio, type rw */
451typedef struct {
452 unsigned int data0 : 8;
453 unsigned int data1 : 8;
454 unsigned int data2 : 8;
455 unsigned int data3 : 8;
456} reg_gio_rw_i2c0_data;
457#define REG_RD_ADDR_gio_rw_i2c0_data 156
458#define REG_WR_ADDR_gio_rw_i2c0_data 156
459
460/* Register rw_i2c0_data2, scope gio, type rw */
461typedef struct {
462 unsigned int data4 : 8;
463 unsigned int data5 : 8;
464 unsigned int start_val : 6;
465 unsigned int ack_val : 6;
466 unsigned int dummy1 : 4;
467} reg_gio_rw_i2c0_data2;
468#define REG_RD_ADDR_gio_rw_i2c0_data2 160
469#define REG_WR_ADDR_gio_rw_i2c0_data2 160
470
471/* Register rw_i2c1_start, scope gio, type rw */
472typedef struct {
473 unsigned int run : 1;
474 unsigned int dummy1 : 31;
475} reg_gio_rw_i2c1_start;
476#define REG_RD_ADDR_gio_rw_i2c1_start 164
477#define REG_WR_ADDR_gio_rw_i2c1_start 164
478
479/* Register rw_i2c1_cfg, scope gio, type rw */
480typedef struct {
481 unsigned int en : 1;
482 unsigned int bit_order : 1;
483 unsigned int scl_io : 1;
484 unsigned int scl_inv : 1;
485 unsigned int sda0_io : 1;
486 unsigned int sda0_idle : 1;
487 unsigned int sda1_io : 1;
488 unsigned int sda1_idle : 1;
489 unsigned int sda2_io : 1;
490 unsigned int sda2_idle : 1;
491 unsigned int sda3_io : 1;
492 unsigned int sda3_idle : 1;
493 unsigned int sda_sel : 2;
494 unsigned int sen_idle : 1;
495 unsigned int sen_inv : 1;
496 unsigned int sen_sel : 2;
497 unsigned int dummy1 : 14;
498} reg_gio_rw_i2c1_cfg;
499#define REG_RD_ADDR_gio_rw_i2c1_cfg 168
500#define REG_WR_ADDR_gio_rw_i2c1_cfg 168
501
502/* Register rw_i2c1_ctrl, scope gio, type rw */
503typedef struct {
504 unsigned int trf_bits : 6;
505 unsigned int switch_dir : 6;
506 unsigned int extra_start : 3;
507 unsigned int early_end : 1;
508 unsigned int start_stop : 1;
509 unsigned int ack_dir0 : 1;
510 unsigned int ack_dir1 : 1;
511 unsigned int ack_dir2 : 1;
512 unsigned int ack_dir3 : 1;
513 unsigned int ack_dir4 : 1;
514 unsigned int ack_dir5 : 1;
515 unsigned int ack_bit : 1;
516 unsigned int start_bit : 1;
517 unsigned int freq : 2;
518 unsigned int dummy1 : 5;
519} reg_gio_rw_i2c1_ctrl;
520#define REG_RD_ADDR_gio_rw_i2c1_ctrl 172
521#define REG_WR_ADDR_gio_rw_i2c1_ctrl 172
522
523/* Register rw_i2c1_data, scope gio, type rw */
524typedef struct {
525 unsigned int data0 : 8;
526 unsigned int data1 : 8;
527 unsigned int data2 : 8;
528 unsigned int data3 : 8;
529} reg_gio_rw_i2c1_data;
530#define REG_RD_ADDR_gio_rw_i2c1_data 176
531#define REG_WR_ADDR_gio_rw_i2c1_data 176
532
533/* Register rw_i2c1_data2, scope gio, type rw */
534typedef struct {
535 unsigned int data4 : 8;
536 unsigned int data5 : 8;
537 unsigned int start_val : 6;
538 unsigned int ack_val : 6;
539 unsigned int dummy1 : 4;
540} reg_gio_rw_i2c1_data2;
541#define REG_RD_ADDR_gio_rw_i2c1_data2 180
542#define REG_WR_ADDR_gio_rw_i2c1_data2 180
543
544/* Register r_ppwm_stat, scope gio, type r */
545typedef struct {
546 unsigned int freq : 2;
547 unsigned int dummy1 : 30;
548} reg_gio_r_ppwm_stat;
549#define REG_RD_ADDR_gio_r_ppwm_stat 184
550
551/* Register rw_ppwm_data, scope gio, type rw */
552typedef struct {
553 unsigned int data : 8;
554 unsigned int dummy1 : 24;
555} reg_gio_rw_ppwm_data;
556#define REG_RD_ADDR_gio_rw_ppwm_data 188
557#define REG_WR_ADDR_gio_rw_ppwm_data 188
558
559/* Register rw_pwm0_ctrl, scope gio, type rw */
560typedef struct {
561 unsigned int mode : 2;
562 unsigned int ccd_override : 1;
563 unsigned int ccd_val : 1;
564 unsigned int dummy1 : 28;
565} reg_gio_rw_pwm0_ctrl;
566#define REG_RD_ADDR_gio_rw_pwm0_ctrl 192
567#define REG_WR_ADDR_gio_rw_pwm0_ctrl 192
568
569/* Register rw_pwm0_var, scope gio, type rw */
570typedef struct {
571 unsigned int lo : 13;
572 unsigned int hi : 13;
573 unsigned int dummy1 : 6;
574} reg_gio_rw_pwm0_var;
575#define REG_RD_ADDR_gio_rw_pwm0_var 196
576#define REG_WR_ADDR_gio_rw_pwm0_var 196
577
578/* Register rw_pwm0_data, scope gio, type rw */
579typedef struct {
580 unsigned int data : 8;
581 unsigned int dummy1 : 24;
582} reg_gio_rw_pwm0_data;
583#define REG_RD_ADDR_gio_rw_pwm0_data 200
584#define REG_WR_ADDR_gio_rw_pwm0_data 200
585
586/* Register rw_pwm1_ctrl, scope gio, type rw */
587typedef struct {
588 unsigned int mode : 2;
589 unsigned int ccd_override : 1;
590 unsigned int ccd_val : 1;
591 unsigned int dummy1 : 28;
592} reg_gio_rw_pwm1_ctrl;
593#define REG_RD_ADDR_gio_rw_pwm1_ctrl 204
594#define REG_WR_ADDR_gio_rw_pwm1_ctrl 204
595
596/* Register rw_pwm1_var, scope gio, type rw */
597typedef struct {
598 unsigned int lo : 13;
599 unsigned int hi : 13;
600 unsigned int dummy1 : 6;
601} reg_gio_rw_pwm1_var;
602#define REG_RD_ADDR_gio_rw_pwm1_var 208
603#define REG_WR_ADDR_gio_rw_pwm1_var 208
604
605/* Register rw_pwm1_data, scope gio, type rw */
606typedef struct {
607 unsigned int data : 8;
608 unsigned int dummy1 : 24;
609} reg_gio_rw_pwm1_data;
610#define REG_RD_ADDR_gio_rw_pwm1_data 212
611#define REG_WR_ADDR_gio_rw_pwm1_data 212
612
613/* Register rw_pwm2_ctrl, scope gio, type rw */
614typedef struct {
615 unsigned int mode : 2;
616 unsigned int ccd_override : 1;
617 unsigned int ccd_val : 1;
618 unsigned int dummy1 : 28;
619} reg_gio_rw_pwm2_ctrl;
620#define REG_RD_ADDR_gio_rw_pwm2_ctrl 216
621#define REG_WR_ADDR_gio_rw_pwm2_ctrl 216
622
623/* Register rw_pwm2_var, scope gio, type rw */
624typedef struct {
625 unsigned int lo : 13;
626 unsigned int hi : 13;
627 unsigned int dummy1 : 6;
628} reg_gio_rw_pwm2_var;
629#define REG_RD_ADDR_gio_rw_pwm2_var 220
630#define REG_WR_ADDR_gio_rw_pwm2_var 220
631
632/* Register rw_pwm2_data, scope gio, type rw */
633typedef struct {
634 unsigned int data : 8;
635 unsigned int dummy1 : 24;
636} reg_gio_rw_pwm2_data;
637#define REG_RD_ADDR_gio_rw_pwm2_data 224
638#define REG_WR_ADDR_gio_rw_pwm2_data 224
639
640/* Register rw_pwm_in_cfg, scope gio, type rw */
641typedef struct {
642 unsigned int pin : 3;
643 unsigned int dummy1 : 29;
644} reg_gio_rw_pwm_in_cfg;
645#define REG_RD_ADDR_gio_rw_pwm_in_cfg 228
646#define REG_WR_ADDR_gio_rw_pwm_in_cfg 228
647
648/* Register r_pwm_in_lo, scope gio, type r */
649typedef struct {
650 unsigned int data : 32;
651} reg_gio_r_pwm_in_lo;
652#define REG_RD_ADDR_gio_r_pwm_in_lo 232
653
654/* Register r_pwm_in_hi, scope gio, type r */
655typedef struct {
656 unsigned int data : 32;
657} reg_gio_r_pwm_in_hi;
658#define REG_RD_ADDR_gio_r_pwm_in_hi 236
659
660/* Register r_pwm_in_cnt, scope gio, type r */
661typedef struct {
662 unsigned int data : 32;
663} reg_gio_r_pwm_in_cnt;
664#define REG_RD_ADDR_gio_r_pwm_in_cnt 240
665
666
667/* Constants */
668enum {
669 regk_gio_anyedge = 0x00000007,
670 regk_gio_f100k = 0x00000000,
671 regk_gio_f1562 = 0x00000000,
672 regk_gio_f195 = 0x00000003,
673 regk_gio_f1m = 0x00000002,
674 regk_gio_f390 = 0x00000002,
675 regk_gio_f400k = 0x00000001,
676 regk_gio_f5m = 0x00000003,
677 regk_gio_f781 = 0x00000001,
678 regk_gio_hi = 0x00000001,
679 regk_gio_in = 0x00000000,
680 regk_gio_intr_pa0 = 0x00000000,
681 regk_gio_intr_pa1 = 0x00000000,
682 regk_gio_intr_pa10 = 0x00000001,
683 regk_gio_intr_pa11 = 0x00000001,
684 regk_gio_intr_pa12 = 0x00000001,
685 regk_gio_intr_pa13 = 0x00000001,
686 regk_gio_intr_pa14 = 0x00000001,
687 regk_gio_intr_pa15 = 0x00000001,
688 regk_gio_intr_pa16 = 0x00000002,
689 regk_gio_intr_pa17 = 0x00000002,
690 regk_gio_intr_pa18 = 0x00000002,
691 regk_gio_intr_pa19 = 0x00000002,
692 regk_gio_intr_pa2 = 0x00000000,
693 regk_gio_intr_pa20 = 0x00000002,
694 regk_gio_intr_pa21 = 0x00000002,
695 regk_gio_intr_pa22 = 0x00000002,
696 regk_gio_intr_pa23 = 0x00000002,
697 regk_gio_intr_pa24 = 0x00000003,
698 regk_gio_intr_pa25 = 0x00000003,
699 regk_gio_intr_pa26 = 0x00000003,
700 regk_gio_intr_pa27 = 0x00000003,
701 regk_gio_intr_pa28 = 0x00000003,
702 regk_gio_intr_pa29 = 0x00000003,
703 regk_gio_intr_pa3 = 0x00000000,
704 regk_gio_intr_pa30 = 0x00000003,
705 regk_gio_intr_pa31 = 0x00000003,
706 regk_gio_intr_pa4 = 0x00000000,
707 regk_gio_intr_pa5 = 0x00000000,
708 regk_gio_intr_pa6 = 0x00000000,
709 regk_gio_intr_pa7 = 0x00000000,
710 regk_gio_intr_pa8 = 0x00000001,
711 regk_gio_intr_pa9 = 0x00000001,
712 regk_gio_intr_pb0 = 0x00000004,
713 regk_gio_intr_pb1 = 0x00000004,
714 regk_gio_intr_pb10 = 0x00000005,
715 regk_gio_intr_pb11 = 0x00000005,
716 regk_gio_intr_pb12 = 0x00000005,
717 regk_gio_intr_pb13 = 0x00000005,
718 regk_gio_intr_pb14 = 0x00000005,
719 regk_gio_intr_pb15 = 0x00000005,
720 regk_gio_intr_pb16 = 0x00000006,
721 regk_gio_intr_pb17 = 0x00000006,
722 regk_gio_intr_pb18 = 0x00000006,
723 regk_gio_intr_pb19 = 0x00000006,
724 regk_gio_intr_pb2 = 0x00000004,
725 regk_gio_intr_pb20 = 0x00000006,
726 regk_gio_intr_pb21 = 0x00000006,
727 regk_gio_intr_pb22 = 0x00000006,
728 regk_gio_intr_pb23 = 0x00000006,
729 regk_gio_intr_pb24 = 0x00000007,
730 regk_gio_intr_pb25 = 0x00000007,
731 regk_gio_intr_pb26 = 0x00000007,
732 regk_gio_intr_pb27 = 0x00000007,
733 regk_gio_intr_pb28 = 0x00000007,
734 regk_gio_intr_pb29 = 0x00000007,
735 regk_gio_intr_pb3 = 0x00000004,
736 regk_gio_intr_pb30 = 0x00000007,
737 regk_gio_intr_pb31 = 0x00000007,
738 regk_gio_intr_pb4 = 0x00000004,
739 regk_gio_intr_pb5 = 0x00000004,
740 regk_gio_intr_pb6 = 0x00000004,
741 regk_gio_intr_pb7 = 0x00000004,
742 regk_gio_intr_pb8 = 0x00000005,
743 regk_gio_intr_pb9 = 0x00000005,
744 regk_gio_intr_pc0 = 0x00000008,
745 regk_gio_intr_pc1 = 0x00000008,
746 regk_gio_intr_pc10 = 0x00000009,
747 regk_gio_intr_pc11 = 0x00000009,
748 regk_gio_intr_pc12 = 0x00000009,
749 regk_gio_intr_pc13 = 0x00000009,
750 regk_gio_intr_pc14 = 0x00000009,
751 regk_gio_intr_pc15 = 0x00000009,
752 regk_gio_intr_pc2 = 0x00000008,
753 regk_gio_intr_pc3 = 0x00000008,
754 regk_gio_intr_pc4 = 0x00000008,
755 regk_gio_intr_pc5 = 0x00000008,
756 regk_gio_intr_pc6 = 0x00000008,
757 regk_gio_intr_pc7 = 0x00000008,
758 regk_gio_intr_pc8 = 0x00000009,
759 regk_gio_intr_pc9 = 0x00000009,
760 regk_gio_intr_pd0 = 0x0000000c,
761 regk_gio_intr_pd1 = 0x0000000c,
762 regk_gio_intr_pd10 = 0x0000000d,
763 regk_gio_intr_pd11 = 0x0000000d,
764 regk_gio_intr_pd12 = 0x0000000d,
765 regk_gio_intr_pd13 = 0x0000000d,
766 regk_gio_intr_pd14 = 0x0000000d,
767 regk_gio_intr_pd15 = 0x0000000d,
768 regk_gio_intr_pd16 = 0x0000000e,
769 regk_gio_intr_pd17 = 0x0000000e,
770 regk_gio_intr_pd18 = 0x0000000e,
771 regk_gio_intr_pd19 = 0x0000000e,
772 regk_gio_intr_pd2 = 0x0000000c,
773 regk_gio_intr_pd20 = 0x0000000e,
774 regk_gio_intr_pd21 = 0x0000000e,
775 regk_gio_intr_pd22 = 0x0000000e,
776 regk_gio_intr_pd23 = 0x0000000e,
777 regk_gio_intr_pd24 = 0x0000000f,
778 regk_gio_intr_pd25 = 0x0000000f,
779 regk_gio_intr_pd26 = 0x0000000f,
780 regk_gio_intr_pd27 = 0x0000000f,
781 regk_gio_intr_pd28 = 0x0000000f,
782 regk_gio_intr_pd29 = 0x0000000f,
783 regk_gio_intr_pd3 = 0x0000000c,
784 regk_gio_intr_pd30 = 0x0000000f,
785 regk_gio_intr_pd31 = 0x0000000f,
786 regk_gio_intr_pd4 = 0x0000000c,
787 regk_gio_intr_pd5 = 0x0000000c,
788 regk_gio_intr_pd6 = 0x0000000c,
789 regk_gio_intr_pd7 = 0x0000000c,
790 regk_gio_intr_pd8 = 0x0000000d,
791 regk_gio_intr_pd9 = 0x0000000d,
792 regk_gio_lo = 0x00000002,
793 regk_gio_lsb = 0x00000000,
794 regk_gio_msb = 0x00000001,
795 regk_gio_negedge = 0x00000006,
796 regk_gio_no = 0x00000000,
797 regk_gio_no_switch = 0x0000003f,
798 regk_gio_none = 0x00000007,
799 regk_gio_off = 0x00000000,
800 regk_gio_opendrain = 0x00000000,
801 regk_gio_out = 0x00000001,
802 regk_gio_posedge = 0x00000005,
803 regk_gio_pwm_hfp = 0x00000002,
804 regk_gio_pwm_pa0 = 0x00000001,
805 regk_gio_pwm_pa19 = 0x00000004,
806 regk_gio_pwm_pa6 = 0x00000002,
807 regk_gio_pwm_pa7 = 0x00000003,
808 regk_gio_pwm_pb26 = 0x00000005,
809 regk_gio_pwm_pd23 = 0x00000006,
810 regk_gio_pwm_pd31 = 0x00000007,
811 regk_gio_pwm_std = 0x00000001,
812 regk_gio_pwm_var = 0x00000003,
813 regk_gio_rw_i2c0_cfg_default = 0x00000020,
814 regk_gio_rw_i2c0_ctrl_default = 0x00010000,
815 regk_gio_rw_i2c0_start_default = 0x00000000,
816 regk_gio_rw_i2c1_cfg_default = 0x00000aa0,
817 regk_gio_rw_i2c1_ctrl_default = 0x00010000,
818 regk_gio_rw_i2c1_start_default = 0x00000000,
819 regk_gio_rw_intr_cfg_default = 0x00000000,
820 regk_gio_rw_intr_mask_default = 0x00000000,
821 regk_gio_rw_pa_oe_default = 0x00000000,
822 regk_gio_rw_pb_oe_default = 0x00000000,
823 regk_gio_rw_pc_oe_default = 0x00000000,
824 regk_gio_rw_ppwm_data_default = 0x00000000,
825 regk_gio_rw_pwm0_ctrl_default = 0x00000000,
826 regk_gio_rw_pwm1_ctrl_default = 0x00000000,
827 regk_gio_rw_pwm2_ctrl_default = 0x00000000,
828 regk_gio_rw_pwm_in_cfg_default = 0x00000000,
829 regk_gio_sda0 = 0x00000000,
830 regk_gio_sda1 = 0x00000001,
831 regk_gio_sda2 = 0x00000002,
832 regk_gio_sda3 = 0x00000003,
833 regk_gio_sen = 0x00000000,
834 regk_gio_set = 0x00000003,
835 regk_gio_yes = 0x00000001
836};
837#endif /* __gio_defs_h */
diff --git a/include/asm-cris/arch-v32/mach-a3/hwregs/intr_vect.h b/include/asm-cris/arch-v32/mach-a3/hwregs/intr_vect.h
new file mode 100644
index 000000000000..bea699aa480e
--- /dev/null
+++ b/include/asm-cris/arch-v32/mach-a3/hwregs/intr_vect.h
@@ -0,0 +1,46 @@
1/* Interrupt vector numbers autogenerated by ../../../tools/rdesc/bin/rdes2intr
2 from intr_vect.r */
3
4#ifndef _INTR_VECT_R
5#define _INTR_VECT_R
6#define TIMER0_INTR_VECT 0x31
7#define TIMER1_INTR_VECT 0x32
8#define DMA0_INTR_VECT 0x33
9#define DMA1_INTR_VECT 0x34
10#define DMA2_INTR_VECT 0x35
11#define DMA3_INTR_VECT 0x36
12#define DMA4_INTR_VECT 0x37
13#define DMA5_INTR_VECT 0x38
14#define DMA6_INTR_VECT 0x39
15#define DMA7_INTR_VECT 0x3a
16#define DMA9_INTR_VECT 0x3b
17#define DMA11_INTR_VECT 0x3c
18#define GIO_INTR_VECT 0x3d
19#define IOP0_INTR_VECT 0x3e
20#define IOP1_INTR_VECT 0x3f
21#define SER0_INTR_VECT 0x40
22#define SER1_INTR_VECT 0x41
23#define SER2_INTR_VECT 0x42
24#define SER3_INTR_VECT 0x43
25#define SER4_INTR_VECT 0x44
26#define SSER_INTR_VECT 0x45
27#define STRDMA0_INTR_VECT 0x46
28#define STRDMA1_INTR_VECT 0x47
29#define STRDMA2_INTR_VECT 0x48
30#define STRDMA3_INTR_VECT 0x49
31#define STRDMA5_INTR_VECT 0x4a
32#define VIN_INTR_VECT 0x4b
33#define VOUT_INTR_VECT 0x4c
34#define JPEG_INTR_VECT 0x4d
35#define H264_INTR_VECT 0x4e
36#define HISTO_INTR_VECT 0x4f
37#define CCD_INTR_VECT 0x50
38#define ETH_INTR_VECT 0x51
39#define MEMARB_BAR_INTR_VECT 0x52
40#define MEMARB_FOO_INTR_VECT 0x53
41#define PIO_INTR_VECT 0x54
42#define SCLR_INTR_VECT 0x55
43#define SCLR_FIFO_INTR_VECT 0x56
44#define IPI_INTR_VECT 0x57
45#define NBR_INTR_VECT 0x58
46#endif
diff --git a/include/asm-cris/arch-v32/mach-a3/hwregs/intr_vect_defs.h b/include/asm-cris/arch-v32/mach-a3/hwregs/intr_vect_defs.h
new file mode 100644
index 000000000000..b820f6347c74
--- /dev/null
+++ b/include/asm-cris/arch-v32/mach-a3/hwregs/intr_vect_defs.h
@@ -0,0 +1,341 @@
1#ifndef __intr_vect_defs_h
2#define __intr_vect_defs_h
3
4/*
5 * This file is autogenerated from
6 * file: intr_vect.r
7 *
8 * by ../../../tools/rdesc/bin/rdes2c -outfile intr_vect_defs.h intr_vect.r
9 * Any changes here will be lost.
10 *
11 * -*- buffer-read-only: t -*-
12 */
13/* Main access macros */
14#ifndef REG_RD
15#define REG_RD( scope, inst, reg ) \
16 REG_READ( reg_##scope##_##reg, \
17 (inst) + REG_RD_ADDR_##scope##_##reg )
18#endif
19
20#ifndef REG_WR
21#define REG_WR( scope, inst, reg, val ) \
22 REG_WRITE( reg_##scope##_##reg, \
23 (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
24#endif
25
26#ifndef REG_RD_VECT
27#define REG_RD_VECT( scope, inst, reg, index ) \
28 REG_READ( reg_##scope##_##reg, \
29 (inst) + REG_RD_ADDR_##scope##_##reg + \
30 (index) * STRIDE_##scope##_##reg )
31#endif
32
33#ifndef REG_WR_VECT
34#define REG_WR_VECT( scope, inst, reg, index, val ) \
35 REG_WRITE( reg_##scope##_##reg, \
36 (inst) + REG_WR_ADDR_##scope##_##reg + \
37 (index) * STRIDE_##scope##_##reg, (val) )
38#endif
39
40#ifndef REG_RD_INT
41#define REG_RD_INT( scope, inst, reg ) \
42 REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg )
43#endif
44
45#ifndef REG_WR_INT
46#define REG_WR_INT( scope, inst, reg, val ) \
47 REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
48#endif
49
50#ifndef REG_RD_INT_VECT
51#define REG_RD_INT_VECT( scope, inst, reg, index ) \
52 REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg + \
53 (index) * STRIDE_##scope##_##reg )
54#endif
55
56#ifndef REG_WR_INT_VECT
57#define REG_WR_INT_VECT( scope, inst, reg, index, val ) \
58 REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg + \
59 (index) * STRIDE_##scope##_##reg, (val) )
60#endif
61
62#ifndef REG_TYPE_CONV
63#define REG_TYPE_CONV( type, orgtype, val ) \
64 ( { union { orgtype o; type n; } r; r.o = val; r.n; } )
65#endif
66
67#ifndef reg_page_size
68#define reg_page_size 8192
69#endif
70
71#ifndef REG_ADDR
72#define REG_ADDR( scope, inst, reg ) \
73 ( (inst) + REG_RD_ADDR_##scope##_##reg )
74#endif
75
76#ifndef REG_ADDR_VECT
77#define REG_ADDR_VECT( scope, inst, reg, index ) \
78 ( (inst) + REG_RD_ADDR_##scope##_##reg + \
79 (index) * STRIDE_##scope##_##reg )
80#endif
81
82/* C-code for register scope intr_vect */
83
84
85#define STRIDE_intr_vect_rw_mask 4
86/* Register rw_mask0, scope intr_vect, type rw */
87typedef struct {
88 unsigned int timer0 : 1;
89 unsigned int timer1 : 1;
90 unsigned int dma0 : 1;
91 unsigned int dma1 : 1;
92 unsigned int dma2 : 1;
93 unsigned int dma3 : 1;
94 unsigned int dma4 : 1;
95 unsigned int dma5 : 1;
96 unsigned int dma6 : 1;
97 unsigned int dma7 : 1;
98 unsigned int dma9 : 1;
99 unsigned int dma11 : 1;
100 unsigned int gio : 1;
101 unsigned int iop0 : 1;
102 unsigned int iop1 : 1;
103 unsigned int ser0 : 1;
104 unsigned int ser1 : 1;
105 unsigned int ser2 : 1;
106 unsigned int ser3 : 1;
107 unsigned int ser4 : 1;
108 unsigned int sser : 1;
109 unsigned int strdma0 : 1;
110 unsigned int strdma1 : 1;
111 unsigned int strdma2 : 1;
112 unsigned int strdma3 : 1;
113 unsigned int strdma5 : 1;
114 unsigned int vin : 1;
115 unsigned int vout : 1;
116 unsigned int jpeg : 1;
117 unsigned int h264 : 1;
118 unsigned int histo : 1;
119 unsigned int ccd : 1;
120} reg_intr_vect_rw_mask0;
121#define reg_intr_vect_rw_mask reg_intr_vect_rw_mask0
122#define REG_RD_ADDR_intr_vect_rw_mask 0
123#define REG_WR_ADDR_intr_vect_rw_mask 0
124#define REG_RD_ADDR_intr_vect_rw_mask0 0
125#define REG_WR_ADDR_intr_vect_rw_mask0 0
126
127#define STRIDE_intr_vect_r_vect 4
128/* Register r_vect0, scope intr_vect, type r */
129typedef struct {
130 unsigned int timer0 : 1;
131 unsigned int timer1 : 1;
132 unsigned int dma0 : 1;
133 unsigned int dma1 : 1;
134 unsigned int dma2 : 1;
135 unsigned int dma3 : 1;
136 unsigned int dma4 : 1;
137 unsigned int dma5 : 1;
138 unsigned int dma6 : 1;
139 unsigned int dma7 : 1;
140 unsigned int dma9 : 1;
141 unsigned int dma11 : 1;
142 unsigned int gio : 1;
143 unsigned int iop0 : 1;
144 unsigned int iop1 : 1;
145 unsigned int ser0 : 1;
146 unsigned int ser1 : 1;
147 unsigned int ser2 : 1;
148 unsigned int ser3 : 1;
149 unsigned int ser4 : 1;
150 unsigned int sser : 1;
151 unsigned int strdma0 : 1;
152 unsigned int strdma1 : 1;
153 unsigned int strdma2 : 1;
154 unsigned int strdma3 : 1;
155 unsigned int strdma5 : 1;
156 unsigned int vin : 1;
157 unsigned int vout : 1;
158 unsigned int jpeg : 1;
159 unsigned int h264 : 1;
160 unsigned int histo : 1;
161 unsigned int ccd : 1;
162} reg_intr_vect_r_vect0;
163#define reg_intr_vect_r_vect reg_intr_vect_r_vect0
164#define REG_RD_ADDR_intr_vect_r_vect 8
165#define REG_RD_ADDR_intr_vect_r_vect0 8
166
167#define STRIDE_intr_vect_r_masked_vect 4
168/* Register r_masked_vect0, scope intr_vect, type r */
169typedef struct {
170 unsigned int timer0 : 1;
171 unsigned int timer1 : 1;
172 unsigned int dma0 : 1;
173 unsigned int dma1 : 1;
174 unsigned int dma2 : 1;
175 unsigned int dma3 : 1;
176 unsigned int dma4 : 1;
177 unsigned int dma5 : 1;
178 unsigned int dma6 : 1;
179 unsigned int dma7 : 1;
180 unsigned int dma9 : 1;
181 unsigned int dma11 : 1;
182 unsigned int gio : 1;
183 unsigned int iop0 : 1;
184 unsigned int iop1 : 1;
185 unsigned int ser0 : 1;
186 unsigned int ser1 : 1;
187 unsigned int ser2 : 1;
188 unsigned int ser3 : 1;
189 unsigned int ser4 : 1;
190 unsigned int sser : 1;
191 unsigned int strdma0 : 1;
192 unsigned int strdma1 : 1;
193 unsigned int strdma2 : 1;
194 unsigned int strdma3 : 1;
195 unsigned int strdma5 : 1;
196 unsigned int vin : 1;
197 unsigned int vout : 1;
198 unsigned int jpeg : 1;
199 unsigned int h264 : 1;
200 unsigned int histo : 1;
201 unsigned int ccd : 1;
202} reg_intr_vect_r_masked_vect0;
203#define reg_intr_vect_r_masked_vect reg_intr_masked_vect_r_vect0
204#define REG_RD_ADDR_intr_vect_r_masked_vect0 16
205#define REG_RD_ADDR_intr_vect_r_masked_vect 16
206
207#define STRIDE_intr_vect_rw_xmask 4
208/* Register rw_xmask0, scope intr_vect, type rw */
209typedef struct {
210 unsigned int timer0 : 1;
211 unsigned int timer1 : 1;
212 unsigned int dma0 : 1;
213 unsigned int dma1 : 1;
214 unsigned int dma2 : 1;
215 unsigned int dma3 : 1;
216 unsigned int dma4 : 1;
217 unsigned int dma5 : 1;
218 unsigned int dma6 : 1;
219 unsigned int dma7 : 1;
220 unsigned int dma9 : 1;
221 unsigned int dma11 : 1;
222 unsigned int gio : 1;
223 unsigned int iop0 : 1;
224 unsigned int iop1 : 1;
225 unsigned int ser0 : 1;
226 unsigned int ser1 : 1;
227 unsigned int ser2 : 1;
228 unsigned int ser3 : 1;
229 unsigned int ser4 : 1;
230 unsigned int sser : 1;
231 unsigned int strdma0 : 1;
232 unsigned int strdma1 : 1;
233 unsigned int strdma2 : 1;
234 unsigned int strdma3 : 1;
235 unsigned int strdma5 : 1;
236 unsigned int vin : 1;
237 unsigned int vout : 1;
238 unsigned int jpeg : 1;
239 unsigned int h264 : 1;
240 unsigned int histo : 1;
241 unsigned int ccd : 1;
242} reg_intr_vect_rw_xmask0;
243#define reg_intr_vect_rw_xmask reg_intr_vect_rw_xmask0
244#define REG_RD_ADDR_intr_vect_rw_xmask0 24
245#define REG_WR_ADDR_intr_vect_rw_xmask0 24
246#define REG_RD_ADDR_intr_vect_rw_xmask 24
247#define REG_WR_ADDR_intr_vect_rw_xmask 24
248
249/* Register rw_mask1, scope intr_vect, type rw */
250typedef struct {
251 unsigned int eth : 1;
252 unsigned int memarb_bar : 1;
253 unsigned int memarb_foo : 1;
254 unsigned int pio : 1;
255 unsigned int sclr : 1;
256 unsigned int sclr_fifo : 1;
257 unsigned int dummy1 : 26;
258} reg_intr_vect_rw_mask1;
259#define REG_RD_ADDR_intr_vect_rw_mask1 4
260#define REG_WR_ADDR_intr_vect_rw_mask1 4
261
262/* Register r_vect1, scope intr_vect, type r */
263typedef struct {
264 unsigned int eth : 1;
265 unsigned int memarb_bar : 1;
266 unsigned int memarb_foo : 1;
267 unsigned int pio : 1;
268 unsigned int sclr : 1;
269 unsigned int sclr_fifo : 1;
270 unsigned int dummy1 : 26;
271} reg_intr_vect_r_vect1;
272#define REG_RD_ADDR_intr_vect_r_vect1 12
273
274/* Register r_masked_vect1, scope intr_vect, type r */
275typedef struct {
276 unsigned int eth : 1;
277 unsigned int memarb_bar : 1;
278 unsigned int memarb_foo : 1;
279 unsigned int pio : 1;
280 unsigned int sclr : 1;
281 unsigned int sclr_fifo : 1;
282 unsigned int dummy1 : 26;
283} reg_intr_vect_r_masked_vect1;
284#define REG_RD_ADDR_intr_vect_r_masked_vect1 20
285
286/* Register rw_xmask1, scope intr_vect, type rw */
287typedef struct {
288 unsigned int eth : 1;
289 unsigned int memarb_bar : 1;
290 unsigned int memarb_foo : 1;
291 unsigned int pio : 1;
292 unsigned int sclr : 1;
293 unsigned int sclr_fifo : 1;
294 unsigned int dummy1 : 26;
295} reg_intr_vect_rw_xmask1;
296#define REG_RD_ADDR_intr_vect_rw_xmask1 28
297#define REG_WR_ADDR_intr_vect_rw_xmask1 28
298
299/* Register rw_xmask_ctrl, scope intr_vect, type rw */
300typedef struct {
301 unsigned int en : 1;
302 unsigned int dummy1 : 31;
303} reg_intr_vect_rw_xmask_ctrl;
304#define REG_RD_ADDR_intr_vect_rw_xmask_ctrl 32
305#define REG_WR_ADDR_intr_vect_rw_xmask_ctrl 32
306
307/* Register r_nmi, scope intr_vect, type r */
308typedef struct {
309 unsigned int watchdog0 : 1;
310 unsigned int watchdog1 : 1;
311 unsigned int dummy1 : 30;
312} reg_intr_vect_r_nmi;
313#define REG_RD_ADDR_intr_vect_r_nmi 64
314
315/* Register r_guru, scope intr_vect, type r */
316typedef struct {
317 unsigned int jtag : 1;
318 unsigned int dummy1 : 31;
319} reg_intr_vect_r_guru;
320#define REG_RD_ADDR_intr_vect_r_guru 68
321
322
323/* Register rw_ipi, scope intr_vect, type rw */
324typedef struct
325{
326 unsigned int vector;
327} reg_intr_vect_rw_ipi;
328#define REG_RD_ADDR_intr_vect_rw_ipi 72
329#define REG_WR_ADDR_intr_vect_rw_ipi 72
330
331/* Constants */
332enum {
333 regk_intr_vect_no = 0x00000000,
334 regk_intr_vect_rw_mask0_default = 0x00000000,
335 regk_intr_vect_rw_mask1_default = 0x00000000,
336 regk_intr_vect_rw_xmask0_default = 0x00000000,
337 regk_intr_vect_rw_xmask1_default = 0x00000000,
338 regk_intr_vect_rw_xmask_ctrl_default = 0x00000000,
339 regk_intr_vect_yes = 0x00000001
340};
341#endif /* __intr_vect_defs_h */
diff --git a/include/asm-cris/arch-v32/mach-a3/hwregs/iop/asm/iop_reg_space_asm.h b/include/asm-cris/arch-v32/mach-a3/hwregs/iop/asm/iop_reg_space_asm.h
new file mode 100644
index 000000000000..d75a74e90458
--- /dev/null
+++ b/include/asm-cris/arch-v32/mach-a3/hwregs/iop/asm/iop_reg_space_asm.h
@@ -0,0 +1,31 @@
1/* Autogenerated Changes here will be lost!
2 * generated by ./gen_sw.pl Wed Feb 14 09:27:48 2007 iop_sw.cfg
3 */
4#define iop_version 0
5#define iop_fifo_in_extra 64
6#define iop_fifo_out_extra 128
7#define iop_trigger_grp0 192
8#define iop_trigger_grp1 256
9#define iop_trigger_grp2 320
10#define iop_trigger_grp3 384
11#define iop_trigger_grp4 448
12#define iop_trigger_grp5 512
13#define iop_trigger_grp6 576
14#define iop_trigger_grp7 640
15#define iop_crc_par 768
16#define iop_dmc_in 896
17#define iop_dmc_out 1024
18#define iop_fifo_in 1152
19#define iop_fifo_out 1280
20#define iop_scrc_in 1408
21#define iop_scrc_out 1536
22#define iop_timer_grp0 1664
23#define iop_timer_grp1 1792
24#define iop_sap_in 2048
25#define iop_sap_out 2304
26#define iop_spu 2560
27#define iop_sw_cfg 2816
28#define iop_sw_cpu 3072
29#define iop_sw_mpu 3328
30#define iop_sw_spu 3584
31#define iop_mpu 4096
diff --git a/include/asm-cris/arch-v32/mach-a3/hwregs/iop/asm/iop_sap_in_defs_asm.h b/include/asm-cris/arch-v32/mach-a3/hwregs/iop/asm/iop_sap_in_defs_asm.h
new file mode 100644
index 000000000000..7f90b5a0460d
--- /dev/null
+++ b/include/asm-cris/arch-v32/mach-a3/hwregs/iop/asm/iop_sap_in_defs_asm.h
@@ -0,0 +1,109 @@
1#ifndef __iop_sap_in_defs_asm_h
2#define __iop_sap_in_defs_asm_h
3
4/*
5 * This file is autogenerated from
6 * file: iop_sap_in.r
7 *
8 * by ../../../tools/rdesc/bin/rdes2c -asm -outfile iop_sap_in_defs_asm.h iop_sap_in.r
9 * Any changes here will be lost.
10 *
11 * -*- buffer-read-only: t -*-
12 */
13
14#ifndef REG_FIELD
15#define REG_FIELD( scope, reg, field, value ) \
16 REG_FIELD_X_( value, reg_##scope##_##reg##___##field##___lsb )
17#define REG_FIELD_X_( value, shift ) ((value) << shift)
18#endif
19
20#ifndef REG_STATE
21#define REG_STATE( scope, reg, field, symbolic_value ) \
22 REG_STATE_X_( regk_##scope##_##symbolic_value, reg_##scope##_##reg##___##field##___lsb )
23#define REG_STATE_X_( k, shift ) (k << shift)
24#endif
25
26#ifndef REG_MASK
27#define REG_MASK( scope, reg, field ) \
28 REG_MASK_X_( reg_##scope##_##reg##___##field##___width, reg_##scope##_##reg##___##field##___lsb )
29#define REG_MASK_X_( width, lsb ) (((1 << width)-1) << lsb)
30#endif
31
32#ifndef REG_LSB
33#define REG_LSB( scope, reg, field ) reg_##scope##_##reg##___##field##___lsb
34#endif
35
36#ifndef REG_BIT
37#define REG_BIT( scope, reg, field ) reg_##scope##_##reg##___##field##___bit
38#endif
39
40#ifndef REG_ADDR
41#define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset)
42#define REG_ADDR_X_( inst, offs ) ((inst) + offs)
43#endif
44
45#ifndef REG_ADDR_VECT
46#define REG_ADDR_VECT( scope, inst, reg, index ) \
47 REG_ADDR_VECT_X_(inst, reg_##scope##_##reg##_offset, index, \
48 STRIDE_##scope##_##reg )
49#define REG_ADDR_VECT_X_( inst, offs, index, stride ) \
50 ((inst) + offs + (index) * stride)
51#endif
52
53#define STRIDE_iop_sap_in_rw_bus_byte 4
54/* Register rw_bus_byte, scope iop_sap_in, type rw */
55#define reg_iop_sap_in_rw_bus_byte___sync_sel___lsb 0
56#define reg_iop_sap_in_rw_bus_byte___sync_sel___width 2
57#define reg_iop_sap_in_rw_bus_byte___sync_ext_src___lsb 2
58#define reg_iop_sap_in_rw_bus_byte___sync_ext_src___width 3
59#define reg_iop_sap_in_rw_bus_byte___sync_edge___lsb 5
60#define reg_iop_sap_in_rw_bus_byte___sync_edge___width 2
61#define reg_iop_sap_in_rw_bus_byte___delay___lsb 7
62#define reg_iop_sap_in_rw_bus_byte___delay___width 2
63#define reg_iop_sap_in_rw_bus_byte_offset 0
64
65#define STRIDE_iop_sap_in_rw_gio 4
66/* Register rw_gio, scope iop_sap_in, type rw */
67#define reg_iop_sap_in_rw_gio___sync_sel___lsb 0
68#define reg_iop_sap_in_rw_gio___sync_sel___width 2
69#define reg_iop_sap_in_rw_gio___sync_ext_src___lsb 2
70#define reg_iop_sap_in_rw_gio___sync_ext_src___width 3
71#define reg_iop_sap_in_rw_gio___sync_edge___lsb 5
72#define reg_iop_sap_in_rw_gio___sync_edge___width 2
73#define reg_iop_sap_in_rw_gio___delay___lsb 7
74#define reg_iop_sap_in_rw_gio___delay___width 2
75#define reg_iop_sap_in_rw_gio___logic___lsb 9
76#define reg_iop_sap_in_rw_gio___logic___width 2
77#define reg_iop_sap_in_rw_gio_offset 16
78
79
80/* Constants */
81#define regk_iop_sap_in_and 0x00000002
82#define regk_iop_sap_in_ext_clk200 0x00000003
83#define regk_iop_sap_in_gio0 0x00000000
84#define regk_iop_sap_in_gio12 0x00000003
85#define regk_iop_sap_in_gio16 0x00000004
86#define regk_iop_sap_in_gio20 0x00000005
87#define regk_iop_sap_in_gio24 0x00000006
88#define regk_iop_sap_in_gio28 0x00000007
89#define regk_iop_sap_in_gio4 0x00000001
90#define regk_iop_sap_in_gio8 0x00000002
91#define regk_iop_sap_in_inv 0x00000001
92#define regk_iop_sap_in_neg 0x00000002
93#define regk_iop_sap_in_no 0x00000000
94#define regk_iop_sap_in_no_del_ext_clk200 0x00000002
95#define regk_iop_sap_in_none 0x00000000
96#define regk_iop_sap_in_one 0x00000001
97#define regk_iop_sap_in_or 0x00000003
98#define regk_iop_sap_in_pos 0x00000001
99#define regk_iop_sap_in_pos_neg 0x00000003
100#define regk_iop_sap_in_rw_bus_byte_default 0x00000000
101#define regk_iop_sap_in_rw_bus_byte_size 0x00000004
102#define regk_iop_sap_in_rw_gio_default 0x00000000
103#define regk_iop_sap_in_rw_gio_size 0x00000020
104#define regk_iop_sap_in_timer_grp0_tmr3 0x00000000
105#define regk_iop_sap_in_timer_grp1_tmr3 0x00000001
106#define regk_iop_sap_in_tmr_clk200 0x00000001
107#define regk_iop_sap_in_two 0x00000002
108#define regk_iop_sap_in_two_clk200 0x00000000
109#endif /* __iop_sap_in_defs_asm_h */
diff --git a/include/asm-cris/arch-v32/mach-a3/hwregs/iop/asm/iop_sap_out_defs_asm.h b/include/asm-cris/arch-v32/mach-a3/hwregs/iop/asm/iop_sap_out_defs_asm.h
new file mode 100644
index 000000000000..399bd656406b
--- /dev/null
+++ b/include/asm-cris/arch-v32/mach-a3/hwregs/iop/asm/iop_sap_out_defs_asm.h
@@ -0,0 +1,276 @@
1#ifndef __iop_sap_out_defs_asm_h
2#define __iop_sap_out_defs_asm_h
3
4/*
5 * This file is autogenerated from
6 * file: iop_sap_out.r
7 *
8 * by ../../../tools/rdesc/bin/rdes2c -asm -outfile iop_sap_out_defs_asm.h iop_sap_out.r
9 * Any changes here will be lost.
10 *
11 * -*- buffer-read-only: t -*-
12 */
13
14#ifndef REG_FIELD
15#define REG_FIELD( scope, reg, field, value ) \
16 REG_FIELD_X_( value, reg_##scope##_##reg##___##field##___lsb )
17#define REG_FIELD_X_( value, shift ) ((value) << shift)
18#endif
19
20#ifndef REG_STATE
21#define REG_STATE( scope, reg, field, symbolic_value ) \
22 REG_STATE_X_( regk_##scope##_##symbolic_value, reg_##scope##_##reg##___##field##___lsb )
23#define REG_STATE_X_( k, shift ) (k << shift)
24#endif
25
26#ifndef REG_MASK
27#define REG_MASK( scope, reg, field ) \
28 REG_MASK_X_( reg_##scope##_##reg##___##field##___width, reg_##scope##_##reg##___##field##___lsb )
29#define REG_MASK_X_( width, lsb ) (((1 << width)-1) << lsb)
30#endif
31
32#ifndef REG_LSB
33#define REG_LSB( scope, reg, field ) reg_##scope##_##reg##___##field##___lsb
34#endif
35
36#ifndef REG_BIT
37#define REG_BIT( scope, reg, field ) reg_##scope##_##reg##___##field##___bit
38#endif
39
40#ifndef REG_ADDR
41#define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset)
42#define REG_ADDR_X_( inst, offs ) ((inst) + offs)
43#endif
44
45#ifndef REG_ADDR_VECT
46#define REG_ADDR_VECT( scope, inst, reg, index ) \
47 REG_ADDR_VECT_X_(inst, reg_##scope##_##reg##_offset, index, \
48 STRIDE_##scope##_##reg )
49#define REG_ADDR_VECT_X_( inst, offs, index, stride ) \
50 ((inst) + offs + (index) * stride)
51#endif
52
53/* Register rw_gen_gated, scope iop_sap_out, type rw */
54#define reg_iop_sap_out_rw_gen_gated___clk0_src___lsb 0
55#define reg_iop_sap_out_rw_gen_gated___clk0_src___width 2
56#define reg_iop_sap_out_rw_gen_gated___clk0_gate_src___lsb 2
57#define reg_iop_sap_out_rw_gen_gated___clk0_gate_src___width 2
58#define reg_iop_sap_out_rw_gen_gated___clk0_force_src___lsb 4
59#define reg_iop_sap_out_rw_gen_gated___clk0_force_src___width 3
60#define reg_iop_sap_out_rw_gen_gated___clk1_src___lsb 7
61#define reg_iop_sap_out_rw_gen_gated___clk1_src___width 2
62#define reg_iop_sap_out_rw_gen_gated___clk1_gate_src___lsb 9
63#define reg_iop_sap_out_rw_gen_gated___clk1_gate_src___width 2
64#define reg_iop_sap_out_rw_gen_gated___clk1_force_src___lsb 11
65#define reg_iop_sap_out_rw_gen_gated___clk1_force_src___width 3
66#define reg_iop_sap_out_rw_gen_gated_offset 0
67
68/* Register rw_bus, scope iop_sap_out, type rw */
69#define reg_iop_sap_out_rw_bus___byte0_clk_sel___lsb 0
70#define reg_iop_sap_out_rw_bus___byte0_clk_sel___width 2
71#define reg_iop_sap_out_rw_bus___byte0_clk_ext___lsb 2
72#define reg_iop_sap_out_rw_bus___byte0_clk_ext___width 2
73#define reg_iop_sap_out_rw_bus___byte0_gated_clk___lsb 4
74#define reg_iop_sap_out_rw_bus___byte0_gated_clk___width 1
75#define reg_iop_sap_out_rw_bus___byte0_gated_clk___bit 4
76#define reg_iop_sap_out_rw_bus___byte0_clk_inv___lsb 5
77#define reg_iop_sap_out_rw_bus___byte0_clk_inv___width 1
78#define reg_iop_sap_out_rw_bus___byte0_clk_inv___bit 5
79#define reg_iop_sap_out_rw_bus___byte0_delay___lsb 6
80#define reg_iop_sap_out_rw_bus___byte0_delay___width 1
81#define reg_iop_sap_out_rw_bus___byte0_delay___bit 6
82#define reg_iop_sap_out_rw_bus___byte1_clk_sel___lsb 7
83#define reg_iop_sap_out_rw_bus___byte1_clk_sel___width 2
84#define reg_iop_sap_out_rw_bus___byte1_clk_ext___lsb 9
85#define reg_iop_sap_out_rw_bus___byte1_clk_ext___width 2
86#define reg_iop_sap_out_rw_bus___byte1_gated_clk___lsb 11
87#define reg_iop_sap_out_rw_bus___byte1_gated_clk___width 1
88#define reg_iop_sap_out_rw_bus___byte1_gated_clk___bit 11
89#define reg_iop_sap_out_rw_bus___byte1_clk_inv___lsb 12
90#define reg_iop_sap_out_rw_bus___byte1_clk_inv___width 1
91#define reg_iop_sap_out_rw_bus___byte1_clk_inv___bit 12
92#define reg_iop_sap_out_rw_bus___byte1_delay___lsb 13
93#define reg_iop_sap_out_rw_bus___byte1_delay___width 1
94#define reg_iop_sap_out_rw_bus___byte1_delay___bit 13
95#define reg_iop_sap_out_rw_bus___byte2_clk_sel___lsb 14
96#define reg_iop_sap_out_rw_bus___byte2_clk_sel___width 2
97#define reg_iop_sap_out_rw_bus___byte2_clk_ext___lsb 16
98#define reg_iop_sap_out_rw_bus___byte2_clk_ext___width 2
99#define reg_iop_sap_out_rw_bus___byte2_gated_clk___lsb 18
100#define reg_iop_sap_out_rw_bus___byte2_gated_clk___width 1
101#define reg_iop_sap_out_rw_bus___byte2_gated_clk___bit 18
102#define reg_iop_sap_out_rw_bus___byte2_clk_inv___lsb 19
103#define reg_iop_sap_out_rw_bus___byte2_clk_inv___width 1
104#define reg_iop_sap_out_rw_bus___byte2_clk_inv___bit 19
105#define reg_iop_sap_out_rw_bus___byte2_delay___lsb 20
106#define reg_iop_sap_out_rw_bus___byte2_delay___width 1
107#define reg_iop_sap_out_rw_bus___byte2_delay___bit 20
108#define reg_iop_sap_out_rw_bus___byte3_clk_sel___lsb 21
109#define reg_iop_sap_out_rw_bus___byte3_clk_sel___width 2
110#define reg_iop_sap_out_rw_bus___byte3_clk_ext___lsb 23
111#define reg_iop_sap_out_rw_bus___byte3_clk_ext___width 2
112#define reg_iop_sap_out_rw_bus___byte3_gated_clk___lsb 25
113#define reg_iop_sap_out_rw_bus___byte3_gated_clk___width 1
114#define reg_iop_sap_out_rw_bus___byte3_gated_clk___bit 25
115#define reg_iop_sap_out_rw_bus___byte3_clk_inv___lsb 26
116#define reg_iop_sap_out_rw_bus___byte3_clk_inv___width 1
117#define reg_iop_sap_out_rw_bus___byte3_clk_inv___bit 26
118#define reg_iop_sap_out_rw_bus___byte3_delay___lsb 27
119#define reg_iop_sap_out_rw_bus___byte3_delay___width 1
120#define reg_iop_sap_out_rw_bus___byte3_delay___bit 27
121#define reg_iop_sap_out_rw_bus_offset 4
122
123/* Register rw_bus_lo_oe, scope iop_sap_out, type rw */
124#define reg_iop_sap_out_rw_bus_lo_oe___byte0_clk_sel___lsb 0
125#define reg_iop_sap_out_rw_bus_lo_oe___byte0_clk_sel___width 2
126#define reg_iop_sap_out_rw_bus_lo_oe___byte0_clk_ext___lsb 2
127#define reg_iop_sap_out_rw_bus_lo_oe___byte0_clk_ext___width 2
128#define reg_iop_sap_out_rw_bus_lo_oe___byte0_gated_clk___lsb 4
129#define reg_iop_sap_out_rw_bus_lo_oe___byte0_gated_clk___width 1
130#define reg_iop_sap_out_rw_bus_lo_oe___byte0_gated_clk___bit 4
131#define reg_iop_sap_out_rw_bus_lo_oe___byte0_clk_inv___lsb 5
132#define reg_iop_sap_out_rw_bus_lo_oe___byte0_clk_inv___width 1
133#define reg_iop_sap_out_rw_bus_lo_oe___byte0_clk_inv___bit 5
134#define reg_iop_sap_out_rw_bus_lo_oe___byte0_delay___lsb 6
135#define reg_iop_sap_out_rw_bus_lo_oe___byte0_delay___width 1
136#define reg_iop_sap_out_rw_bus_lo_oe___byte0_delay___bit 6
137#define reg_iop_sap_out_rw_bus_lo_oe___byte0_logic___lsb 7
138#define reg_iop_sap_out_rw_bus_lo_oe___byte0_logic___width 2
139#define reg_iop_sap_out_rw_bus_lo_oe___byte0_logic_src___lsb 9
140#define reg_iop_sap_out_rw_bus_lo_oe___byte0_logic_src___width 2
141#define reg_iop_sap_out_rw_bus_lo_oe___byte1_clk_sel___lsb 11
142#define reg_iop_sap_out_rw_bus_lo_oe___byte1_clk_sel___width 2
143#define reg_iop_sap_out_rw_bus_lo_oe___byte1_clk_ext___lsb 13
144#define reg_iop_sap_out_rw_bus_lo_oe___byte1_clk_ext___width 2
145#define reg_iop_sap_out_rw_bus_lo_oe___byte1_gated_clk___lsb 15
146#define reg_iop_sap_out_rw_bus_lo_oe___byte1_gated_clk___width 1
147#define reg_iop_sap_out_rw_bus_lo_oe___byte1_gated_clk___bit 15
148#define reg_iop_sap_out_rw_bus_lo_oe___byte1_clk_inv___lsb 16
149#define reg_iop_sap_out_rw_bus_lo_oe___byte1_clk_inv___width 1
150#define reg_iop_sap_out_rw_bus_lo_oe___byte1_clk_inv___bit 16
151#define reg_iop_sap_out_rw_bus_lo_oe___byte1_delay___lsb 17
152#define reg_iop_sap_out_rw_bus_lo_oe___byte1_delay___width 1
153#define reg_iop_sap_out_rw_bus_lo_oe___byte1_delay___bit 17
154#define reg_iop_sap_out_rw_bus_lo_oe___byte1_logic___lsb 18
155#define reg_iop_sap_out_rw_bus_lo_oe___byte1_logic___width 2
156#define reg_iop_sap_out_rw_bus_lo_oe___byte1_logic_src___lsb 20
157#define reg_iop_sap_out_rw_bus_lo_oe___byte1_logic_src___width 2
158#define reg_iop_sap_out_rw_bus_lo_oe_offset 8
159
160/* Register rw_bus_hi_oe, scope iop_sap_out, type rw */
161#define reg_iop_sap_out_rw_bus_hi_oe___byte2_clk_sel___lsb 0
162#define reg_iop_sap_out_rw_bus_hi_oe___byte2_clk_sel___width 2
163#define reg_iop_sap_out_rw_bus_hi_oe___byte2_clk_ext___lsb 2
164#define reg_iop_sap_out_rw_bus_hi_oe___byte2_clk_ext___width 2
165#define reg_iop_sap_out_rw_bus_hi_oe___byte2_gated_clk___lsb 4
166#define reg_iop_sap_out_rw_bus_hi_oe___byte2_gated_clk___width 1
167#define reg_iop_sap_out_rw_bus_hi_oe___byte2_gated_clk___bit 4
168#define reg_iop_sap_out_rw_bus_hi_oe___byte2_clk_inv___lsb 5
169#define reg_iop_sap_out_rw_bus_hi_oe___byte2_clk_inv___width 1
170#define reg_iop_sap_out_rw_bus_hi_oe___byte2_clk_inv___bit 5
171#define reg_iop_sap_out_rw_bus_hi_oe___byte2_delay___lsb 6
172#define reg_iop_sap_out_rw_bus_hi_oe___byte2_delay___width 1
173#define reg_iop_sap_out_rw_bus_hi_oe___byte2_delay___bit 6
174#define reg_iop_sap_out_rw_bus_hi_oe___byte2_logic___lsb 7
175#define reg_iop_sap_out_rw_bus_hi_oe___byte2_logic___width 2
176#define reg_iop_sap_out_rw_bus_hi_oe___byte2_logic_src___lsb 9
177#define reg_iop_sap_out_rw_bus_hi_oe___byte2_logic_src___width 2
178#define reg_iop_sap_out_rw_bus_hi_oe___byte3_clk_sel___lsb 11
179#define reg_iop_sap_out_rw_bus_hi_oe___byte3_clk_sel___width 2
180#define reg_iop_sap_out_rw_bus_hi_oe___byte3_clk_ext___lsb 13
181#define reg_iop_sap_out_rw_bus_hi_oe___byte3_clk_ext___width 2
182#define reg_iop_sap_out_rw_bus_hi_oe___byte3_gated_clk___lsb 15
183#define reg_iop_sap_out_rw_bus_hi_oe___byte3_gated_clk___width 1
184#define reg_iop_sap_out_rw_bus_hi_oe___byte3_gated_clk___bit 15
185#define reg_iop_sap_out_rw_bus_hi_oe___byte3_clk_inv___lsb 16
186#define reg_iop_sap_out_rw_bus_hi_oe___byte3_clk_inv___width 1
187#define reg_iop_sap_out_rw_bus_hi_oe___byte3_clk_inv___bit 16
188#define reg_iop_sap_out_rw_bus_hi_oe___byte3_delay___lsb 17
189#define reg_iop_sap_out_rw_bus_hi_oe___byte3_delay___width 1
190#define reg_iop_sap_out_rw_bus_hi_oe___byte3_delay___bit 17
191#define reg_iop_sap_out_rw_bus_hi_oe___byte3_logic___lsb 18
192#define reg_iop_sap_out_rw_bus_hi_oe___byte3_logic___width 2
193#define reg_iop_sap_out_rw_bus_hi_oe___byte3_logic_src___lsb 20
194#define reg_iop_sap_out_rw_bus_hi_oe___byte3_logic_src___width 2
195#define reg_iop_sap_out_rw_bus_hi_oe_offset 12
196
197#define STRIDE_iop_sap_out_rw_gio 4
198/* Register rw_gio, scope iop_sap_out, type rw */
199#define reg_iop_sap_out_rw_gio___out_clk_sel___lsb 0
200#define reg_iop_sap_out_rw_gio___out_clk_sel___width 3
201#define reg_iop_sap_out_rw_gio___out_clk_ext___lsb 3
202#define reg_iop_sap_out_rw_gio___out_clk_ext___width 2
203#define reg_iop_sap_out_rw_gio___out_gated_clk___lsb 5
204#define reg_iop_sap_out_rw_gio___out_gated_clk___width 1
205#define reg_iop_sap_out_rw_gio___out_gated_clk___bit 5
206#define reg_iop_sap_out_rw_gio___out_clk_inv___lsb 6
207#define reg_iop_sap_out_rw_gio___out_clk_inv___width 1
208#define reg_iop_sap_out_rw_gio___out_clk_inv___bit 6
209#define reg_iop_sap_out_rw_gio___out_delay___lsb 7
210#define reg_iop_sap_out_rw_gio___out_delay___width 1
211#define reg_iop_sap_out_rw_gio___out_delay___bit 7
212#define reg_iop_sap_out_rw_gio___out_logic___lsb 8
213#define reg_iop_sap_out_rw_gio___out_logic___width 2
214#define reg_iop_sap_out_rw_gio___out_logic_src___lsb 10
215#define reg_iop_sap_out_rw_gio___out_logic_src___width 2
216#define reg_iop_sap_out_rw_gio___oe_clk_sel___lsb 12
217#define reg_iop_sap_out_rw_gio___oe_clk_sel___width 3
218#define reg_iop_sap_out_rw_gio___oe_clk_ext___lsb 15
219#define reg_iop_sap_out_rw_gio___oe_clk_ext___width 2
220#define reg_iop_sap_out_rw_gio___oe_gated_clk___lsb 17
221#define reg_iop_sap_out_rw_gio___oe_gated_clk___width 1
222#define reg_iop_sap_out_rw_gio___oe_gated_clk___bit 17
223#define reg_iop_sap_out_rw_gio___oe_clk_inv___lsb 18
224#define reg_iop_sap_out_rw_gio___oe_clk_inv___width 1
225#define reg_iop_sap_out_rw_gio___oe_clk_inv___bit 18
226#define reg_iop_sap_out_rw_gio___oe_delay___lsb 19
227#define reg_iop_sap_out_rw_gio___oe_delay___width 1
228#define reg_iop_sap_out_rw_gio___oe_delay___bit 19
229#define reg_iop_sap_out_rw_gio___oe_logic___lsb 20
230#define reg_iop_sap_out_rw_gio___oe_logic___width 2
231#define reg_iop_sap_out_rw_gio___oe_logic_src___lsb 22
232#define reg_iop_sap_out_rw_gio___oe_logic_src___width 2
233#define reg_iop_sap_out_rw_gio_offset 16
234
235
236/* Constants */
237#define regk_iop_sap_out_always 0x00000001
238#define regk_iop_sap_out_and 0x00000002
239#define regk_iop_sap_out_clk0 0x00000000
240#define regk_iop_sap_out_clk1 0x00000001
241#define regk_iop_sap_out_clk12 0x00000004
242#define regk_iop_sap_out_clk200 0x00000000
243#define regk_iop_sap_out_ext 0x00000002
244#define regk_iop_sap_out_gated 0x00000003
245#define regk_iop_sap_out_gio0 0x00000000
246#define regk_iop_sap_out_gio1 0x00000000
247#define regk_iop_sap_out_gio16 0x00000002
248#define regk_iop_sap_out_gio17 0x00000002
249#define regk_iop_sap_out_gio24 0x00000003
250#define regk_iop_sap_out_gio25 0x00000003
251#define regk_iop_sap_out_gio8 0x00000001
252#define regk_iop_sap_out_gio9 0x00000001
253#define regk_iop_sap_out_gio_out10 0x00000005
254#define regk_iop_sap_out_gio_out18 0x00000006
255#define regk_iop_sap_out_gio_out2 0x00000004
256#define regk_iop_sap_out_gio_out26 0x00000007
257#define regk_iop_sap_out_inv 0x00000001
258#define regk_iop_sap_out_nand 0x00000003
259#define regk_iop_sap_out_no 0x00000000
260#define regk_iop_sap_out_none 0x00000000
261#define regk_iop_sap_out_one 0x00000001
262#define regk_iop_sap_out_rw_bus_default 0x00000000
263#define regk_iop_sap_out_rw_bus_hi_oe_default 0x00000000
264#define regk_iop_sap_out_rw_bus_lo_oe_default 0x00000000
265#define regk_iop_sap_out_rw_gen_gated_default 0x00000000
266#define regk_iop_sap_out_rw_gio_default 0x00000000
267#define regk_iop_sap_out_rw_gio_size 0x00000020
268#define regk_iop_sap_out_spu_gio6 0x00000002
269#define regk_iop_sap_out_spu_gio7 0x00000003
270#define regk_iop_sap_out_timer_grp0_tmr2 0x00000000
271#define regk_iop_sap_out_timer_grp0_tmr3 0x00000001
272#define regk_iop_sap_out_timer_grp1_tmr2 0x00000002
273#define regk_iop_sap_out_timer_grp1_tmr3 0x00000003
274#define regk_iop_sap_out_tmr200 0x00000001
275#define regk_iop_sap_out_yes 0x00000001
276#endif /* __iop_sap_out_defs_asm_h */
diff --git a/include/asm-cris/arch-v32/mach-a3/hwregs/iop/asm/iop_sw_cfg_defs_asm.h b/include/asm-cris/arch-v32/mach-a3/hwregs/iop/asm/iop_sw_cfg_defs_asm.h
new file mode 100644
index 000000000000..3b3949b51a66
--- /dev/null
+++ b/include/asm-cris/arch-v32/mach-a3/hwregs/iop/asm/iop_sw_cfg_defs_asm.h
@@ -0,0 +1,739 @@
1#ifndef __iop_sw_cfg_defs_asm_h
2#define __iop_sw_cfg_defs_asm_h
3
4/*
5 * This file is autogenerated from
6 * file: iop_sw_cfg.r
7 *
8 * by ../../../tools/rdesc/bin/rdes2c -asm -outfile iop_sw_cfg_defs_asm.h iop_sw_cfg.r
9 * Any changes here will be lost.
10 *
11 * -*- buffer-read-only: t -*-
12 */
13
14#ifndef REG_FIELD
15#define REG_FIELD( scope, reg, field, value ) \
16 REG_FIELD_X_( value, reg_##scope##_##reg##___##field##___lsb )
17#define REG_FIELD_X_( value, shift ) ((value) << shift)
18#endif
19
20#ifndef REG_STATE
21#define REG_STATE( scope, reg, field, symbolic_value ) \
22 REG_STATE_X_( regk_##scope##_##symbolic_value, reg_##scope##_##reg##___##field##___lsb )
23#define REG_STATE_X_( k, shift ) (k << shift)
24#endif
25
26#ifndef REG_MASK
27#define REG_MASK( scope, reg, field ) \
28 REG_MASK_X_( reg_##scope##_##reg##___##field##___width, reg_##scope##_##reg##___##field##___lsb )
29#define REG_MASK_X_( width, lsb ) (((1 << width)-1) << lsb)
30#endif
31
32#ifndef REG_LSB
33#define REG_LSB( scope, reg, field ) reg_##scope##_##reg##___##field##___lsb
34#endif
35
36#ifndef REG_BIT
37#define REG_BIT( scope, reg, field ) reg_##scope##_##reg##___##field##___bit
38#endif
39
40#ifndef REG_ADDR
41#define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset)
42#define REG_ADDR_X_( inst, offs ) ((inst) + offs)
43#endif
44
45#ifndef REG_ADDR_VECT
46#define REG_ADDR_VECT( scope, inst, reg, index ) \
47 REG_ADDR_VECT_X_(inst, reg_##scope##_##reg##_offset, index, \
48 STRIDE_##scope##_##reg )
49#define REG_ADDR_VECT_X_( inst, offs, index, stride ) \
50 ((inst) + offs + (index) * stride)
51#endif
52
53/* Register rw_crc_par_owner, scope iop_sw_cfg, type rw */
54#define reg_iop_sw_cfg_rw_crc_par_owner___cfg___lsb 0
55#define reg_iop_sw_cfg_rw_crc_par_owner___cfg___width 2
56#define reg_iop_sw_cfg_rw_crc_par_owner_offset 0
57
58/* Register rw_dmc_in_owner, scope iop_sw_cfg, type rw */
59#define reg_iop_sw_cfg_rw_dmc_in_owner___cfg___lsb 0
60#define reg_iop_sw_cfg_rw_dmc_in_owner___cfg___width 2
61#define reg_iop_sw_cfg_rw_dmc_in_owner_offset 4
62
63/* Register rw_dmc_out_owner, scope iop_sw_cfg, type rw */
64#define reg_iop_sw_cfg_rw_dmc_out_owner___cfg___lsb 0
65#define reg_iop_sw_cfg_rw_dmc_out_owner___cfg___width 2
66#define reg_iop_sw_cfg_rw_dmc_out_owner_offset 8
67
68/* Register rw_fifo_in_owner, scope iop_sw_cfg, type rw */
69#define reg_iop_sw_cfg_rw_fifo_in_owner___cfg___lsb 0
70#define reg_iop_sw_cfg_rw_fifo_in_owner___cfg___width 2
71#define reg_iop_sw_cfg_rw_fifo_in_owner_offset 12
72
73/* Register rw_fifo_in_extra_owner, scope iop_sw_cfg, type rw */
74#define reg_iop_sw_cfg_rw_fifo_in_extra_owner___cfg___lsb 0
75#define reg_iop_sw_cfg_rw_fifo_in_extra_owner___cfg___width 2
76#define reg_iop_sw_cfg_rw_fifo_in_extra_owner_offset 16
77
78/* Register rw_fifo_out_owner, scope iop_sw_cfg, type rw */
79#define reg_iop_sw_cfg_rw_fifo_out_owner___cfg___lsb 0
80#define reg_iop_sw_cfg_rw_fifo_out_owner___cfg___width 2
81#define reg_iop_sw_cfg_rw_fifo_out_owner_offset 20
82
83/* Register rw_fifo_out_extra_owner, scope iop_sw_cfg, type rw */
84#define reg_iop_sw_cfg_rw_fifo_out_extra_owner___cfg___lsb 0
85#define reg_iop_sw_cfg_rw_fifo_out_extra_owner___cfg___width 2
86#define reg_iop_sw_cfg_rw_fifo_out_extra_owner_offset 24
87
88/* Register rw_sap_in_owner, scope iop_sw_cfg, type rw */
89#define reg_iop_sw_cfg_rw_sap_in_owner___cfg___lsb 0
90#define reg_iop_sw_cfg_rw_sap_in_owner___cfg___width 2
91#define reg_iop_sw_cfg_rw_sap_in_owner_offset 28
92
93/* Register rw_sap_out_owner, scope iop_sw_cfg, type rw */
94#define reg_iop_sw_cfg_rw_sap_out_owner___cfg___lsb 0
95#define reg_iop_sw_cfg_rw_sap_out_owner___cfg___width 2
96#define reg_iop_sw_cfg_rw_sap_out_owner_offset 32
97
98/* Register rw_scrc_in_owner, scope iop_sw_cfg, type rw */
99#define reg_iop_sw_cfg_rw_scrc_in_owner___cfg___lsb 0
100#define reg_iop_sw_cfg_rw_scrc_in_owner___cfg___width 2
101#define reg_iop_sw_cfg_rw_scrc_in_owner_offset 36
102
103/* Register rw_scrc_out_owner, scope iop_sw_cfg, type rw */
104#define reg_iop_sw_cfg_rw_scrc_out_owner___cfg___lsb 0
105#define reg_iop_sw_cfg_rw_scrc_out_owner___cfg___width 2
106#define reg_iop_sw_cfg_rw_scrc_out_owner_offset 40
107
108/* Register rw_spu_owner, scope iop_sw_cfg, type rw */
109#define reg_iop_sw_cfg_rw_spu_owner___cfg___lsb 0
110#define reg_iop_sw_cfg_rw_spu_owner___cfg___width 1
111#define reg_iop_sw_cfg_rw_spu_owner___cfg___bit 0
112#define reg_iop_sw_cfg_rw_spu_owner_offset 44
113
114/* Register rw_timer_grp0_owner, scope iop_sw_cfg, type rw */
115#define reg_iop_sw_cfg_rw_timer_grp0_owner___cfg___lsb 0
116#define reg_iop_sw_cfg_rw_timer_grp0_owner___cfg___width 2
117#define reg_iop_sw_cfg_rw_timer_grp0_owner_offset 48
118
119/* Register rw_timer_grp1_owner, scope iop_sw_cfg, type rw */
120#define reg_iop_sw_cfg_rw_timer_grp1_owner___cfg___lsb 0
121#define reg_iop_sw_cfg_rw_timer_grp1_owner___cfg___width 2
122#define reg_iop_sw_cfg_rw_timer_grp1_owner_offset 52
123
124/* Register rw_trigger_grp0_owner, scope iop_sw_cfg, type rw */
125#define reg_iop_sw_cfg_rw_trigger_grp0_owner___cfg___lsb 0
126#define reg_iop_sw_cfg_rw_trigger_grp0_owner___cfg___width 2
127#define reg_iop_sw_cfg_rw_trigger_grp0_owner_offset 56
128
129/* Register rw_trigger_grp1_owner, scope iop_sw_cfg, type rw */
130#define reg_iop_sw_cfg_rw_trigger_grp1_owner___cfg___lsb 0
131#define reg_iop_sw_cfg_rw_trigger_grp1_owner___cfg___width 2
132#define reg_iop_sw_cfg_rw_trigger_grp1_owner_offset 60
133
134/* Register rw_trigger_grp2_owner, scope iop_sw_cfg, type rw */
135#define reg_iop_sw_cfg_rw_trigger_grp2_owner___cfg___lsb 0
136#define reg_iop_sw_cfg_rw_trigger_grp2_owner___cfg___width 2
137#define reg_iop_sw_cfg_rw_trigger_grp2_owner_offset 64
138
139/* Register rw_trigger_grp3_owner, scope iop_sw_cfg, type rw */
140#define reg_iop_sw_cfg_rw_trigger_grp3_owner___cfg___lsb 0
141#define reg_iop_sw_cfg_rw_trigger_grp3_owner___cfg___width 2
142#define reg_iop_sw_cfg_rw_trigger_grp3_owner_offset 68
143
144/* Register rw_trigger_grp4_owner, scope iop_sw_cfg, type rw */
145#define reg_iop_sw_cfg_rw_trigger_grp4_owner___cfg___lsb 0
146#define reg_iop_sw_cfg_rw_trigger_grp4_owner___cfg___width 2
147#define reg_iop_sw_cfg_rw_trigger_grp4_owner_offset 72
148
149/* Register rw_trigger_grp5_owner, scope iop_sw_cfg, type rw */
150#define reg_iop_sw_cfg_rw_trigger_grp5_owner___cfg___lsb 0
151#define reg_iop_sw_cfg_rw_trigger_grp5_owner___cfg___width 2
152#define reg_iop_sw_cfg_rw_trigger_grp5_owner_offset 76
153
154/* Register rw_trigger_grp6_owner, scope iop_sw_cfg, type rw */
155#define reg_iop_sw_cfg_rw_trigger_grp6_owner___cfg___lsb 0
156#define reg_iop_sw_cfg_rw_trigger_grp6_owner___cfg___width 2
157#define reg_iop_sw_cfg_rw_trigger_grp6_owner_offset 80
158
159/* Register rw_trigger_grp7_owner, scope iop_sw_cfg, type rw */
160#define reg_iop_sw_cfg_rw_trigger_grp7_owner___cfg___lsb 0
161#define reg_iop_sw_cfg_rw_trigger_grp7_owner___cfg___width 2
162#define reg_iop_sw_cfg_rw_trigger_grp7_owner_offset 84
163
164/* Register rw_bus_mask, scope iop_sw_cfg, type rw */
165#define reg_iop_sw_cfg_rw_bus_mask___byte0___lsb 0
166#define reg_iop_sw_cfg_rw_bus_mask___byte0___width 8
167#define reg_iop_sw_cfg_rw_bus_mask___byte1___lsb 8
168#define reg_iop_sw_cfg_rw_bus_mask___byte1___width 8
169#define reg_iop_sw_cfg_rw_bus_mask___byte2___lsb 16
170#define reg_iop_sw_cfg_rw_bus_mask___byte2___width 8
171#define reg_iop_sw_cfg_rw_bus_mask___byte3___lsb 24
172#define reg_iop_sw_cfg_rw_bus_mask___byte3___width 8
173#define reg_iop_sw_cfg_rw_bus_mask_offset 88
174
175/* Register rw_bus_oe_mask, scope iop_sw_cfg, type rw */
176#define reg_iop_sw_cfg_rw_bus_oe_mask___byte0___lsb 0
177#define reg_iop_sw_cfg_rw_bus_oe_mask___byte0___width 1
178#define reg_iop_sw_cfg_rw_bus_oe_mask___byte0___bit 0
179#define reg_iop_sw_cfg_rw_bus_oe_mask___byte1___lsb 1
180#define reg_iop_sw_cfg_rw_bus_oe_mask___byte1___width 1
181#define reg_iop_sw_cfg_rw_bus_oe_mask___byte1___bit 1
182#define reg_iop_sw_cfg_rw_bus_oe_mask___byte2___lsb 2
183#define reg_iop_sw_cfg_rw_bus_oe_mask___byte2___width 1
184#define reg_iop_sw_cfg_rw_bus_oe_mask___byte2___bit 2
185#define reg_iop_sw_cfg_rw_bus_oe_mask___byte3___lsb 3
186#define reg_iop_sw_cfg_rw_bus_oe_mask___byte3___width 1
187#define reg_iop_sw_cfg_rw_bus_oe_mask___byte3___bit 3
188#define reg_iop_sw_cfg_rw_bus_oe_mask_offset 92
189
190/* Register rw_gio_mask, scope iop_sw_cfg, type rw */
191#define reg_iop_sw_cfg_rw_gio_mask___val___lsb 0
192#define reg_iop_sw_cfg_rw_gio_mask___val___width 32
193#define reg_iop_sw_cfg_rw_gio_mask_offset 96
194
195/* Register rw_gio_oe_mask, scope iop_sw_cfg, type rw */
196#define reg_iop_sw_cfg_rw_gio_oe_mask___val___lsb 0
197#define reg_iop_sw_cfg_rw_gio_oe_mask___val___width 32
198#define reg_iop_sw_cfg_rw_gio_oe_mask_offset 100
199
200/* Register rw_pinmapping, scope iop_sw_cfg, type rw */
201#define reg_iop_sw_cfg_rw_pinmapping___bus_byte0___lsb 0
202#define reg_iop_sw_cfg_rw_pinmapping___bus_byte0___width 2
203#define reg_iop_sw_cfg_rw_pinmapping___bus_byte1___lsb 2
204#define reg_iop_sw_cfg_rw_pinmapping___bus_byte1___width 2
205#define reg_iop_sw_cfg_rw_pinmapping___bus_byte2___lsb 4
206#define reg_iop_sw_cfg_rw_pinmapping___bus_byte2___width 2
207#define reg_iop_sw_cfg_rw_pinmapping___bus_byte3___lsb 6
208#define reg_iop_sw_cfg_rw_pinmapping___bus_byte3___width 2
209#define reg_iop_sw_cfg_rw_pinmapping___gio3_0___lsb 8
210#define reg_iop_sw_cfg_rw_pinmapping___gio3_0___width 2
211#define reg_iop_sw_cfg_rw_pinmapping___gio7_4___lsb 10
212#define reg_iop_sw_cfg_rw_pinmapping___gio7_4___width 2
213#define reg_iop_sw_cfg_rw_pinmapping___gio11_8___lsb 12
214#define reg_iop_sw_cfg_rw_pinmapping___gio11_8___width 2
215#define reg_iop_sw_cfg_rw_pinmapping___gio15_12___lsb 14
216#define reg_iop_sw_cfg_rw_pinmapping___gio15_12___width 2
217#define reg_iop_sw_cfg_rw_pinmapping___gio19_16___lsb 16
218#define reg_iop_sw_cfg_rw_pinmapping___gio19_16___width 2
219#define reg_iop_sw_cfg_rw_pinmapping___gio23_20___lsb 18
220#define reg_iop_sw_cfg_rw_pinmapping___gio23_20___width 2
221#define reg_iop_sw_cfg_rw_pinmapping___gio27_24___lsb 20
222#define reg_iop_sw_cfg_rw_pinmapping___gio27_24___width 2
223#define reg_iop_sw_cfg_rw_pinmapping___gio31_28___lsb 22
224#define reg_iop_sw_cfg_rw_pinmapping___gio31_28___width 2
225#define reg_iop_sw_cfg_rw_pinmapping_offset 104
226
227/* Register rw_bus_out_cfg, scope iop_sw_cfg, type rw */
228#define reg_iop_sw_cfg_rw_bus_out_cfg___bus_lo___lsb 0
229#define reg_iop_sw_cfg_rw_bus_out_cfg___bus_lo___width 2
230#define reg_iop_sw_cfg_rw_bus_out_cfg___bus_hi___lsb 2
231#define reg_iop_sw_cfg_rw_bus_out_cfg___bus_hi___width 2
232#define reg_iop_sw_cfg_rw_bus_out_cfg___bus_lo_oe___lsb 4
233#define reg_iop_sw_cfg_rw_bus_out_cfg___bus_lo_oe___width 2
234#define reg_iop_sw_cfg_rw_bus_out_cfg___bus_hi_oe___lsb 6
235#define reg_iop_sw_cfg_rw_bus_out_cfg___bus_hi_oe___width 2
236#define reg_iop_sw_cfg_rw_bus_out_cfg_offset 108
237
238/* Register rw_gio_out_grp0_cfg, scope iop_sw_cfg, type rw */
239#define reg_iop_sw_cfg_rw_gio_out_grp0_cfg___gio0___lsb 0
240#define reg_iop_sw_cfg_rw_gio_out_grp0_cfg___gio0___width 3
241#define reg_iop_sw_cfg_rw_gio_out_grp0_cfg___gio0_oe___lsb 3
242#define reg_iop_sw_cfg_rw_gio_out_grp0_cfg___gio0_oe___width 1
243#define reg_iop_sw_cfg_rw_gio_out_grp0_cfg___gio0_oe___bit 3
244#define reg_iop_sw_cfg_rw_gio_out_grp0_cfg___gio1___lsb 4
245#define reg_iop_sw_cfg_rw_gio_out_grp0_cfg___gio1___width 3
246#define reg_iop_sw_cfg_rw_gio_out_grp0_cfg___gio1_oe___lsb 7
247#define reg_iop_sw_cfg_rw_gio_out_grp0_cfg___gio1_oe___width 1
248#define reg_iop_sw_cfg_rw_gio_out_grp0_cfg___gio1_oe___bit 7
249#define reg_iop_sw_cfg_rw_gio_out_grp0_cfg___gio2___lsb 8
250#define reg_iop_sw_cfg_rw_gio_out_grp0_cfg___gio2___width 3
251#define reg_iop_sw_cfg_rw_gio_out_grp0_cfg___gio2_oe___lsb 11
252#define reg_iop_sw_cfg_rw_gio_out_grp0_cfg___gio2_oe___width 1
253#define reg_iop_sw_cfg_rw_gio_out_grp0_cfg___gio2_oe___bit 11
254#define reg_iop_sw_cfg_rw_gio_out_grp0_cfg___gio3___lsb 12
255#define reg_iop_sw_cfg_rw_gio_out_grp0_cfg___gio3___width 3
256#define reg_iop_sw_cfg_rw_gio_out_grp0_cfg___gio3_oe___lsb 15
257#define reg_iop_sw_cfg_rw_gio_out_grp0_cfg___gio3_oe___width 1
258#define reg_iop_sw_cfg_rw_gio_out_grp0_cfg___gio3_oe___bit 15
259#define reg_iop_sw_cfg_rw_gio_out_grp0_cfg_offset 112
260
261/* Register rw_gio_out_grp1_cfg, scope iop_sw_cfg, type rw */
262#define reg_iop_sw_cfg_rw_gio_out_grp1_cfg___gio4___lsb 0
263#define reg_iop_sw_cfg_rw_gio_out_grp1_cfg___gio4___width 3
264#define reg_iop_sw_cfg_rw_gio_out_grp1_cfg___gio4_oe___lsb 3
265#define reg_iop_sw_cfg_rw_gio_out_grp1_cfg___gio4_oe___width 1
266#define reg_iop_sw_cfg_rw_gio_out_grp1_cfg___gio4_oe___bit 3
267#define reg_iop_sw_cfg_rw_gio_out_grp1_cfg___gio5___lsb 4
268#define reg_iop_sw_cfg_rw_gio_out_grp1_cfg___gio5___width 3
269#define reg_iop_sw_cfg_rw_gio_out_grp1_cfg___gio5_oe___lsb 7
270#define reg_iop_sw_cfg_rw_gio_out_grp1_cfg___gio5_oe___width 1
271#define reg_iop_sw_cfg_rw_gio_out_grp1_cfg___gio5_oe___bit 7
272#define reg_iop_sw_cfg_rw_gio_out_grp1_cfg___gio6___lsb 8
273#define reg_iop_sw_cfg_rw_gio_out_grp1_cfg___gio6___width 3
274#define reg_iop_sw_cfg_rw_gio_out_grp1_cfg___gio6_oe___lsb 11
275#define reg_iop_sw_cfg_rw_gio_out_grp1_cfg___gio6_oe___width 1
276#define reg_iop_sw_cfg_rw_gio_out_grp1_cfg___gio6_oe___bit 11
277#define reg_iop_sw_cfg_rw_gio_out_grp1_cfg___gio7___lsb 12
278#define reg_iop_sw_cfg_rw_gio_out_grp1_cfg___gio7___width 3
279#define reg_iop_sw_cfg_rw_gio_out_grp1_cfg___gio7_oe___lsb 15
280#define reg_iop_sw_cfg_rw_gio_out_grp1_cfg___gio7_oe___width 1
281#define reg_iop_sw_cfg_rw_gio_out_grp1_cfg___gio7_oe___bit 15
282#define reg_iop_sw_cfg_rw_gio_out_grp1_cfg_offset 116
283
284/* Register rw_gio_out_grp2_cfg, scope iop_sw_cfg, type rw */
285#define reg_iop_sw_cfg_rw_gio_out_grp2_cfg___gio8___lsb 0
286#define reg_iop_sw_cfg_rw_gio_out_grp2_cfg___gio8___width 3
287#define reg_iop_sw_cfg_rw_gio_out_grp2_cfg___gio8_oe___lsb 3
288#define reg_iop_sw_cfg_rw_gio_out_grp2_cfg___gio8_oe___width 1
289#define reg_iop_sw_cfg_rw_gio_out_grp2_cfg___gio8_oe___bit 3
290#define reg_iop_sw_cfg_rw_gio_out_grp2_cfg___gio9___lsb 4
291#define reg_iop_sw_cfg_rw_gio_out_grp2_cfg___gio9___width 3
292#define reg_iop_sw_cfg_rw_gio_out_grp2_cfg___gio9_oe___lsb 7
293#define reg_iop_sw_cfg_rw_gio_out_grp2_cfg___gio9_oe___width 1
294#define reg_iop_sw_cfg_rw_gio_out_grp2_cfg___gio9_oe___bit 7
295#define reg_iop_sw_cfg_rw_gio_out_grp2_cfg___gio10___lsb 8
296#define reg_iop_sw_cfg_rw_gio_out_grp2_cfg___gio10___width 3
297#define reg_iop_sw_cfg_rw_gio_out_grp2_cfg___gio10_oe___lsb 11
298#define reg_iop_sw_cfg_rw_gio_out_grp2_cfg___gio10_oe___width 1
299#define reg_iop_sw_cfg_rw_gio_out_grp2_cfg___gio10_oe___bit 11
300#define reg_iop_sw_cfg_rw_gio_out_grp2_cfg___gio11___lsb 12
301#define reg_iop_sw_cfg_rw_gio_out_grp2_cfg___gio11___width 3
302#define reg_iop_sw_cfg_rw_gio_out_grp2_cfg___gio11_oe___lsb 15
303#define reg_iop_sw_cfg_rw_gio_out_grp2_cfg___gio11_oe___width 1
304#define reg_iop_sw_cfg_rw_gio_out_grp2_cfg___gio11_oe___bit 15
305#define reg_iop_sw_cfg_rw_gio_out_grp2_cfg_offset 120
306
307/* Register rw_gio_out_grp3_cfg, scope iop_sw_cfg, type rw */
308#define reg_iop_sw_cfg_rw_gio_out_grp3_cfg___gio12___lsb 0
309#define reg_iop_sw_cfg_rw_gio_out_grp3_cfg___gio12___width 3
310#define reg_iop_sw_cfg_rw_gio_out_grp3_cfg___gio12_oe___lsb 3
311#define reg_iop_sw_cfg_rw_gio_out_grp3_cfg___gio12_oe___width 1
312#define reg_iop_sw_cfg_rw_gio_out_grp3_cfg___gio12_oe___bit 3
313#define reg_iop_sw_cfg_rw_gio_out_grp3_cfg___gio13___lsb 4
314#define reg_iop_sw_cfg_rw_gio_out_grp3_cfg___gio13___width 3
315#define reg_iop_sw_cfg_rw_gio_out_grp3_cfg___gio13_oe___lsb 7
316#define reg_iop_sw_cfg_rw_gio_out_grp3_cfg___gio13_oe___width 1
317#define reg_iop_sw_cfg_rw_gio_out_grp3_cfg___gio13_oe___bit 7
318#define reg_iop_sw_cfg_rw_gio_out_grp3_cfg___gio14___lsb 8
319#define reg_iop_sw_cfg_rw_gio_out_grp3_cfg___gio14___width 3
320#define reg_iop_sw_cfg_rw_gio_out_grp3_cfg___gio14_oe___lsb 11
321#define reg_iop_sw_cfg_rw_gio_out_grp3_cfg___gio14_oe___width 1
322#define reg_iop_sw_cfg_rw_gio_out_grp3_cfg___gio14_oe___bit 11
323#define reg_iop_sw_cfg_rw_gio_out_grp3_cfg___gio15___lsb 12
324#define reg_iop_sw_cfg_rw_gio_out_grp3_cfg___gio15___width 3
325#define reg_iop_sw_cfg_rw_gio_out_grp3_cfg___gio15_oe___lsb 15
326#define reg_iop_sw_cfg_rw_gio_out_grp3_cfg___gio15_oe___width 1
327#define reg_iop_sw_cfg_rw_gio_out_grp3_cfg___gio15_oe___bit 15
328#define reg_iop_sw_cfg_rw_gio_out_grp3_cfg_offset 124
329
330/* Register rw_gio_out_grp4_cfg, scope iop_sw_cfg, type rw */
331#define reg_iop_sw_cfg_rw_gio_out_grp4_cfg___gio16___lsb 0
332#define reg_iop_sw_cfg_rw_gio_out_grp4_cfg___gio16___width 3
333#define reg_iop_sw_cfg_rw_gio_out_grp4_cfg___gio16_oe___lsb 3
334#define reg_iop_sw_cfg_rw_gio_out_grp4_cfg___gio16_oe___width 1
335#define reg_iop_sw_cfg_rw_gio_out_grp4_cfg___gio16_oe___bit 3
336#define reg_iop_sw_cfg_rw_gio_out_grp4_cfg___gio17___lsb 4
337#define reg_iop_sw_cfg_rw_gio_out_grp4_cfg___gio17___width 3
338#define reg_iop_sw_cfg_rw_gio_out_grp4_cfg___gio17_oe___lsb 7
339#define reg_iop_sw_cfg_rw_gio_out_grp4_cfg___gio17_oe___width 1
340#define reg_iop_sw_cfg_rw_gio_out_grp4_cfg___gio17_oe___bit 7
341#define reg_iop_sw_cfg_rw_gio_out_grp4_cfg___gio18___lsb 8
342#define reg_iop_sw_cfg_rw_gio_out_grp4_cfg___gio18___width 3
343#define reg_iop_sw_cfg_rw_gio_out_grp4_cfg___gio18_oe___lsb 11
344#define reg_iop_sw_cfg_rw_gio_out_grp4_cfg___gio18_oe___width 1
345#define reg_iop_sw_cfg_rw_gio_out_grp4_cfg___gio18_oe___bit 11
346#define reg_iop_sw_cfg_rw_gio_out_grp4_cfg___gio19___lsb 12
347#define reg_iop_sw_cfg_rw_gio_out_grp4_cfg___gio19___width 3
348#define reg_iop_sw_cfg_rw_gio_out_grp4_cfg___gio19_oe___lsb 15
349#define reg_iop_sw_cfg_rw_gio_out_grp4_cfg___gio19_oe___width 1
350#define reg_iop_sw_cfg_rw_gio_out_grp4_cfg___gio19_oe___bit 15
351#define reg_iop_sw_cfg_rw_gio_out_grp4_cfg_offset 128
352
353/* Register rw_gio_out_grp5_cfg, scope iop_sw_cfg, type rw */
354#define reg_iop_sw_cfg_rw_gio_out_grp5_cfg___gio20___lsb 0
355#define reg_iop_sw_cfg_rw_gio_out_grp5_cfg___gio20___width 3
356#define reg_iop_sw_cfg_rw_gio_out_grp5_cfg___gio20_oe___lsb 3
357#define reg_iop_sw_cfg_rw_gio_out_grp5_cfg___gio20_oe___width 1
358#define reg_iop_sw_cfg_rw_gio_out_grp5_cfg___gio20_oe___bit 3
359#define reg_iop_sw_cfg_rw_gio_out_grp5_cfg___gio21___lsb 4
360#define reg_iop_sw_cfg_rw_gio_out_grp5_cfg___gio21___width 3
361#define reg_iop_sw_cfg_rw_gio_out_grp5_cfg___gio21_oe___lsb 7
362#define reg_iop_sw_cfg_rw_gio_out_grp5_cfg___gio21_oe___width 1
363#define reg_iop_sw_cfg_rw_gio_out_grp5_cfg___gio21_oe___bit 7
364#define reg_iop_sw_cfg_rw_gio_out_grp5_cfg___gio22___lsb 8
365#define reg_iop_sw_cfg_rw_gio_out_grp5_cfg___gio22___width 3
366#define reg_iop_sw_cfg_rw_gio_out_grp5_cfg___gio22_oe___lsb 11
367#define reg_iop_sw_cfg_rw_gio_out_grp5_cfg___gio22_oe___width 1
368#define reg_iop_sw_cfg_rw_gio_out_grp5_cfg___gio22_oe___bit 11
369#define reg_iop_sw_cfg_rw_gio_out_grp5_cfg___gio23___lsb 12
370#define reg_iop_sw_cfg_rw_gio_out_grp5_cfg___gio23___width 3
371#define reg_iop_sw_cfg_rw_gio_out_grp5_cfg___gio23_oe___lsb 15
372#define reg_iop_sw_cfg_rw_gio_out_grp5_cfg___gio23_oe___width 1
373#define reg_iop_sw_cfg_rw_gio_out_grp5_cfg___gio23_oe___bit 15
374#define reg_iop_sw_cfg_rw_gio_out_grp5_cfg_offset 132
375
376/* Register rw_gio_out_grp6_cfg, scope iop_sw_cfg, type rw */
377#define reg_iop_sw_cfg_rw_gio_out_grp6_cfg___gio24___lsb 0
378#define reg_iop_sw_cfg_rw_gio_out_grp6_cfg___gio24___width 3
379#define reg_iop_sw_cfg_rw_gio_out_grp6_cfg___gio24_oe___lsb 3
380#define reg_iop_sw_cfg_rw_gio_out_grp6_cfg___gio24_oe___width 1
381#define reg_iop_sw_cfg_rw_gio_out_grp6_cfg___gio24_oe___bit 3
382#define reg_iop_sw_cfg_rw_gio_out_grp6_cfg___gio25___lsb 4
383#define reg_iop_sw_cfg_rw_gio_out_grp6_cfg___gio25___width 3
384#define reg_iop_sw_cfg_rw_gio_out_grp6_cfg___gio25_oe___lsb 7
385#define reg_iop_sw_cfg_rw_gio_out_grp6_cfg___gio25_oe___width 1
386#define reg_iop_sw_cfg_rw_gio_out_grp6_cfg___gio25_oe___bit 7
387#define reg_iop_sw_cfg_rw_gio_out_grp6_cfg___gio26___lsb 8
388#define reg_iop_sw_cfg_rw_gio_out_grp6_cfg___gio26___width 3
389#define reg_iop_sw_cfg_rw_gio_out_grp6_cfg___gio26_oe___lsb 11
390#define reg_iop_sw_cfg_rw_gio_out_grp6_cfg___gio26_oe___width 1
391#define reg_iop_sw_cfg_rw_gio_out_grp6_cfg___gio26_oe___bit 11
392#define reg_iop_sw_cfg_rw_gio_out_grp6_cfg___gio27___lsb 12
393#define reg_iop_sw_cfg_rw_gio_out_grp6_cfg___gio27___width 3
394#define reg_iop_sw_cfg_rw_gio_out_grp6_cfg___gio27_oe___lsb 15
395#define reg_iop_sw_cfg_rw_gio_out_grp6_cfg___gio27_oe___width 1
396#define reg_iop_sw_cfg_rw_gio_out_grp6_cfg___gio27_oe___bit 15
397#define reg_iop_sw_cfg_rw_gio_out_grp6_cfg_offset 136
398
399/* Register rw_gio_out_grp7_cfg, scope iop_sw_cfg, type rw */
400#define reg_iop_sw_cfg_rw_gio_out_grp7_cfg___gio28___lsb 0
401#define reg_iop_sw_cfg_rw_gio_out_grp7_cfg___gio28___width 3
402#define reg_iop_sw_cfg_rw_gio_out_grp7_cfg___gio28_oe___lsb 3
403#define reg_iop_sw_cfg_rw_gio_out_grp7_cfg___gio28_oe___width 1
404#define reg_iop_sw_cfg_rw_gio_out_grp7_cfg___gio28_oe___bit 3
405#define reg_iop_sw_cfg_rw_gio_out_grp7_cfg___gio29___lsb 4
406#define reg_iop_sw_cfg_rw_gio_out_grp7_cfg___gio29___width 3
407#define reg_iop_sw_cfg_rw_gio_out_grp7_cfg___gio29_oe___lsb 7
408#define reg_iop_sw_cfg_rw_gio_out_grp7_cfg___gio29_oe___width 1
409#define reg_iop_sw_cfg_rw_gio_out_grp7_cfg___gio29_oe___bit 7
410#define reg_iop_sw_cfg_rw_gio_out_grp7_cfg___gio30___lsb 8
411#define reg_iop_sw_cfg_rw_gio_out_grp7_cfg___gio30___width 3
412#define reg_iop_sw_cfg_rw_gio_out_grp7_cfg___gio30_oe___lsb 11
413#define reg_iop_sw_cfg_rw_gio_out_grp7_cfg___gio30_oe___width 1
414#define reg_iop_sw_cfg_rw_gio_out_grp7_cfg___gio30_oe___bit 11
415#define reg_iop_sw_cfg_rw_gio_out_grp7_cfg___gio31___lsb 12
416#define reg_iop_sw_cfg_rw_gio_out_grp7_cfg___gio31___width 3
417#define reg_iop_sw_cfg_rw_gio_out_grp7_cfg___gio31_oe___lsb 15
418#define reg_iop_sw_cfg_rw_gio_out_grp7_cfg___gio31_oe___width 1
419#define reg_iop_sw_cfg_rw_gio_out_grp7_cfg___gio31_oe___bit 15
420#define reg_iop_sw_cfg_rw_gio_out_grp7_cfg_offset 140
421
422/* Register rw_spu_cfg, scope iop_sw_cfg, type rw */
423#define reg_iop_sw_cfg_rw_spu_cfg___bus0_in___lsb 0
424#define reg_iop_sw_cfg_rw_spu_cfg___bus0_in___width 1
425#define reg_iop_sw_cfg_rw_spu_cfg___bus0_in___bit 0
426#define reg_iop_sw_cfg_rw_spu_cfg___bus1_in___lsb 1
427#define reg_iop_sw_cfg_rw_spu_cfg___bus1_in___width 1
428#define reg_iop_sw_cfg_rw_spu_cfg___bus1_in___bit 1
429#define reg_iop_sw_cfg_rw_spu_cfg_offset 144
430
431/* Register rw_timer_grp0_cfg, scope iop_sw_cfg, type rw */
432#define reg_iop_sw_cfg_rw_timer_grp0_cfg___ext_clk___lsb 0
433#define reg_iop_sw_cfg_rw_timer_grp0_cfg___ext_clk___width 3
434#define reg_iop_sw_cfg_rw_timer_grp0_cfg___tmr0_en___lsb 3
435#define reg_iop_sw_cfg_rw_timer_grp0_cfg___tmr0_en___width 2
436#define reg_iop_sw_cfg_rw_timer_grp0_cfg___tmr1_en___lsb 5
437#define reg_iop_sw_cfg_rw_timer_grp0_cfg___tmr1_en___width 2
438#define reg_iop_sw_cfg_rw_timer_grp0_cfg___tmr2_en___lsb 7
439#define reg_iop_sw_cfg_rw_timer_grp0_cfg___tmr2_en___width 2
440#define reg_iop_sw_cfg_rw_timer_grp0_cfg___tmr3_en___lsb 9
441#define reg_iop_sw_cfg_rw_timer_grp0_cfg___tmr3_en___width 2
442#define reg_iop_sw_cfg_rw_timer_grp0_cfg___tmr0_dis___lsb 11
443#define reg_iop_sw_cfg_rw_timer_grp0_cfg___tmr0_dis___width 2
444#define reg_iop_sw_cfg_rw_timer_grp0_cfg___tmr1_dis___lsb 13
445#define reg_iop_sw_cfg_rw_timer_grp0_cfg___tmr1_dis___width 2
446#define reg_iop_sw_cfg_rw_timer_grp0_cfg___tmr2_dis___lsb 15
447#define reg_iop_sw_cfg_rw_timer_grp0_cfg___tmr2_dis___width 2
448#define reg_iop_sw_cfg_rw_timer_grp0_cfg___tmr3_dis___lsb 17
449#define reg_iop_sw_cfg_rw_timer_grp0_cfg___tmr3_dis___width 2
450#define reg_iop_sw_cfg_rw_timer_grp0_cfg_offset 148
451
452/* Register rw_timer_grp1_cfg, scope iop_sw_cfg, type rw */
453#define reg_iop_sw_cfg_rw_timer_grp1_cfg___ext_clk___lsb 0
454#define reg_iop_sw_cfg_rw_timer_grp1_cfg___ext_clk___width 3
455#define reg_iop_sw_cfg_rw_timer_grp1_cfg___tmr0_en___lsb 3
456#define reg_iop_sw_cfg_rw_timer_grp1_cfg___tmr0_en___width 2
457#define reg_iop_sw_cfg_rw_timer_grp1_cfg___tmr1_en___lsb 5
458#define reg_iop_sw_cfg_rw_timer_grp1_cfg___tmr1_en___width 2
459#define reg_iop_sw_cfg_rw_timer_grp1_cfg___tmr2_en___lsb 7
460#define reg_iop_sw_cfg_rw_timer_grp1_cfg___tmr2_en___width 2
461#define reg_iop_sw_cfg_rw_timer_grp1_cfg___tmr3_en___lsb 9
462#define reg_iop_sw_cfg_rw_timer_grp1_cfg___tmr3_en___width 2
463#define reg_iop_sw_cfg_rw_timer_grp1_cfg___tmr0_dis___lsb 11
464#define reg_iop_sw_cfg_rw_timer_grp1_cfg___tmr0_dis___width 2
465#define reg_iop_sw_cfg_rw_timer_grp1_cfg___tmr1_dis___lsb 13
466#define reg_iop_sw_cfg_rw_timer_grp1_cfg___tmr1_dis___width 2
467#define reg_iop_sw_cfg_rw_timer_grp1_cfg___tmr2_dis___lsb 15
468#define reg_iop_sw_cfg_rw_timer_grp1_cfg___tmr2_dis___width 2
469#define reg_iop_sw_cfg_rw_timer_grp1_cfg___tmr3_dis___lsb 17
470#define reg_iop_sw_cfg_rw_timer_grp1_cfg___tmr3_dis___width 2
471#define reg_iop_sw_cfg_rw_timer_grp1_cfg_offset 152
472
473/* Register rw_trigger_grps_cfg, scope iop_sw_cfg, type rw */
474#define reg_iop_sw_cfg_rw_trigger_grps_cfg___grp0_dis___lsb 0
475#define reg_iop_sw_cfg_rw_trigger_grps_cfg___grp0_dis___width 1
476#define reg_iop_sw_cfg_rw_trigger_grps_cfg___grp0_dis___bit 0
477#define reg_iop_sw_cfg_rw_trigger_grps_cfg___grp0_en___lsb 1
478#define reg_iop_sw_cfg_rw_trigger_grps_cfg___grp0_en___width 1
479#define reg_iop_sw_cfg_rw_trigger_grps_cfg___grp0_en___bit 1
480#define reg_iop_sw_cfg_rw_trigger_grps_cfg___grp1_dis___lsb 2
481#define reg_iop_sw_cfg_rw_trigger_grps_cfg___grp1_dis___width 1
482#define reg_iop_sw_cfg_rw_trigger_grps_cfg___grp1_dis___bit 2
483#define reg_iop_sw_cfg_rw_trigger_grps_cfg___grp1_en___lsb 3
484#define reg_iop_sw_cfg_rw_trigger_grps_cfg___grp1_en___width 1
485#define reg_iop_sw_cfg_rw_trigger_grps_cfg___grp1_en___bit 3
486#define reg_iop_sw_cfg_rw_trigger_grps_cfg___grp2_dis___lsb 4
487#define reg_iop_sw_cfg_rw_trigger_grps_cfg___grp2_dis___width 1
488#define reg_iop_sw_cfg_rw_trigger_grps_cfg___grp2_dis___bit 4
489#define reg_iop_sw_cfg_rw_trigger_grps_cfg___grp2_en___lsb 5
490#define reg_iop_sw_cfg_rw_trigger_grps_cfg___grp2_en___width 1
491#define reg_iop_sw_cfg_rw_trigger_grps_cfg___grp2_en___bit 5
492#define reg_iop_sw_cfg_rw_trigger_grps_cfg___grp3_dis___lsb 6
493#define reg_iop_sw_cfg_rw_trigger_grps_cfg___grp3_dis___width 1
494#define reg_iop_sw_cfg_rw_trigger_grps_cfg___grp3_dis___bit 6
495#define reg_iop_sw_cfg_rw_trigger_grps_cfg___grp3_en___lsb 7
496#define reg_iop_sw_cfg_rw_trigger_grps_cfg___grp3_en___width 1
497#define reg_iop_sw_cfg_rw_trigger_grps_cfg___grp3_en___bit 7
498#define reg_iop_sw_cfg_rw_trigger_grps_cfg___grp4_dis___lsb 8
499#define reg_iop_sw_cfg_rw_trigger_grps_cfg___grp4_dis___width 1
500#define reg_iop_sw_cfg_rw_trigger_grps_cfg___grp4_dis___bit 8
501#define reg_iop_sw_cfg_rw_trigger_grps_cfg___grp4_en___lsb 9
502#define reg_iop_sw_cfg_rw_trigger_grps_cfg___grp4_en___width 1
503#define reg_iop_sw_cfg_rw_trigger_grps_cfg___grp4_en___bit 9
504#define reg_iop_sw_cfg_rw_trigger_grps_cfg___grp5_dis___lsb 10
505#define reg_iop_sw_cfg_rw_trigger_grps_cfg___grp5_dis___width 1
506#define reg_iop_sw_cfg_rw_trigger_grps_cfg___grp5_dis___bit 10
507#define reg_iop_sw_cfg_rw_trigger_grps_cfg___grp5_en___lsb 11
508#define reg_iop_sw_cfg_rw_trigger_grps_cfg___grp5_en___width 1
509#define reg_iop_sw_cfg_rw_trigger_grps_cfg___grp5_en___bit 11
510#define reg_iop_sw_cfg_rw_trigger_grps_cfg___grp6_dis___lsb 12
511#define reg_iop_sw_cfg_rw_trigger_grps_cfg___grp6_dis___width 1
512#define reg_iop_sw_cfg_rw_trigger_grps_cfg___grp6_dis___bit 12
513#define reg_iop_sw_cfg_rw_trigger_grps_cfg___grp6_en___lsb 13
514#define reg_iop_sw_cfg_rw_trigger_grps_cfg___grp6_en___width 1
515#define reg_iop_sw_cfg_rw_trigger_grps_cfg___grp6_en___bit 13
516#define reg_iop_sw_cfg_rw_trigger_grps_cfg___grp7_dis___lsb 14
517#define reg_iop_sw_cfg_rw_trigger_grps_cfg___grp7_dis___width 1
518#define reg_iop_sw_cfg_rw_trigger_grps_cfg___grp7_dis___bit 14
519#define reg_iop_sw_cfg_rw_trigger_grps_cfg___grp7_en___lsb 15
520#define reg_iop_sw_cfg_rw_trigger_grps_cfg___grp7_en___width 1
521#define reg_iop_sw_cfg_rw_trigger_grps_cfg___grp7_en___bit 15
522#define reg_iop_sw_cfg_rw_trigger_grps_cfg_offset 156
523
524/* Register rw_pdp_cfg, scope iop_sw_cfg, type rw */
525#define reg_iop_sw_cfg_rw_pdp_cfg___out_strb___lsb 0
526#define reg_iop_sw_cfg_rw_pdp_cfg___out_strb___width 4
527#define reg_iop_sw_cfg_rw_pdp_cfg___in_src___lsb 4
528#define reg_iop_sw_cfg_rw_pdp_cfg___in_src___width 2
529#define reg_iop_sw_cfg_rw_pdp_cfg___in_size___lsb 6
530#define reg_iop_sw_cfg_rw_pdp_cfg___in_size___width 3
531#define reg_iop_sw_cfg_rw_pdp_cfg___in_last___lsb 9
532#define reg_iop_sw_cfg_rw_pdp_cfg___in_last___width 2
533#define reg_iop_sw_cfg_rw_pdp_cfg___in_strb___lsb 11
534#define reg_iop_sw_cfg_rw_pdp_cfg___in_strb___width 4
535#define reg_iop_sw_cfg_rw_pdp_cfg_offset 160
536
537/* Register rw_sdp_cfg, scope iop_sw_cfg, type rw */
538#define reg_iop_sw_cfg_rw_sdp_cfg___sdp_out_strb___lsb 0
539#define reg_iop_sw_cfg_rw_sdp_cfg___sdp_out_strb___width 3
540#define reg_iop_sw_cfg_rw_sdp_cfg___sdp_in_data___lsb 3
541#define reg_iop_sw_cfg_rw_sdp_cfg___sdp_in_data___width 3
542#define reg_iop_sw_cfg_rw_sdp_cfg___sdp_in_last___lsb 6
543#define reg_iop_sw_cfg_rw_sdp_cfg___sdp_in_last___width 2
544#define reg_iop_sw_cfg_rw_sdp_cfg___sdp_in_strb___lsb 8
545#define reg_iop_sw_cfg_rw_sdp_cfg___sdp_in_strb___width 3
546#define reg_iop_sw_cfg_rw_sdp_cfg_offset 164
547
548
549/* Constants */
550#define regk_iop_sw_cfg_a 0x00000001
551#define regk_iop_sw_cfg_b 0x00000002
552#define regk_iop_sw_cfg_bus 0x00000000
553#define regk_iop_sw_cfg_bus_rot16 0x00000002
554#define regk_iop_sw_cfg_bus_rot24 0x00000003
555#define regk_iop_sw_cfg_bus_rot8 0x00000001
556#define regk_iop_sw_cfg_clk12 0x00000000
557#define regk_iop_sw_cfg_cpu 0x00000000
558#define regk_iop_sw_cfg_gated_clk0 0x0000000e
559#define regk_iop_sw_cfg_gated_clk1 0x0000000f
560#define regk_iop_sw_cfg_gio0 0x00000004
561#define regk_iop_sw_cfg_gio1 0x00000001
562#define regk_iop_sw_cfg_gio2 0x00000005
563#define regk_iop_sw_cfg_gio3 0x00000002
564#define regk_iop_sw_cfg_gio4 0x00000006
565#define regk_iop_sw_cfg_gio5 0x00000003
566#define regk_iop_sw_cfg_gio6 0x00000007
567#define regk_iop_sw_cfg_gio7 0x00000004
568#define regk_iop_sw_cfg_gio_in18 0x00000002
569#define regk_iop_sw_cfg_gio_in19 0x00000003
570#define regk_iop_sw_cfg_gio_in20 0x00000004
571#define regk_iop_sw_cfg_gio_in21 0x00000005
572#define regk_iop_sw_cfg_gio_in26 0x00000006
573#define regk_iop_sw_cfg_gio_in27 0x00000007
574#define regk_iop_sw_cfg_gio_in4 0x00000000
575#define regk_iop_sw_cfg_gio_in5 0x00000001
576#define regk_iop_sw_cfg_last_timer_grp0_tmr2 0x00000001
577#define regk_iop_sw_cfg_last_timer_grp1_tmr2 0x00000002
578#define regk_iop_sw_cfg_last_timer_grp1_tmr3 0x00000003
579#define regk_iop_sw_cfg_mpu 0x00000001
580#define regk_iop_sw_cfg_none 0x00000000
581#define regk_iop_sw_cfg_pdp_out 0x00000001
582#define regk_iop_sw_cfg_pdp_out_hi 0x00000001
583#define regk_iop_sw_cfg_pdp_out_lo 0x00000000
584#define regk_iop_sw_cfg_rw_bus_mask_default 0x00000000
585#define regk_iop_sw_cfg_rw_bus_oe_mask_default 0x00000000
586#define regk_iop_sw_cfg_rw_bus_out_cfg_default 0x00000000
587#define regk_iop_sw_cfg_rw_crc_par_owner_default 0x00000000
588#define regk_iop_sw_cfg_rw_dmc_in_owner_default 0x00000000
589#define regk_iop_sw_cfg_rw_dmc_out_owner_default 0x00000000
590#define regk_iop_sw_cfg_rw_fifo_in_extra_owner_default 0x00000000
591#define regk_iop_sw_cfg_rw_fifo_in_owner_default 0x00000000
592#define regk_iop_sw_cfg_rw_fifo_out_extra_owner_default 0x00000000
593#define regk_iop_sw_cfg_rw_fifo_out_owner_default 0x00000000
594#define regk_iop_sw_cfg_rw_gio_mask_default 0x00000000
595#define regk_iop_sw_cfg_rw_gio_oe_mask_default 0x00000000
596#define regk_iop_sw_cfg_rw_gio_out_grp0_cfg_default 0x00000000
597#define regk_iop_sw_cfg_rw_gio_out_grp1_cfg_default 0x00000000
598#define regk_iop_sw_cfg_rw_gio_out_grp2_cfg_default 0x00000000
599#define regk_iop_sw_cfg_rw_gio_out_grp3_cfg_default 0x00000000
600#define regk_iop_sw_cfg_rw_gio_out_grp4_cfg_default 0x00000000
601#define regk_iop_sw_cfg_rw_gio_out_grp5_cfg_default 0x00000000
602#define regk_iop_sw_cfg_rw_gio_out_grp6_cfg_default 0x00000000
603#define regk_iop_sw_cfg_rw_gio_out_grp7_cfg_default 0x00000000
604#define regk_iop_sw_cfg_rw_pdp_cfg_default 0x00000000
605#define regk_iop_sw_cfg_rw_pinmapping_default 0x00555555
606#define regk_iop_sw_cfg_rw_sap_in_owner_default 0x00000000
607#define regk_iop_sw_cfg_rw_sap_out_owner_default 0x00000000
608#define regk_iop_sw_cfg_rw_scrc_in_owner_default 0x00000000
609#define regk_iop_sw_cfg_rw_scrc_out_owner_default 0x00000000
610#define regk_iop_sw_cfg_rw_sdp_cfg_default 0x00000000
611#define regk_iop_sw_cfg_rw_spu_cfg_default 0x00000000
612#define regk_iop_sw_cfg_rw_spu_owner_default 0x00000000
613#define regk_iop_sw_cfg_rw_timer_grp0_cfg_default 0x00000000
614#define regk_iop_sw_cfg_rw_timer_grp0_owner_default 0x00000000
615#define regk_iop_sw_cfg_rw_timer_grp1_cfg_default 0x00000000
616#define regk_iop_sw_cfg_rw_timer_grp1_owner_default 0x00000000
617#define regk_iop_sw_cfg_rw_trigger_grp0_owner_default 0x00000000
618#define regk_iop_sw_cfg_rw_trigger_grp1_owner_default 0x00000000
619#define regk_iop_sw_cfg_rw_trigger_grp2_owner_default 0x00000000
620#define regk_iop_sw_cfg_rw_trigger_grp3_owner_default 0x00000000
621#define regk_iop_sw_cfg_rw_trigger_grp4_owner_default 0x00000000
622#define regk_iop_sw_cfg_rw_trigger_grp5_owner_default 0x00000000
623#define regk_iop_sw_cfg_rw_trigger_grp6_owner_default 0x00000000
624#define regk_iop_sw_cfg_rw_trigger_grp7_owner_default 0x00000000
625#define regk_iop_sw_cfg_rw_trigger_grps_cfg_default 0x00000000
626#define regk_iop_sw_cfg_sdp_out 0x00000004
627#define regk_iop_sw_cfg_size16 0x00000002
628#define regk_iop_sw_cfg_size24 0x00000003
629#define regk_iop_sw_cfg_size32 0x00000004
630#define regk_iop_sw_cfg_size8 0x00000001
631#define regk_iop_sw_cfg_spu 0x00000002
632#define regk_iop_sw_cfg_spu_bus_out0_hi 0x00000002
633#define regk_iop_sw_cfg_spu_bus_out0_lo 0x00000002
634#define regk_iop_sw_cfg_spu_bus_out1_hi 0x00000003
635#define regk_iop_sw_cfg_spu_bus_out1_lo 0x00000003
636#define regk_iop_sw_cfg_spu_g0 0x00000007
637#define regk_iop_sw_cfg_spu_g1 0x00000007
638#define regk_iop_sw_cfg_spu_g2 0x00000007
639#define regk_iop_sw_cfg_spu_g3 0x00000007
640#define regk_iop_sw_cfg_spu_g4 0x00000007
641#define regk_iop_sw_cfg_spu_g5 0x00000007
642#define regk_iop_sw_cfg_spu_g6 0x00000007
643#define regk_iop_sw_cfg_spu_g7 0x00000007
644#define regk_iop_sw_cfg_spu_gio0 0x00000000
645#define regk_iop_sw_cfg_spu_gio1 0x00000001
646#define regk_iop_sw_cfg_spu_gio5 0x00000005
647#define regk_iop_sw_cfg_spu_gio6 0x00000006
648#define regk_iop_sw_cfg_spu_gio7 0x00000007
649#define regk_iop_sw_cfg_spu_gio_out0 0x00000008
650#define regk_iop_sw_cfg_spu_gio_out1 0x00000009
651#define regk_iop_sw_cfg_spu_gio_out2 0x0000000a
652#define regk_iop_sw_cfg_spu_gio_out3 0x0000000b
653#define regk_iop_sw_cfg_spu_gio_out4 0x0000000c
654#define regk_iop_sw_cfg_spu_gio_out5 0x0000000d
655#define regk_iop_sw_cfg_spu_gio_out6 0x0000000e
656#define regk_iop_sw_cfg_spu_gio_out7 0x0000000f
657#define regk_iop_sw_cfg_spu_gioout0 0x00000000
658#define regk_iop_sw_cfg_spu_gioout1 0x00000000
659#define regk_iop_sw_cfg_spu_gioout10 0x00000007
660#define regk_iop_sw_cfg_spu_gioout11 0x00000007
661#define regk_iop_sw_cfg_spu_gioout12 0x00000007
662#define regk_iop_sw_cfg_spu_gioout13 0x00000007
663#define regk_iop_sw_cfg_spu_gioout14 0x00000007
664#define regk_iop_sw_cfg_spu_gioout15 0x00000007
665#define regk_iop_sw_cfg_spu_gioout16 0x00000007
666#define regk_iop_sw_cfg_spu_gioout17 0x00000007
667#define regk_iop_sw_cfg_spu_gioout18 0x00000007
668#define regk_iop_sw_cfg_spu_gioout19 0x00000007
669#define regk_iop_sw_cfg_spu_gioout2 0x00000001
670#define regk_iop_sw_cfg_spu_gioout20 0x00000007
671#define regk_iop_sw_cfg_spu_gioout21 0x00000007
672#define regk_iop_sw_cfg_spu_gioout22 0x00000007
673#define regk_iop_sw_cfg_spu_gioout23 0x00000007
674#define regk_iop_sw_cfg_spu_gioout24 0x00000007
675#define regk_iop_sw_cfg_spu_gioout25 0x00000007
676#define regk_iop_sw_cfg_spu_gioout26 0x00000007
677#define regk_iop_sw_cfg_spu_gioout27 0x00000007
678#define regk_iop_sw_cfg_spu_gioout28 0x00000007
679#define regk_iop_sw_cfg_spu_gioout29 0x00000007
680#define regk_iop_sw_cfg_spu_gioout3 0x00000001
681#define regk_iop_sw_cfg_spu_gioout30 0x00000007
682#define regk_iop_sw_cfg_spu_gioout31 0x00000007
683#define regk_iop_sw_cfg_spu_gioout4 0x00000002
684#define regk_iop_sw_cfg_spu_gioout5 0x00000002
685#define regk_iop_sw_cfg_spu_gioout6 0x00000003
686#define regk_iop_sw_cfg_spu_gioout7 0x00000003
687#define regk_iop_sw_cfg_spu_gioout8 0x00000007
688#define regk_iop_sw_cfg_spu_gioout9 0x00000007
689#define regk_iop_sw_cfg_strb_timer_grp0_tmr0 0x00000001
690#define regk_iop_sw_cfg_strb_timer_grp0_tmr1 0x00000002
691#define regk_iop_sw_cfg_strb_timer_grp1_tmr0 0x00000003
692#define regk_iop_sw_cfg_strb_timer_grp1_tmr1 0x00000002
693#define regk_iop_sw_cfg_timer_grp0 0x00000000
694#define regk_iop_sw_cfg_timer_grp0_rot 0x00000001
695#define regk_iop_sw_cfg_timer_grp0_strb0 0x00000005
696#define regk_iop_sw_cfg_timer_grp0_strb1 0x00000005
697#define regk_iop_sw_cfg_timer_grp0_strb2 0x00000005
698#define regk_iop_sw_cfg_timer_grp0_strb3 0x00000005
699#define regk_iop_sw_cfg_timer_grp0_tmr0 0x00000002
700#define regk_iop_sw_cfg_timer_grp1 0x00000000
701#define regk_iop_sw_cfg_timer_grp1_rot 0x00000001
702#define regk_iop_sw_cfg_timer_grp1_strb0 0x00000006
703#define regk_iop_sw_cfg_timer_grp1_strb1 0x00000006
704#define regk_iop_sw_cfg_timer_grp1_strb2 0x00000006
705#define regk_iop_sw_cfg_timer_grp1_strb3 0x00000006
706#define regk_iop_sw_cfg_timer_grp1_tmr0 0x00000003
707#define regk_iop_sw_cfg_trig0_0 0x00000000
708#define regk_iop_sw_cfg_trig0_1 0x00000000
709#define regk_iop_sw_cfg_trig0_2 0x00000000
710#define regk_iop_sw_cfg_trig0_3 0x00000000
711#define regk_iop_sw_cfg_trig1_0 0x00000000
712#define regk_iop_sw_cfg_trig1_1 0x00000000
713#define regk_iop_sw_cfg_trig1_2 0x00000000
714#define regk_iop_sw_cfg_trig1_3 0x00000000
715#define regk_iop_sw_cfg_trig2_0 0x00000001
716#define regk_iop_sw_cfg_trig2_1 0x00000001
717#define regk_iop_sw_cfg_trig2_2 0x00000001
718#define regk_iop_sw_cfg_trig2_3 0x00000001
719#define regk_iop_sw_cfg_trig3_0 0x00000001
720#define regk_iop_sw_cfg_trig3_1 0x00000001
721#define regk_iop_sw_cfg_trig3_2 0x00000001
722#define regk_iop_sw_cfg_trig3_3 0x00000001
723#define regk_iop_sw_cfg_trig4_0 0x00000002
724#define regk_iop_sw_cfg_trig4_1 0x00000002
725#define regk_iop_sw_cfg_trig4_2 0x00000002
726#define regk_iop_sw_cfg_trig4_3 0x00000002
727#define regk_iop_sw_cfg_trig5_0 0x00000002
728#define regk_iop_sw_cfg_trig5_1 0x00000002
729#define regk_iop_sw_cfg_trig5_2 0x00000002
730#define regk_iop_sw_cfg_trig5_3 0x00000002
731#define regk_iop_sw_cfg_trig6_0 0x00000003
732#define regk_iop_sw_cfg_trig6_1 0x00000003
733#define regk_iop_sw_cfg_trig6_2 0x00000003
734#define regk_iop_sw_cfg_trig6_3 0x00000003
735#define regk_iop_sw_cfg_trig7_0 0x00000003
736#define regk_iop_sw_cfg_trig7_1 0x00000003
737#define regk_iop_sw_cfg_trig7_2 0x00000003
738#define regk_iop_sw_cfg_trig7_3 0x00000003
739#endif /* __iop_sw_cfg_defs_asm_h */
diff --git a/include/asm-cris/arch-v32/mach-a3/hwregs/iop/asm/iop_sw_cpu_defs_asm.h b/include/asm-cris/arch-v32/mach-a3/hwregs/iop/asm/iop_sw_cpu_defs_asm.h
new file mode 100644
index 000000000000..3f4fe1b31815
--- /dev/null
+++ b/include/asm-cris/arch-v32/mach-a3/hwregs/iop/asm/iop_sw_cpu_defs_asm.h
@@ -0,0 +1,950 @@
1#ifndef __iop_sw_cpu_defs_asm_h
2#define __iop_sw_cpu_defs_asm_h
3
4/*
5 * This file is autogenerated from
6 * file: iop_sw_cpu.r
7 *
8 * by ../../../tools/rdesc/bin/rdes2c -asm -outfile iop_sw_cpu_defs_asm.h iop_sw_cpu.r
9 * Any changes here will be lost.
10 *
11 * -*- buffer-read-only: t -*-
12 */
13
14#ifndef REG_FIELD
15#define REG_FIELD( scope, reg, field, value ) \
16 REG_FIELD_X_( value, reg_##scope##_##reg##___##field##___lsb )
17#define REG_FIELD_X_( value, shift ) ((value) << shift)
18#endif
19
20#ifndef REG_STATE
21#define REG_STATE( scope, reg, field, symbolic_value ) \
22 REG_STATE_X_( regk_##scope##_##symbolic_value, reg_##scope##_##reg##___##field##___lsb )
23#define REG_STATE_X_( k, shift ) (k << shift)
24#endif
25
26#ifndef REG_MASK
27#define REG_MASK( scope, reg, field ) \
28 REG_MASK_X_( reg_##scope##_##reg##___##field##___width, reg_##scope##_##reg##___##field##___lsb )
29#define REG_MASK_X_( width, lsb ) (((1 << width)-1) << lsb)
30#endif
31
32#ifndef REG_LSB
33#define REG_LSB( scope, reg, field ) reg_##scope##_##reg##___##field##___lsb
34#endif
35
36#ifndef REG_BIT
37#define REG_BIT( scope, reg, field ) reg_##scope##_##reg##___##field##___bit
38#endif
39
40#ifndef REG_ADDR
41#define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset)
42#define REG_ADDR_X_( inst, offs ) ((inst) + offs)
43#endif
44
45#ifndef REG_ADDR_VECT
46#define REG_ADDR_VECT( scope, inst, reg, index ) \
47 REG_ADDR_VECT_X_(inst, reg_##scope##_##reg##_offset, index, \
48 STRIDE_##scope##_##reg )
49#define REG_ADDR_VECT_X_( inst, offs, index, stride ) \
50 ((inst) + offs + (index) * stride)
51#endif
52
53/* Register r_mpu_trace, scope iop_sw_cpu, type r */
54#define reg_iop_sw_cpu_r_mpu_trace_offset 0
55
56/* Register r_spu_trace, scope iop_sw_cpu, type r */
57#define reg_iop_sw_cpu_r_spu_trace_offset 4
58
59/* Register r_spu_fsm_trace, scope iop_sw_cpu, type r */
60#define reg_iop_sw_cpu_r_spu_fsm_trace_offset 8
61
62/* Register rw_mc_ctrl, scope iop_sw_cpu, type rw */
63#define reg_iop_sw_cpu_rw_mc_ctrl___keep_owner___lsb 0
64#define reg_iop_sw_cpu_rw_mc_ctrl___keep_owner___width 1
65#define reg_iop_sw_cpu_rw_mc_ctrl___keep_owner___bit 0
66#define reg_iop_sw_cpu_rw_mc_ctrl___cmd___lsb 1
67#define reg_iop_sw_cpu_rw_mc_ctrl___cmd___width 2
68#define reg_iop_sw_cpu_rw_mc_ctrl___size___lsb 3
69#define reg_iop_sw_cpu_rw_mc_ctrl___size___width 3
70#define reg_iop_sw_cpu_rw_mc_ctrl___wr_spu_mem___lsb 6
71#define reg_iop_sw_cpu_rw_mc_ctrl___wr_spu_mem___width 1
72#define reg_iop_sw_cpu_rw_mc_ctrl___wr_spu_mem___bit 6
73#define reg_iop_sw_cpu_rw_mc_ctrl_offset 12
74
75/* Register rw_mc_data, scope iop_sw_cpu, type rw */
76#define reg_iop_sw_cpu_rw_mc_data___val___lsb 0
77#define reg_iop_sw_cpu_rw_mc_data___val___width 32
78#define reg_iop_sw_cpu_rw_mc_data_offset 16
79
80/* Register rw_mc_addr, scope iop_sw_cpu, type rw */
81#define reg_iop_sw_cpu_rw_mc_addr_offset 20
82
83/* Register rs_mc_data, scope iop_sw_cpu, type rs */
84#define reg_iop_sw_cpu_rs_mc_data_offset 24
85
86/* Register r_mc_data, scope iop_sw_cpu, type r */
87#define reg_iop_sw_cpu_r_mc_data_offset 28
88
89/* Register r_mc_stat, scope iop_sw_cpu, type r */
90#define reg_iop_sw_cpu_r_mc_stat___busy_cpu___lsb 0
91#define reg_iop_sw_cpu_r_mc_stat___busy_cpu___width 1
92#define reg_iop_sw_cpu_r_mc_stat___busy_cpu___bit 0
93#define reg_iop_sw_cpu_r_mc_stat___busy_mpu___lsb 1
94#define reg_iop_sw_cpu_r_mc_stat___busy_mpu___width 1
95#define reg_iop_sw_cpu_r_mc_stat___busy_mpu___bit 1
96#define reg_iop_sw_cpu_r_mc_stat___busy_spu___lsb 2
97#define reg_iop_sw_cpu_r_mc_stat___busy_spu___width 1
98#define reg_iop_sw_cpu_r_mc_stat___busy_spu___bit 2
99#define reg_iop_sw_cpu_r_mc_stat___owned_by_cpu___lsb 3
100#define reg_iop_sw_cpu_r_mc_stat___owned_by_cpu___width 1
101#define reg_iop_sw_cpu_r_mc_stat___owned_by_cpu___bit 3
102#define reg_iop_sw_cpu_r_mc_stat___owned_by_mpu___lsb 4
103#define reg_iop_sw_cpu_r_mc_stat___owned_by_mpu___width 1
104#define reg_iop_sw_cpu_r_mc_stat___owned_by_mpu___bit 4
105#define reg_iop_sw_cpu_r_mc_stat___owned_by_spu___lsb 5
106#define reg_iop_sw_cpu_r_mc_stat___owned_by_spu___width 1
107#define reg_iop_sw_cpu_r_mc_stat___owned_by_spu___bit 5
108#define reg_iop_sw_cpu_r_mc_stat_offset 32
109
110/* Register rw_bus_clr_mask, scope iop_sw_cpu, type rw */
111#define reg_iop_sw_cpu_rw_bus_clr_mask___byte0___lsb 0
112#define reg_iop_sw_cpu_rw_bus_clr_mask___byte0___width 8
113#define reg_iop_sw_cpu_rw_bus_clr_mask___byte1___lsb 8
114#define reg_iop_sw_cpu_rw_bus_clr_mask___byte1___width 8
115#define reg_iop_sw_cpu_rw_bus_clr_mask___byte2___lsb 16
116#define reg_iop_sw_cpu_rw_bus_clr_mask___byte2___width 8
117#define reg_iop_sw_cpu_rw_bus_clr_mask___byte3___lsb 24
118#define reg_iop_sw_cpu_rw_bus_clr_mask___byte3___width 8
119#define reg_iop_sw_cpu_rw_bus_clr_mask_offset 36
120
121/* Register rw_bus_set_mask, scope iop_sw_cpu, type rw */
122#define reg_iop_sw_cpu_rw_bus_set_mask___byte0___lsb 0
123#define reg_iop_sw_cpu_rw_bus_set_mask___byte0___width 8
124#define reg_iop_sw_cpu_rw_bus_set_mask___byte1___lsb 8
125#define reg_iop_sw_cpu_rw_bus_set_mask___byte1___width 8
126#define reg_iop_sw_cpu_rw_bus_set_mask___byte2___lsb 16
127#define reg_iop_sw_cpu_rw_bus_set_mask___byte2___width 8
128#define reg_iop_sw_cpu_rw_bus_set_mask___byte3___lsb 24
129#define reg_iop_sw_cpu_rw_bus_set_mask___byte3___width 8
130#define reg_iop_sw_cpu_rw_bus_set_mask_offset 40
131
132/* Register rw_bus_oe_clr_mask, scope iop_sw_cpu, type rw */
133#define reg_iop_sw_cpu_rw_bus_oe_clr_mask___byte0___lsb 0
134#define reg_iop_sw_cpu_rw_bus_oe_clr_mask___byte0___width 1
135#define reg_iop_sw_cpu_rw_bus_oe_clr_mask___byte0___bit 0
136#define reg_iop_sw_cpu_rw_bus_oe_clr_mask___byte1___lsb 1
137#define reg_iop_sw_cpu_rw_bus_oe_clr_mask___byte1___width 1
138#define reg_iop_sw_cpu_rw_bus_oe_clr_mask___byte1___bit 1
139#define reg_iop_sw_cpu_rw_bus_oe_clr_mask___byte2___lsb 2
140#define reg_iop_sw_cpu_rw_bus_oe_clr_mask___byte2___width 1
141#define reg_iop_sw_cpu_rw_bus_oe_clr_mask___byte2___bit 2
142#define reg_iop_sw_cpu_rw_bus_oe_clr_mask___byte3___lsb 3
143#define reg_iop_sw_cpu_rw_bus_oe_clr_mask___byte3___width 1
144#define reg_iop_sw_cpu_rw_bus_oe_clr_mask___byte3___bit 3
145#define reg_iop_sw_cpu_rw_bus_oe_clr_mask_offset 44
146
147/* Register rw_bus_oe_set_mask, scope iop_sw_cpu, type rw */
148#define reg_iop_sw_cpu_rw_bus_oe_set_mask___byte0___lsb 0
149#define reg_iop_sw_cpu_rw_bus_oe_set_mask___byte0___width 1
150#define reg_iop_sw_cpu_rw_bus_oe_set_mask___byte0___bit 0
151#define reg_iop_sw_cpu_rw_bus_oe_set_mask___byte1___lsb 1
152#define reg_iop_sw_cpu_rw_bus_oe_set_mask___byte1___width 1
153#define reg_iop_sw_cpu_rw_bus_oe_set_mask___byte1___bit 1
154#define reg_iop_sw_cpu_rw_bus_oe_set_mask___byte2___lsb 2
155#define reg_iop_sw_cpu_rw_bus_oe_set_mask___byte2___width 1
156#define reg_iop_sw_cpu_rw_bus_oe_set_mask___byte2___bit 2
157#define reg_iop_sw_cpu_rw_bus_oe_set_mask___byte3___lsb 3
158#define reg_iop_sw_cpu_rw_bus_oe_set_mask___byte3___width 1
159#define reg_iop_sw_cpu_rw_bus_oe_set_mask___byte3___bit 3
160#define reg_iop_sw_cpu_rw_bus_oe_set_mask_offset 48
161
162/* Register r_bus_in, scope iop_sw_cpu, type r */
163#define reg_iop_sw_cpu_r_bus_in_offset 52
164
165/* Register rw_gio_clr_mask, scope iop_sw_cpu, type rw */
166#define reg_iop_sw_cpu_rw_gio_clr_mask___val___lsb 0
167#define reg_iop_sw_cpu_rw_gio_clr_mask___val___width 32
168#define reg_iop_sw_cpu_rw_gio_clr_mask_offset 56
169
170/* Register rw_gio_set_mask, scope iop_sw_cpu, type rw */
171#define reg_iop_sw_cpu_rw_gio_set_mask___val___lsb 0
172#define reg_iop_sw_cpu_rw_gio_set_mask___val___width 32
173#define reg_iop_sw_cpu_rw_gio_set_mask_offset 60
174
175/* Register rw_gio_oe_clr_mask, scope iop_sw_cpu, type rw */
176#define reg_iop_sw_cpu_rw_gio_oe_clr_mask___val___lsb 0
177#define reg_iop_sw_cpu_rw_gio_oe_clr_mask___val___width 32
178#define reg_iop_sw_cpu_rw_gio_oe_clr_mask_offset 64
179
180/* Register rw_gio_oe_set_mask, scope iop_sw_cpu, type rw */
181#define reg_iop_sw_cpu_rw_gio_oe_set_mask___val___lsb 0
182#define reg_iop_sw_cpu_rw_gio_oe_set_mask___val___width 32
183#define reg_iop_sw_cpu_rw_gio_oe_set_mask_offset 68
184
185/* Register r_gio_in, scope iop_sw_cpu, type r */
186#define reg_iop_sw_cpu_r_gio_in_offset 72
187
188/* Register rw_intr0_mask, scope iop_sw_cpu, type rw */
189#define reg_iop_sw_cpu_rw_intr0_mask___mpu_0___lsb 0
190#define reg_iop_sw_cpu_rw_intr0_mask___mpu_0___width 1
191#define reg_iop_sw_cpu_rw_intr0_mask___mpu_0___bit 0
192#define reg_iop_sw_cpu_rw_intr0_mask___mpu_1___lsb 1
193#define reg_iop_sw_cpu_rw_intr0_mask___mpu_1___width 1
194#define reg_iop_sw_cpu_rw_intr0_mask___mpu_1___bit 1
195#define reg_iop_sw_cpu_rw_intr0_mask___mpu_2___lsb 2
196#define reg_iop_sw_cpu_rw_intr0_mask___mpu_2___width 1
197#define reg_iop_sw_cpu_rw_intr0_mask___mpu_2___bit 2
198#define reg_iop_sw_cpu_rw_intr0_mask___mpu_3___lsb 3
199#define reg_iop_sw_cpu_rw_intr0_mask___mpu_3___width 1
200#define reg_iop_sw_cpu_rw_intr0_mask___mpu_3___bit 3
201#define reg_iop_sw_cpu_rw_intr0_mask___mpu_4___lsb 4
202#define reg_iop_sw_cpu_rw_intr0_mask___mpu_4___width 1
203#define reg_iop_sw_cpu_rw_intr0_mask___mpu_4___bit 4
204#define reg_iop_sw_cpu_rw_intr0_mask___mpu_5___lsb 5
205#define reg_iop_sw_cpu_rw_intr0_mask___mpu_5___width 1
206#define reg_iop_sw_cpu_rw_intr0_mask___mpu_5___bit 5
207#define reg_iop_sw_cpu_rw_intr0_mask___mpu_6___lsb 6
208#define reg_iop_sw_cpu_rw_intr0_mask___mpu_6___width 1
209#define reg_iop_sw_cpu_rw_intr0_mask___mpu_6___bit 6
210#define reg_iop_sw_cpu_rw_intr0_mask___mpu_7___lsb 7
211#define reg_iop_sw_cpu_rw_intr0_mask___mpu_7___width 1
212#define reg_iop_sw_cpu_rw_intr0_mask___mpu_7___bit 7
213#define reg_iop_sw_cpu_rw_intr0_mask___mpu_8___lsb 8
214#define reg_iop_sw_cpu_rw_intr0_mask___mpu_8___width 1
215#define reg_iop_sw_cpu_rw_intr0_mask___mpu_8___bit 8
216#define reg_iop_sw_cpu_rw_intr0_mask___mpu_9___lsb 9
217#define reg_iop_sw_cpu_rw_intr0_mask___mpu_9___width 1
218#define reg_iop_sw_cpu_rw_intr0_mask___mpu_9___bit 9
219#define reg_iop_sw_cpu_rw_intr0_mask___mpu_10___lsb 10
220#define reg_iop_sw_cpu_rw_intr0_mask___mpu_10___width 1
221#define reg_iop_sw_cpu_rw_intr0_mask___mpu_10___bit 10
222#define reg_iop_sw_cpu_rw_intr0_mask___mpu_11___lsb 11
223#define reg_iop_sw_cpu_rw_intr0_mask___mpu_11___width 1
224#define reg_iop_sw_cpu_rw_intr0_mask___mpu_11___bit 11
225#define reg_iop_sw_cpu_rw_intr0_mask___mpu_12___lsb 12
226#define reg_iop_sw_cpu_rw_intr0_mask___mpu_12___width 1
227#define reg_iop_sw_cpu_rw_intr0_mask___mpu_12___bit 12
228#define reg_iop_sw_cpu_rw_intr0_mask___mpu_13___lsb 13
229#define reg_iop_sw_cpu_rw_intr0_mask___mpu_13___width 1
230#define reg_iop_sw_cpu_rw_intr0_mask___mpu_13___bit 13
231#define reg_iop_sw_cpu_rw_intr0_mask___mpu_14___lsb 14
232#define reg_iop_sw_cpu_rw_intr0_mask___mpu_14___width 1
233#define reg_iop_sw_cpu_rw_intr0_mask___mpu_14___bit 14
234#define reg_iop_sw_cpu_rw_intr0_mask___mpu_15___lsb 15
235#define reg_iop_sw_cpu_rw_intr0_mask___mpu_15___width 1
236#define reg_iop_sw_cpu_rw_intr0_mask___mpu_15___bit 15
237#define reg_iop_sw_cpu_rw_intr0_mask___spu_0___lsb 16
238#define reg_iop_sw_cpu_rw_intr0_mask___spu_0___width 1
239#define reg_iop_sw_cpu_rw_intr0_mask___spu_0___bit 16
240#define reg_iop_sw_cpu_rw_intr0_mask___spu_1___lsb 17
241#define reg_iop_sw_cpu_rw_intr0_mask___spu_1___width 1
242#define reg_iop_sw_cpu_rw_intr0_mask___spu_1___bit 17
243#define reg_iop_sw_cpu_rw_intr0_mask___spu_2___lsb 18
244#define reg_iop_sw_cpu_rw_intr0_mask___spu_2___width 1
245#define reg_iop_sw_cpu_rw_intr0_mask___spu_2___bit 18
246#define reg_iop_sw_cpu_rw_intr0_mask___spu_3___lsb 19
247#define reg_iop_sw_cpu_rw_intr0_mask___spu_3___width 1
248#define reg_iop_sw_cpu_rw_intr0_mask___spu_3___bit 19
249#define reg_iop_sw_cpu_rw_intr0_mask___spu_4___lsb 20
250#define reg_iop_sw_cpu_rw_intr0_mask___spu_4___width 1
251#define reg_iop_sw_cpu_rw_intr0_mask___spu_4___bit 20
252#define reg_iop_sw_cpu_rw_intr0_mask___spu_5___lsb 21
253#define reg_iop_sw_cpu_rw_intr0_mask___spu_5___width 1
254#define reg_iop_sw_cpu_rw_intr0_mask___spu_5___bit 21
255#define reg_iop_sw_cpu_rw_intr0_mask___spu_6___lsb 22
256#define reg_iop_sw_cpu_rw_intr0_mask___spu_6___width 1
257#define reg_iop_sw_cpu_rw_intr0_mask___spu_6___bit 22
258#define reg_iop_sw_cpu_rw_intr0_mask___spu_7___lsb 23
259#define reg_iop_sw_cpu_rw_intr0_mask___spu_7___width 1
260#define reg_iop_sw_cpu_rw_intr0_mask___spu_7___bit 23
261#define reg_iop_sw_cpu_rw_intr0_mask___spu_8___lsb 24
262#define reg_iop_sw_cpu_rw_intr0_mask___spu_8___width 1
263#define reg_iop_sw_cpu_rw_intr0_mask___spu_8___bit 24
264#define reg_iop_sw_cpu_rw_intr0_mask___spu_9___lsb 25
265#define reg_iop_sw_cpu_rw_intr0_mask___spu_9___width 1
266#define reg_iop_sw_cpu_rw_intr0_mask___spu_9___bit 25
267#define reg_iop_sw_cpu_rw_intr0_mask___spu_10___lsb 26
268#define reg_iop_sw_cpu_rw_intr0_mask___spu_10___width 1
269#define reg_iop_sw_cpu_rw_intr0_mask___spu_10___bit 26
270#define reg_iop_sw_cpu_rw_intr0_mask___spu_11___lsb 27
271#define reg_iop_sw_cpu_rw_intr0_mask___spu_11___width 1
272#define reg_iop_sw_cpu_rw_intr0_mask___spu_11___bit 27
273#define reg_iop_sw_cpu_rw_intr0_mask___spu_12___lsb 28
274#define reg_iop_sw_cpu_rw_intr0_mask___spu_12___width 1
275#define reg_iop_sw_cpu_rw_intr0_mask___spu_12___bit 28
276#define reg_iop_sw_cpu_rw_intr0_mask___spu_13___lsb 29
277#define reg_iop_sw_cpu_rw_intr0_mask___spu_13___width 1
278#define reg_iop_sw_cpu_rw_intr0_mask___spu_13___bit 29
279#define reg_iop_sw_cpu_rw_intr0_mask___spu_14___lsb 30
280#define reg_iop_sw_cpu_rw_intr0_mask___spu_14___width 1
281#define reg_iop_sw_cpu_rw_intr0_mask___spu_14___bit 30
282#define reg_iop_sw_cpu_rw_intr0_mask___spu_15___lsb 31
283#define reg_iop_sw_cpu_rw_intr0_mask___spu_15___width 1
284#define reg_iop_sw_cpu_rw_intr0_mask___spu_15___bit 31
285#define reg_iop_sw_cpu_rw_intr0_mask_offset 76
286
287/* Register rw_ack_intr0, scope iop_sw_cpu, type rw */
288#define reg_iop_sw_cpu_rw_ack_intr0___mpu_0___lsb 0
289#define reg_iop_sw_cpu_rw_ack_intr0___mpu_0___width 1
290#define reg_iop_sw_cpu_rw_ack_intr0___mpu_0___bit 0
291#define reg_iop_sw_cpu_rw_ack_intr0___mpu_1___lsb 1
292#define reg_iop_sw_cpu_rw_ack_intr0___mpu_1___width 1
293#define reg_iop_sw_cpu_rw_ack_intr0___mpu_1___bit 1
294#define reg_iop_sw_cpu_rw_ack_intr0___mpu_2___lsb 2
295#define reg_iop_sw_cpu_rw_ack_intr0___mpu_2___width 1
296#define reg_iop_sw_cpu_rw_ack_intr0___mpu_2___bit 2
297#define reg_iop_sw_cpu_rw_ack_intr0___mpu_3___lsb 3
298#define reg_iop_sw_cpu_rw_ack_intr0___mpu_3___width 1
299#define reg_iop_sw_cpu_rw_ack_intr0___mpu_3___bit 3
300#define reg_iop_sw_cpu_rw_ack_intr0___mpu_4___lsb 4
301#define reg_iop_sw_cpu_rw_ack_intr0___mpu_4___width 1
302#define reg_iop_sw_cpu_rw_ack_intr0___mpu_4___bit 4
303#define reg_iop_sw_cpu_rw_ack_intr0___mpu_5___lsb 5
304#define reg_iop_sw_cpu_rw_ack_intr0___mpu_5___width 1
305#define reg_iop_sw_cpu_rw_ack_intr0___mpu_5___bit 5
306#define reg_iop_sw_cpu_rw_ack_intr0___mpu_6___lsb 6
307#define reg_iop_sw_cpu_rw_ack_intr0___mpu_6___width 1
308#define reg_iop_sw_cpu_rw_ack_intr0___mpu_6___bit 6
309#define reg_iop_sw_cpu_rw_ack_intr0___mpu_7___lsb 7
310#define reg_iop_sw_cpu_rw_ack_intr0___mpu_7___width 1
311#define reg_iop_sw_cpu_rw_ack_intr0___mpu_7___bit 7
312#define reg_iop_sw_cpu_rw_ack_intr0___mpu_8___lsb 8
313#define reg_iop_sw_cpu_rw_ack_intr0___mpu_8___width 1
314#define reg_iop_sw_cpu_rw_ack_intr0___mpu_8___bit 8
315#define reg_iop_sw_cpu_rw_ack_intr0___mpu_9___lsb 9
316#define reg_iop_sw_cpu_rw_ack_intr0___mpu_9___width 1
317#define reg_iop_sw_cpu_rw_ack_intr0___mpu_9___bit 9
318#define reg_iop_sw_cpu_rw_ack_intr0___mpu_10___lsb 10
319#define reg_iop_sw_cpu_rw_ack_intr0___mpu_10___width 1
320#define reg_iop_sw_cpu_rw_ack_intr0___mpu_10___bit 10
321#define reg_iop_sw_cpu_rw_ack_intr0___mpu_11___lsb 11
322#define reg_iop_sw_cpu_rw_ack_intr0___mpu_11___width 1
323#define reg_iop_sw_cpu_rw_ack_intr0___mpu_11___bit 11
324#define reg_iop_sw_cpu_rw_ack_intr0___mpu_12___lsb 12
325#define reg_iop_sw_cpu_rw_ack_intr0___mpu_12___width 1
326#define reg_iop_sw_cpu_rw_ack_intr0___mpu_12___bit 12
327#define reg_iop_sw_cpu_rw_ack_intr0___mpu_13___lsb 13
328#define reg_iop_sw_cpu_rw_ack_intr0___mpu_13___width 1
329#define reg_iop_sw_cpu_rw_ack_intr0___mpu_13___bit 13
330#define reg_iop_sw_cpu_rw_ack_intr0___mpu_14___lsb 14
331#define reg_iop_sw_cpu_rw_ack_intr0___mpu_14___width 1
332#define reg_iop_sw_cpu_rw_ack_intr0___mpu_14___bit 14
333#define reg_iop_sw_cpu_rw_ack_intr0___mpu_15___lsb 15
334#define reg_iop_sw_cpu_rw_ack_intr0___mpu_15___width 1
335#define reg_iop_sw_cpu_rw_ack_intr0___mpu_15___bit 15
336#define reg_iop_sw_cpu_rw_ack_intr0___spu_0___lsb 16
337#define reg_iop_sw_cpu_rw_ack_intr0___spu_0___width 1
338#define reg_iop_sw_cpu_rw_ack_intr0___spu_0___bit 16
339#define reg_iop_sw_cpu_rw_ack_intr0___spu_1___lsb 17
340#define reg_iop_sw_cpu_rw_ack_intr0___spu_1___width 1
341#define reg_iop_sw_cpu_rw_ack_intr0___spu_1___bit 17
342#define reg_iop_sw_cpu_rw_ack_intr0___spu_2___lsb 18
343#define reg_iop_sw_cpu_rw_ack_intr0___spu_2___width 1
344#define reg_iop_sw_cpu_rw_ack_intr0___spu_2___bit 18
345#define reg_iop_sw_cpu_rw_ack_intr0___spu_3___lsb 19
346#define reg_iop_sw_cpu_rw_ack_intr0___spu_3___width 1
347#define reg_iop_sw_cpu_rw_ack_intr0___spu_3___bit 19
348#define reg_iop_sw_cpu_rw_ack_intr0___spu_4___lsb 20
349#define reg_iop_sw_cpu_rw_ack_intr0___spu_4___width 1
350#define reg_iop_sw_cpu_rw_ack_intr0___spu_4___bit 20
351#define reg_iop_sw_cpu_rw_ack_intr0___spu_5___lsb 21
352#define reg_iop_sw_cpu_rw_ack_intr0___spu_5___width 1
353#define reg_iop_sw_cpu_rw_ack_intr0___spu_5___bit 21
354#define reg_iop_sw_cpu_rw_ack_intr0___spu_6___lsb 22
355#define reg_iop_sw_cpu_rw_ack_intr0___spu_6___width 1
356#define reg_iop_sw_cpu_rw_ack_intr0___spu_6___bit 22
357#define reg_iop_sw_cpu_rw_ack_intr0___spu_7___lsb 23
358#define reg_iop_sw_cpu_rw_ack_intr0___spu_7___width 1
359#define reg_iop_sw_cpu_rw_ack_intr0___spu_7___bit 23
360#define reg_iop_sw_cpu_rw_ack_intr0___spu_8___lsb 24
361#define reg_iop_sw_cpu_rw_ack_intr0___spu_8___width 1
362#define reg_iop_sw_cpu_rw_ack_intr0___spu_8___bit 24
363#define reg_iop_sw_cpu_rw_ack_intr0___spu_9___lsb 25
364#define reg_iop_sw_cpu_rw_ack_intr0___spu_9___width 1
365#define reg_iop_sw_cpu_rw_ack_intr0___spu_9___bit 25
366#define reg_iop_sw_cpu_rw_ack_intr0___spu_10___lsb 26
367#define reg_iop_sw_cpu_rw_ack_intr0___spu_10___width 1
368#define reg_iop_sw_cpu_rw_ack_intr0___spu_10___bit 26
369#define reg_iop_sw_cpu_rw_ack_intr0___spu_11___lsb 27
370#define reg_iop_sw_cpu_rw_ack_intr0___spu_11___width 1
371#define reg_iop_sw_cpu_rw_ack_intr0___spu_11___bit 27
372#define reg_iop_sw_cpu_rw_ack_intr0___spu_12___lsb 28
373#define reg_iop_sw_cpu_rw_ack_intr0___spu_12___width 1
374#define reg_iop_sw_cpu_rw_ack_intr0___spu_12___bit 28
375#define reg_iop_sw_cpu_rw_ack_intr0___spu_13___lsb 29
376#define reg_iop_sw_cpu_rw_ack_intr0___spu_13___width 1
377#define reg_iop_sw_cpu_rw_ack_intr0___spu_13___bit 29
378#define reg_iop_sw_cpu_rw_ack_intr0___spu_14___lsb 30
379#define reg_iop_sw_cpu_rw_ack_intr0___spu_14___width 1
380#define reg_iop_sw_cpu_rw_ack_intr0___spu_14___bit 30
381#define reg_iop_sw_cpu_rw_ack_intr0___spu_15___lsb 31
382#define reg_iop_sw_cpu_rw_ack_intr0___spu_15___width 1
383#define reg_iop_sw_cpu_rw_ack_intr0___spu_15___bit 31
384#define reg_iop_sw_cpu_rw_ack_intr0_offset 80
385
386/* Register r_intr0, scope iop_sw_cpu, type r */
387#define reg_iop_sw_cpu_r_intr0___mpu_0___lsb 0
388#define reg_iop_sw_cpu_r_intr0___mpu_0___width 1
389#define reg_iop_sw_cpu_r_intr0___mpu_0___bit 0
390#define reg_iop_sw_cpu_r_intr0___mpu_1___lsb 1
391#define reg_iop_sw_cpu_r_intr0___mpu_1___width 1
392#define reg_iop_sw_cpu_r_intr0___mpu_1___bit 1
393#define reg_iop_sw_cpu_r_intr0___mpu_2___lsb 2
394#define reg_iop_sw_cpu_r_intr0___mpu_2___width 1
395#define reg_iop_sw_cpu_r_intr0___mpu_2___bit 2
396#define reg_iop_sw_cpu_r_intr0___mpu_3___lsb 3
397#define reg_iop_sw_cpu_r_intr0___mpu_3___width 1
398#define reg_iop_sw_cpu_r_intr0___mpu_3___bit 3
399#define reg_iop_sw_cpu_r_intr0___mpu_4___lsb 4
400#define reg_iop_sw_cpu_r_intr0___mpu_4___width 1
401#define reg_iop_sw_cpu_r_intr0___mpu_4___bit 4
402#define reg_iop_sw_cpu_r_intr0___mpu_5___lsb 5
403#define reg_iop_sw_cpu_r_intr0___mpu_5___width 1
404#define reg_iop_sw_cpu_r_intr0___mpu_5___bit 5
405#define reg_iop_sw_cpu_r_intr0___mpu_6___lsb 6
406#define reg_iop_sw_cpu_r_intr0___mpu_6___width 1
407#define reg_iop_sw_cpu_r_intr0___mpu_6___bit 6
408#define reg_iop_sw_cpu_r_intr0___mpu_7___lsb 7
409#define reg_iop_sw_cpu_r_intr0___mpu_7___width 1
410#define reg_iop_sw_cpu_r_intr0___mpu_7___bit 7
411#define reg_iop_sw_cpu_r_intr0___mpu_8___lsb 8
412#define reg_iop_sw_cpu_r_intr0___mpu_8___width 1
413#define reg_iop_sw_cpu_r_intr0___mpu_8___bit 8
414#define reg_iop_sw_cpu_r_intr0___mpu_9___lsb 9
415#define reg_iop_sw_cpu_r_intr0___mpu_9___width 1
416#define reg_iop_sw_cpu_r_intr0___mpu_9___bit 9
417#define reg_iop_sw_cpu_r_intr0___mpu_10___lsb 10
418#define reg_iop_sw_cpu_r_intr0___mpu_10___width 1
419#define reg_iop_sw_cpu_r_intr0___mpu_10___bit 10
420#define reg_iop_sw_cpu_r_intr0___mpu_11___lsb 11
421#define reg_iop_sw_cpu_r_intr0___mpu_11___width 1
422#define reg_iop_sw_cpu_r_intr0___mpu_11___bit 11
423#define reg_iop_sw_cpu_r_intr0___mpu_12___lsb 12
424#define reg_iop_sw_cpu_r_intr0___mpu_12___width 1
425#define reg_iop_sw_cpu_r_intr0___mpu_12___bit 12
426#define reg_iop_sw_cpu_r_intr0___mpu_13___lsb 13
427#define reg_iop_sw_cpu_r_intr0___mpu_13___width 1
428#define reg_iop_sw_cpu_r_intr0___mpu_13___bit 13
429#define reg_iop_sw_cpu_r_intr0___mpu_14___lsb 14
430#define reg_iop_sw_cpu_r_intr0___mpu_14___width 1
431#define reg_iop_sw_cpu_r_intr0___mpu_14___bit 14
432#define reg_iop_sw_cpu_r_intr0___mpu_15___lsb 15
433#define reg_iop_sw_cpu_r_intr0___mpu_15___width 1
434#define reg_iop_sw_cpu_r_intr0___mpu_15___bit 15
435#define reg_iop_sw_cpu_r_intr0___spu_0___lsb 16
436#define reg_iop_sw_cpu_r_intr0___spu_0___width 1
437#define reg_iop_sw_cpu_r_intr0___spu_0___bit 16
438#define reg_iop_sw_cpu_r_intr0___spu_1___lsb 17
439#define reg_iop_sw_cpu_r_intr0___spu_1___width 1
440#define reg_iop_sw_cpu_r_intr0___spu_1___bit 17
441#define reg_iop_sw_cpu_r_intr0___spu_2___lsb 18
442#define reg_iop_sw_cpu_r_intr0___spu_2___width 1
443#define reg_iop_sw_cpu_r_intr0___spu_2___bit 18
444#define reg_iop_sw_cpu_r_intr0___spu_3___lsb 19
445#define reg_iop_sw_cpu_r_intr0___spu_3___width 1
446#define reg_iop_sw_cpu_r_intr0___spu_3___bit 19
447#define reg_iop_sw_cpu_r_intr0___spu_4___lsb 20
448#define reg_iop_sw_cpu_r_intr0___spu_4___width 1
449#define reg_iop_sw_cpu_r_intr0___spu_4___bit 20
450#define reg_iop_sw_cpu_r_intr0___spu_5___lsb 21
451#define reg_iop_sw_cpu_r_intr0___spu_5___width 1
452#define reg_iop_sw_cpu_r_intr0___spu_5___bit 21
453#define reg_iop_sw_cpu_r_intr0___spu_6___lsb 22
454#define reg_iop_sw_cpu_r_intr0___spu_6___width 1
455#define reg_iop_sw_cpu_r_intr0___spu_6___bit 22
456#define reg_iop_sw_cpu_r_intr0___spu_7___lsb 23
457#define reg_iop_sw_cpu_r_intr0___spu_7___width 1
458#define reg_iop_sw_cpu_r_intr0___spu_7___bit 23
459#define reg_iop_sw_cpu_r_intr0___spu_8___lsb 24
460#define reg_iop_sw_cpu_r_intr0___spu_8___width 1
461#define reg_iop_sw_cpu_r_intr0___spu_8___bit 24
462#define reg_iop_sw_cpu_r_intr0___spu_9___lsb 25
463#define reg_iop_sw_cpu_r_intr0___spu_9___width 1
464#define reg_iop_sw_cpu_r_intr0___spu_9___bit 25
465#define reg_iop_sw_cpu_r_intr0___spu_10___lsb 26
466#define reg_iop_sw_cpu_r_intr0___spu_10___width 1
467#define reg_iop_sw_cpu_r_intr0___spu_10___bit 26
468#define reg_iop_sw_cpu_r_intr0___spu_11___lsb 27
469#define reg_iop_sw_cpu_r_intr0___spu_11___width 1
470#define reg_iop_sw_cpu_r_intr0___spu_11___bit 27
471#define reg_iop_sw_cpu_r_intr0___spu_12___lsb 28
472#define reg_iop_sw_cpu_r_intr0___spu_12___width 1
473#define reg_iop_sw_cpu_r_intr0___spu_12___bit 28
474#define reg_iop_sw_cpu_r_intr0___spu_13___lsb 29
475#define reg_iop_sw_cpu_r_intr0___spu_13___width 1
476#define reg_iop_sw_cpu_r_intr0___spu_13___bit 29
477#define reg_iop_sw_cpu_r_intr0___spu_14___lsb 30
478#define reg_iop_sw_cpu_r_intr0___spu_14___width 1
479#define reg_iop_sw_cpu_r_intr0___spu_14___bit 30
480#define reg_iop_sw_cpu_r_intr0___spu_15___lsb 31
481#define reg_iop_sw_cpu_r_intr0___spu_15___width 1
482#define reg_iop_sw_cpu_r_intr0___spu_15___bit 31
483#define reg_iop_sw_cpu_r_intr0_offset 84
484
485/* Register r_masked_intr0, scope iop_sw_cpu, type r */
486#define reg_iop_sw_cpu_r_masked_intr0___mpu_0___lsb 0
487#define reg_iop_sw_cpu_r_masked_intr0___mpu_0___width 1
488#define reg_iop_sw_cpu_r_masked_intr0___mpu_0___bit 0
489#define reg_iop_sw_cpu_r_masked_intr0___mpu_1___lsb 1
490#define reg_iop_sw_cpu_r_masked_intr0___mpu_1___width 1
491#define reg_iop_sw_cpu_r_masked_intr0___mpu_1___bit 1
492#define reg_iop_sw_cpu_r_masked_intr0___mpu_2___lsb 2
493#define reg_iop_sw_cpu_r_masked_intr0___mpu_2___width 1
494#define reg_iop_sw_cpu_r_masked_intr0___mpu_2___bit 2
495#define reg_iop_sw_cpu_r_masked_intr0___mpu_3___lsb 3
496#define reg_iop_sw_cpu_r_masked_intr0___mpu_3___width 1
497#define reg_iop_sw_cpu_r_masked_intr0___mpu_3___bit 3
498#define reg_iop_sw_cpu_r_masked_intr0___mpu_4___lsb 4
499#define reg_iop_sw_cpu_r_masked_intr0___mpu_4___width 1
500#define reg_iop_sw_cpu_r_masked_intr0___mpu_4___bit 4
501#define reg_iop_sw_cpu_r_masked_intr0___mpu_5___lsb 5
502#define reg_iop_sw_cpu_r_masked_intr0___mpu_5___width 1
503#define reg_iop_sw_cpu_r_masked_intr0___mpu_5___bit 5
504#define reg_iop_sw_cpu_r_masked_intr0___mpu_6___lsb 6
505#define reg_iop_sw_cpu_r_masked_intr0___mpu_6___width 1
506#define reg_iop_sw_cpu_r_masked_intr0___mpu_6___bit 6
507#define reg_iop_sw_cpu_r_masked_intr0___mpu_7___lsb 7
508#define reg_iop_sw_cpu_r_masked_intr0___mpu_7___width 1
509#define reg_iop_sw_cpu_r_masked_intr0___mpu_7___bit 7
510#define reg_iop_sw_cpu_r_masked_intr0___mpu_8___lsb 8
511#define reg_iop_sw_cpu_r_masked_intr0___mpu_8___width 1
512#define reg_iop_sw_cpu_r_masked_intr0___mpu_8___bit 8
513#define reg_iop_sw_cpu_r_masked_intr0___mpu_9___lsb 9
514#define reg_iop_sw_cpu_r_masked_intr0___mpu_9___width 1
515#define reg_iop_sw_cpu_r_masked_intr0___mpu_9___bit 9
516#define reg_iop_sw_cpu_r_masked_intr0___mpu_10___lsb 10
517#define reg_iop_sw_cpu_r_masked_intr0___mpu_10___width 1
518#define reg_iop_sw_cpu_r_masked_intr0___mpu_10___bit 10
519#define reg_iop_sw_cpu_r_masked_intr0___mpu_11___lsb 11
520#define reg_iop_sw_cpu_r_masked_intr0___mpu_11___width 1
521#define reg_iop_sw_cpu_r_masked_intr0___mpu_11___bit 11
522#define reg_iop_sw_cpu_r_masked_intr0___mpu_12___lsb 12
523#define reg_iop_sw_cpu_r_masked_intr0___mpu_12___width 1
524#define reg_iop_sw_cpu_r_masked_intr0___mpu_12___bit 12
525#define reg_iop_sw_cpu_r_masked_intr0___mpu_13___lsb 13
526#define reg_iop_sw_cpu_r_masked_intr0___mpu_13___width 1
527#define reg_iop_sw_cpu_r_masked_intr0___mpu_13___bit 13
528#define reg_iop_sw_cpu_r_masked_intr0___mpu_14___lsb 14
529#define reg_iop_sw_cpu_r_masked_intr0___mpu_14___width 1
530#define reg_iop_sw_cpu_r_masked_intr0___mpu_14___bit 14
531#define reg_iop_sw_cpu_r_masked_intr0___mpu_15___lsb 15
532#define reg_iop_sw_cpu_r_masked_intr0___mpu_15___width 1
533#define reg_iop_sw_cpu_r_masked_intr0___mpu_15___bit 15
534#define reg_iop_sw_cpu_r_masked_intr0___spu_0___lsb 16
535#define reg_iop_sw_cpu_r_masked_intr0___spu_0___width 1
536#define reg_iop_sw_cpu_r_masked_intr0___spu_0___bit 16
537#define reg_iop_sw_cpu_r_masked_intr0___spu_1___lsb 17
538#define reg_iop_sw_cpu_r_masked_intr0___spu_1___width 1
539#define reg_iop_sw_cpu_r_masked_intr0___spu_1___bit 17
540#define reg_iop_sw_cpu_r_masked_intr0___spu_2___lsb 18
541#define reg_iop_sw_cpu_r_masked_intr0___spu_2___width 1
542#define reg_iop_sw_cpu_r_masked_intr0___spu_2___bit 18
543#define reg_iop_sw_cpu_r_masked_intr0___spu_3___lsb 19
544#define reg_iop_sw_cpu_r_masked_intr0___spu_3___width 1
545#define reg_iop_sw_cpu_r_masked_intr0___spu_3___bit 19
546#define reg_iop_sw_cpu_r_masked_intr0___spu_4___lsb 20
547#define reg_iop_sw_cpu_r_masked_intr0___spu_4___width 1
548#define reg_iop_sw_cpu_r_masked_intr0___spu_4___bit 20
549#define reg_iop_sw_cpu_r_masked_intr0___spu_5___lsb 21
550#define reg_iop_sw_cpu_r_masked_intr0___spu_5___width 1
551#define reg_iop_sw_cpu_r_masked_intr0___spu_5___bit 21
552#define reg_iop_sw_cpu_r_masked_intr0___spu_6___lsb 22
553#define reg_iop_sw_cpu_r_masked_intr0___spu_6___width 1
554#define reg_iop_sw_cpu_r_masked_intr0___spu_6___bit 22
555#define reg_iop_sw_cpu_r_masked_intr0___spu_7___lsb 23
556#define reg_iop_sw_cpu_r_masked_intr0___spu_7___width 1
557#define reg_iop_sw_cpu_r_masked_intr0___spu_7___bit 23
558#define reg_iop_sw_cpu_r_masked_intr0___spu_8___lsb 24
559#define reg_iop_sw_cpu_r_masked_intr0___spu_8___width 1
560#define reg_iop_sw_cpu_r_masked_intr0___spu_8___bit 24
561#define reg_iop_sw_cpu_r_masked_intr0___spu_9___lsb 25
562#define reg_iop_sw_cpu_r_masked_intr0___spu_9___width 1
563#define reg_iop_sw_cpu_r_masked_intr0___spu_9___bit 25
564#define reg_iop_sw_cpu_r_masked_intr0___spu_10___lsb 26
565#define reg_iop_sw_cpu_r_masked_intr0___spu_10___width 1
566#define reg_iop_sw_cpu_r_masked_intr0___spu_10___bit 26
567#define reg_iop_sw_cpu_r_masked_intr0___spu_11___lsb 27
568#define reg_iop_sw_cpu_r_masked_intr0___spu_11___width 1
569#define reg_iop_sw_cpu_r_masked_intr0___spu_11___bit 27
570#define reg_iop_sw_cpu_r_masked_intr0___spu_12___lsb 28
571#define reg_iop_sw_cpu_r_masked_intr0___spu_12___width 1
572#define reg_iop_sw_cpu_r_masked_intr0___spu_12___bit 28
573#define reg_iop_sw_cpu_r_masked_intr0___spu_13___lsb 29
574#define reg_iop_sw_cpu_r_masked_intr0___spu_13___width 1
575#define reg_iop_sw_cpu_r_masked_intr0___spu_13___bit 29
576#define reg_iop_sw_cpu_r_masked_intr0___spu_14___lsb 30
577#define reg_iop_sw_cpu_r_masked_intr0___spu_14___width 1
578#define reg_iop_sw_cpu_r_masked_intr0___spu_14___bit 30
579#define reg_iop_sw_cpu_r_masked_intr0___spu_15___lsb 31
580#define reg_iop_sw_cpu_r_masked_intr0___spu_15___width 1
581#define reg_iop_sw_cpu_r_masked_intr0___spu_15___bit 31
582#define reg_iop_sw_cpu_r_masked_intr0_offset 88
583
584/* Register rw_intr1_mask, scope iop_sw_cpu, type rw */
585#define reg_iop_sw_cpu_rw_intr1_mask___mpu_16___lsb 0
586#define reg_iop_sw_cpu_rw_intr1_mask___mpu_16___width 1
587#define reg_iop_sw_cpu_rw_intr1_mask___mpu_16___bit 0
588#define reg_iop_sw_cpu_rw_intr1_mask___mpu_17___lsb 1
589#define reg_iop_sw_cpu_rw_intr1_mask___mpu_17___width 1
590#define reg_iop_sw_cpu_rw_intr1_mask___mpu_17___bit 1
591#define reg_iop_sw_cpu_rw_intr1_mask___mpu_18___lsb 2
592#define reg_iop_sw_cpu_rw_intr1_mask___mpu_18___width 1
593#define reg_iop_sw_cpu_rw_intr1_mask___mpu_18___bit 2
594#define reg_iop_sw_cpu_rw_intr1_mask___mpu_19___lsb 3
595#define reg_iop_sw_cpu_rw_intr1_mask___mpu_19___width 1
596#define reg_iop_sw_cpu_rw_intr1_mask___mpu_19___bit 3
597#define reg_iop_sw_cpu_rw_intr1_mask___mpu_20___lsb 4
598#define reg_iop_sw_cpu_rw_intr1_mask___mpu_20___width 1
599#define reg_iop_sw_cpu_rw_intr1_mask___mpu_20___bit 4
600#define reg_iop_sw_cpu_rw_intr1_mask___mpu_21___lsb 5
601#define reg_iop_sw_cpu_rw_intr1_mask___mpu_21___width 1
602#define reg_iop_sw_cpu_rw_intr1_mask___mpu_21___bit 5
603#define reg_iop_sw_cpu_rw_intr1_mask___mpu_22___lsb 6
604#define reg_iop_sw_cpu_rw_intr1_mask___mpu_22___width 1
605#define reg_iop_sw_cpu_rw_intr1_mask___mpu_22___bit 6
606#define reg_iop_sw_cpu_rw_intr1_mask___mpu_23___lsb 7
607#define reg_iop_sw_cpu_rw_intr1_mask___mpu_23___width 1
608#define reg_iop_sw_cpu_rw_intr1_mask___mpu_23___bit 7
609#define reg_iop_sw_cpu_rw_intr1_mask___mpu_24___lsb 8
610#define reg_iop_sw_cpu_rw_intr1_mask___mpu_24___width 1
611#define reg_iop_sw_cpu_rw_intr1_mask___mpu_24___bit 8
612#define reg_iop_sw_cpu_rw_intr1_mask___mpu_25___lsb 9
613#define reg_iop_sw_cpu_rw_intr1_mask___mpu_25___width 1
614#define reg_iop_sw_cpu_rw_intr1_mask___mpu_25___bit 9
615#define reg_iop_sw_cpu_rw_intr1_mask___mpu_26___lsb 10
616#define reg_iop_sw_cpu_rw_intr1_mask___mpu_26___width 1
617#define reg_iop_sw_cpu_rw_intr1_mask___mpu_26___bit 10
618#define reg_iop_sw_cpu_rw_intr1_mask___mpu_27___lsb 11
619#define reg_iop_sw_cpu_rw_intr1_mask___mpu_27___width 1
620#define reg_iop_sw_cpu_rw_intr1_mask___mpu_27___bit 11
621#define reg_iop_sw_cpu_rw_intr1_mask___mpu_28___lsb 12
622#define reg_iop_sw_cpu_rw_intr1_mask___mpu_28___width 1
623#define reg_iop_sw_cpu_rw_intr1_mask___mpu_28___bit 12
624#define reg_iop_sw_cpu_rw_intr1_mask___mpu_29___lsb 13
625#define reg_iop_sw_cpu_rw_intr1_mask___mpu_29___width 1
626#define reg_iop_sw_cpu_rw_intr1_mask___mpu_29___bit 13
627#define reg_iop_sw_cpu_rw_intr1_mask___mpu_30___lsb 14
628#define reg_iop_sw_cpu_rw_intr1_mask___mpu_30___width 1
629#define reg_iop_sw_cpu_rw_intr1_mask___mpu_30___bit 14
630#define reg_iop_sw_cpu_rw_intr1_mask___mpu_31___lsb 15
631#define reg_iop_sw_cpu_rw_intr1_mask___mpu_31___width 1
632#define reg_iop_sw_cpu_rw_intr1_mask___mpu_31___bit 15
633#define reg_iop_sw_cpu_rw_intr1_mask___dmc_in___lsb 16
634#define reg_iop_sw_cpu_rw_intr1_mask___dmc_in___width 1
635#define reg_iop_sw_cpu_rw_intr1_mask___dmc_in___bit 16
636#define reg_iop_sw_cpu_rw_intr1_mask___dmc_out___lsb 17
637#define reg_iop_sw_cpu_rw_intr1_mask___dmc_out___width 1
638#define reg_iop_sw_cpu_rw_intr1_mask___dmc_out___bit 17
639#define reg_iop_sw_cpu_rw_intr1_mask___fifo_in___lsb 18
640#define reg_iop_sw_cpu_rw_intr1_mask___fifo_in___width 1
641#define reg_iop_sw_cpu_rw_intr1_mask___fifo_in___bit 18
642#define reg_iop_sw_cpu_rw_intr1_mask___fifo_out___lsb 19
643#define reg_iop_sw_cpu_rw_intr1_mask___fifo_out___width 1
644#define reg_iop_sw_cpu_rw_intr1_mask___fifo_out___bit 19
645#define reg_iop_sw_cpu_rw_intr1_mask___fifo_in_extra___lsb 20
646#define reg_iop_sw_cpu_rw_intr1_mask___fifo_in_extra___width 1
647#define reg_iop_sw_cpu_rw_intr1_mask___fifo_in_extra___bit 20
648#define reg_iop_sw_cpu_rw_intr1_mask___fifo_out_extra___lsb 21
649#define reg_iop_sw_cpu_rw_intr1_mask___fifo_out_extra___width 1
650#define reg_iop_sw_cpu_rw_intr1_mask___fifo_out_extra___bit 21
651#define reg_iop_sw_cpu_rw_intr1_mask___trigger_grp0___lsb 22
652#define reg_iop_sw_cpu_rw_intr1_mask___trigger_grp0___width 1
653#define reg_iop_sw_cpu_rw_intr1_mask___trigger_grp0___bit 22
654#define reg_iop_sw_cpu_rw_intr1_mask___trigger_grp1___lsb 23
655#define reg_iop_sw_cpu_rw_intr1_mask___trigger_grp1___width 1
656#define reg_iop_sw_cpu_rw_intr1_mask___trigger_grp1___bit 23
657#define reg_iop_sw_cpu_rw_intr1_mask___trigger_grp2___lsb 24
658#define reg_iop_sw_cpu_rw_intr1_mask___trigger_grp2___width 1
659#define reg_iop_sw_cpu_rw_intr1_mask___trigger_grp2___bit 24
660#define reg_iop_sw_cpu_rw_intr1_mask___trigger_grp3___lsb 25
661#define reg_iop_sw_cpu_rw_intr1_mask___trigger_grp3___width 1
662#define reg_iop_sw_cpu_rw_intr1_mask___trigger_grp3___bit 25
663#define reg_iop_sw_cpu_rw_intr1_mask___trigger_grp4___lsb 26
664#define reg_iop_sw_cpu_rw_intr1_mask___trigger_grp4___width 1
665#define reg_iop_sw_cpu_rw_intr1_mask___trigger_grp4___bit 26
666#define reg_iop_sw_cpu_rw_intr1_mask___trigger_grp5___lsb 27
667#define reg_iop_sw_cpu_rw_intr1_mask___trigger_grp5___width 1
668#define reg_iop_sw_cpu_rw_intr1_mask___trigger_grp5___bit 27
669#define reg_iop_sw_cpu_rw_intr1_mask___trigger_grp6___lsb 28
670#define reg_iop_sw_cpu_rw_intr1_mask___trigger_grp6___width 1
671#define reg_iop_sw_cpu_rw_intr1_mask___trigger_grp6___bit 28
672#define reg_iop_sw_cpu_rw_intr1_mask___trigger_grp7___lsb 29
673#define reg_iop_sw_cpu_rw_intr1_mask___trigger_grp7___width 1
674#define reg_iop_sw_cpu_rw_intr1_mask___trigger_grp7___bit 29
675#define reg_iop_sw_cpu_rw_intr1_mask___timer_grp0___lsb 30
676#define reg_iop_sw_cpu_rw_intr1_mask___timer_grp0___width 1
677#define reg_iop_sw_cpu_rw_intr1_mask___timer_grp0___bit 30
678#define reg_iop_sw_cpu_rw_intr1_mask___timer_grp1___lsb 31
679#define reg_iop_sw_cpu_rw_intr1_mask___timer_grp1___width 1
680#define reg_iop_sw_cpu_rw_intr1_mask___timer_grp1___bit 31
681#define reg_iop_sw_cpu_rw_intr1_mask_offset 92
682
683/* Register rw_ack_intr1, scope iop_sw_cpu, type rw */
684#define reg_iop_sw_cpu_rw_ack_intr1___mpu_16___lsb 0
685#define reg_iop_sw_cpu_rw_ack_intr1___mpu_16___width 1
686#define reg_iop_sw_cpu_rw_ack_intr1___mpu_16___bit 0
687#define reg_iop_sw_cpu_rw_ack_intr1___mpu_17___lsb 1
688#define reg_iop_sw_cpu_rw_ack_intr1___mpu_17___width 1
689#define reg_iop_sw_cpu_rw_ack_intr1___mpu_17___bit 1
690#define reg_iop_sw_cpu_rw_ack_intr1___mpu_18___lsb 2
691#define reg_iop_sw_cpu_rw_ack_intr1___mpu_18___width 1
692#define reg_iop_sw_cpu_rw_ack_intr1___mpu_18___bit 2
693#define reg_iop_sw_cpu_rw_ack_intr1___mpu_19___lsb 3
694#define reg_iop_sw_cpu_rw_ack_intr1___mpu_19___width 1
695#define reg_iop_sw_cpu_rw_ack_intr1___mpu_19___bit 3
696#define reg_iop_sw_cpu_rw_ack_intr1___mpu_20___lsb 4
697#define reg_iop_sw_cpu_rw_ack_intr1___mpu_20___width 1
698#define reg_iop_sw_cpu_rw_ack_intr1___mpu_20___bit 4
699#define reg_iop_sw_cpu_rw_ack_intr1___mpu_21___lsb 5
700#define reg_iop_sw_cpu_rw_ack_intr1___mpu_21___width 1
701#define reg_iop_sw_cpu_rw_ack_intr1___mpu_21___bit 5
702#define reg_iop_sw_cpu_rw_ack_intr1___mpu_22___lsb 6
703#define reg_iop_sw_cpu_rw_ack_intr1___mpu_22___width 1
704#define reg_iop_sw_cpu_rw_ack_intr1___mpu_22___bit 6
705#define reg_iop_sw_cpu_rw_ack_intr1___mpu_23___lsb 7
706#define reg_iop_sw_cpu_rw_ack_intr1___mpu_23___width 1
707#define reg_iop_sw_cpu_rw_ack_intr1___mpu_23___bit 7
708#define reg_iop_sw_cpu_rw_ack_intr1___mpu_24___lsb 8
709#define reg_iop_sw_cpu_rw_ack_intr1___mpu_24___width 1
710#define reg_iop_sw_cpu_rw_ack_intr1___mpu_24___bit 8
711#define reg_iop_sw_cpu_rw_ack_intr1___mpu_25___lsb 9
712#define reg_iop_sw_cpu_rw_ack_intr1___mpu_25___width 1
713#define reg_iop_sw_cpu_rw_ack_intr1___mpu_25___bit 9
714#define reg_iop_sw_cpu_rw_ack_intr1___mpu_26___lsb 10
715#define reg_iop_sw_cpu_rw_ack_intr1___mpu_26___width 1
716#define reg_iop_sw_cpu_rw_ack_intr1___mpu_26___bit 10
717#define reg_iop_sw_cpu_rw_ack_intr1___mpu_27___lsb 11
718#define reg_iop_sw_cpu_rw_ack_intr1___mpu_27___width 1
719#define reg_iop_sw_cpu_rw_ack_intr1___mpu_27___bit 11
720#define reg_iop_sw_cpu_rw_ack_intr1___mpu_28___lsb 12
721#define reg_iop_sw_cpu_rw_ack_intr1___mpu_28___width 1
722#define reg_iop_sw_cpu_rw_ack_intr1___mpu_28___bit 12
723#define reg_iop_sw_cpu_rw_ack_intr1___mpu_29___lsb 13
724#define reg_iop_sw_cpu_rw_ack_intr1___mpu_29___width 1
725#define reg_iop_sw_cpu_rw_ack_intr1___mpu_29___bit 13
726#define reg_iop_sw_cpu_rw_ack_intr1___mpu_30___lsb 14
727#define reg_iop_sw_cpu_rw_ack_intr1___mpu_30___width 1
728#define reg_iop_sw_cpu_rw_ack_intr1___mpu_30___bit 14
729#define reg_iop_sw_cpu_rw_ack_intr1___mpu_31___lsb 15
730#define reg_iop_sw_cpu_rw_ack_intr1___mpu_31___width 1
731#define reg_iop_sw_cpu_rw_ack_intr1___mpu_31___bit 15
732#define reg_iop_sw_cpu_rw_ack_intr1_offset 96
733
734/* Register r_intr1, scope iop_sw_cpu, type r */
735#define reg_iop_sw_cpu_r_intr1___mpu_16___lsb 0
736#define reg_iop_sw_cpu_r_intr1___mpu_16___width 1
737#define reg_iop_sw_cpu_r_intr1___mpu_16___bit 0
738#define reg_iop_sw_cpu_r_intr1___mpu_17___lsb 1
739#define reg_iop_sw_cpu_r_intr1___mpu_17___width 1
740#define reg_iop_sw_cpu_r_intr1___mpu_17___bit 1
741#define reg_iop_sw_cpu_r_intr1___mpu_18___lsb 2
742#define reg_iop_sw_cpu_r_intr1___mpu_18___width 1
743#define reg_iop_sw_cpu_r_intr1___mpu_18___bit 2
744#define reg_iop_sw_cpu_r_intr1___mpu_19___lsb 3
745#define reg_iop_sw_cpu_r_intr1___mpu_19___width 1
746#define reg_iop_sw_cpu_r_intr1___mpu_19___bit 3
747#define reg_iop_sw_cpu_r_intr1___mpu_20___lsb 4
748#define reg_iop_sw_cpu_r_intr1___mpu_20___width 1
749#define reg_iop_sw_cpu_r_intr1___mpu_20___bit 4
750#define reg_iop_sw_cpu_r_intr1___mpu_21___lsb 5
751#define reg_iop_sw_cpu_r_intr1___mpu_21___width 1
752#define reg_iop_sw_cpu_r_intr1___mpu_21___bit 5
753#define reg_iop_sw_cpu_r_intr1___mpu_22___lsb 6
754#define reg_iop_sw_cpu_r_intr1___mpu_22___width 1
755#define reg_iop_sw_cpu_r_intr1___mpu_22___bit 6
756#define reg_iop_sw_cpu_r_intr1___mpu_23___lsb 7
757#define reg_iop_sw_cpu_r_intr1___mpu_23___width 1
758#define reg_iop_sw_cpu_r_intr1___mpu_23___bit 7
759#define reg_iop_sw_cpu_r_intr1___mpu_24___lsb 8
760#define reg_iop_sw_cpu_r_intr1___mpu_24___width 1
761#define reg_iop_sw_cpu_r_intr1___mpu_24___bit 8
762#define reg_iop_sw_cpu_r_intr1___mpu_25___lsb 9
763#define reg_iop_sw_cpu_r_intr1___mpu_25___width 1
764#define reg_iop_sw_cpu_r_intr1___mpu_25___bit 9
765#define reg_iop_sw_cpu_r_intr1___mpu_26___lsb 10
766#define reg_iop_sw_cpu_r_intr1___mpu_26___width 1
767#define reg_iop_sw_cpu_r_intr1___mpu_26___bit 10
768#define reg_iop_sw_cpu_r_intr1___mpu_27___lsb 11
769#define reg_iop_sw_cpu_r_intr1___mpu_27___width 1
770#define reg_iop_sw_cpu_r_intr1___mpu_27___bit 11
771#define reg_iop_sw_cpu_r_intr1___mpu_28___lsb 12
772#define reg_iop_sw_cpu_r_intr1___mpu_28___width 1
773#define reg_iop_sw_cpu_r_intr1___mpu_28___bit 12
774#define reg_iop_sw_cpu_r_intr1___mpu_29___lsb 13
775#define reg_iop_sw_cpu_r_intr1___mpu_29___width 1
776#define reg_iop_sw_cpu_r_intr1___mpu_29___bit 13
777#define reg_iop_sw_cpu_r_intr1___mpu_30___lsb 14
778#define reg_iop_sw_cpu_r_intr1___mpu_30___width 1
779#define reg_iop_sw_cpu_r_intr1___mpu_30___bit 14
780#define reg_iop_sw_cpu_r_intr1___mpu_31___lsb 15
781#define reg_iop_sw_cpu_r_intr1___mpu_31___width 1
782#define reg_iop_sw_cpu_r_intr1___mpu_31___bit 15
783#define reg_iop_sw_cpu_r_intr1___dmc_in___lsb 16
784#define reg_iop_sw_cpu_r_intr1___dmc_in___width 1
785#define reg_iop_sw_cpu_r_intr1___dmc_in___bit 16
786#define reg_iop_sw_cpu_r_intr1___dmc_out___lsb 17
787#define reg_iop_sw_cpu_r_intr1___dmc_out___width 1
788#define reg_iop_sw_cpu_r_intr1___dmc_out___bit 17
789#define reg_iop_sw_cpu_r_intr1___fifo_in___lsb 18
790#define reg_iop_sw_cpu_r_intr1___fifo_in___width 1
791#define reg_iop_sw_cpu_r_intr1___fifo_in___bit 18
792#define reg_iop_sw_cpu_r_intr1___fifo_out___lsb 19
793#define reg_iop_sw_cpu_r_intr1___fifo_out___width 1
794#define reg_iop_sw_cpu_r_intr1___fifo_out___bit 19
795#define reg_iop_sw_cpu_r_intr1___fifo_in_extra___lsb 20
796#define reg_iop_sw_cpu_r_intr1___fifo_in_extra___width 1
797#define reg_iop_sw_cpu_r_intr1___fifo_in_extra___bit 20
798#define reg_iop_sw_cpu_r_intr1___fifo_out_extra___lsb 21
799#define reg_iop_sw_cpu_r_intr1___fifo_out_extra___width 1
800#define reg_iop_sw_cpu_r_intr1___fifo_out_extra___bit 21
801#define reg_iop_sw_cpu_r_intr1___trigger_grp0___lsb 22
802#define reg_iop_sw_cpu_r_intr1___trigger_grp0___width 1
803#define reg_iop_sw_cpu_r_intr1___trigger_grp0___bit 22
804#define reg_iop_sw_cpu_r_intr1___trigger_grp1___lsb 23
805#define reg_iop_sw_cpu_r_intr1___trigger_grp1___width 1
806#define reg_iop_sw_cpu_r_intr1___trigger_grp1___bit 23
807#define reg_iop_sw_cpu_r_intr1___trigger_grp2___lsb 24
808#define reg_iop_sw_cpu_r_intr1___trigger_grp2___width 1
809#define reg_iop_sw_cpu_r_intr1___trigger_grp2___bit 24
810#define reg_iop_sw_cpu_r_intr1___trigger_grp3___lsb 25
811#define reg_iop_sw_cpu_r_intr1___trigger_grp3___width 1
812#define reg_iop_sw_cpu_r_intr1___trigger_grp3___bit 25
813#define reg_iop_sw_cpu_r_intr1___trigger_grp4___lsb 26
814#define reg_iop_sw_cpu_r_intr1___trigger_grp4___width 1
815#define reg_iop_sw_cpu_r_intr1___trigger_grp4___bit 26
816#define reg_iop_sw_cpu_r_intr1___trigger_grp5___lsb 27
817#define reg_iop_sw_cpu_r_intr1___trigger_grp5___width 1
818#define reg_iop_sw_cpu_r_intr1___trigger_grp5___bit 27
819#define reg_iop_sw_cpu_r_intr1___trigger_grp6___lsb 28
820#define reg_iop_sw_cpu_r_intr1___trigger_grp6___width 1
821#define reg_iop_sw_cpu_r_intr1___trigger_grp6___bit 28
822#define reg_iop_sw_cpu_r_intr1___trigger_grp7___lsb 29
823#define reg_iop_sw_cpu_r_intr1___trigger_grp7___width 1
824#define reg_iop_sw_cpu_r_intr1___trigger_grp7___bit 29
825#define reg_iop_sw_cpu_r_intr1___timer_grp0___lsb 30
826#define reg_iop_sw_cpu_r_intr1___timer_grp0___width 1
827#define reg_iop_sw_cpu_r_intr1___timer_grp0___bit 30
828#define reg_iop_sw_cpu_r_intr1___timer_grp1___lsb 31
829#define reg_iop_sw_cpu_r_intr1___timer_grp1___width 1
830#define reg_iop_sw_cpu_r_intr1___timer_grp1___bit 31
831#define reg_iop_sw_cpu_r_intr1_offset 100
832
833/* Register r_masked_intr1, scope iop_sw_cpu, type r */
834#define reg_iop_sw_cpu_r_masked_intr1___mpu_16___lsb 0
835#define reg_iop_sw_cpu_r_masked_intr1___mpu_16___width 1
836#define reg_iop_sw_cpu_r_masked_intr1___mpu_16___bit 0
837#define reg_iop_sw_cpu_r_masked_intr1___mpu_17___lsb 1
838#define reg_iop_sw_cpu_r_masked_intr1___mpu_17___width 1
839#define reg_iop_sw_cpu_r_masked_intr1___mpu_17___bit 1
840#define reg_iop_sw_cpu_r_masked_intr1___mpu_18___lsb 2
841#define reg_iop_sw_cpu_r_masked_intr1___mpu_18___width 1
842#define reg_iop_sw_cpu_r_masked_intr1___mpu_18___bit 2
843#define reg_iop_sw_cpu_r_masked_intr1___mpu_19___lsb 3
844#define reg_iop_sw_cpu_r_masked_intr1___mpu_19___width 1
845#define reg_iop_sw_cpu_r_masked_intr1___mpu_19___bit 3
846#define reg_iop_sw_cpu_r_masked_intr1___mpu_20___lsb 4
847#define reg_iop_sw_cpu_r_masked_intr1___mpu_20___width 1
848#define reg_iop_sw_cpu_r_masked_intr1___mpu_20___bit 4
849#define reg_iop_sw_cpu_r_masked_intr1___mpu_21___lsb 5
850#define reg_iop_sw_cpu_r_masked_intr1___mpu_21___width 1
851#define reg_iop_sw_cpu_r_masked_intr1___mpu_21___bit 5
852#define reg_iop_sw_cpu_r_masked_intr1___mpu_22___lsb 6
853#define reg_iop_sw_cpu_r_masked_intr1___mpu_22___width 1
854#define reg_iop_sw_cpu_r_masked_intr1___mpu_22___bit 6
855#define reg_iop_sw_cpu_r_masked_intr1___mpu_23___lsb 7
856#define reg_iop_sw_cpu_r_masked_intr1___mpu_23___width 1
857#define reg_iop_sw_cpu_r_masked_intr1___mpu_23___bit 7
858#define reg_iop_sw_cpu_r_masked_intr1___mpu_24___lsb 8
859#define reg_iop_sw_cpu_r_masked_intr1___mpu_24___width 1
860#define reg_iop_sw_cpu_r_masked_intr1___mpu_24___bit 8
861#define reg_iop_sw_cpu_r_masked_intr1___mpu_25___lsb 9
862#define reg_iop_sw_cpu_r_masked_intr1___mpu_25___width 1
863#define reg_iop_sw_cpu_r_masked_intr1___mpu_25___bit 9
864#define reg_iop_sw_cpu_r_masked_intr1___mpu_26___lsb 10
865#define reg_iop_sw_cpu_r_masked_intr1___mpu_26___width 1
866#define reg_iop_sw_cpu_r_masked_intr1___mpu_26___bit 10
867#define reg_iop_sw_cpu_r_masked_intr1___mpu_27___lsb 11
868#define reg_iop_sw_cpu_r_masked_intr1___mpu_27___width 1
869#define reg_iop_sw_cpu_r_masked_intr1___mpu_27___bit 11
870#define reg_iop_sw_cpu_r_masked_intr1___mpu_28___lsb 12
871#define reg_iop_sw_cpu_r_masked_intr1___mpu_28___width 1
872#define reg_iop_sw_cpu_r_masked_intr1___mpu_28___bit 12
873#define reg_iop_sw_cpu_r_masked_intr1___mpu_29___lsb 13
874#define reg_iop_sw_cpu_r_masked_intr1___mpu_29___width 1
875#define reg_iop_sw_cpu_r_masked_intr1___mpu_29___bit 13
876#define reg_iop_sw_cpu_r_masked_intr1___mpu_30___lsb 14
877#define reg_iop_sw_cpu_r_masked_intr1___mpu_30___width 1
878#define reg_iop_sw_cpu_r_masked_intr1___mpu_30___bit 14
879#define reg_iop_sw_cpu_r_masked_intr1___mpu_31___lsb 15
880#define reg_iop_sw_cpu_r_masked_intr1___mpu_31___width 1
881#define reg_iop_sw_cpu_r_masked_intr1___mpu_31___bit 15
882#define reg_iop_sw_cpu_r_masked_intr1___dmc_in___lsb 16
883#define reg_iop_sw_cpu_r_masked_intr1___dmc_in___width 1
884#define reg_iop_sw_cpu_r_masked_intr1___dmc_in___bit 16
885#define reg_iop_sw_cpu_r_masked_intr1___dmc_out___lsb 17
886#define reg_iop_sw_cpu_r_masked_intr1___dmc_out___width 1
887#define reg_iop_sw_cpu_r_masked_intr1___dmc_out___bit 17
888#define reg_iop_sw_cpu_r_masked_intr1___fifo_in___lsb 18
889#define reg_iop_sw_cpu_r_masked_intr1___fifo_in___width 1
890#define reg_iop_sw_cpu_r_masked_intr1___fifo_in___bit 18
891#define reg_iop_sw_cpu_r_masked_intr1___fifo_out___lsb 19
892#define reg_iop_sw_cpu_r_masked_intr1___fifo_out___width 1
893#define reg_iop_sw_cpu_r_masked_intr1___fifo_out___bit 19
894#define reg_iop_sw_cpu_r_masked_intr1___fifo_in_extra___lsb 20
895#define reg_iop_sw_cpu_r_masked_intr1___fifo_in_extra___width 1
896#define reg_iop_sw_cpu_r_masked_intr1___fifo_in_extra___bit 20
897#define reg_iop_sw_cpu_r_masked_intr1___fifo_out_extra___lsb 21
898#define reg_iop_sw_cpu_r_masked_intr1___fifo_out_extra___width 1
899#define reg_iop_sw_cpu_r_masked_intr1___fifo_out_extra___bit 21
900#define reg_iop_sw_cpu_r_masked_intr1___trigger_grp0___lsb 22
901#define reg_iop_sw_cpu_r_masked_intr1___trigger_grp0___width 1
902#define reg_iop_sw_cpu_r_masked_intr1___trigger_grp0___bit 22
903#define reg_iop_sw_cpu_r_masked_intr1___trigger_grp1___lsb 23
904#define reg_iop_sw_cpu_r_masked_intr1___trigger_grp1___width 1
905#define reg_iop_sw_cpu_r_masked_intr1___trigger_grp1___bit 23
906#define reg_iop_sw_cpu_r_masked_intr1___trigger_grp2___lsb 24
907#define reg_iop_sw_cpu_r_masked_intr1___trigger_grp2___width 1
908#define reg_iop_sw_cpu_r_masked_intr1___trigger_grp2___bit 24
909#define reg_iop_sw_cpu_r_masked_intr1___trigger_grp3___lsb 25
910#define reg_iop_sw_cpu_r_masked_intr1___trigger_grp3___width 1
911#define reg_iop_sw_cpu_r_masked_intr1___trigger_grp3___bit 25
912#define reg_iop_sw_cpu_r_masked_intr1___trigger_grp4___lsb 26
913#define reg_iop_sw_cpu_r_masked_intr1___trigger_grp4___width 1
914#define reg_iop_sw_cpu_r_masked_intr1___trigger_grp4___bit 26
915#define reg_iop_sw_cpu_r_masked_intr1___trigger_grp5___lsb 27
916#define reg_iop_sw_cpu_r_masked_intr1___trigger_grp5___width 1
917#define reg_iop_sw_cpu_r_masked_intr1___trigger_grp5___bit 27
918#define reg_iop_sw_cpu_r_masked_intr1___trigger_grp6___lsb 28
919#define reg_iop_sw_cpu_r_masked_intr1___trigger_grp6___width 1
920#define reg_iop_sw_cpu_r_masked_intr1___trigger_grp6___bit 28
921#define reg_iop_sw_cpu_r_masked_intr1___trigger_grp7___lsb 29
922#define reg_iop_sw_cpu_r_masked_intr1___trigger_grp7___width 1
923#define reg_iop_sw_cpu_r_masked_intr1___trigger_grp7___bit 29
924#define reg_iop_sw_cpu_r_masked_intr1___timer_grp0___lsb 30
925#define reg_iop_sw_cpu_r_masked_intr1___timer_grp0___width 1
926#define reg_iop_sw_cpu_r_masked_intr1___timer_grp0___bit 30
927#define reg_iop_sw_cpu_r_masked_intr1___timer_grp1___lsb 31
928#define reg_iop_sw_cpu_r_masked_intr1___timer_grp1___width 1
929#define reg_iop_sw_cpu_r_masked_intr1___timer_grp1___bit 31
930#define reg_iop_sw_cpu_r_masked_intr1_offset 104
931
932
933/* Constants */
934#define regk_iop_sw_cpu_copy 0x00000000
935#define regk_iop_sw_cpu_no 0x00000000
936#define regk_iop_sw_cpu_rd 0x00000002
937#define regk_iop_sw_cpu_reg_copy 0x00000001
938#define regk_iop_sw_cpu_rw_bus_clr_mask_default 0x00000000
939#define regk_iop_sw_cpu_rw_bus_oe_clr_mask_default 0x00000000
940#define regk_iop_sw_cpu_rw_bus_oe_set_mask_default 0x00000000
941#define regk_iop_sw_cpu_rw_bus_set_mask_default 0x00000000
942#define regk_iop_sw_cpu_rw_gio_clr_mask_default 0x00000000
943#define regk_iop_sw_cpu_rw_gio_oe_clr_mask_default 0x00000000
944#define regk_iop_sw_cpu_rw_gio_oe_set_mask_default 0x00000000
945#define regk_iop_sw_cpu_rw_gio_set_mask_default 0x00000000
946#define regk_iop_sw_cpu_rw_intr0_mask_default 0x00000000
947#define regk_iop_sw_cpu_rw_intr1_mask_default 0x00000000
948#define regk_iop_sw_cpu_wr 0x00000003
949#define regk_iop_sw_cpu_yes 0x00000001
950#endif /* __iop_sw_cpu_defs_asm_h */
diff --git a/include/asm-cris/arch-v32/mach-a3/hwregs/iop/asm/iop_sw_mpu_defs_asm.h b/include/asm-cris/arch-v32/mach-a3/hwregs/iop/asm/iop_sw_mpu_defs_asm.h
new file mode 100644
index 000000000000..ffcc83b22d21
--- /dev/null
+++ b/include/asm-cris/arch-v32/mach-a3/hwregs/iop/asm/iop_sw_mpu_defs_asm.h
@@ -0,0 +1,1086 @@
1#ifndef __iop_sw_mpu_defs_asm_h
2#define __iop_sw_mpu_defs_asm_h
3
4/*
5 * This file is autogenerated from
6 * file: iop_sw_mpu.r
7 *
8 * by ../../../tools/rdesc/bin/rdes2c -asm -outfile iop_sw_mpu_defs_asm.h iop_sw_mpu.r
9 * Any changes here will be lost.
10 *
11 * -*- buffer-read-only: t -*-
12 */
13
14#ifndef REG_FIELD
15#define REG_FIELD( scope, reg, field, value ) \
16 REG_FIELD_X_( value, reg_##scope##_##reg##___##field##___lsb )
17#define REG_FIELD_X_( value, shift ) ((value) << shift)
18#endif
19
20#ifndef REG_STATE
21#define REG_STATE( scope, reg, field, symbolic_value ) \
22 REG_STATE_X_( regk_##scope##_##symbolic_value, reg_##scope##_##reg##___##field##___lsb )
23#define REG_STATE_X_( k, shift ) (k << shift)
24#endif
25
26#ifndef REG_MASK
27#define REG_MASK( scope, reg, field ) \
28 REG_MASK_X_( reg_##scope##_##reg##___##field##___width, reg_##scope##_##reg##___##field##___lsb )
29#define REG_MASK_X_( width, lsb ) (((1 << width)-1) << lsb)
30#endif
31
32#ifndef REG_LSB
33#define REG_LSB( scope, reg, field ) reg_##scope##_##reg##___##field##___lsb
34#endif
35
36#ifndef REG_BIT
37#define REG_BIT( scope, reg, field ) reg_##scope##_##reg##___##field##___bit
38#endif
39
40#ifndef REG_ADDR
41#define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset)
42#define REG_ADDR_X_( inst, offs ) ((inst) + offs)
43#endif
44
45#ifndef REG_ADDR_VECT
46#define REG_ADDR_VECT( scope, inst, reg, index ) \
47 REG_ADDR_VECT_X_(inst, reg_##scope##_##reg##_offset, index, \
48 STRIDE_##scope##_##reg )
49#define REG_ADDR_VECT_X_( inst, offs, index, stride ) \
50 ((inst) + offs + (index) * stride)
51#endif
52
53/* Register rw_sw_cfg_owner, scope iop_sw_mpu, type rw */
54#define reg_iop_sw_mpu_rw_sw_cfg_owner___cfg___lsb 0
55#define reg_iop_sw_mpu_rw_sw_cfg_owner___cfg___width 2
56#define reg_iop_sw_mpu_rw_sw_cfg_owner_offset 0
57
58/* Register r_spu_trace, scope iop_sw_mpu, type r */
59#define reg_iop_sw_mpu_r_spu_trace_offset 4
60
61/* Register r_spu_fsm_trace, scope iop_sw_mpu, type r */
62#define reg_iop_sw_mpu_r_spu_fsm_trace_offset 8
63
64/* Register rw_mc_ctrl, scope iop_sw_mpu, type rw */
65#define reg_iop_sw_mpu_rw_mc_ctrl___keep_owner___lsb 0
66#define reg_iop_sw_mpu_rw_mc_ctrl___keep_owner___width 1
67#define reg_iop_sw_mpu_rw_mc_ctrl___keep_owner___bit 0
68#define reg_iop_sw_mpu_rw_mc_ctrl___cmd___lsb 1
69#define reg_iop_sw_mpu_rw_mc_ctrl___cmd___width 2
70#define reg_iop_sw_mpu_rw_mc_ctrl___size___lsb 3
71#define reg_iop_sw_mpu_rw_mc_ctrl___size___width 3
72#define reg_iop_sw_mpu_rw_mc_ctrl___wr_spu_mem___lsb 6
73#define reg_iop_sw_mpu_rw_mc_ctrl___wr_spu_mem___width 1
74#define reg_iop_sw_mpu_rw_mc_ctrl___wr_spu_mem___bit 6
75#define reg_iop_sw_mpu_rw_mc_ctrl_offset 12
76
77/* Register rw_mc_data, scope iop_sw_mpu, type rw */
78#define reg_iop_sw_mpu_rw_mc_data___val___lsb 0
79#define reg_iop_sw_mpu_rw_mc_data___val___width 32
80#define reg_iop_sw_mpu_rw_mc_data_offset 16
81
82/* Register rw_mc_addr, scope iop_sw_mpu, type rw */
83#define reg_iop_sw_mpu_rw_mc_addr_offset 20
84
85/* Register rs_mc_data, scope iop_sw_mpu, type rs */
86#define reg_iop_sw_mpu_rs_mc_data_offset 24
87
88/* Register r_mc_data, scope iop_sw_mpu, type r */
89#define reg_iop_sw_mpu_r_mc_data_offset 28
90
91/* Register r_mc_stat, scope iop_sw_mpu, type r */
92#define reg_iop_sw_mpu_r_mc_stat___busy_cpu___lsb 0
93#define reg_iop_sw_mpu_r_mc_stat___busy_cpu___width 1
94#define reg_iop_sw_mpu_r_mc_stat___busy_cpu___bit 0
95#define reg_iop_sw_mpu_r_mc_stat___busy_mpu___lsb 1
96#define reg_iop_sw_mpu_r_mc_stat___busy_mpu___width 1
97#define reg_iop_sw_mpu_r_mc_stat___busy_mpu___bit 1
98#define reg_iop_sw_mpu_r_mc_stat___busy_spu___lsb 2
99#define reg_iop_sw_mpu_r_mc_stat___busy_spu___width 1
100#define reg_iop_sw_mpu_r_mc_stat___busy_spu___bit 2
101#define reg_iop_sw_mpu_r_mc_stat___owned_by_cpu___lsb 3
102#define reg_iop_sw_mpu_r_mc_stat___owned_by_cpu___width 1
103#define reg_iop_sw_mpu_r_mc_stat___owned_by_cpu___bit 3
104#define reg_iop_sw_mpu_r_mc_stat___owned_by_mpu___lsb 4
105#define reg_iop_sw_mpu_r_mc_stat___owned_by_mpu___width 1
106#define reg_iop_sw_mpu_r_mc_stat___owned_by_mpu___bit 4
107#define reg_iop_sw_mpu_r_mc_stat___owned_by_spu___lsb 5
108#define reg_iop_sw_mpu_r_mc_stat___owned_by_spu___width 1
109#define reg_iop_sw_mpu_r_mc_stat___owned_by_spu___bit 5
110#define reg_iop_sw_mpu_r_mc_stat_offset 32
111
112/* Register rw_bus_clr_mask, scope iop_sw_mpu, type rw */
113#define reg_iop_sw_mpu_rw_bus_clr_mask___byte0___lsb 0
114#define reg_iop_sw_mpu_rw_bus_clr_mask___byte0___width 8
115#define reg_iop_sw_mpu_rw_bus_clr_mask___byte1___lsb 8
116#define reg_iop_sw_mpu_rw_bus_clr_mask___byte1___width 8
117#define reg_iop_sw_mpu_rw_bus_clr_mask___byte2___lsb 16
118#define reg_iop_sw_mpu_rw_bus_clr_mask___byte2___width 8
119#define reg_iop_sw_mpu_rw_bus_clr_mask___byte3___lsb 24
120#define reg_iop_sw_mpu_rw_bus_clr_mask___byte3___width 8
121#define reg_iop_sw_mpu_rw_bus_clr_mask_offset 36
122
123/* Register rw_bus_set_mask, scope iop_sw_mpu, type rw */
124#define reg_iop_sw_mpu_rw_bus_set_mask___byte0___lsb 0
125#define reg_iop_sw_mpu_rw_bus_set_mask___byte0___width 8
126#define reg_iop_sw_mpu_rw_bus_set_mask___byte1___lsb 8
127#define reg_iop_sw_mpu_rw_bus_set_mask___byte1___width 8
128#define reg_iop_sw_mpu_rw_bus_set_mask___byte2___lsb 16
129#define reg_iop_sw_mpu_rw_bus_set_mask___byte2___width 8
130#define reg_iop_sw_mpu_rw_bus_set_mask___byte3___lsb 24
131#define reg_iop_sw_mpu_rw_bus_set_mask___byte3___width 8
132#define reg_iop_sw_mpu_rw_bus_set_mask_offset 40
133
134/* Register rw_bus_oe_clr_mask, scope iop_sw_mpu, type rw */
135#define reg_iop_sw_mpu_rw_bus_oe_clr_mask___byte0___lsb 0
136#define reg_iop_sw_mpu_rw_bus_oe_clr_mask___byte0___width 1
137#define reg_iop_sw_mpu_rw_bus_oe_clr_mask___byte0___bit 0
138#define reg_iop_sw_mpu_rw_bus_oe_clr_mask___byte1___lsb 1
139#define reg_iop_sw_mpu_rw_bus_oe_clr_mask___byte1___width 1
140#define reg_iop_sw_mpu_rw_bus_oe_clr_mask___byte1___bit 1
141#define reg_iop_sw_mpu_rw_bus_oe_clr_mask___byte2___lsb 2
142#define reg_iop_sw_mpu_rw_bus_oe_clr_mask___byte2___width 1
143#define reg_iop_sw_mpu_rw_bus_oe_clr_mask___byte2___bit 2
144#define reg_iop_sw_mpu_rw_bus_oe_clr_mask___byte3___lsb 3
145#define reg_iop_sw_mpu_rw_bus_oe_clr_mask___byte3___width 1
146#define reg_iop_sw_mpu_rw_bus_oe_clr_mask___byte3___bit 3
147#define reg_iop_sw_mpu_rw_bus_oe_clr_mask_offset 44
148
149/* Register rw_bus_oe_set_mask, scope iop_sw_mpu, type rw */
150#define reg_iop_sw_mpu_rw_bus_oe_set_mask___byte0___lsb 0
151#define reg_iop_sw_mpu_rw_bus_oe_set_mask___byte0___width 1
152#define reg_iop_sw_mpu_rw_bus_oe_set_mask___byte0___bit 0
153#define reg_iop_sw_mpu_rw_bus_oe_set_mask___byte1___lsb 1
154#define reg_iop_sw_mpu_rw_bus_oe_set_mask___byte1___width 1
155#define reg_iop_sw_mpu_rw_bus_oe_set_mask___byte1___bit 1
156#define reg_iop_sw_mpu_rw_bus_oe_set_mask___byte2___lsb 2
157#define reg_iop_sw_mpu_rw_bus_oe_set_mask___byte2___width 1
158#define reg_iop_sw_mpu_rw_bus_oe_set_mask___byte2___bit 2
159#define reg_iop_sw_mpu_rw_bus_oe_set_mask___byte3___lsb 3
160#define reg_iop_sw_mpu_rw_bus_oe_set_mask___byte3___width 1
161#define reg_iop_sw_mpu_rw_bus_oe_set_mask___byte3___bit 3
162#define reg_iop_sw_mpu_rw_bus_oe_set_mask_offset 48
163
164/* Register r_bus_in, scope iop_sw_mpu, type r */
165#define reg_iop_sw_mpu_r_bus_in_offset 52
166
167/* Register rw_gio_clr_mask, scope iop_sw_mpu, type rw */
168#define reg_iop_sw_mpu_rw_gio_clr_mask___val___lsb 0
169#define reg_iop_sw_mpu_rw_gio_clr_mask___val___width 32
170#define reg_iop_sw_mpu_rw_gio_clr_mask_offset 56
171
172/* Register rw_gio_set_mask, scope iop_sw_mpu, type rw */
173#define reg_iop_sw_mpu_rw_gio_set_mask___val___lsb 0
174#define reg_iop_sw_mpu_rw_gio_set_mask___val___width 32
175#define reg_iop_sw_mpu_rw_gio_set_mask_offset 60
176
177/* Register rw_gio_oe_clr_mask, scope iop_sw_mpu, type rw */
178#define reg_iop_sw_mpu_rw_gio_oe_clr_mask___val___lsb 0
179#define reg_iop_sw_mpu_rw_gio_oe_clr_mask___val___width 32
180#define reg_iop_sw_mpu_rw_gio_oe_clr_mask_offset 64
181
182/* Register rw_gio_oe_set_mask, scope iop_sw_mpu, type rw */
183#define reg_iop_sw_mpu_rw_gio_oe_set_mask___val___lsb 0
184#define reg_iop_sw_mpu_rw_gio_oe_set_mask___val___width 32
185#define reg_iop_sw_mpu_rw_gio_oe_set_mask_offset 68
186
187/* Register r_gio_in, scope iop_sw_mpu, type r */
188#define reg_iop_sw_mpu_r_gio_in_offset 72
189
190/* Register rw_cpu_intr, scope iop_sw_mpu, type rw */
191#define reg_iop_sw_mpu_rw_cpu_intr___intr0___lsb 0
192#define reg_iop_sw_mpu_rw_cpu_intr___intr0___width 1
193#define reg_iop_sw_mpu_rw_cpu_intr___intr0___bit 0
194#define reg_iop_sw_mpu_rw_cpu_intr___intr1___lsb 1
195#define reg_iop_sw_mpu_rw_cpu_intr___intr1___width 1
196#define reg_iop_sw_mpu_rw_cpu_intr___intr1___bit 1
197#define reg_iop_sw_mpu_rw_cpu_intr___intr2___lsb 2
198#define reg_iop_sw_mpu_rw_cpu_intr___intr2___width 1
199#define reg_iop_sw_mpu_rw_cpu_intr___intr2___bit 2
200#define reg_iop_sw_mpu_rw_cpu_intr___intr3___lsb 3
201#define reg_iop_sw_mpu_rw_cpu_intr___intr3___width 1
202#define reg_iop_sw_mpu_rw_cpu_intr___intr3___bit 3
203#define reg_iop_sw_mpu_rw_cpu_intr___intr4___lsb 4
204#define reg_iop_sw_mpu_rw_cpu_intr___intr4___width 1
205#define reg_iop_sw_mpu_rw_cpu_intr___intr4___bit 4
206#define reg_iop_sw_mpu_rw_cpu_intr___intr5___lsb 5
207#define reg_iop_sw_mpu_rw_cpu_intr___intr5___width 1
208#define reg_iop_sw_mpu_rw_cpu_intr___intr5___bit 5
209#define reg_iop_sw_mpu_rw_cpu_intr___intr6___lsb 6
210#define reg_iop_sw_mpu_rw_cpu_intr___intr6___width 1
211#define reg_iop_sw_mpu_rw_cpu_intr___intr6___bit 6
212#define reg_iop_sw_mpu_rw_cpu_intr___intr7___lsb 7
213#define reg_iop_sw_mpu_rw_cpu_intr___intr7___width 1
214#define reg_iop_sw_mpu_rw_cpu_intr___intr7___bit 7
215#define reg_iop_sw_mpu_rw_cpu_intr___intr8___lsb 8
216#define reg_iop_sw_mpu_rw_cpu_intr___intr8___width 1
217#define reg_iop_sw_mpu_rw_cpu_intr___intr8___bit 8
218#define reg_iop_sw_mpu_rw_cpu_intr___intr9___lsb 9
219#define reg_iop_sw_mpu_rw_cpu_intr___intr9___width 1
220#define reg_iop_sw_mpu_rw_cpu_intr___intr9___bit 9
221#define reg_iop_sw_mpu_rw_cpu_intr___intr10___lsb 10
222#define reg_iop_sw_mpu_rw_cpu_intr___intr10___width 1
223#define reg_iop_sw_mpu_rw_cpu_intr___intr10___bit 10
224#define reg_iop_sw_mpu_rw_cpu_intr___intr11___lsb 11
225#define reg_iop_sw_mpu_rw_cpu_intr___intr11___width 1
226#define reg_iop_sw_mpu_rw_cpu_intr___intr11___bit 11
227#define reg_iop_sw_mpu_rw_cpu_intr___intr12___lsb 12
228#define reg_iop_sw_mpu_rw_cpu_intr___intr12___width 1
229#define reg_iop_sw_mpu_rw_cpu_intr___intr12___bit 12
230#define reg_iop_sw_mpu_rw_cpu_intr___intr13___lsb 13
231#define reg_iop_sw_mpu_rw_cpu_intr___intr13___width 1
232#define reg_iop_sw_mpu_rw_cpu_intr___intr13___bit 13
233#define reg_iop_sw_mpu_rw_cpu_intr___intr14___lsb 14
234#define reg_iop_sw_mpu_rw_cpu_intr___intr14___width 1
235#define reg_iop_sw_mpu_rw_cpu_intr___intr14___bit 14
236#define reg_iop_sw_mpu_rw_cpu_intr___intr15___lsb 15
237#define reg_iop_sw_mpu_rw_cpu_intr___intr15___width 1
238#define reg_iop_sw_mpu_rw_cpu_intr___intr15___bit 15
239#define reg_iop_sw_mpu_rw_cpu_intr___intr16___lsb 16
240#define reg_iop_sw_mpu_rw_cpu_intr___intr16___width 1
241#define reg_iop_sw_mpu_rw_cpu_intr___intr16___bit 16
242#define reg_iop_sw_mpu_rw_cpu_intr___intr17___lsb 17
243#define reg_iop_sw_mpu_rw_cpu_intr___intr17___width 1
244#define reg_iop_sw_mpu_rw_cpu_intr___intr17___bit 17
245#define reg_iop_sw_mpu_rw_cpu_intr___intr18___lsb 18
246#define reg_iop_sw_mpu_rw_cpu_intr___intr18___width 1
247#define reg_iop_sw_mpu_rw_cpu_intr___intr18___bit 18
248#define reg_iop_sw_mpu_rw_cpu_intr___intr19___lsb 19
249#define reg_iop_sw_mpu_rw_cpu_intr___intr19___width 1
250#define reg_iop_sw_mpu_rw_cpu_intr___intr19___bit 19
251#define reg_iop_sw_mpu_rw_cpu_intr___intr20___lsb 20
252#define reg_iop_sw_mpu_rw_cpu_intr___intr20___width 1
253#define reg_iop_sw_mpu_rw_cpu_intr___intr20___bit 20
254#define reg_iop_sw_mpu_rw_cpu_intr___intr21___lsb 21
255#define reg_iop_sw_mpu_rw_cpu_intr___intr21___width 1
256#define reg_iop_sw_mpu_rw_cpu_intr___intr21___bit 21
257#define reg_iop_sw_mpu_rw_cpu_intr___intr22___lsb 22
258#define reg_iop_sw_mpu_rw_cpu_intr___intr22___width 1
259#define reg_iop_sw_mpu_rw_cpu_intr___intr22___bit 22
260#define reg_iop_sw_mpu_rw_cpu_intr___intr23___lsb 23
261#define reg_iop_sw_mpu_rw_cpu_intr___intr23___width 1
262#define reg_iop_sw_mpu_rw_cpu_intr___intr23___bit 23
263#define reg_iop_sw_mpu_rw_cpu_intr___intr24___lsb 24
264#define reg_iop_sw_mpu_rw_cpu_intr___intr24___width 1
265#define reg_iop_sw_mpu_rw_cpu_intr___intr24___bit 24
266#define reg_iop_sw_mpu_rw_cpu_intr___intr25___lsb 25
267#define reg_iop_sw_mpu_rw_cpu_intr___intr25___width 1
268#define reg_iop_sw_mpu_rw_cpu_intr___intr25___bit 25
269#define reg_iop_sw_mpu_rw_cpu_intr___intr26___lsb 26
270#define reg_iop_sw_mpu_rw_cpu_intr___intr26___width 1
271#define reg_iop_sw_mpu_rw_cpu_intr___intr26___bit 26
272#define reg_iop_sw_mpu_rw_cpu_intr___intr27___lsb 27
273#define reg_iop_sw_mpu_rw_cpu_intr___intr27___width 1
274#define reg_iop_sw_mpu_rw_cpu_intr___intr27___bit 27
275#define reg_iop_sw_mpu_rw_cpu_intr___intr28___lsb 28
276#define reg_iop_sw_mpu_rw_cpu_intr___intr28___width 1
277#define reg_iop_sw_mpu_rw_cpu_intr___intr28___bit 28
278#define reg_iop_sw_mpu_rw_cpu_intr___intr29___lsb 29
279#define reg_iop_sw_mpu_rw_cpu_intr___intr29___width 1
280#define reg_iop_sw_mpu_rw_cpu_intr___intr29___bit 29
281#define reg_iop_sw_mpu_rw_cpu_intr___intr30___lsb 30
282#define reg_iop_sw_mpu_rw_cpu_intr___intr30___width 1
283#define reg_iop_sw_mpu_rw_cpu_intr___intr30___bit 30
284#define reg_iop_sw_mpu_rw_cpu_intr___intr31___lsb 31
285#define reg_iop_sw_mpu_rw_cpu_intr___intr31___width 1
286#define reg_iop_sw_mpu_rw_cpu_intr___intr31___bit 31
287#define reg_iop_sw_mpu_rw_cpu_intr_offset 76
288
289/* Register r_cpu_intr, scope iop_sw_mpu, type r */
290#define reg_iop_sw_mpu_r_cpu_intr___intr0___lsb 0
291#define reg_iop_sw_mpu_r_cpu_intr___intr0___width 1
292#define reg_iop_sw_mpu_r_cpu_intr___intr0___bit 0
293#define reg_iop_sw_mpu_r_cpu_intr___intr1___lsb 1
294#define reg_iop_sw_mpu_r_cpu_intr___intr1___width 1
295#define reg_iop_sw_mpu_r_cpu_intr___intr1___bit 1
296#define reg_iop_sw_mpu_r_cpu_intr___intr2___lsb 2
297#define reg_iop_sw_mpu_r_cpu_intr___intr2___width 1
298#define reg_iop_sw_mpu_r_cpu_intr___intr2___bit 2
299#define reg_iop_sw_mpu_r_cpu_intr___intr3___lsb 3
300#define reg_iop_sw_mpu_r_cpu_intr___intr3___width 1
301#define reg_iop_sw_mpu_r_cpu_intr___intr3___bit 3
302#define reg_iop_sw_mpu_r_cpu_intr___intr4___lsb 4
303#define reg_iop_sw_mpu_r_cpu_intr___intr4___width 1
304#define reg_iop_sw_mpu_r_cpu_intr___intr4___bit 4
305#define reg_iop_sw_mpu_r_cpu_intr___intr5___lsb 5
306#define reg_iop_sw_mpu_r_cpu_intr___intr5___width 1
307#define reg_iop_sw_mpu_r_cpu_intr___intr5___bit 5
308#define reg_iop_sw_mpu_r_cpu_intr___intr6___lsb 6
309#define reg_iop_sw_mpu_r_cpu_intr___intr6___width 1
310#define reg_iop_sw_mpu_r_cpu_intr___intr6___bit 6
311#define reg_iop_sw_mpu_r_cpu_intr___intr7___lsb 7
312#define reg_iop_sw_mpu_r_cpu_intr___intr7___width 1
313#define reg_iop_sw_mpu_r_cpu_intr___intr7___bit 7
314#define reg_iop_sw_mpu_r_cpu_intr___intr8___lsb 8
315#define reg_iop_sw_mpu_r_cpu_intr___intr8___width 1
316#define reg_iop_sw_mpu_r_cpu_intr___intr8___bit 8
317#define reg_iop_sw_mpu_r_cpu_intr___intr9___lsb 9
318#define reg_iop_sw_mpu_r_cpu_intr___intr9___width 1
319#define reg_iop_sw_mpu_r_cpu_intr___intr9___bit 9
320#define reg_iop_sw_mpu_r_cpu_intr___intr10___lsb 10
321#define reg_iop_sw_mpu_r_cpu_intr___intr10___width 1
322#define reg_iop_sw_mpu_r_cpu_intr___intr10___bit 10
323#define reg_iop_sw_mpu_r_cpu_intr___intr11___lsb 11
324#define reg_iop_sw_mpu_r_cpu_intr___intr11___width 1
325#define reg_iop_sw_mpu_r_cpu_intr___intr11___bit 11
326#define reg_iop_sw_mpu_r_cpu_intr___intr12___lsb 12
327#define reg_iop_sw_mpu_r_cpu_intr___intr12___width 1
328#define reg_iop_sw_mpu_r_cpu_intr___intr12___bit 12
329#define reg_iop_sw_mpu_r_cpu_intr___intr13___lsb 13
330#define reg_iop_sw_mpu_r_cpu_intr___intr13___width 1
331#define reg_iop_sw_mpu_r_cpu_intr___intr13___bit 13
332#define reg_iop_sw_mpu_r_cpu_intr___intr14___lsb 14
333#define reg_iop_sw_mpu_r_cpu_intr___intr14___width 1
334#define reg_iop_sw_mpu_r_cpu_intr___intr14___bit 14
335#define reg_iop_sw_mpu_r_cpu_intr___intr15___lsb 15
336#define reg_iop_sw_mpu_r_cpu_intr___intr15___width 1
337#define reg_iop_sw_mpu_r_cpu_intr___intr15___bit 15
338#define reg_iop_sw_mpu_r_cpu_intr___intr16___lsb 16
339#define reg_iop_sw_mpu_r_cpu_intr___intr16___width 1
340#define reg_iop_sw_mpu_r_cpu_intr___intr16___bit 16
341#define reg_iop_sw_mpu_r_cpu_intr___intr17___lsb 17
342#define reg_iop_sw_mpu_r_cpu_intr___intr17___width 1
343#define reg_iop_sw_mpu_r_cpu_intr___intr17___bit 17
344#define reg_iop_sw_mpu_r_cpu_intr___intr18___lsb 18
345#define reg_iop_sw_mpu_r_cpu_intr___intr18___width 1
346#define reg_iop_sw_mpu_r_cpu_intr___intr18___bit 18
347#define reg_iop_sw_mpu_r_cpu_intr___intr19___lsb 19
348#define reg_iop_sw_mpu_r_cpu_intr___intr19___width 1
349#define reg_iop_sw_mpu_r_cpu_intr___intr19___bit 19
350#define reg_iop_sw_mpu_r_cpu_intr___intr20___lsb 20
351#define reg_iop_sw_mpu_r_cpu_intr___intr20___width 1
352#define reg_iop_sw_mpu_r_cpu_intr___intr20___bit 20
353#define reg_iop_sw_mpu_r_cpu_intr___intr21___lsb 21
354#define reg_iop_sw_mpu_r_cpu_intr___intr21___width 1
355#define reg_iop_sw_mpu_r_cpu_intr___intr21___bit 21
356#define reg_iop_sw_mpu_r_cpu_intr___intr22___lsb 22
357#define reg_iop_sw_mpu_r_cpu_intr___intr22___width 1
358#define reg_iop_sw_mpu_r_cpu_intr___intr22___bit 22
359#define reg_iop_sw_mpu_r_cpu_intr___intr23___lsb 23
360#define reg_iop_sw_mpu_r_cpu_intr___intr23___width 1
361#define reg_iop_sw_mpu_r_cpu_intr___intr23___bit 23
362#define reg_iop_sw_mpu_r_cpu_intr___intr24___lsb 24
363#define reg_iop_sw_mpu_r_cpu_intr___intr24___width 1
364#define reg_iop_sw_mpu_r_cpu_intr___intr24___bit 24
365#define reg_iop_sw_mpu_r_cpu_intr___intr25___lsb 25
366#define reg_iop_sw_mpu_r_cpu_intr___intr25___width 1
367#define reg_iop_sw_mpu_r_cpu_intr___intr25___bit 25
368#define reg_iop_sw_mpu_r_cpu_intr___intr26___lsb 26
369#define reg_iop_sw_mpu_r_cpu_intr___intr26___width 1
370#define reg_iop_sw_mpu_r_cpu_intr___intr26___bit 26
371#define reg_iop_sw_mpu_r_cpu_intr___intr27___lsb 27
372#define reg_iop_sw_mpu_r_cpu_intr___intr27___width 1
373#define reg_iop_sw_mpu_r_cpu_intr___intr27___bit 27
374#define reg_iop_sw_mpu_r_cpu_intr___intr28___lsb 28
375#define reg_iop_sw_mpu_r_cpu_intr___intr28___width 1
376#define reg_iop_sw_mpu_r_cpu_intr___intr28___bit 28
377#define reg_iop_sw_mpu_r_cpu_intr___intr29___lsb 29
378#define reg_iop_sw_mpu_r_cpu_intr___intr29___width 1
379#define reg_iop_sw_mpu_r_cpu_intr___intr29___bit 29
380#define reg_iop_sw_mpu_r_cpu_intr___intr30___lsb 30
381#define reg_iop_sw_mpu_r_cpu_intr___intr30___width 1
382#define reg_iop_sw_mpu_r_cpu_intr___intr30___bit 30
383#define reg_iop_sw_mpu_r_cpu_intr___intr31___lsb 31
384#define reg_iop_sw_mpu_r_cpu_intr___intr31___width 1
385#define reg_iop_sw_mpu_r_cpu_intr___intr31___bit 31
386#define reg_iop_sw_mpu_r_cpu_intr_offset 80
387
388/* Register rw_intr_grp0_mask, scope iop_sw_mpu, type rw */
389#define reg_iop_sw_mpu_rw_intr_grp0_mask___spu_intr0___lsb 0
390#define reg_iop_sw_mpu_rw_intr_grp0_mask___spu_intr0___width 1
391#define reg_iop_sw_mpu_rw_intr_grp0_mask___spu_intr0___bit 0
392#define reg_iop_sw_mpu_rw_intr_grp0_mask___trigger_grp0___lsb 1
393#define reg_iop_sw_mpu_rw_intr_grp0_mask___trigger_grp0___width 1
394#define reg_iop_sw_mpu_rw_intr_grp0_mask___trigger_grp0___bit 1
395#define reg_iop_sw_mpu_rw_intr_grp0_mask___timer_grp0___lsb 2
396#define reg_iop_sw_mpu_rw_intr_grp0_mask___timer_grp0___width 1
397#define reg_iop_sw_mpu_rw_intr_grp0_mask___timer_grp0___bit 2
398#define reg_iop_sw_mpu_rw_intr_grp0_mask___fifo_out___lsb 3
399#define reg_iop_sw_mpu_rw_intr_grp0_mask___fifo_out___width 1
400#define reg_iop_sw_mpu_rw_intr_grp0_mask___fifo_out___bit 3
401#define reg_iop_sw_mpu_rw_intr_grp0_mask___spu_intr1___lsb 4
402#define reg_iop_sw_mpu_rw_intr_grp0_mask___spu_intr1___width 1
403#define reg_iop_sw_mpu_rw_intr_grp0_mask___spu_intr1___bit 4
404#define reg_iop_sw_mpu_rw_intr_grp0_mask___trigger_grp1___lsb 5
405#define reg_iop_sw_mpu_rw_intr_grp0_mask___trigger_grp1___width 1
406#define reg_iop_sw_mpu_rw_intr_grp0_mask___trigger_grp1___bit 5
407#define reg_iop_sw_mpu_rw_intr_grp0_mask___timer_grp1___lsb 6
408#define reg_iop_sw_mpu_rw_intr_grp0_mask___timer_grp1___width 1
409#define reg_iop_sw_mpu_rw_intr_grp0_mask___timer_grp1___bit 6
410#define reg_iop_sw_mpu_rw_intr_grp0_mask___fifo_in___lsb 7
411#define reg_iop_sw_mpu_rw_intr_grp0_mask___fifo_in___width 1
412#define reg_iop_sw_mpu_rw_intr_grp0_mask___fifo_in___bit 7
413#define reg_iop_sw_mpu_rw_intr_grp0_mask___spu_intr2___lsb 8
414#define reg_iop_sw_mpu_rw_intr_grp0_mask___spu_intr2___width 1
415#define reg_iop_sw_mpu_rw_intr_grp0_mask___spu_intr2___bit 8
416#define reg_iop_sw_mpu_rw_intr_grp0_mask___trigger_grp2___lsb 9
417#define reg_iop_sw_mpu_rw_intr_grp0_mask___trigger_grp2___width 1
418#define reg_iop_sw_mpu_rw_intr_grp0_mask___trigger_grp2___bit 9
419#define reg_iop_sw_mpu_rw_intr_grp0_mask___fifo_out_extra___lsb 10
420#define reg_iop_sw_mpu_rw_intr_grp0_mask___fifo_out_extra___width 1
421#define reg_iop_sw_mpu_rw_intr_grp0_mask___fifo_out_extra___bit 10
422#define reg_iop_sw_mpu_rw_intr_grp0_mask___dmc_out___lsb 11
423#define reg_iop_sw_mpu_rw_intr_grp0_mask___dmc_out___width 1
424#define reg_iop_sw_mpu_rw_intr_grp0_mask___dmc_out___bit 11
425#define reg_iop_sw_mpu_rw_intr_grp0_mask___spu_intr3___lsb 12
426#define reg_iop_sw_mpu_rw_intr_grp0_mask___spu_intr3___width 1
427#define reg_iop_sw_mpu_rw_intr_grp0_mask___spu_intr3___bit 12
428#define reg_iop_sw_mpu_rw_intr_grp0_mask___trigger_grp3___lsb 13
429#define reg_iop_sw_mpu_rw_intr_grp0_mask___trigger_grp3___width 1
430#define reg_iop_sw_mpu_rw_intr_grp0_mask___trigger_grp3___bit 13
431#define reg_iop_sw_mpu_rw_intr_grp0_mask___fifo_in_extra___lsb 14
432#define reg_iop_sw_mpu_rw_intr_grp0_mask___fifo_in_extra___width 1
433#define reg_iop_sw_mpu_rw_intr_grp0_mask___fifo_in_extra___bit 14
434#define reg_iop_sw_mpu_rw_intr_grp0_mask___dmc_in___lsb 15
435#define reg_iop_sw_mpu_rw_intr_grp0_mask___dmc_in___width 1
436#define reg_iop_sw_mpu_rw_intr_grp0_mask___dmc_in___bit 15
437#define reg_iop_sw_mpu_rw_intr_grp0_mask_offset 84
438
439/* Register rw_ack_intr_grp0, scope iop_sw_mpu, type rw */
440#define reg_iop_sw_mpu_rw_ack_intr_grp0___spu_intr0___lsb 0
441#define reg_iop_sw_mpu_rw_ack_intr_grp0___spu_intr0___width 1
442#define reg_iop_sw_mpu_rw_ack_intr_grp0___spu_intr0___bit 0
443#define reg_iop_sw_mpu_rw_ack_intr_grp0___spu_intr1___lsb 4
444#define reg_iop_sw_mpu_rw_ack_intr_grp0___spu_intr1___width 1
445#define reg_iop_sw_mpu_rw_ack_intr_grp0___spu_intr1___bit 4
446#define reg_iop_sw_mpu_rw_ack_intr_grp0___spu_intr2___lsb 8
447#define reg_iop_sw_mpu_rw_ack_intr_grp0___spu_intr2___width 1
448#define reg_iop_sw_mpu_rw_ack_intr_grp0___spu_intr2___bit 8
449#define reg_iop_sw_mpu_rw_ack_intr_grp0___spu_intr3___lsb 12
450#define reg_iop_sw_mpu_rw_ack_intr_grp0___spu_intr3___width 1
451#define reg_iop_sw_mpu_rw_ack_intr_grp0___spu_intr3___bit 12
452#define reg_iop_sw_mpu_rw_ack_intr_grp0_offset 88
453
454/* Register r_intr_grp0, scope iop_sw_mpu, type r */
455#define reg_iop_sw_mpu_r_intr_grp0___spu_intr0___lsb 0
456#define reg_iop_sw_mpu_r_intr_grp0___spu_intr0___width 1
457#define reg_iop_sw_mpu_r_intr_grp0___spu_intr0___bit 0
458#define reg_iop_sw_mpu_r_intr_grp0___trigger_grp0___lsb 1
459#define reg_iop_sw_mpu_r_intr_grp0___trigger_grp0___width 1
460#define reg_iop_sw_mpu_r_intr_grp0___trigger_grp0___bit 1
461#define reg_iop_sw_mpu_r_intr_grp0___timer_grp0___lsb 2
462#define reg_iop_sw_mpu_r_intr_grp0___timer_grp0___width 1
463#define reg_iop_sw_mpu_r_intr_grp0___timer_grp0___bit 2
464#define reg_iop_sw_mpu_r_intr_grp0___fifo_out___lsb 3
465#define reg_iop_sw_mpu_r_intr_grp0___fifo_out___width 1
466#define reg_iop_sw_mpu_r_intr_grp0___fifo_out___bit 3
467#define reg_iop_sw_mpu_r_intr_grp0___spu_intr1___lsb 4
468#define reg_iop_sw_mpu_r_intr_grp0___spu_intr1___width 1
469#define reg_iop_sw_mpu_r_intr_grp0___spu_intr1___bit 4
470#define reg_iop_sw_mpu_r_intr_grp0___trigger_grp1___lsb 5
471#define reg_iop_sw_mpu_r_intr_grp0___trigger_grp1___width 1
472#define reg_iop_sw_mpu_r_intr_grp0___trigger_grp1___bit 5
473#define reg_iop_sw_mpu_r_intr_grp0___timer_grp1___lsb 6
474#define reg_iop_sw_mpu_r_intr_grp0___timer_grp1___width 1
475#define reg_iop_sw_mpu_r_intr_grp0___timer_grp1___bit 6
476#define reg_iop_sw_mpu_r_intr_grp0___fifo_in___lsb 7
477#define reg_iop_sw_mpu_r_intr_grp0___fifo_in___width 1
478#define reg_iop_sw_mpu_r_intr_grp0___fifo_in___bit 7
479#define reg_iop_sw_mpu_r_intr_grp0___spu_intr2___lsb 8
480#define reg_iop_sw_mpu_r_intr_grp0___spu_intr2___width 1
481#define reg_iop_sw_mpu_r_intr_grp0___spu_intr2___bit 8
482#define reg_iop_sw_mpu_r_intr_grp0___trigger_grp2___lsb 9
483#define reg_iop_sw_mpu_r_intr_grp0___trigger_grp2___width 1
484#define reg_iop_sw_mpu_r_intr_grp0___trigger_grp2___bit 9
485#define reg_iop_sw_mpu_r_intr_grp0___fifo_out_extra___lsb 10
486#define reg_iop_sw_mpu_r_intr_grp0___fifo_out_extra___width 1
487#define reg_iop_sw_mpu_r_intr_grp0___fifo_out_extra___bit 10
488#define reg_iop_sw_mpu_r_intr_grp0___dmc_out___lsb 11
489#define reg_iop_sw_mpu_r_intr_grp0___dmc_out___width 1
490#define reg_iop_sw_mpu_r_intr_grp0___dmc_out___bit 11
491#define reg_iop_sw_mpu_r_intr_grp0___spu_intr3___lsb 12
492#define reg_iop_sw_mpu_r_intr_grp0___spu_intr3___width 1
493#define reg_iop_sw_mpu_r_intr_grp0___spu_intr3___bit 12
494#define reg_iop_sw_mpu_r_intr_grp0___trigger_grp3___lsb 13
495#define reg_iop_sw_mpu_r_intr_grp0___trigger_grp3___width 1
496#define reg_iop_sw_mpu_r_intr_grp0___trigger_grp3___bit 13
497#define reg_iop_sw_mpu_r_intr_grp0___fifo_in_extra___lsb 14
498#define reg_iop_sw_mpu_r_intr_grp0___fifo_in_extra___width 1
499#define reg_iop_sw_mpu_r_intr_grp0___fifo_in_extra___bit 14
500#define reg_iop_sw_mpu_r_intr_grp0___dmc_in___lsb 15
501#define reg_iop_sw_mpu_r_intr_grp0___dmc_in___width 1
502#define reg_iop_sw_mpu_r_intr_grp0___dmc_in___bit 15
503#define reg_iop_sw_mpu_r_intr_grp0_offset 92
504
505/* Register r_masked_intr_grp0, scope iop_sw_mpu, type r */
506#define reg_iop_sw_mpu_r_masked_intr_grp0___spu_intr0___lsb 0
507#define reg_iop_sw_mpu_r_masked_intr_grp0___spu_intr0___width 1
508#define reg_iop_sw_mpu_r_masked_intr_grp0___spu_intr0___bit 0
509#define reg_iop_sw_mpu_r_masked_intr_grp0___trigger_grp0___lsb 1
510#define reg_iop_sw_mpu_r_masked_intr_grp0___trigger_grp0___width 1
511#define reg_iop_sw_mpu_r_masked_intr_grp0___trigger_grp0___bit 1
512#define reg_iop_sw_mpu_r_masked_intr_grp0___timer_grp0___lsb 2
513#define reg_iop_sw_mpu_r_masked_intr_grp0___timer_grp0___width 1
514#define reg_iop_sw_mpu_r_masked_intr_grp0___timer_grp0___bit 2
515#define reg_iop_sw_mpu_r_masked_intr_grp0___fifo_out___lsb 3
516#define reg_iop_sw_mpu_r_masked_intr_grp0___fifo_out___width 1
517#define reg_iop_sw_mpu_r_masked_intr_grp0___fifo_out___bit 3
518#define reg_iop_sw_mpu_r_masked_intr_grp0___spu_intr1___lsb 4
519#define reg_iop_sw_mpu_r_masked_intr_grp0___spu_intr1___width 1
520#define reg_iop_sw_mpu_r_masked_intr_grp0___spu_intr1___bit 4
521#define reg_iop_sw_mpu_r_masked_intr_grp0___trigger_grp1___lsb 5
522#define reg_iop_sw_mpu_r_masked_intr_grp0___trigger_grp1___width 1
523#define reg_iop_sw_mpu_r_masked_intr_grp0___trigger_grp1___bit 5
524#define reg_iop_sw_mpu_r_masked_intr_grp0___timer_grp1___lsb 6
525#define reg_iop_sw_mpu_r_masked_intr_grp0___timer_grp1___width 1
526#define reg_iop_sw_mpu_r_masked_intr_grp0___timer_grp1___bit 6
527#define reg_iop_sw_mpu_r_masked_intr_grp0___fifo_in___lsb 7
528#define reg_iop_sw_mpu_r_masked_intr_grp0___fifo_in___width 1
529#define reg_iop_sw_mpu_r_masked_intr_grp0___fifo_in___bit 7
530#define reg_iop_sw_mpu_r_masked_intr_grp0___spu_intr2___lsb 8
531#define reg_iop_sw_mpu_r_masked_intr_grp0___spu_intr2___width 1
532#define reg_iop_sw_mpu_r_masked_intr_grp0___spu_intr2___bit 8
533#define reg_iop_sw_mpu_r_masked_intr_grp0___trigger_grp2___lsb 9
534#define reg_iop_sw_mpu_r_masked_intr_grp0___trigger_grp2___width 1
535#define reg_iop_sw_mpu_r_masked_intr_grp0___trigger_grp2___bit 9
536#define reg_iop_sw_mpu_r_masked_intr_grp0___fifo_out_extra___lsb 10
537#define reg_iop_sw_mpu_r_masked_intr_grp0___fifo_out_extra___width 1
538#define reg_iop_sw_mpu_r_masked_intr_grp0___fifo_out_extra___bit 10
539#define reg_iop_sw_mpu_r_masked_intr_grp0___dmc_out___lsb 11
540#define reg_iop_sw_mpu_r_masked_intr_grp0___dmc_out___width 1
541#define reg_iop_sw_mpu_r_masked_intr_grp0___dmc_out___bit 11
542#define reg_iop_sw_mpu_r_masked_intr_grp0___spu_intr3___lsb 12
543#define reg_iop_sw_mpu_r_masked_intr_grp0___spu_intr3___width 1
544#define reg_iop_sw_mpu_r_masked_intr_grp0___spu_intr3___bit 12
545#define reg_iop_sw_mpu_r_masked_intr_grp0___trigger_grp3___lsb 13
546#define reg_iop_sw_mpu_r_masked_intr_grp0___trigger_grp3___width 1
547#define reg_iop_sw_mpu_r_masked_intr_grp0___trigger_grp3___bit 13
548#define reg_iop_sw_mpu_r_masked_intr_grp0___fifo_in_extra___lsb 14
549#define reg_iop_sw_mpu_r_masked_intr_grp0___fifo_in_extra___width 1
550#define reg_iop_sw_mpu_r_masked_intr_grp0___fifo_in_extra___bit 14
551#define reg_iop_sw_mpu_r_masked_intr_grp0___dmc_in___lsb 15
552#define reg_iop_sw_mpu_r_masked_intr_grp0___dmc_in___width 1
553#define reg_iop_sw_mpu_r_masked_intr_grp0___dmc_in___bit 15
554#define reg_iop_sw_mpu_r_masked_intr_grp0_offset 96
555
556/* Register rw_intr_grp1_mask, scope iop_sw_mpu, type rw */
557#define reg_iop_sw_mpu_rw_intr_grp1_mask___spu_intr4___lsb 0
558#define reg_iop_sw_mpu_rw_intr_grp1_mask___spu_intr4___width 1
559#define reg_iop_sw_mpu_rw_intr_grp1_mask___spu_intr4___bit 0
560#define reg_iop_sw_mpu_rw_intr_grp1_mask___trigger_grp4___lsb 1
561#define reg_iop_sw_mpu_rw_intr_grp1_mask___trigger_grp4___width 1
562#define reg_iop_sw_mpu_rw_intr_grp1_mask___trigger_grp4___bit 1
563#define reg_iop_sw_mpu_rw_intr_grp1_mask___fifo_out_extra___lsb 2
564#define reg_iop_sw_mpu_rw_intr_grp1_mask___fifo_out_extra___width 1
565#define reg_iop_sw_mpu_rw_intr_grp1_mask___fifo_out_extra___bit 2
566#define reg_iop_sw_mpu_rw_intr_grp1_mask___dmc_out___lsb 3
567#define reg_iop_sw_mpu_rw_intr_grp1_mask___dmc_out___width 1
568#define reg_iop_sw_mpu_rw_intr_grp1_mask___dmc_out___bit 3
569#define reg_iop_sw_mpu_rw_intr_grp1_mask___spu_intr5___lsb 4
570#define reg_iop_sw_mpu_rw_intr_grp1_mask___spu_intr5___width 1
571#define reg_iop_sw_mpu_rw_intr_grp1_mask___spu_intr5___bit 4
572#define reg_iop_sw_mpu_rw_intr_grp1_mask___trigger_grp5___lsb 5
573#define reg_iop_sw_mpu_rw_intr_grp1_mask___trigger_grp5___width 1
574#define reg_iop_sw_mpu_rw_intr_grp1_mask___trigger_grp5___bit 5
575#define reg_iop_sw_mpu_rw_intr_grp1_mask___fifo_in_extra___lsb 6
576#define reg_iop_sw_mpu_rw_intr_grp1_mask___fifo_in_extra___width 1
577#define reg_iop_sw_mpu_rw_intr_grp1_mask___fifo_in_extra___bit 6
578#define reg_iop_sw_mpu_rw_intr_grp1_mask___dmc_in___lsb 7
579#define reg_iop_sw_mpu_rw_intr_grp1_mask___dmc_in___width 1
580#define reg_iop_sw_mpu_rw_intr_grp1_mask___dmc_in___bit 7
581#define reg_iop_sw_mpu_rw_intr_grp1_mask___spu_intr6___lsb 8
582#define reg_iop_sw_mpu_rw_intr_grp1_mask___spu_intr6___width 1
583#define reg_iop_sw_mpu_rw_intr_grp1_mask___spu_intr6___bit 8
584#define reg_iop_sw_mpu_rw_intr_grp1_mask___trigger_grp6___lsb 9
585#define reg_iop_sw_mpu_rw_intr_grp1_mask___trigger_grp6___width 1
586#define reg_iop_sw_mpu_rw_intr_grp1_mask___trigger_grp6___bit 9
587#define reg_iop_sw_mpu_rw_intr_grp1_mask___timer_grp0___lsb 10
588#define reg_iop_sw_mpu_rw_intr_grp1_mask___timer_grp0___width 1
589#define reg_iop_sw_mpu_rw_intr_grp1_mask___timer_grp0___bit 10
590#define reg_iop_sw_mpu_rw_intr_grp1_mask___fifo_out___lsb 11
591#define reg_iop_sw_mpu_rw_intr_grp1_mask___fifo_out___width 1
592#define reg_iop_sw_mpu_rw_intr_grp1_mask___fifo_out___bit 11
593#define reg_iop_sw_mpu_rw_intr_grp1_mask___spu_intr7___lsb 12
594#define reg_iop_sw_mpu_rw_intr_grp1_mask___spu_intr7___width 1
595#define reg_iop_sw_mpu_rw_intr_grp1_mask___spu_intr7___bit 12
596#define reg_iop_sw_mpu_rw_intr_grp1_mask___trigger_grp7___lsb 13
597#define reg_iop_sw_mpu_rw_intr_grp1_mask___trigger_grp7___width 1
598#define reg_iop_sw_mpu_rw_intr_grp1_mask___trigger_grp7___bit 13
599#define reg_iop_sw_mpu_rw_intr_grp1_mask___timer_grp1___lsb 14
600#define reg_iop_sw_mpu_rw_intr_grp1_mask___timer_grp1___width 1
601#define reg_iop_sw_mpu_rw_intr_grp1_mask___timer_grp1___bit 14
602#define reg_iop_sw_mpu_rw_intr_grp1_mask___fifo_in___lsb 15
603#define reg_iop_sw_mpu_rw_intr_grp1_mask___fifo_in___width 1
604#define reg_iop_sw_mpu_rw_intr_grp1_mask___fifo_in___bit 15
605#define reg_iop_sw_mpu_rw_intr_grp1_mask_offset 100
606
607/* Register rw_ack_intr_grp1, scope iop_sw_mpu, type rw */
608#define reg_iop_sw_mpu_rw_ack_intr_grp1___spu_intr4___lsb 0
609#define reg_iop_sw_mpu_rw_ack_intr_grp1___spu_intr4___width 1
610#define reg_iop_sw_mpu_rw_ack_intr_grp1___spu_intr4___bit 0
611#define reg_iop_sw_mpu_rw_ack_intr_grp1___spu_intr5___lsb 4
612#define reg_iop_sw_mpu_rw_ack_intr_grp1___spu_intr5___width 1
613#define reg_iop_sw_mpu_rw_ack_intr_grp1___spu_intr5___bit 4
614#define reg_iop_sw_mpu_rw_ack_intr_grp1___spu_intr6___lsb 8
615#define reg_iop_sw_mpu_rw_ack_intr_grp1___spu_intr6___width 1
616#define reg_iop_sw_mpu_rw_ack_intr_grp1___spu_intr6___bit 8
617#define reg_iop_sw_mpu_rw_ack_intr_grp1___spu_intr7___lsb 12
618#define reg_iop_sw_mpu_rw_ack_intr_grp1___spu_intr7___width 1
619#define reg_iop_sw_mpu_rw_ack_intr_grp1___spu_intr7___bit 12
620#define reg_iop_sw_mpu_rw_ack_intr_grp1_offset 104
621
622/* Register r_intr_grp1, scope iop_sw_mpu, type r */
623#define reg_iop_sw_mpu_r_intr_grp1___spu_intr4___lsb 0
624#define reg_iop_sw_mpu_r_intr_grp1___spu_intr4___width 1
625#define reg_iop_sw_mpu_r_intr_grp1___spu_intr4___bit 0
626#define reg_iop_sw_mpu_r_intr_grp1___trigger_grp4___lsb 1
627#define reg_iop_sw_mpu_r_intr_grp1___trigger_grp4___width 1
628#define reg_iop_sw_mpu_r_intr_grp1___trigger_grp4___bit 1
629#define reg_iop_sw_mpu_r_intr_grp1___fifo_out_extra___lsb 2
630#define reg_iop_sw_mpu_r_intr_grp1___fifo_out_extra___width 1
631#define reg_iop_sw_mpu_r_intr_grp1___fifo_out_extra___bit 2
632#define reg_iop_sw_mpu_r_intr_grp1___dmc_out___lsb 3
633#define reg_iop_sw_mpu_r_intr_grp1___dmc_out___width 1
634#define reg_iop_sw_mpu_r_intr_grp1___dmc_out___bit 3
635#define reg_iop_sw_mpu_r_intr_grp1___spu_intr5___lsb 4
636#define reg_iop_sw_mpu_r_intr_grp1___spu_intr5___width 1
637#define reg_iop_sw_mpu_r_intr_grp1___spu_intr5___bit 4
638#define reg_iop_sw_mpu_r_intr_grp1___trigger_grp5___lsb 5
639#define reg_iop_sw_mpu_r_intr_grp1___trigger_grp5___width 1
640#define reg_iop_sw_mpu_r_intr_grp1___trigger_grp5___bit 5
641#define reg_iop_sw_mpu_r_intr_grp1___fifo_in_extra___lsb 6
642#define reg_iop_sw_mpu_r_intr_grp1___fifo_in_extra___width 1
643#define reg_iop_sw_mpu_r_intr_grp1___fifo_in_extra___bit 6
644#define reg_iop_sw_mpu_r_intr_grp1___dmc_in___lsb 7
645#define reg_iop_sw_mpu_r_intr_grp1___dmc_in___width 1
646#define reg_iop_sw_mpu_r_intr_grp1___dmc_in___bit 7
647#define reg_iop_sw_mpu_r_intr_grp1___spu_intr6___lsb 8
648#define reg_iop_sw_mpu_r_intr_grp1___spu_intr6___width 1
649#define reg_iop_sw_mpu_r_intr_grp1___spu_intr6___bit 8
650#define reg_iop_sw_mpu_r_intr_grp1___trigger_grp6___lsb 9
651#define reg_iop_sw_mpu_r_intr_grp1___trigger_grp6___width 1
652#define reg_iop_sw_mpu_r_intr_grp1___trigger_grp6___bit 9
653#define reg_iop_sw_mpu_r_intr_grp1___timer_grp0___lsb 10
654#define reg_iop_sw_mpu_r_intr_grp1___timer_grp0___width 1
655#define reg_iop_sw_mpu_r_intr_grp1___timer_grp0___bit 10
656#define reg_iop_sw_mpu_r_intr_grp1___fifo_out___lsb 11
657#define reg_iop_sw_mpu_r_intr_grp1___fifo_out___width 1
658#define reg_iop_sw_mpu_r_intr_grp1___fifo_out___bit 11
659#define reg_iop_sw_mpu_r_intr_grp1___spu_intr7___lsb 12
660#define reg_iop_sw_mpu_r_intr_grp1___spu_intr7___width 1
661#define reg_iop_sw_mpu_r_intr_grp1___spu_intr7___bit 12
662#define reg_iop_sw_mpu_r_intr_grp1___trigger_grp7___lsb 13
663#define reg_iop_sw_mpu_r_intr_grp1___trigger_grp7___width 1
664#define reg_iop_sw_mpu_r_intr_grp1___trigger_grp7___bit 13
665#define reg_iop_sw_mpu_r_intr_grp1___timer_grp1___lsb 14
666#define reg_iop_sw_mpu_r_intr_grp1___timer_grp1___width 1
667#define reg_iop_sw_mpu_r_intr_grp1___timer_grp1___bit 14
668#define reg_iop_sw_mpu_r_intr_grp1___fifo_in___lsb 15
669#define reg_iop_sw_mpu_r_intr_grp1___fifo_in___width 1
670#define reg_iop_sw_mpu_r_intr_grp1___fifo_in___bit 15
671#define reg_iop_sw_mpu_r_intr_grp1_offset 108
672
673/* Register r_masked_intr_grp1, scope iop_sw_mpu, type r */
674#define reg_iop_sw_mpu_r_masked_intr_grp1___spu_intr4___lsb 0
675#define reg_iop_sw_mpu_r_masked_intr_grp1___spu_intr4___width 1
676#define reg_iop_sw_mpu_r_masked_intr_grp1___spu_intr4___bit 0
677#define reg_iop_sw_mpu_r_masked_intr_grp1___trigger_grp4___lsb 1
678#define reg_iop_sw_mpu_r_masked_intr_grp1___trigger_grp4___width 1
679#define reg_iop_sw_mpu_r_masked_intr_grp1___trigger_grp4___bit 1
680#define reg_iop_sw_mpu_r_masked_intr_grp1___fifo_out_extra___lsb 2
681#define reg_iop_sw_mpu_r_masked_intr_grp1___fifo_out_extra___width 1
682#define reg_iop_sw_mpu_r_masked_intr_grp1___fifo_out_extra___bit 2
683#define reg_iop_sw_mpu_r_masked_intr_grp1___dmc_out___lsb 3
684#define reg_iop_sw_mpu_r_masked_intr_grp1___dmc_out___width 1
685#define reg_iop_sw_mpu_r_masked_intr_grp1___dmc_out___bit 3
686#define reg_iop_sw_mpu_r_masked_intr_grp1___spu_intr5___lsb 4
687#define reg_iop_sw_mpu_r_masked_intr_grp1___spu_intr5___width 1
688#define reg_iop_sw_mpu_r_masked_intr_grp1___spu_intr5___bit 4
689#define reg_iop_sw_mpu_r_masked_intr_grp1___trigger_grp5___lsb 5
690#define reg_iop_sw_mpu_r_masked_intr_grp1___trigger_grp5___width 1
691#define reg_iop_sw_mpu_r_masked_intr_grp1___trigger_grp5___bit 5
692#define reg_iop_sw_mpu_r_masked_intr_grp1___fifo_in_extra___lsb 6
693#define reg_iop_sw_mpu_r_masked_intr_grp1___fifo_in_extra___width 1
694#define reg_iop_sw_mpu_r_masked_intr_grp1___fifo_in_extra___bit 6
695#define reg_iop_sw_mpu_r_masked_intr_grp1___dmc_in___lsb 7
696#define reg_iop_sw_mpu_r_masked_intr_grp1___dmc_in___width 1
697#define reg_iop_sw_mpu_r_masked_intr_grp1___dmc_in___bit 7
698#define reg_iop_sw_mpu_r_masked_intr_grp1___spu_intr6___lsb 8
699#define reg_iop_sw_mpu_r_masked_intr_grp1___spu_intr6___width 1
700#define reg_iop_sw_mpu_r_masked_intr_grp1___spu_intr6___bit 8
701#define reg_iop_sw_mpu_r_masked_intr_grp1___trigger_grp6___lsb 9
702#define reg_iop_sw_mpu_r_masked_intr_grp1___trigger_grp6___width 1
703#define reg_iop_sw_mpu_r_masked_intr_grp1___trigger_grp6___bit 9
704#define reg_iop_sw_mpu_r_masked_intr_grp1___timer_grp0___lsb 10
705#define reg_iop_sw_mpu_r_masked_intr_grp1___timer_grp0___width 1
706#define reg_iop_sw_mpu_r_masked_intr_grp1___timer_grp0___bit 10
707#define reg_iop_sw_mpu_r_masked_intr_grp1___fifo_out___lsb 11
708#define reg_iop_sw_mpu_r_masked_intr_grp1___fifo_out___width 1
709#define reg_iop_sw_mpu_r_masked_intr_grp1___fifo_out___bit 11
710#define reg_iop_sw_mpu_r_masked_intr_grp1___spu_intr7___lsb 12
711#define reg_iop_sw_mpu_r_masked_intr_grp1___spu_intr7___width 1
712#define reg_iop_sw_mpu_r_masked_intr_grp1___spu_intr7___bit 12
713#define reg_iop_sw_mpu_r_masked_intr_grp1___trigger_grp7___lsb 13
714#define reg_iop_sw_mpu_r_masked_intr_grp1___trigger_grp7___width 1
715#define reg_iop_sw_mpu_r_masked_intr_grp1___trigger_grp7___bit 13
716#define reg_iop_sw_mpu_r_masked_intr_grp1___timer_grp1___lsb 14
717#define reg_iop_sw_mpu_r_masked_intr_grp1___timer_grp1___width 1
718#define reg_iop_sw_mpu_r_masked_intr_grp1___timer_grp1___bit 14
719#define reg_iop_sw_mpu_r_masked_intr_grp1___fifo_in___lsb 15
720#define reg_iop_sw_mpu_r_masked_intr_grp1___fifo_in___width 1
721#define reg_iop_sw_mpu_r_masked_intr_grp1___fifo_in___bit 15
722#define reg_iop_sw_mpu_r_masked_intr_grp1_offset 112
723
724/* Register rw_intr_grp2_mask, scope iop_sw_mpu, type rw */
725#define reg_iop_sw_mpu_rw_intr_grp2_mask___spu_intr8___lsb 0
726#define reg_iop_sw_mpu_rw_intr_grp2_mask___spu_intr8___width 1
727#define reg_iop_sw_mpu_rw_intr_grp2_mask___spu_intr8___bit 0
728#define reg_iop_sw_mpu_rw_intr_grp2_mask___trigger_grp0___lsb 1
729#define reg_iop_sw_mpu_rw_intr_grp2_mask___trigger_grp0___width 1
730#define reg_iop_sw_mpu_rw_intr_grp2_mask___trigger_grp0___bit 1
731#define reg_iop_sw_mpu_rw_intr_grp2_mask___timer_grp0___lsb 2
732#define reg_iop_sw_mpu_rw_intr_grp2_mask___timer_grp0___width 1
733#define reg_iop_sw_mpu_rw_intr_grp2_mask___timer_grp0___bit 2
734#define reg_iop_sw_mpu_rw_intr_grp2_mask___fifo_out___lsb 3
735#define reg_iop_sw_mpu_rw_intr_grp2_mask___fifo_out___width 1
736#define reg_iop_sw_mpu_rw_intr_grp2_mask___fifo_out___bit 3
737#define reg_iop_sw_mpu_rw_intr_grp2_mask___spu_intr9___lsb 4
738#define reg_iop_sw_mpu_rw_intr_grp2_mask___spu_intr9___width 1
739#define reg_iop_sw_mpu_rw_intr_grp2_mask___spu_intr9___bit 4
740#define reg_iop_sw_mpu_rw_intr_grp2_mask___trigger_grp1___lsb 5
741#define reg_iop_sw_mpu_rw_intr_grp2_mask___trigger_grp1___width 1
742#define reg_iop_sw_mpu_rw_intr_grp2_mask___trigger_grp1___bit 5
743#define reg_iop_sw_mpu_rw_intr_grp2_mask___timer_grp1___lsb 6
744#define reg_iop_sw_mpu_rw_intr_grp2_mask___timer_grp1___width 1
745#define reg_iop_sw_mpu_rw_intr_grp2_mask___timer_grp1___bit 6
746#define reg_iop_sw_mpu_rw_intr_grp2_mask___fifo_in___lsb 7
747#define reg_iop_sw_mpu_rw_intr_grp2_mask___fifo_in___width 1
748#define reg_iop_sw_mpu_rw_intr_grp2_mask___fifo_in___bit 7
749#define reg_iop_sw_mpu_rw_intr_grp2_mask___spu_intr10___lsb 8
750#define reg_iop_sw_mpu_rw_intr_grp2_mask___spu_intr10___width 1
751#define reg_iop_sw_mpu_rw_intr_grp2_mask___spu_intr10___bit 8
752#define reg_iop_sw_mpu_rw_intr_grp2_mask___trigger_grp2___lsb 9
753#define reg_iop_sw_mpu_rw_intr_grp2_mask___trigger_grp2___width 1
754#define reg_iop_sw_mpu_rw_intr_grp2_mask___trigger_grp2___bit 9
755#define reg_iop_sw_mpu_rw_intr_grp2_mask___fifo_out_extra___lsb 10
756#define reg_iop_sw_mpu_rw_intr_grp2_mask___fifo_out_extra___width 1
757#define reg_iop_sw_mpu_rw_intr_grp2_mask___fifo_out_extra___bit 10
758#define reg_iop_sw_mpu_rw_intr_grp2_mask___dmc_out___lsb 11
759#define reg_iop_sw_mpu_rw_intr_grp2_mask___dmc_out___width 1
760#define reg_iop_sw_mpu_rw_intr_grp2_mask___dmc_out___bit 11
761#define reg_iop_sw_mpu_rw_intr_grp2_mask___spu_intr11___lsb 12
762#define reg_iop_sw_mpu_rw_intr_grp2_mask___spu_intr11___width 1
763#define reg_iop_sw_mpu_rw_intr_grp2_mask___spu_intr11___bit 12
764#define reg_iop_sw_mpu_rw_intr_grp2_mask___trigger_grp3___lsb 13
765#define reg_iop_sw_mpu_rw_intr_grp2_mask___trigger_grp3___width 1
766#define reg_iop_sw_mpu_rw_intr_grp2_mask___trigger_grp3___bit 13
767#define reg_iop_sw_mpu_rw_intr_grp2_mask___fifo_in_extra___lsb 14
768#define reg_iop_sw_mpu_rw_intr_grp2_mask___fifo_in_extra___width 1
769#define reg_iop_sw_mpu_rw_intr_grp2_mask___fifo_in_extra___bit 14
770#define reg_iop_sw_mpu_rw_intr_grp2_mask___dmc_in___lsb 15
771#define reg_iop_sw_mpu_rw_intr_grp2_mask___dmc_in___width 1
772#define reg_iop_sw_mpu_rw_intr_grp2_mask___dmc_in___bit 15
773#define reg_iop_sw_mpu_rw_intr_grp2_mask_offset 116
774
775/* Register rw_ack_intr_grp2, scope iop_sw_mpu, type rw */
776#define reg_iop_sw_mpu_rw_ack_intr_grp2___spu_intr8___lsb 0
777#define reg_iop_sw_mpu_rw_ack_intr_grp2___spu_intr8___width 1
778#define reg_iop_sw_mpu_rw_ack_intr_grp2___spu_intr8___bit 0
779#define reg_iop_sw_mpu_rw_ack_intr_grp2___spu_intr9___lsb 4
780#define reg_iop_sw_mpu_rw_ack_intr_grp2___spu_intr9___width 1
781#define reg_iop_sw_mpu_rw_ack_intr_grp2___spu_intr9___bit 4
782#define reg_iop_sw_mpu_rw_ack_intr_grp2___spu_intr10___lsb 8
783#define reg_iop_sw_mpu_rw_ack_intr_grp2___spu_intr10___width 1
784#define reg_iop_sw_mpu_rw_ack_intr_grp2___spu_intr10___bit 8
785#define reg_iop_sw_mpu_rw_ack_intr_grp2___spu_intr11___lsb 12
786#define reg_iop_sw_mpu_rw_ack_intr_grp2___spu_intr11___width 1
787#define reg_iop_sw_mpu_rw_ack_intr_grp2___spu_intr11___bit 12
788#define reg_iop_sw_mpu_rw_ack_intr_grp2_offset 120
789
790/* Register r_intr_grp2, scope iop_sw_mpu, type r */
791#define reg_iop_sw_mpu_r_intr_grp2___spu_intr8___lsb 0
792#define reg_iop_sw_mpu_r_intr_grp2___spu_intr8___width 1
793#define reg_iop_sw_mpu_r_intr_grp2___spu_intr8___bit 0
794#define reg_iop_sw_mpu_r_intr_grp2___trigger_grp0___lsb 1
795#define reg_iop_sw_mpu_r_intr_grp2___trigger_grp0___width 1
796#define reg_iop_sw_mpu_r_intr_grp2___trigger_grp0___bit 1
797#define reg_iop_sw_mpu_r_intr_grp2___timer_grp0___lsb 2
798#define reg_iop_sw_mpu_r_intr_grp2___timer_grp0___width 1
799#define reg_iop_sw_mpu_r_intr_grp2___timer_grp0___bit 2
800#define reg_iop_sw_mpu_r_intr_grp2___fifo_out___lsb 3
801#define reg_iop_sw_mpu_r_intr_grp2___fifo_out___width 1
802#define reg_iop_sw_mpu_r_intr_grp2___fifo_out___bit 3
803#define reg_iop_sw_mpu_r_intr_grp2___spu_intr9___lsb 4
804#define reg_iop_sw_mpu_r_intr_grp2___spu_intr9___width 1
805#define reg_iop_sw_mpu_r_intr_grp2___spu_intr9___bit 4
806#define reg_iop_sw_mpu_r_intr_grp2___trigger_grp1___lsb 5
807#define reg_iop_sw_mpu_r_intr_grp2___trigger_grp1___width 1
808#define reg_iop_sw_mpu_r_intr_grp2___trigger_grp1___bit 5
809#define reg_iop_sw_mpu_r_intr_grp2___timer_grp1___lsb 6
810#define reg_iop_sw_mpu_r_intr_grp2___timer_grp1___width 1
811#define reg_iop_sw_mpu_r_intr_grp2___timer_grp1___bit 6
812#define reg_iop_sw_mpu_r_intr_grp2___fifo_in___lsb 7
813#define reg_iop_sw_mpu_r_intr_grp2___fifo_in___width 1
814#define reg_iop_sw_mpu_r_intr_grp2___fifo_in___bit 7
815#define reg_iop_sw_mpu_r_intr_grp2___spu_intr10___lsb 8
816#define reg_iop_sw_mpu_r_intr_grp2___spu_intr10___width 1
817#define reg_iop_sw_mpu_r_intr_grp2___spu_intr10___bit 8
818#define reg_iop_sw_mpu_r_intr_grp2___trigger_grp2___lsb 9
819#define reg_iop_sw_mpu_r_intr_grp2___trigger_grp2___width 1
820#define reg_iop_sw_mpu_r_intr_grp2___trigger_grp2___bit 9
821#define reg_iop_sw_mpu_r_intr_grp2___fifo_out_extra___lsb 10
822#define reg_iop_sw_mpu_r_intr_grp2___fifo_out_extra___width 1
823#define reg_iop_sw_mpu_r_intr_grp2___fifo_out_extra___bit 10
824#define reg_iop_sw_mpu_r_intr_grp2___dmc_out___lsb 11
825#define reg_iop_sw_mpu_r_intr_grp2___dmc_out___width 1
826#define reg_iop_sw_mpu_r_intr_grp2___dmc_out___bit 11
827#define reg_iop_sw_mpu_r_intr_grp2___spu_intr11___lsb 12
828#define reg_iop_sw_mpu_r_intr_grp2___spu_intr11___width 1
829#define reg_iop_sw_mpu_r_intr_grp2___spu_intr11___bit 12
830#define reg_iop_sw_mpu_r_intr_grp2___trigger_grp3___lsb 13
831#define reg_iop_sw_mpu_r_intr_grp2___trigger_grp3___width 1
832#define reg_iop_sw_mpu_r_intr_grp2___trigger_grp3___bit 13
833#define reg_iop_sw_mpu_r_intr_grp2___fifo_in_extra___lsb 14
834#define reg_iop_sw_mpu_r_intr_grp2___fifo_in_extra___width 1
835#define reg_iop_sw_mpu_r_intr_grp2___fifo_in_extra___bit 14
836#define reg_iop_sw_mpu_r_intr_grp2___dmc_in___lsb 15
837#define reg_iop_sw_mpu_r_intr_grp2___dmc_in___width 1
838#define reg_iop_sw_mpu_r_intr_grp2___dmc_in___bit 15
839#define reg_iop_sw_mpu_r_intr_grp2_offset 124
840
841/* Register r_masked_intr_grp2, scope iop_sw_mpu, type r */
842#define reg_iop_sw_mpu_r_masked_intr_grp2___spu_intr8___lsb 0
843#define reg_iop_sw_mpu_r_masked_intr_grp2___spu_intr8___width 1
844#define reg_iop_sw_mpu_r_masked_intr_grp2___spu_intr8___bit 0
845#define reg_iop_sw_mpu_r_masked_intr_grp2___trigger_grp0___lsb 1
846#define reg_iop_sw_mpu_r_masked_intr_grp2___trigger_grp0___width 1
847#define reg_iop_sw_mpu_r_masked_intr_grp2___trigger_grp0___bit 1
848#define reg_iop_sw_mpu_r_masked_intr_grp2___timer_grp0___lsb 2
849#define reg_iop_sw_mpu_r_masked_intr_grp2___timer_grp0___width 1
850#define reg_iop_sw_mpu_r_masked_intr_grp2___timer_grp0___bit 2
851#define reg_iop_sw_mpu_r_masked_intr_grp2___fifo_out___lsb 3
852#define reg_iop_sw_mpu_r_masked_intr_grp2___fifo_out___width 1
853#define reg_iop_sw_mpu_r_masked_intr_grp2___fifo_out___bit 3
854#define reg_iop_sw_mpu_r_masked_intr_grp2___spu_intr9___lsb 4
855#define reg_iop_sw_mpu_r_masked_intr_grp2___spu_intr9___width 1
856#define reg_iop_sw_mpu_r_masked_intr_grp2___spu_intr9___bit 4
857#define reg_iop_sw_mpu_r_masked_intr_grp2___trigger_grp1___lsb 5
858#define reg_iop_sw_mpu_r_masked_intr_grp2___trigger_grp1___width 1
859#define reg_iop_sw_mpu_r_masked_intr_grp2___trigger_grp1___bit 5
860#define reg_iop_sw_mpu_r_masked_intr_grp2___timer_grp1___lsb 6
861#define reg_iop_sw_mpu_r_masked_intr_grp2___timer_grp1___width 1
862#define reg_iop_sw_mpu_r_masked_intr_grp2___timer_grp1___bit 6
863#define reg_iop_sw_mpu_r_masked_intr_grp2___fifo_in___lsb 7
864#define reg_iop_sw_mpu_r_masked_intr_grp2___fifo_in___width 1
865#define reg_iop_sw_mpu_r_masked_intr_grp2___fifo_in___bit 7
866#define reg_iop_sw_mpu_r_masked_intr_grp2___spu_intr10___lsb 8
867#define reg_iop_sw_mpu_r_masked_intr_grp2___spu_intr10___width 1
868#define reg_iop_sw_mpu_r_masked_intr_grp2___spu_intr10___bit 8
869#define reg_iop_sw_mpu_r_masked_intr_grp2___trigger_grp2___lsb 9
870#define reg_iop_sw_mpu_r_masked_intr_grp2___trigger_grp2___width 1
871#define reg_iop_sw_mpu_r_masked_intr_grp2___trigger_grp2___bit 9
872#define reg_iop_sw_mpu_r_masked_intr_grp2___fifo_out_extra___lsb 10
873#define reg_iop_sw_mpu_r_masked_intr_grp2___fifo_out_extra___width 1
874#define reg_iop_sw_mpu_r_masked_intr_grp2___fifo_out_extra___bit 10
875#define reg_iop_sw_mpu_r_masked_intr_grp2___dmc_out___lsb 11
876#define reg_iop_sw_mpu_r_masked_intr_grp2___dmc_out___width 1
877#define reg_iop_sw_mpu_r_masked_intr_grp2___dmc_out___bit 11
878#define reg_iop_sw_mpu_r_masked_intr_grp2___spu_intr11___lsb 12
879#define reg_iop_sw_mpu_r_masked_intr_grp2___spu_intr11___width 1
880#define reg_iop_sw_mpu_r_masked_intr_grp2___spu_intr11___bit 12
881#define reg_iop_sw_mpu_r_masked_intr_grp2___trigger_grp3___lsb 13
882#define reg_iop_sw_mpu_r_masked_intr_grp2___trigger_grp3___width 1
883#define reg_iop_sw_mpu_r_masked_intr_grp2___trigger_grp3___bit 13
884#define reg_iop_sw_mpu_r_masked_intr_grp2___fifo_in_extra___lsb 14
885#define reg_iop_sw_mpu_r_masked_intr_grp2___fifo_in_extra___width 1
886#define reg_iop_sw_mpu_r_masked_intr_grp2___fifo_in_extra___bit 14
887#define reg_iop_sw_mpu_r_masked_intr_grp2___dmc_in___lsb 15
888#define reg_iop_sw_mpu_r_masked_intr_grp2___dmc_in___width 1
889#define reg_iop_sw_mpu_r_masked_intr_grp2___dmc_in___bit 15
890#define reg_iop_sw_mpu_r_masked_intr_grp2_offset 128
891
892/* Register rw_intr_grp3_mask, scope iop_sw_mpu, type rw */
893#define reg_iop_sw_mpu_rw_intr_grp3_mask___spu_intr12___lsb 0
894#define reg_iop_sw_mpu_rw_intr_grp3_mask___spu_intr12___width 1
895#define reg_iop_sw_mpu_rw_intr_grp3_mask___spu_intr12___bit 0
896#define reg_iop_sw_mpu_rw_intr_grp3_mask___trigger_grp4___lsb 1
897#define reg_iop_sw_mpu_rw_intr_grp3_mask___trigger_grp4___width 1
898#define reg_iop_sw_mpu_rw_intr_grp3_mask___trigger_grp4___bit 1
899#define reg_iop_sw_mpu_rw_intr_grp3_mask___fifo_out_extra___lsb 2
900#define reg_iop_sw_mpu_rw_intr_grp3_mask___fifo_out_extra___width 1
901#define reg_iop_sw_mpu_rw_intr_grp3_mask___fifo_out_extra___bit 2
902#define reg_iop_sw_mpu_rw_intr_grp3_mask___dmc_out___lsb 3
903#define reg_iop_sw_mpu_rw_intr_grp3_mask___dmc_out___width 1
904#define reg_iop_sw_mpu_rw_intr_grp3_mask___dmc_out___bit 3
905#define reg_iop_sw_mpu_rw_intr_grp3_mask___spu_intr13___lsb 4
906#define reg_iop_sw_mpu_rw_intr_grp3_mask___spu_intr13___width 1
907#define reg_iop_sw_mpu_rw_intr_grp3_mask___spu_intr13___bit 4
908#define reg_iop_sw_mpu_rw_intr_grp3_mask___trigger_grp5___lsb 5
909#define reg_iop_sw_mpu_rw_intr_grp3_mask___trigger_grp5___width 1
910#define reg_iop_sw_mpu_rw_intr_grp3_mask___trigger_grp5___bit 5
911#define reg_iop_sw_mpu_rw_intr_grp3_mask___fifo_in_extra___lsb 6
912#define reg_iop_sw_mpu_rw_intr_grp3_mask___fifo_in_extra___width 1
913#define reg_iop_sw_mpu_rw_intr_grp3_mask___fifo_in_extra___bit 6
914#define reg_iop_sw_mpu_rw_intr_grp3_mask___dmc_in___lsb 7
915#define reg_iop_sw_mpu_rw_intr_grp3_mask___dmc_in___width 1
916#define reg_iop_sw_mpu_rw_intr_grp3_mask___dmc_in___bit 7
917#define reg_iop_sw_mpu_rw_intr_grp3_mask___spu_intr14___lsb 8
918#define reg_iop_sw_mpu_rw_intr_grp3_mask___spu_intr14___width 1
919#define reg_iop_sw_mpu_rw_intr_grp3_mask___spu_intr14___bit 8
920#define reg_iop_sw_mpu_rw_intr_grp3_mask___trigger_grp6___lsb 9
921#define reg_iop_sw_mpu_rw_intr_grp3_mask___trigger_grp6___width 1
922#define reg_iop_sw_mpu_rw_intr_grp3_mask___trigger_grp6___bit 9
923#define reg_iop_sw_mpu_rw_intr_grp3_mask___timer_grp0___lsb 10
924#define reg_iop_sw_mpu_rw_intr_grp3_mask___timer_grp0___width 1
925#define reg_iop_sw_mpu_rw_intr_grp3_mask___timer_grp0___bit 10
926#define reg_iop_sw_mpu_rw_intr_grp3_mask___fifo_out___lsb 11
927#define reg_iop_sw_mpu_rw_intr_grp3_mask___fifo_out___width 1
928#define reg_iop_sw_mpu_rw_intr_grp3_mask___fifo_out___bit 11
929#define reg_iop_sw_mpu_rw_intr_grp3_mask___spu_intr15___lsb 12
930#define reg_iop_sw_mpu_rw_intr_grp3_mask___spu_intr15___width 1
931#define reg_iop_sw_mpu_rw_intr_grp3_mask___spu_intr15___bit 12
932#define reg_iop_sw_mpu_rw_intr_grp3_mask___trigger_grp7___lsb 13
933#define reg_iop_sw_mpu_rw_intr_grp3_mask___trigger_grp7___width 1
934#define reg_iop_sw_mpu_rw_intr_grp3_mask___trigger_grp7___bit 13
935#define reg_iop_sw_mpu_rw_intr_grp3_mask___timer_grp1___lsb 14
936#define reg_iop_sw_mpu_rw_intr_grp3_mask___timer_grp1___width 1
937#define reg_iop_sw_mpu_rw_intr_grp3_mask___timer_grp1___bit 14
938#define reg_iop_sw_mpu_rw_intr_grp3_mask___fifo_in___lsb 15
939#define reg_iop_sw_mpu_rw_intr_grp3_mask___fifo_in___width 1
940#define reg_iop_sw_mpu_rw_intr_grp3_mask___fifo_in___bit 15
941#define reg_iop_sw_mpu_rw_intr_grp3_mask_offset 132
942
943/* Register rw_ack_intr_grp3, scope iop_sw_mpu, type rw */
944#define reg_iop_sw_mpu_rw_ack_intr_grp3___spu_intr12___lsb 0
945#define reg_iop_sw_mpu_rw_ack_intr_grp3___spu_intr12___width 1
946#define reg_iop_sw_mpu_rw_ack_intr_grp3___spu_intr12___bit 0
947#define reg_iop_sw_mpu_rw_ack_intr_grp3___spu_intr13___lsb 4
948#define reg_iop_sw_mpu_rw_ack_intr_grp3___spu_intr13___width 1
949#define reg_iop_sw_mpu_rw_ack_intr_grp3___spu_intr13___bit 4
950#define reg_iop_sw_mpu_rw_ack_intr_grp3___spu_intr14___lsb 8
951#define reg_iop_sw_mpu_rw_ack_intr_grp3___spu_intr14___width 1
952#define reg_iop_sw_mpu_rw_ack_intr_grp3___spu_intr14___bit 8
953#define reg_iop_sw_mpu_rw_ack_intr_grp3___spu_intr15___lsb 12
954#define reg_iop_sw_mpu_rw_ack_intr_grp3___spu_intr15___width 1
955#define reg_iop_sw_mpu_rw_ack_intr_grp3___spu_intr15___bit 12
956#define reg_iop_sw_mpu_rw_ack_intr_grp3_offset 136
957
958/* Register r_intr_grp3, scope iop_sw_mpu, type r */
959#define reg_iop_sw_mpu_r_intr_grp3___spu_intr12___lsb 0
960#define reg_iop_sw_mpu_r_intr_grp3___spu_intr12___width 1
961#define reg_iop_sw_mpu_r_intr_grp3___spu_intr12___bit 0
962#define reg_iop_sw_mpu_r_intr_grp3___trigger_grp4___lsb 1
963#define reg_iop_sw_mpu_r_intr_grp3___trigger_grp4___width 1
964#define reg_iop_sw_mpu_r_intr_grp3___trigger_grp4___bit 1
965#define reg_iop_sw_mpu_r_intr_grp3___fifo_out_extra___lsb 2
966#define reg_iop_sw_mpu_r_intr_grp3___fifo_out_extra___width 1
967#define reg_iop_sw_mpu_r_intr_grp3___fifo_out_extra___bit 2
968#define reg_iop_sw_mpu_r_intr_grp3___dmc_out___lsb 3
969#define reg_iop_sw_mpu_r_intr_grp3___dmc_out___width 1
970#define reg_iop_sw_mpu_r_intr_grp3___dmc_out___bit 3
971#define reg_iop_sw_mpu_r_intr_grp3___spu_intr13___lsb 4
972#define reg_iop_sw_mpu_r_intr_grp3___spu_intr13___width 1
973#define reg_iop_sw_mpu_r_intr_grp3___spu_intr13___bit 4
974#define reg_iop_sw_mpu_r_intr_grp3___trigger_grp5___lsb 5
975#define reg_iop_sw_mpu_r_intr_grp3___trigger_grp5___width 1
976#define reg_iop_sw_mpu_r_intr_grp3___trigger_grp5___bit 5
977#define reg_iop_sw_mpu_r_intr_grp3___fifo_in_extra___lsb 6
978#define reg_iop_sw_mpu_r_intr_grp3___fifo_in_extra___width 1
979#define reg_iop_sw_mpu_r_intr_grp3___fifo_in_extra___bit 6
980#define reg_iop_sw_mpu_r_intr_grp3___dmc_in___lsb 7
981#define reg_iop_sw_mpu_r_intr_grp3___dmc_in___width 1
982#define reg_iop_sw_mpu_r_intr_grp3___dmc_in___bit 7
983#define reg_iop_sw_mpu_r_intr_grp3___spu_intr14___lsb 8
984#define reg_iop_sw_mpu_r_intr_grp3___spu_intr14___width 1
985#define reg_iop_sw_mpu_r_intr_grp3___spu_intr14___bit 8
986#define reg_iop_sw_mpu_r_intr_grp3___trigger_grp6___lsb 9
987#define reg_iop_sw_mpu_r_intr_grp3___trigger_grp6___width 1
988#define reg_iop_sw_mpu_r_intr_grp3___trigger_grp6___bit 9
989#define reg_iop_sw_mpu_r_intr_grp3___timer_grp0___lsb 10
990#define reg_iop_sw_mpu_r_intr_grp3___timer_grp0___width 1
991#define reg_iop_sw_mpu_r_intr_grp3___timer_grp0___bit 10
992#define reg_iop_sw_mpu_r_intr_grp3___fifo_out___lsb 11
993#define reg_iop_sw_mpu_r_intr_grp3___fifo_out___width 1
994#define reg_iop_sw_mpu_r_intr_grp3___fifo_out___bit 11
995#define reg_iop_sw_mpu_r_intr_grp3___spu_intr15___lsb 12
996#define reg_iop_sw_mpu_r_intr_grp3___spu_intr15___width 1
997#define reg_iop_sw_mpu_r_intr_grp3___spu_intr15___bit 12
998#define reg_iop_sw_mpu_r_intr_grp3___trigger_grp7___lsb 13
999#define reg_iop_sw_mpu_r_intr_grp3___trigger_grp7___width 1
1000#define reg_iop_sw_mpu_r_intr_grp3___trigger_grp7___bit 13
1001#define reg_iop_sw_mpu_r_intr_grp3___timer_grp1___lsb 14
1002#define reg_iop_sw_mpu_r_intr_grp3___timer_grp1___width 1
1003#define reg_iop_sw_mpu_r_intr_grp3___timer_grp1___bit 14
1004#define reg_iop_sw_mpu_r_intr_grp3___fifo_in___lsb 15
1005#define reg_iop_sw_mpu_r_intr_grp3___fifo_in___width 1
1006#define reg_iop_sw_mpu_r_intr_grp3___fifo_in___bit 15
1007#define reg_iop_sw_mpu_r_intr_grp3_offset 140
1008
1009/* Register r_masked_intr_grp3, scope iop_sw_mpu, type r */
1010#define reg_iop_sw_mpu_r_masked_intr_grp3___spu_intr12___lsb 0
1011#define reg_iop_sw_mpu_r_masked_intr_grp3___spu_intr12___width 1
1012#define reg_iop_sw_mpu_r_masked_intr_grp3___spu_intr12___bit 0
1013#define reg_iop_sw_mpu_r_masked_intr_grp3___trigger_grp4___lsb 1
1014#define reg_iop_sw_mpu_r_masked_intr_grp3___trigger_grp4___width 1
1015#define reg_iop_sw_mpu_r_masked_intr_grp3___trigger_grp4___bit 1
1016#define reg_iop_sw_mpu_r_masked_intr_grp3___fifo_out_extra___lsb 2
1017#define reg_iop_sw_mpu_r_masked_intr_grp3___fifo_out_extra___width 1
1018#define reg_iop_sw_mpu_r_masked_intr_grp3___fifo_out_extra___bit 2
1019#define reg_iop_sw_mpu_r_masked_intr_grp3___dmc_out___lsb 3
1020#define reg_iop_sw_mpu_r_masked_intr_grp3___dmc_out___width 1
1021#define reg_iop_sw_mpu_r_masked_intr_grp3___dmc_out___bit 3
1022#define reg_iop_sw_mpu_r_masked_intr_grp3___spu_intr13___lsb 4
1023#define reg_iop_sw_mpu_r_masked_intr_grp3___spu_intr13___width 1
1024#define reg_iop_sw_mpu_r_masked_intr_grp3___spu_intr13___bit 4
1025#define reg_iop_sw_mpu_r_masked_intr_grp3___trigger_grp5___lsb 5
1026#define reg_iop_sw_mpu_r_masked_intr_grp3___trigger_grp5___width 1
1027#define reg_iop_sw_mpu_r_masked_intr_grp3___trigger_grp5___bit 5
1028#define reg_iop_sw_mpu_r_masked_intr_grp3___fifo_in_extra___lsb 6
1029#define reg_iop_sw_mpu_r_masked_intr_grp3___fifo_in_extra___width 1
1030#define reg_iop_sw_mpu_r_masked_intr_grp3___fifo_in_extra___bit 6
1031#define reg_iop_sw_mpu_r_masked_intr_grp3___dmc_in___lsb 7
1032#define reg_iop_sw_mpu_r_masked_intr_grp3___dmc_in___width 1
1033#define reg_iop_sw_mpu_r_masked_intr_grp3___dmc_in___bit 7
1034#define reg_iop_sw_mpu_r_masked_intr_grp3___spu_intr14___lsb 8
1035#define reg_iop_sw_mpu_r_masked_intr_grp3___spu_intr14___width 1
1036#define reg_iop_sw_mpu_r_masked_intr_grp3___spu_intr14___bit 8
1037#define reg_iop_sw_mpu_r_masked_intr_grp3___trigger_grp6___lsb 9
1038#define reg_iop_sw_mpu_r_masked_intr_grp3___trigger_grp6___width 1
1039#define reg_iop_sw_mpu_r_masked_intr_grp3___trigger_grp6___bit 9
1040#define reg_iop_sw_mpu_r_masked_intr_grp3___timer_grp0___lsb 10
1041#define reg_iop_sw_mpu_r_masked_intr_grp3___timer_grp0___width 1
1042#define reg_iop_sw_mpu_r_masked_intr_grp3___timer_grp0___bit 10
1043#define reg_iop_sw_mpu_r_masked_intr_grp3___fifo_out___lsb 11
1044#define reg_iop_sw_mpu_r_masked_intr_grp3___fifo_out___width 1
1045#define reg_iop_sw_mpu_r_masked_intr_grp3___fifo_out___bit 11
1046#define reg_iop_sw_mpu_r_masked_intr_grp3___spu_intr15___lsb 12
1047#define reg_iop_sw_mpu_r_masked_intr_grp3___spu_intr15___width 1
1048#define reg_iop_sw_mpu_r_masked_intr_grp3___spu_intr15___bit 12
1049#define reg_iop_sw_mpu_r_masked_intr_grp3___trigger_grp7___lsb 13
1050#define reg_iop_sw_mpu_r_masked_intr_grp3___trigger_grp7___width 1
1051#define reg_iop_sw_mpu_r_masked_intr_grp3___trigger_grp7___bit 13
1052#define reg_iop_sw_mpu_r_masked_intr_grp3___timer_grp1___lsb 14
1053#define reg_iop_sw_mpu_r_masked_intr_grp3___timer_grp1___width 1
1054#define reg_iop_sw_mpu_r_masked_intr_grp3___timer_grp1___bit 14
1055#define reg_iop_sw_mpu_r_masked_intr_grp3___fifo_in___lsb 15
1056#define reg_iop_sw_mpu_r_masked_intr_grp3___fifo_in___width 1
1057#define reg_iop_sw_mpu_r_masked_intr_grp3___fifo_in___bit 15
1058#define reg_iop_sw_mpu_r_masked_intr_grp3_offset 144
1059
1060
1061/* Constants */
1062#define regk_iop_sw_mpu_copy 0x00000000
1063#define regk_iop_sw_mpu_cpu 0x00000000
1064#define regk_iop_sw_mpu_mpu 0x00000001
1065#define regk_iop_sw_mpu_no 0x00000000
1066#define regk_iop_sw_mpu_nop 0x00000000
1067#define regk_iop_sw_mpu_rd 0x00000002
1068#define regk_iop_sw_mpu_reg_copy 0x00000001
1069#define regk_iop_sw_mpu_rw_bus_clr_mask_default 0x00000000
1070#define regk_iop_sw_mpu_rw_bus_oe_clr_mask_default 0x00000000
1071#define regk_iop_sw_mpu_rw_bus_oe_set_mask_default 0x00000000
1072#define regk_iop_sw_mpu_rw_bus_set_mask_default 0x00000000
1073#define regk_iop_sw_mpu_rw_gio_clr_mask_default 0x00000000
1074#define regk_iop_sw_mpu_rw_gio_oe_clr_mask_default 0x00000000
1075#define regk_iop_sw_mpu_rw_gio_oe_set_mask_default 0x00000000
1076#define regk_iop_sw_mpu_rw_gio_set_mask_default 0x00000000
1077#define regk_iop_sw_mpu_rw_intr_grp0_mask_default 0x00000000
1078#define regk_iop_sw_mpu_rw_intr_grp1_mask_default 0x00000000
1079#define regk_iop_sw_mpu_rw_intr_grp2_mask_default 0x00000000
1080#define regk_iop_sw_mpu_rw_intr_grp3_mask_default 0x00000000
1081#define regk_iop_sw_mpu_rw_sw_cfg_owner_default 0x00000000
1082#define regk_iop_sw_mpu_set 0x00000001
1083#define regk_iop_sw_mpu_spu 0x00000002
1084#define regk_iop_sw_mpu_wr 0x00000003
1085#define regk_iop_sw_mpu_yes 0x00000001
1086#endif /* __iop_sw_mpu_defs_asm_h */
diff --git a/include/asm-cris/arch-v32/mach-a3/hwregs/iop/asm/iop_sw_spu_defs_asm.h b/include/asm-cris/arch-v32/mach-a3/hwregs/iop/asm/iop_sw_spu_defs_asm.h
new file mode 100644
index 000000000000..67a745338087
--- /dev/null
+++ b/include/asm-cris/arch-v32/mach-a3/hwregs/iop/asm/iop_sw_spu_defs_asm.h
@@ -0,0 +1,523 @@
1#ifndef __iop_sw_spu_defs_asm_h
2#define __iop_sw_spu_defs_asm_h
3
4/*
5 * This file is autogenerated from
6 * file: iop_sw_spu.r
7 *
8 * by ../../../tools/rdesc/bin/rdes2c -asm -outfile iop_sw_spu_defs_asm.h iop_sw_spu.r
9 * Any changes here will be lost.
10 *
11 * -*- buffer-read-only: t -*-
12 */
13
14#ifndef REG_FIELD
15#define REG_FIELD( scope, reg, field, value ) \
16 REG_FIELD_X_( value, reg_##scope##_##reg##___##field##___lsb )
17#define REG_FIELD_X_( value, shift ) ((value) << shift)
18#endif
19
20#ifndef REG_STATE
21#define REG_STATE( scope, reg, field, symbolic_value ) \
22 REG_STATE_X_( regk_##scope##_##symbolic_value, reg_##scope##_##reg##___##field##___lsb )
23#define REG_STATE_X_( k, shift ) (k << shift)
24#endif
25
26#ifndef REG_MASK
27#define REG_MASK( scope, reg, field ) \
28 REG_MASK_X_( reg_##scope##_##reg##___##field##___width, reg_##scope##_##reg##___##field##___lsb )
29#define REG_MASK_X_( width, lsb ) (((1 << width)-1) << lsb)
30#endif
31
32#ifndef REG_LSB
33#define REG_LSB( scope, reg, field ) reg_##scope##_##reg##___##field##___lsb
34#endif
35
36#ifndef REG_BIT
37#define REG_BIT( scope, reg, field ) reg_##scope##_##reg##___##field##___bit
38#endif
39
40#ifndef REG_ADDR
41#define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset)
42#define REG_ADDR_X_( inst, offs ) ((inst) + offs)
43#endif
44
45#ifndef REG_ADDR_VECT
46#define REG_ADDR_VECT( scope, inst, reg, index ) \
47 REG_ADDR_VECT_X_(inst, reg_##scope##_##reg##_offset, index, \
48 STRIDE_##scope##_##reg )
49#define REG_ADDR_VECT_X_( inst, offs, index, stride ) \
50 ((inst) + offs + (index) * stride)
51#endif
52
53/* Register r_mpu_trace, scope iop_sw_spu, type r */
54#define reg_iop_sw_spu_r_mpu_trace_offset 0
55
56/* Register rw_mc_ctrl, scope iop_sw_spu, type rw */
57#define reg_iop_sw_spu_rw_mc_ctrl___keep_owner___lsb 0
58#define reg_iop_sw_spu_rw_mc_ctrl___keep_owner___width 1
59#define reg_iop_sw_spu_rw_mc_ctrl___keep_owner___bit 0
60#define reg_iop_sw_spu_rw_mc_ctrl___cmd___lsb 1
61#define reg_iop_sw_spu_rw_mc_ctrl___cmd___width 2
62#define reg_iop_sw_spu_rw_mc_ctrl___size___lsb 3
63#define reg_iop_sw_spu_rw_mc_ctrl___size___width 3
64#define reg_iop_sw_spu_rw_mc_ctrl___wr_spu_mem___lsb 6
65#define reg_iop_sw_spu_rw_mc_ctrl___wr_spu_mem___width 1
66#define reg_iop_sw_spu_rw_mc_ctrl___wr_spu_mem___bit 6
67#define reg_iop_sw_spu_rw_mc_ctrl_offset 4
68
69/* Register rw_mc_data, scope iop_sw_spu, type rw */
70#define reg_iop_sw_spu_rw_mc_data___val___lsb 0
71#define reg_iop_sw_spu_rw_mc_data___val___width 32
72#define reg_iop_sw_spu_rw_mc_data_offset 8
73
74/* Register rw_mc_addr, scope iop_sw_spu, type rw */
75#define reg_iop_sw_spu_rw_mc_addr_offset 12
76
77/* Register rs_mc_data, scope iop_sw_spu, type rs */
78#define reg_iop_sw_spu_rs_mc_data_offset 16
79
80/* Register r_mc_data, scope iop_sw_spu, type r */
81#define reg_iop_sw_spu_r_mc_data_offset 20
82
83/* Register r_mc_stat, scope iop_sw_spu, type r */
84#define reg_iop_sw_spu_r_mc_stat___busy_cpu___lsb 0
85#define reg_iop_sw_spu_r_mc_stat___busy_cpu___width 1
86#define reg_iop_sw_spu_r_mc_stat___busy_cpu___bit 0
87#define reg_iop_sw_spu_r_mc_stat___busy_mpu___lsb 1
88#define reg_iop_sw_spu_r_mc_stat___busy_mpu___width 1
89#define reg_iop_sw_spu_r_mc_stat___busy_mpu___bit 1
90#define reg_iop_sw_spu_r_mc_stat___busy_spu___lsb 2
91#define reg_iop_sw_spu_r_mc_stat___busy_spu___width 1
92#define reg_iop_sw_spu_r_mc_stat___busy_spu___bit 2
93#define reg_iop_sw_spu_r_mc_stat___owned_by_cpu___lsb 3
94#define reg_iop_sw_spu_r_mc_stat___owned_by_cpu___width 1
95#define reg_iop_sw_spu_r_mc_stat___owned_by_cpu___bit 3
96#define reg_iop_sw_spu_r_mc_stat___owned_by_mpu___lsb 4
97#define reg_iop_sw_spu_r_mc_stat___owned_by_mpu___width 1
98#define reg_iop_sw_spu_r_mc_stat___owned_by_mpu___bit 4
99#define reg_iop_sw_spu_r_mc_stat___owned_by_spu___lsb 5
100#define reg_iop_sw_spu_r_mc_stat___owned_by_spu___width 1
101#define reg_iop_sw_spu_r_mc_stat___owned_by_spu___bit 5
102#define reg_iop_sw_spu_r_mc_stat_offset 24
103
104/* Register rw_bus_clr_mask, scope iop_sw_spu, type rw */
105#define reg_iop_sw_spu_rw_bus_clr_mask___byte0___lsb 0
106#define reg_iop_sw_spu_rw_bus_clr_mask___byte0___width 8
107#define reg_iop_sw_spu_rw_bus_clr_mask___byte1___lsb 8
108#define reg_iop_sw_spu_rw_bus_clr_mask___byte1___width 8
109#define reg_iop_sw_spu_rw_bus_clr_mask___byte2___lsb 16
110#define reg_iop_sw_spu_rw_bus_clr_mask___byte2___width 8
111#define reg_iop_sw_spu_rw_bus_clr_mask___byte3___lsb 24
112#define reg_iop_sw_spu_rw_bus_clr_mask___byte3___width 8
113#define reg_iop_sw_spu_rw_bus_clr_mask_offset 28
114
115/* Register rw_bus_set_mask, scope iop_sw_spu, type rw */
116#define reg_iop_sw_spu_rw_bus_set_mask___byte0___lsb 0
117#define reg_iop_sw_spu_rw_bus_set_mask___byte0___width 8
118#define reg_iop_sw_spu_rw_bus_set_mask___byte1___lsb 8
119#define reg_iop_sw_spu_rw_bus_set_mask___byte1___width 8
120#define reg_iop_sw_spu_rw_bus_set_mask___byte2___lsb 16
121#define reg_iop_sw_spu_rw_bus_set_mask___byte2___width 8
122#define reg_iop_sw_spu_rw_bus_set_mask___byte3___lsb 24
123#define reg_iop_sw_spu_rw_bus_set_mask___byte3___width 8
124#define reg_iop_sw_spu_rw_bus_set_mask_offset 32
125
126/* Register rw_bus_oe_clr_mask, scope iop_sw_spu, type rw */
127#define reg_iop_sw_spu_rw_bus_oe_clr_mask___byte0___lsb 0
128#define reg_iop_sw_spu_rw_bus_oe_clr_mask___byte0___width 1
129#define reg_iop_sw_spu_rw_bus_oe_clr_mask___byte0___bit 0
130#define reg_iop_sw_spu_rw_bus_oe_clr_mask___byte1___lsb 1
131#define reg_iop_sw_spu_rw_bus_oe_clr_mask___byte1___width 1
132#define reg_iop_sw_spu_rw_bus_oe_clr_mask___byte1___bit 1
133#define reg_iop_sw_spu_rw_bus_oe_clr_mask___byte2___lsb 2
134#define reg_iop_sw_spu_rw_bus_oe_clr_mask___byte2___width 1
135#define reg_iop_sw_spu_rw_bus_oe_clr_mask___byte2___bit 2
136#define reg_iop_sw_spu_rw_bus_oe_clr_mask___byte3___lsb 3
137#define reg_iop_sw_spu_rw_bus_oe_clr_mask___byte3___width 1
138#define reg_iop_sw_spu_rw_bus_oe_clr_mask___byte3___bit 3
139#define reg_iop_sw_spu_rw_bus_oe_clr_mask_offset 36
140
141/* Register rw_bus_oe_set_mask, scope iop_sw_spu, type rw */
142#define reg_iop_sw_spu_rw_bus_oe_set_mask___byte0___lsb 0
143#define reg_iop_sw_spu_rw_bus_oe_set_mask___byte0___width 1
144#define reg_iop_sw_spu_rw_bus_oe_set_mask___byte0___bit 0
145#define reg_iop_sw_spu_rw_bus_oe_set_mask___byte1___lsb 1
146#define reg_iop_sw_spu_rw_bus_oe_set_mask___byte1___width 1
147#define reg_iop_sw_spu_rw_bus_oe_set_mask___byte1___bit 1
148#define reg_iop_sw_spu_rw_bus_oe_set_mask___byte2___lsb 2
149#define reg_iop_sw_spu_rw_bus_oe_set_mask___byte2___width 1
150#define reg_iop_sw_spu_rw_bus_oe_set_mask___byte2___bit 2
151#define reg_iop_sw_spu_rw_bus_oe_set_mask___byte3___lsb 3
152#define reg_iop_sw_spu_rw_bus_oe_set_mask___byte3___width 1
153#define reg_iop_sw_spu_rw_bus_oe_set_mask___byte3___bit 3
154#define reg_iop_sw_spu_rw_bus_oe_set_mask_offset 40
155
156/* Register r_bus_in, scope iop_sw_spu, type r */
157#define reg_iop_sw_spu_r_bus_in_offset 44
158
159/* Register rw_gio_clr_mask, scope iop_sw_spu, type rw */
160#define reg_iop_sw_spu_rw_gio_clr_mask___val___lsb 0
161#define reg_iop_sw_spu_rw_gio_clr_mask___val___width 32
162#define reg_iop_sw_spu_rw_gio_clr_mask_offset 48
163
164/* Register rw_gio_set_mask, scope iop_sw_spu, type rw */
165#define reg_iop_sw_spu_rw_gio_set_mask___val___lsb 0
166#define reg_iop_sw_spu_rw_gio_set_mask___val___width 32
167#define reg_iop_sw_spu_rw_gio_set_mask_offset 52
168
169/* Register rw_gio_oe_clr_mask, scope iop_sw_spu, type rw */
170#define reg_iop_sw_spu_rw_gio_oe_clr_mask___val___lsb 0
171#define reg_iop_sw_spu_rw_gio_oe_clr_mask___val___width 32
172#define reg_iop_sw_spu_rw_gio_oe_clr_mask_offset 56
173
174/* Register rw_gio_oe_set_mask, scope iop_sw_spu, type rw */
175#define reg_iop_sw_spu_rw_gio_oe_set_mask___val___lsb 0
176#define reg_iop_sw_spu_rw_gio_oe_set_mask___val___width 32
177#define reg_iop_sw_spu_rw_gio_oe_set_mask_offset 60
178
179/* Register r_gio_in, scope iop_sw_spu, type r */
180#define reg_iop_sw_spu_r_gio_in_offset 64
181
182/* Register rw_bus_clr_mask_lo, scope iop_sw_spu, type rw */
183#define reg_iop_sw_spu_rw_bus_clr_mask_lo___byte0___lsb 0
184#define reg_iop_sw_spu_rw_bus_clr_mask_lo___byte0___width 8
185#define reg_iop_sw_spu_rw_bus_clr_mask_lo___byte1___lsb 8
186#define reg_iop_sw_spu_rw_bus_clr_mask_lo___byte1___width 8
187#define reg_iop_sw_spu_rw_bus_clr_mask_lo_offset 68
188
189/* Register rw_bus_clr_mask_hi, scope iop_sw_spu, type rw */
190#define reg_iop_sw_spu_rw_bus_clr_mask_hi___byte2___lsb 0
191#define reg_iop_sw_spu_rw_bus_clr_mask_hi___byte2___width 8
192#define reg_iop_sw_spu_rw_bus_clr_mask_hi___byte3___lsb 8
193#define reg_iop_sw_spu_rw_bus_clr_mask_hi___byte3___width 8
194#define reg_iop_sw_spu_rw_bus_clr_mask_hi_offset 72
195
196/* Register rw_bus_set_mask_lo, scope iop_sw_spu, type rw */
197#define reg_iop_sw_spu_rw_bus_set_mask_lo___byte0___lsb 0
198#define reg_iop_sw_spu_rw_bus_set_mask_lo___byte0___width 8
199#define reg_iop_sw_spu_rw_bus_set_mask_lo___byte1___lsb 8
200#define reg_iop_sw_spu_rw_bus_set_mask_lo___byte1___width 8
201#define reg_iop_sw_spu_rw_bus_set_mask_lo_offset 76
202
203/* Register rw_bus_set_mask_hi, scope iop_sw_spu, type rw */
204#define reg_iop_sw_spu_rw_bus_set_mask_hi___byte2___lsb 0
205#define reg_iop_sw_spu_rw_bus_set_mask_hi___byte2___width 8
206#define reg_iop_sw_spu_rw_bus_set_mask_hi___byte3___lsb 8
207#define reg_iop_sw_spu_rw_bus_set_mask_hi___byte3___width 8
208#define reg_iop_sw_spu_rw_bus_set_mask_hi_offset 80
209
210/* Register rw_gio_clr_mask_lo, scope iop_sw_spu, type rw */
211#define reg_iop_sw_spu_rw_gio_clr_mask_lo___val___lsb 0
212#define reg_iop_sw_spu_rw_gio_clr_mask_lo___val___width 16
213#define reg_iop_sw_spu_rw_gio_clr_mask_lo_offset 84
214
215/* Register rw_gio_clr_mask_hi, scope iop_sw_spu, type rw */
216#define reg_iop_sw_spu_rw_gio_clr_mask_hi___val___lsb 0
217#define reg_iop_sw_spu_rw_gio_clr_mask_hi___val___width 16
218#define reg_iop_sw_spu_rw_gio_clr_mask_hi_offset 88
219
220/* Register rw_gio_set_mask_lo, scope iop_sw_spu, type rw */
221#define reg_iop_sw_spu_rw_gio_set_mask_lo___val___lsb 0
222#define reg_iop_sw_spu_rw_gio_set_mask_lo___val___width 16
223#define reg_iop_sw_spu_rw_gio_set_mask_lo_offset 92
224
225/* Register rw_gio_set_mask_hi, scope iop_sw_spu, type rw */
226#define reg_iop_sw_spu_rw_gio_set_mask_hi___val___lsb 0
227#define reg_iop_sw_spu_rw_gio_set_mask_hi___val___width 16
228#define reg_iop_sw_spu_rw_gio_set_mask_hi_offset 96
229
230/* Register rw_gio_oe_clr_mask_lo, scope iop_sw_spu, type rw */
231#define reg_iop_sw_spu_rw_gio_oe_clr_mask_lo___val___lsb 0
232#define reg_iop_sw_spu_rw_gio_oe_clr_mask_lo___val___width 16
233#define reg_iop_sw_spu_rw_gio_oe_clr_mask_lo_offset 100
234
235/* Register rw_gio_oe_clr_mask_hi, scope iop_sw_spu, type rw */
236#define reg_iop_sw_spu_rw_gio_oe_clr_mask_hi___val___lsb 0
237#define reg_iop_sw_spu_rw_gio_oe_clr_mask_hi___val___width 16
238#define reg_iop_sw_spu_rw_gio_oe_clr_mask_hi_offset 104
239
240/* Register rw_gio_oe_set_mask_lo, scope iop_sw_spu, type rw */
241#define reg_iop_sw_spu_rw_gio_oe_set_mask_lo___val___lsb 0
242#define reg_iop_sw_spu_rw_gio_oe_set_mask_lo___val___width 16
243#define reg_iop_sw_spu_rw_gio_oe_set_mask_lo_offset 108
244
245/* Register rw_gio_oe_set_mask_hi, scope iop_sw_spu, type rw */
246#define reg_iop_sw_spu_rw_gio_oe_set_mask_hi___val___lsb 0
247#define reg_iop_sw_spu_rw_gio_oe_set_mask_hi___val___width 16
248#define reg_iop_sw_spu_rw_gio_oe_set_mask_hi_offset 112
249
250/* Register rw_cpu_intr, scope iop_sw_spu, type rw */
251#define reg_iop_sw_spu_rw_cpu_intr___intr0___lsb 0
252#define reg_iop_sw_spu_rw_cpu_intr___intr0___width 1
253#define reg_iop_sw_spu_rw_cpu_intr___intr0___bit 0
254#define reg_iop_sw_spu_rw_cpu_intr___intr1___lsb 1
255#define reg_iop_sw_spu_rw_cpu_intr___intr1___width 1
256#define reg_iop_sw_spu_rw_cpu_intr___intr1___bit 1
257#define reg_iop_sw_spu_rw_cpu_intr___intr2___lsb 2
258#define reg_iop_sw_spu_rw_cpu_intr___intr2___width 1
259#define reg_iop_sw_spu_rw_cpu_intr___intr2___bit 2
260#define reg_iop_sw_spu_rw_cpu_intr___intr3___lsb 3
261#define reg_iop_sw_spu_rw_cpu_intr___intr3___width 1
262#define reg_iop_sw_spu_rw_cpu_intr___intr3___bit 3
263#define reg_iop_sw_spu_rw_cpu_intr___intr4___lsb 4
264#define reg_iop_sw_spu_rw_cpu_intr___intr4___width 1
265#define reg_iop_sw_spu_rw_cpu_intr___intr4___bit 4
266#define reg_iop_sw_spu_rw_cpu_intr___intr5___lsb 5
267#define reg_iop_sw_spu_rw_cpu_intr___intr5___width 1
268#define reg_iop_sw_spu_rw_cpu_intr___intr5___bit 5
269#define reg_iop_sw_spu_rw_cpu_intr___intr6___lsb 6
270#define reg_iop_sw_spu_rw_cpu_intr___intr6___width 1
271#define reg_iop_sw_spu_rw_cpu_intr___intr6___bit 6
272#define reg_iop_sw_spu_rw_cpu_intr___intr7___lsb 7
273#define reg_iop_sw_spu_rw_cpu_intr___intr7___width 1
274#define reg_iop_sw_spu_rw_cpu_intr___intr7___bit 7
275#define reg_iop_sw_spu_rw_cpu_intr___intr8___lsb 8
276#define reg_iop_sw_spu_rw_cpu_intr___intr8___width 1
277#define reg_iop_sw_spu_rw_cpu_intr___intr8___bit 8
278#define reg_iop_sw_spu_rw_cpu_intr___intr9___lsb 9
279#define reg_iop_sw_spu_rw_cpu_intr___intr9___width 1
280#define reg_iop_sw_spu_rw_cpu_intr___intr9___bit 9
281#define reg_iop_sw_spu_rw_cpu_intr___intr10___lsb 10
282#define reg_iop_sw_spu_rw_cpu_intr___intr10___width 1
283#define reg_iop_sw_spu_rw_cpu_intr___intr10___bit 10
284#define reg_iop_sw_spu_rw_cpu_intr___intr11___lsb 11
285#define reg_iop_sw_spu_rw_cpu_intr___intr11___width 1
286#define reg_iop_sw_spu_rw_cpu_intr___intr11___bit 11
287#define reg_iop_sw_spu_rw_cpu_intr___intr12___lsb 12
288#define reg_iop_sw_spu_rw_cpu_intr___intr12___width 1
289#define reg_iop_sw_spu_rw_cpu_intr___intr12___bit 12
290#define reg_iop_sw_spu_rw_cpu_intr___intr13___lsb 13
291#define reg_iop_sw_spu_rw_cpu_intr___intr13___width 1
292#define reg_iop_sw_spu_rw_cpu_intr___intr13___bit 13
293#define reg_iop_sw_spu_rw_cpu_intr___intr14___lsb 14
294#define reg_iop_sw_spu_rw_cpu_intr___intr14___width 1
295#define reg_iop_sw_spu_rw_cpu_intr___intr14___bit 14
296#define reg_iop_sw_spu_rw_cpu_intr___intr15___lsb 15
297#define reg_iop_sw_spu_rw_cpu_intr___intr15___width 1
298#define reg_iop_sw_spu_rw_cpu_intr___intr15___bit 15
299#define reg_iop_sw_spu_rw_cpu_intr_offset 116
300
301/* Register r_cpu_intr, scope iop_sw_spu, type r */
302#define reg_iop_sw_spu_r_cpu_intr___intr0___lsb 0
303#define reg_iop_sw_spu_r_cpu_intr___intr0___width 1
304#define reg_iop_sw_spu_r_cpu_intr___intr0___bit 0
305#define reg_iop_sw_spu_r_cpu_intr___intr1___lsb 1
306#define reg_iop_sw_spu_r_cpu_intr___intr1___width 1
307#define reg_iop_sw_spu_r_cpu_intr___intr1___bit 1
308#define reg_iop_sw_spu_r_cpu_intr___intr2___lsb 2
309#define reg_iop_sw_spu_r_cpu_intr___intr2___width 1
310#define reg_iop_sw_spu_r_cpu_intr___intr2___bit 2
311#define reg_iop_sw_spu_r_cpu_intr___intr3___lsb 3
312#define reg_iop_sw_spu_r_cpu_intr___intr3___width 1
313#define reg_iop_sw_spu_r_cpu_intr___intr3___bit 3
314#define reg_iop_sw_spu_r_cpu_intr___intr4___lsb 4
315#define reg_iop_sw_spu_r_cpu_intr___intr4___width 1
316#define reg_iop_sw_spu_r_cpu_intr___intr4___bit 4
317#define reg_iop_sw_spu_r_cpu_intr___intr5___lsb 5
318#define reg_iop_sw_spu_r_cpu_intr___intr5___width 1
319#define reg_iop_sw_spu_r_cpu_intr___intr5___bit 5
320#define reg_iop_sw_spu_r_cpu_intr___intr6___lsb 6
321#define reg_iop_sw_spu_r_cpu_intr___intr6___width 1
322#define reg_iop_sw_spu_r_cpu_intr___intr6___bit 6
323#define reg_iop_sw_spu_r_cpu_intr___intr7___lsb 7
324#define reg_iop_sw_spu_r_cpu_intr___intr7___width 1
325#define reg_iop_sw_spu_r_cpu_intr___intr7___bit 7
326#define reg_iop_sw_spu_r_cpu_intr___intr8___lsb 8
327#define reg_iop_sw_spu_r_cpu_intr___intr8___width 1
328#define reg_iop_sw_spu_r_cpu_intr___intr8___bit 8
329#define reg_iop_sw_spu_r_cpu_intr___intr9___lsb 9
330#define reg_iop_sw_spu_r_cpu_intr___intr9___width 1
331#define reg_iop_sw_spu_r_cpu_intr___intr9___bit 9
332#define reg_iop_sw_spu_r_cpu_intr___intr10___lsb 10
333#define reg_iop_sw_spu_r_cpu_intr___intr10___width 1
334#define reg_iop_sw_spu_r_cpu_intr___intr10___bit 10
335#define reg_iop_sw_spu_r_cpu_intr___intr11___lsb 11
336#define reg_iop_sw_spu_r_cpu_intr___intr11___width 1
337#define reg_iop_sw_spu_r_cpu_intr___intr11___bit 11
338#define reg_iop_sw_spu_r_cpu_intr___intr12___lsb 12
339#define reg_iop_sw_spu_r_cpu_intr___intr12___width 1
340#define reg_iop_sw_spu_r_cpu_intr___intr12___bit 12
341#define reg_iop_sw_spu_r_cpu_intr___intr13___lsb 13
342#define reg_iop_sw_spu_r_cpu_intr___intr13___width 1
343#define reg_iop_sw_spu_r_cpu_intr___intr13___bit 13
344#define reg_iop_sw_spu_r_cpu_intr___intr14___lsb 14
345#define reg_iop_sw_spu_r_cpu_intr___intr14___width 1
346#define reg_iop_sw_spu_r_cpu_intr___intr14___bit 14
347#define reg_iop_sw_spu_r_cpu_intr___intr15___lsb 15
348#define reg_iop_sw_spu_r_cpu_intr___intr15___width 1
349#define reg_iop_sw_spu_r_cpu_intr___intr15___bit 15
350#define reg_iop_sw_spu_r_cpu_intr_offset 120
351
352/* Register r_hw_intr, scope iop_sw_spu, type r */
353#define reg_iop_sw_spu_r_hw_intr___trigger_grp0___lsb 0
354#define reg_iop_sw_spu_r_hw_intr___trigger_grp0___width 1
355#define reg_iop_sw_spu_r_hw_intr___trigger_grp0___bit 0
356#define reg_iop_sw_spu_r_hw_intr___trigger_grp1___lsb 1
357#define reg_iop_sw_spu_r_hw_intr___trigger_grp1___width 1
358#define reg_iop_sw_spu_r_hw_intr___trigger_grp1___bit 1
359#define reg_iop_sw_spu_r_hw_intr___trigger_grp2___lsb 2
360#define reg_iop_sw_spu_r_hw_intr___trigger_grp2___width 1
361#define reg_iop_sw_spu_r_hw_intr___trigger_grp2___bit 2
362#define reg_iop_sw_spu_r_hw_intr___trigger_grp3___lsb 3
363#define reg_iop_sw_spu_r_hw_intr___trigger_grp3___width 1
364#define reg_iop_sw_spu_r_hw_intr___trigger_grp3___bit 3
365#define reg_iop_sw_spu_r_hw_intr___trigger_grp4___lsb 4
366#define reg_iop_sw_spu_r_hw_intr___trigger_grp4___width 1
367#define reg_iop_sw_spu_r_hw_intr___trigger_grp4___bit 4
368#define reg_iop_sw_spu_r_hw_intr___trigger_grp5___lsb 5
369#define reg_iop_sw_spu_r_hw_intr___trigger_grp5___width 1
370#define reg_iop_sw_spu_r_hw_intr___trigger_grp5___bit 5
371#define reg_iop_sw_spu_r_hw_intr___trigger_grp6___lsb 6
372#define reg_iop_sw_spu_r_hw_intr___trigger_grp6___width 1
373#define reg_iop_sw_spu_r_hw_intr___trigger_grp6___bit 6
374#define reg_iop_sw_spu_r_hw_intr___trigger_grp7___lsb 7
375#define reg_iop_sw_spu_r_hw_intr___trigger_grp7___width 1
376#define reg_iop_sw_spu_r_hw_intr___trigger_grp7___bit 7
377#define reg_iop_sw_spu_r_hw_intr___timer_grp0___lsb 8
378#define reg_iop_sw_spu_r_hw_intr___timer_grp0___width 1
379#define reg_iop_sw_spu_r_hw_intr___timer_grp0___bit 8
380#define reg_iop_sw_spu_r_hw_intr___timer_grp1___lsb 9
381#define reg_iop_sw_spu_r_hw_intr___timer_grp1___width 1
382#define reg_iop_sw_spu_r_hw_intr___timer_grp1___bit 9
383#define reg_iop_sw_spu_r_hw_intr___fifo_out___lsb 10
384#define reg_iop_sw_spu_r_hw_intr___fifo_out___width 1
385#define reg_iop_sw_spu_r_hw_intr___fifo_out___bit 10
386#define reg_iop_sw_spu_r_hw_intr___fifo_out_extra___lsb 11
387#define reg_iop_sw_spu_r_hw_intr___fifo_out_extra___width 1
388#define reg_iop_sw_spu_r_hw_intr___fifo_out_extra___bit 11
389#define reg_iop_sw_spu_r_hw_intr___fifo_in___lsb 12
390#define reg_iop_sw_spu_r_hw_intr___fifo_in___width 1
391#define reg_iop_sw_spu_r_hw_intr___fifo_in___bit 12
392#define reg_iop_sw_spu_r_hw_intr___fifo_in_extra___lsb 13
393#define reg_iop_sw_spu_r_hw_intr___fifo_in_extra___width 1
394#define reg_iop_sw_spu_r_hw_intr___fifo_in_extra___bit 13
395#define reg_iop_sw_spu_r_hw_intr___dmc_out___lsb 14
396#define reg_iop_sw_spu_r_hw_intr___dmc_out___width 1
397#define reg_iop_sw_spu_r_hw_intr___dmc_out___bit 14
398#define reg_iop_sw_spu_r_hw_intr___dmc_in___lsb 15
399#define reg_iop_sw_spu_r_hw_intr___dmc_in___width 1
400#define reg_iop_sw_spu_r_hw_intr___dmc_in___bit 15
401#define reg_iop_sw_spu_r_hw_intr_offset 124
402
403/* Register rw_mpu_intr, scope iop_sw_spu, type rw */
404#define reg_iop_sw_spu_rw_mpu_intr___intr0___lsb 0
405#define reg_iop_sw_spu_rw_mpu_intr___intr0___width 1
406#define reg_iop_sw_spu_rw_mpu_intr___intr0___bit 0
407#define reg_iop_sw_spu_rw_mpu_intr___intr1___lsb 1
408#define reg_iop_sw_spu_rw_mpu_intr___intr1___width 1
409#define reg_iop_sw_spu_rw_mpu_intr___intr1___bit 1
410#define reg_iop_sw_spu_rw_mpu_intr___intr2___lsb 2
411#define reg_iop_sw_spu_rw_mpu_intr___intr2___width 1
412#define reg_iop_sw_spu_rw_mpu_intr___intr2___bit 2
413#define reg_iop_sw_spu_rw_mpu_intr___intr3___lsb 3
414#define reg_iop_sw_spu_rw_mpu_intr___intr3___width 1
415#define reg_iop_sw_spu_rw_mpu_intr___intr3___bit 3
416#define reg_iop_sw_spu_rw_mpu_intr___intr4___lsb 4
417#define reg_iop_sw_spu_rw_mpu_intr___intr4___width 1
418#define reg_iop_sw_spu_rw_mpu_intr___intr4___bit 4
419#define reg_iop_sw_spu_rw_mpu_intr___intr5___lsb 5
420#define reg_iop_sw_spu_rw_mpu_intr___intr5___width 1
421#define reg_iop_sw_spu_rw_mpu_intr___intr5___bit 5
422#define reg_iop_sw_spu_rw_mpu_intr___intr6___lsb 6
423#define reg_iop_sw_spu_rw_mpu_intr___intr6___width 1
424#define reg_iop_sw_spu_rw_mpu_intr___intr6___bit 6
425#define reg_iop_sw_spu_rw_mpu_intr___intr7___lsb 7
426#define reg_iop_sw_spu_rw_mpu_intr___intr7___width 1
427#define reg_iop_sw_spu_rw_mpu_intr___intr7___bit 7
428#define reg_iop_sw_spu_rw_mpu_intr___intr8___lsb 8
429#define reg_iop_sw_spu_rw_mpu_intr___intr8___width 1
430#define reg_iop_sw_spu_rw_mpu_intr___intr8___bit 8
431#define reg_iop_sw_spu_rw_mpu_intr___intr9___lsb 9
432#define reg_iop_sw_spu_rw_mpu_intr___intr9___width 1
433#define reg_iop_sw_spu_rw_mpu_intr___intr9___bit 9
434#define reg_iop_sw_spu_rw_mpu_intr___intr10___lsb 10
435#define reg_iop_sw_spu_rw_mpu_intr___intr10___width 1
436#define reg_iop_sw_spu_rw_mpu_intr___intr10___bit 10
437#define reg_iop_sw_spu_rw_mpu_intr___intr11___lsb 11
438#define reg_iop_sw_spu_rw_mpu_intr___intr11___width 1
439#define reg_iop_sw_spu_rw_mpu_intr___intr11___bit 11
440#define reg_iop_sw_spu_rw_mpu_intr___intr12___lsb 12
441#define reg_iop_sw_spu_rw_mpu_intr___intr12___width 1
442#define reg_iop_sw_spu_rw_mpu_intr___intr12___bit 12
443#define reg_iop_sw_spu_rw_mpu_intr___intr13___lsb 13
444#define reg_iop_sw_spu_rw_mpu_intr___intr13___width 1
445#define reg_iop_sw_spu_rw_mpu_intr___intr13___bit 13
446#define reg_iop_sw_spu_rw_mpu_intr___intr14___lsb 14
447#define reg_iop_sw_spu_rw_mpu_intr___intr14___width 1
448#define reg_iop_sw_spu_rw_mpu_intr___intr14___bit 14
449#define reg_iop_sw_spu_rw_mpu_intr___intr15___lsb 15
450#define reg_iop_sw_spu_rw_mpu_intr___intr15___width 1
451#define reg_iop_sw_spu_rw_mpu_intr___intr15___bit 15
452#define reg_iop_sw_spu_rw_mpu_intr_offset 128
453
454/* Register r_mpu_intr, scope iop_sw_spu, type r */
455#define reg_iop_sw_spu_r_mpu_intr___intr0___lsb 0
456#define reg_iop_sw_spu_r_mpu_intr___intr0___width 1
457#define reg_iop_sw_spu_r_mpu_intr___intr0___bit 0
458#define reg_iop_sw_spu_r_mpu_intr___intr1___lsb 1
459#define reg_iop_sw_spu_r_mpu_intr___intr1___width 1
460#define reg_iop_sw_spu_r_mpu_intr___intr1___bit 1
461#define reg_iop_sw_spu_r_mpu_intr___intr2___lsb 2
462#define reg_iop_sw_spu_r_mpu_intr___intr2___width 1
463#define reg_iop_sw_spu_r_mpu_intr___intr2___bit 2
464#define reg_iop_sw_spu_r_mpu_intr___intr3___lsb 3
465#define reg_iop_sw_spu_r_mpu_intr___intr3___width 1
466#define reg_iop_sw_spu_r_mpu_intr___intr3___bit 3
467#define reg_iop_sw_spu_r_mpu_intr___intr4___lsb 4
468#define reg_iop_sw_spu_r_mpu_intr___intr4___width 1
469#define reg_iop_sw_spu_r_mpu_intr___intr4___bit 4
470#define reg_iop_sw_spu_r_mpu_intr___intr5___lsb 5
471#define reg_iop_sw_spu_r_mpu_intr___intr5___width 1
472#define reg_iop_sw_spu_r_mpu_intr___intr5___bit 5
473#define reg_iop_sw_spu_r_mpu_intr___intr6___lsb 6
474#define reg_iop_sw_spu_r_mpu_intr___intr6___width 1
475#define reg_iop_sw_spu_r_mpu_intr___intr6___bit 6
476#define reg_iop_sw_spu_r_mpu_intr___intr7___lsb 7
477#define reg_iop_sw_spu_r_mpu_intr___intr7___width 1
478#define reg_iop_sw_spu_r_mpu_intr___intr7___bit 7
479#define reg_iop_sw_spu_r_mpu_intr___intr8___lsb 8
480#define reg_iop_sw_spu_r_mpu_intr___intr8___width 1
481#define reg_iop_sw_spu_r_mpu_intr___intr8___bit 8
482#define reg_iop_sw_spu_r_mpu_intr___intr9___lsb 9
483#define reg_iop_sw_spu_r_mpu_intr___intr9___width 1
484#define reg_iop_sw_spu_r_mpu_intr___intr9___bit 9
485#define reg_iop_sw_spu_r_mpu_intr___intr10___lsb 10
486#define reg_iop_sw_spu_r_mpu_intr___intr10___width 1
487#define reg_iop_sw_spu_r_mpu_intr___intr10___bit 10
488#define reg_iop_sw_spu_r_mpu_intr___intr11___lsb 11
489#define reg_iop_sw_spu_r_mpu_intr___intr11___width 1
490#define reg_iop_sw_spu_r_mpu_intr___intr11___bit 11
491#define reg_iop_sw_spu_r_mpu_intr___intr12___lsb 12
492#define reg_iop_sw_spu_r_mpu_intr___intr12___width 1
493#define reg_iop_sw_spu_r_mpu_intr___intr12___bit 12
494#define reg_iop_sw_spu_r_mpu_intr___intr13___lsb 13
495#define reg_iop_sw_spu_r_mpu_intr___intr13___width 1
496#define reg_iop_sw_spu_r_mpu_intr___intr13___bit 13
497#define reg_iop_sw_spu_r_mpu_intr___intr14___lsb 14
498#define reg_iop_sw_spu_r_mpu_intr___intr14___width 1
499#define reg_iop_sw_spu_r_mpu_intr___intr14___bit 14
500#define reg_iop_sw_spu_r_mpu_intr___intr15___lsb 15
501#define reg_iop_sw_spu_r_mpu_intr___intr15___width 1
502#define reg_iop_sw_spu_r_mpu_intr___intr15___bit 15
503#define reg_iop_sw_spu_r_mpu_intr_offset 132
504
505
506/* Constants */
507#define regk_iop_sw_spu_copy 0x00000000
508#define regk_iop_sw_spu_no 0x00000000
509#define regk_iop_sw_spu_nop 0x00000000
510#define regk_iop_sw_spu_rd 0x00000002
511#define regk_iop_sw_spu_reg_copy 0x00000001
512#define regk_iop_sw_spu_rw_bus_clr_mask_default 0x00000000
513#define regk_iop_sw_spu_rw_bus_oe_clr_mask_default 0x00000000
514#define regk_iop_sw_spu_rw_bus_oe_set_mask_default 0x00000000
515#define regk_iop_sw_spu_rw_bus_set_mask_default 0x00000000
516#define regk_iop_sw_spu_rw_gio_clr_mask_default 0x00000000
517#define regk_iop_sw_spu_rw_gio_oe_clr_mask_default 0x00000000
518#define regk_iop_sw_spu_rw_gio_oe_set_mask_default 0x00000000
519#define regk_iop_sw_spu_rw_gio_set_mask_default 0x00000000
520#define regk_iop_sw_spu_set 0x00000001
521#define regk_iop_sw_spu_wr 0x00000003
522#define regk_iop_sw_spu_yes 0x00000001
523#endif /* __iop_sw_spu_defs_asm_h */
diff --git a/include/asm-cris/arch-v32/mach-a3/hwregs/iop/asm/iop_version_defs_asm.h b/include/asm-cris/arch-v32/mach-a3/hwregs/iop/asm/iop_version_defs_asm.h
new file mode 100644
index 000000000000..4ad671202af0
--- /dev/null
+++ b/include/asm-cris/arch-v32/mach-a3/hwregs/iop/asm/iop_version_defs_asm.h
@@ -0,0 +1,61 @@
1#ifndef __iop_version_defs_asm_h
2#define __iop_version_defs_asm_h
3
4/*
5 * This file is autogenerated from
6 * file: iop_version.r
7 *
8 * by ../../../tools/rdesc/bin/rdes2c -asm -outfile iop_version_defs_asm.h iop_version.r
9 * Any changes here will be lost.
10 *
11 * -*- buffer-read-only: t -*-
12 */
13
14#ifndef REG_FIELD
15#define REG_FIELD( scope, reg, field, value ) \
16 REG_FIELD_X_( value, reg_##scope##_##reg##___##field##___lsb )
17#define REG_FIELD_X_( value, shift ) ((value) << shift)
18#endif
19
20#ifndef REG_STATE
21#define REG_STATE( scope, reg, field, symbolic_value ) \
22 REG_STATE_X_( regk_##scope##_##symbolic_value, reg_##scope##_##reg##___##field##___lsb )
23#define REG_STATE_X_( k, shift ) (k << shift)
24#endif
25
26#ifndef REG_MASK
27#define REG_MASK( scope, reg, field ) \
28 REG_MASK_X_( reg_##scope##_##reg##___##field##___width, reg_##scope##_##reg##___##field##___lsb )
29#define REG_MASK_X_( width, lsb ) (((1 << width)-1) << lsb)
30#endif
31
32#ifndef REG_LSB
33#define REG_LSB( scope, reg, field ) reg_##scope##_##reg##___##field##___lsb
34#endif
35
36#ifndef REG_BIT
37#define REG_BIT( scope, reg, field ) reg_##scope##_##reg##___##field##___bit
38#endif
39
40#ifndef REG_ADDR
41#define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset)
42#define REG_ADDR_X_( inst, offs ) ((inst) + offs)
43#endif
44
45#ifndef REG_ADDR_VECT
46#define REG_ADDR_VECT( scope, inst, reg, index ) \
47 REG_ADDR_VECT_X_(inst, reg_##scope##_##reg##_offset, index, \
48 STRIDE_##scope##_##reg )
49#define REG_ADDR_VECT_X_( inst, offs, index, stride ) \
50 ((inst) + offs + (index) * stride)
51#endif
52
53/* Register r_version, scope iop_version, type r */
54#define reg_iop_version_r_version___nr___lsb 0
55#define reg_iop_version_r_version___nr___width 8
56#define reg_iop_version_r_version_offset 0
57
58
59/* Constants */
60#define regk_iop_version_v2_0 0x00000002
61#endif /* __iop_version_defs_asm_h */
diff --git a/include/asm-cris/arch-v32/mach-a3/hwregs/iop/iop_reg_space.h b/include/asm-cris/arch-v32/mach-a3/hwregs/iop/iop_reg_space.h
new file mode 100644
index 000000000000..af3196c60a46
--- /dev/null
+++ b/include/asm-cris/arch-v32/mach-a3/hwregs/iop/iop_reg_space.h
@@ -0,0 +1,31 @@
1/* Autogenerated Changes here will be lost!
2 * generated by ./gen_sw.pl Wed Feb 14 09:27:48 2007 iop_sw.cfg
3 */
4#define regi_iop_version (regi_iop + 0)
5#define regi_iop_fifo_in_extra (regi_iop + 64)
6#define regi_iop_fifo_out_extra (regi_iop + 128)
7#define regi_iop_trigger_grp0 (regi_iop + 192)
8#define regi_iop_trigger_grp1 (regi_iop + 256)
9#define regi_iop_trigger_grp2 (regi_iop + 320)
10#define regi_iop_trigger_grp3 (regi_iop + 384)
11#define regi_iop_trigger_grp4 (regi_iop + 448)
12#define regi_iop_trigger_grp5 (regi_iop + 512)
13#define regi_iop_trigger_grp6 (regi_iop + 576)
14#define regi_iop_trigger_grp7 (regi_iop + 640)
15#define regi_iop_crc_par (regi_iop + 768)
16#define regi_iop_dmc_in (regi_iop + 896)
17#define regi_iop_dmc_out (regi_iop + 1024)
18#define regi_iop_fifo_in (regi_iop + 1152)
19#define regi_iop_fifo_out (regi_iop + 1280)
20#define regi_iop_scrc_in (regi_iop + 1408)
21#define regi_iop_scrc_out (regi_iop + 1536)
22#define regi_iop_timer_grp0 (regi_iop + 1664)
23#define regi_iop_timer_grp1 (regi_iop + 1792)
24#define regi_iop_sap_in (regi_iop + 2048)
25#define regi_iop_sap_out (regi_iop + 2304)
26#define regi_iop_spu (regi_iop + 2560)
27#define regi_iop_sw_cfg (regi_iop + 2816)
28#define regi_iop_sw_cpu (regi_iop + 3072)
29#define regi_iop_sw_mpu (regi_iop + 3328)
30#define regi_iop_sw_spu (regi_iop + 3584)
31#define regi_iop_mpu (regi_iop + 4096)
diff --git a/include/asm-cris/arch-v32/mach-a3/hwregs/iop/iop_sap_in_defs.h b/include/asm-cris/arch-v32/mach-a3/hwregs/iop/iop_sap_in_defs.h
new file mode 100644
index 000000000000..51dde016c03a
--- /dev/null
+++ b/include/asm-cris/arch-v32/mach-a3/hwregs/iop/iop_sap_in_defs.h
@@ -0,0 +1,141 @@
1#ifndef __iop_sap_in_defs_h
2#define __iop_sap_in_defs_h
3
4/*
5 * This file is autogenerated from
6 * file: iop_sap_in.r
7 *
8 * by ../../../tools/rdesc/bin/rdes2c -outfile iop_sap_in_defs.h iop_sap_in.r
9 * Any changes here will be lost.
10 *
11 * -*- buffer-read-only: t -*-
12 */
13/* Main access macros */
14#ifndef REG_RD
15#define REG_RD( scope, inst, reg ) \
16 REG_READ( reg_##scope##_##reg, \
17 (inst) + REG_RD_ADDR_##scope##_##reg )
18#endif
19
20#ifndef REG_WR
21#define REG_WR( scope, inst, reg, val ) \
22 REG_WRITE( reg_##scope##_##reg, \
23 (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
24#endif
25
26#ifndef REG_RD_VECT
27#define REG_RD_VECT( scope, inst, reg, index ) \
28 REG_READ( reg_##scope##_##reg, \
29 (inst) + REG_RD_ADDR_##scope##_##reg + \
30 (index) * STRIDE_##scope##_##reg )
31#endif
32
33#ifndef REG_WR_VECT
34#define REG_WR_VECT( scope, inst, reg, index, val ) \
35 REG_WRITE( reg_##scope##_##reg, \
36 (inst) + REG_WR_ADDR_##scope##_##reg + \
37 (index) * STRIDE_##scope##_##reg, (val) )
38#endif
39
40#ifndef REG_RD_INT
41#define REG_RD_INT( scope, inst, reg ) \
42 REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg )
43#endif
44
45#ifndef REG_WR_INT
46#define REG_WR_INT( scope, inst, reg, val ) \
47 REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
48#endif
49
50#ifndef REG_RD_INT_VECT
51#define REG_RD_INT_VECT( scope, inst, reg, index ) \
52 REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg + \
53 (index) * STRIDE_##scope##_##reg )
54#endif
55
56#ifndef REG_WR_INT_VECT
57#define REG_WR_INT_VECT( scope, inst, reg, index, val ) \
58 REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg + \
59 (index) * STRIDE_##scope##_##reg, (val) )
60#endif
61
62#ifndef REG_TYPE_CONV
63#define REG_TYPE_CONV( type, orgtype, val ) \
64 ( { union { orgtype o; type n; } r; r.o = val; r.n; } )
65#endif
66
67#ifndef reg_page_size
68#define reg_page_size 8192
69#endif
70
71#ifndef REG_ADDR
72#define REG_ADDR( scope, inst, reg ) \
73 ( (inst) + REG_RD_ADDR_##scope##_##reg )
74#endif
75
76#ifndef REG_ADDR_VECT
77#define REG_ADDR_VECT( scope, inst, reg, index ) \
78 ( (inst) + REG_RD_ADDR_##scope##_##reg + \
79 (index) * STRIDE_##scope##_##reg )
80#endif
81
82/* C-code for register scope iop_sap_in */
83
84#define STRIDE_iop_sap_in_rw_bus_byte 4
85/* Register rw_bus_byte, scope iop_sap_in, type rw */
86typedef struct {
87 unsigned int sync_sel : 2;
88 unsigned int sync_ext_src : 3;
89 unsigned int sync_edge : 2;
90 unsigned int delay : 2;
91 unsigned int dummy1 : 23;
92} reg_iop_sap_in_rw_bus_byte;
93#define REG_RD_ADDR_iop_sap_in_rw_bus_byte 0
94#define REG_WR_ADDR_iop_sap_in_rw_bus_byte 0
95
96#define STRIDE_iop_sap_in_rw_gio 4
97/* Register rw_gio, scope iop_sap_in, type rw */
98typedef struct {
99 unsigned int sync_sel : 2;
100 unsigned int sync_ext_src : 3;
101 unsigned int sync_edge : 2;
102 unsigned int delay : 2;
103 unsigned int logic : 2;
104 unsigned int dummy1 : 21;
105} reg_iop_sap_in_rw_gio;
106#define REG_RD_ADDR_iop_sap_in_rw_gio 16
107#define REG_WR_ADDR_iop_sap_in_rw_gio 16
108
109
110/* Constants */
111enum {
112 regk_iop_sap_in_and = 0x00000002,
113 regk_iop_sap_in_ext_clk200 = 0x00000003,
114 regk_iop_sap_in_gio0 = 0x00000000,
115 regk_iop_sap_in_gio12 = 0x00000003,
116 regk_iop_sap_in_gio16 = 0x00000004,
117 regk_iop_sap_in_gio20 = 0x00000005,
118 regk_iop_sap_in_gio24 = 0x00000006,
119 regk_iop_sap_in_gio28 = 0x00000007,
120 regk_iop_sap_in_gio4 = 0x00000001,
121 regk_iop_sap_in_gio8 = 0x00000002,
122 regk_iop_sap_in_inv = 0x00000001,
123 regk_iop_sap_in_neg = 0x00000002,
124 regk_iop_sap_in_no = 0x00000000,
125 regk_iop_sap_in_no_del_ext_clk200 = 0x00000002,
126 regk_iop_sap_in_none = 0x00000000,
127 regk_iop_sap_in_one = 0x00000001,
128 regk_iop_sap_in_or = 0x00000003,
129 regk_iop_sap_in_pos = 0x00000001,
130 regk_iop_sap_in_pos_neg = 0x00000003,
131 regk_iop_sap_in_rw_bus_byte_default = 0x00000000,
132 regk_iop_sap_in_rw_bus_byte_size = 0x00000004,
133 regk_iop_sap_in_rw_gio_default = 0x00000000,
134 regk_iop_sap_in_rw_gio_size = 0x00000020,
135 regk_iop_sap_in_timer_grp0_tmr3 = 0x00000000,
136 regk_iop_sap_in_timer_grp1_tmr3 = 0x00000001,
137 regk_iop_sap_in_tmr_clk200 = 0x00000001,
138 regk_iop_sap_in_two = 0x00000002,
139 regk_iop_sap_in_two_clk200 = 0x00000000
140};
141#endif /* __iop_sap_in_defs_h */
diff --git a/include/asm-cris/arch-v32/mach-a3/hwregs/iop/iop_sap_out_defs.h b/include/asm-cris/arch-v32/mach-a3/hwregs/iop/iop_sap_out_defs.h
new file mode 100644
index 000000000000..5af88baa2ac1
--- /dev/null
+++ b/include/asm-cris/arch-v32/mach-a3/hwregs/iop/iop_sap_out_defs.h
@@ -0,0 +1,231 @@
1#ifndef __iop_sap_out_defs_h
2#define __iop_sap_out_defs_h
3
4/*
5 * This file is autogenerated from
6 * file: iop_sap_out.r
7 *
8 * by ../../../tools/rdesc/bin/rdes2c -outfile iop_sap_out_defs.h iop_sap_out.r
9 * Any changes here will be lost.
10 *
11 * -*- buffer-read-only: t -*-
12 */
13/* Main access macros */
14#ifndef REG_RD
15#define REG_RD( scope, inst, reg ) \
16 REG_READ( reg_##scope##_##reg, \
17 (inst) + REG_RD_ADDR_##scope##_##reg )
18#endif
19
20#ifndef REG_WR
21#define REG_WR( scope, inst, reg, val ) \
22 REG_WRITE( reg_##scope##_##reg, \
23 (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
24#endif
25
26#ifndef REG_RD_VECT
27#define REG_RD_VECT( scope, inst, reg, index ) \
28 REG_READ( reg_##scope##_##reg, \
29 (inst) + REG_RD_ADDR_##scope##_##reg + \
30 (index) * STRIDE_##scope##_##reg )
31#endif
32
33#ifndef REG_WR_VECT
34#define REG_WR_VECT( scope, inst, reg, index, val ) \
35 REG_WRITE( reg_##scope##_##reg, \
36 (inst) + REG_WR_ADDR_##scope##_##reg + \
37 (index) * STRIDE_##scope##_##reg, (val) )
38#endif
39
40#ifndef REG_RD_INT
41#define REG_RD_INT( scope, inst, reg ) \
42 REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg )
43#endif
44
45#ifndef REG_WR_INT
46#define REG_WR_INT( scope, inst, reg, val ) \
47 REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
48#endif
49
50#ifndef REG_RD_INT_VECT
51#define REG_RD_INT_VECT( scope, inst, reg, index ) \
52 REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg + \
53 (index) * STRIDE_##scope##_##reg )
54#endif
55
56#ifndef REG_WR_INT_VECT
57#define REG_WR_INT_VECT( scope, inst, reg, index, val ) \
58 REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg + \
59 (index) * STRIDE_##scope##_##reg, (val) )
60#endif
61
62#ifndef REG_TYPE_CONV
63#define REG_TYPE_CONV( type, orgtype, val ) \
64 ( { union { orgtype o; type n; } r; r.o = val; r.n; } )
65#endif
66
67#ifndef reg_page_size
68#define reg_page_size 8192
69#endif
70
71#ifndef REG_ADDR
72#define REG_ADDR( scope, inst, reg ) \
73 ( (inst) + REG_RD_ADDR_##scope##_##reg )
74#endif
75
76#ifndef REG_ADDR_VECT
77#define REG_ADDR_VECT( scope, inst, reg, index ) \
78 ( (inst) + REG_RD_ADDR_##scope##_##reg + \
79 (index) * STRIDE_##scope##_##reg )
80#endif
81
82/* C-code for register scope iop_sap_out */
83
84/* Register rw_gen_gated, scope iop_sap_out, type rw */
85typedef struct {
86 unsigned int clk0_src : 2;
87 unsigned int clk0_gate_src : 2;
88 unsigned int clk0_force_src : 3;
89 unsigned int clk1_src : 2;
90 unsigned int clk1_gate_src : 2;
91 unsigned int clk1_force_src : 3;
92 unsigned int dummy1 : 18;
93} reg_iop_sap_out_rw_gen_gated;
94#define REG_RD_ADDR_iop_sap_out_rw_gen_gated 0
95#define REG_WR_ADDR_iop_sap_out_rw_gen_gated 0
96
97/* Register rw_bus, scope iop_sap_out, type rw */
98typedef struct {
99 unsigned int byte0_clk_sel : 2;
100 unsigned int byte0_clk_ext : 2;
101 unsigned int byte0_gated_clk : 1;
102 unsigned int byte0_clk_inv : 1;
103 unsigned int byte0_delay : 1;
104 unsigned int byte1_clk_sel : 2;
105 unsigned int byte1_clk_ext : 2;
106 unsigned int byte1_gated_clk : 1;
107 unsigned int byte1_clk_inv : 1;
108 unsigned int byte1_delay : 1;
109 unsigned int byte2_clk_sel : 2;
110 unsigned int byte2_clk_ext : 2;
111 unsigned int byte2_gated_clk : 1;
112 unsigned int byte2_clk_inv : 1;
113 unsigned int byte2_delay : 1;
114 unsigned int byte3_clk_sel : 2;
115 unsigned int byte3_clk_ext : 2;
116 unsigned int byte3_gated_clk : 1;
117 unsigned int byte3_clk_inv : 1;
118 unsigned int byte3_delay : 1;
119 unsigned int dummy1 : 4;
120} reg_iop_sap_out_rw_bus;
121#define REG_RD_ADDR_iop_sap_out_rw_bus 4
122#define REG_WR_ADDR_iop_sap_out_rw_bus 4
123
124/* Register rw_bus_lo_oe, scope iop_sap_out, type rw */
125typedef struct {
126 unsigned int byte0_clk_sel : 2;
127 unsigned int byte0_clk_ext : 2;
128 unsigned int byte0_gated_clk : 1;
129 unsigned int byte0_clk_inv : 1;
130 unsigned int byte0_delay : 1;
131 unsigned int byte0_logic : 2;
132 unsigned int byte0_logic_src : 2;
133 unsigned int byte1_clk_sel : 2;
134 unsigned int byte1_clk_ext : 2;
135 unsigned int byte1_gated_clk : 1;
136 unsigned int byte1_clk_inv : 1;
137 unsigned int byte1_delay : 1;
138 unsigned int byte1_logic : 2;
139 unsigned int byte1_logic_src : 2;
140 unsigned int dummy1 : 10;
141} reg_iop_sap_out_rw_bus_lo_oe;
142#define REG_RD_ADDR_iop_sap_out_rw_bus_lo_oe 8
143#define REG_WR_ADDR_iop_sap_out_rw_bus_lo_oe 8
144
145/* Register rw_bus_hi_oe, scope iop_sap_out, type rw */
146typedef struct {
147 unsigned int byte2_clk_sel : 2;
148 unsigned int byte2_clk_ext : 2;
149 unsigned int byte2_gated_clk : 1;
150 unsigned int byte2_clk_inv : 1;
151 unsigned int byte2_delay : 1;
152 unsigned int byte2_logic : 2;
153 unsigned int byte2_logic_src : 2;
154 unsigned int byte3_clk_sel : 2;
155 unsigned int byte3_clk_ext : 2;
156 unsigned int byte3_gated_clk : 1;
157 unsigned int byte3_clk_inv : 1;
158 unsigned int byte3_delay : 1;
159 unsigned int byte3_logic : 2;
160 unsigned int byte3_logic_src : 2;
161 unsigned int dummy1 : 10;
162} reg_iop_sap_out_rw_bus_hi_oe;
163#define REG_RD_ADDR_iop_sap_out_rw_bus_hi_oe 12
164#define REG_WR_ADDR_iop_sap_out_rw_bus_hi_oe 12
165
166#define STRIDE_iop_sap_out_rw_gio 4
167/* Register rw_gio, scope iop_sap_out, type rw */
168typedef struct {
169 unsigned int out_clk_sel : 3;
170 unsigned int out_clk_ext : 2;
171 unsigned int out_gated_clk : 1;
172 unsigned int out_clk_inv : 1;
173 unsigned int out_delay : 1;
174 unsigned int out_logic : 2;
175 unsigned int out_logic_src : 2;
176 unsigned int oe_clk_sel : 3;
177 unsigned int oe_clk_ext : 2;
178 unsigned int oe_gated_clk : 1;
179 unsigned int oe_clk_inv : 1;
180 unsigned int oe_delay : 1;
181 unsigned int oe_logic : 2;
182 unsigned int oe_logic_src : 2;
183 unsigned int dummy1 : 8;
184} reg_iop_sap_out_rw_gio;
185#define REG_RD_ADDR_iop_sap_out_rw_gio 16
186#define REG_WR_ADDR_iop_sap_out_rw_gio 16
187
188
189/* Constants */
190enum {
191 regk_iop_sap_out_always = 0x00000001,
192 regk_iop_sap_out_and = 0x00000002,
193 regk_iop_sap_out_clk0 = 0x00000000,
194 regk_iop_sap_out_clk1 = 0x00000001,
195 regk_iop_sap_out_clk12 = 0x00000004,
196 regk_iop_sap_out_clk200 = 0x00000000,
197 regk_iop_sap_out_ext = 0x00000002,
198 regk_iop_sap_out_gated = 0x00000003,
199 regk_iop_sap_out_gio0 = 0x00000000,
200 regk_iop_sap_out_gio1 = 0x00000000,
201 regk_iop_sap_out_gio16 = 0x00000002,
202 regk_iop_sap_out_gio17 = 0x00000002,
203 regk_iop_sap_out_gio24 = 0x00000003,
204 regk_iop_sap_out_gio25 = 0x00000003,
205 regk_iop_sap_out_gio8 = 0x00000001,
206 regk_iop_sap_out_gio9 = 0x00000001,
207 regk_iop_sap_out_gio_out10 = 0x00000005,
208 regk_iop_sap_out_gio_out18 = 0x00000006,
209 regk_iop_sap_out_gio_out2 = 0x00000004,
210 regk_iop_sap_out_gio_out26 = 0x00000007,
211 regk_iop_sap_out_inv = 0x00000001,
212 regk_iop_sap_out_nand = 0x00000003,
213 regk_iop_sap_out_no = 0x00000000,
214 regk_iop_sap_out_none = 0x00000000,
215 regk_iop_sap_out_one = 0x00000001,
216 regk_iop_sap_out_rw_bus_default = 0x00000000,
217 regk_iop_sap_out_rw_bus_hi_oe_default = 0x00000000,
218 regk_iop_sap_out_rw_bus_lo_oe_default = 0x00000000,
219 regk_iop_sap_out_rw_gen_gated_default = 0x00000000,
220 regk_iop_sap_out_rw_gio_default = 0x00000000,
221 regk_iop_sap_out_rw_gio_size = 0x00000020,
222 regk_iop_sap_out_spu_gio6 = 0x00000002,
223 regk_iop_sap_out_spu_gio7 = 0x00000003,
224 regk_iop_sap_out_timer_grp0_tmr2 = 0x00000000,
225 regk_iop_sap_out_timer_grp0_tmr3 = 0x00000001,
226 regk_iop_sap_out_timer_grp1_tmr2 = 0x00000002,
227 regk_iop_sap_out_timer_grp1_tmr3 = 0x00000003,
228 regk_iop_sap_out_tmr200 = 0x00000001,
229 regk_iop_sap_out_yes = 0x00000001
230};
231#endif /* __iop_sap_out_defs_h */
diff --git a/include/asm-cris/arch-v32/mach-a3/hwregs/iop/iop_sw_cfg_defs.h b/include/asm-cris/arch-v32/mach-a3/hwregs/iop/iop_sw_cfg_defs.h
new file mode 100644
index 000000000000..98ac95275a1c
--- /dev/null
+++ b/include/asm-cris/arch-v32/mach-a3/hwregs/iop/iop_sw_cfg_defs.h
@@ -0,0 +1,725 @@
1#ifndef __iop_sw_cfg_defs_h
2#define __iop_sw_cfg_defs_h
3
4/*
5 * This file is autogenerated from
6 * file: iop_sw_cfg.r
7 *
8 * by ../../../tools/rdesc/bin/rdes2c -outfile iop_sw_cfg_defs.h iop_sw_cfg.r
9 * Any changes here will be lost.
10 *
11 * -*- buffer-read-only: t -*-
12 */
13/* Main access macros */
14#ifndef REG_RD
15#define REG_RD( scope, inst, reg ) \
16 REG_READ( reg_##scope##_##reg, \
17 (inst) + REG_RD_ADDR_##scope##_##reg )
18#endif
19
20#ifndef REG_WR
21#define REG_WR( scope, inst, reg, val ) \
22 REG_WRITE( reg_##scope##_##reg, \
23 (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
24#endif
25
26#ifndef REG_RD_VECT
27#define REG_RD_VECT( scope, inst, reg, index ) \
28 REG_READ( reg_##scope##_##reg, \
29 (inst) + REG_RD_ADDR_##scope##_##reg + \
30 (index) * STRIDE_##scope##_##reg )
31#endif
32
33#ifndef REG_WR_VECT
34#define REG_WR_VECT( scope, inst, reg, index, val ) \
35 REG_WRITE( reg_##scope##_##reg, \
36 (inst) + REG_WR_ADDR_##scope##_##reg + \
37 (index) * STRIDE_##scope##_##reg, (val) )
38#endif
39
40#ifndef REG_RD_INT
41#define REG_RD_INT( scope, inst, reg ) \
42 REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg )
43#endif
44
45#ifndef REG_WR_INT
46#define REG_WR_INT( scope, inst, reg, val ) \
47 REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
48#endif
49
50#ifndef REG_RD_INT_VECT
51#define REG_RD_INT_VECT( scope, inst, reg, index ) \
52 REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg + \
53 (index) * STRIDE_##scope##_##reg )
54#endif
55
56#ifndef REG_WR_INT_VECT
57#define REG_WR_INT_VECT( scope, inst, reg, index, val ) \
58 REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg + \
59 (index) * STRIDE_##scope##_##reg, (val) )
60#endif
61
62#ifndef REG_TYPE_CONV
63#define REG_TYPE_CONV( type, orgtype, val ) \
64 ( { union { orgtype o; type n; } r; r.o = val; r.n; } )
65#endif
66
67#ifndef reg_page_size
68#define reg_page_size 8192
69#endif
70
71#ifndef REG_ADDR
72#define REG_ADDR( scope, inst, reg ) \
73 ( (inst) + REG_RD_ADDR_##scope##_##reg )
74#endif
75
76#ifndef REG_ADDR_VECT
77#define REG_ADDR_VECT( scope, inst, reg, index ) \
78 ( (inst) + REG_RD_ADDR_##scope##_##reg + \
79 (index) * STRIDE_##scope##_##reg )
80#endif
81
82/* C-code for register scope iop_sw_cfg */
83
84/* Register rw_crc_par_owner, scope iop_sw_cfg, type rw */
85typedef struct {
86 unsigned int cfg : 2;
87 unsigned int dummy1 : 30;
88} reg_iop_sw_cfg_rw_crc_par_owner;
89#define REG_RD_ADDR_iop_sw_cfg_rw_crc_par_owner 0
90#define REG_WR_ADDR_iop_sw_cfg_rw_crc_par_owner 0
91
92/* Register rw_dmc_in_owner, scope iop_sw_cfg, type rw */
93typedef struct {
94 unsigned int cfg : 2;
95 unsigned int dummy1 : 30;
96} reg_iop_sw_cfg_rw_dmc_in_owner;
97#define REG_RD_ADDR_iop_sw_cfg_rw_dmc_in_owner 4
98#define REG_WR_ADDR_iop_sw_cfg_rw_dmc_in_owner 4
99
100/* Register rw_dmc_out_owner, scope iop_sw_cfg, type rw */
101typedef struct {
102 unsigned int cfg : 2;
103 unsigned int dummy1 : 30;
104} reg_iop_sw_cfg_rw_dmc_out_owner;
105#define REG_RD_ADDR_iop_sw_cfg_rw_dmc_out_owner 8
106#define REG_WR_ADDR_iop_sw_cfg_rw_dmc_out_owner 8
107
108/* Register rw_fifo_in_owner, scope iop_sw_cfg, type rw */
109typedef struct {
110 unsigned int cfg : 2;
111 unsigned int dummy1 : 30;
112} reg_iop_sw_cfg_rw_fifo_in_owner;
113#define REG_RD_ADDR_iop_sw_cfg_rw_fifo_in_owner 12
114#define REG_WR_ADDR_iop_sw_cfg_rw_fifo_in_owner 12
115
116/* Register rw_fifo_in_extra_owner, scope iop_sw_cfg, type rw */
117typedef struct {
118 unsigned int cfg : 2;
119 unsigned int dummy1 : 30;
120} reg_iop_sw_cfg_rw_fifo_in_extra_owner;
121#define REG_RD_ADDR_iop_sw_cfg_rw_fifo_in_extra_owner 16
122#define REG_WR_ADDR_iop_sw_cfg_rw_fifo_in_extra_owner 16
123
124/* Register rw_fifo_out_owner, scope iop_sw_cfg, type rw */
125typedef struct {
126 unsigned int cfg : 2;
127 unsigned int dummy1 : 30;
128} reg_iop_sw_cfg_rw_fifo_out_owner;
129#define REG_RD_ADDR_iop_sw_cfg_rw_fifo_out_owner 20
130#define REG_WR_ADDR_iop_sw_cfg_rw_fifo_out_owner 20
131
132/* Register rw_fifo_out_extra_owner, scope iop_sw_cfg, type rw */
133typedef struct {
134 unsigned int cfg : 2;
135 unsigned int dummy1 : 30;
136} reg_iop_sw_cfg_rw_fifo_out_extra_owner;
137#define REG_RD_ADDR_iop_sw_cfg_rw_fifo_out_extra_owner 24
138#define REG_WR_ADDR_iop_sw_cfg_rw_fifo_out_extra_owner 24
139
140/* Register rw_sap_in_owner, scope iop_sw_cfg, type rw */
141typedef struct {
142 unsigned int cfg : 2;
143 unsigned int dummy1 : 30;
144} reg_iop_sw_cfg_rw_sap_in_owner;
145#define REG_RD_ADDR_iop_sw_cfg_rw_sap_in_owner 28
146#define REG_WR_ADDR_iop_sw_cfg_rw_sap_in_owner 28
147
148/* Register rw_sap_out_owner, scope iop_sw_cfg, type rw */
149typedef struct {
150 unsigned int cfg : 2;
151 unsigned int dummy1 : 30;
152} reg_iop_sw_cfg_rw_sap_out_owner;
153#define REG_RD_ADDR_iop_sw_cfg_rw_sap_out_owner 32
154#define REG_WR_ADDR_iop_sw_cfg_rw_sap_out_owner 32
155
156/* Register rw_scrc_in_owner, scope iop_sw_cfg, type rw */
157typedef struct {
158 unsigned int cfg : 2;
159 unsigned int dummy1 : 30;
160} reg_iop_sw_cfg_rw_scrc_in_owner;
161#define REG_RD_ADDR_iop_sw_cfg_rw_scrc_in_owner 36
162#define REG_WR_ADDR_iop_sw_cfg_rw_scrc_in_owner 36
163
164/* Register rw_scrc_out_owner, scope iop_sw_cfg, type rw */
165typedef struct {
166 unsigned int cfg : 2;
167 unsigned int dummy1 : 30;
168} reg_iop_sw_cfg_rw_scrc_out_owner;
169#define REG_RD_ADDR_iop_sw_cfg_rw_scrc_out_owner 40
170#define REG_WR_ADDR_iop_sw_cfg_rw_scrc_out_owner 40
171
172/* Register rw_spu_owner, scope iop_sw_cfg, type rw */
173typedef struct {
174 unsigned int cfg : 1;
175 unsigned int dummy1 : 31;
176} reg_iop_sw_cfg_rw_spu_owner;
177#define REG_RD_ADDR_iop_sw_cfg_rw_spu_owner 44
178#define REG_WR_ADDR_iop_sw_cfg_rw_spu_owner 44
179
180/* Register rw_timer_grp0_owner, scope iop_sw_cfg, type rw */
181typedef struct {
182 unsigned int cfg : 2;
183 unsigned int dummy1 : 30;
184} reg_iop_sw_cfg_rw_timer_grp0_owner;
185#define REG_RD_ADDR_iop_sw_cfg_rw_timer_grp0_owner 48
186#define REG_WR_ADDR_iop_sw_cfg_rw_timer_grp0_owner 48
187
188/* Register rw_timer_grp1_owner, scope iop_sw_cfg, type rw */
189typedef struct {
190 unsigned int cfg : 2;
191 unsigned int dummy1 : 30;
192} reg_iop_sw_cfg_rw_timer_grp1_owner;
193#define REG_RD_ADDR_iop_sw_cfg_rw_timer_grp1_owner 52
194#define REG_WR_ADDR_iop_sw_cfg_rw_timer_grp1_owner 52
195
196/* Register rw_trigger_grp0_owner, scope iop_sw_cfg, type rw */
197typedef struct {
198 unsigned int cfg : 2;
199 unsigned int dummy1 : 30;
200} reg_iop_sw_cfg_rw_trigger_grp0_owner;
201#define REG_RD_ADDR_iop_sw_cfg_rw_trigger_grp0_owner 56
202#define REG_WR_ADDR_iop_sw_cfg_rw_trigger_grp0_owner 56
203
204/* Register rw_trigger_grp1_owner, scope iop_sw_cfg, type rw */
205typedef struct {
206 unsigned int cfg : 2;
207 unsigned int dummy1 : 30;
208} reg_iop_sw_cfg_rw_trigger_grp1_owner;
209#define REG_RD_ADDR_iop_sw_cfg_rw_trigger_grp1_owner 60
210#define REG_WR_ADDR_iop_sw_cfg_rw_trigger_grp1_owner 60
211
212/* Register rw_trigger_grp2_owner, scope iop_sw_cfg, type rw */
213typedef struct {
214 unsigned int cfg : 2;
215 unsigned int dummy1 : 30;
216} reg_iop_sw_cfg_rw_trigger_grp2_owner;
217#define REG_RD_ADDR_iop_sw_cfg_rw_trigger_grp2_owner 64
218#define REG_WR_ADDR_iop_sw_cfg_rw_trigger_grp2_owner 64
219
220/* Register rw_trigger_grp3_owner, scope iop_sw_cfg, type rw */
221typedef struct {
222 unsigned int cfg : 2;
223 unsigned int dummy1 : 30;
224} reg_iop_sw_cfg_rw_trigger_grp3_owner;
225#define REG_RD_ADDR_iop_sw_cfg_rw_trigger_grp3_owner 68
226#define REG_WR_ADDR_iop_sw_cfg_rw_trigger_grp3_owner 68
227
228/* Register rw_trigger_grp4_owner, scope iop_sw_cfg, type rw */
229typedef struct {
230 unsigned int cfg : 2;
231 unsigned int dummy1 : 30;
232} reg_iop_sw_cfg_rw_trigger_grp4_owner;
233#define REG_RD_ADDR_iop_sw_cfg_rw_trigger_grp4_owner 72
234#define REG_WR_ADDR_iop_sw_cfg_rw_trigger_grp4_owner 72
235
236/* Register rw_trigger_grp5_owner, scope iop_sw_cfg, type rw */
237typedef struct {
238 unsigned int cfg : 2;
239 unsigned int dummy1 : 30;
240} reg_iop_sw_cfg_rw_trigger_grp5_owner;
241#define REG_RD_ADDR_iop_sw_cfg_rw_trigger_grp5_owner 76
242#define REG_WR_ADDR_iop_sw_cfg_rw_trigger_grp5_owner 76
243
244/* Register rw_trigger_grp6_owner, scope iop_sw_cfg, type rw */
245typedef struct {
246 unsigned int cfg : 2;
247 unsigned int dummy1 : 30;
248} reg_iop_sw_cfg_rw_trigger_grp6_owner;
249#define REG_RD_ADDR_iop_sw_cfg_rw_trigger_grp6_owner 80
250#define REG_WR_ADDR_iop_sw_cfg_rw_trigger_grp6_owner 80
251
252/* Register rw_trigger_grp7_owner, scope iop_sw_cfg, type rw */
253typedef struct {
254 unsigned int cfg : 2;
255 unsigned int dummy1 : 30;
256} reg_iop_sw_cfg_rw_trigger_grp7_owner;
257#define REG_RD_ADDR_iop_sw_cfg_rw_trigger_grp7_owner 84
258#define REG_WR_ADDR_iop_sw_cfg_rw_trigger_grp7_owner 84
259
260/* Register rw_bus_mask, scope iop_sw_cfg, type rw */
261typedef struct {
262 unsigned int byte0 : 8;
263 unsigned int byte1 : 8;
264 unsigned int byte2 : 8;
265 unsigned int byte3 : 8;
266} reg_iop_sw_cfg_rw_bus_mask;
267#define REG_RD_ADDR_iop_sw_cfg_rw_bus_mask 88
268#define REG_WR_ADDR_iop_sw_cfg_rw_bus_mask 88
269
270/* Register rw_bus_oe_mask, scope iop_sw_cfg, type rw */
271typedef struct {
272 unsigned int byte0 : 1;
273 unsigned int byte1 : 1;
274 unsigned int byte2 : 1;
275 unsigned int byte3 : 1;
276 unsigned int dummy1 : 28;
277} reg_iop_sw_cfg_rw_bus_oe_mask;
278#define REG_RD_ADDR_iop_sw_cfg_rw_bus_oe_mask 92
279#define REG_WR_ADDR_iop_sw_cfg_rw_bus_oe_mask 92
280
281/* Register rw_gio_mask, scope iop_sw_cfg, type rw */
282typedef struct {
283 unsigned int val : 32;
284} reg_iop_sw_cfg_rw_gio_mask;
285#define REG_RD_ADDR_iop_sw_cfg_rw_gio_mask 96
286#define REG_WR_ADDR_iop_sw_cfg_rw_gio_mask 96
287
288/* Register rw_gio_oe_mask, scope iop_sw_cfg, type rw */
289typedef struct {
290 unsigned int val : 32;
291} reg_iop_sw_cfg_rw_gio_oe_mask;
292#define REG_RD_ADDR_iop_sw_cfg_rw_gio_oe_mask 100
293#define REG_WR_ADDR_iop_sw_cfg_rw_gio_oe_mask 100
294
295/* Register rw_pinmapping, scope iop_sw_cfg, type rw */
296typedef struct {
297 unsigned int bus_byte0 : 2;
298 unsigned int bus_byte1 : 2;
299 unsigned int bus_byte2 : 2;
300 unsigned int bus_byte3 : 2;
301 unsigned int gio3_0 : 2;
302 unsigned int gio7_4 : 2;
303 unsigned int gio11_8 : 2;
304 unsigned int gio15_12 : 2;
305 unsigned int gio19_16 : 2;
306 unsigned int gio23_20 : 2;
307 unsigned int gio27_24 : 2;
308 unsigned int gio31_28 : 2;
309 unsigned int dummy1 : 8;
310} reg_iop_sw_cfg_rw_pinmapping;
311#define REG_RD_ADDR_iop_sw_cfg_rw_pinmapping 104
312#define REG_WR_ADDR_iop_sw_cfg_rw_pinmapping 104
313
314/* Register rw_bus_out_cfg, scope iop_sw_cfg, type rw */
315typedef struct {
316 unsigned int bus_lo : 2;
317 unsigned int bus_hi : 2;
318 unsigned int bus_lo_oe : 2;
319 unsigned int bus_hi_oe : 2;
320 unsigned int dummy1 : 24;
321} reg_iop_sw_cfg_rw_bus_out_cfg;
322#define REG_RD_ADDR_iop_sw_cfg_rw_bus_out_cfg 108
323#define REG_WR_ADDR_iop_sw_cfg_rw_bus_out_cfg 108
324
325/* Register rw_gio_out_grp0_cfg, scope iop_sw_cfg, type rw */
326typedef struct {
327 unsigned int gio0 : 3;
328 unsigned int gio0_oe : 1;
329 unsigned int gio1 : 3;
330 unsigned int gio1_oe : 1;
331 unsigned int gio2 : 3;
332 unsigned int gio2_oe : 1;
333 unsigned int gio3 : 3;
334 unsigned int gio3_oe : 1;
335 unsigned int dummy1 : 16;
336} reg_iop_sw_cfg_rw_gio_out_grp0_cfg;
337#define REG_RD_ADDR_iop_sw_cfg_rw_gio_out_grp0_cfg 112
338#define REG_WR_ADDR_iop_sw_cfg_rw_gio_out_grp0_cfg 112
339
340/* Register rw_gio_out_grp1_cfg, scope iop_sw_cfg, type rw */
341typedef struct {
342 unsigned int gio4 : 3;
343 unsigned int gio4_oe : 1;
344 unsigned int gio5 : 3;
345 unsigned int gio5_oe : 1;
346 unsigned int gio6 : 3;
347 unsigned int gio6_oe : 1;
348 unsigned int gio7 : 3;
349 unsigned int gio7_oe : 1;
350 unsigned int dummy1 : 16;
351} reg_iop_sw_cfg_rw_gio_out_grp1_cfg;
352#define REG_RD_ADDR_iop_sw_cfg_rw_gio_out_grp1_cfg 116
353#define REG_WR_ADDR_iop_sw_cfg_rw_gio_out_grp1_cfg 116
354
355/* Register rw_gio_out_grp2_cfg, scope iop_sw_cfg, type rw */
356typedef struct {
357 unsigned int gio8 : 3;
358 unsigned int gio8_oe : 1;
359 unsigned int gio9 : 3;
360 unsigned int gio9_oe : 1;
361 unsigned int gio10 : 3;
362 unsigned int gio10_oe : 1;
363 unsigned int gio11 : 3;
364 unsigned int gio11_oe : 1;
365 unsigned int dummy1 : 16;
366} reg_iop_sw_cfg_rw_gio_out_grp2_cfg;
367#define REG_RD_ADDR_iop_sw_cfg_rw_gio_out_grp2_cfg 120
368#define REG_WR_ADDR_iop_sw_cfg_rw_gio_out_grp2_cfg 120
369
370/* Register rw_gio_out_grp3_cfg, scope iop_sw_cfg, type rw */
371typedef struct {
372 unsigned int gio12 : 3;
373 unsigned int gio12_oe : 1;
374 unsigned int gio13 : 3;
375 unsigned int gio13_oe : 1;
376 unsigned int gio14 : 3;
377 unsigned int gio14_oe : 1;
378 unsigned int gio15 : 3;
379 unsigned int gio15_oe : 1;
380 unsigned int dummy1 : 16;
381} reg_iop_sw_cfg_rw_gio_out_grp3_cfg;
382#define REG_RD_ADDR_iop_sw_cfg_rw_gio_out_grp3_cfg 124
383#define REG_WR_ADDR_iop_sw_cfg_rw_gio_out_grp3_cfg 124
384
385/* Register rw_gio_out_grp4_cfg, scope iop_sw_cfg, type rw */
386typedef struct {
387 unsigned int gio16 : 3;
388 unsigned int gio16_oe : 1;
389 unsigned int gio17 : 3;
390 unsigned int gio17_oe : 1;
391 unsigned int gio18 : 3;
392 unsigned int gio18_oe : 1;
393 unsigned int gio19 : 3;
394 unsigned int gio19_oe : 1;
395 unsigned int dummy1 : 16;
396} reg_iop_sw_cfg_rw_gio_out_grp4_cfg;
397#define REG_RD_ADDR_iop_sw_cfg_rw_gio_out_grp4_cfg 128
398#define REG_WR_ADDR_iop_sw_cfg_rw_gio_out_grp4_cfg 128
399
400/* Register rw_gio_out_grp5_cfg, scope iop_sw_cfg, type rw */
401typedef struct {
402 unsigned int gio20 : 3;
403 unsigned int gio20_oe : 1;
404 unsigned int gio21 : 3;
405 unsigned int gio21_oe : 1;
406 unsigned int gio22 : 3;
407 unsigned int gio22_oe : 1;
408 unsigned int gio23 : 3;
409 unsigned int gio23_oe : 1;
410 unsigned int dummy1 : 16;
411} reg_iop_sw_cfg_rw_gio_out_grp5_cfg;
412#define REG_RD_ADDR_iop_sw_cfg_rw_gio_out_grp5_cfg 132
413#define REG_WR_ADDR_iop_sw_cfg_rw_gio_out_grp5_cfg 132
414
415/* Register rw_gio_out_grp6_cfg, scope iop_sw_cfg, type rw */
416typedef struct {
417 unsigned int gio24 : 3;
418 unsigned int gio24_oe : 1;
419 unsigned int gio25 : 3;
420 unsigned int gio25_oe : 1;
421 unsigned int gio26 : 3;
422 unsigned int gio26_oe : 1;
423 unsigned int gio27 : 3;
424 unsigned int gio27_oe : 1;
425 unsigned int dummy1 : 16;
426} reg_iop_sw_cfg_rw_gio_out_grp6_cfg;
427#define REG_RD_ADDR_iop_sw_cfg_rw_gio_out_grp6_cfg 136
428#define REG_WR_ADDR_iop_sw_cfg_rw_gio_out_grp6_cfg 136
429
430/* Register rw_gio_out_grp7_cfg, scope iop_sw_cfg, type rw */
431typedef struct {
432 unsigned int gio28 : 3;
433 unsigned int gio28_oe : 1;
434 unsigned int gio29 : 3;
435 unsigned int gio29_oe : 1;
436 unsigned int gio30 : 3;
437 unsigned int gio30_oe : 1;
438 unsigned int gio31 : 3;
439 unsigned int gio31_oe : 1;
440 unsigned int dummy1 : 16;
441} reg_iop_sw_cfg_rw_gio_out_grp7_cfg;
442#define REG_RD_ADDR_iop_sw_cfg_rw_gio_out_grp7_cfg 140
443#define REG_WR_ADDR_iop_sw_cfg_rw_gio_out_grp7_cfg 140
444
445/* Register rw_spu_cfg, scope iop_sw_cfg, type rw */
446typedef struct {
447 unsigned int bus0_in : 1;
448 unsigned int bus1_in : 1;
449 unsigned int dummy1 : 30;
450} reg_iop_sw_cfg_rw_spu_cfg;
451#define REG_RD_ADDR_iop_sw_cfg_rw_spu_cfg 144
452#define REG_WR_ADDR_iop_sw_cfg_rw_spu_cfg 144
453
454/* Register rw_timer_grp0_cfg, scope iop_sw_cfg, type rw */
455typedef struct {
456 unsigned int ext_clk : 3;
457 unsigned int tmr0_en : 2;
458 unsigned int tmr1_en : 2;
459 unsigned int tmr2_en : 2;
460 unsigned int tmr3_en : 2;
461 unsigned int tmr0_dis : 2;
462 unsigned int tmr1_dis : 2;
463 unsigned int tmr2_dis : 2;
464 unsigned int tmr3_dis : 2;
465 unsigned int dummy1 : 13;
466} reg_iop_sw_cfg_rw_timer_grp0_cfg;
467#define REG_RD_ADDR_iop_sw_cfg_rw_timer_grp0_cfg 148
468#define REG_WR_ADDR_iop_sw_cfg_rw_timer_grp0_cfg 148
469
470/* Register rw_timer_grp1_cfg, scope iop_sw_cfg, type rw */
471typedef struct {
472 unsigned int ext_clk : 3;
473 unsigned int tmr0_en : 2;
474 unsigned int tmr1_en : 2;
475 unsigned int tmr2_en : 2;
476 unsigned int tmr3_en : 2;
477 unsigned int tmr0_dis : 2;
478 unsigned int tmr1_dis : 2;
479 unsigned int tmr2_dis : 2;
480 unsigned int tmr3_dis : 2;
481 unsigned int dummy1 : 13;
482} reg_iop_sw_cfg_rw_timer_grp1_cfg;
483#define REG_RD_ADDR_iop_sw_cfg_rw_timer_grp1_cfg 152
484#define REG_WR_ADDR_iop_sw_cfg_rw_timer_grp1_cfg 152
485
486/* Register rw_trigger_grps_cfg, scope iop_sw_cfg, type rw */
487typedef struct {
488 unsigned int grp0_dis : 1;
489 unsigned int grp0_en : 1;
490 unsigned int grp1_dis : 1;
491 unsigned int grp1_en : 1;
492 unsigned int grp2_dis : 1;
493 unsigned int grp2_en : 1;
494 unsigned int grp3_dis : 1;
495 unsigned int grp3_en : 1;
496 unsigned int grp4_dis : 1;
497 unsigned int grp4_en : 1;
498 unsigned int grp5_dis : 1;
499 unsigned int grp5_en : 1;
500 unsigned int grp6_dis : 1;
501 unsigned int grp6_en : 1;
502 unsigned int grp7_dis : 1;
503 unsigned int grp7_en : 1;
504 unsigned int dummy1 : 16;
505} reg_iop_sw_cfg_rw_trigger_grps_cfg;
506#define REG_RD_ADDR_iop_sw_cfg_rw_trigger_grps_cfg 156
507#define REG_WR_ADDR_iop_sw_cfg_rw_trigger_grps_cfg 156
508
509/* Register rw_pdp_cfg, scope iop_sw_cfg, type rw */
510typedef struct {
511 unsigned int out_strb : 4;
512 unsigned int in_src : 2;
513 unsigned int in_size : 3;
514 unsigned int in_last : 2;
515 unsigned int in_strb : 4;
516 unsigned int dummy1 : 17;
517} reg_iop_sw_cfg_rw_pdp_cfg;
518#define REG_RD_ADDR_iop_sw_cfg_rw_pdp_cfg 160
519#define REG_WR_ADDR_iop_sw_cfg_rw_pdp_cfg 160
520
521/* Register rw_sdp_cfg, scope iop_sw_cfg, type rw */
522typedef struct {
523 unsigned int sdp_out_strb : 3;
524 unsigned int sdp_in_data : 3;
525 unsigned int sdp_in_last : 2;
526 unsigned int sdp_in_strb : 3;
527 unsigned int dummy1 : 21;
528} reg_iop_sw_cfg_rw_sdp_cfg;
529#define REG_RD_ADDR_iop_sw_cfg_rw_sdp_cfg 164
530#define REG_WR_ADDR_iop_sw_cfg_rw_sdp_cfg 164
531
532
533/* Constants */
534enum {
535 regk_iop_sw_cfg_a = 0x00000001,
536 regk_iop_sw_cfg_b = 0x00000002,
537 regk_iop_sw_cfg_bus = 0x00000000,
538 regk_iop_sw_cfg_bus_rot16 = 0x00000002,
539 regk_iop_sw_cfg_bus_rot24 = 0x00000003,
540 regk_iop_sw_cfg_bus_rot8 = 0x00000001,
541 regk_iop_sw_cfg_clk12 = 0x00000000,
542 regk_iop_sw_cfg_cpu = 0x00000000,
543 regk_iop_sw_cfg_gated_clk0 = 0x0000000e,
544 regk_iop_sw_cfg_gated_clk1 = 0x0000000f,
545 regk_iop_sw_cfg_gio0 = 0x00000004,
546 regk_iop_sw_cfg_gio1 = 0x00000001,
547 regk_iop_sw_cfg_gio2 = 0x00000005,
548 regk_iop_sw_cfg_gio3 = 0x00000002,
549 regk_iop_sw_cfg_gio4 = 0x00000006,
550 regk_iop_sw_cfg_gio5 = 0x00000003,
551 regk_iop_sw_cfg_gio6 = 0x00000007,
552 regk_iop_sw_cfg_gio7 = 0x00000004,
553 regk_iop_sw_cfg_gio_in18 = 0x00000002,
554 regk_iop_sw_cfg_gio_in19 = 0x00000003,
555 regk_iop_sw_cfg_gio_in20 = 0x00000004,
556 regk_iop_sw_cfg_gio_in21 = 0x00000005,
557 regk_iop_sw_cfg_gio_in26 = 0x00000006,
558 regk_iop_sw_cfg_gio_in27 = 0x00000007,
559 regk_iop_sw_cfg_gio_in4 = 0x00000000,
560 regk_iop_sw_cfg_gio_in5 = 0x00000001,
561 regk_iop_sw_cfg_last_timer_grp0_tmr2 = 0x00000001,
562 regk_iop_sw_cfg_last_timer_grp1_tmr2 = 0x00000002,
563 regk_iop_sw_cfg_last_timer_grp1_tmr3 = 0x00000003,
564 regk_iop_sw_cfg_mpu = 0x00000001,
565 regk_iop_sw_cfg_none = 0x00000000,
566 regk_iop_sw_cfg_pdp_out = 0x00000001,
567 regk_iop_sw_cfg_pdp_out_hi = 0x00000001,
568 regk_iop_sw_cfg_pdp_out_lo = 0x00000000,
569 regk_iop_sw_cfg_rw_bus_mask_default = 0x00000000,
570 regk_iop_sw_cfg_rw_bus_oe_mask_default = 0x00000000,
571 regk_iop_sw_cfg_rw_bus_out_cfg_default = 0x00000000,
572 regk_iop_sw_cfg_rw_crc_par_owner_default = 0x00000000,
573 regk_iop_sw_cfg_rw_dmc_in_owner_default = 0x00000000,
574 regk_iop_sw_cfg_rw_dmc_out_owner_default = 0x00000000,
575 regk_iop_sw_cfg_rw_fifo_in_extra_owner_default = 0x00000000,
576 regk_iop_sw_cfg_rw_fifo_in_owner_default = 0x00000000,
577 regk_iop_sw_cfg_rw_fifo_out_extra_owner_default = 0x00000000,
578 regk_iop_sw_cfg_rw_fifo_out_owner_default = 0x00000000,
579 regk_iop_sw_cfg_rw_gio_mask_default = 0x00000000,
580 regk_iop_sw_cfg_rw_gio_oe_mask_default = 0x00000000,
581 regk_iop_sw_cfg_rw_gio_out_grp0_cfg_default = 0x00000000,
582 regk_iop_sw_cfg_rw_gio_out_grp1_cfg_default = 0x00000000,
583 regk_iop_sw_cfg_rw_gio_out_grp2_cfg_default = 0x00000000,
584 regk_iop_sw_cfg_rw_gio_out_grp3_cfg_default = 0x00000000,
585 regk_iop_sw_cfg_rw_gio_out_grp4_cfg_default = 0x00000000,
586 regk_iop_sw_cfg_rw_gio_out_grp5_cfg_default = 0x00000000,
587 regk_iop_sw_cfg_rw_gio_out_grp6_cfg_default = 0x00000000,
588 regk_iop_sw_cfg_rw_gio_out_grp7_cfg_default = 0x00000000,
589 regk_iop_sw_cfg_rw_pdp_cfg_default = 0x00000000,
590 regk_iop_sw_cfg_rw_pinmapping_default = 0x00555555,
591 regk_iop_sw_cfg_rw_sap_in_owner_default = 0x00000000,
592 regk_iop_sw_cfg_rw_sap_out_owner_default = 0x00000000,
593 regk_iop_sw_cfg_rw_scrc_in_owner_default = 0x00000000,
594 regk_iop_sw_cfg_rw_scrc_out_owner_default = 0x00000000,
595 regk_iop_sw_cfg_rw_sdp_cfg_default = 0x00000000,
596 regk_iop_sw_cfg_rw_spu_cfg_default = 0x00000000,
597 regk_iop_sw_cfg_rw_spu_owner_default = 0x00000000,
598 regk_iop_sw_cfg_rw_timer_grp0_cfg_default = 0x00000000,
599 regk_iop_sw_cfg_rw_timer_grp0_owner_default = 0x00000000,
600 regk_iop_sw_cfg_rw_timer_grp1_cfg_default = 0x00000000,
601 regk_iop_sw_cfg_rw_timer_grp1_owner_default = 0x00000000,
602 regk_iop_sw_cfg_rw_trigger_grp0_owner_default = 0x00000000,
603 regk_iop_sw_cfg_rw_trigger_grp1_owner_default = 0x00000000,
604 regk_iop_sw_cfg_rw_trigger_grp2_owner_default = 0x00000000,
605 regk_iop_sw_cfg_rw_trigger_grp3_owner_default = 0x00000000,
606 regk_iop_sw_cfg_rw_trigger_grp4_owner_default = 0x00000000,
607 regk_iop_sw_cfg_rw_trigger_grp5_owner_default = 0x00000000,
608 regk_iop_sw_cfg_rw_trigger_grp6_owner_default = 0x00000000,
609 regk_iop_sw_cfg_rw_trigger_grp7_owner_default = 0x00000000,
610 regk_iop_sw_cfg_rw_trigger_grps_cfg_default = 0x00000000,
611 regk_iop_sw_cfg_sdp_out = 0x00000004,
612 regk_iop_sw_cfg_size16 = 0x00000002,
613 regk_iop_sw_cfg_size24 = 0x00000003,
614 regk_iop_sw_cfg_size32 = 0x00000004,
615 regk_iop_sw_cfg_size8 = 0x00000001,
616 regk_iop_sw_cfg_spu = 0x00000002,
617 regk_iop_sw_cfg_spu_bus_out0_hi = 0x00000002,
618 regk_iop_sw_cfg_spu_bus_out0_lo = 0x00000002,
619 regk_iop_sw_cfg_spu_bus_out1_hi = 0x00000003,
620 regk_iop_sw_cfg_spu_bus_out1_lo = 0x00000003,
621 regk_iop_sw_cfg_spu_g0 = 0x00000007,
622 regk_iop_sw_cfg_spu_g1 = 0x00000007,
623 regk_iop_sw_cfg_spu_g2 = 0x00000007,
624 regk_iop_sw_cfg_spu_g3 = 0x00000007,
625 regk_iop_sw_cfg_spu_g4 = 0x00000007,
626 regk_iop_sw_cfg_spu_g5 = 0x00000007,
627 regk_iop_sw_cfg_spu_g6 = 0x00000007,
628 regk_iop_sw_cfg_spu_g7 = 0x00000007,
629 regk_iop_sw_cfg_spu_gio0 = 0x00000000,
630 regk_iop_sw_cfg_spu_gio1 = 0x00000001,
631 regk_iop_sw_cfg_spu_gio5 = 0x00000005,
632 regk_iop_sw_cfg_spu_gio6 = 0x00000006,
633 regk_iop_sw_cfg_spu_gio7 = 0x00000007,
634 regk_iop_sw_cfg_spu_gio_out0 = 0x00000008,
635 regk_iop_sw_cfg_spu_gio_out1 = 0x00000009,
636 regk_iop_sw_cfg_spu_gio_out2 = 0x0000000a,
637 regk_iop_sw_cfg_spu_gio_out3 = 0x0000000b,
638 regk_iop_sw_cfg_spu_gio_out4 = 0x0000000c,
639 regk_iop_sw_cfg_spu_gio_out5 = 0x0000000d,
640 regk_iop_sw_cfg_spu_gio_out6 = 0x0000000e,
641 regk_iop_sw_cfg_spu_gio_out7 = 0x0000000f,
642 regk_iop_sw_cfg_spu_gioout0 = 0x00000000,
643 regk_iop_sw_cfg_spu_gioout1 = 0x00000000,
644 regk_iop_sw_cfg_spu_gioout10 = 0x00000007,
645 regk_iop_sw_cfg_spu_gioout11 = 0x00000007,
646 regk_iop_sw_cfg_spu_gioout12 = 0x00000007,
647 regk_iop_sw_cfg_spu_gioout13 = 0x00000007,
648 regk_iop_sw_cfg_spu_gioout14 = 0x00000007,
649 regk_iop_sw_cfg_spu_gioout15 = 0x00000007,
650 regk_iop_sw_cfg_spu_gioout16 = 0x00000007,
651 regk_iop_sw_cfg_spu_gioout17 = 0x00000007,
652 regk_iop_sw_cfg_spu_gioout18 = 0x00000007,
653 regk_iop_sw_cfg_spu_gioout19 = 0x00000007,
654 regk_iop_sw_cfg_spu_gioout2 = 0x00000001,
655 regk_iop_sw_cfg_spu_gioout20 = 0x00000007,
656 regk_iop_sw_cfg_spu_gioout21 = 0x00000007,
657 regk_iop_sw_cfg_spu_gioout22 = 0x00000007,
658 regk_iop_sw_cfg_spu_gioout23 = 0x00000007,
659 regk_iop_sw_cfg_spu_gioout24 = 0x00000007,
660 regk_iop_sw_cfg_spu_gioout25 = 0x00000007,
661 regk_iop_sw_cfg_spu_gioout26 = 0x00000007,
662 regk_iop_sw_cfg_spu_gioout27 = 0x00000007,
663 regk_iop_sw_cfg_spu_gioout28 = 0x00000007,
664 regk_iop_sw_cfg_spu_gioout29 = 0x00000007,
665 regk_iop_sw_cfg_spu_gioout3 = 0x00000001,
666 regk_iop_sw_cfg_spu_gioout30 = 0x00000007,
667 regk_iop_sw_cfg_spu_gioout31 = 0x00000007,
668 regk_iop_sw_cfg_spu_gioout4 = 0x00000002,
669 regk_iop_sw_cfg_spu_gioout5 = 0x00000002,
670 regk_iop_sw_cfg_spu_gioout6 = 0x00000003,
671 regk_iop_sw_cfg_spu_gioout7 = 0x00000003,
672 regk_iop_sw_cfg_spu_gioout8 = 0x00000007,
673 regk_iop_sw_cfg_spu_gioout9 = 0x00000007,
674 regk_iop_sw_cfg_strb_timer_grp0_tmr0 = 0x00000001,
675 regk_iop_sw_cfg_strb_timer_grp0_tmr1 = 0x00000002,
676 regk_iop_sw_cfg_strb_timer_grp1_tmr0 = 0x00000003,
677 regk_iop_sw_cfg_strb_timer_grp1_tmr1 = 0x00000002,
678 regk_iop_sw_cfg_timer_grp0 = 0x00000000,
679 regk_iop_sw_cfg_timer_grp0_rot = 0x00000001,
680 regk_iop_sw_cfg_timer_grp0_strb0 = 0x00000005,
681 regk_iop_sw_cfg_timer_grp0_strb1 = 0x00000005,
682 regk_iop_sw_cfg_timer_grp0_strb2 = 0x00000005,
683 regk_iop_sw_cfg_timer_grp0_strb3 = 0x00000005,
684 regk_iop_sw_cfg_timer_grp0_tmr0 = 0x00000002,
685 regk_iop_sw_cfg_timer_grp1 = 0x00000000,
686 regk_iop_sw_cfg_timer_grp1_rot = 0x00000001,
687 regk_iop_sw_cfg_timer_grp1_strb0 = 0x00000006,
688 regk_iop_sw_cfg_timer_grp1_strb1 = 0x00000006,
689 regk_iop_sw_cfg_timer_grp1_strb2 = 0x00000006,
690 regk_iop_sw_cfg_timer_grp1_strb3 = 0x00000006,
691 regk_iop_sw_cfg_timer_grp1_tmr0 = 0x00000003,
692 regk_iop_sw_cfg_trig0_0 = 0x00000000,
693 regk_iop_sw_cfg_trig0_1 = 0x00000000,
694 regk_iop_sw_cfg_trig0_2 = 0x00000000,
695 regk_iop_sw_cfg_trig0_3 = 0x00000000,
696 regk_iop_sw_cfg_trig1_0 = 0x00000000,
697 regk_iop_sw_cfg_trig1_1 = 0x00000000,
698 regk_iop_sw_cfg_trig1_2 = 0x00000000,
699 regk_iop_sw_cfg_trig1_3 = 0x00000000,
700 regk_iop_sw_cfg_trig2_0 = 0x00000001,
701 regk_iop_sw_cfg_trig2_1 = 0x00000001,
702 regk_iop_sw_cfg_trig2_2 = 0x00000001,
703 regk_iop_sw_cfg_trig2_3 = 0x00000001,
704 regk_iop_sw_cfg_trig3_0 = 0x00000001,
705 regk_iop_sw_cfg_trig3_1 = 0x00000001,
706 regk_iop_sw_cfg_trig3_2 = 0x00000001,
707 regk_iop_sw_cfg_trig3_3 = 0x00000001,
708 regk_iop_sw_cfg_trig4_0 = 0x00000002,
709 regk_iop_sw_cfg_trig4_1 = 0x00000002,
710 regk_iop_sw_cfg_trig4_2 = 0x00000002,
711 regk_iop_sw_cfg_trig4_3 = 0x00000002,
712 regk_iop_sw_cfg_trig5_0 = 0x00000002,
713 regk_iop_sw_cfg_trig5_1 = 0x00000002,
714 regk_iop_sw_cfg_trig5_2 = 0x00000002,
715 regk_iop_sw_cfg_trig5_3 = 0x00000002,
716 regk_iop_sw_cfg_trig6_0 = 0x00000003,
717 regk_iop_sw_cfg_trig6_1 = 0x00000003,
718 regk_iop_sw_cfg_trig6_2 = 0x00000003,
719 regk_iop_sw_cfg_trig6_3 = 0x00000003,
720 regk_iop_sw_cfg_trig7_0 = 0x00000003,
721 regk_iop_sw_cfg_trig7_1 = 0x00000003,
722 regk_iop_sw_cfg_trig7_2 = 0x00000003,
723 regk_iop_sw_cfg_trig7_3 = 0x00000003
724};
725#endif /* __iop_sw_cfg_defs_h */
diff --git a/include/asm-cris/arch-v32/mach-a3/hwregs/iop/iop_sw_cpu_defs.h b/include/asm-cris/arch-v32/mach-a3/hwregs/iop/iop_sw_cpu_defs.h
new file mode 100644
index 000000000000..a16f556370eb
--- /dev/null
+++ b/include/asm-cris/arch-v32/mach-a3/hwregs/iop/iop_sw_cpu_defs.h
@@ -0,0 +1,522 @@
1#ifndef __iop_sw_cpu_defs_h
2#define __iop_sw_cpu_defs_h
3
4/*
5 * This file is autogenerated from
6 * file: iop_sw_cpu.r
7 *
8 * by ../../../tools/rdesc/bin/rdes2c -outfile iop_sw_cpu_defs.h iop_sw_cpu.r
9 * Any changes here will be lost.
10 *
11 * -*- buffer-read-only: t -*-
12 */
13/* Main access macros */
14#ifndef REG_RD
15#define REG_RD( scope, inst, reg ) \
16 REG_READ( reg_##scope##_##reg, \
17 (inst) + REG_RD_ADDR_##scope##_##reg )
18#endif
19
20#ifndef REG_WR
21#define REG_WR( scope, inst, reg, val ) \
22 REG_WRITE( reg_##scope##_##reg, \
23 (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
24#endif
25
26#ifndef REG_RD_VECT
27#define REG_RD_VECT( scope, inst, reg, index ) \
28 REG_READ( reg_##scope##_##reg, \
29 (inst) + REG_RD_ADDR_##scope##_##reg + \
30 (index) * STRIDE_##scope##_##reg )
31#endif
32
33#ifndef REG_WR_VECT
34#define REG_WR_VECT( scope, inst, reg, index, val ) \
35 REG_WRITE( reg_##scope##_##reg, \
36 (inst) + REG_WR_ADDR_##scope##_##reg + \
37 (index) * STRIDE_##scope##_##reg, (val) )
38#endif
39
40#ifndef REG_RD_INT
41#define REG_RD_INT( scope, inst, reg ) \
42 REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg )
43#endif
44
45#ifndef REG_WR_INT
46#define REG_WR_INT( scope, inst, reg, val ) \
47 REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
48#endif
49
50#ifndef REG_RD_INT_VECT
51#define REG_RD_INT_VECT( scope, inst, reg, index ) \
52 REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg + \
53 (index) * STRIDE_##scope##_##reg )
54#endif
55
56#ifndef REG_WR_INT_VECT
57#define REG_WR_INT_VECT( scope, inst, reg, index, val ) \
58 REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg + \
59 (index) * STRIDE_##scope##_##reg, (val) )
60#endif
61
62#ifndef REG_TYPE_CONV
63#define REG_TYPE_CONV( type, orgtype, val ) \
64 ( { union { orgtype o; type n; } r; r.o = val; r.n; } )
65#endif
66
67#ifndef reg_page_size
68#define reg_page_size 8192
69#endif
70
71#ifndef REG_ADDR
72#define REG_ADDR( scope, inst, reg ) \
73 ( (inst) + REG_RD_ADDR_##scope##_##reg )
74#endif
75
76#ifndef REG_ADDR_VECT
77#define REG_ADDR_VECT( scope, inst, reg, index ) \
78 ( (inst) + REG_RD_ADDR_##scope##_##reg + \
79 (index) * STRIDE_##scope##_##reg )
80#endif
81
82/* C-code for register scope iop_sw_cpu */
83
84/* Register r_mpu_trace, scope iop_sw_cpu, type r */
85typedef unsigned int reg_iop_sw_cpu_r_mpu_trace;
86#define REG_RD_ADDR_iop_sw_cpu_r_mpu_trace 0
87
88/* Register r_spu_trace, scope iop_sw_cpu, type r */
89typedef unsigned int reg_iop_sw_cpu_r_spu_trace;
90#define REG_RD_ADDR_iop_sw_cpu_r_spu_trace 4
91
92/* Register r_spu_fsm_trace, scope iop_sw_cpu, type r */
93typedef unsigned int reg_iop_sw_cpu_r_spu_fsm_trace;
94#define REG_RD_ADDR_iop_sw_cpu_r_spu_fsm_trace 8
95
96/* Register rw_mc_ctrl, scope iop_sw_cpu, type rw */
97typedef struct {
98 unsigned int keep_owner : 1;
99 unsigned int cmd : 2;
100 unsigned int size : 3;
101 unsigned int wr_spu_mem : 1;
102 unsigned int dummy1 : 25;
103} reg_iop_sw_cpu_rw_mc_ctrl;
104#define REG_RD_ADDR_iop_sw_cpu_rw_mc_ctrl 12
105#define REG_WR_ADDR_iop_sw_cpu_rw_mc_ctrl 12
106
107/* Register rw_mc_data, scope iop_sw_cpu, type rw */
108typedef struct {
109 unsigned int val : 32;
110} reg_iop_sw_cpu_rw_mc_data;
111#define REG_RD_ADDR_iop_sw_cpu_rw_mc_data 16
112#define REG_WR_ADDR_iop_sw_cpu_rw_mc_data 16
113
114/* Register rw_mc_addr, scope iop_sw_cpu, type rw */
115typedef unsigned int reg_iop_sw_cpu_rw_mc_addr;
116#define REG_RD_ADDR_iop_sw_cpu_rw_mc_addr 20
117#define REG_WR_ADDR_iop_sw_cpu_rw_mc_addr 20
118
119/* Register rs_mc_data, scope iop_sw_cpu, type rs */
120typedef unsigned int reg_iop_sw_cpu_rs_mc_data;
121#define REG_RD_ADDR_iop_sw_cpu_rs_mc_data 24
122
123/* Register r_mc_data, scope iop_sw_cpu, type r */
124typedef unsigned int reg_iop_sw_cpu_r_mc_data;
125#define REG_RD_ADDR_iop_sw_cpu_r_mc_data 28
126
127/* Register r_mc_stat, scope iop_sw_cpu, type r */
128typedef struct {
129 unsigned int busy_cpu : 1;
130 unsigned int busy_mpu : 1;
131 unsigned int busy_spu : 1;
132 unsigned int owned_by_cpu : 1;
133 unsigned int owned_by_mpu : 1;
134 unsigned int owned_by_spu : 1;
135 unsigned int dummy1 : 26;
136} reg_iop_sw_cpu_r_mc_stat;
137#define REG_RD_ADDR_iop_sw_cpu_r_mc_stat 32
138
139/* Register rw_bus_clr_mask, scope iop_sw_cpu, type rw */
140typedef struct {
141 unsigned int byte0 : 8;
142 unsigned int byte1 : 8;
143 unsigned int byte2 : 8;
144 unsigned int byte3 : 8;
145} reg_iop_sw_cpu_rw_bus_clr_mask;
146#define REG_RD_ADDR_iop_sw_cpu_rw_bus_clr_mask 36
147#define REG_WR_ADDR_iop_sw_cpu_rw_bus_clr_mask 36
148
149/* Register rw_bus_set_mask, scope iop_sw_cpu, type rw */
150typedef struct {
151 unsigned int byte0 : 8;
152 unsigned int byte1 : 8;
153 unsigned int byte2 : 8;
154 unsigned int byte3 : 8;
155} reg_iop_sw_cpu_rw_bus_set_mask;
156#define REG_RD_ADDR_iop_sw_cpu_rw_bus_set_mask 40
157#define REG_WR_ADDR_iop_sw_cpu_rw_bus_set_mask 40
158
159/* Register rw_bus_oe_clr_mask, scope iop_sw_cpu, type rw */
160typedef struct {
161 unsigned int byte0 : 1;
162 unsigned int byte1 : 1;
163 unsigned int byte2 : 1;
164 unsigned int byte3 : 1;
165 unsigned int dummy1 : 28;
166} reg_iop_sw_cpu_rw_bus_oe_clr_mask;
167#define REG_RD_ADDR_iop_sw_cpu_rw_bus_oe_clr_mask 44
168#define REG_WR_ADDR_iop_sw_cpu_rw_bus_oe_clr_mask 44
169
170/* Register rw_bus_oe_set_mask, scope iop_sw_cpu, type rw */
171typedef struct {
172 unsigned int byte0 : 1;
173 unsigned int byte1 : 1;
174 unsigned int byte2 : 1;
175 unsigned int byte3 : 1;
176 unsigned int dummy1 : 28;
177} reg_iop_sw_cpu_rw_bus_oe_set_mask;
178#define REG_RD_ADDR_iop_sw_cpu_rw_bus_oe_set_mask 48
179#define REG_WR_ADDR_iop_sw_cpu_rw_bus_oe_set_mask 48
180
181/* Register r_bus_in, scope iop_sw_cpu, type r */
182typedef unsigned int reg_iop_sw_cpu_r_bus_in;
183#define REG_RD_ADDR_iop_sw_cpu_r_bus_in 52
184
185/* Register rw_gio_clr_mask, scope iop_sw_cpu, type rw */
186typedef struct {
187 unsigned int val : 32;
188} reg_iop_sw_cpu_rw_gio_clr_mask;
189#define REG_RD_ADDR_iop_sw_cpu_rw_gio_clr_mask 56
190#define REG_WR_ADDR_iop_sw_cpu_rw_gio_clr_mask 56
191
192/* Register rw_gio_set_mask, scope iop_sw_cpu, type rw */
193typedef struct {
194 unsigned int val : 32;
195} reg_iop_sw_cpu_rw_gio_set_mask;
196#define REG_RD_ADDR_iop_sw_cpu_rw_gio_set_mask 60
197#define REG_WR_ADDR_iop_sw_cpu_rw_gio_set_mask 60
198
199/* Register rw_gio_oe_clr_mask, scope iop_sw_cpu, type rw */
200typedef struct {
201 unsigned int val : 32;
202} reg_iop_sw_cpu_rw_gio_oe_clr_mask;
203#define REG_RD_ADDR_iop_sw_cpu_rw_gio_oe_clr_mask 64
204#define REG_WR_ADDR_iop_sw_cpu_rw_gio_oe_clr_mask 64
205
206/* Register rw_gio_oe_set_mask, scope iop_sw_cpu, type rw */
207typedef struct {
208 unsigned int val : 32;
209} reg_iop_sw_cpu_rw_gio_oe_set_mask;
210#define REG_RD_ADDR_iop_sw_cpu_rw_gio_oe_set_mask 68
211#define REG_WR_ADDR_iop_sw_cpu_rw_gio_oe_set_mask 68
212
213/* Register r_gio_in, scope iop_sw_cpu, type r */
214typedef unsigned int reg_iop_sw_cpu_r_gio_in;
215#define REG_RD_ADDR_iop_sw_cpu_r_gio_in 72
216
217/* Register rw_intr0_mask, scope iop_sw_cpu, type rw */
218typedef struct {
219 unsigned int mpu_0 : 1;
220 unsigned int mpu_1 : 1;
221 unsigned int mpu_2 : 1;
222 unsigned int mpu_3 : 1;
223 unsigned int mpu_4 : 1;
224 unsigned int mpu_5 : 1;
225 unsigned int mpu_6 : 1;
226 unsigned int mpu_7 : 1;
227 unsigned int mpu_8 : 1;
228 unsigned int mpu_9 : 1;
229 unsigned int mpu_10 : 1;
230 unsigned int mpu_11 : 1;
231 unsigned int mpu_12 : 1;
232 unsigned int mpu_13 : 1;
233 unsigned int mpu_14 : 1;
234 unsigned int mpu_15 : 1;
235 unsigned int spu_0 : 1;
236 unsigned int spu_1 : 1;
237 unsigned int spu_2 : 1;
238 unsigned int spu_3 : 1;
239 unsigned int spu_4 : 1;
240 unsigned int spu_5 : 1;
241 unsigned int spu_6 : 1;
242 unsigned int spu_7 : 1;
243 unsigned int spu_8 : 1;
244 unsigned int spu_9 : 1;
245 unsigned int spu_10 : 1;
246 unsigned int spu_11 : 1;
247 unsigned int spu_12 : 1;
248 unsigned int spu_13 : 1;
249 unsigned int spu_14 : 1;
250 unsigned int spu_15 : 1;
251} reg_iop_sw_cpu_rw_intr0_mask;
252#define REG_RD_ADDR_iop_sw_cpu_rw_intr0_mask 76
253#define REG_WR_ADDR_iop_sw_cpu_rw_intr0_mask 76
254
255/* Register rw_ack_intr0, scope iop_sw_cpu, type rw */
256typedef struct {
257 unsigned int mpu_0 : 1;
258 unsigned int mpu_1 : 1;
259 unsigned int mpu_2 : 1;
260 unsigned int mpu_3 : 1;
261 unsigned int mpu_4 : 1;
262 unsigned int mpu_5 : 1;
263 unsigned int mpu_6 : 1;
264 unsigned int mpu_7 : 1;
265 unsigned int mpu_8 : 1;
266 unsigned int mpu_9 : 1;
267 unsigned int mpu_10 : 1;
268 unsigned int mpu_11 : 1;
269 unsigned int mpu_12 : 1;
270 unsigned int mpu_13 : 1;
271 unsigned int mpu_14 : 1;
272 unsigned int mpu_15 : 1;
273 unsigned int spu_0 : 1;
274 unsigned int spu_1 : 1;
275 unsigned int spu_2 : 1;
276 unsigned int spu_3 : 1;
277 unsigned int spu_4 : 1;
278 unsigned int spu_5 : 1;
279 unsigned int spu_6 : 1;
280 unsigned int spu_7 : 1;
281 unsigned int spu_8 : 1;
282 unsigned int spu_9 : 1;
283 unsigned int spu_10 : 1;
284 unsigned int spu_11 : 1;
285 unsigned int spu_12 : 1;
286 unsigned int spu_13 : 1;
287 unsigned int spu_14 : 1;
288 unsigned int spu_15 : 1;
289} reg_iop_sw_cpu_rw_ack_intr0;
290#define REG_RD_ADDR_iop_sw_cpu_rw_ack_intr0 80
291#define REG_WR_ADDR_iop_sw_cpu_rw_ack_intr0 80
292
293/* Register r_intr0, scope iop_sw_cpu, type r */
294typedef struct {
295 unsigned int mpu_0 : 1;
296 unsigned int mpu_1 : 1;
297 unsigned int mpu_2 : 1;
298 unsigned int mpu_3 : 1;
299 unsigned int mpu_4 : 1;
300 unsigned int mpu_5 : 1;
301 unsigned int mpu_6 : 1;
302 unsigned int mpu_7 : 1;
303 unsigned int mpu_8 : 1;
304 unsigned int mpu_9 : 1;
305 unsigned int mpu_10 : 1;
306 unsigned int mpu_11 : 1;
307 unsigned int mpu_12 : 1;
308 unsigned int mpu_13 : 1;
309 unsigned int mpu_14 : 1;
310 unsigned int mpu_15 : 1;
311 unsigned int spu_0 : 1;
312 unsigned int spu_1 : 1;
313 unsigned int spu_2 : 1;
314 unsigned int spu_3 : 1;
315 unsigned int spu_4 : 1;
316 unsigned int spu_5 : 1;
317 unsigned int spu_6 : 1;
318 unsigned int spu_7 : 1;
319 unsigned int spu_8 : 1;
320 unsigned int spu_9 : 1;
321 unsigned int spu_10 : 1;
322 unsigned int spu_11 : 1;
323 unsigned int spu_12 : 1;
324 unsigned int spu_13 : 1;
325 unsigned int spu_14 : 1;
326 unsigned int spu_15 : 1;
327} reg_iop_sw_cpu_r_intr0;
328#define REG_RD_ADDR_iop_sw_cpu_r_intr0 84
329
330/* Register r_masked_intr0, scope iop_sw_cpu, type r */
331typedef struct {
332 unsigned int mpu_0 : 1;
333 unsigned int mpu_1 : 1;
334 unsigned int mpu_2 : 1;
335 unsigned int mpu_3 : 1;
336 unsigned int mpu_4 : 1;
337 unsigned int mpu_5 : 1;
338 unsigned int mpu_6 : 1;
339 unsigned int mpu_7 : 1;
340 unsigned int mpu_8 : 1;
341 unsigned int mpu_9 : 1;
342 unsigned int mpu_10 : 1;
343 unsigned int mpu_11 : 1;
344 unsigned int mpu_12 : 1;
345 unsigned int mpu_13 : 1;
346 unsigned int mpu_14 : 1;
347 unsigned int mpu_15 : 1;
348 unsigned int spu_0 : 1;
349 unsigned int spu_1 : 1;
350 unsigned int spu_2 : 1;
351 unsigned int spu_3 : 1;
352 unsigned int spu_4 : 1;
353 unsigned int spu_5 : 1;
354 unsigned int spu_6 : 1;
355 unsigned int spu_7 : 1;
356 unsigned int spu_8 : 1;
357 unsigned int spu_9 : 1;
358 unsigned int spu_10 : 1;
359 unsigned int spu_11 : 1;
360 unsigned int spu_12 : 1;
361 unsigned int spu_13 : 1;
362 unsigned int spu_14 : 1;
363 unsigned int spu_15 : 1;
364} reg_iop_sw_cpu_r_masked_intr0;
365#define REG_RD_ADDR_iop_sw_cpu_r_masked_intr0 88
366
367/* Register rw_intr1_mask, scope iop_sw_cpu, type rw */
368typedef struct {
369 unsigned int mpu_16 : 1;
370 unsigned int mpu_17 : 1;
371 unsigned int mpu_18 : 1;
372 unsigned int mpu_19 : 1;
373 unsigned int mpu_20 : 1;
374 unsigned int mpu_21 : 1;
375 unsigned int mpu_22 : 1;
376 unsigned int mpu_23 : 1;
377 unsigned int mpu_24 : 1;
378 unsigned int mpu_25 : 1;
379 unsigned int mpu_26 : 1;
380 unsigned int mpu_27 : 1;
381 unsigned int mpu_28 : 1;
382 unsigned int mpu_29 : 1;
383 unsigned int mpu_30 : 1;
384 unsigned int mpu_31 : 1;
385 unsigned int dmc_in : 1;
386 unsigned int dmc_out : 1;
387 unsigned int fifo_in : 1;
388 unsigned int fifo_out : 1;
389 unsigned int fifo_in_extra : 1;
390 unsigned int fifo_out_extra : 1;
391 unsigned int trigger_grp0 : 1;
392 unsigned int trigger_grp1 : 1;
393 unsigned int trigger_grp2 : 1;
394 unsigned int trigger_grp3 : 1;
395 unsigned int trigger_grp4 : 1;
396 unsigned int trigger_grp5 : 1;
397 unsigned int trigger_grp6 : 1;
398 unsigned int trigger_grp7 : 1;
399 unsigned int timer_grp0 : 1;
400 unsigned int timer_grp1 : 1;
401} reg_iop_sw_cpu_rw_intr1_mask;
402#define REG_RD_ADDR_iop_sw_cpu_rw_intr1_mask 92
403#define REG_WR_ADDR_iop_sw_cpu_rw_intr1_mask 92
404
405/* Register rw_ack_intr1, scope iop_sw_cpu, type rw */
406typedef struct {
407 unsigned int mpu_16 : 1;
408 unsigned int mpu_17 : 1;
409 unsigned int mpu_18 : 1;
410 unsigned int mpu_19 : 1;
411 unsigned int mpu_20 : 1;
412 unsigned int mpu_21 : 1;
413 unsigned int mpu_22 : 1;
414 unsigned int mpu_23 : 1;
415 unsigned int mpu_24 : 1;
416 unsigned int mpu_25 : 1;
417 unsigned int mpu_26 : 1;
418 unsigned int mpu_27 : 1;
419 unsigned int mpu_28 : 1;
420 unsigned int mpu_29 : 1;
421 unsigned int mpu_30 : 1;
422 unsigned int mpu_31 : 1;
423 unsigned int dummy1 : 16;
424} reg_iop_sw_cpu_rw_ack_intr1;
425#define REG_RD_ADDR_iop_sw_cpu_rw_ack_intr1 96
426#define REG_WR_ADDR_iop_sw_cpu_rw_ack_intr1 96
427
428/* Register r_intr1, scope iop_sw_cpu, type r */
429typedef struct {
430 unsigned int mpu_16 : 1;
431 unsigned int mpu_17 : 1;
432 unsigned int mpu_18 : 1;
433 unsigned int mpu_19 : 1;
434 unsigned int mpu_20 : 1;
435 unsigned int mpu_21 : 1;
436 unsigned int mpu_22 : 1;
437 unsigned int mpu_23 : 1;
438 unsigned int mpu_24 : 1;
439 unsigned int mpu_25 : 1;
440 unsigned int mpu_26 : 1;
441 unsigned int mpu_27 : 1;
442 unsigned int mpu_28 : 1;
443 unsigned int mpu_29 : 1;
444 unsigned int mpu_30 : 1;
445 unsigned int mpu_31 : 1;
446 unsigned int dmc_in : 1;
447 unsigned int dmc_out : 1;
448 unsigned int fifo_in : 1;
449 unsigned int fifo_out : 1;
450 unsigned int fifo_in_extra : 1;
451 unsigned int fifo_out_extra : 1;
452 unsigned int trigger_grp0 : 1;
453 unsigned int trigger_grp1 : 1;
454 unsigned int trigger_grp2 : 1;
455 unsigned int trigger_grp3 : 1;
456 unsigned int trigger_grp4 : 1;
457 unsigned int trigger_grp5 : 1;
458 unsigned int trigger_grp6 : 1;
459 unsigned int trigger_grp7 : 1;
460 unsigned int timer_grp0 : 1;
461 unsigned int timer_grp1 : 1;
462} reg_iop_sw_cpu_r_intr1;
463#define REG_RD_ADDR_iop_sw_cpu_r_intr1 100
464
465/* Register r_masked_intr1, scope iop_sw_cpu, type r */
466typedef struct {
467 unsigned int mpu_16 : 1;
468 unsigned int mpu_17 : 1;
469 unsigned int mpu_18 : 1;
470 unsigned int mpu_19 : 1;
471 unsigned int mpu_20 : 1;
472 unsigned int mpu_21 : 1;
473 unsigned int mpu_22 : 1;
474 unsigned int mpu_23 : 1;
475 unsigned int mpu_24 : 1;
476 unsigned int mpu_25 : 1;
477 unsigned int mpu_26 : 1;
478 unsigned int mpu_27 : 1;
479 unsigned int mpu_28 : 1;
480 unsigned int mpu_29 : 1;
481 unsigned int mpu_30 : 1;
482 unsigned int mpu_31 : 1;
483 unsigned int dmc_in : 1;
484 unsigned int dmc_out : 1;
485 unsigned int fifo_in : 1;
486 unsigned int fifo_out : 1;
487 unsigned int fifo_in_extra : 1;
488 unsigned int fifo_out_extra : 1;
489 unsigned int trigger_grp0 : 1;
490 unsigned int trigger_grp1 : 1;
491 unsigned int trigger_grp2 : 1;
492 unsigned int trigger_grp3 : 1;
493 unsigned int trigger_grp4 : 1;
494 unsigned int trigger_grp5 : 1;
495 unsigned int trigger_grp6 : 1;
496 unsigned int trigger_grp7 : 1;
497 unsigned int timer_grp0 : 1;
498 unsigned int timer_grp1 : 1;
499} reg_iop_sw_cpu_r_masked_intr1;
500#define REG_RD_ADDR_iop_sw_cpu_r_masked_intr1 104
501
502
503/* Constants */
504enum {
505 regk_iop_sw_cpu_copy = 0x00000000,
506 regk_iop_sw_cpu_no = 0x00000000,
507 regk_iop_sw_cpu_rd = 0x00000002,
508 regk_iop_sw_cpu_reg_copy = 0x00000001,
509 regk_iop_sw_cpu_rw_bus_clr_mask_default = 0x00000000,
510 regk_iop_sw_cpu_rw_bus_oe_clr_mask_default = 0x00000000,
511 regk_iop_sw_cpu_rw_bus_oe_set_mask_default = 0x00000000,
512 regk_iop_sw_cpu_rw_bus_set_mask_default = 0x00000000,
513 regk_iop_sw_cpu_rw_gio_clr_mask_default = 0x00000000,
514 regk_iop_sw_cpu_rw_gio_oe_clr_mask_default = 0x00000000,
515 regk_iop_sw_cpu_rw_gio_oe_set_mask_default = 0x00000000,
516 regk_iop_sw_cpu_rw_gio_set_mask_default = 0x00000000,
517 regk_iop_sw_cpu_rw_intr0_mask_default = 0x00000000,
518 regk_iop_sw_cpu_rw_intr1_mask_default = 0x00000000,
519 regk_iop_sw_cpu_wr = 0x00000003,
520 regk_iop_sw_cpu_yes = 0x00000001
521};
522#endif /* __iop_sw_cpu_defs_h */
diff --git a/include/asm-cris/arch-v32/mach-a3/hwregs/iop/iop_sw_mpu_defs.h b/include/asm-cris/arch-v32/mach-a3/hwregs/iop/iop_sw_mpu_defs.h
new file mode 100644
index 000000000000..a2e4e1a33e57
--- /dev/null
+++ b/include/asm-cris/arch-v32/mach-a3/hwregs/iop/iop_sw_mpu_defs.h
@@ -0,0 +1,648 @@
1#ifndef __iop_sw_mpu_defs_h
2#define __iop_sw_mpu_defs_h
3
4/*
5 * This file is autogenerated from
6 * file: iop_sw_mpu.r
7 *
8 * by ../../../tools/rdesc/bin/rdes2c -outfile iop_sw_mpu_defs.h iop_sw_mpu.r
9 * Any changes here will be lost.
10 *
11 * -*- buffer-read-only: t -*-
12 */
13/* Main access macros */
14#ifndef REG_RD
15#define REG_RD( scope, inst, reg ) \
16 REG_READ( reg_##scope##_##reg, \
17 (inst) + REG_RD_ADDR_##scope##_##reg )
18#endif
19
20#ifndef REG_WR
21#define REG_WR( scope, inst, reg, val ) \
22 REG_WRITE( reg_##scope##_##reg, \
23 (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
24#endif
25
26#ifndef REG_RD_VECT
27#define REG_RD_VECT( scope, inst, reg, index ) \
28 REG_READ( reg_##scope##_##reg, \
29 (inst) + REG_RD_ADDR_##scope##_##reg + \
30 (index) * STRIDE_##scope##_##reg )
31#endif
32
33#ifndef REG_WR_VECT
34#define REG_WR_VECT( scope, inst, reg, index, val ) \
35 REG_WRITE( reg_##scope##_##reg, \
36 (inst) + REG_WR_ADDR_##scope##_##reg + \
37 (index) * STRIDE_##scope##_##reg, (val) )
38#endif
39
40#ifndef REG_RD_INT
41#define REG_RD_INT( scope, inst, reg ) \
42 REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg )
43#endif
44
45#ifndef REG_WR_INT
46#define REG_WR_INT( scope, inst, reg, val ) \
47 REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
48#endif
49
50#ifndef REG_RD_INT_VECT
51#define REG_RD_INT_VECT( scope, inst, reg, index ) \
52 REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg + \
53 (index) * STRIDE_##scope##_##reg )
54#endif
55
56#ifndef REG_WR_INT_VECT
57#define REG_WR_INT_VECT( scope, inst, reg, index, val ) \
58 REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg + \
59 (index) * STRIDE_##scope##_##reg, (val) )
60#endif
61
62#ifndef REG_TYPE_CONV
63#define REG_TYPE_CONV( type, orgtype, val ) \
64 ( { union { orgtype o; type n; } r; r.o = val; r.n; } )
65#endif
66
67#ifndef reg_page_size
68#define reg_page_size 8192
69#endif
70
71#ifndef REG_ADDR
72#define REG_ADDR( scope, inst, reg ) \
73 ( (inst) + REG_RD_ADDR_##scope##_##reg )
74#endif
75
76#ifndef REG_ADDR_VECT
77#define REG_ADDR_VECT( scope, inst, reg, index ) \
78 ( (inst) + REG_RD_ADDR_##scope##_##reg + \
79 (index) * STRIDE_##scope##_##reg )
80#endif
81
82/* C-code for register scope iop_sw_mpu */
83
84/* Register rw_sw_cfg_owner, scope iop_sw_mpu, type rw */
85typedef struct {
86 unsigned int cfg : 2;
87 unsigned int dummy1 : 30;
88} reg_iop_sw_mpu_rw_sw_cfg_owner;
89#define REG_RD_ADDR_iop_sw_mpu_rw_sw_cfg_owner 0
90#define REG_WR_ADDR_iop_sw_mpu_rw_sw_cfg_owner 0
91
92/* Register r_spu_trace, scope iop_sw_mpu, type r */
93typedef unsigned int reg_iop_sw_mpu_r_spu_trace;
94#define REG_RD_ADDR_iop_sw_mpu_r_spu_trace 4
95
96/* Register r_spu_fsm_trace, scope iop_sw_mpu, type r */
97typedef unsigned int reg_iop_sw_mpu_r_spu_fsm_trace;
98#define REG_RD_ADDR_iop_sw_mpu_r_spu_fsm_trace 8
99
100/* Register rw_mc_ctrl, scope iop_sw_mpu, type rw */
101typedef struct {
102 unsigned int keep_owner : 1;
103 unsigned int cmd : 2;
104 unsigned int size : 3;
105 unsigned int wr_spu_mem : 1;
106 unsigned int dummy1 : 25;
107} reg_iop_sw_mpu_rw_mc_ctrl;
108#define REG_RD_ADDR_iop_sw_mpu_rw_mc_ctrl 12
109#define REG_WR_ADDR_iop_sw_mpu_rw_mc_ctrl 12
110
111/* Register rw_mc_data, scope iop_sw_mpu, type rw */
112typedef struct {
113 unsigned int val : 32;
114} reg_iop_sw_mpu_rw_mc_data;
115#define REG_RD_ADDR_iop_sw_mpu_rw_mc_data 16
116#define REG_WR_ADDR_iop_sw_mpu_rw_mc_data 16
117
118/* Register rw_mc_addr, scope iop_sw_mpu, type rw */
119typedef unsigned int reg_iop_sw_mpu_rw_mc_addr;
120#define REG_RD_ADDR_iop_sw_mpu_rw_mc_addr 20
121#define REG_WR_ADDR_iop_sw_mpu_rw_mc_addr 20
122
123/* Register rs_mc_data, scope iop_sw_mpu, type rs */
124typedef unsigned int reg_iop_sw_mpu_rs_mc_data;
125#define REG_RD_ADDR_iop_sw_mpu_rs_mc_data 24
126
127/* Register r_mc_data, scope iop_sw_mpu, type r */
128typedef unsigned int reg_iop_sw_mpu_r_mc_data;
129#define REG_RD_ADDR_iop_sw_mpu_r_mc_data 28
130
131/* Register r_mc_stat, scope iop_sw_mpu, type r */
132typedef struct {
133 unsigned int busy_cpu : 1;
134 unsigned int busy_mpu : 1;
135 unsigned int busy_spu : 1;
136 unsigned int owned_by_cpu : 1;
137 unsigned int owned_by_mpu : 1;
138 unsigned int owned_by_spu : 1;
139 unsigned int dummy1 : 26;
140} reg_iop_sw_mpu_r_mc_stat;
141#define REG_RD_ADDR_iop_sw_mpu_r_mc_stat 32
142
143/* Register rw_bus_clr_mask, scope iop_sw_mpu, type rw */
144typedef struct {
145 unsigned int byte0 : 8;
146 unsigned int byte1 : 8;
147 unsigned int byte2 : 8;
148 unsigned int byte3 : 8;
149} reg_iop_sw_mpu_rw_bus_clr_mask;
150#define REG_RD_ADDR_iop_sw_mpu_rw_bus_clr_mask 36
151#define REG_WR_ADDR_iop_sw_mpu_rw_bus_clr_mask 36
152
153/* Register rw_bus_set_mask, scope iop_sw_mpu, type rw */
154typedef struct {
155 unsigned int byte0 : 8;
156 unsigned int byte1 : 8;
157 unsigned int byte2 : 8;
158 unsigned int byte3 : 8;
159} reg_iop_sw_mpu_rw_bus_set_mask;
160#define REG_RD_ADDR_iop_sw_mpu_rw_bus_set_mask 40
161#define REG_WR_ADDR_iop_sw_mpu_rw_bus_set_mask 40
162
163/* Register rw_bus_oe_clr_mask, scope iop_sw_mpu, type rw */
164typedef struct {
165 unsigned int byte0 : 1;
166 unsigned int byte1 : 1;
167 unsigned int byte2 : 1;
168 unsigned int byte3 : 1;
169 unsigned int dummy1 : 28;
170} reg_iop_sw_mpu_rw_bus_oe_clr_mask;
171#define REG_RD_ADDR_iop_sw_mpu_rw_bus_oe_clr_mask 44
172#define REG_WR_ADDR_iop_sw_mpu_rw_bus_oe_clr_mask 44
173
174/* Register rw_bus_oe_set_mask, scope iop_sw_mpu, type rw */
175typedef struct {
176 unsigned int byte0 : 1;
177 unsigned int byte1 : 1;
178 unsigned int byte2 : 1;
179 unsigned int byte3 : 1;
180 unsigned int dummy1 : 28;
181} reg_iop_sw_mpu_rw_bus_oe_set_mask;
182#define REG_RD_ADDR_iop_sw_mpu_rw_bus_oe_set_mask 48
183#define REG_WR_ADDR_iop_sw_mpu_rw_bus_oe_set_mask 48
184
185/* Register r_bus_in, scope iop_sw_mpu, type r */
186typedef unsigned int reg_iop_sw_mpu_r_bus_in;
187#define REG_RD_ADDR_iop_sw_mpu_r_bus_in 52
188
189/* Register rw_gio_clr_mask, scope iop_sw_mpu, type rw */
190typedef struct {
191 unsigned int val : 32;
192} reg_iop_sw_mpu_rw_gio_clr_mask;
193#define REG_RD_ADDR_iop_sw_mpu_rw_gio_clr_mask 56
194#define REG_WR_ADDR_iop_sw_mpu_rw_gio_clr_mask 56
195
196/* Register rw_gio_set_mask, scope iop_sw_mpu, type rw */
197typedef struct {
198 unsigned int val : 32;
199} reg_iop_sw_mpu_rw_gio_set_mask;
200#define REG_RD_ADDR_iop_sw_mpu_rw_gio_set_mask 60
201#define REG_WR_ADDR_iop_sw_mpu_rw_gio_set_mask 60
202
203/* Register rw_gio_oe_clr_mask, scope iop_sw_mpu, type rw */
204typedef struct {
205 unsigned int val : 32;
206} reg_iop_sw_mpu_rw_gio_oe_clr_mask;
207#define REG_RD_ADDR_iop_sw_mpu_rw_gio_oe_clr_mask 64
208#define REG_WR_ADDR_iop_sw_mpu_rw_gio_oe_clr_mask 64
209
210/* Register rw_gio_oe_set_mask, scope iop_sw_mpu, type rw */
211typedef struct {
212 unsigned int val : 32;
213} reg_iop_sw_mpu_rw_gio_oe_set_mask;
214#define REG_RD_ADDR_iop_sw_mpu_rw_gio_oe_set_mask 68
215#define REG_WR_ADDR_iop_sw_mpu_rw_gio_oe_set_mask 68
216
217/* Register r_gio_in, scope iop_sw_mpu, type r */
218typedef unsigned int reg_iop_sw_mpu_r_gio_in;
219#define REG_RD_ADDR_iop_sw_mpu_r_gio_in 72
220
221/* Register rw_cpu_intr, scope iop_sw_mpu, type rw */
222typedef struct {
223 unsigned int intr0 : 1;
224 unsigned int intr1 : 1;
225 unsigned int intr2 : 1;
226 unsigned int intr3 : 1;
227 unsigned int intr4 : 1;
228 unsigned int intr5 : 1;
229 unsigned int intr6 : 1;
230 unsigned int intr7 : 1;
231 unsigned int intr8 : 1;
232 unsigned int intr9 : 1;
233 unsigned int intr10 : 1;
234 unsigned int intr11 : 1;
235 unsigned int intr12 : 1;
236 unsigned int intr13 : 1;
237 unsigned int intr14 : 1;
238 unsigned int intr15 : 1;
239 unsigned int intr16 : 1;
240 unsigned int intr17 : 1;
241 unsigned int intr18 : 1;
242 unsigned int intr19 : 1;
243 unsigned int intr20 : 1;
244 unsigned int intr21 : 1;
245 unsigned int intr22 : 1;
246 unsigned int intr23 : 1;
247 unsigned int intr24 : 1;
248 unsigned int intr25 : 1;
249 unsigned int intr26 : 1;
250 unsigned int intr27 : 1;
251 unsigned int intr28 : 1;
252 unsigned int intr29 : 1;
253 unsigned int intr30 : 1;
254 unsigned int intr31 : 1;
255} reg_iop_sw_mpu_rw_cpu_intr;
256#define REG_RD_ADDR_iop_sw_mpu_rw_cpu_intr 76
257#define REG_WR_ADDR_iop_sw_mpu_rw_cpu_intr 76
258
259/* Register r_cpu_intr, scope iop_sw_mpu, type r */
260typedef struct {
261 unsigned int intr0 : 1;
262 unsigned int intr1 : 1;
263 unsigned int intr2 : 1;
264 unsigned int intr3 : 1;
265 unsigned int intr4 : 1;
266 unsigned int intr5 : 1;
267 unsigned int intr6 : 1;
268 unsigned int intr7 : 1;
269 unsigned int intr8 : 1;
270 unsigned int intr9 : 1;
271 unsigned int intr10 : 1;
272 unsigned int intr11 : 1;
273 unsigned int intr12 : 1;
274 unsigned int intr13 : 1;
275 unsigned int intr14 : 1;
276 unsigned int intr15 : 1;
277 unsigned int intr16 : 1;
278 unsigned int intr17 : 1;
279 unsigned int intr18 : 1;
280 unsigned int intr19 : 1;
281 unsigned int intr20 : 1;
282 unsigned int intr21 : 1;
283 unsigned int intr22 : 1;
284 unsigned int intr23 : 1;
285 unsigned int intr24 : 1;
286 unsigned int intr25 : 1;
287 unsigned int intr26 : 1;
288 unsigned int intr27 : 1;
289 unsigned int intr28 : 1;
290 unsigned int intr29 : 1;
291 unsigned int intr30 : 1;
292 unsigned int intr31 : 1;
293} reg_iop_sw_mpu_r_cpu_intr;
294#define REG_RD_ADDR_iop_sw_mpu_r_cpu_intr 80
295
296/* Register rw_intr_grp0_mask, scope iop_sw_mpu, type rw */
297typedef struct {
298 unsigned int spu_intr0 : 1;
299 unsigned int trigger_grp0 : 1;
300 unsigned int timer_grp0 : 1;
301 unsigned int fifo_out : 1;
302 unsigned int spu_intr1 : 1;
303 unsigned int trigger_grp1 : 1;
304 unsigned int timer_grp1 : 1;
305 unsigned int fifo_in : 1;
306 unsigned int spu_intr2 : 1;
307 unsigned int trigger_grp2 : 1;
308 unsigned int fifo_out_extra : 1;
309 unsigned int dmc_out : 1;
310 unsigned int spu_intr3 : 1;
311 unsigned int trigger_grp3 : 1;
312 unsigned int fifo_in_extra : 1;
313 unsigned int dmc_in : 1;
314 unsigned int dummy1 : 16;
315} reg_iop_sw_mpu_rw_intr_grp0_mask;
316#define REG_RD_ADDR_iop_sw_mpu_rw_intr_grp0_mask 84
317#define REG_WR_ADDR_iop_sw_mpu_rw_intr_grp0_mask 84
318
319/* Register rw_ack_intr_grp0, scope iop_sw_mpu, type rw */
320typedef struct {
321 unsigned int spu_intr0 : 1;
322 unsigned int dummy1 : 3;
323 unsigned int spu_intr1 : 1;
324 unsigned int dummy2 : 3;
325 unsigned int spu_intr2 : 1;
326 unsigned int dummy3 : 3;
327 unsigned int spu_intr3 : 1;
328 unsigned int dummy4 : 19;
329} reg_iop_sw_mpu_rw_ack_intr_grp0;
330#define REG_RD_ADDR_iop_sw_mpu_rw_ack_intr_grp0 88
331#define REG_WR_ADDR_iop_sw_mpu_rw_ack_intr_grp0 88
332
333/* Register r_intr_grp0, scope iop_sw_mpu, type r */
334typedef struct {
335 unsigned int spu_intr0 : 1;
336 unsigned int trigger_grp0 : 1;
337 unsigned int timer_grp0 : 1;
338 unsigned int fifo_out : 1;
339 unsigned int spu_intr1 : 1;
340 unsigned int trigger_grp1 : 1;
341 unsigned int timer_grp1 : 1;
342 unsigned int fifo_in : 1;
343 unsigned int spu_intr2 : 1;
344 unsigned int trigger_grp2 : 1;
345 unsigned int fifo_out_extra : 1;
346 unsigned int dmc_out : 1;
347 unsigned int spu_intr3 : 1;
348 unsigned int trigger_grp3 : 1;
349 unsigned int fifo_in_extra : 1;
350 unsigned int dmc_in : 1;
351 unsigned int dummy1 : 16;
352} reg_iop_sw_mpu_r_intr_grp0;
353#define REG_RD_ADDR_iop_sw_mpu_r_intr_grp0 92
354
355/* Register r_masked_intr_grp0, scope iop_sw_mpu, type r */
356typedef struct {
357 unsigned int spu_intr0 : 1;
358 unsigned int trigger_grp0 : 1;
359 unsigned int timer_grp0 : 1;
360 unsigned int fifo_out : 1;
361 unsigned int spu_intr1 : 1;
362 unsigned int trigger_grp1 : 1;
363 unsigned int timer_grp1 : 1;
364 unsigned int fifo_in : 1;
365 unsigned int spu_intr2 : 1;
366 unsigned int trigger_grp2 : 1;
367 unsigned int fifo_out_extra : 1;
368 unsigned int dmc_out : 1;
369 unsigned int spu_intr3 : 1;
370 unsigned int trigger_grp3 : 1;
371 unsigned int fifo_in_extra : 1;
372 unsigned int dmc_in : 1;
373 unsigned int dummy1 : 16;
374} reg_iop_sw_mpu_r_masked_intr_grp0;
375#define REG_RD_ADDR_iop_sw_mpu_r_masked_intr_grp0 96
376
377/* Register rw_intr_grp1_mask, scope iop_sw_mpu, type rw */
378typedef struct {
379 unsigned int spu_intr4 : 1;
380 unsigned int trigger_grp4 : 1;
381 unsigned int fifo_out_extra : 1;
382 unsigned int dmc_out : 1;
383 unsigned int spu_intr5 : 1;
384 unsigned int trigger_grp5 : 1;
385 unsigned int fifo_in_extra : 1;
386 unsigned int dmc_in : 1;
387 unsigned int spu_intr6 : 1;
388 unsigned int trigger_grp6 : 1;
389 unsigned int timer_grp0 : 1;
390 unsigned int fifo_out : 1;
391 unsigned int spu_intr7 : 1;
392 unsigned int trigger_grp7 : 1;
393 unsigned int timer_grp1 : 1;
394 unsigned int fifo_in : 1;
395 unsigned int dummy1 : 16;
396} reg_iop_sw_mpu_rw_intr_grp1_mask;
397#define REG_RD_ADDR_iop_sw_mpu_rw_intr_grp1_mask 100
398#define REG_WR_ADDR_iop_sw_mpu_rw_intr_grp1_mask 100
399
400/* Register rw_ack_intr_grp1, scope iop_sw_mpu, type rw */
401typedef struct {
402 unsigned int spu_intr4 : 1;
403 unsigned int dummy1 : 3;
404 unsigned int spu_intr5 : 1;
405 unsigned int dummy2 : 3;
406 unsigned int spu_intr6 : 1;
407 unsigned int dummy3 : 3;
408 unsigned int spu_intr7 : 1;
409 unsigned int dummy4 : 19;
410} reg_iop_sw_mpu_rw_ack_intr_grp1;
411#define REG_RD_ADDR_iop_sw_mpu_rw_ack_intr_grp1 104
412#define REG_WR_ADDR_iop_sw_mpu_rw_ack_intr_grp1 104
413
414/* Register r_intr_grp1, scope iop_sw_mpu, type r */
415typedef struct {
416 unsigned int spu_intr4 : 1;
417 unsigned int trigger_grp4 : 1;
418 unsigned int fifo_out_extra : 1;
419 unsigned int dmc_out : 1;
420 unsigned int spu_intr5 : 1;
421 unsigned int trigger_grp5 : 1;
422 unsigned int fifo_in_extra : 1;
423 unsigned int dmc_in : 1;
424 unsigned int spu_intr6 : 1;
425 unsigned int trigger_grp6 : 1;
426 unsigned int timer_grp0 : 1;
427 unsigned int fifo_out : 1;
428 unsigned int spu_intr7 : 1;
429 unsigned int trigger_grp7 : 1;
430 unsigned int timer_grp1 : 1;
431 unsigned int fifo_in : 1;
432 unsigned int dummy1 : 16;
433} reg_iop_sw_mpu_r_intr_grp1;
434#define REG_RD_ADDR_iop_sw_mpu_r_intr_grp1 108
435
436/* Register r_masked_intr_grp1, scope iop_sw_mpu, type r */
437typedef struct {
438 unsigned int spu_intr4 : 1;
439 unsigned int trigger_grp4 : 1;
440 unsigned int fifo_out_extra : 1;
441 unsigned int dmc_out : 1;
442 unsigned int spu_intr5 : 1;
443 unsigned int trigger_grp5 : 1;
444 unsigned int fifo_in_extra : 1;
445 unsigned int dmc_in : 1;
446 unsigned int spu_intr6 : 1;
447 unsigned int trigger_grp6 : 1;
448 unsigned int timer_grp0 : 1;
449 unsigned int fifo_out : 1;
450 unsigned int spu_intr7 : 1;
451 unsigned int trigger_grp7 : 1;
452 unsigned int timer_grp1 : 1;
453 unsigned int fifo_in : 1;
454 unsigned int dummy1 : 16;
455} reg_iop_sw_mpu_r_masked_intr_grp1;
456#define REG_RD_ADDR_iop_sw_mpu_r_masked_intr_grp1 112
457
458/* Register rw_intr_grp2_mask, scope iop_sw_mpu, type rw */
459typedef struct {
460 unsigned int spu_intr8 : 1;
461 unsigned int trigger_grp0 : 1;
462 unsigned int timer_grp0 : 1;
463 unsigned int fifo_out : 1;
464 unsigned int spu_intr9 : 1;
465 unsigned int trigger_grp1 : 1;
466 unsigned int timer_grp1 : 1;
467 unsigned int fifo_in : 1;
468 unsigned int spu_intr10 : 1;
469 unsigned int trigger_grp2 : 1;
470 unsigned int fifo_out_extra : 1;
471 unsigned int dmc_out : 1;
472 unsigned int spu_intr11 : 1;
473 unsigned int trigger_grp3 : 1;
474 unsigned int fifo_in_extra : 1;
475 unsigned int dmc_in : 1;
476 unsigned int dummy1 : 16;
477} reg_iop_sw_mpu_rw_intr_grp2_mask;
478#define REG_RD_ADDR_iop_sw_mpu_rw_intr_grp2_mask 116
479#define REG_WR_ADDR_iop_sw_mpu_rw_intr_grp2_mask 116
480
481/* Register rw_ack_intr_grp2, scope iop_sw_mpu, type rw */
482typedef struct {
483 unsigned int spu_intr8 : 1;
484 unsigned int dummy1 : 3;
485 unsigned int spu_intr9 : 1;
486 unsigned int dummy2 : 3;
487 unsigned int spu_intr10 : 1;
488 unsigned int dummy3 : 3;
489 unsigned int spu_intr11 : 1;
490 unsigned int dummy4 : 19;
491} reg_iop_sw_mpu_rw_ack_intr_grp2;
492#define REG_RD_ADDR_iop_sw_mpu_rw_ack_intr_grp2 120
493#define REG_WR_ADDR_iop_sw_mpu_rw_ack_intr_grp2 120
494
495/* Register r_intr_grp2, scope iop_sw_mpu, type r */
496typedef struct {
497 unsigned int spu_intr8 : 1;
498 unsigned int trigger_grp0 : 1;
499 unsigned int timer_grp0 : 1;
500 unsigned int fifo_out : 1;
501 unsigned int spu_intr9 : 1;
502 unsigned int trigger_grp1 : 1;
503 unsigned int timer_grp1 : 1;
504 unsigned int fifo_in : 1;
505 unsigned int spu_intr10 : 1;
506 unsigned int trigger_grp2 : 1;
507 unsigned int fifo_out_extra : 1;
508 unsigned int dmc_out : 1;
509 unsigned int spu_intr11 : 1;
510 unsigned int trigger_grp3 : 1;
511 unsigned int fifo_in_extra : 1;
512 unsigned int dmc_in : 1;
513 unsigned int dummy1 : 16;
514} reg_iop_sw_mpu_r_intr_grp2;
515#define REG_RD_ADDR_iop_sw_mpu_r_intr_grp2 124
516
517/* Register r_masked_intr_grp2, scope iop_sw_mpu, type r */
518typedef struct {
519 unsigned int spu_intr8 : 1;
520 unsigned int trigger_grp0 : 1;
521 unsigned int timer_grp0 : 1;
522 unsigned int fifo_out : 1;
523 unsigned int spu_intr9 : 1;
524 unsigned int trigger_grp1 : 1;
525 unsigned int timer_grp1 : 1;
526 unsigned int fifo_in : 1;
527 unsigned int spu_intr10 : 1;
528 unsigned int trigger_grp2 : 1;
529 unsigned int fifo_out_extra : 1;
530 unsigned int dmc_out : 1;
531 unsigned int spu_intr11 : 1;
532 unsigned int trigger_grp3 : 1;
533 unsigned int fifo_in_extra : 1;
534 unsigned int dmc_in : 1;
535 unsigned int dummy1 : 16;
536} reg_iop_sw_mpu_r_masked_intr_grp2;
537#define REG_RD_ADDR_iop_sw_mpu_r_masked_intr_grp2 128
538
539/* Register rw_intr_grp3_mask, scope iop_sw_mpu, type rw */
540typedef struct {
541 unsigned int spu_intr12 : 1;
542 unsigned int trigger_grp4 : 1;
543 unsigned int fifo_out_extra : 1;
544 unsigned int dmc_out : 1;
545 unsigned int spu_intr13 : 1;
546 unsigned int trigger_grp5 : 1;
547 unsigned int fifo_in_extra : 1;
548 unsigned int dmc_in : 1;
549 unsigned int spu_intr14 : 1;
550 unsigned int trigger_grp6 : 1;
551 unsigned int timer_grp0 : 1;
552 unsigned int fifo_out : 1;
553 unsigned int spu_intr15 : 1;
554 unsigned int trigger_grp7 : 1;
555 unsigned int timer_grp1 : 1;
556 unsigned int fifo_in : 1;
557 unsigned int dummy1 : 16;
558} reg_iop_sw_mpu_rw_intr_grp3_mask;
559#define REG_RD_ADDR_iop_sw_mpu_rw_intr_grp3_mask 132
560#define REG_WR_ADDR_iop_sw_mpu_rw_intr_grp3_mask 132
561
562/* Register rw_ack_intr_grp3, scope iop_sw_mpu, type rw */
563typedef struct {
564 unsigned int spu_intr12 : 1;
565 unsigned int dummy1 : 3;
566 unsigned int spu_intr13 : 1;
567 unsigned int dummy2 : 3;
568 unsigned int spu_intr14 : 1;
569 unsigned int dummy3 : 3;
570 unsigned int spu_intr15 : 1;
571 unsigned int dummy4 : 19;
572} reg_iop_sw_mpu_rw_ack_intr_grp3;
573#define REG_RD_ADDR_iop_sw_mpu_rw_ack_intr_grp3 136
574#define REG_WR_ADDR_iop_sw_mpu_rw_ack_intr_grp3 136
575
576/* Register r_intr_grp3, scope iop_sw_mpu, type r */
577typedef struct {
578 unsigned int spu_intr12 : 1;
579 unsigned int trigger_grp4 : 1;
580 unsigned int fifo_out_extra : 1;
581 unsigned int dmc_out : 1;
582 unsigned int spu_intr13 : 1;
583 unsigned int trigger_grp5 : 1;
584 unsigned int fifo_in_extra : 1;
585 unsigned int dmc_in : 1;
586 unsigned int spu_intr14 : 1;
587 unsigned int trigger_grp6 : 1;
588 unsigned int timer_grp0 : 1;
589 unsigned int fifo_out : 1;
590 unsigned int spu_intr15 : 1;
591 unsigned int trigger_grp7 : 1;
592 unsigned int timer_grp1 : 1;
593 unsigned int fifo_in : 1;
594 unsigned int dummy1 : 16;
595} reg_iop_sw_mpu_r_intr_grp3;
596#define REG_RD_ADDR_iop_sw_mpu_r_intr_grp3 140
597
598/* Register r_masked_intr_grp3, scope iop_sw_mpu, type r */
599typedef struct {
600 unsigned int spu_intr12 : 1;
601 unsigned int trigger_grp4 : 1;
602 unsigned int fifo_out_extra : 1;
603 unsigned int dmc_out : 1;
604 unsigned int spu_intr13 : 1;
605 unsigned int trigger_grp5 : 1;
606 unsigned int fifo_in_extra : 1;
607 unsigned int dmc_in : 1;
608 unsigned int spu_intr14 : 1;
609 unsigned int trigger_grp6 : 1;
610 unsigned int timer_grp0 : 1;
611 unsigned int fifo_out : 1;
612 unsigned int spu_intr15 : 1;
613 unsigned int trigger_grp7 : 1;
614 unsigned int timer_grp1 : 1;
615 unsigned int fifo_in : 1;
616 unsigned int dummy1 : 16;
617} reg_iop_sw_mpu_r_masked_intr_grp3;
618#define REG_RD_ADDR_iop_sw_mpu_r_masked_intr_grp3 144
619
620
621/* Constants */
622enum {
623 regk_iop_sw_mpu_copy = 0x00000000,
624 regk_iop_sw_mpu_cpu = 0x00000000,
625 regk_iop_sw_mpu_mpu = 0x00000001,
626 regk_iop_sw_mpu_no = 0x00000000,
627 regk_iop_sw_mpu_nop = 0x00000000,
628 regk_iop_sw_mpu_rd = 0x00000002,
629 regk_iop_sw_mpu_reg_copy = 0x00000001,
630 regk_iop_sw_mpu_rw_bus_clr_mask_default = 0x00000000,
631 regk_iop_sw_mpu_rw_bus_oe_clr_mask_default = 0x00000000,
632 regk_iop_sw_mpu_rw_bus_oe_set_mask_default = 0x00000000,
633 regk_iop_sw_mpu_rw_bus_set_mask_default = 0x00000000,
634 regk_iop_sw_mpu_rw_gio_clr_mask_default = 0x00000000,
635 regk_iop_sw_mpu_rw_gio_oe_clr_mask_default = 0x00000000,
636 regk_iop_sw_mpu_rw_gio_oe_set_mask_default = 0x00000000,
637 regk_iop_sw_mpu_rw_gio_set_mask_default = 0x00000000,
638 regk_iop_sw_mpu_rw_intr_grp0_mask_default = 0x00000000,
639 regk_iop_sw_mpu_rw_intr_grp1_mask_default = 0x00000000,
640 regk_iop_sw_mpu_rw_intr_grp2_mask_default = 0x00000000,
641 regk_iop_sw_mpu_rw_intr_grp3_mask_default = 0x00000000,
642 regk_iop_sw_mpu_rw_sw_cfg_owner_default = 0x00000000,
643 regk_iop_sw_mpu_set = 0x00000001,
644 regk_iop_sw_mpu_spu = 0x00000002,
645 regk_iop_sw_mpu_wr = 0x00000003,
646 regk_iop_sw_mpu_yes = 0x00000001
647};
648#endif /* __iop_sw_mpu_defs_h */
diff --git a/include/asm-cris/arch-v32/mach-a3/hwregs/iop/iop_sw_spu_defs.h b/include/asm-cris/arch-v32/mach-a3/hwregs/iop/iop_sw_spu_defs.h
new file mode 100644
index 000000000000..c8560b865a1a
--- /dev/null
+++ b/include/asm-cris/arch-v32/mach-a3/hwregs/iop/iop_sw_spu_defs.h
@@ -0,0 +1,441 @@
1#ifndef __iop_sw_spu_defs_h
2#define __iop_sw_spu_defs_h
3
4/*
5 * This file is autogenerated from
6 * file: iop_sw_spu.r
7 *
8 * by ../../../tools/rdesc/bin/rdes2c -outfile iop_sw_spu_defs.h iop_sw_spu.r
9 * Any changes here will be lost.
10 *
11 * -*- buffer-read-only: t -*-
12 */
13/* Main access macros */
14#ifndef REG_RD
15#define REG_RD( scope, inst, reg ) \
16 REG_READ( reg_##scope##_##reg, \
17 (inst) + REG_RD_ADDR_##scope##_##reg )
18#endif
19
20#ifndef REG_WR
21#define REG_WR( scope, inst, reg, val ) \
22 REG_WRITE( reg_##scope##_##reg, \
23 (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
24#endif
25
26#ifndef REG_RD_VECT
27#define REG_RD_VECT( scope, inst, reg, index ) \
28 REG_READ( reg_##scope##_##reg, \
29 (inst) + REG_RD_ADDR_##scope##_##reg + \
30 (index) * STRIDE_##scope##_##reg )
31#endif
32
33#ifndef REG_WR_VECT
34#define REG_WR_VECT( scope, inst, reg, index, val ) \
35 REG_WRITE( reg_##scope##_##reg, \
36 (inst) + REG_WR_ADDR_##scope##_##reg + \
37 (index) * STRIDE_##scope##_##reg, (val) )
38#endif
39
40#ifndef REG_RD_INT
41#define REG_RD_INT( scope, inst, reg ) \
42 REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg )
43#endif
44
45#ifndef REG_WR_INT
46#define REG_WR_INT( scope, inst, reg, val ) \
47 REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
48#endif
49
50#ifndef REG_RD_INT_VECT
51#define REG_RD_INT_VECT( scope, inst, reg, index ) \
52 REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg + \
53 (index) * STRIDE_##scope##_##reg )
54#endif
55
56#ifndef REG_WR_INT_VECT
57#define REG_WR_INT_VECT( scope, inst, reg, index, val ) \
58 REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg + \
59 (index) * STRIDE_##scope##_##reg, (val) )
60#endif
61
62#ifndef REG_TYPE_CONV
63#define REG_TYPE_CONV( type, orgtype, val ) \
64 ( { union { orgtype o; type n; } r; r.o = val; r.n; } )
65#endif
66
67#ifndef reg_page_size
68#define reg_page_size 8192
69#endif
70
71#ifndef REG_ADDR
72#define REG_ADDR( scope, inst, reg ) \
73 ( (inst) + REG_RD_ADDR_##scope##_##reg )
74#endif
75
76#ifndef REG_ADDR_VECT
77#define REG_ADDR_VECT( scope, inst, reg, index ) \
78 ( (inst) + REG_RD_ADDR_##scope##_##reg + \
79 (index) * STRIDE_##scope##_##reg )
80#endif
81
82/* C-code for register scope iop_sw_spu */
83
84/* Register r_mpu_trace, scope iop_sw_spu, type r */
85typedef unsigned int reg_iop_sw_spu_r_mpu_trace;
86#define REG_RD_ADDR_iop_sw_spu_r_mpu_trace 0
87
88/* Register rw_mc_ctrl, scope iop_sw_spu, type rw */
89typedef struct {
90 unsigned int keep_owner : 1;
91 unsigned int cmd : 2;
92 unsigned int size : 3;
93 unsigned int wr_spu_mem : 1;
94 unsigned int dummy1 : 25;
95} reg_iop_sw_spu_rw_mc_ctrl;
96#define REG_RD_ADDR_iop_sw_spu_rw_mc_ctrl 4
97#define REG_WR_ADDR_iop_sw_spu_rw_mc_ctrl 4
98
99/* Register rw_mc_data, scope iop_sw_spu, type rw */
100typedef struct {
101 unsigned int val : 32;
102} reg_iop_sw_spu_rw_mc_data;
103#define REG_RD_ADDR_iop_sw_spu_rw_mc_data 8
104#define REG_WR_ADDR_iop_sw_spu_rw_mc_data 8
105
106/* Register rw_mc_addr, scope iop_sw_spu, type rw */
107typedef unsigned int reg_iop_sw_spu_rw_mc_addr;
108#define REG_RD_ADDR_iop_sw_spu_rw_mc_addr 12
109#define REG_WR_ADDR_iop_sw_spu_rw_mc_addr 12
110
111/* Register rs_mc_data, scope iop_sw_spu, type rs */
112typedef unsigned int reg_iop_sw_spu_rs_mc_data;
113#define REG_RD_ADDR_iop_sw_spu_rs_mc_data 16
114
115/* Register r_mc_data, scope iop_sw_spu, type r */
116typedef unsigned int reg_iop_sw_spu_r_mc_data;
117#define REG_RD_ADDR_iop_sw_spu_r_mc_data 20
118
119/* Register r_mc_stat, scope iop_sw_spu, type r */
120typedef struct {
121 unsigned int busy_cpu : 1;
122 unsigned int busy_mpu : 1;
123 unsigned int busy_spu : 1;
124 unsigned int owned_by_cpu : 1;
125 unsigned int owned_by_mpu : 1;
126 unsigned int owned_by_spu : 1;
127 unsigned int dummy1 : 26;
128} reg_iop_sw_spu_r_mc_stat;
129#define REG_RD_ADDR_iop_sw_spu_r_mc_stat 24
130
131/* Register rw_bus_clr_mask, scope iop_sw_spu, type rw */
132typedef struct {
133 unsigned int byte0 : 8;
134 unsigned int byte1 : 8;
135 unsigned int byte2 : 8;
136 unsigned int byte3 : 8;
137} reg_iop_sw_spu_rw_bus_clr_mask;
138#define REG_RD_ADDR_iop_sw_spu_rw_bus_clr_mask 28
139#define REG_WR_ADDR_iop_sw_spu_rw_bus_clr_mask 28
140
141/* Register rw_bus_set_mask, scope iop_sw_spu, type rw */
142typedef struct {
143 unsigned int byte0 : 8;
144 unsigned int byte1 : 8;
145 unsigned int byte2 : 8;
146 unsigned int byte3 : 8;
147} reg_iop_sw_spu_rw_bus_set_mask;
148#define REG_RD_ADDR_iop_sw_spu_rw_bus_set_mask 32
149#define REG_WR_ADDR_iop_sw_spu_rw_bus_set_mask 32
150
151/* Register rw_bus_oe_clr_mask, scope iop_sw_spu, type rw */
152typedef struct {
153 unsigned int byte0 : 1;
154 unsigned int byte1 : 1;
155 unsigned int byte2 : 1;
156 unsigned int byte3 : 1;
157 unsigned int dummy1 : 28;
158} reg_iop_sw_spu_rw_bus_oe_clr_mask;
159#define REG_RD_ADDR_iop_sw_spu_rw_bus_oe_clr_mask 36
160#define REG_WR_ADDR_iop_sw_spu_rw_bus_oe_clr_mask 36
161
162/* Register rw_bus_oe_set_mask, scope iop_sw_spu, type rw */
163typedef struct {
164 unsigned int byte0 : 1;
165 unsigned int byte1 : 1;
166 unsigned int byte2 : 1;
167 unsigned int byte3 : 1;
168 unsigned int dummy1 : 28;
169} reg_iop_sw_spu_rw_bus_oe_set_mask;
170#define REG_RD_ADDR_iop_sw_spu_rw_bus_oe_set_mask 40
171#define REG_WR_ADDR_iop_sw_spu_rw_bus_oe_set_mask 40
172
173/* Register r_bus_in, scope iop_sw_spu, type r */
174typedef unsigned int reg_iop_sw_spu_r_bus_in;
175#define REG_RD_ADDR_iop_sw_spu_r_bus_in 44
176
177/* Register rw_gio_clr_mask, scope iop_sw_spu, type rw */
178typedef struct {
179 unsigned int val : 32;
180} reg_iop_sw_spu_rw_gio_clr_mask;
181#define REG_RD_ADDR_iop_sw_spu_rw_gio_clr_mask 48
182#define REG_WR_ADDR_iop_sw_spu_rw_gio_clr_mask 48
183
184/* Register rw_gio_set_mask, scope iop_sw_spu, type rw */
185typedef struct {
186 unsigned int val : 32;
187} reg_iop_sw_spu_rw_gio_set_mask;
188#define REG_RD_ADDR_iop_sw_spu_rw_gio_set_mask 52
189#define REG_WR_ADDR_iop_sw_spu_rw_gio_set_mask 52
190
191/* Register rw_gio_oe_clr_mask, scope iop_sw_spu, type rw */
192typedef struct {
193 unsigned int val : 32;
194} reg_iop_sw_spu_rw_gio_oe_clr_mask;
195#define REG_RD_ADDR_iop_sw_spu_rw_gio_oe_clr_mask 56
196#define REG_WR_ADDR_iop_sw_spu_rw_gio_oe_clr_mask 56
197
198/* Register rw_gio_oe_set_mask, scope iop_sw_spu, type rw */
199typedef struct {
200 unsigned int val : 32;
201} reg_iop_sw_spu_rw_gio_oe_set_mask;
202#define REG_RD_ADDR_iop_sw_spu_rw_gio_oe_set_mask 60
203#define REG_WR_ADDR_iop_sw_spu_rw_gio_oe_set_mask 60
204
205/* Register r_gio_in, scope iop_sw_spu, type r */
206typedef unsigned int reg_iop_sw_spu_r_gio_in;
207#define REG_RD_ADDR_iop_sw_spu_r_gio_in 64
208
209/* Register rw_bus_clr_mask_lo, scope iop_sw_spu, type rw */
210typedef struct {
211 unsigned int byte0 : 8;
212 unsigned int byte1 : 8;
213 unsigned int dummy1 : 16;
214} reg_iop_sw_spu_rw_bus_clr_mask_lo;
215#define REG_RD_ADDR_iop_sw_spu_rw_bus_clr_mask_lo 68
216#define REG_WR_ADDR_iop_sw_spu_rw_bus_clr_mask_lo 68
217
218/* Register rw_bus_clr_mask_hi, scope iop_sw_spu, type rw */
219typedef struct {
220 unsigned int byte2 : 8;
221 unsigned int byte3 : 8;
222 unsigned int dummy1 : 16;
223} reg_iop_sw_spu_rw_bus_clr_mask_hi;
224#define REG_RD_ADDR_iop_sw_spu_rw_bus_clr_mask_hi 72
225#define REG_WR_ADDR_iop_sw_spu_rw_bus_clr_mask_hi 72
226
227/* Register rw_bus_set_mask_lo, scope iop_sw_spu, type rw */
228typedef struct {
229 unsigned int byte0 : 8;
230 unsigned int byte1 : 8;
231 unsigned int dummy1 : 16;
232} reg_iop_sw_spu_rw_bus_set_mask_lo;
233#define REG_RD_ADDR_iop_sw_spu_rw_bus_set_mask_lo 76
234#define REG_WR_ADDR_iop_sw_spu_rw_bus_set_mask_lo 76
235
236/* Register rw_bus_set_mask_hi, scope iop_sw_spu, type rw */
237typedef struct {
238 unsigned int byte2 : 8;
239 unsigned int byte3 : 8;
240 unsigned int dummy1 : 16;
241} reg_iop_sw_spu_rw_bus_set_mask_hi;
242#define REG_RD_ADDR_iop_sw_spu_rw_bus_set_mask_hi 80
243#define REG_WR_ADDR_iop_sw_spu_rw_bus_set_mask_hi 80
244
245/* Register rw_gio_clr_mask_lo, scope iop_sw_spu, type rw */
246typedef struct {
247 unsigned int val : 16;
248 unsigned int dummy1 : 16;
249} reg_iop_sw_spu_rw_gio_clr_mask_lo;
250#define REG_RD_ADDR_iop_sw_spu_rw_gio_clr_mask_lo 84
251#define REG_WR_ADDR_iop_sw_spu_rw_gio_clr_mask_lo 84
252
253/* Register rw_gio_clr_mask_hi, scope iop_sw_spu, type rw */
254typedef struct {
255 unsigned int val : 16;
256 unsigned int dummy1 : 16;
257} reg_iop_sw_spu_rw_gio_clr_mask_hi;
258#define REG_RD_ADDR_iop_sw_spu_rw_gio_clr_mask_hi 88
259#define REG_WR_ADDR_iop_sw_spu_rw_gio_clr_mask_hi 88
260
261/* Register rw_gio_set_mask_lo, scope iop_sw_spu, type rw */
262typedef struct {
263 unsigned int val : 16;
264 unsigned int dummy1 : 16;
265} reg_iop_sw_spu_rw_gio_set_mask_lo;
266#define REG_RD_ADDR_iop_sw_spu_rw_gio_set_mask_lo 92
267#define REG_WR_ADDR_iop_sw_spu_rw_gio_set_mask_lo 92
268
269/* Register rw_gio_set_mask_hi, scope iop_sw_spu, type rw */
270typedef struct {
271 unsigned int val : 16;
272 unsigned int dummy1 : 16;
273} reg_iop_sw_spu_rw_gio_set_mask_hi;
274#define REG_RD_ADDR_iop_sw_spu_rw_gio_set_mask_hi 96
275#define REG_WR_ADDR_iop_sw_spu_rw_gio_set_mask_hi 96
276
277/* Register rw_gio_oe_clr_mask_lo, scope iop_sw_spu, type rw */
278typedef struct {
279 unsigned int val : 16;
280 unsigned int dummy1 : 16;
281} reg_iop_sw_spu_rw_gio_oe_clr_mask_lo;
282#define REG_RD_ADDR_iop_sw_spu_rw_gio_oe_clr_mask_lo 100
283#define REG_WR_ADDR_iop_sw_spu_rw_gio_oe_clr_mask_lo 100
284
285/* Register rw_gio_oe_clr_mask_hi, scope iop_sw_spu, type rw */
286typedef struct {
287 unsigned int val : 16;
288 unsigned int dummy1 : 16;
289} reg_iop_sw_spu_rw_gio_oe_clr_mask_hi;
290#define REG_RD_ADDR_iop_sw_spu_rw_gio_oe_clr_mask_hi 104
291#define REG_WR_ADDR_iop_sw_spu_rw_gio_oe_clr_mask_hi 104
292
293/* Register rw_gio_oe_set_mask_lo, scope iop_sw_spu, type rw */
294typedef struct {
295 unsigned int val : 16;
296 unsigned int dummy1 : 16;
297} reg_iop_sw_spu_rw_gio_oe_set_mask_lo;
298#define REG_RD_ADDR_iop_sw_spu_rw_gio_oe_set_mask_lo 108
299#define REG_WR_ADDR_iop_sw_spu_rw_gio_oe_set_mask_lo 108
300
301/* Register rw_gio_oe_set_mask_hi, scope iop_sw_spu, type rw */
302typedef struct {
303 unsigned int val : 16;
304 unsigned int dummy1 : 16;
305} reg_iop_sw_spu_rw_gio_oe_set_mask_hi;
306#define REG_RD_ADDR_iop_sw_spu_rw_gio_oe_set_mask_hi 112
307#define REG_WR_ADDR_iop_sw_spu_rw_gio_oe_set_mask_hi 112
308
309/* Register rw_cpu_intr, scope iop_sw_spu, type rw */
310typedef struct {
311 unsigned int intr0 : 1;
312 unsigned int intr1 : 1;
313 unsigned int intr2 : 1;
314 unsigned int intr3 : 1;
315 unsigned int intr4 : 1;
316 unsigned int intr5 : 1;
317 unsigned int intr6 : 1;
318 unsigned int intr7 : 1;
319 unsigned int intr8 : 1;
320 unsigned int intr9 : 1;
321 unsigned int intr10 : 1;
322 unsigned int intr11 : 1;
323 unsigned int intr12 : 1;
324 unsigned int intr13 : 1;
325 unsigned int intr14 : 1;
326 unsigned int intr15 : 1;
327 unsigned int dummy1 : 16;
328} reg_iop_sw_spu_rw_cpu_intr;
329#define REG_RD_ADDR_iop_sw_spu_rw_cpu_intr 116
330#define REG_WR_ADDR_iop_sw_spu_rw_cpu_intr 116
331
332/* Register r_cpu_intr, scope iop_sw_spu, type r */
333typedef struct {
334 unsigned int intr0 : 1;
335 unsigned int intr1 : 1;
336 unsigned int intr2 : 1;
337 unsigned int intr3 : 1;
338 unsigned int intr4 : 1;
339 unsigned int intr5 : 1;
340 unsigned int intr6 : 1;
341 unsigned int intr7 : 1;
342 unsigned int intr8 : 1;
343 unsigned int intr9 : 1;
344 unsigned int intr10 : 1;
345 unsigned int intr11 : 1;
346 unsigned int intr12 : 1;
347 unsigned int intr13 : 1;
348 unsigned int intr14 : 1;
349 unsigned int intr15 : 1;
350 unsigned int dummy1 : 16;
351} reg_iop_sw_spu_r_cpu_intr;
352#define REG_RD_ADDR_iop_sw_spu_r_cpu_intr 120
353
354/* Register r_hw_intr, scope iop_sw_spu, type r */
355typedef struct {
356 unsigned int trigger_grp0 : 1;
357 unsigned int trigger_grp1 : 1;
358 unsigned int trigger_grp2 : 1;
359 unsigned int trigger_grp3 : 1;
360 unsigned int trigger_grp4 : 1;
361 unsigned int trigger_grp5 : 1;
362 unsigned int trigger_grp6 : 1;
363 unsigned int trigger_grp7 : 1;
364 unsigned int timer_grp0 : 1;
365 unsigned int timer_grp1 : 1;
366 unsigned int fifo_out : 1;
367 unsigned int fifo_out_extra : 1;
368 unsigned int fifo_in : 1;
369 unsigned int fifo_in_extra : 1;
370 unsigned int dmc_out : 1;
371 unsigned int dmc_in : 1;
372 unsigned int dummy1 : 16;
373} reg_iop_sw_spu_r_hw_intr;
374#define REG_RD_ADDR_iop_sw_spu_r_hw_intr 124
375
376/* Register rw_mpu_intr, scope iop_sw_spu, type rw */
377typedef struct {
378 unsigned int intr0 : 1;
379 unsigned int intr1 : 1;
380 unsigned int intr2 : 1;
381 unsigned int intr3 : 1;
382 unsigned int intr4 : 1;
383 unsigned int intr5 : 1;
384 unsigned int intr6 : 1;
385 unsigned int intr7 : 1;
386 unsigned int intr8 : 1;
387 unsigned int intr9 : 1;
388 unsigned int intr10 : 1;
389 unsigned int intr11 : 1;
390 unsigned int intr12 : 1;
391 unsigned int intr13 : 1;
392 unsigned int intr14 : 1;
393 unsigned int intr15 : 1;
394 unsigned int dummy1 : 16;
395} reg_iop_sw_spu_rw_mpu_intr;
396#define REG_RD_ADDR_iop_sw_spu_rw_mpu_intr 128
397#define REG_WR_ADDR_iop_sw_spu_rw_mpu_intr 128
398
399/* Register r_mpu_intr, scope iop_sw_spu, type r */
400typedef struct {
401 unsigned int intr0 : 1;
402 unsigned int intr1 : 1;
403 unsigned int intr2 : 1;
404 unsigned int intr3 : 1;
405 unsigned int intr4 : 1;
406 unsigned int intr5 : 1;
407 unsigned int intr6 : 1;
408 unsigned int intr7 : 1;
409 unsigned int intr8 : 1;
410 unsigned int intr9 : 1;
411 unsigned int intr10 : 1;
412 unsigned int intr11 : 1;
413 unsigned int intr12 : 1;
414 unsigned int intr13 : 1;
415 unsigned int intr14 : 1;
416 unsigned int intr15 : 1;
417 unsigned int dummy1 : 16;
418} reg_iop_sw_spu_r_mpu_intr;
419#define REG_RD_ADDR_iop_sw_spu_r_mpu_intr 132
420
421
422/* Constants */
423enum {
424 regk_iop_sw_spu_copy = 0x00000000,
425 regk_iop_sw_spu_no = 0x00000000,
426 regk_iop_sw_spu_nop = 0x00000000,
427 regk_iop_sw_spu_rd = 0x00000002,
428 regk_iop_sw_spu_reg_copy = 0x00000001,
429 regk_iop_sw_spu_rw_bus_clr_mask_default = 0x00000000,
430 regk_iop_sw_spu_rw_bus_oe_clr_mask_default = 0x00000000,
431 regk_iop_sw_spu_rw_bus_oe_set_mask_default = 0x00000000,
432 regk_iop_sw_spu_rw_bus_set_mask_default = 0x00000000,
433 regk_iop_sw_spu_rw_gio_clr_mask_default = 0x00000000,
434 regk_iop_sw_spu_rw_gio_oe_clr_mask_default = 0x00000000,
435 regk_iop_sw_spu_rw_gio_oe_set_mask_default = 0x00000000,
436 regk_iop_sw_spu_rw_gio_set_mask_default = 0x00000000,
437 regk_iop_sw_spu_set = 0x00000001,
438 regk_iop_sw_spu_wr = 0x00000003,
439 regk_iop_sw_spu_yes = 0x00000001
440};
441#endif /* __iop_sw_spu_defs_h */
diff --git a/include/asm-cris/arch-v32/mach-a3/hwregs/iop/iop_version_defs.h b/include/asm-cris/arch-v32/mach-a3/hwregs/iop/iop_version_defs.h
new file mode 100644
index 000000000000..20de425e652b
--- /dev/null
+++ b/include/asm-cris/arch-v32/mach-a3/hwregs/iop/iop_version_defs.h
@@ -0,0 +1,96 @@
1#ifndef __iop_version_defs_h
2#define __iop_version_defs_h
3
4/*
5 * This file is autogenerated from
6 * file: iop_version.r
7 *
8 * by ../../../tools/rdesc/bin/rdes2c -outfile iop_version_defs.h iop_version.r
9 * Any changes here will be lost.
10 *
11 * -*- buffer-read-only: t -*-
12 */
13/* Main access macros */
14#ifndef REG_RD
15#define REG_RD( scope, inst, reg ) \
16 REG_READ( reg_##scope##_##reg, \
17 (inst) + REG_RD_ADDR_##scope##_##reg )
18#endif
19
20#ifndef REG_WR
21#define REG_WR( scope, inst, reg, val ) \
22 REG_WRITE( reg_##scope##_##reg, \
23 (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
24#endif
25
26#ifndef REG_RD_VECT
27#define REG_RD_VECT( scope, inst, reg, index ) \
28 REG_READ( reg_##scope##_##reg, \
29 (inst) + REG_RD_ADDR_##scope##_##reg + \
30 (index) * STRIDE_##scope##_##reg )
31#endif
32
33#ifndef REG_WR_VECT
34#define REG_WR_VECT( scope, inst, reg, index, val ) \
35 REG_WRITE( reg_##scope##_##reg, \
36 (inst) + REG_WR_ADDR_##scope##_##reg + \
37 (index) * STRIDE_##scope##_##reg, (val) )
38#endif
39
40#ifndef REG_RD_INT
41#define REG_RD_INT( scope, inst, reg ) \
42 REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg )
43#endif
44
45#ifndef REG_WR_INT
46#define REG_WR_INT( scope, inst, reg, val ) \
47 REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
48#endif
49
50#ifndef REG_RD_INT_VECT
51#define REG_RD_INT_VECT( scope, inst, reg, index ) \
52 REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg + \
53 (index) * STRIDE_##scope##_##reg )
54#endif
55
56#ifndef REG_WR_INT_VECT
57#define REG_WR_INT_VECT( scope, inst, reg, index, val ) \
58 REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg + \
59 (index) * STRIDE_##scope##_##reg, (val) )
60#endif
61
62#ifndef REG_TYPE_CONV
63#define REG_TYPE_CONV( type, orgtype, val ) \
64 ( { union { orgtype o; type n; } r; r.o = val; r.n; } )
65#endif
66
67#ifndef reg_page_size
68#define reg_page_size 8192
69#endif
70
71#ifndef REG_ADDR
72#define REG_ADDR( scope, inst, reg ) \
73 ( (inst) + REG_RD_ADDR_##scope##_##reg )
74#endif
75
76#ifndef REG_ADDR_VECT
77#define REG_ADDR_VECT( scope, inst, reg, index ) \
78 ( (inst) + REG_RD_ADDR_##scope##_##reg + \
79 (index) * STRIDE_##scope##_##reg )
80#endif
81
82/* C-code for register scope iop_version */
83
84/* Register r_version, scope iop_version, type r */
85typedef struct {
86 unsigned int nr : 8;
87 unsigned int dummy1 : 24;
88} reg_iop_version_r_version;
89#define REG_RD_ADDR_iop_version_r_version 0
90
91
92/* Constants */
93enum {
94 regk_iop_version_v2_0 = 0x00000002
95};
96#endif /* __iop_version_defs_h */
diff --git a/include/asm-cris/arch-v32/mach-a3/hwregs/l2cache_defs.h b/include/asm-cris/arch-v32/mach-a3/hwregs/l2cache_defs.h
new file mode 100644
index 000000000000..243ac3c882cb
--- /dev/null
+++ b/include/asm-cris/arch-v32/mach-a3/hwregs/l2cache_defs.h
@@ -0,0 +1,142 @@
1#ifndef __l2cache_defs_h
2#define __l2cache_defs_h
3
4/*
5 * This file is autogenerated from
6 * file: l2cache.r
7 *
8 * by ../../../tools/rdesc/bin/rdes2c -outfile l2cache_defs.h l2cache.r
9 * Any changes here will be lost.
10 *
11 * -*- buffer-read-only: t -*-
12 */
13/* Main access macros */
14#ifndef REG_RD
15#define REG_RD( scope, inst, reg ) \
16 REG_READ( reg_##scope##_##reg, \
17 (inst) + REG_RD_ADDR_##scope##_##reg )
18#endif
19
20#ifndef REG_WR
21#define REG_WR( scope, inst, reg, val ) \
22 REG_WRITE( reg_##scope##_##reg, \
23 (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
24#endif
25
26#ifndef REG_RD_VECT
27#define REG_RD_VECT( scope, inst, reg, index ) \
28 REG_READ( reg_##scope##_##reg, \
29 (inst) + REG_RD_ADDR_##scope##_##reg + \
30 (index) * STRIDE_##scope##_##reg )
31#endif
32
33#ifndef REG_WR_VECT
34#define REG_WR_VECT( scope, inst, reg, index, val ) \
35 REG_WRITE( reg_##scope##_##reg, \
36 (inst) + REG_WR_ADDR_##scope##_##reg + \
37 (index) * STRIDE_##scope##_##reg, (val) )
38#endif
39
40#ifndef REG_RD_INT
41#define REG_RD_INT( scope, inst, reg ) \
42 REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg )
43#endif
44
45#ifndef REG_WR_INT
46#define REG_WR_INT( scope, inst, reg, val ) \
47 REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
48#endif
49
50#ifndef REG_RD_INT_VECT
51#define REG_RD_INT_VECT( scope, inst, reg, index ) \
52 REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg + \
53 (index) * STRIDE_##scope##_##reg )
54#endif
55
56#ifndef REG_WR_INT_VECT
57#define REG_WR_INT_VECT( scope, inst, reg, index, val ) \
58 REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg + \
59 (index) * STRIDE_##scope##_##reg, (val) )
60#endif
61
62#ifndef REG_TYPE_CONV
63#define REG_TYPE_CONV( type, orgtype, val ) \
64 ( { union { orgtype o; type n; } r; r.o = val; r.n; } )
65#endif
66
67#ifndef reg_page_size
68#define reg_page_size 8192
69#endif
70
71#ifndef REG_ADDR
72#define REG_ADDR( scope, inst, reg ) \
73 ( (inst) + REG_RD_ADDR_##scope##_##reg )
74#endif
75
76#ifndef REG_ADDR_VECT
77#define REG_ADDR_VECT( scope, inst, reg, index ) \
78 ( (inst) + REG_RD_ADDR_##scope##_##reg + \
79 (index) * STRIDE_##scope##_##reg )
80#endif
81
82/* C-code for register scope l2cache */
83
84/* Register rw_cfg, scope l2cache, type rw */
85typedef struct {
86 unsigned int en : 1;
87 unsigned int dummy1 : 31;
88} reg_l2cache_rw_cfg;
89#define REG_RD_ADDR_l2cache_rw_cfg 0
90#define REG_WR_ADDR_l2cache_rw_cfg 0
91
92/* Register rw_ctrl, scope l2cache, type rw */
93typedef struct {
94 unsigned int dummy1 : 7;
95 unsigned int cbase : 9;
96 unsigned int dummy2 : 4;
97 unsigned int csize : 10;
98 unsigned int dummy3 : 2;
99} reg_l2cache_rw_ctrl;
100#define REG_RD_ADDR_l2cache_rw_ctrl 4
101#define REG_WR_ADDR_l2cache_rw_ctrl 4
102
103/* Register rw_idxop, scope l2cache, type rw */
104typedef struct {
105 unsigned int idx : 10;
106 unsigned int dummy1 : 14;
107 unsigned int way : 3;
108 unsigned int dummy2 : 2;
109 unsigned int cmd : 3;
110} reg_l2cache_rw_idxop;
111#define REG_RD_ADDR_l2cache_rw_idxop 8
112#define REG_WR_ADDR_l2cache_rw_idxop 8
113
114/* Register rw_addrop_addr, scope l2cache, type rw */
115typedef struct {
116 unsigned int addr : 32;
117} reg_l2cache_rw_addrop_addr;
118#define REG_RD_ADDR_l2cache_rw_addrop_addr 12
119#define REG_WR_ADDR_l2cache_rw_addrop_addr 12
120
121/* Register rw_addrop_ctrl, scope l2cache, type rw */
122typedef struct {
123 unsigned int size : 16;
124 unsigned int dummy1 : 13;
125 unsigned int cmd : 3;
126} reg_l2cache_rw_addrop_ctrl;
127#define REG_RD_ADDR_l2cache_rw_addrop_ctrl 16
128#define REG_WR_ADDR_l2cache_rw_addrop_ctrl 16
129
130
131/* Constants */
132enum {
133 regk_l2cache_flush = 0x00000001,
134 regk_l2cache_no = 0x00000000,
135 regk_l2cache_rw_addrop_addr_default = 0x00000000,
136 regk_l2cache_rw_addrop_ctrl_default = 0x00000000,
137 regk_l2cache_rw_cfg_default = 0x00000000,
138 regk_l2cache_rw_ctrl_default = 0x00000000,
139 regk_l2cache_rw_idxop_default = 0x00000000,
140 regk_l2cache_yes = 0x00000001
141};
142#endif /* __l2cache_defs_h */
diff --git a/include/asm-cris/arch-v32/mach-a3/hwregs/marb_bar_defs.h b/include/asm-cris/arch-v32/mach-a3/hwregs/marb_bar_defs.h
new file mode 100644
index 000000000000..c0e7628cbf7d
--- /dev/null
+++ b/include/asm-cris/arch-v32/mach-a3/hwregs/marb_bar_defs.h
@@ -0,0 +1,482 @@
1#ifndef __marb_bar_defs_h
2#define __marb_bar_defs_h
3
4/*
5 * This file is autogenerated from
6 * file: marb_bar.r
7 *
8 * by ../../../tools/rdesc/bin/rdes2c -outfile marb_bar_defs.h marb_bar.r
9 * Any changes here will be lost.
10 *
11 * -*- buffer-read-only: t -*-
12 */
13/* Main access macros */
14#ifndef REG_RD
15#define REG_RD( scope, inst, reg ) \
16 REG_READ( reg_##scope##_##reg, \
17 (inst) + REG_RD_ADDR_##scope##_##reg )
18#endif
19
20#ifndef REG_WR
21#define REG_WR( scope, inst, reg, val ) \
22 REG_WRITE( reg_##scope##_##reg, \
23 (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
24#endif
25
26#ifndef REG_RD_VECT
27#define REG_RD_VECT( scope, inst, reg, index ) \
28 REG_READ( reg_##scope##_##reg, \
29 (inst) + REG_RD_ADDR_##scope##_##reg + \
30 (index) * STRIDE_##scope##_##reg )
31#endif
32
33#ifndef REG_WR_VECT
34#define REG_WR_VECT( scope, inst, reg, index, val ) \
35 REG_WRITE( reg_##scope##_##reg, \
36 (inst) + REG_WR_ADDR_##scope##_##reg + \
37 (index) * STRIDE_##scope##_##reg, (val) )
38#endif
39
40#ifndef REG_RD_INT
41#define REG_RD_INT( scope, inst, reg ) \
42 REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg )
43#endif
44
45#ifndef REG_WR_INT
46#define REG_WR_INT( scope, inst, reg, val ) \
47 REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
48#endif
49
50#ifndef REG_RD_INT_VECT
51#define REG_RD_INT_VECT( scope, inst, reg, index ) \
52 REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg + \
53 (index) * STRIDE_##scope##_##reg )
54#endif
55
56#ifndef REG_WR_INT_VECT
57#define REG_WR_INT_VECT( scope, inst, reg, index, val ) \
58 REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg + \
59 (index) * STRIDE_##scope##_##reg, (val) )
60#endif
61
62#ifndef REG_TYPE_CONV
63#define REG_TYPE_CONV( type, orgtype, val ) \
64 ( { union { orgtype o; type n; } r; r.o = val; r.n; } )
65#endif
66
67#ifndef reg_page_size
68#define reg_page_size 8192
69#endif
70
71#ifndef REG_ADDR
72#define REG_ADDR( scope, inst, reg ) \
73 ( (inst) + REG_RD_ADDR_##scope##_##reg )
74#endif
75
76#ifndef REG_ADDR_VECT
77#define REG_ADDR_VECT( scope, inst, reg, index ) \
78 ( (inst) + REG_RD_ADDR_##scope##_##reg + \
79 (index) * STRIDE_##scope##_##reg )
80#endif
81
82/* C-code for register scope marb_bar */
83
84#define STRIDE_marb_bar_rw_ddr2_slots 4
85/* Register rw_ddr2_slots, scope marb_bar, type rw */
86typedef struct {
87 unsigned int owner : 4;
88 unsigned int dummy1 : 28;
89} reg_marb_bar_rw_ddr2_slots;
90#define REG_RD_ADDR_marb_bar_rw_ddr2_slots 0
91#define REG_WR_ADDR_marb_bar_rw_ddr2_slots 0
92
93/* Register rw_h264_rd_burst, scope marb_bar, type rw */
94typedef struct {
95 unsigned int ddr2_bsize : 2;
96 unsigned int dummy1 : 30;
97} reg_marb_bar_rw_h264_rd_burst;
98#define REG_RD_ADDR_marb_bar_rw_h264_rd_burst 256
99#define REG_WR_ADDR_marb_bar_rw_h264_rd_burst 256
100
101/* Register rw_h264_wr_burst, scope marb_bar, type rw */
102typedef struct {
103 unsigned int ddr2_bsize : 2;
104 unsigned int dummy1 : 30;
105} reg_marb_bar_rw_h264_wr_burst;
106#define REG_RD_ADDR_marb_bar_rw_h264_wr_burst 260
107#define REG_WR_ADDR_marb_bar_rw_h264_wr_burst 260
108
109/* Register rw_ccd_burst, scope marb_bar, type rw */
110typedef struct {
111 unsigned int ddr2_bsize : 2;
112 unsigned int dummy1 : 30;
113} reg_marb_bar_rw_ccd_burst;
114#define REG_RD_ADDR_marb_bar_rw_ccd_burst 264
115#define REG_WR_ADDR_marb_bar_rw_ccd_burst 264
116
117/* Register rw_vin_wr_burst, scope marb_bar, type rw */
118typedef struct {
119 unsigned int ddr2_bsize : 2;
120 unsigned int dummy1 : 30;
121} reg_marb_bar_rw_vin_wr_burst;
122#define REG_RD_ADDR_marb_bar_rw_vin_wr_burst 268
123#define REG_WR_ADDR_marb_bar_rw_vin_wr_burst 268
124
125/* Register rw_vin_rd_burst, scope marb_bar, type rw */
126typedef struct {
127 unsigned int ddr2_bsize : 2;
128 unsigned int dummy1 : 30;
129} reg_marb_bar_rw_vin_rd_burst;
130#define REG_RD_ADDR_marb_bar_rw_vin_rd_burst 272
131#define REG_WR_ADDR_marb_bar_rw_vin_rd_burst 272
132
133/* Register rw_sclr_rd_burst, scope marb_bar, type rw */
134typedef struct {
135 unsigned int ddr2_bsize : 2;
136 unsigned int dummy1 : 30;
137} reg_marb_bar_rw_sclr_rd_burst;
138#define REG_RD_ADDR_marb_bar_rw_sclr_rd_burst 276
139#define REG_WR_ADDR_marb_bar_rw_sclr_rd_burst 276
140
141/* Register rw_vout_burst, scope marb_bar, type rw */
142typedef struct {
143 unsigned int ddr2_bsize : 2;
144 unsigned int dummy1 : 30;
145} reg_marb_bar_rw_vout_burst;
146#define REG_RD_ADDR_marb_bar_rw_vout_burst 280
147#define REG_WR_ADDR_marb_bar_rw_vout_burst 280
148
149/* Register rw_sclr_fifo_burst, scope marb_bar, type rw */
150typedef struct {
151 unsigned int ddr2_bsize : 2;
152 unsigned int dummy1 : 30;
153} reg_marb_bar_rw_sclr_fifo_burst;
154#define REG_RD_ADDR_marb_bar_rw_sclr_fifo_burst 284
155#define REG_WR_ADDR_marb_bar_rw_sclr_fifo_burst 284
156
157/* Register rw_l2cache_burst, scope marb_bar, type rw */
158typedef struct {
159 unsigned int ddr2_bsize : 2;
160 unsigned int dummy1 : 30;
161} reg_marb_bar_rw_l2cache_burst;
162#define REG_RD_ADDR_marb_bar_rw_l2cache_burst 288
163#define REG_WR_ADDR_marb_bar_rw_l2cache_burst 288
164
165/* Register rw_intr_mask, scope marb_bar, type rw */
166typedef struct {
167 unsigned int bp0 : 1;
168 unsigned int bp1 : 1;
169 unsigned int bp2 : 1;
170 unsigned int bp3 : 1;
171 unsigned int dummy1 : 28;
172} reg_marb_bar_rw_intr_mask;
173#define REG_RD_ADDR_marb_bar_rw_intr_mask 292
174#define REG_WR_ADDR_marb_bar_rw_intr_mask 292
175
176/* Register rw_ack_intr, scope marb_bar, type rw */
177typedef struct {
178 unsigned int bp0 : 1;
179 unsigned int bp1 : 1;
180 unsigned int bp2 : 1;
181 unsigned int bp3 : 1;
182 unsigned int dummy1 : 28;
183} reg_marb_bar_rw_ack_intr;
184#define REG_RD_ADDR_marb_bar_rw_ack_intr 296
185#define REG_WR_ADDR_marb_bar_rw_ack_intr 296
186
187/* Register r_intr, scope marb_bar, type r */
188typedef struct {
189 unsigned int bp0 : 1;
190 unsigned int bp1 : 1;
191 unsigned int bp2 : 1;
192 unsigned int bp3 : 1;
193 unsigned int dummy1 : 28;
194} reg_marb_bar_r_intr;
195#define REG_RD_ADDR_marb_bar_r_intr 300
196
197/* Register r_masked_intr, scope marb_bar, type r */
198typedef struct {
199 unsigned int bp0 : 1;
200 unsigned int bp1 : 1;
201 unsigned int bp2 : 1;
202 unsigned int bp3 : 1;
203 unsigned int dummy1 : 28;
204} reg_marb_bar_r_masked_intr;
205#define REG_RD_ADDR_marb_bar_r_masked_intr 304
206
207/* Register rw_stop_mask, scope marb_bar, type rw */
208typedef struct {
209 unsigned int h264_rd : 1;
210 unsigned int h264_wr : 1;
211 unsigned int ccd : 1;
212 unsigned int vin_wr : 1;
213 unsigned int vin_rd : 1;
214 unsigned int sclr_rd : 1;
215 unsigned int vout : 1;
216 unsigned int sclr_fifo : 1;
217 unsigned int l2cache : 1;
218 unsigned int dummy1 : 23;
219} reg_marb_bar_rw_stop_mask;
220#define REG_RD_ADDR_marb_bar_rw_stop_mask 308
221#define REG_WR_ADDR_marb_bar_rw_stop_mask 308
222
223/* Register r_stopped, scope marb_bar, type r */
224typedef struct {
225 unsigned int h264_rd : 1;
226 unsigned int h264_wr : 1;
227 unsigned int ccd : 1;
228 unsigned int vin_wr : 1;
229 unsigned int vin_rd : 1;
230 unsigned int sclr_rd : 1;
231 unsigned int vout : 1;
232 unsigned int sclr_fifo : 1;
233 unsigned int l2cache : 1;
234 unsigned int dummy1 : 23;
235} reg_marb_bar_r_stopped;
236#define REG_RD_ADDR_marb_bar_r_stopped 312
237
238/* Register rw_no_snoop, scope marb_bar, type rw */
239typedef struct {
240 unsigned int h264_rd : 1;
241 unsigned int h264_wr : 1;
242 unsigned int ccd : 1;
243 unsigned int vin_wr : 1;
244 unsigned int vin_rd : 1;
245 unsigned int sclr_rd : 1;
246 unsigned int vout : 1;
247 unsigned int sclr_fifo : 1;
248 unsigned int l2cache : 1;
249 unsigned int dummy1 : 23;
250} reg_marb_bar_rw_no_snoop;
251#define REG_RD_ADDR_marb_bar_rw_no_snoop 576
252#define REG_WR_ADDR_marb_bar_rw_no_snoop 576
253
254
255/* Constants */
256enum {
257 regk_marb_bar_ccd = 0x00000002,
258 regk_marb_bar_h264_rd = 0x00000000,
259 regk_marb_bar_h264_wr = 0x00000001,
260 regk_marb_bar_l2cache = 0x00000008,
261 regk_marb_bar_no = 0x00000000,
262 regk_marb_bar_r_stopped_default = 0x00000000,
263 regk_marb_bar_rw_ccd_burst_default = 0x00000000,
264 regk_marb_bar_rw_ddr2_slots_default = 0x00000000,
265 regk_marb_bar_rw_ddr2_slots_size = 0x00000040,
266 regk_marb_bar_rw_h264_rd_burst_default = 0x00000000,
267 regk_marb_bar_rw_h264_wr_burst_default = 0x00000000,
268 regk_marb_bar_rw_intr_mask_default = 0x00000000,
269 regk_marb_bar_rw_l2cache_burst_default = 0x00000000,
270 regk_marb_bar_rw_no_snoop_default = 0x00000000,
271 regk_marb_bar_rw_sclr_fifo_burst_default = 0x00000000,
272 regk_marb_bar_rw_sclr_rd_burst_default = 0x00000000,
273 regk_marb_bar_rw_stop_mask_default = 0x00000000,
274 regk_marb_bar_rw_vin_rd_burst_default = 0x00000000,
275 regk_marb_bar_rw_vin_wr_burst_default = 0x00000000,
276 regk_marb_bar_rw_vout_burst_default = 0x00000000,
277 regk_marb_bar_sclr_fifo = 0x00000007,
278 regk_marb_bar_sclr_rd = 0x00000005,
279 regk_marb_bar_vin_rd = 0x00000004,
280 regk_marb_bar_vin_wr = 0x00000003,
281 regk_marb_bar_vout = 0x00000006,
282 regk_marb_bar_yes = 0x00000001
283};
284#endif /* __marb_bar_defs_h */
285#ifndef __marb_bar_bp_defs_h
286#define __marb_bar_bp_defs_h
287
288/*
289 * This file is autogenerated from
290 * file: marb_bar.r
291 *
292 * by ../../../tools/rdesc/bin/rdes2c -outfile marb_bar_defs.h marb_bar.r
293 * Any changes here will be lost.
294 *
295 * -*- buffer-read-only: t -*-
296 */
297/* Main access macros */
298#ifndef REG_RD
299#define REG_RD( scope, inst, reg ) \
300 REG_READ( reg_##scope##_##reg, \
301 (inst) + REG_RD_ADDR_##scope##_##reg )
302#endif
303
304#ifndef REG_WR
305#define REG_WR( scope, inst, reg, val ) \
306 REG_WRITE( reg_##scope##_##reg, \
307 (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
308#endif
309
310#ifndef REG_RD_VECT
311#define REG_RD_VECT( scope, inst, reg, index ) \
312 REG_READ( reg_##scope##_##reg, \
313 (inst) + REG_RD_ADDR_##scope##_##reg + \
314 (index) * STRIDE_##scope##_##reg )
315#endif
316
317#ifndef REG_WR_VECT
318#define REG_WR_VECT( scope, inst, reg, index, val ) \
319 REG_WRITE( reg_##scope##_##reg, \
320 (inst) + REG_WR_ADDR_##scope##_##reg + \
321 (index) * STRIDE_##scope##_##reg, (val) )
322#endif
323
324#ifndef REG_RD_INT
325#define REG_RD_INT( scope, inst, reg ) \
326 REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg )
327#endif
328
329#ifndef REG_WR_INT
330#define REG_WR_INT( scope, inst, reg, val ) \
331 REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
332#endif
333
334#ifndef REG_RD_INT_VECT
335#define REG_RD_INT_VECT( scope, inst, reg, index ) \
336 REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg + \
337 (index) * STRIDE_##scope##_##reg )
338#endif
339
340#ifndef REG_WR_INT_VECT
341#define REG_WR_INT_VECT( scope, inst, reg, index, val ) \
342 REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg + \
343 (index) * STRIDE_##scope##_##reg, (val) )
344#endif
345
346#ifndef REG_TYPE_CONV
347#define REG_TYPE_CONV( type, orgtype, val ) \
348 ( { union { orgtype o; type n; } r; r.o = val; r.n; } )
349#endif
350
351#ifndef reg_page_size
352#define reg_page_size 8192
353#endif
354
355#ifndef REG_ADDR
356#define REG_ADDR( scope, inst, reg ) \
357 ( (inst) + REG_RD_ADDR_##scope##_##reg )
358#endif
359
360#ifndef REG_ADDR_VECT
361#define REG_ADDR_VECT( scope, inst, reg, index ) \
362 ( (inst) + REG_RD_ADDR_##scope##_##reg + \
363 (index) * STRIDE_##scope##_##reg )
364#endif
365
366/* C-code for register scope marb_bar_bp */
367
368/* Register rw_first_addr, scope marb_bar_bp, type rw */
369typedef unsigned int reg_marb_bar_bp_rw_first_addr;
370#define REG_RD_ADDR_marb_bar_bp_rw_first_addr 0
371#define REG_WR_ADDR_marb_bar_bp_rw_first_addr 0
372
373/* Register rw_last_addr, scope marb_bar_bp, type rw */
374typedef unsigned int reg_marb_bar_bp_rw_last_addr;
375#define REG_RD_ADDR_marb_bar_bp_rw_last_addr 4
376#define REG_WR_ADDR_marb_bar_bp_rw_last_addr 4
377
378/* Register rw_op, scope marb_bar_bp, type rw */
379typedef struct {
380 unsigned int rd : 1;
381 unsigned int wr : 1;
382 unsigned int rd_excl : 1;
383 unsigned int pri_wr : 1;
384 unsigned int us_rd : 1;
385 unsigned int us_wr : 1;
386 unsigned int us_rd_excl : 1;
387 unsigned int us_pri_wr : 1;
388 unsigned int dummy1 : 24;
389} reg_marb_bar_bp_rw_op;
390#define REG_RD_ADDR_marb_bar_bp_rw_op 8
391#define REG_WR_ADDR_marb_bar_bp_rw_op 8
392
393/* Register rw_clients, scope marb_bar_bp, type rw */
394typedef struct {
395 unsigned int h264_rd : 1;
396 unsigned int h264_wr : 1;
397 unsigned int ccd : 1;
398 unsigned int vin_wr : 1;
399 unsigned int vin_rd : 1;
400 unsigned int sclr_rd : 1;
401 unsigned int vout : 1;
402 unsigned int sclr_fifo : 1;
403 unsigned int l2cache : 1;
404 unsigned int dummy1 : 23;
405} reg_marb_bar_bp_rw_clients;
406#define REG_RD_ADDR_marb_bar_bp_rw_clients 12
407#define REG_WR_ADDR_marb_bar_bp_rw_clients 12
408
409/* Register rw_options, scope marb_bar_bp, type rw */
410typedef struct {
411 unsigned int wrap : 1;
412 unsigned int dummy1 : 31;
413} reg_marb_bar_bp_rw_options;
414#define REG_RD_ADDR_marb_bar_bp_rw_options 16
415#define REG_WR_ADDR_marb_bar_bp_rw_options 16
416
417/* Register r_brk_addr, scope marb_bar_bp, type r */
418typedef unsigned int reg_marb_bar_bp_r_brk_addr;
419#define REG_RD_ADDR_marb_bar_bp_r_brk_addr 20
420
421/* Register r_brk_op, scope marb_bar_bp, type r */
422typedef struct {
423 unsigned int rd : 1;
424 unsigned int wr : 1;
425 unsigned int rd_excl : 1;
426 unsigned int pri_wr : 1;
427 unsigned int us_rd : 1;
428 unsigned int us_wr : 1;
429 unsigned int us_rd_excl : 1;
430 unsigned int us_pri_wr : 1;
431 unsigned int dummy1 : 24;
432} reg_marb_bar_bp_r_brk_op;
433#define REG_RD_ADDR_marb_bar_bp_r_brk_op 24
434
435/* Register r_brk_clients, scope marb_bar_bp, type r */
436typedef struct {
437 unsigned int h264_rd : 1;
438 unsigned int h264_wr : 1;
439 unsigned int ccd : 1;
440 unsigned int vin_wr : 1;
441 unsigned int vin_rd : 1;
442 unsigned int sclr_rd : 1;
443 unsigned int vout : 1;
444 unsigned int sclr_fifo : 1;
445 unsigned int l2cache : 1;
446 unsigned int dummy1 : 23;
447} reg_marb_bar_bp_r_brk_clients;
448#define REG_RD_ADDR_marb_bar_bp_r_brk_clients 28
449
450/* Register r_brk_first_client, scope marb_bar_bp, type r */
451typedef struct {
452 unsigned int h264_rd : 1;
453 unsigned int h264_wr : 1;
454 unsigned int ccd : 1;
455 unsigned int vin_wr : 1;
456 unsigned int vin_rd : 1;
457 unsigned int sclr_rd : 1;
458 unsigned int vout : 1;
459 unsigned int sclr_fifo : 1;
460 unsigned int l2cache : 1;
461 unsigned int dummy1 : 23;
462} reg_marb_bar_bp_r_brk_first_client;
463#define REG_RD_ADDR_marb_bar_bp_r_brk_first_client 32
464
465/* Register r_brk_size, scope marb_bar_bp, type r */
466typedef unsigned int reg_marb_bar_bp_r_brk_size;
467#define REG_RD_ADDR_marb_bar_bp_r_brk_size 36
468
469/* Register rw_ack, scope marb_bar_bp, type rw */
470typedef unsigned int reg_marb_bar_bp_rw_ack;
471#define REG_RD_ADDR_marb_bar_bp_rw_ack 40
472#define REG_WR_ADDR_marb_bar_bp_rw_ack 40
473
474
475/* Constants */
476enum {
477 regk_marb_bar_bp_no = 0x00000000,
478 regk_marb_bar_bp_rw_op_default = 0x00000000,
479 regk_marb_bar_bp_rw_options_default = 0x00000000,
480 regk_marb_bar_bp_yes = 0x00000001
481};
482#endif /* __marb_bar_bp_defs_h */
diff --git a/include/asm-cris/arch-v32/mach-a3/hwregs/marb_foo_defs.h b/include/asm-cris/arch-v32/mach-a3/hwregs/marb_foo_defs.h
new file mode 100644
index 000000000000..2baa833f109a
--- /dev/null
+++ b/include/asm-cris/arch-v32/mach-a3/hwregs/marb_foo_defs.h
@@ -0,0 +1,626 @@
1#ifndef __marb_foo_defs_h
2#define __marb_foo_defs_h
3
4/*
5 * This file is autogenerated from
6 * file: marb_foo.r
7 *
8 * by ../../../tools/rdesc/bin/rdes2c -outfile marb_foo_defs.h marb_foo.r
9 * Any changes here will be lost.
10 *
11 * -*- buffer-read-only: t -*-
12 */
13/* Main access macros */
14#ifndef REG_RD
15#define REG_RD( scope, inst, reg ) \
16 REG_READ( reg_##scope##_##reg, \
17 (inst) + REG_RD_ADDR_##scope##_##reg )
18#endif
19
20#ifndef REG_WR
21#define REG_WR( scope, inst, reg, val ) \
22 REG_WRITE( reg_##scope##_##reg, \
23 (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
24#endif
25
26#ifndef REG_RD_VECT
27#define REG_RD_VECT( scope, inst, reg, index ) \
28 REG_READ( reg_##scope##_##reg, \
29 (inst) + REG_RD_ADDR_##scope##_##reg + \
30 (index) * STRIDE_##scope##_##reg )
31#endif
32
33#ifndef REG_WR_VECT
34#define REG_WR_VECT( scope, inst, reg, index, val ) \
35 REG_WRITE( reg_##scope##_##reg, \
36 (inst) + REG_WR_ADDR_##scope##_##reg + \
37 (index) * STRIDE_##scope##_##reg, (val) )
38#endif
39
40#ifndef REG_RD_INT
41#define REG_RD_INT( scope, inst, reg ) \
42 REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg )
43#endif
44
45#ifndef REG_WR_INT
46#define REG_WR_INT( scope, inst, reg, val ) \
47 REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
48#endif
49
50#ifndef REG_RD_INT_VECT
51#define REG_RD_INT_VECT( scope, inst, reg, index ) \
52 REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg + \
53 (index) * STRIDE_##scope##_##reg )
54#endif
55
56#ifndef REG_WR_INT_VECT
57#define REG_WR_INT_VECT( scope, inst, reg, index, val ) \
58 REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg + \
59 (index) * STRIDE_##scope##_##reg, (val) )
60#endif
61
62#ifndef REG_TYPE_CONV
63#define REG_TYPE_CONV( type, orgtype, val ) \
64 ( { union { orgtype o; type n; } r; r.o = val; r.n; } )
65#endif
66
67#ifndef reg_page_size
68#define reg_page_size 8192
69#endif
70
71#ifndef REG_ADDR
72#define REG_ADDR( scope, inst, reg ) \
73 ( (inst) + REG_RD_ADDR_##scope##_##reg )
74#endif
75
76#ifndef REG_ADDR_VECT
77#define REG_ADDR_VECT( scope, inst, reg, index ) \
78 ( (inst) + REG_RD_ADDR_##scope##_##reg + \
79 (index) * STRIDE_##scope##_##reg )
80#endif
81
82/* C-code for register scope marb_foo */
83
84#define STRIDE_marb_foo_rw_intm_slots 4
85/* Register rw_intm_slots, scope marb_foo, type rw */
86typedef struct {
87 unsigned int owner : 4;
88 unsigned int dummy1 : 28;
89} reg_marb_foo_rw_intm_slots;
90#define REG_RD_ADDR_marb_foo_rw_intm_slots 0
91#define REG_WR_ADDR_marb_foo_rw_intm_slots 0
92
93#define STRIDE_marb_foo_rw_l2_slots 4
94/* Register rw_l2_slots, scope marb_foo, type rw */
95typedef struct {
96 unsigned int owner : 4;
97 unsigned int dummy1 : 28;
98} reg_marb_foo_rw_l2_slots;
99#define REG_RD_ADDR_marb_foo_rw_l2_slots 256
100#define REG_WR_ADDR_marb_foo_rw_l2_slots 256
101
102#define STRIDE_marb_foo_rw_regs_slots 4
103/* Register rw_regs_slots, scope marb_foo, type rw */
104typedef struct {
105 unsigned int owner : 4;
106 unsigned int dummy1 : 28;
107} reg_marb_foo_rw_regs_slots;
108#define REG_RD_ADDR_marb_foo_rw_regs_slots 512
109#define REG_WR_ADDR_marb_foo_rw_regs_slots 512
110
111/* Register rw_sclr_burst, scope marb_foo, type rw */
112typedef struct {
113 unsigned int intm_bsize : 2;
114 unsigned int l2_bsize : 2;
115 unsigned int dummy1 : 28;
116} reg_marb_foo_rw_sclr_burst;
117#define REG_RD_ADDR_marb_foo_rw_sclr_burst 528
118#define REG_WR_ADDR_marb_foo_rw_sclr_burst 528
119
120/* Register rw_dma0_burst, scope marb_foo, type rw */
121typedef struct {
122 unsigned int intm_bsize : 2;
123 unsigned int l2_bsize : 2;
124 unsigned int dummy1 : 28;
125} reg_marb_foo_rw_dma0_burst;
126#define REG_RD_ADDR_marb_foo_rw_dma0_burst 532
127#define REG_WR_ADDR_marb_foo_rw_dma0_burst 532
128
129/* Register rw_dma1_burst, scope marb_foo, type rw */
130typedef struct {
131 unsigned int intm_bsize : 2;
132 unsigned int l2_bsize : 2;
133 unsigned int dummy1 : 28;
134} reg_marb_foo_rw_dma1_burst;
135#define REG_RD_ADDR_marb_foo_rw_dma1_burst 536
136#define REG_WR_ADDR_marb_foo_rw_dma1_burst 536
137
138/* Register rw_dma2_burst, scope marb_foo, type rw */
139typedef struct {
140 unsigned int intm_bsize : 2;
141 unsigned int l2_bsize : 2;
142 unsigned int dummy1 : 28;
143} reg_marb_foo_rw_dma2_burst;
144#define REG_RD_ADDR_marb_foo_rw_dma2_burst 540
145#define REG_WR_ADDR_marb_foo_rw_dma2_burst 540
146
147/* Register rw_dma3_burst, scope marb_foo, type rw */
148typedef struct {
149 unsigned int intm_bsize : 2;
150 unsigned int l2_bsize : 2;
151 unsigned int dummy1 : 28;
152} reg_marb_foo_rw_dma3_burst;
153#define REG_RD_ADDR_marb_foo_rw_dma3_burst 544
154#define REG_WR_ADDR_marb_foo_rw_dma3_burst 544
155
156/* Register rw_dma4_burst, scope marb_foo, type rw */
157typedef struct {
158 unsigned int intm_bsize : 2;
159 unsigned int l2_bsize : 2;
160 unsigned int dummy1 : 28;
161} reg_marb_foo_rw_dma4_burst;
162#define REG_RD_ADDR_marb_foo_rw_dma4_burst 548
163#define REG_WR_ADDR_marb_foo_rw_dma4_burst 548
164
165/* Register rw_dma5_burst, scope marb_foo, type rw */
166typedef struct {
167 unsigned int intm_bsize : 2;
168 unsigned int l2_bsize : 2;
169 unsigned int dummy1 : 28;
170} reg_marb_foo_rw_dma5_burst;
171#define REG_RD_ADDR_marb_foo_rw_dma5_burst 552
172#define REG_WR_ADDR_marb_foo_rw_dma5_burst 552
173
174/* Register rw_dma6_burst, scope marb_foo, type rw */
175typedef struct {
176 unsigned int intm_bsize : 2;
177 unsigned int l2_bsize : 2;
178 unsigned int dummy1 : 28;
179} reg_marb_foo_rw_dma6_burst;
180#define REG_RD_ADDR_marb_foo_rw_dma6_burst 556
181#define REG_WR_ADDR_marb_foo_rw_dma6_burst 556
182
183/* Register rw_dma7_burst, scope marb_foo, type rw */
184typedef struct {
185 unsigned int intm_bsize : 2;
186 unsigned int l2_bsize : 2;
187 unsigned int dummy1 : 28;
188} reg_marb_foo_rw_dma7_burst;
189#define REG_RD_ADDR_marb_foo_rw_dma7_burst 560
190#define REG_WR_ADDR_marb_foo_rw_dma7_burst 560
191
192/* Register rw_dma9_burst, scope marb_foo, type rw */
193typedef struct {
194 unsigned int intm_bsize : 2;
195 unsigned int l2_bsize : 2;
196 unsigned int dummy1 : 28;
197} reg_marb_foo_rw_dma9_burst;
198#define REG_RD_ADDR_marb_foo_rw_dma9_burst 564
199#define REG_WR_ADDR_marb_foo_rw_dma9_burst 564
200
201/* Register rw_dma11_burst, scope marb_foo, type rw */
202typedef struct {
203 unsigned int intm_bsize : 2;
204 unsigned int l2_bsize : 2;
205 unsigned int dummy1 : 28;
206} reg_marb_foo_rw_dma11_burst;
207#define REG_RD_ADDR_marb_foo_rw_dma11_burst 568
208#define REG_WR_ADDR_marb_foo_rw_dma11_burst 568
209
210/* Register rw_cpui_burst, scope marb_foo, type rw */
211typedef struct {
212 unsigned int intm_bsize : 2;
213 unsigned int l2_bsize : 2;
214 unsigned int dummy1 : 28;
215} reg_marb_foo_rw_cpui_burst;
216#define REG_RD_ADDR_marb_foo_rw_cpui_burst 572
217#define REG_WR_ADDR_marb_foo_rw_cpui_burst 572
218
219/* Register rw_cpud_burst, scope marb_foo, type rw */
220typedef struct {
221 unsigned int intm_bsize : 2;
222 unsigned int l2_bsize : 2;
223 unsigned int dummy1 : 28;
224} reg_marb_foo_rw_cpud_burst;
225#define REG_RD_ADDR_marb_foo_rw_cpud_burst 576
226#define REG_WR_ADDR_marb_foo_rw_cpud_burst 576
227
228/* Register rw_iop_burst, scope marb_foo, type rw */
229typedef struct {
230 unsigned int intm_bsize : 2;
231 unsigned int l2_bsize : 2;
232 unsigned int dummy1 : 28;
233} reg_marb_foo_rw_iop_burst;
234#define REG_RD_ADDR_marb_foo_rw_iop_burst 580
235#define REG_WR_ADDR_marb_foo_rw_iop_burst 580
236
237/* Register rw_ccdstat_burst, scope marb_foo, type rw */
238typedef struct {
239 unsigned int intm_bsize : 2;
240 unsigned int l2_bsize : 2;
241 unsigned int dummy1 : 28;
242} reg_marb_foo_rw_ccdstat_burst;
243#define REG_RD_ADDR_marb_foo_rw_ccdstat_burst 584
244#define REG_WR_ADDR_marb_foo_rw_ccdstat_burst 584
245
246/* Register rw_intr_mask, scope marb_foo, type rw */
247typedef struct {
248 unsigned int bp0 : 1;
249 unsigned int bp1 : 1;
250 unsigned int bp2 : 1;
251 unsigned int bp3 : 1;
252 unsigned int dummy1 : 28;
253} reg_marb_foo_rw_intr_mask;
254#define REG_RD_ADDR_marb_foo_rw_intr_mask 588
255#define REG_WR_ADDR_marb_foo_rw_intr_mask 588
256
257/* Register rw_ack_intr, scope marb_foo, type rw */
258typedef struct {
259 unsigned int bp0 : 1;
260 unsigned int bp1 : 1;
261 unsigned int bp2 : 1;
262 unsigned int bp3 : 1;
263 unsigned int dummy1 : 28;
264} reg_marb_foo_rw_ack_intr;
265#define REG_RD_ADDR_marb_foo_rw_ack_intr 592
266#define REG_WR_ADDR_marb_foo_rw_ack_intr 592
267
268/* Register r_intr, scope marb_foo, type r */
269typedef struct {
270 unsigned int bp0 : 1;
271 unsigned int bp1 : 1;
272 unsigned int bp2 : 1;
273 unsigned int bp3 : 1;
274 unsigned int dummy1 : 28;
275} reg_marb_foo_r_intr;
276#define REG_RD_ADDR_marb_foo_r_intr 596
277
278/* Register r_masked_intr, scope marb_foo, type r */
279typedef struct {
280 unsigned int bp0 : 1;
281 unsigned int bp1 : 1;
282 unsigned int bp2 : 1;
283 unsigned int bp3 : 1;
284 unsigned int dummy1 : 28;
285} reg_marb_foo_r_masked_intr;
286#define REG_RD_ADDR_marb_foo_r_masked_intr 600
287
288/* Register rw_stop_mask, scope marb_foo, type rw */
289typedef struct {
290 unsigned int sclr : 1;
291 unsigned int dma0 : 1;
292 unsigned int dma1 : 1;
293 unsigned int dma2 : 1;
294 unsigned int dma3 : 1;
295 unsigned int dma4 : 1;
296 unsigned int dma5 : 1;
297 unsigned int dma6 : 1;
298 unsigned int dma7 : 1;
299 unsigned int dma9 : 1;
300 unsigned int dma11 : 1;
301 unsigned int cpui : 1;
302 unsigned int cpud : 1;
303 unsigned int iop : 1;
304 unsigned int ccdstat : 1;
305 unsigned int dummy1 : 17;
306} reg_marb_foo_rw_stop_mask;
307#define REG_RD_ADDR_marb_foo_rw_stop_mask 604
308#define REG_WR_ADDR_marb_foo_rw_stop_mask 604
309
310/* Register r_stopped, scope marb_foo, type r */
311typedef struct {
312 unsigned int sclr : 1;
313 unsigned int dma0 : 1;
314 unsigned int dma1 : 1;
315 unsigned int dma2 : 1;
316 unsigned int dma3 : 1;
317 unsigned int dma4 : 1;
318 unsigned int dma5 : 1;
319 unsigned int dma6 : 1;
320 unsigned int dma7 : 1;
321 unsigned int dma9 : 1;
322 unsigned int dma11 : 1;
323 unsigned int cpui : 1;
324 unsigned int cpud : 1;
325 unsigned int iop : 1;
326 unsigned int ccdstat : 1;
327 unsigned int dummy1 : 17;
328} reg_marb_foo_r_stopped;
329#define REG_RD_ADDR_marb_foo_r_stopped 608
330
331/* Register rw_no_snoop, scope marb_foo, type rw */
332typedef struct {
333 unsigned int sclr : 1;
334 unsigned int dma0 : 1;
335 unsigned int dma1 : 1;
336 unsigned int dma2 : 1;
337 unsigned int dma3 : 1;
338 unsigned int dma4 : 1;
339 unsigned int dma5 : 1;
340 unsigned int dma6 : 1;
341 unsigned int dma7 : 1;
342 unsigned int dma9 : 1;
343 unsigned int dma11 : 1;
344 unsigned int cpui : 1;
345 unsigned int cpud : 1;
346 unsigned int iop : 1;
347 unsigned int ccdstat : 1;
348 unsigned int dummy1 : 17;
349} reg_marb_foo_rw_no_snoop;
350#define REG_RD_ADDR_marb_foo_rw_no_snoop 896
351#define REG_WR_ADDR_marb_foo_rw_no_snoop 896
352
353/* Register rw_no_snoop_rq, scope marb_foo, type rw */
354typedef struct {
355 unsigned int dummy1 : 11;
356 unsigned int cpui : 1;
357 unsigned int cpud : 1;
358 unsigned int dummy2 : 19;
359} reg_marb_foo_rw_no_snoop_rq;
360#define REG_RD_ADDR_marb_foo_rw_no_snoop_rq 900
361#define REG_WR_ADDR_marb_foo_rw_no_snoop_rq 900
362
363
364/* Constants */
365enum {
366 regk_marb_foo_ccdstat = 0x0000000e,
367 regk_marb_foo_cpud = 0x0000000c,
368 regk_marb_foo_cpui = 0x0000000b,
369 regk_marb_foo_dma0 = 0x00000001,
370 regk_marb_foo_dma1 = 0x00000002,
371 regk_marb_foo_dma11 = 0x0000000a,
372 regk_marb_foo_dma2 = 0x00000003,
373 regk_marb_foo_dma3 = 0x00000004,
374 regk_marb_foo_dma4 = 0x00000005,
375 regk_marb_foo_dma5 = 0x00000006,
376 regk_marb_foo_dma6 = 0x00000007,
377 regk_marb_foo_dma7 = 0x00000008,
378 regk_marb_foo_dma9 = 0x00000009,
379 regk_marb_foo_iop = 0x0000000d,
380 regk_marb_foo_no = 0x00000000,
381 regk_marb_foo_r_stopped_default = 0x00000000,
382 regk_marb_foo_rw_ccdstat_burst_default = 0x00000000,
383 regk_marb_foo_rw_cpud_burst_default = 0x00000000,
384 regk_marb_foo_rw_cpui_burst_default = 0x00000000,
385 regk_marb_foo_rw_dma0_burst_default = 0x00000000,
386 regk_marb_foo_rw_dma11_burst_default = 0x00000000,
387 regk_marb_foo_rw_dma1_burst_default = 0x00000000,
388 regk_marb_foo_rw_dma2_burst_default = 0x00000000,
389 regk_marb_foo_rw_dma3_burst_default = 0x00000000,
390 regk_marb_foo_rw_dma4_burst_default = 0x00000000,
391 regk_marb_foo_rw_dma5_burst_default = 0x00000000,
392 regk_marb_foo_rw_dma6_burst_default = 0x00000000,
393 regk_marb_foo_rw_dma7_burst_default = 0x00000000,
394 regk_marb_foo_rw_dma9_burst_default = 0x00000000,
395 regk_marb_foo_rw_intm_slots_default = 0x00000000,
396 regk_marb_foo_rw_intm_slots_size = 0x00000040,
397 regk_marb_foo_rw_intr_mask_default = 0x00000000,
398 regk_marb_foo_rw_iop_burst_default = 0x00000000,
399 regk_marb_foo_rw_l2_slots_default = 0x00000000,
400 regk_marb_foo_rw_l2_slots_size = 0x00000040,
401 regk_marb_foo_rw_no_snoop_default = 0x00000000,
402 regk_marb_foo_rw_no_snoop_rq_default = 0x00000000,
403 regk_marb_foo_rw_regs_slots_default = 0x00000000,
404 regk_marb_foo_rw_regs_slots_size = 0x00000004,
405 regk_marb_foo_rw_sclr_burst_default = 0x00000000,
406 regk_marb_foo_rw_stop_mask_default = 0x00000000,
407 regk_marb_foo_sclr = 0x00000000,
408 regk_marb_foo_yes = 0x00000001
409};
410#endif /* __marb_foo_defs_h */
411#ifndef __marb_foo_bp_defs_h
412#define __marb_foo_bp_defs_h
413
414/*
415 * This file is autogenerated from
416 * file: marb_foo.r
417 *
418 * by ../../../tools/rdesc/bin/rdes2c -outfile marb_foo_defs.h marb_foo.r
419 * Any changes here will be lost.
420 *
421 * -*- buffer-read-only: t -*-
422 */
423/* Main access macros */
424#ifndef REG_RD
425#define REG_RD( scope, inst, reg ) \
426 REG_READ( reg_##scope##_##reg, \
427 (inst) + REG_RD_ADDR_##scope##_##reg )
428#endif
429
430#ifndef REG_WR
431#define REG_WR( scope, inst, reg, val ) \
432 REG_WRITE( reg_##scope##_##reg, \
433 (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
434#endif
435
436#ifndef REG_RD_VECT
437#define REG_RD_VECT( scope, inst, reg, index ) \
438 REG_READ( reg_##scope##_##reg, \
439 (inst) + REG_RD_ADDR_##scope##_##reg + \
440 (index) * STRIDE_##scope##_##reg )
441#endif
442
443#ifndef REG_WR_VECT
444#define REG_WR_VECT( scope, inst, reg, index, val ) \
445 REG_WRITE( reg_##scope##_##reg, \
446 (inst) + REG_WR_ADDR_##scope##_##reg + \
447 (index) * STRIDE_##scope##_##reg, (val) )
448#endif
449
450#ifndef REG_RD_INT
451#define REG_RD_INT( scope, inst, reg ) \
452 REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg )
453#endif
454
455#ifndef REG_WR_INT
456#define REG_WR_INT( scope, inst, reg, val ) \
457 REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
458#endif
459
460#ifndef REG_RD_INT_VECT
461#define REG_RD_INT_VECT( scope, inst, reg, index ) \
462 REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg + \
463 (index) * STRIDE_##scope##_##reg )
464#endif
465
466#ifndef REG_WR_INT_VECT
467#define REG_WR_INT_VECT( scope, inst, reg, index, val ) \
468 REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg + \
469 (index) * STRIDE_##scope##_##reg, (val) )
470#endif
471
472#ifndef REG_TYPE_CONV
473#define REG_TYPE_CONV( type, orgtype, val ) \
474 ( { union { orgtype o; type n; } r; r.o = val; r.n; } )
475#endif
476
477#ifndef reg_page_size
478#define reg_page_size 8192
479#endif
480
481#ifndef REG_ADDR
482#define REG_ADDR( scope, inst, reg ) \
483 ( (inst) + REG_RD_ADDR_##scope##_##reg )
484#endif
485
486#ifndef REG_ADDR_VECT
487#define REG_ADDR_VECT( scope, inst, reg, index ) \
488 ( (inst) + REG_RD_ADDR_##scope##_##reg + \
489 (index) * STRIDE_##scope##_##reg )
490#endif
491
492/* C-code for register scope marb_foo_bp */
493
494/* Register rw_first_addr, scope marb_foo_bp, type rw */
495typedef unsigned int reg_marb_foo_bp_rw_first_addr;
496#define REG_RD_ADDR_marb_foo_bp_rw_first_addr 0
497#define REG_WR_ADDR_marb_foo_bp_rw_first_addr 0
498
499/* Register rw_last_addr, scope marb_foo_bp, type rw */
500typedef unsigned int reg_marb_foo_bp_rw_last_addr;
501#define REG_RD_ADDR_marb_foo_bp_rw_last_addr 4
502#define REG_WR_ADDR_marb_foo_bp_rw_last_addr 4
503
504/* Register rw_op, scope marb_foo_bp, type rw */
505typedef struct {
506 unsigned int rd : 1;
507 unsigned int wr : 1;
508 unsigned int rd_excl : 1;
509 unsigned int pri_wr : 1;
510 unsigned int us_rd : 1;
511 unsigned int us_wr : 1;
512 unsigned int us_rd_excl : 1;
513 unsigned int us_pri_wr : 1;
514 unsigned int dummy1 : 24;
515} reg_marb_foo_bp_rw_op;
516#define REG_RD_ADDR_marb_foo_bp_rw_op 8
517#define REG_WR_ADDR_marb_foo_bp_rw_op 8
518
519/* Register rw_clients, scope marb_foo_bp, type rw */
520typedef struct {
521 unsigned int sclr : 1;
522 unsigned int dma0 : 1;
523 unsigned int dma1 : 1;
524 unsigned int dma2 : 1;
525 unsigned int dma3 : 1;
526 unsigned int dma4 : 1;
527 unsigned int dma5 : 1;
528 unsigned int dma6 : 1;
529 unsigned int dma7 : 1;
530 unsigned int dma9 : 1;
531 unsigned int dma11 : 1;
532 unsigned int cpui : 1;
533 unsigned int cpud : 1;
534 unsigned int iop : 1;
535 unsigned int ccdstat : 1;
536 unsigned int dummy1 : 17;
537} reg_marb_foo_bp_rw_clients;
538#define REG_RD_ADDR_marb_foo_bp_rw_clients 12
539#define REG_WR_ADDR_marb_foo_bp_rw_clients 12
540
541/* Register rw_options, scope marb_foo_bp, type rw */
542typedef struct {
543 unsigned int wrap : 1;
544 unsigned int dummy1 : 31;
545} reg_marb_foo_bp_rw_options;
546#define REG_RD_ADDR_marb_foo_bp_rw_options 16
547#define REG_WR_ADDR_marb_foo_bp_rw_options 16
548
549/* Register r_brk_addr, scope marb_foo_bp, type r */
550typedef unsigned int reg_marb_foo_bp_r_brk_addr;
551#define REG_RD_ADDR_marb_foo_bp_r_brk_addr 20
552
553/* Register r_brk_op, scope marb_foo_bp, type r */
554typedef struct {
555 unsigned int rd : 1;
556 unsigned int wr : 1;
557 unsigned int rd_excl : 1;
558 unsigned int pri_wr : 1;
559 unsigned int us_rd : 1;
560 unsigned int us_wr : 1;
561 unsigned int us_rd_excl : 1;
562 unsigned int us_pri_wr : 1;
563 unsigned int dummy1 : 24;
564} reg_marb_foo_bp_r_brk_op;
565#define REG_RD_ADDR_marb_foo_bp_r_brk_op 24
566
567/* Register r_brk_clients, scope marb_foo_bp, type r */
568typedef struct {
569 unsigned int sclr : 1;
570 unsigned int dma0 : 1;
571 unsigned int dma1 : 1;
572 unsigned int dma2 : 1;
573 unsigned int dma3 : 1;
574 unsigned int dma4 : 1;
575 unsigned int dma5 : 1;
576 unsigned int dma6 : 1;
577 unsigned int dma7 : 1;
578 unsigned int dma9 : 1;
579 unsigned int dma11 : 1;
580 unsigned int cpui : 1;
581 unsigned int cpud : 1;
582 unsigned int iop : 1;
583 unsigned int ccdstat : 1;
584 unsigned int dummy1 : 17;
585} reg_marb_foo_bp_r_brk_clients;
586#define REG_RD_ADDR_marb_foo_bp_r_brk_clients 28
587
588/* Register r_brk_first_client, scope marb_foo_bp, type r */
589typedef struct {
590 unsigned int sclr : 1;
591 unsigned int dma0 : 1;
592 unsigned int dma1 : 1;
593 unsigned int dma2 : 1;
594 unsigned int dma3 : 1;
595 unsigned int dma4 : 1;
596 unsigned int dma5 : 1;
597 unsigned int dma6 : 1;
598 unsigned int dma7 : 1;
599 unsigned int dma9 : 1;
600 unsigned int dma11 : 1;
601 unsigned int cpui : 1;
602 unsigned int cpud : 1;
603 unsigned int iop : 1;
604 unsigned int ccdstat : 1;
605 unsigned int dummy1 : 17;
606} reg_marb_foo_bp_r_brk_first_client;
607#define REG_RD_ADDR_marb_foo_bp_r_brk_first_client 32
608
609/* Register r_brk_size, scope marb_foo_bp, type r */
610typedef unsigned int reg_marb_foo_bp_r_brk_size;
611#define REG_RD_ADDR_marb_foo_bp_r_brk_size 36
612
613/* Register rw_ack, scope marb_foo_bp, type rw */
614typedef unsigned int reg_marb_foo_bp_rw_ack;
615#define REG_RD_ADDR_marb_foo_bp_rw_ack 40
616#define REG_WR_ADDR_marb_foo_bp_rw_ack 40
617
618
619/* Constants */
620enum {
621 regk_marb_foo_bp_no = 0x00000000,
622 regk_marb_foo_bp_rw_op_default = 0x00000000,
623 regk_marb_foo_bp_rw_options_default = 0x00000000,
624 regk_marb_foo_bp_yes = 0x00000001
625};
626#endif /* __marb_foo_bp_defs_h */
diff --git a/include/asm-cris/arch-v32/mach-a3/hwregs/pinmux_defs.h b/include/asm-cris/arch-v32/mach-a3/hwregs/pinmux_defs.h
new file mode 100644
index 000000000000..4b96cd2cba8a
--- /dev/null
+++ b/include/asm-cris/arch-v32/mach-a3/hwregs/pinmux_defs.h
@@ -0,0 +1,312 @@
1#ifndef __pinmux_defs_h
2#define __pinmux_defs_h
3
4/*
5 * This file is autogenerated from
6 * file: pinmux.r
7 *
8 * by ../../../tools/rdesc/bin/rdes2c -outfile pinmux_defs.h pinmux.r
9 * Any changes here will be lost.
10 *
11 * -*- buffer-read-only: t -*-
12 */
13/* Main access macros */
14#ifndef REG_RD
15#define REG_RD( scope, inst, reg ) \
16 REG_READ( reg_##scope##_##reg, \
17 (inst) + REG_RD_ADDR_##scope##_##reg )
18#endif
19
20#ifndef REG_WR
21#define REG_WR( scope, inst, reg, val ) \
22 REG_WRITE( reg_##scope##_##reg, \
23 (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
24#endif
25
26#ifndef REG_RD_VECT
27#define REG_RD_VECT( scope, inst, reg, index ) \
28 REG_READ( reg_##scope##_##reg, \
29 (inst) + REG_RD_ADDR_##scope##_##reg + \
30 (index) * STRIDE_##scope##_##reg )
31#endif
32
33#ifndef REG_WR_VECT
34#define REG_WR_VECT( scope, inst, reg, index, val ) \
35 REG_WRITE( reg_##scope##_##reg, \
36 (inst) + REG_WR_ADDR_##scope##_##reg + \
37 (index) * STRIDE_##scope##_##reg, (val) )
38#endif
39
40#ifndef REG_RD_INT
41#define REG_RD_INT( scope, inst, reg ) \
42 REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg )
43#endif
44
45#ifndef REG_WR_INT
46#define REG_WR_INT( scope, inst, reg, val ) \
47 REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
48#endif
49
50#ifndef REG_RD_INT_VECT
51#define REG_RD_INT_VECT( scope, inst, reg, index ) \
52 REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg + \
53 (index) * STRIDE_##scope##_##reg )
54#endif
55
56#ifndef REG_WR_INT_VECT
57#define REG_WR_INT_VECT( scope, inst, reg, index, val ) \
58 REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg + \
59 (index) * STRIDE_##scope##_##reg, (val) )
60#endif
61
62#ifndef REG_TYPE_CONV
63#define REG_TYPE_CONV( type, orgtype, val ) \
64 ( { union { orgtype o; type n; } r; r.o = val; r.n; } )
65#endif
66
67#ifndef reg_page_size
68#define reg_page_size 8192
69#endif
70
71#ifndef REG_ADDR
72#define REG_ADDR( scope, inst, reg ) \
73 ( (inst) + REG_RD_ADDR_##scope##_##reg )
74#endif
75
76#ifndef REG_ADDR_VECT
77#define REG_ADDR_VECT( scope, inst, reg, index ) \
78 ( (inst) + REG_RD_ADDR_##scope##_##reg + \
79 (index) * STRIDE_##scope##_##reg )
80#endif
81
82/* C-code for register scope pinmux */
83
84/* Register rw_hwprot, scope pinmux, type rw */
85typedef struct {
86 unsigned int eth : 1;
87 unsigned int eth_mdio : 1;
88 unsigned int geth : 1;
89 unsigned int tg : 1;
90 unsigned int tg_clk : 1;
91 unsigned int vout : 1;
92 unsigned int vout_sync : 1;
93 unsigned int ser1 : 1;
94 unsigned int ser2 : 1;
95 unsigned int ser3 : 1;
96 unsigned int ser4 : 1;
97 unsigned int sser : 1;
98 unsigned int pwm0 : 1;
99 unsigned int pwm1 : 1;
100 unsigned int pwm2 : 1;
101 unsigned int timer0 : 1;
102 unsigned int timer1 : 1;
103 unsigned int pio : 1;
104 unsigned int i2c0 : 1;
105 unsigned int i2c1 : 1;
106 unsigned int i2c1_sda1 : 1;
107 unsigned int i2c1_sda2 : 1;
108 unsigned int i2c1_sda3 : 1;
109 unsigned int i2c1_sen : 1;
110 unsigned int dummy1 : 8;
111} reg_pinmux_rw_hwprot;
112#define REG_RD_ADDR_pinmux_rw_hwprot 0
113#define REG_WR_ADDR_pinmux_rw_hwprot 0
114
115/* Register rw_gio_pa, scope pinmux, type rw */
116typedef struct {
117 unsigned int pa0 : 1;
118 unsigned int pa1 : 1;
119 unsigned int pa2 : 1;
120 unsigned int pa3 : 1;
121 unsigned int pa4 : 1;
122 unsigned int pa5 : 1;
123 unsigned int pa6 : 1;
124 unsigned int pa7 : 1;
125 unsigned int pa8 : 1;
126 unsigned int pa9 : 1;
127 unsigned int pa10 : 1;
128 unsigned int pa11 : 1;
129 unsigned int pa12 : 1;
130 unsigned int pa13 : 1;
131 unsigned int pa14 : 1;
132 unsigned int pa15 : 1;
133 unsigned int pa16 : 1;
134 unsigned int pa17 : 1;
135 unsigned int pa18 : 1;
136 unsigned int pa19 : 1;
137 unsigned int pa20 : 1;
138 unsigned int pa21 : 1;
139 unsigned int pa22 : 1;
140 unsigned int pa23 : 1;
141 unsigned int pa24 : 1;
142 unsigned int pa25 : 1;
143 unsigned int pa26 : 1;
144 unsigned int pa27 : 1;
145 unsigned int pa28 : 1;
146 unsigned int pa29 : 1;
147 unsigned int pa30 : 1;
148 unsigned int pa31 : 1;
149} reg_pinmux_rw_gio_pa;
150#define REG_RD_ADDR_pinmux_rw_gio_pa 4
151#define REG_WR_ADDR_pinmux_rw_gio_pa 4
152
153/* Register rw_gio_pb, scope pinmux, type rw */
154typedef struct {
155 unsigned int pb0 : 1;
156 unsigned int pb1 : 1;
157 unsigned int pb2 : 1;
158 unsigned int pb3 : 1;
159 unsigned int pb4 : 1;
160 unsigned int pb5 : 1;
161 unsigned int pb6 : 1;
162 unsigned int pb7 : 1;
163 unsigned int pb8 : 1;
164 unsigned int pb9 : 1;
165 unsigned int pb10 : 1;
166 unsigned int pb11 : 1;
167 unsigned int pb12 : 1;
168 unsigned int pb13 : 1;
169 unsigned int pb14 : 1;
170 unsigned int pb15 : 1;
171 unsigned int pb16 : 1;
172 unsigned int pb17 : 1;
173 unsigned int pb18 : 1;
174 unsigned int pb19 : 1;
175 unsigned int pb20 : 1;
176 unsigned int pb21 : 1;
177 unsigned int pb22 : 1;
178 unsigned int pb23 : 1;
179 unsigned int pb24 : 1;
180 unsigned int pb25 : 1;
181 unsigned int pb26 : 1;
182 unsigned int pb27 : 1;
183 unsigned int pb28 : 1;
184 unsigned int pb29 : 1;
185 unsigned int pb30 : 1;
186 unsigned int pb31 : 1;
187} reg_pinmux_rw_gio_pb;
188#define REG_RD_ADDR_pinmux_rw_gio_pb 8
189#define REG_WR_ADDR_pinmux_rw_gio_pb 8
190
191/* Register rw_gio_pc, scope pinmux, type rw */
192typedef struct {
193 unsigned int pc0 : 1;
194 unsigned int pc1 : 1;
195 unsigned int pc2 : 1;
196 unsigned int pc3 : 1;
197 unsigned int pc4 : 1;
198 unsigned int pc5 : 1;
199 unsigned int pc6 : 1;
200 unsigned int pc7 : 1;
201 unsigned int pc8 : 1;
202 unsigned int pc9 : 1;
203 unsigned int pc10 : 1;
204 unsigned int pc11 : 1;
205 unsigned int pc12 : 1;
206 unsigned int pc13 : 1;
207 unsigned int pc14 : 1;
208 unsigned int pc15 : 1;
209 unsigned int dummy1 : 16;
210} reg_pinmux_rw_gio_pc;
211#define REG_RD_ADDR_pinmux_rw_gio_pc 12
212#define REG_WR_ADDR_pinmux_rw_gio_pc 12
213
214/* Register rw_iop_pa, scope pinmux, type rw */
215typedef struct {
216 unsigned int pa0 : 1;
217 unsigned int pa1 : 1;
218 unsigned int pa2 : 1;
219 unsigned int pa3 : 1;
220 unsigned int pa4 : 1;
221 unsigned int pa5 : 1;
222 unsigned int pa6 : 1;
223 unsigned int pa7 : 1;
224 unsigned int pa8 : 1;
225 unsigned int pa9 : 1;
226 unsigned int pa10 : 1;
227 unsigned int pa11 : 1;
228 unsigned int pa12 : 1;
229 unsigned int pa13 : 1;
230 unsigned int pa14 : 1;
231 unsigned int pa15 : 1;
232 unsigned int pa16 : 1;
233 unsigned int pa17 : 1;
234 unsigned int pa18 : 1;
235 unsigned int pa19 : 1;
236 unsigned int pa20 : 1;
237 unsigned int pa21 : 1;
238 unsigned int pa22 : 1;
239 unsigned int pa23 : 1;
240 unsigned int pa24 : 1;
241 unsigned int pa25 : 1;
242 unsigned int pa26 : 1;
243 unsigned int pa27 : 1;
244 unsigned int pa28 : 1;
245 unsigned int pa29 : 1;
246 unsigned int pa30 : 1;
247 unsigned int pa31 : 1;
248} reg_pinmux_rw_iop_pa;
249#define REG_RD_ADDR_pinmux_rw_iop_pa 16
250#define REG_WR_ADDR_pinmux_rw_iop_pa 16
251
252/* Register rw_iop_pb, scope pinmux, type rw */
253typedef struct {
254 unsigned int pb0 : 1;
255 unsigned int pb1 : 1;
256 unsigned int pb2 : 1;
257 unsigned int pb3 : 1;
258 unsigned int pb4 : 1;
259 unsigned int pb5 : 1;
260 unsigned int pb6 : 1;
261 unsigned int pb7 : 1;
262 unsigned int dummy1 : 24;
263} reg_pinmux_rw_iop_pb;
264#define REG_RD_ADDR_pinmux_rw_iop_pb 20
265#define REG_WR_ADDR_pinmux_rw_iop_pb 20
266
267/* Register rw_iop_pio, scope pinmux, type rw */
268typedef struct {
269 unsigned int d0 : 1;
270 unsigned int d1 : 1;
271 unsigned int d2 : 1;
272 unsigned int d3 : 1;
273 unsigned int d4 : 1;
274 unsigned int d5 : 1;
275 unsigned int d6 : 1;
276 unsigned int d7 : 1;
277 unsigned int rd_n : 1;
278 unsigned int wr_n : 1;
279 unsigned int a0 : 1;
280 unsigned int a1 : 1;
281 unsigned int ce0_n : 1;
282 unsigned int ce1_n : 1;
283 unsigned int ce2_n : 1;
284 unsigned int rdy : 1;
285 unsigned int dummy1 : 16;
286} reg_pinmux_rw_iop_pio;
287#define REG_RD_ADDR_pinmux_rw_iop_pio 24
288#define REG_WR_ADDR_pinmux_rw_iop_pio 24
289
290/* Register rw_iop_usb, scope pinmux, type rw */
291typedef struct {
292 unsigned int usb0 : 1;
293 unsigned int dummy1 : 31;
294} reg_pinmux_rw_iop_usb;
295#define REG_RD_ADDR_pinmux_rw_iop_usb 28
296#define REG_WR_ADDR_pinmux_rw_iop_usb 28
297
298
299/* Constants */
300enum {
301 regk_pinmux_no = 0x00000000,
302 regk_pinmux_rw_gio_pa_default = 0x00000000,
303 regk_pinmux_rw_gio_pb_default = 0x00000000,
304 regk_pinmux_rw_gio_pc_default = 0x00000000,
305 regk_pinmux_rw_hwprot_default = 0x00000000,
306 regk_pinmux_rw_iop_pa_default = 0x00000000,
307 regk_pinmux_rw_iop_pb_default = 0x00000000,
308 regk_pinmux_rw_iop_pio_default = 0x00000000,
309 regk_pinmux_rw_iop_usb_default = 0x00000001,
310 regk_pinmux_yes = 0x00000001
311};
312#endif /* __pinmux_defs_h */
diff --git a/include/asm-cris/arch-v32/mach-a3/hwregs/pio_defs.h b/include/asm-cris/arch-v32/mach-a3/hwregs/pio_defs.h
new file mode 100644
index 000000000000..2d8e4b4cc602
--- /dev/null
+++ b/include/asm-cris/arch-v32/mach-a3/hwregs/pio_defs.h
@@ -0,0 +1,371 @@
1#ifndef __pio_defs_h
2#define __pio_defs_h
3
4/*
5 * This file is autogenerated from
6 * file: pio.r
7 *
8 * by ../../../tools/rdesc/bin/rdes2c -outfile pio_defs.h pio.r
9 * Any changes here will be lost.
10 *
11 * -*- buffer-read-only: t -*-
12 */
13/* Main access macros */
14#ifndef REG_RD
15#define REG_RD( scope, inst, reg ) \
16 REG_READ( reg_##scope##_##reg, \
17 (inst) + REG_RD_ADDR_##scope##_##reg )
18#endif
19
20#ifndef REG_WR
21#define REG_WR( scope, inst, reg, val ) \
22 REG_WRITE( reg_##scope##_##reg, \
23 (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
24#endif
25
26#ifndef REG_RD_VECT
27#define REG_RD_VECT( scope, inst, reg, index ) \
28 REG_READ( reg_##scope##_##reg, \
29 (inst) + REG_RD_ADDR_##scope##_##reg + \
30 (index) * STRIDE_##scope##_##reg )
31#endif
32
33#ifndef REG_WR_VECT
34#define REG_WR_VECT( scope, inst, reg, index, val ) \
35 REG_WRITE( reg_##scope##_##reg, \
36 (inst) + REG_WR_ADDR_##scope##_##reg + \
37 (index) * STRIDE_##scope##_##reg, (val) )
38#endif
39
40#ifndef REG_RD_INT
41#define REG_RD_INT( scope, inst, reg ) \
42 REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg )
43#endif
44
45#ifndef REG_WR_INT
46#define REG_WR_INT( scope, inst, reg, val ) \
47 REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
48#endif
49
50#ifndef REG_RD_INT_VECT
51#define REG_RD_INT_VECT( scope, inst, reg, index ) \
52 REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg + \
53 (index) * STRIDE_##scope##_##reg )
54#endif
55
56#ifndef REG_WR_INT_VECT
57#define REG_WR_INT_VECT( scope, inst, reg, index, val ) \
58 REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg + \
59 (index) * STRIDE_##scope##_##reg, (val) )
60#endif
61
62#ifndef REG_TYPE_CONV
63#define REG_TYPE_CONV( type, orgtype, val ) \
64 ( { union { orgtype o; type n; } r; r.o = val; r.n; } )
65#endif
66
67#ifndef reg_page_size
68#define reg_page_size 8192
69#endif
70
71#ifndef REG_ADDR
72#define REG_ADDR( scope, inst, reg ) \
73 ( (inst) + REG_RD_ADDR_##scope##_##reg )
74#endif
75
76#ifndef REG_ADDR_VECT
77#define REG_ADDR_VECT( scope, inst, reg, index ) \
78 ( (inst) + REG_RD_ADDR_##scope##_##reg + \
79 (index) * STRIDE_##scope##_##reg )
80#endif
81
82/* C-code for register scope pio */
83
84/* Register rw_data, scope pio, type rw */
85typedef unsigned int reg_pio_rw_data;
86#define REG_RD_ADDR_pio_rw_data 64
87#define REG_WR_ADDR_pio_rw_data 64
88
89/* Register rw_io_access0, scope pio, type rw */
90typedef struct {
91 unsigned int data : 8;
92 unsigned int dummy1 : 24;
93} reg_pio_rw_io_access0;
94#define REG_RD_ADDR_pio_rw_io_access0 0
95#define REG_WR_ADDR_pio_rw_io_access0 0
96
97/* Register rw_io_access1, scope pio, type rw */
98typedef struct {
99 unsigned int data : 8;
100 unsigned int dummy1 : 24;
101} reg_pio_rw_io_access1;
102#define REG_RD_ADDR_pio_rw_io_access1 4
103#define REG_WR_ADDR_pio_rw_io_access1 4
104
105/* Register rw_io_access2, scope pio, type rw */
106typedef struct {
107 unsigned int data : 8;
108 unsigned int dummy1 : 24;
109} reg_pio_rw_io_access2;
110#define REG_RD_ADDR_pio_rw_io_access2 8
111#define REG_WR_ADDR_pio_rw_io_access2 8
112
113/* Register rw_io_access3, scope pio, type rw */
114typedef struct {
115 unsigned int data : 8;
116 unsigned int dummy1 : 24;
117} reg_pio_rw_io_access3;
118#define REG_RD_ADDR_pio_rw_io_access3 12
119#define REG_WR_ADDR_pio_rw_io_access3 12
120
121/* Register rw_io_access4, scope pio, type rw */
122typedef struct {
123 unsigned int data : 8;
124 unsigned int dummy1 : 24;
125} reg_pio_rw_io_access4;
126#define REG_RD_ADDR_pio_rw_io_access4 16
127#define REG_WR_ADDR_pio_rw_io_access4 16
128
129/* Register rw_io_access5, scope pio, type rw */
130typedef struct {
131 unsigned int data : 8;
132 unsigned int dummy1 : 24;
133} reg_pio_rw_io_access5;
134#define REG_RD_ADDR_pio_rw_io_access5 20
135#define REG_WR_ADDR_pio_rw_io_access5 20
136
137/* Register rw_io_access6, scope pio, type rw */
138typedef struct {
139 unsigned int data : 8;
140 unsigned int dummy1 : 24;
141} reg_pio_rw_io_access6;
142#define REG_RD_ADDR_pio_rw_io_access6 24
143#define REG_WR_ADDR_pio_rw_io_access6 24
144
145/* Register rw_io_access7, scope pio, type rw */
146typedef struct {
147 unsigned int data : 8;
148 unsigned int dummy1 : 24;
149} reg_pio_rw_io_access7;
150#define REG_RD_ADDR_pio_rw_io_access7 28
151#define REG_WR_ADDR_pio_rw_io_access7 28
152
153/* Register rw_io_access8, scope pio, type rw */
154typedef struct {
155 unsigned int data : 8;
156 unsigned int dummy1 : 24;
157} reg_pio_rw_io_access8;
158#define REG_RD_ADDR_pio_rw_io_access8 32
159#define REG_WR_ADDR_pio_rw_io_access8 32
160
161/* Register rw_io_access9, scope pio, type rw */
162typedef struct {
163 unsigned int data : 8;
164 unsigned int dummy1 : 24;
165} reg_pio_rw_io_access9;
166#define REG_RD_ADDR_pio_rw_io_access9 36
167#define REG_WR_ADDR_pio_rw_io_access9 36
168
169/* Register rw_io_access10, scope pio, type rw */
170typedef struct {
171 unsigned int data : 8;
172 unsigned int dummy1 : 24;
173} reg_pio_rw_io_access10;
174#define REG_RD_ADDR_pio_rw_io_access10 40
175#define REG_WR_ADDR_pio_rw_io_access10 40
176
177/* Register rw_io_access11, scope pio, type rw */
178typedef struct {
179 unsigned int data : 8;
180 unsigned int dummy1 : 24;
181} reg_pio_rw_io_access11;
182#define REG_RD_ADDR_pio_rw_io_access11 44
183#define REG_WR_ADDR_pio_rw_io_access11 44
184
185/* Register rw_io_access12, scope pio, type rw */
186typedef struct {
187 unsigned int data : 8;
188 unsigned int dummy1 : 24;
189} reg_pio_rw_io_access12;
190#define REG_RD_ADDR_pio_rw_io_access12 48
191#define REG_WR_ADDR_pio_rw_io_access12 48
192
193/* Register rw_io_access13, scope pio, type rw */
194typedef struct {
195 unsigned int data : 8;
196 unsigned int dummy1 : 24;
197} reg_pio_rw_io_access13;
198#define REG_RD_ADDR_pio_rw_io_access13 52
199#define REG_WR_ADDR_pio_rw_io_access13 52
200
201/* Register rw_io_access14, scope pio, type rw */
202typedef struct {
203 unsigned int data : 8;
204 unsigned int dummy1 : 24;
205} reg_pio_rw_io_access14;
206#define REG_RD_ADDR_pio_rw_io_access14 56
207#define REG_WR_ADDR_pio_rw_io_access14 56
208
209/* Register rw_io_access15, scope pio, type rw */
210typedef struct {
211 unsigned int data : 8;
212 unsigned int dummy1 : 24;
213} reg_pio_rw_io_access15;
214#define REG_RD_ADDR_pio_rw_io_access15 60
215#define REG_WR_ADDR_pio_rw_io_access15 60
216
217/* Register rw_ce0_cfg, scope pio, type rw */
218typedef struct {
219 unsigned int lw : 6;
220 unsigned int ew : 3;
221 unsigned int zw : 3;
222 unsigned int aw : 2;
223 unsigned int mode : 2;
224 unsigned int dummy1 : 16;
225} reg_pio_rw_ce0_cfg;
226#define REG_RD_ADDR_pio_rw_ce0_cfg 68
227#define REG_WR_ADDR_pio_rw_ce0_cfg 68
228
229/* Register rw_ce1_cfg, scope pio, type rw */
230typedef struct {
231 unsigned int lw : 6;
232 unsigned int ew : 3;
233 unsigned int zw : 3;
234 unsigned int aw : 2;
235 unsigned int mode : 2;
236 unsigned int dummy1 : 16;
237} reg_pio_rw_ce1_cfg;
238#define REG_RD_ADDR_pio_rw_ce1_cfg 72
239#define REG_WR_ADDR_pio_rw_ce1_cfg 72
240
241/* Register rw_ce2_cfg, scope pio, type rw */
242typedef struct {
243 unsigned int lw : 6;
244 unsigned int ew : 3;
245 unsigned int zw : 3;
246 unsigned int aw : 2;
247 unsigned int mode : 2;
248 unsigned int dummy1 : 16;
249} reg_pio_rw_ce2_cfg;
250#define REG_RD_ADDR_pio_rw_ce2_cfg 76
251#define REG_WR_ADDR_pio_rw_ce2_cfg 76
252
253/* Register rw_dout, scope pio, type rw */
254typedef struct {
255 unsigned int data : 8;
256 unsigned int rd_n : 1;
257 unsigned int wr_n : 1;
258 unsigned int a0 : 1;
259 unsigned int a1 : 1;
260 unsigned int ce0_n : 1;
261 unsigned int ce1_n : 1;
262 unsigned int ce2_n : 1;
263 unsigned int rdy : 1;
264 unsigned int dummy1 : 16;
265} reg_pio_rw_dout;
266#define REG_RD_ADDR_pio_rw_dout 80
267#define REG_WR_ADDR_pio_rw_dout 80
268
269/* Register rw_oe, scope pio, type rw */
270typedef struct {
271 unsigned int data : 8;
272 unsigned int rd_n : 1;
273 unsigned int wr_n : 1;
274 unsigned int a0 : 1;
275 unsigned int a1 : 1;
276 unsigned int ce0_n : 1;
277 unsigned int ce1_n : 1;
278 unsigned int ce2_n : 1;
279 unsigned int rdy : 1;
280 unsigned int dummy1 : 16;
281} reg_pio_rw_oe;
282#define REG_RD_ADDR_pio_rw_oe 84
283#define REG_WR_ADDR_pio_rw_oe 84
284
285/* Register rw_man_ctrl, scope pio, type rw */
286typedef struct {
287 unsigned int data : 8;
288 unsigned int rd_n : 1;
289 unsigned int wr_n : 1;
290 unsigned int a0 : 1;
291 unsigned int a1 : 1;
292 unsigned int ce0_n : 1;
293 unsigned int ce1_n : 1;
294 unsigned int ce2_n : 1;
295 unsigned int rdy : 1;
296 unsigned int dummy1 : 16;
297} reg_pio_rw_man_ctrl;
298#define REG_RD_ADDR_pio_rw_man_ctrl 88
299#define REG_WR_ADDR_pio_rw_man_ctrl 88
300
301/* Register r_din, scope pio, type r */
302typedef struct {
303 unsigned int data : 8;
304 unsigned int rd_n : 1;
305 unsigned int wr_n : 1;
306 unsigned int a0 : 1;
307 unsigned int a1 : 1;
308 unsigned int ce0_n : 1;
309 unsigned int ce1_n : 1;
310 unsigned int ce2_n : 1;
311 unsigned int rdy : 1;
312 unsigned int dummy1 : 16;
313} reg_pio_r_din;
314#define REG_RD_ADDR_pio_r_din 92
315
316/* Register r_stat, scope pio, type r */
317typedef struct {
318 unsigned int busy : 1;
319 unsigned int dummy1 : 31;
320} reg_pio_r_stat;
321#define REG_RD_ADDR_pio_r_stat 96
322
323/* Register rw_intr_mask, scope pio, type rw */
324typedef struct {
325 unsigned int rdy : 1;
326 unsigned int dummy1 : 31;
327} reg_pio_rw_intr_mask;
328#define REG_RD_ADDR_pio_rw_intr_mask 100
329#define REG_WR_ADDR_pio_rw_intr_mask 100
330
331/* Register rw_ack_intr, scope pio, type rw */
332typedef struct {
333 unsigned int rdy : 1;
334 unsigned int dummy1 : 31;
335} reg_pio_rw_ack_intr;
336#define REG_RD_ADDR_pio_rw_ack_intr 104
337#define REG_WR_ADDR_pio_rw_ack_intr 104
338
339/* Register r_intr, scope pio, type r */
340typedef struct {
341 unsigned int rdy : 1;
342 unsigned int dummy1 : 31;
343} reg_pio_r_intr;
344#define REG_RD_ADDR_pio_r_intr 108
345
346/* Register r_masked_intr, scope pio, type r */
347typedef struct {
348 unsigned int rdy : 1;
349 unsigned int dummy1 : 31;
350} reg_pio_r_masked_intr;
351#define REG_RD_ADDR_pio_r_masked_intr 112
352
353
354/* Constants */
355enum {
356 regk_pio_a2 = 0x00000003,
357 regk_pio_no = 0x00000000,
358 regk_pio_normal = 0x00000000,
359 regk_pio_rd = 0x00000001,
360 regk_pio_rw_ce0_cfg_default = 0x00000000,
361 regk_pio_rw_ce1_cfg_default = 0x00000000,
362 regk_pio_rw_ce2_cfg_default = 0x00000000,
363 regk_pio_rw_intr_mask_default = 0x00000000,
364 regk_pio_rw_man_ctrl_default = 0x00000000,
365 regk_pio_rw_oe_default = 0x00000000,
366 regk_pio_wr = 0x00000002,
367 regk_pio_wr_ce2 = 0x00000003,
368 regk_pio_yes = 0x00000001,
369 regk_pio_yes_all = 0x000000ff
370};
371#endif /* __pio_defs_h */
diff --git a/include/asm-cris/arch-v32/mach-a3/hwregs/reg_map.h b/include/asm-cris/arch-v32/mach-a3/hwregs/reg_map.h
new file mode 100644
index 000000000000..36e59d6e96b6
--- /dev/null
+++ b/include/asm-cris/arch-v32/mach-a3/hwregs/reg_map.h
@@ -0,0 +1,103 @@
1#ifndef __reg_map_h
2#define __reg_map_h
3
4/*
5 * This file is autogenerated from
6 * file: reg.rmap
7 *
8 * by ../../../tools/rdesc/bin/rdes2c -base 0xb0000000 -map marb_bar.r marb_foo.r ccd_top.r ccd_stat.r ccd_tg.r ccd_dp.r ccd.r iop_sap_in.r iop_sap_out.r iop_sw_cfg.r iop_sw_cpu.r iop_sw_mpu.r iop_sw_spu.r iop_version.r iop_crc_par.r iop_dmc_in.r iop_dmc_out.r iop_fifo_in_extra.r iop_fifo_in.r iop_fifo_out_extra.r iop_fifo_out.r iop_mc.r iop_mpu.r iop_scrc_in.r iop_scrc_out.r iop_spu.r iop_timer_grp.r iop_trigger_grp.r iop.r -outfile reg_map.h reg.rmap
9 * Any changes here will be lost.
10 *
11 * -*- buffer-read-only: t -*-
12 */
13typedef enum {
14 regi_ccd = 0xb0000000,
15 regi_ccd_top = 0xb0000000,
16 regi_ccd_dp = 0xb0000400,
17 regi_ccd_stat = 0xb0000800,
18 regi_ccd_tg = 0xb0001000,
19 regi_cfg = 0xb0002000,
20 regi_clkgen = 0xb0004000,
21 regi_ddr2_ctrl = 0xb0006000,
22 regi_dma0 = 0xb0008000,
23 regi_dma1 = 0xb000a000,
24 regi_dma11 = 0xb000c000,
25 regi_dma2 = 0xb000e000,
26 regi_dma3 = 0xb0010000,
27 regi_dma4 = 0xb0012000,
28 regi_dma5 = 0xb0014000,
29 regi_dma6 = 0xb0016000,
30 regi_dma7 = 0xb0018000,
31 regi_dma9 = 0xb001a000,
32 regi_eth = 0xb001c000,
33 regi_gio = 0xb0020000,
34 regi_h264 = 0xb0022000,
35 regi_hist = 0xb0026000,
36 regi_iop = 0xb0028000,
37 regi_iop_version = 0xb0028000,
38 regi_iop_fifo_in_extra = 0xb0028040,
39 regi_iop_fifo_out_extra = 0xb0028080,
40 regi_iop_trigger_grp0 = 0xb00280c0,
41 regi_iop_trigger_grp1 = 0xb0028100,
42 regi_iop_trigger_grp2 = 0xb0028140,
43 regi_iop_trigger_grp3 = 0xb0028180,
44 regi_iop_trigger_grp4 = 0xb00281c0,
45 regi_iop_trigger_grp5 = 0xb0028200,
46 regi_iop_trigger_grp6 = 0xb0028240,
47 regi_iop_trigger_grp7 = 0xb0028280,
48 regi_iop_crc_par = 0xb0028300,
49 regi_iop_dmc_in = 0xb0028380,
50 regi_iop_dmc_out = 0xb0028400,
51 regi_iop_fifo_in = 0xb0028480,
52 regi_iop_fifo_out = 0xb0028500,
53 regi_iop_scrc_in = 0xb0028580,
54 regi_iop_scrc_out = 0xb0028600,
55 regi_iop_timer_grp0 = 0xb0028680,
56 regi_iop_timer_grp1 = 0xb0028700,
57 regi_iop_sap_in = 0xb0028800,
58 regi_iop_sap_out = 0xb0028900,
59 regi_iop_spu = 0xb0028a00,
60 regi_iop_sw_cfg = 0xb0028b00,
61 regi_iop_sw_cpu = 0xb0028c00,
62 regi_iop_sw_mpu = 0xb0028d00,
63 regi_iop_sw_spu = 0xb0028e00,
64 regi_iop_mpu = 0xb0029000,
65 regi_irq = 0xb002a000,
66 regi_irq2 = 0xb006a000,
67 regi_jpeg = 0xb002c000,
68 regi_l2cache = 0xb0030000,
69 regi_marb_bar = 0xb0032000,
70 regi_marb_bar_bp0 = 0xb0032140,
71 regi_marb_bar_bp1 = 0xb0032180,
72 regi_marb_bar_bp2 = 0xb00321c0,
73 regi_marb_bar_bp3 = 0xb0032200,
74 regi_marb_foo = 0xb0034000,
75 regi_marb_foo_bp0 = 0xb0034280,
76 regi_marb_foo_bp1 = 0xb00342c0,
77 regi_marb_foo_bp2 = 0xb0034300,
78 regi_marb_foo_bp3 = 0xb0034340,
79 regi_pinmux = 0xb0038000,
80 regi_pio = 0xb0036000,
81 regi_sclr = 0xb003a000,
82 regi_sclr_fifo = 0xb003c000,
83 regi_ser0 = 0xb003e000,
84 regi_ser1 = 0xb0040000,
85 regi_ser2 = 0xb0042000,
86 regi_ser3 = 0xb0044000,
87 regi_ser4 = 0xb0046000,
88 regi_sser = 0xb0048000,
89 regi_strcop = 0xb004a000,
90 regi_strdma0 = 0xb004e000,
91 regi_strdma1 = 0xb0050000,
92 regi_strdma2 = 0xb0052000,
93 regi_strdma3 = 0xb0054000,
94 regi_strdma5 = 0xb0056000,
95 regi_strmux = 0xb004c000,
96 regi_timer0 = 0xb0058000,
97 regi_timer1 = 0xb005a000,
98 regi_timer2 = 0xb006e000,
99 regi_trace = 0xb005c000,
100 regi_vin = 0xb005e000,
101 regi_vout = 0xb0060000
102} reg_scope_instances;
103#endif /* __reg_map_h */
diff --git a/include/asm-cris/arch-v32/mach-a3/hwregs/strmux_defs.h b/include/asm-cris/arch-v32/mach-a3/hwregs/strmux_defs.h
new file mode 100644
index 000000000000..14f718a4ecc3
--- /dev/null
+++ b/include/asm-cris/arch-v32/mach-a3/hwregs/strmux_defs.h
@@ -0,0 +1,120 @@
1#ifndef __strmux_defs_h
2#define __strmux_defs_h
3
4/*
5 * This file is autogenerated from
6 * file: strmux.r
7 *
8 * by ../../../tools/rdesc/bin/rdes2c -outfile strmux_defs.h strmux.r
9 * Any changes here will be lost.
10 *
11 * -*- buffer-read-only: t -*-
12 */
13/* Main access macros */
14#ifndef REG_RD
15#define REG_RD( scope, inst, reg ) \
16 REG_READ( reg_##scope##_##reg, \
17 (inst) + REG_RD_ADDR_##scope##_##reg )
18#endif
19
20#ifndef REG_WR
21#define REG_WR( scope, inst, reg, val ) \
22 REG_WRITE( reg_##scope##_##reg, \
23 (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
24#endif
25
26#ifndef REG_RD_VECT
27#define REG_RD_VECT( scope, inst, reg, index ) \
28 REG_READ( reg_##scope##_##reg, \
29 (inst) + REG_RD_ADDR_##scope##_##reg + \
30 (index) * STRIDE_##scope##_##reg )
31#endif
32
33#ifndef REG_WR_VECT
34#define REG_WR_VECT( scope, inst, reg, index, val ) \
35 REG_WRITE( reg_##scope##_##reg, \
36 (inst) + REG_WR_ADDR_##scope##_##reg + \
37 (index) * STRIDE_##scope##_##reg, (val) )
38#endif
39
40#ifndef REG_RD_INT
41#define REG_RD_INT( scope, inst, reg ) \
42 REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg )
43#endif
44
45#ifndef REG_WR_INT
46#define REG_WR_INT( scope, inst, reg, val ) \
47 REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
48#endif
49
50#ifndef REG_RD_INT_VECT
51#define REG_RD_INT_VECT( scope, inst, reg, index ) \
52 REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg + \
53 (index) * STRIDE_##scope##_##reg )
54#endif
55
56#ifndef REG_WR_INT_VECT
57#define REG_WR_INT_VECT( scope, inst, reg, index, val ) \
58 REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg + \
59 (index) * STRIDE_##scope##_##reg, (val) )
60#endif
61
62#ifndef REG_TYPE_CONV
63#define REG_TYPE_CONV( type, orgtype, val ) \
64 ( { union { orgtype o; type n; } r; r.o = val; r.n; } )
65#endif
66
67#ifndef reg_page_size
68#define reg_page_size 8192
69#endif
70
71#ifndef REG_ADDR
72#define REG_ADDR( scope, inst, reg ) \
73 ( (inst) + REG_RD_ADDR_##scope##_##reg )
74#endif
75
76#ifndef REG_ADDR_VECT
77#define REG_ADDR_VECT( scope, inst, reg, index ) \
78 ( (inst) + REG_RD_ADDR_##scope##_##reg + \
79 (index) * STRIDE_##scope##_##reg )
80#endif
81
82/* C-code for register scope strmux */
83
84/* Register rw_cfg, scope strmux, type rw */
85typedef struct {
86 unsigned int dma0 : 2;
87 unsigned int dma1 : 2;
88 unsigned int dma2 : 2;
89 unsigned int dma3 : 2;
90 unsigned int dma4 : 2;
91 unsigned int dma5 : 2;
92 unsigned int dma6 : 2;
93 unsigned int dma7 : 2;
94 unsigned int dummy1 : 2;
95 unsigned int dma9 : 2;
96 unsigned int dummy2 : 2;
97 unsigned int dma11 : 2;
98 unsigned int dummy3 : 8;
99} reg_strmux_rw_cfg;
100#define REG_RD_ADDR_strmux_rw_cfg 0
101#define REG_WR_ADDR_strmux_rw_cfg 0
102
103
104/* Constants */
105enum {
106 regk_strmux_eth = 0x00000001,
107 regk_strmux_h264 = 0x00000001,
108 regk_strmux_iop = 0x00000001,
109 regk_strmux_jpeg = 0x00000001,
110 regk_strmux_off = 0x00000000,
111 regk_strmux_rw_cfg_default = 0x00000000,
112 regk_strmux_ser0 = 0x00000002,
113 regk_strmux_ser1 = 0x00000002,
114 regk_strmux_ser2 = 0x00000002,
115 regk_strmux_ser3 = 0x00000002,
116 regk_strmux_ser4 = 0x00000002,
117 regk_strmux_sser = 0x00000001,
118 regk_strmux_strcop = 0x00000001
119};
120#endif /* __strmux_defs_h */
diff --git a/include/asm-cris/arch-v32/mach-a3/hwregs/timer_defs.h b/include/asm-cris/arch-v32/mach-a3/hwregs/timer_defs.h
new file mode 100644
index 000000000000..2c33e097d60a
--- /dev/null
+++ b/include/asm-cris/arch-v32/mach-a3/hwregs/timer_defs.h
@@ -0,0 +1,265 @@
1#ifndef __timer_defs_h
2#define __timer_defs_h
3
4/*
5 * This file is autogenerated from
6 * file: timer.r
7 *
8 * by ../../../tools/rdesc/bin/rdes2c -outfile timer_defs.h timer.r
9 * Any changes here will be lost.
10 *
11 * -*- buffer-read-only: t -*-
12 */
13/* Main access macros */
14#ifndef REG_RD
15#define REG_RD( scope, inst, reg ) \
16 REG_READ( reg_##scope##_##reg, \
17 (inst) + REG_RD_ADDR_##scope##_##reg )
18#endif
19
20#ifndef REG_WR
21#define REG_WR( scope, inst, reg, val ) \
22 REG_WRITE( reg_##scope##_##reg, \
23 (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
24#endif
25
26#ifndef REG_RD_VECT
27#define REG_RD_VECT( scope, inst, reg, index ) \
28 REG_READ( reg_##scope##_##reg, \
29 (inst) + REG_RD_ADDR_##scope##_##reg + \
30 (index) * STRIDE_##scope##_##reg )
31#endif
32
33#ifndef REG_WR_VECT
34#define REG_WR_VECT( scope, inst, reg, index, val ) \
35 REG_WRITE( reg_##scope##_##reg, \
36 (inst) + REG_WR_ADDR_##scope##_##reg + \
37 (index) * STRIDE_##scope##_##reg, (val) )
38#endif
39
40#ifndef REG_RD_INT
41#define REG_RD_INT( scope, inst, reg ) \
42 REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg )
43#endif
44
45#ifndef REG_WR_INT
46#define REG_WR_INT( scope, inst, reg, val ) \
47 REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
48#endif
49
50#ifndef REG_RD_INT_VECT
51#define REG_RD_INT_VECT( scope, inst, reg, index ) \
52 REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg + \
53 (index) * STRIDE_##scope##_##reg )
54#endif
55
56#ifndef REG_WR_INT_VECT
57#define REG_WR_INT_VECT( scope, inst, reg, index, val ) \
58 REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg + \
59 (index) * STRIDE_##scope##_##reg, (val) )
60#endif
61
62#ifndef REG_TYPE_CONV
63#define REG_TYPE_CONV( type, orgtype, val ) \
64 ( { union { orgtype o; type n; } r; r.o = val; r.n; } )
65#endif
66
67#ifndef reg_page_size
68#define reg_page_size 8192
69#endif
70
71#ifndef REG_ADDR
72#define REG_ADDR( scope, inst, reg ) \
73 ( (inst) + REG_RD_ADDR_##scope##_##reg )
74#endif
75
76#ifndef REG_ADDR_VECT
77#define REG_ADDR_VECT( scope, inst, reg, index ) \
78 ( (inst) + REG_RD_ADDR_##scope##_##reg + \
79 (index) * STRIDE_##scope##_##reg )
80#endif
81
82/* C-code for register scope timer */
83
84/* Register rw_tmr0_div, scope timer, type rw */
85typedef unsigned int reg_timer_rw_tmr0_div;
86#define REG_RD_ADDR_timer_rw_tmr0_div 0
87#define REG_WR_ADDR_timer_rw_tmr0_div 0
88
89/* Register r_tmr0_data, scope timer, type r */
90typedef unsigned int reg_timer_r_tmr0_data;
91#define REG_RD_ADDR_timer_r_tmr0_data 4
92
93/* Register rw_tmr0_ctrl, scope timer, type rw */
94typedef struct {
95 unsigned int op : 2;
96 unsigned int freq : 3;
97 unsigned int dummy1 : 27;
98} reg_timer_rw_tmr0_ctrl;
99#define REG_RD_ADDR_timer_rw_tmr0_ctrl 8
100#define REG_WR_ADDR_timer_rw_tmr0_ctrl 8
101
102/* Register rw_tmr1_div, scope timer, type rw */
103typedef unsigned int reg_timer_rw_tmr1_div;
104#define REG_RD_ADDR_timer_rw_tmr1_div 16
105#define REG_WR_ADDR_timer_rw_tmr1_div 16
106
107/* Register r_tmr1_data, scope timer, type r */
108typedef unsigned int reg_timer_r_tmr1_data;
109#define REG_RD_ADDR_timer_r_tmr1_data 20
110
111/* Register rw_tmr1_ctrl, scope timer, type rw */
112typedef struct {
113 unsigned int op : 2;
114 unsigned int freq : 3;
115 unsigned int dummy1 : 27;
116} reg_timer_rw_tmr1_ctrl;
117#define REG_RD_ADDR_timer_rw_tmr1_ctrl 24
118#define REG_WR_ADDR_timer_rw_tmr1_ctrl 24
119
120/* Register rs_cnt_data, scope timer, type rs */
121typedef struct {
122 unsigned int tmr : 24;
123 unsigned int cnt : 8;
124} reg_timer_rs_cnt_data;
125#define REG_RD_ADDR_timer_rs_cnt_data 32
126
127/* Register r_cnt_data, scope timer, type r */
128typedef struct {
129 unsigned int tmr : 24;
130 unsigned int cnt : 8;
131} reg_timer_r_cnt_data;
132#define REG_RD_ADDR_timer_r_cnt_data 36
133
134/* Register rw_cnt_cfg, scope timer, type rw */
135typedef struct {
136 unsigned int clk : 2;
137 unsigned int dummy1 : 30;
138} reg_timer_rw_cnt_cfg;
139#define REG_RD_ADDR_timer_rw_cnt_cfg 40
140#define REG_WR_ADDR_timer_rw_cnt_cfg 40
141
142/* Register rw_trig, scope timer, type rw */
143typedef unsigned int reg_timer_rw_trig;
144#define REG_RD_ADDR_timer_rw_trig 48
145#define REG_WR_ADDR_timer_rw_trig 48
146
147/* Register rw_trig_cfg, scope timer, type rw */
148typedef struct {
149 unsigned int tmr : 2;
150 unsigned int dummy1 : 30;
151} reg_timer_rw_trig_cfg;
152#define REG_RD_ADDR_timer_rw_trig_cfg 52
153#define REG_WR_ADDR_timer_rw_trig_cfg 52
154
155/* Register r_time, scope timer, type r */
156typedef unsigned int reg_timer_r_time;
157#define REG_RD_ADDR_timer_r_time 56
158
159/* Register rw_out, scope timer, type rw */
160typedef struct {
161 unsigned int tmr : 2;
162 unsigned int dummy1 : 30;
163} reg_timer_rw_out;
164#define REG_RD_ADDR_timer_rw_out 60
165#define REG_WR_ADDR_timer_rw_out 60
166
167/* Register rw_wd_ctrl, scope timer, type rw */
168typedef struct {
169 unsigned int cnt : 8;
170 unsigned int cmd : 1;
171 unsigned int key : 7;
172 unsigned int dummy1 : 16;
173} reg_timer_rw_wd_ctrl;
174#define REG_RD_ADDR_timer_rw_wd_ctrl 64
175#define REG_WR_ADDR_timer_rw_wd_ctrl 64
176
177/* Register r_wd_stat, scope timer, type r */
178typedef struct {
179 unsigned int cnt : 8;
180 unsigned int cmd : 1;
181 unsigned int dummy1 : 23;
182} reg_timer_r_wd_stat;
183#define REG_RD_ADDR_timer_r_wd_stat 68
184
185/* Register rw_intr_mask, scope timer, type rw */
186typedef struct {
187 unsigned int tmr0 : 1;
188 unsigned int tmr1 : 1;
189 unsigned int cnt : 1;
190 unsigned int trig : 1;
191 unsigned int dummy1 : 28;
192} reg_timer_rw_intr_mask;
193#define REG_RD_ADDR_timer_rw_intr_mask 72
194#define REG_WR_ADDR_timer_rw_intr_mask 72
195
196/* Register rw_ack_intr, scope timer, type rw */
197typedef struct {
198 unsigned int tmr0 : 1;
199 unsigned int tmr1 : 1;
200 unsigned int cnt : 1;
201 unsigned int trig : 1;
202 unsigned int dummy1 : 28;
203} reg_timer_rw_ack_intr;
204#define REG_RD_ADDR_timer_rw_ack_intr 76
205#define REG_WR_ADDR_timer_rw_ack_intr 76
206
207/* Register r_intr, scope timer, type r */
208typedef struct {
209 unsigned int tmr0 : 1;
210 unsigned int tmr1 : 1;
211 unsigned int cnt : 1;
212 unsigned int trig : 1;
213 unsigned int dummy1 : 28;
214} reg_timer_r_intr;
215#define REG_RD_ADDR_timer_r_intr 80
216
217/* Register r_masked_intr, scope timer, type r */
218typedef struct {
219 unsigned int tmr0 : 1;
220 unsigned int tmr1 : 1;
221 unsigned int cnt : 1;
222 unsigned int trig : 1;
223 unsigned int dummy1 : 28;
224} reg_timer_r_masked_intr;
225#define REG_RD_ADDR_timer_r_masked_intr 84
226
227/* Register rw_test, scope timer, type rw */
228typedef struct {
229 unsigned int dis : 1;
230 unsigned int en : 1;
231 unsigned int dummy1 : 30;
232} reg_timer_rw_test;
233#define REG_RD_ADDR_timer_rw_test 88
234#define REG_WR_ADDR_timer_rw_test 88
235
236
237/* Constants */
238enum {
239 regk_timer_ext = 0x00000001,
240 regk_timer_f100 = 0x00000007,
241 regk_timer_f29_493 = 0x00000004,
242 regk_timer_f32 = 0x00000005,
243 regk_timer_f32_768 = 0x00000006,
244 regk_timer_f90 = 0x00000003,
245 regk_timer_hold = 0x00000001,
246 regk_timer_ld = 0x00000000,
247 regk_timer_no = 0x00000000,
248 regk_timer_off = 0x00000000,
249 regk_timer_run = 0x00000002,
250 regk_timer_rw_cnt_cfg_default = 0x00000000,
251 regk_timer_rw_intr_mask_default = 0x00000000,
252 regk_timer_rw_out_default = 0x00000000,
253 regk_timer_rw_test_default = 0x00000000,
254 regk_timer_rw_tmr0_ctrl_default = 0x00000000,
255 regk_timer_rw_tmr1_ctrl_default = 0x00000000,
256 regk_timer_rw_trig_cfg_default = 0x00000000,
257 regk_timer_start = 0x00000001,
258 regk_timer_stop = 0x00000000,
259 regk_timer_time = 0x00000001,
260 regk_timer_tmr0 = 0x00000002,
261 regk_timer_tmr1 = 0x00000003,
262 regk_timer_vclk = 0x00000002,
263 regk_timer_yes = 0x00000001
264};
265#endif /* __timer_defs_h */
diff --git a/include/asm-cris/arch-v32/mach-a3/memmap.h b/include/asm-cris/arch-v32/mach-a3/memmap.h
new file mode 100644
index 000000000000..7e15c9eb4e49
--- /dev/null
+++ b/include/asm-cris/arch-v32/mach-a3/memmap.h
@@ -0,0 +1,10 @@
1#ifndef _ASM_ARCH_MEMMAP_H
2#define _ASM_ARCH_MEMMAP_H
3
4#define MEM_INTMEM_START (0x38000000)
5#define MEM_INTMEM_SIZE (0x00018000)
6#define MEM_DRAM_START (0x40000000)
7
8#define MEM_NON_CACHEABLE (0x80000000)
9
10#endif
diff --git a/include/asm-cris/arch-v32/mach-a3/pinmux.h b/include/asm-cris/arch-v32/mach-a3/pinmux.h
new file mode 100644
index 000000000000..db42a7254584
--- /dev/null
+++ b/include/asm-cris/arch-v32/mach-a3/pinmux.h
@@ -0,0 +1,45 @@
1#ifndef _ASM_CRIS_ARCH_PINMUX_H
2#define _ASM_CRIS_ARCH_PINMUX_H
3
4#define PORT_A 0
5#define PORT_B 1
6#define PORT_C 2
7
8enum pin_mode {
9 pinmux_none = 0,
10 pinmux_fixed,
11 pinmux_gpio,
12 pinmux_iop
13};
14
15enum fixed_function {
16 pinmux_eth,
17 pinmux_geth,
18 pinmux_tg_ccd,
19 pinmux_tg_cmos,
20 pinmux_vout,
21 pinmux_ser1,
22 pinmux_ser2,
23 pinmux_ser3,
24 pinmux_ser4,
25 pinmux_sser,
26 pinmux_pio,
27 pinmux_pwm0,
28 pinmux_pwm1,
29 pinmux_pwm2,
30 pinmux_i2c0,
31 pinmux_i2c1,
32 pinmux_i2c1_3wire,
33 pinmux_i2c1_sda1,
34 pinmux_i2c1_sda2,
35 pinmux_i2c1_sda3,
36};
37
38int crisv32_pinmux_init(void);
39int crisv32_pinmux_alloc(int port, int first_pin, int last_pin, enum pin_mode);
40int crisv32_pinmux_alloc_fixed(enum fixed_function function);
41int crisv32_pinmux_dealloc(int port, int first_pin, int last_pin);
42int crisv32_pinmux_dealloc_fixed(enum fixed_function function);
43void crisv32_pinmux_dump(void);
44
45#endif
diff --git a/include/asm-cris/arch-v32/mach-a3/startup.inc b/include/asm-cris/arch-v32/mach-a3/startup.inc
new file mode 100644
index 000000000000..2f23e5e16f4a
--- /dev/null
+++ b/include/asm-cris/arch-v32/mach-a3/startup.inc
@@ -0,0 +1,60 @@
1#include <hwregs/asm/reg_map_asm.h>
2#include <hwregs/asm/gio_defs_asm.h>
3#include <hwregs/asm/pio_defs_asm.h>
4#include <hwregs/asm/clkgen_defs_asm.h>
5#include <hwregs/asm/pinmux_defs_asm.h>
6
7 .macro GIO_INIT
8 move.d CONFIG_ETRAX_DEF_GIO_PA_OUT, $r0
9 move.d REG_ADDR(gio, regi_gio, rw_pa_dout), $r1
10 move.d $r0, [$r1]
11
12 move.d CONFIG_ETRAX_DEF_GIO_PA_OE, $r0
13 move.d REG_ADDR(gio, regi_gio, rw_pa_oe), $r1
14 move.d $r0, [$r1]
15
16 move.d CONFIG_ETRAX_DEF_GIO_PB_OUT, $r0
17 move.d REG_ADDR(gio, regi_gio, rw_pb_dout), $r1
18 move.d $r0, [$r1]
19
20 move.d CONFIG_ETRAX_DEF_GIO_PB_OE, $r0
21 move.d REG_ADDR(gio, regi_gio, rw_pb_oe), $r1
22 move.d $r0, [$r1]
23
24 move.d CONFIG_ETRAX_DEF_GIO_PC_OUT, $r0
25 move.d REG_ADDR(gio, regi_gio, rw_pc_dout), $r1
26 move.d $r0, [$r1]
27
28 move.d CONFIG_ETRAX_DEF_GIO_PC_OE, $r0
29 move.d REG_ADDR(gio, regi_gio, rw_pc_oe), $r1
30 move.d $r0, [$r1]
31
32 move.d 0xFFFFFFFF, $r0
33 move.d REG_ADDR(pinmux, regi_pinmux, rw_gio_pa), $r1
34 move.d $r0, [$r1]
35 move.d REG_ADDR(pinmux, regi_pinmux, rw_gio_pb), $r1
36 move.d $r0, [$r1]
37 move.d REG_ADDR(pinmux, regi_pinmux, rw_gio_pc), $r1
38 move.d $r0, [$r1]
39 .endm
40
41 .macro START_CLOCKS
42 move.d REG_ADDR(clkgen, regi_clkgen, rw_clk_ctrl), $r1
43 move.d [$r1], $r0
44 or.d REG_STATE(clkgen, rw_clk_ctrl, cpu, yes) | \
45 REG_STATE(clkgen, rw_clk_ctrl, ddr2, yes) | \
46 REG_STATE(clkgen, rw_clk_ctrl, memarb_bar_ddr, yes), $r0
47 move.d $r0, [$r1]
48 .endm
49
50 .macro SETUP_WAIT_STATES
51 move.d REG_ADDR(pio, regi_pio, rw_ce0_cfg), $r0
52 move.d CONFIG_ETRAX_PIO_CE0_CFG, $r1
53 move.d $r1, [$r0]
54 move.d REG_ADDR(pio, regi_pio, rw_ce1_cfg), $r0
55 move.d CONFIG_ETRAX_PIO_CE1_CFG, $r1
56 move.d $r1, [$r0]
57 move.d REG_ADDR(pio, regi_pio, rw_ce2_cfg), $r0
58 move.d CONFIG_ETRAX_PIO_CE2_CFG, $r1
59 move.d $r1, [$r0]
60 .endm
diff --git a/include/asm-cris/arch-v32/mach-fs/arbiter.h b/include/asm-cris/arch-v32/mach-fs/arbiter.h
new file mode 100644
index 000000000000..a2e0ec8faa7d
--- /dev/null
+++ b/include/asm-cris/arch-v32/mach-fs/arbiter.h
@@ -0,0 +1,28 @@
1#ifndef _ASM_CRIS_ARCH_ARBITER_H
2#define _ASM_CRIS_ARCH_ARBITER_H
3
4#define EXT_REGION 0
5#define INT_REGION 1
6
7typedef void (watch_callback)(void);
8
9enum {
10 arbiter_all_dmas = 0x3ff,
11 arbiter_cpu = 0xc00,
12 arbiter_all_clients = 0x3fff
13};
14
15enum {
16 arbiter_all_read = 0x55,
17 arbiter_all_write = 0xaa,
18 arbiter_all_accesses = 0xff
19};
20
21int crisv32_arbiter_allocate_bandwidth(int client, int region,
22 unsigned long bandwidth);
23int crisv32_arbiter_watch(unsigned long start, unsigned long size,
24 unsigned long clients, unsigned long accesses,
25 watch_callback * cb);
26int crisv32_arbiter_unwatch(int id);
27
28#endif
diff --git a/include/asm-cris/arch-v32/mach-fs/hwregs/asm/bif_core_defs_asm.h b/include/asm-cris/arch-v32/mach-fs/hwregs/asm/bif_core_defs_asm.h
new file mode 100644
index 000000000000..0a409c92837e
--- /dev/null
+++ b/include/asm-cris/arch-v32/mach-fs/hwregs/asm/bif_core_defs_asm.h
@@ -0,0 +1,319 @@
1#ifndef __bif_core_defs_asm_h
2#define __bif_core_defs_asm_h
3
4/*
5 * This file is autogenerated from
6 * file: ../../inst/bif/rtl/bif_core_regs.r
7 * id: bif_core_regs.r,v 1.17 2005/02/04 13:28:22 np Exp
8 * last modfied: Mon Apr 11 16:06:33 2005
9 *
10 * by /n/asic/design/tools/rdesc/src/rdes2c -asm --outfile asm/bif_core_defs_asm.h ../../inst/bif/rtl/bif_core_regs.r
11 * id: $Id: bif_core_defs_asm.h,v 1.1 2007/02/13 11:55:30 starvik Exp $
12 * Any changes here will be lost.
13 *
14 * -*- buffer-read-only: t -*-
15 */
16
17#ifndef REG_FIELD
18#define REG_FIELD( scope, reg, field, value ) \
19 REG_FIELD_X_( value, reg_##scope##_##reg##___##field##___lsb )
20#define REG_FIELD_X_( value, shift ) ((value) << shift)
21#endif
22
23#ifndef REG_STATE
24#define REG_STATE( scope, reg, field, symbolic_value ) \
25 REG_STATE_X_( regk_##scope##_##symbolic_value, reg_##scope##_##reg##___##field##___lsb )
26#define REG_STATE_X_( k, shift ) (k << shift)
27#endif
28
29#ifndef REG_MASK
30#define REG_MASK( scope, reg, field ) \
31 REG_MASK_X_( reg_##scope##_##reg##___##field##___width, reg_##scope##_##reg##___##field##___lsb )
32#define REG_MASK_X_( width, lsb ) (((1 << width)-1) << lsb)
33#endif
34
35#ifndef REG_LSB
36#define REG_LSB( scope, reg, field ) reg_##scope##_##reg##___##field##___lsb
37#endif
38
39#ifndef REG_BIT
40#define REG_BIT( scope, reg, field ) reg_##scope##_##reg##___##field##___bit
41#endif
42
43#ifndef REG_ADDR
44#define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset)
45#define REG_ADDR_X_( inst, offs ) ((inst) + offs)
46#endif
47
48#ifndef REG_ADDR_VECT
49#define REG_ADDR_VECT( scope, inst, reg, index ) \
50 REG_ADDR_VECT_X_(inst, reg_##scope##_##reg##_offset, index, \
51 STRIDE_##scope##_##reg )
52#define REG_ADDR_VECT_X_( inst, offs, index, stride ) \
53 ((inst) + offs + (index) * stride)
54#endif
55
56/* Register rw_grp1_cfg, scope bif_core, type rw */
57#define reg_bif_core_rw_grp1_cfg___lw___lsb 0
58#define reg_bif_core_rw_grp1_cfg___lw___width 6
59#define reg_bif_core_rw_grp1_cfg___ew___lsb 6
60#define reg_bif_core_rw_grp1_cfg___ew___width 3
61#define reg_bif_core_rw_grp1_cfg___zw___lsb 9
62#define reg_bif_core_rw_grp1_cfg___zw___width 3
63#define reg_bif_core_rw_grp1_cfg___aw___lsb 12
64#define reg_bif_core_rw_grp1_cfg___aw___width 2
65#define reg_bif_core_rw_grp1_cfg___dw___lsb 14
66#define reg_bif_core_rw_grp1_cfg___dw___width 2
67#define reg_bif_core_rw_grp1_cfg___ewb___lsb 16
68#define reg_bif_core_rw_grp1_cfg___ewb___width 2
69#define reg_bif_core_rw_grp1_cfg___bw___lsb 18
70#define reg_bif_core_rw_grp1_cfg___bw___width 1
71#define reg_bif_core_rw_grp1_cfg___bw___bit 18
72#define reg_bif_core_rw_grp1_cfg___wr_extend___lsb 19
73#define reg_bif_core_rw_grp1_cfg___wr_extend___width 1
74#define reg_bif_core_rw_grp1_cfg___wr_extend___bit 19
75#define reg_bif_core_rw_grp1_cfg___erc_en___lsb 20
76#define reg_bif_core_rw_grp1_cfg___erc_en___width 1
77#define reg_bif_core_rw_grp1_cfg___erc_en___bit 20
78#define reg_bif_core_rw_grp1_cfg___mode___lsb 21
79#define reg_bif_core_rw_grp1_cfg___mode___width 1
80#define reg_bif_core_rw_grp1_cfg___mode___bit 21
81#define reg_bif_core_rw_grp1_cfg_offset 0
82
83/* Register rw_grp2_cfg, scope bif_core, type rw */
84#define reg_bif_core_rw_grp2_cfg___lw___lsb 0
85#define reg_bif_core_rw_grp2_cfg___lw___width 6
86#define reg_bif_core_rw_grp2_cfg___ew___lsb 6
87#define reg_bif_core_rw_grp2_cfg___ew___width 3
88#define reg_bif_core_rw_grp2_cfg___zw___lsb 9
89#define reg_bif_core_rw_grp2_cfg___zw___width 3
90#define reg_bif_core_rw_grp2_cfg___aw___lsb 12
91#define reg_bif_core_rw_grp2_cfg___aw___width 2
92#define reg_bif_core_rw_grp2_cfg___dw___lsb 14
93#define reg_bif_core_rw_grp2_cfg___dw___width 2
94#define reg_bif_core_rw_grp2_cfg___ewb___lsb 16
95#define reg_bif_core_rw_grp2_cfg___ewb___width 2
96#define reg_bif_core_rw_grp2_cfg___bw___lsb 18
97#define reg_bif_core_rw_grp2_cfg___bw___width 1
98#define reg_bif_core_rw_grp2_cfg___bw___bit 18
99#define reg_bif_core_rw_grp2_cfg___wr_extend___lsb 19
100#define reg_bif_core_rw_grp2_cfg___wr_extend___width 1
101#define reg_bif_core_rw_grp2_cfg___wr_extend___bit 19
102#define reg_bif_core_rw_grp2_cfg___erc_en___lsb 20
103#define reg_bif_core_rw_grp2_cfg___erc_en___width 1
104#define reg_bif_core_rw_grp2_cfg___erc_en___bit 20
105#define reg_bif_core_rw_grp2_cfg___mode___lsb 21
106#define reg_bif_core_rw_grp2_cfg___mode___width 1
107#define reg_bif_core_rw_grp2_cfg___mode___bit 21
108#define reg_bif_core_rw_grp2_cfg_offset 4
109
110/* Register rw_grp3_cfg, scope bif_core, type rw */
111#define reg_bif_core_rw_grp3_cfg___lw___lsb 0
112#define reg_bif_core_rw_grp3_cfg___lw___width 6
113#define reg_bif_core_rw_grp3_cfg___ew___lsb 6
114#define reg_bif_core_rw_grp3_cfg___ew___width 3
115#define reg_bif_core_rw_grp3_cfg___zw___lsb 9
116#define reg_bif_core_rw_grp3_cfg___zw___width 3
117#define reg_bif_core_rw_grp3_cfg___aw___lsb 12
118#define reg_bif_core_rw_grp3_cfg___aw___width 2
119#define reg_bif_core_rw_grp3_cfg___dw___lsb 14
120#define reg_bif_core_rw_grp3_cfg___dw___width 2
121#define reg_bif_core_rw_grp3_cfg___ewb___lsb 16
122#define reg_bif_core_rw_grp3_cfg___ewb___width 2
123#define reg_bif_core_rw_grp3_cfg___bw___lsb 18
124#define reg_bif_core_rw_grp3_cfg___bw___width 1
125#define reg_bif_core_rw_grp3_cfg___bw___bit 18
126#define reg_bif_core_rw_grp3_cfg___wr_extend___lsb 19
127#define reg_bif_core_rw_grp3_cfg___wr_extend___width 1
128#define reg_bif_core_rw_grp3_cfg___wr_extend___bit 19
129#define reg_bif_core_rw_grp3_cfg___erc_en___lsb 20
130#define reg_bif_core_rw_grp3_cfg___erc_en___width 1
131#define reg_bif_core_rw_grp3_cfg___erc_en___bit 20
132#define reg_bif_core_rw_grp3_cfg___mode___lsb 21
133#define reg_bif_core_rw_grp3_cfg___mode___width 1
134#define reg_bif_core_rw_grp3_cfg___mode___bit 21
135#define reg_bif_core_rw_grp3_cfg___gated_csp0___lsb 24
136#define reg_bif_core_rw_grp3_cfg___gated_csp0___width 2
137#define reg_bif_core_rw_grp3_cfg___gated_csp1___lsb 26
138#define reg_bif_core_rw_grp3_cfg___gated_csp1___width 2
139#define reg_bif_core_rw_grp3_cfg___gated_csp2___lsb 28
140#define reg_bif_core_rw_grp3_cfg___gated_csp2___width 2
141#define reg_bif_core_rw_grp3_cfg___gated_csp3___lsb 30
142#define reg_bif_core_rw_grp3_cfg___gated_csp3___width 2
143#define reg_bif_core_rw_grp3_cfg_offset 8
144
145/* Register rw_grp4_cfg, scope bif_core, type rw */
146#define reg_bif_core_rw_grp4_cfg___lw___lsb 0
147#define reg_bif_core_rw_grp4_cfg___lw___width 6
148#define reg_bif_core_rw_grp4_cfg___ew___lsb 6
149#define reg_bif_core_rw_grp4_cfg___ew___width 3
150#define reg_bif_core_rw_grp4_cfg___zw___lsb 9
151#define reg_bif_core_rw_grp4_cfg___zw___width 3
152#define reg_bif_core_rw_grp4_cfg___aw___lsb 12
153#define reg_bif_core_rw_grp4_cfg___aw___width 2
154#define reg_bif_core_rw_grp4_cfg___dw___lsb 14
155#define reg_bif_core_rw_grp4_cfg___dw___width 2
156#define reg_bif_core_rw_grp4_cfg___ewb___lsb 16
157#define reg_bif_core_rw_grp4_cfg___ewb___width 2
158#define reg_bif_core_rw_grp4_cfg___bw___lsb 18
159#define reg_bif_core_rw_grp4_cfg___bw___width 1
160#define reg_bif_core_rw_grp4_cfg___bw___bit 18
161#define reg_bif_core_rw_grp4_cfg___wr_extend___lsb 19
162#define reg_bif_core_rw_grp4_cfg___wr_extend___width 1
163#define reg_bif_core_rw_grp4_cfg___wr_extend___bit 19
164#define reg_bif_core_rw_grp4_cfg___erc_en___lsb 20
165#define reg_bif_core_rw_grp4_cfg___erc_en___width 1
166#define reg_bif_core_rw_grp4_cfg___erc_en___bit 20
167#define reg_bif_core_rw_grp4_cfg___mode___lsb 21
168#define reg_bif_core_rw_grp4_cfg___mode___width 1
169#define reg_bif_core_rw_grp4_cfg___mode___bit 21
170#define reg_bif_core_rw_grp4_cfg___gated_csp4___lsb 26
171#define reg_bif_core_rw_grp4_cfg___gated_csp4___width 2
172#define reg_bif_core_rw_grp4_cfg___gated_csp5___lsb 28
173#define reg_bif_core_rw_grp4_cfg___gated_csp5___width 2
174#define reg_bif_core_rw_grp4_cfg___gated_csp6___lsb 30
175#define reg_bif_core_rw_grp4_cfg___gated_csp6___width 2
176#define reg_bif_core_rw_grp4_cfg_offset 12
177
178/* Register rw_sdram_cfg_grp0, scope bif_core, type rw */
179#define reg_bif_core_rw_sdram_cfg_grp0___bank_sel___lsb 0
180#define reg_bif_core_rw_sdram_cfg_grp0___bank_sel___width 5
181#define reg_bif_core_rw_sdram_cfg_grp0___ca___lsb 5
182#define reg_bif_core_rw_sdram_cfg_grp0___ca___width 3
183#define reg_bif_core_rw_sdram_cfg_grp0___type___lsb 8
184#define reg_bif_core_rw_sdram_cfg_grp0___type___width 1
185#define reg_bif_core_rw_sdram_cfg_grp0___type___bit 8
186#define reg_bif_core_rw_sdram_cfg_grp0___bw___lsb 9
187#define reg_bif_core_rw_sdram_cfg_grp0___bw___width 1
188#define reg_bif_core_rw_sdram_cfg_grp0___bw___bit 9
189#define reg_bif_core_rw_sdram_cfg_grp0___sh___lsb 10
190#define reg_bif_core_rw_sdram_cfg_grp0___sh___width 3
191#define reg_bif_core_rw_sdram_cfg_grp0___wmm___lsb 13
192#define reg_bif_core_rw_sdram_cfg_grp0___wmm___width 1
193#define reg_bif_core_rw_sdram_cfg_grp0___wmm___bit 13
194#define reg_bif_core_rw_sdram_cfg_grp0___sh16___lsb 14
195#define reg_bif_core_rw_sdram_cfg_grp0___sh16___width 1
196#define reg_bif_core_rw_sdram_cfg_grp0___sh16___bit 14
197#define reg_bif_core_rw_sdram_cfg_grp0___grp_sel___lsb 15
198#define reg_bif_core_rw_sdram_cfg_grp0___grp_sel___width 5
199#define reg_bif_core_rw_sdram_cfg_grp0_offset 16
200
201/* Register rw_sdram_cfg_grp1, scope bif_core, type rw */
202#define reg_bif_core_rw_sdram_cfg_grp1___bank_sel___lsb 0
203#define reg_bif_core_rw_sdram_cfg_grp1___bank_sel___width 5
204#define reg_bif_core_rw_sdram_cfg_grp1___ca___lsb 5
205#define reg_bif_core_rw_sdram_cfg_grp1___ca___width 3
206#define reg_bif_core_rw_sdram_cfg_grp1___type___lsb 8
207#define reg_bif_core_rw_sdram_cfg_grp1___type___width 1
208#define reg_bif_core_rw_sdram_cfg_grp1___type___bit 8
209#define reg_bif_core_rw_sdram_cfg_grp1___bw___lsb 9
210#define reg_bif_core_rw_sdram_cfg_grp1___bw___width 1
211#define reg_bif_core_rw_sdram_cfg_grp1___bw___bit 9
212#define reg_bif_core_rw_sdram_cfg_grp1___sh___lsb 10
213#define reg_bif_core_rw_sdram_cfg_grp1___sh___width 3
214#define reg_bif_core_rw_sdram_cfg_grp1___wmm___lsb 13
215#define reg_bif_core_rw_sdram_cfg_grp1___wmm___width 1
216#define reg_bif_core_rw_sdram_cfg_grp1___wmm___bit 13
217#define reg_bif_core_rw_sdram_cfg_grp1___sh16___lsb 14
218#define reg_bif_core_rw_sdram_cfg_grp1___sh16___width 1
219#define reg_bif_core_rw_sdram_cfg_grp1___sh16___bit 14
220#define reg_bif_core_rw_sdram_cfg_grp1_offset 20
221
222/* Register rw_sdram_timing, scope bif_core, type rw */
223#define reg_bif_core_rw_sdram_timing___cl___lsb 0
224#define reg_bif_core_rw_sdram_timing___cl___width 3
225#define reg_bif_core_rw_sdram_timing___rcd___lsb 3
226#define reg_bif_core_rw_sdram_timing___rcd___width 3
227#define reg_bif_core_rw_sdram_timing___rp___lsb 6
228#define reg_bif_core_rw_sdram_timing___rp___width 3
229#define reg_bif_core_rw_sdram_timing___rc___lsb 9
230#define reg_bif_core_rw_sdram_timing___rc___width 2
231#define reg_bif_core_rw_sdram_timing___dpl___lsb 11
232#define reg_bif_core_rw_sdram_timing___dpl___width 2
233#define reg_bif_core_rw_sdram_timing___pde___lsb 13
234#define reg_bif_core_rw_sdram_timing___pde___width 1
235#define reg_bif_core_rw_sdram_timing___pde___bit 13
236#define reg_bif_core_rw_sdram_timing___ref___lsb 14
237#define reg_bif_core_rw_sdram_timing___ref___width 2
238#define reg_bif_core_rw_sdram_timing___cpd___lsb 16
239#define reg_bif_core_rw_sdram_timing___cpd___width 1
240#define reg_bif_core_rw_sdram_timing___cpd___bit 16
241#define reg_bif_core_rw_sdram_timing___sdcke___lsb 17
242#define reg_bif_core_rw_sdram_timing___sdcke___width 1
243#define reg_bif_core_rw_sdram_timing___sdcke___bit 17
244#define reg_bif_core_rw_sdram_timing___sdclk___lsb 18
245#define reg_bif_core_rw_sdram_timing___sdclk___width 1
246#define reg_bif_core_rw_sdram_timing___sdclk___bit 18
247#define reg_bif_core_rw_sdram_timing_offset 24
248
249/* Register rw_sdram_cmd, scope bif_core, type rw */
250#define reg_bif_core_rw_sdram_cmd___cmd___lsb 0
251#define reg_bif_core_rw_sdram_cmd___cmd___width 3
252#define reg_bif_core_rw_sdram_cmd___mrs_data___lsb 3
253#define reg_bif_core_rw_sdram_cmd___mrs_data___width 15
254#define reg_bif_core_rw_sdram_cmd_offset 28
255
256/* Register rs_sdram_ref_stat, scope bif_core, type rs */
257#define reg_bif_core_rs_sdram_ref_stat___ok___lsb 0
258#define reg_bif_core_rs_sdram_ref_stat___ok___width 1
259#define reg_bif_core_rs_sdram_ref_stat___ok___bit 0
260#define reg_bif_core_rs_sdram_ref_stat_offset 32
261
262/* Register r_sdram_ref_stat, scope bif_core, type r */
263#define reg_bif_core_r_sdram_ref_stat___ok___lsb 0
264#define reg_bif_core_r_sdram_ref_stat___ok___width 1
265#define reg_bif_core_r_sdram_ref_stat___ok___bit 0
266#define reg_bif_core_r_sdram_ref_stat_offset 36
267
268
269/* Constants */
270#define regk_bif_core_bank2 0x00000000
271#define regk_bif_core_bank4 0x00000001
272#define regk_bif_core_bit10 0x0000000a
273#define regk_bif_core_bit11 0x0000000b
274#define regk_bif_core_bit12 0x0000000c
275#define regk_bif_core_bit13 0x0000000d
276#define regk_bif_core_bit14 0x0000000e
277#define regk_bif_core_bit15 0x0000000f
278#define regk_bif_core_bit16 0x00000010
279#define regk_bif_core_bit17 0x00000011
280#define regk_bif_core_bit18 0x00000012
281#define regk_bif_core_bit19 0x00000013
282#define regk_bif_core_bit20 0x00000014
283#define regk_bif_core_bit21 0x00000015
284#define regk_bif_core_bit22 0x00000016
285#define regk_bif_core_bit23 0x00000017
286#define regk_bif_core_bit24 0x00000018
287#define regk_bif_core_bit25 0x00000019
288#define regk_bif_core_bit26 0x0000001a
289#define regk_bif_core_bit27 0x0000001b
290#define regk_bif_core_bit28 0x0000001c
291#define regk_bif_core_bit29 0x0000001d
292#define regk_bif_core_bit9 0x00000009
293#define regk_bif_core_bw16 0x00000001
294#define regk_bif_core_bw32 0x00000000
295#define regk_bif_core_bwe 0x00000000
296#define regk_bif_core_cwe 0x00000001
297#define regk_bif_core_e15us 0x00000001
298#define regk_bif_core_e7800ns 0x00000002
299#define regk_bif_core_grp0 0x00000000
300#define regk_bif_core_grp1 0x00000001
301#define regk_bif_core_mrs 0x00000003
302#define regk_bif_core_no 0x00000000
303#define regk_bif_core_none 0x00000000
304#define regk_bif_core_nop 0x00000000
305#define regk_bif_core_off 0x00000000
306#define regk_bif_core_pre 0x00000002
307#define regk_bif_core_r_sdram_ref_stat_default 0x00000001
308#define regk_bif_core_rd 0x00000002
309#define regk_bif_core_ref 0x00000001
310#define regk_bif_core_rs_sdram_ref_stat_default 0x00000001
311#define regk_bif_core_rw_grp1_cfg_default 0x000006cf
312#define regk_bif_core_rw_grp2_cfg_default 0x000006cf
313#define regk_bif_core_rw_grp3_cfg_default 0x000006cf
314#define regk_bif_core_rw_grp4_cfg_default 0x000006cf
315#define regk_bif_core_rw_sdram_cfg_grp1_default 0x00000000
316#define regk_bif_core_slf 0x00000004
317#define regk_bif_core_wr 0x00000001
318#define regk_bif_core_yes 0x00000001
319#endif /* __bif_core_defs_asm_h */
diff --git a/include/asm-cris/arch-v32/mach-fs/hwregs/asm/config_defs_asm.h b/include/asm-cris/arch-v32/mach-fs/hwregs/asm/config_defs_asm.h
new file mode 100644
index 000000000000..a9908dfc2937
--- /dev/null
+++ b/include/asm-cris/arch-v32/mach-fs/hwregs/asm/config_defs_asm.h
@@ -0,0 +1,131 @@
1#ifndef __config_defs_asm_h
2#define __config_defs_asm_h
3
4/*
5 * This file is autogenerated from
6 * file: ../../rtl/config_regs.r
7 * id: config_regs.r,v 1.23 2004/03/04 11:34:42 mikaeln Exp
8 * last modfied: Thu Mar 4 12:34:39 2004
9 *
10 * by /n/asic/design/tools/rdesc/src/rdes2c -asm --outfile asm/config_defs_asm.h ../../rtl/config_regs.r
11 * id: $Id: config_defs_asm.h,v 1.1 2007/02/13 11:55:30 starvik Exp $
12 * Any changes here will be lost.
13 *
14 * -*- buffer-read-only: t -*-
15 */
16
17#ifndef REG_FIELD
18#define REG_FIELD( scope, reg, field, value ) \
19 REG_FIELD_X_( value, reg_##scope##_##reg##___##field##___lsb )
20#define REG_FIELD_X_( value, shift ) ((value) << shift)
21#endif
22
23#ifndef REG_STATE
24#define REG_STATE( scope, reg, field, symbolic_value ) \
25 REG_STATE_X_( regk_##scope##_##symbolic_value, reg_##scope##_##reg##___##field##___lsb )
26#define REG_STATE_X_( k, shift ) (k << shift)
27#endif
28
29#ifndef REG_MASK
30#define REG_MASK( scope, reg, field ) \
31 REG_MASK_X_( reg_##scope##_##reg##___##field##___width, reg_##scope##_##reg##___##field##___lsb )
32#define REG_MASK_X_( width, lsb ) (((1 << width)-1) << lsb)
33#endif
34
35#ifndef REG_LSB
36#define REG_LSB( scope, reg, field ) reg_##scope##_##reg##___##field##___lsb
37#endif
38
39#ifndef REG_BIT
40#define REG_BIT( scope, reg, field ) reg_##scope##_##reg##___##field##___bit
41#endif
42
43#ifndef REG_ADDR
44#define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset)
45#define REG_ADDR_X_( inst, offs ) ((inst) + offs)
46#endif
47
48#ifndef REG_ADDR_VECT
49#define REG_ADDR_VECT( scope, inst, reg, index ) \
50 REG_ADDR_VECT_X_(inst, reg_##scope##_##reg##_offset, index, \
51 STRIDE_##scope##_##reg )
52#define REG_ADDR_VECT_X_( inst, offs, index, stride ) \
53 ((inst) + offs + (index) * stride)
54#endif
55
56/* Register r_bootsel, scope config, type r */
57#define reg_config_r_bootsel___boot_mode___lsb 0
58#define reg_config_r_bootsel___boot_mode___width 3
59#define reg_config_r_bootsel___full_duplex___lsb 3
60#define reg_config_r_bootsel___full_duplex___width 1
61#define reg_config_r_bootsel___full_duplex___bit 3
62#define reg_config_r_bootsel___user___lsb 4
63#define reg_config_r_bootsel___user___width 1
64#define reg_config_r_bootsel___user___bit 4
65#define reg_config_r_bootsel___pll___lsb 5
66#define reg_config_r_bootsel___pll___width 1
67#define reg_config_r_bootsel___pll___bit 5
68#define reg_config_r_bootsel___flash_bw___lsb 6
69#define reg_config_r_bootsel___flash_bw___width 1
70#define reg_config_r_bootsel___flash_bw___bit 6
71#define reg_config_r_bootsel_offset 0
72
73/* Register rw_clk_ctrl, scope config, type rw */
74#define reg_config_rw_clk_ctrl___pll___lsb 0
75#define reg_config_rw_clk_ctrl___pll___width 1
76#define reg_config_rw_clk_ctrl___pll___bit 0
77#define reg_config_rw_clk_ctrl___cpu___lsb 1
78#define reg_config_rw_clk_ctrl___cpu___width 1
79#define reg_config_rw_clk_ctrl___cpu___bit 1
80#define reg_config_rw_clk_ctrl___iop___lsb 2
81#define reg_config_rw_clk_ctrl___iop___width 1
82#define reg_config_rw_clk_ctrl___iop___bit 2
83#define reg_config_rw_clk_ctrl___dma01_eth0___lsb 3
84#define reg_config_rw_clk_ctrl___dma01_eth0___width 1
85#define reg_config_rw_clk_ctrl___dma01_eth0___bit 3
86#define reg_config_rw_clk_ctrl___dma23___lsb 4
87#define reg_config_rw_clk_ctrl___dma23___width 1
88#define reg_config_rw_clk_ctrl___dma23___bit 4
89#define reg_config_rw_clk_ctrl___dma45___lsb 5
90#define reg_config_rw_clk_ctrl___dma45___width 1
91#define reg_config_rw_clk_ctrl___dma45___bit 5
92#define reg_config_rw_clk_ctrl___dma67___lsb 6
93#define reg_config_rw_clk_ctrl___dma67___width 1
94#define reg_config_rw_clk_ctrl___dma67___bit 6
95#define reg_config_rw_clk_ctrl___dma89_strcop___lsb 7
96#define reg_config_rw_clk_ctrl___dma89_strcop___width 1
97#define reg_config_rw_clk_ctrl___dma89_strcop___bit 7
98#define reg_config_rw_clk_ctrl___bif___lsb 8
99#define reg_config_rw_clk_ctrl___bif___width 1
100#define reg_config_rw_clk_ctrl___bif___bit 8
101#define reg_config_rw_clk_ctrl___fix_io___lsb 9
102#define reg_config_rw_clk_ctrl___fix_io___width 1
103#define reg_config_rw_clk_ctrl___fix_io___bit 9
104#define reg_config_rw_clk_ctrl_offset 4
105
106/* Register rw_pad_ctrl, scope config, type rw */
107#define reg_config_rw_pad_ctrl___usb_susp___lsb 0
108#define reg_config_rw_pad_ctrl___usb_susp___width 1
109#define reg_config_rw_pad_ctrl___usb_susp___bit 0
110#define reg_config_rw_pad_ctrl___phyrst_n___lsb 1
111#define reg_config_rw_pad_ctrl___phyrst_n___width 1
112#define reg_config_rw_pad_ctrl___phyrst_n___bit 1
113#define reg_config_rw_pad_ctrl_offset 8
114
115
116/* Constants */
117#define regk_config_bw16 0x00000000
118#define regk_config_bw32 0x00000001
119#define regk_config_master 0x00000005
120#define regk_config_nand 0x00000003
121#define regk_config_net_rx 0x00000001
122#define regk_config_net_tx_rx 0x00000002
123#define regk_config_no 0x00000000
124#define regk_config_none 0x00000007
125#define regk_config_nor 0x00000000
126#define regk_config_rw_clk_ctrl_default 0x00000002
127#define regk_config_rw_pad_ctrl_default 0x00000000
128#define regk_config_ser 0x00000004
129#define regk_config_slave 0x00000006
130#define regk_config_yes 0x00000001
131#endif /* __config_defs_asm_h */
diff --git a/include/asm-cris/arch-v32/mach-fs/hwregs/asm/gio_defs_asm.h b/include/asm-cris/arch-v32/mach-fs/hwregs/asm/gio_defs_asm.h
new file mode 100644
index 000000000000..be4c63936d90
--- /dev/null
+++ b/include/asm-cris/arch-v32/mach-fs/hwregs/asm/gio_defs_asm.h
@@ -0,0 +1,276 @@
1#ifndef __gio_defs_asm_h
2#define __gio_defs_asm_h
3
4/*
5 * This file is autogenerated from
6 * file: ../../inst/gio/rtl/gio_regs.r
7 * id: gio_regs.r,v 1.5 2005/02/04 09:43:21 perz Exp
8 * last modfied: Mon Apr 11 16:07:47 2005
9 *
10 * by /n/asic/design/tools/rdesc/src/rdes2c -asm --outfile asm/gio_defs_asm.h ../../inst/gio/rtl/gio_regs.r
11 * id: $Id: gio_defs_asm.h,v 1.1 2007/02/13 11:55:30 starvik Exp $
12 * Any changes here will be lost.
13 *
14 * -*- buffer-read-only: t -*-
15 */
16
17#ifndef REG_FIELD
18#define REG_FIELD( scope, reg, field, value ) \
19 REG_FIELD_X_( value, reg_##scope##_##reg##___##field##___lsb )
20#define REG_FIELD_X_( value, shift ) ((value) << shift)
21#endif
22
23#ifndef REG_STATE
24#define REG_STATE( scope, reg, field, symbolic_value ) \
25 REG_STATE_X_( regk_##scope##_##symbolic_value, reg_##scope##_##reg##___##field##___lsb )
26#define REG_STATE_X_( k, shift ) (k << shift)
27#endif
28
29#ifndef REG_MASK
30#define REG_MASK( scope, reg, field ) \
31 REG_MASK_X_( reg_##scope##_##reg##___##field##___width, reg_##scope##_##reg##___##field##___lsb )
32#define REG_MASK_X_( width, lsb ) (((1 << width)-1) << lsb)
33#endif
34
35#ifndef REG_LSB
36#define REG_LSB( scope, reg, field ) reg_##scope##_##reg##___##field##___lsb
37#endif
38
39#ifndef REG_BIT
40#define REG_BIT( scope, reg, field ) reg_##scope##_##reg##___##field##___bit
41#endif
42
43#ifndef REG_ADDR
44#define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset)
45#define REG_ADDR_X_( inst, offs ) ((inst) + offs)
46#endif
47
48#ifndef REG_ADDR_VECT
49#define REG_ADDR_VECT( scope, inst, reg, index ) \
50 REG_ADDR_VECT_X_(inst, reg_##scope##_##reg##_offset, index, \
51 STRIDE_##scope##_##reg )
52#define REG_ADDR_VECT_X_( inst, offs, index, stride ) \
53 ((inst) + offs + (index) * stride)
54#endif
55
56/* Register rw_pa_dout, scope gio, type rw */
57#define reg_gio_rw_pa_dout___data___lsb 0
58#define reg_gio_rw_pa_dout___data___width 8
59#define reg_gio_rw_pa_dout_offset 0
60
61/* Register r_pa_din, scope gio, type r */
62#define reg_gio_r_pa_din___data___lsb 0
63#define reg_gio_r_pa_din___data___width 8
64#define reg_gio_r_pa_din_offset 4
65
66/* Register rw_pa_oe, scope gio, type rw */
67#define reg_gio_rw_pa_oe___oe___lsb 0
68#define reg_gio_rw_pa_oe___oe___width 8
69#define reg_gio_rw_pa_oe_offset 8
70
71/* Register rw_intr_cfg, scope gio, type rw */
72#define reg_gio_rw_intr_cfg___pa0___lsb 0
73#define reg_gio_rw_intr_cfg___pa0___width 3
74#define reg_gio_rw_intr_cfg___pa1___lsb 3
75#define reg_gio_rw_intr_cfg___pa1___width 3
76#define reg_gio_rw_intr_cfg___pa2___lsb 6
77#define reg_gio_rw_intr_cfg___pa2___width 3
78#define reg_gio_rw_intr_cfg___pa3___lsb 9
79#define reg_gio_rw_intr_cfg___pa3___width 3
80#define reg_gio_rw_intr_cfg___pa4___lsb 12
81#define reg_gio_rw_intr_cfg___pa4___width 3
82#define reg_gio_rw_intr_cfg___pa5___lsb 15
83#define reg_gio_rw_intr_cfg___pa5___width 3
84#define reg_gio_rw_intr_cfg___pa6___lsb 18
85#define reg_gio_rw_intr_cfg___pa6___width 3
86#define reg_gio_rw_intr_cfg___pa7___lsb 21
87#define reg_gio_rw_intr_cfg___pa7___width 3
88#define reg_gio_rw_intr_cfg_offset 12
89
90/* Register rw_intr_mask, scope gio, type rw */
91#define reg_gio_rw_intr_mask___pa0___lsb 0
92#define reg_gio_rw_intr_mask___pa0___width 1
93#define reg_gio_rw_intr_mask___pa0___bit 0
94#define reg_gio_rw_intr_mask___pa1___lsb 1
95#define reg_gio_rw_intr_mask___pa1___width 1
96#define reg_gio_rw_intr_mask___pa1___bit 1
97#define reg_gio_rw_intr_mask___pa2___lsb 2
98#define reg_gio_rw_intr_mask___pa2___width 1
99#define reg_gio_rw_intr_mask___pa2___bit 2
100#define reg_gio_rw_intr_mask___pa3___lsb 3
101#define reg_gio_rw_intr_mask___pa3___width 1
102#define reg_gio_rw_intr_mask___pa3___bit 3
103#define reg_gio_rw_intr_mask___pa4___lsb 4
104#define reg_gio_rw_intr_mask___pa4___width 1
105#define reg_gio_rw_intr_mask___pa4___bit 4
106#define reg_gio_rw_intr_mask___pa5___lsb 5
107#define reg_gio_rw_intr_mask___pa5___width 1
108#define reg_gio_rw_intr_mask___pa5___bit 5
109#define reg_gio_rw_intr_mask___pa6___lsb 6
110#define reg_gio_rw_intr_mask___pa6___width 1
111#define reg_gio_rw_intr_mask___pa6___bit 6
112#define reg_gio_rw_intr_mask___pa7___lsb 7
113#define reg_gio_rw_intr_mask___pa7___width 1
114#define reg_gio_rw_intr_mask___pa7___bit 7
115#define reg_gio_rw_intr_mask_offset 16
116
117/* Register rw_ack_intr, scope gio, type rw */
118#define reg_gio_rw_ack_intr___pa0___lsb 0
119#define reg_gio_rw_ack_intr___pa0___width 1
120#define reg_gio_rw_ack_intr___pa0___bit 0
121#define reg_gio_rw_ack_intr___pa1___lsb 1
122#define reg_gio_rw_ack_intr___pa1___width 1
123#define reg_gio_rw_ack_intr___pa1___bit 1
124#define reg_gio_rw_ack_intr___pa2___lsb 2
125#define reg_gio_rw_ack_intr___pa2___width 1
126#define reg_gio_rw_ack_intr___pa2___bit 2
127#define reg_gio_rw_ack_intr___pa3___lsb 3
128#define reg_gio_rw_ack_intr___pa3___width 1
129#define reg_gio_rw_ack_intr___pa3___bit 3
130#define reg_gio_rw_ack_intr___pa4___lsb 4
131#define reg_gio_rw_ack_intr___pa4___width 1
132#define reg_gio_rw_ack_intr___pa4___bit 4
133#define reg_gio_rw_ack_intr___pa5___lsb 5
134#define reg_gio_rw_ack_intr___pa5___width 1
135#define reg_gio_rw_ack_intr___pa5___bit 5
136#define reg_gio_rw_ack_intr___pa6___lsb 6
137#define reg_gio_rw_ack_intr___pa6___width 1
138#define reg_gio_rw_ack_intr___pa6___bit 6
139#define reg_gio_rw_ack_intr___pa7___lsb 7
140#define reg_gio_rw_ack_intr___pa7___width 1
141#define reg_gio_rw_ack_intr___pa7___bit 7
142#define reg_gio_rw_ack_intr_offset 20
143
144/* Register r_intr, scope gio, type r */
145#define reg_gio_r_intr___pa0___lsb 0
146#define reg_gio_r_intr___pa0___width 1
147#define reg_gio_r_intr___pa0___bit 0
148#define reg_gio_r_intr___pa1___lsb 1
149#define reg_gio_r_intr___pa1___width 1
150#define reg_gio_r_intr___pa1___bit 1
151#define reg_gio_r_intr___pa2___lsb 2
152#define reg_gio_r_intr___pa2___width 1
153#define reg_gio_r_intr___pa2___bit 2
154#define reg_gio_r_intr___pa3___lsb 3
155#define reg_gio_r_intr___pa3___width 1
156#define reg_gio_r_intr___pa3___bit 3
157#define reg_gio_r_intr___pa4___lsb 4
158#define reg_gio_r_intr___pa4___width 1
159#define reg_gio_r_intr___pa4___bit 4
160#define reg_gio_r_intr___pa5___lsb 5
161#define reg_gio_r_intr___pa5___width 1
162#define reg_gio_r_intr___pa5___bit 5
163#define reg_gio_r_intr___pa6___lsb 6
164#define reg_gio_r_intr___pa6___width 1
165#define reg_gio_r_intr___pa6___bit 6
166#define reg_gio_r_intr___pa7___lsb 7
167#define reg_gio_r_intr___pa7___width 1
168#define reg_gio_r_intr___pa7___bit 7
169#define reg_gio_r_intr_offset 24
170
171/* Register r_masked_intr, scope gio, type r */
172#define reg_gio_r_masked_intr___pa0___lsb 0
173#define reg_gio_r_masked_intr___pa0___width 1
174#define reg_gio_r_masked_intr___pa0___bit 0
175#define reg_gio_r_masked_intr___pa1___lsb 1
176#define reg_gio_r_masked_intr___pa1___width 1
177#define reg_gio_r_masked_intr___pa1___bit 1
178#define reg_gio_r_masked_intr___pa2___lsb 2
179#define reg_gio_r_masked_intr___pa2___width 1
180#define reg_gio_r_masked_intr___pa2___bit 2
181#define reg_gio_r_masked_intr___pa3___lsb 3
182#define reg_gio_r_masked_intr___pa3___width 1
183#define reg_gio_r_masked_intr___pa3___bit 3
184#define reg_gio_r_masked_intr___pa4___lsb 4
185#define reg_gio_r_masked_intr___pa4___width 1
186#define reg_gio_r_masked_intr___pa4___bit 4
187#define reg_gio_r_masked_intr___pa5___lsb 5
188#define reg_gio_r_masked_intr___pa5___width 1
189#define reg_gio_r_masked_intr___pa5___bit 5
190#define reg_gio_r_masked_intr___pa6___lsb 6
191#define reg_gio_r_masked_intr___pa6___width 1
192#define reg_gio_r_masked_intr___pa6___bit 6
193#define reg_gio_r_masked_intr___pa7___lsb 7
194#define reg_gio_r_masked_intr___pa7___width 1
195#define reg_gio_r_masked_intr___pa7___bit 7
196#define reg_gio_r_masked_intr_offset 28
197
198/* Register rw_pb_dout, scope gio, type rw */
199#define reg_gio_rw_pb_dout___data___lsb 0
200#define reg_gio_rw_pb_dout___data___width 18
201#define reg_gio_rw_pb_dout_offset 32
202
203/* Register r_pb_din, scope gio, type r */
204#define reg_gio_r_pb_din___data___lsb 0
205#define reg_gio_r_pb_din___data___width 18
206#define reg_gio_r_pb_din_offset 36
207
208/* Register rw_pb_oe, scope gio, type rw */
209#define reg_gio_rw_pb_oe___oe___lsb 0
210#define reg_gio_rw_pb_oe___oe___width 18
211#define reg_gio_rw_pb_oe_offset 40
212
213/* Register rw_pc_dout, scope gio, type rw */
214#define reg_gio_rw_pc_dout___data___lsb 0
215#define reg_gio_rw_pc_dout___data___width 18
216#define reg_gio_rw_pc_dout_offset 48
217
218/* Register r_pc_din, scope gio, type r */
219#define reg_gio_r_pc_din___data___lsb 0
220#define reg_gio_r_pc_din___data___width 18
221#define reg_gio_r_pc_din_offset 52
222
223/* Register rw_pc_oe, scope gio, type rw */
224#define reg_gio_rw_pc_oe___oe___lsb 0
225#define reg_gio_rw_pc_oe___oe___width 18
226#define reg_gio_rw_pc_oe_offset 56
227
228/* Register rw_pd_dout, scope gio, type rw */
229#define reg_gio_rw_pd_dout___data___lsb 0
230#define reg_gio_rw_pd_dout___data___width 18
231#define reg_gio_rw_pd_dout_offset 64
232
233/* Register r_pd_din, scope gio, type r */
234#define reg_gio_r_pd_din___data___lsb 0
235#define reg_gio_r_pd_din___data___width 18
236#define reg_gio_r_pd_din_offset 68
237
238/* Register rw_pd_oe, scope gio, type rw */
239#define reg_gio_rw_pd_oe___oe___lsb 0
240#define reg_gio_rw_pd_oe___oe___width 18
241#define reg_gio_rw_pd_oe_offset 72
242
243/* Register rw_pe_dout, scope gio, type rw */
244#define reg_gio_rw_pe_dout___data___lsb 0
245#define reg_gio_rw_pe_dout___data___width 18
246#define reg_gio_rw_pe_dout_offset 80
247
248/* Register r_pe_din, scope gio, type r */
249#define reg_gio_r_pe_din___data___lsb 0
250#define reg_gio_r_pe_din___data___width 18
251#define reg_gio_r_pe_din_offset 84
252
253/* Register rw_pe_oe, scope gio, type rw */
254#define reg_gio_rw_pe_oe___oe___lsb 0
255#define reg_gio_rw_pe_oe___oe___width 18
256#define reg_gio_rw_pe_oe_offset 88
257
258
259/* Constants */
260#define regk_gio_anyedge 0x00000007
261#define regk_gio_hi 0x00000001
262#define regk_gio_lo 0x00000002
263#define regk_gio_negedge 0x00000006
264#define regk_gio_no 0x00000000
265#define regk_gio_off 0x00000000
266#define regk_gio_posedge 0x00000005
267#define regk_gio_rw_intr_cfg_default 0x00000000
268#define regk_gio_rw_intr_mask_default 0x00000000
269#define regk_gio_rw_pa_oe_default 0x00000000
270#define regk_gio_rw_pb_oe_default 0x00000000
271#define regk_gio_rw_pc_oe_default 0x00000000
272#define regk_gio_rw_pd_oe_default 0x00000000
273#define regk_gio_rw_pe_oe_default 0x00000000
274#define regk_gio_set 0x00000003
275#define regk_gio_yes 0x00000001
276#endif /* __gio_defs_asm_h */
diff --git a/include/asm-cris/arch-v32/mach-fs/hwregs/asm/pinmux_defs_asm.h b/include/asm-cris/arch-v32/mach-fs/hwregs/asm/pinmux_defs_asm.h
new file mode 100644
index 000000000000..30cf5a936b64
--- /dev/null
+++ b/include/asm-cris/arch-v32/mach-fs/hwregs/asm/pinmux_defs_asm.h
@@ -0,0 +1,632 @@
1#ifndef __pinmux_defs_asm_h
2#define __pinmux_defs_asm_h
3
4/*
5 * This file is autogenerated from
6 * file: ../../inst/pinmux/rtl/guinness/pinmux_regs.r
7 * id: pinmux_regs.r,v 1.40 2005/02/09 16:22:59 perz Exp
8 * last modfied: Mon Apr 11 16:09:11 2005
9 *
10 * by /n/asic/design/tools/rdesc/src/rdes2c -asm --outfile asm/pinmux_defs_asm.h ../../inst/pinmux/rtl/guinness/pinmux_regs.r
11 * id: $Id: pinmux_defs_asm.h,v 1.1 2007/04/11 11:00:39 ricardw Exp $
12 * Any changes here will be lost.
13 *
14 * -*- buffer-read-only: t -*-
15 */
16
17#ifndef REG_FIELD
18#define REG_FIELD( scope, reg, field, value ) \
19 REG_FIELD_X_( value, reg_##scope##_##reg##___##field##___lsb )
20#define REG_FIELD_X_( value, shift ) ((value) << shift)
21#endif
22
23#ifndef REG_STATE
24#define REG_STATE( scope, reg, field, symbolic_value ) \
25 REG_STATE_X_( regk_##scope##_##symbolic_value, reg_##scope##_##reg##___##field##___lsb )
26#define REG_STATE_X_( k, shift ) (k << shift)
27#endif
28
29#ifndef REG_MASK
30#define REG_MASK( scope, reg, field ) \
31 REG_MASK_X_( reg_##scope##_##reg##___##field##___width, reg_##scope##_##reg##___##field##___lsb )
32#define REG_MASK_X_( width, lsb ) (((1 << width)-1) << lsb)
33#endif
34
35#ifndef REG_LSB
36#define REG_LSB( scope, reg, field ) reg_##scope##_##reg##___##field##___lsb
37#endif
38
39#ifndef REG_BIT
40#define REG_BIT( scope, reg, field ) reg_##scope##_##reg##___##field##___bit
41#endif
42
43#ifndef REG_ADDR
44#define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset)
45#define REG_ADDR_X_( inst, offs ) ((inst) + offs)
46#endif
47
48#ifndef REG_ADDR_VECT
49#define REG_ADDR_VECT( scope, inst, reg, index ) \
50 REG_ADDR_VECT_X_(inst, reg_##scope##_##reg##_offset, index, \
51 STRIDE_##scope##_##reg )
52#define REG_ADDR_VECT_X_( inst, offs, index, stride ) \
53 ((inst) + offs + (index) * stride)
54#endif
55
56/* Register rw_pa, scope pinmux, type rw */
57#define reg_pinmux_rw_pa___pa0___lsb 0
58#define reg_pinmux_rw_pa___pa0___width 1
59#define reg_pinmux_rw_pa___pa0___bit 0
60#define reg_pinmux_rw_pa___pa1___lsb 1
61#define reg_pinmux_rw_pa___pa1___width 1
62#define reg_pinmux_rw_pa___pa1___bit 1
63#define reg_pinmux_rw_pa___pa2___lsb 2
64#define reg_pinmux_rw_pa___pa2___width 1
65#define reg_pinmux_rw_pa___pa2___bit 2
66#define reg_pinmux_rw_pa___pa3___lsb 3
67#define reg_pinmux_rw_pa___pa3___width 1
68#define reg_pinmux_rw_pa___pa3___bit 3
69#define reg_pinmux_rw_pa___pa4___lsb 4
70#define reg_pinmux_rw_pa___pa4___width 1
71#define reg_pinmux_rw_pa___pa4___bit 4
72#define reg_pinmux_rw_pa___pa5___lsb 5
73#define reg_pinmux_rw_pa___pa5___width 1
74#define reg_pinmux_rw_pa___pa5___bit 5
75#define reg_pinmux_rw_pa___pa6___lsb 6
76#define reg_pinmux_rw_pa___pa6___width 1
77#define reg_pinmux_rw_pa___pa6___bit 6
78#define reg_pinmux_rw_pa___pa7___lsb 7
79#define reg_pinmux_rw_pa___pa7___width 1
80#define reg_pinmux_rw_pa___pa7___bit 7
81#define reg_pinmux_rw_pa___csp2_n___lsb 8
82#define reg_pinmux_rw_pa___csp2_n___width 1
83#define reg_pinmux_rw_pa___csp2_n___bit 8
84#define reg_pinmux_rw_pa___csp3_n___lsb 9
85#define reg_pinmux_rw_pa___csp3_n___width 1
86#define reg_pinmux_rw_pa___csp3_n___bit 9
87#define reg_pinmux_rw_pa___csp5_n___lsb 10
88#define reg_pinmux_rw_pa___csp5_n___width 1
89#define reg_pinmux_rw_pa___csp5_n___bit 10
90#define reg_pinmux_rw_pa___csp6_n___lsb 11
91#define reg_pinmux_rw_pa___csp6_n___width 1
92#define reg_pinmux_rw_pa___csp6_n___bit 11
93#define reg_pinmux_rw_pa___hsh4___lsb 12
94#define reg_pinmux_rw_pa___hsh4___width 1
95#define reg_pinmux_rw_pa___hsh4___bit 12
96#define reg_pinmux_rw_pa___hsh5___lsb 13
97#define reg_pinmux_rw_pa___hsh5___width 1
98#define reg_pinmux_rw_pa___hsh5___bit 13
99#define reg_pinmux_rw_pa___hsh6___lsb 14
100#define reg_pinmux_rw_pa___hsh6___width 1
101#define reg_pinmux_rw_pa___hsh6___bit 14
102#define reg_pinmux_rw_pa___hsh7___lsb 15
103#define reg_pinmux_rw_pa___hsh7___width 1
104#define reg_pinmux_rw_pa___hsh7___bit 15
105#define reg_pinmux_rw_pa_offset 0
106
107/* Register rw_hwprot, scope pinmux, type rw */
108#define reg_pinmux_rw_hwprot___ser1___lsb 0
109#define reg_pinmux_rw_hwprot___ser1___width 1
110#define reg_pinmux_rw_hwprot___ser1___bit 0
111#define reg_pinmux_rw_hwprot___ser2___lsb 1
112#define reg_pinmux_rw_hwprot___ser2___width 1
113#define reg_pinmux_rw_hwprot___ser2___bit 1
114#define reg_pinmux_rw_hwprot___ser3___lsb 2
115#define reg_pinmux_rw_hwprot___ser3___width 1
116#define reg_pinmux_rw_hwprot___ser3___bit 2
117#define reg_pinmux_rw_hwprot___sser0___lsb 3
118#define reg_pinmux_rw_hwprot___sser0___width 1
119#define reg_pinmux_rw_hwprot___sser0___bit 3
120#define reg_pinmux_rw_hwprot___sser1___lsb 4
121#define reg_pinmux_rw_hwprot___sser1___width 1
122#define reg_pinmux_rw_hwprot___sser1___bit 4
123#define reg_pinmux_rw_hwprot___ata0___lsb 5
124#define reg_pinmux_rw_hwprot___ata0___width 1
125#define reg_pinmux_rw_hwprot___ata0___bit 5
126#define reg_pinmux_rw_hwprot___ata1___lsb 6
127#define reg_pinmux_rw_hwprot___ata1___width 1
128#define reg_pinmux_rw_hwprot___ata1___bit 6
129#define reg_pinmux_rw_hwprot___ata2___lsb 7
130#define reg_pinmux_rw_hwprot___ata2___width 1
131#define reg_pinmux_rw_hwprot___ata2___bit 7
132#define reg_pinmux_rw_hwprot___ata3___lsb 8
133#define reg_pinmux_rw_hwprot___ata3___width 1
134#define reg_pinmux_rw_hwprot___ata3___bit 8
135#define reg_pinmux_rw_hwprot___ata___lsb 9
136#define reg_pinmux_rw_hwprot___ata___width 1
137#define reg_pinmux_rw_hwprot___ata___bit 9
138#define reg_pinmux_rw_hwprot___eth1___lsb 10
139#define reg_pinmux_rw_hwprot___eth1___width 1
140#define reg_pinmux_rw_hwprot___eth1___bit 10
141#define reg_pinmux_rw_hwprot___eth1_mgm___lsb 11
142#define reg_pinmux_rw_hwprot___eth1_mgm___width 1
143#define reg_pinmux_rw_hwprot___eth1_mgm___bit 11
144#define reg_pinmux_rw_hwprot___timer___lsb 12
145#define reg_pinmux_rw_hwprot___timer___width 1
146#define reg_pinmux_rw_hwprot___timer___bit 12
147#define reg_pinmux_rw_hwprot___p21___lsb 13
148#define reg_pinmux_rw_hwprot___p21___width 1
149#define reg_pinmux_rw_hwprot___p21___bit 13
150#define reg_pinmux_rw_hwprot_offset 4
151
152/* Register rw_pb_gio, scope pinmux, type rw */
153#define reg_pinmux_rw_pb_gio___pb0___lsb 0
154#define reg_pinmux_rw_pb_gio___pb0___width 1
155#define reg_pinmux_rw_pb_gio___pb0___bit 0
156#define reg_pinmux_rw_pb_gio___pb1___lsb 1
157#define reg_pinmux_rw_pb_gio___pb1___width 1
158#define reg_pinmux_rw_pb_gio___pb1___bit 1
159#define reg_pinmux_rw_pb_gio___pb2___lsb 2
160#define reg_pinmux_rw_pb_gio___pb2___width 1
161#define reg_pinmux_rw_pb_gio___pb2___bit 2
162#define reg_pinmux_rw_pb_gio___pb3___lsb 3
163#define reg_pinmux_rw_pb_gio___pb3___width 1
164#define reg_pinmux_rw_pb_gio___pb3___bit 3
165#define reg_pinmux_rw_pb_gio___pb4___lsb 4
166#define reg_pinmux_rw_pb_gio___pb4___width 1
167#define reg_pinmux_rw_pb_gio___pb4___bit 4
168#define reg_pinmux_rw_pb_gio___pb5___lsb 5
169#define reg_pinmux_rw_pb_gio___pb5___width 1
170#define reg_pinmux_rw_pb_gio___pb5___bit 5
171#define reg_pinmux_rw_pb_gio___pb6___lsb 6
172#define reg_pinmux_rw_pb_gio___pb6___width 1
173#define reg_pinmux_rw_pb_gio___pb6___bit 6
174#define reg_pinmux_rw_pb_gio___pb7___lsb 7
175#define reg_pinmux_rw_pb_gio___pb7___width 1
176#define reg_pinmux_rw_pb_gio___pb7___bit 7
177#define reg_pinmux_rw_pb_gio___pb8___lsb 8
178#define reg_pinmux_rw_pb_gio___pb8___width 1
179#define reg_pinmux_rw_pb_gio___pb8___bit 8
180#define reg_pinmux_rw_pb_gio___pb9___lsb 9
181#define reg_pinmux_rw_pb_gio___pb9___width 1
182#define reg_pinmux_rw_pb_gio___pb9___bit 9
183#define reg_pinmux_rw_pb_gio___pb10___lsb 10
184#define reg_pinmux_rw_pb_gio___pb10___width 1
185#define reg_pinmux_rw_pb_gio___pb10___bit 10
186#define reg_pinmux_rw_pb_gio___pb11___lsb 11
187#define reg_pinmux_rw_pb_gio___pb11___width 1
188#define reg_pinmux_rw_pb_gio___pb11___bit 11
189#define reg_pinmux_rw_pb_gio___pb12___lsb 12
190#define reg_pinmux_rw_pb_gio___pb12___width 1
191#define reg_pinmux_rw_pb_gio___pb12___bit 12
192#define reg_pinmux_rw_pb_gio___pb13___lsb 13
193#define reg_pinmux_rw_pb_gio___pb13___width 1
194#define reg_pinmux_rw_pb_gio___pb13___bit 13
195#define reg_pinmux_rw_pb_gio___pb14___lsb 14
196#define reg_pinmux_rw_pb_gio___pb14___width 1
197#define reg_pinmux_rw_pb_gio___pb14___bit 14
198#define reg_pinmux_rw_pb_gio___pb15___lsb 15
199#define reg_pinmux_rw_pb_gio___pb15___width 1
200#define reg_pinmux_rw_pb_gio___pb15___bit 15
201#define reg_pinmux_rw_pb_gio___pb16___lsb 16
202#define reg_pinmux_rw_pb_gio___pb16___width 1
203#define reg_pinmux_rw_pb_gio___pb16___bit 16
204#define reg_pinmux_rw_pb_gio___pb17___lsb 17
205#define reg_pinmux_rw_pb_gio___pb17___width 1
206#define reg_pinmux_rw_pb_gio___pb17___bit 17
207#define reg_pinmux_rw_pb_gio_offset 8
208
209/* Register rw_pb_iop, scope pinmux, type rw */
210#define reg_pinmux_rw_pb_iop___pb0___lsb 0
211#define reg_pinmux_rw_pb_iop___pb0___width 1
212#define reg_pinmux_rw_pb_iop___pb0___bit 0
213#define reg_pinmux_rw_pb_iop___pb1___lsb 1
214#define reg_pinmux_rw_pb_iop___pb1___width 1
215#define reg_pinmux_rw_pb_iop___pb1___bit 1
216#define reg_pinmux_rw_pb_iop___pb2___lsb 2
217#define reg_pinmux_rw_pb_iop___pb2___width 1
218#define reg_pinmux_rw_pb_iop___pb2___bit 2
219#define reg_pinmux_rw_pb_iop___pb3___lsb 3
220#define reg_pinmux_rw_pb_iop___pb3___width 1
221#define reg_pinmux_rw_pb_iop___pb3___bit 3
222#define reg_pinmux_rw_pb_iop___pb4___lsb 4
223#define reg_pinmux_rw_pb_iop___pb4___width 1
224#define reg_pinmux_rw_pb_iop___pb4___bit 4
225#define reg_pinmux_rw_pb_iop___pb5___lsb 5
226#define reg_pinmux_rw_pb_iop___pb5___width 1
227#define reg_pinmux_rw_pb_iop___pb5___bit 5
228#define reg_pinmux_rw_pb_iop___pb6___lsb 6
229#define reg_pinmux_rw_pb_iop___pb6___width 1
230#define reg_pinmux_rw_pb_iop___pb6___bit 6
231#define reg_pinmux_rw_pb_iop___pb7___lsb 7
232#define reg_pinmux_rw_pb_iop___pb7___width 1
233#define reg_pinmux_rw_pb_iop___pb7___bit 7
234#define reg_pinmux_rw_pb_iop___pb8___lsb 8
235#define reg_pinmux_rw_pb_iop___pb8___width 1
236#define reg_pinmux_rw_pb_iop___pb8___bit 8
237#define reg_pinmux_rw_pb_iop___pb9___lsb 9
238#define reg_pinmux_rw_pb_iop___pb9___width 1
239#define reg_pinmux_rw_pb_iop___pb9___bit 9
240#define reg_pinmux_rw_pb_iop___pb10___lsb 10
241#define reg_pinmux_rw_pb_iop___pb10___width 1
242#define reg_pinmux_rw_pb_iop___pb10___bit 10
243#define reg_pinmux_rw_pb_iop___pb11___lsb 11
244#define reg_pinmux_rw_pb_iop___pb11___width 1
245#define reg_pinmux_rw_pb_iop___pb11___bit 11
246#define reg_pinmux_rw_pb_iop___pb12___lsb 12
247#define reg_pinmux_rw_pb_iop___pb12___width 1
248#define reg_pinmux_rw_pb_iop___pb12___bit 12
249#define reg_pinmux_rw_pb_iop___pb13___lsb 13
250#define reg_pinmux_rw_pb_iop___pb13___width 1
251#define reg_pinmux_rw_pb_iop___pb13___bit 13
252#define reg_pinmux_rw_pb_iop___pb14___lsb 14
253#define reg_pinmux_rw_pb_iop___pb14___width 1
254#define reg_pinmux_rw_pb_iop___pb14___bit 14
255#define reg_pinmux_rw_pb_iop___pb15___lsb 15
256#define reg_pinmux_rw_pb_iop___pb15___width 1
257#define reg_pinmux_rw_pb_iop___pb15___bit 15
258#define reg_pinmux_rw_pb_iop___pb16___lsb 16
259#define reg_pinmux_rw_pb_iop___pb16___width 1
260#define reg_pinmux_rw_pb_iop___pb16___bit 16
261#define reg_pinmux_rw_pb_iop___pb17___lsb 17
262#define reg_pinmux_rw_pb_iop___pb17___width 1
263#define reg_pinmux_rw_pb_iop___pb17___bit 17
264#define reg_pinmux_rw_pb_iop_offset 12
265
266/* Register rw_pc_gio, scope pinmux, type rw */
267#define reg_pinmux_rw_pc_gio___pc0___lsb 0
268#define reg_pinmux_rw_pc_gio___pc0___width 1
269#define reg_pinmux_rw_pc_gio___pc0___bit 0
270#define reg_pinmux_rw_pc_gio___pc1___lsb 1
271#define reg_pinmux_rw_pc_gio___pc1___width 1
272#define reg_pinmux_rw_pc_gio___pc1___bit 1
273#define reg_pinmux_rw_pc_gio___pc2___lsb 2
274#define reg_pinmux_rw_pc_gio___pc2___width 1
275#define reg_pinmux_rw_pc_gio___pc2___bit 2
276#define reg_pinmux_rw_pc_gio___pc3___lsb 3
277#define reg_pinmux_rw_pc_gio___pc3___width 1
278#define reg_pinmux_rw_pc_gio___pc3___bit 3
279#define reg_pinmux_rw_pc_gio___pc4___lsb 4
280#define reg_pinmux_rw_pc_gio___pc4___width 1
281#define reg_pinmux_rw_pc_gio___pc4___bit 4
282#define reg_pinmux_rw_pc_gio___pc5___lsb 5
283#define reg_pinmux_rw_pc_gio___pc5___width 1
284#define reg_pinmux_rw_pc_gio___pc5___bit 5
285#define reg_pinmux_rw_pc_gio___pc6___lsb 6
286#define reg_pinmux_rw_pc_gio___pc6___width 1
287#define reg_pinmux_rw_pc_gio___pc6___bit 6
288#define reg_pinmux_rw_pc_gio___pc7___lsb 7
289#define reg_pinmux_rw_pc_gio___pc7___width 1
290#define reg_pinmux_rw_pc_gio___pc7___bit 7
291#define reg_pinmux_rw_pc_gio___pc8___lsb 8
292#define reg_pinmux_rw_pc_gio___pc8___width 1
293#define reg_pinmux_rw_pc_gio___pc8___bit 8
294#define reg_pinmux_rw_pc_gio___pc9___lsb 9
295#define reg_pinmux_rw_pc_gio___pc9___width 1
296#define reg_pinmux_rw_pc_gio___pc9___bit 9
297#define reg_pinmux_rw_pc_gio___pc10___lsb 10
298#define reg_pinmux_rw_pc_gio___pc10___width 1
299#define reg_pinmux_rw_pc_gio___pc10___bit 10
300#define reg_pinmux_rw_pc_gio___pc11___lsb 11
301#define reg_pinmux_rw_pc_gio___pc11___width 1
302#define reg_pinmux_rw_pc_gio___pc11___bit 11
303#define reg_pinmux_rw_pc_gio___pc12___lsb 12
304#define reg_pinmux_rw_pc_gio___pc12___width 1
305#define reg_pinmux_rw_pc_gio___pc12___bit 12
306#define reg_pinmux_rw_pc_gio___pc13___lsb 13
307#define reg_pinmux_rw_pc_gio___pc13___width 1
308#define reg_pinmux_rw_pc_gio___pc13___bit 13
309#define reg_pinmux_rw_pc_gio___pc14___lsb 14
310#define reg_pinmux_rw_pc_gio___pc14___width 1
311#define reg_pinmux_rw_pc_gio___pc14___bit 14
312#define reg_pinmux_rw_pc_gio___pc15___lsb 15
313#define reg_pinmux_rw_pc_gio___pc15___width 1
314#define reg_pinmux_rw_pc_gio___pc15___bit 15
315#define reg_pinmux_rw_pc_gio___pc16___lsb 16
316#define reg_pinmux_rw_pc_gio___pc16___width 1
317#define reg_pinmux_rw_pc_gio___pc16___bit 16
318#define reg_pinmux_rw_pc_gio___pc17___lsb 17
319#define reg_pinmux_rw_pc_gio___pc17___width 1
320#define reg_pinmux_rw_pc_gio___pc17___bit 17
321#define reg_pinmux_rw_pc_gio_offset 16
322
323/* Register rw_pc_iop, scope pinmux, type rw */
324#define reg_pinmux_rw_pc_iop___pc0___lsb 0
325#define reg_pinmux_rw_pc_iop___pc0___width 1
326#define reg_pinmux_rw_pc_iop___pc0___bit 0
327#define reg_pinmux_rw_pc_iop___pc1___lsb 1
328#define reg_pinmux_rw_pc_iop___pc1___width 1
329#define reg_pinmux_rw_pc_iop___pc1___bit 1
330#define reg_pinmux_rw_pc_iop___pc2___lsb 2
331#define reg_pinmux_rw_pc_iop___pc2___width 1
332#define reg_pinmux_rw_pc_iop___pc2___bit 2
333#define reg_pinmux_rw_pc_iop___pc3___lsb 3
334#define reg_pinmux_rw_pc_iop___pc3___width 1
335#define reg_pinmux_rw_pc_iop___pc3___bit 3
336#define reg_pinmux_rw_pc_iop___pc4___lsb 4
337#define reg_pinmux_rw_pc_iop___pc4___width 1
338#define reg_pinmux_rw_pc_iop___pc4___bit 4
339#define reg_pinmux_rw_pc_iop___pc5___lsb 5
340#define reg_pinmux_rw_pc_iop___pc5___width 1
341#define reg_pinmux_rw_pc_iop___pc5___bit 5
342#define reg_pinmux_rw_pc_iop___pc6___lsb 6
343#define reg_pinmux_rw_pc_iop___pc6___width 1
344#define reg_pinmux_rw_pc_iop___pc6___bit 6
345#define reg_pinmux_rw_pc_iop___pc7___lsb 7
346#define reg_pinmux_rw_pc_iop___pc7___width 1
347#define reg_pinmux_rw_pc_iop___pc7___bit 7
348#define reg_pinmux_rw_pc_iop___pc8___lsb 8
349#define reg_pinmux_rw_pc_iop___pc8___width 1
350#define reg_pinmux_rw_pc_iop___pc8___bit 8
351#define reg_pinmux_rw_pc_iop___pc9___lsb 9
352#define reg_pinmux_rw_pc_iop___pc9___width 1
353#define reg_pinmux_rw_pc_iop___pc9___bit 9
354#define reg_pinmux_rw_pc_iop___pc10___lsb 10
355#define reg_pinmux_rw_pc_iop___pc10___width 1
356#define reg_pinmux_rw_pc_iop___pc10___bit 10
357#define reg_pinmux_rw_pc_iop___pc11___lsb 11
358#define reg_pinmux_rw_pc_iop___pc11___width 1
359#define reg_pinmux_rw_pc_iop___pc11___bit 11
360#define reg_pinmux_rw_pc_iop___pc12___lsb 12
361#define reg_pinmux_rw_pc_iop___pc12___width 1
362#define reg_pinmux_rw_pc_iop___pc12___bit 12
363#define reg_pinmux_rw_pc_iop___pc13___lsb 13
364#define reg_pinmux_rw_pc_iop___pc13___width 1
365#define reg_pinmux_rw_pc_iop___pc13___bit 13
366#define reg_pinmux_rw_pc_iop___pc14___lsb 14
367#define reg_pinmux_rw_pc_iop___pc14___width 1
368#define reg_pinmux_rw_pc_iop___pc14___bit 14
369#define reg_pinmux_rw_pc_iop___pc15___lsb 15
370#define reg_pinmux_rw_pc_iop___pc15___width 1
371#define reg_pinmux_rw_pc_iop___pc15___bit 15
372#define reg_pinmux_rw_pc_iop___pc16___lsb 16
373#define reg_pinmux_rw_pc_iop___pc16___width 1
374#define reg_pinmux_rw_pc_iop___pc16___bit 16
375#define reg_pinmux_rw_pc_iop___pc17___lsb 17
376#define reg_pinmux_rw_pc_iop___pc17___width 1
377#define reg_pinmux_rw_pc_iop___pc17___bit 17
378#define reg_pinmux_rw_pc_iop_offset 20
379
380/* Register rw_pd_gio, scope pinmux, type rw */
381#define reg_pinmux_rw_pd_gio___pd0___lsb 0
382#define reg_pinmux_rw_pd_gio___pd0___width 1
383#define reg_pinmux_rw_pd_gio___pd0___bit 0
384#define reg_pinmux_rw_pd_gio___pd1___lsb 1
385#define reg_pinmux_rw_pd_gio___pd1___width 1
386#define reg_pinmux_rw_pd_gio___pd1___bit 1
387#define reg_pinmux_rw_pd_gio___pd2___lsb 2
388#define reg_pinmux_rw_pd_gio___pd2___width 1
389#define reg_pinmux_rw_pd_gio___pd2___bit 2
390#define reg_pinmux_rw_pd_gio___pd3___lsb 3
391#define reg_pinmux_rw_pd_gio___pd3___width 1
392#define reg_pinmux_rw_pd_gio___pd3___bit 3
393#define reg_pinmux_rw_pd_gio___pd4___lsb 4
394#define reg_pinmux_rw_pd_gio___pd4___width 1
395#define reg_pinmux_rw_pd_gio___pd4___bit 4
396#define reg_pinmux_rw_pd_gio___pd5___lsb 5
397#define reg_pinmux_rw_pd_gio___pd5___width 1
398#define reg_pinmux_rw_pd_gio___pd5___bit 5
399#define reg_pinmux_rw_pd_gio___pd6___lsb 6
400#define reg_pinmux_rw_pd_gio___pd6___width 1
401#define reg_pinmux_rw_pd_gio___pd6___bit 6
402#define reg_pinmux_rw_pd_gio___pd7___lsb 7
403#define reg_pinmux_rw_pd_gio___pd7___width 1
404#define reg_pinmux_rw_pd_gio___pd7___bit 7
405#define reg_pinmux_rw_pd_gio___pd8___lsb 8
406#define reg_pinmux_rw_pd_gio___pd8___width 1
407#define reg_pinmux_rw_pd_gio___pd8___bit 8
408#define reg_pinmux_rw_pd_gio___pd9___lsb 9
409#define reg_pinmux_rw_pd_gio___pd9___width 1
410#define reg_pinmux_rw_pd_gio___pd9___bit 9
411#define reg_pinmux_rw_pd_gio___pd10___lsb 10
412#define reg_pinmux_rw_pd_gio___pd10___width 1
413#define reg_pinmux_rw_pd_gio___pd10___bit 10
414#define reg_pinmux_rw_pd_gio___pd11___lsb 11
415#define reg_pinmux_rw_pd_gio___pd11___width 1
416#define reg_pinmux_rw_pd_gio___pd11___bit 11
417#define reg_pinmux_rw_pd_gio___pd12___lsb 12
418#define reg_pinmux_rw_pd_gio___pd12___width 1
419#define reg_pinmux_rw_pd_gio___pd12___bit 12
420#define reg_pinmux_rw_pd_gio___pd13___lsb 13
421#define reg_pinmux_rw_pd_gio___pd13___width 1
422#define reg_pinmux_rw_pd_gio___pd13___bit 13
423#define reg_pinmux_rw_pd_gio___pd14___lsb 14
424#define reg_pinmux_rw_pd_gio___pd14___width 1
425#define reg_pinmux_rw_pd_gio___pd14___bit 14
426#define reg_pinmux_rw_pd_gio___pd15___lsb 15
427#define reg_pinmux_rw_pd_gio___pd15___width 1
428#define reg_pinmux_rw_pd_gio___pd15___bit 15
429#define reg_pinmux_rw_pd_gio___pd16___lsb 16
430#define reg_pinmux_rw_pd_gio___pd16___width 1
431#define reg_pinmux_rw_pd_gio___pd16___bit 16
432#define reg_pinmux_rw_pd_gio___pd17___lsb 17
433#define reg_pinmux_rw_pd_gio___pd17___width 1
434#define reg_pinmux_rw_pd_gio___pd17___bit 17
435#define reg_pinmux_rw_pd_gio_offset 24
436
437/* Register rw_pd_iop, scope pinmux, type rw */
438#define reg_pinmux_rw_pd_iop___pd0___lsb 0
439#define reg_pinmux_rw_pd_iop___pd0___width 1
440#define reg_pinmux_rw_pd_iop___pd0___bit 0
441#define reg_pinmux_rw_pd_iop___pd1___lsb 1
442#define reg_pinmux_rw_pd_iop___pd1___width 1
443#define reg_pinmux_rw_pd_iop___pd1___bit 1
444#define reg_pinmux_rw_pd_iop___pd2___lsb 2
445#define reg_pinmux_rw_pd_iop___pd2___width 1
446#define reg_pinmux_rw_pd_iop___pd2___bit 2
447#define reg_pinmux_rw_pd_iop___pd3___lsb 3
448#define reg_pinmux_rw_pd_iop___pd3___width 1
449#define reg_pinmux_rw_pd_iop___pd3___bit 3
450#define reg_pinmux_rw_pd_iop___pd4___lsb 4
451#define reg_pinmux_rw_pd_iop___pd4___width 1
452#define reg_pinmux_rw_pd_iop___pd4___bit 4
453#define reg_pinmux_rw_pd_iop___pd5___lsb 5
454#define reg_pinmux_rw_pd_iop___pd5___width 1
455#define reg_pinmux_rw_pd_iop___pd5___bit 5
456#define reg_pinmux_rw_pd_iop___pd6___lsb 6
457#define reg_pinmux_rw_pd_iop___pd6___width 1
458#define reg_pinmux_rw_pd_iop___pd6___bit 6
459#define reg_pinmux_rw_pd_iop___pd7___lsb 7
460#define reg_pinmux_rw_pd_iop___pd7___width 1
461#define reg_pinmux_rw_pd_iop___pd7___bit 7
462#define reg_pinmux_rw_pd_iop___pd8___lsb 8
463#define reg_pinmux_rw_pd_iop___pd8___width 1
464#define reg_pinmux_rw_pd_iop___pd8___bit 8
465#define reg_pinmux_rw_pd_iop___pd9___lsb 9
466#define reg_pinmux_rw_pd_iop___pd9___width 1
467#define reg_pinmux_rw_pd_iop___pd9___bit 9
468#define reg_pinmux_rw_pd_iop___pd10___lsb 10
469#define reg_pinmux_rw_pd_iop___pd10___width 1
470#define reg_pinmux_rw_pd_iop___pd10___bit 10
471#define reg_pinmux_rw_pd_iop___pd11___lsb 11
472#define reg_pinmux_rw_pd_iop___pd11___width 1
473#define reg_pinmux_rw_pd_iop___pd11___bit 11
474#define reg_pinmux_rw_pd_iop___pd12___lsb 12
475#define reg_pinmux_rw_pd_iop___pd12___width 1
476#define reg_pinmux_rw_pd_iop___pd12___bit 12
477#define reg_pinmux_rw_pd_iop___pd13___lsb 13
478#define reg_pinmux_rw_pd_iop___pd13___width 1
479#define reg_pinmux_rw_pd_iop___pd13___bit 13
480#define reg_pinmux_rw_pd_iop___pd14___lsb 14
481#define reg_pinmux_rw_pd_iop___pd14___width 1
482#define reg_pinmux_rw_pd_iop___pd14___bit 14
483#define reg_pinmux_rw_pd_iop___pd15___lsb 15
484#define reg_pinmux_rw_pd_iop___pd15___width 1
485#define reg_pinmux_rw_pd_iop___pd15___bit 15
486#define reg_pinmux_rw_pd_iop___pd16___lsb 16
487#define reg_pinmux_rw_pd_iop___pd16___width 1
488#define reg_pinmux_rw_pd_iop___pd16___bit 16
489#define reg_pinmux_rw_pd_iop___pd17___lsb 17
490#define reg_pinmux_rw_pd_iop___pd17___width 1
491#define reg_pinmux_rw_pd_iop___pd17___bit 17
492#define reg_pinmux_rw_pd_iop_offset 28
493
494/* Register rw_pe_gio, scope pinmux, type rw */
495#define reg_pinmux_rw_pe_gio___pe0___lsb 0
496#define reg_pinmux_rw_pe_gio___pe0___width 1
497#define reg_pinmux_rw_pe_gio___pe0___bit 0
498#define reg_pinmux_rw_pe_gio___pe1___lsb 1
499#define reg_pinmux_rw_pe_gio___pe1___width 1
500#define reg_pinmux_rw_pe_gio___pe1___bit 1
501#define reg_pinmux_rw_pe_gio___pe2___lsb 2
502#define reg_pinmux_rw_pe_gio___pe2___width 1
503#define reg_pinmux_rw_pe_gio___pe2___bit 2
504#define reg_pinmux_rw_pe_gio___pe3___lsb 3
505#define reg_pinmux_rw_pe_gio___pe3___width 1
506#define reg_pinmux_rw_pe_gio___pe3___bit 3
507#define reg_pinmux_rw_pe_gio___pe4___lsb 4
508#define reg_pinmux_rw_pe_gio___pe4___width 1
509#define reg_pinmux_rw_pe_gio___pe4___bit 4
510#define reg_pinmux_rw_pe_gio___pe5___lsb 5
511#define reg_pinmux_rw_pe_gio___pe5___width 1
512#define reg_pinmux_rw_pe_gio___pe5___bit 5
513#define reg_pinmux_rw_pe_gio___pe6___lsb 6
514#define reg_pinmux_rw_pe_gio___pe6___width 1
515#define reg_pinmux_rw_pe_gio___pe6___bit 6
516#define reg_pinmux_rw_pe_gio___pe7___lsb 7
517#define reg_pinmux_rw_pe_gio___pe7___width 1
518#define reg_pinmux_rw_pe_gio___pe7___bit 7
519#define reg_pinmux_rw_pe_gio___pe8___lsb 8
520#define reg_pinmux_rw_pe_gio___pe8___width 1
521#define reg_pinmux_rw_pe_gio___pe8___bit 8
522#define reg_pinmux_rw_pe_gio___pe9___lsb 9
523#define reg_pinmux_rw_pe_gio___pe9___width 1
524#define reg_pinmux_rw_pe_gio___pe9___bit 9
525#define reg_pinmux_rw_pe_gio___pe10___lsb 10
526#define reg_pinmux_rw_pe_gio___pe10___width 1
527#define reg_pinmux_rw_pe_gio___pe10___bit 10
528#define reg_pinmux_rw_pe_gio___pe11___lsb 11
529#define reg_pinmux_rw_pe_gio___pe11___width 1
530#define reg_pinmux_rw_pe_gio___pe11___bit 11
531#define reg_pinmux_rw_pe_gio___pe12___lsb 12
532#define reg_pinmux_rw_pe_gio___pe12___width 1
533#define reg_pinmux_rw_pe_gio___pe12___bit 12
534#define reg_pinmux_rw_pe_gio___pe13___lsb 13
535#define reg_pinmux_rw_pe_gio___pe13___width 1
536#define reg_pinmux_rw_pe_gio___pe13___bit 13
537#define reg_pinmux_rw_pe_gio___pe14___lsb 14
538#define reg_pinmux_rw_pe_gio___pe14___width 1
539#define reg_pinmux_rw_pe_gio___pe14___bit 14
540#define reg_pinmux_rw_pe_gio___pe15___lsb 15
541#define reg_pinmux_rw_pe_gio___pe15___width 1
542#define reg_pinmux_rw_pe_gio___pe15___bit 15
543#define reg_pinmux_rw_pe_gio___pe16___lsb 16
544#define reg_pinmux_rw_pe_gio___pe16___width 1
545#define reg_pinmux_rw_pe_gio___pe16___bit 16
546#define reg_pinmux_rw_pe_gio___pe17___lsb 17
547#define reg_pinmux_rw_pe_gio___pe17___width 1
548#define reg_pinmux_rw_pe_gio___pe17___bit 17
549#define reg_pinmux_rw_pe_gio_offset 32
550
551/* Register rw_pe_iop, scope pinmux, type rw */
552#define reg_pinmux_rw_pe_iop___pe0___lsb 0
553#define reg_pinmux_rw_pe_iop___pe0___width 1
554#define reg_pinmux_rw_pe_iop___pe0___bit 0
555#define reg_pinmux_rw_pe_iop___pe1___lsb 1
556#define reg_pinmux_rw_pe_iop___pe1___width 1
557#define reg_pinmux_rw_pe_iop___pe1___bit 1
558#define reg_pinmux_rw_pe_iop___pe2___lsb 2
559#define reg_pinmux_rw_pe_iop___pe2___width 1
560#define reg_pinmux_rw_pe_iop___pe2___bit 2
561#define reg_pinmux_rw_pe_iop___pe3___lsb 3
562#define reg_pinmux_rw_pe_iop___pe3___width 1
563#define reg_pinmux_rw_pe_iop___pe3___bit 3
564#define reg_pinmux_rw_pe_iop___pe4___lsb 4
565#define reg_pinmux_rw_pe_iop___pe4___width 1
566#define reg_pinmux_rw_pe_iop___pe4___bit 4
567#define reg_pinmux_rw_pe_iop___pe5___lsb 5
568#define reg_pinmux_rw_pe_iop___pe5___width 1
569#define reg_pinmux_rw_pe_iop___pe5___bit 5
570#define reg_pinmux_rw_pe_iop___pe6___lsb 6
571#define reg_pinmux_rw_pe_iop___pe6___width 1
572#define reg_pinmux_rw_pe_iop___pe6___bit 6
573#define reg_pinmux_rw_pe_iop___pe7___lsb 7
574#define reg_pinmux_rw_pe_iop___pe7___width 1
575#define reg_pinmux_rw_pe_iop___pe7___bit 7
576#define reg_pinmux_rw_pe_iop___pe8___lsb 8
577#define reg_pinmux_rw_pe_iop___pe8___width 1
578#define reg_pinmux_rw_pe_iop___pe8___bit 8
579#define reg_pinmux_rw_pe_iop___pe9___lsb 9
580#define reg_pinmux_rw_pe_iop___pe9___width 1
581#define reg_pinmux_rw_pe_iop___pe9___bit 9
582#define reg_pinmux_rw_pe_iop___pe10___lsb 10
583#define reg_pinmux_rw_pe_iop___pe10___width 1
584#define reg_pinmux_rw_pe_iop___pe10___bit 10
585#define reg_pinmux_rw_pe_iop___pe11___lsb 11
586#define reg_pinmux_rw_pe_iop___pe11___width 1
587#define reg_pinmux_rw_pe_iop___pe11___bit 11
588#define reg_pinmux_rw_pe_iop___pe12___lsb 12
589#define reg_pinmux_rw_pe_iop___pe12___width 1
590#define reg_pinmux_rw_pe_iop___pe12___bit 12
591#define reg_pinmux_rw_pe_iop___pe13___lsb 13
592#define reg_pinmux_rw_pe_iop___pe13___width 1
593#define reg_pinmux_rw_pe_iop___pe13___bit 13
594#define reg_pinmux_rw_pe_iop___pe14___lsb 14
595#define reg_pinmux_rw_pe_iop___pe14___width 1
596#define reg_pinmux_rw_pe_iop___pe14___bit 14
597#define reg_pinmux_rw_pe_iop___pe15___lsb 15
598#define reg_pinmux_rw_pe_iop___pe15___width 1
599#define reg_pinmux_rw_pe_iop___pe15___bit 15
600#define reg_pinmux_rw_pe_iop___pe16___lsb 16
601#define reg_pinmux_rw_pe_iop___pe16___width 1
602#define reg_pinmux_rw_pe_iop___pe16___bit 16
603#define reg_pinmux_rw_pe_iop___pe17___lsb 17
604#define reg_pinmux_rw_pe_iop___pe17___width 1
605#define reg_pinmux_rw_pe_iop___pe17___bit 17
606#define reg_pinmux_rw_pe_iop_offset 36
607
608/* Register rw_usb_phy, scope pinmux, type rw */
609#define reg_pinmux_rw_usb_phy___en_usb0___lsb 0
610#define reg_pinmux_rw_usb_phy___en_usb0___width 1
611#define reg_pinmux_rw_usb_phy___en_usb0___bit 0
612#define reg_pinmux_rw_usb_phy___en_usb1___lsb 1
613#define reg_pinmux_rw_usb_phy___en_usb1___width 1
614#define reg_pinmux_rw_usb_phy___en_usb1___bit 1
615#define reg_pinmux_rw_usb_phy_offset 40
616
617
618/* Constants */
619#define regk_pinmux_no 0x00000000
620#define regk_pinmux_rw_hwprot_default 0x00000000
621#define regk_pinmux_rw_pa_default 0x00000000
622#define regk_pinmux_rw_pb_gio_default 0x00000000
623#define regk_pinmux_rw_pb_iop_default 0x00000000
624#define regk_pinmux_rw_pc_gio_default 0x00000000
625#define regk_pinmux_rw_pc_iop_default 0x00000000
626#define regk_pinmux_rw_pd_gio_default 0x00000000
627#define regk_pinmux_rw_pd_iop_default 0x00000000
628#define regk_pinmux_rw_pe_gio_default 0x00000000
629#define regk_pinmux_rw_pe_iop_default 0x00000000
630#define regk_pinmux_rw_usb_phy_default 0x00000000
631#define regk_pinmux_yes 0x00000001
632#endif /* __pinmux_defs_asm_h */
diff --git a/include/asm-cris/arch-v32/mach-fs/hwregs/asm/reg_map_asm.h b/include/asm-cris/arch-v32/mach-fs/hwregs/asm/reg_map_asm.h
new file mode 100644
index 000000000000..87517aebd2cb
--- /dev/null
+++ b/include/asm-cris/arch-v32/mach-fs/hwregs/asm/reg_map_asm.h
@@ -0,0 +1,96 @@
1#ifndef __reg_map_h
2#define __reg_map_h
3
4/*
5 * This file is autogenerated from
6 * file: ../../mod/fakereg.rmap
7 * id: fakereg.rmap,v 1.3 2004/02/11 19:53:22 ronny Exp
8 * last modified: Wed Feb 11 20:53:25 2004
9 * file: ../../rtl/global.rmap
10 * id: global.rmap,v 1.3 2003/08/18 15:08:23 mikaeln Exp
11 * last modified: Mon Aug 18 17:08:23 2003
12 * file: ../../mod/modreg.rmap
13 * id: modreg.rmap,v 1.31 2004/02/20 15:40:04 stefans Exp
14 * last modified: Fri Feb 20 16:40:04 2004
15 *
16 * by /n/asic/design/tools/rdesc/src/rdes2c -asm --outfile asm/reg_map_asm.h -base 0xb0000000 ../../rtl/global.rmap ../../mod/modreg.rmap ../../inst/memarb/rtl/guinness/marb_top.r ../../mod/fakereg.rmap
17 * id: $Id: reg_map_asm.h,v 1.1 2007/02/13 11:55:30 starvik Exp $
18 * Any changes here will be lost.
19 *
20 * -*- buffer-read-only: t -*-
21 */
22#define regi_artpec_mod 0xb7044000
23#define regi_ata 0xb0032000
24#define regi_ata_mod 0xb7006000
25#define regi_barber 0xb701a000
26#define regi_bif_core 0xb0014000
27#define regi_bif_dma 0xb0016000
28#define regi_bif_slave 0xb0018000
29#define regi_bif_slave_ext 0xac000000
30#define regi_bus_master 0xb703c000
31#define regi_config 0xb003c000
32#define regi_dma0 0xb0000000
33#define regi_dma1 0xb0002000
34#define regi_dma2 0xb0004000
35#define regi_dma3 0xb0006000
36#define regi_dma4 0xb0008000
37#define regi_dma5 0xb000a000
38#define regi_dma6 0xb000c000
39#define regi_dma7 0xb000e000
40#define regi_dma8 0xb0010000
41#define regi_dma9 0xb0012000
42#define regi_eth0 0xb0034000
43#define regi_eth1 0xb0036000
44#define regi_eth_mod 0xb7004000
45#define regi_eth_mod1 0xb701c000
46#define regi_eth_strmod 0xb7008000
47#define regi_eth_strmod1 0xb7032000
48#define regi_ext_dma 0xb703a000
49#define regi_ext_mem 0xb7046000
50#define regi_gen_io 0xb7016000
51#define regi_gio 0xb001a000
52#define regi_hook 0xb7000000
53#define regi_iop 0xb0020000
54#define regi_irq 0xb001c000
55#define regi_irq_nmi 0xb701e000
56#define regi_marb 0xb003e000
57#define regi_marb_bp0 0xb003e240
58#define regi_marb_bp1 0xb003e280
59#define regi_marb_bp2 0xb003e2c0
60#define regi_marb_bp3 0xb003e300
61#define regi_nand_mod 0xb7014000
62#define regi_p21 0xb002e000
63#define regi_p21_mod 0xb7042000
64#define regi_pci_mod 0xb7010000
65#define regi_pin_test 0xb7018000
66#define regi_pinmux 0xb0038000
67#define regi_sdram_chk 0xb703e000
68#define regi_sdram_mod 0xb7012000
69#define regi_ser0 0xb0026000
70#define regi_ser1 0xb0028000
71#define regi_ser2 0xb002a000
72#define regi_ser3 0xb002c000
73#define regi_ser_mod0 0xb7020000
74#define regi_ser_mod1 0xb7022000
75#define regi_ser_mod2 0xb7024000
76#define regi_ser_mod3 0xb7026000
77#define regi_smif_stat 0xb700e000
78#define regi_sser0 0xb0022000
79#define regi_sser1 0xb0024000
80#define regi_sser_mod0 0xb700a000
81#define regi_sser_mod1 0xb700c000
82#define regi_strcop 0xb0030000
83#define regi_strmux 0xb003a000
84#define regi_strmux_tst 0xb7040000
85#define regi_tap 0xb7002000
86#define regi_timer 0xb001e000
87#define regi_timer_mod 0xb7034000
88#define regi_trace 0xb0040000
89#define regi_usb0 0xb7028000
90#define regi_usb1 0xb702a000
91#define regi_usb2 0xb702c000
92#define regi_usb3 0xb702e000
93#define regi_usb_dev 0xb7030000
94#define regi_utmi_mod0 0xb7036000
95#define regi_utmi_mod1 0xb7038000
96#endif /* __reg_map_h */
diff --git a/include/asm-cris/arch-v32/mach-fs/hwregs/asm/timer_defs_asm.h b/include/asm-cris/arch-v32/mach-fs/hwregs/asm/timer_defs_asm.h
new file mode 100644
index 000000000000..e1197194d5c1
--- /dev/null
+++ b/include/asm-cris/arch-v32/mach-fs/hwregs/asm/timer_defs_asm.h
@@ -0,0 +1,229 @@
1#ifndef __timer_defs_asm_h
2#define __timer_defs_asm_h
3
4/*
5 * This file is autogenerated from
6 * file: ../../inst/timer/rtl/timer_regs.r
7 * id: timer_regs.r,v 1.7 2003/03/11 11:16:59 perz Exp
8 * last modfied: Mon Apr 11 16:09:53 2005
9 *
10 * by /n/asic/design/tools/rdesc/src/rdes2c -asm --outfile asm/timer_defs_asm.h ../../inst/timer/rtl/timer_regs.r
11 * id: $Id: timer_defs_asm.h,v 1.1 2007/04/11 13:51:01 ricardw Exp $
12 * Any changes here will be lost.
13 *
14 * -*- buffer-read-only: t -*-
15 */
16
17#ifndef REG_FIELD
18#define REG_FIELD( scope, reg, field, value ) \
19 REG_FIELD_X_( value, reg_##scope##_##reg##___##field##___lsb )
20#define REG_FIELD_X_( value, shift ) ((value) << shift)
21#endif
22
23#ifndef REG_STATE
24#define REG_STATE( scope, reg, field, symbolic_value ) \
25 REG_STATE_X_( regk_##scope##_##symbolic_value, reg_##scope##_##reg##___##field##___lsb )
26#define REG_STATE_X_( k, shift ) (k << shift)
27#endif
28
29#ifndef REG_MASK
30#define REG_MASK( scope, reg, field ) \
31 REG_MASK_X_( reg_##scope##_##reg##___##field##___width, reg_##scope##_##reg##___##field##___lsb )
32#define REG_MASK_X_( width, lsb ) (((1 << width)-1) << lsb)
33#endif
34
35#ifndef REG_LSB
36#define REG_LSB( scope, reg, field ) reg_##scope##_##reg##___##field##___lsb
37#endif
38
39#ifndef REG_BIT
40#define REG_BIT( scope, reg, field ) reg_##scope##_##reg##___##field##___bit
41#endif
42
43#ifndef REG_ADDR
44#define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset)
45#define REG_ADDR_X_( inst, offs ) ((inst) + offs)
46#endif
47
48#ifndef REG_ADDR_VECT
49#define REG_ADDR_VECT( scope, inst, reg, index ) \
50 REG_ADDR_VECT_X_(inst, reg_##scope##_##reg##_offset, index, \
51 STRIDE_##scope##_##reg )
52#define REG_ADDR_VECT_X_( inst, offs, index, stride ) \
53 ((inst) + offs + (index) * stride)
54#endif
55
56/* Register rw_tmr0_div, scope timer, type rw */
57#define reg_timer_rw_tmr0_div_offset 0
58
59/* Register r_tmr0_data, scope timer, type r */
60#define reg_timer_r_tmr0_data_offset 4
61
62/* Register rw_tmr0_ctrl, scope timer, type rw */
63#define reg_timer_rw_tmr0_ctrl___op___lsb 0
64#define reg_timer_rw_tmr0_ctrl___op___width 2
65#define reg_timer_rw_tmr0_ctrl___freq___lsb 2
66#define reg_timer_rw_tmr0_ctrl___freq___width 3
67#define reg_timer_rw_tmr0_ctrl_offset 8
68
69/* Register rw_tmr1_div, scope timer, type rw */
70#define reg_timer_rw_tmr1_div_offset 16
71
72/* Register r_tmr1_data, scope timer, type r */
73#define reg_timer_r_tmr1_data_offset 20
74
75/* Register rw_tmr1_ctrl, scope timer, type rw */
76#define reg_timer_rw_tmr1_ctrl___op___lsb 0
77#define reg_timer_rw_tmr1_ctrl___op___width 2
78#define reg_timer_rw_tmr1_ctrl___freq___lsb 2
79#define reg_timer_rw_tmr1_ctrl___freq___width 3
80#define reg_timer_rw_tmr1_ctrl_offset 24
81
82/* Register rs_cnt_data, scope timer, type rs */
83#define reg_timer_rs_cnt_data___tmr___lsb 0
84#define reg_timer_rs_cnt_data___tmr___width 24
85#define reg_timer_rs_cnt_data___cnt___lsb 24
86#define reg_timer_rs_cnt_data___cnt___width 8
87#define reg_timer_rs_cnt_data_offset 32
88
89/* Register r_cnt_data, scope timer, type r */
90#define reg_timer_r_cnt_data___tmr___lsb 0
91#define reg_timer_r_cnt_data___tmr___width 24
92#define reg_timer_r_cnt_data___cnt___lsb 24
93#define reg_timer_r_cnt_data___cnt___width 8
94#define reg_timer_r_cnt_data_offset 36
95
96/* Register rw_cnt_cfg, scope timer, type rw */
97#define reg_timer_rw_cnt_cfg___clk___lsb 0
98#define reg_timer_rw_cnt_cfg___clk___width 2
99#define reg_timer_rw_cnt_cfg_offset 40
100
101/* Register rw_trig, scope timer, type rw */
102#define reg_timer_rw_trig_offset 48
103
104/* Register rw_trig_cfg, scope timer, type rw */
105#define reg_timer_rw_trig_cfg___tmr___lsb 0
106#define reg_timer_rw_trig_cfg___tmr___width 2
107#define reg_timer_rw_trig_cfg_offset 52
108
109/* Register r_time, scope timer, type r */
110#define reg_timer_r_time_offset 56
111
112/* Register rw_out, scope timer, type rw */
113#define reg_timer_rw_out___tmr___lsb 0
114#define reg_timer_rw_out___tmr___width 2
115#define reg_timer_rw_out_offset 60
116
117/* Register rw_wd_ctrl, scope timer, type rw */
118#define reg_timer_rw_wd_ctrl___cnt___lsb 0
119#define reg_timer_rw_wd_ctrl___cnt___width 8
120#define reg_timer_rw_wd_ctrl___cmd___lsb 8
121#define reg_timer_rw_wd_ctrl___cmd___width 1
122#define reg_timer_rw_wd_ctrl___cmd___bit 8
123#define reg_timer_rw_wd_ctrl___key___lsb 9
124#define reg_timer_rw_wd_ctrl___key___width 7
125#define reg_timer_rw_wd_ctrl_offset 64
126
127/* Register r_wd_stat, scope timer, type r */
128#define reg_timer_r_wd_stat___cnt___lsb 0
129#define reg_timer_r_wd_stat___cnt___width 8
130#define reg_timer_r_wd_stat___cmd___lsb 8
131#define reg_timer_r_wd_stat___cmd___width 1
132#define reg_timer_r_wd_stat___cmd___bit 8
133#define reg_timer_r_wd_stat_offset 68
134
135/* Register rw_intr_mask, scope timer, type rw */
136#define reg_timer_rw_intr_mask___tmr0___lsb 0
137#define reg_timer_rw_intr_mask___tmr0___width 1
138#define reg_timer_rw_intr_mask___tmr0___bit 0
139#define reg_timer_rw_intr_mask___tmr1___lsb 1
140#define reg_timer_rw_intr_mask___tmr1___width 1
141#define reg_timer_rw_intr_mask___tmr1___bit 1
142#define reg_timer_rw_intr_mask___cnt___lsb 2
143#define reg_timer_rw_intr_mask___cnt___width 1
144#define reg_timer_rw_intr_mask___cnt___bit 2
145#define reg_timer_rw_intr_mask___trig___lsb 3
146#define reg_timer_rw_intr_mask___trig___width 1
147#define reg_timer_rw_intr_mask___trig___bit 3
148#define reg_timer_rw_intr_mask_offset 72
149
150/* Register rw_ack_intr, scope timer, type rw */
151#define reg_timer_rw_ack_intr___tmr0___lsb 0
152#define reg_timer_rw_ack_intr___tmr0___width 1
153#define reg_timer_rw_ack_intr___tmr0___bit 0
154#define reg_timer_rw_ack_intr___tmr1___lsb 1
155#define reg_timer_rw_ack_intr___tmr1___width 1
156#define reg_timer_rw_ack_intr___tmr1___bit 1
157#define reg_timer_rw_ack_intr___cnt___lsb 2
158#define reg_timer_rw_ack_intr___cnt___width 1
159#define reg_timer_rw_ack_intr___cnt___bit 2
160#define reg_timer_rw_ack_intr___trig___lsb 3
161#define reg_timer_rw_ack_intr___trig___width 1
162#define reg_timer_rw_ack_intr___trig___bit 3
163#define reg_timer_rw_ack_intr_offset 76
164
165/* Register r_intr, scope timer, type r */
166#define reg_timer_r_intr___tmr0___lsb 0
167#define reg_timer_r_intr___tmr0___width 1
168#define reg_timer_r_intr___tmr0___bit 0
169#define reg_timer_r_intr___tmr1___lsb 1
170#define reg_timer_r_intr___tmr1___width 1
171#define reg_timer_r_intr___tmr1___bit 1
172#define reg_timer_r_intr___cnt___lsb 2
173#define reg_timer_r_intr___cnt___width 1
174#define reg_timer_r_intr___cnt___bit 2
175#define reg_timer_r_intr___trig___lsb 3
176#define reg_timer_r_intr___trig___width 1
177#define reg_timer_r_intr___trig___bit 3
178#define reg_timer_r_intr_offset 80
179
180/* Register r_masked_intr, scope timer, type r */
181#define reg_timer_r_masked_intr___tmr0___lsb 0
182#define reg_timer_r_masked_intr___tmr0___width 1
183#define reg_timer_r_masked_intr___tmr0___bit 0
184#define reg_timer_r_masked_intr___tmr1___lsb 1
185#define reg_timer_r_masked_intr___tmr1___width 1
186#define reg_timer_r_masked_intr___tmr1___bit 1
187#define reg_timer_r_masked_intr___cnt___lsb 2
188#define reg_timer_r_masked_intr___cnt___width 1
189#define reg_timer_r_masked_intr___cnt___bit 2
190#define reg_timer_r_masked_intr___trig___lsb 3
191#define reg_timer_r_masked_intr___trig___width 1
192#define reg_timer_r_masked_intr___trig___bit 3
193#define reg_timer_r_masked_intr_offset 84
194
195/* Register rw_test, scope timer, type rw */
196#define reg_timer_rw_test___dis___lsb 0
197#define reg_timer_rw_test___dis___width 1
198#define reg_timer_rw_test___dis___bit 0
199#define reg_timer_rw_test___en___lsb 1
200#define reg_timer_rw_test___en___width 1
201#define reg_timer_rw_test___en___bit 1
202#define reg_timer_rw_test_offset 88
203
204
205/* Constants */
206#define regk_timer_ext 0x00000001
207#define regk_timer_f100 0x00000007
208#define regk_timer_f29_493 0x00000004
209#define regk_timer_f32 0x00000005
210#define regk_timer_f32_768 0x00000006
211#define regk_timer_hold 0x00000001
212#define regk_timer_ld 0x00000000
213#define regk_timer_no 0x00000000
214#define regk_timer_off 0x00000000
215#define regk_timer_run 0x00000002
216#define regk_timer_rw_cnt_cfg_default 0x00000000
217#define regk_timer_rw_intr_mask_default 0x00000000
218#define regk_timer_rw_out_default 0x00000000
219#define regk_timer_rw_test_default 0x00000000
220#define regk_timer_rw_tmr0_ctrl_default 0x00000000
221#define regk_timer_rw_tmr1_ctrl_default 0x00000000
222#define regk_timer_rw_trig_cfg_default 0x00000000
223#define regk_timer_start 0x00000001
224#define regk_timer_stop 0x00000000
225#define regk_timer_time 0x00000001
226#define regk_timer_tmr0 0x00000002
227#define regk_timer_tmr1 0x00000003
228#define regk_timer_yes 0x00000001
229#endif /* __timer_defs_asm_h */
diff --git a/include/asm-cris/arch-v32/mach-fs/hwregs/bif_core_defs.h b/include/asm-cris/arch-v32/mach-fs/hwregs/bif_core_defs.h
new file mode 100644
index 000000000000..44362a62b47c
--- /dev/null
+++ b/include/asm-cris/arch-v32/mach-fs/hwregs/bif_core_defs.h
@@ -0,0 +1,284 @@
1#ifndef __bif_core_defs_h
2#define __bif_core_defs_h
3
4/*
5 * This file is autogenerated from
6 * file: ../../inst/bif/rtl/bif_core_regs.r
7 * id: bif_core_regs.r,v 1.17 2005/02/04 13:28:22 np Exp
8 * last modfied: Mon Apr 11 16:06:33 2005
9 *
10 * by /n/asic/design/tools/rdesc/src/rdes2c --outfile bif_core_defs.h ../../inst/bif/rtl/bif_core_regs.r
11 * id: $Id: bif_core_defs.h,v 1.1 2007/02/13 11:55:30 starvik Exp $
12 * Any changes here will be lost.
13 *
14 * -*- buffer-read-only: t -*-
15 */
16/* Main access macros */
17#ifndef REG_RD
18#define REG_RD( scope, inst, reg ) \
19 REG_READ( reg_##scope##_##reg, \
20 (inst) + REG_RD_ADDR_##scope##_##reg )
21#endif
22
23#ifndef REG_WR
24#define REG_WR( scope, inst, reg, val ) \
25 REG_WRITE( reg_##scope##_##reg, \
26 (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
27#endif
28
29#ifndef REG_RD_VECT
30#define REG_RD_VECT( scope, inst, reg, index ) \
31 REG_READ( reg_##scope##_##reg, \
32 (inst) + REG_RD_ADDR_##scope##_##reg + \
33 (index) * STRIDE_##scope##_##reg )
34#endif
35
36#ifndef REG_WR_VECT
37#define REG_WR_VECT( scope, inst, reg, index, val ) \
38 REG_WRITE( reg_##scope##_##reg, \
39 (inst) + REG_WR_ADDR_##scope##_##reg + \
40 (index) * STRIDE_##scope##_##reg, (val) )
41#endif
42
43#ifndef REG_RD_INT
44#define REG_RD_INT( scope, inst, reg ) \
45 REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg )
46#endif
47
48#ifndef REG_WR_INT
49#define REG_WR_INT( scope, inst, reg, val ) \
50 REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
51#endif
52
53#ifndef REG_RD_INT_VECT
54#define REG_RD_INT_VECT( scope, inst, reg, index ) \
55 REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg + \
56 (index) * STRIDE_##scope##_##reg )
57#endif
58
59#ifndef REG_WR_INT_VECT
60#define REG_WR_INT_VECT( scope, inst, reg, index, val ) \
61 REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg + \
62 (index) * STRIDE_##scope##_##reg, (val) )
63#endif
64
65#ifndef REG_TYPE_CONV
66#define REG_TYPE_CONV( type, orgtype, val ) \
67 ( { union { orgtype o; type n; } r; r.o = val; r.n; } )
68#endif
69
70#ifndef reg_page_size
71#define reg_page_size 8192
72#endif
73
74#ifndef REG_ADDR
75#define REG_ADDR( scope, inst, reg ) \
76 ( (inst) + REG_RD_ADDR_##scope##_##reg )
77#endif
78
79#ifndef REG_ADDR_VECT
80#define REG_ADDR_VECT( scope, inst, reg, index ) \
81 ( (inst) + REG_RD_ADDR_##scope##_##reg + \
82 (index) * STRIDE_##scope##_##reg )
83#endif
84
85/* C-code for register scope bif_core */
86
87/* Register rw_grp1_cfg, scope bif_core, type rw */
88typedef struct {
89 unsigned int lw : 6;
90 unsigned int ew : 3;
91 unsigned int zw : 3;
92 unsigned int aw : 2;
93 unsigned int dw : 2;
94 unsigned int ewb : 2;
95 unsigned int bw : 1;
96 unsigned int wr_extend : 1;
97 unsigned int erc_en : 1;
98 unsigned int mode : 1;
99 unsigned int dummy1 : 10;
100} reg_bif_core_rw_grp1_cfg;
101#define REG_RD_ADDR_bif_core_rw_grp1_cfg 0
102#define REG_WR_ADDR_bif_core_rw_grp1_cfg 0
103
104/* Register rw_grp2_cfg, scope bif_core, type rw */
105typedef struct {
106 unsigned int lw : 6;
107 unsigned int ew : 3;
108 unsigned int zw : 3;
109 unsigned int aw : 2;
110 unsigned int dw : 2;
111 unsigned int ewb : 2;
112 unsigned int bw : 1;
113 unsigned int wr_extend : 1;
114 unsigned int erc_en : 1;
115 unsigned int mode : 1;
116 unsigned int dummy1 : 10;
117} reg_bif_core_rw_grp2_cfg;
118#define REG_RD_ADDR_bif_core_rw_grp2_cfg 4
119#define REG_WR_ADDR_bif_core_rw_grp2_cfg 4
120
121/* Register rw_grp3_cfg, scope bif_core, type rw */
122typedef struct {
123 unsigned int lw : 6;
124 unsigned int ew : 3;
125 unsigned int zw : 3;
126 unsigned int aw : 2;
127 unsigned int dw : 2;
128 unsigned int ewb : 2;
129 unsigned int bw : 1;
130 unsigned int wr_extend : 1;
131 unsigned int erc_en : 1;
132 unsigned int mode : 1;
133 unsigned int dummy1 : 2;
134 unsigned int gated_csp0 : 2;
135 unsigned int gated_csp1 : 2;
136 unsigned int gated_csp2 : 2;
137 unsigned int gated_csp3 : 2;
138} reg_bif_core_rw_grp3_cfg;
139#define REG_RD_ADDR_bif_core_rw_grp3_cfg 8
140#define REG_WR_ADDR_bif_core_rw_grp3_cfg 8
141
142/* Register rw_grp4_cfg, scope bif_core, type rw */
143typedef struct {
144 unsigned int lw : 6;
145 unsigned int ew : 3;
146 unsigned int zw : 3;
147 unsigned int aw : 2;
148 unsigned int dw : 2;
149 unsigned int ewb : 2;
150 unsigned int bw : 1;
151 unsigned int wr_extend : 1;
152 unsigned int erc_en : 1;
153 unsigned int mode : 1;
154 unsigned int dummy1 : 4;
155 unsigned int gated_csp4 : 2;
156 unsigned int gated_csp5 : 2;
157 unsigned int gated_csp6 : 2;
158} reg_bif_core_rw_grp4_cfg;
159#define REG_RD_ADDR_bif_core_rw_grp4_cfg 12
160#define REG_WR_ADDR_bif_core_rw_grp4_cfg 12
161
162/* Register rw_sdram_cfg_grp0, scope bif_core, type rw */
163typedef struct {
164 unsigned int bank_sel : 5;
165 unsigned int ca : 3;
166 unsigned int type : 1;
167 unsigned int bw : 1;
168 unsigned int sh : 3;
169 unsigned int wmm : 1;
170 unsigned int sh16 : 1;
171 unsigned int grp_sel : 5;
172 unsigned int dummy1 : 12;
173} reg_bif_core_rw_sdram_cfg_grp0;
174#define REG_RD_ADDR_bif_core_rw_sdram_cfg_grp0 16
175#define REG_WR_ADDR_bif_core_rw_sdram_cfg_grp0 16
176
177/* Register rw_sdram_cfg_grp1, scope bif_core, type rw */
178typedef struct {
179 unsigned int bank_sel : 5;
180 unsigned int ca : 3;
181 unsigned int type : 1;
182 unsigned int bw : 1;
183 unsigned int sh : 3;
184 unsigned int wmm : 1;
185 unsigned int sh16 : 1;
186 unsigned int dummy1 : 17;
187} reg_bif_core_rw_sdram_cfg_grp1;
188#define REG_RD_ADDR_bif_core_rw_sdram_cfg_grp1 20
189#define REG_WR_ADDR_bif_core_rw_sdram_cfg_grp1 20
190
191/* Register rw_sdram_timing, scope bif_core, type rw */
192typedef struct {
193 unsigned int cl : 3;
194 unsigned int rcd : 3;
195 unsigned int rp : 3;
196 unsigned int rc : 2;
197 unsigned int dpl : 2;
198 unsigned int pde : 1;
199 unsigned int ref : 2;
200 unsigned int cpd : 1;
201 unsigned int sdcke : 1;
202 unsigned int sdclk : 1;
203 unsigned int dummy1 : 13;
204} reg_bif_core_rw_sdram_timing;
205#define REG_RD_ADDR_bif_core_rw_sdram_timing 24
206#define REG_WR_ADDR_bif_core_rw_sdram_timing 24
207
208/* Register rw_sdram_cmd, scope bif_core, type rw */
209typedef struct {
210 unsigned int cmd : 3;
211 unsigned int mrs_data : 15;
212 unsigned int dummy1 : 14;
213} reg_bif_core_rw_sdram_cmd;
214#define REG_RD_ADDR_bif_core_rw_sdram_cmd 28
215#define REG_WR_ADDR_bif_core_rw_sdram_cmd 28
216
217/* Register rs_sdram_ref_stat, scope bif_core, type rs */
218typedef struct {
219 unsigned int ok : 1;
220 unsigned int dummy1 : 31;
221} reg_bif_core_rs_sdram_ref_stat;
222#define REG_RD_ADDR_bif_core_rs_sdram_ref_stat 32
223
224/* Register r_sdram_ref_stat, scope bif_core, type r */
225typedef struct {
226 unsigned int ok : 1;
227 unsigned int dummy1 : 31;
228} reg_bif_core_r_sdram_ref_stat;
229#define REG_RD_ADDR_bif_core_r_sdram_ref_stat 36
230
231
232/* Constants */
233enum {
234 regk_bif_core_bank2 = 0x00000000,
235 regk_bif_core_bank4 = 0x00000001,
236 regk_bif_core_bit10 = 0x0000000a,
237 regk_bif_core_bit11 = 0x0000000b,
238 regk_bif_core_bit12 = 0x0000000c,
239 regk_bif_core_bit13 = 0x0000000d,
240 regk_bif_core_bit14 = 0x0000000e,
241 regk_bif_core_bit15 = 0x0000000f,
242 regk_bif_core_bit16 = 0x00000010,
243 regk_bif_core_bit17 = 0x00000011,
244 regk_bif_core_bit18 = 0x00000012,
245 regk_bif_core_bit19 = 0x00000013,
246 regk_bif_core_bit20 = 0x00000014,
247 regk_bif_core_bit21 = 0x00000015,
248 regk_bif_core_bit22 = 0x00000016,
249 regk_bif_core_bit23 = 0x00000017,
250 regk_bif_core_bit24 = 0x00000018,
251 regk_bif_core_bit25 = 0x00000019,
252 regk_bif_core_bit26 = 0x0000001a,
253 regk_bif_core_bit27 = 0x0000001b,
254 regk_bif_core_bit28 = 0x0000001c,
255 regk_bif_core_bit29 = 0x0000001d,
256 regk_bif_core_bit9 = 0x00000009,
257 regk_bif_core_bw16 = 0x00000001,
258 regk_bif_core_bw32 = 0x00000000,
259 regk_bif_core_bwe = 0x00000000,
260 regk_bif_core_cwe = 0x00000001,
261 regk_bif_core_e15us = 0x00000001,
262 regk_bif_core_e7800ns = 0x00000002,
263 regk_bif_core_grp0 = 0x00000000,
264 regk_bif_core_grp1 = 0x00000001,
265 regk_bif_core_mrs = 0x00000003,
266 regk_bif_core_no = 0x00000000,
267 regk_bif_core_none = 0x00000000,
268 regk_bif_core_nop = 0x00000000,
269 regk_bif_core_off = 0x00000000,
270 regk_bif_core_pre = 0x00000002,
271 regk_bif_core_r_sdram_ref_stat_default = 0x00000001,
272 regk_bif_core_rd = 0x00000002,
273 regk_bif_core_ref = 0x00000001,
274 regk_bif_core_rs_sdram_ref_stat_default = 0x00000001,
275 regk_bif_core_rw_grp1_cfg_default = 0x000006cf,
276 regk_bif_core_rw_grp2_cfg_default = 0x000006cf,
277 regk_bif_core_rw_grp3_cfg_default = 0x000006cf,
278 regk_bif_core_rw_grp4_cfg_default = 0x000006cf,
279 regk_bif_core_rw_sdram_cfg_grp1_default = 0x00000000,
280 regk_bif_core_slf = 0x00000004,
281 regk_bif_core_wr = 0x00000001,
282 regk_bif_core_yes = 0x00000001
283};
284#endif /* __bif_core_defs_h */
diff --git a/include/asm-cris/arch-v32/mach-fs/hwregs/bif_dma_defs.h b/include/asm-cris/arch-v32/mach-fs/hwregs/bif_dma_defs.h
new file mode 100644
index 000000000000..3cb51a09dba7
--- /dev/null
+++ b/include/asm-cris/arch-v32/mach-fs/hwregs/bif_dma_defs.h
@@ -0,0 +1,473 @@
1#ifndef __bif_dma_defs_h
2#define __bif_dma_defs_h
3
4/*
5 * This file is autogenerated from
6 * file: ../../inst/bif/rtl/bif_dma_regs.r
7 * id: bif_dma_regs.r,v 1.6 2005/02/04 13:28:31 perz Exp
8 * last modfied: Mon Apr 11 16:06:33 2005
9 *
10 * by /n/asic/design/tools/rdesc/src/rdes2c --outfile bif_dma_defs.h ../../inst/bif/rtl/bif_dma_regs.r
11 * id: $Id: bif_dma_defs.h,v 1.1 2007/02/13 11:55:30 starvik Exp $
12 * Any changes here will be lost.
13 *
14 * -*- buffer-read-only: t -*-
15 */
16/* Main access macros */
17#ifndef REG_RD
18#define REG_RD( scope, inst, reg ) \
19 REG_READ( reg_##scope##_##reg, \
20 (inst) + REG_RD_ADDR_##scope##_##reg )
21#endif
22
23#ifndef REG_WR
24#define REG_WR( scope, inst, reg, val ) \
25 REG_WRITE( reg_##scope##_##reg, \
26 (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
27#endif
28
29#ifndef REG_RD_VECT
30#define REG_RD_VECT( scope, inst, reg, index ) \
31 REG_READ( reg_##scope##_##reg, \
32 (inst) + REG_RD_ADDR_##scope##_##reg + \
33 (index) * STRIDE_##scope##_##reg )
34#endif
35
36#ifndef REG_WR_VECT
37#define REG_WR_VECT( scope, inst, reg, index, val ) \
38 REG_WRITE( reg_##scope##_##reg, \
39 (inst) + REG_WR_ADDR_##scope##_##reg + \
40 (index) * STRIDE_##scope##_##reg, (val) )
41#endif
42
43#ifndef REG_RD_INT
44#define REG_RD_INT( scope, inst, reg ) \
45 REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg )
46#endif
47
48#ifndef REG_WR_INT
49#define REG_WR_INT( scope, inst, reg, val ) \
50 REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
51#endif
52
53#ifndef REG_RD_INT_VECT
54#define REG_RD_INT_VECT( scope, inst, reg, index ) \
55 REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg + \
56 (index) * STRIDE_##scope##_##reg )
57#endif
58
59#ifndef REG_WR_INT_VECT
60#define REG_WR_INT_VECT( scope, inst, reg, index, val ) \
61 REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg + \
62 (index) * STRIDE_##scope##_##reg, (val) )
63#endif
64
65#ifndef REG_TYPE_CONV
66#define REG_TYPE_CONV( type, orgtype, val ) \
67 ( { union { orgtype o; type n; } r; r.o = val; r.n; } )
68#endif
69
70#ifndef reg_page_size
71#define reg_page_size 8192
72#endif
73
74#ifndef REG_ADDR
75#define REG_ADDR( scope, inst, reg ) \
76 ( (inst) + REG_RD_ADDR_##scope##_##reg )
77#endif
78
79#ifndef REG_ADDR_VECT
80#define REG_ADDR_VECT( scope, inst, reg, index ) \
81 ( (inst) + REG_RD_ADDR_##scope##_##reg + \
82 (index) * STRIDE_##scope##_##reg )
83#endif
84
85/* C-code for register scope bif_dma */
86
87/* Register rw_ch0_ctrl, scope bif_dma, type rw */
88typedef struct {
89 unsigned int bw : 2;
90 unsigned int burst_len : 1;
91 unsigned int cont : 1;
92 unsigned int end_pad : 1;
93 unsigned int cnt : 1;
94 unsigned int dreq_pin : 3;
95 unsigned int dreq_mode : 2;
96 unsigned int tc_in_pin : 3;
97 unsigned int tc_in_mode : 2;
98 unsigned int bus_mode : 2;
99 unsigned int rate_en : 1;
100 unsigned int wr_all : 1;
101 unsigned int dummy1 : 12;
102} reg_bif_dma_rw_ch0_ctrl;
103#define REG_RD_ADDR_bif_dma_rw_ch0_ctrl 0
104#define REG_WR_ADDR_bif_dma_rw_ch0_ctrl 0
105
106/* Register rw_ch0_addr, scope bif_dma, type rw */
107typedef struct {
108 unsigned int addr : 32;
109} reg_bif_dma_rw_ch0_addr;
110#define REG_RD_ADDR_bif_dma_rw_ch0_addr 4
111#define REG_WR_ADDR_bif_dma_rw_ch0_addr 4
112
113/* Register rw_ch0_start, scope bif_dma, type rw */
114typedef struct {
115 unsigned int run : 1;
116 unsigned int dummy1 : 31;
117} reg_bif_dma_rw_ch0_start;
118#define REG_RD_ADDR_bif_dma_rw_ch0_start 8
119#define REG_WR_ADDR_bif_dma_rw_ch0_start 8
120
121/* Register rw_ch0_cnt, scope bif_dma, type rw */
122typedef struct {
123 unsigned int start_cnt : 16;
124 unsigned int dummy1 : 16;
125} reg_bif_dma_rw_ch0_cnt;
126#define REG_RD_ADDR_bif_dma_rw_ch0_cnt 12
127#define REG_WR_ADDR_bif_dma_rw_ch0_cnt 12
128
129/* Register r_ch0_stat, scope bif_dma, type r */
130typedef struct {
131 unsigned int cnt : 16;
132 unsigned int dummy1 : 15;
133 unsigned int run : 1;
134} reg_bif_dma_r_ch0_stat;
135#define REG_RD_ADDR_bif_dma_r_ch0_stat 16
136
137/* Register rw_ch1_ctrl, scope bif_dma, type rw */
138typedef struct {
139 unsigned int bw : 2;
140 unsigned int burst_len : 1;
141 unsigned int cont : 1;
142 unsigned int end_discard : 1;
143 unsigned int cnt : 1;
144 unsigned int dreq_pin : 3;
145 unsigned int dreq_mode : 2;
146 unsigned int tc_in_pin : 3;
147 unsigned int tc_in_mode : 2;
148 unsigned int bus_mode : 2;
149 unsigned int rate_en : 1;
150 unsigned int dummy1 : 13;
151} reg_bif_dma_rw_ch1_ctrl;
152#define REG_RD_ADDR_bif_dma_rw_ch1_ctrl 32
153#define REG_WR_ADDR_bif_dma_rw_ch1_ctrl 32
154
155/* Register rw_ch1_addr, scope bif_dma, type rw */
156typedef struct {
157 unsigned int addr : 32;
158} reg_bif_dma_rw_ch1_addr;
159#define REG_RD_ADDR_bif_dma_rw_ch1_addr 36
160#define REG_WR_ADDR_bif_dma_rw_ch1_addr 36
161
162/* Register rw_ch1_start, scope bif_dma, type rw */
163typedef struct {
164 unsigned int run : 1;
165 unsigned int dummy1 : 31;
166} reg_bif_dma_rw_ch1_start;
167#define REG_RD_ADDR_bif_dma_rw_ch1_start 40
168#define REG_WR_ADDR_bif_dma_rw_ch1_start 40
169
170/* Register rw_ch1_cnt, scope bif_dma, type rw */
171typedef struct {
172 unsigned int start_cnt : 16;
173 unsigned int dummy1 : 16;
174} reg_bif_dma_rw_ch1_cnt;
175#define REG_RD_ADDR_bif_dma_rw_ch1_cnt 44
176#define REG_WR_ADDR_bif_dma_rw_ch1_cnt 44
177
178/* Register r_ch1_stat, scope bif_dma, type r */
179typedef struct {
180 unsigned int cnt : 16;
181 unsigned int dummy1 : 15;
182 unsigned int run : 1;
183} reg_bif_dma_r_ch1_stat;
184#define REG_RD_ADDR_bif_dma_r_ch1_stat 48
185
186/* Register rw_ch2_ctrl, scope bif_dma, type rw */
187typedef struct {
188 unsigned int bw : 2;
189 unsigned int burst_len : 1;
190 unsigned int cont : 1;
191 unsigned int end_pad : 1;
192 unsigned int cnt : 1;
193 unsigned int dreq_pin : 3;
194 unsigned int dreq_mode : 2;
195 unsigned int tc_in_pin : 3;
196 unsigned int tc_in_mode : 2;
197 unsigned int bus_mode : 2;
198 unsigned int rate_en : 1;
199 unsigned int wr_all : 1;
200 unsigned int dummy1 : 12;
201} reg_bif_dma_rw_ch2_ctrl;
202#define REG_RD_ADDR_bif_dma_rw_ch2_ctrl 64
203#define REG_WR_ADDR_bif_dma_rw_ch2_ctrl 64
204
205/* Register rw_ch2_addr, scope bif_dma, type rw */
206typedef struct {
207 unsigned int addr : 32;
208} reg_bif_dma_rw_ch2_addr;
209#define REG_RD_ADDR_bif_dma_rw_ch2_addr 68
210#define REG_WR_ADDR_bif_dma_rw_ch2_addr 68
211
212/* Register rw_ch2_start, scope bif_dma, type rw */
213typedef struct {
214 unsigned int run : 1;
215 unsigned int dummy1 : 31;
216} reg_bif_dma_rw_ch2_start;
217#define REG_RD_ADDR_bif_dma_rw_ch2_start 72
218#define REG_WR_ADDR_bif_dma_rw_ch2_start 72
219
220/* Register rw_ch2_cnt, scope bif_dma, type rw */
221typedef struct {
222 unsigned int start_cnt : 16;
223 unsigned int dummy1 : 16;
224} reg_bif_dma_rw_ch2_cnt;
225#define REG_RD_ADDR_bif_dma_rw_ch2_cnt 76
226#define REG_WR_ADDR_bif_dma_rw_ch2_cnt 76
227
228/* Register r_ch2_stat, scope bif_dma, type r */
229typedef struct {
230 unsigned int cnt : 16;
231 unsigned int dummy1 : 15;
232 unsigned int run : 1;
233} reg_bif_dma_r_ch2_stat;
234#define REG_RD_ADDR_bif_dma_r_ch2_stat 80
235
236/* Register rw_ch3_ctrl, scope bif_dma, type rw */
237typedef struct {
238 unsigned int bw : 2;
239 unsigned int burst_len : 1;
240 unsigned int cont : 1;
241 unsigned int end_discard : 1;
242 unsigned int cnt : 1;
243 unsigned int dreq_pin : 3;
244 unsigned int dreq_mode : 2;
245 unsigned int tc_in_pin : 3;
246 unsigned int tc_in_mode : 2;
247 unsigned int bus_mode : 2;
248 unsigned int rate_en : 1;
249 unsigned int dummy1 : 13;
250} reg_bif_dma_rw_ch3_ctrl;
251#define REG_RD_ADDR_bif_dma_rw_ch3_ctrl 96
252#define REG_WR_ADDR_bif_dma_rw_ch3_ctrl 96
253
254/* Register rw_ch3_addr, scope bif_dma, type rw */
255typedef struct {
256 unsigned int addr : 32;
257} reg_bif_dma_rw_ch3_addr;
258#define REG_RD_ADDR_bif_dma_rw_ch3_addr 100
259#define REG_WR_ADDR_bif_dma_rw_ch3_addr 100
260
261/* Register rw_ch3_start, scope bif_dma, type rw */
262typedef struct {
263 unsigned int run : 1;
264 unsigned int dummy1 : 31;
265} reg_bif_dma_rw_ch3_start;
266#define REG_RD_ADDR_bif_dma_rw_ch3_start 104
267#define REG_WR_ADDR_bif_dma_rw_ch3_start 104
268
269/* Register rw_ch3_cnt, scope bif_dma, type rw */
270typedef struct {
271 unsigned int start_cnt : 16;
272 unsigned int dummy1 : 16;
273} reg_bif_dma_rw_ch3_cnt;
274#define REG_RD_ADDR_bif_dma_rw_ch3_cnt 108
275#define REG_WR_ADDR_bif_dma_rw_ch3_cnt 108
276
277/* Register r_ch3_stat, scope bif_dma, type r */
278typedef struct {
279 unsigned int cnt : 16;
280 unsigned int dummy1 : 15;
281 unsigned int run : 1;
282} reg_bif_dma_r_ch3_stat;
283#define REG_RD_ADDR_bif_dma_r_ch3_stat 112
284
285/* Register rw_intr_mask, scope bif_dma, type rw */
286typedef struct {
287 unsigned int ext_dma0 : 1;
288 unsigned int ext_dma1 : 1;
289 unsigned int ext_dma2 : 1;
290 unsigned int ext_dma3 : 1;
291 unsigned int dummy1 : 28;
292} reg_bif_dma_rw_intr_mask;
293#define REG_RD_ADDR_bif_dma_rw_intr_mask 128
294#define REG_WR_ADDR_bif_dma_rw_intr_mask 128
295
296/* Register rw_ack_intr, scope bif_dma, type rw */
297typedef struct {
298 unsigned int ext_dma0 : 1;
299 unsigned int ext_dma1 : 1;
300 unsigned int ext_dma2 : 1;
301 unsigned int ext_dma3 : 1;
302 unsigned int dummy1 : 28;
303} reg_bif_dma_rw_ack_intr;
304#define REG_RD_ADDR_bif_dma_rw_ack_intr 132
305#define REG_WR_ADDR_bif_dma_rw_ack_intr 132
306
307/* Register r_intr, scope bif_dma, type r */
308typedef struct {
309 unsigned int ext_dma0 : 1;
310 unsigned int ext_dma1 : 1;
311 unsigned int ext_dma2 : 1;
312 unsigned int ext_dma3 : 1;
313 unsigned int dummy1 : 28;
314} reg_bif_dma_r_intr;
315#define REG_RD_ADDR_bif_dma_r_intr 136
316
317/* Register r_masked_intr, scope bif_dma, type r */
318typedef struct {
319 unsigned int ext_dma0 : 1;
320 unsigned int ext_dma1 : 1;
321 unsigned int ext_dma2 : 1;
322 unsigned int ext_dma3 : 1;
323 unsigned int dummy1 : 28;
324} reg_bif_dma_r_masked_intr;
325#define REG_RD_ADDR_bif_dma_r_masked_intr 140
326
327/* Register rw_pin0_cfg, scope bif_dma, type rw */
328typedef struct {
329 unsigned int master_ch : 2;
330 unsigned int master_mode : 3;
331 unsigned int slave_ch : 2;
332 unsigned int slave_mode : 3;
333 unsigned int dummy1 : 22;
334} reg_bif_dma_rw_pin0_cfg;
335#define REG_RD_ADDR_bif_dma_rw_pin0_cfg 160
336#define REG_WR_ADDR_bif_dma_rw_pin0_cfg 160
337
338/* Register rw_pin1_cfg, scope bif_dma, type rw */
339typedef struct {
340 unsigned int master_ch : 2;
341 unsigned int master_mode : 3;
342 unsigned int slave_ch : 2;
343 unsigned int slave_mode : 3;
344 unsigned int dummy1 : 22;
345} reg_bif_dma_rw_pin1_cfg;
346#define REG_RD_ADDR_bif_dma_rw_pin1_cfg 164
347#define REG_WR_ADDR_bif_dma_rw_pin1_cfg 164
348
349/* Register rw_pin2_cfg, scope bif_dma, type rw */
350typedef struct {
351 unsigned int master_ch : 2;
352 unsigned int master_mode : 3;
353 unsigned int slave_ch : 2;
354 unsigned int slave_mode : 3;
355 unsigned int dummy1 : 22;
356} reg_bif_dma_rw_pin2_cfg;
357#define REG_RD_ADDR_bif_dma_rw_pin2_cfg 168
358#define REG_WR_ADDR_bif_dma_rw_pin2_cfg 168
359
360/* Register rw_pin3_cfg, scope bif_dma, type rw */
361typedef struct {
362 unsigned int master_ch : 2;
363 unsigned int master_mode : 3;
364 unsigned int slave_ch : 2;
365 unsigned int slave_mode : 3;
366 unsigned int dummy1 : 22;
367} reg_bif_dma_rw_pin3_cfg;
368#define REG_RD_ADDR_bif_dma_rw_pin3_cfg 172
369#define REG_WR_ADDR_bif_dma_rw_pin3_cfg 172
370
371/* Register rw_pin4_cfg, scope bif_dma, type rw */
372typedef struct {
373 unsigned int master_ch : 2;
374 unsigned int master_mode : 3;
375 unsigned int slave_ch : 2;
376 unsigned int slave_mode : 3;
377 unsigned int dummy1 : 22;
378} reg_bif_dma_rw_pin4_cfg;
379#define REG_RD_ADDR_bif_dma_rw_pin4_cfg 176
380#define REG_WR_ADDR_bif_dma_rw_pin4_cfg 176
381
382/* Register rw_pin5_cfg, scope bif_dma, type rw */
383typedef struct {
384 unsigned int master_ch : 2;
385 unsigned int master_mode : 3;
386 unsigned int slave_ch : 2;
387 unsigned int slave_mode : 3;
388 unsigned int dummy1 : 22;
389} reg_bif_dma_rw_pin5_cfg;
390#define REG_RD_ADDR_bif_dma_rw_pin5_cfg 180
391#define REG_WR_ADDR_bif_dma_rw_pin5_cfg 180
392
393/* Register rw_pin6_cfg, scope bif_dma, type rw */
394typedef struct {
395 unsigned int master_ch : 2;
396 unsigned int master_mode : 3;
397 unsigned int slave_ch : 2;
398 unsigned int slave_mode : 3;
399 unsigned int dummy1 : 22;
400} reg_bif_dma_rw_pin6_cfg;
401#define REG_RD_ADDR_bif_dma_rw_pin6_cfg 184
402#define REG_WR_ADDR_bif_dma_rw_pin6_cfg 184
403
404/* Register rw_pin7_cfg, scope bif_dma, type rw */
405typedef struct {
406 unsigned int master_ch : 2;
407 unsigned int master_mode : 3;
408 unsigned int slave_ch : 2;
409 unsigned int slave_mode : 3;
410 unsigned int dummy1 : 22;
411} reg_bif_dma_rw_pin7_cfg;
412#define REG_RD_ADDR_bif_dma_rw_pin7_cfg 188
413#define REG_WR_ADDR_bif_dma_rw_pin7_cfg 188
414
415/* Register r_pin_stat, scope bif_dma, type r */
416typedef struct {
417 unsigned int pin0 : 1;
418 unsigned int pin1 : 1;
419 unsigned int pin2 : 1;
420 unsigned int pin3 : 1;
421 unsigned int pin4 : 1;
422 unsigned int pin5 : 1;
423 unsigned int pin6 : 1;
424 unsigned int pin7 : 1;
425 unsigned int dummy1 : 24;
426} reg_bif_dma_r_pin_stat;
427#define REG_RD_ADDR_bif_dma_r_pin_stat 192
428
429
430/* Constants */
431enum {
432 regk_bif_dma_as_master = 0x00000001,
433 regk_bif_dma_as_slave = 0x00000001,
434 regk_bif_dma_burst1 = 0x00000000,
435 regk_bif_dma_burst8 = 0x00000001,
436 regk_bif_dma_bw16 = 0x00000001,
437 regk_bif_dma_bw32 = 0x00000002,
438 regk_bif_dma_bw8 = 0x00000000,
439 regk_bif_dma_dack = 0x00000006,
440 regk_bif_dma_dack_inv = 0x00000007,
441 regk_bif_dma_force = 0x00000001,
442 regk_bif_dma_hi = 0x00000003,
443 regk_bif_dma_inv = 0x00000003,
444 regk_bif_dma_lo = 0x00000002,
445 regk_bif_dma_master = 0x00000001,
446 regk_bif_dma_no = 0x00000000,
447 regk_bif_dma_norm = 0x00000002,
448 regk_bif_dma_off = 0x00000000,
449 regk_bif_dma_rw_ch0_ctrl_default = 0x00000000,
450 regk_bif_dma_rw_ch0_start_default = 0x00000000,
451 regk_bif_dma_rw_ch1_ctrl_default = 0x00000000,
452 regk_bif_dma_rw_ch1_start_default = 0x00000000,
453 regk_bif_dma_rw_ch2_ctrl_default = 0x00000000,
454 regk_bif_dma_rw_ch2_start_default = 0x00000000,
455 regk_bif_dma_rw_ch3_ctrl_default = 0x00000000,
456 regk_bif_dma_rw_ch3_start_default = 0x00000000,
457 regk_bif_dma_rw_intr_mask_default = 0x00000000,
458 regk_bif_dma_rw_pin0_cfg_default = 0x00000000,
459 regk_bif_dma_rw_pin1_cfg_default = 0x00000000,
460 regk_bif_dma_rw_pin2_cfg_default = 0x00000000,
461 regk_bif_dma_rw_pin3_cfg_default = 0x00000000,
462 regk_bif_dma_rw_pin4_cfg_default = 0x00000000,
463 regk_bif_dma_rw_pin5_cfg_default = 0x00000000,
464 regk_bif_dma_rw_pin6_cfg_default = 0x00000000,
465 regk_bif_dma_rw_pin7_cfg_default = 0x00000000,
466 regk_bif_dma_slave = 0x00000002,
467 regk_bif_dma_sreq = 0x00000006,
468 regk_bif_dma_sreq_inv = 0x00000007,
469 regk_bif_dma_tc = 0x00000004,
470 regk_bif_dma_tc_inv = 0x00000005,
471 regk_bif_dma_yes = 0x00000001
472};
473#endif /* __bif_dma_defs_h */
diff --git a/include/asm-cris/arch-v32/mach-fs/hwregs/bif_slave_defs.h b/include/asm-cris/arch-v32/mach-fs/hwregs/bif_slave_defs.h
new file mode 100644
index 000000000000..0c434585a3f9
--- /dev/null
+++ b/include/asm-cris/arch-v32/mach-fs/hwregs/bif_slave_defs.h
@@ -0,0 +1,249 @@
1#ifndef __bif_slave_defs_h
2#define __bif_slave_defs_h
3
4/*
5 * This file is autogenerated from
6 * file: ../../inst/bif/rtl/bif_slave_regs.r
7 * id: bif_slave_regs.r,v 1.5 2005/02/04 13:55:28 perz Exp
8 * last modfied: Mon Apr 11 16:06:34 2005
9 *
10 * by /n/asic/design/tools/rdesc/src/rdes2c --outfile bif_slave_defs.h ../../inst/bif/rtl/bif_slave_regs.r
11 * id: $Id: bif_slave_defs.h,v 1.1 2007/02/13 11:55:30 starvik Exp $
12 * Any changes here will be lost.
13 *
14 * -*- buffer-read-only: t -*-
15 */
16/* Main access macros */
17#ifndef REG_RD
18#define REG_RD( scope, inst, reg ) \
19 REG_READ( reg_##scope##_##reg, \
20 (inst) + REG_RD_ADDR_##scope##_##reg )
21#endif
22
23#ifndef REG_WR
24#define REG_WR( scope, inst, reg, val ) \
25 REG_WRITE( reg_##scope##_##reg, \
26 (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
27#endif
28
29#ifndef REG_RD_VECT
30#define REG_RD_VECT( scope, inst, reg, index ) \
31 REG_READ( reg_##scope##_##reg, \
32 (inst) + REG_RD_ADDR_##scope##_##reg + \
33 (index) * STRIDE_##scope##_##reg )
34#endif
35
36#ifndef REG_WR_VECT
37#define REG_WR_VECT( scope, inst, reg, index, val ) \
38 REG_WRITE( reg_##scope##_##reg, \
39 (inst) + REG_WR_ADDR_##scope##_##reg + \
40 (index) * STRIDE_##scope##_##reg, (val) )
41#endif
42
43#ifndef REG_RD_INT
44#define REG_RD_INT( scope, inst, reg ) \
45 REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg )
46#endif
47
48#ifndef REG_WR_INT
49#define REG_WR_INT( scope, inst, reg, val ) \
50 REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
51#endif
52
53#ifndef REG_RD_INT_VECT
54#define REG_RD_INT_VECT( scope, inst, reg, index ) \
55 REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg + \
56 (index) * STRIDE_##scope##_##reg )
57#endif
58
59#ifndef REG_WR_INT_VECT
60#define REG_WR_INT_VECT( scope, inst, reg, index, val ) \
61 REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg + \
62 (index) * STRIDE_##scope##_##reg, (val) )
63#endif
64
65#ifndef REG_TYPE_CONV
66#define REG_TYPE_CONV( type, orgtype, val ) \
67 ( { union { orgtype o; type n; } r; r.o = val; r.n; } )
68#endif
69
70#ifndef reg_page_size
71#define reg_page_size 8192
72#endif
73
74#ifndef REG_ADDR
75#define REG_ADDR( scope, inst, reg ) \
76 ( (inst) + REG_RD_ADDR_##scope##_##reg )
77#endif
78
79#ifndef REG_ADDR_VECT
80#define REG_ADDR_VECT( scope, inst, reg, index ) \
81 ( (inst) + REG_RD_ADDR_##scope##_##reg + \
82 (index) * STRIDE_##scope##_##reg )
83#endif
84
85/* C-code for register scope bif_slave */
86
87/* Register rw_slave_cfg, scope bif_slave, type rw */
88typedef struct {
89 unsigned int slave_id : 3;
90 unsigned int use_slave_id : 1;
91 unsigned int boot_rdy : 1;
92 unsigned int loopback : 1;
93 unsigned int dis : 1;
94 unsigned int dummy1 : 25;
95} reg_bif_slave_rw_slave_cfg;
96#define REG_RD_ADDR_bif_slave_rw_slave_cfg 0
97#define REG_WR_ADDR_bif_slave_rw_slave_cfg 0
98
99/* Register r_slave_mode, scope bif_slave, type r */
100typedef struct {
101 unsigned int ch0_mode : 1;
102 unsigned int ch1_mode : 1;
103 unsigned int ch2_mode : 1;
104 unsigned int ch3_mode : 1;
105 unsigned int dummy1 : 28;
106} reg_bif_slave_r_slave_mode;
107#define REG_RD_ADDR_bif_slave_r_slave_mode 4
108
109/* Register rw_ch0_cfg, scope bif_slave, type rw */
110typedef struct {
111 unsigned int rd_hold : 2;
112 unsigned int access_mode : 1;
113 unsigned int access_ctrl : 1;
114 unsigned int data_cs : 2;
115 unsigned int dummy1 : 26;
116} reg_bif_slave_rw_ch0_cfg;
117#define REG_RD_ADDR_bif_slave_rw_ch0_cfg 16
118#define REG_WR_ADDR_bif_slave_rw_ch0_cfg 16
119
120/* Register rw_ch1_cfg, scope bif_slave, type rw */
121typedef struct {
122 unsigned int rd_hold : 2;
123 unsigned int access_mode : 1;
124 unsigned int access_ctrl : 1;
125 unsigned int data_cs : 2;
126 unsigned int dummy1 : 26;
127} reg_bif_slave_rw_ch1_cfg;
128#define REG_RD_ADDR_bif_slave_rw_ch1_cfg 20
129#define REG_WR_ADDR_bif_slave_rw_ch1_cfg 20
130
131/* Register rw_ch2_cfg, scope bif_slave, type rw */
132typedef struct {
133 unsigned int rd_hold : 2;
134 unsigned int access_mode : 1;
135 unsigned int access_ctrl : 1;
136 unsigned int data_cs : 2;
137 unsigned int dummy1 : 26;
138} reg_bif_slave_rw_ch2_cfg;
139#define REG_RD_ADDR_bif_slave_rw_ch2_cfg 24
140#define REG_WR_ADDR_bif_slave_rw_ch2_cfg 24
141
142/* Register rw_ch3_cfg, scope bif_slave, type rw */
143typedef struct {
144 unsigned int rd_hold : 2;
145 unsigned int access_mode : 1;
146 unsigned int access_ctrl : 1;
147 unsigned int data_cs : 2;
148 unsigned int dummy1 : 26;
149} reg_bif_slave_rw_ch3_cfg;
150#define REG_RD_ADDR_bif_slave_rw_ch3_cfg 28
151#define REG_WR_ADDR_bif_slave_rw_ch3_cfg 28
152
153/* Register rw_arb_cfg, scope bif_slave, type rw */
154typedef struct {
155 unsigned int brin_mode : 1;
156 unsigned int brout_mode : 3;
157 unsigned int bg_mode : 3;
158 unsigned int release : 2;
159 unsigned int acquire : 1;
160 unsigned int settle_time : 2;
161 unsigned int dram_ctrl : 1;
162 unsigned int dummy1 : 19;
163} reg_bif_slave_rw_arb_cfg;
164#define REG_RD_ADDR_bif_slave_rw_arb_cfg 32
165#define REG_WR_ADDR_bif_slave_rw_arb_cfg 32
166
167/* Register r_arb_stat, scope bif_slave, type r */
168typedef struct {
169 unsigned int init_mode : 1;
170 unsigned int mode : 1;
171 unsigned int brin : 1;
172 unsigned int brout : 1;
173 unsigned int bg : 1;
174 unsigned int dummy1 : 27;
175} reg_bif_slave_r_arb_stat;
176#define REG_RD_ADDR_bif_slave_r_arb_stat 36
177
178/* Register rw_intr_mask, scope bif_slave, type rw */
179typedef struct {
180 unsigned int bus_release : 1;
181 unsigned int bus_acquire : 1;
182 unsigned int dummy1 : 30;
183} reg_bif_slave_rw_intr_mask;
184#define REG_RD_ADDR_bif_slave_rw_intr_mask 64
185#define REG_WR_ADDR_bif_slave_rw_intr_mask 64
186
187/* Register rw_ack_intr, scope bif_slave, type rw */
188typedef struct {
189 unsigned int bus_release : 1;
190 unsigned int bus_acquire : 1;
191 unsigned int dummy1 : 30;
192} reg_bif_slave_rw_ack_intr;
193#define REG_RD_ADDR_bif_slave_rw_ack_intr 68
194#define REG_WR_ADDR_bif_slave_rw_ack_intr 68
195
196/* Register r_intr, scope bif_slave, type r */
197typedef struct {
198 unsigned int bus_release : 1;
199 unsigned int bus_acquire : 1;
200 unsigned int dummy1 : 30;
201} reg_bif_slave_r_intr;
202#define REG_RD_ADDR_bif_slave_r_intr 72
203
204/* Register r_masked_intr, scope bif_slave, type r */
205typedef struct {
206 unsigned int bus_release : 1;
207 unsigned int bus_acquire : 1;
208 unsigned int dummy1 : 30;
209} reg_bif_slave_r_masked_intr;
210#define REG_RD_ADDR_bif_slave_r_masked_intr 76
211
212
213/* Constants */
214enum {
215 regk_bif_slave_active_hi = 0x00000003,
216 regk_bif_slave_active_lo = 0x00000002,
217 regk_bif_slave_addr = 0x00000000,
218 regk_bif_slave_always = 0x00000001,
219 regk_bif_slave_at_idle = 0x00000002,
220 regk_bif_slave_burst_end = 0x00000003,
221 regk_bif_slave_dma = 0x00000001,
222 regk_bif_slave_hi = 0x00000003,
223 regk_bif_slave_inv = 0x00000001,
224 regk_bif_slave_lo = 0x00000002,
225 regk_bif_slave_local = 0x00000001,
226 regk_bif_slave_master = 0x00000000,
227 regk_bif_slave_mode_reg = 0x00000001,
228 regk_bif_slave_no = 0x00000000,
229 regk_bif_slave_norm = 0x00000000,
230 regk_bif_slave_on_access = 0x00000000,
231 regk_bif_slave_rw_arb_cfg_default = 0x00000000,
232 regk_bif_slave_rw_ch0_cfg_default = 0x00000000,
233 regk_bif_slave_rw_ch1_cfg_default = 0x00000000,
234 regk_bif_slave_rw_ch2_cfg_default = 0x00000000,
235 regk_bif_slave_rw_ch3_cfg_default = 0x00000000,
236 regk_bif_slave_rw_intr_mask_default = 0x00000000,
237 regk_bif_slave_rw_slave_cfg_default = 0x00000000,
238 regk_bif_slave_shared = 0x00000000,
239 regk_bif_slave_slave = 0x00000001,
240 regk_bif_slave_t0ns = 0x00000003,
241 regk_bif_slave_t10ns = 0x00000002,
242 regk_bif_slave_t20ns = 0x00000003,
243 regk_bif_slave_t30ns = 0x00000002,
244 regk_bif_slave_t40ns = 0x00000001,
245 regk_bif_slave_t50ns = 0x00000000,
246 regk_bif_slave_yes = 0x00000001,
247 regk_bif_slave_z = 0x00000004
248};
249#endif /* __bif_slave_defs_h */
diff --git a/include/asm-cris/arch-v32/mach-fs/hwregs/config_defs.h b/include/asm-cris/arch-v32/mach-fs/hwregs/config_defs.h
new file mode 100644
index 000000000000..abc5f20705f7
--- /dev/null
+++ b/include/asm-cris/arch-v32/mach-fs/hwregs/config_defs.h
@@ -0,0 +1,142 @@
1#ifndef __config_defs_h
2#define __config_defs_h
3
4/*
5 * This file is autogenerated from
6 * file: ../../rtl/config_regs.r
7 * id: config_regs.r,v 1.23 2004/03/04 11:34:42 mikaeln Exp
8 * last modfied: Thu Mar 4 12:34:39 2004
9 *
10 * by /n/asic/design/tools/rdesc/src/rdes2c --outfile config_defs.h ../../rtl/config_regs.r
11 * id: $Id: config_defs.h,v 1.1 2007/02/13 11:55:30 starvik Exp $
12 * Any changes here will be lost.
13 *
14 * -*- buffer-read-only: t -*-
15 */
16/* Main access macros */
17#ifndef REG_RD
18#define REG_RD( scope, inst, reg ) \
19 REG_READ( reg_##scope##_##reg, \
20 (inst) + REG_RD_ADDR_##scope##_##reg )
21#endif
22
23#ifndef REG_WR
24#define REG_WR( scope, inst, reg, val ) \
25 REG_WRITE( reg_##scope##_##reg, \
26 (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
27#endif
28
29#ifndef REG_RD_VECT
30#define REG_RD_VECT( scope, inst, reg, index ) \
31 REG_READ( reg_##scope##_##reg, \
32 (inst) + REG_RD_ADDR_##scope##_##reg + \
33 (index) * STRIDE_##scope##_##reg )
34#endif
35
36#ifndef REG_WR_VECT
37#define REG_WR_VECT( scope, inst, reg, index, val ) \
38 REG_WRITE( reg_##scope##_##reg, \
39 (inst) + REG_WR_ADDR_##scope##_##reg + \
40 (index) * STRIDE_##scope##_##reg, (val) )
41#endif
42
43#ifndef REG_RD_INT
44#define REG_RD_INT( scope, inst, reg ) \
45 REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg )
46#endif
47
48#ifndef REG_WR_INT
49#define REG_WR_INT( scope, inst, reg, val ) \
50 REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
51#endif
52
53#ifndef REG_RD_INT_VECT
54#define REG_RD_INT_VECT( scope, inst, reg, index ) \
55 REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg + \
56 (index) * STRIDE_##scope##_##reg )
57#endif
58
59#ifndef REG_WR_INT_VECT
60#define REG_WR_INT_VECT( scope, inst, reg, index, val ) \
61 REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg + \
62 (index) * STRIDE_##scope##_##reg, (val) )
63#endif
64
65#ifndef REG_TYPE_CONV
66#define REG_TYPE_CONV( type, orgtype, val ) \
67 ( { union { orgtype o; type n; } r; r.o = val; r.n; } )
68#endif
69
70#ifndef reg_page_size
71#define reg_page_size 8192
72#endif
73
74#ifndef REG_ADDR
75#define REG_ADDR( scope, inst, reg ) \
76 ( (inst) + REG_RD_ADDR_##scope##_##reg )
77#endif
78
79#ifndef REG_ADDR_VECT
80#define REG_ADDR_VECT( scope, inst, reg, index ) \
81 ( (inst) + REG_RD_ADDR_##scope##_##reg + \
82 (index) * STRIDE_##scope##_##reg )
83#endif
84
85/* C-code for register scope config */
86
87/* Register r_bootsel, scope config, type r */
88typedef struct {
89 unsigned int boot_mode : 3;
90 unsigned int full_duplex : 1;
91 unsigned int user : 1;
92 unsigned int pll : 1;
93 unsigned int flash_bw : 1;
94 unsigned int dummy1 : 25;
95} reg_config_r_bootsel;
96#define REG_RD_ADDR_config_r_bootsel 0
97
98/* Register rw_clk_ctrl, scope config, type rw */
99typedef struct {
100 unsigned int pll : 1;
101 unsigned int cpu : 1;
102 unsigned int iop : 1;
103 unsigned int dma01_eth0 : 1;
104 unsigned int dma23 : 1;
105 unsigned int dma45 : 1;
106 unsigned int dma67 : 1;
107 unsigned int dma89_strcop : 1;
108 unsigned int bif : 1;
109 unsigned int fix_io : 1;
110 unsigned int dummy1 : 22;
111} reg_config_rw_clk_ctrl;
112#define REG_RD_ADDR_config_rw_clk_ctrl 4
113#define REG_WR_ADDR_config_rw_clk_ctrl 4
114
115/* Register rw_pad_ctrl, scope config, type rw */
116typedef struct {
117 unsigned int usb_susp : 1;
118 unsigned int phyrst_n : 1;
119 unsigned int dummy1 : 30;
120} reg_config_rw_pad_ctrl;
121#define REG_RD_ADDR_config_rw_pad_ctrl 8
122#define REG_WR_ADDR_config_rw_pad_ctrl 8
123
124
125/* Constants */
126enum {
127 regk_config_bw16 = 0x00000000,
128 regk_config_bw32 = 0x00000001,
129 regk_config_master = 0x00000005,
130 regk_config_nand = 0x00000003,
131 regk_config_net_rx = 0x00000001,
132 regk_config_net_tx_rx = 0x00000002,
133 regk_config_no = 0x00000000,
134 regk_config_none = 0x00000007,
135 regk_config_nor = 0x00000000,
136 regk_config_rw_clk_ctrl_default = 0x00000002,
137 regk_config_rw_pad_ctrl_default = 0x00000000,
138 regk_config_ser = 0x00000004,
139 regk_config_slave = 0x00000006,
140 regk_config_yes = 0x00000001
141};
142#endif /* __config_defs_h */
diff --git a/include/asm-cris/arch-v32/mach-fs/hwregs/gio_defs.h b/include/asm-cris/arch-v32/mach-fs/hwregs/gio_defs.h
new file mode 100644
index 000000000000..26aa3efcf91b
--- /dev/null
+++ b/include/asm-cris/arch-v32/mach-fs/hwregs/gio_defs.h
@@ -0,0 +1,295 @@
1#ifndef __gio_defs_h
2#define __gio_defs_h
3
4/*
5 * This file is autogenerated from
6 * file: ../../inst/gio/rtl/gio_regs.r
7 * id: gio_regs.r,v 1.5 2005/02/04 09:43:21 perz Exp
8 * last modfied: Mon Apr 11 16:07:47 2005
9 *
10 * by /n/asic/design/tools/rdesc/src/rdes2c --outfile gio_defs.h ../../inst/gio/rtl/gio_regs.r
11 * id: $Id: gio_defs.h,v 1.1 2007/02/13 11:55:30 starvik Exp $
12 * Any changes here will be lost.
13 *
14 * -*- buffer-read-only: t -*-
15 */
16/* Main access macros */
17#ifndef REG_RD
18#define REG_RD( scope, inst, reg ) \
19 REG_READ( reg_##scope##_##reg, \
20 (inst) + REG_RD_ADDR_##scope##_##reg )
21#endif
22
23#ifndef REG_WR
24#define REG_WR( scope, inst, reg, val ) \
25 REG_WRITE( reg_##scope##_##reg, \
26 (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
27#endif
28
29#ifndef REG_RD_VECT
30#define REG_RD_VECT( scope, inst, reg, index ) \
31 REG_READ( reg_##scope##_##reg, \
32 (inst) + REG_RD_ADDR_##scope##_##reg + \
33 (index) * STRIDE_##scope##_##reg )
34#endif
35
36#ifndef REG_WR_VECT
37#define REG_WR_VECT( scope, inst, reg, index, val ) \
38 REG_WRITE( reg_##scope##_##reg, \
39 (inst) + REG_WR_ADDR_##scope##_##reg + \
40 (index) * STRIDE_##scope##_##reg, (val) )
41#endif
42
43#ifndef REG_RD_INT
44#define REG_RD_INT( scope, inst, reg ) \
45 REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg )
46#endif
47
48#ifndef REG_WR_INT
49#define REG_WR_INT( scope, inst, reg, val ) \
50 REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
51#endif
52
53#ifndef REG_RD_INT_VECT
54#define REG_RD_INT_VECT( scope, inst, reg, index ) \
55 REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg + \
56 (index) * STRIDE_##scope##_##reg )
57#endif
58
59#ifndef REG_WR_INT_VECT
60#define REG_WR_INT_VECT( scope, inst, reg, index, val ) \
61 REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg + \
62 (index) * STRIDE_##scope##_##reg, (val) )
63#endif
64
65#ifndef REG_TYPE_CONV
66#define REG_TYPE_CONV( type, orgtype, val ) \
67 ( { union { orgtype o; type n; } r; r.o = val; r.n; } )
68#endif
69
70#ifndef reg_page_size
71#define reg_page_size 8192
72#endif
73
74#ifndef REG_ADDR
75#define REG_ADDR( scope, inst, reg ) \
76 ( (inst) + REG_RD_ADDR_##scope##_##reg )
77#endif
78
79#ifndef REG_ADDR_VECT
80#define REG_ADDR_VECT( scope, inst, reg, index ) \
81 ( (inst) + REG_RD_ADDR_##scope##_##reg + \
82 (index) * STRIDE_##scope##_##reg )
83#endif
84
85/* C-code for register scope gio */
86
87/* Register rw_pa_dout, scope gio, type rw */
88typedef struct {
89 unsigned int data : 8;
90 unsigned int dummy1 : 24;
91} reg_gio_rw_pa_dout;
92#define REG_RD_ADDR_gio_rw_pa_dout 0
93#define REG_WR_ADDR_gio_rw_pa_dout 0
94
95/* Register r_pa_din, scope gio, type r */
96typedef struct {
97 unsigned int data : 8;
98 unsigned int dummy1 : 24;
99} reg_gio_r_pa_din;
100#define REG_RD_ADDR_gio_r_pa_din 4
101
102/* Register rw_pa_oe, scope gio, type rw */
103typedef struct {
104 unsigned int oe : 8;
105 unsigned int dummy1 : 24;
106} reg_gio_rw_pa_oe;
107#define REG_RD_ADDR_gio_rw_pa_oe 8
108#define REG_WR_ADDR_gio_rw_pa_oe 8
109
110/* Register rw_intr_cfg, scope gio, type rw */
111typedef struct {
112 unsigned int pa0 : 3;
113 unsigned int pa1 : 3;
114 unsigned int pa2 : 3;
115 unsigned int pa3 : 3;
116 unsigned int pa4 : 3;
117 unsigned int pa5 : 3;
118 unsigned int pa6 : 3;
119 unsigned int pa7 : 3;
120 unsigned int dummy1 : 8;
121} reg_gio_rw_intr_cfg;
122#define REG_RD_ADDR_gio_rw_intr_cfg 12
123#define REG_WR_ADDR_gio_rw_intr_cfg 12
124
125/* Register rw_intr_mask, scope gio, type rw */
126typedef struct {
127 unsigned int pa0 : 1;
128 unsigned int pa1 : 1;
129 unsigned int pa2 : 1;
130 unsigned int pa3 : 1;
131 unsigned int pa4 : 1;
132 unsigned int pa5 : 1;
133 unsigned int pa6 : 1;
134 unsigned int pa7 : 1;
135 unsigned int dummy1 : 24;
136} reg_gio_rw_intr_mask;
137#define REG_RD_ADDR_gio_rw_intr_mask 16
138#define REG_WR_ADDR_gio_rw_intr_mask 16
139
140/* Register rw_ack_intr, scope gio, type rw */
141typedef struct {
142 unsigned int pa0 : 1;
143 unsigned int pa1 : 1;
144 unsigned int pa2 : 1;
145 unsigned int pa3 : 1;
146 unsigned int pa4 : 1;
147 unsigned int pa5 : 1;
148 unsigned int pa6 : 1;
149 unsigned int pa7 : 1;
150 unsigned int dummy1 : 24;
151} reg_gio_rw_ack_intr;
152#define REG_RD_ADDR_gio_rw_ack_intr 20
153#define REG_WR_ADDR_gio_rw_ack_intr 20
154
155/* Register r_intr, scope gio, type r */
156typedef struct {
157 unsigned int pa0 : 1;
158 unsigned int pa1 : 1;
159 unsigned int pa2 : 1;
160 unsigned int pa3 : 1;
161 unsigned int pa4 : 1;
162 unsigned int pa5 : 1;
163 unsigned int pa6 : 1;
164 unsigned int pa7 : 1;
165 unsigned int dummy1 : 24;
166} reg_gio_r_intr;
167#define REG_RD_ADDR_gio_r_intr 24
168
169/* Register r_masked_intr, scope gio, type r */
170typedef struct {
171 unsigned int pa0 : 1;
172 unsigned int pa1 : 1;
173 unsigned int pa2 : 1;
174 unsigned int pa3 : 1;
175 unsigned int pa4 : 1;
176 unsigned int pa5 : 1;
177 unsigned int pa6 : 1;
178 unsigned int pa7 : 1;
179 unsigned int dummy1 : 24;
180} reg_gio_r_masked_intr;
181#define REG_RD_ADDR_gio_r_masked_intr 28
182
183/* Register rw_pb_dout, scope gio, type rw */
184typedef struct {
185 unsigned int data : 18;
186 unsigned int dummy1 : 14;
187} reg_gio_rw_pb_dout;
188#define REG_RD_ADDR_gio_rw_pb_dout 32
189#define REG_WR_ADDR_gio_rw_pb_dout 32
190
191/* Register r_pb_din, scope gio, type r */
192typedef struct {
193 unsigned int data : 18;
194 unsigned int dummy1 : 14;
195} reg_gio_r_pb_din;
196#define REG_RD_ADDR_gio_r_pb_din 36
197
198/* Register rw_pb_oe, scope gio, type rw */
199typedef struct {
200 unsigned int oe : 18;
201 unsigned int dummy1 : 14;
202} reg_gio_rw_pb_oe;
203#define REG_RD_ADDR_gio_rw_pb_oe 40
204#define REG_WR_ADDR_gio_rw_pb_oe 40
205
206/* Register rw_pc_dout, scope gio, type rw */
207typedef struct {
208 unsigned int data : 18;
209 unsigned int dummy1 : 14;
210} reg_gio_rw_pc_dout;
211#define REG_RD_ADDR_gio_rw_pc_dout 48
212#define REG_WR_ADDR_gio_rw_pc_dout 48
213
214/* Register r_pc_din, scope gio, type r */
215typedef struct {
216 unsigned int data : 18;
217 unsigned int dummy1 : 14;
218} reg_gio_r_pc_din;
219#define REG_RD_ADDR_gio_r_pc_din 52
220
221/* Register rw_pc_oe, scope gio, type rw */
222typedef struct {
223 unsigned int oe : 18;
224 unsigned int dummy1 : 14;
225} reg_gio_rw_pc_oe;
226#define REG_RD_ADDR_gio_rw_pc_oe 56
227#define REG_WR_ADDR_gio_rw_pc_oe 56
228
229/* Register rw_pd_dout, scope gio, type rw */
230typedef struct {
231 unsigned int data : 18;
232 unsigned int dummy1 : 14;
233} reg_gio_rw_pd_dout;
234#define REG_RD_ADDR_gio_rw_pd_dout 64
235#define REG_WR_ADDR_gio_rw_pd_dout 64
236
237/* Register r_pd_din, scope gio, type r */
238typedef struct {
239 unsigned int data : 18;
240 unsigned int dummy1 : 14;
241} reg_gio_r_pd_din;
242#define REG_RD_ADDR_gio_r_pd_din 68
243
244/* Register rw_pd_oe, scope gio, type rw */
245typedef struct {
246 unsigned int oe : 18;
247 unsigned int dummy1 : 14;
248} reg_gio_rw_pd_oe;
249#define REG_RD_ADDR_gio_rw_pd_oe 72
250#define REG_WR_ADDR_gio_rw_pd_oe 72
251
252/* Register rw_pe_dout, scope gio, type rw */
253typedef struct {
254 unsigned int data : 18;
255 unsigned int dummy1 : 14;
256} reg_gio_rw_pe_dout;
257#define REG_RD_ADDR_gio_rw_pe_dout 80
258#define REG_WR_ADDR_gio_rw_pe_dout 80
259
260/* Register r_pe_din, scope gio, type r */
261typedef struct {
262 unsigned int data : 18;
263 unsigned int dummy1 : 14;
264} reg_gio_r_pe_din;
265#define REG_RD_ADDR_gio_r_pe_din 84
266
267/* Register rw_pe_oe, scope gio, type rw */
268typedef struct {
269 unsigned int oe : 18;
270 unsigned int dummy1 : 14;
271} reg_gio_rw_pe_oe;
272#define REG_RD_ADDR_gio_rw_pe_oe 88
273#define REG_WR_ADDR_gio_rw_pe_oe 88
274
275
276/* Constants */
277enum {
278 regk_gio_anyedge = 0x00000007,
279 regk_gio_hi = 0x00000001,
280 regk_gio_lo = 0x00000002,
281 regk_gio_negedge = 0x00000006,
282 regk_gio_no = 0x00000000,
283 regk_gio_off = 0x00000000,
284 regk_gio_posedge = 0x00000005,
285 regk_gio_rw_intr_cfg_default = 0x00000000,
286 regk_gio_rw_intr_mask_default = 0x00000000,
287 regk_gio_rw_pa_oe_default = 0x00000000,
288 regk_gio_rw_pb_oe_default = 0x00000000,
289 regk_gio_rw_pc_oe_default = 0x00000000,
290 regk_gio_rw_pd_oe_default = 0x00000000,
291 regk_gio_rw_pe_oe_default = 0x00000000,
292 regk_gio_set = 0x00000003,
293 regk_gio_yes = 0x00000001
294};
295#endif /* __gio_defs_h */
diff --git a/include/asm-cris/arch-v32/mach-fs/hwregs/intr_vect.h b/include/asm-cris/arch-v32/mach-fs/hwregs/intr_vect.h
new file mode 100644
index 000000000000..bacc2a895c21
--- /dev/null
+++ b/include/asm-cris/arch-v32/mach-fs/hwregs/intr_vect.h
@@ -0,0 +1,41 @@
1/* Interrupt vector numbers autogenerated by /n/asic/design/tools/rdesc/src/rdes2intr version
2 from ../../inst/intr_vect/rtl/guinness/ivmask.config.r
3version . */
4
5#ifndef _______INST_INTR_VECT_RTL_GUINNESS_IVMASK_CONFIG_R
6#define _______INST_INTR_VECT_RTL_GUINNESS_IVMASK_CONFIG_R
7#define MEMARB_INTR_VECT 0x31
8#define GEN_IO_INTR_VECT 0x32
9#define GIO_INTR_VECT GEN_IO_INTR_VECT
10#define IOP0_INTR_VECT 0x33
11#define IOP1_INTR_VECT 0x34
12#define IOP2_INTR_VECT 0x35
13#define IOP3_INTR_VECT 0x36
14#define DMA0_INTR_VECT 0x37
15#define DMA1_INTR_VECT 0x38
16#define DMA2_INTR_VECT 0x39
17#define DMA3_INTR_VECT 0x3a
18#define DMA4_INTR_VECT 0x3b
19#define DMA5_INTR_VECT 0x3c
20#define DMA6_INTR_VECT 0x3d
21#define DMA7_INTR_VECT 0x3e
22#define DMA8_INTR_VECT 0x3f
23#define DMA9_INTR_VECT 0x40
24#define ATA_INTR_VECT 0x41
25#define SSER0_INTR_VECT 0x42
26#define SSER1_INTR_VECT 0x43
27#define SER0_INTR_VECT 0x44
28#define SER1_INTR_VECT 0x45
29#define SER2_INTR_VECT 0x46
30#define SER3_INTR_VECT 0x47
31#define P21_INTR_VECT 0x48
32#define ETH0_INTR_VECT 0x49
33#define ETH1_INTR_VECT 0x4a
34#define TIMER_INTR_VECT 0x4b
35#define TIMER0_INTR_VECT TIMER_INTR_VECT
36#define BIF_ARB_INTR_VECT 0x4c
37#define BIF_DMA_INTR_VECT 0x4d
38#define EXT_INTR_VECT 0x4e
39#define IPI_INTR_VECT 0x4f
40#define NBR_INTR_VECT 0x50
41#endif
diff --git a/include/asm-cris/arch-v32/hwregs/intr_vect_defs.h b/include/asm-cris/arch-v32/mach-fs/hwregs/intr_vect_defs.h
index 535aaf1b4b52..aa65128ae1aa 100644
--- a/include/asm-cris/arch-v32/hwregs/intr_vect_defs.h
+++ b/include/asm-cris/arch-v32/mach-fs/hwregs/intr_vect_defs.h
@@ -4,11 +4,11 @@
4/* 4/*
5 * This file is autogenerated from 5 * This file is autogenerated from
6 * file: ../../inst/intr_vect/rtl/guinness/ivmask.config.r 6 * file: ../../inst/intr_vect/rtl/guinness/ivmask.config.r
7 * id: ivmask.config.r,v 1.4 2005/02/15 16:05:38 stefans Exp 7 * id: ivmask.config.r,v 1.4 2005/02/15 16:05:38 stefans Exp
8 * last modfied: Mon Apr 11 16:08:03 2005 8 * last modfied: Mon Apr 11 16:08:03 2005
9 * 9 *
10 * by /n/asic/design/tools/rdesc/src/rdes2c --outfile intr_vect_defs.h ../../inst/intr_vect/rtl/guinness/ivmask.config.r 10 * by /n/asic/design/tools/rdesc/src/rdes2c --outfile intr_vect_defs.h ../../inst/intr_vect/rtl/guinness/ivmask.config.r
11 * id: $Id: intr_vect_defs.h,v 1.8 2005/04/24 18:30:58 starvik Exp $ 11 * id: $Id: intr_vect_defs.h,v 1.1 2007/02/13 11:55:30 starvik Exp $
12 * Any changes here will be lost. 12 * Any changes here will be lost.
13 * 13 *
14 * -*- buffer-read-only: t -*- 14 * -*- buffer-read-only: t -*-
@@ -84,6 +84,7 @@
84 84
85/* C-code for register scope intr_vect */ 85/* C-code for register scope intr_vect */
86 86
87#define STRIDE_intr_vect_rw_mask 0
87/* Register rw_mask, scope intr_vect, type rw */ 88/* Register rw_mask, scope intr_vect, type rw */
88typedef struct { 89typedef struct {
89 unsigned int memarb : 1; 90 unsigned int memarb : 1;
@@ -112,7 +113,7 @@ typedef struct {
112 unsigned int p21 : 1; 113 unsigned int p21 : 1;
113 unsigned int eth0 : 1; 114 unsigned int eth0 : 1;
114 unsigned int eth1 : 1; 115 unsigned int eth1 : 1;
115 unsigned int timer : 1; 116 unsigned int timer0 : 1;
116 unsigned int bif_arb : 1; 117 unsigned int bif_arb : 1;
117 unsigned int bif_dma : 1; 118 unsigned int bif_dma : 1;
118 unsigned int ext : 1; 119 unsigned int ext : 1;
@@ -121,6 +122,7 @@ typedef struct {
121#define REG_RD_ADDR_intr_vect_rw_mask 0 122#define REG_RD_ADDR_intr_vect_rw_mask 0
122#define REG_WR_ADDR_intr_vect_rw_mask 0 123#define REG_WR_ADDR_intr_vect_rw_mask 0
123 124
125#define STRIDE_intr_vect_r_vect 0
124/* Register r_vect, scope intr_vect, type r */ 126/* Register r_vect, scope intr_vect, type r */
125typedef struct { 127typedef struct {
126 unsigned int memarb : 1; 128 unsigned int memarb : 1;
@@ -157,6 +159,7 @@ typedef struct {
157} reg_intr_vect_r_vect; 159} reg_intr_vect_r_vect;
158#define REG_RD_ADDR_intr_vect_r_vect 4 160#define REG_RD_ADDR_intr_vect_r_vect 4
159 161
162#define STRIDE_intr_vect_r_masked_vect 0
160/* Register r_masked_vect, scope intr_vect, type r */ 163/* Register r_masked_vect, scope intr_vect, type r */
161typedef struct { 164typedef struct {
162 unsigned int memarb : 1; 165 unsigned int memarb : 1;
@@ -209,7 +212,7 @@ typedef struct {
209#define REG_RD_ADDR_intr_vect_r_guru 16 212#define REG_RD_ADDR_intr_vect_r_guru 16
210 213
211/* Register rw_ipi, scope intr_vect, type rw */ 214/* Register rw_ipi, scope intr_vect, type rw */
212typedef struct 215typedef struct
213{ 216{
214 unsigned int vector; 217 unsigned int vector;
215} reg_intr_vect_rw_ipi; 218} reg_intr_vect_rw_ipi;
diff --git a/include/asm-cris/arch-v32/mach-fs/hwregs/marb_bp_defs.h b/include/asm-cris/arch-v32/mach-fs/hwregs/marb_bp_defs.h
new file mode 100644
index 000000000000..dcaaec4620ba
--- /dev/null
+++ b/include/asm-cris/arch-v32/mach-fs/hwregs/marb_bp_defs.h
@@ -0,0 +1,205 @@
1#ifndef __marb_bp_defs_h
2#define __marb_bp_defs_h
3
4/*
5 * This file is autogenerated from
6 * file: ../../inst/memarb/rtl/guinness/marb_top.r
7 * id: <not found>
8 * last modfied: Fri Nov 7 15:36:04 2003
9 *
10 * by /n/asic/projects/guinness/design/top/inst/rdesc/rdes2c ../../rtl/global.rmap ../../mod/modreg.rmap -base 0xb0000000 ../../inst/memarb/rtl/guinness/marb_top.r
11 * id: $Id: marb_bp_defs.h,v 1.1 2007/02/13 11:55:30 starvik Exp $
12 * Any changes here will be lost.
13 *
14 * -*- buffer-read-only: t -*-
15 */
16/* Main access macros */
17#ifndef REG_RD
18#define REG_RD( scope, inst, reg ) \
19 REG_READ( reg_##scope##_##reg, \
20 (inst) + REG_RD_ADDR_##scope##_##reg )
21#endif
22
23#ifndef REG_WR
24#define REG_WR( scope, inst, reg, val ) \
25 REG_WRITE( reg_##scope##_##reg, \
26 (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
27#endif
28
29#ifndef REG_RD_VECT
30#define REG_RD_VECT( scope, inst, reg, index ) \
31 REG_READ( reg_##scope##_##reg, \
32 (inst) + REG_RD_ADDR_##scope##_##reg + \
33 (index) * STRIDE_##scope##_##reg )
34#endif
35
36#ifndef REG_WR_VECT
37#define REG_WR_VECT( scope, inst, reg, index, val ) \
38 REG_WRITE( reg_##scope##_##reg, \
39 (inst) + REG_WR_ADDR_##scope##_##reg + \
40 (index) * STRIDE_##scope##_##reg, (val) )
41#endif
42
43#ifndef REG_RD_INT
44#define REG_RD_INT( scope, inst, reg ) \
45 REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg )
46#endif
47
48#ifndef REG_WR_INT
49#define REG_WR_INT( scope, inst, reg, val ) \
50 REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
51#endif
52
53#ifndef REG_RD_INT_VECT
54#define REG_RD_INT_VECT( scope, inst, reg, index ) \
55 REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg + \
56 (index) * STRIDE_##scope##_##reg )
57#endif
58
59#ifndef REG_WR_INT_VECT
60#define REG_WR_INT_VECT( scope, inst, reg, index, val ) \
61 REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg + \
62 (index) * STRIDE_##scope##_##reg, (val) )
63#endif
64
65#ifndef REG_TYPE_CONV
66#define REG_TYPE_CONV( type, orgtype, val ) \
67 ( { union { orgtype o; type n; } r; r.o = val; r.n; } )
68#endif
69
70#ifndef reg_page_size
71#define reg_page_size 8192
72#endif
73
74/* C-code for register scope marb_bp */
75
76/* Register rw_first_addr, scope marb_bp, type rw */
77typedef unsigned int reg_marb_bp_rw_first_addr;
78#define REG_RD_ADDR_marb_bp_rw_first_addr 0
79#define REG_WR_ADDR_marb_bp_rw_first_addr 0
80
81/* Register rw_last_addr, scope marb_bp, type rw */
82typedef unsigned int reg_marb_bp_rw_last_addr;
83#define REG_RD_ADDR_marb_bp_rw_last_addr 4
84#define REG_WR_ADDR_marb_bp_rw_last_addr 4
85
86/* Register rw_op, scope marb_bp, type rw */
87typedef struct {
88 unsigned int read : 1;
89 unsigned int write : 1;
90 unsigned int read_excl : 1;
91 unsigned int pri_write : 1;
92 unsigned int us_read : 1;
93 unsigned int us_write : 1;
94 unsigned int us_read_excl : 1;
95 unsigned int us_pri_write : 1;
96 unsigned int dummy1 : 24;
97} reg_marb_bp_rw_op;
98#define REG_RD_ADDR_marb_bp_rw_op 8
99#define REG_WR_ADDR_marb_bp_rw_op 8
100
101/* Register rw_clients, scope marb_bp, type rw */
102typedef struct {
103 unsigned int dma0 : 1;
104 unsigned int dma1 : 1;
105 unsigned int dma2 : 1;
106 unsigned int dma3 : 1;
107 unsigned int dma4 : 1;
108 unsigned int dma5 : 1;
109 unsigned int dma6 : 1;
110 unsigned int dma7 : 1;
111 unsigned int dma8 : 1;
112 unsigned int dma9 : 1;
113 unsigned int cpui : 1;
114 unsigned int cpud : 1;
115 unsigned int iop : 1;
116 unsigned int slave : 1;
117 unsigned int dummy1 : 18;
118} reg_marb_bp_rw_clients;
119#define REG_RD_ADDR_marb_bp_rw_clients 12
120#define REG_WR_ADDR_marb_bp_rw_clients 12
121
122/* Register rw_options, scope marb_bp, type rw */
123typedef struct {
124 unsigned int wrap : 1;
125 unsigned int dummy1 : 31;
126} reg_marb_bp_rw_options;
127#define REG_RD_ADDR_marb_bp_rw_options 16
128#define REG_WR_ADDR_marb_bp_rw_options 16
129
130/* Register r_break_addr, scope marb_bp, type r */
131typedef unsigned int reg_marb_bp_r_break_addr;
132#define REG_RD_ADDR_marb_bp_r_break_addr 20
133
134/* Register r_break_op, scope marb_bp, type r */
135typedef struct {
136 unsigned int read : 1;
137 unsigned int write : 1;
138 unsigned int read_excl : 1;
139 unsigned int pri_write : 1;
140 unsigned int us_read : 1;
141 unsigned int us_write : 1;
142 unsigned int us_read_excl : 1;
143 unsigned int us_pri_write : 1;
144 unsigned int dummy1 : 24;
145} reg_marb_bp_r_break_op;
146#define REG_RD_ADDR_marb_bp_r_break_op 24
147
148/* Register r_break_clients, scope marb_bp, type r */
149typedef struct {
150 unsigned int dma0 : 1;
151 unsigned int dma1 : 1;
152 unsigned int dma2 : 1;
153 unsigned int dma3 : 1;
154 unsigned int dma4 : 1;
155 unsigned int dma5 : 1;
156 unsigned int dma6 : 1;
157 unsigned int dma7 : 1;
158 unsigned int dma8 : 1;
159 unsigned int dma9 : 1;
160 unsigned int cpui : 1;
161 unsigned int cpud : 1;
162 unsigned int iop : 1;
163 unsigned int slave : 1;
164 unsigned int dummy1 : 18;
165} reg_marb_bp_r_break_clients;
166#define REG_RD_ADDR_marb_bp_r_break_clients 28
167
168/* Register r_break_first_client, scope marb_bp, type r */
169typedef struct {
170 unsigned int dma0 : 1;
171 unsigned int dma1 : 1;
172 unsigned int dma2 : 1;
173 unsigned int dma3 : 1;
174 unsigned int dma4 : 1;
175 unsigned int dma5 : 1;
176 unsigned int dma6 : 1;
177 unsigned int dma7 : 1;
178 unsigned int dma8 : 1;
179 unsigned int dma9 : 1;
180 unsigned int cpui : 1;
181 unsigned int cpud : 1;
182 unsigned int iop : 1;
183 unsigned int slave : 1;
184 unsigned int dummy1 : 18;
185} reg_marb_bp_r_break_first_client;
186#define REG_RD_ADDR_marb_bp_r_break_first_client 32
187
188/* Register r_break_size, scope marb_bp, type r */
189typedef unsigned int reg_marb_bp_r_break_size;
190#define REG_RD_ADDR_marb_bp_r_break_size 36
191
192/* Register rw_ack, scope marb_bp, type rw */
193typedef unsigned int reg_marb_bp_rw_ack;
194#define REG_RD_ADDR_marb_bp_rw_ack 40
195#define REG_WR_ADDR_marb_bp_rw_ack 40
196
197
198/* Constants */
199enum {
200 regk_marb_bp_no = 0x00000000,
201 regk_marb_bp_rw_op_default = 0x00000000,
202 regk_marb_bp_rw_options_default = 0x00000000,
203 regk_marb_bp_yes = 0x00000001
204};
205#endif /* __marb_bp_defs_h */
diff --git a/include/asm-cris/arch-v32/mach-fs/hwregs/marb_defs.h b/include/asm-cris/arch-v32/mach-fs/hwregs/marb_defs.h
new file mode 100644
index 000000000000..254da0854986
--- /dev/null
+++ b/include/asm-cris/arch-v32/mach-fs/hwregs/marb_defs.h
@@ -0,0 +1,475 @@
1#ifndef __marb_defs_h
2#define __marb_defs_h
3
4/*
5 * This file is autogenerated from
6 * file: ../../inst/memarb/rtl/guinness/marb_top.r
7 * id: <not found>
8 * last modfied: Mon Apr 11 16:12:16 2005
9 *
10 * by /n/asic/design/tools/rdesc/src/rdes2c --outfile marb_defs.h ../../inst/memarb/rtl/guinness/marb_top.r
11 * id: $Id: marb_defs.h,v 1.1 2007/02/13 11:55:30 starvik Exp $
12 * Any changes here will be lost.
13 *
14 * -*- buffer-read-only: t -*-
15 */
16/* Main access macros */
17#ifndef REG_RD
18#define REG_RD( scope, inst, reg ) \
19 REG_READ( reg_##scope##_##reg, \
20 (inst) + REG_RD_ADDR_##scope##_##reg )
21#endif
22
23#ifndef REG_WR
24#define REG_WR( scope, inst, reg, val ) \
25 REG_WRITE( reg_##scope##_##reg, \
26 (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
27#endif
28
29#ifndef REG_RD_VECT
30#define REG_RD_VECT( scope, inst, reg, index ) \
31 REG_READ( reg_##scope##_##reg, \
32 (inst) + REG_RD_ADDR_##scope##_##reg + \
33 (index) * STRIDE_##scope##_##reg )
34#endif
35
36#ifndef REG_WR_VECT
37#define REG_WR_VECT( scope, inst, reg, index, val ) \
38 REG_WRITE( reg_##scope##_##reg, \
39 (inst) + REG_WR_ADDR_##scope##_##reg + \
40 (index) * STRIDE_##scope##_##reg, (val) )
41#endif
42
43#ifndef REG_RD_INT
44#define REG_RD_INT( scope, inst, reg ) \
45 REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg )
46#endif
47
48#ifndef REG_WR_INT
49#define REG_WR_INT( scope, inst, reg, val ) \
50 REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
51#endif
52
53#ifndef REG_RD_INT_VECT
54#define REG_RD_INT_VECT( scope, inst, reg, index ) \
55 REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg + \
56 (index) * STRIDE_##scope##_##reg )
57#endif
58
59#ifndef REG_WR_INT_VECT
60#define REG_WR_INT_VECT( scope, inst, reg, index, val ) \
61 REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg + \
62 (index) * STRIDE_##scope##_##reg, (val) )
63#endif
64
65#ifndef REG_TYPE_CONV
66#define REG_TYPE_CONV( type, orgtype, val ) \
67 ( { union { orgtype o; type n; } r; r.o = val; r.n; } )
68#endif
69
70#ifndef reg_page_size
71#define reg_page_size 8192
72#endif
73
74#ifndef REG_ADDR
75#define REG_ADDR( scope, inst, reg ) \
76 ( (inst) + REG_RD_ADDR_##scope##_##reg )
77#endif
78
79#ifndef REG_ADDR_VECT
80#define REG_ADDR_VECT( scope, inst, reg, index ) \
81 ( (inst) + REG_RD_ADDR_##scope##_##reg + \
82 (index) * STRIDE_##scope##_##reg )
83#endif
84
85/* C-code for register scope marb */
86
87#define STRIDE_marb_rw_int_slots 4
88/* Register rw_int_slots, scope marb, type rw */
89typedef struct {
90 unsigned int owner : 4;
91 unsigned int dummy1 : 28;
92} reg_marb_rw_int_slots;
93#define REG_RD_ADDR_marb_rw_int_slots 0
94#define REG_WR_ADDR_marb_rw_int_slots 0
95
96#define STRIDE_marb_rw_ext_slots 4
97/* Register rw_ext_slots, scope marb, type rw */
98typedef struct {
99 unsigned int owner : 4;
100 unsigned int dummy1 : 28;
101} reg_marb_rw_ext_slots;
102#define REG_RD_ADDR_marb_rw_ext_slots 256
103#define REG_WR_ADDR_marb_rw_ext_slots 256
104
105#define STRIDE_marb_rw_regs_slots 4
106/* Register rw_regs_slots, scope marb, type rw */
107typedef struct {
108 unsigned int owner : 4;
109 unsigned int dummy1 : 28;
110} reg_marb_rw_regs_slots;
111#define REG_RD_ADDR_marb_rw_regs_slots 512
112#define REG_WR_ADDR_marb_rw_regs_slots 512
113
114/* Register rw_intr_mask, scope marb, type rw */
115typedef struct {
116 unsigned int bp0 : 1;
117 unsigned int bp1 : 1;
118 unsigned int bp2 : 1;
119 unsigned int bp3 : 1;
120 unsigned int dummy1 : 28;
121} reg_marb_rw_intr_mask;
122#define REG_RD_ADDR_marb_rw_intr_mask 528
123#define REG_WR_ADDR_marb_rw_intr_mask 528
124
125/* Register rw_ack_intr, scope marb, type rw */
126typedef struct {
127 unsigned int bp0 : 1;
128 unsigned int bp1 : 1;
129 unsigned int bp2 : 1;
130 unsigned int bp3 : 1;
131 unsigned int dummy1 : 28;
132} reg_marb_rw_ack_intr;
133#define REG_RD_ADDR_marb_rw_ack_intr 532
134#define REG_WR_ADDR_marb_rw_ack_intr 532
135
136/* Register r_intr, scope marb, type r */
137typedef struct {
138 unsigned int bp0 : 1;
139 unsigned int bp1 : 1;
140 unsigned int bp2 : 1;
141 unsigned int bp3 : 1;
142 unsigned int dummy1 : 28;
143} reg_marb_r_intr;
144#define REG_RD_ADDR_marb_r_intr 536
145
146/* Register r_masked_intr, scope marb, type r */
147typedef struct {
148 unsigned int bp0 : 1;
149 unsigned int bp1 : 1;
150 unsigned int bp2 : 1;
151 unsigned int bp3 : 1;
152 unsigned int dummy1 : 28;
153} reg_marb_r_masked_intr;
154#define REG_RD_ADDR_marb_r_masked_intr 540
155
156/* Register rw_stop_mask, scope marb, type rw */
157typedef struct {
158 unsigned int dma0 : 1;
159 unsigned int dma1 : 1;
160 unsigned int dma2 : 1;
161 unsigned int dma3 : 1;
162 unsigned int dma4 : 1;
163 unsigned int dma5 : 1;
164 unsigned int dma6 : 1;
165 unsigned int dma7 : 1;
166 unsigned int dma8 : 1;
167 unsigned int dma9 : 1;
168 unsigned int cpui : 1;
169 unsigned int cpud : 1;
170 unsigned int iop : 1;
171 unsigned int slave : 1;
172 unsigned int dummy1 : 18;
173} reg_marb_rw_stop_mask;
174#define REG_RD_ADDR_marb_rw_stop_mask 544
175#define REG_WR_ADDR_marb_rw_stop_mask 544
176
177/* Register r_stopped, scope marb, type r */
178typedef struct {
179 unsigned int dma0 : 1;
180 unsigned int dma1 : 1;
181 unsigned int dma2 : 1;
182 unsigned int dma3 : 1;
183 unsigned int dma4 : 1;
184 unsigned int dma5 : 1;
185 unsigned int dma6 : 1;
186 unsigned int dma7 : 1;
187 unsigned int dma8 : 1;
188 unsigned int dma9 : 1;
189 unsigned int cpui : 1;
190 unsigned int cpud : 1;
191 unsigned int iop : 1;
192 unsigned int slave : 1;
193 unsigned int dummy1 : 18;
194} reg_marb_r_stopped;
195#define REG_RD_ADDR_marb_r_stopped 548
196
197/* Register rw_no_snoop, scope marb, type rw */
198typedef struct {
199 unsigned int dma0 : 1;
200 unsigned int dma1 : 1;
201 unsigned int dma2 : 1;
202 unsigned int dma3 : 1;
203 unsigned int dma4 : 1;
204 unsigned int dma5 : 1;
205 unsigned int dma6 : 1;
206 unsigned int dma7 : 1;
207 unsigned int dma8 : 1;
208 unsigned int dma9 : 1;
209 unsigned int cpui : 1;
210 unsigned int cpud : 1;
211 unsigned int iop : 1;
212 unsigned int slave : 1;
213 unsigned int dummy1 : 18;
214} reg_marb_rw_no_snoop;
215#define REG_RD_ADDR_marb_rw_no_snoop 832
216#define REG_WR_ADDR_marb_rw_no_snoop 832
217
218/* Register rw_no_snoop_rq, scope marb, type rw */
219typedef struct {
220 unsigned int dummy1 : 10;
221 unsigned int cpui : 1;
222 unsigned int cpud : 1;
223 unsigned int dummy2 : 20;
224} reg_marb_rw_no_snoop_rq;
225#define REG_RD_ADDR_marb_rw_no_snoop_rq 836
226#define REG_WR_ADDR_marb_rw_no_snoop_rq 836
227
228
229/* Constants */
230enum {
231 regk_marb_cpud = 0x0000000b,
232 regk_marb_cpui = 0x0000000a,
233 regk_marb_dma0 = 0x00000000,
234 regk_marb_dma1 = 0x00000001,
235 regk_marb_dma2 = 0x00000002,
236 regk_marb_dma3 = 0x00000003,
237 regk_marb_dma4 = 0x00000004,
238 regk_marb_dma5 = 0x00000005,
239 regk_marb_dma6 = 0x00000006,
240 regk_marb_dma7 = 0x00000007,
241 regk_marb_dma8 = 0x00000008,
242 regk_marb_dma9 = 0x00000009,
243 regk_marb_iop = 0x0000000c,
244 regk_marb_no = 0x00000000,
245 regk_marb_r_stopped_default = 0x00000000,
246 regk_marb_rw_ext_slots_default = 0x00000000,
247 regk_marb_rw_ext_slots_size = 0x00000040,
248 regk_marb_rw_int_slots_default = 0x00000000,
249 regk_marb_rw_int_slots_size = 0x00000040,
250 regk_marb_rw_intr_mask_default = 0x00000000,
251 regk_marb_rw_no_snoop_default = 0x00000000,
252 regk_marb_rw_no_snoop_rq_default = 0x00000000,
253 regk_marb_rw_regs_slots_default = 0x00000000,
254 regk_marb_rw_regs_slots_size = 0x00000004,
255 regk_marb_rw_stop_mask_default = 0x00000000,
256 regk_marb_slave = 0x0000000d,
257 regk_marb_yes = 0x00000001
258};
259#endif /* __marb_defs_h */
260#ifndef __marb_bp_defs_h
261#define __marb_bp_defs_h
262
263/*
264 * This file is autogenerated from
265 * file: ../../inst/memarb/rtl/guinness/marb_top.r
266 * id: <not found>
267 * last modfied: Mon Apr 11 16:12:16 2005
268 *
269 * by /n/asic/design/tools/rdesc/src/rdes2c --outfile marb_defs.h ../../inst/memarb/rtl/guinness/marb_top.r
270 * id: $Id: marb_defs.h,v 1.1 2007/02/13 11:55:30 starvik Exp $
271 * Any changes here will be lost.
272 *
273 * -*- buffer-read-only: t -*-
274 */
275/* Main access macros */
276#ifndef REG_RD
277#define REG_RD( scope, inst, reg ) \
278 REG_READ( reg_##scope##_##reg, \
279 (inst) + REG_RD_ADDR_##scope##_##reg )
280#endif
281
282#ifndef REG_WR
283#define REG_WR( scope, inst, reg, val ) \
284 REG_WRITE( reg_##scope##_##reg, \
285 (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
286#endif
287
288#ifndef REG_RD_VECT
289#define REG_RD_VECT( scope, inst, reg, index ) \
290 REG_READ( reg_##scope##_##reg, \
291 (inst) + REG_RD_ADDR_##scope##_##reg + \
292 (index) * STRIDE_##scope##_##reg )
293#endif
294
295#ifndef REG_WR_VECT
296#define REG_WR_VECT( scope, inst, reg, index, val ) \
297 REG_WRITE( reg_##scope##_##reg, \
298 (inst) + REG_WR_ADDR_##scope##_##reg + \
299 (index) * STRIDE_##scope##_##reg, (val) )
300#endif
301
302#ifndef REG_RD_INT
303#define REG_RD_INT( scope, inst, reg ) \
304 REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg )
305#endif
306
307#ifndef REG_WR_INT
308#define REG_WR_INT( scope, inst, reg, val ) \
309 REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
310#endif
311
312#ifndef REG_RD_INT_VECT
313#define REG_RD_INT_VECT( scope, inst, reg, index ) \
314 REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg + \
315 (index) * STRIDE_##scope##_##reg )
316#endif
317
318#ifndef REG_WR_INT_VECT
319#define REG_WR_INT_VECT( scope, inst, reg, index, val ) \
320 REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg + \
321 (index) * STRIDE_##scope##_##reg, (val) )
322#endif
323
324#ifndef REG_TYPE_CONV
325#define REG_TYPE_CONV( type, orgtype, val ) \
326 ( { union { orgtype o; type n; } r; r.o = val; r.n; } )
327#endif
328
329#ifndef reg_page_size
330#define reg_page_size 8192
331#endif
332
333#ifndef REG_ADDR
334#define REG_ADDR( scope, inst, reg ) \
335 ( (inst) + REG_RD_ADDR_##scope##_##reg )
336#endif
337
338#ifndef REG_ADDR_VECT
339#define REG_ADDR_VECT( scope, inst, reg, index ) \
340 ( (inst) + REG_RD_ADDR_##scope##_##reg + \
341 (index) * STRIDE_##scope##_##reg )
342#endif
343
344/* C-code for register scope marb_bp */
345
346/* Register rw_first_addr, scope marb_bp, type rw */
347typedef unsigned int reg_marb_bp_rw_first_addr;
348#define REG_RD_ADDR_marb_bp_rw_first_addr 0
349#define REG_WR_ADDR_marb_bp_rw_first_addr 0
350
351/* Register rw_last_addr, scope marb_bp, type rw */
352typedef unsigned int reg_marb_bp_rw_last_addr;
353#define REG_RD_ADDR_marb_bp_rw_last_addr 4
354#define REG_WR_ADDR_marb_bp_rw_last_addr 4
355
356/* Register rw_op, scope marb_bp, type rw */
357typedef struct {
358 unsigned int rd : 1;
359 unsigned int wr : 1;
360 unsigned int rd_excl : 1;
361 unsigned int pri_wr : 1;
362 unsigned int us_rd : 1;
363 unsigned int us_wr : 1;
364 unsigned int us_rd_excl : 1;
365 unsigned int us_pri_wr : 1;
366 unsigned int dummy1 : 24;
367} reg_marb_bp_rw_op;
368#define REG_RD_ADDR_marb_bp_rw_op 8
369#define REG_WR_ADDR_marb_bp_rw_op 8
370
371/* Register rw_clients, scope marb_bp, type rw */
372typedef struct {
373 unsigned int dma0 : 1;
374 unsigned int dma1 : 1;
375 unsigned int dma2 : 1;
376 unsigned int dma3 : 1;
377 unsigned int dma4 : 1;
378 unsigned int dma5 : 1;
379 unsigned int dma6 : 1;
380 unsigned int dma7 : 1;
381 unsigned int dma8 : 1;
382 unsigned int dma9 : 1;
383 unsigned int cpui : 1;
384 unsigned int cpud : 1;
385 unsigned int iop : 1;
386 unsigned int slave : 1;
387 unsigned int dummy1 : 18;
388} reg_marb_bp_rw_clients;
389#define REG_RD_ADDR_marb_bp_rw_clients 12
390#define REG_WR_ADDR_marb_bp_rw_clients 12
391
392/* Register rw_options, scope marb_bp, type rw */
393typedef struct {
394 unsigned int wrap : 1;
395 unsigned int dummy1 : 31;
396} reg_marb_bp_rw_options;
397#define REG_RD_ADDR_marb_bp_rw_options 16
398#define REG_WR_ADDR_marb_bp_rw_options 16
399
400/* Register r_brk_addr, scope marb_bp, type r */
401typedef unsigned int reg_marb_bp_r_brk_addr;
402#define REG_RD_ADDR_marb_bp_r_brk_addr 20
403
404/* Register r_brk_op, scope marb_bp, type r */
405typedef struct {
406 unsigned int rd : 1;
407 unsigned int wr : 1;
408 unsigned int rd_excl : 1;
409 unsigned int pri_wr : 1;
410 unsigned int us_rd : 1;
411 unsigned int us_wr : 1;
412 unsigned int us_rd_excl : 1;
413 unsigned int us_pri_wr : 1;
414 unsigned int dummy1 : 24;
415} reg_marb_bp_r_brk_op;
416#define REG_RD_ADDR_marb_bp_r_brk_op 24
417
418/* Register r_brk_clients, scope marb_bp, type r */
419typedef struct {
420 unsigned int dma0 : 1;
421 unsigned int dma1 : 1;
422 unsigned int dma2 : 1;
423 unsigned int dma3 : 1;
424 unsigned int dma4 : 1;
425 unsigned int dma5 : 1;
426 unsigned int dma6 : 1;
427 unsigned int dma7 : 1;
428 unsigned int dma8 : 1;
429 unsigned int dma9 : 1;
430 unsigned int cpui : 1;
431 unsigned int cpud : 1;
432 unsigned int iop : 1;
433 unsigned int slave : 1;
434 unsigned int dummy1 : 18;
435} reg_marb_bp_r_brk_clients;
436#define REG_RD_ADDR_marb_bp_r_brk_clients 28
437
438/* Register r_brk_first_client, scope marb_bp, type r */
439typedef struct {
440 unsigned int dma0 : 1;
441 unsigned int dma1 : 1;
442 unsigned int dma2 : 1;
443 unsigned int dma3 : 1;
444 unsigned int dma4 : 1;
445 unsigned int dma5 : 1;
446 unsigned int dma6 : 1;
447 unsigned int dma7 : 1;
448 unsigned int dma8 : 1;
449 unsigned int dma9 : 1;
450 unsigned int cpui : 1;
451 unsigned int cpud : 1;
452 unsigned int iop : 1;
453 unsigned int slave : 1;
454 unsigned int dummy1 : 18;
455} reg_marb_bp_r_brk_first_client;
456#define REG_RD_ADDR_marb_bp_r_brk_first_client 32
457
458/* Register r_brk_size, scope marb_bp, type r */
459typedef unsigned int reg_marb_bp_r_brk_size;
460#define REG_RD_ADDR_marb_bp_r_brk_size 36
461
462/* Register rw_ack, scope marb_bp, type rw */
463typedef unsigned int reg_marb_bp_rw_ack;
464#define REG_RD_ADDR_marb_bp_rw_ack 40
465#define REG_WR_ADDR_marb_bp_rw_ack 40
466
467
468/* Constants */
469enum {
470 regk_marb_bp_no = 0x00000000,
471 regk_marb_bp_rw_op_default = 0x00000000,
472 regk_marb_bp_rw_options_default = 0x00000000,
473 regk_marb_bp_yes = 0x00000001
474};
475#endif /* __marb_bp_defs_h */
diff --git a/include/asm-cris/arch-v32/mach-fs/hwregs/pinmux_defs.h b/include/asm-cris/arch-v32/mach-fs/hwregs/pinmux_defs.h
new file mode 100644
index 000000000000..751eab5f191c
--- /dev/null
+++ b/include/asm-cris/arch-v32/mach-fs/hwregs/pinmux_defs.h
@@ -0,0 +1,357 @@
1#ifndef __pinmux_defs_h
2#define __pinmux_defs_h
3
4/*
5 * This file is autogenerated from
6 * file: ../../inst/pinmux/rtl/guinness/pinmux_regs.r
7 * id: pinmux_regs.r,v 1.40 2005/02/09 16:22:59 perz Exp
8 * last modfied: Mon Apr 11 16:09:11 2005
9 *
10 * by /n/asic/design/tools/rdesc/src/rdes2c --outfile pinmux_defs.h ../../inst/pinmux/rtl/guinness/pinmux_regs.r
11 * id: $Id: pinmux_defs.h,v 1.1 2007/02/13 11:55:30 starvik Exp $
12 * Any changes here will be lost.
13 *
14 * -*- buffer-read-only: t -*-
15 */
16/* Main access macros */
17#ifndef REG_RD
18#define REG_RD( scope, inst, reg ) \
19 REG_READ( reg_##scope##_##reg, \
20 (inst) + REG_RD_ADDR_##scope##_##reg )
21#endif
22
23#ifndef REG_WR
24#define REG_WR( scope, inst, reg, val ) \
25 REG_WRITE( reg_##scope##_##reg, \
26 (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
27#endif
28
29#ifndef REG_RD_VECT
30#define REG_RD_VECT( scope, inst, reg, index ) \
31 REG_READ( reg_##scope##_##reg, \
32 (inst) + REG_RD_ADDR_##scope##_##reg + \
33 (index) * STRIDE_##scope##_##reg )
34#endif
35
36#ifndef REG_WR_VECT
37#define REG_WR_VECT( scope, inst, reg, index, val ) \
38 REG_WRITE( reg_##scope##_##reg, \
39 (inst) + REG_WR_ADDR_##scope##_##reg + \
40 (index) * STRIDE_##scope##_##reg, (val) )
41#endif
42
43#ifndef REG_RD_INT
44#define REG_RD_INT( scope, inst, reg ) \
45 REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg )
46#endif
47
48#ifndef REG_WR_INT
49#define REG_WR_INT( scope, inst, reg, val ) \
50 REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
51#endif
52
53#ifndef REG_RD_INT_VECT
54#define REG_RD_INT_VECT( scope, inst, reg, index ) \
55 REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg + \
56 (index) * STRIDE_##scope##_##reg )
57#endif
58
59#ifndef REG_WR_INT_VECT
60#define REG_WR_INT_VECT( scope, inst, reg, index, val ) \
61 REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg + \
62 (index) * STRIDE_##scope##_##reg, (val) )
63#endif
64
65#ifndef REG_TYPE_CONV
66#define REG_TYPE_CONV( type, orgtype, val ) \
67 ( { union { orgtype o; type n; } r; r.o = val; r.n; } )
68#endif
69
70#ifndef reg_page_size
71#define reg_page_size 8192
72#endif
73
74#ifndef REG_ADDR
75#define REG_ADDR( scope, inst, reg ) \
76 ( (inst) + REG_RD_ADDR_##scope##_##reg )
77#endif
78
79#ifndef REG_ADDR_VECT
80#define REG_ADDR_VECT( scope, inst, reg, index ) \
81 ( (inst) + REG_RD_ADDR_##scope##_##reg + \
82 (index) * STRIDE_##scope##_##reg )
83#endif
84
85/* C-code for register scope pinmux */
86
87/* Register rw_pa, scope pinmux, type rw */
88typedef struct {
89 unsigned int pa0 : 1;
90 unsigned int pa1 : 1;
91 unsigned int pa2 : 1;
92 unsigned int pa3 : 1;
93 unsigned int pa4 : 1;
94 unsigned int pa5 : 1;
95 unsigned int pa6 : 1;
96 unsigned int pa7 : 1;
97 unsigned int csp2_n : 1;
98 unsigned int csp3_n : 1;
99 unsigned int csp5_n : 1;
100 unsigned int csp6_n : 1;
101 unsigned int hsh4 : 1;
102 unsigned int hsh5 : 1;
103 unsigned int hsh6 : 1;
104 unsigned int hsh7 : 1;
105 unsigned int dummy1 : 16;
106} reg_pinmux_rw_pa;
107#define REG_RD_ADDR_pinmux_rw_pa 0
108#define REG_WR_ADDR_pinmux_rw_pa 0
109
110/* Register rw_hwprot, scope pinmux, type rw */
111typedef struct {
112 unsigned int ser1 : 1;
113 unsigned int ser2 : 1;
114 unsigned int ser3 : 1;
115 unsigned int sser0 : 1;
116 unsigned int sser1 : 1;
117 unsigned int ata0 : 1;
118 unsigned int ata1 : 1;
119 unsigned int ata2 : 1;
120 unsigned int ata3 : 1;
121 unsigned int ata : 1;
122 unsigned int eth1 : 1;
123 unsigned int eth1_mgm : 1;
124 unsigned int timer : 1;
125 unsigned int p21 : 1;
126 unsigned int dummy1 : 18;
127} reg_pinmux_rw_hwprot;
128#define REG_RD_ADDR_pinmux_rw_hwprot 4
129#define REG_WR_ADDR_pinmux_rw_hwprot 4
130
131/* Register rw_pb_gio, scope pinmux, type rw */
132typedef struct {
133 unsigned int pb0 : 1;
134 unsigned int pb1 : 1;
135 unsigned int pb2 : 1;
136 unsigned int pb3 : 1;
137 unsigned int pb4 : 1;
138 unsigned int pb5 : 1;
139 unsigned int pb6 : 1;
140 unsigned int pb7 : 1;
141 unsigned int pb8 : 1;
142 unsigned int pb9 : 1;
143 unsigned int pb10 : 1;
144 unsigned int pb11 : 1;
145 unsigned int pb12 : 1;
146 unsigned int pb13 : 1;
147 unsigned int pb14 : 1;
148 unsigned int pb15 : 1;
149 unsigned int pb16 : 1;
150 unsigned int pb17 : 1;
151 unsigned int dummy1 : 14;
152} reg_pinmux_rw_pb_gio;
153#define REG_RD_ADDR_pinmux_rw_pb_gio 8
154#define REG_WR_ADDR_pinmux_rw_pb_gio 8
155
156/* Register rw_pb_iop, scope pinmux, type rw */
157typedef struct {
158 unsigned int pb0 : 1;
159 unsigned int pb1 : 1;
160 unsigned int pb2 : 1;
161 unsigned int pb3 : 1;
162 unsigned int pb4 : 1;
163 unsigned int pb5 : 1;
164 unsigned int pb6 : 1;
165 unsigned int pb7 : 1;
166 unsigned int pb8 : 1;
167 unsigned int pb9 : 1;
168 unsigned int pb10 : 1;
169 unsigned int pb11 : 1;
170 unsigned int pb12 : 1;
171 unsigned int pb13 : 1;
172 unsigned int pb14 : 1;
173 unsigned int pb15 : 1;
174 unsigned int pb16 : 1;
175 unsigned int pb17 : 1;
176 unsigned int dummy1 : 14;
177} reg_pinmux_rw_pb_iop;
178#define REG_RD_ADDR_pinmux_rw_pb_iop 12
179#define REG_WR_ADDR_pinmux_rw_pb_iop 12
180
181/* Register rw_pc_gio, scope pinmux, type rw */
182typedef struct {
183 unsigned int pc0 : 1;
184 unsigned int pc1 : 1;
185 unsigned int pc2 : 1;
186 unsigned int pc3 : 1;
187 unsigned int pc4 : 1;
188 unsigned int pc5 : 1;
189 unsigned int pc6 : 1;
190 unsigned int pc7 : 1;
191 unsigned int pc8 : 1;
192 unsigned int pc9 : 1;
193 unsigned int pc10 : 1;
194 unsigned int pc11 : 1;
195 unsigned int pc12 : 1;
196 unsigned int pc13 : 1;
197 unsigned int pc14 : 1;
198 unsigned int pc15 : 1;
199 unsigned int pc16 : 1;
200 unsigned int pc17 : 1;
201 unsigned int dummy1 : 14;
202} reg_pinmux_rw_pc_gio;
203#define REG_RD_ADDR_pinmux_rw_pc_gio 16
204#define REG_WR_ADDR_pinmux_rw_pc_gio 16
205
206/* Register rw_pc_iop, scope pinmux, type rw */
207typedef struct {
208 unsigned int pc0 : 1;
209 unsigned int pc1 : 1;
210 unsigned int pc2 : 1;
211 unsigned int pc3 : 1;
212 unsigned int pc4 : 1;
213 unsigned int pc5 : 1;
214 unsigned int pc6 : 1;
215 unsigned int pc7 : 1;
216 unsigned int pc8 : 1;
217 unsigned int pc9 : 1;
218 unsigned int pc10 : 1;
219 unsigned int pc11 : 1;
220 unsigned int pc12 : 1;
221 unsigned int pc13 : 1;
222 unsigned int pc14 : 1;
223 unsigned int pc15 : 1;
224 unsigned int pc16 : 1;
225 unsigned int pc17 : 1;
226 unsigned int dummy1 : 14;
227} reg_pinmux_rw_pc_iop;
228#define REG_RD_ADDR_pinmux_rw_pc_iop 20
229#define REG_WR_ADDR_pinmux_rw_pc_iop 20
230
231/* Register rw_pd_gio, scope pinmux, type rw */
232typedef struct {
233 unsigned int pd0 : 1;
234 unsigned int pd1 : 1;
235 unsigned int pd2 : 1;
236 unsigned int pd3 : 1;
237 unsigned int pd4 : 1;
238 unsigned int pd5 : 1;
239 unsigned int pd6 : 1;
240 unsigned int pd7 : 1;
241 unsigned int pd8 : 1;
242 unsigned int pd9 : 1;
243 unsigned int pd10 : 1;
244 unsigned int pd11 : 1;
245 unsigned int pd12 : 1;
246 unsigned int pd13 : 1;
247 unsigned int pd14 : 1;
248 unsigned int pd15 : 1;
249 unsigned int pd16 : 1;
250 unsigned int pd17 : 1;
251 unsigned int dummy1 : 14;
252} reg_pinmux_rw_pd_gio;
253#define REG_RD_ADDR_pinmux_rw_pd_gio 24
254#define REG_WR_ADDR_pinmux_rw_pd_gio 24
255
256/* Register rw_pd_iop, scope pinmux, type rw */
257typedef struct {
258 unsigned int pd0 : 1;
259 unsigned int pd1 : 1;
260 unsigned int pd2 : 1;
261 unsigned int pd3 : 1;
262 unsigned int pd4 : 1;
263 unsigned int pd5 : 1;
264 unsigned int pd6 : 1;
265 unsigned int pd7 : 1;
266 unsigned int pd8 : 1;
267 unsigned int pd9 : 1;
268 unsigned int pd10 : 1;
269 unsigned int pd11 : 1;
270 unsigned int pd12 : 1;
271 unsigned int pd13 : 1;
272 unsigned int pd14 : 1;
273 unsigned int pd15 : 1;
274 unsigned int pd16 : 1;
275 unsigned int pd17 : 1;
276 unsigned int dummy1 : 14;
277} reg_pinmux_rw_pd_iop;
278#define REG_RD_ADDR_pinmux_rw_pd_iop 28
279#define REG_WR_ADDR_pinmux_rw_pd_iop 28
280
281/* Register rw_pe_gio, scope pinmux, type rw */
282typedef struct {
283 unsigned int pe0 : 1;
284 unsigned int pe1 : 1;
285 unsigned int pe2 : 1;
286 unsigned int pe3 : 1;
287 unsigned int pe4 : 1;
288 unsigned int pe5 : 1;
289 unsigned int pe6 : 1;
290 unsigned int pe7 : 1;
291 unsigned int pe8 : 1;
292 unsigned int pe9 : 1;
293 unsigned int pe10 : 1;
294 unsigned int pe11 : 1;
295 unsigned int pe12 : 1;
296 unsigned int pe13 : 1;
297 unsigned int pe14 : 1;
298 unsigned int pe15 : 1;
299 unsigned int pe16 : 1;
300 unsigned int pe17 : 1;
301 unsigned int dummy1 : 14;
302} reg_pinmux_rw_pe_gio;
303#define REG_RD_ADDR_pinmux_rw_pe_gio 32
304#define REG_WR_ADDR_pinmux_rw_pe_gio 32
305
306/* Register rw_pe_iop, scope pinmux, type rw */
307typedef struct {
308 unsigned int pe0 : 1;
309 unsigned int pe1 : 1;
310 unsigned int pe2 : 1;
311 unsigned int pe3 : 1;
312 unsigned int pe4 : 1;
313 unsigned int pe5 : 1;
314 unsigned int pe6 : 1;
315 unsigned int pe7 : 1;
316 unsigned int pe8 : 1;
317 unsigned int pe9 : 1;
318 unsigned int pe10 : 1;
319 unsigned int pe11 : 1;
320 unsigned int pe12 : 1;
321 unsigned int pe13 : 1;
322 unsigned int pe14 : 1;
323 unsigned int pe15 : 1;
324 unsigned int pe16 : 1;
325 unsigned int pe17 : 1;
326 unsigned int dummy1 : 14;
327} reg_pinmux_rw_pe_iop;
328#define REG_RD_ADDR_pinmux_rw_pe_iop 36
329#define REG_WR_ADDR_pinmux_rw_pe_iop 36
330
331/* Register rw_usb_phy, scope pinmux, type rw */
332typedef struct {
333 unsigned int en_usb0 : 1;
334 unsigned int en_usb1 : 1;
335 unsigned int dummy1 : 30;
336} reg_pinmux_rw_usb_phy;
337#define REG_RD_ADDR_pinmux_rw_usb_phy 40
338#define REG_WR_ADDR_pinmux_rw_usb_phy 40
339
340
341/* Constants */
342enum {
343 regk_pinmux_no = 0x00000000,
344 regk_pinmux_rw_hwprot_default = 0x00000000,
345 regk_pinmux_rw_pa_default = 0x00000000,
346 regk_pinmux_rw_pb_gio_default = 0x00000000,
347 regk_pinmux_rw_pb_iop_default = 0x00000000,
348 regk_pinmux_rw_pc_gio_default = 0x00000000,
349 regk_pinmux_rw_pc_iop_default = 0x00000000,
350 regk_pinmux_rw_pd_gio_default = 0x00000000,
351 regk_pinmux_rw_pd_iop_default = 0x00000000,
352 regk_pinmux_rw_pe_gio_default = 0x00000000,
353 regk_pinmux_rw_pe_iop_default = 0x00000000,
354 regk_pinmux_rw_usb_phy_default = 0x00000000,
355 regk_pinmux_yes = 0x00000001
356};
357#endif /* __pinmux_defs_h */
diff --git a/include/asm-cris/arch-v32/hwregs/reg_map.h b/include/asm-cris/arch-v32/mach-fs/hwregs/reg_map.h
index e31502838ec6..4146973a58b3 100644
--- a/include/asm-cris/arch-v32/hwregs/reg_map.h
+++ b/include/asm-cris/arch-v32/mach-fs/hwregs/reg_map.h
@@ -4,17 +4,17 @@
4/* 4/*
5 * This file is autogenerated from 5 * This file is autogenerated from
6 * file: ../../mod/fakereg.rmap 6 * file: ../../mod/fakereg.rmap
7 * id: fakereg.rmap,v 1.3 2004/02/11 19:53:22 ronny Exp 7 * id: fakereg.rmap,v 1.3 2004/02/11 19:53:22 ronny Exp
8 * last modified: Wed Feb 11 20:53:25 2004 8 * last modified: Wed Feb 11 20:53:25 2004
9 * file: ../../rtl/global.rmap 9 * file: ../../rtl/global.rmap
10 * id: global.rmap,v 1.3 2003/08/18 15:08:23 mikaeln Exp 10 * id: global.rmap,v 1.3 2003/08/18 15:08:23 mikaeln Exp
11 * last modified: Mon Aug 18 17:08:23 2003 11 * last modified: Mon Aug 18 17:08:23 2003
12 * file: ../../mod/modreg.rmap 12 * file: ../../mod/modreg.rmap
13 * id: modreg.rmap,v 1.31 2004/02/20 15:40:04 stefans Exp 13 * id: modreg.rmap,v 1.31 2004/02/20 15:40:04 stefans Exp
14 * last modified: Fri Feb 20 16:40:04 2004 14 * last modified: Fri Feb 20 16:40:04 2004
15 * 15 *
16 * by /n/asic/design/tools/rdesc/src/rdes2c -map -base 0xb0000000 ../../rtl/global.rmap ../../mod/modreg.rmap ../../inst/io_proc/rtl/guinness/iop_top.r ../../inst/memarb/rtl/guinness/marb_top.r ../../mod/fakereg.rmap 16 * by /n/asic/design/tools/rdesc/src/rdes2c -map -base 0xb0000000 ../../rtl/global.rmap ../../mod/modreg.rmap ../../inst/io_proc/rtl/guinness/iop_top.r ../../inst/memarb/rtl/guinness/marb_top.r ../../mod/fakereg.rmap
17 * id: $Id: reg_map.h,v 1.7 2005/04/24 18:30:58 starvik Exp $ 17 * id: $Id: reg_map.h,v 1.1 2007/02/13 11:55:30 starvik Exp $
18 * Any changes here will be lost. 18 * Any changes here will be lost.
19 * 19 *
20 * -*- buffer-read-only: t -*- 20 * -*- buffer-read-only: t -*-
@@ -97,6 +97,7 @@ typedef enum {
97 regi_strcop = 0xb0030000, 97 regi_strcop = 0xb0030000,
98 regi_strmux = 0xb003a000, 98 regi_strmux = 0xb003a000,
99 regi_timer = 0xb001e000, 99 regi_timer = 0xb001e000,
100 regi_timer0 = 0xb001e000,
100 regi_timer2 = 0xb005e000, 101 regi_timer2 = 0xb005e000,
101 regi_trace = 0xb0040000, 102 regi_trace = 0xb0040000,
102} reg_scope_instances; 103} reg_scope_instances;
diff --git a/include/asm-cris/arch-v32/mach-fs/hwregs/strmux_defs.h b/include/asm-cris/arch-v32/mach-fs/hwregs/strmux_defs.h
new file mode 100644
index 000000000000..cbfaa867829e
--- /dev/null
+++ b/include/asm-cris/arch-v32/mach-fs/hwregs/strmux_defs.h
@@ -0,0 +1,127 @@
1#ifndef __strmux_defs_h
2#define __strmux_defs_h
3
4/*
5 * This file is autogenerated from
6 * file: ../../inst/strmux/rtl/guinness/strmux_regs.r
7 * id: strmux_regs.r,v 1.10 2005/02/10 10:10:46 perz Exp
8 * last modfied: Mon Apr 11 16:09:43 2005
9 *
10 * by /n/asic/design/tools/rdesc/src/rdes2c --outfile strmux_defs.h ../../inst/strmux/rtl/guinness/strmux_regs.r
11 * id: $Id: strmux_defs.h,v 1.1 2007/02/13 11:55:30 starvik Exp $
12 * Any changes here will be lost.
13 *
14 * -*- buffer-read-only: t -*-
15 */
16/* Main access macros */
17#ifndef REG_RD
18#define REG_RD( scope, inst, reg ) \
19 REG_READ( reg_##scope##_##reg, \
20 (inst) + REG_RD_ADDR_##scope##_##reg )
21#endif
22
23#ifndef REG_WR
24#define REG_WR( scope, inst, reg, val ) \
25 REG_WRITE( reg_##scope##_##reg, \
26 (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
27#endif
28
29#ifndef REG_RD_VECT
30#define REG_RD_VECT( scope, inst, reg, index ) \
31 REG_READ( reg_##scope##_##reg, \
32 (inst) + REG_RD_ADDR_##scope##_##reg + \
33 (index) * STRIDE_##scope##_##reg )
34#endif
35
36#ifndef REG_WR_VECT
37#define REG_WR_VECT( scope, inst, reg, index, val ) \
38 REG_WRITE( reg_##scope##_##reg, \
39 (inst) + REG_WR_ADDR_##scope##_##reg + \
40 (index) * STRIDE_##scope##_##reg, (val) )
41#endif
42
43#ifndef REG_RD_INT
44#define REG_RD_INT( scope, inst, reg ) \
45 REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg )
46#endif
47
48#ifndef REG_WR_INT
49#define REG_WR_INT( scope, inst, reg, val ) \
50 REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
51#endif
52
53#ifndef REG_RD_INT_VECT
54#define REG_RD_INT_VECT( scope, inst, reg, index ) \
55 REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg + \
56 (index) * STRIDE_##scope##_##reg )
57#endif
58
59#ifndef REG_WR_INT_VECT
60#define REG_WR_INT_VECT( scope, inst, reg, index, val ) \
61 REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg + \
62 (index) * STRIDE_##scope##_##reg, (val) )
63#endif
64
65#ifndef REG_TYPE_CONV
66#define REG_TYPE_CONV( type, orgtype, val ) \
67 ( { union { orgtype o; type n; } r; r.o = val; r.n; } )
68#endif
69
70#ifndef reg_page_size
71#define reg_page_size 8192
72#endif
73
74#ifndef REG_ADDR
75#define REG_ADDR( scope, inst, reg ) \
76 ( (inst) + REG_RD_ADDR_##scope##_##reg )
77#endif
78
79#ifndef REG_ADDR_VECT
80#define REG_ADDR_VECT( scope, inst, reg, index ) \
81 ( (inst) + REG_RD_ADDR_##scope##_##reg + \
82 (index) * STRIDE_##scope##_##reg )
83#endif
84
85/* C-code for register scope strmux */
86
87/* Register rw_cfg, scope strmux, type rw */
88typedef struct {
89 unsigned int dma0 : 3;
90 unsigned int dma1 : 3;
91 unsigned int dma2 : 3;
92 unsigned int dma3 : 3;
93 unsigned int dma4 : 3;
94 unsigned int dma5 : 3;
95 unsigned int dma6 : 3;
96 unsigned int dma7 : 3;
97 unsigned int dma8 : 3;
98 unsigned int dma9 : 3;
99 unsigned int dummy1 : 2;
100} reg_strmux_rw_cfg;
101#define REG_RD_ADDR_strmux_rw_cfg 0
102#define REG_WR_ADDR_strmux_rw_cfg 0
103
104
105/* Constants */
106enum {
107 regk_strmux_ata = 0x00000003,
108 regk_strmux_eth0 = 0x00000001,
109 regk_strmux_eth1 = 0x00000004,
110 regk_strmux_ext0 = 0x00000001,
111 regk_strmux_ext1 = 0x00000001,
112 regk_strmux_ext2 = 0x00000001,
113 regk_strmux_ext3 = 0x00000001,
114 regk_strmux_iop0 = 0x00000002,
115 regk_strmux_iop1 = 0x00000001,
116 regk_strmux_off = 0x00000000,
117 regk_strmux_p21 = 0x00000004,
118 regk_strmux_rw_cfg_default = 0x00000000,
119 regk_strmux_ser0 = 0x00000002,
120 regk_strmux_ser1 = 0x00000002,
121 regk_strmux_ser2 = 0x00000004,
122 regk_strmux_ser3 = 0x00000003,
123 regk_strmux_sser0 = 0x00000003,
124 regk_strmux_sser1 = 0x00000003,
125 regk_strmux_strcop = 0x00000002
126};
127#endif /* __strmux_defs_h */
diff --git a/include/asm-cris/arch-v32/hwregs/timer_defs.h b/include/asm-cris/arch-v32/mach-fs/hwregs/timer_defs.h
index 20c8c89ec076..76bcc591921d 100644
--- a/include/asm-cris/arch-v32/hwregs/timer_defs.h
+++ b/include/asm-cris/arch-v32/mach-fs/hwregs/timer_defs.h
@@ -4,11 +4,11 @@
4/* 4/*
5 * This file is autogenerated from 5 * This file is autogenerated from
6 * file: ../../inst/timer/rtl/timer_regs.r 6 * file: ../../inst/timer/rtl/timer_regs.r
7 * id: timer_regs.r,v 1.7 2003/03/11 11:16:59 perz Exp 7 * id: timer_regs.r,v 1.7 2003/03/11 11:16:59 perz Exp
8 * last modfied: Mon Apr 11 16:09:53 2005 8 * last modfied: Mon Apr 11 16:09:53 2005
9 * 9 *
10 * by /n/asic/design/tools/rdesc/src/rdes2c --outfile timer_defs.h ../../inst/timer/rtl/timer_regs.r 10 * by /n/asic/design/tools/rdesc/src/rdes2c --outfile timer_defs.h ../../inst/timer/rtl/timer_regs.r
11 * id: $Id: timer_defs.h,v 1.6 2005/04/24 18:30:58 starvik Exp $ 11 * id: $Id: timer_defs.h,v 1.1 2007/04/11 13:51:01 ricardw Exp $
12 * Any changes here will be lost. 12 * Any changes here will be lost.
13 * 13 *
14 * -*- buffer-read-only: t -*- 14 * -*- buffer-read-only: t -*-
diff --git a/include/asm-cris/arch-v32/mach-fs/pinmux.h b/include/asm-cris/arch-v32/mach-fs/pinmux.h
new file mode 100644
index 000000000000..c2b3036779df
--- /dev/null
+++ b/include/asm-cris/arch-v32/mach-fs/pinmux.h
@@ -0,0 +1,38 @@
1#ifndef _ASM_CRIS_ARCH_PINMUX_H
2#define _ASM_CRIS_ARCH_PINMUX_H
3
4#define PORT_B 0
5#define PORT_C 1
6#define PORT_D 2
7#define PORT_E 3
8
9enum pin_mode {
10 pinmux_none = 0,
11 pinmux_fixed,
12 pinmux_gpio,
13 pinmux_iop
14};
15
16enum fixed_function {
17 pinmux_ser1,
18 pinmux_ser2,
19 pinmux_ser3,
20 pinmux_sser0,
21 pinmux_sser1,
22 pinmux_ata0,
23 pinmux_ata1,
24 pinmux_ata2,
25 pinmux_ata3,
26 pinmux_ata,
27 pinmux_eth1,
28 pinmux_timer
29};
30
31int crisv32_pinmux_init(void);
32int crisv32_pinmux_alloc(int port, int first_pin, int last_pin, enum pin_mode);
33int crisv32_pinmux_alloc_fixed(enum fixed_function function);
34int crisv32_pinmux_dealloc(int port, int first_pin, int last_pin);
35int crisv32_pinmux_dealloc_fixed(enum fixed_function function);
36void crisv32_pinmux_dump(void);
37
38#endif
diff --git a/include/asm-cris/arch-v32/mach-fs/startup.inc b/include/asm-cris/arch-v32/mach-fs/startup.inc
new file mode 100644
index 000000000000..4a10ccbd6cc1
--- /dev/null
+++ b/include/asm-cris/arch-v32/mach-fs/startup.inc
@@ -0,0 +1,77 @@
1#include <hwregs/asm/reg_map_asm.h>
2#include <hwregs/asm/bif_core_defs_asm.h>
3#include <hwregs/asm/gio_defs_asm.h>
4#include <hwregs/asm/config_defs_asm.h>
5
6 .macro GIO_INIT
7 move.d CONFIG_ETRAX_DEF_GIO_PA_OUT, $r0
8 move.d REG_ADDR(gio, regi_gio, rw_pa_dout), $r1
9 move.d $r0, [$r1]
10
11 move.d CONFIG_ETRAX_DEF_GIO_PA_OE, $r0
12 move.d REG_ADDR(gio, regi_gio, rw_pa_oe), $r1
13 move.d $r0, [$r1]
14
15 move.d CONFIG_ETRAX_DEF_GIO_PB_OUT, $r0
16 move.d REG_ADDR(gio, regi_gio, rw_pb_dout), $r1
17 move.d $r0, [$r1]
18
19 move.d CONFIG_ETRAX_DEF_GIO_PB_OE, $r0
20 move.d REG_ADDR(gio, regi_gio, rw_pb_oe), $r1
21 move.d $r0, [$r1]
22
23 move.d CONFIG_ETRAX_DEF_GIO_PC_OUT, $r0
24 move.d REG_ADDR(gio, regi_gio, rw_pc_dout), $r1
25 move.d $r0, [$r1]
26
27 move.d CONFIG_ETRAX_DEF_GIO_PC_OE, $r0
28 move.d REG_ADDR(gio, regi_gio, rw_pc_oe), $r1
29 move.d $r0, [$r1]
30
31 move.d CONFIG_ETRAX_DEF_GIO_PD_OUT, $r0
32 move.d REG_ADDR(gio, regi_gio, rw_pd_dout), $r1
33 move.d $r0, [$r1]
34
35 move.d CONFIG_ETRAX_DEF_GIO_PD_OE, $r0
36 move.d REG_ADDR(gio, regi_gio, rw_pd_oe), $r1
37 move.d $r0, [$r1]
38
39 move.d CONFIG_ETRAX_DEF_GIO_PE_OUT, $r0
40 move.d REG_ADDR(gio, regi_gio, rw_pe_dout), $r1
41 move.d $r0, [$r1]
42
43 move.d CONFIG_ETRAX_DEF_GIO_PE_OE, $r0
44 move.d REG_ADDR(gio, regi_gio, rw_pe_oe), $r1
45 move.d $r0, [$r1]
46 .endm
47
48 .macro START_CLOCKS
49 move.d REG_ADDR(config, regi_config, rw_clk_ctrl), $r1
50 move.d [$r1], $r0
51 or.d REG_STATE(config, rw_clk_ctrl, cpu, yes) | \
52 REG_STATE(config, rw_clk_ctrl, bif, yes) | \
53 REG_STATE(config, rw_clk_ctrl, fix_io, yes), $r0
54 move.d $r0, [$r1]
55 .endm
56
57 .macro SETUP_WAIT_STATES
58 ;; Set up waitstates etc
59 move.d REG_ADDR(bif_core, regi_bif_core, rw_grp1_cfg), $r0
60 move.d CONFIG_ETRAX_MEM_GRP1_CONFIG, $r1
61 move.d $r1, [$r0]
62 move.d REG_ADDR(bif_core, regi_bif_core, rw_grp2_cfg), $r0
63 move.d CONFIG_ETRAX_MEM_GRP2_CONFIG, $r1
64 move.d $r1, [$r0]
65 move.d REG_ADDR(bif_core, regi_bif_core, rw_grp3_cfg), $r0
66 move.d CONFIG_ETRAX_MEM_GRP3_CONFIG, $r1
67 move.d $r1, [$r0]
68 move.d REG_ADDR(bif_core, regi_bif_core, rw_grp4_cfg), $r0
69 move.d CONFIG_ETRAX_MEM_GRP4_CONFIG, $r1
70 move.d $r1, [$r0]
71#ifdef CONFIG_ETRAX_VCS_SIM
72 ;; Set up minimal flash waitstates
73 move.d 0, $r10
74 move.d REG_ADDR(bif_core, regi_bif_core, rw_grp1_cfg), $r11
75 move.d $r10, [$r11]
76#endif
77 .endm
diff --git a/include/asm-cris/arch-v32/offset.h b/include/asm-cris/arch-v32/offset.h
index 597419b033f9..4442c4bd52f4 100644
--- a/include/asm-cris/arch-v32/offset.h
+++ b/include/asm-cris/arch-v32/offset.h
@@ -27,7 +27,7 @@
27#define THREAD_usp 4 /* offsetof(struct thread_struct, usp) */ 27#define THREAD_usp 4 /* offsetof(struct thread_struct, usp) */
28#define THREAD_ccs 8 /* offsetof(struct thread_struct, ccs) */ 28#define THREAD_ccs 8 /* offsetof(struct thread_struct, ccs) */
29 29
30#define TASK_pid 149 /* offsetof(struct task_struct, pid) */ 30#define TASK_pid 151 /* offsetof(struct task_struct, pid) */
31 31
32#define LCLONE_VM 256 /* CLONE_VM */ 32#define LCLONE_VM 256 /* CLONE_VM */
33#define LCLONE_UNTRACED 8388608 /* CLONE_UNTRACED */ 33#define LCLONE_UNTRACED 8388608 /* CLONE_UNTRACED */
diff --git a/include/asm-cris/arch-v32/page.h b/include/asm-cris/arch-v32/page.h
index fa454fe12425..20f1b4806bfe 100644
--- a/include/asm-cris/arch-v32/page.h
+++ b/include/asm-cris/arch-v32/page.h
@@ -7,11 +7,11 @@
7#define PAGE_OFFSET KSEG_C /* kseg_c is mapped to physical ram. */ 7#define PAGE_OFFSET KSEG_C /* kseg_c is mapped to physical ram. */
8 8
9/* 9/*
10 * Macros to convert between physical and virtual addresses. By stripiing a 10 * Macros to convert between physical and virtual addresses. By stripping a
11 * selected bit it's possible to convert between KSEG_x and 0x40000000 where the 11 * selected bit it's possible to convert between KSEG_x and 0x40000000 where the
12 * DRAM really resides. DRAM is virtually at 0xc. 12 * DRAM really resides. DRAM is virtually at 0xc.
13 */ 13 */
14#ifndef CONFIG_ETRAXFS_SIM 14#ifndef CONFIG_ETRAX_VCS_SIM
15#define __pa(x) ((unsigned long)(x) & 0x7fffffff) 15#define __pa(x) ((unsigned long)(x) & 0x7fffffff)
16#define __va(x) ((void *)((unsigned long)(x) | 0x80000000)) 16#define __va(x) ((void *)((unsigned long)(x) | 0x80000000))
17#else 17#else
diff --git a/include/asm-cris/arch-v32/pinmux.h b/include/asm-cris/arch-v32/pinmux.h
index a66dc9970919..bb09bce42e7a 100644
--- a/include/asm-cris/arch-v32/pinmux.h
+++ b/include/asm-cris/arch-v32/pinmux.h
@@ -34,6 +34,7 @@ int crisv32_pinmux_init(void);
34int crisv32_pinmux_alloc(int port, int first_pin, int last_pin, enum pin_mode); 34int crisv32_pinmux_alloc(int port, int first_pin, int last_pin, enum pin_mode);
35int crisv32_pinmux_alloc_fixed(enum fixed_function function); 35int crisv32_pinmux_alloc_fixed(enum fixed_function function);
36int crisv32_pinmux_dealloc(int port, int first_pin, int last_pin); 36int crisv32_pinmux_dealloc(int port, int first_pin, int last_pin);
37int crisv32_pinmux_dealloc_fixed(enum fixed_function function);
37void crisv32_pinmux_dump(void); 38void crisv32_pinmux_dump(void);
38 39
39#endif 40#endif
diff --git a/include/asm-cris/arch-v32/processor.h b/include/asm-cris/arch-v32/processor.h
index 5553b0cd02bf..f80b47790ca6 100644
--- a/include/asm-cris/arch-v32/processor.h
+++ b/include/asm-cris/arch-v32/processor.h
@@ -23,7 +23,7 @@ struct thread_struct {
23 * User-space process size. This is hardcoded into a few places, so don't 23 * User-space process size. This is hardcoded into a few places, so don't
24 * changed it unless everything's clear! 24 * changed it unless everything's clear!
25 */ 25 */
26#ifndef CONFIG_ETRAXFS_SIM 26#ifndef CONFIG_ETRAX_VCS_SIM
27#define TASK_SIZE (0xB0000000UL) 27#define TASK_SIZE (0xB0000000UL)
28#else 28#else
29#define TASK_SIZE (0xA0000000UL) 29#define TASK_SIZE (0xA0000000UL)
diff --git a/include/asm-cris/arch-v32/spinlock.h b/include/asm-cris/arch-v32/spinlock.h
index 5f43df0a5fb4..0d5709b983a1 100644
--- a/include/asm-cris/arch-v32/spinlock.h
+++ b/include/asm-cris/arch-v32/spinlock.h
@@ -1,40 +1,47 @@
1#ifndef __ASM_ARCH_SPINLOCK_H 1#ifndef __ASM_ARCH_SPINLOCK_H
2#define __ASM_ARCH_SPINLOCK_H 2#define __ASM_ARCH_SPINLOCK_H
3 3
4#include <asm/system.h> 4#include <linux/spinlock_types.h>
5 5
6#define RW_LOCK_BIAS 0x01000000 6#define RW_LOCK_BIAS 0x01000000
7#define SPIN_LOCK_UNLOCKED (spinlock_t) { 1 }
8#define spin_lock_init(x) do { *(x) = SPIN_LOCK_UNLOCKED; } while(0)
9
10#define spin_is_locked(x) (*(volatile signed char *)(&(x)->lock) <= 0)
11#define spin_unlock_wait(x) do { barrier(); } while(spin_is_locked(x))
12 7
13extern void cris_spin_unlock(void *l, int val); 8extern void cris_spin_unlock(void *l, int val);
14extern void cris_spin_lock(void *l); 9extern void cris_spin_lock(void *l);
15extern int cris_spin_trylock(void* l); 10extern int cris_spin_trylock(void *l);
16 11
17static inline void _raw_spin_unlock(spinlock_t *lock) 12static inline int __raw_spin_is_locked(raw_spinlock_t *x)
13{
14 return *(volatile signed char *)(&(x)->slock) <= 0;
15}
16
17static inline void __raw_spin_unlock(raw_spinlock_t *lock)
18{ 18{
19 __asm__ volatile ("move.d %1,%0" \ 19 __asm__ volatile ("move.d %1,%0" \
20 : "=m" (lock->lock) \ 20 : "=m" (lock->slock) \
21 : "r" (1) \ 21 : "r" (1) \
22 : "memory"); 22 : "memory");
23} 23}
24 24
25static inline int _raw_spin_trylock(spinlock_t *lock) 25static inline void __raw_spin_unlock_wait(raw_spinlock_t *lock)
26{
27 while (__raw_spin_is_locked(lock))
28 cpu_relax();
29}
30
31static inline int __raw_spin_trylock(raw_spinlock_t *lock)
26{ 32{
27 return cris_spin_trylock((void*)&lock->lock); 33 return cris_spin_trylock((void *)&lock->slock);
28} 34}
29 35
30static inline void _raw_spin_lock(spinlock_t *lock) 36static inline void __raw_spin_lock(raw_spinlock_t *lock)
31{ 37{
32 cris_spin_lock((void*)&lock->lock); 38 cris_spin_lock((void *)&lock->slock);
33} 39}
34 40
35static inline void _raw_spin_lock_flags (spinlock_t *lock, unsigned long flags) 41static inline void
42__raw_spin_lock_flags(raw_spinlock_t *lock, unsigned long flags)
36{ 43{
37 _raw_spin_lock(lock); 44 __raw_spin_lock(lock);
38} 45}
39 46
40/* 47/*
@@ -46,120 +53,75 @@ static inline void _raw_spin_lock_flags (spinlock_t *lock, unsigned long flags)
46 * can "mix" irq-safe locks - any writer needs to get a 53 * can "mix" irq-safe locks - any writer needs to get a
47 * irq-safe write-lock, but readers can get non-irqsafe 54 * irq-safe write-lock, but readers can get non-irqsafe
48 * read-locks. 55 * read-locks.
56 *
49 */ 57 */
50typedef struct {
51 spinlock_t lock;
52 volatile int counter;
53#ifdef CONFIG_PREEMPT
54 unsigned int break_lock;
55#endif
56} rwlock_t;
57
58#define RW_LOCK_UNLOCKED (rwlock_t) { {1}, 0 }
59
60#define rwlock_init(lp) do { *(lp) = RW_LOCK_UNLOCKED; } while (0)
61
62/**
63 * read_can_lock - would read_trylock() succeed?
64 * @lock: the rwlock in question.
65 */
66#define read_can_lock(x) ((int)(x)->counter >= 0)
67
68/**
69 * write_can_lock - would write_trylock() succeed?
70 * @lock: the rwlock in question.
71 */
72#define write_can_lock(x) ((x)->counter == 0)
73
74#define _raw_read_trylock(lock) generic_raw_read_trylock(lock)
75 58
76/* read_lock, read_unlock are pretty straightforward. Of course it somehow 59static inline int __raw_read_can_lock(raw_rwlock_t *x)
77 * sucks we end up saving/restoring flags twice for read_lock_irqsave aso. */
78
79static __inline__ void _raw_read_lock(rwlock_t *rw)
80{ 60{
81 unsigned long flags; 61 return (int)(x)->lock > 0;
82 local_irq_save(flags);
83 _raw_spin_lock(&rw->lock);
84
85 rw->counter++;
86
87 _raw_spin_unlock(&rw->lock);
88 local_irq_restore(flags);
89} 62}
90 63
91static __inline__ void _raw_read_unlock(rwlock_t *rw) 64static inline int __raw_write_can_lock(raw_rwlock_t *x)
92{ 65{
93 unsigned long flags; 66 return (x)->lock == RW_LOCK_BIAS;
94 local_irq_save(flags);
95 _raw_spin_lock(&rw->lock);
96
97 rw->counter--;
98
99 _raw_spin_unlock(&rw->lock);
100 local_irq_restore(flags);
101} 67}
102 68
103/* write_lock is less trivial. We optimistically grab the lock and check 69static inline void __raw_read_lock(raw_rwlock_t *rw)
104 * if we surprised any readers. If so we release the lock and wait till
105 * they're all gone before trying again
106 *
107 * Also note that we don't use the _irqsave / _irqrestore suffixes here.
108 * If we're called with interrupts enabled and we've got readers (or other
109 * writers) in interrupt handlers someone fucked up and we'd dead-lock
110 * sooner or later anyway. prumpf */
111
112static __inline__ void _raw_write_lock(rwlock_t *rw)
113{ 70{
114retry: 71 __raw_spin_lock(&rw->slock);
115 _raw_spin_lock(&rw->lock); 72 while (rw->lock == 0);
116 73 rw->lock--;
117 if(rw->counter != 0) { 74 __raw_spin_unlock(&rw->slock);
118 /* this basically never happens */
119 _raw_spin_unlock(&rw->lock);
120
121 while(rw->counter != 0);
122
123 goto retry;
124 }
125
126 /* got it. now leave without unlocking */
127 rw->counter = -1; /* remember we are locked */
128} 75}
129 76
130/* write_unlock is absolutely trivial - we don't have to wait for anything */ 77static inline void __raw_write_lock(raw_rwlock_t *rw)
131
132static __inline__ void _raw_write_unlock(rwlock_t *rw)
133{ 78{
134 rw->counter = 0; 79 __raw_spin_lock(&rw->slock);
135 _raw_spin_unlock(&rw->lock); 80 while (rw->lock != RW_LOCK_BIAS);
81 rw->lock == 0;
82 __raw_spin_unlock(&rw->slock);
136} 83}
137 84
138static __inline__ int _raw_write_trylock(rwlock_t *rw) 85static inline void __raw_read_unlock(raw_rwlock_t *rw)
139{ 86{
140 _raw_spin_lock(&rw->lock); 87 __raw_spin_lock(&rw->slock);
141 if (rw->counter != 0) { 88 rw->lock++;
142 /* this basically never happens */ 89 __raw_spin_unlock(&rw->slock);
143 _raw_spin_unlock(&rw->lock); 90}
144
145 return 0;
146 }
147 91
148 /* got it. now leave without unlocking */ 92static inline void __raw_write_unlock(raw_rwlock_t *rw)
149 rw->counter = -1; /* remember we are locked */ 93{
150 return 1; 94 __raw_spin_lock(&rw->slock);
95 while (rw->lock != RW_LOCK_BIAS);
96 rw->lock == RW_LOCK_BIAS;
97 __raw_spin_unlock(&rw->slock);
151} 98}
152 99
153static __inline__ int is_read_locked(rwlock_t *rw) 100static inline int __raw_read_trylock(raw_rwlock_t *rw)
154{ 101{
155 return rw->counter > 0; 102 int ret = 0;
103 __raw_spin_lock(&rw->slock);
104 if (rw->lock != 0) {
105 rw->lock--;
106 ret = 1;
107 }
108 __raw_spin_unlock(&rw->slock);
109 return ret;
156} 110}
157 111
158static __inline__ int is_write_locked(rwlock_t *rw) 112static inline int __raw_write_trylock(raw_rwlock_t *rw)
159{ 113{
160 return rw->counter < 0; 114 int ret = 0;
115 __raw_spin_lock(&rw->slock);
116 if (rw->lock == RW_LOCK_BIAS) {
117 rw->lock == 0;
118 ret = 1;
119 }
120 __raw_spin_unlock(&rw->slock);
121 return 1;
161} 122}
162 123
124
163#define _raw_spin_relax(lock) cpu_relax() 125#define _raw_spin_relax(lock) cpu_relax()
164#define _raw_read_relax(lock) cpu_relax() 126#define _raw_read_relax(lock) cpu_relax()
165#define _raw_write_relax(lock) cpu_relax() 127#define _raw_write_relax(lock) cpu_relax()
diff --git a/include/asm-cris/arch-v32/system.h b/include/asm-cris/arch-v32/system.h
index d20e2d6d64a3..6ca90f1f110a 100644
--- a/include/asm-cris/arch-v32/system.h
+++ b/include/asm-cris/arch-v32/system.h
@@ -66,13 +66,4 @@ struct __xchg_dummy { unsigned long a[100]; };
66#define local_irq_save(x) \ 66#define local_irq_save(x) \
67 __asm__ __volatile__ ("move $ccs, %0\n\tdi" : "=rm" (x) : : "memory"); 67 __asm__ __volatile__ ("move $ccs, %0\n\tdi" : "=rm" (x) : : "memory");
68 68
69#ifdef CONFIG_SMP
70typedef struct {
71 volatile unsigned int lock __attribute__ ((aligned(4)));
72#ifdef CONFIG_PREEMPT
73 unsigned int break_lock;
74#endif
75} spinlock_t;
76#endif
77
78#endif /* _ASM_CRIS_ARCH_SYSTEM_H */ 69#endif /* _ASM_CRIS_ARCH_SYSTEM_H */
diff --git a/include/asm-cris/arch-v32/timex.h b/include/asm-cris/arch-v32/timex.h
index 5a4aa285d5fd..2591d3c5ed9d 100644
--- a/include/asm-cris/arch-v32/timex.h
+++ b/include/asm-cris/arch-v32/timex.h
@@ -1,9 +1,9 @@
1#ifndef _ASM_CRIS_ARCH_TIMEX_H 1#ifndef _ASM_CRIS_ARCH_TIMEX_H
2#define _ASM_CRIS_ARCH_TIMEX_H 2#define _ASM_CRIS_ARCH_TIMEX_H
3 3
4#include <asm/arch/hwregs/reg_map.h> 4#include <hwregs/reg_map.h>
5#include <asm/arch/hwregs/reg_rdwr.h> 5#include <hwregs/reg_rdwr.h>
6#include <asm/arch/hwregs/timer_defs.h> 6#include <hwregs/timer_defs.h>
7 7
8/* 8/*
9 * The clock runs at 100MHz, we divide it by 1000000. If you change anything 9 * The clock runs at 100MHz, we divide it by 1000000. If you change anything
@@ -18,7 +18,7 @@
18 18
19/* Convert the value in step of 10 ns to 1us without overflow: */ 19/* Convert the value in step of 10 ns to 1us without overflow: */
20#define GET_JIFFIES_USEC() \ 20#define GET_JIFFIES_USEC() \
21 ( (TIMER0_DIV - REG_RD(timer, regi_timer, r_tmr0_data)) /100 ) 21 ((TIMER0_DIV - REG_RD(timer, regi_timer0, r_tmr0_data)) / 100)
22 22
23extern unsigned long get_ns_in_jiffie(void); 23extern unsigned long get_ns_in_jiffie(void);
24 24
diff --git a/include/asm-cris/arch-v32/unistd.h b/include/asm-cris/arch-v32/unistd.h
index 5d369d4439d9..0051114c63c7 100644
--- a/include/asm-cris/arch-v32/unistd.h
+++ b/include/asm-cris/arch-v32/unistd.h
@@ -16,7 +16,8 @@ type name(void) \
16 ".endif\n\t" \ 16 ".endif\n\t" \
17 "break 13" \ 17 "break 13" \
18 : "=r" (__a) \ 18 : "=r" (__a) \
19 : "r" (__n_)); \ 19 : "r" (__n_) \
20 : "memory"); \
20 if (__a >= 0) \ 21 if (__a >= 0) \
21 return (type) __a; \ 22 return (type) __a; \
22 errno = -__a; \ 23 errno = -__a; \
@@ -33,7 +34,8 @@ type name(type1 arg1) \
33 ".endif\n\t" \ 34 ".endif\n\t" \
34 "break 13" \ 35 "break 13" \
35 : "=r" (__a) \ 36 : "=r" (__a) \
36 : "r" (__n_), "0" (__a)); \ 37 : "r" (__n_), "0" (__a) \
38 : "memory"); \
37 if (__a >= 0) \ 39 if (__a >= 0) \
38 return (type) __a; \ 40 return (type) __a; \
39 errno = -__a; \ 41 errno = -__a; \
@@ -51,7 +53,8 @@ type name(type1 arg1,type2 arg2) \
51 ".endif\n\t" \ 53 ".endif\n\t" \
52 "break 13" \ 54 "break 13" \
53 : "=r" (__a) \ 55 : "=r" (__a) \
54 : "r" (__n_), "0" (__a), "r" (__b)); \ 56 : "r" (__n_), "0" (__a), "r" (__b) \
57 : "memory"); \
55 if (__a >= 0) \ 58 if (__a >= 0) \
56 return (type) __a; \ 59 return (type) __a; \
57 errno = -__a; \ 60 errno = -__a; \
@@ -70,7 +73,8 @@ type name(type1 arg1,type2 arg2,type3 arg3) \
70 ".endif\n\t" \ 73 ".endif\n\t" \
71 "break 13" \ 74 "break 13" \
72 : "=r" (__a) \ 75 : "=r" (__a) \
73 : "r" (__n_), "0" (__a), "r" (__b), "r" (__c)); \ 76 : "r" (__n_), "0" (__a), "r" (__b), "r" (__c) \
77 : "memory"); \
74 if (__a >= 0) \ 78 if (__a >= 0) \
75 return (type) __a; \ 79 return (type) __a; \
76 errno = -__a; \ 80 errno = -__a; \
@@ -91,7 +95,8 @@ type name (type1 arg1, type2 arg2, type3 arg3, type4 arg4) \
91 "break 13" \ 95 "break 13" \
92 : "=r" (__a) \ 96 : "=r" (__a) \
93 : "r" (__n_), "0" (__a), "r" (__b), \ 97 : "r" (__n_), "0" (__a), "r" (__b), \
94 "r" (__c), "r" (__d)); \ 98 "r" (__c), "r" (__d)\
99 : "memory"); \
95 if (__a >= 0) \ 100 if (__a >= 0) \
96 return (type) __a; \ 101 return (type) __a; \
97 errno = -__a; \ 102 errno = -__a; \
@@ -114,7 +119,8 @@ type name (type1 arg1,type2 arg2,type3 arg3,type4 arg4,type5 arg5) \
114 "break 13" \ 119 "break 13" \
115 : "=r" (__a) \ 120 : "=r" (__a) \
116 : "r" (__n_), "0" (__a), "r" (__b), \ 121 : "r" (__n_), "0" (__a), "r" (__b), \
117 "r" (__c), "r" (__d), "h" (__e)); \ 122 "r" (__c), "r" (__d), "h" (__e) \
123 : "memory"); \
118 if (__a >= 0) \ 124 if (__a >= 0) \
119 return (type) __a; \ 125 return (type) __a; \
120 errno = -__a; \ 126 errno = -__a; \
@@ -138,7 +144,8 @@ type name (type1 arg1,type2 arg2,type3 arg3,type4 arg4,type5 arg5,type6 arg6) \
138 "break 13" \ 144 "break 13" \
139 : "=r" (__a) \ 145 : "=r" (__a) \
140 : "r" (__n_), "0" (__a), "r" (__b), \ 146 : "r" (__n_), "0" (__a), "r" (__b), \
141 "r" (__c), "r" (__d), "h" (__e), "x" (__f)); \ 147 "r" (__c), "r" (__d), "h" (__e), "x" (__f) \
148 : "memory"); \
142 if (__a >= 0) \ 149 if (__a >= 0) \
143 return (type) __a; \ 150 return (type) __a; \
144 errno = -__a; \ 151 errno = -__a; \
diff --git a/include/asm-cris/atomic.h b/include/asm-cris/atomic.h
index 2949a945876a..5fc87768774a 100644
--- a/include/asm-cris/atomic.h
+++ b/include/asm-cris/atomic.h
@@ -91,7 +91,7 @@ static inline int atomic_inc_return(volatile atomic_t *v)
91 unsigned long flags; 91 unsigned long flags;
92 int retval; 92 int retval;
93 cris_atomic_save(v, flags); 93 cris_atomic_save(v, flags);
94 retval = (v->counter)++; 94 retval = ++(v->counter);
95 cris_atomic_restore(v, flags); 95 cris_atomic_restore(v, flags);
96 return retval; 96 return retval;
97} 97}
@@ -101,7 +101,7 @@ static inline int atomic_dec_return(volatile atomic_t *v)
101 unsigned long flags; 101 unsigned long flags;
102 int retval; 102 int retval;
103 cris_atomic_save(v, flags); 103 cris_atomic_save(v, flags);
104 retval = (v->counter)--; 104 retval = --(v->counter);
105 cris_atomic_restore(v, flags); 105 cris_atomic_restore(v, flags);
106 return retval; 106 return retval;
107} 107}
diff --git a/include/asm-cris/axisflashmap.h b/include/asm-cris/axisflashmap.h
index 7a8d3114e682..015ca5445ddd 100644
--- a/include/asm-cris/axisflashmap.h
+++ b/include/asm-cris/axisflashmap.h
@@ -10,23 +10,23 @@
10 */ 10 */
11 11
12#define PARTITION_TABLE_OFFSET 10 12#define PARTITION_TABLE_OFFSET 10
13#define PARTITION_TABLE_MAGIC 0xbeef /* Not a good magic */ 13#define PARTITION_TABLE_MAGIC 0xbeef /* Not a good magic */
14 14
15/* The partitiontable_head is located at offset +10: */ 15/* The partitiontable_head is located at offset +10: */
16struct partitiontable_head { 16struct partitiontable_head {
17 __u16 magic; /* PARTITION_TABLE_MAGIC */ 17 __u16 magic; /* PARTITION_TABLE_MAGIC */
18 __u16 size; /* Length of ptable block (not header) */ 18 __u16 size; /* Length of ptable block (entries + end marker) */
19 __u32 checksum; /* simple longword sum */ 19 __u32 checksum; /* simple longword sum, over entries + end marker */
20}; 20};
21 21
22/* And followed by partition table entries */ 22/* And followed by partition table entries */
23struct partitiontable_entry { 23struct partitiontable_entry {
24 __u32 offset; /* Offset is relative to the sector the ptable is in */ 24 __u32 offset; /* relative to the sector the ptable is in */
25 __u32 size; 25 __u32 size; /* in bytes */
26 __u32 checksum; /* simple longword sum */ 26 __u32 checksum; /* simple longword sum */
27 __u16 type; 27 __u16 type; /* see type codes below */
28 __u16 flags; /* bit 0: ro/rw = 1/0 */ 28 __u16 flags; /* bit 0: ro/rw = 1/0 */
29 __u32 future0; /* 16 bytes reserved for future use */ 29 __u32 future0; /* 16 bytes reserved for future use */
30 __u32 future1; 30 __u32 future1;
31 __u32 future2; 31 __u32 future2;
32 __u32 future3; 32 __u32 future3;
@@ -35,12 +35,27 @@ struct partitiontable_entry {
35#define PARTITIONTABLE_END_MARKER 0xFFFFFFFF 35#define PARTITIONTABLE_END_MARKER 0xFFFFFFFF
36#define PARTITIONTABLE_END_MARKER_SIZE 4 36#define PARTITIONTABLE_END_MARKER_SIZE 4
37 37
38/*#define PARTITION_TYPE_RESCUE 0x0000?*/ /* Not used, maybe it should? */ 38#define PARTITIONTABLE_END_PAD 10
39
40/* Complete structure for whole partition table */
41/* note that table may end before CONFIG_ETRAX_PTABLE_ENTRIES by setting
42 * offset of the last entry + 1 to PARTITIONTABLE_END_MARKER.
43 */
44struct partitiontable {
45 __u8 skip[PARTITION_TABLE_OFFSET];
46 struct partitiontable_head head;
47 struct partitiontable_entry entries[];
48};
49
39#define PARTITION_TYPE_PARAM 0x0001 50#define PARTITION_TYPE_PARAM 0x0001
40#define PARTITION_TYPE_KERNEL 0x0002 51#define PARTITION_TYPE_KERNEL 0x0002
41#define PARTITION_TYPE_JFFS 0x0003 52#define PARTITION_TYPE_JFFS 0x0003
53#define PARTITION_TYPE_JFFS2 0x0000
54
55#define PARTITION_FLAGS_READONLY_MASK 0x0001
56#define PARTITION_FLAGS_READONLY 0x0001
42 57
43/* The master mtd for the entire flash. */ 58/* The master mtd for the entire flash. */
44extern struct mtd_info* axisflash_mtd; 59extern struct mtd_info *axisflash_mtd;
45 60
46#endif 61#endif
diff --git a/include/asm-cris/bug.h b/include/asm-cris/bug.h
index 8dd6b23c15d6..fee12d4ae683 100644
--- a/include/asm-cris/bug.h
+++ b/include/asm-cris/bug.h
@@ -1,4 +1,4 @@
1#ifndef _CRIS_BUG_H 1#ifndef _CRIS_BUG_H
2#define _CRIS_BUG_H 2#define _CRIS_BUG_H
3#include <asm-generic/bug.h> 3#include <asm/arch/bug.h>
4#endif 4#endif
diff --git a/include/asm-cris/delay.h b/include/asm-cris/delay.h
index d3a397803719..123e19aef49d 100644
--- a/include/asm-cris/delay.h
+++ b/include/asm-cris/delay.h
@@ -13,10 +13,13 @@
13 13
14extern unsigned long loops_per_usec; /* arch/cris/mm/init.c */ 14extern unsigned long loops_per_usec; /* arch/cris/mm/init.c */
15 15
16/* May be defined by arch/delay.h. */
17#ifndef udelay
16static inline void udelay(unsigned long usecs) 18static inline void udelay(unsigned long usecs)
17{ 19{
18 __delay(usecs * loops_per_usec); 20 __delay(usecs * loops_per_usec);
19} 21}
22#endif
20 23
21#endif /* defined(_CRIS_DELAY_H) */ 24#endif /* defined(_CRIS_DELAY_H) */
22 25
diff --git a/include/asm-cris/dma-mapping.h b/include/asm-cris/dma-mapping.h
index 662cea70152d..edc8d1bfaae2 100644
--- a/include/asm-cris/dma-mapping.h
+++ b/include/asm-cris/dma-mapping.h
@@ -164,16 +164,5 @@ dma_cache_sync(struct device *dev, void *vaddr, size_t size,
164{ 164{
165} 165}
166 166
167#define ARCH_HAS_DMA_DECLARE_COHERENT_MEMORY
168extern int
169dma_declare_coherent_memory(struct device *dev, dma_addr_t bus_addr,
170 dma_addr_t device_addr, size_t size, int flags);
171
172extern void
173dma_release_declared_memory(struct device *dev);
174
175extern void *
176dma_mark_declared_memory_occupied(struct device *dev,
177 dma_addr_t device_addr, size_t size);
178 167
179#endif 168#endif
diff --git a/include/asm-cris/etraxgpio.h b/include/asm-cris/etraxgpio.h
index 5d0028dba7c6..38f1c8e1770c 100644
--- a/include/asm-cris/etraxgpio.h
+++ b/include/asm-cris/etraxgpio.h
@@ -1,25 +1,34 @@
1/* $Id: etraxgpio.h,v 1.8 2002/06/17 15:53:07 johana Exp $ */
2/* 1/*
3 * The following devices are accessable using this driver using 2 * The following devices are accessable using this driver using
4 * GPIO_MAJOR (120) and a couple of minor numbers: 3 * GPIO_MAJOR (120) and a couple of minor numbers.
5 * For ETRAX 100LX (ARCH_V10): 4 *
5 * For ETRAX 100LX (CONFIG_ETRAX_ARCH_V10):
6 * /dev/gpioa minor 0, 8 bit GPIO, each bit can change direction 6 * /dev/gpioa minor 0, 8 bit GPIO, each bit can change direction
7 * /dev/gpiob minor 1, 8 bit GPIO, each bit can change direction 7 * /dev/gpiob minor 1, 8 bit GPIO, each bit can change direction
8 * /dev/leds minor 2, Access to leds depending on kernelconfig 8 * /dev/leds minor 2, Access to leds depending on kernelconfig
9 * /dev/gpiog minor 3 9 * /dev/gpiog minor 3
10 g0dir, g8_15dir, g16_23dir, g24 dir configurable in R_GEN_CONFIG 10 * g0dir, g8_15dir, g16_23dir, g24 dir configurable in R_GEN_CONFIG
11 g1-g7 and g25-g31 is both input and outputs but on different pins 11 * g1-g7 and g25-g31 is both input and outputs but on different pins
12 Also note that some bits change pins depending on what interfaces 12 * Also note that some bits change pins depending on what interfaces
13 are enabled. 13 * are enabled.
14 * 14 *
15 * For ETRAX FS (CONFIG_ETRAXFS):
16 * /dev/gpioa minor 0, 8 bit GPIO, each bit can change direction
17 * /dev/gpiob minor 1, 18 bit GPIO, each bit can change direction
18 * /dev/gpioc minor 3, 18 bit GPIO, each bit can change direction
19 * /dev/gpiod minor 4, 18 bit GPIO, each bit can change direction
20 * /dev/gpioe minor 5, 18 bit GPIO, each bit can change direction
21 * /dev/leds minor 2, Access to leds depending on kernelconfig
15 * 22 *
16 * For ETRAX FS (ARCH_V32): 23 * For ARTPEC-3 (CONFIG_CRIS_MACH_ARTPEC3):
17 * /dev/gpioa minor 0, 8 bit GPIO, each bit can change direction 24 * /dev/gpioa minor 0, 8 bit GPIO, each bit can change direction
18 * /dev/gpiob minor 1, 18 bit GPIO, each bit can change direction 25 * /dev/gpiob minor 1, 18 bit GPIO, each bit can change direction
19 * /dev/gpioc minor 2, 18 bit GPIO, each bit can change direction 26 * /dev/gpioc minor 3, 18 bit GPIO, each bit can change direction
20 * /dev/gpiod minor 3, 18 bit GPIO, each bit can change direction 27 * /dev/gpiod minor 4, 18 bit GPIO, each bit can change direction
21 * /dev/gpioe minor 4, 18 bit GPIO, each bit can change direction 28 * /dev/leds minor 2, Access to leds depending on kernelconfig
22 * /dev/leds minor 5, Access to leds depending on kernelconfig 29 * /dev/pwm0 minor 16, PWM channel 0 on PA30
30 * /dev/pwm1 minor 17, PWM channel 1 on PA31
31 * /dev/pwm2 minor 18, PWM channel 2 on PB26
23 * 32 *
24 */ 33 */
25#ifndef _ASM_ETRAXGPIO_H 34#ifndef _ASM_ETRAXGPIO_H
@@ -34,7 +43,8 @@
34#define GPIO_MINOR_G 3 43#define GPIO_MINOR_G 3
35#define GPIO_MINOR_LAST 3 44#define GPIO_MINOR_LAST 3
36#endif 45#endif
37#ifdef CONFIG_ETRAX_ARCH_V32 46
47#ifdef CONFIG_ETRAXFS
38#define ETRAXGPIO_IOCTYPE 43 48#define ETRAXGPIO_IOCTYPE 43
39#define GPIO_MINOR_A 0 49#define GPIO_MINOR_A 0
40#define GPIO_MINOR_B 1 50#define GPIO_MINOR_B 1
@@ -42,8 +52,32 @@
42#define GPIO_MINOR_C 3 52#define GPIO_MINOR_C 3
43#define GPIO_MINOR_D 4 53#define GPIO_MINOR_D 4
44#define GPIO_MINOR_E 5 54#define GPIO_MINOR_E 5
55#ifdef CONFIG_ETRAX_VIRTUAL_GPIO
56#define GPIO_MINOR_V 6
57#define GPIO_MINOR_LAST 6
58#else
45#define GPIO_MINOR_LAST 5 59#define GPIO_MINOR_LAST 5
46#endif 60#endif
61#endif
62
63#ifdef CONFIG_CRIS_MACH_ARTPEC3
64#define ETRAXGPIO_IOCTYPE 43
65#define GPIO_MINOR_A 0
66#define GPIO_MINOR_B 1
67#define GPIO_MINOR_LEDS 2
68#define GPIO_MINOR_C 3
69#define GPIO_MINOR_D 4
70#ifdef CONFIG_ETRAX_VIRTUAL_GPIO
71#define GPIO_MINOR_V 6
72#define GPIO_MINOR_LAST 6
73#else
74#define GPIO_MINOR_LAST 4
75#endif
76#define GPIO_MINOR_PWM0 16
77#define GPIO_MINOR_PWM1 17
78#define GPIO_MINOR_PWM2 18
79#define GPIO_MINOR_LAST_PWM GPIO_MINOR_PWM2
80#endif
47 81
48/* supported ioctl _IOC_NR's */ 82/* supported ioctl _IOC_NR's */
49 83
@@ -63,7 +97,7 @@
63 97
64/* GPIO direction ioctl's */ 98/* GPIO direction ioctl's */
65#define IO_READDIR 0x8 /* Read direction 0=input 1=output (obsolete) */ 99#define IO_READDIR 0x8 /* Read direction 0=input 1=output (obsolete) */
66#define IO_SETINPUT 0x9 /* Set direction for bits set, 0=unchanged 1=input, 100#define IO_SETINPUT 0x9 /* Set direction for bits set, 0=unchanged 1=input,
67 returns mask with current inputs (obsolete) */ 101 returns mask with current inputs (obsolete) */
68#define IO_SETOUTPUT 0xA /* Set direction for bits set, 0=unchanged 1=output, 102#define IO_SETOUTPUT 0xA /* Set direction for bits set, 0=unchanged 1=output,
69 returns mask with current outputs (obsolete)*/ 103 returns mask with current outputs (obsolete)*/
@@ -77,13 +111,13 @@
77#define IO_GET_PWR_BT 0xE 111#define IO_GET_PWR_BT 0xE
78 112
79/* Bit toggling in driver settings */ 113/* Bit toggling in driver settings */
80/* bit set in low byte0 is CLK mask (0x00FF), 114/* bit set in low byte0 is CLK mask (0x00FF),
81 bit set in byte1 is DATA mask (0xFF00) 115 bit set in byte1 is DATA mask (0xFF00)
82 msb, data_mask[7:0] , clk_mask[7:0] 116 msb, data_mask[7:0] , clk_mask[7:0]
83 */ 117 */
84#define IO_CFG_WRITE_MODE 0xF 118#define IO_CFG_WRITE_MODE 0xF
85#define IO_CFG_WRITE_MODE_VALUE(msb, data_mask, clk_mask) \ 119#define IO_CFG_WRITE_MODE_VALUE(msb, data_mask, clk_mask) \
86 ( (((msb)&1) << 16) | (((data_mask) &0xFF) << 8) | ((clk_mask) & 0xFF) ) 120 ( (((msb)&1) << 16) | (((data_mask) &0xFF) << 8) | ((clk_mask) & 0xFF) )
87 121
88/* The following 4 ioctl's take a pointer as argument and handles 122/* The following 4 ioctl's take a pointer as argument and handles
89 * 32 bit ports (port G) properly. 123 * 32 bit ports (port G) properly.
@@ -98,6 +132,48 @@
98 * *arg updated with current output pins. 132 * *arg updated with current output pins.
99 */ 133 */
100 134
135/* The following ioctl's are applicable to the PWM channels only */
136
137#define IO_PWM_SET_MODE 0x20
138
139enum io_pwm_mode {
140 PWM_OFF = 0, /* disabled, deallocated */
141 PWM_STANDARD = 1, /* 390 kHz, duty cycle 0..255/256 */
142 PWM_FAST = 2, /* variable freq, w/ 10ns active pulse len */
143 PWM_VARFREQ = 3 /* individually configurable high/low periods */
144};
145
146struct io_pwm_set_mode {
147 enum io_pwm_mode mode;
148};
149
150/* Only for mode PWM_VARFREQ. Period lo/high set in increments of 10ns
151 * from 10ns (value = 0) to 81920ns (value = 8191)
152 * (Resulting frequencies range from 50 MHz (10ns + 10ns) down to
153 * 6.1 kHz (81920ns + 81920ns) at 50% duty cycle, to 12.2 kHz at min/max duty
154 * cycle (81920 + 10ns or 10ns + 81920ns, respectively).)
155 */
156#define IO_PWM_SET_PERIOD 0x21
157
158struct io_pwm_set_period {
159 unsigned int lo; /* 0..8191 */
160 unsigned int hi; /* 0..8191 */
161};
162
163/* Only for modes PWM_STANDARD and PWM_FAST.
164 * For PWM_STANDARD, set duty cycle of 390 kHz PWM output signal, from
165 * 0 (value = 0) to 255/256 (value = 255).
166 * For PWM_FAST, set duty cycle of PWM output signal from
167 * 0% (value = 0) to 100% (value = 255). Output signal in this mode
168 * is a 10ns pulse surrounded by a high or low level depending on duty
169 * cycle (except for 0% and 100% which result in a constant output).
170 * Resulting output frequency varies from 50 MHz at 50% duty cycle,
171 * down to 390 kHz at min/max duty cycle.
172 */
173#define IO_PWM_SET_DUTY 0x22
101 174
175struct io_pwm_set_duty {
176 int duty; /* 0..255 */
177};
102 178
103#endif 179#endif
diff --git a/include/asm-cris/io.h b/include/asm-cris/io.h
index d196dd6b2df3..b87ce63f531f 100644
--- a/include/asm-cris/io.h
+++ b/include/asm-cris/io.h
@@ -122,8 +122,8 @@ static inline void writel(unsigned int b, volatile void __iomem *addr)
122#define memcpy_toio(a,b,c) memcpy((void *)(a),(b),(c)) 122#define memcpy_toio(a,b,c) memcpy((void *)(a),(b),(c))
123 123
124 124
125/* The following is junk needed for the arch-independent code but which 125/* I/O port access. Normally there is no I/O space on CRIS but when
126 * we never use in the CRIS port 126 * Cardbus/PCI is enabled the request is passed through the bridge.
127 */ 127 */
128 128
129#define IO_SPACE_LIMIT 0xffff 129#define IO_SPACE_LIMIT 0xffff
diff --git a/include/asm-cris/page.h b/include/asm-cris/page.h
index 3b0156c46311..c45bb1ef397c 100644
--- a/include/asm-cris/page.h
+++ b/include/asm-cris/page.h
@@ -26,6 +26,7 @@
26typedef struct { unsigned long pte; } pte_t; 26typedef struct { unsigned long pte; } pte_t;
27typedef struct { unsigned long pgd; } pgd_t; 27typedef struct { unsigned long pgd; } pgd_t;
28typedef struct { unsigned long pgprot; } pgprot_t; 28typedef struct { unsigned long pgprot; } pgprot_t;
29typedef struct page *pgtable_t;
29#endif 30#endif
30 31
31#define pte_val(x) ((x).pte) 32#define pte_val(x) ((x).pte)
diff --git a/include/asm-cris/param.h b/include/asm-cris/param.h
index b24972639832..0e47994e40be 100644
--- a/include/asm-cris/param.h
+++ b/include/asm-cris/param.h
@@ -3,7 +3,7 @@
3 3
4/* Currently we assume that HZ=100 is good for CRIS. */ 4/* Currently we assume that HZ=100 is good for CRIS. */
5#ifdef __KERNEL__ 5#ifdef __KERNEL__
6# define HZ 100 /* Internal kernel timer frequency */ 6# define HZ CONFIG_HZ /* Internal kernel timer frequency */
7# define USER_HZ 100 /* .. some user interfaces are in "ticks" */ 7# define USER_HZ 100 /* .. some user interfaces are in "ticks" */
8# define CLOCKS_PER_SEC (USER_HZ) /* like times() */ 8# define CLOCKS_PER_SEC (USER_HZ) /* like times() */
9#endif 9#endif
diff --git a/include/asm-cris/pgalloc.h b/include/asm-cris/pgalloc.h
index 8ddd66f81773..a1ba761d0573 100644
--- a/include/asm-cris/pgalloc.h
+++ b/include/asm-cris/pgalloc.h
@@ -6,6 +6,7 @@
6 6
7#define pmd_populate_kernel(mm, pmd, pte) pmd_set(pmd, pte) 7#define pmd_populate_kernel(mm, pmd, pte) pmd_set(pmd, pte)
8#define pmd_populate(mm, pmd, pte) pmd_set(pmd, page_address(pte)) 8#define pmd_populate(mm, pmd, pte) pmd_set(pmd, page_address(pte))
9#define pmd_pgtable(pmd) pmd_page(pmd)
9 10
10/* 11/*
11 * Allocate and free page tables. 12 * Allocate and free page tables.
@@ -27,10 +28,11 @@ static inline pte_t *pte_alloc_one_kernel(struct mm_struct *mm, unsigned long ad
27 return pte; 28 return pte;
28} 29}
29 30
30static inline struct page *pte_alloc_one(struct mm_struct *mm, unsigned long address) 31static inline pgtable_t pte_alloc_one(struct mm_struct *mm, unsigned long address)
31{ 32{
32 struct page *pte; 33 struct page *pte;
33 pte = alloc_pages(GFP_KERNEL|__GFP_REPEAT|__GFP_ZERO, 0); 34 pte = alloc_pages(GFP_KERNEL|__GFP_REPEAT|__GFP_ZERO, 0);
35 pgtable_page_ctor(pte);
34 return pte; 36 return pte;
35} 37}
36 38
@@ -39,13 +41,17 @@ static inline void pte_free_kernel(struct mm_struct *mm, pte_t *pte)
39 free_page((unsigned long)pte); 41 free_page((unsigned long)pte);
40} 42}
41 43
42static inline void pte_free(struct mm_struct *mm, struct page *pte) 44static inline void pte_free(struct mm_struct *mm, pgtable_t pte)
43{ 45{
46 pgtable_page_dtor(pte);
44 __free_page(pte); 47 __free_page(pte);
45} 48}
46 49
47 50#define __pte_free_tlb(tlb,pte) \
48#define __pte_free_tlb(tlb,pte) tlb_remove_page((tlb),(pte)) 51do { \
52 pgtable_page_dtor(pte); \
53 tlb_remove_page((tlb), pte); \
54} while (0)
49 55
50#define check_pgt_cache() do { } while (0) 56#define check_pgt_cache() do { } while (0)
51 57
diff --git a/include/asm-cris/pgtable.h b/include/asm-cris/pgtable.h
index 417f71116215..a2607575681b 100644
--- a/include/asm-cris/pgtable.h
+++ b/include/asm-cris/pgtable.h
@@ -249,7 +249,7 @@ static inline pgd_t * pgd_offset(struct mm_struct * mm, unsigned long address)
249#define pte_unmap(pte) do { } while (0) 249#define pte_unmap(pte) do { } while (0)
250#define pte_unmap_nested(pte) do { } while (0) 250#define pte_unmap_nested(pte) do { } while (0)
251#define pte_pfn(x) ((unsigned long)(__va((x).pte)) >> PAGE_SHIFT) 251#define pte_pfn(x) ((unsigned long)(__va((x).pte)) >> PAGE_SHIFT)
252#define pfn_pte(pfn, prot) __pte((__pa((pfn) << PAGE_SHIFT)) | pgprot_val(prot)) 252#define pfn_pte(pfn, prot) __pte(((pfn) << PAGE_SHIFT) | pgprot_val(prot))
253 253
254#define pte_ERROR(e) \ 254#define pte_ERROR(e) \
255 printk("%s:%d: bad pte %p(%08lx).\n", __FILE__, __LINE__, &(e), pte_val(e)) 255 printk("%s:%d: bad pte %p(%08lx).\n", __FILE__, __LINE__, &(e), pte_val(e))
diff --git a/include/asm-cris/posix_types.h b/include/asm-cris/posix_types.h
index 3a5e4c43eae7..ce3fb25a460b 100644
--- a/include/asm-cris/posix_types.h
+++ b/include/asm-cris/posix_types.h
@@ -44,11 +44,7 @@ typedef long long __kernel_loff_t;
44#endif 44#endif
45 45
46typedef struct { 46typedef struct {
47#if defined(__KERNEL__) || defined(__USE_ALL)
48 int val[2]; 47 int val[2];
49#else /* !defined(__KERNEL__) && !defined(__USE_ALL) */
50 int __val[2];
51#endif /* !defined(__KERNEL__) && !defined(__USE_ALL) */
52} __kernel_fsid_t; 48} __kernel_fsid_t;
53 49
54#ifdef __KERNEL__ 50#ifdef __KERNEL__
diff --git a/include/asm-cris/processor.h b/include/asm-cris/processor.h
index 568da1deceb9..cdc0c1dce6be 100644
--- a/include/asm-cris/processor.h
+++ b/include/asm-cris/processor.h
@@ -17,6 +17,9 @@
17 17
18struct task_struct; 18struct task_struct;
19 19
20#define STACK_TOP TASK_SIZE
21#define STACK_TOP_MAX STACK_TOP
22
20/* This decides where the kernel will search for a free chunk of vm 23/* This decides where the kernel will search for a free chunk of vm
21 * space during mmap's. 24 * space during mmap's.
22 */ 25 */
diff --git a/include/asm-cris/rtc.h b/include/asm-cris/rtc.h
index cb4bf9217fee..17d3019529e1 100644
--- a/include/asm-cris/rtc.h
+++ b/include/asm-cris/rtc.h
@@ -1,10 +1,7 @@
1/* $Id: rtc.h,v 1.7 2002/11/04 07:32:09 starvik Exp $ */
2 1
3#ifndef __RTC_H__ 2#ifndef __RTC_H__
4#define __RTC_H__ 3#define __RTC_H__
5 4
6
7
8#ifdef CONFIG_ETRAX_DS1302 5#ifdef CONFIG_ETRAX_DS1302
9 /* Dallas DS1302 clock/calendar register numbers. */ 6 /* Dallas DS1302 clock/calendar register numbers. */
10# define RTC_SECONDS 0 7# define RTC_SECONDS 0
@@ -17,17 +14,17 @@
17# define RTC_CONTROL 7 14# define RTC_CONTROL 7
18 15
19 /* Bits in CONTROL register. */ 16 /* Bits in CONTROL register. */
20# define RTC_CONTROL_WRITEPROTECT 0x80 17# define RTC_CONTROL_WRITEPROTECT 0x80
21# define RTC_TRICKLECHARGER 8 18# define RTC_TRICKLECHARGER 8
22 19
23 /* Bits in TRICKLECHARGER register TCS TCS TCS TCS DS DS RS RS. */ 20 /* Bits in TRICKLECHARGER register TCS TCS TCS TCS DS DS RS RS. */
24# define RTC_TCR_PATTERN 0xA0 /* 1010xxxx */ 21# define RTC_TCR_PATTERN 0xA0 /* 1010xxxx */
25# define RTC_TCR_1DIOD 0x04 /* xxxx01xx */ 22# define RTC_TCR_1DIOD 0x04 /* xxxx01xx */
26# define RTC_TCR_2DIOD 0x08 /* xxxx10xx */ 23# define RTC_TCR_2DIOD 0x08 /* xxxx10xx */
27# define RTC_TCR_DISABLED 0x00 /* xxxxxx00 Disabled */ 24# define RTC_TCR_DISABLED 0x00 /* xxxxxx00 Disabled */
28# define RTC_TCR_2KOHM 0x01 /* xxxxxx01 2KOhm */ 25# define RTC_TCR_2KOHM 0x01 /* xxxxxx01 2KOhm */
29# define RTC_TCR_4KOHM 0x02 /* xxxxxx10 4kOhm */ 26# define RTC_TCR_4KOHM 0x02 /* xxxxxx10 4kOhm */
30# define RTC_TCR_8KOHM 0x03 /* xxxxxx11 8kOhm */ 27# define RTC_TCR_8KOHM 0x03 /* xxxxxx11 8kOhm */
31 28
32#elif defined(CONFIG_ETRAX_PCF8563) 29#elif defined(CONFIG_ETRAX_PCF8563)
33 /* I2C bus slave registers. */ 30 /* I2C bus slave registers. */
@@ -79,7 +76,7 @@ extern int pcf8563_init(void);
79 76
80/* 77/*
81 * The struct used to pass data via the following ioctl. Similar to the 78 * The struct used to pass data via the following ioctl. Similar to the
82 * struct tm in <time.h>, but it needs to be here so that the kernel 79 * struct tm in <time.h>, but it needs to be here so that the kernel
83 * source is self contained, allowing cross-compiles, etc. etc. 80 * source is self contained, allowing cross-compiles, etc. etc.
84 */ 81 */
85struct rtc_time { 82struct rtc_time {
@@ -96,11 +93,15 @@ struct rtc_time {
96 93
97/* ioctl() calls that are permitted to the /dev/rtc interface. */ 94/* ioctl() calls that are permitted to the /dev/rtc interface. */
98#define RTC_MAGIC 'p' 95#define RTC_MAGIC 'p'
99#define RTC_RD_TIME _IOR(RTC_MAGIC, 0x09, struct rtc_time) /* Read RTC time. */ 96/* Read RTC time. */
100#define RTC_SET_TIME _IOW(RTC_MAGIC, 0x0a, struct rtc_time) /* Set RTC time. */ 97#define RTC_RD_TIME _IOR(RTC_MAGIC, 0x09, struct rtc_time)
101#define RTC_SET_CHARGE _IOW(RTC_MAGIC, 0x0b, int) 98/* Set RTC time. */
102#define RTC_VLOW_RD _IOR(RTC_MAGIC, 0x11, int) /* Voltage Low detector */ 99#define RTC_SET_TIME _IOW(RTC_MAGIC, 0x0a, struct rtc_time)
103#define RTC_VLOW_SET _IO(RTC_MAGIC, 0x12) /* Clear voltage low information */ 100#define RTC_SET_CHARGE _IOW(RTC_MAGIC, 0x0b, int)
104#define RTC_MAX_IOCTL 0x12 101/* Voltage low detector */
102#define RTC_VL_READ _IOR(RTC_MAGIC, 0x13, int)
103/* Clear voltage low information */
104#define RTC_VL_CLR _IO(RTC_MAGIC, 0x14)
105#define RTC_MAX_IOCTL 0x14
105 106
106#endif /* __RTC_H__ */ 107#endif /* __RTC_H__ */
diff --git a/include/asm-cris/smp.h b/include/asm-cris/smp.h
index dca5ef1d8c97..dba33aba3e95 100644
--- a/include/asm-cris/smp.h
+++ b/include/asm-cris/smp.h
@@ -4,8 +4,8 @@
4#include <linux/cpumask.h> 4#include <linux/cpumask.h>
5 5
6extern cpumask_t phys_cpu_present_map; 6extern cpumask_t phys_cpu_present_map;
7#define cpu_possible_map phys_cpu_present_map 7extern cpumask_t cpu_possible_map;
8 8
9#define __smp_processor_id() (current_thread_info()->cpu) 9#define raw_smp_processor_id() (current_thread_info()->cpu)
10 10
11#endif 11#endif
diff --git a/include/asm-cris/sync_serial.h b/include/asm-cris/sync_serial.h
index f930b6e00663..d87c24df2b38 100644
--- a/include/asm-cris/sync_serial.h
+++ b/include/asm-cris/sync_serial.h
@@ -67,6 +67,7 @@
67/* Values for SSP_FRAME_SYNC */ 67/* Values for SSP_FRAME_SYNC */
68#define NORMAL_SYNC 1 68#define NORMAL_SYNC 1
69#define EARLY_SYNC 2 69#define EARLY_SYNC 2
70#define SECOND_WORD_SYNC 0x40000
70 71
71#define BIT_SYNC 4 72#define BIT_SYNC 4
72#define WORD_SYNC 8 73#define WORD_SYNC 8
diff --git a/include/asm-cris/unistd.h b/include/asm-cris/unistd.h
index bd57a7949170..007cb16a6b5b 100644
--- a/include/asm-cris/unistd.h
+++ b/include/asm-cris/unistd.h
@@ -326,9 +326,11 @@
326#define __NR_epoll_pwait 319 326#define __NR_epoll_pwait 319
327#define __NR_utimensat 320 327#define __NR_utimensat 320
328#define __NR_signalfd 321 328#define __NR_signalfd 321
329#define __NR_timerfd 322 329#define __NR_timerfd_create 322
330#define __NR_eventfd 323 330#define __NR_eventfd 323
331#define __NR_fallocate 324 331#define __NR_fallocate 324
332#define __NR_timerfd_settime 315
333#define __NR_timerfd_gettime 316
332 334
333#ifdef __KERNEL__ 335#ifdef __KERNEL__
334 336
diff --git a/include/asm-frv/a.out.h b/include/asm-frv/a.out.h
deleted file mode 100644
index dd3b7e5754c9..000000000000
--- a/include/asm-frv/a.out.h
+++ /dev/null
@@ -1,5 +0,0 @@
1/*
2 * FRV doesn't do AOUT format. This header file should be removed as
3 * soon as fs/exec.c and fs/proc/kcore.c and the archs that require
4 * them to include linux/a.out.h are fixed.
5 */
diff --git a/include/asm-frv/atomic.h b/include/asm-frv/atomic.h
index 6ec494a5bc5a..46d696b331e7 100644
--- a/include/asm-frv/atomic.h
+++ b/include/asm-frv/atomic.h
@@ -125,87 +125,6 @@ static inline void atomic_dec(atomic_t *v)
125#define atomic_dec_and_test(v) (atomic_sub_return(1, (v)) == 0) 125#define atomic_dec_and_test(v) (atomic_sub_return(1, (v)) == 0)
126#define atomic_inc_and_test(v) (atomic_add_return(1, (v)) == 0) 126#define atomic_inc_and_test(v) (atomic_add_return(1, (v)) == 0)
127 127
128#ifndef CONFIG_FRV_OUTOFLINE_ATOMIC_OPS
129static inline
130unsigned long atomic_test_and_ANDNOT_mask(unsigned long mask, volatile unsigned long *v)
131{
132 unsigned long old, tmp;
133
134 asm volatile(
135 "0: \n"
136 " orcc gr0,gr0,gr0,icc3 \n" /* set ICC3.Z */
137 " ckeq icc3,cc7 \n"
138 " ld.p %M0,%1 \n" /* LD.P/ORCR are atomic */
139 " orcr cc7,cc7,cc3 \n" /* set CC3 to true */
140 " and%I3 %1,%3,%2 \n"
141 " cst.p %2,%M0 ,cc3,#1 \n" /* if store happens... */
142 " corcc gr29,gr29,gr0 ,cc3,#1 \n" /* ... clear ICC3.Z */
143 " beq icc3,#0,0b \n"
144 : "+U"(*v), "=&r"(old), "=r"(tmp)
145 : "NPr"(~mask)
146 : "memory", "cc7", "cc3", "icc3"
147 );
148
149 return old;
150}
151
152static inline
153unsigned long atomic_test_and_OR_mask(unsigned long mask, volatile unsigned long *v)
154{
155 unsigned long old, tmp;
156
157 asm volatile(
158 "0: \n"
159 " orcc gr0,gr0,gr0,icc3 \n" /* set ICC3.Z */
160 " ckeq icc3,cc7 \n"
161 " ld.p %M0,%1 \n" /* LD.P/ORCR are atomic */
162 " orcr cc7,cc7,cc3 \n" /* set CC3 to true */
163 " or%I3 %1,%3,%2 \n"
164 " cst.p %2,%M0 ,cc3,#1 \n" /* if store happens... */
165 " corcc gr29,gr29,gr0 ,cc3,#1 \n" /* ... clear ICC3.Z */
166 " beq icc3,#0,0b \n"
167 : "+U"(*v), "=&r"(old), "=r"(tmp)
168 : "NPr"(mask)
169 : "memory", "cc7", "cc3", "icc3"
170 );
171
172 return old;
173}
174
175static inline
176unsigned long atomic_test_and_XOR_mask(unsigned long mask, volatile unsigned long *v)
177{
178 unsigned long old, tmp;
179
180 asm volatile(
181 "0: \n"
182 " orcc gr0,gr0,gr0,icc3 \n" /* set ICC3.Z */
183 " ckeq icc3,cc7 \n"
184 " ld.p %M0,%1 \n" /* LD.P/ORCR are atomic */
185 " orcr cc7,cc7,cc3 \n" /* set CC3 to true */
186 " xor%I3 %1,%3,%2 \n"
187 " cst.p %2,%M0 ,cc3,#1 \n" /* if store happens... */
188 " corcc gr29,gr29,gr0 ,cc3,#1 \n" /* ... clear ICC3.Z */
189 " beq icc3,#0,0b \n"
190 : "+U"(*v), "=&r"(old), "=r"(tmp)
191 : "NPr"(mask)
192 : "memory", "cc7", "cc3", "icc3"
193 );
194
195 return old;
196}
197
198#else
199
200extern unsigned long atomic_test_and_ANDNOT_mask(unsigned long mask, volatile unsigned long *v);
201extern unsigned long atomic_test_and_OR_mask(unsigned long mask, volatile unsigned long *v);
202extern unsigned long atomic_test_and_XOR_mask(unsigned long mask, volatile unsigned long *v);
203
204#endif
205
206#define atomic_clear_mask(mask, v) atomic_test_and_ANDNOT_mask((mask), (v))
207#define atomic_set_mask(mask, v) atomic_test_and_OR_mask((mask), (v))
208
209/*****************************************************************************/ 128/*****************************************************************************/
210/* 129/*
211 * exchange value with memory 130 * exchange value with memory
diff --git a/include/asm-frv/bitops.h b/include/asm-frv/bitops.h
index 5f86b876b298..39456ba0ec17 100644
--- a/include/asm-frv/bitops.h
+++ b/include/asm-frv/bitops.h
@@ -16,8 +16,6 @@
16 16
17#include <linux/compiler.h> 17#include <linux/compiler.h>
18#include <asm/byteorder.h> 18#include <asm/byteorder.h>
19#include <asm/system.h>
20#include <asm/atomic.h>
21 19
22#ifdef __KERNEL__ 20#ifdef __KERNEL__
23 21
@@ -33,6 +31,87 @@
33#define smp_mb__before_clear_bit() barrier() 31#define smp_mb__before_clear_bit() barrier()
34#define smp_mb__after_clear_bit() barrier() 32#define smp_mb__after_clear_bit() barrier()
35 33
34#ifndef CONFIG_FRV_OUTOFLINE_ATOMIC_OPS
35static inline
36unsigned long atomic_test_and_ANDNOT_mask(unsigned long mask, volatile unsigned long *v)
37{
38 unsigned long old, tmp;
39
40 asm volatile(
41 "0: \n"
42 " orcc gr0,gr0,gr0,icc3 \n" /* set ICC3.Z */
43 " ckeq icc3,cc7 \n"
44 " ld.p %M0,%1 \n" /* LD.P/ORCR are atomic */
45 " orcr cc7,cc7,cc3 \n" /* set CC3 to true */
46 " and%I3 %1,%3,%2 \n"
47 " cst.p %2,%M0 ,cc3,#1 \n" /* if store happens... */
48 " corcc gr29,gr29,gr0 ,cc3,#1 \n" /* ... clear ICC3.Z */
49 " beq icc3,#0,0b \n"
50 : "+U"(*v), "=&r"(old), "=r"(tmp)
51 : "NPr"(~mask)
52 : "memory", "cc7", "cc3", "icc3"
53 );
54
55 return old;
56}
57
58static inline
59unsigned long atomic_test_and_OR_mask(unsigned long mask, volatile unsigned long *v)
60{
61 unsigned long old, tmp;
62
63 asm volatile(
64 "0: \n"
65 " orcc gr0,gr0,gr0,icc3 \n" /* set ICC3.Z */
66 " ckeq icc3,cc7 \n"
67 " ld.p %M0,%1 \n" /* LD.P/ORCR are atomic */
68 " orcr cc7,cc7,cc3 \n" /* set CC3 to true */
69 " or%I3 %1,%3,%2 \n"
70 " cst.p %2,%M0 ,cc3,#1 \n" /* if store happens... */
71 " corcc gr29,gr29,gr0 ,cc3,#1 \n" /* ... clear ICC3.Z */
72 " beq icc3,#0,0b \n"
73 : "+U"(*v), "=&r"(old), "=r"(tmp)
74 : "NPr"(mask)
75 : "memory", "cc7", "cc3", "icc3"
76 );
77
78 return old;
79}
80
81static inline
82unsigned long atomic_test_and_XOR_mask(unsigned long mask, volatile unsigned long *v)
83{
84 unsigned long old, tmp;
85
86 asm volatile(
87 "0: \n"
88 " orcc gr0,gr0,gr0,icc3 \n" /* set ICC3.Z */
89 " ckeq icc3,cc7 \n"
90 " ld.p %M0,%1 \n" /* LD.P/ORCR are atomic */
91 " orcr cc7,cc7,cc3 \n" /* set CC3 to true */
92 " xor%I3 %1,%3,%2 \n"
93 " cst.p %2,%M0 ,cc3,#1 \n" /* if store happens... */
94 " corcc gr29,gr29,gr0 ,cc3,#1 \n" /* ... clear ICC3.Z */
95 " beq icc3,#0,0b \n"
96 : "+U"(*v), "=&r"(old), "=r"(tmp)
97 : "NPr"(mask)
98 : "memory", "cc7", "cc3", "icc3"
99 );
100
101 return old;
102}
103
104#else
105
106extern unsigned long atomic_test_and_ANDNOT_mask(unsigned long mask, volatile unsigned long *v);
107extern unsigned long atomic_test_and_OR_mask(unsigned long mask, volatile unsigned long *v);
108extern unsigned long atomic_test_and_XOR_mask(unsigned long mask, volatile unsigned long *v);
109
110#endif
111
112#define atomic_clear_mask(mask, v) atomic_test_and_ANDNOT_mask((mask), (v))
113#define atomic_set_mask(mask, v) atomic_test_and_OR_mask((mask), (v))
114
36static inline int test_and_clear_bit(int nr, volatile void *addr) 115static inline int test_and_clear_bit(int nr, volatile void *addr)
37{ 116{
38 volatile unsigned long *ptr = addr; 117 volatile unsigned long *ptr = addr;
diff --git a/include/asm-frv/page.h b/include/asm-frv/page.h
index cacc045700de..c2c1e89e747d 100644
--- a/include/asm-frv/page.h
+++ b/include/asm-frv/page.h
@@ -25,6 +25,7 @@ typedef struct { unsigned long ste[64];} pmd_t;
25typedef struct { pmd_t pue[1]; } pud_t; 25typedef struct { pmd_t pue[1]; } pud_t;
26typedef struct { pud_t pge[1]; } pgd_t; 26typedef struct { pud_t pge[1]; } pgd_t;
27typedef struct { unsigned long pgprot; } pgprot_t; 27typedef struct { unsigned long pgprot; } pgprot_t;
28typedef struct page *pgtable_t;
28 29
29#define pte_val(x) ((x).pte) 30#define pte_val(x) ((x).pte)
30#define pmd_val(x) ((x).ste[0]) 31#define pmd_val(x) ((x).ste[0])
diff --git a/include/asm-frv/param.h b/include/asm-frv/param.h
index 365653b1726c..6859dd503ed3 100644
--- a/include/asm-frv/param.h
+++ b/include/asm-frv/param.h
@@ -2,7 +2,7 @@
2#define _ASM_PARAM_H 2#define _ASM_PARAM_H
3 3
4#ifdef __KERNEL__ 4#ifdef __KERNEL__
5#define HZ 1000 /* Internal kernel timer frequency */ 5#define HZ CONFIG_HZ /* Internal kernel timer frequency */
6#define USER_HZ 100 /* .. some user interfaces are in "ticks" */ 6#define USER_HZ 100 /* .. some user interfaces are in "ticks" */
7#define CLOCKS_PER_SEC (USER_HZ) /* like times() */ 7#define CLOCKS_PER_SEC (USER_HZ) /* like times() */
8#endif 8#endif
diff --git a/include/asm-frv/pgalloc.h b/include/asm-frv/pgalloc.h
index e89620ef08ca..971e6addb009 100644
--- a/include/asm-frv/pgalloc.h
+++ b/include/asm-frv/pgalloc.h
@@ -25,6 +25,7 @@
25do { \ 25do { \
26 __set_pmd((PMD), page_to_pfn(PAGE) << PAGE_SHIFT | _PAGE_TABLE); \ 26 __set_pmd((PMD), page_to_pfn(PAGE) << PAGE_SHIFT | _PAGE_TABLE); \
27} while(0) 27} while(0)
28#define pmd_pgtable(pmd) pmd_page(pmd)
28 29
29/* 30/*
30 * Allocate and free page tables. 31 * Allocate and free page tables.
@@ -35,19 +36,24 @@ extern void pgd_free(struct mm_struct *mm, pgd_t *);
35 36
36extern pte_t *pte_alloc_one_kernel(struct mm_struct *, unsigned long); 37extern pte_t *pte_alloc_one_kernel(struct mm_struct *, unsigned long);
37 38
38extern struct page *pte_alloc_one(struct mm_struct *, unsigned long); 39extern pgtable_t pte_alloc_one(struct mm_struct *, unsigned long);
39 40
40static inline void pte_free_kernel(struct mm_struct *mm, pte_t *pte) 41static inline void pte_free_kernel(struct mm_struct *mm, pte_t *pte)
41{ 42{
42 free_page((unsigned long)pte); 43 free_page((unsigned long)pte);
43} 44}
44 45
45static inline void pte_free(struct mm_struct *mm, struct page *pte) 46static inline void pte_free(struct mm_struct *mm, pgtable_t pte)
46{ 47{
48 pgtable_page_dtor(pte);
47 __free_page(pte); 49 __free_page(pte);
48} 50}
49 51
50#define __pte_free_tlb(tlb,pte) tlb_remove_page((tlb),(pte)) 52#define __pte_free_tlb(tlb,pte) \
53do { \
54 pgtable_page_dtor(pte); \
55 tlb_remove_page((tlb),(pte)); \
56} while (0)
51 57
52/* 58/*
53 * allocating and freeing a pmd is trivial: the 1-entry pmd is 59 * allocating and freeing a pmd is trivial: the 1-entry pmd is
diff --git a/include/asm-frv/posix_types.h b/include/asm-frv/posix_types.h
index 73c2ba8d76b4..a9f1f5be0632 100644
--- a/include/asm-frv/posix_types.h
+++ b/include/asm-frv/posix_types.h
@@ -39,14 +39,10 @@ typedef long long __kernel_loff_t;
39#endif 39#endif
40 40
41typedef struct { 41typedef struct {
42#if defined(__KERNEL__) || defined(__USE_ALL)
43 int val[2]; 42 int val[2];
44#else /* !defined(__KERNEL__) && !defined(__USE_ALL) */
45 int __val[2];
46#endif /* !defined(__KERNEL__) && !defined(__USE_ALL) */
47} __kernel_fsid_t; 43} __kernel_fsid_t;
48 44
49#if defined(__KERNEL__) || !defined(__GLIBC__) || (__GLIBC__ < 2) 45#if defined(__KERNEL__)
50 46
51#undef __FD_SET 47#undef __FD_SET
52#define __FD_SET(d, set) ((set)->fds_bits[__FDELT(d)] |= __FDMASK(d)) 48#define __FD_SET(d, set) ((set)->fds_bits[__FDELT(d)] |= __FDMASK(d))
@@ -60,7 +56,7 @@ typedef struct {
60#undef __FD_ZERO 56#undef __FD_ZERO
61#define __FD_ZERO(fdsetp) (memset (fdsetp, 0, sizeof(*(fd_set *)fdsetp))) 57#define __FD_ZERO(fdsetp) (memset (fdsetp, 0, sizeof(*(fd_set *)fdsetp)))
62 58
63#endif /* defined(__KERNEL__) || !defined(__GLIBC__) || (__GLIBC__ < 2) */ 59#endif /* defined(__KERNEL__) */
64 60
65#endif 61#endif
66 62
diff --git a/include/asm-frv/system.h b/include/asm-frv/system.h
index 59be5443a68f..b400cea81487 100644
--- a/include/asm-frv/system.h
+++ b/include/asm-frv/system.h
@@ -14,6 +14,7 @@
14 14
15#include <linux/types.h> 15#include <linux/types.h>
16#include <linux/linkage.h> 16#include <linux/linkage.h>
17#include <linux/kernel.h>
17 18
18struct thread_struct; 19struct thread_struct;
19 20
@@ -276,7 +277,7 @@ static inline unsigned long __cmpxchg_local(volatile void *ptr,
276{ 277{
277 switch (size) { 278 switch (size) {
278 case 4: 279 case 4:
279 return cmpxchg(ptr, old, new); 280 return cmpxchg((unsigned long *)ptr, old, new);
280 default: 281 default:
281 return __cmpxchg_local_generic(ptr, old, new, size); 282 return __cmpxchg_local_generic(ptr, old, new, size);
282 } 283 }
diff --git a/include/asm-generic/Kbuild.asm b/include/asm-generic/Kbuild.asm
index 57ba60635959..fd9dcfd91c39 100644
--- a/include/asm-generic/Kbuild.asm
+++ b/include/asm-generic/Kbuild.asm
@@ -1,4 +1,6 @@
1ifeq ($(wildcard include/asm-$(SRCARCH)/a.out.h),include/asm-$(SRCARCH)/a.out.h)
1unifdef-y += a.out.h 2unifdef-y += a.out.h
3endif
2unifdef-y += auxvec.h 4unifdef-y += auxvec.h
3unifdef-y += byteorder.h 5unifdef-y += byteorder.h
4unifdef-y += errno.h 6unifdef-y += errno.h
diff --git a/include/asm-generic/iomap.h b/include/asm-generic/iomap.h
index cde592fca441..67dc84cd1343 100644
--- a/include/asm-generic/iomap.h
+++ b/include/asm-generic/iomap.h
@@ -25,17 +25,17 @@
25 * in the low address range. Architectures for which this is not 25 * in the low address range. Architectures for which this is not
26 * true can't use this generic implementation. 26 * true can't use this generic implementation.
27 */ 27 */
28extern unsigned int fastcall ioread8(void __iomem *); 28extern unsigned int ioread8(void __iomem *);
29extern unsigned int fastcall ioread16(void __iomem *); 29extern unsigned int ioread16(void __iomem *);
30extern unsigned int fastcall ioread16be(void __iomem *); 30extern unsigned int ioread16be(void __iomem *);
31extern unsigned int fastcall ioread32(void __iomem *); 31extern unsigned int ioread32(void __iomem *);
32extern unsigned int fastcall ioread32be(void __iomem *); 32extern unsigned int ioread32be(void __iomem *);
33 33
34extern void fastcall iowrite8(u8, void __iomem *); 34extern void iowrite8(u8, void __iomem *);
35extern void fastcall iowrite16(u16, void __iomem *); 35extern void iowrite16(u16, void __iomem *);
36extern void fastcall iowrite16be(u16, void __iomem *); 36extern void iowrite16be(u16, void __iomem *);
37extern void fastcall iowrite32(u32, void __iomem *); 37extern void iowrite32(u32, void __iomem *);
38extern void fastcall iowrite32be(u32, void __iomem *); 38extern void iowrite32be(u32, void __iomem *);
39 39
40/* 40/*
41 * "string" versions of the above. Note that they 41 * "string" versions of the above. Note that they
@@ -48,13 +48,13 @@ extern void fastcall iowrite32be(u32, void __iomem *);
48 * memory across multiple ports, use "memcpy_toio()" 48 * memory across multiple ports, use "memcpy_toio()"
49 * and friends. 49 * and friends.
50 */ 50 */
51extern void fastcall ioread8_rep(void __iomem *port, void *buf, unsigned long count); 51extern void ioread8_rep(void __iomem *port, void *buf, unsigned long count);
52extern void fastcall ioread16_rep(void __iomem *port, void *buf, unsigned long count); 52extern void ioread16_rep(void __iomem *port, void *buf, unsigned long count);
53extern void fastcall ioread32_rep(void __iomem *port, void *buf, unsigned long count); 53extern void ioread32_rep(void __iomem *port, void *buf, unsigned long count);
54 54
55extern void fastcall iowrite8_rep(void __iomem *port, const void *buf, unsigned long count); 55extern void iowrite8_rep(void __iomem *port, const void *buf, unsigned long count);
56extern void fastcall iowrite16_rep(void __iomem *port, const void *buf, unsigned long count); 56extern void iowrite16_rep(void __iomem *port, const void *buf, unsigned long count);
57extern void fastcall iowrite32_rep(void __iomem *port, const void *buf, unsigned long count); 57extern void iowrite32_rep(void __iomem *port, const void *buf, unsigned long count);
58 58
59/* Create a virtual mapping cookie for an IO port range */ 59/* Create a virtual mapping cookie for an IO port range */
60extern void __iomem *ioport_map(unsigned long port, unsigned int nr); 60extern void __iomem *ioport_map(unsigned long port, unsigned int nr);
diff --git a/include/asm-generic/mutex-dec.h b/include/asm-generic/mutex-dec.h
index 0134151656af..ed108be6743f 100644
--- a/include/asm-generic/mutex-dec.h
+++ b/include/asm-generic/mutex-dec.h
@@ -18,7 +18,7 @@
18 * 1 even when the "1" assertion wasn't true. 18 * 1 even when the "1" assertion wasn't true.
19 */ 19 */
20static inline void 20static inline void
21__mutex_fastpath_lock(atomic_t *count, fastcall void (*fail_fn)(atomic_t *)) 21__mutex_fastpath_lock(atomic_t *count, void (*fail_fn)(atomic_t *))
22{ 22{
23 if (unlikely(atomic_dec_return(count) < 0)) 23 if (unlikely(atomic_dec_return(count) < 0))
24 fail_fn(count); 24 fail_fn(count);
@@ -37,7 +37,7 @@ __mutex_fastpath_lock(atomic_t *count, fastcall void (*fail_fn)(atomic_t *))
37 * or anything the slow path function returns. 37 * or anything the slow path function returns.
38 */ 38 */
39static inline int 39static inline int
40__mutex_fastpath_lock_retval(atomic_t *count, fastcall int (*fail_fn)(atomic_t *)) 40__mutex_fastpath_lock_retval(atomic_t *count, int (*fail_fn)(atomic_t *))
41{ 41{
42 if (unlikely(atomic_dec_return(count) < 0)) 42 if (unlikely(atomic_dec_return(count) < 0))
43 return fail_fn(count); 43 return fail_fn(count);
@@ -61,7 +61,7 @@ __mutex_fastpath_lock_retval(atomic_t *count, fastcall int (*fail_fn)(atomic_t *
61 * to return 0 otherwise. 61 * to return 0 otherwise.
62 */ 62 */
63static inline void 63static inline void
64__mutex_fastpath_unlock(atomic_t *count, fastcall void (*fail_fn)(atomic_t *)) 64__mutex_fastpath_unlock(atomic_t *count, void (*fail_fn)(atomic_t *))
65{ 65{
66 smp_mb(); 66 smp_mb();
67 if (unlikely(atomic_inc_return(count) <= 0)) 67 if (unlikely(atomic_inc_return(count) <= 0))
diff --git a/include/asm-generic/mutex-xchg.h b/include/asm-generic/mutex-xchg.h
index 6a7e8c141b53..7b9cd2cbfebe 100644
--- a/include/asm-generic/mutex-xchg.h
+++ b/include/asm-generic/mutex-xchg.h
@@ -23,7 +23,7 @@
23 * even when the "1" assertion wasn't true. 23 * even when the "1" assertion wasn't true.
24 */ 24 */
25static inline void 25static inline void
26__mutex_fastpath_lock(atomic_t *count, fastcall void (*fail_fn)(atomic_t *)) 26__mutex_fastpath_lock(atomic_t *count, void (*fail_fn)(atomic_t *))
27{ 27{
28 if (unlikely(atomic_xchg(count, 0) != 1)) 28 if (unlikely(atomic_xchg(count, 0) != 1))
29 fail_fn(count); 29 fail_fn(count);
@@ -42,7 +42,7 @@ __mutex_fastpath_lock(atomic_t *count, fastcall void (*fail_fn)(atomic_t *))
42 * or anything the slow path function returns 42 * or anything the slow path function returns
43 */ 43 */
44static inline int 44static inline int
45__mutex_fastpath_lock_retval(atomic_t *count, fastcall int (*fail_fn)(atomic_t *)) 45__mutex_fastpath_lock_retval(atomic_t *count, int (*fail_fn)(atomic_t *))
46{ 46{
47 if (unlikely(atomic_xchg(count, 0) != 1)) 47 if (unlikely(atomic_xchg(count, 0) != 1))
48 return fail_fn(count); 48 return fail_fn(count);
@@ -65,7 +65,7 @@ __mutex_fastpath_lock_retval(atomic_t *count, fastcall int (*fail_fn)(atomic_t *
65 * to return 0 otherwise. 65 * to return 0 otherwise.
66 */ 66 */
67static inline void 67static inline void
68__mutex_fastpath_unlock(atomic_t *count, fastcall void (*fail_fn)(atomic_t *)) 68__mutex_fastpath_unlock(atomic_t *count, void (*fail_fn)(atomic_t *))
69{ 69{
70 smp_mb(); 70 smp_mb();
71 if (unlikely(atomic_xchg(count, 1) != 0)) 71 if (unlikely(atomic_xchg(count, 1) != 0))
diff --git a/include/asm-generic/termios.h b/include/asm-generic/termios.h
index 33dca30a3c45..7d39ecc92d94 100644
--- a/include/asm-generic/termios.h
+++ b/include/asm-generic/termios.h
@@ -61,8 +61,14 @@ static inline int kernel_termios_to_user_termio(struct termio __user *termio,
61 return 0; 61 return 0;
62} 62}
63 63
64#ifndef user_termios_to_kernel_termios
64#define user_termios_to_kernel_termios(k, u) copy_from_user(k, u, sizeof(struct termios)) 65#define user_termios_to_kernel_termios(k, u) copy_from_user(k, u, sizeof(struct termios))
66#endif
67
68#ifndef kernel_termios_to_user_termios
65#define kernel_termios_to_user_termios(u, k) copy_to_user(u, k, sizeof(struct termios)) 69#define kernel_termios_to_user_termios(u, k) copy_to_user(u, k, sizeof(struct termios))
70#endif
71
66#define user_termios_to_kernel_termios_1(k, u) copy_from_user(k, u, sizeof(struct termios)) 72#define user_termios_to_kernel_termios_1(k, u) copy_from_user(k, u, sizeof(struct termios))
67#define kernel_termios_to_user_termios_1(u, k) copy_to_user(u, k, sizeof(struct termios)) 73#define kernel_termios_to_user_termios_1(u, k) copy_to_user(u, k, sizeof(struct termios))
68 74
diff --git a/include/asm-h8300/a.out.h b/include/asm-h8300/a.out.h
index aa5d22778235..ded780f0a492 100644
--- a/include/asm-h8300/a.out.h
+++ b/include/asm-h8300/a.out.h
@@ -17,11 +17,4 @@ struct exec
17#define N_DRSIZE(a) ((a).a_drsize) 17#define N_DRSIZE(a) ((a).a_drsize)
18#define N_SYMSIZE(a) ((a).a_syms) 18#define N_SYMSIZE(a) ((a).a_syms)
19 19
20#ifdef __KERNEL__
21
22#define STACK_TOP TASK_SIZE
23#define STACK_TOP_MAX STACK_TOP
24
25#endif
26
27#endif /* __H8300_A_OUT_H__ */ 20#endif /* __H8300_A_OUT_H__ */
diff --git a/include/asm-h8300/param.h b/include/asm-h8300/param.h
index c25806ed1fb3..04f64f100379 100644
--- a/include/asm-h8300/param.h
+++ b/include/asm-h8300/param.h
@@ -3,7 +3,7 @@
3 3
4 4
5#ifndef HZ 5#ifndef HZ
6#define HZ 100 6#define HZ CONFIG_HZ
7#endif 7#endif
8 8
9#ifdef __KERNEL__ 9#ifdef __KERNEL__
diff --git a/include/asm-h8300/posix_types.h b/include/asm-h8300/posix_types.h
index 7de94b1fd0e5..5c553927fc53 100644
--- a/include/asm-h8300/posix_types.h
+++ b/include/asm-h8300/posix_types.h
@@ -38,14 +38,10 @@ typedef long long __kernel_loff_t;
38#endif 38#endif
39 39
40typedef struct { 40typedef struct {
41#if defined(__KERNEL__) || defined(__USE_ALL)
42 int val[2]; 41 int val[2];
43#else /* !defined(__KERNEL__) && !defined(__USE_ALL) */
44 int __val[2];
45#endif /* !defined(__KERNEL__) && !defined(__USE_ALL) */
46} __kernel_fsid_t; 42} __kernel_fsid_t;
47 43
48#if defined(__KERNEL__) || !defined(__GLIBC__) || (__GLIBC__ < 2) 44#if defined(__KERNEL__)
49 45
50#undef __FD_SET 46#undef __FD_SET
51#define __FD_SET(d, set) ((set)->fds_bits[__FDELT(d)] |= __FDMASK(d)) 47#define __FD_SET(d, set) ((set)->fds_bits[__FDELT(d)] |= __FDMASK(d))
@@ -59,6 +55,6 @@ typedef struct {
59#undef __FD_ZERO 55#undef __FD_ZERO
60#define __FD_ZERO(fdsetp) (memset (fdsetp, 0, sizeof(*(fd_set *)fdsetp))) 56#define __FD_ZERO(fdsetp) (memset (fdsetp, 0, sizeof(*(fd_set *)fdsetp)))
61 57
62#endif /* defined(__KERNEL__) || !defined(__GLIBC__) || (__GLIBC__ < 2) */ 58#endif /* defined(__KERNEL__) */
63 59
64#endif 60#endif
diff --git a/include/asm-h8300/processor.h b/include/asm-h8300/processor.h
index 49fc886a6232..69e8a34eb6d5 100644
--- a/include/asm-h8300/processor.h
+++ b/include/asm-h8300/processor.h
@@ -39,6 +39,11 @@ static inline void wrusp(unsigned long usp) {
39 */ 39 */
40#define TASK_SIZE (0xFFFFFFFFUL) 40#define TASK_SIZE (0xFFFFFFFFUL)
41 41
42#ifdef __KERNEL__
43#define STACK_TOP TASK_SIZE
44#define STACK_TOP_MAX STACK_TOP
45#endif
46
42/* 47/*
43 * This decides where the kernel will search for a free chunk of vm 48 * This decides where the kernel will search for a free chunk of vm
44 * space during mmap's. We won't be using it 49 * space during mmap's. We won't be using it
diff --git a/include/asm-ia64/a.out.h b/include/asm-ia64/a.out.h
index 7293ac1df3ab..193dcfb67596 100644
--- a/include/asm-ia64/a.out.h
+++ b/include/asm-ia64/a.out.h
@@ -29,7 +29,4 @@ struct exec {
29#define N_SYMSIZE(x) 0 29#define N_SYMSIZE(x) 0
30#define N_TXTOFF(x) 0 30#define N_TXTOFF(x) 0
31 31
32#ifdef __KERNEL__
33#include <asm/ustack.h>
34#endif
35#endif /* _ASM_IA64_A_OUT_H */ 32#endif /* _ASM_IA64_A_OUT_H */
diff --git a/include/asm-ia64/page.h b/include/asm-ia64/page.h
index 8a8aa3fd7cd4..4999a6c63775 100644
--- a/include/asm-ia64/page.h
+++ b/include/asm-ia64/page.h
@@ -185,6 +185,7 @@ get_order (unsigned long size)
185#endif 185#endif
186 typedef struct { unsigned long pgd; } pgd_t; 186 typedef struct { unsigned long pgd; } pgd_t;
187 typedef struct { unsigned long pgprot; } pgprot_t; 187 typedef struct { unsigned long pgprot; } pgprot_t;
188 typedef struct page *pgtable_t;
188 189
189# define pte_val(x) ((x).pte) 190# define pte_val(x) ((x).pte)
190# define pmd_val(x) ((x).pmd) 191# define pmd_val(x) ((x).pmd)
@@ -206,6 +207,7 @@ get_order (unsigned long size)
206 typedef unsigned long pmd_t; 207 typedef unsigned long pmd_t;
207 typedef unsigned long pgd_t; 208 typedef unsigned long pgd_t;
208 typedef unsigned long pgprot_t; 209 typedef unsigned long pgprot_t;
210 typedef struct page *pgtable_t;
209# endif 211# endif
210 212
211# define pte_val(x) (x) 213# define pte_val(x) (x)
diff --git a/include/asm-ia64/pgalloc.h b/include/asm-ia64/pgalloc.h
index 556d988123ac..b9ac1a6fc216 100644
--- a/include/asm-ia64/pgalloc.h
+++ b/include/asm-ia64/pgalloc.h
@@ -70,10 +70,11 @@ static inline void pmd_free(struct mm_struct *mm, pmd_t *pmd)
70#define __pmd_free_tlb(tlb, pmd) pmd_free((tlb)->mm, pmd) 70#define __pmd_free_tlb(tlb, pmd) pmd_free((tlb)->mm, pmd)
71 71
72static inline void 72static inline void
73pmd_populate(struct mm_struct *mm, pmd_t * pmd_entry, struct page *pte) 73pmd_populate(struct mm_struct *mm, pmd_t * pmd_entry, pgtable_t pte)
74{ 74{
75 pmd_val(*pmd_entry) = page_to_phys(pte); 75 pmd_val(*pmd_entry) = page_to_phys(pte);
76} 76}
77#define pmd_pgtable(pmd) pmd_page(pmd)
77 78
78static inline void 79static inline void
79pmd_populate_kernel(struct mm_struct *mm, pmd_t * pmd_entry, pte_t * pte) 80pmd_populate_kernel(struct mm_struct *mm, pmd_t * pmd_entry, pte_t * pte)
@@ -81,11 +82,17 @@ pmd_populate_kernel(struct mm_struct *mm, pmd_t * pmd_entry, pte_t * pte)
81 pmd_val(*pmd_entry) = __pa(pte); 82 pmd_val(*pmd_entry) = __pa(pte);
82} 83}
83 84
84static inline struct page *pte_alloc_one(struct mm_struct *mm, 85static inline pgtable_t pte_alloc_one(struct mm_struct *mm, unsigned long addr)
85 unsigned long addr)
86{ 86{
87 void *pg = quicklist_alloc(0, GFP_KERNEL, NULL); 87 struct page *page;
88 return pg ? virt_to_page(pg) : NULL; 88 void *pg;
89
90 pg = quicklist_alloc(0, GFP_KERNEL, NULL);
91 if (!pg)
92 return NULL;
93 page = virt_to_page(pg);
94 pgtable_page_ctor(page);
95 return page;
89} 96}
90 97
91static inline pte_t *pte_alloc_one_kernel(struct mm_struct *mm, 98static inline pte_t *pte_alloc_one_kernel(struct mm_struct *mm,
@@ -94,8 +101,9 @@ static inline pte_t *pte_alloc_one_kernel(struct mm_struct *mm,
94 return quicklist_alloc(0, GFP_KERNEL, NULL); 101 return quicklist_alloc(0, GFP_KERNEL, NULL);
95} 102}
96 103
97static inline void pte_free(struct mm_struct *mm, struct page *pte) 104static inline void pte_free(struct mm_struct *mm, pgtable_t pte)
98{ 105{
106 pgtable_page_dtor(pte);
99 quicklist_free_page(0, NULL, pte); 107 quicklist_free_page(0, NULL, pte);
100} 108}
101 109
diff --git a/include/asm-m32r/a.out.h b/include/asm-m32r/a.out.h
index 6a1b5d42f328..ab150f5c1666 100644
--- a/include/asm-m32r/a.out.h
+++ b/include/asm-m32r/a.out.h
@@ -17,11 +17,4 @@ struct exec
17#define N_DRSIZE(a) ((a).a_drsize) 17#define N_DRSIZE(a) ((a).a_drsize)
18#define N_SYMSIZE(a) ((a).a_syms) 18#define N_SYMSIZE(a) ((a).a_syms)
19 19
20#ifdef __KERNEL__
21
22#define STACK_TOP TASK_SIZE
23#define STACK_TOP_MAX STACK_TOP
24
25#endif
26
27#endif /* _ASM_M32R_A_OUT_H */ 20#endif /* _ASM_M32R_A_OUT_H */
diff --git a/include/asm-m32r/page.h b/include/asm-m32r/page.h
index 05d43bbbf940..8a677f3fca68 100644
--- a/include/asm-m32r/page.h
+++ b/include/asm-m32r/page.h
@@ -28,6 +28,7 @@ typedef struct { unsigned long pgd; } pgd_t;
28#define PTE_MASK PAGE_MASK 28#define PTE_MASK PAGE_MASK
29 29
30typedef struct { unsigned long pgprot; } pgprot_t; 30typedef struct { unsigned long pgprot; } pgprot_t;
31typedef struct page *pgtable_t;
31 32
32#define pmd_val(x) ((x).pmd) 33#define pmd_val(x) ((x).pmd)
33#define pgd_val(x) ((x).pgd) 34#define pgd_val(x) ((x).pgd)
diff --git a/include/asm-m32r/param.h b/include/asm-m32r/param.h
index 3e14026e39cd..94c770196048 100644
--- a/include/asm-m32r/param.h
+++ b/include/asm-m32r/param.h
@@ -2,7 +2,7 @@
2#define _ASM_M32R_PARAM_H 2#define _ASM_M32R_PARAM_H
3 3
4#ifdef __KERNEL__ 4#ifdef __KERNEL__
5# define HZ 100 /* Internal kernel timer frequency */ 5# define HZ CONFIG_HZ /* Internal kernel timer frequency */
6# define USER_HZ 100 /* .. some user interfaces are in "ticks" */ 6# define USER_HZ 100 /* .. some user interfaces are in "ticks" */
7# define CLOCKS_PER_SEC (USER_HZ) /* like times() */ 7# define CLOCKS_PER_SEC (USER_HZ) /* like times() */
8#endif 8#endif
diff --git a/include/asm-m32r/pgalloc.h b/include/asm-m32r/pgalloc.h
index e5921adfad1b..f11a2b909cdb 100644
--- a/include/asm-m32r/pgalloc.h
+++ b/include/asm-m32r/pgalloc.h
@@ -9,10 +9,11 @@
9 set_pmd(pmd, __pmd(_PAGE_TABLE + __pa(pte))) 9 set_pmd(pmd, __pmd(_PAGE_TABLE + __pa(pte)))
10 10
11static __inline__ void pmd_populate(struct mm_struct *mm, pmd_t *pmd, 11static __inline__ void pmd_populate(struct mm_struct *mm, pmd_t *pmd,
12 struct page *pte) 12 pgtable_t pte)
13{ 13{
14 set_pmd(pmd, __pmd(_PAGE_TABLE + page_to_phys(pte))); 14 set_pmd(pmd, __pmd(_PAGE_TABLE + page_to_phys(pte)));
15} 15}
16#define pmd_pgtable(pmd) pmd_page(pmd)
16 17
17/* 18/*
18 * Allocate and free page tables. 19 * Allocate and free page tables.
@@ -37,12 +38,12 @@ static __inline__ pte_t *pte_alloc_one_kernel(struct mm_struct *mm,
37 return pte; 38 return pte;
38} 39}
39 40
40static __inline__ struct page *pte_alloc_one(struct mm_struct *mm, 41static __inline__ pgtable_t pte_alloc_one(struct mm_struct *mm,
41 unsigned long address) 42 unsigned long address)
42{ 43{
43 struct page *pte = alloc_page(GFP_KERNEL|__GFP_ZERO); 44 struct page *pte = alloc_page(GFP_KERNEL|__GFP_ZERO);
44 45
45 46 pgtable_page_ctor(pte);
46 return pte; 47 return pte;
47} 48}
48 49
@@ -51,8 +52,9 @@ static inline void pte_free_kernel(struct mm_struct *mm, pte_t *pte)
51 free_page((unsigned long)pte); 52 free_page((unsigned long)pte);
52} 53}
53 54
54static inline void pte_free(struct mm_struct *mm, struct page *pte) 55static inline void pte_free(struct mm_struct *mm, pgtable_t pte)
55{ 56{
57 pgtable_page_dtor(pte);
56 __free_page(pte); 58 __free_page(pte);
57} 59}
58 60
diff --git a/include/asm-m32r/posix_types.h b/include/asm-m32r/posix_types.h
index 1caac65d208f..b309c5858637 100644
--- a/include/asm-m32r/posix_types.h
+++ b/include/asm-m32r/posix_types.h
@@ -39,14 +39,10 @@ typedef long long __kernel_loff_t;
39#endif 39#endif
40 40
41typedef struct { 41typedef struct {
42#if defined(__KERNEL__) || defined(__USE_ALL)
43 int val[2]; 42 int val[2];
44#else /* !defined(__KERNEL__) && !defined(__USE_ALL) */
45 int __val[2];
46#endif /* !defined(__KERNEL__) && !defined(__USE_ALL) */
47} __kernel_fsid_t; 43} __kernel_fsid_t;
48 44
49#if defined(__KERNEL__) || !defined(__GLIBC__) || (__GLIBC__ < 2) 45#if defined(__KERNEL__)
50 46
51#undef __FD_SET 47#undef __FD_SET
52static __inline__ void __FD_SET(unsigned long __fd, __kernel_fd_set *__fdsetp) 48static __inline__ void __FD_SET(unsigned long __fd, __kernel_fd_set *__fdsetp)
@@ -117,6 +113,6 @@ static __inline__ void __FD_ZERO(__kernel_fd_set *__p)
117 } 113 }
118} 114}
119 115
120#endif /* defined(__KERNEL__) || !defined(__GLIBC__) || (__GLIBC__ < 2) */ 116#endif /* defined(__KERNEL__) */
121 117
122#endif /* _ASM_M32R_POSIX_TYPES_H */ 118#endif /* _ASM_M32R_POSIX_TYPES_H */
diff --git a/include/asm-m32r/processor.h b/include/asm-m32r/processor.h
index 32755bf136de..1a997fc148a2 100644
--- a/include/asm-m32r/processor.h
+++ b/include/asm-m32r/processor.h
@@ -60,6 +60,11 @@ extern struct cpuinfo_m32r cpu_data[];
60#define TASK_SIZE (0x00400000UL) 60#define TASK_SIZE (0x00400000UL)
61#endif 61#endif
62 62
63#ifdef __KERNEL__
64#define STACK_TOP TASK_SIZE
65#define STACK_TOP_MAX STACK_TOP
66#endif
67
63/* This decides where the kernel will search for a free chunk of vm 68/* This decides where the kernel will search for a free chunk of vm
64 * space during mmap's. 69 * space during mmap's.
65 */ 70 */
diff --git a/include/asm-m68k/a.out-core.h b/include/asm-m68k/a.out-core.h
new file mode 100644
index 000000000000..f6bfc1d63ff6
--- /dev/null
+++ b/include/asm-m68k/a.out-core.h
@@ -0,0 +1,67 @@
1/* a.out coredump register dumper
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11
12#ifndef _ASM_A_OUT_CORE_H
13#define _ASM_A_OUT_CORE_H
14
15#ifdef __KERNEL__
16
17#include <linux/user.h>
18#include <linux/elfcore.h>
19
20/*
21 * fill in the user structure for an a.out core dump
22 */
23static inline void aout_dump_thread(struct pt_regs *regs, struct user *dump)
24{
25 struct switch_stack *sw;
26
27/* changed the size calculations - should hopefully work better. lbt */
28 dump->magic = CMAGIC;
29 dump->start_code = 0;
30 dump->start_stack = rdusp() & ~(PAGE_SIZE - 1);
31 dump->u_tsize = ((unsigned long) current->mm->end_code) >> PAGE_SHIFT;
32 dump->u_dsize = ((unsigned long) (current->mm->brk +
33 (PAGE_SIZE-1))) >> PAGE_SHIFT;
34 dump->u_dsize -= dump->u_tsize;
35 dump->u_ssize = 0;
36
37 if (dump->start_stack < TASK_SIZE)
38 dump->u_ssize = ((unsigned long) (TASK_SIZE - dump->start_stack)) >> PAGE_SHIFT;
39
40 dump->u_ar0 = offsetof(struct user, regs);
41 sw = ((struct switch_stack *)regs) - 1;
42 dump->regs.d1 = regs->d1;
43 dump->regs.d2 = regs->d2;
44 dump->regs.d3 = regs->d3;
45 dump->regs.d4 = regs->d4;
46 dump->regs.d5 = regs->d5;
47 dump->regs.d6 = sw->d6;
48 dump->regs.d7 = sw->d7;
49 dump->regs.a0 = regs->a0;
50 dump->regs.a1 = regs->a1;
51 dump->regs.a2 = regs->a2;
52 dump->regs.a3 = sw->a3;
53 dump->regs.a4 = sw->a4;
54 dump->regs.a5 = sw->a5;
55 dump->regs.a6 = sw->a6;
56 dump->regs.d0 = regs->d0;
57 dump->regs.orig_d0 = regs->orig_d0;
58 dump->regs.stkadj = regs->stkadj;
59 dump->regs.sr = regs->sr;
60 dump->regs.pc = regs->pc;
61 dump->regs.fmtvec = (regs->format << 12) | regs->vector;
62 /* dump floating point stuff */
63 dump->u_fpvalid = dump_fpu (regs, &dump->m68kfp);
64}
65
66#endif /* __KERNEL__ */
67#endif /* _ASM_A_OUT_CORE_H */
diff --git a/include/asm-m68k/a.out.h b/include/asm-m68k/a.out.h
index 6fc86a221a94..3885fe43432a 100644
--- a/include/asm-m68k/a.out.h
+++ b/include/asm-m68k/a.out.h
@@ -17,11 +17,4 @@ struct exec
17#define N_DRSIZE(a) ((a).a_drsize) 17#define N_DRSIZE(a) ((a).a_drsize)
18#define N_SYMSIZE(a) ((a).a_syms) 18#define N_SYMSIZE(a) ((a).a_syms)
19 19
20#ifdef __KERNEL__
21
22#define STACK_TOP TASK_SIZE
23#define STACK_TOP_MAX STACK_TOP
24
25#endif
26
27#endif /* __M68K_A_OUT_H__ */ 20#endif /* __M68K_A_OUT_H__ */
diff --git a/include/asm-m68k/motorola_pgalloc.h b/include/asm-m68k/motorola_pgalloc.h
index 500ec9b8b189..d08bf6261df8 100644
--- a/include/asm-m68k/motorola_pgalloc.h
+++ b/include/asm-m68k/motorola_pgalloc.h
@@ -7,7 +7,6 @@
7extern pmd_t *get_pointer_table(void); 7extern pmd_t *get_pointer_table(void);
8extern int free_pointer_table(pmd_t *); 8extern int free_pointer_table(pmd_t *);
9 9
10
11static inline pte_t *pte_alloc_one_kernel(struct mm_struct *mm, unsigned long address) 10static inline pte_t *pte_alloc_one_kernel(struct mm_struct *mm, unsigned long address)
12{ 11{
13 pte_t *pte; 12 pte_t *pte;
@@ -28,7 +27,7 @@ static inline void pte_free_kernel(struct mm_struct *mm, pte_t *pte)
28 free_page((unsigned long) pte); 27 free_page((unsigned long) pte);
29} 28}
30 29
31static inline struct page *pte_alloc_one(struct mm_struct *mm, unsigned long address) 30static inline pgtable_t pte_alloc_one(struct mm_struct *mm, unsigned long address)
32{ 31{
33 struct page *page = alloc_pages(GFP_KERNEL|__GFP_REPEAT|__GFP_ZERO, 0); 32 struct page *page = alloc_pages(GFP_KERNEL|__GFP_REPEAT|__GFP_ZERO, 0);
34 pte_t *pte; 33 pte_t *pte;
@@ -43,19 +42,21 @@ static inline struct page *pte_alloc_one(struct mm_struct *mm, unsigned long add
43 nocache_page(pte); 42 nocache_page(pte);
44 } 43 }
45 kunmap(pte); 44 kunmap(pte);
46 45 pgtable_page_ctor(page);
47 return page; 46 return page;
48} 47}
49 48
50static inline void pte_free(struct mm_struct *mm, struct page *page) 49static inline void pte_free(struct mm_struct *mm, pgtable_t page)
51{ 50{
51 pgtable_page_dtor(page);
52 cache_page(kmap(page)); 52 cache_page(kmap(page));
53 kunmap(page); 53 kunmap(page);
54 __free_page(page); 54 __free_page(page);
55} 55}
56 56
57static inline void __pte_free_tlb(struct mmu_gather *tlb, struct page *page) 57static inline void __pte_free_tlb(struct mmu_gather *tlb, pgtable_t page)
58{ 58{
59 pgtable_page_dtor(page);
59 cache_page(kmap(page)); 60 cache_page(kmap(page));
60 kunmap(page); 61 kunmap(page);
61 __free_page(page); 62 __free_page(page);
@@ -94,10 +95,11 @@ static inline void pmd_populate_kernel(struct mm_struct *mm, pmd_t *pmd, pte_t *
94 pmd_set(pmd, pte); 95 pmd_set(pmd, pte);
95} 96}
96 97
97static inline void pmd_populate(struct mm_struct *mm, pmd_t *pmd, struct page *page) 98static inline void pmd_populate(struct mm_struct *mm, pmd_t *pmd, pgtable_t page)
98{ 99{
99 pmd_set(pmd, page_address(page)); 100 pmd_set(pmd, page_address(page));
100} 101}
102#define pmd_pgtable(pmd) pmd_page(pmd)
101 103
102static inline void pgd_populate(struct mm_struct *mm, pgd_t *pgd, pmd_t *pmd) 104static inline void pgd_populate(struct mm_struct *mm, pgd_t *pgd, pmd_t *pmd)
103{ 105{
diff --git a/include/asm-m68k/page.h b/include/asm-m68k/page.h
index 3f29e2a03a43..880c2cbff8a6 100644
--- a/include/asm-m68k/page.h
+++ b/include/asm-m68k/page.h
@@ -91,6 +91,7 @@ typedef struct { unsigned long pte; } pte_t;
91typedef struct { unsigned long pmd[16]; } pmd_t; 91typedef struct { unsigned long pmd[16]; } pmd_t;
92typedef struct { unsigned long pgd; } pgd_t; 92typedef struct { unsigned long pgd; } pgd_t;
93typedef struct { unsigned long pgprot; } pgprot_t; 93typedef struct { unsigned long pgprot; } pgprot_t;
94typedef struct page *pgtable_t;
94 95
95#define pte_val(x) ((x).pte) 96#define pte_val(x) ((x).pte)
96#define pmd_val(x) ((&x)->pmd[0]) 97#define pmd_val(x) ((&x)->pmd[0])
diff --git a/include/asm-m68k/param.h b/include/asm-m68k/param.h
index 60f409d81658..536a27888358 100644
--- a/include/asm-m68k/param.h
+++ b/include/asm-m68k/param.h
@@ -2,7 +2,7 @@
2#define _M68K_PARAM_H 2#define _M68K_PARAM_H
3 3
4#ifdef __KERNEL__ 4#ifdef __KERNEL__
5# define HZ 100 /* Internal kernel timer frequency */ 5# define HZ CONFIG_HZ /* Internal kernel timer frequency */
6# define USER_HZ 100 /* .. some user interfaces are in "ticks" */ 6# define USER_HZ 100 /* .. some user interfaces are in "ticks" */
7# define CLOCKS_PER_SEC (USER_HZ) /* like times() */ 7# define CLOCKS_PER_SEC (USER_HZ) /* like times() */
8#endif 8#endif
diff --git a/include/asm-m68k/posix_types.h b/include/asm-m68k/posix_types.h
index fa166ee30286..63cdcc142d93 100644
--- a/include/asm-m68k/posix_types.h
+++ b/include/asm-m68k/posix_types.h
@@ -39,14 +39,10 @@ typedef long long __kernel_loff_t;
39#endif 39#endif
40 40
41typedef struct { 41typedef struct {
42#if defined(__KERNEL__) || defined(__USE_ALL)
43 int val[2]; 42 int val[2];
44#else /* !defined(__KERNEL__) && !defined(__USE_ALL) */
45 int __val[2];
46#endif /* !defined(__KERNEL__) && !defined(__USE_ALL) */
47} __kernel_fsid_t; 43} __kernel_fsid_t;
48 44
49#if defined(__KERNEL__) || !defined(__GLIBC__) || (__GLIBC__ < 2) 45#if defined(__KERNEL__)
50 46
51#undef __FD_SET 47#undef __FD_SET
52#define __FD_SET(d, set) ((set)->fds_bits[__FDELT(d)] |= __FDMASK(d)) 48#define __FD_SET(d, set) ((set)->fds_bits[__FDELT(d)] |= __FDMASK(d))
@@ -60,6 +56,6 @@ typedef struct {
60#undef __FD_ZERO 56#undef __FD_ZERO
61#define __FD_ZERO(fdsetp) (memset (fdsetp, 0, sizeof(*(fd_set *)fdsetp))) 57#define __FD_ZERO(fdsetp) (memset (fdsetp, 0, sizeof(*(fd_set *)fdsetp)))
62 58
63#endif /* defined(__KERNEL__) || !defined(__GLIBC__) || (__GLIBC__ < 2) */ 59#endif /* defined(__KERNEL__) */
64 60
65#endif 61#endif
diff --git a/include/asm-m68k/processor.h b/include/asm-m68k/processor.h
index 4453ec379c5d..1f61ef53f0e0 100644
--- a/include/asm-m68k/processor.h
+++ b/include/asm-m68k/processor.h
@@ -41,6 +41,11 @@ static inline void wrusp(unsigned long usp)
41#define TASK_SIZE (0x0E000000UL) 41#define TASK_SIZE (0x0E000000UL)
42#endif 42#endif
43 43
44#ifdef __KERNEL__
45#define STACK_TOP TASK_SIZE
46#define STACK_TOP_MAX STACK_TOP
47#endif
48
44/* This decides where the kernel will search for a free chunk of vm 49/* This decides where the kernel will search for a free chunk of vm
45 * space during mmap's. 50 * space during mmap's.
46 */ 51 */
diff --git a/include/asm-m68k/sun3_pgalloc.h b/include/asm-m68k/sun3_pgalloc.h
index a5a91e72714b..d4c83f143816 100644
--- a/include/asm-m68k/sun3_pgalloc.h
+++ b/include/asm-m68k/sun3_pgalloc.h
@@ -26,12 +26,17 @@ static inline void pte_free_kernel(struct mm_struct *mm, pte_t *pte)
26 free_page((unsigned long) pte); 26 free_page((unsigned long) pte);
27} 27}
28 28
29static inline void pte_free(struct mm_struct *mm, struct page *page) 29static inline void pte_free(struct mm_struct *mm, pgtable_t page)
30{ 30{
31 pgtable_page_dtor(page);
31 __free_page(page); 32 __free_page(page);
32} 33}
33 34
34#define __pte_free_tlb(tlb,pte) tlb_remove_page((tlb),(pte)) 35#define __pte_free_tlb(tlb,pte) \
36do { \
37 pgtable_page_dtor(pte); \
38 tlb_remove_page((tlb), pte); \
39} while (0)
35 40
36static inline pte_t *pte_alloc_one_kernel(struct mm_struct *mm, 41static inline pte_t *pte_alloc_one_kernel(struct mm_struct *mm,
37 unsigned long address) 42 unsigned long address)
@@ -45,8 +50,8 @@ static inline pte_t *pte_alloc_one_kernel(struct mm_struct *mm,
45 return (pte_t *) (page); 50 return (pte_t *) (page);
46} 51}
47 52
48static inline struct page *pte_alloc_one(struct mm_struct *mm, 53static inline pgtable_t pte_alloc_one(struct mm_struct *mm,
49 unsigned long address) 54 unsigned long address)
50{ 55{
51 struct page *page = alloc_pages(GFP_KERNEL|__GFP_REPEAT, 0); 56 struct page *page = alloc_pages(GFP_KERNEL|__GFP_REPEAT, 0);
52 57
@@ -54,6 +59,7 @@ static inline struct page *pte_alloc_one(struct mm_struct *mm,
54 return NULL; 59 return NULL;
55 60
56 clear_highpage(page); 61 clear_highpage(page);
62 pgtable_page_ctor(page);
57 return page; 63 return page;
58 64
59} 65}
@@ -63,10 +69,11 @@ static inline void pmd_populate_kernel(struct mm_struct *mm, pmd_t *pmd, pte_t *
63 pmd_val(*pmd) = __pa((unsigned long)pte); 69 pmd_val(*pmd) = __pa((unsigned long)pte);
64} 70}
65 71
66static inline void pmd_populate(struct mm_struct *mm, pmd_t *pmd, struct page *page) 72static inline void pmd_populate(struct mm_struct *mm, pmd_t *pmd, pgtable_t page)
67{ 73{
68 pmd_val(*pmd) = __pa((unsigned long)page_address(page)); 74 pmd_val(*pmd) = __pa((unsigned long)page_address(page));
69} 75}
76#define pmd_pgtable(pmd) pmd_page(pmd)
70 77
71/* 78/*
72 * allocating and freeing a pmd is trivial: the 1-entry pmd is 79 * allocating and freeing a pmd is trivial: the 1-entry pmd is
diff --git a/include/asm-m68knommu/param.h b/include/asm-m68knommu/param.h
index 4c9904d6512e..96c451018324 100644
--- a/include/asm-m68knommu/param.h
+++ b/include/asm-m68knommu/param.h
@@ -1,13 +1,7 @@
1#ifndef _M68KNOMMU_PARAM_H 1#ifndef _M68KNOMMU_PARAM_H
2#define _M68KNOMMU_PARAM_H 2#define _M68KNOMMU_PARAM_H
3 3
4 4#define HZ CONFIG_HZ
5#if defined(CONFIG_CLEOPATRA)
6#define HZ 1000
7#endif
8#ifndef HZ
9#define HZ 100
10#endif
11 5
12#ifdef __KERNEL__ 6#ifdef __KERNEL__
13#define USER_HZ HZ 7#define USER_HZ HZ
diff --git a/include/asm-mips/a.out.h b/include/asm-mips/a.out.h
index bf55a5b34bef..cad8371422ab 100644
--- a/include/asm-mips/a.out.h
+++ b/include/asm-mips/a.out.h
@@ -32,17 +32,4 @@ struct exec
32#define N_DRSIZE(a) ((a).a_drsize) 32#define N_DRSIZE(a) ((a).a_drsize)
33#define N_SYMSIZE(a) ((a).a_syms) 33#define N_SYMSIZE(a) ((a).a_syms)
34 34
35#ifdef __KERNEL__
36
37#ifdef CONFIG_32BIT
38#define STACK_TOP TASK_SIZE
39#endif
40#ifdef CONFIG_64BIT
41#define STACK_TOP \
42 (test_thread_flag(TIF_32BIT_ADDR) ? TASK_SIZE32 : TASK_SIZE)
43#endif
44#define STACK_TOP_MAX TASK_SIZE
45
46#endif
47
48#endif /* _ASM_A_OUT_H */ 35#endif /* _ASM_A_OUT_H */
diff --git a/include/asm-mips/page.h b/include/asm-mips/page.h
index 635aa44d2290..8735aa0b8963 100644
--- a/include/asm-mips/page.h
+++ b/include/asm-mips/page.h
@@ -90,6 +90,7 @@ typedef struct { unsigned long pte; } pte_t;
90#define pte_val(x) ((x).pte) 90#define pte_val(x) ((x).pte)
91#define __pte(x) ((pte_t) { (x) } ) 91#define __pte(x) ((pte_t) { (x) } )
92#endif 92#endif
93typedef struct page *pgtable_t;
93 94
94/* 95/*
95 * For 3-level pagetables we defines these ourselves, for 2-level the 96 * For 3-level pagetables we defines these ourselves, for 2-level the
diff --git a/include/asm-mips/pgalloc.h b/include/asm-mips/pgalloc.h
index c4efeced8396..1275831dda29 100644
--- a/include/asm-mips/pgalloc.h
+++ b/include/asm-mips/pgalloc.h
@@ -20,10 +20,11 @@ static inline void pmd_populate_kernel(struct mm_struct *mm, pmd_t *pmd,
20} 20}
21 21
22static inline void pmd_populate(struct mm_struct *mm, pmd_t *pmd, 22static inline void pmd_populate(struct mm_struct *mm, pmd_t *pmd,
23 struct page *pte) 23 pgtable_t pte)
24{ 24{
25 set_pmd(pmd, __pmd((unsigned long)page_address(pte))); 25 set_pmd(pmd, __pmd((unsigned long)page_address(pte)));
26} 26}
27#define pmd_pgtable(pmd) pmd_page(pmd)
27 28
28/* 29/*
29 * Initialize a new pmd table with invalid pointers. 30 * Initialize a new pmd table with invalid pointers.
@@ -79,9 +80,10 @@ static inline struct page *pte_alloc_one(struct mm_struct *mm,
79 struct page *pte; 80 struct page *pte;
80 81
81 pte = alloc_pages(GFP_KERNEL | __GFP_REPEAT, PTE_ORDER); 82 pte = alloc_pages(GFP_KERNEL | __GFP_REPEAT, PTE_ORDER);
82 if (pte) 83 if (pte) {
83 clear_highpage(pte); 84 clear_highpage(pte);
84 85 pgtable_page_ctor(pte);
86 }
85 return pte; 87 return pte;
86} 88}
87 89
@@ -90,12 +92,17 @@ static inline void pte_free_kernel(struct mm_struct *mm, pte_t *pte)
90 free_pages((unsigned long)pte, PTE_ORDER); 92 free_pages((unsigned long)pte, PTE_ORDER);
91} 93}
92 94
93static inline void pte_free(struct mm_struct *mm, struct page *pte) 95static inline void pte_free(struct mm_struct *mm, pgtable_t pte)
94{ 96{
97 pgtable_page_dtor(pte);
95 __free_pages(pte, PTE_ORDER); 98 __free_pages(pte, PTE_ORDER);
96} 99}
97 100
98#define __pte_free_tlb(tlb, pte) tlb_remove_page((tlb), (pte)) 101#define __pte_free_tlb(tlb,pte) \
102do { \
103 pgtable_page_dtor(pte); \
104 tlb_remove_page((tlb), pte); \
105} while (0)
99 106
100#ifdef CONFIG_32BIT 107#ifdef CONFIG_32BIT
101 108
diff --git a/include/asm-mips/posix_types.h b/include/asm-mips/posix_types.h
index c2e8a0070daf..c200102c8586 100644
--- a/include/asm-mips/posix_types.h
+++ b/include/asm-mips/posix_types.h
@@ -69,7 +69,7 @@ typedef struct {
69#endif 69#endif
70} __kernel_fsid_t; 70} __kernel_fsid_t;
71 71
72#if defined(__KERNEL__) || !defined(__GLIBC__) || (__GLIBC__ < 2) 72#if defined(__KERNEL__)
73 73
74#undef __FD_SET 74#undef __FD_SET
75static __inline__ void __FD_SET(unsigned long __fd, __kernel_fd_set *__fdsetp) 75static __inline__ void __FD_SET(unsigned long __fd, __kernel_fd_set *__fdsetp)
@@ -139,6 +139,6 @@ static __inline__ void __FD_ZERO(__kernel_fd_set *__p)
139 } 139 }
140} 140}
141 141
142#endif /* defined(__KERNEL__) || !defined(__GLIBC__) || (__GLIBC__ < 2) */ 142#endif /* defined(__KERNEL__) */
143 143
144#endif /* _ASM_POSIX_TYPES_H */ 144#endif /* _ASM_POSIX_TYPES_H */
diff --git a/include/asm-mips/processor.h b/include/asm-mips/processor.h
index 36f42de59409..58cbac5a64e4 100644
--- a/include/asm-mips/processor.h
+++ b/include/asm-mips/processor.h
@@ -39,6 +39,7 @@ extern unsigned int vced_count, vcei_count;
39 * so don't change it unless you know what you are doing. 39 * so don't change it unless you know what you are doing.
40 */ 40 */
41#define TASK_SIZE 0x7fff8000UL 41#define TASK_SIZE 0x7fff8000UL
42#define STACK_TOP TASK_SIZE
42 43
43/* 44/*
44 * This decides where the kernel will search for a free chunk of vm 45 * This decides where the kernel will search for a free chunk of vm
@@ -57,6 +58,8 @@ extern unsigned int vced_count, vcei_count;
57 */ 58 */
58#define TASK_SIZE32 0x7fff8000UL 59#define TASK_SIZE32 0x7fff8000UL
59#define TASK_SIZE 0x10000000000UL 60#define TASK_SIZE 0x10000000000UL
61#define STACK_TOP \
62 (test_thread_flag(TIF_32BIT_ADDR) ? TASK_SIZE32 : TASK_SIZE)
60 63
61/* 64/*
62 * This decides where the kernel will search for a free chunk of vm 65 * This decides where the kernel will search for a free chunk of vm
@@ -69,6 +72,10 @@ extern unsigned int vced_count, vcei_count;
69 (test_tsk_thread_flag(tsk, TIF_32BIT_ADDR) ? TASK_SIZE32 : TASK_SIZE) 72 (test_tsk_thread_flag(tsk, TIF_32BIT_ADDR) ? TASK_SIZE32 : TASK_SIZE)
70#endif 73#endif
71 74
75#ifdef __KERNEL__
76#define STACK_TOP_MAX TASK_SIZE
77#endif
78
72#define NUM_FPU_REGS 32 79#define NUM_FPU_REGS 32
73 80
74typedef __u64 fpureg_t; 81typedef __u64 fpureg_t;
diff --git a/include/asm-mn10300/.gitignore b/include/asm-mn10300/.gitignore
new file mode 100644
index 000000000000..0f87ba790e26
--- /dev/null
+++ b/include/asm-mn10300/.gitignore
@@ -0,0 +1,2 @@
1proc
2unit
diff --git a/include/asm-mn10300/Kbuild b/include/asm-mn10300/Kbuild
new file mode 100644
index 000000000000..79384c537dc6
--- /dev/null
+++ b/include/asm-mn10300/Kbuild
@@ -0,0 +1,5 @@
1include include/asm-generic/Kbuild.asm
2
3unifdef-y += termios.h
4unifdef-y += ptrace.h
5unifdef-y += page.h
diff --git a/include/asm-mn10300/atomic.h b/include/asm-mn10300/atomic.h
new file mode 100644
index 000000000000..27c9690b9574
--- /dev/null
+++ b/include/asm-mn10300/atomic.h
@@ -0,0 +1,166 @@
1/* MN10300 Atomic counter operations
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_ATOMIC_H
12#define _ASM_ATOMIC_H
13
14#ifdef CONFIG_SMP
15#error not SMP safe
16#endif
17
18/*
19 * Atomic operations that C can't guarantee us. Useful for
20 * resource counting etc..
21 */
22
23/*
24 * Make sure gcc doesn't try to be clever and move things around
25 * on us. We need to use _exactly_ the address the user gave us,
26 * not some alias that contains the same information.
27 */
28typedef struct {
29 int counter;
30} atomic_t;
31
32#define ATOMIC_INIT(i) { (i) }
33
34#ifdef __KERNEL__
35
36/**
37 * atomic_read - read atomic variable
38 * @v: pointer of type atomic_t
39 *
40 * Atomically reads the value of @v. Note that the guaranteed
41 * useful range of an atomic_t is only 24 bits.
42 */
43#define atomic_read(v) ((v)->counter)
44
45/**
46 * atomic_set - set atomic variable
47 * @v: pointer of type atomic_t
48 * @i: required value
49 *
50 * Atomically sets the value of @v to @i. Note that the guaranteed
51 * useful range of an atomic_t is only 24 bits.
52 */
53#define atomic_set(v, i) (((v)->counter) = (i))
54
55#include <asm/system.h>
56
57/**
58 * atomic_add_return - add integer to atomic variable
59 * @i: integer value to add
60 * @v: pointer of type atomic_t
61 *
62 * Atomically adds @i to @v and returns the result
63 * Note that the guaranteed useful range of an atomic_t is only 24 bits.
64 */
65static inline int atomic_add_return(int i, atomic_t *v)
66{
67 unsigned long flags;
68 int temp;
69
70 local_irq_save(flags);
71 temp = v->counter;
72 temp += i;
73 v->counter = temp;
74 local_irq_restore(flags);
75
76 return temp;
77}
78
79/**
80 * atomic_sub_return - subtract integer from atomic variable
81 * @i: integer value to subtract
82 * @v: pointer of type atomic_t
83 *
84 * Atomically subtracts @i from @v and returns the result
85 * Note that the guaranteed useful range of an atomic_t is only 24 bits.
86 */
87static inline int atomic_sub_return(int i, atomic_t *v)
88{
89 unsigned long flags;
90 int temp;
91
92 local_irq_save(flags);
93 temp = v->counter;
94 temp -= i;
95 v->counter = temp;
96 local_irq_restore(flags);
97
98 return temp;
99}
100
101static inline int atomic_add_negative(int i, atomic_t *v)
102{
103 return atomic_add_return(i, v) < 0;
104}
105
106static inline void atomic_add(int i, atomic_t *v)
107{
108 atomic_add_return(i, v);
109}
110
111static inline void atomic_sub(int i, atomic_t *v)
112{
113 atomic_sub_return(i, v);
114}
115
116static inline void atomic_inc(atomic_t *v)
117{
118 atomic_add_return(1, v);
119}
120
121static inline void atomic_dec(atomic_t *v)
122{
123 atomic_sub_return(1, v);
124}
125
126#define atomic_dec_return(v) atomic_sub_return(1, (v))
127#define atomic_inc_return(v) atomic_add_return(1, (v))
128
129#define atomic_sub_and_test(i, v) (atomic_sub_return((i), (v)) == 0)
130#define atomic_dec_and_test(v) (atomic_sub_return(1, (v)) == 0)
131#define atomic_inc_and_test(v) (atomic_add_return(1, (v)) == 0)
132
133#define atomic_add_unless(v, a, u) \
134({ \
135 int c, old; \
136 c = atomic_read(v); \
137 while (c != (u) && (old = atomic_cmpxchg((v), c, c + (a))) != c) \
138 c = old; \
139 c != (u); \
140})
141
142#define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0)
143
144static inline void atomic_clear_mask(unsigned long mask, unsigned long *addr)
145{
146 unsigned long flags;
147
148 mask = ~mask;
149 local_irq_save(flags);
150 *addr &= mask;
151 local_irq_restore(flags);
152}
153
154#define atomic_xchg(ptr, v) (xchg(&(ptr)->counter, (v)))
155#define atomic_cmpxchg(v, old, new) (cmpxchg(&((v)->counter), (old), (new)))
156
157/* Atomic operations are already serializing on MN10300??? */
158#define smp_mb__before_atomic_dec() barrier()
159#define smp_mb__after_atomic_dec() barrier()
160#define smp_mb__before_atomic_inc() barrier()
161#define smp_mb__after_atomic_inc() barrier()
162
163#include <asm-generic/atomic.h>
164
165#endif /* __KERNEL__ */
166#endif /* _ASM_ATOMIC_H */
diff --git a/include/asm-mn10300/auxvec.h b/include/asm-mn10300/auxvec.h
new file mode 100644
index 000000000000..4fdb60b2ae39
--- /dev/null
+++ b/include/asm-mn10300/auxvec.h
@@ -0,0 +1,4 @@
1#ifndef _ASM_AUXVEC_H
2#define _ASM_AUXVEC_H
3
4#endif
diff --git a/include/asm-mn10300/bitops.h b/include/asm-mn10300/bitops.h
new file mode 100644
index 000000000000..cc6d40c05cf3
--- /dev/null
+++ b/include/asm-mn10300/bitops.h
@@ -0,0 +1,229 @@
1/* MN10300 bit operations
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 *
11 * These have to be done with inline assembly: that way the bit-setting
12 * is guaranteed to be atomic. All bit operations return 0 if the bit
13 * was cleared before the operation and != 0 if it was not.
14 *
15 * bit 0 is the LSB of addr; bit 32 is the LSB of (addr+1).
16 */
17#ifndef __ASM_BITOPS_H
18#define __ASM_BITOPS_H
19
20#include <asm/cpu-regs.h>
21
22#define smp_mb__before_clear_bit() barrier()
23#define smp_mb__after_clear_bit() barrier()
24
25/*
26 * set bit
27 */
28#define __set_bit(nr, addr) \
29({ \
30 volatile unsigned char *_a = (unsigned char *)(addr); \
31 const unsigned shift = (nr) & 7; \
32 _a += (nr) >> 3; \
33 \
34 asm volatile("bset %2,(%1) # set_bit reg" \
35 : "=m"(*_a) \
36 : "a"(_a), "d"(1 << shift), "m"(*_a) \
37 : "memory", "cc"); \
38})
39
40#define set_bit(nr, addr) __set_bit((nr), (addr))
41
42/*
43 * clear bit
44 */
45#define ___clear_bit(nr, addr) \
46({ \
47 volatile unsigned char *_a = (unsigned char *)(addr); \
48 const unsigned shift = (nr) & 7; \
49 _a += (nr) >> 3; \
50 \
51 asm volatile("bclr %2,(%1) # clear_bit reg" \
52 : "=m"(*_a) \
53 : "a"(_a), "d"(1 << shift), "m"(*_a) \
54 : "memory", "cc"); \
55})
56
57#define clear_bit(nr, addr) ___clear_bit((nr), (addr))
58
59
60static inline void __clear_bit(int nr, volatile void *addr)
61{
62 unsigned int *a = (unsigned int *) addr;
63 int mask;
64
65 a += nr >> 5;
66 mask = 1 << (nr & 0x1f);
67 *a &= ~mask;
68}
69
70/*
71 * test bit
72 */
73static inline int test_bit(int nr, const volatile void *addr)
74{
75 return 1UL & (((const unsigned int *) addr)[nr >> 5] >> (nr & 31));
76}
77
78/*
79 * change bit
80 */
81static inline void __change_bit(int nr, volatile void *addr)
82{
83 int mask;
84 unsigned int *a = (unsigned int *) addr;
85
86 a += nr >> 5;
87 mask = 1 << (nr & 0x1f);
88 *a ^= mask;
89}
90
91extern void change_bit(int nr, volatile void *addr);
92
93/*
94 * test and set bit
95 */
96#define __test_and_set_bit(nr,addr) \
97({ \
98 volatile unsigned char *_a = (unsigned char *)(addr); \
99 const unsigned shift = (nr) & 7; \
100 unsigned epsw; \
101 _a += (nr) >> 3; \
102 \
103 asm volatile("bset %3,(%2) # test_set_bit reg\n" \
104 "mov epsw,%1" \
105 : "=m"(*_a), "=d"(epsw) \
106 : "a"(_a), "d"(1 << shift), "m"(*_a) \
107 : "memory", "cc"); \
108 \
109 !(epsw & EPSW_FLAG_Z); \
110})
111
112#define test_and_set_bit(nr, addr) __test_and_set_bit((nr), (addr))
113
114/*
115 * test and clear bit
116 */
117#define __test_and_clear_bit(nr, addr) \
118({ \
119 volatile unsigned char *_a = (unsigned char *)(addr); \
120 const unsigned shift = (nr) & 7; \
121 unsigned epsw; \
122 _a += (nr) >> 3; \
123 \
124 asm volatile("bclr %3,(%2) # test_clear_bit reg\n" \
125 "mov epsw,%1" \
126 : "=m"(*_a), "=d"(epsw) \
127 : "a"(_a), "d"(1 << shift), "m"(*_a) \
128 : "memory", "cc"); \
129 \
130 !(epsw & EPSW_FLAG_Z); \
131})
132
133#define test_and_clear_bit(nr, addr) __test_and_clear_bit((nr), (addr))
134
135/*
136 * test and change bit
137 */
138static inline int __test_and_change_bit(int nr, volatile void *addr)
139{
140 int mask, retval;
141 unsigned int *a = (unsigned int *)addr;
142
143 a += nr >> 5;
144 mask = 1 << (nr & 0x1f);
145 retval = (mask & *a) != 0;
146 *a ^= mask;
147
148 return retval;
149}
150
151extern int test_and_change_bit(int nr, volatile void *addr);
152
153#include <asm-generic/bitops/lock.h>
154
155#ifdef __KERNEL__
156
157/**
158 * __ffs - find first bit set
159 * @x: the word to search
160 *
161 * - return 31..0 to indicate bit 31..0 most least significant bit set
162 * - if no bits are set in x, the result is undefined
163 */
164static inline __attribute__((const))
165unsigned long __ffs(unsigned long x)
166{
167 int bit;
168 asm("bsch %2,%0" : "=r"(bit) : "0"(0), "r"(x & -x));
169 return bit;
170}
171
172/*
173 * special slimline version of fls() for calculating ilog2_u32()
174 * - note: no protection against n == 0
175 */
176static inline __attribute__((const))
177int __ilog2_u32(u32 n)
178{
179 int bit;
180 asm("bsch %2,%0" : "=r"(bit) : "0"(0), "r"(n));
181 return bit;
182}
183
184/**
185 * fls - find last bit set
186 * @x: the word to search
187 *
188 * This is defined the same way as ffs:
189 * - return 32..1 to indicate bit 31..0 most significant bit set
190 * - return 0 to indicate no bits set
191 */
192static inline __attribute__((const))
193int fls(int x)
194{
195 return (x != 0) ? __ilog2_u32(x) + 1 : 0;
196}
197
198/**
199 * ffs - find first bit set
200 * @x: the word to search
201 *
202 * - return 32..1 to indicate bit 31..0 most least significant bit set
203 * - return 0 to indicate no bits set
204 */
205static inline __attribute__((const))
206int ffs(int x)
207{
208 /* Note: (x & -x) gives us a mask that is the least significant
209 * (rightmost) 1-bit of the value in x.
210 */
211 return fls(x & -x);
212}
213
214#include <asm-generic/bitops/ffz.h>
215#include <asm-generic/bitops/fls64.h>
216#include <asm-generic/bitops/find.h>
217#include <asm-generic/bitops/sched.h>
218#include <asm-generic/bitops/hweight.h>
219
220#define ext2_set_bit_atomic(lock, nr, addr) \
221 test_and_set_bit((nr) ^ 0x18, (addr))
222#define ext2_clear_bit_atomic(lock, nr, addr) \
223 test_and_clear_bit((nr) ^ 0x18, (addr))
224
225#include <asm-generic/bitops/ext2-non-atomic.h>
226#include <asm-generic/bitops/minix-le.h>
227
228#endif /* __KERNEL__ */
229#endif /* __ASM_BITOPS_H */
diff --git a/include/asm-mn10300/bug.h b/include/asm-mn10300/bug.h
new file mode 100644
index 000000000000..4fcf3384e259
--- /dev/null
+++ b/include/asm-mn10300/bug.h
@@ -0,0 +1,35 @@
1/* MN10300 Kernel bug reporting
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_BUG_H
12#define _ASM_BUG_H
13
14/*
15 * Tell the user there is some problem.
16 */
17#define _debug_bug_trap() \
18do { \
19 asm volatile( \
20 " syscall 15 \n" \
21 "0: \n" \
22 " .section __bug_table,\"a\" \n" \
23 " .long 0b,%0,%1 \n" \
24 " .previous \n" \
25 : \
26 : "i"(__FILE__), "i"(__LINE__) \
27 ); \
28} while (0)
29
30#define BUG() _debug_bug_trap()
31
32#define HAVE_ARCH_BUG
33#include <asm-generic/bug.h>
34
35#endif /* _ASM_BUG_H */
diff --git a/include/asm-mn10300/bugs.h b/include/asm-mn10300/bugs.h
new file mode 100644
index 000000000000..31c8bc592b47
--- /dev/null
+++ b/include/asm-mn10300/bugs.h
@@ -0,0 +1,20 @@
1/* MN10300 Checks for architecture-dependent bugs
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_BUGS_H
12#define _ASM_BUGS_H
13
14#include <asm/processor.h>
15
16static inline void __init check_bugs(void)
17{
18}
19
20#endif /* _ASM_BUGS_H */
diff --git a/include/asm-mn10300/busctl-regs.h b/include/asm-mn10300/busctl-regs.h
new file mode 100644
index 000000000000..1632aef73401
--- /dev/null
+++ b/include/asm-mn10300/busctl-regs.h
@@ -0,0 +1,151 @@
1/* AM33v2 on-board bus controller registers
2 *
3 * Copyright (C) 2002 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11
12#ifndef _ASM_BUSCTL_REGS_H
13#define _ASM_BUSCTL_REGS_H
14
15#include <asm/cpu-regs.h>
16
17#ifdef __KERNEL__
18
19/* bus controller registers */
20#define BCCR __SYSREG(0xc0002000, u32) /* bus controller control reg */
21#define BCCR_B0AD 0x00000003 /* block 0 (80000000-83ffffff) bus allocation */
22#define BCCR_B1AD 0x0000000c /* block 1 (84000000-87ffffff) bus allocation */
23#define BCCR_B2AD 0x00000030 /* block 2 (88000000-8bffffff) bus allocation */
24#define BCCR_B3AD 0x000000c0 /* block 3 (8c000000-8fffffff) bus allocation */
25#define BCCR_B4AD 0x00000300 /* block 4 (90000000-93ffffff) bus allocation */
26#define BCCR_B5AD 0x00000c00 /* block 5 (94000000-97ffffff) bus allocation */
27#define BCCR_B6AD 0x00003000 /* block 6 (98000000-9bffffff) bus allocation */
28#define BCCR_B7AD 0x0000c000 /* block 7 (9c000000-9fffffff) bus allocation */
29#define BCCR_BxAD_EXBUS 0x0 /* - direct to system bus controller */
30#define BCCR_BxAD_OPEXBUS 0x1 /* - direct to memory bus controller */
31#define BCCR_BxAD_OCMBUS 0x2 /* - direct to on chip memory */
32#define BCCR_API 0x00070000 /* bus arbitration priority */
33#define BCCR_API_DMACICD 0x00000000 /* - DMA > CI > CD */
34#define BCCR_API_DMACDCI 0x00010000 /* - DMA > CD > CI */
35#define BCCR_API_CICDDMA 0x00020000 /* - CI > CD > DMA */
36#define BCCR_API_CDCIDMA 0x00030000 /* - CD > CI > DMA */
37#define BCCR_API_ROUNDROBIN 0x00040000 /* - round robin */
38#define BCCR_BEPRI_DMACICD 0x00c00000 /* bus error address priority */
39#define BCCR_BEPRI_DMACDCI 0x00000000 /* - DMA > CI > CD */
40#define BCCR_BEPRI_CICDDMA 0x00400000 /* - DMA > CD > CI */
41#define BCCR_BEPRI_CDCIDMA 0x00800000 /* - CI > CD > DMA */
42#define BCCR_BEPRI 0x00c00000 /* - CD > CI > DMA */
43#define BCCR_TMON 0x03000000 /* timeout value settings */
44#define BCCR_TMON_16IOCLK 0x00000000 /* - 16 IOCLK cycles */
45#define BCCR_TMON_256IOCLK 0x01000000 /* - 256 IOCLK cycles */
46#define BCCR_TMON_4096IOCLK 0x02000000 /* - 4096 IOCLK cycles */
47#define BCCR_TMON_65536IOCLK 0x03000000 /* - 65536 IOCLK cycles */
48#define BCCR_TMOE 0x10000000 /* timeout detection enable */
49
50#define BCBERR __SYSREG(0xc0002010, u32) /* bus error source reg */
51#define BCBERR_BESB 0x0000001f /* erroneous access destination space */
52#define BCBERR_BESB_MON 0x00000001 /* - monitor space */
53#define BCBERR_BESB_IO 0x00000002 /* - IO bus */
54#define BCBERR_BESB_EX 0x00000004 /* - EX bus */
55#define BCBERR_BESB_OPEX 0x00000008 /* - OpEX bus */
56#define BCBERR_BESB_OCM 0x00000010 /* - on chip memory */
57#define BCBERR_BERW 0x00000100 /* type of access */
58#define BCBERR_BERW_WRITE 0x00000000 /* - write */
59#define BCBERR_BERW_READ 0x00000100 /* - read */
60#define BCBERR_BESD 0x00000200 /* error detector */
61#define BCBERR_BESD_BCU 0x00000000 /* - BCU detected error */
62#define BCBERR_BESD_SLAVE_BUS 0x00000200 /* - slave bus detected error */
63#define BCBERR_BEBST 0x00000400 /* type of access */
64#define BCBERR_BEBST_SINGLE 0x00000000 /* - single */
65#define BCBERR_BEBST_BURST 0x00000400 /* - burst */
66#define BCBERR_BEME 0x00000800 /* multiple bus error flag */
67#define BCBERR_BEMR 0x00007000 /* master bus that caused the error */
68#define BCBERR_BEMR_NOERROR 0x00000000 /* - no error */
69#define BCBERR_BEMR_CI 0x00001000 /* - CPU instruction fetch bus caused error */
70#define BCBERR_BEMR_CD 0x00002000 /* - CPU data bus caused error */
71#define BCBERR_BEMR_DMA 0x00004000 /* - DMA bus caused error */
72
73#define BCBEAR __SYSREGC(0xc0002020, u32) /* bus error address reg */
74
75/* system bus controller registers */
76#define SBBASE(X) __SYSREG(0xd8c00100 + (X) * 0x10, u32) /* SBC base addr regs */
77#define SBBASE_BE 0x00000001 /* bank enable */
78#define SBBASE_BAM 0x0000fffe /* bank address mask [31:17] */
79#define SBBASE_BBA 0xfffe0000 /* bank base address [31:17] */
80
81#define SBCNTRL0(X) __SYSREG(0xd8c00200 + (X) * 0x10, u32) /* SBC bank ctrl0 regs */
82#define SBCNTRL0_WEH 0x00000f00 /* write enable hold */
83#define SBCNTRL0_REH 0x0000f000 /* read enable hold */
84#define SBCNTRL0_RWH 0x000f0000 /* SRW signal hold */
85#define SBCNTRL0_CSH 0x00f00000 /* chip select hold */
86#define SBCNTRL0_DAH 0x0f000000 /* data hold */
87#define SBCNTRL0_ADH 0xf0000000 /* address hold */
88
89#define SBCNTRL1(X) __SYSREG(0xd8c00204 + (X) * 0x10, u32) /* SBC bank ctrl1 regs */
90#define SBCNTRL1_WED 0x00000f00 /* write enable delay */
91#define SBCNTRL1_RED 0x0000f000 /* read enable delay */
92#define SBCNTRL1_RWD 0x000f0000 /* SRW signal delay */
93#define SBCNTRL1_ASW 0x00f00000 /* address strobe width */
94#define SBCNTRL1_CSD 0x0f000000 /* chip select delay */
95#define SBCNTRL1_ASD 0xf0000000 /* address strobe delay */
96
97#define SBCNTRL2(X) __SYSREG(0xd8c00208 + (X) * 0x10, u32) /* SBC bank ctrl2 regs */
98#define SBCNTRL2_WC 0x000000ff /* wait count */
99#define SBCNTRL2_BWC 0x00000f00 /* burst wait count */
100#define SBCNTRL2_WM 0x01000000 /* wait mode setting */
101#define SBCNTRL2_WM_FIXEDWAIT 0x00000000 /* - fixed wait access */
102#define SBCNTRL2_WM_HANDSHAKE 0x01000000 /* - handshake access */
103#define SBCNTRL2_BM 0x02000000 /* bus synchronisation mode */
104#define SBCNTRL2_BM_SYNC 0x00000000 /* - synchronous mode */
105#define SBCNTRL2_BM_ASYNC 0x02000000 /* - asynchronous mode */
106#define SBCNTRL2_BW 0x04000000 /* bus width */
107#define SBCNTRL2_BW_32 0x00000000 /* - 32 bits */
108#define SBCNTRL2_BW_16 0x04000000 /* - 16 bits */
109#define SBCNTRL2_RWINV 0x08000000 /* R/W signal invert polarity */
110#define SBCNTRL2_RWINV_NORM 0x00000000 /* - normal (read high) */
111#define SBCNTRL2_RWINV_INV 0x08000000 /* - inverted (read low) */
112#define SBCNTRL2_BT 0x70000000 /* bus type setting */
113#define SBCNTRL2_BT_SRAM 0x00000000 /* - SRAM interface */
114#define SBCNTRL2_BT_ADMUX 0x00000000 /* - addr/data multiplexed interface */
115#define SBCNTRL2_BT_BROM 0x00000000 /* - burst ROM interface */
116#define SBCNTRL2_BTSE 0x80000000 /* burst enable */
117
118/* memory bus controller */
119#define SDBASE(X) __SYSREG(0xda000008 + (X) * 0x4, u32) /* MBC base addr regs */
120#define SDBASE_CE 0x00000001 /* chip enable */
121#define SDBASE_CBAM 0x0000fff0 /* chip base address mask [31:20] */
122#define SDBASE_CBAM_SHIFT 16
123#define SDBASE_CBA 0xfff00000 /* chip base address [31:20] */
124
125#define SDRAMBUS __SYSREG(0xda000000, u32) /* bus mode control reg */
126#define SDRAMBUS_REFEN 0x00000004 /* refresh enable */
127#define SDRAMBUS_TRC 0x00000018 /* refresh command delay time */
128#define SDRAMBUS_BSTPT 0x00000020 /* burst stop command enable */
129#define SDRAMBUS_PONSEQ 0x00000040 /* power on sequence */
130#define SDRAMBUS_SELFREQ 0x00000080 /* self-refresh mode request */
131#define SDRAMBUS_SELFON 0x00000100 /* self-refresh mode on */
132#define SDRAMBUS_SIZE 0x00030000 /* SDRAM size */
133#define SDRAMBUS_SIZE_64Mbit 0x00010000 /* 64Mbit SDRAM (x16) */
134#define SDRAMBUS_SIZE_128Mbit 0x00020000 /* 128Mbit SDRAM (x16) */
135#define SDRAMBUS_SIZE_256Mbit 0x00030000 /* 256Mbit SDRAM (x16) */
136#define SDRAMBUS_TRASWAIT 0x000c0000 /* row address precharge command cycle number */
137#define SDRAMBUS_REFNUM 0x00300000 /* refresh command number */
138#define SDRAMBUS_BSTWAIT 0x00c00000 /* burst stop command cycle */
139#define SDRAMBUS_SETWAIT 0x03000000 /* mode register setting command cycle */
140#define SDRAMBUS_PREWAIT 0x0c000000 /* precharge command cycle */
141#define SDRAMBUS_RASLATE 0x30000000 /* RAS latency */
142#define SDRAMBUS_CASLATE 0xc0000000 /* CAS latency */
143
144#define SDREFCNT __SYSREG(0xda000004, u32) /* refresh period reg */
145#define SDREFCNT_PERI 0x00000fff /* refresh period */
146
147#define SDSHDW __SYSREG(0xda000010, u32) /* test reg */
148
149#endif /* __KERNEL__ */
150
151#endif /* _ASM_BUSCTL_REGS_H */
diff --git a/include/asm-mn10300/byteorder.h b/include/asm-mn10300/byteorder.h
new file mode 100644
index 000000000000..3c993cc625f8
--- /dev/null
+++ b/include/asm-mn10300/byteorder.h
@@ -0,0 +1,46 @@
1/* MN10300 Byte-order primitive construction
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_BYTEORDER_H
12#define _ASM_BYTEORDER_H
13
14#include <asm/types.h>
15
16#ifdef __GNUC__
17
18static inline __attribute__((const))
19__u32 ___arch__swab32(__u32 x)
20{
21 __u32 ret;
22 asm("swap %1,%0" : "=r" (ret) : "r" (x));
23 return ret;
24}
25
26static inline __attribute__((const))
27__u16 ___arch__swab16(__u16 x)
28{
29 __u16 ret;
30 asm("swaph %1,%0" : "=r" (ret) : "r" (x));
31 return ret;
32}
33
34#define __arch__swab32(x) ___arch__swab32(x)
35#define __arch__swab16(x) ___arch__swab16(x)
36
37#if !defined(__STRICT_ANSI__) || defined(__KERNEL__)
38# define __BYTEORDER_HAS_U64__
39# define __SWAB_64_THRU_32__
40#endif
41
42#endif /* __GNUC__ */
43
44#include <linux/byteorder/little_endian.h>
45
46#endif /* _ASM_BYTEORDER_H */
diff --git a/include/asm-mn10300/cache.h b/include/asm-mn10300/cache.h
new file mode 100644
index 000000000000..9e01122208a9
--- /dev/null
+++ b/include/asm-mn10300/cache.h
@@ -0,0 +1,54 @@
1/* MN10300 cache management registers
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11
12#ifndef _ASM_CACHE_H
13#define _ASM_CACHE_H
14
15#include <asm/cpu-regs.h>
16#include <asm/proc/cache.h>
17
18#ifndef __ASSEMBLY__
19#define L1_CACHE_DISPARITY (L1_CACHE_NENTRIES * L1_CACHE_BYTES)
20#else
21#define L1_CACHE_DISPARITY L1_CACHE_NENTRIES * L1_CACHE_BYTES
22#endif
23
24/* data cache purge registers
25 * - read from the register to unconditionally purge that cache line
26 * - write address & 0xffffff00 to conditionally purge that cache line
27 * - clear LSB to request invalidation as well
28 */
29#define DCACHE_PURGE(WAY, ENTRY) \
30 __SYSREG(0xc8400000 + (WAY) * L1_CACHE_WAYDISP + \
31 (ENTRY) * L1_CACHE_BYTES, u32)
32
33#define DCACHE_PURGE_WAY0(ENTRY) \
34 __SYSREG(0xc8400000 + 0 * L1_CACHE_WAYDISP + (ENTRY) * L1_CACHE_BYTES, u32)
35#define DCACHE_PURGE_WAY1(ENTRY) \
36 __SYSREG(0xc8400000 + 1 * L1_CACHE_WAYDISP + (ENTRY) * L1_CACHE_BYTES, u32)
37#define DCACHE_PURGE_WAY2(ENTRY) \
38 __SYSREG(0xc8400000 + 2 * L1_CACHE_WAYDISP + (ENTRY) * L1_CACHE_BYTES, u32)
39#define DCACHE_PURGE_WAY3(ENTRY) \
40 __SYSREG(0xc8400000 + 3 * L1_CACHE_WAYDISP + (ENTRY) * L1_CACHE_BYTES, u32)
41
42/* instruction cache access registers */
43#define ICACHE_DATA(WAY, ENTRY, OFF) \
44 __SYSREG(0xc8000000 + (WAY) * L1_CACHE_WAYDISP + (ENTRY) * 0x10 + (OFF) * 4, u32)
45#define ICACHE_TAG(WAY, ENTRY) \
46 __SYSREG(0xc8100000 + (WAY) * L1_CACHE_WAYDISP + (ENTRY) * 0x10, u32)
47
48/* instruction cache access registers */
49#define DCACHE_DATA(WAY, ENTRY, OFF) \
50 __SYSREG(0xc8200000 + (WAY) * L1_CACHE_WAYDISP + (ENTRY) * 0x10 + (OFF) * 4, u32)
51#define DCACHE_TAG(WAY, ENTRY) \
52 __SYSREG(0xc8300000 + (WAY) * L1_CACHE_WAYDISP + (ENTRY) * 0x10, u32)
53
54#endif /* _ASM_CACHE_H */
diff --git a/include/asm-mn10300/cacheflush.h b/include/asm-mn10300/cacheflush.h
new file mode 100644
index 000000000000..2db746a251f8
--- /dev/null
+++ b/include/asm-mn10300/cacheflush.h
@@ -0,0 +1,116 @@
1/* MN10300 Cache flushing
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_CACHEFLUSH_H
12#define _ASM_CACHEFLUSH_H
13
14#ifndef __ASSEMBLY__
15
16/* Keep includes the same across arches. */
17#include <linux/mm.h>
18
19/*
20 * virtually-indexed cache managment (our cache is physically indexed)
21 */
22#define flush_cache_all() do {} while (0)
23#define flush_cache_mm(mm) do {} while (0)
24#define flush_cache_dup_mm(mm) do {} while (0)
25#define flush_cache_range(mm, start, end) do {} while (0)
26#define flush_cache_page(vma, vmaddr, pfn) do {} while (0)
27#define flush_cache_vmap(start, end) do {} while (0)
28#define flush_cache_vunmap(start, end) do {} while (0)
29#define flush_dcache_page(page) do {} while (0)
30#define flush_dcache_mmap_lock(mapping) do {} while (0)
31#define flush_dcache_mmap_unlock(mapping) do {} while (0)
32
33/*
34 * physically-indexed cache managment
35 */
36#ifndef CONFIG_MN10300_CACHE_DISABLED
37
38extern void flush_icache_range(unsigned long start, unsigned long end);
39extern void flush_icache_page(struct vm_area_struct *vma, struct page *pg);
40
41#else
42
43#define flush_icache_range(start, end) do {} while (0)
44#define flush_icache_page(vma, pg) do {} while (0)
45
46#endif
47
48#define flush_icache_user_range(vma, pg, adr, len) \
49 flush_icache_range(adr, adr + len)
50
51#define copy_to_user_page(vma, page, vaddr, dst, src, len) \
52 do { \
53 memcpy(dst, src, len); \
54 flush_icache_page(vma, page); \
55 } while (0)
56
57#define copy_from_user_page(vma, page, vaddr, dst, src, len) \
58 memcpy(dst, src, len)
59
60/*
61 * primitive routines
62 */
63#ifndef CONFIG_MN10300_CACHE_DISABLED
64extern void mn10300_icache_inv(void);
65extern void mn10300_dcache_inv(void);
66extern void mn10300_dcache_inv_page(unsigned start);
67extern void mn10300_dcache_inv_range(unsigned start, unsigned end);
68extern void mn10300_dcache_inv_range2(unsigned start, unsigned size);
69#ifdef CONFIG_MN10300_CACHE_WBACK
70extern void mn10300_dcache_flush(void);
71extern void mn10300_dcache_flush_page(unsigned start);
72extern void mn10300_dcache_flush_range(unsigned start, unsigned end);
73extern void mn10300_dcache_flush_range2(unsigned start, unsigned size);
74extern void mn10300_dcache_flush_inv(void);
75extern void mn10300_dcache_flush_inv_page(unsigned start);
76extern void mn10300_dcache_flush_inv_range(unsigned start, unsigned end);
77extern void mn10300_dcache_flush_inv_range2(unsigned start, unsigned size);
78#else
79#define mn10300_dcache_flush() do {} while (0)
80#define mn10300_dcache_flush_page(start) do {} while (0)
81#define mn10300_dcache_flush_range(start, end) do {} while (0)
82#define mn10300_dcache_flush_range2(start, size) do {} while (0)
83#define mn10300_dcache_flush_inv() mn10300_dcache_inv()
84#define mn10300_dcache_flush_inv_page(start) \
85 mn10300_dcache_inv_page((start))
86#define mn10300_dcache_flush_inv_range(start, end) \
87 mn10300_dcache_inv_range((start), (end))
88#define mn10300_dcache_flush_inv_range2(start, size) \
89 mn10300_dcache_inv_range2((start), (size))
90#endif /* CONFIG_MN10300_CACHE_WBACK */
91#else
92#define mn10300_icache_inv() do {} while (0)
93#define mn10300_dcache_inv() do {} while (0)
94#define mn10300_dcache_inv_page(start) do {} while (0)
95#define mn10300_dcache_inv_range(start, end) do {} while (0)
96#define mn10300_dcache_inv_range2(start, size) do {} while (0)
97#define mn10300_dcache_flush() do {} while (0)
98#define mn10300_dcache_flush_inv_page(start) do {} while (0)
99#define mn10300_dcache_flush_inv() do {} while (0)
100#define mn10300_dcache_flush_inv_range(start, end) do {} while (0)
101#define mn10300_dcache_flush_inv_range2(start, size) do {} while (0)
102#define mn10300_dcache_flush_page(start) do {} while (0)
103#define mn10300_dcache_flush_range(start, end) do {} while (0)
104#define mn10300_dcache_flush_range2(start, size) do {} while (0)
105#endif /* CONFIG_MN10300_CACHE_DISABLED */
106
107/*
108 * internal debugging function
109 */
110#ifdef CONFIG_DEBUG_PAGEALLOC
111extern void kernel_map_pages(struct page *page, int numpages, int enable);
112#endif
113
114#endif /* __ASSEMBLY__ */
115
116#endif /* _ASM_CACHEFLUSH_H */
diff --git a/include/asm-mn10300/checksum.h b/include/asm-mn10300/checksum.h
new file mode 100644
index 000000000000..9fb2a8d8826a
--- /dev/null
+++ b/include/asm-mn10300/checksum.h
@@ -0,0 +1,86 @@
1/* MN10300 Optimised checksumming code
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_CHECKSUM_H
12#define _ASM_CHECKSUM_H
13
14extern __wsum csum_partial(const void *buff, int len, __wsum sum);
15extern __wsum csum_partial_copy_nocheck(const void *src, void *dst,
16 int len, __wsum sum);
17extern __wsum csum_partial_copy_from_user(const void *src, void *dst,
18 int len, __wsum sum,
19 int *err_ptr);
20extern __sum16 ip_fast_csum(const void *iph, unsigned int ihl);
21extern __wsum csum_partial(const void *buff, int len, __wsum sum);
22extern __sum16 ip_compute_csum(const void *buff, int len);
23
24#define csum_partial_copy_fromuser csum_partial_copy
25extern __wsum csum_partial_copy(const void *src, void *dst, int len,
26 __wsum sum);
27
28static inline __sum16 csum_fold(__wsum sum)
29{
30 asm(
31 " add %1,%0 \n"
32 " addc 0xffff,%0 \n"
33 : "=r" (sum)
34 : "r" (sum << 16), "0" (sum & 0xffff0000)
35 : "cc"
36 );
37 return (~sum) >> 16;
38}
39
40static inline __wsum csum_tcpudp_nofold(unsigned long saddr,
41 unsigned long daddr,
42 unsigned short len,
43 unsigned short proto,
44 __wsum sum)
45{
46 __wsum tmp;
47
48 tmp = (__wsum) ntohs(len) << 16;
49 tmp += (__wsum) proto << 8;
50
51 asm(
52 " add %1,%0 \n"
53 " addc %2,%0 \n"
54 " addc %3,%0 \n"
55 " addc 0,%0 \n"
56 : "=r" (sum)
57 : "r" (daddr), "r"(saddr), "r"(tmp), "0"(sum)
58 : "cc"
59 );
60 return sum;
61}
62
63/*
64 * computes the checksum of the TCP/UDP pseudo-header
65 * returns a 16-bit checksum, already complemented
66 */
67static inline __sum16 csum_tcpudp_magic(unsigned long saddr,
68 unsigned long daddr,
69 unsigned short len,
70 unsigned short proto,
71 __wsum sum)
72{
73 return csum_fold(csum_tcpudp_nofold(saddr, daddr, len, proto, sum));
74}
75
76#undef _HAVE_ARCH_IPV6_CSUM
77
78/*
79 * Copy and checksum to user
80 */
81#define HAVE_CSUM_COPY_USER
82extern __wsum csum_and_copy_to_user(const void *src, void *dst, int len,
83 __wsum sum, int *err_ptr);
84
85
86#endif /* _ASM_CHECKSUM_H */
diff --git a/include/asm-mn10300/cpu-regs.h b/include/asm-mn10300/cpu-regs.h
new file mode 100644
index 000000000000..757e9b5388ea
--- /dev/null
+++ b/include/asm-mn10300/cpu-regs.h
@@ -0,0 +1,290 @@
1/* MN10300 Core system registers
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_CPU_REGS_H
12#define _ASM_CPU_REGS_H
13
14#ifndef __ASSEMBLY__
15#include <linux/types.h>
16#endif
17
18#ifdef CONFIG_MN10300_CPU_AM33V2
19/* we tell the compiler to pretend to be AM33 so that it doesn't try and use
20 * the FP regs, but tell the assembler that we're actually allowed AM33v2
21 * instructions */
22#ifndef __ASSEMBLY__
23asm(" .am33_2\n");
24#else
25.am33_2
26#endif
27#endif
28
29#ifdef __KERNEL__
30
31#ifndef __ASSEMBLY__
32#define __SYSREG(ADDR, TYPE) (*(volatile TYPE *)(ADDR))
33#define __SYSREGC(ADDR, TYPE) (*(const volatile TYPE *)(ADDR))
34#else
35#define __SYSREG(ADDR, TYPE) ADDR
36#define __SYSREGC(ADDR, TYPE) ADDR
37#endif
38
39/* CPU registers */
40#define EPSW_FLAG_Z 0x00000001 /* zero flag */
41#define EPSW_FLAG_N 0x00000002 /* negative flag */
42#define EPSW_FLAG_C 0x00000004 /* carry flag */
43#define EPSW_FLAG_V 0x00000008 /* overflow flag */
44#define EPSW_IM 0x00000700 /* interrupt mode */
45#define EPSW_IM_0 0x00000000 /* interrupt mode 0 */
46#define EPSW_IM_1 0x00000100 /* interrupt mode 1 */
47#define EPSW_IM_2 0x00000200 /* interrupt mode 2 */
48#define EPSW_IM_3 0x00000300 /* interrupt mode 3 */
49#define EPSW_IM_4 0x00000400 /* interrupt mode 4 */
50#define EPSW_IM_5 0x00000500 /* interrupt mode 5 */
51#define EPSW_IM_6 0x00000600 /* interrupt mode 6 */
52#define EPSW_IM_7 0x00000700 /* interrupt mode 7 */
53#define EPSW_IE 0x00000800 /* interrupt enable */
54#define EPSW_S 0x00003000 /* software auxilliary bits */
55#define EPSW_T 0x00008000 /* trace enable */
56#define EPSW_nSL 0x00010000 /* not supervisor level */
57#define EPSW_NMID 0x00020000 /* nonmaskable interrupt disable */
58#define EPSW_nAR 0x00040000 /* register bank control */
59#define EPSW_ML 0x00080000 /* monitor level */
60#define EPSW_FE 0x00100000 /* FPU enable */
61
62/* FPU registers */
63#define FPCR_EF_I 0x00000001 /* inexact result FPU exception flag */
64#define FPCR_EF_U 0x00000002 /* underflow FPU exception flag */
65#define FPCR_EF_O 0x00000004 /* overflow FPU exception flag */
66#define FPCR_EF_Z 0x00000008 /* zero divide FPU exception flag */
67#define FPCR_EF_V 0x00000010 /* invalid operand FPU exception flag */
68#define FPCR_EE_I 0x00000020 /* inexact result FPU exception enable */
69#define FPCR_EE_U 0x00000040 /* underflow FPU exception enable */
70#define FPCR_EE_O 0x00000080 /* overflow FPU exception enable */
71#define FPCR_EE_Z 0x00000100 /* zero divide FPU exception enable */
72#define FPCR_EE_V 0x00000200 /* invalid operand FPU exception enable */
73#define FPCR_EC_I 0x00000400 /* inexact result FPU exception cause */
74#define FPCR_EC_U 0x00000800 /* underflow FPU exception cause */
75#define FPCR_EC_O 0x00001000 /* overflow FPU exception cause */
76#define FPCR_EC_Z 0x00002000 /* zero divide FPU exception cause */
77#define FPCR_EC_V 0x00004000 /* invalid operand FPU exception cause */
78#define FPCR_RM 0x00030000 /* rounding mode */
79#define FPCR_RM_NEAREST 0x00000000 /* - round to nearest value */
80#define FPCR_FCC_U 0x00040000 /* FPU unordered condition code */
81#define FPCR_FCC_E 0x00080000 /* FPU equal condition code */
82#define FPCR_FCC_G 0x00100000 /* FPU greater than condition code */
83#define FPCR_FCC_L 0x00200000 /* FPU less than condition code */
84#define FPCR_INIT 0x00000000 /* no exceptions, rounding to nearest */
85
86/* CPU control registers */
87#define CPUP __SYSREG(0xc0000020, u16) /* CPU pipeline register */
88#define CPUP_DWBD 0x0020 /* write buffer disable flag */
89#define CPUP_IPFD 0x0040 /* instruction prefetch disable flag */
90#define CPUP_EXM 0x0080 /* exception operation mode */
91#define CPUP_EXM_AM33V1 0x0000 /* - AM33 v1 exception mode */
92#define CPUP_EXM_AM33V2 0x0080 /* - AM33 v2 exception mode */
93
94#define CPUM __SYSREG(0xc0000040, u16) /* CPU mode register */
95#define CPUM_SLEEP 0x0004 /* set to enter sleep state */
96#define CPUM_HALT 0x0008 /* set to enter halt state */
97#define CPUM_STOP 0x0010 /* set to enter stop state */
98
99#define CPUREV __SYSREGC(0xc0000050, u32) /* CPU revision register */
100#define CPUREV_TYPE 0x0000000f /* CPU type */
101#define CPUREV_TYPE_S 0
102#define CPUREV_TYPE_AM33V1 0x00000000 /* - AM33 V1 core, AM33/1.00 arch */
103#define CPUREV_TYPE_AM33V2 0x00000001 /* - AM33 V2 core, AM33/2.00 arch */
104#define CPUREV_TYPE_AM34V1 0x00000002 /* - AM34 V1 core, AM33/2.00 arch */
105#define CPUREV_REVISION 0x000000f0 /* CPU revision */
106#define CPUREV_REVISION_S 4
107#define CPUREV_ICWAY 0x00000f00 /* number of instruction cache ways */
108#define CPUREV_ICWAY_S 8
109#define CPUREV_ICSIZE 0x0000f000 /* instruction cache way size */
110#define CPUREV_ICSIZE_S 12
111#define CPUREV_DCWAY 0x000f0000 /* number of data cache ways */
112#define CPUREV_DCWAY_S 16
113#define CPUREV_DCSIZE 0x00f00000 /* data cache way size */
114#define CPUREV_DCSIZE_S 20
115#define CPUREV_FPUTYPE 0x0f000000 /* FPU core type */
116#define CPUREV_FPUTYPE_NONE 0x00000000 /* - no FPU core implemented */
117#define CPUREV_OCDCTG 0xf0000000 /* on-chip debug function category */
118
119#define DCR __SYSREG(0xc0000030, u16) /* Debug control register */
120
121/* interrupt/exception control registers */
122#define IVAR0 __SYSREG(0xc0000000, u16) /* interrupt vector 0 */
123#define IVAR1 __SYSREG(0xc0000004, u16) /* interrupt vector 1 */
124#define IVAR2 __SYSREG(0xc0000008, u16) /* interrupt vector 2 */
125#define IVAR3 __SYSREG(0xc000000c, u16) /* interrupt vector 3 */
126#define IVAR4 __SYSREG(0xc0000010, u16) /* interrupt vector 4 */
127#define IVAR5 __SYSREG(0xc0000014, u16) /* interrupt vector 5 */
128#define IVAR6 __SYSREG(0xc0000018, u16) /* interrupt vector 6 */
129
130#define TBR __SYSREG(0xc0000024, u32) /* Trap table base */
131#define TBR_TB 0xff000000 /* table base address bits 31-24 */
132#define TBR_INT_CODE 0x00ffffff /* interrupt code */
133
134#define DEAR __SYSREG(0xc0000038, u32) /* Data access exception address */
135
136#define sISR __SYSREG(0xc0000044, u32) /* Supervisor interrupt status */
137#define sISR_IRQICE 0x00000001 /* ICE interrupt */
138#define sISR_ISTEP 0x00000002 /* single step interrupt */
139#define sISR_MISSA 0x00000004 /* memory access address misalignment fault */
140#define sISR_UNIMP 0x00000008 /* unimplemented instruction execution fault */
141#define sISR_PIEXE 0x00000010 /* program interrupt */
142#define sISR_MEMERR 0x00000020 /* illegal memory access fault */
143#define sISR_IBREAK 0x00000040 /* instraction break interrupt */
144#define sISR_DBSRL 0x00000080 /* debug serial interrupt */
145#define sISR_PERIDB 0x00000100 /* peripheral debug interrupt */
146#define sISR_EXUNIMP 0x00000200 /* unimplemented ex-instruction execution fault */
147#define sISR_OBREAK 0x00000400 /* operand break interrupt */
148#define sISR_PRIV 0x00000800 /* privileged instruction execution fault */
149#define sISR_BUSERR 0x00001000 /* bus error fault */
150#define sISR_DBLFT 0x00002000 /* double fault */
151#define sISR_DBG 0x00008000 /* debug reserved interrupt */
152#define sISR_ITMISS 0x00010000 /* instruction TLB miss */
153#define sISR_DTMISS 0x00020000 /* data TLB miss */
154#define sISR_ITEX 0x00040000 /* instruction TLB access exception */
155#define sISR_DTEX 0x00080000 /* data TLB access exception */
156#define sISR_ILGIA 0x00100000 /* illegal instruction access exception */
157#define sISR_ILGDA 0x00200000 /* illegal data access exception */
158#define sISR_IOIA 0x00400000 /* internal I/O space instruction access excep */
159#define sISR_PRIVA 0x00800000 /* privileged space instruction access excep */
160#define sISR_PRIDA 0x01000000 /* privileged space data access excep */
161#define sISR_DISA 0x02000000 /* data space instruction access excep */
162#define sISR_SYSC 0x04000000 /* system call instruction excep */
163#define sISR_FPUD 0x08000000 /* FPU disabled excep */
164#define sISR_FPUUI 0x10000000 /* FPU unimplemented instruction excep */
165#define sISR_FPUOP 0x20000000 /* FPU operation excep */
166#define sISR_NE 0x80000000 /* multiple synchronous exceptions excep */
167
168/* cache control registers */
169#define CHCTR __SYSREG(0xc0000070, u16) /* cache control */
170#define CHCTR_ICEN 0x0001 /* instruction cache enable */
171#define CHCTR_DCEN 0x0002 /* data cache enable */
172#define CHCTR_ICBUSY 0x0004 /* instruction cache busy */
173#define CHCTR_DCBUSY 0x0008 /* data cache busy */
174#define CHCTR_ICINV 0x0010 /* instruction cache invalidate */
175#define CHCTR_DCINV 0x0020 /* data cache invalidate */
176#define CHCTR_DCWTMD 0x0040 /* data cache writing mode */
177#define CHCTR_DCWTMD_WRBACK 0x0000 /* - write back mode */
178#define CHCTR_DCWTMD_WRTHROUGH 0x0040 /* - write through mode */
179#define CHCTR_DCALMD 0x0080 /* data cache allocation mode */
180#define CHCTR_ICWMD 0x0f00 /* instruction cache way mode */
181#define CHCTR_DCWMD 0xf000 /* data cache way mode */
182
183/* MMU control registers */
184#define MMUCTR __SYSREG(0xc0000090, u32) /* MMU control register */
185#define MMUCTR_IRP 0x0000003f /* instruction TLB replace pointer */
186#define MMUCTR_ITE 0x00000040 /* instruction TLB enable */
187#define MMUCTR_IIV 0x00000080 /* instruction TLB invalidate */
188#define MMUCTR_ITL 0x00000700 /* instruction TLB lock pointer */
189#define MMUCTR_ITL_NOLOCK 0x00000000 /* - no lock */
190#define MMUCTR_ITL_LOCK0 0x00000100 /* - entry 0 locked */
191#define MMUCTR_ITL_LOCK0_1 0x00000200 /* - entry 0-1 locked */
192#define MMUCTR_ITL_LOCK0_3 0x00000300 /* - entry 0-3 locked */
193#define MMUCTR_ITL_LOCK0_7 0x00000400 /* - entry 0-7 locked */
194#define MMUCTR_ITL_LOCK0_15 0x00000500 /* - entry 0-15 locked */
195#define MMUCTR_CE 0x00008000 /* cacheable bit enable */
196#define MMUCTR_DRP 0x003f0000 /* data TLB replace pointer */
197#define MMUCTR_DTE 0x00400000 /* data TLB enable */
198#define MMUCTR_DIV 0x00800000 /* data TLB invalidate */
199#define MMUCTR_DTL 0x07000000 /* data TLB lock pointer */
200#define MMUCTR_DTL_NOLOCK 0x00000000 /* - no lock */
201#define MMUCTR_DTL_LOCK0 0x01000000 /* - entry 0 locked */
202#define MMUCTR_DTL_LOCK0_1 0x02000000 /* - entry 0-1 locked */
203#define MMUCTR_DTL_LOCK0_3 0x03000000 /* - entry 0-3 locked */
204#define MMUCTR_DTL_LOCK0_7 0x04000000 /* - entry 0-7 locked */
205#define MMUCTR_DTL_LOCK0_15 0x05000000 /* - entry 0-15 locked */
206
207#define PIDR __SYSREG(0xc0000094, u16) /* PID register */
208#define PIDR_PID 0x00ff /* process identifier */
209
210#define PTBR __SYSREG(0xc0000098, unsigned long) /* Page table base register */
211
212#define IPTEL __SYSREG(0xc00000a0, u32) /* instruction TLB entry */
213#define DPTEL __SYSREG(0xc00000b0, u32) /* data TLB entry */
214#define xPTEL_V 0x00000001 /* TLB entry valid */
215#define xPTEL_UNUSED1 0x00000002 /* unused bit */
216#define xPTEL_UNUSED2 0x00000004 /* unused bit */
217#define xPTEL_C 0x00000008 /* cached if set */
218#define xPTEL_PV 0x00000010 /* page valid */
219#define xPTEL_D 0x00000020 /* dirty */
220#define xPTEL_PR 0x000001c0 /* page protection */
221#define xPTEL_PR_ROK 0x00000000 /* - R/O kernel */
222#define xPTEL_PR_RWK 0x00000100 /* - R/W kernel */
223#define xPTEL_PR_ROK_ROU 0x00000080 /* - R/O kernel and R/O user */
224#define xPTEL_PR_RWK_ROU 0x00000180 /* - R/W kernel and R/O user */
225#define xPTEL_PR_RWK_RWU 0x000001c0 /* - R/W kernel and R/W user */
226#define xPTEL_G 0x00000200 /* global (use PID if 0) */
227#define xPTEL_PS 0x00000c00 /* page size */
228#define xPTEL_PS_4Kb 0x00000000 /* - 4Kb page */
229#define xPTEL_PS_128Kb 0x00000400 /* - 128Kb page */
230#define xPTEL_PS_1Kb 0x00000800 /* - 1Kb page */
231#define xPTEL_PS_4Mb 0x00000c00 /* - 4Mb page */
232#define xPTEL_PPN 0xfffff006 /* physical page number */
233
234#define xPTEL_V_BIT 0 /* bit numbers corresponding to above masks */
235#define xPTEL_UNUSED1_BIT 1
236#define xPTEL_UNUSED2_BIT 2
237#define xPTEL_C_BIT 3
238#define xPTEL_PV_BIT 4
239#define xPTEL_D_BIT 5
240#define xPTEL_G_BIT 9
241
242#define IPTEU __SYSREG(0xc00000a4, u32) /* instruction TLB virtual addr */
243#define DPTEU __SYSREG(0xc00000b4, u32) /* data TLB virtual addr */
244#define xPTEU_VPN 0xfffffc00 /* virtual page number */
245#define xPTEU_PID 0x000000ff /* process identifier to which applicable */
246
247#define IPTEL2 __SYSREG(0xc00000a8, u32) /* instruction TLB entry */
248#define DPTEL2 __SYSREG(0xc00000b8, u32) /* data TLB entry */
249#define xPTEL2_V 0x00000001 /* TLB entry valid */
250#define xPTEL2_C 0x00000002 /* cacheable */
251#define xPTEL2_PV 0x00000004 /* page valid */
252#define xPTEL2_D 0x00000008 /* dirty */
253#define xPTEL2_PR 0x00000070 /* page protection */
254#define xPTEL2_PR_ROK 0x00000000 /* - R/O kernel */
255#define xPTEL2_PR_RWK 0x00000040 /* - R/W kernel */
256#define xPTEL2_PR_ROK_ROU 0x00000020 /* - R/O kernel and R/O user */
257#define xPTEL2_PR_RWK_ROU 0x00000060 /* - R/W kernel and R/O user */
258#define xPTEL2_PR_RWK_RWU 0x00000070 /* - R/W kernel and R/W user */
259#define xPTEL2_G 0x00000080 /* global (use PID if 0) */
260#define xPTEL2_PS 0x00000300 /* page size */
261#define xPTEL2_PS_4Kb 0x00000000 /* - 4Kb page */
262#define xPTEL2_PS_128Kb 0x00000100 /* - 128Kb page */
263#define xPTEL2_PS_1Kb 0x00000200 /* - 1Kb page */
264#define xPTEL2_PS_4Mb 0x00000300 /* - 4Mb page */
265#define xPTEL2_PPN 0xfffffc00 /* physical page number */
266
267#define MMUFCR __SYSREGC(0xc000009c, u32) /* MMU exception cause */
268#define MMUFCR_IFC __SYSREGC(0xc000009c, u16) /* MMU instruction excep cause */
269#define MMUFCR_DFC __SYSREGC(0xc000009e, u16) /* MMU data exception cause */
270#define MMUFCR_xFC_TLBMISS 0x0001 /* TLB miss flag */
271#define MMUFCR_xFC_INITWR 0x0002 /* initial write excep flag */
272#define MMUFCR_xFC_PGINVAL 0x0004 /* page invalid excep flag */
273#define MMUFCR_xFC_PROTVIOL 0x0008 /* protection violation excep flag */
274#define MMUFCR_xFC_ACCESS 0x0010 /* access level flag */
275#define MMUFCR_xFC_ACCESS_USR 0x0000 /* - user mode */
276#define MMUFCR_xFC_ACCESS_SR 0x0010 /* - supervisor mode */
277#define MMUFCR_xFC_TYPE 0x0020 /* access type flag */
278#define MMUFCR_xFC_TYPE_READ 0x0000 /* - read */
279#define MMUFCR_xFC_TYPE_WRITE 0x0020 /* - write */
280#define MMUFCR_xFC_PR 0x01c0 /* page protection flag */
281#define MMUFCR_xFC_PR_ROK 0x0000 /* - R/O kernel */
282#define MMUFCR_xFC_PR_RWK 0x0100 /* - R/W kernel */
283#define MMUFCR_xFC_PR_ROK_ROU 0x0080 /* - R/O kernel and R/O user */
284#define MMUFCR_xFC_PR_RWK_ROU 0x0180 /* - R/W kernel and R/O user */
285#define MMUFCR_xFC_PR_RWK_RWU 0x01c0 /* - R/W kernel and R/W user */
286#define MMUFCR_xFC_ILLADDR 0x0200 /* illegal address excep flag */
287
288#endif /* __KERNEL__ */
289
290#endif /* _ASM_CPU_REGS_H */
diff --git a/include/asm-mn10300/cputime.h b/include/asm-mn10300/cputime.h
new file mode 100644
index 000000000000..6d68ad7e0ea3
--- /dev/null
+++ b/include/asm-mn10300/cputime.h
@@ -0,0 +1 @@
#include <asm-generic/cputime.h>
diff --git a/include/asm-mn10300/current.h b/include/asm-mn10300/current.h
new file mode 100644
index 000000000000..ca6027d83743
--- /dev/null
+++ b/include/asm-mn10300/current.h
@@ -0,0 +1,37 @@
1/* MN10300 Current task structure accessor
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_CURRENT_H
12#define _ASM_CURRENT_H
13
14#include <linux/thread_info.h>
15
16/*
17 * dedicate E2 to keeping the current task pointer
18 */
19#ifdef CONFIG_MN10300_CURRENT_IN_E2
20
21register struct task_struct *const current asm("e2") __attribute__((used));
22
23#define get_current() current
24
25extern struct task_struct *__current;
26
27#else
28static inline __attribute__((const))
29struct task_struct *get_current(void)
30{
31 return current_thread_info()->task;
32}
33
34#define current get_current()
35#endif
36
37#endif /* _ASM_CURRENT_H */
diff --git a/include/asm-mn10300/delay.h b/include/asm-mn10300/delay.h
new file mode 100644
index 000000000000..34517b359399
--- /dev/null
+++ b/include/asm-mn10300/delay.h
@@ -0,0 +1,19 @@
1/* MN10300 Uninterruptible delay routines
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_DELAY_H
12#define _ASM_DELAY_H
13
14extern void __udelay(unsigned long usecs);
15extern void __delay(unsigned long loops);
16
17#define udelay(n) __udelay(n)
18
19#endif /* _ASM_DELAY_H */
diff --git a/include/asm-mn10300/device.h b/include/asm-mn10300/device.h
new file mode 100644
index 000000000000..f0a4c256403b
--- /dev/null
+++ b/include/asm-mn10300/device.h
@@ -0,0 +1 @@
#include <asm-generic/device.h>
diff --git a/include/asm-mn10300/div64.h b/include/asm-mn10300/div64.h
new file mode 100644
index 000000000000..bf9c515a998c
--- /dev/null
+++ b/include/asm-mn10300/div64.h
@@ -0,0 +1,103 @@
1/* MN10300 64-bit division
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_DIV64
12#define _ASM_DIV64
13
14#include <linux/types.h>
15
16extern void ____unhandled_size_in_do_div___(void);
17
18/*
19 * divide n by base, leaving the result in n and returning the remainder
20 * - we can do this quite efficiently on the MN10300 by cascading the divides
21 * through the MDR register
22 */
23#define do_div(n, base) \
24({ \
25 unsigned __rem = 0; \
26 if (sizeof(n) <= 4) { \
27 asm("mov %1,mdr \n" \
28 "divu %2,%0 \n" \
29 "mov mdr,%1 \n" \
30 : "+r"(n), "=d"(__rem) \
31 : "r"(base), "1"(__rem) \
32 : "cc" \
33 ); \
34 } else if (sizeof(n) <= 8) { \
35 union { \
36 unsigned long long l; \
37 u32 w[2]; \
38 } __quot; \
39 __quot.l = n; \
40 asm("mov %0,mdr \n" /* MDR = 0 */ \
41 "divu %3,%1 \n" \
42 /* __quot.MSL = __div.MSL / base, */ \
43 /* MDR = MDR:__div.MSL % base */ \
44 "divu %3,%2 \n" \
45 /* __quot.LSL = MDR:__div.LSL / base, */ \
46 /* MDR = MDR:__div.LSL % base */ \
47 "mov mdr,%0 \n" \
48 : "=d"(__rem), "=r"(__quot.w[1]), "=r"(__quot.w[0]) \
49 : "r"(base), "0"(__rem), "1"(__quot.w[1]), \
50 "2"(__quot.w[0]) \
51 : "cc" \
52 ); \
53 n = __quot.l; \
54 } else { \
55 ____unhandled_size_in_do_div___(); \
56 } \
57 __rem; \
58})
59
60/*
61 * do an unsigned 32-bit multiply and divide with intermediate 64-bit product
62 * so as not to lose accuracy
63 * - we use the MDR register to hold the MSW of the product
64 */
65static inline __attribute__((const))
66unsigned __muldiv64u(unsigned val, unsigned mult, unsigned div)
67{
68 unsigned result;
69
70 asm("mulu %2,%0 \n" /* MDR:val = val*mult */
71 "divu %3,%0 \n" /* val = MDR:val/div;
72 * MDR = MDR:val%div */
73 : "=r"(result)
74 : "0"(val), "ir"(mult), "r"(div)
75 );
76
77 return result;
78}
79
80/*
81 * do a signed 32-bit multiply and divide with intermediate 64-bit product so
82 * as not to lose accuracy
83 * - we use the MDR register to hold the MSW of the product
84 */
85static inline __attribute__((const))
86signed __muldiv64s(signed val, signed mult, signed div)
87{
88 signed result;
89
90 asm("mul %2,%0 \n" /* MDR:val = val*mult */
91 "div %3,%0 \n" /* val = MDR:val/div;
92 * MDR = MDR:val%div */
93 : "=r"(result)
94 : "0"(val), "ir"(mult), "r"(div)
95 );
96
97 return result;
98}
99
100extern __attribute__((const))
101uint64_t div64_64(uint64_t dividend, uint64_t divisor);
102
103#endif /* _ASM_DIV64 */
diff --git a/include/asm-mn10300/dma-mapping.h b/include/asm-mn10300/dma-mapping.h
new file mode 100644
index 000000000000..7c882fca9ec8
--- /dev/null
+++ b/include/asm-mn10300/dma-mapping.h
@@ -0,0 +1,234 @@
1/* DMA mapping routines for the MN10300 arch
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_DMA_MAPPING_H
12#define _ASM_DMA_MAPPING_H
13
14#include <linux/mm.h>
15#include <linux/scatterlist.h>
16
17#include <asm/cache.h>
18#include <asm/io.h>
19
20extern void *dma_alloc_coherent(struct device *dev, size_t size,
21 dma_addr_t *dma_handle, int flag);
22
23extern void dma_free_coherent(struct device *dev, size_t size,
24 void *vaddr, dma_addr_t dma_handle);
25
26#define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent((d), (s), (h), (f))
27#define dma_free_noncoherent(d, s, v, h) dma_free_coherent((d), (s), (v), (h))
28
29/*
30 * Map a single buffer of the indicated size for DMA in streaming mode. The
31 * 32-bit bus address to use is returned.
32 *
33 * Once the device is given the dma address, the device owns this memory until
34 * either pci_unmap_single or pci_dma_sync_single is performed.
35 */
36static inline
37dma_addr_t dma_map_single(struct device *dev, void *ptr, size_t size,
38 enum dma_data_direction direction)
39{
40 BUG_ON(direction == DMA_NONE);
41 mn10300_dcache_flush_inv();
42 return virt_to_bus(ptr);
43}
44
45/*
46 * Unmap a single streaming mode DMA translation. The dma_addr and size must
47 * match what was provided for in a previous pci_map_single call. All other
48 * usages are undefined.
49 *
50 * After this call, reads by the cpu to the buffer are guarenteed to see
51 * whatever the device wrote there.
52 */
53static inline
54void dma_unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size,
55 enum dma_data_direction direction)
56{
57 BUG_ON(direction == DMA_NONE);
58}
59
60/*
61 * Map a set of buffers described by scatterlist in streaming mode for DMA.
62 * This is the scather-gather version of the above pci_map_single interface.
63 * Here the scatter gather list elements are each tagged with the appropriate
64 * dma address and length. They are obtained via sg_dma_{address,length}(SG).
65 *
66 * NOTE: An implementation may be able to use a smaller number of DMA
67 * address/length pairs than there are SG table elements. (for example
68 * via virtual mapping capabilities) The routine returns the number of
69 * addr/length pairs actually used, at most nents.
70 *
71 * Device ownership issues as mentioned above for pci_map_single are the same
72 * here.
73 */
74static inline
75int dma_map_sg(struct device *dev, struct scatterlist *sglist, int nents,
76 enum dma_data_direction direction)
77{
78 struct scatterlist *sg;
79 int i;
80
81 BUG_ON(!valid_dma_direction(direction));
82 WARN_ON(nents == 0 || sglist[0].length == 0);
83
84 for_each_sg(sglist, sg, nents, i) {
85 BUG_ON(!sg_page(sg));
86
87 sg->dma_address = sg_phys(sg);
88 }
89
90 mn10300_dcache_flush_inv();
91 return nents;
92}
93
94/*
95 * Unmap a set of streaming mode DMA translations.
96 * Again, cpu read rules concerning calls here are the same as for
97 * pci_unmap_single() above.
98 */
99static inline
100void dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nhwentries,
101 enum dma_data_direction direction)
102{
103 BUG_ON(!valid_dma_direction(direction));
104}
105
106/*
107 * pci_{map,unmap}_single_page maps a kernel page to a dma_addr_t. identical
108 * to pci_map_single, but takes a struct page instead of a virtual address
109 */
110static inline
111dma_addr_t dma_map_page(struct device *dev, struct page *page,
112 unsigned long offset, size_t size,
113 enum dma_data_direction direction)
114{
115 BUG_ON(direction == DMA_NONE);
116 return page_to_bus(page) + offset;
117}
118
119static inline
120void dma_unmap_page(struct device *dev, dma_addr_t dma_address, size_t size,
121 enum dma_data_direction direction)
122{
123 BUG_ON(direction == DMA_NONE);
124}
125
126/*
127 * Make physical memory consistent for a single streaming mode DMA translation
128 * after a transfer.
129 *
130 * If you perform a pci_map_single() but wish to interrogate the buffer using
131 * the cpu, yet do not wish to teardown the PCI dma mapping, you must call this
132 * function before doing so. At the next point you give the PCI dma address
133 * back to the card, the device again owns the buffer.
134 */
135static inline
136void dma_sync_single_for_cpu(struct device *dev, dma_addr_t dma_handle,
137 size_t size, enum dma_data_direction direction)
138{
139}
140
141static inline
142void dma_sync_single_for_device(struct device *dev, dma_addr_t dma_handle,
143 size_t size, enum dma_data_direction direction)
144{
145 mn10300_dcache_flush_inv();
146}
147
148static inline
149void dma_sync_single_range_for_cpu(struct device *dev, dma_addr_t dma_handle,
150 unsigned long offset, size_t size,
151 enum dma_data_direction direction)
152{
153}
154
155static inline void
156dma_sync_single_range_for_device(struct device *dev, dma_addr_t dma_handle,
157 unsigned long offset, size_t size,
158 enum dma_data_direction direction)
159{
160 mn10300_dcache_flush_inv();
161}
162
163
164/*
165 * Make physical memory consistent for a set of streaming mode DMA translations
166 * after a transfer.
167 *
168 * The same as pci_dma_sync_single but for a scatter-gather list, same rules
169 * and usage.
170 */
171static inline
172void dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg,
173 int nelems, enum dma_data_direction direction)
174{
175}
176
177static inline
178void dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg,
179 int nelems, enum dma_data_direction direction)
180{
181 mn10300_dcache_flush_inv();
182}
183
184static inline
185int dma_mapping_error(dma_addr_t dma_addr)
186{
187 return 0;
188}
189
190/*
191 * Return whether the given PCI device DMA address mask can be supported
192 * properly. For example, if your device can only drive the low 24-bits during
193 * PCI bus mastering, then you would pass 0x00ffffff as the mask to this
194 * function.
195 */
196static inline
197int dma_supported(struct device *dev, u64 mask)
198{
199 /*
200 * we fall back to GFP_DMA when the mask isn't all 1s, so we can't
201 * guarantee allocations that must be within a tighter range than
202 * GFP_DMA
203 */
204 if (mask < 0x00ffffff)
205 return 0;
206 return 1;
207}
208
209static inline
210int dma_set_mask(struct device *dev, u64 mask)
211{
212 if (!dev->dma_mask || !dma_supported(dev, mask))
213 return -EIO;
214
215 *dev->dma_mask = mask;
216 return 0;
217}
218
219static inline
220int dma_get_cache_alignment(void)
221{
222 return 1 << L1_CACHE_SHIFT;
223}
224
225#define dma_is_consistent(d) (1)
226
227static inline
228void dma_cache_sync(void *vaddr, size_t size,
229 enum dma_data_direction direction)
230{
231 mn10300_dcache_flush_inv();
232}
233
234#endif
diff --git a/include/asm-mn10300/dma.h b/include/asm-mn10300/dma.h
new file mode 100644
index 000000000000..098df2e617ab
--- /dev/null
+++ b/include/asm-mn10300/dma.h
@@ -0,0 +1,118 @@
1/* MN10300 ISA DMA handlers and definitions
2 *
3 * Copyright (C) 2007 Matsushita Electric Industrial Co., Ltd.
4 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_DMA_H
12#define _ASM_DMA_H
13
14#include <asm/system.h>
15#include <linux/spinlock.h>
16#include <asm/io.h>
17#include <linux/delay.h>
18
19#undef MAX_DMA_CHANNELS /* switch off linux/kernel/dma.c */
20#define MAX_DMA_ADDRESS 0xbfffffff
21
22extern spinlock_t dma_spin_lock;
23
24static inline unsigned long claim_dma_lock(void)
25{
26 unsigned long flags;
27 spin_lock_irqsave(&dma_spin_lock, flags);
28 return flags;
29}
30
31static inline void release_dma_lock(unsigned long flags)
32{
33 spin_unlock_irqrestore(&dma_spin_lock, flags);
34}
35
36/* enable/disable a specific DMA channel */
37static inline void enable_dma(unsigned int dmanr)
38{
39}
40
41static inline void disable_dma(unsigned int dmanr)
42{
43}
44
45/* Clear the 'DMA Pointer Flip Flop'.
46 * Write 0 for LSB/MSB, 1 for MSB/LSB access.
47 * Use this once to initialize the FF to a known state.
48 * After that, keep track of it. :-)
49 * --- In order to do that, the DMA routines below should ---
50 * --- only be used while holding the DMA lock ! ---
51 */
52static inline void clear_dma_ff(unsigned int dmanr)
53{
54}
55
56/* set mode (above) for a specific DMA channel */
57static inline void set_dma_mode(unsigned int dmanr, char mode)
58{
59}
60
61/* Set only the page register bits of the transfer address.
62 * This is used for successive transfers when we know the contents of
63 * the lower 16 bits of the DMA current address register, but a 64k boundary
64 * may have been crossed.
65 */
66static inline void set_dma_page(unsigned int dmanr, char pagenr)
67{
68}
69
70
71/* Set transfer address & page bits for specific DMA channel.
72 * Assumes dma flipflop is clear.
73 */
74static inline void set_dma_addr(unsigned int dmanr, unsigned int a)
75{
76}
77
78
79/* Set transfer size (max 64k for DMA1..3, 128k for DMA5..7) for
80 * a specific DMA channel.
81 * You must ensure the parameters are valid.
82 * NOTE: from a manual: "the number of transfers is one more
83 * than the initial word count"! This is taken into account.
84 * Assumes dma flip-flop is clear.
85 * NOTE 2: "count" represents _bytes_ and must be even for channels 5-7.
86 */
87static inline void set_dma_count(unsigned int dmanr, unsigned int count)
88{
89}
90
91
92/* Get DMA residue count. After a DMA transfer, this
93 * should return zero. Reading this while a DMA transfer is
94 * still in progress will return unpredictable results.
95 * If called before the channel has been used, it may return 1.
96 * Otherwise, it returns the number of _bytes_ left to transfer.
97 *
98 * Assumes DMA flip-flop is clear.
99 */
100static inline int get_dma_residue(unsigned int dmanr)
101{
102 return 0;
103}
104
105
106/* These are in kernel/dma.c: */
107extern int request_dma(unsigned int dmanr, const char *device_id);
108extern void free_dma(unsigned int dmanr);
109
110/* From PCI */
111
112#ifdef CONFIG_PCI
113extern int isa_dma_bridge_buggy;
114#else
115#define isa_dma_bridge_buggy (0)
116#endif
117
118#endif /* _ASM_DMA_H */
diff --git a/include/asm-mn10300/dmactl-regs.h b/include/asm-mn10300/dmactl-regs.h
new file mode 100644
index 000000000000..58a199da0f4a
--- /dev/null
+++ b/include/asm-mn10300/dmactl-regs.h
@@ -0,0 +1,101 @@
1/* MN10300 on-board DMA controller registers
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_DMACTL_REGS_H
12#define _ASM_DMACTL_REGS_H
13
14#include <asm/cpu-regs.h>
15
16#ifdef __KERNEL__
17
18/* DMA registers */
19#define DMxCTR(N) __SYSREG(0xd2000000 + ((N) * 0x100), u32) /* control reg */
20#define DMxCTR_BG 0x0000001f /* transfer request source */
21#define DMxCTR_BG_SOFT 0x00000000 /* - software source */
22#define DMxCTR_BG_SC0TX 0x00000002 /* - serial port 0 transmission */
23#define DMxCTR_BG_SC0RX 0x00000003 /* - serial port 0 reception */
24#define DMxCTR_BG_SC1TX 0x00000004 /* - serial port 1 transmission */
25#define DMxCTR_BG_SC1RX 0x00000005 /* - serial port 1 reception */
26#define DMxCTR_BG_SC2TX 0x00000006 /* - serial port 2 transmission */
27#define DMxCTR_BG_SC2RX 0x00000007 /* - serial port 2 reception */
28#define DMxCTR_BG_TM0UFLOW 0x00000008 /* - timer 0 underflow */
29#define DMxCTR_BG_TM1UFLOW 0x00000009 /* - timer 1 underflow */
30#define DMxCTR_BG_TM2UFLOW 0x0000000a /* - timer 2 underflow */
31#define DMxCTR_BG_TM3UFLOW 0x0000000b /* - timer 3 underflow */
32#define DMxCTR_BG_TM6ACMPCAP 0x0000000c /* - timer 6A compare/capture */
33#define DMxCTR_BG_AFE 0x0000000d /* - analogue front-end interrupt source */
34#define DMxCTR_BG_ADC 0x0000000e /* - A/D conversion end interrupt source */
35#define DMxCTR_BG_IRDA 0x0000000f /* - IrDA interrupt source */
36#define DMxCTR_BG_RTC 0x00000010 /* - RTC interrupt source */
37#define DMxCTR_BG_XIRQ0 0x00000011 /* - XIRQ0 pin interrupt source */
38#define DMxCTR_BG_XIRQ1 0x00000012 /* - XIRQ1 pin interrupt source */
39#define DMxCTR_BG_XDMR0 0x00000013 /* - external request 0 source (XDMR0 pin) */
40#define DMxCTR_BG_XDMR1 0x00000014 /* - external request 1 source (XDMR1 pin) */
41#define DMxCTR_SAM 0x000000e0 /* DMA transfer src addr mode */
42#define DMxCTR_SAM_INCR 0x00000000 /* - increment */
43#define DMxCTR_SAM_DECR 0x00000020 /* - decrement */
44#define DMxCTR_SAM_FIXED 0x00000040 /* - fixed */
45#define DMxCTR_DAM 0x00000000 /* DMA transfer dest addr mode */
46#define DMxCTR_DAM_INCR 0x00000000 /* - increment */
47#define DMxCTR_DAM_DECR 0x00000100 /* - decrement */
48#define DMxCTR_DAM_FIXED 0x00000200 /* - fixed */
49#define DMxCTR_TM 0x00001800 /* DMA transfer mode */
50#define DMxCTR_TM_BATCH 0x00000000 /* - batch transfer */
51#define DMxCTR_TM_INTERM 0x00001000 /* - intermittent transfer */
52#define DMxCTR_UT 0x00006000 /* DMA transfer unit */
53#define DMxCTR_UT_1 0x00000000 /* - 1 byte */
54#define DMxCTR_UT_2 0x00002000 /* - 2 byte */
55#define DMxCTR_UT_4 0x00004000 /* - 4 byte */
56#define DMxCTR_UT_16 0x00006000 /* - 16 byte */
57#define DMxCTR_TEN 0x00010000 /* DMA channel transfer enable */
58#define DMxCTR_RQM 0x00060000 /* external request input source mode */
59#define DMxCTR_RQM_FALLEDGE 0x00000000 /* - falling edge */
60#define DMxCTR_RQM_RISEEDGE 0x00020000 /* - rising edge */
61#define DMxCTR_RQM_LOLEVEL 0x00040000 /* - low level */
62#define DMxCTR_RQM_HILEVEL 0x00060000 /* - high level */
63#define DMxCTR_RQF 0x01000000 /* DMA transfer request flag */
64#define DMxCTR_XEND 0x80000000 /* DMA transfer end flag */
65
66#define DMxSRC(N) __SYSREG(0xd2000004 + ((N) * 0x100), u32) /* control reg */
67
68#define DMxDST(N) __SYSREG(0xd2000008 + ((N) * 0x100), u32) /* src addr reg */
69
70#define DMxSIZ(N) __SYSREG(0xd200000c + ((N) * 0x100), u32) /* dest addr reg */
71#define DMxSIZ_CT 0x000fffff /* number of bytes to transfer */
72
73#define DMxCYC(N) __SYSREG(0xd2000010 + ((N) * 0x100), u32) /* intermittent
74 * size reg */
75#define DMxCYC_CYC 0x000000ff /* number of interrmittent transfers -1 */
76
77#define DM0IRQ 16 /* DMA channel 0 complete IRQ */
78#define DM1IRQ 17 /* DMA channel 1 complete IRQ */
79#define DM2IRQ 18 /* DMA channel 2 complete IRQ */
80#define DM3IRQ 19 /* DMA channel 3 complete IRQ */
81
82#define DM0ICR GxICR(DM0IRQ) /* DMA channel 0 complete intr ctrl reg */
83#define DM1ICR GxICR(DM0IR1) /* DMA channel 1 complete intr ctrl reg */
84#define DM2ICR GxICR(DM0IR2) /* DMA channel 2 complete intr ctrl reg */
85#define DM3ICR GxICR(DM0IR3) /* DMA channel 3 complete intr ctrl reg */
86
87#ifndef __ASSEMBLY__
88
89struct mn10300_dmactl_regs {
90 u32 ctr;
91 const void *src;
92 void *dst;
93 u32 siz;
94 u32 cyc;
95} __attribute__((aligned(0x100)));
96
97#endif /* __ASSEMBLY__ */
98
99#endif /* __KERNEL__ */
100
101#endif /* _ASM_DMACTL_REGS_H */
diff --git a/include/asm-mn10300/elf.h b/include/asm-mn10300/elf.h
new file mode 100644
index 000000000000..256a70466ca4
--- /dev/null
+++ b/include/asm-mn10300/elf.h
@@ -0,0 +1,147 @@
1/* MN10300 ELF constant and register definitions
2 *
3 * Copyright (C) 2007 Matsushita Electric Industrial Co., Ltd.
4 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
5 * Written by David Howells (dhowells@redhat.com)
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public Licence
9 * as published by the Free Software Foundation; either version
10 * 2 of the Licence, or (at your option) any later version.
11 */
12#ifndef _ASM_ELF_H
13#define _ASM_ELF_H
14
15#include <linux/utsname.h>
16#include <asm/ptrace.h>
17#include <asm/user.h>
18
19/*
20 * AM33 relocations
21 */
22#define R_MN10300_NONE 0 /* No reloc. */
23#define R_MN10300_32 1 /* Direct 32 bit. */
24#define R_MN10300_16 2 /* Direct 16 bit. */
25#define R_MN10300_8 3 /* Direct 8 bit. */
26#define R_MN10300_PCREL32 4 /* PC-relative 32-bit. */
27#define R_MN10300_PCREL16 5 /* PC-relative 16-bit signed. */
28#define R_MN10300_PCREL8 6 /* PC-relative 8-bit signed. */
29#define R_MN10300_24 9 /* Direct 24 bit. */
30#define R_MN10300_RELATIVE 23 /* Adjust by program base. */
31
32/*
33 * ELF register definitions..
34 */
35typedef unsigned long elf_greg_t;
36
37#define ELF_NGREG (sizeof (struct pt_regs) / sizeof(elf_greg_t))
38typedef elf_greg_t elf_gregset_t[ELF_NGREG];
39
40#define ELF_NFPREG 32
41typedef float elf_fpreg_t;
42
43typedef struct {
44 elf_fpreg_t fpregs[ELF_NFPREG];
45 u_int32_t fpcr;
46} elf_fpregset_t;
47
48extern int dump_fpu(struct pt_regs *, elf_fpregset_t *);
49
50/*
51 * This is used to ensure we don't load something for the wrong architecture
52 */
53#define elf_check_arch(x) \
54 (((x)->e_machine == EM_CYGNUS_MN10300) || \
55 ((x)->e_machine == EM_MN10300))
56
57/*
58 * These are used to set parameters in the core dumps.
59 */
60#define ELF_CLASS ELFCLASS32
61#define ELF_DATA ELFDATA2LSB
62#define ELF_ARCH EM_MN10300
63
64/*
65 * ELF process initialiser
66 */
67#define ELF_PLAT_INIT(_r, load_addr) \
68do { \
69 struct pt_regs *_ur = current->thread.uregs; \
70 _ur->a3 = 0; _ur->a2 = 0; _ur->d3 = 0; _ur->d2 = 0; \
71 _ur->mcvf = 0; _ur->mcrl = 0; _ur->mcrh = 0; _ur->mdrq = 0; \
72 _ur->e1 = 0; _ur->e0 = 0; _ur->e7 = 0; _ur->e6 = 0; \
73 _ur->e5 = 0; _ur->e4 = 0; _ur->e3 = 0; _ur->e2 = 0; \
74 _ur->lar = 0; _ur->lir = 0; _ur->mdr = 0; \
75 _ur->a1 = 0; _ur->a0 = 0; _ur->d1 = 0; _ur->d0 = 0; \
76} while (0)
77
78#define USE_ELF_CORE_DUMP
79#define ELF_EXEC_PAGESIZE 4096
80
81/*
82 * This is the location that an ET_DYN program is loaded if exec'ed. Typical
83 * use of this is to invoke "./ld.so someprog" to test out a new version of
84 * the loader. We need to make sure that it is out of the way of the program
85 * that it will "exec", and that there is sufficient room for the brk.
86 * - must clear the VMALLOC area
87 */
88#define ELF_ET_DYN_BASE 0x04000000
89
90/*
91 * regs is struct pt_regs, pr_reg is elf_gregset_t (which is
92 * now struct user_regs, they are different)
93 * - ELF_CORE_COPY_REGS has been guessed, and may be wrong
94 */
95#define ELF_CORE_COPY_REGS(pr_reg, regs) \
96do { \
97 pr_reg[0] = regs->a3; \
98 pr_reg[1] = regs->a2; \
99 pr_reg[2] = regs->d3; \
100 pr_reg[3] = regs->d2; \
101 pr_reg[4] = regs->mcvf; \
102 pr_reg[5] = regs->mcrl; \
103 pr_reg[6] = regs->mcrh; \
104 pr_reg[7] = regs->mdrq; \
105 pr_reg[8] = regs->e1; \
106 pr_reg[9] = regs->e0; \
107 pr_reg[10] = regs->e7; \
108 pr_reg[11] = regs->e6; \
109 pr_reg[12] = regs->e5; \
110 pr_reg[13] = regs->e4; \
111 pr_reg[14] = regs->e3; \
112 pr_reg[15] = regs->e2; \
113 pr_reg[16] = regs->sp; \
114 pr_reg[17] = regs->lar; \
115 pr_reg[18] = regs->lir; \
116 pr_reg[19] = regs->mdr; \
117 pr_reg[20] = regs->a1; \
118 pr_reg[21] = regs->a0; \
119 pr_reg[22] = regs->d1; \
120 pr_reg[23] = regs->d0; \
121 pr_reg[24] = regs->orig_d0; \
122 pr_reg[25] = regs->epsw; \
123 pr_reg[26] = regs->pc; \
124} while (0);
125
126/*
127 * This yields a mask that user programs can use to figure out what
128 * instruction set this CPU supports. This could be done in user space,
129 * but it's not easy, and we've already done it here.
130 */
131#define ELF_HWCAP (0)
132
133/*
134 * This yields a string that ld.so will use to load implementation
135 * specific libraries for optimization. This is more specific in
136 * intent than poking at uname or /proc/cpuinfo.
137 *
138 * For the moment, we have only optimizations for the Intel generations,
139 * but that could change...
140 */
141#define ELF_PLATFORM (NULL)
142
143#ifdef __KERNEL__
144#define SET_PERSONALITY(ex, ibcs2) set_personality(PER_LINUX)
145#endif
146
147#endif /* _ASM_ELF_H */
diff --git a/include/asm-mn10300/emergency-restart.h b/include/asm-mn10300/emergency-restart.h
new file mode 100644
index 000000000000..3711bd9d50bd
--- /dev/null
+++ b/include/asm-mn10300/emergency-restart.h
@@ -0,0 +1 @@
#include <asm-generic/emergency-restart.h>
diff --git a/include/asm-mn10300/errno.h b/include/asm-mn10300/errno.h
new file mode 100644
index 000000000000..4c82b503d92f
--- /dev/null
+++ b/include/asm-mn10300/errno.h
@@ -0,0 +1 @@
#include <asm-generic/errno.h>
diff --git a/include/asm-mn10300/exceptions.h b/include/asm-mn10300/exceptions.h
new file mode 100644
index 000000000000..fa16466ef3f9
--- /dev/null
+++ b/include/asm-mn10300/exceptions.h
@@ -0,0 +1,121 @@
1/* MN10300 Microcontroller core exceptions
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_EXCEPTIONS_H
12#define _ASM_EXCEPTIONS_H
13
14#include <linux/linkage.h>
15
16/*
17 * define the breakpoint instruction opcode to use
18 * - note that the JTAG unit steals 0xFF, so we want to avoid that if we can
19 * (can use 0xF7)
20 */
21#define GDBSTUB_BKPT 0xFF
22
23#ifndef __ASSEMBLY__
24
25/*
26 * enumeration of exception codes (as extracted from TBR MSW)
27 */
28enum exception_code {
29 EXCEP_RESET = 0x000000, /* reset */
30
31 /* MMU exceptions */
32 EXCEP_ITLBMISS = 0x000100, /* instruction TLB miss */
33 EXCEP_DTLBMISS = 0x000108, /* data TLB miss */
34 EXCEP_IAERROR = 0x000110, /* instruction address */
35 EXCEP_DAERROR = 0x000118, /* data address */
36
37 /* system exceptions */
38 EXCEP_TRAP = 0x000128, /* program interrupt (PI instruction) */
39 EXCEP_ISTEP = 0x000130, /* single step */
40 EXCEP_IBREAK = 0x000150, /* instruction breakpoint */
41 EXCEP_OBREAK = 0x000158, /* operand breakpoint */
42 EXCEP_PRIVINS = 0x000160, /* privileged instruction execution */
43 EXCEP_UNIMPINS = 0x000168, /* unimplemented instruction execution */
44 EXCEP_UNIMPEXINS = 0x000170, /* unimplemented extended instruction execution */
45 EXCEP_MEMERR = 0x000178, /* illegal memory access */
46 EXCEP_MISALIGN = 0x000180, /* misalignment */
47 EXCEP_BUSERROR = 0x000188, /* bus error */
48 EXCEP_ILLINSACC = 0x000190, /* illegal instruction access */
49 EXCEP_ILLDATACC = 0x000198, /* illegal data access */
50 EXCEP_IOINSACC = 0x0001a0, /* I/O space instruction access */
51 EXCEP_PRIVINSACC = 0x0001a8, /* privileged space instruction access */
52 EXCEP_PRIVDATACC = 0x0001b0, /* privileged space data access */
53 EXCEP_DATINSACC = 0x0001b8, /* data space instruction access */
54 EXCEP_DOUBLE_FAULT = 0x000200, /* double fault */
55
56 /* FPU exceptions */
57 EXCEP_FPU_DISABLED = 0x0001c0, /* FPU disabled */
58 EXCEP_FPU_UNIMPINS = 0x0001c8, /* FPU unimplemented operation */
59 EXCEP_FPU_OPERATION = 0x0001d0, /* FPU operation */
60
61 /* interrupts */
62 EXCEP_WDT = 0x000240, /* watchdog timer overflow */
63 EXCEP_NMI = 0x000248, /* non-maskable interrupt */
64 EXCEP_IRQ_LEVEL0 = 0x000280, /* level 0 maskable interrupt */
65 EXCEP_IRQ_LEVEL1 = 0x000288, /* level 1 maskable interrupt */
66 EXCEP_IRQ_LEVEL2 = 0x000290, /* level 2 maskable interrupt */
67 EXCEP_IRQ_LEVEL3 = 0x000298, /* level 3 maskable interrupt */
68 EXCEP_IRQ_LEVEL4 = 0x0002a0, /* level 4 maskable interrupt */
69 EXCEP_IRQ_LEVEL5 = 0x0002a8, /* level 5 maskable interrupt */
70 EXCEP_IRQ_LEVEL6 = 0x0002b0, /* level 6 maskable interrupt */
71
72 /* system calls */
73 EXCEP_SYSCALL0 = 0x000300, /* system call 0 */
74 EXCEP_SYSCALL1 = 0x000308, /* system call 1 */
75 EXCEP_SYSCALL2 = 0x000310, /* system call 2 */
76 EXCEP_SYSCALL3 = 0x000318, /* system call 3 */
77 EXCEP_SYSCALL4 = 0x000320, /* system call 4 */
78 EXCEP_SYSCALL5 = 0x000328, /* system call 5 */
79 EXCEP_SYSCALL6 = 0x000330, /* system call 6 */
80 EXCEP_SYSCALL7 = 0x000338, /* system call 7 */
81 EXCEP_SYSCALL8 = 0x000340, /* system call 8 */
82 EXCEP_SYSCALL9 = 0x000348, /* system call 9 */
83 EXCEP_SYSCALL10 = 0x000350, /* system call 10 */
84 EXCEP_SYSCALL11 = 0x000358, /* system call 11 */
85 EXCEP_SYSCALL12 = 0x000360, /* system call 12 */
86 EXCEP_SYSCALL13 = 0x000368, /* system call 13 */
87 EXCEP_SYSCALL14 = 0x000370, /* system call 14 */
88 EXCEP_SYSCALL15 = 0x000378, /* system call 15 */
89};
90
91extern void __set_intr_stub(enum exception_code code, void *handler);
92extern void set_intr_stub(enum exception_code code, void *handler);
93extern void set_jtag_stub(enum exception_code code, void *handler);
94
95struct pt_regs;
96
97extern asmlinkage void __common_exception(void);
98extern asmlinkage void itlb_miss(void);
99extern asmlinkage void dtlb_miss(void);
100extern asmlinkage void itlb_aerror(void);
101extern asmlinkage void dtlb_aerror(void);
102extern asmlinkage void raw_bus_error(void);
103extern asmlinkage void double_fault(void);
104extern asmlinkage int system_call(struct pt_regs *);
105extern asmlinkage void fpu_exception(struct pt_regs *, enum exception_code);
106extern asmlinkage void nmi(struct pt_regs *, enum exception_code);
107extern asmlinkage void uninitialised_exception(struct pt_regs *,
108 enum exception_code);
109extern asmlinkage void irq_handler(void);
110extern asmlinkage void profile_handler(void);
111extern asmlinkage void nmi_handler(void);
112extern asmlinkage void misalignment(struct pt_regs *, enum exception_code);
113
114extern void die(const char *, struct pt_regs *, enum exception_code)
115 ATTRIB_NORET;
116
117extern int die_if_no_fixup(const char *, struct pt_regs *, enum exception_code);
118
119#endif /* __ASSEMBLY__ */
120
121#endif /* _ASM_EXCEPTIONS_H */
diff --git a/include/asm-mn10300/fb.h b/include/asm-mn10300/fb.h
new file mode 100644
index 000000000000..697b24a91e1a
--- /dev/null
+++ b/include/asm-mn10300/fb.h
@@ -0,0 +1,23 @@
1/* MN10300 Frame buffer stuff
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_FB_H
12#define _ASM_FB_H
13
14#include <linux/fb.h>
15
16#define fb_pgprotect(...) do {} while (0)
17
18static inline int fb_is_primary_device(struct fb_info *info)
19{
20 return 0;
21}
22
23#endif /* _ASM_FB_H */
diff --git a/include/asm-mn10300/fcntl.h b/include/asm-mn10300/fcntl.h
new file mode 100644
index 000000000000..46ab12db5739
--- /dev/null
+++ b/include/asm-mn10300/fcntl.h
@@ -0,0 +1 @@
#include <asm-generic/fcntl.h>
diff --git a/include/asm-mn10300/fpu.h b/include/asm-mn10300/fpu.h
new file mode 100644
index 000000000000..64a2b83a7a6a
--- /dev/null
+++ b/include/asm-mn10300/fpu.h
@@ -0,0 +1,85 @@
1/* MN10300 FPU definitions
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 * Derived from include/asm-i386/i387.h: Copyright (C) 1994 Linus Torvalds
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public Licence
9 * as published by the Free Software Foundation; either version
10 * 2 of the Licence, or (at your option) any later version.
11 */
12#ifndef _ASM_FPU_H
13#define _ASM_FPU_H
14
15#include <asm/processor.h>
16#include <asm/sigcontext.h>
17#include <asm/user.h>
18
19#ifdef __KERNEL__
20
21/* the task that owns the FPU state */
22extern struct task_struct *fpu_state_owner;
23
24#define set_using_fpu(tsk) \
25do { \
26 (tsk)->thread.fpu_flags |= THREAD_USING_FPU; \
27} while (0)
28
29#define clear_using_fpu(tsk) \
30do { \
31 (tsk)->thread.fpu_flags &= ~THREAD_USING_FPU; \
32} while (0)
33
34#define is_using_fpu(tsk) ((tsk)->thread.fpu_flags & THREAD_USING_FPU)
35
36#define unlazy_fpu(tsk) \
37do { \
38 preempt_disable(); \
39 if (fpu_state_owner == (tsk)) \
40 fpu_save(&tsk->thread.fpu_state); \
41 preempt_enable(); \
42} while (0)
43
44#define exit_fpu() \
45do { \
46 struct task_struct *__tsk = current; \
47 preempt_disable(); \
48 if (fpu_state_owner == __tsk) \
49 fpu_state_owner = NULL; \
50 preempt_enable(); \
51} while (0)
52
53#define flush_fpu() \
54do { \
55 struct task_struct *__tsk = current; \
56 preempt_disable(); \
57 if (fpu_state_owner == __tsk) { \
58 fpu_state_owner = NULL; \
59 __tsk->thread.uregs->epsw &= ~EPSW_FE; \
60 } \
61 preempt_enable(); \
62 clear_using_fpu(__tsk); \
63} while (0)
64
65extern asmlinkage void fpu_init_state(void);
66extern asmlinkage void fpu_kill_state(struct task_struct *);
67extern asmlinkage void fpu_disabled(struct pt_regs *, enum exception_code);
68extern asmlinkage void fpu_exception(struct pt_regs *, enum exception_code);
69
70#ifdef CONFIG_FPU
71extern asmlinkage void fpu_save(struct fpu_state_struct *);
72extern asmlinkage void fpu_restore(struct fpu_state_struct *);
73#else
74#define fpu_save(a)
75#define fpu_restore(a)
76#endif /* CONFIG_FPU */
77
78/*
79 * signal frame handlers
80 */
81extern int fpu_setup_sigcontext(struct fpucontext *buf);
82extern int fpu_restore_sigcontext(struct fpucontext *buf);
83
84#endif /* __KERNEL__ */
85#endif /* _ASM_FPU_H */
diff --git a/include/asm-mn10300/frame.inc b/include/asm-mn10300/frame.inc
new file mode 100644
index 000000000000..5b1949bdf039
--- /dev/null
+++ b/include/asm-mn10300/frame.inc
@@ -0,0 +1,91 @@
1/* MN10300 Microcontroller core system register definitions -*- asm -*-
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_FRAME_INC
12#define _ASM_FRAME_INC
13
14#ifndef __ASSEMBLY__
15#error not for use in C files
16#endif
17
18#ifndef __ASM_OFFSETS_H__
19#include <asm/asm-offsets.h>
20#endif
21
22#define pi break
23
24#define fp a3
25
26###############################################################################
27#
28# build a stack frame from the registers
29# - the caller has subtracted 4 from SP before coming here
30#
31###############################################################################
32.macro SAVE_ALL
33 add -4,sp # next exception frame ptr save area
34 movm [other],(sp)
35 mov usp,a1
36 mov a1,(sp) # USP in MOVM[other] dummy slot
37 movm [d2,d3,a2,a3,exreg0,exreg1,exother],(sp)
38 mov sp,fp # FRAME pointer in A3
39 add -12,sp # allow for calls to be made
40 mov (__frame),a1
41 mov a1,(REG_NEXT,fp)
42 mov fp,(__frame)
43
44 and ~EPSW_FE,epsw # disable the FPU inside the kernel
45
46 # we may be holding current in E2
47#ifdef CONFIG_MN10300_CURRENT_IN_E2
48 mov (__current),e2
49#endif
50.endm
51
52###############################################################################
53#
54# restore the registers from a stack frame
55#
56###############################################################################
57.macro RESTORE_ALL
58 # peel back the stack to the calling frame
59 # - this permits execve() to discard extra frames due to kernel syscalls
60 mov (__frame),fp
61 mov fp,sp
62 mov (REG_NEXT,fp),d0 # userspace has regs->next == 0
63 mov d0,(__frame)
64
65#ifndef CONFIG_MN10300_USING_JTAG
66 mov (REG_EPSW,fp),d0
67 btst EPSW_T,d0
68 beq 99f
69
70 or EPSW_NMID,epsw
71 movhu (DCR),d1
72 or 0x0001, d1
73 movhu d1,(DCR)
74
7599:
76#endif
77 movm (sp),[d2,d3,a2,a3,exreg0,exreg1,exother]
78
79 # must restore usp even if returning to kernel space,
80 # when CONFIG_PREEMPT is enabled.
81 mov (sp),a1 # USP in MOVM[other] dummy slot
82 mov a1,usp
83
84 movm (sp),[other]
85 add 8,sp
86 rti
87
88.endm
89
90
91#endif /* _ASM_FRAME_INC */
diff --git a/include/asm-mn10300/futex.h b/include/asm-mn10300/futex.h
new file mode 100644
index 000000000000..0b745828f42b
--- /dev/null
+++ b/include/asm-mn10300/futex.h
@@ -0,0 +1 @@
#include <asm-generic/futex.h>
diff --git a/include/asm-mn10300/gdb-stub.h b/include/asm-mn10300/gdb-stub.h
new file mode 100644
index 000000000000..e5a6368559af
--- /dev/null
+++ b/include/asm-mn10300/gdb-stub.h
@@ -0,0 +1,183 @@
1/* MN10300 Kernel GDB stub definitions
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 * - Derived from asm-mips/gdb-stub.h (c) 1995 Andreas Busse
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public Licence
9 * as published by the Free Software Foundation; either version
10 * 2 of the Licence, or (at your option) any later version.
11 */
12#ifndef _ASM_GDB_STUB_H
13#define _ASM_GDB_STUB_H
14
15#include <asm/exceptions.h>
16
17/*
18 * register ID numbers in GDB remote protocol
19 */
20
21#define GDB_REGID_PC 9
22#define GDB_REGID_FP 7
23#define GDB_REGID_SP 8
24
25/*
26 * virtual stack layout for the GDB exception handler
27 */
28#define NUMREGS 64
29
30#define GDB_FR_D0 (0 * 4)
31#define GDB_FR_D1 (1 * 4)
32#define GDB_FR_D2 (2 * 4)
33#define GDB_FR_D3 (3 * 4)
34#define GDB_FR_A0 (4 * 4)
35#define GDB_FR_A1 (5 * 4)
36#define GDB_FR_A2 (6 * 4)
37#define GDB_FR_A3 (7 * 4)
38
39#define GDB_FR_SP (8 * 4)
40#define GDB_FR_PC (9 * 4)
41#define GDB_FR_MDR (10 * 4)
42#define GDB_FR_EPSW (11 * 4)
43#define GDB_FR_LIR (12 * 4)
44#define GDB_FR_LAR (13 * 4)
45#define GDB_FR_MDRQ (14 * 4)
46
47#define GDB_FR_E0 (15 * 4)
48#define GDB_FR_E1 (16 * 4)
49#define GDB_FR_E2 (17 * 4)
50#define GDB_FR_E3 (18 * 4)
51#define GDB_FR_E4 (19 * 4)
52#define GDB_FR_E5 (20 * 4)
53#define GDB_FR_E6 (21 * 4)
54#define GDB_FR_E7 (22 * 4)
55
56#define GDB_FR_SSP (23 * 4)
57#define GDB_FR_MSP (24 * 4)
58#define GDB_FR_USP (25 * 4)
59#define GDB_FR_MCRH (26 * 4)
60#define GDB_FR_MCRL (27 * 4)
61#define GDB_FR_MCVF (28 * 4)
62
63#define GDB_FR_FPCR (29 * 4)
64#define GDB_FR_DUMMY0 (30 * 4)
65#define GDB_FR_DUMMY1 (31 * 4)
66
67#define GDB_FR_FS0 (32 * 4)
68
69#define GDB_FR_SIZE (NUMREGS * 4)
70
71#ifndef __ASSEMBLY__
72
73/*
74 * This is the same as above, but for the high-level
75 * part of the GDB stub.
76 */
77
78struct gdb_regs {
79 /* saved main processor registers */
80 u32 d0, d1, d2, d3, a0, a1, a2, a3;
81 u32 sp, pc, mdr, epsw, lir, lar, mdrq;
82 u32 e0, e1, e2, e3, e4, e5, e6, e7;
83 u32 ssp, msp, usp, mcrh, mcrl, mcvf;
84
85 /* saved floating point registers */
86 u32 fpcr, _dummy0, _dummy1;
87 u32 fs0, fs1, fs2, fs3, fs4, fs5, fs6, fs7;
88 u32 fs8, fs9, fs10, fs11, fs12, fs13, fs14, fs15;
89 u32 fs16, fs17, fs18, fs19, fs20, fs21, fs22, fs23;
90 u32 fs24, fs25, fs26, fs27, fs28, fs29, fs30, fs31;
91};
92
93/*
94 * Prototypes
95 */
96extern void show_registers_only(struct pt_regs *regs);
97
98extern asmlinkage void gdbstub_init(void);
99extern asmlinkage void gdbstub_exit(int status);
100extern asmlinkage void gdbstub_io_init(void);
101extern asmlinkage void gdbstub_io_set_baud(unsigned baud);
102extern asmlinkage int gdbstub_io_rx_char(unsigned char *_ch, int nonblock);
103extern asmlinkage void gdbstub_io_tx_char(unsigned char ch);
104extern asmlinkage void gdbstub_io_tx_flush(void);
105
106extern asmlinkage void gdbstub_io_rx_handler(void);
107extern asmlinkage void gdbstub_rx_irq(struct pt_regs *, enum exception_code);
108extern asmlinkage int gdbstub_intercept(struct pt_regs *, enum exception_code);
109extern asmlinkage void gdbstub_exception(struct pt_regs *, enum exception_code);
110extern asmlinkage void __gdbstub_bug_trap(void);
111extern asmlinkage void __gdbstub_pause(void);
112extern asmlinkage void start_kernel(void);
113
114#ifndef CONFIG_MN10300_CACHE_DISABLED
115extern asmlinkage void gdbstub_purge_cache(void);
116#else
117#define gdbstub_purge_cache() do {} while (0)
118#endif
119
120/* Used to prevent crashes in memory access */
121extern asmlinkage int gdbstub_read_byte(const u8 *, u8 *);
122extern asmlinkage int gdbstub_read_word(const u8 *, u8 *);
123extern asmlinkage int gdbstub_read_dword(const u8 *, u8 *);
124extern asmlinkage int gdbstub_write_byte(u32, u8 *);
125extern asmlinkage int gdbstub_write_word(u32, u8 *);
126extern asmlinkage int gdbstub_write_dword(u32, u8 *);
127
128extern asmlinkage void gdbstub_read_byte_guard(void);
129extern asmlinkage void gdbstub_read_byte_cont(void);
130extern asmlinkage void gdbstub_read_word_guard(void);
131extern asmlinkage void gdbstub_read_word_cont(void);
132extern asmlinkage void gdbstub_read_dword_guard(void);
133extern asmlinkage void gdbstub_read_dword_cont(void);
134extern asmlinkage void gdbstub_write_byte_guard(void);
135extern asmlinkage void gdbstub_write_byte_cont(void);
136extern asmlinkage void gdbstub_write_word_guard(void);
137extern asmlinkage void gdbstub_write_word_cont(void);
138extern asmlinkage void gdbstub_write_dword_guard(void);
139extern asmlinkage void gdbstub_write_dword_cont(void);
140
141extern u8 gdbstub_rx_buffer[PAGE_SIZE];
142extern u32 gdbstub_rx_inp;
143extern u32 gdbstub_rx_outp;
144extern u8 gdbstub_rx_overflow;
145extern u8 gdbstub_busy;
146extern u8 gdbstub_rx_unget;
147
148#ifdef CONFIG_GDBSTUB_DEBUGGING
149extern void gdbstub_printk(const char *fmt, ...)
150 __attribute__((format(printf, 1, 2)));
151#else
152static inline __attribute__((format(printf, 1, 2)))
153void gdbstub_printk(const char *fmt, ...)
154{
155}
156#endif
157
158#ifdef CONFIG_GDBSTUB_DEBUG_ENTRY
159#define gdbstub_entry(FMT, ...) gdbstub_printk(FMT, ##__VA_ARGS__)
160#else
161#define gdbstub_entry(FMT, ...) ({ 0; })
162#endif
163
164#ifdef CONFIG_GDBSTUB_DEBUG_PROTOCOL
165#define gdbstub_proto(FMT, ...) gdbstub_printk(FMT, ##__VA_ARGS__)
166#else
167#define gdbstub_proto(FMT, ...) ({ 0; })
168#endif
169
170#ifdef CONFIG_GDBSTUB_DEBUG_IO
171#define gdbstub_io(FMT, ...) gdbstub_printk(FMT, ##__VA_ARGS__)
172#else
173#define gdbstub_io(FMT, ...) ({ 0; })
174#endif
175
176#ifdef CONFIG_GDBSTUB_DEBUG_BREAKPOINT
177#define gdbstub_bkpt(FMT, ...) gdbstub_printk(FMT, ##__VA_ARGS__)
178#else
179#define gdbstub_bkpt(FMT, ...) ({ 0; })
180#endif
181
182#endif /* !__ASSEMBLY__ */
183#endif /* _ASM_GDB_STUB_H */
diff --git a/include/asm-mn10300/hardirq.h b/include/asm-mn10300/hardirq.h
new file mode 100644
index 000000000000..54d950117674
--- /dev/null
+++ b/include/asm-mn10300/hardirq.h
@@ -0,0 +1,48 @@
1/* MN10300 Hardware IRQ statistics and management
2 *
3 * Copyright (C) 2007 Matsushita Electric Industrial Co., Ltd.
4 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
5 * Modified by David Howells (dhowells@redhat.com)
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public Licence
9 * as published by the Free Software Foundation; either version
10 * 2 of the Licence, or (at your option) any later version.
11 */
12#ifndef _ASM_HARDIRQ_H
13#define _ASM_HARDIRQ_H
14
15#include <linux/threads.h>
16#include <linux/irq.h>
17#include <asm/exceptions.h>
18
19/* assembly code in softirq.h is sensitive to the offsets of these fields */
20typedef struct {
21 unsigned int __softirq_pending;
22 unsigned long idle_timestamp;
23 unsigned int __nmi_count; /* arch dependent */
24 unsigned int __irq_count; /* arch dependent */
25} ____cacheline_aligned irq_cpustat_t;
26
27#include <linux/irq_cpustat.h> /* Standard mappings for irq_cpustat_t above */
28
29extern void ack_bad_irq(int irq);
30
31/*
32 * manipulate stubs in the MN10300 CPU Trap/Interrupt Vector table
33 * - these should jump to __common_exception in entry.S unless there's a good
34 * reason to do otherwise (see trap_preinit() in traps.c)
35 */
36typedef void (*intr_stub_fnx)(struct pt_regs *regs,
37 enum exception_code intcode);
38
39/*
40 * manipulate pointers in the Exception table (see entry.S)
41 * - these are indexed by decoding the lower 24 bits of the TBR register
42 * - note that the MN103E010 doesn't always trap through the correct vector,
43 * but does always set the TBR correctly
44 */
45extern asmlinkage void set_excp_vector(enum exception_code code,
46 intr_stub_fnx handler);
47
48#endif /* _ASM_HARDIRQ_H */
diff --git a/include/asm-mn10300/highmem.h b/include/asm-mn10300/highmem.h
new file mode 100644
index 000000000000..383c0c42982e
--- /dev/null
+++ b/include/asm-mn10300/highmem.h
@@ -0,0 +1,114 @@
1/* MN10300 Virtual kernel memory mappings for high memory
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 * - Derived from include/asm-i386/highmem.h
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public Licence
9 * as published by the Free Software Foundation; either version
10 * 2 of the Licence, or (at your option) any later version.
11 */
12#ifndef _ASM_HIGHMEM_H
13#define _ASM_HIGHMEM_H
14
15#ifdef __KERNEL__
16
17#include <linux/init.h>
18#include <linux/interrupt.h>
19#include <asm/kmap_types.h>
20#include <asm/pgtable.h>
21
22/* undef for production */
23#undef HIGHMEM_DEBUG
24
25/* declarations for highmem.c */
26extern unsigned long highstart_pfn, highend_pfn;
27
28extern pte_t *kmap_pte;
29extern pgprot_t kmap_prot;
30extern pte_t *pkmap_page_table;
31
32extern void __init kmap_init(void);
33
34/*
35 * Right now we initialize only a single pte table. It can be extended
36 * easily, subsequent pte tables have to be allocated in one physical
37 * chunk of RAM.
38 */
39#define PKMAP_BASE 0xfe000000UL
40#define LAST_PKMAP 1024
41#define LAST_PKMAP_MASK (LAST_PKMAP - 1)
42#define PKMAP_NR(virt) ((virt - PKMAP_BASE) >> PAGE_SHIFT)
43#define PKMAP_ADDR(nr) (PKMAP_BASE + ((nr) << PAGE_SHIFT))
44
45extern unsigned long __fastcall kmap_high(struct page *page);
46extern void __fastcall kunmap_high(struct page *page);
47
48static inline unsigned long kmap(struct page *page)
49{
50 if (in_interrupt())
51 BUG();
52 if (page < highmem_start_page)
53 return page_address(page);
54 return kmap_high(page);
55}
56
57static inline void kunmap(struct page *page)
58{
59 if (in_interrupt())
60 BUG();
61 if (page < highmem_start_page)
62 return;
63 kunmap_high(page);
64}
65
66/*
67 * The use of kmap_atomic/kunmap_atomic is discouraged - kmap/kunmap
68 * gives a more generic (and caching) interface. But kmap_atomic can
69 * be used in IRQ contexts, so in some (very limited) cases we need
70 * it.
71 */
72static inline unsigned long kmap_atomic(struct page *page, enum km_type type)
73{
74 enum fixed_addresses idx;
75 unsigned long vaddr;
76
77 if (page < highmem_start_page)
78 return page_address(page);
79
80 idx = type + KM_TYPE_NR * smp_processor_id();
81 vaddr = __fix_to_virt(FIX_KMAP_BEGIN + idx);
82#if HIGHMEM_DEBUG
83 if (!pte_none(*(kmap_pte - idx)))
84 BUG();
85#endif
86 set_pte(kmap_pte - idx, mk_pte(page, kmap_prot));
87 __flush_tlb_one(vaddr);
88
89 return vaddr;
90}
91
92static inline void kunmap_atomic(unsigned long vaddr, enum km_type type)
93{
94#if HIGHMEM_DEBUG
95 enum fixed_addresses idx = type + KM_TYPE_NR * smp_processor_id();
96
97 if (vaddr < FIXADDR_START) /* FIXME */
98 return;
99
100 if (vaddr != __fix_to_virt(FIX_KMAP_BEGIN + idx))
101 BUG();
102
103 /*
104 * force other mappings to Oops if they'll try to access
105 * this pte without first remap it
106 */
107 pte_clear(kmap_pte - idx);
108 __flush_tlb_one(vaddr);
109#endif
110}
111
112#endif /* __KERNEL__ */
113
114#endif /* _ASM_HIGHMEM_H */
diff --git a/include/asm-mn10300/hw_irq.h b/include/asm-mn10300/hw_irq.h
new file mode 100644
index 000000000000..70619901098e
--- /dev/null
+++ b/include/asm-mn10300/hw_irq.h
@@ -0,0 +1,14 @@
1/* MN10300 Hardware interrupt definitions
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_HW_IRQ_H
12#define _ASM_HW_IRQ_H
13
14#endif /* _ASM_HW_IRQ_H */
diff --git a/include/asm-mn10300/ide.h b/include/asm-mn10300/ide.h
new file mode 100644
index 000000000000..dc235121ec42
--- /dev/null
+++ b/include/asm-mn10300/ide.h
@@ -0,0 +1,43 @@
1/* MN10300 Arch-specific IDE code
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 * - Derived from include/asm-i386/ide.h
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public Licence
9 * as published by the Free Software Foundation; either version
10 * 2 of the Licence, or (at your option) any later version.
11 */
12
13#ifndef _ASM_IDE_H
14#define _ASM_IDE_H
15
16#ifdef __KERNEL__
17
18#include <asm/intctl-regs.h>
19
20#undef SUPPORT_SLOW_DATA_PORTS
21#define SUPPORT_SLOW_DATA_PORTS 0
22
23#undef SUPPORT_VLB_SYNC
24#define SUPPORT_VLB_SYNC 0
25
26#ifndef MAX_HWIFS
27#define MAX_HWIFS 8
28#endif
29
30/*
31 * some bits needed for parts of the IDE subsystem to compile
32 */
33#define __ide_mm_insw(port, addr, n) \
34 insw((unsigned long) (port), (addr), (n))
35#define __ide_mm_insl(port, addr, n) \
36 insl((unsigned long) (port), (addr), (n))
37#define __ide_mm_outsw(port, addr, n) \
38 outsw((unsigned long) (port), (addr), (n))
39#define __ide_mm_outsl(port, addr, n) \
40 outsl((unsigned long) (port), (addr), (n))
41
42#endif /* __KERNEL__ */
43#endif /* _ASM_IDE_H */
diff --git a/include/asm-mn10300/intctl-regs.h b/include/asm-mn10300/intctl-regs.h
new file mode 100644
index 000000000000..ba544c796c5a
--- /dev/null
+++ b/include/asm-mn10300/intctl-regs.h
@@ -0,0 +1,73 @@
1/* MN10300 On-board interrupt controller registers
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_INTCTL_REGS_H
12#define _ASM_INTCTL_REGS_H
13
14#include <asm/cpu-regs.h>
15
16#ifdef __KERNEL__
17
18/* interrupt controller registers */
19#define GxICR(X) __SYSREG(0xd4000000 + (X) * 4, u16) /* group irq ctrl regs */
20
21#define IAGR __SYSREG(0xd4000100, u16) /* intr acceptance group reg */
22#define IAGR_GN 0x00fc /* group number register
23 * (documentation _has_ to be wrong)
24 */
25
26#define EXTMD __SYSREG(0xd4000200, u16) /* external pin intr spec reg */
27#define GET_XIRQ_TRIGGER(X) ((EXTMD >> ((X) * 2)) & 3)
28
29#define SET_XIRQ_TRIGGER(X,Y) \
30do { \
31 u16 x = EXTMD; \
32 x &= ~(3 << ((X) * 2)); \
33 x |= ((Y) & 3) << ((X) * 2); \
34 EXTMD = x; \
35} while (0)
36
37#define XIRQ_TRIGGER_LOWLEVEL 0
38#define XIRQ_TRIGGER_HILEVEL 1
39#define XIRQ_TRIGGER_NEGEDGE 2
40#define XIRQ_TRIGGER_POSEDGE 3
41
42/* non-maskable interrupt control */
43#define NMIIRQ 0
44#define NMICR GxICR(NMIIRQ) /* NMI control register */
45#define NMICR_NMIF 0x0001 /* NMI pin interrupt flag */
46#define NMICR_WDIF 0x0002 /* watchdog timer overflow flag */
47#define NMICR_ABUSERR 0x0008 /* async bus error flag */
48
49/* maskable interrupt control */
50#define GxICR_DETECT 0x0001 /* interrupt detect flag */
51#define GxICR_REQUEST 0x0010 /* interrupt request flag */
52#define GxICR_ENABLE 0x0100 /* interrupt enable flag */
53#define GxICR_LEVEL 0x7000 /* interrupt priority level */
54#define GxICR_LEVEL_0 0x0000 /* - level 0 */
55#define GxICR_LEVEL_1 0x1000 /* - level 1 */
56#define GxICR_LEVEL_2 0x2000 /* - level 2 */
57#define GxICR_LEVEL_3 0x3000 /* - level 3 */
58#define GxICR_LEVEL_4 0x4000 /* - level 4 */
59#define GxICR_LEVEL_5 0x5000 /* - level 5 */
60#define GxICR_LEVEL_6 0x6000 /* - level 6 */
61#define GxICR_LEVEL_SHIFT 12
62
63#ifndef __ASSEMBLY__
64extern void set_intr_level(int irq, u16 level);
65extern void set_intr_postackable(int irq);
66#endif
67
68/* external interrupts */
69#define XIRQxICR(X) GxICR((X)) /* external interrupt control regs */
70
71#endif /* __KERNEL__ */
72
73#endif /* _ASM_INTCTL_REGS_H */
diff --git a/include/asm-mn10300/io.h b/include/asm-mn10300/io.h
new file mode 100644
index 000000000000..b8b6dc878250
--- /dev/null
+++ b/include/asm-mn10300/io.h
@@ -0,0 +1,299 @@
1/* MN10300 I/O port emulation and memory-mapped I/O
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_IO_H
12#define _ASM_IO_H
13
14#include <asm/page.h> /* I/O is all done through memory accesses */
15#include <asm/cpu-regs.h>
16#include <asm/cacheflush.h>
17
18#define mmiowb() do {} while (0)
19
20/*****************************************************************************/
21/*
22 * readX/writeX() are used to access memory mapped devices. On some
23 * architectures the memory mapped IO stuff needs to be accessed
24 * differently. On the x86 architecture, we just read/write the
25 * memory location directly.
26 */
27static inline u8 readb(const volatile void __iomem *addr)
28{
29 return *(const volatile u8 *) addr;
30}
31
32static inline u16 readw(const volatile void __iomem *addr)
33{
34 return *(const volatile u16 *) addr;
35}
36
37static inline u32 readl(const volatile void __iomem *addr)
38{
39 return *(const volatile u32 *) addr;
40}
41
42#define __raw_readb readb
43#define __raw_readw readw
44#define __raw_readl readl
45
46#define readb_relaxed readb
47#define readw_relaxed readw
48#define readl_relaxed readl
49
50static inline void writeb(u8 b, volatile void __iomem *addr)
51{
52 *(volatile u8 *) addr = b;
53}
54
55static inline void writew(u16 b, volatile void __iomem *addr)
56{
57 *(volatile u16 *) addr = b;
58}
59
60static inline void writel(u32 b, volatile void __iomem *addr)
61{
62 *(volatile u32 *) addr = b;
63}
64
65#define __raw_writeb writeb
66#define __raw_writew writew
67#define __raw_writel writel
68
69/*****************************************************************************/
70/*
71 * traditional input/output functions
72 */
73static inline u8 inb_local(unsigned long addr)
74{
75 return readb((volatile void __iomem *) addr);
76}
77
78static inline void outb_local(u8 b, unsigned long addr)
79{
80 return writeb(b, (volatile void __iomem *) addr);
81}
82
83static inline u8 inb(unsigned long addr)
84{
85 return readb((volatile void __iomem *) addr);
86}
87
88static inline u16 inw(unsigned long addr)
89{
90 return readw((volatile void __iomem *) addr);
91}
92
93static inline u32 inl(unsigned long addr)
94{
95 return readl((volatile void __iomem *) addr);
96}
97
98static inline void outb(u8 b, unsigned long addr)
99{
100 return writeb(b, (volatile void __iomem *) addr);
101}
102
103static inline void outw(u16 b, unsigned long addr)
104{
105 return writew(b, (volatile void __iomem *) addr);
106}
107
108static inline void outl(u32 b, unsigned long addr)
109{
110 return writel(b, (volatile void __iomem *) addr);
111}
112
113#define inb_p(addr) inb(addr)
114#define inw_p(addr) inw(addr)
115#define inl_p(addr) inl(addr)
116#define outb_p(x, addr) outb((x), (addr))
117#define outw_p(x, addr) outw((x), (addr))
118#define outl_p(x, addr) outl((x), (addr))
119
120static inline void insb(unsigned long addr, void *buffer, int count)
121{
122 if (count) {
123 u8 *buf = buffer;
124 do {
125 u8 x = inb(addr);
126 *buf++ = x;
127 } while (--count);
128 }
129}
130
131static inline void insw(unsigned long addr, void *buffer, int count)
132{
133 if (count) {
134 u16 *buf = buffer;
135 do {
136 u16 x = inw(addr);
137 *buf++ = x;
138 } while (--count);
139 }
140}
141
142static inline void insl(unsigned long addr, void *buffer, int count)
143{
144 if (count) {
145 u32 *buf = buffer;
146 do {
147 u32 x = inl(addr);
148 *buf++ = x;
149 } while (--count);
150 }
151}
152
153static inline void outsb(unsigned long addr, const void *buffer, int count)
154{
155 if (count) {
156 const u8 *buf = buffer;
157 do {
158 outb(*buf++, addr);
159 } while (--count);
160 }
161}
162
163static inline void outsw(unsigned long addr, const void *buffer, int count)
164{
165 if (count) {
166 const u16 *buf = buffer;
167 do {
168 outw(*buf++, addr);
169 } while (--count);
170 }
171}
172
173extern void __outsl(unsigned long addr, const void *buffer, int count);
174static inline void outsl(unsigned long addr, const void *buffer, int count)
175{
176 if ((unsigned long) buffer & 0x3)
177 return __outsl(addr, buffer, count);
178
179 if (count) {
180 const u32 *buf = buffer;
181 do {
182 outl(*buf++, addr);
183 } while (--count);
184 }
185}
186
187#define ioread8(addr) readb(addr)
188#define ioread16(addr) readw(addr)
189#define ioread32(addr) readl(addr)
190
191#define iowrite8(v, addr) writeb((v), (addr))
192#define iowrite16(v, addr) writew((v), (addr))
193#define iowrite32(v, addr) writel((v), (addr))
194
195#define ioread8_rep(p, dst, count) \
196 insb((unsigned long) (p), (dst), (count))
197#define ioread16_rep(p, dst, count) \
198 insw((unsigned long) (p), (dst), (count))
199#define ioread32_rep(p, dst, count) \
200 insl((unsigned long) (p), (dst), (count))
201
202#define iowrite8_rep(p, src, count) \
203 outsb((unsigned long) (p), (src), (count))
204#define iowrite16_rep(p, src, count) \
205 outsw((unsigned long) (p), (src), (count))
206#define iowrite32_rep(p, src, count) \
207 outsl((unsigned long) (p), (src), (count))
208
209
210#define IO_SPACE_LIMIT 0xffffffff
211
212#ifdef __KERNEL__
213
214#include <linux/vmalloc.h>
215#define __io_virt(x) ((void *) (x))
216
217/* Create a virtual mapping cookie for a PCI BAR (memory or IO) */
218struct pci_dev;
219extern void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long max);
220static inline void pci_iounmap(struct pci_dev *dev, void __iomem *p)
221{
222}
223
224/*
225 * Change virtual addresses to physical addresses and vv.
226 * These are pretty trivial
227 */
228static inline unsigned long virt_to_phys(volatile void *address)
229{
230 return __pa(address);
231}
232
233static inline void *phys_to_virt(unsigned long address)
234{
235 return __va(address);
236}
237
238/*
239 * Change "struct page" to physical address.
240 */
241static inline void *__ioremap(unsigned long offset, unsigned long size,
242 unsigned long flags)
243{
244 return (void *) offset;
245}
246
247static inline void *ioremap(unsigned long offset, unsigned long size)
248{
249 return (void *) offset;
250}
251
252/*
253 * This one maps high address device memory and turns off caching for that
254 * area. it's useful if some control registers are in such an area and write
255 * combining or read caching is not desirable:
256 */
257static inline void *ioremap_nocache(unsigned long offset, unsigned long size)
258{
259 return (void *) (offset | 0x20000000);
260}
261
262static inline void iounmap(void *addr)
263{
264}
265
266static inline void __iomem *ioport_map(unsigned long port, unsigned int nr)
267{
268 return (void __iomem *) port;
269}
270
271static inline void ioport_unmap(void __iomem *p)
272{
273}
274
275#define xlate_dev_kmem_ptr(p) ((void *) (p))
276#define xlate_dev_mem_ptr(p) ((void *) (p))
277
278/*
279 * PCI bus iomem addresses must be in the region 0x80000000-0x9fffffff
280 */
281static inline unsigned long virt_to_bus(volatile void *address)
282{
283 return ((unsigned long) address) & ~0x20000000;
284}
285
286static inline void *bus_to_virt(unsigned long address)
287{
288 return (void *) address;
289}
290
291#define page_to_bus page_to_phys
292
293#define memset_io(a, b, c) memset(__io_virt(a), (b), (c))
294#define memcpy_fromio(a, b, c) memcpy((a), __io_virt(b), (c))
295#define memcpy_toio(a, b, c) memcpy(__io_virt(a), (b), (c))
296
297#endif /* __KERNEL__ */
298
299#endif /* _ASM_IO_H */
diff --git a/include/asm-mn10300/ioctl.h b/include/asm-mn10300/ioctl.h
new file mode 100644
index 000000000000..b279fe06dfe5
--- /dev/null
+++ b/include/asm-mn10300/ioctl.h
@@ -0,0 +1 @@
#include <asm-generic/ioctl.h>
diff --git a/include/asm-mn10300/ioctls.h b/include/asm-mn10300/ioctls.h
new file mode 100644
index 000000000000..dcbfb452974f
--- /dev/null
+++ b/include/asm-mn10300/ioctls.h
@@ -0,0 +1,88 @@
1#ifndef _ASM_IOCTLS_H
2#define _ASM_IOCTLS_H
3
4#include <asm/ioctl.h>
5
6/* 0x54 is just a magic number to make these relatively unique ('T') */
7
8#define TCGETS 0x5401
9#define TCSETS 0x5402
10#define TCSETSW 0x5403
11#define TCSETSF 0x5404
12#define TCGETA 0x5405
13#define TCSETA 0x5406
14#define TCSETAW 0x5407
15#define TCSETAF 0x5408
16#define TCSBRK 0x5409
17#define TCXONC 0x540A
18#define TCFLSH 0x540B
19#define TIOCEXCL 0x540C
20#define TIOCNXCL 0x540D
21#define TIOCSCTTY 0x540E
22#define TIOCGPGRP 0x540F
23#define TIOCSPGRP 0x5410
24#define TIOCOUTQ 0x5411
25#define TIOCSTI 0x5412
26#define TIOCGWINSZ 0x5413
27#define TIOCSWINSZ 0x5414
28#define TIOCMGET 0x5415
29#define TIOCMBIS 0x5416
30#define TIOCMBIC 0x5417
31#define TIOCMSET 0x5418
32#define TIOCGSOFTCAR 0x5419
33#define TIOCSSOFTCAR 0x541A
34#define FIONREAD 0x541B
35#define TIOCINQ FIONREAD
36#define TIOCLINUX 0x541C
37#define TIOCCONS 0x541D
38#define TIOCGSERIAL 0x541E
39#define TIOCSSERIAL 0x541F
40#define TIOCPKT 0x5420
41#define FIONBIO 0x5421
42#define TIOCNOTTY 0x5422
43#define TIOCSETD 0x5423
44#define TIOCGETD 0x5424
45#define TCSBRKP 0x5425 /* Needed for POSIX tcsendbreak() */
46/* #define TIOCTTYGSTRUCT 0x5426 - Former debugging-only ioctl */
47#define TIOCSBRK 0x5427 /* BSD compatibility */
48#define TIOCCBRK 0x5428 /* BSD compatibility */
49#define TIOCGSID 0x5429 /* Return the session ID of FD */
50#define TCGETS2 _IOR('T', 0x2A, struct termios2)
51#define TCSETS2 _IOW('T', 0x2B, struct termios2)
52#define TCSETSW2 _IOW('T', 0x2C, struct termios2)
53#define TCSETSF2 _IOW('T', 0x2D, struct termios2)
54#define TIOCGPTN _IOR('T', 0x30, unsigned int) /* Get Pty Number
55 * (of pty-mux device) */
56#define TIOCSPTLCK _IOW('T', 0x31, int) /* Lock/unlock Pty */
57
58#define FIONCLEX 0x5450
59#define FIOCLEX 0x5451
60#define FIOASYNC 0x5452
61#define TIOCSERCONFIG 0x5453
62#define TIOCSERGWILD 0x5454
63#define TIOCSERSWILD 0x5455
64#define TIOCGLCKTRMIOS 0x5456
65#define TIOCSLCKTRMIOS 0x5457
66#define TIOCSERGSTRUCT 0x5458 /* For debugging only */
67#define TIOCSERGETLSR 0x5459 /* Get line status register */
68#define TIOCSERGETMULTI 0x545A /* Get multiport config */
69#define TIOCSERSETMULTI 0x545B /* Set multiport config */
70
71#define TIOCMIWAIT 0x545C /* wait for a change on serial input line(s) */
72#define TIOCGICOUNT 0x545D /* read serial port inline interrupt counts */
73#define TIOCGHAYESESP 0x545E /* Get Hayes ESP configuration */
74#define TIOCSHAYESESP 0x545F /* Set Hayes ESP configuration */
75#define FIOQSIZE 0x5460
76
77/* Used for packet mode */
78#define TIOCPKT_DATA 0
79#define TIOCPKT_FLUSHREAD 1
80#define TIOCPKT_FLUSHWRITE 2
81#define TIOCPKT_STOP 4
82#define TIOCPKT_START 8
83#define TIOCPKT_NOSTOP 16
84#define TIOCPKT_DOSTOP 32
85
86#define TIOCSER_TEMT 0x01 /* Transmitter physically empty */
87
88#endif /* _ASM_IOCTLS_H */
diff --git a/include/asm-mn10300/ipc.h b/include/asm-mn10300/ipc.h
new file mode 100644
index 000000000000..a46e3d9c2a3f
--- /dev/null
+++ b/include/asm-mn10300/ipc.h
@@ -0,0 +1 @@
#include <asm-generic/ipc.h>
diff --git a/include/asm-mn10300/ipcbuf.h b/include/asm-mn10300/ipcbuf.h
new file mode 100644
index 000000000000..efbbef8d1c69
--- /dev/null
+++ b/include/asm-mn10300/ipcbuf.h
@@ -0,0 +1,29 @@
1#ifndef _ASM_IPCBUF_H_
2#define _ASM_IPCBUF_H
3
4/*
5 * The ipc64_perm structure for MN10300 architecture.
6 * Note extra padding because this structure is passed back and forth
7 * between kernel and user space.
8 *
9 * Pad space is left for:
10 * - 32-bit mode_t and seq
11 * - 2 miscellaneous 32-bit values
12 */
13
14struct ipc64_perm
15{
16 __kernel_key_t key;
17 __kernel_uid32_t uid;
18 __kernel_gid32_t gid;
19 __kernel_uid32_t cuid;
20 __kernel_gid32_t cgid;
21 __kernel_mode_t mode;
22 unsigned short __pad1;
23 unsigned short seq;
24 unsigned short __pad2;
25 unsigned long __unused1;
26 unsigned long __unused2;
27};
28
29#endif /* _ASM_IPCBUF_H */
diff --git a/include/asm-mn10300/irq.h b/include/asm-mn10300/irq.h
new file mode 100644
index 000000000000..53b380116901
--- /dev/null
+++ b/include/asm-mn10300/irq.h
@@ -0,0 +1,32 @@
1/* MN10300 Hardware interrupt definitions
2 *
3 * Copyright (C) 2007 Matsushita Electric Industrial Co., Ltd.
4 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
5 * Modified by David Howells (dhowells@redhat.com)
6 * - Derived from include/asm-i386/irq.h:
7 * - (C) 1992, 1993 Linus Torvalds, (C) 1997 Ingo Molnar
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public Licence
11 * as published by the Free Software Foundation; either version
12 * 2 of the Licence, or (at your option) any later version.
13 */
14#ifndef _ASM_IRQ_H
15#define _ASM_IRQ_H
16
17#include <asm/intctl-regs.h>
18#include <asm/reset-regs.h>
19#include <asm/proc/irq.h>
20
21/* this number is used when no interrupt has been assigned */
22#define NO_IRQ INT_MAX
23
24/* hardware irq numbers */
25#define NR_IRQS GxICR_NUM_IRQS
26
27/* external hardware irq numbers */
28#define NR_XIRQS GxICR_NUM_XIRQS
29
30#define irq_canonicalize(IRQ) (IRQ)
31
32#endif /* _ASM_IRQ_H */
diff --git a/include/asm-mn10300/irq_regs.h b/include/asm-mn10300/irq_regs.h
new file mode 100644
index 000000000000..a848cd232eb4
--- /dev/null
+++ b/include/asm-mn10300/irq_regs.h
@@ -0,0 +1,24 @@
1/* MN10300 IRQ registers pointer definition
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_IRQ_REGS_H
12#define _ASM_IRQ_REGS_H
13
14/*
15 * Per-cpu current frame pointer - the location of the last exception frame on
16 * the stack
17 */
18#define ARCH_HAS_OWN_IRQ_REGS
19
20#ifndef __ASSEMBLY__
21#define get_irq_regs() (__frame)
22#endif
23
24#endif /* _ASM_IRQ_REGS_H */
diff --git a/include/asm-mn10300/kdebug.h b/include/asm-mn10300/kdebug.h
new file mode 100644
index 000000000000..0f47e112190c
--- /dev/null
+++ b/include/asm-mn10300/kdebug.h
@@ -0,0 +1,22 @@
1/* MN10300 In-kernel death knells
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11
12#ifndef _ASM_KDEBUG_H
13#define _ASM_KDEBUG_H
14
15/* Grossly misnamed. */
16enum die_val {
17 DIE_OOPS = 1,
18 DIE_BREAKPOINT,
19 DIE_GPF,
20};
21
22#endif /* _ASM_KDEBUG_H */
diff --git a/include/asm-mn10300/kmap_types.h b/include/asm-mn10300/kmap_types.h
new file mode 100644
index 000000000000..3398f9f35603
--- /dev/null
+++ b/include/asm-mn10300/kmap_types.h
@@ -0,0 +1,31 @@
1/* MN10300 kmap_atomic() slot IDs
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_KMAP_TYPES_H
12#define _ASM_KMAP_TYPES_H
13
14enum km_type {
15 KM_BOUNCE_READ,
16 KM_SKB_SUNRPC_DATA,
17 KM_SKB_DATA_SOFTIRQ,
18 KM_USER0,
19 KM_USER1,
20 KM_BIO_SRC_IRQ,
21 KM_BIO_DST_IRQ,
22 KM_PTE0,
23 KM_PTE1,
24 KM_IRQ0,
25 KM_IRQ1,
26 KM_SOFTIRQ0,
27 KM_SOFTIRQ1,
28 KM_TYPE_NR
29};
30
31#endif /* _ASM_KMAP_TYPES_H */
diff --git a/include/asm-mn10300/kprobes.h b/include/asm-mn10300/kprobes.h
new file mode 100644
index 000000000000..c800b590183a
--- /dev/null
+++ b/include/asm-mn10300/kprobes.h
@@ -0,0 +1,50 @@
1/* MN10300 Kernel Probes support
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by Mark Salter (msalter@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public Licence as published by
8 * the Free Software Foundation; either version 2 of the Licence, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public Licence for more details.
15 *
16 * You should have received a copy of the GNU General Public Licence
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
19 *
20 */
21#ifndef _ASM_KPROBES_H
22#define _ASM_KPROBES_H
23
24#include <linux/types.h>
25#include <linux/ptrace.h>
26
27struct kprobe;
28
29typedef unsigned char kprobe_opcode_t;
30#define BREAKPOINT_INSTRUCTION 0xff
31#define MAX_INSN_SIZE 8
32#define MAX_STACK_SIZE 128
33
34/* Architecture specific copy of original instruction */
35struct arch_specific_insn {
36 /* copy of original instruction
37 */
38 kprobe_opcode_t insn[MAX_INSN_SIZE];
39};
40
41extern const int kretprobe_blacklist_size;
42
43extern int kprobe_exceptions_notify(struct notifier_block *self,
44 unsigned long val, void *data);
45
46#define flush_insn_slot(p) do {} while (0)
47
48extern void arch_remove_kprobe(struct kprobe *p);
49
50#endif /* _ASM_KPROBES_H */
diff --git a/include/asm-mn10300/linkage.h b/include/asm-mn10300/linkage.h
new file mode 100644
index 000000000000..29a32e467523
--- /dev/null
+++ b/include/asm-mn10300/linkage.h
@@ -0,0 +1,22 @@
1/* MN10300 Linkage and calling-convention overrides
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_LINKAGE_H
12#define _ASM_LINKAGE_H
13
14/* don't override anything */
15#define asmlinkage
16#define FASTCALL(x) x
17#define fastcall
18
19#define __ALIGN .align 4,0xcb
20#define __ALIGN_STR ".align 4,0xcb"
21
22#endif
diff --git a/include/asm-mn10300/local.h b/include/asm-mn10300/local.h
new file mode 100644
index 000000000000..c11c530f74d0
--- /dev/null
+++ b/include/asm-mn10300/local.h
@@ -0,0 +1 @@
#include <asm-generic/local.h>
diff --git a/include/asm-mn10300/mc146818rtc.h b/include/asm-mn10300/mc146818rtc.h
new file mode 100644
index 000000000000..df6bc6e0e8c6
--- /dev/null
+++ b/include/asm-mn10300/mc146818rtc.h
@@ -0,0 +1 @@
#include <asm/rtc-regs.h>
diff --git a/include/asm-mn10300/mman.h b/include/asm-mn10300/mman.h
new file mode 100644
index 000000000000..b7986b65addf
--- /dev/null
+++ b/include/asm-mn10300/mman.h
@@ -0,0 +1,28 @@
1/* MN10300 Constants for mmap and co.
2 *
3 * Copyright (C) 2007 Matsushita Electric Industrial Co., Ltd.
4 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
5 * - Derived from asm-x86/mman.h
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public Licence
9 * as published by the Free Software Foundation; either version
10 * 2 of the Licence, or (at your option) any later version.
11 */
12#ifndef _ASM_MMAN_H
13#define _ASM_MMAN_H
14
15#include <asm-generic/mman.h>
16
17#define MAP_GROWSDOWN 0x0100 /* stack-like segment */
18#define MAP_DENYWRITE 0x0800 /* ETXTBSY */
19#define MAP_EXECUTABLE 0x1000 /* mark it as an executable */
20#define MAP_LOCKED 0x2000 /* pages are locked */
21#define MAP_NORESERVE 0x4000 /* don't check for reservations */
22#define MAP_POPULATE 0x8000 /* populate (prefault) pagetables */
23#define MAP_NONBLOCK 0x10000 /* do not block on IO */
24
25#define MCL_CURRENT 1 /* lock all current mappings */
26#define MCL_FUTURE 2 /* lock all future mappings */
27
28#endif /* _ASM_MMAN_H */
diff --git a/include/asm-mn10300/mmu.h b/include/asm-mn10300/mmu.h
new file mode 100644
index 000000000000..2d2d097e7309
--- /dev/null
+++ b/include/asm-mn10300/mmu.h
@@ -0,0 +1,19 @@
1/* MN10300 Memory management context
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 * - Derived from include/asm-frv/mmu.h
6 */
7
8#ifndef _ASM_MMU_H
9#define _ASM_MMU_H
10
11/*
12 * MMU context
13 */
14typedef struct {
15 unsigned long tlbpid[NR_CPUS]; /* TLB PID for this process on
16 * each CPU */
17} mm_context_t;
18
19#endif /* _ASM_MMU_H */
diff --git a/include/asm-mn10300/mmu_context.h b/include/asm-mn10300/mmu_context.h
new file mode 100644
index 000000000000..a9e2e34f69b0
--- /dev/null
+++ b/include/asm-mn10300/mmu_context.h
@@ -0,0 +1,138 @@
1/* MN10300 MMU context management
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Modified by David Howells (dhowells@redhat.com)
5 * - Derived from include/asm-m32r/mmu_context.h
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public Licence
9 * as published by the Free Software Foundation; either version
10 * 2 of the Licence, or (at your option) any later version.
11 *
12 *
13 * This implements an algorithm to provide TLB PID mappings to provide
14 * selective access to the TLB for processes, thus reducing the number of TLB
15 * flushes required.
16 *
17 * Note, however, that the M32R algorithm is technically broken as it does not
18 * handle version wrap-around, and could, theoretically, have a problem with a
19 * very long lived program that sleeps long enough for the version number to
20 * wrap all the way around so that its TLB mappings appear valid once again.
21 */
22#ifndef _ASM_MMU_CONTEXT_H
23#define _ASM_MMU_CONTEXT_H
24
25#include <asm/atomic.h>
26#include <asm/pgalloc.h>
27#include <asm/tlbflush.h>
28#include <asm-generic/mm_hooks.h>
29
30#define MMU_CONTEXT_TLBPID_MASK 0x000000ffUL
31#define MMU_CONTEXT_VERSION_MASK 0xffffff00UL
32#define MMU_CONTEXT_FIRST_VERSION 0x00000100UL
33#define MMU_NO_CONTEXT 0x00000000UL
34
35extern unsigned long mmu_context_cache[NR_CPUS];
36#define mm_context(mm) (mm->context.tlbpid[smp_processor_id()])
37
38#define enter_lazy_tlb(mm, tsk) do {} while (0)
39
40#ifdef CONFIG_SMP
41#define cpu_ran_vm(cpu, task) \
42 cpu_set((cpu), (task)->cpu_vm_mask)
43#define cpu_maybe_ran_vm(cpu, task) \
44 cpu_test_and_set((cpu), (task)->cpu_vm_mask)
45#else
46#define cpu_ran_vm(cpu, task) do {} while (0)
47#define cpu_maybe_ran_vm(cpu, task) true
48#endif /* CONFIG_SMP */
49
50/*
51 * allocate an MMU context
52 */
53static inline unsigned long allocate_mmu_context(struct mm_struct *mm)
54{
55 unsigned long *pmc = &mmu_context_cache[smp_processor_id()];
56 unsigned long mc = ++(*pmc);
57
58 if (!(mc & MMU_CONTEXT_TLBPID_MASK)) {
59 /* we exhausted the TLB PIDs of this version on this CPU, so we
60 * flush this CPU's TLB in its entirety and start new cycle */
61 flush_tlb_all();
62
63 /* fix the TLB version if needed (we avoid version #0 so as to
64 * distingush MMU_NO_CONTEXT) */
65 if (!mc)
66 *pmc = mc = MMU_CONTEXT_FIRST_VERSION;
67 }
68 mm_context(mm) = mc;
69 return mc;
70}
71
72/*
73 * get an MMU context if one is needed
74 */
75static inline unsigned long get_mmu_context(struct mm_struct *mm)
76{
77 unsigned long mc = MMU_NO_CONTEXT, cache;
78
79 if (mm) {
80 cache = mmu_context_cache[smp_processor_id()];
81 mc = mm_context(mm);
82
83 /* if we have an old version of the context, replace it */
84 if ((mc ^ cache) & MMU_CONTEXT_VERSION_MASK)
85 mc = allocate_mmu_context(mm);
86 }
87 return mc;
88}
89
90/*
91 * initialise the context related info for a new mm_struct instance
92 */
93static inline int init_new_context(struct task_struct *tsk,
94 struct mm_struct *mm)
95{
96 int num_cpus = NR_CPUS, i;
97
98 for (i = 0; i < num_cpus; i++)
99 mm->context.tlbpid[i] = MMU_NO_CONTEXT;
100 return 0;
101}
102
103/*
104 * destroy context related info for an mm_struct that is about to be put to
105 * rest
106 */
107#define destroy_context(mm) do { } while (0)
108
109/*
110 * after we have set current->mm to a new value, this activates the context for
111 * the new mm so we see the new mappings.
112 */
113static inline void activate_context(struct mm_struct *mm, int cpu)
114{
115 PIDR = get_mmu_context(mm) & MMU_CONTEXT_TLBPID_MASK;
116}
117
118/*
119 * change between virtual memory sets
120 */
121static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
122 struct task_struct *tsk)
123{
124 int cpu = smp_processor_id();
125
126 if (prev != next) {
127 cpu_ran_vm(cpu, next);
128 activate_context(next, cpu);
129 PTBR = (unsigned long) next->pgd;
130 } else if (!cpu_maybe_ran_vm(cpu, next)) {
131 activate_context(next, cpu);
132 }
133}
134
135#define deactivate_mm(tsk, mm) do {} while (0)
136#define activate_mm(prev, next) switch_mm((prev), (next), NULL)
137
138#endif /* _ASM_MMU_CONTEXT_H */
diff --git a/include/asm-mn10300/module.h b/include/asm-mn10300/module.h
new file mode 100644
index 000000000000..5d7057d01494
--- /dev/null
+++ b/include/asm-mn10300/module.h
@@ -0,0 +1,27 @@
1/* MN10300 Arch-specific module definitions
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by Mark Salter (msalter@redhat.com)
5 * Derived from include/asm-i386/module.h
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public Licence
9 * as published by the Free Software Foundation; either version
10 * 2 of the Licence, or (at your option) any later version.
11 */
12#ifndef _ASM_MODULE_H
13#define _ASM_MODULE_H
14
15struct mod_arch_specific {
16};
17
18#define Elf_Shdr Elf32_Shdr
19#define Elf_Sym Elf32_Sym
20#define Elf_Ehdr Elf32_Ehdr
21
22/*
23 * Include the MN10300 architecture version.
24 */
25#define MODULE_ARCH_VERMAGIC __stringify(PROCESSOR_MODEL_NAME) " "
26
27#endif /* _ASM_MODULE_H */
diff --git a/include/asm-mn10300/msgbuf.h b/include/asm-mn10300/msgbuf.h
new file mode 100644
index 000000000000..8b602450cc4a
--- /dev/null
+++ b/include/asm-mn10300/msgbuf.h
@@ -0,0 +1,31 @@
1#ifndef _ASM_MSGBUF_H
2#define _ASM_MSGBUF_H
3
4/*
5 * The msqid64_ds structure for MN10300 architecture.
6 * Note extra padding because this structure is passed back and forth
7 * between kernel and user space.
8 *
9 * Pad space is left for:
10 * - 64-bit time_t to solve y2038 problem
11 * - 2 miscellaneous 32-bit values
12 */
13
14struct msqid64_ds {
15 struct ipc64_perm msg_perm;
16 __kernel_time_t msg_stime; /* last msgsnd time */
17 unsigned long __unused1;
18 __kernel_time_t msg_rtime; /* last msgrcv time */
19 unsigned long __unused2;
20 __kernel_time_t msg_ctime; /* last change time */
21 unsigned long __unused3;
22 unsigned long msg_cbytes; /* current number of bytes on queue */
23 unsigned long msg_qnum; /* number of messages in queue */
24 unsigned long msg_qbytes; /* max number of bytes on queue */
25 __kernel_pid_t msg_lspid; /* pid of last msgsnd */
26 __kernel_pid_t msg_lrpid; /* last receive pid */
27 unsigned long __unused4;
28 unsigned long __unused5;
29};
30
31#endif /* _ASM_MSGBUF_H */
diff --git a/include/asm-mn10300/mutex.h b/include/asm-mn10300/mutex.h
new file mode 100644
index 000000000000..84f5490c6fb4
--- /dev/null
+++ b/include/asm-mn10300/mutex.h
@@ -0,0 +1,16 @@
1/* MN10300 Mutex fastpath
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 *
11 *
12 * TODO: implement optimized primitives instead, or leave the generic
13 * implementation in place, or pick the atomic_xchg() based generic
14 * implementation. (see asm-generic/mutex-xchg.h for details)
15 */
16#include <asm-generic/mutex-null.h>
diff --git a/include/asm-mn10300/namei.h b/include/asm-mn10300/namei.h
new file mode 100644
index 000000000000..bd9ce94aeb65
--- /dev/null
+++ b/include/asm-mn10300/namei.h
@@ -0,0 +1,22 @@
1/* Emulation stuff
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11
12#ifndef _ASM_NAMEI_H
13#define _ASM_NAMEI_H
14
15/* This dummy routine maybe changed to something useful
16 * for /usr/gnemul/ emulation stuff.
17 * Look at asm-sparc/namei.h for details.
18 */
19
20#define __emul_prefix() NULL
21
22#endif /* _ASM_NAMEI_H */
diff --git a/include/asm-mn10300/nmi.h b/include/asm-mn10300/nmi.h
new file mode 100644
index 000000000000..f3671cbbc117
--- /dev/null
+++ b/include/asm-mn10300/nmi.h
@@ -0,0 +1,14 @@
1/* MN10300 NMI handling
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_NMI_H
12#define _ASM_NMI_H
13
14#endif /* _ASM_NMI_H */
diff --git a/include/asm-mn10300/page.h b/include/asm-mn10300/page.h
new file mode 100644
index 000000000000..124971b9fb9b
--- /dev/null
+++ b/include/asm-mn10300/page.h
@@ -0,0 +1,131 @@
1/* MN10300 Page table definitions
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_PAGE_H
12#define _ASM_PAGE_H
13
14/* PAGE_SHIFT determines the page size */
15#define PAGE_SHIFT 12
16
17#ifndef __ASSEMBLY__
18#define PAGE_SIZE (1UL << PAGE_SHIFT)
19#define PAGE_MASK (~(PAGE_SIZE - 1))
20#else
21#define PAGE_SIZE +(1 << PAGE_SHIFT) /* unary plus marks an
22 * immediate val not an addr */
23#define PAGE_MASK +(~(PAGE_SIZE - 1))
24#endif
25
26#ifdef __KERNEL__
27#ifndef __ASSEMBLY__
28
29#define clear_page(page) memset((void *)(page), 0, PAGE_SIZE)
30#define copy_page(to, from) memcpy((void *)(to), (void *)(from), PAGE_SIZE)
31
32#define clear_user_page(addr, vaddr, page) clear_page(addr)
33#define copy_user_page(vto, vfrom, vaddr, to) copy_page(vto, vfrom)
34
35/*
36 * These are used to make use of C type-checking..
37 */
38typedef struct { unsigned long pte; } pte_t;
39typedef struct { unsigned long pgd; } pgd_t;
40typedef struct { unsigned long pgprot; } pgprot_t;
41typedef struct page *pgtable_t;
42
43#define PTE_MASK PAGE_MASK
44#define HPAGE_SHIFT 22
45
46#ifdef CONFIG_HUGETLB_PAGE
47#define HPAGE_SIZE ((1UL) << HPAGE_SHIFT)
48#define HPAGE_MASK (~(HPAGE_SIZE - 1))
49#define HUGETLB_PAGE_ORDER (HPAGE_SHIFT - PAGE_SHIFT)
50#endif
51
52#define pte_val(x) ((x).pte)
53#define pgd_val(x) ((x).pgd)
54#define pgprot_val(x) ((x).pgprot)
55
56#define __pte(x) ((pte_t) { (x) })
57#define __pgd(x) ((pgd_t) { (x) })
58#define __pgprot(x) ((pgprot_t) { (x) })
59
60#include <asm-generic/pgtable-nopmd.h>
61
62#endif /* !__ASSEMBLY__ */
63
64/* to align the pointer to the (next) page boundary */
65#define PAGE_ALIGN(addr) (((addr) + PAGE_SIZE - 1) & PAGE_MASK)
66
67/*
68 * This handles the memory map.. We could make this a config
69 * option, but too many people screw it up, and too few need
70 * it.
71 *
72 * A __PAGE_OFFSET of 0xC0000000 means that the kernel has
73 * a virtual address space of one gigabyte, which limits the
74 * amount of physical memory you can use to about 950MB.
75 */
76
77#ifndef __ASSEMBLY__
78
79/* Pure 2^n version of get_order */
80static inline int get_order(unsigned long size) __attribute__((const));
81static inline int get_order(unsigned long size)
82{
83 int order;
84
85 size = (size - 1) >> (PAGE_SHIFT - 1);
86 order = -1;
87 do {
88 size >>= 1;
89 order++;
90 } while (size);
91 return order;
92}
93
94#endif /* __ASSEMBLY__ */
95
96#include <asm/page_offset.h>
97
98#define __PAGE_OFFSET (PAGE_OFFSET_RAW)
99#define PAGE_OFFSET ((unsigned long) __PAGE_OFFSET)
100
101/*
102 * main RAM and kernel working space are coincident at 0x90000000, but to make
103 * life more interesting, there's also an uncached virtual shadow at 0xb0000000
104 * - these mappings are fixed in the MMU
105 */
106#define __pfn_disp (CONFIG_KERNEL_RAM_BASE_ADDRESS >> PAGE_SHIFT)
107
108#define __pa(x) ((unsigned long)(x))
109#define __va(x) ((void *)(unsigned long)(x))
110#define pfn_to_kaddr(pfn) __va((pfn) << PAGE_SHIFT)
111#define pfn_to_page(pfn) (mem_map + ((pfn) - __pfn_disp))
112#define page_to_pfn(page) ((unsigned long)((page) - mem_map) + __pfn_disp)
113
114#define pfn_valid(pfn) \
115({ \
116 unsigned long __pfn = (pfn) - __pfn_disp; \
117 __pfn < max_mapnr; \
118})
119
120#define virt_to_page(kaddr) pfn_to_page(__pa(kaddr) >> PAGE_SHIFT)
121#define virt_addr_valid(kaddr) pfn_valid(__pa(kaddr) >> PAGE_SHIFT)
122#define page_to_phys(page) (page_to_pfn(page) << PAGE_SHIFT)
123
124#define VM_DATA_DEFAULT_FLAGS \
125 (VM_READ | VM_WRITE | \
126 ((current->personality & READ_IMPLIES_EXEC) ? VM_EXEC : 0) | \
127 VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
128
129#endif /* __KERNEL__ */
130
131#endif /* _ASM_PAGE_H */
diff --git a/include/asm-mn10300/page_offset.h b/include/asm-mn10300/page_offset.h
new file mode 100644
index 000000000000..8eb5b16ad86b
--- /dev/null
+++ b/include/asm-mn10300/page_offset.h
@@ -0,0 +1,11 @@
1/* MN10300 Kernel base address
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 */
6#ifndef _ASM_PAGE_OFFSET_H
7#define _ASM_PAGE_OFFSET_H
8
9#define PAGE_OFFSET_RAW CONFIG_KERNEL_RAM_BASE_ADDRESS
10
11#endif
diff --git a/include/asm-mn10300/param.h b/include/asm-mn10300/param.h
new file mode 100644
index 000000000000..54b883ec3906
--- /dev/null
+++ b/include/asm-mn10300/param.h
@@ -0,0 +1,34 @@
1/* MN10300 Kernel parameters
2 *
3 * Copyright (C) 2007 Matsushita Electric Industrial Co., Ltd.
4 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_PARAM_H
12#define _ASM_PARAM_H
13
14#ifdef __KERNEL__
15#define HZ 1000 /* Internal kernel timer frequency */
16#define USER_HZ 100 /* .. some user interfaces are in
17 * "ticks" */
18#define CLOCKS_PER_SEC (USER_HZ) /* like times() */
19#endif
20
21#ifndef HZ
22#define HZ 100
23#endif
24
25#define EXEC_PAGESIZE 4096
26
27#ifndef NOGROUP
28#define NOGROUP (-1)
29#endif
30
31#define MAXHOSTNAMELEN 64 /* max length of hostname */
32#define COMMAND_LINE_SIZE 256
33
34#endif /* _ASM_PARAM_H */
diff --git a/include/asm-mn10300/pci.h b/include/asm-mn10300/pci.h
new file mode 100644
index 000000000000..205192c52bb5
--- /dev/null
+++ b/include/asm-mn10300/pci.h
@@ -0,0 +1,133 @@
1/* MN10300 PCI definitions
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_PCI_H
12#define _ASM_PCI_H
13
14#ifdef __KERNEL__
15#include <linux/mm.h> /* for struct page */
16
17#if 0
18#define __pcbdebug(FMT, ADDR, ...) \
19 printk(KERN_DEBUG "PCIBRIDGE[%08x]: "FMT"\n", \
20 (u32)(ADDR), ##__VA_ARGS__)
21
22#define __pcidebug(FMT, BUS, DEVFN, WHERE,...) \
23do { \
24 printk(KERN_DEBUG "PCI[%02x:%02x.%x + %02x]: "FMT"\n", \
25 (BUS)->number, \
26 PCI_SLOT(DEVFN), \
27 PCI_FUNC(DEVFN), \
28 (u32)(WHERE), ##__VA_ARGS__); \
29} while (0)
30
31#else
32#define __pcbdebug(FMT, ADDR, ...) do {} while (0)
33#define __pcidebug(FMT, BUS, DEVFN, WHERE, ...) do {} while (0)
34#endif
35
36/* Can be used to override the logic in pci_scan_bus for skipping
37 * already-configured bus numbers - to be used for buggy BIOSes or
38 * architectures with incomplete PCI setup by the loader */
39
40#ifdef CONFIG_PCI
41#define pcibios_assign_all_busses() 1
42extern void unit_pci_init(void);
43#else
44#define pcibios_assign_all_busses() 0
45#endif
46
47extern unsigned long pci_mem_start;
48#define PCIBIOS_MIN_IO 0xBE000004
49#define PCIBIOS_MIN_MEM 0xB8000000
50
51void pcibios_set_master(struct pci_dev *dev);
52void pcibios_penalize_isa_irq(int irq);
53
54/* Dynamic DMA mapping stuff.
55 * i386 has everything mapped statically.
56 */
57
58#include <linux/types.h>
59#include <linux/slab.h>
60#include <asm/scatterlist.h>
61#include <linux/string.h>
62#include <linux/mm.h>
63#include <asm/io.h>
64
65struct pci_dev;
66
67/* The PCI address space does equal the physical memory
68 * address space. The networking and block device layers use
69 * this boolean for bounce buffer decisions.
70 */
71#define PCI_DMA_BUS_IS_PHYS (1)
72
73
74/* This is always fine. */
75#define pci_dac_dma_supported(pci_dev, mask) (0)
76
77/*
78 * These macros should be used after a pci_map_sg call has been done
79 * to get bus addresses of each of the SG entries and their lengths.
80 * You should only work with the number of sg entries pci_map_sg
81 * returns.
82 */
83#define sg_dma_address(sg) ((sg)->dma_address)
84#define sg_dma_len(sg) ((sg)->length)
85
86/* Return the index of the PCI controller for device. */
87static inline int pci_controller_num(struct pci_dev *dev)
88{
89 return 0;
90}
91
92#define HAVE_PCI_MMAP
93extern int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,
94 enum pci_mmap_state mmap_state,
95 int write_combine);
96
97#endif /* __KERNEL__ */
98
99/* implement the pci_ DMA API in terms of the generic device dma_ one */
100#include <asm-generic/pci-dma-compat.h>
101
102/**
103 * pcibios_resource_to_bus - convert resource to PCI bus address
104 * @dev: device which owns this resource
105 * @region: converted bus-centric region (start,end)
106 * @res: resource to convert
107 *
108 * Convert a resource to a PCI device bus address or bus window.
109 */
110extern void pcibios_resource_to_bus(struct pci_dev *dev,
111 struct pci_bus_region *region,
112 struct resource *res);
113
114extern void pcibios_bus_to_resource(struct pci_dev *dev,
115 struct resource *res,
116 struct pci_bus_region *region);
117
118static inline struct resource *
119pcibios_select_root(struct pci_dev *pdev, struct resource *res)
120{
121 struct resource *root = NULL;
122
123 if (res->flags & IORESOURCE_IO)
124 root = &ioport_resource;
125 if (res->flags & IORESOURCE_MEM)
126 root = &iomem_resource;
127
128 return root;
129}
130
131#define pcibios_scan_all_fns(a, b) 0
132
133#endif /* _ASM_PCI_H */
diff --git a/include/asm-mn10300/percpu.h b/include/asm-mn10300/percpu.h
new file mode 100644
index 000000000000..06a959d67234
--- /dev/null
+++ b/include/asm-mn10300/percpu.h
@@ -0,0 +1 @@
#include <asm-generic/percpu.h>
diff --git a/include/asm-mn10300/pgalloc.h b/include/asm-mn10300/pgalloc.h
new file mode 100644
index 000000000000..ec057e1bd4cf
--- /dev/null
+++ b/include/asm-mn10300/pgalloc.h
@@ -0,0 +1,56 @@
1/* MN10300 Page and page table/directory allocation
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_PGALLOC_H
12#define _ASM_PGALLOC_H
13
14#include <asm/processor.h>
15#include <asm/page.h>
16#include <linux/threads.h>
17#include <linux/mm.h> /* for struct page */
18
19struct mm_struct;
20struct page;
21
22/* attach a page table to a PMD entry */
23#define pmd_populate_kernel(mm, pmd, pte) \
24 set_pmd(pmd, __pmd(__pa(pte) | _PAGE_TABLE))
25
26static inline
27void pmd_populate(struct mm_struct *mm, pmd_t *pmd, struct page *pte)
28{
29 set_pmd(pmd, __pmd((page_to_pfn(pte) << PAGE_SHIFT) | _PAGE_TABLE));
30}
31#define pmd_pgtable(pmd) pmd_page(pmd)
32
33/*
34 * Allocate and free page tables.
35 */
36
37extern pgd_t *pgd_alloc(struct mm_struct *);
38extern void pgd_free(struct mm_struct *, pgd_t *);
39
40extern pte_t *pte_alloc_one_kernel(struct mm_struct *, unsigned long);
41extern struct page *pte_alloc_one(struct mm_struct *, unsigned long);
42
43static inline void pte_free_kernel(struct mm_struct *mm, pte_t *pte)
44{
45 free_page((unsigned long) pte);
46}
47
48static inline void pte_free(struct mm_struct *mm, struct page *pte)
49{
50 __free_page(pte);
51}
52
53
54#define __pte_free_tlb(tlb, pte) tlb_remove_page((tlb), (pte))
55
56#endif /* _ASM_PGALLOC_H */
diff --git a/include/asm-mn10300/pgtable.h b/include/asm-mn10300/pgtable.h
new file mode 100644
index 000000000000..375c4941deda
--- /dev/null
+++ b/include/asm-mn10300/pgtable.h
@@ -0,0 +1,489 @@
1/* MN10300 Page table manipulators and constants
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 *
11 *
12 * The Linux memory management assumes a three-level page table setup. On
13 * the i386, we use that, but "fold" the mid level into the top-level page
14 * table, so that we physically have the same two-level page table as the
15 * i386 mmu expects.
16 *
17 * This file contains the functions and defines necessary to modify and use
18 * the i386 page table tree for the purposes of the MN10300 TLB handler
19 * functions.
20 */
21#ifndef _ASM_PGTABLE_H
22#define _ASM_PGTABLE_H
23
24#include <asm/cpu-regs.h>
25
26#ifndef __ASSEMBLY__
27#include <asm/processor.h>
28#include <asm/cache.h>
29#include <linux/threads.h>
30
31#include <asm/bitops.h>
32
33#include <linux/slab.h>
34#include <linux/list.h>
35#include <linux/spinlock.h>
36
37/*
38 * ZERO_PAGE is a global shared page that is always zero: used
39 * for zero-mapped memory areas etc..
40 */
41#define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page))
42extern unsigned long empty_zero_page[1024];
43extern spinlock_t pgd_lock;
44extern struct page *pgd_list;
45
46extern void pmd_ctor(void *, struct kmem_cache *, unsigned long);
47extern void pgtable_cache_init(void);
48extern void paging_init(void);
49
50#endif /* !__ASSEMBLY__ */
51
52/*
53 * The Linux mn10300 paging architecture only implements both the traditional
54 * 2-level page tables
55 */
56#define PGDIR_SHIFT 22
57#define PTRS_PER_PGD 1024
58#define PTRS_PER_PUD 1 /* we don't really have any PUD physically */
59#define PTRS_PER_PMD 1 /* we don't really have any PMD physically */
60#define PTRS_PER_PTE 1024
61
62#define PGD_SIZE PAGE_SIZE
63#define PMD_SIZE (1UL << PMD_SHIFT)
64#define PGDIR_SIZE (1UL << PGDIR_SHIFT)
65#define PGDIR_MASK (~(PGDIR_SIZE - 1))
66
67#define USER_PTRS_PER_PGD (TASK_SIZE / PGDIR_SIZE)
68#define FIRST_USER_ADDRESS 0
69
70#define USER_PGD_PTRS (PAGE_OFFSET >> PGDIR_SHIFT)
71#define KERNEL_PGD_PTRS (PTRS_PER_PGD - USER_PGD_PTRS)
72
73#define TWOLEVEL_PGDIR_SHIFT 22
74#define BOOT_USER_PGD_PTRS (__PAGE_OFFSET >> TWOLEVEL_PGDIR_SHIFT)
75#define BOOT_KERNEL_PGD_PTRS (1024 - BOOT_USER_PGD_PTRS)
76
77#ifndef __ASSEMBLY__
78extern pgd_t swapper_pg_dir[PTRS_PER_PGD];
79#endif
80
81/*
82 * Unfortunately, due to the way the MMU works on the MN10300, the vmalloc VM
83 * area has to be in the lower half of the virtual address range (the upper
84 * half is not translated through the TLB).
85 *
86 * So in this case, the vmalloc area goes at the bottom of the address map
87 * (leaving a hole at the very bottom to catch addressing errors), and
88 * userspace starts immediately above.
89 *
90 * The vmalloc() routines also leaves a hole of 4kB between each vmalloced
91 * area to catch addressing errors.
92 */
93#define VMALLOC_OFFSET (8 * 1024 * 1024)
94#define VMALLOC_START (0x70000000)
95#define VMALLOC_END (0x7C000000)
96
97#ifndef __ASSEMBLY__
98extern pte_t kernel_vmalloc_ptes[(VMALLOC_END - VMALLOC_START) / PAGE_SIZE];
99#endif
100
101/* IPTEL/DPTEL bit assignments */
102#define _PAGE_BIT_VALID xPTEL_V_BIT
103#define _PAGE_BIT_ACCESSED xPTEL_UNUSED1_BIT /* mustn't be loaded into IPTEL/DPTEL */
104#define _PAGE_BIT_NX xPTEL_UNUSED2_BIT /* mustn't be loaded into IPTEL/DPTEL */
105#define _PAGE_BIT_CACHE xPTEL_C_BIT
106#define _PAGE_BIT_PRESENT xPTEL_PV_BIT
107#define _PAGE_BIT_DIRTY xPTEL_D_BIT
108#define _PAGE_BIT_GLOBAL xPTEL_G_BIT
109
110#define _PAGE_VALID xPTEL_V
111#define _PAGE_ACCESSED xPTEL_UNUSED1
112#define _PAGE_NX xPTEL_UNUSED2 /* no-execute bit */
113#define _PAGE_CACHE xPTEL_C
114#define _PAGE_PRESENT xPTEL_PV
115#define _PAGE_DIRTY xPTEL_D
116#define _PAGE_PROT xPTEL_PR
117#define _PAGE_PROT_RKNU xPTEL_PR_ROK
118#define _PAGE_PROT_WKNU xPTEL_PR_RWK
119#define _PAGE_PROT_RKRU xPTEL_PR_ROK_ROU
120#define _PAGE_PROT_WKRU xPTEL_PR_RWK_ROU
121#define _PAGE_PROT_WKWU xPTEL_PR_RWK_RWU
122#define _PAGE_GLOBAL xPTEL_G
123#define _PAGE_PSE xPTEL_PS_4Mb /* 4MB page */
124
125#define _PAGE_FILE xPTEL_UNUSED1_BIT /* set:pagecache unset:swap */
126
127#define __PAGE_PROT_UWAUX 0x040
128#define __PAGE_PROT_USER 0x080
129#define __PAGE_PROT_WRITE 0x100
130
131#define _PAGE_PRESENTV (_PAGE_PRESENT|_PAGE_VALID)
132#define _PAGE_PROTNONE 0x000 /* If not present */
133
134#ifndef __ASSEMBLY__
135
136#define VMALLOC_VMADDR(x) ((unsigned long)(x))
137
138#define _PAGE_TABLE (_PAGE_PRESENTV | _PAGE_PROT_WKNU | _PAGE_ACCESSED | _PAGE_DIRTY)
139#define _PAGE_CHG_MASK (PTE_MASK | _PAGE_ACCESSED | _PAGE_DIRTY)
140
141#define __PAGE_NONE (_PAGE_PRESENTV | _PAGE_PROT_RKNU | _PAGE_ACCESSED | _PAGE_CACHE)
142#define __PAGE_SHARED (_PAGE_PRESENTV | _PAGE_PROT_WKWU | _PAGE_ACCESSED | _PAGE_CACHE)
143#define __PAGE_COPY (_PAGE_PRESENTV | _PAGE_PROT_RKRU | _PAGE_ACCESSED | _PAGE_CACHE)
144#define __PAGE_READONLY (_PAGE_PRESENTV | _PAGE_PROT_RKRU | _PAGE_ACCESSED | _PAGE_CACHE)
145
146#define PAGE_NONE __pgprot(__PAGE_NONE | _PAGE_NX)
147#define PAGE_SHARED_NOEXEC __pgprot(__PAGE_SHARED | _PAGE_NX)
148#define PAGE_COPY_NOEXEC __pgprot(__PAGE_COPY | _PAGE_NX)
149#define PAGE_READONLY_NOEXEC __pgprot(__PAGE_READONLY | _PAGE_NX)
150#define PAGE_SHARED_EXEC __pgprot(__PAGE_SHARED)
151#define PAGE_COPY_EXEC __pgprot(__PAGE_COPY)
152#define PAGE_READONLY_EXEC __pgprot(__PAGE_READONLY)
153#define PAGE_COPY PAGE_COPY_NOEXEC
154#define PAGE_READONLY PAGE_READONLY_NOEXEC
155#define PAGE_SHARED PAGE_SHARED_EXEC
156
157#define __PAGE_KERNEL_BASE (_PAGE_PRESENTV | _PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_GLOBAL)
158
159#define __PAGE_KERNEL (__PAGE_KERNEL_BASE | _PAGE_PROT_WKNU | _PAGE_CACHE | _PAGE_NX)
160#define __PAGE_KERNEL_NOCACHE (__PAGE_KERNEL_BASE | _PAGE_PROT_WKNU | _PAGE_NX)
161#define __PAGE_KERNEL_EXEC (__PAGE_KERNEL & ~_PAGE_NX)
162#define __PAGE_KERNEL_RO (__PAGE_KERNEL_BASE | _PAGE_PROT_RKNU | _PAGE_CACHE | _PAGE_NX)
163#define __PAGE_KERNEL_LARGE (__PAGE_KERNEL | _PAGE_PSE)
164#define __PAGE_KERNEL_LARGE_EXEC (__PAGE_KERNEL_EXEC | _PAGE_PSE)
165
166#define PAGE_KERNEL __pgprot(__PAGE_KERNEL)
167#define PAGE_KERNEL_RO __pgprot(__PAGE_KERNEL_RO)
168#define PAGE_KERNEL_EXEC __pgprot(__PAGE_KERNEL_EXEC)
169#define PAGE_KERNEL_NOCACHE __pgprot(__PAGE_KERNEL_NOCACHE)
170#define PAGE_KERNEL_LARGE __pgprot(__PAGE_KERNEL_LARGE)
171#define PAGE_KERNEL_LARGE_EXEC __pgprot(__PAGE_KERNEL_LARGE_EXEC)
172
173/*
174 * Whilst the MN10300 can do page protection for execute (given separate data
175 * and insn TLBs), we are not supporting it at the moment. Write permission,
176 * however, always implies read permission (but not execute permission).
177 */
178#define __P000 PAGE_NONE
179#define __P001 PAGE_READONLY_NOEXEC
180#define __P010 PAGE_COPY_NOEXEC
181#define __P011 PAGE_COPY_NOEXEC
182#define __P100 PAGE_READONLY_EXEC
183#define __P101 PAGE_READONLY_EXEC
184#define __P110 PAGE_COPY_EXEC
185#define __P111 PAGE_COPY_EXEC
186
187#define __S000 PAGE_NONE
188#define __S001 PAGE_READONLY_NOEXEC
189#define __S010 PAGE_SHARED_NOEXEC
190#define __S011 PAGE_SHARED_NOEXEC
191#define __S100 PAGE_READONLY_EXEC
192#define __S101 PAGE_READONLY_EXEC
193#define __S110 PAGE_SHARED_EXEC
194#define __S111 PAGE_SHARED_EXEC
195
196/*
197 * Define this to warn about kernel memory accesses that are
198 * done without a 'verify_area(VERIFY_WRITE,..)'
199 */
200#undef TEST_VERIFY_AREA
201
202#define pte_present(x) (pte_val(x) & _PAGE_VALID)
203#define pte_clear(mm, addr, xp) \
204do { \
205 set_pte_at((mm), (addr), (xp), __pte(0)); \
206} while (0)
207
208#define pmd_none(x) (!pmd_val(x))
209#define pmd_present(x) (!pmd_none(x))
210#define pmd_clear(xp) do { set_pmd(xp, __pmd(0)); } while (0)
211#define pmd_bad(x) 0
212
213
214#define pages_to_mb(x) ((x) >> (20 - PAGE_SHIFT))
215
216#ifndef __ASSEMBLY__
217
218/*
219 * The following only work if pte_present() is true.
220 * Undefined behaviour if not..
221 */
222static inline int pte_user(pte_t pte) { return pte_val(pte) & __PAGE_PROT_USER; }
223static inline int pte_read(pte_t pte) { return pte_val(pte) & __PAGE_PROT_USER; }
224static inline int pte_dirty(pte_t pte) { return pte_val(pte) & _PAGE_DIRTY; }
225static inline int pte_young(pte_t pte) { return pte_val(pte) & _PAGE_ACCESSED; }
226static inline int pte_write(pte_t pte) { return pte_val(pte) & __PAGE_PROT_WRITE; }
227
228/*
229 * The following only works if pte_present() is not true.
230 */
231static inline int pte_file(pte_t pte) { return pte_val(pte) & _PAGE_FILE; }
232
233static inline pte_t pte_rdprotect(pte_t pte)
234{
235 pte_val(pte) &= ~(__PAGE_PROT_USER|__PAGE_PROT_UWAUX); return pte;
236}
237static inline pte_t pte_exprotect(pte_t pte)
238{
239 pte_val(pte) |= _PAGE_NX; return pte;
240}
241
242static inline pte_t pte_wrprotect(pte_t pte)
243{
244 pte_val(pte) &= ~(__PAGE_PROT_WRITE|__PAGE_PROT_UWAUX); return pte;
245}
246
247static inline pte_t pte_mkclean(pte_t pte) { pte_val(pte) &= ~_PAGE_DIRTY; return pte; }
248static inline pte_t pte_mkold(pte_t pte) { pte_val(pte) &= ~_PAGE_ACCESSED; return pte; }
249static inline pte_t pte_mkdirty(pte_t pte) { pte_val(pte) |= _PAGE_DIRTY; return pte; }
250static inline pte_t pte_mkyoung(pte_t pte) { pte_val(pte) |= _PAGE_ACCESSED; return pte; }
251static inline pte_t pte_mkexec(pte_t pte) { pte_val(pte) &= ~_PAGE_NX; return pte; }
252
253static inline pte_t pte_mkread(pte_t pte)
254{
255 pte_val(pte) |= __PAGE_PROT_USER;
256 if (pte_write(pte))
257 pte_val(pte) |= __PAGE_PROT_UWAUX;
258 return pte;
259}
260static inline pte_t pte_mkwrite(pte_t pte)
261{
262 pte_val(pte) |= __PAGE_PROT_WRITE;
263 if (pte_val(pte) & __PAGE_PROT_USER)
264 pte_val(pte) |= __PAGE_PROT_UWAUX;
265 return pte;
266}
267
268#define pte_ERROR(e) \
269 printk(KERN_ERR "%s:%d: bad pte %08lx.\n", \
270 __FILE__, __LINE__, pte_val(e))
271#define pgd_ERROR(e) \
272 printk(KERN_ERR "%s:%d: bad pgd %08lx.\n", \
273 __FILE__, __LINE__, pgd_val(e))
274
275/*
276 * The "pgd_xxx()" functions here are trivial for a folded two-level
277 * setup: the pgd is never bad, and a pmd always exists (as it's folded
278 * into the pgd entry)
279 */
280#define pgd_clear(xp) do { } while (0)
281
282/*
283 * Certain architectures need to do special things when PTEs
284 * within a page table are directly modified. Thus, the following
285 * hook is made available.
286 */
287#define set_pte(pteptr, pteval) (*(pteptr) = pteval)
288#define set_pte_at(mm, addr, ptep, pteval) set_pte((ptep), (pteval))
289#define set_pte_atomic(pteptr, pteval) set_pte((pteptr), (pteval))
290
291/*
292 * (pmds are folded into pgds so this doesn't get actually called,
293 * but the define is needed for a generic inline function.)
294 */
295#define set_pmd(pmdptr, pmdval) (*(pmdptr) = pmdval)
296
297#define ptep_get_and_clear(mm, addr, ptep) \
298 __pte(xchg(&(ptep)->pte, 0))
299#define pte_same(a, b) (pte_val(a) == pte_val(b))
300#define pte_page(x) pfn_to_page(pte_pfn(x))
301#define pte_none(x) (!pte_val(x))
302#define pte_pfn(x) ((unsigned long) (pte_val(x) >> PAGE_SHIFT))
303#define __pfn_addr(pfn) ((pfn) << PAGE_SHIFT)
304#define pfn_pte(pfn, prot) __pte(__pfn_addr(pfn) | pgprot_val(prot))
305#define pfn_pmd(pfn, prot) __pmd(__pfn_addr(pfn) | pgprot_val(prot))
306
307/*
308 * All present user pages are user-executable:
309 */
310static inline int pte_exec(pte_t pte)
311{
312 return pte_user(pte);
313}
314
315/*
316 * All present pages are kernel-executable:
317 */
318static inline int pte_exec_kernel(pte_t pte)
319{
320 return 1;
321}
322
323/*
324 * Bits 0 and 1 are taken, split up the 29 bits of offset
325 * into this range:
326 */
327#define PTE_FILE_MAX_BITS 29
328
329#define pte_to_pgoff(pte) (pte_val(pte) >> 2)
330#define pgoff_to_pte(off) __pte((off) << 2 | _PAGE_FILE)
331
332/* Encode and de-code a swap entry */
333#define __swp_type(x) (((x).val >> 2) & 0x3f)
334#define __swp_offset(x) ((x).val >> 8)
335#define __swp_entry(type, offset) \
336 ((swp_entry_t) { ((type) << 2) | ((offset) << 8) })
337#define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
338#define __swp_entry_to_pte(x) __pte((x).val)
339
340static inline
341int ptep_test_and_clear_dirty(struct vm_area_struct *vma, unsigned long addr,
342 pte_t *ptep)
343{
344 if (!pte_dirty(*ptep))
345 return 0;
346 return test_and_clear_bit(_PAGE_BIT_DIRTY, &ptep->pte);
347}
348
349static inline
350int ptep_test_and_clear_young(struct vm_area_struct *vma, unsigned long addr,
351 pte_t *ptep)
352{
353 if (!pte_young(*ptep))
354 return 0;
355 return test_and_clear_bit(_PAGE_BIT_ACCESSED, &ptep->pte);
356}
357
358static inline
359void ptep_set_wrprotect(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
360{
361 pte_val(*ptep) &= ~(__PAGE_PROT_WRITE|__PAGE_PROT_UWAUX);
362}
363
364static inline void ptep_mkdirty(pte_t *ptep)
365{
366 set_bit(_PAGE_BIT_DIRTY, &ptep->pte);
367}
368
369/*
370 * Macro to mark a page protection value as "uncacheable". On processors which
371 * do not support it, this is a no-op.
372 */
373#define pgprot_noncached(prot) __pgprot(pgprot_val(prot) | _PAGE_CACHE)
374
375
376/*
377 * Conversion functions: convert a page and protection to a page entry,
378 * and a page entry and page directory to the page they refer to.
379 */
380
381#define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot))
382#define mk_pte_huge(entry) \
383 ((entry).pte |= _PAGE_PRESENT | _PAGE_PSE | _PAGE_VALID)
384
385static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
386{
387 pte_val(pte) &= _PAGE_CHG_MASK;
388 pte_val(pte) |= pgprot_val(newprot);
389 return pte;
390}
391
392#define page_pte(page) page_pte_prot((page), __pgprot(0))
393
394#define pmd_page_kernel(pmd) \
395 ((unsigned long) __va(pmd_val(pmd) & PAGE_MASK))
396
397#define pmd_page(pmd) pfn_to_page(pmd_val(pmd) >> PAGE_SHIFT)
398
399#define pmd_large(pmd) \
400 ((pmd_val(pmd) & (_PAGE_PSE | _PAGE_PRESENT)) == \
401 (_PAGE_PSE | _PAGE_PRESENT))
402
403/*
404 * the pgd page can be thought of an array like this: pgd_t[PTRS_PER_PGD]
405 *
406 * this macro returns the index of the entry in the pgd page which would
407 * control the given virtual address
408 */
409#define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD - 1))
410
411/*
412 * pgd_offset() returns a (pgd_t *)
413 * pgd_index() is used get the offset into the pgd page's array of pgd_t's;
414 */
415#define pgd_offset(mm, address) ((mm)->pgd + pgd_index(address))
416
417/*
418 * a shortcut which implies the use of the kernel's pgd, instead
419 * of a process's
420 */
421#define pgd_offset_k(address) pgd_offset(&init_mm, address)
422
423/*
424 * the pmd page can be thought of an array like this: pmd_t[PTRS_PER_PMD]
425 *
426 * this macro returns the index of the entry in the pmd page which would
427 * control the given virtual address
428 */
429#define pmd_index(address) \
430 (((address) >> PMD_SHIFT) & (PTRS_PER_PMD - 1))
431
432/*
433 * the pte page can be thought of an array like this: pte_t[PTRS_PER_PTE]
434 *
435 * this macro returns the index of the entry in the pte page which would
436 * control the given virtual address
437 */
438#define pte_index(address) \
439 (((address) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
440
441#define pte_offset_kernel(dir, address) \
442 ((pte_t *) pmd_page_kernel(*(dir)) + pte_index(address))
443
444/*
445 * Make a given kernel text page executable/non-executable.
446 * Returns the previous executability setting of that page (which
447 * is used to restore the previous state). Used by the SMP bootup code.
448 * NOTE: this is an __init function for security reasons.
449 */
450static inline int set_kernel_exec(unsigned long vaddr, int enable)
451{
452 return 0;
453}
454
455#define pte_offset_map(dir, address) \
456 ((pte_t *) page_address(pmd_page(*(dir))) + pte_index(address))
457#define pte_offset_map_nested(dir, address) pte_offset_map(dir, address)
458#define pte_unmap(pte) do {} while (0)
459#define pte_unmap_nested(pte) do {} while (0)
460
461/*
462 * The MN10300 has external MMU info in the form of a TLB: this is adapted from
463 * the kernel page tables containing the necessary information by tlb-mn10300.S
464 */
465extern void update_mmu_cache(struct vm_area_struct *vma,
466 unsigned long address, pte_t pte);
467
468#endif /* !__ASSEMBLY__ */
469
470#define kern_addr_valid(addr) (1)
471
472#define io_remap_pfn_range(vma, vaddr, pfn, size, prot) \
473 remap_pfn_range((vma), (vaddr), (pfn), (size), (prot))
474
475#define MK_IOSPACE_PFN(space, pfn) (pfn)
476#define GET_IOSPACE(pfn) 0
477#define GET_PFN(pfn) (pfn)
478
479#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
480#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_DIRTY
481#define __HAVE_ARCH_PTEP_GET_AND_CLEAR
482#define __HAVE_ARCH_PTEP_SET_WRPROTECT
483#define __HAVE_ARCH_PTEP_MKDIRTY
484#define __HAVE_ARCH_PTE_SAME
485#include <asm-generic/pgtable.h>
486
487#endif /* !__ASSEMBLY__ */
488
489#endif /* _ASM_PGTABLE_H */
diff --git a/include/asm-mn10300/pio-regs.h b/include/asm-mn10300/pio-regs.h
new file mode 100644
index 000000000000..96bc8182d0ba
--- /dev/null
+++ b/include/asm-mn10300/pio-regs.h
@@ -0,0 +1,233 @@
1/* MN10300 On-board I/O port module registers
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_PIO_REGS_H
12#define _ASM_PIO_REGS_H
13
14#include <asm/cpu-regs.h>
15#include <asm/intctl-regs.h>
16
17#ifdef __KERNEL__
18
19/* I/O port 0 */
20#define P0MD __SYSREG(0xdb000000, u16) /* mode reg */
21#define P0MD_0 0x0003 /* mask */
22#define P0MD_0_IN 0x0000 /* input mode */
23#define P0MD_0_OUT 0x0001 /* output mode */
24#define P0MD_0_TM0IO 0x0002 /* timer 0 I/O mode */
25#define P0MD_0_EYECLK 0x0003 /* test signal output (clock) */
26#define P0MD_1 0x000c
27#define P0MD_1_IN 0x0000
28#define P0MD_1_OUT 0x0004
29#define P0MD_1_TM1IO 0x0008 /* timer 1 I/O mode */
30#define P0MD_1_EYED 0x000c /* test signal output (data) */
31#define P0MD_2 0x0030
32#define P0MD_2_IN 0x0000
33#define P0MD_2_OUT 0x0010
34#define P0MD_2_TM2IO 0x0020 /* timer 2 I/O mode */
35#define P0MD_3 0x00c0
36#define P0MD_3_IN 0x0000
37#define P0MD_3_OUT 0x0040
38#define P0MD_3_TM3IO 0x0080 /* timer 3 I/O mode */
39#define P0MD_4 0x0300
40#define P0MD_4_IN 0x0000
41#define P0MD_4_OUT 0x0100
42#define P0MD_4_TM4IO 0x0200 /* timer 4 I/O mode */
43#define P0MD_4_XCTS 0x0300 /* XCTS input for serial port 2 */
44#define P0MD_5 0x0c00
45#define P0MD_5_IN 0x0000
46#define P0MD_5_OUT 0x0400
47#define P0MD_5_TM5IO 0x0800 /* timer 5 I/O mode */
48#define P0MD_6 0x3000
49#define P0MD_6_IN 0x0000
50#define P0MD_6_OUT 0x1000
51#define P0MD_6_TM6IOA 0x2000 /* timer 6 I/O mode A */
52#define P0MD_7 0xc000
53#define P0MD_7_IN 0x0000
54#define P0MD_7_OUT 0x4000
55#define P0MD_7_TM6IOB 0x8000 /* timer 6 I/O mode B */
56
57#define P0IN __SYSREG(0xdb000004, u8) /* in reg */
58#define P0OUT __SYSREG(0xdb000008, u8) /* out reg */
59
60#define P0TMIO __SYSREG(0xdb00000c, u8) /* TM pin I/O control reg */
61#define P0TMIO_TM0_IN 0x00
62#define P0TMIO_TM0_OUT 0x01
63#define P0TMIO_TM1_IN 0x00
64#define P0TMIO_TM1_OUT 0x02
65#define P0TMIO_TM2_IN 0x00
66#define P0TMIO_TM2_OUT 0x04
67#define P0TMIO_TM3_IN 0x00
68#define P0TMIO_TM3_OUT 0x08
69#define P0TMIO_TM4_IN 0x00
70#define P0TMIO_TM4_OUT 0x10
71#define P0TMIO_TM5_IN 0x00
72#define P0TMIO_TM5_OUT 0x20
73#define P0TMIO_TM6A_IN 0x00
74#define P0TMIO_TM6A_OUT 0x40
75#define P0TMIO_TM6B_IN 0x00
76#define P0TMIO_TM6B_OUT 0x80
77
78/* I/O port 1 */
79#define P1MD __SYSREG(0xdb000100, u16) /* mode reg */
80#define P1MD_0 0x0003 /* mask */
81#define P1MD_0_IN 0x0000 /* input mode */
82#define P1MD_0_OUT 0x0001 /* output mode */
83#define P1MD_0_TM7IO 0x0002 /* timer 7 I/O mode */
84#define P1MD_0_ADTRG 0x0003 /* A/D converter trigger mode */
85#define P1MD_1 0x000c
86#define P1MD_1_IN 0x0000
87#define P1MD_1_OUT 0x0004
88#define P1MD_1_TM8IO 0x0008 /* timer 8 I/O mode */
89#define P1MD_1_XDMR0 0x000c /* DMA request input 0 mode */
90#define P1MD_2 0x0030
91#define P1MD_2_IN 0x0000
92#define P1MD_2_OUT 0x0010
93#define P1MD_2_TM9IO 0x0020 /* timer 9 I/O mode */
94#define P1MD_2_XDMR1 0x0030 /* DMA request input 1 mode */
95#define P1MD_3 0x00c0
96#define P1MD_3_IN 0x0000
97#define P1MD_3_OUT 0x0040
98#define P1MD_3_TM10IO 0x0080 /* timer 10 I/O mode */
99#define P1MD_3_FRQS0 0x00c0 /* CPU clock multiplier setting input 0 mode */
100#define P1MD_4 0x0300
101#define P1MD_4_IN 0x0000
102#define P1MD_4_OUT 0x0100
103#define P1MD_4_TM11IO 0x0200 /* timer 11 I/O mode */
104#define P1MD_4_FRQS1 0x0300 /* CPU clock multiplier setting input 1 mode */
105
106#define P1IN __SYSREG(0xdb000104, u8) /* in reg */
107#define P1OUT __SYSREG(0xdb000108, u8) /* out reg */
108#define P1TMIO __SYSREG(0xdb00010c, u8) /* TM pin I/O control reg */
109#define P1TMIO_TM11_IN 0x00
110#define P1TMIO_TM11_OUT 0x01
111#define P1TMIO_TM10_IN 0x00
112#define P1TMIO_TM10_OUT 0x02
113#define P1TMIO_TM9_IN 0x00
114#define P1TMIO_TM9_OUT 0x04
115#define P1TMIO_TM8_IN 0x00
116#define P1TMIO_TM8_OUT 0x08
117#define P1TMIO_TM7_IN 0x00
118#define P1TMIO_TM7_OUT 0x10
119
120/* I/O port 2 */
121#define P2MD __SYSREG(0xdb000200, u16) /* mode reg */
122#define P2MD_0 0x0003 /* mask */
123#define P2MD_0_IN 0x0000 /* input mode */
124#define P2MD_0_OUT 0x0001 /* output mode */
125#define P2MD_0_BOOTBW 0x0003 /* boot bus width selector mode */
126#define P2MD_1 0x000c
127#define P2MD_1_IN 0x0000
128#define P2MD_1_OUT 0x0004
129#define P2MD_1_BOOTSEL 0x000c /* boot device selector mode */
130#define P2MD_2 0x0030
131#define P2MD_2_IN 0x0000
132#define P2MD_2_OUT 0x0010
133#define P2MD_3 0x00c0
134#define P2MD_3_IN 0x0000
135#define P2MD_3_OUT 0x0040
136#define P2MD_3_CKIO 0x00c0 /* mode */
137#define P2MD_4 0x0300
138#define P2MD_4_IN 0x0000
139#define P2MD_4_OUT 0x0100
140#define P2MD_4_CMOD 0x0300 /* mode */
141
142#define P2IN __SYSREG(0xdb000204, u8) /* in reg */
143#define P2OUT __SYSREG(0xdb000208, u8) /* out reg */
144#define P2TMIO __SYSREG(0xdb00020c, u8) /* TM pin I/O control reg */
145
146/* I/O port 3 */
147#define P3MD __SYSREG(0xdb000300, u16) /* mode reg */
148#define P3MD_0 0x0003 /* mask */
149#define P3MD_0_IN 0x0000 /* input mode */
150#define P3MD_0_OUT 0x0001 /* output mode */
151#define P3MD_0_AFRXD 0x0002 /* AFR interface mode */
152#define P3MD_1 0x000c
153#define P3MD_1_IN 0x0000
154#define P3MD_1_OUT 0x0004
155#define P3MD_1_AFTXD 0x0008 /* AFR interface mode */
156#define P3MD_2 0x0030
157#define P3MD_2_IN 0x0000
158#define P3MD_2_OUT 0x0010
159#define P3MD_2_AFSCLK 0x0020 /* AFR interface mode */
160#define P3MD_3 0x00c0
161#define P3MD_3_IN 0x0000
162#define P3MD_3_OUT 0x0040
163#define P3MD_3_AFFS 0x0080 /* AFR interface mode */
164#define P3MD_4 0x0300
165#define P3MD_4_IN 0x0000
166#define P3MD_4_OUT 0x0100
167#define P3MD_4_AFEHC 0x0200 /* AFR interface mode */
168
169#define P3IN __SYSREG(0xdb000304, u8) /* in reg */
170#define P3OUT __SYSREG(0xdb000308, u8) /* out reg */
171
172/* I/O port 4 */
173#define P4MD __SYSREG(0xdb000400, u16) /* mode reg */
174#define P4MD_0 0x0003 /* mask */
175#define P4MD_0_IN 0x0000 /* input mode */
176#define P4MD_0_OUT 0x0001 /* output mode */
177#define P4MD_0_SCL0 0x0002 /* I2C/serial mode */
178#define P4MD_1 0x000c
179#define P4MD_1_IN 0x0000
180#define P4MD_1_OUT 0x0004
181#define P4MD_1_SDA0 0x0008
182#define P4MD_2 0x0030
183#define P4MD_2_IN 0x0000
184#define P4MD_2_OUT 0x0010
185#define P4MD_2_SCL1 0x0020
186#define P4MD_3 0x00c0
187#define P4MD_3_IN 0x0000
188#define P4MD_3_OUT 0x0040
189#define P4MD_3_SDA1 0x0080
190#define P4MD_4 0x0300
191#define P4MD_4_IN 0x0000
192#define P4MD_4_OUT 0x0100
193#define P4MD_4_SBO0 0x0200
194#define P4MD_5 0x0c00
195#define P4MD_5_IN 0x0000
196#define P4MD_5_OUT 0x0400
197#define P4MD_5_SBO1 0x0800
198#define P4MD_6 0x3000
199#define P4MD_6_IN 0x0000
200#define P4MD_6_OUT 0x1000
201#define P4MD_6_SBT0 0x2000
202#define P4MD_7 0xc000
203#define P4MD_7_IN 0x0000
204#define P4MD_7_OUT 0x4000
205#define P4MD_7_SBT1 0x8000
206
207#define P4IN __SYSREG(0xdb000404, u8) /* in reg */
208#define P4OUT __SYSREG(0xdb000408, u8) /* out reg */
209
210/* I/O port 5 */
211#define P5MD __SYSREG(0xdb000500, u16) /* mode reg */
212#define P5MD_0 0x0003 /* mask */
213#define P5MD_0_IN 0x0000 /* input mode */
214#define P5MD_0_OUT 0x0001 /* output mode */
215#define P5MD_0_IRTXD 0x0002 /* IrDA mode */
216#define P5MD_0_SOUT 0x0004 /* serial mode */
217#define P5MD_1 0x000c
218#define P5MD_1_IN 0x0000
219#define P5MD_1_OUT 0x0004
220#define P5MD_1_IRRXDS 0x0008 /* IrDA mode */
221#define P5MD_1_SIN 0x000c /* serial mode */
222#define P5MD_2 0x0030
223#define P5MD_2_IN 0x0000
224#define P5MD_2_OUT 0x0010
225#define P5MD_2_IRRXDF 0x0020 /* IrDA mode */
226
227#define P5IN __SYSREG(0xdb000504, u8) /* in reg */
228#define P5OUT __SYSREG(0xdb000508, u8) /* out reg */
229
230
231#endif /* __KERNEL__ */
232
233#endif /* _ASM_PIO_REGS_H */
diff --git a/include/asm-mn10300/poll.h b/include/asm-mn10300/poll.h
new file mode 100644
index 000000000000..c98509d3149e
--- /dev/null
+++ b/include/asm-mn10300/poll.h
@@ -0,0 +1 @@
#include <asm-generic/poll.h>
diff --git a/include/asm-mn10300/posix_types.h b/include/asm-mn10300/posix_types.h
new file mode 100644
index 000000000000..077567c37798
--- /dev/null
+++ b/include/asm-mn10300/posix_types.h
@@ -0,0 +1,132 @@
1/* MN10300 POSIX types
2 *
3 * Copyright (C) 2007 Matsushita Electric Industrial Co., Ltd.
4 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_POSIX_TYPES_H
12#define _ASM_POSIX_TYPES_H
13
14/*
15 * This file is generally used by user-level software, so you need to
16 * be a little careful about namespace pollution etc. Also, we cannot
17 * assume GCC is being used.
18 */
19
20typedef unsigned long __kernel_ino_t;
21typedef unsigned short __kernel_mode_t;
22typedef unsigned short __kernel_nlink_t;
23typedef long __kernel_off_t;
24typedef int __kernel_pid_t;
25typedef unsigned short __kernel_ipc_pid_t;
26typedef unsigned short __kernel_uid_t;
27typedef unsigned short __kernel_gid_t;
28typedef unsigned long __kernel_size_t;
29typedef long __kernel_ssize_t;
30typedef int __kernel_ptrdiff_t;
31typedef long __kernel_time_t;
32typedef long __kernel_suseconds_t;
33typedef long __kernel_clock_t;
34typedef int __kernel_timer_t;
35typedef int __kernel_clockid_t;
36typedef int __kernel_daddr_t;
37typedef char * __kernel_caddr_t;
38typedef unsigned short __kernel_uid16_t;
39typedef unsigned short __kernel_gid16_t;
40typedef unsigned int __kernel_uid32_t;
41typedef unsigned int __kernel_gid32_t;
42
43typedef unsigned short __kernel_old_uid_t;
44typedef unsigned short __kernel_old_gid_t;
45typedef unsigned short __kernel_old_dev_t;
46
47#ifdef __GNUC__
48typedef long long __kernel_loff_t;
49#endif
50
51typedef struct {
52#if defined(__KERNEL__) || defined(__USE_ALL)
53 int val[2];
54#else /* !defined(__KERNEL__) && !defined(__USE_ALL) */
55 int __val[2];
56#endif /* !defined(__KERNEL__) && !defined(__USE_ALL) */
57} __kernel_fsid_t;
58
59#if defined(__KERNEL__) || !defined(__GLIBC__) || (__GLIBC__ < 2)
60
61#undef __FD_SET
62static inline void __FD_SET(unsigned long __fd, __kernel_fd_set *__fdsetp)
63{
64 unsigned long __tmp = __fd / __NFDBITS;
65 unsigned long __rem = __fd % __NFDBITS;
66 __fdsetp->fds_bits[__tmp] |= (1UL<<__rem);
67}
68
69#undef __FD_CLR
70static inline void __FD_CLR(unsigned long __fd, __kernel_fd_set *__fdsetp)
71{
72 unsigned long __tmp = __fd / __NFDBITS;
73 unsigned long __rem = __fd % __NFDBITS;
74 __fdsetp->fds_bits[__tmp] &= ~(1UL<<__rem);
75}
76
77
78#undef __FD_ISSET
79static inline int __FD_ISSET(unsigned long __fd, const __kernel_fd_set *__p)
80{
81 unsigned long __tmp = __fd / __NFDBITS;
82 unsigned long __rem = __fd % __NFDBITS;
83 return (__p->fds_bits[__tmp] & (1UL<<__rem)) != 0;
84}
85
86/*
87 * This will unroll the loop for the normal constant case (8 ints,
88 * for a 256-bit fd_set)
89 */
90#undef __FD_ZERO
91static inline void __FD_ZERO(__kernel_fd_set *__p)
92{
93 unsigned long *__tmp = __p->fds_bits;
94 int __i;
95
96 if (__builtin_constant_p(__FDSET_LONGS)) {
97 switch (__FDSET_LONGS) {
98 case 16:
99 __tmp[ 0] = 0; __tmp[ 1] = 0;
100 __tmp[ 2] = 0; __tmp[ 3] = 0;
101 __tmp[ 4] = 0; __tmp[ 5] = 0;
102 __tmp[ 6] = 0; __tmp[ 7] = 0;
103 __tmp[ 8] = 0; __tmp[ 9] = 0;
104 __tmp[10] = 0; __tmp[11] = 0;
105 __tmp[12] = 0; __tmp[13] = 0;
106 __tmp[14] = 0; __tmp[15] = 0;
107 return;
108
109 case 8:
110 __tmp[ 0] = 0; __tmp[ 1] = 0;
111 __tmp[ 2] = 0; __tmp[ 3] = 0;
112 __tmp[ 4] = 0; __tmp[ 5] = 0;
113 __tmp[ 6] = 0; __tmp[ 7] = 0;
114 return;
115
116 case 4:
117 __tmp[ 0] = 0; __tmp[ 1] = 0;
118 __tmp[ 2] = 0; __tmp[ 3] = 0;
119 return;
120 }
121 }
122 __i = __FDSET_LONGS;
123 while (__i) {
124 __i--;
125 *__tmp = 0;
126 __tmp++;
127 }
128}
129
130#endif /* defined(__KERNEL__) || !defined(__GLIBC__) || (__GLIBC__ < 2) */
131
132#endif /* _ASM_POSIX_TYPES_H */
diff --git a/include/asm-mn10300/proc-mn103e010/cache.h b/include/asm-mn10300/proc-mn103e010/cache.h
new file mode 100644
index 000000000000..bdc1f9a59b4c
--- /dev/null
+++ b/include/asm-mn10300/proc-mn103e010/cache.h
@@ -0,0 +1,33 @@
1/* MN103E010 Cache specification
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_PROC_CACHE_H
12#define _ASM_PROC_CACHE_H
13
14/* L1 cache */
15
16#define L1_CACHE_NWAYS 4 /* number of ways in caches */
17#define L1_CACHE_NENTRIES 256 /* number of entries in each way */
18#define L1_CACHE_BYTES 16 /* bytes per entry */
19#define L1_CACHE_SHIFT 4 /* shift for bytes per entry */
20#define L1_CACHE_WAYDISP 0x1000 /* displacement of one way from the next */
21
22#define L1_CACHE_TAG_VALID 0x00000001 /* cache tag valid bit */
23#define L1_CACHE_TAG_DIRTY 0x00000008 /* data cache tag dirty bit */
24#define L1_CACHE_TAG_ENTRY 0x00000ff0 /* cache tag entry address mask */
25#define L1_CACHE_TAG_ADDRESS 0xfffff000 /* cache tag line address mask */
26
27/*
28 * specification of the interval between interrupt checking intervals whilst
29 * managing the cache with the interrupts disabled
30 */
31#define MN10300_DCACHE_INV_RANGE_INTR_LOG2_INTERVAL 4
32
33#endif /* _ASM_PROC_CACHE_H */
diff --git a/include/asm-mn10300/proc-mn103e010/clock.h b/include/asm-mn10300/proc-mn103e010/clock.h
new file mode 100644
index 000000000000..caf998350633
--- /dev/null
+++ b/include/asm-mn10300/proc-mn103e010/clock.h
@@ -0,0 +1,18 @@
1/* MN103E010-specific clocks
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_PROC_CLOCK_H
12#define _ASM_PROC_CLOCK_H
13
14#include <asm/unit/clock.h>
15
16#define MN10300_WDCLK MN10300_IOCLK
17
18#endif /* _ASM_PROC_CLOCK_H */
diff --git a/include/asm-mn10300/proc-mn103e010/irq.h b/include/asm-mn10300/proc-mn103e010/irq.h
new file mode 100644
index 000000000000..aa6ee8f98b1b
--- /dev/null
+++ b/include/asm-mn10300/proc-mn103e010/irq.h
@@ -0,0 +1,34 @@
1/* MN103E010 On-board interrupt controller numbers
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11
12#ifndef _ASM_PROC_IRQ_H
13#define _ASM_PROC_IRQ_H
14
15#ifdef __KERNEL__
16
17#define GxICR_NUM_IRQS 42
18
19#define GxICR_NUM_XIRQS 8
20
21#define XIRQ0 34
22#define XIRQ1 35
23#define XIRQ2 36
24#define XIRQ3 37
25#define XIRQ4 38
26#define XIRQ5 39
27#define XIRQ6 40
28#define XIRQ7 41
29
30#define XIRQ2IRQ(num) (XIRQ0 + num)
31
32#endif /* __KERNEL__ */
33
34#endif /* _ASM_PROC_IRQ_H */
diff --git a/include/asm-mn10300/proc-mn103e010/proc.h b/include/asm-mn10300/proc-mn103e010/proc.h
new file mode 100644
index 000000000000..22a2b93f70b7
--- /dev/null
+++ b/include/asm-mn10300/proc-mn103e010/proc.h
@@ -0,0 +1,18 @@
1/* MN103E010 Processor description
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11
12#ifndef _ASM_PROC_PROC_H
13#define _ASM_PROC_PROC_H
14
15#define PROCESSOR_VENDOR_NAME "Matsushita"
16#define PROCESSOR_MODEL_NAME "mn103e010"
17
18#endif /* _ASM_PROC_PROC_H */
diff --git a/include/asm-mn10300/processor.h b/include/asm-mn10300/processor.h
new file mode 100644
index 000000000000..f1b081f53468
--- /dev/null
+++ b/include/asm-mn10300/processor.h
@@ -0,0 +1,186 @@
1/* MN10300 Processor specifics
2 *
3 * Copyright (C) 2007 Matsushita Electric Industrial Co., Ltd.
4 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
5 * Written by David Howells (dhowells@redhat.com)
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public Licence
9 * as published by the Free Software Foundation; either version
10 * 2 of the Licence, or (at your option) any later version.
11 */
12
13#ifndef _ASM_PROCESSOR_H
14#define _ASM_PROCESSOR_H
15
16#include <asm/page.h>
17#include <asm/ptrace.h>
18#include <asm/cpu-regs.h>
19#include <linux/threads.h>
20
21/* Forward declaration, a strange C thing */
22struct task_struct;
23struct mm_struct;
24
25/*
26 * Default implementation of macro that returns current
27 * instruction pointer ("program counter").
28 */
29#define current_text_addr() \
30({ \
31 void *__pc; \
32 asm("mov pc,%0" : "=a"(__pc)); \
33 __pc; \
34})
35
36extern void show_registers(struct pt_regs *regs);
37
38/*
39 * CPU type and hardware bug flags. Kept separately for each CPU.
40 * Members of this structure are referenced in head.S, so think twice
41 * before touching them. [mj]
42 */
43
44struct mn10300_cpuinfo {
45 int type;
46 unsigned long loops_per_sec;
47 char hard_math;
48 unsigned long *pgd_quick;
49 unsigned long *pte_quick;
50 unsigned long pgtable_cache_sz;
51};
52
53extern struct mn10300_cpuinfo boot_cpu_data;
54
55#define cpu_data &boot_cpu_data
56#define current_cpu_data boot_cpu_data
57
58extern void identify_cpu(struct mn10300_cpuinfo *);
59extern void print_cpu_info(struct mn10300_cpuinfo *);
60extern void dodgy_tsc(void);
61#define cpu_relax() do {} while (0)
62
63/*
64 * User space process size: 1.75GB (default).
65 */
66#define TASK_SIZE 0x70000000
67
68/*
69 * Where to put the userspace stack by default
70 */
71#define STACK_TOP 0x70000000
72#define STACK_TOP_MAX STACK_TOP
73
74/* This decides where the kernel will search for a free chunk of vm
75 * space during mmap's.
76 */
77#define TASK_UNMAPPED_BASE 0x30000000
78
79typedef struct {
80 unsigned long seg;
81} mm_segment_t;
82
83struct fpu_state_struct {
84 unsigned long fs[32]; /* fpu registers */
85 unsigned long fpcr; /* fpu control register */
86};
87
88struct thread_struct {
89 struct pt_regs *uregs; /* userspace register frame */
90 unsigned long pc; /* kernel PC */
91 unsigned long sp; /* kernel SP */
92 unsigned long a3; /* kernel FP */
93 unsigned long wchan;
94 unsigned long usp;
95 struct pt_regs *__frame;
96 unsigned long fpu_flags;
97#define THREAD_USING_FPU 0x00000001 /* T if this task is using the FPU */
98 struct fpu_state_struct fpu_state;
99};
100
101#define INIT_THREAD \
102{ \
103 .uregs = init_uregs, \
104 .pc = 0, \
105 .sp = 0, \
106 .a3 = 0, \
107 .wchan = 0, \
108 .__frame = NULL, \
109}
110
111#define INIT_MMAP \
112{ &init_mm, 0, 0, NULL, PAGE_SHARED, VM_READ | VM_WRITE | VM_EXEC, 1, \
113 NULL, NULL }
114
115/*
116 * do necessary setup to start up a newly executed thread
117 * - need to discard the frame stacked by the kernel thread invoking the execve
118 * syscall (see RESTORE_ALL macro)
119 */
120#define start_thread(regs, new_pc, new_sp) do { \
121 set_fs(USER_DS); \
122 __frame = current->thread.uregs; \
123 __frame->epsw = EPSW_nSL | EPSW_IE | EPSW_IM; \
124 __frame->pc = new_pc; \
125 __frame->sp = new_sp; \
126} while (0)
127
128/* Free all resources held by a thread. */
129extern void release_thread(struct task_struct *);
130
131/* Prepare to copy thread state - unlazy all lazy status */
132extern void prepare_to_copy(struct task_struct *tsk);
133
134/*
135 * create a kernel thread without removing it from tasklists
136 */
137extern int kernel_thread(int (*fn)(void *), void *arg, unsigned long flags);
138
139/*
140 * Return saved PC of a blocked thread.
141 */
142extern unsigned long thread_saved_pc(struct task_struct *tsk);
143
144unsigned long get_wchan(struct task_struct *p);
145
146#define task_pt_regs(task) \
147({ \
148 struct pt_regs *__regs__; \
149 __regs__ = (struct pt_regs *) (KSTK_TOP(task_stack_page(task)) - 8); \
150 __regs__ - 1; \
151})
152
153#define KSTK_EIP(task) (task_pt_regs(task)->pc)
154#define KSTK_ESP(task) (task_pt_regs(task)->sp)
155
156#define KSTK_TOP(info) \
157({ \
158 (unsigned long)(info) + THREAD_SIZE; \
159})
160
161#define ARCH_HAS_PREFETCH
162#define ARCH_HAS_PREFETCHW
163
164static inline void prefetch(const void *x)
165{
166#ifndef CONFIG_MN10300_CACHE_DISABLED
167#ifdef CONFIG_MN10300_PROC_MN103E010
168 asm volatile ("nop; nop; dcpf (%0)" : : "r"(x));
169#else
170 asm volatile ("dcpf (%0)" : : "r"(x));
171#endif
172#endif
173}
174
175static inline void prefetchw(const void *x)
176{
177#ifndef CONFIG_MN10300_CACHE_DISABLED
178#ifdef CONFIG_MN10300_PROC_MN103E010
179 asm volatile ("nop; nop; dcpf (%0)" : : "r"(x));
180#else
181 asm volatile ("dcpf (%0)" : : "r"(x));
182#endif
183#endif
184}
185
186#endif /* _ASM_PROCESSOR_H */
diff --git a/include/asm-mn10300/ptrace.h b/include/asm-mn10300/ptrace.h
new file mode 100644
index 000000000000..b3684689fcce
--- /dev/null
+++ b/include/asm-mn10300/ptrace.h
@@ -0,0 +1,99 @@
1/* MN10300 Exception frame layout and ptrace constants
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_PTRACE_H
12#define _ASM_PTRACE_H
13
14#define PT_A3 0
15#define PT_A2 1
16#define PT_D3 2
17#define PT_D2 3
18#define PT_MCVF 4
19#define PT_MCRL 5
20#define PT_MCRH 6
21#define PT_MDRQ 7
22#define PT_E1 8
23#define PT_E0 9
24#define PT_E7 10
25#define PT_E6 11
26#define PT_E5 12
27#define PT_E4 13
28#define PT_E3 14
29#define PT_E2 15
30#define PT_SP 16
31#define PT_LAR 17
32#define PT_LIR 18
33#define PT_MDR 19
34#define PT_A1 20
35#define PT_A0 21
36#define PT_D1 22
37#define PT_D0 23
38#define PT_ORIG_D0 24
39#define PT_EPSW 25
40#define PT_PC 26
41#define NR_PTREGS 27
42
43#ifndef __ASSEMBLY__
44/*
45 * This defines the way registers are stored in the event of an exception
46 * - the strange order is due to the MOVM instruction
47 */
48struct pt_regs {
49 unsigned long a3; /* syscall arg 3 */
50 unsigned long a2; /* syscall arg 4 */
51 unsigned long d3; /* syscall arg 5 */
52 unsigned long d2; /* syscall arg 6 */
53 unsigned long mcvf;
54 unsigned long mcrl;
55 unsigned long mcrh;
56 unsigned long mdrq;
57 unsigned long e1;
58 unsigned long e0;
59 unsigned long e7;
60 unsigned long e6;
61 unsigned long e5;
62 unsigned long e4;
63 unsigned long e3;
64 unsigned long e2;
65 unsigned long sp;
66 unsigned long lar;
67 unsigned long lir;
68 unsigned long mdr;
69 unsigned long a1;
70 unsigned long a0; /* syscall arg 1 */
71 unsigned long d1; /* syscall arg 2 */
72 unsigned long d0; /* syscall ret */
73 struct pt_regs *next; /* next frame pointer */
74 unsigned long orig_d0; /* syscall number */
75 unsigned long epsw;
76 unsigned long pc;
77};
78#endif
79
80extern struct pt_regs *__frame; /* current frame pointer */
81
82/* Arbitrarily choose the same ptrace numbers as used by the Sparc code. */
83#define PTRACE_GETREGS 12
84#define PTRACE_SETREGS 13
85#define PTRACE_GETFPREGS 14
86#define PTRACE_SETFPREGS 15
87
88/* options set using PTRACE_SETOPTIONS */
89#define PTRACE_O_TRACESYSGOOD 0x00000001
90
91#if defined(__KERNEL__) && !defined(__ASSEMBLY__)
92#define user_mode(regs) (((regs)->epsw & EPSW_nSL) == EPSW_nSL)
93#define instruction_pointer(regs) ((regs)->pc)
94extern void show_regs(struct pt_regs *);
95#endif
96
97#define profile_pc(regs) ((regs)->pc)
98
99#endif /* _ASM_PTRACE_H */
diff --git a/include/asm-mn10300/reset-regs.h b/include/asm-mn10300/reset-regs.h
new file mode 100644
index 000000000000..174523d50132
--- /dev/null
+++ b/include/asm-mn10300/reset-regs.h
@@ -0,0 +1,64 @@
1/* MN10300 Reset controller and watchdog timer definitions
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11
12#ifndef _ASM_RESET_REGS_H
13#define _ASM_RESET_REGS_H
14
15#include <asm/cpu-regs.h>
16#include <asm/exceptions.h>
17
18#ifdef __KERNEL__
19
20#ifdef CONFIG_MN10300_WD_TIMER
21#define ARCH_HAS_NMI_WATCHDOG /* See include/linux/nmi.h */
22#endif
23
24/*
25 * watchdog timer registers
26 */
27#define WDBC __SYSREGC(0xc0001000, u8) /* watchdog binary counter reg */
28
29#define WDCTR __SYSREG(0xc0001002, u8) /* watchdog timer control reg */
30#define WDCTR_WDCK 0x07 /* clock source selection */
31#define WDCTR_WDCK_256th 0x00 /* - OSCI/256 */
32#define WDCTR_WDCK_1024th 0x01 /* - OSCI/1024 */
33#define WDCTR_WDCK_2048th 0x02 /* - OSCI/2048 */
34#define WDCTR_WDCK_16384th 0x03 /* - OSCI/16384 */
35#define WDCTR_WDCK_65536th 0x04 /* - OSCI/65536 */
36#define WDCTR_WDRST 0x40 /* binary counter reset */
37#define WDCTR_WDCNE 0x80 /* watchdog timer enable */
38
39#define RSTCTR __SYSREG(0xc0001004, u8) /* reset control reg */
40#define RSTCTR_CHIPRST 0x01 /* chip reset */
41#define RSTCTR_DBFRST 0x02 /* double fault reset flag */
42#define RSTCTR_WDTRST 0x04 /* watchdog timer reset flag */
43#define RSTCTR_WDREN 0x08 /* watchdog timer reset enable */
44
45#ifndef __ASSEMBLY__
46
47static inline void mn10300_proc_hard_reset(void)
48{
49 RSTCTR &= ~RSTCTR_CHIPRST;
50 RSTCTR |= RSTCTR_CHIPRST;
51}
52
53extern unsigned int watchdog_alert_counter;
54
55extern void watchdog_go(void);
56extern asmlinkage void watchdog_handler(void);
57extern asmlinkage
58void watchdog_interrupt(struct pt_regs *, enum exception_code);
59
60#endif
61
62#endif /* __KERNEL__ */
63
64#endif /* _ASM_RESET_REGS_H */
diff --git a/include/asm-mn10300/resource.h b/include/asm-mn10300/resource.h
new file mode 100644
index 000000000000..04bc4db8921b
--- /dev/null
+++ b/include/asm-mn10300/resource.h
@@ -0,0 +1 @@
#include <asm-generic/resource.h>
diff --git a/include/asm-mn10300/rtc-regs.h b/include/asm-mn10300/rtc-regs.h
new file mode 100644
index 000000000000..c42deefaec11
--- /dev/null
+++ b/include/asm-mn10300/rtc-regs.h
@@ -0,0 +1,86 @@
1/* MN10300 on-chip Real-Time Clock registers
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_RTC_REGS_H
12#define _ASM_RTC_REGS_H
13
14#include <asm/intctl-regs.h>
15
16#ifdef __KERNEL__
17
18#define RTSCR __SYSREG(0xd8600000, u8) /* RTC seconds count reg */
19#define RTSAR __SYSREG(0xd8600001, u8) /* RTC seconds alarm reg */
20#define RTMCR __SYSREG(0xd8600002, u8) /* RTC minutes count reg */
21#define RTMAR __SYSREG(0xd8600003, u8) /* RTC minutes alarm reg */
22#define RTHCR __SYSREG(0xd8600004, u8) /* RTC hours count reg */
23#define RTHAR __SYSREG(0xd8600005, u8) /* RTC hours alarm reg */
24#define RTDWCR __SYSREG(0xd8600006, u8) /* RTC day of the week count reg */
25#define RTDMCR __SYSREG(0xd8600007, u8) /* RTC days count reg */
26#define RTMTCR __SYSREG(0xd8600008, u8) /* RTC months count reg */
27#define RTYCR __SYSREG(0xd8600009, u8) /* RTC years count reg */
28
29#define RTCRA __SYSREG(0xd860000a, u8)/* RTC control reg A */
30#define RTCRA_RS 0x0f /* periodic timer interrupt cycle setting */
31#define RTCRA_RS_NONE 0x00 /* - off */
32#define RTCRA_RS_3_90625ms 0x01 /* - 3.90625ms (1/256s) */
33#define RTCRA_RS_7_8125ms 0x02 /* - 7.8125ms (1/128s) */
34#define RTCRA_RS_122_070us 0x03 /* - 122.070us (1/8192s) */
35#define RTCRA_RS_244_141us 0x04 /* - 244.141us (1/4096s) */
36#define RTCRA_RS_488_281us 0x05 /* - 488.281us (1/2048s) */
37#define RTCRA_RS_976_5625us 0x06 /* - 976.5625us (1/1024s) */
38#define RTCRA_RS_1_953125ms 0x07 /* - 1.953125ms (1/512s) */
39#define RTCRA_RS_3_90624ms 0x08 /* - 3.90624ms (1/256s) */
40#define RTCRA_RS_7_8125ms_b 0x09 /* - 7.8125ms (1/128s) */
41#define RTCRA_RS_15_625ms 0x0a /* - 15.625ms (1/64s) */
42#define RTCRA_RS_31_25ms 0x0b /* - 31.25ms (1/32s) */
43#define RTCRA_RS_62_5ms 0x0c /* - 62.5ms (1/16s) */
44#define RTCRA_RS_125ms 0x0d /* - 125ms (1/8s) */
45#define RTCRA_RS_250ms 0x0e /* - 250ms (1/4s) */
46#define RTCRA_RS_500ms 0x0f /* - 500ms (1/2s) */
47#define RTCRA_DVR 0x40 /* divider reset */
48#define RTCRA_UIP 0x80 /* clock update flag */
49
50#define RTCRB __SYSREG(0xd860000b, u8) /* RTC control reg B */
51#define RTCRB_DSE 0x01 /* daylight savings time enable */
52#define RTCRB_TM 0x02 /* time format */
53#define RTCRB_TM_12HR 0x00 /* - 12 hour format */
54#define RTCRB_TM_24HR 0x02 /* - 24 hour format */
55#define RTCRB_DM 0x04 /* numeric value format */
56#define RTCRB_DM_BCD 0x00 /* - BCD */
57#define RTCRB_DM_BINARY 0x04 /* - binary */
58#define RTCRB_UIE 0x10 /* update interrupt disable */
59#define RTCRB_AIE 0x20 /* alarm interrupt disable */
60#define RTCRB_PIE 0x40 /* periodic interrupt disable */
61#define RTCRB_SET 0x80 /* clock update enable */
62
63#define RTSRC __SYSREG(0xd860000c, u8) /* RTC status reg C */
64#define RTSRC_UF 0x10 /* update end interrupt flag */
65#define RTSRC_AF 0x20 /* alarm interrupt flag */
66#define RTSRC_PF 0x40 /* periodic interrupt flag */
67#define RTSRC_IRQF 0x80 /* interrupt flag */
68
69#define RTIRQ 32
70#define RTICR GxICR(RTIRQ)
71
72/*
73 * MC146818 RTC compatibility defs for the MN10300 on-chip RTC
74 */
75#define RTC_PORT(x) 0xd8600000
76#define RTC_ALWAYS_BCD 1 /* RTC operates in binary mode */
77
78#define CMOS_READ(addr) __SYSREG(0xd8600000 + (addr), u8)
79#define CMOS_WRITE(val, addr) \
80 do { __SYSREG(0xd8600000 + (addr), u8) = val; } while (0)
81
82#define RTC_IRQ RTIRQ
83
84#endif /* __KERNEL__ */
85
86#endif /* _ASM_RTC_REGS_H */
diff --git a/include/asm-mn10300/rtc.h b/include/asm-mn10300/rtc.h
new file mode 100644
index 000000000000..c295194cc703
--- /dev/null
+++ b/include/asm-mn10300/rtc.h
@@ -0,0 +1,41 @@
1/* MN10300 Real time clock definitions
2 *
3 * Copyright (C) 2007 Matsushita Electric Industrial Co., Ltd.
4 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_RTC_H
12#define _ASM_RTC_H
13
14#ifdef CONFIG_MN10300_RTC
15
16#include <linux/init.h>
17
18extern void check_rtc_time(void);
19extern void __init calibrate_clock(void);
20extern unsigned long __init get_initial_rtc_time(void);
21
22#else /* !CONFIG_MN10300_RTC */
23
24static inline void check_rtc_time(void)
25{
26}
27
28static inline void calibrate_clock(void)
29{
30}
31
32static inline unsigned long get_initial_rtc_time(void)
33{
34 return 0;
35}
36
37#endif /* !CONFIG_MN10300_RTC */
38
39#include <asm-generic/rtc.h>
40
41#endif /* _ASM_RTC_H */
diff --git a/include/asm-mn10300/scatterlist.h b/include/asm-mn10300/scatterlist.h
new file mode 100644
index 000000000000..e29d91dbcf2b
--- /dev/null
+++ b/include/asm-mn10300/scatterlist.h
@@ -0,0 +1,46 @@
1/* MN10300 Scatterlist definitions
2 *
3 * Copyright (C) 2007 Matsushita Electric Industrial Co., Ltd.
4 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_SCATTERLIST_H
12#define _ASM_SCATTERLIST_H
13
14#include <asm/types.h>
15
16/*
17 * Drivers must set either ->address or (preferred) page and ->offset
18 * to indicate where data must be transferred to/from.
19 *
20 * Using page is recommended since it handles highmem data as well as
21 * low mem. ->address is restricted to data which has a virtual mapping, and
22 * it will go away in the future. Updating to page can be automated very
23 * easily -- something like
24 *
25 * sg->address = some_ptr;
26 *
27 * can be rewritten as
28 *
29 * sg_set_page(virt_to_page(some_ptr));
30 * sg->offset = (unsigned long) some_ptr & ~PAGE_MASK;
31 *
32 * and that's it. There's no excuse for not highmem enabling YOUR driver. /jens
33 */
34struct scatterlist {
35#ifdef CONFIG_DEBUG_SG
36 unsigned long sg_magic;
37#endif
38 unsigned long page_link;
39 unsigned int offset; /* for highmem, page offset */
40 dma_addr_t dma_address;
41 unsigned int length;
42};
43
44#define ISA_DMA_THRESHOLD (0x00ffffff)
45
46#endif /* _ASM_SCATTERLIST_H */
diff --git a/include/asm-mn10300/sections.h b/include/asm-mn10300/sections.h
new file mode 100644
index 000000000000..2b8c5160388f
--- /dev/null
+++ b/include/asm-mn10300/sections.h
@@ -0,0 +1 @@
#include <asm-generic/sections.h>
diff --git a/include/asm-mn10300/semaphore.h b/include/asm-mn10300/semaphore.h
new file mode 100644
index 000000000000..5a9e1ad0b253
--- /dev/null
+++ b/include/asm-mn10300/semaphore.h
@@ -0,0 +1,169 @@
1/* MN10300 Semaphores
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_SEMAPHORE_H
12#define _ASM_SEMAPHORE_H
13
14#ifndef __ASSEMBLY__
15
16#include <linux/linkage.h>
17#include <linux/wait.h>
18#include <linux/spinlock.h>
19#include <linux/rwsem.h>
20
21#define SEMAPHORE_DEBUG 0
22
23/*
24 * the semaphore definition
25 * - if count is >0 then there are tokens available on the semaphore for down
26 * to collect
27 * - if count is <=0 then there are no spare tokens, and anyone that wants one
28 * must wait
29 * - if wait_list is not empty, then there are processes waiting for the
30 * semaphore
31 */
32struct semaphore {
33 atomic_t count; /* it's not really atomic, it's
34 * just that certain modules
35 * expect to be able to access
36 * it directly */
37 spinlock_t wait_lock;
38 struct list_head wait_list;
39#if SEMAPHORE_DEBUG
40 unsigned __magic;
41#endif
42};
43
44#if SEMAPHORE_DEBUG
45# define __SEM_DEBUG_INIT(name) , (long)&(name).__magic
46#else
47# define __SEM_DEBUG_INIT(name)
48#endif
49
50
51#define __SEMAPHORE_INITIALIZER(name, init_count) \
52{ \
53 .count = ATOMIC_INIT(init_count), \
54 .wait_lock = __SPIN_LOCK_UNLOCKED((name).wait_lock), \
55 .wait_list = LIST_HEAD_INIT((name).wait_list) \
56 __SEM_DEBUG_INIT(name) \
57}
58
59#define __DECLARE_SEMAPHORE_GENERIC(name,count) \
60 struct semaphore name = __SEMAPHORE_INITIALIZER(name, count)
61
62#define DECLARE_MUTEX(name) __DECLARE_SEMAPHORE_GENERIC(name, 1)
63#define DECLARE_MUTEX_LOCKED(name) __DECLARE_SEMAPHORE_GENERIC(name, 0)
64
65static inline void sema_init(struct semaphore *sem, int val)
66{
67 *sem = (struct semaphore) __SEMAPHORE_INITIALIZER(*sem, val);
68}
69
70static inline void init_MUTEX(struct semaphore *sem)
71{
72 sema_init(sem, 1);
73}
74
75static inline void init_MUTEX_LOCKED(struct semaphore *sem)
76{
77 sema_init(sem, 0);
78}
79
80extern void __down(struct semaphore *sem, unsigned long flags);
81extern int __down_interruptible(struct semaphore *sem, unsigned long flags);
82extern void __up(struct semaphore *sem);
83
84static inline void down(struct semaphore *sem)
85{
86 unsigned long flags;
87 int count;
88
89#if SEMAPHORE_DEBUG
90 CHECK_MAGIC(sem->__magic);
91#endif
92
93 spin_lock_irqsave(&sem->wait_lock, flags);
94 count = atomic_read(&sem->count);
95 if (likely(count > 0)) {
96 atomic_set(&sem->count, count - 1);
97 spin_unlock_irqrestore(&sem->wait_lock, flags);
98 } else {
99 __down(sem, flags);
100 }
101}
102
103static inline int down_interruptible(struct semaphore *sem)
104{
105 unsigned long flags;
106 int count, ret = 0;
107
108#if SEMAPHORE_DEBUG
109 CHECK_MAGIC(sem->__magic);
110#endif
111
112 spin_lock_irqsave(&sem->wait_lock, flags);
113 count = atomic_read(&sem->count);
114 if (likely(count > 0)) {
115 atomic_set(&sem->count, count - 1);
116 spin_unlock_irqrestore(&sem->wait_lock, flags);
117 } else {
118 ret = __down_interruptible(sem, flags);
119 }
120 return ret;
121}
122
123/*
124 * non-blockingly attempt to down() a semaphore.
125 * - returns zero if we acquired it
126 */
127static inline int down_trylock(struct semaphore *sem)
128{
129 unsigned long flags;
130 int count, success = 0;
131
132#if SEMAPHORE_DEBUG
133 CHECK_MAGIC(sem->__magic);
134#endif
135
136 spin_lock_irqsave(&sem->wait_lock, flags);
137 count = atomic_read(&sem->count);
138 if (likely(count > 0)) {
139 atomic_set(&sem->count, count - 1);
140 success = 1;
141 }
142 spin_unlock_irqrestore(&sem->wait_lock, flags);
143 return !success;
144}
145
146static inline void up(struct semaphore *sem)
147{
148 unsigned long flags;
149
150#if SEMAPHORE_DEBUG
151 CHECK_MAGIC(sem->__magic);
152#endif
153
154 spin_lock_irqsave(&sem->wait_lock, flags);
155 if (!list_empty(&sem->wait_list))
156 __up(sem);
157 else
158 atomic_set(&sem->count, atomic_read(&sem->count) + 1);
159 spin_unlock_irqrestore(&sem->wait_lock, flags);
160}
161
162static inline int sem_getcount(struct semaphore *sem)
163{
164 return atomic_read(&sem->count);
165}
166
167#endif /* __ASSEMBLY__ */
168
169#endif
diff --git a/include/asm-mn10300/sembuf.h b/include/asm-mn10300/sembuf.h
new file mode 100644
index 000000000000..301f3f9d8aa9
--- /dev/null
+++ b/include/asm-mn10300/sembuf.h
@@ -0,0 +1,25 @@
1#ifndef _ASM_SEMBUF_H
2#define _ASM_SEMBUF_H
3
4/*
5 * The semid64_ds structure for MN10300 architecture.
6 * Note extra padding because this structure is passed back and forth
7 * between kernel and user space.
8 *
9 * Pad space is left for:
10 * - 64-bit time_t to solve y2038 problem
11 * - 2 miscellaneous 32-bit values
12 */
13
14struct semid64_ds {
15 struct ipc64_perm sem_perm; /* permissions .. see ipc.h */
16 __kernel_time_t sem_otime; /* last semop time */
17 unsigned long __unused1;
18 __kernel_time_t sem_ctime; /* last change time */
19 unsigned long __unused2;
20 unsigned long sem_nsems; /* no. of semaphores in array */
21 unsigned long __unused3;
22 unsigned long __unused4;
23};
24
25#endif /* _ASM_SEMBUF_H */
diff --git a/include/asm-mn10300/serial-regs.h b/include/asm-mn10300/serial-regs.h
new file mode 100644
index 000000000000..6498469e93ac
--- /dev/null
+++ b/include/asm-mn10300/serial-regs.h
@@ -0,0 +1,160 @@
1/* MN10300 on-board serial port module registers
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11
12#ifndef _ASM_SERIAL_REGS_H
13#define _ASM_SERIAL_REGS_H
14
15#include <asm/cpu-regs.h>
16#include <asm/intctl-regs.h>
17
18#ifdef __KERNEL__
19
20/* serial port 0 */
21#define SC0CTR __SYSREG(0xd4002000, u16) /* control reg */
22#define SC01CTR_CK 0x0007 /* clock source select */
23#define SC0CTR_CK_TM8UFLOW_8 0x0000 /* - 1/8 timer 8 underflow (serial port 0 only) */
24#define SC1CTR_CK_TM9UFLOW_8 0x0000 /* - 1/8 timer 9 underflow (serial port 1 only) */
25#define SC01CTR_CK_IOCLK_8 0x0001 /* - 1/8 IOCLK */
26#define SC01CTR_CK_IOCLK_32 0x0002 /* - 1/32 IOCLK */
27#define SC0CTR_CK_TM2UFLOW_2 0x0003 /* - 1/2 timer 2 underflow (serial port 0 only) */
28#define SC1CTR_CK_TM3UFLOW_2 0x0003 /* - 1/2 timer 3 underflow (serial port 1 only) */
29#define SC0CTR_CK_TM0UFLOW_8 0x0004 /* - 1/8 timer 1 underflow (serial port 0 only) */
30#define SC1CTR_CK_TM1UFLOW_8 0x0004 /* - 1/8 timer 2 underflow (serial port 1 only) */
31#define SC0CTR_CK_TM2UFLOW_8 0x0005 /* - 1/8 timer 2 underflow (serial port 0 only) */
32#define SC1CTR_CK_TM3UFLOW_8 0x0005 /* - 1/8 timer 3 underflow (serial port 1 only) */
33#define SC01CTR_CK_EXTERN_8 0x0006 /* - 1/8 external closk */
34#define SC01CTR_CK_EXTERN 0x0007 /* - external closk */
35#define SC01CTR_STB 0x0008 /* stop bit select */
36#define SC01CTR_STB_1BIT 0x0000 /* - 1 stop bit */
37#define SC01CTR_STB_2BIT 0x0008 /* - 2 stop bits */
38#define SC01CTR_PB 0x0070 /* parity bit select */
39#define SC01CTR_PB_NONE 0x0000 /* - no parity */
40#define SC01CTR_PB_FIXED0 0x0040 /* - fixed at 0 */
41#define SC01CTR_PB_FIXED1 0x0050 /* - fixed at 1 */
42#define SC01CTR_PB_EVEN 0x0060 /* - even parity */
43#define SC01CTR_PB_ODD 0x0070 /* - odd parity */
44#define SC01CTR_CLN 0x0080 /* character length */
45#define SC01CTR_CLN_7BIT 0x0000 /* - 7 bit chars */
46#define SC01CTR_CLN_8BIT 0x0080 /* - 8 bit chars */
47#define SC01CTR_TOE 0x0100 /* T input output enable */
48#define SC01CTR_OD 0x0200 /* bit order select */
49#define SC01CTR_OD_LSBFIRST 0x0000 /* - LSB first */
50#define SC01CTR_OD_MSBFIRST 0x0200 /* - MSB first */
51#define SC01CTR_MD 0x0c00 /* mode select */
52#define SC01CTR_MD_STST_SYNC 0x0000 /* - start-stop synchronous */
53#define SC01CTR_MD_CLOCK_SYNC1 0x0400 /* - clock synchronous 1 */
54#define SC01CTR_MD_I2C 0x0800 /* - I2C mode */
55#define SC01CTR_MD_CLOCK_SYNC2 0x0c00 /* - clock synchronous 2 */
56#define SC01CTR_IIC 0x1000 /* I2C mode select */
57#define SC01CTR_BKE 0x2000 /* break transmit enable */
58#define SC01CTR_RXE 0x4000 /* receive enable */
59#define SC01CTR_TXE 0x8000 /* transmit enable */
60
61#define SC0ICR __SYSREG(0xd4002004, u8) /* interrupt control reg */
62#define SC01ICR_DMD 0x80 /* output data mode */
63#define SC01ICR_TD 0x20 /* transmit DMA trigger cause */
64#define SC01ICR_TI 0x10 /* transmit interrupt cause */
65#define SC01ICR_RES 0x04 /* receive error select */
66#define SC01ICR_RI 0x01 /* receive interrupt cause */
67
68#define SC0TXB __SYSREG(0xd4002008, u8) /* transmit buffer reg */
69#define SC0RXB __SYSREG(0xd4002009, u8) /* receive buffer reg */
70
71#define SC0STR __SYSREG(0xd400200c, u16) /* status reg */
72#define SC01STR_OEF 0x0001 /* overrun error found */
73#define SC01STR_PEF 0x0002 /* parity error found */
74#define SC01STR_FEF 0x0004 /* framing error found */
75#define SC01STR_RBF 0x0010 /* receive buffer status */
76#define SC01STR_TBF 0x0020 /* transmit buffer status */
77#define SC01STR_RXF 0x0040 /* receive status */
78#define SC01STR_TXF 0x0080 /* transmit status */
79#define SC01STR_STF 0x0100 /* I2C start sequence found */
80#define SC01STR_SPF 0x0200 /* I2C stop sequence found */
81
82#define SC0RXIRQ 20 /* timer 0 Receive IRQ */
83#define SC0TXIRQ 21 /* timer 0 Transmit IRQ */
84
85#define SC0RXICR GxICR(SC0RXIRQ) /* serial 0 receive intr ctrl reg */
86#define SC0TXICR GxICR(SC0TXIRQ) /* serial 0 transmit intr ctrl reg */
87
88/* serial port 1 */
89#define SC1CTR __SYSREG(0xd4002010, u16) /* serial port 1 control */
90#define SC1ICR __SYSREG(0xd4002014, u8) /* interrupt control reg */
91#define SC1TXB __SYSREG(0xd4002018, u8) /* transmit buffer reg */
92#define SC1RXB __SYSREG(0xd4002019, u8) /* receive buffer reg */
93#define SC1STR __SYSREG(0xd400201c, u16) /* status reg */
94
95#define SC1RXIRQ 22 /* timer 1 Receive IRQ */
96#define SC1TXIRQ 23 /* timer 1 Transmit IRQ */
97
98#define SC1RXICR GxICR(SC1RXIRQ) /* serial 1 receive intr ctrl reg */
99#define SC1TXICR GxICR(SC1TXIRQ) /* serial 1 transmit intr ctrl reg */
100
101/* serial port 2 */
102#define SC2CTR __SYSREG(0xd4002020, u16) /* control reg */
103#define SC2CTR_CK 0x0003 /* clock source select */
104#define SC2CTR_CK_TM10UFLOW 0x0000 /* - timer 10 underflow */
105#define SC2CTR_CK_TM2UFLOW 0x0001 /* - timer 2 underflow */
106#define SC2CTR_CK_EXTERN 0x0002 /* - external closk */
107#define SC2CTR_CK_TM3UFLOW 0x0003 /* - timer 3 underflow */
108#define SC2CTR_STB 0x0008 /* stop bit select */
109#define SC2CTR_STB_1BIT 0x0000 /* - 1 stop bit */
110#define SC2CTR_STB_2BIT 0x0008 /* - 2 stop bits */
111#define SC2CTR_PB 0x0070 /* parity bit select */
112#define SC2CTR_PB_NONE 0x0000 /* - no parity */
113#define SC2CTR_PB_FIXED0 0x0040 /* - fixed at 0 */
114#define SC2CTR_PB_FIXED1 0x0050 /* - fixed at 1 */
115#define SC2CTR_PB_EVEN 0x0060 /* - even parity */
116#define SC2CTR_PB_ODD 0x0070 /* - odd parity */
117#define SC2CTR_CLN 0x0080 /* character length */
118#define SC2CTR_CLN_7BIT 0x0000 /* - 7 bit chars */
119#define SC2CTR_CLN_8BIT 0x0080 /* - 8 bit chars */
120#define SC2CTR_TWE 0x0100 /* transmit wait enable (enable XCTS control) */
121#define SC2CTR_OD 0x0200 /* bit order select */
122#define SC2CTR_OD_LSBFIRST 0x0000 /* - LSB first */
123#define SC2CTR_OD_MSBFIRST 0x0200 /* - MSB first */
124#define SC2CTR_TWS 0x1000 /* transmit wait select */
125#define SC2CTR_TWS_XCTS_HIGH 0x0000 /* - interrupt TX when XCTS high */
126#define SC2CTR_TWS_XCTS_LOW 0x1000 /* - interrupt TX when XCTS low */
127#define SC2CTR_BKE 0x2000 /* break transmit enable */
128#define SC2CTR_RXE 0x4000 /* receive enable */
129#define SC2CTR_TXE 0x8000 /* transmit enable */
130
131#define SC2ICR __SYSREG(0xd4002024, u8) /* interrupt control reg */
132#define SC2ICR_TD 0x20 /* transmit DMA trigger cause */
133#define SC2ICR_TI 0x10 /* transmit interrupt cause */
134#define SC2ICR_RES 0x04 /* receive error select */
135#define SC2ICR_RI 0x01 /* receive interrupt cause */
136
137#define SC2TXB __SYSREG(0xd4002018, u8) /* transmit buffer reg */
138#define SC2RXB __SYSREG(0xd4002019, u8) /* receive buffer reg */
139#define SC2STR __SYSREG(0xd400201c, u8) /* status reg */
140#define SC2STR_OEF 0x0001 /* overrun error found */
141#define SC2STR_PEF 0x0002 /* parity error found */
142#define SC2STR_FEF 0x0004 /* framing error found */
143#define SC2STR_CTS 0x0008 /* XCTS input pin status (0 means high) */
144#define SC2STR_RBF 0x0010 /* receive buffer status */
145#define SC2STR_TBF 0x0020 /* transmit buffer status */
146#define SC2STR_RXF 0x0040 /* receive status */
147#define SC2STR_TXF 0x0080 /* transmit status */
148
149#define SC2TIM __SYSREG(0xd400202d, u8) /* status reg */
150
151#define SC2RXIRQ 24 /* serial 2 Receive IRQ */
152#define SC2TXIRQ 25 /* serial 2 Transmit IRQ */
153
154#define SC2RXICR GxICR(SC2RXIRQ) /* serial 2 receive intr ctrl reg */
155#define SC2TXICR GxICR(SC2TXIRQ) /* serial 2 transmit intr ctrl reg */
156
157
158#endif /* __KERNEL__ */
159
160#endif /* _ASM_SERIAL_REGS_H */
diff --git a/include/asm-mn10300/serial.h b/include/asm-mn10300/serial.h
new file mode 100644
index 000000000000..99785a9deadb
--- /dev/null
+++ b/include/asm-mn10300/serial.h
@@ -0,0 +1,36 @@
1/* Standard UART definitions
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11
12/*
13 * The ASB2305 has an 18.432 MHz clock the UART
14 */
15#define BASE_BAUD (18432000 / 16)
16
17/* Standard COM flags (except for COM4, because of the 8514 problem) */
18#ifdef CONFIG_SERIAL_DETECT_IRQ
19#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST | ASYNC_AUTO_IRQ)
20#define STD_COM4_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_AUTO_IRQ)
21#else
22#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST)
23#define STD_COM4_FLAGS ASYNC_BOOT_AUTOCONF
24#endif
25
26#ifdef CONFIG_SERIAL_MANY_PORTS
27#define FOURPORT_FLAGS ASYNC_FOURPORT
28#define ACCENT_FLAGS 0
29#define BOCA_FLAGS 0
30#define HUB6_FLAGS 0
31#define RS_TABLE_SIZE 64
32#else
33#define RS_TABLE_SIZE
34#endif
35
36#include <asm/unit/serial.h>
diff --git a/include/asm-mn10300/setup.h b/include/asm-mn10300/setup.h
new file mode 100644
index 000000000000..08356c832283
--- /dev/null
+++ b/include/asm-mn10300/setup.h
@@ -0,0 +1,17 @@
1/* MN10300 Setup declarations
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_SETUP_H
12#define _ASM_SETUP_H
13
14extern void __init unit_setup(void);
15extern void __init unit_init_IRQ(void);
16
17#endif /* _ASM_SETUP_H */
diff --git a/include/asm-mn10300/shmbuf.h b/include/asm-mn10300/shmbuf.h
new file mode 100644
index 000000000000..8f300cc35d6c
--- /dev/null
+++ b/include/asm-mn10300/shmbuf.h
@@ -0,0 +1,42 @@
1#ifndef _ASM_SHMBUF_H
2#define _ASM_SHMBUF_H
3
4/*
5 * The shmid64_ds structure for MN10300 architecture.
6 * Note extra padding because this structure is passed back and forth
7 * between kernel and user space.
8 *
9 * Pad space is left for:
10 * - 64-bit time_t to solve y2038 problem
11 * - 2 miscellaneous 32-bit values
12 */
13
14struct shmid64_ds {
15 struct ipc64_perm shm_perm; /* operation perms */
16 size_t shm_segsz; /* size of segment (bytes) */
17 __kernel_time_t shm_atime; /* last attach time */
18 unsigned long __unused1;
19 __kernel_time_t shm_dtime; /* last detach time */
20 unsigned long __unused2;
21 __kernel_time_t shm_ctime; /* last change time */
22 unsigned long __unused3;
23 __kernel_pid_t shm_cpid; /* pid of creator */
24 __kernel_pid_t shm_lpid; /* pid of last operator */
25 unsigned long shm_nattch; /* no. of current attaches */
26 unsigned long __unused4;
27 unsigned long __unused5;
28};
29
30struct shminfo64 {
31 unsigned long shmmax;
32 unsigned long shmmin;
33 unsigned long shmmni;
34 unsigned long shmseg;
35 unsigned long shmall;
36 unsigned long __unused1;
37 unsigned long __unused2;
38 unsigned long __unused3;
39 unsigned long __unused4;
40};
41
42#endif /* _ASM_SHMBUF_H */
diff --git a/include/asm-mn10300/shmparam.h b/include/asm-mn10300/shmparam.h
new file mode 100644
index 000000000000..ab666ed1a070
--- /dev/null
+++ b/include/asm-mn10300/shmparam.h
@@ -0,0 +1,6 @@
1#ifndef _ASM_SHMPARAM_H
2#define _ASM_SHMPARAM_H
3
4#define SHMLBA PAGE_SIZE /* attach addr a multiple of this */
5
6#endif /* _ASM_SHMPARAM_H */
diff --git a/include/asm-mn10300/sigcontext.h b/include/asm-mn10300/sigcontext.h
new file mode 100644
index 000000000000..4de3afff4ad7
--- /dev/null
+++ b/include/asm-mn10300/sigcontext.h
@@ -0,0 +1,52 @@
1/* MN10300 Userspace signal context
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_SIGCONTEXT_H
12#define _ASM_SIGCONTEXT_H
13
14struct fpucontext {
15 /* Regular FPU environment */
16 unsigned long fs[32]; /* fpu registers */
17 unsigned long fpcr; /* fpu control register */
18};
19
20struct sigcontext {
21 unsigned long d0;
22 unsigned long d1;
23 unsigned long d2;
24 unsigned long d3;
25 unsigned long a0;
26 unsigned long a1;
27 unsigned long a2;
28 unsigned long a3;
29 unsigned long e0;
30 unsigned long e1;
31 unsigned long e2;
32 unsigned long e3;
33 unsigned long e4;
34 unsigned long e5;
35 unsigned long e6;
36 unsigned long e7;
37 unsigned long lar;
38 unsigned long lir;
39 unsigned long mdr;
40 unsigned long mcvf;
41 unsigned long mcrl;
42 unsigned long mcrh;
43 unsigned long mdrq;
44 unsigned long sp;
45 unsigned long epsw;
46 unsigned long pc;
47 struct fpucontext *fpucontext;
48 unsigned long oldmask;
49};
50
51
52#endif /* _ASM_SIGCONTEXT_H */
diff --git a/include/asm-mn10300/siginfo.h b/include/asm-mn10300/siginfo.h
new file mode 100644
index 000000000000..0815d29d82e5
--- /dev/null
+++ b/include/asm-mn10300/siginfo.h
@@ -0,0 +1 @@
#include <asm-generic/siginfo.h>
diff --git a/include/asm-mn10300/signal.h b/include/asm-mn10300/signal.h
new file mode 100644
index 000000000000..e98817cec5f7
--- /dev/null
+++ b/include/asm-mn10300/signal.h
@@ -0,0 +1,171 @@
1/* MN10300 Signal definitions
2 *
3 * Copyright (C) 2007 Matsushita Electric Industrial Co., Ltd.
4 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_SIGNAL_H
12#define _ASM_SIGNAL_H
13
14#include <linux/types.h>
15
16/* Avoid too many header ordering problems. */
17struct siginfo;
18
19#ifdef __KERNEL__
20/* Most things should be clean enough to redefine this at will, if care
21 is taken to make libc match. */
22
23#define _NSIG 64
24#define _NSIG_BPW 32
25#define _NSIG_WORDS (_NSIG / _NSIG_BPW)
26
27typedef unsigned long old_sigset_t; /* at least 32 bits */
28
29typedef struct {
30 unsigned long sig[_NSIG_WORDS];
31} sigset_t;
32
33#else
34/* Here we must cater to libcs that poke about in kernel headers. */
35
36#define NSIG 32
37typedef unsigned long sigset_t;
38
39#endif /* __KERNEL__ */
40
41#define SIGHUP 1
42#define SIGINT 2
43#define SIGQUIT 3
44#define SIGILL 4
45#define SIGTRAP 5
46#define SIGABRT 6
47#define SIGIOT 6
48#define SIGBUS 7
49#define SIGFPE 8
50#define SIGKILL 9
51#define SIGUSR1 10
52#define SIGSEGV 11
53#define SIGUSR2 12
54#define SIGPIPE 13
55#define SIGALRM 14
56#define SIGTERM 15
57#define SIGSTKFLT 16
58#define SIGCHLD 17
59#define SIGCONT 18
60#define SIGSTOP 19
61#define SIGTSTP 20
62#define SIGTTIN 21
63#define SIGTTOU 22
64#define SIGURG 23
65#define SIGXCPU 24
66#define SIGXFSZ 25
67#define SIGVTALRM 26
68#define SIGPROF 27
69#define SIGWINCH 28
70#define SIGIO 29
71#define SIGPOLL SIGIO
72/*
73#define SIGLOST 29
74*/
75#define SIGPWR 30
76#define SIGSYS 31
77#define SIGUNUSED 31
78
79/* These should not be considered constants from userland. */
80#define SIGRTMIN 32
81#define SIGRTMAX (_NSIG-1)
82
83/*
84 * SA_FLAGS values:
85 *
86 * SA_ONSTACK indicates that a registered stack_t will be used.
87 * SA_RESTART flag to get restarting signals (which were the default long ago)
88 * SA_NOCLDSTOP flag to turn off SIGCHLD when children stop.
89 * SA_RESETHAND clears the handler when the signal is delivered.
90 * SA_NOCLDWAIT flag on SIGCHLD to inhibit zombies.
91 * SA_NODEFER prevents the current signal from being masked in the handler.
92 *
93 * SA_ONESHOT and SA_NOMASK are the historical Linux names for the Single
94 * Unix names RESETHAND and NODEFER respectively.
95 */
96#define SA_NOCLDSTOP 0x00000001U
97#define SA_NOCLDWAIT 0x00000002U
98#define SA_SIGINFO 0x00000004U
99#define SA_ONSTACK 0x08000000U
100#define SA_RESTART 0x10000000U
101#define SA_NODEFER 0x40000000U
102#define SA_RESETHAND 0x80000000U
103
104#define SA_NOMASK SA_NODEFER
105#define SA_ONESHOT SA_RESETHAND
106
107#define SA_RESTORER 0x04000000
108
109/*
110 * sigaltstack controls
111 */
112#define SS_ONSTACK 1
113#define SS_DISABLE 2
114
115#define MINSIGSTKSZ 2048
116#define SIGSTKSZ 8192
117
118#include <asm-generic/signal.h>
119
120#ifdef __KERNEL__
121struct old_sigaction {
122 __sighandler_t sa_handler;
123 old_sigset_t sa_mask;
124 unsigned long sa_flags;
125 __sigrestore_t sa_restorer;
126};
127
128struct sigaction {
129 __sighandler_t sa_handler;
130 unsigned long sa_flags;
131 __sigrestore_t sa_restorer;
132 sigset_t sa_mask; /* mask last for extensibility */
133};
134
135struct k_sigaction {
136 struct sigaction sa;
137};
138#else
139/* Here we must cater to libcs that poke about in kernel headers. */
140
141struct sigaction {
142 union {
143 __sighandler_t _sa_handler;
144 void (*_sa_sigaction)(int, struct siginfo *, void *);
145 } _u;
146 sigset_t sa_mask;
147 unsigned long sa_flags;
148 void (*sa_restorer)(void);
149};
150
151#define sa_handler _u._sa_handler
152#define sa_sigaction _u._sa_sigaction
153
154#endif /* __KERNEL__ */
155
156typedef struct sigaltstack {
157 void __user *ss_sp;
158 int ss_flags;
159 size_t ss_size;
160} stack_t;
161
162#ifdef __KERNEL__
163#include <asm/sigcontext.h>
164
165
166struct pt_regs;
167#define ptrace_signal_deliver(regs, cookie) do { } while (0)
168
169#endif /* __KERNEL__ */
170
171#endif /* _ASM_SIGNAL_H */
diff --git a/include/asm-mn10300/smp.h b/include/asm-mn10300/smp.h
new file mode 100644
index 000000000000..4eb8c61b7dab
--- /dev/null
+++ b/include/asm-mn10300/smp.h
@@ -0,0 +1,18 @@
1/* MN10300 SMP support
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_SMP_H
12#define _ASM_SMP_H
13
14#ifdef CONFIG_SMP
15#error SMP not yet supported for MN10300
16#endif
17
18#endif
diff --git a/include/asm-mn10300/socket.h b/include/asm-mn10300/socket.h
new file mode 100644
index 000000000000..99ca648b94c5
--- /dev/null
+++ b/include/asm-mn10300/socket.h
@@ -0,0 +1,55 @@
1#ifndef _ASM_SOCKET_H
2#define _ASM_SOCKET_H
3
4#include <asm/sockios.h>
5
6/* For setsockopt(2) */
7#define SOL_SOCKET 1
8
9#define SO_DEBUG 1
10#define SO_REUSEADDR 2
11#define SO_TYPE 3
12#define SO_ERROR 4
13#define SO_DONTROUTE 5
14#define SO_BROADCAST 6
15#define SO_SNDBUF 7
16#define SO_RCVBUF 8
17#define SO_SNDBUFFORCE 32
18#define SO_RCVBUFFORCE 33
19#define SO_KEEPALIVE 9
20#define SO_OOBINLINE 10
21#define SO_NO_CHECK 11
22#define SO_PRIORITY 12
23#define SO_LINGER 13
24#define SO_BSDCOMPAT 14
25/* To add :#define SO_REUSEPORT 15 */
26#define SO_PASSCRED 16
27#define SO_PEERCRED 17
28#define SO_RCVLOWAT 18
29#define SO_SNDLOWAT 19
30#define SO_RCVTIMEO 20
31#define SO_SNDTIMEO 21
32
33/* Security levels - as per NRL IPv6 - don't actually do anything */
34#define SO_SECURITY_AUTHENTICATION 22
35#define SO_SECURITY_ENCRYPTION_TRANSPORT 23
36#define SO_SECURITY_ENCRYPTION_NETWORK 24
37
38#define SO_BINDTODEVICE 25
39
40/* Socket filtering */
41#define SO_ATTACH_FILTER 26
42#define SO_DETACH_FILTER 27
43
44#define SO_PEERNAME 28
45#define SO_TIMESTAMP 29
46#define SCM_TIMESTAMP SO_TIMESTAMP
47
48#define SO_ACCEPTCONN 30
49
50#define SO_PEERSEC 31
51#define SO_PASSSEC 34
52#define SO_TIMESTAMPNS 35
53#define SCM_TIMESTAMPNS SO_TIMESTAMPNS
54
55#endif /* _ASM_SOCKET_H */
diff --git a/include/asm-mn10300/sockios.h b/include/asm-mn10300/sockios.h
new file mode 100644
index 000000000000..b03043a1c564
--- /dev/null
+++ b/include/asm-mn10300/sockios.h
@@ -0,0 +1,13 @@
1#ifndef _ASM_SOCKIOS_H
2#define _ASM_SOCKIOS_H
3
4/* Socket-level I/O control calls. */
5#define FIOSETOWN 0x8901
6#define SIOCSPGRP 0x8902
7#define FIOGETOWN 0x8903
8#define SIOCGPGRP 0x8904
9#define SIOCATMARK 0x8905
10#define SIOCGSTAMP 0x8906 /* Get stamp */
11#define SIOCGSTAMPNS 0x8907 /* Get stamp (timespec) */
12
13#endif /* _ASM_SOCKIOS_H */
diff --git a/include/asm-mn10300/spinlock.h b/include/asm-mn10300/spinlock.h
new file mode 100644
index 000000000000..4bf9c8b169e0
--- /dev/null
+++ b/include/asm-mn10300/spinlock.h
@@ -0,0 +1,16 @@
1/* MN10300 spinlock support
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_SPINLOCK_H
12#define _ASM_SPINLOCK_H
13
14#error SMP spinlocks not implemented for MN10300
15
16#endif /* _ASM_SPINLOCK_H */
diff --git a/include/asm-mn10300/stat.h b/include/asm-mn10300/stat.h
new file mode 100644
index 000000000000..63ff8371cf2c
--- /dev/null
+++ b/include/asm-mn10300/stat.h
@@ -0,0 +1,78 @@
1#ifndef _ASM_STAT_H
2#define _ASM_STAT_H
3
4struct __old_kernel_stat {
5 unsigned short st_dev;
6 unsigned short st_ino;
7 unsigned short st_mode;
8 unsigned short st_nlink;
9 unsigned short st_uid;
10 unsigned short st_gid;
11 unsigned short st_rdev;
12 unsigned long st_size;
13 unsigned long st_atime;
14 unsigned long st_mtime;
15 unsigned long st_ctime;
16};
17
18struct stat {
19 unsigned long st_dev;
20 unsigned long st_ino;
21 unsigned short st_mode;
22 unsigned short st_nlink;
23 unsigned short st_uid;
24 unsigned short st_gid;
25 unsigned long st_rdev;
26 unsigned long st_size;
27 unsigned long st_blksize;
28 unsigned long st_blocks;
29 unsigned long st_atime;
30 unsigned long st_atime_nsec;
31 unsigned long st_mtime;
32 unsigned long st_mtime_nsec;
33 unsigned long st_ctime;
34 unsigned long st_ctime_nsec;
35 unsigned long __unused4;
36 unsigned long __unused5;
37};
38
39/* This matches struct stat64 in glibc2.1, hence the absolutely
40 * insane amounts of padding around dev_t's.
41 */
42struct stat64 {
43 unsigned long long st_dev;
44 unsigned char __pad0[4];
45
46#define STAT64_HAS_BROKEN_ST_INO 1
47 unsigned long __st_ino;
48
49 unsigned int st_mode;
50 unsigned int st_nlink;
51
52 unsigned long st_uid;
53 unsigned long st_gid;
54
55 unsigned long long st_rdev;
56 unsigned char __pad3[4];
57
58 long long st_size;
59 unsigned long st_blksize;
60
61 unsigned long st_blocks; /* Number 512-byte blocks allocated. */
62 unsigned long __pad4; /* future possible st_blocks high bits */
63
64 unsigned long st_atime;
65 unsigned long st_atime_nsec;
66
67 unsigned long st_mtime;
68 unsigned int st_mtime_nsec;
69
70 unsigned long st_ctime;
71 unsigned long st_ctime_nsec;
72
73 unsigned long long st_ino;
74};
75
76#define STAT_HAVE_NSEC 1
77
78#endif /* _ASM_STAT_H */
diff --git a/include/asm-mn10300/statfs.h b/include/asm-mn10300/statfs.h
new file mode 100644
index 000000000000..0b91fe198c20
--- /dev/null
+++ b/include/asm-mn10300/statfs.h
@@ -0,0 +1 @@
#include <asm-generic/statfs.h>
diff --git a/include/asm-mn10300/string.h b/include/asm-mn10300/string.h
new file mode 100644
index 000000000000..47dbd4346c32
--- /dev/null
+++ b/include/asm-mn10300/string.h
@@ -0,0 +1,32 @@
1/* MN10300 Optimised string functions
2 *
3 * Copyright (C) 2007 Matsushita Electric Industrial Co., Ltd.
4 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
5 * Modified by David Howells (dhowells@redhat.com)
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public Licence
9 * as published by the Free Software Foundation; either version
10 * 2 of the Licence, or (at your option) any later version.
11 */
12#ifndef _ASM_STRING_H
13#define _ASM_STRING_H
14
15#define __HAVE_ARCH_MEMSET
16#define __HAVE_ARCH_MEMCPY
17#define __HAVE_ARCH_MEMMOVE
18
19extern void *memset(void *dest, int ch, size_t count);
20extern void *memcpy(void *dest, const void *src, size_t count);
21extern void *memmove(void *dest, const void *src, size_t count);
22
23
24extern void __struct_cpy_bug(void);
25#define struct_cpy(x, y) \
26({ \
27 if (sizeof(*(x)) != sizeof(*(y))) \
28 __struct_cpy_bug; \
29 memcpy(x, y, sizeof(*(x))); \
30})
31
32#endif /* _ASM_STRING_H */
diff --git a/include/asm-mn10300/system.h b/include/asm-mn10300/system.h
new file mode 100644
index 000000000000..8214fb7e7fe4
--- /dev/null
+++ b/include/asm-mn10300/system.h
@@ -0,0 +1,237 @@
1/* MN10300 System definitions
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_SYSTEM_H
12#define _ASM_SYSTEM_H
13
14#include <asm/cpu-regs.h>
15
16#ifdef __KERNEL__
17#ifndef __ASSEMBLY__
18
19#include <linux/kernel.h>
20
21struct task_struct;
22struct thread_struct;
23
24extern asmlinkage
25struct task_struct *__switch_to(struct thread_struct *prev,
26 struct thread_struct *next,
27 struct task_struct *prev_task);
28
29/* context switching is now performed out-of-line in switch_to.S */
30#define switch_to(prev, next, last) \
31do { \
32 current->thread.wchan = (u_long) __builtin_return_address(0); \
33 (last) = __switch_to(&(prev)->thread, &(next)->thread, (prev)); \
34 mb(); \
35 current->thread.wchan = 0; \
36} while (0)
37
38#define arch_align_stack(x) (x)
39
40#define nop() asm volatile ("nop")
41
42#endif /* !__ASSEMBLY__ */
43
44/*
45 * Force strict CPU ordering.
46 * And yes, this is required on UP too when we're talking
47 * to devices.
48 *
49 * For now, "wmb()" doesn't actually do anything, as all
50 * Intel CPU's follow what Intel calls a *Processor Order*,
51 * in which all writes are seen in the program order even
52 * outside the CPU.
53 *
54 * I expect future Intel CPU's to have a weaker ordering,
55 * but I'd also expect them to finally get their act together
56 * and add some real memory barriers if so.
57 *
58 * Some non intel clones support out of order store. wmb() ceases to be a
59 * nop for these.
60 */
61
62#define mb() asm volatile ("": : :"memory")
63#define rmb() mb()
64#define wmb() asm volatile ("": : :"memory")
65
66#ifdef CONFIG_SMP
67#define smp_mb() mb()
68#define smp_rmb() rmb()
69#define smp_wmb() wmb()
70#else
71#define smp_mb() barrier()
72#define smp_rmb() barrier()
73#define smp_wmb() barrier()
74#endif
75
76#define set_mb(var, value) do { var = value; mb(); } while (0)
77#define set_wmb(var, value) do { var = value; wmb(); } while (0)
78
79#define read_barrier_depends() do {} while (0)
80#define smp_read_barrier_depends() do {} while (0)
81
82/*****************************************************************************/
83/*
84 * interrupt control
85 * - "disabled": run in IM1/2
86 * - level 0 - GDB stub
87 * - level 1 - virtual serial DMA (if present)
88 * - level 5 - normal interrupt priority
89 * - level 6 - timer interrupt
90 * - "enabled": run in IM7
91 */
92#ifdef CONFIG_MN10300_TTYSM
93#define MN10300_CLI_LEVEL EPSW_IM_2
94#else
95#define MN10300_CLI_LEVEL EPSW_IM_1
96#endif
97
98#define local_save_flags(x) \
99do { \
100 typecheck(unsigned long, x); \
101 asm volatile( \
102 " mov epsw,%0 \n" \
103 : "=d"(x) \
104 ); \
105} while (0)
106
107#define local_irq_disable() \
108do { \
109 asm volatile( \
110 " and %0,epsw \n" \
111 " or %1,epsw \n" \
112 " nop \n" \
113 " nop \n" \
114 " nop \n" \
115 : \
116 : "i"(~EPSW_IM), "i"(EPSW_IE | MN10300_CLI_LEVEL) \
117 ); \
118} while (0)
119
120#define local_irq_save(x) \
121do { \
122 local_save_flags(x); \
123 local_irq_disable(); \
124} while (0)
125
126/*
127 * we make sure local_irq_enable() doesn't cause priority inversion
128 */
129#ifndef __ASSEMBLY__
130
131extern unsigned long __mn10300_irq_enabled_epsw;
132
133#endif
134
135#define local_irq_enable() \
136do { \
137 unsigned long tmp; \
138 \
139 asm volatile( \
140 " mov epsw,%0 \n" \
141 " and %1,%0 \n" \
142 " or %2,%0 \n" \
143 " mov %0,epsw \n" \
144 : "=&d"(tmp) \
145 : "i"(~EPSW_IM), "r"(__mn10300_irq_enabled_epsw) \
146 ); \
147} while (0)
148
149#define local_irq_restore(x) \
150do { \
151 typecheck(unsigned long, x); \
152 asm volatile( \
153 " mov %0,epsw \n" \
154 " nop \n" \
155 " nop \n" \
156 " nop \n" \
157 : \
158 : "d"(x) \
159 : "memory", "cc" \
160 ); \
161} while (0)
162
163#define irqs_disabled() \
164({ \
165 unsigned long flags; \
166 local_save_flags(flags); \
167 (flags & EPSW_IM) <= MN10300_CLI_LEVEL; \
168})
169
170/* hook to save power by halting the CPU
171 * - called from the idle loop
172 * - must reenable interrupts (which takes three instruction cycles to complete)
173 */
174#define safe_halt() \
175do { \
176 asm volatile(" or %0,epsw \n" \
177 " nop \n" \
178 " nop \n" \
179 " bset %2,(%1) \n" \
180 : \
181 : "i"(EPSW_IE|EPSW_IM), "n"(&CPUM), "i"(CPUM_SLEEP)\
182 : "cc" \
183 ); \
184} while (0)
185
186#define STI or EPSW_IE|EPSW_IM,epsw
187#define CLI and ~EPSW_IM,epsw; or EPSW_IE|MN10300_CLI_LEVEL,epsw; nop; nop; nop
188
189/*****************************************************************************/
190/*
191 * MN10300 doesn't actually have an exchange instruction
192 */
193#ifndef __ASSEMBLY__
194
195struct __xchg_dummy { unsigned long a[100]; };
196#define __xg(x) ((struct __xchg_dummy *)(x))
197
198static inline
199unsigned long __xchg(volatile unsigned long *m, unsigned long val)
200{
201 unsigned long retval;
202 unsigned long flags;
203
204 local_irq_save(flags);
205 retval = *m;
206 *m = val;
207 local_irq_restore(flags);
208 return retval;
209}
210
211#define xchg(ptr, v) \
212 ((__typeof__(*(ptr))) __xchg((unsigned long *)(ptr), \
213 (unsigned long)(v)))
214
215static inline unsigned long __cmpxchg(volatile unsigned long *m,
216 unsigned long old, unsigned long new)
217{
218 unsigned long retval;
219 unsigned long flags;
220
221 local_irq_save(flags);
222 retval = *m;
223 if (retval == old)
224 *m = new;
225 local_irq_restore(flags);
226 return retval;
227}
228
229#define cmpxchg(ptr, o, n) \
230 ((__typeof__(*(ptr))) __cmpxchg((unsigned long *)(ptr), \
231 (unsigned long)(o), \
232 (unsigned long)(n)))
233
234#endif /* !__ASSEMBLY__ */
235
236#endif /* __KERNEL__ */
237#endif /* _ASM_SYSTEM_H */
diff --git a/include/asm-mn10300/termbits.h b/include/asm-mn10300/termbits.h
new file mode 100644
index 000000000000..eb2b0dc1f696
--- /dev/null
+++ b/include/asm-mn10300/termbits.h
@@ -0,0 +1,200 @@
1#ifndef _ASM_TERMBITS_H
2#define _ASM_TERMBITS_H
3
4#include <linux/posix_types.h>
5
6typedef unsigned char cc_t;
7typedef unsigned int speed_t;
8typedef unsigned int tcflag_t;
9
10#define NCCS 19
11struct termios {
12 tcflag_t c_iflag; /* input mode flags */
13 tcflag_t c_oflag; /* output mode flags */
14 tcflag_t c_cflag; /* control mode flags */
15 tcflag_t c_lflag; /* local mode flags */
16 cc_t c_line; /* line discipline */
17 cc_t c_cc[NCCS]; /* control characters */
18};
19
20struct termios2 {
21 tcflag_t c_iflag; /* input mode flags */
22 tcflag_t c_oflag; /* output mode flags */
23 tcflag_t c_cflag; /* control mode flags */
24 tcflag_t c_lflag; /* local mode flags */
25 cc_t c_line; /* line discipline */
26 cc_t c_cc[NCCS]; /* control characters */
27 speed_t c_ispeed; /* input speed */
28 speed_t c_ospeed; /* output speed */
29};
30
31struct ktermios {
32 tcflag_t c_iflag; /* input mode flags */
33 tcflag_t c_oflag; /* output mode flags */
34 tcflag_t c_cflag; /* control mode flags */
35 tcflag_t c_lflag; /* local mode flags */
36 cc_t c_line; /* line discipline */
37 cc_t c_cc[NCCS]; /* control characters */
38 speed_t c_ispeed; /* input speed */
39 speed_t c_ospeed; /* output speed */
40};
41
42/* c_cc characters */
43#define VINTR 0
44#define VQUIT 1
45#define VERASE 2
46#define VKILL 3
47#define VEOF 4
48#define VTIME 5
49#define VMIN 6
50#define VSWTC 7
51#define VSTART 8
52#define VSTOP 9
53#define VSUSP 10
54#define VEOL 11
55#define VREPRINT 12
56#define VDISCARD 13
57#define VWERASE 14
58#define VLNEXT 15
59#define VEOL2 16
60
61
62/* c_iflag bits */
63#define IGNBRK 0000001
64#define BRKINT 0000002
65#define IGNPAR 0000004
66#define PARMRK 0000010
67#define INPCK 0000020
68#define ISTRIP 0000040
69#define INLCR 0000100
70#define IGNCR 0000200
71#define ICRNL 0000400
72#define IUCLC 0001000
73#define IXON 0002000
74#define IXANY 0004000
75#define IXOFF 0010000
76#define IMAXBEL 0020000
77#define IUTF8 0040000
78
79/* c_oflag bits */
80#define OPOST 0000001
81#define OLCUC 0000002
82#define ONLCR 0000004
83#define OCRNL 0000010
84#define ONOCR 0000020
85#define ONLRET 0000040
86#define OFILL 0000100
87#define OFDEL 0000200
88#define NLDLY 0000400
89#define NL0 0000000
90#define NL1 0000400
91#define CRDLY 0003000
92#define CR0 0000000
93#define CR1 0001000
94#define CR2 0002000
95#define CR3 0003000
96#define TABDLY 0014000
97#define TAB0 0000000
98#define TAB1 0004000
99#define TAB2 0010000
100#define TAB3 0014000
101#define XTABS 0014000
102#define BSDLY 0020000
103#define BS0 0000000
104#define BS1 0020000
105#define VTDLY 0040000
106#define VT0 0000000
107#define VT1 0040000
108#define FFDLY 0100000
109#define FF0 0000000
110#define FF1 0100000
111
112/* c_cflag bit meaning */
113#define CBAUD 0010017
114#define B0 0000000 /* hang up */
115#define B50 0000001
116#define B75 0000002
117#define B110 0000003
118#define B134 0000004
119#define B150 0000005
120#define B200 0000006
121#define B300 0000007
122#define B600 0000010
123#define B1200 0000011
124#define B1800 0000012
125#define B2400 0000013
126#define B4800 0000014
127#define B9600 0000015
128#define B19200 0000016
129#define B38400 0000017
130#define EXTA B19200
131#define EXTB B38400
132#define CSIZE 0000060
133#define CS5 0000000
134#define CS6 0000020
135#define CS7 0000040
136#define CS8 0000060
137#define CSTOPB 0000100
138#define CREAD 0000200
139#define PARENB 0000400
140#define PARODD 0001000
141#define HUPCL 0002000
142#define CLOCAL 0004000
143#define CBAUDEX 0010000
144#define BOTHER 0010000
145#define B57600 0010001
146#define B115200 0010002
147#define B230400 0010003
148#define B460800 0010004
149#define B500000 0010005
150#define B576000 0010006
151#define B921600 0010007
152#define B1000000 0010010
153#define B1152000 0010011
154#define B1500000 0010012
155#define B2000000 0010013
156#define B2500000 0010014
157#define B3000000 0010015
158#define B3500000 0010016
159#define B4000000 0010017
160#define CIBAUD 002003600000 /* input baud rate (not used) */
161#define CTVB 004000000000 /* VisioBraille Terminal flow control */
162#define CMSPAR 010000000000 /* mark or space (stick) parity */
163#define CRTSCTS 020000000000 /* flow control */
164
165#define IBSHIFT 16 /* Shift from CBAUD to CIBAUD */
166
167/* c_lflag bits */
168#define ISIG 0000001
169#define ICANON 0000002
170#define XCASE 0000004
171#define ECHO 0000010
172#define ECHOE 0000020
173#define ECHOK 0000040
174#define ECHONL 0000100
175#define NOFLSH 0000200
176#define TOSTOP 0000400
177#define ECHOCTL 0001000
178#define ECHOPRT 0002000
179#define ECHOKE 0004000
180#define FLUSHO 0010000
181#define PENDIN 0040000
182#define IEXTEN 0100000
183
184/* tcflow() and TCXONC use these */
185#define TCOOFF 0
186#define TCOON 1
187#define TCIOFF 2
188#define TCION 3
189
190/* tcflush() and TCFLSH use these */
191#define TCIFLUSH 0
192#define TCOFLUSH 1
193#define TCIOFLUSH 2
194
195/* tcsetattr uses these */
196#define TCSANOW 0
197#define TCSADRAIN 1
198#define TCSAFLUSH 2
199
200#endif /* _ASM_TERMBITS_H */
diff --git a/include/asm-mn10300/termios.h b/include/asm-mn10300/termios.h
new file mode 100644
index 000000000000..dd7cf617e118
--- /dev/null
+++ b/include/asm-mn10300/termios.h
@@ -0,0 +1,92 @@
1#ifndef _ASM_TERMIOS_H
2#define _ASM_TERMIOS_H
3
4#include <asm/termbits.h>
5#include <asm/ioctls.h>
6
7struct winsize {
8 unsigned short ws_row;
9 unsigned short ws_col;
10 unsigned short ws_xpixel;
11 unsigned short ws_ypixel;
12};
13
14#define NCC 8
15struct termio {
16 unsigned short c_iflag; /* input mode flags */
17 unsigned short c_oflag; /* output mode flags */
18 unsigned short c_cflag; /* control mode flags */
19 unsigned short c_lflag; /* local mode flags */
20 unsigned char c_line; /* line discipline */
21 unsigned char c_cc[NCC]; /* control characters */
22};
23
24#ifdef __KERNEL__
25/* intr=^C quit=^| erase=del kill=^U
26 eof=^D vtime=\0 vmin=\1 sxtc=\0
27 start=^Q stop=^S susp=^Z eol=\0
28 reprint=^R discard=^U werase=^W lnext=^V
29 eol2=\0
30*/
31#define INIT_C_CC "\003\034\177\025\004\0\1\0\021\023\032\0\022\017\027\026\0"
32#endif
33
34/* modem lines */
35#define TIOCM_LE 0x001
36#define TIOCM_DTR 0x002
37#define TIOCM_RTS 0x004
38#define TIOCM_ST 0x008
39#define TIOCM_SR 0x010
40#define TIOCM_CTS 0x020
41#define TIOCM_CAR 0x040
42#define TIOCM_RNG 0x080
43#define TIOCM_DSR 0x100
44#define TIOCM_CD TIOCM_CAR
45#define TIOCM_RI TIOCM_RNG
46#define TIOCM_OUT1 0x2000
47#define TIOCM_OUT2 0x4000
48#define TIOCM_LOOP 0x8000
49
50#define TIOCM_MODEM_BITS TIOCM_OUT2 /* IRDA support */
51
52/*
53 * Translate a "termio" structure into a "termios". Ugh.
54 */
55#define SET_LOW_TERMIOS_BITS(termios, termio, x) { \
56 unsigned short __tmp; \
57 get_user(__tmp, &(termio)->x); \
58 *(unsigned short *) &(termios)->x = __tmp; \
59}
60
61#define user_termio_to_kernel_termios(termios, termio) \
62({ \
63 SET_LOW_TERMIOS_BITS(termios, termio, c_iflag); \
64 SET_LOW_TERMIOS_BITS(termios, termio, c_oflag); \
65 SET_LOW_TERMIOS_BITS(termios, termio, c_cflag); \
66 SET_LOW_TERMIOS_BITS(termios, termio, c_lflag); \
67 copy_from_user((termios)->c_cc, (termio)->c_cc, NCC); \
68})
69
70/*
71 * Translate a "termios" structure into a "termio". Ugh.
72 */
73#define kernel_termios_to_user_termio(termio, termios) \
74({ \
75 put_user((termios)->c_iflag, &(termio)->c_iflag); \
76 put_user((termios)->c_oflag, &(termio)->c_oflag); \
77 put_user((termios)->c_cflag, &(termio)->c_cflag); \
78 put_user((termios)->c_lflag, &(termio)->c_lflag); \
79 put_user((termios)->c_line, &(termio)->c_line); \
80 copy_to_user((termio)->c_cc, (termios)->c_cc, NCC); \
81})
82
83#define user_termios_to_kernel_termios(k, u) \
84 copy_from_user(k, u, sizeof(struct termios2))
85#define kernel_termios_to_user_termios(u, k) \
86 copy_to_user(u, k, sizeof(struct termios2))
87#define user_termios_to_kernel_termios_1(k, u) \
88 copy_from_user(k, u, sizeof(struct termios))
89#define kernel_termios_to_user_termios_1(u, k) \
90 copy_to_user(u, k, sizeof(struct termios))
91
92#endif /* _ASM_TERMIOS_H */
diff --git a/include/asm-mn10300/thread_info.h b/include/asm-mn10300/thread_info.h
new file mode 100644
index 000000000000..e397e7192785
--- /dev/null
+++ b/include/asm-mn10300/thread_info.h
@@ -0,0 +1,168 @@
1/* MN10300 Low-level thread information
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11
12#ifndef _ASM_THREAD_INFO_H
13#define _ASM_THREAD_INFO_H
14
15#ifdef __KERNEL__
16
17#include <asm/page.h>
18
19#ifndef __ASSEMBLY__
20#include <asm/processor.h>
21#endif
22
23#define PREEMPT_ACTIVE 0x10000000
24
25#ifdef CONFIG_4KSTACKS
26#define THREAD_SIZE (4096)
27#else
28#define THREAD_SIZE (8192)
29#endif
30
31#define STACK_WARN (THREAD_SIZE / 8)
32
33/*
34 * low level task data that entry.S needs immediate access to
35 * - this struct should fit entirely inside of one cache line
36 * - this struct shares the supervisor stack pages
37 * - if the contents of this structure are changed, the assembly constants
38 * must also be changed
39 */
40#ifndef __ASSEMBLY__
41
42struct thread_info {
43 struct task_struct *task; /* main task structure */
44 struct exec_domain *exec_domain; /* execution domain */
45 unsigned long flags; /* low level flags */
46 __u32 cpu; /* current CPU */
47 __s32 preempt_count; /* 0 => preemptable, <0 => BUG */
48
49 mm_segment_t addr_limit; /* thread address space:
50 0-0xBFFFFFFF for user-thead
51 0-0xFFFFFFFF for kernel-thread
52 */
53 struct restart_block restart_block;
54
55 __u8 supervisor_stack[0];
56};
57
58#else /* !__ASSEMBLY__ */
59
60#ifndef __ASM_OFFSETS_H__
61#include <asm/asm-offsets.h>
62#endif
63
64#endif
65
66/*
67 * macros/functions for gaining access to the thread information structure
68 *
69 * preempt_count needs to be 1 initially, until the scheduler is functional.
70 */
71#ifndef __ASSEMBLY__
72
73#define INIT_THREAD_INFO(tsk) \
74{ \
75 .task = &tsk, \
76 .exec_domain = &default_exec_domain, \
77 .flags = 0, \
78 .cpu = 0, \
79 .preempt_count = 1, \
80 .addr_limit = KERNEL_DS, \
81 .restart_block = { \
82 .fn = do_no_restart_syscall, \
83 }, \
84}
85
86#define init_thread_info (init_thread_union.thread_info)
87#define init_stack (init_thread_union.stack)
88#define init_uregs \
89 ((struct pt_regs *) \
90 ((unsigned long) init_stack + THREAD_SIZE - sizeof(struct pt_regs)))
91
92extern struct thread_info *__current_ti;
93
94/* how to get the thread information struct from C */
95static inline __attribute__((const))
96struct thread_info *current_thread_info(void)
97{
98 struct thread_info *ti;
99 asm("mov sp,%0\n"
100 "and %1,%0\n"
101 : "=d" (ti)
102 : "i" (~(THREAD_SIZE - 1))
103 : "cc");
104 return ti;
105}
106
107/* how to get the current stack pointer from C */
108static inline unsigned long current_stack_pointer(void)
109{
110 unsigned long sp;
111 asm("mov sp,%0; ":"=r" (sp));
112 return sp;
113}
114
115/* thread information allocation */
116#ifdef CONFIG_DEBUG_STACK_USAGE
117#define alloc_thread_info(tsk) kzalloc(THREAD_SIZE, GFP_KERNEL)
118#else
119#define alloc_thread_info(tsk) kmalloc(THREAD_SIZE, GFP_KERNEL)
120#endif
121
122#define free_thread_info(ti) kfree((ti))
123#define get_thread_info(ti) get_task_struct((ti)->task)
124#define put_thread_info(ti) put_task_struct((ti)->task)
125
126#else /* !__ASSEMBLY__ */
127
128#ifndef __VMLINUX_LDS__
129/* how to get the thread information struct from ASM */
130.macro GET_THREAD_INFO reg
131 mov sp,\reg
132 and -THREAD_SIZE,\reg
133.endm
134#endif
135#endif
136
137/*
138 * thread information flags
139 * - these are process state flags that various assembly files may need to
140 * access
141 * - pending work-to-be-done flags are in LSW
142 * - other flags in MSW
143 */
144#define TIF_SYSCALL_TRACE 0 /* syscall trace active */
145#define TIF_NOTIFY_RESUME 1 /* resumption notification requested */
146#define TIF_SIGPENDING 2 /* signal pending */
147#define TIF_NEED_RESCHED 3 /* rescheduling necessary */
148#define TIF_SINGLESTEP 4 /* restore singlestep on return to user mode */
149#define TIF_RESTORE_SIGMASK 5 /* restore signal mask in do_signal() */
150#define TIF_POLLING_NRFLAG 16 /* true if poll_idle() is polling TIF_NEED_RESCHED */
151#define TIF_MEMDIE 17 /* OOM killer killed process */
152#define TIF_FREEZE 18 /* freezing for suspend */
153
154#define _TIF_SYSCALL_TRACE +(1 << TIF_SYSCALL_TRACE)
155#define _TIF_NOTIFY_RESUME +(1 << TIF_NOTIFY_RESUME)
156#define _TIF_SIGPENDING +(1 << TIF_SIGPENDING)
157#define _TIF_NEED_RESCHED +(1 << TIF_NEED_RESCHED)
158#define _TIF_SINGLESTEP +(1 << TIF_SINGLESTEP)
159#define _TIF_RESTORE_SIGMASK +(1 << TIF_RESTORE_SIGMASK)
160#define _TIF_POLLING_NRFLAG +(1 << TIF_POLLING_NRFLAG)
161#define _TIF_FREEZE +(1 << TIF_FREEZE)
162
163#define _TIF_WORK_MASK 0x0000FFFE /* work to do on interrupt/exception return */
164#define _TIF_ALLWORK_MASK 0x0000FFFF /* work to do on any return to u-space */
165
166#endif /* __KERNEL__ */
167
168#endif /* _ASM_THREAD_INFO_H */
diff --git a/include/asm-mn10300/timer-regs.h b/include/asm-mn10300/timer-regs.h
new file mode 100644
index 000000000000..1d883b7f94ab
--- /dev/null
+++ b/include/asm-mn10300/timer-regs.h
@@ -0,0 +1,293 @@
1/* AM33v2 on-board timer module registers
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11
12#ifndef _ASM_TIMER_REGS_H
13#define _ASM_TIMER_REGS_H
14
15#include <asm/cpu-regs.h>
16#include <asm/intctl-regs.h>
17
18#ifdef __KERNEL__
19
20/* timer prescalar control */
21#define TMPSCNT __SYSREG(0xd4003071, u8) /* timer prescaler control */
22#define TMPSCNT_ENABLE 0x80 /* timer prescaler enable */
23#define TMPSCNT_DISABLE 0x00 /* timer prescaler disable */
24
25/* 8 bit timers */
26#define TM0MD __SYSREG(0xd4003000, u8) /* timer 0 mode register */
27#define TM0MD_SRC 0x07 /* timer source */
28#define TM0MD_SRC_IOCLK 0x00 /* - IOCLK */
29#define TM0MD_SRC_IOCLK_8 0x01 /* - 1/8 IOCLK */
30#define TM0MD_SRC_IOCLK_32 0x02 /* - 1/32 IOCLK */
31#define TM0MD_SRC_TM2IO 0x03 /* - TM2IO pin input */
32#define TM0MD_SRC_TM1UFLOW 0x05 /* - timer 1 underflow */
33#define TM0MD_SRC_TM2UFLOW 0x06 /* - timer 2 underflow */
34#define TM0MD_SRC_TM0IO 0x07 /* - TM0IO pin input */
35#define TM0MD_INIT_COUNTER 0x40 /* initialize TMnBC = TMnBR */
36#define TM0MD_COUNT_ENABLE 0x80 /* timer count enable */
37
38#define TM1MD __SYSREG(0xd4003001, u8) /* timer 1 mode register */
39#define TM1MD_SRC 0x07 /* timer source */
40#define TM1MD_SRC_IOCLK 0x00 /* - IOCLK */
41#define TM1MD_SRC_IOCLK_8 0x01 /* - 1/8 IOCLK */
42#define TM1MD_SRC_IOCLK_32 0x02 /* - 1/32 IOCLK */
43#define TM1MD_SRC_TM0CASCADE 0x03 /* - cascade with timer 0 */
44#define TM1MD_SRC_TM0UFLOW 0x04 /* - timer 0 underflow */
45#define TM1MD_SRC_TM2UFLOW 0x06 /* - timer 2 underflow */
46#define TM1MD_SRC_TM1IO 0x07 /* - TM1IO pin input */
47#define TM1MD_INIT_COUNTER 0x40 /* initialize TMnBC = TMnBR */
48#define TM1MD_COUNT_ENABLE 0x80 /* timer count enable */
49
50#define TM2MD __SYSREG(0xd4003002, u8) /* timer 2 mode register */
51#define TM2MD_SRC 0x07 /* timer source */
52#define TM2MD_SRC_IOCLK 0x00 /* - IOCLK */
53#define TM2MD_SRC_IOCLK_8 0x01 /* - 1/8 IOCLK */
54#define TM2MD_SRC_IOCLK_32 0x02 /* - 1/32 IOCLK */
55#define TM2MD_SRC_TM1CASCADE 0x03 /* - cascade with timer 1 */
56#define TM2MD_SRC_TM0UFLOW 0x04 /* - timer 0 underflow */
57#define TM2MD_SRC_TM1UFLOW 0x05 /* - timer 1 underflow */
58#define TM2MD_SRC_TM2IO 0x07 /* - TM2IO pin input */
59#define TM2MD_INIT_COUNTER 0x40 /* initialize TMnBC = TMnBR */
60#define TM2MD_COUNT_ENABLE 0x80 /* timer count enable */
61
62#define TM3MD __SYSREG(0xd4003003, u8) /* timer 3 mode register */
63#define TM3MD_SRC 0x07 /* timer source */
64#define TM3MD_SRC_IOCLK 0x00 /* - IOCLK */
65#define TM3MD_SRC_IOCLK_8 0x01 /* - 1/8 IOCLK */
66#define TM3MD_SRC_IOCLK_32 0x02 /* - 1/32 IOCLK */
67#define TM3MD_SRC_TM1CASCADE 0x03 /* - cascade with timer 2 */
68#define TM3MD_SRC_TM0UFLOW 0x04 /* - timer 0 underflow */
69#define TM3MD_SRC_TM1UFLOW 0x05 /* - timer 1 underflow */
70#define TM3MD_SRC_TM2UFLOW 0x06 /* - timer 2 underflow */
71#define TM3MD_SRC_TM3IO 0x07 /* - TM3IO pin input */
72#define TM3MD_INIT_COUNTER 0x40 /* initialize TMnBC = TMnBR */
73#define TM3MD_COUNT_ENABLE 0x80 /* timer count enable */
74
75#define TM01MD __SYSREG(0xd4003000, u16) /* timer 0:1 mode register */
76
77#define TM0BR __SYSREG(0xd4003010, u8) /* timer 0 base register */
78#define TM1BR __SYSREG(0xd4003011, u8) /* timer 1 base register */
79#define TM2BR __SYSREG(0xd4003012, u8) /* timer 2 base register */
80#define TM3BR __SYSREG(0xd4003013, u8) /* timer 3 base register */
81#define TM01BR __SYSREG(0xd4003010, u16) /* timer 0:1 base register */
82
83#define TM0BC __SYSREGC(0xd4003020, u8) /* timer 0 binary counter */
84#define TM1BC __SYSREGC(0xd4003021, u8) /* timer 1 binary counter */
85#define TM2BC __SYSREGC(0xd4003022, u8) /* timer 2 binary counter */
86#define TM3BC __SYSREGC(0xd4003023, u8) /* timer 3 binary counter */
87#define TM01BC __SYSREGC(0xd4003020, u16) /* timer 0:1 binary counter */
88
89#define TM0IRQ 2 /* timer 0 IRQ */
90#define TM1IRQ 3 /* timer 1 IRQ */
91#define TM2IRQ 4 /* timer 2 IRQ */
92#define TM3IRQ 5 /* timer 3 IRQ */
93
94#define TM0ICR GxICR(TM0IRQ) /* timer 0 uflow intr ctrl reg */
95#define TM1ICR GxICR(TM1IRQ) /* timer 1 uflow intr ctrl reg */
96#define TM2ICR GxICR(TM2IRQ) /* timer 2 uflow intr ctrl reg */
97#define TM3ICR GxICR(TM3IRQ) /* timer 3 uflow intr ctrl reg */
98
99/* 16-bit timers 4,5 & 7-11 */
100#define TM4MD __SYSREG(0xd4003080, u8) /* timer 4 mode register */
101#define TM4MD_SRC 0x07 /* timer source */
102#define TM4MD_SRC_IOCLK 0x00 /* - IOCLK */
103#define TM4MD_SRC_IOCLK_8 0x01 /* - 1/8 IOCLK */
104#define TM4MD_SRC_IOCLK_32 0x02 /* - 1/32 IOCLK */
105#define TM4MD_SRC_TM0UFLOW 0x04 /* - timer 0 underflow */
106#define TM4MD_SRC_TM1UFLOW 0x05 /* - timer 1 underflow */
107#define TM4MD_SRC_TM2UFLOW 0x06 /* - timer 2 underflow */
108#define TM4MD_SRC_TM4IO 0x07 /* - TM4IO pin input */
109#define TM4MD_INIT_COUNTER 0x40 /* initialize TMnBC = TMnBR */
110#define TM4MD_COUNT_ENABLE 0x80 /* timer count enable */
111
112#define TM5MD __SYSREG(0xd4003082, u8) /* timer 5 mode register */
113#define TM5MD_SRC 0x07 /* timer source */
114#define TM5MD_SRC_IOCLK 0x00 /* - IOCLK */
115#define TM5MD_SRC_IOCLK_8 0x01 /* - 1/8 IOCLK */
116#define TM5MD_SRC_IOCLK_32 0x02 /* - 1/32 IOCLK */
117#define TM5MD_SRC_TM4CASCADE 0x03 /* - cascade with timer 4 */
118#define TM5MD_SRC_TM0UFLOW 0x04 /* - timer 0 underflow */
119#define TM5MD_SRC_TM1UFLOW 0x05 /* - timer 1 underflow */
120#define TM5MD_SRC_TM2UFLOW 0x06 /* - timer 2 underflow */
121#define TM5MD_SRC_TM5IO 0x07 /* - TM5IO pin input */
122#define TM5MD_INIT_COUNTER 0x40 /* initialize TMnBC = TMnBR */
123#define TM5MD_COUNT_ENABLE 0x80 /* timer count enable */
124
125#define TM7MD __SYSREG(0xd4003086, u8) /* timer 7 mode register */
126#define TM7MD_SRC 0x07 /* timer source */
127#define TM7MD_SRC_IOCLK 0x00 /* - IOCLK */
128#define TM7MD_SRC_IOCLK_8 0x01 /* - 1/8 IOCLK */
129#define TM7MD_SRC_IOCLK_32 0x02 /* - 1/32 IOCLK */
130#define TM7MD_SRC_TM0UFLOW 0x04 /* - timer 0 underflow */
131#define TM7MD_SRC_TM1UFLOW 0x05 /* - timer 1 underflow */
132#define TM7MD_SRC_TM2UFLOW 0x06 /* - timer 2 underflow */
133#define TM7MD_SRC_TM7IO 0x07 /* - TM7IO pin input */
134#define TM7MD_INIT_COUNTER 0x40 /* initialize TMnBC = TMnBR */
135#define TM7MD_COUNT_ENABLE 0x80 /* timer count enable */
136
137#define TM8MD __SYSREG(0xd4003088, u8) /* timer 8 mode register */
138#define TM8MD_SRC 0x07 /* timer source */
139#define TM8MD_SRC_IOCLK 0x00 /* - IOCLK */
140#define TM8MD_SRC_IOCLK_8 0x01 /* - 1/8 IOCLK */
141#define TM8MD_SRC_IOCLK_32 0x02 /* - 1/32 IOCLK */
142#define TM8MD_SRC_TM7CASCADE 0x03 /* - cascade with timer 7 */
143#define TM8MD_SRC_TM0UFLOW 0x04 /* - timer 0 underflow */
144#define TM8MD_SRC_TM1UFLOW 0x05 /* - timer 1 underflow */
145#define TM8MD_SRC_TM2UFLOW 0x06 /* - timer 2 underflow */
146#define TM8MD_SRC_TM8IO 0x07 /* - TM8IO pin input */
147#define TM8MD_INIT_COUNTER 0x40 /* initialize TMnBC = TMnBR */
148#define TM8MD_COUNT_ENABLE 0x80 /* timer count enable */
149
150#define TM9MD __SYSREG(0xd400308a, u8) /* timer 9 mode register */
151#define TM9MD_SRC 0x07 /* timer source */
152#define TM9MD_SRC_IOCLK 0x00 /* - IOCLK */
153#define TM9MD_SRC_IOCLK_8 0x01 /* - 1/8 IOCLK */
154#define TM9MD_SRC_IOCLK_32 0x02 /* - 1/32 IOCLK */
155#define TM9MD_SRC_TM8CASCADE 0x03 /* - cascade with timer 8 */
156#define TM9MD_SRC_TM0UFLOW 0x04 /* - timer 0 underflow */
157#define TM9MD_SRC_TM1UFLOW 0x05 /* - timer 1 underflow */
158#define TM9MD_SRC_TM2UFLOW 0x06 /* - timer 2 underflow */
159#define TM9MD_SRC_TM9IO 0x07 /* - TM9IO pin input */
160#define TM9MD_INIT_COUNTER 0x40 /* initialize TMnBC = TMnBR */
161#define TM9MD_COUNT_ENABLE 0x80 /* timer count enable */
162
163#define TM10MD __SYSREG(0xd400308c, u8) /* timer 10 mode register */
164#define TM10MD_SRC 0x07 /* timer source */
165#define TM10MD_SRC_IOCLK 0x00 /* - IOCLK */
166#define TM10MD_SRC_IOCLK_8 0x01 /* - 1/8 IOCLK */
167#define TM10MD_SRC_IOCLK_32 0x02 /* - 1/32 IOCLK */
168#define TM10MD_SRC_TM9CASCADE 0x03 /* - cascade with timer 9 */
169#define TM10MD_SRC_TM0UFLOW 0x04 /* - timer 0 underflow */
170#define TM10MD_SRC_TM1UFLOW 0x05 /* - timer 1 underflow */
171#define TM10MD_SRC_TM2UFLOW 0x06 /* - timer 2 underflow */
172#define TM10MD_SRC_TM10IO 0x07 /* - TM10IO pin input */
173#define TM10MD_INIT_COUNTER 0x40 /* initialize TMnBC = TMnBR */
174#define TM10MD_COUNT_ENABLE 0x80 /* timer count enable */
175
176#define TM11MD __SYSREG(0xd400308e, u8) /* timer 11 mode register */
177#define TM11MD_SRC 0x07 /* timer source */
178#define TM11MD_SRC_IOCLK 0x00 /* - IOCLK */
179#define TM11MD_SRC_IOCLK_8 0x01 /* - 1/8 IOCLK */
180#define TM11MD_SRC_IOCLK_32 0x02 /* - 1/32 IOCLK */
181#define TM11MD_SRC_TM7CASCADE 0x03 /* - cascade with timer 7 */
182#define TM11MD_SRC_TM0UFLOW 0x04 /* - timer 0 underflow */
183#define TM11MD_SRC_TM1UFLOW 0x05 /* - timer 1 underflow */
184#define TM11MD_SRC_TM2UFLOW 0x06 /* - timer 2 underflow */
185#define TM11MD_SRC_TM11IO 0x07 /* - TM11IO pin input */
186#define TM11MD_INIT_COUNTER 0x40 /* initialize TMnBC = TMnBR */
187#define TM11MD_COUNT_ENABLE 0x80 /* timer count enable */
188
189#define TM4BR __SYSREG(0xd4003090, u16) /* timer 4 base register */
190#define TM5BR __SYSREG(0xd4003092, u16) /* timer 5 base register */
191#define TM7BR __SYSREG(0xd4003096, u16) /* timer 7 base register */
192#define TM8BR __SYSREG(0xd4003098, u16) /* timer 8 base register */
193#define TM9BR __SYSREG(0xd400309a, u16) /* timer 9 base register */
194#define TM10BR __SYSREG(0xd400309c, u16) /* timer 10 base register */
195#define TM11BR __SYSREG(0xd400309e, u16) /* timer 11 base register */
196#define TM45BR __SYSREG(0xd4003090, u32) /* timer 4:5 base register */
197
198#define TM4BC __SYSREG(0xd40030a0, u16) /* timer 4 binary counter */
199#define TM5BC __SYSREG(0xd40030a2, u16) /* timer 5 binary counter */
200#define TM45BC __SYSREG(0xd40030a0, u32) /* timer 4:5 binary counter */
201
202#define TM7BC __SYSREG(0xd40030a6, u16) /* timer 7 binary counter */
203#define TM8BC __SYSREG(0xd40030a8, u16) /* timer 8 binary counter */
204#define TM9BC __SYSREG(0xd40030aa, u16) /* timer 9 binary counter */
205#define TM10BC __SYSREG(0xd40030ac, u16) /* timer 10 binary counter */
206#define TM11BC __SYSREG(0xd40030ae, u16) /* timer 11 binary counter */
207
208#define TM4IRQ 6 /* timer 4 IRQ */
209#define TM5IRQ 7 /* timer 5 IRQ */
210#define TM7IRQ 11 /* timer 7 IRQ */
211#define TM8IRQ 12 /* timer 8 IRQ */
212#define TM9IRQ 13 /* timer 9 IRQ */
213#define TM10IRQ 14 /* timer 10 IRQ */
214#define TM11IRQ 15 /* timer 11 IRQ */
215
216#define TM4ICR GxICR(TM4IRQ) /* timer 4 uflow intr ctrl reg */
217#define TM5ICR GxICR(TM5IRQ) /* timer 5 uflow intr ctrl reg */
218#define TM7ICR GxICR(TM7IRQ) /* timer 7 uflow intr ctrl reg */
219#define TM8ICR GxICR(TM8IRQ) /* timer 8 uflow intr ctrl reg */
220#define TM9ICR GxICR(TM9IRQ) /* timer 9 uflow intr ctrl reg */
221#define TM10ICR GxICR(TM10IRQ) /* timer 10 uflow intr ctrl reg */
222#define TM11ICR GxICR(TM11IRQ) /* timer 11 uflow intr ctrl reg */
223
224/* 16-bit timer 6 */
225#define TM6MD __SYSREG(0xd4003084, u16) /* timer6 mode register */
226#define TM6MD_SRC 0x0007 /* timer source */
227#define TM6MD_SRC_IOCLK 0x0000 /* - IOCLK */
228#define TM6MD_SRC_IOCLK_8 0x0001 /* - 1/8 IOCLK */
229#define TM6MD_SRC_IOCLK_32 0x0002 /* - 1/32 IOCLK */
230#define TM6MD_SRC_TM0UFLOW 0x0004 /* - timer 0 underflow */
231#define TM6MD_SRC_TM1UFLOW 0x0005 /* - timer 1 underflow */
232#define TM6MD_SRC_TM6IOB_BOTH 0x0006 /* - TM6IOB pin input (both edges) */
233#define TM6MD_SRC_TM6IOB_SINGLE 0x0007 /* - TM6IOB pin input (single edge) */
234#define TM6MD_CLR_ENABLE 0x0010 /* clear count enable */
235#define TM6MD_ONESHOT_ENABLE 0x0040 /* oneshot count */
236#define TM6MD_TRIG_ENABLE 0x0080 /* TM6IOB pin trigger enable */
237#define TM6MD_PWM 0x3800 /* PWM output mode */
238#define TM6MD_PWM_DIS 0x0000 /* - disabled */
239#define TM6MD_PWM_10BIT 0x1000 /* - 10 bits mode */
240#define TM6MD_PWM_11BIT 0x1800 /* - 11 bits mode */
241#define TM6MD_PWM_12BIT 0x3000 /* - 12 bits mode */
242#define TM6MD_PWM_14BIT 0x3800 /* - 14 bits mode */
243#define TM6MD_INIT_COUNTER 0x4000 /* initialize TMnBC to zero */
244#define TM6MD_COUNT_ENABLE 0x8000 /* timer count enable */
245
246#define TM6MDA __SYSREG(0xd40030b4, u8) /* timer6 cmp/cap A mode reg */
247#define TM6MDA_OUT 0x07 /* output select */
248#define TM6MDA_OUT_SETA_RESETB 0x00 /* - set at match A, reset at match B */
249#define TM6MDA_OUT_SETA_RESETOV 0x01 /* - set at match A, reset at overflow */
250#define TM6MDA_OUT_SETA 0x02 /* - set at match A */
251#define TM6MDA_OUT_RESETA 0x03 /* - reset at match A */
252#define TM6MDA_OUT_TOGGLE 0x04 /* - toggle on match A */
253#define TM6MDA_MODE 0xc0 /* compare A register mode */
254#define TM6MDA_MODE_CMP_SINGLE 0x00 /* - compare, single buffer mode */
255#define TM6MDA_MODE_CMP_DOUBLE 0x40 /* - compare, double buffer mode */
256#define TM6MDA_MODE_CAP_S_EDGE 0x80 /* - capture, single edge mode */
257#define TM6MDA_MODE_CAP_D_EDGE 0xc0 /* - capture, double edge mode */
258#define TM6MDA_EDGE 0x20 /* compare A edge select */
259#define TM6MDA_EDGE_FALLING 0x00 /* capture on falling edge */
260#define TM6MDA_EDGE_RISING 0x20 /* capture on rising edge */
261#define TM6MDA_CAPTURE_ENABLE 0x10 /* capture enable */
262
263#define TM6MDB __SYSREG(0xd40030b5, u8) /* timer6 cmp/cap B mode reg */
264#define TM6MDB_OUT 0x07 /* output select */
265#define TM6MDB_OUT_SETB_RESETA 0x00 /* - set at match B, reset at match A */
266#define TM6MDB_OUT_SETB_RESETOV 0x01 /* - set at match B */
267#define TM6MDB_OUT_RESETB 0x03 /* - reset at match B */
268#define TM6MDB_OUT_TOGGLE 0x04 /* - toggle on match B */
269#define TM6MDB_MODE 0xc0 /* compare B register mode */
270#define TM6MDB_MODE_CMP_SINGLE 0x00 /* - compare, single buffer mode */
271#define TM6MDB_MODE_CMP_DOUBLE 0x40 /* - compare, double buffer mode */
272#define TM6MDB_MODE_CAP_S_EDGE 0x80 /* - capture, single edge mode */
273#define TM6MDB_MODE_CAP_D_EDGE 0xc0 /* - capture, double edge mode */
274#define TM6MDB_EDGE 0x20 /* compare B edge select */
275#define TM6MDB_EDGE_FALLING 0x00 /* capture on falling edge */
276#define TM6MDB_EDGE_RISING 0x20 /* capture on rising edge */
277#define TM6MDB_CAPTURE_ENABLE 0x10 /* capture enable */
278
279#define TM6CA __SYSREG(0xd40030c4, u16) /* timer6 cmp/capture reg A */
280#define TM6CB __SYSREG(0xd40030d4, u16) /* timer6 cmp/capture reg B */
281#define TM6BC __SYSREG(0xd40030a4, u16) /* timer6 binary counter */
282
283#define TM6IRQ 6 /* timer 6 IRQ */
284#define TM6AIRQ 9 /* timer 6A IRQ */
285#define TM6BIRQ 10 /* timer 6B IRQ */
286
287#define TM6ICR GxICR(TM6IRQ) /* timer 6 uflow intr ctrl reg */
288#define TM6AICR GxICR(TM6AIRQ) /* timer 6A intr control reg */
289#define TM6BICR GxICR(TM6BIRQ) /* timer 6B intr control reg */
290
291#endif /* __KERNEL__ */
292
293#endif /* _ASM_TIMER_REGS_H */
diff --git a/include/asm-mn10300/timex.h b/include/asm-mn10300/timex.h
new file mode 100644
index 000000000000..3944277dab67
--- /dev/null
+++ b/include/asm-mn10300/timex.h
@@ -0,0 +1,33 @@
1/* MN10300 Architecture time management specifications
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_TIMEX_H
12#define _ASM_TIMEX_H
13
14#include <asm/hardirq.h>
15#include <asm/unit/timex.h>
16
17#define TICK_SIZE (tick_nsec / 1000)
18
19#define CLOCK_TICK_RATE 1193180 /* Underlying HZ - this should probably be set
20 * to something appropriate, but what? */
21
22extern cycles_t cacheflush_time;
23
24#ifdef __KERNEL__
25
26static inline cycles_t get_cycles(void)
27{
28 return read_timestamp_counter();
29}
30
31#endif /* __KERNEL__ */
32
33#endif /* _ASM_TIMEX_H */
diff --git a/include/asm-mn10300/tlb.h b/include/asm-mn10300/tlb.h
new file mode 100644
index 000000000000..65d232b96613
--- /dev/null
+++ b/include/asm-mn10300/tlb.h
@@ -0,0 +1,34 @@
1/* MN10300 TLB definitions
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11
12#ifndef _ASM_TLB_H
13#define _ASM_TLB_H
14
15#include <asm/tlbflush.h>
16
17extern void check_pgt_cache(void);
18
19/*
20 * we don't need any special per-pte or per-vma handling...
21 */
22#define tlb_start_vma(tlb, vma) do { } while (0)
23#define tlb_end_vma(tlb, vma) do { } while (0)
24#define __tlb_remove_tlb_entry(tlb, ptep, address) do { } while (0)
25
26/*
27 * .. because we flush the whole mm when it fills up
28 */
29#define tlb_flush(tlb) flush_tlb_mm((tlb)->mm)
30
31/* for now, just use the generic stuff */
32#include <asm-generic/tlb.h>
33
34#endif /* _ASM_TLB_H */
diff --git a/include/asm-mn10300/tlbflush.h b/include/asm-mn10300/tlbflush.h
new file mode 100644
index 000000000000..e0239865abcb
--- /dev/null
+++ b/include/asm-mn10300/tlbflush.h
@@ -0,0 +1,80 @@
1/* MN10300 TLB flushing functions
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_TLBFLUSH_H
12#define _ASM_TLBFLUSH_H
13
14#include <asm/processor.h>
15
16#define __flush_tlb() \
17do { \
18 int w; \
19 __asm__ __volatile__ \
20 (" mov %1,%0 \n" \
21 " or %2,%0 \n" \
22 " mov %0,%1 \n" \
23 : "=d"(w) \
24 : "m"(MMUCTR), "i"(MMUCTR_IIV|MMUCTR_DIV) \
25 : "memory" \
26 ); \
27} while (0)
28
29#define __flush_tlb_all() __flush_tlb()
30#define __flush_tlb_one(addr) __flush_tlb()
31
32
33/*
34 * TLB flushing:
35 *
36 * - flush_tlb() flushes the current mm struct TLBs
37 * - flush_tlb_all() flushes all processes TLBs
38 * - flush_tlb_mm(mm) flushes the specified mm context TLB's
39 * - flush_tlb_page(vma, vmaddr) flushes one page
40 * - flush_tlb_range(mm, start, end) flushes a range of pages
41 * - flush_tlb_pgtables(mm, start, end) flushes a range of page tables
42 */
43#define flush_tlb_all() \
44do { \
45 preempt_disable(); \
46 __flush_tlb_all(); \
47 preempt_enable(); \
48} while (0)
49
50#define flush_tlb_mm(mm) \
51do { \
52 preempt_disable(); \
53 __flush_tlb_all(); \
54 preempt_enable(); \
55} while (0)
56
57#define flush_tlb_range(vma, start, end) \
58do { \
59 unsigned long __s __attribute__((unused)) = (start); \
60 unsigned long __e __attribute__((unused)) = (end); \
61 preempt_disable(); \
62 __flush_tlb_all(); \
63 preempt_enable(); \
64} while (0)
65
66
67#define __flush_tlb_global() flush_tlb_all()
68#define flush_tlb() flush_tlb_all()
69#define flush_tlb_kernel_range(start, end) \
70do { \
71 unsigned long __s __attribute__((unused)) = (start); \
72 unsigned long __e __attribute__((unused)) = (end); \
73 flush_tlb_all(); \
74} while (0)
75
76extern void flush_tlb_page(struct vm_area_struct *vma, unsigned long addr);
77
78#define flush_tlb_pgtables(mm, start, end) do {} while (0)
79
80#endif /* _ASM_TLBFLUSH_H */
diff --git a/include/asm-mn10300/topology.h b/include/asm-mn10300/topology.h
new file mode 100644
index 000000000000..5428f333a02c
--- /dev/null
+++ b/include/asm-mn10300/topology.h
@@ -0,0 +1 @@
#include <asm-generic/topology.h>
diff --git a/include/asm-mn10300/types.h b/include/asm-mn10300/types.h
new file mode 100644
index 000000000000..d40ea7628bfc
--- /dev/null
+++ b/include/asm-mn10300/types.h
@@ -0,0 +1,67 @@
1/* MN10300 Basic type definitions
2 *
3 * Copyright (C) 2007 Matsushita Electric Industrial Co., Ltd.
4 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_TYPES_H
12#define _ASM_TYPES_H
13
14#ifndef __ASSEMBLY__
15
16typedef unsigned short umode_t;
17
18/*
19 * __xx is ok: it doesn't pollute the POSIX namespace. Use these in the
20 * header files exported to user space
21 */
22
23typedef __signed__ char __s8;
24typedef unsigned char __u8;
25
26typedef __signed__ short __s16;
27typedef unsigned short __u16;
28
29typedef __signed__ int __s32;
30typedef unsigned int __u32;
31
32#if defined(__GNUC__) && !defined(__STRICT_ANSI__)
33typedef __signed__ long long __s64;
34typedef unsigned long long __u64;
35#endif
36
37#endif /* __ASSEMBLY__ */
38
39/*
40 * These aren't exported outside the kernel to avoid name space clashes
41 */
42#ifdef __KERNEL__
43
44#define BITS_PER_LONG 32
45
46#ifndef __ASSEMBLY__
47
48typedef signed char s8;
49typedef unsigned char u8;
50
51typedef signed short s16;
52typedef unsigned short u16;
53
54typedef signed int s32;
55typedef unsigned int u32;
56
57typedef signed long long s64;
58typedef unsigned long long u64;
59
60/* Dma addresses are 32-bits wide. */
61typedef u32 dma_addr_t;
62
63#endif /* __ASSEMBLY__ */
64
65#endif /* __KERNEL__ */
66
67#endif /* _ASM_TYPES_H */
diff --git a/include/asm-mn10300/uaccess.h b/include/asm-mn10300/uaccess.h
new file mode 100644
index 000000000000..46b9b647f3c3
--- /dev/null
+++ b/include/asm-mn10300/uaccess.h
@@ -0,0 +1,490 @@
1/* MN10300 userspace access functions
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_UACCESS_H
12#define _ASM_UACCESS_H
13
14/*
15 * User space memory access functions
16 */
17#include <linux/sched.h>
18#include <asm/page.h>
19#include <asm/pgtable.h>
20#include <asm/errno.h>
21
22#define VERIFY_READ 0
23#define VERIFY_WRITE 1
24
25/*
26 * The fs value determines whether argument validity checking should be
27 * performed or not. If get_fs() == USER_DS, checking is performed, with
28 * get_fs() == KERNEL_DS, checking is bypassed.
29 *
30 * For historical reasons, these macros are grossly misnamed.
31 */
32
33#define MAKE_MM_SEG(s) ((mm_segment_t) { (s) })
34
35#define KERNEL_XDS MAKE_MM_SEG(0xBFFFFFFF)
36#define KERNEL_DS MAKE_MM_SEG(0x9FFFFFFF)
37#define USER_DS MAKE_MM_SEG(TASK_SIZE)
38
39#define get_ds() (KERNEL_DS)
40#define get_fs() (current_thread_info()->addr_limit)
41#define set_fs(x) (current_thread_info()->addr_limit = (x))
42#define __kernel_ds_p() (current_thread_info()->addr_limit.seg == 0x9FFFFFFF)
43
44#define segment_eq(a, b) ((a).seg == (b).seg)
45
46#define __addr_ok(addr) \
47 ((unsigned long)(addr) < (current_thread_info()->addr_limit.seg))
48
49/*
50 * check that a range of addresses falls within the current address limit
51 */
52static inline int ___range_ok(unsigned long addr, unsigned int size)
53{
54 int flag = 1, tmp;
55
56 asm(" add %3,%1 \n" /* set C-flag if addr + size > 4Gb */
57 " bcs 0f \n"
58 " cmp %4,%1 \n" /* jump if addr+size>limit (error) */
59 " bhi 0f \n"
60 " clr %0 \n" /* mark okay */
61 "0: \n"
62 : "=r"(flag), "=&r"(tmp)
63 : "1"(addr), "ir"(size),
64 "r"(current_thread_info()->addr_limit.seg), "0"(flag)
65 : "cc"
66 );
67
68 return flag;
69}
70
71#define __range_ok(addr, size) ___range_ok((unsigned long)(addr), (u32)(size))
72
73#define access_ok(type, addr, size) (__range_ok((addr), (size)) == 0)
74#define __access_ok(addr, size) (__range_ok((addr), (size)) == 0)
75
76static inline int verify_area(int type, const void *addr, unsigned long size)
77{
78 return access_ok(type, addr, size) ? 0 : -EFAULT;
79}
80
81
82/*
83 * The exception table consists of pairs of addresses: the first is the
84 * address of an instruction that is allowed to fault, and the second is
85 * the address at which the program should continue. No registers are
86 * modified, so it is entirely up to the continuation code to figure out
87 * what to do.
88 *
89 * All the routines below use bits of fixup code that are out of line
90 * with the main instruction path. This means when everything is well,
91 * we don't even have to jump over them. Further, they do not intrude
92 * on our cache or tlb entries.
93 */
94
95struct exception_table_entry
96{
97 unsigned long insn, fixup;
98};
99
100/* Returns 0 if exception not found and fixup otherwise. */
101extern int fixup_exception(struct pt_regs *regs);
102
103#define put_user(x, ptr) __put_user_check((x), (ptr), sizeof(*(ptr)))
104#define get_user(x, ptr) __get_user_check((x), (ptr), sizeof(*(ptr)))
105
106/*
107 * The "__xxx" versions do not do address space checking, useful when
108 * doing multiple accesses to the same area (the user has to do the
109 * checks by hand with "access_ok()")
110 */
111#define __put_user(x, ptr) __put_user_nocheck((x), (ptr), sizeof(*(ptr)))
112#define __get_user(x, ptr) __get_user_nocheck((x), (ptr), sizeof(*(ptr)))
113
114/*
115 * The "xxx_ret" versions return constant specified in third argument, if
116 * something bad happens. These macros can be optimized for the
117 * case of just returning from the function xxx_ret is used.
118 */
119
120#define put_user_ret(x, ptr, ret) \
121 ({ if (put_user((x), (ptr))) return (ret); })
122#define get_user_ret(x, ptr, ret) \
123 ({ if (get_user((x), (ptr))) return (ret); })
124#define __put_user_ret(x, ptr, ret) \
125 ({ if (__put_user((x), (ptr))) return (ret); })
126#define __get_user_ret(x, ptr, ret) \
127 ({ if (__get_user((x), (ptr))) return (ret); })
128
129struct __large_struct { unsigned long buf[100]; };
130#define __m(x) (*(struct __large_struct *)(x))
131
132#define __get_user_nocheck(x, ptr, size) \
133({ \
134 __typeof(*(ptr)) __gu_val; \
135 unsigned long __gu_addr; \
136 int __gu_err; \
137 __gu_addr = (unsigned long) (ptr); \
138 switch (size) { \
139 case 1: __get_user_asm("bu"); break; \
140 case 2: __get_user_asm("hu"); break; \
141 case 4: __get_user_asm("" ); break; \
142 default: __get_user_unknown(); break; \
143 } \
144 x = (__typeof__(*(ptr))) __gu_val; \
145 __gu_err; \
146})
147
148#define __get_user_check(x, ptr, size) \
149({ \
150 __typeof__(*(ptr)) __gu_val; \
151 unsigned long __gu_addr; \
152 int __gu_err; \
153 __gu_addr = (unsigned long) (ptr); \
154 if (likely(__access_ok(__gu_addr,size))) { \
155 switch (size) { \
156 case 1: __get_user_asm("bu"); break; \
157 case 2: __get_user_asm("hu"); break; \
158 case 4: __get_user_asm("" ); break; \
159 default: __get_user_unknown(); break; \
160 } \
161 } \
162 else { \
163 __gu_err = -EFAULT; \
164 __gu_val = 0; \
165 } \
166 x = (__typeof__(*(ptr))) __gu_val; \
167 __gu_err; \
168})
169
170#define __get_user_asm(INSN) \
171({ \
172 asm volatile( \
173 "1:\n" \
174 " mov"INSN" %2,%1\n" \
175 " mov 0,%0\n" \
176 "2:\n" \
177 " .section .fixup,\"ax\"\n" \
178 "3:\n\t" \
179 " mov %3,%0\n" \
180 " jmp 2b\n" \
181 " .previous\n" \
182 " .section __ex_table,\"a\"\n" \
183 " .balign 4\n" \
184 " .long 1b, 3b\n" \
185 " .previous" \
186 : "=&r" (__gu_err), "=&r" (__gu_val) \
187 : "m" (__m(__gu_addr)), "i" (-EFAULT)); \
188})
189
190extern int __get_user_unknown(void);
191
192#define __put_user_nocheck(x, ptr, size) \
193({ \
194 union { \
195 __typeof__(*(ptr)) val; \
196 u32 bits[2]; \
197 } __pu_val; \
198 unsigned long __pu_addr; \
199 int __pu_err; \
200 __pu_val.val = (x); \
201 __pu_addr = (unsigned long) (ptr); \
202 switch (size) { \
203 case 1: __put_user_asm("bu"); break; \
204 case 2: __put_user_asm("hu"); break; \
205 case 4: __put_user_asm("" ); break; \
206 case 8: __put_user_asm8(); break; \
207 default: __pu_err = __put_user_unknown(); break; \
208 } \
209 __pu_err; \
210})
211
212#define __put_user_check(x, ptr, size) \
213({ \
214 union { \
215 __typeof__(*(ptr)) val; \
216 u32 bits[2]; \
217 } __pu_val; \
218 unsigned long __pu_addr; \
219 int __pu_err; \
220 __pu_val.val = (x); \
221 __pu_addr = (unsigned long) (ptr); \
222 if (likely(__access_ok(__pu_addr, size))) { \
223 switch (size) { \
224 case 1: __put_user_asm("bu"); break; \
225 case 2: __put_user_asm("hu"); break; \
226 case 4: __put_user_asm("" ); break; \
227 case 8: __put_user_asm8(); break; \
228 default: __pu_err = __put_user_unknown(); break; \
229 } \
230 } \
231 else { \
232 __pu_err = -EFAULT; \
233 } \
234 __pu_err; \
235})
236
237#define __put_user_asm(INSN) \
238({ \
239 asm volatile( \
240 "1:\n" \
241 " mov"INSN" %1,%2\n" \
242 " mov 0,%0\n" \
243 "2:\n" \
244 " .section .fixup,\"ax\"\n" \
245 "3:\n" \
246 " mov %3,%0\n" \
247 " jmp 2b\n" \
248 " .previous\n" \
249 " .section __ex_table,\"a\"\n" \
250 " .balign 4\n" \
251 " .long 1b, 3b\n" \
252 " .previous" \
253 : "=&r" (__pu_err) \
254 : "r" (__pu_val.val), "m" (__m(__pu_addr)), \
255 "i" (-EFAULT) \
256 ); \
257})
258
259#define __put_user_asm8() \
260({ \
261 asm volatile( \
262 "1: mov %1,%3 \n" \
263 "2: mov %2,%4 \n" \
264 " mov 0,%0 \n" \
265 "3: \n" \
266 " .section .fixup,\"ax\" \n" \
267 "4: \n" \
268 " mov %5,%0 \n" \
269 " jmp 2b \n" \
270 " .previous \n" \
271 " .section __ex_table,\"a\"\n" \
272 " .balign 4 \n" \
273 " .long 1b, 4b \n" \
274 " .long 2b, 4b \n" \
275 " .previous \n" \
276 : "=&r" (__pu_err) \
277 : "r" (__pu_val.bits[0]), "r" (__pu_val.bits[1]), \
278 "m" (__m(__pu_addr)), "m" (__m(__pu_addr+4)), \
279 "i" (-EFAULT) \
280 ); \
281})
282
283extern int __put_user_unknown(void);
284
285
286/*
287 * Copy To/From Userspace
288 */
289/* Generic arbitrary sized copy. */
290#define __copy_user(to, from, size) \
291do { \
292 if (size) { \
293 void *__to = to; \
294 const void *__from = from; \
295 int w; \
296 asm volatile( \
297 "0: movbu (%0),%3;\n" \
298 "1: movbu %3,(%1);\n" \
299 " inc %0;\n" \
300 " inc %1;\n" \
301 " add -1,%2;\n" \
302 " bne 0b;\n" \
303 "2:\n" \
304 " .section .fixup,\"ax\"\n" \
305 "3: jmp 2b\n" \
306 " .previous\n" \
307 " .section __ex_table,\"a\"\n" \
308 " .balign 4\n" \
309 " .long 0b,3b\n" \
310 " .long 1b,3b\n" \
311 " .previous\n" \
312 : "=a"(__from), "=a"(__to), "=r"(size), "=&r"(w)\
313 : "0"(__from), "1"(__to), "2"(size) \
314 : "memory"); \
315 } \
316} while (0)
317
318#define __copy_user_zeroing(to, from, size) \
319do { \
320 if (size) { \
321 void *__to = to; \
322 const void *__from = from; \
323 int w; \
324 asm volatile( \
325 "0: movbu (%0),%3;\n" \
326 "1: movbu %3,(%1);\n" \
327 " inc %0;\n" \
328 " inc %1;\n" \
329 " add -1,%2;\n" \
330 " bne 0b;\n" \
331 "2:\n" \
332 " .section .fixup,\"ax\"\n" \
333 "3:\n" \
334 " mov %2,%0\n" \
335 " clr %3\n" \
336 "4: movbu %3,(%1);\n" \
337 " inc %1;\n" \
338 " add -1,%2;\n" \
339 " bne 4b;\n" \
340 " mov %0,%2\n" \
341 " jmp 2b\n" \
342 " .previous\n" \
343 " .section __ex_table,\"a\"\n" \
344 " .balign 4\n" \
345 " .long 0b,3b\n" \
346 " .long 1b,3b\n" \
347 " .previous\n" \
348 : "=a"(__from), "=a"(__to), "=r"(size), "=&r"(w)\
349 : "0"(__from), "1"(__to), "2"(size) \
350 : "memory"); \
351 } \
352} while (0)
353
354/* We let the __ versions of copy_from/to_user inline, because they're often
355 * used in fast paths and have only a small space overhead.
356 */
357static inline
358unsigned long __generic_copy_from_user_nocheck(void *to, const void *from,
359 unsigned long n)
360{
361 __copy_user_zeroing(to, from, n);
362 return n;
363}
364
365static inline
366unsigned long __generic_copy_to_user_nocheck(void *to, const void *from,
367 unsigned long n)
368{
369 __copy_user(to, from, n);
370 return n;
371}
372
373
374#if 0
375#error don't use - these macros don't increment to & from pointers
376/* Optimize just a little bit when we know the size of the move. */
377#define __constant_copy_user(to, from, size) \
378do { \
379 asm volatile( \
380 " mov %0,a0;\n" \
381 "0: movbu (%1),d3;\n" \
382 "1: movbu d3,(%2);\n" \
383 " add -1,a0;\n" \
384 " bne 0b;\n" \
385 "2:;" \
386 ".section .fixup,\"ax\"\n" \
387 "3: jmp 2b\n" \
388 ".previous\n" \
389 ".section __ex_table,\"a\"\n" \
390 " .balign 4\n" \
391 " .long 0b,3b\n" \
392 " .long 1b,3b\n" \
393 ".previous" \
394 : \
395 : "d"(size), "d"(to), "d"(from) \
396 : "d3", "a0"); \
397} while (0)
398
399/* Optimize just a little bit when we know the size of the move. */
400#define __constant_copy_user_zeroing(to, from, size) \
401do { \
402 asm volatile( \
403 " mov %0,a0;\n" \
404 "0: movbu (%1),d3;\n" \
405 "1: movbu d3,(%2);\n" \
406 " add -1,a0;\n" \
407 " bne 0b;\n" \
408 "2:;" \
409 ".section .fixup,\"ax\"\n" \
410 "3: jmp 2b\n" \
411 ".previous\n" \
412 ".section __ex_table,\"a\"\n" \
413 " .balign 4\n" \
414 " .long 0b,3b\n" \
415 " .long 1b,3b\n" \
416 ".previous" \
417 : \
418 : "d"(size), "d"(to), "d"(from) \
419 : "d3", "a0"); \
420} while (0)
421
422static inline
423unsigned long __constant_copy_to_user(void *to, const void *from,
424 unsigned long n)
425{
426 if (access_ok(VERIFY_WRITE, to, n))
427 __constant_copy_user(to, from, n);
428 return n;
429}
430
431static inline
432unsigned long __constant_copy_from_user(void *to, const void *from,
433 unsigned long n)
434{
435 if (access_ok(VERIFY_READ, from, n))
436 __constant_copy_user_zeroing(to, from, n);
437 return n;
438}
439
440static inline
441unsigned long __constant_copy_to_user_nocheck(void *to, const void *from,
442 unsigned long n)
443{
444 __constant_copy_user(to, from, n);
445 return n;
446}
447
448static inline
449unsigned long __constant_copy_from_user_nocheck(void *to, const void *from,
450 unsigned long n)
451{
452 __constant_copy_user_zeroing(to, from, n);
453 return n;
454}
455#endif
456
457extern unsigned long __generic_copy_to_user(void __user *, const void *,
458 unsigned long);
459extern unsigned long __generic_copy_from_user(void *, const void __user *,
460 unsigned long);
461
462#define __copy_to_user_inatomic(to, from, n) \
463 __generic_copy_to_user_nocheck((to), (from), (n))
464#define __copy_from_user_inatomic(to, from, n) \
465 __generic_copy_from_user_nocheck((to), (from), (n))
466
467#define __copy_to_user(to, from, n) \
468({ \
469 might_sleep(); \
470 __copy_to_user_inatomic((to), (from), (n)); \
471})
472
473#define __copy_from_user(to, from, n) \
474({ \
475 might_sleep(); \
476 __copy_from_user_inatomic((to), (from), (n)); \
477})
478
479
480#define copy_to_user(to, from, n) __generic_copy_to_user((to), (from), (n))
481#define copy_from_user(to, from, n) __generic_copy_from_user((to), (from), (n))
482
483extern long strncpy_from_user(char *dst, const char __user *src, long count);
484extern long __strncpy_from_user(char *dst, const char __user *src, long count);
485extern long strnlen_user(const char __user *str, long n);
486#define strlen_user(str) strnlen_user(str, ~0UL >> 1)
487extern unsigned long clear_user(void __user *mem, unsigned long len);
488extern unsigned long __clear_user(void __user *mem, unsigned long len);
489
490#endif /* _ASM_UACCESS_H */
diff --git a/include/asm-mn10300/ucontext.h b/include/asm-mn10300/ucontext.h
new file mode 100644
index 000000000000..fcab5c1d8e18
--- /dev/null
+++ b/include/asm-mn10300/ucontext.h
@@ -0,0 +1,22 @@
1/* MN10300 User context
2 *
3 * Copyright (C) 2007 Matsushita Electric Industrial Co., Ltd.
4 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_UCONTEXT_H
12#define _ASM_UCONTEXT_H
13
14struct ucontext {
15 unsigned long uc_flags;
16 struct ucontext *uc_link;
17 stack_t uc_stack;
18 struct sigcontext uc_mcontext;
19 sigset_t uc_sigmask; /* mask last for extensibility */
20};
21
22#endif /* _ASM_UCONTEXT_H */
diff --git a/include/asm-mn10300/unaligned.h b/include/asm-mn10300/unaligned.h
new file mode 100644
index 000000000000..cad3afbd035f
--- /dev/null
+++ b/include/asm-mn10300/unaligned.h
@@ -0,0 +1,136 @@
1/* MN10300 Unaligned memory access handling
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_UNALIGNED_H
12#define _ASM_UNALIGNED_H
13
14#include <asm/types.h>
15
16#if 0
17extern int __bug_unaligned_x(void *ptr);
18
19/*
20 * What is the most efficient way of loading/storing an unaligned value?
21 *
22 * That is the subject of this file. Efficiency here is defined as
23 * minimum code size with minimum register usage for the common cases.
24 * It is currently not believed that long longs are common, so we
25 * trade efficiency for the chars, shorts and longs against the long
26 * longs.
27 *
28 * Current stats with gcc 2.7.2.2 for these functions:
29 *
30 * ptrsize get: code regs put: code regs
31 * 1 1 1 1 2
32 * 2 3 2 3 2
33 * 4 7 3 7 3
34 * 8 20 6 16 6
35 *
36 * gcc 2.95.1 seems to code differently:
37 *
38 * ptrsize get: code regs put: code regs
39 * 1 1 1 1 2
40 * 2 3 2 3 2
41 * 4 7 4 7 4
42 * 8 19 8 15 6
43 *
44 * which may or may not be more efficient (depending upon whether
45 * you can afford the extra registers). Hopefully the gcc 2.95
46 * is inteligent enough to decide if it is better to use the
47 * extra register, but evidence so far seems to suggest otherwise.
48 *
49 * Unfortunately, gcc is not able to optimise the high word
50 * out of long long >> 32, or the low word from long long << 32
51 */
52
53#define __get_unaligned_2(__p) \
54 (__p[0] | __p[1] << 8)
55
56#define __get_unaligned_4(__p) \
57 (__p[0] | __p[1] << 8 | __p[2] << 16 | __p[3] << 24)
58
59#define get_unaligned(ptr) \
60({ \
61 unsigned int __v1, __v2; \
62 __typeof__(*(ptr)) __v; \
63 __u8 *__p = (__u8 *)(ptr); \
64 \
65 switch (sizeof(*(ptr))) { \
66 case 1: __v = *(ptr); break; \
67 case 2: __v = __get_unaligned_2(__p); break; \
68 case 4: __v = __get_unaligned_4(__p); break; \
69 case 8: \
70 __v2 = __get_unaligned_4((__p+4)); \
71 __v1 = __get_unaligned_4(__p); \
72 __v = ((unsigned long long)__v2 << 32 | __v1); \
73 break; \
74 default: __v = __bug_unaligned_x(__p); break; \
75 } \
76 __v; \
77})
78
79
80static inline void __put_unaligned_2(__u32 __v, register __u8 *__p)
81{
82 *__p++ = __v;
83 *__p++ = __v >> 8;
84}
85
86static inline void __put_unaligned_4(__u32 __v, register __u8 *__p)
87{
88 __put_unaligned_2(__v >> 16, __p + 2);
89 __put_unaligned_2(__v, __p);
90}
91
92static inline void __put_unaligned_8(const unsigned long long __v, __u8 *__p)
93{
94 /*
95 * tradeoff: 8 bytes of stack for all unaligned puts (2
96 * instructions), or an extra register in the long long
97 * case - go for the extra register.
98 */
99 __put_unaligned_4(__v >> 32, __p + 4);
100 __put_unaligned_4(__v, __p);
101}
102
103/*
104 * Try to store an unaligned value as efficiently as possible.
105 */
106#define put_unaligned(val, ptr) \
107 ({ \
108 switch (sizeof(*(ptr))) { \
109 case 1: \
110 *(ptr) = (val); \
111 break; \
112 case 2: \
113 __put_unaligned_2((val), (__u8 *)(ptr)); \
114 break; \
115 case 4: \
116 __put_unaligned_4((val), (__u8 *)(ptr)); \
117 break; \
118 case 8: \
119 __put_unaligned_8((val), (__u8 *)(ptr)); \
120 break; \
121 default: \
122 __bug_unaligned_x(ptr); \
123 break; \
124 } \
125 (void) 0; \
126 })
127
128
129#else
130
131#define get_unaligned(ptr) (*(ptr))
132#define put_unaligned(val, ptr) ({ *(ptr) = (val); (void) 0; })
133
134#endif
135
136#endif
diff --git a/include/asm-mn10300/unistd.h b/include/asm-mn10300/unistd.h
new file mode 100644
index 000000000000..3721aa9e195d
--- /dev/null
+++ b/include/asm-mn10300/unistd.h
@@ -0,0 +1,384 @@
1/* MN10300 System call number list
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_UNISTD_H
12#define _ASM_UNISTD_H
13
14#define __NR_restart_syscall 0
15#define __NR_exit 1
16#define __NR_fork 2
17#define __NR_read 3
18#define __NR_write 4
19#define __NR_open 5
20#define __NR_close 6
21#define __NR_waitpid 7
22#define __NR_creat 8
23#define __NR_link 9
24#define __NR_unlink 10
25#define __NR_execve 11
26#define __NR_chdir 12
27#define __NR_time 13
28#define __NR_mknod 14
29#define __NR_chmod 15
30#define __NR_lchown 16
31#define __NR_break 17
32#define __NR_oldstat 18
33#define __NR_lseek 19
34#define __NR_getpid 20
35#define __NR_mount 21
36#define __NR_umount 22
37#define __NR_setuid 23
38#define __NR_getuid 24
39#define __NR_stime 25
40#define __NR_ptrace 26
41#define __NR_alarm 27
42#define __NR_oldfstat 28
43#define __NR_pause 29
44#define __NR_utime 30
45#define __NR_stty 31
46#define __NR_gtty 32
47#define __NR_access 33
48#define __NR_nice 34
49#define __NR_ftime 35
50#define __NR_sync 36
51#define __NR_kill 37
52#define __NR_rename 38
53#define __NR_mkdir 39
54#define __NR_rmdir 40
55#define __NR_dup 41
56#define __NR_pipe 42
57#define __NR_times 43
58#define __NR_prof 44
59#define __NR_brk 45
60#define __NR_setgid 46
61#define __NR_getgid 47
62#define __NR_signal 48
63#define __NR_geteuid 49
64#define __NR_getegid 50
65#define __NR_acct 51
66#define __NR_umount2 52
67#define __NR_lock 53
68#define __NR_ioctl 54
69#define __NR_fcntl 55
70#define __NR_mpx 56
71#define __NR_setpgid 57
72#define __NR_ulimit 58
73#define __NR_oldolduname 59
74#define __NR_umask 60
75#define __NR_chroot 61
76#define __NR_ustat 62
77#define __NR_dup2 63
78#define __NR_getppid 64
79#define __NR_getpgrp 65
80#define __NR_setsid 66
81#define __NR_sigaction 67
82#define __NR_sgetmask 68
83#define __NR_ssetmask 69
84#define __NR_setreuid 70
85#define __NR_setregid 71
86#define __NR_sigsuspend 72
87#define __NR_sigpending 73
88#define __NR_sethostname 74
89#define __NR_setrlimit 75
90#define __NR_getrlimit 76 /* Back compatible 2Gig limited rlimit */
91#define __NR_getrusage 77
92#define __NR_gettimeofday 78
93#define __NR_settimeofday 79
94#define __NR_getgroups 80
95#define __NR_setgroups 81
96#define __NR_select 82
97#define __NR_symlink 83
98#define __NR_oldlstat 84
99#define __NR_readlink 85
100#define __NR_uselib 86
101#define __NR_swapon 87
102#define __NR_reboot 88
103#define __NR_readdir 89
104#define __NR_mmap 90
105#define __NR_munmap 91
106#define __NR_truncate 92
107#define __NR_ftruncate 93
108#define __NR_fchmod 94
109#define __NR_fchown 95
110#define __NR_getpriority 96
111#define __NR_setpriority 97
112#define __NR_profil 98
113#define __NR_statfs 99
114#define __NR_fstatfs 100
115#define __NR_ioperm 101
116#define __NR_socketcall 102
117#define __NR_syslog 103
118#define __NR_setitimer 104
119#define __NR_getitimer 105
120#define __NR_stat 106
121#define __NR_lstat 107
122#define __NR_fstat 108
123#define __NR_olduname 109
124#define __NR_iopl 110
125#define __NR_vhangup 111
126#define __NR_idle 112
127#define __NR_vm86old 113
128#define __NR_wait4 114
129#define __NR_swapoff 115
130#define __NR_sysinfo 116
131#define __NR_ipc 117
132#define __NR_fsync 118
133#define __NR_sigreturn 119
134#define __NR_clone 120
135#define __NR_setdomainname 121
136#define __NR_uname 122
137#define __NR_modify_ldt 123
138#define __NR_adjtimex 124
139#define __NR_mprotect 125
140#define __NR_sigprocmask 126
141#define __NR_create_module 127
142#define __NR_init_module 128
143#define __NR_delete_module 129
144#define __NR_get_kernel_syms 130
145#define __NR_quotactl 131
146#define __NR_getpgid 132
147#define __NR_fchdir 133
148#define __NR_bdflush 134
149#define __NR_sysfs 135
150#define __NR_personality 136
151#define __NR_afs_syscall 137 /* Syscall for Andrew File System */
152#define __NR_setfsuid 138
153#define __NR_setfsgid 139
154#define __NR__llseek 140
155#define __NR_getdents 141
156#define __NR__newselect 142
157#define __NR_flock 143
158#define __NR_msync 144
159#define __NR_readv 145
160#define __NR_writev 146
161#define __NR_getsid 147
162#define __NR_fdatasync 148
163#define __NR__sysctl 149
164#define __NR_mlock 150
165#define __NR_munlock 151
166#define __NR_mlockall 152
167#define __NR_munlockall 153
168#define __NR_sched_setparam 154
169#define __NR_sched_getparam 155
170#define __NR_sched_setscheduler 156
171#define __NR_sched_getscheduler 157
172#define __NR_sched_yield 158
173#define __NR_sched_get_priority_max 159
174#define __NR_sched_get_priority_min 160
175#define __NR_sched_rr_get_interval 161
176#define __NR_nanosleep 162
177#define __NR_mremap 163
178#define __NR_setresuid 164
179#define __NR_getresuid 165
180#define __NR_vm86 166
181#define __NR_query_module 167
182#define __NR_poll 168
183#define __NR_nfsservctl 169
184#define __NR_setresgid 170
185#define __NR_getresgid 171
186#define __NR_prctl 172
187#define __NR_rt_sigreturn 173
188#define __NR_rt_sigaction 174
189#define __NR_rt_sigprocmask 175
190#define __NR_rt_sigpending 176
191#define __NR_rt_sigtimedwait 177
192#define __NR_rt_sigqueueinfo 178
193#define __NR_rt_sigsuspend 179
194#define __NR_pread64 180
195#define __NR_pwrite64 181
196#define __NR_chown 182
197#define __NR_getcwd 183
198#define __NR_capget 184
199#define __NR_capset 185
200#define __NR_sigaltstack 186
201#define __NR_sendfile 187
202#define __NR_getpmsg 188 /* some people actually want streams */
203#define __NR_putpmsg 189 /* some people actually want streams */
204#define __NR_vfork 190
205#define __NR_ugetrlimit 191 /* SuS compliant getrlimit */
206#define __NR_mmap2 192
207#define __NR_truncate64 193
208#define __NR_ftruncate64 194
209#define __NR_stat64 195
210#define __NR_lstat64 196
211#define __NR_fstat64 197
212#define __NR_lchown32 198
213#define __NR_getuid32 199
214#define __NR_getgid32 200
215#define __NR_geteuid32 201
216#define __NR_getegid32 202
217#define __NR_setreuid32 203
218#define __NR_setregid32 204
219#define __NR_getgroups32 205
220#define __NR_setgroups32 206
221#define __NR_fchown32 207
222#define __NR_setresuid32 208
223#define __NR_getresuid32 209
224#define __NR_setresgid32 210
225#define __NR_getresgid32 211
226#define __NR_chown32 212
227#define __NR_setuid32 213
228#define __NR_setgid32 214
229#define __NR_setfsuid32 215
230#define __NR_setfsgid32 216
231#define __NR_pivot_root 217
232#define __NR_mincore 218
233#define __NR_madvise 219
234#define __NR_madvise1 219 /* delete when C lib stub is removed */
235#define __NR_getdents64 220
236#define __NR_fcntl64 221
237/* 223 is unused */
238#define __NR_gettid 224
239#define __NR_readahead 225
240#define __NR_setxattr 226
241#define __NR_lsetxattr 227
242#define __NR_fsetxattr 228
243#define __NR_getxattr 229
244#define __NR_lgetxattr 230
245#define __NR_fgetxattr 231
246#define __NR_listxattr 232
247#define __NR_llistxattr 233
248#define __NR_flistxattr 234
249#define __NR_removexattr 235
250#define __NR_lremovexattr 236
251#define __NR_fremovexattr 237
252#define __NR_tkill 238
253#define __NR_sendfile64 239
254#define __NR_futex 240
255#define __NR_sched_setaffinity 241
256#define __NR_sched_getaffinity 242
257#define __NR_set_thread_area 243
258#define __NR_get_thread_area 244
259#define __NR_io_setup 245
260#define __NR_io_destroy 246
261#define __NR_io_getevents 247
262#define __NR_io_submit 248
263#define __NR_io_cancel 249
264#define __NR_fadvise64 250
265
266#define __NR_exit_group 252
267#define __NR_lookup_dcookie 253
268#define __NR_epoll_create 254
269#define __NR_epoll_ctl 255
270#define __NR_epoll_wait 256
271#define __NR_remap_file_pages 257
272#define __NR_set_tid_address 258
273#define __NR_timer_create 259
274#define __NR_timer_settime (__NR_timer_create+1)
275#define __NR_timer_gettime (__NR_timer_create+2)
276#define __NR_timer_getoverrun (__NR_timer_create+3)
277#define __NR_timer_delete (__NR_timer_create+4)
278#define __NR_clock_settime (__NR_timer_create+5)
279#define __NR_clock_gettime (__NR_timer_create+6)
280#define __NR_clock_getres (__NR_timer_create+7)
281#define __NR_clock_nanosleep (__NR_timer_create+8)
282#define __NR_statfs64 268
283#define __NR_fstatfs64 269
284#define __NR_tgkill 270
285#define __NR_utimes 271
286#define __NR_fadvise64_64 272
287#define __NR_vserver 273
288#define __NR_mbind 274
289#define __NR_get_mempolicy 275
290#define __NR_set_mempolicy 276
291#define __NR_mq_open 277
292#define __NR_mq_unlink (__NR_mq_open+1)
293#define __NR_mq_timedsend (__NR_mq_open+2)
294#define __NR_mq_timedreceive (__NR_mq_open+3)
295#define __NR_mq_notify (__NR_mq_open+4)
296#define __NR_mq_getsetattr (__NR_mq_open+5)
297#define __NR_kexec_load 283
298#define __NR_waitid 284
299#define __NR_add_key 286
300#define __NR_request_key 287
301#define __NR_keyctl 288
302#define __NR_cacheflush 289
303#define __NR_ioprio_set 290
304#define __NR_ioprio_get 291
305#define __NR_inotify_init 292
306#define __NR_inotify_add_watch 293
307#define __NR_inotify_rm_watch 294
308#define __NR_migrate_pages 295
309#define __NR_openat 296
310#define __NR_mkdirat 297
311#define __NR_mknodat 298
312#define __NR_fchownat 299
313#define __NR_futimesat 300
314#define __NR_fstatat64 301
315#define __NR_unlinkat 302
316#define __NR_renameat 303
317#define __NR_linkat 304
318#define __NR_symlinkat 305
319#define __NR_readlinkat 306
320#define __NR_fchmodat 307
321#define __NR_faccessat 308
322#define __NR_pselect6 309
323#define __NR_ppoll 310
324#define __NR_unshare 311
325#define __NR_set_robust_list 312
326#define __NR_get_robust_list 313
327#define __NR_splice 314
328#define __NR_sync_file_range 315
329#define __NR_tee 316
330#define __NR_vmsplice 317
331#define __NR_move_pages 318
332#define __NR_getcpu 319
333#define __NR_epoll_pwait 320
334#define __NR_utimensat 321
335#define __NR_signalfd 322
336#define __NR_timerfd_create 323
337#define __NR_eventfd 324
338#define __NR_fallocate 325
339#define __NR_timerfd_settime 326
340#define __NR_timerfd_gettime 327
341
342#ifdef __KERNEL__
343
344#define NR_syscalls 326
345
346/*
347 * specify the deprecated syscalls we want to support on this arch
348 */
349#define __ARCH_WANT_IPC_PARSE_VERSION
350#define __ARCH_WANT_OLD_READDIR
351#define __ARCH_WANT_OLD_STAT
352#define __ARCH_WANT_STAT64
353#define __ARCH_WANT_SYS_ALARM
354#define __ARCH_WANT_SYS_GETHOSTNAME
355#define __ARCH_WANT_SYS_PAUSE
356#define __ARCH_WANT_SYS_SGETMASK
357#define __ARCH_WANT_SYS_SIGNAL
358#define __ARCH_WANT_SYS_TIME
359#define __ARCH_WANT_SYS_UTIME
360#define __ARCH_WANT_SYS_WAITPID
361#define __ARCH_WANT_SYS_SOCKETCALL
362#define __ARCH_WANT_SYS_FADVISE64
363#define __ARCH_WANT_SYS_GETPGRP
364#define __ARCH_WANT_SYS_LLSEEK
365#define __ARCH_WANT_SYS_NICE
366#define __ARCH_WANT_SYS_OLD_GETRLIMIT
367#define __ARCH_WANT_SYS_OLDUMOUNT
368#define __ARCH_WANT_SYS_SIGPENDING
369#define __ARCH_WANT_SYS_SIGPROCMASK
370#define __ARCH_WANT_SYS_RT_SIGACTION
371#define __ARCH_WANT_SYS_RT_SIGSUSPEND
372
373/*
374 * "Conditional" syscalls
375 *
376 * What we want is __attribute__((weak,alias("sys_ni_syscall"))),
377 * but it doesn't work on all toolchains, so we just do it by hand
378 */
379#ifndef cond_syscall
380#define cond_syscall(x) asm(".weak\t" #x "\n\t.set\t" #x ",sys_ni_syscall");
381#endif
382
383#endif /* __KERNEL__ */
384#endif /* _ASM_UNISTD_H */
diff --git a/include/asm-mn10300/unit-asb2303/clock.h b/include/asm-mn10300/unit-asb2303/clock.h
new file mode 100644
index 000000000000..8b450e920af1
--- /dev/null
+++ b/include/asm-mn10300/unit-asb2303/clock.h
@@ -0,0 +1,45 @@
1/* ASB2303-specific clocks
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11
12#ifndef _ASM_UNIT_CLOCK_H
13#define _ASM_UNIT_CLOCK_H
14
15#ifndef __ASSEMBLY__
16
17#ifdef CONFIG_MN10300_RTC
18
19extern unsigned long mn10300_ioclk; /* IOCLK (crystal speed) in HZ */
20extern unsigned long mn10300_iobclk;
21extern unsigned long mn10300_tsc_per_HZ;
22
23#define MN10300_IOCLK ((unsigned long)mn10300_ioclk)
24/* If this processors has a another clock, uncomment the below. */
25/* #define MN10300_IOBCLK ((unsigned long)mn10300_iobclk) */
26
27#else /* !CONFIG_MN10300_RTC */
28
29#define MN10300_IOCLK 33333333UL
30/* #define MN10300_IOBCLK 66666666UL */
31
32#endif /* !CONFIG_MN10300_RTC */
33
34#define MN10300_JCCLK MN10300_IOCLK
35#define MN10300_TSCCLK MN10300_IOCLK
36
37#ifdef CONFIG_MN10300_RTC
38#define MN10300_TSC_PER_HZ ((unsigned long)mn10300_tsc_per_HZ)
39#else /* !CONFIG_MN10300_RTC */
40#define MN10300_TSC_PER_HZ (MN10300_TSCCLK/HZ)
41#endif /* !CONFIG_MN10300_RTC */
42
43#endif /* !__ASSEMBLY__ */
44
45#endif /* _ASM_UNIT_CLOCK_H */
diff --git a/include/asm-mn10300/unit-asb2303/leds.h b/include/asm-mn10300/unit-asb2303/leds.h
new file mode 100644
index 000000000000..3a7543ea7b5c
--- /dev/null
+++ b/include/asm-mn10300/unit-asb2303/leds.h
@@ -0,0 +1,43 @@
1/* ASB2303-specific LEDs
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11
12#ifndef _ASM_UNIT_LEDS_H
13#define _ASM_UNIT_LEDS_H
14
15#include <asm/pio-regs.h>
16#include <asm/cpu-regs.h>
17#include <asm/exceptions.h>
18
19#define ASB2303_GPIO0DEF __SYSREG(0xDB000000, u32)
20#define ASB2303_7SEGLEDS __SYSREG(0xDB000008, u32)
21
22/*
23 * use the 7-segment LEDs to indicate states
24 */
25
26/* flip the 7-segment LEDs between "G" and "-" */
27#define mn10300_set_gdbleds(ONOFF) \
28do { \
29 ASB2303_7SEGLEDS = (ONOFF) ? 0x85 : 0x7f; \
30} while (0)
31
32/* indicate double-fault by displaying "d" on the LEDs */
33#define mn10300_set_dbfleds \
34 mov 0x43,d0 ; \
35 movbu d0,(ASB2303_7SEGLEDS)
36
37#ifndef __ASSEMBLY__
38extern void peripheral_leds_display_exception(enum exception_code code);
39extern void peripheral_leds_led_chase(void);
40extern void debug_to_serial(const char *p, int n);
41#endif /* __ASSEMBLY__ */
42
43#endif /* _ASM_UNIT_LEDS_H */
diff --git a/include/asm-mn10300/unit-asb2303/serial.h b/include/asm-mn10300/unit-asb2303/serial.h
new file mode 100644
index 000000000000..0d55cf5896ac
--- /dev/null
+++ b/include/asm-mn10300/unit-asb2303/serial.h
@@ -0,0 +1,136 @@
1/* ASB2303-specific 8250 serial ports
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11
12#ifndef _ASM_UNIT_SERIAL_H
13#define _ASM_UNIT_SERIAL_H
14
15#include <asm/cpu-regs.h>
16#include <asm/proc/irq.h>
17#include <linux/serial_reg.h>
18
19#define SERIAL_PORT0_BASE_ADDRESS 0xA6FB0000
20#define SERIAL_PORT1_BASE_ADDRESS 0xA6FC0000
21
22#define SERIAL_IRQ XIRQ0 /* Dual serial (PC16552) (Hi) */
23
24/*
25 * dispose of the /dev/ttyS0 and /dev/ttyS1 serial ports
26 */
27#ifndef CONFIG_GDBSTUB_ON_TTYSx
28
29#define SERIAL_PORT_DFNS \
30 { \
31 .baud_base = BASE_BAUD, \
32 .irq = SERIAL_IRQ, \
33 .flags = STD_COM_FLAGS, \
34 .iomem_base = (u8 *) SERIAL_PORT0_BASE_ADDRESS, \
35 .iomem_reg_shift = 2, \
36 .io_type = SERIAL_IO_MEM, \
37 }, \
38 { \
39 .baud_base = BASE_BAUD, \
40 .irq = SERIAL_IRQ, \
41 .flags = STD_COM_FLAGS, \
42 .iomem_base = (u8 *) SERIAL_PORT1_BASE_ADDRESS, \
43 .iomem_reg_shift = 2, \
44 .io_type = SERIAL_IO_MEM, \
45 },
46
47#ifndef __ASSEMBLY__
48
49static inline void __debug_to_serial(const char *p, int n)
50{
51}
52
53#endif /* !__ASSEMBLY__ */
54
55#else /* CONFIG_GDBSTUB_ON_TTYSx */
56
57#define SERIAL_PORT_DFNS /* both stolen by gdb-stub because they share an IRQ */
58
59#if defined(CONFIG_GDBSTUB_ON_TTYS0)
60#define GDBPORT_SERIAL_RX __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_RX * 4, u8)
61#define GDBPORT_SERIAL_TX __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_TX * 4, u8)
62#define GDBPORT_SERIAL_DLL __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_DLL * 4, u8)
63#define GDBPORT_SERIAL_DLM __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_DLM * 4, u8)
64#define GDBPORT_SERIAL_IER __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_IER * 4, u8)
65#define GDBPORT_SERIAL_IIR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_IIR * 4, u8)
66#define GDBPORT_SERIAL_FCR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_FCR * 4, u8)
67#define GDBPORT_SERIAL_LCR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_LCR * 4, u8)
68#define GDBPORT_SERIAL_MCR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_MCR * 4, u8)
69#define GDBPORT_SERIAL_LSR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_LSR * 4, u8)
70#define GDBPORT_SERIAL_MSR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_MSR * 4, u8)
71#define GDBPORT_SERIAL_SCR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_SCR * 4, u8)
72#define GDBPORT_SERIAL_IRQ SERIAL_IRQ
73
74#elif defined(CONFIG_GDBSTUB_ON_TTYS1)
75#define GDBPORT_SERIAL_RX __SYSREG(SERIAL_PORT1_BASE_ADDRESS + UART_RX * 4, u8)
76#define GDBPORT_SERIAL_TX __SYSREG(SERIAL_PORT1_BASE_ADDRESS + UART_TX * 4, u8)
77#define GDBPORT_SERIAL_DLL __SYSREG(SERIAL_PORT1_BASE_ADDRESS + UART_DLL * 4, u8)
78#define GDBPORT_SERIAL_DLM __SYSREG(SERIAL_PORT1_BASE_ADDRESS + UART_DLM * 4, u8)
79#define GDBPORT_SERIAL_IER __SYSREG(SERIAL_PORT1_BASE_ADDRESS + UART_IER * 4, u8)
80#define GDBPORT_SERIAL_IIR __SYSREG(SERIAL_PORT1_BASE_ADDRESS + UART_IIR * 4, u8)
81#define GDBPORT_SERIAL_FCR __SYSREG(SERIAL_PORT1_BASE_ADDRESS + UART_FCR * 4, u8)
82#define GDBPORT_SERIAL_LCR __SYSREG(SERIAL_PORT1_BASE_ADDRESS + UART_LCR * 4, u8)
83#define GDBPORT_SERIAL_MCR __SYSREG(SERIAL_PORT1_BASE_ADDRESS + UART_MCR * 4, u8)
84#define GDBPORT_SERIAL_LSR __SYSREG(SERIAL_PORT1_BASE_ADDRESS + UART_LSR * 4, u8)
85#define GDBPORT_SERIAL_MSR __SYSREG(SERIAL_PORT1_BASE_ADDRESS + UART_MSR * 4, u8)
86#define GDBPORT_SERIAL_SCR __SYSREG(SERIAL_PORT1_BASE_ADDRESS + UART_SCR * 4, u8)
87#define GDBPORT_SERIAL_IRQ SERIAL_IRQ
88#endif
89
90#ifndef __ASSEMBLY__
91
92#define LSR_WAIT_FOR(STATE) \
93do { \
94 while (!(GDBPORT_SERIAL_LSR & UART_LSR_##STATE)) {} \
95} while (0)
96#define FLOWCTL_WAIT_FOR(LINE) \
97do { \
98 while (!(GDBPORT_SERIAL_MSR & UART_MSR_##LINE)) {} \
99} while (0)
100#define FLOWCTL_CLEAR(LINE) \
101do { \
102 GDBPORT_SERIAL_MCR &= ~UART_MCR_##LINE; \
103} while (0)
104#define FLOWCTL_SET(LINE) \
105do { \
106 GDBPORT_SERIAL_MCR |= UART_MCR_##LINE; \
107} while (0)
108#define FLOWCTL_QUERY(LINE) ({ GDBPORT_SERIAL_MSR & UART_MSR_##LINE; })
109
110static inline void __debug_to_serial(const char *p, int n)
111{
112 char ch;
113
114 FLOWCTL_SET(DTR);
115
116 for (; n > 0; n--) {
117 LSR_WAIT_FOR(THRE);
118 FLOWCTL_WAIT_FOR(CTS);
119
120 ch = *p++;
121 if (ch == 0x0a) {
122 GDBPORT_SERIAL_TX = 0x0d;
123 LSR_WAIT_FOR(THRE);
124 FLOWCTL_WAIT_FOR(CTS);
125 }
126 GDBPORT_SERIAL_TX = ch;
127 }
128
129 FLOWCTL_CLEAR(DTR);
130}
131
132#endif /* !__ASSEMBLY__ */
133
134#endif /* CONFIG_GDBSTUB_ON_TTYSx */
135
136#endif /* _ASM_UNIT_SERIAL_H */
diff --git a/include/asm-mn10300/unit-asb2303/smc91111.h b/include/asm-mn10300/unit-asb2303/smc91111.h
new file mode 100644
index 000000000000..dd456e9c513f
--- /dev/null
+++ b/include/asm-mn10300/unit-asb2303/smc91111.h
@@ -0,0 +1,50 @@
1/* Support for the SMC91C111 NIC on an ASB2303
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_UNIT_SMC91111_H
12#define _ASM_UNIT_SMC91111_H
13
14#include <asm/intctl-regs.h>
15
16#define SMC91111_BASE 0xAA000300UL
17#define SMC91111_BASE_END 0xAA000400UL
18#define SMC91111_IRQ XIRQ3
19
20#define SMC_CAN_USE_8BIT 0
21#define SMC_CAN_USE_16BIT 1
22#define SMC_CAN_USE_32BIT 0
23#define SMC_NOWAIT 1
24#define SMC_IRQ_FLAGS (0)
25
26#if SMC_CAN_USE_8BIT
27#define SMC_inb(a, r) inb((unsigned long) ((a) + (r)))
28#define SMC_outb(v, a, r) outb(v, (unsigned long) ((a) + (r)))
29#endif
30
31#if SMC_CAN_USE_16BIT
32#define SMC_inw(a, r) inw((unsigned long) ((a) + (r)))
33#define SMC_outw(v, a, r) outw(v, (unsigned long) ((a) + (r)))
34#define SMC_insw(a, r, p, l) insw((unsigned long) ((a) + (r)), (p), (l))
35#define SMC_outsw(a, r, p, l) outsw((unsigned long) ((a) + (r)), (p), (l))
36#endif
37
38#if SMC_CAN_USE_32BIT
39#define SMC_inl(a, r) inl((unsigned long) ((a) + (r)))
40#define SMC_outl(v, a, r) outl(v, (unsigned long) ((a) + (r)))
41#define SMC_insl(a, r, p, l) insl((unsigned long) ((a) + (r)), (p), (l))
42#define SMC_outsl(a, r, p, l) outsl((unsigned long) ((a) + (r)), (p), (l))
43#endif
44
45#define RPC_LSA_DEFAULT RPC_LED_100_10
46#define RPC_LSB_DEFAULT RPC_LED_TX_RX
47
48#define set_irq_type(irq, type)
49
50#endif /* _ASM_UNIT_SMC91111_H */
diff --git a/include/asm-mn10300/unit-asb2303/timex.h b/include/asm-mn10300/unit-asb2303/timex.h
new file mode 100644
index 000000000000..7e54b0cfdd03
--- /dev/null
+++ b/include/asm-mn10300/unit-asb2303/timex.h
@@ -0,0 +1,135 @@
1/* ASB2303-specific timer specifcations
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_UNIT_TIMEX_H
12#define _ASM_UNIT_TIMEX_H
13
14#ifndef __ASSEMBLY__
15#include <linux/irq.h>
16#endif /* __ASSEMBLY__ */
17
18#include <asm/timer-regs.h>
19#include <asm/unit/clock.h>
20
21/*
22 * jiffies counter specifications
23 */
24
25#define TMJCBR_MAX 0xffff
26#define TMJCBC TM01BC
27
28#define TMJCMD TM01MD
29#define TMJCBR TM01BR
30#define TMJCIRQ TM1IRQ
31#define TMJCICR TM1ICR
32#define TMJCICR_LEVEL GxICR_LEVEL_5
33
34#ifndef __ASSEMBLY__
35
36static inline void startup_jiffies_counter(void)
37{
38 unsigned rate;
39 u16 md, t16;
40
41 /* use as little prescaling as possible to avoid losing accuracy */
42 md = TM0MD_SRC_IOCLK;
43 rate = MN10300_JCCLK / HZ;
44
45 if (rate > TMJCBR_MAX) {
46 md = TM0MD_SRC_IOCLK_8;
47 rate = MN10300_JCCLK / 8 / HZ;
48
49 if (rate > TMJCBR_MAX) {
50 md = TM0MD_SRC_IOCLK_32;
51 rate = MN10300_JCCLK / 32 / HZ;
52
53 if (rate > TMJCBR_MAX)
54 BUG();
55 }
56 }
57
58 TMJCBR = rate - 1;
59 t16 = TMJCBR;
60
61 TMJCMD =
62 md |
63 TM1MD_SRC_TM0CASCADE << 8 |
64 TM0MD_INIT_COUNTER |
65 TM1MD_INIT_COUNTER << 8;
66
67 TMJCMD =
68 md |
69 TM1MD_SRC_TM0CASCADE << 8 |
70 TM0MD_COUNT_ENABLE |
71 TM1MD_COUNT_ENABLE << 8;
72
73 t16 = TMJCMD;
74
75 TMJCICR |= GxICR_ENABLE | GxICR_DETECT | GxICR_REQUEST;
76 t16 = TMJCICR;
77}
78
79static inline void shutdown_jiffies_counter(void)
80{
81}
82
83#endif /* !__ASSEMBLY__ */
84
85
86/*
87 * timestamp counter specifications
88 */
89
90#define TMTSCBR_MAX 0xffffffff
91#define TMTSCBC TM45BC
92
93#ifndef __ASSEMBLY__
94
95static inline void startup_timestamp_counter(void)
96{
97 /* set up timer 4 & 5 cascaded as a 32-bit counter to count real time
98 * - count down from 4Gig-1 to 0 and wrap at IOCLK rate
99 */
100 TM45BR = TMTSCBR_MAX;
101
102 TM4MD = TM4MD_SRC_IOCLK;
103 TM4MD |= TM4MD_INIT_COUNTER;
104 TM4MD &= ~TM4MD_INIT_COUNTER;
105 TM4ICR = 0;
106
107 TM5MD = TM5MD_SRC_TM4CASCADE;
108 TM5MD |= TM5MD_INIT_COUNTER;
109 TM5MD &= ~TM5MD_INIT_COUNTER;
110 TM5ICR = 0;
111
112 TM5MD |= TM5MD_COUNT_ENABLE;
113 TM4MD |= TM4MD_COUNT_ENABLE;
114}
115
116static inline void shutdown_timestamp_counter(void)
117{
118 TM4MD = 0;
119 TM5MD = 0;
120}
121
122/*
123 * we use a cascaded pair of 16-bit down-counting timers to count I/O
124 * clock cycles for the purposes of time keeping
125 */
126typedef unsigned long cycles_t;
127
128static inline cycles_t read_timestamp_counter(void)
129{
130 return (cycles_t)TMTSCBC;
131}
132
133#endif /* !__ASSEMBLY__ */
134
135#endif /* _ASM_UNIT_TIMEX_H */
diff --git a/include/asm-mn10300/unit-asb2305/clock.h b/include/asm-mn10300/unit-asb2305/clock.h
new file mode 100644
index 000000000000..7d514841ffda
--- /dev/null
+++ b/include/asm-mn10300/unit-asb2305/clock.h
@@ -0,0 +1,45 @@
1/* ASB2305-specific clocks
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11
12#ifndef _ASM_UNIT_CLOCK_H
13#define _ASM_UNIT_CLOCK_H
14
15#ifndef __ASSEMBLY__
16
17#ifdef CONFIG_MN10300_RTC
18
19extern unsigned long mn10300_ioclk; /* IOCLK (crystal speed) in HZ */
20extern unsigned long mn10300_iobclk;
21extern unsigned long mn10300_tsc_per_HZ;
22
23#define MN10300_IOCLK ((unsigned long)mn10300_ioclk)
24/* If this processors has a another clock, uncomment the below. */
25/* #define MN10300_IOBCLK ((unsigned long)mn10300_iobclk) */
26
27#else /* !CONFIG_MN10300_RTC */
28
29#define MN10300_IOCLK 33333333UL
30/* #define MN10300_IOBCLK 66666666UL */
31
32#endif /* !CONFIG_MN10300_RTC */
33
34#define MN10300_JCCLK MN10300_IOCLK
35#define MN10300_TSCCLK MN10300_IOCLK
36
37#ifdef CONFIG_MN10300_RTC
38#define MN10300_TSC_PER_HZ ((unsigned long)mn10300_tsc_per_HZ)
39#else /* !CONFIG_MN10300_RTC */
40#define MN10300_TSC_PER_HZ (MN10300_TSCCLK/HZ)
41#endif /* !CONFIG_MN10300_RTC */
42
43#endif /* !__ASSEMBLY__ */
44
45#endif /* _ASM_UNIT_CLOCK_H */
diff --git a/include/asm-mn10300/unit-asb2305/leds.h b/include/asm-mn10300/unit-asb2305/leds.h
new file mode 100644
index 000000000000..bc471f617fd1
--- /dev/null
+++ b/include/asm-mn10300/unit-asb2305/leds.h
@@ -0,0 +1,51 @@
1/* ASB2305-specific LEDs
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11
12#ifndef _ASM_UNIT_LEDS_H
13#define _ASM_UNIT_LEDS_H
14
15#include <asm/pio-regs.h>
16#include <asm/cpu-regs.h>
17#include <asm/exceptions.h>
18
19#define ASB2305_7SEGLEDS __SYSREG(0xA6F90000, u32)
20
21/* perform a hard reset by driving PIO06 low */
22#define mn10300_unit_hard_reset() \
23do { \
24 P0OUT &= 0xbf; \
25 P0MD = (P0MD & P0MD_6) | P0MD_6_OUT; \
26} while (0)
27
28/*
29 * use the 7-segment LEDs to indicate states
30 */
31/* indicate double-fault by displaying "db-f" on the LEDs */
32#define mn10300_set_dbfleds \
33 mov 0x43077f1d,d0 ; \
34 mov d0,(ASB2305_7SEGLEDS)
35
36/* flip the 7-segment LEDs between "Gdb-" and "----" */
37#define mn10300_set_gdbleds(ONOFF) \
38do { \
39 ASB2305_7SEGLEDS = (ONOFF) ? 0x8543077f : 0x7f7f7f7f; \
40} while (0)
41
42#ifndef __ASSEMBLY__
43extern void peripheral_leds_display_exception(enum exception_code);
44extern void peripheral_leds_led_chase(void);
45extern void peripheral_leds7x4_display_dec(unsigned int, unsigned int);
46extern void peripheral_leds7x4_display_hex(unsigned int, unsigned int);
47extern void peripheral_leds7x4_display_minssecs(unsigned int, unsigned int);
48extern void peripheral_leds7x4_display_rtc(void);
49#endif /* __ASSEMBLY__ */
50
51#endif /* _ASM_UNIT_LEDS_H */
diff --git a/include/asm-mn10300/unit-asb2305/serial.h b/include/asm-mn10300/unit-asb2305/serial.h
new file mode 100644
index 000000000000..73d31d67bb71
--- /dev/null
+++ b/include/asm-mn10300/unit-asb2305/serial.h
@@ -0,0 +1,120 @@
1/* ASB2305-specific 8250 serial ports
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_UNIT_SERIAL_H
12#define _ASM_UNIT_SERIAL_H
13
14#include <asm/cpu/cpu-regs.h>
15#include <asm/proc/irq.h>
16#include <linux/serial_reg.h>
17
18#define SERIAL_PORT0_BASE_ADDRESS 0xA6FB0000
19#define ASB2305_DEBUG_MCR __SYSREG(0xA6FB0000 + UART_MCR * 2, u8)
20
21#define SERIAL_IRQ XIRQ0 /* Dual serial (PC16552) (Hi) */
22
23/*
24 * dispose of the /dev/ttyS0 serial port
25 */
26#ifndef CONFIG_GDBSTUB_ON_TTYSx
27
28#define SERIAL_PORT_DFNS \
29 { \
30 .baud_base = BASE_BAUD, \
31 .irq = SERIAL_IRQ, \
32 .flags = STD_COM_FLAGS, \
33 .iomem_base = (u8 *) SERIAL_PORT0_BASE_ADDRESS, \
34 .iomem_reg_shift = 2, \
35 .io_type = SERIAL_IO_MEM, \
36 },
37
38#ifndef __ASSEMBLY__
39
40static inline void __debug_to_serial(const char *p, int n)
41{
42}
43
44#endif /* !__ASSEMBLY__ */
45
46#else /* CONFIG_GDBSTUB_ON_TTYSx */
47
48#define SERIAL_PORT_DFNS /* stolen by gdb-stub */
49
50#if defined(CONFIG_GDBSTUB_ON_TTYS0)
51#define GDBPORT_SERIAL_RX __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_RX * 4, u8)
52#define GDBPORT_SERIAL_TX __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_TX * 4, u8)
53#define GDBPORT_SERIAL_DLL __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_DLL * 4, u8)
54#define GDBPORT_SERIAL_DLM __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_DLM * 4, u8)
55#define GDBPORT_SERIAL_IER __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_IER * 4, u8)
56#define GDBPORT_SERIAL_IIR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_IIR * 4, u8)
57#define GDBPORT_SERIAL_FCR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_FCR * 4, u8)
58#define GDBPORT_SERIAL_LCR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_LCR * 4, u8)
59#define GDBPORT_SERIAL_MCR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_MCR * 4, u8)
60#define GDBPORT_SERIAL_LSR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_LSR * 4, u8)
61#define GDBPORT_SERIAL_MSR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_MSR * 4, u8)
62#define GDBPORT_SERIAL_SCR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_SCR * 4, u8)
63#define GDBPORT_SERIAL_IRQ SERIAL_IRQ
64
65#elif defined(CONFIG_GDBSTUB_ON_TTYS1)
66#error The ASB2305 doesnt have a /dev/ttyS1
67#endif
68
69#ifndef __ASSEMBLY__
70
71#define TTYS0_TX __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_TX * 4, u8)
72#define TTYS0_MCR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_MCR * 4, u8)
73#define TTYS0_LSR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_LSR * 4, u8)
74#define TTYS0_MSR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_MSR * 4, u8)
75
76#define LSR_WAIT_FOR(STATE) \
77do { \
78 while (!(TTYS0_LSR & UART_LSR_##STATE)) {} \
79} while (0)
80#define FLOWCTL_WAIT_FOR(LINE) \
81do { \
82 while (!(TTYS0_MSR & UART_MSR_##LINE)) {} \
83} while (0)
84#define FLOWCTL_CLEAR(LINE) \
85do { \
86 TTYS0_MCR &= ~UART_MCR_##LINE; \
87} while (0)
88#define FLOWCTL_SET(LINE) \
89do { \
90 TTYS0_MCR |= UART_MCR_##LINE; \
91} while (0)
92#define FLOWCTL_QUERY(LINE) ({ TTYS0_MSR & UART_MSR_##LINE; })
93
94static inline void __debug_to_serial(const char *p, int n)
95{
96 char ch;
97
98 FLOWCTL_SET(DTR);
99
100 for (; n > 0; n--) {
101 LSR_WAIT_FOR(THRE);
102 FLOWCTL_WAIT_FOR(CTS);
103
104 ch = *p++;
105 if (ch == 0x0a) {
106 TTYS0_TX = 0x0d;
107 LSR_WAIT_FOR(THRE);
108 FLOWCTL_WAIT_FOR(CTS);
109 }
110 TTYS0_TX = ch;
111 }
112
113 FLOWCTL_CLEAR(DTR);
114}
115
116#endif /* !__ASSEMBLY__ */
117
118#endif /* CONFIG_GDBSTUB_ON_TTYSx */
119
120#endif /* _ASM_UNIT_SERIAL_H */
diff --git a/include/asm-mn10300/unit-asb2305/timex.h b/include/asm-mn10300/unit-asb2305/timex.h
new file mode 100644
index 000000000000..10e1bfe34463
--- /dev/null
+++ b/include/asm-mn10300/unit-asb2305/timex.h
@@ -0,0 +1,135 @@
1/* ASB2305 timer specifcations
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_UNIT_TIMEX_H
12#define _ASM_UNIT_TIMEX_H
13
14#ifndef __ASSEMBLY__
15#include <linux/irq.h>
16#endif /* __ASSEMBLY__ */
17
18#include <asm/cpu/timer-regs.h>
19#include <asm/unit/clock.h>
20
21/*
22 * jiffies counter specifications
23 */
24
25#define TMJCBR_MAX 0xffff
26#define TMJCBC TM01BC
27
28#define TMJCMD TM01MD
29#define TMJCBR TM01BR
30#define TMJCIRQ TM1IRQ
31#define TMJCICR TM1ICR
32#define TMJCICR_LEVEL GxICR_LEVEL_5
33
34#ifndef __ASSEMBLY__
35
36static inline void startup_jiffies_counter(void)
37{
38 unsigned rate;
39 u16 md, t16;
40
41 /* use as little prescaling as possible to avoid losing accuracy */
42 md = TM0MD_SRC_IOCLK;
43 rate = MN10300_JCCLK / HZ;
44
45 if (rate > TMJCBR_MAX) {
46 md = TM0MD_SRC_IOCLK_8;
47 rate = MN10300_JCCLK / 8 / HZ;
48
49 if (rate > TMJCBR_MAX) {
50 md = TM0MD_SRC_IOCLK_32;
51 rate = MN10300_JCCLK / 32 / HZ;
52
53 if (rate > TMJCBR_MAX)
54 BUG();
55 }
56 }
57
58 TMJCBR = rate - 1;
59 t16 = TMJCBR;
60
61 TMJCMD =
62 md |
63 TM1MD_SRC_TM0CASCADE << 8 |
64 TM0MD_INIT_COUNTER |
65 TM1MD_INIT_COUNTER << 8;
66
67 TMJCMD =
68 md |
69 TM1MD_SRC_TM0CASCADE << 8 |
70 TM0MD_COUNT_ENABLE |
71 TM1MD_COUNT_ENABLE << 8;
72
73 t16 = TMJCMD;
74
75 TMJCICR |= GxICR_ENABLE | GxICR_DETECT | GxICR_REQUEST;
76 t16 = TMJCICR;
77}
78
79static inline void shutdown_jiffies_counter(void)
80{
81}
82
83#endif /* !__ASSEMBLY__ */
84
85
86/*
87 * timestamp counter specifications
88 */
89
90#define TMTSCBR_MAX 0xffffffff
91#define TMTSCBC TM45BC
92
93#ifndef __ASSEMBLY__
94
95static inline void startup_timestamp_counter(void)
96{
97 /* set up timer 4 & 5 cascaded as a 32-bit counter to count real time
98 * - count down from 4Gig-1 to 0 and wrap at IOCLK rate
99 */
100 TM45BR = TMTSCBR_MAX;
101
102 TM4MD = TM4MD_SRC_IOCLK;
103 TM4MD |= TM4MD_INIT_COUNTER;
104 TM4MD &= ~TM4MD_INIT_COUNTER;
105 TM4ICR = 0;
106
107 TM5MD = TM5MD_SRC_TM4CASCADE;
108 TM5MD |= TM5MD_INIT_COUNTER;
109 TM5MD &= ~TM5MD_INIT_COUNTER;
110 TM5ICR = 0;
111
112 TM5MD |= TM5MD_COUNT_ENABLE;
113 TM4MD |= TM4MD_COUNT_ENABLE;
114}
115
116static inline void shutdown_timestamp_counter(void)
117{
118 TM4MD = 0;
119 TM5MD = 0;
120}
121
122/*
123 * we use a cascaded pair of 16-bit down-counting timers to count I/O
124 * clock cycles for the purposes of time keeping
125 */
126typedef unsigned long cycles_t;
127
128static inline cycles_t read_timestamp_counter(void)
129{
130 return (cycles_t) TMTSCBC;
131}
132
133#endif /* !__ASSEMBLY__ */
134
135#endif /* _ASM_UNIT_TIMEX_H */
diff --git a/include/asm-mn10300/user.h b/include/asm-mn10300/user.h
new file mode 100644
index 000000000000..e1193908b78c
--- /dev/null
+++ b/include/asm-mn10300/user.h
@@ -0,0 +1,53 @@
1/* MN10300 User process data
2 *
3 * Copyright (C) 2007 Matsushita Electric Industrial Co., Ltd.
4 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_USER_H
12#define _ASM_USER_H
13
14#include <asm/page.h>
15#include <linux/ptrace.h>
16
17#ifndef __ASSEMBLY__
18/*
19 * When the kernel dumps core, it starts by dumping the user struct - this will
20 * be used by gdb to figure out where the data and stack segments are within
21 * the file, and what virtual addresses to use.
22 */
23struct user {
24 /* We start with the registers, to mimic the way that "memory" is
25 * returned from the ptrace(3,...) function.
26 */
27 struct pt_regs regs; /* Where the registers are actually stored */
28
29 /* The rest of this junk is to help gdb figure out what goes where */
30 unsigned long int u_tsize; /* Text segment size (pages). */
31 unsigned long int u_dsize; /* Data segment size (pages). */
32 unsigned long int u_ssize; /* Stack segment size (pages). */
33 unsigned long start_code; /* Starting virtual address of text. */
34 unsigned long start_stack; /* Starting virtual address of stack area.
35 This is actually the bottom of the stack,
36 the top of the stack is always found in the
37 esp register. */
38 long int signal; /* Signal that caused the core dump. */
39 int reserved; /* No longer used */
40 struct user_pt_regs *u_ar0; /* Used by gdb to help find the values for */
41
42 /* the registers */
43 unsigned long magic; /* To uniquely identify a core file */
44 char u_comm[32]; /* User command that was responsible */
45};
46#endif
47
48#define NBPG PAGE_SIZE
49#define UPAGES 1
50#define HOST_TEXT_START_ADDR +(u.start_code)
51#define HOST_STACK_END_ADDR +(u.start_stack + u.u_ssize * NBPG)
52
53#endif /* _ASM_USER_H */
diff --git a/include/asm-mn10300/vga.h b/include/asm-mn10300/vga.h
new file mode 100644
index 000000000000..0163e50a3459
--- /dev/null
+++ b/include/asm-mn10300/vga.h
@@ -0,0 +1,17 @@
1/* MN10300 VGA register definitions
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11
12#ifndef _ASM_VGA_H
13#define _ASM_VGA_H
14
15
16
17#endif /* _ASM_VGA_H */
diff --git a/include/asm-mn10300/xor.h b/include/asm-mn10300/xor.h
new file mode 100644
index 000000000000..c82eb12a5b18
--- /dev/null
+++ b/include/asm-mn10300/xor.h
@@ -0,0 +1 @@
#include <asm-generic/xor.h>
diff --git a/include/asm-parisc/a.out.h b/include/asm-parisc/a.out.h
index 23e2c90943e5..eb04e34c5bb1 100644
--- a/include/asm-parisc/a.out.h
+++ b/include/asm-parisc/a.out.h
@@ -17,14 +17,4 @@ struct exec
17#define N_DRSIZE(a) ((a).a_drsize) 17#define N_DRSIZE(a) ((a).a_drsize)
18#define N_SYMSIZE(a) ((a).a_syms) 18#define N_SYMSIZE(a) ((a).a_syms)
19 19
20#ifdef __KERNEL__
21
22/* XXX: STACK_TOP actually should be STACK_BOTTOM for parisc.
23 * prumpf */
24
25#define STACK_TOP TASK_SIZE
26#define STACK_TOP_MAX DEFAULT_TASK_SIZE
27
28#endif
29
30#endif /* __A_OUT_GNU_H__ */ 20#endif /* __A_OUT_GNU_H__ */
diff --git a/include/asm-parisc/page.h b/include/asm-parisc/page.h
index b08d9151c71e..27d50b859541 100644
--- a/include/asm-parisc/page.h
+++ b/include/asm-parisc/page.h
@@ -91,6 +91,7 @@ typedef unsigned long pgprot_t;
91 91
92#endif /* STRICT_MM_TYPECHECKS */ 92#endif /* STRICT_MM_TYPECHECKS */
93 93
94typedef struct page *pgtable_t;
94 95
95typedef struct __physmem_range { 96typedef struct __physmem_range {
96 unsigned long start_pfn; 97 unsigned long start_pfn;
diff --git a/include/asm-parisc/pgalloc.h b/include/asm-parisc/pgalloc.h
index aab66f1bea14..3996dfc30a3f 100644
--- a/include/asm-parisc/pgalloc.h
+++ b/include/asm-parisc/pgalloc.h
@@ -115,11 +115,14 @@ pmd_populate_kernel(struct mm_struct *mm, pmd_t *pmd, pte_t *pte)
115 115
116#define pmd_populate(mm, pmd, pte_page) \ 116#define pmd_populate(mm, pmd, pte_page) \
117 pmd_populate_kernel(mm, pmd, page_address(pte_page)) 117 pmd_populate_kernel(mm, pmd, page_address(pte_page))
118#define pmd_pgtable(pmd) pmd_page(pmd)
118 119
119static inline struct page * 120static inline pgtable_t
120pte_alloc_one(struct mm_struct *mm, unsigned long address) 121pte_alloc_one(struct mm_struct *mm, unsigned long address)
121{ 122{
122 struct page *page = alloc_page(GFP_KERNEL|__GFP_REPEAT|__GFP_ZERO); 123 struct page *page = alloc_page(GFP_KERNEL|__GFP_REPEAT|__GFP_ZERO);
124 if (page)
125 pgtable_page_ctor(page);
123 return page; 126 return page;
124} 127}
125 128
@@ -135,7 +138,11 @@ static inline void pte_free_kernel(struct mm_struct *mm, pte_t *pte)
135 free_page((unsigned long)pte); 138 free_page((unsigned long)pte);
136} 139}
137 140
138#define pte_free(mm, page) pte_free_kernel(page_address(page)) 141static inline void pte_free_kernel(struct mm_struct *mm, struct page *pte)
142{
143 pgtable_page_dtor(pte);
144 pte_free_kernel(page_address((pte));
145}
139 146
140#define check_pgt_cache() do { } while (0) 147#define check_pgt_cache() do { } while (0)
141 148
diff --git a/include/asm-parisc/posix_types.h b/include/asm-parisc/posix_types.h
index b634e3c47fdc..bb725a6630bb 100644
--- a/include/asm-parisc/posix_types.h
+++ b/include/asm-parisc/posix_types.h
@@ -47,18 +47,14 @@ typedef unsigned long long __kernel_ino64_t;
47typedef unsigned int __kernel_old_dev_t; 47typedef unsigned int __kernel_old_dev_t;
48 48
49typedef struct { 49typedef struct {
50#if defined(__KERNEL__) || defined(__USE_ALL)
51 int val[2]; 50 int val[2];
52#else /* !defined(__KERNEL__) && !defined(__USE_ALL) */
53 int __val[2];
54#endif /* !defined(__KERNEL__) && !defined(__USE_ALL) */
55} __kernel_fsid_t; 51} __kernel_fsid_t;
56 52
57/* compatibility stuff */ 53/* compatibility stuff */
58typedef __kernel_uid_t __kernel_old_uid_t; 54typedef __kernel_uid_t __kernel_old_uid_t;
59typedef __kernel_gid_t __kernel_old_gid_t; 55typedef __kernel_gid_t __kernel_old_gid_t;
60 56
61#if defined(__KERNEL__) || !defined(__GLIBC__) || (__GLIBC__ < 2) 57#if defined(__KERNEL__)
62 58
63#undef __FD_SET 59#undef __FD_SET
64static __inline__ void __FD_SET(unsigned long __fd, __kernel_fd_set *__fdsetp) 60static __inline__ void __FD_SET(unsigned long __fd, __kernel_fd_set *__fdsetp)
@@ -128,6 +124,6 @@ static __inline__ void __FD_ZERO(__kernel_fd_set *__p)
128 } 124 }
129} 125}
130 126
131#endif /* defined(__KERNEL__) || !defined(__GLIBC__) || (__GLIBC__ < 2) */ 127#endif /* defined(__KERNEL__) */
132 128
133#endif 129#endif
diff --git a/include/asm-parisc/processor.h b/include/asm-parisc/processor.h
index 3bb06e898fde..3c9d34844c83 100644
--- a/include/asm-parisc/processor.h
+++ b/include/asm-parisc/processor.h
@@ -47,6 +47,16 @@
47#define DEFAULT_MAP_BASE DEFAULT_MAP_BASE32 47#define DEFAULT_MAP_BASE DEFAULT_MAP_BASE32
48#endif 48#endif
49 49
50#ifdef __KERNEL__
51
52/* XXX: STACK_TOP actually should be STACK_BOTTOM for parisc.
53 * prumpf */
54
55#define STACK_TOP TASK_SIZE
56#define STACK_TOP_MAX DEFAULT_TASK_SIZE
57
58#endif
59
50#ifndef __ASSEMBLY__ 60#ifndef __ASSEMBLY__
51 61
52/* 62/*
diff --git a/include/asm-powerpc/a.out.h b/include/asm-powerpc/a.out.h
index 5c5ea83f9349..89cead6b176e 100644
--- a/include/asm-powerpc/a.out.h
+++ b/include/asm-powerpc/a.out.h
@@ -17,23 +17,4 @@ struct exec
17#define N_DRSIZE(a) ((a).a_drsize) 17#define N_DRSIZE(a) ((a).a_drsize)
18#define N_SYMSIZE(a) ((a).a_syms) 18#define N_SYMSIZE(a) ((a).a_syms)
19 19
20#ifdef __KERNEL__
21#ifdef __powerpc64__
22
23#define STACK_TOP_USER64 TASK_SIZE_USER64
24#define STACK_TOP_USER32 TASK_SIZE_USER32
25
26#define STACK_TOP (test_thread_flag(TIF_32BIT) ? \
27 STACK_TOP_USER32 : STACK_TOP_USER64)
28
29#define STACK_TOP_MAX STACK_TOP_USER64
30
31#else /* __powerpc64__ */
32
33#define STACK_TOP TASK_SIZE
34#define STACK_TOP_MAX STACK_TOP
35
36#endif /* __powerpc64__ */
37#endif /* __KERNEL__ */
38
39#endif /* _ASM_POWERPC_A_OUT_H */ 20#endif /* _ASM_POWERPC_A_OUT_H */
diff --git a/include/asm-powerpc/page.h b/include/asm-powerpc/page.h
index 61e3725bbd37..df47bbb6ea13 100644
--- a/include/asm-powerpc/page.h
+++ b/include/asm-powerpc/page.h
@@ -190,6 +190,8 @@ extern int page_is_ram(unsigned long pfn);
190 190
191struct vm_area_struct; 191struct vm_area_struct;
192 192
193typedef struct page *pgtable_t;
194
193#include <asm-generic/memory_model.h> 195#include <asm-generic/memory_model.h>
194#endif /* __ASSEMBLY__ */ 196#endif /* __ASSEMBLY__ */
195 197
diff --git a/include/asm-powerpc/pgalloc-32.h b/include/asm-powerpc/pgalloc-32.h
index c162a4c37b39..58c07147b3ea 100644
--- a/include/asm-powerpc/pgalloc-32.h
+++ b/include/asm-powerpc/pgalloc-32.h
@@ -22,17 +22,19 @@ extern void pgd_free(struct mm_struct *mm, pgd_t *pgd);
22 (pmd_val(*(pmd)) = __pa(pte) | _PMD_PRESENT) 22 (pmd_val(*(pmd)) = __pa(pte) | _PMD_PRESENT)
23#define pmd_populate(mm, pmd, pte) \ 23#define pmd_populate(mm, pmd, pte) \
24 (pmd_val(*(pmd)) = (page_to_pfn(pte) << PAGE_SHIFT) | _PMD_PRESENT) 24 (pmd_val(*(pmd)) = (page_to_pfn(pte) << PAGE_SHIFT) | _PMD_PRESENT)
25#define pmd_pgtable(pmd) pmd_page(pmd)
25#else 26#else
26#define pmd_populate_kernel(mm, pmd, pte) \ 27#define pmd_populate_kernel(mm, pmd, pte) \
27 (pmd_val(*(pmd)) = (unsigned long)pte | _PMD_PRESENT) 28 (pmd_val(*(pmd)) = (unsigned long)pte | _PMD_PRESENT)
28#define pmd_populate(mm, pmd, pte) \ 29#define pmd_populate(mm, pmd, pte) \
29 (pmd_val(*(pmd)) = (unsigned long)lowmem_page_address(pte) | _PMD_PRESENT) 30 (pmd_val(*(pmd)) = (unsigned long)lowmem_page_address(pte) | _PMD_PRESENT)
31#define pmd_pgtable(pmd) pmd_page(pmd)
30#endif 32#endif
31 33
32extern pte_t *pte_alloc_one_kernel(struct mm_struct *mm, unsigned long addr); 34extern pte_t *pte_alloc_one_kernel(struct mm_struct *mm, unsigned long addr);
33extern struct page *pte_alloc_one(struct mm_struct *mm, unsigned long addr); 35extern pgtable_t pte_alloc_one(struct mm_struct *mm, unsigned long addr);
34extern void pte_free_kernel(struct mm_struct *mm, pte_t *pte); 36extern void pte_free_kernel(struct mm_struct *mm, pte_t *pte);
35extern void pte_free(struct mm_struct *mm, struct page *pte); 37extern void pte_free(struct mm_struct *mm, pgtable_t pte);
36 38
37#define __pte_free_tlb(tlb, pte) pte_free((tlb)->mm, (pte)) 39#define __pte_free_tlb(tlb, pte) pte_free((tlb)->mm, (pte))
38 40
diff --git a/include/asm-powerpc/pgalloc-64.h b/include/asm-powerpc/pgalloc-64.h
index 5afae8593931..68980990f62a 100644
--- a/include/asm-powerpc/pgalloc-64.h
+++ b/include/asm-powerpc/pgalloc-64.h
@@ -58,6 +58,7 @@ static inline void pud_populate(struct mm_struct *mm, pud_t *pud, pmd_t *pmd)
58#define pmd_populate(mm, pmd, pte_page) \ 58#define pmd_populate(mm, pmd, pte_page) \
59 pmd_populate_kernel(mm, pmd, page_address(pte_page)) 59 pmd_populate_kernel(mm, pmd, page_address(pte_page))
60#define pmd_populate_kernel(mm, pmd, pte) pmd_set(pmd, (unsigned long)(pte)) 60#define pmd_populate_kernel(mm, pmd, pte) pmd_set(pmd, (unsigned long)(pte))
61#define pmd_pgtable(pmd) pmd_page(pmd)
61 62
62 63
63#else /* CONFIG_PPC_64K_PAGES */ 64#else /* CONFIG_PPC_64K_PAGES */
@@ -72,6 +73,7 @@ static inline void pmd_populate_kernel(struct mm_struct *mm, pmd_t *pmd,
72 73
73#define pmd_populate(mm, pmd, pte_page) \ 74#define pmd_populate(mm, pmd, pte_page) \
74 pmd_populate_kernel(mm, pmd, page_address(pte_page)) 75 pmd_populate_kernel(mm, pmd, page_address(pte_page))
76#define pmd_pgtable(pmd) pmd_page(pmd)
75 77
76#endif /* CONFIG_PPC_64K_PAGES */ 78#endif /* CONFIG_PPC_64K_PAGES */
77 79
@@ -92,11 +94,18 @@ static inline pte_t *pte_alloc_one_kernel(struct mm_struct *mm,
92 return (pte_t *)__get_free_page(GFP_KERNEL | __GFP_REPEAT | __GFP_ZERO); 94 return (pte_t *)__get_free_page(GFP_KERNEL | __GFP_REPEAT | __GFP_ZERO);
93} 95}
94 96
95static inline struct page *pte_alloc_one(struct mm_struct *mm, 97static inline pgtable_t pte_alloc_one(struct mm_struct *mm,
96 unsigned long address) 98 unsigned long address)
97{ 99{
98 pte_t *pte = pte_alloc_one_kernel(mm, address); 100 struct page *page;
99 return pte ? virt_to_page(pte) : NULL; 101 pte_t *pte;
102
103 pte = pte_alloc_one_kernel(mm, address);
104 if (!pte)
105 return NULL;
106 page = virt_to_page(pte);
107 pgtable_page_ctor(page);
108 return page;
100} 109}
101 110
102static inline void pte_free_kernel(struct mm_struct *mm, pte_t *pte) 111static inline void pte_free_kernel(struct mm_struct *mm, pte_t *pte)
@@ -104,8 +113,9 @@ static inline void pte_free_kernel(struct mm_struct *mm, pte_t *pte)
104 free_page((unsigned long)pte); 113 free_page((unsigned long)pte);
105} 114}
106 115
107static inline void pte_free(struct mm_struct *mm, struct page *ptepage) 116static inline void pte_free(struct mm_struct *mm, pgtable_t ptepage)
108{ 117{
118 pgtable_page_dtor(ptepage);
109 __free_page(ptepage); 119 __free_page(ptepage);
110} 120}
111 121
@@ -136,9 +146,12 @@ static inline void pgtable_free(pgtable_free_t pgf)
136 146
137extern void pgtable_free_tlb(struct mmu_gather *tlb, pgtable_free_t pgf); 147extern void pgtable_free_tlb(struct mmu_gather *tlb, pgtable_free_t pgf);
138 148
139#define __pte_free_tlb(tlb, ptepage) \ 149#define __pte_free_tlb(tlb,ptepage) \
150do { \
151 pgtable_page_dtor(ptepage); \
140 pgtable_free_tlb(tlb, pgtable_free_cache(page_address(ptepage), \ 152 pgtable_free_tlb(tlb, pgtable_free_cache(page_address(ptepage), \
141 PTE_NONCACHE_NUM, PTE_TABLE_SIZE-1)) 153 PTE_NONCACHE_NUM, PTE_TABLE_SIZE-1)); \
154} while (0)
142#define __pmd_free_tlb(tlb, pmd) \ 155#define __pmd_free_tlb(tlb, pmd) \
143 pgtable_free_tlb(tlb, pgtable_free_cache(pmd, \ 156 pgtable_free_tlb(tlb, pgtable_free_cache(pmd, \
144 PMD_CACHE_NUM, PMD_TABLE_SIZE-1)) 157 PMD_CACHE_NUM, PMD_TABLE_SIZE-1))
diff --git a/include/asm-powerpc/pmac_feature.h b/include/asm-powerpc/pmac_feature.h
index 26bcb0aa164a..877c35a4356e 100644
--- a/include/asm-powerpc/pmac_feature.h
+++ b/include/asm-powerpc/pmac_feature.h
@@ -392,6 +392,14 @@ extern u32 __iomem *uninorth_base;
392#define UN_BIS(r,v) (UN_OUT((r), UN_IN(r) | (v))) 392#define UN_BIS(r,v) (UN_OUT((r), UN_IN(r) | (v)))
393#define UN_BIC(r,v) (UN_OUT((r), UN_IN(r) & ~(v))) 393#define UN_BIC(r,v) (UN_OUT((r), UN_IN(r) & ~(v)))
394 394
395/* Uninorth variant:
396 *
397 * 0 = not uninorth
398 * 1 = U1.x or U2.x
399 * 3 = U3
400 * 4 = U4
401 */
402extern int pmac_get_uninorth_variant(void);
395 403
396#endif /* __ASM_POWERPC_PMAC_FEATURE_H */ 404#endif /* __ASM_POWERPC_PMAC_FEATURE_H */
397#endif /* __KERNEL__ */ 405#endif /* __KERNEL__ */
diff --git a/include/asm-powerpc/posix_types.h b/include/asm-powerpc/posix_types.h
index 2f2288f520be..c4e396b540df 100644
--- a/include/asm-powerpc/posix_types.h
+++ b/include/asm-powerpc/posix_types.h
@@ -64,8 +64,7 @@ typedef struct {
64 64
65#else /* __GNUC__ */ 65#else /* __GNUC__ */
66 66
67#if defined(__KERNEL__) || !defined(__GLIBC__) || (__GLIBC__ < 2) \ 67#if defined(__KERNEL__)
68 || (__GLIBC__ == 2 && __GLIBC_MINOR__ == 0)
69/* With GNU C, use inline functions instead so args are evaluated only once: */ 68/* With GNU C, use inline functions instead so args are evaluated only once: */
70 69
71#undef __FD_SET 70#undef __FD_SET
@@ -124,6 +123,6 @@ static __inline__ void __FD_ZERO(__kernel_fd_set *p)
124 } 123 }
125} 124}
126 125
127#endif /* defined(__KERNEL__) || !defined(__GLIBC__) || (__GLIBC__ < 2) */ 126#endif /* defined(__KERNEL__) */
128#endif /* __GNUC__ */ 127#endif /* __GNUC__ */
129#endif /* _ASM_POWERPC_POSIX_TYPES_H */ 128#endif /* _ASM_POWERPC_POSIX_TYPES_H */
diff --git a/include/asm-powerpc/processor.h b/include/asm-powerpc/processor.h
index 1f4765d6546f..fd98ca998b4f 100644
--- a/include/asm-powerpc/processor.h
+++ b/include/asm-powerpc/processor.h
@@ -113,6 +113,25 @@ extern struct task_struct *last_task_used_spe;
113 TASK_UNMAPPED_BASE_USER32 : TASK_UNMAPPED_BASE_USER64 ) 113 TASK_UNMAPPED_BASE_USER32 : TASK_UNMAPPED_BASE_USER64 )
114#endif 114#endif
115 115
116#ifdef __KERNEL__
117#ifdef __powerpc64__
118
119#define STACK_TOP_USER64 TASK_SIZE_USER64
120#define STACK_TOP_USER32 TASK_SIZE_USER32
121
122#define STACK_TOP (test_thread_flag(TIF_32BIT) ? \
123 STACK_TOP_USER32 : STACK_TOP_USER64)
124
125#define STACK_TOP_MAX STACK_TOP_USER64
126
127#else /* __powerpc64__ */
128
129#define STACK_TOP TASK_SIZE
130#define STACK_TOP_MAX STACK_TOP
131
132#endif /* __powerpc64__ */
133#endif /* __KERNEL__ */
134
116typedef struct { 135typedef struct {
117 unsigned long seg; 136 unsigned long seg;
118} mm_segment_t; 137} mm_segment_t;
diff --git a/include/asm-ppc/pgalloc.h b/include/asm-ppc/pgalloc.h
index 7c39a95829c7..fd4d1d74cfb1 100644
--- a/include/asm-ppc/pgalloc.h
+++ b/include/asm-ppc/pgalloc.h
@@ -23,17 +23,19 @@ extern void pgd_free(struct mm_struct *mm, pgd_t *pgd);
23 (pmd_val(*(pmd)) = __pa(pte) | _PMD_PRESENT) 23 (pmd_val(*(pmd)) = __pa(pte) | _PMD_PRESENT)
24#define pmd_populate(mm, pmd, pte) \ 24#define pmd_populate(mm, pmd, pte) \
25 (pmd_val(*(pmd)) = (page_to_pfn(pte) << PAGE_SHIFT) | _PMD_PRESENT) 25 (pmd_val(*(pmd)) = (page_to_pfn(pte) << PAGE_SHIFT) | _PMD_PRESENT)
26#define pmd_pgtable(pmd) pmd_page(pmd)
26#else 27#else
27#define pmd_populate_kernel(mm, pmd, pte) \ 28#define pmd_populate_kernel(mm, pmd, pte) \
28 (pmd_val(*(pmd)) = (unsigned long)pte | _PMD_PRESENT) 29 (pmd_val(*(pmd)) = (unsigned long)pte | _PMD_PRESENT)
29#define pmd_populate(mm, pmd, pte) \ 30#define pmd_populate(mm, pmd, pte) \
30 (pmd_val(*(pmd)) = (unsigned long)lowmem_page_address(pte) | _PMD_PRESENT) 31 (pmd_val(*(pmd)) = (unsigned long)lowmem_page_address(pte) | _PMD_PRESENT)
32#define pmd_pgtable(pmd) pmd_page(pmd)
31#endif 33#endif
32 34
33extern pte_t *pte_alloc_one_kernel(struct mm_struct *mm, unsigned long addr); 35extern pte_t *pte_alloc_one_kernel(struct mm_struct *mm, unsigned long addr);
34extern struct page *pte_alloc_one(struct mm_struct *mm, unsigned long addr); 36extern pgtable_t pte_alloc_one(struct mm_struct *mm, unsigned long addr);
35extern void pte_free_kernel(struct mm_struct *mm, pte_t *pte); 37extern void pte_free_kernel(struct mm_struct *mm, pte_t *pte);
36extern void pte_free(struct mm_struct *mm, struct page *pte); 38extern void pte_free(struct mm_struct *mm, pgtable_t pte);
37 39
38#define __pte_free_tlb(tlb, pte) pte_free((tlb)->mm, (pte)) 40#define __pte_free_tlb(tlb, pte) pte_free((tlb)->mm, (pte))
39 41
diff --git a/include/asm-s390/a.out.h b/include/asm-s390/a.out.h
index 46158dcaf517..8d6bd9c2952e 100644
--- a/include/asm-s390/a.out.h
+++ b/include/asm-s390/a.out.h
@@ -29,11 +29,4 @@ struct exec
29#define N_DRSIZE(a) ((a).a_drsize) 29#define N_DRSIZE(a) ((a).a_drsize)
30#define N_SYMSIZE(a) ((a).a_syms) 30#define N_SYMSIZE(a) ((a).a_syms)
31 31
32#ifdef __KERNEL__
33
34#define STACK_TOP TASK_SIZE
35#define STACK_TOP_MAX DEFAULT_TASK_SIZE
36
37#endif
38
39#endif /* __A_OUT_GNU_H__ */ 32#endif /* __A_OUT_GNU_H__ */
diff --git a/include/asm-s390/ioctls.h b/include/asm-s390/ioctls.h
index 07e19b2dd73f..40e481b1b461 100644
--- a/include/asm-s390/ioctls.h
+++ b/include/asm-s390/ioctls.h
@@ -54,6 +54,10 @@
54#define TIOCSBRK 0x5427 /* BSD compatibility */ 54#define TIOCSBRK 0x5427 /* BSD compatibility */
55#define TIOCCBRK 0x5428 /* BSD compatibility */ 55#define TIOCCBRK 0x5428 /* BSD compatibility */
56#define TIOCGSID 0x5429 /* Return the session ID of FD */ 56#define TIOCGSID 0x5429 /* Return the session ID of FD */
57#define TCGETS2 _IOR('T',0x2A, struct termios2)
58#define TCSETS2 _IOW('T',0x2B, struct termios2)
59#define TCSETSW2 _IOW('T',0x2C, struct termios2)
60#define TCSETSF2 _IOW('T',0x2D, struct termios2)
57#define TIOCGPTN _IOR('T',0x30, unsigned int) /* Get Pty Number (of pty-mux device) */ 61#define TIOCGPTN _IOR('T',0x30, unsigned int) /* Get Pty Number (of pty-mux device) */
58#define TIOCSPTLCK _IOW('T',0x31, int) /* Lock/unlock Pty */ 62#define TIOCSPTLCK _IOW('T',0x31, int) /* Lock/unlock Pty */
59 63
diff --git a/include/asm-s390/page.h b/include/asm-s390/page.h
index a55f9d979dfb..7f29a981f48c 100644
--- a/include/asm-s390/page.h
+++ b/include/asm-s390/page.h
@@ -109,6 +109,8 @@ typedef struct { unsigned long pgd; } pgd_t;
109 109
110#endif /* __s390x__ */ 110#endif /* __s390x__ */
111 111
112typedef struct page *pgtable_t;
113
112#define __pte(x) ((pte_t) { (x) } ) 114#define __pte(x) ((pte_t) { (x) } )
113#define __pmd(x) ((pmd_t) { (x) } ) 115#define __pmd(x) ((pmd_t) { (x) } )
114#define __pgd(x) ((pgd_t) { (x) } ) 116#define __pgd(x) ((pgd_t) { (x) } )
diff --git a/include/asm-s390/pgalloc.h b/include/asm-s390/pgalloc.h
index 6f6619ba8980..900d44807e10 100644
--- a/include/asm-s390/pgalloc.h
+++ b/include/asm-s390/pgalloc.h
@@ -132,7 +132,7 @@ pmd_populate_kernel(struct mm_struct *mm, pmd_t *pmd, pte_t *pte)
132} 132}
133 133
134static inline void 134static inline void
135pmd_populate(struct mm_struct *mm, pmd_t *pmd, struct page *page) 135pmd_populate(struct mm_struct *mm, pmd_t *pmd, pgtable_t page)
136{ 136{
137 pte_t *pte = (pte_t *)page_to_phys(page); 137 pte_t *pte = (pte_t *)page_to_phys(page);
138 pmd_t *shadow_pmd = get_shadow_table(pmd); 138 pmd_t *shadow_pmd = get_shadow_table(pmd);
@@ -142,6 +142,7 @@ pmd_populate(struct mm_struct *mm, pmd_t *pmd, struct page *page)
142 if (shadow_pmd && shadow_pte) 142 if (shadow_pmd && shadow_pte)
143 pmd_populate_kernel(mm, shadow_pmd, shadow_pte); 143 pmd_populate_kernel(mm, shadow_pmd, shadow_pte);
144} 144}
145#define pmd_pgtable(pmd) pmd_page(pmd)
145 146
146/* 147/*
147 * page table entry allocation/free routines. 148 * page table entry allocation/free routines.
diff --git a/include/asm-s390/processor.h b/include/asm-s390/processor.h
index 4f744609cd11..e8785634cbdb 100644
--- a/include/asm-s390/processor.h
+++ b/include/asm-s390/processor.h
@@ -78,6 +78,13 @@ extern int get_cpu_capability(unsigned int *);
78 78
79#endif /* __s390x__ */ 79#endif /* __s390x__ */
80 80
81#ifdef __KERNEL__
82
83#define STACK_TOP TASK_SIZE
84#define STACK_TOP_MAX DEFAULT_TASK_SIZE
85
86#endif
87
81#define HAVE_ARCH_PICK_MMAP_LAYOUT 88#define HAVE_ARCH_PICK_MMAP_LAYOUT
82 89
83typedef struct { 90typedef struct {
@@ -161,6 +168,7 @@ struct stack_frame {
161/* Forward declaration, a strange C thing */ 168/* Forward declaration, a strange C thing */
162struct task_struct; 169struct task_struct;
163struct mm_struct; 170struct mm_struct;
171struct seq_file;
164 172
165/* Free all resources held by a thread. */ 173/* Free all resources held by a thread. */
166extern void release_thread(struct task_struct *); 174extern void release_thread(struct task_struct *);
@@ -177,7 +185,7 @@ extern unsigned long thread_saved_pc(struct task_struct *t);
177/* 185/*
178 * Print register of task into buffer. Used in fs/proc/array.c. 186 * Print register of task into buffer. Used in fs/proc/array.c.
179 */ 187 */
180extern char *task_show_regs(struct task_struct *task, char *buffer); 188extern void task_show_regs(struct seq_file *m, struct task_struct *task);
181 189
182extern void show_registers(struct pt_regs *regs); 190extern void show_registers(struct pt_regs *regs);
183extern void show_code(struct pt_regs *regs); 191extern void show_code(struct pt_regs *regs);
diff --git a/include/asm-s390/termbits.h b/include/asm-s390/termbits.h
index 811b9a9cdc08..58731853d529 100644
--- a/include/asm-s390/termbits.h
+++ b/include/asm-s390/termbits.h
@@ -148,6 +148,7 @@ struct ktermios {
148#define HUPCL 0002000 148#define HUPCL 0002000
149#define CLOCAL 0004000 149#define CLOCAL 0004000
150#define CBAUDEX 0010000 150#define CBAUDEX 0010000
151#define BOTHER 0010000
151#define B57600 0010001 152#define B57600 0010001
152#define B115200 0010002 153#define B115200 0010002
153#define B230400 0010003 154#define B230400 0010003
@@ -163,10 +164,12 @@ struct ktermios {
163#define B3000000 0010015 164#define B3000000 0010015
164#define B3500000 0010016 165#define B3500000 0010016
165#define B4000000 0010017 166#define B4000000 0010017
166#define CIBAUD 002003600000 /* input baud rate (not used) */ 167#define CIBAUD 002003600000 /* input baud rate */
167#define CMSPAR 010000000000 /* mark or space (stick) parity */ 168#define CMSPAR 010000000000 /* mark or space (stick) parity */
168#define CRTSCTS 020000000000 /* flow control */ 169#define CRTSCTS 020000000000 /* flow control */
169 170
171#define IBSHIFT 16 /* Shift from CBAUD to CIBAUD */
172
170/* c_lflag bits */ 173/* c_lflag bits */
171#define ISIG 0000001 174#define ISIG 0000001
172#define ICANON 0000002 175#define ICANON 0000002
diff --git a/include/asm-s390/termios.h b/include/asm-s390/termios.h
index a3480e25eb4b..67f66278f533 100644
--- a/include/asm-s390/termios.h
+++ b/include/asm-s390/termios.h
@@ -57,6 +57,9 @@ struct termio {
57*/ 57*/
58#define INIT_C_CC "\003\034\177\025\004\0\1\0\021\023\032\0\022\017\027\026\0" 58#define INIT_C_CC "\003\034\177\025\004\0\1\0\021\023\032\0\022\017\027\026\0"
59 59
60#define user_termios_to_kernel_termios(k, u) copy_from_user(k, u, sizeof(struct termios2))
61#define kernel_termios_to_user_termios(u, k) copy_to_user(u, k, sizeof(struct termios2))
62
60#include <asm-generic/termios.h> 63#include <asm-generic/termios.h>
61 64
62#endif /* __KERNEL__ */ 65#endif /* __KERNEL__ */
diff --git a/include/asm-s390/tlb.h b/include/asm-s390/tlb.h
index 985de2b88279..3c8177fa9e06 100644
--- a/include/asm-s390/tlb.h
+++ b/include/asm-s390/tlb.h
@@ -95,7 +95,7 @@ static inline void tlb_remove_page(struct mmu_gather *tlb, struct page *page)
95 * pte_free_tlb frees a pte table and clears the CRSTE for the 95 * pte_free_tlb frees a pte table and clears the CRSTE for the
96 * page table from the tlb. 96 * page table from the tlb.
97 */ 97 */
98static inline void pte_free_tlb(struct mmu_gather *tlb, struct page *page) 98static inline void pte_free_tlb(struct mmu_gather *tlb, pgtable_t page)
99{ 99{
100 if (!tlb->fullmm) { 100 if (!tlb->fullmm) {
101 tlb->array[tlb->nr_ptes++] = page; 101 tlb->array[tlb->nr_ptes++] = page;
diff --git a/include/asm-sh/a.out.h b/include/asm-sh/a.out.h
index 685d0f6125fa..1f93130e179c 100644
--- a/include/asm-sh/a.out.h
+++ b/include/asm-sh/a.out.h
@@ -17,11 +17,4 @@ struct exec
17#define N_DRSIZE(a) ((a).a_drsize) 17#define N_DRSIZE(a) ((a).a_drsize)
18#define N_SYMSIZE(a) ((a).a_syms) 18#define N_SYMSIZE(a) ((a).a_syms)
19 19
20#ifdef __KERNEL__
21
22#define STACK_TOP TASK_SIZE
23#define STACK_TOP_MAX STACK_TOP
24
25#endif
26
27#endif /* __ASM_SH_A_OUT_H */ 20#endif /* __ASM_SH_A_OUT_H */
diff --git a/include/asm-sh/page.h b/include/asm-sh/page.h
index e0fe02950f52..134562dc8c45 100644
--- a/include/asm-sh/page.h
+++ b/include/asm-sh/page.h
@@ -100,6 +100,8 @@ typedef struct { unsigned long pgd; } pgd_t;
100#define __pgd(x) ((pgd_t) { (x) } ) 100#define __pgd(x) ((pgd_t) { (x) } )
101#define __pgprot(x) ((pgprot_t) { (x) } ) 101#define __pgprot(x) ((pgprot_t) { (x) } )
102 102
103typedef struct page *pgtable_t;
104
103#endif /* !__ASSEMBLY__ */ 105#endif /* !__ASSEMBLY__ */
104 106
105/* 107/*
diff --git a/include/asm-sh/pgalloc.h b/include/asm-sh/pgalloc.h
index 59ca16d77a1d..84dd2db7104c 100644
--- a/include/asm-sh/pgalloc.h
+++ b/include/asm-sh/pgalloc.h
@@ -14,10 +14,11 @@ static inline void pmd_populate_kernel(struct mm_struct *mm, pmd_t *pmd,
14} 14}
15 15
16static inline void pmd_populate(struct mm_struct *mm, pmd_t *pmd, 16static inline void pmd_populate(struct mm_struct *mm, pmd_t *pmd,
17 struct page *pte) 17 pgtable_t pte)
18{ 18{
19 set_pmd(pmd, __pmd((unsigned long)page_address(pte))); 19 set_pmd(pmd, __pmd((unsigned long)page_address(pte)));
20} 20}
21#define pmd_pgtable(pmd) pmd_page(pmd)
21 22
22static inline void pgd_ctor(void *x) 23static inline void pgd_ctor(void *x)
23{ 24{
@@ -47,11 +48,18 @@ static inline pte_t *pte_alloc_one_kernel(struct mm_struct *mm,
47 return quicklist_alloc(QUICK_PT, GFP_KERNEL | __GFP_REPEAT, NULL); 48 return quicklist_alloc(QUICK_PT, GFP_KERNEL | __GFP_REPEAT, NULL);
48} 49}
49 50
50static inline struct page *pte_alloc_one(struct mm_struct *mm, 51static inline pgtable_t pte_alloc_one(struct mm_struct *mm,
51 unsigned long address) 52 unsigned long address)
52{ 53{
53 void *pg = quicklist_alloc(QUICK_PT, GFP_KERNEL | __GFP_REPEAT, NULL); 54 struct page *page;
54 return pg ? virt_to_page(pg) : NULL; 55 void *pg;
56
57 pg = quicklist_alloc(QUICK_PT, GFP_KERNEL | __GFP_REPEAT, NULL);
58 if (!pg)
59 return NULL;
60 page = virt_to_page(pg);
61 pgtable_page_ctor(page);
62 return page;
55} 63}
56 64
57static inline void pte_free_kernel(struct mm_struct *mm, pte_t *pte) 65static inline void pte_free_kernel(struct mm_struct *mm, pte_t *pte)
@@ -59,12 +67,17 @@ static inline void pte_free_kernel(struct mm_struct *mm, pte_t *pte)
59 quicklist_free(QUICK_PT, NULL, pte); 67 quicklist_free(QUICK_PT, NULL, pte);
60} 68}
61 69
62static inline void pte_free(struct mm_struct *mm, struct page *pte) 70static inline void pte_free(struct mm_struct *mm, pgtable_t pte)
63{ 71{
72 pgtable_page_dtor(pte);
64 quicklist_free_page(QUICK_PT, NULL, pte); 73 quicklist_free_page(QUICK_PT, NULL, pte);
65} 74}
66 75
67#define __pte_free_tlb(tlb,pte) tlb_remove_page((tlb),(pte)) 76#define __pte_free_tlb(tlb,pte) \
77do { \
78 pgtable_page_dtor(pte); \
79 tlb_remove_page((tlb), (pte)); \
80} while (0)
68 81
69/* 82/*
70 * allocating and freeing a pmd is trivial: the 1-entry pmd is 83 * allocating and freeing a pmd is trivial: the 1-entry pmd is
diff --git a/include/asm-sh/processor_32.h b/include/asm-sh/processor_32.h
index a7edaa1a870c..df2d5b039ef4 100644
--- a/include/asm-sh/processor_32.h
+++ b/include/asm-sh/processor_32.h
@@ -50,6 +50,9 @@ extern struct sh_cpuinfo cpu_data[];
50 */ 50 */
51#define TASK_SIZE 0x7c000000UL 51#define TASK_SIZE 0x7c000000UL
52 52
53#define STACK_TOP TASK_SIZE
54#define STACK_TOP_MAX STACK_TOP
55
53/* This decides where the kernel will search for a free chunk of vm 56/* This decides where the kernel will search for a free chunk of vm
54 * space during mmap's. 57 * space during mmap's.
55 */ 58 */
diff --git a/include/asm-sh/processor_64.h b/include/asm-sh/processor_64.h
index 99c22b14a85b..eda4bef448e9 100644
--- a/include/asm-sh/processor_64.h
+++ b/include/asm-sh/processor_64.h
@@ -83,6 +83,9 @@ extern struct sh_cpuinfo cpu_data[];
83 */ 83 */
84#define TASK_SIZE 0x7ffff000UL 84#define TASK_SIZE 0x7ffff000UL
85 85
86#define STACK_TOP TASK_SIZE
87#define STACK_TOP_MAX STACK_TOP
88
86/* This decides where the kernel will search for a free chunk of vm 89/* This decides where the kernel will search for a free chunk of vm
87 * space during mmap's. 90 * space during mmap's.
88 */ 91 */
diff --git a/include/asm-sparc/a.out-core.h b/include/asm-sparc/a.out-core.h
new file mode 100644
index 000000000000..e8fd338ed0b2
--- /dev/null
+++ b/include/asm-sparc/a.out-core.h
@@ -0,0 +1,52 @@
1/* a.out coredump register dumper
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11
12#ifndef _ASM_A_OUT_CORE_H
13#define _ASM_A_OUT_CORE_H
14
15#ifdef __KERNEL__
16
17#include <linux/user.h>
18
19/*
20 * fill in the user structure for an a.out core dump
21 */
22static inline void aout_dump_thread(struct pt_regs *regs, struct user *dump)
23{
24 unsigned long first_stack_page;
25
26 dump->magic = SUNOS_CORE_MAGIC;
27 dump->len = sizeof(struct user);
28 dump->regs.psr = regs->psr;
29 dump->regs.pc = regs->pc;
30 dump->regs.npc = regs->npc;
31 dump->regs.y = regs->y;
32 /* fuck me plenty */
33 memcpy(&dump->regs.regs[0], &regs->u_regs[1], (sizeof(unsigned long) * 15));
34 dump->uexec = current->thread.core_exec;
35 dump->u_tsize = (((unsigned long) current->mm->end_code) -
36 ((unsigned long) current->mm->start_code)) & ~(PAGE_SIZE - 1);
37 dump->u_dsize = ((unsigned long) (current->mm->brk + (PAGE_SIZE-1)));
38 dump->u_dsize -= dump->u_tsize;
39 dump->u_dsize &= ~(PAGE_SIZE - 1);
40 first_stack_page = (regs->u_regs[UREG_FP] & ~(PAGE_SIZE - 1));
41 dump->u_ssize = (TASK_SIZE - first_stack_page) & ~(PAGE_SIZE - 1);
42 memcpy(&dump->fpu.fpstatus.fregs.regs[0], &current->thread.float_regs[0], (sizeof(unsigned long) * 32));
43 dump->fpu.fpstatus.fsr = current->thread.fsr;
44 dump->fpu.fpstatus.flags = dump->fpu.fpstatus.extra = 0;
45 dump->fpu.fpstatus.fpq_count = current->thread.fpqdepth;
46 memcpy(&dump->fpu.fpstatus.fpq[0], &current->thread.fpqueue[0],
47 ((sizeof(unsigned long) * 2) * 16));
48 dump->sigcode = 0;
49}
50
51#endif /* __KERNEL__ */
52#endif /* _ASM_A_OUT_CORE_H */
diff --git a/include/asm-sparc/a.out.h b/include/asm-sparc/a.out.h
index 917e04250696..744cfe6c0de8 100644
--- a/include/asm-sparc/a.out.h
+++ b/include/asm-sparc/a.out.h
@@ -87,13 +87,4 @@ struct relocation_info /* used when header.a_machtype == M_SPARC */
87 87
88#define N_RELOCATION_INFO_DECLARED 1 88#define N_RELOCATION_INFO_DECLARED 1
89 89
90#ifdef __KERNEL__
91
92#include <asm/page.h>
93
94#define STACK_TOP (PAGE_OFFSET - PAGE_SIZE)
95#define STACK_TOP_MAX STACK_TOP
96
97#endif /* __KERNEL__ */
98
99#endif /* __SPARC_A_OUT_H__ */ 90#endif /* __SPARC_A_OUT_H__ */
diff --git a/include/asm-sparc/page.h b/include/asm-sparc/page.h
index cbc48c0c4e15..39ccf2da297c 100644
--- a/include/asm-sparc/page.h
+++ b/include/asm-sparc/page.h
@@ -123,6 +123,8 @@ typedef unsigned long iopgprot_t;
123 123
124#endif 124#endif
125 125
126typedef struct page *pgtable_t;
127
126extern unsigned long sparc_unmapped_base; 128extern unsigned long sparc_unmapped_base;
127 129
128BTFIXUPDEF_SETHI(sparc_unmapped_base) 130BTFIXUPDEF_SETHI(sparc_unmapped_base)
diff --git a/include/asm-sparc/param.h b/include/asm-sparc/param.h
index beaf02d364f2..86ba59af9d2c 100644
--- a/include/asm-sparc/param.h
+++ b/include/asm-sparc/param.h
@@ -3,7 +3,7 @@
3#define _ASMSPARC_PARAM_H 3#define _ASMSPARC_PARAM_H
4 4
5#ifdef __KERNEL__ 5#ifdef __KERNEL__
6# define HZ 100 /* Internal kernel timer frequency */ 6# define HZ CONFIG_HZ /* Internal kernel timer frequency */
7# define USER_HZ 100 /* .. some user interfaces are in "ticks" */ 7# define USER_HZ 100 /* .. some user interfaces are in "ticks" */
8# define CLOCKS_PER_SEC (USER_HZ) 8# define CLOCKS_PER_SEC (USER_HZ)
9#endif 9#endif
diff --git a/include/asm-sparc/pgalloc.h b/include/asm-sparc/pgalloc.h
index b5fbdd36447f..6292cd00e5af 100644
--- a/include/asm-sparc/pgalloc.h
+++ b/include/asm-sparc/pgalloc.h
@@ -50,10 +50,11 @@ BTFIXUPDEF_CALL(void, free_pmd_fast, pmd_t *)
50 50
51BTFIXUPDEF_CALL(void, pmd_populate, pmd_t *, struct page *) 51BTFIXUPDEF_CALL(void, pmd_populate, pmd_t *, struct page *)
52#define pmd_populate(MM, PMD, PTE) BTFIXUP_CALL(pmd_populate)(PMD, PTE) 52#define pmd_populate(MM, PMD, PTE) BTFIXUP_CALL(pmd_populate)(PMD, PTE)
53#define pmd_pgtable(pmd) pmd_page(pmd)
53BTFIXUPDEF_CALL(void, pmd_set, pmd_t *, pte_t *) 54BTFIXUPDEF_CALL(void, pmd_set, pmd_t *, pte_t *)
54#define pmd_populate_kernel(MM, PMD, PTE) BTFIXUP_CALL(pmd_set)(PMD, PTE) 55#define pmd_populate_kernel(MM, PMD, PTE) BTFIXUP_CALL(pmd_set)(PMD, PTE)
55 56
56BTFIXUPDEF_CALL(struct page *, pte_alloc_one, struct mm_struct *, unsigned long) 57BTFIXUPDEF_CALL(pgtable_t , pte_alloc_one, struct mm_struct *, unsigned long)
57#define pte_alloc_one(mm, address) BTFIXUP_CALL(pte_alloc_one)(mm, address) 58#define pte_alloc_one(mm, address) BTFIXUP_CALL(pte_alloc_one)(mm, address)
58BTFIXUPDEF_CALL(pte_t *, pte_alloc_one_kernel, struct mm_struct *, unsigned long) 59BTFIXUPDEF_CALL(pte_t *, pte_alloc_one_kernel, struct mm_struct *, unsigned long)
59#define pte_alloc_one_kernel(mm, addr) BTFIXUP_CALL(pte_alloc_one_kernel)(mm, addr) 60#define pte_alloc_one_kernel(mm, addr) BTFIXUP_CALL(pte_alloc_one_kernel)(mm, addr)
@@ -61,7 +62,7 @@ BTFIXUPDEF_CALL(pte_t *, pte_alloc_one_kernel, struct mm_struct *, unsigned long
61BTFIXUPDEF_CALL(void, free_pte_fast, pte_t *) 62BTFIXUPDEF_CALL(void, free_pte_fast, pte_t *)
62#define pte_free_kernel(mm, pte) BTFIXUP_CALL(free_pte_fast)(pte) 63#define pte_free_kernel(mm, pte) BTFIXUP_CALL(free_pte_fast)(pte)
63 64
64BTFIXUPDEF_CALL(void, pte_free, struct page *) 65BTFIXUPDEF_CALL(void, pte_free, pgtable_t )
65#define pte_free(mm, pte) BTFIXUP_CALL(pte_free)(pte) 66#define pte_free(mm, pte) BTFIXUP_CALL(pte_free)(pte)
66#define __pte_free_tlb(tlb, pte) pte_free((tlb)->mm, pte) 67#define __pte_free_tlb(tlb, pte) pte_free((tlb)->mm, pte)
67 68
diff --git a/include/asm-sparc/posix_types.h b/include/asm-sparc/posix_types.h
index 62c8fa7b36d4..dcc07eb5e181 100644
--- a/include/asm-sparc/posix_types.h
+++ b/include/asm-sparc/posix_types.h
@@ -39,14 +39,10 @@ typedef long long __kernel_loff_t;
39#endif 39#endif
40 40
41typedef struct { 41typedef struct {
42#if defined(__KERNEL__) || defined(__USE_ALL)
43 int val[2]; 42 int val[2];
44#else /* !defined(__KERNEL__) && !defined(__USE_ALL) */
45 int __val[2];
46#endif /* !defined(__KERNEL__) && !defined(__USE_ALL) */
47} __kernel_fsid_t; 43} __kernel_fsid_t;
48 44
49#if defined(__KERNEL__) || !defined(__GLIBC__) || (__GLIBC__ < 2) 45#if defined(__KERNEL__)
50 46
51#undef __FD_SET 47#undef __FD_SET
52static inline void __FD_SET(unsigned long fd, __kernel_fd_set *fdsetp) 48static inline void __FD_SET(unsigned long fd, __kernel_fd_set *fdsetp)
@@ -117,6 +113,6 @@ static inline void __FD_ZERO(__kernel_fd_set *p)
117 } 113 }
118} 114}
119 115
120#endif /* defined(__KERNEL__) || !defined(__GLIBC__) || (__GLIBC__ < 2) */ 116#endif /* defined(__KERNEL__) */
121 117
122#endif /* !(__ARCH_SPARC_POSIX_TYPES_H) */ 118#endif /* !(__ARCH_SPARC_POSIX_TYPES_H) */
diff --git a/include/asm-sparc/processor.h b/include/asm-sparc/processor.h
index 6fbb3f0af8d8..40b1e41fdea7 100644
--- a/include/asm-sparc/processor.h
+++ b/include/asm-sparc/processor.h
@@ -33,6 +33,10 @@
33 * we can make our access_ok test faster 33 * we can make our access_ok test faster
34 */ 34 */
35#define TASK_SIZE PAGE_OFFSET 35#define TASK_SIZE PAGE_OFFSET
36#ifdef __KERNEL__
37#define STACK_TOP (PAGE_OFFSET - PAGE_SIZE)
38#define STACK_TOP_MAX STACK_TOP
39#endif /* __KERNEL__ */
36 40
37struct task_struct; 41struct task_struct;
38 42
diff --git a/include/asm-sparc/uaccess.h b/include/asm-sparc/uaccess.h
index 3cf132e1aa25..366b11696ee3 100644
--- a/include/asm-sparc/uaccess.h
+++ b/include/asm-sparc/uaccess.h
@@ -13,7 +13,6 @@
13#include <linux/string.h> 13#include <linux/string.h>
14#include <linux/errno.h> 14#include <linux/errno.h>
15#include <asm/vac-ops.h> 15#include <asm/vac-ops.h>
16#include <asm/a.out.h>
17#endif 16#endif
18 17
19#ifndef __ASSEMBLY__ 18#ifndef __ASSEMBLY__
diff --git a/include/asm-sparc64/a.out-core.h b/include/asm-sparc64/a.out-core.h
new file mode 100644
index 000000000000..3499b3c425ca
--- /dev/null
+++ b/include/asm-sparc64/a.out-core.h
@@ -0,0 +1,31 @@
1/* a.out coredump register dumper
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11
12#ifndef _ASM_A_OUT_CORE_H
13#define _ASM_A_OUT_CORE_H
14
15#ifdef __KERNEL__
16
17#include <linux/user.h>
18
19/*
20 * fill in the user structure for an a.out core dump
21 */
22static inline void aout_dump_thread(struct pt_regs *regs, struct user *dump)
23{
24 /* Only should be used for SunOS and ancient a.out
25 * SparcLinux binaries... Not worth implementing.
26 */
27 memset(dump, 0, sizeof(struct user));
28}
29
30#endif /* __KERNEL__ */
31#endif /* _ASM_A_OUT_CORE_H */
diff --git a/include/asm-sparc64/a.out.h b/include/asm-sparc64/a.out.h
index 902e07f89a42..53c95bdfc66e 100644
--- a/include/asm-sparc64/a.out.h
+++ b/include/asm-sparc64/a.out.h
@@ -93,18 +93,6 @@ struct relocation_info /* used when header.a_machtype == M_SPARC */
93 93
94#define N_RELOCATION_INFO_DECLARED 1 94#define N_RELOCATION_INFO_DECLARED 1
95 95
96#ifdef __KERNEL__
97
98#define STACK_TOP32 ((1UL << 32UL) - PAGE_SIZE)
99#define STACK_TOP64 (0x0000080000000000UL - (1UL << 32UL))
100
101#define STACK_TOP (test_thread_flag(TIF_32BIT) ? \
102 STACK_TOP32 : STACK_TOP64)
103
104#define STACK_TOP_MAX STACK_TOP64
105
106#endif
107
108#endif /* !(__ASSEMBLY__) */ 96#endif /* !(__ASSEMBLY__) */
109 97
110#endif /* !(__SPARC64_A_OUT_H__) */ 98#endif /* !(__SPARC64_A_OUT_H__) */
diff --git a/include/asm-sparc64/elf.h b/include/asm-sparc64/elf.h
index 272a65873f2e..11c8e68d712a 100644
--- a/include/asm-sparc64/elf.h
+++ b/include/asm-sparc64/elf.h
@@ -75,7 +75,6 @@
75/* 75/*
76 * These are used to set parameters in the core dumps. 76 * These are used to set parameters in the core dumps.
77 */ 77 */
78#ifndef ELF_ARCH
79#define ELF_ARCH EM_SPARCV9 78#define ELF_ARCH EM_SPARCV9
80#define ELF_CLASS ELFCLASS64 79#define ELF_CLASS ELFCLASS64
81#define ELF_DATA ELFDATA2MSB 80#define ELF_DATA ELFDATA2MSB
@@ -100,14 +99,59 @@ typedef struct {
100 unsigned long pr_gsr; 99 unsigned long pr_gsr;
101 unsigned long pr_fprs; 100 unsigned long pr_fprs;
102} elf_fpregset_t; 101} elf_fpregset_t;
103#endif 102
103/* Format of 32-bit elf_gregset_t is:
104 * G0 --> G7
105 * O0 --> O7
106 * L0 --> L7
107 * I0 --> I7
108 * PSR, PC, nPC, Y, WIM, TBR
109 */
110typedef unsigned int compat_elf_greg_t;
111#define COMPAT_ELF_NGREG 38
112typedef compat_elf_greg_t compat_elf_gregset_t[COMPAT_ELF_NGREG];
113
114typedef struct {
115 union {
116 unsigned int pr_regs[32];
117 unsigned long pr_dregs[16];
118 } pr_fr;
119 unsigned int __unused;
120 unsigned int pr_fsr;
121 unsigned char pr_qcnt;
122 unsigned char pr_q_entrysize;
123 unsigned char pr_en;
124 unsigned int pr_q[64];
125} compat_elf_fpregset_t;
126
127/* UltraSparc extensions. Still unused, but will be eventually. */
128typedef struct {
129 unsigned int pr_type;
130 unsigned int pr_align;
131 union {
132 struct {
133 union {
134 unsigned int pr_regs[32];
135 unsigned long pr_dregs[16];
136 long double pr_qregs[8];
137 } pr_xfr;
138 } pr_v8p;
139 unsigned int pr_xfsr;
140 unsigned int pr_fprs;
141 unsigned int pr_xg[8];
142 unsigned int pr_xo[8];
143 unsigned long pr_tstate;
144 unsigned int pr_filler[8];
145 } pr_un;
146} elf_xregset_t;
104 147
105/* 148/*
106 * This is used to ensure we don't load something for the wrong architecture. 149 * This is used to ensure we don't load something for the wrong architecture.
107 */ 150 */
108#ifndef elf_check_arch 151#define elf_check_arch(x) ((x)->e_machine == ELF_ARCH)
109#define elf_check_arch(x) ((x)->e_machine == ELF_ARCH) /* Might be EM_SPARCV9 or EM_SPARC */ 152#define compat_elf_check_arch(x) ((x)->e_machine == EM_SPARC || \
110#endif 153 (x)->e_machine == EM_SPARC32PLUS)
154#define compat_start_thread start_thread32
111 155
112#define USE_ELF_CORE_DUMP 156#define USE_ELF_CORE_DUMP
113#define ELF_EXEC_PAGESIZE PAGE_SIZE 157#define ELF_EXEC_PAGESIZE PAGE_SIZE
@@ -117,9 +161,8 @@ typedef struct {
117 the loader. We need to make sure that it is out of the way of the program 161 the loader. We need to make sure that it is out of the way of the program
118 that it will "exec", and that there is sufficient room for the brk. */ 162 that it will "exec", and that there is sufficient room for the brk. */
119 163
120#ifndef ELF_ET_DYN_BASE 164#define ELF_ET_DYN_BASE 0x0000010000000000UL
121#define ELF_ET_DYN_BASE 0x0000010000000000UL 165#define COMPAT_ELF_ET_DYN_BASE 0x0000000070000000UL
122#endif
123 166
124 167
125/* This yields a mask that user programs can use to figure out what 168/* This yields a mask that user programs can use to figure out what
diff --git a/include/asm-sparc64/page.h b/include/asm-sparc64/page.h
index cdf950e017ee..e93a482aa24a 100644
--- a/include/asm-sparc64/page.h
+++ b/include/asm-sparc64/page.h
@@ -104,6 +104,8 @@ typedef unsigned long pgprot_t;
104 104
105#endif /* (STRICT_MM_TYPECHECKS) */ 105#endif /* (STRICT_MM_TYPECHECKS) */
106 106
107typedef struct page *pgtable_t;
108
107#define TASK_UNMAPPED_BASE (test_thread_flag(TIF_32BIT) ? \ 109#define TASK_UNMAPPED_BASE (test_thread_flag(TIF_32BIT) ? \
108 (_AC(0x0000000070000000,UL)) : \ 110 (_AC(0x0000000070000000,UL)) : \
109 (_AC(0xfffff80000000000,UL) + (1UL << 32UL))) 111 (_AC(0xfffff80000000000,UL) + (1UL << 32UL)))
diff --git a/include/asm-sparc64/pgalloc.h b/include/asm-sparc64/pgalloc.h
index b48f73c2274e..3ee2d406373b 100644
--- a/include/asm-sparc64/pgalloc.h
+++ b/include/asm-sparc64/pgalloc.h
@@ -43,11 +43,18 @@ static inline pte_t *pte_alloc_one_kernel(struct mm_struct *mm,
43 return quicklist_alloc(0, GFP_KERNEL, NULL); 43 return quicklist_alloc(0, GFP_KERNEL, NULL);
44} 44}
45 45
46static inline struct page *pte_alloc_one(struct mm_struct *mm, 46static inline pgtable_t pte_alloc_one(struct mm_struct *mm,
47 unsigned long address) 47 unsigned long address)
48{ 48{
49 void *pg = quicklist_alloc(0, GFP_KERNEL, NULL); 49 struct page *page;
50 return pg ? virt_to_page(pg) : NULL; 50 void *pg;
51
52 pg = quicklist_alloc(0, GFP_KERNEL, NULL);
53 if (!pg)
54 return NULL;
55 page = virt_to_page(pg);
56 pgtable_page_ctor(page);
57 return page;
51} 58}
52 59
53static inline void pte_free_kernel(struct mm_struct *mm, pte_t *pte) 60static inline void pte_free_kernel(struct mm_struct *mm, pte_t *pte)
@@ -55,8 +62,9 @@ static inline void pte_free_kernel(struct mm_struct *mm, pte_t *pte)
55 quicklist_free(0, NULL, pte); 62 quicklist_free(0, NULL, pte);
56} 63}
57 64
58static inline void pte_free(struct mm_struct *mm, struct page *ptepage) 65static inline void pte_free(struct mm_struct *mm, pgtable_t ptepage)
59{ 66{
67 pgtable_page_dtor(ptepage);
60 quicklist_free_page(0, NULL, ptepage); 68 quicklist_free_page(0, NULL, ptepage);
61} 69}
62 70
@@ -64,6 +72,7 @@ static inline void pte_free(struct mm_struct *mm, struct page *ptepage)
64#define pmd_populate_kernel(MM, PMD, PTE) pmd_set(PMD, PTE) 72#define pmd_populate_kernel(MM, PMD, PTE) pmd_set(PMD, PTE)
65#define pmd_populate(MM,PMD,PTE_PAGE) \ 73#define pmd_populate(MM,PMD,PTE_PAGE) \
66 pmd_populate_kernel(MM,PMD,page_address(PTE_PAGE)) 74 pmd_populate_kernel(MM,PMD,page_address(PTE_PAGE))
75#define pmd_pgtable(pmd) pmd_page(pmd)
67 76
68static inline void check_pgt_cache(void) 77static inline void check_pgt_cache(void)
69{ 78{
diff --git a/include/asm-sparc64/posix_types.h b/include/asm-sparc64/posix_types.h
index 3426a65ecd35..4eaaa0196636 100644
--- a/include/asm-sparc64/posix_types.h
+++ b/include/asm-sparc64/posix_types.h
@@ -43,14 +43,10 @@ typedef long long __kernel_loff_t;
43#endif 43#endif
44 44
45typedef struct { 45typedef struct {
46#if defined(__KERNEL__) || defined(__USE_ALL)
47 int val[2]; 46 int val[2];
48#else /* !defined(__KERNEL__) && !defined(__USE_ALL) */
49 int __val[2];
50#endif /* !defined(__KERNEL__) && !defined(__USE_ALL) */
51} __kernel_fsid_t; 47} __kernel_fsid_t;
52 48
53#if defined(__KERNEL__) || !defined(__GLIBC__) || (__GLIBC__ < 2) 49#if defined(__KERNEL__)
54 50
55#undef __FD_SET 51#undef __FD_SET
56static inline void __FD_SET(unsigned long fd, __kernel_fd_set *fdsetp) 52static inline void __FD_SET(unsigned long fd, __kernel_fd_set *fdsetp)
@@ -121,6 +117,6 @@ static inline void __FD_ZERO(__kernel_fd_set *p)
121 } 117 }
122} 118}
123 119
124#endif /* defined(__KERNEL__) || !defined(__GLIBC__) || (__GLIBC__ < 2) */ 120#endif /* defined(__KERNEL__) */
125 121
126#endif /* !(__ARCH_SPARC64_POSIX_TYPES_H) */ 122#endif /* !(__ARCH_SPARC64_POSIX_TYPES_H) */
diff --git a/include/asm-sparc64/processor.h b/include/asm-sparc64/processor.h
index 66dd2fa0e319..8da484c19822 100644
--- a/include/asm-sparc64/processor.h
+++ b/include/asm-sparc64/processor.h
@@ -14,7 +14,6 @@
14#define current_text_addr() ({ void *pc; __asm__("rd %%pc, %0" : "=r" (pc)); pc; }) 14#define current_text_addr() ({ void *pc; __asm__("rd %%pc, %0" : "=r" (pc)); pc; })
15 15
16#include <asm/asi.h> 16#include <asm/asi.h>
17#include <asm/a.out.h>
18#include <asm/pstate.h> 17#include <asm/pstate.h>
19#include <asm/ptrace.h> 18#include <asm/ptrace.h>
20#include <asm/page.h> 19#include <asm/page.h>
@@ -36,7 +35,19 @@
36#else 35#else
37#define VPTE_SIZE (1 << (VA_BITS - PAGE_SHIFT + 3)) 36#define VPTE_SIZE (1 << (VA_BITS - PAGE_SHIFT + 3))
38#endif 37#endif
38
39#define TASK_SIZE ((unsigned long)-VPTE_SIZE) 39#define TASK_SIZE ((unsigned long)-VPTE_SIZE)
40#ifdef __KERNEL__
41
42#define STACK_TOP32 ((1UL << 32UL) - PAGE_SIZE)
43#define STACK_TOP64 (0x0000080000000000UL - (1UL << 32UL))
44
45#define STACK_TOP (test_thread_flag(TIF_32BIT) ? \
46 STACK_TOP32 : STACK_TOP64)
47
48#define STACK_TOP_MAX STACK_TOP64
49
50#endif
40 51
41#ifndef __ASSEMBLY__ 52#ifndef __ASSEMBLY__
42 53
diff --git a/include/asm-sparc64/ptrace.h b/include/asm-sparc64/ptrace.h
index 734a767f0a4e..8617c3a5143b 100644
--- a/include/asm-sparc64/ptrace.h
+++ b/include/asm-sparc64/ptrace.h
@@ -95,6 +95,8 @@ struct sparc_trapf {
95 95
96#ifdef __KERNEL__ 96#ifdef __KERNEL__
97 97
98#define __ARCH_WANT_COMPAT_SYS_PTRACE
99
98#define force_successful_syscall_return() \ 100#define force_successful_syscall_return() \
99do { current_thread_info()->syscall_noerror = 1; \ 101do { current_thread_info()->syscall_noerror = 1; \
100} while (0) 102} while (0)
diff --git a/include/asm-sparc64/uaccess.h b/include/asm-sparc64/uaccess.h
index 93720e7b0289..d8547b87e730 100644
--- a/include/asm-sparc64/uaccess.h
+++ b/include/asm-sparc64/uaccess.h
@@ -10,7 +10,6 @@
10#include <linux/compiler.h> 10#include <linux/compiler.h>
11#include <linux/sched.h> 11#include <linux/sched.h>
12#include <linux/string.h> 12#include <linux/string.h>
13#include <asm/a.out.h>
14#include <asm/asi.h> 13#include <asm/asi.h>
15#include <asm/system.h> 14#include <asm/system.h>
16#include <asm/spitfire.h> 15#include <asm/spitfire.h>
diff --git a/include/asm-sparc64/user.h b/include/asm-sparc64/user.h
index fce4e857dfc3..02b138943837 100644
--- a/include/asm-sparc64/user.h
+++ b/include/asm-sparc64/user.h
@@ -8,7 +8,7 @@
8#ifndef _SPARC64_USER_H 8#ifndef _SPARC64_USER_H
9#define _SPARC64_USER_H 9#define _SPARC64_USER_H
10 10
11#include <asm/a.out.h> 11#include <linux/a.out.h>
12struct sunos_regs { 12struct sunos_regs {
13 unsigned int psr, pc, npc, y; 13 unsigned int psr, pc, npc, y;
14 unsigned int regs[15]; 14 unsigned int regs[15];
diff --git a/include/asm-um/a.out-core.h b/include/asm-um/a.out-core.h
new file mode 100644
index 000000000000..995643b18309
--- /dev/null
+++ b/include/asm-um/a.out-core.h
@@ -0,0 +1,27 @@
1/* a.out coredump register dumper
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11
12#ifndef __UM_A_OUT_CORE_H
13#define __UM_A_OUT_CORE_H
14
15#ifdef __KERNEL__
16
17#include <linux/user.h>
18
19/*
20 * fill in the user structure for an a.out core dump
21 */
22static inline void aout_dump_thread(struct pt_regs *regs, struct user *u)
23{
24}
25
26#endif /* __KERNEL__ */
27#endif /* __UM_A_OUT_CORE_H */
diff --git a/include/asm-um/a.out.h b/include/asm-um/a.out.h
index f42ff14577fa..754181ee8683 100644
--- a/include/asm-um/a.out.h
+++ b/include/asm-um/a.out.h
@@ -8,15 +8,4 @@
8 8
9#include "asm/arch/a.out.h" 9#include "asm/arch/a.out.h"
10 10
11#undef STACK_TOP
12#undef STACK_TOP_MAX
13
14extern unsigned long stacksizelim;
15
16#define STACK_ROOM (stacksizelim)
17
18#define STACK_TOP (TASK_SIZE - 2 * PAGE_SIZE)
19
20#define STACK_TOP_MAX STACK_TOP
21
22#endif 11#endif
diff --git a/include/asm-um/fixmap.h b/include/asm-um/fixmap.h
index 89a87c18b927..9d2be52b8655 100644
--- a/include/asm-um/fixmap.h
+++ b/include/asm-um/fixmap.h
@@ -1,6 +1,7 @@
1#ifndef __UM_FIXMAP_H 1#ifndef __UM_FIXMAP_H
2#define __UM_FIXMAP_H 2#define __UM_FIXMAP_H
3 3
4#include <asm/processor.h>
4#include <asm/system.h> 5#include <asm/system.h>
5#include <asm/kmap_types.h> 6#include <asm/kmap_types.h>
6#include <asm/archparam.h> 7#include <asm/archparam.h>
@@ -57,7 +58,7 @@ extern void __set_fixmap (enum fixed_addresses idx,
57 * at the top of mem.. 58 * at the top of mem..
58 */ 59 */
59 60
60#define FIXADDR_TOP (CONFIG_TOP_ADDR - 2 * PAGE_SIZE) 61#define FIXADDR_TOP (TASK_SIZE - 2 * PAGE_SIZE)
61#define FIXADDR_SIZE (__end_of_fixed_addresses << PAGE_SHIFT) 62#define FIXADDR_SIZE (__end_of_fixed_addresses << PAGE_SHIFT)
62#define FIXADDR_START (FIXADDR_TOP - FIXADDR_SIZE) 63#define FIXADDR_START (FIXADDR_TOP - FIXADDR_SIZE)
63 64
diff --git a/include/asm-um/page.h b/include/asm-um/page.h
index fe2374d705d1..381f96b1c825 100644
--- a/include/asm-um/page.h
+++ b/include/asm-um/page.h
@@ -79,6 +79,8 @@ typedef unsigned long phys_t;
79 79
80typedef struct { unsigned long pgprot; } pgprot_t; 80typedef struct { unsigned long pgprot; } pgprot_t;
81 81
82typedef struct page *pgtable_t;
83
82#define pgd_val(x) ((x).pgd) 84#define pgd_val(x) ((x).pgd)
83#define pgprot_val(x) ((x).pgprot) 85#define pgprot_val(x) ((x).pgprot)
84 86
diff --git a/include/asm-um/pgalloc.h b/include/asm-um/pgalloc.h
index 4f3e62b02861..9062a6e72241 100644
--- a/include/asm-um/pgalloc.h
+++ b/include/asm-um/pgalloc.h
@@ -18,6 +18,7 @@
18 set_pmd(pmd, __pmd(_PAGE_TABLE + \ 18 set_pmd(pmd, __pmd(_PAGE_TABLE + \
19 ((unsigned long long)page_to_pfn(pte) << \ 19 ((unsigned long long)page_to_pfn(pte) << \
20 (unsigned long long) PAGE_SHIFT))) 20 (unsigned long long) PAGE_SHIFT)))
21#define pmd_pgtable(pmd) pmd_page(pmd)
21 22
22/* 23/*
23 * Allocate and free page tables. 24 * Allocate and free page tables.
@@ -26,19 +27,24 @@ extern pgd_t *pgd_alloc(struct mm_struct *);
26extern void pgd_free(struct mm_struct *mm, pgd_t *pgd); 27extern void pgd_free(struct mm_struct *mm, pgd_t *pgd);
27 28
28extern pte_t *pte_alloc_one_kernel(struct mm_struct *, unsigned long); 29extern pte_t *pte_alloc_one_kernel(struct mm_struct *, unsigned long);
29extern struct page *pte_alloc_one(struct mm_struct *, unsigned long); 30extern pgtable_t pte_alloc_one(struct mm_struct *, unsigned long);
30 31
31static inline void pte_free_kernel(struct mm_struct *mm, pte_t *pte) 32static inline void pte_free_kernel(struct mm_struct *mm, pte_t *pte)
32{ 33{
33 free_page((unsigned long) pte); 34 free_page((unsigned long) pte);
34} 35}
35 36
36static inline void pte_free(struct mm_struct *mm, struct page *pte) 37static inline void pte_free(struct mm_struct *mm, pgtable_t pte)
37{ 38{
39 pgtable_page_dtor(pte);
38 __free_page(pte); 40 __free_page(pte);
39} 41}
40 42
41#define __pte_free_tlb(tlb,pte) tlb_remove_page((tlb),(pte)) 43#define __pte_free_tlb(tlb,pte) \
44do { \
45 pgtable_page_dtor(pte); \
46 tlb_remove_page((tlb),(pte)); \
47} while (0)
42 48
43#ifdef CONFIG_3_LEVEL_PGTABLES 49#ifdef CONFIG_3_LEVEL_PGTABLES
44 50
diff --git a/include/asm-um/processor-generic.h b/include/asm-um/processor-generic.h
index b7d9a16a7451..bed668824b5f 100644
--- a/include/asm-um/processor-generic.h
+++ b/include/asm-um/processor-generic.h
@@ -11,7 +11,6 @@ struct pt_regs;
11struct task_struct; 11struct task_struct;
12 12
13#include "asm/ptrace.h" 13#include "asm/ptrace.h"
14#include "asm/pgtable.h"
15#include "registers.h" 14#include "registers.h"
16#include "sysdep/archsetjmp.h" 15#include "sysdep/archsetjmp.h"
17 16
@@ -92,7 +91,18 @@ static inline void mm_copy_segments(struct mm_struct *from_mm,
92/* 91/*
93 * User space process size: 3GB (default). 92 * User space process size: 3GB (default).
94 */ 93 */
95#define TASK_SIZE (CONFIG_TOP_ADDR & PGDIR_MASK) 94extern unsigned long task_size;
95
96#define TASK_SIZE (task_size)
97
98#undef STACK_TOP
99#undef STACK_TOP_MAX
100
101extern unsigned long stacksizelim;
102
103#define STACK_ROOM (stacksizelim)
104#define STACK_TOP (TASK_SIZE - 2 * PAGE_SIZE)
105#define STACK_TOP_MAX STACK_TOP
96 106
97/* This decides where the kernel will search for a free chunk of vm 107/* This decides where the kernel will search for a free chunk of vm
98 * space during mmap's. 108 * space during mmap's.
diff --git a/include/asm-um/processor-x86_64.h b/include/asm-um/processor-x86_64.h
index d946bf2d334a..e50933175e91 100644
--- a/include/asm-um/processor-x86_64.h
+++ b/include/asm-um/processor-x86_64.h
@@ -26,7 +26,7 @@ static inline void rep_nop(void)
26#define cpu_relax() rep_nop() 26#define cpu_relax() rep_nop()
27 27
28#define INIT_ARCH_THREAD { .debugregs = { [ 0 ... 7 ] = 0 }, \ 28#define INIT_ARCH_THREAD { .debugregs = { [ 0 ... 7 ] = 0 }, \
29 .debugregs_seq = 0, \ 29 .debugregs_seq = 0, \
30 .fs = 0, \ 30 .fs = 0, \
31 .faultinfo = { 0, 0, 0 } } 31 .faultinfo = { 0, 0, 0 } }
32 32
@@ -37,6 +37,7 @@ static inline void arch_flush_thread(struct arch_thread *thread)
37static inline void arch_copy_thread(struct arch_thread *from, 37static inline void arch_copy_thread(struct arch_thread *from,
38 struct arch_thread *to) 38 struct arch_thread *to)
39{ 39{
40 to->fs = from->fs;
40} 41}
41 42
42#include "asm/arch/user.h" 43#include "asm/arch/user.h"
diff --git a/include/asm-v850/anna.h b/include/asm-v850/anna.h
index 3be77d5ecfce..cd5eaee103b0 100644
--- a/include/asm-v850/anna.h
+++ b/include/asm-v850/anna.h
@@ -134,10 +134,4 @@ extern void anna_uart_pre_configure (unsigned chan,
134#define V850E_TIMER_D_TMCD_CS_MIN 1 /* min 2^1 divider */ 134#define V850E_TIMER_D_TMCD_CS_MIN 1 /* min 2^1 divider */
135 135
136 136
137/* For <asm/param.h> */
138#ifndef HZ
139#define HZ 100
140#endif
141
142
143#endif /* __V850_ANNA_H__ */ 137#endif /* __V850_ANNA_H__ */
diff --git a/include/asm-v850/as85ep1.h b/include/asm-v850/as85ep1.h
index 659bc910ffd7..5a5ca9073d09 100644
--- a/include/asm-v850/as85ep1.h
+++ b/include/asm-v850/as85ep1.h
@@ -149,10 +149,4 @@ extern void as85ep1_uart_pre_configure (unsigned chan,
149#define V850E_TIMER_D_TMCD_CS_MIN 2 /* min 2^2 divider */ 149#define V850E_TIMER_D_TMCD_CS_MIN 2 /* min 2^2 divider */
150 150
151 151
152/* For <asm/param.h> */
153#ifndef HZ
154#define HZ 100
155#endif
156
157
158#endif /* __V850_AS85EP1_H__ */ 152#endif /* __V850_AS85EP1_H__ */
diff --git a/include/asm-v850/fpga85e2c.h b/include/asm-v850/fpga85e2c.h
index d32f04504b13..23aae666c718 100644
--- a/include/asm-v850/fpga85e2c.h
+++ b/include/asm-v850/fpga85e2c.h
@@ -79,10 +79,4 @@ extern char _r0_ram;
79#endif 79#endif
80 80
81 81
82/* For <asm/param.h> */
83#ifndef HZ
84#define HZ 122 /* actually, 8.192ms ticks =~ 122.07 */
85#endif
86
87
88#endif /* __V850_FPGA85E2C_H__ */ 82#endif /* __V850_FPGA85E2C_H__ */
diff --git a/include/asm-v850/param.h b/include/asm-v850/param.h
index 3c65bd573782..281832690290 100644
--- a/include/asm-v850/param.h
+++ b/include/asm-v850/param.h
@@ -23,8 +23,7 @@
23#define MAXHOSTNAMELEN 64 /* max length of hostname */ 23#define MAXHOSTNAMELEN 64 /* max length of hostname */
24 24
25#ifdef __KERNEL__ 25#ifdef __KERNEL__
26#include <asm/machdep.h> /* For HZ */ 26# define HZ CONFIG_HZ
27
28# define USER_HZ 100 27# define USER_HZ 100
29# define CLOCKS_PER_SEC USER_HZ 28# define CLOCKS_PER_SEC USER_HZ
30#endif 29#endif
diff --git a/include/asm-v850/posix_types.h b/include/asm-v850/posix_types.h
index ccb7297a0edc..7f403b765390 100644
--- a/include/asm-v850/posix_types.h
+++ b/include/asm-v850/posix_types.h
@@ -44,15 +44,11 @@ typedef __kernel_uid_t __kernel_old_uid_t;
44typedef unsigned int __kernel_old_dev_t; 44typedef unsigned int __kernel_old_dev_t;
45 45
46typedef struct { 46typedef struct {
47#if defined(__KERNEL__) || defined(__USE_ALL)
48 int val[2]; 47 int val[2];
49#else /* !defined(__KERNEL__) && !defined(__USE_ALL) */
50 int __val[2];
51#endif /* !defined(__KERNEL__) && !defined(__USE_ALL) */
52} __kernel_fsid_t; 48} __kernel_fsid_t;
53 49
54 50
55#if defined(__KERNEL__) || !defined(__GLIBC__) || (__GLIBC__ < 2) 51#if defined(__KERNEL__)
56 52
57/* We used to include <asm/bitops.h> here, which seems the right thing, but 53/* We used to include <asm/bitops.h> here, which seems the right thing, but
58 it caused nasty include-file definition order problems. Removing the 54 it caused nasty include-file definition order problems. Removing the
@@ -71,6 +67,6 @@ typedef struct {
71#define __FD_ZERO(fd_set) \ 67#define __FD_ZERO(fd_set) \
72 memset (fd_set, 0, sizeof (*(fd_set *)fd_set)) 68 memset (fd_set, 0, sizeof (*(fd_set *)fd_set))
73 69
74#endif /* defined(__KERNEL__) || !defined(__GLIBC__) || (__GLIBC__ < 2) */ 70#endif /* defined(__KERNEL__) */
75 71
76#endif /* __V850_POSIX_TYPES_H__ */ 72#endif /* __V850_POSIX_TYPES_H__ */
diff --git a/include/asm-v850/rte_cb.h b/include/asm-v850/rte_cb.h
index e85d261b79bf..db9879f00aa7 100644
--- a/include/asm-v850/rte_cb.h
+++ b/include/asm-v850/rte_cb.h
@@ -69,12 +69,6 @@
69#endif /* CONFIG_RTE_MB_A_PCI */ 69#endif /* CONFIG_RTE_MB_A_PCI */
70 70
71 71
72/* For <asm/param.h> */
73#ifndef HZ
74#define HZ 100
75#endif
76
77
78#ifndef __ASSEMBLY__ 72#ifndef __ASSEMBLY__
79extern void rte_cb_early_init (void); 73extern void rte_cb_early_init (void);
80extern void rte_cb_init_irqs (void); 74extern void rte_cb_init_irqs (void);
diff --git a/include/asm-v850/sim.h b/include/asm-v850/sim.h
index 10236abbe9be..026932d476cd 100644
--- a/include/asm-v850/sim.h
+++ b/include/asm-v850/sim.h
@@ -40,11 +40,6 @@
40#define R0_RAM_ADDR 0xFFFFF000 40#define R0_RAM_ADDR 0xFFFFF000
41 41
42 42
43/* For <asm/param.h> */
44#ifndef HZ
45#define HZ 24 /* Minimum supported frequency. */
46#endif
47
48/* For <asm/irq.h> */ 43/* For <asm/irq.h> */
49#define NUM_CPU_IRQS 6 44#define NUM_CPU_IRQS 6
50 45
diff --git a/include/asm-v850/sim85e2.h b/include/asm-v850/sim85e2.h
index 17dd4fa318e6..8b4d6974066c 100644
--- a/include/asm-v850/sim85e2.h
+++ b/include/asm-v850/sim85e2.h
@@ -66,10 +66,4 @@
66#define R0_RAM_ADDR 0xFFFFE000 66#define R0_RAM_ADDR 0xFFFFE000
67 67
68 68
69/* For <asm/param.h> */
70#ifndef HZ
71#define HZ 24 /* Minimum supported frequency. */
72#endif
73
74
75#endif /* __V850_SIM85E2_H__ */ 69#endif /* __V850_SIM85E2_H__ */
diff --git a/include/asm-x86/a.out-core.h b/include/asm-x86/a.out-core.h
new file mode 100644
index 000000000000..d2b6e11d3e97
--- /dev/null
+++ b/include/asm-x86/a.out-core.h
@@ -0,0 +1,71 @@
1/* a.out coredump register dumper
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11
12#ifndef _ASM_A_OUT_CORE_H
13#define _ASM_A_OUT_CORE_H
14
15#ifdef __KERNEL__
16#ifdef CONFIG_X86_32
17
18#include <linux/user.h>
19#include <linux/elfcore.h>
20
21/*
22 * fill in the user structure for an a.out core dump
23 */
24static inline void aout_dump_thread(struct pt_regs *regs, struct user *dump)
25{
26 u16 gs;
27
28/* changed the size calculations - should hopefully work better. lbt */
29 dump->magic = CMAGIC;
30 dump->start_code = 0;
31 dump->start_stack = regs->sp & ~(PAGE_SIZE - 1);
32 dump->u_tsize = ((unsigned long) current->mm->end_code) >> PAGE_SHIFT;
33 dump->u_dsize = ((unsigned long) (current->mm->brk + (PAGE_SIZE-1))) >> PAGE_SHIFT;
34 dump->u_dsize -= dump->u_tsize;
35 dump->u_ssize = 0;
36 dump->u_debugreg[0] = current->thread.debugreg0;
37 dump->u_debugreg[1] = current->thread.debugreg1;
38 dump->u_debugreg[2] = current->thread.debugreg2;
39 dump->u_debugreg[3] = current->thread.debugreg3;
40 dump->u_debugreg[4] = 0;
41 dump->u_debugreg[5] = 0;
42 dump->u_debugreg[6] = current->thread.debugreg6;
43 dump->u_debugreg[7] = current->thread.debugreg7;
44
45 if (dump->start_stack < TASK_SIZE)
46 dump->u_ssize = ((unsigned long) (TASK_SIZE - dump->start_stack)) >> PAGE_SHIFT;
47
48 dump->regs.bx = regs->bx;
49 dump->regs.cx = regs->cx;
50 dump->regs.dx = regs->dx;
51 dump->regs.si = regs->si;
52 dump->regs.di = regs->di;
53 dump->regs.bp = regs->bp;
54 dump->regs.ax = regs->ax;
55 dump->regs.ds = (u16)regs->ds;
56 dump->regs.es = (u16)regs->es;
57 dump->regs.fs = (u16)regs->fs;
58 savesegment(gs,gs);
59 dump->regs.orig_ax = regs->orig_ax;
60 dump->regs.ip = regs->ip;
61 dump->regs.cs = (u16)regs->cs;
62 dump->regs.flags = regs->flags;
63 dump->regs.sp = regs->sp;
64 dump->regs.ss = (u16)regs->ss;
65
66 dump->u_fpvalid = dump_fpu (regs, &dump->i387);
67}
68
69#endif /* CONFIG_X86_32 */
70#endif /* __KERNEL__ */
71#endif /* _ASM_A_OUT_CORE_H */
diff --git a/include/asm-x86/a.out.h b/include/asm-x86/a.out.h
index a62443e38eb8..4684f97a5bbd 100644
--- a/include/asm-x86/a.out.h
+++ b/include/asm-x86/a.out.h
@@ -17,14 +17,4 @@ struct exec
17#define N_DRSIZE(a) ((a).a_drsize) 17#define N_DRSIZE(a) ((a).a_drsize)
18#define N_SYMSIZE(a) ((a).a_syms) 18#define N_SYMSIZE(a) ((a).a_syms)
19 19
20#ifdef __KERNEL__
21# include <linux/thread_info.h>
22# define STACK_TOP TASK_SIZE
23# ifdef CONFIG_X86_32
24# define STACK_TOP_MAX STACK_TOP
25# else
26# define STACK_TOP_MAX TASK_SIZE64
27# endif
28#endif
29
30#endif /* _ASM_X86_A_OUT_H */ 20#endif /* _ASM_X86_A_OUT_H */
diff --git a/include/asm-x86/page_32.h b/include/asm-x86/page_32.h
index a6fd10f230d2..984998a30741 100644
--- a/include/asm-x86/page_32.h
+++ b/include/asm-x86/page_32.h
@@ -53,6 +53,10 @@ typedef pte_t boot_pte_t;
53#endif /* __ASSEMBLY__ */ 53#endif /* __ASSEMBLY__ */
54#endif /* CONFIG_X86_PAE */ 54#endif /* CONFIG_X86_PAE */
55 55
56#ifndef __ASSEMBLY__
57typedef struct page *pgtable_t;
58#endif
59
56#ifdef CONFIG_HUGETLB_PAGE 60#ifdef CONFIG_HUGETLB_PAGE
57#define HAVE_ARCH_HUGETLB_UNMAPPED_AREA 61#define HAVE_ARCH_HUGETLB_UNMAPPED_AREA
58#endif 62#endif
diff --git a/include/asm-x86/page_64.h b/include/asm-x86/page_64.h
index dcf0c0746075..f7393bc516ef 100644
--- a/include/asm-x86/page_64.h
+++ b/include/asm-x86/page_64.h
@@ -71,6 +71,8 @@ typedef unsigned long pgdval_t;
71typedef unsigned long pgprotval_t; 71typedef unsigned long pgprotval_t;
72typedef unsigned long phys_addr_t; 72typedef unsigned long phys_addr_t;
73 73
74typedef struct page *pgtable_t;
75
74typedef struct { pteval_t pte; } pte_t; 76typedef struct { pteval_t pte; } pte_t;
75 77
76#define vmemmap ((struct page *)VMEMMAP_START) 78#define vmemmap ((struct page *)VMEMMAP_START)
diff --git a/include/asm-x86/pgalloc_32.h b/include/asm-x86/pgalloc_32.h
index bab12718a913..6bea6e5b5ee5 100644
--- a/include/asm-x86/pgalloc_32.h
+++ b/include/asm-x86/pgalloc_32.h
@@ -31,6 +31,7 @@ static inline void pmd_populate(struct mm_struct *mm, pmd_t *pmd, struct page *p
31 paravirt_alloc_pt(mm, pfn); 31 paravirt_alloc_pt(mm, pfn);
32 set_pmd(pmd, __pmd(((pteval_t)pfn << PAGE_SHIFT) | _PAGE_TABLE)); 32 set_pmd(pmd, __pmd(((pteval_t)pfn << PAGE_SHIFT) | _PAGE_TABLE));
33} 33}
34#define pmd_pgtable(pmd) pmd_page(pmd)
34 35
35/* 36/*
36 * Allocate and free page tables. 37 * Allocate and free page tables.
@@ -39,15 +40,16 @@ extern pgd_t *pgd_alloc(struct mm_struct *);
39extern void pgd_free(struct mm_struct *mm, pgd_t *pgd); 40extern void pgd_free(struct mm_struct *mm, pgd_t *pgd);
40 41
41extern pte_t *pte_alloc_one_kernel(struct mm_struct *, unsigned long); 42extern pte_t *pte_alloc_one_kernel(struct mm_struct *, unsigned long);
42extern struct page *pte_alloc_one(struct mm_struct *, unsigned long); 43extern pgtable_t pte_alloc_one(struct mm_struct *, unsigned long);
43 44
44static inline void pte_free_kernel(struct mm_struct *mm, pte_t *pte) 45static inline void pte_free_kernel(struct mm_struct *mm, pte_t *pte)
45{ 46{
46 free_page((unsigned long)pte); 47 free_page((unsigned long)pte);
47} 48}
48 49
49static inline void pte_free(struct mm_struct *mm, struct page *pte) 50static inline void pte_free(struct mm_struct *mm, pgtable_t pte)
50{ 51{
52 pgtable_page_dtor(pte);
51 __free_page(pte); 53 __free_page(pte);
52} 54}
53 55
diff --git a/include/asm-x86/pgalloc_64.h b/include/asm-x86/pgalloc_64.h
index 4f6220db22b1..8d6722320dcc 100644
--- a/include/asm-x86/pgalloc_64.h
+++ b/include/asm-x86/pgalloc_64.h
@@ -12,6 +12,8 @@
12#define pgd_populate(mm, pgd, pud) \ 12#define pgd_populate(mm, pgd, pud) \
13 set_pgd(pgd, __pgd(_PAGE_TABLE | __pa(pud))) 13 set_pgd(pgd, __pgd(_PAGE_TABLE | __pa(pud)))
14 14
15#define pmd_pgtable(pmd) pmd_page(pmd)
16
15static inline void pmd_populate(struct mm_struct *mm, pmd_t *pmd, struct page *pte) 17static inline void pmd_populate(struct mm_struct *mm, pmd_t *pmd, struct page *pte)
16{ 18{
17 set_pmd(pmd, __pmd(_PAGE_TABLE | (page_to_pfn(pte) << PAGE_SHIFT))); 19 set_pmd(pmd, __pmd(_PAGE_TABLE | (page_to_pfn(pte) << PAGE_SHIFT)));
@@ -91,12 +93,17 @@ static inline pte_t *pte_alloc_one_kernel(struct mm_struct *mm, unsigned long ad
91 return (pte_t *)get_zeroed_page(GFP_KERNEL|__GFP_REPEAT); 93 return (pte_t *)get_zeroed_page(GFP_KERNEL|__GFP_REPEAT);
92} 94}
93 95
94static inline struct page *pte_alloc_one(struct mm_struct *mm, unsigned long address) 96static inline pgtable_t pte_alloc_one(struct mm_struct *mm, unsigned long address)
95{ 97{
96 void *p = (void *)get_zeroed_page(GFP_KERNEL|__GFP_REPEAT); 98 struct page *page;
99 void *p;
100
101 p = (void *)get_zeroed_page(GFP_KERNEL|__GFP_REPEAT);
97 if (!p) 102 if (!p)
98 return NULL; 103 return NULL;
99 return virt_to_page(p); 104 page = virt_to_page(p);
105 pgtable_page_ctor(page);
106 return page;
100} 107}
101 108
102/* Should really implement gc for free page table pages. This could be 109/* Should really implement gc for free page table pages. This could be
@@ -108,12 +115,17 @@ static inline void pte_free_kernel(struct mm_struct *mm, pte_t *pte)
108 free_page((unsigned long)pte); 115 free_page((unsigned long)pte);
109} 116}
110 117
111static inline void pte_free(struct mm_struct *mm, struct page *pte) 118static inline void pte_free(struct mm_struct *mm, pgtable_t pte)
112{ 119{
120 pgtable_page_dtor(pte);
113 __free_page(pte); 121 __free_page(pte);
114} 122}
115 123
116#define __pte_free_tlb(tlb,pte) tlb_remove_page((tlb),(pte)) 124#define __pte_free_tlb(tlb,pte) \
125do { \
126 pgtable_page_dtor((pte)); \
127 tlb_remove_page((tlb), (pte)); \
128} while (0)
117 129
118#define __pmd_free_tlb(tlb,x) tlb_remove_page((tlb),virt_to_page(x)) 130#define __pmd_free_tlb(tlb,x) tlb_remove_page((tlb),virt_to_page(x))
119#define __pud_free_tlb(tlb,x) tlb_remove_page((tlb),virt_to_page(x)) 131#define __pud_free_tlb(tlb,x) tlb_remove_page((tlb),virt_to_page(x))
diff --git a/include/asm-x86/posix_types_32.h b/include/asm-x86/posix_types_32.h
index 133e31e7dfde..015e539cdef5 100644
--- a/include/asm-x86/posix_types_32.h
+++ b/include/asm-x86/posix_types_32.h
@@ -39,14 +39,10 @@ typedef long long __kernel_loff_t;
39#endif 39#endif
40 40
41typedef struct { 41typedef struct {
42#if defined(__KERNEL__) || defined(__USE_ALL)
43 int val[2]; 42 int val[2];
44#else /* !defined(__KERNEL__) && !defined(__USE_ALL) */
45 int __val[2];
46#endif /* !defined(__KERNEL__) && !defined(__USE_ALL) */
47} __kernel_fsid_t; 43} __kernel_fsid_t;
48 44
49#if defined(__KERNEL__) || !defined(__GLIBC__) || (__GLIBC__ < 2) 45#if defined(__KERNEL__)
50 46
51#undef __FD_SET 47#undef __FD_SET
52#define __FD_SET(fd,fdsetp) \ 48#define __FD_SET(fd,fdsetp) \
@@ -77,6 +73,6 @@ do { \
77 "2" ((__kernel_fd_set *) (fdsetp)) : "memory"); \ 73 "2" ((__kernel_fd_set *) (fdsetp)) : "memory"); \
78} while (0) 74} while (0)
79 75
80#endif /* defined(__KERNEL__) || !defined(__GLIBC__) || (__GLIBC__ < 2) */ 76#endif /* defined(__KERNEL__) */
81 77
82#endif 78#endif
diff --git a/include/asm-x86/processor.h b/include/asm-x86/processor.h
index ab4d0c2a3f8f..149920dcd341 100644
--- a/include/asm-x86/processor.h
+++ b/include/asm-x86/processor.h
@@ -719,6 +719,8 @@ static inline void prefetchw(const void *x)
719 * User space process size: 3GB (default). 719 * User space process size: 3GB (default).
720 */ 720 */
721#define TASK_SIZE (PAGE_OFFSET) 721#define TASK_SIZE (PAGE_OFFSET)
722#define STACK_TOP TASK_SIZE
723#define STACK_TOP_MAX STACK_TOP
722 724
723#define INIT_THREAD { \ 725#define INIT_THREAD { \
724 .sp0 = sizeof(init_stack) + (long)&init_stack, \ 726 .sp0 = sizeof(init_stack) + (long)&init_stack, \
@@ -802,6 +804,9 @@ extern unsigned long thread_saved_pc(struct task_struct *tsk);
802#define TASK_SIZE_OF(child) ((test_tsk_thread_flag(child, TIF_IA32)) ? \ 804#define TASK_SIZE_OF(child) ((test_tsk_thread_flag(child, TIF_IA32)) ? \
803 IA32_PAGE_OFFSET : TASK_SIZE64) 805 IA32_PAGE_OFFSET : TASK_SIZE64)
804 806
807#define STACK_TOP TASK_SIZE
808#define STACK_TOP_MAX TASK_SIZE64
809
805#define INIT_THREAD { \ 810#define INIT_THREAD { \
806 .sp0 = (unsigned long)&init_stack + sizeof(init_stack) \ 811 .sp0 = (unsigned long)&init_stack + sizeof(init_stack) \
807} 812}
diff --git a/include/asm-xtensa/a.out.h b/include/asm-xtensa/a.out.h
index 05a2f67c6768..fdf13702924a 100644
--- a/include/asm-xtensa/a.out.h
+++ b/include/asm-xtensa/a.out.h
@@ -14,11 +14,6 @@
14#ifndef _XTENSA_A_OUT_H 14#ifndef _XTENSA_A_OUT_H
15#define _XTENSA_A_OUT_H 15#define _XTENSA_A_OUT_H
16 16
17/* Note: the kernel needs the a.out definitions, even if only ELF is used. */
18
19#define STACK_TOP TASK_SIZE
20#define STACK_TOP_MAX STACK_TOP
21
22struct exec 17struct exec
23{ 18{
24 unsigned long a_info; 19 unsigned long a_info;
diff --git a/include/asm-xtensa/page.h b/include/asm-xtensa/page.h
index 1adedbf41d01..80a6ae0dd259 100644
--- a/include/asm-xtensa/page.h
+++ b/include/asm-xtensa/page.h
@@ -98,6 +98,7 @@
98typedef struct { unsigned long pte; } pte_t; /* page table entry */ 98typedef struct { unsigned long pte; } pte_t; /* page table entry */
99typedef struct { unsigned long pgd; } pgd_t; /* PGD table entry */ 99typedef struct { unsigned long pgd; } pgd_t; /* PGD table entry */
100typedef struct { unsigned long pgprot; } pgprot_t; 100typedef struct { unsigned long pgprot; } pgprot_t;
101typedef struct page *pgtable_t;
101 102
102#define pte_val(x) ((x).pte) 103#define pte_val(x) ((x).pte)
103#define pgd_val(x) ((x).pgd) 104#define pgd_val(x) ((x).pgd)
diff --git a/include/asm-xtensa/param.h b/include/asm-xtensa/param.h
index ce3a336cad07..82ad34d92d35 100644
--- a/include/asm-xtensa/param.h
+++ b/include/asm-xtensa/param.h
@@ -12,7 +12,7 @@
12#define _XTENSA_PARAM_H 12#define _XTENSA_PARAM_H
13 13
14#ifdef __KERNEL__ 14#ifdef __KERNEL__
15# define HZ 100 /* internal timer frequency */ 15# define HZ CONFIG_HZ /* internal timer frequency */
16# define USER_HZ 100 /* for user interfaces in "ticks" */ 16# define USER_HZ 100 /* for user interfaces in "ticks" */
17# define CLOCKS_PER_SEC (USER_HZ) /* frequnzy at which times() counts */ 17# define CLOCKS_PER_SEC (USER_HZ) /* frequnzy at which times() counts */
18#endif 18#endif
diff --git a/include/asm-xtensa/pgalloc.h b/include/asm-xtensa/pgalloc.h
index 1d51ba5463f9..8d1544eb461e 100644
--- a/include/asm-xtensa/pgalloc.h
+++ b/include/asm-xtensa/pgalloc.h
@@ -24,6 +24,7 @@
24 (pmd_val(*(pmdp)) = ((unsigned long)ptep)) 24 (pmd_val(*(pmdp)) = ((unsigned long)ptep))
25#define pmd_populate(mm, pmdp, page) \ 25#define pmd_populate(mm, pmdp, page) \
26 (pmd_val(*(pmdp)) = ((unsigned long)page_to_virt(page))) 26 (pmd_val(*(pmdp)) = ((unsigned long)page_to_virt(page)))
27#define pmd_pgtable(pmd) pmd_page(pmd)
27 28
28static inline pgd_t* 29static inline pgd_t*
29pgd_alloc(struct mm_struct *mm) 30pgd_alloc(struct mm_struct *mm)
@@ -46,10 +47,14 @@ static inline pte_t *pte_alloc_one_kernel(struct mm_struct *mm,
46 return kmem_cache_alloc(pgtable_cache, GFP_KERNEL|__GFP_REPEAT); 47 return kmem_cache_alloc(pgtable_cache, GFP_KERNEL|__GFP_REPEAT);
47} 48}
48 49
49static inline struct page *pte_alloc_one(struct mm_struct *mm, 50static inline pte_token_t pte_alloc_one(struct mm_struct *mm,
50 unsigned long addr) 51 unsigned long addr)
51{ 52{
52 return virt_to_page(pte_alloc_one_kernel(mm, addr)); 53 struct page *page;
54
55 page = virt_to_page(pte_alloc_one_kernel(mm, addr));
56 pgtable_page_ctor(page);
57 return page;
53} 58}
54 59
55static inline void pte_free_kernel(struct mm_struct *mm, pte_t *pte) 60static inline void pte_free_kernel(struct mm_struct *mm, pte_t *pte)
@@ -57,10 +62,12 @@ static inline void pte_free_kernel(struct mm_struct *mm, pte_t *pte)
57 kmem_cache_free(pgtable_cache, pte); 62 kmem_cache_free(pgtable_cache, pte);
58} 63}
59 64
60static inline void pte_free(struct mm_struct *mm, struct page *page) 65static inline void pte_free(struct mm_struct *mm, pgtable_t pte)
61{ 66{
62 kmem_cache_free(pgtable_cache, page_address(page)); 67 pgtable_page_dtor(pte);
68 kmem_cache_free(pgtable_cache, page_address(pte));
63} 69}
70#define pmd_pgtable(pmd) pmd_page(pmd)
64 71
65#endif /* __KERNEL__ */ 72#endif /* __KERNEL__ */
66#endif /* _XTENSA_PGALLOC_H */ 73#endif /* _XTENSA_PGALLOC_H */
diff --git a/include/asm-xtensa/posix_types.h b/include/asm-xtensa/posix_types.h
index 4ad77dda6d5f..43f9dd1126a4 100644
--- a/include/asm-xtensa/posix_types.h
+++ b/include/asm-xtensa/posix_types.h
@@ -64,8 +64,7 @@ typedef struct {
64 64
65#else /* __GNUC__ */ 65#else /* __GNUC__ */
66 66
67#if defined(__KERNEL__) || !defined(__GLIBC__) || (__GLIBC__ < 2) \ 67#if defined(__KERNEL__)
68 || (__GLIBC__ == 2 && __GLIBC_MINOR__ == 0)
69/* With GNU C, use inline functions instead so args are evaluated only once: */ 68/* With GNU C, use inline functions instead so args are evaluated only once: */
70 69
71#undef __FD_SET 70#undef __FD_SET
@@ -118,6 +117,6 @@ static __inline__ void __FD_ZERO(__kernel_fd_set *p)
118 } 117 }
119} 118}
120 119
121#endif /* defined(__KERNEL__) || !defined(__GLIBC__) || (__GLIBC__ < 2) */ 120#endif /* defined(__KERNEL__) */
122#endif /* __GNUC__ */ 121#endif /* __GNUC__ */
123#endif /* _XTENSA_POSIX_TYPES_H */ 122#endif /* _XTENSA_POSIX_TYPES_H */
diff --git a/include/asm-xtensa/processor.h b/include/asm-xtensa/processor.h
index 35145bcd96eb..96408f436624 100644
--- a/include/asm-xtensa/processor.h
+++ b/include/asm-xtensa/processor.h
@@ -34,6 +34,8 @@
34 */ 34 */
35 35
36#define TASK_SIZE __XTENSA_UL_CONST(0x40000000) 36#define TASK_SIZE __XTENSA_UL_CONST(0x40000000)
37#define STACK_TOP TASK_SIZE
38#define STACK_TOP_MAX STACK_TOP
37 39
38/* 40/*
39 * General exception cause assigned to debug exceptions. Debug exceptions go 41 * General exception cause assigned to debug exceptions. Debug exceptions go
diff --git a/include/asm-xtensa/unistd.h b/include/asm-xtensa/unistd.h
index 92968aabe34e..c092c8fbb2cf 100644
--- a/include/asm-xtensa/unistd.h
+++ b/include/asm-xtensa/unistd.h
@@ -677,8 +677,8 @@ __SYSCALL(303, sys_ni_syscall, 0)
677 677
678#define __NR_signalfd 304 678#define __NR_signalfd 304
679__SYSCALL(304, sys_signalfd, 3) 679__SYSCALL(304, sys_signalfd, 3)
680#define __NR_timerfd 305 680/* 305 was __NR_timerfd */
681__SYSCALL(305, sys_timerfd, 4) 681__SYSCALL(305, sys_ni_syscall, 0)
682#define __NR_eventfd 306 682#define __NR_eventfd 306
683__SYSCALL(306, sys_eventfd, 1) 683__SYSCALL(306, sys_eventfd, 1)
684 684
diff --git a/include/linux/Kbuild b/include/linux/Kbuild
index 2ebf068ba504..5cae9b5960ea 100644
--- a/include/linux/Kbuild
+++ b/include/linux/Kbuild
@@ -338,7 +338,6 @@ unifdef-y += tty.h
338unifdef-y += types.h 338unifdef-y += types.h
339unifdef-y += udf_fs_i.h 339unifdef-y += udf_fs_i.h
340unifdef-y += udp.h 340unifdef-y += udp.h
341unifdef-y += ufs_fs.h
342unifdef-y += uinput.h 341unifdef-y += uinput.h
343unifdef-y += uio.h 342unifdef-y += uio.h
344unifdef-y += unistd.h 343unifdef-y += unistd.h
diff --git a/include/linux/a.out.h b/include/linux/a.out.h
index 82cd918f2ab7..208f4e8ed304 100644
--- a/include/linux/a.out.h
+++ b/include/linux/a.out.h
@@ -1,6 +1,8 @@
1#ifndef __A_OUT_GNU_H__ 1#ifndef __A_OUT_GNU_H__
2#define __A_OUT_GNU_H__ 2#define __A_OUT_GNU_H__
3 3
4#ifdef CONFIG_ARCH_SUPPORTS_AOUT
5
4#define __GNU_EXEC_MACROS__ 6#define __GNU_EXEC_MACROS__
5 7
6#ifndef __STRUCT_EXEC_OVERRIDE__ 8#ifndef __STRUCT_EXEC_OVERRIDE__
@@ -9,6 +11,8 @@
9 11
10#endif /* __STRUCT_EXEC_OVERRIDE__ */ 12#endif /* __STRUCT_EXEC_OVERRIDE__ */
11 13
14#ifndef __ASSEMBLY__
15
12/* these go in the N_MACHTYPE field */ 16/* these go in the N_MACHTYPE field */
13enum machine_type { 17enum machine_type {
14#if defined (M_OLDSUN2) 18#if defined (M_OLDSUN2)
@@ -272,5 +276,11 @@ struct relocation_info
272}; 276};
273#endif /* no N_RELOCATION_INFO_DECLARED. */ 277#endif /* no N_RELOCATION_INFO_DECLARED. */
274 278
275 279#endif /*__ASSEMBLY__ */
280#else /* CONFIG_ARCH_SUPPORTS_AOUT */
281#ifndef __ASSEMBLY__
282struct exec {
283};
284#endif
285#endif /* CONFIG_ARCH_SUPPORTS_AOUT */
276#endif /* __A_OUT_GNU_H__ */ 286#endif /* __A_OUT_GNU_H__ */
diff --git a/include/linux/atmel_pwm.h b/include/linux/atmel_pwm.h
new file mode 100644
index 000000000000..ea04abb3db8e
--- /dev/null
+++ b/include/linux/atmel_pwm.h
@@ -0,0 +1,70 @@
1#ifndef __LINUX_ATMEL_PWM_H
2#define __LINUX_ATMEL_PWM_H
3
4/**
5 * struct pwm_channel - driver handle to a PWM channel
6 * @regs: base of this channel's registers
7 * @index: number of this channel (0..31)
8 * @mck: base clock rate, which can be prescaled and maybe subdivided
9 *
10 * Drivers initialize a pwm_channel structure using pwm_channel_alloc().
11 * Then they configure its clock rate (derived from MCK), alignment,
12 * polarity, and duty cycle by writing directly to the channel registers,
13 * before enabling the channel by calling pwm_channel_enable().
14 *
15 * After emitting a PWM signal for the desired length of time, drivers
16 * may then pwm_channel_disable() or pwm_channel_free(). Both of these
17 * disable the channel, but when it's freed the IRQ is deconfigured and
18 * the channel must later be re-allocated and reconfigured.
19 *
20 * Note that if the period or duty cycle need to be changed while the
21 * PWM channel is operating, drivers must use the PWM_CUPD double buffer
22 * mechanism, either polling until they change or getting implicitly
23 * notified through a once-per-period interrupt handler.
24 */
25struct pwm_channel {
26 void __iomem *regs;
27 unsigned index;
28 unsigned long mck;
29};
30
31extern int pwm_channel_alloc(int index, struct pwm_channel *ch);
32extern int pwm_channel_free(struct pwm_channel *ch);
33
34extern int pwm_clk_alloc(unsigned prescale, unsigned div);
35extern void pwm_clk_free(unsigned clk);
36
37extern int __pwm_channel_onoff(struct pwm_channel *ch, int enabled);
38
39#define pwm_channel_enable(ch) __pwm_channel_onoff((ch), 1)
40#define pwm_channel_disable(ch) __pwm_channel_onoff((ch), 0)
41
42/* periodic interrupts, mostly for CUPD changes to period or cycle */
43extern int pwm_channel_handler(struct pwm_channel *ch,
44 void (*handler)(struct pwm_channel *ch));
45
46/* per-channel registers (banked at pwm_channel->regs) */
47#define PWM_CMR 0x00 /* mode register */
48#define PWM_CPR_CPD (1 << 10) /* set: CUPD modifies period */
49#define PWM_CPR_CPOL (1 << 9) /* set: idle high */
50#define PWM_CPR_CALG (1 << 8) /* set: center align */
51#define PWM_CPR_CPRE (0xf << 0) /* mask: rate is mck/(2^pre) */
52#define PWM_CPR_CLKA (0xb << 0) /* rate CLKA */
53#define PWM_CPR_CLKB (0xc << 0) /* rate CLKB */
54#define PWM_CDTY 0x04 /* duty cycle (max of CPRD) */
55#define PWM_CPRD 0x08 /* period (count up from zero) */
56#define PWM_CCNT 0x0c /* counter (20 bits?) */
57#define PWM_CUPD 0x10 /* update CPRD (or CDTY) next period */
58
59static inline void
60pwm_channel_writel(struct pwm_channel *pwmc, unsigned offset, u32 val)
61{
62 __raw_writel(val, pwmc->regs + offset);
63}
64
65static inline u32 pwm_channel_readl(struct pwm_channel *pwmc, unsigned offset)
66{
67 return __raw_readl(pwmc->regs + offset);
68}
69
70#endif /* __LINUX_ATMEL_PWM_H */
diff --git a/include/linux/blkdev.h b/include/linux/blkdev.h
index 90392a9d7a9c..e1888cc5b8ae 100644
--- a/include/linux/blkdev.h
+++ b/include/linux/blkdev.h
@@ -137,7 +137,9 @@ enum rq_flag_bits {
137#define BLK_MAX_CDB 16 137#define BLK_MAX_CDB 16
138 138
139/* 139/*
140 * try to put the fields that are referenced together in the same cacheline 140 * try to put the fields that are referenced together in the same cacheline.
141 * if you modify this structure, be sure to check block/blk-core.c:rq_init()
142 * as well!
141 */ 143 */
142struct request { 144struct request {
143 struct list_head queuelist; 145 struct list_head queuelist;
diff --git a/include/linux/byteorder/generic.h b/include/linux/byteorder/generic.h
index 3dc715b02500..d3771551fdd9 100644
--- a/include/linux/byteorder/generic.h
+++ b/include/linux/byteorder/generic.h
@@ -146,6 +146,36 @@
146#define htons(x) ___htons(x) 146#define htons(x) ___htons(x)
147#define ntohs(x) ___ntohs(x) 147#define ntohs(x) ___ntohs(x)
148 148
149static inline void le16_add_cpu(__le16 *var, u16 val)
150{
151 *var = cpu_to_le16(le16_to_cpu(*var) + val);
152}
153
154static inline void le32_add_cpu(__le32 *var, u32 val)
155{
156 *var = cpu_to_le32(le32_to_cpu(*var) + val);
157}
158
159static inline void le64_add_cpu(__le64 *var, u64 val)
160{
161 *var = cpu_to_le64(le64_to_cpu(*var) + val);
162}
163
164static inline void be16_add_cpu(__be16 *var, u16 val)
165{
166 *var = cpu_to_be16(be16_to_cpu(*var) + val);
167}
168
169static inline void be32_add_cpu(__be32 *var, u32 val)
170{
171 *var = cpu_to_be32(be32_to_cpu(*var) + val);
172}
173
174static inline void be64_add_cpu(__be64 *var, u64 val)
175{
176 *var = cpu_to_be64(be64_to_cpu(*var) + val);
177}
178
149#endif /* KERNEL */ 179#endif /* KERNEL */
150 180
151#endif /* _LINUX_BYTEORDER_GENERIC_H */ 181#endif /* _LINUX_BYTEORDER_GENERIC_H */
diff --git a/include/linux/cpuset.h b/include/linux/cpuset.h
index ecae585ec3da..f8c9a2752f06 100644
--- a/include/linux/cpuset.h
+++ b/include/linux/cpuset.h
@@ -57,7 +57,9 @@ extern int cpuset_memory_pressure_enabled;
57extern void __cpuset_memory_pressure_bump(void); 57extern void __cpuset_memory_pressure_bump(void);
58 58
59extern const struct file_operations proc_cpuset_operations; 59extern const struct file_operations proc_cpuset_operations;
60extern char *cpuset_task_status_allowed(struct task_struct *task, char *buffer); 60struct seq_file;
61extern void cpuset_task_status_allowed(struct seq_file *m,
62 struct task_struct *task);
61 63
62extern void cpuset_lock(void); 64extern void cpuset_lock(void);
63extern void cpuset_unlock(void); 65extern void cpuset_unlock(void);
@@ -126,10 +128,9 @@ static inline int cpuset_mems_allowed_intersects(const struct task_struct *tsk1,
126 128
127static inline void cpuset_memory_pressure_bump(void) {} 129static inline void cpuset_memory_pressure_bump(void) {}
128 130
129static inline char *cpuset_task_status_allowed(struct task_struct *task, 131static inline void cpuset_task_status_allowed(struct seq_file *m,
130 char *buffer) 132 struct task_struct *task)
131{ 133{
132 return buffer;
133} 134}
134 135
135static inline void cpuset_lock(void) {} 136static inline void cpuset_lock(void) {}
diff --git a/include/linux/dca.h b/include/linux/dca.h
index 83eaecc6f8ab..af61cd1f37e9 100644
--- a/include/linux/dca.h
+++ b/include/linux/dca.h
@@ -11,7 +11,7 @@ void dca_unregister_notify(struct notifier_block *nb);
11 11
12struct dca_provider { 12struct dca_provider {
13 struct dca_ops *ops; 13 struct dca_ops *ops;
14 struct class_device *cd; 14 struct device *cd;
15 int id; 15 int id;
16}; 16};
17 17
diff --git a/include/linux/dmar.h b/include/linux/dmar.h
index ffb6439cb5e6..56c73b847551 100644
--- a/include/linux/dmar.h
+++ b/include/linux/dmar.h
@@ -28,7 +28,7 @@
28#ifdef CONFIG_DMAR 28#ifdef CONFIG_DMAR
29struct intel_iommu; 29struct intel_iommu;
30 30
31extern char *dmar_get_fault_reason(u8 fault_reason); 31extern const char *dmar_get_fault_reason(u8 fault_reason);
32 32
33/* Can't use the common MSI interrupt functions 33/* Can't use the common MSI interrupt functions
34 * since DMAR is not a pci device 34 * since DMAR is not a pci device
diff --git a/include/linux/dmi.h b/include/linux/dmi.h
index bbc9992ec374..325acdf5c462 100644
--- a/include/linux/dmi.h
+++ b/include/linux/dmi.h
@@ -35,8 +35,11 @@ enum dmi_device_type {
35 DMI_DEV_TYPE_ETHERNET, 35 DMI_DEV_TYPE_ETHERNET,
36 DMI_DEV_TYPE_TOKENRING, 36 DMI_DEV_TYPE_TOKENRING,
37 DMI_DEV_TYPE_SOUND, 37 DMI_DEV_TYPE_SOUND,
38 DMI_DEV_TYPE_PATA,
39 DMI_DEV_TYPE_SATA,
40 DMI_DEV_TYPE_SAS,
38 DMI_DEV_TYPE_IPMI = -1, 41 DMI_DEV_TYPE_IPMI = -1,
39 DMI_DEV_TYPE_OEM_STRING = -2 42 DMI_DEV_TYPE_OEM_STRING = -2,
40}; 43};
41 44
42struct dmi_header { 45struct dmi_header {
diff --git a/include/linux/elf-em.h b/include/linux/elf-em.h
index 5834e843a946..18bea78fe47b 100644
--- a/include/linux/elf-em.h
+++ b/include/linux/elf-em.h
@@ -31,6 +31,7 @@
31#define EM_V850 87 /* NEC v850 */ 31#define EM_V850 87 /* NEC v850 */
32#define EM_M32R 88 /* Renesas M32R */ 32#define EM_M32R 88 /* Renesas M32R */
33#define EM_H8_300 46 /* Renesas H8/300,300H,H8S */ 33#define EM_H8_300 46 /* Renesas H8/300,300H,H8S */
34#define EM_MN10300 89 /* Panasonic/MEI MN10300, AM33 */
34#define EM_BLACKFIN 106 /* ADI Blackfin Processor */ 35#define EM_BLACKFIN 106 /* ADI Blackfin Processor */
35#define EM_FRV 0x5441 /* Fujitsu FR-V */ 36#define EM_FRV 0x5441 /* Fujitsu FR-V */
36#define EM_AVR32 0x18ad /* Atmel AVR32 */ 37#define EM_AVR32 0x18ad /* Atmel AVR32 */
@@ -47,6 +48,8 @@
47#define EM_CYGNUS_M32R 0x9041 48#define EM_CYGNUS_M32R 0x9041
48/* This is the old interim value for S/390 architecture */ 49/* This is the old interim value for S/390 architecture */
49#define EM_S390_OLD 0xA390 50#define EM_S390_OLD 0xA390
51/* Also Panasonic/MEI MN10300, AM33 */
52#define EM_CYGNUS_MN10300 0xbeef
50 53
51 54
52#endif /* _LINUX_ELF_EM_H */ 55#endif /* _LINUX_ELF_EM_H */
diff --git a/include/linux/fs.h b/include/linux/fs.h
index 36b7abefacbe..18cfbf76ec5b 100644
--- a/include/linux/fs.h
+++ b/include/linux/fs.h
@@ -1038,6 +1038,12 @@ struct super_block {
1038 * in /proc/mounts will be "type.subtype" 1038 * in /proc/mounts will be "type.subtype"
1039 */ 1039 */
1040 char *s_subtype; 1040 char *s_subtype;
1041
1042 /*
1043 * Saved mount options for lazy filesystems using
1044 * generic_show_options()
1045 */
1046 char *s_options;
1041}; 1047};
1042 1048
1043extern struct timespec current_fs_time(struct super_block *sb); 1049extern struct timespec current_fs_time(struct super_block *sb);
@@ -1618,7 +1624,6 @@ extern int register_chrdev(unsigned int, const char *,
1618 const struct file_operations *); 1624 const struct file_operations *);
1619extern void unregister_chrdev(unsigned int, const char *); 1625extern void unregister_chrdev(unsigned int, const char *);
1620extern void unregister_chrdev_region(dev_t, unsigned); 1626extern void unregister_chrdev_region(dev_t, unsigned);
1621extern int chrdev_open(struct inode *, struct file *);
1622extern void chrdev_show(struct seq_file *,off_t); 1627extern void chrdev_show(struct seq_file *,off_t);
1623 1628
1624/* fs/block_dev.c */ 1629/* fs/block_dev.c */
@@ -1807,9 +1812,6 @@ extern ssize_t generic_file_buffered_write(struct kiocb *, const struct iovec *,
1807 unsigned long, loff_t, loff_t *, size_t, ssize_t); 1812 unsigned long, loff_t, loff_t *, size_t, ssize_t);
1808extern ssize_t do_sync_read(struct file *filp, char __user *buf, size_t len, loff_t *ppos); 1813extern ssize_t do_sync_read(struct file *filp, char __user *buf, size_t len, loff_t *ppos);
1809extern ssize_t do_sync_write(struct file *filp, const char __user *buf, size_t len, loff_t *ppos); 1814extern ssize_t do_sync_write(struct file *filp, const char __user *buf, size_t len, loff_t *ppos);
1810extern void do_generic_mapping_read(struct address_space *mapping,
1811 struct file_ra_state *, struct file *,
1812 loff_t *, read_descriptor_t *, read_actor_t);
1813extern int generic_segment_checks(const struct iovec *iov, 1815extern int generic_segment_checks(const struct iovec *iov,
1814 unsigned long *nr_segs, size_t *count, int access_flags); 1816 unsigned long *nr_segs, size_t *count, int access_flags);
1815 1817
@@ -1847,18 +1849,6 @@ static inline int xip_truncate_page(struct address_space *mapping, loff_t from)
1847} 1849}
1848#endif 1850#endif
1849 1851
1850static inline void do_generic_file_read(struct file * filp, loff_t *ppos,
1851 read_descriptor_t * desc,
1852 read_actor_t actor)
1853{
1854 do_generic_mapping_read(filp->f_mapping,
1855 &filp->f_ra,
1856 filp,
1857 ppos,
1858 desc,
1859 actor);
1860}
1861
1862#ifdef CONFIG_BLOCK 1852#ifdef CONFIG_BLOCK
1863ssize_t __blockdev_direct_IO(int rw, struct kiocb *iocb, struct inode *inode, 1853ssize_t __blockdev_direct_IO(int rw, struct kiocb *iocb, struct inode *inode,
1864 struct block_device *bdev, const struct iovec *iov, loff_t offset, 1854 struct block_device *bdev, const struct iovec *iov, loff_t offset,
@@ -1985,6 +1975,9 @@ extern int __must_check inode_setattr(struct inode *, struct iattr *);
1985 1975
1986extern void file_update_time(struct file *file); 1976extern void file_update_time(struct file *file);
1987 1977
1978extern int generic_show_options(struct seq_file *m, struct vfsmount *mnt);
1979extern void save_mount_options(struct super_block *sb, char *options);
1980
1988static inline ino_t parent_ino(struct dentry *dentry) 1981static inline ino_t parent_ino(struct dentry *dentry)
1989{ 1982{
1990 ino_t res; 1983 ino_t res;
@@ -2056,7 +2049,7 @@ static int __fops ## _open(struct inode *inode, struct file *file) \
2056static struct file_operations __fops = { \ 2049static struct file_operations __fops = { \
2057 .owner = THIS_MODULE, \ 2050 .owner = THIS_MODULE, \
2058 .open = __fops ## _open, \ 2051 .open = __fops ## _open, \
2059 .release = simple_attr_close, \ 2052 .release = simple_attr_release, \
2060 .read = simple_attr_read, \ 2053 .read = simple_attr_read, \
2061 .write = simple_attr_write, \ 2054 .write = simple_attr_write, \
2062}; 2055};
@@ -2068,9 +2061,9 @@ __simple_attr_check_format(const char *fmt, ...)
2068} 2061}
2069 2062
2070int simple_attr_open(struct inode *inode, struct file *file, 2063int simple_attr_open(struct inode *inode, struct file *file,
2071 u64 (*get)(void *), void (*set)(void *, u64), 2064 int (*get)(void *, u64 *), int (*set)(void *, u64),
2072 const char *fmt); 2065 const char *fmt);
2073int simple_attr_close(struct inode *inode, struct file *file); 2066int simple_attr_release(struct inode *inode, struct file *file);
2074ssize_t simple_attr_read(struct file *file, char __user *buf, 2067ssize_t simple_attr_read(struct file *file, char __user *buf,
2075 size_t len, loff_t *ppos); 2068 size_t len, loff_t *ppos);
2076ssize_t simple_attr_write(struct file *file, const char __user *buf, 2069ssize_t simple_attr_write(struct file *file, const char __user *buf,
diff --git a/include/linux/genhd.h b/include/linux/genhd.h
index 1dbea0ac5693..09a3b18918c7 100644
--- a/include/linux/genhd.h
+++ b/include/linux/genhd.h
@@ -91,16 +91,31 @@ struct partition {
91 __le32 nr_sects; /* nr of sectors in partition */ 91 __le32 nr_sects; /* nr of sectors in partition */
92} __attribute__((packed)); 92} __attribute__((packed));
93 93
94struct disk_stats {
95 unsigned long sectors[2]; /* READs and WRITEs */
96 unsigned long ios[2];
97 unsigned long merges[2];
98 unsigned long ticks[2];
99 unsigned long io_ticks;
100 unsigned long time_in_queue;
101};
102
94struct hd_struct { 103struct hd_struct {
95 sector_t start_sect; 104 sector_t start_sect;
96 sector_t nr_sects; 105 sector_t nr_sects;
97 struct device dev; 106 struct device dev;
98 struct kobject *holder_dir; 107 struct kobject *holder_dir;
99 unsigned ios[2], sectors[2]; /* READs and WRITEs */
100 int policy, partno; 108 int policy, partno;
101#ifdef CONFIG_FAIL_MAKE_REQUEST 109#ifdef CONFIG_FAIL_MAKE_REQUEST
102 int make_it_fail; 110 int make_it_fail;
103#endif 111#endif
112 unsigned long stamp;
113 int in_flight;
114#ifdef CONFIG_SMP
115 struct disk_stats *dkstats;
116#else
117 struct disk_stats dkstats;
118#endif
104}; 119};
105 120
106#define GENHD_FL_REMOVABLE 1 121#define GENHD_FL_REMOVABLE 1
@@ -111,15 +126,7 @@ struct hd_struct {
111#define GENHD_FL_SUPPRESS_PARTITION_INFO 32 126#define GENHD_FL_SUPPRESS_PARTITION_INFO 32
112#define GENHD_FL_FAIL 64 127#define GENHD_FL_FAIL 64
113 128
114struct disk_stats { 129
115 unsigned long sectors[2]; /* READs and WRITEs */
116 unsigned long ios[2];
117 unsigned long merges[2];
118 unsigned long ticks[2];
119 unsigned long io_ticks;
120 unsigned long time_in_queue;
121};
122
123struct gendisk { 130struct gendisk {
124 int major; /* major number of driver */ 131 int major; /* major number of driver */
125 int first_minor; 132 int first_minor;
@@ -158,6 +165,20 @@ struct gendisk {
158 * The __ variants should only be called in critical sections. The full 165 * The __ variants should only be called in critical sections. The full
159 * variants disable/enable preemption. 166 * variants disable/enable preemption.
160 */ 167 */
168static inline struct hd_struct *get_part(struct gendisk *gendiskp,
169 sector_t sector)
170{
171 struct hd_struct *part;
172 int i;
173 for (i = 0; i < gendiskp->minors - 1; i++) {
174 part = gendiskp->part[i];
175 if (part && part->start_sect <= sector
176 && sector < part->start_sect + part->nr_sects)
177 return part;
178 }
179 return NULL;
180}
181
161#ifdef CONFIG_SMP 182#ifdef CONFIG_SMP
162#define __disk_stat_add(gendiskp, field, addnd) \ 183#define __disk_stat_add(gendiskp, field, addnd) \
163 (per_cpu_ptr(gendiskp->dkstats, smp_processor_id())->field += addnd) 184 (per_cpu_ptr(gendiskp->dkstats, smp_processor_id())->field += addnd)
@@ -177,15 +198,62 @@ static inline void disk_stat_set_all(struct gendisk *gendiskp, int value) {
177 memset(per_cpu_ptr(gendiskp->dkstats, i), value, 198 memset(per_cpu_ptr(gendiskp->dkstats, i), value,
178 sizeof (struct disk_stats)); 199 sizeof (struct disk_stats));
179} 200}
201
202#define __part_stat_add(part, field, addnd) \
203 (per_cpu_ptr(part->dkstats, smp_processor_id())->field += addnd)
204
205#define __all_stat_add(gendiskp, field, addnd, sector) \
206({ \
207 struct hd_struct *part = get_part(gendiskp, sector); \
208 if (part) \
209 __part_stat_add(part, field, addnd); \
210 __disk_stat_add(gendiskp, field, addnd); \
211})
212
213#define part_stat_read(part, field) \
214({ \
215 typeof(part->dkstats->field) res = 0; \
216 int i; \
217 for_each_possible_cpu(i) \
218 res += per_cpu_ptr(part->dkstats, i)->field; \
219 res; \
220})
221
222static inline void part_stat_set_all(struct hd_struct *part, int value) {
223 int i;
224 for_each_possible_cpu(i)
225 memset(per_cpu_ptr(part->dkstats, i), value,
226 sizeof(struct disk_stats));
227}
180 228
181#else 229#else
182#define __disk_stat_add(gendiskp, field, addnd) \ 230#define __disk_stat_add(gendiskp, field, addnd) \
183 (gendiskp->dkstats.field += addnd) 231 (gendiskp->dkstats.field += addnd)
184#define disk_stat_read(gendiskp, field) (gendiskp->dkstats.field) 232#define disk_stat_read(gendiskp, field) (gendiskp->dkstats.field)
185 233
186static inline void disk_stat_set_all(struct gendisk *gendiskp, int value) { 234static inline void disk_stat_set_all(struct gendisk *gendiskp, int value)
235{
187 memset(&gendiskp->dkstats, value, sizeof (struct disk_stats)); 236 memset(&gendiskp->dkstats, value, sizeof (struct disk_stats));
188} 237}
238
239#define __part_stat_add(part, field, addnd) \
240 (part->dkstats.field += addnd)
241
242#define __all_stat_add(gendiskp, field, addnd, sector) \
243({ \
244 struct hd_struct *part = get_part(gendiskp, sector); \
245 if (part) \
246 part->dkstats.field += addnd; \
247 __disk_stat_add(gendiskp, field, addnd); \
248})
249
250#define part_stat_read(part, field) (part->dkstats.field)
251
252static inline void part_stat_set_all(struct hd_struct *part, int value)
253{
254 memset(&part->dkstats, value, sizeof(struct disk_stats));
255}
256
189#endif 257#endif
190 258
191#define disk_stat_add(gendiskp, field, addnd) \ 259#define disk_stat_add(gendiskp, field, addnd) \
@@ -206,6 +274,45 @@ static inline void disk_stat_set_all(struct gendisk *gendiskp, int value) {
206#define disk_stat_sub(gendiskp, field, subnd) \ 274#define disk_stat_sub(gendiskp, field, subnd) \
207 disk_stat_add(gendiskp, field, -subnd) 275 disk_stat_add(gendiskp, field, -subnd)
208 276
277#define part_stat_add(gendiskp, field, addnd) \
278 do { \
279 preempt_disable(); \
280 __part_stat_add(gendiskp, field, addnd);\
281 preempt_enable(); \
282 } while (0)
283
284#define __part_stat_dec(gendiskp, field) __part_stat_add(gendiskp, field, -1)
285#define part_stat_dec(gendiskp, field) part_stat_add(gendiskp, field, -1)
286
287#define __part_stat_inc(gendiskp, field) __part_stat_add(gendiskp, field, 1)
288#define part_stat_inc(gendiskp, field) part_stat_add(gendiskp, field, 1)
289
290#define __part_stat_sub(gendiskp, field, subnd) \
291 __part_stat_add(gendiskp, field, -subnd)
292#define part_stat_sub(gendiskp, field, subnd) \
293 part_stat_add(gendiskp, field, -subnd)
294
295#define all_stat_add(gendiskp, field, addnd, sector) \
296 do { \
297 preempt_disable(); \
298 __all_stat_add(gendiskp, field, addnd, sector); \
299 preempt_enable(); \
300 } while (0)
301
302#define __all_stat_dec(gendiskp, field, sector) \
303 __all_stat_add(gendiskp, field, -1, sector)
304#define all_stat_dec(gendiskp, field, sector) \
305 all_stat_add(gendiskp, field, -1, sector)
306
307#define __all_stat_inc(gendiskp, field, sector) \
308 __all_stat_add(gendiskp, field, 1, sector)
309#define all_stat_inc(gendiskp, field, sector) \
310 all_stat_add(gendiskp, field, 1, sector)
311
312#define __all_stat_sub(gendiskp, field, subnd, sector) \
313 __all_stat_add(gendiskp, field, -subnd, sector)
314#define all_stat_sub(gendiskp, field, subnd, sector) \
315 all_stat_add(gendiskp, field, -subnd, sector)
209 316
210/* Inlines to alloc and free disk stats in struct gendisk */ 317/* Inlines to alloc and free disk stats in struct gendisk */
211#ifdef CONFIG_SMP 318#ifdef CONFIG_SMP
@@ -221,6 +328,20 @@ static inline void free_disk_stats(struct gendisk *disk)
221{ 328{
222 free_percpu(disk->dkstats); 329 free_percpu(disk->dkstats);
223} 330}
331
332static inline int init_part_stats(struct hd_struct *part)
333{
334 part->dkstats = alloc_percpu(struct disk_stats);
335 if (!part->dkstats)
336 return 0;
337 return 1;
338}
339
340static inline void free_part_stats(struct hd_struct *part)
341{
342 free_percpu(part->dkstats);
343}
344
224#else /* CONFIG_SMP */ 345#else /* CONFIG_SMP */
225static inline int init_disk_stats(struct gendisk *disk) 346static inline int init_disk_stats(struct gendisk *disk)
226{ 347{
@@ -230,10 +351,20 @@ static inline int init_disk_stats(struct gendisk *disk)
230static inline void free_disk_stats(struct gendisk *disk) 351static inline void free_disk_stats(struct gendisk *disk)
231{ 352{
232} 353}
354
355static inline int init_part_stats(struct hd_struct *part)
356{
357 return 1;
358}
359
360static inline void free_part_stats(struct hd_struct *part)
361{
362}
233#endif /* CONFIG_SMP */ 363#endif /* CONFIG_SMP */
234 364
235/* drivers/block/ll_rw_blk.c */ 365/* drivers/block/ll_rw_blk.c */
236extern void disk_round_stats(struct gendisk *disk); 366extern void disk_round_stats(struct gendisk *disk);
367extern void part_round_stats(struct hd_struct *part);
237 368
238/* drivers/block/genhd.c */ 369/* drivers/block/genhd.c */
239extern int get_blkdev_list(char *, int); 370extern int get_blkdev_list(char *, int);
diff --git a/include/linux/hrtimer.h b/include/linux/hrtimer.h
index 203591e23210..600fc3bcf63e 100644
--- a/include/linux/hrtimer.h
+++ b/include/linux/hrtimer.h
@@ -78,7 +78,7 @@ enum hrtimer_cb_mode {
78 * as otherwise the timer could be removed before the softirq code finishes the 78 * as otherwise the timer could be removed before the softirq code finishes the
79 * the handling of the timer. 79 * the handling of the timer.
80 * 80 *
81 * The HRTIMER_STATE_ENQUEUE bit is always or'ed to the current state to 81 * The HRTIMER_STATE_ENQUEUED bit is always or'ed to the current state to
82 * preserve the HRTIMER_STATE_CALLBACK bit in the above scenario. 82 * preserve the HRTIMER_STATE_CALLBACK bit in the above scenario.
83 * 83 *
84 * All state transitions are protected by cpu_base->lock. 84 * All state transitions are protected by cpu_base->lock.
diff --git a/include/linux/hugetlb.h b/include/linux/hugetlb.h
index 30d606afcafe..7ca198b379af 100644
--- a/include/linux/hugetlb.h
+++ b/include/linux/hugetlb.h
@@ -17,6 +17,7 @@ static inline int is_vm_hugetlb_page(struct vm_area_struct *vma)
17} 17}
18 18
19int hugetlb_sysctl_handler(struct ctl_table *, int, struct file *, void __user *, size_t *, loff_t *); 19int hugetlb_sysctl_handler(struct ctl_table *, int, struct file *, void __user *, size_t *, loff_t *);
20int hugetlb_overcommit_handler(struct ctl_table *, int, struct file *, void __user *, size_t *, loff_t *);
20int hugetlb_treat_movable_handler(struct ctl_table *, int, struct file *, void __user *, size_t *, loff_t *); 21int hugetlb_treat_movable_handler(struct ctl_table *, int, struct file *, void __user *, size_t *, loff_t *);
21int copy_hugetlb_page_range(struct mm_struct *, struct mm_struct *, struct vm_area_struct *); 22int copy_hugetlb_page_range(struct mm_struct *, struct mm_struct *, struct vm_area_struct *);
22int follow_hugetlb_page(struct mm_struct *, struct vm_area_struct *, struct page **, struct vm_area_struct **, unsigned long *, int *, int, int); 23int follow_hugetlb_page(struct mm_struct *, struct vm_area_struct *, struct page **, struct vm_area_struct **, unsigned long *, int *, int, int);
diff --git a/include/linux/ipc.h b/include/linux/ipc.h
index 408696ea5189..b8826107b518 100644
--- a/include/linux/ipc.h
+++ b/include/linux/ipc.h
@@ -100,58 +100,6 @@ struct kern_ipc_perm
100 void *security; 100 void *security;
101}; 101};
102 102
103struct ipc_ids;
104struct ipc_namespace {
105 struct kref kref;
106 struct ipc_ids *ids[3];
107
108 int sem_ctls[4];
109 int used_sems;
110
111 int msg_ctlmax;
112 int msg_ctlmnb;
113 int msg_ctlmni;
114 atomic_t msg_bytes;
115 atomic_t msg_hdrs;
116
117 size_t shm_ctlmax;
118 size_t shm_ctlall;
119 int shm_ctlmni;
120 int shm_tot;
121};
122
123extern struct ipc_namespace init_ipc_ns;
124
125#ifdef CONFIG_SYSVIPC
126#define INIT_IPC_NS(ns) .ns = &init_ipc_ns,
127extern void free_ipc_ns(struct kref *kref);
128extern struct ipc_namespace *copy_ipcs(unsigned long flags,
129 struct ipc_namespace *ns);
130#else
131#define INIT_IPC_NS(ns)
132static inline struct ipc_namespace *copy_ipcs(unsigned long flags,
133 struct ipc_namespace *ns)
134{
135 return ns;
136}
137#endif
138
139static inline struct ipc_namespace *get_ipc_ns(struct ipc_namespace *ns)
140{
141#ifdef CONFIG_SYSVIPC
142 if (ns)
143 kref_get(&ns->kref);
144#endif
145 return ns;
146}
147
148static inline void put_ipc_ns(struct ipc_namespace *ns)
149{
150#ifdef CONFIG_SYSVIPC
151 kref_put(&ns->kref, free_ipc_ns);
152#endif
153}
154
155#endif /* __KERNEL__ */ 103#endif /* __KERNEL__ */
156 104
157#endif /* _LINUX_IPC_H */ 105#endif /* _LINUX_IPC_H */
diff --git a/include/linux/ipc_namespace.h b/include/linux/ipc_namespace.h
new file mode 100644
index 000000000000..e4451d1da753
--- /dev/null
+++ b/include/linux/ipc_namespace.h
@@ -0,0 +1,81 @@
1#ifndef __IPC_NAMESPACE_H__
2#define __IPC_NAMESPACE_H__
3
4#include <linux/err.h>
5#include <linux/idr.h>
6#include <linux/rwsem.h>
7
8struct ipc_ids {
9 int in_use;
10 unsigned short seq;
11 unsigned short seq_max;
12 struct rw_semaphore rw_mutex;
13 struct idr ipcs_idr;
14};
15
16struct ipc_namespace {
17 struct kref kref;
18 struct ipc_ids ids[3];
19
20 int sem_ctls[4];
21 int used_sems;
22
23 int msg_ctlmax;
24 int msg_ctlmnb;
25 int msg_ctlmni;
26 atomic_t msg_bytes;
27 atomic_t msg_hdrs;
28
29 size_t shm_ctlmax;
30 size_t shm_ctlall;
31 int shm_ctlmni;
32 int shm_tot;
33};
34
35extern struct ipc_namespace init_ipc_ns;
36
37#ifdef CONFIG_SYSVIPC
38#define INIT_IPC_NS(ns) .ns = &init_ipc_ns,
39#else
40#define INIT_IPC_NS(ns)
41#endif
42
43#if defined(CONFIG_SYSVIPC) && defined(CONFIG_IPC_NS)
44extern void free_ipc_ns(struct kref *kref);
45extern struct ipc_namespace *copy_ipcs(unsigned long flags,
46 struct ipc_namespace *ns);
47extern void free_ipcs(struct ipc_namespace *ns, struct ipc_ids *ids,
48 void (*free)(struct ipc_namespace *,
49 struct kern_ipc_perm *));
50
51static inline struct ipc_namespace *get_ipc_ns(struct ipc_namespace *ns)
52{
53 if (ns)
54 kref_get(&ns->kref);
55 return ns;
56}
57
58static inline void put_ipc_ns(struct ipc_namespace *ns)
59{
60 kref_put(&ns->kref, free_ipc_ns);
61}
62#else
63static inline struct ipc_namespace *copy_ipcs(unsigned long flags,
64 struct ipc_namespace *ns)
65{
66 if (flags & CLONE_NEWIPC)
67 return ERR_PTR(-EINVAL);
68
69 return ns;
70}
71
72static inline struct ipc_namespace *get_ipc_ns(struct ipc_namespace *ns)
73{
74 return ns;
75}
76
77static inline void put_ipc_ns(struct ipc_namespace *ns)
78{
79}
80#endif
81#endif
diff --git a/include/linux/irq.h b/include/linux/irq.h
index 4669be080617..bfd9efb5cb49 100644
--- a/include/linux/irq.h
+++ b/include/linux/irq.h
@@ -25,7 +25,7 @@
25#include <asm/irq_regs.h> 25#include <asm/irq_regs.h>
26 26
27struct irq_desc; 27struct irq_desc;
28typedef void fastcall (*irq_flow_handler_t)(unsigned int irq, 28typedef void (*irq_flow_handler_t)(unsigned int irq,
29 struct irq_desc *desc); 29 struct irq_desc *desc);
30 30
31 31
@@ -276,19 +276,19 @@ extern int handle_IRQ_event(unsigned int irq, struct irqaction *action);
276 * Built-in IRQ handlers for various IRQ types, 276 * Built-in IRQ handlers for various IRQ types,
277 * callable via desc->chip->handle_irq() 277 * callable via desc->chip->handle_irq()
278 */ 278 */
279extern void fastcall handle_level_irq(unsigned int irq, struct irq_desc *desc); 279extern void handle_level_irq(unsigned int irq, struct irq_desc *desc);
280extern void fastcall handle_fasteoi_irq(unsigned int irq, struct irq_desc *desc); 280extern void handle_fasteoi_irq(unsigned int irq, struct irq_desc *desc);
281extern void fastcall handle_edge_irq(unsigned int irq, struct irq_desc *desc); 281extern void handle_edge_irq(unsigned int irq, struct irq_desc *desc);
282extern void fastcall handle_simple_irq(unsigned int irq, struct irq_desc *desc); 282extern void handle_simple_irq(unsigned int irq, struct irq_desc *desc);
283extern void fastcall handle_percpu_irq(unsigned int irq, struct irq_desc *desc); 283extern void handle_percpu_irq(unsigned int irq, struct irq_desc *desc);
284extern void fastcall handle_bad_irq(unsigned int irq, struct irq_desc *desc); 284extern void handle_bad_irq(unsigned int irq, struct irq_desc *desc);
285 285
286/* 286/*
287 * Monolithic do_IRQ implementation. 287 * Monolithic do_IRQ implementation.
288 * (is an explicit fastcall, because i386 4KSTACKS calls it from assembly) 288 * (is an explicit fastcall, because i386 4KSTACKS calls it from assembly)
289 */ 289 */
290#ifndef CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ 290#ifndef CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ
291extern fastcall unsigned int __do_IRQ(unsigned int irq); 291extern unsigned int __do_IRQ(unsigned int irq);
292#endif 292#endif
293 293
294/* 294/*
@@ -367,6 +367,9 @@ set_irq_chained_handler(unsigned int irq,
367 __set_irq_handler(irq, handle, 1, NULL); 367 __set_irq_handler(irq, handle, 1, NULL);
368} 368}
369 369
370extern void set_irq_noprobe(unsigned int irq);
371extern void set_irq_probe(unsigned int irq);
372
370/* Handle dynamic irq creation and destruction */ 373/* Handle dynamic irq creation and destruction */
371extern int create_irq(void); 374extern int create_irq(void);
372extern void destroy_irq(unsigned int irq); 375extern void destroy_irq(unsigned int irq);
diff --git a/include/linux/jiffies.h b/include/linux/jiffies.h
index 7ba9e47bf061..e0b5b684d83f 100644
--- a/include/linux/jiffies.h
+++ b/include/linux/jiffies.h
@@ -42,7 +42,7 @@
42/* LATCH is used in the interval timer and ftape setup. */ 42/* LATCH is used in the interval timer and ftape setup. */
43#define LATCH ((CLOCK_TICK_RATE + HZ/2) / HZ) /* For divider */ 43#define LATCH ((CLOCK_TICK_RATE + HZ/2) / HZ) /* For divider */
44 44
45/* Suppose we want to devide two numbers NOM and DEN: NOM/DEN, the we can 45/* Suppose we want to devide two numbers NOM and DEN: NOM/DEN, then we can
46 * improve accuracy by shifting LSH bits, hence calculating: 46 * improve accuracy by shifting LSH bits, hence calculating:
47 * (NOM << LSH) / DEN 47 * (NOM << LSH) / DEN
48 * This however means trouble for large NOM, because (NOM << LSH) may no 48 * This however means trouble for large NOM, because (NOM << LSH) may no
@@ -160,7 +160,7 @@ extern unsigned long preset_lpj;
160 * We want to do realistic conversions of time so we need to use the same 160 * We want to do realistic conversions of time so we need to use the same
161 * values the update wall clock code uses as the jiffies size. This value 161 * values the update wall clock code uses as the jiffies size. This value
162 * is: TICK_NSEC (which is defined in timex.h). This 162 * is: TICK_NSEC (which is defined in timex.h). This
163 * is a constant and is in nanoseconds. We will used scaled math 163 * is a constant and is in nanoseconds. We will use scaled math
164 * with a set of scales defined here as SEC_JIFFIE_SC, USEC_JIFFIE_SC and 164 * with a set of scales defined here as SEC_JIFFIE_SC, USEC_JIFFIE_SC and
165 * NSEC_JIFFIE_SC. Note that these defines contain nothing but 165 * NSEC_JIFFIE_SC. Note that these defines contain nothing but
166 * constants and so are computed at compile time. SHIFT_HZ (computed in 166 * constants and so are computed at compile time. SHIFT_HZ (computed in
@@ -204,7 +204,7 @@ extern unsigned long preset_lpj;
204 * operator if the result is a long long AND at least one of the 204 * operator if the result is a long long AND at least one of the
205 * operands is cast to long long (usually just prior to the "*" so as 205 * operands is cast to long long (usually just prior to the "*" so as
206 * not to confuse it into thinking it really has a 64-bit operand, 206 * not to confuse it into thinking it really has a 64-bit operand,
207 * which, buy the way, it can do, but it take more code and at least 2 207 * which, buy the way, it can do, but it takes more code and at least 2
208 * mpys). 208 * mpys).
209 209
210 * We also need to be aware that one second in nanoseconds is only a 210 * We also need to be aware that one second in nanoseconds is only a
diff --git a/include/linux/kernel.h b/include/linux/kernel.h
index 9e01f376840a..2df44e773270 100644
--- a/include/linux/kernel.h
+++ b/include/linux/kernel.h
@@ -133,7 +133,7 @@ NORET_TYPE void panic(const char * fmt, ...)
133extern void oops_enter(void); 133extern void oops_enter(void);
134extern void oops_exit(void); 134extern void oops_exit(void);
135extern int oops_may_print(void); 135extern int oops_may_print(void);
136fastcall NORET_TYPE void do_exit(long error_code) 136NORET_TYPE void do_exit(long error_code)
137 ATTRIB_NORET; 137 ATTRIB_NORET;
138NORET_TYPE void complete_and_exit(struct completion *, long) 138NORET_TYPE void complete_and_exit(struct completion *, long)
139 ATTRIB_NORET; 139 ATTRIB_NORET;
@@ -141,6 +141,10 @@ extern unsigned long simple_strtoul(const char *,char **,unsigned int);
141extern long simple_strtol(const char *,char **,unsigned int); 141extern long simple_strtol(const char *,char **,unsigned int);
142extern unsigned long long simple_strtoull(const char *,char **,unsigned int); 142extern unsigned long long simple_strtoull(const char *,char **,unsigned int);
143extern long long simple_strtoll(const char *,char **,unsigned int); 143extern long long simple_strtoll(const char *,char **,unsigned int);
144extern int strict_strtoul(const char *, unsigned int, unsigned long *);
145extern int strict_strtol(const char *, unsigned int, long *);
146extern int strict_strtoull(const char *, unsigned int, unsigned long long *);
147extern int strict_strtoll(const char *, unsigned int, long long *);
144extern int sprintf(char * buf, const char * fmt, ...) 148extern int sprintf(char * buf, const char * fmt, ...)
145 __attribute__ ((format (printf, 2, 3))); 149 __attribute__ ((format (printf, 2, 3)));
146extern int vsprintf(char *buf, const char *, va_list) 150extern int vsprintf(char *buf, const char *, va_list)
@@ -172,8 +176,6 @@ extern int kernel_text_address(unsigned long addr);
172struct pid; 176struct pid;
173extern struct pid *session_of_pgrp(struct pid *pgrp); 177extern struct pid *session_of_pgrp(struct pid *pgrp);
174 178
175extern void dump_thread(struct pt_regs *regs, struct user *dump);
176
177#ifdef CONFIG_PRINTK 179#ifdef CONFIG_PRINTK
178asmlinkage int vprintk(const char *fmt, va_list args) 180asmlinkage int vprintk(const char *fmt, va_list args)
179 __attribute__ ((format (printf, 1, 0))); 181 __attribute__ ((format (printf, 1, 0)));
@@ -182,6 +184,13 @@ asmlinkage int printk(const char * fmt, ...)
182extern int log_buf_get_len(void); 184extern int log_buf_get_len(void);
183extern int log_buf_read(int idx); 185extern int log_buf_read(int idx);
184extern int log_buf_copy(char *dest, int idx, int len); 186extern int log_buf_copy(char *dest, int idx, int len);
187
188extern int printk_ratelimit_jiffies;
189extern int printk_ratelimit_burst;
190extern int printk_ratelimit(void);
191extern int __printk_ratelimit(int ratelimit_jiffies, int ratelimit_burst);
192extern bool printk_timed_ratelimit(unsigned long *caller_jiffies,
193 unsigned int interval_msec);
185#else 194#else
186static inline int vprintk(const char *s, va_list args) 195static inline int vprintk(const char *s, va_list args)
187 __attribute__ ((format (printf, 1, 0))); 196 __attribute__ ((format (printf, 1, 0)));
@@ -192,6 +201,12 @@ static inline int __cold printk(const char *s, ...) { return 0; }
192static inline int log_buf_get_len(void) { return 0; } 201static inline int log_buf_get_len(void) { return 0; }
193static inline int log_buf_read(int idx) { return 0; } 202static inline int log_buf_read(int idx) { return 0; }
194static inline int log_buf_copy(char *dest, int idx, int len) { return 0; } 203static inline int log_buf_copy(char *dest, int idx, int len) { return 0; }
204static inline int printk_ratelimit(void) { return 0; }
205static inline int __printk_ratelimit(int ratelimit_jiffies, \
206 int ratelimit_burst) { return 0; }
207static inline bool printk_timed_ratelimit(unsigned long *caller_jiffies, \
208 unsigned int interval_msec) \
209 { return false; }
195#endif 210#endif
196 211
197extern void __attribute__((format(printf, 1, 2))) 212extern void __attribute__((format(printf, 1, 2)))
@@ -199,11 +214,6 @@ extern void __attribute__((format(printf, 1, 2)))
199 214
200unsigned long int_sqrt(unsigned long); 215unsigned long int_sqrt(unsigned long);
201 216
202extern int printk_ratelimit(void);
203extern int __printk_ratelimit(int ratelimit_jiffies, int ratelimit_burst);
204extern bool printk_timed_ratelimit(unsigned long *caller_jiffies,
205 unsigned int interval_msec);
206
207static inline void console_silent(void) 217static inline void console_silent(void)
208{ 218{
209 console_loglevel = 0; 219 console_loglevel = 0;
@@ -224,6 +234,7 @@ extern int panic_on_unrecovered_nmi;
224extern int tainted; 234extern int tainted;
225extern const char *print_tainted(void); 235extern const char *print_tainted(void);
226extern void add_taint(unsigned); 236extern void add_taint(unsigned);
237extern int root_mountflags;
227 238
228/* Values used for system_state */ 239/* Values used for system_state */
229extern enum system_states { 240extern enum system_states {
diff --git a/include/linux/mlx4/device.h b/include/linux/mlx4/device.h
index 222815d91c40..6cdf813cd478 100644
--- a/include/linux/mlx4/device.h
+++ b/include/linux/mlx4/device.h
@@ -133,6 +133,11 @@ enum {
133 MLX4_STAT_RATE_OFFSET = 5 133 MLX4_STAT_RATE_OFFSET = 5
134}; 134};
135 135
136static inline u64 mlx4_fw_ver(u64 major, u64 minor, u64 subminor)
137{
138 return (major << 32) | (minor << 16) | subminor;
139}
140
136struct mlx4_caps { 141struct mlx4_caps {
137 u64 fw_ver; 142 u64 fw_ver;
138 int num_ports; 143 int num_ports;
@@ -189,10 +194,8 @@ struct mlx4_buf_list {
189}; 194};
190 195
191struct mlx4_buf { 196struct mlx4_buf {
192 union { 197 struct mlx4_buf_list direct;
193 struct mlx4_buf_list direct; 198 struct mlx4_buf_list *page_list;
194 struct mlx4_buf_list *page_list;
195 } u;
196 int nbufs; 199 int nbufs;
197 int npages; 200 int npages;
198 int page_shift; 201 int page_shift;
@@ -308,6 +311,14 @@ struct mlx4_init_port_param {
308int mlx4_buf_alloc(struct mlx4_dev *dev, int size, int max_direct, 311int mlx4_buf_alloc(struct mlx4_dev *dev, int size, int max_direct,
309 struct mlx4_buf *buf); 312 struct mlx4_buf *buf);
310void mlx4_buf_free(struct mlx4_dev *dev, int size, struct mlx4_buf *buf); 313void mlx4_buf_free(struct mlx4_dev *dev, int size, struct mlx4_buf *buf);
314static inline void *mlx4_buf_offset(struct mlx4_buf *buf, int offset)
315{
316 if (BITS_PER_LONG == 64 || buf->nbufs == 1)
317 return buf->direct.buf + offset;
318 else
319 return buf->page_list[offset >> PAGE_SHIFT].buf +
320 (offset & (PAGE_SIZE - 1));
321}
311 322
312int mlx4_pd_alloc(struct mlx4_dev *dev, u32 *pdn); 323int mlx4_pd_alloc(struct mlx4_dev *dev, u32 *pdn);
313void mlx4_pd_free(struct mlx4_dev *dev, u32 pdn); 324void mlx4_pd_free(struct mlx4_dev *dev, u32 pdn);
diff --git a/include/linux/mlx4/qp.h b/include/linux/mlx4/qp.h
index 3968b943259a..09a2230923f2 100644
--- a/include/linux/mlx4/qp.h
+++ b/include/linux/mlx4/qp.h
@@ -154,7 +154,11 @@ struct mlx4_qp_context {
154 u32 reserved5[10]; 154 u32 reserved5[10];
155}; 155};
156 156
157/* Which firmware version adds support for NEC (NoErrorCompletion) bit */
158#define MLX4_FW_VER_WQE_CTRL_NEC mlx4_fw_ver(2, 2, 232)
159
157enum { 160enum {
161 MLX4_WQE_CTRL_NEC = 1 << 29,
158 MLX4_WQE_CTRL_FENCE = 1 << 6, 162 MLX4_WQE_CTRL_FENCE = 1 << 6,
159 MLX4_WQE_CTRL_CQ_UPDATE = 3 << 2, 163 MLX4_WQE_CTRL_CQ_UPDATE = 3 << 2,
160 MLX4_WQE_CTRL_SOLICITED = 1 << 1, 164 MLX4_WQE_CTRL_SOLICITED = 1 << 1,
diff --git a/include/linux/mm.h b/include/linux/mm.h
index 89d7c691b93a..e8abb3814209 100644
--- a/include/linux/mm.h
+++ b/include/linux/mm.h
@@ -894,6 +894,18 @@ static inline pmd_t *pmd_alloc(struct mm_struct *mm, pud_t *pud, unsigned long a
894#define pte_lockptr(mm, pmd) ({(void)(pmd); &(mm)->page_table_lock;}) 894#define pte_lockptr(mm, pmd) ({(void)(pmd); &(mm)->page_table_lock;})
895#endif /* NR_CPUS < CONFIG_SPLIT_PTLOCK_CPUS */ 895#endif /* NR_CPUS < CONFIG_SPLIT_PTLOCK_CPUS */
896 896
897static inline void pgtable_page_ctor(struct page *page)
898{
899 pte_lock_init(page);
900 inc_zone_page_state(page, NR_PAGETABLE);
901}
902
903static inline void pgtable_page_dtor(struct page *page)
904{
905 pte_lock_deinit(page);
906 dec_zone_page_state(page, NR_PAGETABLE);
907}
908
897#define pte_offset_map_lock(mm, pmd, address, ptlp) \ 909#define pte_offset_map_lock(mm, pmd, address, ptlp) \
898({ \ 910({ \
899 spinlock_t *__ptl = pte_lockptr(mm, pmd); \ 911 spinlock_t *__ptl = pte_lockptr(mm, pmd); \
@@ -1136,7 +1148,7 @@ struct page *follow_page(struct vm_area_struct *, unsigned long address,
1136#define FOLL_GET 0x04 /* do get_page on page */ 1148#define FOLL_GET 0x04 /* do get_page on page */
1137#define FOLL_ANON 0x08 /* give ZERO_PAGE if no pgtable */ 1149#define FOLL_ANON 0x08 /* give ZERO_PAGE if no pgtable */
1138 1150
1139typedef int (*pte_fn_t)(pte_t *pte, struct page *pmd_page, unsigned long addr, 1151typedef int (*pte_fn_t)(pte_t *pte, pgtable_t token, unsigned long addr,
1140 void *data); 1152 void *data);
1141extern int apply_to_page_range(struct mm_struct *mm, unsigned long address, 1153extern int apply_to_page_range(struct mm_struct *mm, unsigned long address,
1142 unsigned long size, pte_fn_t fn, void *data); 1154 unsigned long size, pte_fn_t fn, void *data);
diff --git a/include/linux/module.h b/include/linux/module.h
index ac481e2094fd..ac28e8761e84 100644
--- a/include/linux/module.h
+++ b/include/linux/module.h
@@ -449,7 +449,7 @@ static inline void __module_get(struct module *module)
449/* For kallsyms to ask for address resolution. namebuf should be at 449/* For kallsyms to ask for address resolution. namebuf should be at
450 * least KSYM_NAME_LEN long: a pointer to namebuf is returned if 450 * least KSYM_NAME_LEN long: a pointer to namebuf is returned if
451 * found, otherwise NULL. */ 451 * found, otherwise NULL. */
452char *module_address_lookup(unsigned long addr, 452const char *module_address_lookup(unsigned long addr,
453 unsigned long *symbolsize, 453 unsigned long *symbolsize,
454 unsigned long *offset, 454 unsigned long *offset,
455 char **modname, 455 char **modname,
@@ -519,7 +519,7 @@ static inline void module_put(struct module *module)
519#define module_name(mod) "kernel" 519#define module_name(mod) "kernel"
520 520
521/* For kallsyms to ask for address resolution. NULL means not found. */ 521/* For kallsyms to ask for address resolution. NULL means not found. */
522static inline char *module_address_lookup(unsigned long addr, 522static inline const char *module_address_lookup(unsigned long addr,
523 unsigned long *symbolsize, 523 unsigned long *symbolsize,
524 unsigned long *offset, 524 unsigned long *offset,
525 char **modname, 525 char **modname,
diff --git a/include/linux/mutex.h b/include/linux/mutex.h
index 05c590352dd7..bc6da10ceee0 100644
--- a/include/linux/mutex.h
+++ b/include/linux/mutex.h
@@ -112,7 +112,7 @@ extern void __mutex_init(struct mutex *lock, const char *name,
112 * 112 *
113 * Returns 1 if the mutex is locked, 0 if unlocked. 113 * Returns 1 if the mutex is locked, 0 if unlocked.
114 */ 114 */
115static inline int fastcall mutex_is_locked(struct mutex *lock) 115static inline int mutex_is_locked(struct mutex *lock)
116{ 116{
117 return atomic_read(&lock->count) != 1; 117 return atomic_read(&lock->count) != 1;
118} 118}
@@ -132,9 +132,9 @@ extern int __must_check mutex_lock_killable_nested(struct mutex *lock,
132#define mutex_lock_interruptible(lock) mutex_lock_interruptible_nested(lock, 0) 132#define mutex_lock_interruptible(lock) mutex_lock_interruptible_nested(lock, 0)
133#define mutex_lock_killable(lock) mutex_lock_killable_nested(lock, 0) 133#define mutex_lock_killable(lock) mutex_lock_killable_nested(lock, 0)
134#else 134#else
135extern void fastcall mutex_lock(struct mutex *lock); 135extern void mutex_lock(struct mutex *lock);
136extern int __must_check fastcall mutex_lock_interruptible(struct mutex *lock); 136extern int __must_check mutex_lock_interruptible(struct mutex *lock);
137extern int __must_check fastcall mutex_lock_killable(struct mutex *lock); 137extern int __must_check mutex_lock_killable(struct mutex *lock);
138 138
139# define mutex_lock_nested(lock, subclass) mutex_lock(lock) 139# define mutex_lock_nested(lock, subclass) mutex_lock(lock)
140# define mutex_lock_interruptible_nested(lock, subclass) mutex_lock_interruptible(lock) 140# define mutex_lock_interruptible_nested(lock, subclass) mutex_lock_interruptible(lock)
@@ -145,7 +145,7 @@ extern int __must_check fastcall mutex_lock_killable(struct mutex *lock);
145 * NOTE: mutex_trylock() follows the spin_trylock() convention, 145 * NOTE: mutex_trylock() follows the spin_trylock() convention,
146 * not the down_trylock() convention! 146 * not the down_trylock() convention!
147 */ 147 */
148extern int fastcall mutex_trylock(struct mutex *lock); 148extern int mutex_trylock(struct mutex *lock);
149extern void fastcall mutex_unlock(struct mutex *lock); 149extern void mutex_unlock(struct mutex *lock);
150 150
151#endif 151#endif
diff --git a/include/linux/nbd.h b/include/linux/nbd.h
index cc2b47240a8f..986572081e19 100644
--- a/include/linux/nbd.h
+++ b/include/linux/nbd.h
@@ -35,7 +35,6 @@ enum {
35}; 35};
36 36
37#define nbd_cmd(req) ((req)->cmd[0]) 37#define nbd_cmd(req) ((req)->cmd[0])
38#define MAX_NBD 128
39 38
40/* userspace doesn't need the nbd_device structure */ 39/* userspace doesn't need the nbd_device structure */
41#ifdef __KERNEL__ 40#ifdef __KERNEL__
diff --git a/include/linux/pfkeyv2.h b/include/linux/pfkeyv2.h
index 6db69ff5d83e..700725ddcaae 100644
--- a/include/linux/pfkeyv2.h
+++ b/include/linux/pfkeyv2.h
@@ -298,6 +298,7 @@ struct sadb_x_sec_ctx {
298#define SADB_X_EALG_BLOWFISHCBC 7 298#define SADB_X_EALG_BLOWFISHCBC 7
299#define SADB_EALG_NULL 11 299#define SADB_EALG_NULL 11
300#define SADB_X_EALG_AESCBC 12 300#define SADB_X_EALG_AESCBC 12
301#define SADB_X_EALG_AESCTR 13
301#define SADB_X_EALG_AES_CCM_ICV8 14 302#define SADB_X_EALG_AES_CCM_ICV8 14
302#define SADB_X_EALG_AES_CCM_ICV12 15 303#define SADB_X_EALG_AES_CCM_ICV12 15
303#define SADB_X_EALG_AES_CCM_ICV16 16 304#define SADB_X_EALG_AES_CCM_ICV16 16
diff --git a/include/linux/pid.h b/include/linux/pid.h
index e29a900a8499..f84d532b5d23 100644
--- a/include/linux/pid.h
+++ b/include/linux/pid.h
@@ -118,18 +118,17 @@ extern struct pid *find_pid(int nr);
118 */ 118 */
119extern struct pid *find_get_pid(int nr); 119extern struct pid *find_get_pid(int nr);
120extern struct pid *find_ge_pid(int nr, struct pid_namespace *); 120extern struct pid *find_ge_pid(int nr, struct pid_namespace *);
121int next_pidmap(struct pid_namespace *pid_ns, int last);
121 122
122extern struct pid *alloc_pid(struct pid_namespace *ns); 123extern struct pid *alloc_pid(struct pid_namespace *ns);
123extern void FASTCALL(free_pid(struct pid *pid)); 124extern void FASTCALL(free_pid(struct pid *pid));
124extern void zap_pid_ns_processes(struct pid_namespace *pid_ns);
125 125
126/* 126/*
127 * the helpers to get the pid's id seen from different namespaces 127 * the helpers to get the pid's id seen from different namespaces
128 * 128 *
129 * pid_nr() : global id, i.e. the id seen from the init namespace; 129 * pid_nr() : global id, i.e. the id seen from the init namespace;
130 * pid_vnr() : virtual id, i.e. the id seen from the namespace this pid 130 * pid_vnr() : virtual id, i.e. the id seen from the pid namespace of
131 * belongs to. this only makes sence when called in the 131 * current.
132 * context of the task that belongs to the same namespace;
133 * pid_nr_ns() : id seen from the ns specified. 132 * pid_nr_ns() : id seen from the ns specified.
134 * 133 *
135 * see also task_xid_nr() etc in include/linux/sched.h 134 * see also task_xid_nr() etc in include/linux/sched.h
@@ -144,14 +143,7 @@ static inline pid_t pid_nr(struct pid *pid)
144} 143}
145 144
146pid_t pid_nr_ns(struct pid *pid, struct pid_namespace *ns); 145pid_t pid_nr_ns(struct pid *pid, struct pid_namespace *ns);
147 146pid_t pid_vnr(struct pid *pid);
148static inline pid_t pid_vnr(struct pid *pid)
149{
150 pid_t nr = 0;
151 if (pid)
152 nr = pid->numbers[pid->level].nr;
153 return nr;
154}
155 147
156#define do_each_pid_task(pid, type, task) \ 148#define do_each_pid_task(pid, type, task) \
157 do { \ 149 do { \
@@ -160,7 +152,13 @@ static inline pid_t pid_vnr(struct pid *pid)
160 hlist_for_each_entry_rcu((task), pos___, \ 152 hlist_for_each_entry_rcu((task), pos___, \
161 &pid->tasks[type], pids[type].node) { 153 &pid->tasks[type], pids[type].node) {
162 154
155 /*
156 * Both old and new leaders may be attached to
157 * the same pid in the middle of de_thread().
158 */
163#define while_each_pid_task(pid, type, task) \ 159#define while_each_pid_task(pid, type, task) \
160 if (type == PIDTYPE_PID) \
161 break; \
164 } \ 162 } \
165 } while (0) 163 } while (0)
166 164
diff --git a/include/linux/pid_namespace.h b/include/linux/pid_namespace.h
index 1689e28483e4..fcd61fa2c833 100644
--- a/include/linux/pid_namespace.h
+++ b/include/linux/pid_namespace.h
@@ -39,6 +39,7 @@ static inline struct pid_namespace *get_pid_ns(struct pid_namespace *ns)
39 39
40extern struct pid_namespace *copy_pid_ns(unsigned long flags, struct pid_namespace *ns); 40extern struct pid_namespace *copy_pid_ns(unsigned long flags, struct pid_namespace *ns);
41extern void free_pid_ns(struct kref *kref); 41extern void free_pid_ns(struct kref *kref);
42extern void zap_pid_ns_processes(struct pid_namespace *pid_ns);
42 43
43static inline void put_pid_ns(struct pid_namespace *ns) 44static inline void put_pid_ns(struct pid_namespace *ns)
44{ 45{
@@ -66,6 +67,11 @@ static inline void put_pid_ns(struct pid_namespace *ns)
66{ 67{
67} 68}
68 69
70
71static inline void zap_pid_ns_processes(struct pid_namespace *ns)
72{
73 BUG();
74}
69#endif /* CONFIG_PID_NS */ 75#endif /* CONFIG_PID_NS */
70 76
71static inline struct pid_namespace *task_active_pid_ns(struct task_struct *tsk) 77static inline struct pid_namespace *task_active_pid_ns(struct task_struct *tsk)
diff --git a/include/linux/preempt.h b/include/linux/preempt.h
index 484988ed301e..23f0c54175cd 100644
--- a/include/linux/preempt.h
+++ b/include/linux/preempt.h
@@ -11,8 +11,8 @@
11#include <linux/list.h> 11#include <linux/list.h>
12 12
13#ifdef CONFIG_DEBUG_PREEMPT 13#ifdef CONFIG_DEBUG_PREEMPT
14 extern void fastcall add_preempt_count(int val); 14 extern void add_preempt_count(int val);
15 extern void fastcall sub_preempt_count(int val); 15 extern void sub_preempt_count(int val);
16#else 16#else
17# define add_preempt_count(val) do { preempt_count() += (val); } while (0) 17# define add_preempt_count(val) do { preempt_count() += (val); } while (0)
18# define sub_preempt_count(val) do { preempt_count() -= (val); } while (0) 18# define sub_preempt_count(val) do { preempt_count() -= (val); } while (0)
diff --git a/include/linux/proc_fs.h b/include/linux/proc_fs.h
index e43551516831..d6a4f69bdc92 100644
--- a/include/linux/proc_fs.h
+++ b/include/linux/proc_fs.h
@@ -118,13 +118,17 @@ struct dentry *proc_pid_lookup(struct inode *dir, struct dentry * dentry, struct
118int proc_pid_readdir(struct file * filp, void * dirent, filldir_t filldir); 118int proc_pid_readdir(struct file * filp, void * dirent, filldir_t filldir);
119unsigned long task_vsize(struct mm_struct *); 119unsigned long task_vsize(struct mm_struct *);
120int task_statm(struct mm_struct *, int *, int *, int *, int *); 120int task_statm(struct mm_struct *, int *, int *, int *, int *);
121char *task_mem(struct mm_struct *, char *); 121void task_mem(struct seq_file *, struct mm_struct *);
122void clear_refs_smap(struct mm_struct *mm);
122 123
123struct proc_dir_entry *de_get(struct proc_dir_entry *de); 124struct proc_dir_entry *de_get(struct proc_dir_entry *de);
124void de_put(struct proc_dir_entry *de); 125void de_put(struct proc_dir_entry *de);
125 126
126extern struct proc_dir_entry *create_proc_entry(const char *name, mode_t mode, 127extern struct proc_dir_entry *create_proc_entry(const char *name, mode_t mode,
127 struct proc_dir_entry *parent); 128 struct proc_dir_entry *parent);
129struct proc_dir_entry *proc_create(const char *name, mode_t mode,
130 struct proc_dir_entry *parent,
131 const struct file_operations *proc_fops);
128extern void remove_proc_entry(const char *name, struct proc_dir_entry *parent); 132extern void remove_proc_entry(const char *name, struct proc_dir_entry *parent);
129 133
130extern struct vfsmount *proc_mnt; 134extern struct vfsmount *proc_mnt;
@@ -219,7 +223,12 @@ static inline void proc_flush_task(struct task_struct *task)
219 223
220static inline struct proc_dir_entry *create_proc_entry(const char *name, 224static inline struct proc_dir_entry *create_proc_entry(const char *name,
221 mode_t mode, struct proc_dir_entry *parent) { return NULL; } 225 mode_t mode, struct proc_dir_entry *parent) { return NULL; }
222 226static inline struct proc_dir_entry *proc_create(const char *name,
227 mode_t mode, struct proc_dir_entry *parent,
228 const struct file_operations *proc_fops)
229{
230 return NULL;
231}
223#define remove_proc_entry(name, parent) do {} while (0) 232#define remove_proc_entry(name, parent) do {} while (0)
224 233
225static inline struct proc_dir_entry *proc_symlink(const char *name, 234static inline struct proc_dir_entry *proc_symlink(const char *name,
@@ -262,6 +271,9 @@ extern void kclist_add(struct kcore_list *, void *, size_t);
262union proc_op { 271union proc_op {
263 int (*proc_get_link)(struct inode *, struct dentry **, struct vfsmount **); 272 int (*proc_get_link)(struct inode *, struct dentry **, struct vfsmount **);
264 int (*proc_read)(struct task_struct *task, char *page); 273 int (*proc_read)(struct task_struct *task, char *page);
274 int (*proc_show)(struct seq_file *m,
275 struct pid_namespace *ns, struct pid *pid,
276 struct task_struct *task);
265}; 277};
266 278
267struct proc_inode { 279struct proc_inode {
diff --git a/include/linux/ptrace.h b/include/linux/ptrace.h
index 6ab80714a916..ebe0c17039cf 100644
--- a/include/linux/ptrace.h
+++ b/include/linux/ptrace.h
@@ -67,7 +67,6 @@
67#define PT_TRACE_EXEC 0x00000080 67#define PT_TRACE_EXEC 0x00000080
68#define PT_TRACE_VFORK_DONE 0x00000100 68#define PT_TRACE_VFORK_DONE 0x00000100
69#define PT_TRACE_EXIT 0x00000200 69#define PT_TRACE_EXIT 0x00000200
70#define PT_ATTACHED 0x00000400 /* parent != real_parent */
71 70
72#define PT_TRACE_MASK 0x000003f4 71#define PT_TRACE_MASK 0x000003f4
73 72
diff --git a/include/linux/rcupreempt.h b/include/linux/rcupreempt.h
index ece8eb3e4151..60c2a033b19e 100644
--- a/include/linux/rcupreempt.h
+++ b/include/linux/rcupreempt.h
@@ -46,8 +46,8 @@
46#define rcu_bh_qsctr_inc(cpu) 46#define rcu_bh_qsctr_inc(cpu)
47#define call_rcu_bh(head, rcu) call_rcu(head, rcu) 47#define call_rcu_bh(head, rcu) call_rcu(head, rcu)
48 48
49extern void __rcu_read_lock(void); 49extern void __rcu_read_lock(void) __acquires(RCU);
50extern void __rcu_read_unlock(void); 50extern void __rcu_read_unlock(void) __releases(RCU);
51extern int rcu_pending(int cpu); 51extern int rcu_pending(int cpu);
52extern int rcu_needs_cpu(int cpu); 52extern int rcu_needs_cpu(int cpu);
53 53
diff --git a/include/linux/reiserfs_fs.h b/include/linux/reiserfs_fs.h
index 422eab4958a6..8e7eff2cd0ab 100644
--- a/include/linux/reiserfs_fs.h
+++ b/include/linux/reiserfs_fs.h
@@ -287,7 +287,7 @@ static inline struct reiserfs_sb_info *REISERFS_SB(const struct super_block *sb)
287 287
288/* Don't trust REISERFS_SB(sb)->s_bmap_nr, it's a u16 288/* Don't trust REISERFS_SB(sb)->s_bmap_nr, it's a u16
289 * which overflows on large file systems. */ 289 * which overflows on large file systems. */
290static inline u32 reiserfs_bmap_count(struct super_block *sb) 290static inline __u32 reiserfs_bmap_count(struct super_block *sb)
291{ 291{
292 return (SB_BLOCK_COUNT(sb) - 1) / (sb->s_blocksize * 8) + 1; 292 return (SB_BLOCK_COUNT(sb) - 1) / (sb->s_blocksize * 8) + 1;
293} 293}
diff --git a/include/linux/sched.h b/include/linux/sched.h
index 8a4812c1c038..00e144117326 100644
--- a/include/linux/sched.h
+++ b/include/linux/sched.h
@@ -460,7 +460,7 @@ struct signal_struct {
460 460
461 /* ITIMER_REAL timer for the process */ 461 /* ITIMER_REAL timer for the process */
462 struct hrtimer real_timer; 462 struct hrtimer real_timer;
463 struct task_struct *tsk; 463 struct pid *leader_pid;
464 ktime_t it_real_incr; 464 ktime_t it_real_incr;
465 465
466 /* ITIMER_PROF and ITIMER_VIRTUAL timers for the process */ 466 /* ITIMER_PROF and ITIMER_VIRTUAL timers for the process */
@@ -1332,9 +1332,8 @@ struct pid_namespace;
1332 * from various namespaces 1332 * from various namespaces
1333 * 1333 *
1334 * task_xid_nr() : global id, i.e. the id seen from the init namespace; 1334 * task_xid_nr() : global id, i.e. the id seen from the init namespace;
1335 * task_xid_vnr() : virtual id, i.e. the id seen from the namespace the task 1335 * task_xid_vnr() : virtual id, i.e. the id seen from the pid namespace of
1336 * belongs to. this only makes sence when called in the 1336 * current.
1337 * context of the task that belongs to the same namespace;
1338 * task_xid_nr_ns() : id seen from the ns specified; 1337 * task_xid_nr_ns() : id seen from the ns specified;
1339 * 1338 *
1340 * set_task_vxid() : assigns a virtual id to a task; 1339 * set_task_vxid() : assigns a virtual id to a task;
@@ -1632,7 +1631,7 @@ extern struct task_struct *find_task_by_vpid(pid_t nr);
1632extern struct task_struct *find_task_by_pid_ns(pid_t nr, 1631extern struct task_struct *find_task_by_pid_ns(pid_t nr,
1633 struct pid_namespace *ns); 1632 struct pid_namespace *ns);
1634 1633
1635extern void __set_special_pids(pid_t session, pid_t pgrp); 1634extern void __set_special_pids(struct pid *pid);
1636 1635
1637/* per-UID process charging. */ 1636/* per-UID process charging. */
1638extern struct user_struct * alloc_uid(struct user_namespace *, uid_t); 1637extern struct user_struct * alloc_uid(struct user_namespace *, uid_t);
@@ -1687,11 +1686,9 @@ extern void block_all_signals(int (*notifier)(void *priv), void *priv,
1687extern void unblock_all_signals(void); 1686extern void unblock_all_signals(void);
1688extern void release_task(struct task_struct * p); 1687extern void release_task(struct task_struct * p);
1689extern int send_sig_info(int, struct siginfo *, struct task_struct *); 1688extern int send_sig_info(int, struct siginfo *, struct task_struct *);
1690extern int send_group_sig_info(int, struct siginfo *, struct task_struct *);
1691extern int force_sigsegv(int, struct task_struct *); 1689extern int force_sigsegv(int, struct task_struct *);
1692extern int force_sig_info(int, struct siginfo *, struct task_struct *); 1690extern int force_sig_info(int, struct siginfo *, struct task_struct *);
1693extern int __kill_pgrp_info(int sig, struct siginfo *info, struct pid *pgrp); 1691extern int __kill_pgrp_info(int sig, struct siginfo *info, struct pid *pgrp);
1694extern int kill_pgrp_info(int sig, struct siginfo *info, struct pid *pgrp);
1695extern int kill_pid_info(int sig, struct siginfo *info, struct pid *pid); 1692extern int kill_pid_info(int sig, struct siginfo *info, struct pid *pid);
1696extern int kill_pid_info_as_uid(int, struct siginfo *, struct pid *, uid_t, uid_t, u32); 1693extern int kill_pid_info_as_uid(int, struct siginfo *, struct pid *, uid_t, uid_t, u32);
1697extern int kill_pgrp(struct pid *pid, int sig, int priv); 1694extern int kill_pgrp(struct pid *pid, int sig, int priv);
diff --git a/include/linux/serial_core.h b/include/linux/serial_core.h
index 9963f81fea9a..1a0b6cf83ff1 100644
--- a/include/linux/serial_core.h
+++ b/include/linux/serial_core.h
@@ -150,6 +150,10 @@
150#define PORT_MCF 78 150#define PORT_MCF 78
151 151
152 152
153/* MN10300 on-chip UART numbers */
154#define PORT_MN10300 80
155#define PORT_MN10300_CTS 81
156
153#ifdef __KERNEL__ 157#ifdef __KERNEL__
154 158
155#include <linux/compiler.h> 159#include <linux/compiler.h>
diff --git a/include/linux/shmem_fs.h b/include/linux/shmem_fs.h
index f3c51899117f..8d5fb36ea047 100644
--- a/include/linux/shmem_fs.h
+++ b/include/linux/shmem_fs.h
@@ -30,9 +30,12 @@ struct shmem_sb_info {
30 unsigned long free_blocks; /* How many are left for allocation */ 30 unsigned long free_blocks; /* How many are left for allocation */
31 unsigned long max_inodes; /* How many inodes are allowed */ 31 unsigned long max_inodes; /* How many inodes are allowed */
32 unsigned long free_inodes; /* How many are left for allocation */ 32 unsigned long free_inodes; /* How many are left for allocation */
33 spinlock_t stat_lock; /* Serialize shmem_sb_info changes */
34 uid_t uid; /* Mount uid for root directory */
35 gid_t gid; /* Mount gid for root directory */
36 mode_t mode; /* Mount mode for root directory */
33 int policy; /* Default NUMA memory alloc policy */ 37 int policy; /* Default NUMA memory alloc policy */
34 nodemask_t policy_nodes; /* nodemask for preferred and bind */ 38 nodemask_t policy_nodes; /* nodemask for preferred and bind */
35 spinlock_t stat_lock;
36}; 39};
37 40
38static inline struct shmem_inode_info *SHMEM_I(struct inode *inode) 41static inline struct shmem_inode_info *SHMEM_I(struct inode *inode)
diff --git a/include/linux/signal.h b/include/linux/signal.h
index 7e095147656c..42d2e0a948f4 100644
--- a/include/linux/signal.h
+++ b/include/linux/signal.h
@@ -241,6 +241,7 @@ extern int show_unhandled_signals;
241 241
242struct pt_regs; 242struct pt_regs;
243extern int get_signal_to_deliver(siginfo_t *info, struct k_sigaction *return_ka, struct pt_regs *regs, void *cookie); 243extern int get_signal_to_deliver(siginfo_t *info, struct k_sigaction *return_ka, struct pt_regs *regs, void *cookie);
244extern void exit_signals(struct task_struct *tsk);
244 245
245extern struct kmem_cache *sighand_cachep; 246extern struct kmem_cache *sighand_cachep;
246 247
diff --git a/include/linux/spinlock.h b/include/linux/spinlock.h
index 124449733c55..576a5f77d3bd 100644
--- a/include/linux/spinlock.h
+++ b/include/linux/spinlock.h
@@ -71,7 +71,7 @@
71#define LOCK_SECTION_END \ 71#define LOCK_SECTION_END \
72 ".previous\n\t" 72 ".previous\n\t"
73 73
74#define __lockfunc fastcall __attribute__((section(".spinlock.text"))) 74#define __lockfunc __attribute__((section(".spinlock.text")))
75 75
76/* 76/*
77 * Pull the raw_spinlock_t and raw_rwlock_t definitions: 77 * Pull the raw_spinlock_t and raw_rwlock_t definitions:
diff --git a/include/linux/time.h b/include/linux/time.h
index ceaab9fff155..2091a19f1655 100644
--- a/include/linux/time.h
+++ b/include/linux/time.h
@@ -120,7 +120,7 @@ extern void getboottime(struct timespec *ts);
120extern void monotonic_to_bootbased(struct timespec *ts); 120extern void monotonic_to_bootbased(struct timespec *ts);
121 121
122extern struct timespec timespec_trunc(struct timespec t, unsigned gran); 122extern struct timespec timespec_trunc(struct timespec t, unsigned gran);
123extern int timekeeping_is_continuous(void); 123extern int timekeeping_valid_for_hres(void);
124extern void update_wall_time(void); 124extern void update_wall_time(void);
125extern void update_xtime_cache(u64 nsec); 125extern void update_xtime_cache(u64 nsec);
126 126
diff --git a/include/linux/timer.h b/include/linux/timer.h
index de0e71359ede..979fefdeb862 100644
--- a/include/linux/timer.h
+++ b/include/linux/timer.h
@@ -35,8 +35,8 @@ extern struct tvec_base boot_tvec_bases;
35 struct timer_list _name = \ 35 struct timer_list _name = \
36 TIMER_INITIALIZER(_function, _expires, _data) 36 TIMER_INITIALIZER(_function, _expires, _data)
37 37
38void fastcall init_timer(struct timer_list * timer); 38void init_timer(struct timer_list *timer);
39void fastcall init_timer_deferrable(struct timer_list *timer); 39void init_timer_deferrable(struct timer_list *timer);
40 40
41static inline void setup_timer(struct timer_list * timer, 41static inline void setup_timer(struct timer_list * timer,
42 void (*function)(unsigned long), 42 void (*function)(unsigned long),
@@ -124,8 +124,6 @@ static inline void timer_stats_timer_clear_start_info(struct timer_list *timer)
124} 124}
125#endif 125#endif
126 126
127extern void delayed_work_timer_fn(unsigned long __data);
128
129/** 127/**
130 * add_timer - start a timer 128 * add_timer - start a timer
131 * @timer: the timer to be added 129 * @timer: the timer to be added
diff --git a/include/linux/types.h b/include/linux/types.h
index b94c0e4efe24..9dc2346627b4 100644
--- a/include/linux/types.h
+++ b/include/linux/types.h
@@ -53,7 +53,7 @@ typedef __kernel_uid_t uid_t;
53typedef __kernel_gid_t gid_t; 53typedef __kernel_gid_t gid_t;
54#endif /* __KERNEL__ */ 54#endif /* __KERNEL__ */
55 55
56#if defined(__GNUC__) && !defined(__STRICT_ANSI__) 56#if defined(__GNUC__)
57typedef __kernel_loff_t loff_t; 57typedef __kernel_loff_t loff_t;
58#endif 58#endif
59 59
@@ -119,7 +119,7 @@ typedef __u8 uint8_t;
119typedef __u16 uint16_t; 119typedef __u16 uint16_t;
120typedef __u32 uint32_t; 120typedef __u32 uint32_t;
121 121
122#if defined(__GNUC__) && !defined(__STRICT_ANSI__) 122#if defined(__GNUC__)
123typedef __u64 uint64_t; 123typedef __u64 uint64_t;
124typedef __u64 u_int64_t; 124typedef __u64 u_int64_t;
125typedef __s64 int64_t; 125typedef __s64 int64_t;
@@ -181,7 +181,7 @@ typedef __u16 __bitwise __le16;
181typedef __u16 __bitwise __be16; 181typedef __u16 __bitwise __be16;
182typedef __u32 __bitwise __le32; 182typedef __u32 __bitwise __le32;
183typedef __u32 __bitwise __be32; 183typedef __u32 __bitwise __be32;
184#if defined(__GNUC__) && !defined(__STRICT_ANSI__) 184#if defined(__GNUC__)
185typedef __u64 __bitwise __le64; 185typedef __u64 __bitwise __le64;
186typedef __u64 __bitwise __be64; 186typedef __u64 __bitwise __be64;
187#endif 187#endif
diff --git a/include/linux/udf_fs.h b/include/linux/udf_fs.h
index 36c684e1b110..aa88654eb76b 100644
--- a/include/linux/udf_fs.h
+++ b/include/linux/udf_fs.h
@@ -32,18 +32,15 @@
32#define UDF_PREALLOCATE 32#define UDF_PREALLOCATE
33#define UDF_DEFAULT_PREALLOC_BLOCKS 8 33#define UDF_DEFAULT_PREALLOC_BLOCKS 8
34 34
35#define UDFFS_DATE "2004/29/09"
36#define UDFFS_VERSION "0.9.8.1"
37
38#undef UDFFS_DEBUG 35#undef UDFFS_DEBUG
39 36
40#ifdef UDFFS_DEBUG 37#ifdef UDFFS_DEBUG
41#define udf_debug(f, a...) \ 38#define udf_debug(f, a...) \
42 { \ 39 do { \
43 printk (KERN_DEBUG "UDF-fs DEBUG %s:%d:%s: ", \ 40 printk (KERN_DEBUG "UDF-fs DEBUG %s:%d:%s: ", \
44 __FILE__, __LINE__, __FUNCTION__); \ 41 __FILE__, __LINE__, __FUNCTION__); \
45 printk (f, ##a); \ 42 printk (f, ##a); \
46 } 43 } while (0)
47#else 44#else
48#define udf_debug(f, a...) /**/ 45#define udf_debug(f, a...) /**/
49#endif 46#endif
diff --git a/include/linux/udf_fs_sb.h b/include/linux/udf_fs_sb.h
index 80ae9ef940dc..9bc47352b6b4 100644
--- a/include/linux/udf_fs_sb.h
+++ b/include/linux/udf_fs_sb.h
@@ -75,7 +75,7 @@ struct udf_part_map
75struct udf_sb_info 75struct udf_sb_info
76{ 76{
77 struct udf_part_map *s_partmaps; 77 struct udf_part_map *s_partmaps;
78 __u8 s_volident[32]; 78 __u8 s_volume_ident[32];
79 79
80 /* Overall info */ 80 /* Overall info */
81 __u16 s_partitions; 81 __u16 s_partitions;
@@ -84,9 +84,9 @@ struct udf_sb_info
84 /* Sector headers */ 84 /* Sector headers */
85 __s32 s_session; 85 __s32 s_session;
86 __u32 s_anchor[4]; 86 __u32 s_anchor[4];
87 __u32 s_lastblock; 87 __u32 s_last_block;
88 88
89 struct buffer_head *s_lvidbh; 89 struct buffer_head *s_lvid_bh;
90 90
91 /* Default permissions */ 91 /* Default permissions */
92 mode_t s_umask; 92 mode_t s_umask;
@@ -94,10 +94,10 @@ struct udf_sb_info
94 uid_t s_uid; 94 uid_t s_uid;
95 95
96 /* Root Info */ 96 /* Root Info */
97 struct timespec s_recordtime; 97 struct timespec s_record_time;
98 98
99 /* Fileset Info */ 99 /* Fileset Info */
100 __u16 s_serialnum; 100 __u16 s_serial_number;
101 101
102 /* highest UDF revision we have recorded to this media */ 102 /* highest UDF revision we have recorded to this media */
103 __u16 s_udfrev; 103 __u16 s_udfrev;
@@ -109,7 +109,7 @@ struct udf_sb_info
109 struct nls_table *s_nls_map; 109 struct nls_table *s_nls_map;
110 110
111 /* VAT inode */ 111 /* VAT inode */
112 struct inode *s_vat; 112 struct inode *s_vat_inode;
113 113
114 struct mutex s_alloc_mutex; 114 struct mutex s_alloc_mutex;
115}; 115};
diff --git a/include/linux/utsname.h b/include/linux/utsname.h
index 923db99175f2..11232676bfff 100644
--- a/include/linux/utsname.h
+++ b/include/linux/utsname.h
@@ -35,6 +35,7 @@ struct new_utsname {
35#include <linux/sched.h> 35#include <linux/sched.h>
36#include <linux/kref.h> 36#include <linux/kref.h>
37#include <linux/nsproxy.h> 37#include <linux/nsproxy.h>
38#include <linux/err.h>
38#include <asm/atomic.h> 39#include <asm/atomic.h>
39 40
40struct uts_namespace { 41struct uts_namespace {
@@ -43,6 +44,7 @@ struct uts_namespace {
43}; 44};
44extern struct uts_namespace init_uts_ns; 45extern struct uts_namespace init_uts_ns;
45 46
47#ifdef CONFIG_UTS_NS
46static inline void get_uts_ns(struct uts_namespace *ns) 48static inline void get_uts_ns(struct uts_namespace *ns)
47{ 49{
48 kref_get(&ns->kref); 50 kref_get(&ns->kref);
@@ -56,6 +58,25 @@ static inline void put_uts_ns(struct uts_namespace *ns)
56{ 58{
57 kref_put(&ns->kref, free_uts_ns); 59 kref_put(&ns->kref, free_uts_ns);
58} 60}
61#else
62static inline void get_uts_ns(struct uts_namespace *ns)
63{
64}
65
66static inline void put_uts_ns(struct uts_namespace *ns)
67{
68}
69
70static inline struct uts_namespace *copy_utsname(unsigned long flags,
71 struct uts_namespace *ns)
72{
73 if (flags & CLONE_NEWUTS)
74 return ERR_PTR(-EINVAL);
75
76 return ns;
77}
78#endif
79
59static inline struct new_utsname *utsname(void) 80static inline struct new_utsname *utsname(void)
60{ 81{
61 return &current->nsproxy->uts_ns->name; 82 return &current->nsproxy->uts_ns->name;
diff --git a/include/net/ip6_fib.h b/include/net/ip6_fib.h
index d8d85b13364d..953d6040ff50 100644
--- a/include/net/ip6_fib.h
+++ b/include/net/ip6_fib.h
@@ -150,19 +150,6 @@ struct rt6_statistics {
150 * 150 *
151 */ 151 */
152 152
153#define RTPRI_FIREWALL 8 /* Firewall control information */
154#define RTPRI_FLOW 16 /* Flow based forwarding rules */
155#define RTPRI_KERN_CTL 32 /* Kernel control routes */
156
157#define RTPRI_USER_MIN 256 /* Mimimum user priority */
158#define RTPRI_USER_MAX 1024 /* Maximum user priority */
159
160#define RTPRI_KERN_DFLT 4096 /* Kernel default routes */
161
162#define MAX_FLOW_BACKTRACE 32
163
164
165typedef void (*f_pnode)(struct fib6_node *fn, void *);
166 153
167struct fib6_table { 154struct fib6_table {
168 struct hlist_node tb6_hlist; 155 struct hlist_node tb6_hlist;
diff --git a/include/net/ip6_route.h b/include/net/ip6_route.h
index faac0eee1ef3..f99e4f0f568f 100644
--- a/include/net/ip6_route.h
+++ b/include/net/ip6_route.h
@@ -1,11 +1,9 @@
1#ifndef _NET_IP6_ROUTE_H 1#ifndef _NET_IP6_ROUTE_H
2#define _NET_IP6_ROUTE_H 2#define _NET_IP6_ROUTE_H
3 3
4#define IP6_RT_PRIO_FW 16
5#define IP6_RT_PRIO_USER 1024 4#define IP6_RT_PRIO_USER 1024
6#define IP6_RT_PRIO_ADDRCONF 256 5#define IP6_RT_PRIO_ADDRCONF 256
7#define IP6_RT_PRIO_KERN 512 6#define IP6_RT_PRIO_KERN 512
8#define IP6_RT_FLOW_MASK 0x00ff
9 7
10struct route_info { 8struct route_info {
11 __u8 type; 9 __u8 type;
diff --git a/include/net/netfilter/nf_conntrack_extend.h b/include/net/netfilter/nf_conntrack_extend.h
index 73b5711faf32..49aac6323fbe 100644
--- a/include/net/netfilter/nf_conntrack_extend.h
+++ b/include/net/netfilter/nf_conntrack_extend.h
@@ -67,7 +67,7 @@ struct nf_ct_ext_type
67 void (*destroy)(struct nf_conn *ct); 67 void (*destroy)(struct nf_conn *ct);
68 /* Called when realloacted (can be NULL). 68 /* Called when realloacted (can be NULL).
69 Contents has already been moved. */ 69 Contents has already been moved. */
70 void (*move)(struct nf_conn *ct, void *old); 70 void (*move)(void *new, void *old);
71 71
72 enum nf_ct_ext_id id; 72 enum nf_ct_ext_id id;
73 73
diff --git a/include/net/tipc/tipc_msg.h b/include/net/tipc/tipc_msg.h
index fb42eb7a86a5..2e159a812f83 100644
--- a/include/net/tipc/tipc_msg.h
+++ b/include/net/tipc/tipc_msg.h
@@ -130,11 +130,6 @@ static inline u32 msg_type(struct tipc_msg *m)
130 return msg_bits(m, 1, 29, 0x7); 130 return msg_bits(m, 1, 29, 0x7);
131} 131}
132 132
133static inline u32 msg_direct(struct tipc_msg *m)
134{
135 return (msg_type(m) == TIPC_DIRECT_MSG);
136}
137
138static inline u32 msg_named(struct tipc_msg *m) 133static inline u32 msg_named(struct tipc_msg *m)
139{ 134{
140 return (msg_type(m) == TIPC_NAMED_MSG); 135 return (msg_type(m) == TIPC_NAMED_MSG);
@@ -207,17 +202,6 @@ static inline u32 msg_nameupper(struct tipc_msg *m)
207 return msg_word(m, 10); 202 return msg_word(m, 10);
208} 203}
209 204
210static inline char *msg_options(struct tipc_msg *m, u32 *len)
211{
212 u32 pos = msg_bits(m, 1, 16, 0x7);
213
214 if (!pos)
215 return 0;
216 pos = (pos * 4) + 28;
217 *len = msg_hdr_sz(m) - pos;
218 return (char *)&m->hdr[pos/4];
219}
220
221#endif 205#endif
222 206
223#endif 207#endif
diff --git a/include/rdma/ib_verbs.h b/include/rdma/ib_verbs.h
index cfbd38fe2998..701e7b40560a 100644
--- a/include/rdma/ib_verbs.h
+++ b/include/rdma/ib_verbs.h
@@ -95,7 +95,15 @@ enum ib_device_cap_flags {
95 IB_DEVICE_N_NOTIFY_CQ = (1<<14), 95 IB_DEVICE_N_NOTIFY_CQ = (1<<14),
96 IB_DEVICE_ZERO_STAG = (1<<15), 96 IB_DEVICE_ZERO_STAG = (1<<15),
97 IB_DEVICE_SEND_W_INV = (1<<16), 97 IB_DEVICE_SEND_W_INV = (1<<16),
98 IB_DEVICE_MEM_WINDOW = (1<<17) 98 IB_DEVICE_MEM_WINDOW = (1<<17),
99 /*
100 * Devices should set IB_DEVICE_UD_IP_SUM if they support
101 * insertion of UDP and TCP checksum on outgoing UD IPoIB
102 * messages and can verify the validity of checksum for
103 * incoming messages. Setting this flag implies that the
104 * IPoIB driver may set NETIF_F_IP_CSUM for datagram mode.
105 */
106 IB_DEVICE_UD_IP_CSUM = (1<<18),
99}; 107};
100 108
101enum ib_atomic_cap { 109enum ib_atomic_cap {
@@ -431,6 +439,7 @@ struct ib_wc {
431 u8 sl; 439 u8 sl;
432 u8 dlid_path_bits; 440 u8 dlid_path_bits;
433 u8 port_num; /* valid only for DR SMPs on switches */ 441 u8 port_num; /* valid only for DR SMPs on switches */
442 int csum_ok;
434}; 443};
435 444
436enum ib_cq_notify_flags { 445enum ib_cq_notify_flags {
@@ -615,7 +624,8 @@ enum ib_send_flags {
615 IB_SEND_FENCE = 1, 624 IB_SEND_FENCE = 1,
616 IB_SEND_SIGNALED = (1<<1), 625 IB_SEND_SIGNALED = (1<<1),
617 IB_SEND_SOLICITED = (1<<2), 626 IB_SEND_SOLICITED = (1<<2),
618 IB_SEND_INLINE = (1<<3) 627 IB_SEND_INLINE = (1<<3),
628 IB_SEND_IP_CSUM = (1<<4)
619}; 629};
620 630
621struct ib_sge { 631struct ib_sge {
@@ -890,8 +900,6 @@ struct ib_device {
890 int *pkey_tbl_len; 900 int *pkey_tbl_len;
891 int *gid_tbl_len; 901 int *gid_tbl_len;
892 902
893 u32 flags;
894
895 int num_comp_vectors; 903 int num_comp_vectors;
896 904
897 struct iw_cm_verbs *iwcm; 905 struct iw_cm_verbs *iwcm;
diff --git a/init/Kconfig b/init/Kconfig
index 95ac2657b0f4..455170e1c1e3 100644
--- a/init/Kconfig
+++ b/init/Kconfig
@@ -214,27 +214,6 @@ config TASK_IO_ACCOUNTING
214 214
215 Say N if unsure. 215 Say N if unsure.
216 216
217config USER_NS
218 bool "User Namespaces (EXPERIMENTAL)"
219 default n
220 depends on EXPERIMENTAL
221 help
222 Support user namespaces. This allows containers, i.e.
223 vservers, to use user namespaces to provide different
224 user info for different servers. If unsure, say N.
225
226config PID_NS
227 bool "PID Namespaces (EXPERIMENTAL)"
228 default n
229 depends on EXPERIMENTAL
230 help
231 Suport process id namespaces. This allows having multiple
232 process with the same pid as long as they are in different
233 pid namespaces. This is a building block of containers.
234
235 Unless you want to work with an experimental feature
236 say N here.
237
238config AUDIT 217config AUDIT
239 bool "Auditing support" 218 bool "Auditing support"
240 depends on NET 219 depends on NET
@@ -420,6 +399,49 @@ config RELAY
420 399
421 If unsure, say N. 400 If unsure, say N.
422 401
402config NAMESPACES
403 bool "Namespaces support" if EMBEDDED
404 default !EMBEDDED
405 help
406 Provides the way to make tasks work with different objects using
407 the same id. For example same IPC id may refer to different objects
408 or same user id or pid may refer to different tasks when used in
409 different namespaces.
410
411config UTS_NS
412 bool "UTS namespace"
413 depends on NAMESPACES
414 help
415 In this namespace tasks see different info provided with the
416 uname() system call
417
418config IPC_NS
419 bool "IPC namespace"
420 depends on NAMESPACES && SYSVIPC
421 help
422 In this namespace tasks work with IPC ids which correspond to
423 different IPC objects in different namespaces
424
425config USER_NS
426 bool "User namespace (EXPERIMENTAL)"
427 depends on NAMESPACES && EXPERIMENTAL
428 help
429 This allows containers, i.e. vservers, to use user namespaces
430 to provide different user info for different servers.
431 If unsure, say N.
432
433config PID_NS
434 bool "PID Namespaces (EXPERIMENTAL)"
435 default n
436 depends on NAMESPACES && EXPERIMENTAL
437 help
438 Suport process id namespaces. This allows having multiple
439 process with the same pid as long as they are in different
440 pid namespaces. This is a building block of containers.
441
442 Unless you want to work with an experimental feature
443 say N here.
444
423config BLK_DEV_INITRD 445config BLK_DEV_INITRD
424 bool "Initial RAM filesystem and RAM disk (initramfs/initrd) support" 446 bool "Initial RAM filesystem and RAM disk (initramfs/initrd) support"
425 depends on BROKEN || !FRV 447 depends on BROKEN || !FRV
diff --git a/init/main.c b/init/main.c
index 2a78932f6c07..c59859b85db0 100644
--- a/init/main.c
+++ b/init/main.c
@@ -238,22 +238,18 @@ EXPORT_SYMBOL(loops_per_jiffy);
238 238
239static int __init debug_kernel(char *str) 239static int __init debug_kernel(char *str)
240{ 240{
241 if (*str)
242 return 0;
243 console_loglevel = 10; 241 console_loglevel = 10;
244 return 1; 242 return 0;
245} 243}
246 244
247static int __init quiet_kernel(char *str) 245static int __init quiet_kernel(char *str)
248{ 246{
249 if (*str)
250 return 0;
251 console_loglevel = 4; 247 console_loglevel = 4;
252 return 1; 248 return 0;
253} 249}
254 250
255__setup("debug", debug_kernel); 251early_param("debug", debug_kernel);
256__setup("quiet", quiet_kernel); 252early_param("quiet", quiet_kernel);
257 253
258static int __init loglevel(char *str) 254static int __init loglevel(char *str)
259{ 255{
@@ -261,7 +257,7 @@ static int __init loglevel(char *str)
261 return 1; 257 return 1;
262} 258}
263 259
264__setup("loglevel=", loglevel); 260early_param("loglevel", loglevel);
265 261
266/* 262/*
267 * Unknown boot options get handed to init, unless they look like 263 * Unknown boot options get handed to init, unless they look like
@@ -833,7 +829,6 @@ static int __init kernel_init(void * unused)
833 */ 829 */
834 init_pid_ns.child_reaper = current; 830 init_pid_ns.child_reaper = current;
835 831
836 __set_special_pids(1, 1);
837 cad_pid = task_pid(current); 832 cad_pid = task_pid(current);
838 833
839 smp_prepare_cpus(setup_max_cpus); 834 smp_prepare_cpus(setup_max_cpus);
diff --git a/ipc/Makefile b/ipc/Makefile
index b93bba6652f1..5fc5e33ea047 100644
--- a/ipc/Makefile
+++ b/ipc/Makefile
@@ -7,4 +7,5 @@ obj-$(CONFIG_SYSVIPC) += util.o msgutil.o msg.o sem.o shm.o
7obj-$(CONFIG_SYSVIPC_SYSCTL) += ipc_sysctl.o 7obj-$(CONFIG_SYSVIPC_SYSCTL) += ipc_sysctl.o
8obj_mq-$(CONFIG_COMPAT) += compat_mq.o 8obj_mq-$(CONFIG_COMPAT) += compat_mq.o
9obj-$(CONFIG_POSIX_MQUEUE) += mqueue.o msgutil.o $(obj_mq-y) 9obj-$(CONFIG_POSIX_MQUEUE) += mqueue.o msgutil.o $(obj_mq-y)
10obj-$(CONFIG_IPC_NS) += namespace.o
10 11
diff --git a/ipc/ipc_sysctl.c b/ipc/ipc_sysctl.c
index 79e24e878c1e..7f4235bed51b 100644
--- a/ipc/ipc_sysctl.c
+++ b/ipc/ipc_sysctl.c
@@ -14,6 +14,7 @@
14#include <linux/nsproxy.h> 14#include <linux/nsproxy.h>
15#include <linux/sysctl.h> 15#include <linux/sysctl.h>
16#include <linux/uaccess.h> 16#include <linux/uaccess.h>
17#include <linux/ipc_namespace.h>
17 18
18static void *get_ipc(ctl_table *table) 19static void *get_ipc(ctl_table *table)
19{ 20{
diff --git a/ipc/mqueue.c b/ipc/mqueue.c
index 6ca7b97114f3..60f7a27f7a9e 100644
--- a/ipc/mqueue.c
+++ b/ipc/mqueue.c
@@ -332,8 +332,7 @@ static ssize_t mqueue_read_file(struct file *filp, char __user *u_data,
332 (info->notify_owner && 332 (info->notify_owner &&
333 info->notify.sigev_notify == SIGEV_SIGNAL) ? 333 info->notify.sigev_notify == SIGEV_SIGNAL) ?
334 info->notify.sigev_signo : 0, 334 info->notify.sigev_signo : 0,
335 pid_nr_ns(info->notify_owner, 335 pid_vnr(info->notify_owner));
336 current->nsproxy->pid_ns));
337 spin_unlock(&info->lock); 336 spin_unlock(&info->lock);
338 buffer[sizeof(buffer)-1] = '\0'; 337 buffer[sizeof(buffer)-1] = '\0';
339 slen = strlen(buffer)+1; 338 slen = strlen(buffer)+1;
@@ -510,7 +509,7 @@ static void __do_notify(struct mqueue_inode_info *info)
510 sig_i.si_errno = 0; 509 sig_i.si_errno = 0;
511 sig_i.si_code = SI_MESGQ; 510 sig_i.si_code = SI_MESGQ;
512 sig_i.si_value = info->notify.sigev_value; 511 sig_i.si_value = info->notify.sigev_value;
513 sig_i.si_pid = task_pid_vnr(current); 512 sig_i.si_pid = task_tgid_vnr(current);
514 sig_i.si_uid = current->uid; 513 sig_i.si_uid = current->uid;
515 514
516 kill_pid_info(info->notify.sigev_signo, 515 kill_pid_info(info->notify.sigev_signo,
diff --git a/ipc/msg.c b/ipc/msg.c
index ec0c724054b9..46585a05473e 100644
--- a/ipc/msg.c
+++ b/ipc/msg.c
@@ -36,6 +36,7 @@
36#include <linux/seq_file.h> 36#include <linux/seq_file.h>
37#include <linux/rwsem.h> 37#include <linux/rwsem.h>
38#include <linux/nsproxy.h> 38#include <linux/nsproxy.h>
39#include <linux/ipc_namespace.h>
39 40
40#include <asm/current.h> 41#include <asm/current.h>
41#include <asm/uaccess.h> 42#include <asm/uaccess.h>
@@ -66,72 +67,37 @@ struct msg_sender {
66#define SEARCH_NOTEQUAL 3 67#define SEARCH_NOTEQUAL 3
67#define SEARCH_LESSEQUAL 4 68#define SEARCH_LESSEQUAL 4
68 69
69static struct ipc_ids init_msg_ids; 70#define msg_ids(ns) ((ns)->ids[IPC_MSG_IDS])
70
71#define msg_ids(ns) (*((ns)->ids[IPC_MSG_IDS]))
72 71
73#define msg_unlock(msq) ipc_unlock(&(msq)->q_perm) 72#define msg_unlock(msq) ipc_unlock(&(msq)->q_perm)
74#define msg_buildid(id, seq) ipc_buildid(id, seq) 73#define msg_buildid(id, seq) ipc_buildid(id, seq)
75 74
76static void freeque(struct ipc_namespace *, struct msg_queue *); 75static void freeque(struct ipc_namespace *, struct kern_ipc_perm *);
77static int newque(struct ipc_namespace *, struct ipc_params *); 76static int newque(struct ipc_namespace *, struct ipc_params *);
78#ifdef CONFIG_PROC_FS 77#ifdef CONFIG_PROC_FS
79static int sysvipc_msg_proc_show(struct seq_file *s, void *it); 78static int sysvipc_msg_proc_show(struct seq_file *s, void *it);
80#endif 79#endif
81 80
82static void __msg_init_ns(struct ipc_namespace *ns, struct ipc_ids *ids) 81void msg_init_ns(struct ipc_namespace *ns)
83{ 82{
84 ns->ids[IPC_MSG_IDS] = ids;
85 ns->msg_ctlmax = MSGMAX; 83 ns->msg_ctlmax = MSGMAX;
86 ns->msg_ctlmnb = MSGMNB; 84 ns->msg_ctlmnb = MSGMNB;
87 ns->msg_ctlmni = MSGMNI; 85 ns->msg_ctlmni = MSGMNI;
88 atomic_set(&ns->msg_bytes, 0); 86 atomic_set(&ns->msg_bytes, 0);
89 atomic_set(&ns->msg_hdrs, 0); 87 atomic_set(&ns->msg_hdrs, 0);
90 ipc_init_ids(ids); 88 ipc_init_ids(&ns->ids[IPC_MSG_IDS]);
91}
92
93int msg_init_ns(struct ipc_namespace *ns)
94{
95 struct ipc_ids *ids;
96
97 ids = kmalloc(sizeof(struct ipc_ids), GFP_KERNEL);
98 if (ids == NULL)
99 return -ENOMEM;
100
101 __msg_init_ns(ns, ids);
102 return 0;
103} 89}
104 90
91#ifdef CONFIG_IPC_NS
105void msg_exit_ns(struct ipc_namespace *ns) 92void msg_exit_ns(struct ipc_namespace *ns)
106{ 93{
107 struct msg_queue *msq; 94 free_ipcs(ns, &msg_ids(ns), freeque);
108 struct kern_ipc_perm *perm;
109 int next_id;
110 int total, in_use;
111
112 down_write(&msg_ids(ns).rw_mutex);
113
114 in_use = msg_ids(ns).in_use;
115
116 for (total = 0, next_id = 0; total < in_use; next_id++) {
117 perm = idr_find(&msg_ids(ns).ipcs_idr, next_id);
118 if (perm == NULL)
119 continue;
120 ipc_lock_by_ptr(perm);
121 msq = container_of(perm, struct msg_queue, q_perm);
122 freeque(ns, msq);
123 total++;
124 }
125
126 up_write(&msg_ids(ns).rw_mutex);
127
128 kfree(ns->ids[IPC_MSG_IDS]);
129 ns->ids[IPC_MSG_IDS] = NULL;
130} 95}
96#endif
131 97
132void __init msg_init(void) 98void __init msg_init(void)
133{ 99{
134 __msg_init_ns(&init_ipc_ns, &init_msg_ids); 100 msg_init_ns(&init_ipc_ns);
135 ipc_init_proc_interface("sysvipc/msg", 101 ipc_init_proc_interface("sysvipc/msg",
136 " key msqid perms cbytes qnum lspid lrpid uid gid cuid cgid stime rtime ctime\n", 102 " key msqid perms cbytes qnum lspid lrpid uid gid cuid cgid stime rtime ctime\n",
137 IPC_MSG_IDS, sysvipc_msg_proc_show); 103 IPC_MSG_IDS, sysvipc_msg_proc_show);
@@ -289,9 +255,10 @@ static void expunge_all(struct msg_queue *msq, int res)
289 * msg_ids.rw_mutex (writer) and the spinlock for this message queue are held 255 * msg_ids.rw_mutex (writer) and the spinlock for this message queue are held
290 * before freeque() is called. msg_ids.rw_mutex remains locked on exit. 256 * before freeque() is called. msg_ids.rw_mutex remains locked on exit.
291 */ 257 */
292static void freeque(struct ipc_namespace *ns, struct msg_queue *msq) 258static void freeque(struct ipc_namespace *ns, struct kern_ipc_perm *ipcp)
293{ 259{
294 struct list_head *tmp; 260 struct list_head *tmp;
261 struct msg_queue *msq = container_of(ipcp, struct msg_queue, q_perm);
295 262
296 expunge_all(msq, -EIDRM); 263 expunge_all(msq, -EIDRM);
297 ss_wakeup(&msq->q_senders, 1); 264 ss_wakeup(&msq->q_senders, 1);
@@ -597,7 +564,7 @@ asmlinkage long sys_msgctl(int msqid, int cmd, struct msqid_ds __user *buf)
597 break; 564 break;
598 } 565 }
599 case IPC_RMID: 566 case IPC_RMID:
600 freeque(ns, msq); 567 freeque(ns, &msq->q_perm);
601 break; 568 break;
602 } 569 }
603 err = 0; 570 err = 0;
diff --git a/ipc/namespace.c b/ipc/namespace.c
new file mode 100644
index 000000000000..1b967655eb35
--- /dev/null
+++ b/ipc/namespace.c
@@ -0,0 +1,86 @@
1/*
2 * linux/ipc/namespace.c
3 * Copyright (C) 2006 Pavel Emelyanov <xemul@openvz.org> OpenVZ, SWsoft Inc.
4 */
5
6#include <linux/ipc.h>
7#include <linux/msg.h>
8#include <linux/ipc_namespace.h>
9#include <linux/rcupdate.h>
10#include <linux/nsproxy.h>
11#include <linux/slab.h>
12
13#include "util.h"
14
15static struct ipc_namespace *clone_ipc_ns(struct ipc_namespace *old_ns)
16{
17 struct ipc_namespace *ns;
18
19 ns = kmalloc(sizeof(struct ipc_namespace), GFP_KERNEL);
20 if (ns == NULL)
21 return ERR_PTR(-ENOMEM);
22
23 sem_init_ns(ns);
24 msg_init_ns(ns);
25 shm_init_ns(ns);
26
27 kref_init(&ns->kref);
28 return ns;
29}
30
31struct ipc_namespace *copy_ipcs(unsigned long flags, struct ipc_namespace *ns)
32{
33 struct ipc_namespace *new_ns;
34
35 BUG_ON(!ns);
36 get_ipc_ns(ns);
37
38 if (!(flags & CLONE_NEWIPC))
39 return ns;
40
41 new_ns = clone_ipc_ns(ns);
42
43 put_ipc_ns(ns);
44 return new_ns;
45}
46
47/*
48 * free_ipcs - free all ipcs of one type
49 * @ns: the namespace to remove the ipcs from
50 * @ids: the table of ipcs to free
51 * @free: the function called to free each individual ipc
52 *
53 * Called for each kind of ipc when an ipc_namespace exits.
54 */
55void free_ipcs(struct ipc_namespace *ns, struct ipc_ids *ids,
56 void (*free)(struct ipc_namespace *, struct kern_ipc_perm *))
57{
58 struct kern_ipc_perm *perm;
59 int next_id;
60 int total, in_use;
61
62 down_write(&ids->rw_mutex);
63
64 in_use = ids->in_use;
65
66 for (total = 0, next_id = 0; total < in_use; next_id++) {
67 perm = idr_find(&ids->ipcs_idr, next_id);
68 if (perm == NULL)
69 continue;
70 ipc_lock_by_ptr(perm);
71 free(ns, perm);
72 total++;
73 }
74 up_write(&ids->rw_mutex);
75}
76
77void free_ipc_ns(struct kref *kref)
78{
79 struct ipc_namespace *ns;
80
81 ns = container_of(kref, struct ipc_namespace, kref);
82 sem_exit_ns(ns);
83 msg_exit_ns(ns);
84 shm_exit_ns(ns);
85 kfree(ns);
86}
diff --git a/ipc/sem.c b/ipc/sem.c
index d65e285b7e30..0b45a4d383c6 100644
--- a/ipc/sem.c
+++ b/ipc/sem.c
@@ -82,20 +82,19 @@
82#include <linux/seq_file.h> 82#include <linux/seq_file.h>
83#include <linux/rwsem.h> 83#include <linux/rwsem.h>
84#include <linux/nsproxy.h> 84#include <linux/nsproxy.h>
85#include <linux/ipc_namespace.h>
85 86
86#include <asm/uaccess.h> 87#include <asm/uaccess.h>
87#include "util.h" 88#include "util.h"
88 89
89#define sem_ids(ns) (*((ns)->ids[IPC_SEM_IDS])) 90#define sem_ids(ns) ((ns)->ids[IPC_SEM_IDS])
90 91
91#define sem_unlock(sma) ipc_unlock(&(sma)->sem_perm) 92#define sem_unlock(sma) ipc_unlock(&(sma)->sem_perm)
92#define sem_checkid(sma, semid) ipc_checkid(&sma->sem_perm, semid) 93#define sem_checkid(sma, semid) ipc_checkid(&sma->sem_perm, semid)
93#define sem_buildid(id, seq) ipc_buildid(id, seq) 94#define sem_buildid(id, seq) ipc_buildid(id, seq)
94 95
95static struct ipc_ids init_sem_ids;
96
97static int newary(struct ipc_namespace *, struct ipc_params *); 96static int newary(struct ipc_namespace *, struct ipc_params *);
98static void freeary(struct ipc_namespace *, struct sem_array *); 97static void freeary(struct ipc_namespace *, struct kern_ipc_perm *);
99#ifdef CONFIG_PROC_FS 98#ifdef CONFIG_PROC_FS
100static int sysvipc_sem_proc_show(struct seq_file *s, void *it); 99static int sysvipc_sem_proc_show(struct seq_file *s, void *it);
101#endif 100#endif
@@ -117,58 +116,26 @@ static int sysvipc_sem_proc_show(struct seq_file *s, void *it);
117#define sc_semopm sem_ctls[2] 116#define sc_semopm sem_ctls[2]
118#define sc_semmni sem_ctls[3] 117#define sc_semmni sem_ctls[3]
119 118
120static void __sem_init_ns(struct ipc_namespace *ns, struct ipc_ids *ids) 119void sem_init_ns(struct ipc_namespace *ns)
121{ 120{
122 ns->ids[IPC_SEM_IDS] = ids;
123 ns->sc_semmsl = SEMMSL; 121 ns->sc_semmsl = SEMMSL;
124 ns->sc_semmns = SEMMNS; 122 ns->sc_semmns = SEMMNS;
125 ns->sc_semopm = SEMOPM; 123 ns->sc_semopm = SEMOPM;
126 ns->sc_semmni = SEMMNI; 124 ns->sc_semmni = SEMMNI;
127 ns->used_sems = 0; 125 ns->used_sems = 0;
128 ipc_init_ids(ids); 126 ipc_init_ids(&ns->ids[IPC_SEM_IDS]);
129}
130
131int sem_init_ns(struct ipc_namespace *ns)
132{
133 struct ipc_ids *ids;
134
135 ids = kmalloc(sizeof(struct ipc_ids), GFP_KERNEL);
136 if (ids == NULL)
137 return -ENOMEM;
138
139 __sem_init_ns(ns, ids);
140 return 0;
141} 127}
142 128
129#ifdef CONFIG_IPC_NS
143void sem_exit_ns(struct ipc_namespace *ns) 130void sem_exit_ns(struct ipc_namespace *ns)
144{ 131{
145 struct sem_array *sma; 132 free_ipcs(ns, &sem_ids(ns), freeary);
146 struct kern_ipc_perm *perm;
147 int next_id;
148 int total, in_use;
149
150 down_write(&sem_ids(ns).rw_mutex);
151
152 in_use = sem_ids(ns).in_use;
153
154 for (total = 0, next_id = 0; total < in_use; next_id++) {
155 perm = idr_find(&sem_ids(ns).ipcs_idr, next_id);
156 if (perm == NULL)
157 continue;
158 ipc_lock_by_ptr(perm);
159 sma = container_of(perm, struct sem_array, sem_perm);
160 freeary(ns, sma);
161 total++;
162 }
163 up_write(&sem_ids(ns).rw_mutex);
164
165 kfree(ns->ids[IPC_SEM_IDS]);
166 ns->ids[IPC_SEM_IDS] = NULL;
167} 133}
134#endif
168 135
169void __init sem_init (void) 136void __init sem_init (void)
170{ 137{
171 __sem_init_ns(&init_ipc_ns, &init_sem_ids); 138 sem_init_ns(&init_ipc_ns);
172 ipc_init_proc_interface("sysvipc/sem", 139 ipc_init_proc_interface("sysvipc/sem",
173 " key semid perms nsems uid gid cuid cgid otime ctime\n", 140 " key semid perms nsems uid gid cuid cgid otime ctime\n",
174 IPC_SEM_IDS, sysvipc_sem_proc_show); 141 IPC_SEM_IDS, sysvipc_sem_proc_show);
@@ -557,10 +524,11 @@ static int count_semzcnt (struct sem_array * sma, ushort semnum)
557 * as a writer and the spinlock for this semaphore set hold. sem_ids.rw_mutex 524 * as a writer and the spinlock for this semaphore set hold. sem_ids.rw_mutex
558 * remains locked on exit. 525 * remains locked on exit.
559 */ 526 */
560static void freeary(struct ipc_namespace *ns, struct sem_array *sma) 527static void freeary(struct ipc_namespace *ns, struct kern_ipc_perm *ipcp)
561{ 528{
562 struct sem_undo *un; 529 struct sem_undo *un;
563 struct sem_queue *q; 530 struct sem_queue *q;
531 struct sem_array *sma = container_of(ipcp, struct sem_array, sem_perm);
564 532
565 /* Invalidate the existing undo structures for this semaphore set. 533 /* Invalidate the existing undo structures for this semaphore set.
566 * (They will be freed without any further action in exit_sem() 534 * (They will be freed without any further action in exit_sem()
@@ -614,8 +582,8 @@ static unsigned long copy_semid_to_user(void __user *buf, struct semid64_ds *in,
614 } 582 }
615} 583}
616 584
617static int semctl_nolock(struct ipc_namespace *ns, int semid, int semnum, 585static int semctl_nolock(struct ipc_namespace *ns, int semid,
618 int cmd, int version, union semun arg) 586 int cmd, int version, union semun arg)
619{ 587{
620 int err = -EINVAL; 588 int err = -EINVAL;
621 struct sem_array *sma; 589 struct sem_array *sma;
@@ -654,14 +622,23 @@ static int semctl_nolock(struct ipc_namespace *ns, int semid, int semnum,
654 return -EFAULT; 622 return -EFAULT;
655 return (max_id < 0) ? 0: max_id; 623 return (max_id < 0) ? 0: max_id;
656 } 624 }
625 case IPC_STAT:
657 case SEM_STAT: 626 case SEM_STAT:
658 { 627 {
659 struct semid64_ds tbuf; 628 struct semid64_ds tbuf;
660 int id; 629 int id;
661 630
662 sma = sem_lock(ns, semid); 631 if (cmd == SEM_STAT) {
663 if (IS_ERR(sma)) 632 sma = sem_lock(ns, semid);
664 return PTR_ERR(sma); 633 if (IS_ERR(sma))
634 return PTR_ERR(sma);
635 id = sma->sem_perm.id;
636 } else {
637 sma = sem_lock_check(ns, semid);
638 if (IS_ERR(sma))
639 return PTR_ERR(sma);
640 id = 0;
641 }
665 642
666 err = -EACCES; 643 err = -EACCES;
667 if (ipcperms (&sma->sem_perm, S_IRUGO)) 644 if (ipcperms (&sma->sem_perm, S_IRUGO))
@@ -671,8 +648,6 @@ static int semctl_nolock(struct ipc_namespace *ns, int semid, int semnum,
671 if (err) 648 if (err)
672 goto out_unlock; 649 goto out_unlock;
673 650
674 id = sma->sem_perm.id;
675
676 memset(&tbuf, 0, sizeof(tbuf)); 651 memset(&tbuf, 0, sizeof(tbuf));
677 652
678 kernel_to_ipc64_perm(&sma->sem_perm, &tbuf.sem_perm); 653 kernel_to_ipc64_perm(&sma->sem_perm, &tbuf.sem_perm);
@@ -807,19 +782,6 @@ static int semctl_main(struct ipc_namespace *ns, int semid, int semnum,
807 err = 0; 782 err = 0;
808 goto out_unlock; 783 goto out_unlock;
809 } 784 }
810 case IPC_STAT:
811 {
812 struct semid64_ds tbuf;
813 memset(&tbuf,0,sizeof(tbuf));
814 kernel_to_ipc64_perm(&sma->sem_perm, &tbuf.sem_perm);
815 tbuf.sem_otime = sma->sem_otime;
816 tbuf.sem_ctime = sma->sem_ctime;
817 tbuf.sem_nsems = sma->sem_nsems;
818 sem_unlock(sma);
819 if (copy_semid_to_user (arg.buf, &tbuf, version))
820 return -EFAULT;
821 return 0;
822 }
823 /* GETVAL, GETPID, GETNCTN, GETZCNT, SETVAL: fall-through */ 785 /* GETVAL, GETPID, GETNCTN, GETZCNT, SETVAL: fall-through */
824 } 786 }
825 err = -EINVAL; 787 err = -EINVAL;
@@ -947,7 +909,7 @@ static int semctl_down(struct ipc_namespace *ns, int semid, int semnum,
947 909
948 switch(cmd){ 910 switch(cmd){
949 case IPC_RMID: 911 case IPC_RMID:
950 freeary(ns, sma); 912 freeary(ns, ipcp);
951 err = 0; 913 err = 0;
952 break; 914 break;
953 case IPC_SET: 915 case IPC_SET:
@@ -986,15 +948,15 @@ asmlinkage long sys_semctl (int semid, int semnum, int cmd, union semun arg)
986 switch(cmd) { 948 switch(cmd) {
987 case IPC_INFO: 949 case IPC_INFO:
988 case SEM_INFO: 950 case SEM_INFO:
951 case IPC_STAT:
989 case SEM_STAT: 952 case SEM_STAT:
990 err = semctl_nolock(ns,semid,semnum,cmd,version,arg); 953 err = semctl_nolock(ns, semid, cmd, version, arg);
991 return err; 954 return err;
992 case GETALL: 955 case GETALL:
993 case GETVAL: 956 case GETVAL:
994 case GETPID: 957 case GETPID:
995 case GETNCNT: 958 case GETNCNT:
996 case GETZCNT: 959 case GETZCNT:
997 case IPC_STAT:
998 case SETVAL: 960 case SETVAL:
999 case SETALL: 961 case SETALL:
1000 err = semctl_main(ns,semid,semnum,cmd,version,arg); 962 err = semctl_main(ns,semid,semnum,cmd,version,arg);
diff --git a/ipc/shm.c b/ipc/shm.c
index 65c3a294aba5..c47e87278a92 100644
--- a/ipc/shm.c
+++ b/ipc/shm.c
@@ -38,6 +38,7 @@
38#include <linux/rwsem.h> 38#include <linux/rwsem.h>
39#include <linux/nsproxy.h> 39#include <linux/nsproxy.h>
40#include <linux/mount.h> 40#include <linux/mount.h>
41#include <linux/ipc_namespace.h>
41 42
42#include <asm/uaccess.h> 43#include <asm/uaccess.h>
43 44
@@ -55,9 +56,7 @@ struct shm_file_data {
55static const struct file_operations shm_file_operations; 56static const struct file_operations shm_file_operations;
56static struct vm_operations_struct shm_vm_ops; 57static struct vm_operations_struct shm_vm_ops;
57 58
58static struct ipc_ids init_shm_ids; 59#define shm_ids(ns) ((ns)->ids[IPC_SHM_IDS])
59
60#define shm_ids(ns) (*((ns)->ids[IPC_SHM_IDS]))
61 60
62#define shm_unlock(shp) \ 61#define shm_unlock(shp) \
63 ipc_unlock(&(shp)->shm_perm) 62 ipc_unlock(&(shp)->shm_perm)
@@ -71,22 +70,24 @@ static void shm_destroy (struct ipc_namespace *ns, struct shmid_kernel *shp);
71static int sysvipc_shm_proc_show(struct seq_file *s, void *it); 70static int sysvipc_shm_proc_show(struct seq_file *s, void *it);
72#endif 71#endif
73 72
74static void __shm_init_ns(struct ipc_namespace *ns, struct ipc_ids *ids) 73void shm_init_ns(struct ipc_namespace *ns)
75{ 74{
76 ns->ids[IPC_SHM_IDS] = ids;
77 ns->shm_ctlmax = SHMMAX; 75 ns->shm_ctlmax = SHMMAX;
78 ns->shm_ctlall = SHMALL; 76 ns->shm_ctlall = SHMALL;
79 ns->shm_ctlmni = SHMMNI; 77 ns->shm_ctlmni = SHMMNI;
80 ns->shm_tot = 0; 78 ns->shm_tot = 0;
81 ipc_init_ids(ids); 79 ipc_init_ids(&ns->ids[IPC_SHM_IDS]);
82} 80}
83 81
84/* 82/*
85 * Called with shm_ids.rw_mutex (writer) and the shp structure locked. 83 * Called with shm_ids.rw_mutex (writer) and the shp structure locked.
86 * Only shm_ids.rw_mutex remains locked on exit. 84 * Only shm_ids.rw_mutex remains locked on exit.
87 */ 85 */
88static void do_shm_rmid(struct ipc_namespace *ns, struct shmid_kernel *shp) 86static void do_shm_rmid(struct ipc_namespace *ns, struct kern_ipc_perm *ipcp)
89{ 87{
88 struct shmid_kernel *shp;
89 shp = container_of(ipcp, struct shmid_kernel, shm_perm);
90
90 if (shp->shm_nattch){ 91 if (shp->shm_nattch){
91 shp->shm_perm.mode |= SHM_DEST; 92 shp->shm_perm.mode |= SHM_DEST;
92 /* Do not find it any more */ 93 /* Do not find it any more */
@@ -96,47 +97,16 @@ static void do_shm_rmid(struct ipc_namespace *ns, struct shmid_kernel *shp)
96 shm_destroy(ns, shp); 97 shm_destroy(ns, shp);
97} 98}
98 99
99int shm_init_ns(struct ipc_namespace *ns) 100#ifdef CONFIG_IPC_NS
100{
101 struct ipc_ids *ids;
102
103 ids = kmalloc(sizeof(struct ipc_ids), GFP_KERNEL);
104 if (ids == NULL)
105 return -ENOMEM;
106
107 __shm_init_ns(ns, ids);
108 return 0;
109}
110
111void shm_exit_ns(struct ipc_namespace *ns) 101void shm_exit_ns(struct ipc_namespace *ns)
112{ 102{
113 struct shmid_kernel *shp; 103 free_ipcs(ns, &shm_ids(ns), do_shm_rmid);
114 struct kern_ipc_perm *perm;
115 int next_id;
116 int total, in_use;
117
118 down_write(&shm_ids(ns).rw_mutex);
119
120 in_use = shm_ids(ns).in_use;
121
122 for (total = 0, next_id = 0; total < in_use; next_id++) {
123 perm = idr_find(&shm_ids(ns).ipcs_idr, next_id);
124 if (perm == NULL)
125 continue;
126 ipc_lock_by_ptr(perm);
127 shp = container_of(perm, struct shmid_kernel, shm_perm);
128 do_shm_rmid(ns, shp);
129 total++;
130 }
131 up_write(&shm_ids(ns).rw_mutex);
132
133 kfree(ns->ids[IPC_SHM_IDS]);
134 ns->ids[IPC_SHM_IDS] = NULL;
135} 104}
105#endif
136 106
137void __init shm_init (void) 107void __init shm_init (void)
138{ 108{
139 __shm_init_ns(&init_ipc_ns, &init_shm_ids); 109 shm_init_ns(&init_ipc_ns);
140 ipc_init_proc_interface("sysvipc/shm", 110 ipc_init_proc_interface("sysvipc/shm",
141 " key shmid perms size cpid lpid nattch uid gid cuid cgid atime dtime ctime\n", 111 " key shmid perms size cpid lpid nattch uid gid cuid cgid atime dtime ctime\n",
142 IPC_SHM_IDS, sysvipc_shm_proc_show); 112 IPC_SHM_IDS, sysvipc_shm_proc_show);
@@ -847,7 +817,7 @@ asmlinkage long sys_shmctl (int shmid, int cmd, struct shmid_ds __user *buf)
847 if (err) 817 if (err)
848 goto out_unlock_up; 818 goto out_unlock_up;
849 819
850 do_shm_rmid(ns, shp); 820 do_shm_rmid(ns, &shp->shm_perm);
851 up_write(&shm_ids(ns).rw_mutex); 821 up_write(&shm_ids(ns).rw_mutex);
852 goto out; 822 goto out;
853 } 823 }
diff --git a/ipc/util.c b/ipc/util.c
index 76c1f3461e22..fd1b50da9db8 100644
--- a/ipc/util.c
+++ b/ipc/util.c
@@ -33,6 +33,7 @@
33#include <linux/audit.h> 33#include <linux/audit.h>
34#include <linux/nsproxy.h> 34#include <linux/nsproxy.h>
35#include <linux/rwsem.h> 35#include <linux/rwsem.h>
36#include <linux/ipc_namespace.h>
36 37
37#include <asm/unistd.h> 38#include <asm/unistd.h>
38 39
@@ -51,66 +52,6 @@ struct ipc_namespace init_ipc_ns = {
51 }, 52 },
52}; 53};
53 54
54static struct ipc_namespace *clone_ipc_ns(struct ipc_namespace *old_ns)
55{
56 int err;
57 struct ipc_namespace *ns;
58
59 err = -ENOMEM;
60 ns = kmalloc(sizeof(struct ipc_namespace), GFP_KERNEL);
61 if (ns == NULL)
62 goto err_mem;
63
64 err = sem_init_ns(ns);
65 if (err)
66 goto err_sem;
67 err = msg_init_ns(ns);
68 if (err)
69 goto err_msg;
70 err = shm_init_ns(ns);
71 if (err)
72 goto err_shm;
73
74 kref_init(&ns->kref);
75 return ns;
76
77err_shm:
78 msg_exit_ns(ns);
79err_msg:
80 sem_exit_ns(ns);
81err_sem:
82 kfree(ns);
83err_mem:
84 return ERR_PTR(err);
85}
86
87struct ipc_namespace *copy_ipcs(unsigned long flags, struct ipc_namespace *ns)
88{
89 struct ipc_namespace *new_ns;
90
91 BUG_ON(!ns);
92 get_ipc_ns(ns);
93
94 if (!(flags & CLONE_NEWIPC))
95 return ns;
96
97 new_ns = clone_ipc_ns(ns);
98
99 put_ipc_ns(ns);
100 return new_ns;
101}
102
103void free_ipc_ns(struct kref *kref)
104{
105 struct ipc_namespace *ns;
106
107 ns = container_of(kref, struct ipc_namespace, kref);
108 sem_exit_ns(ns);
109 msg_exit_ns(ns);
110 shm_exit_ns(ns);
111 kfree(ns);
112}
113
114/** 55/**
115 * ipc_init - initialise IPC subsystem 56 * ipc_init - initialise IPC subsystem
116 * 57 *
@@ -307,7 +248,7 @@ int ipc_addid(struct ipc_ids* ids, struct kern_ipc_perm* new, int size)
307 * This routine is called by sys_msgget, sys_semget() and sys_shmget() 248 * This routine is called by sys_msgget, sys_semget() and sys_shmget()
308 * when the key is IPC_PRIVATE. 249 * when the key is IPC_PRIVATE.
309 */ 250 */
310int ipcget_new(struct ipc_namespace *ns, struct ipc_ids *ids, 251static int ipcget_new(struct ipc_namespace *ns, struct ipc_ids *ids,
311 struct ipc_ops *ops, struct ipc_params *params) 252 struct ipc_ops *ops, struct ipc_params *params)
312{ 253{
313 int err; 254 int err;
@@ -371,7 +312,7 @@ static int ipc_check_perms(struct kern_ipc_perm *ipcp, struct ipc_ops *ops,
371 * 312 *
372 * On success, the ipc id is returned. 313 * On success, the ipc id is returned.
373 */ 314 */
374int ipcget_public(struct ipc_namespace *ns, struct ipc_ids *ids, 315static int ipcget_public(struct ipc_namespace *ns, struct ipc_ids *ids,
375 struct ipc_ops *ops, struct ipc_params *params) 316 struct ipc_ops *ops, struct ipc_params *params)
376{ 317{
377 struct kern_ipc_perm *ipcp; 318 struct kern_ipc_perm *ipcp;
@@ -769,6 +710,57 @@ struct kern_ipc_perm *ipc_lock_down(struct ipc_ids *ids, int id)
769 return out; 710 return out;
770} 711}
771 712
713struct kern_ipc_perm *ipc_lock_check_down(struct ipc_ids *ids, int id)
714{
715 struct kern_ipc_perm *out;
716
717 out = ipc_lock_down(ids, id);
718 if (IS_ERR(out))
719 return out;
720
721 if (ipc_checkid(out, id)) {
722 ipc_unlock(out);
723 return ERR_PTR(-EIDRM);
724 }
725
726 return out;
727}
728
729struct kern_ipc_perm *ipc_lock_check(struct ipc_ids *ids, int id)
730{
731 struct kern_ipc_perm *out;
732
733 out = ipc_lock(ids, id);
734 if (IS_ERR(out))
735 return out;
736
737 if (ipc_checkid(out, id)) {
738 ipc_unlock(out);
739 return ERR_PTR(-EIDRM);
740 }
741
742 return out;
743}
744
745/**
746 * ipcget - Common sys_*get() code
747 * @ns : namsepace
748 * @ids : IPC identifier set
749 * @ops : operations to be called on ipc object creation, permission checks
750 * and further checks
751 * @params : the parameters needed by the previous operations.
752 *
753 * Common routine called by sys_msgget(), sys_semget() and sys_shmget().
754 */
755int ipcget(struct ipc_namespace *ns, struct ipc_ids *ids,
756 struct ipc_ops *ops, struct ipc_params *params)
757{
758 if (params->key == IPC_PRIVATE)
759 return ipcget_new(ns, ids, ops, params);
760 else
761 return ipcget_public(ns, ids, ops, params);
762}
763
772#ifdef __ARCH_WANT_IPC_PARSE_VERSION 764#ifdef __ARCH_WANT_IPC_PARSE_VERSION
773 765
774 766
@@ -841,7 +833,7 @@ static void *sysvipc_proc_next(struct seq_file *s, void *it, loff_t *pos)
841 if (ipc && ipc != SEQ_START_TOKEN) 833 if (ipc && ipc != SEQ_START_TOKEN)
842 ipc_unlock(ipc); 834 ipc_unlock(ipc);
843 835
844 return sysvipc_find_ipc(iter->ns->ids[iface->ids], *pos, pos); 836 return sysvipc_find_ipc(&iter->ns->ids[iface->ids], *pos, pos);
845} 837}
846 838
847/* 839/*
@@ -854,7 +846,7 @@ static void *sysvipc_proc_start(struct seq_file *s, loff_t *pos)
854 struct ipc_proc_iface *iface = iter->iface; 846 struct ipc_proc_iface *iface = iter->iface;
855 struct ipc_ids *ids; 847 struct ipc_ids *ids;
856 848
857 ids = iter->ns->ids[iface->ids]; 849 ids = &iter->ns->ids[iface->ids];
858 850
859 /* 851 /*
860 * Take the lock - this will be released by the corresponding 852 * Take the lock - this will be released by the corresponding
@@ -885,7 +877,7 @@ static void sysvipc_proc_stop(struct seq_file *s, void *it)
885 if (ipc && ipc != SEQ_START_TOKEN) 877 if (ipc && ipc != SEQ_START_TOKEN)
886 ipc_unlock(ipc); 878 ipc_unlock(ipc);
887 879
888 ids = iter->ns->ids[iface->ids]; 880 ids = &iter->ns->ids[iface->ids];
889 /* Release the lock we took in start() */ 881 /* Release the lock we took in start() */
890 up_read(&ids->rw_mutex); 882 up_read(&ids->rw_mutex);
891} 883}
diff --git a/ipc/util.h b/ipc/util.h
index 9ffea40457ce..f37d160c98fe 100644
--- a/ipc/util.h
+++ b/ipc/util.h
@@ -10,7 +10,6 @@
10#ifndef _IPC_UTIL_H 10#ifndef _IPC_UTIL_H
11#define _IPC_UTIL_H 11#define _IPC_UTIL_H
12 12
13#include <linux/idr.h>
14#include <linux/err.h> 13#include <linux/err.h>
15 14
16#define USHRT_MAX 0xffff 15#define USHRT_MAX 0xffff
@@ -20,22 +19,16 @@ void sem_init (void);
20void msg_init (void); 19void msg_init (void);
21void shm_init (void); 20void shm_init (void);
22 21
23int sem_init_ns(struct ipc_namespace *ns); 22struct ipc_namespace;
24int msg_init_ns(struct ipc_namespace *ns); 23
25int shm_init_ns(struct ipc_namespace *ns); 24void sem_init_ns(struct ipc_namespace *ns);
25void msg_init_ns(struct ipc_namespace *ns);
26void shm_init_ns(struct ipc_namespace *ns);
26 27
27void sem_exit_ns(struct ipc_namespace *ns); 28void sem_exit_ns(struct ipc_namespace *ns);
28void msg_exit_ns(struct ipc_namespace *ns); 29void msg_exit_ns(struct ipc_namespace *ns);
29void shm_exit_ns(struct ipc_namespace *ns); 30void shm_exit_ns(struct ipc_namespace *ns);
30 31
31struct ipc_ids {
32 int in_use;
33 unsigned short seq;
34 unsigned short seq_max;
35 struct rw_semaphore rw_mutex;
36 struct idr ipcs_idr;
37};
38
39/* 32/*
40 * Structure that holds the parameters needed by the ipc operations 33 * Structure that holds the parameters needed by the ipc operations
41 * (see after) 34 * (see after)
@@ -66,6 +59,7 @@ struct ipc_ops {
66}; 59};
67 60
68struct seq_file; 61struct seq_file;
62struct ipc_ids;
69 63
70void ipc_init_ids(struct ipc_ids *); 64void ipc_init_ids(struct ipc_ids *);
71#ifdef CONFIG_PROC_FS 65#ifdef CONFIG_PROC_FS
@@ -129,10 +123,6 @@ int ipc_parse_version (int *cmd);
129extern void free_msg(struct msg_msg *msg); 123extern void free_msg(struct msg_msg *msg);
130extern struct msg_msg *load_msg(const void __user *src, int len); 124extern struct msg_msg *load_msg(const void __user *src, int len);
131extern int store_msg(void __user *dest, struct msg_msg *msg, int len); 125extern int store_msg(void __user *dest, struct msg_msg *msg, int len);
132extern int ipcget_new(struct ipc_namespace *, struct ipc_ids *,
133 struct ipc_ops *, struct ipc_params *);
134extern int ipcget_public(struct ipc_namespace *, struct ipc_ids *,
135 struct ipc_ops *, struct ipc_params *);
136 126
137static inline int ipc_buildid(int id, int seq) 127static inline int ipc_buildid(int id, int seq)
138{ 128{
@@ -161,57 +151,9 @@ static inline void ipc_unlock(struct kern_ipc_perm *perm)
161 rcu_read_unlock(); 151 rcu_read_unlock();
162} 152}
163 153
164static inline struct kern_ipc_perm *ipc_lock_check_down(struct ipc_ids *ids, 154struct kern_ipc_perm *ipc_lock_check_down(struct ipc_ids *ids, int id);
165 int id) 155struct kern_ipc_perm *ipc_lock_check(struct ipc_ids *ids, int id);
166{ 156int ipcget(struct ipc_namespace *ns, struct ipc_ids *ids,
167 struct kern_ipc_perm *out; 157 struct ipc_ops *ops, struct ipc_params *params);
168
169 out = ipc_lock_down(ids, id);
170 if (IS_ERR(out))
171 return out;
172
173 if (ipc_checkid(out, id)) {
174 ipc_unlock(out);
175 return ERR_PTR(-EIDRM);
176 }
177
178 return out;
179}
180
181static inline struct kern_ipc_perm *ipc_lock_check(struct ipc_ids *ids,
182 int id)
183{
184 struct kern_ipc_perm *out;
185
186 out = ipc_lock(ids, id);
187 if (IS_ERR(out))
188 return out;
189
190 if (ipc_checkid(out, id)) {
191 ipc_unlock(out);
192 return ERR_PTR(-EIDRM);
193 }
194
195 return out;
196}
197
198/**
199 * ipcget - Common sys_*get() code
200 * @ns : namsepace
201 * @ids : IPC identifier set
202 * @ops : operations to be called on ipc object creation, permission checks
203 * and further checks
204 * @params : the parameters needed by the previous operations.
205 *
206 * Common routine called by sys_msgget(), sys_semget() and sys_shmget().
207 */
208static inline int ipcget(struct ipc_namespace *ns, struct ipc_ids *ids,
209 struct ipc_ops *ops, struct ipc_params *params)
210{
211 if (params->key == IPC_PRIVATE)
212 return ipcget_new(ns, ids, ops, params);
213 else
214 return ipcget_public(ns, ids, ops, params);
215}
216 158
217#endif 159#endif
diff --git a/kernel/Makefile b/kernel/Makefile
index 685697c0a181..6c584c55a6e9 100644
--- a/kernel/Makefile
+++ b/kernel/Makefile
@@ -4,12 +4,12 @@
4 4
5obj-y = sched.o fork.o exec_domain.o panic.o printk.o profile.o \ 5obj-y = sched.o fork.o exec_domain.o panic.o printk.o profile.o \
6 exit.o itimer.o time.o softirq.o resource.o \ 6 exit.o itimer.o time.o softirq.o resource.o \
7 sysctl.o capability.o ptrace.o timer.o user.o user_namespace.o \ 7 sysctl.o capability.o ptrace.o timer.o user.o \
8 signal.o sys.o kmod.o workqueue.o pid.o \ 8 signal.o sys.o kmod.o workqueue.o pid.o \
9 rcupdate.o extable.o params.o posix-timers.o \ 9 rcupdate.o extable.o params.o posix-timers.o \
10 kthread.o wait.o kfifo.o sys_ni.o posix-cpu-timers.o mutex.o \ 10 kthread.o wait.o kfifo.o sys_ni.o posix-cpu-timers.o mutex.o \
11 hrtimer.o rwsem.o nsproxy.o srcu.o \ 11 hrtimer.o rwsem.o nsproxy.o srcu.o \
12 utsname.o notifier.o ksysfs.o pm_qos_params.o 12 notifier.o ksysfs.o pm_qos_params.o
13 13
14obj-$(CONFIG_SYSCTL) += sysctl_check.o 14obj-$(CONFIG_SYSCTL) += sysctl_check.o
15obj-$(CONFIG_STACKTRACE) += stacktrace.o 15obj-$(CONFIG_STACKTRACE) += stacktrace.o
@@ -42,6 +42,9 @@ obj-$(CONFIG_CGROUPS) += cgroup.o
42obj-$(CONFIG_CGROUP_DEBUG) += cgroup_debug.o 42obj-$(CONFIG_CGROUP_DEBUG) += cgroup_debug.o
43obj-$(CONFIG_CPUSETS) += cpuset.o 43obj-$(CONFIG_CPUSETS) += cpuset.o
44obj-$(CONFIG_CGROUP_NS) += ns_cgroup.o 44obj-$(CONFIG_CGROUP_NS) += ns_cgroup.o
45obj-$(CONFIG_UTS_NS) += utsname.o
46obj-$(CONFIG_USER_NS) += user_namespace.o
47obj-$(CONFIG_PID_NS) += pid_namespace.o
45obj-$(CONFIG_IKCONFIG) += configs.o 48obj-$(CONFIG_IKCONFIG) += configs.o
46obj-$(CONFIG_RESOURCE_COUNTERS) += res_counter.o 49obj-$(CONFIG_RESOURCE_COUNTERS) += res_counter.o
47obj-$(CONFIG_STOP_MACHINE) += stop_machine.o 50obj-$(CONFIG_STOP_MACHINE) += stop_machine.o
@@ -88,3 +91,11 @@ quiet_cmd_ikconfiggz = IKCFG $@
88targets += config_data.h 91targets += config_data.h
89$(obj)/config_data.h: $(obj)/config_data.gz FORCE 92$(obj)/config_data.h: $(obj)/config_data.gz FORCE
90 $(call if_changed,ikconfiggz) 93 $(call if_changed,ikconfiggz)
94
95$(obj)/time.o: $(obj)/timeconst.h
96
97quiet_cmd_timeconst = TIMEC $@
98 cmd_timeconst = $(PERL) $< $(CONFIG_HZ) > $@
99targets += timeconst.h
100$(obj)/timeconst.h: $(src)/timeconst.pl FORCE
101 $(call if_changed,timeconst)
diff --git a/kernel/cpu.c b/kernel/cpu.c
index e0d3a4f56ecb..2eff3f63abed 100644
--- a/kernel/cpu.c
+++ b/kernel/cpu.c
@@ -389,7 +389,7 @@ int disable_nonboot_cpus(void)
389 return error; 389 return error;
390} 390}
391 391
392void enable_nonboot_cpus(void) 392void __ref enable_nonboot_cpus(void)
393{ 393{
394 int cpu, error; 394 int cpu, error;
395 395
diff --git a/kernel/cpuset.c b/kernel/cpuset.c
index 67b2bfe27814..3e296ed81d4d 100644
--- a/kernel/cpuset.c
+++ b/kernel/cpuset.c
@@ -2255,13 +2255,14 @@ const struct file_operations proc_cpuset_operations = {
2255#endif /* CONFIG_PROC_PID_CPUSET */ 2255#endif /* CONFIG_PROC_PID_CPUSET */
2256 2256
2257/* Display task cpus_allowed, mems_allowed in /proc/<pid>/status file. */ 2257/* Display task cpus_allowed, mems_allowed in /proc/<pid>/status file. */
2258char *cpuset_task_status_allowed(struct task_struct *task, char *buffer) 2258void cpuset_task_status_allowed(struct seq_file *m, struct task_struct *task)
2259{ 2259{
2260 buffer += sprintf(buffer, "Cpus_allowed:\t"); 2260 seq_printf(m, "Cpus_allowed:\t");
2261 buffer += cpumask_scnprintf(buffer, PAGE_SIZE, task->cpus_allowed); 2261 m->count += cpumask_scnprintf(m->buf + m->count, m->size - m->count,
2262 buffer += sprintf(buffer, "\n"); 2262 task->cpus_allowed);
2263 buffer += sprintf(buffer, "Mems_allowed:\t"); 2263 seq_printf(m, "\n");
2264 buffer += nodemask_scnprintf(buffer, PAGE_SIZE, task->mems_allowed); 2264 seq_printf(m, "Mems_allowed:\t");
2265 buffer += sprintf(buffer, "\n"); 2265 m->count += nodemask_scnprintf(m->buf + m->count, m->size - m->count,
2266 return buffer; 2266 task->mems_allowed);
2267 seq_printf(m, "\n");
2267} 2268}
diff --git a/kernel/exit.c b/kernel/exit.c
index eb9934a82fc1..3b893e78ce61 100644
--- a/kernel/exit.c
+++ b/kernel/exit.c
@@ -293,26 +293,27 @@ static void reparent_to_kthreadd(void)
293 switch_uid(INIT_USER); 293 switch_uid(INIT_USER);
294} 294}
295 295
296void __set_special_pids(pid_t session, pid_t pgrp) 296void __set_special_pids(struct pid *pid)
297{ 297{
298 struct task_struct *curr = current->group_leader; 298 struct task_struct *curr = current->group_leader;
299 pid_t nr = pid_nr(pid);
299 300
300 if (task_session_nr(curr) != session) { 301 if (task_session(curr) != pid) {
301 detach_pid(curr, PIDTYPE_SID); 302 detach_pid(curr, PIDTYPE_SID);
302 set_task_session(curr, session); 303 attach_pid(curr, PIDTYPE_SID, pid);
303 attach_pid(curr, PIDTYPE_SID, find_pid(session)); 304 set_task_session(curr, nr);
304 } 305 }
305 if (task_pgrp_nr(curr) != pgrp) { 306 if (task_pgrp(curr) != pid) {
306 detach_pid(curr, PIDTYPE_PGID); 307 detach_pid(curr, PIDTYPE_PGID);
307 set_task_pgrp(curr, pgrp); 308 attach_pid(curr, PIDTYPE_PGID, pid);
308 attach_pid(curr, PIDTYPE_PGID, find_pid(pgrp)); 309 set_task_pgrp(curr, nr);
309 } 310 }
310} 311}
311 312
312static void set_special_pids(pid_t session, pid_t pgrp) 313static void set_special_pids(struct pid *pid)
313{ 314{
314 write_lock_irq(&tasklist_lock); 315 write_lock_irq(&tasklist_lock);
315 __set_special_pids(session, pgrp); 316 __set_special_pids(pid);
316 write_unlock_irq(&tasklist_lock); 317 write_unlock_irq(&tasklist_lock);
317} 318}
318 319
@@ -383,7 +384,11 @@ void daemonize(const char *name, ...)
383 */ 384 */
384 current->flags |= PF_NOFREEZE; 385 current->flags |= PF_NOFREEZE;
385 386
386 set_special_pids(1, 1); 387 if (current->nsproxy != &init_nsproxy) {
388 get_nsproxy(&init_nsproxy);
389 switch_task_namespaces(current, &init_nsproxy);
390 }
391 set_special_pids(&init_struct_pid);
387 proc_clear_tty(current); 392 proc_clear_tty(current);
388 393
389 /* Block and flush all signals */ 394 /* Block and flush all signals */
@@ -398,11 +403,6 @@ void daemonize(const char *name, ...)
398 current->fs = fs; 403 current->fs = fs;
399 atomic_inc(&fs->count); 404 atomic_inc(&fs->count);
400 405
401 if (current->nsproxy != init_task.nsproxy) {
402 get_nsproxy(init_task.nsproxy);
403 switch_task_namespaces(current, init_task.nsproxy);
404 }
405
406 exit_files(current); 406 exit_files(current);
407 current->files = init_task.files; 407 current->files = init_task.files;
408 atomic_inc(&current->files->count); 408 atomic_inc(&current->files->count);
@@ -458,7 +458,7 @@ struct files_struct *get_files_struct(struct task_struct *task)
458 return files; 458 return files;
459} 459}
460 460
461void fastcall put_files_struct(struct files_struct *files) 461void put_files_struct(struct files_struct *files)
462{ 462{
463 struct fdtable *fdt; 463 struct fdtable *fdt;
464 464
@@ -745,24 +745,6 @@ static void exit_notify(struct task_struct *tsk)
745 struct task_struct *t; 745 struct task_struct *t;
746 struct pid *pgrp; 746 struct pid *pgrp;
747 747
748 if (signal_pending(tsk) && !(tsk->signal->flags & SIGNAL_GROUP_EXIT)
749 && !thread_group_empty(tsk)) {
750 /*
751 * This occurs when there was a race between our exit
752 * syscall and a group signal choosing us as the one to
753 * wake up. It could be that we are the only thread
754 * alerted to check for pending signals, but another thread
755 * should be woken now to take the signal since we will not.
756 * Now we'll wake all the threads in the group just to make
757 * sure someone gets all the pending signals.
758 */
759 spin_lock_irq(&tsk->sighand->siglock);
760 for (t = next_thread(tsk); t != tsk; t = next_thread(t))
761 if (!signal_pending(t) && !(t->flags & PF_EXITING))
762 recalc_sigpending_and_wake(t);
763 spin_unlock_irq(&tsk->sighand->siglock);
764 }
765
766 /* 748 /*
767 * This does two things: 749 * This does two things:
768 * 750 *
@@ -905,7 +887,7 @@ static inline void exit_child_reaper(struct task_struct *tsk)
905 zap_pid_ns_processes(tsk->nsproxy->pid_ns); 887 zap_pid_ns_processes(tsk->nsproxy->pid_ns);
906} 888}
907 889
908fastcall NORET_TYPE void do_exit(long code) 890NORET_TYPE void do_exit(long code)
909{ 891{
910 struct task_struct *tsk = current; 892 struct task_struct *tsk = current;
911 int group_dead; 893 int group_dead;
@@ -947,7 +929,7 @@ fastcall NORET_TYPE void do_exit(long code)
947 schedule(); 929 schedule();
948 } 930 }
949 931
950 tsk->flags |= PF_EXITING; 932 exit_signals(tsk); /* sets PF_EXITING */
951 /* 933 /*
952 * tsk->flags are checked in the futex code to protect against 934 * tsk->flags are checked in the futex code to protect against
953 * an exiting task cleaning up the robust pi futexes. 935 * an exiting task cleaning up the robust pi futexes.
@@ -1108,20 +1090,23 @@ asmlinkage void sys_exit_group(int error_code)
1108 do_group_exit((error_code & 0xff) << 8); 1090 do_group_exit((error_code & 0xff) << 8);
1109} 1091}
1110 1092
1111static int eligible_child(pid_t pid, int options, struct task_struct *p) 1093static struct pid *task_pid_type(struct task_struct *task, enum pid_type type)
1094{
1095 struct pid *pid = NULL;
1096 if (type == PIDTYPE_PID)
1097 pid = task->pids[type].pid;
1098 else if (type < PIDTYPE_MAX)
1099 pid = task->group_leader->pids[type].pid;
1100 return pid;
1101}
1102
1103static int eligible_child(enum pid_type type, struct pid *pid, int options,
1104 struct task_struct *p)
1112{ 1105{
1113 int err; 1106 int err;
1114 struct pid_namespace *ns;
1115 1107
1116 ns = current->nsproxy->pid_ns; 1108 if (type < PIDTYPE_MAX) {
1117 if (pid > 0) { 1109 if (task_pid_type(p, type) != pid)
1118 if (task_pid_nr_ns(p, ns) != pid)
1119 return 0;
1120 } else if (!pid) {
1121 if (task_pgrp_nr_ns(p, ns) != task_pgrp_vnr(current))
1122 return 0;
1123 } else if (pid != -1) {
1124 if (task_pgrp_nr_ns(p, ns) != -pid)
1125 return 0; 1110 return 0;
1126 } 1111 }
1127 1112
@@ -1140,18 +1125,16 @@ static int eligible_child(pid_t pid, int options, struct task_struct *p)
1140 if (((p->exit_signal != SIGCHLD) ^ ((options & __WCLONE) != 0)) 1125 if (((p->exit_signal != SIGCHLD) ^ ((options & __WCLONE) != 0))
1141 && !(options & __WALL)) 1126 && !(options & __WALL))
1142 return 0; 1127 return 0;
1143 /*
1144 * Do not consider thread group leaders that are
1145 * in a non-empty thread group:
1146 */
1147 if (delay_group_leader(p))
1148 return 2;
1149 1128
1150 err = security_task_wait(p); 1129 err = security_task_wait(p);
1151 if (err) 1130 if (likely(!err))
1152 return err; 1131 return 1;
1153 1132
1154 return 1; 1133 if (type != PIDTYPE_PID)
1134 return 0;
1135 /* This child was explicitly requested, abort */
1136 read_unlock(&tasklist_lock);
1137 return err;
1155} 1138}
1156 1139
1157static int wait_noreap_copyout(struct task_struct *p, pid_t pid, uid_t uid, 1140static int wait_noreap_copyout(struct task_struct *p, pid_t pid, uid_t uid,
@@ -1191,20 +1174,13 @@ static int wait_task_zombie(struct task_struct *p, int noreap,
1191{ 1174{
1192 unsigned long state; 1175 unsigned long state;
1193 int retval, status, traced; 1176 int retval, status, traced;
1194 struct pid_namespace *ns; 1177 pid_t pid = task_pid_vnr(p);
1195
1196 ns = current->nsproxy->pid_ns;
1197 1178
1198 if (unlikely(noreap)) { 1179 if (unlikely(noreap)) {
1199 pid_t pid = task_pid_nr_ns(p, ns);
1200 uid_t uid = p->uid; 1180 uid_t uid = p->uid;
1201 int exit_code = p->exit_code; 1181 int exit_code = p->exit_code;
1202 int why, status; 1182 int why, status;
1203 1183
1204 if (unlikely(p->exit_state != EXIT_ZOMBIE))
1205 return 0;
1206 if (unlikely(p->exit_signal == -1 && p->ptrace == 0))
1207 return 0;
1208 get_task_struct(p); 1184 get_task_struct(p);
1209 read_unlock(&tasklist_lock); 1185 read_unlock(&tasklist_lock);
1210 if ((exit_code & 0x7f) == 0) { 1186 if ((exit_code & 0x7f) == 0) {
@@ -1315,11 +1291,11 @@ static int wait_task_zombie(struct task_struct *p, int noreap,
1315 retval = put_user(status, &infop->si_status); 1291 retval = put_user(status, &infop->si_status);
1316 } 1292 }
1317 if (!retval && infop) 1293 if (!retval && infop)
1318 retval = put_user(task_pid_nr_ns(p, ns), &infop->si_pid); 1294 retval = put_user(pid, &infop->si_pid);
1319 if (!retval && infop) 1295 if (!retval && infop)
1320 retval = put_user(p->uid, &infop->si_uid); 1296 retval = put_user(p->uid, &infop->si_uid);
1321 if (!retval) 1297 if (!retval)
1322 retval = task_pid_nr_ns(p, ns); 1298 retval = pid;
1323 1299
1324 if (traced) { 1300 if (traced) {
1325 write_lock_irq(&tasklist_lock); 1301 write_lock_irq(&tasklist_lock);
@@ -1351,21 +1327,38 @@ static int wait_task_zombie(struct task_struct *p, int noreap,
1351 * the lock and this task is uninteresting. If we return nonzero, we have 1327 * the lock and this task is uninteresting. If we return nonzero, we have
1352 * released the lock and the system call should return. 1328 * released the lock and the system call should return.
1353 */ 1329 */
1354static int wait_task_stopped(struct task_struct *p, int delayed_group_leader, 1330static int wait_task_stopped(struct task_struct *p,
1355 int noreap, struct siginfo __user *infop, 1331 int noreap, struct siginfo __user *infop,
1356 int __user *stat_addr, struct rusage __user *ru) 1332 int __user *stat_addr, struct rusage __user *ru)
1357{ 1333{
1358 int retval, exit_code; 1334 int retval, exit_code, why;
1335 uid_t uid = 0; /* unneeded, required by compiler */
1359 pid_t pid; 1336 pid_t pid;
1360 1337
1361 if (!p->exit_code) 1338 exit_code = 0;
1362 return 0; 1339 spin_lock_irq(&p->sighand->siglock);
1363 if (delayed_group_leader && !(p->ptrace & PT_PTRACED) && 1340
1364 p->signal->group_stop_count > 0) 1341 if (unlikely(!task_is_stopped_or_traced(p)))
1342 goto unlock_sig;
1343
1344 if (!(p->ptrace & PT_PTRACED) && p->signal->group_stop_count > 0)
1365 /* 1345 /*
1366 * A group stop is in progress and this is the group leader. 1346 * A group stop is in progress and this is the group leader.
1367 * We won't report until all threads have stopped. 1347 * We won't report until all threads have stopped.
1368 */ 1348 */
1349 goto unlock_sig;
1350
1351 exit_code = p->exit_code;
1352 if (!exit_code)
1353 goto unlock_sig;
1354
1355 if (!noreap)
1356 p->exit_code = 0;
1357
1358 uid = p->uid;
1359unlock_sig:
1360 spin_unlock_irq(&p->sighand->siglock);
1361 if (!exit_code)
1369 return 0; 1362 return 0;
1370 1363
1371 /* 1364 /*
@@ -1375,65 +1368,15 @@ static int wait_task_stopped(struct task_struct *p, int delayed_group_leader,
1375 * keep holding onto the tasklist_lock while we call getrusage and 1368 * keep holding onto the tasklist_lock while we call getrusage and
1376 * possibly take page faults for user memory. 1369 * possibly take page faults for user memory.
1377 */ 1370 */
1378 pid = task_pid_nr_ns(p, current->nsproxy->pid_ns);
1379 get_task_struct(p); 1371 get_task_struct(p);
1372 pid = task_pid_vnr(p);
1373 why = (p->ptrace & PT_PTRACED) ? CLD_TRAPPED : CLD_STOPPED;
1380 read_unlock(&tasklist_lock); 1374 read_unlock(&tasklist_lock);
1381 1375
1382 if (unlikely(noreap)) { 1376 if (unlikely(noreap))
1383 uid_t uid = p->uid;
1384 int why = (p->ptrace & PT_PTRACED) ? CLD_TRAPPED : CLD_STOPPED;
1385
1386 exit_code = p->exit_code;
1387 if (unlikely(!exit_code) || unlikely(p->exit_state))
1388 goto bail_ref;
1389 return wait_noreap_copyout(p, pid, uid, 1377 return wait_noreap_copyout(p, pid, uid,
1390 why, exit_code, 1378 why, exit_code,
1391 infop, ru); 1379 infop, ru);
1392 }
1393
1394 write_lock_irq(&tasklist_lock);
1395
1396 /*
1397 * This uses xchg to be atomic with the thread resuming and setting
1398 * it. It must also be done with the write lock held to prevent a
1399 * race with the EXIT_ZOMBIE case.
1400 */
1401 exit_code = xchg(&p->exit_code, 0);
1402 if (unlikely(p->exit_state)) {
1403 /*
1404 * The task resumed and then died. Let the next iteration
1405 * catch it in EXIT_ZOMBIE. Note that exit_code might
1406 * already be zero here if it resumed and did _exit(0).
1407 * The task itself is dead and won't touch exit_code again;
1408 * other processors in this function are locked out.
1409 */
1410 p->exit_code = exit_code;
1411 exit_code = 0;
1412 }
1413 if (unlikely(exit_code == 0)) {
1414 /*
1415 * Another thread in this function got to it first, or it
1416 * resumed, or it resumed and then died.
1417 */
1418 write_unlock_irq(&tasklist_lock);
1419bail_ref:
1420 put_task_struct(p);
1421 /*
1422 * We are returning to the wait loop without having successfully
1423 * removed the process and having released the lock. We cannot
1424 * continue, since the "p" task pointer is potentially stale.
1425 *
1426 * Return -EAGAIN, and do_wait() will restart the loop from the
1427 * beginning. Do _not_ re-acquire the lock.
1428 */
1429 return -EAGAIN;
1430 }
1431
1432 /* move to end of parent's list to avoid starvation */
1433 remove_parent(p);
1434 add_parent(p);
1435
1436 write_unlock_irq(&tasklist_lock);
1437 1380
1438 retval = ru ? getrusage(p, RUSAGE_BOTH, ru) : 0; 1381 retval = ru ? getrusage(p, RUSAGE_BOTH, ru) : 0;
1439 if (!retval && stat_addr) 1382 if (!retval && stat_addr)
@@ -1443,15 +1386,13 @@ bail_ref:
1443 if (!retval && infop) 1386 if (!retval && infop)
1444 retval = put_user(0, &infop->si_errno); 1387 retval = put_user(0, &infop->si_errno);
1445 if (!retval && infop) 1388 if (!retval && infop)
1446 retval = put_user((short)((p->ptrace & PT_PTRACED) 1389 retval = put_user(why, &infop->si_code);
1447 ? CLD_TRAPPED : CLD_STOPPED),
1448 &infop->si_code);
1449 if (!retval && infop) 1390 if (!retval && infop)
1450 retval = put_user(exit_code, &infop->si_status); 1391 retval = put_user(exit_code, &infop->si_status);
1451 if (!retval && infop) 1392 if (!retval && infop)
1452 retval = put_user(pid, &infop->si_pid); 1393 retval = put_user(pid, &infop->si_pid);
1453 if (!retval && infop) 1394 if (!retval && infop)
1454 retval = put_user(p->uid, &infop->si_uid); 1395 retval = put_user(uid, &infop->si_uid);
1455 if (!retval) 1396 if (!retval)
1456 retval = pid; 1397 retval = pid;
1457 put_task_struct(p); 1398 put_task_struct(p);
@@ -1473,7 +1414,6 @@ static int wait_task_continued(struct task_struct *p, int noreap,
1473 int retval; 1414 int retval;
1474 pid_t pid; 1415 pid_t pid;
1475 uid_t uid; 1416 uid_t uid;
1476 struct pid_namespace *ns;
1477 1417
1478 if (!(p->signal->flags & SIGNAL_STOP_CONTINUED)) 1418 if (!(p->signal->flags & SIGNAL_STOP_CONTINUED))
1479 return 0; 1419 return 0;
@@ -1488,8 +1428,7 @@ static int wait_task_continued(struct task_struct *p, int noreap,
1488 p->signal->flags &= ~SIGNAL_STOP_CONTINUED; 1428 p->signal->flags &= ~SIGNAL_STOP_CONTINUED;
1489 spin_unlock_irq(&p->sighand->siglock); 1429 spin_unlock_irq(&p->sighand->siglock);
1490 1430
1491 ns = current->nsproxy->pid_ns; 1431 pid = task_pid_vnr(p);
1492 pid = task_pid_nr_ns(p, ns);
1493 uid = p->uid; 1432 uid = p->uid;
1494 get_task_struct(p); 1433 get_task_struct(p);
1495 read_unlock(&tasklist_lock); 1434 read_unlock(&tasklist_lock);
@@ -1500,7 +1439,7 @@ static int wait_task_continued(struct task_struct *p, int noreap,
1500 if (!retval && stat_addr) 1439 if (!retval && stat_addr)
1501 retval = put_user(0xffff, stat_addr); 1440 retval = put_user(0xffff, stat_addr);
1502 if (!retval) 1441 if (!retval)
1503 retval = task_pid_nr_ns(p, ns); 1442 retval = pid;
1504 } else { 1443 } else {
1505 retval = wait_noreap_copyout(p, pid, uid, 1444 retval = wait_noreap_copyout(p, pid, uid,
1506 CLD_CONTINUED, SIGCONT, 1445 CLD_CONTINUED, SIGCONT,
@@ -1511,101 +1450,63 @@ static int wait_task_continued(struct task_struct *p, int noreap,
1511 return retval; 1450 return retval;
1512} 1451}
1513 1452
1514 1453static long do_wait(enum pid_type type, struct pid *pid, int options,
1515static inline int my_ptrace_child(struct task_struct *p) 1454 struct siginfo __user *infop, int __user *stat_addr,
1516{ 1455 struct rusage __user *ru)
1517 if (!(p->ptrace & PT_PTRACED))
1518 return 0;
1519 if (!(p->ptrace & PT_ATTACHED))
1520 return 1;
1521 /*
1522 * This child was PTRACE_ATTACH'd. We should be seeing it only if
1523 * we are the attacher. If we are the real parent, this is a race
1524 * inside ptrace_attach. It is waiting for the tasklist_lock,
1525 * which we have to switch the parent links, but has already set
1526 * the flags in p->ptrace.
1527 */
1528 return (p->parent != p->real_parent);
1529}
1530
1531static long do_wait(pid_t pid, int options, struct siginfo __user *infop,
1532 int __user *stat_addr, struct rusage __user *ru)
1533{ 1456{
1534 DECLARE_WAITQUEUE(wait, current); 1457 DECLARE_WAITQUEUE(wait, current);
1535 struct task_struct *tsk; 1458 struct task_struct *tsk;
1536 int flag, retval; 1459 int flag, retval;
1537 int allowed, denied;
1538 1460
1539 add_wait_queue(&current->signal->wait_chldexit,&wait); 1461 add_wait_queue(&current->signal->wait_chldexit,&wait);
1540repeat: 1462repeat:
1463 /* If there is nothing that can match our critier just get out */
1464 retval = -ECHILD;
1465 if ((type < PIDTYPE_MAX) && (!pid || hlist_empty(&pid->tasks[type])))
1466 goto end;
1467
1541 /* 1468 /*
1542 * We will set this flag if we see any child that might later 1469 * We will set this flag if we see any child that might later
1543 * match our criteria, even if we are not able to reap it yet. 1470 * match our criteria, even if we are not able to reap it yet.
1544 */ 1471 */
1545 flag = 0; 1472 flag = retval = 0;
1546 allowed = denied = 0;
1547 current->state = TASK_INTERRUPTIBLE; 1473 current->state = TASK_INTERRUPTIBLE;
1548 read_lock(&tasklist_lock); 1474 read_lock(&tasklist_lock);
1549 tsk = current; 1475 tsk = current;
1550 do { 1476 do {
1551 struct task_struct *p; 1477 struct task_struct *p;
1552 int ret;
1553 1478
1554 list_for_each_entry(p, &tsk->children, sibling) { 1479 list_for_each_entry(p, &tsk->children, sibling) {
1555 ret = eligible_child(pid, options, p); 1480 int ret = eligible_child(type, pid, options, p);
1556 if (!ret) 1481 if (!ret)
1557 continue; 1482 continue;
1558 1483
1559 if (unlikely(ret < 0)) { 1484 if (unlikely(ret < 0)) {
1560 denied = ret; 1485 retval = ret;
1561 continue; 1486 } else if (task_is_stopped_or_traced(p)) {
1562 }
1563 allowed = 1;
1564
1565 if (task_is_stopped_or_traced(p)) {
1566 /* 1487 /*
1567 * It's stopped now, so it might later 1488 * It's stopped now, so it might later
1568 * continue, exit, or stop again. 1489 * continue, exit, or stop again.
1569 *
1570 * When we hit the race with PTRACE_ATTACH, we
1571 * will not report this child. But the race
1572 * means it has not yet been moved to our
1573 * ptrace_children list, so we need to set the
1574 * flag here to avoid a spurious ECHILD when
1575 * the race happens with the only child.
1576 */ 1490 */
1577 flag = 1; 1491 flag = 1;
1492 if (!(p->ptrace & PT_PTRACED) &&
1493 !(options & WUNTRACED))
1494 continue;
1578 1495
1579 if (!my_ptrace_child(p)) { 1496 retval = wait_task_stopped(p,
1580 if (task_is_traced(p))
1581 continue;
1582 if (!(options & WUNTRACED))
1583 continue;
1584 }
1585
1586 retval = wait_task_stopped(p, ret == 2,
1587 (options & WNOWAIT), infop, 1497 (options & WNOWAIT), infop,
1588 stat_addr, ru); 1498 stat_addr, ru);
1589 if (retval == -EAGAIN) 1499 } else if (p->exit_state == EXIT_ZOMBIE &&
1590 goto repeat; 1500 !delay_group_leader(p)) {
1591 if (retval != 0) /* He released the lock. */
1592 goto end;
1593 } else if (p->exit_state == EXIT_ZOMBIE) {
1594 /* 1501 /*
1595 * Eligible but we cannot release it yet: 1502 * We don't reap group leaders with subthreads.
1596 */ 1503 */
1597 if (ret == 2)
1598 goto check_continued;
1599 if (!likely(options & WEXITED)) 1504 if (!likely(options & WEXITED))
1600 continue; 1505 continue;
1601 retval = wait_task_zombie(p, 1506 retval = wait_task_zombie(p,
1602 (options & WNOWAIT), infop, 1507 (options & WNOWAIT), infop,
1603 stat_addr, ru); 1508 stat_addr, ru);
1604 /* He released the lock. */
1605 if (retval != 0)
1606 goto end;
1607 } else if (p->exit_state != EXIT_DEAD) { 1509 } else if (p->exit_state != EXIT_DEAD) {
1608check_continued:
1609 /* 1510 /*
1610 * It's running now, so it might later 1511 * It's running now, so it might later
1611 * exit, stop, or stop and then continue. 1512 * exit, stop, or stop and then continue.
@@ -1616,17 +1517,20 @@ check_continued:
1616 retval = wait_task_continued(p, 1517 retval = wait_task_continued(p,
1617 (options & WNOWAIT), infop, 1518 (options & WNOWAIT), infop,
1618 stat_addr, ru); 1519 stat_addr, ru);
1619 if (retval != 0) /* He released the lock. */
1620 goto end;
1621 } 1520 }
1521 if (retval != 0) /* tasklist_lock released */
1522 goto end;
1622 } 1523 }
1623 if (!flag) { 1524 if (!flag) {
1624 list_for_each_entry(p, &tsk->ptrace_children, 1525 list_for_each_entry(p, &tsk->ptrace_children,
1625 ptrace_list) { 1526 ptrace_list) {
1626 if (!eligible_child(pid, options, p)) 1527 flag = eligible_child(type, pid, options, p);
1528 if (!flag)
1627 continue; 1529 continue;
1628 flag = 1; 1530 if (likely(flag > 0))
1629 break; 1531 break;
1532 retval = flag;
1533 goto end;
1630 } 1534 }
1631 } 1535 }
1632 if (options & __WNOTHREAD) 1536 if (options & __WNOTHREAD)
@@ -1634,10 +1538,9 @@ check_continued:
1634 tsk = next_thread(tsk); 1538 tsk = next_thread(tsk);
1635 BUG_ON(tsk->signal != current->signal); 1539 BUG_ON(tsk->signal != current->signal);
1636 } while (tsk != current); 1540 } while (tsk != current);
1637
1638 read_unlock(&tasklist_lock); 1541 read_unlock(&tasklist_lock);
1542
1639 if (flag) { 1543 if (flag) {
1640 retval = 0;
1641 if (options & WNOHANG) 1544 if (options & WNOHANG)
1642 goto end; 1545 goto end;
1643 retval = -ERESTARTSYS; 1546 retval = -ERESTARTSYS;
@@ -1647,14 +1550,12 @@ check_continued:
1647 goto repeat; 1550 goto repeat;
1648 } 1551 }
1649 retval = -ECHILD; 1552 retval = -ECHILD;
1650 if (unlikely(denied) && !allowed)
1651 retval = denied;
1652end: 1553end:
1653 current->state = TASK_RUNNING; 1554 current->state = TASK_RUNNING;
1654 remove_wait_queue(&current->signal->wait_chldexit,&wait); 1555 remove_wait_queue(&current->signal->wait_chldexit,&wait);
1655 if (infop) { 1556 if (infop) {
1656 if (retval > 0) 1557 if (retval > 0)
1657 retval = 0; 1558 retval = 0;
1658 else { 1559 else {
1659 /* 1560 /*
1660 * For a WNOHANG return, clear out all the fields 1561 * For a WNOHANG return, clear out all the fields
@@ -1678,10 +1579,12 @@ end:
1678 return retval; 1579 return retval;
1679} 1580}
1680 1581
1681asmlinkage long sys_waitid(int which, pid_t pid, 1582asmlinkage long sys_waitid(int which, pid_t upid,
1682 struct siginfo __user *infop, int options, 1583 struct siginfo __user *infop, int options,
1683 struct rusage __user *ru) 1584 struct rusage __user *ru)
1684{ 1585{
1586 struct pid *pid = NULL;
1587 enum pid_type type;
1685 long ret; 1588 long ret;
1686 1589
1687 if (options & ~(WNOHANG|WNOWAIT|WEXITED|WSTOPPED|WCONTINUED)) 1590 if (options & ~(WNOHANG|WNOWAIT|WEXITED|WSTOPPED|WCONTINUED))
@@ -1691,37 +1594,58 @@ asmlinkage long sys_waitid(int which, pid_t pid,
1691 1594
1692 switch (which) { 1595 switch (which) {
1693 case P_ALL: 1596 case P_ALL:
1694 pid = -1; 1597 type = PIDTYPE_MAX;
1695 break; 1598 break;
1696 case P_PID: 1599 case P_PID:
1697 if (pid <= 0) 1600 type = PIDTYPE_PID;
1601 if (upid <= 0)
1698 return -EINVAL; 1602 return -EINVAL;
1699 break; 1603 break;
1700 case P_PGID: 1604 case P_PGID:
1701 if (pid <= 0) 1605 type = PIDTYPE_PGID;
1606 if (upid <= 0)
1702 return -EINVAL; 1607 return -EINVAL;
1703 pid = -pid;
1704 break; 1608 break;
1705 default: 1609 default:
1706 return -EINVAL; 1610 return -EINVAL;
1707 } 1611 }
1708 1612
1709 ret = do_wait(pid, options, infop, NULL, ru); 1613 if (type < PIDTYPE_MAX)
1614 pid = find_get_pid(upid);
1615 ret = do_wait(type, pid, options, infop, NULL, ru);
1616 put_pid(pid);
1710 1617
1711 /* avoid REGPARM breakage on x86: */ 1618 /* avoid REGPARM breakage on x86: */
1712 prevent_tail_call(ret); 1619 prevent_tail_call(ret);
1713 return ret; 1620 return ret;
1714} 1621}
1715 1622
1716asmlinkage long sys_wait4(pid_t pid, int __user *stat_addr, 1623asmlinkage long sys_wait4(pid_t upid, int __user *stat_addr,
1717 int options, struct rusage __user *ru) 1624 int options, struct rusage __user *ru)
1718{ 1625{
1626 struct pid *pid = NULL;
1627 enum pid_type type;
1719 long ret; 1628 long ret;
1720 1629
1721 if (options & ~(WNOHANG|WUNTRACED|WCONTINUED| 1630 if (options & ~(WNOHANG|WUNTRACED|WCONTINUED|
1722 __WNOTHREAD|__WCLONE|__WALL)) 1631 __WNOTHREAD|__WCLONE|__WALL))
1723 return -EINVAL; 1632 return -EINVAL;
1724 ret = do_wait(pid, options | WEXITED, NULL, stat_addr, ru); 1633
1634 if (upid == -1)
1635 type = PIDTYPE_MAX;
1636 else if (upid < 0) {
1637 type = PIDTYPE_PGID;
1638 pid = find_get_pid(-upid);
1639 } else if (upid == 0) {
1640 type = PIDTYPE_PGID;
1641 pid = get_pid(task_pgrp(current));
1642 } else /* upid > 0 */ {
1643 type = PIDTYPE_PID;
1644 pid = find_get_pid(upid);
1645 }
1646
1647 ret = do_wait(type, pid, options | WEXITED, NULL, stat_addr, ru);
1648 put_pid(pid);
1725 1649
1726 /* avoid REGPARM breakage on x86: */ 1650 /* avoid REGPARM breakage on x86: */
1727 prevent_tail_call(ret); 1651 prevent_tail_call(ret);
diff --git a/kernel/fork.c b/kernel/fork.c
index b2ef8e4fad70..4363a4eb84e3 100644
--- a/kernel/fork.c
+++ b/kernel/fork.c
@@ -390,7 +390,7 @@ struct mm_struct * mm_alloc(void)
390 * is dropped: either by a lazy thread or by 390 * is dropped: either by a lazy thread or by
391 * mmput. Free the page directory and the mm. 391 * mmput. Free the page directory and the mm.
392 */ 392 */
393void fastcall __mmdrop(struct mm_struct *mm) 393void __mmdrop(struct mm_struct *mm)
394{ 394{
395 BUG_ON(mm == &init_mm); 395 BUG_ON(mm == &init_mm);
396 mm_free_pgd(mm); 396 mm_free_pgd(mm);
@@ -909,7 +909,6 @@ static int copy_signal(unsigned long clone_flags, struct task_struct *tsk)
909 hrtimer_init(&sig->real_timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL); 909 hrtimer_init(&sig->real_timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL);
910 sig->it_real_incr.tv64 = 0; 910 sig->it_real_incr.tv64 = 0;
911 sig->real_timer.function = it_real_fn; 911 sig->real_timer.function = it_real_fn;
912 sig->tsk = tsk;
913 912
914 sig->it_virt_expires = cputime_zero; 913 sig->it_virt_expires = cputime_zero;
915 sig->it_virt_incr = cputime_zero; 914 sig->it_virt_incr = cputime_zero;
@@ -1338,6 +1337,7 @@ static struct task_struct *copy_process(unsigned long clone_flags,
1338 if (clone_flags & CLONE_NEWPID) 1337 if (clone_flags & CLONE_NEWPID)
1339 p->nsproxy->pid_ns->child_reaper = p; 1338 p->nsproxy->pid_ns->child_reaper = p;
1340 1339
1340 p->signal->leader_pid = pid;
1341 p->signal->tty = current->signal->tty; 1341 p->signal->tty = current->signal->tty;
1342 set_task_pgrp(p, task_pgrp_nr(current)); 1342 set_task_pgrp(p, task_pgrp_nr(current));
1343 set_task_session(p, task_session_nr(current)); 1343 set_task_session(p, task_session_nr(current));
@@ -1488,13 +1488,7 @@ long do_fork(unsigned long clone_flags,
1488 if (!IS_ERR(p)) { 1488 if (!IS_ERR(p)) {
1489 struct completion vfork; 1489 struct completion vfork;
1490 1490
1491 /* 1491 nr = task_pid_vnr(p);
1492 * this is enough to call pid_nr_ns here, but this if
1493 * improves optimisation of regular fork()
1494 */
1495 nr = (clone_flags & CLONE_NEWPID) ?
1496 task_pid_nr_ns(p, current->nsproxy->pid_ns) :
1497 task_pid_vnr(p);
1498 1492
1499 if (clone_flags & CLONE_PARENT_SETTID) 1493 if (clone_flags & CLONE_PARENT_SETTID)
1500 put_user(nr, parent_tidptr); 1494 put_user(nr, parent_tidptr);
diff --git a/kernel/irq/chip.c b/kernel/irq/chip.c
index 44019ce30a14..cc54c6276356 100644
--- a/kernel/irq/chip.c
+++ b/kernel/irq/chip.c
@@ -286,7 +286,7 @@ static inline void mask_ack_irq(struct irq_desc *desc, int irq)
286 * Note: The caller is expected to handle the ack, clear, mask and 286 * Note: The caller is expected to handle the ack, clear, mask and
287 * unmask issues if necessary. 287 * unmask issues if necessary.
288 */ 288 */
289void fastcall 289void
290handle_simple_irq(unsigned int irq, struct irq_desc *desc) 290handle_simple_irq(unsigned int irq, struct irq_desc *desc)
291{ 291{
292 struct irqaction *action; 292 struct irqaction *action;
@@ -327,7 +327,7 @@ out_unlock:
327 * it after the associated handler has acknowledged the device, so the 327 * it after the associated handler has acknowledged the device, so the
328 * interrupt line is back to inactive. 328 * interrupt line is back to inactive.
329 */ 329 */
330void fastcall 330void
331handle_level_irq(unsigned int irq, struct irq_desc *desc) 331handle_level_irq(unsigned int irq, struct irq_desc *desc)
332{ 332{
333 unsigned int cpu = smp_processor_id(); 333 unsigned int cpu = smp_processor_id();
@@ -375,7 +375,7 @@ out_unlock:
375 * for modern forms of interrupt handlers, which handle the flow 375 * for modern forms of interrupt handlers, which handle the flow
376 * details in hardware, transparently. 376 * details in hardware, transparently.
377 */ 377 */
378void fastcall 378void
379handle_fasteoi_irq(unsigned int irq, struct irq_desc *desc) 379handle_fasteoi_irq(unsigned int irq, struct irq_desc *desc)
380{ 380{
381 unsigned int cpu = smp_processor_id(); 381 unsigned int cpu = smp_processor_id();
@@ -434,7 +434,7 @@ out:
434 * the handler was running. If all pending interrupts are handled, the 434 * the handler was running. If all pending interrupts are handled, the
435 * loop is left. 435 * loop is left.
436 */ 436 */
437void fastcall 437void
438handle_edge_irq(unsigned int irq, struct irq_desc *desc) 438handle_edge_irq(unsigned int irq, struct irq_desc *desc)
439{ 439{
440 const unsigned int cpu = smp_processor_id(); 440 const unsigned int cpu = smp_processor_id();
@@ -505,7 +505,7 @@ out_unlock:
505 * 505 *
506 * Per CPU interrupts on SMP machines without locking requirements 506 * Per CPU interrupts on SMP machines without locking requirements
507 */ 507 */
508void fastcall 508void
509handle_percpu_irq(unsigned int irq, struct irq_desc *desc) 509handle_percpu_irq(unsigned int irq, struct irq_desc *desc)
510{ 510{
511 irqreturn_t action_ret; 511 irqreturn_t action_ret;
@@ -589,3 +589,39 @@ set_irq_chip_and_handler_name(unsigned int irq, struct irq_chip *chip,
589 set_irq_chip(irq, chip); 589 set_irq_chip(irq, chip);
590 __set_irq_handler(irq, handle, 0, name); 590 __set_irq_handler(irq, handle, 0, name);
591} 591}
592
593void __init set_irq_noprobe(unsigned int irq)
594{
595 struct irq_desc *desc;
596 unsigned long flags;
597
598 if (irq >= NR_IRQS) {
599 printk(KERN_ERR "Trying to mark IRQ%d non-probeable\n", irq);
600
601 return;
602 }
603
604 desc = irq_desc + irq;
605
606 spin_lock_irqsave(&desc->lock, flags);
607 desc->status |= IRQ_NOPROBE;
608 spin_unlock_irqrestore(&desc->lock, flags);
609}
610
611void __init set_irq_probe(unsigned int irq)
612{
613 struct irq_desc *desc;
614 unsigned long flags;
615
616 if (irq >= NR_IRQS) {
617 printk(KERN_ERR "Trying to mark IRQ%d probeable\n", irq);
618
619 return;
620 }
621
622 desc = irq_desc + irq;
623
624 spin_lock_irqsave(&desc->lock, flags);
625 desc->status &= ~IRQ_NOPROBE;
626 spin_unlock_irqrestore(&desc->lock, flags);
627}
diff --git a/kernel/irq/handle.c b/kernel/irq/handle.c
index dc335ad27525..5fa6198e9139 100644
--- a/kernel/irq/handle.c
+++ b/kernel/irq/handle.c
@@ -25,7 +25,7 @@
25 * 25 *
26 * Handles spurious and unhandled IRQ's. It also prints a debugmessage. 26 * Handles spurious and unhandled IRQ's. It also prints a debugmessage.
27 */ 27 */
28void fastcall 28void
29handle_bad_irq(unsigned int irq, struct irq_desc *desc) 29handle_bad_irq(unsigned int irq, struct irq_desc *desc)
30{ 30{
31 print_irq_desc(irq, desc); 31 print_irq_desc(irq, desc);
@@ -163,7 +163,7 @@ irqreturn_t handle_IRQ_event(unsigned int irq, struct irqaction *action)
163 * This is the original x86 implementation which is used for every 163 * This is the original x86 implementation which is used for every
164 * interrupt type. 164 * interrupt type.
165 */ 165 */
166fastcall unsigned int __do_IRQ(unsigned int irq) 166unsigned int __do_IRQ(unsigned int irq)
167{ 167{
168 struct irq_desc *desc = irq_desc + irq; 168 struct irq_desc *desc = irq_desc + irq;
169 struct irqaction *action; 169 struct irqaction *action;
diff --git a/kernel/itimer.c b/kernel/itimer.c
index 2fab344dbf56..ab982747d9bd 100644
--- a/kernel/itimer.c
+++ b/kernel/itimer.c
@@ -132,7 +132,7 @@ enum hrtimer_restart it_real_fn(struct hrtimer *timer)
132 struct signal_struct *sig = 132 struct signal_struct *sig =
133 container_of(timer, struct signal_struct, real_timer); 133 container_of(timer, struct signal_struct, real_timer);
134 134
135 send_group_sig_info(SIGALRM, SEND_SIG_PRIV, sig->tsk); 135 kill_pid_info(SIGALRM, SEND_SIG_PRIV, sig->leader_pid);
136 136
137 return HRTIMER_NORESTART; 137 return HRTIMER_NORESTART;
138} 138}
diff --git a/kernel/module.c b/kernel/module.c
index bd60278ee703..4202da97a1da 100644
--- a/kernel/module.c
+++ b/kernel/module.c
@@ -46,6 +46,7 @@
46#include <asm/semaphore.h> 46#include <asm/semaphore.h>
47#include <asm/cacheflush.h> 47#include <asm/cacheflush.h>
48#include <linux/license.h> 48#include <linux/license.h>
49#include <asm/sections.h>
49 50
50#if 0 51#if 0
51#define DEBUGP printk 52#define DEBUGP printk
@@ -290,7 +291,7 @@ static unsigned long __find_symbol(const char *name,
290 } 291 }
291 } 292 }
292 DEBUGP("Failed to find symbol %s\n", name); 293 DEBUGP("Failed to find symbol %s\n", name);
293 return 0; 294 return -ENOENT;
294} 295}
295 296
296/* Search for module by name: must hold module_mutex. */ 297/* Search for module by name: must hold module_mutex. */
@@ -343,9 +344,6 @@ static inline unsigned int block_size(int val)
343 return val; 344 return val;
344} 345}
345 346
346/* Created by linker magic */
347extern char __per_cpu_start[], __per_cpu_end[];
348
349static void *percpu_modalloc(unsigned long size, unsigned long align, 347static void *percpu_modalloc(unsigned long size, unsigned long align,
350 const char *name) 348 const char *name)
351{ 349{
@@ -783,7 +781,7 @@ void __symbol_put(const char *symbol)
783 const unsigned long *crc; 781 const unsigned long *crc;
784 782
785 preempt_disable(); 783 preempt_disable();
786 if (!__find_symbol(symbol, &owner, &crc, 1)) 784 if (IS_ERR_VALUE(__find_symbol(symbol, &owner, &crc, 1)))
787 BUG(); 785 BUG();
788 module_put(owner); 786 module_put(owner);
789 preempt_enable(); 787 preempt_enable();
@@ -929,7 +927,8 @@ static inline int check_modstruct_version(Elf_Shdr *sechdrs,
929 const unsigned long *crc; 927 const unsigned long *crc;
930 struct module *owner; 928 struct module *owner;
931 929
932 if (!__find_symbol("struct_module", &owner, &crc, 1)) 930 if (IS_ERR_VALUE(__find_symbol("struct_module",
931 &owner, &crc, 1)))
933 BUG(); 932 BUG();
934 return check_version(sechdrs, versindex, "struct_module", mod, 933 return check_version(sechdrs, versindex, "struct_module", mod,
935 crc); 934 crc);
@@ -978,12 +977,12 @@ static unsigned long resolve_symbol(Elf_Shdr *sechdrs,
978 977
979 ret = __find_symbol(name, &owner, &crc, 978 ret = __find_symbol(name, &owner, &crc,
980 !(mod->taints & TAINT_PROPRIETARY_MODULE)); 979 !(mod->taints & TAINT_PROPRIETARY_MODULE));
981 if (ret) { 980 if (!IS_ERR_VALUE(ret)) {
982 /* use_module can fail due to OOM, 981 /* use_module can fail due to OOM,
983 or module initialization or unloading */ 982 or module initialization or unloading */
984 if (!check_version(sechdrs, versindex, name, mod, crc) || 983 if (!check_version(sechdrs, versindex, name, mod, crc) ||
985 !use_module(mod, owner)) 984 !use_module(mod, owner))
986 ret = 0; 985 ret = -EINVAL;
987 } 986 }
988 return ret; 987 return ret;
989} 988}
@@ -1371,7 +1370,9 @@ void *__symbol_get(const char *symbol)
1371 1370
1372 preempt_disable(); 1371 preempt_disable();
1373 value = __find_symbol(symbol, &owner, &crc, 1); 1372 value = __find_symbol(symbol, &owner, &crc, 1);
1374 if (value && strong_try_module_get(owner) != 0) 1373 if (IS_ERR_VALUE(value))
1374 value = 0;
1375 else if (strong_try_module_get(owner))
1375 value = 0; 1376 value = 0;
1376 preempt_enable(); 1377 preempt_enable();
1377 1378
@@ -1391,14 +1392,16 @@ static int verify_export_symbols(struct module *mod)
1391 const unsigned long *crc; 1392 const unsigned long *crc;
1392 1393
1393 for (i = 0; i < mod->num_syms; i++) 1394 for (i = 0; i < mod->num_syms; i++)
1394 if (__find_symbol(mod->syms[i].name, &owner, &crc, 1)) { 1395 if (!IS_ERR_VALUE(__find_symbol(mod->syms[i].name,
1396 &owner, &crc, 1))) {
1395 name = mod->syms[i].name; 1397 name = mod->syms[i].name;
1396 ret = -ENOEXEC; 1398 ret = -ENOEXEC;
1397 goto dup; 1399 goto dup;
1398 } 1400 }
1399 1401
1400 for (i = 0; i < mod->num_gpl_syms; i++) 1402 for (i = 0; i < mod->num_gpl_syms; i++)
1401 if (__find_symbol(mod->gpl_syms[i].name, &owner, &crc, 1)) { 1403 if (!IS_ERR_VALUE(__find_symbol(mod->gpl_syms[i].name,
1404 &owner, &crc, 1))) {
1402 name = mod->gpl_syms[i].name; 1405 name = mod->gpl_syms[i].name;
1403 ret = -ENOEXEC; 1406 ret = -ENOEXEC;
1404 goto dup; 1407 goto dup;
@@ -1448,7 +1451,7 @@ static int simplify_symbols(Elf_Shdr *sechdrs,
1448 strtab + sym[i].st_name, mod); 1451 strtab + sym[i].st_name, mod);
1449 1452
1450 /* Ok if resolved. */ 1453 /* Ok if resolved. */
1451 if (sym[i].st_value != 0) 1454 if (!IS_ERR_VALUE(sym[i].st_value))
1452 break; 1455 break;
1453 /* Ok if weak. */ 1456 /* Ok if weak. */
1454 if (ELF_ST_BIND(sym[i].st_info) == STB_WEAK) 1457 if (ELF_ST_BIND(sym[i].st_info) == STB_WEAK)
@@ -2250,7 +2253,7 @@ static const char *get_ksymbol(struct module *mod,
2250 2253
2251/* For kallsyms to ask for address resolution. NULL means not found. Careful 2254/* For kallsyms to ask for address resolution. NULL means not found. Careful
2252 * not to lock to avoid deadlock on oopses, simply disable preemption. */ 2255 * not to lock to avoid deadlock on oopses, simply disable preemption. */
2253char *module_address_lookup(unsigned long addr, 2256const char *module_address_lookup(unsigned long addr,
2254 unsigned long *size, 2257 unsigned long *size,
2255 unsigned long *offset, 2258 unsigned long *offset,
2256 char **modname, 2259 char **modname,
@@ -2275,7 +2278,7 @@ char *module_address_lookup(unsigned long addr,
2275 ret = namebuf; 2278 ret = namebuf;
2276 } 2279 }
2277 preempt_enable(); 2280 preempt_enable();
2278 return (char *)ret; 2281 return ret;
2279} 2282}
2280 2283
2281int lookup_module_symbol_name(unsigned long addr, char *symname) 2284int lookup_module_symbol_name(unsigned long addr, char *symname)
diff --git a/kernel/mutex-debug.c b/kernel/mutex-debug.c
index d17436cdea1b..3aaa06c561de 100644
--- a/kernel/mutex-debug.c
+++ b/kernel/mutex-debug.c
@@ -107,7 +107,7 @@ void debug_mutex_init(struct mutex *lock, const char *name,
107 * use of the mutex is forbidden. The mutex must not be locked when 107 * use of the mutex is forbidden. The mutex must not be locked when
108 * this function is called. 108 * this function is called.
109 */ 109 */
110void fastcall mutex_destroy(struct mutex *lock) 110void mutex_destroy(struct mutex *lock)
111{ 111{
112 DEBUG_LOCKS_WARN_ON(mutex_is_locked(lock)); 112 DEBUG_LOCKS_WARN_ON(mutex_is_locked(lock));
113 lock->magic = NULL; 113 lock->magic = NULL;
diff --git a/kernel/mutex.c b/kernel/mutex.c
index d9ec9b666250..d046a345d365 100644
--- a/kernel/mutex.c
+++ b/kernel/mutex.c
@@ -58,7 +58,7 @@ EXPORT_SYMBOL(__mutex_init);
58 * We also put the fastpath first in the kernel image, to make sure the 58 * We also put the fastpath first in the kernel image, to make sure the
59 * branch is predicted by the CPU as default-untaken. 59 * branch is predicted by the CPU as default-untaken.
60 */ 60 */
61static void fastcall noinline __sched 61static void noinline __sched
62__mutex_lock_slowpath(atomic_t *lock_count); 62__mutex_lock_slowpath(atomic_t *lock_count);
63 63
64/*** 64/***
@@ -82,7 +82,7 @@ __mutex_lock_slowpath(atomic_t *lock_count);
82 * 82 *
83 * This function is similar to (but not equivalent to) down(). 83 * This function is similar to (but not equivalent to) down().
84 */ 84 */
85void inline fastcall __sched mutex_lock(struct mutex *lock) 85void inline __sched mutex_lock(struct mutex *lock)
86{ 86{
87 might_sleep(); 87 might_sleep();
88 /* 88 /*
@@ -95,8 +95,7 @@ void inline fastcall __sched mutex_lock(struct mutex *lock)
95EXPORT_SYMBOL(mutex_lock); 95EXPORT_SYMBOL(mutex_lock);
96#endif 96#endif
97 97
98static void fastcall noinline __sched 98static noinline void __sched __mutex_unlock_slowpath(atomic_t *lock_count);
99__mutex_unlock_slowpath(atomic_t *lock_count);
100 99
101/*** 100/***
102 * mutex_unlock - release the mutex 101 * mutex_unlock - release the mutex
@@ -109,7 +108,7 @@ __mutex_unlock_slowpath(atomic_t *lock_count);
109 * 108 *
110 * This function is similar to (but not equivalent to) up(). 109 * This function is similar to (but not equivalent to) up().
111 */ 110 */
112void fastcall __sched mutex_unlock(struct mutex *lock) 111void __sched mutex_unlock(struct mutex *lock)
113{ 112{
114 /* 113 /*
115 * The unlocking fastpath is the 0->1 transition from 'locked' 114 * The unlocking fastpath is the 0->1 transition from 'locked'
@@ -234,7 +233,7 @@ EXPORT_SYMBOL_GPL(mutex_lock_interruptible_nested);
234/* 233/*
235 * Release the lock, slowpath: 234 * Release the lock, slowpath:
236 */ 235 */
237static fastcall inline void 236static inline void
238__mutex_unlock_common_slowpath(atomic_t *lock_count, int nested) 237__mutex_unlock_common_slowpath(atomic_t *lock_count, int nested)
239{ 238{
240 struct mutex *lock = container_of(lock_count, struct mutex, count); 239 struct mutex *lock = container_of(lock_count, struct mutex, count);
@@ -271,7 +270,7 @@ __mutex_unlock_common_slowpath(atomic_t *lock_count, int nested)
271/* 270/*
272 * Release the lock, slowpath: 271 * Release the lock, slowpath:
273 */ 272 */
274static fastcall noinline void 273static noinline void
275__mutex_unlock_slowpath(atomic_t *lock_count) 274__mutex_unlock_slowpath(atomic_t *lock_count)
276{ 275{
277 __mutex_unlock_common_slowpath(lock_count, 1); 276 __mutex_unlock_common_slowpath(lock_count, 1);
@@ -282,10 +281,10 @@ __mutex_unlock_slowpath(atomic_t *lock_count)
282 * Here come the less common (and hence less performance-critical) APIs: 281 * Here come the less common (and hence less performance-critical) APIs:
283 * mutex_lock_interruptible() and mutex_trylock(). 282 * mutex_lock_interruptible() and mutex_trylock().
284 */ 283 */
285static int fastcall noinline __sched 284static noinline int __sched
286__mutex_lock_killable_slowpath(atomic_t *lock_count); 285__mutex_lock_killable_slowpath(atomic_t *lock_count);
287 286
288static noinline int fastcall __sched 287static noinline int __sched
289__mutex_lock_interruptible_slowpath(atomic_t *lock_count); 288__mutex_lock_interruptible_slowpath(atomic_t *lock_count);
290 289
291/*** 290/***
@@ -299,7 +298,7 @@ __mutex_lock_interruptible_slowpath(atomic_t *lock_count);
299 * 298 *
300 * This function is similar to (but not equivalent to) down_interruptible(). 299 * This function is similar to (but not equivalent to) down_interruptible().
301 */ 300 */
302int fastcall __sched mutex_lock_interruptible(struct mutex *lock) 301int __sched mutex_lock_interruptible(struct mutex *lock)
303{ 302{
304 might_sleep(); 303 might_sleep();
305 return __mutex_fastpath_lock_retval 304 return __mutex_fastpath_lock_retval
@@ -308,7 +307,7 @@ int fastcall __sched mutex_lock_interruptible(struct mutex *lock)
308 307
309EXPORT_SYMBOL(mutex_lock_interruptible); 308EXPORT_SYMBOL(mutex_lock_interruptible);
310 309
311int fastcall __sched mutex_lock_killable(struct mutex *lock) 310int __sched mutex_lock_killable(struct mutex *lock)
312{ 311{
313 might_sleep(); 312 might_sleep();
314 return __mutex_fastpath_lock_retval 313 return __mutex_fastpath_lock_retval
@@ -316,7 +315,7 @@ int fastcall __sched mutex_lock_killable(struct mutex *lock)
316} 315}
317EXPORT_SYMBOL(mutex_lock_killable); 316EXPORT_SYMBOL(mutex_lock_killable);
318 317
319static void fastcall noinline __sched 318static noinline void __sched
320__mutex_lock_slowpath(atomic_t *lock_count) 319__mutex_lock_slowpath(atomic_t *lock_count)
321{ 320{
322 struct mutex *lock = container_of(lock_count, struct mutex, count); 321 struct mutex *lock = container_of(lock_count, struct mutex, count);
@@ -324,7 +323,7 @@ __mutex_lock_slowpath(atomic_t *lock_count)
324 __mutex_lock_common(lock, TASK_UNINTERRUPTIBLE, 0, _RET_IP_); 323 __mutex_lock_common(lock, TASK_UNINTERRUPTIBLE, 0, _RET_IP_);
325} 324}
326 325
327static int fastcall noinline __sched 326static noinline int __sched
328__mutex_lock_killable_slowpath(atomic_t *lock_count) 327__mutex_lock_killable_slowpath(atomic_t *lock_count)
329{ 328{
330 struct mutex *lock = container_of(lock_count, struct mutex, count); 329 struct mutex *lock = container_of(lock_count, struct mutex, count);
@@ -332,7 +331,7 @@ __mutex_lock_killable_slowpath(atomic_t *lock_count)
332 return __mutex_lock_common(lock, TASK_KILLABLE, 0, _RET_IP_); 331 return __mutex_lock_common(lock, TASK_KILLABLE, 0, _RET_IP_);
333} 332}
334 333
335static noinline int fastcall __sched 334static noinline int __sched
336__mutex_lock_interruptible_slowpath(atomic_t *lock_count) 335__mutex_lock_interruptible_slowpath(atomic_t *lock_count)
337{ 336{
338 struct mutex *lock = container_of(lock_count, struct mutex, count); 337 struct mutex *lock = container_of(lock_count, struct mutex, count);
@@ -381,7 +380,7 @@ static inline int __mutex_trylock_slowpath(atomic_t *lock_count)
381 * This function must not be used in interrupt context. The 380 * This function must not be used in interrupt context. The
382 * mutex must be released by the same task that acquired it. 381 * mutex must be released by the same task that acquired it.
383 */ 382 */
384int fastcall __sched mutex_trylock(struct mutex *lock) 383int __sched mutex_trylock(struct mutex *lock)
385{ 384{
386 return __mutex_fastpath_trylock(&lock->count, 385 return __mutex_fastpath_trylock(&lock->count,
387 __mutex_trylock_slowpath); 386 __mutex_trylock_slowpath);
diff --git a/kernel/nsproxy.c b/kernel/nsproxy.c
index 79f871bc0ef4..f5d332cf8c63 100644
--- a/kernel/nsproxy.c
+++ b/kernel/nsproxy.c
@@ -21,6 +21,7 @@
21#include <linux/utsname.h> 21#include <linux/utsname.h>
22#include <linux/pid_namespace.h> 22#include <linux/pid_namespace.h>
23#include <net/net_namespace.h> 23#include <net/net_namespace.h>
24#include <linux/ipc_namespace.h>
24 25
25static struct kmem_cache *nsproxy_cachep; 26static struct kmem_cache *nsproxy_cachep;
26 27
diff --git a/kernel/params.c b/kernel/params.c
index e28c70628bb7..afc46a23eb6d 100644
--- a/kernel/params.c
+++ b/kernel/params.c
@@ -180,12 +180,12 @@ int parse_args(const char *name,
180#define STANDARD_PARAM_DEF(name, type, format, tmptype, strtolfn) \ 180#define STANDARD_PARAM_DEF(name, type, format, tmptype, strtolfn) \
181 int param_set_##name(const char *val, struct kernel_param *kp) \ 181 int param_set_##name(const char *val, struct kernel_param *kp) \
182 { \ 182 { \
183 char *endp; \
184 tmptype l; \ 183 tmptype l; \
184 int ret; \
185 \ 185 \
186 if (!val) return -EINVAL; \ 186 if (!val) return -EINVAL; \
187 l = strtolfn(val, &endp, 0); \ 187 ret = strtolfn(val, 0, &l); \
188 if (endp == val || ((type)l != l)) \ 188 if (ret == -EINVAL || ((type)l != l)) \
189 return -EINVAL; \ 189 return -EINVAL; \
190 *((type *)kp->arg) = l; \ 190 *((type *)kp->arg) = l; \
191 return 0; \ 191 return 0; \
@@ -195,13 +195,13 @@ int parse_args(const char *name,
195 return sprintf(buffer, format, *((type *)kp->arg)); \ 195 return sprintf(buffer, format, *((type *)kp->arg)); \
196 } 196 }
197 197
198STANDARD_PARAM_DEF(byte, unsigned char, "%c", unsigned long, simple_strtoul); 198STANDARD_PARAM_DEF(byte, unsigned char, "%c", unsigned long, strict_strtoul);
199STANDARD_PARAM_DEF(short, short, "%hi", long, simple_strtol); 199STANDARD_PARAM_DEF(short, short, "%hi", long, strict_strtol);
200STANDARD_PARAM_DEF(ushort, unsigned short, "%hu", unsigned long, simple_strtoul); 200STANDARD_PARAM_DEF(ushort, unsigned short, "%hu", unsigned long, strict_strtoul);
201STANDARD_PARAM_DEF(int, int, "%i", long, simple_strtol); 201STANDARD_PARAM_DEF(int, int, "%i", long, strict_strtol);
202STANDARD_PARAM_DEF(uint, unsigned int, "%u", unsigned long, simple_strtoul); 202STANDARD_PARAM_DEF(uint, unsigned int, "%u", unsigned long, strict_strtoul);
203STANDARD_PARAM_DEF(long, long, "%li", long, simple_strtol); 203STANDARD_PARAM_DEF(long, long, "%li", long, strict_strtol);
204STANDARD_PARAM_DEF(ulong, unsigned long, "%lu", unsigned long, simple_strtoul); 204STANDARD_PARAM_DEF(ulong, unsigned long, "%lu", unsigned long, strict_strtoul);
205 205
206int param_set_charp(const char *val, struct kernel_param *kp) 206int param_set_charp(const char *val, struct kernel_param *kp)
207{ 207{
diff --git a/kernel/pid.c b/kernel/pid.c
index 3b30bccdfcdc..477691576b33 100644
--- a/kernel/pid.c
+++ b/kernel/pid.c
@@ -41,7 +41,6 @@
41static struct hlist_head *pid_hash; 41static struct hlist_head *pid_hash;
42static int pidhash_shift; 42static int pidhash_shift;
43struct pid init_struct_pid = INIT_STRUCT_PID; 43struct pid init_struct_pid = INIT_STRUCT_PID;
44static struct kmem_cache *pid_ns_cachep;
45 44
46int pid_max = PID_MAX_DEFAULT; 45int pid_max = PID_MAX_DEFAULT;
47 46
@@ -112,7 +111,7 @@ EXPORT_SYMBOL(is_container_init);
112 111
113static __cacheline_aligned_in_smp DEFINE_SPINLOCK(pidmap_lock); 112static __cacheline_aligned_in_smp DEFINE_SPINLOCK(pidmap_lock);
114 113
115static fastcall void free_pidmap(struct pid_namespace *pid_ns, int pid) 114static void free_pidmap(struct pid_namespace *pid_ns, int pid)
116{ 115{
117 struct pidmap *map = pid_ns->pidmap + pid / BITS_PER_PAGE; 116 struct pidmap *map = pid_ns->pidmap + pid / BITS_PER_PAGE;
118 int offset = pid & BITS_PER_PAGE_MASK; 117 int offset = pid & BITS_PER_PAGE_MASK;
@@ -181,7 +180,7 @@ static int alloc_pidmap(struct pid_namespace *pid_ns)
181 return -1; 180 return -1;
182} 181}
183 182
184static int next_pidmap(struct pid_namespace *pid_ns, int last) 183int next_pidmap(struct pid_namespace *pid_ns, int last)
185{ 184{
186 int offset; 185 int offset;
187 struct pidmap *map, *end; 186 struct pidmap *map, *end;
@@ -199,7 +198,7 @@ static int next_pidmap(struct pid_namespace *pid_ns, int last)
199 return -1; 198 return -1;
200} 199}
201 200
202fastcall void put_pid(struct pid *pid) 201void put_pid(struct pid *pid)
203{ 202{
204 struct pid_namespace *ns; 203 struct pid_namespace *ns;
205 204
@@ -221,7 +220,7 @@ static void delayed_put_pid(struct rcu_head *rhp)
221 put_pid(pid); 220 put_pid(pid);
222} 221}
223 222
224fastcall void free_pid(struct pid *pid) 223void free_pid(struct pid *pid)
225{ 224{
226 /* We can be called with write_lock_irq(&tasklist_lock) held */ 225 /* We can be called with write_lock_irq(&tasklist_lock) held */
227 int i; 226 int i;
@@ -287,7 +286,7 @@ out_free:
287 goto out; 286 goto out;
288} 287}
289 288
290struct pid * fastcall find_pid_ns(int nr, struct pid_namespace *ns) 289struct pid *find_pid_ns(int nr, struct pid_namespace *ns)
291{ 290{
292 struct hlist_node *elem; 291 struct hlist_node *elem;
293 struct upid *pnr; 292 struct upid *pnr;
@@ -317,7 +316,7 @@ EXPORT_SYMBOL_GPL(find_pid);
317/* 316/*
318 * attach_pid() must be called with the tasklist_lock write-held. 317 * attach_pid() must be called with the tasklist_lock write-held.
319 */ 318 */
320int fastcall attach_pid(struct task_struct *task, enum pid_type type, 319int attach_pid(struct task_struct *task, enum pid_type type,
321 struct pid *pid) 320 struct pid *pid)
322{ 321{
323 struct pid_link *link; 322 struct pid_link *link;
@@ -329,7 +328,7 @@ int fastcall attach_pid(struct task_struct *task, enum pid_type type,
329 return 0; 328 return 0;
330} 329}
331 330
332void fastcall detach_pid(struct task_struct *task, enum pid_type type) 331void detach_pid(struct task_struct *task, enum pid_type type)
333{ 332{
334 struct pid_link *link; 333 struct pid_link *link;
335 struct pid *pid; 334 struct pid *pid;
@@ -349,7 +348,7 @@ void fastcall detach_pid(struct task_struct *task, enum pid_type type)
349} 348}
350 349
351/* transfer_pid is an optimization of attach_pid(new), detach_pid(old) */ 350/* transfer_pid is an optimization of attach_pid(new), detach_pid(old) */
352void fastcall transfer_pid(struct task_struct *old, struct task_struct *new, 351void transfer_pid(struct task_struct *old, struct task_struct *new,
353 enum pid_type type) 352 enum pid_type type)
354{ 353{
355 new->pids[type].pid = old->pids[type].pid; 354 new->pids[type].pid = old->pids[type].pid;
@@ -357,7 +356,7 @@ void fastcall transfer_pid(struct task_struct *old, struct task_struct *new,
357 old->pids[type].pid = NULL; 356 old->pids[type].pid = NULL;
358} 357}
359 358
360struct task_struct * fastcall pid_task(struct pid *pid, enum pid_type type) 359struct task_struct *pid_task(struct pid *pid, enum pid_type type)
361{ 360{
362 struct task_struct *result = NULL; 361 struct task_struct *result = NULL;
363 if (pid) { 362 if (pid) {
@@ -409,7 +408,7 @@ struct pid *get_task_pid(struct task_struct *task, enum pid_type type)
409 return pid; 408 return pid;
410} 409}
411 410
412struct task_struct *fastcall get_pid_task(struct pid *pid, enum pid_type type) 411struct task_struct *get_pid_task(struct pid *pid, enum pid_type type)
413{ 412{
414 struct task_struct *result; 413 struct task_struct *result;
415 rcu_read_lock(); 414 rcu_read_lock();
@@ -444,6 +443,12 @@ pid_t pid_nr_ns(struct pid *pid, struct pid_namespace *ns)
444 return nr; 443 return nr;
445} 444}
446 445
446pid_t pid_vnr(struct pid *pid)
447{
448 return pid_nr_ns(pid, current->nsproxy->pid_ns);
449}
450EXPORT_SYMBOL_GPL(pid_vnr);
451
447pid_t task_pid_nr_ns(struct task_struct *tsk, struct pid_namespace *ns) 452pid_t task_pid_nr_ns(struct task_struct *tsk, struct pid_namespace *ns)
448{ 453{
449 return pid_nr_ns(task_pid(tsk), ns); 454 return pid_nr_ns(task_pid(tsk), ns);
@@ -488,180 +493,6 @@ struct pid *find_ge_pid(int nr, struct pid_namespace *ns)
488} 493}
489EXPORT_SYMBOL_GPL(find_get_pid); 494EXPORT_SYMBOL_GPL(find_get_pid);
490 495
491struct pid_cache {
492 int nr_ids;
493 char name[16];
494 struct kmem_cache *cachep;
495 struct list_head list;
496};
497
498static LIST_HEAD(pid_caches_lh);
499static DEFINE_MUTEX(pid_caches_mutex);
500
501/*
502 * creates the kmem cache to allocate pids from.
503 * @nr_ids: the number of numerical ids this pid will have to carry
504 */
505
506static struct kmem_cache *create_pid_cachep(int nr_ids)
507{
508 struct pid_cache *pcache;
509 struct kmem_cache *cachep;
510
511 mutex_lock(&pid_caches_mutex);
512 list_for_each_entry (pcache, &pid_caches_lh, list)
513 if (pcache->nr_ids == nr_ids)
514 goto out;
515
516 pcache = kmalloc(sizeof(struct pid_cache), GFP_KERNEL);
517 if (pcache == NULL)
518 goto err_alloc;
519
520 snprintf(pcache->name, sizeof(pcache->name), "pid_%d", nr_ids);
521 cachep = kmem_cache_create(pcache->name,
522 sizeof(struct pid) + (nr_ids - 1) * sizeof(struct upid),
523 0, SLAB_HWCACHE_ALIGN, NULL);
524 if (cachep == NULL)
525 goto err_cachep;
526
527 pcache->nr_ids = nr_ids;
528 pcache->cachep = cachep;
529 list_add(&pcache->list, &pid_caches_lh);
530out:
531 mutex_unlock(&pid_caches_mutex);
532 return pcache->cachep;
533
534err_cachep:
535 kfree(pcache);
536err_alloc:
537 mutex_unlock(&pid_caches_mutex);
538 return NULL;
539}
540
541#ifdef CONFIG_PID_NS
542static struct pid_namespace *create_pid_namespace(int level)
543{
544 struct pid_namespace *ns;
545 int i;
546
547 ns = kmem_cache_alloc(pid_ns_cachep, GFP_KERNEL);
548 if (ns == NULL)
549 goto out;
550
551 ns->pidmap[0].page = kzalloc(PAGE_SIZE, GFP_KERNEL);
552 if (!ns->pidmap[0].page)
553 goto out_free;
554
555 ns->pid_cachep = create_pid_cachep(level + 1);
556 if (ns->pid_cachep == NULL)
557 goto out_free_map;
558
559 kref_init(&ns->kref);
560 ns->last_pid = 0;
561 ns->child_reaper = NULL;
562 ns->level = level;
563
564 set_bit(0, ns->pidmap[0].page);
565 atomic_set(&ns->pidmap[0].nr_free, BITS_PER_PAGE - 1);
566
567 for (i = 1; i < PIDMAP_ENTRIES; i++) {
568 ns->pidmap[i].page = 0;
569 atomic_set(&ns->pidmap[i].nr_free, BITS_PER_PAGE);
570 }
571
572 return ns;
573
574out_free_map:
575 kfree(ns->pidmap[0].page);
576out_free:
577 kmem_cache_free(pid_ns_cachep, ns);
578out:
579 return ERR_PTR(-ENOMEM);
580}
581
582static void destroy_pid_namespace(struct pid_namespace *ns)
583{
584 int i;
585
586 for (i = 0; i < PIDMAP_ENTRIES; i++)
587 kfree(ns->pidmap[i].page);
588 kmem_cache_free(pid_ns_cachep, ns);
589}
590
591struct pid_namespace *copy_pid_ns(unsigned long flags, struct pid_namespace *old_ns)
592{
593 struct pid_namespace *new_ns;
594
595 BUG_ON(!old_ns);
596 new_ns = get_pid_ns(old_ns);
597 if (!(flags & CLONE_NEWPID))
598 goto out;
599
600 new_ns = ERR_PTR(-EINVAL);
601 if (flags & CLONE_THREAD)
602 goto out_put;
603
604 new_ns = create_pid_namespace(old_ns->level + 1);
605 if (!IS_ERR(new_ns))
606 new_ns->parent = get_pid_ns(old_ns);
607
608out_put:
609 put_pid_ns(old_ns);
610out:
611 return new_ns;
612}
613
614void free_pid_ns(struct kref *kref)
615{
616 struct pid_namespace *ns, *parent;
617
618 ns = container_of(kref, struct pid_namespace, kref);
619
620 parent = ns->parent;
621 destroy_pid_namespace(ns);
622
623 if (parent != NULL)
624 put_pid_ns(parent);
625}
626#endif /* CONFIG_PID_NS */
627
628void zap_pid_ns_processes(struct pid_namespace *pid_ns)
629{
630 int nr;
631 int rc;
632
633 /*
634 * The last thread in the cgroup-init thread group is terminating.
635 * Find remaining pid_ts in the namespace, signal and wait for them
636 * to exit.
637 *
638 * Note: This signals each threads in the namespace - even those that
639 * belong to the same thread group, To avoid this, we would have
640 * to walk the entire tasklist looking a processes in this
641 * namespace, but that could be unnecessarily expensive if the
642 * pid namespace has just a few processes. Or we need to
643 * maintain a tasklist for each pid namespace.
644 *
645 */
646 read_lock(&tasklist_lock);
647 nr = next_pidmap(pid_ns, 1);
648 while (nr > 0) {
649 kill_proc_info(SIGKILL, SEND_SIG_PRIV, nr);
650 nr = next_pidmap(pid_ns, nr);
651 }
652 read_unlock(&tasklist_lock);
653
654 do {
655 clear_thread_flag(TIF_SIGPENDING);
656 rc = sys_wait4(-1, NULL, __WALL, NULL);
657 } while (rc != -ECHILD);
658
659
660 /* Child reaper for the pid namespace is going away */
661 pid_ns->child_reaper = NULL;
662 return;
663}
664
665/* 496/*
666 * The pid hash table is scaled according to the amount of memory in the 497 * The pid hash table is scaled according to the amount of memory in the
667 * machine. From a minimum of 16 slots up to 4096 slots at one gigabyte or 498 * machine. From a minimum of 16 slots up to 4096 slots at one gigabyte or
@@ -694,9 +525,6 @@ void __init pidmap_init(void)
694 set_bit(0, init_pid_ns.pidmap[0].page); 525 set_bit(0, init_pid_ns.pidmap[0].page);
695 atomic_dec(&init_pid_ns.pidmap[0].nr_free); 526 atomic_dec(&init_pid_ns.pidmap[0].nr_free);
696 527
697 init_pid_ns.pid_cachep = create_pid_cachep(1); 528 init_pid_ns.pid_cachep = KMEM_CACHE(pid,
698 if (init_pid_ns.pid_cachep == NULL) 529 SLAB_HWCACHE_ALIGN | SLAB_PANIC);
699 panic("Can't create pid_1 cachep\n");
700
701 pid_ns_cachep = KMEM_CACHE(pid_namespace, SLAB_PANIC);
702} 530}
diff --git a/kernel/pid_namespace.c b/kernel/pid_namespace.c
new file mode 100644
index 000000000000..6d792b66d854
--- /dev/null
+++ b/kernel/pid_namespace.c
@@ -0,0 +1,197 @@
1/*
2 * Pid namespaces
3 *
4 * Authors:
5 * (C) 2007 Pavel Emelyanov <xemul@openvz.org>, OpenVZ, SWsoft Inc.
6 * (C) 2007 Sukadev Bhattiprolu <sukadev@us.ibm.com>, IBM
7 * Many thanks to Oleg Nesterov for comments and help
8 *
9 */
10
11#include <linux/pid.h>
12#include <linux/pid_namespace.h>
13#include <linux/syscalls.h>
14#include <linux/err.h>
15
16#define BITS_PER_PAGE (PAGE_SIZE*8)
17
18struct pid_cache {
19 int nr_ids;
20 char name[16];
21 struct kmem_cache *cachep;
22 struct list_head list;
23};
24
25static LIST_HEAD(pid_caches_lh);
26static DEFINE_MUTEX(pid_caches_mutex);
27static struct kmem_cache *pid_ns_cachep;
28
29/*
30 * creates the kmem cache to allocate pids from.
31 * @nr_ids: the number of numerical ids this pid will have to carry
32 */
33
34static struct kmem_cache *create_pid_cachep(int nr_ids)
35{
36 struct pid_cache *pcache;
37 struct kmem_cache *cachep;
38
39 mutex_lock(&pid_caches_mutex);
40 list_for_each_entry(pcache, &pid_caches_lh, list)
41 if (pcache->nr_ids == nr_ids)
42 goto out;
43
44 pcache = kmalloc(sizeof(struct pid_cache), GFP_KERNEL);
45 if (pcache == NULL)
46 goto err_alloc;
47
48 snprintf(pcache->name, sizeof(pcache->name), "pid_%d", nr_ids);
49 cachep = kmem_cache_create(pcache->name,
50 sizeof(struct pid) + (nr_ids - 1) * sizeof(struct upid),
51 0, SLAB_HWCACHE_ALIGN, NULL);
52 if (cachep == NULL)
53 goto err_cachep;
54
55 pcache->nr_ids = nr_ids;
56 pcache->cachep = cachep;
57 list_add(&pcache->list, &pid_caches_lh);
58out:
59 mutex_unlock(&pid_caches_mutex);
60 return pcache->cachep;
61
62err_cachep:
63 kfree(pcache);
64err_alloc:
65 mutex_unlock(&pid_caches_mutex);
66 return NULL;
67}
68
69static struct pid_namespace *create_pid_namespace(int level)
70{
71 struct pid_namespace *ns;
72 int i;
73
74 ns = kmem_cache_alloc(pid_ns_cachep, GFP_KERNEL);
75 if (ns == NULL)
76 goto out;
77
78 ns->pidmap[0].page = kzalloc(PAGE_SIZE, GFP_KERNEL);
79 if (!ns->pidmap[0].page)
80 goto out_free;
81
82 ns->pid_cachep = create_pid_cachep(level + 1);
83 if (ns->pid_cachep == NULL)
84 goto out_free_map;
85
86 kref_init(&ns->kref);
87 ns->last_pid = 0;
88 ns->child_reaper = NULL;
89 ns->level = level;
90
91 set_bit(0, ns->pidmap[0].page);
92 atomic_set(&ns->pidmap[0].nr_free, BITS_PER_PAGE - 1);
93
94 for (i = 1; i < PIDMAP_ENTRIES; i++) {
95 ns->pidmap[i].page = 0;
96 atomic_set(&ns->pidmap[i].nr_free, BITS_PER_PAGE);
97 }
98
99 return ns;
100
101out_free_map:
102 kfree(ns->pidmap[0].page);
103out_free:
104 kmem_cache_free(pid_ns_cachep, ns);
105out:
106 return ERR_PTR(-ENOMEM);
107}
108
109static void destroy_pid_namespace(struct pid_namespace *ns)
110{
111 int i;
112
113 for (i = 0; i < PIDMAP_ENTRIES; i++)
114 kfree(ns->pidmap[i].page);
115 kmem_cache_free(pid_ns_cachep, ns);
116}
117
118struct pid_namespace *copy_pid_ns(unsigned long flags, struct pid_namespace *old_ns)
119{
120 struct pid_namespace *new_ns;
121
122 BUG_ON(!old_ns);
123 new_ns = get_pid_ns(old_ns);
124 if (!(flags & CLONE_NEWPID))
125 goto out;
126
127 new_ns = ERR_PTR(-EINVAL);
128 if (flags & CLONE_THREAD)
129 goto out_put;
130
131 new_ns = create_pid_namespace(old_ns->level + 1);
132 if (!IS_ERR(new_ns))
133 new_ns->parent = get_pid_ns(old_ns);
134
135out_put:
136 put_pid_ns(old_ns);
137out:
138 return new_ns;
139}
140
141void free_pid_ns(struct kref *kref)
142{
143 struct pid_namespace *ns, *parent;
144
145 ns = container_of(kref, struct pid_namespace, kref);
146
147 parent = ns->parent;
148 destroy_pid_namespace(ns);
149
150 if (parent != NULL)
151 put_pid_ns(parent);
152}
153
154void zap_pid_ns_processes(struct pid_namespace *pid_ns)
155{
156 int nr;
157 int rc;
158
159 /*
160 * The last thread in the cgroup-init thread group is terminating.
161 * Find remaining pid_ts in the namespace, signal and wait for them
162 * to exit.
163 *
164 * Note: This signals each threads in the namespace - even those that
165 * belong to the same thread group, To avoid this, we would have
166 * to walk the entire tasklist looking a processes in this
167 * namespace, but that could be unnecessarily expensive if the
168 * pid namespace has just a few processes. Or we need to
169 * maintain a tasklist for each pid namespace.
170 *
171 */
172 read_lock(&tasklist_lock);
173 nr = next_pidmap(pid_ns, 1);
174 while (nr > 0) {
175 kill_proc_info(SIGKILL, SEND_SIG_PRIV, nr);
176 nr = next_pidmap(pid_ns, nr);
177 }
178 read_unlock(&tasklist_lock);
179
180 do {
181 clear_thread_flag(TIF_SIGPENDING);
182 rc = sys_wait4(-1, NULL, __WALL, NULL);
183 } while (rc != -ECHILD);
184
185
186 /* Child reaper for the pid namespace is going away */
187 pid_ns->child_reaper = NULL;
188 return;
189}
190
191static __init int pid_namespaces_init(void)
192{
193 pid_ns_cachep = KMEM_CACHE(pid_namespace, SLAB_PANIC);
194 return 0;
195}
196
197__initcall(pid_namespaces_init);
diff --git a/kernel/posix-cpu-timers.c b/kernel/posix-cpu-timers.c
index 0b7c82ac467e..2eae91f954ca 100644
--- a/kernel/posix-cpu-timers.c
+++ b/kernel/posix-cpu-timers.c
@@ -20,7 +20,7 @@ static int check_clock(const clockid_t which_clock)
20 return 0; 20 return 0;
21 21
22 read_lock(&tasklist_lock); 22 read_lock(&tasklist_lock);
23 p = find_task_by_pid(pid); 23 p = find_task_by_vpid(pid);
24 if (!p || !(CPUCLOCK_PERTHREAD(which_clock) ? 24 if (!p || !(CPUCLOCK_PERTHREAD(which_clock) ?
25 same_thread_group(p, current) : thread_group_leader(p))) { 25 same_thread_group(p, current) : thread_group_leader(p))) {
26 error = -EINVAL; 26 error = -EINVAL;
@@ -305,7 +305,7 @@ int posix_cpu_clock_get(const clockid_t which_clock, struct timespec *tp)
305 */ 305 */
306 struct task_struct *p; 306 struct task_struct *p;
307 rcu_read_lock(); 307 rcu_read_lock();
308 p = find_task_by_pid(pid); 308 p = find_task_by_vpid(pid);
309 if (p) { 309 if (p) {
310 if (CPUCLOCK_PERTHREAD(which_clock)) { 310 if (CPUCLOCK_PERTHREAD(which_clock)) {
311 if (same_thread_group(p, current)) { 311 if (same_thread_group(p, current)) {
@@ -354,7 +354,7 @@ int posix_cpu_timer_create(struct k_itimer *new_timer)
354 if (pid == 0) { 354 if (pid == 0) {
355 p = current; 355 p = current;
356 } else { 356 } else {
357 p = find_task_by_pid(pid); 357 p = find_task_by_vpid(pid);
358 if (p && !same_thread_group(p, current)) 358 if (p && !same_thread_group(p, current))
359 p = NULL; 359 p = NULL;
360 } 360 }
@@ -362,7 +362,7 @@ int posix_cpu_timer_create(struct k_itimer *new_timer)
362 if (pid == 0) { 362 if (pid == 0) {
363 p = current->group_leader; 363 p = current->group_leader;
364 } else { 364 } else {
365 p = find_task_by_pid(pid); 365 p = find_task_by_vpid(pid);
366 if (p && !thread_group_leader(p)) 366 if (p && !thread_group_leader(p))
367 p = NULL; 367 p = NULL;
368 } 368 }
diff --git a/kernel/posix-timers.c b/kernel/posix-timers.c
index 122d5c787fe2..ce268966007d 100644
--- a/kernel/posix-timers.c
+++ b/kernel/posix-timers.c
@@ -404,7 +404,7 @@ static struct task_struct * good_sigevent(sigevent_t * event)
404 struct task_struct *rtn = current->group_leader; 404 struct task_struct *rtn = current->group_leader;
405 405
406 if ((event->sigev_notify & SIGEV_THREAD_ID ) && 406 if ((event->sigev_notify & SIGEV_THREAD_ID ) &&
407 (!(rtn = find_task_by_pid(event->sigev_notify_thread_id)) || 407 (!(rtn = find_task_by_vpid(event->sigev_notify_thread_id)) ||
408 !same_thread_group(rtn, current) || 408 !same_thread_group(rtn, current) ||
409 (event->sigev_notify & ~SIGEV_THREAD_ID) != SIGEV_SIGNAL)) 409 (event->sigev_notify & ~SIGEV_THREAD_ID) != SIGEV_SIGNAL))
410 return NULL; 410 return NULL;
diff --git a/kernel/printk.c b/kernel/printk.c
index 4a090621f379..bee36100f110 100644
--- a/kernel/printk.c
+++ b/kernel/printk.c
@@ -32,7 +32,6 @@
32#include <linux/security.h> 32#include <linux/security.h>
33#include <linux/bootmem.h> 33#include <linux/bootmem.h>
34#include <linux/syscalls.h> 34#include <linux/syscalls.h>
35#include <linux/jiffies.h>
36 35
37#include <asm/uaccess.h> 36#include <asm/uaccess.h>
38 37
@@ -567,19 +566,6 @@ static int printk_time = 0;
567#endif 566#endif
568module_param_named(time, printk_time, bool, S_IRUGO | S_IWUSR); 567module_param_named(time, printk_time, bool, S_IRUGO | S_IWUSR);
569 568
570static int __init printk_time_setup(char *str)
571{
572 if (*str)
573 return 0;
574 printk_time = 1;
575 printk(KERN_NOTICE "The 'time' option is deprecated and "
576 "is scheduled for removal in early 2008\n");
577 printk(KERN_NOTICE "Use 'printk.time=<value>' instead\n");
578 return 1;
579}
580
581__setup("time", printk_time_setup);
582
583/* Check if we have any console registered that can be called early in boot. */ 569/* Check if we have any console registered that can be called early in boot. */
584static int have_callable_console(void) 570static int have_callable_console(void)
585{ 571{
@@ -1265,6 +1251,7 @@ void tty_write_message(struct tty_struct *tty, char *msg)
1265 return; 1251 return;
1266} 1252}
1267 1253
1254#if defined CONFIG_PRINTK
1268/* 1255/*
1269 * printk rate limiting, lifted from the networking subsystem. 1256 * printk rate limiting, lifted from the networking subsystem.
1270 * 1257 *
@@ -1334,3 +1321,4 @@ bool printk_timed_ratelimit(unsigned long *caller_jiffies,
1334 return false; 1321 return false;
1335} 1322}
1336EXPORT_SYMBOL(printk_timed_ratelimit); 1323EXPORT_SYMBOL(printk_timed_ratelimit);
1324#endif
diff --git a/kernel/profile.c b/kernel/profile.c
index e64c2da11c0f..3b7a1b055122 100644
--- a/kernel/profile.c
+++ b/kernel/profile.c
@@ -20,7 +20,6 @@
20#include <linux/mm.h> 20#include <linux/mm.h>
21#include <linux/cpumask.h> 21#include <linux/cpumask.h>
22#include <linux/cpu.h> 22#include <linux/cpu.h>
23#include <linux/profile.h>
24#include <linux/highmem.h> 23#include <linux/highmem.h>
25#include <linux/mutex.h> 24#include <linux/mutex.h>
26#include <asm/sections.h> 25#include <asm/sections.h>
diff --git a/kernel/ptrace.c b/kernel/ptrace.c
index 628b03ab88a5..fdb34e86f923 100644
--- a/kernel/ptrace.c
+++ b/kernel/ptrace.c
@@ -99,10 +99,12 @@ int ptrace_check_attach(struct task_struct *child, int kill)
99 * be changed by us so it's not changing right after this. 99 * be changed by us so it's not changing right after this.
100 */ 100 */
101 read_lock(&tasklist_lock); 101 read_lock(&tasklist_lock);
102 if ((child->ptrace & PT_PTRACED) && child->parent == current && 102 if ((child->ptrace & PT_PTRACED) && child->parent == current) {
103 (!(child->ptrace & PT_ATTACHED) || child->real_parent != current)
104 && child->signal != NULL) {
105 ret = 0; 103 ret = 0;
104 /*
105 * child->sighand can't be NULL, release_task()
106 * does ptrace_unlink() before __exit_signal().
107 */
106 spin_lock_irq(&child->sighand->siglock); 108 spin_lock_irq(&child->sighand->siglock);
107 if (task_is_stopped(child)) 109 if (task_is_stopped(child))
108 child->state = TASK_TRACED; 110 child->state = TASK_TRACED;
@@ -200,8 +202,7 @@ repeat:
200 goto bad; 202 goto bad;
201 203
202 /* Go */ 204 /* Go */
203 task->ptrace |= PT_PTRACED | ((task->real_parent != current) 205 task->ptrace |= PT_PTRACED;
204 ? PT_ATTACHED : 0);
205 if (capable(CAP_SYS_PTRACE)) 206 if (capable(CAP_SYS_PTRACE))
206 task->ptrace |= PT_PTRACE_CAP; 207 task->ptrace |= PT_PTRACE_CAP;
207 208
diff --git a/kernel/resource.c b/kernel/resource.c
index 2eb553d9b517..82aea814d409 100644
--- a/kernel/resource.c
+++ b/kernel/resource.c
@@ -228,7 +228,7 @@ int release_resource(struct resource *old)
228 228
229EXPORT_SYMBOL(release_resource); 229EXPORT_SYMBOL(release_resource);
230 230
231#ifdef CONFIG_MEMORY_HOTPLUG 231#if defined(CONFIG_MEMORY_HOTPLUG) && !defined(CONFIG_ARCH_HAS_WALK_MEMORY)
232/* 232/*
233 * Finds the lowest memory reosurce exists within [res->start.res->end) 233 * Finds the lowest memory reosurce exists within [res->start.res->end)
234 * the caller must specify res->start, res->end, res->flags. 234 * the caller must specify res->start, res->end, res->flags.
diff --git a/kernel/rtmutex-debug.c b/kernel/rtmutex-debug.c
index 56d73cb8826d..5fcb4fe645e2 100644
--- a/kernel/rtmutex-debug.c
+++ b/kernel/rtmutex-debug.c
@@ -130,7 +130,7 @@ void debug_rt_mutex_deadlock(int detect, struct rt_mutex_waiter *act_waiter,
130 130
131 task = rt_mutex_owner(act_waiter->lock); 131 task = rt_mutex_owner(act_waiter->lock);
132 if (task && task != current) { 132 if (task && task != current) {
133 act_waiter->deadlock_task_pid = task->pid; 133 act_waiter->deadlock_task_pid = get_pid(task_pid(task));
134 act_waiter->deadlock_lock = lock; 134 act_waiter->deadlock_lock = lock;
135 } 135 }
136} 136}
@@ -142,9 +142,12 @@ void debug_rt_mutex_print_deadlock(struct rt_mutex_waiter *waiter)
142 if (!waiter->deadlock_lock || !rt_trace_on) 142 if (!waiter->deadlock_lock || !rt_trace_on)
143 return; 143 return;
144 144
145 task = find_task_by_pid(waiter->deadlock_task_pid); 145 rcu_read_lock();
146 if (!task) 146 task = pid_task(waiter->deadlock_task_pid, PIDTYPE_PID);
147 if (!task) {
148 rcu_read_unlock();
147 return; 149 return;
150 }
148 151
149 TRACE_OFF_NOLOCK(); 152 TRACE_OFF_NOLOCK();
150 153
@@ -173,6 +176,7 @@ void debug_rt_mutex_print_deadlock(struct rt_mutex_waiter *waiter)
173 current->comm, task_pid_nr(current)); 176 current->comm, task_pid_nr(current));
174 dump_stack(); 177 dump_stack();
175 debug_show_all_locks(); 178 debug_show_all_locks();
179 rcu_read_unlock();
176 180
177 printk("[ turning off deadlock detection." 181 printk("[ turning off deadlock detection."
178 "Please report this trace. ]\n\n"); 182 "Please report this trace. ]\n\n");
@@ -203,10 +207,12 @@ void debug_rt_mutex_init_waiter(struct rt_mutex_waiter *waiter)
203 memset(waiter, 0x11, sizeof(*waiter)); 207 memset(waiter, 0x11, sizeof(*waiter));
204 plist_node_init(&waiter->list_entry, MAX_PRIO); 208 plist_node_init(&waiter->list_entry, MAX_PRIO);
205 plist_node_init(&waiter->pi_list_entry, MAX_PRIO); 209 plist_node_init(&waiter->pi_list_entry, MAX_PRIO);
210 waiter->deadlock_task_pid = NULL;
206} 211}
207 212
208void debug_rt_mutex_free_waiter(struct rt_mutex_waiter *waiter) 213void debug_rt_mutex_free_waiter(struct rt_mutex_waiter *waiter)
209{ 214{
215 put_pid(waiter->deadlock_task_pid);
210 TRACE_WARN_ON(!plist_node_empty(&waiter->list_entry)); 216 TRACE_WARN_ON(!plist_node_empty(&waiter->list_entry));
211 TRACE_WARN_ON(!plist_node_empty(&waiter->pi_list_entry)); 217 TRACE_WARN_ON(!plist_node_empty(&waiter->pi_list_entry));
212 TRACE_WARN_ON(waiter->task); 218 TRACE_WARN_ON(waiter->task);
diff --git a/kernel/rtmutex_common.h b/kernel/rtmutex_common.h
index 2d3b83593ca3..e124bf5800ea 100644
--- a/kernel/rtmutex_common.h
+++ b/kernel/rtmutex_common.h
@@ -51,7 +51,7 @@ struct rt_mutex_waiter {
51 struct rt_mutex *lock; 51 struct rt_mutex *lock;
52#ifdef CONFIG_DEBUG_RT_MUTEXES 52#ifdef CONFIG_DEBUG_RT_MUTEXES
53 unsigned long ip; 53 unsigned long ip;
54 pid_t deadlock_task_pid; 54 struct pid *deadlock_task_pid;
55 struct rt_mutex *deadlock_lock; 55 struct rt_mutex *deadlock_lock;
56#endif 56#endif
57}; 57};
diff --git a/kernel/sched.c b/kernel/sched.c
index 9474b23c28bf..3eedd5260907 100644
--- a/kernel/sched.c
+++ b/kernel/sched.c
@@ -1893,13 +1893,13 @@ out:
1893 return success; 1893 return success;
1894} 1894}
1895 1895
1896int fastcall wake_up_process(struct task_struct *p) 1896int wake_up_process(struct task_struct *p)
1897{ 1897{
1898 return try_to_wake_up(p, TASK_ALL, 0); 1898 return try_to_wake_up(p, TASK_ALL, 0);
1899} 1899}
1900EXPORT_SYMBOL(wake_up_process); 1900EXPORT_SYMBOL(wake_up_process);
1901 1901
1902int fastcall wake_up_state(struct task_struct *p, unsigned int state) 1902int wake_up_state(struct task_struct *p, unsigned int state)
1903{ 1903{
1904 return try_to_wake_up(p, state, 0); 1904 return try_to_wake_up(p, state, 0);
1905} 1905}
@@ -1986,7 +1986,7 @@ void sched_fork(struct task_struct *p, int clone_flags)
1986 * that must be done for every newly created context, then puts the task 1986 * that must be done for every newly created context, then puts the task
1987 * on the runqueue and wakes it. 1987 * on the runqueue and wakes it.
1988 */ 1988 */
1989void fastcall wake_up_new_task(struct task_struct *p, unsigned long clone_flags) 1989void wake_up_new_task(struct task_struct *p, unsigned long clone_flags)
1990{ 1990{
1991 unsigned long flags; 1991 unsigned long flags;
1992 struct rq *rq; 1992 struct rq *rq;
@@ -3753,7 +3753,7 @@ void scheduler_tick(void)
3753 3753
3754#if defined(CONFIG_PREEMPT) && defined(CONFIG_DEBUG_PREEMPT) 3754#if defined(CONFIG_PREEMPT) && defined(CONFIG_DEBUG_PREEMPT)
3755 3755
3756void fastcall add_preempt_count(int val) 3756void add_preempt_count(int val)
3757{ 3757{
3758 /* 3758 /*
3759 * Underflow? 3759 * Underflow?
@@ -3769,7 +3769,7 @@ void fastcall add_preempt_count(int val)
3769} 3769}
3770EXPORT_SYMBOL(add_preempt_count); 3770EXPORT_SYMBOL(add_preempt_count);
3771 3771
3772void fastcall sub_preempt_count(int val) 3772void sub_preempt_count(int val)
3773{ 3773{
3774 /* 3774 /*
3775 * Underflow? 3775 * Underflow?
@@ -4067,7 +4067,7 @@ static void __wake_up_common(wait_queue_head_t *q, unsigned int mode,
4067 * @nr_exclusive: how many wake-one or wake-many threads to wake up 4067 * @nr_exclusive: how many wake-one or wake-many threads to wake up
4068 * @key: is directly passed to the wakeup function 4068 * @key: is directly passed to the wakeup function
4069 */ 4069 */
4070void fastcall __wake_up(wait_queue_head_t *q, unsigned int mode, 4070void __wake_up(wait_queue_head_t *q, unsigned int mode,
4071 int nr_exclusive, void *key) 4071 int nr_exclusive, void *key)
4072{ 4072{
4073 unsigned long flags; 4073 unsigned long flags;
@@ -4081,7 +4081,7 @@ EXPORT_SYMBOL(__wake_up);
4081/* 4081/*
4082 * Same as __wake_up but called with the spinlock in wait_queue_head_t held. 4082 * Same as __wake_up but called with the spinlock in wait_queue_head_t held.
4083 */ 4083 */
4084void fastcall __wake_up_locked(wait_queue_head_t *q, unsigned int mode) 4084void __wake_up_locked(wait_queue_head_t *q, unsigned int mode)
4085{ 4085{
4086 __wake_up_common(q, mode, 1, 0, NULL); 4086 __wake_up_common(q, mode, 1, 0, NULL);
4087} 4087}
@@ -4099,7 +4099,7 @@ void fastcall __wake_up_locked(wait_queue_head_t *q, unsigned int mode)
4099 * 4099 *
4100 * On UP it can prevent extra preemption. 4100 * On UP it can prevent extra preemption.
4101 */ 4101 */
4102void fastcall 4102void
4103__wake_up_sync(wait_queue_head_t *q, unsigned int mode, int nr_exclusive) 4103__wake_up_sync(wait_queue_head_t *q, unsigned int mode, int nr_exclusive)
4104{ 4104{
4105 unsigned long flags; 4105 unsigned long flags;
diff --git a/kernel/signal.c b/kernel/signal.c
index 5d30ff561847..2c1f08defac2 100644
--- a/kernel/signal.c
+++ b/kernel/signal.c
@@ -1018,7 +1018,7 @@ int group_send_sig_info(int sig, struct siginfo *info, struct task_struct *p)
1018} 1018}
1019 1019
1020/* 1020/*
1021 * kill_pgrp_info() sends a signal to a process group: this is what the tty 1021 * __kill_pgrp_info() sends a signal to a process group: this is what the tty
1022 * control characters do (^C, ^Z etc) 1022 * control characters do (^C, ^Z etc)
1023 */ 1023 */
1024 1024
@@ -1037,30 +1037,28 @@ int __kill_pgrp_info(int sig, struct siginfo *info, struct pid *pgrp)
1037 return success ? 0 : retval; 1037 return success ? 0 : retval;
1038} 1038}
1039 1039
1040int kill_pgrp_info(int sig, struct siginfo *info, struct pid *pgrp)
1041{
1042 int retval;
1043
1044 read_lock(&tasklist_lock);
1045 retval = __kill_pgrp_info(sig, info, pgrp);
1046 read_unlock(&tasklist_lock);
1047
1048 return retval;
1049}
1050
1051int kill_pid_info(int sig, struct siginfo *info, struct pid *pid) 1040int kill_pid_info(int sig, struct siginfo *info, struct pid *pid)
1052{ 1041{
1053 int error; 1042 int error = -ESRCH;
1054 struct task_struct *p; 1043 struct task_struct *p;
1055 1044
1056 rcu_read_lock(); 1045 rcu_read_lock();
1057 if (unlikely(sig_needs_tasklist(sig))) 1046 if (unlikely(sig_needs_tasklist(sig)))
1058 read_lock(&tasklist_lock); 1047 read_lock(&tasklist_lock);
1059 1048
1049retry:
1060 p = pid_task(pid, PIDTYPE_PID); 1050 p = pid_task(pid, PIDTYPE_PID);
1061 error = -ESRCH; 1051 if (p) {
1062 if (p)
1063 error = group_send_sig_info(sig, info, p); 1052 error = group_send_sig_info(sig, info, p);
1053 if (unlikely(error == -ESRCH))
1054 /*
1055 * The task was unhashed in between, try again.
1056 * If it is dead, pid_task() will return NULL,
1057 * if we race with de_thread() it will find the
1058 * new leader.
1059 */
1060 goto retry;
1061 }
1064 1062
1065 if (unlikely(sig_needs_tasklist(sig))) 1063 if (unlikely(sig_needs_tasklist(sig)))
1066 read_unlock(&tasklist_lock); 1064 read_unlock(&tasklist_lock);
@@ -1125,14 +1123,22 @@ EXPORT_SYMBOL_GPL(kill_pid_info_as_uid);
1125static int kill_something_info(int sig, struct siginfo *info, int pid) 1123static int kill_something_info(int sig, struct siginfo *info, int pid)
1126{ 1124{
1127 int ret; 1125 int ret;
1128 rcu_read_lock(); 1126
1129 if (!pid) { 1127 if (pid > 0) {
1130 ret = kill_pgrp_info(sig, info, task_pgrp(current)); 1128 rcu_read_lock();
1131 } else if (pid == -1) { 1129 ret = kill_pid_info(sig, info, find_vpid(pid));
1130 rcu_read_unlock();
1131 return ret;
1132 }
1133
1134 read_lock(&tasklist_lock);
1135 if (pid != -1) {
1136 ret = __kill_pgrp_info(sig, info,
1137 pid ? find_vpid(-pid) : task_pgrp(current));
1138 } else {
1132 int retval = 0, count = 0; 1139 int retval = 0, count = 0;
1133 struct task_struct * p; 1140 struct task_struct * p;
1134 1141
1135 read_lock(&tasklist_lock);
1136 for_each_process(p) { 1142 for_each_process(p) {
1137 if (p->pid > 1 && !same_thread_group(p, current)) { 1143 if (p->pid > 1 && !same_thread_group(p, current)) {
1138 int err = group_send_sig_info(sig, info, p); 1144 int err = group_send_sig_info(sig, info, p);
@@ -1141,14 +1147,10 @@ static int kill_something_info(int sig, struct siginfo *info, int pid)
1141 retval = err; 1147 retval = err;
1142 } 1148 }
1143 } 1149 }
1144 read_unlock(&tasklist_lock);
1145 ret = count ? retval : -ESRCH; 1150 ret = count ? retval : -ESRCH;
1146 } else if (pid < 0) {
1147 ret = kill_pgrp_info(sig, info, find_vpid(-pid));
1148 } else {
1149 ret = kill_pid_info(sig, info, find_vpid(pid));
1150 } 1151 }
1151 rcu_read_unlock(); 1152 read_unlock(&tasklist_lock);
1153
1152 return ret; 1154 return ret;
1153} 1155}
1154 1156
@@ -1196,20 +1198,6 @@ send_sig(int sig, struct task_struct *p, int priv)
1196 return send_sig_info(sig, __si_special(priv), p); 1198 return send_sig_info(sig, __si_special(priv), p);
1197} 1199}
1198 1200
1199/*
1200 * This is the entry point for "process-wide" signals.
1201 * They will go to an appropriate thread in the thread group.
1202 */
1203int
1204send_group_sig_info(int sig, struct siginfo *info, struct task_struct *p)
1205{
1206 int ret;
1207 read_lock(&tasklist_lock);
1208 ret = group_send_sig_info(sig, info, p);
1209 read_unlock(&tasklist_lock);
1210 return ret;
1211}
1212
1213void 1201void
1214force_sig(int sig, struct task_struct *p) 1202force_sig(int sig, struct task_struct *p)
1215{ 1203{
@@ -1237,7 +1225,13 @@ force_sigsegv(int sig, struct task_struct *p)
1237 1225
1238int kill_pgrp(struct pid *pid, int sig, int priv) 1226int kill_pgrp(struct pid *pid, int sig, int priv)
1239{ 1227{
1240 return kill_pgrp_info(sig, __si_special(priv), pid); 1228 int ret;
1229
1230 read_lock(&tasklist_lock);
1231 ret = __kill_pgrp_info(sig, __si_special(priv), pid);
1232 read_unlock(&tasklist_lock);
1233
1234 return ret;
1241} 1235}
1242EXPORT_SYMBOL(kill_pgrp); 1236EXPORT_SYMBOL(kill_pgrp);
1243 1237
@@ -1556,11 +1550,6 @@ static inline int may_ptrace_stop(void)
1556{ 1550{
1557 if (!likely(current->ptrace & PT_PTRACED)) 1551 if (!likely(current->ptrace & PT_PTRACED))
1558 return 0; 1552 return 0;
1559
1560 if (unlikely(current->parent == current->real_parent &&
1561 (current->ptrace & PT_ATTACHED)))
1562 return 0;
1563
1564 /* 1553 /*
1565 * Are we in the middle of do_coredump? 1554 * Are we in the middle of do_coredump?
1566 * If so and our tracer is also part of the coredump stopping 1555 * If so and our tracer is also part of the coredump stopping
@@ -1596,10 +1585,10 @@ static int sigkill_pending(struct task_struct *tsk)
1596 * That makes it a way to test a stopped process for 1585 * That makes it a way to test a stopped process for
1597 * being ptrace-stopped vs being job-control-stopped. 1586 * being ptrace-stopped vs being job-control-stopped.
1598 * 1587 *
1599 * If we actually decide not to stop at all because the tracer is gone, 1588 * If we actually decide not to stop at all because the tracer
1600 * we leave nostop_code in current->exit_code. 1589 * is gone, we keep current->exit_code unless clear_code.
1601 */ 1590 */
1602static void ptrace_stop(int exit_code, int nostop_code, siginfo_t *info) 1591static void ptrace_stop(int exit_code, int clear_code, siginfo_t *info)
1603{ 1592{
1604 int killed = 0; 1593 int killed = 0;
1605 1594
@@ -1643,11 +1632,12 @@ static void ptrace_stop(int exit_code, int nostop_code, siginfo_t *info)
1643 } else { 1632 } else {
1644 /* 1633 /*
1645 * By the time we got the lock, our tracer went away. 1634 * By the time we got the lock, our tracer went away.
1646 * Don't stop here. 1635 * Don't drop the lock yet, another tracer may come.
1647 */ 1636 */
1637 __set_current_state(TASK_RUNNING);
1638 if (clear_code)
1639 current->exit_code = 0;
1648 read_unlock(&tasklist_lock); 1640 read_unlock(&tasklist_lock);
1649 set_current_state(TASK_RUNNING);
1650 current->exit_code = nostop_code;
1651 } 1641 }
1652 1642
1653 /* 1643 /*
@@ -1680,7 +1670,7 @@ void ptrace_notify(int exit_code)
1680 1670
1681 /* Let the debugger run. */ 1671 /* Let the debugger run. */
1682 spin_lock_irq(&current->sighand->siglock); 1672 spin_lock_irq(&current->sighand->siglock);
1683 ptrace_stop(exit_code, 0, &info); 1673 ptrace_stop(exit_code, 1, &info);
1684 spin_unlock_irq(&current->sighand->siglock); 1674 spin_unlock_irq(&current->sighand->siglock);
1685} 1675}
1686 1676
@@ -1743,7 +1733,7 @@ static int do_signal_stop(int signr)
1743 * stop is always done with the siglock held, 1733 * stop is always done with the siglock held,
1744 * so this check has no races. 1734 * so this check has no races.
1745 */ 1735 */
1746 if (!t->exit_state && 1736 if (!(t->flags & PF_EXITING) &&
1747 !task_is_stopped_or_traced(t)) { 1737 !task_is_stopped_or_traced(t)) {
1748 stop_count++; 1738 stop_count++;
1749 signal_wake_up(t, 0); 1739 signal_wake_up(t, 0);
@@ -1787,7 +1777,7 @@ relock:
1787 ptrace_signal_deliver(regs, cookie); 1777 ptrace_signal_deliver(regs, cookie);
1788 1778
1789 /* Let the debugger run. */ 1779 /* Let the debugger run. */
1790 ptrace_stop(signr, signr, info); 1780 ptrace_stop(signr, 0, info);
1791 1781
1792 /* We're back. Did the debugger cancel the sig? */ 1782 /* We're back. Did the debugger cancel the sig? */
1793 signr = current->exit_code; 1783 signr = current->exit_code;
@@ -1904,6 +1894,48 @@ relock:
1904 return signr; 1894 return signr;
1905} 1895}
1906 1896
1897void exit_signals(struct task_struct *tsk)
1898{
1899 int group_stop = 0;
1900 struct task_struct *t;
1901
1902 if (thread_group_empty(tsk) || signal_group_exit(tsk->signal)) {
1903 tsk->flags |= PF_EXITING;
1904 return;
1905 }
1906
1907 spin_lock_irq(&tsk->sighand->siglock);
1908 /*
1909 * From now this task is not visible for group-wide signals,
1910 * see wants_signal(), do_signal_stop().
1911 */
1912 tsk->flags |= PF_EXITING;
1913 if (!signal_pending(tsk))
1914 goto out;
1915
1916 /* It could be that __group_complete_signal() choose us to
1917 * notify about group-wide signal. Another thread should be
1918 * woken now to take the signal since we will not.
1919 */
1920 for (t = tsk; (t = next_thread(t)) != tsk; )
1921 if (!signal_pending(t) && !(t->flags & PF_EXITING))
1922 recalc_sigpending_and_wake(t);
1923
1924 if (unlikely(tsk->signal->group_stop_count) &&
1925 !--tsk->signal->group_stop_count) {
1926 tsk->signal->flags = SIGNAL_STOP_STOPPED;
1927 group_stop = 1;
1928 }
1929out:
1930 spin_unlock_irq(&tsk->sighand->siglock);
1931
1932 if (unlikely(group_stop)) {
1933 read_lock(&tasklist_lock);
1934 do_notify_parent_cldstop(tsk, CLD_STOPPED);
1935 read_unlock(&tasklist_lock);
1936 }
1937}
1938
1907EXPORT_SYMBOL(recalc_sigpending); 1939EXPORT_SYMBOL(recalc_sigpending);
1908EXPORT_SYMBOL_GPL(dequeue_signal); 1940EXPORT_SYMBOL_GPL(dequeue_signal);
1909EXPORT_SYMBOL(flush_signals); 1941EXPORT_SYMBOL(flush_signals);
diff --git a/kernel/softirq.c b/kernel/softirq.c
index d7837d45419e..5b3aea5f471e 100644
--- a/kernel/softirq.c
+++ b/kernel/softirq.c
@@ -320,7 +320,7 @@ void irq_exit(void)
320/* 320/*
321 * This function must run with irqs disabled! 321 * This function must run with irqs disabled!
322 */ 322 */
323inline fastcall void raise_softirq_irqoff(unsigned int nr) 323inline void raise_softirq_irqoff(unsigned int nr)
324{ 324{
325 __raise_softirq_irqoff(nr); 325 __raise_softirq_irqoff(nr);
326 326
@@ -337,7 +337,7 @@ inline fastcall void raise_softirq_irqoff(unsigned int nr)
337 wakeup_softirqd(); 337 wakeup_softirqd();
338} 338}
339 339
340void fastcall raise_softirq(unsigned int nr) 340void raise_softirq(unsigned int nr)
341{ 341{
342 unsigned long flags; 342 unsigned long flags;
343 343
@@ -363,7 +363,7 @@ struct tasklet_head
363static DEFINE_PER_CPU(struct tasklet_head, tasklet_vec) = { NULL }; 363static DEFINE_PER_CPU(struct tasklet_head, tasklet_vec) = { NULL };
364static DEFINE_PER_CPU(struct tasklet_head, tasklet_hi_vec) = { NULL }; 364static DEFINE_PER_CPU(struct tasklet_head, tasklet_hi_vec) = { NULL };
365 365
366void fastcall __tasklet_schedule(struct tasklet_struct *t) 366void __tasklet_schedule(struct tasklet_struct *t)
367{ 367{
368 unsigned long flags; 368 unsigned long flags;
369 369
@@ -376,7 +376,7 @@ void fastcall __tasklet_schedule(struct tasklet_struct *t)
376 376
377EXPORT_SYMBOL(__tasklet_schedule); 377EXPORT_SYMBOL(__tasklet_schedule);
378 378
379void fastcall __tasklet_hi_schedule(struct tasklet_struct *t) 379void __tasklet_hi_schedule(struct tasklet_struct *t)
380{ 380{
381 unsigned long flags; 381 unsigned long flags;
382 382
diff --git a/kernel/sys.c b/kernel/sys.c
index e3c08d4324de..a626116af5db 100644
--- a/kernel/sys.c
+++ b/kernel/sys.c
@@ -916,8 +916,8 @@ asmlinkage long sys_setpgid(pid_t pid, pid_t pgid)
916{ 916{
917 struct task_struct *p; 917 struct task_struct *p;
918 struct task_struct *group_leader = current->group_leader; 918 struct task_struct *group_leader = current->group_leader;
919 int err = -EINVAL; 919 struct pid *pgrp;
920 struct pid_namespace *ns; 920 int err;
921 921
922 if (!pid) 922 if (!pid)
923 pid = task_pid_vnr(group_leader); 923 pid = task_pid_vnr(group_leader);
@@ -929,12 +929,10 @@ asmlinkage long sys_setpgid(pid_t pid, pid_t pgid)
929 /* From this point forward we keep holding onto the tasklist lock 929 /* From this point forward we keep holding onto the tasklist lock
930 * so that our parent does not change from under us. -DaveM 930 * so that our parent does not change from under us. -DaveM
931 */ 931 */
932 ns = current->nsproxy->pid_ns;
933
934 write_lock_irq(&tasklist_lock); 932 write_lock_irq(&tasklist_lock);
935 933
936 err = -ESRCH; 934 err = -ESRCH;
937 p = find_task_by_pid_ns(pid, ns); 935 p = find_task_by_vpid(pid);
938 if (!p) 936 if (!p)
939 goto out; 937 goto out;
940 938
@@ -942,7 +940,7 @@ asmlinkage long sys_setpgid(pid_t pid, pid_t pgid)
942 if (!thread_group_leader(p)) 940 if (!thread_group_leader(p))
943 goto out; 941 goto out;
944 942
945 if (p->real_parent->tgid == group_leader->tgid) { 943 if (same_thread_group(p->real_parent, group_leader)) {
946 err = -EPERM; 944 err = -EPERM;
947 if (task_session(p) != task_session(group_leader)) 945 if (task_session(p) != task_session(group_leader))
948 goto out; 946 goto out;
@@ -959,10 +957,12 @@ asmlinkage long sys_setpgid(pid_t pid, pid_t pgid)
959 if (p->signal->leader) 957 if (p->signal->leader)
960 goto out; 958 goto out;
961 959
960 pgrp = task_pid(p);
962 if (pgid != pid) { 961 if (pgid != pid) {
963 struct task_struct *g; 962 struct task_struct *g;
964 963
965 g = find_task_by_pid_type_ns(PIDTYPE_PGID, pgid, ns); 964 pgrp = find_vpid(pgid);
965 g = pid_task(pgrp, PIDTYPE_PGID);
966 if (!g || task_session(g) != task_session(group_leader)) 966 if (!g || task_session(g) != task_session(group_leader))
967 goto out; 967 goto out;
968 } 968 }
@@ -971,13 +971,10 @@ asmlinkage long sys_setpgid(pid_t pid, pid_t pgid)
971 if (err) 971 if (err)
972 goto out; 972 goto out;
973 973
974 if (task_pgrp_nr_ns(p, ns) != pgid) { 974 if (task_pgrp(p) != pgrp) {
975 struct pid *pid;
976
977 detach_pid(p, PIDTYPE_PGID); 975 detach_pid(p, PIDTYPE_PGID);
978 pid = find_vpid(pgid); 976 attach_pid(p, PIDTYPE_PGID, pgrp);
979 attach_pid(p, PIDTYPE_PGID, pid); 977 set_task_pgrp(p, pid_nr(pgrp));
980 set_task_pgrp(p, pid_nr(pid));
981 } 978 }
982 979
983 err = 0; 980 err = 0;
@@ -994,17 +991,14 @@ asmlinkage long sys_getpgid(pid_t pid)
994 else { 991 else {
995 int retval; 992 int retval;
996 struct task_struct *p; 993 struct task_struct *p;
997 struct pid_namespace *ns;
998
999 ns = current->nsproxy->pid_ns;
1000 994
1001 read_lock(&tasklist_lock); 995 read_lock(&tasklist_lock);
1002 p = find_task_by_pid_ns(pid, ns); 996 p = find_task_by_vpid(pid);
1003 retval = -ESRCH; 997 retval = -ESRCH;
1004 if (p) { 998 if (p) {
1005 retval = security_task_getpgid(p); 999 retval = security_task_getpgid(p);
1006 if (!retval) 1000 if (!retval)
1007 retval = task_pgrp_nr_ns(p, ns); 1001 retval = task_pgrp_vnr(p);
1008 } 1002 }
1009 read_unlock(&tasklist_lock); 1003 read_unlock(&tasklist_lock);
1010 return retval; 1004 return retval;
@@ -1028,19 +1022,16 @@ asmlinkage long sys_getsid(pid_t pid)
1028 else { 1022 else {
1029 int retval; 1023 int retval;
1030 struct task_struct *p; 1024 struct task_struct *p;
1031 struct pid_namespace *ns;
1032
1033 ns = current->nsproxy->pid_ns;
1034 1025
1035 read_lock(&tasklist_lock); 1026 rcu_read_lock();
1036 p = find_task_by_pid_ns(pid, ns); 1027 p = find_task_by_vpid(pid);
1037 retval = -ESRCH; 1028 retval = -ESRCH;
1038 if (p) { 1029 if (p) {
1039 retval = security_task_getsid(p); 1030 retval = security_task_getsid(p);
1040 if (!retval) 1031 if (!retval)
1041 retval = task_session_nr_ns(p, ns); 1032 retval = task_session_vnr(p);
1042 } 1033 }
1043 read_unlock(&tasklist_lock); 1034 rcu_read_unlock();
1044 return retval; 1035 return retval;
1045 } 1036 }
1046} 1037}
@@ -1048,35 +1039,29 @@ asmlinkage long sys_getsid(pid_t pid)
1048asmlinkage long sys_setsid(void) 1039asmlinkage long sys_setsid(void)
1049{ 1040{
1050 struct task_struct *group_leader = current->group_leader; 1041 struct task_struct *group_leader = current->group_leader;
1051 pid_t session; 1042 struct pid *sid = task_pid(group_leader);
1043 pid_t session = pid_vnr(sid);
1052 int err = -EPERM; 1044 int err = -EPERM;
1053 1045
1054 write_lock_irq(&tasklist_lock); 1046 write_lock_irq(&tasklist_lock);
1055
1056 /* Fail if I am already a session leader */ 1047 /* Fail if I am already a session leader */
1057 if (group_leader->signal->leader) 1048 if (group_leader->signal->leader)
1058 goto out; 1049 goto out;
1059 1050
1060 session = group_leader->pid;
1061 /* Fail if a process group id already exists that equals the 1051 /* Fail if a process group id already exists that equals the
1062 * proposed session id. 1052 * proposed session id.
1063 *
1064 * Don't check if session id == 1 because kernel threads use this
1065 * session id and so the check will always fail and make it so
1066 * init cannot successfully call setsid.
1067 */ 1053 */
1068 if (session > 1 && find_task_by_pid_type_ns(PIDTYPE_PGID, 1054 if (pid_task(sid, PIDTYPE_PGID))
1069 session, &init_pid_ns))
1070 goto out; 1055 goto out;
1071 1056
1072 group_leader->signal->leader = 1; 1057 group_leader->signal->leader = 1;
1073 __set_special_pids(session, session); 1058 __set_special_pids(sid);
1074 1059
1075 spin_lock(&group_leader->sighand->siglock); 1060 spin_lock(&group_leader->sighand->siglock);
1076 group_leader->signal->tty = NULL; 1061 group_leader->signal->tty = NULL;
1077 spin_unlock(&group_leader->sighand->siglock); 1062 spin_unlock(&group_leader->sighand->siglock);
1078 1063
1079 err = task_pgrp_vnr(group_leader); 1064 err = session;
1080out: 1065out:
1081 write_unlock_irq(&tasklist_lock); 1066 write_unlock_irq(&tasklist_lock);
1082 return err; 1067 return err;
diff --git a/kernel/sysctl.c b/kernel/sysctl.c
index 8c98d8147d88..d41ef6b4cf72 100644
--- a/kernel/sysctl.c
+++ b/kernel/sysctl.c
@@ -37,7 +37,6 @@
37#include <linux/highuid.h> 37#include <linux/highuid.h>
38#include <linux/writeback.h> 38#include <linux/writeback.h>
39#include <linux/hugetlb.h> 39#include <linux/hugetlb.h>
40#include <linux/security.h>
41#include <linux/initrd.h> 40#include <linux/initrd.h>
42#include <linux/times.h> 41#include <linux/times.h>
43#include <linux/limits.h> 42#include <linux/limits.h>
@@ -74,8 +73,6 @@ extern int suid_dumpable;
74extern char core_pattern[]; 73extern char core_pattern[];
75extern int pid_max; 74extern int pid_max;
76extern int min_free_kbytes; 75extern int min_free_kbytes;
77extern int printk_ratelimit_jiffies;
78extern int printk_ratelimit_burst;
79extern int pid_max_min, pid_max_max; 76extern int pid_max_min, pid_max_max;
80extern int sysctl_drop_caches; 77extern int sysctl_drop_caches;
81extern int percpu_pagelist_fraction; 78extern int percpu_pagelist_fraction;
@@ -491,14 +488,6 @@ static struct ctl_table kern_table[] = {
491 .mode = 0644, 488 .mode = 0644,
492 .proc_handler = &proc_dointvec, 489 .proc_handler = &proc_dointvec,
493 }, 490 },
494 {
495 .ctl_name = KERN_PRINTK,
496 .procname = "printk",
497 .data = &console_loglevel,
498 .maxlen = 4*sizeof(int),
499 .mode = 0644,
500 .proc_handler = &proc_dointvec,
501 },
502#ifdef CONFIG_KMOD 491#ifdef CONFIG_KMOD
503 { 492 {
504 .ctl_name = KERN_MODPROBE, 493 .ctl_name = KERN_MODPROBE,
@@ -645,6 +634,15 @@ static struct ctl_table kern_table[] = {
645 .mode = 0644, 634 .mode = 0644,
646 .proc_handler = &proc_dointvec, 635 .proc_handler = &proc_dointvec,
647 }, 636 },
637#if defined CONFIG_PRINTK
638 {
639 .ctl_name = KERN_PRINTK,
640 .procname = "printk",
641 .data = &console_loglevel,
642 .maxlen = 4*sizeof(int),
643 .mode = 0644,
644 .proc_handler = &proc_dointvec,
645 },
648 { 646 {
649 .ctl_name = KERN_PRINTK_RATELIMIT, 647 .ctl_name = KERN_PRINTK_RATELIMIT,
650 .procname = "printk_ratelimit", 648 .procname = "printk_ratelimit",
@@ -662,6 +660,7 @@ static struct ctl_table kern_table[] = {
662 .mode = 0644, 660 .mode = 0644,
663 .proc_handler = &proc_dointvec, 661 .proc_handler = &proc_dointvec,
664 }, 662 },
663#endif
665 { 664 {
666 .ctl_name = KERN_NGROUPS_MAX, 665 .ctl_name = KERN_NGROUPS_MAX,
667 .procname = "ngroups_max", 666 .procname = "ngroups_max",
@@ -982,7 +981,7 @@ static struct ctl_table vm_table[] = {
982 .data = &nr_overcommit_huge_pages, 981 .data = &nr_overcommit_huge_pages,
983 .maxlen = sizeof(nr_overcommit_huge_pages), 982 .maxlen = sizeof(nr_overcommit_huge_pages),
984 .mode = 0644, 983 .mode = 0644,
985 .proc_handler = &proc_doulongvec_minmax, 984 .proc_handler = &hugetlb_overcommit_handler,
986 }, 985 },
987#endif 986#endif
988 { 987 {
@@ -2488,7 +2487,7 @@ static int proc_do_cad_pid(struct ctl_table *table, int write, struct file *filp
2488 pid_t tmp; 2487 pid_t tmp;
2489 int r; 2488 int r;
2490 2489
2491 tmp = pid_nr_ns(cad_pid, current->nsproxy->pid_ns); 2490 tmp = pid_vnr(cad_pid);
2492 2491
2493 r = __do_proc_dointvec(&tmp, table, write, filp, buffer, 2492 r = __do_proc_dointvec(&tmp, table, write, filp, buffer,
2494 lenp, ppos, NULL, NULL); 2493 lenp, ppos, NULL, NULL);
diff --git a/kernel/sysctl_check.c b/kernel/sysctl_check.c
index 006365b69eaf..c09350d564f2 100644
--- a/kernel/sysctl_check.c
+++ b/kernel/sysctl_check.c
@@ -8,10 +8,10 @@
8struct trans_ctl_table { 8struct trans_ctl_table {
9 int ctl_name; 9 int ctl_name;
10 const char *procname; 10 const char *procname;
11 struct trans_ctl_table *child; 11 const struct trans_ctl_table *child;
12}; 12};
13 13
14static struct trans_ctl_table trans_random_table[] = { 14static const struct trans_ctl_table trans_random_table[] = {
15 { RANDOM_POOLSIZE, "poolsize" }, 15 { RANDOM_POOLSIZE, "poolsize" },
16 { RANDOM_ENTROPY_COUNT, "entropy_avail" }, 16 { RANDOM_ENTROPY_COUNT, "entropy_avail" },
17 { RANDOM_READ_THRESH, "read_wakeup_threshold" }, 17 { RANDOM_READ_THRESH, "read_wakeup_threshold" },
@@ -21,13 +21,13 @@ static struct trans_ctl_table trans_random_table[] = {
21 {} 21 {}
22}; 22};
23 23
24static struct trans_ctl_table trans_pty_table[] = { 24static const struct trans_ctl_table trans_pty_table[] = {
25 { PTY_MAX, "max" }, 25 { PTY_MAX, "max" },
26 { PTY_NR, "nr" }, 26 { PTY_NR, "nr" },
27 {} 27 {}
28}; 28};
29 29
30static struct trans_ctl_table trans_kern_table[] = { 30static const struct trans_ctl_table trans_kern_table[] = {
31 { KERN_OSTYPE, "ostype" }, 31 { KERN_OSTYPE, "ostype" },
32 { KERN_OSRELEASE, "osrelease" }, 32 { KERN_OSRELEASE, "osrelease" },
33 /* KERN_OSREV not used */ 33 /* KERN_OSREV not used */
@@ -107,7 +107,7 @@ static struct trans_ctl_table trans_kern_table[] = {
107 {} 107 {}
108}; 108};
109 109
110static struct trans_ctl_table trans_vm_table[] = { 110static const struct trans_ctl_table trans_vm_table[] = {
111 { VM_OVERCOMMIT_MEMORY, "overcommit_memory" }, 111 { VM_OVERCOMMIT_MEMORY, "overcommit_memory" },
112 { VM_PAGE_CLUSTER, "page-cluster" }, 112 { VM_PAGE_CLUSTER, "page-cluster" },
113 { VM_DIRTY_BACKGROUND, "dirty_background_ratio" }, 113 { VM_DIRTY_BACKGROUND, "dirty_background_ratio" },
@@ -139,7 +139,7 @@ static struct trans_ctl_table trans_vm_table[] = {
139 {} 139 {}
140}; 140};
141 141
142static struct trans_ctl_table trans_net_core_table[] = { 142static const struct trans_ctl_table trans_net_core_table[] = {
143 { NET_CORE_WMEM_MAX, "wmem_max" }, 143 { NET_CORE_WMEM_MAX, "wmem_max" },
144 { NET_CORE_RMEM_MAX, "rmem_max" }, 144 { NET_CORE_RMEM_MAX, "rmem_max" },
145 { NET_CORE_WMEM_DEFAULT, "wmem_default" }, 145 { NET_CORE_WMEM_DEFAULT, "wmem_default" },
@@ -165,14 +165,14 @@ static struct trans_ctl_table trans_net_core_table[] = {
165 {}, 165 {},
166}; 166};
167 167
168static struct trans_ctl_table trans_net_unix_table[] = { 168static const struct trans_ctl_table trans_net_unix_table[] = {
169 /* NET_UNIX_DESTROY_DELAY unused */ 169 /* NET_UNIX_DESTROY_DELAY unused */
170 /* NET_UNIX_DELETE_DELAY unused */ 170 /* NET_UNIX_DELETE_DELAY unused */
171 { NET_UNIX_MAX_DGRAM_QLEN, "max_dgram_qlen" }, 171 { NET_UNIX_MAX_DGRAM_QLEN, "max_dgram_qlen" },
172 {} 172 {}
173}; 173};
174 174
175static struct trans_ctl_table trans_net_ipv4_route_table[] = { 175static const struct trans_ctl_table trans_net_ipv4_route_table[] = {
176 { NET_IPV4_ROUTE_FLUSH, "flush" }, 176 { NET_IPV4_ROUTE_FLUSH, "flush" },
177 { NET_IPV4_ROUTE_MIN_DELAY, "min_delay" }, 177 { NET_IPV4_ROUTE_MIN_DELAY, "min_delay" },
178 { NET_IPV4_ROUTE_MAX_DELAY, "max_delay" }, 178 { NET_IPV4_ROUTE_MAX_DELAY, "max_delay" },
@@ -195,7 +195,7 @@ static struct trans_ctl_table trans_net_ipv4_route_table[] = {
195 {} 195 {}
196}; 196};
197 197
198static struct trans_ctl_table trans_net_ipv4_conf_vars_table[] = { 198static const struct trans_ctl_table trans_net_ipv4_conf_vars_table[] = {
199 { NET_IPV4_CONF_FORWARDING, "forwarding" }, 199 { NET_IPV4_CONF_FORWARDING, "forwarding" },
200 { NET_IPV4_CONF_MC_FORWARDING, "mc_forwarding" }, 200 { NET_IPV4_CONF_MC_FORWARDING, "mc_forwarding" },
201 201
@@ -222,14 +222,14 @@ static struct trans_ctl_table trans_net_ipv4_conf_vars_table[] = {
222 {} 222 {}
223}; 223};
224 224
225static struct trans_ctl_table trans_net_ipv4_conf_table[] = { 225static const struct trans_ctl_table trans_net_ipv4_conf_table[] = {
226 { NET_PROTO_CONF_ALL, "all", trans_net_ipv4_conf_vars_table }, 226 { NET_PROTO_CONF_ALL, "all", trans_net_ipv4_conf_vars_table },
227 { NET_PROTO_CONF_DEFAULT, "default", trans_net_ipv4_conf_vars_table }, 227 { NET_PROTO_CONF_DEFAULT, "default", trans_net_ipv4_conf_vars_table },
228 { 0, NULL, trans_net_ipv4_conf_vars_table }, 228 { 0, NULL, trans_net_ipv4_conf_vars_table },
229 {} 229 {}
230}; 230};
231 231
232static struct trans_ctl_table trans_net_neigh_vars_table[] = { 232static const struct trans_ctl_table trans_net_neigh_vars_table[] = {
233 { NET_NEIGH_MCAST_SOLICIT, "mcast_solicit" }, 233 { NET_NEIGH_MCAST_SOLICIT, "mcast_solicit" },
234 { NET_NEIGH_UCAST_SOLICIT, "ucast_solicit" }, 234 { NET_NEIGH_UCAST_SOLICIT, "ucast_solicit" },
235 { NET_NEIGH_APP_SOLICIT, "app_solicit" }, 235 { NET_NEIGH_APP_SOLICIT, "app_solicit" },
@@ -251,13 +251,13 @@ static struct trans_ctl_table trans_net_neigh_vars_table[] = {
251 {} 251 {}
252}; 252};
253 253
254static struct trans_ctl_table trans_net_neigh_table[] = { 254static const struct trans_ctl_table trans_net_neigh_table[] = {
255 { NET_PROTO_CONF_DEFAULT, "default", trans_net_neigh_vars_table }, 255 { NET_PROTO_CONF_DEFAULT, "default", trans_net_neigh_vars_table },
256 { 0, NULL, trans_net_neigh_vars_table }, 256 { 0, NULL, trans_net_neigh_vars_table },
257 {} 257 {}
258}; 258};
259 259
260static struct trans_ctl_table trans_net_ipv4_netfilter_table[] = { 260static const struct trans_ctl_table trans_net_ipv4_netfilter_table[] = {
261 { NET_IPV4_NF_CONNTRACK_MAX, "ip_conntrack_max" }, 261 { NET_IPV4_NF_CONNTRACK_MAX, "ip_conntrack_max" },
262 262
263 { NET_IPV4_NF_CONNTRACK_TCP_TIMEOUT_SYN_SENT, "ip_conntrack_tcp_timeout_syn_sent" }, 263 { NET_IPV4_NF_CONNTRACK_TCP_TIMEOUT_SYN_SENT, "ip_conntrack_tcp_timeout_syn_sent" },
@@ -294,7 +294,7 @@ static struct trans_ctl_table trans_net_ipv4_netfilter_table[] = {
294 {} 294 {}
295}; 295};
296 296
297static struct trans_ctl_table trans_net_ipv4_table[] = { 297static const struct trans_ctl_table trans_net_ipv4_table[] = {
298 { NET_IPV4_FORWARD, "ip_forward" }, 298 { NET_IPV4_FORWARD, "ip_forward" },
299 { NET_IPV4_DYNADDR, "ip_dynaddr" }, 299 { NET_IPV4_DYNADDR, "ip_dynaddr" },
300 300
@@ -393,13 +393,13 @@ static struct trans_ctl_table trans_net_ipv4_table[] = {
393 {} 393 {}
394}; 394};
395 395
396static struct trans_ctl_table trans_net_ipx_table[] = { 396static const struct trans_ctl_table trans_net_ipx_table[] = {
397 { NET_IPX_PPROP_BROADCASTING, "ipx_pprop_broadcasting" }, 397 { NET_IPX_PPROP_BROADCASTING, "ipx_pprop_broadcasting" },
398 /* NET_IPX_FORWARDING unused */ 398 /* NET_IPX_FORWARDING unused */
399 {} 399 {}
400}; 400};
401 401
402static struct trans_ctl_table trans_net_atalk_table[] = { 402static const struct trans_ctl_table trans_net_atalk_table[] = {
403 { NET_ATALK_AARP_EXPIRY_TIME, "aarp-expiry-time" }, 403 { NET_ATALK_AARP_EXPIRY_TIME, "aarp-expiry-time" },
404 { NET_ATALK_AARP_TICK_TIME, "aarp-tick-time" }, 404 { NET_ATALK_AARP_TICK_TIME, "aarp-tick-time" },
405 { NET_ATALK_AARP_RETRANSMIT_LIMIT, "aarp-retransmit-limit" }, 405 { NET_ATALK_AARP_RETRANSMIT_LIMIT, "aarp-retransmit-limit" },
@@ -407,7 +407,7 @@ static struct trans_ctl_table trans_net_atalk_table[] = {
407 {}, 407 {},
408}; 408};
409 409
410static struct trans_ctl_table trans_net_netrom_table[] = { 410static const struct trans_ctl_table trans_net_netrom_table[] = {
411 { NET_NETROM_DEFAULT_PATH_QUALITY, "default_path_quality" }, 411 { NET_NETROM_DEFAULT_PATH_QUALITY, "default_path_quality" },
412 { NET_NETROM_OBSOLESCENCE_COUNT_INITIALISER, "obsolescence_count_initialiser" }, 412 { NET_NETROM_OBSOLESCENCE_COUNT_INITIALISER, "obsolescence_count_initialiser" },
413 { NET_NETROM_NETWORK_TTL_INITIALISER, "network_ttl_initialiser" }, 413 { NET_NETROM_NETWORK_TTL_INITIALISER, "network_ttl_initialiser" },
@@ -423,7 +423,7 @@ static struct trans_ctl_table trans_net_netrom_table[] = {
423 {} 423 {}
424}; 424};
425 425
426static struct trans_ctl_table trans_net_ax25_param_table[] = { 426static const struct trans_ctl_table trans_net_ax25_param_table[] = {
427 { NET_AX25_IP_DEFAULT_MODE, "ip_default_mode" }, 427 { NET_AX25_IP_DEFAULT_MODE, "ip_default_mode" },
428 { NET_AX25_DEFAULT_MODE, "ax25_default_mode" }, 428 { NET_AX25_DEFAULT_MODE, "ax25_default_mode" },
429 { NET_AX25_BACKOFF_TYPE, "backoff_type" }, 429 { NET_AX25_BACKOFF_TYPE, "backoff_type" },
@@ -441,12 +441,12 @@ static struct trans_ctl_table trans_net_ax25_param_table[] = {
441 {} 441 {}
442}; 442};
443 443
444static struct trans_ctl_table trans_net_ax25_table[] = { 444static const struct trans_ctl_table trans_net_ax25_table[] = {
445 { 0, NULL, trans_net_ax25_param_table }, 445 { 0, NULL, trans_net_ax25_param_table },
446 {} 446 {}
447}; 447};
448 448
449static struct trans_ctl_table trans_net_bridge_table[] = { 449static const struct trans_ctl_table trans_net_bridge_table[] = {
450 { NET_BRIDGE_NF_CALL_ARPTABLES, "bridge-nf-call-arptables" }, 450 { NET_BRIDGE_NF_CALL_ARPTABLES, "bridge-nf-call-arptables" },
451 { NET_BRIDGE_NF_CALL_IPTABLES, "bridge-nf-call-iptables" }, 451 { NET_BRIDGE_NF_CALL_IPTABLES, "bridge-nf-call-iptables" },
452 { NET_BRIDGE_NF_CALL_IP6TABLES, "bridge-nf-call-ip6tables" }, 452 { NET_BRIDGE_NF_CALL_IP6TABLES, "bridge-nf-call-ip6tables" },
@@ -455,7 +455,7 @@ static struct trans_ctl_table trans_net_bridge_table[] = {
455 {} 455 {}
456}; 456};
457 457
458static struct trans_ctl_table trans_net_rose_table[] = { 458static const struct trans_ctl_table trans_net_rose_table[] = {
459 { NET_ROSE_RESTART_REQUEST_TIMEOUT, "restart_request_timeout" }, 459 { NET_ROSE_RESTART_REQUEST_TIMEOUT, "restart_request_timeout" },
460 { NET_ROSE_CALL_REQUEST_TIMEOUT, "call_request_timeout" }, 460 { NET_ROSE_CALL_REQUEST_TIMEOUT, "call_request_timeout" },
461 { NET_ROSE_RESET_REQUEST_TIMEOUT, "reset_request_timeout" }, 461 { NET_ROSE_RESET_REQUEST_TIMEOUT, "reset_request_timeout" },
@@ -469,7 +469,7 @@ static struct trans_ctl_table trans_net_rose_table[] = {
469 {} 469 {}
470}; 470};
471 471
472static struct trans_ctl_table trans_net_ipv6_conf_var_table[] = { 472static const struct trans_ctl_table trans_net_ipv6_conf_var_table[] = {
473 { NET_IPV6_FORWARDING, "forwarding" }, 473 { NET_IPV6_FORWARDING, "forwarding" },
474 { NET_IPV6_HOP_LIMIT, "hop_limit" }, 474 { NET_IPV6_HOP_LIMIT, "hop_limit" },
475 { NET_IPV6_MTU, "mtu" }, 475 { NET_IPV6_MTU, "mtu" },
@@ -497,14 +497,14 @@ static struct trans_ctl_table trans_net_ipv6_conf_var_table[] = {
497 {} 497 {}
498}; 498};
499 499
500static struct trans_ctl_table trans_net_ipv6_conf_table[] = { 500static const struct trans_ctl_table trans_net_ipv6_conf_table[] = {
501 { NET_PROTO_CONF_ALL, "all", trans_net_ipv6_conf_var_table }, 501 { NET_PROTO_CONF_ALL, "all", trans_net_ipv6_conf_var_table },
502 { NET_PROTO_CONF_DEFAULT, "default", trans_net_ipv6_conf_var_table }, 502 { NET_PROTO_CONF_DEFAULT, "default", trans_net_ipv6_conf_var_table },
503 { 0, NULL, trans_net_ipv6_conf_var_table }, 503 { 0, NULL, trans_net_ipv6_conf_var_table },
504 {} 504 {}
505}; 505};
506 506
507static struct trans_ctl_table trans_net_ipv6_route_table[] = { 507static const struct trans_ctl_table trans_net_ipv6_route_table[] = {
508 { NET_IPV6_ROUTE_FLUSH, "flush" }, 508 { NET_IPV6_ROUTE_FLUSH, "flush" },
509 { NET_IPV6_ROUTE_GC_THRESH, "gc_thresh" }, 509 { NET_IPV6_ROUTE_GC_THRESH, "gc_thresh" },
510 { NET_IPV6_ROUTE_MAX_SIZE, "max_size" }, 510 { NET_IPV6_ROUTE_MAX_SIZE, "max_size" },
@@ -518,12 +518,12 @@ static struct trans_ctl_table trans_net_ipv6_route_table[] = {
518 {} 518 {}
519}; 519};
520 520
521static struct trans_ctl_table trans_net_ipv6_icmp_table[] = { 521static const struct trans_ctl_table trans_net_ipv6_icmp_table[] = {
522 { NET_IPV6_ICMP_RATELIMIT, "ratelimit" }, 522 { NET_IPV6_ICMP_RATELIMIT, "ratelimit" },
523 {} 523 {}
524}; 524};
525 525
526static struct trans_ctl_table trans_net_ipv6_table[] = { 526static const struct trans_ctl_table trans_net_ipv6_table[] = {
527 { NET_IPV6_CONF, "conf", trans_net_ipv6_conf_table }, 527 { NET_IPV6_CONF, "conf", trans_net_ipv6_conf_table },
528 { NET_IPV6_NEIGH, "neigh", trans_net_neigh_table }, 528 { NET_IPV6_NEIGH, "neigh", trans_net_neigh_table },
529 { NET_IPV6_ROUTE, "route", trans_net_ipv6_route_table }, 529 { NET_IPV6_ROUTE, "route", trans_net_ipv6_route_table },
@@ -538,7 +538,7 @@ static struct trans_ctl_table trans_net_ipv6_table[] = {
538 {} 538 {}
539}; 539};
540 540
541static struct trans_ctl_table trans_net_x25_table[] = { 541static const struct trans_ctl_table trans_net_x25_table[] = {
542 { NET_X25_RESTART_REQUEST_TIMEOUT, "restart_request_timeout" }, 542 { NET_X25_RESTART_REQUEST_TIMEOUT, "restart_request_timeout" },
543 { NET_X25_CALL_REQUEST_TIMEOUT, "call_request_timeout" }, 543 { NET_X25_CALL_REQUEST_TIMEOUT, "call_request_timeout" },
544 { NET_X25_RESET_REQUEST_TIMEOUT, "reset_request_timeout" }, 544 { NET_X25_RESET_REQUEST_TIMEOUT, "reset_request_timeout" },
@@ -548,13 +548,13 @@ static struct trans_ctl_table trans_net_x25_table[] = {
548 {} 548 {}
549}; 549};
550 550
551static struct trans_ctl_table trans_net_tr_table[] = { 551static const struct trans_ctl_table trans_net_tr_table[] = {
552 { NET_TR_RIF_TIMEOUT, "rif_timeout" }, 552 { NET_TR_RIF_TIMEOUT, "rif_timeout" },
553 {} 553 {}
554}; 554};
555 555
556 556
557static struct trans_ctl_table trans_net_decnet_conf_vars[] = { 557static const struct trans_ctl_table trans_net_decnet_conf_vars[] = {
558 { NET_DECNET_CONF_DEV_FORWARDING, "forwarding" }, 558 { NET_DECNET_CONF_DEV_FORWARDING, "forwarding" },
559 { NET_DECNET_CONF_DEV_PRIORITY, "priority" }, 559 { NET_DECNET_CONF_DEV_PRIORITY, "priority" },
560 { NET_DECNET_CONF_DEV_T2, "t2" }, 560 { NET_DECNET_CONF_DEV_T2, "t2" },
@@ -562,12 +562,12 @@ static struct trans_ctl_table trans_net_decnet_conf_vars[] = {
562 {} 562 {}
563}; 563};
564 564
565static struct trans_ctl_table trans_net_decnet_conf[] = { 565static const struct trans_ctl_table trans_net_decnet_conf[] = {
566 { 0, NULL, trans_net_decnet_conf_vars }, 566 { 0, NULL, trans_net_decnet_conf_vars },
567 {} 567 {}
568}; 568};
569 569
570static struct trans_ctl_table trans_net_decnet_table[] = { 570static const struct trans_ctl_table trans_net_decnet_table[] = {
571 { NET_DECNET_CONF, "conf", trans_net_decnet_conf }, 571 { NET_DECNET_CONF, "conf", trans_net_decnet_conf },
572 { NET_DECNET_NODE_ADDRESS, "node_address" }, 572 { NET_DECNET_NODE_ADDRESS, "node_address" },
573 { NET_DECNET_NODE_NAME, "node_name" }, 573 { NET_DECNET_NODE_NAME, "node_name" },
@@ -585,7 +585,7 @@ static struct trans_ctl_table trans_net_decnet_table[] = {
585 {} 585 {}
586}; 586};
587 587
588static struct trans_ctl_table trans_net_sctp_table[] = { 588static const struct trans_ctl_table trans_net_sctp_table[] = {
589 { NET_SCTP_RTO_INITIAL, "rto_initial" }, 589 { NET_SCTP_RTO_INITIAL, "rto_initial" },
590 { NET_SCTP_RTO_MIN, "rto_min" }, 590 { NET_SCTP_RTO_MIN, "rto_min" },
591 { NET_SCTP_RTO_MAX, "rto_max" }, 591 { NET_SCTP_RTO_MAX, "rto_max" },
@@ -606,7 +606,7 @@ static struct trans_ctl_table trans_net_sctp_table[] = {
606 {} 606 {}
607}; 607};
608 608
609static struct trans_ctl_table trans_net_llc_llc2_timeout_table[] = { 609static const struct trans_ctl_table trans_net_llc_llc2_timeout_table[] = {
610 { NET_LLC2_ACK_TIMEOUT, "ack" }, 610 { NET_LLC2_ACK_TIMEOUT, "ack" },
611 { NET_LLC2_P_TIMEOUT, "p" }, 611 { NET_LLC2_P_TIMEOUT, "p" },
612 { NET_LLC2_REJ_TIMEOUT, "rej" }, 612 { NET_LLC2_REJ_TIMEOUT, "rej" },
@@ -614,23 +614,23 @@ static struct trans_ctl_table trans_net_llc_llc2_timeout_table[] = {
614 {} 614 {}
615}; 615};
616 616
617static struct trans_ctl_table trans_net_llc_station_table[] = { 617static const struct trans_ctl_table trans_net_llc_station_table[] = {
618 { NET_LLC_STATION_ACK_TIMEOUT, "ack_timeout" }, 618 { NET_LLC_STATION_ACK_TIMEOUT, "ack_timeout" },
619 {} 619 {}
620}; 620};
621 621
622static struct trans_ctl_table trans_net_llc_llc2_table[] = { 622static const struct trans_ctl_table trans_net_llc_llc2_table[] = {
623 { NET_LLC2, "timeout", trans_net_llc_llc2_timeout_table }, 623 { NET_LLC2, "timeout", trans_net_llc_llc2_timeout_table },
624 {} 624 {}
625}; 625};
626 626
627static struct trans_ctl_table trans_net_llc_table[] = { 627static const struct trans_ctl_table trans_net_llc_table[] = {
628 { NET_LLC2, "llc2", trans_net_llc_llc2_table }, 628 { NET_LLC2, "llc2", trans_net_llc_llc2_table },
629 { NET_LLC_STATION, "station", trans_net_llc_station_table }, 629 { NET_LLC_STATION, "station", trans_net_llc_station_table },
630 {} 630 {}
631}; 631};
632 632
633static struct trans_ctl_table trans_net_netfilter_table[] = { 633static const struct trans_ctl_table trans_net_netfilter_table[] = {
634 { NET_NF_CONNTRACK_MAX, "nf_conntrack_max" }, 634 { NET_NF_CONNTRACK_MAX, "nf_conntrack_max" },
635 { NET_NF_CONNTRACK_TCP_TIMEOUT_SYN_SENT, "nf_conntrack_tcp_timeout_syn_sent" }, 635 { NET_NF_CONNTRACK_TCP_TIMEOUT_SYN_SENT, "nf_conntrack_tcp_timeout_syn_sent" },
636 { NET_NF_CONNTRACK_TCP_TIMEOUT_SYN_RECV, "nf_conntrack_tcp_timeout_syn_recv" }, 636 { NET_NF_CONNTRACK_TCP_TIMEOUT_SYN_RECV, "nf_conntrack_tcp_timeout_syn_recv" },
@@ -667,12 +667,12 @@ static struct trans_ctl_table trans_net_netfilter_table[] = {
667 {} 667 {}
668}; 668};
669 669
670static struct trans_ctl_table trans_net_dccp_table[] = { 670static const struct trans_ctl_table trans_net_dccp_table[] = {
671 { NET_DCCP_DEFAULT, "default" }, 671 { NET_DCCP_DEFAULT, "default" },
672 {} 672 {}
673}; 673};
674 674
675static struct trans_ctl_table trans_net_irda_table[] = { 675static const struct trans_ctl_table trans_net_irda_table[] = {
676 { NET_IRDA_DISCOVERY, "discovery" }, 676 { NET_IRDA_DISCOVERY, "discovery" },
677 { NET_IRDA_DEVNAME, "devname" }, 677 { NET_IRDA_DEVNAME, "devname" },
678 { NET_IRDA_DEBUG, "debug" }, 678 { NET_IRDA_DEBUG, "debug" },
@@ -690,7 +690,7 @@ static struct trans_ctl_table trans_net_irda_table[] = {
690 {} 690 {}
691}; 691};
692 692
693static struct trans_ctl_table trans_net_table[] = { 693static const struct trans_ctl_table trans_net_table[] = {
694 { NET_CORE, "core", trans_net_core_table }, 694 { NET_CORE, "core", trans_net_core_table },
695 /* NET_ETHER not used */ 695 /* NET_ETHER not used */
696 /* NET_802 not used */ 696 /* NET_802 not used */
@@ -716,7 +716,7 @@ static struct trans_ctl_table trans_net_table[] = {
716 {} 716 {}
717}; 717};
718 718
719static struct trans_ctl_table trans_fs_quota_table[] = { 719static const struct trans_ctl_table trans_fs_quota_table[] = {
720 { FS_DQ_LOOKUPS, "lookups" }, 720 { FS_DQ_LOOKUPS, "lookups" },
721 { FS_DQ_DROPS, "drops" }, 721 { FS_DQ_DROPS, "drops" },
722 { FS_DQ_READS, "reads" }, 722 { FS_DQ_READS, "reads" },
@@ -729,7 +729,7 @@ static struct trans_ctl_table trans_fs_quota_table[] = {
729 {} 729 {}
730}; 730};
731 731
732static struct trans_ctl_table trans_fs_xfs_table[] = { 732static const struct trans_ctl_table trans_fs_xfs_table[] = {
733 { XFS_RESTRICT_CHOWN, "restrict_chown" }, 733 { XFS_RESTRICT_CHOWN, "restrict_chown" },
734 { XFS_SGID_INHERIT, "irix_sgid_inherit" }, 734 { XFS_SGID_INHERIT, "irix_sgid_inherit" },
735 { XFS_SYMLINK_MODE, "irix_symlink_mode" }, 735 { XFS_SYMLINK_MODE, "irix_symlink_mode" },
@@ -750,24 +750,24 @@ static struct trans_ctl_table trans_fs_xfs_table[] = {
750 {} 750 {}
751}; 751};
752 752
753static struct trans_ctl_table trans_fs_ocfs2_nm_table[] = { 753static const struct trans_ctl_table trans_fs_ocfs2_nm_table[] = {
754 { 1, "hb_ctl_path" }, 754 { 1, "hb_ctl_path" },
755 {} 755 {}
756}; 756};
757 757
758static struct trans_ctl_table trans_fs_ocfs2_table[] = { 758static const struct trans_ctl_table trans_fs_ocfs2_table[] = {
759 { 1, "nm", trans_fs_ocfs2_nm_table }, 759 { 1, "nm", trans_fs_ocfs2_nm_table },
760 {} 760 {}
761}; 761};
762 762
763static struct trans_ctl_table trans_inotify_table[] = { 763static const struct trans_ctl_table trans_inotify_table[] = {
764 { INOTIFY_MAX_USER_INSTANCES, "max_user_instances" }, 764 { INOTIFY_MAX_USER_INSTANCES, "max_user_instances" },
765 { INOTIFY_MAX_USER_WATCHES, "max_user_watches" }, 765 { INOTIFY_MAX_USER_WATCHES, "max_user_watches" },
766 { INOTIFY_MAX_QUEUED_EVENTS, "max_queued_events" }, 766 { INOTIFY_MAX_QUEUED_EVENTS, "max_queued_events" },
767 {} 767 {}
768}; 768};
769 769
770static struct trans_ctl_table trans_fs_table[] = { 770static const struct trans_ctl_table trans_fs_table[] = {
771 { FS_NRINODE, "inode-nr" }, 771 { FS_NRINODE, "inode-nr" },
772 { FS_STATINODE, "inode-state" }, 772 { FS_STATINODE, "inode-state" },
773 /* FS_MAXINODE unused */ 773 /* FS_MAXINODE unused */
@@ -793,11 +793,11 @@ static struct trans_ctl_table trans_fs_table[] = {
793 {} 793 {}
794}; 794};
795 795
796static struct trans_ctl_table trans_debug_table[] = { 796static const struct trans_ctl_table trans_debug_table[] = {
797 {} 797 {}
798}; 798};
799 799
800static struct trans_ctl_table trans_cdrom_table[] = { 800static const struct trans_ctl_table trans_cdrom_table[] = {
801 { DEV_CDROM_INFO, "info" }, 801 { DEV_CDROM_INFO, "info" },
802 { DEV_CDROM_AUTOCLOSE, "autoclose" }, 802 { DEV_CDROM_AUTOCLOSE, "autoclose" },
803 { DEV_CDROM_AUTOEJECT, "autoeject" }, 803 { DEV_CDROM_AUTOEJECT, "autoeject" },
@@ -807,12 +807,12 @@ static struct trans_ctl_table trans_cdrom_table[] = {
807 {} 807 {}
808}; 808};
809 809
810static struct trans_ctl_table trans_ipmi_table[] = { 810static const struct trans_ctl_table trans_ipmi_table[] = {
811 { DEV_IPMI_POWEROFF_POWERCYCLE, "poweroff_powercycle" }, 811 { DEV_IPMI_POWEROFF_POWERCYCLE, "poweroff_powercycle" },
812 {} 812 {}
813}; 813};
814 814
815static struct trans_ctl_table trans_mac_hid_files[] = { 815static const struct trans_ctl_table trans_mac_hid_files[] = {
816 /* DEV_MAC_HID_KEYBOARD_SENDS_LINUX_KEYCODES unused */ 816 /* DEV_MAC_HID_KEYBOARD_SENDS_LINUX_KEYCODES unused */
817 /* DEV_MAC_HID_KEYBOARD_LOCK_KEYCODES unused */ 817 /* DEV_MAC_HID_KEYBOARD_LOCK_KEYCODES unused */
818 { DEV_MAC_HID_MOUSE_BUTTON_EMULATION, "mouse_button_emulation" }, 818 { DEV_MAC_HID_MOUSE_BUTTON_EMULATION, "mouse_button_emulation" },
@@ -822,35 +822,35 @@ static struct trans_ctl_table trans_mac_hid_files[] = {
822 {} 822 {}
823}; 823};
824 824
825static struct trans_ctl_table trans_raid_table[] = { 825static const struct trans_ctl_table trans_raid_table[] = {
826 { DEV_RAID_SPEED_LIMIT_MIN, "speed_limit_min" }, 826 { DEV_RAID_SPEED_LIMIT_MIN, "speed_limit_min" },
827 { DEV_RAID_SPEED_LIMIT_MAX, "speed_limit_max" }, 827 { DEV_RAID_SPEED_LIMIT_MAX, "speed_limit_max" },
828 {} 828 {}
829}; 829};
830 830
831static struct trans_ctl_table trans_scsi_table[] = { 831static const struct trans_ctl_table trans_scsi_table[] = {
832 { DEV_SCSI_LOGGING_LEVEL, "logging_level" }, 832 { DEV_SCSI_LOGGING_LEVEL, "logging_level" },
833 {} 833 {}
834}; 834};
835 835
836static struct trans_ctl_table trans_parport_default_table[] = { 836static const struct trans_ctl_table trans_parport_default_table[] = {
837 { DEV_PARPORT_DEFAULT_TIMESLICE, "timeslice" }, 837 { DEV_PARPORT_DEFAULT_TIMESLICE, "timeslice" },
838 { DEV_PARPORT_DEFAULT_SPINTIME, "spintime" }, 838 { DEV_PARPORT_DEFAULT_SPINTIME, "spintime" },
839 {} 839 {}
840}; 840};
841 841
842static struct trans_ctl_table trans_parport_device_table[] = { 842static const struct trans_ctl_table trans_parport_device_table[] = {
843 { DEV_PARPORT_DEVICE_TIMESLICE, "timeslice" }, 843 { DEV_PARPORT_DEVICE_TIMESLICE, "timeslice" },
844 {} 844 {}
845}; 845};
846 846
847static struct trans_ctl_table trans_parport_devices_table[] = { 847static const struct trans_ctl_table trans_parport_devices_table[] = {
848 { DEV_PARPORT_DEVICES_ACTIVE, "active" }, 848 { DEV_PARPORT_DEVICES_ACTIVE, "active" },
849 { 0, NULL, trans_parport_device_table }, 849 { 0, NULL, trans_parport_device_table },
850 {} 850 {}
851}; 851};
852 852
853static struct trans_ctl_table trans_parport_parport_table[] = { 853static const struct trans_ctl_table trans_parport_parport_table[] = {
854 { DEV_PARPORT_SPINTIME, "spintime" }, 854 { DEV_PARPORT_SPINTIME, "spintime" },
855 { DEV_PARPORT_BASE_ADDR, "base-addr" }, 855 { DEV_PARPORT_BASE_ADDR, "base-addr" },
856 { DEV_PARPORT_IRQ, "irq" }, 856 { DEV_PARPORT_IRQ, "irq" },
@@ -864,13 +864,13 @@ static struct trans_ctl_table trans_parport_parport_table[] = {
864 { DEV_PARPORT_AUTOPROBE + 4, "autoprobe3" }, 864 { DEV_PARPORT_AUTOPROBE + 4, "autoprobe3" },
865 {} 865 {}
866}; 866};
867static struct trans_ctl_table trans_parport_table[] = { 867static const struct trans_ctl_table trans_parport_table[] = {
868 { DEV_PARPORT_DEFAULT, "default", trans_parport_default_table }, 868 { DEV_PARPORT_DEFAULT, "default", trans_parport_default_table },
869 { 0, NULL, trans_parport_parport_table }, 869 { 0, NULL, trans_parport_parport_table },
870 {} 870 {}
871}; 871};
872 872
873static struct trans_ctl_table trans_dev_table[] = { 873static const struct trans_ctl_table trans_dev_table[] = {
874 { DEV_CDROM, "cdrom", trans_cdrom_table }, 874 { DEV_CDROM, "cdrom", trans_cdrom_table },
875 /* DEV_HWMON unused */ 875 /* DEV_HWMON unused */
876 { DEV_PARPORT, "parport", trans_parport_table }, 876 { DEV_PARPORT, "parport", trans_parport_table },
@@ -881,19 +881,19 @@ static struct trans_ctl_table trans_dev_table[] = {
881 {} 881 {}
882}; 882};
883 883
884static struct trans_ctl_table trans_bus_isa_table[] = { 884static const struct trans_ctl_table trans_bus_isa_table[] = {
885 { BUS_ISA_MEM_BASE, "membase" }, 885 { BUS_ISA_MEM_BASE, "membase" },
886 { BUS_ISA_PORT_BASE, "portbase" }, 886 { BUS_ISA_PORT_BASE, "portbase" },
887 { BUS_ISA_PORT_SHIFT, "portshift" }, 887 { BUS_ISA_PORT_SHIFT, "portshift" },
888 {} 888 {}
889}; 889};
890 890
891static struct trans_ctl_table trans_bus_table[] = { 891static const struct trans_ctl_table trans_bus_table[] = {
892 { CTL_BUS_ISA, "isa", trans_bus_isa_table }, 892 { CTL_BUS_ISA, "isa", trans_bus_isa_table },
893 {} 893 {}
894}; 894};
895 895
896static struct trans_ctl_table trans_arlan_conf_table0[] = { 896static const struct trans_ctl_table trans_arlan_conf_table0[] = {
897 { 1, "spreadingCode" }, 897 { 1, "spreadingCode" },
898 { 2, "channelNumber" }, 898 { 2, "channelNumber" },
899 { 3, "scramblingDisable" }, 899 { 3, "scramblingDisable" },
@@ -964,7 +964,7 @@ static struct trans_ctl_table trans_arlan_conf_table0[] = {
964 {} 964 {}
965}; 965};
966 966
967static struct trans_ctl_table trans_arlan_conf_table1[] = { 967static const struct trans_ctl_table trans_arlan_conf_table1[] = {
968 { 1, "spreadingCode" }, 968 { 1, "spreadingCode" },
969 { 2, "channelNumber" }, 969 { 2, "channelNumber" },
970 { 3, "scramblingDisable" }, 970 { 3, "scramblingDisable" },
@@ -1035,7 +1035,7 @@ static struct trans_ctl_table trans_arlan_conf_table1[] = {
1035 {} 1035 {}
1036}; 1036};
1037 1037
1038static struct trans_ctl_table trans_arlan_conf_table2[] = { 1038static const struct trans_ctl_table trans_arlan_conf_table2[] = {
1039 { 1, "spreadingCode" }, 1039 { 1, "spreadingCode" },
1040 { 2, "channelNumber" }, 1040 { 2, "channelNumber" },
1041 { 3, "scramblingDisable" }, 1041 { 3, "scramblingDisable" },
@@ -1106,7 +1106,7 @@ static struct trans_ctl_table trans_arlan_conf_table2[] = {
1106 {} 1106 {}
1107}; 1107};
1108 1108
1109static struct trans_ctl_table trans_arlan_conf_table3[] = { 1109static const struct trans_ctl_table trans_arlan_conf_table3[] = {
1110 { 1, "spreadingCode" }, 1110 { 1, "spreadingCode" },
1111 { 2, "channelNumber" }, 1111 { 2, "channelNumber" },
1112 { 3, "scramblingDisable" }, 1112 { 3, "scramblingDisable" },
@@ -1177,7 +1177,7 @@ static struct trans_ctl_table trans_arlan_conf_table3[] = {
1177 {} 1177 {}
1178}; 1178};
1179 1179
1180static struct trans_ctl_table trans_arlan_table[] = { 1180static const struct trans_ctl_table trans_arlan_table[] = {
1181 { 1, "arlan0", trans_arlan_conf_table0 }, 1181 { 1, "arlan0", trans_arlan_conf_table0 },
1182 { 2, "arlan1", trans_arlan_conf_table1 }, 1182 { 2, "arlan1", trans_arlan_conf_table1 },
1183 { 3, "arlan2", trans_arlan_conf_table2 }, 1183 { 3, "arlan2", trans_arlan_conf_table2 },
@@ -1185,13 +1185,13 @@ static struct trans_ctl_table trans_arlan_table[] = {
1185 {} 1185 {}
1186}; 1186};
1187 1187
1188static struct trans_ctl_table trans_s390dbf_table[] = { 1188static const struct trans_ctl_table trans_s390dbf_table[] = {
1189 { 5678 /* CTL_S390DBF_STOPPABLE */, "debug_stoppable" }, 1189 { 5678 /* CTL_S390DBF_STOPPABLE */, "debug_stoppable" },
1190 { 5679 /* CTL_S390DBF_ACTIVE */, "debug_active" }, 1190 { 5679 /* CTL_S390DBF_ACTIVE */, "debug_active" },
1191 {} 1191 {}
1192}; 1192};
1193 1193
1194static struct trans_ctl_table trans_sunrpc_table[] = { 1194static const struct trans_ctl_table trans_sunrpc_table[] = {
1195 { CTL_RPCDEBUG, "rpc_debug" }, 1195 { CTL_RPCDEBUG, "rpc_debug" },
1196 { CTL_NFSDEBUG, "nfs_debug" }, 1196 { CTL_NFSDEBUG, "nfs_debug" },
1197 { CTL_NFSDDEBUG, "nfsd_debug" }, 1197 { CTL_NFSDDEBUG, "nfsd_debug" },
@@ -1203,7 +1203,7 @@ static struct trans_ctl_table trans_sunrpc_table[] = {
1203 {} 1203 {}
1204}; 1204};
1205 1205
1206static struct trans_ctl_table trans_pm_table[] = { 1206static const struct trans_ctl_table trans_pm_table[] = {
1207 { 1 /* CTL_PM_SUSPEND */, "suspend" }, 1207 { 1 /* CTL_PM_SUSPEND */, "suspend" },
1208 { 2 /* CTL_PM_CMODE */, "cmode" }, 1208 { 2 /* CTL_PM_CMODE */, "cmode" },
1209 { 3 /* CTL_PM_P0 */, "p0" }, 1209 { 3 /* CTL_PM_P0 */, "p0" },
@@ -1211,13 +1211,13 @@ static struct trans_ctl_table trans_pm_table[] = {
1211 {} 1211 {}
1212}; 1212};
1213 1213
1214static struct trans_ctl_table trans_frv_table[] = { 1214static const struct trans_ctl_table trans_frv_table[] = {
1215 { 1, "cache-mode" }, 1215 { 1, "cache-mode" },
1216 { 2, "pin-cxnr" }, 1216 { 2, "pin-cxnr" },
1217 {} 1217 {}
1218}; 1218};
1219 1219
1220static struct trans_ctl_table trans_root_table[] = { 1220static const struct trans_ctl_table trans_root_table[] = {
1221 { CTL_KERN, "kernel", trans_kern_table }, 1221 { CTL_KERN, "kernel", trans_kern_table },
1222 { CTL_VM, "vm", trans_vm_table }, 1222 { CTL_VM, "vm", trans_vm_table },
1223 { CTL_NET, "net", trans_net_table }, 1223 { CTL_NET, "net", trans_net_table },
@@ -1261,15 +1261,14 @@ static struct ctl_table *sysctl_parent(struct ctl_table *table, int n)
1261 return table; 1261 return table;
1262} 1262}
1263 1263
1264static struct trans_ctl_table *sysctl_binary_lookup(struct ctl_table *table) 1264static const struct trans_ctl_table *sysctl_binary_lookup(struct ctl_table *table)
1265{ 1265{
1266 struct ctl_table *test; 1266 struct ctl_table *test;
1267 struct trans_ctl_table *ref; 1267 const struct trans_ctl_table *ref;
1268 int depth, cur_depth; 1268 int cur_depth;
1269 1269
1270 depth = sysctl_depth(table); 1270 cur_depth = sysctl_depth(table);
1271 1271
1272 cur_depth = depth;
1273 ref = trans_root_table; 1272 ref = trans_root_table;
1274repeat: 1273repeat:
1275 test = sysctl_parent(table, cur_depth); 1274 test = sysctl_parent(table, cur_depth);
@@ -1437,7 +1436,7 @@ static void sysctl_check_leaf(struct nsproxy *namespaces,
1437 1436
1438static void sysctl_check_bin_path(struct ctl_table *table, const char **fail) 1437static void sysctl_check_bin_path(struct ctl_table *table, const char **fail)
1439{ 1438{
1440 struct trans_ctl_table *ref; 1439 const struct trans_ctl_table *ref;
1441 1440
1442 ref = sysctl_binary_lookup(table); 1441 ref = sysctl_binary_lookup(table);
1443 if (table->ctl_name && !ref) 1442 if (table->ctl_name && !ref)
diff --git a/kernel/time.c b/kernel/time.c
index 33af3e55570d..a5ec013b6c80 100644
--- a/kernel/time.c
+++ b/kernel/time.c
@@ -39,6 +39,8 @@
39#include <asm/uaccess.h> 39#include <asm/uaccess.h>
40#include <asm/unistd.h> 40#include <asm/unistd.h>
41 41
42#include "timeconst.h"
43
42/* 44/*
43 * The timezone where the local system is located. Used as a default by some 45 * The timezone where the local system is located. Used as a default by some
44 * programs who obtain this value by using gettimeofday. 46 * programs who obtain this value by using gettimeofday.
@@ -93,7 +95,8 @@ asmlinkage long sys_stime(time_t __user *tptr)
93 95
94#endif /* __ARCH_WANT_SYS_TIME */ 96#endif /* __ARCH_WANT_SYS_TIME */
95 97
96asmlinkage long sys_gettimeofday(struct timeval __user *tv, struct timezone __user *tz) 98asmlinkage long sys_gettimeofday(struct timeval __user *tv,
99 struct timezone __user *tz)
97{ 100{
98 if (likely(tv != NULL)) { 101 if (likely(tv != NULL)) {
99 struct timeval ktv; 102 struct timeval ktv;
@@ -118,7 +121,7 @@ asmlinkage long sys_gettimeofday(struct timeval __user *tv, struct timezone __us
118 * hard to make the program warp the clock precisely n hours) or 121 * hard to make the program warp the clock precisely n hours) or
119 * compile in the timezone information into the kernel. Bad, bad.... 122 * compile in the timezone information into the kernel. Bad, bad....
120 * 123 *
121 * - TYT, 1992-01-01 124 * - TYT, 1992-01-01
122 * 125 *
123 * The best thing to do is to keep the CMOS clock in universal time (UTC) 126 * The best thing to do is to keep the CMOS clock in universal time (UTC)
124 * as real UNIX machines always do it. This avoids all headaches about 127 * as real UNIX machines always do it. This avoids all headaches about
@@ -240,7 +243,11 @@ unsigned int inline jiffies_to_msecs(const unsigned long j)
240#elif HZ > MSEC_PER_SEC && !(HZ % MSEC_PER_SEC) 243#elif HZ > MSEC_PER_SEC && !(HZ % MSEC_PER_SEC)
241 return (j + (HZ / MSEC_PER_SEC) - 1)/(HZ / MSEC_PER_SEC); 244 return (j + (HZ / MSEC_PER_SEC) - 1)/(HZ / MSEC_PER_SEC);
242#else 245#else
243 return (j * MSEC_PER_SEC) / HZ; 246# if BITS_PER_LONG == 32
247 return ((u64)HZ_TO_MSEC_MUL32 * j) >> HZ_TO_MSEC_SHR32;
248# else
249 return (j * HZ_TO_MSEC_NUM) / HZ_TO_MSEC_DEN;
250# endif
244#endif 251#endif
245} 252}
246EXPORT_SYMBOL(jiffies_to_msecs); 253EXPORT_SYMBOL(jiffies_to_msecs);
@@ -252,7 +259,11 @@ unsigned int inline jiffies_to_usecs(const unsigned long j)
252#elif HZ > USEC_PER_SEC && !(HZ % USEC_PER_SEC) 259#elif HZ > USEC_PER_SEC && !(HZ % USEC_PER_SEC)
253 return (j + (HZ / USEC_PER_SEC) - 1)/(HZ / USEC_PER_SEC); 260 return (j + (HZ / USEC_PER_SEC) - 1)/(HZ / USEC_PER_SEC);
254#else 261#else
255 return (j * USEC_PER_SEC) / HZ; 262# if BITS_PER_LONG == 32
263 return ((u64)HZ_TO_USEC_MUL32 * j) >> HZ_TO_USEC_SHR32;
264# else
265 return (j * HZ_TO_USEC_NUM) / HZ_TO_USEC_DEN;
266# endif
256#endif 267#endif
257} 268}
258EXPORT_SYMBOL(jiffies_to_usecs); 269EXPORT_SYMBOL(jiffies_to_usecs);
@@ -267,7 +278,7 @@ EXPORT_SYMBOL(jiffies_to_usecs);
267 * 278 *
268 * This function should be only used for timestamps returned by 279 * This function should be only used for timestamps returned by
269 * current_kernel_time() or CURRENT_TIME, not with do_gettimeofday() because 280 * current_kernel_time() or CURRENT_TIME, not with do_gettimeofday() because
270 * it doesn't handle the better resolution of the later. 281 * it doesn't handle the better resolution of the latter.
271 */ 282 */
272struct timespec timespec_trunc(struct timespec t, unsigned gran) 283struct timespec timespec_trunc(struct timespec t, unsigned gran)
273{ 284{
@@ -315,7 +326,7 @@ EXPORT_SYMBOL_GPL(getnstimeofday);
315 * This algorithm was first published by Gauss (I think). 326 * This algorithm was first published by Gauss (I think).
316 * 327 *
317 * WARNING: this function will overflow on 2106-02-07 06:28:16 on 328 * WARNING: this function will overflow on 2106-02-07 06:28:16 on
318 * machines were long is 32-bit! (However, as time_t is signed, we 329 * machines where long is 32-bit! (However, as time_t is signed, we
319 * will already get problems at other places on 2038-01-19 03:14:08) 330 * will already get problems at other places on 2038-01-19 03:14:08)
320 */ 331 */
321unsigned long 332unsigned long
@@ -352,7 +363,7 @@ EXPORT_SYMBOL(mktime);
352 * normalize to the timespec storage format 363 * normalize to the timespec storage format
353 * 364 *
354 * Note: The tv_nsec part is always in the range of 365 * Note: The tv_nsec part is always in the range of
355 * 0 <= tv_nsec < NSEC_PER_SEC 366 * 0 <= tv_nsec < NSEC_PER_SEC
356 * For negative values only the tv_sec field is negative ! 367 * For negative values only the tv_sec field is negative !
357 */ 368 */
358void set_normalized_timespec(struct timespec *ts, time_t sec, long nsec) 369void set_normalized_timespec(struct timespec *ts, time_t sec, long nsec)
@@ -453,12 +464,13 @@ unsigned long msecs_to_jiffies(const unsigned int m)
453 /* 464 /*
454 * Generic case - multiply, round and divide. But first 465 * Generic case - multiply, round and divide. But first
455 * check that if we are doing a net multiplication, that 466 * check that if we are doing a net multiplication, that
456 * we wouldnt overflow: 467 * we wouldn't overflow:
457 */ 468 */
458 if (HZ > MSEC_PER_SEC && m > jiffies_to_msecs(MAX_JIFFY_OFFSET)) 469 if (HZ > MSEC_PER_SEC && m > jiffies_to_msecs(MAX_JIFFY_OFFSET))
459 return MAX_JIFFY_OFFSET; 470 return MAX_JIFFY_OFFSET;
460 471
461 return (m * HZ + MSEC_PER_SEC - 1) / MSEC_PER_SEC; 472 return ((u64)MSEC_TO_HZ_MUL32 * m + MSEC_TO_HZ_ADJ32)
473 >> MSEC_TO_HZ_SHR32;
462#endif 474#endif
463} 475}
464EXPORT_SYMBOL(msecs_to_jiffies); 476EXPORT_SYMBOL(msecs_to_jiffies);
@@ -472,7 +484,8 @@ unsigned long usecs_to_jiffies(const unsigned int u)
472#elif HZ > USEC_PER_SEC && !(HZ % USEC_PER_SEC) 484#elif HZ > USEC_PER_SEC && !(HZ % USEC_PER_SEC)
473 return u * (HZ / USEC_PER_SEC); 485 return u * (HZ / USEC_PER_SEC);
474#else 486#else
475 return (u * HZ + USEC_PER_SEC - 1) / USEC_PER_SEC; 487 return ((u64)USEC_TO_HZ_MUL32 * u + USEC_TO_HZ_ADJ32)
488 >> USEC_TO_HZ_SHR32;
476#endif 489#endif
477} 490}
478EXPORT_SYMBOL(usecs_to_jiffies); 491EXPORT_SYMBOL(usecs_to_jiffies);
diff --git a/kernel/time/clockevents.c b/kernel/time/clockevents.c
index 3e59fce6dd43..3d1e3e1a1971 100644
--- a/kernel/time/clockevents.c
+++ b/kernel/time/clockevents.c
@@ -133,7 +133,7 @@ static void clockevents_do_notify(unsigned long reason, void *dev)
133} 133}
134 134
135/* 135/*
136 * Called after a notify add to make devices availble which were 136 * Called after a notify add to make devices available which were
137 * released from the notifier call. 137 * released from the notifier call.
138 */ 138 */
139static void clockevents_notify_released(void) 139static void clockevents_notify_released(void)
@@ -218,6 +218,8 @@ void clockevents_exchange_device(struct clock_event_device *old,
218 */ 218 */
219void clockevents_notify(unsigned long reason, void *arg) 219void clockevents_notify(unsigned long reason, void *arg)
220{ 220{
221 struct list_head *node, *tmp;
222
221 spin_lock(&clockevents_lock); 223 spin_lock(&clockevents_lock);
222 clockevents_do_notify(reason, arg); 224 clockevents_do_notify(reason, arg);
223 225
@@ -227,13 +229,8 @@ void clockevents_notify(unsigned long reason, void *arg)
227 * Unregister the clock event devices which were 229 * Unregister the clock event devices which were
228 * released from the users in the notify chain. 230 * released from the users in the notify chain.
229 */ 231 */
230 while (!list_empty(&clockevents_released)) { 232 list_for_each_safe(node, tmp, &clockevents_released)
231 struct clock_event_device *dev; 233 list_del(node);
232
233 dev = list_entry(clockevents_released.next,
234 struct clock_event_device, list);
235 list_del(&dev->list);
236 }
237 break; 234 break;
238 default: 235 default:
239 break; 236 break;
diff --git a/kernel/time/clocksource.c b/kernel/time/clocksource.c
index 81afb3927ecc..548c436a776b 100644
--- a/kernel/time/clocksource.c
+++ b/kernel/time/clocksource.c
@@ -91,7 +91,6 @@ static void clocksource_ratewd(struct clocksource *cs, int64_t delta)
91 cs->name, delta); 91 cs->name, delta);
92 cs->flags &= ~(CLOCK_SOURCE_VALID_FOR_HRES | CLOCK_SOURCE_WATCHDOG); 92 cs->flags &= ~(CLOCK_SOURCE_VALID_FOR_HRES | CLOCK_SOURCE_WATCHDOG);
93 clocksource_change_rating(cs, 0); 93 clocksource_change_rating(cs, 0);
94 cs->flags &= ~CLOCK_SOURCE_WATCHDOG;
95 list_del(&cs->wd_list); 94 list_del(&cs->wd_list);
96} 95}
97 96
diff --git a/kernel/time/tick-sched.c b/kernel/time/tick-sched.c
index 88267f0a8471..fa9bb73dbdb4 100644
--- a/kernel/time/tick-sched.c
+++ b/kernel/time/tick-sched.c
@@ -681,7 +681,7 @@ int tick_check_oneshot_change(int allow_nohz)
681 if (ts->nohz_mode != NOHZ_MODE_INACTIVE) 681 if (ts->nohz_mode != NOHZ_MODE_INACTIVE)
682 return 0; 682 return 0;
683 683
684 if (!timekeeping_is_continuous() || !tick_is_oneshot_available()) 684 if (!timekeeping_valid_for_hres() || !tick_is_oneshot_available())
685 return 0; 685 return 0;
686 686
687 if (!allow_nohz) 687 if (!allow_nohz)
diff --git a/kernel/time/timekeeping.c b/kernel/time/timekeeping.c
index cd5dbc4579c9..1af9fb050fe2 100644
--- a/kernel/time/timekeeping.c
+++ b/kernel/time/timekeeping.c
@@ -201,9 +201,9 @@ static inline s64 __get_nsec_offset(void) { return 0; }
201#endif 201#endif
202 202
203/** 203/**
204 * timekeeping_is_continuous - check to see if timekeeping is free running 204 * timekeeping_valid_for_hres - Check if timekeeping is suitable for hres
205 */ 205 */
206int timekeeping_is_continuous(void) 206int timekeeping_valid_for_hres(void)
207{ 207{
208 unsigned long seq; 208 unsigned long seq;
209 int ret; 209 int ret;
@@ -364,7 +364,7 @@ static __always_inline int clocksource_bigadjust(s64 error, s64 *interval,
364 * with losing too many ticks, otherwise we would overadjust and 364 * with losing too many ticks, otherwise we would overadjust and
365 * produce an even larger error. The smaller the adjustment the 365 * produce an even larger error. The smaller the adjustment the
366 * faster we try to adjust for it, as lost ticks can do less harm 366 * faster we try to adjust for it, as lost ticks can do less harm
367 * here. This is tuned so that an error of about 1 msec is adusted 367 * here. This is tuned so that an error of about 1 msec is adjusted
368 * within about 1 sec (or 2^20 nsec in 2^SHIFT_HZ ticks). 368 * within about 1 sec (or 2^20 nsec in 2^SHIFT_HZ ticks).
369 */ 369 */
370 error2 = clock->error >> (TICK_LENGTH_SHIFT + 22 - 2 * SHIFT_HZ); 370 error2 = clock->error >> (TICK_LENGTH_SHIFT + 22 - 2 * SHIFT_HZ);
diff --git a/kernel/timeconst.pl b/kernel/timeconst.pl
new file mode 100644
index 000000000000..62b1287932ed
--- /dev/null
+++ b/kernel/timeconst.pl
@@ -0,0 +1,402 @@
1#!/usr/bin/perl
2# -----------------------------------------------------------------------
3#
4# Copyright 2007 rPath, Inc. - All Rights Reserved
5#
6# This file is part of the Linux kernel, and is made available under
7# the terms of the GNU General Public License version 2 or (at your
8# option) any later version; incorporated herein by reference.
9#
10# -----------------------------------------------------------------------
11#
12
13#
14# Usage: timeconst.pl HZ > timeconst.h
15#
16
17# Precomputed values for systems without Math::BigInt
18# Generated by:
19# timeconst.pl --can 24 32 48 64 100 122 128 200 250 256 300 512 1000 1024 1200
20%canned_values = (
21 24 => [
22 '0xa6aaaaab','0x2aaaaaa',26,
23 '0xa6aaaaaaaaaaaaab','0x2aaaaaaaaaaaaaa',58,
24 125,3,
25 '0xc49ba5e4','0x1fbe76c8b4',37,
26 '0xc49ba5e353f7ceda','0x1fbe76c8b439581062',69,
27 3,125,
28 '0xa2c2aaab','0xaaaa',16,
29 '0xa2c2aaaaaaaaaaab','0xaaaaaaaaaaaa',48,
30 125000,3,
31 '0xc9539b89','0x7fffbce4217d',47,
32 '0xc9539b8887229e91','0x7fffbce4217d2849cb25',79,
33 3,125000,
34 ], 32 => [
35 '0xfa000000','0x6000000',27,
36 '0xfa00000000000000','0x600000000000000',59,
37 125,4,
38 '0x83126e98','0xfdf3b645a',36,
39 '0x83126e978d4fdf3c','0xfdf3b645a1cac0831',68,
40 4,125,
41 '0xf4240000','0x0',17,
42 '0xf424000000000000','0x0',49,
43 31250,1,
44 '0x8637bd06','0x3fff79c842fa',46,
45 '0x8637bd05af6c69b6','0x3fff79c842fa5093964a',78,
46 1,31250,
47 ], 48 => [
48 '0xa6aaaaab','0x6aaaaaa',27,
49 '0xa6aaaaaaaaaaaaab','0x6aaaaaaaaaaaaaa',59,
50 125,6,
51 '0xc49ba5e4','0xfdf3b645a',36,
52 '0xc49ba5e353f7ceda','0xfdf3b645a1cac0831',68,
53 6,125,
54 '0xa2c2aaab','0x15555',17,
55 '0xa2c2aaaaaaaaaaab','0x1555555555555',49,
56 62500,3,
57 '0xc9539b89','0x3fffbce4217d',46,
58 '0xc9539b8887229e91','0x3fffbce4217d2849cb25',78,
59 3,62500,
60 ], 64 => [
61 '0xfa000000','0xe000000',28,
62 '0xfa00000000000000','0xe00000000000000',60,
63 125,8,
64 '0x83126e98','0x7ef9db22d',35,
65 '0x83126e978d4fdf3c','0x7ef9db22d0e560418',67,
66 8,125,
67 '0xf4240000','0x0',18,
68 '0xf424000000000000','0x0',50,
69 15625,1,
70 '0x8637bd06','0x1fff79c842fa',45,
71 '0x8637bd05af6c69b6','0x1fff79c842fa5093964a',77,
72 1,15625,
73 ], 100 => [
74 '0xa0000000','0x0',28,
75 '0xa000000000000000','0x0',60,
76 10,1,
77 '0xcccccccd','0x733333333',35,
78 '0xcccccccccccccccd','0x73333333333333333',67,
79 1,10,
80 '0x9c400000','0x0',18,
81 '0x9c40000000000000','0x0',50,
82 10000,1,
83 '0xd1b71759','0x1fff2e48e8a7',45,
84 '0xd1b71758e219652c','0x1fff2e48e8a71de69ad4',77,
85 1,10000,
86 ], 122 => [
87 '0x8325c53f','0xfbcda3a',28,
88 '0x8325c53ef368eb05','0xfbcda3ac10c9714',60,
89 500,61,
90 '0xf9db22d1','0x7fbe76c8b',35,
91 '0xf9db22d0e560418a','0x7fbe76c8b43958106',67,
92 61,500,
93 '0x8012e2a0','0x3ef36',18,
94 '0x8012e29f79b47583','0x3ef368eb04325',50,
95 500000,61,
96 '0xffda4053','0x1ffffbce4217',45,
97 '0xffda4052d666a983','0x1ffffbce4217d2849cb2',77,
98 61,500000,
99 ], 128 => [
100 '0xfa000000','0x1e000000',29,
101 '0xfa00000000000000','0x1e00000000000000',61,
102 125,16,
103 '0x83126e98','0x3f7ced916',34,
104 '0x83126e978d4fdf3c','0x3f7ced916872b020c',66,
105 16,125,
106 '0xf4240000','0x40000',19,
107 '0xf424000000000000','0x4000000000000',51,
108 15625,2,
109 '0x8637bd06','0xfffbce4217d',44,
110 '0x8637bd05af6c69b6','0xfffbce4217d2849cb25',76,
111 2,15625,
112 ], 200 => [
113 '0xa0000000','0x0',29,
114 '0xa000000000000000','0x0',61,
115 5,1,
116 '0xcccccccd','0x333333333',34,
117 '0xcccccccccccccccd','0x33333333333333333',66,
118 1,5,
119 '0x9c400000','0x0',19,
120 '0x9c40000000000000','0x0',51,
121 5000,1,
122 '0xd1b71759','0xfff2e48e8a7',44,
123 '0xd1b71758e219652c','0xfff2e48e8a71de69ad4',76,
124 1,5000,
125 ], 250 => [
126 '0x80000000','0x0',29,
127 '0x8000000000000000','0x0',61,
128 4,1,
129 '0x80000000','0x180000000',33,
130 '0x8000000000000000','0x18000000000000000',65,
131 1,4,
132 '0xfa000000','0x0',20,
133 '0xfa00000000000000','0x0',52,
134 4000,1,
135 '0x83126e98','0x7ff7ced9168',43,
136 '0x83126e978d4fdf3c','0x7ff7ced916872b020c4',75,
137 1,4000,
138 ], 256 => [
139 '0xfa000000','0x3e000000',30,
140 '0xfa00000000000000','0x3e00000000000000',62,
141 125,32,
142 '0x83126e98','0x1fbe76c8b',33,
143 '0x83126e978d4fdf3c','0x1fbe76c8b43958106',65,
144 32,125,
145 '0xf4240000','0xc0000',20,
146 '0xf424000000000000','0xc000000000000',52,
147 15625,4,
148 '0x8637bd06','0x7ffde7210be',43,
149 '0x8637bd05af6c69b6','0x7ffde7210be9424e592',75,
150 4,15625,
151 ], 300 => [
152 '0xd5555556','0x2aaaaaaa',30,
153 '0xd555555555555556','0x2aaaaaaaaaaaaaaa',62,
154 10,3,
155 '0x9999999a','0x1cccccccc',33,
156 '0x999999999999999a','0x1cccccccccccccccc',65,
157 3,10,
158 '0xd0555556','0xaaaaa',20,
159 '0xd055555555555556','0xaaaaaaaaaaaaa',52,
160 10000,3,
161 '0x9d495183','0x7ffcb923a29',43,
162 '0x9d495182a9930be1','0x7ffcb923a29c779a6b5',75,
163 3,10000,
164 ], 512 => [
165 '0xfa000000','0x7e000000',31,
166 '0xfa00000000000000','0x7e00000000000000',63,
167 125,64,
168 '0x83126e98','0xfdf3b645',32,
169 '0x83126e978d4fdf3c','0xfdf3b645a1cac083',64,
170 64,125,
171 '0xf4240000','0x1c0000',21,
172 '0xf424000000000000','0x1c000000000000',53,
173 15625,8,
174 '0x8637bd06','0x3ffef39085f',42,
175 '0x8637bd05af6c69b6','0x3ffef39085f4a1272c9',74,
176 8,15625,
177 ], 1000 => [
178 '0x80000000','0x0',31,
179 '0x8000000000000000','0x0',63,
180 1,1,
181 '0x80000000','0x0',31,
182 '0x8000000000000000','0x0',63,
183 1,1,
184 '0xfa000000','0x0',22,
185 '0xfa00000000000000','0x0',54,
186 1000,1,
187 '0x83126e98','0x1ff7ced9168',41,
188 '0x83126e978d4fdf3c','0x1ff7ced916872b020c4',73,
189 1,1000,
190 ], 1024 => [
191 '0xfa000000','0xfe000000',32,
192 '0xfa00000000000000','0xfe00000000000000',64,
193 125,128,
194 '0x83126e98','0x7ef9db22',31,
195 '0x83126e978d4fdf3c','0x7ef9db22d0e56041',63,
196 128,125,
197 '0xf4240000','0x3c0000',22,
198 '0xf424000000000000','0x3c000000000000',54,
199 15625,16,
200 '0x8637bd06','0x1fff79c842f',41,
201 '0x8637bd05af6c69b6','0x1fff79c842fa5093964',73,
202 16,15625,
203 ], 1200 => [
204 '0xd5555556','0xd5555555',32,
205 '0xd555555555555556','0xd555555555555555',64,
206 5,6,
207 '0x9999999a','0x66666666',31,
208 '0x999999999999999a','0x6666666666666666',63,
209 6,5,
210 '0xd0555556','0x2aaaaa',22,
211 '0xd055555555555556','0x2aaaaaaaaaaaaa',54,
212 2500,3,
213 '0x9d495183','0x1ffcb923a29',41,
214 '0x9d495182a9930be1','0x1ffcb923a29c779a6b5',73,
215 3,2500,
216 ]
217);
218
219$has_bigint = eval 'use Math::BigInt qw(bgcd); 1;';
220
221sub bint($)
222{
223 my($x) = @_;
224 return Math::BigInt->new($x);
225}
226
227#
228# Constants for division by reciprocal multiplication.
229# (bits, numerator, denominator)
230#
231sub fmul($$$)
232{
233 my ($b,$n,$d) = @_;
234
235 $n = bint($n);
236 $d = bint($d);
237
238 return scalar (($n << $b)+$d-bint(1))/$d;
239}
240
241sub fadj($$$)
242{
243 my($b,$n,$d) = @_;
244
245 $n = bint($n);
246 $d = bint($d);
247
248 $d = $d/bgcd($n, $d);
249 return scalar (($d-bint(1)) << $b)/$d;
250}
251
252sub fmuls($$$) {
253 my($b,$n,$d) = @_;
254 my($s,$m);
255 my($thres) = bint(1) << ($b-1);
256
257 $n = bint($n);
258 $d = bint($d);
259
260 for ($s = 0; 1; $s++) {
261 $m = fmul($s,$n,$d);
262 return $s if ($m >= $thres);
263 }
264 return 0;
265}
266
267# Provides mul, adj, and shr factors for a specific
268# (bit, time, hz) combination
269sub muladj($$$) {
270 my($b, $t, $hz) = @_;
271 my $s = fmuls($b, $t, $hz);
272 my $m = fmul($s, $t, $hz);
273 my $a = fadj($s, $t, $hz);
274 return ($m->as_hex(), $a->as_hex(), $s);
275}
276
277# Provides numerator, denominator values
278sub numden($$) {
279 my($n, $d) = @_;
280 my $g = bgcd($n, $d);
281 return ($n/$g, $d/$g);
282}
283
284# All values for a specific (time, hz) combo
285sub conversions($$) {
286 my ($t, $hz) = @_;
287 my @val = ();
288
289 # HZ_TO_xx
290 push(@val, muladj(32, $t, $hz));
291 push(@val, muladj(64, $t, $hz));
292 push(@val, numden($t, $hz));
293
294 # xx_TO_HZ
295 push(@val, muladj(32, $hz, $t));
296 push(@val, muladj(64, $hz, $t));
297 push(@val, numden($hz, $t));
298
299 return @val;
300}
301
302sub compute_values($) {
303 my($hz) = @_;
304 my @val = ();
305 my $s, $m, $a, $g;
306
307 if (!$has_bigint) {
308 die "$0: HZ == $hz not canned and ".
309 "Math::BigInt not available\n";
310 }
311
312 # MSEC conversions
313 push(@val, conversions(1000, $hz));
314
315 # USEC conversions
316 push(@val, conversions(1000000, $hz));
317
318 return @val;
319}
320
321sub output($@)
322{
323 my($hz, @val) = @_;
324 my $pfx, $bit, $suf, $s, $m, $a;
325
326 print "/* Automatically generated by kernel/timeconst.pl */\n";
327 print "/* Conversion constants for HZ == $hz */\n";
328 print "\n";
329 print "#ifndef KERNEL_TIMECONST_H\n";
330 print "#define KERNEL_TIMECONST_H\n";
331 print "\n";
332
333 print "#include <linux/param.h>\n";
334
335 print "\n";
336 print "#if HZ != $hz\n";
337 print "#error \"kernel/timeconst.h has the wrong HZ value!\"\n";
338 print "#endif\n";
339 print "\n";
340
341 foreach $pfx ('HZ_TO_MSEC','MSEC_TO_HZ',
342 'USEC_TO_HZ','HZ_TO_USEC') {
343 foreach $bit (32, 64) {
344 foreach $suf ('MUL', 'ADJ', 'SHR') {
345 printf "#define %-23s %s\n",
346 "${pfx}_$suf$bit", shift(@val);
347 }
348 }
349 foreach $suf ('NUM', 'DEN') {
350 printf "#define %-23s %s\n",
351 "${pfx}_$suf", shift(@val);
352 }
353 }
354
355 print "\n";
356 print "#endif /* KERNEL_TIMECONST_H */\n";
357}
358
359($hz) = @ARGV;
360
361# Use this to generate the %canned_values structure
362if ($hz eq '--can') {
363 shift(@ARGV);
364 @hzlist = sort {$a <=> $b} (@ARGV);
365
366 print "# Precomputed values for systems without Math::BigInt\n";
367 print "# Generated by:\n";
368 print "# timeconst.pl --can ", join(' ', @hzlist), "\n";
369 print "\%canned_values = (\n";
370 my $pf = "\t";
371 foreach $hz (@hzlist) {
372 my @values = compute_values($hz);
373 print "$pf$hz => [\n";
374 while (scalar(@values)) {
375 my $bit;
376 foreach $bit (32, 64) {
377 my $m = shift(@values);
378 my $a = shift(@values);
379 my $s = shift(@values);
380 print "\t\t\'",$m,"\',\'",$a,"\',",$s,",\n";
381 }
382 my $n = shift(@values);
383 my $d = shift(@values);
384 print "\t\t",$n,',',$d,",\n";
385 }
386 print "\t]";
387 $pf = ', ';
388 }
389 print "\n);\n";
390} else {
391 $hz += 0; # Force to number
392 if ($hz < 1) {
393 die "Usage: $0 HZ\n";
394 }
395
396 @val = @{$canned_values{$hz}};
397 if (!defined(@val)) {
398 @val = compute_values($hz);
399 }
400 output($hz, @val);
401}
402exit 0;
diff --git a/kernel/timer.c b/kernel/timer.c
index 70b29b59343f..99b00a25f88b 100644
--- a/kernel/timer.c
+++ b/kernel/timer.c
@@ -327,7 +327,7 @@ static void timer_stats_account_timer(struct timer_list *timer) {}
327 * init_timer() must be done to a timer prior calling *any* of the 327 * init_timer() must be done to a timer prior calling *any* of the
328 * other timer functions. 328 * other timer functions.
329 */ 329 */
330void fastcall init_timer(struct timer_list *timer) 330void init_timer(struct timer_list *timer)
331{ 331{
332 timer->entry.next = NULL; 332 timer->entry.next = NULL;
333 timer->base = __raw_get_cpu_var(tvec_bases); 333 timer->base = __raw_get_cpu_var(tvec_bases);
@@ -339,7 +339,7 @@ void fastcall init_timer(struct timer_list *timer)
339} 339}
340EXPORT_SYMBOL(init_timer); 340EXPORT_SYMBOL(init_timer);
341 341
342void fastcall init_timer_deferrable(struct timer_list *timer) 342void init_timer_deferrable(struct timer_list *timer)
343{ 343{
344 init_timer(timer); 344 init_timer(timer);
345 timer_set_deferrable(timer); 345 timer_set_deferrable(timer);
@@ -979,7 +979,7 @@ asmlinkage long sys_getppid(void)
979 int pid; 979 int pid;
980 980
981 rcu_read_lock(); 981 rcu_read_lock();
982 pid = task_tgid_nr_ns(current->real_parent, current->nsproxy->pid_ns); 982 pid = task_tgid_vnr(current->real_parent);
983 rcu_read_unlock(); 983 rcu_read_unlock();
984 984
985 return pid; 985 return pid;
@@ -1042,7 +1042,7 @@ static void process_timeout(unsigned long __data)
1042 * 1042 *
1043 * In all cases the return value is guaranteed to be non-negative. 1043 * In all cases the return value is guaranteed to be non-negative.
1044 */ 1044 */
1045fastcall signed long __sched schedule_timeout(signed long timeout) 1045signed long __sched schedule_timeout(signed long timeout)
1046{ 1046{
1047 struct timer_list timer; 1047 struct timer_list timer;
1048 unsigned long expire; 1048 unsigned long expire;
diff --git a/kernel/user.c b/kernel/user.c
index bc1c48d35cb3..7d7900c5a1fd 100644
--- a/kernel/user.c
+++ b/kernel/user.c
@@ -17,6 +17,14 @@
17#include <linux/module.h> 17#include <linux/module.h>
18#include <linux/user_namespace.h> 18#include <linux/user_namespace.h>
19 19
20struct user_namespace init_user_ns = {
21 .kref = {
22 .refcount = ATOMIC_INIT(2),
23 },
24 .root_user = &root_user,
25};
26EXPORT_SYMBOL_GPL(init_user_ns);
27
20/* 28/*
21 * UID task count cache, to get fast user lookup in "alloc_uid" 29 * UID task count cache, to get fast user lookup in "alloc_uid"
22 * when changing user ID's (ie setuid() and friends). 30 * when changing user ID's (ie setuid() and friends).
@@ -427,6 +435,7 @@ void switch_uid(struct user_struct *new_user)
427 suid_keys(current); 435 suid_keys(current);
428} 436}
429 437
438#ifdef CONFIG_USER_NS
430void release_uids(struct user_namespace *ns) 439void release_uids(struct user_namespace *ns)
431{ 440{
432 int i; 441 int i;
@@ -451,6 +460,7 @@ void release_uids(struct user_namespace *ns)
451 460
452 free_uid(ns->root_user); 461 free_uid(ns->root_user);
453} 462}
463#endif
454 464
455static int __init uid_cache_init(void) 465static int __init uid_cache_init(void)
456{ 466{
diff --git a/kernel/user_namespace.c b/kernel/user_namespace.c
index 7af90fc4f0fd..4c9006275df7 100644
--- a/kernel/user_namespace.c
+++ b/kernel/user_namespace.c
@@ -10,17 +10,6 @@
10#include <linux/nsproxy.h> 10#include <linux/nsproxy.h>
11#include <linux/user_namespace.h> 11#include <linux/user_namespace.h>
12 12
13struct user_namespace init_user_ns = {
14 .kref = {
15 .refcount = ATOMIC_INIT(2),
16 },
17 .root_user = &root_user,
18};
19
20EXPORT_SYMBOL_GPL(init_user_ns);
21
22#ifdef CONFIG_USER_NS
23
24/* 13/*
25 * Clone a new ns copying an original user ns, setting refcount to 1 14 * Clone a new ns copying an original user ns, setting refcount to 1
26 * @old_ns: namespace to clone 15 * @old_ns: namespace to clone
@@ -84,5 +73,3 @@ void free_user_ns(struct kref *kref)
84 release_uids(ns); 73 release_uids(ns);
85 kfree(ns); 74 kfree(ns);
86} 75}
87
88#endif /* CONFIG_USER_NS */
diff --git a/kernel/wait.c b/kernel/wait.c
index f9876888a569..c275c56cf2d3 100644
--- a/kernel/wait.c
+++ b/kernel/wait.c
@@ -18,7 +18,7 @@ void init_waitqueue_head(wait_queue_head_t *q)
18 18
19EXPORT_SYMBOL(init_waitqueue_head); 19EXPORT_SYMBOL(init_waitqueue_head);
20 20
21void fastcall add_wait_queue(wait_queue_head_t *q, wait_queue_t *wait) 21void add_wait_queue(wait_queue_head_t *q, wait_queue_t *wait)
22{ 22{
23 unsigned long flags; 23 unsigned long flags;
24 24
@@ -29,7 +29,7 @@ void fastcall add_wait_queue(wait_queue_head_t *q, wait_queue_t *wait)
29} 29}
30EXPORT_SYMBOL(add_wait_queue); 30EXPORT_SYMBOL(add_wait_queue);
31 31
32void fastcall add_wait_queue_exclusive(wait_queue_head_t *q, wait_queue_t *wait) 32void add_wait_queue_exclusive(wait_queue_head_t *q, wait_queue_t *wait)
33{ 33{
34 unsigned long flags; 34 unsigned long flags;
35 35
@@ -40,7 +40,7 @@ void fastcall add_wait_queue_exclusive(wait_queue_head_t *q, wait_queue_t *wait)
40} 40}
41EXPORT_SYMBOL(add_wait_queue_exclusive); 41EXPORT_SYMBOL(add_wait_queue_exclusive);
42 42
43void fastcall remove_wait_queue(wait_queue_head_t *q, wait_queue_t *wait) 43void remove_wait_queue(wait_queue_head_t *q, wait_queue_t *wait)
44{ 44{
45 unsigned long flags; 45 unsigned long flags;
46 46
@@ -63,7 +63,7 @@ EXPORT_SYMBOL(remove_wait_queue);
63 * stops them from bleeding out - it would still allow subsequent 63 * stops them from bleeding out - it would still allow subsequent
64 * loads to move into the critical region). 64 * loads to move into the critical region).
65 */ 65 */
66void fastcall 66void
67prepare_to_wait(wait_queue_head_t *q, wait_queue_t *wait, int state) 67prepare_to_wait(wait_queue_head_t *q, wait_queue_t *wait, int state)
68{ 68{
69 unsigned long flags; 69 unsigned long flags;
@@ -82,7 +82,7 @@ prepare_to_wait(wait_queue_head_t *q, wait_queue_t *wait, int state)
82} 82}
83EXPORT_SYMBOL(prepare_to_wait); 83EXPORT_SYMBOL(prepare_to_wait);
84 84
85void fastcall 85void
86prepare_to_wait_exclusive(wait_queue_head_t *q, wait_queue_t *wait, int state) 86prepare_to_wait_exclusive(wait_queue_head_t *q, wait_queue_t *wait, int state)
87{ 87{
88 unsigned long flags; 88 unsigned long flags;
@@ -101,7 +101,7 @@ prepare_to_wait_exclusive(wait_queue_head_t *q, wait_queue_t *wait, int state)
101} 101}
102EXPORT_SYMBOL(prepare_to_wait_exclusive); 102EXPORT_SYMBOL(prepare_to_wait_exclusive);
103 103
104void fastcall finish_wait(wait_queue_head_t *q, wait_queue_t *wait) 104void finish_wait(wait_queue_head_t *q, wait_queue_t *wait)
105{ 105{
106 unsigned long flags; 106 unsigned long flags;
107 107
@@ -157,7 +157,7 @@ EXPORT_SYMBOL(wake_bit_function);
157 * waiting, the actions of __wait_on_bit() and __wait_on_bit_lock() are 157 * waiting, the actions of __wait_on_bit() and __wait_on_bit_lock() are
158 * permitted return codes. Nonzero return codes halt waiting and return. 158 * permitted return codes. Nonzero return codes halt waiting and return.
159 */ 159 */
160int __sched fastcall 160int __sched
161__wait_on_bit(wait_queue_head_t *wq, struct wait_bit_queue *q, 161__wait_on_bit(wait_queue_head_t *wq, struct wait_bit_queue *q,
162 int (*action)(void *), unsigned mode) 162 int (*action)(void *), unsigned mode)
163{ 163{
@@ -173,7 +173,7 @@ __wait_on_bit(wait_queue_head_t *wq, struct wait_bit_queue *q,
173} 173}
174EXPORT_SYMBOL(__wait_on_bit); 174EXPORT_SYMBOL(__wait_on_bit);
175 175
176int __sched fastcall out_of_line_wait_on_bit(void *word, int bit, 176int __sched out_of_line_wait_on_bit(void *word, int bit,
177 int (*action)(void *), unsigned mode) 177 int (*action)(void *), unsigned mode)
178{ 178{
179 wait_queue_head_t *wq = bit_waitqueue(word, bit); 179 wait_queue_head_t *wq = bit_waitqueue(word, bit);
@@ -183,7 +183,7 @@ int __sched fastcall out_of_line_wait_on_bit(void *word, int bit,
183} 183}
184EXPORT_SYMBOL(out_of_line_wait_on_bit); 184EXPORT_SYMBOL(out_of_line_wait_on_bit);
185 185
186int __sched fastcall 186int __sched
187__wait_on_bit_lock(wait_queue_head_t *wq, struct wait_bit_queue *q, 187__wait_on_bit_lock(wait_queue_head_t *wq, struct wait_bit_queue *q,
188 int (*action)(void *), unsigned mode) 188 int (*action)(void *), unsigned mode)
189{ 189{
@@ -201,7 +201,7 @@ __wait_on_bit_lock(wait_queue_head_t *wq, struct wait_bit_queue *q,
201} 201}
202EXPORT_SYMBOL(__wait_on_bit_lock); 202EXPORT_SYMBOL(__wait_on_bit_lock);
203 203
204int __sched fastcall out_of_line_wait_on_bit_lock(void *word, int bit, 204int __sched out_of_line_wait_on_bit_lock(void *word, int bit,
205 int (*action)(void *), unsigned mode) 205 int (*action)(void *), unsigned mode)
206{ 206{
207 wait_queue_head_t *wq = bit_waitqueue(word, bit); 207 wait_queue_head_t *wq = bit_waitqueue(word, bit);
@@ -211,7 +211,7 @@ int __sched fastcall out_of_line_wait_on_bit_lock(void *word, int bit,
211} 211}
212EXPORT_SYMBOL(out_of_line_wait_on_bit_lock); 212EXPORT_SYMBOL(out_of_line_wait_on_bit_lock);
213 213
214void fastcall __wake_up_bit(wait_queue_head_t *wq, void *word, int bit) 214void __wake_up_bit(wait_queue_head_t *wq, void *word, int bit)
215{ 215{
216 struct wait_bit_key key = __WAIT_BIT_KEY_INITIALIZER(word, bit); 216 struct wait_bit_key key = __WAIT_BIT_KEY_INITIALIZER(word, bit);
217 if (waitqueue_active(wq)) 217 if (waitqueue_active(wq))
@@ -236,13 +236,13 @@ EXPORT_SYMBOL(__wake_up_bit);
236 * may need to use a less regular barrier, such fs/inode.c's smp_mb(), 236 * may need to use a less regular barrier, such fs/inode.c's smp_mb(),
237 * because spin_unlock() does not guarantee a memory barrier. 237 * because spin_unlock() does not guarantee a memory barrier.
238 */ 238 */
239void fastcall wake_up_bit(void *word, int bit) 239void wake_up_bit(void *word, int bit)
240{ 240{
241 __wake_up_bit(bit_waitqueue(word, bit), word, bit); 241 __wake_up_bit(bit_waitqueue(word, bit), word, bit);
242} 242}
243EXPORT_SYMBOL(wake_up_bit); 243EXPORT_SYMBOL(wake_up_bit);
244 244
245fastcall wait_queue_head_t *bit_waitqueue(void *word, int bit) 245wait_queue_head_t *bit_waitqueue(void *word, int bit)
246{ 246{
247 const int shift = BITS_PER_LONG == 32 ? 5 : 6; 247 const int shift = BITS_PER_LONG == 32 ? 5 : 6;
248 const struct zone *zone = page_zone(virt_to_page(word)); 248 const struct zone *zone = page_zone(virt_to_page(word));
diff --git a/kernel/workqueue.c b/kernel/workqueue.c
index 52db48e7f6e7..ff06611655af 100644
--- a/kernel/workqueue.c
+++ b/kernel/workqueue.c
@@ -161,7 +161,7 @@ static void __queue_work(struct cpu_workqueue_struct *cwq,
161 * We queue the work to the CPU it was submitted, but there is no 161 * We queue the work to the CPU it was submitted, but there is no
162 * guarantee that it will be processed by that CPU. 162 * guarantee that it will be processed by that CPU.
163 */ 163 */
164int fastcall queue_work(struct workqueue_struct *wq, struct work_struct *work) 164int queue_work(struct workqueue_struct *wq, struct work_struct *work)
165{ 165{
166 int ret = 0; 166 int ret = 0;
167 167
@@ -175,7 +175,7 @@ int fastcall queue_work(struct workqueue_struct *wq, struct work_struct *work)
175} 175}
176EXPORT_SYMBOL_GPL(queue_work); 176EXPORT_SYMBOL_GPL(queue_work);
177 177
178void delayed_work_timer_fn(unsigned long __data) 178static void delayed_work_timer_fn(unsigned long __data)
179{ 179{
180 struct delayed_work *dwork = (struct delayed_work *)__data; 180 struct delayed_work *dwork = (struct delayed_work *)__data;
181 struct cpu_workqueue_struct *cwq = get_wq_data(&dwork->work); 181 struct cpu_workqueue_struct *cwq = get_wq_data(&dwork->work);
@@ -192,7 +192,7 @@ void delayed_work_timer_fn(unsigned long __data)
192 * 192 *
193 * Returns 0 if @work was already on a queue, non-zero otherwise. 193 * Returns 0 if @work was already on a queue, non-zero otherwise.
194 */ 194 */
195int fastcall queue_delayed_work(struct workqueue_struct *wq, 195int queue_delayed_work(struct workqueue_struct *wq,
196 struct delayed_work *dwork, unsigned long delay) 196 struct delayed_work *dwork, unsigned long delay)
197{ 197{
198 timer_stats_timer_set_start_info(&dwork->timer); 198 timer_stats_timer_set_start_info(&dwork->timer);
@@ -388,7 +388,7 @@ static int flush_cpu_workqueue(struct cpu_workqueue_struct *cwq)
388 * This function used to run the workqueues itself. Now we just wait for the 388 * This function used to run the workqueues itself. Now we just wait for the
389 * helper threads to do it. 389 * helper threads to do it.
390 */ 390 */
391void fastcall flush_workqueue(struct workqueue_struct *wq) 391void flush_workqueue(struct workqueue_struct *wq)
392{ 392{
393 const cpumask_t *cpu_map = wq_cpu_map(wq); 393 const cpumask_t *cpu_map = wq_cpu_map(wq);
394 int cpu; 394 int cpu;
@@ -546,7 +546,7 @@ static struct workqueue_struct *keventd_wq __read_mostly;
546 * 546 *
547 * This puts a job in the kernel-global workqueue. 547 * This puts a job in the kernel-global workqueue.
548 */ 548 */
549int fastcall schedule_work(struct work_struct *work) 549int schedule_work(struct work_struct *work)
550{ 550{
551 return queue_work(keventd_wq, work); 551 return queue_work(keventd_wq, work);
552} 552}
@@ -560,7 +560,7 @@ EXPORT_SYMBOL(schedule_work);
560 * After waiting for a given time this puts a job in the kernel-global 560 * After waiting for a given time this puts a job in the kernel-global
561 * workqueue. 561 * workqueue.
562 */ 562 */
563int fastcall schedule_delayed_work(struct delayed_work *dwork, 563int schedule_delayed_work(struct delayed_work *dwork,
564 unsigned long delay) 564 unsigned long delay)
565{ 565{
566 timer_stats_timer_set_start_info(&dwork->timer); 566 timer_stats_timer_set_start_info(&dwork->timer);
diff --git a/lib/Kconfig.debug b/lib/Kconfig.debug
index 4f4008fc73e4..ce0bb2600c25 100644
--- a/lib/Kconfig.debug
+++ b/lib/Kconfig.debug
@@ -404,7 +404,8 @@ config DEBUG_HIGHMEM
404config DEBUG_BUGVERBOSE 404config DEBUG_BUGVERBOSE
405 bool "Verbose BUG() reporting (adds 70K)" if DEBUG_KERNEL && EMBEDDED 405 bool "Verbose BUG() reporting (adds 70K)" if DEBUG_KERNEL && EMBEDDED
406 depends on BUG 406 depends on BUG
407 depends on ARM || AVR32 || M32R || M68K || SPARC32 || SPARC64 || FRV || SUPERH || GENERIC_BUG || BLACKFIN 407 depends on ARM || AVR32 || M32R || M68K || SPARC32 || SPARC64 || \
408 FRV || SUPERH || GENERIC_BUG || BLACKFIN || MN10300
408 default !EMBEDDED 409 default !EMBEDDED
409 help 410 help
410 Say Y here to make BUG() panics output the file name and line number 411 Say Y here to make BUG() panics output the file name and line number
@@ -454,7 +455,9 @@ config DEBUG_SG
454 455
455config FRAME_POINTER 456config FRAME_POINTER
456 bool "Compile the kernel with frame pointers" 457 bool "Compile the kernel with frame pointers"
457 depends on DEBUG_KERNEL && (X86 || CRIS || M68K || M68KNOMMU || FRV || UML || S390 || AVR32 || SUPERH || BLACKFIN) 458 depends on DEBUG_KERNEL && \
459 (X86 || CRIS || M68K || M68KNOMMU || FRV || UML || S390 || \
460 AVR32 || SUPERH || BLACKFIN || MN10300)
458 default y if DEBUG_INFO && UML 461 default y if DEBUG_INFO && UML
459 help 462 help
460 If you say Y here the resulting kernel image will be slightly larger 463 If you say Y here the resulting kernel image will be slightly larger
diff --git a/lib/Makefile b/lib/Makefile
index a18062e4633f..23de261a4c83 100644
--- a/lib/Makefile
+++ b/lib/Makefile
@@ -6,7 +6,7 @@ lib-y := ctype.o string.o vsprintf.o cmdline.o \
6 rbtree.o radix-tree.o dump_stack.o \ 6 rbtree.o radix-tree.o dump_stack.o \
7 idr.o int_sqrt.o extable.o prio_tree.o \ 7 idr.o int_sqrt.o extable.o prio_tree.o \
8 sha1.o irq_regs.o reciprocal_div.o argv_split.o \ 8 sha1.o irq_regs.o reciprocal_div.o argv_split.o \
9 proportions.o prio_heap.o scatterlist.o 9 proportions.o prio_heap.o
10 10
11lib-$(CONFIG_MMU) += ioremap.o 11lib-$(CONFIG_MMU) += ioremap.o
12lib-$(CONFIG_SMP) += cpumask.o 12lib-$(CONFIG_SMP) += cpumask.o
@@ -14,7 +14,7 @@ lib-$(CONFIG_SMP) += cpumask.o
14lib-y += kobject.o kref.o klist.o 14lib-y += kobject.o kref.o klist.o
15 15
16obj-y += div64.o sort.o parser.o halfmd4.o debug_locks.o random32.o \ 16obj-y += div64.o sort.o parser.o halfmd4.o debug_locks.o random32.o \
17 bust_spinlocks.o hexdump.o kasprintf.o bitmap.o 17 bust_spinlocks.o hexdump.o kasprintf.o bitmap.o scatterlist.o
18 18
19ifeq ($(CONFIG_DEBUG_KOBJECT),y) 19ifeq ($(CONFIG_DEBUG_KOBJECT),y)
20CFLAGS_kobject.o += -DDEBUG 20CFLAGS_kobject.o += -DDEBUG
diff --git a/lib/fault-inject.c b/lib/fault-inject.c
index 23985a278bbb..a50a311554cc 100644
--- a/lib/fault-inject.c
+++ b/lib/fault-inject.c
@@ -134,23 +134,26 @@ bool should_fail(struct fault_attr *attr, ssize_t size)
134 134
135#ifdef CONFIG_FAULT_INJECTION_DEBUG_FS 135#ifdef CONFIG_FAULT_INJECTION_DEBUG_FS
136 136
137static void debugfs_ul_set(void *data, u64 val) 137static int debugfs_ul_set(void *data, u64 val)
138{ 138{
139 *(unsigned long *)data = val; 139 *(unsigned long *)data = val;
140 return 0;
140} 141}
141 142
142#ifdef CONFIG_FAULT_INJECTION_STACKTRACE_FILTER 143#ifdef CONFIG_FAULT_INJECTION_STACKTRACE_FILTER
143static void debugfs_ul_set_MAX_STACK_TRACE_DEPTH(void *data, u64 val) 144static int debugfs_ul_set_MAX_STACK_TRACE_DEPTH(void *data, u64 val)
144{ 145{
145 *(unsigned long *)data = 146 *(unsigned long *)data =
146 val < MAX_STACK_TRACE_DEPTH ? 147 val < MAX_STACK_TRACE_DEPTH ?
147 val : MAX_STACK_TRACE_DEPTH; 148 val : MAX_STACK_TRACE_DEPTH;
149 return 0;
148} 150}
149#endif /* CONFIG_FAULT_INJECTION_STACKTRACE_FILTER */ 151#endif /* CONFIG_FAULT_INJECTION_STACKTRACE_FILTER */
150 152
151static u64 debugfs_ul_get(void *data) 153static int debugfs_ul_get(void *data, u64 *val)
152{ 154{
153 return *(unsigned long *)data; 155 *val = *(unsigned long *)data;
156 return 0;
154} 157}
155 158
156DEFINE_SIMPLE_ATTRIBUTE(fops_ul, debugfs_ul_get, debugfs_ul_set, "%llu\n"); 159DEFINE_SIMPLE_ATTRIBUTE(fops_ul, debugfs_ul_get, debugfs_ul_set, "%llu\n");
@@ -174,14 +177,16 @@ static struct dentry *debugfs_create_ul_MAX_STACK_TRACE_DEPTH(
174} 177}
175#endif /* CONFIG_FAULT_INJECTION_STACKTRACE_FILTER */ 178#endif /* CONFIG_FAULT_INJECTION_STACKTRACE_FILTER */
176 179
177static void debugfs_atomic_t_set(void *data, u64 val) 180static int debugfs_atomic_t_set(void *data, u64 val)
178{ 181{
179 atomic_set((atomic_t *)data, val); 182 atomic_set((atomic_t *)data, val);
183 return 0;
180} 184}
181 185
182static u64 debugfs_atomic_t_get(void *data) 186static int debugfs_atomic_t_get(void *data, u64 *val)
183{ 187{
184 return atomic_read((atomic_t *)data); 188 *val = atomic_read((atomic_t *)data);
189 return 0;
185} 190}
186 191
187DEFINE_SIMPLE_ATTRIBUTE(fops_atomic_t, debugfs_atomic_t_get, 192DEFINE_SIMPLE_ATTRIBUTE(fops_atomic_t, debugfs_atomic_t_get,
diff --git a/lib/iomap.c b/lib/iomap.c
index 72c42687ba10..db004a9ff509 100644
--- a/lib/iomap.c
+++ b/lib/iomap.c
@@ -69,27 +69,27 @@ static void bad_io_access(unsigned long port, const char *access)
69#define mmio_read32be(addr) be32_to_cpu(__raw_readl(addr)) 69#define mmio_read32be(addr) be32_to_cpu(__raw_readl(addr))
70#endif 70#endif
71 71
72unsigned int fastcall ioread8(void __iomem *addr) 72unsigned int ioread8(void __iomem *addr)
73{ 73{
74 IO_COND(addr, return inb(port), return readb(addr)); 74 IO_COND(addr, return inb(port), return readb(addr));
75 return 0xff; 75 return 0xff;
76} 76}
77unsigned int fastcall ioread16(void __iomem *addr) 77unsigned int ioread16(void __iomem *addr)
78{ 78{
79 IO_COND(addr, return inw(port), return readw(addr)); 79 IO_COND(addr, return inw(port), return readw(addr));
80 return 0xffff; 80 return 0xffff;
81} 81}
82unsigned int fastcall ioread16be(void __iomem *addr) 82unsigned int ioread16be(void __iomem *addr)
83{ 83{
84 IO_COND(addr, return pio_read16be(port), return mmio_read16be(addr)); 84 IO_COND(addr, return pio_read16be(port), return mmio_read16be(addr));
85 return 0xffff; 85 return 0xffff;
86} 86}
87unsigned int fastcall ioread32(void __iomem *addr) 87unsigned int ioread32(void __iomem *addr)
88{ 88{
89 IO_COND(addr, return inl(port), return readl(addr)); 89 IO_COND(addr, return inl(port), return readl(addr));
90 return 0xffffffff; 90 return 0xffffffff;
91} 91}
92unsigned int fastcall ioread32be(void __iomem *addr) 92unsigned int ioread32be(void __iomem *addr)
93{ 93{
94 IO_COND(addr, return pio_read32be(port), return mmio_read32be(addr)); 94 IO_COND(addr, return pio_read32be(port), return mmio_read32be(addr));
95 return 0xffffffff; 95 return 0xffffffff;
@@ -110,23 +110,23 @@ EXPORT_SYMBOL(ioread32be);
110#define mmio_write32be(val,port) __raw_writel(be32_to_cpu(val),port) 110#define mmio_write32be(val,port) __raw_writel(be32_to_cpu(val),port)
111#endif 111#endif
112 112
113void fastcall iowrite8(u8 val, void __iomem *addr) 113void iowrite8(u8 val, void __iomem *addr)
114{ 114{
115 IO_COND(addr, outb(val,port), writeb(val, addr)); 115 IO_COND(addr, outb(val,port), writeb(val, addr));
116} 116}
117void fastcall iowrite16(u16 val, void __iomem *addr) 117void iowrite16(u16 val, void __iomem *addr)
118{ 118{
119 IO_COND(addr, outw(val,port), writew(val, addr)); 119 IO_COND(addr, outw(val,port), writew(val, addr));
120} 120}
121void fastcall iowrite16be(u16 val, void __iomem *addr) 121void iowrite16be(u16 val, void __iomem *addr)
122{ 122{
123 IO_COND(addr, pio_write16be(val,port), mmio_write16be(val, addr)); 123 IO_COND(addr, pio_write16be(val,port), mmio_write16be(val, addr));
124} 124}
125void fastcall iowrite32(u32 val, void __iomem *addr) 125void iowrite32(u32 val, void __iomem *addr)
126{ 126{
127 IO_COND(addr, outl(val,port), writel(val, addr)); 127 IO_COND(addr, outl(val,port), writel(val, addr));
128} 128}
129void fastcall iowrite32be(u32 val, void __iomem *addr) 129void iowrite32be(u32 val, void __iomem *addr)
130{ 130{
131 IO_COND(addr, pio_write32be(val,port), mmio_write32be(val, addr)); 131 IO_COND(addr, pio_write32be(val,port), mmio_write32be(val, addr));
132} 132}
@@ -193,15 +193,15 @@ static inline void mmio_outsl(void __iomem *addr, const u32 *src, int count)
193} 193}
194#endif 194#endif
195 195
196void fastcall ioread8_rep(void __iomem *addr, void *dst, unsigned long count) 196void ioread8_rep(void __iomem *addr, void *dst, unsigned long count)
197{ 197{
198 IO_COND(addr, insb(port,dst,count), mmio_insb(addr, dst, count)); 198 IO_COND(addr, insb(port,dst,count), mmio_insb(addr, dst, count));
199} 199}
200void fastcall ioread16_rep(void __iomem *addr, void *dst, unsigned long count) 200void ioread16_rep(void __iomem *addr, void *dst, unsigned long count)
201{ 201{
202 IO_COND(addr, insw(port,dst,count), mmio_insw(addr, dst, count)); 202 IO_COND(addr, insw(port,dst,count), mmio_insw(addr, dst, count));
203} 203}
204void fastcall ioread32_rep(void __iomem *addr, void *dst, unsigned long count) 204void ioread32_rep(void __iomem *addr, void *dst, unsigned long count)
205{ 205{
206 IO_COND(addr, insl(port,dst,count), mmio_insl(addr, dst, count)); 206 IO_COND(addr, insl(port,dst,count), mmio_insl(addr, dst, count));
207} 207}
@@ -209,15 +209,15 @@ EXPORT_SYMBOL(ioread8_rep);
209EXPORT_SYMBOL(ioread16_rep); 209EXPORT_SYMBOL(ioread16_rep);
210EXPORT_SYMBOL(ioread32_rep); 210EXPORT_SYMBOL(ioread32_rep);
211 211
212void fastcall iowrite8_rep(void __iomem *addr, const void *src, unsigned long count) 212void iowrite8_rep(void __iomem *addr, const void *src, unsigned long count)
213{ 213{
214 IO_COND(addr, outsb(port, src, count), mmio_outsb(addr, src, count)); 214 IO_COND(addr, outsb(port, src, count), mmio_outsb(addr, src, count));
215} 215}
216void fastcall iowrite16_rep(void __iomem *addr, const void *src, unsigned long count) 216void iowrite16_rep(void __iomem *addr, const void *src, unsigned long count)
217{ 217{
218 IO_COND(addr, outsw(port, src, count), mmio_outsw(addr, src, count)); 218 IO_COND(addr, outsw(port, src, count), mmio_outsw(addr, src, count));
219} 219}
220void fastcall iowrite32_rep(void __iomem *addr, const void *src, unsigned long count) 220void iowrite32_rep(void __iomem *addr, const void *src, unsigned long count)
221{ 221{
222 IO_COND(addr, outsl(port, src,count), mmio_outsl(addr, src, count)); 222 IO_COND(addr, outsl(port, src,count), mmio_outsl(addr, src, count));
223} 223}
diff --git a/lib/rwsem-spinlock.c b/lib/rwsem-spinlock.c
index c4cfd6c0342f..9df3ca56db11 100644
--- a/lib/rwsem-spinlock.c
+++ b/lib/rwsem-spinlock.c
@@ -125,7 +125,7 @@ __rwsem_wake_one_writer(struct rw_semaphore *sem)
125/* 125/*
126 * get a read lock on the semaphore 126 * get a read lock on the semaphore
127 */ 127 */
128void fastcall __sched __down_read(struct rw_semaphore *sem) 128void __sched __down_read(struct rw_semaphore *sem)
129{ 129{
130 struct rwsem_waiter waiter; 130 struct rwsem_waiter waiter;
131 struct task_struct *tsk; 131 struct task_struct *tsk;
@@ -168,7 +168,7 @@ void fastcall __sched __down_read(struct rw_semaphore *sem)
168/* 168/*
169 * trylock for reading -- returns 1 if successful, 0 if contention 169 * trylock for reading -- returns 1 if successful, 0 if contention
170 */ 170 */
171int fastcall __down_read_trylock(struct rw_semaphore *sem) 171int __down_read_trylock(struct rw_semaphore *sem)
172{ 172{
173 unsigned long flags; 173 unsigned long flags;
174 int ret = 0; 174 int ret = 0;
@@ -191,7 +191,7 @@ int fastcall __down_read_trylock(struct rw_semaphore *sem)
191 * get a write lock on the semaphore 191 * get a write lock on the semaphore
192 * - we increment the waiting count anyway to indicate an exclusive lock 192 * - we increment the waiting count anyway to indicate an exclusive lock
193 */ 193 */
194void fastcall __sched __down_write_nested(struct rw_semaphore *sem, int subclass) 194void __sched __down_write_nested(struct rw_semaphore *sem, int subclass)
195{ 195{
196 struct rwsem_waiter waiter; 196 struct rwsem_waiter waiter;
197 struct task_struct *tsk; 197 struct task_struct *tsk;
@@ -231,7 +231,7 @@ void fastcall __sched __down_write_nested(struct rw_semaphore *sem, int subclass
231 ; 231 ;
232} 232}
233 233
234void fastcall __sched __down_write(struct rw_semaphore *sem) 234void __sched __down_write(struct rw_semaphore *sem)
235{ 235{
236 __down_write_nested(sem, 0); 236 __down_write_nested(sem, 0);
237} 237}
@@ -239,7 +239,7 @@ void fastcall __sched __down_write(struct rw_semaphore *sem)
239/* 239/*
240 * trylock for writing -- returns 1 if successful, 0 if contention 240 * trylock for writing -- returns 1 if successful, 0 if contention
241 */ 241 */
242int fastcall __down_write_trylock(struct rw_semaphore *sem) 242int __down_write_trylock(struct rw_semaphore *sem)
243{ 243{
244 unsigned long flags; 244 unsigned long flags;
245 int ret = 0; 245 int ret = 0;
@@ -260,7 +260,7 @@ int fastcall __down_write_trylock(struct rw_semaphore *sem)
260/* 260/*
261 * release a read lock on the semaphore 261 * release a read lock on the semaphore
262 */ 262 */
263void fastcall __up_read(struct rw_semaphore *sem) 263void __up_read(struct rw_semaphore *sem)
264{ 264{
265 unsigned long flags; 265 unsigned long flags;
266 266
@@ -275,7 +275,7 @@ void fastcall __up_read(struct rw_semaphore *sem)
275/* 275/*
276 * release a write lock on the semaphore 276 * release a write lock on the semaphore
277 */ 277 */
278void fastcall __up_write(struct rw_semaphore *sem) 278void __up_write(struct rw_semaphore *sem)
279{ 279{
280 unsigned long flags; 280 unsigned long flags;
281 281
@@ -292,7 +292,7 @@ void fastcall __up_write(struct rw_semaphore *sem)
292 * downgrade a write lock into a read lock 292 * downgrade a write lock into a read lock
293 * - just wake up any readers at the front of the queue 293 * - just wake up any readers at the front of the queue
294 */ 294 */
295void fastcall __downgrade_write(struct rw_semaphore *sem) 295void __downgrade_write(struct rw_semaphore *sem)
296{ 296{
297 unsigned long flags; 297 unsigned long flags;
298 298
diff --git a/lib/semaphore-sleepers.c b/lib/semaphore-sleepers.c
index 128180523860..0198782cdacb 100644
--- a/lib/semaphore-sleepers.c
+++ b/lib/semaphore-sleepers.c
@@ -48,12 +48,12 @@
48 * we cannot lose wakeup events. 48 * we cannot lose wakeup events.
49 */ 49 */
50 50
51fastcall void __up(struct semaphore *sem) 51void __up(struct semaphore *sem)
52{ 52{
53 wake_up(&sem->wait); 53 wake_up(&sem->wait);
54} 54}
55 55
56fastcall void __sched __down(struct semaphore * sem) 56void __sched __down(struct semaphore *sem)
57{ 57{
58 struct task_struct *tsk = current; 58 struct task_struct *tsk = current;
59 DECLARE_WAITQUEUE(wait, tsk); 59 DECLARE_WAITQUEUE(wait, tsk);
@@ -90,7 +90,7 @@ fastcall void __sched __down(struct semaphore * sem)
90 tsk->state = TASK_RUNNING; 90 tsk->state = TASK_RUNNING;
91} 91}
92 92
93fastcall int __sched __down_interruptible(struct semaphore * sem) 93int __sched __down_interruptible(struct semaphore *sem)
94{ 94{
95 int retval = 0; 95 int retval = 0;
96 struct task_struct *tsk = current; 96 struct task_struct *tsk = current;
@@ -153,7 +153,7 @@ fastcall int __sched __down_interruptible(struct semaphore * sem)
153 * single "cmpxchg" without failure cases, 153 * single "cmpxchg" without failure cases,
154 * but then it wouldn't work on a 386. 154 * but then it wouldn't work on a 386.
155 */ 155 */
156fastcall int __down_trylock(struct semaphore * sem) 156int __down_trylock(struct semaphore *sem)
157{ 157{
158 int sleepers; 158 int sleepers;
159 unsigned long flags; 159 unsigned long flags;
diff --git a/lib/vsprintf.c b/lib/vsprintf.c
index 7b481cea54ae..419993f58c6b 100644
--- a/lib/vsprintf.c
+++ b/lib/vsprintf.c
@@ -126,6 +126,129 @@ long long simple_strtoll(const char *cp,char **endp,unsigned int base)
126 return simple_strtoull(cp,endp,base); 126 return simple_strtoull(cp,endp,base);
127} 127}
128 128
129
130/**
131 * strict_strtoul - convert a string to an unsigned long strictly
132 * @cp: The string to be converted
133 * @base: The number base to use
134 * @res: The converted result value
135 *
136 * strict_strtoul converts a string to an unsigned long only if the
137 * string is really an unsigned long string, any string containing
138 * any invalid char at the tail will be rejected and -EINVAL is returned,
139 * only a newline char at the tail is acceptible because people generally
140 * change a module parameter in the following way:
141 *
142 * echo 1024 > /sys/module/e1000/parameters/copybreak
143 *
144 * echo will append a newline to the tail.
145 *
146 * It returns 0 if conversion is successful and *res is set to the converted
147 * value, otherwise it returns -EINVAL and *res is set to 0.
148 *
149 * simple_strtoul just ignores the successive invalid characters and
150 * return the converted value of prefix part of the string.
151 */
152int strict_strtoul(const char *cp, unsigned int base, unsigned long *res);
153
154/**
155 * strict_strtol - convert a string to a long strictly
156 * @cp: The string to be converted
157 * @base: The number base to use
158 * @res: The converted result value
159 *
160 * strict_strtol is similiar to strict_strtoul, but it allows the first
161 * character of a string is '-'.
162 *
163 * It returns 0 if conversion is successful and *res is set to the converted
164 * value, otherwise it returns -EINVAL and *res is set to 0.
165 */
166int strict_strtol(const char *cp, unsigned int base, long *res);
167
168/**
169 * strict_strtoull - convert a string to an unsigned long long strictly
170 * @cp: The string to be converted
171 * @base: The number base to use
172 * @res: The converted result value
173 *
174 * strict_strtoull converts a string to an unsigned long long only if the
175 * string is really an unsigned long long string, any string containing
176 * any invalid char at the tail will be rejected and -EINVAL is returned,
177 * only a newline char at the tail is acceptible because people generally
178 * change a module parameter in the following way:
179 *
180 * echo 1024 > /sys/module/e1000/parameters/copybreak
181 *
182 * echo will append a newline to the tail of the string.
183 *
184 * It returns 0 if conversion is successful and *res is set to the converted
185 * value, otherwise it returns -EINVAL and *res is set to 0.
186 *
187 * simple_strtoull just ignores the successive invalid characters and
188 * return the converted value of prefix part of the string.
189 */
190int strict_strtoull(const char *cp, unsigned int base, unsigned long long *res);
191
192/**
193 * strict_strtoll - convert a string to a long long strictly
194 * @cp: The string to be converted
195 * @base: The number base to use
196 * @res: The converted result value
197 *
198 * strict_strtoll is similiar to strict_strtoull, but it allows the first
199 * character of a string is '-'.
200 *
201 * It returns 0 if conversion is successful and *res is set to the converted
202 * value, otherwise it returns -EINVAL and *res is set to 0.
203 */
204int strict_strtoll(const char *cp, unsigned int base, long long *res);
205
206#define define_strict_strtoux(type, valtype) \
207int strict_strtou##type(const char *cp, unsigned int base, valtype *res)\
208{ \
209 char *tail; \
210 valtype val; \
211 size_t len; \
212 \
213 *res = 0; \
214 len = strlen(cp); \
215 if (len == 0) \
216 return -EINVAL; \
217 \
218 val = simple_strtoul(cp, &tail, base); \
219 if ((*tail == '\0') || \
220 ((len == (size_t)(tail - cp) + 1) && (*tail == '\n'))) {\
221 *res = val; \
222 return 0; \
223 } \
224 \
225 return -EINVAL; \
226} \
227
228#define define_strict_strtox(type, valtype) \
229int strict_strto##type(const char *cp, unsigned int base, valtype *res) \
230{ \
231 int ret; \
232 if (*cp == '-') { \
233 ret = strict_strtou##type(cp+1, base, res); \
234 if (ret != 0) \
235 *res = -(*res); \
236 } else \
237 ret = strict_strtou##type(cp, base, res); \
238 \
239 return ret; \
240} \
241
242define_strict_strtoux(l, unsigned long)
243define_strict_strtox(l, long)
244define_strict_strtoux(ll, unsigned long long)
245define_strict_strtox(ll, long long)
246
247EXPORT_SYMBOL(strict_strtoul);
248EXPORT_SYMBOL(strict_strtol);
249EXPORT_SYMBOL(strict_strtoll);
250EXPORT_SYMBOL(strict_strtoull);
251
129static int skip_atoi(const char **s) 252static int skip_atoi(const char **s)
130{ 253{
131 int i=0; 254 int i=0;
diff --git a/mm/filemap.c b/mm/filemap.c
index 5357fcc4643b..b7b1be6dbd83 100644
--- a/mm/filemap.c
+++ b/mm/filemap.c
@@ -875,9 +875,7 @@ static void shrink_readahead_size_eio(struct file *filp,
875} 875}
876 876
877/** 877/**
878 * do_generic_mapping_read - generic file read routine 878 * do_generic_file_read - generic file read routine
879 * @mapping: address_space to be read
880 * @ra: file's readahead state
881 * @filp: the file to read 879 * @filp: the file to read
882 * @ppos: current file position 880 * @ppos: current file position
883 * @desc: read_descriptor 881 * @desc: read_descriptor
@@ -888,18 +886,13 @@ static void shrink_readahead_size_eio(struct file *filp,
888 * 886 *
889 * This is really ugly. But the goto's actually try to clarify some 887 * This is really ugly. But the goto's actually try to clarify some
890 * of the logic when it comes to error handling etc. 888 * of the logic when it comes to error handling etc.
891 *
892 * Note the struct file* is only passed for the use of readpage.
893 * It may be NULL.
894 */ 889 */
895void do_generic_mapping_read(struct address_space *mapping, 890static void do_generic_file_read(struct file *filp, loff_t *ppos,
896 struct file_ra_state *ra, 891 read_descriptor_t *desc, read_actor_t actor)
897 struct file *filp,
898 loff_t *ppos,
899 read_descriptor_t *desc,
900 read_actor_t actor)
901{ 892{
893 struct address_space *mapping = filp->f_mapping;
902 struct inode *inode = mapping->host; 894 struct inode *inode = mapping->host;
895 struct file_ra_state *ra = &filp->f_ra;
903 pgoff_t index; 896 pgoff_t index;
904 pgoff_t last_index; 897 pgoff_t last_index;
905 pgoff_t prev_index; 898 pgoff_t prev_index;
@@ -1091,7 +1084,6 @@ out:
1091 if (filp) 1084 if (filp)
1092 file_accessed(filp); 1085 file_accessed(filp);
1093} 1086}
1094EXPORT_SYMBOL(do_generic_mapping_read);
1095 1087
1096int file_read_actor(read_descriptor_t *desc, struct page *page, 1088int file_read_actor(read_descriptor_t *desc, struct page *page,
1097 unsigned long offset, unsigned long size) 1089 unsigned long offset, unsigned long size)
@@ -1332,7 +1324,7 @@ int filemap_fault(struct vm_area_struct *vma, struct vm_fault *vmf)
1332 struct file_ra_state *ra = &file->f_ra; 1324 struct file_ra_state *ra = &file->f_ra;
1333 struct inode *inode = mapping->host; 1325 struct inode *inode = mapping->host;
1334 struct page *page; 1326 struct page *page;
1335 unsigned long size; 1327 pgoff_t size;
1336 int did_readaround = 0; 1328 int did_readaround = 0;
1337 int ret = 0; 1329 int ret = 0;
1338 1330
diff --git a/mm/filemap_xip.c b/mm/filemap_xip.c
index 0420a0292b03..5e598c42afd7 100644
--- a/mm/filemap_xip.c
+++ b/mm/filemap_xip.c
@@ -56,7 +56,8 @@ do_xip_mapping_read(struct address_space *mapping,
56 read_actor_t actor) 56 read_actor_t actor)
57{ 57{
58 struct inode *inode = mapping->host; 58 struct inode *inode = mapping->host;
59 unsigned long index, end_index, offset; 59 pgoff_t index, end_index;
60 unsigned long offset;
60 loff_t isize; 61 loff_t isize;
61 62
62 BUG_ON(!mapping->a_ops->get_xip_page); 63 BUG_ON(!mapping->a_ops->get_xip_page);
diff --git a/mm/hugetlb.c b/mm/hugetlb.c
index 1a5642074e34..d9a380312467 100644
--- a/mm/hugetlb.c
+++ b/mm/hugetlb.c
@@ -605,6 +605,16 @@ int hugetlb_treat_movable_handler(struct ctl_table *table, int write,
605 return 0; 605 return 0;
606} 606}
607 607
608int hugetlb_overcommit_handler(struct ctl_table *table, int write,
609 struct file *file, void __user *buffer,
610 size_t *length, loff_t *ppos)
611{
612 spin_lock(&hugetlb_lock);
613 proc_doulongvec_minmax(table, write, file, buffer, length, ppos);
614 spin_unlock(&hugetlb_lock);
615 return 0;
616}
617
608#endif /* CONFIG_SYSCTL */ 618#endif /* CONFIG_SYSCTL */
609 619
610int hugetlb_report_meminfo(char *buf) 620int hugetlb_report_meminfo(char *buf)
diff --git a/mm/memory.c b/mm/memory.c
index 153a54b2013c..e5628a5fd678 100644
--- a/mm/memory.c
+++ b/mm/memory.c
@@ -134,11 +134,9 @@ void pmd_clear_bad(pmd_t *pmd)
134 */ 134 */
135static void free_pte_range(struct mmu_gather *tlb, pmd_t *pmd) 135static void free_pte_range(struct mmu_gather *tlb, pmd_t *pmd)
136{ 136{
137 struct page *page = pmd_page(*pmd); 137 pgtable_t token = pmd_pgtable(*pmd);
138 pmd_clear(pmd); 138 pmd_clear(pmd);
139 pte_lock_deinit(page); 139 pte_free_tlb(tlb, token);
140 pte_free_tlb(tlb, page);
141 dec_zone_page_state(page, NR_PAGETABLE);
142 tlb->mm->nr_ptes--; 140 tlb->mm->nr_ptes--;
143} 141}
144 142
@@ -309,21 +307,19 @@ void free_pgtables(struct mmu_gather **tlb, struct vm_area_struct *vma,
309 307
310int __pte_alloc(struct mm_struct *mm, pmd_t *pmd, unsigned long address) 308int __pte_alloc(struct mm_struct *mm, pmd_t *pmd, unsigned long address)
311{ 309{
312 struct page *new = pte_alloc_one(mm, address); 310 pgtable_t new = pte_alloc_one(mm, address);
313 if (!new) 311 if (!new)
314 return -ENOMEM; 312 return -ENOMEM;
315 313
316 pte_lock_init(new);
317 spin_lock(&mm->page_table_lock); 314 spin_lock(&mm->page_table_lock);
318 if (pmd_present(*pmd)) { /* Another has populated it */ 315 if (!pmd_present(*pmd)) { /* Has another populated it ? */
319 pte_lock_deinit(new);
320 pte_free(mm, new);
321 } else {
322 mm->nr_ptes++; 316 mm->nr_ptes++;
323 inc_zone_page_state(new, NR_PAGETABLE);
324 pmd_populate(mm, pmd, new); 317 pmd_populate(mm, pmd, new);
318 new = NULL;
325 } 319 }
326 spin_unlock(&mm->page_table_lock); 320 spin_unlock(&mm->page_table_lock);
321 if (new)
322 pte_free(mm, new);
327 return 0; 323 return 0;
328} 324}
329 325
@@ -334,11 +330,13 @@ int __pte_alloc_kernel(pmd_t *pmd, unsigned long address)
334 return -ENOMEM; 330 return -ENOMEM;
335 331
336 spin_lock(&init_mm.page_table_lock); 332 spin_lock(&init_mm.page_table_lock);
337 if (pmd_present(*pmd)) /* Another has populated it */ 333 if (!pmd_present(*pmd)) { /* Has another populated it ? */
338 pte_free_kernel(&init_mm, new);
339 else
340 pmd_populate_kernel(&init_mm, pmd, new); 334 pmd_populate_kernel(&init_mm, pmd, new);
335 new = NULL;
336 }
341 spin_unlock(&init_mm.page_table_lock); 337 spin_unlock(&init_mm.page_table_lock);
338 if (new)
339 pte_free_kernel(&init_mm, new);
342 return 0; 340 return 0;
343} 341}
344 342
@@ -1390,7 +1388,7 @@ static int apply_to_pte_range(struct mm_struct *mm, pmd_t *pmd,
1390{ 1388{
1391 pte_t *pte; 1389 pte_t *pte;
1392 int err; 1390 int err;
1393 struct page *pmd_page; 1391 pgtable_t token;
1394 spinlock_t *uninitialized_var(ptl); 1392 spinlock_t *uninitialized_var(ptl);
1395 1393
1396 pte = (mm == &init_mm) ? 1394 pte = (mm == &init_mm) ?
@@ -1401,10 +1399,10 @@ static int apply_to_pte_range(struct mm_struct *mm, pmd_t *pmd,
1401 1399
1402 BUG_ON(pmd_huge(*pmd)); 1400 BUG_ON(pmd_huge(*pmd));
1403 1401
1404 pmd_page = pmd_page(*pmd); 1402 token = pmd_pgtable(*pmd);
1405 1403
1406 do { 1404 do {
1407 err = fn(pte, pmd_page, addr, data); 1405 err = fn(pte, token, addr, data);
1408 if (err) 1406 if (err)
1409 break; 1407 break;
1410 } while (pte++, addr += PAGE_SIZE, addr != end); 1408 } while (pte++, addr += PAGE_SIZE, addr != end);
diff --git a/mm/page_alloc.c b/mm/page_alloc.c
index 26a54a17dc9f..75b979313346 100644
--- a/mm/page_alloc.c
+++ b/mm/page_alloc.c
@@ -1451,7 +1451,7 @@ try_next_zone:
1451/* 1451/*
1452 * This is the 'heart' of the zoned buddy allocator. 1452 * This is the 'heart' of the zoned buddy allocator.
1453 */ 1453 */
1454struct page * fastcall 1454struct page *
1455__alloc_pages(gfp_t gfp_mask, unsigned int order, 1455__alloc_pages(gfp_t gfp_mask, unsigned int order,
1456 struct zonelist *zonelist) 1456 struct zonelist *zonelist)
1457{ 1457{
diff --git a/mm/shmem.c b/mm/shmem.c
index 85bed948fafc..90b576cbc06e 100644
--- a/mm/shmem.c
+++ b/mm/shmem.c
@@ -49,6 +49,7 @@
49#include <linux/ctype.h> 49#include <linux/ctype.h>
50#include <linux/migrate.h> 50#include <linux/migrate.h>
51#include <linux/highmem.h> 51#include <linux/highmem.h>
52#include <linux/seq_file.h>
52 53
53#include <asm/uaccess.h> 54#include <asm/uaccess.h>
54#include <asm/div64.h> 55#include <asm/div64.h>
@@ -84,6 +85,18 @@ enum sgp_type {
84 SGP_WRITE, /* may exceed i_size, may allocate page */ 85 SGP_WRITE, /* may exceed i_size, may allocate page */
85}; 86};
86 87
88#ifdef CONFIG_TMPFS
89static unsigned long shmem_default_max_blocks(void)
90{
91 return totalram_pages / 2;
92}
93
94static unsigned long shmem_default_max_inodes(void)
95{
96 return min(totalram_pages - totalhigh_pages, totalram_pages / 2);
97}
98#endif
99
87static int shmem_getpage(struct inode *inode, unsigned long idx, 100static int shmem_getpage(struct inode *inode, unsigned long idx,
88 struct page **pagep, enum sgp_type sgp, int *type); 101 struct page **pagep, enum sgp_type sgp, int *type);
89 102
@@ -1068,7 +1081,8 @@ redirty:
1068} 1081}
1069 1082
1070#ifdef CONFIG_NUMA 1083#ifdef CONFIG_NUMA
1071static inline int shmem_parse_mpol(char *value, int *policy, nodemask_t *policy_nodes) 1084#ifdef CONFIG_TMPFS
1085static int shmem_parse_mpol(char *value, int *policy, nodemask_t *policy_nodes)
1072{ 1086{
1073 char *nodelist = strchr(value, ':'); 1087 char *nodelist = strchr(value, ':');
1074 int err = 1; 1088 int err = 1;
@@ -1117,6 +1131,42 @@ out:
1117 return err; 1131 return err;
1118} 1132}
1119 1133
1134static void shmem_show_mpol(struct seq_file *seq, int policy,
1135 const nodemask_t policy_nodes)
1136{
1137 char *policy_string;
1138
1139 switch (policy) {
1140 case MPOL_PREFERRED:
1141 policy_string = "prefer";
1142 break;
1143 case MPOL_BIND:
1144 policy_string = "bind";
1145 break;
1146 case MPOL_INTERLEAVE:
1147 policy_string = "interleave";
1148 break;
1149 default:
1150 /* MPOL_DEFAULT */
1151 return;
1152 }
1153
1154 seq_printf(seq, ",mpol=%s", policy_string);
1155
1156 if (policy != MPOL_INTERLEAVE ||
1157 !nodes_equal(policy_nodes, node_states[N_HIGH_MEMORY])) {
1158 char buffer[64];
1159 int len;
1160
1161 len = nodelist_scnprintf(buffer, sizeof(buffer), policy_nodes);
1162 if (len < sizeof(buffer))
1163 seq_printf(seq, ":%s", buffer);
1164 else
1165 seq_printf(seq, ":?");
1166 }
1167}
1168#endif /* CONFIG_TMPFS */
1169
1120static struct page *shmem_swapin(swp_entry_t entry, gfp_t gfp, 1170static struct page *shmem_swapin(swp_entry_t entry, gfp_t gfp,
1121 struct shmem_inode_info *info, unsigned long idx) 1171 struct shmem_inode_info *info, unsigned long idx)
1122{ 1172{
@@ -1148,13 +1198,20 @@ static struct page *shmem_alloc_page(gfp_t gfp,
1148 mpol_free(pvma.vm_policy); 1198 mpol_free(pvma.vm_policy);
1149 return page; 1199 return page;
1150} 1200}
1151#else 1201#else /* !CONFIG_NUMA */
1202#ifdef CONFIG_TMPFS
1152static inline int shmem_parse_mpol(char *value, int *policy, 1203static inline int shmem_parse_mpol(char *value, int *policy,
1153 nodemask_t *policy_nodes) 1204 nodemask_t *policy_nodes)
1154{ 1205{
1155 return 1; 1206 return 1;
1156} 1207}
1157 1208
1209static inline void shmem_show_mpol(struct seq_file *seq, int policy,
1210 const nodemask_t policy_nodes)
1211{
1212}
1213#endif /* CONFIG_TMPFS */
1214
1158static inline struct page *shmem_swapin(swp_entry_t entry, gfp_t gfp, 1215static inline struct page *shmem_swapin(swp_entry_t entry, gfp_t gfp,
1159 struct shmem_inode_info *info, unsigned long idx) 1216 struct shmem_inode_info *info, unsigned long idx)
1160{ 1217{
@@ -1166,7 +1223,7 @@ static inline struct page *shmem_alloc_page(gfp_t gfp,
1166{ 1223{
1167 return alloc_page(gfp); 1224 return alloc_page(gfp);
1168} 1225}
1169#endif 1226#endif /* CONFIG_NUMA */
1170 1227
1171/* 1228/*
1172 * shmem_getpage - either get the page from swap or allocate a new one 1229 * shmem_getpage - either get the page from swap or allocate a new one
@@ -2077,9 +2134,8 @@ static const struct export_operations shmem_export_ops = {
2077 .fh_to_dentry = shmem_fh_to_dentry, 2134 .fh_to_dentry = shmem_fh_to_dentry,
2078}; 2135};
2079 2136
2080static int shmem_parse_options(char *options, int *mode, uid_t *uid, 2137static int shmem_parse_options(char *options, struct shmem_sb_info *sbinfo,
2081 gid_t *gid, unsigned long *blocks, unsigned long *inodes, 2138 bool remount)
2082 int *policy, nodemask_t *policy_nodes)
2083{ 2139{
2084 char *this_char, *value, *rest; 2140 char *this_char, *value, *rest;
2085 2141
@@ -2122,35 +2178,37 @@ static int shmem_parse_options(char *options, int *mode, uid_t *uid,
2122 } 2178 }
2123 if (*rest) 2179 if (*rest)
2124 goto bad_val; 2180 goto bad_val;
2125 *blocks = DIV_ROUND_UP(size, PAGE_CACHE_SIZE); 2181 sbinfo->max_blocks =
2182 DIV_ROUND_UP(size, PAGE_CACHE_SIZE);
2126 } else if (!strcmp(this_char,"nr_blocks")) { 2183 } else if (!strcmp(this_char,"nr_blocks")) {
2127 *blocks = memparse(value,&rest); 2184 sbinfo->max_blocks = memparse(value, &rest);
2128 if (*rest) 2185 if (*rest)
2129 goto bad_val; 2186 goto bad_val;
2130 } else if (!strcmp(this_char,"nr_inodes")) { 2187 } else if (!strcmp(this_char,"nr_inodes")) {
2131 *inodes = memparse(value,&rest); 2188 sbinfo->max_inodes = memparse(value, &rest);
2132 if (*rest) 2189 if (*rest)
2133 goto bad_val; 2190 goto bad_val;
2134 } else if (!strcmp(this_char,"mode")) { 2191 } else if (!strcmp(this_char,"mode")) {
2135 if (!mode) 2192 if (remount)
2136 continue; 2193 continue;
2137 *mode = simple_strtoul(value,&rest,8); 2194 sbinfo->mode = simple_strtoul(value, &rest, 8) & 07777;
2138 if (*rest) 2195 if (*rest)
2139 goto bad_val; 2196 goto bad_val;
2140 } else if (!strcmp(this_char,"uid")) { 2197 } else if (!strcmp(this_char,"uid")) {
2141 if (!uid) 2198 if (remount)
2142 continue; 2199 continue;
2143 *uid = simple_strtoul(value,&rest,0); 2200 sbinfo->uid = simple_strtoul(value, &rest, 0);
2144 if (*rest) 2201 if (*rest)
2145 goto bad_val; 2202 goto bad_val;
2146 } else if (!strcmp(this_char,"gid")) { 2203 } else if (!strcmp(this_char,"gid")) {
2147 if (!gid) 2204 if (remount)
2148 continue; 2205 continue;
2149 *gid = simple_strtoul(value,&rest,0); 2206 sbinfo->gid = simple_strtoul(value, &rest, 0);
2150 if (*rest) 2207 if (*rest)
2151 goto bad_val; 2208 goto bad_val;
2152 } else if (!strcmp(this_char,"mpol")) { 2209 } else if (!strcmp(this_char,"mpol")) {
2153 if (shmem_parse_mpol(value,policy,policy_nodes)) 2210 if (shmem_parse_mpol(value, &sbinfo->policy,
2211 &sbinfo->policy_nodes))
2154 goto bad_val; 2212 goto bad_val;
2155 } else { 2213 } else {
2156 printk(KERN_ERR "tmpfs: Bad mount option %s\n", 2214 printk(KERN_ERR "tmpfs: Bad mount option %s\n",
@@ -2170,24 +2228,20 @@ bad_val:
2170static int shmem_remount_fs(struct super_block *sb, int *flags, char *data) 2228static int shmem_remount_fs(struct super_block *sb, int *flags, char *data)
2171{ 2229{
2172 struct shmem_sb_info *sbinfo = SHMEM_SB(sb); 2230 struct shmem_sb_info *sbinfo = SHMEM_SB(sb);
2173 unsigned long max_blocks = sbinfo->max_blocks; 2231 struct shmem_sb_info config = *sbinfo;
2174 unsigned long max_inodes = sbinfo->max_inodes;
2175 int policy = sbinfo->policy;
2176 nodemask_t policy_nodes = sbinfo->policy_nodes;
2177 unsigned long blocks; 2232 unsigned long blocks;
2178 unsigned long inodes; 2233 unsigned long inodes;
2179 int error = -EINVAL; 2234 int error = -EINVAL;
2180 2235
2181 if (shmem_parse_options(data, NULL, NULL, NULL, &max_blocks, 2236 if (shmem_parse_options(data, &config, true))
2182 &max_inodes, &policy, &policy_nodes))
2183 return error; 2237 return error;
2184 2238
2185 spin_lock(&sbinfo->stat_lock); 2239 spin_lock(&sbinfo->stat_lock);
2186 blocks = sbinfo->max_blocks - sbinfo->free_blocks; 2240 blocks = sbinfo->max_blocks - sbinfo->free_blocks;
2187 inodes = sbinfo->max_inodes - sbinfo->free_inodes; 2241 inodes = sbinfo->max_inodes - sbinfo->free_inodes;
2188 if (max_blocks < blocks) 2242 if (config.max_blocks < blocks)
2189 goto out; 2243 goto out;
2190 if (max_inodes < inodes) 2244 if (config.max_inodes < inodes)
2191 goto out; 2245 goto out;
2192 /* 2246 /*
2193 * Those tests also disallow limited->unlimited while any are in 2247 * Those tests also disallow limited->unlimited while any are in
@@ -2195,23 +2249,42 @@ static int shmem_remount_fs(struct super_block *sb, int *flags, char *data)
2195 * but we must separately disallow unlimited->limited, because 2249 * but we must separately disallow unlimited->limited, because
2196 * in that case we have no record of how much is already in use. 2250 * in that case we have no record of how much is already in use.
2197 */ 2251 */
2198 if (max_blocks && !sbinfo->max_blocks) 2252 if (config.max_blocks && !sbinfo->max_blocks)
2199 goto out; 2253 goto out;
2200 if (max_inodes && !sbinfo->max_inodes) 2254 if (config.max_inodes && !sbinfo->max_inodes)
2201 goto out; 2255 goto out;
2202 2256
2203 error = 0; 2257 error = 0;
2204 sbinfo->max_blocks = max_blocks; 2258 sbinfo->max_blocks = config.max_blocks;
2205 sbinfo->free_blocks = max_blocks - blocks; 2259 sbinfo->free_blocks = config.max_blocks - blocks;
2206 sbinfo->max_inodes = max_inodes; 2260 sbinfo->max_inodes = config.max_inodes;
2207 sbinfo->free_inodes = max_inodes - inodes; 2261 sbinfo->free_inodes = config.max_inodes - inodes;
2208 sbinfo->policy = policy; 2262 sbinfo->policy = config.policy;
2209 sbinfo->policy_nodes = policy_nodes; 2263 sbinfo->policy_nodes = config.policy_nodes;
2210out: 2264out:
2211 spin_unlock(&sbinfo->stat_lock); 2265 spin_unlock(&sbinfo->stat_lock);
2212 return error; 2266 return error;
2213} 2267}
2214#endif 2268
2269static int shmem_show_options(struct seq_file *seq, struct vfsmount *vfs)
2270{
2271 struct shmem_sb_info *sbinfo = SHMEM_SB(vfs->mnt_sb);
2272
2273 if (sbinfo->max_blocks != shmem_default_max_blocks())
2274 seq_printf(seq, ",size=%luk",
2275 sbinfo->max_blocks << (PAGE_CACHE_SHIFT - 10));
2276 if (sbinfo->max_inodes != shmem_default_max_inodes())
2277 seq_printf(seq, ",nr_inodes=%lu", sbinfo->max_inodes);
2278 if (sbinfo->mode != (S_IRWXUGO | S_ISVTX))
2279 seq_printf(seq, ",mode=%03o", sbinfo->mode);
2280 if (sbinfo->uid != 0)
2281 seq_printf(seq, ",uid=%u", sbinfo->uid);
2282 if (sbinfo->gid != 0)
2283 seq_printf(seq, ",gid=%u", sbinfo->gid);
2284 shmem_show_mpol(seq, sbinfo->policy, sbinfo->policy_nodes);
2285 return 0;
2286}
2287#endif /* CONFIG_TMPFS */
2215 2288
2216static void shmem_put_super(struct super_block *sb) 2289static void shmem_put_super(struct super_block *sb)
2217{ 2290{
@@ -2224,15 +2297,23 @@ static int shmem_fill_super(struct super_block *sb,
2224{ 2297{
2225 struct inode *inode; 2298 struct inode *inode;
2226 struct dentry *root; 2299 struct dentry *root;
2227 int mode = S_IRWXUGO | S_ISVTX;
2228 uid_t uid = current->fsuid;
2229 gid_t gid = current->fsgid;
2230 int err = -ENOMEM;
2231 struct shmem_sb_info *sbinfo; 2300 struct shmem_sb_info *sbinfo;
2232 unsigned long blocks = 0; 2301 int err = -ENOMEM;
2233 unsigned long inodes = 0; 2302
2234 int policy = MPOL_DEFAULT; 2303 /* Round up to L1_CACHE_BYTES to resist false sharing */
2235 nodemask_t policy_nodes = node_states[N_HIGH_MEMORY]; 2304 sbinfo = kmalloc(max((int)sizeof(struct shmem_sb_info),
2305 L1_CACHE_BYTES), GFP_KERNEL);
2306 if (!sbinfo)
2307 return -ENOMEM;
2308
2309 sbinfo->max_blocks = 0;
2310 sbinfo->max_inodes = 0;
2311 sbinfo->mode = S_IRWXUGO | S_ISVTX;
2312 sbinfo->uid = current->fsuid;
2313 sbinfo->gid = current->fsgid;
2314 sbinfo->policy = MPOL_DEFAULT;
2315 sbinfo->policy_nodes = node_states[N_HIGH_MEMORY];
2316 sb->s_fs_info = sbinfo;
2236 2317
2237#ifdef CONFIG_TMPFS 2318#ifdef CONFIG_TMPFS
2238 /* 2319 /*
@@ -2241,34 +2322,22 @@ static int shmem_fill_super(struct super_block *sb,
2241 * but the internal instance is left unlimited. 2322 * but the internal instance is left unlimited.
2242 */ 2323 */
2243 if (!(sb->s_flags & MS_NOUSER)) { 2324 if (!(sb->s_flags & MS_NOUSER)) {
2244 blocks = totalram_pages / 2; 2325 sbinfo->max_blocks = shmem_default_max_blocks();
2245 inodes = totalram_pages - totalhigh_pages; 2326 sbinfo->max_inodes = shmem_default_max_inodes();
2246 if (inodes > blocks) 2327 if (shmem_parse_options(data, sbinfo, false)) {
2247 inodes = blocks; 2328 err = -EINVAL;
2248 if (shmem_parse_options(data, &mode, &uid, &gid, &blocks, 2329 goto failed;
2249 &inodes, &policy, &policy_nodes)) 2330 }
2250 return -EINVAL;
2251 } 2331 }
2252 sb->s_export_op = &shmem_export_ops; 2332 sb->s_export_op = &shmem_export_ops;
2253#else 2333#else
2254 sb->s_flags |= MS_NOUSER; 2334 sb->s_flags |= MS_NOUSER;
2255#endif 2335#endif
2256 2336
2257 /* Round up to L1_CACHE_BYTES to resist false sharing */
2258 sbinfo = kmalloc(max((int)sizeof(struct shmem_sb_info),
2259 L1_CACHE_BYTES), GFP_KERNEL);
2260 if (!sbinfo)
2261 return -ENOMEM;
2262
2263 spin_lock_init(&sbinfo->stat_lock); 2337 spin_lock_init(&sbinfo->stat_lock);
2264 sbinfo->max_blocks = blocks; 2338 sbinfo->free_blocks = sbinfo->max_blocks;
2265 sbinfo->free_blocks = blocks; 2339 sbinfo->free_inodes = sbinfo->max_inodes;
2266 sbinfo->max_inodes = inodes;
2267 sbinfo->free_inodes = inodes;
2268 sbinfo->policy = policy;
2269 sbinfo->policy_nodes = policy_nodes;
2270 2340
2271 sb->s_fs_info = sbinfo;
2272 sb->s_maxbytes = SHMEM_MAX_BYTES; 2341 sb->s_maxbytes = SHMEM_MAX_BYTES;
2273 sb->s_blocksize = PAGE_CACHE_SIZE; 2342 sb->s_blocksize = PAGE_CACHE_SIZE;
2274 sb->s_blocksize_bits = PAGE_CACHE_SHIFT; 2343 sb->s_blocksize_bits = PAGE_CACHE_SHIFT;
@@ -2280,11 +2349,11 @@ static int shmem_fill_super(struct super_block *sb,
2280 sb->s_flags |= MS_POSIXACL; 2349 sb->s_flags |= MS_POSIXACL;
2281#endif 2350#endif
2282 2351
2283 inode = shmem_get_inode(sb, S_IFDIR | mode, 0); 2352 inode = shmem_get_inode(sb, S_IFDIR | sbinfo->mode, 0);
2284 if (!inode) 2353 if (!inode)
2285 goto failed; 2354 goto failed;
2286 inode->i_uid = uid; 2355 inode->i_uid = sbinfo->uid;
2287 inode->i_gid = gid; 2356 inode->i_gid = sbinfo->gid;
2288 root = d_alloc_root(inode); 2357 root = d_alloc_root(inode);
2289 if (!root) 2358 if (!root)
2290 goto failed_iput; 2359 goto failed_iput;
@@ -2420,6 +2489,7 @@ static const struct super_operations shmem_ops = {
2420#ifdef CONFIG_TMPFS 2489#ifdef CONFIG_TMPFS
2421 .statfs = shmem_statfs, 2490 .statfs = shmem_statfs,
2422 .remount_fs = shmem_remount_fs, 2491 .remount_fs = shmem_remount_fs,
2492 .show_options = shmem_show_options,
2423#endif 2493#endif
2424 .delete_inode = shmem_delete_inode, 2494 .delete_inode = shmem_delete_inode,
2425 .drop_inode = generic_delete_inode, 2495 .drop_inode = generic_delete_inode,
diff --git a/mm/vmalloc.c b/mm/vmalloc.c
index 0536dde139d1..950c0be9ca81 100644
--- a/mm/vmalloc.c
+++ b/mm/vmalloc.c
@@ -820,7 +820,7 @@ void __attribute__((weak)) vmalloc_sync_all(void)
820} 820}
821 821
822 822
823static int f(pte_t *pte, struct page *pmd_page, unsigned long addr, void *data) 823static int f(pte_t *pte, pgtable_t table, unsigned long addr, void *data)
824{ 824{
825 /* apply_to_page_range() does all the hard work. */ 825 /* apply_to_page_range() does all the hard work. */
826 return 0; 826 return 0;
diff --git a/net/Kconfig b/net/Kconfig
index b6a5d454f2ff..6627c6ae5db6 100644
--- a/net/Kconfig
+++ b/net/Kconfig
@@ -30,7 +30,7 @@ menu "Networking options"
30config NET_NS 30config NET_NS
31 bool "Network namespace support" 31 bool "Network namespace support"
32 default n 32 default n
33 depends on EXPERIMENTAL && !SYSFS 33 depends on EXPERIMENTAL && !SYSFS && NAMESPACES
34 help 34 help
35 Allow user space to create what appear to be multiple instances 35 Allow user space to create what appear to be multiple instances
36 of the network stack. 36 of the network stack.
diff --git a/net/can/af_can.c b/net/can/af_can.c
index 5158e886630f..36b9f22ed83a 100644
--- a/net/can/af_can.c
+++ b/net/can/af_can.c
@@ -118,7 +118,6 @@ static int can_create(struct net *net, struct socket *sock, int protocol)
118{ 118{
119 struct sock *sk; 119 struct sock *sk;
120 struct can_proto *cp; 120 struct can_proto *cp;
121 char module_name[sizeof("can-proto-000")];
122 int err = 0; 121 int err = 0;
123 122
124 sock->state = SS_UNCONNECTED; 123 sock->state = SS_UNCONNECTED;
@@ -129,26 +128,21 @@ static int can_create(struct net *net, struct socket *sock, int protocol)
129 if (net != &init_net) 128 if (net != &init_net)
130 return -EAFNOSUPPORT; 129 return -EAFNOSUPPORT;
131 130
131#ifdef CONFIG_KMOD
132 /* try to load protocol module, when CONFIG_KMOD is defined */ 132 /* try to load protocol module, when CONFIG_KMOD is defined */
133 if (!proto_tab[protocol]) { 133 if (!proto_tab[protocol]) {
134 sprintf(module_name, "can-proto-%d", protocol); 134 err = request_module("can-proto-%d", protocol);
135 err = request_module(module_name);
136 135
137 /* 136 /*
138 * In case of error we only print a message but don't 137 * In case of error we only print a message but don't
139 * return the error code immediately. Below we will 138 * return the error code immediately. Below we will
140 * return -EPROTONOSUPPORT 139 * return -EPROTONOSUPPORT
141 */ 140 */
142 if (err == -ENOSYS) { 141 if (err && printk_ratelimit())
143 if (printk_ratelimit()) 142 printk(KERN_ERR "can: request_module "
144 printk(KERN_INFO "can: request_module(%s)" 143 "(can-proto-%d) failed.\n", protocol);
145 " not implemented.\n", module_name);
146 } else if (err) {
147 if (printk_ratelimit())
148 printk(KERN_ERR "can: request_module(%s)"
149 " failed.\n", module_name);
150 }
151 } 144 }
145#endif
152 146
153 spin_lock(&proto_tab_lock); 147 spin_lock(&proto_tab_lock);
154 cp = proto_tab[protocol]; 148 cp = proto_tab[protocol];
@@ -662,26 +656,26 @@ int can_proto_register(struct can_proto *cp)
662 return -EINVAL; 656 return -EINVAL;
663 } 657 }
664 658
659 err = proto_register(cp->prot, 0);
660 if (err < 0)
661 return err;
662
665 spin_lock(&proto_tab_lock); 663 spin_lock(&proto_tab_lock);
666 if (proto_tab[proto]) { 664 if (proto_tab[proto]) {
667 printk(KERN_ERR "can: protocol %d already registered\n", 665 printk(KERN_ERR "can: protocol %d already registered\n",
668 proto); 666 proto);
669 err = -EBUSY; 667 err = -EBUSY;
670 goto errout; 668 } else {
669 proto_tab[proto] = cp;
670
671 /* use generic ioctl function if not defined by module */
672 if (!cp->ops->ioctl)
673 cp->ops->ioctl = can_ioctl;
671 } 674 }
675 spin_unlock(&proto_tab_lock);
672 676
673 err = proto_register(cp->prot, 0);
674 if (err < 0) 677 if (err < 0)
675 goto errout; 678 proto_unregister(cp->prot);
676
677 proto_tab[proto] = cp;
678
679 /* use generic ioctl function if the module doesn't bring its own */
680 if (!cp->ops->ioctl)
681 cp->ops->ioctl = can_ioctl;
682
683 errout:
684 spin_unlock(&proto_tab_lock);
685 679
686 return err; 680 return err;
687} 681}
@@ -700,9 +694,10 @@ void can_proto_unregister(struct can_proto *cp)
700 printk(KERN_ERR "BUG: can: protocol %d is not registered\n", 694 printk(KERN_ERR "BUG: can: protocol %d is not registered\n",
701 proto); 695 proto);
702 } 696 }
703 proto_unregister(cp->prot);
704 proto_tab[proto] = NULL; 697 proto_tab[proto] = NULL;
705 spin_unlock(&proto_tab_lock); 698 spin_unlock(&proto_tab_lock);
699
700 proto_unregister(cp->prot);
706} 701}
707EXPORT_SYMBOL(can_proto_unregister); 702EXPORT_SYMBOL(can_proto_unregister);
708 703
diff --git a/net/can/raw.c b/net/can/raw.c
index aeefd1419d00..94cd7f27c444 100644
--- a/net/can/raw.c
+++ b/net/can/raw.c
@@ -98,7 +98,6 @@ static void raw_rcv(struct sk_buff *skb, void *data)
98 struct sock *sk = (struct sock *)data; 98 struct sock *sk = (struct sock *)data;
99 struct raw_sock *ro = raw_sk(sk); 99 struct raw_sock *ro = raw_sk(sk);
100 struct sockaddr_can *addr; 100 struct sockaddr_can *addr;
101 int error;
102 101
103 if (!ro->recv_own_msgs) { 102 if (!ro->recv_own_msgs) {
104 /* check the received tx sock reference */ 103 /* check the received tx sock reference */
@@ -121,14 +120,12 @@ static void raw_rcv(struct sk_buff *skb, void *data)
121 addr->can_family = AF_CAN; 120 addr->can_family = AF_CAN;
122 addr->can_ifindex = skb->dev->ifindex; 121 addr->can_ifindex = skb->dev->ifindex;
123 122
124 error = sock_queue_rcv_skb(sk, skb); 123 if (sock_queue_rcv_skb(sk, skb) < 0)
125 if (error < 0)
126 kfree_skb(skb); 124 kfree_skb(skb);
127} 125}
128 126
129static int raw_enable_filters(struct net_device *dev, struct sock *sk, 127static int raw_enable_filters(struct net_device *dev, struct sock *sk,
130 struct can_filter *filter, 128 struct can_filter *filter, int count)
131 int count)
132{ 129{
133 int err = 0; 130 int err = 0;
134 int i; 131 int i;
@@ -163,8 +160,7 @@ static int raw_enable_errfilter(struct net_device *dev, struct sock *sk,
163} 160}
164 161
165static void raw_disable_filters(struct net_device *dev, struct sock *sk, 162static void raw_disable_filters(struct net_device *dev, struct sock *sk,
166 struct can_filter *filter, 163 struct can_filter *filter, int count)
167 int count)
168{ 164{
169 int i; 165 int i;
170 166
@@ -353,7 +349,6 @@ static int raw_bind(struct socket *sock, struct sockaddr *uaddr, int len)
353 /* filters set by default/setsockopt */ 349 /* filters set by default/setsockopt */
354 err = raw_enable_allfilters(dev, sk); 350 err = raw_enable_allfilters(dev, sk);
355 dev_put(dev); 351 dev_put(dev);
356
357 } else { 352 } else {
358 ifindex = 0; 353 ifindex = 0;
359 354
@@ -466,7 +461,6 @@ static int raw_setsockopt(struct socket *sock, int level, int optname,
466 if (err) { 461 if (err) {
467 if (count > 1) 462 if (count > 1)
468 kfree(filter); 463 kfree(filter);
469
470 goto out_fil; 464 goto out_fil;
471 } 465 }
472 466
@@ -673,25 +667,25 @@ static int raw_recvmsg(struct kiocb *iocb, struct socket *sock,
673{ 667{
674 struct sock *sk = sock->sk; 668 struct sock *sk = sock->sk;
675 struct sk_buff *skb; 669 struct sk_buff *skb;
676 int error = 0; 670 int err = 0;
677 int noblock; 671 int noblock;
678 672
679 noblock = flags & MSG_DONTWAIT; 673 noblock = flags & MSG_DONTWAIT;
680 flags &= ~MSG_DONTWAIT; 674 flags &= ~MSG_DONTWAIT;
681 675
682 skb = skb_recv_datagram(sk, flags, noblock, &error); 676 skb = skb_recv_datagram(sk, flags, noblock, &err);
683 if (!skb) 677 if (!skb)
684 return error; 678 return err;
685 679
686 if (size < skb->len) 680 if (size < skb->len)
687 msg->msg_flags |= MSG_TRUNC; 681 msg->msg_flags |= MSG_TRUNC;
688 else 682 else
689 size = skb->len; 683 size = skb->len;
690 684
691 error = memcpy_toiovec(msg->msg_iov, skb->data, size); 685 err = memcpy_toiovec(msg->msg_iov, skb->data, size);
692 if (error < 0) { 686 if (err < 0) {
693 skb_free_datagram(sk, skb); 687 skb_free_datagram(sk, skb);
694 return error; 688 return err;
695 } 689 }
696 690
697 sock_recv_timestamp(msg, sk, skb); 691 sock_recv_timestamp(msg, sk, skb);
diff --git a/net/core/flow.c b/net/core/flow.c
index 46b38e06e0d7..a77531c139b7 100644
--- a/net/core/flow.c
+++ b/net/core/flow.c
@@ -30,8 +30,8 @@ struct flow_cache_entry {
30 struct flow_cache_entry *next; 30 struct flow_cache_entry *next;
31 u16 family; 31 u16 family;
32 u8 dir; 32 u8 dir;
33 struct flowi key;
34 u32 genid; 33 u32 genid;
34 struct flowi key;
35 void *object; 35 void *object;
36 atomic_t *object_ref; 36 atomic_t *object_ref;
37}; 37};
@@ -52,7 +52,7 @@ struct flow_percpu_info {
52 int hash_rnd_recalc; 52 int hash_rnd_recalc;
53 u32 hash_rnd; 53 u32 hash_rnd;
54 int count; 54 int count;
55} ____cacheline_aligned; 55};
56static DEFINE_PER_CPU(struct flow_percpu_info, flow_hash_info) = { 0 }; 56static DEFINE_PER_CPU(struct flow_percpu_info, flow_hash_info) = { 0 };
57 57
58#define flow_hash_rnd_recalc(cpu) \ 58#define flow_hash_rnd_recalc(cpu) \
@@ -346,7 +346,7 @@ static int __init flow_cache_init(void)
346 346
347 flow_cachep = kmem_cache_create("flow_cache", 347 flow_cachep = kmem_cache_create("flow_cache",
348 sizeof(struct flow_cache_entry), 348 sizeof(struct flow_cache_entry),
349 0, SLAB_HWCACHE_ALIGN|SLAB_PANIC, 349 0, SLAB_PANIC,
350 NULL); 350 NULL);
351 flow_hash_shift = 10; 351 flow_hash_shift = 10;
352 flow_lwm = 2 * flow_hash_size; 352 flow_lwm = 2 * flow_hash_size;
diff --git a/net/decnet/dn_route.c b/net/decnet/dn_route.c
index 31be29b8b5a3..9dc0abb50eaf 100644
--- a/net/decnet/dn_route.c
+++ b/net/decnet/dn_route.c
@@ -94,7 +94,7 @@ struct dn_rt_hash_bucket
94{ 94{
95 struct dn_route *chain; 95 struct dn_route *chain;
96 spinlock_t lock; 96 spinlock_t lock;
97} __attribute__((__aligned__(8))); 97};
98 98
99extern struct neigh_table dn_neigh_table; 99extern struct neigh_table dn_neigh_table;
100 100
diff --git a/net/ipv4/netfilter/nf_nat_core.c b/net/ipv4/netfilter/nf_nat_core.c
index dd07362d2b8f..0d5fa3a54d04 100644
--- a/net/ipv4/netfilter/nf_nat_core.c
+++ b/net/ipv4/netfilter/nf_nat_core.c
@@ -600,10 +600,10 @@ static void nf_nat_cleanup_conntrack(struct nf_conn *ct)
600 spin_unlock_bh(&nf_nat_lock); 600 spin_unlock_bh(&nf_nat_lock);
601} 601}
602 602
603static void nf_nat_move_storage(struct nf_conn *conntrack, void *old) 603static void nf_nat_move_storage(void *new, void *old)
604{ 604{
605 struct nf_conn_nat *new_nat = nf_ct_ext_find(conntrack, NF_CT_EXT_NAT); 605 struct nf_conn_nat *new_nat = new;
606 struct nf_conn_nat *old_nat = (struct nf_conn_nat *)old; 606 struct nf_conn_nat *old_nat = old;
607 struct nf_conn *ct = old_nat->ct; 607 struct nf_conn *ct = old_nat->ct;
608 608
609 if (!ct || !(ct->status & IPS_NAT_DONE_MASK)) 609 if (!ct || !(ct->status & IPS_NAT_DONE_MASK))
diff --git a/net/ipv4/route.c b/net/ipv4/route.c
index 8842ecb9be48..525787b52b72 100644
--- a/net/ipv4/route.c
+++ b/net/ipv4/route.c
@@ -2041,7 +2041,7 @@ int ip_route_input(struct sk_buff *skb, __be32 daddr, __be32 saddr,
2041 int iif = dev->ifindex; 2041 int iif = dev->ifindex;
2042 struct net *net; 2042 struct net *net;
2043 2043
2044 net = skb->dev->nd_net; 2044 net = dev->nd_net;
2045 tos &= IPTOS_RT_MASK; 2045 tos &= IPTOS_RT_MASK;
2046 hash = rt_hash(daddr, saddr, iif); 2046 hash = rt_hash(daddr, saddr, iif);
2047 2047
diff --git a/net/iucv/af_iucv.c b/net/iucv/af_iucv.c
index 2255e3c082ed..fee22caf1bad 100644
--- a/net/iucv/af_iucv.c
+++ b/net/iucv/af_iucv.c
@@ -482,6 +482,10 @@ static int iucv_sock_connect(struct socket *sock, struct sockaddr *addr,
482 /* Create path. */ 482 /* Create path. */
483 iucv->path = iucv_path_alloc(IUCV_QUEUELEN_DEFAULT, 483 iucv->path = iucv_path_alloc(IUCV_QUEUELEN_DEFAULT,
484 IPRMDATA, GFP_KERNEL); 484 IPRMDATA, GFP_KERNEL);
485 if (!iucv->path) {
486 err = -ENOMEM;
487 goto done;
488 }
485 err = iucv_path_connect(iucv->path, &af_iucv_handler, 489 err = iucv_path_connect(iucv->path, &af_iucv_handler,
486 sa->siucv_user_id, NULL, user_data, sk); 490 sa->siucv_user_id, NULL, user_data, sk);
487 if (err) { 491 if (err) {
@@ -1094,6 +1098,8 @@ static void iucv_callback_rx(struct iucv_path *path, struct iucv_message *msg)
1094 1098
1095save_message: 1099save_message:
1096 save_msg = kzalloc(sizeof(struct sock_msg_q), GFP_ATOMIC | GFP_DMA); 1100 save_msg = kzalloc(sizeof(struct sock_msg_q), GFP_ATOMIC | GFP_DMA);
1101 if (!save_msg)
1102 return;
1097 save_msg->path = path; 1103 save_msg->path = path;
1098 save_msg->msg = *msg; 1104 save_msg->msg = *msg;
1099 1105
@@ -1106,24 +1112,31 @@ static void iucv_callback_txdone(struct iucv_path *path,
1106 struct iucv_message *msg) 1112 struct iucv_message *msg)
1107{ 1113{
1108 struct sock *sk = path->private; 1114 struct sock *sk = path->private;
1109 struct sk_buff *this; 1115 struct sk_buff *this = NULL;
1110 struct sk_buff_head *list = &iucv_sk(sk)->send_skb_q; 1116 struct sk_buff_head *list = &iucv_sk(sk)->send_skb_q;
1111 struct sk_buff *list_skb = list->next; 1117 struct sk_buff *list_skb = list->next;
1112 unsigned long flags; 1118 unsigned long flags;
1113 1119
1114 if (list_skb) { 1120 if (!skb_queue_empty(list)) {
1115 spin_lock_irqsave(&list->lock, flags); 1121 spin_lock_irqsave(&list->lock, flags);
1116 1122
1117 do { 1123 while (list_skb != (struct sk_buff *)list) {
1118 this = list_skb; 1124 if (!memcmp(&msg->tag, list_skb->cb, 4)) {
1125 this = list_skb;
1126 break;
1127 }
1119 list_skb = list_skb->next; 1128 list_skb = list_skb->next;
1120 } while (memcmp(&msg->tag, this->cb, 4) && list_skb); 1129 }
1130 if (this)
1131 __skb_unlink(this, list);
1121 1132
1122 spin_unlock_irqrestore(&list->lock, flags); 1133 spin_unlock_irqrestore(&list->lock, flags);
1123 1134
1124 skb_unlink(this, &iucv_sk(sk)->send_skb_q); 1135 if (this)
1125 kfree_skb(this); 1136 kfree_skb(this);
1126 } 1137 }
1138 if (!this)
1139 printk(KERN_ERR "AF_IUCV msg tag %u not found\n", msg->tag);
1127 1140
1128 if (sk->sk_state == IUCV_CLOSING) { 1141 if (sk->sk_state == IUCV_CLOSING) {
1129 if (skb_queue_empty(&iucv_sk(sk)->send_skb_q)) { 1142 if (skb_queue_empty(&iucv_sk(sk)->send_skb_q)) {
diff --git a/net/iucv/iucv.c b/net/iucv/iucv.c
index f13fe8821cbd..2753b0c448f3 100644
--- a/net/iucv/iucv.c
+++ b/net/iucv/iucv.c
@@ -693,9 +693,9 @@ int iucv_register(struct iucv_handler *handler, int smp)
693 iucv_setmask_up(); 693 iucv_setmask_up();
694 INIT_LIST_HEAD(&handler->paths); 694 INIT_LIST_HEAD(&handler->paths);
695 695
696 spin_lock_irq(&iucv_table_lock); 696 spin_lock_bh(&iucv_table_lock);
697 list_add_tail(&handler->list, &iucv_handler_list); 697 list_add_tail(&handler->list, &iucv_handler_list);
698 spin_unlock_irq(&iucv_table_lock); 698 spin_unlock_bh(&iucv_table_lock);
699 rc = 0; 699 rc = 0;
700out_mutex: 700out_mutex:
701 mutex_unlock(&iucv_register_mutex); 701 mutex_unlock(&iucv_register_mutex);
diff --git a/net/netfilter/nf_conntrack_extend.c b/net/netfilter/nf_conntrack_extend.c
index cf6ba6659a80..8b9be1e978cd 100644
--- a/net/netfilter/nf_conntrack_extend.c
+++ b/net/netfilter/nf_conntrack_extend.c
@@ -109,7 +109,8 @@ void *__nf_ct_ext_add(struct nf_conn *ct, enum nf_ct_ext_id id, gfp_t gfp)
109 rcu_read_lock(); 109 rcu_read_lock();
110 t = rcu_dereference(nf_ct_ext_types[i]); 110 t = rcu_dereference(nf_ct_ext_types[i]);
111 if (t && t->move) 111 if (t && t->move)
112 t->move(ct, ct->ext + ct->ext->offset[i]); 112 t->move((void *)new + new->offset[i],
113 (void *)ct->ext + ct->ext->offset[i]);
113 rcu_read_unlock(); 114 rcu_read_unlock();
114 } 115 }
115 kfree(ct->ext); 116 kfree(ct->ext);
diff --git a/net/netfilter/nf_conntrack_proto_tcp.c b/net/netfilter/nf_conntrack_proto_tcp.c
index 3e0cccae5636..202d7fa09483 100644
--- a/net/netfilter/nf_conntrack_proto_tcp.c
+++ b/net/netfilter/nf_conntrack_proto_tcp.c
@@ -125,7 +125,7 @@ enum tcp_bit_set {
125 * CLOSE_WAIT: ACK seen (after FIN) 125 * CLOSE_WAIT: ACK seen (after FIN)
126 * LAST_ACK: FIN seen (after FIN) 126 * LAST_ACK: FIN seen (after FIN)
127 * TIME_WAIT: last ACK seen 127 * TIME_WAIT: last ACK seen
128 * CLOSE: closed connection 128 * CLOSE: closed connection (RST)
129 * 129 *
130 * LISTEN state is not used. 130 * LISTEN state is not used.
131 * 131 *
@@ -824,7 +824,21 @@ static int tcp_packet(struct nf_conn *ct,
824 case TCP_CONNTRACK_SYN_SENT: 824 case TCP_CONNTRACK_SYN_SENT:
825 if (old_state < TCP_CONNTRACK_TIME_WAIT) 825 if (old_state < TCP_CONNTRACK_TIME_WAIT)
826 break; 826 break;
827 if ((ct->proto.tcp.seen[!dir].flags & IP_CT_TCP_FLAG_CLOSE_INIT) 827 /* RFC 1122: "When a connection is closed actively,
828 * it MUST linger in TIME-WAIT state for a time 2xMSL
829 * (Maximum Segment Lifetime). However, it MAY accept
830 * a new SYN from the remote TCP to reopen the connection
831 * directly from TIME-WAIT state, if..."
832 * We ignore the conditions because we are in the
833 * TIME-WAIT state anyway.
834 *
835 * Handle aborted connections: we and the server
836 * think there is an existing connection but the client
837 * aborts it and starts a new one.
838 */
839 if (((ct->proto.tcp.seen[dir].flags
840 | ct->proto.tcp.seen[!dir].flags)
841 & IP_CT_TCP_FLAG_CLOSE_INIT)
828 || (ct->proto.tcp.last_dir == dir 842 || (ct->proto.tcp.last_dir == dir
829 && ct->proto.tcp.last_index == TCP_RST_SET)) { 843 && ct->proto.tcp.last_index == TCP_RST_SET)) {
830 /* Attempt to reopen a closed/aborted connection. 844 /* Attempt to reopen a closed/aborted connection.
@@ -838,15 +852,22 @@ static int tcp_packet(struct nf_conn *ct,
838 case TCP_CONNTRACK_IGNORE: 852 case TCP_CONNTRACK_IGNORE:
839 /* Ignored packets: 853 /* Ignored packets:
840 * 854 *
855 * Our connection entry may be out of sync, so ignore
856 * packets which may signal the real connection between
857 * the client and the server.
858 *
841 * a) SYN in ORIGINAL 859 * a) SYN in ORIGINAL
842 * b) SYN/ACK in REPLY 860 * b) SYN/ACK in REPLY
843 * c) ACK in reply direction after initial SYN in original. 861 * c) ACK in reply direction after initial SYN in original.
862 *
863 * If the ignored packet is invalid, the receiver will send
864 * a RST we'll catch below.
844 */ 865 */
845 if (index == TCP_SYNACK_SET 866 if (index == TCP_SYNACK_SET
846 && ct->proto.tcp.last_index == TCP_SYN_SET 867 && ct->proto.tcp.last_index == TCP_SYN_SET
847 && ct->proto.tcp.last_dir != dir 868 && ct->proto.tcp.last_dir != dir
848 && ntohl(th->ack_seq) == ct->proto.tcp.last_end) { 869 && ntohl(th->ack_seq) == ct->proto.tcp.last_end) {
849 /* This SYN/ACK acknowledges a SYN that we earlier 870 /* b) This SYN/ACK acknowledges a SYN that we earlier
850 * ignored as invalid. This means that the client and 871 * ignored as invalid. This means that the client and
851 * the server are both in sync, while the firewall is 872 * the server are both in sync, while the firewall is
852 * not. We kill this session and block the SYN/ACK so 873 * not. We kill this session and block the SYN/ACK so
@@ -870,7 +891,7 @@ static int tcp_packet(struct nf_conn *ct,
870 write_unlock_bh(&tcp_lock); 891 write_unlock_bh(&tcp_lock);
871 if (LOG_INVALID(IPPROTO_TCP)) 892 if (LOG_INVALID(IPPROTO_TCP))
872 nf_log_packet(pf, 0, skb, NULL, NULL, NULL, 893 nf_log_packet(pf, 0, skb, NULL, NULL, NULL,
873 "nf_ct_tcp: invalid packed ignored "); 894 "nf_ct_tcp: invalid packet ignored ");
874 return NF_ACCEPT; 895 return NF_ACCEPT;
875 case TCP_CONNTRACK_MAX: 896 case TCP_CONNTRACK_MAX:
876 /* Invalid packet */ 897 /* Invalid packet */
@@ -924,8 +945,7 @@ static int tcp_packet(struct nf_conn *ct,
924 945
925 ct->proto.tcp.state = new_state; 946 ct->proto.tcp.state = new_state;
926 if (old_state != new_state 947 if (old_state != new_state
927 && (new_state == TCP_CONNTRACK_FIN_WAIT 948 && new_state == TCP_CONNTRACK_CLOSE)
928 || new_state == TCP_CONNTRACK_CLOSE))
929 ct->proto.tcp.seen[dir].flags |= IP_CT_TCP_FLAG_CLOSE_INIT; 949 ct->proto.tcp.seen[dir].flags |= IP_CT_TCP_FLAG_CLOSE_INIT;
930 timeout = ct->proto.tcp.retrans >= nf_ct_tcp_max_retrans 950 timeout = ct->proto.tcp.retrans >= nf_ct_tcp_max_retrans
931 && tcp_timeouts[new_state] > nf_ct_tcp_timeout_max_retrans 951 && tcp_timeouts[new_state] > nf_ct_tcp_timeout_max_retrans
diff --git a/net/netfilter/xt_iprange.c b/net/netfilter/xt_iprange.c
index 01035fc0e140..4f984dc60319 100644
--- a/net/netfilter/xt_iprange.c
+++ b/net/netfilter/xt_iprange.c
@@ -13,6 +13,7 @@
13#include <linux/ip.h> 13#include <linux/ip.h>
14#include <linux/ipv6.h> 14#include <linux/ipv6.h>
15#include <linux/netfilter/x_tables.h> 15#include <linux/netfilter/x_tables.h>
16#include <linux/netfilter/xt_iprange.h>
16#include <linux/netfilter_ipv4/ipt_iprange.h> 17#include <linux/netfilter_ipv4/ipt_iprange.h>
17 18
18static bool 19static bool
@@ -148,7 +149,7 @@ static struct xt_match iprange_mt_reg[] __read_mostly = {
148 { 149 {
149 .name = "iprange", 150 .name = "iprange",
150 .revision = 1, 151 .revision = 1,
151 .family = AF_INET6, 152 .family = AF_INET,
152 .match = iprange_mt4, 153 .match = iprange_mt4,
153 .matchsize = sizeof(struct xt_iprange_mtinfo), 154 .matchsize = sizeof(struct xt_iprange_mtinfo),
154 .me = THIS_MODULE, 155 .me = THIS_MODULE,
diff --git a/net/sched/em_meta.c b/net/sched/em_meta.c
index 2a7e648fbcf4..d417ec8e3ca3 100644
--- a/net/sched/em_meta.c
+++ b/net/sched/em_meta.c
@@ -735,11 +735,13 @@ static int em_meta_match(struct sk_buff *skb, struct tcf_ematch *m,
735 735
736static inline void meta_delete(struct meta_match *meta) 736static inline void meta_delete(struct meta_match *meta)
737{ 737{
738 struct meta_type_ops *ops = meta_type_ops(&meta->lvalue); 738 if (meta) {
739 struct meta_type_ops *ops = meta_type_ops(&meta->lvalue);
739 740
740 if (ops && ops->destroy) { 741 if (ops && ops->destroy) {
741 ops->destroy(&meta->lvalue); 742 ops->destroy(&meta->lvalue);
742 ops->destroy(&meta->rvalue); 743 ops->destroy(&meta->rvalue);
744 }
743 } 745 }
744 746
745 kfree(meta); 747 kfree(meta);
diff --git a/net/tipc/addr.h b/net/tipc/addr.h
index e4bd5335e48d..3ba67e6ce03e 100644
--- a/net/tipc/addr.h
+++ b/net/tipc/addr.h
@@ -57,11 +57,6 @@ static inline int in_own_cluster(u32 addr)
57 return !((addr ^ tipc_own_addr) >> 12); 57 return !((addr ^ tipc_own_addr) >> 12);
58} 58}
59 59
60static inline int in_own_zone(u32 addr)
61{
62 return !((addr ^ tipc_own_addr) >> 24);
63}
64
65static inline int is_slave(u32 addr) 60static inline int is_slave(u32 addr)
66{ 61{
67 return addr & 0x800; 62 return addr & 0x800;
diff --git a/net/tipc/bcast.h b/net/tipc/bcast.h
index f910ed29d055..a2416fa6b906 100644
--- a/net/tipc/bcast.h
+++ b/net/tipc/bcast.h
@@ -74,19 +74,6 @@ extern char tipc_bclink_name[];
74 74
75 75
76/** 76/**
77 * nmap_get - determine if node exists in a node map
78 */
79
80static inline int tipc_nmap_get(struct node_map *nm_ptr, u32 node)
81{
82 int n = tipc_node(node);
83 int w = n / WSIZE;
84 int b = n % WSIZE;
85
86 return nm_ptr->map[w] & (1 << b);
87}
88
89/**
90 * nmap_add - add a node to a node map 77 * nmap_add - add a node to a node map
91 */ 78 */
92 79
diff --git a/net/tipc/msg.h b/net/tipc/msg.h
index ce2659836374..e9ef6df26562 100644
--- a/net/tipc/msg.h
+++ b/net/tipc/msg.h
@@ -663,11 +663,6 @@ static inline void msg_set_remote_node(struct tipc_msg *m, u32 a)
663 msg_set_word(m, msg_hdr_sz(m)/4, a); 663 msg_set_word(m, msg_hdr_sz(m)/4, a);
664} 664}
665 665
666static inline int msg_dataoctet(struct tipc_msg *m, u32 pos)
667{
668 return(msg_data(m)[pos + 4] != 0);
669}
670
671static inline void msg_set_dataoctet(struct tipc_msg *m, u32 pos) 666static inline void msg_set_dataoctet(struct tipc_msg *m, u32 pos)
672{ 667{
673 msg_data(m)[pos + 4] = 1; 668 msg_data(m)[pos + 4] = 1;
diff --git a/net/tipc/socket.c b/net/tipc/socket.c
index 24ddfd2ca38b..22909036b9bc 100644
--- a/net/tipc/socket.c
+++ b/net/tipc/socket.c
@@ -71,9 +71,9 @@ struct tipc_sock {
71static u32 dispatch(struct tipc_port *tport, struct sk_buff *buf); 71static u32 dispatch(struct tipc_port *tport, struct sk_buff *buf);
72static void wakeupdispatch(struct tipc_port *tport); 72static void wakeupdispatch(struct tipc_port *tport);
73 73
74static struct proto_ops packet_ops; 74static const struct proto_ops packet_ops;
75static struct proto_ops stream_ops; 75static const struct proto_ops stream_ops;
76static struct proto_ops msg_ops; 76static const struct proto_ops msg_ops;
77 77
78static struct proto tipc_proto; 78static struct proto tipc_proto;
79 79
@@ -1615,7 +1615,7 @@ static int getsockopt(struct socket *sock,
1615 * Protocol switches for the various types of TIPC sockets 1615 * Protocol switches for the various types of TIPC sockets
1616 */ 1616 */
1617 1617
1618static struct proto_ops msg_ops = { 1618static const struct proto_ops msg_ops = {
1619 .owner = THIS_MODULE, 1619 .owner = THIS_MODULE,
1620 .family = AF_TIPC, 1620 .family = AF_TIPC,
1621 .release = release, 1621 .release = release,
@@ -1636,7 +1636,7 @@ static struct proto_ops msg_ops = {
1636 .sendpage = sock_no_sendpage 1636 .sendpage = sock_no_sendpage
1637}; 1637};
1638 1638
1639static struct proto_ops packet_ops = { 1639static const struct proto_ops packet_ops = {
1640 .owner = THIS_MODULE, 1640 .owner = THIS_MODULE,
1641 .family = AF_TIPC, 1641 .family = AF_TIPC,
1642 .release = release, 1642 .release = release,
@@ -1657,7 +1657,7 @@ static struct proto_ops packet_ops = {
1657 .sendpage = sock_no_sendpage 1657 .sendpage = sock_no_sendpage
1658}; 1658};
1659 1659
1660static struct proto_ops stream_ops = { 1660static const struct proto_ops stream_ops = {
1661 .owner = THIS_MODULE, 1661 .owner = THIS_MODULE,
1662 .family = AF_TIPC, 1662 .family = AF_TIPC,
1663 .release = release, 1663 .release = release,
@@ -1678,7 +1678,7 @@ static struct proto_ops stream_ops = {
1678 .sendpage = sock_no_sendpage 1678 .sendpage = sock_no_sendpage
1679}; 1679};
1680 1680
1681static struct net_proto_family tipc_family_ops = { 1681static const struct net_proto_family tipc_family_ops = {
1682 .owner = THIS_MODULE, 1682 .owner = THIS_MODULE,
1683 .family = AF_TIPC, 1683 .family = AF_TIPC,
1684 .create = tipc_create 1684 .create = tipc_create
diff --git a/net/xfrm/xfrm_algo.c b/net/xfrm/xfrm_algo.c
index 6cc15250de69..8aa6440d689f 100644
--- a/net/xfrm/xfrm_algo.c
+++ b/net/xfrm/xfrm_algo.c
@@ -399,6 +399,23 @@ static struct xfrm_algo_desc ealg_list[] = {
399 .sadb_alg_maxbits = 256 399 .sadb_alg_maxbits = 256
400 } 400 }
401}, 401},
402{
403 .name = "rfc3686(ctr(aes))",
404
405 .uinfo = {
406 .encr = {
407 .blockbits = 128,
408 .defkeybits = 160, /* 128-bit key + 32-bit nonce */
409 }
410 },
411
412 .desc = {
413 .sadb_alg_id = SADB_X_EALG_AESCTR,
414 .sadb_alg_ivlen = 8,
415 .sadb_alg_minbits = 128,
416 .sadb_alg_maxbits = 256
417 }
418},
402}; 419};
403 420
404static struct xfrm_algo_desc calg_list[] = { 421static struct xfrm_algo_desc calg_list[] = {
diff --git a/scripts/checkpatch.pl b/scripts/checkpatch.pl
index 579f50fa838c..2086a856400a 100755
--- a/scripts/checkpatch.pl
+++ b/scripts/checkpatch.pl
@@ -9,7 +9,7 @@ use strict;
9my $P = $0; 9my $P = $0;
10$P =~ s@.*/@@g; 10$P =~ s@.*/@@g;
11 11
12my $V = '0.12'; 12my $V = '0.14';
13 13
14use Getopt::Long qw(:config no_auto_abbrev); 14use Getopt::Long qw(:config no_auto_abbrev);
15 15
@@ -24,13 +24,14 @@ my $file = 0;
24my $check = 0; 24my $check = 0;
25my $summary = 1; 25my $summary = 1;
26my $mailback = 0; 26my $mailback = 0;
27my $summary_file = 0;
27my $root; 28my $root;
29my %debug;
28GetOptions( 30GetOptions(
29 'q|quiet+' => \$quiet, 31 'q|quiet+' => \$quiet,
30 'tree!' => \$tree, 32 'tree!' => \$tree,
31 'signoff!' => \$chk_signoff, 33 'signoff!' => \$chk_signoff,
32 'patch!' => \$chk_patch, 34 'patch!' => \$chk_patch,
33 'test-type!' => \$tst_type,
34 'emacs!' => \$emacs, 35 'emacs!' => \$emacs,
35 'terse!' => \$terse, 36 'terse!' => \$terse,
36 'file!' => \$file, 37 'file!' => \$file,
@@ -39,6 +40,10 @@ GetOptions(
39 'root=s' => \$root, 40 'root=s' => \$root,
40 'summary!' => \$summary, 41 'summary!' => \$summary,
41 'mailback!' => \$mailback, 42 'mailback!' => \$mailback,
43 'summary-file!' => \$summary_file,
44
45 'debug=s' => \%debug,
46 'test-type!' => \$tst_type,
42) or exit; 47) or exit;
43 48
44my $exit = 0; 49my $exit = 0;
@@ -46,16 +51,24 @@ my $exit = 0;
46if ($#ARGV < 0) { 51if ($#ARGV < 0) {
47 print "usage: $P [options] patchfile\n"; 52 print "usage: $P [options] patchfile\n";
48 print "version: $V\n"; 53 print "version: $V\n";
49 print "options: -q => quiet\n"; 54 print "options: -q => quiet\n";
50 print " --no-tree => run without a kernel tree\n"; 55 print " --no-tree => run without a kernel tree\n";
51 print " --terse => one line per report\n"; 56 print " --terse => one line per report\n";
52 print " --emacs => emacs compile window format\n"; 57 print " --emacs => emacs compile window format\n";
53 print " --file => check a source file\n"; 58 print " --file => check a source file\n";
54 print " --strict => enable more subjective tests\n"; 59 print " --strict => enable more subjective tests\n";
55 print " --root => path to the kernel tree root\n"; 60 print " --root => path to the kernel tree root\n";
61 print " --no-summary => suppress the per-file summary\n";
62 print " --summary-file => include the filename in summary\n";
56 exit(1); 63 exit(1);
57} 64}
58 65
66my $dbg_values = 0;
67my $dbg_possible = 0;
68for my $key (keys %debug) {
69 eval "\${dbg_$key} = '$debug{$key}';"
70}
71
59if ($terse) { 72if ($terse) {
60 $emacs = 1; 73 $emacs = 1;
61 $quiet++; 74 $quiet++;
@@ -110,7 +123,7 @@ our $Assignment = qr{(?:\*\=|/=|%=|\+=|-=|<<=|>>=|&=|\^=|\|=|=)};
110our $Operators = qr{ 123our $Operators = qr{
111 <=|>=|==|!=| 124 <=|>=|==|!=|
112 =>|->|<<|>>|<|>|!|~| 125 =>|->|<<|>>|<|>|!|~|
113 &&|\|\||,|\^|\+\+|--|&|\||\+|-|\*|\/ 126 &&|\|\||,|\^|\+\+|--|&|\||\+|-|\*|\/|%
114 }x; 127 }x;
115 128
116our $NonptrType; 129our $NonptrType;
@@ -152,7 +165,7 @@ sub build_types {
152 $Type = qr{ 165 $Type = qr{
153 \b$NonptrType\b 166 \b$NonptrType\b
154 (?:\s*\*+\s*const|\s*\*+|(?:\s*\[\s*\])+)? 167 (?:\s*\*+\s*const|\s*\*+|(?:\s*\[\s*\])+)?
155 (?:\s+$Sparse|\s+$Attribute)* 168 (?:\s+$Inline|\s+$Sparse|\s+$Attribute)*
156 }x; 169 }x;
157 $Declare = qr{(?:$Storage\s+)?$Type}; 170 $Declare = qr{(?:$Storage\s+)?$Type};
158} 171}
@@ -181,6 +194,8 @@ if ($tree && -f "$root/$removal") {
181} 194}
182 195
183my @rawlines = (); 196my @rawlines = ();
197my @lines = ();
198my $vname;
184for my $filename (@ARGV) { 199for my $filename (@ARGV) {
185 if ($file) { 200 if ($file) {
186 open(FILE, "diff -u /dev/null $filename|") || 201 open(FILE, "diff -u /dev/null $filename|") ||
@@ -189,15 +204,21 @@ for my $filename (@ARGV) {
189 open(FILE, "<$filename") || 204 open(FILE, "<$filename") ||
190 die "$P: $filename: open failed - $!\n"; 205 die "$P: $filename: open failed - $!\n";
191 } 206 }
207 if ($filename eq '-') {
208 $vname = 'Your patch';
209 } else {
210 $vname = $filename;
211 }
192 while (<FILE>) { 212 while (<FILE>) {
193 chomp; 213 chomp;
194 push(@rawlines, $_); 214 push(@rawlines, $_);
195 } 215 }
196 close(FILE); 216 close(FILE);
197 if (!process($filename, @rawlines)) { 217 if (!process($filename)) {
198 $exit = 1; 218 $exit = 1;
199 } 219 }
200 @rawlines = (); 220 @rawlines = ();
221 @lines = ();
201} 222}
202 223
203exit($exit); 224exit($exit);
@@ -274,20 +295,30 @@ sub sanitise_line {
274 my $l = ''; 295 my $l = '';
275 296
276 my $quote = ''; 297 my $quote = '';
298 my $qlen = 0;
277 299
278 foreach my $c (split(//, $line)) { 300 foreach my $c (split(//, $line)) {
301 # The second backslash of a pair is not a "quote".
302 if ($l eq "\\" && $c eq "\\") {
303 $c = 'X';
304 }
279 if ($l ne "\\" && ($c eq "'" || $c eq '"')) { 305 if ($l ne "\\" && ($c eq "'" || $c eq '"')) {
280 if ($quote eq '') { 306 if ($quote eq '') {
281 $quote = $c; 307 $quote = $c;
282 $res .= $c; 308 $res .= $c;
283 $l = $c; 309 $l = $c;
310 $qlen = 0;
284 next; 311 next;
285 } elsif ($quote eq $c) { 312 } elsif ($quote eq $c) {
286 $quote = ''; 313 $quote = '';
287 } 314 }
288 } 315 }
316 if ($quote eq "'" && $qlen > 1) {
317 $quote = '';
318 }
289 if ($quote && $c ne "\t") { 319 if ($quote && $c ne "\t") {
290 $res .= "X"; 320 $res .= "X";
321 $qlen++;
291 } else { 322 } else {
292 $res .= $c; 323 $res .= $c;
293 } 324 }
@@ -295,6 +326,28 @@ sub sanitise_line {
295 $l = $c; 326 $l = $c;
296 } 327 }
297 328
329 # Clear out the comments.
330 while ($res =~ m@(/\*.*?\*/)@g) {
331 substr($res, $-[1], $+[1] - $-[1]) = $; x ($+[1] - $-[1]);
332 }
333 if ($res =~ m@(/\*.*)@) {
334 substr($res, $-[1], $+[1] - $-[1]) = $; x ($+[1] - $-[1]);
335 }
336 if ($res =~ m@^.(.*\*/)@) {
337 substr($res, $-[1], $+[1] - $-[1]) = $; x ($+[1] - $-[1]);
338 }
339
340 # The pathname on a #include may be surrounded by '<' and '>'.
341 if ($res =~ /^.#\s*include\s+\<(.*)\>/) {
342 my $clean = 'X' x length($1);
343 $res =~ s@\<.*\>@<$clean>@;
344
345 # The whole of a #error is a string.
346 } elsif ($res =~ /^.#\s*(?:error|warning)\s+(.*)\b/) {
347 my $clean = 'X' x length($1);
348 $res =~ s@(#\s*(?:error|warning)\s+).*@$1$clean@;
349 }
350
298 return $res; 351 return $res;
299} 352}
300 353
@@ -305,30 +358,36 @@ sub ctx_statement_block {
305 my $soff = $off; 358 my $soff = $off;
306 my $coff = $off - 1; 359 my $coff = $off - 1;
307 360
361 my $loff = 0;
362
308 my $type = ''; 363 my $type = '';
309 my $level = 0; 364 my $level = 0;
310 my $c; 365 my $c;
311 my $len = 0; 366 my $len = 0;
367
368 my $remainder;
312 while (1) { 369 while (1) {
313 #warn "CSB: blk<$blk>\n"; 370 #warn "CSB: blk<$blk>\n";
314 # If we are about to drop off the end, pull in more 371 # If we are about to drop off the end, pull in more
315 # context. 372 # context.
316 if ($off >= $len) { 373 if ($off >= $len) {
317 for (; $remain > 0; $line++) { 374 for (; $remain > 0; $line++) {
318 next if ($rawlines[$line] =~ /^-/); 375 next if ($lines[$line] =~ /^-/);
319 $remain--; 376 $remain--;
320 $blk .= sanitise_line($rawlines[$line]) . "\n"; 377 $loff = $len;
378 $blk .= $lines[$line] . "\n";
321 $len = length($blk); 379 $len = length($blk);
322 $line++; 380 $line++;
323 last; 381 last;
324 } 382 }
325 # Bail if there is no further context. 383 # Bail if there is no further context.
326 #warn "CSB: blk<$blk> off<$off> len<$len>\n"; 384 #warn "CSB: blk<$blk> off<$off> len<$len>\n";
327 if ($off == $len) { 385 if ($off >= $len) {
328 last; 386 last;
329 } 387 }
330 } 388 }
331 $c = substr($blk, $off, 1); 389 $c = substr($blk, $off, 1);
390 $remainder = substr($blk, $off);
332 391
333 #warn "CSB: c<$c> type<$type> level<$level>\n"; 392 #warn "CSB: c<$c> type<$type> level<$level>\n";
334 # Statement ends at the ';' or a close '}' at the 393 # Statement ends at the ';' or a close '}' at the
@@ -337,6 +396,12 @@ sub ctx_statement_block {
337 last; 396 last;
338 } 397 }
339 398
399 # An else is really a conditional as long as its not else if
400 if ($level == 0 && $remainder =~ /(\s+else)(?:\s|{)/ &&
401 $remainder !~ /\s+else\s+if\b/) {
402 $coff = $off + length($1);
403 }
404
340 if (($type eq '' || $type eq '(') && $c eq '(') { 405 if (($type eq '' || $type eq '(') && $c eq '(') {
341 $level++; 406 $level++;
342 $type = '('; 407 $type = '(';
@@ -363,6 +428,10 @@ sub ctx_statement_block {
363 } 428 }
364 $off++; 429 $off++;
365 } 430 }
431 if ($off == $len) {
432 $line++;
433 $remain--;
434 }
366 435
367 my $statement = substr($blk, $soff, $off - $soff + 1); 436 my $statement = substr($blk, $soff, $off - $soff + 1);
368 my $condition = substr($blk, $soff, $coff - $soff + 1); 437 my $condition = substr($blk, $soff, $coff - $soff + 1);
@@ -370,7 +439,30 @@ sub ctx_statement_block {
370 #warn "STATEMENT<$statement>\n"; 439 #warn "STATEMENT<$statement>\n";
371 #warn "CONDITION<$condition>\n"; 440 #warn "CONDITION<$condition>\n";
372 441
373 return ($statement, $condition); 442 #print "off<$off> loff<$loff>\n";
443
444 return ($statement, $condition,
445 $line, $remain + 1, $off - $loff + 1, $level);
446}
447
448sub ctx_statement_full {
449 my ($linenr, $remain, $off) = @_;
450 my ($statement, $condition, $level);
451
452 my (@chunks);
453
454 ($statement, $condition, $linenr, $remain, $off, $level) =
455 ctx_statement_block($linenr, $remain, $off);
456 #print "F: c<$condition> s<$statement>\n";
457 for (;;) {
458 push(@chunks, [ $condition, $statement ]);
459 last if (!($remain > 0 && $condition =~ /^.\s*(?:if|else|do)/));
460 ($statement, $condition, $linenr, $remain, $off, $level) =
461 ctx_statement_block($linenr, $remain, $off);
462 #print "C: c<$condition> s<$statement>\n";
463 }
464
465 return ($level, $linenr, @chunks);
374} 466}
375 467
376sub ctx_block_get { 468sub ctx_block_get {
@@ -500,103 +592,110 @@ sub cat_vet {
500 return $res; 592 return $res;
501} 593}
502 594
595my $av_preprocessor = 0;
596my $av_paren = 0;
597my @av_paren_type;
598
599sub annotate_reset {
600 $av_preprocessor = 0;
601 $av_paren = 0;
602 @av_paren_type = ();
603}
604
503sub annotate_values { 605sub annotate_values {
504 my ($stream, $type) = @_; 606 my ($stream, $type) = @_;
505 607
506 my $res; 608 my $res;
507 my $cur = $stream; 609 my $cur = $stream;
508 610
509 my $debug = 0; 611 print "$stream\n" if ($dbg_values > 1);
510
511 print "$stream\n" if ($debug);
512
513 ##my $type = 'N';
514 my $pos = 0;
515 my $preprocessor = 0;
516 my $paren = 0;
517 my @paren_type;
518 612
519 while (length($cur)) { 613 while (length($cur)) {
520 print " <$type> " if ($debug); 614 print " <$type> " if ($dbg_values > 1);
521 if ($cur =~ /^(\s+)/o) { 615 if ($cur =~ /^(\s+)/o) {
522 print "WS($1)\n" if ($debug); 616 print "WS($1)\n" if ($dbg_values > 1);
523 if ($1 =~ /\n/ && $preprocessor) { 617 if ($1 =~ /\n/ && $av_preprocessor) {
524 $preprocessor = 0; 618 $av_preprocessor = 0;
525 $type = 'N'; 619 $type = 'N';
526 } 620 }
527 621
528 } elsif ($cur =~ /^($Type)/) { 622 } elsif ($cur =~ /^($Type)/) {
529 print "DECLARE($1)\n" if ($debug); 623 print "DECLARE($1)\n" if ($dbg_values > 1);
530 $type = 'T'; 624 $type = 'T';
531 625
532 } elsif ($cur =~ /^(#\s*define\s*$Ident)(\(?)/o) { 626 } elsif ($cur =~ /^(#\s*define\s*$Ident)(\(?)/o) {
533 print "DEFINE($1)\n" if ($debug); 627 print "DEFINE($1)\n" if ($dbg_values > 1);
534 $preprocessor = 1; 628 $av_preprocessor = 1;
535 $paren_type[$paren] = 'N'; 629 $av_paren_type[$av_paren] = 'N';
536 630
537 } elsif ($cur =~ /^(#\s*(?:ifdef|ifndef|if|else|endif))/o) { 631 } elsif ($cur =~ /^(#\s*(?:ifdef|ifndef|if|else|elif|endif))/o) {
538 print "PRE($1)\n" if ($debug); 632 print "PRE($1)\n" if ($dbg_values > 1);
539 $preprocessor = 1; 633 $av_preprocessor = 1;
540 $type = 'N'; 634 $type = 'N';
541 635
542 } elsif ($cur =~ /^(\\\n)/o) { 636 } elsif ($cur =~ /^(\\\n)/o) {
543 print "PRECONT($1)\n" if ($debug); 637 print "PRECONT($1)\n" if ($dbg_values > 1);
544 638
545 } elsif ($cur =~ /^(sizeof)\s*(\()?/o) { 639 } elsif ($cur =~ /^(sizeof)\s*(\()?/o) {
546 print "SIZEOF($1)\n" if ($debug); 640 print "SIZEOF($1)\n" if ($dbg_values > 1);
547 if (defined $2) { 641 if (defined $2) {
548 $paren_type[$paren] = 'V'; 642 $av_paren_type[$av_paren] = 'V';
549 } 643 }
550 $type = 'N'; 644 $type = 'N';
551 645
552 } elsif ($cur =~ /^(if|while|typeof|for)\b/o) { 646 } elsif ($cur =~ /^(if|while|typeof|__typeof__|for)\b/o) {
553 print "COND($1)\n" if ($debug); 647 print "COND($1)\n" if ($dbg_values > 1);
554 $paren_type[$paren] = 'N'; 648 $av_paren_type[$av_paren] = 'N';
555 $type = 'N'; 649 $type = 'N';
556 650
557 } elsif ($cur =~/^(return|case|else)/o) { 651 } elsif ($cur =~/^(return|case|else)/o) {
558 print "KEYWORD($1)\n" if ($debug); 652 print "KEYWORD($1)\n" if ($dbg_values > 1);
559 $type = 'N'; 653 $type = 'N';
560 654
561 } elsif ($cur =~ /^(\()/o) { 655 } elsif ($cur =~ /^(\()/o) {
562 print "PAREN('$1')\n" if ($debug); 656 print "PAREN('$1')\n" if ($dbg_values > 1);
563 $paren++; 657 $av_paren++;
564 $type = 'N'; 658 $type = 'N';
565 659
566 } elsif ($cur =~ /^(\))/o) { 660 } elsif ($cur =~ /^(\))/o) {
567 $paren-- if ($paren > 0); 661 $av_paren-- if ($av_paren > 0);
568 if (defined $paren_type[$paren]) { 662 if (defined $av_paren_type[$av_paren]) {
569 $type = $paren_type[$paren]; 663 $type = $av_paren_type[$av_paren];
570 undef $paren_type[$paren]; 664 undef $av_paren_type[$av_paren];
571 print "PAREN('$1') -> $type\n" if ($debug); 665 print "PAREN('$1') -> $type\n"
666 if ($dbg_values > 1);
572 } else { 667 } else {
573 print "PAREN('$1')\n" if ($debug); 668 print "PAREN('$1')\n" if ($dbg_values > 1);
574 } 669 }
575 670
576 } elsif ($cur =~ /^($Ident)\(/o) { 671 } elsif ($cur =~ /^($Ident)\(/o) {
577 print "FUNC($1)\n" if ($debug); 672 print "FUNC($1)\n" if ($dbg_values > 1);
578 $paren_type[$paren] = 'V'; 673 $av_paren_type[$av_paren] = 'V';
579 674
580 } elsif ($cur =~ /^($Ident|$Constant)/o) { 675 } elsif ($cur =~ /^($Ident|$Constant)/o) {
581 print "IDENT($1)\n" if ($debug); 676 print "IDENT($1)\n" if ($dbg_values > 1);
582 $type = 'V'; 677 $type = 'V';
583 678
584 } elsif ($cur =~ /^($Assignment)/o) { 679 } elsif ($cur =~ /^($Assignment)/o) {
585 print "ASSIGN($1)\n" if ($debug); 680 print "ASSIGN($1)\n" if ($dbg_values > 1);
586 $type = 'N'; 681 $type = 'N';
587 682
683 } elsif ($cur =~/^(;)/) {
684 print "END($1)\n" if ($dbg_values > 1);
685 $type = 'E';
686
588 } elsif ($cur =~ /^(;|{|}|\?|:|\[)/o) { 687 } elsif ($cur =~ /^(;|{|}|\?|:|\[)/o) {
589 print "END($1)\n" if ($debug); 688 print "CLOSE($1)\n" if ($dbg_values > 1);
590 $type = 'N'; 689 $type = 'N';
591 690
592 } elsif ($cur =~ /^($Operators)/o) { 691 } elsif ($cur =~ /^($Operators)/o) {
593 print "OP($1)\n" if ($debug); 692 print "OP($1)\n" if ($dbg_values > 1);
594 if ($1 ne '++' && $1 ne '--') { 693 if ($1 ne '++' && $1 ne '--') {
595 $type = 'N'; 694 $type = 'N';
596 } 695 }
597 696
598 } elsif ($cur =~ /(^.)/o) { 697 } elsif ($cur =~ /(^.)/o) {
599 print "C($1)\n" if ($debug); 698 print "C($1)\n" if ($dbg_values > 1);
600 } 699 }
601 if (defined $1) { 700 if (defined $1) {
602 $cur = substr($cur, length($1)); 701 $cur = substr($cur, length($1));
@@ -608,7 +707,7 @@ sub annotate_values {
608} 707}
609 708
610sub possible { 709sub possible {
611 my ($possible) = @_; 710 my ($possible, $line) = @_;
612 711
613 #print "CHECK<$possible>\n"; 712 #print "CHECK<$possible>\n";
614 if ($possible !~ /^(?:$Storage|$Type|DEFINE_\S+)$/ && 713 if ($possible !~ /^(?:$Storage|$Type|DEFINE_\S+)$/ &&
@@ -616,7 +715,7 @@ sub possible {
616 $possible ne 'struct' && $possible ne 'enum' && 715 $possible ne 'struct' && $possible ne 'enum' &&
617 $possible ne 'case' && $possible ne 'else' && 716 $possible ne 'case' && $possible ne 'else' &&
618 $possible ne 'typedef') { 717 $possible ne 'typedef') {
619 #print "POSSIBLE<$possible>\n"; 718 warn "POSSIBLE: $possible ($line)\n" if ($dbg_possible);
620 push(@typeList, $possible); 719 push(@typeList, $possible);
621 build_types(); 720 build_types();
622 } 721 }
@@ -624,16 +723,15 @@ sub possible {
624 723
625my $prefix = ''; 724my $prefix = '';
626 725
627my @report = ();
628sub report { 726sub report {
629 my $line = $prefix . $_[0]; 727 my $line = $prefix . $_[0];
630 728
631 $line = (split('\n', $line))[0] . "\n" if ($terse); 729 $line = (split('\n', $line))[0] . "\n" if ($terse);
632 730
633 push(@report, $line); 731 push(our @report, $line);
634} 732}
635sub report_dump { 733sub report_dump {
636 @report; 734 our @report;
637} 735}
638sub ERROR { 736sub ERROR {
639 report("ERROR: $_[0]\n"); 737 report("ERROR: $_[0]\n");
@@ -655,11 +753,12 @@ sub CHK {
655 753
656sub process { 754sub process {
657 my $filename = shift; 755 my $filename = shift;
658 my @lines = @_;
659 756
660 my $linenr=0; 757 my $linenr=0;
661 my $prevline=""; 758 my $prevline="";
759 my $prevrawline="";
662 my $stashline=""; 760 my $stashline="";
761 my $stashrawline="";
663 762
664 my $length; 763 my $length;
665 my $indent; 764 my $indent;
@@ -670,6 +769,7 @@ sub process {
670 my $signoff = 0; 769 my $signoff = 0;
671 my $is_patch = 0; 770 my $is_patch = 0;
672 771
772 our @report = ();
673 our $cnt_lines = 0; 773 our $cnt_lines = 0;
674 our $cnt_error = 0; 774 our $cnt_error = 0;
675 our $cnt_warn = 0; 775 our $cnt_warn = 0;
@@ -681,14 +781,29 @@ sub process {
681 my $realcnt = 0; 781 my $realcnt = 0;
682 my $here = ''; 782 my $here = '';
683 my $in_comment = 0; 783 my $in_comment = 0;
784 my $comment_edge = 0;
684 my $first_line = 0; 785 my $first_line = 0;
685 786
686 my $prev_values = 'N'; 787 my $prev_values = 'E';
788
789 # suppression flags
790 my $suppress_ifbraces = 0;
687 791
792 # Pre-scan the patch sanitizing the lines.
688 # Pre-scan the patch looking for any __setup documentation. 793 # Pre-scan the patch looking for any __setup documentation.
794 #
689 my @setup_docs = (); 795 my @setup_docs = ();
690 my $setup_docs = 0; 796 my $setup_docs = 0;
691 foreach my $line (@lines) { 797 my $line;
798 foreach my $rawline (@rawlines) {
799 # Standardise the strings and chars within the input to
800 # simplify matching.
801 $line = sanitise_line($rawline);
802 push(@lines, $line);
803
804 ##print "==>$rawline\n";
805 ##print "-->$line\n";
806
692 if ($line=~/^\+\+\+\s+(\S+)/) { 807 if ($line=~/^\+\+\+\s+(\S+)/) {
693 $setup_docs = 0; 808 $setup_docs = 0;
694 if ($1 =~ m@Documentation/kernel-parameters.txt$@) { 809 if ($1 =~ m@Documentation/kernel-parameters.txt$@) {
@@ -707,8 +822,7 @@ sub process {
707 foreach my $line (@lines) { 822 foreach my $line (@lines) {
708 $linenr++; 823 $linenr++;
709 824
710 my $rawline = $line; 825 my $rawline = $rawlines[$linenr - 1];
711
712 826
713#extract the filename as it passes 827#extract the filename as it passes
714 if ($line=~/^\+\+\+\s+(\S+)/) { 828 if ($line=~/^\+\+\+\s+(\S+)/) {
@@ -728,7 +842,10 @@ sub process {
728 } else { 842 } else {
729 $realcnt=1+1; 843 $realcnt=1+1;
730 } 844 }
731 $prev_values = 'N'; 845 annotate_reset();
846 $prev_values = 'E';
847
848 $suppress_ifbraces = $linenr - 1;
732 next; 849 next;
733 } 850 }
734 851
@@ -746,7 +863,7 @@ sub process {
746 if ($linenr == $first_line) { 863 if ($linenr == $first_line) {
747 my $edge; 864 my $edge;
748 for (my $ln = $first_line; $ln < ($linenr + $realcnt); $ln++) { 865 for (my $ln = $first_line; $ln < ($linenr + $realcnt); $ln++) {
749 ($edge) = ($lines[$ln - 1] =~ m@(/\*|\*/)@); 866 ($edge) = ($rawlines[$ln - 1] =~ m@(/\*|\*/)@);
750 last if (defined $edge); 867 last if (defined $edge);
751 } 868 }
752 if (defined $edge && $edge eq '*/') { 869 if (defined $edge && $edge eq '*/') {
@@ -757,25 +874,30 @@ sub process {
757 # Guestimate if this is a continuing comment. If this 874 # Guestimate if this is a continuing comment. If this
758 # is the start of a diff block and this line starts 875 # is the start of a diff block and this line starts
759 # ' *' then it is very likely a comment. 876 # ' *' then it is very likely a comment.
760 if ($linenr == $first_line and $line =~ m@^.\s*\*@) { 877 if ($linenr == $first_line and $rawline =~ m@^.\s* \*(?:\s|$)@) {
761 $in_comment = 1; 878 $in_comment = 1;
762 } 879 }
763 880
764 # Find the last comment edge on _this_ line. 881 # Find the last comment edge on _this_ line.
765 while (($line =~ m@(/\*|\*/)@g)) { 882 $comment_edge = 0;
883 while (($rawline =~ m@(/\*|\*/)@g)) {
766 if ($1 eq '/*') { 884 if ($1 eq '/*') {
767 $in_comment = 1; 885 $in_comment = 1;
768 } else { 886 } else {
769 $in_comment = 0; 887 $in_comment = 0;
770 } 888 }
889 $comment_edge = 1;
771 } 890 }
772 891
773 # Measure the line length and indent. 892 # Measure the line length and indent.
774 ($length, $indent) = line_stats($line); 893 ($length, $indent) = line_stats($rawline);
775 894
776 # Track the previous line. 895 # Track the previous line.
777 ($prevline, $stashline) = ($stashline, $line); 896 ($prevline, $stashline) = ($stashline, $line);
778 ($previndent, $stashindent) = ($stashindent, $indent); 897 ($previndent, $stashindent) = ($stashindent, $indent);
898 ($prevrawline, $stashrawline) = ($stashrawline, $rawline);
899
900 #warn "ic<$in_comment> ce<$comment_edge> line<$line>\n";
779 901
780 } elsif ($realcnt == 1) { 902 } elsif ($realcnt == 1) {
781 $realcnt--; 903 $realcnt--;
@@ -786,9 +908,9 @@ sub process {
786 $here = "#$realline: " if ($file); 908 $here = "#$realline: " if ($file);
787 $here .= "FILE: $realfile:$realline:" if ($realcnt != 0); 909 $here .= "FILE: $realfile:$realline:" if ($realcnt != 0);
788 910
789 my $hereline = "$here\n$line\n"; 911 my $hereline = "$here\n$rawline\n";
790 my $herecurr = "$here\n$line\n"; 912 my $herecurr = "$here\n$rawline\n";
791 my $hereprev = "$here\n$prevline\n$line\n"; 913 my $hereprev = "$here\n$prevrawline\n$rawline\n";
792 914
793 $prefix = "$filename:$realline: " if ($emacs && $file); 915 $prefix = "$filename:$realline: " if ($emacs && $file);
794 $prefix = "$filename:$linenr: " if ($emacs && !$file); 916 $prefix = "$filename:$linenr: " if ($emacs && !$file);
@@ -816,7 +938,7 @@ sub process {
816 938
817# UTF-8 regex found at http://www.w3.org/International/questions/qa-forms-utf-8.en.php 939# UTF-8 regex found at http://www.w3.org/International/questions/qa-forms-utf-8.en.php
818 if (($realfile =~ /^$/ || $line =~ /^\+/) && 940 if (($realfile =~ /^$/ || $line =~ /^\+/) &&
819 !($line =~ m/^( 941 !($rawline =~ m/^(
820 [\x09\x0A\x0D\x20-\x7E] # ASCII 942 [\x09\x0A\x0D\x20-\x7E] # ASCII
821 | [\xC2-\xDF][\x80-\xBF] # non-overlong 2-byte 943 | [\xC2-\xDF][\x80-\xBF] # non-overlong 2-byte
822 | \xE0[\xA0-\xBF][\x80-\xBF] # excluding overlongs 944 | \xE0[\xA0-\xBF][\x80-\xBF] # excluding overlongs
@@ -826,7 +948,7 @@ sub process {
826 | [\xF1-\xF3][\x80-\xBF]{3} # planes 4-15 948 | [\xF1-\xF3][\x80-\xBF]{3} # planes 4-15
827 | \xF4[\x80-\x8F][\x80-\xBF]{2} # plane 16 949 | \xF4[\x80-\x8F][\x80-\xBF]{2} # plane 16
828 )*$/x )) { 950 )*$/x )) {
829 ERROR("Invalid UTF-8\n" . $herecurr); 951 ERROR("Invalid UTF-8, patch and commit message should be encoded in UTF-8\n" . $herecurr);
830 } 952 }
831 953
832#ignore lines being removed 954#ignore lines being removed
@@ -837,15 +959,15 @@ sub process {
837 959
838#trailing whitespace 960#trailing whitespace
839 if ($line =~ /^\+.*\015/) { 961 if ($line =~ /^\+.*\015/) {
840 my $herevet = "$here\n" . cat_vet($line) . "\n"; 962 my $herevet = "$here\n" . cat_vet($rawline) . "\n";
841 ERROR("DOS line endings\n" . $herevet); 963 ERROR("DOS line endings\n" . $herevet);
842 964
843 } elsif ($line =~ /^\+.*\S\s+$/ || $line =~ /^\+\s+$/) { 965 } elsif ($rawline =~ /^\+.*\S\s+$/ || $rawline =~ /^\+\s+$/) {
844 my $herevet = "$here\n" . cat_vet($line) . "\n"; 966 my $herevet = "$here\n" . cat_vet($rawline) . "\n";
845 ERROR("trailing whitespace\n" . $herevet); 967 ERROR("trailing whitespace\n" . $herevet);
846 } 968 }
847#80 column limit 969#80 column limit
848 if ($line =~ /^\+/ && !($prevline=~/\/\*\*/) && $length > 80) { 970 if ($line =~ /^\+/ && !($prevrawline=~/\/\*\*/) && $length > 80) {
849 WARN("line over 80 characters\n" . $herecurr); 971 WARN("line over 80 characters\n" . $herecurr);
850 } 972 }
851 973
@@ -859,46 +981,48 @@ sub process {
859 981
860# at the beginning of a line any tabs must come first and anything 982# at the beginning of a line any tabs must come first and anything
861# more than 8 must use tabs. 983# more than 8 must use tabs.
862 if ($line=~/^\+\s* \t\s*\S/ or $line=~/^\+\s* \s*/) { 984 if ($rawline =~ /^\+\s* \t\s*\S/ ||
863 my $herevet = "$here\n" . cat_vet($line) . "\n"; 985 $rawline =~ /^\+\s* \s*/) {
986 my $herevet = "$here\n" . cat_vet($rawline) . "\n";
864 ERROR("use tabs not spaces\n" . $herevet); 987 ERROR("use tabs not spaces\n" . $herevet);
865 } 988 }
866 989
867# Remove comments from the line before processing. 990# check for RCS/CVS revision markers
868 my $comment_edge = ($line =~ s@/\*.*\*/@@g) + 991 if ($rawline =~ /\$(Revision|Log|Id)(?:\$|)/) {
869 ($line =~ s@/\*.*@@) + 992 WARN("CVS style keyword markers, these will _not_ be updated\n". $herecurr);
870 ($line =~ s@^(.).*\*/@$1@); 993 }
871 994
872# The rest of our checks refer specifically to C style 995# The rest of our checks refer specifically to C style
873# only apply those _outside_ comments. Only skip 996# only apply those _outside_ comments. Only skip
874# lines in the middle of comments. 997# lines in the middle of comments.
875 next if (!$comment_edge && $in_comment); 998 next if (!$comment_edge && $in_comment);
876 999
877# Standardise the strings and chars within the input to simplify matching.
878 $line = sanitise_line($line);
879
880# Check for potential 'bare' types 1000# Check for potential 'bare' types
881 if ($realcnt && 1001 if ($realcnt) {
882 $line !~ /$Ident:\s*$/ && 1002 # Ignore goto labels.
883 ($line =~ /^.\s*$Ident\s*\(\*+\s*$Ident\)\s*\(/ || 1003 if ($line =~ /$Ident:\*$/) {
884 $line !~ /^.\s*$Ident\s*\(/)) { 1004
1005 # Ignore functions being called
1006 } elsif ($line =~ /^.\s*$Ident\s*\(/) {
1007
885 # definitions in global scope can only start with types 1008 # definitions in global scope can only start with types
886 if ($line =~ /^.(?:$Storage\s+)?(?:$Inline\s+)?(?:const\s+)?($Ident)\b/) { 1009 } elsif ($line =~ /^.(?:$Storage\s+)?(?:$Inline\s+)?(?:const\s+)?($Ident)\b/) {
887 possible($1); 1010 possible($1, $line);
888 1011
889 # declarations always start with types 1012 # declarations always start with types
890 } elsif ($prev_values eq 'N' && $line =~ /^.\s*(?:$Storage\s+)?($Ident)\b\s*\**\s*$Ident\s*(?:;|=)/) { 1013 } elsif ($prev_values eq 'E' && $line =~ /^.\s*(?:$Storage\s+)?(?:const\s+)?($Ident)\b(:?\s+$Sparse)?\s*\**\s*$Ident\s*(?:;|=|,)/) {
891 possible($1); 1014 possible($1);
1015 }
892 1016
893 # any (foo ... *) is a pointer cast, and foo is a type 1017 # any (foo ... *) is a pointer cast, and foo is a type
894 } elsif ($line =~ /\(($Ident)(?:\s+$Sparse)*\s*\*+\s*\)/) { 1018 while ($line =~ /\(($Ident)(?:\s+$Sparse)*\s*\*+\s*\)/g) {
895 possible($1); 1019 possible($1, $line);
896 } 1020 }
897 1021
898 # Check for any sort of function declaration. 1022 # Check for any sort of function declaration.
899 # int foo(something bar, other baz); 1023 # int foo(something bar, other baz);
900 # void (*store_gdt)(x86_descr_ptr *); 1024 # void (*store_gdt)(x86_descr_ptr *);
901 if ($prev_values eq 'N' && $line =~ /^(.(?:(?:$Storage|$Inline)\s*)*\s*$Type\s*(?:\b$Ident|\(\*\s*$Ident\))\s*)\(/) { 1025 if ($prev_values eq 'E' && $line =~ /^(.(?:typedef\s*)?(?:(?:$Storage|$Inline)\s*)*\s*$Type\s*(?:\b$Ident|\(\*\s*$Ident\))\s*)\(/) {
902 my ($name_len) = length($1); 1026 my ($name_len) = length($1);
903 my ($level, @ctx) = ctx_statement_level($linenr, $realcnt, $name_len); 1027 my ($level, @ctx) = ctx_statement_level($linenr, $realcnt, $name_len);
904 my $ctx = join("\n", @ctx); 1028 my $ctx = join("\n", @ctx);
@@ -909,7 +1033,7 @@ sub process {
909 for my $arg (split(/\s*,\s*/, $ctx)) { 1033 for my $arg (split(/\s*,\s*/, $ctx)) {
910 if ($arg =~ /^(?:const\s+)?($Ident)(?:\s+$Sparse)*\s*\**\s*(:?\b$Ident)?$/ || $arg =~ /^($Ident)$/) { 1034 if ($arg =~ /^(?:const\s+)?($Ident)(?:\s+$Sparse)*\s*\**\s*(:?\b$Ident)?$/ || $arg =~ /^($Ident)$/) {
911 1035
912 possible($1); 1036 possible($1, $line);
913 } 1037 }
914 } 1038 }
915 } 1039 }
@@ -974,8 +1098,11 @@ sub process {
974 my $opline = $line; $opline =~ s/^./ /; 1098 my $opline = $line; $opline =~ s/^./ /;
975 my $curr_values = annotate_values($opline . "\n", $prev_values); 1099 my $curr_values = annotate_values($opline . "\n", $prev_values);
976 $curr_values = $prev_values . $curr_values; 1100 $curr_values = $prev_values . $curr_values;
977 #warn "--> $opline\n"; 1101 if ($dbg_values) {
978 #warn "--> $curr_values ($prev_values)\n"; 1102 my $outline = $opline; $outline =~ s/\t/ /g;
1103 warn "--> .$outline\n";
1104 warn "--> $curr_values\n";
1105 }
979 $prev_values = substr($curr_values, -1); 1106 $prev_values = substr($curr_values, -1);
980 1107
981#ignore lines not being added 1108#ignore lines not being added
@@ -1004,9 +1131,6 @@ sub process {
1004 ERROR("malformed #include filename\n" . 1131 ERROR("malformed #include filename\n" .
1005 $herecurr); 1132 $herecurr);
1006 } 1133 }
1007 # Sanitise this special form of string.
1008 $path = 'X' x length($path);
1009 $line =~ s{\<.*\>}{<$path>};
1010 } 1134 }
1011 1135
1012# no C99 // comments 1136# no C99 // comments
@@ -1074,7 +1198,7 @@ sub process {
1074# } 1198# }
1075 1199
1076 if ($line =~ /\bLINUX_VERSION_CODE\b/) { 1200 if ($line =~ /\bLINUX_VERSION_CODE\b/) {
1077 WARN("LINUX_VERSION_CODE should be avoided, code should be for the version to which it is merged" . $herecurr); 1201 WARN("LINUX_VERSION_CODE should be avoided, code should be for the version to which it is merged\n" . $herecurr);
1078 } 1202 }
1079 1203
1080# printk should use KERN_* levels. Note that follow on printk's on the 1204# printk should use KERN_* levels. Note that follow on printk's on the
@@ -1102,7 +1226,7 @@ sub process {
1102 1226
1103# function brace can't be on same line, except for #defines of do while, 1227# function brace can't be on same line, except for #defines of do while,
1104# or if closed on same line 1228# or if closed on same line
1105 if (($line=~/$Type\s*[A-Za-z\d_]+\(.*\).* {/) and 1229 if (($line=~/$Type\s*[A-Za-z\d_]+\(.*\).*\s{/) and
1106 !($line=~/\#define.*do\s{/) and !($line=~/}/)) { 1230 !($line=~/\#define.*do\s{/) and !($line=~/}/)) {
1107 ERROR("open brace '{' following function declarations go on the next line\n" . $herecurr); 1231 ERROR("open brace '{' following function declarations go on the next line\n" . $herecurr);
1108 } 1232 }
@@ -1115,8 +1239,22 @@ sub process {
1115 1239
1116# check for spaces between functions and their parentheses. 1240# check for spaces between functions and their parentheses.
1117 while ($line =~ /($Ident)\s+\(/g) { 1241 while ($line =~ /($Ident)\s+\(/g) {
1118 if ($1 !~ /^(?:if|for|while|switch|return|volatile|__volatile__|__attribute__|format|__extension__|Copyright|case)$/ && 1242 my $name = $1;
1119 $line !~ /$Type\s+\(/ && $line !~ /^.\#\s*define\b/) { 1243 my $ctx = substr($line, 0, $-[1]);
1244
1245 # Ignore those directives where spaces _are_ permitted.
1246 if ($name =~ /^(?:if|for|while|switch|return|volatile|__volatile__|__attribute__|format|__extension__|Copyright|case|__asm__)$/) {
1247
1248 # cpp #define statements have non-optional spaces, ie
1249 # if there is a space between the name and the open
1250 # parenthesis it is simply not a parameter group.
1251 } elsif ($ctx =~ /^.\#\s*define\s*$/) {
1252
1253 # If this whole things ends with a type its most
1254 # likely a typedef for a function.
1255 } elsif ("$ctx$name" =~ /$Type$/) {
1256
1257 } else {
1120 WARN("no space between function name and open parenthesis '('\n" . $herecurr); 1258 WARN("no space between function name and open parenthesis '('\n" . $herecurr);
1121 } 1259 }
1122 } 1260 }
@@ -1126,9 +1264,9 @@ sub process {
1126 <<=|>>=|<=|>=|==|!=| 1264 <<=|>>=|<=|>=|==|!=|
1127 \+=|-=|\*=|\/=|%=|\^=|\|=|&=| 1265 \+=|-=|\*=|\/=|%=|\^=|\|=|&=|
1128 =>|->|<<|>>|<|>|=|!|~| 1266 =>|->|<<|>>|<|>|=|!|~|
1129 &&|\|\||,|\^|\+\+|--|&|\||\+|-|\*|\/ 1267 &&|\|\||,|\^|\+\+|--|&|\||\+|-|\*|\/|%
1130 }x; 1268 }x;
1131 my @elements = split(/($ops|;)/, $opline); 1269 my @elements = split(/($;+|$ops|;)/, $opline);
1132 my $off = 0; 1270 my $off = 0;
1133 1271
1134 my $blank = copy_spacing($opline); 1272 my $blank = copy_spacing($opline);
@@ -1188,8 +1326,15 @@ sub process {
1188 # print "UNARY: <$op_left$op_type $is_unary $a:$op:$c> <$ca:$op:$cc> <$unary_ctx>\n"; 1326 # print "UNARY: <$op_left$op_type $is_unary $a:$op:$c> <$ca:$op:$cc> <$unary_ctx>\n";
1189 #} 1327 #}
1190 1328
1329 # Ignore operators passed as parameters.
1330 if ($op_type ne 'V' &&
1331 $ca =~ /\s$/ && $cc =~ /^\s*,/) {
1332
1333 # Ignore comments
1334 } elsif ($op =~ /^$;+$/) {
1335
1191 # ; should have either the end of line or a space or \ after it 1336 # ; should have either the end of line or a space or \ after it
1192 if ($op eq ';') { 1337 } elsif ($op eq ';') {
1193 if ($ctx !~ /.x[WEB]/ && $cc !~ /^\\/ && 1338 if ($ctx !~ /.x[WEB]/ && $cc !~ /^\\/ &&
1194 $cc !~ /^;/) { 1339 $cc !~ /^;/) {
1195 ERROR("need space after that '$op' $at\n" . $hereptr); 1340 ERROR("need space after that '$op' $at\n" . $hereptr);
@@ -1231,7 +1376,7 @@ sub process {
1231 if ($ctx !~ /[WOB]x[^W]/ && $ctx !~ /[^W]x[WOBE]/) { 1376 if ($ctx !~ /[WOB]x[^W]/ && $ctx !~ /[^W]x[WOBE]/) {
1232 ERROR("need space one side of that '$op' $at\n" . $hereptr); 1377 ERROR("need space one side of that '$op' $at\n" . $hereptr);
1233 } 1378 }
1234 if ($ctx =~ /Wx./ && $cc =~ /^;/) { 1379 if ($ctx =~ /WxB/ || ($ctx =~ /Wx./ && $cc =~ /^;/)) {
1235 ERROR("no space before that '$op' $at\n" . $hereptr); 1380 ERROR("no space before that '$op' $at\n" . $hereptr);
1236 } 1381 }
1237 1382
@@ -1239,7 +1384,8 @@ sub process {
1239 } elsif ($op eq '<<' or $op eq '>>' or 1384 } elsif ($op eq '<<' or $op eq '>>' or
1240 $op eq '&' or $op eq '^' or $op eq '|' or 1385 $op eq '&' or $op eq '^' or $op eq '|' or
1241 $op eq '+' or $op eq '-' or 1386 $op eq '+' or $op eq '-' or
1242 $op eq '*' or $op eq '/') 1387 $op eq '*' or $op eq '/' or
1388 $op eq '%')
1243 { 1389 {
1244 if ($ctx !~ /VxV|WxW|VxE|WxE|VxO/) { 1390 if ($ctx !~ /VxV|WxW|VxE|WxE|VxO/) {
1245 ERROR("need consistent spacing around '$op' $at\n" . 1391 ERROR("need consistent spacing around '$op' $at\n" .
@@ -1303,7 +1449,7 @@ sub process {
1303 $line !~ /for\s*\(\s+;/) { 1449 $line !~ /for\s*\(\s+;/) {
1304 ERROR("no space after that open parenthesis '('\n" . $herecurr); 1450 ERROR("no space after that open parenthesis '('\n" . $herecurr);
1305 } 1451 }
1306 if ($line =~ /\s\)/ && $line !~ /^.\s*\)/ && 1452 if ($line =~ /(\s+)\)/ && $line !~ /^.\s*\)/ &&
1307 $line !~ /for\s*\(.*;\s+\)/) { 1453 $line !~ /for\s*\(.*;\s+\)/) {
1308 ERROR("no space before that close parenthesis ')'\n" . $herecurr); 1454 ERROR("no space before that close parenthesis ')'\n" . $herecurr);
1309 } 1455 }
@@ -1324,23 +1470,41 @@ sub process {
1324 my ($s, $c) = ctx_statement_block($linenr, $realcnt, 0); 1470 my ($s, $c) = ctx_statement_block($linenr, $realcnt, 0);
1325 1471
1326 if ($c =~ /\bif\s*\(.*[^<>!=]=[^=].*/) { 1472 if ($c =~ /\bif\s*\(.*[^<>!=]=[^=].*/) {
1327 ERROR("do not use assignment in if condition ($c)\n" . $herecurr); 1473 ERROR("do not use assignment in if condition\n" . $herecurr);
1328 } 1474 }
1329 1475
1330 # Find out what is on the end of the line after the 1476 # Find out what is on the end of the line after the
1331 # conditional. 1477 # conditional.
1332 substr($s, 0, length($c)) = ''; 1478 substr($s, 0, length($c)) = '';
1333 $s =~ s/\n.*//g; 1479 $s =~ s/\n.*//g;
1334 1480 $s =~ s/$;//g; # Remove any comments
1335 if (length($c) && $s !~ /^\s*({|;|\/\*.*\*\/)?\s*\\*\s*$/) { 1481 if (length($c) && $s !~ /^\s*({|;|)\s*\\*\s*$/) {
1336 ERROR("trailing statements should be on next line\n" . $herecurr); 1482 ERROR("trailing statements should be on next line\n" . $herecurr);
1337 } 1483 }
1338 } 1484 }
1339 1485
1486# Check for bitwise tests written as boolean
1487 if ($line =~ /
1488 (?:
1489 (?:\[|\(|\&\&|\|\|)
1490 \s*0[xX][0-9]+\s*
1491 (?:\&\&|\|\|)
1492 |
1493 (?:\&\&|\|\|)
1494 \s*0[xX][0-9]+\s*
1495 (?:\&\&|\|\||\)|\])
1496 )/x)
1497 {
1498 WARN("boolean test with hexadecimal, perhaps just 1 \& or \|?\n" . $herecurr);
1499 }
1500
1340# if and else should not have general statements after it 1501# if and else should not have general statements after it
1341 if ($line =~ /^.\s*(?:}\s*)?else\b(.*)/ && 1502 if ($line =~ /^.\s*(?:}\s*)?else\b(.*)/) {
1342 $1 !~ /^\s*(?:\sif|{|\\|$)/) { 1503 my $s = $1;
1343 ERROR("trailing statements should be on next line\n" . $herecurr); 1504 $s =~ s/$;//g; # Remove any comments
1505 if ($s !~ /^\s*(?:\sif|(?:{|)\s*\\?\s*$)/) {
1506 ERROR("trailing statements should be on next line\n" . $herecurr);
1507 }
1344 } 1508 }
1345 1509
1346 # Check for }<nl>else {, these must be at the same 1510 # Check for }<nl>else {, these must be at the same
@@ -1350,6 +1514,20 @@ sub process {
1350 ERROR("else should follow close brace '}'\n" . $hereprev); 1514 ERROR("else should follow close brace '}'\n" . $hereprev);
1351 } 1515 }
1352 1516
1517 if ($prevline=~/}\s*$/ and $line=~/^.\s*while\s*/ and
1518 $previndent == $indent) {
1519 my ($s, $c) = ctx_statement_block($linenr, $realcnt, 0);
1520
1521 # Find out what is on the end of the line after the
1522 # conditional.
1523 substr($s, 0, length($c)) = '';
1524 $s =~ s/\n.*//g;
1525
1526 if ($s =~ /^\s*;/) {
1527 ERROR("while should follow close brace '}'\n" . $hereprev);
1528 }
1529 }
1530
1353#studly caps, commented out until figure out how to distinguish between use of existing and adding new 1531#studly caps, commented out until figure out how to distinguish between use of existing and adding new
1354# if (($line=~/[\w_][a-z\d]+[A-Z]/) and !($line=~/print/)) { 1532# if (($line=~/[\w_][a-z\d]+[A-Z]/) and !($line=~/print/)) {
1355# print "No studly caps, use _\n"; 1533# print "No studly caps, use _\n";
@@ -1419,7 +1597,48 @@ sub process {
1419 } 1597 }
1420 1598
1421# check for redundant bracing round if etc 1599# check for redundant bracing round if etc
1422 if ($line =~ /\b(if|while|for|else)\b/) { 1600 if ($line =~ /(^.*)\bif\b/ && $1 !~ /else\s*$/) {
1601 my ($level, $endln, @chunks) =
1602 ctx_statement_full($linenr, $realcnt, 0);
1603 #print "chunks<$#chunks> linenr<$linenr> endln<$endln> level<$level>\n";
1604 if ($#chunks > 1 && $level == 0) {
1605 my $allowed = 0;
1606 my $seen = 0;
1607 for my $chunk (@chunks) {
1608 my ($cond, $block) = @{$chunk};
1609
1610 substr($block, 0, length($cond)) = '';
1611
1612 $seen++ if ($block =~ /^\s*{/);
1613
1614 $block =~ s/(^|\n)./$1/g;
1615 $block =~ s/^\s*{//;
1616 $block =~ s/}\s*$//;
1617 $block =~ s/^\s*//;
1618 $block =~ s/\s*$//;
1619
1620 my @lines = ($block =~ /\n/g);
1621 my @statements = ($block =~ /;/g);
1622
1623 #print "cond<$cond> block<$block> lines<" . scalar(@lines) . "> statements<" . scalar(@statements) . "> seen<$seen> allowed<$allowed>\n";
1624 if (scalar(@lines) != 0) {
1625 $allowed = 1;
1626 }
1627 if ($block =~/\b(?:if|for|while)\b/) {
1628 $allowed = 1;
1629 }
1630 if (scalar(@statements) > 1) {
1631 $allowed = 1;
1632 }
1633 }
1634 if ($seen && !$allowed) {
1635 WARN("braces {} are not necessary for any arm of this statement\n" . $herecurr);
1636 $suppress_ifbraces = $endln;
1637 }
1638 }
1639 }
1640 if ($linenr > $suppress_ifbraces &&
1641 $line =~ /\b(if|while|for|else)\b/) {
1423 # Locate the end of the opening statement. 1642 # Locate the end of the opening statement.
1424 my @control = ctx_statement($linenr, $realcnt, 0); 1643 my @control = ctx_statement($linenr, $realcnt, 0);
1425 my $nr = $linenr + (scalar(@control) - 1); 1644 my $nr = $linenr + (scalar(@control) - 1);
@@ -1442,13 +1661,16 @@ sub process {
1442 my $after = $1; 1661 my $after = $1;
1443 1662
1444 #print "block<" . join(' ', @block) . "><" . scalar(@block) . ">\n"; 1663 #print "block<" . join(' ', @block) . "><" . scalar(@block) . ">\n";
1445 #print "stmt<$stmt>\n\n"; 1664 #print "before<$before> stmt<$stmt> after<$after>\n\n";
1446 1665
1447 # Count the newlines, if there is only one 1666 # Count the newlines, if there is only one
1448 # then the block should not have {}'s. 1667 # then the block should not have {}'s.
1449 my @lines = ($stmt =~ /\n/g); 1668 my @lines = ($stmt =~ /\n/g);
1669 my @statements = ($stmt =~ /;/g);
1450 #print "lines<" . scalar(@lines) . ">\n"; 1670 #print "lines<" . scalar(@lines) . ">\n";
1671 #print "statements<" . scalar(@statements) . ">\n";
1451 if ($lvl == 0 && scalar(@lines) == 0 && 1672 if ($lvl == 0 && scalar(@lines) == 0 &&
1673 scalar(@statements) < 2 &&
1452 $stmt !~ /{/ && $stmt !~ /\bif\b/ && 1674 $stmt !~ /{/ && $stmt !~ /\bif\b/ &&
1453 $before !~ /}/ && $after !~ /{/) { 1675 $before !~ /}/ && $after !~ /{/) {
1454 my $herectx = "$here\n" . join("\n", @control, @block[1 .. $#block]) . "\n"; 1676 my $herectx = "$here\n" . join("\n", @control, @block[1 .. $#block]) . "\n";
@@ -1557,6 +1779,17 @@ sub process {
1557 if ($line =~ /\*\s*\)\s*k[czm]alloc\b/) { 1779 if ($line =~ /\*\s*\)\s*k[czm]alloc\b/) {
1558 WARN("unnecessary cast may hide bugs, see http://c-faq.com/malloc/mallocnocast.html\n" . $herecurr); 1780 WARN("unnecessary cast may hide bugs, see http://c-faq.com/malloc/mallocnocast.html\n" . $herecurr);
1559 } 1781 }
1782
1783# check for gcc specific __FUNCTION__
1784 if ($line =~ /__FUNCTION__/) {
1785 WARN("__func__ should be used instead of gcc specific __FUNCTION__\n" . $herecurr);
1786 }
1787 }
1788
1789 # If we have no input at all, then there is nothing to report on
1790 # so just keep quiet.
1791 if ($#rawlines == -1) {
1792 exit(0);
1560 } 1793 }
1561 1794
1562 # In mailback mode only produce a report in the negative, for 1795 # In mailback mode only produce a report in the negative, for
@@ -1579,7 +1812,8 @@ sub process {
1579 } 1812 }
1580 1813
1581 print report_dump(); 1814 print report_dump();
1582 if ($summary) { 1815 if ($summary && !($clean == 1 && $quiet == 1)) {
1816 print "$filename " if ($summary_file);
1583 print "total: $cnt_error errors, $cnt_warn warnings, " . 1817 print "total: $cnt_error errors, $cnt_warn warnings, " .
1584 (($check)? "$cnt_chk checks, " : "") . 1818 (($check)? "$cnt_chk checks, " : "") .
1585 "$cnt_lines lines checked\n"; 1819 "$cnt_lines lines checked\n";
@@ -1587,12 +1821,22 @@ sub process {
1587 } 1821 }
1588 1822
1589 if ($clean == 1 && $quiet == 0) { 1823 if ($clean == 1 && $quiet == 0) {
1590 print "Your patch has no obvious style problems and is ready for submission.\n" 1824 print "$vname has no obvious style problems and is ready for submission.\n"
1591 } 1825 }
1592 if ($clean == 0 && $quiet == 0) { 1826 if ($clean == 0 && $quiet == 0) {
1593 print "Your patch has style problems, please review. If any of these errors\n"; 1827 print "$vname has style problems, please review. If any of these errors\n";
1594 print "are false positives report them to the maintainer, see\n"; 1828 print "are false positives report them to the maintainer, see\n";
1595 print "CHECKPATCH in MAINTAINERS.\n"; 1829 print "CHECKPATCH in MAINTAINERS.\n";
1596 } 1830 }
1831 print <<EOL if ($file == 1 && $quiet == 0);
1832
1833WARNING: Using --file mode. Please do not send patches to linux-kernel
1834that change whole existing files if you did not significantly change most
1835of the the file for other reasons anyways or just wrote the file newly
1836from scratch. Pure code style patches have a significant cost in a
1837quickly changing code base like Linux because they cause rejects
1838with other changes.
1839EOL
1840
1597 return $clean; 1841 return $clean;
1598} 1842}
diff --git a/sound/oss/swarm_cs4297a.c b/sound/oss/swarm_cs4297a.c
index a8057f259553..044453a4ee5b 100644
--- a/sound/oss/swarm_cs4297a.c
+++ b/sound/oss/swarm_cs4297a.c
@@ -1580,7 +1580,7 @@ static int cs4297a_ioctl_mixdev(struct inode *inode, struct file *file,
1580// ****************************************************************************************** 1580// ******************************************************************************************
1581// Mixer file operations struct. 1581// Mixer file operations struct.
1582// ****************************************************************************************** 1582// ******************************************************************************************
1583static /*const */ struct file_operations cs4297a_mixer_fops = { 1583static const struct file_operations cs4297a_mixer_fops = {
1584 .owner = THIS_MODULE, 1584 .owner = THIS_MODULE,
1585 .llseek = no_llseek, 1585 .llseek = no_llseek,
1586 .ioctl = cs4297a_ioctl_mixdev, 1586 .ioctl = cs4297a_ioctl_mixdev,
@@ -2491,7 +2491,7 @@ static int cs4297a_open(struct inode *inode, struct file *file)
2491// ****************************************************************************************** 2491// ******************************************************************************************
2492// Wave (audio) file operations struct. 2492// Wave (audio) file operations struct.
2493// ****************************************************************************************** 2493// ******************************************************************************************
2494static /*const */ struct file_operations cs4297a_audio_fops = { 2494static const struct file_operations cs4297a_audio_fops = {
2495 .owner = THIS_MODULE, 2495 .owner = THIS_MODULE,
2496 .llseek = no_llseek, 2496 .llseek = no_llseek,
2497 .read = cs4297a_read, 2497 .read = cs4297a_read,
diff --git a/sound/oss/trident.c b/sound/oss/trident.c
index 6959ee1bd17f..d6af9065d1c0 100644
--- a/sound/oss/trident.c
+++ b/sound/oss/trident.c
@@ -2878,7 +2878,7 @@ trident_release(struct inode *inode, struct file *file)
2878 return 0; 2878 return 0;
2879} 2879}
2880 2880
2881static /*const */ struct file_operations trident_audio_fops = { 2881static const struct file_operations trident_audio_fops = {
2882 .owner = THIS_MODULE, 2882 .owner = THIS_MODULE,
2883 .llseek = no_llseek, 2883 .llseek = no_llseek,
2884 .read = trident_read, 2884 .read = trident_read,
@@ -4104,7 +4104,7 @@ trident_ioctl_mixdev(struct inode *inode, struct file *file, unsigned int cmd,
4104 return codec->mixer_ioctl(codec, cmd, arg); 4104 return codec->mixer_ioctl(codec, cmd, arg);
4105} 4105}
4106 4106
4107static /*const */ struct file_operations trident_mixer_fops = { 4107static const struct file_operations trident_mixer_fops = {
4108 .owner = THIS_MODULE, 4108 .owner = THIS_MODULE,
4109 .llseek = no_llseek, 4109 .llseek = no_llseek,
4110 .ioctl = trident_ioctl_mixdev, 4110 .ioctl = trident_ioctl_mixdev,
diff --git a/virt/kvm/kvm_main.c b/virt/kvm/kvm_main.c
index 3c4fe26096fc..32fbf8006969 100644
--- a/virt/kvm/kvm_main.c
+++ b/virt/kvm/kvm_main.c
@@ -1186,38 +1186,38 @@ static struct notifier_block kvm_cpu_notifier = {
1186 .priority = 20, /* must be > scheduler priority */ 1186 .priority = 20, /* must be > scheduler priority */
1187}; 1187};
1188 1188
1189static u64 vm_stat_get(void *_offset) 1189static int vm_stat_get(void *_offset, u64 *val)
1190{ 1190{
1191 unsigned offset = (long)_offset; 1191 unsigned offset = (long)_offset;
1192 u64 total = 0;
1193 struct kvm *kvm; 1192 struct kvm *kvm;
1194 1193
1194 *val = 0;
1195 spin_lock(&kvm_lock); 1195 spin_lock(&kvm_lock);
1196 list_for_each_entry(kvm, &vm_list, vm_list) 1196 list_for_each_entry(kvm, &vm_list, vm_list)
1197 total += *(u32 *)((void *)kvm + offset); 1197 *val += *(u32 *)((void *)kvm + offset);
1198 spin_unlock(&kvm_lock); 1198 spin_unlock(&kvm_lock);
1199 return total; 1199 return 0;
1200} 1200}
1201 1201
1202DEFINE_SIMPLE_ATTRIBUTE(vm_stat_fops, vm_stat_get, NULL, "%llu\n"); 1202DEFINE_SIMPLE_ATTRIBUTE(vm_stat_fops, vm_stat_get, NULL, "%llu\n");
1203 1203
1204static u64 vcpu_stat_get(void *_offset) 1204static int vcpu_stat_get(void *_offset, u64 *val)
1205{ 1205{
1206 unsigned offset = (long)_offset; 1206 unsigned offset = (long)_offset;
1207 u64 total = 0;
1208 struct kvm *kvm; 1207 struct kvm *kvm;
1209 struct kvm_vcpu *vcpu; 1208 struct kvm_vcpu *vcpu;
1210 int i; 1209 int i;
1211 1210
1211 *val = 0;
1212 spin_lock(&kvm_lock); 1212 spin_lock(&kvm_lock);
1213 list_for_each_entry(kvm, &vm_list, vm_list) 1213 list_for_each_entry(kvm, &vm_list, vm_list)
1214 for (i = 0; i < KVM_MAX_VCPUS; ++i) { 1214 for (i = 0; i < KVM_MAX_VCPUS; ++i) {
1215 vcpu = kvm->vcpus[i]; 1215 vcpu = kvm->vcpus[i];
1216 if (vcpu) 1216 if (vcpu)
1217 total += *(u32 *)((void *)vcpu + offset); 1217 *val += *(u32 *)((void *)vcpu + offset);
1218 } 1218 }
1219 spin_unlock(&kvm_lock); 1219 spin_unlock(&kvm_lock);
1220 return total; 1220 return 0;
1221} 1221}
1222 1222
1223DEFINE_SIMPLE_ATTRIBUTE(vcpu_stat_fops, vcpu_stat_get, NULL, "%llu\n"); 1223DEFINE_SIMPLE_ATTRIBUTE(vcpu_stat_fops, vcpu_stat_get, NULL, "%llu\n");