4 files changed, 15 insertions, 28 deletions

diff --git a/arch/powerpc/include/asm/machdep.h b/arch/powerpc/include/asm/machdep.h
index bcfc0da2cef1..578d3309e109 100644
--- a/arch/powerpc/include/asm/machdep.h
+++ b/arch/powerpc/include/asm/machdep.h
@@ -266,7 +266,6 @@ struct machdep_calls {
 
 extern void e500_idle(void);
 extern void power4_idle(void);
-extern void power4_cpu_offline_powersave(void);
 extern void ppc6xx_idle(void);
 extern void book3e_idle(void);
 
diff --git a/arch/powerpc/kernel/head_64.S b/arch/powerpc/kernel/head_64.S
index 782f23df7c85..271140b38b6f 100644
--- a/arch/powerpc/kernel/head_64.S
+++ b/arch/powerpc/kernel/head_64.S
@@ -536,6 +536,13 @@ _GLOBAL(pmac_secondary_start)
         add     r13,r13,r4              /* for this processor.          */
         mtspr   SPRN_SPRG_PACA,r13      /* Save vaddr of paca in an SPRG*/
 
+        /* Mark interrupts soft and hard disabled (they might be enabled
+         * in the PACA when doing hotplug)
+         */
+        li      r0,0
+        stb     r0,PACASOFTIRQEN(r13)
+        stb     r0,PACAHARDIRQEN(r13)
+
         /* Create a temp kernel stack for use before relocation is on.  */
         ld      r1,PACAEMERGSP(r13)
         subi    r1,r1,STACK_FRAME_OVERHEAD
diff --git a/arch/powerpc/kernel/idle_power4.S b/arch/powerpc/kernel/idle_power4.S
index 5328709eeedc..ba3195478600 100644
--- a/arch/powerpc/kernel/idle_power4.S
+++ b/arch/powerpc/kernel/idle_power4.S
@@ -53,24 +53,3 @@ END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
         isync
         b       1b
 
-_GLOBAL(power4_cpu_offline_powersave)
-        /* Go to NAP now */
-        mfmsr   r7
-        rldicl  r0,r7,48,1
-        rotldi  r0,r0,16
-        mtmsrd  r0,1                    /* hard-disable interrupts */
-        li      r0,1
-        li      r6,0
-        stb     r0,PACAHARDIRQEN(r13)   /* we'll hard-enable shortly */
-        stb     r6,PACASOFTIRQEN(r13)   /* soft-disable irqs */
-BEGIN_FTR_SECTION
-        DSSALL
-        sync
-END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
-        ori     r7,r7,MSR_EE
-        oris    r7,r7,MSR_POW@h
-        sync
-        isync
-        mtmsrd  r7
-        isync
-        blr
diff --git a/arch/powerpc/platforms/powermac/smp.c b/arch/powerpc/platforms/powermac/smp.c
index 53bee660ff3d..837989e72ca1 100644
--- a/arch/powerpc/platforms/powermac/smp.c
+++ b/arch/powerpc/platforms/powermac/smp.c
@@ -916,18 +916,20 @@ static void pmac_cpu_die(void)
         preempt_enable();
 
         /*
-         * hard-disable interrupts for the non-NAP case, the NAP code
-         * needs to re-enable interrupts (but soft-disables them)
+         * Re-enable interrupts. The NAP code needs to enable them
+         * anyways, do it now so we deal with the case where one already
+         * happened while soft-disabled.
+         * We shouldn't get any external interrupts, only decrementer, and the
+         * decrementer handler is safe for use on offline CPUs
          */
-        hard_irq_disable();
+        local_irq_enable();
 
         while (1) {
                 /* let's not take timer interrupts too often ... */
                 set_dec(0x7fffffff);
 
-                /* should always be true at this point */
-                if (cpu_has_feature(CPU_FTR_CAN_NAP))
-                        power4_cpu_offline_powersave();
+                /* Enter NAP mode */
+                power4_idle();
         }
 }