diff options
| -rw-r--r-- | drivers/gpu/drm/radeon/r600.c | 2 | ||||
| -rw-r--r-- | drivers/gpu/drm/radeon/radeon.h | 8 | ||||
| -rw-r--r-- | drivers/gpu/drm/radeon/radeon_asic.h | 56 |
3 files changed, 65 insertions, 1 deletions
diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c index f60689602082..c11715fb29c7 100644 --- a/drivers/gpu/drm/radeon/r600.c +++ b/drivers/gpu/drm/radeon/r600.c | |||
| @@ -131,7 +131,7 @@ bool r600_hpd_sense(struct radeon_device *rdev, enum radeon_hpd_id hpd) | |||
| 131 | } | 131 | } |
| 132 | 132 | ||
| 133 | void r600_hpd_set_polarity(struct radeon_device *rdev, | 133 | void r600_hpd_set_polarity(struct radeon_device *rdev, |
| 134 | enum radeon_hpd_id hpd) | 134 | enum radeon_hpd_id hpd) |
| 135 | { | 135 | { |
| 136 | u32 tmp; | 136 | u32 tmp; |
| 137 | bool connected = r600_hpd_sense(rdev, hpd); | 137 | bool connected = r600_hpd_sense(rdev, hpd); |
diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h index eafe5fad38b3..29c6e0af3755 100644 --- a/drivers/gpu/drm/radeon/radeon.h +++ b/drivers/gpu/drm/radeon/radeon.h | |||
| @@ -649,6 +649,10 @@ struct radeon_asic { | |||
| 649 | int (*clear_surface_reg)(struct radeon_device *rdev, int reg); | 649 | int (*clear_surface_reg)(struct radeon_device *rdev, int reg); |
| 650 | void (*bandwidth_update)(struct radeon_device *rdev); | 650 | void (*bandwidth_update)(struct radeon_device *rdev); |
| 651 | void (*hdp_flush)(struct radeon_device *rdev); | 651 | void (*hdp_flush)(struct radeon_device *rdev); |
| 652 | void (*hpd_init)(struct radeon_device *rdev); | ||
| 653 | void (*hpd_fini)(struct radeon_device *rdev); | ||
| 654 | bool (*hpd_sense)(struct radeon_device *rdev, enum radeon_hpd_id hpd); | ||
| 655 | void (*hpd_set_polarity)(struct radeon_device *rdev, enum radeon_hpd_id hpd); | ||
| 652 | }; | 656 | }; |
| 653 | 657 | ||
| 654 | /* | 658 | /* |
| @@ -988,6 +992,10 @@ static inline void radeon_ring_write(struct radeon_device *rdev, uint32_t v) | |||
| 988 | #define radeon_clear_surface_reg(rdev, r) ((rdev)->asic->clear_surface_reg((rdev), (r))) | 992 | #define radeon_clear_surface_reg(rdev, r) ((rdev)->asic->clear_surface_reg((rdev), (r))) |
| 989 | #define radeon_bandwidth_update(rdev) (rdev)->asic->bandwidth_update((rdev)) | 993 | #define radeon_bandwidth_update(rdev) (rdev)->asic->bandwidth_update((rdev)) |
| 990 | #define radeon_hdp_flush(rdev) (rdev)->asic->hdp_flush((rdev)) | 994 | #define radeon_hdp_flush(rdev) (rdev)->asic->hdp_flush((rdev)) |
| 995 | #define radeon_hpd_init(rdev) (rdev)->asic->hpd_init((rdev)) | ||
| 996 | #define radeon_hpd_fini(rdev) (rdev)->asic->hpd_fini((rdev)) | ||
| 997 | #define radeon_hpd_sense(rdev, hpd) (rdev)->asic->hpd_sense((rdev), (hpd)) | ||
| 998 | #define radeon_hpd_set_polarity(rdev, hpd) (rdev)->asic->hpd_set_polarity((rdev), (hpd)) | ||
| 991 | 999 | ||
| 992 | /* Common functions */ | 1000 | /* Common functions */ |
| 993 | extern int radeon_gart_table_vram_pin(struct radeon_device *rdev); | 1001 | extern int radeon_gart_table_vram_pin(struct radeon_device *rdev); |
diff --git a/drivers/gpu/drm/radeon/radeon_asic.h b/drivers/gpu/drm/radeon/radeon_asic.h index 755f50555c3d..636116bedcb4 100644 --- a/drivers/gpu/drm/radeon/radeon_asic.h +++ b/drivers/gpu/drm/radeon/radeon_asic.h | |||
| @@ -77,6 +77,11 @@ void r100_bandwidth_update(struct radeon_device *rdev); | |||
| 77 | void r100_ring_ib_execute(struct radeon_device *rdev, struct radeon_ib *ib); | 77 | void r100_ring_ib_execute(struct radeon_device *rdev, struct radeon_ib *ib); |
| 78 | int r100_ring_test(struct radeon_device *rdev); | 78 | int r100_ring_test(struct radeon_device *rdev); |
| 79 | void r100_hdp_flush(struct radeon_device *rdev); | 79 | void r100_hdp_flush(struct radeon_device *rdev); |
| 80 | void r100_hpd_init(struct radeon_device *rdev); | ||
| 81 | void r100_hpd_fini(struct radeon_device *rdev); | ||
| 82 | bool r100_hpd_sense(struct radeon_device *rdev, enum radeon_hpd_id hpd); | ||
| 83 | void r100_hpd_set_polarity(struct radeon_device *rdev, | ||
| 84 | enum radeon_hpd_id hpd); | ||
| 80 | 85 | ||
| 81 | static struct radeon_asic r100_asic = { | 86 | static struct radeon_asic r100_asic = { |
| 82 | .init = &r100_init, | 87 | .init = &r100_init, |
| @@ -109,6 +114,10 @@ static struct radeon_asic r100_asic = { | |||
| 109 | .clear_surface_reg = r100_clear_surface_reg, | 114 | .clear_surface_reg = r100_clear_surface_reg, |
| 110 | .bandwidth_update = &r100_bandwidth_update, | 115 | .bandwidth_update = &r100_bandwidth_update, |
| 111 | .hdp_flush = &r100_hdp_flush, | 116 | .hdp_flush = &r100_hdp_flush, |
| 117 | .hpd_init = &r100_hpd_init, | ||
| 118 | .hpd_fini = &r100_hpd_fini, | ||
| 119 | .hpd_sense = &r100_hpd_sense, | ||
| 120 | .hpd_set_polarity = &r100_hpd_set_polarity, | ||
| 112 | }; | 121 | }; |
| 113 | 122 | ||
| 114 | 123 | ||
| @@ -165,6 +174,10 @@ static struct radeon_asic r300_asic = { | |||
| 165 | .clear_surface_reg = r100_clear_surface_reg, | 174 | .clear_surface_reg = r100_clear_surface_reg, |
| 166 | .bandwidth_update = &r100_bandwidth_update, | 175 | .bandwidth_update = &r100_bandwidth_update, |
| 167 | .hdp_flush = &r100_hdp_flush, | 176 | .hdp_flush = &r100_hdp_flush, |
| 177 | .hpd_init = &r100_hpd_init, | ||
| 178 | .hpd_fini = &r100_hpd_fini, | ||
| 179 | .hpd_sense = &r100_hpd_sense, | ||
| 180 | .hpd_set_polarity = &r100_hpd_set_polarity, | ||
| 168 | }; | 181 | }; |
| 169 | 182 | ||
| 170 | /* | 183 | /* |
| @@ -205,6 +218,10 @@ static struct radeon_asic r420_asic = { | |||
| 205 | .clear_surface_reg = r100_clear_surface_reg, | 218 | .clear_surface_reg = r100_clear_surface_reg, |
| 206 | .bandwidth_update = &r100_bandwidth_update, | 219 | .bandwidth_update = &r100_bandwidth_update, |
| 207 | .hdp_flush = &r100_hdp_flush, | 220 | .hdp_flush = &r100_hdp_flush, |
| 221 | .hpd_init = &r100_hpd_init, | ||
| 222 | .hpd_fini = &r100_hpd_fini, | ||
| 223 | .hpd_sense = &r100_hpd_sense, | ||
| 224 | .hpd_set_polarity = &r100_hpd_set_polarity, | ||
| 208 | }; | 225 | }; |
| 209 | 226 | ||
| 210 | 227 | ||
| @@ -250,6 +267,10 @@ static struct radeon_asic rs400_asic = { | |||
| 250 | .clear_surface_reg = r100_clear_surface_reg, | 267 | .clear_surface_reg = r100_clear_surface_reg, |
| 251 | .bandwidth_update = &r100_bandwidth_update, | 268 | .bandwidth_update = &r100_bandwidth_update, |
| 252 | .hdp_flush = &r100_hdp_flush, | 269 | .hdp_flush = &r100_hdp_flush, |
| 270 | .hpd_init = &r100_hpd_init, | ||
| 271 | .hpd_fini = &r100_hpd_fini, | ||
| 272 | .hpd_sense = &r100_hpd_sense, | ||
| 273 | .hpd_set_polarity = &r100_hpd_set_polarity, | ||
| 253 | }; | 274 | }; |
| 254 | 275 | ||
| 255 | 276 | ||
| @@ -268,6 +289,12 @@ int rs600_gart_set_page(struct radeon_device *rdev, int i, uint64_t addr); | |||
| 268 | uint32_t rs600_mc_rreg(struct radeon_device *rdev, uint32_t reg); | 289 | uint32_t rs600_mc_rreg(struct radeon_device *rdev, uint32_t reg); |
| 269 | void rs600_mc_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v); | 290 | void rs600_mc_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v); |
| 270 | void rs600_bandwidth_update(struct radeon_device *rdev); | 291 | void rs600_bandwidth_update(struct radeon_device *rdev); |
| 292 | void rs600_hpd_init(struct radeon_device *rdev); | ||
| 293 | void rs600_hpd_fini(struct radeon_device *rdev); | ||
| 294 | bool rs600_hpd_sense(struct radeon_device *rdev, enum radeon_hpd_id hpd); | ||
| 295 | void rs600_hpd_set_polarity(struct radeon_device *rdev, | ||
| 296 | enum radeon_hpd_id hpd); | ||
| 297 | |||
| 271 | static struct radeon_asic rs600_asic = { | 298 | static struct radeon_asic rs600_asic = { |
| 272 | .init = &rs600_init, | 299 | .init = &rs600_init, |
| 273 | .fini = &rs600_fini, | 300 | .fini = &rs600_fini, |
| @@ -297,6 +324,10 @@ static struct radeon_asic rs600_asic = { | |||
| 297 | .set_clock_gating = &radeon_atom_set_clock_gating, | 324 | .set_clock_gating = &radeon_atom_set_clock_gating, |
| 298 | .bandwidth_update = &rs600_bandwidth_update, | 325 | .bandwidth_update = &rs600_bandwidth_update, |
| 299 | .hdp_flush = &r100_hdp_flush, | 326 | .hdp_flush = &r100_hdp_flush, |
| 327 | .hpd_init = &rs600_hpd_init, | ||
| 328 | .hpd_fini = &rs600_hpd_fini, | ||
| 329 | .hpd_sense = &rs600_hpd_sense, | ||
| 330 | .hpd_set_polarity = &rs600_hpd_set_polarity, | ||
| 300 | }; | 331 | }; |
| 301 | 332 | ||
| 302 | 333 | ||
| @@ -341,6 +372,10 @@ static struct radeon_asic rs690_asic = { | |||
| 341 | .clear_surface_reg = r100_clear_surface_reg, | 372 | .clear_surface_reg = r100_clear_surface_reg, |
| 342 | .bandwidth_update = &rs690_bandwidth_update, | 373 | .bandwidth_update = &rs690_bandwidth_update, |
| 343 | .hdp_flush = &r100_hdp_flush, | 374 | .hdp_flush = &r100_hdp_flush, |
| 375 | .hpd_init = &rs600_hpd_init, | ||
| 376 | .hpd_fini = &rs600_hpd_fini, | ||
| 377 | .hpd_sense = &rs600_hpd_sense, | ||
| 378 | .hpd_set_polarity = &rs600_hpd_set_polarity, | ||
| 344 | }; | 379 | }; |
| 345 | 380 | ||
| 346 | 381 | ||
| @@ -389,6 +424,10 @@ static struct radeon_asic rv515_asic = { | |||
| 389 | .clear_surface_reg = r100_clear_surface_reg, | 424 | .clear_surface_reg = r100_clear_surface_reg, |
| 390 | .bandwidth_update = &rv515_bandwidth_update, | 425 | .bandwidth_update = &rv515_bandwidth_update, |
| 391 | .hdp_flush = &r100_hdp_flush, | 426 | .hdp_flush = &r100_hdp_flush, |
| 427 | .hpd_init = &rs600_hpd_init, | ||
| 428 | .hpd_fini = &rs600_hpd_fini, | ||
| 429 | .hpd_sense = &rs600_hpd_sense, | ||
| 430 | .hpd_set_polarity = &rs600_hpd_set_polarity, | ||
| 392 | }; | 431 | }; |
| 393 | 432 | ||
| 394 | 433 | ||
| @@ -428,6 +467,10 @@ static struct radeon_asic r520_asic = { | |||
| 428 | .clear_surface_reg = r100_clear_surface_reg, | 467 | .clear_surface_reg = r100_clear_surface_reg, |
| 429 | .bandwidth_update = &rv515_bandwidth_update, | 468 | .bandwidth_update = &rv515_bandwidth_update, |
| 430 | .hdp_flush = &r100_hdp_flush, | 469 | .hdp_flush = &r100_hdp_flush, |
| 470 | .hpd_init = &rs600_hpd_init, | ||
| 471 | .hpd_fini = &rs600_hpd_fini, | ||
| 472 | .hpd_sense = &rs600_hpd_sense, | ||
| 473 | .hpd_set_polarity = &rs600_hpd_set_polarity, | ||
| 431 | }; | 474 | }; |
| 432 | 475 | ||
| 433 | /* | 476 | /* |
| @@ -465,6 +508,11 @@ int r600_copy_blit(struct radeon_device *rdev, | |||
| 465 | uint64_t src_offset, uint64_t dst_offset, | 508 | uint64_t src_offset, uint64_t dst_offset, |
| 466 | unsigned num_pages, struct radeon_fence *fence); | 509 | unsigned num_pages, struct radeon_fence *fence); |
| 467 | void r600_hdp_flush(struct radeon_device *rdev); | 510 | void r600_hdp_flush(struct radeon_device *rdev); |
| 511 | void r600_hpd_init(struct radeon_device *rdev); | ||
| 512 | void r600_hpd_fini(struct radeon_device *rdev); | ||
| 513 | bool r600_hpd_sense(struct radeon_device *rdev, enum radeon_hpd_id hpd); | ||
| 514 | void r600_hpd_set_polarity(struct radeon_device *rdev, | ||
| 515 | enum radeon_hpd_id hpd); | ||
| 468 | 516 | ||
| 469 | static struct radeon_asic r600_asic = { | 517 | static struct radeon_asic r600_asic = { |
| 470 | .init = &r600_init, | 518 | .init = &r600_init, |
| @@ -496,6 +544,10 @@ static struct radeon_asic r600_asic = { | |||
| 496 | .clear_surface_reg = r600_clear_surface_reg, | 544 | .clear_surface_reg = r600_clear_surface_reg, |
| 497 | .bandwidth_update = &rv515_bandwidth_update, | 545 | .bandwidth_update = &rv515_bandwidth_update, |
| 498 | .hdp_flush = &r600_hdp_flush, | 546 | .hdp_flush = &r600_hdp_flush, |
| 547 | .hpd_init = &r600_hpd_init, | ||
| 548 | .hpd_fini = &r600_hpd_fini, | ||
| 549 | .hpd_sense = &r600_hpd_sense, | ||
| 550 | .hpd_set_polarity = &r600_hpd_set_polarity, | ||
| 499 | }; | 551 | }; |
| 500 | 552 | ||
| 501 | /* | 553 | /* |
| @@ -537,6 +589,10 @@ static struct radeon_asic rv770_asic = { | |||
| 537 | .clear_surface_reg = r600_clear_surface_reg, | 589 | .clear_surface_reg = r600_clear_surface_reg, |
| 538 | .bandwidth_update = &rv515_bandwidth_update, | 590 | .bandwidth_update = &rv515_bandwidth_update, |
| 539 | .hdp_flush = &r600_hdp_flush, | 591 | .hdp_flush = &r600_hdp_flush, |
| 592 | .hpd_init = &r600_hpd_init, | ||
| 593 | .hpd_fini = &r600_hpd_fini, | ||
| 594 | .hpd_sense = &r600_hpd_sense, | ||
| 595 | .hpd_set_polarity = &r600_hpd_set_polarity, | ||
| 540 | }; | 596 | }; |
| 541 | 597 | ||
| 542 | #endif | 598 | #endif |
