diff options
| -rw-r--r-- | include/asm-blackfin/mach-bf548/cdefBF54x_base.h | 33 |
1 files changed, 0 insertions, 33 deletions
diff --git a/include/asm-blackfin/mach-bf548/cdefBF54x_base.h b/include/asm-blackfin/mach-bf548/cdefBF54x_base.h index aefab3f618c1..19ddcd83c71f 100644 --- a/include/asm-blackfin/mach-bf548/cdefBF54x_base.h +++ b/include/asm-blackfin/mach-bf548/cdefBF54x_base.h | |||
| @@ -244,39 +244,6 @@ static __inline__ void bfin_write_VR_CTL(unsigned int val) | |||
| 244 | #define bfin_read_TWI0_RCV_DATA16() bfin_read16(TWI0_RCV_DATA16) | 244 | #define bfin_read_TWI0_RCV_DATA16() bfin_read16(TWI0_RCV_DATA16) |
| 245 | #define bfin_write_TWI0_RCV_DATA16(val) bfin_write16(TWI0_RCV_DATA16, val) | 245 | #define bfin_write_TWI0_RCV_DATA16(val) bfin_write16(TWI0_RCV_DATA16, val) |
| 246 | 246 | ||
| 247 | #define bfin_read_TWI_CLKDIV() bfin_read16(TWI0_CLKDIV) | ||
| 248 | #define bfin_write_TWI_CLKDIV(val) bfin_write16(TWI0_CLKDIV, val) | ||
| 249 | #define bfin_read_TWI_CONTROL() bfin_read16(TWI0_CONTROL) | ||
| 250 | #define bfin_write_TWI_CONTROL(val) bfin_write16(TWI0_CONTROL, val) | ||
| 251 | #define bfin_read_TWI_SLAVE_CTRL() bfin_read16(TWI0_SLAVE_CTRL) | ||
| 252 | #define bfin_write_TWI_SLAVE_CTRL(val) bfin_write16(TWI0_SLAVE_CTRL, val) | ||
| 253 | #define bfin_read_TWI_SLAVE_STAT() bfin_read16(TWI0_SLAVE_STAT) | ||
| 254 | #define bfin_write_TWI_SLAVE_STAT(val) bfin_write16(TWI0_SLAVE_STAT, val) | ||
| 255 | #define bfin_read_TWI_SLAVE_ADDR() bfin_read16(TWI0_SLAVE_ADDR) | ||
| 256 | #define bfin_write_TWI_SLAVE_ADDR(val) bfin_write16(TWI0_SLAVE_ADDR, val) | ||
| 257 | #define bfin_read_TWI_MASTER_CTL() bfin_read16(TWI0_MASTER_CTRL) | ||
| 258 | #define bfin_write_TWI_MASTER_CTL(val) bfin_write16(TWI0_MASTER_CTRL, val) | ||
| 259 | #define bfin_read_TWI_MASTER_STAT() bfin_read16(TWI0_MASTER_STAT) | ||
| 260 | #define bfin_write_TWI_MASTER_STAT(val) bfin_write16(TWI0_MASTER_STAT, val) | ||
| 261 | #define bfin_read_TWI_MASTER_ADDR() bfin_read16(TWI0_MASTER_ADDR) | ||
| 262 | #define bfin_write_TWI_MASTER_ADDR(val) bfin_write16(TWI0_MASTER_ADDR, val) | ||
| 263 | #define bfin_read_TWI_INT_STAT() bfin_read16(TWI0_INT_STAT) | ||
| 264 | #define bfin_write_TWI_INT_STAT(val) bfin_write16(TWI0_INT_STAT, val) | ||
| 265 | #define bfin_read_TWI_INT_MASK() bfin_read16(TWI0_INT_MASK) | ||
| 266 | #define bfin_write_TWI_INT_MASK(val) bfin_write16(TWI0_INT_MASK, val) | ||
| 267 | #define bfin_read_TWI_FIFO_CTL() bfin_read16(TWI0_FIFO_CTRL) | ||
| 268 | #define bfin_write_TWI_FIFO_CTL(val) bfin_write16(TWI0_FIFO_CTRL, val) | ||
| 269 | #define bfin_read_TWI_FIFO_STAT() bfin_read16(TWI0_FIFO_STAT) | ||
| 270 | #define bfin_write_TWI_FIFO_STAT(val) bfin_write16(TWI0_FIFO_STAT, val) | ||
| 271 | #define bfin_read_TWI_XMT_DATA8() bfin_read16(TWI0_XMT_DATA8) | ||
| 272 | #define bfin_write_TWI_XMT_DATA8(val) bfin_write16(TWI0_XMT_DATA8, val) | ||
| 273 | #define bfin_read_TWI_XMT_DATA16() bfin_read16(TWI0_XMT_DATA16) | ||
| 274 | #define bfin_write_TWI_XMT_DATA16(val) bfin_write16(TWI0_XMT_DATA16, val) | ||
| 275 | #define bfin_read_TWI_RCV_DATA8() bfin_read16(TWI0_RCV_DATA8) | ||
| 276 | #define bfin_write_TWI_RCV_DATA8(val) bfin_write16(TWI0_RCV_DATA8, val) | ||
| 277 | #define bfin_read_TWI_RCV_DATA16() bfin_read16(TWI0_RCV_DATA16) | ||
| 278 | #define bfin_write_TWI_RCV_DATA16(val) bfin_write16(TWI0_RCV_DATA16, val) | ||
| 279 | |||
| 280 | /* SPORT0 is not defined in the shared file because it is not available on the ADSP-BF542 and ADSP-BF544 bfin_read_()rocessors */ | 247 | /* SPORT0 is not defined in the shared file because it is not available on the ADSP-BF542 and ADSP-BF544 bfin_read_()rocessors */ |
| 281 | 248 | ||
| 282 | /* SPORT1 Registers */ | 249 | /* SPORT1 Registers */ |