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-rw-r--r--arch/arm/plat-omap/dma.c14
-rw-r--r--arch/arm/plat-omap/include/plat/dma.h1
2 files changed, 11 insertions, 4 deletions
diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c
index ec7eddf9e525..420cef370b33 100644
--- a/arch/arm/plat-omap/dma.c
+++ b/arch/arm/plat-omap/dma.c
@@ -996,11 +996,17 @@ void omap_start_dma(int lch)
996 l = dma_read(CCR(lch)); 996 l = dma_read(CCR(lch));
997 997
998 /* 998 /*
999 * Errata: On ES2.0 BUFFERING disable must be set. 999 * Errata: Inter Frame DMA buffering issue (All OMAP2420 and
1000 * This will always fail on ES1.0 1000 * OMAP2430ES1.0): DMA will wrongly buffer elements if packing and
1001 * bursting is enabled. This might result in data gets stalled in
1002 * FIFO at the end of the block.
1003 * Workaround: DMA channels must have BUFFERING_DISABLED bit set to
1004 * guarantee no data will stay in the DMA FIFO in case inter frame
1005 * buffering occurs.
1001 */ 1006 */
1002 if (cpu_is_omap24xx()) 1007 if (cpu_is_omap2420() ||
1003 l |= OMAP_DMA_CCR_EN; 1008 (cpu_is_omap2430() && (omap_type() == OMAP2430_REV_ES1_0)))
1009 l |= OMAP_DMA_CCR_BUFFERING_DISABLE;
1004 1010
1005 l |= OMAP_DMA_CCR_EN; 1011 l |= OMAP_DMA_CCR_EN;
1006 dma_write(l, CCR(lch)); 1012 dma_write(l, CCR(lch));
diff --git a/arch/arm/plat-omap/include/plat/dma.h b/arch/arm/plat-omap/include/plat/dma.h
index 098f154f5d41..6f70f7cfe91d 100644
--- a/arch/arm/plat-omap/include/plat/dma.h
+++ b/arch/arm/plat-omap/include/plat/dma.h
@@ -337,6 +337,7 @@
337#define OMAP2_DMA_MISALIGNED_ERR_IRQ (1 << 11) 337#define OMAP2_DMA_MISALIGNED_ERR_IRQ (1 << 11)
338 338
339#define OMAP_DMA_CCR_EN (1 << 7) 339#define OMAP_DMA_CCR_EN (1 << 7)
340#define OMAP_DMA_CCR_BUFFERING_DISABLE (1 << 25)
340 341
341#define OMAP_DMA_DATA_TYPE_S8 0x00 342#define OMAP_DMA_DATA_TYPE_S8 0x00
342#define OMAP_DMA_DATA_TYPE_S16 0x01 343#define OMAP_DMA_DATA_TYPE_S16 0x01